From 76e5ca446fc23b9d69bc72a8a7dcdc22ccca1876 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Fri, 1 Dec 2023 16:45:44 +0800
Subject: [PATCH 0001/1115] [submodule] Update submodule sonic-swss to the
 latest HEAD automatically (#17354)

---
 src/sonic-swss | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-swss b/src/sonic-swss
index 14408ca37..9458b8555 160000
--- a/src/sonic-swss
+++ b/src/sonic-swss
@@ -1 +1 @@
-Subproject commit 14408ca37d7c47634334b878a608d39925a95dab
+Subproject commit 9458b8555b952163d0d7ff0f4543c2cde3a68a81

From e117fc36c2420f6eee7b843534c550911992b662 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Fri, 1 Dec 2023 16:48:16 +0800
Subject: [PATCH 0002/1115] [submodule] Update submodule sonic-platform-daemons
 to the latest HEAD automatically (#17372)

---
 src/sonic-platform-daemons | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-platform-daemons b/src/sonic-platform-daemons
index e2d9f87a5..502c0b662 160000
--- a/src/sonic-platform-daemons
+++ b/src/sonic-platform-daemons
@@ -1 +1 @@
-Subproject commit e2d9f87a56c4758b87a75b519ead6fba88114bd4
+Subproject commit 502c0b6622008363cb1ed6d1b7c85b4093997093

From cec2731647335dc03df64f3eadd2209d17fb29c7 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Fri, 1 Dec 2023 18:35:25 +0800
Subject: [PATCH 0003/1115] [submodule] Update submodule sonic-host-services to
 the latest HEAD automatically (#17371)

#### Why I did it
src/sonic-host-services
```
* e8ae2af - (HEAD -> master, origin/master, origin/HEAD) [featured]: Add database services for DPU (#84) (24 hours ago) [Ze Gan]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-host-services | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-host-services b/src/sonic-host-services
index 445ec8b6b..e8ae2afd6 160000
--- a/src/sonic-host-services
+++ b/src/sonic-host-services
@@ -1 +1 @@
-Subproject commit 445ec8b6b4d9d2056fc8b5ea8a679696741212b2
+Subproject commit e8ae2afd612ef7fd08b7d855c48c78fe54b34ec4

From 8db3a99d113b48c5bed220e979a725bdba0693ee Mon Sep 17 00:00:00 2001
From: centecqianj <110279455+centecqianj@users.noreply.github.com>
Date: Sat, 2 Dec 2023 08:07:52 +0800
Subject: [PATCH 0004/1115] [Bookworm] Upgrade centec platforms to Bookworm
 (#17364)

How I did it
Modified platform driver to comply with bookworm kernel.
Modified python build commands for building whl packages.

How to verify it
Verify whether all the platform bookworm debs are built.
make target/debs/bookworm/platform-modules-v682-48y8c-d_1.0_amd64.deb
Load the platform debian into the device and install it in bookworm image.
Verify the platform related CLI and the functionality

Signed-off-by: centecqianj <qianj@centec.com>
---
 .../versions-deb-bullseye-arm64                   |  2 +-
 .../sonic-platform-modules-e530/debian/rules      |  2 +-
 .../pca954x/ctc-i2c-mux-pca954x.c                 |  3 +--
 .../tsingma-bsp/src/rtc-sd2405/rtc-sd2405.c       |  2 +-
 platform/centec/centec-dal/dal_kernel.c           |  4 ++--
 .../48x2q4z/modules/Makefile                      |  2 +-
 .../sonic-platform-modules-e582/debian/rules      | 15 ++++++++-------
 .../pca954x/ctc-i2c-mux-pca954x.c                 |  3 +--
 .../48x8c/modules/rtc-sd2405.c                    |  2 +-
 .../48y8c/modules/rtc-sd2405.c                    |  2 +-
 .../sonic-platform-modules-v682/debian/rules      |  2 +-
 11 files changed, 19 insertions(+), 20 deletions(-)

diff --git a/files/build/versions/dockers/docker-syncd-centec/versions-deb-bullseye-arm64 b/files/build/versions/dockers/docker-syncd-centec/versions-deb-bullseye-arm64
index 0af33189f..1bbee2b22 100644
--- a/files/build/versions/dockers/docker-syncd-centec/versions-deb-bullseye-arm64
+++ b/files/build/versions/dockers/docker-syncd-centec/versions-deb-bullseye-arm64
@@ -1,7 +1,7 @@
 dmsetup==2:1.02.175-2.1
 iputils-ping==3:20210202-1
 keyutils==1.6.1-2
-libdbus-1-dev==1.12.24-0+deb11u1
+libdbus-1-dev==1.12.28-0+deb11u1
 libdevmapper1.02.1==2:1.02.175-2.1
 libdpkg-perl==1.20.12
 libevent-2.1-7==2.1.12-stable-1
diff --git a/platform/centec-arm64/sonic-platform-modules-e530/debian/rules b/platform/centec-arm64/sonic-platform-modules-e530/debian/rules
index 5351f7f36..555f29e37 100755
--- a/platform/centec-arm64/sonic-platform-modules-e530/debian/rules
+++ b/platform/centec-arm64/sonic-platform-modules-e530/debian/rules
@@ -48,7 +48,7 @@ build:
 	(for mod in $(MODULE_DIRS); do \
 		make modules -C $(KERNEL_SRC)/build M=$(MOD_SRC_DIR)/$${mod}/modules; \
 		cd $${mod}; \
-		python3 setup.py bdist_wheel -d $(MOD_SRC_DIR)/$${mod}/modules; \
+		python3 -m build --wheel --no-isolation --outdir $(MOD_SRC_DIR)/$${mod}/modules; \
 		cd -; \
 	done)
 
diff --git a/platform/centec-arm64/sonic-platform-modules-e530/pca954x/ctc-i2c-mux-pca954x.c b/platform/centec-arm64/sonic-platform-modules-e530/pca954x/ctc-i2c-mux-pca954x.c
index 3c14bae66..466b6d626 100644
--- a/platform/centec-arm64/sonic-platform-modules-e530/pca954x/ctc-i2c-mux-pca954x.c
+++ b/platform/centec-arm64/sonic-platform-modules-e530/pca954x/ctc-i2c-mux-pca954x.c
@@ -535,14 +535,13 @@ static int pca954x_probe(struct i2c_client *client,
 	return ret;
 }
 
-static int pca954x_remove(struct i2c_client *client)
+static void pca954x_remove(struct i2c_client *client)
 {
 	struct i2c_mux_core *muxc = i2c_get_clientdata(client);
 
 	device_remove_file(&client->dev, &dev_attr_idle_state);
 
 	pca954x_cleanup(muxc);
-	return 0;
 }
 
 #ifdef CONFIG_PM_SLEEP
diff --git a/platform/centec-arm64/tsingma-bsp/src/rtc-sd2405/rtc-sd2405.c b/platform/centec-arm64/tsingma-bsp/src/rtc-sd2405/rtc-sd2405.c
index 671784f11..f448b418b 100644
--- a/platform/centec-arm64/tsingma-bsp/src/rtc-sd2405/rtc-sd2405.c
+++ b/platform/centec-arm64/tsingma-bsp/src/rtc-sd2405/rtc-sd2405.c
@@ -210,7 +210,7 @@ sd2405_probe(struct i2c_client *client, const struct i2c_device_id *id)
 	if (IS_ERR(rtc))
 		return PTR_ERR(rtc);
 	rtc->ops = &sd2405_rtc_ops;
-	ret = rtc_register_device(rtc);
+	ret = devm_rtc_register_device(rtc);
 	if (ret)
 		return ret;
 
diff --git a/platform/centec/centec-dal/dal_kernel.c b/platform/centec/centec-dal/dal_kernel.c
index b70361825..9beeabdcd 100644
--- a/platform/centec/centec-dal/dal_kernel.c
+++ b/platform/centec/centec-dal/dal_kernel.c
@@ -1935,10 +1935,10 @@ int linux_dal_pcie_probe(struct pci_dev* pdev, const struct pci_device_id* id)
                pdev->vendor, pdev->device);
     }
 
-    ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
+    ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
     if (ret)
     {
-        ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
+    	ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
         if (ret)
         {
             printk("Could not set PCI DMA Mask\n");
diff --git a/platform/centec/sonic-platform-modules-e582/48x2q4z/modules/Makefile b/platform/centec/sonic-platform-modules-e582/48x2q4z/modules/Makefile
index a7839bc06..14ab54bf1 100644
--- a/platform/centec/sonic-platform-modules-e582/48x2q4z/modules/Makefile
+++ b/platform/centec/sonic-platform-modules-e582/48x2q4z/modules/Makefile
@@ -1,3 +1,3 @@
-KBUILD_EXTRA_SYMBOLS = /sonic/platform/centec-arm64/sonic-platform-modules-e530/pca954x/Module.symvers
+KBUILD_EXTRA_SYMBOLS = /sonic/platform/centec/sonic-platform-modules-e582/pca954x/Module.symvers
 
 obj-m := centec_e582_48x2q4z_platform.o
diff --git a/platform/centec/sonic-platform-modules-e582/debian/rules b/platform/centec/sonic-platform-modules-e582/debian/rules
index 4f7100f11..a2758ad38 100755
--- a/platform/centec/sonic-platform-modules-e582/debian/rules
+++ b/platform/centec/sonic-platform-modules-e582/debian/rules
@@ -6,21 +6,23 @@ KVERSION   ?= $(shell uname -r)
 KERNEL_SRC :=  /lib/modules/$(KVERSION)
 MOD_SRC_DIR:= $(shell pwd)
 MODULE_DIRS:= 48x6q 48x2q4z
-PCA954X_DIR := pca954x
+KDAL_DIR := centec-dal/
+PCA954X_DIR := pca954x/
 
 %:
 	dh $@
 
 override_dh_auto_build:
-	(for mod in $(MODULE_DIRS); do \
-		make -C $(KERNEL_SRC)/build M=$(MOD_SRC_DIR)/$${mod}/modules; \
+	cp ../../centec/centec-dal/ $(MOD_SRC_DIR)/$(KDAL_DIR) -rf
+	(for mod in $(KDAL_DIR); do \
+		make modules -C $(KERNEL_SRC)/build M=$(MOD_SRC_DIR)/$${mod}/; \
 	done)
 	(for mod in $(PCA954X_DIR); do \
 		make modules -C $(KERNEL_SRC)/build M=$(MOD_SRC_DIR)/$${mod}/; \
 	done)
-	rm $(MOD_SRC_DIR)/centec-dal -rf
-	cp $(MOD_SRC_DIR)/../centec-dal $(MOD_SRC_DIR)/centec-dal -rf
-	make -C $(KERNEL_SRC)/build M=$(MOD_SRC_DIR)/centec-dal
+	(for mod in $(MODULE_DIRS); do \
+		make -C $(KERNEL_SRC)/build M=$(MOD_SRC_DIR)/$${mod}/modules; \
+	done)
 
 override_dh_auto_install:
 	(for mod in $(MODULE_DIRS); do \
@@ -41,7 +43,6 @@ override_dh_clean:
 		rm -rf $(MOD_SRC_DIR)/$${mod}/modules/*.ko; \
 		rm -rf debian/platform-modules-e582-$${mod}/$(KERNEL_SRC)/$(INSTALL_MOD_DIR)/*.ko; \
 	done)
-	make -C $(KERNEL_SRC)/build M=$(MOD_SRC_DIR)/centec-dal clean; \
 		rm -rf $(MOD_SRC_DIR)/centec-dal/*.ko; \
 		rm $(MOD_SRC_DIR)/centec-dal -rf
 
diff --git a/platform/centec/sonic-platform-modules-e582/pca954x/ctc-i2c-mux-pca954x.c b/platform/centec/sonic-platform-modules-e582/pca954x/ctc-i2c-mux-pca954x.c
index 3c14bae66..466b6d626 100644
--- a/platform/centec/sonic-platform-modules-e582/pca954x/ctc-i2c-mux-pca954x.c
+++ b/platform/centec/sonic-platform-modules-e582/pca954x/ctc-i2c-mux-pca954x.c
@@ -535,14 +535,13 @@ static int pca954x_probe(struct i2c_client *client,
 	return ret;
 }
 
-static int pca954x_remove(struct i2c_client *client)
+static void pca954x_remove(struct i2c_client *client)
 {
 	struct i2c_mux_core *muxc = i2c_get_clientdata(client);
 
 	device_remove_file(&client->dev, &dev_attr_idle_state);
 
 	pca954x_cleanup(muxc);
-	return 0;
 }
 
 #ifdef CONFIG_PM_SLEEP
diff --git a/platform/centec/sonic-platform-modules-v682/48x8c/modules/rtc-sd2405.c b/platform/centec/sonic-platform-modules-v682/48x8c/modules/rtc-sd2405.c
index c22ab3349..9307f1811 100644
--- a/platform/centec/sonic-platform-modules-v682/48x8c/modules/rtc-sd2405.c
+++ b/platform/centec/sonic-platform-modules-v682/48x8c/modules/rtc-sd2405.c
@@ -229,7 +229,7 @@ sd2405_probe(struct i2c_client *client, const struct i2c_device_id *id)
 	i2c_set_clientdata(client, rtc);
 	rtc->ops = &sd2405_rtc_ops;
 
-	return rtc_register_device(rtc);
+	return devm_rtc_register_device(rtc);
 }
 
 static struct i2c_device_id sd2405_id[] = {
diff --git a/platform/centec/sonic-platform-modules-v682/48y8c/modules/rtc-sd2405.c b/platform/centec/sonic-platform-modules-v682/48y8c/modules/rtc-sd2405.c
index c22ab3349..9307f1811 100644
--- a/platform/centec/sonic-platform-modules-v682/48y8c/modules/rtc-sd2405.c
+++ b/platform/centec/sonic-platform-modules-v682/48y8c/modules/rtc-sd2405.c
@@ -229,7 +229,7 @@ sd2405_probe(struct i2c_client *client, const struct i2c_device_id *id)
 	i2c_set_clientdata(client, rtc);
 	rtc->ops = &sd2405_rtc_ops;
 
-	return rtc_register_device(rtc);
+	return devm_rtc_register_device(rtc);
 }
 
 static struct i2c_device_id sd2405_id[] = {
diff --git a/platform/centec/sonic-platform-modules-v682/debian/rules b/platform/centec/sonic-platform-modules-v682/debian/rules
index 2e0e0dc0f..bf49ae97a 100755
--- a/platform/centec/sonic-platform-modules-v682/debian/rules
+++ b/platform/centec/sonic-platform-modules-v682/debian/rules
@@ -41,7 +41,7 @@ build:
 	(for mod in $(MODULE_DIRS); do \
 		make modules -C $(KERNEL_SRC)/build M=$(MOD_SRC_DIR)/$${mod}/modules; \
 		cd $${mod}; \
-		python3 setup.py bdist_wheel -d $(MOD_SRC_DIR)/$${mod}/modules; \
+		python3 -m build --wheel --no-isolation --outdir $(MOD_SRC_DIR)/$${mod}/modules; \
 		cd -; \
 	done)
 	# third party driver for cpu card

From a19cebf8ae15f55b51bc866ac222fed936c4eb92 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sat, 2 Dec 2023 16:20:32 +0800
Subject: [PATCH 0005/1115] [submodule] Update submodule sonic-dbsyncd to the
 latest HEAD automatically (#17352)

---
 src/sonic-dbsyncd | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-dbsyncd b/src/sonic-dbsyncd
index e294eb077..4d627eed8 160000
--- a/src/sonic-dbsyncd
+++ b/src/sonic-dbsyncd
@@ -1 +1 @@
-Subproject commit e294eb0777cac48861cb39df275d419acbe73307
+Subproject commit 4d627eed8173ceab02bf9070cd5360c8ad0d42d7

From 16e36fed12bf5181eca29f7a28bf285b7e02c5c5 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sat, 2 Dec 2023 16:33:50 +0800
Subject: [PATCH 0006/1115] [submodule] Update submodule sonic-restapi to the
 latest HEAD automatically (#17386)

---
 src/sonic-restapi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-restapi b/src/sonic-restapi
index ccad4a24b..7971aa3c1 160000
--- a/src/sonic-restapi
+++ b/src/sonic-restapi
@@ -1 +1 @@
-Subproject commit ccad4a24b3ea2dd1afd3391f7e99864bd1414976
+Subproject commit 7971aa3c1fa5e02c099df10fc3e4fdc7d89f99ec

From e2c6206a3e36f0e119f3e949e4cf6b8c6dfb7963 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sat, 2 Dec 2023 16:36:42 +0800
Subject: [PATCH 0007/1115] [submodule] Update submodule sonic-mgmt-framework
 to the latest HEAD automatically (#17384)

---
 src/sonic-mgmt-framework | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-mgmt-framework b/src/sonic-mgmt-framework
index dfac87c2b..99cbc4804 160000
--- a/src/sonic-mgmt-framework
+++ b/src/sonic-mgmt-framework
@@ -1 +1 @@
-Subproject commit dfac87c2b8626d6faa4e3ff200d14cc806a2c695
+Subproject commit 99cbc4804ba5fa18adcf6a29271fc58a769e174d

From 77b4074c318d18601d9f0a44135ee821d32eccb1 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sat, 2 Dec 2023 16:49:36 +0800
Subject: [PATCH 0008/1115] [submodule] Update submodule sonic-utilities to the
 latest HEAD automatically (#17069)

---
 src/sonic-utilities | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-utilities b/src/sonic-utilities
index 17e77fe28..3037959da 160000
--- a/src/sonic-utilities
+++ b/src/sonic-utilities
@@ -1 +1 @@
-Subproject commit 17e77fe28d947c3b7d333b6453e1569d9dc4558f
+Subproject commit 3037959da0db3639952d15c9cb0ba1b7a04c1e64

From e15da31e8d86653a22b4c6aec77fc43a05bdfd7a Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sat, 2 Dec 2023 17:01:35 +0800
Subject: [PATCH 0009/1115] [submodule] Update submodule sonic-swss to the
 latest HEAD automatically (#17387)

---
 src/sonic-swss | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-swss b/src/sonic-swss
index 9458b8555..d839eec3c 160000
--- a/src/sonic-swss
+++ b/src/sonic-swss
@@ -1 +1 @@
-Subproject commit 9458b8555b952163d0d7ff0f4543c2cde3a68a81
+Subproject commit d839eec3c02a5911645dbfc93aa5bb474bbff38f

From 61e14cf5abdae3c13dfe0bfc0e433791a5151cba Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sat, 2 Dec 2023 17:48:05 +0800
Subject: [PATCH 0010/1115] [submodule] Update submodule sonic-mgmt-common to
 the latest HEAD automatically (#17383)

---
 src/sonic-mgmt-common | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-mgmt-common b/src/sonic-mgmt-common
index d96bfcd21..3dbabda4d 160000
--- a/src/sonic-mgmt-common
+++ b/src/sonic-mgmt-common
@@ -1 +1 @@
-Subproject commit d96bfcd217e834c4205edef960b565886936ae8c
+Subproject commit 3dbabda4d599f8dd2c470d8ec6da47fe2ec0853f

From c9ae11d6816f6c97a80c419f19cdc3ebe0b6dbf2 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sat, 2 Dec 2023 17:57:35 +0800
Subject: [PATCH 0011/1115] [submodule] Update submodule sonic-platform-common
 to the latest HEAD automatically (#17385)

---
 src/sonic-platform-common | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-platform-common b/src/sonic-platform-common
index 2efe97e3a..036b2fc7b 160000
--- a/src/sonic-platform-common
+++ b/src/sonic-platform-common
@@ -1 +1 @@
-Subproject commit 2efe97e3adb76e8d5b8bd6f39c125475456a9e83
+Subproject commit 036b2fc7b5200e107d25b49418a38dac69465341

From 4c699050e8b3bb758eddc01f9a0ee101e457ca77 Mon Sep 17 00:00:00 2001
From: Kebo Liu <kebol@nvidia.com>
Date: Sun, 3 Dec 2023 21:32:56 +0800
Subject: [PATCH 0012/1115] [Mellanox] Add special rsyslog filter for MSN2410
 platform (#17365)

- Why I did it
Mellanox MSN2410 platforms have a non-functional error log: "ERR pmon#sensord: Error getting sensor data: dps460/#10: Can't read". This error is because of a firmware issue with some PSU, we are not able to upgrade the FW online. Since there is no functional impact, this error log can be ignored safely

- How I did it
Add a new rsyslog rule to the rsyslog-container.conf.j2, if the docker name is pmon and the platform name matches, the new rule will be inserted into the docker rsyslogd.conf

- How to verify it
run regression on the MSN2410 platform to make the error log will not be printed to the syslog.

Signed-off-by: Kebo Liu <kebol@nvidia.com>
---
 files/image_config/rsyslog/rsyslog-container.conf.j2 | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/files/image_config/rsyslog/rsyslog-container.conf.j2 b/files/image_config/rsyslog/rsyslog-container.conf.j2
index bb786eacd..4dff46957 100644
--- a/files/image_config/rsyslog/rsyslog-container.conf.j2
+++ b/files/image_config/rsyslog/rsyslog-container.conf.j2
@@ -53,9 +53,9 @@ $SystemLogRateLimitBurst 20000
 #### GLOBAL DIRECTIVES ####
 ###########################
 {% if container_name == 'pmon' %}
-{% if platform == 'x86_64-mlnx_msn2700-r0' or platform == 'x86_64-mlnx_msn2700a1-r0' %}
+{% if platform == 'x86_64-mlnx_msn2700-r0' or platform == 'x86_64-mlnx_msn2700a1-r0' or platform == 'x86_64-mlnx_msn2410-r0' %}
 
-# This rsyslog configuration is intended to resolve the following error message that only appears on the MSN2700 platform:
+# This rsyslog configuration is intended to resolve the following error message that only appears on the MSN2700 and MSN2410 platforms:
 # "ERR pmon#sensord: Error getting sensor data: dps460/#10: Can't read"
 # This error is because of firmware issue with some type of PSU, we are not able to upgrade the FW online.
 # Since there is no functional impact, this error log can be ignored safely.

From ed8fa6a47ed0c0548e9425ee39fe48cde495fd53 Mon Sep 17 00:00:00 2001
From: zitingguo-ms <zitingguo@microsoft.com>
Date: Mon, 4 Dec 2023 09:31:39 +0800
Subject: [PATCH 0013/1115] Upgrade xgs SAI version to 8.4.31.0 (#17059)

Why I did it
Upgrade the xgs SAI version to 8.4.31.0 to include the following changes:

8.4.22.0: [SDK upgrade][CSP CS00012314723][SAI_BRANCH rel_ocp_sai_8_4] SID:bcmtmPfcDdrScan thread takes 100% CPU utilization
8.4.23.0: [SDK upgrade][CSP CS00012290176[SAI_BRANCH rel_ocp_sai_8_4] SDK-323160: bcm_l3_ecmp_member_add returns Table Full error while ISSU
8.4.24.0:
[SDK upgrade]Merge "[CSP NA][SAI_BRANCH rel_ocp_sai_8_4] SID: Software LinkScan Not Catching Short Local/Remote Fault Events" into hsdk_6.5.27_SAI_8.4.0_GA
[SDK upgrade][CSP NA][SAI_BRANCH rel_ocp_sai_8_4] SID: Software LinkScan Not Catching Short Local/Remote Fault Events
8.4.25.0: [SAI_BRANCH rel_ocp_sai_8_4]CLONE - SAI - 8.4 - _brcm_sai_cosq_stat_get errors for CPU queue 41
8.4.26.0: [CSP CS00012307911] Fixed incorrect CPU related SAI port obj encoding/decoding in most subsystems
8.4.27.0: [CSP CS00012309154] [TD3] SAI_STATUS_INVALID_PARAMETER on setting SAI_BUFFER_POOL_ATTR_SIZE, OA crash
8.4.28.0: [CSP CS00012315552] Excessive logging from _brcm_sai_acl_tbl_grp_mbr_migration
8.4.29.0: [CSP CS00012321369] Fix TH2 regression with MMU/pool size
8.4.30.0: [SDK upgrade][CSP CS00012316299][SAI_BRANCH rel_ocp_sai_8_4] L3 entry delete failed when SER error is present
8.4.31.0: [CSP CS00012307911] Revert and limit scope of previous change due to WB issue.
Work item tracking
Microsoft ADO (number only): 26021230
How I did it
Upgrade the SAI version in sai.mk file.

How to verify it
Run advanced reboot on TH2 and TD3:

https://dev.azure.com/mssonic/internal/_build/results?buildId=422024&view=results
https://dev.azure.com/mssonic/internal/_build/results?buildId=423352&view=results
@saiarcot895 run warm reboot from 202012 to target image and they've passed
TH2: https://dev.azure.com/mssonic/internal/_build/results?buildId=423112&view=logs&j=76acabad-01e9-5c52-6fe6-d396d63e85d2&t=0d14fb40-14d5-50ca-4a23-af1778140cbf
TH: https://dev.azure.com/mssonic/internal/_build/results?buildId=423119&view=logs&j=76acabad-01e9-5c52-6fe6-d396d63e85d2&t=0d14fb40-14d5-50ca-4a23-af1778140cbf
TD3: https://dev.azure.com/mssonic/internal/_build/results?buildId=423074&view=logs&j=76acabad-01e9-5c52-6fe6-d396d63e85d2&t=0d14fb40-14d5-50ca-4a23-af1778140cbf
---
 platform/broadcom/sai.mk | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/platform/broadcom/sai.mk b/platform/broadcom/sai.mk
index 3b534eb27..92a1d9598 100644
--- a/platform/broadcom/sai.mk
+++ b/platform/broadcom/sai.mk
@@ -1,4 +1,4 @@
-LIBSAIBCM_XGS_VERSION = 8.4.21.0
+LIBSAIBCM_XGS_VERSION = 8.4.31.0
 LIBSAIBCM_DNX_VERSION = 7.1.111.1
 LIBSAIBCM_XGS_BRANCH_NAME = SAI_8.4.0_GA
 LIBSAIBCM_DNX_BRANCH_NAME = REL_7.0_SAI_1.11

From ada7c6a72e27a9729628f383f48cd5f75d4da227 Mon Sep 17 00:00:00 2001
From: Ashwin Hiranniah <44602975+ashwin-h@users.noreply.github.com>
Date: Mon, 4 Dec 2023 22:41:52 +0000
Subject: [PATCH 0014/1115] Add pensando platform (#15978)

This commit adds support for pensando asic called ELBA. ELBA is used in pci based cards and in smartswitches.

#### Why I did it
This commit introduces pensando platform which is based on ELBA ASIC.
##### Work item tracking
- Microsoft ADO **(number only)**:

#### How I did it
Created platform/pensando folder and created makefiles specific to pensando.
This mainly creates pensando docker (which OEM's need to download before building an image) which has all the userspace to initialize and use the DPU (ELBA ASIC).
Output of the build process creates two images which can be used from ONIE and goldfw.
Recommendation is use to use ONIE.
#### How to verify it
Load the SONiC image via ONIE or goldfw and make sure the interfaces are UP.

##### Description for the changelog
Add pensando platform support.
---
 .gitignore                                    |    3 +
 build_debian.sh                               |   27 +-
 build_image.sh                                |   40 +-
 .../Pensando-elba/port_config.ini             |    3 +
 .../Pensando-elba/sai.profile                 |    0
 .../pensando/arm64-elba-asic-r0/default_sku   |    1 +
 .../pensando/arm64-elba-asic-r0/platform_asic |    1 +
 .../arm64-elba-asic-r0/plugins/ssd_util.py    |  100 +
 .../pmon_daemon_control.json                  |   10 +
 dockers/docker-orchagent/orchagent.sh         |    3 +
 .../build_templates/sonic_debian_extension.j2 |    9 +
 files/dsc/MANIFEST.j2                         |   20 +
 files/dsc/dpu.init                            |   85 +
 files/dsc/dpu.service                         |   17 +
 files/dsc/install_debian.j2                   |  331 +
 installer/install.sh                          |    8 +-
 onie-image-arm64.conf                         |    5 +-
 onie-image-armhf.conf                         |    2 +-
 onie-image.conf                               |    5 +-
 platform/pensando/docker-dpu-base.dep         |    4 +
 platform/pensando/docker-dpu-base.mk          |   10 +
 platform/pensando/docker-dpu.dep              |    7 +
 platform/pensando/docker-dpu.mk               |   20 +
 platform/pensando/docker-dpu/Dockerfile.j2    |    2 +
 platform/pensando/docker-syncd-pensando.mk    |   20 +
 .../docker-syncd-pensando/Dockerfile.j2       |   34 +
 .../docker-syncd-pensando/critical_processes  |    1 +
 .../docker-syncd-pensando/supervisord.conf    |   39 +
 platform/pensando/dsc-drivers.mk              |    9 +
 .../pensando/dsc-drivers/debian/changelog     |    5 +
 platform/pensando/dsc-drivers/debian/compat   |    1 +
 platform/pensando/dsc-drivers/debian/control  |   14 +
 .../dsc-drivers/debian/ionic-modules.install  |    4 +
 platform/pensando/dsc-drivers/debian/rules    |   65 +
 platform/pensando/dsc-drivers/src/README.md   |  167 +
 .../dsc-drivers/src/drivers/common/ionic_if.h | 3602 +++++++++
 .../src/drivers/common/ionic_regs.h           |  145 +
 .../dsc-drivers/src/drivers/linux/Makefile    |  116 +
 .../src/drivers/linux/eth/ionic/Kconfig       |   34 +
 .../src/drivers/linux/eth/ionic/Makefile      |   19 +
 .../src/drivers/linux/eth/ionic/dim.c         |   85 +
 .../src/drivers/linux/eth/ionic/dim.h         |  344 +
 .../src/drivers/linux/eth/ionic/ionic.h       |  116 +
 .../src/drivers/linux/eth/ionic/ionic_api.c   |  266 +
 .../src/drivers/linux/eth/ionic/ionic_api.h   |  275 +
 .../src/drivers/linux/eth/ionic/ionic_bus.h   |   23 +
 .../drivers/linux/eth/ionic/ionic_bus_pci.c   |  484 ++
 .../linux/eth/ionic/ionic_bus_platform.c      |  472 ++
 .../drivers/linux/eth/ionic/ionic_debugfs.c   |  584 ++
 .../drivers/linux/eth/ionic/ionic_debugfs.h   |   43 +
 .../src/drivers/linux/eth/ionic/ionic_dev.c   | 1208 +++
 .../src/drivers/linux/eth/ionic/ionic_dev.h   |  437 ++
 .../drivers/linux/eth/ionic/ionic_devlink.c   |  153 +
 .../drivers/linux/eth/ionic/ionic_devlink.h   |   40 +
 .../drivers/linux/eth/ionic/ionic_ethtool.c   | 1355 ++++
 .../drivers/linux/eth/ionic/ionic_ethtool.h   |   10 +
 .../src/drivers/linux/eth/ionic/ionic_fw.c    |  206 +
 .../src/drivers/linux/eth/ionic/ionic_lif.c   | 4368 +++++++++++
 .../src/drivers/linux/eth/ionic/ionic_lif.h   |  498 ++
 .../src/drivers/linux/eth/ionic/ionic_main.c  |  831 ++
 .../src/drivers/linux/eth/ionic/ionic_phc.c   |  711 ++
 .../drivers/linux/eth/ionic/ionic_phc_weak.c  |   19 +
 .../drivers/linux/eth/ionic/ionic_rx_filter.c |  619 ++
 .../drivers/linux/eth/ionic/ionic_rx_filter.h |   50 +
 .../src/drivers/linux/eth/ionic/ionic_stats.c |  573 ++
 .../src/drivers/linux/eth/ionic/ionic_stats.h |   64 +
 .../src/drivers/linux/eth/ionic/ionic_txrx.c  | 1595 ++++
 .../src/drivers/linux/eth/ionic/ionic_txrx.h  |   21 +
 .../src/drivers/linux/eth/ionic/kcompat.c     | 2609 +++++++
 .../src/drivers/linux/eth/ionic/kcompat.h     | 6850 +++++++++++++++++
 .../linux/eth/ionic/kcompat_overflow.h        |  319 +
 .../src/drivers/linux/eth/ionic/net_dim.c     |  248 +
 .../src/drivers/linux/linux_ver.mk            |  211 +
 .../src/drivers/linux/mdev/Makefile           |    3 +
 .../src/drivers/linux/mdev/mdev_drv.c         |  670 ++
 .../src/drivers/linux/mdev/mdev_drv.h         |   47 +
 .../linux/mnet_uio_pdrv_genirq/Makefile       |    3 +
 .../mnet_uio_pdrv_genirq_drv.c                |  291 +
 .../src/drivers/linux/pciesvc/Makefile        |   42 +
 .../src/drivers/linux/pciesvc/README.md       |   22 +
 .../drivers/linux/pciesvc/kpci_constants.h    |   42 +
 .../src/drivers/linux/pciesvc/kpci_entry.S    |  364 +
 .../src/drivers/linux/pciesvc/kpci_kexec.c    |  263 +
 .../src/drivers/linux/pciesvc/kpci_test.c     |  201 +
 .../src/drivers/linux/pciesvc/kpcimgr_api.h   |  172 +
 .../drivers/linux/pciesvc/kpcimgr_module.c    |   90 +
 .../src/drivers/linux/pciesvc/kpcinterface.c  |  567 ++
 .../pciesvc/pciesvc/include/indirect_entry.h  |   40 +
 .../pciesvc/pciesvc/include/indirect_reason.h |   29 +
 .../pciesvc/pciesvc/include/notify_entry.h    |   18 +
 .../pciesvc/include/pciehdevice_types.h       |   38 +
 .../linux/pciesvc/pciesvc/include/pciehw.h    |   29 +
 .../linux/pciesvc/pciesvc/include/pciehwmem.h |   36 +
 .../pciesvc/pciesvc/include/pciemgr_stats.h   |   33 +
 .../pciesvc/include/pciemgr_stats_defs.h      |   56 +
 .../linux/pciesvc/pciesvc/include/pcieshmem.h |  207 +
 .../linux/pciesvc/pciesvc/include/pciesvc.h   |   85 +
 .../pciesvc/pciesvc/include/pciesvc_cmd.h     |   62 +
 .../pciesvc/pciesvc/include/pciesvc_event.h   |   81 +
 .../pciesvc/pciesvc/include/pciesvc_local.h   |   62 +
 .../linux/pciesvc/pciesvc/include/pcietlp.h   |  218 +
 .../linux/pciesvc/pciesvc/include/pmt.h       |  197 +
 .../linux/pciesvc/pciesvc/include/prt.h       |  132 +
 .../pciesvc/pciesvc/include/serial_state.h    |   41 +
 .../pciesvc/pciesvc/include/tlpauxinfo.h      |   53 +
 .../linux/pciesvc/pciesvc/include/uart.h      |  127 +
 .../pciesvc/pciesvc/include/virtio_spec.h     |  240 +
 .../linux/pciesvc/pciesvc/src/asic_regs.h     |   16 +
 .../pciesvc/pciesvc/src/asic_regs_capri.h     |   66 +
 .../pciesvc/pciesvc/src/asic_regs_elba.h      |   67 +
 .../drivers/linux/pciesvc/pciesvc/src/bar.c   |  244 +
 .../drivers/linux/pciesvc/pciesvc/src/bdf.h   |   52 +
 .../drivers/linux/pciesvc/pciesvc/src/cfg.c   | 1072 +++
 .../linux/pciesvc/pciesvc/src/cfgspace.c      |  401 +
 .../linux/pciesvc/pciesvc/src/cfgspace.h      |   94 +
 .../drivers/linux/pciesvc/pciesvc/src/cmd.c   |   74 +
 .../drivers/linux/pciesvc/pciesvc/src/hdrt.c  |   71 +
 .../drivers/linux/pciesvc/pciesvc/src/hdrt.h  |   40 +
 .../linux/pciesvc/pciesvc/src/indirect.c      |  331 +
 .../linux/pciesvc/pciesvc/src/indirect.h      |   19 +
 .../drivers/linux/pciesvc/pciesvc/src/intr.c  |   38 +
 .../drivers/linux/pciesvc/pciesvc/src/intr.h  |   14 +
 .../linux/pciesvc/pciesvc/src/intrutils.c     |  238 +
 .../linux/pciesvc/pciesvc/src/intrutils.h     |   84 +
 .../drivers/linux/pciesvc/pciesvc/src/log.c   |   84 +
 .../drivers/linux/pciesvc/pciesvc/src/log.h   |   35 +
 .../linux/pciesvc/pciesvc/src/notify.c        |  272 +
 .../linux/pciesvc/pciesvc/src/notify.h        |   17 +
 .../linux/pciesvc/pciesvc/src/pciehwdev.c     |   36 +
 .../linux/pciesvc/pciesvc/src/pciesvc.c       |  279 +
 .../linux/pciesvc/pciesvc/src/pciesvc_impl.h  |  311 +
 .../pciesvc/pciesvc/src/pciesvc_system.h      |   22 +
 .../pciesvc/src/pciesvc_system_local.h        |  158 +
 .../linux/pciesvc/pciesvc/src/pcietlp.c       |  789 ++
 .../drivers/linux/pciesvc/pciesvc/src/pmt.c   |  947 +++
 .../drivers/linux/pciesvc/pciesvc/src/pmt.h   |   37 +
 .../linux/pciesvc/pciesvc/src/portcfg.c       |  110 +
 .../linux/pciesvc/pciesvc/src/portcfg.h       |   44 +
 .../linux/pciesvc/pciesvc/src/printf.c        |  310 +
 .../drivers/linux/pciesvc/pciesvc/src/prt.c   |  127 +
 .../drivers/linux/pciesvc/pciesvc/src/prt.h   |   18 +
 .../linux/pciesvc/pciesvc/src/req_int.c       |   95 +
 .../linux/pciesvc/pciesvc/src/req_int.h       |   27 +
 .../drivers/linux/pciesvc/pciesvc/src/reset.c |  157 +
 .../drivers/linux/pciesvc/pciesvc/src/reset.h |   16 +
 .../linux/pciesvc/pciesvc/src/serial.c        |  680 ++
 .../linux/pciesvc/pciesvc/src/serial.h        |   20 +
 .../linux/pciesvc/pciesvc/src/virtio.c        |  401 +
 .../linux/pciesvc/pciesvc/src/virtio.h        |   19 +
 .../drivers/linux/pciesvc/pciesvc/src/vpd.c   |   29 +
 .../drivers/linux/pciesvc/pciesvc/src/vpd.h   |   15 +
 .../src/drivers/linux/pciesvc/pciesvc_end.c   |   24 +
 .../linux/pciesvc/pciesvc_system_extern.h     |  133 +
 .../drivers/linux/pciesvc/tools/reloc_check   |   78 +
 .../dsc-drivers/systemd/ionic-modules.service |   12 +
 platform/pensando/elba-asic-psci.dtb          |  Bin 0 -> 13944 bytes
 platform/pensando/one-image.mk                |   17 +
 platform/pensando/platform.conf               |  283 +
 platform/pensando/rules.mk                    |   16 +
 platform/pensando/sdk.mk                      |   10 +
 scripts/prepare_docker_buildinfo.sh           |    2 +
 slave.mk                                      |   13 +-
 sonic-slave-buster/Dockerfile.j2              |    1 +
 163 files changed, 43782 insertions(+), 19 deletions(-)
 create mode 100644 device/pensando/arm64-elba-asic-r0/Pensando-elba/port_config.ini
 create mode 100644 device/pensando/arm64-elba-asic-r0/Pensando-elba/sai.profile
 create mode 100644 device/pensando/arm64-elba-asic-r0/default_sku
 create mode 100644 device/pensando/arm64-elba-asic-r0/platform_asic
 create mode 100644 device/pensando/arm64-elba-asic-r0/plugins/ssd_util.py
 create mode 100644 device/pensando/arm64-elba-asic-r0/pmon_daemon_control.json
 create mode 100644 files/dsc/MANIFEST.j2
 create mode 100755 files/dsc/dpu.init
 create mode 100644 files/dsc/dpu.service
 create mode 100755 files/dsc/install_debian.j2
 create mode 100644 platform/pensando/docker-dpu-base.dep
 create mode 100644 platform/pensando/docker-dpu-base.mk
 create mode 100644 platform/pensando/docker-dpu.dep
 create mode 100644 platform/pensando/docker-dpu.mk
 create mode 100644 platform/pensando/docker-dpu/Dockerfile.j2
 create mode 100644 platform/pensando/docker-syncd-pensando.mk
 create mode 100755 platform/pensando/docker-syncd-pensando/Dockerfile.j2
 create mode 100644 platform/pensando/docker-syncd-pensando/critical_processes
 create mode 100644 platform/pensando/docker-syncd-pensando/supervisord.conf
 create mode 100644 platform/pensando/dsc-drivers.mk
 create mode 100644 platform/pensando/dsc-drivers/debian/changelog
 create mode 100644 platform/pensando/dsc-drivers/debian/compat
 create mode 100644 platform/pensando/dsc-drivers/debian/control
 create mode 100644 platform/pensando/dsc-drivers/debian/ionic-modules.install
 create mode 100755 platform/pensando/dsc-drivers/debian/rules
 create mode 100644 platform/pensando/dsc-drivers/src/README.md
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/common/ionic_if.h
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/common/ionic_regs.h
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/Makefile
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/Kconfig
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/Makefile
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/dim.c
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/dim.h
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic.h
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_api.c
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_api.h
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_bus.h
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_bus_pci.c
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_bus_platform.c
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_debugfs.c
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_debugfs.h
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_dev.c
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_dev.h
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_devlink.c
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_devlink.h
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_ethtool.c
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_ethtool.h
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_fw.c
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_lif.c
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_lif.h
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_main.c
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_phc.c
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_phc_weak.c
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_rx_filter.c
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_rx_filter.h
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_stats.c
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_stats.h
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_txrx.c
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_txrx.h
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/kcompat.c
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/kcompat.h
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/kcompat_overflow.h
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/net_dim.c
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/linux_ver.mk
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/mdev/Makefile
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/mdev/mdev_drv.c
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/mdev/mdev_drv.h
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/mnet_uio_pdrv_genirq/Makefile
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/mnet_uio_pdrv_genirq/mnet_uio_pdrv_genirq_drv.c
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/Makefile
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/README.md
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/kpci_constants.h
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/kpci_entry.S
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/kpci_kexec.c
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/kpci_test.c
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/kpcimgr_api.h
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/kpcimgr_module.c
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/kpcinterface.c
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/include/indirect_entry.h
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/include/indirect_reason.h
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/include/notify_entry.h
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/include/pciehdevice_types.h
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/include/pciehw.h
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/include/pciehwmem.h
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/include/pciemgr_stats.h
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/include/pciemgr_stats_defs.h
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/include/pcieshmem.h
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/include/pciesvc.h
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/include/pciesvc_cmd.h
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/include/pciesvc_event.h
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/include/pciesvc_local.h
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/include/pcietlp.h
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/include/pmt.h
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/include/prt.h
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/include/serial_state.h
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/include/tlpauxinfo.h
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/include/uart.h
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/include/virtio_spec.h
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/asic_regs.h
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/asic_regs_capri.h
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/asic_regs_elba.h
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/bar.c
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/bdf.h
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/cfg.c
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/cfgspace.c
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/cfgspace.h
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/cmd.c
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/hdrt.c
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/hdrt.h
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/indirect.c
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/indirect.h
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/intr.c
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/intr.h
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/intrutils.c
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/intrutils.h
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/log.c
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/log.h
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/notify.c
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/notify.h
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/pciehwdev.c
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/pciesvc.c
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/pciesvc_impl.h
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/pciesvc_system.h
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/pciesvc_system_local.h
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/pcietlp.c
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/pmt.c
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/pmt.h
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/portcfg.c
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/portcfg.h
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/printf.c
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/prt.c
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/prt.h
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/req_int.c
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/req_int.h
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/reset.c
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/reset.h
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/serial.c
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/serial.h
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/virtio.c
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/virtio.h
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/vpd.c
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/vpd.h
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc_end.c
 create mode 100644 platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc_system_extern.h
 create mode 100755 platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/tools/reloc_check
 create mode 100644 platform/pensando/dsc-drivers/systemd/ionic-modules.service
 create mode 100755 platform/pensando/elba-asic-psci.dtb
 create mode 100644 platform/pensando/one-image.mk
 create mode 100644 platform/pensando/platform.conf
 create mode 100644 platform/pensando/rules.mk
 create mode 100644 platform/pensando/sdk.mk

diff --git a/.gitignore b/.gitignore
index 5797d0cd1..771f84d72 100644
--- a/.gitignore
+++ b/.gitignore
@@ -41,6 +41,9 @@ installer/x86_64/platforms/
 # Misc. files
 asic_config_checksum
 files/Aboot/boot0
+files/dsc/MANIFEST
+files/dsc/install_debian
+files/dsc/fs.zip
 files/initramfs-tools/arista-convertfs
 files/initramfs-tools/union-mount
 
diff --git a/build_debian.sh b/build_debian.sh
index 991969040..8a0d0be39 100755
--- a/build_debian.sh
+++ b/build_debian.sh
@@ -50,8 +50,8 @@ TRUSTED_GPG_DIR=$BUILD_TOOL_PATH/trusted.gpg.d
     echo "Error: Invalid ONIE_IMAGE_PART_SIZE in onie image config file"
     exit 1
 }
-[ -n "$ONIE_INSTALLER_PAYLOAD" ] || {
-    echo "Error: Invalid ONIE_INSTALLER_PAYLOAD in onie image config file"
+[ -n "$INSTALLER_PAYLOAD" ] || {
+    echo "Error: Invalid INSTALLER_PAYLOAD in onie image config file"
     exit 1
 }
 [ -n "$FILESYSTEM_SQUASHFS" ] || {
@@ -753,14 +753,27 @@ sudo chroot $FILESYSTEM_ROOT update-initramfs -u
 ## Convert initrd image to u-boot format
 if [[ $TARGET_BOOTLOADER == uboot ]]; then
     INITRD_FILE=initrd.img-${LINUX_KERNEL_VERSION}-${CONFIGURED_ARCH}
+    KERNEL_FILE=vmlinuz-${LINUX_KERNEL_VERSION}-${CONFIGURED_ARCH}
     if [[ $CONFIGURED_ARCH == armhf ]]; then
         INITRD_FILE=initrd.img-${LINUX_KERNEL_VERSION}-armmp
         sudo LANG=C chroot $FILESYSTEM_ROOT mkimage -A arm -O linux -T ramdisk -C gzip -d /boot/$INITRD_FILE /boot/u${INITRD_FILE}
         ## Overwriting the initrd image with uInitrd
         sudo LANG=C chroot $FILESYSTEM_ROOT mv /boot/u${INITRD_FILE} /boot/$INITRD_FILE
     elif [[ $CONFIGURED_ARCH == arm64 ]]; then
-        sudo cp -v $PLATFORM_DIR/${sonic_asic_platform}-${CONFIGURED_ARCH}/sonic_fit.its $FILESYSTEM_ROOT/boot/
-        sudo LANG=C chroot $FILESYSTEM_ROOT mkimage -f /boot/sonic_fit.its /boot/sonic_${CONFIGURED_ARCH}.fit
+        if [[ $CONFIGURED_PLATFORM == pensando ]]; then
+            ## copy device tree file into boot (XXX: need to compile dtb from dts)
+            sudo cp -v $PLATFORM_DIR/pensando/elba-asic-psci.dtb $FILESYSTEM_ROOT/boot/
+            ## make kernel as gzip file
+            sudo LANG=C chroot $FILESYSTEM_ROOT gzip /boot/${KERNEL_FILE}
+            sudo LANG=C chroot $FILESYSTEM_ROOT mv /boot/${KERNEL_FILE}.gz /boot/${KERNEL_FILE}
+            ## Convert initrd image to u-boot format
+            sudo LANG=C chroot $FILESYSTEM_ROOT mkimage -A arm64 -O linux -T ramdisk -C gzip -d /boot/$INITRD_FILE /boot/u${INITRD_FILE}
+            ## Overwriting the initrd image with uInitrd
+            sudo LANG=C chroot $FILESYSTEM_ROOT mv /boot/u${INITRD_FILE} /boot/$INITRD_FILE
+        else
+            sudo cp -v $PLATFORM_DIR/${sonic_asic_platform}-${CONFIGURED_ARCH}/sonic_fit.its $FILESYSTEM_ROOT/boot/
+            sudo LANG=C chroot $FILESYSTEM_ROOT mkimage -f /boot/sonic_fit.its /boot/sonic_${CONFIGURED_ARCH}.fit
+        fi
     fi
 fi
 
@@ -811,7 +824,7 @@ if [[ "$CHANGE_DEFAULT_PASSWORD" == "y" ]]; then
 fi
 
 ## Compress most file system into squashfs file
-sudo rm -f $ONIE_INSTALLER_PAYLOAD $FILESYSTEM_SQUASHFS
+sudo rm -f $INSTALLER_PAYLOAD $FILESYSTEM_SQUASHFS
 ## Output the file system total size for diag purpose
 ## Note: -x to skip directories on different file systems, such as /proc
 sudo du -hsx $FILESYSTEM_ROOT
@@ -856,5 +869,5 @@ fi
 pushd $FILESYSTEM_ROOT && sudo tar -I $GZ_COMPRESS_PROGRAM -cf $OLDPWD/$FILESYSTEM_DOCKERFS -C ${DOCKERFS_PATH}var/lib/docker .; popd
 
 ## Compress together with /boot, /var/lib/docker and $PLATFORM_DIR as an installer payload zip file
-pushd $FILESYSTEM_ROOT && sudo tar -I $GZ_COMPRESS_PROGRAM -cf platform.tar.gz -C $PLATFORM_DIR . && sudo zip -n .gz $OLDPWD/$ONIE_INSTALLER_PAYLOAD -r boot/ platform.tar.gz; popd
-sudo zip -g -n .squashfs:.gz $ONIE_INSTALLER_PAYLOAD $FILESYSTEM_SQUASHFS $FILESYSTEM_DOCKERFS
+pushd $FILESYSTEM_ROOT && sudo tar -I $GZ_COMPRESS_PROGRAM -cf platform.tar.gz -C $PLATFORM_DIR . && sudo zip -n .gz $OLDPWD/$INSTALLER_PAYLOAD -r boot/ platform.tar.gz; popd
+sudo zip -g -n .squashfs:.gz $INSTALLER_PAYLOAD $FILESYSTEM_SQUASHFS $FILESYSTEM_DOCKERFS
diff --git a/build_image.sh b/build_image.sh
index 0b735f612..7fafba29e 100755
--- a/build_image.sh
+++ b/build_image.sh
@@ -18,8 +18,8 @@ fi
     echo "Error: Invalid ONIE_IMAGE_PART_SIZE in onie image config file"
     exit 1
 }
-[ -n "$ONIE_INSTALLER_PAYLOAD" ] || {
-    echo "Error: Invalid ONIE_INSTALLER_PAYLOAD in onie image config file"
+[ -n "$INSTALLER_PAYLOAD" ] || {
+    echo "Error: Invalid INSTALLER_PAYLOAD in onie image config file"
     exit 1
 }
 
@@ -86,7 +86,7 @@ generate_onie_installer_image()
     ## Note: Don't leave blank between lines. It is single line command.
     ./onie-mk-demo.sh $CONFIGURED_ARCH $TARGET_MACHINE $TARGET_PLATFORM-$TARGET_MACHINE-$ONIEIMAGE_VERSION \
           installer platform/$TARGET_MACHINE/platform.conf $output_file OS $IMAGE_VERSION $ONIE_IMAGE_PART_SIZE \
-          $ONIE_INSTALLER_PAYLOAD $SECURE_UPGRADE_SIGNING_CERT $SECURE_UPGRADE_DEV_SIGNING_KEY
+          $INSTALLER_PAYLOAD $SECURE_UPGRADE_SIGNING_CERT $SECURE_UPGRADE_DEV_SIGNING_KEY
 }
 
 # Generate asic-specific device list
@@ -175,7 +175,7 @@ elif [ "$IMAGE_TYPE" = "aboot" ]; then
     sudo rm -f $OUTPUT_ABOOT_IMAGE
     sudo rm -f $ABOOT_BOOT_IMAGE
     ## Add main payload
-    cp $ONIE_INSTALLER_PAYLOAD $OUTPUT_ABOOT_IMAGE
+    cp $INSTALLER_PAYLOAD $OUTPUT_ABOOT_IMAGE
     ## Add Aboot boot0 file
     j2 -f env files/Aboot/boot0.j2 ./onie-image.conf > files/Aboot/boot0
     sed -i -e "s/%%IMAGE_VERSION%%/$IMAGE_VERSION/g" files/Aboot/boot0
@@ -213,6 +213,38 @@ elif [ "$IMAGE_TYPE" = "aboot" ]; then
         [ -f "$CA_CERT" ] && cp "$CA_CERT" "$TARGET_CA_CERT"
         ./scripts/sign_image.sh -i "$OUTPUT_ABOOT_IMAGE" -k "$SIGNING_KEY" -c "$SIGNING_CERT" -a "$TARGET_CA_CERT"
     fi
+
+elif [ "$IMAGE_TYPE" = "dsc" ]; then
+    echo "Build DSC installer"
+
+    dsc_installer_dir=files/dsc
+    dsc_installer=$dsc_installer_dir/install_debian
+    dsc_installer_manifest=$dsc_installer_dir/MANIFEST
+
+    mkdir -p `dirname $OUTPUT_DSC_IMAGE`
+    sudo rm -f $OUTPUT_DSC_IMAGE
+
+    source ./onie-image.conf
+
+    j2 $dsc_installer.j2 > $dsc_installer
+    export installer_sha=$(sha512sum "$dsc_installer" | awk '{print $1}')
+
+    export build_date=$(date -u)
+    export build_user=$(id -un)
+    export installer_payload_sha=$(sha512sum "$INSTALLER_PAYLOAD" | awk '{print $1}')
+    j2 $dsc_installer_manifest.j2 > $dsc_installer_manifest
+
+    cp $INSTALLER_PAYLOAD $dsc_installer_dir
+    tar cf $OUTPUT_DSC_IMAGE -C files/dsc $(basename $dsc_installer_manifest) $INSTALLER_PAYLOAD $(basename $dsc_installer)
+
+    echo "Build ONIE installer"
+    mkdir -p `dirname $OUTPUT_ONIE_IMAGE`
+    sudo rm -f $OUTPUT_ONIE_IMAGE
+
+    generate_device_list "./installer/platforms_asic"
+
+    generate_onie_installer_image
+
 else
     echo "Error: Non supported image type $IMAGE_TYPE"
     exit 1
diff --git a/device/pensando/arm64-elba-asic-r0/Pensando-elba/port_config.ini b/device/pensando/arm64-elba-asic-r0/Pensando-elba/port_config.ini
new file mode 100644
index 000000000..70d1ec4f5
--- /dev/null
+++ b/device/pensando/arm64-elba-asic-r0/Pensando-elba/port_config.ini
@@ -0,0 +1,3 @@
+# name          lanes		alias		speed	autoneg	fec
+Ethernet1	0,1,2,3		Ethernet1	100000	on	rs
+Ethernet2	4,5,6,7		Ethernet2	100000	on	rs
diff --git a/device/pensando/arm64-elba-asic-r0/Pensando-elba/sai.profile b/device/pensando/arm64-elba-asic-r0/Pensando-elba/sai.profile
new file mode 100644
index 000000000..e69de29bb
diff --git a/device/pensando/arm64-elba-asic-r0/default_sku b/device/pensando/arm64-elba-asic-r0/default_sku
new file mode 100644
index 000000000..732fd3509
--- /dev/null
+++ b/device/pensando/arm64-elba-asic-r0/default_sku
@@ -0,0 +1 @@
+Pensando-elba t1
diff --git a/device/pensando/arm64-elba-asic-r0/platform_asic b/device/pensando/arm64-elba-asic-r0/platform_asic
new file mode 100644
index 000000000..a2396ec3d
--- /dev/null
+++ b/device/pensando/arm64-elba-asic-r0/platform_asic
@@ -0,0 +1 @@
+pensando
diff --git a/device/pensando/arm64-elba-asic-r0/plugins/ssd_util.py b/device/pensando/arm64-elba-asic-r0/plugins/ssd_util.py
new file mode 100644
index 000000000..6ca016e20
--- /dev/null
+++ b/device/pensando/arm64-elba-asic-r0/plugins/ssd_util.py
@@ -0,0 +1,100 @@
+#
+# ssd_generic.py
+#
+# Generic implementation of the SSD health API
+# SSD models supported:
+#  - InnoDisk
+#  - StorFly
+#  - Virtium
+
+try:
+    import re
+    import subprocess
+    from sonic_platform_base.sonic_ssd.ssd_base import SsdBase
+except ImportError as e:
+    raise ImportError (str(e) + "- required module not found")
+
+NOT_AVAILABLE = "N/A"
+MMC_DATA_PATH = "/sys/class/mmc_host/mmc0/mmc0:0001/{}"
+
+class SsdUtil(SsdBase):
+    """
+    Generic implementation of the SSD health API
+    """
+    model = NOT_AVAILABLE
+    serial = NOT_AVAILABLE
+    firmware = NOT_AVAILABLE
+    temperature = NOT_AVAILABLE
+    health = NOT_AVAILABLE
+    ssd_info = NOT_AVAILABLE
+    vendor_ssd_info = NOT_AVAILABLE
+
+    def __init__(self, diskdev):
+
+        self.dev = diskdev
+        try:
+            self.model = ("emmc {}".format(open(MMC_DATA_PATH.format("name")).read())).replace("\n", "")
+            self.serial = open(MMC_DATA_PATH.format("serial")).read().replace("\n", "")
+            self.firmware = open(MMC_DATA_PATH.format("fwrev")).read().replace("\n", "")
+            value =  open(MMC_DATA_PATH.format("life_time")).read().replace("\n", "")
+            [lifetime_a, lifetime_b] = [int(val, 16) for val in value.split()]
+            lifetime = lifetime_a if lifetime_a >= lifetime_b else lifetime_b
+            self.health = float(100 - (lifetime*10))
+        except:
+            pass
+
+    def get_health(self):
+        """
+        Retrieves current disk health in percentages
+
+        Returns:
+            A float number of current ssd health
+            e.g. 83.5
+        """
+        return self.health
+
+    def get_temperature(self):
+        """
+        Retrieves current disk temperature in Celsius
+
+        Returns:
+            A float number of current temperature in Celsius
+            e.g. 40.1
+        """
+        return self.temperature
+
+    def get_model(self):
+        """
+        Retrieves model for the given disk device
+
+        Returns:
+            A string holding disk model as provided by the manufacturer
+        """
+        return self.model
+
+    def get_firmware(self):
+        """
+        Retrieves firmware version for the given disk device
+
+        Returns:
+            A string holding disk firmware version as provided by the manufacturer
+        """
+        return self.firmware
+
+    def get_serial(self):
+        """
+        Retrieves serial number for the given disk device
+
+        Returns:
+            A string holding disk serial number as provided by the manufacturer
+        """
+        return self.serial
+
+    def get_vendor_output(self):
+        """
+        Retrieves vendor specific data for the given disk device
+
+        Returns:
+            A string holding some vendor specific disk information
+        """
+        return self.vendor_ssd_info
\ No newline at end of file
diff --git a/device/pensando/arm64-elba-asic-r0/pmon_daemon_control.json b/device/pensando/arm64-elba-asic-r0/pmon_daemon_control.json
new file mode 100644
index 000000000..f8dfa401a
--- /dev/null
+++ b/device/pensando/arm64-elba-asic-r0/pmon_daemon_control.json
@@ -0,0 +1,10 @@
+{
+    "skip_thermalctld": true,
+    "skip_fancontrol": true,
+    "skip_ledd": true,
+    "skip_psud": true,
+    "skip_syseepromd": false,
+    "skip_xcvrd": true,
+    "skip_chassis_db_init": false,
+    "skip_pcied": true
+}
\ No newline at end of file
diff --git a/dockers/docker-orchagent/orchagent.sh b/dockers/docker-orchagent/orchagent.sh
index f407e266c..883864dbd 100755
--- a/dockers/docker-orchagent/orchagent.sh
+++ b/dockers/docker-orchagent/orchagent.sh
@@ -64,6 +64,9 @@ elif [ "$platform" == "mellanox" ]; then
     ORCHAGENT_ARGS+=""
 elif [ "$platform" == "innovium" ]; then
     ORCHAGENT_ARGS+="-m $MAC_ADDRESS"
+elif [ "$platform" == "pensando" ]; then
+    MAC_ADDRESS=$(ip link property add dev oob_mnic0 altname eth0; ip link show oob_mnic0 | grep ether | awk '{print $2}')
+    ORCHAGENT_ARGS+="-m $MAC_ADDRESS"
 else
     # Should we use the fallback MAC in case it is not found in Device.Metadata
     ORCHAGENT_ARGS+="-m $MAC_ADDRESS"
diff --git a/files/build_templates/sonic_debian_extension.j2 b/files/build_templates/sonic_debian_extension.j2
index 75bc1eca5..ed52539e2 100644
--- a/files/build_templates/sonic_debian_extension.j2
+++ b/files/build_templates/sonic_debian_extension.j2
@@ -31,6 +31,7 @@ IMAGE_DISTRO=$3
 set -x -e
 
 CONFIGURED_ARCH=$([ -f .arch ] && cat .arch || echo amd64)
+CONFIGURED_PLATFORM=$([ -f .platform ] && cat .platform || echo generic)
 
 . functions.sh
 BUILD_SCRIPTS_DIR=files/build_scripts
@@ -762,6 +763,14 @@ sudo LANG=C DOCKER_HOST="$DOCKER_HOST" chroot $FILESYSTEM_ROOT docker tag {{imag
 fi
 {% endfor %}
 
+if [[ $CONFIGURED_PLATFORM == pensando ]]; then
+#Disable rc.local
+sudo LANG=C chroot $FILESYSTEM_ROOT chmod -x /etc/rc.local
+sudo cp files/dsc/dpu.service $FILESYSTEM_ROOT_USR_LIB_SYSTEMD_SYSTEM/
+sudo cp files/dsc/dpu.init $FILESYSTEM_ROOT/etc/init.d/dpu
+sudo LANG=C chroot $FILESYSTEM_ROOT systemctl enable dpu.service
+fi
+
 SONIC_PACKAGE_MANAGER_FOLDER="/var/lib/sonic-package-manager/"
 sudo mkdir -p $FILESYSTEM_ROOT/$SONIC_PACKAGE_MANAGER_FOLDER
 target_machine="$TARGET_MACHINE" j2 $BUILD_TEMPLATES/packages.json.j2 | sudo tee $FILESYSTEM_ROOT/$SONIC_PACKAGE_MANAGER_FOLDER/packages.json
diff --git a/files/dsc/MANIFEST.j2 b/files/dsc/MANIFEST.j2
new file mode 100644
index 000000000..d6aadf198
--- /dev/null
+++ b/files/dsc/MANIFEST.j2
@@ -0,0 +1,20 @@
+{
+    "metadata_version": 1,
+    "package_version": 2,
+    "asic_compat": "elba",
+    "build_date": "{{ build_date }}",
+    "build_user": "{{ build_user }}",
+    "installer": {
+        "name": "install_debian",
+        "verify": {
+            "algorithm": "sha512",
+            "hash": "{{ installer_sha }}"
+        }
+    },
+    "shas": {
+        "fs.zip": "{{ installer_payload_sha }}"
+    },
+    "package_compat": {
+        "board_policy": "accept"
+    }
+}
diff --git a/files/dsc/dpu.init b/files/dsc/dpu.init
new file mode 100755
index 000000000..09e6562c5
--- /dev/null
+++ b/files/dsc/dpu.init
@@ -0,0 +1,85 @@
+#!/bin/bash
+
+# {C} Copyright 2023 AMD Systems Inc. All rights reserved
+
+# This script starts/stops dpu sw
+
+
+### BEGIN INIT INFO
+# Provides:          load-dpu
+# Required-Start:
+# Required-Stop:
+# Should-Start:
+# Should-Stop:
+# Default-Start:     S
+# Default-Stop:      0 6
+# Short-Description: Load dpu sw
+### END INIT INFO
+ACTIVE_FILE="/boot/active.txt"
+NIC_MOUNT=""
+LOG_FILE="/tmp/active_nic"
+TAG="latest"
+HOST_DIR=/host/dpu
+
+function start_dpu()
+{
+    modprobe ionic_mnic
+    modprobe mnet_uio_pdrv_genirq
+    modprobe mdev
+
+    mkdir -p $HOST_DIR/update
+    mkdir -p $HOST_DIR/sysconfig/config0
+    mkdir -p $HOST_DIR/sysconfig/config1
+    mkdir -p $HOST_DIR/obfl
+    mkdir -p $HOST_DIR/data
+    mkdir -p $HOST_DIR/tmpfsshare
+    mkdir -p $HOST_DIR/runfs
+    mkdir -p $HOST_DIR/logfs
+    mount -t tmpfs -o size=20M,mode=1777  tmpfs $HOST_DIR/tmpfsshare
+    mount -t tmpfs -o size=20M,mode=0755  runs $HOST_DIR/runfs
+    mount -t tmpfs -o size=20M,mode=0755  logfs $HOST_DIR/logfs
+
+    if [ -f "$ACTIVE_FILE" ]; then
+        ACTIVE_CONTENTS=$(cat "$ACTIVE_FILE")
+        ACTIVE_NIC=$(echo "$ACTIVE_CONTENTS" | cut -d " " -f 8-)
+        if [ "$ACTIVE_NIC" = "/boot/nicA" ]; then
+            NIC_MOUNT="-v /dev/shm:/dev/shm -v /boot/nicA/nic_core:/nic -v /boot/nicA/shared/conf/gen:/nic/conf/gen"
+        elif [ "$ACTIVE_NIC" = "/boot/nicB" ]; then
+            NIC_MOUNT="-v /dev/shm:/dev/shm -v /boot/nicB/nic_core:/nic -v /boot/nicB/shared/conf/gen:/nic/conf/gen"
+        fi
+    else
+        echo "/boot/active.txt not present" > $LOG_FILE
+    fi
+    echo "Active Nic: $ACTIVE_NIC" >> $LOG_FILE
+    echo "NIC_MOUNT: $NIC_MOUNT" >> $LOG_FILE
+
+    docker ps -a --format "{{.ID}}\t{{.Image}}" | grep "docker-dpu:latest" | awk '{print $1}' | xargs -I {} docker rm {}
+
+    docker run -v $HOST_DIR/update:/update -v $HOST_DIR/sysconfig/config0:/sysconfig/config0 -v $HOST_DIR/sysconfig/config1:/sysconfig/config1 -v $HOST_DIR/obfl:/obfl  -v $HOST_DIR/data:/data -v $HOST_DIR/tmpfsshare:/tmp -v $HOST_DIR/runfs:/run -v $HOST_DIR/logfs:/var/log -v /sys:/sys $NIC_MOUNT --net=host --name=dpu --privileged docker-dpu:$TAG
+}
+
+case "$1" in
+start)
+    echo -n "Start dpu... "
+
+    start_dpu
+
+    echo "done."
+    ;;
+
+stop)
+    echo "Not supported"
+    ;;
+
+force-reload|restart)
+    echo "Not supported"
+    ;;
+
+*)
+    echo "Usage: /etc/init.d/dpu.init {start}"
+    exit 1
+    ;;
+esac
+
+exit 0
+
diff --git a/files/dsc/dpu.service b/files/dsc/dpu.service
new file mode 100644
index 000000000..ff6e5fc7d
--- /dev/null
+++ b/files/dsc/dpu.service
@@ -0,0 +1,17 @@
+[Unit]
+Description=dpu sw
+Requires=docker.service
+After=docker.service
+Requires=local-fs.target
+After=local-fs.target
+Requires=ionic-modules.service
+After=ionic-modules.service
+
+[Service]
+Type=oneshot
+ExecStart=/etc/init.d/dpu start
+ExecStop=/etc/init.d/dpu stop
+RemainAfterExit=yes
+
+[Install]
+WantedBy=multi-user.target
diff --git a/files/dsc/install_debian.j2 b/files/dsc/install_debian.j2
new file mode 100755
index 000000000..4cb6d2463
--- /dev/null
+++ b/files/dsc/install_debian.j2
@@ -0,0 +1,331 @@
+#!/bin/sh
+
+R=""
+export LD_LIBRARY_PATH=/platform/lib:/nic/lib:$LD_LIBRARY_PATH
+export PATH=/platform/bin:$PATH
+if [ $(arch) != aarch64 ]; then
+    export PATH=$(pwd)/bin:$PATH
+    R=$(pwd)/data
+fi
+root_mnt=$R/mnt
+
+image_version={{ SONIC_IMAGE_VERSION }}
+
+image_dir=image-$image_version
+
+INSTALLER_PAYLOAD=fs.zip
+DOCKERFS_DIR=docker
+FILESYSTEM_DOCKERFS=dockerfs.tar.gz
+BL_CONF=boot.conf
+
+DATA_PARTUUID=6ED62003-DD8D-44B8-9538-0A2B7C7E628F
+ROOT_PARTUUID=C7F48DD2-C265-404B-959D-C64D21D49168
+
+ROOT_PARTSIZE=24G
+
+exec 0< /dev/tty 1> /dev/tty 2> /dev/tty
+
+PKG=""
+ACTION=""
+
+root_pn=0
+data_pn=0
+
+REPART_NEEDED=0
+
+set -e
+
+fatal()
+{
+    echo "FATAL: $1" >&2
+    exit 1
+}
+
+hash()
+{
+    sha512sum $1 | awk '{ print $1 }'
+}
+
+check_running_goldfw()
+{
+    local fw=$(expr "$(cat $R/proc/cmdline)" : '.*FW_NAME=\([a-z]\+\)')
+    if [ "$fw" != "goldfw" ]; then
+        fatal "Installer can only be run from goldfw"
+    fi
+}
+
+check_package()
+{
+    local f want_hash got_hash
+
+    echo "==> Checking package"
+    for f in $(jq -r ".shas | keys | join(\" \") | tostring" MANIFEST); do
+        echo -n "${f}..."
+        want_hash=$(jq -r .shas.\"$f\" MANIFEST)
+        got_hash=$(tar xfO $PKG $f | hash /dev/stdin)
+        if [ "$got_hash" != "$want_hash" ]; then
+            echo " BAD"
+            echo "WANT: $want_hash"
+            echo "GOT:  $got_hash"
+            fatal "Package file error"
+        else
+            echo " OK"
+        fi
+    done
+}
+
+get_install_mode()
+{
+    local  r
+
+    while [ -z "$install_mode" ]; do
+        echo "### Select install mode:"
+        echo "###    1. Whole disk (wipe all Pensando filesystems)"
+        echo "###    2. Half of /data (lose /data contents)"
+        echo "###    3. Half of /data (save/restore /data contents)"
+        read -p '### Selection: ' r
+        case "X-$r" in
+            X-1) install_mode=FULL_DISK; ;;
+            X-2) install_mode=DATA_LOSE; ;;
+            X-3) install_mode=DATA_KEEP; ;;
+            *)   fatal "ABORTED"; ;;
+        esac
+    done
+}
+
+check_existing_parts()
+{
+    local nparts i partuuid boot_partsize boot_lastsec data_firstsec
+
+    nparts=$(sgdisk -p /dev/mmcblk0 | grep '^[ ]*[1-9]' | wc -l)
+    for i in $(seq $nparts); do
+        partuuid=$(sgdisk -i $i /dev/mmcblk0 | awk '/Partition unique GUID/ { print $NF }')
+        case "$partuuid" in
+        $DATA_PARTUUID) data_pn=$i; ;;
+        $ROOT_PARTUUID) root_pn=$i; ;;
+        esac
+    done
+
+    if [ $install_mode != FULL_DISK ]; then
+        if [ $root_pn -ne 0 ]; then
+            boot_partsize=$(sgdisk -i $root_pn /dev/mmcblk0 | awk -F '[( ]' '/Partition size/ {print int($6)}')
+            boot_lastsec=$(sgdisk -i $root_pn /dev/mmcblk0 | awk '/Last sector/ {print $3}')
+            if [ ${boot_partsize}G = $ROOT_PARTSIZE ]; then
+                echo "SONiC root partitions already present with requested size. No repartition, only formatting"
+            else
+                echo "SONiC root partitions already present with mismatch size ${partsize}G. Repartition needed"
+                REPART_NEEDED=1
+            fi
+        fi
+
+        if [ $data_pn -eq 0 ]; then
+            echo "Data partition not found; Repartition needed"
+            REPART_NEEDED=1
+        elif [ $data_pn -ne $nparts ]; then
+            fatal "Data partition is not the last partition; exiting." >&2
+        else
+            data_firstsec=$(sgdisk -i $data_pn /dev/mmcblk0 | awk '/First sector/ {print $3}')
+            if [ $data_firstsec -ne $((boot_lastsec+1)) ]; then
+                echo "Data partition not contigent with boot partition. Repartition needed"
+                REPART_NEEDED=1
+            fi
+        fi
+    fi
+}
+
+save_data()
+{
+    echo "==> Saving /data"
+    mount /dev/mmcblk0p$data_pn $R/mnt
+    tar cvf $R/root/data.tar -C $R/mnt .
+    umount $R/mnt
+}
+
+setup_partitions_full()
+{
+    local i
+
+    echo "==> Setting up partitions..."
+    root_pn=1
+
+    set +e
+    sgdisk -Z /dev/mmcblk0 >/dev/null 2>&1
+    partprobe >/dev/null 2>&1
+    sgdisk \
+        -n $root_pn:+0:+$ROOT_PARTSIZE -t $root_pn:8300 \
+        -u $root_pn:$ROOT_PARTUUID -c $root_pn:"SONiC Root Filesystem" \
+        /dev/mmcblk0 >/dev/null
+    while true; do
+        partprobe
+        if [ ! -e $R/dev/mmcblk0p3 ]; then
+            break
+        fi
+        sleep 1
+    done
+
+    echo "==> Creating filesystems"
+    for i in $root_pn; do
+        mkfs.ext4 -F -q /dev/mmcblk0p$i >/dev/null
+    done
+    set -e
+}
+
+setup_partitions_multi()
+{
+    echo "==> Setting up partitions..."
+
+    set +e
+    if [ $REPART_NEEDED -eq 0 ]; then
+        mkfs.ext4 -F -q /dev/mmcblk0p$root_pn >/dev/null
+    else
+
+        if [ $root_pn -ne 0 ]; then
+            sgdisk -d $root_pn /dev/mmcblk0 >/dev/null
+        fi
+        [ $data_pn -ne 0 ] && sgdisk -d $data_pn /dev/mmcblk0 >/dev/null
+
+        if [ $root_pn -eq 0 ]; then
+            root_pn=10
+            data_pn=$(($root_pn + 1))
+        fi
+
+        if [ $data_pn -eq 0 ]; then
+            data_pn=$(($root_pn + 1))
+        fi
+
+        sgdisk \
+            -n $root_pn:+0:+$ROOT_PARTSIZE -t $root_pn:8300 \
+            -u $root_pn:$ROOT_PARTUUID -c $root_pn:"SONiC Root Filesystem" \
+            -n $data_pn:+0:0 -t $data_pn:8300 -u $data_pn:$DATA_PARTUUID \
+            -c $data_pn:"Data Filesystem" \
+            /dev/mmcblk0 >/dev/null
+        sgdisk -U R /dev/mmcblk0 >/dev/null
+
+        while true; do
+            partprobe
+            if [ -e $R/dev/mmcblk0p$data_pn ]; then
+                break
+            fi
+            sleep 1
+        done
+
+        echo "==> Creating filesystems"
+        for i in $root_pn $data_pn; do
+            mkfs.ext4 -F -q /dev/mmcblk0p$i >/dev/null
+        done
+    fi
+    set -e
+}
+
+setup_partitions()
+{
+    if [ $install_mode = INSTALL_FULL ]; then
+        setup_partitions_full
+    else
+        setup_partitions_multi
+    fi
+}
+
+restore_data()
+{
+    echo "==> Restoring /data"
+    if [ -f $R/root/data.tar ]; then
+        mount /dev/mmcblk0p$data_pn $R/mnt
+        tar xpvf $R/root/data.tar -C $R/mnt
+        umount $R/mnt
+    fi
+}
+
+create_bootloader_conf()
+{
+    echo "==> Create bootloader config"
+
+cat <<EOF >> $root_mnt/$BL_CONF
+default main
+
+label main
+    kernel /$image_dir/boot/vmlinuz-6.1.0-11-2-arm64
+    initrd /$image_dir/boot/initrd.img-6.1.0-11-2-arm64
+    devicetree /$image_dir/boot/elba-asic-psci.dtb
+    append softdog.soft_panic=1 FW_NAME=mainfwa root=/dev/mmcblk0p10 rw rootwait rootfstype=ext4 loopfstype=squashfs loop=/$image_dir/fs.squashfs
+}
+EOF
+}
+
+install_root_filesystem()
+{
+    echo "==> Installing root filesystem"
+
+    mount /dev/mmcblk0p$root_pn $root_mnt
+    mkdir -p $root_mnt/$image_dir
+
+    # Decompress the file for the file system directly to the partition
+    if [ x"$docker_inram" = x"on" ]; then
+        # when disk is small, keep dockerfs.tar.gz in disk, expand it into ramfs during initrd
+        tar xfO $PKG $INSTALLER_PAYLOAD | unzip -o - -x "platform.tar.gz" -d $root_mnt/$image_dir
+    else
+        tar xfO $PKG $INSTALLER_PAYLOAD | unzip -o - -x "$FILESYSTEM_DOCKERFS" "platform.tar.gz" -d $root_mnt/$image_dir
+
+        TAR_EXTRA_OPTION="--numeric-owner"
+        mkdir -p $root_mnt/$image_dir/$DOCKERFS_DIR
+        tar xfO $PKG $INSTALLER_PAYLOAD | unzip -op - "$FILESYSTEM_DOCKERFS" | tar xz $TAR_EXTRA_OPTION -f - -C $root_mnt/$image_dir/$DOCKERFS_DIR
+    fi
+
+    create_bootloader_conf
+
+    umount $root_mnt
+}
+
+set_boot_command()
+{
+    local pn
+    #set to mainfwa where sonic is installed
+    mtd=/dev/$(grep fwsel /proc/mtd | sed -e 's/:.*//')
+    flash_erase -q $mtd 0 1
+    echo -n mainfwa | dd of=$mtd status=none
+
+    echo "==> Setting u-boot environment for Debian Boot"
+    pn=$(printf "%x" $root_pn)
+    fwenv -E \
+        -s kernel_comp_addr_r 88000000 \
+        -s kernel_comp_size 8000000 \
+        -s kernel_addr_r a0000000 \
+        -s fdt_addr_r bb100000 \
+        -s ramdisk_addr_r a4000000 \
+        -s bootcmd "sysboot mmc 0:$pn any bf000000 /$BL_CONF"
+}
+
+main()
+{
+    while getopts ":p:i:" opt; do
+        case "$opt" in
+        p) PKG=$OPTARG; ;;
+        i) ACTION=INSTALL; ;;
+        *) true; ;;
+        esac
+    done
+
+    if [ "$PKG" = "" -o "$ACTION" != "INSTALL" ]; then
+        fatal "Needs -p filename -i all"
+    fi
+
+    tar xf $PKG MANIFEST
+
+    check_running_goldfw
+    check_package
+    # get_install_mode
+    install_mode=DATA_KEEP
+    check_existing_parts
+    if [ $install_mode = DATA_KEEP -a $REPART_NEEDED -eq 1 -a $data_pn -ne 0 ]; then
+        save_data
+    fi
+    setup_partitions
+    if [ $install_mode = DATA_KEEP -a $REPART_NEEDED -eq 1 ]; then
+        restore_data
+    fi
+    install_root_filesystem
+    set_boot_command
+    echo "==> Installation complete"
+}
+
+main "$@"
diff --git a/installer/install.sh b/installer/install.sh
index 4d8ad75a1..0b03cf98f 100755
--- a/installer/install.sh
+++ b/installer/install.sh
@@ -218,9 +218,9 @@ fi
 # Decompress the file for the file system directly to the partition
 if [ x"$docker_inram" = x"on" ]; then
     # when disk is small, keep dockerfs.tar.gz in disk, expand it into ramfs during initrd
-    unzip -o $ONIE_INSTALLER_PAYLOAD -x "platform.tar.gz" -d $demo_mnt/$image_dir
+    unzip -o $INSTALLER_PAYLOAD -x "platform.tar.gz" -d $demo_mnt/$image_dir
 else
-    unzip -o $ONIE_INSTALLER_PAYLOAD -x "$FILESYSTEM_DOCKERFS" "platform.tar.gz" -d $demo_mnt/$image_dir
+    unzip -o $INSTALLER_PAYLOAD -x "$FILESYSTEM_DOCKERFS" "platform.tar.gz" -d $demo_mnt/$image_dir
 
     if [ "$install_env" = "onie" ]; then
         TAR_EXTRA_OPTION="--numeric-owner"
@@ -228,11 +228,11 @@ else
         TAR_EXTRA_OPTION="--numeric-owner --warning=no-timestamp"
     fi
     mkdir -p $demo_mnt/$image_dir/$DOCKERFS_DIR
-    unzip -op $ONIE_INSTALLER_PAYLOAD "$FILESYSTEM_DOCKERFS" | tar xz $TAR_EXTRA_OPTION -f - -C $demo_mnt/$image_dir/$DOCKERFS_DIR
+    unzip -op $INSTALLER_PAYLOAD "$FILESYSTEM_DOCKERFS" | tar xz $TAR_EXTRA_OPTION -f - -C $demo_mnt/$image_dir/$DOCKERFS_DIR
 fi
 
 mkdir -p $demo_mnt/$image_dir/platform
-unzip -op $ONIE_INSTALLER_PAYLOAD "platform.tar.gz" | tar xz $TAR_EXTRA_OPTION -f - -C $demo_mnt/$image_dir/platform
+unzip -op $INSTALLER_PAYLOAD "platform.tar.gz" | tar xz $TAR_EXTRA_OPTION -f - -C $demo_mnt/$image_dir/platform
 
 if [ "$install_env" = "onie" ]; then
     # Store machine description in target file system
diff --git a/onie-image-arm64.conf b/onie-image-arm64.conf
index 95dcd9ec1..b8a199c70 100644
--- a/onie-image-arm64.conf
+++ b/onie-image-arm64.conf
@@ -19,7 +19,7 @@ FILESYSTEM_ROOT=./fsroot-${TARGET_MACHINE}
 FILESYSTEM_SQUASHFS=fs.squashfs
 
 ## Filename for onie installer payload, will be the main part of onie installer
-ONIE_INSTALLER_PAYLOAD=fs.zip
+INSTALLER_PAYLOAD=fs.zip
 
 ## Filename for docker file system
 FILESYSTEM_DOCKERFS=dockerfs.tar.gz
@@ -50,3 +50,6 @@ OUTPUT_ABOOT_IMAGE=target/sonic-aboot-$TARGET_MACHINE.swi
 
 ## Aboot boot image name
 ABOOT_BOOT_IMAGE=.sonic-boot.swi
+
+## Output file name for dsc installer
+OUTPUT_DSC_IMAGE=target/sonic-$TARGET_MACHINE.tar
diff --git a/onie-image-armhf.conf b/onie-image-armhf.conf
index 69b08fac1..2672187d9 100644
--- a/onie-image-armhf.conf
+++ b/onie-image-armhf.conf
@@ -19,7 +19,7 @@ FILESYSTEM_ROOT=./fsroot-${TARGET_MACHINE}
 FILESYSTEM_SQUASHFS=fs.squashfs
 
 ## Filename for onie installer payload, will be the main part of onie installer
-ONIE_INSTALLER_PAYLOAD=fs.zip
+INSTALLER_PAYLOAD=fs.zip
 
 ## Filename for docker file system
 FILESYSTEM_DOCKERFS=dockerfs.tar.gz
diff --git a/onie-image.conf b/onie-image.conf
index b0e2796a8..c61008f7f 100644
--- a/onie-image.conf
+++ b/onie-image.conf
@@ -19,7 +19,7 @@ FILESYSTEM_ROOT=./fsroot-${TARGET_MACHINE}
 FILESYSTEM_SQUASHFS=fs.squashfs
 
 ## Filename for onie installer payload, will be the main part of onie installer
-ONIE_INSTALLER_PAYLOAD=fs.zip
+INSTALLER_PAYLOAD=fs.zip
 
 ## Filename for docker file system
 FILESYSTEM_DOCKERFS=dockerfs.tar.gz
@@ -56,3 +56,6 @@ OUTPUT_KVM_4ASIC_IMAGE=target/sonic-4asic-$TARGET_MACHINE.img
 
 ### Output file name for 6-asic kvm image
 OUTPUT_KVM_6ASIC_IMAGE=target/sonic-6asic-$TARGET_MACHINE.img
+
+## Output file name for dsc installer
+OUTPUT_DSC_IMAGE=target/sonic-$TARGET_MACHINE.tar
diff --git a/platform/pensando/docker-dpu-base.dep b/platform/pensando/docker-dpu-base.dep
new file mode 100644
index 000000000..fbc438fd3
--- /dev/null
+++ b/platform/pensando/docker-dpu-base.dep
@@ -0,0 +1,4 @@
+DEP_FILES := rules/docker-dpu-base.dep rules/docker-dpu-base.mk
+
+$(DOCKER_DPU_BASE)_CACHE_MODE  := none
+$(DOCKER_DPU_BASE)_DEP_FILES   := $(DEP_FILES)
diff --git a/platform/pensando/docker-dpu-base.mk b/platform/pensando/docker-dpu-base.mk
new file mode 100644
index 000000000..129cba00e
--- /dev/null
+++ b/platform/pensando/docker-dpu-base.mk
@@ -0,0 +1,10 @@
+# docker dpu image for load
+
+DOCKER_DPU_BASE_STEM = docker-dpu-base
+
+DOCKER_DPU_BASE = $(DOCKER_DPU_BASE_STEM).gz
+
+$(DOCKER_DPU_BASE)_URL = https://github.com/pensando/dsc-artifacts/blob/main/docker-dpu-base.gz?raw=true
+
+DOWNLOADED_DOCKER_IMAGES += $(DOCKER_DPU_BASE)
+
diff --git a/platform/pensando/docker-dpu.dep b/platform/pensando/docker-dpu.dep
new file mode 100644
index 000000000..7611a05cd
--- /dev/null
+++ b/platform/pensando/docker-dpu.dep
@@ -0,0 +1,7 @@
+DOCKER_DPU_STEM = docker-dpu
+DOCKER_DPU = $(DOCKER_DPU_STEM).gz
+DPATH       		:= $($(DOCKER_DPU)_PATH)
+DEP_FILES 		:= platform/pensando/docker-dpu.dep platform/pensando/docker-dpu.mk
+
+$(DOCKER_DPU)_CACHE_MODE  := none
+$(DOCKER_DPU)_DEP_FILES   := $(DEP_FILES)
diff --git a/platform/pensando/docker-dpu.mk b/platform/pensando/docker-dpu.mk
new file mode 100644
index 000000000..7eafdb680
--- /dev/null
+++ b/platform/pensando/docker-dpu.mk
@@ -0,0 +1,20 @@
+# docker dpu image for load
+DOCKER_DPU_STEM = docker-dpu
+
+DOCKER_DPU = $(DOCKER_DPU_STEM).gz
+
+$(DOCKER_DPU)_SQUASH = n
+$(DOCKER_DPU)_PATH = $(PLATFORM_PATH)/$(DOCKER_DPU_STEM)
+
+$(DOCKER_DPU)_LOAD_DOCKERS = $(DOCKER_DPU_BASE)
+
+SONIC_DOCKER_IMAGES += $(DOCKER_DPU)
+
+$(DOCKER_DPU)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE_BULLSEYE)
+
+$(DOCKER_DPU)_PACKAGE_NAME = dpu
+$(DOCKER_DPU)_CONTAINER_NAME = dpu
+$(DOCKER_DPU)_VERSION = 1.0.0
+
+SONIC_BULLSEYE_DOCKERS += $(DOCKER_DPU)
+SONIC_INSTALL_DOCKER_IMAGES += $(DOCKER_DPU)
diff --git a/platform/pensando/docker-dpu/Dockerfile.j2 b/platform/pensando/docker-dpu/Dockerfile.j2
new file mode 100644
index 000000000..a8e285361
--- /dev/null
+++ b/platform/pensando/docker-dpu/Dockerfile.j2
@@ -0,0 +1,2 @@
+FROM docker-dpu-base
+# SKIP_HOOK
diff --git a/platform/pensando/docker-syncd-pensando.mk b/platform/pensando/docker-syncd-pensando.mk
new file mode 100644
index 000000000..e3ba335ae
--- /dev/null
+++ b/platform/pensando/docker-syncd-pensando.mk
@@ -0,0 +1,20 @@
+# docker image for centec syncd
+
+DOCKER_SYNCD_PLATFORM_CODE = pensando
+include $(PLATFORM_PATH)/../template/docker-syncd-bullseye.mk
+
+$(DOCKER_SYNCD_BASE)_DEPENDS += $(SYNCD)
+
+$(DOCKER_SYNCD_BASE)_DBG_DEPENDS += $(SYNCD_DBG) \
+                                  $(LIBSWSSCOMMON_DBG) \
+                                  $(LIBSAIMETADATA_DBG) \
+                                  $(LIBSAIREDIS_DBG)
+
+$(DOCKER_SYNCD_BASE)_VERSION = 1.0.0
+$(DOCKER_SYNCD_BASE)_PACKAGE_NAME = syncd
+
+$(DOCKER_SYNCD_BASE)_RUN_OPT += --privileged -t
+$(DOCKER_SYNCD_BASE)_RUN_OPT += -v /host/warmboot:/var/warmboot
+$(DOCKER_SYNCD_BASE)_RUN_OPT += -v /host/machine.conf:/etc/machine.conf
+$(DOCKER_SYNCD_BASE)_RUN_OPT += -v /var/run/docker-syncd:/var/run/sswsyncd
+$(DOCKER_SYNCD_BASE)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro
diff --git a/platform/pensando/docker-syncd-pensando/Dockerfile.j2 b/platform/pensando/docker-syncd-pensando/Dockerfile.j2
new file mode 100755
index 000000000..eae830dd5
--- /dev/null
+++ b/platform/pensando/docker-syncd-pensando/Dockerfile.j2
@@ -0,0 +1,34 @@
+FROM docker-config-engine-bullseye-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}}
+
+ARG docker_container_name
+
+## Make apt-get non-interactive
+ENV DEBIAN_FRONTEND=noninteractive
+
+RUN apt-get update
+
+RUN apt-get install -y protobuf-compiler  libprotobuf-dev  libgrpc++-dev
+
+COPY \
+{% for deb in docker_syncd_pensando_debs.split(' ') -%}
+debs/{{ deb }}{{' '}}
+{%- endfor -%}
+debs/
+
+RUN dpkg -i \
+{% for deb in docker_syncd_pensando_debs.split(' ') -%}
+debs/{{ deb }}{{' '}}
+{%- endfor %}
+
+## TODO: add kmod into Depends
+RUN apt-get install -yf kmod
+
+COPY ["supervisord.conf", "/etc/supervisor/conf.d/"]
+COPY ["files/supervisor-proc-exit-listener", "/usr/bin/"]
+COPY ["critical_processes", "/etc/supervisor/"]
+
+## Clean up
+RUN apt-get clean -y; apt-get autoclean -y; apt-get autoremove -y
+RUN rm -rf /debs
+
+ENTRYPOINT ["/usr/local/bin/supervisord"]
diff --git a/platform/pensando/docker-syncd-pensando/critical_processes b/platform/pensando/docker-syncd-pensando/critical_processes
new file mode 100644
index 000000000..bdd6903c5
--- /dev/null
+++ b/platform/pensando/docker-syncd-pensando/critical_processes
@@ -0,0 +1 @@
+program:syncd
diff --git a/platform/pensando/docker-syncd-pensando/supervisord.conf b/platform/pensando/docker-syncd-pensando/supervisord.conf
new file mode 100644
index 000000000..56d8b29de
--- /dev/null
+++ b/platform/pensando/docker-syncd-pensando/supervisord.conf
@@ -0,0 +1,39 @@
+[supervisord]
+logfile_maxbytes=1MB
+logfile_backups=2
+nodaemon=true
+
+[eventlistener:dependent-startup]
+command=python3 -m supervisord_dependent_startup
+autostart=true
+autorestart=unexpected
+startretries=0
+exitcodes=0,3
+events=PROCESS_STATE
+buffer_size=1024
+
+[eventlistener:supervisor-proc-exit-listener]
+command=python3 /usr/bin/supervisor-proc-exit-listener --container-name syncd
+events=PROCESS_STATE_EXITED,PROCESS_STATE_RUNNING
+autostart=true
+autorestart=unexpected
+buffer_size=1024
+
+[program:rsyslogd]
+command=/usr/sbin/rsyslogd -n -iNONE
+priority=1
+autostart=false
+autorestart=unexpected
+stdout_logfile=syslog
+stderr_logfile=syslog
+dependent_startup=true
+
+[program:syncd]
+command=/usr/bin/syncd_start.sh
+priority=2
+autostart=false
+autorestart=false
+stdout_logfile=syslog
+stderr_logfile=syslog
+dependent_startup=true
+dependent_startup_wait_for=rsyslogd:running
diff --git a/platform/pensando/dsc-drivers.mk b/platform/pensando/dsc-drivers.mk
new file mode 100644
index 000000000..21f20e8a2
--- /dev/null
+++ b/platform/pensando/dsc-drivers.mk
@@ -0,0 +1,9 @@
+# Pensando Elba kernel modules
+
+IONIC_MODULE_VERSION = 22.11.1-001
+
+IONIC_MODULE = ionic-modules_$(IONIC_MODULE_VERSION)_arm64.deb
+$(IONIC_MODULE)_SRC_PATH = $(PLATFORM_PATH)/dsc-drivers
+$(IONIC_MODULE)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON)
+$(IONIC_MODULE)_MACHINE = pensando
+SONIC_DPKG_DEBS += $(IONIC_MODULE)
diff --git a/platform/pensando/dsc-drivers/debian/changelog b/platform/pensando/dsc-drivers/debian/changelog
new file mode 100644
index 000000000..29adf1ddf
--- /dev/null
+++ b/platform/pensando/dsc-drivers/debian/changelog
@@ -0,0 +1,5 @@
+ionic (22.11.1-001) unstable; urgency=medium
+
+  * Initial packaging
+
+ -- Guohan Lu <lguohan@gmail.com>  Tue, 19 APR 2022 12:30:00 +0000
diff --git a/platform/pensando/dsc-drivers/debian/compat b/platform/pensando/dsc-drivers/debian/compat
new file mode 100644
index 000000000..f599e28b8
--- /dev/null
+++ b/platform/pensando/dsc-drivers/debian/compat
@@ -0,0 +1 @@
+10
diff --git a/platform/pensando/dsc-drivers/debian/control b/platform/pensando/dsc-drivers/debian/control
new file mode 100644
index 000000000..342424ccb
--- /dev/null
+++ b/platform/pensando/dsc-drivers/debian/control
@@ -0,0 +1,14 @@
+Source: ionic
+Section: main
+Priority: extra
+Maintainer: Shantanu Shrivastava <shanshri@amd.com>
+Build-Depends: debhelper (>= 8.0.0), bzip2
+Standards-Version: 3.9.3
+#Vcs-Git: git://git.debian.org/collab-maint/bcmsdk.git
+#Vcs-Browser: http://git.debian.org/?p=collab-maint/bcmsdk.git;a=summary
+
+Package: ionic-modules
+Architecture: arm64
+Section: main
+Depends: linux-image-6.1.0-11-2-arm64-unsigned
+Description: kernel modules for pensando elba
diff --git a/platform/pensando/dsc-drivers/debian/ionic-modules.install b/platform/pensando/dsc-drivers/debian/ionic-modules.install
new file mode 100644
index 000000000..cad27cea2
--- /dev/null
+++ b/platform/pensando/dsc-drivers/debian/ionic-modules.install
@@ -0,0 +1,4 @@
+src/drivers/linux/build/mdev.ko lib/modules/6.1.0-11-2-arm64/extra
+src/drivers/linux/build/mnet_uio_pdrv_genirq.ko lib/modules/6.1.0-11-2-arm64/extra
+src/drivers/linux/build/ionic_mnic.ko lib/modules/6.1.0-11-2-arm64/extra
+systemd/ionic-modules.service lib/systemd/system
diff --git a/platform/pensando/dsc-drivers/debian/rules b/platform/pensando/dsc-drivers/debian/rules
new file mode 100755
index 000000000..5db1096c2
--- /dev/null
+++ b/platform/pensando/dsc-drivers/debian/rules
@@ -0,0 +1,65 @@
+#!/usr/bin/make -f
+# -*- makefile -*-
+# Sample debian/rules that uses debhelper.
+# This file was originally written by Joey Hess and Craig Small.
+# As a special exception, when this file is copied by dh-make into a
+# dh-make output file, you may use that output file without restriction.
+# This special exception was added by Craig Small in version 0.37 of dh-make.
+
+include /usr/share/dpkg/pkg-info.mk
+
+# Uncomment this to turn on verbose mode.
+#export DH_VERBOSE=1
+
+export INSTALL_MOD_DIR:=extra
+
+PACKAGE_PRE_NAME := ionic-modules
+KVERSION   ?= $(shell uname -r)
+KERNEL_SRC :=  /lib/modules/$(KVERSION)
+MOD_SRC_DIR:= $(shell pwd)
+
+%:
+	dh $@
+
+clean:
+	dh_testdir
+	dh_testroot
+	dh_clean
+	ARCH=aarch64 KSRC=/lib/modules/$(KVERSION)/build KMOD_OUT_DIR=$(CURDIR)/src/drivers/linux/build KMOD_SRC_DIR=$(CURDIR)/src/drivers/linux make -C $(CURDIR)/src/drivers/linux clean
+
+build:
+	ARCH=aarch64 KSRC=/lib/modules/$(KVERSION)/build KMOD_OUT_DIR=$(CURDIR)/src/drivers/linux/build KMOD_SRC_DIR=$(CURDIR)/src/drivers/linux make -C $(CURDIR)/src/drivers/linux
+
+binary: binary-arch binary-indep
+	# Nothing to do
+
+binary-arch:
+	# Nothing to do
+
+#install: build
+	#dh_testdir
+	#dh_testroot
+	#dh_clean -k
+	#dh_installdirs
+
+binary-indep:
+	dh_testdir
+	dh_installdirs
+
+	# Resuming debhelper scripts
+	dh_testroot
+	dh_install
+	dh_installchangelogs
+	dh_installdocs
+	dh_systemd_enable
+	dh_installinit
+	dh_systemd_start
+	dh_link
+	dh_fixperms
+	dh_compress
+	dh_strip
+	dh_installdeb
+	dh_gencontrol
+	dh_md5sums
+	dh_builddeb
+.PHONY: build binary binary-arch binary-indep clean
diff --git a/platform/pensando/dsc-drivers/src/README.md b/platform/pensando/dsc-drivers/src/README.md
new file mode 100644
index 000000000..c9ca9e37c
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/README.md
@@ -0,0 +1,167 @@
+# dsc-drivers
+
+## Overview
+
+This directory holds the three drivers that are used for device support
+inside the Pensando DSC: ionic/ionic_mnic, mnet, and mnet_uio_pdrv_genirq.
+These are all out-of-tree drivers, not used in the standard kernel tree.
+However, a variant of the ionic driver is in the upstream kernel, but does
+not support the internal DSC platform.
+
+When building for the host, only the "ionic" driver is built,
+and uses ionic_bus_pci.c.  In tandem with the kconfig files, this
+driver can be built on a number of different Linux distributions and
+kernel versions.  When building for the DSC, "ionic_mnic" is built, with
+ionic_bus_platform.c, along with mnet and mnet_uio_pdrv_genirq drivers.
+The mnet and mnet_uio_pdrv_genirq drivers are only built on the DSC
+Linux kernel, so don't make use of the kcompat facilities.
+
+In the DSC build the driver .ko files are found in /platform/drivers,
+and are loaded by /nic/tools/sysinit.sh.  Later, the nicmgr process reads
+its device description file, e.g. /platform/etc/nicmgrd/device.json,
+to determine what network interface ports are to be created.  It then uses
+ioctl() calls into the mnet driver to instantiate those network interfaces.
+
+## Drivers
+
+drivers/common:
+	API description files for communication between drivers
+	and the DSC.
+
+drivers/linux/eth/ionic:
+	Driver that supports standard network interface ports.
+
+drivers/linux/mnet:
+	Driver that listens for ioctl() commands from userland to start
+	and stop the network interface ports.
+
+drivers/linux/mnet_uio_pdrv_genirq:
+	UIO interface driver for supporting userspace I/O platform drivers.
+
+## Building
+
+The Makefile in drivers/linux will build all three drivers when
+ARCH=aarch64, else will build the host version of ionic.  Simply cd to
+the drivers/linux directory and type 'make'.
+
+Well, okay maybe not that simple any more - it should be, but some things
+changed in the makefiles internally, and it's a little more complex.  Also,
+we wanted to keep this archive closer to what is used internally.
+
+If the headers for your current Linux kernel are findable under
+/lib/modules with kernel config values defined, this should work:
+    make M=`pwd` KCFLAGS="-Werror -Ddrv_ver=\\\"1.15.9.7\\\"" modules
+
+If the kernel config file doesn't have the Pensando configuration strings
+set in it, you can add them in the make line.
+
+For Naples drivers:
+    make M=`pwd` KCFLAGS="-Werror -Ddrv_ver=\\\"1.15.9.7\\\"" CONFIG_IONIC_MNIC=m CONFIG_MDEV=m CONFIG_MNET_UIO_PDRV_GENIRQ=m modules
+
+For the host driver:
+    make M=`pwd` KCFLAGS="-Werror -Ddrv_ver=\\\"1.15.9.7\\\"" CONFIG_IONIC=m modules
+
+As usual, if the Linux headers are elsewhere, add the appropriate -C magic:
+    make -C <kernel-header-path> M=`pwd` ...
+
+## History
+
+2020-07-07 - initial drivers using 1.8.0-E-48
+
+2021-01-08 - driver updates to 1.15.3-C-14
+ - FW update fixes
+ - Makefile cleanups
+ - Add support for choosing individual Tx and Rx interrupts rather than paired
+ - Fix memory leaks and timing issues
+ - Kcompat fixes for newer upstream and Red Hat kernels
+ - Add interrupt affinity option for mnic_ionic use
+ - Other optimizations and stability fixes
+
+2021-02-02 - driver updates to 1.15.4-C-8
+ - Added support for PTP
+ - Dropped support for macvlan offload
+ - Cleaned some 'sparse' complaints
+ - Add support for devlink firmware update
+ - Dynamic interrupt coalescing
+ - Add support for separate Tx interrupts
+ - Rework queue reconfiguration for better memory handling
+ - Reorder some configuration steps to remove race conditions
+ - Changes to napi handling for better performance
+
+2021-02-24 - driver updates to 1.15.5-C-4
+ - Add weak links for PTP api for compile and load on DSC kernel without PTP support
+ - Don't set up PTP in ionic_mnic if PTP bar is not available
+ - Closed a small window to prevent starting queues when in FW reset
+ - Other small bug fixes to PTP support
+ - Compat fixes for compiling on Linux v5.11
+ - Guard against adminq use after free
+
+2021-03-29 - driver updates to 1.15.6-C-8
+ - better error case handling
+ - bug fixes for PTP support and error handling
+ - clean up mnet code to upstream code format standards
+ - updates for compiling under v5.10
+
+2021-04-30 - driver updates to 1.15.7-C-3
+ - Copyright updates
+ - Minor code cleanups to better match upstream drivers
+ - Renamed mnet to mdev to be more generic
+ - Added support in mdev for future mcrypt devices
+
+2021-05-19 - driver updates to 1.15.8-C-12
+ - added support for cmb-rings - Tx/Rx descriptor rings allocated in
+   DSC Controller Memory Buffers rather than on host
+ - rx_mode locking to block thread race
+ - struct ionic_lif rework for better cache line layout
+
+2021-06-30 - driver updates for 1.15.9-C-7
+ - monitoring fw status generation for fw restart hints
+ - catch lack of PTP support earlier in service routine
+ - makefile fixes for sles 15 sp3
+ - lower page splitting limit to better account for headers
+ - VF stats area fix for PF
+ - better thread-safe rx_mode work
+
+    drivers: updates for 1.15.9.21
+    
+2021-08-04 - driver updates for 1.15.9-C-21
+ - Added watchdog to platform for closer tracking of FW updates
+   and crash recycle
+ - Fixed dynamic interrupt management accounting
+ - Fixes for mac filter management
+
+2021-08-16 - driver updates for 1.15.9-C-26
+ - Add work-around for Elba doorbell issue
+
+2021-08-19 - driver updates for 1.15.9-C-28
+ - Additional queue config locking for stress timing issue
+ - Suppressed unnecessary log message
+
+2021-08-25 - driver update for 1.15.9-C-32
+ - added use of reserved memory region for dma
+
+2022-02-02 - driver update for 1.15.9-C-64
+ - Remove an unnecessary kcompat macro
+
+2022-02-03 - driver update for 1.15.9-C-65
+ - add vlan filter management to mac filter management
+ - update filter management for handling overflow
+ - updates for recent upstream kernels and distros
+ - better handling of various FW recovery scenarios
+
+2022-06-20 - driver update for 1.15.9-C-100
+ - various code cleanups
+ - add debugfs support to count number of Tx/Rx allocations
+ - better memory handling
+ - minor bug fixes
+
+2022-12-05 - driver update for 22.11.1-001
+ - update ionic drivers to 22.11.1-001; version numbers now follow
+   the driver release numbers rather than the DSC firmware release version
+ - enable tunnel offloads
+ - support for changes in MTU, queue count, and ring length while CMB is active
+ - set random VF mac addresses by default
+ - better oprom debugging support
+ - Rx/Tx performance tuning
+ - fixes imported from upstream driver
+ - bug fixes
diff --git a/platform/pensando/dsc-drivers/src/drivers/common/ionic_if.h b/platform/pensando/dsc-drivers/src/drivers/common/ionic_if.h
new file mode 100644
index 000000000..9b2f3b717
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/common/ionic_if.h
@@ -0,0 +1,3602 @@
+/* SPDX-License-Identifier: (GPL-2.0 OR Linux-OpenIB) OR BSD-2-Clause */
+/* Copyright (c) 2017 - 2021 Pensando Systems, Inc.  All rights reserved. */
+
+#ifndef _IONIC_IF_H_
+#define _IONIC_IF_H_
+
+#define IONIC_DEV_INFO_SIGNATURE		0x44455649      /* 'DEVI' */
+#define IONIC_DEV_INFO_VERSION			1
+#define IONIC_IFNAMSIZ				16
+
+#ifdef __CHECKER__
+#define IONIC_CHECK_CMD_LENGTH(X)
+#define IONIC_CHECK_COMP_LENGTH(X)
+#define IONIC_CHECK_CMD_DATA_LENGTH(X)
+#define IONIC_CHECK_OPROM_LENGTH(X)
+#define IONIC_CHECK_DEV_INFO_REGS_LENGTH(X)
+#else
+#define IONIC_SIZE_CHECK(type, N, X)		enum ionic_static_assert_enum_##X \
+		{ ionic_static_assert_##X = (N) / (sizeof(type X) == (N)) }
+#define IONIC_CHECK_CMD_LENGTH(X)		IONIC_SIZE_CHECK(struct, 64, X)
+#define IONIC_CHECK_COMP_LENGTH(X)  		IONIC_SIZE_CHECK(struct, 16, X)
+#define IONIC_CHECK_CMD_DATA_LENGTH(X)      	IONIC_SIZE_CHECK(union, 1912, X)
+#define IONIC_CHECK_OPROM_LENGTH(X)		IONIC_SIZE_CHECK(struct, 32, X)
+#define IONIC_CHECK_DEV_INFO_REGS_LENGTH(X)     IONIC_SIZE_CHECK(union, 2048, X)
+#endif
+
+/**
+ * enum ionic_cmd_opcode - Device commands
+ */
+enum ionic_cmd_opcode {
+	IONIC_CMD_NOP				= 0,
+
+	/* Device commands */
+	IONIC_CMD_IDENTIFY			= 1,
+	IONIC_CMD_INIT				= 2,
+	IONIC_CMD_RESET				= 3,
+	IONIC_CMD_GETATTR			= 4,
+	IONIC_CMD_SETATTR			= 5,
+	IONIC_CMD_DEBUG				= 6,
+
+	/* Port commands */
+	IONIC_CMD_PORT_IDENTIFY			= 10,
+	IONIC_CMD_PORT_INIT			= 11,
+	IONIC_CMD_PORT_RESET			= 12,
+	IONIC_CMD_PORT_GETATTR			= 13,
+	IONIC_CMD_PORT_SETATTR			= 14,
+
+	/* LIF commands */
+	IONIC_CMD_LIF_IDENTIFY			= 20,
+	IONIC_CMD_LIF_INIT			= 21,
+	IONIC_CMD_LIF_RESET			= 22,
+	IONIC_CMD_LIF_GETATTR			= 23,
+	IONIC_CMD_LIF_SETATTR			= 24,
+	IONIC_CMD_LIF_SETPHC			= 25,
+
+	IONIC_CMD_RX_MODE_SET			= 30,
+	IONIC_CMD_RX_FILTER_ADD			= 31,
+	IONIC_CMD_RX_FILTER_DEL			= 32,
+
+	/* Queue commands */
+	IONIC_CMD_Q_IDENTIFY			= 39,
+	IONIC_CMD_Q_INIT			= 40,
+	IONIC_CMD_Q_CONTROL			= 41,
+
+	/* RDMA commands */
+	IONIC_CMD_RDMA_RESET_LIF		= 50,
+	IONIC_CMD_RDMA_CREATE_EQ		= 51,
+	IONIC_CMD_RDMA_CREATE_CQ		= 52,
+	IONIC_CMD_RDMA_CREATE_ADMINQ		= 53,
+
+	/* SR/IOV commands */
+	IONIC_CMD_VF_GETATTR			= 60,
+	IONIC_CMD_VF_SETATTR			= 61,
+	IONIC_CMD_VF_CTRL			= 62,
+
+	/* UPT command */
+	IONIC_CMD_UPT_MESSAGE			= 100,
+
+	/* UEFI HII commands */
+	IONIC_CMD_HII_IDENTIFY			= 235,
+	IONIC_CMD_HII_GETATTR			= 236,
+	IONIC_CMD_HII_SETATTR			= 237,
+	IONIC_CMD_HII_INIT			= 238,
+	IONIC_CMD_HII_RESET			= 239,
+
+	/* QoS commands */
+	IONIC_CMD_QOS_CLASS_IDENTIFY		= 240,
+	IONIC_CMD_QOS_CLASS_INIT		= 241,
+	IONIC_CMD_QOS_CLASS_RESET		= 242,
+	IONIC_CMD_QOS_CLASS_UPDATE		= 243,
+	IONIC_CMD_QOS_CLEAR_STATS		= 244,
+	IONIC_CMD_QOS_RESET			= 245,
+
+	/* Firmware commands */
+	IONIC_CMD_FW_DOWNLOAD                   = 252,
+	IONIC_CMD_FW_CONTROL                    = 253,
+	IONIC_CMD_FW_DOWNLOAD_V1		= 254,
+	IONIC_CMD_FW_CONTROL_V1		        = 255,
+};
+
+/**
+ * enum ionic_status_code - Device command return codes
+ */
+enum ionic_status_code {
+	IONIC_RC_SUCCESS	= 0,	/* Success */
+	IONIC_RC_EVERSION	= 1,	/* Incorrect version for request */
+	IONIC_RC_EOPCODE	= 2,	/* Invalid cmd opcode */
+	IONIC_RC_EIO		= 3,	/* I/O error */
+	IONIC_RC_EPERM		= 4,	/* Permission denied */
+	IONIC_RC_EQID		= 5,	/* Bad qid */
+	IONIC_RC_EQTYPE		= 6,	/* Bad qtype */
+	IONIC_RC_ENOENT		= 7,	/* No such element */
+	IONIC_RC_EINTR		= 8,	/* operation interrupted */
+	IONIC_RC_EAGAIN		= 9,	/* Try again */
+	IONIC_RC_ENOMEM		= 10,	/* Out of memory */
+	IONIC_RC_EFAULT		= 11,	/* Bad address */
+	IONIC_RC_EBUSY		= 12,	/* Device or resource busy */
+	IONIC_RC_EEXIST		= 13,	/* object already exists */
+	IONIC_RC_EINVAL		= 14,	/* Invalid argument */
+	IONIC_RC_ENOSPC		= 15,	/* No space left or alloc failure */
+	IONIC_RC_ERANGE		= 16,	/* Parameter out of range */
+	IONIC_RC_BAD_ADDR	= 17,	/* Descriptor contains a bad ptr */
+	IONIC_RC_DEV_CMD	= 18,	/* Device cmd attempted on AdminQ */
+	IONIC_RC_ENOSUPP	= 19,	/* Operation not supported */
+	IONIC_RC_ERROR		= 29,	/* Generic error */
+	IONIC_RC_ERDMA		= 30,	/* Generic RDMA error */
+	IONIC_RC_EVFID		= 31,	/* VF ID does not exist */
+	IONIC_RC_BAD_FW		= 32,	/* FW file is invalid or corrupted */
+};
+
+enum ionic_notifyq_opcode {
+	IONIC_EVENT_LINK_CHANGE		= 1,
+	IONIC_EVENT_RESET		= 2,
+	IONIC_EVENT_HEARTBEAT		= 3,
+	IONIC_EVENT_LOG			= 4,
+	IONIC_EVENT_XCVR		= 5,
+};
+
+/**
+ * struct ionic_upt_cmd - command format for all UPT commands
+ * @opcode:         Opcode for the command
+ * @vf_index:       VF Index.
+ * @upt_cmd_data:   UPT specific command bytes
+ */
+
+struct ionic_upt_cmd {
+       u8         opcode;
+       u8         rsvd;
+       __le16     vf_index;
+       u8         rsvd1[4];
+       u8         upt_cmd_data[56];
+};
+IONIC_CHECK_CMD_LENGTH(ionic_upt_cmd);
+
+/**
+ * struct ionic_upt_comp - UPT command completion.
+ * @status:     Status of the command (enum ionic_status_code)
+ */
+struct ionic_upt_comp {
+       u8         status;
+       u8         rsvd[15];
+};
+IONIC_CHECK_COMP_LENGTH(ionic_upt_comp);
+
+/**
+ * struct ionic_admin_cmd - General admin command format
+ * @opcode:     Opcode for the command
+ * @lif_index:  LIF index
+ * @cmd_data:   Opcode-specific command bytes
+ */
+struct ionic_admin_cmd {
+	u8     opcode;
+	u8     rsvd;
+	__le16 lif_index;
+	u8     cmd_data[60];
+};
+
+/**
+ * struct ionic_admin_comp - General admin command completion format
+ * @status:     Status of the command (enum ionic_status_code)
+ * @comp_index: Index in the descriptor ring for which this is the completion
+ * @cmd_data:   Command-specific bytes
+ * @color:      Color bit (Always 0 for commands issued to the
+ *              Device Cmd Registers)
+ */
+struct ionic_admin_comp {
+	u8     status;
+	u8     rsvd;
+	__le16 comp_index;
+	u8     cmd_data[11];
+	u8     color;
+#define IONIC_COMP_COLOR_MASK  0x80
+};
+
+static inline u8 color_match(u8 color, u8 done_color)
+{
+	return (!!(color & IONIC_COMP_COLOR_MASK)) == done_color;
+}
+
+/**
+ * struct ionic_nop_cmd - NOP command
+ * @opcode: opcode
+ */
+struct ionic_nop_cmd {
+	u8 opcode;
+	u8 rsvd[63];
+};
+
+/**
+ * struct ionic_nop_comp - NOP command completion
+ * @status: Status of the command (enum ionic_status_code)
+ */
+struct ionic_nop_comp {
+	u8 status;
+	u8 rsvd[15];
+};
+
+/**
+ * struct ionic_dev_init_cmd - Device init command
+ * @opcode:    opcode
+ * @type:      Device type
+ */
+struct ionic_dev_init_cmd {
+	u8     opcode;
+	u8     type;
+	u8     rsvd[62];
+};
+
+/**
+ * struct ionic_dev_init_comp - Device init command completion
+ * @status: Status of the command (enum ionic_status_code)
+ */
+struct ionic_dev_init_comp {
+	u8 status;
+	u8 rsvd[15];
+};
+
+/**
+ * struct ionic_dev_reset_cmd - Device reset command
+ * @opcode: opcode
+ */
+struct ionic_dev_reset_cmd {
+	u8 opcode;
+	u8 rsvd[63];
+};
+
+/**
+ * struct ionic_dev_reset_comp - Reset command completion
+ * @status: Status of the command (enum ionic_status_code)
+ */
+struct ionic_dev_reset_comp {
+	u8 status;
+	u8 rsvd[15];
+};
+
+#define IONIC_IDENTITY_VERSION_1	1
+#define IONIC_DEV_IDENTITY_VERSION_1	IONIC_IDENTITY_VERSION_1
+#define IONIC_DEV_IDENTITY_VERSION_2	(IONIC_DEV_IDENTITY_VERSION_1 + 1)
+
+/**
+ * struct ionic_dev_identify_cmd - Driver/device identify command
+ * @opcode:  opcode
+ * @ver:     Highest version of identify supported by driver
+ */
+struct ionic_dev_identify_cmd {
+	u8 opcode;
+	u8 ver;
+	u8 rsvd[62];
+};
+
+/**
+ * struct ionic_dev_identify_comp - Driver/device identify command completion
+ * @status: Status of the command (enum ionic_status_code)
+ * @ver:    Version of identify returned by device
+ */
+struct ionic_dev_identify_comp {
+	u8 status;
+	u8 ver;
+	u8 rsvd[14];
+};
+
+enum ionic_debug_type {
+	IONIC_DEBUG_TYPE_MSG   = 1,
+};
+/**
+ * struct ionic_dev_debug_cmd - Driver/device debug command
+ * @opcode:  opcode
+ * @type:    debug_type (enum ionic_debug_type)
+ */
+struct ionic_dev_debug_cmd {
+	u8 opcode;
+	u8 debug_type;
+	u8 rsvd[62];
+};
+IONIC_CHECK_CMD_LENGTH(ionic_dev_debug_cmd);
+
+/**
+ * struct ionic_dev_debug_comp - Driver/device debug command completion
+ * @status: Status of the command (enum ionic_status_code)
+ */
+struct ionic_dev_debug_comp {
+	u8 status;
+	u8 rsvd[15];
+};
+IONIC_CHECK_COMP_LENGTH(ionic_dev_debug_comp);
+
+enum ionic_os_type {
+	IONIC_OS_TYPE_LINUX   = 1,
+	IONIC_OS_TYPE_WIN     = 2,
+	IONIC_OS_TYPE_DPDK    = 3,
+	IONIC_OS_TYPE_FREEBSD = 4,
+	IONIC_OS_TYPE_IPXE    = 5,
+	IONIC_OS_TYPE_ESXI    = 6,
+};
+
+/**
+ * union ionic_drv_identity - driver identity information
+ * @os_type:          OS type (see enum ionic_os_type)
+ * @os_dist:          OS distribution, numeric format
+ * @os_dist_str:      OS distribution, string format
+ * @kernel_ver:       Kernel version, numeric format
+ * @kernel_ver_str:   Kernel version, string format
+ * @driver_ver_str:   Driver version, string format
+ */
+union ionic_drv_identity {
+	struct {
+		__le32 os_type;
+		__le32 os_dist;
+		char   os_dist_str[128];
+		__le32 kernel_ver;
+		char   kernel_ver_str[32];
+		char   driver_ver_str[32];
+	};
+	__le32 words[478];
+};
+
+/**
+ * enum ionic_dev_capability - Device capabilities
+ * @IONIC_DEV_CAP_VF_CTRL:     Device supports VF ctrl operations
+ */
+enum ionic_dev_capability {
+	IONIC_DEV_CAP_VF_CTRL        = BIT(0),
+};
+
+/**
+ * union ionic_dev_identity - device identity information
+ * @version:          Version of device identify
+ * @type:             Identify type (0 for now)
+ * @nports:           Number of ports provisioned
+ * @nlifs:            Number of LIFs provisioned
+ * @nintrs:           Number of interrupts provisioned
+ * @ndbpgs_per_lif:   Number of doorbell pages per LIF
+ * @intr_coal_mult:   Interrupt coalescing multiplication factor
+ *                    Scale user-supplied interrupt coalescing
+ *                    value in usecs to device units using:
+ *                    device units = usecs * mult / div
+ * @intr_coal_div:    Interrupt coalescing division factor
+ *                    Scale user-supplied interrupt coalescing
+ *                    value in usecs to device units using:
+ *                    device units = usecs * mult / div
+ * @eq_count:         Number of shared event queues
+ * @hwstamp_mask:     Bitmask for subtraction of hardware tick values.
+ * @hwstamp_mult:     Hardware tick to nanosecond multiplier.
+ * @hwstamp_shift:    Hardware tick to nanosecond divisor (power of two).
+ * @capabilities:     Device capabilities
+ */
+union ionic_dev_identity {
+	struct {
+		u8     version;
+		u8     type;
+		u8     rsvd[2];
+		u8     nports;
+		u8     rsvd2[3];
+		__le32 nlifs;
+		__le32 nintrs;
+		__le32 ndbpgs_per_lif;
+		__le32 intr_coal_mult;
+		__le32 intr_coal_div;
+		__le32 eq_count;
+		__le64 hwstamp_mask;
+		__le32 hwstamp_mult;
+		__le32 hwstamp_shift;
+		__le64 capabilities;
+	};
+	__le32 words[478];
+};
+
+enum ionic_lif_type {
+	IONIC_LIF_TYPE_CLASSIC = 0,
+	IONIC_LIF_TYPE_MACVLAN = 1,
+	IONIC_LIF_TYPE_NETQUEUE = 2,
+};
+
+#define IONIC_LIF_IDENTITY_VERSION_1	IONIC_DEV_IDENTITY_VERSION_1
+
+/**
+ * struct ionic_lif_identify_cmd - LIF identify command
+ * @opcode:  opcode
+ * @type:    LIF type (enum ionic_lif_type)
+ * @ver:     Version of identify returned by device
+ */
+struct ionic_lif_identify_cmd {
+	u8 opcode;
+	u8 type;
+	u8 ver;
+	u8 rsvd[61];
+};
+
+/**
+ * struct ionic_lif_identify_comp - LIF identify command completion
+ * @status:  Status of the command (enum ionic_status_code)
+ * @ver:     Version of identify returned by device
+ */
+struct ionic_lif_identify_comp {
+	u8 status;
+	u8 ver;
+	u8 rsvd2[14];
+};
+
+/**
+ * enum ionic_lif_capability - LIF capabilities
+ * @IONIC_LIF_CAP_ETH:     LIF supports Ethernet
+ * @IONIC_LIF_CAP_RDMA:    LIF supports RDMA
+ */
+enum ionic_lif_capability {
+	IONIC_LIF_CAP_ETH        = BIT(0),
+	IONIC_LIF_CAP_RDMA       = BIT(1),
+};
+
+/**
+ * enum ionic_logical_qtype - Logical Queue Types
+ * @IONIC_QTYPE_ADMINQ:    Administrative Queue
+ * @IONIC_QTYPE_NOTIFYQ:   Notify Queue
+ * @IONIC_QTYPE_RXQ:       Receive Queue
+ * @IONIC_QTYPE_TXQ:       Transmit Queue
+ * @IONIC_QTYPE_EQ:        Event Queue
+ * @IONIC_QTYPE_MAX:       Max queue type supported
+ */
+enum ionic_logical_qtype {
+	IONIC_QTYPE_ADMINQ  = 0,
+	IONIC_QTYPE_NOTIFYQ = 1,
+	IONIC_QTYPE_RXQ     = 2,
+	IONIC_QTYPE_TXQ     = 3,
+	IONIC_QTYPE_EQ      = 4,
+	IONIC_QTYPE_MAX     = 16,
+};
+
+/**
+ * enum ionic_q_feature - Common Features for most queue types
+ *
+ * Common features use bits 0-15. Per-queue-type features use higher bits.
+ *
+ * @IONIC_QIDENT_F_CQ:      Queue has completion ring
+ * @IONIC_QIDENT_F_SG:      Queue has scatter/gather ring
+ * @IONIC_QIDENT_F_EQ:      Queue can use event queue
+ * @IONIC_QIDENT_F_CMB:     Queue is in cmb bar
+ * @IONIC_Q_F_2X_DESC:      Double main descriptor size
+ * @IONIC_Q_F_2X_CQ_DESC:   Double cq descriptor size
+ * @IONIC_Q_F_2X_SG_DESC:   Double sg descriptor size
+ * @IONIC_Q_F_4X_DESC:      Quadruple main descriptor size
+ * @IONIC_Q_F_4X_CQ_DESC:   Quadruple cq descriptor size
+ * @IONIC_Q_F_4X_SG_DESC:   Quadruple sg descriptor size
+ */
+enum ionic_q_feature {
+	IONIC_QIDENT_F_CQ		= BIT_ULL(0),
+	IONIC_QIDENT_F_SG		= BIT_ULL(1),
+	IONIC_QIDENT_F_EQ		= BIT_ULL(2),
+	IONIC_QIDENT_F_CMB		= BIT_ULL(3),
+	IONIC_Q_F_2X_DESC		= BIT_ULL(4),
+	IONIC_Q_F_2X_CQ_DESC		= BIT_ULL(5),
+	IONIC_Q_F_2X_SG_DESC		= BIT_ULL(6),
+	IONIC_Q_F_4X_DESC		= BIT_ULL(7),
+	IONIC_Q_F_4X_CQ_DESC		= BIT_ULL(8),
+	IONIC_Q_F_4X_SG_DESC		= BIT_ULL(9),
+};
+
+/**
+ * enum ionic_rxq_feature - RXQ-specific Features
+ *
+ * Per-queue-type features use bits 16 and higher.
+ *
+ * @IONIC_RXQ_F_HWSTAMP:   Queue supports Hardware Timestamping
+ */
+enum ionic_rxq_feature {
+	IONIC_RXQ_F_HWSTAMP		= BIT_ULL(16),
+};
+
+/**
+ * enum ionic_txq_feature - TXQ-specific Features
+ *
+ * Per-queue-type features use bits 16 and higher.
+ *
+ * @IONIC_TXQ_F_HWSTAMP:   Queue supports Hardware Timestamping
+ */
+enum ionic_txq_feature {
+	IONIC_TXQ_F_HWSTAMP		= BIT_ULL(16),
+};
+
+/**
+ * struct ionic_hwstamp_bits - Hardware timestamp decoding bits
+ * @IONIC_HWSTAMP_INVALID:          Invalid hardware timestamp value
+ * @IONIC_HWSTAMP_CQ_NEGOFFSET:     Timestamp field negative offset
+ *                                  from the base cq descriptor.
+ */
+enum ionic_hwstamp_bits {
+	IONIC_HWSTAMP_INVALID	    = ~0ull,
+	IONIC_HWSTAMP_CQ_NEGOFFSET  = 8,
+};
+
+/**
+ * struct ionic_lif_logical_qtype - Descriptor of logical to HW queue type
+ * @qtype:          Hardware Queue Type
+ * @qid_count:      Number of Queue IDs of the logical type
+ * @qid_base:       Minimum Queue ID of the logical type
+ */
+struct ionic_lif_logical_qtype {
+	u8     qtype;
+	u8     rsvd[3];
+	__le32 qid_count;
+	__le32 qid_base;
+};
+
+/**
+ * enum ionic_lif_state - LIF state
+ * @IONIC_LIF_DISABLE:     LIF disabled
+ * @IONIC_LIF_ENABLE:      LIF enabled
+ * @IONIC_LIF_QUIESCE:     LIF Quiesced
+ */
+enum ionic_lif_state {
+	IONIC_LIF_QUIESCE	= 0,
+	IONIC_LIF_ENABLE	= 1,
+	IONIC_LIF_DISABLE	= 2,
+};
+
+/**
+ * union ionic_lif_config - LIF configuration
+ * @state:          LIF state (enum ionic_lif_state)
+ * @name:           LIF name
+ * @mtu:            MTU
+ * @mac:            Station MAC address
+ * @vlan:           Default Vlan ID
+ * @features:       Features (enum ionic_eth_hw_features)
+ * @queue_count:    Queue counts per queue-type
+ */
+union ionic_lif_config {
+	struct {
+		u8     state;
+		u8     rsvd[3];
+		char   name[IONIC_IFNAMSIZ];
+		__le32 mtu;
+		u8     mac[6];
+		__le16 vlan;
+		__le64 features;
+		__le32 queue_count[IONIC_QTYPE_MAX];
+	} __attribute__((packed));
+	__le32 words[64];
+};
+
+/**
+ * struct ionic_lif_identity - LIF identity information (type-specific)
+ *
+ * @capabilities:        LIF capabilities
+ *
+ * @eth:                    Ethernet identify structure
+ *     @version:            Ethernet identify structure version
+ *     @max_ucast_filters:  Number of perfect unicast addresses supported
+ *     @max_mcast_filters:  Number of perfect multicast addresses supported
+ *     @min_frame_size:     Minimum size of frames to be sent
+ *     @max_frame_size:     Maximum size of frames to be sent
+ *     @hwstamp_tx_modes:   Bitmask of BIT_ULL(enum ionic_txstamp_mode)
+ *     @hwstamp_rx_filters: Bitmask of enum ionic_pkt_class
+ *     @config:             LIF config struct with features, mtu, mac, q counts
+ *
+ * @rdma:                RDMA identify structure
+ *     @version:         RDMA version of opcodes and queue descriptors
+ *     @qp_opcodes:      Number of RDMA queue pair opcodes supported
+ *     @admin_opcodes:   Number of RDMA admin opcodes supported
+ *     @npts_per_lif:    Page table size per LIF
+ *     @nmrs_per_lif:    Number of memory regions per LIF
+ *     @nahs_per_lif:    Number of address handles per LIF
+ *     @max_stride:      Max work request stride
+ *     @cl_stride:       Cache line stride
+ *     @pte_stride:      Page table entry stride
+ *     @rrq_stride:      Remote RQ work request stride
+ *     @rsq_stride:      Remote SQ work request stride
+ *     @dcqcn_profiles:  Number of DCQCN profiles
+ *     @aq_qtype:        RDMA Admin Qtype
+ *     @sq_qtype:        RDMA Send Qtype
+ *     @rq_qtype:        RDMA Receive Qtype
+ *     @cq_qtype:        RDMA Completion Qtype
+ *     @eq_qtype:        RDMA Event Qtype
+ */
+union ionic_lif_identity {
+	struct {
+		__le64 capabilities;
+
+		struct {
+			u8 version;
+			u8 rsvd[3];
+			__le32 max_ucast_filters;
+			__le32 max_mcast_filters;
+			__le16 rss_ind_tbl_sz;
+			__le32 min_frame_size;
+			__le32 max_frame_size;
+			u8 rsvd2[2];
+			__le64 hwstamp_tx_modes;
+			__le64 hwstamp_rx_filters;
+			u8 rsvd3[88];
+			union ionic_lif_config config;
+		} __attribute__((packed)) eth;
+
+		struct {
+			u8 version;
+			u8 qp_opcodes;
+			u8 admin_opcodes;
+			u8 rsvd;
+			__le32 npts_per_lif;
+			__le32 nmrs_per_lif;
+			__le32 nahs_per_lif;
+			u8 max_stride;
+			u8 cl_stride;
+			u8 pte_stride;
+			u8 rrq_stride;
+			u8 rsq_stride;
+			u8 dcqcn_profiles;
+			u8 rsvd_dimensions[10];
+			struct ionic_lif_logical_qtype aq_qtype;
+			struct ionic_lif_logical_qtype sq_qtype;
+			struct ionic_lif_logical_qtype rq_qtype;
+			struct ionic_lif_logical_qtype cq_qtype;
+			struct ionic_lif_logical_qtype eq_qtype;
+		} __attribute__((packed)) rdma;
+	} __attribute__((packed));
+	__le32 words[478];
+};
+
+/**
+ * struct ionic_lif_init_cmd - LIF init command
+ * @opcode:       Opcode
+ * @type:         LIF type (enum ionic_lif_type)
+ * @index:        LIF index
+ * @info_pa:      Destination address for LIF info (struct ionic_lif_info)
+ */
+struct ionic_lif_init_cmd {
+	u8     opcode;
+	u8     type;
+	__le16 index;
+	__le32 rsvd;
+	__le64 info_pa;
+	u8     rsvd2[48];
+};
+
+/**
+ * struct ionic_lif_init_comp - LIF init command completion
+ * @status:	Status of the command (enum ionic_status_code)
+ * @hw_index:	Hardware index of the initialized LIF
+ */
+struct ionic_lif_init_comp {
+	u8 status;
+	u8 rsvd;
+	__le16 hw_index;
+	u8 rsvd2[12];
+};
+
+/**
+ * struct ionic_q_identify_cmd - queue identify command
+ * @opcode:     opcode
+ * @lif_type:   LIF type (enum ionic_lif_type)
+ * @type:       Logical queue type (enum ionic_logical_qtype)
+ * @ver:        Highest queue type version that the driver supports
+ */
+struct ionic_q_identify_cmd {
+	u8     opcode;
+	u8     rsvd;
+	__le16 lif_type;
+	u8     type;
+	u8     ver;
+	u8     rsvd2[58];
+};
+
+/**
+ * struct ionic_q_identify_comp - queue identify command completion
+ * @status:     Status of the command (enum ionic_status_code)
+ * @comp_index: Index in the descriptor ring for which this is the completion
+ * @ver:        Queue type version that can be used with FW
+ */
+struct ionic_q_identify_comp {
+	u8     status;
+	u8     rsvd;
+	__le16 comp_index;
+	u8     ver;
+	u8     rsvd2[11];
+};
+
+/**
+ * union ionic_q_identity - queue identity information
+ *     @version:        Queue type version that can be used with FW
+ *     @supported:      Bitfield of queue versions, first bit = ver 0
+ *     @features:       Queue features (enum ionic_q_feature, etc)
+ *     @desc_sz:        Descriptor size
+ *     @comp_sz:        Completion descriptor size
+ *     @sg_desc_sz:     Scatter/Gather descriptor size
+ *     @max_sg_elems:   Maximum number of Scatter/Gather elements
+ *     @sg_desc_stride: Number of Scatter/Gather elements per descriptor
+ */
+union ionic_q_identity {
+	struct {
+		u8      version;
+		u8      supported;
+		u8      rsvd[6];
+		__le64  features;
+		__le16  desc_sz;
+		__le16  comp_sz;
+		__le16  sg_desc_sz;
+		__le16  max_sg_elems;
+		__le16  sg_desc_stride;
+	};
+	__le32 words[478];
+};
+
+/**
+ * struct ionic_q_init_cmd - Queue init command
+ * @opcode:       opcode
+ * @type:         Logical queue type
+ * @ver:          Queue type version
+ * @lif_index:    LIF index
+ * @index:        (LIF, qtype) relative admin queue index
+ * @intr_index:   Interrupt control register index, or Event queue index
+ * @pid:          Process ID
+ * @flags:
+ *    IRQ:        Interrupt requested on completion
+ *    ENA:        Enable the queue.  If ENA=0 the queue is initialized
+ *                but remains disabled, to be later enabled with the
+ *                Queue Enable command.  If ENA=1, then queue is
+ *                initialized and then enabled.
+ *    SG:         Enable Scatter-Gather on the queue.
+ *                in number of descs.  The actual ring size is
+ *                (1 << ring_size).  For example, to
+ *                select a ring size of 64 descriptors write
+ *                ring_size = 6.  The minimum ring_size value is 2
+ *                for a ring size of 4 descriptors.  The maximum
+ *                ring_size value is 16 for a ring size of 64k
+ *                descriptors.  Values of ring_size <2 and >16 are
+ *                reserved.
+ *    EQ:         Enable the Event Queue
+ * @cos:          Class of service for this queue
+ * @ring_size:    Queue ring size, encoded as a log2(size)
+ * @ring_base:    Queue ring base address
+ * @cq_ring_base: Completion queue ring base address
+ * @sg_ring_base: Scatter/Gather ring base address
+ * @features:     Mask of queue features to enable, if not in the flags above.
+ */
+struct ionic_q_init_cmd {
+	u8     opcode;
+	u8     rsvd;
+	__le16 lif_index;
+	u8     type;
+	u8     ver;
+	u8     rsvd1[2];
+	__le32 index;
+	__le16 pid;
+	__le16 intr_index;
+	__le16 flags;
+#define IONIC_QINIT_F_IRQ	0x01	/* Request interrupt on completion */
+#define IONIC_QINIT_F_ENA	0x02	/* Enable the queue */
+#define IONIC_QINIT_F_SG	0x04	/* Enable scatter/gather on the queue */
+#define IONIC_QINIT_F_EQ	0x08	/* Enable event queue */
+#define IONIC_QINIT_F_CMB	0x10	/* Enable cmb-based queue */
+#define IONIC_QINIT_F_DEBUG	0x80	/* Enable queue debugging */
+	u8     cos;
+	u8     ring_size;
+	__le64 ring_base;
+	__le64 cq_ring_base;
+	__le64 sg_ring_base;
+	u8     rsvd2[12];
+	__le64 features;
+} __attribute__((packed));
+
+IONIC_CHECK_CMD_LENGTH(ionic_q_init_cmd);
+
+/**
+ * struct ionic_q_init_comp - Queue init command completion
+ * @status:     Status of the command (enum ionic_status_code)
+ * @comp_index: Index in the descriptor ring for which this is the completion
+ * @hw_index:   Hardware Queue ID
+ * @hw_type:    Hardware Queue type
+ * @color:      Color
+ */
+struct ionic_q_init_comp {
+	u8     status;
+	u8     rsvd;
+	__le16 comp_index;
+	__le32 hw_index;
+	u8     hw_type;
+	u8     rsvd2[6];
+	u8     color;
+};
+
+/* the device's internal addressing uses up to 52 bits */
+#define IONIC_ADDR_LEN		52
+#define IONIC_ADDR_MASK		(BIT_ULL(IONIC_ADDR_LEN) - 1)
+
+enum ionic_txq_desc_opcode {
+	IONIC_TXQ_DESC_OPCODE_CSUM_NONE = 0,
+	IONIC_TXQ_DESC_OPCODE_CSUM_PARTIAL = 1,
+	IONIC_TXQ_DESC_OPCODE_CSUM_HW = 2,
+	IONIC_TXQ_DESC_OPCODE_TSO = 3,
+};
+
+/**
+ * struct ionic_txq_desc - Ethernet Tx queue descriptor format
+ * @cmd:          Tx operation, see IONIC_TXQ_DESC_OPCODE_*:
+ *
+ *                   IONIC_TXQ_DESC_OPCODE_CSUM_NONE:
+ *                      Non-offload send.  No segmentation,
+ *                      fragmentation or checksum calc/insertion is
+ *                      performed by device; packet is prepared
+ *                      to send by software stack and requires
+ *                      no further manipulation from device.
+ *
+ *                   IONIC_TXQ_DESC_OPCODE_CSUM_PARTIAL:
+ *                      Offload 16-bit L4 checksum
+ *                      calculation/insertion.  The device will
+ *                      calculate the L4 checksum value and
+ *                      insert the result in the packet's L4
+ *                      header checksum field.  The L4 checksum
+ *                      is calculated starting at @csum_start bytes
+ *                      into the packet to the end of the packet.
+ *                      The checksum insertion position is given
+ *                      in @csum_offset, which is the offset from
+ *                      @csum_start to the checksum field in the L4
+ *                      header.  This feature is only applicable to
+ *                      protocols such as TCP, UDP and ICMP where a
+ *                      standard (i.e. the 'IP-style' checksum)
+ *                      one's complement 16-bit checksum is used,
+ *                      using an IP pseudo-header to seed the
+ *                      calculation.  Software will preload the L4
+ *                      checksum field with the IP pseudo-header
+ *                      checksum.
+ *
+ *                      For tunnel encapsulation, @csum_start and
+ *                      @csum_offset refer to the inner L4
+ *                      header.  Supported tunnels encapsulations
+ *                      are: IPIP, GRE, and UDP.  If the @encap
+ *                      is clear, no further processing by the
+ *                      device is required; software will
+ *                      calculate the outer header checksums.  If
+ *                      the @encap is set, the device will
+ *                      offload the outer header checksums using
+ *                      LCO (local checksum offload) (see
+ *                      Documentation/networking/checksum-offloads.rst
+ *                      for more info).
+ *
+ *                   IONIC_TXQ_DESC_OPCODE_CSUM_HW:
+ *                      Offload 16-bit checksum computation to hardware.
+ *                      If @csum_l3 is set then the packet's L3 checksum is
+ *                      updated. Similarly, if @csum_l4 is set the the L4
+ *                      checksum is updated. If @encap is set then encap header
+ *                      checksums are also updated.
+ *
+ *                   IONIC_TXQ_DESC_OPCODE_TSO:
+ *                      Device performs TCP segmentation offload
+ *                      (TSO).  @hdr_len is the number of bytes
+ *                      to the end of TCP header (the offset to
+ *                      the TCP payload).  @mss is the desired
+ *                      MSS, the TCP payload length for each
+ *                      segment.  The device will calculate/
+ *                      insert IP (IPv4 only) and TCP checksums
+ *                      for each segment.  In the first data
+ *                      buffer containing the header template,
+ *                      the driver will set IPv4 checksum to 0
+ *                      and preload TCP checksum with the IP
+ *                      pseudo header calculated with IP length = 0.
+ *
+ *                      Supported tunnel encapsulations are IPIP,
+ *                      layer-3 GRE, and UDP. @hdr_len includes
+ *                      both outer and inner headers.  The driver
+ *                      will set IPv4 checksum to zero and
+ *                      preload TCP checksum with IP pseudo
+ *                      header on the inner header.
+ *
+ *                      TCP ECN offload is supported.  The device
+ *                      will set CWR flag in the first segment if
+ *                      CWR is set in the template header, and
+ *                      clear CWR in remaining segments.
+ * @flags:
+ *                vlan:
+ *                    Insert an L2 VLAN header using @vlan_tci
+ *                encap:
+ *                    Calculate encap header checksum
+ *                csum_l3:
+ *                    Compute L3 header checksum
+ *                csum_l4:
+ *                    Compute L4 header checksum
+ *                tso_sot:
+ *                    TSO start
+ *                tso_eot:
+ *                    TSO end
+ * @num_sg_elems: Number of scatter-gather elements in SG
+ *                descriptor
+ * @addr:         First data buffer's DMA address
+ *                (Subsequent data buffers are on txq_sg_desc)
+ * @len:          First data buffer's length, in bytes
+ * @vlan_tci:     VLAN tag to insert in the packet (if requested
+ *                by @V-bit).  Includes .1p and .1q tags
+ * @hdr_len:      Length of packet headers, including
+ *                encapsulating outer header, if applicable
+ *                Valid for opcodes IONIC_TXQ_DESC_OPCODE_CALC_CSUM and
+ *                IONIC_TXQ_DESC_OPCODE_TSO.  Should be set to zero for
+ *                all other modes.  For
+ *                IONIC_TXQ_DESC_OPCODE_CALC_CSUM, @hdr_len is length
+ *                of headers up to inner-most L4 header.  For
+ *                IONIC_TXQ_DESC_OPCODE_TSO, @hdr_len is up to
+ *                inner-most L4 payload, so inclusive of
+ *                inner-most L4 header.
+ * @mss:          Desired MSS value for TSO; only applicable for
+ *                IONIC_TXQ_DESC_OPCODE_TSO
+ * @csum_start:   Offset from packet to first byte checked in L4 checksum
+ * @csum_offset:  Offset from csum_start to L4 checksum field
+ */
+struct ionic_txq_desc {
+	__le64  cmd;
+#define IONIC_TXQ_DESC_OPCODE_MASK		0xf
+#define IONIC_TXQ_DESC_OPCODE_SHIFT		4
+#define IONIC_TXQ_DESC_FLAGS_MASK		0xf
+#define IONIC_TXQ_DESC_FLAGS_SHIFT		0
+#define IONIC_TXQ_DESC_NSGE_MASK		0xf
+#define IONIC_TXQ_DESC_NSGE_SHIFT		8
+#define IONIC_TXQ_DESC_ADDR_MASK		(BIT_ULL(IONIC_ADDR_LEN) - 1)
+#define IONIC_TXQ_DESC_ADDR_SHIFT		12
+
+/* common flags */
+#define IONIC_TXQ_DESC_FLAG_VLAN		0x1
+#define IONIC_TXQ_DESC_FLAG_ENCAP		0x2
+
+/* flags for csum_hw opcode */
+#define IONIC_TXQ_DESC_FLAG_CSUM_L3		0x4
+#define IONIC_TXQ_DESC_FLAG_CSUM_L4		0x8
+
+/* flags for tso opcode */
+#define IONIC_TXQ_DESC_FLAG_TSO_SOT		0x4
+#define IONIC_TXQ_DESC_FLAG_TSO_EOT		0x8
+
+	__le16  len;
+	union {
+		__le16  vlan_tci;
+		__le16  hword0;
+	};
+	union {
+		__le16  csum_start;
+		__le16  hdr_len;
+		__le16  hword1;
+	};
+	union {
+		__le16  csum_offset;
+		__le16  mss;
+		__le16  hword2;
+	};
+};
+
+static inline u64 encode_txq_desc_cmd(u8 opcode, u8 flags,
+				      u8 nsge, u64 addr)
+{
+	u64 cmd;
+
+	cmd = (opcode & IONIC_TXQ_DESC_OPCODE_MASK) << IONIC_TXQ_DESC_OPCODE_SHIFT;
+	cmd |= (flags & IONIC_TXQ_DESC_FLAGS_MASK) << IONIC_TXQ_DESC_FLAGS_SHIFT;
+	cmd |= (nsge & IONIC_TXQ_DESC_NSGE_MASK) << IONIC_TXQ_DESC_NSGE_SHIFT;
+	cmd |= (addr & IONIC_TXQ_DESC_ADDR_MASK) << IONIC_TXQ_DESC_ADDR_SHIFT;
+
+	return cmd;
+};
+
+static inline void decode_txq_desc_cmd(u64 cmd, u8 *opcode, u8 *flags,
+				       u8 *nsge, u64 *addr)
+{
+	*opcode = (cmd >> IONIC_TXQ_DESC_OPCODE_SHIFT) & IONIC_TXQ_DESC_OPCODE_MASK;
+	*flags = (cmd >> IONIC_TXQ_DESC_FLAGS_SHIFT) & IONIC_TXQ_DESC_FLAGS_MASK;
+	*nsge = (cmd >> IONIC_TXQ_DESC_NSGE_SHIFT) & IONIC_TXQ_DESC_NSGE_MASK;
+	*addr = (cmd >> IONIC_TXQ_DESC_ADDR_SHIFT) & IONIC_TXQ_DESC_ADDR_MASK;
+};
+
+/**
+ * struct ionic_txq_sg_elem - Transmit scatter-gather (SG) descriptor element
+ * @addr:      DMA address of SG element data buffer
+ * @len:       Length of SG element data buffer, in bytes
+ */
+struct ionic_txq_sg_elem {
+	__le64 addr;
+	__le16 len;
+	__le16 rsvd[3];
+};
+
+/**
+ * struct ionic_txq_sg_desc - Transmit scatter-gather (SG) list
+ * @elems:     Scatter-gather elements
+ */
+struct ionic_txq_sg_desc {
+#define IONIC_TX_MAX_SG_ELEMS		8
+#define IONIC_TX_SG_DESC_STRIDE		8
+	struct ionic_txq_sg_elem elems[IONIC_TX_MAX_SG_ELEMS];
+};
+
+struct ionic_txq_sg_desc_v1 {
+#define IONIC_TX_MAX_SG_ELEMS_V1		15
+#define IONIC_TX_SG_DESC_STRIDE_V1		16
+	struct ionic_txq_sg_elem elems[IONIC_TX_SG_DESC_STRIDE_V1];
+};
+
+/**
+ * struct ionic_txq_comp - Ethernet transmit queue completion descriptor
+ * @status:     Status of the command (enum ionic_status_code)
+ * @comp_index: Index in the descriptor ring for which this is the completion
+ * @color:      Color bit
+ */
+struct ionic_txq_comp {
+	u8     status;
+	u8     rsvd;
+	__le16 comp_index;
+	u8     rsvd2[11];
+	u8     color;
+};
+
+enum ionic_rxq_desc_opcode {
+	IONIC_RXQ_DESC_OPCODE_SIMPLE = 0,
+	IONIC_RXQ_DESC_OPCODE_SG = 1,
+};
+
+/**
+ * struct ionic_rxq_desc - Ethernet Rx queue descriptor format
+ * @opcode:       Rx operation, see IONIC_RXQ_DESC_OPCODE_*:
+ *
+ *                   IONIC_RXQ_DESC_OPCODE_SIMPLE:
+ *                      Receive full packet into data buffer
+ *                      starting at @addr.  Results of
+ *                      receive, including actual bytes received,
+ *                      are recorded in Rx completion descriptor.
+ *
+ * @len:          Data buffer's length, in bytes
+ * @addr:         Data buffer's DMA address
+ */
+struct ionic_rxq_desc {
+	u8     opcode;
+	u8     rsvd[5];
+	__le16 len;
+	__le64 addr;
+};
+
+/**
+ * struct ionic_rxq_sg_elem - Receive scatter-gather (SG) descriptor element
+ * @addr:      DMA address of SG element data buffer
+ * @len:       Length of SG element data buffer, in bytes
+ */
+struct ionic_rxq_sg_elem {
+	__le64 addr;
+	__le16 len;
+	__le16 rsvd[3];
+};
+
+/**
+ * struct ionic_rxq_sg_desc - Receive scatter-gather (SG) list
+ * @elems:     Scatter-gather elements
+ */
+struct ionic_rxq_sg_desc {
+#define IONIC_RX_MAX_SG_ELEMS		8
+#define IONIC_RX_SG_DESC_STRIDE		8
+	struct ionic_rxq_sg_elem elems[IONIC_RX_SG_DESC_STRIDE];
+};
+
+/**
+ * struct ionic_rxq_comp - Ethernet receive queue completion descriptor
+ * @status:       Status of the command (enum ionic_status_code)
+ * @num_sg_elems: Number of SG elements used by this descriptor
+ * @comp_index:   Index in the descriptor ring for which this is the completion
+ * @rss_hash:     32-bit RSS hash
+ * @csum:         16-bit sum of the packet's L2 payload
+ *                If the packet's L2 payload is odd length, an extra
+ *                zero-value byte is included in the @csum calculation but
+ *                not included in @len.
+ * @vlan_tci:     VLAN tag stripped from the packet.  Valid if @VLAN is
+ *                set.  Includes .1p and .1q tags.
+ * @len:          Received packet length, in bytes.  Excludes FCS.
+ * @csum_calc     L2 payload checksum is computed or not
+ * @csum_flags:   See IONIC_RXQ_COMP_CSUM_F_*:
+ *
+ *                  IONIC_RXQ_COMP_CSUM_F_TCP_OK:
+ *                    The TCP checksum calculated by the device
+ *                    matched the checksum in the receive packet's
+ *                    TCP header.
+ *
+ *                  IONIC_RXQ_COMP_CSUM_F_TCP_BAD:
+ *                    The TCP checksum calculated by the device did
+ *                    not match the checksum in the receive packet's
+ *                    TCP header.
+ *
+ *                  IONIC_RXQ_COMP_CSUM_F_UDP_OK:
+ *                    The UDP checksum calculated by the device
+ *                    matched the checksum in the receive packet's
+ *                    UDP header
+ *
+ *                  IONIC_RXQ_COMP_CSUM_F_UDP_BAD:
+ *                    The UDP checksum calculated by the device did
+ *                    not match the checksum in the receive packet's
+ *                    UDP header.
+ *
+ *                  IONIC_RXQ_COMP_CSUM_F_IP_OK:
+ *                    The IPv4 checksum calculated by the device
+ *                    matched the checksum in the receive packet's
+ *                    first IPv4 header.  If the receive packet
+ *                    contains both a tunnel IPv4 header and a
+ *                    transport IPv4 header, the device validates the
+ *                    checksum for the both IPv4 headers.
+ *
+ *                  IONIC_RXQ_COMP_CSUM_F_IP_BAD:
+ *                    The IPv4 checksum calculated by the device did
+ *                    not match the checksum in the receive packet's
+ *                    first IPv4 header. If the receive packet
+ *                    contains both a tunnel IPv4 header and a
+ *                    transport IPv4 header, the device validates the
+ *                    checksum for both IP headers.
+ *
+ *                  IONIC_RXQ_COMP_CSUM_F_VLAN:
+ *                    The VLAN header was stripped and placed in @vlan_tci.
+ *
+ *                  IONIC_RXQ_COMP_CSUM_F_CALC:
+ *                    The checksum was calculated by the device.
+ *
+ * @pkt_type_color: Packet type and color bit; see IONIC_RXQ_COMP_PKT_TYPE_MASK
+ */
+struct ionic_rxq_comp {
+	u8     status;
+	u8     num_sg_elems;
+	__le16 comp_index;
+	__le32 rss_hash;
+	__le16 csum;
+	__le16 vlan_tci;
+	__le16 len;
+	u8     csum_flags;
+#define IONIC_RXQ_COMP_CSUM_F_TCP_OK	0x01
+#define IONIC_RXQ_COMP_CSUM_F_TCP_BAD	0x02
+#define IONIC_RXQ_COMP_CSUM_F_UDP_OK	0x04
+#define IONIC_RXQ_COMP_CSUM_F_UDP_BAD	0x08
+#define IONIC_RXQ_COMP_CSUM_F_IP_OK	0x10
+#define IONIC_RXQ_COMP_CSUM_F_IP_BAD	0x20
+#define IONIC_RXQ_COMP_CSUM_F_VLAN	0x40
+#define IONIC_RXQ_COMP_CSUM_F_CALC	0x80
+	u8     pkt_type_color;
+#define IONIC_RXQ_COMP_PKT_TYPE_MASK	0x7f
+};
+
+enum ionic_pkt_type {
+	IONIC_PKT_TYPE_NON_IP		= 0x00,
+	IONIC_PKT_TYPE_IPV4		= 0x01,
+	IONIC_PKT_TYPE_IPV4_TCP		= 0x03,
+	IONIC_PKT_TYPE_IPV4_UDP		= 0x05,
+	IONIC_PKT_TYPE_IPV6		= 0x08,
+	IONIC_PKT_TYPE_IPV6_TCP		= 0x18,
+	IONIC_PKT_TYPE_IPV6_UDP		= 0x28,
+	/* below types are only used if encap offloads are enabled on lif */
+	IONIC_PKT_TYPE_ENCAP_NON_IP	= 0x40,
+	IONIC_PKT_TYPE_ENCAP_IPV4	= 0x41,
+	IONIC_PKT_TYPE_ENCAP_IPV4_TCP	= 0x43,
+	IONIC_PKT_TYPE_ENCAP_IPV4_UDP	= 0x45,
+	IONIC_PKT_TYPE_ENCAP_IPV6	= 0x48,
+	IONIC_PKT_TYPE_ENCAP_IPV6_TCP	= 0x58,
+	IONIC_PKT_TYPE_ENCAP_IPV6_UDP	= 0x68,
+};
+
+enum ionic_eth_hw_features {
+	IONIC_ETH_HW_VLAN_TX_TAG	= BIT(0),
+	IONIC_ETH_HW_VLAN_RX_STRIP	= BIT(1),
+	IONIC_ETH_HW_VLAN_RX_FILTER	= BIT(2),
+	IONIC_ETH_HW_RX_HASH		= BIT(3),
+	IONIC_ETH_HW_RX_CSUM		= BIT(4),
+	IONIC_ETH_HW_TX_SG		= BIT(5),
+	IONIC_ETH_HW_RX_SG		= BIT(6),
+	IONIC_ETH_HW_TX_CSUM		= BIT(7),
+	IONIC_ETH_HW_TSO		= BIT(8),
+	IONIC_ETH_HW_TSO_IPV6		= BIT(9),
+	IONIC_ETH_HW_TSO_ECN		= BIT(10),
+	IONIC_ETH_HW_TSO_GRE		= BIT(11),
+	IONIC_ETH_HW_TSO_GRE_CSUM	= BIT(12),
+	IONIC_ETH_HW_TSO_IPXIP4		= BIT(13),
+	IONIC_ETH_HW_TSO_IPXIP6		= BIT(14),
+	IONIC_ETH_HW_TSO_UDP		= BIT(15),
+	IONIC_ETH_HW_TSO_UDP_CSUM	= BIT(16),
+	IONIC_ETH_HW_RX_CSUM_GENEVE	= BIT(17),
+	IONIC_ETH_HW_TX_CSUM_GENEVE	= BIT(18),
+	IONIC_ETH_HW_TSO_GENEVE		= BIT(19),
+	IONIC_ETH_HW_TIMESTAMP		= BIT(20),
+};
+
+/**
+ * enum ionic_pkt_class - Packet classification mask.
+ *
+ * Used with rx steering filter, packets indicated by the mask can be steered
+ * toward a specific receive queue.
+ *
+ * @IONIC_PKT_CLS_NTP_ALL:          All NTP packets.
+ * @IONIC_PKT_CLS_PTP1_SYNC:        PTPv1 sync
+ * @IONIC_PKT_CLS_PTP1_DREQ:        PTPv1 delay-request
+ * @IONIC_PKT_CLS_PTP1_ALL:         PTPv1 all packets
+ * @IONIC_PKT_CLS_PTP2_L4_SYNC:     PTPv2-UDP sync
+ * @IONIC_PKT_CLS_PTP2_L4_DREQ:     PTPv2-UDP delay-request
+ * @IONIC_PKT_CLS_PTP2_L4_ALL:      PTPv2-UDP all packets
+ * @IONIC_PKT_CLS_PTP2_L2_SYNC:     PTPv2-ETH sync
+ * @IONIC_PKT_CLS_PTP2_L2_DREQ:     PTPv2-ETH delay-request
+ * @IONIC_PKT_CLS_PTP2_L2_ALL:      PTPv2-ETH all packets
+ * @IONIC_PKT_CLS_PTP2_SYNC:        PTPv2 sync
+ * @IONIC_PKT_CLS_PTP2_DREQ:        PTPv2 delay-request
+ * @IONIC_PKT_CLS_PTP2_ALL:         PTPv2 all packets
+ * @IONIC_PKT_CLS_PTP_SYNC:         PTP sync
+ * @IONIC_PKT_CLS_PTP_DREQ:         PTP delay-request
+ * @IONIC_PKT_CLS_PTP_ALL:          PTP all packets
+ */
+enum ionic_pkt_class {
+	IONIC_PKT_CLS_NTP_ALL		= BIT(0),
+
+	IONIC_PKT_CLS_PTP1_SYNC		= BIT(1),
+	IONIC_PKT_CLS_PTP1_DREQ		= BIT(2),
+	IONIC_PKT_CLS_PTP1_ALL		= BIT(3) |
+		IONIC_PKT_CLS_PTP1_SYNC | IONIC_PKT_CLS_PTP1_DREQ,
+
+	IONIC_PKT_CLS_PTP2_L4_SYNC	= BIT(4),
+	IONIC_PKT_CLS_PTP2_L4_DREQ	= BIT(5),
+	IONIC_PKT_CLS_PTP2_L4_ALL	= BIT(6) |
+		IONIC_PKT_CLS_PTP2_L4_SYNC | IONIC_PKT_CLS_PTP2_L4_DREQ,
+
+	IONIC_PKT_CLS_PTP2_L2_SYNC	= BIT(7),
+	IONIC_PKT_CLS_PTP2_L2_DREQ	= BIT(8),
+	IONIC_PKT_CLS_PTP2_L2_ALL	= BIT(9) |
+		IONIC_PKT_CLS_PTP2_L2_SYNC | IONIC_PKT_CLS_PTP2_L2_DREQ,
+
+	IONIC_PKT_CLS_PTP2_SYNC		=
+		IONIC_PKT_CLS_PTP2_L4_SYNC | IONIC_PKT_CLS_PTP2_L2_SYNC,
+	IONIC_PKT_CLS_PTP2_DREQ		=
+		IONIC_PKT_CLS_PTP2_L4_DREQ | IONIC_PKT_CLS_PTP2_L2_DREQ,
+	IONIC_PKT_CLS_PTP2_ALL		=
+		IONIC_PKT_CLS_PTP2_L4_ALL | IONIC_PKT_CLS_PTP2_L2_ALL,
+
+	IONIC_PKT_CLS_PTP_SYNC		=
+		IONIC_PKT_CLS_PTP1_SYNC | IONIC_PKT_CLS_PTP2_SYNC,
+	IONIC_PKT_CLS_PTP_DREQ		=
+		IONIC_PKT_CLS_PTP1_DREQ | IONIC_PKT_CLS_PTP2_DREQ,
+	IONIC_PKT_CLS_PTP_ALL		=
+		IONIC_PKT_CLS_PTP1_ALL | IONIC_PKT_CLS_PTP2_ALL,
+};
+
+/**
+ * struct ionic_q_control_cmd - Queue control command
+ * @opcode:     opcode
+ * @type:       Queue type
+ * @lif_index:  LIF index
+ * @index:      Queue index
+ * @oper:       Operation (enum ionic_q_control_oper)
+ */
+struct ionic_q_control_cmd {
+	u8     opcode;
+	u8     type;
+	__le16 lif_index;
+	__le32 index;
+	u8     oper;
+	u8     rsvd[55];
+};
+
+typedef struct ionic_admin_comp ionic_q_control_comp;
+
+enum ionic_q_control_oper {
+	IONIC_Q_DISABLE		= 0,
+	IONIC_Q_ENABLE		= 1,
+	IONIC_Q_HANG_RESET	= 2,
+};
+
+/**
+ * enum ionic_phy_type - Physical connection type
+ * @IONIC_PHY_TYPE_NONE:    No PHY installed
+ * @IONIC_PHY_TYPE_COPPER:  Copper PHY
+ * @IONIC_PHY_TYPE_FIBER:   Fiber PHY
+ */
+enum ionic_phy_type {
+	IONIC_PHY_TYPE_NONE	= 0,
+	IONIC_PHY_TYPE_COPPER	= 1,
+	IONIC_PHY_TYPE_FIBER	= 2,
+};
+
+/**
+ * enum ionic_xcvr_state - Transceiver status
+ * @IONIC_XCVR_STATE_REMOVED:        Transceiver removed
+ * @IONIC_XCVR_STATE_INSERTED:       Transceiver inserted
+ * @IONIC_XCVR_STATE_PENDING:        Transceiver pending
+ * @IONIC_XCVR_STATE_SPROM_READ:     Transceiver data read
+ * @IONIC_XCVR_STATE_SPROM_READ_ERR: Transceiver data read error
+ */
+enum ionic_xcvr_state {
+	IONIC_XCVR_STATE_REMOVED	 = 0,
+	IONIC_XCVR_STATE_INSERTED	 = 1,
+	IONIC_XCVR_STATE_PENDING	 = 2,
+	IONIC_XCVR_STATE_SPROM_READ	 = 3,
+	IONIC_XCVR_STATE_SPROM_READ_ERR	 = 4,
+};
+
+/**
+ * enum ionic_xcvr_pid - Supported link modes
+ */
+enum ionic_xcvr_pid {
+	IONIC_XCVR_PID_UNKNOWN           = 0,
+
+	/* CU */
+	IONIC_XCVR_PID_QSFP_100G_CR4     = 1,
+	IONIC_XCVR_PID_QSFP_40GBASE_CR4  = 2,
+	IONIC_XCVR_PID_SFP_25GBASE_CR_S  = 3,
+	IONIC_XCVR_PID_SFP_25GBASE_CR_L  = 4,
+	IONIC_XCVR_PID_SFP_25GBASE_CR_N  = 5,
+
+	/* Fiber */
+	IONIC_XCVR_PID_QSFP_100G_AOC    = 50,
+	IONIC_XCVR_PID_QSFP_100G_ACC    = 51,
+	IONIC_XCVR_PID_QSFP_100G_SR4    = 52,
+	IONIC_XCVR_PID_QSFP_100G_LR4    = 53,
+	IONIC_XCVR_PID_QSFP_100G_ER4    = 54,
+	IONIC_XCVR_PID_QSFP_40GBASE_ER4 = 55,
+	IONIC_XCVR_PID_QSFP_40GBASE_SR4 = 56,
+	IONIC_XCVR_PID_QSFP_40GBASE_LR4 = 57,
+	IONIC_XCVR_PID_QSFP_40GBASE_AOC = 58,
+	IONIC_XCVR_PID_SFP_25GBASE_SR   = 59,
+	IONIC_XCVR_PID_SFP_25GBASE_LR   = 60,
+	IONIC_XCVR_PID_SFP_25GBASE_ER   = 61,
+	IONIC_XCVR_PID_SFP_25GBASE_AOC  = 62,
+	IONIC_XCVR_PID_SFP_10GBASE_SR   = 63,
+	IONIC_XCVR_PID_SFP_10GBASE_LR   = 64,
+	IONIC_XCVR_PID_SFP_10GBASE_LRM  = 65,
+	IONIC_XCVR_PID_SFP_10GBASE_ER   = 66,
+	IONIC_XCVR_PID_SFP_10GBASE_AOC  = 67,
+	IONIC_XCVR_PID_SFP_10GBASE_CU   = 68,
+	IONIC_XCVR_PID_QSFP_100G_CWDM4  = 69,
+	IONIC_XCVR_PID_QSFP_100G_PSM4   = 70,
+	IONIC_XCVR_PID_SFP_25GBASE_ACC  = 71,
+	IONIC_XCVR_PID_SFP_10GBASE_T    = 72,
+	IONIC_XCVR_PID_SFP_1000BASE_T   = 73,
+};
+
+/**
+ * enum ionic_port_admin_state - Port config state
+ * @IONIC_PORT_ADMIN_STATE_NONE:    Port admin state not configured
+ * @IONIC_PORT_ADMIN_STATE_DOWN:    Port admin disabled
+ * @IONIC_PORT_ADMIN_STATE_UP:      Port admin enabled
+ */
+enum ionic_port_admin_state {
+	IONIC_PORT_ADMIN_STATE_NONE = 0,
+	IONIC_PORT_ADMIN_STATE_DOWN = 1,
+	IONIC_PORT_ADMIN_STATE_UP   = 2,
+};
+
+/**
+ * enum ionic_port_oper_status - Port operational status
+ * @IONIC_PORT_OPER_STATUS_NONE:    Port disabled
+ * @IONIC_PORT_OPER_STATUS_UP:      Port link status up
+ * @IONIC_PORT_OPER_STATUS_DOWN:    Port link status down
+ */
+enum ionic_port_oper_status {
+	IONIC_PORT_OPER_STATUS_NONE  = 0,
+	IONIC_PORT_OPER_STATUS_UP    = 1,
+	IONIC_PORT_OPER_STATUS_DOWN  = 2,
+};
+
+/**
+ * enum ionic_port_fec_type - Ethernet Forward error correction (FEC) modes
+ * @IONIC_PORT_FEC_TYPE_NONE:       FEC Disabled
+ * @IONIC_PORT_FEC_TYPE_FC:         FireCode FEC
+ * @IONIC_PORT_FEC_TYPE_RS:         ReedSolomon FEC
+ */
+enum ionic_port_fec_type {
+	IONIC_PORT_FEC_TYPE_NONE = 0,
+	IONIC_PORT_FEC_TYPE_FC   = 1,
+	IONIC_PORT_FEC_TYPE_RS   = 2,
+};
+
+/**
+ * enum ionic_port_pause_type - Ethernet pause (flow control) modes
+ * @IONIC_PORT_PAUSE_TYPE_NONE:     Disable Pause
+ * @IONIC_PORT_PAUSE_TYPE_LINK:     Link level pause
+ * @IONIC_PORT_PAUSE_TYPE_PFC:      Priority-Flow Control
+ */
+enum ionic_port_pause_type {
+	IONIC_PORT_PAUSE_TYPE_NONE = 0,
+	IONIC_PORT_PAUSE_TYPE_LINK = 1,
+	IONIC_PORT_PAUSE_TYPE_PFC  = 2,
+};
+
+/**
+ * enum ionic_port_loopback_mode - Loopback modes
+ * @IONIC_PORT_LOOPBACK_MODE_NONE:  Disable loopback
+ * @IONIC_PORT_LOOPBACK_MODE_MAC:   MAC loopback
+ * @IONIC_PORT_LOOPBACK_MODE_PHY:   PHY/SerDes loopback
+ */
+enum ionic_port_loopback_mode {
+	IONIC_PORT_LOOPBACK_MODE_NONE = 0,
+	IONIC_PORT_LOOPBACK_MODE_MAC  = 1,
+	IONIC_PORT_LOOPBACK_MODE_PHY  = 2,
+};
+
+/**
+ * struct ionic_xcvr_status - Transceiver Status information
+ * @state:    Transceiver status (enum ionic_xcvr_state)
+ * @phy:      Physical connection type (enum ionic_phy_type)
+ * @pid:      Transceiver link mode (enum ionic_xcvr_pid)
+ * @sprom:    Transceiver sprom contents
+ */
+struct ionic_xcvr_status {
+	u8     state;
+	u8     phy;
+	__le16 pid;
+	u8     sprom[256];
+};
+
+/**
+ * union ionic_port_config - Port configuration
+ * @speed:              port speed (in Mbps)
+ * @mtu:                mtu
+ * @state:              port admin state (enum ionic_port_admin_state)
+ * @an_enable:          autoneg enable
+ * @fec_type:           fec type (enum ionic_port_fec_type)
+ * @pause_type:         pause type (enum ionic_port_pause_type)
+ * @loopback_mode:      loopback mode (enum ionic_port_loopback_mode)
+ */
+union ionic_port_config {
+	struct {
+#define IONIC_SPEED_100G	100000	/* 100G in Mbps */
+#define IONIC_SPEED_50G		50000	/* 50G in Mbps */
+#define IONIC_SPEED_40G		40000	/* 40G in Mbps */
+#define IONIC_SPEED_25G		25000	/* 25G in Mbps */
+#define IONIC_SPEED_10G		10000	/* 10G in Mbps */
+#define IONIC_SPEED_1G		1000	/* 1G in Mbps */
+		__le32 speed;
+		__le32 mtu;
+		u8     state;
+		u8     an_enable;
+		u8     fec_type;
+#define IONIC_PAUSE_TYPE_MASK		0x0f
+#define IONIC_PAUSE_FLAGS_MASK		0xf0
+#define IONIC_PAUSE_F_TX		0x10
+#define IONIC_PAUSE_F_RX		0x20
+		u8     pause_type;
+		u8     loopback_mode;
+	};
+	__le32 words[64];
+};
+
+/**
+ * struct ionic_port_status - Port Status information
+ * @status:             link status (enum ionic_port_oper_status)
+ * @id:                 port id
+ * @speed:              link speed (in Mbps)
+ * @link_down_count:    number of times link went from up to down
+ * @fec_type:           fec type (enum ionic_port_fec_type)
+ * @xcvr:               transceiver status
+ */
+struct ionic_port_status {
+	__le32 id;
+	__le32 speed;
+	u8     status;
+	__le16 link_down_count;
+	u8     fec_type;
+	u8     rsvd[48];
+	struct ionic_xcvr_status  xcvr;
+} __attribute__((packed));
+
+/**
+ * struct ionic_port_identify_cmd - Port identify command
+ * @opcode:     opcode
+ * @index:      port index
+ * @ver:        Highest version of identify supported by driver
+ */
+struct ionic_port_identify_cmd {
+	u8 opcode;
+	u8 index;
+	u8 ver;
+	u8 rsvd[61];
+};
+
+/**
+ * struct ionic_port_identify_comp - Port identify command completion
+ * @status: Status of the command (enum ionic_status_code)
+ * @ver:    Version of identify returned by device
+ */
+struct ionic_port_identify_comp {
+	u8 status;
+	u8 ver;
+	u8 rsvd[14];
+};
+
+/**
+ * struct ionic_port_init_cmd - Port initialization command
+ * @opcode:     opcode
+ * @index:      port index
+ * @info_pa:    destination address for port info (struct ionic_port_info)
+ */
+struct ionic_port_init_cmd {
+	u8     opcode;
+	u8     index;
+	u8     rsvd[6];
+	__le64 info_pa;
+	u8     rsvd2[48];
+};
+
+/**
+ * struct ionic_port_init_comp - Port initialization command completion
+ * @status: Status of the command (enum ionic_status_code)
+ */
+struct ionic_port_init_comp {
+	u8 status;
+	u8 rsvd[15];
+};
+
+/**
+ * struct ionic_port_reset_cmd - Port reset command
+ * @opcode:     opcode
+ * @index:      port index
+ */
+struct ionic_port_reset_cmd {
+	u8 opcode;
+	u8 index;
+	u8 rsvd[62];
+};
+
+/**
+ * struct ionic_port_reset_comp - Port reset command completion
+ * @status: Status of the command (enum ionic_status_code)
+ */
+struct ionic_port_reset_comp {
+	u8 status;
+	u8 rsvd[15];
+};
+
+/**
+ * enum ionic_stats_ctl_cmd - List of commands for stats control
+ * @IONIC_STATS_CTL_RESET:      Reset statistics
+ */
+enum ionic_stats_ctl_cmd {
+	IONIC_STATS_CTL_RESET		= 0,
+};
+
+/**
+ * enum ionic_txstamp_mode - List of TX Timestamping Modes
+ * @IONIC_TXSTAMP_OFF:           Disable TX hardware timetamping.
+ * @IONIC_TXSTAMP_ON:            Enable local TX hardware timetamping.
+ * @IONIC_TXSTAMP_ONESTEP_SYNC:  Modify TX PTP Sync packets.
+ * @IONIC_TXSTAMP_ONESTEP_P2P:   Modify TX PTP Sync and PDelayResp.
+ */
+enum ionic_txstamp_mode {
+	IONIC_TXSTAMP_OFF		= 0,
+	IONIC_TXSTAMP_ON		= 1,
+	IONIC_TXSTAMP_ONESTEP_SYNC	= 2,
+	IONIC_TXSTAMP_ONESTEP_P2P	= 3,
+};
+
+/**
+ * enum ionic_port_attr - List of device attributes
+ * @IONIC_PORT_ATTR_STATE:      Port state attribute
+ * @IONIC_PORT_ATTR_SPEED:      Port speed attribute
+ * @IONIC_PORT_ATTR_MTU:        Port MTU attribute
+ * @IONIC_PORT_ATTR_AUTONEG:    Port autonegotiation attribute
+ * @IONIC_PORT_ATTR_FEC:        Port FEC attribute
+ * @IONIC_PORT_ATTR_PAUSE:      Port pause attribute
+ * @IONIC_PORT_ATTR_LOOPBACK:   Port loopback attribute
+ * @IONIC_PORT_ATTR_STATS_CTRL: Port statistics control attribute
+ */
+enum ionic_port_attr {
+	IONIC_PORT_ATTR_STATE		= 0,
+	IONIC_PORT_ATTR_SPEED		= 1,
+	IONIC_PORT_ATTR_MTU		= 2,
+	IONIC_PORT_ATTR_AUTONEG		= 3,
+	IONIC_PORT_ATTR_FEC		= 4,
+	IONIC_PORT_ATTR_PAUSE		= 5,
+	IONIC_PORT_ATTR_LOOPBACK	= 6,
+	IONIC_PORT_ATTR_STATS_CTRL	= 7,
+};
+
+/**
+ * struct ionic_port_setattr_cmd - Set port attributes on the NIC
+ * @opcode:         Opcode
+ * @index:          Port index
+ * @attr:           Attribute type (enum ionic_port_attr)
+ * @state:          Port state
+ * @speed:          Port speed
+ * @mtu:            Port MTU
+ * @an_enable:      Port autonegotiation setting
+ * @fec_type:       Port FEC type setting
+ * @pause_type:     Port pause type setting
+ * @loopback_mode:  Port loopback mode
+ * @stats_ctl:      Port stats setting
+ */
+struct ionic_port_setattr_cmd {
+	u8     opcode;
+	u8     index;
+	u8     attr;
+	u8     rsvd;
+	union {
+		u8      state;
+		__le32  speed;
+		__le32  mtu;
+		u8      an_enable;
+		u8      fec_type;
+		u8      pause_type;
+		u8      loopback_mode;
+		u8      stats_ctl;
+		u8      rsvd2[60];
+	};
+};
+
+/**
+ * struct ionic_port_setattr_comp - Port set attr command completion
+ * @status:     Status of the command (enum ionic_status_code)
+ * @color:      Color bit
+ */
+struct ionic_port_setattr_comp {
+	u8     status;
+	u8     rsvd[14];
+	u8     color;
+};
+
+/**
+ * struct ionic_port_getattr_cmd - Get port attributes from the NIC
+ * @opcode:     Opcode
+ * @index:      port index
+ * @attr:       Attribute type (enum ionic_port_attr)
+ */
+struct ionic_port_getattr_cmd {
+	u8     opcode;
+	u8     index;
+	u8     attr;
+	u8     rsvd[61];
+};
+
+/**
+ * struct ionic_port_getattr_comp - Port get attr command completion
+ * @status:         Status of the command (enum ionic_status_code)
+ * @state:          Port state
+ * @speed:          Port speed
+ * @mtu:            Port MTU
+ * @an_enable:      Port autonegotiation setting
+ * @fec_type:       Port FEC type setting
+ * @pause_type:     Port pause type setting
+ * @loopback_mode:  Port loopback mode
+ * @color:          Color bit
+ */
+struct ionic_port_getattr_comp {
+	u8     status;
+	u8     rsvd[3];
+	union {
+		u8      state;
+		__le32  speed;
+		__le32  mtu;
+		u8      an_enable;
+		u8      fec_type;
+		u8      pause_type;
+		u8      loopback_mode;
+		u8      rsvd2[11];
+	} __attribute__((packed));
+	u8     color;
+};
+
+/**
+ * struct ionic_lif_status - LIF status register
+ * @eid:             most recent NotifyQ event id
+ * @port_num:        port the LIF is connected to
+ * @link_status:     port status (enum ionic_port_oper_status)
+ * @link_speed:      speed of link in Mbps
+ * @link_down_count: number of times link went from up to down
+ */
+struct ionic_lif_status {
+	__le64 eid;
+	u8     port_num;
+	u8     rsvd;
+	__le16 link_status;
+	__le32 link_speed;		/* units of 1Mbps: eg 10000 = 10Gbps */
+	__le16 link_down_count;
+	u8      rsvd2[46];
+};
+
+/**
+ * struct ionic_lif_reset_cmd - LIF reset command
+ * @opcode:    opcode
+ * @index:     LIF index
+ */
+struct ionic_lif_reset_cmd {
+	u8     opcode;
+	u8     rsvd;
+	__le16 index;
+	__le32 rsvd2[15];
+};
+
+typedef struct ionic_admin_comp ionic_lif_reset_comp;
+
+enum ionic_dev_state {
+	IONIC_DEV_DISABLE	= 0,
+	IONIC_DEV_ENABLE	= 1,
+	IONIC_DEV_HANG_RESET	= 2,
+};
+
+/**
+ * enum ionic_dev_attr - List of device attributes
+ * @IONIC_DEV_ATTR_STATE:     Device state attribute
+ * @IONIC_DEV_ATTR_NAME:      Device name attribute
+ * @IONIC_DEV_ATTR_FEATURES:  Device feature attributes
+ */
+enum ionic_dev_attr {
+	IONIC_DEV_ATTR_STATE    = 0,
+	IONIC_DEV_ATTR_NAME     = 1,
+	IONIC_DEV_ATTR_FEATURES = 2,
+};
+
+/**
+ * struct ionic_dev_setattr_cmd - Set Device attributes on the NIC
+ * @opcode:     Opcode
+ * @attr:       Attribute type (enum ionic_dev_attr)
+ * @state:      Device state (enum ionic_dev_state)
+ * @name:       The bus info, e.g. PCI slot-device-function, 0 terminated
+ * @features:   Device features
+ */
+struct ionic_dev_setattr_cmd {
+	u8     opcode;
+	u8     attr;
+	__le16 rsvd;
+	union {
+		u8      state;
+		char    name[IONIC_IFNAMSIZ];
+		__le64  features;
+		u8      rsvd2[60];
+	} __attribute__((packed));
+};
+
+/**
+ * struct ionic_dev_setattr_comp - Device set attr command completion
+ * @status:     Status of the command (enum ionic_status_code)
+ * @features:   Device features
+ * @color:      Color bit
+ */
+struct ionic_dev_setattr_comp {
+	u8     status;
+	u8     rsvd[3];
+	union {
+		__le64  features;
+		u8      rsvd2[11];
+	} __attribute__((packed));
+	u8     color;
+};
+
+/**
+ * struct ionic_dev_getattr_cmd - Get Device attributes from the NIC
+ * @opcode:     opcode
+ * @attr:       Attribute type (enum ionic_dev_attr)
+ */
+struct ionic_dev_getattr_cmd {
+	u8     opcode;
+	u8     attr;
+	u8     rsvd[62];
+};
+
+/**
+ * struct ionic_dev_setattr_comp - Device set attr command completion
+ * @status:     Status of the command (enum ionic_status_code)
+ * @features:   Device features
+ * @color:      Color bit
+ */
+struct ionic_dev_getattr_comp {
+	u8     status;
+	u8     rsvd[3];
+	union {
+		__le64  features;
+		u8      rsvd2[11];
+	} __attribute__((packed));
+	u8     color;
+};
+
+/**
+ * RSS parameters
+ */
+#define IONIC_RSS_HASH_KEY_SIZE		40
+
+enum ionic_rss_hash_types {
+	IONIC_RSS_TYPE_IPV4	= BIT(0),
+	IONIC_RSS_TYPE_IPV4_TCP	= BIT(1),
+	IONIC_RSS_TYPE_IPV4_UDP	= BIT(2),
+	IONIC_RSS_TYPE_IPV6	= BIT(3),
+	IONIC_RSS_TYPE_IPV6_TCP	= BIT(4),
+	IONIC_RSS_TYPE_IPV6_UDP	= BIT(5),
+};
+
+/**
+ * enum ionic_lif_attr - List of LIF attributes
+ * @IONIC_LIF_ATTR_STATE:       LIF state attribute
+ * @IONIC_LIF_ATTR_NAME:        LIF name attribute
+ * @IONIC_LIF_ATTR_MTU:         LIF MTU attribute
+ * @IONIC_LIF_ATTR_MAC:         LIF MAC attribute
+ * @IONIC_LIF_ATTR_FEATURES:    LIF features attribute
+ * @IONIC_LIF_ATTR_RSS:         LIF RSS attribute
+ * @IONIC_LIF_ATTR_STATS_CTRL:  LIF statistics control attribute
+ * @IONIC_LIF_ATTR_TXSTAMP:     LIF TX timestamping mode
+ */
+enum ionic_lif_attr {
+	IONIC_LIF_ATTR_STATE        = 0,
+	IONIC_LIF_ATTR_NAME         = 1,
+	IONIC_LIF_ATTR_MTU          = 2,
+	IONIC_LIF_ATTR_MAC          = 3,
+	IONIC_LIF_ATTR_FEATURES     = 4,
+	IONIC_LIF_ATTR_RSS          = 5,
+	IONIC_LIF_ATTR_STATS_CTRL   = 6,
+	IONIC_LIF_ATTR_TXSTAMP      = 7,
+};
+
+/**
+ * struct ionic_lif_setattr_cmd - Set LIF attributes on the NIC
+ * @opcode:     Opcode
+ * @attr:       Attribute type (enum ionic_lif_attr)
+ * @index:      LIF index
+ * @state:      LIF state (enum ionic_lif_state)
+ * @name:       The netdev name string, 0 terminated
+ * @mtu:        Mtu
+ * @mac:        Station mac
+ * @features:   Features (enum ionic_eth_hw_features)
+ * @rss:        RSS properties
+ *              @types:     The hash types to enable (see rss_hash_types)
+ *              @key:       The hash secret key
+ *              @addr:      Address for the indirection table shared memory
+ * @stats_ctl:  stats control commands (enum ionic_stats_ctl_cmd)
+ * @txstamp:    TX Timestamping Mode (enum ionic_txstamp_mode)
+ */
+struct ionic_lif_setattr_cmd {
+	u8     opcode;
+	u8     attr;
+	__le16 index;
+	union {
+		u8      state;
+		char    name[IONIC_IFNAMSIZ];
+		__le32  mtu;
+		u8      mac[6];
+		__le64  features;
+		struct {
+			__le16 types;
+			u8     key[IONIC_RSS_HASH_KEY_SIZE];
+			u8     rsvd[6];
+			__le64 addr;
+		} rss;
+		u8      stats_ctl;
+		__le16  txstamp_mode;
+		u8      rsvd[60];
+	} __attribute__((packed));
+};
+
+/**
+ * struct ionic_lif_setattr_comp - LIF set attr command completion
+ * @status:     Status of the command (enum ionic_status_code)
+ * @comp_index: Index in the descriptor ring for which this is the completion
+ * @features:   features (enum ionic_eth_hw_features)
+ * @color:      Color bit
+ */
+struct ionic_lif_setattr_comp {
+	u8     status;
+	u8     rsvd;
+	__le16 comp_index;
+	union {
+		__le64  features;
+		u8      rsvd2[11];
+	} __attribute__((packed));
+	u8     color;
+};
+
+/**
+ * struct ionic_lif_getattr_cmd - Get LIF attributes from the NIC
+ * @opcode:     Opcode
+ * @attr:       Attribute type (enum ionic_lif_attr)
+ * @index:      LIF index
+ */
+struct ionic_lif_getattr_cmd {
+	u8     opcode;
+	u8     attr;
+	__le16 index;
+	u8     rsvd[60];
+};
+
+/**
+ * struct ionic_lif_getattr_comp - LIF get attr command completion
+ * @status:     Status of the command (enum ionic_status_code)
+ * @comp_index: Index in the descriptor ring for which this is the completion
+ * @state:      LIF state (enum ionic_lif_state)
+ * @name:       The netdev name string, 0 terminated
+ * @mtu:        Mtu
+ * @mac:        Station mac
+ * @features:   Features (enum ionic_eth_hw_features)
+ * @txstamp:    TX Timestamping Mode (enum ionic_txstamp_mode)
+ * @color:      Color bit
+ */
+struct ionic_lif_getattr_comp {
+	u8     status;
+	u8     rsvd;
+	__le16 comp_index;
+	union {
+		u8      state;
+		__le32  mtu;
+		u8      mac[6];
+		__le64  features;
+		__le16 txstamp_mode;
+		u8      rsvd2[11];
+	} __attribute__((packed));
+	u8     color;
+};
+
+/**
+ * struct ionic_lif_setphc_cmd - Set LIF PTP Hardware Clock
+ * @opcode:     Opcode
+ * @lif_index:  LIF index
+ * @tick:       Hardware stamp tick of an instant in time.
+ * @nsec:       Nanosecond stamp of the same instant.
+ * @frac:       Fractional nanoseconds at the same instant.
+ * @mult:       Cycle to nanosecond multiplier.
+ * @shift:      Cycle to nanosecond divisor (power of two).
+ */
+struct ionic_lif_setphc_cmd {
+	u8	opcode;
+	u8	rsvd1;
+	__le16  lif_index;
+	u8      rsvd2[4];
+	__le64	tick;
+	__le64	nsec;
+	__le64	frac;
+	__le32	mult;
+	__le32	shift;
+	u8     rsvd3[24];
+};
+
+IONIC_CHECK_CMD_LENGTH(ionic_lif_setphc_cmd);
+
+enum ionic_rx_mode {
+	IONIC_RX_MODE_F_UNICAST		= BIT(0),
+	IONIC_RX_MODE_F_MULTICAST	= BIT(1),
+	IONIC_RX_MODE_F_BROADCAST	= BIT(2),
+	IONIC_RX_MODE_F_PROMISC		= BIT(3),
+	IONIC_RX_MODE_F_ALLMULTI	= BIT(4),
+	IONIC_RX_MODE_F_RDMA_SNIFFER	= BIT(5),
+};
+
+/**
+ * struct ionic_rx_mode_set_cmd - Set LIF's Rx mode command
+ * @opcode:     opcode
+ * @lif_index:  LIF index
+ * @rx_mode:    Rx mode flags:
+ *                  IONIC_RX_MODE_F_UNICAST: Accept known unicast packets
+ *                  IONIC_RX_MODE_F_MULTICAST: Accept known multicast packets
+ *                  IONIC_RX_MODE_F_BROADCAST: Accept broadcast packets
+ *                  IONIC_RX_MODE_F_PROMISC: Accept any packets
+ *                  IONIC_RX_MODE_F_ALLMULTI: Accept any multicast packets
+ *                  IONIC_RX_MODE_F_RDMA_SNIFFER: Sniff RDMA packets
+ */
+struct ionic_rx_mode_set_cmd {
+	u8     opcode;
+	u8     rsvd;
+	__le16 lif_index;
+	__le16 rx_mode;
+	__le16 rsvd2[29];
+};
+
+typedef struct ionic_admin_comp ionic_rx_mode_set_comp;
+
+enum ionic_rx_filter_match_type {
+	IONIC_RX_FILTER_MATCH_VLAN	= 0x0,
+	IONIC_RX_FILTER_MATCH_MAC	= 0x1,
+	IONIC_RX_FILTER_MATCH_MAC_VLAN	= 0x2,
+	IONIC_RX_FILTER_STEER_PKTCLASS	= 0x10,
+};
+
+/**
+ * struct ionic_rx_filter_add_cmd - Add LIF Rx filter command
+ * @opcode:     opcode
+ * @qtype:      Queue type
+ * @lif_index:  LIF index
+ * @qid:        Queue ID
+ * @match:      Rx filter match type (see IONIC_RX_FILTER_MATCH_xxx)
+ * @vlan:       VLAN filter
+ *              @vlan:  VLAN ID
+ * @mac:        MAC filter
+ *              @addr:  MAC address (network-byte order)
+ * @mac_vlan:   MACVLAN filter
+ *              @vlan:  VLAN ID
+ *              @addr:  MAC address (network-byte order)
+ * @pkt_class:  Packet classification filter
+ */
+struct ionic_rx_filter_add_cmd {
+	u8     opcode;
+	u8     qtype;
+	__le16 lif_index;
+	__le32 qid;
+	__le16 match;
+	union {
+		struct {
+			__le16 vlan;
+		} vlan;
+		struct {
+			u8     addr[6];
+		} mac;
+		struct {
+			__le16 vlan;
+			u8     addr[6];
+		} mac_vlan;
+		__le64 pkt_class;
+		u8 rsvd[54];
+	} __attribute__((packed));
+};
+
+/**
+ * struct ionic_rx_filter_add_comp - Add LIF Rx filter command completion
+ * @status:     Status of the command (enum ionic_status_code)
+ * @comp_index: Index in the descriptor ring for which this is the completion
+ * @filter_id:  Filter ID
+ * @color:      Color bit
+ */
+struct ionic_rx_filter_add_comp {
+	u8     status;
+	u8     rsvd;
+	__le16 comp_index;
+	__le32 filter_id;
+	u8     rsvd2[7];
+	u8     color;
+};
+
+/**
+ * struct ionic_rx_filter_del_cmd - Delete LIF Rx filter command
+ * @opcode:     opcode
+ * @lif_index:  LIF index
+ * @filter_id:  Filter ID
+ */
+struct ionic_rx_filter_del_cmd {
+	u8     opcode;
+	u8     rsvd;
+	__le16 lif_index;
+	__le32 filter_id;
+	u8     rsvd2[56];
+};
+
+typedef struct ionic_admin_comp ionic_rx_filter_del_comp;
+
+enum ionic_vf_attr {
+	IONIC_VF_ATTR_SPOOFCHK	= 1,
+	IONIC_VF_ATTR_TRUST	= 2,
+	IONIC_VF_ATTR_MAC	= 3,
+	IONIC_VF_ATTR_LINKSTATE	= 4,
+	IONIC_VF_ATTR_VLAN	= 5,
+	IONIC_VF_ATTR_RATE	= 6,
+	IONIC_VF_ATTR_STATSADDR	= 7,
+};
+
+/**
+ * enum ionic_vf_link_status - Virtual Function link status
+ * @IONIC_VF_LINK_STATUS_AUTO:   Use link state of the uplink
+ * @IONIC_VF_LINK_STATUS_UP:     Link always up
+ * @IONIC_VF_LINK_STATUS_DOWN:   Link always down
+ */
+enum ionic_vf_link_status {
+	IONIC_VF_LINK_STATUS_AUTO = 0,
+	IONIC_VF_LINK_STATUS_UP   = 1,
+	IONIC_VF_LINK_STATUS_DOWN = 2,
+};
+
+/**
+ * struct ionic_vf_setattr_cmd - Set VF attributes on the NIC
+ * @opcode:     Opcode
+ * @attr:       Attribute type (enum ionic_vf_attr)
+ * @vf_index:   VF index
+ *	@macaddr:	mac address
+ *	@vlanid:	vlan ID
+ *	@maxrate:	max Tx rate in Mbps
+ *	@spoofchk:	enable address spoof checking
+ *	@trust:		enable VF trust
+ *	@linkstate:	set link up or down
+ *	@stats_pa:	set DMA address for VF stats
+ */
+struct ionic_vf_setattr_cmd {
+	u8     opcode;
+	u8     attr;
+	__le16 vf_index;
+	union {
+		u8     macaddr[6];
+		__le16 vlanid;
+		__le32 maxrate;
+		u8     spoofchk;
+		u8     trust;
+		u8     linkstate;
+		__le64 stats_pa;
+		u8     pad[60];
+	} __attribute__((packed));
+};
+
+struct ionic_vf_setattr_comp {
+	u8     status;
+	u8     attr;
+	__le16 vf_index;
+	__le16 comp_index;
+	u8     rsvd[9];
+	u8     color;
+};
+
+/**
+ * struct ionic_vf_getattr_cmd - Get VF attributes from the NIC
+ * @opcode:     Opcode
+ * @attr:       Attribute type (enum ionic_vf_attr)
+ * @vf_index:   VF index
+ */
+struct ionic_vf_getattr_cmd {
+	u8     opcode;
+	u8     attr;
+	__le16 vf_index;
+	u8     rsvd[60];
+};
+
+struct ionic_vf_getattr_comp {
+	u8     status;
+	u8     attr;
+	__le16 vf_index;
+	union {
+		u8     macaddr[6];
+		__le16 vlanid;
+		__le32 maxrate;
+		u8     spoofchk;
+		u8     trust;
+		u8     linkstate;
+		__le64 stats_pa;
+		u8     pad[11];
+	} __attribute__((packed));
+	u8     color;
+};
+
+enum ionic_vf_ctrl_opcode {
+	IONIC_VF_CTRL_START_ALL	= 0,
+	IONIC_VF_CTRL_START 	= 1,
+};
+
+/**
+ * struct ionic_vf_ctrl - VF control command
+ * @opcode:         Opcode for the command
+ * @vf_index:       VF Index. It is unused if op START_ALL is used.
+ * @ctrl_opcode:    VF control operation type
+ */
+
+struct ionic_vf_ctrl_cmd {
+	u8	opcode;
+	u8	ctrl_opcode;
+	__le16	vf_index;
+	u8	rsvd1[60];
+};
+IONIC_CHECK_CMD_LENGTH(ionic_vf_ctrl_cmd);
+
+/**
+ * struct ionic_vf_ctrl_comp - VF_CTRL command completion.
+ * @status:     Status of the command (enum ionic_status_code)
+ */
+struct ionic_vf_ctrl_comp {
+	u8	status;
+	u8      rsvd[15];
+};
+IONIC_CHECK_COMP_LENGTH(ionic_vf_ctrl_comp);
+
+/**
+ * struct ionic_qos_identify_cmd - QoS identify command
+ * @opcode:  opcode
+ * @ver:     Highest version of identify supported by driver
+ *
+ */
+struct ionic_qos_identify_cmd {
+	u8 opcode;
+	u8 ver;
+	u8 rsvd[62];
+};
+
+/**
+ * struct ionic_qos_identify_comp - QoS identify command completion
+ * @status: Status of the command (enum ionic_status_code)
+ * @ver:    Version of identify returned by device
+ */
+struct ionic_qos_identify_comp {
+	u8 status;
+	u8 ver;
+	u8 rsvd[14];
+};
+
+#define IONIC_QOS_TC_MAX		8
+#define IONIC_QOS_ALL_TC		0xFF
+/* Capri max supported, should be renamed. */
+#define IONIC_QOS_CLASS_MAX		7
+#define IONIC_QOS_PCP_MAX		8
+#define IONIC_QOS_CLASS_NAME_SZ	32
+#define IONIC_QOS_DSCP_MAX		64
+#define IONIC_QOS_ALL_PCP		0xFF
+#define IONIC_DSCP_BLOCK_SIZE		8
+
+/**
+ * enum ionic_qos_class
+ */
+enum ionic_qos_class {
+	IONIC_QOS_CLASS_DEFAULT		= 0,
+	IONIC_QOS_CLASS_USER_DEFINED_1	= 1,
+	IONIC_QOS_CLASS_USER_DEFINED_2	= 2,
+	IONIC_QOS_CLASS_USER_DEFINED_3	= 3,
+	IONIC_QOS_CLASS_USER_DEFINED_4	= 4,
+	IONIC_QOS_CLASS_USER_DEFINED_5	= 5,
+	IONIC_QOS_CLASS_USER_DEFINED_6	= 6,
+};
+
+/**
+ * enum ionic_qos_class_type - Traffic classification criteria
+ * @IONIC_QOS_CLASS_TYPE_NONE:    No QoS
+ * @IONIC_QOS_CLASS_TYPE_PCP:     Dot1Q PCP
+ * @IONIC_QOS_CLASS_TYPE_DSCP:    IP DSCP
+ */
+enum ionic_qos_class_type {
+	IONIC_QOS_CLASS_TYPE_NONE	= 0,
+	IONIC_QOS_CLASS_TYPE_PCP	= 1,
+	IONIC_QOS_CLASS_TYPE_DSCP	= 2,
+};
+
+/**
+ * enum ionic_qos_sched_type - QoS class scheduling type
+ * @IONIC_QOS_SCHED_TYPE_STRICT:  Strict priority
+ * @IONIC_QOS_SCHED_TYPE_DWRR:    Deficit weighted round-robin
+ */
+enum ionic_qos_sched_type {
+	IONIC_QOS_SCHED_TYPE_STRICT	= 0,
+	IONIC_QOS_SCHED_TYPE_DWRR	= 1,
+};
+
+/**
+ * union ionic_qos_config - QoS configuration structure
+ * @flags:		Configuration flags
+ *	IONIC_QOS_CONFIG_F_ENABLE		enable
+ *	IONIC_QOS_CONFIG_F_NO_DROP		drop/nodrop
+ *	IONIC_QOS_CONFIG_F_RW_DOT1Q_PCP		enable dot1q pcp rewrite
+ *	IONIC_QOS_CONFIG_F_RW_IP_DSCP		enable ip dscp rewrite
+ *	IONIC_QOS_CONFIG_F_NON_DISRUPTIVE	Non-disruptive TC update
+ * @sched_type:		QoS class scheduling type (enum ionic_qos_sched_type)
+ * @class_type:		QoS class type (enum ionic_qos_class_type)
+ * @pause_type:		QoS pause type (enum ionic_qos_pause_type)
+ * @name:		QoS class name
+ * @mtu:		MTU of the class
+ * @pfc_cos:		Priority-Flow Control class of service
+ * @dwrr_weight:	QoS class scheduling weight
+ * @strict_rlmt:	Rate limit for strict priority scheduling
+ * @rw_dot1q_pcp:	Rewrite dot1q pcp to value (valid iff F_RW_DOT1Q_PCP)
+ * @rw_ip_dscp:		Rewrite ip dscp to value (valid iff F_RW_IP_DSCP)
+ * @dot1q_pcp:		Dot1q pcp value
+ * @ndscp:		Number of valid dscp values in the ip_dscp field
+ * @ip_dscp:		IP dscp values
+ */
+union ionic_qos_config {
+	struct {
+#define IONIC_QOS_CONFIG_F_ENABLE		BIT(0)
+#define IONIC_QOS_CONFIG_F_NO_DROP		BIT(1)
+/* Used to rewrite PCP or DSCP value. */
+#define IONIC_QOS_CONFIG_F_RW_DOT1Q_PCP		BIT(2)
+#define IONIC_QOS_CONFIG_F_RW_IP_DSCP		BIT(3)
+/* Non-disruptive TC update */
+#define IONIC_QOS_CONFIG_F_NON_DISRUPTIVE	BIT(4)
+		u8      flags;
+		u8      sched_type;
+		u8      class_type;
+		u8      pause_type;
+		char    name[IONIC_QOS_CLASS_NAME_SZ];
+		__le32  mtu;
+		/* flow control */
+		u8      pfc_cos;
+		/* scheduler */
+		union {
+			u8      dwrr_weight;
+			__le64  strict_rlmt;
+		};
+		/* marking */
+		/* Used to rewrite PCP or DSCP value. */
+		union {
+			u8      rw_dot1q_pcp;
+			u8      rw_ip_dscp;
+		};
+		/* classification */
+		union {
+			u8      dot1q_pcp;
+			struct {
+				u8      ndscp;
+				u8      ip_dscp[IONIC_QOS_DSCP_MAX];
+			};
+		};
+	} __attribute__((packed));
+	__le32  words[64];
+};
+
+/**
+ * union ionic_qos_identity - QoS identity structure
+ * @version:	Version of the identify structure
+ * @type:	QoS system type
+ * @nclasses:	Number of usable QoS classes
+ * @config:	Current configuration of classes
+ */
+union ionic_qos_identity {
+	struct {
+		u8     version;
+		u8     type;
+		u8     rsvd[62];
+		union ionic_qos_config config[IONIC_QOS_CLASS_MAX];
+	};
+	__le32 words[478];
+};
+
+/**
+ * struct ionic_qos_init_cmd - QoS config init command
+ * @opcode:	Opcode
+ * @group:	QoS class id
+ * @info_pa:	destination address for qos info
+ */
+struct ionic_qos_init_cmd {
+	u8     opcode;
+	u8     group;
+	u8     rsvd[6];
+	__le64 info_pa;
+	u8     rsvd1[48];
+};
+
+typedef struct ionic_admin_comp ionic_qos_init_comp;
+
+/**
+ * struct ionic_qos_reset_cmd - QoS config reset command
+ * @opcode:	Opcode
+ * @group:	QoS class id
+ */
+struct ionic_qos_reset_cmd {
+	u8    opcode;
+	u8    group;
+	u8    rsvd[62];
+};
+
+/**
+ * struct ionic_qos_clear_port_stats_cmd - Qos config reset command
+ * @opcode:	Opcode
+ */
+struct ionic_qos_clear_stats_cmd {
+	u8    opcode;
+	u8    group_bitmap;
+	u8    rsvd[62];
+};
+
+typedef struct ionic_admin_comp ionic_qos_reset_comp;
+
+/**
+ * struct ionic_fw_download_cmd - Firmware download command
+ * @opcode:	opcode
+ * @addr:	dma address of the firmware buffer
+ * @offset:	offset of the firmware buffer within the full image
+ * @length:	number of valid bytes in the firmware buffer
+ */
+struct ionic_fw_download_cmd {
+	u8     opcode;
+	u8     rsvd[3];
+	__le32 offset;
+	__le64 addr;
+	__le32 length;
+};
+
+typedef struct ionic_admin_comp ionic_fw_download_comp;
+
+/**
+ * enum ionic_fw_control_oper - FW control operations
+ * @IONIC_FW_RESET:		Reset firmware
+ * @IONIC_FW_INSTALL:   	Install firmware
+ * @IONIC_FW_ACTIVATE:  	Activate firmware
+ * @IONIC_FW_INSTALL_ASYNC:	Install firmware asynchronously
+ * @IONIC_FW_INSTALL_STATUS:	Firmware installation status
+ * @IONIC_FW_ACTIVATE_ASYNC:	Activate firmware asynchronously
+ * @IONIC_FW_ACTIVATE_STATUS:	Firmware activate status
+ */
+enum ionic_fw_control_oper {
+	IONIC_FW_RESET			= 0,
+	IONIC_FW_INSTALL		= 1,
+	IONIC_FW_ACTIVATE		= 2,
+	IONIC_FW_INSTALL_ASYNC		= 3,
+	IONIC_FW_INSTALL_STATUS		= 4,
+	IONIC_FW_ACTIVATE_ASYNC		= 5,
+	IONIC_FW_ACTIVATE_STATUS	= 6,
+	IONIC_FW_UPDATE_CLEANUP		= 7,
+	IONIC_FW_GET_BOOT           = 8,
+};
+
+enum ionic_fw_slot {
+    IONIC_FW_SLOT_INVALID   = 0,
+    IONIC_FW_SLOT_A         = 1,
+    IONIC_FW_SLOT_B         = 2,
+    IONIC_FW_SLOT_GOLD      = 3,
+};
+
+/**
+ * struct ionic_fw_control_cmd - Firmware control command
+ * @opcode:    opcode
+ * @oper:      firmware control operation (enum ionic_fw_control_oper)
+ * @slot:      slot to activate
+ */
+struct ionic_fw_control_cmd {
+	u8  opcode;
+	u8  rsvd[3];
+	u8  oper;
+	u8  slot;
+	u8  rsvd1[58];
+};
+
+/**
+ * struct ionic_fw_control_comp - Firmware control copletion
+ * @status:     Status of the command (enum ionic_status_code)
+ * @comp_index: Index in the descriptor ring for which this is the completion
+ * @slot:       Slot where the firmware was installed
+ * @color:      Color bit
+ */
+struct ionic_fw_control_comp {
+	u8     status;
+	u8     rsvd;
+	__le16 comp_index;
+	u8     slot;
+	u8     rsvd1[10];
+	u8     color;
+};
+
+/******************************************************************
+ ******************* RDMA Commands ********************************
+ ******************************************************************/
+
+/**
+ * struct ionic_rdma_reset_cmd - Reset RDMA LIF cmd
+ * @opcode:        opcode
+ * @lif_index:     LIF index
+ *
+ * There is no RDMA specific dev command completion struct.  Completion uses
+ * the common struct ionic_admin_comp.  Only the status is indicated.
+ * Nonzero status means the LIF does not support RDMA.
+ **/
+struct ionic_rdma_reset_cmd {
+	u8     opcode;
+	u8     rsvd;
+	__le16 lif_index;
+	u8     rsvd2[60];
+};
+
+/**
+ * struct ionic_rdma_queue_cmd - Create RDMA Queue command
+ * @opcode:        opcode, 52, 53
+ * @lif_index:     LIF index
+ * @qid_ver:       (qid | (RDMA version << 24))
+ * @cid:           intr, eq_id, or cq_id
+ * @dbid:          doorbell page id
+ * @depth_log2:    log base two of queue depth
+ * @stride_log2:   log base two of queue stride
+ * @dma_addr:      address of the queue memory
+ *
+ * The same command struct is used to create an RDMA event queue, completion
+ * queue, or RDMA admin queue.  The cid is an interrupt number for an event
+ * queue, an event queue id for a completion queue, or a completion queue id
+ * for an RDMA admin queue.
+ *
+ * The queue created via a dev command must be contiguous in dma space.
+ *
+ * The dev commands are intended only to be used during driver initialization,
+ * to create queues supporting the RDMA admin queue.  Other queues, and other
+ * types of RDMA resources like memory regions, will be created and registered
+ * via the RDMA admin queue, and will support a more complete interface
+ * providing scatter gather lists for larger, scattered queue buffers and
+ * memory registration.
+ *
+ * There is no RDMA specific dev command completion struct.  Completion uses
+ * the common struct ionic_admin_comp.  Only the status is indicated.
+ **/
+struct ionic_rdma_queue_cmd {
+	u8     opcode;
+	u8     rsvd;
+	__le16 lif_index;
+	__le32 qid_ver;
+	__le32 cid;
+	__le16 dbid;
+	u8     depth_log2;
+	u8     stride_log2;
+	__le64 dma_addr;
+	u8     rsvd2[40];
+};
+
+/******************************************************************
+ ******************* HII Commands *********************************
+ ******************************************************************/
+#define IONIC_HII_IDENTITY_VERSION	1
+
+/**
+ * struct ionic_hii_identify_cmd - HII identify command
+ * @opcode:  opcode
+ * @ver:     Highest version of identify supported by driver
+ */
+struct ionic_hii_identify_cmd {
+	u8 opcode;
+	u8 ver;
+	u8 rsvd[62];
+};
+
+IONIC_CHECK_CMD_LENGTH(ionic_hii_identify_cmd);
+
+/**
+ * struct ionic_hii_identify_comp - HII identify command completion
+ * @status: Status of the command (enum ionic_status_code)
+ * @ver:    Version of identify returned by device
+ */
+struct ionic_hii_identify_comp {
+	u8 status;
+	u8 ver;
+	u8 rsvd[14];
+};
+
+IONIC_CHECK_COMP_LENGTH(ionic_hii_identify_comp);
+
+/**
+ * enum ionic_hii_capabilities - Bitmap of HII capabilities
+ * @IONIC_HII_CAPABILITY_NCSI:   NCSI is supported
+ */
+enum ionic_hii_capabilities {
+	IONIC_HII_CAPABILITY_NCSI = 0,
+	IONIC_HII_CAPABILITY_OOB  = 1,
+};
+
+/**
+ * union ionic_hii_dev_identity - HII identity information
+ * @ver:    		HII Identify version
+ * @oob_en:    		Enable out of band management
+ * @uid_led_on:		Turn on the UID led
+ * @vlan_en:   		Enable pxe vlan
+ * @vlan:		Vlan id used for pxe
+ * @capabilities:	Bitmap of capabilities supported by nic
+ */
+union ionic_hii_dev_identity {
+	struct {
+		u8	ver;
+		u8     	oob_en;
+		u8     	uid_led_on;
+		u8     	vlan_en;
+		__le16 	vlan;
+		__le32 	capabilities;
+	};
+	__le32 words[478];
+};
+
+IONIC_CHECK_CMD_DATA_LENGTH(ionic_hii_dev_identity);
+
+/**
+ * struct ionic_hii_init_cmd - HII initialization command
+ * @opcode:		opcode
+ * @oob_en:		Enable out of band management
+ * @uid_led_on:		Turn on the UID led
+ * @vlan_en:		Enable pxe vlan
+ * @vlan:		Vlan id used for pxe
+ */
+struct ionic_hii_init_cmd {
+	u8     opcode;
+	u8     oob_en;
+	u8     uid_led_on;
+	u8     vlan_en;
+	__le16 vlan;
+	u8     rsvd[58];
+};
+
+IONIC_CHECK_CMD_LENGTH(ionic_hii_init_cmd);
+
+/**
+ * struct ionic_hii_init_comp - HII initialization command completion
+ * @status: 	Status of the command (enum ionic_status_code)
+ */
+struct ionic_hii_init_comp {
+	u8 status;
+	u8 rsvd[15];
+};
+
+IONIC_CHECK_COMP_LENGTH(ionic_hii_init_comp);
+
+/**
+ * enum ionic_hii_attr - List of HII attributes
+ * @IONIC_HII_ATTR_OOB_EN:      HII OOB enable atrribute
+ * @IONIC_HII_ATTR_UID_LED:   	HII set UID led atrribute
+ * @IONIC_HII_ATTR_VLAN:        HII PXE vlan atrribute
+ */
+enum ionic_hii_attr {
+	IONIC_HII_ATTR_OOB_EN	= 0,
+	IONIC_HII_ATTR_UID_LED	= 1,
+	IONIC_HII_ATTR_VLAN	= 2,
+};
+
+/**
+ * struct ionic_hii_setattr_cmd - Set hii attributes on the NIC
+ * @opcode:         Opcode
+ * @attr:           Atrribute type (enum ionic_hii_attr)
+ * @oob_en:         Enable out of band management
+ * @uid_led_on:    Turn on the UID led
+ * @vlan:           VLAN attributes
+ *                  @enable:    Enable pxe vlan
+ *                  @id:        Pxe vlan id
+ */
+struct ionic_hii_setattr_cmd {
+	u8     opcode;
+	u8     attr;
+	union {
+		u8     oob_en;
+		u8     uid_led_on;
+		struct {
+			u8     enable;
+			u8     rsvd;
+			__le16 id;
+		} vlan;
+		u8      rsvd2[62];
+	};
+};
+
+IONIC_CHECK_CMD_LENGTH(ionic_hii_setattr_cmd);
+
+/**
+ * struct ionic_hii_setattr_comp - Hii set attr command completion
+ * @status:     Status of the command (enum ionic_status_code)
+ * @color:      Color bit
+ */
+struct ionic_hii_setattr_comp {
+	u8     status;
+	u8     rsvd[14];
+	u8     color;
+};
+
+IONIC_CHECK_COMP_LENGTH(ionic_hii_setattr_comp);
+
+/**
+ * struct ionic_hii_getattr_cmd - Get hii attributes from the NIC
+ * @opcode:     Opcode
+ * @attr:       Attribute type (enum ionic_hii_attr)
+ */
+struct ionic_hii_getattr_cmd {
+	u8     opcode;
+	u8     attr;
+	u8     rsvd[62];
+};
+
+IONIC_CHECK_CMD_LENGTH(ionic_hii_getattr_cmd);
+
+/**
+ * struct ionic_hii_getattr_comp - Hii get attr command completion
+ * @status:         Status of the command (enum ionic_status_code)
+ * @oob_en:         Enable out of band management
+ * @uid_led_on:    Turn on the UID led
+ * @vlan:           VLAN attributes:
+ *                  @enable:    Enable pxe vlan
+ *                  @id:        Pxe vlan id
+ * @color:          Color bit
+ */
+struct ionic_hii_getattr_comp {
+	u8     status;
+	u8     rsvd[3];
+	union {
+		u8     oob_en;
+		u8     uid_led_on;
+		struct {
+			u8     enable;
+			u8     rsvd2;
+			__le16 id;
+		} vlan;
+		u8      rsvd3[11];
+	} __attribute__((packed));
+	u8     color;
+};
+
+#ifndef __CHECKER__
+IONIC_CHECK_COMP_LENGTH(ionic_hii_getattr_comp);
+#endif
+
+/**
+ * struct ionic_hii_reset_cmd - HII configuration reset command
+ * @opcode:    opcode
+ */
+struct ionic_hii_reset_cmd {
+	u8 opcode;
+	u8 rsvd[63];
+};
+
+IONIC_CHECK_CMD_LENGTH(ionic_hii_reset_cmd);
+
+/**
+ * struct ionic_hii_reset_comp - HII reset command completion
+ * @status: Status of the command (enum ionic_status_code)
+ */
+struct ionic_hii_reset_comp {
+	u8 status;
+	u8 rsvd[15];
+};
+
+IONIC_CHECK_COMP_LENGTH(ionic_hii_reset_comp);
+
+/******************************************************************
+ ******************* Notify Events ********************************
+ ******************************************************************/
+
+/**
+ * struct ionic_notifyq_event - Generic event reporting structure
+ * @eid:   event number
+ * @ecode: event code
+ * @data:  unspecified data about the event
+ *
+ * This is the generic event report struct from which the other
+ * actual events will be formed.
+ */
+struct ionic_notifyq_event {
+	__le64 eid;
+	__le16 ecode;
+	u8     data[54];
+};
+
+/**
+ * struct ionic_link_change_event - Link change event notification
+ * @eid:		event number
+ * @ecode:		event code = IONIC_EVENT_LINK_CHANGE
+ * @link_status:	link up/down, with error bits (enum ionic_port_status)
+ * @link_speed:		speed of the network link
+ *
+ * Sent when the network link state changes between UP and DOWN
+ */
+struct ionic_link_change_event {
+	__le64 eid;
+	__le16 ecode;
+	__le16 link_status;
+	__le32 link_speed;	/* units of 1Mbps: e.g. 10000 = 10Gbps */
+	u8     rsvd[48];
+};
+
+/**
+ * struct ionic_reset_event - Reset event notification
+ * @eid:		event number
+ * @ecode:		event code = IONIC_EVENT_RESET
+ * @reset_code:		reset type
+ * @state:		0=pending, 1=complete, 2=error
+ *
+ * Sent when the NIC or some subsystem is going to be or
+ * has been reset.
+ */
+struct ionic_reset_event {
+	__le64 eid;
+	__le16 ecode;
+	u8     reset_code;
+	u8     state;
+	u8     rsvd[52];
+};
+
+/**
+ * struct ionic_heartbeat_event - Sent periodically by NIC to indicate health
+ * @eid:	event number
+ * @ecode:	event code = IONIC_EVENT_HEARTBEAT
+ */
+struct ionic_heartbeat_event {
+	__le64 eid;
+	__le16 ecode;
+	u8     rsvd[54];
+};
+
+/**
+ * struct ionic_log_event - Sent to notify the driver of an internal error
+ * @eid:	event number
+ * @ecode:	event code = IONIC_EVENT_LOG
+ * @data:	log data
+ */
+struct ionic_log_event {
+	__le64 eid;
+	__le16 ecode;
+	u8     data[54];
+};
+
+/**
+ * struct ionic_xcvr_event - Transceiver change event
+ * @eid:	event number
+ * @ecode:	event code = IONIC_EVENT_XCVR
+ */
+struct ionic_xcvr_event {
+	__le64 eid;
+	__le16 ecode;
+	u8     rsvd[54];
+};
+
+/**
+ * struct ionic_port_stats - Port statistics structure
+ */
+struct ionic_port_stats {
+	__le64 frames_rx_ok;
+	__le64 frames_rx_all;
+	__le64 frames_rx_bad_fcs;
+	__le64 frames_rx_bad_all;
+	__le64 octets_rx_ok;
+	__le64 octets_rx_all;
+	__le64 frames_rx_unicast;
+	__le64 frames_rx_multicast;
+	__le64 frames_rx_broadcast;
+	__le64 frames_rx_pause;
+	__le64 frames_rx_bad_length;
+	__le64 frames_rx_undersized;
+	__le64 frames_rx_oversized;
+	__le64 frames_rx_fragments;
+	__le64 frames_rx_jabber;
+	__le64 frames_rx_pripause;
+	__le64 frames_rx_stomped_crc;
+	__le64 frames_rx_too_long;
+	__le64 frames_rx_vlan_good;
+	__le64 frames_rx_dropped;
+	__le64 frames_rx_less_than_64b;
+	__le64 frames_rx_64b;
+	__le64 frames_rx_65b_127b;
+	__le64 frames_rx_128b_255b;
+	__le64 frames_rx_256b_511b;
+	__le64 frames_rx_512b_1023b;
+	__le64 frames_rx_1024b_1518b;
+	__le64 frames_rx_1519b_2047b;
+	__le64 frames_rx_2048b_4095b;
+	__le64 frames_rx_4096b_8191b;
+	__le64 frames_rx_8192b_9215b;
+	__le64 frames_rx_other;
+	__le64 frames_tx_ok;
+	__le64 frames_tx_all;
+	__le64 frames_tx_bad;
+	__le64 octets_tx_ok;
+	__le64 octets_tx_total;
+	__le64 frames_tx_unicast;
+	__le64 frames_tx_multicast;
+	__le64 frames_tx_broadcast;
+	__le64 frames_tx_pause;
+	__le64 frames_tx_pripause;
+	__le64 frames_tx_vlan;
+	__le64 frames_tx_less_than_64b;
+	__le64 frames_tx_64b;
+	__le64 frames_tx_65b_127b;
+	__le64 frames_tx_128b_255b;
+	__le64 frames_tx_256b_511b;
+	__le64 frames_tx_512b_1023b;
+	__le64 frames_tx_1024b_1518b;
+	__le64 frames_tx_1519b_2047b;
+	__le64 frames_tx_2048b_4095b;
+	__le64 frames_tx_4096b_8191b;
+	__le64 frames_tx_8192b_9215b;
+	__le64 frames_tx_other;
+	__le64 frames_tx_pri_0;
+	__le64 frames_tx_pri_1;
+	__le64 frames_tx_pri_2;
+	__le64 frames_tx_pri_3;
+	__le64 frames_tx_pri_4;
+	__le64 frames_tx_pri_5;
+	__le64 frames_tx_pri_6;
+	__le64 frames_tx_pri_7;
+	__le64 frames_rx_pri_0;
+	__le64 frames_rx_pri_1;
+	__le64 frames_rx_pri_2;
+	__le64 frames_rx_pri_3;
+	__le64 frames_rx_pri_4;
+	__le64 frames_rx_pri_5;
+	__le64 frames_rx_pri_6;
+	__le64 frames_rx_pri_7;
+	__le64 tx_pripause_0_1us_count;
+	__le64 tx_pripause_1_1us_count;
+	__le64 tx_pripause_2_1us_count;
+	__le64 tx_pripause_3_1us_count;
+	__le64 tx_pripause_4_1us_count;
+	__le64 tx_pripause_5_1us_count;
+	__le64 tx_pripause_6_1us_count;
+	__le64 tx_pripause_7_1us_count;
+	__le64 rx_pripause_0_1us_count;
+	__le64 rx_pripause_1_1us_count;
+	__le64 rx_pripause_2_1us_count;
+	__le64 rx_pripause_3_1us_count;
+	__le64 rx_pripause_4_1us_count;
+	__le64 rx_pripause_5_1us_count;
+	__le64 rx_pripause_6_1us_count;
+	__le64 rx_pripause_7_1us_count;
+	__le64 rx_pause_1us_count;
+	__le64 frames_tx_truncated;
+};
+
+struct ionic_mgmt_port_stats {
+	__le64 frames_rx_ok;
+	__le64 frames_rx_all;
+	__le64 frames_rx_bad_fcs;
+	__le64 frames_rx_bad_all;
+	__le64 octets_rx_ok;
+	__le64 octets_rx_all;
+	__le64 frames_rx_unicast;
+	__le64 frames_rx_multicast;
+	__le64 frames_rx_broadcast;
+	__le64 frames_rx_pause;
+	__le64 frames_rx_bad_length;
+	__le64 frames_rx_undersized;
+	__le64 frames_rx_oversized;
+	__le64 frames_rx_fragments;
+	__le64 frames_rx_jabber;
+	__le64 frames_rx_64b;
+	__le64 frames_rx_65b_127b;
+	__le64 frames_rx_128b_255b;
+	__le64 frames_rx_256b_511b;
+	__le64 frames_rx_512b_1023b;
+	__le64 frames_rx_1024b_1518b;
+	__le64 frames_rx_gt_1518b;
+	__le64 frames_rx_fifo_full;
+	__le64 frames_tx_ok;
+	__le64 frames_tx_all;
+	__le64 frames_tx_bad;
+	__le64 octets_tx_ok;
+	__le64 octets_tx_total;
+	__le64 frames_tx_unicast;
+	__le64 frames_tx_multicast;
+	__le64 frames_tx_broadcast;
+	__le64 frames_tx_pause;
+};
+
+enum ionic_pb_buffer_drop_stats {
+	IONIC_BUFFER_INTRINSIC_DROP = 0,
+	IONIC_BUFFER_DISCARDED,
+	IONIC_BUFFER_ADMITTED,
+	IONIC_BUFFER_OUT_OF_CELLS_DROP,
+	IONIC_BUFFER_OUT_OF_CELLS_DROP_2,
+	IONIC_BUFFER_OUT_OF_CREDIT_DROP,
+	IONIC_BUFFER_TRUNCATION_DROP,
+	IONIC_BUFFER_PORT_DISABLED_DROP,
+	IONIC_BUFFER_COPY_TO_CPU_TAIL_DROP,
+	IONIC_BUFFER_SPAN_TAIL_DROP,
+	IONIC_BUFFER_MIN_SIZE_VIOLATION_DROP,
+	IONIC_BUFFER_ENQUEUE_ERROR_DROP,
+	IONIC_BUFFER_INVALID_PORT_DROP,
+	IONIC_BUFFER_INVALID_OUTPUT_QUEUE_DROP,
+	IONIC_BUFFER_DROP_MAX,
+};
+
+enum ionic_oflow_drop_stats {
+	IONIC_OFLOW_OCCUPANCY_DROP,
+	IONIC_OFLOW_EMERGENCY_STOP_DROP,
+	IONIC_OFLOW_WRITE_BUFFER_ACK_FILL_UP_DROP,
+	IONIC_OFLOW_WRITE_BUFFER_ACK_FULL_DROP,
+	IONIC_OFLOW_WRITE_BUFFER_FULL_DROP,
+	IONIC_OFLOW_CONTROL_FIFO_FULL_DROP,
+	IONIC_OFLOW_DROP_MAX,
+};
+
+/**
+ * struct port_pb_stats - packet buffers system stats
+ * uses ionic_pb_buffer_drop_stats for drop_counts[]
+ */
+struct ionic_port_pb_stats {
+	__le64 sop_count_in;
+	__le64 eop_count_in;
+	__le64 sop_count_out;
+	__le64 eop_count_out;
+	__le64 drop_counts[IONIC_BUFFER_DROP_MAX];
+	__le64 input_queue_buffer_occupancy[IONIC_QOS_TC_MAX];
+	__le64 input_queue_port_monitor[IONIC_QOS_TC_MAX];
+	__le64 output_queue_port_monitor[IONIC_QOS_TC_MAX];
+	__le64 oflow_drop_counts[IONIC_OFLOW_DROP_MAX];
+	__le64 input_queue_good_pkts_in[IONIC_QOS_TC_MAX];
+	__le64 input_queue_good_pkts_out[IONIC_QOS_TC_MAX];
+	__le64 input_queue_err_pkts_in[IONIC_QOS_TC_MAX];
+	__le64 input_queue_fifo_depth[IONIC_QOS_TC_MAX];
+	__le64 input_queue_max_fifo_depth[IONIC_QOS_TC_MAX];
+	__le64 input_queue_peak_occupancy[IONIC_QOS_TC_MAX];
+	__le64 output_queue_buffer_occupancy[IONIC_QOS_TC_MAX];
+};
+
+/**
+ * enum ionic_port_type - Port types
+ * @IONIC_ETH_UNKNOWN:             Port type not configured
+ * @IONIC_ETH_HOST:                Port carries ethernet traffic (inband)
+ * @IONIC_ETH_HOST_MGMT:           Port carries mgmt traffic (out-of-band)
+ * @IONIC_ETH_MNIC_OOB_MGMT:
+ * @IONIC_ETH_MNIC_INTERNAL_MGMT:
+ * @IONIC_ETH_MNIC_INBAND_MGMT:
+ * @IONIC_ETH_MNIC_CPU:
+ * @IONIC_ETH_MNIC_LEARN:
+ * @IONIC_ETH_MNIC_CONTROL:
+ */
+enum ionic_port_type {
+	IONIC_ETH_UNKNOWN,
+	IONIC_ETH_HOST,
+	IONIC_ETH_HOST_MGMT,
+	IONIC_ETH_MNIC_OOB_MGMT,
+	IONIC_ETH_MNIC_INTERNAL_MGMT,
+	IONIC_ETH_MNIC_INBAND_MGMT,
+	IONIC_ETH_MNIC_CPU,
+	IONIC_ETH_MNIC_LEARN,
+	IONIC_ETH_MNIC_CONTROL,
+};
+
+/**
+ * struct ionic_port_identity - port identity structure
+ * @version:        identity structure version
+ * @type:           type of port (enum ionic_port_type)
+ * @num_lanes:      number of lanes for the port
+ * @autoneg:        autoneg supported
+ * @min_frame_size: minimum frame size supported
+ * @max_frame_size: maximum frame size supported
+ * @fec_type:       supported fec types
+ * @pause_type:     supported pause types
+ * @loopback_mode:  supported loopback mode
+ * @speeds:         supported speeds
+ * @config:         current port configuration
+ */
+union ionic_port_identity {
+	struct {
+		u8     version;
+		u8     type;
+		u8     num_lanes;
+		u8     autoneg;
+		__le32 min_frame_size;
+		__le32 max_frame_size;
+		u8     fec_type[4];
+		u8     pause_type[2];
+		u8     loopback_mode[2];
+		__le32 speeds[16];
+		u8     rsvd2[44];
+		union ionic_port_config config;
+	};
+	__le32 words[478];
+};
+
+/**
+ * struct ionic_port_info - port info structure
+ * @config:          Port configuration data
+ * @status:          Port status data
+ * @stats:           Port statistics data
+ * @mgmt_stats:      Port management statistics data
+ * @port_pb_drop_stats:   uplink pb drop stats
+ */
+struct ionic_port_info {
+	union ionic_port_config config;
+	struct ionic_port_status status;
+	union {
+		struct ionic_port_stats      stats;
+		struct ionic_mgmt_port_stats mgmt_stats;
+	};
+	/* room for pb_stats to start at 2k offset */
+	u8                          rsvd[760];
+	struct ionic_port_pb_stats  pb_stats;
+};
+
+/**
+ * struct ionic_lif_stats - LIF statistics structure
+ */
+struct ionic_lif_stats {
+	/* RX */
+	__le64 rx_ucast_bytes;
+	__le64 rx_ucast_packets;
+	__le64 rx_mcast_bytes;
+	__le64 rx_mcast_packets;
+	__le64 rx_bcast_bytes;
+	__le64 rx_bcast_packets;
+	__le64 rsvd0;
+	__le64 rsvd1;
+	/* RX drops */
+	__le64 rx_ucast_drop_bytes;
+	__le64 rx_ucast_drop_packets;
+	__le64 rx_mcast_drop_bytes;
+	__le64 rx_mcast_drop_packets;
+	__le64 rx_bcast_drop_bytes;
+	__le64 rx_bcast_drop_packets;
+	__le64 rx_dma_error;
+	__le64 rsvd2;
+	/* TX */
+	__le64 tx_ucast_bytes;
+	__le64 tx_ucast_packets;
+	__le64 tx_mcast_bytes;
+	__le64 tx_mcast_packets;
+	__le64 tx_bcast_bytes;
+	__le64 tx_bcast_packets;
+	__le64 rsvd3;
+	__le64 rsvd4;
+	/* TX drops */
+	__le64 tx_ucast_drop_bytes;
+	__le64 tx_ucast_drop_packets;
+	__le64 tx_mcast_drop_bytes;
+	__le64 tx_mcast_drop_packets;
+	__le64 tx_bcast_drop_bytes;
+	__le64 tx_bcast_drop_packets;
+	__le64 tx_dma_error;
+	__le64 rsvd5;
+	/* Rx Queue/Ring drops */
+	__le64 rx_queue_disabled;
+	__le64 rx_queue_empty;
+	__le64 rx_queue_error;
+	__le64 rx_desc_fetch_error;
+	__le64 rx_desc_data_error;
+	__le64 rsvd6;
+	__le64 rsvd7;
+	__le64 rsvd8;
+	/* Tx Queue/Ring drops */
+	__le64 tx_queue_disabled;
+	__le64 tx_queue_error;
+	__le64 tx_desc_fetch_error;
+	__le64 tx_desc_data_error;
+	__le64 tx_queue_empty;
+	__le64 rsvd10;
+	__le64 rsvd11;
+	__le64 rsvd12;
+
+	/* RDMA/ROCE TX */
+	__le64 tx_rdma_ucast_bytes;
+	__le64 tx_rdma_ucast_packets;
+	__le64 tx_rdma_mcast_bytes;
+	__le64 tx_rdma_mcast_packets;
+	__le64 tx_rdma_cnp_packets;
+	__le64 rsvd13;
+	__le64 rsvd14;
+	__le64 rsvd15;
+
+	/* RDMA/ROCE RX */
+	__le64 rx_rdma_ucast_bytes;
+	__le64 rx_rdma_ucast_packets;
+	__le64 rx_rdma_mcast_bytes;
+	__le64 rx_rdma_mcast_packets;
+	__le64 rx_rdma_cnp_packets;
+	__le64 rx_rdma_ecn_packets;
+	__le64 rsvd16;
+	__le64 rsvd17;
+
+	__le64 rsvd18;
+	__le64 rsvd19;
+	__le64 rsvd20;
+	__le64 rsvd21;
+	__le64 rsvd22;
+	__le64 rsvd23;
+	__le64 rsvd24;
+	__le64 rsvd25;
+
+	__le64 rsvd26;
+	__le64 rsvd27;
+	__le64 rsvd28;
+	__le64 rsvd29;
+	__le64 rsvd30;
+	__le64 rsvd31;
+	__le64 rsvd32;
+	__le64 rsvd33;
+
+	__le64 rsvd34;
+	__le64 rsvd35;
+	__le64 rsvd36;
+	__le64 rsvd37;
+	__le64 rsvd38;
+	__le64 rsvd39;
+	__le64 rsvd40;
+	__le64 rsvd41;
+
+	__le64 rsvd42;
+	__le64 rsvd43;
+	__le64 rsvd44;
+	__le64 rsvd45;
+	__le64 rsvd46;
+	__le64 rsvd47;
+	__le64 rsvd48;
+	__le64 rsvd49;
+
+	/* RDMA/ROCE REQ Error/Debugs (768 - 895) */
+	__le64 rdma_req_rx_pkt_seq_err;
+	__le64 rdma_req_rx_rnr_retry_err;
+	__le64 rdma_req_rx_remote_access_err;
+	__le64 rdma_req_rx_remote_inv_req_err;
+	__le64 rdma_req_rx_remote_oper_err;
+	__le64 rdma_req_rx_implied_nak_seq_err;
+	__le64 rdma_req_rx_cqe_err;
+	__le64 rdma_req_rx_cqe_flush_err;
+
+	__le64 rdma_req_rx_dup_responses;
+	__le64 rdma_req_rx_invalid_packets;
+	__le64 rdma_req_tx_local_access_err;
+	__le64 rdma_req_tx_local_oper_err;
+	__le64 rdma_req_tx_memory_mgmt_err;
+	__le64 rsvd52;
+	__le64 rsvd53;
+	__le64 rsvd54;
+
+	/* RDMA/ROCE RESP Error/Debugs (896 - 1023) */
+	__le64 rdma_resp_rx_dup_requests;
+	__le64 rdma_resp_rx_out_of_buffer;
+	__le64 rdma_resp_rx_out_of_seq_pkts;
+	__le64 rdma_resp_rx_cqe_err;
+	__le64 rdma_resp_rx_cqe_flush_err;
+	__le64 rdma_resp_rx_local_len_err;
+	__le64 rdma_resp_rx_inv_request_err;
+	__le64 rdma_resp_rx_local_qp_oper_err;
+
+	__le64 rdma_resp_rx_out_of_atomic_resource;
+	__le64 rdma_resp_tx_pkt_seq_err;
+	__le64 rdma_resp_tx_remote_inv_req_err;
+	__le64 rdma_resp_tx_remote_access_err;
+	__le64 rdma_resp_tx_remote_oper_err;
+	__le64 rdma_resp_tx_rnr_retry_err;
+	__le64 rsvd57;
+	__le64 rsvd58;
+};
+
+/**
+ * struct ionic_lif_info - LIF info structure
+ * @config:	LIF configuration structure
+ * @status:	LIF status structure
+ * @stats:	LIF statistics structure
+ */
+struct ionic_lif_info {
+	union ionic_lif_config config;
+	struct ionic_lif_status status;
+	struct ionic_lif_stats stats;
+};
+
+union ionic_dev_cmd {
+	u32 words[16];
+	struct ionic_admin_cmd cmd;
+	struct ionic_nop_cmd nop;
+
+	struct ionic_dev_identify_cmd identify;
+	struct ionic_dev_init_cmd init;
+	struct ionic_dev_reset_cmd reset;
+	struct ionic_dev_getattr_cmd getattr;
+	struct ionic_dev_setattr_cmd setattr;
+	struct ionic_dev_debug_cmd debug;
+
+	struct ionic_port_identify_cmd port_identify;
+	struct ionic_port_init_cmd port_init;
+	struct ionic_port_reset_cmd port_reset;
+	struct ionic_port_getattr_cmd port_getattr;
+	struct ionic_port_setattr_cmd port_setattr;
+
+	struct ionic_vf_setattr_cmd vf_setattr;
+	struct ionic_vf_getattr_cmd vf_getattr;
+	struct ionic_vf_ctrl_cmd vf_ctrl;
+
+	struct ionic_lif_identify_cmd lif_identify;
+	struct ionic_lif_init_cmd lif_init;
+	struct ionic_lif_reset_cmd lif_reset;
+
+	struct ionic_qos_identify_cmd qos_identify;
+	struct ionic_qos_init_cmd qos_init;
+	struct ionic_qos_reset_cmd qos_reset;
+	struct ionic_qos_clear_stats_cmd qos_clear_stats;
+
+	struct ionic_q_identify_cmd q_identify;
+	struct ionic_q_init_cmd q_init;
+	struct ionic_q_control_cmd q_control;
+
+	struct ionic_fw_download_cmd fw_download;
+	struct ionic_fw_control_cmd fw_control;
+
+	struct ionic_hii_identify_cmd hii_identify;
+	struct ionic_hii_init_cmd hii_init;
+	struct ionic_hii_setattr_cmd hii_setattr;
+	struct ionic_hii_getattr_cmd hii_getattr;
+	struct ionic_hii_reset_cmd hii_reset;
+
+	struct ionic_upt_cmd upt_cmd;
+};
+
+union ionic_dev_cmd_comp {
+	u32 words[4];
+	u8 status;
+	struct ionic_admin_comp comp;
+	struct ionic_nop_comp nop;
+
+	struct ionic_dev_identify_comp identify;
+	struct ionic_dev_init_comp init;
+	struct ionic_dev_reset_comp reset;
+	struct ionic_dev_getattr_comp getattr;
+	struct ionic_dev_setattr_comp setattr;
+	struct ionic_dev_debug_comp debug;
+
+	struct ionic_port_identify_comp port_identify;
+	struct ionic_port_init_comp port_init;
+	struct ionic_port_reset_comp port_reset;
+	struct ionic_port_getattr_comp port_getattr;
+	struct ionic_port_setattr_comp port_setattr;
+
+	struct ionic_vf_setattr_comp vf_setattr;
+	struct ionic_vf_getattr_comp vf_getattr;
+	struct ionic_vf_ctrl_comp vf_ctrl;
+
+	struct ionic_lif_identify_comp lif_identify;
+	struct ionic_lif_init_comp lif_init;
+	ionic_lif_reset_comp lif_reset;
+
+	struct ionic_qos_identify_comp qos_identify;
+	ionic_qos_init_comp qos_init;
+	ionic_qos_reset_comp qos_reset;
+
+	struct ionic_q_identify_comp q_identify;
+	struct ionic_q_init_comp q_init;
+
+	ionic_fw_download_comp fw_download;
+	struct ionic_fw_control_comp fw_control;
+
+	struct ionic_hii_identify_comp hii_identify;
+	struct ionic_hii_init_comp hii_init;
+	struct ionic_hii_setattr_comp hii_setattr;
+	struct ionic_hii_getattr_comp hii_getattr;
+	struct ionic_hii_reset_comp hii_reset;
+
+	struct ionic_upt_comp upt_comp;
+};
+
+/**
+ * struct ionic_oprom_regs - Oprom debug/enable and bmp registers
+ * @oprom_log_level: Variables indicates whether Oprom log to be printed or not
+ * @oprom_reserved : Reserved for future use and make it as 32 byte alignment of oprom_regs.
+ */
+#define IONIC_DEVINFO_OPROM_RESERVED   31
+struct ionic_oprom_regs {
+	u8    oprom_log_level;
+	u8    oprom_reserved[IONIC_DEVINFO_OPROM_RESERVED];
+};
+IONIC_CHECK_OPROM_LENGTH(ionic_oprom_regs);
+
+/**
+ * struct ionic_hwstamp_regs - Hardware current timestamp registers
+ * @tick_low:        Low 32 bits of hardware timestamp
+ * @tick_high:       High 32 bits of hardware timestamp
+ */
+struct ionic_hwstamp_regs {
+	u32    tick_low;
+	u32    tick_high;
+};
+
+/**
+ * union ionic_dev_info_regs - Device info register format (read-only)
+ * @signature:       Signature value of 0x44455649 ('DEVI')
+ * @version:         Current version of info
+ * @asic_type:       Asic type
+ * @asic_rev:        Asic revision
+ * @fw_status:       Firmware status
+ *			bit 0   - 1 = fw running
+ *			bit 4-7 - 4 bit generation number, changes on fw restart
+ * @fw_heartbeat:    Firmware heartbeat counter
+ * @serial_num:      Serial number
+ * @fw_version:      Firmware version
+ * @oprom_regs:      oprom_regs to store oprom debug enable/disable and bmp
+ * @hwstamp_regs:    Hardware current timestamp registers
+ */
+union ionic_dev_info_regs {
+#define IONIC_DEVINFO_FWVERS_BUFLEN 32
+#define IONIC_DEVINFO_SERIAL_BUFLEN 32
+	struct {
+		u32    signature;
+		u8     version;
+		u8     asic_type;
+		u8     asic_rev;
+#define IONIC_FW_STS_F_RUNNING		0x01
+#define IONIC_FW_STS_F_GENERATION	0xF0
+		u8     fw_status;
+		u32    fw_heartbeat;
+		char   fw_version[IONIC_DEVINFO_FWVERS_BUFLEN];
+		char   serial_num[IONIC_DEVINFO_SERIAL_BUFLEN];
+		struct ionic_oprom_regs oprom_regs;
+		u8     rsvd_pad1024[916];
+		struct ionic_hwstamp_regs hwstamp;
+	};
+	u32 words[512];
+};
+IONIC_CHECK_DEV_INFO_REGS_LENGTH(ionic_dev_info_regs);
+
+/**
+ * union ionic_dev_cmd_regs - Device command register format (read-write)
+ * @doorbell:        Device Cmd Doorbell, write-only
+ *                   Write a 1 to signal device to process cmd,
+ *                   poll done for completion.
+ * @done:            Done indicator, bit 0 == 1 when command is complete
+ * @cmd:             Opcode-specific command bytes
+ * @comp:            Opcode-specific response bytes
+ * @data:            Opcode-specific side-data
+ */
+union ionic_dev_cmd_regs {
+	struct {
+		u32                   doorbell;
+		u32                   done;
+		union ionic_dev_cmd         cmd;
+		union ionic_dev_cmd_comp    comp;
+		u8                    rsvd[48];
+		u32                   data[478];
+	} __attribute__((packed));
+	u32 words[512];
+};
+
+/**
+ * union ionic_dev_regs - Device register format for bar 0 page 0
+ * @info:            Device info registers
+ * @devcmd:          Device command registers
+ */
+union ionic_dev_regs {
+	struct {
+		union ionic_dev_info_regs info;
+		union ionic_dev_cmd_regs  devcmd;
+	} __attribute__((packed));
+	__le32 words[1024];
+};
+
+union ionic_adminq_cmd {
+	struct ionic_admin_cmd cmd;
+	struct ionic_nop_cmd nop;
+	struct ionic_q_identify_cmd q_identify;
+	struct ionic_q_init_cmd q_init;
+	struct ionic_q_control_cmd q_control;
+	struct ionic_lif_setattr_cmd lif_setattr;
+	struct ionic_lif_getattr_cmd lif_getattr;
+	struct ionic_lif_setphc_cmd lif_setphc;
+	struct ionic_rx_mode_set_cmd rx_mode_set;
+	struct ionic_rx_filter_add_cmd rx_filter_add;
+	struct ionic_rx_filter_del_cmd rx_filter_del;
+	struct ionic_rdma_reset_cmd rdma_reset;
+	struct ionic_rdma_queue_cmd rdma_queue;
+	struct ionic_fw_download_cmd fw_download;
+	struct ionic_fw_control_cmd fw_control;
+};
+
+union ionic_adminq_comp {
+	struct ionic_admin_comp comp;
+	struct ionic_nop_comp nop;
+	struct ionic_q_identify_comp q_identify;
+	struct ionic_q_init_comp q_init;
+	struct ionic_lif_setattr_comp lif_setattr;
+	struct ionic_lif_getattr_comp lif_getattr;
+	struct ionic_admin_comp lif_setphc;
+	struct ionic_rx_filter_add_comp rx_filter_add;
+	ionic_fw_download_comp fw_download;
+	struct ionic_fw_control_comp fw_control;
+};
+
+#define IONIC_BARS_MAX			6
+#define IONIC_PCI_BAR_DBELL		1
+#define IONIC_PCI_BAR_CMB		2
+
+/* BAR0 */
+#define IONIC_BAR0_SIZE				0x8000
+#define IONIC_BAR2_SIZE				0x800000
+
+#define IONIC_BAR0_DEV_INFO_REGS_OFFSET		0x0000
+#define IONIC_BAR0_DEV_CMD_REGS_OFFSET		0x0800
+#define IONIC_BAR0_DEV_CMD_DATA_REGS_OFFSET	0x0c00
+#define IONIC_BAR0_INTR_STATUS_OFFSET		0x1000
+#define IONIC_BAR0_INTR_CTRL_OFFSET		0x2000
+#define IONIC_DEV_CMD_DONE			0x00000001
+
+#define IONIC_ASIC_TYPE_CAPRI			0
+
+/**
+ * struct ionic_doorbell - Doorbell register layout
+ * @p_index: Producer index
+ * @ring:    Selects the specific ring of the queue to update
+ *           Type-specific meaning:
+ *              ring=0: Default producer/consumer queue
+ *              ring=1: (CQ, EQ) Re-Arm queue.  RDMA CQs
+ *              send events to EQs when armed.  EQs send
+ *              interrupts when armed.
+ * @qid_lo:  Queue destination for the producer index and flags (low bits)
+ * @qid_hi:  Queue destination for the producer index and flags (high bits)
+ */
+struct ionic_doorbell {
+	__le16 p_index;
+	u8     ring;
+	u8     qid_lo;
+	__le16 qid_hi;
+	u16    rsvd2;
+};
+
+/**
+ * struct ionic_intr_ctrl - Interrupt control register
+ * @coalescing_init:  Coalescing timer initial value, in
+ *                    device units.  Use @identity->intr_coal_mult
+ *                    and @identity->intr_coal_div to convert from
+ *                    usecs to device units:
+ *
+ *                      coal_init = coal_usecs * coal_mutl / coal_div
+ *
+ *                    When an interrupt is sent the interrupt
+ *                    coalescing timer current value
+ *                    (@coalescing_curr) is initialized with this
+ *                    value and begins counting down.  No more
+ *                    interrupts are sent until the coalescing
+ *                    timer reaches 0.  When @coalescing_init=0
+ *                    interrupt coalescing is effectively disabled
+ *                    and every interrupt assert results in an
+ *                    interrupt.  Reset value: 0
+ * @mask:             Interrupt mask.  When @mask=1 the interrupt
+ *                    resource will not send an interrupt.  When
+ *                    @mask=0 the interrupt resource will send an
+ *                    interrupt if an interrupt event is pending
+ *                    or on the next interrupt assertion event.
+ *                    Reset value: 1
+ * @int_credits:      Interrupt credits.  This register indicates
+ *                    how many interrupt events the hardware has
+ *                    sent.  When written by software this
+ *                    register atomically decrements @int_credits
+ *                    by the value written.  When @int_credits
+ *                    becomes 0 then the "pending interrupt" bit
+ *                    in the Interrupt Status register is cleared
+ *                    by the hardware and any pending but unsent
+ *                    interrupts are cleared.
+ *                    !!!IMPORTANT!!! This is a signed register.
+ * @flags:            Interrupt control flags
+ *                       @unmask -- When this bit is written with a 1
+ *                       the interrupt resource will set mask=0.
+ *                       @coal_timer_reset -- When this
+ *                       bit is written with a 1 the
+ *                       @coalescing_curr will be reloaded with
+ *                       @coalescing_init to reset the coalescing
+ *                       timer.
+ * @mask_on_assert:   Automatically mask on assertion.  When
+ *                    @mask_on_assert=1 the interrupt resource
+ *                    will set @mask=1 whenever an interrupt is
+ *                    sent.  When using interrupts in Legacy
+ *                    Interrupt mode the driver must select
+ *                    @mask_on_assert=0 for proper interrupt
+ *                    operation.
+ * @coalescing_curr:  Coalescing timer current value, in
+ *                    microseconds.  When this value reaches 0
+ *                    the interrupt resource is again eligible to
+ *                    send an interrupt.  If an interrupt event
+ *                    is already pending when @coalescing_curr
+ *                    reaches 0 the pending interrupt will be
+ *                    sent, otherwise an interrupt will be sent
+ *                    on the next interrupt assertion event.
+ */
+struct ionic_intr_ctrl {
+	u8 coalescing_init;
+	u8 rsvd[3];
+	u8 mask;
+	u8 rsvd2[3];
+	u16 int_credits;
+	u16 flags;
+#define INTR_F_UNMASK		0x0001
+#define INTR_F_TIMER_RESET	0x0002
+	u8 mask_on_assert;
+	u8 rsvd3[3];
+	u8 coalescing_curr;
+	u8 rsvd4[3];
+	u32 rsvd6[3];
+};
+
+#define IONIC_INTR_CTRL_REGS_MAX	2048
+#define IONIC_INTR_CTRL_COAL_MAX	0x3F
+
+#define intr_to_coal(intr_ctrl)		\
+		((void __iomem *)&(intr_ctrl)->coalescing_init)
+#define intr_to_mask(intr_ctrl)		\
+		((void __iomem *)&(intr_ctrl)->mask)
+#define intr_to_credits(intr_ctrl)	\
+		((void __iomem *)&(intr_ctrl)->int_credits)
+#define intr_to_mask_on_assert(intr_ctrl)\
+		((void __iomem *)&(intr_ctrl)->mask_on_assert)
+
+struct ionic_intr_status {
+	u32 status[2];
+};
+
+struct ionic_notifyq_cmd {
+	__le32 data;	/* Not used but needed for qcq structure */
+};
+
+union ionic_notifyq_comp {
+	struct ionic_notifyq_event event;
+	struct ionic_link_change_event link_change;
+	struct ionic_reset_event reset;
+	struct ionic_heartbeat_event heartbeat;
+	struct ionic_log_event log;
+};
+union ionic_debug_msg {
+	struct {
+		char string[128];
+		u8   rsvd[128];
+	};
+	__le32 words[64];
+};
+
+/**
+ * struct ionic_eq_comp - Event queue completion descriptor
+ *
+ * @code:	Event code, see enum ionic_eq_comp_code
+ * @lif_index:	To which LIF the event pertains
+ * @qid:	To which queue id the event pertains
+ * @gen_color:	Event queue wrap counter, init 1, incr each wrap
+ */
+struct ionic_eq_comp {
+	__le16 code;
+	__le16 lif_index;
+	__le32 qid;
+	u8 rsvd[7];
+	u8 gen_color;
+};
+
+enum ionic_eq_comp_code {
+	IONIC_EQ_COMP_CODE_NONE = 0,
+	IONIC_EQ_COMP_CODE_RX_COMP = 1,
+	IONIC_EQ_COMP_CODE_TX_COMP = 2,
+};
+
+/* Deprecate */
+struct ionic_identity {
+	union ionic_drv_identity drv;
+	union ionic_dev_identity dev;
+	union ionic_lif_identity lif;
+	union ionic_port_identity port;
+	union ionic_qos_identity qos;
+	union ionic_q_identity txq;
+};
+
+#endif /* _IONIC_IF_H_ */
diff --git a/platform/pensando/dsc-drivers/src/drivers/common/ionic_regs.h b/platform/pensando/dsc-drivers/src/drivers/common/ionic_regs.h
new file mode 100644
index 000000000..f6fb4aee8
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/common/ionic_regs.h
@@ -0,0 +1,145 @@
+/* SPDX-License-Identifier: (GPL-2.0 OR Linux-OpenIB) OR BSD-2-Clause */
+/* Copyright (c) 2018 - 2021 Pensando Systems, Inc.  All rights reserved. */
+
+#ifndef IONIC_REGS_H
+#define IONIC_REGS_H
+
+#include <linux/io.h>
+
+/** struct ionic_intr - interrupt control register set.
+ * @coal_init:			coalesce timer initial value.
+ * @mask:			interrupt mask value.
+ * @credits:			interrupt credit count and return.
+ * @mask_assert:		interrupt mask value on assert.
+ * @coal:			coalesce timer time remaining.
+ */
+struct ionic_intr {
+	u32 coal_init;
+	u32 mask;
+	u32 credits;
+	u32 mask_assert;
+	u32 coal;
+	u32 rsvd[3];
+};
+
+/** enum ionic_intr_mask_vals - valid values for mask and mask_assert.
+ * @IONIC_INTR_MASK_CLEAR:	unmask interrupt.
+ * @IONIC_INTR_MASK_SET:	mask interrupt.
+ */
+enum ionic_intr_mask_vals {
+	IONIC_INTR_MASK_CLEAR		= 0,
+	IONIC_INTR_MASK_SET		= 1,
+};
+
+/** enum ionic_intr_credits_bits - bitwise composition of credits values.
+ * @IONIC_INTR_CRED_COUNT:	bit mask of credit count, no shift needed.
+ * @IONIC_INTR_CRED_COUNT_SIGNED: bit mask of credit count, including sign bit.
+ * @IONIC_INTR_CRED_UNMASK:	unmask the interrupt.
+ * @IONIC_INTR_CRED_RESET_COALESCE: reset the coalesce timer.
+ * @IONIC_INTR_CRED_REARM:	unmask the and reset the timer.
+ */
+enum ionic_intr_credits_bits {
+	IONIC_INTR_CRED_COUNT		= 0x7fffu,
+	IONIC_INTR_CRED_COUNT_SIGNED	= 0xffffu,
+	IONIC_INTR_CRED_UNMASK		= 0x10000u,
+	IONIC_INTR_CRED_RESET_COALESCE	= 0x20000u,
+	IONIC_INTR_CRED_REARM		= (IONIC_INTR_CRED_UNMASK |
+					   IONIC_INTR_CRED_RESET_COALESCE),
+};
+
+static inline void ionic_intr_coal_init(struct ionic_intr __iomem *intr_ctrl,
+					int intr_idx, u32 coal)
+{
+	iowrite32(coal, &intr_ctrl[intr_idx].coal_init);
+}
+
+static inline void ionic_intr_mask(struct ionic_intr __iomem *intr_ctrl,
+				   int intr_idx, u32 mask)
+{
+	iowrite32(mask, &intr_ctrl[intr_idx].mask);
+}
+
+static inline void ionic_intr_credits(struct ionic_intr __iomem *intr_ctrl,
+				      int intr_idx, u32 cred, u32 flags)
+{
+	if (WARN_ON_ONCE(cred > IONIC_INTR_CRED_COUNT)) {
+		cred = ioread32(&intr_ctrl[intr_idx].credits);
+		cred &= IONIC_INTR_CRED_COUNT_SIGNED;
+	}
+
+	iowrite32(cred | flags, &intr_ctrl[intr_idx].credits);
+}
+
+static inline void ionic_intr_clean_flags(struct ionic_intr __iomem *intr_ctrl,
+					  int intr_idx, u32 flags)
+{
+	u32 cred;
+
+	cred = ioread32(&intr_ctrl[intr_idx].credits);
+	cred &= IONIC_INTR_CRED_COUNT_SIGNED;
+	cred |= flags;
+	iowrite32(cred, &intr_ctrl[intr_idx].credits);
+}
+
+static inline void ionic_intr_clean(struct ionic_intr __iomem *intr_ctrl,
+				    int intr_idx)
+{
+	ionic_intr_clean_flags(intr_ctrl, intr_idx,
+			       IONIC_INTR_CRED_RESET_COALESCE);
+}
+
+static inline void ionic_intr_mask_assert(struct ionic_intr __iomem *intr_ctrl,
+					  int intr_idx, u32 mask)
+{
+	iowrite32(mask, &intr_ctrl[intr_idx].mask_assert);
+}
+
+/** enum ionic_dbell_bits - bitwise composition of dbell values.
+ *
+ * @IONIC_DBELL_QID_MASK:	unshifted mask of valid queue id bits.
+ * @IONIC_DBELL_QID_SHIFT:	queue id shift amount in dbell value.
+ * @IONIC_DBELL_QID:		macro to build QID component of dbell value.
+ *
+ * @IONIC_DBELL_RING_MASK:	unshifted mask of valid ring bits.
+ * @IONIC_DBELL_RING_SHIFT:	ring shift amount in dbell value.
+ * @IONIC_DBELL_RING:		macro to build ring component of dbell value.
+ *
+ * @IONIC_DBELL_RING_0:		ring zero dbell component value.
+ * @IONIC_DBELL_RING_1:		ring one dbell component value.
+ * @IONIC_DBELL_RING_2:		ring two dbell component value.
+ * @IONIC_DBELL_RING_3:		ring three dbell component value.
+ *
+ * @IONIC_DBELL_INDEX_MASK:	bit mask of valid index bits, no shift needed.
+ */
+enum ionic_dbell_bits {
+	IONIC_DBELL_QID_MASK		= 0xffffff,
+	IONIC_DBELL_QID_SHIFT		= 24,
+
+#define IONIC_DBELL_QID(n) \
+	(((u64)(n) & IONIC_DBELL_QID_MASK) << IONIC_DBELL_QID_SHIFT)
+
+	IONIC_DBELL_RING_MASK		= 0x7,
+	IONIC_DBELL_RING_SHIFT		= 16,
+
+#define IONIC_DBELL_RING(n) \
+	(((u64)(n) & IONIC_DBELL_RING_MASK) << IONIC_DBELL_RING_SHIFT)
+
+	IONIC_DBELL_RING_0		= 0,
+	IONIC_DBELL_RING_1		= IONIC_DBELL_RING(1),
+	IONIC_DBELL_RING_2		= IONIC_DBELL_RING(2),
+	IONIC_DBELL_RING_3		= IONIC_DBELL_RING(3),
+
+	IONIC_DBELL_INDEX_MASK		= 0xffff,
+};
+
+static inline void ionic_dbell_ring(u64 __iomem *db_page, int qtype, u64 val)
+{
+#if defined(CONFIG_IONIC_MNIC)
+	wmb();
+	writeq_relaxed(val, &db_page[qtype]);
+#else
+	writeq(val, &db_page[qtype]);
+#endif
+}
+
+#endif /* IONIC_REGS_H */
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/Makefile b/platform/pensando/dsc-drivers/src/drivers/linux/Makefile
new file mode 100644
index 000000000..c754088fe
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/Makefile
@@ -0,0 +1,116 @@
+ifneq ($(KERNELRELEASE),)
+obj-$(CONFIG_IONIC) += eth/ionic/
+obj-$(CONFIG_IONIC_MNIC) += eth/ionic/
+obj-$(CONFIG_MDEV) += mdev/
+obj-$(CONFIG_MNET_UIO_PDRV_GENIRQ) += mnet_uio_pdrv_genirq/
+else
+
+IONIC_ETH_SRC = $(CURDIR)/eth/ionic
+
+#KOPT += V=1		# verbose build
+#KOPT += W=1		# extra warnings
+#KOPT += C=1		# static analysis
+#KOPT += CHECK=sparse	# static analysis tool
+#KOPT += CHECK=scripts/coccicheck
+
+default: all
+
+# Discover kernel configuration.
+#
+# Override running kernel with
+# `make KSRC=/path/to/your/sources` or
+# `export KSRC=/path/to/your/sources`
+#
+
+ifeq ($(ARCH),aarch64)
+
+# Ionic mnic and mdev for drivers ARM
+KSRC ?= ${NICDIR}/buildroot/output/${ASIC}/linux-headers
+KMOD_OUT_DIR ?= ${BLD_OUT_DIR}/drivers_submake
+KMOD_SRC_DIR ?= ${TOPDIR}/platform/drivers/linux-ionic
+ETH_KOPT += CONFIG_IONIC_MNIC=m
+ETH_KOPT += CONFIG_MDEV=m
+ETH_KOPT += CONFIG_MNET_UIO_PDRV_GENIRQ=m
+KOPT += ARCH=arm64
+KCFLAGS += -DCONFIG_IONIC_MNIC
+KCFLAGS += -DCONFIG_MDEV
+KCFLAGS += -DCONFIG_MNET_UIO_PDRV_GENIRQ
+ALL = mnic
+ALL += mnet_uio_pdrv_genirq
+ALL += mdev
+export PATH := $(PATH):$(TOOLCHAIN_DIR)/bin
+
+KSYMS_MNIC = "KBUILD_EXTRA_SYMBOLS=${KMOD_OUT_DIR}/Module.symvers.mnic"
+KSYMS = "${KSYMS_MNIC} ${KMOD_OUT_DIR}/Module.symvers.uio"
+
+
+else
+
+DVER = $(shell git describe --tags 2>/dev/null)
+
+# Ionic driver for host
+include linux_ver.mk
+
+KSRC ?= /lib/modules/$(shell uname -r)/build
+ETH_KOPT += CONFIG_IONIC=m
+ETH_KOPT += CONFIG_IONIC_MNIC=_
+ETH_KOPT += CONFIG_MDEV=_
+ETH_KOPT += CONFIG_MNET_UIO_PDRV_GENIRQ=_
+KCFLAGS += -DCONFIG_IONIC
+
+KCFLAGS = -Werror
+KCFLAGS += $(EXTRA_CFLAGS)
+
+ALL = eth
+
+endif
+
+ifeq ($(DVER),)
+    DVER = "22.11.1-001"
+endif
+KCFLAGS += -Ddrv_ver=\\\"$(DVER)\\\"
+
+KOPT += KCFLAGS="$(KCFLAGS)"
+
+all: $(ALL)
+
+KBUILD_RULE = $(MAKE) -C $(KSRC) $(KOPT) M=$(CURDIR)
+
+mnic: KOPT+=$(ETH_KOPT)
+mnic:
+	@echo "===> Building MNIC driver "
+	touch $(KMOD_OUT_DIR)/Makefile || true
+	$(MAKE) -C $(KSRC) V=1 M=$(KMOD_OUT_DIR) src=$(KMOD_SRC_DIR)/eth/ionic $(KOPT)
+	mv ${KMOD_OUT_DIR}/Module.symvers ${KMOD_OUT_DIR}/Module.symvers.mnic
+
+mnet_uio_pdrv_genirq: KOPT+=$(ETH_KOPT)
+mnet_uio_pdrv_genirq:
+	@echo "===> Building MNET_UIO driver "
+	$(MAKE) -C $(KSRC) V=1 M=$(KMOD_OUT_DIR) src=$(KMOD_SRC_DIR)/mnet_uio_pdrv_genirq $(KOPT)
+	mv ${KMOD_OUT_DIR}/Module.symvers ${KMOD_OUT_DIR}/Module.symvers.uio
+
+mdev: KOPT+=$(ETH_KOPT)
+mdev:
+	@echo "===> Building MDEV driver "
+	$(MAKE) -C $(KSRC) $(KSYMS) V=1 M=$(KMOD_OUT_DIR) src=$(KMOD_SRC_DIR)/mdev $(KOPT)
+
+eth: KOPT+=$(ETH_KOPT)
+eth:
+	$(KBUILD_RULE)
+
+clean: KOPT+=$(ETH_KOPT)
+clean:
+	$(KBUILD_RULE) clean
+
+install: modules_install
+modules_install: KOPT+=$(ETH_KOPT)
+modules_install:
+	$(KBUILD_RULE) modules_install
+
+cscope:
+	find $(IONIC_ETH_SRC) -name '*.[ch]' > cscope.files
+	cscope -bkq
+
+.PHONY: default all mnic mdev mnet_uio_pdrv_genirq eth clean install modules_install cscope
+
+endif
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/Kconfig b/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/Kconfig
new file mode 100644
index 000000000..2a1045f55
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/Kconfig
@@ -0,0 +1,34 @@
+# SPDX-License-Identifier: GPL-2.0
+# Copyright (c) 2019 - 2020 Pensando Systems, Inc
+#
+# Pensando device configuration
+#
+
+config NET_VENDOR_PENSANDO
+	bool "Pensando devices"
+	default y
+	help
+	  If you have a Distributed Services Card (DSC) belonging to this
+	  class, say Y.
+
+	  Note that the answer to this question doesn't directly affect the
+	  kernel: saying N will just cause the configurator to skip all
+	  the questions about Pensando cards. If you say Y, you will be asked
+	  for your specific card in the following questions.
+
+if NET_VENDOR_PENSANDO
+
+config IONIC
+	tristate "Pensando DSC Ethernet Support"
+	depends on 64BIT && PCI
+	select NET_DEVLINK
+	help
+	  This enables Ethernet support for the Pensando family of Distributed
+	  Services Cards (DSCs). More specific information on this driver can
+	  be found in
+	  <file:Documentation/networking/device_drivers/pensando/ionic.rst>.
+
+	  To compile this driver as a module, choose M here. The module
+	  will be called ionic.
+
+endif # NET_VENDOR_PENSANDO
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/Makefile b/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/Makefile
new file mode 100644
index 000000000..d5e2808fc
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/Makefile
@@ -0,0 +1,19 @@
+# SPDX-License-Identifier: GPL-2.0
+# Copyright(c) 2017 - 2019 Pensando Systems, Inc
+
+obj-$(CONFIG_IONIC) := ionic.o
+obj-$(CONFIG_IONIC_MNIC) := ionic_mnic.o
+
+ccflags-y := -g -I$(KMOD_SRC_DIR)/../common
+
+ionic-y := ionic_main.o ionic_bus_pci.o ionic_dev.o ionic_ethtool.o \
+	   ionic_lif.o ionic_rx_filter.o ionic_txrx.o ionic_debugfs.o \
+	   ionic_api.o ionic_stats.o ionic_devlink.o kcompat.o ionic_fw.o \
+	   dim.o net_dim.o
+ionic-$(CONFIG_PTP_1588_CLOCK) += ionic_phc.o
+
+ionic_mnic-y := ionic_main.o ionic_bus_platform.o ionic_dev.o ionic_ethtool.o \
+	        ionic_lif.o ionic_rx_filter.o ionic_txrx.o ionic_debugfs.o \
+	        ionic_api.o ionic_stats.o ionic_devlink.o kcompat.o ionic_fw.o \
+		dim.o net_dim.o
+ionic_mnic-$(CONFIG_PTP_1588_CLOCK) += ionic_phc.o ionic_phc_weak.o
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/dim.c b/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/dim.c
new file mode 100644
index 000000000..4e47c0f68
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/dim.c
@@ -0,0 +1,85 @@
+// SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB
+/*
+ * Copyright (c) 2019, Mellanox Technologies inc.  All rights reserved.
+ */
+
+#ifndef CONFIG_DIMLIB
+#include "dim.h"
+
+bool dim_on_top(struct dim *dim)
+{
+	switch (dim->tune_state) {
+	case DIM_PARKING_ON_TOP:
+	case DIM_PARKING_TIRED:
+		return true;
+	case DIM_GOING_RIGHT:
+		return (dim->steps_left > 1) && (dim->steps_right == 1);
+	default: /* DIM_GOING_LEFT */
+		return (dim->steps_right > 1) && (dim->steps_left == 1);
+	}
+}
+//EXPORT_SYMBOL(dim_on_top);
+
+void dim_turn(struct dim *dim)
+{
+	switch (dim->tune_state) {
+	case DIM_PARKING_ON_TOP:
+	case DIM_PARKING_TIRED:
+		break;
+	case DIM_GOING_RIGHT:
+		dim->tune_state = DIM_GOING_LEFT;
+		dim->steps_left = 0;
+		break;
+	case DIM_GOING_LEFT:
+		dim->tune_state = DIM_GOING_RIGHT;
+		dim->steps_right = 0;
+		break;
+	}
+}
+//EXPORT_SYMBOL(dim_turn);
+
+void dim_park_on_top(struct dim *dim)
+{
+	dim->steps_right  = 0;
+	dim->steps_left   = 0;
+	dim->tired        = 0;
+	dim->tune_state   = DIM_PARKING_ON_TOP;
+}
+//EXPORT_SYMBOL(dim_park_on_top);
+
+void dim_park_tired(struct dim *dim)
+{
+	dim->steps_right  = 0;
+	dim->steps_left   = 0;
+	dim->tune_state   = DIM_PARKING_TIRED;
+}
+//EXPORT_SYMBOL(dim_park_tired);
+
+void dim_calc_stats(struct dim_sample *start, struct dim_sample *end,
+		    struct dim_stats *curr_stats)
+{
+	/* u32 holds up to 71 minutes, should be enough */
+	u32 delta_us = ktime_us_delta(end->time, start->time);
+	u32 npkts = BIT_GAP(BITS_PER_TYPE(u32), end->pkt_ctr, start->pkt_ctr);
+	u32 nbytes = BIT_GAP(BITS_PER_TYPE(u32), end->byte_ctr,
+			     start->byte_ctr);
+	u32 ncomps = BIT_GAP(BITS_PER_TYPE(u32), end->comp_ctr,
+			     start->comp_ctr);
+
+	if (!delta_us)
+		return;
+
+	curr_stats->ppms = DIV_ROUND_UP(npkts * USEC_PER_MSEC, delta_us);
+	curr_stats->bpms = DIV_ROUND_UP(nbytes * USEC_PER_MSEC, delta_us);
+	curr_stats->epms = DIV_ROUND_UP(DIM_NEVENTS * USEC_PER_MSEC,
+					delta_us);
+	curr_stats->cpms = DIV_ROUND_UP(ncomps * USEC_PER_MSEC, delta_us);
+	if (curr_stats->epms != 0)
+		curr_stats->cpe_ratio = DIV_ROUND_DOWN_ULL(
+			curr_stats->cpms * 100, curr_stats->epms);
+	else
+		curr_stats->cpe_ratio = 0;
+
+}
+//EXPORT_SYMBOL(dim_calc_stats);
+#endif
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/dim.h b/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/dim.h
new file mode 100644
index 000000000..d4a394e6c
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/dim.h
@@ -0,0 +1,344 @@
+/* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */
+/* Copyright (c) 2019 Mellanox Technologies. */
+
+#ifndef DIM_H
+#define DIM_H
+
+
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/types.h>
+#include <linux/workqueue.h>
+
+#define BITS_PER_TYPE(type)	(sizeof(type) * BITS_PER_BYTE)
+
+#ifndef DIV_ROUND_DOWN_ULL
+#define DIV_ROUND_DOWN_ULL(ll, d) \
+	({ unsigned long long _tmp = (ll); do_div(_tmp, d); _tmp; })
+#endif
+
+/*
+ * Number of events between DIM iterations.
+ * Causes a moderation of the algorithm run.
+ */
+#define DIM_NEVENTS 64
+
+/*
+ * Is a difference between values justifies taking an action.
+ * We consider 10% difference as significant.
+ */
+#define IS_SIGNIFICANT_DIFF(val, ref) \
+	(((100UL * abs((val) - (ref))) / (ref)) > 10)
+
+/*
+ * Calculate the gap between two values.
+ * Take wrap-around and variable size into consideration.
+ */
+#define BIT_GAP(bits, end, start) ((((end) - (start)) + BIT_ULL(bits)) \
+		& (BIT_ULL(bits) - 1))
+
+/**
+ * struct dim_cq_moder - Structure for CQ moderation values.
+ * Used for communications between DIM and its consumer.
+ *
+ * @usec: CQ timer suggestion (by DIM)
+ * @pkts: CQ packet counter suggestion (by DIM)
+ * @comps: Completion counter
+ * @cq_period_mode: CQ period count mode (from CQE/EQE)
+ */
+struct dim_cq_moder {
+	u16 usec;
+	u16 pkts;
+	u16 comps;
+	u8 cq_period_mode;
+};
+
+/**
+ * struct dim_sample - Structure for DIM sample data.
+ * Used for communications between DIM and its consumer.
+ *
+ * @time: Sample timestamp
+ * @pkt_ctr: Number of packets
+ * @byte_ctr: Number of bytes
+ * @event_ctr: Number of events
+ * @comp_ctr: Current completion counter
+ */
+struct dim_sample {
+	ktime_t time;
+	u32 pkt_ctr;
+	u32 byte_ctr;
+	u16 event_ctr;
+	u32 comp_ctr;
+};
+
+/**
+ * struct dim_stats - Structure for DIM stats.
+ * Used for holding current measured rates.
+ *
+ * @ppms: Packets per msec
+ * @bpms: Bytes per msec
+ * @epms: Events per msec
+ * @cpms: Completions per msec
+ * @cpe_ratio: Ratio of completions to events
+ */
+struct dim_stats {
+	int ppms; /* packets per msec */
+	int bpms; /* bytes per msec */
+	int epms; /* events per msec */
+	int cpms; /* completions per msec */
+	int cpe_ratio; /* ratio of completions to events */
+};
+
+/**
+ * struct dim - Main structure for dynamic interrupt moderation (DIM).
+ * Used for holding all information about a specific DIM instance.
+ *
+ * @state: Algorithm state (see below)
+ * @prev_stats: Measured rates from previous iteration (for comparison)
+ * @start_sample: Sampled data at start of current iteration
+ * @measuring_sample: A &dim_sample that is used to update the current events
+ * @work: Work to perform on action required
+ * @priv: A pointer to the struct that points to dim
+ * @profile_ix: Current moderation profile
+ * @mode: CQ period count mode
+ * @tune_state: Algorithm tuning state (see below)
+ * @steps_right: Number of steps taken towards higher moderation
+ * @steps_left: Number of steps taken towards lower moderation
+ * @tired: Parking depth counter
+ */
+struct dim {
+	u8 state;
+	struct dim_stats prev_stats;
+	struct dim_sample start_sample;
+	struct dim_sample measuring_sample;
+	struct work_struct work;
+	void *priv;
+	u8 profile_ix;
+	u8 mode;
+	u8 tune_state;
+	u8 steps_right;
+	u8 steps_left;
+	u8 tired;
+};
+
+/**
+ * enum dim_cq_period_mode - Modes for CQ period count
+ *
+ * @DIM_CQ_PERIOD_MODE_START_FROM_EQE: Start counting from EQE
+ * @DIM_CQ_PERIOD_MODE_START_FROM_CQE: Start counting from CQE (implies timer reset)
+ * @DIM_CQ_PERIOD_NUM_MODES: Number of modes
+ */
+enum dim_cq_period_mode {
+	DIM_CQ_PERIOD_MODE_START_FROM_EQE = 0x0,
+	DIM_CQ_PERIOD_MODE_START_FROM_CQE = 0x1,
+	DIM_CQ_PERIOD_NUM_MODES
+};
+
+/**
+ * enum dim_state - DIM algorithm states
+ *
+ * These will determine if the algorithm is in a valid state to start an iteration.
+ *
+ * @DIM_START_MEASURE: This is the first iteration (also after applying a new profile)
+ * @DIM_MEASURE_IN_PROGRESS: Algorithm is already in progress - check if
+ * need to perform an action
+ * @DIM_APPLY_NEW_PROFILE: DIM consumer is currently applying a profile - no need to measure
+ */
+enum dim_state {
+	DIM_START_MEASURE,
+	DIM_MEASURE_IN_PROGRESS,
+	DIM_APPLY_NEW_PROFILE,
+};
+
+/**
+ * enum dim_tune_state - DIM algorithm tune states
+ *
+ * These will determine which action the algorithm should perform.
+ *
+ * @DIM_PARKING_ON_TOP: Algorithm found a local top point - exit on significant difference
+ * @DIM_PARKING_TIRED: Algorithm found a deep top point - don't exit if tired > 0
+ * @DIM_GOING_RIGHT: Algorithm is currently trying higher moderation levels
+ * @DIM_GOING_LEFT: Algorithm is currently trying lower moderation levels
+ */
+enum dim_tune_state {
+	DIM_PARKING_ON_TOP,
+	DIM_PARKING_TIRED,
+	DIM_GOING_RIGHT,
+	DIM_GOING_LEFT,
+};
+
+/**
+ * enum dim_stats_state - DIM algorithm statistics states
+ *
+ * These will determine the verdict of current iteration.
+ *
+ * @DIM_STATS_WORSE: Current iteration shows worse performance than before
+ * @DIM_STATS_SAME:  Current iteration shows same performance than before
+ * @DIM_STATS_BETTER: Current iteration shows better performance than before
+ */
+enum dim_stats_state {
+	DIM_STATS_WORSE,
+	DIM_STATS_SAME,
+	DIM_STATS_BETTER,
+};
+
+/**
+ * enum dim_step_result - DIM algorithm step results
+ *
+ * These describe the result of a step.
+ *
+ * @DIM_STEPPED: Performed a regular step
+ * @DIM_TOO_TIRED: Same kind of step was done multiple times - should go to
+ * tired parking
+ * @DIM_ON_EDGE: Stepped to the most left/right profile
+ */
+enum dim_step_result {
+	DIM_STEPPED,
+	DIM_TOO_TIRED,
+	DIM_ON_EDGE,
+};
+
+/**
+ *	dim_on_top - check if current state is a good place to stop (top location)
+ *	@dim: DIM context
+ *
+ * Check if current profile is a good place to park at.
+ * This will result in reducing the DIM checks frequency as we assume we
+ * shouldn't probably change profiles, unless traffic pattern wasn't changed.
+ */
+bool dim_on_top(struct dim *dim);
+
+/**
+ *	dim_turn - change profile altering direction
+ *	@dim: DIM context
+ *
+ * Go left if we were going right and vice-versa.
+ * Do nothing if currently parking.
+ */
+void dim_turn(struct dim *dim);
+
+/**
+ *	dim_park_on_top - enter a parking state on a top location
+ *	@dim: DIM context
+ *
+ * Enter parking state.
+ * Clear all movement history.
+ */
+void dim_park_on_top(struct dim *dim);
+
+/**
+ *	dim_park_tired - enter a tired parking state
+ *	@dim: DIM context
+ *
+ * Enter parking state.
+ * Clear all movement history and cause DIM checks frequency to reduce.
+ */
+void dim_park_tired(struct dim *dim);
+
+/**
+ *	dim_calc_stats - calculate the difference between two samples
+ *	@start: start sample
+ *	@end: end sample
+ *	@curr_stats: delta between samples
+ *
+ * Calculate the delta between two samples (in data rates).
+ * Takes into consideration counter wrap-around.
+ */
+void dim_calc_stats(struct dim_sample *start, struct dim_sample *end,
+		    struct dim_stats *curr_stats);
+
+/**
+ *	dim_update_sample - set a sample's fields with given values
+ *	@event_ctr: number of events to set
+ *	@packets: number of packets to set
+ *	@bytes: number of bytes to set
+ *	@s: DIM sample
+ */
+static inline void
+dim_update_sample(u16 event_ctr, u64 packets, u64 bytes, struct dim_sample *s)
+{
+	s->time	     = ktime_get();
+	s->pkt_ctr   = packets;
+	s->byte_ctr  = bytes;
+	s->event_ctr = event_ctr;
+}
+
+/**
+ *	dim_update_sample_with_comps - set a sample's fields with given
+ *	values including the completion parameter
+ *	@event_ctr: number of events to set
+ *	@packets: number of packets to set
+ *	@bytes: number of bytes to set
+ *	@comps: number of completions to set
+ *	@s: DIM sample
+ */
+static inline void
+dim_update_sample_with_comps(u16 event_ctr, u64 packets, u64 bytes, u64 comps,
+			     struct dim_sample *s)
+{
+	dim_update_sample(event_ctr, packets, bytes, s);
+	s->comp_ctr = comps;
+}
+
+/* Net DIM */
+
+/**
+ *	net_dim_get_rx_moderation - provide a CQ moderation object for the given RX profile
+ *	@cq_period_mode: CQ period mode
+ *	@ix: Profile index
+ */
+struct dim_cq_moder net_dim_get_rx_moderation(u8 cq_period_mode, int ix);
+
+/**
+ *	net_dim_get_def_rx_moderation - provide the default RX moderation
+ *	@cq_period_mode: CQ period mode
+ */
+struct dim_cq_moder net_dim_get_def_rx_moderation(u8 cq_period_mode);
+
+/**
+ *	net_dim_get_tx_moderation - provide a CQ moderation object for the given TX profile
+ *	@cq_period_mode: CQ period mode
+ *	@ix: Profile index
+ */
+struct dim_cq_moder net_dim_get_tx_moderation(u8 cq_period_mode, int ix);
+
+/**
+ *	net_dim_get_def_tx_moderation - provide the default TX moderation
+ *	@cq_period_mode: CQ period mode
+ */
+struct dim_cq_moder net_dim_get_def_tx_moderation(u8 cq_period_mode);
+
+/**
+ *	net_dim - main DIM algorithm entry point
+ *	@dim: DIM instance information
+ *	@end_sample: Current data measurement
+ *
+ * Called by the consumer.
+ * This is the main logic of the algorithm, where data is processed in order
+ * to decide on next required action.
+ */
+void net_dim(struct dim *dim, struct dim_sample end_sample);
+
+/* RDMA DIM */
+
+/*
+ * RDMA DIM profile:
+ * profile size must be of RDMA_DIM_PARAMS_NUM_PROFILES.
+ */
+#define RDMA_DIM_PARAMS_NUM_PROFILES 9
+#define RDMA_DIM_START_PROFILE 0
+
+/**
+ * rdma_dim - Runs the adaptive moderation.
+ * @dim: The moderation struct.
+ * @completions: The number of completions collected in this round.
+ *
+ * Each call to rdma_dim takes the latest amount of completions that
+ * have been collected and counts them as a new event.
+ * Once enough events have been collected the algorithm decides a new
+ * moderation level.
+ */
+void rdma_dim(struct dim *dim, u64 completions);
+
+#endif /* DIM_H */
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic.h b/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic.h
new file mode 100644
index 000000000..d9e9e4d3e
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic.h
@@ -0,0 +1,116 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/* Copyright(c) 2017 - 2022 Pensando Systems, Inc */
+
+#ifndef _IONIC_H_
+#define _IONIC_H_
+
+struct ionic_lif;
+
+#include "kcompat.h"
+
+#include "ionic_if.h"
+#include "ionic_dev.h"
+#include "ionic_devlink.h"
+
+#define IONIC_DRV_NAME		"ionic"
+#define IONIC_DRV_DESCRIPTION	"Pensando Ethernet NIC Driver"
+#define IONIC_DRV_VERSION	drv_ver
+
+#define PCI_VENDOR_ID_PENSANDO			0x1dd8
+
+#define PCI_DEVICE_ID_PENSANDO_IONIC_ETH_PF	0x1002
+#define PCI_DEVICE_ID_PENSANDO_IONIC_ETH_VF	0x1003
+#define PCI_DEVICE_ID_PENSANDO_IONIC_ETH_MGMT	0x1004
+
+#define DEVCMD_TIMEOUT  5
+#define SHORT_TIMEOUT   1
+#define IONIC_ADMINQ_TIME_SLICE	msecs_to_jiffies(100)
+#define MAX_ETH_EQS	64
+
+#define IONIC_PHC_UPDATE_NS	10000000000L	    /* 10s in nanoseconds */
+#define NORMAL_PPB		1000000000	    /* one billion parts per billion */
+#define SCALED_PPM		(1000000ull << 16)  /* 2^16 million parts per 2^16 million */
+
+extern bool port_init_up;
+extern unsigned int rx_copybreak;
+extern unsigned int rx_fill_threshold;
+extern unsigned int tx_budget;
+extern unsigned int devcmd_timeout;
+extern unsigned long affinity_mask_override;
+
+struct ionic_vf {
+	u16	 index;
+	u8	 macaddr[6];
+	__le32	 maxrate;
+	__le16	 vlanid;
+	u8	 spoofchk;
+	u8	 trusted;
+	u8	 linkstate;
+	dma_addr_t       stats_pa;
+	struct ionic_lif_stats stats;
+};
+
+struct ionic {
+	struct pci_dev *pdev;
+	struct platform_device *pfdev;
+	struct device *dev;
+	struct ionic_dev idev;
+	struct mutex dev_cmd_lock;	/* lock for dev_cmd operations */
+	struct dentry *dentry;
+	struct ionic_dev_bar bars[IONIC_BARS_MAX];
+	unsigned int num_bars;
+	struct ionic_identity ident;
+	bool is_mgmt_nic;
+	struct ionic_lif *lif;
+	struct ionic_eq **eqs;
+	unsigned int nnqs_per_lif;
+	unsigned int nrdma_eqs_per_lif;
+	unsigned int ntxqs_per_lif;
+	unsigned int nrxqs_per_lif;
+	unsigned int nlifs;
+	unsigned int neth_eqs;
+	DECLARE_BITMAP(lifbits, IONIC_LIFS_MAX);
+	DECLARE_BITMAP(ethbits, IONIC_LIFS_MAX);
+	unsigned int nintrs;
+	DECLARE_BITMAP(intrs, IONIC_INTR_CTRL_REGS_MAX);
+#ifndef HAVE_PCI_IRQ_API
+	struct msix_entry *msix;
+#endif
+	struct work_struct nb_work;
+	struct notifier_block nb;
+#ifdef IONIC_DEVLINK
+	struct devlink_port dl_port;
+#endif
+	struct rw_semaphore vf_op_lock;	/* lock for VF operations */
+	struct ionic_vf *vfs;
+	int num_vfs;
+	struct timer_list watchdog_timer;
+	int watchdog_period;
+};
+
+int ionic_adminq_post(struct ionic_lif *lif, struct ionic_admin_ctx *ctx);
+int ionic_adminq_wait(struct ionic_lif *lif, struct ionic_admin_ctx *ctx,
+		      const int err, const bool do_msg);
+int ionic_adminq_post_wait(struct ionic_lif *lif, struct ionic_admin_ctx *ctx);
+int ionic_adminq_post_wait_nomsg(struct ionic_lif *lif, struct ionic_admin_ctx *ctx);
+void ionic_adminq_netdev_err_print(struct ionic_lif *lif, u8 opcode,
+				   u8 status, int err);
+
+int ionic_dev_cmd_wait(struct ionic *ionic, unsigned long max_wait);
+int ionic_dev_cmd_wait_nomsg(struct ionic *ionic, unsigned long max_wait);
+void ionic_dev_cmd_dev_err_print(struct ionic *ionic, u8 opcode, u8 status,
+				 int err);
+int ionic_set_dma_mask(struct ionic *ionic);
+int ionic_setup(struct ionic *ionic);
+
+int ionic_identify(struct ionic *ionic);
+int ionic_init(struct ionic *ionic);
+int ionic_reset(struct ionic *ionic);
+
+int ionic_port_identify(struct ionic *ionic);
+int ionic_port_init(struct ionic *ionic);
+int ionic_port_reset(struct ionic *ionic);
+
+const char *ionic_vf_attr_to_str(enum ionic_vf_attr attr);
+
+#endif /* _IONIC_H_ */
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_api.c b/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_api.c
new file mode 100644
index 000000000..d2f53d29e
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_api.c
@@ -0,0 +1,266 @@
+// SPDX-License-Identifier: GPL-2.0
+/* Copyright (c) 2017 - 2022 Pensando Systems, Inc. All rights reserved. */
+
+#include <linux/kernel.h>
+
+#include "ionic.h"
+#include "ionic_bus.h"
+#include "ionic_dev.h"
+#include "ionic_lif.h"
+#include "ionic_txrx.h"
+
+void *ionic_get_handle_from_netdev(struct net_device *netdev,
+				   const char *api_version,
+				   enum ionic_api_prsn prsn)
+{
+	struct ionic_lif *lif;
+
+	if (strcmp(api_version, IONIC_API_VERSION))
+		return ERR_PTR(-EINVAL);
+
+	lif = ionic_netdev_lif(netdev);
+	if (!lif || !lif->nrdma_eqs)
+		return ERR_PTR(-ENXIO);
+
+	/* TODO: Rework if supporting more than one child */
+	if (lif->child_lif_cfg.prsn != IONIC_PRSN_NONE &&
+	    lif->child_lif_cfg.prsn != prsn)
+		return ERR_PTR(-EBUSY);
+
+	return lif;
+}
+EXPORT_SYMBOL_GPL(ionic_get_handle_from_netdev);
+
+bool ionic_api_stay_registered(void *handle)
+{
+	/* TODO: Implement when eth driver reset is implemented */
+	return false;
+}
+EXPORT_SYMBOL_GPL(ionic_api_stay_registered);
+
+void ionic_api_request_reset(void *handle)
+{
+	struct ionic_lif *lif = handle;
+	struct ionic *ionic;
+	int err;
+
+	union ionic_dev_cmd cmd = {
+		.cmd.opcode = IONIC_CMD_RDMA_RESET_LIF,
+		.cmd.lif_index = cpu_to_le16(lif->child_lif_cfg.index),
+	};
+
+	ionic = lif->ionic;
+
+	mutex_lock(&ionic->dev_cmd_lock);
+
+	ionic_dev_cmd_go(&ionic->idev, &cmd);
+	err = ionic_dev_cmd_wait(ionic, devcmd_timeout);
+
+	mutex_unlock(&ionic->dev_cmd_lock);
+
+	if (err) {
+		netdev_warn(lif->netdev, "request_reset: error %d\n", err);
+		return;
+	}
+
+	if (lif->child_lif_cfg.priv &&
+	    lif->child_lif_cfg.reset_cb)
+		(*lif->child_lif_cfg.reset_cb)(lif->child_lif_cfg.priv);
+}
+EXPORT_SYMBOL_GPL(ionic_api_request_reset);
+
+void *ionic_api_get_private(void *handle, enum ionic_api_prsn prsn)
+{
+	struct ionic_lif *lif = handle;
+
+	if (lif->child_lif_cfg.prsn != prsn)
+		return NULL;
+
+	return lif->child_lif_cfg.priv;
+}
+EXPORT_SYMBOL_GPL(ionic_api_get_private);
+
+int ionic_api_set_private(void *handle, void *priv,
+			  void (*reset_cb)(void *priv),
+			  enum ionic_api_prsn prsn)
+{
+	struct ionic_lif *lif = handle;
+	struct ionic_lif_cfg *cfg = &lif->child_lif_cfg;
+
+	if (priv && cfg->priv)
+		return -EBUSY;
+
+	cfg->priv = priv;
+	cfg->prsn = prsn;
+	cfg->reset_cb = reset_cb;
+
+	return 0;
+}
+EXPORT_SYMBOL_GPL(ionic_api_set_private);
+
+struct device *ionic_api_get_device(void *handle)
+{
+	struct ionic_lif *lif = handle;
+
+	return lif->netdev->dev.parent;
+}
+EXPORT_SYMBOL_GPL(ionic_api_get_device);
+
+const struct ionic_devinfo *ionic_api_get_devinfo(void *handle)
+{
+	struct ionic_lif *lif = handle;
+
+	return &lif->ionic->idev.dev_info;
+}
+EXPORT_SYMBOL_GPL(ionic_api_get_devinfo);
+
+struct dentry *ionic_api_get_debug_ctx(void *handle)
+{
+	struct ionic_lif *lif = handle;
+
+	return lif->dentry;
+}
+EXPORT_SYMBOL_GPL(ionic_api_get_debug_ctx);
+
+const union ionic_lif_identity *ionic_api_get_identity(void *handle,
+						       int *lif_index)
+{
+	struct ionic_lif *lif = handle;
+
+	if (lif_index)
+		*lif_index = lif->child_lif_cfg.index;
+
+	/* TODO: Do all LIFs have the same ident? */
+	return &lif->ionic->ident.lif;
+}
+EXPORT_SYMBOL_GPL(ionic_api_get_identity);
+
+int ionic_api_get_intr(void *handle, int *irq)
+{
+	struct ionic_lif *lif = handle;
+	struct ionic_intr_info *intr_obj;
+	int err;
+
+	if (!lif->nrdma_eqs_avail)
+		return -ENOSPC;
+
+	intr_obj = kzalloc(sizeof(*intr_obj), GFP_KERNEL);
+	if (!intr_obj)
+		return -ENOSPC;
+
+	err = ionic_intr_alloc(lif->ionic, intr_obj);
+	if (err)
+		goto done;
+
+	err = ionic_bus_get_irq(lif->ionic, intr_obj->index);
+	if (err < 0) {
+		ionic_intr_free(lif->ionic, intr_obj->index);
+		goto done;
+	}
+
+	lif->nrdma_eqs_avail--;
+
+	*irq = err;
+	err = intr_obj->index;
+done:
+	kfree(intr_obj);
+	return err;
+}
+EXPORT_SYMBOL_GPL(ionic_api_get_intr);
+
+void ionic_api_put_intr(void *handle, int intr)
+{
+	struct ionic_lif *lif = handle;
+
+	ionic_intr_free(lif->ionic, intr);
+
+	lif->nrdma_eqs_avail++;
+}
+EXPORT_SYMBOL_GPL(ionic_api_put_intr);
+
+int ionic_api_get_cmb(void *handle, u32 *pgid, phys_addr_t *pgaddr, int order)
+{
+	struct ionic_lif *lif = handle;
+
+	return ionic_get_cmb(lif, pgid, pgaddr, order);
+}
+EXPORT_SYMBOL_GPL(ionic_api_get_cmb);
+
+void ionic_api_put_cmb(void *handle, u32 pgid, int order)
+{
+	struct ionic_lif *lif = handle;
+
+	ionic_put_cmb(lif, pgid, order);
+}
+EXPORT_SYMBOL_GPL(ionic_api_put_cmb);
+
+void ionic_api_kernel_dbpage(void *handle,
+			     struct ionic_intr __iomem **intr_ctrl,
+			     u32 *dbid, u64 __iomem **dbpage)
+{
+	struct ionic_lif *lif = handle;
+
+	*intr_ctrl = lif->ionic->idev.intr_ctrl;
+
+	*dbid = lif->kern_pid;
+	*dbpage = lif->kern_dbpage;
+}
+EXPORT_SYMBOL_GPL(ionic_api_kernel_dbpage);
+
+int ionic_api_get_dbid(void *handle, u32 *dbid, phys_addr_t *addr)
+{
+	struct ionic_lif *lif = handle;
+	int id, dbpage_num;
+
+
+	if (ionic_bus_dbpage_per_pid(lif->ionic)) {
+		mutex_lock(&lif->dbid_inuse_lock);
+
+		if (!lif->dbid_inuse) {
+			mutex_unlock(&lif->dbid_inuse_lock);
+			return -EINVAL;
+		}
+
+		id = find_first_zero_bit(lif->dbid_inuse, lif->dbid_count);
+		if (id == lif->dbid_count) {
+			mutex_unlock(&lif->dbid_inuse_lock);
+			return -ENOMEM;
+		}
+
+		set_bit(id, lif->dbid_inuse);
+
+		mutex_unlock(&lif->dbid_inuse_lock);
+
+		dbpage_num = ionic_db_page_num(lif, id);
+	} else {
+		id = 0;
+		dbpage_num = 0;
+	}
+
+	*dbid = id;
+	*addr = ionic_bus_phys_dbpage(lif->ionic, dbpage_num);
+
+	return 0;
+}
+EXPORT_SYMBOL_GPL(ionic_api_get_dbid);
+
+void ionic_api_put_dbid(void *handle, int dbid)
+{
+	struct ionic_lif *lif = handle;
+
+	if (ionic_bus_dbpage_per_pid(lif->ionic)) {
+		mutex_lock(&lif->dbid_inuse_lock);
+		if (lif->dbid_inuse)
+			clear_bit(dbid, lif->dbid_inuse);
+		mutex_unlock(&lif->dbid_inuse_lock);
+	}
+}
+EXPORT_SYMBOL_GPL(ionic_api_put_dbid);
+
+int ionic_api_adminq_post(void *handle, struct ionic_admin_ctx *ctx)
+{
+	struct ionic_lif *lif = handle;
+
+	return ionic_adminq_post(lif, ctx);
+}
+EXPORT_SYMBOL_GPL(ionic_api_adminq_post);
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_api.h b/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_api.h
new file mode 100644
index 000000000..9894c01bb
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_api.h
@@ -0,0 +1,275 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/* Copyright (c) 2017 - 2022 Pensando Systems, Inc.  All rights reserved. */
+
+#ifndef IONIC_API_H
+#define IONIC_API_H
+
+#include <linux/completion.h>
+#include <linux/netdevice.h>
+#include <linux/types.h>
+
+#include "ionic_if.h"
+#include "ionic_regs.h"
+
+/**
+ * IONIC_API_VERSION - Version number of this interface
+ *
+ * Any interface changes to this interface must also change the version.
+ *
+ * If netdev and other (eg, rdma) drivers are compiled from different sources,
+ * they are compatible only if IONIC_API_VERSION is statically the same in both
+ * sources.  Drivers must have matching values of IONIC_API_VERSION at compile
+ * time, to be considered compatible at run time.
+ */
+#define IONIC_API_VERSION "8"
+
+struct dentry;
+
+/**
+ * struct ionic_devinfo - device information
+ * @asic_type:		Device ASIC type code
+ * @asic_rev:		Device ASIC revision code
+ * @fw_version:		Device firmware version, as a string
+ * @serial_num:		Device serial number, as a string
+ */
+struct ionic_devinfo {
+	u8 asic_type;
+	u8 asic_rev;
+	char fw_version[IONIC_DEVINFO_FWVERS_BUFLEN + 1];
+	char serial_num[IONIC_DEVINFO_SERIAL_BUFLEN + 1];
+};
+
+/**
+ * enum ionic_api_prsn - personalities that can be applied to a lif
+ * @IONIC_PRSN_NONE:	No personality assigned
+ * @IONIC_PRSN_ETH:	Ethernet NIC personality assigned
+ * @IONIC_PRSN_RDMA:	RDMA HCA personality assigned
+ */
+enum ionic_api_prsn {
+	IONIC_PRSN_NONE = 0,
+	IONIC_PRSN_ETH,
+	IONIC_PRSN_RDMA,
+};
+
+/**
+ * ionic_get_handle_from_netdev() - Get a handle if the netdev is ionic
+ * @netdev:		Net device to check
+ * @api_version:	IONIC_API_VERSION
+ * @prsn:		Personality to apply
+ *
+ * This returns an opaque handle if and only if the netdev was created
+ * by the ionic driver and the api version matches as described
+ * above for IONIC_API_VERSION.
+ *
+ * Return: Handle, if netdev is a compatible ionic device, or ERR_PTR(error)
+ */
+void *ionic_get_handle_from_netdev(struct net_device *netdev,
+				   const char *api_version,
+				   enum ionic_api_prsn prsn);
+
+/**
+ * ionic_api_stay_registered() - stay registered through net interface changes
+ * @handle:		Handle to lif
+ *
+ * Return: true if the child device should ignore net deregistration events
+ */
+bool ionic_api_stay_registered(void *handle);
+
+/**
+ * ionic_api_request_reset() - request reset or disable the device or lif
+ * @handle:		Handle to lif
+ *
+ * The reset will be carried out asynchronously.  If it succeeds, then the
+ * callback specified in ionic_api_set_private() will be called.
+ */
+void ionic_api_request_reset(void *handle);
+
+/**
+ * ionic_api_get_private() - Get private data associated with the lif
+ * @handle:		Handle to lif
+ * @prsn:		Personality to which the private data applies
+ *
+ * Get the private data of some kind.  The private data may be, for example, an
+ * instance of an rdma device for this lif.
+ *
+ * Return: private data or NULL
+ */
+void *ionic_api_get_private(void *handle, enum ionic_api_prsn prsn);
+
+/**
+ * ionic_api_set_private() - Set private data associated with the lif
+ * @handle:		Handle to lif
+ * @priv:		Private data or NULL
+ * @reset_cb:		Callback if device has been disabled or reset
+ * @prsn:		Personality to which the private data applies
+ *
+ * Set the private data of some kind.  The private data may be, for example, an
+ * instance of an rdma device for this lif.
+ *
+ * This will fail if private data is already set for that personality.
+ *
+ * Return: zero or negative error status
+ */
+int ionic_api_set_private(void *handle, void *priv,
+			  void (*reset_cb)(void *priv),
+			  enum ionic_api_prsn prsn);
+
+/**
+ * ionic_api_clear_private() - Clear private data associated with the lif
+ * @handle:		Handle to lif
+ */
+static inline void ionic_api_clear_private(void *handle)
+{
+	(void)ionic_api_set_private(handle, NULL, NULL, IONIC_PRSN_NONE);
+}
+
+/**
+ * ionic_api_get_device() - Get the underlying device
+ * @handle:		Handle to lif
+ *
+ * Return: pointer to underlying OS struct device associated with the lif
+ */
+struct device *ionic_api_get_device(void *handle);
+
+/**
+ * ionic_api_get_devinfo() - Get device information
+ * @handle:		Handle to lif
+ *
+ * Return: pointer to device information
+ */
+const struct ionic_devinfo *ionic_api_get_devinfo(void *handle);
+
+/**
+ * ionic_api_get_debug_ctx() - Get the debug context (if any) for the lif
+ * @handle:		Handle to lif
+ *
+ * This is the directory entry of the LIF in debugfs.
+ *
+ * Return: debug context for the lif or NULL
+ */
+struct dentry *ionic_api_get_debug_ctx(void *handle);
+
+/**
+ * ionic_api_get_identity() - Get result of device identification
+ * @handle:		Handle to lif
+ * @lif_index:		This lif index
+ *
+ * Return: pointer to result of identification
+ */
+const union ionic_lif_identity *ionic_api_get_identity(void *handle,
+						       int *lif_index);
+
+/**
+ * ionic_api_get_intr() - Reserve a device interrupt index
+ * @handle:		Handle to lif
+ * @irq:		OS interrupt number returned
+ *
+ * Reserve an interrupt index, and indicate the irq number for that index.
+ *
+ * Return: interrupt index or negative error status
+ */
+int ionic_api_get_intr(void *handle, int *irq);
+
+/**
+ * ionic_api_put_intr() - Release a device interrupt index
+ * @handle:		Handle to lif
+ * @intr:		Interrupt index
+ *
+ * Mark the interrupt index unused so that it can be reserved again.
+ */
+void ionic_api_put_intr(void *handle, int intr);
+
+/**
+ * ionic_api_get_cmb() - Reserve cmb pages
+ * @handle:		Handle to lif
+ * @pgid:		First page index
+ * @pgaddr:		First page bus addr (contiguous)
+ * @order:		Log base two number of pages (PAGE_SIZE)
+ *
+ * Return: zero or negative error status
+ */
+int ionic_api_get_cmb(void *handle, u32 *pgid, phys_addr_t *pgaddr, int order);
+
+/**
+ * ionic_api_put_cmb() - Release cmb pages
+ * @handle:		Handle to lif
+ * @pgid:		First page index
+ * @order:		Log base two number of pages (PAGE_SIZE)
+ */
+void ionic_api_put_cmb(void *handle, u32 pgid, int order);
+
+/**
+ * ionic_api_kernel_dbpage() - Get mapped doorbell page for use in kernel space
+ * @handle:		Handle to lif
+ * @intr_ctrl:		Interrupt control registers
+ * @dbid:		Doorbell id for use in kernel space
+ * @dbpage:		One ioremapped doorbell page for use in kernel space
+ *
+ * This also provides mapped interrupt control registers.
+ *
+ * The id and page returned here refer to the doorbell page reserved for use in
+ * kernel space for this lif.  For user space, use ionic_api_get_dbid to
+ * allocate a doorbell id for exclusive use by a process.
+ */
+void ionic_api_kernel_dbpage(void *handle,
+			     struct ionic_intr __iomem **intr_ctrl,
+			     u32 *dbid, u64 __iomem **dbpage);
+
+/**
+ * ionic_api_get_dbid() - Reserve a doorbell id
+ * @handle:		Handle to lif
+ * @dbid:		Doorbell id
+ * @addr:		Phys address of doorbell page
+ *
+ * Reserve a doorbell id.  This corresponds with exactly one doorbell page at
+ * an offset from the doorbell page base address, that can be mapped into a
+ * user space process.
+ *
+ * Return: zero on success or negative error status
+ */
+int ionic_api_get_dbid(void *handle, u32 *dbid, phys_addr_t *addr);
+
+/**
+ * ionic_api_put_dbid() - Release a doorbell id
+ * @handle:		Handle to lif
+ * @dbid:		Doorbell id
+ *
+ * Mark the doorbell id unused, so that it can be reserved again.
+ */
+void ionic_api_put_dbid(void *handle, int dbid);
+
+/**
+ * struct ionic_admin_ctx - Admin command context
+ * @work:		Work completion wait queue element
+ * @cmd:		Admin command (64B) to be copied to the queue
+ * @comp:		Admin completion (16B) copied from the queue
+ */
+struct ionic_admin_ctx {
+	struct completion work;
+	union ionic_adminq_cmd cmd;
+	union ionic_adminq_comp comp;
+};
+
+/**
+ * ionic_api_adminq_post() - Post an admin command
+ * @handle:		Handle to lif
+ * @ctx:		API admin command context
+ *
+ * Post the command to an admin queue in the ethernet driver.  If this command
+ * succeeds, then the command has been posted, but that does not indicate a
+ * completion.  If this command returns success, then the completion callback
+ * will eventually be called.
+ *
+ * Return: zero or negative error status
+ */
+int ionic_api_adminq_post(void *handle, struct ionic_admin_ctx *ctx);
+
+/**
+ * ionic_error_to_errno() - Transform ionic_if errors to os errno
+ * @code:		Ionic error number
+ *
+ * Return:		Negative OS error number or zero
+ */
+int ionic_error_to_errno(enum ionic_status_code code);
+
+#endif /* IONIC_API_H */
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_bus.h b/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_bus.h
new file mode 100644
index 000000000..6cbe6f17a
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_bus.h
@@ -0,0 +1,23 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/* Copyright(c) 2017 - 2022 Pensando Systems, Inc */
+
+#ifndef _IONIC_BUS_H_
+#define _IONIC_BUS_H_
+
+int ionic_bus_get_irq(struct ionic *ionic, unsigned int num);
+const char *ionic_bus_info(struct ionic *ionic);
+int ionic_bus_alloc_irq_vectors(struct ionic *ionic, unsigned int nintrs);
+void ionic_bus_free_irq_vectors(struct ionic *ionic);
+int ionic_bus_register_driver(void);
+void ionic_bus_unregister_driver(void);
+struct net_device *ionic_alloc_netdev(struct ionic *ionic);
+void __iomem *ionic_bus_map_dbpage(struct ionic *ionic, int page_num);
+void ionic_bus_unmap_dbpage(struct ionic *ionic, void __iomem *page);
+phys_addr_t ionic_bus_phys_dbpage(struct ionic *ionic, int page_num);
+
+static inline bool ionic_bus_dbpage_per_pid(struct ionic *ionic)
+{
+	return ionic->pdev;
+}
+
+#endif /* _IONIC_BUS_H_ */
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_bus_pci.c b/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_bus_pci.c
new file mode 100644
index 000000000..b44e414e6
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_bus_pci.c
@@ -0,0 +1,484 @@
+// SPDX-License-Identifier: GPL-2.0
+/* Copyright(c) 2017 - 2022 Pensando Systems, Inc */
+
+#include <linux/module.h>
+#include <linux/netdevice.h>
+#include <linux/etherdevice.h>
+#include <linux/pci.h>
+
+#include "ionic.h"
+#include "ionic_bus.h"
+#include "ionic_lif.h"
+#include "ionic_debugfs.h"
+
+/* Supported devices */
+static const struct pci_device_id ionic_id_table[] = {
+	{ PCI_VDEVICE(PENSANDO, PCI_DEVICE_ID_PENSANDO_IONIC_ETH_PF) },
+	{ PCI_VDEVICE(PENSANDO, PCI_DEVICE_ID_PENSANDO_IONIC_ETH_VF) },
+	{ PCI_VDEVICE(PENSANDO, PCI_DEVICE_ID_PENSANDO_IONIC_ETH_MGMT) },
+	{ 0, }	/* end of table */
+};
+MODULE_DEVICE_TABLE(pci, ionic_id_table);
+
+int ionic_bus_get_irq(struct ionic *ionic, unsigned int num)
+{
+#ifdef HAVE_PCI_IRQ_API
+	return pci_irq_vector(ionic->pdev, num);
+#else
+	return ionic->msix[num].vector;
+#endif
+}
+
+const char *ionic_bus_info(struct ionic *ionic)
+{
+	return pci_name(ionic->pdev);
+}
+
+int ionic_bus_alloc_irq_vectors(struct ionic *ionic, unsigned int nintrs)
+{
+#ifdef HAVE_PCI_IRQ_API
+	return pci_alloc_irq_vectors(ionic->pdev, nintrs, nintrs,
+				     PCI_IRQ_MSIX);
+#else
+	int err;
+	int i;
+
+	if (ionic->msix)
+		return -EBUSY;
+
+	ionic->msix = devm_kzalloc(ionic->dev,
+				   sizeof(*ionic->msix) * nintrs, GFP_KERNEL);
+	if (!ionic->msix)
+		return -ENOMEM;
+	for (i = 0; i < nintrs; i++)
+		ionic->msix[i].entry = i;
+	err = pci_enable_msix_exact(ionic->pdev, ionic->msix, nintrs);
+	if (err < 0) {
+		devm_kfree(ionic->dev, ionic->msix);
+		ionic->msix = NULL;
+		return err;
+	}
+	return nintrs;
+#endif
+}
+
+void ionic_bus_free_irq_vectors(struct ionic *ionic)
+{
+	if (!ionic->nintrs)
+		return;
+
+#ifdef HAVE_PCI_IRQ_API
+	pci_free_irq_vectors(ionic->pdev);
+#else
+	pci_disable_msix(ionic->pdev);
+	devm_kfree(ionic->dev, ionic->msix);
+	ionic->msix = NULL;
+#endif
+}
+
+struct net_device *ionic_alloc_netdev(struct ionic *ionic)
+{
+	dev_dbg(ionic->dev, "nxqs=%d nlifs=%d nintrs=%d\n",
+		ionic->ntxqs_per_lif, ionic->nlifs, ionic->nintrs);
+
+	return alloc_etherdev_mqs(sizeof(struct ionic_lif),
+				  ionic->ntxqs_per_lif, ionic->ntxqs_per_lif);
+}
+
+static int ionic_map_bars(struct ionic *ionic)
+{
+	struct pci_dev *pdev = ionic->pdev;
+	struct device *dev = ionic->dev;
+	struct ionic_dev_bar *bars;
+	unsigned int i, j;
+
+	bars = ionic->bars;
+	ionic->num_bars = 0;
+
+	for (i = 0, j = 0; i < IONIC_BARS_MAX; i++) {
+		if (!(pci_resource_flags(pdev, i) & IORESOURCE_MEM))
+			continue;
+		bars[j].len = pci_resource_len(pdev, i);
+
+		/* only map the whole bar 0 */
+		if (j > 0) {
+			bars[j].vaddr = NULL;
+		} else {
+			bars[j].vaddr = pci_iomap(pdev, i, bars[j].len);
+			if (!bars[j].vaddr) {
+				dev_err(dev,
+					"Cannot memory-map BAR %d, aborting\n",
+					i);
+				return -ENODEV;
+			}
+		}
+
+		bars[j].bus_addr = pci_resource_start(pdev, i);
+		bars[j].res_index = i;
+		ionic->num_bars++;
+		j++;
+	}
+
+	ionic_debugfs_add_bars(ionic);
+
+	return 0;
+}
+
+static void ionic_unmap_bars(struct ionic *ionic)
+{
+	struct ionic_dev_bar *bars = ionic->bars;
+	unsigned int i;
+
+	for (i = 0; i < IONIC_BARS_MAX; i++) {
+		if (bars[i].vaddr) {
+			iounmap(bars[i].vaddr);
+			bars[i].bus_addr = 0;
+			bars[i].vaddr = NULL;
+			bars[i].len = 0;
+		}
+	}
+}
+
+void __iomem *ionic_bus_map_dbpage(struct ionic *ionic, int page_num)
+{
+#ifdef HAVE_PCI_IOMAP_RANGE
+	return pci_iomap_range(ionic->pdev,
+			       ionic->bars[IONIC_PCI_BAR_DBELL].res_index,
+			       (u64)page_num << PAGE_SHIFT, PAGE_SIZE);
+#else
+	int bar = ionic->bars[IONIC_PCI_BAR_DBELL].res_index;
+	phys_addr_t start = pci_resource_start(ionic->pdev, bar);
+	phys_addr_t offset = start + ((phys_addr_t)page_num << PAGE_SHIFT);
+
+	return ioremap(offset, PAGE_SIZE);
+#endif /* HAVE_PCI_IOMAP_RANGE */
+}
+
+void ionic_bus_unmap_dbpage(struct ionic *ionic, void __iomem *page)
+{
+	iounmap(page);
+}
+
+phys_addr_t ionic_bus_phys_dbpage(struct ionic *ionic, int page_num)
+{
+	return ionic->bars[IONIC_PCI_BAR_DBELL].bus_addr +
+		((phys_addr_t)page_num << PAGE_SHIFT);
+}
+
+static void ionic_vf_dealloc_locked(struct ionic *ionic)
+{
+	struct ionic_vf_setattr_cmd vfc = { .attr = IONIC_VF_ATTR_STATSADDR };
+	struct ionic_vf *v;
+	int i;
+
+	if (!ionic->vfs)
+		return;
+
+	for (i = ionic->num_vfs - 1; i >= 0; i--) {
+		v = &ionic->vfs[i];
+
+		if (v->stats_pa) {
+			vfc.stats_pa = 0;
+			(void)ionic_set_vf_config(ionic, i, &vfc);
+			dma_unmap_single(ionic->dev, v->stats_pa,
+					 sizeof(v->stats), DMA_FROM_DEVICE);
+			v->stats_pa = 0;
+		}
+	}
+
+	kfree(ionic->vfs);
+	ionic->vfs = NULL;
+	ionic->num_vfs = 0;
+}
+
+static void ionic_vf_dealloc(struct ionic *ionic)
+{
+	down_write(&ionic->vf_op_lock);
+	ionic_vf_dealloc_locked(ionic);
+	up_write(&ionic->vf_op_lock);
+}
+
+static int ionic_vf_alloc(struct ionic *ionic, int num_vfs)
+{
+	struct ionic_vf_setattr_cmd vfc = { .attr = IONIC_VF_ATTR_STATSADDR };
+	struct ionic_vf *v;
+	int err = 0;
+	int i;
+
+	down_write(&ionic->vf_op_lock);
+
+	ionic->vfs = kcalloc(num_vfs, sizeof(struct ionic_vf), GFP_KERNEL);
+	if (!ionic->vfs) {
+		err = -ENOMEM;
+		goto out;
+	}
+
+	for (i = 0; i < num_vfs; i++) {
+		v = &ionic->vfs[i];
+		v->stats_pa = dma_map_single(ionic->dev, &v->stats,
+					     sizeof(v->stats), DMA_FROM_DEVICE);
+		if (dma_mapping_error(ionic->dev, v->stats_pa)) {
+			dev_err(ionic->dev, "DMA mapping failed for vf[%d] stats\n", i);
+			v->stats_pa = 0;
+			err = -ENODEV;
+			goto out;
+		}
+
+		ionic->num_vfs++;
+
+		/* ignore failures from older FW, we just won't get stats */
+		vfc.stats_pa = cpu_to_le64(v->stats_pa);
+		(void)ionic_set_vf_config(ionic, i, &vfc);
+	}
+
+out:
+	if (err)
+		ionic_vf_dealloc_locked(ionic);
+	up_write(&ionic->vf_op_lock);
+	return err;
+}
+
+static int ionic_sriov_configure(struct pci_dev *pdev, int num_vfs)
+{
+	struct ionic *ionic = pci_get_drvdata(pdev);
+	struct device *dev = ionic->dev;
+	int ret = 0;
+
+	if (ionic->lif &&
+	    test_bit(IONIC_LIF_F_FW_RESET, ionic->lif->state))
+		return -EBUSY;
+
+	if (num_vfs > 0) {
+		ret = pci_enable_sriov(pdev, num_vfs);
+		if (ret) {
+			dev_err(dev, "Cannot enable SRIOV: %d\n", ret);
+			goto out;
+		}
+
+		ret = ionic_vf_alloc(ionic, num_vfs);
+		if (ret) {
+			dev_err(dev, "Cannot alloc VFs: %d\n", ret);
+			pci_disable_sriov(pdev);
+			goto out;
+		}
+
+		ret = num_vfs;
+	} else {
+		pci_disable_sriov(pdev);
+		ionic_vf_dealloc(ionic);
+	}
+
+out:
+	return ret;
+}
+
+static int ionic_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
+{
+	struct device *dev = &pdev->dev;
+	struct ionic *ionic;
+	int num_vfs;
+	int err;
+
+	ionic = ionic_devlink_alloc(dev);
+	if (!ionic)
+		return -ENOMEM;
+
+	ionic->pdev = pdev;
+	ionic->dev = dev;
+	pci_set_drvdata(pdev, ionic);
+	mutex_init(&ionic->dev_cmd_lock);
+
+	ionic->is_mgmt_nic =
+		ent->device == PCI_DEVICE_ID_PENSANDO_IONIC_ETH_MGMT;
+	ionic->pfdev = NULL;
+
+	err = ionic_set_dma_mask(ionic);
+	if (err) {
+		dev_err(dev, "Cannot set DMA mask: %d, aborting\n", err);
+		goto err_out_clear_drvdata;
+	}
+
+	ionic_debugfs_add_dev(ionic);
+
+	/* Setup PCI device */
+	err = pci_enable_device_mem(pdev);
+	if (err) {
+		dev_err(dev, "Cannot enable PCI device: %d, aborting\n", err);
+		goto err_out_debugfs_del_dev;
+	}
+
+	err = pci_request_regions(pdev, IONIC_DRV_NAME);
+	if (err) {
+		dev_err(dev, "Cannot request PCI regions: %d, aborting\n", err);
+		goto err_out_pci_disable_device;
+	}
+	pcie_print_link_status(pdev);
+
+	err = ionic_map_bars(ionic);
+	if (err)
+		goto err_out_pci_release_regions;
+
+	/* Configure the device */
+	err = ionic_setup(ionic);
+	if (err) {
+		dev_err(dev, "Cannot setup device: %d, aborting\n", err);
+		goto err_out_unmap_bars;
+	}
+	pci_set_master(pdev);
+
+	err = ionic_identify(ionic);
+	if (err) {
+		dev_err(dev, "Cannot identify device: %d, aborting\n", err);
+		goto err_out_teardown;
+	}
+	ionic_debugfs_add_ident(ionic);
+
+	err = ionic_init(ionic);
+	if (err) {
+		dev_err(dev, "Cannot init device: %d, aborting\n", err);
+		goto err_out_teardown;
+	}
+
+	/* Configure the ports */
+	err = ionic_port_identify(ionic);
+	if (err) {
+		dev_err(dev, "Cannot identify port: %d, aborting\n", err);
+		goto err_out_reset;
+	}
+
+	err = ionic_port_init(ionic);
+	if (err) {
+		dev_err(dev, "Cannot init port: %d, aborting\n", err);
+		goto err_out_reset;
+	}
+
+	/* Allocate and init the LIF */
+	err = ionic_lif_size(ionic);
+	if (err) {
+		dev_err(dev, "Cannot size LIF: %d, aborting\n", err);
+		goto err_out_port_reset;
+	}
+
+	err = ionic_lif_alloc(ionic);
+	if (err) {
+		dev_err(dev, "Cannot allocate LIF: %d, aborting\n", err);
+		goto err_out_free_irqs;
+	}
+
+	err = ionic_lif_init(ionic->lif);
+	if (err) {
+		dev_err(dev, "Cannot init LIF: %d, aborting\n", err);
+		goto err_out_free_lifs;
+	}
+
+	init_rwsem(&ionic->vf_op_lock);
+	num_vfs = pci_num_vf(pdev);
+	if (num_vfs) {
+		dev_info(dev, "%d VFs found already enabled\n", num_vfs);
+		err = ionic_vf_alloc(ionic, num_vfs);
+		if (err)
+			dev_err(dev, "Cannot enable existing VFs: %d\n", err);
+	}
+
+	err = ionic_devlink_register(ionic);
+	if (err) {
+		dev_err(dev, "Cannot register devlink: %d\n", err);
+		goto err_out_deinit_lifs;
+	}
+
+	err = ionic_lif_register(ionic->lif);
+	if (err) {
+		dev_err(dev, "Cannot register LIF: %d, aborting\n", err);
+		goto err_out_deregister_devlink;
+	}
+
+	mod_timer(&ionic->watchdog_timer,
+		  round_jiffies(jiffies + ionic->watchdog_period));
+
+	return 0;
+
+err_out_deregister_devlink:
+	ionic_devlink_unregister(ionic);
+err_out_deinit_lifs:
+	ionic_vf_dealloc(ionic);
+	ionic_lif_deinit(ionic->lif);
+err_out_free_lifs:
+	ionic_lif_free(ionic->lif);
+	ionic->lif = NULL;
+err_out_free_irqs:
+	ionic_bus_free_irq_vectors(ionic);
+err_out_port_reset:
+	ionic_port_reset(ionic);
+err_out_reset:
+	ionic_reset(ionic);
+err_out_teardown:
+	ionic_dev_teardown(ionic);
+	pci_clear_master(pdev);
+	/* Don't fail the probe for these errors, keep
+	 * the hw interface around for inspection
+	 */
+	return 0;
+
+err_out_unmap_bars:
+	ionic_unmap_bars(ionic);
+err_out_pci_release_regions:
+	pci_release_regions(pdev);
+err_out_pci_disable_device:
+	pci_disable_device(pdev);
+err_out_debugfs_del_dev:
+	ionic_debugfs_del_dev(ionic);
+err_out_clear_drvdata:
+	mutex_destroy(&ionic->dev_cmd_lock);
+	ionic_devlink_free(ionic);
+	pci_set_drvdata(pdev, NULL);
+
+	return err;
+}
+
+static void ionic_remove(struct pci_dev *pdev)
+{
+	struct ionic *ionic = pci_get_drvdata(pdev);
+
+	if (!ionic)
+		return;
+
+	del_timer_sync(&ionic->watchdog_timer);
+
+	if (ionic->lif) {
+		ionic_lif_unregister(ionic->lif);
+		ionic_devlink_unregister(ionic);
+		ionic_lif_deinit(ionic->lif);
+		ionic_lif_free(ionic->lif);
+		ionic->lif = NULL;
+		ionic_bus_free_irq_vectors(ionic);
+	}
+
+	ionic_port_reset(ionic);
+	ionic_reset(ionic);
+	ionic_dev_teardown(ionic);
+	pci_clear_master(pdev);
+	ionic_unmap_bars(ionic);
+	pci_release_regions(pdev);
+	pci_disable_device(pdev);
+	ionic_debugfs_del_dev(ionic);
+	mutex_destroy(&ionic->dev_cmd_lock);
+	ionic_devlink_free(ionic);
+}
+
+static struct pci_driver ionic_driver = {
+	.name = IONIC_DRV_NAME,
+	.id_table = ionic_id_table,
+	.probe = ionic_probe,
+	.remove = ionic_remove,
+	.sriov_configure = ionic_sriov_configure,
+};
+
+int ionic_bus_register_driver(void)
+{
+	return pci_register_driver(&ionic_driver);
+}
+
+void ionic_bus_unregister_driver(void)
+{
+	pci_unregister_driver(&ionic_driver);
+}
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_bus_platform.c b/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_bus_platform.c
new file mode 100644
index 000000000..dae106b98
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_bus_platform.c
@@ -0,0 +1,472 @@
+// SPDX-License-Identifier: GPL-2.0
+/* Copyright(c) 2017 - 2022 Pensando Systems, Inc */
+
+#include <linux/module.h>
+#include <linux/netdevice.h>
+#include <linux/io.h>
+#include <linux/platform_device.h>
+#include <linux/of.h>
+#include <linux/of_reserved_mem.h>
+#include <linux/msi.h>
+#include <linux/interrupt.h>
+
+#include "ionic.h"
+#include "ionic_bus.h"
+#include "ionic_lif.h"
+#include "ionic_debugfs.h"
+
+#define IONIC_DEV_BAR         0
+#define IONIC_INTR_CTRL_BAR   1
+#define IONIC_MSIX_CFG_BAR    2
+#define IONIC_DOORBELL_BAR    3
+#define IONIC_TSTAMP_BAR      4
+
+#define IONIC_REQUIRED_BARS   4
+#define IONIC_NUM_OF_BAR      5
+
+#define IONIC_INTR_MSIXCFG_STRIDE     0x10
+
+struct ionic_intr_msixcfg {
+	__le64 msgaddr;
+	__le32 msgdata;
+	__le32 vector_ctrl;
+};
+
+static void *ionic_intr_msixcfg_addr(struct device *mnic_dev, const int intr)
+{
+	struct ionic_dev *idev = (struct ionic_dev *) mnic_dev->platform_data;
+
+	dev_info(mnic_dev, "msix_cfg_base: %p\n", idev->msix_cfg_base);
+	return (idev->msix_cfg_base + (intr * IONIC_INTR_MSIXCFG_STRIDE));
+}
+
+static void ionic_intr_msixcfg(struct device *mnic_dev,
+			       const int intr, const u64 msgaddr,
+			       const u32 msgdata, const int vctrl)
+{
+	void *pa = ionic_intr_msixcfg_addr(mnic_dev, intr);
+
+	writeq(msgaddr, (pa + offsetof(struct ionic_intr_msixcfg, msgaddr)));
+	writel(msgdata, (pa + offsetof(struct ionic_intr_msixcfg, msgdata)));
+	writel(vctrl, (pa + offsetof(struct ionic_intr_msixcfg, vector_ctrl)));
+}
+
+/* Resources can only be mapped once at a time.  A second mapping will fail.
+ * For resources that are shared by multiple devices, we avoid using devm,
+ * because the mapping will not be used exclusively by one device, and if
+ * devices are unregistered in any order, the mapping must not be destroyed
+ * when the first device is unregistered, when other devices may still be using
+ * it.  ionic_shared_resource just maintains a refcount for mapping a shared
+ * resource for use by multiple ionic devices.
+ */
+struct ionic_shared_resource {
+	struct mutex lock;
+	void __iomem *base;
+	int refs;
+};
+
+#define IONIC_SHARED_RESOURCE_INITIALIZER(shres) { .lock = __MUTEX_INITIALIZER(shres.lock) }
+
+static void __iomem *ionic_ioremap_shared_resource(struct ionic_shared_resource *shres,
+						   struct resource *res)
+{
+	void __iomem *base;
+
+	mutex_lock(&shres->lock);
+
+	if (shres->refs) {
+		base = shres->base;
+		++shres->refs;
+	} else {
+		if (!request_mem_region(res->start, resource_size(res), res->name ?: KBUILD_MODNAME)) {
+			base = IOMEM_ERR_PTR(-EBUSY);
+		} else {
+			base = ioremap(res->start, resource_size(res));
+			if (!IS_ERR_OR_NULL(base)) {
+				shres->base = base;
+				++shres->refs;
+			}
+		}
+	}
+
+	mutex_unlock(&shres->lock);
+
+	return base;
+}
+
+static void ionic_iounmap_shared_resource(struct ionic_shared_resource *shres,
+					  void __iomem *vaddr,
+					  resource_size_t start,
+					  resource_size_t n)
+{
+	mutex_lock(&shres->lock);
+
+	if (WARN_ON(!shres->refs)) {
+		mutex_unlock(&shres->lock);
+		return;
+	}
+
+	--shres->refs;
+
+	if (!shres->refs) {
+		iounmap(vaddr);
+		release_mem_region(start, n);
+	}
+
+	mutex_unlock(&shres->lock);
+}
+
+static struct ionic_shared_resource tstamp_res =
+	IONIC_SHARED_RESOURCE_INITIALIZER(tstamp_res);
+
+int ionic_bus_get_irq(struct ionic *ionic, unsigned int num)
+{
+	struct msi_desc *desc;
+	int i = 0;
+
+	msi_for_each_desc(desc, ionic->dev, MSI_DESC_ALL) {
+		if (i == num) {
+			pr_info("[i = %d] msi_entry: %d.%d\n",
+				i, desc->msi_index,
+				desc->irq);
+
+			return desc->irq;
+		}
+		i++;
+	}
+
+	return -1; //return error if user is asking more irqs than allocated
+}
+
+const char *ionic_bus_info(struct ionic *ionic)
+{
+	return ionic->pfdev->name;
+}
+
+static void ionic_mnic_set_msi_msg(struct msi_desc *desc, struct msi_msg *msg)
+{
+	dev_dbg(desc->dev, "msi_index: [%d] (msi_addr hi_lo): %x_%x msi_data: %x\n",
+		desc->msi_index, msg->address_hi,
+		msg->address_lo, msg->data);
+
+	ionic_intr_msixcfg(desc->dev, desc->msi_index,
+		     (((u64)msg->address_hi << 32) | msg->address_lo),
+		     msg->data, 0/*vctrl*/);
+}
+
+int ionic_bus_alloc_irq_vectors(struct ionic *ionic, unsigned int nintrs)
+{
+	int err = 0;
+
+	err = platform_msi_domain_alloc_irqs(ionic->dev, nintrs,
+					     ionic_mnic_set_msi_msg);
+	if (err)
+		return err;
+
+	return nintrs;
+}
+
+void ionic_bus_free_irq_vectors(struct ionic *ionic)
+{
+	platform_msi_domain_free_irqs(ionic->dev);
+}
+
+struct net_device *ionic_alloc_netdev(struct ionic *ionic)
+{
+	struct net_device *netdev = NULL;
+	struct ionic_lif *lif;
+
+	netdev = alloc_netdev_mqs(sizeof(struct ionic_lif), ionic->pfdev->name,
+				  NET_NAME_USER, ether_setup,
+				  ionic->ntxqs_per_lif, ionic->ntxqs_per_lif);
+	if (!netdev)
+		return netdev;
+
+	lif = netdev_priv(netdev);
+
+	/* lif name is used for naming the interrupt handler so better
+	 * to name them differently for mnic
+	 */
+	snprintf(lif->name, sizeof(lif->name), "%s-", ionic->pfdev->name);
+
+	return netdev;
+}
+
+static int ionic_mnic_dev_setup(struct ionic *ionic)
+{
+	unsigned int num_bars = ionic->num_bars;
+	struct ionic_dev *idev = &ionic->idev;
+	u32 sig;
+
+	if (num_bars < IONIC_REQUIRED_BARS)
+		return -EFAULT;
+
+	idev->dev_info_regs = ionic->bars[IONIC_DEV_BAR].vaddr;
+	idev->dev_cmd_regs = ionic->bars[IONIC_DEV_BAR].vaddr +
+					offsetof(union ionic_dev_regs, devcmd);
+	idev->intr_ctrl = ionic->bars[IONIC_INTR_CTRL_BAR].vaddr;
+	idev->msix_cfg_base = ionic->bars[IONIC_MSIX_CFG_BAR].vaddr;
+	if (num_bars > IONIC_TSTAMP_BAR)
+		idev->hwstamp_regs = ionic->bars[IONIC_TSTAMP_BAR].vaddr;
+	else
+		idev->hwstamp_regs = NULL;
+
+	/* save the idev into dev->platform_data so we can use it later */
+	ionic->dev->platform_data = idev;
+
+	sig = ioread32(&idev->dev_info_regs->signature);
+	if (sig != IONIC_DEV_INFO_SIGNATURE)
+		return -EFAULT;
+
+	ionic_init_devinfo(ionic);
+	ionic_watchdog_init(ionic);
+
+	idev->db_pages = ionic->bars[IONIC_DOORBELL_BAR].vaddr;
+	idev->phy_db_pages = ionic->bars[IONIC_DOORBELL_BAR].bus_addr;
+
+	ionic_debugfs_add_dev_cmd(ionic);
+
+	return 0;
+}
+
+static int ionic_map_bars(struct ionic *ionic)
+{
+	struct platform_device *pfdev = ionic->pfdev;
+	struct ionic_dev_bar *bars = ionic->bars;
+	struct device *dev = ionic->dev;
+	struct resource *res;
+	unsigned int i, j;
+	void *base;
+
+	ionic->num_bars = 0;
+	for (i = 0, j = 0; i < IONIC_BARS_MAX; i++) {
+		res = platform_get_resource(pfdev, IORESOURCE_MEM, i);
+		if (!res)
+			continue;
+		if (i == IONIC_TSTAMP_BAR)
+			base = ionic_ioremap_shared_resource(&tstamp_res, res);
+		else
+			base = devm_ioremap_resource(dev, res);
+		if (IS_ERR(base)) {
+			dev_err(dev, "Cannot memory-map BAR %d, aborting\n", j);
+			return -ENODEV;
+		}
+		bars[j].len = res->end - res->start + 1;
+		bars[j].vaddr = base;
+		bars[j].bus_addr = res->start;
+		ionic->num_bars++;
+		j++;
+	}
+
+	ionic_debugfs_add_bars(ionic);
+
+	return 0;
+}
+
+static void ionic_unmap_bars(struct ionic *ionic)
+{
+	struct ionic_dev_bar *bars = ionic->bars;
+	struct device *dev = ionic->dev;
+	unsigned int i;
+
+	for (i = 0; i < IONIC_BARS_MAX; i++)
+		if (bars[i].vaddr) {
+			dev_info(dev, "Unmapping BAR %d @%p, bus_addr: %llx\n",
+				 i, bars[i].vaddr, bars[i].bus_addr);
+			if (i == IONIC_TSTAMP_BAR) {
+				ionic_iounmap_shared_resource(&tstamp_res, bars[i].vaddr, bars[i].bus_addr, bars[i].len);
+			} else {
+				devm_iounmap(dev, bars[i].vaddr);
+				devm_release_mem_region(dev, bars[i].bus_addr, bars[i].len);
+			}
+		}
+}
+
+void __iomem *ionic_bus_map_dbpage(struct ionic *ionic, int page_num)
+{
+	return ionic->idev.db_pages;
+}
+
+void ionic_bus_unmap_dbpage(struct ionic *ionic, void __iomem *page)
+{
+}
+
+phys_addr_t ionic_bus_phys_dbpage(struct ionic *ionic, int page_num)
+{
+	return ionic->idev.phy_db_pages;
+}
+
+int ionic_probe(struct platform_device *pfdev)
+{
+	struct device *dev = &pfdev->dev;
+	struct device_node *np;
+	struct ionic *ionic;
+	int err;
+
+	ionic = devm_kzalloc(dev, sizeof(*ionic), GFP_KERNEL);
+	if (!ionic)
+		return -ENOMEM;
+
+	ionic->pfdev = pfdev;
+	platform_set_drvdata(pfdev, ionic);
+	ionic->dev = dev;
+	mutex_init(&ionic->dev_cmd_lock);
+
+	np = dev->of_node;
+	if (!np) {
+		dev_err(dev, "No device tree node\n");
+		return -EINVAL;
+	}
+
+	err = of_reserved_mem_device_init_by_idx(dev, np, 0);
+	if (err != 0 && err != -ENODEV) {
+		dev_err(dev, "Failed to init reserved memory region\n");
+		return err;
+	}
+
+	err = ionic_set_dma_mask(ionic);
+	if (err) {
+		dev_err(dev, "Cannot set DMA mask, aborting\n");
+		return err;
+	}
+
+	ionic_debugfs_add_dev(ionic);
+
+	/* Setup platform device */
+	err = ionic_map_bars(ionic);
+	if (err)
+		goto err_out_unmap_bars;
+
+	/* Discover ionic dev resources */
+	err = ionic_mnic_dev_setup(ionic);
+	if (err) {
+		dev_err(dev, "Cannot setup device, aborting\n");
+		goto err_out_unmap_bars;
+	}
+
+	err = ionic_identify(ionic);
+	if (err) {
+		dev_err(dev, "Cannot identify device, aborting\n");
+		goto err_out_unmap_bars;
+	}
+	ionic_debugfs_add_ident(ionic);
+
+	err = ionic_init(ionic);
+	if (err) {
+		dev_err(dev, "Cannot init device, aborting\n");
+		goto err_out_unmap_bars;
+	}
+
+	/* Configure the ports */
+	err = ionic_port_identify(ionic);
+	if (err) {
+		dev_err(dev, "Cannot identify port: %d, aborting\n", err);
+		goto err_out_unmap_bars;
+	}
+
+	if (ionic->ident.port.type == IONIC_ETH_HOST_MGMT ||
+	    ionic->ident.port.type == IONIC_ETH_MNIC_INTERNAL_MGMT)
+		ionic->is_mgmt_nic = true;
+
+	err = ionic_port_init(ionic);
+	if (err) {
+		dev_err(dev, "Cannot init port: %d, aborting\n", err);
+		goto err_out_unmap_bars;
+	}
+
+	/* Allocate and init the LIF */
+	err = ionic_lif_size(ionic);
+	if (err) {
+		dev_err(dev, "Cannot size LIF: %d, aborting\n", err);
+		goto err_out_unmap_bars;
+	}
+
+	err = ionic_lif_alloc(ionic);
+	if (err) {
+		dev_err(dev, "Cannot allocate LIF: %d, aborting\n", err);
+		goto err_out_free_irqs;
+	}
+
+	err = ionic_lif_init(ionic->lif);
+	if (err) {
+		dev_err(dev, "Cannot init LIF: %d, aborting\n", err);
+		goto err_out_free_lifs;
+	}
+
+	err = ionic_lif_register(ionic->lif);
+	if (err) {
+		dev_err(dev, "Cannot register LIF: %d, aborting\n", err);
+		goto err_out_deinit_lifs;
+	}
+
+	mod_timer(&ionic->watchdog_timer,
+		  round_jiffies(jiffies + ionic->watchdog_period));
+
+	return 0;
+
+err_out_deinit_lifs:
+	ionic_lif_deinit(ionic->lif);
+err_out_free_lifs:
+	ionic_lif_free(ionic->lif);
+	ionic->lif = NULL;
+err_out_free_irqs:
+	ionic_bus_free_irq_vectors(ionic);
+err_out_unmap_bars:
+	ionic_unmap_bars(ionic);
+	ionic_debugfs_del_dev(ionic);
+	mutex_destroy(&ionic->dev_cmd_lock);
+	platform_set_drvdata(pfdev, NULL);
+
+	return err;
+}
+EXPORT_SYMBOL_GPL(ionic_probe);
+
+int ionic_remove(struct platform_device *pfdev)
+{
+	struct ionic *ionic = platform_get_drvdata(pfdev);
+
+	if (ionic) {
+		del_timer_sync(&ionic->watchdog_timer);
+		ionic_lif_unregister(ionic->lif);
+		ionic_lif_deinit(ionic->lif);
+		ionic_lif_free(ionic->lif);
+		ionic->lif = NULL;
+		ionic_port_reset(ionic);
+		ionic_reset(ionic);
+		ionic_bus_free_irq_vectors(ionic);
+		ionic_unmap_bars(ionic);
+		ionic_debugfs_del_dev(ionic);
+
+		mutex_destroy(&ionic->dev_cmd_lock);
+
+		dev_info(ionic->dev, "removed\n");
+	}
+
+	return 0;
+}
+EXPORT_SYMBOL_GPL(ionic_remove);
+
+static const struct of_device_id mnic_of_match[] = {
+		{.compatible = "pensando,ionic-mnic"},
+			{/* end of table */}
+};
+
+static struct platform_driver ionic_driver = {
+	.probe = ionic_probe,
+	.remove = ionic_remove,
+	.driver = {
+		.name = "ionic-mnic",
+		.owner = THIS_MODULE,
+		.of_match_table = mnic_of_match,
+	},
+};
+
+int ionic_bus_register_driver(void)
+{
+	return platform_driver_register(&ionic_driver);
+}
+
+void ionic_bus_unregister_driver(void)
+{
+	platform_driver_unregister(&ionic_driver);
+}
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_debugfs.c b/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_debugfs.c
new file mode 100644
index 000000000..9ddb8f2fb
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_debugfs.c
@@ -0,0 +1,584 @@
+// SPDX-License-Identifier: GPL-2.0
+/* Copyright(c) 2017 - 2022 Pensando Systems, Inc */
+
+#include <linux/netdevice.h>
+
+#include "ionic.h"
+#include "ionic_bus.h"
+#include "ionic_lif.h"
+#include "ionic_ethtool.h"
+#include "ionic_debugfs.h"
+#include "kcompat.h"
+
+#ifdef CONFIG_DEBUG_FS
+
+static struct dentry *ionic_dir;
+
+void ionic_debugfs_create(void)
+{
+	ionic_dir = debugfs_create_dir(IONIC_DRV_NAME, NULL);
+}
+
+void ionic_debugfs_destroy(void)
+{
+	debugfs_remove_recursive(ionic_dir);
+}
+
+void ionic_debugfs_add_dev(struct ionic *ionic)
+{
+	ionic->dentry = debugfs_create_dir(ionic_bus_info(ionic), ionic_dir);
+}
+
+void ionic_debugfs_del_dev(struct ionic *ionic)
+{
+	debugfs_remove_recursive(ionic->dentry);
+	ionic->dentry = NULL;
+}
+
+static int bars_show(struct seq_file *seq, void *v)
+{
+	struct ionic *ionic = seq->private;
+	struct ionic_dev_bar *bars = ionic->bars;
+	unsigned int i;
+
+	for (i = 0; i < IONIC_BARS_MAX; i++)
+		if (bars[i].len)
+			seq_printf(seq, "BAR%d: res %d len 0x%08lx vaddr %pK bus_addr 0x%016llx\n",
+				   i, bars[i].res_index, bars[i].len,
+				   bars[i].vaddr, bars[i].bus_addr);
+
+	return 0;
+}
+DEFINE_SHOW_ATTRIBUTE(bars);
+
+void ionic_debugfs_add_bars(struct ionic *ionic)
+{
+	debugfs_create_file("bars", 0400, ionic->dentry, ionic, &bars_fops);
+}
+
+static const struct debugfs_reg32 dev_cmd_regs[] = {
+	{ .name = "db", .offset = 0, },
+	{ .name = "done", .offset = 4, },
+	{ .name = "cmd.word[0]", .offset = 8, },
+	{ .name = "cmd.word[1]", .offset = 12, },
+	{ .name = "cmd.word[2]", .offset = 16, },
+	{ .name = "cmd.word[3]", .offset = 20, },
+	{ .name = "cmd.word[4]", .offset = 24, },
+	{ .name = "cmd.word[5]", .offset = 28, },
+	{ .name = "cmd.word[6]", .offset = 32, },
+	{ .name = "cmd.word[7]", .offset = 36, },
+	{ .name = "cmd.word[8]", .offset = 40, },
+	{ .name = "cmd.word[9]", .offset = 44, },
+	{ .name = "cmd.word[10]", .offset = 48, },
+	{ .name = "cmd.word[11]", .offset = 52, },
+	{ .name = "cmd.word[12]", .offset = 56, },
+	{ .name = "cmd.word[13]", .offset = 60, },
+	{ .name = "cmd.word[14]", .offset = 64, },
+	{ .name = "cmd.word[15]", .offset = 68, },
+	{ .name = "comp.word[0]", .offset = 72, },
+	{ .name = "comp.word[1]", .offset = 76, },
+	{ .name = "comp.word[2]", .offset = 80, },
+	{ .name = "comp.word[3]", .offset = 84, },
+};
+
+void ionic_debugfs_add_dev_cmd(struct ionic *ionic)
+{
+	struct debugfs_regset32 *dev_cmd_regset;
+	struct device *dev = ionic->dev;
+
+	dev_cmd_regset = devm_kzalloc(dev, sizeof(*dev_cmd_regset), GFP_KERNEL);
+	if (!dev_cmd_regset)
+		return;
+	dev_cmd_regset->regs = dev_cmd_regs;
+	dev_cmd_regset->nregs = ARRAY_SIZE(dev_cmd_regs);
+	dev_cmd_regset->base = ionic->idev.dev_cmd_regs;
+
+	debugfs_create_regset32("dev_cmd", 0400, ionic->dentry, dev_cmd_regset);
+}
+
+static void identity_show_qtype(struct seq_file *seq, const char *name,
+				struct ionic_lif_logical_qtype *qtype)
+{
+	seq_printf(seq, "%s_qtype:\t%d\n", name, qtype->qtype);
+	seq_printf(seq, "%s_count:\t%d\n", name, qtype->qid_count);
+	seq_printf(seq, "%s_base:\t%d\n", name, qtype->qid_base);
+}
+
+static int identity_show(struct seq_file *seq, void *v)
+{
+	struct ionic *ionic = seq->private;
+	struct ionic_identity *ident;
+	struct ionic_dev *idev;
+
+	ident = &ionic->ident;
+	idev = &ionic->idev;
+
+	seq_printf(seq, "asic_type:        0x%x\n", idev->dev_info.asic_type);
+	seq_printf(seq, "asic_rev:         0x%x\n", idev->dev_info.asic_rev);
+	seq_printf(seq, "serial_num:       %s\n", idev->dev_info.serial_num);
+	seq_printf(seq, "fw_version:       %s\n", idev->dev_info.fw_version);
+	seq_printf(seq, "fw_status:        0x%x\n",
+		   ioread8(&idev->dev_info_regs->fw_status));
+	seq_printf(seq, "fw_heartbeat:     0x%x\n",
+		   ioread32(&idev->dev_info_regs->fw_heartbeat));
+	seq_printf(seq, "cmb_pages:        0x%x\n", ionic_cmb_pages_in_use(ionic->lif));
+
+	seq_printf(seq, "nlifs:            %d\n", ident->dev.nlifs);
+	seq_printf(seq, "nintrs:           %d\n", ident->dev.nintrs);
+	seq_printf(seq, "eth_eq_count:     %d\n", ident->dev.eq_count);
+	seq_printf(seq, "ndbpgs_per_lif:   %d\n", ident->dev.ndbpgs_per_lif);
+	seq_printf(seq, "intr_coal_mult:   %d\n", ident->dev.intr_coal_mult);
+	seq_printf(seq, "intr_coal_div:    %d\n", ident->dev.intr_coal_div);
+
+	seq_printf(seq, "max_ucast_filters:  %d\n", ident->lif.eth.max_ucast_filters);
+	seq_printf(seq, "max_mcast_filters:  %d\n", ident->lif.eth.max_mcast_filters);
+
+	seq_printf(seq, "rdma_qp_opcodes:  %d\n", ident->lif.rdma.qp_opcodes);
+	seq_printf(seq, "rdma_admin_opcodes: %d\n", ident->lif.rdma.admin_opcodes);
+	seq_printf(seq, "rdma_max_stride:    %d\n", ident->lif.rdma.max_stride);
+	seq_printf(seq, "rdma_cl_stride:    %d\n", ident->lif.rdma.cl_stride);
+	seq_printf(seq, "rdma_pte_stride:    %d\n", ident->lif.rdma.pte_stride);
+	seq_printf(seq, "rdma_rrq_stride:    %d\n", ident->lif.rdma.rrq_stride);
+	seq_printf(seq, "rdma_rsq_stride:    %d\n", ident->lif.rdma.rsq_stride);
+
+	identity_show_qtype(seq, "rdma_aq", &ident->lif.rdma.aq_qtype);
+	identity_show_qtype(seq, "rdma_sq", &ident->lif.rdma.sq_qtype);
+	identity_show_qtype(seq, "rdma_rq", &ident->lif.rdma.rq_qtype);
+	identity_show_qtype(seq, "rdma_cq", &ident->lif.rdma.cq_qtype);
+	identity_show_qtype(seq, "rdma_eq", &ident->lif.rdma.eq_qtype);
+
+	return 0;
+}
+DEFINE_SHOW_ATTRIBUTE(identity);
+
+void ionic_debugfs_add_ident(struct ionic *ionic)
+{
+	debugfs_create_file("identity", 0400, ionic->dentry,
+			    ionic, &identity_fops);
+}
+
+void ionic_debugfs_add_sizes(struct ionic *ionic)
+{
+	debugfs_create_u32("nlifs", 0400, ionic->dentry,
+			   (u32 *)&ionic->ident.dev.nlifs);
+	debugfs_create_u32("nintrs", 0400, ionic->dentry, &ionic->nintrs);
+
+	debugfs_create_u32("ntxqs_per_lif", 0400, ionic->dentry,
+			   (u32 *)&ionic->ident.lif.eth.config.queue_count[IONIC_QTYPE_TXQ]);
+	debugfs_create_u32("nrxqs_per_lif", 0400, ionic->dentry,
+			   (u32 *)&ionic->ident.lif.eth.config.queue_count[IONIC_QTYPE_RXQ]);
+}
+
+static int q_tail_show(struct seq_file *seq, void *v)
+{
+	struct ionic_queue *q = seq->private;
+
+	seq_printf(seq, "%d\n", q->tail_idx);
+
+	return 0;
+}
+DEFINE_SHOW_ATTRIBUTE(q_tail);
+
+static int q_head_show(struct seq_file *seq, void *v)
+{
+	struct ionic_queue *q = seq->private;
+
+	seq_printf(seq, "%d\n", q->head_idx);
+
+	return 0;
+}
+DEFINE_SHOW_ATTRIBUTE(q_head);
+
+static int cq_tail_show(struct seq_file *seq, void *v)
+{
+	struct ionic_cq *cq = seq->private;
+
+	seq_printf(seq, "%d\n", cq->tail_idx);
+
+	return 0;
+}
+DEFINE_SHOW_ATTRIBUTE(cq_tail);
+
+static const struct debugfs_reg32 intr_ctrl_regs[] = {
+	{ .name = "coal_init", .offset = 0, },
+	{ .name = "mask", .offset = 4, },
+	{ .name = "credits", .offset = 8, },
+	{ .name = "mask_on_assert", .offset = 12, },
+	{ .name = "coal_timer", .offset = 16, },
+};
+
+void ionic_debugfs_add_qcq(struct ionic_lif *lif, struct ionic_qcq *qcq)
+{
+	struct dentry *qcq_dentry, *q_dentry, *cq_dentry;
+	struct dentry *intr_dentry, *stats_dentry;
+	struct ionic_dev *idev = &lif->ionic->idev;
+	struct debugfs_regset32 *intr_ctrl_regset;
+	struct ionic_intr_info *intr = &qcq->intr;
+	struct debugfs_blob_wrapper *desc_blob;
+	struct device *dev = lif->ionic->dev;
+	struct ionic_tx_stats *txqstats;
+	struct ionic_rx_stats *rxqstats;
+	struct ionic_queue *q = &qcq->q;
+	struct ionic_cq *cq = &qcq->cq;
+
+	qcq_dentry = debugfs_create_dir(q->name, lif->dentry);
+	if (IS_ERR_OR_NULL(qcq_dentry))
+		return;
+	qcq->dentry = qcq_dentry;
+
+	debugfs_create_x64("q_base_pa", 0400, qcq_dentry, &qcq->q_base_pa);
+	debugfs_create_x32("q_size", 0400, qcq_dentry, &qcq->q_size);
+	debugfs_create_x64("cq_base_pa", 0400, qcq_dentry, &qcq->cq_base_pa);
+	debugfs_create_x32("cq_size", 0400, qcq_dentry, &qcq->cq_size);
+	debugfs_create_x64("sg_base_pa", 0400, qcq_dentry, &qcq->sg_base_pa);
+	debugfs_create_x32("sg_size", 0400, qcq_dentry, &qcq->sg_size);
+	debugfs_create_x32("cmb_order", 0400, qcq_dentry, &qcq->cmb_order);
+	debugfs_create_x32("cmb_pgid", 0400, qcq_dentry, &qcq->cmb_pgid);
+
+#if (RHEL_RELEASE_CODE && (RHEL_RELEASE_VERSION(7, 0) < RHEL_RELEASE_CODE))
+	debugfs_create_u8("armed", 0400, qcq_dentry, (u8 *)&qcq->armed);
+#else
+	debugfs_create_bool("armed", 0400, qcq_dentry, &qcq->armed);
+#endif
+
+	q_dentry = debugfs_create_dir("q", qcq->dentry);
+	if (IS_ERR_OR_NULL(q_dentry))
+		return;
+
+	debugfs_create_u32("index", 0400, q_dentry, &q->index);
+	debugfs_create_u32("num_descs", 0400, q_dentry, &q->num_descs);
+	debugfs_create_u32("desc_size", 0400, q_dentry, &q->desc_size);
+	debugfs_create_u32("pid", 0400, q_dentry, &q->pid);
+	debugfs_create_u32("qid", 0400, q_dentry, &q->hw_index);
+	debugfs_create_u32("qtype", 0400, q_dentry, &q->hw_type);
+	debugfs_create_u64("drop", 0400, q_dentry, &q->drop);
+	debugfs_create_u64("stop", 0400, q_dentry, &q->stop);
+	debugfs_create_u64("wake", 0400, q_dentry, &q->wake);
+
+	debugfs_create_file("tail", 0400, q_dentry, q, &q_tail_fops);
+	debugfs_create_file("head", 0400, q_dentry, q, &q_head_fops);
+
+	desc_blob = devm_kzalloc(dev, sizeof(*desc_blob), GFP_KERNEL);
+	if (!desc_blob)
+		return;
+	desc_blob->data = q->base;
+	desc_blob->size = (unsigned long)q->num_descs * q->desc_size;
+	debugfs_create_blob("desc_blob", 0400, q_dentry, desc_blob);
+
+	if (qcq->flags & IONIC_QCQ_F_SG) {
+		desc_blob = devm_kzalloc(dev, sizeof(*desc_blob), GFP_KERNEL);
+		if (!desc_blob)
+			return;
+		desc_blob->data = q->sg_base;
+		desc_blob->size = (unsigned long)q->num_descs * q->sg_desc_size;
+		debugfs_create_blob("sg_desc_blob", 0400, q_dentry,
+				    desc_blob);
+	}
+
+	if (qcq->flags & IONIC_QCQ_F_TX_STATS) {
+		stats_dentry = debugfs_create_dir("tx_stats", q_dentry);
+		if (IS_ERR_OR_NULL(stats_dentry))
+			return;
+		txqstats = &lif->txqstats[q->index];
+
+		debugfs_create_u64("dma_map_err", 0400, stats_dentry,
+				   &txqstats[q->index].dma_map_err);
+		debugfs_create_u64("pkts", 0400, stats_dentry,
+				   &txqstats[q->index].pkts);
+		debugfs_create_u64("bytes", 0400, stats_dentry,
+				   &txqstats[q->index].bytes);
+		debugfs_create_u64("clean", 0400, stats_dentry,
+				   &txqstats[q->index].clean);
+		debugfs_create_u64("linearize", 0400, stats_dentry,
+				   &txqstats[q->index].linearize);
+		debugfs_create_u64("csum_none", 0400, stats_dentry,
+				   &txqstats[q->index].csum_none);
+		debugfs_create_u64("csum", 0400, stats_dentry,
+				   &txqstats[q->index].csum);
+		debugfs_create_u64("crc32_csum", 0400, stats_dentry,
+				   &txqstats[q->index].crc32_csum);
+		debugfs_create_u64("tso", 0400, stats_dentry,
+				   &txqstats[q->index].tso);
+		debugfs_create_u64("frags", 0400, stats_dentry,
+				   &txqstats[q->index].frags);
+	}
+
+	if (qcq->flags & IONIC_QCQ_F_RX_STATS) {
+		stats_dentry = debugfs_create_dir("rx_stats", q_dentry);
+		if (IS_ERR_OR_NULL(stats_dentry))
+			return;
+		rxqstats = &lif->rxqstats[q->index];
+
+		debugfs_create_u64("dma_map_err", 0400, stats_dentry,
+				   &rxqstats[q->index].dma_map_err);
+		debugfs_create_u64("alloc_err", 0400, stats_dentry,
+				   &rxqstats[q->index].alloc_err);
+		debugfs_create_u64("pkts", 0400, stats_dentry,
+				   &rxqstats[q->index].pkts);
+		debugfs_create_u64("bytes", 0400, stats_dentry,
+				   &rxqstats[q->index].bytes);
+		debugfs_create_u64("csum_none", 0400, stats_dentry,
+				   &rxqstats[q->index].csum_none);
+		debugfs_create_u64("csum_complete", 0400, stats_dentry,
+				   &rxqstats[q->index].csum_complete);
+		debugfs_create_u64("csum_error", 0400, stats_dentry,
+				   &rxqstats[q->index].csum_error);
+	}
+
+	cq_dentry = debugfs_create_dir("cq", qcq->dentry);
+	if (IS_ERR_OR_NULL(cq_dentry))
+		return;
+
+	debugfs_create_x64("base_pa", 0400, cq_dentry, &cq->base_pa);
+	debugfs_create_u32("num_descs", 0400, cq_dentry, &cq->num_descs);
+	debugfs_create_u32("desc_size", 0400, cq_dentry, &cq->desc_size);
+
+#if (RHEL_RELEASE_CODE && (RHEL_RELEASE_VERSION(7, 0) < RHEL_RELEASE_CODE))
+	debugfs_create_u8("done_color", 0400, cq_dentry, (u8 *)&cq->done_color);
+#else
+	debugfs_create_bool("done_color", 0400, cq_dentry, &cq->done_color);
+#endif
+
+	debugfs_create_file("tail", 0400, cq_dentry, cq, &cq_tail_fops);
+
+	desc_blob = devm_kzalloc(dev, sizeof(*desc_blob), GFP_KERNEL);
+	if (!desc_blob)
+		return;
+	desc_blob->data = cq->base;
+	desc_blob->size = (unsigned long)cq->num_descs * cq->desc_size;
+	debugfs_create_blob("desc_blob", 0400, cq_dentry, desc_blob);
+
+	if (qcq->flags & IONIC_QCQ_F_INTR) {
+		intr_dentry = debugfs_create_dir("intr", qcq->dentry);
+		if (IS_ERR_OR_NULL(intr_dentry))
+			return;
+
+		debugfs_create_u32("index", 0400, intr_dentry,
+				   &intr->index);
+		debugfs_create_u32("vector", 0400, intr_dentry,
+				   &intr->vector);
+		debugfs_create_u32("dim_coal_hw", 0400, intr_dentry,
+				   &intr->dim_coal_hw);
+
+		intr_ctrl_regset = devm_kzalloc(dev, sizeof(*intr_ctrl_regset),
+						GFP_KERNEL);
+		if (!intr_ctrl_regset)
+			return;
+		intr_ctrl_regset->regs = intr_ctrl_regs;
+		intr_ctrl_regset->nregs = ARRAY_SIZE(intr_ctrl_regs);
+		intr_ctrl_regset->base = &idev->intr_ctrl[intr->index];
+
+		debugfs_create_regset32("intr_ctrl", 0400, intr_dentry,
+					intr_ctrl_regset);
+	}
+
+	if (qcq->flags & IONIC_QCQ_F_NOTIFYQ) {
+		stats_dentry = debugfs_create_dir("notifyblock", qcq->dentry);
+		if (IS_ERR_OR_NULL(stats_dentry))
+			return;
+
+		debugfs_create_u64("eid", 0400, stats_dentry,
+				   (u64 *)&lif->info->status.eid);
+		debugfs_create_u16("link_status", 0400, stats_dentry,
+				   (u16 *)&lif->info->status.link_status);
+		debugfs_create_u32("link_speed", 0400, stats_dentry,
+				   (u32 *)&lif->info->status.link_speed);
+		debugfs_create_u16("link_down_count", 0400, stats_dentry,
+				   (u16 *)&lif->info->status.link_down_count);
+	}
+}
+
+static int netdev_show(struct seq_file *seq, void *v)
+{
+	struct net_device *netdev = seq->private;
+
+	seq_printf(seq, "%s\n", netdev->name);
+
+	return 0;
+}
+DEFINE_SHOW_ATTRIBUTE(netdev);
+
+static int lif_identity_show(struct seq_file *seq, void *v)
+{
+	union ionic_lif_identity *lid = seq->private;
+
+	seq_printf(seq, "capabilities:      0x%llx\n", lid->capabilities);
+	seq_printf(seq, "eth-version:       0x%x\n", lid->eth.version);
+	seq_printf(seq, "max_ucast_filters: %d\n", lid->eth.max_ucast_filters);
+	seq_printf(seq, "max_mcast_filters: %d\n", lid->eth.max_mcast_filters);
+	seq_printf(seq, "rss_ind_tbl_sz:    %d\n", lid->eth.rss_ind_tbl_sz);
+	seq_printf(seq, "min_frame_size:    %d\n", lid->eth.min_frame_size);
+	seq_printf(seq, "max_frame_size:    %d\n", lid->eth.max_frame_size);
+
+	seq_printf(seq, "state:             %d\n", lid->eth.config.state);
+	seq_printf(seq, "name:              \"%s\"\n", lid->eth.config.name);
+	seq_printf(seq, "mtu:               %d\n", lid->eth.config.mtu);
+	seq_printf(seq, "mac:               %pM\n", lid->eth.config.mac);
+	seq_printf(seq, "features:          0x%08llx\n",
+		   lid->eth.config.features);
+	seq_printf(seq, "adminq-count:      %d\n",
+		   lid->eth.config.queue_count[IONIC_QTYPE_ADMINQ]);
+	seq_printf(seq, "notifyq-count:     %d\n",
+		   lid->eth.config.queue_count[IONIC_QTYPE_NOTIFYQ]);
+	seq_printf(seq, "rxq-count:         %d\n",
+		   lid->eth.config.queue_count[IONIC_QTYPE_RXQ]);
+	seq_printf(seq, "txq-count:         %d\n",
+		   lid->eth.config.queue_count[IONIC_QTYPE_TXQ]);
+	seq_printf(seq, "eq-count:          %d\n",
+		   lid->eth.config.queue_count[IONIC_QTYPE_EQ]);
+
+	seq_puts(seq, "\n");
+
+	seq_printf(seq, "rdma_version:        0x%x\n", lid->rdma.version);
+	seq_printf(seq, "rdma_qp_opcodes:     %d\n", lid->rdma.qp_opcodes);
+	seq_printf(seq, "rdma_admin_opcodes:  %d\n", lid->rdma.admin_opcodes);
+	seq_printf(seq, "rdma_npts_per_lif:   %d\n", lid->rdma.npts_per_lif);
+	seq_printf(seq, "rdma_nmrs_per_lif:   %d\n", lid->rdma.nmrs_per_lif);
+	seq_printf(seq, "rdma_nahs_per_lif:   %d\n", lid->rdma.nahs_per_lif);
+	seq_printf(seq, "rdma_max_stride:     %d\n", lid->rdma.max_stride);
+	seq_printf(seq, "rdma_cl_stride:      %d\n", lid->rdma.cl_stride);
+	seq_printf(seq, "rdma_pte_stride:     %d\n", lid->rdma.pte_stride);
+	seq_printf(seq, "rdma_rrq_stride:     %d\n", lid->rdma.rrq_stride);
+	seq_printf(seq, "rdma_rsq_stride:     %d\n", lid->rdma.rsq_stride);
+	seq_printf(seq, "rdma_dcqcn_profiles: %d\n", lid->rdma.dcqcn_profiles);
+
+	identity_show_qtype(seq, "rdma_aq", &lid->rdma.aq_qtype);
+	identity_show_qtype(seq, "rdma_sq", &lid->rdma.sq_qtype);
+	identity_show_qtype(seq, "rdma_rq", &lid->rdma.rq_qtype);
+	identity_show_qtype(seq, "rdma_cq", &lid->rdma.cq_qtype);
+	identity_show_qtype(seq, "rdma_eq", &lid->rdma.eq_qtype);
+
+	return 0;
+}
+DEFINE_SHOW_ATTRIBUTE(lif_identity);
+
+static int lif_state_show(struct seq_file *seq, void *v)
+{
+	struct ionic_lif *lif = seq->private;
+
+	seq_printf(seq, "0x%08lx\n", lif->state[0]);
+
+	return 0;
+}
+DEFINE_SHOW_ATTRIBUTE(lif_state);
+
+static int lif_filters_show(struct seq_file *seq, void *v)
+{
+	struct ionic_lif *lif = seq->private;
+	struct ionic_rx_filter *f;
+	struct hlist_head *head;
+	struct hlist_node *tmp;
+	unsigned int i;
+
+	seq_puts(seq, "id      flow        state type  filter\n");
+	spin_lock_bh(&lif->rx_filters.lock);
+	for (i = 0; i < IONIC_RX_FILTER_HLISTS; i++) {
+		head = &lif->rx_filters.by_id[i];
+		hlist_for_each_entry_safe(f, tmp, head, by_id) {
+			switch (le16_to_cpu(f->cmd.match)) {
+			case IONIC_RX_FILTER_MATCH_VLAN:
+				seq_printf(seq, "0x%04x  0x%08x  0x%02x  vlan  0x%04x\n",
+					   f->filter_id, f->flow_id, f->state,
+					   le16_to_cpu(f->cmd.vlan.vlan));
+				break;
+			case IONIC_RX_FILTER_MATCH_MAC:
+				seq_printf(seq, "0x%04x  0x%08x  0x%02x  mac   %pM\n",
+					   f->filter_id, f->flow_id, f->state,
+					   f->cmd.mac.addr);
+				break;
+			case IONIC_RX_FILTER_MATCH_MAC_VLAN:
+				seq_printf(seq, "0x%04x  0x%08x  0x%02x  macvl 0x%04x %pM\n",
+					   f->filter_id, f->flow_id, f->state,
+					   le16_to_cpu(f->cmd.vlan.vlan),
+					   f->cmd.mac.addr);
+				break;
+			case IONIC_RX_FILTER_STEER_PKTCLASS:
+				seq_printf(seq, "0x%04x  0x%08x  0x%02x  rxstr 0x%llx\n",
+					   f->filter_id, f->flow_id, f->state,
+					   le64_to_cpu(f->cmd.pkt_class));
+				break;
+			}
+		}
+	}
+	spin_unlock_bh(&lif->rx_filters.lock);
+
+	return 0;
+}
+DEFINE_SHOW_ATTRIBUTE(lif_filters);
+
+static int lif_n_txrx_alloc_show(struct seq_file *seq, void *v)
+{
+	struct ionic_lif *lif = seq->private;
+
+	seq_printf(seq, "%llu\n", lif->n_txrx_alloc);
+
+	return 0;
+}
+DEFINE_SHOW_ATTRIBUTE(lif_n_txrx_alloc);
+
+void ionic_debugfs_add_lif(struct ionic_lif *lif)
+{
+	struct dentry *lif_dentry;
+
+	lif_dentry = debugfs_create_dir(lif->name, lif->ionic->dentry);
+	if (IS_ERR_OR_NULL(lif_dentry))
+		return;
+	lif->dentry = lif_dentry;
+
+	debugfs_create_file("netdev", 0400, lif->dentry,
+			    lif->netdev, &netdev_fops);
+	debugfs_create_file("identity", 0400, lif->dentry,
+			    lif->identity, &lif_identity_fops);
+	debugfs_create_file("state", 0400, lif->dentry,
+			    lif, &lif_state_fops);
+	debugfs_create_file("filters", 0400, lif->dentry,
+			    lif, &lif_filters_fops);
+	debugfs_create_file("txrx_alloc", 0400, lif->dentry,
+			    lif, &lif_n_txrx_alloc_fops);
+}
+
+void ionic_debugfs_del_lif(struct ionic_lif *lif)
+{
+	debugfs_remove_recursive(lif->dentry);
+	lif->dentry = NULL;
+}
+
+void ionic_debugfs_add_eq(struct ionic_eq *eq)
+{
+	const int ring_bytes = sizeof(struct ionic_eq_comp) * IONIC_EQ_DEPTH;
+	struct device *dev = eq->ionic->dev;
+	struct debugfs_blob_wrapper *blob;
+	struct debugfs_regset32 *regset;
+	struct dentry *ent;
+	char name[40];
+
+	snprintf(name, sizeof(name), "eq%02u", eq->index);
+
+	ent = debugfs_create_dir(name, eq->ionic->dentry);
+	if (IS_ERR_OR_NULL(ent))
+		return;
+
+	blob = devm_kzalloc(dev, sizeof(*blob), GFP_KERNEL);
+	blob->data = eq->ring[0].base;
+	blob->size = ring_bytes;
+	debugfs_create_blob("ring0", 0400, ent, blob);
+
+	blob = devm_kzalloc(dev, sizeof(*blob), GFP_KERNEL);
+	blob->data = eq->ring[1].base;
+	blob->size = ring_bytes;
+	debugfs_create_blob("ring1", 0400, ent, blob);
+
+	regset = devm_kzalloc(dev, sizeof(*regset), GFP_KERNEL);
+	regset->regs = intr_ctrl_regs;
+	regset->nregs = ARRAY_SIZE(intr_ctrl_regs);
+	regset->base = &eq->ionic->idev.intr_ctrl[eq->intr.index];
+	debugfs_create_regset32("intr_ctrl", 0400, ent, regset);
+}
+
+void ionic_debugfs_del_qcq(struct ionic_qcq *qcq)
+{
+	debugfs_remove_recursive(qcq->dentry);
+	qcq->dentry = NULL;
+}
+
+#endif
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_debugfs.h b/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_debugfs.h
new file mode 100644
index 000000000..5849ccb4d
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_debugfs.h
@@ -0,0 +1,43 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/* Copyright(c) 2017 - 2022 Pensando Systems, Inc */
+
+#ifndef _IONIC_DEBUGFS_H_
+#define _IONIC_DEBUGFS_H_
+
+#include <linux/debugfs.h>
+
+struct ionic;
+struct ionic_qcq;
+
+#ifdef CONFIG_DEBUG_FS
+
+void ionic_debugfs_create(void);
+void ionic_debugfs_destroy(void);
+void ionic_debugfs_add_dev(struct ionic *ionic);
+void ionic_debugfs_del_dev(struct ionic *ionic);
+void ionic_debugfs_add_bars(struct ionic *ionic);
+void ionic_debugfs_add_dev_cmd(struct ionic *ionic);
+void ionic_debugfs_add_ident(struct ionic *ionic);
+void ionic_debugfs_add_sizes(struct ionic *ionic);
+void ionic_debugfs_add_eq(struct ionic_eq *eq);
+void ionic_debugfs_add_lif(struct ionic_lif *lif);
+void ionic_debugfs_add_qcq(struct ionic_lif *lif, struct ionic_qcq *qcq);
+void ionic_debugfs_del_lif(struct ionic_lif *lif);
+void ionic_debugfs_del_qcq(struct ionic_qcq *qcq);
+#else
+static inline void ionic_debugfs_create(void) { }
+static inline void ionic_debugfs_destroy(void) { }
+static inline void ionic_debugfs_add_dev(struct ionic *ionic) { }
+static inline void ionic_debugfs_del_dev(struct ionic *ionic) { }
+static inline void ionic_debugfs_add_bars(struct ionic *ionic) { }
+static inline void ionic_debugfs_add_dev_cmd(struct ionic *ionic) { }
+static inline void ionic_debugfs_add_ident(struct ionic *ionic) { }
+static inline void ionic_debugfs_add_sizes(struct ionic *ionic) { }
+static inline void ionic_debugfs_add_eq(struct ionic_eq *eq) { }
+static inline void ionic_debugfs_add_lif(struct ionic_lif *lif) { }
+static inline void ionic_debugfs_add_qcq(struct ionic_lif *lif, struct ionic_qcq *qcq) { }
+static inline void ionic_debugfs_del_lif(struct ionic_lif *lif) { }
+static inline void ionic_debugfs_del_qcq(struct ionic_qcq *qcq) { }
+#endif
+
+#endif /* _IONIC_DEBUGFS_H_ */
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_dev.c b/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_dev.c
new file mode 100644
index 000000000..42ba5ddf9
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_dev.c
@@ -0,0 +1,1208 @@
+// SPDX-License-Identifier: GPL-2.0
+/* Copyright(c) 2017 - 2022 Pensando Systems, Inc */
+
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/errno.h>
+#include <linux/io.h>
+#include <linux/slab.h>
+#include <linux/etherdevice.h>
+#include "ionic.h"
+#include "ionic_bus.h"
+#include "ionic_dev.h"
+#include "ionic_debugfs.h"
+#include "ionic_lif.h"
+
+void ionic_watchdog_cb(struct timer_list *t)
+{
+	struct ionic *ionic = from_timer(ionic, t, watchdog_timer);
+	struct ionic_lif *lif = ionic->lif;
+	struct ionic_deferred_work *work;
+	int hb;
+
+	mod_timer(&ionic->watchdog_timer,
+		  round_jiffies(jiffies + ionic->watchdog_period));
+
+	if (!lif)
+		return;
+
+	hb = ionic_heartbeat_check(ionic);
+	dev_dbg(ionic->dev, "%s: hb %d running %d UP %d\n",
+		__func__, hb, netif_running(lif->netdev),
+		test_bit(IONIC_LIF_F_UP, lif->state));
+
+	if (hb >= 0 &&
+	    !test_bit(IONIC_LIF_F_FW_RESET, lif->state))
+		ionic_link_status_check_request(lif, CAN_NOT_SLEEP);
+
+	if (test_bit(IONIC_LIF_F_FILTER_SYNC_NEEDED, lif->state) &&
+	    !test_bit(IONIC_LIF_F_FW_RESET, lif->state)) {
+		work = kzalloc(sizeof(*work), GFP_ATOMIC);
+		if (!work) {
+			netdev_err(lif->netdev, "rxmode change dropped\n");
+			return;
+		}
+
+		work->type = IONIC_DW_TYPE_RX_MODE;
+		netdev_dbg(lif->netdev, "deferred: rx_mode\n");
+		ionic_lif_deferred_enqueue(&lif->deferred, work);
+	}
+}
+
+void ionic_watchdog_init(struct ionic *ionic)
+{
+	struct ionic_dev *idev = &ionic->idev;
+
+	timer_setup(&ionic->watchdog_timer, ionic_watchdog_cb, 0);
+	if (ionic->pdev)
+		ionic->watchdog_period = IONIC_WATCHDOG_PCI_SECS * HZ;
+	else
+		ionic->watchdog_period = IONIC_WATCHDOG_PLAT_MSECS * HZ / 1000;
+
+	/* set times to ensure the first check will proceed */
+	atomic_long_set(&idev->last_check_time, jiffies - 2 * HZ);
+	idev->last_hb_time = jiffies - 2 * ionic->watchdog_period;
+	/* init as ready, so no transition if the first check succeeds */
+	idev->last_fw_hb = 0;
+	idev->fw_hb_ready = true;
+	idev->fw_status_ready = true;
+	idev->fw_generation = IONIC_FW_STS_F_GENERATION &
+			      ioread8(&idev->dev_info_regs->fw_status);
+}
+
+void ionic_init_devinfo(struct ionic *ionic)
+{
+	struct ionic_dev *idev = &ionic->idev;
+
+	idev->dev_info.asic_type = ioread8(&idev->dev_info_regs->asic_type);
+	idev->dev_info.asic_rev = ioread8(&idev->dev_info_regs->asic_rev);
+
+	memcpy_fromio(idev->dev_info.fw_version,
+		      idev->dev_info_regs->fw_version,
+		      IONIC_DEVINFO_FWVERS_BUFLEN);
+
+	memcpy_fromio(idev->dev_info.serial_num,
+		      idev->dev_info_regs->serial_num,
+		      IONIC_DEVINFO_SERIAL_BUFLEN);
+
+	idev->dev_info.fw_version[IONIC_DEVINFO_FWVERS_BUFLEN] = 0;
+	idev->dev_info.serial_num[IONIC_DEVINFO_SERIAL_BUFLEN] = 0;
+
+	dev_dbg(ionic->dev, "fw_version %s\n", idev->dev_info.fw_version);
+}
+
+int ionic_dev_setup(struct ionic *ionic)
+{
+	struct ionic_dev_bar *bar = ionic->bars;
+	unsigned int num_bars = ionic->num_bars;
+	struct ionic_dev *idev = &ionic->idev;
+	struct device *dev = ionic->dev;
+	int size;
+	u32 sig;
+
+	/* BAR0: dev_cmd and interrupts */
+	if (num_bars < 1) {
+		dev_err(dev, "No bars found, aborting\n");
+		return -EFAULT;
+	}
+
+	if (bar->len < IONIC_BAR0_SIZE) {
+		dev_err(dev, "Resource bar size %lu too small, aborting\n",
+			bar->len);
+		return -EFAULT;
+	}
+
+	idev->dev_info_regs = bar->vaddr + IONIC_BAR0_DEV_INFO_REGS_OFFSET;
+	idev->dev_cmd_regs = bar->vaddr + IONIC_BAR0_DEV_CMD_REGS_OFFSET;
+	idev->intr_status = bar->vaddr + IONIC_BAR0_INTR_STATUS_OFFSET;
+	idev->intr_ctrl = bar->vaddr + IONIC_BAR0_INTR_CTRL_OFFSET;
+
+	idev->hwstamp_regs = &idev->dev_info_regs->hwstamp;
+
+	sig = ioread32(&idev->dev_info_regs->signature);
+	if (sig != IONIC_DEV_INFO_SIGNATURE) {
+		dev_err(dev, "Incompatible firmware signature %x", sig);
+		return -EFAULT;
+	}
+
+	ionic_init_devinfo(ionic);
+
+	/* BAR1: doorbells */
+	bar++;
+	if (num_bars < 2) {
+		dev_err(dev, "Doorbell bar missing, aborting\n");
+		return -EFAULT;
+	}
+
+	ionic_watchdog_init(ionic);
+
+	idev->db_pages = bar->vaddr;
+	idev->phy_db_pages = bar->bus_addr;
+
+	/* BAR2: optional controller memory mapping */
+	bar++;
+	mutex_init(&idev->cmb_inuse_lock);
+	if (num_bars < 3 || !ionic->bars[IONIC_PCI_BAR_CMB].len) {
+		idev->cmb_inuse = NULL;
+		idev->phy_cmb_pages = 0;
+		idev->cmb_npages = 0;
+		return 0;
+	}
+
+	idev->phy_cmb_pages = bar->bus_addr;
+	idev->cmb_npages = bar->len / PAGE_SIZE;
+	size = BITS_TO_LONGS(idev->cmb_npages) * sizeof(long);
+	idev->cmb_inuse = kzalloc(size, GFP_KERNEL);
+	if (!idev->cmb_inuse) {
+		idev->phy_cmb_pages = 0;
+		idev->cmb_npages = 0;
+	}
+
+	return 0;
+}
+
+void ionic_dev_teardown(struct ionic *ionic)
+{
+	struct ionic_dev *idev = &ionic->idev;
+
+	kfree(idev->cmb_inuse);
+	idev->cmb_inuse = NULL;
+	idev->phy_cmb_pages = 0;
+	idev->cmb_npages = 0;
+
+	mutex_destroy(&idev->cmb_inuse_lock);
+}
+
+/* Devcmd Interface */
+bool ionic_is_fw_running(struct ionic_dev *idev)
+{
+	u8 fw_status = ioread8(&idev->dev_info_regs->fw_status);
+
+	/* firmware is useful only if the running bit is set and
+	 * fw_status != 0xff (bad PCI read)
+	 */
+	return (fw_status != 0xff) && (fw_status & IONIC_FW_STS_F_RUNNING);
+}
+
+int ionic_heartbeat_check(struct ionic *ionic)
+{
+	unsigned long check_time, last_check_time;
+	struct ionic_dev *idev = &ionic->idev;
+	struct ionic_lif *lif = ionic->lif;
+	bool fw_status_ready = true;
+	bool fw_hb_ready;
+	u8 fw_generation;
+	u8 fw_status;
+	u32 fw_hb;
+	u32 wt;
+
+	check_time = jiffies;
+	last_check_time = atomic_long_read(&idev->last_check_time);
+do_check_time:
+	/* on the host device wait at least one second before testing again */
+	if (ionic->pdev && time_before(check_time, last_check_time + HZ))
+		return 0;
+	if (!atomic_long_try_cmpxchg_relaxed(&idev->last_check_time,
+					     &last_check_time, check_time)) {
+		/* if called concurrently, only the first should proceed. */
+		dev_dbg(ionic->dev, "%s: do_check_time again\n", __func__);
+		goto do_check_time;
+	}
+
+	fw_status = ioread8(&idev->dev_info_regs->fw_status);
+
+	 /* If fw_status is not ready don't bother with the generation */
+	if (!ionic_is_fw_running(idev)) {
+		fw_status_ready = false;
+	} else {
+		fw_generation = fw_status & IONIC_FW_STS_F_GENERATION;
+		if (idev->fw_generation != fw_generation) {
+			dev_info(ionic->dev, "FW generation 0x%02x -> 0x%02x\n",
+				 idev->fw_generation, fw_generation);
+
+			idev->fw_generation = fw_generation;
+
+			/* If the generation changed, the fw status is not
+			 * ready so we need to trigger a fw-down cycle.  After
+			 * the down, the next watchdog will see the fw is up
+			 * and the generation value stable, so will trigger
+			 * the fw-up activity.
+			 *
+			 * If we had already moved to FW_RESET from a RESET event,
+			 * it is possible that we never saw the fw_status go to 0,
+			 * so we fake it a bit here to get FW up again.
+			 */
+			if (test_bit(IONIC_LIF_F_FW_RESET, lif->state))
+				idev->fw_status_ready = false;	/* go to running */
+			else
+				fw_status_ready = false;	/* go to down */
+		}
+	}
+
+	dev_dbg(ionic->dev, "fw_status 0x%02x ready %d idev->ready %d last_hb 0x%x state 0x%02lx\n",
+		fw_status, fw_status_ready, idev->fw_status_ready,
+		idev->last_fw_hb, lif->state[0]);
+
+	/* is this a transition? */
+	if (fw_status_ready != idev->fw_status_ready &&
+	    !test_bit(IONIC_LIF_F_FW_STOPPING, lif->state)) {
+		bool trigger = false;
+
+		idev->fw_status_ready = fw_status_ready;
+
+		if (!fw_status_ready && lif &&
+		    !test_bit(IONIC_LIF_F_FW_RESET, lif->state) &&
+		    !test_and_set_bit(IONIC_LIF_F_FW_STOPPING, lif->state)) {
+
+			dev_info(ionic->dev, "FW stopped 0x%02x\n", fw_status);
+			trigger = true;
+
+		} else if (fw_status_ready && lif &&
+			   test_bit(IONIC_LIF_F_FW_RESET, lif->state) &&
+			   !test_bit(IONIC_LIF_F_FW_STOPPING, lif->state)) {
+
+			dev_info(ionic->dev, "FW running 0x%02x\n", fw_status);
+			trigger = true;
+		}
+
+		if (trigger) {
+			struct ionic_deferred_work *work;
+
+			work = kzalloc(sizeof(*work), GFP_ATOMIC);
+			if (work) {
+				work->type = IONIC_DW_TYPE_LIF_RESET;
+				work->fw_status = fw_status_ready;
+				ionic_lif_deferred_enqueue(&lif->deferred, work);
+			}
+		}
+	}
+
+	if (!idev->fw_status_ready)
+		return -ENXIO;
+
+	/* Because of some variability in the actual FW heartbeat, we
+	 * wait longer than the current devcmd_timeout before checking
+	 * again, but never less than 5 seconds.
+	 */
+	last_check_time = idev->last_hb_time;
+	wt = max_t(int, (devcmd_timeout * 2), DEVCMD_TIMEOUT);
+	if (time_before(check_time, last_check_time + wt * HZ))
+		return 0;
+
+	fw_hb = ioread32(&idev->dev_info_regs->fw_heartbeat);
+	fw_hb_ready = fw_hb != idev->last_fw_hb;
+
+	/* early FW version had no heartbeat, so fake it */
+	if (!fw_hb_ready && !fw_hb)
+		fw_hb_ready = true;
+
+	dev_dbg(ionic->dev, "%s: fw_hb %u last_fw_hb %u ready %u\n",
+		__func__, fw_hb, idev->last_fw_hb, fw_hb_ready);
+
+	idev->last_fw_hb = fw_hb;
+
+	/* log a transition */
+	if (fw_hb_ready != idev->fw_hb_ready) {
+		idev->fw_hb_ready = fw_hb_ready;
+		if (!fw_hb_ready)
+			dev_info(ionic->dev, "FW heartbeat stalled at %d\n", fw_hb);
+		else
+			dev_info(ionic->dev, "FW heartbeat restored at %d\n", fw_hb);
+	}
+
+	if (!fw_hb_ready)
+		return -ENXIO;
+
+	idev->last_hb_time = check_time;
+
+	return 0;
+}
+
+u8 ionic_dev_cmd_status(struct ionic_dev *idev)
+{
+	return ioread8(&idev->dev_cmd_regs->comp.comp.status);
+}
+
+bool ionic_dev_cmd_done(struct ionic_dev *idev)
+{
+	return ioread32(&idev->dev_cmd_regs->done) & IONIC_DEV_CMD_DONE;
+}
+
+void ionic_dev_cmd_comp(struct ionic_dev *idev, union ionic_dev_cmd_comp *comp)
+{
+	memcpy_fromio(comp, &idev->dev_cmd_regs->comp, sizeof(*comp));
+}
+
+void ionic_dev_cmd_go(struct ionic_dev *idev, union ionic_dev_cmd *cmd)
+{
+	memcpy_toio(&idev->dev_cmd_regs->cmd, cmd, sizeof(*cmd));
+	iowrite32(0, &idev->dev_cmd_regs->done);
+	iowrite32(1, &idev->dev_cmd_regs->doorbell);
+}
+
+/* Device commands */
+void ionic_dev_cmd_identify(struct ionic_dev *idev, u8 ver)
+{
+	union ionic_dev_cmd cmd = {
+		.identify.opcode = IONIC_CMD_IDENTIFY,
+		.identify.ver = ver,
+	};
+
+	ionic_dev_cmd_go(idev, &cmd);
+}
+
+void ionic_dev_cmd_init(struct ionic_dev *idev)
+{
+	union ionic_dev_cmd cmd = {
+		.init.opcode = IONIC_CMD_INIT,
+		.init.type = 0,
+	};
+
+	ionic_dev_cmd_go(idev, &cmd);
+}
+
+void ionic_dev_cmd_reset(struct ionic_dev *idev)
+{
+	union ionic_dev_cmd cmd = {
+		.reset.opcode = IONIC_CMD_RESET,
+	};
+
+	ionic_dev_cmd_go(idev, &cmd);
+}
+
+/* Port commands */
+void ionic_dev_cmd_port_identify(struct ionic_dev *idev)
+{
+	union ionic_dev_cmd cmd = {
+		.port_init.opcode = IONIC_CMD_PORT_IDENTIFY,
+		.port_init.index = 0,
+	};
+
+	ionic_dev_cmd_go(idev, &cmd);
+}
+
+void ionic_dev_cmd_port_init(struct ionic_dev *idev)
+{
+	union ionic_dev_cmd cmd = {
+		.port_init.opcode = IONIC_CMD_PORT_INIT,
+		.port_init.index = 0,
+		.port_init.info_pa = cpu_to_le64(idev->port_info_pa),
+	};
+
+	ionic_dev_cmd_go(idev, &cmd);
+}
+
+void ionic_dev_cmd_port_reset(struct ionic_dev *idev)
+{
+	union ionic_dev_cmd cmd = {
+		.port_reset.opcode = IONIC_CMD_PORT_RESET,
+		.port_reset.index = 0,
+	};
+
+	ionic_dev_cmd_go(idev, &cmd);
+}
+
+void ionic_dev_cmd_port_state(struct ionic_dev *idev, u8 state)
+{
+	union ionic_dev_cmd cmd = {
+		.port_setattr.opcode = IONIC_CMD_PORT_SETATTR,
+		.port_setattr.index = 0,
+		.port_setattr.attr = IONIC_PORT_ATTR_STATE,
+		.port_setattr.state = state,
+	};
+
+	ionic_dev_cmd_go(idev, &cmd);
+}
+
+void ionic_dev_cmd_port_speed(struct ionic_dev *idev, u32 speed)
+{
+	union ionic_dev_cmd cmd = {
+		.port_setattr.opcode = IONIC_CMD_PORT_SETATTR,
+		.port_setattr.index = 0,
+		.port_setattr.attr = IONIC_PORT_ATTR_SPEED,
+		.port_setattr.speed = cpu_to_le32(speed),
+	};
+
+	ionic_dev_cmd_go(idev, &cmd);
+}
+
+void ionic_dev_cmd_port_autoneg(struct ionic_dev *idev, u8 an_enable)
+{
+	union ionic_dev_cmd cmd = {
+		.port_setattr.opcode = IONIC_CMD_PORT_SETATTR,
+		.port_setattr.index = 0,
+		.port_setattr.attr = IONIC_PORT_ATTR_AUTONEG,
+		.port_setattr.an_enable = an_enable,
+	};
+
+	ionic_dev_cmd_go(idev, &cmd);
+}
+
+void ionic_dev_cmd_port_fec(struct ionic_dev *idev, u8 fec_type)
+{
+	union ionic_dev_cmd cmd = {
+		.port_setattr.opcode = IONIC_CMD_PORT_SETATTR,
+		.port_setattr.index = 0,
+		.port_setattr.attr = IONIC_PORT_ATTR_FEC,
+		.port_setattr.fec_type = fec_type,
+	};
+
+	ionic_dev_cmd_go(idev, &cmd);
+}
+
+void ionic_dev_cmd_port_pause(struct ionic_dev *idev, u8 pause_type)
+{
+	union ionic_dev_cmd cmd = {
+		.port_setattr.opcode = IONIC_CMD_PORT_SETATTR,
+		.port_setattr.index = 0,
+		.port_setattr.attr = IONIC_PORT_ATTR_PAUSE,
+		.port_setattr.pause_type = pause_type,
+	};
+
+	ionic_dev_cmd_go(idev, &cmd);
+}
+
+/* VF commands */
+int ionic_set_vf_config(struct ionic *ionic, int vf,
+			struct ionic_vf_setattr_cmd *vfc)
+{
+	union ionic_dev_cmd cmd = {
+		.vf_setattr.opcode = IONIC_CMD_VF_SETATTR,
+		.vf_setattr.attr = vfc->attr,
+		.vf_setattr.vf_index = cpu_to_le16(vf),
+	};
+	int err;
+
+	if (vf >= ionic->num_vfs)
+		return -EINVAL;
+
+	memcpy(cmd.vf_setattr.pad, vfc->pad, sizeof(vfc->pad));
+
+	mutex_lock(&ionic->dev_cmd_lock);
+	ionic_dev_cmd_go(&ionic->idev, &cmd);
+	err = ionic_dev_cmd_wait(ionic, devcmd_timeout);
+	mutex_unlock(&ionic->dev_cmd_lock);
+
+	return err;
+}
+
+int ionic_dev_cmd_vf_getattr(struct ionic *ionic, int vf, u8 attr,
+			     struct ionic_vf_getattr_comp *comp)
+{
+	union ionic_dev_cmd cmd = {
+		.vf_getattr.opcode = IONIC_CMD_VF_GETATTR,
+		.vf_getattr.attr = attr,
+		.vf_getattr.vf_index = cpu_to_le16(vf),
+	};
+	int err;
+
+	if (vf >= ionic->num_vfs)
+		return -EINVAL;
+
+	switch (attr) {
+	case IONIC_VF_ATTR_SPOOFCHK:
+	case IONIC_VF_ATTR_TRUST:
+	case IONIC_VF_ATTR_LINKSTATE:
+	case IONIC_VF_ATTR_MAC:
+	case IONIC_VF_ATTR_VLAN:
+	case IONIC_VF_ATTR_RATE:
+		break;
+	case IONIC_VF_ATTR_STATSADDR:
+	default:
+		return -EINVAL;
+	}
+
+	mutex_lock(&ionic->dev_cmd_lock);
+	ionic_dev_cmd_go(&ionic->idev, &cmd);
+	err = ionic_dev_cmd_wait_nomsg(ionic, devcmd_timeout);
+	memcpy_fromio(comp, &ionic->idev.dev_cmd_regs->comp.vf_getattr,
+		      sizeof(*comp));
+	mutex_unlock(&ionic->dev_cmd_lock);
+
+	if (err && comp->status != IONIC_RC_ENOSUPP)
+		ionic_dev_cmd_dev_err_print(ionic, cmd.vf_getattr.opcode,
+					    comp->status, err);
+
+	return err;
+}
+
+void ionic_vf_start(struct ionic *ionic, int vf)
+{
+#ifdef IONIC_DEV_IDENTITY_VERSION_2
+	union ionic_dev_cmd cmd = {
+		.vf_ctrl.opcode = IONIC_CMD_VF_CTRL,
+	};
+
+	if (!(ionic->ident.dev.capabilities & IONIC_DEV_CAP_VF_CTRL))
+		return;
+
+	if (vf == -1) {
+		cmd.vf_ctrl.ctrl_opcode = IONIC_VF_CTRL_START_ALL;
+	} else {
+		cmd.vf_ctrl.ctrl_opcode = IONIC_VF_CTRL_START;
+		cmd.vf_ctrl.vf_index = cpu_to_le16(vf);
+	}
+
+	ionic_dev_cmd_go(&ionic->idev, &cmd);
+	(void)ionic_dev_cmd_wait(ionic, devcmd_timeout);
+#endif
+}
+
+/* LIF commands */
+void ionic_dev_cmd_queue_identify(struct ionic_dev *idev,
+				  u16 lif_type, u8 qtype, u8 qver)
+{
+	union ionic_dev_cmd cmd = {
+		.q_identify.opcode = IONIC_CMD_Q_IDENTIFY,
+		.q_identify.lif_type = cpu_to_le16(lif_type),
+		.q_identify.type = qtype,
+		.q_identify.ver = qver,
+	};
+
+	ionic_dev_cmd_go(idev, &cmd);
+}
+
+void ionic_dev_cmd_lif_identify(struct ionic_dev *idev, u8 type, u8 ver)
+{
+	union ionic_dev_cmd cmd = {
+		.lif_identify.opcode = IONIC_CMD_LIF_IDENTIFY,
+		.lif_identify.type = type,
+		.lif_identify.ver = ver,
+	};
+
+	ionic_dev_cmd_go(idev, &cmd);
+}
+
+void ionic_dev_cmd_lif_init(struct ionic_dev *idev, u16 lif_index,
+			    dma_addr_t info_pa)
+{
+	union ionic_dev_cmd cmd = {
+		.lif_init.opcode = IONIC_CMD_LIF_INIT,
+		.lif_init.index = cpu_to_le16(lif_index),
+		.lif_init.info_pa = cpu_to_le64(info_pa),
+	};
+
+	ionic_dev_cmd_go(idev, &cmd);
+}
+
+void ionic_dev_cmd_lif_reset(struct ionic_dev *idev, u16 lif_index)
+{
+	union ionic_dev_cmd cmd = {
+		.lif_init.opcode = IONIC_CMD_LIF_RESET,
+		.lif_init.index = cpu_to_le16(lif_index),
+	};
+
+	ionic_dev_cmd_go(idev, &cmd);
+}
+
+void ionic_dev_cmd_adminq_init(struct ionic_dev *idev, struct ionic_qcq *qcq,
+			       u16 lif_index, u16 intr_index)
+{
+	struct ionic_queue *q = &qcq->q;
+	struct ionic_cq *cq = &qcq->cq;
+
+	union ionic_dev_cmd cmd = {
+		.q_init.opcode = IONIC_CMD_Q_INIT,
+		.q_init.lif_index = cpu_to_le16(lif_index),
+		.q_init.type = q->type,
+		.q_init.ver = qcq->q.lif->qtype_info[q->type].version,
+		.q_init.index = cpu_to_le32(q->index),
+		.q_init.flags = cpu_to_le16(IONIC_QINIT_F_IRQ |
+					    IONIC_QINIT_F_ENA),
+		.q_init.pid = cpu_to_le16(q->pid),
+		.q_init.intr_index = cpu_to_le16(intr_index),
+		.q_init.ring_size = ilog2(q->num_descs),
+		.q_init.ring_base = cpu_to_le64(q->base_pa),
+		.q_init.cq_ring_base = cpu_to_le64(cq->base_pa),
+	};
+
+	ionic_dev_cmd_go(idev, &cmd);
+}
+
+int ionic_db_page_num(struct ionic_lif *lif, int pid)
+{
+	return (lif->hw_index * lif->dbid_count) + pid;
+}
+
+int ionic_get_cmb(struct ionic_lif *lif, u32 *pgid, phys_addr_t *pgaddr, int order)
+{
+	struct ionic_dev *idev = &lif->ionic->idev;
+	int ret;
+
+	mutex_lock(&idev->cmb_inuse_lock);
+	ret = bitmap_find_free_region(idev->cmb_inuse, idev->cmb_npages, order);
+	mutex_unlock(&idev->cmb_inuse_lock);
+
+	if (ret < 0)
+		return ret;
+
+	*pgid = (u32)ret;
+	*pgaddr = idev->phy_cmb_pages + ret * PAGE_SIZE;
+
+	return 0;
+}
+
+void ionic_put_cmb(struct ionic_lif *lif, u32 pgid, int order)
+{
+	struct ionic_dev *idev = &lif->ionic->idev;
+
+	mutex_lock(&idev->cmb_inuse_lock);
+	bitmap_release_region(idev->cmb_inuse, pgid, order);
+	mutex_unlock(&idev->cmb_inuse_lock);
+}
+
+static void ionic_txrx_notify(struct ionic *ionic,
+			      int lif_index, int qcq_id, bool is_tx)
+{
+	struct ionic_lif *lif = ionic->lif;
+
+	if (!lif)
+		return;
+
+	if (is_tx)
+		lif->txqcqs[qcq_id]->armed = false;
+	else
+		lif->rxqcqs[qcq_id]->armed = false;
+
+	/* We schedule rx napi, it handles both tx and rx */
+	napi_schedule_irqoff(&lif->rxqcqs[qcq_id]->napi);
+}
+
+static bool ionic_next_eq_comp(struct ionic_eq *eq, int ring_index,
+			       struct ionic_eq_comp *comp)
+{
+	struct ionic_eq_ring *ring = &eq->ring[ring_index];
+	struct ionic_eq_comp *qcomp;
+	u8 gen_color;
+
+	qcomp = &ring->base[ring->index];
+	gen_color = qcomp->gen_color;
+
+	if (gen_color == (u8)(ring->gen_color - 1))
+		return false;
+
+	/* Make sure ring descriptor is up-to-date before reading */
+	smp_rmb();
+	*comp = *qcomp;
+	gen_color = comp->gen_color;
+
+	if (gen_color != ring->gen_color) {
+		dev_err(eq->ionic->dev,
+			"eq %u ring %u missed %u events\n",
+			eq->index, ring_index,
+			eq->depth * (gen_color - ring->gen_color));
+
+		ring->gen_color = gen_color;
+	}
+
+	ring->index = (ring->index + 1) & (eq->depth - 1);
+	ring->gen_color += ring->index == 0;
+
+	return true;
+}
+
+static int ionic_poll_eq_ring(struct ionic_eq *eq, int ring_index)
+{
+	struct ionic_eq_comp comp;
+	int budget = eq->depth;
+	int credits = 0;
+	int code;
+
+	while (credits < budget && ionic_next_eq_comp(eq, ring_index, &comp)) {
+		code = le16_to_cpu(comp.code);
+
+		switch (code) {
+		case IONIC_EQ_COMP_CODE_NONE:
+			break;
+		case IONIC_EQ_COMP_CODE_RX_COMP:
+		case IONIC_EQ_COMP_CODE_TX_COMP:
+			ionic_txrx_notify(eq->ionic,
+					  le16_to_cpu(comp.lif_index),
+					  le32_to_cpu(comp.qid),
+					  code == IONIC_EQ_COMP_CODE_TX_COMP);
+			break;
+		default:
+			dev_warn(eq->ionic->dev,
+				 "eq %u ring %u unrecognized event %u\n",
+				 eq->index, ring_index, code);
+			break;
+		}
+
+		credits++;
+	}
+
+	return credits;
+}
+
+static irqreturn_t ionic_eq_isr(int irq, void *data)
+{
+	struct ionic_eq *eq = data;
+	int credits;
+
+	credits = ionic_poll_eq_ring(eq, 0) + ionic_poll_eq_ring(eq, 1);
+	ionic_intr_credits(eq->ionic->idev.intr_ctrl, eq->intr.index,
+			   credits, IONIC_INTR_CRED_UNMASK);
+
+	return IRQ_HANDLED;
+}
+
+static int ionic_request_eq_irq(struct ionic *ionic, struct ionic_eq *eq)
+{
+	struct device *dev = ionic->dev;
+	struct ionic_intr_info *intr = &eq->intr;
+	const char *name = dev_name(dev);
+
+	snprintf(intr->name, sizeof(intr->name),
+		 "%s-%s-eq%d", IONIC_DRV_NAME, name, eq->index);
+
+	return devm_request_irq(dev, intr->vector, ionic_eq_isr,
+				0, intr->name, eq);
+}
+
+static int ionic_eq_alloc(struct ionic *ionic, int index)
+{
+	const int ring_bytes = sizeof(struct ionic_eq_comp) * IONIC_EQ_DEPTH;
+	struct ionic_eq *eq;
+	int err;
+
+	eq = kzalloc(sizeof(*eq), GFP_KERNEL);
+	eq->ionic = ionic;
+	eq->index = index;
+	eq->depth = IONIC_EQ_DEPTH;
+
+	err = ionic_intr_alloc(ionic, &eq->intr);
+	if (err) {
+		dev_warn(ionic->dev, "no intr for eq %u: %d\n", index, err);
+		goto err_out;
+	}
+
+	err = ionic_bus_get_irq(ionic, eq->intr.index);
+	if (err < 0) {
+		dev_warn(ionic->dev, "no vector for eq %u: %d\n", index, err);
+		goto err_out_free_intr;
+	}
+	eq->intr.vector = err;
+
+	ionic_intr_mask_assert(ionic->idev.intr_ctrl, eq->intr.index,
+			       IONIC_INTR_MASK_SET);
+
+	/* try to get the irq on the local numa node first */
+	eq->intr.cpu = cpumask_local_spread(eq->intr.index,
+					    dev_to_node(ionic->dev));
+	if (eq->intr.cpu != -1)
+		cpumask_set_cpu(eq->intr.cpu, &eq->intr.affinity_mask);
+
+	eq->ring[0].gen_color = 1;
+	eq->ring[0].base = dma_alloc_coherent(ionic->dev, ring_bytes,
+					      &eq->ring[0].base_pa,
+					      GFP_KERNEL);
+
+	eq->ring[1].gen_color = 1;
+	eq->ring[1].base = dma_alloc_coherent(ionic->dev, ring_bytes,
+					      &eq->ring[1].base_pa,
+					      GFP_KERNEL);
+
+	ionic->eqs[index] = eq;
+
+	ionic_debugfs_add_eq(eq);
+
+	return 0;
+
+err_out_free_intr:
+	ionic_intr_free(ionic, eq->intr.index);
+err_out:
+	kfree(eq);
+	return err;
+}
+
+int ionic_eqs_alloc(struct ionic *ionic)
+{
+	size_t eq_size;
+	int i, err;
+
+	eq_size = sizeof(*ionic->eqs) * ionic->neth_eqs;
+	ionic->eqs = kzalloc(eq_size, GFP_KERNEL);
+	if (!ionic->eqs)
+		return -ENOMEM;
+
+	for (i = 0; i < ionic->neth_eqs; i++) {
+		err = ionic_eq_alloc(ionic, i);
+		if (err)
+			return err;
+	}
+
+	return 0;
+}
+
+static void ionic_eq_free(struct ionic_eq *eq)
+{
+	const int ring_bytes = sizeof(struct ionic_eq_comp) * IONIC_EQ_DEPTH;
+	struct ionic *ionic = eq->ionic;
+
+	eq->ionic->eqs[eq->index] = NULL;
+
+	dma_free_coherent(ionic->dev, ring_bytes,
+			  eq->ring[0].base,
+			  eq->ring[0].base_pa);
+	dma_free_coherent(ionic->dev, ring_bytes,
+			  eq->ring[1].base,
+			  eq->ring[1].base_pa);
+	ionic_intr_free(ionic, eq->intr.index);
+	kfree(eq);
+}
+
+void ionic_eqs_free(struct ionic *ionic)
+{
+	int i;
+
+	if (!ionic->eqs)
+		return;
+
+	for (i = 0; i < ionic->neth_eqs; i++) {
+		if (ionic->eqs[i])
+			ionic_eq_free(ionic->eqs[i]);
+	}
+
+	kfree(ionic->eqs);
+	ionic->eqs = NULL;
+	ionic->neth_eqs = 0;
+}
+
+static void ionic_eq_deinit(struct ionic_eq *eq)
+{
+	struct ionic *ionic = eq->ionic;
+	union ionic_dev_cmd cmd = {
+		.q_control = {
+			.opcode = IONIC_CMD_Q_CONTROL,
+			.type = IONIC_QTYPE_EQ,
+			.index = cpu_to_le32(eq->index),
+			.oper = IONIC_Q_DISABLE,
+		},
+	};
+
+	if (!eq->is_init)
+		return;
+	eq->is_init = false;
+
+	mutex_lock(&ionic->dev_cmd_lock);
+	ionic_dev_cmd_go(&ionic->idev, &cmd);
+	ionic_dev_cmd_wait(ionic, devcmd_timeout);
+	mutex_unlock(&ionic->dev_cmd_lock);
+
+	ionic_intr_mask(ionic->idev.intr_ctrl, eq->intr.index,
+			IONIC_INTR_MASK_SET);
+	synchronize_irq(eq->intr.vector);
+
+	irq_set_affinity_hint(eq->intr.vector, NULL);
+	devm_free_irq(ionic->dev, eq->intr.vector, eq);
+}
+
+void ionic_eqs_deinit(struct ionic *ionic)
+{
+	int i;
+
+	if (!ionic->eqs)
+		return;
+
+	for (i = 0; i < ionic->neth_eqs; i++) {
+		if (ionic->eqs[i])
+			ionic_eq_deinit(ionic->eqs[i]);
+	}
+}
+
+static int ionic_eq_init(struct ionic_eq *eq)
+{
+	struct ionic *ionic = eq->ionic;
+	union ionic_q_identity __iomem *q_ident;
+	union ionic_dev_cmd cmd = {
+		.q_init = {
+			.opcode = IONIC_CMD_Q_INIT,
+			.type = IONIC_QTYPE_EQ,
+			.ver = 0,
+			.index = cpu_to_le32(eq->index),
+			.intr_index = cpu_to_le16(eq->intr.index),
+			.flags = cpu_to_le16(IONIC_QINIT_F_IRQ |
+					     IONIC_QINIT_F_ENA),
+			.ring_size = ilog2(eq->depth),
+			.ring_base = cpu_to_le64(eq->ring[0].base_pa),
+			.cq_ring_base = cpu_to_le64(eq->ring[1].base_pa),
+		},
+	};
+	int err;
+
+	q_ident = (union ionic_q_identity __iomem *)&ionic->idev.dev_cmd_regs->data;
+
+	mutex_lock(&ionic->dev_cmd_lock);
+	ionic_dev_cmd_queue_identify(&ionic->idev, IONIC_LIF_TYPE_CLASSIC,
+				     IONIC_QTYPE_EQ, 0);
+	err = ionic_dev_cmd_wait(ionic, devcmd_timeout);
+	cmd.q_init.ver = ioread8(&q_ident->version);
+	mutex_unlock(&ionic->dev_cmd_lock);
+
+	if (err == -EINVAL) {
+		dev_err(ionic->dev, "eq init failed, not supported\n");
+		return err;
+	} else if (err == -EIO) {
+		dev_err(ionic->dev, "q_ident eq failed, not supported on older FW\n");
+		return err;
+	} else if (err) {
+		dev_warn(ionic->dev, "eq version type request failed %d, defaulting to %d\n",
+			 err, cmd.q_init.ver);
+	}
+
+	ionic_intr_mask(ionic->idev.intr_ctrl, eq->intr.index,
+			IONIC_INTR_MASK_SET);
+	ionic_intr_clean(ionic->idev.intr_ctrl, eq->intr.index);
+
+	err = ionic_request_eq_irq(ionic, eq);
+	if (err) {
+		dev_warn(ionic->dev, "eq %d irq request failed %d\n",
+			 eq->index, err);
+		return err;
+	}
+
+	mutex_lock(&ionic->dev_cmd_lock);
+	ionic_dev_cmd_go(&ionic->idev, &cmd);
+	err = ionic_dev_cmd_wait(ionic, devcmd_timeout);
+	mutex_unlock(&ionic->dev_cmd_lock);
+
+	if (err) {
+		dev_err(ionic->dev, "eq %d init failed %d\n",
+			eq->index, err);
+		return err;
+	}
+
+	ionic_intr_mask(ionic->idev.intr_ctrl, eq->intr.index,
+			IONIC_INTR_MASK_CLEAR);
+
+	eq->is_init = true;
+
+	return 0;
+}
+
+int ionic_eqs_init(struct ionic *ionic)
+{
+	int i, err;
+
+	for (i = 0; i < ionic->neth_eqs; i++) {
+		if (ionic->eqs[i]) {
+			err = ionic_eq_init(ionic->eqs[i]);
+			if (err)
+				return err;
+		}
+	}
+
+	return 0;
+}
+
+int ionic_cq_init(struct ionic_lif *lif, struct ionic_cq *cq,
+		  struct ionic_intr_info *intr,
+		  unsigned int num_descs, size_t desc_size)
+{
+	unsigned int ring_size;
+
+	if (desc_size == 0 || !is_power_of_2(num_descs))
+		return -EINVAL;
+
+	ring_size = ilog2(num_descs);
+	if (ring_size < 2 || ring_size > 16)
+		return -EINVAL;
+
+	cq->lif = lif;
+	cq->bound_intr = intr;
+	cq->num_descs = num_descs;
+	cq->desc_size = desc_size;
+	cq->tail_idx = 0;
+	cq->done_color = 1;
+
+	return 0;
+}
+
+void ionic_cq_map(struct ionic_cq *cq, void *base, dma_addr_t base_pa)
+{
+	struct ionic_cq_info *cur;
+	unsigned int i;
+
+	cq->base = base;
+	cq->base_pa = base_pa;
+
+	for (i = 0, cur = cq->info; i < cq->num_descs; i++, cur++)
+		cur->cq_desc = base + (i * cq->desc_size);
+}
+
+void ionic_cq_bind(struct ionic_cq *cq, struct ionic_queue *q)
+{
+	cq->bound_q = q;
+}
+
+unsigned int ionic_cq_service(struct ionic_cq *cq, unsigned int work_to_do,
+			      ionic_cq_cb cb, ionic_cq_done_cb done_cb,
+			      void *done_arg)
+{
+	struct ionic_cq_info *cq_info;
+	unsigned int work_done = 0;
+
+	if (work_to_do == 0)
+		return 0;
+
+	cq_info = &cq->info[cq->tail_idx];
+	while (cb(cq, cq_info)) {
+		if (cq->tail_idx == cq->num_descs - 1)
+			cq->done_color = !cq->done_color;
+		cq->tail_idx = (cq->tail_idx + 1) & (cq->num_descs - 1);
+		cq_info = &cq->info[cq->tail_idx];
+		DEBUG_STATS_CQE_CNT(cq);
+
+		if (++work_done >= work_to_do)
+			break;
+	}
+
+	if (work_done && done_cb)
+		done_cb(done_arg);
+
+	return work_done;
+}
+
+int ionic_q_init(struct ionic_lif *lif, struct ionic_dev *idev,
+		 struct ionic_queue *q, unsigned int index, const char *name,
+		 unsigned int num_descs, size_t desc_size,
+		 size_t sg_desc_size, unsigned int pid)
+{
+	unsigned int ring_size;
+
+	if (desc_size == 0 || !is_power_of_2(num_descs))
+		return -EINVAL;
+
+	ring_size = ilog2(num_descs);
+	if (ring_size < 2 || ring_size > 16)
+		return -EINVAL;
+
+	q->lif = lif;
+	q->idev = idev;
+	q->index = index;
+	q->num_descs = num_descs;
+	q->desc_size = desc_size;
+	q->sg_desc_size = sg_desc_size;
+	q->tail_idx = 0;
+	q->head_idx = 0;
+	q->pid = pid;
+
+	snprintf(q->name, sizeof(q->name), "L%d-%s%u", lif->index, name, index);
+
+	return 0;
+}
+
+void ionic_q_map(struct ionic_queue *q, void *base, dma_addr_t base_pa)
+{
+	struct ionic_desc_info *cur;
+	unsigned int i;
+
+	q->base = base;
+	q->base_pa = base_pa;
+
+	for (i = 0, cur = q->info; i < q->num_descs; i++, cur++)
+		cur->desc = base + (i * q->desc_size);
+}
+
+void ionic_q_cmb_map(struct ionic_queue *q, void __iomem *base, dma_addr_t base_pa)
+{
+	struct ionic_desc_info *cur;
+	unsigned int i;
+
+	q->cmb_base = base;
+	q->cmb_base_pa = base_pa;
+
+	for (i = 0, cur = q->info; i < q->num_descs; i++, cur++)
+		cur->cmb_desc = base + (i * q->desc_size);
+}
+
+void ionic_q_sg_map(struct ionic_queue *q, void *base, dma_addr_t base_pa)
+{
+	struct ionic_desc_info *cur;
+	unsigned int i;
+
+	q->sg_base = base;
+	q->sg_base_pa = base_pa;
+
+	for (i = 0, cur = q->info; i < q->num_descs; i++, cur++)
+		cur->sg_desc = base + (i * q->sg_desc_size);
+}
+
+void ionic_q_post(struct ionic_queue *q, bool ring_doorbell, ionic_desc_cb cb,
+		  void *cb_arg)
+{
+	struct ionic_desc_info *desc_info;
+	struct ionic_lif *lif = q->lif;
+	struct device *dev = q->dev;
+
+	desc_info = &q->info[q->head_idx];
+	desc_info->cb = cb;
+	desc_info->cb_arg = cb_arg;
+
+	q->head_idx = (q->head_idx + 1) & (q->num_descs - 1);
+
+#ifdef IONIC_DEBUG_STATS
+	q->depth = q->num_descs - ionic_q_space_avail(q);
+	q->depth_max = max_t(u64, q->depth, q->depth_max);
+#endif
+
+	dev_dbg(dev, "%s: lif=%d qname=%s hw_type=%d hw_index=%d p_index=%d ringdb=%d\n",
+		__func__, q->lif->index, q->name, q->hw_type, q->hw_index,
+		q->head_idx, ring_doorbell);
+
+	if (ring_doorbell) {
+		ionic_dbell_ring(lif->kern_dbpage, q->hw_type,
+				 q->dbval | q->head_idx);
+
+		q->dbell_jiffies = jiffies;
+
+		if (q_to_qcq(q)->napi_qcq)
+			mod_timer(&q_to_qcq(q)->napi_qcq->napi_deadline,
+				  jiffies + IONIC_NAPI_DEADLINE);
+	}
+}
+
+static bool ionic_q_is_posted(struct ionic_queue *q, unsigned int pos)
+{
+	unsigned int mask, tail, head;
+
+	mask = q->num_descs - 1;
+	tail = q->tail_idx;
+	head = q->head_idx;
+
+	return ((pos - tail) & mask) < ((head - tail) & mask);
+}
+
+void ionic_q_service(struct ionic_queue *q, struct ionic_cq_info *cq_info,
+		     unsigned int stop_index)
+{
+	struct ionic_desc_info *desc_info;
+	ionic_desc_cb cb;
+	void *cb_arg;
+	u16 index;
+
+	/* check for empty queue */
+	if (q->tail_idx == q->head_idx)
+		return;
+
+	/* stop index must be for a descriptor that is not yet completed */
+	if (unlikely(!ionic_q_is_posted(q, stop_index)))
+		dev_err(q->dev,
+			"ionic stop is not posted %s stop %u tail %u head %u\n",
+			q->name, stop_index, q->tail_idx, q->head_idx);
+
+	do {
+		desc_info = &q->info[q->tail_idx];
+		index = q->tail_idx;
+		q->tail_idx = (q->tail_idx + 1) & (q->num_descs - 1);
+
+		cb = desc_info->cb;
+		cb_arg = desc_info->cb_arg;
+
+		desc_info->cb = NULL;
+		desc_info->cb_arg = NULL;
+
+		if (cb)
+			cb(q, desc_info, cq_info, cb_arg);
+	} while (index != stop_index);
+}
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_dev.h b/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_dev.h
new file mode 100644
index 000000000..884038d4b
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_dev.h
@@ -0,0 +1,437 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/* Copyright(c) 2017 - 2022 Pensando Systems, Inc */
+
+#ifndef _IONIC_DEV_H_
+#define _IONIC_DEV_H_
+
+#include <linux/atomic.h>
+#include <linux/mutex.h>
+#include <linux/workqueue.h>
+
+#include "ionic_if.h"
+#include "ionic_api.h"
+#include "ionic_regs.h"
+
+#define IONIC_MAX_TX_DESC		8192
+#define IONIC_MAX_RX_DESC		16384
+#define IONIC_MIN_TXRX_DESC		64
+#define IONIC_DEF_TXRX_DESC		4096
+#define IONIC_RX_FILL_THRESHOLD	64
+#define IONIC_RX_FILL_DIV		8
+#define IONIC_LIFS_MAX			1024
+#define IONIC_WATCHDOG_PCI_SECS		5
+#define IONIC_WATCHDOG_PLAT_MSECS	100
+#define IONIC_HEARTBEAT_SECS		1
+#define IONIC_ITR_COAL_USEC_DEFAULT	8
+
+#define IONIC_DEV_CMD_REG_VERSION	1
+#define IONIC_DEV_INFO_REG_COUNT	32
+#define IONIC_DEV_CMD_REG_COUNT		32
+
+#define IONIC_NAPI_DEADLINE		(HZ / 200)	/* 5ms */
+#define IONIC_ADMIN_DOORBELL_DEADLINE	(HZ / 2)	/* 500ms */
+#define IONIC_TX_DOORBELL_DEADLINE	(HZ / 100)	/* 10ms */
+#define IONIC_RX_MIN_DOORBELL_DEADLINE	(HZ / 100)	/* 10ms */
+#define IONIC_RX_MAX_DOORBELL_DEADLINE	(HZ * 5)	/* 5s */
+
+struct ionic_dev_bar {
+	void __iomem *vaddr;
+	phys_addr_t bus_addr;
+	unsigned long len;
+	int res_index;
+};
+
+#ifndef __CHECKER__
+/* Registers */
+static_assert(sizeof(struct ionic_intr) == 32);
+
+static_assert(sizeof(struct ionic_doorbell) == 8);
+static_assert(sizeof(struct ionic_intr_ctrl) == 32);
+static_assert(sizeof(struct ionic_intr_status) == 8);
+static_assert(sizeof(union ionic_dev_regs) == 4096);
+static_assert(sizeof(union ionic_dev_info_regs) == 2048);
+static_assert(sizeof(union ionic_dev_cmd_regs) == 2048);
+static_assert(sizeof(struct ionic_lif_stats) == 1024);
+
+static_assert(sizeof(struct ionic_admin_cmd) == 64);
+static_assert(sizeof(struct ionic_admin_comp) == 16);
+static_assert(sizeof(struct ionic_nop_cmd) == 64);
+static_assert(sizeof(struct ionic_nop_comp) == 16);
+
+/* Device commands */
+static_assert(sizeof(struct ionic_dev_identify_cmd) == 64);
+static_assert(sizeof(struct ionic_dev_identify_comp) == 16);
+static_assert(sizeof(struct ionic_dev_init_cmd) == 64);
+static_assert(sizeof(struct ionic_dev_init_comp) == 16);
+static_assert(sizeof(struct ionic_dev_reset_cmd) == 64);
+static_assert(sizeof(struct ionic_dev_reset_comp) == 16);
+static_assert(sizeof(struct ionic_dev_getattr_cmd) == 64);
+static_assert(sizeof(struct ionic_dev_getattr_comp) == 16);
+static_assert(sizeof(struct ionic_dev_setattr_cmd) == 64);
+static_assert(sizeof(struct ionic_dev_setattr_comp) == 16);
+static_assert(sizeof(struct ionic_hii_getattr_cmd) == 64);
+static_assert(sizeof(struct ionic_hii_getattr_comp) == 16);
+
+/* Port commands */
+static_assert(sizeof(struct ionic_port_identify_cmd) == 64);
+static_assert(sizeof(struct ionic_port_identify_comp) == 16);
+static_assert(sizeof(struct ionic_port_init_cmd) == 64);
+static_assert(sizeof(struct ionic_port_init_comp) == 16);
+static_assert(sizeof(struct ionic_port_reset_cmd) == 64);
+static_assert(sizeof(struct ionic_port_reset_comp) == 16);
+static_assert(sizeof(struct ionic_port_getattr_cmd) == 64);
+static_assert(sizeof(struct ionic_port_getattr_comp) == 16);
+static_assert(sizeof(struct ionic_port_setattr_cmd) == 64);
+static_assert(sizeof(struct ionic_port_setattr_comp) == 16);
+
+/* LIF commands */
+static_assert(sizeof(struct ionic_lif_init_cmd) == 64);
+static_assert(sizeof(struct ionic_lif_init_comp) == 16);
+static_assert(sizeof(struct ionic_lif_reset_cmd) == 64);
+static_assert(sizeof(ionic_lif_reset_comp) == 16);
+static_assert(sizeof(struct ionic_lif_getattr_cmd) == 64);
+static_assert(sizeof(struct ionic_lif_getattr_comp) == 16);
+static_assert(sizeof(struct ionic_lif_setattr_cmd) == 64);
+static_assert(sizeof(struct ionic_lif_setattr_comp) == 16);
+static_assert(sizeof(struct ionic_lif_setphc_cmd) == 64);
+
+static_assert(sizeof(struct ionic_q_init_cmd) == 64);
+static_assert(sizeof(struct ionic_q_init_comp) == 16);
+static_assert(sizeof(struct ionic_q_control_cmd) == 64);
+static_assert(sizeof(ionic_q_control_comp) == 16);
+static_assert(sizeof(struct ionic_q_identify_cmd) == 64);
+static_assert(sizeof(struct ionic_q_identify_comp) == 16);
+
+static_assert(sizeof(struct ionic_rx_mode_set_cmd) == 64);
+static_assert(sizeof(ionic_rx_mode_set_comp) == 16);
+static_assert(sizeof(struct ionic_rx_filter_add_cmd) == 64);
+static_assert(sizeof(struct ionic_rx_filter_add_comp) == 16);
+static_assert(sizeof(struct ionic_rx_filter_del_cmd) == 64);
+static_assert(sizeof(ionic_rx_filter_del_comp) == 16);
+
+/* RDMA commands */
+static_assert(sizeof(struct ionic_rdma_reset_cmd) == 64);
+static_assert(sizeof(struct ionic_rdma_queue_cmd) == 64);
+
+/* Events */
+static_assert(sizeof(struct ionic_notifyq_cmd) == 4);
+static_assert(sizeof(union ionic_notifyq_comp) == 64);
+static_assert(sizeof(struct ionic_notifyq_event) == 64);
+static_assert(sizeof(struct ionic_link_change_event) == 64);
+static_assert(sizeof(struct ionic_reset_event) == 64);
+static_assert(sizeof(struct ionic_heartbeat_event) == 64);
+static_assert(sizeof(struct ionic_log_event) == 64);
+
+/* I/O */
+static_assert(sizeof(struct ionic_txq_desc) == 16);
+static_assert(sizeof(struct ionic_txq_sg_desc) == 128);
+static_assert(sizeof(struct ionic_txq_comp) == 16);
+
+static_assert(sizeof(struct ionic_rxq_desc) == 16);
+static_assert(sizeof(struct ionic_rxq_sg_desc) == 128);
+static_assert(sizeof(struct ionic_rxq_comp) == 16);
+
+/* SR/IOV */
+static_assert(sizeof(struct ionic_vf_setattr_cmd) == 64);
+static_assert(sizeof(struct ionic_vf_setattr_comp) == 16);
+static_assert(sizeof(struct ionic_vf_getattr_cmd) == 64);
+static_assert(sizeof(struct ionic_vf_getattr_comp) == 16);
+#endif /* __CHECKER__ */
+
+struct ionic_dev {
+	union ionic_dev_info_regs __iomem *dev_info_regs;
+	union ionic_dev_cmd_regs __iomem *dev_cmd_regs;
+	struct ionic_hwstamp_regs __iomem *hwstamp_regs;
+
+	atomic_long_t last_check_time;
+	unsigned long last_hb_time;
+	u32 last_fw_hb;
+	bool fw_hb_ready;
+	bool fw_status_ready;
+	u8 fw_generation;
+
+	u64 __iomem *db_pages;
+	dma_addr_t phy_db_pages;
+
+	struct ionic_intr __iomem *intr_ctrl;
+	u64 __iomem *intr_status;
+	u8 *msix_cfg_base;
+
+	struct mutex cmb_inuse_lock; /* for cmb_inuse */
+	unsigned long *cmb_inuse;
+	dma_addr_t phy_cmb_pages;
+	u32 cmb_npages;
+
+	u32 port_info_sz;
+	struct ionic_port_info *port_info;
+	dma_addr_t port_info_pa;
+
+	struct ionic_devinfo dev_info;
+};
+
+struct ionic_cq_info {
+	union {
+		void *cq_desc;
+		struct ionic_admin_comp *admincq;
+		struct ionic_notifyq_event *notifyq;
+	};
+};
+
+struct ionic_queue;
+struct ionic_qcq;
+struct ionic_desc_info;
+
+typedef void (*ionic_desc_cb)(struct ionic_queue *q,
+			      struct ionic_desc_info *desc_info,
+			      struct ionic_cq_info *cq_info, void *cb_arg);
+
+
+#define IONIC_PAGE_ORDER			0
+#define IONIC_PAGE_SIZE				(PAGE_SIZE << IONIC_PAGE_ORDER)
+#define IONIC_PAGE_SPLIT_SZ			(PAGE_SIZE / 4)
+#define IONIC_PAGE_GFP_MASK			(GFP_ATOMIC | __GFP_NOWARN |\
+	__GFP_COMP | __GFP_MEMALLOC)
+
+struct ionic_buf_info {
+	struct page *page;
+	dma_addr_t dma_addr;
+	u32 page_offset;
+	u32 len;
+};
+
+#define IONIC_PAGE_CACHE_SIZE          2048
+
+struct ionic_page_cache {
+	u32 head;
+	u32 tail;
+	struct ionic_buf_info ring[IONIC_PAGE_CACHE_SIZE];
+} ____cacheline_aligned_in_smp;
+
+#define IONIC_MAX_FRAGS			(1 + IONIC_TX_MAX_SG_ELEMS_V1)
+
+struct ionic_desc_info {
+	union {
+		void *desc;
+		struct ionic_txq_desc *txq_desc;
+		struct ionic_rxq_desc *rxq_desc;
+		struct ionic_admin_cmd *adminq_desc;
+	};
+	void __iomem *cmb_desc;
+	union {
+		void *sg_desc;
+		struct ionic_txq_sg_desc *txq_sg_desc;
+		struct ionic_rxq_sg_desc *rxq_sgl_desc;
+	};
+	unsigned int bytes;
+	unsigned int nbufs;
+	struct ionic_buf_info bufs[IONIC_MAX_FRAGS];
+	ionic_desc_cb cb;
+	void *cb_arg;
+};
+
+#define IONIC_QUEUE_NAME_MAX_SZ		32
+
+struct ionic_queue {
+	struct device *dev;
+	struct ionic_lif *lif;
+	struct ionic_desc_info *info;
+	u64 dbval;
+	unsigned long dbell_deadline;
+	unsigned long dbell_jiffies;
+	u16 head_idx;
+	u16 tail_idx;
+	unsigned int index;
+	unsigned int num_descs;
+	unsigned int max_sg_elems;
+	u64 dbell_count;
+	u64 stop;
+	u64 wake;
+	u64 drop;
+#ifdef IONIC_DEBUG_STATS
+	u64 depth;
+	u64 depth_max;
+#endif
+	u64 features;
+	struct ionic_dev *idev;
+	unsigned int type;
+	unsigned int hw_index;
+	unsigned int hw_type;
+	union {
+		void *base;
+		struct ionic_txq_desc *txq;
+		struct ionic_rxq_desc *rxq;
+		struct ionic_admin_cmd *adminq;
+	};
+	void __iomem *cmb_base;
+	union {
+		void *sg_base;
+		struct ionic_txq_sg_desc *txq_sgl;
+		struct ionic_rxq_sg_desc *rxq_sgl;
+	};
+	dma_addr_t base_pa;	/* must be page aligned */
+	dma_addr_t cmb_base_pa;
+	dma_addr_t sg_base_pa;	/* must be page aligned */
+	unsigned int desc_size;
+	unsigned int sg_desc_size;
+	unsigned int pid;
+	struct ionic_page_cache page_cache;
+	char name[IONIC_QUEUE_NAME_MAX_SZ];
+} ____cacheline_aligned_in_smp;
+
+#define IONIC_INTR_INDEX_NOT_ASSIGNED	-1
+#define IONIC_INTR_NAME_MAX_SZ		32
+
+struct ionic_intr_info {
+	char name[IONIC_INTR_NAME_MAX_SZ];
+	unsigned int index;
+	unsigned int vector;
+	u64 rearm_count;
+	unsigned int cpu;
+	cpumask_t affinity_mask;
+	u32 dim_coal_hw;
+};
+
+struct ionic_cq {
+	struct ionic_lif *lif;
+	struct ionic_cq_info *info;
+	struct ionic_queue *bound_q;
+	struct ionic_intr_info *bound_intr;
+	u16 tail_idx;
+	bool done_color;
+	unsigned int num_descs;
+	unsigned int desc_size;
+#ifdef IONIC_DEBUG_STATS
+	u64 compl_count;
+#endif
+	void *base;
+	dma_addr_t base_pa;	/* must be page aligned */
+} ____cacheline_aligned_in_smp;
+
+struct ionic_eq_ring {
+	struct ionic_eq_comp *base;
+	dma_addr_t base_pa;
+
+	int index;
+	u8 gen_color;
+};
+
+struct ionic_eq {
+	struct ionic *ionic;
+	struct ionic_eq_ring ring[2];
+	struct ionic_intr_info intr;
+
+	int index;
+	int depth;
+
+	bool is_init;
+};
+
+#define IONIC_EQ_DEPTH 0x1000
+
+struct ionic;
+
+static inline void ionic_intr_init(struct ionic_dev *idev,
+				   struct ionic_intr_info *intr,
+				   unsigned long index)
+{
+	ionic_intr_clean(idev->intr_ctrl, index);
+	intr->index = index;
+}
+
+static inline unsigned int ionic_q_space_avail(struct ionic_queue *q)
+{
+	unsigned int avail = q->tail_idx;
+
+	if (q->head_idx >= avail)
+		avail += q->num_descs - q->head_idx - 1;
+	else
+		avail -= q->head_idx + 1;
+
+	return avail;
+}
+
+static inline bool ionic_q_has_space(struct ionic_queue *q, unsigned int want)
+{
+	return ionic_q_space_avail(q) >= want;
+}
+
+void ionic_init_devinfo(struct ionic *ionic);
+int ionic_dev_setup(struct ionic *ionic);
+void ionic_dev_teardown(struct ionic *ionic);
+
+void ionic_dev_cmd_go(struct ionic_dev *idev, union ionic_dev_cmd *cmd);
+u8 ionic_dev_cmd_status(struct ionic_dev *idev);
+bool ionic_dev_cmd_done(struct ionic_dev *idev);
+void ionic_dev_cmd_comp(struct ionic_dev *idev, union ionic_dev_cmd_comp *comp);
+
+void ionic_dev_cmd_identify(struct ionic_dev *idev, u8 ver);
+void ionic_dev_cmd_init(struct ionic_dev *idev);
+void ionic_dev_cmd_reset(struct ionic_dev *idev);
+
+void ionic_dev_cmd_port_identify(struct ionic_dev *idev);
+void ionic_dev_cmd_port_init(struct ionic_dev *idev);
+void ionic_dev_cmd_port_reset(struct ionic_dev *idev);
+void ionic_dev_cmd_port_state(struct ionic_dev *idev, u8 state);
+void ionic_dev_cmd_port_speed(struct ionic_dev *idev, u32 speed);
+void ionic_dev_cmd_port_autoneg(struct ionic_dev *idev, u8 an_enable);
+void ionic_dev_cmd_port_fec(struct ionic_dev *idev, u8 fec_type);
+void ionic_dev_cmd_port_pause(struct ionic_dev *idev, u8 pause_type);
+
+int ionic_set_vf_config(struct ionic *ionic, int vf,
+			struct ionic_vf_setattr_cmd *vfc);
+int ionic_dev_cmd_vf_getattr(struct ionic *ionic, int vf, u8 attr,
+			     struct ionic_vf_getattr_comp *comp);
+void ionic_vf_start(struct ionic *ionic, int vf);
+
+void ionic_dev_cmd_queue_identify(struct ionic_dev *idev,
+				  u16 lif_type, u8 qtype, u8 qver);
+void ionic_dev_cmd_lif_identify(struct ionic_dev *idev, u8 type, u8 ver);
+void ionic_dev_cmd_lif_init(struct ionic_dev *idev, u16 lif_index,
+			    dma_addr_t addr);
+void ionic_dev_cmd_lif_reset(struct ionic_dev *idev, u16 lif_index);
+void ionic_dev_cmd_adminq_init(struct ionic_dev *idev, struct ionic_qcq *qcq,
+			       u16 lif_index, u16 intr_index);
+
+int ionic_db_page_num(struct ionic_lif *lif, int pid);
+
+int ionic_get_cmb(struct ionic_lif *lif, u32 *pgid, phys_addr_t *pgaddr, int order);
+void ionic_put_cmb(struct ionic_lif *lif, u32 pgid, int order);
+
+int ionic_eqs_alloc(struct ionic *ionic);
+void ionic_eqs_free(struct ionic *ionic);
+void ionic_eqs_deinit(struct ionic *ionic);
+int ionic_eqs_init(struct ionic *ionic);
+
+int ionic_cq_init(struct ionic_lif *lif, struct ionic_cq *cq,
+		  struct ionic_intr_info *intr,
+		  unsigned int num_descs, size_t desc_size);
+void ionic_cq_map(struct ionic_cq *cq, void *base, dma_addr_t base_pa);
+void ionic_cq_bind(struct ionic_cq *cq, struct ionic_queue *q);
+typedef bool (*ionic_cq_cb)(struct ionic_cq *cq, struct ionic_cq_info *cq_info);
+typedef void (*ionic_cq_done_cb)(void *done_arg);
+unsigned int ionic_cq_service(struct ionic_cq *cq, unsigned int work_to_do,
+			      ionic_cq_cb cb, ionic_cq_done_cb done_cb,
+			      void *done_arg);
+
+int ionic_q_init(struct ionic_lif *lif, struct ionic_dev *idev,
+		 struct ionic_queue *q, unsigned int index, const char *name,
+		 unsigned int num_descs, size_t desc_size,
+		 size_t sg_desc_size, unsigned int pid);
+void ionic_q_map(struct ionic_queue *q, void *base, dma_addr_t base_pa);
+void ionic_q_cmb_map(struct ionic_queue *q, void __iomem *base, dma_addr_t base_pa);
+void ionic_q_sg_map(struct ionic_queue *q, void *base, dma_addr_t base_pa);
+void ionic_q_post(struct ionic_queue *q, bool ring_doorbell, ionic_desc_cb cb,
+		  void *cb_arg);
+void ionic_q_rewind(struct ionic_queue *q, struct ionic_desc_info *start);
+void ionic_q_service(struct ionic_queue *q, struct ionic_cq_info *cq_info,
+		     unsigned int stop_index);
+int ionic_heartbeat_check(struct ionic *ionic);
+bool ionic_is_fw_running(struct ionic_dev *idev);
+void ionic_watchdog_cb(struct timer_list *t);
+void ionic_watchdog_init(struct ionic *ionic);
+
+bool ionic_adminq_poke_doorbell(struct ionic_queue *q);
+bool ionic_txq_poke_doorbell(struct ionic_queue *q);
+bool ionic_rxq_poke_doorbell(struct ionic_queue *q);
+
+#endif /* _IONIC_DEV_H_ */
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_devlink.c b/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_devlink.c
new file mode 100644
index 000000000..ac11d6846
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_devlink.c
@@ -0,0 +1,153 @@
+// SPDX-License-Identifier: GPL-2.0
+/* Copyright(c) 2017 - 2022 Pensando Systems, Inc */
+
+#include <linux/module.h>
+#include <linux/netdevice.h>
+
+#include "ionic.h"
+#include "ionic_bus.h"
+#include "ionic_lif.h"
+#include "ionic_devlink.h"
+
+#ifdef IONIC_DEVLINK
+#ifdef HAVE_DEVLINK_UPDATE_PARAMS
+static int ionic_dl_flash_update(struct devlink *dl,
+				 struct devlink_flash_update_params *params,
+				 struct netlink_ext_ack *extack)
+{
+	struct ionic *ionic = devlink_priv(dl);
+
+#ifdef HAVE_DEVLINK_PREFETCH_FW
+	return ionic_firmware_update(ionic->lif, params->fw);
+#else
+	return ionic_firmware_fetch_and_update(ionic->lif, params->file_name);
+#endif
+}
+#else
+static int ionic_dl_flash_update(struct devlink *dl,
+				 const char *fwname,
+				 const char *component,
+				 struct netlink_ext_ack *extack)
+{
+	struct ionic *ionic = devlink_priv(dl);
+
+	if (component)
+		return -EOPNOTSUPP;
+
+	return ionic_firmware_fetch_and_update(ionic->lif, fwname);
+}
+#endif /* HAVE_DEVLINK_UPDATE_PARAMS */
+
+static int ionic_dl_info_get(struct devlink *dl, struct devlink_info_req *req,
+			     struct netlink_ext_ack *extack)
+{
+	struct ionic *ionic = devlink_priv(dl);
+	struct ionic_dev *idev = &ionic->idev;
+	char buf[16];
+	int err = 0;
+	u32 val;
+
+	err = devlink_info_driver_name_put(req, IONIC_DRV_NAME);
+	if (err)
+		return err;
+
+	err = devlink_info_version_running_put(req,
+					       DEVLINK_INFO_VERSION_GENERIC_FW,
+					       idev->dev_info.fw_version);
+	if (err)
+		return err;
+
+	val = ioread32(&idev->dev_info_regs->fw_heartbeat);
+	snprintf(buf, sizeof(buf), "0x%x", val);
+	err = devlink_info_version_running_put(req, "fw.heartbeat", buf);
+	if (err)
+		return err;
+
+	val = ioread8(&idev->dev_info_regs->fw_status);
+	snprintf(buf, sizeof(buf), "0x%x", val);
+	err = devlink_info_version_running_put(req, "fw.status", buf);
+	if (err)
+		return err;
+
+	snprintf(buf, sizeof(buf), "0x%x", idev->dev_info.asic_type);
+	err = devlink_info_version_fixed_put(req,
+					     DEVLINK_INFO_VERSION_GENERIC_ASIC_ID,
+					     buf);
+	if (err)
+		return err;
+
+	snprintf(buf, sizeof(buf), "0x%x", idev->dev_info.asic_rev);
+	err = devlink_info_version_fixed_put(req,
+					     DEVLINK_INFO_VERSION_GENERIC_ASIC_REV,
+					     buf);
+	if (err)
+		return err;
+
+	err = devlink_info_serial_number_put(req, idev->dev_info.serial_num);
+
+	return err;
+}
+
+static const struct devlink_ops ionic_dl_ops = {
+	.info_get	= ionic_dl_info_get,
+	.flash_update	= ionic_dl_flash_update,
+};
+
+struct ionic *ionic_devlink_alloc(struct device *dev)
+{
+	struct devlink *dl;
+
+	dl = devlink_alloc(&ionic_dl_ops, sizeof(struct ionic), dev);
+
+	return devlink_priv(dl);
+}
+
+void ionic_devlink_free(struct ionic *ionic)
+{
+	struct devlink *dl = priv_to_devlink(ionic);
+
+	devlink_free(dl);
+}
+
+int ionic_devlink_register(struct ionic *ionic)
+{
+	struct devlink *dl = priv_to_devlink(ionic);
+	int err;
+
+#ifdef HAVE_VOID_DEVLINK_REGISTER
+	err = devlink_port_register(dl, &ionic->dl_port, 0);
+	if (err) {
+		dev_err(ionic->dev, "devlink_port_register failed: %d\n", err);
+		devlink_unregister(dl);
+		return err;
+	}
+
+	devlink_port_type_eth_set(&ionic->dl_port, ionic->lif->netdev);
+	devlink_register(dl);
+#else
+	err = devlink_register(dl, ionic->dev);
+	if (err) {
+		dev_warn(ionic->dev, "devlink_register failed: %d\n", err);
+		return err;
+	}
+
+	err = devlink_port_register(dl, &ionic->dl_port, 0);
+	if (err) {
+		dev_err(ionic->dev, "devlink_port_register failed: %d\n", err);
+		devlink_unregister(dl);
+		return err;
+	}
+
+	devlink_port_type_eth_set(&ionic->dl_port, ionic->lif->netdev);
+#endif
+	return 0;
+}
+
+void ionic_devlink_unregister(struct ionic *ionic)
+{
+	struct devlink *dl = priv_to_devlink(ionic);
+
+	devlink_port_unregister(&ionic->dl_port);
+	devlink_unregister(dl);
+}
+#endif /* IONIC_DEVLINK */
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_devlink.h b/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_devlink.h
new file mode 100644
index 000000000..9fb8de8c4
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_devlink.h
@@ -0,0 +1,40 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/* Copyright(c) 2017 - 2022 Pensando Systems, Inc */
+
+#ifndef _IONIC_DEVLINK_H_
+#define _IONIC_DEVLINK_H_
+
+#include <linux/firmware.h>
+
+#if IS_ENABLED(CONFIG_NET_DEVLINK)
+#include <net/devlink.h>
+#endif
+
+int ionic_firmware_update(struct ionic_lif *lif, const struct firmware *fw);
+int ionic_firmware_fetch_and_update(struct ionic_lif *lif, const char *fw_name);
+
+/* make sure we've got a new-enough devlink support to use dev info */
+#ifdef DEVLINK_INFO_VERSION_GENERIC_BOARD_ID
+
+#define IONIC_DEVLINK
+
+struct ionic *ionic_devlink_alloc(struct device *dev);
+void ionic_devlink_free(struct ionic *ionic);
+int ionic_devlink_register(struct ionic *ionic);
+void ionic_devlink_unregister(struct ionic *ionic);
+#else
+#define ionic_devlink_alloc(dev)  devm_kzalloc(dev, sizeof(struct ionic), GFP_KERNEL)
+#define ionic_devlink_free(i)     devm_kfree(i->dev, i)
+
+#define ionic_devlink_register(x)    0
+#define ionic_devlink_unregister(x)
+#endif
+
+#if !IS_ENABLED(CONFIG_NET_DEVLINK)
+#define priv_to_devlink(i)  0
+#define devlink_flash_update_begin_notify(d)
+#define devlink_flash_update_end_notify(d)
+#define devlink_flash_update_status_notify(d, s, c, n, t)
+#endif /* CONFIG_NET_DEVLINK */
+
+#endif /* _IONIC_DEVLINK_H_ */
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_ethtool.c b/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_ethtool.c
new file mode 100644
index 000000000..67d004ed7
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_ethtool.c
@@ -0,0 +1,1355 @@
+// SPDX-License-Identifier: GPL-2.0
+/* Copyright(c) 2017 - 2022 Pensando Systems, Inc */
+
+#include <linux/module.h>
+#include <linux/netdevice.h>
+
+/* Normally we would #include <linux/sfp.h> here, but some of the
+ * older distros don't have that file, and some that do have an
+ * older version that doesn't include these definitions.
+ */
+enum {
+	SFF8024_ID_UNK			= 0x00,
+	SFF8024_ID_SFF_8472		= 0x02,
+	SFF8024_ID_SFP			= 0x03,
+	SFF8024_ID_DWDM_SFP		= 0x0b,
+	SFF8024_ID_QSFP_8438		= 0x0c,
+	SFF8024_ID_QSFP_8436_8636	= 0x0d,
+	SFF8024_ID_QSFP28_8636		= 0x11,
+};
+
+#include "ionic.h"
+#include "ionic_bus.h"
+#include "ionic_lif.h"
+#include "ionic_ethtool.h"
+#include "ionic_stats.h"
+
+static const char ionic_priv_flags_strings[][ETH_GSTRING_LEN] = {
+#define IONIC_PRIV_F_RDMA_SNIFFER	BIT(0)
+	"rdma-sniffer",
+#define IONIC_PRIV_F_DEVICE_RESET	BIT(1)
+	"device-reset",
+#define IONIC_PRIV_F_CMB_RINGS		BIT(2)
+	"cmb-rings",
+
+#define IONIC_PRIV_F_SW_DBG_STATS	BIT(3)
+#ifdef IONIC_DEBUG_STATS
+	"sw-dbg-stats",
+#endif
+};
+
+#define IONIC_PRIV_FLAGS_COUNT ARRAY_SIZE(ionic_priv_flags_strings)
+
+static int ionic_validate_cmb_config(struct ionic_lif *lif,
+				     struct ionic_queue_params *qparam)
+{
+	int pages_have, pages_required = 0;
+	unsigned long sz;
+
+	if (!qparam->cmb_enabled)
+		return 0;
+
+	sz = sizeof(struct ionic_txq_desc) * qparam->ntxq_descs * qparam->nxqs;
+	pages_required += ALIGN(sz, PAGE_SIZE) / PAGE_SIZE;
+
+	sz = sizeof(struct ionic_rxq_desc) * qparam->nrxq_descs * qparam->nxqs;
+	pages_required += ALIGN(sz, PAGE_SIZE) / PAGE_SIZE;
+
+	pages_have = lif->ionic->bars[IONIC_PCI_BAR_CMB].len / PAGE_SIZE;
+	if (pages_required > pages_have) {
+		netdev_info(lif->netdev, "Not enough CMB pages for number of queues and size of descriptor rings, need %d have %d",
+			    pages_required, pages_have);
+		return -ENOMEM;
+	}
+
+	return pages_required;
+}
+
+static void ionic_get_stats_strings(struct ionic_lif *lif, u8 *buf)
+{
+	u32 i;
+
+	for (i = 0; i < ionic_num_stats_grps; i++)
+		ionic_stats_groups[i].get_strings(lif, &buf);
+}
+
+static void ionic_get_stats(struct net_device *netdev,
+			    struct ethtool_stats *stats, u64 *buf)
+{
+	struct ionic_lif *lif = netdev_priv(netdev);
+	u32 i;
+
+	if (test_bit(IONIC_LIF_F_FW_RESET, lif->state))
+		return;
+
+	memset(buf, 0, stats->n_stats * sizeof(*buf));
+	for (i = 0; i < ionic_num_stats_grps; i++)
+		ionic_stats_groups[i].get_values(lif, &buf);
+}
+
+static int ionic_get_stats_count(struct ionic_lif *lif)
+{
+	int i, num_stats = 0;
+
+	for (i = 0; i < ionic_num_stats_grps; i++)
+		num_stats += ionic_stats_groups[i].get_count(lif);
+
+	return num_stats;
+}
+
+static int ionic_get_sset_count(struct net_device *netdev, int sset)
+{
+	struct ionic_lif *lif = netdev_priv(netdev);
+	int count = 0;
+
+	switch (sset) {
+	case ETH_SS_STATS:
+		count = ionic_get_stats_count(lif);
+		break;
+	case ETH_SS_PRIV_FLAGS:
+		count = IONIC_PRIV_FLAGS_COUNT;
+		break;
+	}
+	return count;
+}
+
+static void ionic_get_strings(struct net_device *netdev,
+			      u32 sset, u8 *buf)
+{
+	struct ionic_lif *lif = netdev_priv(netdev);
+
+	switch (sset) {
+	case ETH_SS_STATS:
+		ionic_get_stats_strings(lif, buf);
+		break;
+	case ETH_SS_PRIV_FLAGS:
+		memcpy(buf, ionic_priv_flags_strings,
+		       IONIC_PRIV_FLAGS_COUNT * ETH_GSTRING_LEN);
+		break;
+	}
+}
+
+static void ionic_get_drvinfo(struct net_device *netdev,
+			      struct ethtool_drvinfo *drvinfo)
+{
+	struct ionic_lif *lif = netdev_priv(netdev);
+	struct ionic *ionic = lif->ionic;
+
+	strscpy(drvinfo->driver, IONIC_DRV_NAME, sizeof(drvinfo->driver));
+	strscpy(drvinfo->version, IONIC_DRV_VERSION, sizeof(drvinfo->version));
+	strscpy(drvinfo->fw_version, ionic->idev.dev_info.fw_version,
+		sizeof(drvinfo->fw_version));
+	strscpy(drvinfo->bus_info, ionic_bus_info(ionic),
+		sizeof(drvinfo->bus_info));
+}
+
+static int ionic_get_regs_len(struct net_device *netdev)
+{
+	return (IONIC_DEV_INFO_REG_COUNT + IONIC_DEV_CMD_REG_COUNT) * sizeof(u32);
+}
+
+static void ionic_get_regs(struct net_device *netdev, struct ethtool_regs *regs,
+			   void *p)
+{
+	struct ionic_lif *lif = netdev_priv(netdev);
+	unsigned int offset;
+	unsigned int size;
+
+	regs->version = IONIC_DEV_CMD_REG_VERSION;
+
+	offset = 0;
+	size = IONIC_DEV_INFO_REG_COUNT * sizeof(u32);
+	memcpy_fromio(p + offset, lif->ionic->idev.dev_info_regs->words, size);
+
+	offset += size;
+	size = IONIC_DEV_CMD_REG_COUNT * sizeof(u32);
+	memcpy_fromio(p + offset, lif->ionic->idev.dev_cmd_regs->words, size);
+}
+
+static int ionic_get_link_ksettings(struct net_device *netdev,
+				    struct ethtool_link_ksettings *ks)
+{
+	struct ionic_lif *lif = netdev_priv(netdev);
+	struct ionic_dev *idev = &lif->ionic->idev;
+	int copper_seen = 0;
+
+	ethtool_link_ksettings_zero_link_mode(ks, supported);
+
+	if (!idev->port_info) {
+		netdev_err(netdev, "port_info not initialized\n");
+		return -EOPNOTSUPP;
+	}
+
+	/* The port_info data is found in a DMA space that the NIC keeps
+	 * up-to-date, so there's no need to request the data from the
+	 * NIC, we already have it in our memory space.
+	 */
+
+	switch (le16_to_cpu(idev->port_info->status.xcvr.pid)) {
+		/* Copper */
+#ifdef HAVE_ETHTOOL_100G_BITS
+	case IONIC_XCVR_PID_QSFP_100G_CR4:
+		ethtool_link_ksettings_add_link_mode(ks, supported,
+						     100000baseCR4_Full);
+		copper_seen++;
+		break;
+#endif
+	case IONIC_XCVR_PID_QSFP_40GBASE_CR4:
+		ethtool_link_ksettings_add_link_mode(ks, supported,
+						     40000baseCR4_Full);
+		copper_seen++;
+		break;
+#ifdef HAVE_ETHTOOL_25G_BITS
+	case IONIC_XCVR_PID_SFP_25GBASE_CR_S:
+	case IONIC_XCVR_PID_SFP_25GBASE_CR_L:
+	case IONIC_XCVR_PID_SFP_25GBASE_CR_N:
+		ethtool_link_ksettings_add_link_mode(ks, supported,
+						     25000baseCR_Full);
+		copper_seen++;
+		break;
+#endif
+	case IONIC_XCVR_PID_SFP_10GBASE_AOC:
+	case IONIC_XCVR_PID_SFP_10GBASE_CU:
+#ifdef HAVE_ETHTOOL_NEW_10G_BITS
+		ethtool_link_ksettings_add_link_mode(ks, supported,
+						     10000baseCR_Full);
+#else
+		ethtool_link_ksettings_add_link_mode(ks, supported,
+						     10000baseT_Full);
+#endif
+		copper_seen++;
+		break;
+
+		/* Fibre */
+#ifdef HAVE_ETHTOOL_100G_BITS
+	case IONIC_XCVR_PID_QSFP_100G_SR4:
+	case IONIC_XCVR_PID_QSFP_100G_AOC:
+		ethtool_link_ksettings_add_link_mode(ks, supported,
+						     100000baseSR4_Full);
+		break;
+	case IONIC_XCVR_PID_QSFP_100G_CWDM4:
+	case IONIC_XCVR_PID_QSFP_100G_PSM4:
+	case IONIC_XCVR_PID_QSFP_100G_LR4:
+		ethtool_link_ksettings_add_link_mode(ks, supported,
+						     100000baseLR4_ER4_Full);
+		break;
+	case IONIC_XCVR_PID_QSFP_100G_ER4:
+		ethtool_link_ksettings_add_link_mode(ks, supported,
+						     100000baseLR4_ER4_Full);
+		break;
+#endif
+	case IONIC_XCVR_PID_QSFP_40GBASE_SR4:
+	case IONIC_XCVR_PID_QSFP_40GBASE_AOC:
+		ethtool_link_ksettings_add_link_mode(ks, supported,
+						     40000baseSR4_Full);
+		break;
+	case IONIC_XCVR_PID_QSFP_40GBASE_LR4:
+		ethtool_link_ksettings_add_link_mode(ks, supported,
+						     40000baseLR4_Full);
+		break;
+#ifdef HAVE_ETHTOOL_25G_BITS
+	case IONIC_XCVR_PID_SFP_25GBASE_SR:
+	case IONIC_XCVR_PID_SFP_25GBASE_AOC:
+	case IONIC_XCVR_PID_SFP_25GBASE_ACC:
+		ethtool_link_ksettings_add_link_mode(ks, supported,
+						     25000baseSR_Full);
+		break;
+#endif
+#ifdef HAVE_ETHTOOL_NEW_10G_BITS
+	case IONIC_XCVR_PID_SFP_10GBASE_SR:
+		ethtool_link_ksettings_add_link_mode(ks, supported,
+						     10000baseSR_Full);
+		break;
+	case IONIC_XCVR_PID_SFP_10GBASE_LR:
+		ethtool_link_ksettings_add_link_mode(ks, supported,
+						     10000baseLR_Full);
+		break;
+	case IONIC_XCVR_PID_SFP_10GBASE_LRM:
+		ethtool_link_ksettings_add_link_mode(ks, supported,
+						     10000baseLRM_Full);
+		break;
+	case IONIC_XCVR_PID_SFP_10GBASE_ER:
+		ethtool_link_ksettings_add_link_mode(ks, supported,
+						     10000baseER_Full);
+		break;
+	case IONIC_XCVR_PID_SFP_10GBASE_T:
+		ethtool_link_ksettings_add_link_mode(ks, supported,
+						     10000baseT_Full);
+		break;
+#else
+	case IONIC_XCVR_PID_SFP_10GBASE_SR:
+	case IONIC_XCVR_PID_SFP_10GBASE_LR:
+	case IONIC_XCVR_PID_SFP_10GBASE_LRM:
+	case IONIC_XCVR_PID_SFP_10GBASE_ER:
+	case IONIC_XCVR_PID_SFP_10GBASE_T:
+		ethtool_link_ksettings_add_link_mode(ks, supported,
+						     10000baseT_Full);
+		break;
+#endif
+	case IONIC_XCVR_PID_SFP_1000BASE_T:
+		ethtool_link_ksettings_add_link_mode(ks, supported,
+						     1000baseT_Full);
+		break;
+	case IONIC_XCVR_PID_QSFP_100G_ACC:
+	case IONIC_XCVR_PID_QSFP_40GBASE_ER4:
+	case IONIC_XCVR_PID_SFP_25GBASE_LR:
+	case IONIC_XCVR_PID_SFP_25GBASE_ER:
+		dev_info(lif->ionic->dev, "no decode bits for xcvr type pid=%d / 0x%x\n",
+			 idev->port_info->status.xcvr.pid,
+			 idev->port_info->status.xcvr.pid);
+		break;
+	case IONIC_XCVR_PID_UNKNOWN:
+		/* This means there's no module plugged in */
+		if (lif->ionic->is_mgmt_nic)
+			ethtool_link_ksettings_add_link_mode(ks, supported,
+							     1000baseT_Full);
+		break;
+	default:
+		dev_dbg(lif->ionic->dev, "unknown xcvr type pid=%d / 0x%x\n",
+			idev->port_info->status.xcvr.pid,
+			idev->port_info->status.xcvr.pid);
+		break;
+	}
+
+	bitmap_copy(ks->link_modes.advertising, ks->link_modes.supported,
+		    __ETHTOOL_LINK_MODE_MASK_NBITS);
+
+#ifdef ETHTOOL_FEC_NONE
+	if (idev->port_info->status.fec_type == IONIC_PORT_FEC_TYPE_FC)
+		ethtool_link_ksettings_add_link_mode(ks, advertising, FEC_BASER);
+	else if (idev->port_info->status.fec_type == IONIC_PORT_FEC_TYPE_RS)
+		ethtool_link_ksettings_add_link_mode(ks, advertising, FEC_RS);
+#endif
+
+	if (lif->ionic->is_mgmt_nic)
+		ethtool_link_ksettings_add_link_mode(ks, supported, Backplane);
+	else
+		ethtool_link_ksettings_add_link_mode(ks, supported, FIBRE);
+
+	ethtool_link_ksettings_add_link_mode(ks, supported, Pause);
+
+	if (idev->port_info->status.xcvr.phy == IONIC_PHY_TYPE_COPPER ||
+	    copper_seen)
+		ks->base.port = PORT_DA;
+	else if (idev->port_info->status.xcvr.phy == IONIC_PHY_TYPE_FIBER)
+		ks->base.port = PORT_FIBRE;
+	else if (lif->ionic->is_mgmt_nic)
+		ks->base.port = PORT_OTHER;
+	else
+		ks->base.port = PORT_NONE;
+
+	if (ks->base.port != PORT_NONE) {
+		ks->base.speed = le32_to_cpu(lif->info->status.link_speed);
+
+		if (le16_to_cpu(lif->info->status.link_status))
+			ks->base.duplex = DUPLEX_FULL;
+		else
+			ks->base.duplex = DUPLEX_UNKNOWN;
+
+		if (ionic_is_pf(lif->ionic) && !lif->ionic->is_mgmt_nic) {
+			ethtool_link_ksettings_add_link_mode(ks, supported,
+							     Autoneg);
+
+			if (idev->port_info->config.an_enable) {
+				ethtool_link_ksettings_add_link_mode(ks,
+								     advertising,
+								     Autoneg);
+				ks->base.autoneg = AUTONEG_ENABLE;
+			}
+		}
+	}
+
+	return 0;
+}
+
+static int ionic_set_link_ksettings(struct net_device *netdev,
+				    const struct ethtool_link_ksettings *ks)
+{
+	struct ionic_lif *lif = netdev_priv(netdev);
+	struct ionic_dev *idev = &lif->ionic->idev;
+	struct ionic *ionic = lif->ionic;
+	int err = 0;
+
+	if (test_bit(IONIC_LIF_F_FW_RESET, lif->state))
+		return -EBUSY;
+
+	/* set autoneg */
+	if (ks->base.autoneg != idev->port_info->config.an_enable) {
+		mutex_lock(&ionic->dev_cmd_lock);
+		ionic_dev_cmd_port_autoneg(idev, ks->base.autoneg);
+		err = ionic_dev_cmd_wait(ionic, devcmd_timeout);
+		mutex_unlock(&ionic->dev_cmd_lock);
+		if (err)
+			return err;
+	}
+
+	/* set speed */
+	if (ks->base.speed != le32_to_cpu(idev->port_info->config.speed)) {
+		mutex_lock(&ionic->dev_cmd_lock);
+		ionic_dev_cmd_port_speed(idev, ks->base.speed);
+		err = ionic_dev_cmd_wait(ionic, devcmd_timeout);
+		mutex_unlock(&ionic->dev_cmd_lock);
+		if (err)
+			return err;
+	}
+
+	return 0;
+}
+
+static void ionic_get_pauseparam(struct net_device *netdev,
+				 struct ethtool_pauseparam *pause)
+{
+	struct ionic_lif *lif = netdev_priv(netdev);
+	u8 pause_type;
+
+	pause->autoneg = 0;
+
+	pause_type = lif->ionic->idev.port_info->config.pause_type;
+	if (pause_type) {
+		pause->rx_pause = (pause_type & IONIC_PAUSE_F_RX) ? 1 : 0;
+		pause->tx_pause = (pause_type & IONIC_PAUSE_F_TX) ? 1 : 0;
+	}
+}
+
+static int ionic_set_pauseparam(struct net_device *netdev,
+				struct ethtool_pauseparam *pause)
+{
+	struct ionic_lif *lif = netdev_priv(netdev);
+	struct ionic *ionic = lif->ionic;
+	u32 requested_pause;
+	int err;
+
+	if (test_bit(IONIC_LIF_F_FW_RESET, lif->state))
+		return -EBUSY;
+
+	if (pause->autoneg)
+		return -EOPNOTSUPP;
+
+	/* change both at the same time */
+	requested_pause = IONIC_PORT_PAUSE_TYPE_LINK;
+	if (pause->rx_pause)
+		requested_pause |= IONIC_PAUSE_F_RX;
+	if (pause->tx_pause)
+		requested_pause |= IONIC_PAUSE_F_TX;
+
+	if (requested_pause == lif->ionic->idev.port_info->config.pause_type)
+		return 0;
+
+	mutex_lock(&ionic->dev_cmd_lock);
+	ionic_dev_cmd_port_pause(&lif->ionic->idev, requested_pause);
+	err = ionic_dev_cmd_wait(ionic, devcmd_timeout);
+	mutex_unlock(&ionic->dev_cmd_lock);
+	if (err)
+		return err;
+
+	return 0;
+}
+
+#ifdef ETHTOOL_FEC_NONE
+static int ionic_get_fecparam(struct net_device *netdev,
+			      struct ethtool_fecparam *fec)
+{
+	struct ionic_lif *lif = netdev_priv(netdev);
+
+	switch (lif->ionic->idev.port_info->status.fec_type) {
+	case IONIC_PORT_FEC_TYPE_NONE:
+		fec->active_fec = ETHTOOL_FEC_OFF;
+		break;
+	case IONIC_PORT_FEC_TYPE_RS:
+		fec->active_fec = ETHTOOL_FEC_RS;
+		break;
+	case IONIC_PORT_FEC_TYPE_FC:
+		fec->active_fec = ETHTOOL_FEC_BASER;
+		break;
+	default:
+		fec->active_fec = ETHTOOL_FEC_NONE;
+		break;
+	}
+
+	switch (lif->ionic->idev.port_info->config.fec_type) {
+	case IONIC_PORT_FEC_TYPE_NONE:
+		fec->fec = ETHTOOL_FEC_OFF;
+		break;
+	case IONIC_PORT_FEC_TYPE_RS:
+		fec->fec = ETHTOOL_FEC_RS;
+		break;
+	case IONIC_PORT_FEC_TYPE_FC:
+		fec->fec = ETHTOOL_FEC_BASER;
+		break;
+	default:
+		fec->fec = ETHTOOL_FEC_NONE;
+		break;
+	}
+
+	return 0;
+}
+
+static int ionic_set_fecparam(struct net_device *netdev,
+			      struct ethtool_fecparam *fec)
+{
+	struct ionic_lif *lif = netdev_priv(netdev);
+	u8 fec_type;
+	int ret = 0;
+
+	if (test_bit(IONIC_LIF_F_FW_RESET, lif->state))
+		return -EBUSY;
+
+	if (lif->ionic->idev.port_info->config.an_enable) {
+		netdev_err(netdev, "FEC request not allowed while autoneg is enabled\n");
+		return -EINVAL;
+	}
+
+	switch (fec->fec) {
+	case ETHTOOL_FEC_NONE:
+		fec_type = IONIC_PORT_FEC_TYPE_NONE;
+		break;
+	case ETHTOOL_FEC_OFF:
+		fec_type = IONIC_PORT_FEC_TYPE_NONE;
+		break;
+	case ETHTOOL_FEC_RS:
+		fec_type = IONIC_PORT_FEC_TYPE_RS;
+		break;
+	case ETHTOOL_FEC_BASER:
+		fec_type = IONIC_PORT_FEC_TYPE_FC;
+		break;
+	case ETHTOOL_FEC_AUTO:
+	default:
+		netdev_err(netdev, "FEC request 0x%04x not supported\n",
+			   fec->fec);
+		return -EINVAL;
+	}
+
+	if (fec_type != lif->ionic->idev.port_info->config.fec_type) {
+		mutex_lock(&lif->ionic->dev_cmd_lock);
+		ionic_dev_cmd_port_fec(&lif->ionic->idev, fec_type);
+		ret = ionic_dev_cmd_wait(lif->ionic, devcmd_timeout);
+		mutex_unlock(&lif->ionic->dev_cmd_lock);
+	}
+
+	return ret;
+}
+
+#endif /* ETHTOOL_FEC_NONE */
+#ifdef HAVE_COALESCE_EXTACK
+static int ionic_get_coalesce(struct net_device *netdev,
+			      struct ethtool_coalesce *coalesce,
+			      struct kernel_ethtool_coalesce *kernel_coal,
+			      struct netlink_ext_ack *extack)
+#else
+static int ionic_get_coalesce(struct net_device *netdev,
+			      struct ethtool_coalesce *coalesce)
+#endif
+{
+	struct ionic_lif *lif = netdev_priv(netdev);
+
+	coalesce->tx_coalesce_usecs = lif->tx_coalesce_usecs;
+	coalesce->rx_coalesce_usecs = lif->rx_coalesce_usecs;
+
+	if (test_bit(IONIC_LIF_F_SPLIT_INTR, lif->state))
+		coalesce->use_adaptive_tx_coalesce = test_bit(IONIC_LIF_F_TX_DIM_INTR, lif->state);
+	else
+		coalesce->use_adaptive_tx_coalesce = 0;
+
+	coalesce->use_adaptive_rx_coalesce = test_bit(IONIC_LIF_F_RX_DIM_INTR, lif->state);
+
+	return 0;
+}
+
+#ifdef HAVE_COALESCE_EXTACK
+static int ionic_set_coalesce(struct net_device *netdev,
+			      struct ethtool_coalesce *coalesce,
+			      struct kernel_ethtool_coalesce *kernel_coal,
+			      struct netlink_ext_ack *extack)
+#else
+static int ionic_set_coalesce(struct net_device *netdev,
+			      struct ethtool_coalesce *coalesce)
+#endif
+{
+	struct ionic_lif *lif = netdev_priv(netdev);
+	struct ionic_identity *ident;
+	u32 rx_coal, rx_dim;
+	u32 tx_coal, tx_dim;
+	unsigned int i;
+
+	if (coalesce->rx_max_coalesced_frames ||
+	    coalesce->rx_coalesce_usecs_irq ||
+	    coalesce->rx_max_coalesced_frames_irq ||
+	    coalesce->tx_max_coalesced_frames ||
+	    coalesce->tx_coalesce_usecs_irq ||
+	    coalesce->tx_max_coalesced_frames_irq ||
+	    coalesce->stats_block_coalesce_usecs ||
+	    coalesce->pkt_rate_low ||
+	    coalesce->rx_coalesce_usecs_low ||
+	    coalesce->rx_max_coalesced_frames_low ||
+	    coalesce->tx_coalesce_usecs_low ||
+	    coalesce->tx_max_coalesced_frames_low ||
+	    coalesce->pkt_rate_high ||
+	    coalesce->rx_coalesce_usecs_high ||
+	    coalesce->rx_max_coalesced_frames_high ||
+	    coalesce->tx_coalesce_usecs_high ||
+	    coalesce->tx_max_coalesced_frames_high ||
+	    coalesce->rate_sample_interval)
+		return -EINVAL;
+
+	if (lif->ionic->neth_eqs &&
+	    (coalesce->use_adaptive_rx_coalesce ||
+	     coalesce->use_adaptive_tx_coalesce)) {
+		return -EINVAL;
+	}
+
+	ident = &lif->ionic->ident;
+	if (ident->dev.intr_coal_div == 0) {
+		netdev_warn(netdev, "bad HW value in dev.intr_coal_div = %d\n",
+			    ident->dev.intr_coal_div);
+		return -EIO;
+	}
+
+	/* Tx normally shares Rx interrupt, so only change Rx if not split */
+	if (!test_bit(IONIC_LIF_F_SPLIT_INTR, lif->state) &&
+	    (coalesce->tx_coalesce_usecs != lif->rx_coalesce_usecs ||
+	     coalesce->use_adaptive_tx_coalesce)) {
+		netdev_warn(netdev, "only rx parameters can be changed\n");
+		return -EINVAL;
+	}
+
+	/* Convert the usec request to a HW usable value.  If they asked
+	 * for non-zero and it resolved to zero, bump it up
+	 */
+	rx_coal = ionic_coal_usec_to_hw(lif->ionic, coalesce->rx_coalesce_usecs);
+	if (!rx_coal && coalesce->rx_coalesce_usecs)
+		rx_coal = 1;
+	tx_coal = ionic_coal_usec_to_hw(lif->ionic, coalesce->tx_coalesce_usecs);
+	if (!tx_coal && coalesce->tx_coalesce_usecs)
+		tx_coal = 1;
+
+	if (rx_coal > IONIC_INTR_CTRL_COAL_MAX ||
+	    tx_coal > IONIC_INTR_CTRL_COAL_MAX)
+		return -ERANGE;
+
+	/* Save the new values */
+	lif->rx_coalesce_usecs = coalesce->rx_coalesce_usecs;
+	lif->rx_coalesce_hw = rx_coal;
+
+	if (test_bit(IONIC_LIF_F_SPLIT_INTR, lif->state))
+		lif->tx_coalesce_usecs = coalesce->tx_coalesce_usecs;
+	else
+		lif->tx_coalesce_usecs = coalesce->rx_coalesce_usecs;
+	lif->tx_coalesce_hw = tx_coal;
+
+	if (coalesce->use_adaptive_rx_coalesce) {
+		set_bit(IONIC_LIF_F_RX_DIM_INTR, lif->state);
+		rx_dim = rx_coal;
+	} else {
+		clear_bit(IONIC_LIF_F_RX_DIM_INTR, lif->state);
+		rx_dim = 0;
+	}
+
+	if (coalesce->use_adaptive_tx_coalesce) {
+		set_bit(IONIC_LIF_F_TX_DIM_INTR, lif->state);
+		tx_dim = tx_coal;
+	} else {
+		clear_bit(IONIC_LIF_F_TX_DIM_INTR, lif->state);
+		tx_dim = 0;
+	}
+
+	if (test_bit(IONIC_LIF_F_UP, lif->state)) {
+		for (i = 0; i < lif->nxqs; i++) {
+			if (lif->rxqcqs[i]->flags & IONIC_QCQ_F_INTR) {
+				ionic_intr_coal_init(lif->ionic->idev.intr_ctrl,
+						     lif->rxqcqs[i]->intr.index,
+						     lif->rx_coalesce_hw);
+				lif->rxqcqs[i]->intr.dim_coal_hw = rx_dim;
+			}
+
+			if (lif->txqcqs[i]->flags & IONIC_QCQ_F_INTR) {
+				ionic_intr_coal_init(lif->ionic->idev.intr_ctrl,
+						     lif->txqcqs[i]->intr.index,
+						     lif->tx_coalesce_hw);
+				lif->txqcqs[i]->intr.dim_coal_hw = tx_dim;
+			}
+		}
+	}
+
+	return 0;
+}
+
+#ifdef HAVE_RINGPARAM_EXTACK
+static void ionic_get_ringparam(struct net_device *netdev,
+				struct ethtool_ringparam *ring,
+				struct kernel_ethtool_ringparam *kernel_ring,
+				struct netlink_ext_ack *extack)
+#else
+static void ionic_get_ringparam(struct net_device *netdev,
+				struct ethtool_ringparam *ring)
+#endif
+{
+	struct ionic_lif *lif = netdev_priv(netdev);
+
+	ring->tx_max_pending = IONIC_MAX_TX_DESC;
+	ring->tx_pending = lif->ntxq_descs;
+	ring->rx_max_pending = IONIC_MAX_RX_DESC;
+	ring->rx_pending = lif->nrxq_descs;
+}
+
+#ifdef HAVE_RINGPARAM_EXTACK
+static int ionic_set_ringparam(struct net_device *netdev,
+			       struct ethtool_ringparam *ring,
+			       struct kernel_ethtool_ringparam *kernel_ring,
+			       struct netlink_ext_ack *extack)
+#else
+static int ionic_set_ringparam(struct net_device *netdev,
+			       struct ethtool_ringparam *ring)
+#endif
+{
+	struct ionic_lif *lif = netdev_priv(netdev);
+	struct ionic_queue_params qparam;
+	int err;
+
+	ionic_init_queue_params(lif, &qparam);
+
+	if (ring->rx_mini_pending || ring->rx_jumbo_pending) {
+		netdev_info(netdev, "Changing jumbo or mini descriptors not supported\n");
+		return -EINVAL;
+	}
+
+	if (!is_power_of_2(ring->tx_pending) ||
+	    !is_power_of_2(ring->rx_pending)) {
+		netdev_info(netdev, "Descriptor count must be a power of 2\n");
+		return -EINVAL;
+	}
+
+	if (ring->tx_pending > IONIC_MAX_TX_DESC ||
+	    ring->tx_pending < IONIC_MIN_TXRX_DESC) {
+		netdev_info(netdev, "Tx descriptor count must be in the range [%d-%d]\n",
+			    IONIC_MIN_TXRX_DESC, IONIC_MAX_TX_DESC);
+		return -EINVAL;
+	}
+
+	if (ring->rx_pending > IONIC_MAX_RX_DESC ||
+	    ring->rx_pending < IONIC_MIN_TXRX_DESC) {
+		netdev_info(netdev, "Rx descriptor count must be in the range [%d-%d]\n",
+			    IONIC_MIN_TXRX_DESC, IONIC_MAX_RX_DESC);
+		return -EINVAL;
+	}
+
+	/* if nothing to do return success */
+	if (ring->tx_pending == lif->ntxq_descs &&
+	    ring->rx_pending == lif->nrxq_descs)
+		return 0;
+
+	qparam.ntxq_descs = ring->tx_pending;
+	qparam.nrxq_descs = ring->rx_pending;
+
+	err = ionic_validate_cmb_config(lif, &qparam);
+	if (err < 0)
+		return err;
+
+	if (ring->tx_pending != lif->ntxq_descs)
+		netdev_info(netdev, "Changing Tx ring size from %d to %d\n",
+			    lif->ntxq_descs, ring->tx_pending);
+
+	if (ring->rx_pending != lif->nrxq_descs)
+		netdev_info(netdev, "Changing Rx ring size from %d to %d\n",
+			    lif->nrxq_descs, ring->rx_pending);
+
+	/* if we're not running, just set the values and return */
+	if (!netif_running(lif->netdev)) {
+		lif->ntxq_descs = ring->tx_pending;
+		lif->nrxq_descs = ring->rx_pending;
+		return 0;
+	}
+
+	mutex_lock(&lif->queue_lock);
+	err = ionic_reconfigure_queues(lif, &qparam);
+	mutex_unlock(&lif->queue_lock);
+	if (err)
+		netdev_info(netdev, "Ring reconfiguration failed, changes canceled: %d\n", err);
+
+	return err;
+}
+
+static void ionic_get_channels(struct net_device *netdev,
+			       struct ethtool_channels *ch)
+{
+	struct ionic_lif *lif = netdev_priv(netdev);
+
+	/* report maximum channels */
+	ch->max_combined = lif->ionic->ntxqs_per_lif;
+	if (!ionic_use_eqs(lif)) {
+		ch->max_rx = lif->ionic->ntxqs_per_lif / 2;
+		ch->max_tx = lif->ionic->ntxqs_per_lif / 2;
+	}
+
+	/* report current channels */
+	if (test_bit(IONIC_LIF_F_SPLIT_INTR, lif->state)) {
+		ch->rx_count = lif->nxqs;
+		ch->tx_count = lif->nxqs;
+	} else {
+		ch->combined_count = lif->nxqs;
+	}
+}
+
+static int ionic_set_channels(struct net_device *netdev,
+			      struct ethtool_channels *ch)
+{
+	struct ionic_lif *lif = netdev_priv(netdev);
+	struct ionic_queue_params qparam;
+	int max_cnt;
+	int err;
+
+	ionic_init_queue_params(lif, &qparam);
+
+	/* Valid cases
+	 *  Combined (default):
+	 *    rx_count == tx_count: 0
+	 *    combined_count: 1..lif->ionic->ntxqs_per_lif
+	 *    other_count: 0
+	 *  Split:
+	 *    rx_count == tx_count: 1..lif->ionic->ntxqs_per_lif / 2
+	 *    combined_count: 0
+	 *    other_count: 0
+	 */
+	if (ch->other_count) {
+		netdev_info(netdev, "We don't use other queues\n");
+		return -EINVAL;
+	}
+
+	if (ch->rx_count != ch->tx_count) {
+		netdev_info(netdev, "The rx and tx count must be equal\n");
+		return -EINVAL;
+	}
+
+	if (ionic_use_eqs(lif) && ch->rx_count) {
+		netdev_info(netdev, "Separate rx and tx count not available when using EventQueues\n");
+		return -EINVAL;
+	}
+
+	if (ch->combined_count && ch->rx_count) {
+		netdev_info(netdev, "Use either combined or rx and tx, not both\n");
+		return -EINVAL;
+	}
+
+	max_cnt = lif->ionic->ntxqs_per_lif;
+	if (ch->combined_count) {
+		if (ch->combined_count > max_cnt)
+			return -EINVAL;
+
+		if (test_bit(IONIC_LIF_F_SPLIT_INTR, lif->state))
+			netdev_info(lif->netdev, "Sharing queue interrupts\n");
+		else if (ch->combined_count == lif->nxqs)
+			return 0;
+
+		if (lif->nxqs != ch->combined_count)
+			netdev_info(netdev, "Changing queue count from %d to %d\n",
+				    lif->nxqs, ch->combined_count);
+
+		qparam.nxqs = ch->combined_count;
+		qparam.intr_split = false;
+	} else {
+		max_cnt /= 2;
+		if (ch->rx_count > max_cnt)
+			return -EINVAL;
+
+		if (!test_bit(IONIC_LIF_F_SPLIT_INTR, lif->state))
+			netdev_info(lif->netdev, "Splitting queue interrupts\n");
+		else if (ch->rx_count == lif->nxqs)
+			return 0;
+
+		if (lif->nxqs != ch->rx_count)
+			netdev_info(netdev, "Changing queue count from %d to %d\n",
+				    lif->nxqs, ch->rx_count);
+
+		qparam.nxqs = ch->rx_count;
+		qparam.intr_split = true;
+	}
+
+	err = ionic_validate_cmb_config(lif, &qparam);
+	if (err < 0)
+		return err;
+
+	/* if we're not running, just set the values and return */
+	if (!netif_running(lif->netdev)) {
+		lif->nxqs = qparam.nxqs;
+
+		if (qparam.intr_split) {
+			set_bit(IONIC_LIF_F_SPLIT_INTR, lif->state);
+		} else {
+			clear_bit(IONIC_LIF_F_SPLIT_INTR, lif->state);
+			lif->tx_coalesce_usecs = lif->rx_coalesce_usecs;
+			lif->tx_coalesce_hw = lif->rx_coalesce_hw;
+		}
+		return 0;
+	}
+
+	mutex_lock(&lif->queue_lock);
+	err = ionic_reconfigure_queues(lif, &qparam);
+	mutex_unlock(&lif->queue_lock);
+	if (err)
+		netdev_info(netdev, "Queue reconfiguration failed, changes canceled: %d\n", err);
+
+	return err;
+}
+
+int ionic_cmb_pages_in_use(struct ionic_lif *lif)
+{
+	struct ionic_queue_params qparam;
+
+	ionic_init_queue_params(lif, &qparam);
+	return ionic_validate_cmb_config(lif, &qparam);
+}
+
+static int ionic_cmb_rings_toggle(struct ionic_lif *lif, bool cmb_enable)
+{
+	struct ionic_queue_params qparam;
+	int pages_used;
+
+	if (!(lif->qtype_info[IONIC_QTYPE_TXQ].features & IONIC_QIDENT_F_CMB) ||
+	    !(lif->qtype_info[IONIC_QTYPE_RXQ].features & IONIC_QIDENT_F_CMB) ||
+	    !lif->ionic->idev.cmb_npages) {
+		netdev_info(lif->netdev, "CMB rings are not supported on this device\n");
+		return -EOPNOTSUPP;
+	}
+
+	if (netif_running(lif->netdev))
+		return -EBUSY;
+
+	ionic_init_queue_params(lif, &qparam);
+	qparam.cmb_enabled = cmb_enable;
+	pages_used = ionic_validate_cmb_config(lif, &qparam);
+	if (pages_used < 0)
+		return pages_used;
+
+	if (cmb_enable) {
+		netdev_info(lif->netdev, "Enabling CMB rings - %d pages\n",
+			    pages_used);
+		set_bit(IONIC_LIF_F_CMB_RINGS, lif->state);
+	} else {
+		netdev_info(lif->netdev, "Disabling CMB rings\n");
+		clear_bit(IONIC_LIF_F_CMB_RINGS, lif->state);
+	}
+
+	/* We are currently restricting CMB mode enable/disable to
+	 * only when the driver is DOWN, in order to keep reconfig
+	 * thrash to a minimum and to keep the reconfig code simpler.
+	 * In the future when we relax this requirement we can call
+	 * ionic_reconfigure_queues() here.
+	 */
+
+	return 0;
+}
+
+static u32 ionic_get_priv_flags(struct net_device *netdev)
+{
+	struct ionic_lif *lif = netdev_priv(netdev);
+	u32 priv_flags = 0;
+
+	if (test_bit(IONIC_LIF_F_SW_DEBUG_STATS, lif->state))
+		priv_flags |= IONIC_PRIV_F_SW_DBG_STATS;
+
+	if (test_bit(IONIC_LIF_F_RDMA_SNIFFER, lif->state))
+		priv_flags |= IONIC_PRIV_F_RDMA_SNIFFER;
+
+	if (test_bit(IONIC_LIF_F_CMB_RINGS, lif->state))
+		priv_flags |= IONIC_PRIV_F_CMB_RINGS;
+
+	return priv_flags;
+}
+
+static int ionic_set_priv_flags(struct net_device *netdev, u32 priv_flags)
+{
+	struct ionic_lif *lif = netdev_priv(netdev);
+	bool cmb_now, cmb_req;
+	int rdma;
+	int ret;
+
+	if (priv_flags & IONIC_PRIV_F_DEVICE_RESET)
+		ionic_device_reset(lif);
+
+	clear_bit(IONIC_LIF_F_SW_DEBUG_STATS, lif->state);
+	if (priv_flags & IONIC_PRIV_F_SW_DBG_STATS)
+		set_bit(IONIC_LIF_F_SW_DEBUG_STATS, lif->state);
+
+	rdma = test_bit(IONIC_LIF_F_RDMA_SNIFFER, lif->state);
+	clear_bit(IONIC_LIF_F_RDMA_SNIFFER, lif->state);
+	if (priv_flags & IONIC_PRIV_F_RDMA_SNIFFER)
+		set_bit(IONIC_LIF_F_RDMA_SNIFFER, lif->state);
+
+	if (rdma != test_bit(IONIC_LIF_F_RDMA_SNIFFER, lif->state))
+		ionic_lif_rx_mode(lif);
+
+	cmb_now = test_bit(IONIC_LIF_F_CMB_RINGS, lif->state);
+	cmb_req = !!(priv_flags & IONIC_PRIV_F_CMB_RINGS);
+	if (cmb_now != cmb_req) {
+		ret = ionic_cmb_rings_toggle(lif, cmb_req);
+		if (ret < 0)
+			return ret;
+	}
+
+	return 0;
+}
+
+static int ionic_get_rxnfc(struct net_device *netdev,
+			   struct ethtool_rxnfc *info, u32 *rules)
+{
+	struct ionic_lif *lif = netdev_priv(netdev);
+	int err = 0;
+
+	switch (info->cmd) {
+	case ETHTOOL_GRXRINGS:
+		info->data = lif->nxqs;
+		break;
+	default:
+		netdev_err(netdev, "Command parameter %d is not supported\n",
+			   info->cmd);
+		err = -EOPNOTSUPP;
+	}
+
+	return err;
+}
+
+static u32 ionic_get_rxfh_indir_size(struct net_device *netdev)
+{
+	struct ionic_lif *lif = netdev_priv(netdev);
+
+	return le16_to_cpu(lif->ionic->ident.lif.eth.rss_ind_tbl_sz);
+}
+
+static u32 ionic_get_rxfh_key_size(struct net_device *netdev)
+{
+	return IONIC_RSS_HASH_KEY_SIZE;
+}
+
+#ifdef HAVE_RXFH_HASHFUNC
+static int ionic_get_rxfh(struct net_device *netdev, u32 *indir, u8 *key,
+			  u8 *hfunc)
+#else
+static int ionic_get_rxfh(struct net_device *netdev, u32 *indir, u8 *key)
+#endif
+{
+	struct ionic_lif *lif = netdev_priv(netdev);
+	unsigned int i, tbl_sz;
+
+	if (indir) {
+		tbl_sz = le16_to_cpu(lif->ionic->ident.lif.eth.rss_ind_tbl_sz);
+		for (i = 0; i < tbl_sz; i++)
+			indir[i] = lif->rss_ind_tbl[i];
+	}
+
+	if (key)
+		memcpy(key, lif->rss_hash_key, IONIC_RSS_HASH_KEY_SIZE);
+
+#ifdef HAVE_RXFH_HASHFUNC
+	if (hfunc)
+		*hfunc = ETH_RSS_HASH_TOP;
+#endif
+
+	return 0;
+}
+
+#ifdef HAVE_RXFH_HASHFUNC
+static int ionic_set_rxfh(struct net_device *netdev, const u32 *indir,
+			  const u8 *key, const u8 hfunc)
+#else
+static int ionic_set_rxfh(struct net_device *netdev, const u32 *indir,
+			  const u8 *key)
+#endif
+{
+	struct ionic_lif *lif = netdev_priv(netdev);
+
+#ifdef HAVE_RXFH_HASHFUNC
+	if (hfunc != ETH_RSS_HASH_NO_CHANGE && hfunc != ETH_RSS_HASH_TOP)
+		return -EOPNOTSUPP;
+#endif
+
+	return ionic_lif_rss_config(lif, lif->rss_types, key, indir);
+}
+
+static int ionic_set_tunable(struct net_device *dev,
+			     const struct ethtool_tunable *tuna,
+			     const void *data)
+{
+	struct ionic_lif *lif = netdev_priv(dev);
+
+	switch (tuna->id) {
+	case ETHTOOL_RX_COPYBREAK:
+		lif->rx_copybreak = *(u32 *)data;
+		break;
+	default:
+		return -EOPNOTSUPP;
+	}
+
+	return 0;
+}
+
+static int ionic_get_tunable(struct net_device *netdev,
+			     const struct ethtool_tunable *tuna, void *data)
+{
+	struct ionic_lif *lif = netdev_priv(netdev);
+
+	switch (tuna->id) {
+	case ETHTOOL_RX_COPYBREAK:
+		*(u32 *)data = lif->rx_copybreak;
+		break;
+	default:
+		return -EOPNOTSUPP;
+	}
+
+	return 0;
+}
+
+static int ionic_get_module_info(struct net_device *netdev,
+				 struct ethtool_modinfo *modinfo)
+
+{
+	struct ionic_lif *lif = netdev_priv(netdev);
+	struct ionic_dev *idev = &lif->ionic->idev;
+	struct ionic_xcvr_status *xcvr;
+
+	xcvr = &idev->port_info->status.xcvr;
+
+	/* report the module data type and length */
+	switch (xcvr->sprom[0]) {
+	case SFF8024_ID_SFP:
+		modinfo->type = ETH_MODULE_SFF_8079;
+		modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN;
+		break;
+	case SFF8024_ID_QSFP_8436_8636:
+	case SFF8024_ID_QSFP28_8636:
+		modinfo->type = ETH_MODULE_SFF_8436;
+		modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN;
+		break;
+	case SFF8024_ID_UNK:
+		if (lif->ionic->is_mgmt_nic)
+			netdev_info(netdev, "no xcvr on mgmt nic\n");
+		else
+			netdev_info(netdev, "no xcvr connected? type 0x%02x\n",
+				    xcvr->sprom[0]);
+		return -EINVAL;
+	default:
+		netdev_info(netdev, "unknown xcvr type 0x%02x\n",
+			    xcvr->sprom[0]);
+		modinfo->type = 0;
+		modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN;
+		break;
+	}
+
+	return 0;
+}
+
+static int ionic_get_module_eeprom(struct net_device *netdev,
+				   struct ethtool_eeprom *ee,
+				   u8 *data)
+{
+	struct ionic_lif *lif = netdev_priv(netdev);
+	struct ionic_dev *idev = &lif->ionic->idev;
+	struct ionic_xcvr_status *xcvr;
+	char tbuf[sizeof(xcvr->sprom)];
+	int count = 10;
+	u32 len;
+
+	/* The NIC keeps the module prom up-to-date in the DMA space
+	 * so we can simply copy the module bytes into the data buffer.
+	 */
+	xcvr = &idev->port_info->status.xcvr;
+	len = min_t(u32, sizeof(xcvr->sprom), ee->len);
+
+	do {
+		memcpy(data, xcvr->sprom, len);
+		memcpy(tbuf, xcvr->sprom, len);
+
+		/* Let's make sure we got a consistent copy */
+		if (!memcmp(data, tbuf, len))
+			break;
+
+	} while (--count);
+
+	if (!count)
+		return -ETIMEDOUT;
+
+	return 0;
+}
+
+#if IS_ENABLED(CONFIG_PTP_1588_CLOCK)
+static int ionic_get_ts_info(struct net_device *netdev,
+			     struct ethtool_ts_info *info)
+{
+	struct ionic_lif *lif = netdev_priv(netdev);
+	struct ionic *ionic = lif->ionic;
+	__le64 mask;
+
+	if (!lif->phc || !lif->phc->ptp)
+		return ethtool_op_get_ts_info(netdev, info);
+
+	info->phc_index = ptp_clock_index(lif->phc->ptp);
+
+	info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE |
+				SOF_TIMESTAMPING_RX_SOFTWARE |
+				SOF_TIMESTAMPING_SOFTWARE |
+				SOF_TIMESTAMPING_TX_HARDWARE |
+				SOF_TIMESTAMPING_RX_HARDWARE |
+				SOF_TIMESTAMPING_RAW_HARDWARE;
+
+	/* tx modes */
+
+	info->tx_types = BIT(HWTSTAMP_TX_OFF) |
+			 BIT(HWTSTAMP_TX_ON);
+
+	mask = cpu_to_le64(BIT_ULL(IONIC_TXSTAMP_ONESTEP_SYNC));
+	if (ionic->ident.lif.eth.hwstamp_tx_modes & mask)
+		info->tx_types |= BIT(HWTSTAMP_TX_ONESTEP_SYNC);
+
+#ifdef HAVE_HWSTAMP_TX_ONESTEP_P2P
+	mask = cpu_to_le64(BIT_ULL(IONIC_TXSTAMP_ONESTEP_P2P));
+	if (ionic->ident.lif.eth.hwstamp_tx_modes & mask)
+		info->tx_types |= BIT(HWTSTAMP_TX_ONESTEP_P2P);
+#endif
+
+	/* rx filters */
+
+	info->rx_filters = BIT(HWTSTAMP_FILTER_NONE) |
+			   BIT(HWTSTAMP_FILTER_ALL);
+
+#ifdef HAVE_HWTSTAMP_FILTER_NTP_ALL
+	mask = cpu_to_le64(IONIC_PKT_CLS_NTP_ALL);
+	if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask)
+		info->rx_filters |= BIT(HWTSTAMP_FILTER_NTP_ALL);
+#endif
+
+	mask = cpu_to_le64(IONIC_PKT_CLS_PTP1_SYNC);
+	if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask)
+		info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V1_L4_SYNC);
+
+	mask = cpu_to_le64(IONIC_PKT_CLS_PTP1_DREQ);
+	if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask)
+		info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ);
+
+	mask = cpu_to_le64(IONIC_PKT_CLS_PTP1_ALL);
+	if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask)
+		info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V1_L4_EVENT);
+
+	mask = cpu_to_le64(IONIC_PKT_CLS_PTP2_L4_SYNC);
+	if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask)
+		info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V2_L4_SYNC);
+
+	mask = cpu_to_le64(IONIC_PKT_CLS_PTP2_L4_DREQ);
+	if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask)
+		info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ);
+
+	mask = cpu_to_le64(IONIC_PKT_CLS_PTP2_L4_ALL);
+	if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask)
+		info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V2_L4_EVENT);
+
+	mask = cpu_to_le64(IONIC_PKT_CLS_PTP2_L2_SYNC);
+	if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask)
+		info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V2_L2_SYNC);
+
+	mask = cpu_to_le64(IONIC_PKT_CLS_PTP2_L2_DREQ);
+	if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask)
+		info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ);
+
+	mask = cpu_to_le64(IONIC_PKT_CLS_PTP2_L2_ALL);
+	if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask)
+		info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V2_L2_EVENT);
+
+	mask = cpu_to_le64(IONIC_PKT_CLS_PTP2_SYNC);
+	if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask)
+		info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V2_SYNC);
+
+	mask = cpu_to_le64(IONIC_PKT_CLS_PTP2_DREQ);
+	if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask)
+		info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V2_DELAY_REQ);
+
+	mask = cpu_to_le64(IONIC_PKT_CLS_PTP2_ALL);
+	if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) == mask)
+		info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V2_EVENT);
+
+	return 0;
+}
+#endif
+
+static int ionic_nway_reset(struct net_device *netdev)
+{
+	struct ionic_lif *lif = netdev_priv(netdev);
+	struct ionic *ionic = lif->ionic;
+	int err = 0;
+
+	if (test_bit(IONIC_LIF_F_FW_RESET, lif->state))
+		return -EBUSY;
+
+	/* flap the link to force auto-negotiation */
+
+	mutex_lock(&ionic->dev_cmd_lock);
+
+	ionic_dev_cmd_port_state(&ionic->idev, IONIC_PORT_ADMIN_STATE_DOWN);
+	err = ionic_dev_cmd_wait(ionic, devcmd_timeout);
+
+	if (!err) {
+		ionic_dev_cmd_port_state(&ionic->idev, IONIC_PORT_ADMIN_STATE_UP);
+		err = ionic_dev_cmd_wait(ionic, devcmd_timeout);
+	}
+
+	mutex_unlock(&ionic->dev_cmd_lock);
+
+	return err;
+}
+
+static int ionic_flash_device(struct net_device *netdev,
+			      struct ethtool_flash *eflash)
+{
+	struct ionic_lif *lif = netdev_priv(netdev);
+
+	if (eflash->region)
+		return -EOPNOTSUPP;
+
+	return ionic_firmware_fetch_and_update(lif, eflash->data);
+}
+
+static const struct ethtool_ops ionic_ethtool_ops = {
+#ifdef ETHTOOL_COALESCE_USECS
+	.supported_coalesce_params = ETHTOOL_COALESCE_USECS |
+				     ETHTOOL_COALESCE_USE_ADAPTIVE_RX |
+				     ETHTOOL_COALESCE_USE_ADAPTIVE_TX,
+#endif
+	.get_drvinfo		= ionic_get_drvinfo,
+	.get_regs_len		= ionic_get_regs_len,
+	.get_regs		= ionic_get_regs,
+	.get_link		= ethtool_op_get_link,
+	.get_link_ksettings	= ionic_get_link_ksettings,
+	.set_link_ksettings	= ionic_set_link_ksettings,
+	.get_coalesce		= ionic_get_coalesce,
+	.set_coalesce		= ionic_set_coalesce,
+	.get_ringparam		= ionic_get_ringparam,
+	.set_ringparam		= ionic_set_ringparam,
+	.get_channels		= ionic_get_channels,
+	.set_channels		= ionic_set_channels,
+	.get_strings		= ionic_get_strings,
+	.get_ethtool_stats	= ionic_get_stats,
+	.get_sset_count		= ionic_get_sset_count,
+	.get_priv_flags		= ionic_get_priv_flags,
+	.set_priv_flags		= ionic_set_priv_flags,
+	.get_rxnfc		= ionic_get_rxnfc,
+	.get_rxfh_indir_size	= ionic_get_rxfh_indir_size,
+	.get_rxfh_key_size	= ionic_get_rxfh_key_size,
+	.get_rxfh		= ionic_get_rxfh,
+	.set_rxfh		= ionic_set_rxfh,
+	.get_tunable		= ionic_get_tunable,
+	.set_tunable		= ionic_set_tunable,
+	.get_module_info	= ionic_get_module_info,
+	.get_module_eeprom	= ionic_get_module_eeprom,
+	.get_pauseparam		= ionic_get_pauseparam,
+	.set_pauseparam		= ionic_set_pauseparam,
+#ifdef ETHTOOL_FEC_NONE
+	.get_fecparam		= ionic_get_fecparam,
+	.set_fecparam		= ionic_set_fecparam,
+#endif
+#if IS_ENABLED(CONFIG_PTP_1588_CLOCK)
+	.get_ts_info		= ionic_get_ts_info,
+#endif
+	.nway_reset		= ionic_nway_reset,
+	.flash_device	= ionic_flash_device,
+};
+
+void ionic_ethtool_set_ops(struct net_device *netdev)
+{
+	netdev->ethtool_ops = &ionic_ethtool_ops;
+}
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_ethtool.h b/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_ethtool.h
new file mode 100644
index 000000000..2c371f1f4
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_ethtool.h
@@ -0,0 +1,10 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/* Copyright(c) 2017 - 2022 Pensando Systems, Inc */
+
+#ifndef _IONIC_ETHTOOL_H_
+#define _IONIC_ETHTOOL_H_
+
+int ionic_cmb_pages_in_use(struct ionic_lif *lif);
+void ionic_ethtool_set_ops(struct net_device *netdev);
+
+#endif /* _IONIC_ETHTOOL_H_ */
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_fw.c b/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_fw.c
new file mode 100644
index 000000000..88702a98c
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_fw.c
@@ -0,0 +1,206 @@
+// SPDX-License-Identifier: GPL-2.0
+/* Copyright(c) 2020 - 2022 Pensando Systems, Inc */
+
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/errno.h>
+
+#include "ionic.h"
+#include "ionic_dev.h"
+#include "ionic_lif.h"
+
+/* The worst case wait for the install activity is about 25 minutes when
+ * installing a new CPLD, which is very seldom.  Normal is about 30-35
+ * seconds.  Since the driver can't tell if a CPLD update will happen we
+ * set the timeout for the ugly case.
+ */
+#define IONIC_FW_INSTALL_TIMEOUT	(25 * 60)
+#define IONIC_FW_ACTIVATE_TIMEOUT	30
+
+/* Number of periodic log updates during fw file download */
+#define IONIC_FW_INTERVAL_FRACTION	32
+
+static void ionic_dev_cmd_firmware_download(struct ionic_dev *idev, u64 addr,
+					    u32 offset, u32 length)
+{
+	union ionic_dev_cmd cmd = {
+		.fw_download.opcode = IONIC_CMD_FW_DOWNLOAD,
+		.fw_download.offset = cpu_to_le32(offset),
+		.fw_download.addr = cpu_to_le64(addr),
+		.fw_download.length = cpu_to_le32(length),
+	};
+
+	ionic_dev_cmd_go(idev, &cmd);
+}
+
+static void ionic_dev_cmd_firmware_install(struct ionic_dev *idev)
+{
+	union ionic_dev_cmd cmd = {
+		.fw_control.opcode = IONIC_CMD_FW_CONTROL,
+		.fw_control.oper = IONIC_FW_INSTALL_ASYNC
+	};
+
+	ionic_dev_cmd_go(idev, &cmd);
+}
+
+static void ionic_dev_cmd_firmware_install_status(struct ionic_dev *idev)
+{
+	union ionic_dev_cmd cmd = {
+		.fw_control.opcode = IONIC_CMD_FW_CONTROL,
+		.fw_control.oper = IONIC_FW_INSTALL_STATUS
+	};
+
+	ionic_dev_cmd_go(idev, &cmd);
+}
+
+static void ionic_dev_cmd_firmware_activate(struct ionic_dev *idev, u8 slot)
+{
+	union ionic_dev_cmd cmd = {
+		.fw_control.opcode = IONIC_CMD_FW_CONTROL,
+		.fw_control.oper = IONIC_FW_ACTIVATE_ASYNC,
+		.fw_control.slot = slot
+	};
+
+	ionic_dev_cmd_go(idev, &cmd);
+}
+
+static void ionic_dev_cmd_firmware_activate_status(struct ionic_dev *idev)
+{
+	union ionic_dev_cmd cmd = {
+		.fw_control.opcode = IONIC_CMD_FW_CONTROL,
+		.fw_control.oper = IONIC_FW_ACTIVATE_STATUS,
+	};
+
+	ionic_dev_cmd_go(idev, &cmd);
+}
+
+int ionic_firmware_update(struct ionic_lif *lif, const struct firmware *fw)
+{
+	struct ionic_dev *idev = &lif->ionic->idev;
+	struct net_device *netdev = lif->netdev;
+	struct ionic *ionic = lif->ionic;
+	union ionic_dev_cmd_comp comp;
+	u32 buf_sz, copy_sz, offset;
+	struct devlink *dl;
+	int next_interval;
+	int err = 0;
+	u8 fw_slot;
+
+	dl = priv_to_devlink(ionic);
+	devlink_flash_update_status_notify(dl, "Preparing to flash", NULL, 0, 0);
+
+	buf_sz = sizeof(idev->dev_cmd_regs->data);
+
+	netdev_dbg(netdev,
+		   "downloading firmware - size %d part_sz %d nparts %lu\n",
+		   (int)fw->size, buf_sz, DIV_ROUND_UP(fw->size, buf_sz));
+
+	devlink_flash_update_status_notify(dl, "Downloading", NULL, 0, fw->size);
+	offset = 0;
+	next_interval = fw->size / IONIC_FW_INTERVAL_FRACTION;
+	while (offset < fw->size) {
+		copy_sz = min_t(unsigned int, buf_sz, fw->size - offset);
+		mutex_lock(&ionic->dev_cmd_lock);
+		memcpy_toio(&idev->dev_cmd_regs->data, fw->data + offset, copy_sz);
+		ionic_dev_cmd_firmware_download(idev,
+						offsetof(union ionic_dev_cmd_regs, data),
+						offset, copy_sz);
+		err = ionic_dev_cmd_wait(ionic, devcmd_timeout);
+		mutex_unlock(&ionic->dev_cmd_lock);
+		if (err) {
+			netdev_err(netdev,
+				   "download failed offset 0x%x addr 0x%lx len 0x%x\n",
+				   offset, offsetof(union ionic_dev_cmd_regs, data),
+				   copy_sz);
+			goto err_out;
+		}
+		offset += copy_sz;
+
+		if (offset > next_interval) {
+			devlink_flash_update_status_notify(dl, "Downloading",
+							   NULL, offset, fw->size);
+			next_interval = offset + (fw->size / IONIC_FW_INTERVAL_FRACTION);
+		}
+	}
+	devlink_flash_update_status_notify(dl, "Downloading", NULL, 1, 1);
+
+	netdev_info(netdev, "installing firmware\n");
+	devlink_flash_update_status_notify(dl, "Installing", NULL, 0, 2);
+
+	mutex_lock(&ionic->dev_cmd_lock);
+	ionic_dev_cmd_firmware_install(idev);
+	err = ionic_dev_cmd_wait(ionic, devcmd_timeout);
+	ionic_dev_cmd_comp(idev, (union ionic_dev_cmd_comp *)&comp);
+	fw_slot = comp.fw_control.slot;
+	mutex_unlock(&ionic->dev_cmd_lock);
+	if (err) {
+		netdev_err(netdev, "failed to start firmware install\n");
+		goto err_out;
+	}
+
+	devlink_flash_update_status_notify(dl, "Installing", NULL, 1, 2);
+	mutex_lock(&ionic->dev_cmd_lock);
+	ionic_dev_cmd_firmware_install_status(idev);
+	err = ionic_dev_cmd_wait(ionic, IONIC_FW_INSTALL_TIMEOUT);
+	mutex_unlock(&ionic->dev_cmd_lock);
+	if (err) {
+		netdev_err(netdev, "firmware install failed\n");
+		goto err_out;
+	}
+	devlink_flash_update_status_notify(dl, "Installing", NULL, 2, 2);
+
+	netdev_info(netdev, "selecting firmware\n");
+	devlink_flash_update_status_notify(dl, "Selecting", NULL, 0, 2);
+
+	mutex_lock(&ionic->dev_cmd_lock);
+	ionic_dev_cmd_firmware_activate(idev, fw_slot);
+	err = ionic_dev_cmd_wait(ionic, devcmd_timeout);
+	mutex_unlock(&ionic->dev_cmd_lock);
+	if (err) {
+		netdev_err(netdev, "failed to start firmware select\n");
+		goto err_out;
+	}
+
+	devlink_flash_update_status_notify(dl, "Selecting", NULL, 1, 2);
+	mutex_lock(&ionic->dev_cmd_lock);
+	ionic_dev_cmd_firmware_activate_status(idev);
+	err = ionic_dev_cmd_wait(ionic, IONIC_FW_ACTIVATE_TIMEOUT);
+	mutex_unlock(&ionic->dev_cmd_lock);
+	if (err) {
+		netdev_err(netdev, "firmware select failed\n");
+		goto err_out;
+	}
+	devlink_flash_update_status_notify(dl, "Selecting", NULL, 2, 2);
+
+	netdev_info(netdev, "Firmware update completed\n");
+
+err_out:
+	if (err)
+		devlink_flash_update_status_notify(dl, "Flash failed", NULL, 0, 0);
+	return err;
+}
+
+int ionic_firmware_fetch_and_update(struct ionic_lif *lif, const char *fw_name)
+{
+	const struct firmware *fw;
+	struct devlink *dl;
+	int err;
+
+	netdev_info(lif->netdev, "Installing firmware %s\n", fw_name);
+
+	dl = priv_to_devlink(lif->ionic);
+	devlink_flash_update_begin_notify(dl);
+
+	err = request_firmware(&fw, fw_name, lif->ionic->dev);
+	if (err)
+		goto err_out;
+
+	err = ionic_firmware_update(lif, fw);
+
+err_out:
+	devlink_flash_update_end_notify(dl);
+	release_firmware(fw);
+
+	return err;
+}
+
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_lif.c b/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_lif.c
new file mode 100644
index 000000000..021cc604f
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_lif.c
@@ -0,0 +1,4368 @@
+// SPDX-License-Identifier: GPL-2.0
+/* Copyright(c) 2017 - 2022 Pensando Systems, Inc */
+
+#include <linux/netdevice.h>
+#include <linux/dynamic_debug.h>
+#include <linux/etherdevice.h>
+#include <linux/interrupt.h>
+#include <linux/pci.h>
+#include <linux/cpumask.h>
+#include <linux/crash_dump.h>
+#include <linux/vmalloc.h>
+
+#include "ionic.h"
+#include "ionic_bus.h"
+#include "ionic_dev.h"
+#include "ionic_lif.h"
+#include "ionic_txrx.h"
+#include "ionic_ethtool.h"
+#include "ionic_debugfs.h"
+
+/* queuetype support level */
+static const u8 ionic_qtype_versions[IONIC_QTYPE_MAX] = {
+	[IONIC_QTYPE_ADMINQ]  = 0,   /* 0 = Base version with CQ support */
+	[IONIC_QTYPE_NOTIFYQ] = 0,   /* 0 = Base version */
+	[IONIC_QTYPE_RXQ]     = 2,   /* 0 = Base version with CQ+SG support
+				      * 1 =       ... with EQ
+				      * 2 =       ... with CMB rings
+				      */
+	[IONIC_QTYPE_TXQ]     = 3,   /* 0 = Base version with CQ+SG support
+				      * 1 =   ... with Tx SG version 1
+				      * 2 =       ... with EQ
+				      * 3 =       ... with CMB rings
+				      */
+};
+
+static void ionic_link_status_check(struct ionic_lif *lif);
+static void ionic_lif_handle_fw_down(struct ionic_lif *lif);
+static void ionic_lif_handle_fw_up(struct ionic_lif *lif);
+
+static void ionic_txrx_deinit(struct ionic_lif *lif);
+static int ionic_txrx_init(struct ionic_lif *lif);
+static int ionic_start_queues(struct ionic_lif *lif);
+static int ionic_open(struct net_device *netdev);
+static void ionic_stop_queues(struct ionic_lif *lif);
+static int ionic_stop(struct net_device *netdev);
+static void ionic_lif_queue_identify(struct ionic_lif *lif);
+static void ionic_lif_set_netdev_info(struct ionic_lif *lif);
+
+static void ionic_dim_work(struct work_struct *work)
+{
+	struct dim *dim = container_of(work, struct dim, work);
+	struct dim_cq_moder cur_moder;
+	struct ionic_qcq *qcq;
+	u32 new_coal;
+
+	cur_moder = net_dim_get_rx_moderation(dim->mode, dim->profile_ix);
+	qcq = container_of(dim, struct ionic_qcq, dim);
+	new_coal = ionic_coal_usec_to_hw(qcq->q.lif->ionic, cur_moder.usec);
+	new_coal = new_coal ? new_coal : 1;
+
+	if (qcq->intr.dim_coal_hw != new_coal) {
+		unsigned int qi = qcq->cq.bound_q->index;
+		struct ionic_lif *lif = qcq->q.lif;
+
+		qcq->intr.dim_coal_hw = new_coal;
+
+		ionic_intr_coal_init(lif->ionic->idev.intr_ctrl,
+				     lif->rxqcqs[qi]->intr.index,
+				     qcq->intr.dim_coal_hw);
+	}
+
+	dim->state = DIM_START_MEASURE;
+}
+
+static void ionic_lif_deferred_work(struct work_struct *work)
+{
+	struct ionic_lif *lif = container_of(work, struct ionic_lif, deferred.work);
+	struct ionic_deferred *def = &lif->deferred;
+	struct ionic_deferred_work *w = NULL;
+
+	do {
+		spin_lock_bh(&def->lock);
+		if (!list_empty(&def->list)) {
+			w = list_first_entry(&def->list,
+					     struct ionic_deferred_work, list);
+			list_del(&w->list);
+		}
+		spin_unlock_bh(&def->lock);
+
+		if (!w)
+			break;
+
+		switch (w->type) {
+		case IONIC_DW_TYPE_RX_MODE:
+			ionic_lif_rx_mode(lif);
+			break;
+		case IONIC_DW_TYPE_LINK_STATUS:
+			ionic_link_status_check(lif);
+			break;
+		case IONIC_DW_TYPE_LIF_RESET:
+			if (w->fw_status) {
+				ionic_lif_handle_fw_up(lif);
+			} else {
+				ionic_lif_handle_fw_down(lif);
+
+				/* Fire off another watchdog to see
+				 * if the FW is already back rather than
+				 * waiting another whole cycle
+				 */
+				mod_timer(&lif->ionic->watchdog_timer, jiffies + 1);
+			}
+			break;
+		default:
+			break;
+		}
+		kfree(w);
+		w = NULL;
+	} while (true);
+}
+
+void ionic_lif_deferred_enqueue(struct ionic_deferred *def,
+				struct ionic_deferred_work *work)
+{
+	spin_lock_bh(&def->lock);
+	list_add_tail(&work->list, &def->list);
+	spin_unlock_bh(&def->lock);
+	schedule_work(&def->work);
+}
+
+static void ionic_link_status_check(struct ionic_lif *lif)
+{
+	struct net_device *netdev = lif->netdev;
+	u16 link_status;
+	bool link_up;
+
+	/* If we're here but the bit is not set, then another thread
+	 * got here before we did and this check is unnecessary.
+	 */
+	if (!test_bit(IONIC_LIF_F_LINK_CHECK_REQUESTED, lif->state))
+		return;
+
+	/* Don't put carrier back up if we're in a broken state */
+	if (test_bit(IONIC_LIF_F_BROKEN, lif->state)) {
+		clear_bit(IONIC_LIF_F_LINK_CHECK_REQUESTED, lif->state);
+		return;
+	}
+
+	link_status = le16_to_cpu(lif->info->status.link_status);
+	link_up = link_status == IONIC_PORT_OPER_STATUS_UP;
+
+	if (link_up) {
+		int err = 0;
+
+		if (netdev->flags & IFF_UP && netif_running(netdev)) {
+			mutex_lock(&lif->queue_lock);
+			err = ionic_start_queues(lif);
+			if (err && err != -EBUSY) {
+				netdev_err(netdev,
+					   "Failed to start queues: %d\n", err);
+				set_bit(IONIC_LIF_F_BROKEN, lif->state);
+				netif_carrier_off(netdev);
+			}
+			mutex_unlock(&lif->queue_lock);
+		}
+
+		if (!err && !netif_carrier_ok(netdev)) {
+			netdev_info(netdev, "Link up - %d Gbps\n",
+				    le32_to_cpu(lif->info->status.link_speed) / 1000);
+			netif_carrier_on(netdev);
+		}
+	} else {
+		if (netif_carrier_ok(netdev)) {
+			netdev_info(netdev, "Link down\n");
+			netif_carrier_off(netdev);
+		}
+
+		if (netdev->flags & IFF_UP && netif_running(netdev)) {
+			mutex_lock(&lif->queue_lock);
+			ionic_stop_queues(lif);
+			mutex_unlock(&lif->queue_lock);
+		}
+	}
+
+	clear_bit(IONIC_LIF_F_LINK_CHECK_REQUESTED, lif->state);
+}
+
+void ionic_link_status_check_request(struct ionic_lif *lif, bool can_sleep)
+{
+	struct ionic_deferred_work *work;
+
+	/* we only need one request outstanding at a time */
+	if (test_and_set_bit(IONIC_LIF_F_LINK_CHECK_REQUESTED, lif->state))
+		return;
+
+	if (!can_sleep) {
+		work = kzalloc(sizeof(*work), GFP_ATOMIC);
+		if (!work) {
+			clear_bit(IONIC_LIF_F_LINK_CHECK_REQUESTED, lif->state);
+			return;
+		}
+
+		work->type = IONIC_DW_TYPE_LINK_STATUS;
+		ionic_lif_deferred_enqueue(&lif->deferred, work);
+	} else {
+		ionic_link_status_check(lif);
+	}
+}
+
+static void ionic_napi_deadline(struct timer_list *timer)
+{
+	struct ionic_qcq *qcq = container_of(timer, struct ionic_qcq, napi_deadline);
+
+	napi_schedule(&qcq->napi);
+}
+
+static irqreturn_t ionic_napi_isr(int irq, void *data)
+{
+	struct napi_struct *napi = data;
+
+	napi_schedule_irqoff(napi);
+
+	return IRQ_HANDLED;
+}
+
+static int ionic_request_napi_irq(struct ionic_lif *lif, struct ionic_qcq *qcq)
+{
+	struct ionic_intr_info *intr = &qcq->intr;
+	struct device *dev = lif->ionic->dev;
+	struct ionic_queue *q = &qcq->q;
+	const char *name;
+
+	if (lif->registered)
+		name = lif->netdev->name;
+	else
+		name = dev_name(dev);
+
+	snprintf(intr->name, sizeof(intr->name),
+		 "%s-%s-%s", IONIC_DRV_NAME, name, q->name);
+
+	return devm_request_irq(dev, intr->vector, ionic_napi_isr,
+				0, intr->name, &qcq->napi);
+}
+
+int ionic_intr_alloc(struct ionic *ionic, struct ionic_intr_info *intr)
+{
+	int index;
+
+	index = find_first_zero_bit(ionic->intrs, ionic->nintrs);
+	if (index == ionic->nintrs) {
+		dev_warn(ionic->dev, "%s: no intr, index=%d nintrs=%d\n",
+			 __func__, index, ionic->nintrs);
+		return -ENOSPC;
+	}
+
+	set_bit(index, ionic->intrs);
+	ionic_intr_init(&ionic->idev, intr, index);
+
+	return 0;
+}
+
+void ionic_intr_free(struct ionic *ionic, int index)
+{
+	if (index != IONIC_INTR_INDEX_NOT_ASSIGNED && index < ionic->nintrs)
+		clear_bit(index, ionic->intrs);
+}
+
+static int ionic_qcq_enable(struct ionic_qcq *qcq)
+{
+	struct ionic_queue *q = &qcq->q;
+	struct ionic_lif *lif = q->lif;
+	struct ionic_dev *idev;
+	struct device *dev;
+
+	struct ionic_admin_ctx ctx = {
+		.work = COMPLETION_INITIALIZER_ONSTACK(ctx.work),
+		.cmd.q_control = {
+			.opcode = IONIC_CMD_Q_CONTROL,
+			.lif_index = cpu_to_le16(lif->index),
+			.type = q->type,
+			.index = cpu_to_le32(q->index),
+			.oper = IONIC_Q_ENABLE,
+		},
+	};
+	int ret;
+
+	idev = &lif->ionic->idev;
+	dev = lif->ionic->dev;
+
+	dev_dbg(dev, "q_enable.index %d q_enable.qtype %d\n",
+		ctx.cmd.q_control.index, ctx.cmd.q_control.type);
+
+	if (qcq->flags & IONIC_QCQ_F_INTR)
+		ionic_intr_clean(idev->intr_ctrl, qcq->intr.index);
+
+	ret = ionic_adminq_post_wait(lif, &ctx);
+	if (ret)
+		return ret;
+
+	if (qcq->napi.poll)
+		napi_enable(&qcq->napi);
+
+	if (lif->ionic->neth_eqs) {
+		qcq->armed = true;
+		ionic_dbell_ring(lif->kern_dbpage,
+				 qcq->q.hw_type,
+				 IONIC_DBELL_RING_1 |
+				 IONIC_DBELL_QID(qcq->q.hw_index) |
+				 qcq->cq.tail_idx);
+	} else if (qcq->flags & IONIC_QCQ_F_INTR) {
+		irq_set_affinity_hint(qcq->intr.vector,
+				      &qcq->intr.affinity_mask);
+		ionic_intr_mask(idev->intr_ctrl, qcq->intr.index,
+				IONIC_INTR_MASK_CLEAR);
+	}
+
+	return 0;
+}
+
+static int ionic_qcq_disable(struct ionic_lif *lif, struct ionic_qcq *qcq, int fw_err)
+{
+	struct ionic_queue *q;
+
+	struct ionic_admin_ctx ctx = {
+		.work = COMPLETION_INITIALIZER_ONSTACK(ctx.work),
+		.cmd.q_control = {
+			.opcode = IONIC_CMD_Q_CONTROL,
+			.oper = IONIC_Q_DISABLE,
+		},
+	};
+
+	if (!qcq) {
+		netdev_err(lif->netdev, "%s: bad qcq\n", __func__);
+		return -ENXIO;
+	}
+
+	q = &qcq->q;
+
+	if (qcq->napi.poll) {
+		napi_disable(&qcq->napi);
+		del_timer_sync(&qcq->napi_deadline);
+	}
+
+	if (qcq->flags & IONIC_QCQ_F_INTR) {
+		struct ionic_dev *idev = &lif->ionic->idev;
+
+		cancel_work_sync(&qcq->dim.work);
+		ionic_intr_mask(idev->intr_ctrl, qcq->intr.index,
+				IONIC_INTR_MASK_SET);
+		synchronize_irq(qcq->intr.vector);
+		irq_set_affinity_hint(qcq->intr.vector, NULL);
+	}
+
+	/* If there was a previous fw communcation error, don't bother with
+	 * sending the adminq command and just return the same error value.
+	 */
+	if (fw_err == -ETIMEDOUT || fw_err == -ENXIO)
+		return fw_err;
+
+	ctx.cmd.q_control.lif_index = cpu_to_le16(lif->index);
+	ctx.cmd.q_control.type = q->type;
+	ctx.cmd.q_control.index = cpu_to_le32(q->index);
+	dev_dbg(lif->ionic->dev, "q_disable.index %d q_disable.qtype %d\n",
+		ctx.cmd.q_control.index, ctx.cmd.q_control.type);
+
+	return ionic_adminq_post_wait(lif, &ctx);
+}
+
+static void ionic_lif_qcq_deinit(struct ionic_lif *lif, struct ionic_qcq *qcq)
+{
+	struct ionic_dev *idev = &lif->ionic->idev;
+
+	if (!qcq)
+		return;
+
+	if (!(qcq->flags & IONIC_QCQ_F_INITED))
+		return;
+
+	if (qcq->flags & IONIC_QCQ_F_INTR) {
+		ionic_intr_mask(idev->intr_ctrl, qcq->intr.index,
+				IONIC_INTR_MASK_SET);
+		netif_napi_del(&qcq->napi);
+	}
+
+	qcq->flags &= ~IONIC_QCQ_F_INITED;
+}
+
+static void ionic_qcq_intr_free(struct ionic_lif *lif, struct ionic_qcq *qcq)
+{
+	if (!(qcq->flags & IONIC_QCQ_F_INTR) || qcq->intr.vector == 0)
+		return;
+
+	irq_set_affinity_hint(qcq->intr.vector, NULL);
+	devm_free_irq(lif->ionic->dev, qcq->intr.vector, &qcq->napi);
+	qcq->intr.vector = 0;
+	ionic_intr_free(lif->ionic, qcq->intr.index);
+	qcq->intr.index = IONIC_INTR_INDEX_NOT_ASSIGNED;
+}
+
+static void ionic_qcq_free(struct ionic_lif *lif, struct ionic_qcq *qcq)
+{
+	struct device *dev = lif->ionic->dev;
+
+	if (!qcq)
+		return;
+
+	ionic_debugfs_del_qcq(qcq);
+
+	if (qcq->q_base) {
+		dma_free_coherent(dev, qcq->q_size, qcq->q_base, qcq->q_base_pa);
+		qcq->q_base = NULL;
+		qcq->q_base_pa = 0;
+	}
+
+	if (qcq->cmb_q_base) {
+		iounmap(qcq->cmb_q_base);
+		ionic_put_cmb(lif, qcq->cmb_pgid, qcq->cmb_order);
+		qcq->cmb_pgid = 0;
+		qcq->cmb_order = 0;
+		qcq->cmb_q_base = NULL;
+		qcq->cmb_q_base_pa = 0;
+	}
+
+	if (qcq->cq_base) {
+		dma_free_coherent(dev, qcq->cq_size, qcq->cq_base, qcq->cq_base_pa);
+		qcq->cq_base = NULL;
+		qcq->cq_base_pa = 0;
+	}
+
+	if (qcq->sg_base) {
+		dma_free_coherent(dev, qcq->sg_size, qcq->sg_base, qcq->sg_base_pa);
+		qcq->sg_base = NULL;
+		qcq->sg_base_pa = 0;
+	}
+
+	ionic_qcq_intr_free(lif, qcq);
+
+	if (qcq->cq.info) {
+		vfree(qcq->cq.info);
+		qcq->cq.info = NULL;
+	}
+	if (qcq->q.info) {
+		vfree(qcq->q.info);
+		qcq->q.info = NULL;
+	}
+}
+
+static void ionic_qcqs_free(struct ionic_lif *lif)
+{
+	struct device *dev = lif->ionic->dev;
+	struct ionic_qcq *adminqcq;
+	unsigned long irqflags;
+
+	if (lif->notifyqcq) {
+		ionic_qcq_free(lif, lif->notifyqcq);
+		devm_kfree(dev, lif->notifyqcq);
+		lif->notifyqcq = NULL;
+	}
+
+	if (lif->adminqcq) {
+		spin_lock_irqsave(&lif->adminq_lock, irqflags);
+		adminqcq = READ_ONCE(lif->adminqcq);
+		lif->adminqcq = NULL;
+		spin_unlock_irqrestore(&lif->adminq_lock, irqflags);
+		if (adminqcq) {
+			ionic_qcq_free(lif, adminqcq);
+			devm_kfree(dev, adminqcq);
+		}
+	}
+
+	if (lif->rxqcqs) {
+		devm_kfree(dev, lif->rxqstats);
+		lif->rxqstats = NULL;
+		devm_kfree(dev, lif->rxqcqs);
+		lif->rxqcqs = NULL;
+	}
+
+	if (lif->txqcqs) {
+		devm_kfree(dev, lif->txqstats);
+		lif->txqstats = NULL;
+		devm_kfree(dev, lif->txqcqs);
+		lif->txqcqs = NULL;
+	}
+}
+
+static void ionic_link_qcq_interrupts(struct ionic_qcq *src_qcq,
+				      struct ionic_qcq *n_qcq)
+{
+	if (WARN_ON(n_qcq->flags & IONIC_QCQ_F_INTR)) {
+		ionic_intr_free(n_qcq->cq.lif->ionic, n_qcq->intr.index);
+		n_qcq->flags &= ~IONIC_QCQ_F_INTR;
+	}
+
+	n_qcq->intr.vector = src_qcq->intr.vector;
+	n_qcq->intr.index = src_qcq->intr.index;
+	n_qcq->napi_qcq = src_qcq->napi_qcq;
+}
+
+static int ionic_alloc_qcq_interrupt(struct ionic_lif *lif, struct ionic_qcq *qcq)
+{
+	unsigned int cpu;
+	int err;
+
+	if (!(qcq->flags & IONIC_QCQ_F_INTR)) {
+		qcq->intr.index = IONIC_INTR_INDEX_NOT_ASSIGNED;
+		return 0;
+	}
+
+	err = ionic_intr_alloc(lif->ionic, &qcq->intr);
+	if (err) {
+		netdev_warn(lif->netdev, "no intr for %s: %d\n",
+			    qcq->q.name, err);
+		goto err_out;
+	}
+
+	err = ionic_bus_get_irq(lif->ionic, qcq->intr.index);
+	if (err < 0) {
+		netdev_warn(lif->netdev, "no vector for %s: %d\n",
+			    qcq->q.name, err);
+		goto err_out_free_intr;
+	}
+	qcq->intr.vector = err;
+	ionic_intr_mask_assert(lif->ionic->idev.intr_ctrl, qcq->intr.index,
+			       IONIC_INTR_MASK_SET);
+
+	err = ionic_request_napi_irq(lif, qcq);
+	if (err) {
+		netdev_warn(lif->netdev, "irq request failed %d\n", err);
+		goto err_out_free_intr;
+	}
+
+	if (affinity_mask_override) {
+		cpumask_copy(&qcq->intr.affinity_mask, cpu_none_mask);
+
+		netdev_dbg(lif->netdev, "%s: setting irq affinity_mask 0x%lx\n",
+				qcq->q.name, affinity_mask_override);
+		for (cpu = 0; cpu < num_present_cpus(); cpu++) {
+			if (BIT(cpu) & affinity_mask_override)
+				cpumask_set_cpu(cpu, &qcq->intr.affinity_mask);
+		}
+
+		/* set the affinity */
+		irq_set_affinity_hint(qcq->intr.vector, &qcq->intr.affinity_mask);
+
+	} else {
+		netdev_dbg(lif->netdev, "%s: using default irq affinity", qcq->q.name);
+		/* try to get the irq on the local numa node first */
+		qcq->intr.cpu = cpumask_local_spread(qcq->intr.index,
+				dev_to_node(lif->ionic->dev));
+		if (qcq->intr.cpu != -1)
+			cpumask_set_cpu(qcq->intr.cpu,
+					&qcq->intr.affinity_mask);
+	}
+
+	netdev_dbg(lif->netdev, "%s: Interrupt index %d\n", qcq->q.name, qcq->intr.index);
+	return 0;
+
+err_out_free_intr:
+	ionic_intr_free(lif->ionic, qcq->intr.index);
+err_out:
+	return err;
+}
+
+static int ionic_qcq_alloc(struct ionic_lif *lif, unsigned int type,
+			   unsigned int index,
+			   const char *name, unsigned int flags,
+			   unsigned int num_descs, unsigned int desc_size,
+			   unsigned int cq_desc_size,
+			   unsigned int sg_desc_size,
+			   unsigned int pid, struct ionic_qcq **qcq)
+{
+	struct ionic_dev *idev = &lif->ionic->idev;
+	struct device *dev = lif->ionic->dev;
+	void *q_base, *cq_base, *sg_base;
+	dma_addr_t cq_base_pa = 0;
+	dma_addr_t sg_base_pa = 0;
+	dma_addr_t q_base_pa = 0;
+	struct ionic_qcq *new;
+	int err;
+
+	*qcq = NULL;
+
+	new = devm_kzalloc(dev, sizeof(*new), GFP_KERNEL);
+	if (!new) {
+		netdev_err(lif->netdev, "Cannot allocate queue structure\n");
+		err = -ENOMEM;
+		goto err_out;
+	}
+
+	new->q.dev = dev;
+	new->flags = flags;
+
+	new->q.info = vzalloc(num_descs * sizeof(*new->q.info));
+	if (!new->q.info) {
+		netdev_err(lif->netdev, "Cannot allocate queue info\n");
+		err = -ENOMEM;
+		goto err_out_free_qcq;
+	}
+
+	new->q.type = type;
+	new->q.max_sg_elems = lif->qtype_info[type].max_sg_elems;
+
+	err = ionic_q_init(lif, idev, &new->q, index, name, num_descs,
+			   desc_size, sg_desc_size, pid);
+	if (err) {
+		netdev_err(lif->netdev, "Cannot initialize queue\n");
+		goto err_out_free_q_info;
+	}
+
+	err = ionic_alloc_qcq_interrupt(lif, new);
+	if (err)
+		goto err_out;
+
+	new->cq.info = vzalloc(num_descs * sizeof(*new->cq.info));
+	if (!new->cq.info) {
+		netdev_err(lif->netdev, "Cannot allocate completion queue info\n");
+		err = -ENOMEM;
+		goto err_out_free_irq;
+	}
+
+	err = ionic_cq_init(lif, &new->cq, &new->intr, num_descs, cq_desc_size);
+	if (err) {
+		netdev_err(lif->netdev, "Cannot initialize completion queue\n");
+		goto err_out_free_cq_info;
+	}
+
+	if (flags & IONIC_QCQ_F_NOTIFYQ) {
+		/* q & cq need to be contiguous in case of notifyq */
+		new->q_size = PAGE_SIZE + ALIGN(num_descs * desc_size, PAGE_SIZE) +
+						ALIGN(num_descs * cq_desc_size, PAGE_SIZE);
+		new->q_base = dma_alloc_coherent(dev, new->q_size + new->cq_size,
+						&new->q_base_pa, GFP_KERNEL);
+		if (!new->q_base) {
+			netdev_err(lif->netdev, "Cannot allocate qcq DMA memory\n");
+			err = -ENOMEM;
+			goto err_out_free_cq_info;
+		}
+		q_base = PTR_ALIGN(new->q_base, PAGE_SIZE);
+		q_base_pa = ALIGN(new->q_base_pa, PAGE_SIZE);
+		ionic_q_map(&new->q, q_base, q_base_pa);
+
+		cq_base = PTR_ALIGN(q_base +
+			ALIGN(num_descs * desc_size, PAGE_SIZE), PAGE_SIZE);
+		cq_base_pa = ALIGN(new->q_base_pa +
+			ALIGN(num_descs * desc_size, PAGE_SIZE), PAGE_SIZE);
+		ionic_cq_map(&new->cq, cq_base, cq_base_pa);
+		ionic_cq_bind(&new->cq, &new->q);
+	} else {
+		/* regular DMA q descriptors */
+		new->q_size = PAGE_SIZE + (num_descs * desc_size);
+		new->q_base = dma_alloc_coherent(dev, new->q_size, &new->q_base_pa,
+						 GFP_KERNEL);
+		if (!new->q_base) {
+			netdev_err(lif->netdev, "Cannot allocate queue DMA memory\n");
+			err = -ENOMEM;
+			goto err_out_free_cq_info;
+		}
+		q_base = PTR_ALIGN(new->q_base, PAGE_SIZE);
+		q_base_pa = ALIGN(new->q_base_pa, PAGE_SIZE);
+		ionic_q_map(&new->q, q_base, q_base_pa);
+
+		if (flags & IONIC_QCQ_F_CMB_RINGS) {
+			/* on-chip CMB q descriptors */
+			new->cmb_q_size = num_descs * desc_size;
+			new->cmb_order = order_base_2(new->cmb_q_size / PAGE_SIZE);
+
+			err = ionic_get_cmb(lif, &new->cmb_pgid, &new->cmb_q_base_pa,
+					    new->cmb_order);
+			if (err) {
+				netdev_err(lif->netdev,
+					   "Cannot allocate queue order %d from cmb: err %d\n",
+					   new->cmb_order, err);
+				goto err_out_free_q;
+			}
+
+			new->cmb_q_base = ioremap_wc(new->cmb_q_base_pa, new->cmb_q_size);
+			if (!new->cmb_q_base) {
+				netdev_err(lif->netdev, "Cannot map queue from cmb\n");
+				ionic_put_cmb(lif, new->cmb_pgid, new->cmb_order);
+				err = -ENOMEM;
+				goto err_out_free_q;
+			}
+
+			new->cmb_q_base_pa -= idev->phy_cmb_pages;
+			ionic_q_cmb_map(&new->q, new->cmb_q_base, new->cmb_q_base_pa);
+		}
+
+		/* cq DMA descriptors */
+		new->cq_size = PAGE_SIZE + (num_descs * cq_desc_size);
+		new->cq_base = dma_alloc_coherent(dev, new->cq_size, &new->cq_base_pa,
+						  GFP_KERNEL);
+		if (!new->cq_base) {
+			netdev_err(lif->netdev, "Cannot allocate cq DMA memory\n");
+			err = -ENOMEM;
+			goto err_out_free_q;
+		}
+		cq_base = PTR_ALIGN(new->cq_base, PAGE_SIZE);
+		cq_base_pa = ALIGN(new->cq_base_pa, PAGE_SIZE);
+		ionic_cq_map(&new->cq, cq_base, cq_base_pa);
+		ionic_cq_bind(&new->cq, &new->q);
+	}
+
+	if (flags & IONIC_QCQ_F_SG) {
+		new->sg_size = PAGE_SIZE + (num_descs * sg_desc_size);
+		new->sg_base = dma_alloc_coherent(dev, new->sg_size, &new->sg_base_pa,
+						  GFP_KERNEL);
+		if (!new->sg_base) {
+			netdev_err(lif->netdev, "Cannot allocate sg DMA memory\n");
+			err = -ENOMEM;
+			goto err_out_free_cq;
+		}
+		sg_base = PTR_ALIGN(new->sg_base, PAGE_SIZE);
+		sg_base_pa = ALIGN(new->sg_base_pa, PAGE_SIZE);
+		ionic_q_sg_map(&new->q, sg_base, sg_base_pa);
+	}
+
+	INIT_WORK(&new->dim.work, ionic_dim_work);
+	new->dim.mode = DIM_CQ_PERIOD_MODE_START_FROM_EQE;
+
+	*qcq = new;
+
+	return 0;
+
+err_out_free_cq:
+	dma_free_coherent(dev, new->cq_size, new->cq_base, new->cq_base_pa);
+err_out_free_q:
+	if (new->cmb_q_base) {
+		iounmap(new->cmb_q_base);
+		ionic_put_cmb(lif, new->cmb_pgid, new->cmb_order);
+	}
+	dma_free_coherent(dev, new->q_size, new->q_base, new->q_base_pa);
+err_out_free_cq_info:
+	vfree(new->cq.info);
+err_out_free_irq:
+	if (flags & IONIC_QCQ_F_INTR) {
+		devm_free_irq(dev, new->intr.vector, &new->napi);
+		ionic_intr_free(lif->ionic, new->intr.index);
+	}
+err_out_free_q_info:
+	vfree(new->q.info);
+err_out_free_qcq:
+	devm_kfree(dev, new);
+err_out:
+	dev_err(dev, "qcq alloc of %s%d failed %d\n", name, index, err);
+	return err;
+}
+
+static int ionic_qcqs_alloc(struct ionic_lif *lif)
+{
+	struct device *dev = lif->ionic->dev;
+	unsigned int flags;
+	int err;
+
+	flags = IONIC_QCQ_F_INTR;
+	err = ionic_qcq_alloc(lif, IONIC_QTYPE_ADMINQ, 0, "admin", flags,
+			      IONIC_ADMINQ_LENGTH,
+			      sizeof(struct ionic_admin_cmd),
+			      sizeof(struct ionic_admin_comp),
+			      0, lif->kern_pid, &lif->adminqcq);
+	if (err)
+		return err;
+	ionic_debugfs_add_qcq(lif, lif->adminqcq);
+
+	if (lif->ionic->nnqs_per_lif) {
+		flags = IONIC_QCQ_F_NOTIFYQ;
+		err = ionic_qcq_alloc(lif, IONIC_QTYPE_NOTIFYQ, 0, "notifyq",
+				      flags, IONIC_NOTIFYQ_LENGTH,
+				      sizeof(struct ionic_notifyq_cmd),
+				      sizeof(union ionic_notifyq_comp),
+				      0, lif->kern_pid, &lif->notifyqcq);
+		if (err)
+			goto err_out;
+		ionic_debugfs_add_qcq(lif, lif->notifyqcq);
+
+		/* Let the notifyq ride on the adminq interrupt */
+		ionic_link_qcq_interrupts(lif->adminqcq, lif->notifyqcq);
+	}
+
+	err = -ENOMEM;
+	lif->txqcqs = devm_kcalloc(dev, lif->ionic->ntxqs_per_lif,
+				   sizeof(*lif->txqcqs), GFP_KERNEL);
+	if (!lif->txqcqs)
+		goto err_out;
+	lif->rxqcqs = devm_kcalloc(dev, lif->ionic->nrxqs_per_lif,
+				   sizeof(*lif->rxqcqs), GFP_KERNEL);
+	if (!lif->rxqcqs)
+		goto err_out;
+
+	lif->txqstats = devm_kcalloc(dev, lif->ionic->ntxqs_per_lif + 1,
+				     sizeof(*lif->txqstats), GFP_KERNEL);
+	if (!lif->txqstats)
+		goto err_out;
+	lif->rxqstats = devm_kcalloc(dev, lif->ionic->nrxqs_per_lif + 1,
+				     sizeof(*lif->rxqstats), GFP_KERNEL);
+	if (!lif->rxqstats)
+		goto err_out;
+
+	return 0;
+
+err_out:
+	ionic_qcqs_free(lif);
+	return err;
+}
+
+static inline int ionic_choose_eq(struct ionic_lif *lif, int q_index)
+{
+	unsigned int abs_q;
+
+	if (lif->index)
+		abs_q = (lif->ionic->nrxqs_per_lif + lif->index);
+	else
+		abs_q = q_index;
+
+	return abs_q % lif->ionic->neth_eqs;
+}
+
+static void ionic_qcq_sanitize(struct ionic_qcq *qcq)
+{
+	qcq->q.tail_idx = 0;
+	qcq->q.head_idx = 0;
+	qcq->cq.tail_idx = 0;
+	qcq->cq.done_color = 1;
+
+	memset(qcq->q_base, 0, qcq->q_size);
+	if (qcq->cmb_q_base)
+		memset_io(qcq->cmb_q_base, 0, qcq->cmb_q_size);
+	memset(qcq->cq_base, 0, qcq->cq_size);
+	memset(qcq->sg_base, 0, qcq->sg_size);
+}
+
+static int ionic_lif_txq_init(struct ionic_lif *lif, struct ionic_qcq *qcq)
+{
+	struct device *dev = lif->ionic->dev;
+	struct ionic_queue *q = &qcq->q;
+	struct ionic_cq *cq = &qcq->cq;
+	struct ionic_admin_ctx ctx = {
+		.work = COMPLETION_INITIALIZER_ONSTACK(ctx.work),
+		.cmd.q_init = {
+			.opcode = IONIC_CMD_Q_INIT,
+			.lif_index = cpu_to_le16(lif->index),
+			.type = q->type,
+			.ver = lif->qtype_info[q->type].version,
+			.index = cpu_to_le32(q->index),
+			.pid = cpu_to_le16(q->pid),
+			.ring_size = ilog2(q->num_descs),
+			.ring_base = cpu_to_le64(q->base_pa),
+			.cq_ring_base = cpu_to_le64(cq->base_pa),
+			.sg_ring_base = cpu_to_le64(q->sg_base_pa),
+			.features = cpu_to_le64(q->features),
+		},
+	};
+	int err;
+
+	if (lif->ionic->neth_eqs &&
+	    lif->qtype_info[q->type].features & IONIC_QIDENT_F_EQ) {
+		unsigned int eq_index = ionic_choose_eq(lif, q->index);
+
+		ctx.cmd.q_init.flags = cpu_to_le16(IONIC_QINIT_F_EQ |
+						   IONIC_QINIT_F_SG);
+		ctx.cmd.q_init.intr_index = cpu_to_le16(eq_index);
+	} else {
+		unsigned int intr_index;
+
+		intr_index = qcq->intr.index;
+
+		ctx.cmd.q_init.flags = cpu_to_le16(IONIC_QINIT_F_IRQ |
+						   IONIC_QINIT_F_SG);
+		ctx.cmd.q_init.intr_index = cpu_to_le16(intr_index);
+	}
+
+	if (qcq->flags & IONIC_QCQ_F_CMB_RINGS) {
+		ctx.cmd.q_init.flags |= cpu_to_le16(IONIC_QINIT_F_CMB);
+		ctx.cmd.q_init.ring_base = cpu_to_le64(qcq->cmb_q_base_pa);
+	}
+
+	dev_dbg(dev, "txq_init.pid %d\n", ctx.cmd.q_init.pid);
+	dev_dbg(dev, "txq_init.index %d\n", ctx.cmd.q_init.index);
+	dev_dbg(dev, "txq_init.ring_base 0x%llx\n", ctx.cmd.q_init.ring_base);
+	dev_dbg(dev, "txq_init.ring_size %d\n", ctx.cmd.q_init.ring_size);
+	dev_dbg(dev, "txq_init.cq_ring_base 0x%llx\n", ctx.cmd.q_init.cq_ring_base);
+	dev_dbg(dev, "txq_init.sg_ring_base 0x%llx\n", ctx.cmd.q_init.sg_ring_base);
+	dev_dbg(dev, "txq_init.flags 0x%x\n", ctx.cmd.q_init.flags);
+	dev_dbg(dev, "txq_init.ver %d\n", ctx.cmd.q_init.ver);
+	dev_dbg(dev, "txq_init.intr_index %d\n", ctx.cmd.q_init.intr_index);
+
+	ionic_qcq_sanitize(qcq);
+
+	err = ionic_adminq_post_wait(lif, &ctx);
+	if (err)
+		return err;
+
+	q->hw_type = ctx.comp.q_init.hw_type;
+	q->hw_index = le32_to_cpu(ctx.comp.q_init.hw_index);
+	q->dbval = IONIC_DBELL_QID(q->hw_index);
+
+	dev_dbg(dev, "txq->hw_type %d\n", q->hw_type);
+	dev_dbg(dev, "txq->hw_index %d\n", q->hw_index);
+
+	q->dbell_deadline = IONIC_TX_DOORBELL_DEADLINE;
+	q->dbell_jiffies = jiffies;
+
+	if (test_bit(IONIC_LIF_F_SPLIT_INTR, lif->state)) {
+		netif_napi_add(lif->netdev, &qcq->napi, ionic_tx_napi);
+		qcq->napi_qcq = qcq;
+		timer_setup(&qcq->napi_deadline, ionic_napi_deadline, 0);
+	}
+
+	qcq->flags |= IONIC_QCQ_F_INITED;
+
+	return 0;
+}
+
+static int ionic_lif_rxq_init(struct ionic_lif *lif, struct ionic_qcq *qcq)
+{
+	struct device *dev = lif->ionic->dev;
+	struct ionic_queue *q = &qcq->q;
+	struct ionic_cq *cq = &qcq->cq;
+	struct ionic_admin_ctx ctx = {
+		.work = COMPLETION_INITIALIZER_ONSTACK(ctx.work),
+		.cmd.q_init = {
+			.opcode = IONIC_CMD_Q_INIT,
+			.lif_index = cpu_to_le16(lif->index),
+			.type = q->type,
+			.ver = lif->qtype_info[q->type].version,
+			.index = cpu_to_le32(q->index),
+			.pid = cpu_to_le16(q->pid),
+			.ring_size = ilog2(q->num_descs),
+			.ring_base = cpu_to_le64(q->base_pa),
+			.cq_ring_base = cpu_to_le64(cq->base_pa),
+			.sg_ring_base = cpu_to_le64(q->sg_base_pa),
+			.features = cpu_to_le64(q->features),
+		},
+	};
+	int err;
+
+	if (lif->ionic->neth_eqs &&
+	    lif->qtype_info[q->type].features & IONIC_QIDENT_F_EQ) {
+		unsigned int eq_index = ionic_choose_eq(lif, q->index);
+
+		ctx.cmd.q_init.flags = cpu_to_le16(IONIC_QINIT_F_EQ |
+						   IONIC_QINIT_F_SG);
+		ctx.cmd.q_init.intr_index = cpu_to_le16(eq_index);
+	} else {
+		ctx.cmd.q_init.flags = cpu_to_le16(IONIC_QINIT_F_IRQ |
+						   IONIC_QINIT_F_SG);
+		ctx.cmd.q_init.intr_index = cpu_to_le16(cq->bound_intr->index);
+	}
+
+	if (qcq->flags & IONIC_QCQ_F_CMB_RINGS) {
+		ctx.cmd.q_init.flags |= cpu_to_le16(IONIC_QINIT_F_CMB);
+		ctx.cmd.q_init.ring_base = cpu_to_le64(qcq->cmb_q_base_pa);
+	}
+
+	dev_dbg(dev, "rxq_init.pid %d\n", ctx.cmd.q_init.pid);
+	dev_dbg(dev, "rxq_init.index %d\n", ctx.cmd.q_init.index);
+	dev_dbg(dev, "rxq_init.ring_base 0x%llx\n", ctx.cmd.q_init.ring_base);
+	dev_dbg(dev, "rxq_init.ring_size %d\n", ctx.cmd.q_init.ring_size);
+	dev_dbg(dev, "rxq_init.cq_ring_base 0x%llx\n", ctx.cmd.q_init.cq_ring_base);
+	dev_dbg(dev, "rxq_init.sg_ring_base 0x%llx\n", ctx.cmd.q_init.sg_ring_base);
+	dev_dbg(dev, "rxq_init.flags 0x%x\n", ctx.cmd.q_init.flags);
+	dev_dbg(dev, "rxq_init.ver %d\n", ctx.cmd.q_init.ver);
+	dev_dbg(dev, "rxq_init.intr_index %d\n", ctx.cmd.q_init.intr_index);
+
+	ionic_qcq_sanitize(qcq);
+
+	err = ionic_adminq_post_wait(lif, &ctx);
+	if (err)
+		return err;
+
+	q->hw_type = ctx.comp.q_init.hw_type;
+	q->hw_index = le32_to_cpu(ctx.comp.q_init.hw_index);
+	q->dbval = IONIC_DBELL_QID(q->hw_index);
+
+	dev_dbg(dev, "rxq->hw_type %d\n", q->hw_type);
+	dev_dbg(dev, "rxq->hw_index %d\n", q->hw_index);
+
+	q->dbell_deadline = IONIC_RX_MIN_DOORBELL_DEADLINE;
+	q->dbell_jiffies = jiffies;
+
+	if (test_bit(IONIC_LIF_F_SPLIT_INTR, lif->state))
+		netif_napi_add(lif->netdev, &qcq->napi, ionic_rx_napi);
+	else
+		netif_napi_add(lif->netdev, &qcq->napi, ionic_txrx_napi);
+
+	qcq->napi_qcq = qcq;
+	timer_setup(&qcq->napi_deadline, ionic_napi_deadline, 0);
+
+	qcq->flags |= IONIC_QCQ_F_INITED;
+
+	return 0;
+}
+
+int ionic_lif_create_hwstamp_txq(struct ionic_lif *lif)
+{
+	unsigned int num_desc, desc_sz, comp_sz, sg_desc_sz;
+	unsigned int txq_i, flags;
+	struct ionic_qcq *txq;
+	u64 features;
+	int err;
+
+	if (lif->hwstamp_txq)
+		return 0;
+
+	features = IONIC_Q_F_2X_CQ_DESC | IONIC_TXQ_F_HWSTAMP;
+
+	num_desc = IONIC_MIN_TXRX_DESC;
+	desc_sz = sizeof(struct ionic_txq_desc);
+	comp_sz = 2 * sizeof(struct ionic_txq_comp);
+
+	if (lif->qtype_info[IONIC_QTYPE_TXQ].version >= 1 &&
+	    lif->qtype_info[IONIC_QTYPE_TXQ].sg_desc_sz == sizeof(struct ionic_txq_sg_desc_v1))
+		sg_desc_sz = sizeof(struct ionic_txq_sg_desc_v1);
+	else
+		sg_desc_sz = sizeof(struct ionic_txq_sg_desc);
+
+	txq_i = lif->ionic->ntxqs_per_lif;
+	flags = IONIC_QCQ_F_TX_STATS | IONIC_QCQ_F_SG;
+
+	err = ionic_qcq_alloc(lif, IONIC_QTYPE_TXQ, txq_i, "hwstamp_tx", flags,
+			      num_desc, desc_sz, comp_sz, sg_desc_sz,
+			      lif->kern_pid, &txq);
+	if (err)
+		goto err_qcq_alloc;
+
+	txq->q.features = features;
+
+	ionic_link_qcq_interrupts(lif->adminqcq, txq);
+	ionic_debugfs_add_qcq(lif, txq);
+
+	lif->hwstamp_txq = txq;
+
+	if (netif_running(lif->netdev)) {
+		err = ionic_lif_txq_init(lif, txq);
+		if (err)
+			goto err_qcq_init;
+
+		if (test_bit(IONIC_LIF_F_UP, lif->state)) {
+			err = ionic_qcq_enable(txq);
+			if (err)
+				goto err_qcq_enable;
+		}
+	}
+
+	return 0;
+
+err_qcq_enable:
+	ionic_lif_qcq_deinit(lif, txq);
+err_qcq_init:
+	lif->hwstamp_txq = NULL;
+	ionic_debugfs_del_qcq(txq);
+	ionic_qcq_free(lif, txq);
+	devm_kfree(lif->ionic->dev, txq);
+err_qcq_alloc:
+	return err;
+}
+
+int ionic_lif_create_hwstamp_rxq(struct ionic_lif *lif)
+{
+	unsigned int num_desc, desc_sz, comp_sz, sg_desc_sz;
+	unsigned int rxq_i, flags;
+	struct ionic_qcq *rxq;
+	u64 features;
+	int err;
+
+	if (lif->hwstamp_rxq)
+		return 0;
+
+	features = IONIC_Q_F_2X_CQ_DESC | IONIC_RXQ_F_HWSTAMP;
+
+	num_desc = IONIC_MIN_TXRX_DESC;
+	desc_sz = sizeof(struct ionic_rxq_desc);
+	comp_sz = 2 * sizeof(struct ionic_rxq_comp);
+	sg_desc_sz = sizeof(struct ionic_rxq_sg_desc);
+
+	rxq_i = lif->ionic->nrxqs_per_lif;
+	flags = IONIC_QCQ_F_RX_STATS | IONIC_QCQ_F_SG;
+
+	err = ionic_qcq_alloc(lif, IONIC_QTYPE_RXQ, rxq_i, "hwstamp_rx", flags,
+			      num_desc, desc_sz, comp_sz, sg_desc_sz,
+			      lif->kern_pid, &rxq);
+	if (err)
+		goto err_qcq_alloc;
+
+	rxq->q.features = features;
+
+	ionic_link_qcq_interrupts(lif->adminqcq, rxq);
+	ionic_debugfs_add_qcq(lif, rxq);
+
+	lif->hwstamp_rxq = rxq;
+
+	if (netif_running(lif->netdev)) {
+		err = ionic_lif_rxq_init(lif, rxq);
+		if (err)
+			goto err_qcq_init;
+
+		if (test_bit(IONIC_LIF_F_UP, lif->state)) {
+			ionic_rx_fill(&rxq->q);
+			err = ionic_qcq_enable(rxq);
+			if (err)
+				goto err_qcq_enable;
+		}
+	}
+
+	return 0;
+
+err_qcq_enable:
+	ionic_lif_qcq_deinit(lif, rxq);
+err_qcq_init:
+	lif->hwstamp_rxq = NULL;
+	ionic_debugfs_del_qcq(rxq);
+	ionic_qcq_free(lif, rxq);
+	devm_kfree(lif->ionic->dev, rxq);
+err_qcq_alloc:
+	return err;
+}
+
+int ionic_lif_config_hwstamp_rxq_all(struct ionic_lif *lif, bool rx_all)
+{
+	struct ionic_queue_params qparam;
+
+	ionic_init_queue_params(lif, &qparam);
+
+	if (rx_all)
+		qparam.rxq_features = IONIC_Q_F_2X_CQ_DESC | IONIC_RXQ_F_HWSTAMP;
+	else
+		qparam.rxq_features = 0;
+
+	/* if we're not running, just set the values and return */
+	if (!netif_running(lif->netdev)) {
+		lif->rxq_features = qparam.rxq_features;
+		return 0;
+	}
+
+	return ionic_reconfigure_queues(lif, &qparam);
+}
+
+int ionic_lif_set_hwstamp_txmode(struct ionic_lif *lif, u16 txstamp_mode)
+{
+	struct ionic_admin_ctx ctx = {
+		.work = COMPLETION_INITIALIZER_ONSTACK(ctx.work),
+		.cmd.lif_setattr = {
+			.opcode = IONIC_CMD_LIF_SETATTR,
+			.index = cpu_to_le16(lif->index),
+			.attr = IONIC_LIF_ATTR_TXSTAMP,
+			.txstamp_mode = cpu_to_le16(txstamp_mode),
+		},
+	};
+
+	return ionic_adminq_post_wait(lif, &ctx);
+}
+
+static void ionic_lif_del_hwstamp_rxfilt(struct ionic_lif *lif)
+{
+	struct ionic_admin_ctx ctx = {
+		.work = COMPLETION_INITIALIZER_ONSTACK(ctx.work),
+		.cmd.rx_filter_del = {
+			.opcode = IONIC_CMD_RX_FILTER_DEL,
+			.lif_index = cpu_to_le16(lif->index),
+		},
+	};
+	struct ionic_rx_filter *f;
+	u32 filter_id;
+	int err;
+
+	spin_lock_bh(&lif->rx_filters.lock);
+
+	f = ionic_rx_filter_rxsteer(lif);
+	if (!f) {
+		spin_unlock_bh(&lif->rx_filters.lock);
+		return;
+	}
+
+	filter_id = f->filter_id;
+	ionic_rx_filter_free(lif, f);
+
+	spin_unlock_bh(&lif->rx_filters.lock);
+
+	netdev_dbg(lif->netdev, "rx_filter del RXSTEER (id %d)\n", filter_id);
+
+	ctx.cmd.rx_filter_del.filter_id = cpu_to_le32(filter_id);
+
+	err = ionic_adminq_post_wait(lif, &ctx);
+	if (err && err != -EEXIST)
+		netdev_dbg(lif->netdev, "failed to delete rx_filter RXSTEER (id %d)\n", filter_id);
+}
+
+static int ionic_lif_add_hwstamp_rxfilt(struct ionic_lif *lif, u64 pkt_class)
+{
+	struct ionic_admin_ctx ctx = {
+		.work = COMPLETION_INITIALIZER_ONSTACK(ctx.work),
+		.cmd.rx_filter_add = {
+			.opcode = IONIC_CMD_RX_FILTER_ADD,
+			.lif_index = cpu_to_le16(lif->index),
+			.match = cpu_to_le16(IONIC_RX_FILTER_STEER_PKTCLASS),
+			.pkt_class = cpu_to_le64(pkt_class),
+		},
+	};
+	u8 qtype;
+	u32 qid;
+	int err;
+
+	if (!lif->hwstamp_rxq)
+		return -EINVAL;
+
+	qtype = lif->hwstamp_rxq->q.type;
+	ctx.cmd.rx_filter_add.qtype = qtype;
+
+	qid = lif->hwstamp_rxq->q.index;
+	ctx.cmd.rx_filter_add.qid = cpu_to_le32(qid);
+
+	netdev_dbg(lif->netdev, "rx_filter add RXSTEER\n");
+	err = ionic_adminq_post_wait(lif, &ctx);
+	if (err && err != -EEXIST)
+		return err;
+
+	spin_lock_bh(&lif->rx_filters.lock);
+	err = ionic_rx_filter_save(lif, 0, qid, 0, &ctx, IONIC_FILTER_STATE_SYNCED);
+	spin_unlock_bh(&lif->rx_filters.lock);
+
+	return err;
+}
+
+int ionic_lif_set_hwstamp_rxfilt(struct ionic_lif *lif, u64 pkt_class)
+{
+	ionic_lif_del_hwstamp_rxfilt(lif);
+
+	if (!pkt_class)
+		return 0;
+
+	return ionic_lif_add_hwstamp_rxfilt(lif, pkt_class);
+}
+
+static bool ionic_notifyq_service(struct ionic_cq *cq,
+				  struct ionic_cq_info *cq_info)
+{
+	union ionic_notifyq_comp *comp = cq_info->cq_desc;
+	struct ionic_deferred_work *work;
+	struct net_device *netdev;
+	struct ionic_queue *q;
+	struct ionic_lif *lif;
+	u64 eid;
+
+	q = cq->bound_q;
+	lif = q->info[0].cb_arg;
+	netdev = lif->netdev;
+	eid = le64_to_cpu(comp->event.eid);
+
+	/* Have we run out of new completions to process? */
+	if ((s64)(eid - lif->last_eid) <= 0)
+		return false;
+
+	/* Have we missed any events? */
+	if (lif->last_eid && eid != lif->last_eid + 1)
+		netdev_warn(netdev, "Notifyq missed events, eid=%lld, expected=%lld\n",
+			    eid, lif->last_eid + 1);
+
+	lif->last_eid = eid;
+
+	dev_dbg(lif->ionic->dev, "notifyq event:\n");
+	dynamic_hex_dump("event ", DUMP_PREFIX_OFFSET, 16, 1,
+			 comp, sizeof(*comp), true);
+
+	switch (le16_to_cpu(comp->event.ecode)) {
+	case IONIC_EVENT_LINK_CHANGE:
+		ionic_link_status_check_request(lif, CAN_NOT_SLEEP);
+		break;
+	case IONIC_EVENT_RESET:
+		if (lif->ionic->idev.fw_status_ready &&
+		    !test_bit(IONIC_LIF_F_FW_RESET, lif->state) &&
+		    !test_and_set_bit(IONIC_LIF_F_FW_STOPPING, lif->state)) {
+			work = kzalloc(sizeof(*work), GFP_ATOMIC);
+			if (!work) {
+				netdev_err(lif->netdev, "Reset event dropped\n");
+				clear_bit(IONIC_LIF_F_FW_STOPPING, lif->state);
+			} else {
+				work->type = IONIC_DW_TYPE_LIF_RESET;
+				ionic_lif_deferred_enqueue(&lif->deferred, work);
+			}
+		}
+		break;
+	case IONIC_EVENT_HEARTBEAT:
+		netdev_info(netdev, "Notifyq IONIC_EVENT_HEARTBEAT eid=%lld\n",
+			    eid);
+		break;
+	case IONIC_EVENT_LOG:
+		netdev_info(netdev, "Notifyq IONIC_EVENT_LOG eid=%lld\n", eid);
+		print_hex_dump(KERN_INFO, "notifyq ", DUMP_PREFIX_OFFSET, 16, 1,
+			       comp->log.data, sizeof(comp->log.data), true);
+		break;
+	case IONIC_EVENT_XCVR:
+		netdev_info(netdev, "Notifyq IONIC_EVENT_XCVR eid=%lld\n",
+			    eid);
+		break;
+	default:
+		netdev_warn(netdev, "Notifyq event ecode=%d eid=%lld\n",
+			    comp->event.ecode, eid);
+		break;
+	}
+
+	return true;
+}
+
+static bool ionic_adminq_service(struct ionic_cq *cq,
+				 struct ionic_cq_info *cq_info)
+{
+	struct ionic_admin_comp *comp = cq_info->cq_desc;
+
+	if (!color_match(comp->color, cq->done_color))
+		return false;
+
+	ionic_q_service(cq->bound_q, cq_info, le16_to_cpu(comp->comp_index));
+
+	return true;
+}
+
+static int ionic_adminq_napi(struct napi_struct *napi, int budget)
+{
+	struct ionic_intr_info *intr = napi_to_cq(napi)->bound_intr;
+	struct ionic_lif *lif = napi_to_cq(napi)->lif;
+	struct ionic_dev *idev = &lif->ionic->idev;
+	unsigned long irqflags;
+	unsigned int flags = 0;
+	bool resched = false;
+	int rx_work = 0;
+	int tx_work = 0;
+	int n_work = 0;
+	int a_work = 0;
+	int work_done;
+	int credits;
+
+	if (lif->notifyqcq && lif->notifyqcq->flags & IONIC_QCQ_F_INITED)
+		n_work = ionic_cq_service(&lif->notifyqcq->cq, budget,
+					  ionic_notifyq_service, NULL, NULL);
+
+	spin_lock_irqsave(&lif->adminq_lock, irqflags);
+	if (lif->adminqcq && lif->adminqcq->flags & IONIC_QCQ_F_INITED)
+		a_work = ionic_cq_service(&lif->adminqcq->cq, budget,
+					  ionic_adminq_service, NULL, NULL);
+	spin_unlock_irqrestore(&lif->adminq_lock, irqflags);
+
+	if (lif->hwstamp_rxq)
+		rx_work = ionic_cq_service(&lif->hwstamp_rxq->cq, budget,
+					   ionic_rx_service, NULL, NULL);
+
+	if (lif->hwstamp_txq)
+		tx_work = ionic_cq_service(&lif->hwstamp_txq->cq, budget,
+					   ionic_tx_service, NULL, NULL);
+
+	work_done = max(max(n_work, a_work), max(rx_work, tx_work));
+	if (work_done < budget && napi_complete_done(napi, work_done)) {
+		flags |= IONIC_INTR_CRED_UNMASK;
+		intr->rearm_count++;
+	}
+
+	if (work_done || flags) {
+		flags |= IONIC_INTR_CRED_RESET_COALESCE;
+		credits = n_work + a_work + rx_work + tx_work;
+		ionic_intr_credits(idev->intr_ctrl, intr->index, credits, flags);
+	}
+
+	if (!a_work && ionic_adminq_poke_doorbell(&lif->adminqcq->q))
+		resched = true;
+	if (lif->hwstamp_rxq && !rx_work && ionic_rxq_poke_doorbell(&lif->hwstamp_rxq->q))
+		resched = true;
+	if (lif->hwstamp_txq && !tx_work && ionic_txq_poke_doorbell(&lif->hwstamp_txq->q))
+		resched = true;
+	if (resched)
+		mod_timer(&lif->adminqcq->napi_deadline,
+			  jiffies + IONIC_NAPI_DEADLINE);
+
+	return work_done;
+}
+
+#ifdef HAVE_VOID_NDO_GET_STATS64
+void ionic_get_stats64(struct net_device *netdev,
+		       struct rtnl_link_stats64 *ns)
+#else
+struct rtnl_link_stats64 *ionic_get_stats64(struct net_device *netdev,
+					    struct rtnl_link_stats64 *ns)
+#endif
+{
+	struct ionic_lif *lif = netdev_priv(netdev);
+	struct ionic_lif_stats *ls;
+
+	memset(ns, 0, sizeof(*ns));
+	ls = &lif->info->stats;
+
+	ns->rx_packets = le64_to_cpu(ls->rx_ucast_packets) +
+			 le64_to_cpu(ls->rx_mcast_packets) +
+			 le64_to_cpu(ls->rx_bcast_packets);
+
+	ns->tx_packets = le64_to_cpu(ls->tx_ucast_packets) +
+			 le64_to_cpu(ls->tx_mcast_packets) +
+			 le64_to_cpu(ls->tx_bcast_packets);
+
+	ns->rx_bytes = le64_to_cpu(ls->rx_ucast_bytes) +
+		       le64_to_cpu(ls->rx_mcast_bytes) +
+		       le64_to_cpu(ls->rx_bcast_bytes);
+
+	ns->tx_bytes = le64_to_cpu(ls->tx_ucast_bytes) +
+		       le64_to_cpu(ls->tx_mcast_bytes) +
+		       le64_to_cpu(ls->tx_bcast_bytes);
+
+	ns->rx_dropped = le64_to_cpu(ls->rx_ucast_drop_packets) +
+			 le64_to_cpu(ls->rx_mcast_drop_packets) +
+			 le64_to_cpu(ls->rx_bcast_drop_packets);
+
+	ns->tx_dropped = le64_to_cpu(ls->tx_ucast_drop_packets) +
+			 le64_to_cpu(ls->tx_mcast_drop_packets) +
+			 le64_to_cpu(ls->tx_bcast_drop_packets);
+
+	ns->multicast = le64_to_cpu(ls->rx_mcast_packets);
+
+	ns->rx_over_errors = le64_to_cpu(ls->rx_queue_empty);
+
+	ns->rx_missed_errors = le64_to_cpu(ls->rx_dma_error) +
+			       le64_to_cpu(ls->rx_queue_disabled) +
+			       le64_to_cpu(ls->rx_desc_fetch_error) +
+			       le64_to_cpu(ls->rx_desc_data_error);
+
+	ns->tx_aborted_errors = le64_to_cpu(ls->tx_dma_error) +
+				le64_to_cpu(ls->tx_queue_disabled) +
+				le64_to_cpu(ls->tx_desc_fetch_error) +
+				le64_to_cpu(ls->tx_desc_data_error);
+
+	ns->rx_errors = ns->rx_over_errors +
+			ns->rx_missed_errors;
+
+	ns->tx_errors = ns->tx_aborted_errors;
+
+#ifndef HAVE_VOID_NDO_GET_STATS64
+	return ns;
+#endif
+}
+
+static int ionic_addr_add(struct net_device *netdev, const u8 *addr)
+{
+	return ionic_lif_list_addr(netdev_priv(netdev), addr, ADD_ADDR);
+}
+
+static int ionic_addr_del(struct net_device *netdev, const u8 *addr)
+{
+	/* Don't delete our own address from the uc list */
+	if (ether_addr_equal(addr, netdev->dev_addr))
+		return 0;
+
+	return ionic_lif_list_addr(netdev_priv(netdev), addr, DEL_ADDR);
+}
+
+void ionic_lif_rx_mode(struct ionic_lif *lif)
+{
+	struct net_device *netdev = lif->netdev;
+	unsigned int nfilters;
+	unsigned int nd_flags;
+	char buf[128];
+	u16 rx_mode;
+	int i;
+#define REMAIN(__x) (sizeof(buf) - (__x))
+
+	mutex_lock(&lif->config_lock);
+
+	/* grab the flags once for local use */
+	nd_flags = netdev->flags;
+
+	rx_mode = IONIC_RX_MODE_F_UNICAST;
+	rx_mode |= (nd_flags & IFF_MULTICAST) ? IONIC_RX_MODE_F_MULTICAST : 0;
+	rx_mode |= (nd_flags & IFF_BROADCAST) ? IONIC_RX_MODE_F_BROADCAST : 0;
+	rx_mode |= (nd_flags & IFF_PROMISC) ? IONIC_RX_MODE_F_PROMISC : 0;
+	rx_mode |= (nd_flags & IFF_ALLMULTI) ? IONIC_RX_MODE_F_ALLMULTI : 0;
+
+	if (test_bit(IONIC_LIF_F_RDMA_SNIFFER, lif->state))
+		rx_mode |= IONIC_RX_MODE_F_RDMA_SNIFFER;
+
+	/* sync the filters */
+	ionic_rx_filter_sync(lif);
+
+	/* check for overflow state
+	 *    if so, we track that we overflowed and enable NIC PROMISC
+	 *    else if the overflow is set and not needed
+	 *       we remove our overflow flag and check the netdev flags
+	 *       to see if we can disable NIC PROMISC
+	 */
+	nfilters = le32_to_cpu(lif->identity->eth.max_ucast_filters);
+
+	if (((lif->nucast + lif->nmcast) >= nfilters) ||
+	    (lif->max_vlans && lif->nvlans >= lif->max_vlans)) {
+		rx_mode |= IONIC_RX_MODE_F_PROMISC;
+		rx_mode |= IONIC_RX_MODE_F_ALLMULTI;
+	} else {
+		if (!(nd_flags & IFF_PROMISC))
+			rx_mode &= ~IONIC_RX_MODE_F_PROMISC;
+		if (!(nd_flags & IFF_ALLMULTI))
+			rx_mode &= ~IONIC_RX_MODE_F_ALLMULTI;
+	}
+
+	i = scnprintf(buf, sizeof(buf), "rx_mode 0x%04x -> 0x%04x:",
+		      lif->rx_mode, rx_mode);
+	if (rx_mode & IONIC_RX_MODE_F_UNICAST)
+		i += scnprintf(&buf[i], REMAIN(i), " RX_MODE_F_UNICAST");
+	if (rx_mode & IONIC_RX_MODE_F_MULTICAST)
+		i += scnprintf(&buf[i], REMAIN(i), " RX_MODE_F_MULTICAST");
+	if (rx_mode & IONIC_RX_MODE_F_BROADCAST)
+		i += scnprintf(&buf[i], REMAIN(i), " RX_MODE_F_BROADCAST");
+	if (rx_mode & IONIC_RX_MODE_F_PROMISC)
+		i += scnprintf(&buf[i], REMAIN(i), " RX_MODE_F_PROMISC");
+	if (rx_mode & IONIC_RX_MODE_F_ALLMULTI)
+		i += scnprintf(&buf[i], REMAIN(i), " RX_MODE_F_ALLMULTI");
+	if (rx_mode & IONIC_RX_MODE_F_RDMA_SNIFFER)
+		i += scnprintf(&buf[i], REMAIN(i), " RX_MODE_F_RDMA_SNIFFER");
+	netdev_dbg(netdev, "lif%d %s\n", lif->index, buf);
+
+	if (lif->rx_mode != rx_mode) {
+		struct ionic_admin_ctx ctx = {
+			.work = COMPLETION_INITIALIZER_ONSTACK(ctx.work),
+			.cmd.rx_mode_set = {
+				.opcode = IONIC_CMD_RX_MODE_SET,
+				.lif_index = cpu_to_le16(lif->index),
+			},
+		};
+		int err;
+
+		ctx.cmd.rx_mode_set.rx_mode = cpu_to_le16(rx_mode);
+		err = ionic_adminq_post_wait(lif, &ctx);
+		if (err)
+			netdev_warn(netdev, "set rx_mode 0x%04x failed: %d\n",
+				    rx_mode, err);
+		else
+			lif->rx_mode = rx_mode;
+	}
+
+	mutex_unlock(&lif->config_lock);
+}
+
+static void ionic_ndo_set_rx_mode(struct net_device *netdev)
+{
+	struct ionic_lif *lif = netdev_priv(netdev);
+	struct ionic_deferred_work *work;
+
+	/* Sync the kernel filter list with the driver filter list */
+	__dev_uc_sync(netdev, ionic_addr_add, ionic_addr_del);
+	__dev_mc_sync(netdev, ionic_addr_add, ionic_addr_del);
+
+	/* Shove off the rest of the rxmode work to the work task
+	 * which will include syncing the filters to the firmware.
+	 */
+	work = kzalloc(sizeof(*work), GFP_ATOMIC);
+	if (!work) {
+		netdev_err(lif->netdev, "rxmode change dropped\n");
+		return;
+	}
+	work->type = IONIC_DW_TYPE_RX_MODE;
+	netdev_dbg(lif->netdev, "deferred: rx_mode\n");
+	ionic_lif_deferred_enqueue(&lif->deferred, work);
+}
+
+static __le64 ionic_netdev_features_to_nic(netdev_features_t features)
+{
+	u64 wanted = 0;
+
+	if (features & NETIF_F_HW_VLAN_CTAG_TX)
+		wanted |= IONIC_ETH_HW_VLAN_TX_TAG;
+	if (features & NETIF_F_HW_VLAN_CTAG_RX)
+		wanted |= IONIC_ETH_HW_VLAN_RX_STRIP;
+	if (features & NETIF_F_HW_VLAN_CTAG_FILTER)
+		wanted |= IONIC_ETH_HW_VLAN_RX_FILTER;
+	if (features & NETIF_F_RXHASH)
+		wanted |= IONIC_ETH_HW_RX_HASH;
+	if (features & NETIF_F_RXCSUM)
+		wanted |= IONIC_ETH_HW_RX_CSUM;
+	if (features & NETIF_F_SG)
+		wanted |= IONIC_ETH_HW_TX_SG;
+	if (features & NETIF_F_HW_CSUM)
+		wanted |= IONIC_ETH_HW_TX_CSUM;
+	if (features & NETIF_F_TSO)
+		wanted |= IONIC_ETH_HW_TSO;
+	if (features & NETIF_F_TSO6)
+		wanted |= IONIC_ETH_HW_TSO_IPV6;
+	if (features & NETIF_F_TSO_ECN)
+		wanted |= IONIC_ETH_HW_TSO_ECN;
+	if (features & NETIF_F_GSO_GRE)
+		wanted |= IONIC_ETH_HW_TSO_GRE;
+	if (features & NETIF_F_GSO_GRE_CSUM)
+		wanted |= IONIC_ETH_HW_TSO_GRE_CSUM;
+#ifdef NETIF_F_GSO_IPXIP4
+	if (features & NETIF_F_GSO_IPXIP4)
+		wanted |= IONIC_ETH_HW_TSO_IPXIP4;
+#endif
+#ifdef NETIF_F_GSO_IPXIP6
+	if (features & NETIF_F_GSO_IPXIP6)
+		wanted |= IONIC_ETH_HW_TSO_IPXIP6;
+#endif
+#ifdef NETIF_F_GSO_IPIP
+	if (features & NETIF_F_GSO_IPIP)
+		wanted |= IONIC_ETH_HW_TSO_IPXIP4;
+#endif
+#ifdef NETIF_F_GSO_SIT
+	if (features & NETIF_F_GSO_SIT)
+		wanted |= IONIC_ETH_HW_TSO_IPXIP4;
+#endif
+	if (features & NETIF_F_GSO_UDP_TUNNEL)
+		wanted |= IONIC_ETH_HW_TSO_UDP;
+	if (features & NETIF_F_GSO_UDP_TUNNEL_CSUM)
+		wanted |= IONIC_ETH_HW_TSO_UDP_CSUM;
+
+	return cpu_to_le64(wanted);
+}
+
+static int ionic_set_nic_features(struct ionic_lif *lif,
+				  netdev_features_t features)
+{
+	struct device *dev = lif->ionic->dev;
+	struct ionic_admin_ctx ctx = {
+		.work = COMPLETION_INITIALIZER_ONSTACK(ctx.work),
+		.cmd.lif_setattr = {
+			.opcode = IONIC_CMD_LIF_SETATTR,
+			.index = cpu_to_le16(lif->index),
+			.attr = IONIC_LIF_ATTR_FEATURES,
+		},
+	};
+	u64 vlan_flags = IONIC_ETH_HW_VLAN_TX_TAG |
+			 IONIC_ETH_HW_VLAN_RX_STRIP |
+			 IONIC_ETH_HW_VLAN_RX_FILTER;
+	u64 old_hw_features;
+	int err;
+
+	ctx.cmd.lif_setattr.features = ionic_netdev_features_to_nic(features);
+
+	if (lif->phc)
+		ctx.cmd.lif_setattr.features |= cpu_to_le64(IONIC_ETH_HW_TIMESTAMP);
+
+	err = ionic_adminq_post_wait(lif, &ctx);
+	if (err)
+		return err;
+
+	old_hw_features = lif->hw_features;
+	lif->hw_features = le64_to_cpu(ctx.cmd.lif_setattr.features &
+				       ctx.comp.lif_setattr.features);
+
+	if ((old_hw_features ^ lif->hw_features) & IONIC_ETH_HW_RX_HASH)
+		ionic_lif_rss_config(lif, lif->rss_types, NULL, NULL);
+
+	if ((vlan_flags & le64_to_cpu(ctx.cmd.lif_setattr.features)) &&
+	    !(vlan_flags & le64_to_cpu(ctx.comp.lif_setattr.features)))
+		dev_info_once(lif->ionic->dev, "NIC is not supporting vlan offload, likely in SmartNIC mode\n");
+
+	if (lif->hw_features & IONIC_ETH_HW_VLAN_TX_TAG)
+		dev_dbg(dev, "feature ETH_HW_VLAN_TX_TAG\n");
+	if (lif->hw_features & IONIC_ETH_HW_VLAN_RX_STRIP)
+		dev_dbg(dev, "feature ETH_HW_VLAN_RX_STRIP\n");
+	if (lif->hw_features & IONIC_ETH_HW_VLAN_RX_FILTER)
+		dev_dbg(dev, "feature ETH_HW_VLAN_RX_FILTER\n");
+	if (lif->hw_features & IONIC_ETH_HW_RX_HASH)
+		dev_dbg(dev, "feature ETH_HW_RX_HASH\n");
+	if (lif->hw_features & IONIC_ETH_HW_TX_SG)
+		dev_dbg(dev, "feature ETH_HW_TX_SG\n");
+	if (lif->hw_features & IONIC_ETH_HW_TX_CSUM)
+		dev_dbg(dev, "feature ETH_HW_TX_CSUM\n");
+	if (lif->hw_features & IONIC_ETH_HW_RX_CSUM)
+		dev_dbg(dev, "feature ETH_HW_RX_CSUM\n");
+	if (lif->hw_features & IONIC_ETH_HW_TSO)
+		dev_dbg(dev, "feature ETH_HW_TSO\n");
+	if (lif->hw_features & IONIC_ETH_HW_TSO_IPV6)
+		dev_dbg(dev, "feature ETH_HW_TSO_IPV6\n");
+	if (lif->hw_features & IONIC_ETH_HW_TSO_ECN)
+		dev_dbg(dev, "feature ETH_HW_TSO_ECN\n");
+	if (lif->hw_features & IONIC_ETH_HW_TSO_GRE)
+		dev_dbg(dev, "feature ETH_HW_TSO_GRE\n");
+	if (lif->hw_features & IONIC_ETH_HW_TSO_GRE_CSUM)
+		dev_dbg(dev, "feature ETH_HW_TSO_GRE_CSUM\n");
+	if (lif->hw_features & IONIC_ETH_HW_TSO_IPXIP4)
+		dev_dbg(dev, "feature ETH_HW_TSO_IPXIP4\n");
+	if (lif->hw_features & IONIC_ETH_HW_TSO_IPXIP6)
+		dev_dbg(dev, "feature ETH_HW_TSO_IPXIP6\n");
+	if (lif->hw_features & IONIC_ETH_HW_TSO_UDP)
+		dev_dbg(dev, "feature ETH_HW_TSO_UDP\n");
+	if (lif->hw_features & IONIC_ETH_HW_TSO_UDP_CSUM)
+		dev_dbg(dev, "feature ETH_HW_TSO_UDP_CSUM\n");
+	if (lif->hw_features & IONIC_ETH_HW_TIMESTAMP)
+		dev_dbg(dev, "feature ETH_HW_TIMESTAMP\n");
+
+	return 0;
+}
+
+static int ionic_init_nic_features(struct ionic_lif *lif)
+{
+	struct net_device *netdev = lif->netdev;
+	netdev_features_t features;
+	int err;
+
+	/* set up what we expect to support by default */
+	features = NETIF_F_HW_VLAN_CTAG_TX |
+		   NETIF_F_HW_VLAN_CTAG_RX |
+		   NETIF_F_HW_VLAN_CTAG_FILTER |
+		   NETIF_F_SG |
+		   NETIF_F_HW_CSUM |
+		   NETIF_F_RXCSUM |
+		   NETIF_F_TSO |
+		   NETIF_F_TSO6 |
+		   NETIF_F_TSO_ECN |
+		   NETIF_F_GSO_GRE |
+		   NETIF_F_GSO_GRE_CSUM |
+#ifdef NETIF_F_GSO_IPXIP4
+		   NETIF_F_GSO_IPXIP4 |
+#endif
+#ifdef NETIF_F_GSO_IPXIP6
+		   NETIF_F_GSO_IPXIP6 |
+#endif
+#ifdef NETIF_F_GSO_IPIP
+		   NETIF_F_GSO_IPIP |
+#endif
+#ifdef NETIF_F_GSO_SIT
+		   NETIF_F_GSO_SIT |
+#endif
+		   NETIF_F_GSO_UDP_TUNNEL |
+		   NETIF_F_GSO_UDP_TUNNEL_CSUM;
+
+	if (lif->nxqs > 1)
+		features |= NETIF_F_RXHASH;
+
+	err = ionic_set_nic_features(lif, features);
+	if (err)
+		return err;
+
+	/* tell the netdev what we actually can support */
+	netdev->features |= NETIF_F_HIGHDMA;
+
+	if (lif->hw_features & IONIC_ETH_HW_VLAN_TX_TAG)
+		netdev->hw_features |= NETIF_F_HW_VLAN_CTAG_TX;
+	if (lif->hw_features & IONIC_ETH_HW_VLAN_RX_STRIP)
+		netdev->hw_features |= NETIF_F_HW_VLAN_CTAG_RX;
+	if (lif->hw_features & IONIC_ETH_HW_VLAN_RX_FILTER)
+		netdev->hw_features |= NETIF_F_HW_VLAN_CTAG_FILTER;
+	if (lif->hw_features & IONIC_ETH_HW_RX_HASH)
+		netdev->hw_features |= NETIF_F_RXHASH;
+	if (lif->hw_features & IONIC_ETH_HW_TX_SG)
+		netdev->hw_features |= NETIF_F_SG;
+
+	if (lif->hw_features & IONIC_ETH_HW_TX_CSUM)
+		netdev->hw_enc_features |= NETIF_F_HW_CSUM;
+	if (lif->hw_features & IONIC_ETH_HW_RX_CSUM)
+		netdev->hw_enc_features |= NETIF_F_RXCSUM;
+	if (lif->hw_features & IONIC_ETH_HW_TSO)
+		netdev->hw_enc_features |= NETIF_F_TSO;
+	if (lif->hw_features & IONIC_ETH_HW_TSO_IPV6)
+		netdev->hw_enc_features |= NETIF_F_TSO6;
+	if (lif->hw_features & IONIC_ETH_HW_TSO_ECN)
+		netdev->hw_enc_features |= NETIF_F_TSO_ECN;
+	if (lif->hw_features & IONIC_ETH_HW_TSO_GRE)
+		netdev->hw_enc_features |= NETIF_F_GSO_GRE;
+	if (lif->hw_features & IONIC_ETH_HW_TSO_GRE_CSUM)
+		netdev->hw_enc_features |= NETIF_F_GSO_GRE_CSUM;
+#ifdef NETIF_F_GSO_IPXIP4
+	if (lif->hw_features & IONIC_ETH_HW_TSO_IPXIP4)
+		netdev->hw_enc_features |= NETIF_F_GSO_IPXIP4;
+#endif
+#ifdef NETIF_F_GSO_IPXIP6
+	if (lif->hw_features & IONIC_ETH_HW_TSO_IPXIP6)
+		netdev->hw_enc_features |= NETIF_F_GSO_IPXIP6;
+#endif
+#ifdef NETIF_F_GSO_IPIP
+	if (lif->hw_features & IONIC_ETH_HW_TSO_IPXIP4)
+		netdev->hw_enc_features |= NETIF_F_GSO_IPIP;
+#endif
+	if (lif->hw_features & IONIC_ETH_HW_TSO_UDP)
+		netdev->hw_enc_features |= NETIF_F_GSO_UDP_TUNNEL;
+	if (lif->hw_features & IONIC_ETH_HW_TSO_UDP_CSUM)
+		netdev->hw_enc_features |= NETIF_F_GSO_UDP_TUNNEL_CSUM;
+
+	netdev->hw_features |= netdev->hw_enc_features;
+	netdev->features |= netdev->hw_features;
+
+	/* some earlier kernels complain if the vlan device inherits
+	 * the NETIF_F_HW_VLAN... flags, so strip them out
+	 */
+	netdev->vlan_features |= netdev->features & ~(NETIF_F_HW_VLAN_CTAG_TX |
+						      NETIF_F_HW_VLAN_CTAG_RX |
+						   NETIF_F_HW_VLAN_CTAG_FILTER);
+
+	netdev->priv_flags |= IFF_UNICAST_FLT |
+			      IFF_LIVE_ADDR_CHANGE;
+
+	return 0;
+}
+
+static int ionic_set_features(struct net_device *netdev,
+			      netdev_features_t features)
+{
+	struct ionic_lif *lif = netdev_priv(netdev);
+	int err;
+
+	netdev_dbg(netdev, "%s: lif->features=0x%08llx new_features=0x%08llx\n",
+		   __func__, (u64)lif->netdev->features, (u64)features);
+
+	err = ionic_set_nic_features(lif, features);
+
+	return err;
+}
+
+static int ionic_set_attr_mac(struct ionic_lif *lif, u8 *mac)
+{
+	struct ionic_admin_ctx ctx = {
+		.work = COMPLETION_INITIALIZER_ONSTACK(ctx.work),
+		.cmd.lif_setattr = {
+			.opcode = IONIC_CMD_LIF_SETATTR,
+			.index = cpu_to_le16(lif->index),
+			.attr = IONIC_LIF_ATTR_MAC,
+		},
+	};
+
+	ether_addr_copy(ctx.cmd.lif_setattr.mac, mac);
+	return ionic_adminq_post_wait(lif, &ctx);
+}
+
+static int ionic_get_attr_mac(struct ionic_lif *lif, u8 *mac_addr)
+{
+	struct ionic_admin_ctx ctx = {
+		.work = COMPLETION_INITIALIZER_ONSTACK(ctx.work),
+		.cmd.lif_getattr = {
+			.opcode = IONIC_CMD_LIF_GETATTR,
+			.index = cpu_to_le16(lif->index),
+			.attr = IONIC_LIF_ATTR_MAC,
+		},
+	};
+	int err;
+
+	err = ionic_adminq_post_wait(lif, &ctx);
+	if (err)
+		return err;
+
+	ether_addr_copy(mac_addr, ctx.comp.lif_getattr.mac);
+	return 0;
+}
+
+static int ionic_program_mac(struct ionic_lif *lif, u8 *mac)
+{
+	u8  get_mac[ETH_ALEN];
+	int err;
+
+	err = ionic_set_attr_mac(lif, mac);
+	if (err)
+		return err;
+
+	err = ionic_get_attr_mac(lif, get_mac);
+	if (err)
+		return err;
+
+	/* To deal with older firmware that silently ignores the set attr mac:
+	 * doesn't actually change the mac and doesn't return an error, so we
+	 * do the get attr to verify whether or not the set actually happened
+	 */
+	if (ether_addr_equal(get_mac, mac))
+		return 0;
+
+	return 1;
+}
+
+static int ionic_set_mac_address(struct net_device *netdev, void *sa)
+{
+	struct ionic_lif *lif = netdev_priv(netdev);
+	struct sockaddr  *addr = sa;
+	u8  *mac;
+	int err;
+
+	mac = (u8 *)addr->sa_data;
+
+	if (ether_addr_equal(netdev->dev_addr, mac))
+		return 0;
+
+	err = ionic_program_mac(lif, mac);
+	if (err < 0)
+		return err;
+
+	if (err > 0)
+		netdev_dbg(netdev, "%s:SET and GET ATTR Mac is not equal-due to old FW running\n",
+			   __func__);
+
+	err = eth_prepare_mac_addr_change(netdev, addr);
+	if (err)
+		return err;
+
+	if (!is_zero_ether_addr(netdev->dev_addr)) {
+		netdev_info(netdev, "deleting mac addr %pM\n",
+			    netdev->dev_addr);
+		ionic_lif_addr_del(netdev_priv(netdev), netdev->dev_addr);
+	}
+
+	eth_commit_mac_addr_change(netdev, addr);
+	netdev_info(netdev, "updating mac addr %pM\n", mac);
+
+	return ionic_lif_addr_add(netdev_priv(netdev), mac);
+}
+
+static void ionic_stop_queues_reconfig(struct ionic_lif *lif)
+{
+	/* Stop and clean the queues before reconfiguration */
+	netif_device_detach(lif->netdev);
+	ionic_stop_queues(lif);
+	ionic_txrx_deinit(lif);
+}
+
+static int ionic_start_queues_reconfig(struct ionic_lif *lif)
+{
+	int err;
+
+	/* Re-init the queues after reconfiguration */
+
+	/* The only way txrx_init can fail here is if communication
+	 * with FW is suddenly broken.  There's not much we can do
+	 * at this point - error messages have already been printed,
+	 * so we can continue on and the user can eventually do a
+	 * DOWN and UP to try to reset and clear the issue.
+	 */
+	err = ionic_txrx_init(lif);
+	ionic_link_status_check_request(lif, CAN_NOT_SLEEP);
+	netif_device_attach(lif->netdev);
+
+	return err;
+}
+
+static int ionic_change_mtu(struct net_device *netdev, int new_mtu)
+{
+	struct ionic_lif *lif = netdev_priv(netdev);
+	struct ionic_admin_ctx ctx = {
+		.work = COMPLETION_INITIALIZER_ONSTACK(ctx.work),
+		.cmd.lif_setattr = {
+			.opcode = IONIC_CMD_LIF_SETATTR,
+			.index = cpu_to_le16(lif->index),
+			.attr = IONIC_LIF_ATTR_MTU,
+			.mtu = cpu_to_le32(new_mtu),
+		},
+	};
+	int err;
+	int fs;
+
+	fs = new_mtu + ETH_HLEN + VLAN_HLEN;
+	if (fs < le32_to_cpu(lif->identity->eth.min_frame_size) ||
+	    fs > le32_to_cpu(lif->identity->eth.max_frame_size)) {
+		netdev_err(netdev, "Invalid MTU %d\n", new_mtu);
+		return -EINVAL;
+	}
+
+	err = ionic_adminq_post_wait(lif, &ctx);
+	if (err)
+		return err;
+
+	netdev_info(netdev, "Changing MTU from %d to %d\n",
+		    netdev->mtu, new_mtu);
+
+	/* if we're not running, nothing much to do */
+	if (!netif_running(lif->netdev)) {
+		netdev->mtu = new_mtu;
+		return 0;
+	}
+
+	mutex_lock(&lif->queue_lock);
+	ionic_stop_queues_reconfig(lif);
+	netdev->mtu = new_mtu;
+	err = ionic_start_queues_reconfig(lif);
+	mutex_unlock(&lif->queue_lock);
+
+	return err;
+}
+
+static void ionic_tx_timeout_work(struct work_struct *ws)
+{
+	struct ionic_lif *lif = container_of(ws, struct ionic_lif, tx_timeout_work);
+
+	if (test_bit(IONIC_LIF_F_FW_RESET, lif->state))
+		return;
+
+	// TODO: queue specific reset
+
+	/* if we were stopped before this scheduled job was launched,
+	 * don't bother the queues as they are already stopped.
+	 */
+	if (!netif_running(lif->netdev))
+		return;
+
+	mutex_lock(&lif->queue_lock);
+	ionic_stop_queues_reconfig(lif);
+	ionic_start_queues_reconfig(lif);
+	mutex_unlock(&lif->queue_lock);
+}
+
+#ifdef HAVE_TX_TIMEOUT_TXQUEUE
+static void ionic_tx_timeout(struct net_device *netdev, unsigned int txqueue)
+#else
+static void ionic_tx_timeout(struct net_device *netdev)
+#endif
+{
+	struct ionic_lif *lif = netdev_priv(netdev);
+#if !defined(HAVE_TX_TIMEOUT_TXQUEUE)
+	unsigned int txqueue = -1;
+#endif
+
+	netdev_info(lif->netdev, "Tx Timeout triggered - txq %d\n", txqueue);
+	schedule_work(&lif->tx_timeout_work);
+}
+
+static int ionic_vlan_rx_add_vid(struct net_device *netdev, __be16 proto,
+				 u16 vid)
+{
+	struct ionic_lif *lif = netdev_priv(netdev);
+	int err;
+
+	err = ionic_lif_vlan_add(lif, vid);
+	if (err)
+		return err;
+
+	ionic_lif_rx_mode(lif);
+
+	return 0;
+}
+
+static int ionic_vlan_rx_kill_vid(struct net_device *netdev, __be16 proto,
+				  u16 vid)
+{
+	struct ionic_lif *lif = netdev_priv(netdev);
+	int err;
+
+	err = ionic_lif_vlan_del(lif, vid);
+	if (err)
+		return err;
+
+	ionic_lif_rx_mode(lif);
+
+	return 0;
+}
+
+int ionic_lif_rss_config(struct ionic_lif *lif, const u16 types,
+			 const u8 *key, const u32 *indir)
+{
+	struct ionic_admin_ctx ctx = {
+		.work = COMPLETION_INITIALIZER_ONSTACK(ctx.work),
+		.cmd.lif_setattr = {
+			.opcode = IONIC_CMD_LIF_SETATTR,
+			.attr = IONIC_LIF_ATTR_RSS,
+			.rss.addr = cpu_to_le64(lif->rss_ind_tbl_pa),
+		},
+	};
+	unsigned int i, tbl_sz;
+
+	if (lif->hw_features & IONIC_ETH_HW_RX_HASH) {
+		lif->rss_types = types;
+		ctx.cmd.lif_setattr.rss.types = cpu_to_le16(types);
+	}
+
+	if (key)
+		memcpy(lif->rss_hash_key, key, IONIC_RSS_HASH_KEY_SIZE);
+
+	if (indir) {
+		tbl_sz = le16_to_cpu(lif->ionic->ident.lif.eth.rss_ind_tbl_sz);
+		for (i = 0; i < tbl_sz; i++)
+			lif->rss_ind_tbl[i] = indir[i];
+	}
+
+	memcpy(ctx.cmd.lif_setattr.rss.key, lif->rss_hash_key,
+	       IONIC_RSS_HASH_KEY_SIZE);
+
+	return ionic_adminq_post_wait(lif, &ctx);
+}
+
+static int ionic_lif_rss_init(struct ionic_lif *lif)
+{
+	unsigned int tbl_sz;
+	unsigned int i;
+
+	lif->rss_types = IONIC_RSS_TYPE_IPV4     |
+			 IONIC_RSS_TYPE_IPV4_TCP |
+			 IONIC_RSS_TYPE_IPV4_UDP |
+			 IONIC_RSS_TYPE_IPV6     |
+			 IONIC_RSS_TYPE_IPV6_TCP |
+			 IONIC_RSS_TYPE_IPV6_UDP;
+
+	/* Fill indirection table with 'default' values */
+	tbl_sz = le16_to_cpu(lif->ionic->ident.lif.eth.rss_ind_tbl_sz);
+	for (i = 0; i < tbl_sz; i++)
+		lif->rss_ind_tbl[i] = ethtool_rxfh_indir_default(i, lif->nxqs);
+
+	return ionic_lif_rss_config(lif, lif->rss_types, NULL, NULL);
+}
+
+static void ionic_lif_rss_deinit(struct ionic_lif *lif)
+{
+	int tbl_sz;
+
+	tbl_sz = le16_to_cpu(lif->ionic->ident.lif.eth.rss_ind_tbl_sz);
+	memset(lif->rss_ind_tbl, 0, tbl_sz);
+	memset(lif->rss_hash_key, 0, IONIC_RSS_HASH_KEY_SIZE);
+
+	ionic_lif_rss_config(lif, 0x0, NULL, NULL);
+}
+
+static void ionic_lif_quiesce(struct ionic_lif *lif)
+{
+	struct ionic_admin_ctx ctx = {
+		.work = COMPLETION_INITIALIZER_ONSTACK(ctx.work),
+		.cmd.lif_setattr = {
+			.opcode = IONIC_CMD_LIF_SETATTR,
+			.index = cpu_to_le16(lif->index),
+			.attr = IONIC_LIF_ATTR_STATE,
+			.state = IONIC_LIF_QUIESCE,
+		},
+	};
+	int err;
+
+	err = ionic_adminq_post_wait(lif, &ctx);
+	if (err)
+		netdev_dbg(lif->netdev, "lif quiesce failed %d\n", err);
+}
+
+static void ionic_txrx_disable(struct ionic_lif *lif)
+{
+	unsigned int i;
+	int err = 0;
+
+	if (lif->txqcqs) {
+		for (i = 0; i < lif->nxqs; i++)
+			err = ionic_qcq_disable(lif, lif->txqcqs[i], err);
+	}
+
+	if (lif->hwstamp_txq)
+		err = ionic_qcq_disable(lif, lif->hwstamp_txq, err);
+
+	if (lif->rxqcqs) {
+		for (i = 0; i < lif->nxqs; i++)
+			err = ionic_qcq_disable(lif, lif->rxqcqs[i], err);
+	}
+
+	if (lif->hwstamp_rxq)
+		err = ionic_qcq_disable(lif, lif->hwstamp_rxq, err);
+
+	ionic_lif_quiesce(lif);
+}
+
+static void ionic_txrx_deinit(struct ionic_lif *lif)
+{
+	unsigned int i;
+
+	if (lif->txqcqs && lif->txqcqs[0]) {
+		for (i = 0; i < lif->nxqs && lif->txqcqs[i]; i++) {
+			ionic_lif_qcq_deinit(lif, lif->txqcqs[i]);
+			ionic_tx_flush(&lif->txqcqs[i]->cq);
+			ionic_tx_empty(&lif->txqcqs[i]->q);
+		}
+	}
+
+	if (lif->rxqcqs && lif->rxqcqs[0]) {
+		for (i = 0; i < lif->nxqs && lif->rxqcqs[i]; i++) {
+			ionic_lif_qcq_deinit(lif, lif->rxqcqs[i]);
+			ionic_rx_empty(&lif->rxqcqs[i]->q);
+		}
+	}
+	lif->rx_mode = 0;
+
+	if (lif->hwstamp_txq) {
+		ionic_lif_qcq_deinit(lif, lif->hwstamp_txq);
+		ionic_tx_flush(&lif->hwstamp_txq->cq);
+		ionic_tx_empty(&lif->hwstamp_txq->q);
+	}
+
+	if (lif->hwstamp_rxq) {
+		ionic_lif_qcq_deinit(lif, lif->hwstamp_rxq);
+		ionic_rx_empty(&lif->hwstamp_rxq->q);
+	}
+}
+
+static void ionic_txrx_free(struct ionic_lif *lif)
+{
+	unsigned int i;
+
+	if (lif->txqcqs) {
+		for (i = 0; i < lif->ionic->ntxqs_per_lif && lif->txqcqs[i]; i++) {
+			ionic_qcq_free(lif, lif->txqcqs[i]);
+			devm_kfree(lif->ionic->dev, lif->txqcqs[i]);
+			lif->txqcqs[i] = NULL;
+		}
+	}
+
+	if (lif->rxqcqs) {
+		for (i = 0; i < lif->ionic->nrxqs_per_lif && lif->rxqcqs[i]; i++) {
+			ionic_qcq_free(lif, lif->rxqcqs[i]);
+			devm_kfree(lif->ionic->dev, lif->rxqcqs[i]);
+			lif->rxqcqs[i] = NULL;
+		}
+	}
+
+	if (lif->hwstamp_txq) {
+		ionic_qcq_free(lif, lif->hwstamp_txq);
+		devm_kfree(lif->ionic->dev, lif->hwstamp_txq);
+		lif->hwstamp_txq = NULL;
+	}
+
+	if (lif->hwstamp_rxq) {
+		ionic_qcq_free(lif, lif->hwstamp_rxq);
+		devm_kfree(lif->ionic->dev, lif->hwstamp_rxq);
+		lif->hwstamp_rxq = NULL;
+	}
+}
+
+static int ionic_txrx_alloc(struct ionic_lif *lif)
+{
+	unsigned int comp_sz, desc_sz, num_desc, sg_desc_sz;
+	unsigned int flags, i;
+	int err = 0;
+
+	num_desc = lif->ntxq_descs;
+	desc_sz = sizeof(struct ionic_txq_desc);
+	comp_sz = sizeof(struct ionic_txq_comp);
+
+	if (lif->qtype_info[IONIC_QTYPE_TXQ].version >= 1 &&
+	    lif->qtype_info[IONIC_QTYPE_TXQ].sg_desc_sz ==
+					  sizeof(struct ionic_txq_sg_desc_v1))
+		sg_desc_sz = sizeof(struct ionic_txq_sg_desc_v1);
+	else
+		sg_desc_sz = sizeof(struct ionic_txq_sg_desc);
+
+	flags = IONIC_QCQ_F_TX_STATS | IONIC_QCQ_F_SG;
+
+	if (test_bit(IONIC_LIF_F_CMB_RINGS, lif->state))
+		flags |= IONIC_QCQ_F_CMB_RINGS;
+
+	if (test_bit(IONIC_LIF_F_SPLIT_INTR, lif->state) &&
+	    !(lif->ionic->neth_eqs &&
+	      lif->qtype_info[IONIC_QTYPE_TXQ].features & IONIC_QIDENT_F_EQ))
+		flags |= IONIC_QCQ_F_INTR;
+
+	for (i = 0; i < lif->nxqs; i++) {
+		err = ionic_qcq_alloc(lif, IONIC_QTYPE_TXQ, i, "tx", flags,
+				      num_desc, desc_sz, comp_sz, sg_desc_sz,
+				      lif->kern_pid, &lif->txqcqs[i]);
+		if (err)
+			goto err_out;
+
+		if (flags & IONIC_QCQ_F_INTR) {
+			ionic_intr_coal_init(lif->ionic->idev.intr_ctrl,
+					     lif->txqcqs[i]->intr.index,
+					     lif->tx_coalesce_hw);
+			if (test_bit(IONIC_LIF_F_TX_DIM_INTR, lif->state))
+				lif->txqcqs[i]->intr.dim_coal_hw = lif->tx_coalesce_hw;
+		}
+
+		ionic_debugfs_add_qcq(lif, lif->txqcqs[i]);
+	}
+
+	flags = IONIC_QCQ_F_RX_STATS | IONIC_QCQ_F_SG;
+	if (!ionic_use_eqs(lif))
+		flags |= IONIC_QCQ_F_INTR;
+
+	if (test_bit(IONIC_LIF_F_CMB_RINGS, lif->state))
+		flags |= IONIC_QCQ_F_CMB_RINGS;
+
+	num_desc = lif->nrxq_descs;
+	desc_sz = sizeof(struct ionic_rxq_desc);
+	comp_sz = sizeof(struct ionic_rxq_comp);
+	sg_desc_sz = sizeof(struct ionic_rxq_sg_desc);
+
+	if (lif->rxq_features & IONIC_Q_F_2X_CQ_DESC)
+		comp_sz *= 2;
+
+	for (i = 0; i < lif->nxqs; i++) {
+		err = ionic_qcq_alloc(lif, IONIC_QTYPE_RXQ, i, "rx", flags,
+				      num_desc, desc_sz, comp_sz, sg_desc_sz,
+				      lif->kern_pid, &lif->rxqcqs[i]);
+		if (err)
+			goto err_out;
+
+		lif->rxqcqs[i]->q.features = lif->rxq_features;
+
+		if (flags & IONIC_QCQ_F_INTR) {
+			ionic_intr_coal_init(lif->ionic->idev.intr_ctrl,
+					     lif->rxqcqs[i]->intr.index,
+					     lif->rx_coalesce_hw);
+			if (test_bit(IONIC_LIF_F_RX_DIM_INTR, lif->state))
+				lif->rxqcqs[i]->intr.dim_coal_hw = lif->rx_coalesce_hw;
+
+			if (!test_bit(IONIC_LIF_F_SPLIT_INTR, lif->state))
+				ionic_link_qcq_interrupts(lif->rxqcqs[i],
+							  lif->txqcqs[i]);
+		}
+
+		ionic_debugfs_add_qcq(lif, lif->rxqcqs[i]);
+	}
+
+	lif->n_txrx_alloc++;
+
+	return 0;
+
+err_out:
+	ionic_txrx_free(lif);
+
+	return err;
+}
+
+static int ionic_txrx_init(struct ionic_lif *lif)
+{
+	unsigned int i;
+	int err;
+
+	for (i = 0; i < lif->nxqs; i++) {
+		err = ionic_lif_txq_init(lif, lif->txqcqs[i]);
+		if (err)
+			goto err_out;
+
+		err = ionic_lif_rxq_init(lif, lif->rxqcqs[i]);
+		if (err) {
+			ionic_lif_qcq_deinit(lif, lif->txqcqs[i]);
+			goto err_out;
+		}
+	}
+
+	if (lif->netdev->features & NETIF_F_RXHASH)
+		ionic_lif_rss_init(lif);
+
+	ionic_lif_rx_mode(lif);
+
+	return 0;
+
+err_out:
+	while (i--) {
+		ionic_lif_qcq_deinit(lif, lif->txqcqs[i]);
+		ionic_lif_qcq_deinit(lif, lif->rxqcqs[i]);
+	}
+
+	return err;
+}
+
+static int ionic_txrx_enable(struct ionic_lif *lif)
+{
+	int derr = 0;
+	int i, err;
+
+	for (i = 0; i < lif->nxqs; i++) {
+		if (!(lif->rxqcqs[i] && lif->txqcqs[i])) {
+			dev_err(lif->ionic->dev, "%s: bad qcq %d\n", __func__, i);
+			err = -ENXIO;
+			goto err_out;
+		}
+
+		ionic_rx_fill(&lif->rxqcqs[i]->q);
+		err = ionic_qcq_enable(lif->rxqcqs[i]);
+		if (err)
+			goto err_out;
+
+		err = ionic_qcq_enable(lif->txqcqs[i]);
+		if (err) {
+			derr = ionic_qcq_disable(lif, lif->rxqcqs[i], err);
+			goto err_out;
+		}
+	}
+
+	if (lif->hwstamp_rxq) {
+		ionic_rx_fill(&lif->hwstamp_rxq->q);
+		err = ionic_qcq_enable(lif->hwstamp_rxq);
+		if (err)
+			goto err_out_hwstamp_rx;
+	}
+
+	if (lif->hwstamp_txq) {
+		err = ionic_qcq_enable(lif->hwstamp_txq);
+		if (err)
+			goto err_out_hwstamp_tx;
+	}
+
+	return 0;
+
+err_out_hwstamp_tx:
+	if (lif->hwstamp_rxq)
+		derr = ionic_qcq_disable(lif, lif->hwstamp_rxq, derr);
+err_out_hwstamp_rx:
+	i = lif->nxqs;
+err_out:
+	while (i--) {
+		derr = ionic_qcq_disable(lif, lif->txqcqs[i], derr);
+		derr = ionic_qcq_disable(lif, lif->rxqcqs[i], derr);
+	}
+
+	return err;
+}
+
+static int ionic_start_queues(struct ionic_lif *lif)
+{
+	int err;
+
+	/* If we've noticed that the device is in a broken state, don't
+	 * attempt to bring the queues back up.
+	 */
+	if (test_bit(IONIC_LIF_F_BROKEN, lif->state))
+		return -EIO;
+
+	if (test_bit(IONIC_LIF_F_FW_RESET, lif->state))
+		return -EBUSY;
+
+	if (test_and_set_bit(IONIC_LIF_F_UP, lif->state))
+		return 0;
+
+	err = ionic_txrx_enable(lif);
+	if (err) {
+		clear_bit(IONIC_LIF_F_UP, lif->state);
+		return err;
+	}
+
+	netif_tx_wake_all_queues(lif->netdev);
+
+	return 0;
+}
+
+static int ionic_open(struct net_device *netdev)
+{
+	struct ionic_lif *lif = netdev_priv(netdev);
+	int err;
+
+	if (test_bit(IONIC_LIF_F_UP, lif->state)) {
+		dev_dbg(lif->ionic->dev, "%s: %s called when state=UP\n",
+			__func__, lif->name);
+		return 0;
+	}
+
+	/* If recovering from a broken state, clear the bit and we'll try again */
+	if (test_and_clear_bit(IONIC_LIF_F_BROKEN, lif->state))
+		netdev_info(netdev, "clearing broken state\n");
+
+	mutex_lock(&lif->queue_lock);
+
+	err = ionic_txrx_alloc(lif);
+	if (err)
+		goto err_unlock;
+
+	err = ionic_txrx_init(lif);
+	if (err)
+		goto err_txrx_free;
+
+	err = netif_set_real_num_tx_queues(netdev, lif->nxqs);
+	if (err)
+		goto err_txrx_deinit;
+
+	err = netif_set_real_num_rx_queues(netdev, lif->nxqs);
+	if (err)
+		goto err_txrx_deinit;
+
+	/* If hardware timestamping is enabled, but the queues were freed by
+	 * ionic_stop, those need to be reallocated and initialized, too.
+	 */
+	ionic_lif_hwstamp_recreate_queues(lif);
+
+	/* don't start the queues until we have link */
+	if (netif_carrier_ok(netdev)) {
+		err = ionic_start_queues(lif);
+		if (err)
+			goto err_txrx_deinit;
+	}
+
+	mutex_unlock(&lif->queue_lock);
+	return 0;
+
+err_txrx_deinit:
+	ionic_txrx_deinit(lif);
+err_txrx_free:
+	ionic_txrx_free(lif);
+err_unlock:
+	mutex_unlock(&lif->queue_lock);
+	return err;
+}
+
+static void ionic_stop_queues(struct ionic_lif *lif)
+{
+	if (!test_and_clear_bit(IONIC_LIF_F_UP, lif->state))
+		return;
+
+	netif_tx_disable(lif->netdev);
+	ionic_txrx_disable(lif);
+}
+
+static int ionic_stop(struct net_device *netdev)
+{
+	struct ionic_lif *lif = netdev_priv(netdev);
+
+	if (test_bit(IONIC_LIF_F_FW_RESET, lif->state))
+		return 0;
+
+	mutex_lock(&lif->queue_lock);
+	ionic_stop_queues(lif);
+	ionic_txrx_deinit(lif);
+	ionic_txrx_free(lif);
+	mutex_unlock(&lif->queue_lock);
+
+	return 0;
+}
+
+static int ionic_eth_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
+{
+	struct ionic_lif *lif = netdev_priv(netdev);
+
+	switch (cmd) {
+	case SIOCSHWTSTAMP:
+		return ionic_lif_hwstamp_set(lif, ifr);
+	case SIOCGHWTSTAMP:
+		return ionic_lif_hwstamp_get(lif, ifr);
+	default:
+		return -EOPNOTSUPP;
+	}
+}
+
+static int ionic_get_fw_vf_config(struct ionic *ionic, int vf, struct ionic_vf *vfdata)
+{
+	struct ionic_vf_getattr_comp comp = { 0 };
+	int err;
+	u8 attr;
+
+	attr = IONIC_VF_ATTR_VLAN;
+	err = ionic_dev_cmd_vf_getattr(ionic, vf, attr, &comp);
+	if (err && comp.status != IONIC_RC_ENOSUPP)
+		goto err_out;
+	if (!err)
+		vfdata->vlanid = comp.vlanid;
+
+	attr = IONIC_VF_ATTR_SPOOFCHK;
+	err = ionic_dev_cmd_vf_getattr(ionic, vf, attr, &comp);
+	if (err && comp.status != IONIC_RC_ENOSUPP)
+		goto err_out;
+	if (!err)
+		vfdata->spoofchk = comp.spoofchk;
+
+	attr = IONIC_VF_ATTR_LINKSTATE;
+	err = ionic_dev_cmd_vf_getattr(ionic, vf, attr, &comp);
+	if (err && comp.status != IONIC_RC_ENOSUPP)
+		goto err_out;
+	if (!err) {
+		switch (comp.linkstate) {
+		case IONIC_VF_LINK_STATUS_UP:
+			vfdata->linkstate = IFLA_VF_LINK_STATE_ENABLE;
+			break;
+		case IONIC_VF_LINK_STATUS_DOWN:
+			vfdata->linkstate = IFLA_VF_LINK_STATE_DISABLE;
+			break;
+		case IONIC_VF_LINK_STATUS_AUTO:
+			vfdata->linkstate = IFLA_VF_LINK_STATE_AUTO;
+			break;
+		default:
+			dev_warn(ionic->dev, "Unexpected link state %u\n", comp.linkstate);
+			break;
+		}
+	}
+
+	attr = IONIC_VF_ATTR_RATE;
+	err = ionic_dev_cmd_vf_getattr(ionic, vf, attr, &comp);
+	if (err && comp.status != IONIC_RC_ENOSUPP)
+		goto err_out;
+	if (!err)
+		vfdata->maxrate = comp.maxrate;
+
+	attr = IONIC_VF_ATTR_TRUST;
+	err = ionic_dev_cmd_vf_getattr(ionic, vf, attr, &comp);
+	if (err && comp.status != IONIC_RC_ENOSUPP)
+		goto err_out;
+	if (!err)
+		vfdata->trusted = comp.trust;
+
+	attr = IONIC_VF_ATTR_MAC;
+	err = ionic_dev_cmd_vf_getattr(ionic, vf, attr, &comp);
+	if (err && comp.status != IONIC_RC_ENOSUPP)
+		goto err_out;
+	if (!err)
+		ether_addr_copy(vfdata->macaddr, comp.macaddr);
+
+err_out:
+	if (err)
+		dev_err(ionic->dev, "Failed to get %s for VF %d\n",
+			ionic_vf_attr_to_str(attr), vf);
+
+	return err;
+}
+
+static int ionic_get_vf_config(struct net_device *netdev,
+			       int vf, struct ifla_vf_info *ivf)
+{
+	struct ionic_lif *lif = netdev_priv(netdev);
+	struct ionic *ionic = lif->ionic;
+	struct ionic_vf vfdata = { 0 };
+	int ret = 0;
+
+	if (!netif_device_present(netdev))
+		return -EBUSY;
+
+	down_read(&ionic->vf_op_lock);
+
+	if (vf >= pci_num_vf(ionic->pdev) || !ionic->vfs) {
+		ret = -EINVAL;
+	} else {
+		ivf->vf = vf;
+		ivf->qos = 0;
+
+		ret = ionic_get_fw_vf_config(ionic, vf, &vfdata);
+		if (!ret) {
+			ivf->vlan         = le16_to_cpu(vfdata.vlanid);
+			ivf->spoofchk     = vfdata.spoofchk;
+			ivf->linkstate    = vfdata.linkstate;
+			ivf->max_tx_rate  = le32_to_cpu(vfdata.maxrate);
+			ivf->trusted      = vfdata.trusted;
+			ether_addr_copy(ivf->mac, vfdata.macaddr);
+		}
+	}
+
+	up_read(&ionic->vf_op_lock);
+	return ret;
+}
+
+static int ionic_get_vf_stats(struct net_device *netdev, int vf,
+			      struct ifla_vf_stats *vf_stats)
+{
+	struct ionic_lif *lif = netdev_priv(netdev);
+	struct ionic *ionic = lif->ionic;
+	struct ionic_lif_stats *vs;
+	int ret = 0;
+
+	if (!netif_device_present(netdev))
+		return -EBUSY;
+
+	down_read(&ionic->vf_op_lock);
+
+	if (vf >= pci_num_vf(ionic->pdev) || !ionic->vfs) {
+		ret = -EINVAL;
+	} else {
+		memset(vf_stats, 0, sizeof(*vf_stats));
+		vs = &ionic->vfs[vf].stats;
+
+		vf_stats->rx_packets = le64_to_cpu(vs->rx_ucast_packets);
+		vf_stats->tx_packets = le64_to_cpu(vs->tx_ucast_packets);
+		vf_stats->rx_bytes   = le64_to_cpu(vs->rx_ucast_bytes);
+		vf_stats->tx_bytes   = le64_to_cpu(vs->tx_ucast_bytes);
+		vf_stats->broadcast  = le64_to_cpu(vs->rx_bcast_packets);
+		vf_stats->multicast  = le64_to_cpu(vs->rx_mcast_packets);
+#if (KERNEL_VERSION(4, 16, 0) < LINUX_VERSION_CODE)
+		vf_stats->rx_dropped = le64_to_cpu(vs->rx_ucast_drop_packets) +
+				       le64_to_cpu(vs->rx_mcast_drop_packets) +
+				       le64_to_cpu(vs->rx_bcast_drop_packets);
+		vf_stats->tx_dropped = le64_to_cpu(vs->tx_ucast_drop_packets) +
+				       le64_to_cpu(vs->tx_mcast_drop_packets) +
+				       le64_to_cpu(vs->tx_bcast_drop_packets);
+#endif
+	}
+
+	up_read(&ionic->vf_op_lock);
+	return ret;
+}
+
+static int ionic_set_vf_mac(struct net_device *netdev, int vf, u8 *mac)
+{
+	struct ionic_vf_setattr_cmd vfc = { .attr = IONIC_VF_ATTR_MAC };
+	struct ionic_lif *lif = netdev_priv(netdev);
+	struct ionic *ionic = lif->ionic;
+	int ret;
+
+	if (!(is_zero_ether_addr(mac) || is_valid_ether_addr(mac)))
+		return -EINVAL;
+
+	if (!netif_device_present(netdev))
+		return -EBUSY;
+
+	down_write(&ionic->vf_op_lock);
+
+	if (vf >= pci_num_vf(ionic->pdev) || !ionic->vfs) {
+		ret = -EINVAL;
+	} else {
+		ether_addr_copy(vfc.macaddr, mac);
+		dev_dbg(ionic->dev, "%s: vf %d macaddr %pM\n",
+			__func__, vf, vfc.macaddr);
+
+		ret = ionic_set_vf_config(ionic, vf, &vfc);
+		if (!ret)
+			ether_addr_copy(ionic->vfs[vf].macaddr, mac);
+	}
+
+	up_write(&ionic->vf_op_lock);
+	return ret;
+}
+
+#if (RHEL_RELEASE_CODE == 0 || \
+     defined(HAVE_RHEL7_NETDEV_OPS_EXT_NDO_SET_VF_VLAN) || \
+     RHEL_RELEASE_VERSION(8, 0) < RHEL_RELEASE_CODE)
+
+#if (RHEL_RELEASE_CODE == 0 && KERNEL_VERSION(4, 9, 0) >= LINUX_VERSION_CODE)
+static int ionic_set_vf_vlan(struct net_device *netdev, int vf, u16 vlan, u8 qos)
+#else
+static int ionic_set_vf_vlan(struct net_device *netdev, int vf, u16 vlan,
+			     u8 qos, __be16 proto)
+#endif
+{
+	struct ionic_vf_setattr_cmd vfc = { .attr = IONIC_VF_ATTR_VLAN };
+	struct ionic_lif *lif = netdev_priv(netdev);
+	struct ionic *ionic = lif->ionic;
+	int ret;
+
+	/* until someday when we support qos */
+	if (qos)
+		return -EINVAL;
+
+	if (vlan > 4095)
+		return -EINVAL;
+
+	if (!netif_device_present(netdev))
+		return -EBUSY;
+
+	down_write(&ionic->vf_op_lock);
+
+	if (vf >= pci_num_vf(ionic->pdev) || !ionic->vfs) {
+		ret = -EINVAL;
+	} else {
+		vfc.vlanid = cpu_to_le16(vlan);
+		dev_dbg(ionic->dev, "%s: vf %d vlan %d\n",
+			__func__, vf, le16_to_cpu(vfc.vlanid));
+
+		ret = ionic_set_vf_config(ionic, vf, &vfc);
+		if (!ret)
+			ionic->vfs[vf].vlanid = cpu_to_le16(vlan);
+	}
+
+	up_write(&ionic->vf_op_lock);
+	return ret;
+}
+#endif
+
+static int ionic_set_vf_rate(struct net_device *netdev, int vf,
+			     int tx_min, int tx_max)
+{
+	struct ionic_vf_setattr_cmd vfc = { .attr = IONIC_VF_ATTR_RATE };
+	struct ionic_lif *lif = netdev_priv(netdev);
+	struct ionic *ionic = lif->ionic;
+	int ret;
+
+	/* setting the min just seems silly */
+	if (tx_min)
+		return -EINVAL;
+
+	if (!netif_device_present(netdev))
+		return -EBUSY;
+
+	down_write(&ionic->vf_op_lock);
+
+	if (vf >= pci_num_vf(ionic->pdev) || !ionic->vfs) {
+		ret = -EINVAL;
+	} else {
+		vfc.maxrate = cpu_to_le32(tx_max);
+		dev_dbg(ionic->dev, "%s: vf %d maxrate %d\n",
+			__func__, vf, le32_to_cpu(vfc.maxrate));
+
+		ret = ionic_set_vf_config(ionic, vf, &vfc);
+		if (!ret)
+			ionic->vfs[vf].maxrate = cpu_to_le32(tx_max);
+	}
+
+	up_write(&ionic->vf_op_lock);
+	return ret;
+}
+
+static int ionic_set_vf_spoofchk(struct net_device *netdev, int vf, bool set)
+{
+	struct ionic_vf_setattr_cmd vfc = { .attr = IONIC_VF_ATTR_SPOOFCHK };
+	struct ionic_lif *lif = netdev_priv(netdev);
+	struct ionic *ionic = lif->ionic;
+	u8 data = set;  /* convert to u8 for config */
+	int ret;
+
+	if (!netif_device_present(netdev))
+		return -EBUSY;
+
+	down_write(&ionic->vf_op_lock);
+
+	if (vf >= pci_num_vf(ionic->pdev) || !ionic->vfs) {
+		ret = -EINVAL;
+	} else {
+		vfc.spoofchk = set;
+		dev_dbg(ionic->dev, "%s: vf %d spoof %d\n",
+			__func__, vf, vfc.spoofchk);
+
+		ret = ionic_set_vf_config(ionic, vf, &vfc);
+		if (!ret)
+			ionic->vfs[vf].spoofchk = data;
+	}
+
+	up_write(&ionic->vf_op_lock);
+	return ret;
+}
+
+#ifdef HAVE_NDO_SET_VF_TRUST
+static int ionic_set_vf_trust(struct net_device *netdev, int vf, bool set)
+{
+	struct ionic_vf_setattr_cmd vfc = { .attr = IONIC_VF_ATTR_TRUST };
+	struct ionic_lif *lif = netdev_priv(netdev);
+	struct ionic *ionic = lif->ionic;
+	u8 data = set;  /* convert to u8 for config */
+	int ret;
+
+	if (!netif_device_present(netdev))
+		return -EBUSY;
+
+	down_write(&ionic->vf_op_lock);
+
+	if (vf >= pci_num_vf(ionic->pdev) || !ionic->vfs) {
+		ret = -EINVAL;
+	} else {
+		vfc.trust = set;
+		dev_dbg(ionic->dev, "%s: vf %d trust %d\n",
+			__func__, vf, vfc.trust);
+
+		ret = ionic_set_vf_config(ionic, vf, &vfc);
+		if (!ret)
+			ionic->vfs[vf].trusted = data;
+	}
+
+	up_write(&ionic->vf_op_lock);
+	return ret;
+}
+#endif
+
+static int ionic_set_vf_link_state(struct net_device *netdev, int vf, int set)
+{
+	struct ionic_vf_setattr_cmd vfc = { .attr = IONIC_VF_ATTR_LINKSTATE };
+	struct ionic_lif *lif = netdev_priv(netdev);
+	struct ionic *ionic = lif->ionic;
+	u8 data;
+	int ret;
+
+	switch (set) {
+	case IFLA_VF_LINK_STATE_ENABLE:
+		data = IONIC_VF_LINK_STATUS_UP;
+		break;
+	case IFLA_VF_LINK_STATE_DISABLE:
+		data = IONIC_VF_LINK_STATUS_DOWN;
+		break;
+	case IFLA_VF_LINK_STATE_AUTO:
+		data = IONIC_VF_LINK_STATUS_AUTO;
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	if (!netif_device_present(netdev))
+		return -EBUSY;
+
+	down_write(&ionic->vf_op_lock);
+
+	if (vf >= pci_num_vf(ionic->pdev) || !ionic->vfs) {
+		ret = -EINVAL;
+	} else {
+		vfc.linkstate = data;
+		dev_dbg(ionic->dev, "%s: vf %d linkstate %d\n",
+			__func__, vf, vfc.linkstate);
+
+		ret = ionic_set_vf_config(ionic, vf, &vfc);
+		if (!ret)
+			ionic->vfs[vf].linkstate = set;
+	}
+
+	up_write(&ionic->vf_op_lock);
+	return ret;
+}
+
+static void ionic_vf_attr_replay(struct ionic_lif *lif)
+{
+	struct ionic_vf_setattr_cmd vfc = { 0 };
+	struct ionic *ionic = lif->ionic;
+	struct ionic_vf *v;
+	int i;
+
+	if (!ionic->vfs)
+		return;
+
+	down_read(&ionic->vf_op_lock);
+
+	for (i = 0; i < ionic->num_vfs; i++) {
+		v = &ionic->vfs[i];
+
+		if (v->stats_pa) {
+			vfc.attr = IONIC_VF_ATTR_STATSADDR;
+			vfc.stats_pa = cpu_to_le64(v->stats_pa);
+			(void)ionic_set_vf_config(ionic, i, &vfc);
+			vfc.stats_pa = 0;
+		}
+
+		if (!is_zero_ether_addr(v->macaddr)) {
+			vfc.attr = IONIC_VF_ATTR_MAC;
+			ether_addr_copy(vfc.macaddr, v->macaddr);
+			(void)ionic_set_vf_config(ionic, i, &vfc);
+			eth_zero_addr(vfc.macaddr);
+		}
+
+		if (v->vlanid) {
+			vfc.attr = IONIC_VF_ATTR_VLAN;
+			vfc.vlanid = v->vlanid;
+			(void)ionic_set_vf_config(ionic, i, &vfc);
+			vfc.vlanid = 0;
+		}
+
+		if (v->maxrate) {
+			vfc.attr = IONIC_VF_ATTR_RATE;
+			vfc.maxrate = v->maxrate;
+			(void)ionic_set_vf_config(ionic, i, &vfc);
+			vfc.maxrate = 0;
+		}
+
+		if (v->spoofchk) {
+			vfc.attr = IONIC_VF_ATTR_SPOOFCHK;
+			vfc.spoofchk = v->spoofchk;
+			(void)ionic_set_vf_config(ionic, i, &vfc);
+			vfc.spoofchk = 0;
+		}
+
+		if (v->trusted) {
+			vfc.attr = IONIC_VF_ATTR_TRUST;
+			vfc.trust = v->trusted;
+			(void)ionic_set_vf_config(ionic, i, &vfc);
+			vfc.trust = 0;
+		}
+
+		if (v->linkstate) {
+			vfc.attr = IONIC_VF_ATTR_LINKSTATE;
+			vfc.linkstate = v->linkstate;
+			(void)ionic_set_vf_config(ionic, i, &vfc);
+			vfc.linkstate = 0;
+		}
+	}
+
+	up_read(&ionic->vf_op_lock);
+
+	ionic_vf_start(ionic, -1);
+}
+
+static const struct net_device_ops ionic_netdev_ops = {
+	.ndo_open               = ionic_open,
+	.ndo_stop               = ionic_stop,
+	.ndo_eth_ioctl		= ionic_eth_ioctl,
+	.ndo_start_xmit		= ionic_start_xmit,
+	.ndo_get_stats64	= ionic_get_stats64,
+	.ndo_set_rx_mode	= ionic_ndo_set_rx_mode,
+	.ndo_set_features	= ionic_set_features,
+	.ndo_set_mac_address	= ionic_set_mac_address,
+	.ndo_validate_addr	= eth_validate_addr,
+#ifdef HAVE_RHEL7_EXTENDED_MIN_MAX_MTU
+	.extended.ndo_change_mtu = ionic_change_mtu,
+#else
+	.ndo_change_mtu         = ionic_change_mtu,
+#endif
+	.ndo_tx_timeout         = ionic_tx_timeout,
+	.ndo_vlan_rx_add_vid    = ionic_vlan_rx_add_vid,
+	.ndo_vlan_rx_kill_vid   = ionic_vlan_rx_kill_vid,
+
+#ifdef HAVE_RHEL7_NET_DEVICE_OPS_EXT
+#ifdef HAVE_RHEL7_NETDEV_OPS_EXT_NDO_SET_VF_VLAN
+	.extended.ndo_set_vf_vlan	= ionic_set_vf_vlan,
+#endif
+#ifdef HAVE_NDO_SET_VF_TRUST
+	.extended.ndo_set_vf_trust	= ionic_set_vf_trust,
+#endif
+#else
+#if (RHEL_RELEASE_CODE == 0 || RHEL_RELEASE_VERSION(8, 0) < RHEL_RELEASE_CODE)
+	.ndo_set_vf_vlan	= ionic_set_vf_vlan,
+#endif
+	.ndo_set_vf_trust	= ionic_set_vf_trust,
+#endif
+	.ndo_set_vf_mac		= ionic_set_vf_mac,
+	.ndo_set_vf_rate	= ionic_set_vf_rate,
+	.ndo_set_vf_spoofchk	= ionic_set_vf_spoofchk,
+	.ndo_get_vf_config	= ionic_get_vf_config,
+	.ndo_set_vf_link_state	= ionic_set_vf_link_state,
+	.ndo_get_vf_stats       = ionic_get_vf_stats,
+
+#ifdef HAVE_RHEL7_NET_DEVICE_OPS_EXT
+/* RHEL7 requires this to be defined to enable extended ops.  RHEL7 uses the
+ * function get_ndo_ext to retrieve offsets for extended fields from with the
+ * net_device_ops struct and ndo_size is checked to determine whether or not
+ * the offset is valid.
+ */
+	.ndo_size		= sizeof(const struct net_device_ops),
+#endif
+};
+
+static const struct net_device_ops ionic_mnic_netdev_ops = {
+	.ndo_open               = ionic_open,
+	.ndo_stop               = ionic_stop,
+	.ndo_eth_ioctl		= ionic_eth_ioctl,
+	.ndo_start_xmit		= ionic_start_xmit,
+	.ndo_get_stats64	= ionic_get_stats64,
+	.ndo_set_rx_mode	= ionic_ndo_set_rx_mode,
+	.ndo_set_features	= ionic_set_features,
+	.ndo_set_mac_address	= ionic_set_mac_address,
+	.ndo_validate_addr	= eth_validate_addr,
+	.ndo_tx_timeout         = ionic_tx_timeout,
+	.ndo_vlan_rx_add_vid    = ionic_vlan_rx_add_vid,
+	.ndo_vlan_rx_kill_vid   = ionic_vlan_rx_kill_vid,
+#ifdef HAVE_RHEL7_EXTENDED_MIN_MAX_MTU
+	.extended.ndo_change_mtu = ionic_change_mtu,
+#else
+	.ndo_change_mtu         = ionic_change_mtu,
+#endif
+
+#ifdef HAVE_RHEL7_NET_DEVICE_OPS_EXT
+/* RHEL7 requires this to be defined to enable extended ops.  RHEL7 uses the
+ * function get_ndo_ext to retrieve offsets for extended fields from with the
+ * net_device_ops struct and ndo_size is checked to determine whether or not
+ * the offset is valid.
+ */
+	.ndo_size		= sizeof(const struct net_device_ops),
+#endif
+};
+
+static int ionic_cmb_reconfig(struct ionic_lif *lif,
+			      struct ionic_queue_params *qparam)
+{
+	struct ionic_queue_params start_qparams;
+	int err = 0;
+
+	/* When changing CMB queue parameters, we're using limited
+	 * on-device memory and don't have extra memory to use for
+	 * duplicate allocations, so we free it all first then
+	 * re-allocate with the new parameters.
+	 */
+
+	/* Checkpoint for possible unwind */
+	ionic_init_queue_params(lif, &start_qparams);
+
+	/* Stop and free the queues */
+	ionic_stop_queues_reconfig(lif);
+	ionic_txrx_free(lif);
+
+	/* Set up new qparams */
+	ionic_set_queue_params(lif, qparam);
+
+	if (netif_running(lif->netdev)) {
+		/* Alloc and start the new configuration */
+		err = ionic_txrx_alloc(lif);
+		if (err) {
+			dev_warn(lif->ionic->dev,
+				 "CMB reconfig failed, restoring values: %d\n", err);
+
+			/* Back out the changes */
+			ionic_set_queue_params(lif, &start_qparams);
+			err = ionic_txrx_alloc(lif);
+			if (err) {
+				dev_err(lif->ionic->dev,
+					"CMB restore failed: %d\n", err);
+				goto errout;
+			}
+		}
+
+		ionic_start_queues_reconfig(lif);
+	} else {
+		/* This was detached in ionic_stop_queues_reconfig() */
+		netif_device_attach(lif->netdev);
+	}
+
+errout:
+	return err;
+}
+
+static void ionic_swap_queues(struct ionic_qcq *a, struct ionic_qcq *b)
+{
+	/* only swapping the queues, not the napi, flags, or other stuff */
+	swap(a->q.features,   b->q.features);
+	swap(a->q.num_descs,  b->q.num_descs);
+	swap(a->q.desc_size,  b->q.desc_size);
+	swap(a->q.base,       b->q.base);
+	swap(a->q.base_pa,    b->q.base_pa);
+	swap(a->q.info,       b->q.info);
+	swap(a->q_base,       b->q_base);
+	swap(a->q_base_pa,    b->q_base_pa);
+	swap(a->q_size,       b->q_size);
+
+	swap(a->q.sg_desc_size, b->q.sg_desc_size);
+	swap(a->q.sg_base,    b->q.sg_base);
+	swap(a->q.sg_base_pa, b->q.sg_base_pa);
+	swap(a->sg_base,      b->sg_base);
+	swap(a->sg_base_pa,   b->sg_base_pa);
+	swap(a->sg_size,      b->sg_size);
+
+	swap(a->cq.num_descs, b->cq.num_descs);
+	swap(a->cq.desc_size, b->cq.desc_size);
+	swap(a->cq.base,      b->cq.base);
+	swap(a->cq.base_pa,   b->cq.base_pa);
+	swap(a->cq.info,      b->cq.info);
+	swap(a->cq_base,      b->cq_base);
+	swap(a->cq_base_pa,   b->cq_base_pa);
+	swap(a->cq_size,      b->cq_size);
+
+	ionic_debugfs_del_qcq(a);
+	ionic_debugfs_add_qcq(a->q.lif, a);
+}
+
+int ionic_reconfigure_queues(struct ionic_lif *lif,
+			     struct ionic_queue_params *qparam)
+{
+	unsigned int comp_sz, desc_sz, num_desc, sg_desc_sz;
+	struct ionic_qcq **tx_qcqs = NULL;
+	struct ionic_qcq **rx_qcqs = NULL;
+	unsigned int flags, i;
+	int err = 0;
+
+	/* Are we changing q params while CMB is on */
+	if (test_bit(IONIC_LIF_F_CMB_RINGS, lif->state) && qparam->cmb_enabled)
+		return ionic_cmb_reconfig(lif, qparam);
+
+	/* allocate temporary qcq arrays to hold new queue structs */
+	if (qparam->nxqs != lif->nxqs || qparam->ntxq_descs != lif->ntxq_descs) {
+		tx_qcqs = devm_kcalloc(lif->ionic->dev, lif->ionic->ntxqs_per_lif,
+				       sizeof(struct ionic_qcq *), GFP_KERNEL);
+		if (!tx_qcqs) {
+			err = -ENOMEM;
+			goto err_out;
+		}
+	}
+	if (qparam->nxqs != lif->nxqs ||
+	    qparam->nrxq_descs != lif->nrxq_descs ||
+	    qparam->rxq_features != lif->rxq_features) {
+		rx_qcqs = devm_kcalloc(lif->ionic->dev, lif->ionic->nrxqs_per_lif,
+				       sizeof(struct ionic_qcq *), GFP_KERNEL);
+		if (!rx_qcqs) {
+			err = -ENOMEM;
+			goto err_out;
+		}
+	}
+
+	/* allocate new desc_info and rings, but leave the interrupt setup
+	 * until later so as to not mess with the still-running queues
+	 */
+	if (tx_qcqs) {
+		num_desc = qparam->ntxq_descs;
+		desc_sz = sizeof(struct ionic_txq_desc);
+		comp_sz = sizeof(struct ionic_txq_comp);
+
+		if (lif->qtype_info[IONIC_QTYPE_TXQ].version >= 1 &&
+		    lif->qtype_info[IONIC_QTYPE_TXQ].sg_desc_sz ==
+		    sizeof(struct ionic_txq_sg_desc_v1))
+			sg_desc_sz = sizeof(struct ionic_txq_sg_desc_v1);
+		else
+			sg_desc_sz = sizeof(struct ionic_txq_sg_desc);
+
+		for (i = 0; i < qparam->nxqs; i++) {
+			/* If missing, short placeholder qcq needed for swap */
+			if (!lif->txqcqs[i]) {
+				flags = IONIC_QCQ_F_TX_STATS | IONIC_QCQ_F_SG;
+				err = ionic_qcq_alloc(lif, IONIC_QTYPE_TXQ, i, "tx", flags,
+						      4, desc_sz, comp_sz, sg_desc_sz,
+						      lif->kern_pid, &lif->txqcqs[i]);
+			}
+
+			flags = lif->txqcqs[i]->flags & ~IONIC_QCQ_F_INTR;
+			err = ionic_qcq_alloc(lif, IONIC_QTYPE_TXQ, i, "tx", flags,
+					      num_desc, desc_sz, comp_sz, sg_desc_sz,
+					      lif->kern_pid, &tx_qcqs[i]);
+			if (err)
+				goto err_out;
+		}
+	}
+
+	if (rx_qcqs) {
+		num_desc = qparam->nrxq_descs;
+		desc_sz = sizeof(struct ionic_rxq_desc);
+		comp_sz = sizeof(struct ionic_rxq_comp);
+		sg_desc_sz = sizeof(struct ionic_rxq_sg_desc);
+
+		if (qparam->rxq_features & IONIC_Q_F_2X_CQ_DESC)
+			comp_sz *= 2;
+
+		for (i = 0; i < qparam->nxqs; i++) {
+			/* If missing, short placeholder qcq needed for swap */
+			if (!lif->rxqcqs[i]) {
+				flags = IONIC_QCQ_F_RX_STATS | IONIC_QCQ_F_SG;
+				err = ionic_qcq_alloc(lif, IONIC_QTYPE_RXQ, i, "rx", flags,
+						      4, desc_sz, comp_sz, sg_desc_sz,
+						      lif->kern_pid, &lif->rxqcqs[i]);
+			}
+
+			flags = lif->rxqcqs[i]->flags & ~IONIC_QCQ_F_INTR;
+			err = ionic_qcq_alloc(lif, IONIC_QTYPE_RXQ, i, "rx", flags,
+					      num_desc, desc_sz, comp_sz, sg_desc_sz,
+					      lif->kern_pid, &rx_qcqs[i]);
+			if (err)
+				goto err_out;
+
+			rx_qcqs[i]->q.features = qparam->rxq_features;
+		}
+	}
+
+	/* stop and clean the queues */
+	ionic_stop_queues_reconfig(lif);
+
+	if (qparam->nxqs != lif->nxqs) {
+		err = netif_set_real_num_tx_queues(lif->netdev, qparam->nxqs);
+		if (err)
+			goto err_out_reinit_unlock;
+		err = netif_set_real_num_rx_queues(lif->netdev, qparam->nxqs);
+		if (err) {
+			netif_set_real_num_tx_queues(lif->netdev, lif->nxqs);
+			goto err_out_reinit_unlock;
+		}
+	}
+
+	/* swap new desc_info and rings, keeping existing interrupt config */
+	if (tx_qcqs) {
+		lif->ntxq_descs = qparam->ntxq_descs;
+		for (i = 0; i < qparam->nxqs; i++)
+			ionic_swap_queues(lif->txqcqs[i], tx_qcqs[i]);
+	}
+
+	if (rx_qcqs) {
+		lif->nrxq_descs = qparam->nrxq_descs;
+		for (i = 0; i < qparam->nxqs; i++)
+			ionic_swap_queues(lif->rxqcqs[i], rx_qcqs[i]);
+	}
+
+	/* if we need to change the interrupt layout, this is the time */
+	if (qparam->intr_split != test_bit(IONIC_LIF_F_SPLIT_INTR, lif->state) ||
+	    qparam->nxqs != lif->nxqs) {
+		if (qparam->intr_split) {
+			set_bit(IONIC_LIF_F_SPLIT_INTR, lif->state);
+		} else {
+			clear_bit(IONIC_LIF_F_SPLIT_INTR, lif->state);
+			lif->tx_coalesce_usecs = lif->rx_coalesce_usecs;
+			lif->tx_coalesce_hw = lif->rx_coalesce_hw;
+		}
+
+		/* Clear existing interrupt assignments.  We check for NULL here
+		 * because we're checking the whole array for potential qcqs, not
+		 * just those qcqs that have just been set up.
+		 */
+		for (i = 0; i < lif->ionic->ntxqs_per_lif; i++) {
+			if (lif->txqcqs[i])
+				ionic_qcq_intr_free(lif, lif->txqcqs[i]);
+			if (lif->rxqcqs[i])
+				ionic_qcq_intr_free(lif, lif->rxqcqs[i]);
+		}
+
+		/* re-assign the interrupts */
+		for (i = 0; i < qparam->nxqs; i++) {
+			lif->rxqcqs[i]->flags |= IONIC_QCQ_F_INTR;
+			err = ionic_alloc_qcq_interrupt(lif, lif->rxqcqs[i]);
+			ionic_intr_coal_init(lif->ionic->idev.intr_ctrl,
+					     lif->rxqcqs[i]->intr.index,
+					     lif->rx_coalesce_hw);
+
+			if (qparam->intr_split) {
+				lif->txqcqs[i]->flags |= IONIC_QCQ_F_INTR;
+				err = ionic_alloc_qcq_interrupt(lif, lif->txqcqs[i]);
+				ionic_intr_coal_init(lif->ionic->idev.intr_ctrl,
+						     lif->txqcqs[i]->intr.index,
+						     lif->tx_coalesce_hw);
+				if (test_bit(IONIC_LIF_F_TX_DIM_INTR, lif->state))
+					lif->txqcqs[i]->intr.dim_coal_hw = lif->tx_coalesce_hw;
+			} else {
+				lif->txqcqs[i]->flags &= ~IONIC_QCQ_F_INTR;
+				ionic_link_qcq_interrupts(lif->rxqcqs[i], lif->txqcqs[i]);
+			}
+		}
+	}
+
+	/* now we can rework the debugfs mappings */
+	if (tx_qcqs) {
+		for (i = 0; i < qparam->nxqs; i++) {
+			ionic_debugfs_del_qcq(lif->txqcqs[i]);
+			ionic_debugfs_add_qcq(lif, lif->txqcqs[i]);
+		}
+	}
+
+	if (rx_qcqs) {
+		for (i = 0; i < qparam->nxqs; i++) {
+			ionic_debugfs_del_qcq(lif->rxqcqs[i]);
+			ionic_debugfs_add_qcq(lif, lif->rxqcqs[i]);
+		}
+	}
+
+	swap(lif->nxqs, qparam->nxqs);
+	swap(lif->rxq_features, qparam->rxq_features);
+
+err_out_reinit_unlock:
+	/* re-init the queues, but don't lose an error code */
+	if (err)
+		ionic_start_queues_reconfig(lif);
+	else
+		err = ionic_start_queues_reconfig(lif);
+
+err_out:
+	/* free old allocs without cleaning intr */
+	for (i = 0; i < qparam->nxqs; i++) {
+		if (tx_qcqs && tx_qcqs[i]) {
+			tx_qcqs[i]->flags &= ~IONIC_QCQ_F_INTR;
+			ionic_qcq_free(lif, tx_qcqs[i]);
+			devm_kfree(lif->ionic->dev, tx_qcqs[i]);
+			tx_qcqs[i] = NULL;
+		}
+		if (rx_qcqs && rx_qcqs[i]) {
+			rx_qcqs[i]->flags &= ~IONIC_QCQ_F_INTR;
+			ionic_qcq_free(lif, rx_qcqs[i]);
+			devm_kfree(lif->ionic->dev, rx_qcqs[i]);
+			rx_qcqs[i] = NULL;
+		}
+	}
+
+	/* free q array */
+	if (rx_qcqs) {
+		devm_kfree(lif->ionic->dev, rx_qcqs);
+		rx_qcqs = NULL;
+	}
+	if (tx_qcqs) {
+		devm_kfree(lif->ionic->dev, tx_qcqs);
+		tx_qcqs = NULL;
+	}
+
+	/* clean the unused dma and info allocations when new set is smaller
+	 * than the full array, but leave the qcq shells in place
+	 */
+	for (i = lif->nxqs; i < lif->ionic->ntxqs_per_lif; i++) {
+		if (lif->txqcqs && lif->txqcqs[i]) {
+			lif->txqcqs[i]->flags &= ~IONIC_QCQ_F_INTR;
+			ionic_qcq_free(lif, lif->txqcqs[i]);
+		}
+
+		if (lif->rxqcqs && lif->rxqcqs[i]) {
+			lif->rxqcqs[i]->flags &= ~IONIC_QCQ_F_INTR;
+			ionic_qcq_free(lif, lif->rxqcqs[i]);
+		}
+	}
+
+	if (err)
+		netdev_info(lif->netdev, "%s: failed %d\n", __func__, err);
+
+	return err;
+}
+
+int ionic_lif_alloc(struct ionic *ionic)
+{
+	struct device *dev = ionic->dev;
+	union ionic_lif_identity *lid;
+	struct net_device *netdev;
+	struct ionic_lif *lif;
+	u32 minfs, maxfs;
+	int tbl_sz;
+	int err;
+
+	lid = kzalloc(sizeof(*lid), GFP_KERNEL);
+	if (!lid)
+		return -ENOMEM;
+
+	netdev = ionic_alloc_netdev(ionic);
+	if (!netdev) {
+		dev_err(dev, "Cannot allocate netdev, aborting\n");
+		err = -ENOMEM;
+		goto err_out_free_lid;
+	}
+
+	SET_NETDEV_DEV(netdev, dev);
+
+	lif = netdev_priv(netdev);
+	lif->netdev = netdev;
+	ionic->lif = lif;
+
+	if (ionic->is_mgmt_nic || ionic->pfdev)
+		netdev->netdev_ops = &ionic_mnic_netdev_ops;
+	else
+		netdev->netdev_ops = &ionic_netdev_ops;
+
+	ionic_ethtool_set_ops(netdev);
+	netdev->watchdog_timeo = 2 * HZ;
+	netif_carrier_off(netdev);
+
+	lif->nrdma_eqs_avail = ionic->nrdma_eqs_per_lif;
+	lif->nrdma_eqs = ionic->nrdma_eqs_per_lif;
+	lif->nxqs = ionic->ntxqs_per_lif;
+
+	lif->identity = lid;
+	lif->lif_type = IONIC_LIF_TYPE_CLASSIC;
+	ionic_lif_identify(ionic, lif->lif_type, lif->identity);
+
+	lif->ionic = ionic;
+	lif->index = 0;
+	if (is_kdump_kernel()) {
+		lif->ntxq_descs = IONIC_MIN_TXRX_DESC;
+		lif->nrxq_descs = IONIC_MIN_TXRX_DESC;
+	} else {
+		lif->ntxq_descs = IONIC_DEF_TXRX_DESC;
+		lif->nrxq_descs = IONIC_DEF_TXRX_DESC;
+	}
+
+	/* find mtu limits */
+	minfs = __le32_to_cpu(lif->identity->eth.min_frame_size);
+	minfs = max_t(unsigned int, minfs, ETH_MIN_MTU);
+	maxfs = __le32_to_cpu(lif->identity->eth.max_frame_size)  - ETH_HLEN - VLAN_HLEN;
+#ifdef HAVE_NETDEVICE_MIN_MAX_MTU
+#ifdef HAVE_RHEL7_EXTENDED_MIN_MAX_MTU
+	lif->netdev->extended->min_mtu = minfs;
+	lif->netdev->extended->max_mtu = maxfs;
+#else
+	lif->netdev->min_mtu = minfs;
+	lif->netdev->max_mtu = maxfs;
+#endif /* HAVE_RHEL7_EXTENDED_MIN_MAX_MTU */
+#endif /* HAVE_NETDEVICE_MIN_MAX_MTU */
+
+	/* Convert the default coalesce value to actual hw resolution */
+	lif->rx_coalesce_usecs = IONIC_ITR_COAL_USEC_DEFAULT;
+	lif->rx_coalesce_hw = ionic_coal_usec_to_hw(lif->ionic,
+						    lif->rx_coalesce_usecs);
+	lif->tx_coalesce_usecs = lif->rx_coalesce_usecs;
+	lif->tx_coalesce_hw = lif->rx_coalesce_hw;
+	set_bit(IONIC_LIF_F_RX_DIM_INTR, lif->state);
+	set_bit(IONIC_LIF_F_TX_DIM_INTR, lif->state);
+
+	snprintf(lif->name, sizeof(lif->name), "lif%u", lif->index);
+
+	mutex_init(&lif->queue_lock);
+	mutex_init(&lif->config_lock);
+	mutex_init(&lif->dbid_inuse_lock);
+
+	spin_lock_init(&lif->adminq_lock);
+
+	spin_lock_init(&lif->deferred.lock);
+	INIT_LIST_HEAD(&lif->deferred.list);
+	INIT_WORK(&lif->deferred.work, ionic_lif_deferred_work);
+
+	/* allocate lif info */
+	lif->info_sz = ALIGN(sizeof(*lif->info), PAGE_SIZE);
+	lif->info = dma_alloc_coherent(dev, lif->info_sz,
+				       &lif->info_pa, GFP_KERNEL);
+	if (!lif->info) {
+		dev_err(dev, "Failed to allocate lif info, aborting\n");
+		err = -ENOMEM;
+		goto err_out_free_mutex;
+	}
+
+	ionic_debugfs_add_lif(lif);
+
+	/* allocate control queues and txrx queue arrays */
+	ionic_lif_queue_identify(lif);
+	err = ionic_qcqs_alloc(lif);
+	if (err)
+		goto err_out_free_lif_info;
+
+	/* allocate rss indirection table */
+	tbl_sz = le16_to_cpu(lif->ionic->ident.lif.eth.rss_ind_tbl_sz);
+	lif->rss_ind_tbl_sz = sizeof(*lif->rss_ind_tbl) * tbl_sz;
+	lif->rss_ind_tbl = dma_alloc_coherent(dev, lif->rss_ind_tbl_sz,
+					      &lif->rss_ind_tbl_pa,
+					      GFP_KERNEL);
+
+	if (!lif->rss_ind_tbl) {
+		err = -ENOMEM;
+		dev_err(dev, "Failed to allocate rss indirection table, aborting\n");
+		goto err_out_free_qcqs;
+	}
+	netdev_rss_key_fill(lif->rss_hash_key, IONIC_RSS_HASH_KEY_SIZE);
+
+	ionic_lif_alloc_phc(lif);
+
+	return 0;
+
+err_out_free_qcqs:
+	ionic_qcqs_free(lif);
+err_out_free_lif_info:
+	dma_free_coherent(dev, lif->info_sz, lif->info, lif->info_pa);
+	lif->info = NULL;
+	lif->info_pa = 0;
+err_out_free_mutex:
+	mutex_destroy(&lif->config_lock);
+	mutex_destroy(&lif->queue_lock);
+	mutex_destroy(&lif->dbid_inuse_lock);
+	free_netdev(lif->netdev);
+	lif = NULL;
+err_out_free_lid:
+	kfree(lid);
+
+	return err;
+}
+
+static void ionic_lif_reset(struct ionic_lif *lif)
+{
+	struct ionic_dev *idev = &lif->ionic->idev;
+
+	mutex_lock(&lif->ionic->dev_cmd_lock);
+	ionic_dev_cmd_lif_reset(idev, lif->index);
+	ionic_dev_cmd_wait(lif->ionic, devcmd_timeout);
+	mutex_unlock(&lif->ionic->dev_cmd_lock);
+}
+
+static void ionic_lif_handle_fw_down(struct ionic_lif *lif)
+{
+	struct ionic *ionic = lif->ionic;
+
+	if (test_and_set_bit(IONIC_LIF_F_FW_RESET, lif->state))
+		return;
+
+	dev_info(ionic->dev, "FW Down: Stopping LIFs\n");
+
+	/* put off the next watchdog if it has been set up */
+	netif_device_detach(lif->netdev);
+
+	mutex_lock(&lif->queue_lock);
+	if (test_bit(IONIC_LIF_F_UP, lif->state)) {
+		dev_info(ionic->dev, "Surprise FW stop, stopping queues\n");
+		ionic_stop_queues(lif);
+	}
+
+	if (netif_running(lif->netdev)) {
+		ionic_txrx_deinit(lif);
+		ionic_txrx_free(lif);
+	}
+	ionic_lif_deinit(lif);
+	ionic_reset(ionic);
+	ionic_qcqs_free(lif);
+
+	mutex_unlock(&lif->queue_lock);
+
+	clear_bit(IONIC_LIF_F_FW_STOPPING, lif->state);
+	dev_info(ionic->dev, "FW Down: LIFs stopped\n");
+}
+
+static void ionic_lif_handle_fw_up(struct ionic_lif *lif)
+{
+	struct ionic *ionic = lif->ionic;
+	int err;
+
+	if (!test_bit(IONIC_LIF_F_FW_RESET, lif->state))
+		return;
+
+	dev_info(ionic->dev, "FW Up: restarting LIFs\n");
+
+	ionic_init_devinfo(ionic);
+	err = ionic_identify(ionic);
+	if (err)
+		goto err_out;
+	err = ionic_port_identify(ionic);
+	if (err)
+		goto err_out;
+	err = ionic_port_init(ionic);
+	if (err)
+		goto err_out;
+
+	mutex_lock(&lif->queue_lock);
+
+	if (test_and_clear_bit(IONIC_LIF_F_BROKEN, lif->state))
+		dev_info(ionic->dev, "FW Up: clearing broken state\n");
+
+	err = ionic_qcqs_alloc(lif);
+	if (err)
+		goto err_unlock;
+
+	err = ionic_lif_init(lif);
+	if (err)
+		goto err_qcqs_free;
+
+	ionic_vf_attr_replay(lif);
+
+	if (lif->registered)
+		ionic_lif_set_netdev_info(lif);
+
+	ionic_rx_filter_replay(lif);
+
+	if (netif_running(lif->netdev)) {
+		err = ionic_txrx_alloc(lif);
+		if (err)
+			goto err_lifs_deinit;
+
+		err = ionic_txrx_init(lif);
+		if (err)
+			goto err_txrx_free;
+	}
+
+	mutex_unlock(&lif->queue_lock);
+
+	clear_bit(IONIC_LIF_F_FW_RESET, lif->state);
+	ionic_link_status_check_request(lif, CAN_SLEEP);
+	netif_device_attach(lif->netdev);
+	dev_info(ionic->dev, "FW Up: LIFs restarted\n");
+
+	/* restore the hardware timestamping queues */
+	ionic_lif_hwstamp_replay(lif);
+
+	return;
+
+err_txrx_free:
+	ionic_txrx_free(lif);
+err_lifs_deinit:
+	ionic_lif_deinit(lif);
+err_qcqs_free:
+	ionic_qcqs_free(lif);
+err_unlock:
+	mutex_unlock(&lif->queue_lock);
+err_out:
+	dev_err(ionic->dev, "FW Up: LIFs restart failed - err %d\n", err);
+}
+
+static void ionic_lif_dbid_inuse_free(struct ionic_lif *lif)
+{
+	mutex_lock(&lif->dbid_inuse_lock);
+	bitmap_free(lif->dbid_inuse);
+	lif->dbid_inuse = NULL;
+	mutex_unlock(&lif->dbid_inuse_lock);
+}
+
+void ionic_lif_free(struct ionic_lif *lif)
+{
+	struct device *dev = lif->ionic->dev;
+
+	ionic_lif_free_phc(lif);
+
+	/* free rss indirection table */
+	dma_free_coherent(dev, lif->rss_ind_tbl_sz, lif->rss_ind_tbl,
+			  lif->rss_ind_tbl_pa);
+	lif->rss_ind_tbl = NULL;
+	lif->rss_ind_tbl_pa = 0;
+
+	/* free queues */
+	ionic_qcqs_free(lif);
+	if (!test_bit(IONIC_LIF_F_FW_RESET, lif->state))
+		ionic_lif_reset(lif);
+
+	/* free lif info */
+	kfree(lif->identity);
+	dma_free_coherent(dev, lif->info_sz, lif->info, lif->info_pa);
+	lif->info = NULL;
+	lif->info_pa = 0;
+
+	/* unmap doorbell page */
+	ionic_bus_unmap_dbpage(lif->ionic, lif->kern_dbpage);
+	lif->kern_dbpage = NULL;
+	ionic_lif_dbid_inuse_free(lif);
+
+	mutex_destroy(&lif->config_lock);
+	mutex_destroy(&lif->queue_lock);
+	mutex_destroy(&lif->dbid_inuse_lock);
+
+	/* free netdev & lif */
+	ionic_debugfs_del_lif(lif);
+	free_netdev(lif->netdev);
+}
+
+void ionic_lif_deinit(struct ionic_lif *lif)
+{
+	if (!test_and_clear_bit(IONIC_LIF_F_INITED, lif->state))
+		return;
+
+	if (!test_bit(IONIC_LIF_F_FW_RESET, lif->state)) {
+		cancel_work_sync(&lif->deferred.work);
+		cancel_work_sync(&lif->tx_timeout_work);
+		ionic_rx_filters_deinit(lif);
+		if (lif->netdev->features & NETIF_F_RXHASH)
+			ionic_lif_rss_deinit(lif);
+	}
+
+	ionic_eqs_deinit(lif->ionic);
+	ionic_eqs_free(lif->ionic);
+
+	napi_disable(&lif->adminqcq->napi);
+	ionic_lif_qcq_deinit(lif, lif->notifyqcq);
+	ionic_lif_qcq_deinit(lif, lif->adminqcq);
+
+	ionic_lif_dbid_inuse_free(lif);
+
+	ionic_lif_reset(lif);
+}
+
+static int ionic_lif_adminq_init(struct ionic_lif *lif)
+{
+	struct device *dev = lif->ionic->dev;
+	struct ionic_q_init_comp comp;
+	struct ionic_dev *idev;
+	struct ionic_qcq *qcq;
+	struct ionic_queue *q;
+	int err;
+
+	idev = &lif->ionic->idev;
+	qcq = lif->adminqcq;
+	q = &qcq->q;
+
+	mutex_lock(&lif->ionic->dev_cmd_lock);
+	ionic_dev_cmd_adminq_init(idev, qcq, lif->index, qcq->intr.index);
+	err = ionic_dev_cmd_wait(lif->ionic, devcmd_timeout);
+	ionic_dev_cmd_comp(idev, (union ionic_dev_cmd_comp *)&comp);
+	mutex_unlock(&lif->ionic->dev_cmd_lock);
+	if (err) {
+		netdev_err(lif->netdev, "adminq init failed %d\n", err);
+		return err;
+	}
+
+	q->hw_type = comp.hw_type;
+	q->hw_index = le32_to_cpu(comp.hw_index);
+	q->dbval = IONIC_DBELL_QID(q->hw_index);
+
+	dev_dbg(dev, "adminq->hw_type %d\n", q->hw_type);
+	dev_dbg(dev, "adminq->hw_index %d\n", q->hw_index);
+
+	q->dbell_deadline = IONIC_ADMIN_DOORBELL_DEADLINE;
+	q->dbell_jiffies = jiffies;
+
+	netif_napi_add(lif->netdev, &qcq->napi, ionic_adminq_napi);
+
+	qcq->napi_qcq = qcq;
+	timer_setup(&qcq->napi_deadline, ionic_napi_deadline, 0);
+
+	napi_enable(&qcq->napi);
+
+	if (qcq->flags & IONIC_QCQ_F_INTR)
+		ionic_intr_mask(idev->intr_ctrl, qcq->intr.index,
+				IONIC_INTR_MASK_CLEAR);
+
+	qcq->flags |= IONIC_QCQ_F_INITED;
+
+	return 0;
+}
+
+static int ionic_lif_notifyq_init(struct ionic_lif *lif)
+{
+	struct ionic_qcq *qcq = lif->notifyqcq;
+	struct device *dev = lif->ionic->dev;
+	struct ionic_queue *q = &qcq->q;
+	int err;
+
+	struct ionic_admin_ctx ctx = {
+		.work = COMPLETION_INITIALIZER_ONSTACK(ctx.work),
+		.cmd.q_init = {
+			.opcode = IONIC_CMD_Q_INIT,
+			.lif_index = cpu_to_le16(lif->index),
+			.type = q->type,
+			.ver = lif->qtype_info[q->type].version,
+			.index = cpu_to_le32(q->index),
+			.flags = cpu_to_le16(IONIC_QINIT_F_IRQ |
+					     IONIC_QINIT_F_ENA),
+			.intr_index = cpu_to_le16(lif->adminqcq->intr.index),
+			.pid = cpu_to_le16(q->pid),
+			.ring_size = ilog2(q->num_descs),
+			.ring_base = cpu_to_le64(q->base_pa),
+		}
+	};
+
+	dev_dbg(dev, "notifyq_init.pid %d\n", ctx.cmd.q_init.pid);
+	dev_dbg(dev, "notifyq_init.index %d\n", ctx.cmd.q_init.index);
+	dev_dbg(dev, "notifyq_init.ring_base 0x%llx\n", ctx.cmd.q_init.ring_base);
+	dev_dbg(dev, "notifyq_init.ring_size %d\n", ctx.cmd.q_init.ring_size);
+
+	err = ionic_adminq_post_wait(lif, &ctx);
+	if (err) {
+		netdev_err(lif->netdev, "notifyq init failed %d\n", err);
+		return err;
+	}
+
+	lif->last_eid = 0;
+	q->hw_type = ctx.comp.q_init.hw_type;
+	q->hw_index = le32_to_cpu(ctx.comp.q_init.hw_index);
+	q->dbval = IONIC_DBELL_QID(q->hw_index);
+
+	dev_dbg(dev, "notifyq->hw_type %d\n", q->hw_type);
+	dev_dbg(dev, "notifyq->hw_index %d\n", q->hw_index);
+
+	/* preset the callback info */
+	q->info[0].cb_arg = lif;
+
+	qcq->flags |= IONIC_QCQ_F_INITED;
+
+	return 0;
+}
+
+static int ionic_station_set(struct ionic_lif *lif)
+{
+	struct net_device *netdev = lif->netdev;
+	struct ionic_admin_ctx ctx = {
+		.work = COMPLETION_INITIALIZER_ONSTACK(ctx.work),
+		.cmd.lif_getattr = {
+			.opcode = IONIC_CMD_LIF_GETATTR,
+			.index = cpu_to_le16(lif->index),
+			.attr = IONIC_LIF_ATTR_MAC,
+		},
+	};
+	u8  mac_address[ETH_ALEN];
+	struct sockaddr addr;
+	int err;
+
+	err = ionic_adminq_post_wait(lif, &ctx);
+	if (err)
+		return err;
+	netdev_dbg(lif->netdev, "found initial MAC addr %pM\n",
+		   ctx.comp.lif_getattr.mac);
+	ether_addr_copy(mac_address, ctx.comp.lif_getattr.mac);
+
+	if (is_zero_ether_addr(mac_address)) {
+		eth_hw_addr_random(netdev);
+		netdev_dbg(netdev, "Random Mac generated: %pM\n", netdev->dev_addr);
+		ether_addr_copy(mac_address, netdev->dev_addr);
+
+		err = ionic_program_mac(lif, mac_address);
+		if (err < 0)
+			return err;
+
+		if (err > 0) {
+			netdev_dbg(netdev, "%s:SET/GET ATTR Mac is not same-due to old FW running\n",
+				   __func__);
+			return 0;
+		}
+	}
+
+	if (!is_zero_ether_addr(netdev->dev_addr)) {
+		/* If the netdev mac is non-zero and doesn't match the default
+		 * device address, it was set by something earlier and we're
+		 * likely here again after a fw-upgrade reset.  We need to be
+		 * sure the netdev mac is in our filter list.
+		 */
+		if (!ether_addr_equal(mac_address,
+				      netdev->dev_addr))
+			ionic_lif_addr_add(lif, netdev->dev_addr);
+	} else {
+		/* Update the netdev mac with the device's mac */
+		ether_addr_copy(addr.sa_data, mac_address);
+		addr.sa_family = AF_INET;
+		err = eth_prepare_mac_addr_change(netdev, &addr);
+		if (err) {
+			netdev_warn(lif->netdev, "ignoring bad MAC addr from NIC %pM - err %d\n",
+				    addr.sa_data, err);
+			return 0;
+		}
+
+		eth_commit_mac_addr_change(netdev, &addr);
+	}
+
+	netdev_dbg(lif->netdev, "adding station MAC addr %pM\n",
+		   netdev->dev_addr);
+	ionic_lif_addr_add(lif, netdev->dev_addr);
+
+	return 0;
+}
+
+int ionic_lif_init(struct ionic_lif *lif)
+{
+	struct ionic_dev *idev = &lif->ionic->idev;
+	struct device *dev = lif->ionic->dev;
+	struct ionic_lif_init_comp comp;
+	int dbpage_num;
+	int err;
+
+	mutex_lock(&lif->ionic->dev_cmd_lock);
+	ionic_dev_cmd_lif_init(idev, lif->index, lif->info_pa);
+	err = ionic_dev_cmd_wait(lif->ionic, devcmd_timeout);
+	ionic_dev_cmd_comp(idev, (union ionic_dev_cmd_comp *)&comp);
+	mutex_unlock(&lif->ionic->dev_cmd_lock);
+	if (err)
+		return err;
+
+	lif->hw_index = le16_to_cpu(comp.hw_index);
+
+	/* now that we have the hw_index we can figure out our doorbell page */
+	lif->dbid_count = le32_to_cpu(lif->ionic->ident.dev.ndbpgs_per_lif);
+	if (!lif->dbid_count) {
+		dev_err(dev, "No doorbell pages, aborting\n");
+		return -EINVAL;
+	}
+
+	mutex_lock(&lif->dbid_inuse_lock);
+	lif->dbid_inuse = bitmap_zalloc(lif->dbid_count, GFP_KERNEL);
+	if (!lif->dbid_inuse) {
+		dev_err(dev, "Failed alloc doorbell id bitmap, aborting\n");
+		mutex_unlock(&lif->dbid_inuse_lock);
+		return -ENOMEM;
+	}
+
+	/* first doorbell id reserved for kernel (dbid aka pid == zero) */
+	set_bit(0, lif->dbid_inuse);
+	mutex_unlock(&lif->dbid_inuse_lock);
+	lif->kern_pid = 0;
+
+	dbpage_num = ionic_db_page_num(lif, lif->kern_pid);
+	lif->kern_dbpage = ionic_bus_map_dbpage(lif->ionic, dbpage_num);
+	if (!lif->kern_dbpage) {
+		dev_err(dev, "Cannot map dbpage, aborting\n");
+		err = -ENOMEM;
+		goto err_out_free_dbid;
+	}
+
+	if (lif->ionic->neth_eqs) {
+		err = ionic_eqs_alloc(lif->ionic);
+		if (err) {
+			dev_err(dev, "Cannot allocate EQs: %d\n", err);
+			lif->ionic->neth_eqs = 0;
+		} else {
+			err = ionic_eqs_init(lif->ionic);
+			if (err) {
+				dev_err(dev, "Cannot init EQs: %d\n", err);
+				ionic_eqs_free(lif->ionic);
+				lif->ionic->neth_eqs = 0;
+			}
+		}
+	}
+
+	err = ionic_lif_adminq_init(lif);
+	if (err)
+		goto err_out_adminq_deinit;
+
+	if (lif->ionic->nnqs_per_lif) {
+		err = ionic_lif_notifyq_init(lif);
+		if (err)
+			goto err_out_notifyq_deinit;
+	}
+
+	err = ionic_init_nic_features(lif);
+	if (err)
+		goto err_out_notifyq_deinit;
+
+	if (!test_bit(IONIC_LIF_F_FW_RESET, lif->state)) {
+		err = ionic_rx_filters_init(lif);
+		if (err)
+			goto err_out_notifyq_deinit;
+	}
+
+	err = ionic_station_set(lif);
+	if (err)
+		goto err_out_notifyq_deinit;
+
+	lif->rx_copybreak = rx_copybreak;
+
+	set_bit(IONIC_LIF_F_INITED, lif->state);
+
+	INIT_WORK(&lif->tx_timeout_work, ionic_tx_timeout_work);
+
+	return 0;
+
+err_out_notifyq_deinit:
+	napi_disable(&lif->adminqcq->napi);
+	ionic_lif_qcq_deinit(lif, lif->notifyqcq);
+err_out_adminq_deinit:
+	ionic_lif_qcq_deinit(lif, lif->adminqcq);
+	ionic_eqs_deinit(lif->ionic);
+	ionic_eqs_free(lif->ionic);
+	ionic_lif_reset(lif);
+	ionic_bus_unmap_dbpage(lif->ionic, lif->kern_dbpage);
+	lif->kern_dbpage = NULL;
+err_out_free_dbid:
+	ionic_lif_dbid_inuse_free(lif);
+
+	return err;
+}
+
+static void ionic_lif_notify_work(struct work_struct *ws)
+{
+}
+
+static void ionic_lif_set_netdev_info(struct ionic_lif *lif)
+{
+	struct ionic_admin_ctx ctx = {
+		.work = COMPLETION_INITIALIZER_ONSTACK(ctx.work),
+		.cmd.lif_setattr = {
+			.opcode = IONIC_CMD_LIF_SETATTR,
+			.index = cpu_to_le16(lif->index),
+			.attr = IONIC_LIF_ATTR_NAME,
+		},
+	};
+
+	strscpy(ctx.cmd.lif_setattr.name, lif->netdev->name,
+		sizeof(ctx.cmd.lif_setattr.name));
+
+	ionic_adminq_post_wait(lif, &ctx);
+}
+
+struct ionic_lif *ionic_netdev_lif(struct net_device *netdev)
+{
+	if (!netdev || netdev->netdev_ops->ndo_start_xmit != ionic_start_xmit)
+		return NULL;
+
+	return netdev_priv(netdev);
+}
+
+static int ionic_lif_notify(struct notifier_block *nb,
+			    unsigned long event, void *info)
+{
+	struct net_device *ndev = netdev_notifier_info_to_dev(info);
+	struct ionic *ionic = container_of(nb, struct ionic, nb);
+	struct ionic_lif *lif = ionic_netdev_lif(ndev);
+
+	if (!lif || lif->ionic != ionic)
+		return NOTIFY_DONE;
+
+	switch (event) {
+	case NETDEV_CHANGENAME:
+		ionic_lif_set_netdev_info(lif);
+		break;
+	}
+
+	return NOTIFY_DONE;
+}
+
+int ionic_lif_register(struct ionic_lif *lif)
+{
+	int err;
+
+	ionic_lif_register_phc(lif);
+
+	INIT_WORK(&lif->ionic->nb_work, ionic_lif_notify_work);
+
+	lif->ionic->nb.notifier_call = ionic_lif_notify;
+
+	err = register_netdevice_notifier(&lif->ionic->nb);
+	if (err)
+		lif->ionic->nb.notifier_call = NULL;
+
+	/* only register LIF0 for now */
+	err = register_netdev(lif->netdev);
+	if (err) {
+		dev_err(lif->ionic->dev, "Cannot register net device, aborting\n");
+		ionic_lif_unregister_phc(lif);
+		return err;
+	}
+
+	ionic_link_status_check_request(lif, CAN_SLEEP);
+	lif->registered = true;
+	ionic_lif_set_netdev_info(lif);
+
+	return 0;
+}
+
+void ionic_lif_unregister(struct ionic_lif *lif)
+{
+	if (lif->ionic->nb.notifier_call) {
+		unregister_netdevice_notifier(&lif->ionic->nb);
+		cancel_work_sync(&lif->ionic->nb_work);
+		lif->ionic->nb.notifier_call = NULL;
+	}
+
+	if (lif->netdev->reg_state == NETREG_REGISTERED)
+		unregister_netdev(lif->netdev);
+
+	ionic_lif_unregister_phc(lif);
+
+	lif->registered = false;
+}
+
+static void ionic_lif_queue_identify(struct ionic_lif *lif)
+{
+	union ionic_q_identity __iomem *q_ident;
+	struct ionic *ionic = lif->ionic;
+	struct ionic_dev *idev;
+	int qtype;
+	int err;
+
+	idev = &lif->ionic->idev;
+	q_ident = (union ionic_q_identity __iomem *)&idev->dev_cmd_regs->data;
+
+	for (qtype = 0; qtype < ARRAY_SIZE(ionic_qtype_versions); qtype++) {
+		struct ionic_qtype_info *qti = &lif->qtype_info[qtype];
+
+		/* filter out the ones we know about */
+		switch (qtype) {
+		case IONIC_QTYPE_ADMINQ:
+		case IONIC_QTYPE_NOTIFYQ:
+		case IONIC_QTYPE_RXQ:
+		case IONIC_QTYPE_TXQ:
+			break;
+		default:
+			continue;
+		}
+
+		memset(qti, 0, sizeof(*qti));
+
+		mutex_lock(&ionic->dev_cmd_lock);
+		ionic_dev_cmd_queue_identify(idev, lif->lif_type, qtype,
+					     ionic_qtype_versions[qtype]);
+		err = ionic_dev_cmd_wait(ionic, devcmd_timeout);
+		if (!err) {
+			qti->version   = ioread8(&q_ident->version);
+			qti->supported = ioread8(&q_ident->supported);
+			qti->features  = readq(&q_ident->features);
+			qti->desc_sz   = ioread16(&q_ident->desc_sz);
+			qti->comp_sz   = ioread16(&q_ident->comp_sz);
+			qti->sg_desc_sz   = ioread16(&q_ident->sg_desc_sz);
+			qti->max_sg_elems = ioread16(&q_ident->max_sg_elems);
+			qti->sg_desc_stride = ioread16(&q_ident->sg_desc_stride);
+		}
+		mutex_unlock(&ionic->dev_cmd_lock);
+
+		if (err == -EINVAL) {
+			dev_err(ionic->dev, "qtype %d not supported\n", qtype);
+			continue;
+		} else if (err == -EIO) {
+			dev_err(ionic->dev, "q_ident failed, not supported on older FW\n");
+			return;
+		} else if (err) {
+			dev_err(ionic->dev, "q_ident failed, qtype %d: %d\n",
+				qtype, err);
+			return;
+		}
+
+		dev_dbg(ionic->dev, " qtype[%d].version = %d\n",
+			qtype, qti->version);
+		dev_dbg(ionic->dev, " qtype[%d].supported = 0x%02x\n",
+			qtype, qti->supported);
+		dev_dbg(ionic->dev, " qtype[%d].features = 0x%04llx\n",
+			qtype, qti->features);
+		dev_dbg(ionic->dev, " qtype[%d].desc_sz = %d\n",
+			qtype, qti->desc_sz);
+		dev_dbg(ionic->dev, " qtype[%d].comp_sz = %d\n",
+			qtype, qti->comp_sz);
+		dev_dbg(ionic->dev, " qtype[%d].sg_desc_sz = %d\n",
+			qtype, qti->sg_desc_sz);
+		dev_dbg(ionic->dev, " qtype[%d].max_sg_elems = %d\n",
+			qtype, qti->max_sg_elems);
+		dev_dbg(ionic->dev, " qtype[%d].sg_desc_stride = %d\n",
+			qtype, qti->sg_desc_stride);
+	}
+
+	/* Make sure that EQ support is disabled if not all the
+	 * bits are in place.
+	 *
+	 * This is to support internal testing with intermediate FW
+	 * versions, especially with testing FW upgrade, and shouldn't
+	 * be needed in released versions.
+	 */
+	if ((lif->qtype_info[IONIC_QTYPE_RXQ].features & IONIC_QIDENT_F_EQ) !=
+	    (lif->qtype_info[IONIC_QTYPE_TXQ].features & IONIC_QIDENT_F_EQ)) {
+		dev_warn(ionic->dev, "EQ version bugfix\n");
+		lif->qtype_info[IONIC_QTYPE_RXQ].features &= ~IONIC_QIDENT_F_EQ;
+		lif->qtype_info[IONIC_QTYPE_TXQ].features &= ~IONIC_QIDENT_F_EQ;
+		ionic->neth_eqs = 0;
+	}
+}
+
+int ionic_lif_identify(struct ionic *ionic, u8 lif_type,
+		       union ionic_lif_identity *lid)
+{
+	struct ionic_dev *idev = &ionic->idev;
+	size_t sz;
+	int err;
+
+	sz = min(sizeof(*lid), sizeof(idev->dev_cmd_regs->data));
+
+	mutex_lock(&ionic->dev_cmd_lock);
+	ionic_dev_cmd_lif_identify(idev, lif_type, IONIC_IDENTITY_VERSION_1);
+	err = ionic_dev_cmd_wait(ionic, devcmd_timeout);
+	memcpy_fromio(lid, &idev->dev_cmd_regs->data, sz);
+	mutex_unlock(&ionic->dev_cmd_lock);
+	if (err)
+		return (err);
+
+	dev_dbg(ionic->dev, "capabilities 0x%llx\n",
+		le64_to_cpu(lid->capabilities));
+
+	dev_dbg(ionic->dev, "eth.max_ucast_filters %d\n",
+		le32_to_cpu(lid->eth.max_ucast_filters));
+	dev_dbg(ionic->dev, "eth.max_mcast_filters %d\n",
+		le32_to_cpu(lid->eth.max_mcast_filters));
+	dev_dbg(ionic->dev, "eth.features 0x%llx\n",
+		le64_to_cpu(lid->eth.config.features));
+	dev_dbg(ionic->dev, "eth.queue_count[IONIC_QTYPE_ADMINQ] %d\n",
+		le32_to_cpu(lid->eth.config.queue_count[IONIC_QTYPE_ADMINQ]));
+	dev_dbg(ionic->dev, "eth.queue_count[IONIC_QTYPE_NOTIFYQ] %d\n",
+		le32_to_cpu(lid->eth.config.queue_count[IONIC_QTYPE_NOTIFYQ]));
+	dev_dbg(ionic->dev, "eth.queue_count[IONIC_QTYPE_RXQ] %d\n",
+		le32_to_cpu(lid->eth.config.queue_count[IONIC_QTYPE_RXQ]));
+	dev_dbg(ionic->dev, "eth.queue_count[IONIC_QTYPE_TXQ] %d\n",
+		le32_to_cpu(lid->eth.config.queue_count[IONIC_QTYPE_TXQ]));
+	dev_dbg(ionic->dev, "eth.queue_count[IONIC_QTYPE_EQ] %d\n",
+		le32_to_cpu(lid->eth.config.queue_count[IONIC_QTYPE_EQ]));
+	dev_dbg(ionic->dev, "eth.config.name %s\n", lid->eth.config.name);
+	dev_dbg(ionic->dev, "eth.config.mac %pM\n", lid->eth.config.mac);
+	dev_dbg(ionic->dev, "eth.config.mtu %d\n",
+		le32_to_cpu(lid->eth.config.mtu));
+
+	return 0;
+}
+
+int ionic_lif_size(struct ionic *ionic)
+{
+	struct ionic_identity *ident = &ionic->ident;
+	unsigned int nrdma_eqs_per_lif;
+	union ionic_lif_config *lc;
+	unsigned int ntxqs_per_lif;
+	unsigned int nrxqs_per_lif;
+	unsigned int nnqs_per_lif;
+	unsigned int dev_neth_eqs;
+	unsigned int dev_nintrs;
+	unsigned int min_intrs;
+	unsigned int nrdma_eqs;
+	unsigned int neth_eqs;
+	unsigned int nintrs;
+	unsigned int nxqs;
+	int err;
+
+	/* retrieve basic values from FW */
+	lc = &ident->lif.eth.config;
+	dev_nintrs = le32_to_cpu(ident->dev.nintrs);
+
+	if (ionic->is_mgmt_nic)
+		dev_neth_eqs = 0;
+	else
+		dev_neth_eqs = le32_to_cpu(ident->dev.eq_count);
+	dev_neth_eqs = min_t(int, dev_neth_eqs, MAX_ETH_EQS);
+
+	nrdma_eqs_per_lif = le32_to_cpu(ident->lif.rdma.eq_qtype.qid_count);
+	nnqs_per_lif = le32_to_cpu(lc->queue_count[IONIC_QTYPE_NOTIFYQ]);
+	ntxqs_per_lif = le32_to_cpu(lc->queue_count[IONIC_QTYPE_TXQ]);
+	nrxqs_per_lif = le32_to_cpu(lc->queue_count[IONIC_QTYPE_RXQ]);
+
+	/* limit values to play nice with kdump */
+	if (is_kdump_kernel()) {
+		dev_nintrs = 2;
+		nnqs_per_lif = 0;
+		ntxqs_per_lif = 1;
+		nrxqs_per_lif = 1;
+	}
+
+	/* Queue counts are driven by CPU count and interrupt availability.
+	 * In the best case, we'd like to have an individual interrupt
+	 * per CPU and one queuepair per interrupt.  For systems with
+	 * small CPU counts, or when we limit the queues-per-lif, this
+	 * works out pretty easily.  However, this can get out of hand and
+	 * have the driver requesting hundreds of interrupt vectors if we
+	 * allow lots of queues per lif and lots of RDMA queues.
+	 *
+	 * One way of managing this is that when the interrupt count gets
+	 * out of hand we cut down on the number of things that need
+	 * interrupts until we get down to what we can get from the OS.
+	 *
+	 * Another way of managing this is by using a smaller number of
+	 * EventQueues on which we can multiplex interrupt events.
+	 */
+
+	/* reserve last queue id for hardware timestamping */
+	if (lc->features & cpu_to_le64(IONIC_ETH_HW_TIMESTAMP)) {
+		if (ntxqs_per_lif <= 1 || nrxqs_per_lif <= 1) {
+			lc->features &= cpu_to_le64(~IONIC_ETH_HW_TIMESTAMP);
+		} else {
+			ntxqs_per_lif -= 1;
+			nrxqs_per_lif -= 1;
+		}
+	}
+
+	/* limit TxRx queuepairs and RDMA event queues to num cpu */
+	nxqs = min(ntxqs_per_lif, nrxqs_per_lif);
+	nxqs = min(nxqs, num_online_cpus());
+	nrdma_eqs = min(nrdma_eqs_per_lif, num_online_cpus());
+	neth_eqs = min(dev_neth_eqs, num_online_cpus());
+
+	/* EventQueue interrupt usage: (if eq_count != 0)
+	 *    1 aq intr + n EQs + m RDMA
+	 *
+	 * Default interrupt usage:
+	 *         lif0 has n TxRx queues and 1 Adminq
+	 *    (1 aq interrupt + n TxRx queue interrupts)
+	 *    + whatever's left is for RDMA queues
+	 */
+try_again:
+	if (neth_eqs)
+		nintrs = 1 + neth_eqs + nrdma_eqs;
+	else
+		nintrs = 1 + nxqs + nrdma_eqs;
+	min_intrs = 2;  /* adminq + 1 TxRx queue pair */
+
+	if (nintrs > dev_nintrs)
+		goto try_fewer;
+
+	err = ionic_bus_alloc_irq_vectors(ionic, nintrs);
+	if (err == -ENOSPC) {
+		goto try_fewer;
+	} else if (err < 0) {
+		dev_err(ionic->dev, "Can't get intrs from OS: %d\n", err);
+		return err;
+	} else if (err != nintrs) {
+		ionic_bus_free_irq_vectors(ionic);
+		goto try_fewer;
+	}
+
+	/* At this point we have the interrupts we need */
+	ionic->nnqs_per_lif = nnqs_per_lif;
+	ionic->nrdma_eqs_per_lif = nrdma_eqs;
+	ionic->ntxqs_per_lif = nxqs;
+	ionic->nrxqs_per_lif = nxqs;
+	ionic->nintrs = nintrs;
+	ionic->nlifs = 1;
+	ionic->neth_eqs = neth_eqs;
+
+	ionic_debugfs_add_sizes(ionic);
+
+	return 0;
+
+try_fewer:
+	/* If we can't get enough interrupts, we start cutting
+	 * back on the requirements and try again.
+	 */
+	/* Cut NotifyQ's per lif in half (but probably already at 1) */
+	if (nnqs_per_lif > 1) {
+		nnqs_per_lif >>= 1;
+		goto try_again;
+	}
+	/* Cut RDMA EQs in half */
+	if (nrdma_eqs > 1) {
+		nrdma_eqs >>= 1;
+		goto try_again;
+	}
+	/* Cut Eth EQs in half */
+	if (neth_eqs > 1) {
+		neth_eqs >>= 1;
+		goto try_again;
+	}
+	/* Cut number of TxRx queuepairs */
+	if (nxqs > 1) {
+		nxqs >>= 1;
+		goto try_again;
+	}
+	dev_err(ionic->dev, "Can't get minimum %d intrs from OS\n", min_intrs);
+	return -ENOSPC;
+}
+
+void ionic_device_reset(struct ionic_lif *lif)
+{
+	struct ionic *ionic = lif->ionic;
+	int err;
+
+	dev_info(ionic->dev, "Device reset starting\n");
+
+	mutex_lock(&lif->queue_lock);
+	ionic_stop_queues_reconfig(lif);
+	ionic_txrx_free(lif);
+	ionic_lif_deinit(lif);
+	ionic_reset(ionic);
+	ionic_qcqs_free(lif);
+	mutex_unlock(&lif->queue_lock);
+
+	ionic_port_reset(ionic);
+	ionic_reset(ionic);
+
+	ionic_init_devinfo(ionic);
+	err = ionic_identify(ionic);
+	if (err)
+		goto err_out;
+	err = ionic_port_identify(ionic);
+	if (err)
+		goto err_out;
+	err = ionic_port_init(ionic);
+	if (err)
+		goto err_out;
+
+	mutex_lock(&lif->queue_lock);
+
+	err = ionic_qcqs_alloc(lif);
+	if (err)
+		goto err_unlock;
+
+	err = ionic_lif_init(lif);
+	if (err)
+		goto err_qcqs_free;
+
+	ionic_lif_set_netdev_info(lif);
+	ionic_rx_filter_replay(lif);
+
+	if (netif_running(lif->netdev)) {
+		err = ionic_txrx_alloc(lif);
+		if (err)
+			goto err_lifs_deinit;
+
+		ionic_start_queues_reconfig(lif);
+	}
+
+	mutex_unlock(&lif->queue_lock);
+
+	netif_device_attach(lif->netdev);
+
+	dev_info(ionic->dev, "Device reset done\n");
+	return;
+
+err_lifs_deinit:
+	ionic_lif_deinit(lif);
+err_qcqs_free:
+	ionic_qcqs_free(lif);
+err_unlock:
+	mutex_unlock(&lif->queue_lock);
+err_out:
+	return;
+}
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_lif.h b/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_lif.h
new file mode 100644
index 000000000..8d261bee2
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_lif.h
@@ -0,0 +1,498 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/* Copyright(c) 2017 - 2022 Pensando Systems, Inc */
+
+#ifndef _IONIC_LIF_H_
+#define _IONIC_LIF_H_
+
+#include <linux/ptp_clock_kernel.h>
+#include <linux/timecounter.h>
+
+#ifdef CONFIG_DIMLIB
+#include <linux/dim.h>
+#else
+#include "dim.h"
+#endif
+
+#include "ionic_rx_filter.h"
+
+#define IONIC_ADMINQ_LENGTH	16	/* must be a power of two */
+#define IONIC_NOTIFYQ_LENGTH	64	/* must be a power of two */
+
+#ifdef IONIC_DEBUG_STATS
+#define IONIC_MAX_NUM_NAPI_CNTR		(NAPI_POLL_WEIGHT + 1)
+#define IONIC_MAX_NUM_SG_CNTR		(IONIC_TX_MAX_SG_ELEMS + 1)
+#endif
+
+#define ADD_ADDR	true
+#define DEL_ADDR	false
+#define CAN_SLEEP	true
+#define CAN_NOT_SLEEP	false
+
+/* Tunables */
+#define IONIC_RX_COPYBREAK_DEFAULT	256
+#define IONIC_TX_BUDGET_DEFAULT		256
+
+struct ionic_tx_stats {
+	u64 pkts;
+	u64 bytes;
+	u64 csum_none;
+	u64 csum;
+	u64 tso;
+	u64 tso_bytes;
+	u64 frags;
+	u64 vlan_inserted;
+	u64 clean;
+	u64 linearize;
+	u64 crc32_csum;
+#ifdef IONIC_DEBUG_STATS
+	u64 sg_cntr[IONIC_MAX_NUM_SG_CNTR];
+#endif
+	u64 dma_map_err;
+	u64 hwstamp_valid;
+	u64 hwstamp_invalid;
+};
+
+struct ionic_rx_stats {
+	u64 pkts;
+	u64 bytes;
+	u64 csum_none;
+	u64 csum_complete;
+#ifdef IONIC_DEBUG_STATS
+	u64 buffers_posted;
+#endif
+	u64 dropped;
+	u64 vlan_stripped;
+	u64 csum_error;
+	u64 dma_map_err;
+	u64 alloc_err;
+	u64 hwstamp_valid;
+	u64 hwstamp_invalid;
+	u64 cache_full;
+	u64 cache_empty;
+	u64 cache_busy;
+	u64 cache_get;
+	u64 cache_put;
+	u64 buf_reused;
+	u64 buf_exhausted;
+	u64 buf_not_reusable;
+};
+
+#define IONIC_QCQ_F_INITED		BIT(0)
+#define IONIC_QCQ_F_SG			BIT(1)
+#define IONIC_QCQ_F_INTR		BIT(2)
+#define IONIC_QCQ_F_TX_STATS		BIT(3)
+#define IONIC_QCQ_F_RX_STATS		BIT(4)
+#define IONIC_QCQ_F_NOTIFYQ		BIT(5)
+#define IONIC_QCQ_F_CMB_RINGS		BIT(6)
+
+#ifdef IONIC_DEBUG_STATS
+struct ionic_napi_stats {
+	u64 poll_count;
+	u64 work_done_cntr[IONIC_MAX_NUM_NAPI_CNTR];
+};
+#endif
+
+struct ionic_qcq {
+	void *q_base;
+	dma_addr_t q_base_pa;	/* might not be page aligned */
+	u32 q_size;
+	u32 cq_size;
+	void *cq_base;
+	dma_addr_t cq_base_pa;	/* might not be page aligned */
+	void *sg_base;
+	dma_addr_t sg_base_pa;	/* might not be page aligned */
+	u32 sg_size;
+	void __iomem *cmb_q_base;
+	phys_addr_t cmb_q_base_pa;
+	u32 cmb_q_size;
+	u32 cmb_pgid;
+	u32 cmb_order;
+	bool armed;
+	struct dim dim;
+	struct ionic_queue q;
+	struct ionic_cq cq;
+	struct ionic_intr_info intr;
+	struct timer_list napi_deadline;
+	struct napi_struct napi;
+#ifdef IONIC_DEBUG_STATS
+	struct ionic_napi_stats napi_stats;
+#endif
+	unsigned int flags;
+	struct ionic_qcq *napi_qcq;
+	struct dentry *dentry;
+};
+
+#define q_to_qcq(q)		container_of(q, struct ionic_qcq, q)
+#define q_to_tx_stats(q)	(&(q)->lif->txqstats[(q)->index])
+#define q_to_rx_stats(q)	(&(q)->lif->rxqstats[(q)->index])
+#define napi_to_qcq(napi)	container_of(napi, struct ionic_qcq, napi)
+#define napi_to_cq(napi)	(&napi_to_qcq(napi)->cq)
+
+enum ionic_deferred_work_type {
+	IONIC_DW_TYPE_RX_MODE,
+	IONIC_DW_TYPE_LINK_STATUS,
+	IONIC_DW_TYPE_LIF_RESET,
+};
+
+struct ionic_deferred_work {
+	struct list_head list;
+	enum ionic_deferred_work_type type;
+	union {
+		u8 addr[ETH_ALEN];
+		u8 fw_status;
+	};
+};
+
+struct ionic_deferred {
+	spinlock_t lock;		/* lock for deferred work list */
+	struct list_head list;
+	struct work_struct work;
+};
+
+struct ionic_lif_sw_stats {
+	u64 tx_packets;
+	u64 tx_bytes;
+	u64 rx_packets;
+	u64 rx_bytes;
+	u64 tx_tso;
+	u64 tx_tso_bytes;
+	u64 tx_csum_none;
+	u64 tx_csum;
+	u64 rx_csum_none;
+	u64 rx_csum_complete;
+	u64 rx_csum_error;
+	u64 tx_hwstamp_valid;
+	u64 tx_hwstamp_invalid;
+	u64 rx_hwstamp_valid;
+	u64 rx_hwstamp_invalid;
+	u64 hw_tx_dropped;
+	u64 hw_rx_dropped;
+	u64 hw_rx_over_errors;
+	u64 hw_rx_missed_errors;
+	u64 hw_tx_aborted_errors;
+};
+
+enum ionic_lif_state_flags {
+	IONIC_LIF_F_INITED,
+	IONIC_LIF_F_SW_DEBUG_STATS,
+	IONIC_LIF_F_UP,
+	IONIC_LIF_F_LINK_CHECK_REQUESTED,
+	IONIC_LIF_F_FILTER_SYNC_NEEDED,
+	IONIC_LIF_F_FW_RESET,
+	IONIC_LIF_F_FW_STOPPING,
+	IONIC_LIF_F_RDMA_SNIFFER,
+	IONIC_LIF_F_SPLIT_INTR,
+	IONIC_LIF_F_BROKEN,
+	IONIC_LIF_F_TX_DIM_INTR,
+	IONIC_LIF_F_RX_DIM_INTR,
+	IONIC_LIF_F_CMB_RINGS,
+
+	/* leave this as last */
+	IONIC_LIF_F_STATE_SIZE
+};
+
+struct ionic_lif_cfg {
+	int index;
+	enum ionic_api_prsn prsn;
+
+	void *priv;
+	void (*reset_cb)(void *priv);
+};
+
+struct ionic_qtype_info {
+	u8  version;
+	u8  supported;
+	u64 features;
+	u16 desc_sz;
+	u16 comp_sz;
+	u16 sg_desc_sz;
+	u16 max_sg_elems;
+	u16 sg_desc_stride;
+};
+
+struct ionic_phc;
+
+#define IONIC_LIF_NAME_MAX_SZ		32
+struct ionic_lif {
+	struct net_device *netdev;
+	DECLARE_BITMAP(state, IONIC_LIF_F_STATE_SIZE);
+	struct ionic *ionic;
+	u64 __iomem *kern_dbpage;
+	u32 rx_copybreak;
+	unsigned int nxqs;
+
+	struct ionic_qcq **txqcqs;
+	struct ionic_tx_stats *txqstats;
+	struct ionic_qcq **rxqcqs;
+	struct ionic_rx_stats *rxqstats;
+	struct ionic_qcq *hwstamp_txq;
+	struct ionic_qcq *hwstamp_rxq;
+
+	struct ionic_qcq *adminqcq;
+	struct ionic_qcq *notifyqcq;
+	struct mutex queue_lock;	/* lock for queue structures */
+	struct mutex config_lock;	/* lock for config actions */
+	spinlock_t adminq_lock;		/* lock for AdminQ operations */
+	unsigned int kern_pid;
+
+	struct work_struct tx_timeout_work;
+	struct ionic_deferred deferred;
+
+	u64 last_eid;
+	unsigned int nrdma_eqs;
+	unsigned int nrdma_eqs_avail;
+	unsigned int ntxq_descs;
+	unsigned int nrxq_descs;
+	u64 rxq_features;
+	u16 rx_mode;
+	bool registered;
+	u64 hw_features;
+	unsigned int index;
+	unsigned int hw_index;
+
+	u8 rss_hash_key[IONIC_RSS_HASH_KEY_SIZE];
+	u8 *rss_ind_tbl;
+	dma_addr_t rss_ind_tbl_pa;
+	u32 rss_ind_tbl_sz;
+	u16 rss_types;
+
+	u16 lif_type;
+	unsigned int nmcast;
+	unsigned int nucast;
+	unsigned int nvlans;
+	unsigned int max_vlans;
+	char name[IONIC_LIF_NAME_MAX_SZ];
+
+	struct ionic_lif_info *info;
+	dma_addr_t info_pa;
+	u32 info_sz;
+
+	unsigned int dbid_count;
+	struct mutex dbid_inuse_lock;	/* lock the dbid bit list */
+	unsigned long *dbid_inuse;
+
+	union ionic_lif_identity *identity;
+	struct ionic_qtype_info qtype_info[IONIC_QTYPE_MAX];
+
+	struct ionic_rx_filters rx_filters;
+	u32 rx_coalesce_usecs;		/* what the user asked for */
+	u32 rx_coalesce_hw;		/* what the hw is using */
+	u32 tx_coalesce_usecs;		/* what the user asked for */
+	u32 tx_coalesce_hw;		/* what the hw is using */
+
+	struct ionic_phc *phc;
+
+	/* TODO: Make this a list if more than one child is supported */
+	struct ionic_lif_cfg child_lif_cfg;
+
+	u64 n_txrx_alloc;
+
+	struct dentry *dentry;
+};
+
+#if IS_ENABLED(CONFIG_PTP_1588_CLOCK)
+struct ionic_phc {
+	spinlock_t lock; /* lock for cc and tc */
+	struct cyclecounter cc;
+	struct timecounter tc;
+
+	struct mutex config_lock; /* lock for ts_config */
+	struct hwtstamp_config ts_config;
+	u64 ts_config_rx_filt;
+	u32 ts_config_tx_mode;
+
+	u32 init_cc_mult;
+	long aux_work_delay;
+
+	struct ptp_clock_info ptp_info;
+	struct ptp_clock *ptp;
+	struct ionic_lif *lif;
+#ifndef HAVE_PTP_CLOCK_DO_AUX_WORK
+	struct delayed_work dwork;
+#endif
+};
+#endif
+
+struct ionic_queue_params {
+	unsigned int nxqs;
+	unsigned int ntxq_descs;
+	unsigned int nrxq_descs;
+	u64 rxq_features;
+	bool intr_split;
+	bool cmb_enabled;
+};
+
+static inline void ionic_init_queue_params(struct ionic_lif *lif,
+					   struct ionic_queue_params *qparam)
+{
+	qparam->nxqs = lif->nxqs;
+	qparam->ntxq_descs = lif->ntxq_descs;
+	qparam->nrxq_descs = lif->nrxq_descs;
+	qparam->rxq_features = lif->rxq_features;
+	qparam->intr_split = test_bit(IONIC_LIF_F_SPLIT_INTR, lif->state);
+	qparam->cmb_enabled = test_bit(IONIC_LIF_F_CMB_RINGS, lif->state);
+}
+
+static inline void ionic_set_queue_params(struct ionic_lif *lif,
+					  struct ionic_queue_params *qparam)
+{
+	lif->nxqs = qparam->nxqs;
+	lif->ntxq_descs = qparam->ntxq_descs;
+	lif->nrxq_descs = qparam->nrxq_descs;
+	lif->rxq_features = qparam->rxq_features;
+
+	if (qparam->intr_split)
+		set_bit(IONIC_LIF_F_SPLIT_INTR, lif->state);
+	else
+		clear_bit(IONIC_LIF_F_SPLIT_INTR, lif->state);
+
+	if (qparam->cmb_enabled)
+		set_bit(IONIC_LIF_F_CMB_RINGS, lif->state);
+	else
+		clear_bit(IONIC_LIF_F_CMB_RINGS, lif->state);
+}
+
+static inline u32 ionic_coal_usec_to_hw(struct ionic *ionic, u32 usecs)
+{
+	u32 mult = le32_to_cpu(ionic->ident.dev.intr_coal_mult);
+	u32 div = le32_to_cpu(ionic->ident.dev.intr_coal_div);
+
+	/* Div-by-zero should never be an issue, but check anyway */
+	if (!div || !mult)
+		return 0;
+
+	/* Round up in case usecs is close to the next hw unit */
+	usecs += (div / mult) >> 1;
+
+	/* Convert from usecs to device units */
+	return (usecs * mult) / div;
+}
+
+static inline bool ionic_is_pf(struct ionic *ionic)
+{
+	return ionic->pdev &&
+	       ionic->pdev->device == PCI_DEVICE_ID_PENSANDO_IONIC_ETH_PF;
+}
+
+static inline bool ionic_use_eqs(struct ionic_lif *lif)
+{
+	return lif->ionic->neth_eqs &&
+	       lif->qtype_info[IONIC_QTYPE_RXQ].features & IONIC_QIDENT_F_EQ;
+}
+
+void ionic_lif_deferred_enqueue(struct ionic_deferred *def,
+				struct ionic_deferred_work *work);
+void ionic_link_status_check_request(struct ionic_lif *lif, bool can_sleep);
+#ifdef HAVE_VOID_NDO_GET_STATS64
+void ionic_get_stats64(struct net_device *netdev,
+		       struct rtnl_link_stats64 *ns);
+#else
+struct rtnl_link_stats64 *ionic_get_stats64(struct net_device *netdev,
+					    struct rtnl_link_stats64 *ns);
+#endif
+int ionic_lif_register(struct ionic_lif *lif);
+void ionic_lif_unregister(struct ionic_lif *lif);
+int ionic_lif_identify(struct ionic *ionic, u8 lif_type,
+		       union ionic_lif_identity *lif_ident);
+int ionic_lif_size(struct ionic *ionic);
+
+#if IS_ENABLED(CONFIG_PTP_1588_CLOCK)
+void ionic_lif_hwstamp_replay(struct ionic_lif *lif);
+void ionic_lif_hwstamp_recreate_queues(struct ionic_lif *lif);
+int ionic_lif_hwstamp_set(struct ionic_lif *lif, struct ifreq *ifr);
+int ionic_lif_hwstamp_get(struct ionic_lif *lif, struct ifreq *ifr);
+ktime_t ionic_lif_phc_ktime(struct ionic_lif *lif, u64 counter);
+void ionic_lif_register_phc(struct ionic_lif *lif);
+void ionic_lif_unregister_phc(struct ionic_lif *lif);
+void ionic_lif_alloc_phc(struct ionic_lif *lif);
+void ionic_lif_free_phc(struct ionic_lif *lif);
+#else
+static inline void ionic_lif_hwstamp_replay(struct ionic_lif *lif) {}
+static inline void ionic_lif_hwstamp_recreate_queues(struct ionic_lif *lif) {}
+
+static inline int ionic_lif_hwstamp_set(struct ionic_lif *lif, struct ifreq *ifr)
+{
+	return -EOPNOTSUPP;
+}
+
+static inline int ionic_lif_hwstamp_get(struct ionic_lif *lif, struct ifreq *ifr)
+{
+	return -EOPNOTSUPP;
+}
+
+static inline ktime_t ionic_lif_phc_ktime(struct ionic_lif *lif, u64 counter)
+{
+	return ns_to_ktime(0);
+}
+
+static inline void ionic_lif_register_phc(struct ionic_lif *lif) {}
+static inline void ionic_lif_unregister_phc(struct ionic_lif *lif) {}
+static inline void ionic_lif_alloc_phc(struct ionic_lif *lif) {}
+static inline void ionic_lif_free_phc(struct ionic_lif *lif) {}
+#endif
+
+int ionic_lif_create_hwstamp_txq(struct ionic_lif *lif);
+int ionic_lif_create_hwstamp_rxq(struct ionic_lif *lif);
+int ionic_lif_config_hwstamp_rxq_all(struct ionic_lif *lif, bool rx_all);
+int ionic_lif_set_hwstamp_txmode(struct ionic_lif *lif, u16 txstamp_mode);
+int ionic_lif_set_hwstamp_rxfilt(struct ionic_lif *lif, u64 pkt_class);
+
+int ionic_lif_rss_config(struct ionic_lif *lif, u16 types,
+			 const u8 *key, const u32 *indir);
+
+int ionic_intr_alloc(struct ionic *ionic, struct ionic_intr_info *intr);
+void ionic_intr_free(struct ionic *ionic, int index);
+void ionic_lif_rx_mode(struct ionic_lif *lif);
+int ionic_reconfigure_queues(struct ionic_lif *lif,
+			     struct ionic_queue_params *qparam);
+int ionic_lif_alloc(struct ionic *ionic);
+int ionic_lif_init(struct ionic_lif *lif);
+void ionic_lif_free(struct ionic_lif *lif);
+void ionic_lif_deinit(struct ionic_lif *lif);
+
+int ionic_lif_addr_add(struct ionic_lif *lif, const u8 *addr);
+int ionic_lif_addr_del(struct ionic_lif *lif, const u8 *addr);
+
+struct ionic_lif *ionic_netdev_lif(struct net_device *netdev);
+void ionic_device_reset(struct ionic_lif *lif);
+
+#ifdef IONIC_DEBUG_STATS
+static inline void debug_stats_txq_post(struct ionic_queue *q, bool dbell)
+{
+	struct ionic_txq_desc *desc = &q->txq[q->head_idx];
+	u8 num_sg_elems;
+
+	q->dbell_count += dbell;
+
+	num_sg_elems = ((le64_to_cpu(desc->cmd) >> IONIC_TXQ_DESC_NSGE_SHIFT)
+						& IONIC_TXQ_DESC_NSGE_MASK);
+	if (num_sg_elems > (IONIC_MAX_NUM_SG_CNTR - 1))
+		num_sg_elems = IONIC_MAX_NUM_SG_CNTR - 1;
+
+	q->lif->txqstats[q->index].sg_cntr[num_sg_elems]++;
+}
+
+static inline void debug_stats_napi_poll(struct ionic_qcq *qcq,
+					 unsigned int work_done)
+{
+	qcq->napi_stats.poll_count++;
+
+	if (work_done > (IONIC_MAX_NUM_NAPI_CNTR - 1))
+		work_done = IONIC_MAX_NUM_NAPI_CNTR - 1;
+
+	qcq->napi_stats.work_done_cntr[work_done]++;
+}
+
+#define DEBUG_STATS_CQE_CNT(cq)		((cq)->compl_count++)
+#define DEBUG_STATS_RX_BUFF_CNT(q)	((q)->lif->rxqstats[q->index].buffers_posted++)
+#define DEBUG_STATS_TXQ_POST(q, dbell)  debug_stats_txq_post(q, dbell)
+#define DEBUG_STATS_NAPI_POLL(qcq, work_done) \
+	debug_stats_napi_poll(qcq, work_done)
+#else
+#define DEBUG_STATS_CQE_CNT(cq)
+#define DEBUG_STATS_RX_BUFF_CNT(q)
+#define DEBUG_STATS_TXQ_POST(q, dbell)
+#define DEBUG_STATS_NAPI_POLL(qcq, work_done)
+#endif
+
+#endif /* _IONIC_LIF_H_ */
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_main.c b/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_main.c
new file mode 100644
index 000000000..f3da81e6b
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_main.c
@@ -0,0 +1,831 @@
+// SPDX-License-Identifier: GPL-2.0
+/* Copyright(c) 2017 - 2022 Pensando Systems, Inc */
+
+#include <linux/module.h>
+#include <linux/version.h>
+#include <linux/netdevice.h>
+#include <linux/dynamic_debug.h>
+#include <linux/utsname.h>
+#include <linux/ctype.h>
+
+#include "ionic.h"
+#include "ionic_bus.h"
+#include "ionic_lif.h"
+#include "ionic_debugfs.h"
+
+bool port_init_up = 1;
+module_param(port_init_up, bool, 0);
+MODULE_PARM_DESC(max_slaves, "Set port to ADMIN_UP on init (default 1, 0 to disable)");
+
+MODULE_DESCRIPTION(IONIC_DRV_DESCRIPTION);
+MODULE_AUTHOR("Pensando Systems, Inc");
+MODULE_LICENSE("GPL");
+MODULE_VERSION(IONIC_DRV_VERSION);
+MODULE_INFO(supported, "external");
+
+unsigned int rx_copybreak = IONIC_RX_COPYBREAK_DEFAULT;
+module_param(rx_copybreak, uint, 0600);
+MODULE_PARM_DESC(rx_copybreak, "Maximum size of packet that is copied to a bounce buffer on RX");
+
+unsigned int rx_fill_threshold = IONIC_RX_FILL_THRESHOLD;
+module_param(rx_fill_threshold, uint, 0600);
+MODULE_PARM_DESC(rx_fill_threshold, "Minimum number of buffers to fill");
+
+unsigned int tx_budget = IONIC_TX_BUDGET_DEFAULT;
+module_param(tx_budget, uint, 0600);
+MODULE_PARM_DESC(tx_budget, "Number of tx completions to process per NAPI poll");
+
+unsigned int devcmd_timeout = DEVCMD_TIMEOUT;
+module_param(devcmd_timeout, uint, 0600);
+MODULE_PARM_DESC(devcmd_timeout, "Devcmd timeout in seconds (default 30 secs)");
+
+unsigned long affinity_mask_override;
+module_param(affinity_mask_override, ulong, 0600);
+MODULE_PARM_DESC(affinity_mask_override, "IRQ affinity mask to override (max 64 bits)");
+
+static const char *ionic_error_to_str(enum ionic_status_code code)
+{
+	switch (code) {
+	case IONIC_RC_SUCCESS:
+		return "IONIC_RC_SUCCESS";
+	case IONIC_RC_EVERSION:
+		return "IONIC_RC_EVERSION";
+	case IONIC_RC_EOPCODE:
+		return "IONIC_RC_EOPCODE";
+	case IONIC_RC_EIO:
+		return "IONIC_RC_EIO";
+	case IONIC_RC_EPERM:
+		return "IONIC_RC_EPERM";
+	case IONIC_RC_EQID:
+		return "IONIC_RC_EQID";
+	case IONIC_RC_EQTYPE:
+		return "IONIC_RC_EQTYPE";
+	case IONIC_RC_ENOENT:
+		return "IONIC_RC_ENOENT";
+	case IONIC_RC_EINTR:
+		return "IONIC_RC_EINTR";
+	case IONIC_RC_EAGAIN:
+		return "IONIC_RC_EAGAIN";
+	case IONIC_RC_ENOMEM:
+		return "IONIC_RC_ENOMEM";
+	case IONIC_RC_EFAULT:
+		return "IONIC_RC_EFAULT";
+	case IONIC_RC_EBUSY:
+		return "IONIC_RC_EBUSY";
+	case IONIC_RC_EEXIST:
+		return "IONIC_RC_EEXIST";
+	case IONIC_RC_EINVAL:
+		return "IONIC_RC_EINVAL";
+	case IONIC_RC_ENOSPC:
+		return "IONIC_RC_ENOSPC";
+	case IONIC_RC_ERANGE:
+		return "IONIC_RC_ERANGE";
+	case IONIC_RC_BAD_ADDR:
+		return "IONIC_RC_BAD_ADDR";
+	case IONIC_RC_DEV_CMD:
+		return "IONIC_RC_DEV_CMD";
+	case IONIC_RC_ENOSUPP:
+		return "IONIC_RC_ENOSUPP";
+	case IONIC_RC_ERROR:
+		return "IONIC_RC_ERROR";
+	case IONIC_RC_ERDMA:
+		return "IONIC_RC_ERDMA";
+	case IONIC_RC_BAD_FW:
+		return "IONIC_RC_BAD_FW";
+	default:
+		return "IONIC_RC_UNKNOWN";
+	}
+}
+
+int ionic_error_to_errno(enum ionic_status_code code)
+{
+	switch (code) {
+	case IONIC_RC_SUCCESS:
+		return 0;
+	case IONIC_RC_EVERSION:
+	case IONIC_RC_EQTYPE:
+	case IONIC_RC_EQID:
+	case IONIC_RC_EINVAL:
+	case IONIC_RC_ENOSUPP:
+		return -EINVAL;
+	case IONIC_RC_EPERM:
+		return -EPERM;
+	case IONIC_RC_ENOENT:
+		return -ENOENT;
+	case IONIC_RC_EAGAIN:
+		return -EAGAIN;
+	case IONIC_RC_ENOMEM:
+		return -ENOMEM;
+	case IONIC_RC_EFAULT:
+		return -EFAULT;
+	case IONIC_RC_EBUSY:
+		return -EBUSY;
+	case IONIC_RC_EEXIST:
+		return -EEXIST;
+	case IONIC_RC_ENOSPC:
+		return -ENOSPC;
+	case IONIC_RC_ERANGE:
+		return -ERANGE;
+	case IONIC_RC_BAD_ADDR:
+		return -EFAULT;
+	case IONIC_RC_BAD_FW:
+		return -ENOEXEC;
+	case IONIC_RC_EOPCODE:
+	case IONIC_RC_EINTR:
+	case IONIC_RC_DEV_CMD:
+	case IONIC_RC_ERROR:
+	case IONIC_RC_ERDMA:
+	case IONIC_RC_EIO:
+	default:
+		return -EIO;
+	}
+}
+EXPORT_SYMBOL_GPL(ionic_error_to_errno);
+
+static const char *ionic_opcode_to_str(enum ionic_cmd_opcode opcode)
+{
+	switch (opcode) {
+	case IONIC_CMD_NOP:
+		return "IONIC_CMD_NOP";
+	case IONIC_CMD_INIT:
+		return "IONIC_CMD_INIT";
+	case IONIC_CMD_RESET:
+		return "IONIC_CMD_RESET";
+	case IONIC_CMD_IDENTIFY:
+		return "IONIC_CMD_IDENTIFY";
+	case IONIC_CMD_GETATTR:
+		return "IONIC_CMD_GETATTR";
+	case IONIC_CMD_SETATTR:
+		return "IONIC_CMD_SETATTR";
+	case IONIC_CMD_PORT_IDENTIFY:
+		return "IONIC_CMD_PORT_IDENTIFY";
+	case IONIC_CMD_PORT_INIT:
+		return "IONIC_CMD_PORT_INIT";
+	case IONIC_CMD_PORT_RESET:
+		return "IONIC_CMD_PORT_RESET";
+	case IONIC_CMD_PORT_GETATTR:
+		return "IONIC_CMD_PORT_GETATTR";
+	case IONIC_CMD_PORT_SETATTR:
+		return "IONIC_CMD_PORT_SETATTR";
+	case IONIC_CMD_LIF_INIT:
+		return "IONIC_CMD_LIF_INIT";
+	case IONIC_CMD_LIF_RESET:
+		return "IONIC_CMD_LIF_RESET";
+	case IONIC_CMD_LIF_IDENTIFY:
+		return "IONIC_CMD_LIF_IDENTIFY";
+	case IONIC_CMD_LIF_SETATTR:
+		return "IONIC_CMD_LIF_SETATTR";
+	case IONIC_CMD_LIF_GETATTR:
+		return "IONIC_CMD_LIF_GETATTR";
+	case IONIC_CMD_LIF_SETPHC:
+		return "IONIC_CMD_LIF_SETPHC";
+	case IONIC_CMD_RX_MODE_SET:
+		return "IONIC_CMD_RX_MODE_SET";
+	case IONIC_CMD_RX_FILTER_ADD:
+		return "IONIC_CMD_RX_FILTER_ADD";
+	case IONIC_CMD_RX_FILTER_DEL:
+		return "IONIC_CMD_RX_FILTER_DEL";
+	case IONIC_CMD_Q_IDENTIFY:
+		return "IONIC_CMD_Q_IDENTIFY";
+	case IONIC_CMD_Q_INIT:
+		return "IONIC_CMD_Q_INIT";
+	case IONIC_CMD_Q_CONTROL:
+		return "IONIC_CMD_Q_CONTROL";
+	case IONIC_CMD_RDMA_RESET_LIF:
+		return "IONIC_CMD_RDMA_RESET_LIF";
+	case IONIC_CMD_RDMA_CREATE_EQ:
+		return "IONIC_CMD_RDMA_CREATE_EQ";
+	case IONIC_CMD_RDMA_CREATE_CQ:
+		return "IONIC_CMD_RDMA_CREATE_CQ";
+	case IONIC_CMD_RDMA_CREATE_ADMINQ:
+		return "IONIC_CMD_RDMA_CREATE_ADMINQ";
+	case IONIC_CMD_FW_DOWNLOAD:
+		return "IONIC_CMD_FW_DOWNLOAD";
+	case IONIC_CMD_FW_CONTROL:
+		return "IONIC_CMD_FW_CONTROL";
+	case IONIC_CMD_FW_DOWNLOAD_V1:
+		return "IONIC_CMD_FW_DOWNLOAD_V1";
+	case IONIC_CMD_FW_CONTROL_V1:
+		return "IONIC_CMD_FW_CONTROL_V1";
+	case IONIC_CMD_VF_GETATTR:
+		return "IONIC_CMD_VF_GETATTR";
+	case IONIC_CMD_VF_SETATTR:
+		return "IONIC_CMD_VF_SETATTR";
+	default:
+		return "DEVCMD_UNKNOWN";
+	}
+}
+
+const char *ionic_vf_attr_to_str(enum ionic_vf_attr attr)
+{
+	switch (attr) {
+	case IONIC_VF_ATTR_SPOOFCHK:
+		return "IONIC_VF_ATTR_SPOOFCHK";
+	case IONIC_VF_ATTR_TRUST:
+		return "IONIC_VF_ATTR_TRUST";
+	case IONIC_VF_ATTR_LINKSTATE:
+		return "IONIC_VF_ATTR_LINKSTATE";
+	case IONIC_VF_ATTR_MAC:
+		return "IONIC_VF_ATTR_MAC";
+	case IONIC_VF_ATTR_VLAN:
+		return "IONIC_VF_ATTR_VLAN";
+	case IONIC_VF_ATTR_RATE:
+		return "IONIC_VF_ATTR_RATE";
+	case IONIC_VF_ATTR_STATSADDR:
+		return "IONIC_VF_ATTR_STATSADDR";
+	default:
+		return "IONIC_VF_ATTR_UNKNOWN";
+	}
+}
+
+static void ionic_adminq_flush(struct ionic_lif *lif)
+{
+	struct ionic_desc_info *desc_info;
+	unsigned long irqflags;
+	struct ionic_queue *q;
+
+	spin_lock_irqsave(&lif->adminq_lock, irqflags);
+	if (!lif->adminqcq) {
+		spin_unlock_irqrestore(&lif->adminq_lock, irqflags);
+		return;
+	}
+
+	q = &lif->adminqcq->q;
+
+	while (q->tail_idx != q->head_idx) {
+		desc_info = &q->info[q->tail_idx];
+		memset(desc_info->desc, 0, sizeof(union ionic_adminq_cmd));
+		desc_info->cb = NULL;
+		desc_info->cb_arg = NULL;
+		q->tail_idx = (q->tail_idx + 1) & (q->num_descs - 1);
+	}
+	spin_unlock_irqrestore(&lif->adminq_lock, irqflags);
+}
+
+void ionic_adminq_netdev_err_print(struct ionic_lif *lif, u8 opcode,
+				   u8 status, int err)
+{
+	const char *stat_str;
+
+	stat_str = (err == -ETIMEDOUT) ? "TIMEOUT" :
+					 ionic_error_to_str(status);
+
+	netdev_err(lif->netdev, "%s (%d) failed: %s (%d)\n",
+		   ionic_opcode_to_str(opcode), opcode, stat_str, err);
+}
+
+static int ionic_adminq_check_err(struct ionic_lif *lif,
+				  struct ionic_admin_ctx *ctx,
+				  const bool timeout,
+				  const bool do_msg)
+{
+	int err = 0;
+
+	if (ctx->comp.comp.status || timeout) {
+		err = timeout ? -ETIMEDOUT :
+				ionic_error_to_errno(ctx->comp.comp.status);
+
+		if (do_msg)
+			ionic_adminq_netdev_err_print(lif, ctx->cmd.cmd.opcode,
+						      ctx->comp.comp.status, err);
+
+		if (timeout)
+			ionic_adminq_flush(lif);
+	}
+
+	return err;
+}
+
+static void ionic_adminq_cb(struct ionic_queue *q,
+			    struct ionic_desc_info *desc_info,
+			    struct ionic_cq_info *cq_info, void *cb_arg)
+{
+	struct ionic_admin_ctx *ctx = cb_arg;
+	struct ionic_admin_comp *comp;
+
+	if (!ctx)
+		return;
+
+	comp = cq_info->cq_desc;
+
+	memcpy(&ctx->comp, comp, sizeof(*comp));
+
+	dev_dbg(q->dev, "comp admin queue command:\n");
+	dynamic_hex_dump("comp ", DUMP_PREFIX_OFFSET, 16, 1,
+			 &ctx->comp, sizeof(ctx->comp), true);
+
+	complete_all(&ctx->work);
+}
+
+bool ionic_adminq_poke_doorbell(struct ionic_queue *q)
+{
+	struct ionic_lif *lif = q->lif;
+	unsigned long now, then, dif;
+	unsigned long irqflags;
+
+	spin_lock_irqsave(&lif->adminq_lock, irqflags);
+
+	if (q->tail_idx == q->head_idx) {
+		spin_unlock_irqrestore(&lif->adminq_lock, irqflags);
+		return false;
+	}
+
+	now = READ_ONCE(jiffies);
+	then = q->dbell_jiffies;
+	dif = now - then;
+
+	if (dif > q->dbell_deadline) {
+		ionic_dbell_ring(q->lif->kern_dbpage, q->hw_type,
+				 q->dbval | q->head_idx);
+
+		q->dbell_jiffies = now;
+	}
+
+	spin_unlock_irqrestore(&lif->adminq_lock, irqflags);
+
+	return true;
+}
+
+int ionic_adminq_post(struct ionic_lif *lif, struct ionic_admin_ctx *ctx)
+{
+	struct ionic_desc_info *desc_info;
+	unsigned long irqflags;
+	struct ionic_queue *q;
+	int err = 0;
+
+	spin_lock_irqsave(&lif->adminq_lock, irqflags);
+	if (!lif->adminqcq) {
+		spin_unlock_irqrestore(&lif->adminq_lock, irqflags);
+		return -EIO;
+	}
+
+	q = &lif->adminqcq->q;
+
+	if (!ionic_q_has_space(q, 1)) {
+		err = -ENOSPC;
+		goto err_out;
+	}
+
+	err = ionic_heartbeat_check(lif->ionic);
+	if (err)
+		goto err_out;
+
+	desc_info = &q->info[q->head_idx];
+	memcpy(desc_info->desc, &ctx->cmd, sizeof(ctx->cmd));
+
+	dev_dbg(&lif->netdev->dev, "post admin queue command:\n");
+	dynamic_hex_dump("cmd ", DUMP_PREFIX_OFFSET, 16, 1,
+			 &ctx->cmd, sizeof(ctx->cmd), true);
+
+	ionic_q_post(q, true, ionic_adminq_cb, ctx);
+
+err_out:
+	spin_unlock_irqrestore(&lif->adminq_lock, irqflags);
+
+	return err;
+}
+
+int ionic_adminq_wait(struct ionic_lif *lif, struct ionic_admin_ctx *ctx,
+		      const int err, const bool do_msg)
+{
+	struct net_device *netdev = lif->netdev;
+	unsigned long time_limit;
+	unsigned long time_start;
+	unsigned long time_done;
+	unsigned long remaining;
+	const char *name;
+
+	name = ionic_opcode_to_str(ctx->cmd.cmd.opcode);
+
+	if (err) {
+		if (do_msg && !test_bit(IONIC_LIF_F_FW_RESET, lif->state))
+			netdev_err(netdev, "Posting of %s (%d) failed: %d\n",
+				   name, ctx->cmd.cmd.opcode, err);
+
+		ctx->comp.comp.status = IONIC_RC_ERROR;
+		return err;
+	}
+
+	time_start = jiffies;
+	time_limit = time_start + HZ * (ulong)devcmd_timeout;
+	do {
+		remaining = wait_for_completion_timeout(&ctx->work,
+							IONIC_ADMINQ_TIME_SLICE);
+
+		/* check for done */
+		if (remaining)
+			break;
+
+		/* force a check of FW status and break out if FW reset */
+		(void) ionic_heartbeat_check(lif->ionic);
+		if ((test_bit(IONIC_LIF_F_FW_RESET, lif->state) &&
+		     !lif->ionic->idev.fw_status_ready) ||
+		    test_bit(IONIC_LIF_F_FW_STOPPING, lif->state)) {
+			if (do_msg)
+				netdev_warn(netdev, "%s (%d) interrupted, FW in reset\n",
+					    name, ctx->cmd.cmd.opcode);
+			ctx->comp.comp.status = IONIC_RC_ERROR;
+			return -ENXIO;
+		}
+
+	} while (time_before(jiffies, time_limit));
+	time_done = jiffies;
+
+	dev_dbg(lif->ionic->dev, "%s: elapsed %d msecs\n",
+		__func__, jiffies_to_msecs(time_done - time_start));
+
+	return ionic_adminq_check_err(lif, ctx,
+				      time_after_eq(time_done, time_limit),
+				      do_msg);
+}
+
+static int __ionic_adminq_post_wait(struct ionic_lif *lif,
+				    struct ionic_admin_ctx *ctx,
+				    const bool do_msg)
+{
+	int err;
+
+	/* if platform dev is resetting, don't bother with AdminQ, it's not there */
+	if (lif->ionic->pfdev && test_bit(IONIC_LIF_F_FW_STOPPING, lif->state))
+		return 0;
+
+	err = ionic_adminq_post(lif, ctx);
+
+	return ionic_adminq_wait(lif, ctx, err, do_msg);
+}
+
+int ionic_adminq_post_wait(struct ionic_lif *lif, struct ionic_admin_ctx *ctx)
+{
+	return __ionic_adminq_post_wait(lif, ctx, true);
+}
+
+int ionic_adminq_post_wait_nomsg(struct ionic_lif *lif, struct ionic_admin_ctx *ctx)
+{
+	return __ionic_adminq_post_wait(lif, ctx, false);
+}
+
+static void ionic_dev_cmd_clean(struct ionic *ionic)
+{
+	struct ionic_dev *idev = &ionic->idev;
+
+	iowrite32(0, &idev->dev_cmd_regs->doorbell);
+	memset_io(&idev->dev_cmd_regs->cmd, 0, sizeof(idev->dev_cmd_regs->cmd));
+}
+
+void ionic_dev_cmd_dev_err_print(struct ionic *ionic, u8 opcode, u8 status,
+				 int err)
+{
+	const char *stat_str;
+
+	stat_str = (err == -ETIMEDOUT) ? "TIMEOUT" :
+					 ionic_error_to_str(status);
+
+	dev_err(ionic->dev, "DEV_CMD %s (%d) error, %s (%d) failed\n",
+		ionic_opcode_to_str(opcode), opcode, stat_str, err);
+}
+
+static int __ionic_dev_cmd_wait(struct ionic *ionic, unsigned long max_seconds,
+				const bool do_msg)
+{
+	struct ionic_dev *idev = &ionic->idev;
+	unsigned long start_time;
+	unsigned long max_wait;
+	unsigned long duration;
+	int done = 0;
+	bool fw_up;
+	int opcode;
+	int err;
+
+	/* Wait for dev cmd to complete, retrying if we get EAGAIN,
+	 * but don't wait any longer than max_seconds.
+	 */
+	max_wait = jiffies + (max_seconds * HZ);
+try_again:
+	opcode = ioread8(&idev->dev_cmd_regs->cmd.cmd.opcode);
+	start_time = jiffies;
+	for (fw_up = ionic_is_fw_running(idev);
+	     !done && fw_up && time_before(jiffies, max_wait);
+	     fw_up = ionic_is_fw_running(idev)) {
+		done = ionic_dev_cmd_done(idev);
+		if (done)
+			break;
+		usleep_range(100, 200);
+	}
+	duration = jiffies - start_time;
+
+	dev_dbg(ionic->dev, "DEVCMD %s (%d) done=%d took %ld secs (%ld jiffies)\n",
+		ionic_opcode_to_str(opcode), opcode,
+		done, duration / HZ, duration);
+
+	if (!done && !fw_up) {
+		ionic_dev_cmd_clean(ionic);
+		dev_warn(ionic->dev, "DEVCMD %s (%d) interrupted - FW is down\n",
+			 ionic_opcode_to_str(opcode), opcode);
+		return -ENXIO;
+	}
+
+	if (!done && !time_before(jiffies, max_wait)) {
+		ionic_dev_cmd_clean(ionic);
+		dev_warn(ionic->dev, "DEVCMD %s (%d) timeout after %ld secs\n",
+			 ionic_opcode_to_str(opcode), opcode, max_seconds);
+		return -ETIMEDOUT;
+	}
+
+	err = ionic_dev_cmd_status(&ionic->idev);
+	if (err) {
+		if (err == IONIC_RC_EAGAIN && !time_after(jiffies, max_wait)) {
+			dev_dbg(ionic->dev, "DEV_CMD %s (%d), %s (%d) retrying...\n",
+				ionic_opcode_to_str(opcode), opcode,
+				ionic_error_to_str(err), err);
+
+			iowrite32(0, &idev->dev_cmd_regs->done);
+			msleep(1000);
+			iowrite32(1, &idev->dev_cmd_regs->doorbell);
+			goto try_again;
+		}
+
+		if (do_msg)
+			ionic_dev_cmd_dev_err_print(ionic, opcode, err,
+						    ionic_error_to_errno(err));
+
+		return ionic_error_to_errno(err);
+	}
+
+	ionic_dev_cmd_clean(ionic);
+
+	return 0;
+}
+
+int ionic_dev_cmd_wait(struct ionic *ionic, unsigned long max_seconds)
+{
+	return __ionic_dev_cmd_wait(ionic, max_seconds, true);
+}
+
+int ionic_dev_cmd_wait_nomsg(struct ionic *ionic, unsigned long max_seconds)
+{
+	return __ionic_dev_cmd_wait(ionic, max_seconds, false);
+}
+
+int ionic_set_dma_mask(struct ionic *ionic)
+{
+	struct device *dev = ionic->dev;
+	int err;
+
+	/* Query system for DMA addressing limitation for the device. */
+#ifdef CONFIG_PPC64
+	ionic->pdev->no_64bit_msi = 1;
+#endif
+	err = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(IONIC_ADDR_LEN));
+	if (err)
+		dev_err(dev, "Unable to obtain 64-bit DMA for consistent allocations, aborting.  err=%d\n",
+			err);
+
+	return err;
+}
+
+int ionic_setup(struct ionic *ionic)
+{
+	int err;
+
+	err = ionic_dev_setup(ionic);
+	if (err)
+		return err;
+
+	ionic_debugfs_add_dev_cmd(ionic);
+	ionic_reset(ionic);
+
+	return 0;
+}
+
+int ionic_identify(struct ionic *ionic)
+{
+	struct ionic_identity *ident = &ionic->ident;
+	struct ionic_dev *idev = &ionic->idev;
+	size_t sz;
+	int err;
+
+	memset(ident, 0, sizeof(*ident));
+
+	ident->drv.os_type = cpu_to_le32(IONIC_OS_TYPE_LINUX);
+	ident->drv.os_dist = 0;
+	strncpy(ident->drv.os_dist_str, utsname()->release,
+		sizeof(ident->drv.os_dist_str) - 1);
+	ident->drv.kernel_ver = cpu_to_le32(LINUX_VERSION_CODE);
+	strncpy(ident->drv.kernel_ver_str, utsname()->version,
+		sizeof(ident->drv.kernel_ver_str) - 1);
+	strncpy(ident->drv.driver_ver_str, IONIC_DRV_VERSION,
+		sizeof(ident->drv.driver_ver_str) - 1);
+
+	mutex_lock(&ionic->dev_cmd_lock);
+
+	sz = min(sizeof(ident->drv), sizeof(idev->dev_cmd_regs->data));
+	memcpy_toio(&idev->dev_cmd_regs->data, &ident->drv, sz);
+
+#if defined(IONIC_DEV_IDENTITY_VERSION_2)
+	ionic_dev_cmd_identify(idev, IONIC_DEV_IDENTITY_VERSION_2);
+#else
+	ionic_dev_cmd_identify(idev, IONIC_IDENTITY_VERSION_1);
+#endif
+	err = ionic_dev_cmd_wait(ionic, devcmd_timeout);
+	if (!err) {
+		sz = min(sizeof(ident->dev), sizeof(idev->dev_cmd_regs->data));
+		memcpy_fromio(&ident->dev, &idev->dev_cmd_regs->data, sz);
+	}
+	mutex_unlock(&ionic->dev_cmd_lock);
+
+	if (err) {
+		dev_err(ionic->dev, "Cannot identify ionic: %d\n", err);
+		goto err_out;
+	}
+
+	if (isprint(idev->dev_info.fw_version[0]) &&
+	    isascii(idev->dev_info.fw_version[0]))
+		dev_info(ionic->dev, "FW: %.*s\n",
+			 (int)(sizeof(idev->dev_info.fw_version) - 1),
+			 idev->dev_info.fw_version);
+	else
+		dev_info(ionic->dev, "FW: (invalid string) 0x%02x 0x%02x 0x%02x 0x%02x ...\n",
+			 (u8)idev->dev_info.fw_version[0],
+			 (u8)idev->dev_info.fw_version[1],
+			 (u8)idev->dev_info.fw_version[2],
+			 (u8)idev->dev_info.fw_version[3]);
+
+	err = ionic_lif_identify(ionic, IONIC_LIF_TYPE_CLASSIC,
+				 &ionic->ident.lif);
+	if (err) {
+		dev_err(ionic->dev, "Cannot identify LIFs: %d\n", err);
+		goto err_out;
+	}
+
+	return 0;
+
+err_out:
+	return err;
+}
+
+int ionic_init(struct ionic *ionic)
+{
+	struct ionic_dev *idev = &ionic->idev;
+	int err;
+
+	mutex_lock(&ionic->dev_cmd_lock);
+	ionic_dev_cmd_init(idev);
+	err = ionic_dev_cmd_wait(ionic, devcmd_timeout);
+	mutex_unlock(&ionic->dev_cmd_lock);
+
+	return err;
+}
+
+int ionic_reset(struct ionic *ionic)
+{
+	struct ionic_dev *idev = &ionic->idev;
+	int err;
+
+	if (!ionic_is_fw_running(idev))
+		return 0;
+
+	mutex_lock(&ionic->dev_cmd_lock);
+	ionic_dev_cmd_reset(idev);
+	err = ionic_dev_cmd_wait(ionic, devcmd_timeout);
+	mutex_unlock(&ionic->dev_cmd_lock);
+
+	return err;
+}
+
+int ionic_port_identify(struct ionic *ionic)
+{
+	struct ionic_identity *ident = &ionic->ident;
+	struct ionic_dev *idev = &ionic->idev;
+	struct device *dev = ionic->dev;
+	size_t sz;
+	int err;
+
+	mutex_lock(&ionic->dev_cmd_lock);
+
+	ionic_dev_cmd_port_identify(idev);
+	err = ionic_dev_cmd_wait(ionic, devcmd_timeout);
+	if (!err) {
+		sz = min(sizeof(ident->port), sizeof(idev->dev_cmd_regs->data));
+		memcpy_fromio(&ident->port, &idev->dev_cmd_regs->data, sz);
+	}
+
+	mutex_unlock(&ionic->dev_cmd_lock);
+
+	dev_dbg(dev, "type %d\n", ident->port.type);
+	dev_dbg(dev, "speed %d\n", ident->port.config.speed);
+	dev_dbg(dev, "mtu %d\n", ident->port.config.mtu);
+	dev_dbg(dev, "state %d\n", ident->port.config.state);
+	dev_dbg(dev, "an_enable %d\n", ident->port.config.an_enable);
+	dev_dbg(dev, "fec_type %d\n", ident->port.config.fec_type);
+	dev_dbg(dev, "pause_type %d\n", ident->port.config.pause_type);
+	dev_dbg(dev, "loopback_mode %d\n", ident->port.config.loopback_mode);
+
+	return err;
+}
+
+int ionic_port_init(struct ionic *ionic)
+{
+	struct ionic_identity *ident = &ionic->ident;
+	struct ionic_dev *idev = &ionic->idev;
+	size_t sz;
+	int err;
+
+	if (!idev->port_info) {
+		idev->port_info_sz = ALIGN(sizeof(*idev->port_info), PAGE_SIZE);
+		idev->port_info = dma_alloc_coherent(ionic->dev,
+						     idev->port_info_sz,
+						     &idev->port_info_pa,
+						     GFP_KERNEL);
+		if (!idev->port_info)
+			return -ENOMEM;
+	}
+
+	sz = min(sizeof(ident->port.config), sizeof(idev->dev_cmd_regs->data));
+
+	mutex_lock(&ionic->dev_cmd_lock);
+
+	memcpy_toio(&idev->dev_cmd_regs->data, &ident->port.config, sz);
+	ionic_dev_cmd_port_init(idev);
+	err = ionic_dev_cmd_wait(ionic, devcmd_timeout);
+
+	if (port_init_up) {
+		ionic_dev_cmd_port_state(&ionic->idev, IONIC_PORT_ADMIN_STATE_UP);
+		(void)ionic_dev_cmd_wait(ionic, devcmd_timeout);
+	}
+
+	mutex_unlock(&ionic->dev_cmd_lock);
+	if (err) {
+		dev_err(ionic->dev, "Failed to init port\n");
+		dma_free_coherent(ionic->dev, idev->port_info_sz,
+				  idev->port_info, idev->port_info_pa);
+		idev->port_info = NULL;
+		idev->port_info_pa = 0;
+	}
+
+	return err;
+}
+
+int ionic_port_reset(struct ionic *ionic)
+{
+	struct ionic_dev *idev = &ionic->idev;
+	int err = 0;
+
+	if (!idev->port_info)
+		return 0;
+
+	if (ionic_is_fw_running(idev)) {
+		mutex_lock(&ionic->dev_cmd_lock);
+		ionic_dev_cmd_port_reset(idev);
+		err = ionic_dev_cmd_wait(ionic, devcmd_timeout);
+		mutex_unlock(&ionic->dev_cmd_lock);
+	}
+
+	dma_free_coherent(ionic->dev, idev->port_info_sz,
+			  idev->port_info, idev->port_info_pa);
+
+	idev->port_info = NULL;
+	idev->port_info_pa = 0;
+
+	return err;
+}
+
+static int __init ionic_init_module(void)
+{
+	unsigned long max_affinity = GENMASK_ULL((min(num_present_cpus(),
+					(unsigned int)(sizeof(unsigned long)*BITS_PER_BYTE))-1), 0);
+
+	pr_info("%s %s, ver %s\n",
+		IONIC_DRV_NAME, IONIC_DRV_DESCRIPTION, IONIC_DRV_VERSION);
+
+	ionic_debugfs_create();
+
+	if (affinity_mask_override) {
+		/* limit affinity mask override to the available CPUs */
+		if (affinity_mask_override > max_affinity) {
+			affinity_mask_override = (affinity_mask_override & max_affinity);
+			pr_info("limiting affinity mask to: 0x%lx\n",
+					affinity_mask_override);
+		} else {
+			pr_info("affinity_mask_override: %lx\n",
+					affinity_mask_override);
+		}
+	}
+
+	return ionic_bus_register_driver();
+}
+
+static void __exit ionic_cleanup_module(void)
+{
+	/* If there's a long devcmd_timeout set, don't let
+	 * hung FW slow us down when exiting
+	 */
+	devcmd_timeout = min_t(int, devcmd_timeout, SHORT_TIMEOUT);
+
+	ionic_bus_unregister_driver();
+	ionic_debugfs_destroy();
+
+	pr_info("%s removed\n", IONIC_DRV_NAME);
+}
+
+module_init(ionic_init_module);
+module_exit(ionic_cleanup_module);
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_phc.c b/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_phc.c
new file mode 100644
index 000000000..1e21a5725
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_phc.c
@@ -0,0 +1,711 @@
+// SPDX-License-Identifier: GPL-2.0
+/* Copyright(c) 2017 - 2022 Pensando Systems, Inc */
+
+#include <linux/netdevice.h>
+#include <linux/etherdevice.h>
+
+#include "ionic.h"
+#include "ionic_bus.h"
+#include "ionic_lif.h"
+#include "ionic_ethtool.h"
+
+/* XXX not for upstream: kernel config is changed in kcompat */
+/* normally this file will not be compiled if ptp is not enabled */
+#if IS_ENABLED(CONFIG_PTP_1588_CLOCK)
+
+static int ionic_hwstamp_tx_mode(int config_tx_type)
+{
+	switch (config_tx_type) {
+	case HWTSTAMP_TX_OFF:
+		return IONIC_TXSTAMP_OFF;
+	case HWTSTAMP_TX_ON:
+		return IONIC_TXSTAMP_ON;
+	case HWTSTAMP_TX_ONESTEP_SYNC:
+		return IONIC_TXSTAMP_ONESTEP_SYNC;
+#ifdef HAVE_HWSTAMP_TX_ONESTEP_P2P
+	case HWTSTAMP_TX_ONESTEP_P2P:
+		return IONIC_TXSTAMP_ONESTEP_P2P;
+#endif
+	default:
+		return -ERANGE;
+	}
+}
+
+static u64 ionic_hwstamp_rx_filt(int config_rx_filter)
+{
+	switch (config_rx_filter) {
+	case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
+		return IONIC_PKT_CLS_PTP1_ALL;
+	case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
+		return IONIC_PKT_CLS_PTP1_SYNC;
+	case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
+		return IONIC_PKT_CLS_PTP1_SYNC | IONIC_PKT_CLS_PTP1_DREQ;
+
+	case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
+		return IONIC_PKT_CLS_PTP2_L4_ALL;
+	case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
+		return IONIC_PKT_CLS_PTP2_L4_SYNC;
+	case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
+		return IONIC_PKT_CLS_PTP2_L4_SYNC | IONIC_PKT_CLS_PTP2_L4_DREQ;
+
+	case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
+		return IONIC_PKT_CLS_PTP2_L2_ALL;
+	case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
+		return IONIC_PKT_CLS_PTP2_L2_SYNC;
+	case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
+		return IONIC_PKT_CLS_PTP2_L2_SYNC | IONIC_PKT_CLS_PTP2_L2_DREQ;
+
+	case HWTSTAMP_FILTER_PTP_V2_EVENT:
+		return IONIC_PKT_CLS_PTP2_ALL;
+	case HWTSTAMP_FILTER_PTP_V2_SYNC:
+		return IONIC_PKT_CLS_PTP2_SYNC;
+	case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
+		return IONIC_PKT_CLS_PTP2_SYNC | IONIC_PKT_CLS_PTP2_DREQ;
+#ifdef HAVE_HWTSTAMP_FILTER_NTP_ALL
+	case HWTSTAMP_FILTER_NTP_ALL:
+		return IONIC_PKT_CLS_NTP_ALL;
+#endif
+	default:
+		return 0;
+	}
+}
+
+static int ionic_lif_hwstamp_set_ts_config(struct ionic_lif *lif,
+					   struct hwtstamp_config *new_ts)
+{
+	struct ionic *ionic = lif->ionic;
+	struct hwtstamp_config *config;
+	struct hwtstamp_config ts;
+	int tx_mode = 0;
+	u64 rx_filt = 0;
+	int err, err2;
+	bool rx_all;
+	__le64 mask;
+
+	if (!lif->phc || !lif->phc->ptp)
+		return -EOPNOTSUPP;
+
+	mutex_lock(&lif->phc->config_lock);
+
+	if (new_ts) {
+		config = new_ts;
+	} else {
+		/* If called with new_ts == NULL, replay the previous request
+		 * primarily for recovery after a FW_RESET.
+		 * We saved the previous configuration request info, so copy
+		 * the previous request for reference, clear the current state
+		 * to match the device's reset state, and run with it.
+		 */
+		config = &ts;
+		memcpy(config, &lif->phc->ts_config, sizeof(*config));
+		memset(&lif->phc->ts_config, 0, sizeof(lif->phc->ts_config));
+		lif->phc->ts_config_tx_mode = 0;
+		lif->phc->ts_config_rx_filt = 0;
+	}
+
+	tx_mode = ionic_hwstamp_tx_mode(config->tx_type);
+	if (tx_mode < 0) {
+		err = tx_mode;
+		goto err_queues;
+	}
+
+	mask = cpu_to_le64(BIT_ULL(tx_mode));
+	if ((ionic->ident.lif.eth.hwstamp_tx_modes & mask) != mask) {
+		err = -ERANGE;
+		goto err_queues;
+	}
+
+	rx_filt = ionic_hwstamp_rx_filt(config->rx_filter);
+	rx_all = config->rx_filter != HWTSTAMP_FILTER_NONE && !rx_filt;
+
+	mask = cpu_to_le64(rx_filt);
+	if ((ionic->ident.lif.eth.hwstamp_rx_filters & mask) != mask) {
+		rx_filt = 0;
+		rx_all = true;
+		config->rx_filter = HWTSTAMP_FILTER_ALL;
+	}
+
+	dev_dbg(ionic->dev, "%s: config_rx_filter %d rx_filt %#llx rx_all %d\n",
+		__func__, config->rx_filter, rx_filt, rx_all);
+
+	if (tx_mode) {
+		err = ionic_lif_create_hwstamp_txq(lif);
+		if (err)
+			goto err_queues;
+	}
+
+	if (rx_filt) {
+		err = ionic_lif_create_hwstamp_rxq(lif);
+		if (err)
+			goto err_queues;
+	}
+
+	if (tx_mode != lif->phc->ts_config_tx_mode) {
+		err = ionic_lif_set_hwstamp_txmode(lif, tx_mode);
+		if (err)
+			goto err_txmode;
+	}
+
+	if (rx_filt != lif->phc->ts_config_rx_filt) {
+		err = ionic_lif_set_hwstamp_rxfilt(lif, rx_filt);
+		if (err)
+			goto err_rxfilt;
+	}
+
+	if (rx_all != (lif->phc->ts_config.rx_filter == HWTSTAMP_FILTER_ALL)) {
+		err = ionic_lif_config_hwstamp_rxq_all(lif, rx_all);
+		if (err)
+			goto err_rxall;
+	}
+
+	memcpy(&lif->phc->ts_config, config, sizeof(*config));
+	lif->phc->ts_config_rx_filt = rx_filt;
+	lif->phc->ts_config_tx_mode = tx_mode;
+
+	mutex_unlock(&lif->phc->config_lock);
+
+	return 0;
+
+err_rxall:
+	if (rx_filt != lif->phc->ts_config_rx_filt) {
+		rx_filt = lif->phc->ts_config_rx_filt;
+		err2 = ionic_lif_set_hwstamp_rxfilt(lif, rx_filt);
+		if (err2)
+			dev_err(ionic->dev,
+				"Failed to revert rx timestamp filter: %d\n", err2);
+	}
+err_rxfilt:
+	if (tx_mode != lif->phc->ts_config_tx_mode) {
+		tx_mode = lif->phc->ts_config_tx_mode;
+		err2 = ionic_lif_set_hwstamp_txmode(lif, tx_mode);
+		if (err2)
+			dev_err(ionic->dev,
+				"Failed to revert tx timestamp mode: %d\n", err2);
+	}
+err_txmode:
+	/* special queues remain allocated, just unused */
+err_queues:
+	mutex_unlock(&lif->phc->config_lock);
+	return err;
+}
+
+int ionic_lif_hwstamp_set(struct ionic_lif *lif, struct ifreq *ifr)
+{
+	struct hwtstamp_config config;
+	int err;
+
+	if (!lif->phc || !lif->phc->ptp)
+		return -EOPNOTSUPP;
+
+	if (copy_from_user(&config, ifr->ifr_data, sizeof(config)))
+		return -EFAULT;
+
+	mutex_lock(&lif->queue_lock);
+	err = ionic_lif_hwstamp_set_ts_config(lif, &config);
+	mutex_unlock(&lif->queue_lock);
+	if (err) {
+		netdev_info(lif->netdev, "hwstamp set failed: %d\n", err);
+		return err;
+	}
+
+	if (copy_to_user(ifr->ifr_data, &config, sizeof(config)))
+		return -EFAULT;
+
+	return 0;
+}
+
+void ionic_lif_hwstamp_replay(struct ionic_lif *lif)
+{
+	int err;
+
+	if (!lif->phc || !lif->phc->ptp)
+		return;
+
+	mutex_lock(&lif->queue_lock);
+	err = ionic_lif_hwstamp_set_ts_config(lif, NULL);
+	mutex_unlock(&lif->queue_lock);
+	if (err)
+		netdev_info(lif->netdev, "hwstamp replay failed: %d\n", err);
+}
+
+void ionic_lif_hwstamp_recreate_queues(struct ionic_lif *lif)
+{
+	int err;
+
+	if (!lif->phc || !lif->phc->ptp)
+		return;
+
+	mutex_lock(&lif->phc->config_lock);
+
+	if (lif->phc->ts_config_tx_mode) {
+		err = ionic_lif_create_hwstamp_txq(lif);
+		if (err)
+			netdev_info(lif->netdev, "hwstamp recreate txq failed: %d\n", err);
+	}
+
+	if (lif->phc->ts_config_rx_filt) {
+		err = ionic_lif_create_hwstamp_rxq(lif);
+		if (err)
+			netdev_info(lif->netdev, "hwstamp recreate rxq failed: %d\n", err);
+	}
+
+	mutex_unlock(&lif->phc->config_lock);
+}
+
+int ionic_lif_hwstamp_get(struct ionic_lif *lif, struct ifreq *ifr)
+{
+	struct hwtstamp_config config;
+
+	if (!lif->phc || !lif->phc->ptp)
+		return -EOPNOTSUPP;
+
+	mutex_lock(&lif->phc->config_lock);
+	memcpy(&config, &lif->phc->ts_config, sizeof(config));
+	mutex_unlock(&lif->phc->config_lock);
+
+	if (copy_to_user(ifr->ifr_data, &config, sizeof(config)))
+		return -EFAULT;
+	return 0;
+}
+
+#ifdef HAVE_PHC_GETTIMEX64
+static u64 ionic_hwstamp_read(struct ionic *ionic,
+			      struct ptp_system_timestamp *sts)
+#else
+static u64 ionic_hwstamp_read(struct ionic *ionic)
+#endif
+{
+	u32 tick_high_before, tick_high, tick_low;
+
+	/* read and discard low part to defeat hw staging of high part */
+	(void)ioread32(&ionic->idev.hwstamp_regs->tick_low);
+
+	tick_high_before = ioread32(&ionic->idev.hwstamp_regs->tick_high);
+
+#ifdef HAVE_PHC_GETTIMEX64
+	ptp_read_system_prets(sts);
+#endif
+	tick_low = ioread32(&ionic->idev.hwstamp_regs->tick_low);
+#ifdef HAVE_PHC_GETTIMEX64
+	ptp_read_system_postts(sts);
+#endif
+
+	tick_high = ioread32(&ionic->idev.hwstamp_regs->tick_high);
+
+	/* If tick_high changed, re-read tick_low once more.  Assume tick_high
+	 * cannot change again so soon as in the span of re-reading tick_low.
+	 */
+	if (tick_high != tick_high_before) {
+#ifdef HAVE_PHC_GETTIMEX64
+		ptp_read_system_prets(sts);
+#endif
+		tick_low = ioread32(&ionic->idev.hwstamp_regs->tick_low);
+#ifdef HAVE_PHC_GETTIMEX64
+		ptp_read_system_postts(sts);
+#endif
+	}
+
+	return (u64)tick_low | ((u64)tick_high << 32);
+}
+
+static u64 ionic_cc_read(const struct cyclecounter *cc)
+{
+	struct ionic_phc *phc = container_of(cc, struct ionic_phc, cc);
+	struct ionic *ionic = phc->lif->ionic;
+
+#ifdef HAVE_PHC_GETTIMEX64
+	return ionic_hwstamp_read(ionic, NULL);
+#else
+	return ionic_hwstamp_read(ionic);
+#endif
+}
+
+static int ionic_setphc_cmd(struct ionic_phc *phc, struct ionic_admin_ctx *ctx)
+{
+	ctx->work = COMPLETION_INITIALIZER_ONSTACK(ctx->work);
+
+	ctx->cmd.lif_setphc.opcode = IONIC_CMD_LIF_SETPHC;
+	ctx->cmd.lif_setphc.lif_index = cpu_to_le16(phc->lif->index);
+
+	ctx->cmd.lif_setphc.tick = cpu_to_le64(phc->tc.cycle_last);
+	ctx->cmd.lif_setphc.nsec = cpu_to_le64(phc->tc.nsec);
+	ctx->cmd.lif_setphc.frac = cpu_to_le64(phc->tc.frac);
+	ctx->cmd.lif_setphc.mult = cpu_to_le32(phc->cc.mult);
+	ctx->cmd.lif_setphc.shift = cpu_to_le32(phc->cc.shift);
+
+	return ionic_adminq_post(phc->lif, ctx);
+}
+
+#ifdef HAVE_PTP_ADJFINE
+static int ionic_phc_adjfine(struct ptp_clock_info *info, long scaled_ppm)
+{
+	struct ionic_phc *phc = container_of(info, struct ionic_phc, ptp_info);
+	struct ionic_admin_ctx ctx = {};
+	unsigned long irqflags;
+	s64 adj;
+	int err;
+
+	/* Reject phc adjustments during device upgrade */
+	if (test_bit(IONIC_LIF_F_FW_RESET, phc->lif->state))
+		return -EBUSY;
+
+	/* Adjustment value scaled by 2^16 million */
+	adj = (s64)scaled_ppm * phc->init_cc_mult;
+
+	/* Adjustment value to scale */
+	adj /= (s64)SCALED_PPM;
+
+	/* Final adjusted multiplier */
+	adj += phc->init_cc_mult;
+
+	spin_lock_irqsave(&phc->lock, irqflags);
+
+	/* update the point-in-time basis to now, before adjusting the rate */
+	timecounter_read(&phc->tc);
+	phc->cc.mult = adj;
+
+	/* Setphc commands are posted in-order, sequenced by phc->lock.  We
+	 * need to drop the lock before waiting for the command to complete.
+	 */
+	err = ionic_setphc_cmd(phc, &ctx);
+
+	spin_unlock_irqrestore(&phc->lock, irqflags);
+
+	return ionic_adminq_wait(phc->lif, &ctx, err, true);
+}
+#endif
+
+static int ionic_phc_adjtime(struct ptp_clock_info *info, s64 delta)
+{
+	struct ionic_phc *phc = container_of(info, struct ionic_phc, ptp_info);
+	struct ionic_admin_ctx ctx = {};
+	unsigned long irqflags;
+	int err;
+
+	/* Reject phc adjustments during device upgrade */
+	if (test_bit(IONIC_LIF_F_FW_RESET, phc->lif->state))
+		return -EBUSY;
+
+	spin_lock_irqsave(&phc->lock, irqflags);
+
+	timecounter_adjtime(&phc->tc, delta);
+
+	/* Setphc commands are posted in-order, sequenced by phc->lock.  We
+	 * need to drop the lock before waiting for the command to complete.
+	 */
+	err = ionic_setphc_cmd(phc, &ctx);
+
+	spin_unlock_irqrestore(&phc->lock, irqflags);
+
+	return ionic_adminq_wait(phc->lif, &ctx, err, true);
+}
+
+static int ionic_phc_settime64(struct ptp_clock_info *info,
+			       const struct timespec64 *ts)
+{
+	struct ionic_phc *phc = container_of(info, struct ionic_phc, ptp_info);
+	struct ionic_admin_ctx ctx = {};
+	unsigned long irqflags;
+	int err;
+	u64 ns;
+
+	/* Reject phc adjustments during device upgrade */
+	if (test_bit(IONIC_LIF_F_FW_RESET, phc->lif->state))
+		return -EBUSY;
+
+	ns = timespec64_to_ns(ts);
+
+	spin_lock_irqsave(&phc->lock, irqflags);
+
+	timecounter_init(&phc->tc, &phc->cc, ns);
+
+	/* Setphc commands are posted in-order, sequenced by phc->lock.  We
+	 * need to drop the lock before waiting for the command to complete.
+	 */
+	err = ionic_setphc_cmd(phc, &ctx);
+
+	spin_unlock_irqrestore(&phc->lock, irqflags);
+
+	return ionic_adminq_wait(phc->lif, &ctx, err, true);
+}
+
+#ifdef HAVE_PHC_GETTIMEX64
+static int ionic_phc_gettimex64(struct ptp_clock_info *info,
+				struct timespec64 *ts,
+				struct ptp_system_timestamp *sts)
+#else
+static int ionic_phc_gettime64(struct ptp_clock_info *info,
+			       struct timespec64 *ts)
+#endif
+{
+	struct ionic_phc *phc = container_of(info, struct ionic_phc, ptp_info);
+	struct ionic *ionic = phc->lif->ionic;
+	unsigned long irqflags;
+	u64 tick, ns;
+
+	/* Do not attempt to read device time during upgrade */
+	if (test_bit(IONIC_LIF_F_FW_RESET, phc->lif->state))
+		return -EBUSY;
+
+	spin_lock_irqsave(&phc->lock, irqflags);
+
+#ifdef HAVE_PHC_GETTIMEX64
+	tick = ionic_hwstamp_read(ionic, sts);
+#else
+	tick = ionic_hwstamp_read(ionic);
+#endif
+
+	ns = timecounter_cyc2time(&phc->tc, tick);
+
+	spin_unlock_irqrestore(&phc->lock, irqflags);
+
+	*ts = ns_to_timespec64(ns);
+
+	return 0;
+}
+
+static long ionic_phc_aux_work(struct ptp_clock_info *info)
+{
+	struct ionic_phc *phc = container_of(info, struct ionic_phc, ptp_info);
+	struct ionic_admin_ctx ctx = {};
+	unsigned long irqflags;
+	int err;
+
+	/* Do not update phc during device upgrade, but keep polling to resume
+	 * after upgrade.  Since we don't update the point in time basis, there
+	 * is no expectation that we are maintaining the phc time during the
+	 * upgrade.  After upgrade, it will need to be readjusted back to the
+	 * correct time by the ptp daemon.
+	 */
+	if (test_bit(IONIC_LIF_F_FW_RESET, phc->lif->state))
+		return phc->aux_work_delay;
+
+	spin_lock_irqsave(&phc->lock, irqflags);
+
+	/* update point-in-time basis to now */
+	timecounter_read(&phc->tc);
+
+	/* Setphc commands are posted in-order, sequenced by phc->lock.  We
+	 * need to drop the lock before waiting for the command to complete.
+	 */
+	err = ionic_setphc_cmd(phc, &ctx);
+
+	spin_unlock_irqrestore(&phc->lock, irqflags);
+
+	ionic_adminq_wait(phc->lif, &ctx, err, true);
+
+	return phc->aux_work_delay;
+}
+
+#ifndef HAVE_PTP_CLOCK_DO_AUX_WORK
+void ionic_phc_aux_work_helper(struct work_struct *work)
+{
+	struct ionic_phc *phc = container_of(work, struct ionic_phc, dwork.work);
+	long delay;
+
+	delay = ionic_phc_aux_work(&phc->ptp_info);
+	schedule_delayed_work(&phc->dwork, delay);
+}
+#endif
+
+ktime_t ionic_lif_phc_ktime(struct ionic_lif *lif, u64 tick)
+{
+	unsigned long irqflags;
+	u64 ns;
+
+	if (!lif->phc)
+		return ktime_set(0, 0);
+
+	spin_lock_irqsave(&lif->phc->lock, irqflags);
+	ns = timecounter_cyc2time(&lif->phc->tc, tick);
+	spin_unlock_irqrestore(&lif->phc->lock, irqflags);
+
+	return ns_to_ktime(ns);
+}
+
+static const struct ptp_clock_info ionic_ptp_info = {
+	.owner		= THIS_MODULE,
+	.name		= "ionic_ptp",
+#ifdef HAVE_PTP_ADJFINE
+	.adjfine	= ionic_phc_adjfine,
+#endif
+	.adjtime	= ionic_phc_adjtime,
+#ifdef HAVE_PHC_GETTIMEX64
+	.gettimex64	= ionic_phc_gettimex64,
+#else
+	.gettime64	= ionic_phc_gettime64,
+#endif
+	.settime64	= ionic_phc_settime64,
+#ifdef HAVE_PTP_CLOCK_DO_AUX_WORK
+	.do_aux_work	= ionic_phc_aux_work,
+#endif
+};
+
+void ionic_lif_register_phc(struct ionic_lif *lif)
+{
+	if (!lif->phc || !(lif->hw_features & IONIC_ETH_HW_TIMESTAMP))
+		return;
+
+	lif->phc->ptp = ptp_clock_register(&lif->phc->ptp_info, lif->ionic->dev);
+
+	if (IS_ERR(lif->phc->ptp)) {
+		dev_warn(lif->ionic->dev, "Cannot register phc device: %ld\n",
+			 PTR_ERR(lif->phc->ptp));
+
+		lif->phc->ptp = NULL;
+	}
+
+	if (lif->phc->ptp)
+#ifndef HAVE_PTP_CLOCK_DO_AUX_WORK
+		schedule_delayed_work(&lif->phc->dwork, lif->phc->aux_work_delay);
+#else
+		ptp_schedule_worker(lif->phc->ptp, lif->phc->aux_work_delay);
+#endif
+}
+
+void ionic_lif_unregister_phc(struct ionic_lif *lif)
+{
+	if (!lif->phc || !lif->phc->ptp)
+		return;
+
+#ifndef HAVE_PTP_CLOCK_DO_AUX_WORK
+	cancel_delayed_work_sync(&lif->phc->dwork);
+#endif
+	ptp_clock_unregister(lif->phc->ptp);
+
+	lif->phc->ptp = NULL;
+}
+
+void ionic_lif_alloc_phc(struct ionic_lif *lif)
+{
+	struct ionic *ionic = lif->ionic;
+	struct ionic_phc *phc;
+	u64 delay, diff, mult;
+	u64 frac = 0;
+	u64 features;
+	u32 shift;
+
+	if (!ionic->idev.hwstamp_regs)
+		return;
+
+	features = le64_to_cpu(ionic->ident.lif.eth.config.features);
+	if (!(features & IONIC_ETH_HW_TIMESTAMP))
+		return;
+
+	phc = devm_kzalloc(ionic->dev, sizeof(*phc), GFP_KERNEL);
+	if (!phc)
+		return;
+
+	phc->lif = lif;
+
+#ifndef HAVE_PTP_CLOCK_DO_AUX_WORK
+	INIT_DELAYED_WORK(&phc->dwork, ionic_phc_aux_work_helper);
+#endif
+	phc->cc.read = ionic_cc_read;
+	phc->cc.mask = le64_to_cpu(ionic->ident.dev.hwstamp_mask);
+	phc->cc.mult = le32_to_cpu(ionic->ident.dev.hwstamp_mult);
+	phc->cc.shift = le32_to_cpu(ionic->ident.dev.hwstamp_shift);
+
+	if (!phc->cc.mult) {
+		dev_err(lif->ionic->dev,
+			"Invalid device PHC mask multiplier %u, disabling HW timestamp support\n",
+			phc->cc.mult);
+		devm_kfree(lif->ionic->dev, phc);
+		lif->phc = NULL;
+		return;
+	}
+
+	dev_dbg(lif->ionic->dev, "Device PHC mask %#llx mult %u shift %u\n",
+		phc->cc.mask, phc->cc.mult, phc->cc.shift);
+
+	spin_lock_init(&phc->lock);
+	mutex_init(&phc->config_lock);
+
+	/* max ticks is limited by the multiplier, or by the update period. */
+	if (phc->cc.shift + 2 + ilog2(IONIC_PHC_UPDATE_NS) >= 64) {
+		/* max ticks that do not overflow when multiplied by max
+		 * adjusted multiplier (twice the initial multiplier)
+		 */
+		diff = U64_MAX / phc->cc.mult / 2;
+	} else {
+		/* approx ticks at four times the update period */
+		diff = (u64)IONIC_PHC_UPDATE_NS << (phc->cc.shift + 2);
+		diff = DIV_ROUND_UP(diff, phc->cc.mult);
+	}
+
+	/* transform to bitmask */
+	diff |= diff >> 1;
+	diff |= diff >> 2;
+	diff |= diff >> 4;
+	diff |= diff >> 8;
+	diff |= diff >> 16;
+	diff |= diff >> 32;
+
+	/* constrain to the hardware bitmask, and use this as the bitmask */
+	diff &= phc->cc.mask;
+	phc->cc.mask = diff;
+
+	/* the wrap period is now defined by diff (or phc->cc.mask)
+	 *
+	 * we will update the time basis at about 1/4 the wrap period, so
+	 * should not see a difference of more than +/- diff/4.
+	 *
+	 * this is sufficient not see a difference of more than +/- diff/2, as
+	 * required by timecounter_cyc2time, to detect an old time stamp.
+	 *
+	 * adjust the initial multiplier, being careful to avoid overflow:
+	 *  - do not overflow 63 bits: init_cc_mult * SCALED_PPM
+	 *  - do not overflow 64 bits: max_mult * (diff / 2)
+	 *
+	 * we want to increase the initial multiplier as much as possible, to
+	 * allow for more precise adjustment in ionic_phc_adjfine.
+	 *
+	 * only adjust the multiplier if we can double it or more.
+	 */
+	mult = U64_MAX / 2 / max(diff / 2, SCALED_PPM);
+	shift = mult / phc->cc.mult;
+	if (shift >= 2) {
+		/* initial multiplier will be 2^n of hardware cc.mult */
+		shift = fls(shift);
+		/* increase cc.mult and cc.shift by the same 2^n and n. */
+		phc->cc.mult <<= shift;
+		phc->cc.shift += shift;
+	}
+
+	dev_dbg(lif->ionic->dev, "Initial PHC mask %#llx mult %u shift %u\n",
+		phc->cc.mask, phc->cc.mult, phc->cc.shift);
+
+	/* frequency adjustments are relative to the initial multiplier */
+	phc->init_cc_mult = phc->cc.mult;
+
+	timecounter_init(&phc->tc, &phc->cc, ktime_get_real_ns());
+
+	/* Update cycle_last at 1/4 the wrap period, or IONIC_PHC_UPDATE_NS */
+	delay = min_t(u64, IONIC_PHC_UPDATE_NS,
+		      cyclecounter_cyc2ns(&phc->cc, diff / 4, 0, &frac));
+	dev_dbg(lif->ionic->dev, "Work delay %llu ms\n", delay / NSEC_PER_MSEC);
+
+	phc->aux_work_delay = nsecs_to_jiffies(delay);
+
+	phc->ptp_info = ionic_ptp_info;
+
+	/* We have allowed to adjust the multiplier up to +/- 1 part per 1.
+	 * Here expressed as NORMAL_PPB (1 billion parts per billion).
+	 */
+	phc->ptp_info.max_adj = NORMAL_PPB;
+
+	lif->phc = phc;
+}
+
+void ionic_lif_free_phc(struct ionic_lif *lif)
+{
+	if (!lif->phc)
+		return;
+
+	mutex_destroy(&lif->phc->config_lock);
+
+	devm_kfree(lif->ionic->dev, lif->phc);
+	lif->phc = NULL;
+}
+
+#endif
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_phc_weak.c b/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_phc_weak.c
new file mode 100644
index 000000000..8bdcdfa3a
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_phc_weak.c
@@ -0,0 +1,19 @@
+// SPDX-License-Identifier: GPL-2.0
+/* Copyright(c) 2022 Pensando Systems, Inc */
+
+#include <linux/errno.h>
+#include <linux/kernel.h>
+
+struct device;
+struct ptp_clock;
+struct ptp_clock_event;
+struct ptp_clock_info;
+enum ptp_pin_function { PTP_PIN_DUMMY };
+
+__weak struct ptp_clock *ptp_clock_register(struct ptp_clock_info *info, struct device *parent) { return NULL; }
+__weak int ptp_clock_unregister(struct ptp_clock *ptp) { return 0; }
+__weak void ptp_clock_event(struct ptp_clock *ptp, struct ptp_clock_event *event) { }
+__weak int ptp_clock_index(struct ptp_clock *ptp) { return -1; }
+__weak int ptp_find_pin(struct ptp_clock *ptp, enum ptp_pin_function func, unsigned int chan) { return -1; }
+__weak int ptp_schedule_worker(struct ptp_clock *ptp, unsigned long delay) { return -EOPNOTSUPP; }
+__weak void ptp_cancel_worker_sync(struct ptp_clock *ptp) { }
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_rx_filter.c b/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_rx_filter.c
new file mode 100644
index 000000000..e4d6d386e
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_rx_filter.c
@@ -0,0 +1,619 @@
+// SPDX-License-Identifier: GPL-2.0
+/* Copyright(c) 2017 - 2022 Pensando Systems, Inc */
+
+#include <linux/netdevice.h>
+#include <linux/dynamic_debug.h>
+#include <linux/etherdevice.h>
+#include <linux/list.h>
+
+#include "ionic.h"
+#include "ionic_lif.h"
+#include "ionic_rx_filter.h"
+
+void ionic_rx_filter_free(struct ionic_lif *lif, struct ionic_rx_filter *f)
+{
+	struct device *dev = lif->ionic->dev;
+
+	hlist_del(&f->by_id);
+	hlist_del(&f->by_hash);
+	devm_kfree(dev, f);
+}
+
+void ionic_rx_filter_replay(struct ionic_lif *lif)
+{
+	struct ionic_rx_filter_add_cmd *ac;
+	struct hlist_head new_id_list;
+	struct ionic_admin_ctx ctx;
+	struct ionic_rx_filter *f;
+	struct hlist_head *head;
+	struct hlist_node *tmp;
+	unsigned int key;
+	unsigned int i;
+	int err;
+
+	INIT_HLIST_HEAD(&new_id_list);
+	ac = &ctx.cmd.rx_filter_add;
+
+	for (i = 0; i < IONIC_RX_FILTER_HLISTS; i++) {
+		head = &lif->rx_filters.by_id[i];
+		hlist_for_each_entry_safe(f, tmp, head, by_id) {
+			ctx.work = COMPLETION_INITIALIZER_ONSTACK(ctx.work);
+			memcpy(ac, &f->cmd, sizeof(f->cmd));
+			dev_dbg(&lif->netdev->dev, "replay filter command:\n");
+			dynamic_hex_dump("cmd ", DUMP_PREFIX_OFFSET, 16, 1,
+					 &ctx.cmd, sizeof(ctx.cmd), true);
+
+			err = ionic_adminq_post_wait(lif, &ctx);
+			if (err) {
+				switch (le16_to_cpu(ac->match)) {
+				case IONIC_RX_FILTER_MATCH_VLAN:
+					netdev_info(lif->netdev, "Replay failed - %d: vlan %d\n",
+						    err,
+						    le16_to_cpu(ac->vlan.vlan));
+					break;
+				case IONIC_RX_FILTER_MATCH_MAC:
+					netdev_info(lif->netdev, "Replay failed - %d: mac %pM\n",
+						    err, ac->mac.addr);
+					break;
+				case IONIC_RX_FILTER_MATCH_MAC_VLAN:
+					netdev_info(lif->netdev, "Replay failed - %d: vlan %d mac %pM\n",
+						    err,
+						    le16_to_cpu(ac->vlan.vlan),
+						    ac->mac.addr);
+					break;
+				}
+				spin_lock_bh(&lif->rx_filters.lock);
+				ionic_rx_filter_free(lif, f);
+				spin_unlock_bh(&lif->rx_filters.lock);
+
+				continue;
+			}
+
+			/* remove from old id list, save new id in tmp list */
+			spin_lock_bh(&lif->rx_filters.lock);
+			hlist_del(&f->by_id);
+			spin_unlock_bh(&lif->rx_filters.lock);
+			f->filter_id = le32_to_cpu(ctx.comp.rx_filter_add.filter_id);
+			hlist_add_head(&f->by_id, &new_id_list);
+		}
+	}
+
+	/* rebuild the by_id hash lists with the new filter ids */
+	spin_lock_bh(&lif->rx_filters.lock);
+	hlist_for_each_entry_safe(f, tmp, &new_id_list, by_id) {
+		key = f->filter_id & IONIC_RX_FILTER_HLISTS_MASK;
+		head = &lif->rx_filters.by_id[key];
+		hlist_add_head(&f->by_id, head);
+	}
+	spin_unlock_bh(&lif->rx_filters.lock);
+}
+
+int ionic_rx_filters_init(struct ionic_lif *lif)
+{
+	unsigned int i;
+
+	spin_lock_init(&lif->rx_filters.lock);
+
+	spin_lock_bh(&lif->rx_filters.lock);
+	for (i = 0; i < IONIC_RX_FILTER_HLISTS; i++) {
+		INIT_HLIST_HEAD(&lif->rx_filters.by_hash[i]);
+		INIT_HLIST_HEAD(&lif->rx_filters.by_id[i]);
+	}
+	spin_unlock_bh(&lif->rx_filters.lock);
+
+	return 0;
+}
+
+void ionic_rx_filters_deinit(struct ionic_lif *lif)
+{
+	struct ionic_rx_filter *f;
+	struct hlist_head *head;
+	struct hlist_node *tmp;
+	unsigned int i;
+
+	spin_lock_bh(&lif->rx_filters.lock);
+	for (i = 0; i < IONIC_RX_FILTER_HLISTS; i++) {
+		head = &lif->rx_filters.by_id[i];
+		hlist_for_each_entry_safe(f, tmp, head, by_id)
+			ionic_rx_filter_free(lif, f);
+	}
+	spin_unlock_bh(&lif->rx_filters.lock);
+}
+
+int ionic_rx_filter_save(struct ionic_lif *lif, u32 flow_id, u16 rxq_index,
+			 u32 hash, struct ionic_admin_ctx *ctx,
+			 enum ionic_filter_state state)
+{
+	struct device *dev = lif->ionic->dev;
+	struct ionic_rx_filter_add_cmd *ac;
+	struct ionic_rx_filter *f = NULL;
+	struct hlist_head *head;
+	unsigned int key;
+
+	ac = &ctx->cmd.rx_filter_add;
+
+	switch (le16_to_cpu(ac->match)) {
+	case IONIC_RX_FILTER_MATCH_VLAN:
+		key = le16_to_cpu(ac->vlan.vlan);
+		f = ionic_rx_filter_by_vlan(lif, le16_to_cpu(ac->vlan.vlan));
+		break;
+	case IONIC_RX_FILTER_MATCH_MAC:
+		key = *(u32 *)ac->mac.addr;
+		f = ionic_rx_filter_by_addr(lif, ac->mac.addr);
+		break;
+	case IONIC_RX_FILTER_MATCH_MAC_VLAN:
+		key = le16_to_cpu(ac->mac_vlan.vlan);
+		break;
+	case IONIC_RX_FILTER_STEER_PKTCLASS:
+		key = 0;
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	if (f) {
+		/* remove from current linking so we can refresh it */
+		hlist_del(&f->by_id);
+		hlist_del(&f->by_hash);
+	} else {
+		f = devm_kzalloc(dev, sizeof(*f), GFP_ATOMIC);
+		if (!f)
+			return -ENOMEM;
+	}
+
+	f->flow_id = flow_id;
+	f->filter_id = le32_to_cpu(ctx->comp.rx_filter_add.filter_id);
+	f->state = state;
+	f->rxq_index = rxq_index;
+	memcpy(&f->cmd, ac, sizeof(f->cmd));
+	netdev_dbg(lif->netdev, "rx_filter add filter_id %d\n", f->filter_id);
+
+	INIT_HLIST_NODE(&f->by_hash);
+	INIT_HLIST_NODE(&f->by_id);
+
+	key = hash_32(key, IONIC_RX_FILTER_HASH_BITS);
+	head = &lif->rx_filters.by_hash[key];
+	hlist_add_head(&f->by_hash, head);
+
+	key = f->filter_id & IONIC_RX_FILTER_HLISTS_MASK;
+	head = &lif->rx_filters.by_id[key];
+	hlist_add_head(&f->by_id, head);
+
+	return 0;
+}
+
+struct ionic_rx_filter *ionic_rx_filter_by_vlan(struct ionic_lif *lif, u16 vid)
+{
+	struct ionic_rx_filter *f;
+	struct hlist_head *head;
+	unsigned int key;
+
+	key = hash_32(vid, IONIC_RX_FILTER_HASH_BITS);
+	head = &lif->rx_filters.by_hash[key];
+
+	hlist_for_each_entry(f, head, by_hash) {
+		if (le16_to_cpu(f->cmd.match) != IONIC_RX_FILTER_MATCH_VLAN)
+			continue;
+		if (le16_to_cpu(f->cmd.vlan.vlan) == vid)
+			return f;
+	}
+
+	return NULL;
+}
+
+struct ionic_rx_filter *ionic_rx_filter_by_addr(struct ionic_lif *lif,
+						const u8 *addr)
+{
+	struct ionic_rx_filter *f;
+	struct hlist_head *head;
+	unsigned int key;
+
+	key = hash_32(*(u32 *)addr, IONIC_RX_FILTER_HASH_BITS);
+	head = &lif->rx_filters.by_hash[key];
+
+	hlist_for_each_entry(f, head, by_hash) {
+		if (le16_to_cpu(f->cmd.match) != IONIC_RX_FILTER_MATCH_MAC)
+			continue;
+		if (memcmp(addr, f->cmd.mac.addr, ETH_ALEN) == 0)
+			return f;
+	}
+
+	return NULL;
+}
+
+struct ionic_rx_filter *ionic_rx_filter_rxsteer(struct ionic_lif *lif)
+{
+	struct ionic_rx_filter *f;
+	struct hlist_head *head;
+	unsigned int key;
+
+	key = hash_32(0, IONIC_RX_FILTER_HASH_BITS);
+	head = &lif->rx_filters.by_hash[key];
+
+	hlist_for_each_entry(f, head, by_hash) {
+		if (le16_to_cpu(f->cmd.match) != IONIC_RX_FILTER_STEER_PKTCLASS)
+			continue;
+		return f;
+	}
+
+	return NULL;
+}
+
+static struct ionic_rx_filter *ionic_rx_filter_find(struct ionic_lif *lif,
+						    struct ionic_rx_filter_add_cmd *ac)
+{
+	switch (le16_to_cpu(ac->match)) {
+	case IONIC_RX_FILTER_MATCH_VLAN:
+		return ionic_rx_filter_by_vlan(lif, le16_to_cpu(ac->vlan.vlan));
+	case IONIC_RX_FILTER_MATCH_MAC:
+		return ionic_rx_filter_by_addr(lif, ac->mac.addr);
+	default:
+		netdev_err(lif->netdev, "unsupported filter match %d",
+			   le16_to_cpu(ac->match));
+		return NULL;
+	}
+}
+
+int ionic_lif_list_addr(struct ionic_lif *lif, const u8 *addr, bool mode)
+{
+	struct ionic_rx_filter *f;
+	int err;
+
+	spin_lock_bh(&lif->rx_filters.lock);
+
+	f = ionic_rx_filter_by_addr(lif, addr);
+	if (mode == ADD_ADDR && !f) {
+		struct ionic_admin_ctx ctx = {
+			.work = COMPLETION_INITIALIZER_ONSTACK(ctx.work),
+			.cmd.rx_filter_add = {
+				.opcode = IONIC_CMD_RX_FILTER_ADD,
+				.lif_index = cpu_to_le16(lif->index),
+				.match = cpu_to_le16(IONIC_RX_FILTER_MATCH_MAC),
+			},
+		};
+
+		memcpy(ctx.cmd.rx_filter_add.mac.addr, addr, ETH_ALEN);
+		err = ionic_rx_filter_save(lif, 0, IONIC_RXQ_INDEX_ANY, 0, &ctx,
+					   IONIC_FILTER_STATE_NEW);
+		if (err) {
+			spin_unlock_bh(&lif->rx_filters.lock);
+			return err;
+		}
+
+	} else if (mode == ADD_ADDR && f) {
+		if (f->state == IONIC_FILTER_STATE_OLD)
+			f->state = IONIC_FILTER_STATE_SYNCED;
+
+	} else if (mode == DEL_ADDR && f) {
+		if (f->state == IONIC_FILTER_STATE_NEW)
+			ionic_rx_filter_free(lif, f);
+		else if (f->state == IONIC_FILTER_STATE_SYNCED)
+			f->state = IONIC_FILTER_STATE_OLD;
+	} else if (mode == DEL_ADDR && !f) {
+		spin_unlock_bh(&lif->rx_filters.lock);
+		return -ENOENT;
+	}
+
+	spin_unlock_bh(&lif->rx_filters.lock);
+
+	set_bit(IONIC_LIF_F_FILTER_SYNC_NEEDED, lif->state);
+
+	return 0;
+}
+
+static int ionic_lif_filter_add(struct ionic_lif *lif,
+				struct ionic_rx_filter_add_cmd *ac)
+{
+	struct ionic_admin_ctx ctx = {
+		.work = COMPLETION_INITIALIZER_ONSTACK(ctx.work),
+	};
+	struct ionic_rx_filter *f;
+	int nfilters;
+	int err = 0;
+
+	ctx.cmd.rx_filter_add = *ac;
+	ctx.cmd.rx_filter_add.opcode = IONIC_CMD_RX_FILTER_ADD,
+	ctx.cmd.rx_filter_add.lif_index = cpu_to_le16(lif->index),
+
+	spin_lock_bh(&lif->rx_filters.lock);
+	f = ionic_rx_filter_find(lif, &ctx.cmd.rx_filter_add);
+	if (f) {
+		/* don't bother if we already have it and it is sync'd */
+		if (f->state == IONIC_FILTER_STATE_SYNCED) {
+			spin_unlock_bh(&lif->rx_filters.lock);
+			return 0;
+		}
+
+		/* mark preemptively as sync'd to block any parallel attempts */
+		f->state = IONIC_FILTER_STATE_SYNCED;
+	} else {
+		/* save as SYNCED to catch any DEL requests while processing */
+		err = ionic_rx_filter_save(lif, 0, IONIC_RXQ_INDEX_ANY, 0, &ctx,
+					   IONIC_FILTER_STATE_SYNCED);
+	}
+	spin_unlock_bh(&lif->rx_filters.lock);
+	if (err)
+		return err;
+
+	/* Don't bother with the write to FW if we know there's no room,
+	 * we can try again on the next sync attempt.
+	 * Since the FW doesn't have a way to tell us the vlan limit,
+	 * we start max_vlans at 0 until we hit the ENOSPC error.
+	 */
+	switch (le16_to_cpu(ctx.cmd.rx_filter_add.match)) {
+	case IONIC_RX_FILTER_MATCH_VLAN:
+		netdev_dbg(lif->netdev, "%s: rx_filter add VLAN %d\n",
+			   __func__, ctx.cmd.rx_filter_add.vlan.vlan);
+		if (lif->max_vlans && lif->nvlans >= lif->max_vlans)
+			err = -ENOSPC;
+		break;
+	case IONIC_RX_FILTER_MATCH_MAC:
+		netdev_dbg(lif->netdev, "%s: rx_filter add ADDR %pM\n",
+			   __func__, ctx.cmd.rx_filter_add.mac.addr);
+		nfilters = le32_to_cpu(lif->identity->eth.max_ucast_filters);
+		if ((lif->nucast + lif->nmcast) >= nfilters)
+			err = -ENOSPC;
+		break;
+	}
+
+	if (err != -ENOSPC)
+		err = ionic_adminq_post_wait_nomsg(lif, &ctx);
+
+	spin_lock_bh(&lif->rx_filters.lock);
+
+	if (err && err != -EEXIST) {
+		/* set the state back to NEW so we can try again later */
+		f = ionic_rx_filter_find(lif, &ctx.cmd.rx_filter_add);
+		if (f && f->state == IONIC_FILTER_STATE_SYNCED) {
+			f->state = IONIC_FILTER_STATE_NEW;
+
+			/* If -ENOSPC we won't waste time trying to sync again
+			 * until there is a delete that might make room
+			 */
+			if (err != -ENOSPC)
+				set_bit(IONIC_LIF_F_FILTER_SYNC_NEEDED, lif->state);
+		}
+
+		spin_unlock_bh(&lif->rx_filters.lock);
+
+		/* store the max_vlans limit that we found */
+		if (err == -ENOSPC &&
+		    le16_to_cpu(ctx.cmd.rx_filter_add.match) == IONIC_RX_FILTER_MATCH_VLAN)
+			lif->max_vlans = lif->nvlans;
+
+		/* Prevent unnecessary error messages on recoverable
+		 * errors as the filter will get retried on the next
+		 * sync attempt.
+		 */
+		switch (err) {
+		case -ENOSPC:
+		case -ENXIO:
+		case -ETIMEDOUT:
+		case -EAGAIN:
+		case -EBUSY:
+			return 0;
+		default:
+			break;
+		}
+
+		ionic_adminq_netdev_err_print(lif, ctx.cmd.cmd.opcode,
+					      ctx.comp.comp.status, err);
+		switch (le16_to_cpu(ctx.cmd.rx_filter_add.match)) {
+		case IONIC_RX_FILTER_MATCH_VLAN:
+			netdev_info(lif->netdev, "rx_filter add failed: VLAN %d\n",
+				    ctx.cmd.rx_filter_add.vlan.vlan);
+			break;
+		case IONIC_RX_FILTER_MATCH_MAC:
+			netdev_info(lif->netdev, "rx_filter add failed: ADDR %pM\n",
+				    ctx.cmd.rx_filter_add.mac.addr);
+			break;
+		}
+
+		return err;
+	}
+
+	switch (le16_to_cpu(ctx.cmd.rx_filter_add.match)) {
+	case IONIC_RX_FILTER_MATCH_VLAN:
+		lif->nvlans++;
+		break;
+	case IONIC_RX_FILTER_MATCH_MAC:
+		if (is_multicast_ether_addr(ctx.cmd.rx_filter_add.mac.addr))
+			lif->nmcast++;
+		else
+			lif->nucast++;
+		break;
+	}
+
+	f = ionic_rx_filter_find(lif, &ctx.cmd.rx_filter_add);
+	if (f && f->state == IONIC_FILTER_STATE_OLD) {
+		/* Someone requested a delete while we were adding
+		 * so update the filter info with the results from the add
+		 * and the data will be there for the delete on the next
+		 * sync cycle.
+		 */
+		err = ionic_rx_filter_save(lif, 0, IONIC_RXQ_INDEX_ANY, 0, &ctx,
+					   IONIC_FILTER_STATE_OLD);
+	} else {
+		err = ionic_rx_filter_save(lif, 0, IONIC_RXQ_INDEX_ANY, 0, &ctx,
+					   IONIC_FILTER_STATE_SYNCED);
+	}
+
+	spin_unlock_bh(&lif->rx_filters.lock);
+
+	return err;
+}
+
+int ionic_lif_addr_add(struct ionic_lif *lif, const u8 *addr)
+{
+	struct ionic_rx_filter_add_cmd ac = {
+		.match = cpu_to_le16(IONIC_RX_FILTER_MATCH_MAC),
+	};
+
+	memcpy(&ac.mac.addr, addr, ETH_ALEN);
+
+	return ionic_lif_filter_add(lif, &ac);
+}
+
+int ionic_lif_vlan_add(struct ionic_lif *lif, const u16 vid)
+{
+	struct ionic_rx_filter_add_cmd ac = {
+		.match = cpu_to_le16(IONIC_RX_FILTER_MATCH_VLAN),
+		.vlan.vlan = cpu_to_le16(vid),
+	};
+
+	return ionic_lif_filter_add(lif, &ac);
+}
+
+static int ionic_lif_filter_del(struct ionic_lif *lif,
+				struct ionic_rx_filter_add_cmd *ac)
+{
+	struct ionic_admin_ctx ctx = {
+		.work = COMPLETION_INITIALIZER_ONSTACK(ctx.work),
+		.cmd.rx_filter_del = {
+			.opcode = IONIC_CMD_RX_FILTER_DEL,
+			.lif_index = cpu_to_le16(lif->index),
+		},
+	};
+	struct ionic_rx_filter *f;
+	int state;
+	int err;
+
+	spin_lock_bh(&lif->rx_filters.lock);
+	f = ionic_rx_filter_find(lif, ac);
+	if (!f) {
+		spin_unlock_bh(&lif->rx_filters.lock);
+		return -ENOENT;
+	}
+
+	switch (le16_to_cpu(ac->match)) {
+	case IONIC_RX_FILTER_MATCH_VLAN:
+		netdev_dbg(lif->netdev, "%s: rx_filter del VLAN %d id %d\n",
+			   __func__, ac->vlan.vlan, f->filter_id);
+		lif->nvlans--;
+		break;
+	case IONIC_RX_FILTER_MATCH_MAC:
+		netdev_dbg(lif->netdev, "%s: rx_filter del ADDR %pM id %d\n",
+			   __func__, ac->mac.addr, f->filter_id);
+		if (is_multicast_ether_addr(ac->mac.addr) && lif->nmcast)
+			lif->nmcast--;
+		else if (!is_multicast_ether_addr(ac->mac.addr) && lif->nucast)
+			lif->nucast--;
+		break;
+	}
+
+	state = f->state;
+	ctx.cmd.rx_filter_del.filter_id = cpu_to_le32(f->filter_id);
+	ionic_rx_filter_free(lif, f);
+
+	spin_unlock_bh(&lif->rx_filters.lock);
+
+	if (state != IONIC_FILTER_STATE_NEW) {
+		err = ionic_adminq_post_wait_nomsg(lif, &ctx);
+
+		switch (err) {
+			/* ignore these errors */
+		case -EEXIST:
+		case -ENXIO:
+		case -ETIMEDOUT:
+		case -EAGAIN:
+		case -EBUSY:
+		case 0:
+			break;
+		default:
+			ionic_adminq_netdev_err_print(lif, ctx.cmd.cmd.opcode,
+						      ctx.comp.comp.status, err);
+			return err;
+		}
+	}
+
+	return 0;
+}
+
+int ionic_lif_addr_del(struct ionic_lif *lif, const u8 *addr)
+{
+	struct ionic_rx_filter_add_cmd ac = {
+		.match = cpu_to_le16(IONIC_RX_FILTER_MATCH_MAC),
+	};
+
+	memcpy(&ac.mac.addr, addr, ETH_ALEN);
+
+	return ionic_lif_filter_del(lif, &ac);
+}
+
+int ionic_lif_vlan_del(struct ionic_lif *lif, const u16 vid)
+{
+	struct ionic_rx_filter_add_cmd ac = {
+		.match = cpu_to_le16(IONIC_RX_FILTER_MATCH_VLAN),
+		.vlan.vlan = cpu_to_le16(vid),
+	};
+
+	return ionic_lif_filter_del(lif, &ac);
+}
+
+struct sync_item {
+	struct list_head list;
+	struct ionic_rx_filter f;
+};
+
+void ionic_rx_filter_sync(struct ionic_lif *lif)
+{
+	struct device *dev = lif->ionic->dev;
+	struct list_head sync_add_list;
+	struct list_head sync_del_list;
+	struct sync_item *sync_item;
+	struct ionic_rx_filter *f;
+	struct hlist_head *head;
+	struct hlist_node *tmp;
+	struct sync_item *spos;
+	unsigned int i;
+
+	INIT_LIST_HEAD(&sync_add_list);
+	INIT_LIST_HEAD(&sync_del_list);
+
+	clear_bit(IONIC_LIF_F_FILTER_SYNC_NEEDED, lif->state);
+
+	/* Copy the filters to be added and deleted
+	 * into a separate local list that needs no locking.
+	 */
+	spin_lock_bh(&lif->rx_filters.lock);
+	for (i = 0; i < IONIC_RX_FILTER_HLISTS; i++) {
+		head = &lif->rx_filters.by_id[i];
+		hlist_for_each_entry_safe(f, tmp, head, by_id) {
+			if (f->state == IONIC_FILTER_STATE_NEW ||
+			    f->state == IONIC_FILTER_STATE_OLD) {
+				sync_item = devm_kzalloc(dev, sizeof(*sync_item),
+							 GFP_ATOMIC);
+				if (!sync_item)
+					goto loop_out;
+
+				sync_item->f = *f;
+
+				if (f->state == IONIC_FILTER_STATE_NEW)
+					list_add(&sync_item->list, &sync_add_list);
+				else
+					list_add(&sync_item->list, &sync_del_list);
+			}
+		}
+	}
+loop_out:
+	spin_unlock_bh(&lif->rx_filters.lock);
+
+	/* If the add or delete fails, it won't get marked as sync'd
+	 * and will be tried again in the next sync action.
+	 * Do the deletes first in case we're in an overflow state and
+	 * they can clear room for some new filters
+	 */
+	list_for_each_entry_safe(sync_item, spos, &sync_del_list, list) {
+		(void)ionic_lif_filter_del(lif, &sync_item->f.cmd);
+
+		list_del(&sync_item->list);
+		devm_kfree(dev, sync_item);
+	}
+
+	list_for_each_entry_safe(sync_item, spos, &sync_add_list, list) {
+		(void)ionic_lif_filter_add(lif, &sync_item->f.cmd);
+
+		list_del(&sync_item->list);
+		devm_kfree(dev, sync_item);
+	}
+}
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_rx_filter.h b/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_rx_filter.h
new file mode 100644
index 000000000..b089fbedb
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_rx_filter.h
@@ -0,0 +1,50 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/* Copyright(c) 2017 - 2022 Pensando Systems, Inc */
+
+#ifndef _IONIC_RX_FILTER_H_
+#define _IONIC_RX_FILTER_H_
+
+#define IONIC_RXQ_INDEX_ANY		(0xFFFF)
+
+enum ionic_filter_state {
+	IONIC_FILTER_STATE_SYNCED,
+	IONIC_FILTER_STATE_NEW,
+	IONIC_FILTER_STATE_OLD,
+};
+
+struct ionic_rx_filter {
+	u32 flow_id;
+	u32 filter_id;
+	u16 rxq_index;
+	enum ionic_filter_state state;
+	struct ionic_rx_filter_add_cmd cmd;
+	struct hlist_node by_hash;
+	struct hlist_node by_id;
+};
+
+#define IONIC_RX_FILTER_HASH_BITS	10
+#define IONIC_RX_FILTER_HLISTS		BIT(IONIC_RX_FILTER_HASH_BITS)
+#define IONIC_RX_FILTER_HLISTS_MASK	(IONIC_RX_FILTER_HLISTS - 1)
+struct ionic_rx_filters {
+	spinlock_t lock;				    /* filter list lock */
+	struct hlist_head by_hash[IONIC_RX_FILTER_HLISTS];  /* by skb hash */
+	struct hlist_head by_id[IONIC_RX_FILTER_HLISTS];    /* by filter_id */
+};
+
+void ionic_rx_filter_free(struct ionic_lif *lif, struct ionic_rx_filter *f);
+void ionic_rx_filter_replay(struct ionic_lif *lif);
+int ionic_rx_filters_init(struct ionic_lif *lif);
+void ionic_rx_filters_deinit(struct ionic_lif *lif);
+int ionic_rx_filter_save(struct ionic_lif *lif, u32 flow_id, u16 rxq_index,
+			 u32 hash, struct ionic_admin_ctx *ctx,
+			 enum ionic_filter_state state);
+struct ionic_rx_filter *ionic_rx_filter_by_vlan(struct ionic_lif *lif, u16 vid);
+struct ionic_rx_filter *ionic_rx_filter_by_addr(struct ionic_lif *lif, const u8 *addr);
+struct ionic_rx_filter *ionic_rx_filter_rxsteer(struct ionic_lif *lif);
+void ionic_rx_filter_sync(struct ionic_lif *lif);
+int ionic_lif_list_addr(struct ionic_lif *lif, const u8 *addr, bool mode);
+int ionic_rx_filters_need_sync(struct ionic_lif *lif);
+int ionic_lif_vlan_add(struct ionic_lif *lif, const u16 vid);
+int ionic_lif_vlan_del(struct ionic_lif *lif, const u16 vid);
+
+#endif /* _IONIC_RX_FILTER_H_ */
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_stats.c b/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_stats.c
new file mode 100644
index 000000000..705397f21
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_stats.c
@@ -0,0 +1,573 @@
+// SPDX-License-Identifier: GPL-2.0
+/* Copyright(c) 2017 - 2022 Pensando Systems, Inc */
+
+#include <linux/kernel.h>
+#include <linux/mutex.h>
+#include "ionic.h"
+#include "ionic_lif.h"
+#include "ionic_stats.h"
+
+static const struct ionic_stat_desc ionic_lif_stats_desc[] = {
+	IONIC_LIF_STAT_DESC(tx_packets),
+	IONIC_LIF_STAT_DESC(tx_bytes),
+	IONIC_LIF_STAT_DESC(rx_packets),
+	IONIC_LIF_STAT_DESC(rx_bytes),
+	IONIC_LIF_STAT_DESC(tx_tso),
+	IONIC_LIF_STAT_DESC(tx_tso_bytes),
+	IONIC_LIF_STAT_DESC(tx_csum_none),
+	IONIC_LIF_STAT_DESC(tx_csum),
+	IONIC_LIF_STAT_DESC(rx_csum_none),
+	IONIC_LIF_STAT_DESC(rx_csum_complete),
+	IONIC_LIF_STAT_DESC(rx_csum_error),
+	IONIC_LIF_STAT_DESC(hw_tx_dropped),
+	IONIC_LIF_STAT_DESC(hw_rx_dropped),
+	IONIC_LIF_STAT_DESC(hw_rx_over_errors),
+	IONIC_LIF_STAT_DESC(hw_rx_missed_errors),
+	IONIC_LIF_STAT_DESC(hw_tx_aborted_errors),
+};
+
+static const struct ionic_stat_desc ionic_port_stats_desc[] = {
+	IONIC_PORT_STAT_DESC(frames_rx_ok),
+	IONIC_PORT_STAT_DESC(frames_rx_all),
+	IONIC_PORT_STAT_DESC(frames_rx_bad_fcs),
+	IONIC_PORT_STAT_DESC(frames_rx_bad_all),
+	IONIC_PORT_STAT_DESC(octets_rx_ok),
+	IONIC_PORT_STAT_DESC(octets_rx_all),
+	IONIC_PORT_STAT_DESC(frames_rx_unicast),
+	IONIC_PORT_STAT_DESC(frames_rx_multicast),
+	IONIC_PORT_STAT_DESC(frames_rx_broadcast),
+	IONIC_PORT_STAT_DESC(frames_rx_pause),
+	IONIC_PORT_STAT_DESC(frames_rx_bad_length),
+	IONIC_PORT_STAT_DESC(frames_rx_undersized),
+	IONIC_PORT_STAT_DESC(frames_rx_oversized),
+	IONIC_PORT_STAT_DESC(frames_rx_fragments),
+	IONIC_PORT_STAT_DESC(frames_rx_jabber),
+	IONIC_PORT_STAT_DESC(frames_rx_pripause),
+	IONIC_PORT_STAT_DESC(frames_rx_stomped_crc),
+	IONIC_PORT_STAT_DESC(frames_rx_too_long),
+	IONIC_PORT_STAT_DESC(frames_rx_vlan_good),
+	IONIC_PORT_STAT_DESC(frames_rx_dropped),
+	IONIC_PORT_STAT_DESC(frames_rx_less_than_64b),
+	IONIC_PORT_STAT_DESC(frames_rx_64b),
+	IONIC_PORT_STAT_DESC(frames_rx_65b_127b),
+	IONIC_PORT_STAT_DESC(frames_rx_128b_255b),
+	IONIC_PORT_STAT_DESC(frames_rx_256b_511b),
+	IONIC_PORT_STAT_DESC(frames_rx_512b_1023b),
+	IONIC_PORT_STAT_DESC(frames_rx_1024b_1518b),
+	IONIC_PORT_STAT_DESC(frames_rx_1519b_2047b),
+	IONIC_PORT_STAT_DESC(frames_rx_2048b_4095b),
+	IONIC_PORT_STAT_DESC(frames_rx_4096b_8191b),
+	IONIC_PORT_STAT_DESC(frames_rx_8192b_9215b),
+	IONIC_PORT_STAT_DESC(frames_rx_other),
+	IONIC_PORT_STAT_DESC(frames_tx_ok),
+	IONIC_PORT_STAT_DESC(frames_tx_all),
+	IONIC_PORT_STAT_DESC(frames_tx_bad),
+	IONIC_PORT_STAT_DESC(octets_tx_ok),
+	IONIC_PORT_STAT_DESC(octets_tx_total),
+	IONIC_PORT_STAT_DESC(frames_tx_unicast),
+	IONIC_PORT_STAT_DESC(frames_tx_multicast),
+	IONIC_PORT_STAT_DESC(frames_tx_broadcast),
+	IONIC_PORT_STAT_DESC(frames_tx_pause),
+	IONIC_PORT_STAT_DESC(frames_tx_pripause),
+	IONIC_PORT_STAT_DESC(frames_tx_vlan),
+	IONIC_PORT_STAT_DESC(frames_tx_less_than_64b),
+	IONIC_PORT_STAT_DESC(frames_tx_64b),
+	IONIC_PORT_STAT_DESC(frames_tx_65b_127b),
+	IONIC_PORT_STAT_DESC(frames_tx_128b_255b),
+	IONIC_PORT_STAT_DESC(frames_tx_256b_511b),
+	IONIC_PORT_STAT_DESC(frames_tx_512b_1023b),
+	IONIC_PORT_STAT_DESC(frames_tx_1024b_1518b),
+	IONIC_PORT_STAT_DESC(frames_tx_1519b_2047b),
+	IONIC_PORT_STAT_DESC(frames_tx_2048b_4095b),
+	IONIC_PORT_STAT_DESC(frames_tx_4096b_8191b),
+	IONIC_PORT_STAT_DESC(frames_tx_8192b_9215b),
+	IONIC_PORT_STAT_DESC(frames_tx_other),
+	IONIC_PORT_STAT_DESC(frames_tx_pri_0),
+	IONIC_PORT_STAT_DESC(frames_tx_pri_1),
+	IONIC_PORT_STAT_DESC(frames_tx_pri_2),
+	IONIC_PORT_STAT_DESC(frames_tx_pri_3),
+	IONIC_PORT_STAT_DESC(frames_tx_pri_4),
+	IONIC_PORT_STAT_DESC(frames_tx_pri_5),
+	IONIC_PORT_STAT_DESC(frames_tx_pri_6),
+	IONIC_PORT_STAT_DESC(frames_tx_pri_7),
+	IONIC_PORT_STAT_DESC(frames_rx_pri_0),
+	IONIC_PORT_STAT_DESC(frames_rx_pri_1),
+	IONIC_PORT_STAT_DESC(frames_rx_pri_2),
+	IONIC_PORT_STAT_DESC(frames_rx_pri_3),
+	IONIC_PORT_STAT_DESC(frames_rx_pri_4),
+	IONIC_PORT_STAT_DESC(frames_rx_pri_5),
+	IONIC_PORT_STAT_DESC(frames_rx_pri_6),
+	IONIC_PORT_STAT_DESC(frames_rx_pri_7),
+	IONIC_PORT_STAT_DESC(tx_pripause_0_1us_count),
+	IONIC_PORT_STAT_DESC(tx_pripause_1_1us_count),
+	IONIC_PORT_STAT_DESC(tx_pripause_2_1us_count),
+	IONIC_PORT_STAT_DESC(tx_pripause_3_1us_count),
+	IONIC_PORT_STAT_DESC(tx_pripause_4_1us_count),
+	IONIC_PORT_STAT_DESC(tx_pripause_5_1us_count),
+	IONIC_PORT_STAT_DESC(tx_pripause_6_1us_count),
+	IONIC_PORT_STAT_DESC(tx_pripause_7_1us_count),
+	IONIC_PORT_STAT_DESC(rx_pripause_0_1us_count),
+	IONIC_PORT_STAT_DESC(rx_pripause_1_1us_count),
+	IONIC_PORT_STAT_DESC(rx_pripause_2_1us_count),
+	IONIC_PORT_STAT_DESC(rx_pripause_3_1us_count),
+	IONIC_PORT_STAT_DESC(rx_pripause_4_1us_count),
+	IONIC_PORT_STAT_DESC(rx_pripause_5_1us_count),
+	IONIC_PORT_STAT_DESC(rx_pripause_6_1us_count),
+	IONIC_PORT_STAT_DESC(rx_pripause_7_1us_count),
+	IONIC_PORT_STAT_DESC(rx_pause_1us_count),
+	IONIC_PORT_STAT_DESC(frames_tx_truncated),
+};
+
+static const struct ionic_stat_desc ionic_mgmt_port_stats_desc[] = {
+	IONIC_MGMT_PORT_STAT_DESC(frames_rx_ok),
+	IONIC_MGMT_PORT_STAT_DESC(frames_rx_all),
+	IONIC_MGMT_PORT_STAT_DESC(frames_rx_bad_fcs),
+	IONIC_MGMT_PORT_STAT_DESC(frames_rx_bad_all),
+	IONIC_MGMT_PORT_STAT_DESC(octets_rx_ok),
+	IONIC_MGMT_PORT_STAT_DESC(octets_rx_all),
+	IONIC_MGMT_PORT_STAT_DESC(frames_rx_unicast),
+	IONIC_MGMT_PORT_STAT_DESC(frames_rx_multicast),
+	IONIC_MGMT_PORT_STAT_DESC(frames_rx_broadcast),
+	IONIC_MGMT_PORT_STAT_DESC(frames_rx_pause),
+	IONIC_MGMT_PORT_STAT_DESC(frames_rx_bad_length),
+	IONIC_MGMT_PORT_STAT_DESC(frames_rx_undersized),
+	IONIC_MGMT_PORT_STAT_DESC(frames_rx_oversized),
+	IONIC_MGMT_PORT_STAT_DESC(frames_rx_fragments),
+	IONIC_MGMT_PORT_STAT_DESC(frames_rx_jabber),
+	IONIC_MGMT_PORT_STAT_DESC(frames_rx_64b),
+	IONIC_MGMT_PORT_STAT_DESC(frames_rx_65b_127b),
+	IONIC_MGMT_PORT_STAT_DESC(frames_rx_128b_255b),
+	IONIC_MGMT_PORT_STAT_DESC(frames_rx_256b_511b),
+	IONIC_MGMT_PORT_STAT_DESC(frames_rx_512b_1023b),
+	IONIC_MGMT_PORT_STAT_DESC(frames_rx_1024b_1518b),
+	IONIC_MGMT_PORT_STAT_DESC(frames_rx_gt_1518b),
+	IONIC_MGMT_PORT_STAT_DESC(frames_rx_fifo_full),
+	IONIC_MGMT_PORT_STAT_DESC(frames_tx_ok),
+	IONIC_MGMT_PORT_STAT_DESC(frames_tx_all),
+	IONIC_MGMT_PORT_STAT_DESC(frames_tx_bad),
+	IONIC_MGMT_PORT_STAT_DESC(octets_tx_ok),
+	IONIC_MGMT_PORT_STAT_DESC(octets_tx_total),
+	IONIC_MGMT_PORT_STAT_DESC(frames_tx_unicast),
+	IONIC_MGMT_PORT_STAT_DESC(frames_tx_multicast),
+	IONIC_MGMT_PORT_STAT_DESC(frames_tx_broadcast),
+	IONIC_MGMT_PORT_STAT_DESC(frames_tx_pause),
+};
+
+static const struct ionic_stat_desc ionic_tx_stats_desc[] = {
+	IONIC_TX_STAT_DESC(pkts),
+	IONIC_TX_STAT_DESC(bytes),
+	IONIC_TX_STAT_DESC(clean),
+	IONIC_TX_STAT_DESC(dma_map_err),
+	IONIC_TX_STAT_DESC(linearize),
+	IONIC_TX_STAT_DESC(tso),
+	IONIC_TX_STAT_DESC(tso_bytes),
+	IONIC_TX_STAT_DESC(hwstamp_valid),
+	IONIC_TX_STAT_DESC(hwstamp_invalid),
+#ifdef IONIC_DEBUG_STATS
+	IONIC_TX_STAT_DESC(vlan_inserted),
+	IONIC_TX_STAT_DESC(frags),
+	IONIC_TX_STAT_DESC(csum),
+	IONIC_TX_STAT_DESC(csum_none),
+#endif
+};
+
+static const struct ionic_stat_desc ionic_rx_stats_desc[] = {
+	IONIC_RX_STAT_DESC(pkts),
+	IONIC_RX_STAT_DESC(bytes),
+	IONIC_RX_STAT_DESC(dma_map_err),
+	IONIC_RX_STAT_DESC(alloc_err),
+#ifdef IONIC_DEBUG_STATS
+	IONIC_RX_STAT_DESC(vlan_stripped),
+	IONIC_RX_STAT_DESC(csum_none),
+	IONIC_RX_STAT_DESC(csum_complete),
+#endif
+	IONIC_RX_STAT_DESC(csum_error),
+	IONIC_RX_STAT_DESC(hwstamp_valid),
+	IONIC_RX_STAT_DESC(hwstamp_invalid),
+	IONIC_RX_STAT_DESC(dropped),
+	IONIC_RX_STAT_DESC(cache_full),
+	IONIC_RX_STAT_DESC(cache_empty),
+	IONIC_RX_STAT_DESC(cache_busy),
+	IONIC_RX_STAT_DESC(cache_get),
+	IONIC_RX_STAT_DESC(cache_put),
+	IONIC_RX_STAT_DESC(buf_exhausted),
+	IONIC_RX_STAT_DESC(buf_not_reusable),
+	IONIC_RX_STAT_DESC(buf_reused),
+};
+
+#ifdef IONIC_DEBUG_STATS
+static const struct ionic_stat_desc ionic_txq_stats_desc[] = {
+	IONIC_TX_Q_STAT_DESC(stop),
+	IONIC_TX_Q_STAT_DESC(wake),
+	IONIC_TX_Q_STAT_DESC(drop),
+	IONIC_TX_Q_STAT_DESC(dbell_count),
+	IONIC_TX_Q_STAT_DESC(depth),
+	IONIC_TX_Q_STAT_DESC(depth_max)
+};
+#endif
+
+#ifdef IONIC_DEBUG_STATS
+static const struct ionic_stat_desc ionic_dbg_cq_stats_desc[] = {
+	IONIC_CQ_STAT_DESC(compl_count),
+};
+#define IONIC_NUM_DBG_CQ_STATS ARRAY_SIZE(ionic_dbg_cq_stats_desc)
+
+static const struct ionic_stat_desc ionic_dbg_intr_stats_desc[] = {
+	IONIC_INTR_STAT_DESC(rearm_count),
+};
+#define IONIC_NUM_DBG_INTR_STATS ARRAY_SIZE(ionic_dbg_intr_stats_desc)
+
+static const struct ionic_stat_desc ionic_dbg_napi_stats_desc[] = {
+	IONIC_NAPI_STAT_DESC(poll_count),
+};
+#define IONIC_NUM_DBG_NAPI_STATS ARRAY_SIZE(ionic_dbg_napi_stats_desc)
+
+#define IONIC_NUM_TX_Q_STATS ARRAY_SIZE(ionic_txq_stats_desc)
+#endif
+
+#define IONIC_NUM_LIF_STATS ARRAY_SIZE(ionic_lif_stats_desc)
+#define IONIC_NUM_PORT_STATS ARRAY_SIZE(ionic_port_stats_desc)
+#define IONIC_NUM_MGMT_PORT_STATS ARRAY_SIZE(ionic_mgmt_port_stats_desc)
+#define IONIC_NUM_TX_STATS ARRAY_SIZE(ionic_tx_stats_desc)
+#define IONIC_NUM_RX_STATS ARRAY_SIZE(ionic_rx_stats_desc)
+
+#define MAX_Q(lif)   ((lif)->netdev->real_num_tx_queues)
+
+static void ionic_add_lif_txq_stats(struct ionic_lif *lif, int q_num,
+				    struct ionic_lif_sw_stats *stats)
+{
+	struct ionic_tx_stats *txstats = &lif->txqstats[q_num];
+
+	stats->tx_packets += txstats->pkts;
+	stats->tx_bytes += txstats->bytes;
+	stats->tx_tso += txstats->tso;
+	stats->tx_tso_bytes += txstats->tso_bytes;
+	stats->tx_csum_none += txstats->csum_none;
+	stats->tx_csum += txstats->csum;
+	stats->tx_hwstamp_valid += txstats->hwstamp_valid;
+	stats->tx_hwstamp_invalid += txstats->hwstamp_invalid;
+}
+
+static void ionic_add_lif_rxq_stats(struct ionic_lif *lif, int q_num,
+				    struct ionic_lif_sw_stats *stats)
+{
+	struct ionic_rx_stats *rxstats = &lif->rxqstats[q_num];
+
+	stats->rx_packets += rxstats->pkts;
+	stats->rx_bytes += rxstats->bytes;
+	stats->rx_csum_none += rxstats->csum_none;
+	stats->rx_csum_complete += rxstats->csum_complete;
+	stats->rx_csum_error += rxstats->csum_error;
+	stats->rx_hwstamp_valid += rxstats->hwstamp_valid;
+	stats->rx_hwstamp_invalid += rxstats->hwstamp_invalid;
+}
+
+static void ionic_get_lif_stats(struct ionic_lif *lif,
+				struct ionic_lif_sw_stats *stats)
+{
+	struct rtnl_link_stats64 ns;
+	int q_num;
+
+	memset(stats, 0, sizeof(*stats));
+
+	for (q_num = 0; q_num < MAX_Q(lif); q_num++) {
+		ionic_add_lif_txq_stats(lif, q_num, stats);
+		ionic_add_lif_rxq_stats(lif, q_num, stats);
+	}
+
+	if (lif->hwstamp_txq)
+		ionic_add_lif_txq_stats(lif, lif->hwstamp_txq->q.index, stats);
+
+	if (lif->hwstamp_rxq)
+		ionic_add_lif_rxq_stats(lif, lif->hwstamp_rxq->q.index, stats);
+
+	ionic_get_stats64(lif->netdev, &ns);
+	stats->hw_tx_dropped = ns.tx_dropped;
+	stats->hw_rx_dropped = ns.rx_dropped;
+	stats->hw_rx_over_errors = ns.rx_over_errors;
+	stats->hw_rx_missed_errors = ns.rx_missed_errors;
+	stats->hw_tx_aborted_errors = ns.tx_aborted_errors;
+}
+
+static u64 ionic_sw_stats_get_count(struct ionic_lif *lif)
+{
+	u64 total = 0, tx_queues = MAX_Q(lif), rx_queues = MAX_Q(lif);
+
+	total += IONIC_NUM_LIF_STATS;
+
+	if (lif->ionic->is_mgmt_nic)
+		total += IONIC_NUM_MGMT_PORT_STATS;
+	else
+		total += IONIC_NUM_PORT_STATS;
+
+	if (lif->hwstamp_txq)
+		tx_queues += 1;
+
+	if (lif->hwstamp_rxq)
+		rx_queues += 1;
+
+	total += tx_queues * IONIC_NUM_TX_STATS;
+	total += rx_queues * IONIC_NUM_RX_STATS;
+
+#ifdef IONIC_DEBUG_STATS
+	if (test_bit(IONIC_LIF_F_UP, lif->state) &&
+	    test_bit(IONIC_LIF_F_SW_DEBUG_STATS, lif->state)) {
+		/* tx debug stats */
+		total += tx_queues * (IONIC_NUM_DBG_CQ_STATS +
+				      IONIC_NUM_TX_Q_STATS +
+				      IONIC_NUM_DBG_INTR_STATS +
+				      IONIC_NUM_DBG_NAPI_STATS +
+				      IONIC_MAX_NUM_NAPI_CNTR +
+				      IONIC_MAX_NUM_SG_CNTR);
+
+		/* rx debug stats */
+		total += rx_queues * (IONIC_NUM_DBG_CQ_STATS +
+				      IONIC_NUM_DBG_INTR_STATS +
+				      IONIC_NUM_DBG_NAPI_STATS +
+				      IONIC_MAX_NUM_NAPI_CNTR);
+	}
+#endif
+
+	return total;
+}
+
+static void ionic_sw_stats_get_tx_strings(struct ionic_lif *lif, u8 **buf,
+					  int q_num)
+{
+	int i;
+
+	for (i = 0; i < IONIC_NUM_TX_STATS; i++)
+		ethtool_sprintf(buf, "tx_%d_%s", q_num,
+				ionic_tx_stats_desc[i].name);
+
+#ifdef IONIC_DEBUG_STATS
+	if (!test_bit(IONIC_LIF_F_UP, lif->state) ||
+	    !test_bit(IONIC_LIF_F_SW_DEBUG_STATS, lif->state))
+		return;
+
+	for (i = 0; i < IONIC_NUM_TX_Q_STATS; i++)
+		ethtool_sprintf(buf, "txq_%d_%s", q_num,
+				ionic_txq_stats_desc[i].name);
+	for (i = 0; i < IONIC_NUM_DBG_CQ_STATS; i++)
+		ethtool_sprintf(buf, "txq_%d_cq_%s", q_num,
+				ionic_dbg_cq_stats_desc[i].name);
+	for (i = 0; i < IONIC_NUM_DBG_INTR_STATS; i++)
+		ethtool_sprintf(buf, "txq_%d_intr_%s", q_num,
+				ionic_dbg_intr_stats_desc[i].name);
+	for (i = 0; i < IONIC_NUM_DBG_NAPI_STATS; i++)
+		ethtool_sprintf(buf, "txq_%d_napi_%s", q_num,
+				ionic_dbg_napi_stats_desc[i].name);
+	for (i = 0; i < IONIC_MAX_NUM_NAPI_CNTR; i++)
+		ethtool_sprintf(buf, "txq_%d_napi_work_done_%d", q_num, i);
+	for (i = 0; i < IONIC_MAX_NUM_SG_CNTR; i++)
+		ethtool_sprintf(buf, "txq_%d_sg_cntr_%d", q_num, i);
+#endif
+}
+
+static void ionic_sw_stats_get_rx_strings(struct ionic_lif *lif, u8 **buf,
+					  int q_num)
+{
+	int i;
+
+	for (i = 0; i < IONIC_NUM_RX_STATS; i++)
+		ethtool_sprintf(buf, "rx_%d_%s", q_num,
+				ionic_rx_stats_desc[i].name);
+
+#ifdef IONIC_DEBUG_STATS
+	if (!test_bit(IONIC_LIF_F_UP, lif->state) ||
+	    !test_bit(IONIC_LIF_F_SW_DEBUG_STATS, lif->state))
+		return;
+
+	for (i = 0; i < IONIC_NUM_DBG_CQ_STATS; i++)
+		ethtool_sprintf(buf, "rxq_%d_cq_%s", q_num,
+				ionic_dbg_cq_stats_desc[i].name);
+	for (i = 0; i < IONIC_NUM_DBG_INTR_STATS; i++)
+		ethtool_sprintf(buf, "rxq_%d_intr_%s", q_num,
+				ionic_dbg_intr_stats_desc[i].name);
+	for (i = 0; i < IONIC_NUM_DBG_NAPI_STATS; i++)
+		ethtool_sprintf(buf, "rxq_%d_napi_%s", q_num,
+				ionic_dbg_napi_stats_desc[i].name);
+	for (i = 0; i < IONIC_MAX_NUM_NAPI_CNTR; i++)
+		ethtool_sprintf(buf, "rxq_%d_napi_work_done_%d", q_num, i);
+#endif
+}
+
+static void ionic_sw_stats_get_strings(struct ionic_lif *lif, u8 **buf)
+{
+	int i, q_num;
+
+	for (i = 0; i < IONIC_NUM_LIF_STATS; i++)
+		ethtool_sprintf(buf, ionic_lif_stats_desc[i].name);
+
+	if (lif->ionic->is_mgmt_nic) {
+		for (i = 0; i < IONIC_NUM_MGMT_PORT_STATS; i++)
+			ethtool_sprintf(buf, ionic_mgmt_port_stats_desc[i].name);
+	} else {
+		for (i = 0; i < IONIC_NUM_PORT_STATS; i++)
+			ethtool_sprintf(buf, ionic_port_stats_desc[i].name);
+	}
+
+	for (q_num = 0; q_num < MAX_Q(lif); q_num++)
+		ionic_sw_stats_get_tx_strings(lif, buf, q_num);
+
+	if (lif->hwstamp_txq)
+		ionic_sw_stats_get_tx_strings(lif, buf, lif->hwstamp_txq->q.index);
+
+	for (q_num = 0; q_num < MAX_Q(lif); q_num++)
+		ionic_sw_stats_get_rx_strings(lif, buf, q_num);
+
+	if (lif->hwstamp_rxq)
+		ionic_sw_stats_get_rx_strings(lif, buf, lif->hwstamp_rxq->q.index);
+}
+
+static void ionic_sw_stats_get_txq_values(struct ionic_lif *lif, u64 **buf,
+					  int q_num)
+{
+	struct ionic_tx_stats *txstats;
+#ifdef IONIC_DEBUG_STATS
+	struct ionic_qcq *txqcq;
+#endif
+	int i;
+
+	txstats = &lif->txqstats[q_num];
+
+	for (i = 0; i < IONIC_NUM_TX_STATS; i++) {
+		**buf = IONIC_READ_STAT64(txstats, &ionic_tx_stats_desc[i]);
+		(*buf)++;
+	}
+
+#ifdef IONIC_DEBUG_STATS
+	if (!test_bit(IONIC_LIF_F_UP, lif->state) ||
+	    !test_bit(IONIC_LIF_F_SW_DEBUG_STATS, lif->state))
+		return;
+
+	txqcq = lif->txqcqs[q_num];
+	for (i = 0; i < IONIC_NUM_TX_Q_STATS; i++) {
+		**buf = IONIC_READ_STAT64(&txqcq->q,
+					  &ionic_txq_stats_desc[i]);
+		(*buf)++;
+	}
+	for (i = 0; i < IONIC_NUM_DBG_CQ_STATS; i++) {
+		**buf = IONIC_READ_STAT64(&txqcq->cq,
+					  &ionic_dbg_cq_stats_desc[i]);
+		(*buf)++;
+	}
+	for (i = 0; i < IONIC_NUM_DBG_INTR_STATS; i++) {
+		**buf = IONIC_READ_STAT64(&txqcq->intr,
+					  &ionic_dbg_intr_stats_desc[i]);
+		(*buf)++;
+	}
+	for (i = 0; i < IONIC_NUM_DBG_NAPI_STATS; i++) {
+		**buf = IONIC_READ_STAT64(&txqcq->napi_stats,
+					  &ionic_dbg_napi_stats_desc[i]);
+		(*buf)++;
+	}
+	for (i = 0; i < IONIC_MAX_NUM_NAPI_CNTR; i++) {
+		**buf = txqcq->napi_stats.work_done_cntr[i];
+		(*buf)++;
+	}
+	for (i = 0; i < IONIC_MAX_NUM_SG_CNTR; i++) {
+		**buf = txstats->sg_cntr[i];
+		(*buf)++;
+	}
+#endif
+}
+
+static void ionic_sw_stats_get_rxq_values(struct ionic_lif *lif, u64 **buf,
+					  int q_num)
+{
+	struct ionic_rx_stats *rxstats;
+#ifdef IONIC_DEBUG_STATS
+	struct ionic_qcq *rxqcq;
+#endif
+	int i;
+
+	rxstats = &lif->rxqstats[q_num];
+
+	for (i = 0; i < IONIC_NUM_RX_STATS; i++) {
+		**buf = IONIC_READ_STAT64(rxstats, &ionic_rx_stats_desc[i]);
+		(*buf)++;
+	}
+
+#ifdef IONIC_DEBUG_STATS
+	if (!test_bit(IONIC_LIF_F_UP, lif->state) ||
+	    !test_bit(IONIC_LIF_F_SW_DEBUG_STATS, lif->state))
+		return;
+
+	rxqcq = lif->rxqcqs[q_num];
+	for (i = 0; i < IONIC_NUM_DBG_CQ_STATS; i++) {
+		**buf = IONIC_READ_STAT64(&rxqcq->cq,
+					  &ionic_dbg_cq_stats_desc[i]);
+		(*buf)++;
+	}
+	for (i = 0; i < IONIC_NUM_DBG_INTR_STATS; i++) {
+		**buf = IONIC_READ_STAT64(&rxqcq->intr,
+					  &ionic_dbg_intr_stats_desc[i]);
+		(*buf)++;
+	}
+	for (i = 0; i < IONIC_NUM_DBG_NAPI_STATS; i++) {
+		**buf = IONIC_READ_STAT64(&rxqcq->napi_stats,
+					  &ionic_dbg_napi_stats_desc[i]);
+		(*buf)++;
+	}
+	for (i = 0; i < IONIC_MAX_NUM_NAPI_CNTR; i++) {
+		**buf = rxqcq->napi_stats.work_done_cntr[i];
+		(*buf)++;
+	}
+#endif
+}
+
+static void ionic_sw_stats_get_values(struct ionic_lif *lif, u64 **buf)
+{
+	struct ionic_mgmt_port_stats *mgmt_stats;
+	struct ionic_port_stats *port_stats;
+	struct ionic_lif_sw_stats lif_stats;
+	int i, q_num;
+
+	ionic_get_lif_stats(lif, &lif_stats);
+
+	for (i = 0; i < IONIC_NUM_LIF_STATS; i++) {
+		**buf = IONIC_READ_STAT64(&lif_stats, &ionic_lif_stats_desc[i]);
+		(*buf)++;
+	}
+
+	if (lif->ionic->is_mgmt_nic) {
+		mgmt_stats = &lif->ionic->idev.port_info->mgmt_stats;
+		for (i = 0; i < IONIC_NUM_MGMT_PORT_STATS; i++) {
+			**buf = IONIC_READ_STAT_LE64(mgmt_stats,
+						&ionic_mgmt_port_stats_desc[i]);
+			(*buf)++;
+		}
+	} else {
+		port_stats = &lif->ionic->idev.port_info->stats;
+		for (i = 0; i < IONIC_NUM_PORT_STATS; i++) {
+			**buf = IONIC_READ_STAT_LE64(port_stats,
+						     &ionic_port_stats_desc[i]);
+			(*buf)++;
+		}
+	}
+
+	for (q_num = 0; q_num < MAX_Q(lif); q_num++)
+		ionic_sw_stats_get_txq_values(lif, buf, q_num);
+
+	if (lif->hwstamp_txq)
+		ionic_sw_stats_get_txq_values(lif, buf, lif->hwstamp_txq->q.index);
+
+	for (q_num = 0; q_num < MAX_Q(lif); q_num++)
+		ionic_sw_stats_get_rxq_values(lif, buf, q_num);
+
+	if (lif->hwstamp_rxq)
+		ionic_sw_stats_get_rxq_values(lif, buf, lif->hwstamp_rxq->q.index);
+}
+
+const struct ionic_stats_group_intf ionic_stats_groups[] = {
+	/* SW Stats group */
+	{
+		.get_strings = ionic_sw_stats_get_strings,
+		.get_values = ionic_sw_stats_get_values,
+		.get_count = ionic_sw_stats_get_count,
+	},
+	/* Add more stat groups here */
+};
+
+const int ionic_num_stats_grps = ARRAY_SIZE(ionic_stats_groups);
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_stats.h b/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_stats.h
new file mode 100644
index 000000000..9cf6717ea
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_stats.h
@@ -0,0 +1,64 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/* Copyright(c) 2017 - 2022 Pensando Systems, Inc */
+
+#ifndef _IONIC_STATS_H_
+#define _IONIC_STATS_H_
+
+#define IONIC_STAT_TO_OFFSET(type, stat_name) (offsetof(type, stat_name))
+
+#define IONIC_STAT_DESC(type, stat_name) { \
+	.name = #stat_name, \
+	.offset = IONIC_STAT_TO_OFFSET(type, stat_name) \
+}
+
+#define IONIC_PORT_STAT_DESC(stat_name) \
+	IONIC_STAT_DESC(struct ionic_port_stats, stat_name)
+
+#define IONIC_MGMT_PORT_STAT_DESC(stat_name) \
+	IONIC_STAT_DESC(struct ionic_mgmt_port_stats, stat_name)
+
+#define IONIC_LIF_STAT_DESC(stat_name) \
+	IONIC_STAT_DESC(struct ionic_lif_sw_stats, stat_name)
+
+#define IONIC_TX_STAT_DESC(stat_name) \
+	IONIC_STAT_DESC(struct ionic_tx_stats, stat_name)
+
+#define IONIC_RX_STAT_DESC(stat_name) \
+	IONIC_STAT_DESC(struct ionic_rx_stats, stat_name)
+
+#ifdef IONIC_DEBUG_STATS
+#define IONIC_TX_Q_STAT_DESC(stat_name) \
+	IONIC_STAT_DESC(struct ionic_queue, stat_name)
+
+#define IONIC_CQ_STAT_DESC(stat_name) \
+	IONIC_STAT_DESC(struct ionic_cq, stat_name)
+
+#define IONIC_INTR_STAT_DESC(stat_name) \
+	IONIC_STAT_DESC(struct ionic_intr_info, stat_name)
+
+#define IONIC_NAPI_STAT_DESC(stat_name) \
+	IONIC_STAT_DESC(struct ionic_napi_stats, stat_name)
+#endif
+
+/* Interface structure for a particalar stats group */
+struct ionic_stats_group_intf {
+	void (*get_strings)(struct ionic_lif *lif, u8 **buf);
+	void (*get_values)(struct ionic_lif *lif, u64 **buf);
+	u64 (*get_count)(struct ionic_lif *lif);
+};
+
+extern const struct ionic_stats_group_intf ionic_stats_groups[];
+extern const int ionic_num_stats_grps;
+
+#define IONIC_READ_STAT64(base_ptr, desc_ptr) \
+	(*((u64 *)(((u8 *)(base_ptr)) + (desc_ptr)->offset)))
+
+#define IONIC_READ_STAT_LE64(base_ptr, desc_ptr) \
+	__le64_to_cpu(*((__le64 *)(((u8 *)(base_ptr)) + (desc_ptr)->offset)))
+
+struct ionic_stat_desc {
+	char name[ETH_GSTRING_LEN];
+	u64 offset;
+};
+
+#endif /* _IONIC_STATS_H_ */
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_txrx.c b/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_txrx.c
new file mode 100644
index 000000000..de5cc1a1f
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_txrx.c
@@ -0,0 +1,1595 @@
+// SPDX-License-Identifier: GPL-2.0
+/* Copyright(c) 2017 - 2022 Pensando Systems, Inc */
+
+#include <linux/ip.h>
+#include <linux/ipv6.h>
+#include <linux/if_vlan.h>
+#include <net/ip6_checksum.h>
+#include <linux/skbuff.h>
+
+#include "ionic.h"
+#include "ionic_lif.h"
+#include "ionic_txrx.h"
+
+static inline void ionic_txq_post(struct ionic_queue *q, bool ring_dbell,
+				  ionic_desc_cb cb_func, void *cb_arg)
+{
+	DEBUG_STATS_TXQ_POST(q, ring_dbell);
+
+	ionic_q_post(q, ring_dbell, cb_func, cb_arg);
+}
+
+static inline void ionic_rxq_post(struct ionic_queue *q, bool ring_dbell,
+				  ionic_desc_cb cb_func, void *cb_arg)
+{
+	ionic_q_post(q, ring_dbell, cb_func, cb_arg);
+
+	DEBUG_STATS_RX_BUFF_CNT(q);
+}
+
+bool ionic_txq_poke_doorbell(struct ionic_queue *q)
+{
+	unsigned long now, then, dif;
+	struct netdev_queue *netdev_txq;
+	struct net_device *netdev;
+
+	netdev = q->lif->netdev;
+	netdev_txq = netdev_get_tx_queue(netdev, q->index);
+
+	HARD_TX_LOCK(netdev, netdev_txq, smp_processor_id());
+
+	if (q->tail_idx == q->head_idx) {
+		HARD_TX_UNLOCK(netdev, netdev_txq);
+		return false;
+	}
+
+	now = READ_ONCE(jiffies);
+	then = q->dbell_jiffies;
+	dif = now - then;
+
+	if (dif > q->dbell_deadline) {
+		ionic_dbell_ring(q->lif->kern_dbpage, q->hw_type,
+				 q->dbval | q->head_idx);
+
+		q->dbell_jiffies = now;
+	}
+
+	HARD_TX_UNLOCK(netdev, netdev_txq);
+
+	return true;
+}
+
+bool ionic_rxq_poke_doorbell(struct ionic_queue *q)
+{
+	unsigned long now, then, dif;
+
+	/* no lock, called from rx napi or txrx napi, nothing else can fill */
+
+	if (q->tail_idx == q->head_idx)
+		return false;
+
+	now = READ_ONCE(jiffies);
+	then = q->dbell_jiffies;
+	dif = now - then;
+
+	if (dif > q->dbell_deadline) {
+		ionic_dbell_ring(q->lif->kern_dbpage, q->hw_type,
+				 q->dbval | q->head_idx);
+
+		q->dbell_jiffies = now;
+
+		dif = 2 * q->dbell_deadline;
+		if (dif > IONIC_RX_MAX_DOORBELL_DEADLINE)
+			dif = IONIC_RX_MAX_DOORBELL_DEADLINE;
+
+		q->dbell_deadline = dif;
+	}
+
+	return true;
+}
+
+static inline struct netdev_queue *q_to_ndq(struct ionic_queue *q)
+{
+	return netdev_get_tx_queue(q->lif->netdev, q->index);
+}
+
+static inline void *ionic_rx_buf_va(struct ionic_buf_info *buf_info)
+{
+	return page_address(buf_info->page) + buf_info->page_offset;
+}
+
+static inline dma_addr_t ionic_rx_buf_pa(struct ionic_buf_info *buf_info)
+{
+	return buf_info->dma_addr + buf_info->page_offset;
+}
+
+static inline unsigned int ionic_rx_buf_size(struct ionic_buf_info *buf_info)
+{
+	return IONIC_PAGE_SIZE - buf_info->page_offset;
+}
+
+static bool ionic_rx_cache_put(struct ionic_queue *q,
+			       struct ionic_buf_info *buf_info)
+{
+	struct ionic_page_cache *cache = &q->page_cache;
+	struct ionic_rx_stats *stats = q_to_rx_stats(q);
+	u32 tail_next;
+
+	tail_next = (cache->tail + 1) & (IONIC_PAGE_CACHE_SIZE - 1);
+	if (tail_next == cache->head) {
+		stats->cache_full++;
+		return false;
+	}
+
+	get_page(buf_info->page);
+
+	cache->ring[cache->tail] = *buf_info;
+	cache->tail = tail_next;
+	stats->cache_put++;
+
+	return true;
+}
+
+static bool ionic_rx_cache_get(struct ionic_queue *q,
+			       struct ionic_buf_info *buf_info)
+{
+	struct ionic_page_cache *cache = &q->page_cache;
+	struct ionic_rx_stats *stats = q_to_rx_stats(q);
+
+	if (unlikely(cache->head == cache->tail)) {
+		stats->cache_empty++;
+		return false;
+	}
+
+	if (page_ref_count(cache->ring[cache->head].page) != 1) {
+		stats->cache_busy++;
+		return false;
+	}
+
+	*buf_info = cache->ring[cache->head];
+	cache->head = (cache->head + 1) & (IONIC_PAGE_CACHE_SIZE - 1);
+	stats->cache_get++;
+
+	dma_sync_single_for_device(q->dev, buf_info->dma_addr,
+				   IONIC_PAGE_SIZE,
+				   DMA_FROM_DEVICE);
+
+	return true;
+}
+
+static void ionic_rx_cache_drain(struct ionic_queue *q)
+{
+	struct ionic_page_cache *cache = &q->page_cache;
+	struct ionic_rx_stats *stats = q_to_rx_stats(q);
+	struct ionic_buf_info *buf_info;
+
+	while (cache->head != cache->tail) {
+		buf_info = &cache->ring[cache->head];
+		dma_unmap_page(q->dev, buf_info->dma_addr, IONIC_PAGE_SIZE,
+			       DMA_FROM_DEVICE);
+		put_page(buf_info->page);
+		cache->head = (cache->head + 1) & (IONIC_PAGE_CACHE_SIZE - 1);
+	}
+
+	cache->head = 0;
+	cache->tail = 0;
+	stats->cache_empty = 0;
+	stats->cache_busy = 0;
+	stats->cache_get = 0;
+	stats->cache_put = 0;
+	stats->cache_full = 0;
+}
+
+static bool ionic_rx_buf_reuse(struct ionic_queue *q,
+			       struct ionic_buf_info *buf_info, u32 used)
+{
+	struct ionic_rx_stats *stats = q_to_rx_stats(q);
+	u32 size;
+
+	if (!dev_page_is_reusable(buf_info->page)) {
+		stats->buf_not_reusable++;
+		return false;
+	}
+
+	size = ALIGN(used, IONIC_PAGE_SPLIT_SZ);
+	buf_info->page_offset += size;
+	if (buf_info->page_offset >= IONIC_PAGE_SIZE) {
+		buf_info->page_offset = 0;
+		stats->buf_exhausted++;
+		return false;
+	}
+
+	stats->buf_reused++;
+
+	get_page(buf_info->page);
+
+	return true;
+}
+
+static void ionic_rx_buf_complete(struct ionic_queue *q,
+				  struct ionic_buf_info *buf_info, u32 used)
+{
+	if (ionic_rx_buf_reuse(q, buf_info, used))
+		return;
+
+	if (!ionic_rx_cache_put(q, buf_info)) {
+#ifndef HAVE_STRUCT_DMA_ATTRS
+		dma_unmap_page_attrs(q->dev, buf_info->dma_addr, IONIC_PAGE_SIZE,
+				     DMA_FROM_DEVICE, DMA_ATTR_SKIP_CPU_SYNC);
+#else
+		dma_unmap_page(q->dev, buf_info->dma_addr, IONIC_PAGE_SIZE, DMA_FROM_DEVICE);
+#endif
+	}
+
+	buf_info->page = NULL;
+}
+
+static inline int ionic_rx_page_alloc(struct ionic_queue *q,
+				      struct ionic_buf_info *buf_info)
+{
+	struct net_device *netdev = q->lif->netdev;
+	struct ionic_rx_stats *stats;
+	struct device *dev;
+	struct page *page;
+
+	if (ionic_rx_cache_get(q, buf_info))
+		return 0;
+
+	dev = q->dev;
+	stats = q_to_rx_stats(q);
+
+	if (unlikely(!buf_info)) {
+		net_err_ratelimited("%s: %s invalid buf_info in alloc\n",
+				    netdev->name, q->name);
+		return -EINVAL;
+	}
+
+	page = alloc_pages_node(dev_to_node(dev), IONIC_PAGE_GFP_MASK, IONIC_PAGE_ORDER);
+	if (unlikely(!page)) {
+		net_err_ratelimited("%s: %s page alloc failed\n",
+				    netdev->name, q->name);
+		stats->alloc_err++;
+		return -ENOMEM;
+	}
+
+	buf_info->dma_addr = dma_map_page(dev, page, 0,
+					  IONIC_PAGE_SIZE, DMA_FROM_DEVICE);
+	if (unlikely(dma_mapping_error(dev, buf_info->dma_addr))) {
+		__free_pages(page, IONIC_PAGE_ORDER);
+		net_err_ratelimited("%s: %s dma map failed\n",
+				    netdev->name, q->name);
+		stats->dma_map_err++;
+		return -EIO;
+	}
+
+	buf_info->page = page;
+	buf_info->page_offset = 0;
+
+	return 0;
+}
+
+static inline void ionic_rx_page_free(struct ionic_queue *q,
+				      struct ionic_buf_info *buf_info)
+{
+	struct net_device *netdev = q->lif->netdev;
+	struct device *dev = q->dev;
+
+	if (unlikely(!buf_info)) {
+		net_err_ratelimited("%s: %s invalid buf_info in free\n",
+				    netdev->name, q->name);
+		return;
+	}
+
+	if (!buf_info->page)
+		return;
+
+	dma_unmap_page(dev, buf_info->dma_addr, IONIC_PAGE_SIZE, DMA_FROM_DEVICE);
+	__free_pages(buf_info->page, IONIC_PAGE_ORDER);
+	buf_info->page = NULL;
+}
+
+static void ionic_rx_add_skb_frag(struct ionic_queue *q,
+				  struct sk_buff *skb,
+				  struct ionic_buf_info *buf_info,
+				  u32 off, u32 len)
+{
+	dma_sync_single_for_cpu(q->dev,
+				ionic_rx_buf_pa(buf_info) + off,
+				len, DMA_FROM_DEVICE);
+
+	skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags,
+			buf_info->page, buf_info->page_offset + off,
+			len,
+			IONIC_PAGE_SIZE);
+
+	ionic_rx_buf_complete(q, buf_info, off + len);
+}
+
+static struct sk_buff *ionic_rx_build_skb(struct ionic_queue *q,
+					  struct ionic_desc_info *desc_info,
+					  struct ionic_rxq_comp *comp)
+{
+	struct net_device *netdev = q->lif->netdev;
+	struct ionic_buf_info *buf_info;
+	struct ionic_rx_stats *stats;
+	struct device *dev = q->dev;
+	struct sk_buff *skb;
+	unsigned int i;
+	u16 head_len;
+	u16 frag_len;
+	u16 copy_len;
+	u16 len;
+
+	stats = q_to_rx_stats(q);
+
+	buf_info = &desc_info->bufs[0];
+	if (unlikely(!buf_info->page))
+		return NULL;
+
+	prefetchw(buf_info->page);
+
+	len = le16_to_cpu(comp->len);
+	head_len = min_t(u16, q->lif->rx_copybreak, len);
+
+	skb = napi_alloc_skb(&q_to_qcq(q)->napi, head_len);
+	if (unlikely(!skb)) {
+		net_warn_ratelimited("%s: SKB alloc failed on %s!\n",
+				     netdev->name, q->name);
+		stats->alloc_err++;
+		return NULL;
+	}
+
+	copy_len = ALIGN(head_len, sizeof(long)); /* for better memcpy performance */
+	dma_sync_single_for_cpu(dev, ionic_rx_buf_pa(buf_info), copy_len, DMA_FROM_DEVICE);
+	skb_copy_to_linear_data(skb, ionic_rx_buf_va(buf_info), copy_len);
+	skb_put(skb, head_len);
+
+	if (len > head_len) {
+		len -= head_len;
+		frag_len = min_t(u16, len, ionic_rx_buf_size(buf_info) - head_len);
+		len -= frag_len;
+		ionic_rx_add_skb_frag(q, skb, buf_info, head_len, frag_len);
+		buf_info++;
+		for (i = 0; i < comp->num_sg_elems; i++) {
+			if (len == 0)
+				goto err_out;
+			if (unlikely(!buf_info->page))
+				goto err_out;
+			frag_len = min_t(u16, len, ionic_rx_buf_size(buf_info));
+			len -= frag_len;
+			ionic_rx_add_skb_frag(q, skb, buf_info, 0, frag_len);
+			buf_info++;
+		}
+	} else {
+		dma_sync_single_for_device(dev,
+					   ionic_rx_buf_pa(buf_info),
+					   len, DMA_FROM_DEVICE);
+	}
+
+	skb->protocol = eth_type_trans(skb, q->lif->netdev);
+
+	return skb;
+
+err_out:
+	if (skb)
+		dev_kfree_skb(skb);
+	return NULL;
+}
+
+static void ionic_rx_clean(struct ionic_queue *q,
+			   struct ionic_desc_info *desc_info,
+			   struct ionic_cq_info *cq_info,
+			   void *cb_arg)
+{
+	struct net_device *netdev = q->lif->netdev;
+	struct ionic_qcq *qcq = q_to_qcq(q);
+	struct ionic_rx_stats *stats;
+	struct ionic_rxq_comp *comp;
+	struct sk_buff *skb;
+#ifdef CSUM_DEBUG
+	__sum16 csum;
+#endif
+
+	comp = cq_info->cq_desc + qcq->cq.desc_size - sizeof(*comp);
+
+	stats = q_to_rx_stats(q);
+
+	if (comp->status) {
+		stats->dropped++;
+		return;
+	}
+
+	if (le16_to_cpu(comp->len) > netdev->mtu + ETH_HLEN + VLAN_HLEN) {
+		stats->dropped++;
+		net_warn_ratelimited("%s: RX PKT TOO LARGE! comp->len %d\n",
+				     netdev->name,
+				     le16_to_cpu(comp->len));
+		return;
+	}
+
+	stats->pkts++;
+	stats->bytes += le16_to_cpu(comp->len);
+
+	skb = ionic_rx_build_skb(q, desc_info, comp);
+	if (unlikely(!skb)) {
+		stats->dropped++;
+		return;
+	}
+
+#ifdef CSUM_DEBUG
+	csum = ip_compute_csum(skb->data, skb->len);
+#endif
+
+	skb_record_rx_queue(skb, q->index);
+
+	if (likely(netdev->features & NETIF_F_RXHASH)) {
+		switch (comp->pkt_type_color & IONIC_RXQ_COMP_PKT_TYPE_MASK) {
+		case IONIC_PKT_TYPE_IPV4:
+		case IONIC_PKT_TYPE_IPV6:
+			skb_set_hash(skb, le32_to_cpu(comp->rss_hash),
+				     PKT_HASH_TYPE_L3);
+			break;
+		case IONIC_PKT_TYPE_IPV4_TCP:
+		case IONIC_PKT_TYPE_IPV6_TCP:
+		case IONIC_PKT_TYPE_IPV4_UDP:
+		case IONIC_PKT_TYPE_IPV6_UDP:
+			skb_set_hash(skb, le32_to_cpu(comp->rss_hash),
+				     PKT_HASH_TYPE_L4);
+			break;
+		}
+	}
+
+	if (likely(netdev->features & NETIF_F_RXCSUM) &&
+	    (comp->csum_flags & IONIC_RXQ_COMP_CSUM_F_CALC)) {
+		skb->ip_summed = CHECKSUM_COMPLETE;
+		skb->csum = (__force __wsum)le16_to_cpu(comp->csum);
+#ifdef IONIC_DEBUG_STATS
+		stats->csum_complete++;
+#endif
+#ifdef CSUM_DEBUG
+		if (skb->csum != (u16)~csum)
+			netdev_warn(netdev, "Rx CSUM incorrect. Want 0x%04x got 0x%04x, protocol 0x%04x\n",
+				    (u16)~csum, skb->csum,
+				    htons(skb->protocol));
+#endif
+	} else {
+#ifdef IONIC_DEBUG_STATS
+		stats->csum_none++;
+#endif
+	}
+
+	if (unlikely((comp->csum_flags & IONIC_RXQ_COMP_CSUM_F_TCP_BAD) ||
+		     (comp->csum_flags & IONIC_RXQ_COMP_CSUM_F_UDP_BAD) ||
+		     (comp->csum_flags & IONIC_RXQ_COMP_CSUM_F_IP_BAD)))
+		stats->csum_error++;
+
+	if (likely(netdev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
+	    (comp->csum_flags & IONIC_RXQ_COMP_CSUM_F_VLAN)) {
+		__vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
+				       le16_to_cpu(comp->vlan_tci));
+#ifdef IONIC_DEBUG_STATS
+		stats->vlan_stripped++;
+#endif
+	}
+
+	if (unlikely(q->features & IONIC_RXQ_F_HWSTAMP)) {
+		__le64 *cq_desc_hwstamp;
+		u64 hwstamp;
+
+		cq_desc_hwstamp =
+			cq_info->cq_desc +
+			qcq->cq.desc_size -
+			sizeof(struct ionic_rxq_comp) -
+			IONIC_HWSTAMP_CQ_NEGOFFSET;
+
+		hwstamp = le64_to_cpu(*cq_desc_hwstamp);
+
+		if (hwstamp != IONIC_HWSTAMP_INVALID) {
+			skb_hwtstamps(skb)->hwtstamp = ionic_lif_phc_ktime(q->lif, hwstamp);
+			stats->hwstamp_valid++;
+		} else {
+			stats->hwstamp_invalid++;
+		}
+	}
+
+	napi_gro_receive(&qcq->napi, skb);
+}
+
+bool ionic_rx_service(struct ionic_cq *cq, struct ionic_cq_info *cq_info)
+{
+	struct ionic_queue *q = cq->bound_q;
+	struct ionic_desc_info *desc_info;
+	struct ionic_rxq_comp *comp;
+
+	comp = cq_info->cq_desc + cq->desc_size - sizeof(*comp);
+
+	if (!color_match(comp->pkt_type_color, cq->done_color))
+		return false;
+
+	/* check for empty queue */
+	if (q->tail_idx == q->head_idx)
+		return false;
+
+	if (q->tail_idx != le16_to_cpu(comp->comp_index))
+		return false;
+
+	desc_info = &q->info[q->tail_idx];
+	q->tail_idx = (q->tail_idx + 1) & (q->num_descs - 1);
+
+	/* clean the related q entry, only one per qc completion */
+	ionic_rx_clean(q, desc_info, cq_info, desc_info->cb_arg);
+
+	desc_info->cb = NULL;
+	desc_info->cb_arg = NULL;
+
+	return true;
+}
+
+void ionic_rx_fill(struct ionic_queue *q)
+{
+	struct net_device *netdev = q->lif->netdev;
+	struct ionic_desc_info *desc_info;
+	struct ionic_rxq_sg_desc *sg_desc;
+	struct ionic_rxq_sg_elem *sg_elem;
+	struct ionic_buf_info *buf_info;
+	unsigned int fill_threshold;
+	struct ionic_rxq_desc *desc;
+	unsigned int remain_len;
+	unsigned int frag_len;
+	unsigned int nfrags;
+	unsigned int n_fill;
+	unsigned int len;
+	unsigned int i;
+	unsigned int j;
+
+	n_fill = ionic_q_space_avail(q);
+
+	fill_threshold = min_t(unsigned int, rx_fill_threshold,
+			       q->num_descs / IONIC_RX_FILL_DIV);
+	if (n_fill < fill_threshold)
+		return;
+
+	len = netdev->mtu + ETH_HLEN + VLAN_HLEN;
+
+	for (i = n_fill; i; i--) {
+		nfrags = 0;
+		remain_len = len;
+		desc_info = &q->info[q->head_idx];
+		desc = desc_info->desc;
+		buf_info = &desc_info->bufs[0];
+
+		if (!buf_info->page) { /* alloc a new buffer? */
+			if (unlikely(ionic_rx_page_alloc(q, buf_info))) {
+				desc->addr = 0;
+				desc->len = 0;
+				return;
+			}
+		}
+
+		/* fill main descriptor - buf[0] */
+		desc->addr = cpu_to_le64(ionic_rx_buf_pa(buf_info));
+		frag_len = min_t(u16, len, ionic_rx_buf_size(buf_info));
+		desc->len = cpu_to_le16(frag_len);
+		remain_len -= frag_len;
+		buf_info++;
+		nfrags++;
+
+		/* fill sg descriptors - buf[1..n] */
+		sg_desc = desc_info->sg_desc;
+		for (j = 0; remain_len > 0 && j < q->max_sg_elems; j++) {
+			sg_elem = &sg_desc->elems[j];
+			if (!buf_info->page) { /* alloc a new sg buffer? */
+				if (unlikely(ionic_rx_page_alloc(q, buf_info))) {
+					sg_elem->addr = 0;
+					sg_elem->len = 0;
+					return;
+				}
+			}
+
+			sg_elem->addr = cpu_to_le64(ionic_rx_buf_pa(buf_info));
+			frag_len = min_t(u16, remain_len, ionic_rx_buf_size(buf_info));
+			sg_elem->len = cpu_to_le16(frag_len);
+			remain_len -= frag_len;
+			buf_info++;
+			nfrags++;
+		}
+
+		/* clear end sg element as a sentinel */
+		if (j < q->max_sg_elems) {
+			sg_elem = &sg_desc->elems[j];
+			memset(sg_elem, 0, sizeof(*sg_elem));
+		}
+
+		desc->opcode = (nfrags > 1) ? IONIC_RXQ_DESC_OPCODE_SG :
+						 IONIC_RXQ_DESC_OPCODE_SIMPLE;
+		desc_info->nbufs = nfrags;
+
+		/* commit descriptor contents in one shot */
+		if (q_to_qcq(q)->flags & IONIC_QCQ_F_CMB_RINGS)
+			memcpy_toio(desc_info->cmb_desc, desc, q->desc_size);
+
+		ionic_rxq_post(q, false, ionic_rx_clean, NULL);
+	}
+
+	ionic_dbell_ring(q->lif->kern_dbpage, q->hw_type,
+			 q->dbval | q->head_idx);
+
+	q->dbell_deadline = IONIC_RX_MIN_DOORBELL_DEADLINE;
+	q->dbell_jiffies = jiffies;
+
+	mod_timer(&q_to_qcq(q)->napi_qcq->napi_deadline,
+		  jiffies + IONIC_NAPI_DEADLINE);
+}
+
+void ionic_rx_empty(struct ionic_queue *q)
+{
+	struct ionic_desc_info *desc_info;
+	struct ionic_buf_info *buf_info;
+	unsigned int i, j;
+
+	for (i = 0; i < q->num_descs; i++) {
+		desc_info = &q->info[i];
+		for (j = 0; j < IONIC_RX_MAX_SG_ELEMS + 1; j++) {
+			buf_info = &desc_info->bufs[j];
+			if (buf_info->page)
+				ionic_rx_page_free(q, buf_info);
+		}
+
+		desc_info->nbufs = 0;
+		desc_info->cb = NULL;
+		desc_info->cb_arg = NULL;
+	}
+
+	q->head_idx = 0;
+	q->tail_idx = 0;
+
+	ionic_rx_cache_drain(q);
+}
+
+static void ionic_dim_update(struct ionic_qcq *qcq, int napi_mode)
+{
+	struct dim_sample dim_sample;
+	struct ionic_lif *lif;
+	unsigned int qi;
+	u64 pkts, bytes;
+
+	if (!qcq->intr.dim_coal_hw)
+		return;
+
+	lif = qcq->q.lif;
+	qi = qcq->cq.bound_q->index;
+
+	switch (napi_mode) {
+	case IONIC_LIF_F_TX_DIM_INTR:
+		pkts = lif->txqstats[qi].pkts;
+		bytes = lif->txqstats[qi].bytes;
+		break;
+	case IONIC_LIF_F_RX_DIM_INTR:
+		pkts = lif->rxqstats[qi].pkts;
+		bytes = lif->rxqstats[qi].bytes;
+		break;
+	default:
+		pkts = lif->txqstats[qi].pkts + lif->rxqstats[qi].pkts;
+		bytes = lif->txqstats[qi].bytes + lif->rxqstats[qi].bytes;
+		break;
+	}
+
+	dim_update_sample_with_comps(qcq->cq.bound_intr->rearm_count,
+				     pkts, bytes, 0, &dim_sample);
+
+	net_dim(&qcq->dim, dim_sample);
+}
+
+int ionic_tx_napi(struct napi_struct *napi, int budget)
+{
+	struct ionic_qcq *qcq = napi_to_qcq(napi);
+	struct ionic_cq *cq = napi_to_cq(napi);
+	struct ionic_dev *idev;
+	struct ionic_lif *lif;
+	u32 work_done = 0;
+	u32 flags = 0;
+	u64 dbr;
+
+	lif = cq->bound_q->lif;
+	idev = &lif->ionic->idev;
+
+	work_done = ionic_cq_service(cq, budget,
+				     ionic_tx_service, NULL, NULL);
+
+	if (work_done < budget && napi_complete_done(napi, work_done)) {
+		flags |= IONIC_INTR_CRED_UNMASK;
+		cq->bound_intr->rearm_count++;
+	}
+
+	if (work_done || flags) {
+		flags |= IONIC_INTR_CRED_RESET_COALESCE;
+		if (!lif->ionic->neth_eqs) {
+			if (flags & IONIC_INTR_CRED_UNMASK)
+				ionic_dim_update(qcq, IONIC_LIF_F_TX_DIM_INTR);
+			ionic_intr_credits(idev->intr_ctrl,
+					   cq->bound_intr->index,
+					   work_done, flags);
+		} else {
+			if (!qcq->armed) {
+				qcq->armed = true;
+				dbr = IONIC_DBELL_RING_1 |
+				      IONIC_DBELL_QID(qcq->q.hw_index);
+				ionic_dbell_ring(lif->kern_dbpage,
+						 qcq->q.hw_type,
+						 dbr | qcq->cq.tail_idx);
+			}
+		}
+	}
+
+	if (!work_done && ionic_txq_poke_doorbell(&qcq->q))
+		mod_timer(&qcq->napi_deadline, jiffies + IONIC_NAPI_DEADLINE);
+
+	DEBUG_STATS_NAPI_POLL(qcq, work_done);
+
+	return work_done;
+}
+
+int ionic_rx_napi(struct napi_struct *napi, int budget)
+{
+	struct ionic_qcq *qcq = napi_to_qcq(napi);
+	struct ionic_cq *cq = napi_to_cq(napi);
+	struct ionic_dev *idev;
+	struct ionic_lif *lif;
+	u32 work_done = 0;
+	u32 flags = 0;
+	u64 dbr;
+
+	lif = cq->bound_q->lif;
+	idev = &lif->ionic->idev;
+
+	work_done = ionic_cq_service(cq, budget,
+				     ionic_rx_service, NULL, NULL);
+
+	ionic_rx_fill(cq->bound_q);
+
+	if (work_done < budget && napi_complete_done(napi, work_done)) {
+		flags |= IONIC_INTR_CRED_UNMASK;
+		cq->bound_intr->rearm_count++;
+	}
+
+	if (work_done || flags) {
+		flags |= IONIC_INTR_CRED_RESET_COALESCE;
+		if (!lif->ionic->neth_eqs) {
+			if (flags & IONIC_INTR_CRED_UNMASK)
+				ionic_dim_update(qcq, IONIC_LIF_F_RX_DIM_INTR);
+			ionic_intr_credits(idev->intr_ctrl,
+					   cq->bound_intr->index,
+					   work_done, flags);
+		} else {
+			if (!qcq->armed) {
+				qcq->armed = true;
+				dbr = IONIC_DBELL_RING_1 |
+				      IONIC_DBELL_QID(qcq->q.hw_index);
+				ionic_dbell_ring(lif->kern_dbpage,
+						 qcq->q.hw_type,
+						 dbr | qcq->cq.tail_idx);
+			}
+		}
+	}
+
+	if (!work_done && ionic_rxq_poke_doorbell(&qcq->q))
+		mod_timer(&qcq->napi_deadline, jiffies + IONIC_NAPI_DEADLINE);
+
+	DEBUG_STATS_NAPI_POLL(qcq, work_done);
+
+	return work_done;
+}
+
+int ionic_txrx_napi(struct napi_struct *napi, int budget)
+{
+	struct ionic_qcq *rxqcq = napi_to_qcq(napi);
+	struct ionic_cq *rxcq = napi_to_cq(napi);
+	unsigned int qi = rxcq->bound_q->index;
+	struct ionic_dev *idev;
+	struct ionic_lif *lif;
+	struct ionic_qcq *txqcq;
+	struct ionic_cq *txcq;
+	bool resched = false;
+	u32 tx_work_done = 0;
+	u32 rx_work_done = 0;
+	u32 flags = 0;
+
+	lif = rxcq->bound_q->lif;
+	idev = &lif->ionic->idev;
+	txqcq = lif->txqcqs[qi];
+	txcq = &lif->txqcqs[qi]->cq;
+
+	tx_work_done = ionic_cq_service(txcq, tx_budget,
+					ionic_tx_service, NULL, NULL);
+
+	rx_work_done = ionic_cq_service(rxcq, budget,
+					ionic_rx_service, NULL, NULL);
+
+	ionic_rx_fill(rxcq->bound_q);
+
+	if (rx_work_done < budget && napi_complete_done(napi, rx_work_done)) {
+		flags |= IONIC_INTR_CRED_UNMASK;
+		rxcq->bound_intr->rearm_count++;
+	}
+
+	if (rx_work_done || flags) {
+		flags |= IONIC_INTR_CRED_RESET_COALESCE;
+		if (!lif->ionic->neth_eqs) {
+			if (flags & IONIC_INTR_CRED_UNMASK)
+				ionic_dim_update(rxqcq, 0);
+			ionic_intr_credits(idev->intr_ctrl,
+					   rxcq->bound_intr->index,
+					   tx_work_done + rx_work_done, flags);
+		} else {
+			u64 dbr;
+
+			if (!rxqcq->armed) {
+				rxqcq->armed = true;
+				dbr = IONIC_DBELL_RING_1 |
+				      IONIC_DBELL_QID(rxqcq->q.hw_index);
+				ionic_dbell_ring(lif->kern_dbpage,
+						 rxqcq->q.hw_type,
+						 dbr | rxqcq->cq.tail_idx);
+			}
+			if (!txqcq->armed) {
+				txqcq->armed = true;
+				dbr = IONIC_DBELL_RING_1 |
+				      IONIC_DBELL_QID(txqcq->q.hw_index);
+				ionic_dbell_ring(lif->kern_dbpage,
+						 txqcq->q.hw_type,
+						 dbr | txqcq->cq.tail_idx);
+			}
+		}
+	}
+
+	DEBUG_STATS_NAPI_POLL(rxqcq, rx_work_done);
+	DEBUG_STATS_NAPI_POLL(txqcq, tx_work_done);
+
+	if (!rx_work_done && ionic_rxq_poke_doorbell(&rxqcq->q))
+		resched = true;
+	if (!tx_work_done && ionic_txq_poke_doorbell(&txqcq->q))
+		resched = true;
+	if (resched)
+		mod_timer(&rxqcq->napi_deadline, jiffies + IONIC_NAPI_DEADLINE);
+
+	return rx_work_done;
+}
+
+static dma_addr_t ionic_tx_map_single(struct ionic_queue *q,
+				      void *data, size_t len)
+{
+	struct ionic_tx_stats *stats = q_to_tx_stats(q);
+	struct device *dev = q->dev;
+	dma_addr_t dma_addr;
+
+	dma_addr = dma_map_single(dev, data, len, DMA_TO_DEVICE);
+	if (dma_mapping_error(dev, dma_addr)) {
+		net_warn_ratelimited("%s: DMA single map failed on %s!\n",
+				     q->lif->netdev->name, q->name);
+		stats->dma_map_err++;
+		return 0;
+	}
+	return dma_addr;
+}
+
+static dma_addr_t ionic_tx_map_frag(struct ionic_queue *q,
+				    const skb_frag_t *frag,
+				    size_t offset, size_t len)
+{
+	struct ionic_tx_stats *stats = q_to_tx_stats(q);
+	struct device *dev = q->dev;
+	dma_addr_t dma_addr;
+
+	dma_addr = skb_frag_dma_map(dev, frag, offset, len, DMA_TO_DEVICE);
+	if (dma_mapping_error(dev, dma_addr)) {
+		net_warn_ratelimited("%s: DMA frag map failed on %s!\n",
+				     q->lif->netdev->name, q->name);
+		stats->dma_map_err++;
+	}
+	return dma_addr;
+}
+
+static int ionic_tx_map_skb(struct ionic_queue *q, struct sk_buff *skb,
+			    struct ionic_desc_info *desc_info)
+{
+	struct ionic_buf_info *buf_info = desc_info->bufs;
+	struct ionic_tx_stats *stats = q_to_tx_stats(q);
+	struct device *dev = q->dev;
+	dma_addr_t dma_addr;
+	unsigned int nfrags;
+	skb_frag_t *frag;
+	int frag_idx;
+
+	dma_addr = ionic_tx_map_single(q, skb->data, skb_headlen(skb));
+	if (dma_mapping_error(dev, dma_addr)) {
+		stats->dma_map_err++;
+		return -EIO;
+	}
+	buf_info->dma_addr = dma_addr;
+	buf_info->len = skb_headlen(skb);
+	buf_info++;
+
+	frag = skb_shinfo(skb)->frags;
+	nfrags = skb_shinfo(skb)->nr_frags;
+	for (frag_idx = 0; frag_idx < nfrags; frag_idx++, frag++) {
+		dma_addr = ionic_tx_map_frag(q, frag, 0, skb_frag_size(frag));
+		if (dma_mapping_error(dev, dma_addr)) {
+			stats->dma_map_err++;
+			goto dma_fail;
+		}
+		buf_info->dma_addr = dma_addr;
+		buf_info->len = skb_frag_size(frag);
+		buf_info++;
+	}
+
+	desc_info->nbufs = 1 + nfrags;
+
+	return 0;
+
+dma_fail:
+	/* unwind the frag mappings and the head mapping */
+	while (frag_idx > 0) {
+		frag_idx--;
+		buf_info--;
+		dma_unmap_page(dev, buf_info->dma_addr,
+			       buf_info->len, DMA_TO_DEVICE);
+	}
+	dma_unmap_single(dev, buf_info->dma_addr, buf_info->len, DMA_TO_DEVICE);
+	return -EIO;
+}
+
+static void ionic_tx_desc_unmap_bufs(struct ionic_queue *q,
+				     struct ionic_desc_info *desc_info)
+{
+	struct ionic_buf_info *buf_info = desc_info->bufs;
+	struct device *dev = q->dev;
+	unsigned int i;
+
+	if (!desc_info->nbufs)
+		return;
+
+	dma_unmap_single(dev, (dma_addr_t)buf_info->dma_addr,
+			 buf_info->len, DMA_TO_DEVICE);
+	buf_info++;
+	for (i = 1; i < desc_info->nbufs; i++, buf_info++)
+		dma_unmap_page(dev, (dma_addr_t)buf_info->dma_addr,
+			       buf_info->len, DMA_TO_DEVICE);
+
+	desc_info->nbufs = 0;
+}
+
+static void ionic_tx_clean(struct ionic_queue *q,
+			   struct ionic_desc_info *desc_info,
+			   struct ionic_cq_info *cq_info,
+			   void *cb_arg)
+{
+	struct ionic_tx_stats *stats = q_to_tx_stats(q);
+	struct ionic_qcq *qcq = q_to_qcq(q);
+	struct sk_buff *skb = cb_arg;
+	u16 qi;
+
+	ionic_tx_desc_unmap_bufs(q, desc_info);
+
+	if (!skb)
+		return;
+
+	qi = skb_get_queue_mapping(skb);
+
+	if (unlikely(q->features & IONIC_TXQ_F_HWSTAMP)) {
+		if (cq_info) {
+			struct skb_shared_hwtstamps hwts = {};
+			__le64 *cq_desc_hwstamp;
+			u64 hwstamp;
+
+			cq_desc_hwstamp =
+				cq_info->cq_desc +
+				qcq->cq.desc_size -
+				sizeof(struct ionic_txq_comp) -
+				IONIC_HWSTAMP_CQ_NEGOFFSET;
+
+			hwstamp = le64_to_cpu(*cq_desc_hwstamp);
+
+			if (hwstamp != IONIC_HWSTAMP_INVALID) {
+				hwts.hwtstamp = ionic_lif_phc_ktime(q->lif, hwstamp);
+
+				skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
+				skb_tstamp_tx(skb, &hwts);
+
+				stats->hwstamp_valid++;
+			} else {
+				stats->hwstamp_invalid++;
+			}
+		}
+
+	} else if (unlikely(__netif_subqueue_stopped(q->lif->netdev, qi))) {
+		netif_wake_subqueue(q->lif->netdev, qi);
+		q->wake++;
+	}
+
+	desc_info->bytes = skb->len;
+	stats->clean++;
+
+	dev_consume_skb_any(skb);
+}
+
+bool ionic_tx_service(struct ionic_cq *cq, struct ionic_cq_info *cq_info)
+{
+	struct ionic_queue *q = cq->bound_q;
+	struct ionic_desc_info *desc_info;
+	struct ionic_txq_comp *comp;
+	int bytes = 0;
+	int pkts = 0;
+	u16 index;
+
+	comp = cq_info->cq_desc + cq->desc_size - sizeof(*comp);
+
+	if (!color_match(comp->color, cq->done_color))
+		return false;
+
+	/* clean the related q entries, there could be
+	 * several q entries completed for each cq completion
+	 */
+	do {
+		desc_info = &q->info[q->tail_idx];
+		desc_info->bytes = 0;
+		index = q->tail_idx;
+		q->tail_idx = (q->tail_idx + 1) & (q->num_descs - 1);
+		ionic_tx_clean(q, desc_info, cq_info, desc_info->cb_arg);
+		if (desc_info->cb_arg) {
+			pkts++;
+			bytes += desc_info->bytes;
+		}
+		desc_info->cb = NULL;
+		desc_info->cb_arg = NULL;
+	} while (index != le16_to_cpu(comp->comp_index));
+
+#ifdef IONIC_SUPPORTS_BQL
+	if (pkts && bytes && !unlikely(q->features & IONIC_TXQ_F_HWSTAMP))
+		netdev_tx_completed_queue(q_to_ndq(q), pkts, bytes);
+#endif
+
+	return true;
+}
+
+void ionic_tx_flush(struct ionic_cq *cq)
+{
+	struct ionic_dev *idev = &cq->lif->ionic->idev;
+	u32 work_done;
+
+	work_done = ionic_cq_service(cq, cq->num_descs,
+				     ionic_tx_service, NULL, NULL);
+
+	if (work_done && !cq->lif->ionic->neth_eqs)
+		ionic_intr_credits(idev->intr_ctrl, cq->bound_intr->index,
+				   work_done, IONIC_INTR_CRED_RESET_COALESCE);
+}
+
+void ionic_tx_empty(struct ionic_queue *q)
+{
+	struct ionic_desc_info *desc_info;
+	int bytes = 0;
+	int pkts = 0;
+
+	/* walk the not completed tx entries, if any */
+	while (q->head_idx != q->tail_idx) {
+		desc_info = &q->info[q->tail_idx];
+		desc_info->bytes = 0;
+		q->tail_idx = (q->tail_idx + 1) & (q->num_descs - 1);
+		ionic_tx_clean(q, desc_info, NULL, desc_info->cb_arg);
+		if (desc_info->cb_arg) {
+			pkts++;
+			bytes += desc_info->bytes;
+		}
+		desc_info->cb = NULL;
+		desc_info->cb_arg = NULL;
+	}
+
+#ifdef IONIC_SUPPORTS_BQL
+	if (pkts && bytes && !unlikely(q->features & IONIC_TXQ_F_HWSTAMP))
+		netdev_tx_completed_queue(q_to_ndq(q), pkts, bytes);
+#endif
+}
+
+static int ionic_tx_tcp_inner_pseudo_csum(struct sk_buff *skb)
+{
+	int err;
+
+	err = skb_cow_head(skb, 0);
+	if (err)
+		return err;
+
+	if (skb->protocol == cpu_to_be16(ETH_P_IP)) {
+		inner_ip_hdr(skb)->check = 0;
+		inner_tcp_hdr(skb)->check =
+			~csum_tcpudp_magic(inner_ip_hdr(skb)->saddr,
+					   inner_ip_hdr(skb)->daddr,
+					   0, IPPROTO_TCP, 0);
+	} else if (skb->protocol == cpu_to_be16(ETH_P_IPV6)) {
+		inner_tcp_hdr(skb)->check =
+			~csum_ipv6_magic(&inner_ipv6_hdr(skb)->saddr,
+					 &inner_ipv6_hdr(skb)->daddr,
+					 0, IPPROTO_TCP, 0);
+	}
+
+	return 0;
+}
+
+static int ionic_tx_tcp_pseudo_csum(struct sk_buff *skb)
+{
+	int err;
+
+	err = skb_cow_head(skb, 0);
+	if (err)
+		return err;
+
+	if (skb->protocol == cpu_to_be16(ETH_P_IP)) {
+		ip_hdr(skb)->check = 0;
+		tcp_hdr(skb)->check =
+			~csum_tcpudp_magic(ip_hdr(skb)->saddr,
+					   ip_hdr(skb)->daddr,
+					   0, IPPROTO_TCP, 0);
+	} else if (skb->protocol == cpu_to_be16(ETH_P_IPV6)) {
+		tcp_hdr(skb)->check =
+			~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
+					 &ipv6_hdr(skb)->daddr,
+					 0, IPPROTO_TCP, 0);
+	}
+
+	return 0;
+}
+
+static void ionic_tx_tso_post(struct ionic_queue *q,
+			      struct ionic_desc_info *desc_info,
+			      struct sk_buff *skb,
+			      dma_addr_t addr, u8 nsge, u16 len,
+			      unsigned int hdrlen, unsigned int mss,
+			      bool outer_csum,
+			      u16 vlan_tci, bool has_vlan,
+			      bool start, bool done)
+{
+	struct ionic_txq_desc *desc = desc_info->desc;
+	u8 flags = 0;
+	u64 cmd;
+
+	flags |= has_vlan ? IONIC_TXQ_DESC_FLAG_VLAN : 0;
+	flags |= outer_csum ? IONIC_TXQ_DESC_FLAG_ENCAP : 0;
+	flags |= start ? IONIC_TXQ_DESC_FLAG_TSO_SOT : 0;
+	flags |= done ? IONIC_TXQ_DESC_FLAG_TSO_EOT : 0;
+
+	cmd = encode_txq_desc_cmd(IONIC_TXQ_DESC_OPCODE_TSO, flags, nsge, addr);
+	desc->cmd = cpu_to_le64(cmd);
+	desc->len = cpu_to_le16(len);
+	desc->vlan_tci = cpu_to_le16(vlan_tci);
+	desc->hdr_len = cpu_to_le16(hdrlen);
+	desc->mss = cpu_to_le16(mss);
+
+	/* commit descriptor contents in one shot */
+	if (q_to_qcq(q)->flags & IONIC_QCQ_F_CMB_RINGS)
+		memcpy_toio(desc_info->cmb_desc, desc, q->desc_size);
+
+	if (start) {
+		skb_tx_timestamp(skb);
+#ifdef IONIC_SUPPORTS_BQL
+		if (!unlikely(q->features & IONIC_TXQ_F_HWSTAMP))
+			netdev_tx_sent_queue(q_to_ndq(q), skb->len);
+#endif
+		ionic_txq_post(q, false, ionic_tx_clean, skb);
+	} else {
+		ionic_txq_post(q, done, NULL, NULL);
+	}
+}
+
+static int ionic_tx_tso(struct ionic_queue *q, struct sk_buff *skb)
+{
+	struct ionic_tx_stats *stats = q_to_tx_stats(q);
+	struct ionic_desc_info *desc_info;
+	struct ionic_buf_info *buf_info;
+	struct ionic_txq_sg_elem *elem;
+	struct ionic_txq_desc *desc;
+	unsigned int chunk_len;
+	unsigned int frag_rem;
+	unsigned int tso_rem;
+	unsigned int seg_rem;
+	dma_addr_t desc_addr;
+	dma_addr_t frag_addr;
+	unsigned int hdrlen;
+	unsigned int len;
+	unsigned int mss;
+	bool start, done;
+	bool outer_csum;
+	bool has_vlan;
+	u16 desc_len;
+	u8 desc_nsge;
+	u16 vlan_tci;
+	bool encap;
+	int err;
+
+	desc_info = &q->info[q->head_idx];
+	buf_info = desc_info->bufs;
+
+	if (unlikely(ionic_tx_map_skb(q, skb, desc_info)))
+		return -EIO;
+
+	len = skb->len;
+	mss = skb_shinfo(skb)->gso_size;
+	outer_csum = (skb_shinfo(skb)->gso_type & (SKB_GSO_GRE |
+						   SKB_GSO_GRE_CSUM |
+#ifdef NETIF_F_GSO_IPXIP4
+						   SKB_GSO_IPXIP4 |
+#endif
+#ifdef NETIF_F_GSO_IPXIP6
+						   SKB_GSO_IPXIP6 |
+#endif
+#ifdef NETIF_F_GSO_IPIP
+						   SKB_GSO_IPIP |
+#endif
+#ifdef NETIF_F_GSO_SIT
+						   SKB_GSO_SIT |
+#endif
+						   SKB_GSO_UDP_TUNNEL |
+						   SKB_GSO_UDP_TUNNEL_CSUM));
+	has_vlan = !!skb_vlan_tag_present(skb);
+	vlan_tci = skb_vlan_tag_get(skb);
+	encap = skb->encapsulation;
+
+	/* Preload inner-most TCP csum field with IP pseudo hdr
+	 * calculated with IP length set to zero.  HW will later
+	 * add in length to each TCP segment resulting from the TSO.
+	 */
+
+	if (encap)
+		err = ionic_tx_tcp_inner_pseudo_csum(skb);
+	else
+		err = ionic_tx_tcp_pseudo_csum(skb);
+	if (err) {
+		/* clean up mapping from ionic_tx_map_skb */
+		ionic_tx_desc_unmap_bufs(q, desc_info);
+		return err;
+	}
+
+	if (encap)
+		hdrlen = skb_inner_tcp_all_headers(skb);
+	else
+		hdrlen = skb_tcp_all_headers(skb);
+
+	tso_rem = len;
+	seg_rem = min(tso_rem, hdrlen + mss);
+
+	frag_addr = 0;
+	frag_rem = 0;
+
+	start = true;
+
+	while (tso_rem > 0) {
+		desc = NULL;
+		elem = NULL;
+		desc_addr = 0;
+		desc_len = 0;
+		desc_nsge = 0;
+		/* use fragments until we have enough to post a single descriptor */
+		while (seg_rem > 0) {
+			/* if the fragment is exhausted then move to the next one */
+			if (frag_rem == 0) {
+				/* grab the next fragment */
+				frag_addr = buf_info->dma_addr;
+				frag_rem = buf_info->len;
+				buf_info++;
+			}
+			chunk_len = min(frag_rem, seg_rem);
+			if (!desc) {
+				/* fill main descriptor */
+				desc = desc_info->txq_desc;
+				elem = desc_info->txq_sg_desc->elems;
+				desc_addr = frag_addr;
+				desc_len = chunk_len;
+			} else {
+				/* fill sg descriptor */
+				elem->addr = cpu_to_le64(frag_addr);
+				elem->len = cpu_to_le16(chunk_len);
+				elem++;
+				desc_nsge++;
+			}
+			frag_addr += chunk_len;
+			frag_rem -= chunk_len;
+			tso_rem -= chunk_len;
+			seg_rem -= chunk_len;
+		}
+		seg_rem = min(tso_rem, mss);
+		done = (tso_rem == 0);
+		/* post descriptor */
+		ionic_tx_tso_post(q, desc_info, skb,
+				  desc_addr, desc_nsge, desc_len,
+				  hdrlen, mss, outer_csum, vlan_tci, has_vlan,
+				  start, done);
+		start = false;
+		/* Buffer information is stored with the first tso descriptor */
+		desc_info = &q->info[q->head_idx];
+		desc_info->nbufs = 0;
+	}
+
+	stats->pkts += DIV_ROUND_UP(len - hdrlen, mss);
+	stats->bytes += len;
+	stats->tso++;
+	stats->tso_bytes = len;
+
+	return 0;
+}
+
+static void ionic_tx_calc_csum(struct ionic_queue *q, struct sk_buff *skb,
+			       struct ionic_desc_info *desc_info)
+{
+	struct ionic_buf_info *buf_info = desc_info->bufs;
+#ifdef IONIC_DEBUG_STATS
+	struct ionic_tx_stats *stats = q_to_tx_stats(q);
+#endif
+	struct ionic_txq_desc *desc = desc_info->desc;
+	bool has_vlan;
+	u8 flags = 0;
+	bool encap;
+	u64 cmd;
+
+	has_vlan = !!skb_vlan_tag_present(skb);
+	encap = skb->encapsulation;
+
+	flags |= has_vlan ? IONIC_TXQ_DESC_FLAG_VLAN : 0;
+	flags |= encap ? IONIC_TXQ_DESC_FLAG_ENCAP : 0;
+
+	cmd = encode_txq_desc_cmd(IONIC_TXQ_DESC_OPCODE_CSUM_PARTIAL,
+				  flags, skb_shinfo(skb)->nr_frags,
+				  buf_info->dma_addr);
+	desc->cmd = cpu_to_le64(cmd);
+	desc->len = cpu_to_le16(buf_info->len);
+	if (has_vlan) {
+		desc->vlan_tci = cpu_to_le16(skb_vlan_tag_get(skb));
+#ifdef IONIC_DEBUG_STATS
+		stats->vlan_inserted++;
+#endif
+	}
+	desc->csum_start = cpu_to_le16(skb_checksum_start_offset(skb));
+	desc->csum_offset = cpu_to_le16(skb->csum_offset);
+
+	/* commit descriptor contents in one shot */
+	if (q_to_qcq(q)->flags & IONIC_QCQ_F_CMB_RINGS)
+		memcpy_toio(desc_info->cmb_desc, desc, q->desc_size);
+
+#ifdef IONIC_DEBUG_STATS
+#ifdef HAVE_CSUM_NOT_INET
+	if (skb->csum_not_inet)
+		stats->crc32_csum++;
+	else
+#endif
+		stats->csum++;
+#endif
+}
+
+static void ionic_tx_calc_no_csum(struct ionic_queue *q, struct sk_buff *skb,
+				  struct ionic_desc_info *desc_info)
+{
+	struct ionic_buf_info *buf_info = desc_info->bufs;
+	struct ionic_txq_desc *desc = desc_info->desc;
+#ifdef IONIC_DEBUG_STATS
+	struct ionic_tx_stats *stats = q_to_tx_stats(q);
+#endif
+	bool has_vlan;
+	u8 flags = 0;
+	bool encap;
+	u64 cmd;
+
+	has_vlan = !!skb_vlan_tag_present(skb);
+	encap = skb->encapsulation;
+
+	flags |= has_vlan ? IONIC_TXQ_DESC_FLAG_VLAN : 0;
+	flags |= encap ? IONIC_TXQ_DESC_FLAG_ENCAP : 0;
+
+	cmd = encode_txq_desc_cmd(IONIC_TXQ_DESC_OPCODE_CSUM_NONE,
+				  flags, skb_shinfo(skb)->nr_frags,
+				  buf_info->dma_addr);
+	desc->cmd = cpu_to_le64(cmd);
+	desc->len = cpu_to_le16(buf_info->len);
+	if (has_vlan) {
+		desc->vlan_tci = cpu_to_le16(skb_vlan_tag_get(skb));
+#ifdef IONIC_DEBUG_STATS
+		stats->vlan_inserted++;
+#endif
+	}
+
+	/* commit descriptor contents in one shot */
+	if (q_to_qcq(q)->flags & IONIC_QCQ_F_CMB_RINGS)
+		memcpy_toio(desc_info->cmb_desc, desc, q->desc_size);
+
+#ifdef IONIC_DEBUG_STATS
+	stats->csum_none++;
+#endif
+}
+
+static void ionic_tx_skb_frags(struct ionic_queue *q, struct sk_buff *skb,
+			       struct ionic_desc_info *desc_info)
+{
+	struct ionic_txq_sg_desc *sg_desc = desc_info->txq_sg_desc;
+	struct ionic_buf_info *buf_info = &desc_info->bufs[1];
+	struct ionic_txq_sg_elem *elem = sg_desc->elems;
+#ifdef IONIC_DEBUG_STATS
+	struct ionic_tx_stats *stats = q_to_tx_stats(q);
+#endif
+	unsigned int i;
+
+	for (i = 0; i < skb_shinfo(skb)->nr_frags; i++, buf_info++, elem++) {
+		elem->addr = cpu_to_le64(buf_info->dma_addr);
+		elem->len = cpu_to_le16(buf_info->len);
+	}
+
+#ifdef IONIC_DEBUG_STATS
+	stats->frags += skb_shinfo(skb)->nr_frags;
+#endif
+}
+
+static int ionic_tx(struct ionic_queue *q, struct sk_buff *skb)
+{
+	struct ionic_desc_info *desc_info = &q->info[q->head_idx];
+	struct ionic_tx_stats *stats = q_to_tx_stats(q);
+
+	if (unlikely(ionic_tx_map_skb(q, skb, desc_info)))
+		return -EIO;
+
+	/* set up the initial descriptor */
+	if (skb->ip_summed == CHECKSUM_PARTIAL)
+		ionic_tx_calc_csum(q, skb, desc_info);
+	else
+		ionic_tx_calc_no_csum(q, skb, desc_info);
+
+	/* add frags */
+	ionic_tx_skb_frags(q, skb, desc_info);
+
+	skb_tx_timestamp(skb);
+	stats->pkts++;
+	stats->bytes += skb->len;
+
+#ifdef IONIC_SUPPORTS_BQL
+	if (!unlikely(q->features & IONIC_TXQ_F_HWSTAMP))
+		netdev_tx_sent_queue(q_to_ndq(q), skb->len);
+#endif
+#ifdef HAVE_SKB_XMIT_MORE
+	ionic_txq_post(q, !netdev_xmit_more(), ionic_tx_clean, skb);
+#else
+	ionic_txq_post(q, true, ionic_tx_clean, skb);
+#endif
+
+	return 0;
+}
+
+static int ionic_tx_descs_needed(struct ionic_queue *q, struct sk_buff *skb)
+{
+	struct ionic_tx_stats *stats = q_to_tx_stats(q);
+	int ndescs;
+	int err;
+
+	/* Each desc is mss long max, so a descriptor for each gso_seg */
+	if (skb_is_gso(skb))
+		ndescs = skb_shinfo(skb)->gso_segs;
+	else
+		ndescs = 1;
+
+	/* If non-TSO, just need 1 desc and nr_frags sg elems */
+	if (skb_shinfo(skb)->nr_frags <= q->max_sg_elems)
+		return ndescs;
+
+	/* Too many frags, so linearize */
+	err = skb_linearize(skb);
+	if (err)
+		return err;
+
+	stats->linearize++;
+
+	return ndescs;
+}
+
+static int ionic_maybe_stop_tx(struct ionic_queue *q, int ndescs)
+{
+	int stopped = 0;
+
+	if (unlikely(!ionic_q_has_space(q, ndescs))) {
+		netif_stop_subqueue(q->lif->netdev, q->index);
+		q->stop++;
+		stopped = 1;
+
+		/* Might race with ionic_tx_clean, check again */
+		smp_rmb();
+		if (ionic_q_has_space(q, ndescs)) {
+			netif_wake_subqueue(q->lif->netdev, q->index);
+			stopped = 0;
+		}
+	}
+
+	return stopped;
+}
+
+#if IS_ENABLED(CONFIG_PTP_1588_CLOCK)
+static netdev_tx_t ionic_start_hwstamp_xmit(struct sk_buff *skb,
+					    struct net_device *netdev)
+{
+	struct ionic_lif *lif = netdev_priv(netdev);
+	struct ionic_queue *q = &lif->hwstamp_txq->q;
+	int err, ndescs;
+
+	/* Does not stop/start txq, because we post to a separate tx queue
+	 * for timestamping, and if a packet can't be posted immediately to
+	 * the timestamping queue, it is dropped.
+	 */
+
+	ndescs = ionic_tx_descs_needed(q, skb);
+	if (unlikely(ndescs < 0))
+		goto err_out_drop;
+
+	if (unlikely(!ionic_q_has_space(q, ndescs)))
+		goto err_out_drop;
+
+	skb_shinfo(skb)->tx_flags |= SKBTX_HW_TSTAMP;
+	if (skb_is_gso(skb))
+		err = ionic_tx_tso(q, skb);
+	else
+		err = ionic_tx(q, skb);
+
+	if (err)
+		goto err_out_drop;
+
+	return NETDEV_TX_OK;
+
+err_out_drop:
+	q->drop++;
+	dev_kfree_skb(skb);
+	return NETDEV_TX_OK;
+}
+#endif
+
+netdev_tx_t ionic_start_xmit(struct sk_buff *skb, struct net_device *netdev)
+{
+	u16 queue_index = skb_get_queue_mapping(skb);
+	struct ionic_lif *lif = netdev_priv(netdev);
+	struct ionic_queue *q;
+	int ndescs;
+	int err;
+
+	if (unlikely(!test_bit(IONIC_LIF_F_UP, lif->state))) {
+		dev_kfree_skb(skb);
+		return NETDEV_TX_OK;
+	}
+
+#if IS_ENABLED(CONFIG_PTP_1588_CLOCK)
+	if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP))
+		if (lif->hwstamp_txq && lif->phc->ts_config_tx_mode)
+			return ionic_start_hwstamp_xmit(skb, netdev);
+#endif
+
+	if (unlikely(queue_index >= lif->nxqs))
+		queue_index = 0;
+	q = &lif->txqcqs[queue_index]->q;
+
+	ndescs = ionic_tx_descs_needed(q, skb);
+	if (ndescs < 0)
+		goto err_out_drop;
+
+	if (unlikely(ionic_maybe_stop_tx(q, ndescs)))
+		return NETDEV_TX_BUSY;
+
+	if (skb_is_gso(skb))
+		err = ionic_tx_tso(q, skb);
+	else
+		err = ionic_tx(q, skb);
+
+	if (err)
+		goto err_out_drop;
+
+	/* Stop the queue if there aren't descriptors for the next packet.
+	 * Since our SG lists per descriptor take care of most of the possible
+	 * fragmentation, we don't need to have many descriptors available.
+	 */
+	ionic_maybe_stop_tx(q, 4);
+
+	return NETDEV_TX_OK;
+
+err_out_drop:
+	q->stop++;
+	q->drop++;
+	dev_kfree_skb(skb);
+	return NETDEV_TX_OK;
+}
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_txrx.h b/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_txrx.h
new file mode 100644
index 000000000..0d9bf7ac7
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_txrx.h
@@ -0,0 +1,21 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/* Copyright(c) 2017 - 2022 Pensando Systems, Inc */
+
+#ifndef _IONIC_TXRX_H_
+#define _IONIC_TXRX_H_
+
+void ionic_rx_flush(struct ionic_cq *cq);
+void ionic_tx_flush(struct ionic_cq *cq);
+
+void ionic_rx_fill(struct ionic_queue *q);
+void ionic_rx_empty(struct ionic_queue *q);
+void ionic_tx_empty(struct ionic_queue *q);
+int ionic_rx_napi(struct napi_struct *napi, int budget);
+int ionic_tx_napi(struct napi_struct *napi, int budget);
+int ionic_txrx_napi(struct napi_struct *napi, int budget);
+netdev_tx_t ionic_start_xmit(struct sk_buff *skb, struct net_device *netdev);
+
+bool ionic_rx_service(struct ionic_cq *cq, struct ionic_cq_info *cq_info);
+bool ionic_tx_service(struct ionic_cq *cq, struct ionic_cq_info *cq_info);
+
+#endif /* _IONIC_TXRX_H_ */
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/kcompat.c b/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/kcompat.c
new file mode 100644
index 000000000..3357b7d57
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/kcompat.c
@@ -0,0 +1,2609 @@
+// SPDX-License-Identifier: GPL-2.0
+/* Copyright(c) 1999 - 2019 Intel Corporation. */
+
+#include "kcompat.h"
+
+/*****************************************************************************/
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,4,8) ) || defined __VMKLNX__
+/* From lib/vsprintf.c */
+#include <asm/div64.h>
+
+static int skip_atoi(const char **s)
+{
+	int i=0;
+
+	while (isdigit(**s))
+		i = i*10 + *((*s)++) - '0';
+	return i;
+}
+
+#define _kc_ZEROPAD	1		/* pad with zero */
+#define _kc_SIGN	2		/* unsigned/signed long */
+#define _kc_PLUS	4		/* show plus */
+#define _kc_SPACE	8		/* space if plus */
+#define _kc_LEFT	16		/* left justified */
+#define _kc_SPECIAL	32		/* 0x */
+#define _kc_LARGE	64		/* use 'ABCDEF' instead of 'abcdef' */
+
+static char * number(char * buf, char * end, long long num, int base, int size, int precision, int type)
+{
+	char c,sign,tmp[66];
+	const char *digits;
+	const char small_digits[] = "0123456789abcdefghijklmnopqrstuvwxyz";
+	const char large_digits[] = "0123456789ABCDEFGHIJKLMNOPQRSTUVWXYZ";
+	int i;
+
+	digits = (type & _kc_LARGE) ? large_digits : small_digits;
+	if (type & _kc_LEFT)
+		type &= ~_kc_ZEROPAD;
+	if (base < 2 || base > 36)
+		return 0;
+	c = (type & _kc_ZEROPAD) ? '0' : ' ';
+	sign = 0;
+	if (type & _kc_SIGN) {
+		if (num < 0) {
+			sign = '-';
+			num = -num;
+			size--;
+		} else if (type & _kc_PLUS) {
+			sign = '+';
+			size--;
+		} else if (type & _kc_SPACE) {
+			sign = ' ';
+			size--;
+		}
+	}
+	if (type & _kc_SPECIAL) {
+		if (base == 16)
+			size -= 2;
+		else if (base == 8)
+			size--;
+	}
+	i = 0;
+	if (num == 0)
+		tmp[i++]='0';
+	else while (num != 0)
+		tmp[i++] = digits[do_div(num,base)];
+	if (i > precision)
+		precision = i;
+	size -= precision;
+	if (!(type&(_kc_ZEROPAD+_kc_LEFT))) {
+		while(size-->0) {
+			if (buf <= end)
+				*buf = ' ';
+			++buf;
+		}
+	}
+	if (sign) {
+		if (buf <= end)
+			*buf = sign;
+		++buf;
+	}
+	if (type & _kc_SPECIAL) {
+		if (base==8) {
+			if (buf <= end)
+				*buf = '0';
+			++buf;
+		} else if (base==16) {
+			if (buf <= end)
+				*buf = '0';
+			++buf;
+			if (buf <= end)
+				*buf = digits[33];
+			++buf;
+		}
+	}
+	if (!(type & _kc_LEFT)) {
+		while (size-- > 0) {
+			if (buf <= end)
+				*buf = c;
+			++buf;
+		}
+	}
+	while (i < precision--) {
+		if (buf <= end)
+			*buf = '0';
+		++buf;
+	}
+	while (i-- > 0) {
+		if (buf <= end)
+			*buf = tmp[i];
+		++buf;
+	}
+	while (size-- > 0) {
+		if (buf <= end)
+			*buf = ' ';
+		++buf;
+	}
+	return buf;
+}
+
+int _kc_vsnprintf(char *buf, size_t size, const char *fmt, va_list args)
+{
+	int len;
+	unsigned long long num;
+	int i, base;
+	char *str, *end, c;
+	const char *s;
+
+	int flags;		/* flags to number() */
+
+	int field_width;	/* width of output field */
+	int precision;		/* min. # of digits for integers; max
+				   number of chars for from string */
+	int qualifier;		/* 'h', 'l', or 'L' for integer fields */
+				/* 'z' support added 23/7/1999 S.H.    */
+				/* 'z' changed to 'Z' --davidm 1/25/99 */
+
+	str = buf;
+	end = buf + size - 1;
+
+	if (end < buf - 1) {
+		end = ((void *) -1);
+		size = end - buf + 1;
+	}
+
+	for (; *fmt ; ++fmt) {
+		if (*fmt != '%') {
+			if (str <= end)
+				*str = *fmt;
+			++str;
+			continue;
+		}
+
+		/* process flags */
+		flags = 0;
+		repeat:
+			++fmt;		/* this also skips first '%' */
+			switch (*fmt) {
+				case '-': flags |= _kc_LEFT; goto repeat;
+				case '+': flags |= _kc_PLUS; goto repeat;
+				case ' ': flags |= _kc_SPACE; goto repeat;
+				case '#': flags |= _kc_SPECIAL; goto repeat;
+				case '0': flags |= _kc_ZEROPAD; goto repeat;
+			}
+
+		/* get field width */
+		field_width = -1;
+		if (isdigit(*fmt))
+			field_width = skip_atoi(&fmt);
+		else if (*fmt == '*') {
+			++fmt;
+			/* it's the next argument */
+			field_width = va_arg(args, int);
+			if (field_width < 0) {
+				field_width = -field_width;
+				flags |= _kc_LEFT;
+			}
+		}
+
+		/* get the precision */
+		precision = -1;
+		if (*fmt == '.') {
+			++fmt;
+			if (isdigit(*fmt))
+				precision = skip_atoi(&fmt);
+			else if (*fmt == '*') {
+				++fmt;
+				/* it's the next argument */
+				precision = va_arg(args, int);
+			}
+			if (precision < 0)
+				precision = 0;
+		}
+
+		/* get the conversion qualifier */
+		qualifier = -1;
+		if (*fmt == 'h' || *fmt == 'l' || *fmt == 'L' || *fmt =='Z') {
+			qualifier = *fmt;
+			++fmt;
+		}
+
+		/* default base */
+		base = 10;
+
+		switch (*fmt) {
+			case 'c':
+				if (!(flags & _kc_LEFT)) {
+					while (--field_width > 0) {
+						if (str <= end)
+							*str = ' ';
+						++str;
+					}
+				}
+				c = (unsigned char) va_arg(args, int);
+				if (str <= end)
+					*str = c;
+				++str;
+				while (--field_width > 0) {
+					if (str <= end)
+						*str = ' ';
+					++str;
+				}
+				continue;
+
+			case 's':
+				s = va_arg(args, char *);
+				if (!s)
+					s = "<NULL>";
+
+				len = strnlen(s, precision);
+
+				if (!(flags & _kc_LEFT)) {
+					while (len < field_width--) {
+						if (str <= end)
+							*str = ' ';
+						++str;
+					}
+				}
+				for (i = 0; i < len; ++i) {
+					if (str <= end)
+						*str = *s;
+					++str; ++s;
+				}
+				while (len < field_width--) {
+					if (str <= end)
+						*str = ' ';
+					++str;
+				}
+				continue;
+
+			case 'p':
+				if ('M' == *(fmt+1)) {
+					str = get_mac(str, end, va_arg(args, unsigned char *));
+					fmt++;
+				} else	{
+					if (field_width == -1) {
+						field_width = 2*sizeof(void *);
+						flags |= _kc_ZEROPAD;
+					}
+					str = number(str, end,
+							(unsigned long) va_arg(args, void *),
+							16, field_width, precision, flags);
+				}
+				continue;
+
+			case 'n':
+				/* FIXME:
+				* What does C99 say about the overflow case here? */
+				if (qualifier == 'l') {
+					long * ip = va_arg(args, long *);
+					*ip = (str - buf);
+				} else if (qualifier == 'Z') {
+					size_t * ip = va_arg(args, size_t *);
+					*ip = (str - buf);
+				} else {
+					int * ip = va_arg(args, int *);
+					*ip = (str - buf);
+				}
+				continue;
+
+			case '%':
+				if (str <= end)
+					*str = '%';
+				++str;
+				continue;
+
+				/* integer number formats - set up the flags and "break" */
+			case 'o':
+				base = 8;
+				break;
+
+			case 'X':
+				flags |= _kc_LARGE;
+			case 'x':
+				base = 16;
+				break;
+
+			case 'd':
+			case 'i':
+				flags |= _kc_SIGN;
+			case 'u':
+				break;
+
+			default:
+				if (str <= end)
+					*str = '%';
+				++str;
+				if (*fmt) {
+					if (str <= end)
+						*str = *fmt;
+					++str;
+				} else {
+					--fmt;
+				}
+				continue;
+		}
+		if (qualifier == 'L')
+			num = va_arg(args, long long);
+		else if (qualifier == 'l') {
+			num = va_arg(args, unsigned long);
+			if (flags & _kc_SIGN)
+				num = (signed long) num;
+		} else if (qualifier == 'Z') {
+			num = va_arg(args, size_t);
+		} else if (qualifier == 'h') {
+			num = (unsigned short) va_arg(args, int);
+			if (flags & _kc_SIGN)
+				num = (signed short) num;
+		} else {
+			num = va_arg(args, unsigned int);
+			if (flags & _kc_SIGN)
+				num = (signed int) num;
+		}
+		str = number(str, end, num, base,
+				field_width, precision, flags);
+	}
+	if (str <= end)
+		*str = '\0';
+	else if (size > 0)
+		/* don't write out a null byte if the buf size is zero */
+		*end = '\0';
+	/* the trailing null byte doesn't count towards the total
+	* ++str;
+	*/
+	return str-buf;
+}
+
+int _kc_snprintf(char * buf, size_t size, const char *fmt, ...)
+{
+	va_list args;
+	int i;
+
+	va_start(args, fmt);
+	i = _kc_vsnprintf(buf,size,fmt,args);
+	va_end(args);
+	return i;
+}
+#endif /* < 2.4.8 */
+
+/*****************************************************************************/
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,4,13) )
+
+/**************************************/
+/* PCI DMA MAPPING */
+
+#if defined(CONFIG_HIGHMEM)
+
+#ifndef PCI_DRAM_OFFSET
+#define PCI_DRAM_OFFSET 0
+#endif
+
+u64
+_kc_pci_map_page(struct pci_dev *dev, struct page *page, unsigned long offset,
+                 size_t size, int direction)
+{
+	return (((u64) (page - mem_map) << PAGE_SHIFT) + offset +
+		PCI_DRAM_OFFSET);
+}
+
+#else /* CONFIG_HIGHMEM */
+
+u64
+_kc_pci_map_page(struct pci_dev *dev, struct page *page, unsigned long offset,
+                 size_t size, int direction)
+{
+	return pci_map_single(dev, (void *)page_address(page) + offset, size,
+			      direction);
+}
+
+#endif /* CONFIG_HIGHMEM */
+
+void
+_kc_pci_unmap_page(struct pci_dev *dev, u64 dma_addr, size_t size,
+                   int direction)
+{
+	return pci_unmap_single(dev, dma_addr, size, direction);
+}
+
+#endif /* 2.4.13 => 2.4.3 */
+
+/*****************************************************************************/
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,4,3) )
+
+/**************************************/
+/* PCI DRIVER API */
+
+int
+_kc_pci_set_dma_mask(struct pci_dev *dev, dma_addr_t mask)
+{
+	if (!pci_dma_supported(dev, mask))
+		return -EIO;
+	dev->dma_mask = mask;
+	return 0;
+}
+
+int
+_kc_pci_request_regions(struct pci_dev *dev, char *res_name)
+{
+	int i;
+
+	for (i = 0; i < 6; i++) {
+		if (pci_resource_len(dev, i) == 0)
+			continue;
+
+		if (pci_resource_flags(dev, i) & IORESOURCE_IO) {
+			if (!request_region(pci_resource_start(dev, i), pci_resource_len(dev, i), res_name)) {
+				pci_release_regions(dev);
+				return -EBUSY;
+			}
+		} else if (pci_resource_flags(dev, i) & IORESOURCE_MEM) {
+			if (!request_mem_region(pci_resource_start(dev, i), pci_resource_len(dev, i), res_name)) {
+				pci_release_regions(dev);
+				return -EBUSY;
+			}
+		}
+	}
+	return 0;
+}
+
+void
+_kc_pci_release_regions(struct pci_dev *dev)
+{
+	int i;
+
+	for (i = 0; i < 6; i++) {
+		if (pci_resource_len(dev, i) == 0)
+			continue;
+
+		if (pci_resource_flags(dev, i) & IORESOURCE_IO)
+			release_region(pci_resource_start(dev, i), pci_resource_len(dev, i));
+
+		else if (pci_resource_flags(dev, i) & IORESOURCE_MEM)
+			release_mem_region(pci_resource_start(dev, i), pci_resource_len(dev, i));
+	}
+}
+
+/**************************************/
+/* NETWORK DRIVER API */
+
+struct net_device *
+_kc_alloc_etherdev(int sizeof_priv)
+{
+	struct net_device *dev;
+	int alloc_size;
+
+	alloc_size = sizeof(*dev) + sizeof_priv + IFNAMSIZ + 31;
+	dev = kzalloc(alloc_size, GFP_KERNEL);
+	if (!dev)
+		return NULL;
+
+	if (sizeof_priv)
+		dev->priv = (void *) (((unsigned long)(dev + 1) + 31) & ~31);
+	dev->name[0] = '\0';
+	ether_setup(dev);
+
+	return dev;
+}
+
+int
+_kc_is_valid_ether_addr(u8 *addr)
+{
+	const char zaddr[6] = { 0, };
+
+	return !(addr[0] & 1) && memcmp(addr, zaddr, 6);
+}
+
+#endif /* 2.4.3 => 2.4.0 */
+
+/*****************************************************************************/
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,4,6) )
+
+int
+_kc_pci_set_power_state(struct pci_dev *dev, int state)
+{
+	return 0;
+}
+
+int
+_kc_pci_enable_wake(struct pci_dev *pdev, u32 state, int enable)
+{
+	return 0;
+}
+
+#endif /* 2.4.6 => 2.4.3 */
+
+/*****************************************************************************/
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0) )
+void _kc_skb_fill_page_desc(struct sk_buff *skb, int i, struct page *page,
+                            int off, int size)
+{
+	skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
+	frag->page = page;
+	frag->page_offset = off;
+	frag->size = size;
+	skb_shinfo(skb)->nr_frags = i + 1;
+}
+
+/*
+ * Original Copyright:
+ * find_next_bit.c: fallback find next bit implementation
+ *
+ * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ */
+
+/**
+ * find_next_bit - find the next set bit in a memory region
+ * @addr: The address to base the search on
+ * @offset: The bitnumber to start searching at
+ * @size: The maximum size to search
+ * @return: The next set bit in the memory region
+ */
+unsigned long find_next_bit(const unsigned long *addr, unsigned long size,
+                            unsigned long offset)
+{
+	const unsigned long *p = addr + BITOP_WORD(offset);
+	unsigned long result = offset & ~(BITS_PER_LONG-1);
+	unsigned long tmp;
+
+	if (offset >= size)
+		return size;
+	size -= result;
+	offset %= BITS_PER_LONG;
+	if (offset) {
+		tmp = *(p++);
+		tmp &= (~0UL << offset);
+		if (size < BITS_PER_LONG)
+			goto found_first;
+		if (tmp)
+			goto found_middle;
+		size -= BITS_PER_LONG;
+		result += BITS_PER_LONG;
+	}
+	while (size & ~(BITS_PER_LONG-1)) {
+		if ((tmp = *(p++)))
+			goto found_middle;
+		result += BITS_PER_LONG;
+		size -= BITS_PER_LONG;
+	}
+	if (!size)
+		return result;
+	tmp = *p;
+
+found_first:
+	tmp &= (~0UL >> (BITS_PER_LONG - size));
+	if (tmp == 0UL)		/* Are any bits set? */
+		return result + size;	/* Nope. */
+found_middle:
+	return result + ffs(tmp);
+}
+
+size_t _kc_strlcpy(char *dest, const char *src, size_t size)
+{
+	size_t ret = strlen(src);
+
+	if (size) {
+		size_t len = (ret >= size) ? size - 1 : ret;
+		memcpy(dest, src, len);
+		dest[len] = '\0';
+	}
+	return ret;
+}
+
+#ifndef do_div
+#if BITS_PER_LONG == 32
+uint32_t __attribute__((weak)) _kc__div64_32(uint64_t *n, uint32_t base)
+{
+	uint64_t rem = *n;
+	uint64_t b = base;
+	uint64_t res, d = 1;
+	uint32_t high = rem >> 32;
+
+	/* Reduce the thing a bit first */
+	res = 0;
+	if (high >= base) {
+		high /= base;
+		res = (uint64_t) high << 32;
+		rem -= (uint64_t) (high*base) << 32;
+	}
+
+	while ((int64_t)b > 0 && b < rem) {
+		b = b+b;
+		d = d+d;
+	}
+
+	do {
+		if (rem >= b) {
+			rem -= b;
+			res += d;
+		}
+		b >>= 1;
+		d >>= 1;
+	} while (d);
+
+	*n = res;
+	return rem;
+}
+#endif /* BITS_PER_LONG == 32 */
+#endif /* do_div */
+#endif /* 2.6.0 => 2.4.6 */
+
+/*****************************************************************************/
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,4) )
+int _kc_scnprintf(char * buf, size_t size, const char *fmt, ...)
+{
+	va_list args;
+	int i;
+
+	va_start(args, fmt);
+	i = vsnprintf(buf, size, fmt, args);
+	va_end(args);
+	return (i >= size) ? (size - 1) : i;
+}
+#endif /* < 2.6.4 */
+
+/*****************************************************************************/
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,10) )
+DECLARE_BITMAP(_kcompat_node_online_map, MAX_NUMNODES) = {1};
+#endif /* < 2.6.10 */
+
+/*****************************************************************************/
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,13) )
+char *_kc_kstrdup(const char *s, unsigned int gfp)
+{
+	size_t len;
+	char *buf;
+
+	if (!s)
+		return NULL;
+
+	len = strlen(s) + 1;
+	buf = kmalloc(len, gfp);
+	if (buf)
+		memcpy(buf, s, len);
+	return buf;
+}
+#endif /* < 2.6.13 */
+
+/*****************************************************************************/
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,14) )
+void *_kc_kzalloc(size_t size, int flags)
+{
+	void *ret = kmalloc(size, flags);
+	if (ret)
+		memset(ret, 0, size);
+	return ret;
+}
+#endif /* <= 2.6.13 */
+
+/*****************************************************************************/
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19) )
+int _kc_skb_pad(struct sk_buff *skb, int pad)
+{
+	int ntail;
+
+        /* If the skbuff is non linear tailroom is always zero.. */
+        if(!skb_cloned(skb) && skb_tailroom(skb) >= pad) {
+		memset(skb->data+skb->len, 0, pad);
+		return 0;
+        }
+
+	ntail = skb->data_len + pad - (skb->end - skb->tail);
+	if (likely(skb_cloned(skb) || ntail > 0)) {
+		if (pskb_expand_head(skb, 0, ntail, GFP_ATOMIC))
+			goto free_skb;
+	}
+
+#ifdef MAX_SKB_FRAGS
+	if (skb_is_nonlinear(skb) &&
+	    !__pskb_pull_tail(skb, skb->data_len))
+		goto free_skb;
+
+#endif
+	memset(skb->data + skb->len, 0, pad);
+        return 0;
+
+free_skb:
+	kfree_skb(skb);
+	return -ENOMEM;
+}
+
+#if (!(RHEL_RELEASE_CODE && RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(5,4)))
+int _kc_pci_save_state(struct pci_dev *pdev)
+{
+	struct adapter_struct *adapter = pci_get_drvdata(pdev);
+	int size = PCI_CONFIG_SPACE_LEN, i;
+	u16 pcie_cap_offset, pcie_link_status;
+
+#if ( LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0) )
+	/* no ->dev for 2.4 kernels */
+	WARN_ON(pdev->dev.driver_data == NULL);
+#endif
+	pcie_cap_offset = pci_find_capability(pdev, PCI_CAP_ID_EXP);
+	if (pcie_cap_offset) {
+		if (!pci_read_config_word(pdev,
+		                          pcie_cap_offset + PCIE_LINK_STATUS,
+		                          &pcie_link_status))
+		size = PCIE_CONFIG_SPACE_LEN;
+	}
+	pci_config_space_ich8lan();
+#ifdef HAVE_PCI_ERS
+	if (adapter->config_space == NULL)
+#else
+	WARN_ON(adapter->config_space != NULL);
+#endif
+		adapter->config_space = kmalloc(size, GFP_KERNEL);
+	if (!adapter->config_space) {
+		printk(KERN_ERR "Out of memory in pci_save_state\n");
+		return -ENOMEM;
+	}
+	for (i = 0; i < (size / 4); i++)
+		pci_read_config_dword(pdev, i * 4, &adapter->config_space[i]);
+	return 0;
+}
+
+void _kc_pci_restore_state(struct pci_dev *pdev)
+{
+	struct adapter_struct *adapter = pci_get_drvdata(pdev);
+	int size = PCI_CONFIG_SPACE_LEN, i;
+	u16 pcie_cap_offset;
+	u16 pcie_link_status;
+
+	if (adapter->config_space != NULL) {
+		pcie_cap_offset = pci_find_capability(pdev, PCI_CAP_ID_EXP);
+		if (pcie_cap_offset &&
+		    !pci_read_config_word(pdev,
+		                          pcie_cap_offset + PCIE_LINK_STATUS,
+		                          &pcie_link_status))
+			size = PCIE_CONFIG_SPACE_LEN;
+
+		pci_config_space_ich8lan();
+		for (i = 0; i < (size / 4); i++)
+		pci_write_config_dword(pdev, i * 4, adapter->config_space[i]);
+#ifndef HAVE_PCI_ERS
+		kfree(adapter->config_space);
+		adapter->config_space = NULL;
+#endif
+	}
+}
+#endif /* !(RHEL_RELEASE_CODE >= RHEL 5.4) */
+
+#ifdef HAVE_PCI_ERS
+void _kc_free_netdev(struct net_device *netdev)
+{
+	struct adapter_struct *adapter = netdev_priv(netdev);
+
+	kfree(adapter->config_space);
+#ifdef CONFIG_SYSFS
+	if (netdev->reg_state == NETREG_UNINITIALIZED) {
+		kfree((char *)netdev - netdev->padded);
+	} else {
+		BUG_ON(netdev->reg_state != NETREG_UNREGISTERED);
+		netdev->reg_state = NETREG_RELEASED;
+		class_device_put(&netdev->class_dev);
+	}
+#else
+	kfree((char *)netdev - netdev->padded);
+#endif
+}
+#endif
+
+void *_kc_kmemdup(const void *src, size_t len, unsigned gfp)
+{
+	void *p;
+
+	p = kzalloc(len, gfp);
+	if (p)
+		memcpy(p, src, len);
+	return p;
+}
+#endif /* <= 2.6.19 */
+
+/*****************************************************************************/
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21) )
+struct pci_dev *_kc_netdev_to_pdev(struct net_device *netdev)
+{
+	return ((struct adapter_struct *)netdev_priv(netdev))->pdev;
+}
+#endif /* < 2.6.21 */
+
+/*****************************************************************************/
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,22) )
+/* hexdump code taken from lib/hexdump.c */
+static void _kc_hex_dump_to_buffer(const void *buf, size_t len, int rowsize,
+			int groupsize, unsigned char *linebuf,
+			size_t linebuflen, bool ascii)
+{
+	const u8 *ptr = buf;
+	u8 ch;
+	int j, lx = 0;
+	int ascii_column;
+
+	if (rowsize != 16 && rowsize != 32)
+		rowsize = 16;
+
+	if (!len)
+		goto nil;
+	if (len > rowsize)		/* limit to one line at a time */
+		len = rowsize;
+	if ((len % groupsize) != 0)	/* no mixed size output */
+		groupsize = 1;
+
+	switch (groupsize) {
+	case 8: {
+		const u64 *ptr8 = buf;
+		int ngroups = len / groupsize;
+
+		for (j = 0; j < ngroups; j++)
+			lx += scnprintf((char *)(linebuf + lx), linebuflen - lx,
+				"%s%16.16llx", j ? " " : "",
+				(unsigned long long)*(ptr8 + j));
+		ascii_column = 17 * ngroups + 2;
+		break;
+	}
+
+	case 4: {
+		const u32 *ptr4 = buf;
+		int ngroups = len / groupsize;
+
+		for (j = 0; j < ngroups; j++)
+			lx += scnprintf((char *)(linebuf + lx), linebuflen - lx,
+				"%s%8.8x", j ? " " : "", *(ptr4 + j));
+		ascii_column = 9 * ngroups + 2;
+		break;
+	}
+
+	case 2: {
+		const u16 *ptr2 = buf;
+		int ngroups = len / groupsize;
+
+		for (j = 0; j < ngroups; j++)
+			lx += scnprintf((char *)(linebuf + lx), linebuflen - lx,
+				"%s%4.4x", j ? " " : "", *(ptr2 + j));
+		ascii_column = 5 * ngroups + 2;
+		break;
+	}
+
+	default:
+		for (j = 0; (j < len) && (lx + 3) <= linebuflen; j++) {
+			ch = ptr[j];
+			linebuf[lx++] = hex_asc(ch >> 4);
+			linebuf[lx++] = hex_asc(ch & 0x0f);
+			linebuf[lx++] = ' ';
+		}
+		if (j)
+			lx--;
+
+		ascii_column = 3 * rowsize + 2;
+		break;
+	}
+	if (!ascii)
+		goto nil;
+
+	while (lx < (linebuflen - 1) && lx < (ascii_column - 1))
+		linebuf[lx++] = ' ';
+	for (j = 0; (j < len) && (lx + 2) < linebuflen; j++)
+		linebuf[lx++] = (isascii(ptr[j]) && isprint(ptr[j])) ? ptr[j]
+				: '.';
+nil:
+	linebuf[lx++] = '\0';
+}
+
+void _kc_print_hex_dump(const char *level,
+			const char *prefix_str, int prefix_type,
+			int rowsize, int groupsize,
+			const void *buf, size_t len, bool ascii)
+{
+	const u8 *ptr = buf;
+	int i, linelen, remaining = len;
+	unsigned char linebuf[200];
+
+	if (rowsize != 16 && rowsize != 32)
+		rowsize = 16;
+
+	for (i = 0; i < len; i += rowsize) {
+		linelen = min(remaining, rowsize);
+		remaining -= rowsize;
+		_kc_hex_dump_to_buffer(ptr + i, linelen, rowsize, groupsize,
+				linebuf, sizeof(linebuf), ascii);
+
+		switch (prefix_type) {
+		case DUMP_PREFIX_ADDRESS:
+			printk("%s%s%*p: %s\n", level, prefix_str,
+				(int)(2 * sizeof(void *)), ptr + i, linebuf);
+			break;
+		case DUMP_PREFIX_OFFSET:
+			printk("%s%s%.8x: %s\n", level, prefix_str, i, linebuf);
+			break;
+		default:
+			printk("%s%s%s\n", level, prefix_str, linebuf);
+			break;
+		}
+	}
+}
+
+#endif /* < 2.6.22 */
+
+/*****************************************************************************/
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24) )
+#ifdef NAPI
+struct net_device *napi_to_poll_dev(const struct napi_struct *napi)
+{
+	struct adapter_q_vector *q_vector = container_of(napi,
+	                                                struct adapter_q_vector,
+	                                                napi);
+	return &q_vector->poll_dev;
+}
+
+int __kc_adapter_clean(struct net_device *netdev, int *budget)
+{
+	int work_done;
+	int work_to_do = min(*budget, netdev->quota);
+	/* kcompat.h netif_napi_add puts napi struct in "fake netdev->priv" */
+	struct napi_struct *napi = netdev->priv;
+	work_done = napi->poll(napi, work_to_do);
+	*budget -= work_done;
+	netdev->quota -= work_done;
+	return (work_done >= work_to_do) ? 1 : 0;
+}
+#endif /* NAPI */
+#endif /* <= 2.6.24 */
+
+/*****************************************************************************/
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,26) )
+void _kc_pci_disable_link_state(struct pci_dev *pdev, int state)
+{
+	struct pci_dev *parent = pdev->bus->self;
+	u16 link_state;
+	int pos;
+
+	if (!parent)
+		return;
+
+	pos = pci_find_capability(parent, PCI_CAP_ID_EXP);
+	if (pos) {
+		pci_read_config_word(parent, pos + PCI_EXP_LNKCTL, &link_state);
+		link_state &= ~state;
+		pci_write_config_word(parent, pos + PCI_EXP_LNKCTL, link_state);
+	}
+}
+#endif /* < 2.6.26 */
+
+/*****************************************************************************/
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,27) )
+#ifdef HAVE_TX_MQ
+void _kc_netif_tx_stop_all_queues(struct net_device *netdev)
+{
+	struct adapter_struct *adapter = netdev_priv(netdev);
+	int i;
+
+	netif_stop_queue(netdev);
+	if (netif_is_multiqueue(netdev))
+		for (i = 0; i < adapter->num_tx_queues; i++)
+			netif_stop_subqueue(netdev, i);
+}
+void _kc_netif_tx_wake_all_queues(struct net_device *netdev)
+{
+	struct adapter_struct *adapter = netdev_priv(netdev);
+	int i;
+
+	netif_wake_queue(netdev);
+	if (netif_is_multiqueue(netdev))
+		for (i = 0; i < adapter->num_tx_queues; i++)
+			netif_wake_subqueue(netdev, i);
+}
+void _kc_netif_tx_start_all_queues(struct net_device *netdev)
+{
+	struct adapter_struct *adapter = netdev_priv(netdev);
+	int i;
+
+	netif_start_queue(netdev);
+	if (netif_is_multiqueue(netdev))
+		for (i = 0; i < adapter->num_tx_queues; i++)
+			netif_start_subqueue(netdev, i);
+}
+#endif /* HAVE_TX_MQ */
+
+void __kc_warn_slowpath(const char *file, int line, const char *fmt, ...)
+{
+	va_list args;
+
+	printk(KERN_WARNING "------------[ cut here ]------------\n");
+	printk(KERN_WARNING "WARNING: at %s:%d \n", file, line);
+	va_start(args, fmt);
+	vprintk(fmt, args);
+	va_end(args);
+
+	dump_stack();
+}
+#endif /* __VMKLNX__ */
+
+/*****************************************************************************/
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,28) )
+
+int
+_kc_pci_prepare_to_sleep(struct pci_dev *dev)
+{
+	pci_power_t target_state;
+	int error;
+
+	target_state = pci_choose_state(dev, PMSG_SUSPEND);
+
+	pci_enable_wake(dev, target_state, true);
+
+	error = pci_set_power_state(dev, target_state);
+
+	if (error)
+		pci_enable_wake(dev, target_state, false);
+
+	return error;
+}
+
+int
+_kc_pci_wake_from_d3(struct pci_dev *dev, bool enable)
+{
+	int err;
+
+	err = pci_enable_wake(dev, PCI_D3cold, enable);
+	if (err)
+		goto out;
+
+	err = pci_enable_wake(dev, PCI_D3hot, enable);
+
+out:
+	return err;
+}
+#endif /* < 2.6.28 */
+
+/*****************************************************************************/
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,29) )
+static void __kc_pci_set_master(struct pci_dev *pdev, bool enable)
+{
+	u16 old_cmd, cmd;
+
+	pci_read_config_word(pdev, PCI_COMMAND, &old_cmd);
+	if (enable)
+		cmd = old_cmd | PCI_COMMAND_MASTER;
+	else
+		cmd = old_cmd & ~PCI_COMMAND_MASTER;
+	if (cmd != old_cmd) {
+		dev_dbg(pci_dev_to_dev(pdev), "%s bus mastering\n",
+			enable ? "enabling" : "disabling");
+		pci_write_config_word(pdev, PCI_COMMAND, cmd);
+	}
+#if ( LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,7) )
+	pdev->is_busmaster = enable;
+#endif
+}
+
+void _kc_pci_clear_master(struct pci_dev *dev)
+{
+	__kc_pci_set_master(dev, false);
+}
+#endif /* < 2.6.29 */
+
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,34) )
+#if (RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(6,0))
+int _kc_pci_num_vf(struct pci_dev __maybe_unused *dev)
+{
+	int num_vf = 0;
+#ifdef CONFIG_PCI_IOV
+	struct pci_dev *vfdev;
+
+	/* loop through all ethernet devices starting at PF dev */
+	vfdev = pci_get_class(PCI_CLASS_NETWORK_ETHERNET << 8, NULL);
+	while (vfdev) {
+		if (vfdev->is_virtfn && vfdev->physfn == dev)
+			num_vf++;
+
+		vfdev = pci_get_class(PCI_CLASS_NETWORK_ETHERNET << 8, vfdev);
+	}
+
+#endif
+	return num_vf;
+}
+#endif /* RHEL_RELEASE_CODE */
+#endif /* < 2.6.34 */
+
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,35) )
+#ifdef HAVE_TX_MQ
+#if (!(RHEL_RELEASE_CODE && RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(6,0)))
+#ifndef CONFIG_NETDEVICES_MULTIQUEUE
+int _kc_netif_set_real_num_tx_queues(struct net_device *dev, unsigned int txq)
+{
+	unsigned int real_num = dev->real_num_tx_queues;
+	struct Qdisc *qdisc;
+	int i;
+
+	if (txq < 1 || txq > dev->num_tx_queues)
+		return -EINVAL;
+
+	else if (txq > real_num)
+		dev->real_num_tx_queues = txq;
+	else if (txq < real_num) {
+		dev->real_num_tx_queues = txq;
+		for (i = txq; i < dev->num_tx_queues; i++) {
+			qdisc = netdev_get_tx_queue(dev, i)->qdisc;
+			if (qdisc) {
+				spin_lock_bh(qdisc_lock(qdisc));
+				qdisc_reset(qdisc);
+				spin_unlock_bh(qdisc_lock(qdisc));
+			}
+		}
+	}
+
+	return 0;
+}
+#endif /* CONFIG_NETDEVICES_MULTIQUEUE */
+#endif /* !(RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(6,0)) */
+#endif /* HAVE_TX_MQ */
+
+ssize_t _kc_simple_write_to_buffer(void *to, size_t available, loff_t *ppos,
+				   const void __user *from, size_t count)
+{
+        loff_t pos = *ppos;
+        size_t res;
+
+        if (pos < 0)
+                return -EINVAL;
+        if (pos >= available || !count)
+                return 0;
+        if (count > available - pos)
+                count = available - pos;
+        res = copy_from_user(to + pos, from, count);
+        if (res == count)
+                return -EFAULT;
+        count -= res;
+        *ppos = pos + count;
+        return count;
+}
+
+#endif /* < 2.6.35 */
+
+/*****************************************************************************/
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,36) )
+static const u32 _kc_flags_dup_features =
+	(ETH_FLAG_LRO | ETH_FLAG_NTUPLE | ETH_FLAG_RXHASH);
+
+u32 _kc_ethtool_op_get_flags(struct net_device *dev)
+{
+	return dev->features & _kc_flags_dup_features;
+}
+
+int _kc_ethtool_op_set_flags(struct net_device *dev, u32 data, u32 supported)
+{
+	if (data & ~supported)
+		return -EINVAL;
+
+	dev->features = ((dev->features & ~_kc_flags_dup_features) |
+			 (data & _kc_flags_dup_features));
+	return 0;
+}
+#endif /* < 2.6.36 */
+
+/******************************************************************************/
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,39) )
+#if (!(RHEL_RELEASE_CODE && RHEL_RELEASE_CODE > RHEL_RELEASE_VERSION(6,0)))
+#ifdef HAVE_NETDEV_SELECT_QUEUE
+#include <net/ip.h>
+#include <linux/pkt_sched.h>
+
+u16 ___kc_skb_tx_hash(struct net_device *dev, const struct sk_buff *skb,
+		      u16 num_tx_queues)
+{
+	u32 hash;
+	u16 qoffset = 0;
+	u16 qcount = num_tx_queues;
+
+	if (skb_rx_queue_recorded(skb)) {
+		hash = skb_get_rx_queue(skb);
+		while (unlikely(hash >= num_tx_queues))
+			hash -= num_tx_queues;
+		return hash;
+	}
+
+	if (skb->sk && skb->sk->sk_hash)
+		hash = skb->sk->sk_hash;
+	else
+#ifdef NETIF_F_RXHASH
+		hash = (__force u16) skb->protocol ^ skb->rxhash;
+#else
+		hash = skb->protocol;
+#endif
+
+	hash = jhash_1word(hash, _kc_hashrnd);
+
+	return (u16) (((u64) hash * qcount) >> 32) + qoffset;
+}
+#endif /* HAVE_NETDEV_SELECT_QUEUE */
+
+u8 _kc_netdev_get_num_tc(struct net_device *dev)
+{
+	return 0;
+}
+
+int _kc_netdev_set_num_tc(struct net_device *dev, u8 num_tc)
+{
+	return -EINVAL;
+}
+
+u8 _kc_netdev_get_prio_tc_map(struct net_device *dev, u8 up)
+{
+	return 0;
+}
+
+#endif /* !(RHEL_RELEASE_CODE > RHEL_RELEASE_VERSION(6,0)) */
+#endif /* < 2.6.39 */
+
+/******************************************************************************/
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(3,4,0) )
+void _kc_skb_add_rx_frag(struct sk_buff *skb, int i, struct page *page,
+			 int off, int size, unsigned int truesize)
+{
+	skb_fill_page_desc(skb, i, page, off, size);
+	skb->len += size;
+	skb->data_len += size;
+	skb->truesize += truesize;
+}
+
+#if !(SLE_VERSION_CODE && SLE_VERSION_CODE >= SLE_VERSION(11,3,0))
+int _kc_simple_open(struct inode *inode, struct file *file)
+{
+        if (inode->i_private)
+                file->private_data = inode->i_private;
+
+        return 0;
+}
+#endif /* SLE_VERSION < 11,3,0 */
+
+#endif /* < 3.4.0 */
+
+/******************************************************************************/
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(3,7,0) )
+static inline int __kc_pcie_cap_version(struct pci_dev *dev)
+{
+	int pos;
+	u16 reg16;
+
+	pos = pci_find_capability(dev, PCI_CAP_ID_EXP);
+	if (!pos)
+		return 0;
+	pci_read_config_word(dev, pos + PCI_EXP_FLAGS, &reg16);
+	return reg16 & PCI_EXP_FLAGS_VERS;
+}
+
+static inline bool __kc_pcie_cap_has_devctl(const struct pci_dev __always_unused *dev)
+{
+	return true;
+}
+
+static inline bool __kc_pcie_cap_has_lnkctl(struct pci_dev *dev)
+{
+	int type = pci_pcie_type(dev);
+
+	return __kc_pcie_cap_version(dev) > 1 ||
+	       type == PCI_EXP_TYPE_ROOT_PORT ||
+	       type == PCI_EXP_TYPE_ENDPOINT ||
+	       type == PCI_EXP_TYPE_LEG_END;
+}
+
+static inline bool __kc_pcie_cap_has_sltctl(struct pci_dev *dev)
+{
+	int type = pci_pcie_type(dev);
+	int pos;
+	u16 pcie_flags_reg;
+
+	pos = pci_find_capability(dev, PCI_CAP_ID_EXP);
+	if (!pos)
+		return false;
+	pci_read_config_word(dev, pos + PCI_EXP_FLAGS, &pcie_flags_reg);
+
+	return __kc_pcie_cap_version(dev) > 1 ||
+	       type == PCI_EXP_TYPE_ROOT_PORT ||
+	       (type == PCI_EXP_TYPE_DOWNSTREAM &&
+		pcie_flags_reg & PCI_EXP_FLAGS_SLOT);
+}
+
+static inline bool __kc_pcie_cap_has_rtctl(struct pci_dev *dev)
+{
+	int type = pci_pcie_type(dev);
+
+	return __kc_pcie_cap_version(dev) > 1 ||
+	       type == PCI_EXP_TYPE_ROOT_PORT ||
+	       type == PCI_EXP_TYPE_RC_EC;
+}
+
+static bool __kc_pcie_capability_reg_implemented(struct pci_dev *dev, int pos)
+{
+	if (!pci_is_pcie(dev))
+		return false;
+
+	switch (pos) {
+	case PCI_EXP_FLAGS_TYPE:
+		return true;
+	case PCI_EXP_DEVCAP:
+	case PCI_EXP_DEVCTL:
+	case PCI_EXP_DEVSTA:
+		return __kc_pcie_cap_has_devctl(dev);
+	case PCI_EXP_LNKCAP:
+	case PCI_EXP_LNKCTL:
+	case PCI_EXP_LNKSTA:
+		return __kc_pcie_cap_has_lnkctl(dev);
+	case PCI_EXP_SLTCAP:
+	case PCI_EXP_SLTCTL:
+	case PCI_EXP_SLTSTA:
+		return __kc_pcie_cap_has_sltctl(dev);
+	case PCI_EXP_RTCTL:
+	case PCI_EXP_RTCAP:
+	case PCI_EXP_RTSTA:
+		return __kc_pcie_cap_has_rtctl(dev);
+	case PCI_EXP_DEVCAP2:
+	case PCI_EXP_DEVCTL2:
+	case PCI_EXP_LNKCAP2:
+	case PCI_EXP_LNKCTL2:
+	case PCI_EXP_LNKSTA2:
+		return __kc_pcie_cap_version(dev) > 1;
+	default:
+		return false;
+	}
+}
+
+/*
+ * Note that these accessor functions are only for the "PCI Express
+ * Capability" (see PCIe spec r3.0, sec 7.8).  They do not apply to the
+ * other "PCI Express Extended Capabilities" (AER, VC, ACS, MFVC, etc.)
+ */
+int __kc_pcie_capability_read_word(struct pci_dev *dev, int pos, u16 *val)
+{
+	int ret;
+
+	*val = 0;
+	if (pos & 1)
+		return -EINVAL;
+
+	if (__kc_pcie_capability_reg_implemented(dev, pos)) {
+		ret = pci_read_config_word(dev, pci_pcie_cap(dev) + pos, val);
+		/*
+		 * Reset *val to 0 if pci_read_config_word() fails, it may
+		 * have been written as 0xFFFF if hardware error happens
+		 * during pci_read_config_word().
+		 */
+		if (ret)
+			*val = 0;
+		return ret;
+	}
+
+	/*
+	 * For Functions that do not implement the Slot Capabilities,
+	 * Slot Status, and Slot Control registers, these spaces must
+	 * be hardwired to 0b, with the exception of the Presence Detect
+	 * State bit in the Slot Status register of Downstream Ports,
+	 * which must be hardwired to 1b.  (PCIe Base Spec 3.0, sec 7.8)
+	 */
+	if (pci_is_pcie(dev) && pos == PCI_EXP_SLTSTA &&
+	    pci_pcie_type(dev) == PCI_EXP_TYPE_DOWNSTREAM) {
+		*val = PCI_EXP_SLTSTA_PDS;
+	}
+
+	return 0;
+}
+
+int __kc_pcie_capability_read_dword(struct pci_dev *dev, int pos, u32 *val)
+{
+	int ret;
+
+	*val = 0;
+	if (pos & 3)
+		return -EINVAL;
+
+	if (__kc_pcie_capability_reg_implemented(dev, pos)) {
+		ret = pci_read_config_dword(dev, pci_pcie_cap(dev) + pos, val);
+		/*
+		 * Reset *val to 0 if pci_read_config_dword() fails, it may
+		 * have been written as 0xFFFFFFFF if hardware error happens
+		 * during pci_read_config_dword().
+		 */
+		if (ret)
+			*val = 0;
+		return ret;
+	}
+
+	if (pci_is_pcie(dev) && pos == PCI_EXP_SLTSTA &&
+	    pci_pcie_type(dev) == PCI_EXP_TYPE_DOWNSTREAM) {
+		*val = PCI_EXP_SLTSTA_PDS;
+	}
+
+	return 0;
+}
+
+int __kc_pcie_capability_write_word(struct pci_dev *dev, int pos, u16 val)
+{
+	if (pos & 1)
+		return -EINVAL;
+
+	if (!__kc_pcie_capability_reg_implemented(dev, pos))
+		return 0;
+
+	return pci_write_config_word(dev, pci_pcie_cap(dev) + pos, val);
+}
+
+int __kc_pcie_capability_clear_and_set_word(struct pci_dev *dev, int pos,
+					    u16 clear, u16 set)
+{
+	int ret;
+	u16 val;
+
+	ret = __kc_pcie_capability_read_word(dev, pos, &val);
+	if (!ret) {
+		val &= ~clear;
+		val |= set;
+		ret = __kc_pcie_capability_write_word(dev, pos, val);
+	}
+
+	return ret;
+}
+
+int __kc_pcie_capability_clear_word(struct pci_dev *dev, int pos,
+					     u16 clear)
+{
+	return __kc_pcie_capability_clear_and_set_word(dev, pos, clear, 0);
+}
+#endif /* < 3.7.0 */
+
+/******************************************************************************/
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(3,9,0) )
+#ifdef CONFIG_XPS
+#if NR_CPUS < 64
+#define _KC_MAX_XPS_CPUS	NR_CPUS
+#else
+#define _KC_MAX_XPS_CPUS	64
+#endif
+
+/*
+ * netdev_queue sysfs structures and functions.
+ */
+struct _kc_netdev_queue_attribute {
+	struct attribute attr;
+	ssize_t (*show)(struct netdev_queue *queue,
+	    struct _kc_netdev_queue_attribute *attr, char *buf);
+	ssize_t (*store)(struct netdev_queue *queue,
+	    struct _kc_netdev_queue_attribute *attr, const char *buf, size_t len);
+};
+
+#define to_kc_netdev_queue_attr(_attr) container_of(_attr,		\
+    struct _kc_netdev_queue_attribute, attr)
+
+int __kc_netif_set_xps_queue(struct net_device *dev, const struct cpumask *mask,
+			     u16 index)
+{
+	struct netdev_queue *txq = netdev_get_tx_queue(dev, index);
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,38) )
+	/* Redhat requires some odd extended netdev structures */
+	struct netdev_tx_queue_extended *txq_ext =
+					netdev_extended(dev)->_tx_ext + index;
+	struct kobj_type *ktype = txq_ext->kobj.ktype;
+#else
+	struct kobj_type *ktype = txq->kobj.ktype;
+#endif
+	struct _kc_netdev_queue_attribute *xps_attr;
+	struct attribute *attr = NULL;
+	int i, len, err;
+#define _KC_XPS_BUFLEN	(DIV_ROUND_UP(_KC_MAX_XPS_CPUS, 32) * 9)
+	char buf[_KC_XPS_BUFLEN];
+
+	if (!ktype)
+		return -ENOMEM;
+
+	/* attempt to locate the XPS attribute in the Tx queue */
+	for (i = 0; (attr = ktype->default_attrs[i]); i++) {
+		if (!strcmp("xps_cpus", attr->name))
+			break;
+	}
+
+	/* if we did not find it return an error */
+	if (!attr)
+		return -EINVAL;
+
+	/* copy the mask into a string */
+	len = bitmap_scnprintf(buf, _KC_XPS_BUFLEN,
+			       cpumask_bits(mask), _KC_MAX_XPS_CPUS);
+	if (!len)
+		return -ENOMEM;
+
+	xps_attr = to_kc_netdev_queue_attr(attr);
+
+	/* Store the XPS value using the SYSFS store call */
+	err = xps_attr->store(txq, xps_attr, buf, len);
+
+	/* we only had an error on err < 0 */
+	return (err < 0) ? err : 0;
+}
+#endif /* CONFIG_XPS */
+#ifdef HAVE_NETDEV_SELECT_QUEUE
+static inline int kc_get_xps_queue(struct net_device *dev, struct sk_buff *skb)
+{
+#ifdef CONFIG_XPS
+	struct xps_dev_maps *dev_maps;
+	struct xps_map *map;
+	int queue_index = -1;
+
+	rcu_read_lock();
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,38) )
+	/* Redhat requires some odd extended netdev structures */
+	dev_maps = rcu_dereference(netdev_extended(dev)->xps_maps);
+#else
+	dev_maps = rcu_dereference(dev->xps_maps);
+#endif
+	if (dev_maps) {
+		map = rcu_dereference(
+		    dev_maps->cpu_map[raw_smp_processor_id()]);
+		if (map) {
+			if (map->len == 1)
+				queue_index = map->queues[0];
+			else {
+				u32 hash;
+				if (skb->sk && skb->sk->sk_hash)
+					hash = skb->sk->sk_hash;
+				else
+					hash = (__force u16) skb->protocol ^
+					    skb->rxhash;
+				hash = jhash_1word(hash, _kc_hashrnd);
+				queue_index = map->queues[
+				    ((u64)hash * map->len) >> 32];
+			}
+			if (unlikely(queue_index >= dev->real_num_tx_queues))
+				queue_index = -1;
+		}
+	}
+	rcu_read_unlock();
+
+	return queue_index;
+#else
+	return -1;
+#endif
+}
+
+u16 __kc_netdev_pick_tx(struct net_device *dev, struct sk_buff *skb)
+{
+	struct sock *sk = skb->sk;
+	int queue_index = sk_tx_queue_get(sk);
+	int new_index;
+
+	if (queue_index >= 0 && queue_index < dev->real_num_tx_queues) {
+#ifdef CONFIG_XPS
+		if (!skb->ooo_okay)
+#endif
+			return queue_index;
+	}
+
+	new_index = kc_get_xps_queue(dev, skb);
+	if (new_index < 0)
+		new_index = skb_tx_hash(dev, skb);
+
+	if (queue_index != new_index && sk) {
+		struct dst_entry *dst =
+			    rcu_dereference(sk->sk_dst_cache);
+
+		if (dst && skb_dst(skb) == dst)
+			sk_tx_queue_set(sk, new_index);
+
+	}
+
+	return new_index;
+}
+
+#endif /* HAVE_NETDEV_SELECT_QUEUE */
+#endif /* 3.9.0 */
+
+/*****************************************************************************/
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(3,10,0) )
+#ifdef HAVE_FDB_OPS
+#ifdef USE_CONST_DEV_UC_CHAR
+int __kc_ndo_dflt_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
+			  struct net_device *dev, const unsigned char *addr,
+			  u16 flags)
+#else
+int __kc_ndo_dflt_fdb_add(struct ndmsg *ndm, struct net_device *dev,
+			  unsigned char *addr, u16 flags)
+#endif
+{
+	int err = -EINVAL;
+
+	/* If aging addresses are supported device will need to
+	 * implement its own handler for this.
+	 */
+	if (ndm->ndm_state && !(ndm->ndm_state & NUD_PERMANENT)) {
+		pr_info("%s: FDB only supports static addresses\n", dev->name);
+		return err;
+	}
+
+	if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr))
+		err = dev_uc_add_excl(dev, addr);
+	else if (is_multicast_ether_addr(addr))
+		err = dev_mc_add_excl(dev, addr);
+
+	/* Only return duplicate errors if NLM_F_EXCL is set */
+	if (err == -EEXIST && !(flags & NLM_F_EXCL))
+		err = 0;
+
+	return err;
+}
+
+#ifdef USE_CONST_DEV_UC_CHAR
+#ifdef HAVE_FDB_DEL_NLATTR
+int __kc_ndo_dflt_fdb_del(struct ndmsg *ndm, struct nlattr *tb[],
+			  struct net_device *dev, const unsigned char *addr)
+#else
+int __kc_ndo_dflt_fdb_del(struct ndmsg *ndm, struct net_device *dev,
+			  const unsigned char *addr)
+#endif
+#else
+int __kc_ndo_dflt_fdb_del(struct ndmsg *ndm, struct net_device *dev,
+			  unsigned char *addr)
+#endif
+{
+	int err = -EINVAL;
+
+	/* If aging addresses are supported device will need to
+	 * implement its own handler for this.
+	 */
+	if (!(ndm->ndm_state & NUD_PERMANENT)) {
+		pr_info("%s: FDB only supports static addresses\n", dev->name);
+		return err;
+	}
+
+	if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr))
+		err = dev_uc_del(dev, addr);
+	else if (is_multicast_ether_addr(addr))
+		err = dev_mc_del(dev, addr);
+
+	return err;
+}
+
+#endif /* HAVE_FDB_OPS */
+#ifdef CONFIG_PCI_IOV
+int __kc_pci_vfs_assigned(struct pci_dev __maybe_unused *dev)
+{
+	unsigned int vfs_assigned = 0;
+#ifdef HAVE_PCI_DEV_FLAGS_ASSIGNED
+	int pos;
+	struct pci_dev *vfdev;
+	unsigned short dev_id;
+
+	/* only search if we are a PF */
+	if (!dev->is_physfn)
+		return 0;
+
+	/* find SR-IOV capability */
+	pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_SRIOV);
+	if (!pos)
+		return 0;
+
+	/*
+	 * determine the device ID for the VFs, the vendor ID will be the
+	 * same as the PF so there is no need to check for that one
+	 */
+	pci_read_config_word(dev, pos + PCI_SRIOV_VF_DID, &dev_id);
+
+	/* loop through all the VFs to see if we own any that are assigned */
+	vfdev = pci_get_device(dev->vendor, dev_id, NULL);
+	while (vfdev) {
+		/*
+		 * It is considered assigned if it is a virtual function with
+		 * our dev as the physical function and the assigned bit is set
+		 */
+		if (vfdev->is_virtfn && (vfdev->physfn == dev) &&
+		    (vfdev->dev_flags & PCI_DEV_FLAGS_ASSIGNED))
+			vfs_assigned++;
+
+		vfdev = pci_get_device(dev->vendor, dev_id, vfdev);
+	}
+
+#endif /* HAVE_PCI_DEV_FLAGS_ASSIGNED */
+	return vfs_assigned;
+}
+
+#endif /* CONFIG_PCI_IOV */
+#endif /* 3.10.0 */
+
+static const unsigned char __maybe_unused pcie_link_speed[] = {
+	PCI_SPEED_UNKNOWN,      /* 0 */
+	PCIE_SPEED_2_5GT,       /* 1 */
+	PCIE_SPEED_5_0GT,       /* 2 */
+	PCIE_SPEED_8_0GT,       /* 3 */
+	PCIE_SPEED_16_0GT,      /* 4 */
+	PCI_SPEED_UNKNOWN,      /* 5 */
+	PCI_SPEED_UNKNOWN,      /* 6 */
+	PCI_SPEED_UNKNOWN,      /* 7 */
+	PCI_SPEED_UNKNOWN,      /* 8 */
+	PCI_SPEED_UNKNOWN,      /* 9 */
+	PCI_SPEED_UNKNOWN,      /* A */
+	PCI_SPEED_UNKNOWN,      /* B */
+	PCI_SPEED_UNKNOWN,      /* C */
+	PCI_SPEED_UNKNOWN,      /* D */
+	PCI_SPEED_UNKNOWN,      /* E */
+	PCI_SPEED_UNKNOWN       /* F */
+};
+
+/*****************************************************************************/
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(3,12,0) )
+int __kc_pcie_get_minimum_link(struct pci_dev *dev, enum pci_bus_speed *speed,
+			       enum pcie_link_width *width)
+{
+	int ret;
+
+	*speed = PCI_SPEED_UNKNOWN;
+	*width = PCIE_LNK_WIDTH_UNKNOWN;
+
+	while (dev) {
+		u16 lnksta;
+		enum pci_bus_speed next_speed;
+		enum pcie_link_width next_width;
+
+		ret = pcie_capability_read_word(dev, PCI_EXP_LNKSTA, &lnksta);
+		if (ret)
+			return ret;
+
+		next_speed = pcie_link_speed[lnksta & PCI_EXP_LNKSTA_CLS];
+		next_width = (lnksta & PCI_EXP_LNKSTA_NLW) >>
+			PCI_EXP_LNKSTA_NLW_SHIFT;
+
+		if (next_speed < *speed)
+			*speed = next_speed;
+
+		if (next_width < *width)
+			*width = next_width;
+
+		dev = dev->bus->self;
+	}
+
+	return 0;
+}
+
+#endif
+
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(3,13,0) )
+int __kc_dma_set_mask_and_coherent(struct device *dev, u64 mask)
+{
+	int err = dma_set_mask(dev, mask);
+
+	if (!err)
+		/* coherent mask for the same size will always succeed if
+		 * dma_set_mask does. However we store the error anyways, due
+		 * to some kernels which use gcc's warn_unused_result on their
+		 * definition of dma_set_coherent_mask.
+		 */
+		err = dma_set_coherent_mask(dev, mask);
+	return err;
+}
+#endif /* 3.13.0 */
+
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(3,14,0) )
+/******************************************************************************
+ * ripped from linux/net/ipv6/exthdrs_core.c, GPL2, no direct copyright,
+ * inferred copyright from kernel
+ */
+int __kc_ipv6_find_hdr(const struct sk_buff *skb, unsigned int *offset,
+		       int target, unsigned short *fragoff, int *flags)
+{
+	unsigned int start = skb_network_offset(skb) + sizeof(struct ipv6hdr);
+	u8 nexthdr = ipv6_hdr(skb)->nexthdr;
+	unsigned int len;
+	bool found;
+
+#define __KC_IP6_FH_F_FRAG	BIT(0)
+#define __KC_IP6_FH_F_AUTH	BIT(1)
+#define __KC_IP6_FH_F_SKIP_RH	BIT(2)
+
+	if (fragoff)
+		*fragoff = 0;
+
+	if (*offset) {
+		struct ipv6hdr _ip6, *ip6;
+
+		ip6 = skb_header_pointer(skb, *offset, sizeof(_ip6), &_ip6);
+		if (!ip6 || (ip6->version != 6)) {
+			printk(KERN_ERR "IPv6 header not found\n");
+			return -EBADMSG;
+		}
+		start = *offset + sizeof(struct ipv6hdr);
+		nexthdr = ip6->nexthdr;
+	}
+	len = skb->len - start;
+
+	do {
+		struct ipv6_opt_hdr _hdr, *hp;
+		unsigned int hdrlen;
+		found = (nexthdr == target);
+
+		if ((!ipv6_ext_hdr(nexthdr)) || nexthdr == NEXTHDR_NONE) {
+			if (target < 0 || found)
+				break;
+			return -ENOENT;
+		}
+
+		hp = skb_header_pointer(skb, start, sizeof(_hdr), &_hdr);
+		if (!hp)
+			return -EBADMSG;
+
+		if (nexthdr == NEXTHDR_ROUTING) {
+			struct ipv6_rt_hdr _rh, *rh;
+
+			rh = skb_header_pointer(skb, start, sizeof(_rh),
+						&_rh);
+			if (!rh)
+				return -EBADMSG;
+
+			if (flags && (*flags & __KC_IP6_FH_F_SKIP_RH) &&
+			    rh->segments_left == 0)
+				found = false;
+		}
+
+		if (nexthdr == NEXTHDR_FRAGMENT) {
+			unsigned short _frag_off;
+			__be16 *fp;
+
+			if (flags)	/* Indicate that this is a fragment */
+				*flags |= __KC_IP6_FH_F_FRAG;
+			fp = skb_header_pointer(skb,
+						start+offsetof(struct frag_hdr,
+							       frag_off),
+						sizeof(_frag_off),
+						&_frag_off);
+			if (!fp)
+				return -EBADMSG;
+
+			_frag_off = ntohs(*fp) & ~0x7;
+			if (_frag_off) {
+				if (target < 0 &&
+				    ((!ipv6_ext_hdr(hp->nexthdr)) ||
+				     hp->nexthdr == NEXTHDR_NONE)) {
+					if (fragoff)
+						*fragoff = _frag_off;
+					return hp->nexthdr;
+				}
+				return -ENOENT;
+			}
+			hdrlen = 8;
+		} else if (nexthdr == NEXTHDR_AUTH) {
+			if (flags && (*flags & __KC_IP6_FH_F_AUTH) && (target < 0))
+				break;
+			hdrlen = (hp->hdrlen + 2) << 2;
+		} else
+			hdrlen = ipv6_optlen(hp);
+
+		if (!found) {
+			nexthdr = hp->nexthdr;
+			len -= hdrlen;
+			start += hdrlen;
+		}
+	} while (!found);
+
+	*offset = start;
+	return nexthdr;
+}
+
+int __kc_pci_enable_msix_range(struct pci_dev *dev, struct msix_entry *entries,
+			       int minvec, int maxvec)
+{
+        int nvec = maxvec;
+        int rc;
+
+        if (maxvec < minvec)
+                return -ERANGE;
+
+        do {
+                rc = pci_enable_msix(dev, entries, nvec);
+                if (rc < 0) {
+                        return rc;
+                } else if (rc > 0) {
+                        if (rc < minvec)
+                                return -ENOSPC;
+                        nvec = rc;
+                }
+        } while (rc);
+
+        return nvec;
+}
+#endif /* 3.14.0 */
+
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,15,0))
+char *_kc_devm_kstrdup(struct device *dev, const char *s, gfp_t gfp)
+{
+	size_t size;
+	char *buf;
+
+	if (!s)
+		return NULL;
+
+	size = strlen(s) + 1;
+	buf = devm_kzalloc(dev, size, gfp);
+	if (buf)
+		memcpy(buf, s, size);
+	return buf;
+}
+
+void __kc_netdev_rss_key_fill(void *buffer, size_t len)
+{
+	/* Set of random keys generated using kernel random number generator */
+	static const u8 seed[NETDEV_RSS_KEY_LEN] = {0xE6, 0xFA, 0x35, 0x62,
+				0x95, 0x12, 0x3E, 0xA3, 0xFB, 0x46, 0xC1, 0x5F,
+				0xB1, 0x43, 0x82, 0x5B, 0x6A, 0x49, 0x50, 0x95,
+				0xCD, 0xAB, 0xD8, 0x11, 0x8F, 0xC5, 0xBD, 0xBC,
+				0x6A, 0x4A, 0xB2, 0xD4, 0x1F, 0xFE, 0xBC, 0x41,
+				0xBF, 0xAC, 0xB2, 0x9A, 0x8F, 0x70, 0xE9, 0x2A,
+				0xD7, 0xB2, 0x80, 0xB6, 0x5B, 0xAA, 0x9D, 0x20};
+
+	BUG_ON(len > NETDEV_RSS_KEY_LEN);
+	memcpy(buffer, seed, len);
+}
+#endif /* 3.15.0 */
+
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(3,16,0) )
+#ifdef HAVE_SET_RX_MODE
+#ifdef NETDEV_HW_ADDR_T_UNICAST
+int __kc_hw_addr_sync_dev(struct netdev_hw_addr_list *list,
+		struct net_device *dev,
+		int (*sync)(struct net_device *, const unsigned char *),
+		int (*unsync)(struct net_device *, const unsigned char *))
+{
+	struct netdev_hw_addr *ha, *tmp;
+	int err;
+
+	/* first go through and flush out any stale entries */
+	list_for_each_entry_safe(ha, tmp, &list->list, list) {
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(3,10,0) )
+		if (!ha->synced || ha->refcount != 1)
+#else
+		if (!ha->sync_cnt || ha->refcount != 1)
+#endif
+			continue;
+
+		if (unsync && unsync(dev, ha->addr))
+			continue;
+
+		list_del_rcu(&ha->list);
+		kfree_rcu(ha, rcu_head);
+		list->count--;
+	}
+
+	/* go through and sync new entries to the list */
+	list_for_each_entry_safe(ha, tmp, &list->list, list) {
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(3,10,0) )
+		if (ha->synced)
+#else
+		if (ha->sync_cnt)
+#endif
+			continue;
+
+		err = sync(dev, ha->addr);
+		if (err)
+			return err;
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(3,10,0) )
+		ha->synced = true;
+#else
+		ha->sync_cnt++;
+#endif
+		ha->refcount++;
+	}
+
+	return 0;
+}
+
+void __kc_hw_addr_unsync_dev(struct netdev_hw_addr_list *list,
+		struct net_device *dev,
+		int (*unsync)(struct net_device *, const unsigned char *))
+{
+	struct netdev_hw_addr *ha, *tmp;
+
+	list_for_each_entry_safe(ha, tmp, &list->list, list) {
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(3,10,0) )
+		if (!ha->synced)
+#else
+		if (!ha->sync_cnt)
+#endif
+			continue;
+
+		if (unsync && unsync(dev, ha->addr))
+			continue;
+
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(3,10,0) )
+		ha->synced = false;
+#else
+		ha->sync_cnt--;
+#endif
+		if (--ha->refcount)
+			continue;
+
+		list_del_rcu(&ha->list);
+		kfree_rcu(ha, rcu_head);
+		list->count--;
+	}
+}
+
+#endif /* NETDEV_HW_ADDR_T_UNICAST  */
+#ifndef NETDEV_HW_ADDR_T_MULTICAST
+int __kc_dev_addr_sync_dev(struct dev_addr_list **list, int *count,
+		struct net_device *dev,
+		int (*sync)(struct net_device *, const unsigned char *),
+		int (*unsync)(struct net_device *, const unsigned char *))
+{
+	struct dev_addr_list *da, **next = list;
+	int err;
+
+	/* first go through and flush out any stale entries */
+	while ((da = *next) != NULL) {
+		if (da->da_synced && da->da_users == 1) {
+			if (!unsync || !unsync(dev, da->da_addr)) {
+				*next = da->next;
+				kfree(da);
+				(*count)--;
+				continue;
+			}
+		}
+		next = &da->next;
+	}
+
+	/* go through and sync new entries to the list */
+	for (da = *list; da != NULL; da = da->next) {
+		if (da->da_synced)
+			continue;
+
+		err = sync(dev, da->da_addr);
+		if (err)
+			return err;
+
+		da->da_synced++;
+		da->da_users++;
+	}
+
+	return 0;
+}
+
+void __kc_dev_addr_unsync_dev(struct dev_addr_list **list, int *count,
+		struct net_device *dev,
+		int (*unsync)(struct net_device *, const unsigned char *))
+{
+	struct dev_addr_list *da;
+
+	while ((da = *list) != NULL) {
+		if (da->da_synced) {
+			if (!unsync || !unsync(dev, da->da_addr)) {
+				da->da_synced--;
+				if (--da->da_users == 0) {
+					*list = da->next;
+					kfree(da);
+					(*count)--;
+					continue;
+				}
+			}
+		}
+		list = &da->next;
+	}
+}
+#endif /* NETDEV_HW_ADDR_T_MULTICAST  */
+#endif /* HAVE_SET_RX_MODE */
+void *__kc_devm_kmemdup(struct device *dev, const void *src, size_t len,
+			gfp_t gfp)
+{
+	void *p;
+
+	p = devm_kzalloc(dev, len, gfp);
+	if (p)
+		memcpy(p, src, len);
+
+	return p;
+}
+#endif /* 3.16.0 */
+
+/******************************************************************************/
+#if ((LINUX_VERSION_CODE < KERNEL_VERSION(3,17,0)) && \
+     (RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(7,5)))
+#endif /* <3.17.0 && RHEL_RELEASE_CODE < RHEL7.5 */
+
+/******************************************************************************/
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(3,18,0) )
+#ifndef NO_PTP_SUPPORT
+static void __kc_sock_efree(struct sk_buff *skb)
+{
+	sock_put(skb->sk);
+}
+
+struct sk_buff *__kc_skb_clone_sk(struct sk_buff *skb)
+{
+	struct sock *sk = skb->sk;
+	struct sk_buff *clone;
+
+	if (!sk || !atomic_inc_not_zero(&sk->sk_refcnt))
+		return NULL;
+
+	clone = skb_clone(skb, GFP_ATOMIC);
+	if (!clone) {
+		sock_put(sk);
+		return NULL;
+	}
+
+	clone->sk = sk;
+	clone->destructor = __kc_sock_efree;
+
+	return clone;
+}
+
+void __kc_skb_complete_tx_timestamp(struct sk_buff *skb,
+				    struct skb_shared_hwtstamps *hwtstamps)
+{
+	struct sock_exterr_skb *serr;
+	struct sock *sk = skb->sk;
+	int err;
+
+	sock_hold(sk);
+
+	*skb_hwtstamps(skb) = *hwtstamps;
+
+	serr = SKB_EXT_ERR(skb);
+	memset(serr, 0, sizeof(*serr));
+	serr->ee.ee_errno = ENOMSG;
+	serr->ee.ee_origin = SO_EE_ORIGIN_TIMESTAMPING;
+
+	err = sock_queue_err_skb(sk, skb);
+	if (err)
+		kfree_skb(skb);
+
+	sock_put(sk);
+}
+#endif
+
+/* include headers needed for get_headlen function */
+#if defined(CONFIG_FCOE) || defined(CONFIG_FCOE_MODULE)
+#include <scsi/fc/fc_fcoe.h>
+#endif
+#ifdef HAVE_SCTP
+#include <linux/sctp.h>
+#endif
+
+u32 __kc_eth_get_headlen(const struct net_device __always_unused *dev,
+			 unsigned char *data, unsigned int max_len)
+{
+	union {
+		unsigned char *network;
+		/* l2 headers */
+		struct ethhdr *eth;
+		struct vlan_hdr *vlan;
+		/* l3 headers */
+		struct iphdr *ipv4;
+		struct ipv6hdr *ipv6;
+	} hdr;
+	__be16 proto;
+	u8 nexthdr = 0;	/* default to not TCP */
+	u8 hlen;
+
+	/* this should never happen, but better safe than sorry */
+	if (max_len < ETH_HLEN)
+		return max_len;
+
+	/* initialize network frame pointer */
+	hdr.network = data;
+
+	/* set first protocol and move network header forward */
+	proto = hdr.eth->h_proto;
+	hdr.network += ETH_HLEN;
+
+again:
+	switch (proto) {
+	/* handle any vlan tag if present */
+	case __constant_htons(ETH_P_8021AD):
+	case __constant_htons(ETH_P_8021Q):
+		if ((hdr.network - data) > (max_len - VLAN_HLEN))
+			return max_len;
+
+		proto = hdr.vlan->h_vlan_encapsulated_proto;
+		hdr.network += VLAN_HLEN;
+		goto again;
+	/* handle L3 protocols */
+	case __constant_htons(ETH_P_IP):
+		if ((hdr.network - data) > (max_len - sizeof(struct iphdr)))
+			return max_len;
+
+		/* access ihl as a u8 to avoid unaligned access on ia64 */
+		hlen = (hdr.network[0] & 0x0F) << 2;
+
+		/* verify hlen meets minimum size requirements */
+		if (hlen < sizeof(struct iphdr))
+			return hdr.network - data;
+
+		/* record next protocol if header is present */
+		if (!(hdr.ipv4->frag_off & htons(IP_OFFSET)))
+			nexthdr = hdr.ipv4->protocol;
+
+		hdr.network += hlen;
+		break;
+#ifdef NETIF_F_TSO6
+	case __constant_htons(ETH_P_IPV6):
+		if ((hdr.network - data) > (max_len - sizeof(struct ipv6hdr)))
+			return max_len;
+
+		/* record next protocol */
+		nexthdr = hdr.ipv6->nexthdr;
+		hdr.network += sizeof(struct ipv6hdr);
+		break;
+#endif /* NETIF_F_TSO6 */
+#if defined(CONFIG_FCOE) || defined(CONFIG_FCOE_MODULE)
+	case __constant_htons(ETH_P_FCOE):
+		hdr.network += FCOE_HEADER_LEN;
+		break;
+#endif
+	default:
+		return hdr.network - data;
+	}
+
+	/* finally sort out L4 */
+	switch (nexthdr) {
+	case IPPROTO_TCP:
+		if ((hdr.network - data) > (max_len - sizeof(struct tcphdr)))
+			return max_len;
+
+		/* access doff as a u8 to avoid unaligned access on ia64 */
+		hdr.network += max_t(u8, sizeof(struct tcphdr),
+				     (hdr.network[12] & 0xF0) >> 2);
+
+		break;
+	case IPPROTO_UDP:
+	case IPPROTO_UDPLITE:
+		hdr.network += sizeof(struct udphdr);
+		break;
+#ifdef HAVE_SCTP
+	case IPPROTO_SCTP:
+		hdr.network += sizeof(struct sctphdr);
+		break;
+#endif
+	}
+
+	/*
+	 * If everything has gone correctly hdr.network should be the
+	 * data section of the packet and will be the end of the header.
+	 * If not then it probably represents the end of the last recognized
+	 * header.
+	 */
+	return min_t(unsigned int, hdr.network - data, max_len);
+}
+
+#endif /* < 3.18.0 */
+
+/******************************************************************************/
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(3,19,0) )
+#ifdef HAVE_NET_GET_RANDOM_ONCE
+static u8 __kc_netdev_rss_key[NETDEV_RSS_KEY_LEN];
+
+void __kc_netdev_rss_key_fill(void *buffer, size_t len)
+{
+	BUG_ON(len > sizeof(__kc_netdev_rss_key));
+	net_get_random_once(__kc_netdev_rss_key, sizeof(__kc_netdev_rss_key));
+	memcpy(buffer, __kc_netdev_rss_key, len);
+}
+#endif
+
+int _kc_bitmap_print_to_pagebuf(bool list, char *buf,
+				const unsigned long *maskp,
+				int nmaskbits)
+{
+	ptrdiff_t len = PTR_ALIGN(buf + PAGE_SIZE - 1, PAGE_SIZE) - buf - 2;
+	int n = 0;
+
+	if (len > 1) {
+		n = list ? bitmap_scnlistprintf(buf, len, maskp, nmaskbits) :
+			   bitmap_scnprintf(buf, len, maskp, nmaskbits);
+		buf[n++] = '\n';
+		buf[n] = '\0';
+	}
+	return n;
+}
+#endif
+
+/******************************************************************************/
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(4,1,0) )
+#if !((RHEL_RELEASE_CODE > RHEL_RELEASE_VERSION(6,8) && RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(7,0)) && \
+      (RHEL_RELEASE_CODE > RHEL_RELEASE_VERSION(7,2)) && \
+      (SLE_VERSION_CODE > SLE_VERSION(12,1,0)))
+unsigned int _kc_cpumask_local_spread(unsigned int i, int node)
+{
+	int cpu;
+
+	/* Wrap: we always want a cpu. */
+	i %= num_online_cpus();
+
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,28) )
+	/* Kernels prior to 2.6.28 do not have for_each_cpu or
+	 * cpumask_of_node, so just use for_each_online_cpu()
+	 */
+	for_each_online_cpu(cpu)
+		if (i-- == 0)
+			return cpu;
+
+	return 0;
+#else
+	if (node == -1) {
+		for_each_cpu(cpu, cpu_online_mask)
+			if (i-- == 0)
+				return cpu;
+	} else {
+		/* NUMA first. */
+		for_each_cpu_and(cpu, cpumask_of_node(node), cpu_online_mask)
+			if (i-- == 0)
+				return cpu;
+
+		for_each_cpu(cpu, cpu_online_mask) {
+			/* Skip NUMA nodes, done above. */
+			if (cpumask_test_cpu(cpu, cpumask_of_node(node)))
+				continue;
+
+			if (i-- == 0)
+				return cpu;
+		}
+	}
+#endif /* KERNEL_VERSION >= 2.6.28 */
+	BUG();
+}
+#endif
+#endif
+
+/******************************************************************************/
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(4,5,0) )
+#if (!(RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(7,3)))
+#ifdef CONFIG_SPARC
+#include <asm/idprom.h>
+#include <asm/prom.h>
+#endif
+int _kc_eth_platform_get_mac_address(struct device *dev __maybe_unused,
+				     u8 *mac_addr __maybe_unused)
+{
+#if (((LINUX_VERSION_CODE < KERNEL_VERSION(3,1,0)) && defined(CONFIG_OF) && \
+      !defined(HAVE_STRUCT_DEVICE_OF_NODE) || !defined(CONFIG_OF)) && \
+     !defined(CONFIG_SPARC))
+	return -ENODEV;
+#else
+	const unsigned char *addr;
+	struct device_node *dp;
+
+	if (dev_is_pci(dev))
+		dp = pci_device_to_OF_node(to_pci_dev(dev));
+	else
+#if defined(HAVE_STRUCT_DEVICE_OF_NODE) && defined(CONFIG_OF)
+		dp = dev->of_node;
+#else
+		dp = NULL;
+#endif
+
+	addr = NULL;
+	if (dp)
+		addr = of_get_mac_address(dp);
+#ifdef CONFIG_SPARC
+	/* Kernel hasn't implemented arch_get_platform_mac_address, but we
+	 * should handle the SPARC case here since it was supported
+	 * originally. This is replaced by arch_get_platform_mac_address()
+	 * upstream.
+	 */
+	if (!addr)
+		addr = idprom->id_ethaddr;
+#endif
+	if (!addr)
+		return -ENODEV;
+
+	ether_addr_copy(mac_addr, addr);
+	return 0;
+#endif
+}
+#endif /* !(RHEL_RELEASE >= 7.3) */
+#endif /* < 4.5.0 */
+
+/*****************************************************************************/
+#if ((LINUX_VERSION_CODE < KERNEL_VERSION(4,14,0)) || \
+     (SLE_VERSION_CODE && (SLE_VERSION_CODE <= SLE_VERSION(12,3,0))) || \
+     (RHEL_RELEASE_CODE && (RHEL_RELEASE_CODE <= RHEL_RELEASE_VERSION(7,5))))
+const char *_kc_phy_speed_to_str(int speed)
+{
+	switch (speed) {
+	case SPEED_10:
+		return "10Mbps";
+	case SPEED_100:
+		return "100Mbps";
+	case SPEED_1000:
+		return "1Gbps";
+	case SPEED_2500:
+		return "2.5Gbps";
+	case SPEED_5000:
+		return "5Gbps";
+	case SPEED_10000:
+		return "10Gbps";
+	case SPEED_14000:
+		return "14Gbps";
+	case SPEED_20000:
+		return "20Gbps";
+	case SPEED_25000:
+		return "25Gbps";
+	case SPEED_40000:
+		return "40Gbps";
+	case SPEED_50000:
+		return "50Gbps";
+	case SPEED_56000:
+		return "56Gbps";
+#ifdef SPEED_100000
+	case SPEED_100000:
+		return "100Gbps";
+#endif
+	case SPEED_UNKNOWN:
+		return "Unknown";
+	default:
+		return "Unsupported (update phy-core.c)";
+	}
+}
+#endif /* (LINUX < 4.14.0) || (SLES <= 12.3.0) || (RHEL <= 7.5) */
+
+/******************************************************************************/
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(4,15,0) )
+void _kc_ethtool_intersect_link_masks(struct ethtool_link_ksettings *dst,
+				      struct ethtool_link_ksettings *src)
+{
+	unsigned int size = BITS_TO_LONGS(__ETHTOOL_LINK_MODE_MASK_NBITS);
+	unsigned int idx = 0;
+
+	for (; idx < size; idx++) {
+		dst->link_modes.supported[idx] &=
+			src->link_modes.supported[idx];
+		dst->link_modes.advertising[idx] &=
+			src->link_modes.advertising[idx];
+	}
+}
+#endif /* 4.15.0 */
+
+/*****************************************************************************/
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(4,17,0))
+/* PCIe link information */
+#define PCIE_SPEED2STR(speed) \
+	((speed) == PCIE_SPEED_16_0GT ? "16 GT/s" : \
+	 (speed) == PCIE_SPEED_8_0GT ? "8 GT/s" : \
+	 (speed) == PCIE_SPEED_5_0GT ? "5 GT/s" : \
+	 (speed) == PCIE_SPEED_2_5GT ? "2.5 GT/s" : \
+	 "Unknown speed")
+
+/* PCIe speed to Mb/s reduced by encoding overhead */
+#define PCIE_SPEED2MBS_ENC(speed) \
+	((speed) == PCIE_SPEED_16_0GT ? 16000*128/130 : \
+	 (speed) == PCIE_SPEED_8_0GT  ?  8000*128/130 : \
+	 (speed) == PCIE_SPEED_5_0GT  ?  5000*8/10 : \
+	 (speed) == PCIE_SPEED_2_5GT  ?  2500*8/10 : \
+	 0)
+
+static u32
+_kc_pcie_bandwidth_available(struct pci_dev *dev,
+			     struct pci_dev **limiting_dev,
+			     enum pci_bus_speed *speed,
+			     enum pcie_link_width *width)
+{
+	u16 lnksta;
+	enum pci_bus_speed next_speed;
+	enum pcie_link_width next_width;
+	u32 bw, next_bw;
+
+	if (speed)
+		*speed = PCI_SPEED_UNKNOWN;
+	if (width)
+		*width = PCIE_LNK_WIDTH_UNKNOWN;
+
+	bw = 0;
+
+	while (dev) {
+		pcie_capability_read_word(dev, PCI_EXP_LNKSTA, &lnksta);
+
+		next_speed = pcie_link_speed[lnksta & PCI_EXP_LNKSTA_CLS];
+		next_width = (lnksta & PCI_EXP_LNKSTA_NLW) >>
+			PCI_EXP_LNKSTA_NLW_SHIFT;
+
+		next_bw = next_width * PCIE_SPEED2MBS_ENC(next_speed);
+
+		/* Check if current device limits the total bandwidth */
+		if (!bw || next_bw <= bw) {
+			bw = next_bw;
+
+			if (limiting_dev)
+				*limiting_dev = dev;
+			if (speed)
+				*speed = next_speed;
+			if (width)
+				*width = next_width;
+		}
+
+		dev = pci_upstream_bridge(dev);
+	}
+
+	return bw;
+}
+
+static enum pci_bus_speed _kc_pcie_get_speed_cap(struct pci_dev *dev)
+{
+	u32 lnkcap2, lnkcap;
+
+	/*
+	 * PCIe r4.0 sec 7.5.3.18 recommends using the Supported Link
+	 * Speeds Vector in Link Capabilities 2 when supported, falling
+	 * back to Max Link Speed in Link Capabilities otherwise.
+	 */
+	pcie_capability_read_dword(dev, PCI_EXP_LNKCAP2, &lnkcap2);
+	if (lnkcap2) { /* PCIe r3.0-compliant */
+		if (lnkcap2 & PCI_EXP_LNKCAP2_SLS_16_0GB)
+			return PCIE_SPEED_16_0GT;
+		else if (lnkcap2 & PCI_EXP_LNKCAP2_SLS_8_0GB)
+			return PCIE_SPEED_8_0GT;
+		else if (lnkcap2 & PCI_EXP_LNKCAP2_SLS_5_0GB)
+			return PCIE_SPEED_5_0GT;
+		else if (lnkcap2 & PCI_EXP_LNKCAP2_SLS_2_5GB)
+			return PCIE_SPEED_2_5GT;
+		return PCI_SPEED_UNKNOWN;
+	}
+
+	pcie_capability_read_dword(dev, PCI_EXP_LNKCAP, &lnkcap);
+	if (lnkcap) {
+		if (lnkcap & PCI_EXP_LNKCAP_SLS_16_0GB)
+			return PCIE_SPEED_16_0GT;
+		else if (lnkcap & PCI_EXP_LNKCAP_SLS_8_0GB)
+			return PCIE_SPEED_8_0GT;
+		else if (lnkcap & PCI_EXP_LNKCAP_SLS_5_0GB)
+			return PCIE_SPEED_5_0GT;
+		else if (lnkcap & PCI_EXP_LNKCAP_SLS_2_5GB)
+			return PCIE_SPEED_2_5GT;
+	}
+
+	return PCI_SPEED_UNKNOWN;
+}
+
+static enum pcie_link_width _kc_pcie_get_width_cap(struct pci_dev *dev)
+{
+	u32 lnkcap;
+
+	pcie_capability_read_dword(dev, PCI_EXP_LNKCAP, &lnkcap);
+	if (lnkcap)
+		return (lnkcap & PCI_EXP_LNKCAP_MLW) >> 4;
+
+	return PCIE_LNK_WIDTH_UNKNOWN;
+}
+
+static u32
+_kc_pcie_bandwidth_capable(struct pci_dev *dev, enum pci_bus_speed *speed,
+			   enum pcie_link_width *width)
+{
+	*speed = _kc_pcie_get_speed_cap(dev);
+	*width = _kc_pcie_get_width_cap(dev);
+
+	if (*speed == PCI_SPEED_UNKNOWN || *width == PCIE_LNK_WIDTH_UNKNOWN)
+		return 0;
+
+	return *width * PCIE_SPEED2MBS_ENC(*speed);
+}
+
+void _kc_pcie_print_link_status(struct pci_dev *dev) {
+	enum pcie_link_width width, width_cap;
+	enum pci_bus_speed speed, speed_cap;
+	struct pci_dev *limiting_dev = NULL;
+	u32 bw_avail, bw_cap;
+
+	bw_cap = _kc_pcie_bandwidth_capable(dev, &speed_cap, &width_cap);
+	bw_avail = _kc_pcie_bandwidth_available(dev, &limiting_dev, &speed,
+						&width);
+
+	if (bw_avail >= bw_cap)
+		pci_info(dev, "%u.%03u Gb/s available PCIe bandwidth (%s x%d link)\n",
+			 bw_cap / 1000, bw_cap % 1000,
+			 PCIE_SPEED2STR(speed_cap), width_cap);
+	else
+		pci_info(dev, "%u.%03u Gb/s available PCIe bandwidth, limited by %s x%d link at %s (capable of %u.%03u Gb/s with %s x%d link)\n",
+			 bw_avail / 1000, bw_avail % 1000,
+			 PCIE_SPEED2STR(speed), width,
+			 limiting_dev ? pci_name(limiting_dev) : "<unknown>",
+			 bw_cap / 1000, bw_cap % 1000,
+			 PCIE_SPEED2STR(speed_cap), width_cap);
+}
+#endif /* 4.17.0 */
+
+/*****************************************************************************/
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(5,13,0))
+void _kc_ethtool_sprintf(u8 **data, const char *fmt, ...)
+{
+	va_list args;
+
+	va_start(args, fmt);
+	vsnprintf(*data, ETH_GSTRING_LEN, fmt, args);
+	va_end(args);
+
+	*data += ETH_GSTRING_LEN;
+}
+#endif /* 5.13.0 */
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/kcompat.h b/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/kcompat.h
new file mode 100644
index 000000000..1f8161f5a
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/kcompat.h
@@ -0,0 +1,6850 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/* Copyright(c) 1999 - 2019 Intel Corporation. */
+
+#ifndef _KCOMPAT_H_
+#define _KCOMPAT_H_
+
+#ifndef LINUX_VERSION_CODE
+#include <linux/version.h>
+#else
+#ifndef KERNEL_VERSION
+#define KERNEL_VERSION(a,b,c) (((a) << 16) + ((b) << 8) + (c))
+#endif
+#endif
+#include <linux/atomic.h>
+#include <linux/init.h>
+#include <linux/types.h>
+#include <linux/errno.h>
+#include <linux/module.h>
+#include <linux/pci.h>
+#include <linux/string.h>
+#include <linux/netdevice.h>
+#include <linux/etherdevice.h>
+#include <linux/skbuff.h>
+#include <linux/ioport.h>
+#include <linux/slab.h>
+#include <linux/list.h>
+#include <linux/delay.h>
+#include <linux/sched.h>
+#include <linux/in.h>
+#include <linux/ip.h>
+#include <linux/ipv6.h>
+#include <linux/tcp.h>
+#include <linux/udp.h>
+#include <linux/mii.h>
+#include <linux/vmalloc.h>
+#include <asm/io.h>
+#include <linux/ethtool.h>
+#include <linux/if_vlan.h>
+
+#if IS_ENABLED(CONFIG_NET_DEVLINK)
+#include <net/devlink.h>
+#endif
+
+#ifndef GCC_VERSION
+#define GCC_VERSION (__GNUC__ * 10000		\
+		     + __GNUC_MINOR__ * 100	\
+		     + __GNUC_PATCHLEVEL__)
+#endif /* GCC_VERSION */
+
+/* Backport macros for controlling GCC diagnostics */
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(4,18,0) )
+
+/* Compilers before gcc-4.6 do not understand "#pragma GCC diagnostic push" */
+#if GCC_VERSION >= 40600
+#define __diag_str1(s)		#s
+#define __diag_str(s)		__diag_str1(s)
+#define __diag(s)		_Pragma(__diag_str(GCC diagnostic s))
+#else
+#define __diag(s)
+#endif /* GCC_VERSION >= 4.6 */
+#define __diag_push()	__diag(push)
+#define __diag_pop()	__diag(pop)
+#endif /* LINUX_VERSION < 4.18.0 */
+
+#ifndef NSEC_PER_MSEC
+#define NSEC_PER_MSEC 1000000L
+#endif
+#include <net/ipv6.h>
+/* UTS_RELEASE is in a different header starting in kernel 2.6.18 */
+#ifndef UTS_RELEASE
+/* utsrelease.h changed locations in 2.6.33 */
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,33) )
+#include <linux/utsrelease.h>
+#else
+#include <generated/utsrelease.h>
+#endif
+#endif
+
+/* NAPI enable/disable flags here */
+#define NAPI
+
+/* MSI compatibility code for all kernels and drivers */
+#ifdef DISABLE_PCI_MSI
+#undef CONFIG_PCI_MSI
+#endif
+#ifndef CONFIG_PCI_MSI
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,8) )
+struct msix_entry {
+	u16 vector; /* kernel uses to write allocated vector */
+	u16 entry;  /* driver uses to specify entry, OS writes */
+};
+#endif
+#undef pci_enable_msi
+#define pci_enable_msi(a) -ENOTSUPP
+#undef pci_disable_msi
+#define pci_disable_msi(a) do {} while (0)
+#undef pci_enable_msix
+#define pci_enable_msix(a, b, c) -ENOTSUPP
+#undef pci_disable_msix
+#define pci_disable_msix(a) do {} while (0)
+#define msi_remove_pci_irq_vectors(a) do {} while (0)
+#endif /* CONFIG_PCI_MSI */
+#ifdef DISABLE_PM
+#undef CONFIG_PM
+#endif
+
+#ifdef DISABLE_NET_POLL_CONTROLLER
+#undef CONFIG_NET_POLL_CONTROLLER
+#endif
+
+#ifndef PMSG_SUSPEND
+#define PMSG_SUSPEND 3
+#endif
+
+/* generic boolean compatibility */
+#undef TRUE
+#undef FALSE
+#define TRUE true
+#define FALSE false
+#ifdef GCC_VERSION
+#if ( GCC_VERSION < 3000 )
+#define _Bool char
+#endif
+#else
+#define _Bool char
+#endif
+
+#ifndef BIT
+#define BIT(nr)         (1UL << (nr))
+#endif
+
+#undef __always_unused
+#define __always_unused __attribute__((__unused__))
+
+#undef __maybe_unused
+#define __maybe_unused __attribute__((__unused__))
+
+/* kernels less than 2.4.14 don't have this */
+#ifndef ETH_P_8021Q
+#define ETH_P_8021Q 0x8100
+#endif
+
+#ifndef module_param
+#define module_param(v,t,p) MODULE_PARM(v, "i");
+#endif
+
+#ifndef DMA_64BIT_MASK
+#define DMA_64BIT_MASK  0xffffffffffffffffULL
+#endif
+
+#ifndef DMA_32BIT_MASK
+#define DMA_32BIT_MASK  0x00000000ffffffffULL
+#endif
+
+#ifndef PCI_CAP_ID_EXP
+#define PCI_CAP_ID_EXP 0x10
+#endif
+
+#ifndef uninitialized_var
+#define uninitialized_var(x) x = x
+#endif
+
+#ifndef PCIE_LINK_STATE_L0S
+#define PCIE_LINK_STATE_L0S 1
+#endif
+#ifndef PCIE_LINK_STATE_L1
+#define PCIE_LINK_STATE_L1 2
+#endif
+
+#ifndef SET_NETDEV_DEV
+#define SET_NETDEV_DEV(net, pdev)
+#endif
+
+#if !defined(HAVE_FREE_NETDEV) && ( LINUX_VERSION_CODE < KERNEL_VERSION(3,1,0) )
+#define free_netdev(x)	kfree(x)
+#endif
+
+#ifndef dynamic_hex_dump
+#define dynamic_hex_dump(...)
+#endif
+
+#ifdef HAVE_POLL_CONTROLLER
+#define CONFIG_NET_POLL_CONTROLLER
+#endif
+
+#ifndef SKB_DATAREF_SHIFT
+/* if we do not have the infrastructure to detect if skb_header is cloned
+   just return false in all cases */
+#define skb_header_cloned(x) 0
+#endif
+
+#ifndef NETIF_F_GSO
+#define gso_size tso_size
+#define gso_segs tso_segs
+#endif
+
+#ifndef NETIF_F_GRO
+#define vlan_gro_receive(_napi, _vlgrp, _vlan, _skb) \
+		vlan_hwaccel_receive_skb(_skb, _vlgrp, _vlan)
+#define napi_gro_receive(_napi, _skb) netif_receive_skb(_skb)
+#endif
+
+#ifndef NETIF_F_SCTP_CSUM
+#define NETIF_F_SCTP_CSUM 0
+#endif
+
+#ifndef NETIF_F_LRO
+#define NETIF_F_LRO BIT(15)
+#endif
+
+#ifndef NETIF_F_NTUPLE
+#define NETIF_F_NTUPLE BIT(27)
+#endif
+
+#ifndef NETIF_F_ALL_FCOE
+#define NETIF_F_ALL_FCOE	(NETIF_F_FCOE_CRC | NETIF_F_FCOE_MTU | \
+				 NETIF_F_FSO)
+#endif
+
+#ifndef IPPROTO_SCTP
+#define IPPROTO_SCTP 132
+#endif
+
+#ifndef IPPROTO_UDPLITE
+#define IPPROTO_UDPLITE 136
+#endif
+
+#ifndef CHECKSUM_PARTIAL
+#define CHECKSUM_PARTIAL CHECKSUM_HW
+#define CHECKSUM_COMPLETE CHECKSUM_HW
+#endif
+
+#ifndef __read_mostly
+#define __read_mostly
+#endif
+
+#ifndef MII_RESV1
+#define MII_RESV1		0x17		/* Reserved...		*/
+#endif
+
+#ifndef unlikely
+#define unlikely(_x) _x
+#define likely(_x) _x
+#endif
+
+#ifndef WARN_ON
+#define WARN_ON(x)
+#endif
+
+#ifndef PCI_DEVICE
+#define PCI_DEVICE(vend,dev) \
+	.vendor = (vend), .device = (dev), \
+	.subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID
+#endif
+
+#ifndef node_online
+#define node_online(node) ((node) == 0)
+#endif
+
+#ifndef cpu_online
+#define cpu_online(cpuid) test_bit((cpuid), &cpu_online_map)
+#endif
+
+#ifndef _LINUX_RANDOM_H
+#include <linux/random.h>
+#endif
+
+#ifndef DECLARE_BITMAP
+#ifndef BITS_TO_LONGS
+#define BITS_TO_LONGS(bits) (((bits)+BITS_PER_LONG-1)/BITS_PER_LONG)
+#endif
+#define DECLARE_BITMAP(name,bits) long name[BITS_TO_LONGS(bits)]
+#endif
+
+#ifndef VLAN_HLEN
+#define VLAN_HLEN 4
+#endif
+
+#ifndef VLAN_ETH_HLEN
+#define VLAN_ETH_HLEN 18
+#endif
+
+#ifndef VLAN_ETH_FRAME_LEN
+#define VLAN_ETH_FRAME_LEN 1518
+#endif
+
+#ifndef DCA_GET_TAG_TWO_ARGS
+#define dca3_get_tag(a,b) dca_get_tag(b)
+#endif
+
+#ifndef CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS
+#if defined(__i386__) || defined(__x86_64__)
+#define CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS
+#endif
+#endif
+
+/* taken from 2.6.24 definition in linux/kernel.h */
+#ifndef IS_ALIGNED
+#define IS_ALIGNED(x,a)         (((x) % ((typeof(x))(a))) == 0)
+#endif
+
+#ifdef IS_ENABLED
+#undef IS_ENABLED
+#undef __ARG_PLACEHOLDER_1
+#undef config_enabled
+#undef _config_enabled
+#undef __config_enabled
+#undef ___config_enabled
+#endif
+
+#define __ARG_PLACEHOLDER_1 0,
+#define config_enabled(cfg) _config_enabled(cfg)
+#define _config_enabled(value) __config_enabled(__ARG_PLACEHOLDER_##value)
+#define __config_enabled(arg1_or_junk) ___config_enabled(arg1_or_junk 1, 0)
+#define ___config_enabled(__ignored, val, ...) val
+
+#define IS_ENABLED(option) \
+	(config_enabled(option) || config_enabled(option##_MODULE))
+
+#if !defined(NETIF_F_HW_VLAN_TX) && !defined(NETIF_F_HW_VLAN_CTAG_TX)
+struct _kc_vlan_ethhdr {
+	unsigned char	h_dest[ETH_ALEN];
+	unsigned char	h_source[ETH_ALEN];
+	__be16		h_vlan_proto;
+	__be16		h_vlan_TCI;
+	__be16		h_vlan_encapsulated_proto;
+};
+#define vlan_ethhdr _kc_vlan_ethhdr
+struct _kc_vlan_hdr {
+	__be16		h_vlan_TCI;
+	__be16		h_vlan_encapsulated_proto;
+};
+#define vlan_hdr _kc_vlan_hdr
+#define vlan_tx_tag_present(_skb) 0
+#define vlan_tx_tag_get(_skb) 0
+#endif /* NETIF_F_HW_VLAN_TX && NETIF_F_HW_VLAN_CTAG_TX */
+
+#ifndef VLAN_PRIO_SHIFT
+#define VLAN_PRIO_SHIFT 13
+#endif
+
+#ifndef PCI_EXP_LNKSTA_CLS_2_5GB
+#define PCI_EXP_LNKSTA_CLS_2_5GB 0x0001
+#endif
+
+#ifndef PCI_EXP_LNKSTA_CLS_5_0GB
+#define PCI_EXP_LNKSTA_CLS_5_0GB 0x0002
+#endif
+
+#ifndef PCI_EXP_LNKSTA_CLS_8_0GB
+#define PCI_EXP_LNKSTA_CLS_8_0GB 0x0003
+#endif
+
+#ifndef PCI_EXP_LNKSTA_NLW_X1
+#define PCI_EXP_LNKSTA_NLW_X1 0x0010
+#endif
+
+#ifndef PCI_EXP_LNKSTA_NLW_X2
+#define PCI_EXP_LNKSTA_NLW_X2 0x0020
+#endif
+
+#ifndef PCI_EXP_LNKSTA_NLW_X4
+#define PCI_EXP_LNKSTA_NLW_X4 0x0040
+#endif
+
+#ifndef PCI_EXP_LNKSTA_NLW_X8
+#define PCI_EXP_LNKSTA_NLW_X8 0x0080
+#endif
+
+#ifndef __GFP_COLD
+#define __GFP_COLD 0
+#endif
+
+#ifndef __GFP_COMP
+#define __GFP_COMP 0
+#endif
+
+#ifndef IP_OFFSET
+#define IP_OFFSET 0x1FFF /* "Fragment Offset" part */
+#endif
+
+/*****************************************************************************/
+/* Installations with ethtool version without eeprom, adapter id, or statistics
+ * support */
+
+#ifndef ETH_GSTRING_LEN
+#define ETH_GSTRING_LEN 32
+#endif
+
+#ifndef ETHTOOL_GSTATS
+#define ETHTOOL_GSTATS 0x1d
+#undef ethtool_drvinfo
+#define ethtool_drvinfo k_ethtool_drvinfo
+struct k_ethtool_drvinfo {
+	u32 cmd;
+	char driver[32];
+	char version[32];
+	char fw_version[32];
+	char bus_info[32];
+	char reserved1[32];
+	char reserved2[16];
+	u32 n_stats;
+	u32 testinfo_len;
+	u32 eedump_len;
+	u32 regdump_len;
+};
+
+struct ethtool_stats {
+	u32 cmd;
+	u32 n_stats;
+	u64 data[0];
+};
+#endif /* ETHTOOL_GSTATS */
+
+#ifndef ETHTOOL_PHYS_ID
+#define ETHTOOL_PHYS_ID 0x1c
+#endif /* ETHTOOL_PHYS_ID */
+
+#ifndef ETHTOOL_GSTRINGS
+#define ETHTOOL_GSTRINGS 0x1b
+enum ethtool_stringset {
+	ETH_SS_TEST             = 0,
+	ETH_SS_STATS,
+};
+struct ethtool_gstrings {
+	u32 cmd;            /* ETHTOOL_GSTRINGS */
+	u32 string_set;     /* string set id e.c. ETH_SS_TEST, etc*/
+	u32 len;            /* number of strings in the string set */
+	u8 data[0];
+};
+#endif /* ETHTOOL_GSTRINGS */
+
+#ifndef ETHTOOL_TEST
+#define ETHTOOL_TEST 0x1a
+enum ethtool_test_flags {
+	ETH_TEST_FL_OFFLINE	= BIT(0),
+	ETH_TEST_FL_FAILED	= BIT(1),
+};
+struct ethtool_test {
+	u32 cmd;
+	u32 flags;
+	u32 reserved;
+	u32 len;
+	u64 data[0];
+};
+#endif /* ETHTOOL_TEST */
+
+#ifndef ETHTOOL_GEEPROM
+#define ETHTOOL_GEEPROM 0xb
+#undef ETHTOOL_GREGS
+struct ethtool_eeprom {
+	u32 cmd;
+	u32 magic;
+	u32 offset;
+	u32 len;
+	u8 data[0];
+};
+
+struct ethtool_value {
+	u32 cmd;
+	u32 data;
+};
+#endif /* ETHTOOL_GEEPROM */
+
+#ifndef ETHTOOL_GLINK
+#define ETHTOOL_GLINK 0xa
+#endif /* ETHTOOL_GLINK */
+
+#ifndef ETHTOOL_GWOL
+#define ETHTOOL_GWOL 0x5
+#define ETHTOOL_SWOL 0x6
+#define SOPASS_MAX      6
+struct ethtool_wolinfo {
+	u32 cmd;
+	u32 supported;
+	u32 wolopts;
+	u8 sopass[SOPASS_MAX]; /* SecureOn(tm) password */
+};
+#endif /* ETHTOOL_GWOL */
+
+#ifndef ETHTOOL_GREGS
+#define ETHTOOL_GREGS		0x00000004 /* Get NIC registers */
+#define ethtool_regs _kc_ethtool_regs
+/* for passing big chunks of data */
+struct _kc_ethtool_regs {
+	u32 cmd;
+	u32 version; /* driver-specific, indicates different chips/revs */
+	u32 len; /* bytes */
+	u8 data[0];
+};
+#endif /* ETHTOOL_GREGS */
+
+#ifndef ETHTOOL_GMSGLVL
+#define ETHTOOL_GMSGLVL		0x00000007 /* Get driver message level */
+#endif
+#ifndef ETHTOOL_SMSGLVL
+#define ETHTOOL_SMSGLVL		0x00000008 /* Set driver msg level, priv. */
+#endif
+#ifndef ETHTOOL_NWAY_RST
+#define ETHTOOL_NWAY_RST	0x00000009 /* Restart autonegotiation, priv */
+#endif
+#ifndef ETHTOOL_GLINK
+#define ETHTOOL_GLINK		0x0000000a /* Get link status */
+#endif
+#ifndef ETHTOOL_GEEPROM
+#define ETHTOOL_GEEPROM		0x0000000b /* Get EEPROM data */
+#endif
+#ifndef ETHTOOL_SEEPROM
+#define ETHTOOL_SEEPROM		0x0000000c /* Set EEPROM data */
+#endif
+#ifndef ETHTOOL_GCOALESCE
+#define ETHTOOL_GCOALESCE	0x0000000e /* Get coalesce config */
+/* for configuring coalescing parameters of chip */
+#define ethtool_coalesce _kc_ethtool_coalesce
+struct _kc_ethtool_coalesce {
+	u32	cmd;	/* ETHTOOL_{G,S}COALESCE */
+
+	/* How many usecs to delay an RX interrupt after
+	 * a packet arrives.  If 0, only rx_max_coalesced_frames
+	 * is used.
+	 */
+	u32	rx_coalesce_usecs;
+
+	/* How many packets to delay an RX interrupt after
+	 * a packet arrives.  If 0, only rx_coalesce_usecs is
+	 * used.  It is illegal to set both usecs and max frames
+	 * to zero as this would cause RX interrupts to never be
+	 * generated.
+	 */
+	u32	rx_max_coalesced_frames;
+
+	/* Same as above two parameters, except that these values
+	 * apply while an IRQ is being serviced by the host.  Not
+	 * all cards support this feature and the values are ignored
+	 * in that case.
+	 */
+	u32	rx_coalesce_usecs_irq;
+	u32	rx_max_coalesced_frames_irq;
+
+	/* How many usecs to delay a TX interrupt after
+	 * a packet is sent.  If 0, only tx_max_coalesced_frames
+	 * is used.
+	 */
+	u32	tx_coalesce_usecs;
+
+	/* How many packets to delay a TX interrupt after
+	 * a packet is sent.  If 0, only tx_coalesce_usecs is
+	 * used.  It is illegal to set both usecs and max frames
+	 * to zero as this would cause TX interrupts to never be
+	 * generated.
+	 */
+	u32	tx_max_coalesced_frames;
+
+	/* Same as above two parameters, except that these values
+	 * apply while an IRQ is being serviced by the host.  Not
+	 * all cards support this feature and the values are ignored
+	 * in that case.
+	 */
+	u32	tx_coalesce_usecs_irq;
+	u32	tx_max_coalesced_frames_irq;
+
+	/* How many usecs to delay in-memory statistics
+	 * block updates.  Some drivers do not have an in-memory
+	 * statistic block, and in such cases this value is ignored.
+	 * This value must not be zero.
+	 */
+	u32	stats_block_coalesce_usecs;
+
+	/* Adaptive RX/TX coalescing is an algorithm implemented by
+	 * some drivers to improve latency under low packet rates and
+	 * improve throughput under high packet rates.  Some drivers
+	 * only implement one of RX or TX adaptive coalescing.  Anything
+	 * not implemented by the driver causes these values to be
+	 * silently ignored.
+	 */
+	u32	use_adaptive_rx_coalesce;
+	u32	use_adaptive_tx_coalesce;
+
+	/* When the packet rate (measured in packets per second)
+	 * is below pkt_rate_low, the {rx,tx}_*_low parameters are
+	 * used.
+	 */
+	u32	pkt_rate_low;
+	u32	rx_coalesce_usecs_low;
+	u32	rx_max_coalesced_frames_low;
+	u32	tx_coalesce_usecs_low;
+	u32	tx_max_coalesced_frames_low;
+
+	/* When the packet rate is below pkt_rate_high but above
+	 * pkt_rate_low (both measured in packets per second) the
+	 * normal {rx,tx}_* coalescing parameters are used.
+	 */
+
+	/* When the packet rate is (measured in packets per second)
+	 * is above pkt_rate_high, the {rx,tx}_*_high parameters are
+	 * used.
+	 */
+	u32	pkt_rate_high;
+	u32	rx_coalesce_usecs_high;
+	u32	rx_max_coalesced_frames_high;
+	u32	tx_coalesce_usecs_high;
+	u32	tx_max_coalesced_frames_high;
+
+	/* How often to do adaptive coalescing packet rate sampling,
+	 * measured in seconds.  Must not be zero.
+	 */
+	u32	rate_sample_interval;
+};
+#endif /* ETHTOOL_GCOALESCE */
+
+#ifndef ETHTOOL_SCOALESCE
+#define ETHTOOL_SCOALESCE	0x0000000f /* Set coalesce config. */
+#endif
+#ifndef ETHTOOL_GRINGPARAM
+#define ETHTOOL_GRINGPARAM	0x00000010 /* Get ring parameters */
+/* for configuring RX/TX ring parameters */
+#define ethtool_ringparam _kc_ethtool_ringparam
+struct _kc_ethtool_ringparam {
+	u32	cmd;	/* ETHTOOL_{G,S}RINGPARAM */
+
+	/* Read only attributes.  These indicate the maximum number
+	 * of pending RX/TX ring entries the driver will allow the
+	 * user to set.
+	 */
+	u32	rx_max_pending;
+	u32	rx_mini_max_pending;
+	u32	rx_jumbo_max_pending;
+	u32	tx_max_pending;
+
+	/* Values changeable by the user.  The valid values are
+	 * in the range 1 to the "*_max_pending" counterpart above.
+	 */
+	u32	rx_pending;
+	u32	rx_mini_pending;
+	u32	rx_jumbo_pending;
+	u32	tx_pending;
+};
+#endif /* ETHTOOL_GRINGPARAM */
+
+#ifndef ETHTOOL_SRINGPARAM
+#define ETHTOOL_SRINGPARAM	0x00000011 /* Set ring parameters, priv. */
+#endif
+#ifndef ETHTOOL_GPAUSEPARAM
+#define ETHTOOL_GPAUSEPARAM	0x00000012 /* Get pause parameters */
+/* for configuring link flow control parameters */
+#define ethtool_pauseparam _kc_ethtool_pauseparam
+struct _kc_ethtool_pauseparam {
+	u32	cmd;	/* ETHTOOL_{G,S}PAUSEPARAM */
+
+	/* If the link is being auto-negotiated (via ethtool_cmd.autoneg
+	 * being true) the user may set 'autoneg' here non-zero to have the
+	 * pause parameters be auto-negotiated too.  In such a case, the
+	 * {rx,tx}_pause values below determine what capabilities are
+	 * advertised.
+	 *
+	 * If 'autoneg' is zero or the link is not being auto-negotiated,
+	 * then {rx,tx}_pause force the driver to use/not-use pause
+	 * flow control.
+	 */
+	u32	autoneg;
+	u32	rx_pause;
+	u32	tx_pause;
+};
+#endif /* ETHTOOL_GPAUSEPARAM */
+
+#ifndef ETHTOOL_SPAUSEPARAM
+#define ETHTOOL_SPAUSEPARAM	0x00000013 /* Set pause parameters. */
+#endif
+#ifndef ETHTOOL_GRXCSUM
+#define ETHTOOL_GRXCSUM		0x00000014 /* Get RX hw csum enable (ethtool_value) */
+#endif
+#ifndef ETHTOOL_SRXCSUM
+#define ETHTOOL_SRXCSUM		0x00000015 /* Set RX hw csum enable (ethtool_value) */
+#endif
+#ifndef ETHTOOL_GTXCSUM
+#define ETHTOOL_GTXCSUM		0x00000016 /* Get TX hw csum enable (ethtool_value) */
+#endif
+#ifndef ETHTOOL_STXCSUM
+#define ETHTOOL_STXCSUM		0x00000017 /* Set TX hw csum enable (ethtool_value) */
+#endif
+#ifndef ETHTOOL_GSG
+#define ETHTOOL_GSG		0x00000018 /* Get scatter-gather enable
+					    * (ethtool_value) */
+#endif
+#ifndef ETHTOOL_SSG
+#define ETHTOOL_SSG		0x00000019 /* Set scatter-gather enable
+					    * (ethtool_value). */
+#endif
+#ifndef ETHTOOL_TEST
+#define ETHTOOL_TEST		0x0000001a /* execute NIC self-test, priv. */
+#endif
+#ifndef ETHTOOL_GSTRINGS
+#define ETHTOOL_GSTRINGS	0x0000001b /* get specified string set */
+#endif
+#ifndef ETHTOOL_PHYS_ID
+#define ETHTOOL_PHYS_ID		0x0000001c /* identify the NIC */
+#endif
+#ifndef ETHTOOL_GSTATS
+#define ETHTOOL_GSTATS		0x0000001d /* get NIC-specific statistics */
+#endif
+#ifndef ETHTOOL_GTSO
+#define ETHTOOL_GTSO		0x0000001e /* Get TSO enable (ethtool_value) */
+#endif
+#ifndef ETHTOOL_STSO
+#define ETHTOOL_STSO		0x0000001f /* Set TSO enable (ethtool_value) */
+#endif
+
+#ifndef ETHTOOL_BUSINFO_LEN
+#define ETHTOOL_BUSINFO_LEN	32
+#endif
+
+#ifndef WAKE_FILTER
+#define WAKE_FILTER	BIT(7)
+#endif
+
+#ifndef SPEED_2500
+#define SPEED_2500 2500
+#endif
+#ifndef SPEED_5000
+#define SPEED_5000 5000
+#endif
+#ifndef SPEED_14000
+#define SPEED_14000 14000
+#endif
+#ifndef SPEED_25000
+#define SPEED_25000 25000
+#endif
+#ifndef SPEED_50000
+#define SPEED_50000 50000
+#endif
+#ifndef SPEED_56000
+#define SPEED_56000 56000
+#endif
+#ifndef SPEED_100000
+#define SPEED_100000 100000
+#endif
+
+#ifndef RHEL_RELEASE_VERSION
+#define RHEL_RELEASE_VERSION(a,b) (((a) << 8) + (b))
+#endif
+#ifndef AX_RELEASE_VERSION
+#define AX_RELEASE_VERSION(a,b) (((a) << 8) + (b))
+#endif
+
+#ifndef AX_RELEASE_CODE
+#define AX_RELEASE_CODE 0
+#endif
+
+#if (AX_RELEASE_CODE && AX_RELEASE_CODE == AX_RELEASE_VERSION(3,0))
+#define RHEL_RELEASE_CODE RHEL_RELEASE_VERSION(5,0)
+#elif (AX_RELEASE_CODE && AX_RELEASE_CODE == AX_RELEASE_VERSION(3,1))
+#define RHEL_RELEASE_CODE RHEL_RELEASE_VERSION(5,1)
+#elif (AX_RELEASE_CODE && AX_RELEASE_CODE == AX_RELEASE_VERSION(3,2))
+#define RHEL_RELEASE_CODE RHEL_RELEASE_VERSION(5,3)
+#endif
+
+#ifndef RHEL_RELEASE_CODE
+/* NOTE: RHEL_RELEASE_* introduced in RHEL4.5 */
+#define RHEL_RELEASE_CODE 0
+#endif
+
+/* RHEL 7 didn't backport the parameter change in
+ * create_singlethread_workqueue.
+ * If/when RH corrects this we will want to tighten up the version check.
+ */
+#if (RHEL_RELEASE_CODE && RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(7,0))
+#undef create_singlethread_workqueue
+#define create_singlethread_workqueue(name)	\
+	alloc_ordered_workqueue("%s", WQ_MEM_RECLAIM, name)
+#endif
+
+/* Ubuntu Release ABI is the 4th digit of their kernel version. You can find
+ * it in /usr/src/linux/$(uname -r)/include/generated/utsrelease.h for new
+ * enough versions of Ubuntu. Otherwise you can simply see it in the output of
+ * uname as the 4th digit of the kernel. The UTS_UBUNTU_RELEASE_ABI is not in
+ * the linux-source package, but in the linux-headers package. It begins to
+ * appear in later releases of 14.04 and 14.10.
+ *
+ * Ex:
+ * <Ubuntu 14.04.1>
+ *  $uname -r
+ *  3.13.0-45-generic
+ * ABI is 45
+ *
+ * <Ubuntu 14.10>
+ *  $uname -r
+ *  3.16.0-23-generic
+ * ABI is 23
+ */
+#ifndef UTS_UBUNTU_RELEASE_ABI
+#define UTS_UBUNTU_RELEASE_ABI 0
+#define UBUNTU_VERSION_CODE 0
+#else
+/* Ubuntu does not provide actual release version macro, so we use the kernel
+ * version plus the ABI to generate a unique version code specific to Ubuntu.
+ * In addition, we mask the lower 8 bits of LINUX_VERSION_CODE in order to
+ * ignore differences in sublevel which are not important since we have the
+ * ABI value. Otherwise, it becomes impossible to correlate ABI to version for
+ * ordering checks.
+ */
+
+/* The UTS_UBUNTU_RELEASE_ABI value for upstream kernels built as Debian
+ * packages comes out to things like 050807, which looks like an octal because
+ * it starts with a '0', but has an '8' which is an invalid octal digit, and
+ * the preprocessor complains and quits.  Until we need to care about
+ * differences in that number, we can simply replace it with a fake value.
+ */
+#undef UTS_UBUNTU_RELEASE_ABI
+#define UTS_UBUNTU_RELEASE_ABI 0
+
+#define UBUNTU_VERSION_CODE (((~0xFF & LINUX_VERSION_CODE) << 8) + \
+			     UTS_UBUNTU_RELEASE_ABI)
+
+#if UTS_UBUNTU_RELEASE_ABI > 255
+#error UTS_UBUNTU_RELEASE_ABI is too large...
+#endif /* UTS_UBUNTU_RELEASE_ABI > 255 */
+
+#if ( LINUX_VERSION_CODE <= KERNEL_VERSION(3,0,0) )
+/* Our version code scheme does not make sense for non 3.x or newer kernels,
+ * and we have no support in kcompat for this scenario. Thus, treat this as a
+ * non-Ubuntu kernel. Possibly might be better to error here.
+ */
+#define UTS_UBUNTU_RELEASE_ABI 0
+#define UBUNTU_VERSION_CODE 0
+#endif
+
+#endif
+
+/* Note that the 3rd digit is always zero, and will be ignored. This is
+ * because Ubuntu kernels are based on x.y.0-ABI values, and while their linux
+ * version codes are 3 digit, this 3rd digit is superseded by the ABI value.
+ */
+#define UBUNTU_VERSION(a,b,c,d) ((KERNEL_VERSION(a,b,0) << 8) + (d))
+
+
+/* SuSE version macros are the same as Linux kernel version macro */
+#ifndef SLE_VERSION
+#define SLE_VERSION(a,b,c)	KERNEL_VERSION(a,b,c)
+#endif
+#define SLE_LOCALVERSION(a,b,c)	KERNEL_VERSION(a,b,c)
+#ifdef CONFIG_SUSE_KERNEL
+#if ( LINUX_VERSION_CODE == KERNEL_VERSION(2,6,27) )
+/* SLES11 GA is 2.6.27 based */
+#define SLE_VERSION_CODE SLE_VERSION(11,0,0)
+#elif ( LINUX_VERSION_CODE == KERNEL_VERSION(2,6,32) )
+/* SLES11 SP1 is 2.6.32 based */
+#define SLE_VERSION_CODE SLE_VERSION(11,1,0)
+#elif ( LINUX_VERSION_CODE == KERNEL_VERSION(3,0,13) )
+/* SLES11 SP2 GA is 3.0.13-0.27 */
+#define SLE_VERSION_CODE SLE_VERSION(11,2,0)
+#elif ((LINUX_VERSION_CODE == KERNEL_VERSION(3,0,76)))
+/* SLES11 SP3 GA is 3.0.76-0.11 */
+#define SLE_VERSION_CODE SLE_VERSION(11,3,0)
+#elif (LINUX_VERSION_CODE == KERNEL_VERSION(3,0,101))
+  #if (SLE_LOCALVERSION_CODE < SLE_LOCALVERSION(0,8,0))
+  /* some SLES11sp2 update kernels up to 3.0.101-0.7.x */
+  #define SLE_VERSION_CODE SLE_VERSION(11,2,0)
+  #elif (SLE_LOCALVERSION_CODE < SLE_LOCALVERSION(63,0,0))
+  /* most SLES11sp3 update kernels */
+  #define SLE_VERSION_CODE SLE_VERSION(11,3,0)
+  #else
+  /* SLES11 SP4 GA (3.0.101-63) and update kernels 3.0.101-63+ */
+  #define SLE_VERSION_CODE SLE_VERSION(11,4,0)
+  #endif
+#elif (LINUX_VERSION_CODE == KERNEL_VERSION(3,12,28))
+/* SLES12 GA is 3.12.28-4
+ * kernel updates 3.12.xx-<33 through 52>[.yy] */
+#define SLE_VERSION_CODE SLE_VERSION(12,0,0)
+#elif (LINUX_VERSION_CODE == KERNEL_VERSION(3,12,49))
+/* SLES12 SP1 GA is 3.12.49-11
+ * updates 3.12.xx-60.yy where xx={51..} */
+#define SLE_VERSION_CODE SLE_VERSION(12,1,0)
+#elif ((LINUX_VERSION_CODE >= KERNEL_VERSION(4,4,21) && \
+       (LINUX_VERSION_CODE <= KERNEL_VERSION(4,4,59))) || \
+       (LINUX_VERSION_CODE >= KERNEL_VERSION(4,4,74) && \
+        LINUX_VERSION_CODE < KERNEL_VERSION(4,5,0) && \
+        SLE_LOCALVERSION_CODE >= KERNEL_VERSION(92,0,0) && \
+        SLE_LOCALVERSION_CODE <  KERNEL_VERSION(93,0,0)))
+/* SLES12 SP2 GA is 4.4.21-69.
+ * SLES12 SP2 updates before SLES12 SP3 are: 4.4.{21,38,49,59}
+ * SLES12 SP2 updates after SLES12 SP3 are: 4.4.{74,90,103,114,120}
+ * but they all use a SLE_LOCALVERSION_CODE matching 92.nn.y */
+#define SLE_VERSION_CODE SLE_VERSION(12,2,0)
+#elif ((LINUX_VERSION_CODE == KERNEL_VERSION(4,4,73) || \
+        LINUX_VERSION_CODE == KERNEL_VERSION(4,4,82) || \
+        LINUX_VERSION_CODE == KERNEL_VERSION(4,4,92)) || \
+       (LINUX_VERSION_CODE == KERNEL_VERSION(4,4,103) && \
+       (SLE_LOCALVERSION_CODE == KERNEL_VERSION(6,33,0) || \
+        SLE_LOCALVERSION_CODE == KERNEL_VERSION(6,38,0))) || \
+       (LINUX_VERSION_CODE >= KERNEL_VERSION(4,4,114) && \
+        LINUX_VERSION_CODE < KERNEL_VERSION(4,5,0) && \
+        SLE_LOCALVERSION_CODE >= KERNEL_VERSION(94,0,0) && \
+        SLE_LOCALVERSION_CODE <  KERNEL_VERSION(95,0,0)) )
+/* SLES12 SP3 GM is 4.4.73-5 and update kernels are 4.4.82-6.3.
+ * SLES12 SP3 updates not conflicting with SP2 are: 4.4.{82,92}
+ * SLES12 SP3 updates conflicting with SP2 are:
+ *   - 4.4.103-6.33.1, 4.4.103-6.38.1
+ *   - 4.4.{114,120}-94.nn.y */
+#define SLE_VERSION_CODE SLE_VERSION(12,3,0)
+#elif (LINUX_VERSION_CODE == KERNEL_VERSION(4,12,14) && \
+       (SLE_LOCALVERSION_CODE == KERNEL_VERSION(94,41,0) || \
+       (SLE_LOCALVERSION_CODE >= KERNEL_VERSION(95,0,0) && \
+        SLE_LOCALVERSION_CODE < KERNEL_VERSION(96,0,0))))
+/* SLES12 SP4 GM is 4.12.14-94.41 and update kernel is 4.12.14-95.x. */
+#define SLE_VERSION_CODE SLE_VERSION(12,4,0)
+#elif (LINUX_VERSION_CODE == KERNEL_VERSION(4,12,14) && \
+       (SLE_LOCALVERSION_CODE == KERNEL_VERSION(23,0,0) || \
+        SLE_LOCALVERSION_CODE == KERNEL_VERSION(2,0,0) || \
+        SLE_LOCALVERSION_CODE == KERNEL_VERSION(136,0,0) || \
+        (SLE_LOCALVERSION_CODE >= KERNEL_VERSION(25,0,0) && \
+	 SLE_LOCALVERSION_CODE < KERNEL_VERSION(26,0,0)) || \
+	(SLE_LOCALVERSION_CODE >= KERNEL_VERSION(150,0,0) && \
+	 SLE_LOCALVERSION_CODE < KERNEL_VERSION(151,0,0))))
+/* SLES15 Beta1 is 4.12.14-2
+ * SLES15 GM is 4.12.14-23 and update kernel is 4.12.14-{25,136},
+ * and 4.12.14-150.14.
+ */
+#define SLE_VERSION_CODE SLE_VERSION(15,0,0)
+#elif (LINUX_VERSION_CODE == KERNEL_VERSION(4,12,14) && \
+       SLE_LOCALVERSION_CODE >= KERNEL_VERSION(25,23,0))
+/* SLES15 SP1 Beta1 is 4.12.14-25.23 */
+#define SLE_VERSION_CODE SLE_VERSION(15,1,0)
+#elif (LINUX_VERSION_CODE == KERNEL_VERSION(5,3,13))
+/* SLES15 SP2 Beta1 is 5.3.13 */
+#define SLE_VERSION_CODE SLE_VERSION(15,2,0)
+#elif (LINUX_VERSION_CODE >= KERNEL_VERSION(5,3,18))
+#if (SLE_LOCALVERSION_CODE < KERNEL_VERSION(47,0,0))
+/* SLES15 SP2 Beta1 is 5.3.18 */
+#define SLE_VERSION_CODE SLE_VERSION(15,2,0)
+#else /* local version >= 47 */
+/* SLES15 SP3 Beta1 is 5.3.18 */
+#define SLE_VERSION_CODE SLE_VERSION(15,3,0)
+#endif
+
+/* new SLES kernels must be added here with >= based on kernel
+ * the idea is to order from newest to oldest and just catch all
+ * of them using the >=
+ */
+#endif /* LINUX_VERSION_CODE == KERNEL_VERSION(x,y,z) */
+#endif /* CONFIG_SUSE_KERNEL */
+#ifndef SLE_VERSION_CODE
+#define SLE_VERSION_CODE 0
+#endif /* SLE_VERSION_CODE */
+#ifndef SLE_LOCALVERSION_CODE
+#define SLE_LOCALVERSION_CODE 0
+#endif /* SLE_LOCALVERSION_CODE */
+
+#ifdef __KLOCWORK__
+/* The following are not compiled into the binary driver; they are here
+ * only to tune Klocwork scans to workaround false-positive issues.
+ */
+#ifdef ARRAY_SIZE
+#undef ARRAY_SIZE
+#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
+#endif
+
+#define memcpy(dest, src, len)	memcpy_s(dest, len, src, len)
+#define memset(dest, ch, len)	memset_s(dest, len, ch, len)
+
+static inline int _kc_test_and_clear_bit(int nr, volatile unsigned long *addr)
+{
+	unsigned long mask = BIT_MASK(nr);
+	unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr);
+	unsigned long old;
+	unsigned long flags = 0;
+
+	_atomic_spin_lock_irqsave(p, flags);
+	old = *p;
+	*p = old & ~mask;
+	_atomic_spin_unlock_irqrestore(p, flags);
+
+	return (old & mask) != 0;
+}
+#define test_and_clear_bit(nr, addr) _kc_test_and_clear_bit(nr, addr)
+
+static inline int _kc_test_and_set_bit(int nr, volatile unsigned long *addr)
+{
+	unsigned long mask = BIT_MASK(nr);
+	unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr);
+	unsigned long old;
+	unsigned long flags = 0;
+
+	_atomic_spin_lock_irqsave(p, flags);
+	old = *p;
+	*p = old | mask;
+	_atomic_spin_unlock_irqrestore(p, flags);
+
+	return (old & mask) != 0;
+}
+#define test_and_set_bit(nr, addr) _kc_test_and_set_bit(nr, addr)
+
+#ifdef CONFIG_DYNAMIC_DEBUG
+#undef dev_dbg
+#define dev_dbg(dev, format, arg...) dev_printk(KERN_DEBUG, dev, format, ##arg)
+#undef pr_debug
+#define pr_debug(format, arg...) printk(KERN_DEBUG format, ##arg)
+#endif /* CONFIG_DYNAMIC_DEBUG */
+
+#undef hlist_for_each_entry_safe
+#define hlist_for_each_entry_safe(pos, n, head, member)			     \
+	for (n = NULL, pos = hlist_entry_safe((head)->first, typeof(*(pos)), \
+					      member);			     \
+	     pos;							     \
+	     pos = hlist_entry_safe((pos)->member.next, typeof(*(pos)), member))
+
+#ifdef uninitialized_var
+#undef uninitialized_var
+#define uninitialized_var(x) x = *(&(x))
+#endif
+#endif /* __KLOCWORK__ */
+
+/* Older versions of GCC will trigger -Wformat-nonliteral warnings for const
+ * char * strings. Unfortunately, the implementation of do_trace_printk does
+ * this, in order to add a storage attribute to the memory. This was fixed in
+ * GCC 5.1, but we still use older distributions built with GCC 4.x.
+ *
+ * The string pointer is only passed as a const char * to the __trace_bprintk
+ * function. Since that function has the __printf attribute, it will trigger
+ * the warnings. We can't remove the attribute, so instead we'll use the
+ * __diag macro to disable -Wformat-nonliteral around the call to
+ * __trace_bprintk.
+ */
+#if GCC_VERSION < 50100
+#define __trace_bprintk(ip, fmt, args...) ({		\
+	int err;					\
+	__diag_push();					\
+	__diag(ignored "-Wformat-nonliteral");		\
+	err = __trace_bprintk(ip, fmt, ##args);		\
+	__diag_pop();					\
+	err;						\
+})
+#endif /* GCC_VERSION < 5.1.0 */
+
+/*****************************************************************************/
+/* 2.4.3 => 2.4.0 */
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,4,3) )
+
+/**************************************/
+/* PCI DRIVER API */
+
+#ifndef pci_set_dma_mask
+#define pci_set_dma_mask _kc_pci_set_dma_mask
+int _kc_pci_set_dma_mask(struct pci_dev *dev, dma_addr_t mask);
+#endif
+
+#ifndef pci_request_regions
+#define pci_request_regions _kc_pci_request_regions
+int _kc_pci_request_regions(struct pci_dev *pdev, char *res_name);
+#endif
+
+#ifndef pci_release_regions
+#define pci_release_regions _kc_pci_release_regions
+void _kc_pci_release_regions(struct pci_dev *pdev);
+#endif
+
+/**************************************/
+/* NETWORK DRIVER API */
+
+#ifndef alloc_etherdev
+#define alloc_etherdev _kc_alloc_etherdev
+struct net_device * _kc_alloc_etherdev(int sizeof_priv);
+#endif
+
+#ifndef is_valid_ether_addr
+#define is_valid_ether_addr _kc_is_valid_ether_addr
+int _kc_is_valid_ether_addr(u8 *addr);
+#endif
+
+/**************************************/
+/* MISCELLANEOUS */
+
+#ifndef INIT_TQUEUE
+#define INIT_TQUEUE(_tq, _routine, _data)		\
+	do {						\
+		INIT_LIST_HEAD(&(_tq)->list);		\
+		(_tq)->sync = 0;			\
+		(_tq)->routine = _routine;		\
+		(_tq)->data = _data;			\
+	} while (0)
+#endif
+
+#endif /* 2.4.3 => 2.4.0 */
+
+/*****************************************************************************/
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,4,5) )
+/* Generic MII registers. */
+#define MII_BMCR            0x00        /* Basic mode control register */
+#define MII_BMSR            0x01        /* Basic mode status register  */
+#define MII_PHYSID1         0x02        /* PHYS ID 1                   */
+#define MII_PHYSID2         0x03        /* PHYS ID 2                   */
+#define MII_ADVERTISE       0x04        /* Advertisement control reg   */
+#define MII_LPA             0x05        /* Link partner ability reg    */
+#define MII_EXPANSION       0x06        /* Expansion register          */
+/* Basic mode control register. */
+#define BMCR_FULLDPLX           0x0100  /* Full duplex                 */
+#define BMCR_ANENABLE           0x1000  /* Enable auto negotiation     */
+/* Basic mode status register. */
+#define BMSR_ERCAP              0x0001  /* Ext-reg capability          */
+#define BMSR_ANEGCAPABLE        0x0008  /* Able to do auto-negotiation */
+#define BMSR_10HALF             0x0800  /* Can do 10mbps, half-duplex  */
+#define BMSR_10FULL             0x1000  /* Can do 10mbps, full-duplex  */
+#define BMSR_100HALF            0x2000  /* Can do 100mbps, half-duplex */
+#define BMSR_100FULL            0x4000  /* Can do 100mbps, full-duplex */
+/* Advertisement control register. */
+#define ADVERTISE_CSMA          0x0001  /* Only selector supported     */
+#define ADVERTISE_10HALF        0x0020  /* Try for 10mbps half-duplex  */
+#define ADVERTISE_10FULL        0x0040  /* Try for 10mbps full-duplex  */
+#define ADVERTISE_100HALF       0x0080  /* Try for 100mbps half-duplex */
+#define ADVERTISE_100FULL       0x0100  /* Try for 100mbps full-duplex */
+#define ADVERTISE_ALL (ADVERTISE_10HALF | ADVERTISE_10FULL | \
+                       ADVERTISE_100HALF | ADVERTISE_100FULL)
+/* Expansion register for auto-negotiation. */
+#define EXPANSION_ENABLENPAGE   0x0004  /* This enables npage words    */
+#endif
+
+/*****************************************************************************/
+/* 2.4.6 => 2.4.3 */
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,4,6) )
+
+#ifndef pci_set_power_state
+#define pci_set_power_state _kc_pci_set_power_state
+int _kc_pci_set_power_state(struct pci_dev *dev, int state);
+#endif
+
+#ifndef pci_enable_wake
+#define pci_enable_wake _kc_pci_enable_wake
+int _kc_pci_enable_wake(struct pci_dev *pdev, u32 state, int enable);
+#endif
+
+#ifndef pci_disable_device
+#define pci_disable_device _kc_pci_disable_device
+void _kc_pci_disable_device(struct pci_dev *pdev);
+#endif
+
+/* PCI PM entry point syntax changed, so don't support suspend/resume */
+#undef CONFIG_PM
+
+#endif /* 2.4.6 => 2.4.3 */
+
+#ifndef HAVE_PCI_SET_MWI
+#define pci_set_mwi(X) pci_write_config_word(X, \
+			       PCI_COMMAND, adapter->hw.bus.pci_cmd_word | \
+			       PCI_COMMAND_INVALIDATE);
+#define pci_clear_mwi(X) pci_write_config_word(X, \
+			       PCI_COMMAND, adapter->hw.bus.pci_cmd_word & \
+			       ~PCI_COMMAND_INVALIDATE);
+#endif
+
+/*****************************************************************************/
+/* 2.4.10 => 2.4.9 */
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,4,10) )
+
+/**************************************/
+/* MODULE API */
+
+#ifndef MODULE_LICENSE
+	#define MODULE_LICENSE(X)
+#endif
+
+/**************************************/
+/* OTHER */
+
+#undef min
+#define min(x,y) ({ \
+	const typeof(x) _x = (x);	\
+	const typeof(y) _y = (y);	\
+	(void) (&_x == &_y);		\
+	_x < _y ? _x : _y; })
+
+#undef max
+#define max(x,y) ({ \
+	const typeof(x) _x = (x);	\
+	const typeof(y) _y = (y);	\
+	(void) (&_x == &_y);		\
+	_x > _y ? _x : _y; })
+
+#define min_t(type,x,y) ({ \
+	type _x = (x); \
+	type _y = (y); \
+	_x < _y ? _x : _y; })
+
+#define max_t(type,x,y) ({ \
+	type _x = (x); \
+	type _y = (y); \
+	_x > _y ? _x : _y; })
+
+#ifndef list_for_each_safe
+#define list_for_each_safe(pos, n, head) \
+	for (pos = (head)->next, n = pos->next; pos != (head); \
+		pos = n, n = pos->next)
+#endif
+
+#ifndef ____cacheline_aligned_in_smp
+#ifdef CONFIG_SMP
+#define ____cacheline_aligned_in_smp ____cacheline_aligned
+#else
+#define ____cacheline_aligned_in_smp
+#endif /* CONFIG_SMP */
+#endif
+
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,4,8) )
+int _kc_snprintf(char * buf, size_t size, const char *fmt, ...);
+#define snprintf(buf, size, fmt, args...) _kc_snprintf(buf, size, fmt, ##args)
+int _kc_vsnprintf(char *buf, size_t size, const char *fmt, va_list args);
+#define vsnprintf(buf, size, fmt, args) _kc_vsnprintf(buf, size, fmt, args)
+#else /* 2.4.8 => 2.4.9 */
+int snprintf(char * buf, size_t size, const char *fmt, ...);
+int vsnprintf(char *buf, size_t size, const char *fmt, va_list args);
+#endif
+#endif /* 2.4.10 -> 2.4.6 */
+
+
+/*****************************************************************************/
+/* 2.4.12 => 2.4.10 */
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,4,12) )
+#ifndef HAVE_NETIF_MSG
+#define HAVE_NETIF_MSG 1
+enum {
+	NETIF_MSG_DRV		= 0x0001,
+	NETIF_MSG_PROBE		= 0x0002,
+	NETIF_MSG_LINK		= 0x0004,
+	NETIF_MSG_TIMER		= 0x0008,
+	NETIF_MSG_IFDOWN	= 0x0010,
+	NETIF_MSG_IFUP		= 0x0020,
+	NETIF_MSG_RX_ERR	= 0x0040,
+	NETIF_MSG_TX_ERR	= 0x0080,
+	NETIF_MSG_TX_QUEUED	= 0x0100,
+	NETIF_MSG_INTR		= 0x0200,
+	NETIF_MSG_TX_DONE	= 0x0400,
+	NETIF_MSG_RX_STATUS	= 0x0800,
+	NETIF_MSG_PKTDATA	= 0x1000,
+	NETIF_MSG_HW		= 0x2000,
+	NETIF_MSG_WOL		= 0x4000,
+};
+
+#define netif_msg_drv(p)	((p)->msg_enable & NETIF_MSG_DRV)
+#define netif_msg_probe(p)	((p)->msg_enable & NETIF_MSG_PROBE)
+#define netif_msg_link(p)	((p)->msg_enable & NETIF_MSG_LINK)
+#define netif_msg_timer(p)	((p)->msg_enable & NETIF_MSG_TIMER)
+#define netif_msg_ifdown(p)	((p)->msg_enable & NETIF_MSG_IFDOWN)
+#define netif_msg_ifup(p)	((p)->msg_enable & NETIF_MSG_IFUP)
+#define netif_msg_rx_err(p)	((p)->msg_enable & NETIF_MSG_RX_ERR)
+#define netif_msg_tx_err(p)	((p)->msg_enable & NETIF_MSG_TX_ERR)
+#define netif_msg_tx_queued(p)	((p)->msg_enable & NETIF_MSG_TX_QUEUED)
+#define netif_msg_intr(p)	((p)->msg_enable & NETIF_MSG_INTR)
+#define netif_msg_tx_done(p)	((p)->msg_enable & NETIF_MSG_TX_DONE)
+#define netif_msg_rx_status(p)	((p)->msg_enable & NETIF_MSG_RX_STATUS)
+#define netif_msg_pktdata(p)	((p)->msg_enable & NETIF_MSG_PKTDATA)
+#endif /* !HAVE_NETIF_MSG */
+#endif /* 2.4.12 => 2.4.10 */
+
+/*****************************************************************************/
+/* 2.4.13 => 2.4.12 */
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,4,13) )
+
+/**************************************/
+/* PCI DMA MAPPING */
+
+#ifndef virt_to_page
+	#define virt_to_page(v) (mem_map + (virt_to_phys(v) >> PAGE_SHIFT))
+#endif
+
+#ifndef pci_map_page
+#define pci_map_page _kc_pci_map_page
+u64 _kc_pci_map_page(struct pci_dev *dev, struct page *page, unsigned long offset, size_t size, int direction);
+#endif
+
+#ifndef pci_unmap_page
+#define pci_unmap_page _kc_pci_unmap_page
+void _kc_pci_unmap_page(struct pci_dev *dev, u64 dma_addr, size_t size, int direction);
+#endif
+
+/* pci_set_dma_mask takes dma_addr_t, which is only 32-bits prior to 2.4.13 */
+
+#undef DMA_32BIT_MASK
+#define DMA_32BIT_MASK	0xffffffff
+#undef DMA_64BIT_MASK
+#define DMA_64BIT_MASK	0xffffffff
+
+/**************************************/
+/* OTHER */
+
+#ifndef cpu_relax
+#define cpu_relax()	rep_nop()
+#endif
+
+struct vlan_ethhdr {
+	unsigned char h_dest[ETH_ALEN];
+	unsigned char h_source[ETH_ALEN];
+	unsigned short h_vlan_proto;
+	unsigned short h_vlan_TCI;
+	unsigned short h_vlan_encapsulated_proto;
+};
+#endif /* 2.4.13 => 2.4.12 */
+
+/*****************************************************************************/
+/* 2.4.17 => 2.4.12 */
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,4,17) )
+
+#ifndef __devexit_p
+	#define __devexit_p(x) &(x)
+#endif
+
+#endif /* 2.4.17 => 2.4.13 */
+
+/*****************************************************************************/
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,4,18) )
+#define NETIF_MSG_HW	0x2000
+#define NETIF_MSG_WOL	0x4000
+
+#ifndef netif_msg_hw
+#define netif_msg_hw(p)		((p)->msg_enable & NETIF_MSG_HW)
+#endif
+#ifndef netif_msg_wol
+#define netif_msg_wol(p)	((p)->msg_enable & NETIF_MSG_WOL)
+#endif
+#endif /* 2.4.18 */
+
+/*****************************************************************************/
+
+/*****************************************************************************/
+/* 2.4.20 => 2.4.19 */
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,4,20) )
+
+/* we won't support NAPI on less than 2.4.20 */
+#ifdef NAPI
+#undef NAPI
+#endif
+
+#endif /* 2.4.20 => 2.4.19 */
+
+/*****************************************************************************/
+/* 2.4.22 => 2.4.17 */
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,4,22) )
+#define pci_name(x)	((x)->slot_name)
+
+#ifndef SUPPORTED_10000baseT_Full
+#define SUPPORTED_10000baseT_Full	BIT(12)
+#endif
+#ifndef ADVERTISED_10000baseT_Full
+#define ADVERTISED_10000baseT_Full	BIT(12)
+#endif
+#endif
+
+/*****************************************************************************/
+/*****************************************************************************/
+/* 2.4.23 => 2.4.22 */
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,4,23) )
+/*****************************************************************************/
+#ifdef NAPI
+#ifndef netif_poll_disable
+#define netif_poll_disable(x) _kc_netif_poll_disable(x)
+static inline void _kc_netif_poll_disable(struct net_device *netdev)
+{
+	while (test_and_set_bit(__LINK_STATE_RX_SCHED, &netdev->state)) {
+		/* No hurry */
+		current->state = TASK_INTERRUPTIBLE;
+		schedule_timeout(1);
+	}
+}
+#endif
+#ifndef netif_poll_enable
+#define netif_poll_enable(x) _kc_netif_poll_enable(x)
+static inline void _kc_netif_poll_enable(struct net_device *netdev)
+{
+	clear_bit(__LINK_STATE_RX_SCHED, &netdev->state);
+}
+#endif
+#endif /* NAPI */
+#ifndef netif_tx_disable
+#define netif_tx_disable(x) _kc_netif_tx_disable(x)
+static inline void _kc_netif_tx_disable(struct net_device *dev)
+{
+	spin_lock_bh(&dev->xmit_lock);
+	netif_stop_queue(dev);
+	spin_unlock_bh(&dev->xmit_lock);
+}
+#endif
+#else /* 2.4.23 => 2.4.22 */
+#define HAVE_SCTP
+#endif /* 2.4.23 => 2.4.22 */
+
+/*****************************************************************************/
+/* 2.6.4 => 2.6.0 */
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,4,25) || \
+    ( LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0) && \
+      LINUX_VERSION_CODE < KERNEL_VERSION(2,6,4) ) )
+#define ETHTOOL_OPS_COMPAT
+#endif /* 2.6.4 => 2.6.0 */
+
+/*****************************************************************************/
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,4,27) )
+#define __user
+#endif /* < 2.4.27 */
+
+/*****************************************************************************/
+/* 2.5.71 => 2.4.x */
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,5,71) )
+#define sk_protocol protocol
+#define pci_get_device pci_find_device
+#endif /* 2.5.70 => 2.4.x */
+
+/*****************************************************************************/
+/* < 2.4.27 or 2.6.0 <= 2.6.5 */
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,4,27) || \
+    ( LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0) && \
+      LINUX_VERSION_CODE < KERNEL_VERSION(2,6,5) ) )
+
+#ifndef netif_msg_init
+#define netif_msg_init _kc_netif_msg_init
+static inline u32 _kc_netif_msg_init(int debug_value, int default_msg_enable_bits)
+{
+	/* use default */
+	if (debug_value < 0 || debug_value >= (sizeof(u32) * 8))
+		return default_msg_enable_bits;
+	if (debug_value == 0) /* no output */
+		return 0;
+	/* set low N bits */
+	return (1 << debug_value) -1;
+}
+#endif
+
+#endif /* < 2.4.27 or 2.6.0 <= 2.6.5 */
+/*****************************************************************************/
+#if (( LINUX_VERSION_CODE < KERNEL_VERSION(2,4,27) ) || \
+     (( LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0) ) && \
+      ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,3) )))
+#define netdev_priv(x) x->priv
+#endif
+
+/*****************************************************************************/
+/* <= 2.5.0 */
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0) )
+#include <linux/rtnetlink.h>
+#undef pci_register_driver
+#define pci_register_driver pci_module_init
+
+/*
+ * Most of the dma compat code is copied/modifed from the 2.4.37
+ * /include/linux/libata-compat.h header file
+ */
+/* These definitions mirror those in pci.h, so they can be used
+ * interchangeably with their PCI_ counterparts */
+enum dma_data_direction {
+	DMA_BIDIRECTIONAL = 0,
+	DMA_TO_DEVICE = 1,
+	DMA_FROM_DEVICE = 2,
+	DMA_NONE = 3,
+};
+
+struct device {
+	struct pci_dev pdev;
+};
+
+static inline struct pci_dev *to_pci_dev (struct device *dev)
+{
+	return (struct pci_dev *) dev;
+}
+static inline struct device *pci_dev_to_dev(struct pci_dev *pdev)
+{
+	return (struct device *) pdev;
+}
+#define pdev_printk(lvl, pdev, fmt, args...) 	\
+	printk("%s %s: " fmt, lvl, pci_name(pdev), ## args)
+#define dev_err(dev, fmt, args...)            \
+	pdev_printk(KERN_ERR, to_pci_dev(dev), fmt, ## args)
+#define dev_info(dev, fmt, args...)            \
+	pdev_printk(KERN_INFO, to_pci_dev(dev), fmt, ## args)
+#define dev_warn(dev, fmt, args...)            \
+	pdev_printk(KERN_WARNING, to_pci_dev(dev), fmt, ## args)
+#define dev_notice(dev, fmt, args...)            \
+	pdev_printk(KERN_NOTICE, to_pci_dev(dev), fmt, ## args)
+#define dev_dbg(dev, fmt, args...) \
+	pdev_printk(KERN_DEBUG, to_pci_dev(dev), fmt, ## args)
+
+/* NOTE: dangerous! we ignore the 'gfp' argument */
+#define dma_alloc_coherent(dev,sz,dma,gfp) \
+	pci_alloc_consistent(to_pci_dev(dev),(sz),(dma))
+#define dma_free_coherent(dev,sz,addr,dma_addr) \
+	pci_free_consistent(to_pci_dev(dev),(sz),(addr),(dma_addr))
+
+#define dma_map_page(dev,a,b,c,d) \
+	pci_map_page(to_pci_dev(dev),(a),(b),(c),(d))
+#define dma_unmap_page(dev,a,b,c) \
+	pci_unmap_page(to_pci_dev(dev),(a),(b),(c))
+
+#define dma_map_single(dev,a,b,c) \
+	pci_map_single(to_pci_dev(dev),(a),(b),(c))
+#define dma_unmap_single(dev,a,b,c) \
+	pci_unmap_single(to_pci_dev(dev),(a),(b),(c))
+
+#define dma_map_sg(dev, sg, nents, dir) \
+	pci_map_sg(to_pci_dev(dev), (sg), (nents), (dir)
+#define dma_unmap_sg(dev, sg, nents, dir) \
+	pci_unmap_sg(to_pci_dev(dev), (sg), (nents), (dir)
+
+#define dma_sync_single(dev,a,b,c) \
+	pci_dma_sync_single(to_pci_dev(dev),(a),(b),(c))
+
+/* for range just sync everything, that's all the pci API can do */
+#define dma_sync_single_range(dev,addr,off,sz,dir) \
+	pci_dma_sync_single(to_pci_dev(dev),(addr),(off)+(sz),(dir))
+
+#define dma_set_mask(dev,mask) \
+	pci_set_dma_mask(to_pci_dev(dev),(mask))
+
+/* hlist_* code - double linked lists */
+struct hlist_head {
+	struct hlist_node *first;
+};
+
+struct hlist_node {
+	struct hlist_node *next, **pprev;
+};
+
+static inline void __hlist_del(struct hlist_node *n)
+{
+	struct hlist_node *next = n->next;
+	struct hlist_node **pprev = n->pprev;
+	*pprev = next;
+	if (next)
+	next->pprev = pprev;
+}
+
+static inline void hlist_del(struct hlist_node *n)
+{
+	__hlist_del(n);
+	n->next = NULL;
+	n->pprev = NULL;
+}
+
+static inline void hlist_add_head(struct hlist_node *n, struct hlist_head *h)
+{
+	struct hlist_node *first = h->first;
+	n->next = first;
+	if (first)
+		first->pprev = &n->next;
+	h->first = n;
+	n->pprev = &h->first;
+}
+
+static inline int hlist_empty(const struct hlist_head *h)
+{
+	return !h->first;
+}
+#define HLIST_HEAD_INIT { .first = NULL }
+#define HLIST_HEAD(name) struct hlist_head name = {  .first = NULL }
+#define INIT_HLIST_HEAD(ptr) ((ptr)->first = NULL)
+static inline void INIT_HLIST_NODE(struct hlist_node *h)
+{
+	h->next = NULL;
+	h->pprev = NULL;
+}
+
+#ifndef might_sleep
+#define might_sleep()
+#endif
+#else
+static inline struct device *pci_dev_to_dev(struct pci_dev *pdev)
+{
+	return &pdev->dev;
+}
+#endif /* <= 2.5.0 */
+
+/*****************************************************************************/
+/* 2.5.28 => 2.4.23 */
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,5,28) )
+
+#include <linux/tqueue.h>
+#define work_struct tq_struct
+#undef INIT_WORK
+#define INIT_WORK(a,b) INIT_TQUEUE(a,(void (*)(void *))b,a)
+#undef container_of
+#define container_of list_entry
+#define schedule_work schedule_task
+#define flush_scheduled_work flush_scheduled_tasks
+#define cancel_work_sync(x) flush_scheduled_work()
+
+#endif /* 2.5.28 => 2.4.17 */
+
+/*****************************************************************************/
+/* 2.6.0 => 2.5.28 */
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0) )
+#ifndef read_barrier_depends
+#define read_barrier_depends() rmb()
+#endif
+
+#ifndef rcu_head
+struct __kc_callback_head {
+	struct __kc_callback_head *next;
+	void (*func)(struct callback_head *head);
+};
+#define rcu_head __kc_callback_head
+#endif
+
+#undef get_cpu
+#define get_cpu() smp_processor_id()
+#undef put_cpu
+#define put_cpu() do { } while(0)
+#define MODULE_INFO(version, _version)
+#ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
+#define CONFIG_E1000_DISABLE_PACKET_SPLIT 1
+#endif
+#ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
+#define CONFIG_IGB_DISABLE_PACKET_SPLIT 1
+#endif
+#ifndef CONFIG_IGC_DISABLE_PACKET_SPLIT
+#define CONFIG_IGC_DISABLE_PACKET_SPLIT 1
+#endif
+
+#define dma_set_coherent_mask(dev,mask) 1
+
+#undef dev_put
+#define dev_put(dev) __dev_put(dev)
+
+#ifndef skb_fill_page_desc
+#define skb_fill_page_desc _kc_skb_fill_page_desc
+void _kc_skb_fill_page_desc(struct sk_buff *skb, int i, struct page *page, int off, int size);
+#endif
+
+#undef ALIGN
+#define ALIGN(x,a) (((x)+(a)-1)&~((a)-1))
+
+#ifndef page_count
+#define page_count(p) atomic_read(&(p)->count)
+#endif
+
+#ifdef MAX_NUMNODES
+#undef MAX_NUMNODES
+#endif
+#define MAX_NUMNODES 1
+
+/* find_first_bit and find_next bit are not defined for most
+ * 2.4 kernels (except for the redhat 2.4.21 kernels
+ */
+#include <linux/bitops.h>
+#define BITOP_WORD(nr)          ((nr) / BITS_PER_LONG)
+#undef find_next_bit
+#define find_next_bit _kc_find_next_bit
+unsigned long _kc_find_next_bit(const unsigned long *addr, unsigned long size,
+				unsigned long offset);
+#define find_first_bit(addr, size) find_next_bit((addr), (size), 0)
+
+#ifndef netdev_name
+static inline const char *_kc_netdev_name(const struct net_device *dev)
+{
+	if (strchr(dev->name, '%'))
+		return "(unregistered net_device)";
+	return dev->name;
+}
+#define netdev_name(netdev)	_kc_netdev_name(netdev)
+#endif /* netdev_name */
+
+#ifndef strlcpy
+#define strlcpy _kc_strlcpy
+size_t _kc_strlcpy(char *dest, const char *src, size_t size);
+#endif /* strlcpy */
+
+#ifndef do_div
+#if BITS_PER_LONG == 64
+# define do_div(n,base) ({					\
+	uint32_t __base = (base);				\
+	uint32_t __rem;						\
+	__rem = ((uint64_t)(n)) % __base;			\
+	(n) = ((uint64_t)(n)) / __base;				\
+	__rem;							\
+ })
+#elif BITS_PER_LONG == 32
+uint32_t _kc__div64_32(uint64_t *dividend, uint32_t divisor);
+# define do_div(n,base) ({				\
+	uint32_t __base = (base);			\
+	uint32_t __rem;					\
+	if (likely(((n) >> 32) == 0)) {			\
+		__rem = (uint32_t)(n) % __base;		\
+		(n) = (uint32_t)(n) / __base;		\
+	} else 						\
+		__rem = _kc__div64_32(&(n), __base);	\
+	__rem;						\
+ })
+#else /* BITS_PER_LONG == ?? */
+# error do_div() does not yet support the C64
+#endif /* BITS_PER_LONG */
+#endif /* do_div */
+
+#ifndef NSEC_PER_SEC
+#define NSEC_PER_SEC	1000000000L
+#endif
+
+#undef HAVE_I2C_SUPPORT
+#else /* 2.6.0 */
+
+#endif /* 2.6.0 => 2.5.28 */
+/*****************************************************************************/
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,3) )
+#define dma_pool pci_pool
+#define dma_pool_destroy pci_pool_destroy
+#define dma_pool_alloc pci_pool_alloc
+#define dma_pool_free pci_pool_free
+
+#define dma_pool_create(name,dev,size,align,allocation) \
+       pci_pool_create((name),to_pci_dev(dev),(size),(align),(allocation))
+#endif /* < 2.6.3 */
+
+/*****************************************************************************/
+/* 2.6.4 => 2.6.0 */
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,4) )
+#define MODULE_VERSION(_version) MODULE_INFO(version, _version)
+#endif /* 2.6.4 => 2.6.0 */
+
+/*****************************************************************************/
+/* 2.6.5 => 2.6.0 */
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,5) )
+#define dma_sync_single_for_cpu		dma_sync_single
+#define dma_sync_single_for_device	dma_sync_single
+#define dma_sync_single_range_for_cpu		dma_sync_single_range
+#define dma_sync_single_range_for_device	dma_sync_single_range
+#ifndef pci_dma_mapping_error
+#define pci_dma_mapping_error _kc_pci_dma_mapping_error
+static inline int _kc_pci_dma_mapping_error(dma_addr_t dma_addr)
+{
+	return dma_addr == 0;
+}
+#endif
+#endif /* 2.6.5 => 2.6.0 */
+
+/*****************************************************************************/
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,4) )
+int _kc_scnprintf(char * buf, size_t size, const char *fmt, ...);
+#define scnprintf(buf, size, fmt, args...) _kc_scnprintf(buf, size, fmt, ##args)
+#endif /* < 2.6.4 */
+
+/*****************************************************************************/
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,6) )
+/* taken from 2.6 include/linux/bitmap.h */
+#undef bitmap_zero
+#define bitmap_zero _kc_bitmap_zero
+static inline void _kc_bitmap_zero(unsigned long *dst, int nbits)
+{
+        if (nbits <= BITS_PER_LONG)
+                *dst = 0UL;
+        else {
+                int len = BITS_TO_LONGS(nbits) * sizeof(unsigned long);
+                memset(dst, 0, len);
+        }
+}
+#define page_to_nid(x) 0
+
+#endif /* < 2.6.6 */
+
+/*****************************************************************************/
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,7) )
+#undef if_mii
+#define if_mii _kc_if_mii
+static inline struct mii_ioctl_data *_kc_if_mii(struct ifreq *rq)
+{
+	return (struct mii_ioctl_data *) &rq->ifr_ifru;
+}
+
+#ifndef __force
+#define __force
+#endif
+#endif /* < 2.6.7 */
+
+/*****************************************************************************/
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,8) )
+#ifndef PCI_EXP_DEVCTL
+#define PCI_EXP_DEVCTL 8
+#endif
+#ifndef PCI_EXP_DEVCTL_CERE
+#define PCI_EXP_DEVCTL_CERE 0x0001
+#endif
+#define PCI_EXP_FLAGS		2	/* Capabilities register */
+#define PCI_EXP_FLAGS_VERS	0x000f	/* Capability version */
+#define PCI_EXP_FLAGS_TYPE	0x00f0	/* Device/Port type */
+#define  PCI_EXP_TYPE_ENDPOINT	0x0	/* Express Endpoint */
+#define  PCI_EXP_TYPE_LEG_END	0x1	/* Legacy Endpoint */
+#define  PCI_EXP_TYPE_ROOT_PORT 0x4	/* Root Port */
+#define  PCI_EXP_TYPE_DOWNSTREAM 0x6	/* Downstream Port */
+#define PCI_EXP_FLAGS_SLOT	0x0100	/* Slot implemented */
+#define PCI_EXP_DEVCAP		4	/* Device capabilities */
+#define PCI_EXP_DEVSTA		10	/* Device Status */
+#define msleep(x)	do { set_current_state(TASK_UNINTERRUPTIBLE); \
+				schedule_timeout((x * HZ)/1000 + 2); \
+			} while (0)
+
+#endif /* < 2.6.8 */
+
+/*****************************************************************************/
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,9))
+#include <net/dsfield.h>
+#define __iomem
+
+#ifndef kcalloc
+#define kcalloc(n, size, flags) _kc_kzalloc(((n) * (size)), flags)
+void *_kc_kzalloc(size_t size, int flags);
+#endif
+#define MSEC_PER_SEC    1000L
+static inline unsigned int _kc_jiffies_to_msecs(const unsigned long j)
+{
+#if HZ <= MSEC_PER_SEC && !(MSEC_PER_SEC % HZ)
+	return (MSEC_PER_SEC / HZ) * j;
+#elif HZ > MSEC_PER_SEC && !(HZ % MSEC_PER_SEC)
+	return (j + (HZ / MSEC_PER_SEC) - 1)/(HZ / MSEC_PER_SEC);
+#else
+	return (j * MSEC_PER_SEC) / HZ;
+#endif
+}
+static inline unsigned long _kc_msecs_to_jiffies(const unsigned int m)
+{
+	if (m > _kc_jiffies_to_msecs(MAX_JIFFY_OFFSET))
+		return MAX_JIFFY_OFFSET;
+#if HZ <= MSEC_PER_SEC && !(MSEC_PER_SEC % HZ)
+	return (m + (MSEC_PER_SEC / HZ) - 1) / (MSEC_PER_SEC / HZ);
+#elif HZ > MSEC_PER_SEC && !(HZ % MSEC_PER_SEC)
+	return m * (HZ / MSEC_PER_SEC);
+#else
+	return (m * HZ + MSEC_PER_SEC - 1) / MSEC_PER_SEC;
+#endif
+}
+
+#define msleep_interruptible _kc_msleep_interruptible
+static inline unsigned long _kc_msleep_interruptible(unsigned int msecs)
+{
+	unsigned long timeout = _kc_msecs_to_jiffies(msecs) + 1;
+
+	while (timeout && !signal_pending(current)) {
+		__set_current_state(TASK_INTERRUPTIBLE);
+		timeout = schedule_timeout(timeout);
+	}
+	return _kc_jiffies_to_msecs(timeout);
+}
+
+/* Basic mode control register. */
+#define BMCR_SPEED1000		0x0040  /* MSB of Speed (1000)         */
+
+#ifndef __le16
+#define __le16 u16
+#endif
+#ifndef __le32
+#define __le32 u32
+#endif
+#ifndef __le64
+#define __le64 u64
+#endif
+#ifndef __be16
+#define __be16 u16
+#endif
+#ifndef __be32
+#define __be32 u32
+#endif
+#ifndef __be64
+#define __be64 u64
+#endif
+
+static inline struct vlan_ethhdr *vlan_eth_hdr(const struct sk_buff *skb)
+{
+	return (struct vlan_ethhdr *)skb->mac.raw;
+}
+
+/* Wake-On-Lan options. */
+#define WAKE_PHY		BIT(0)
+#define WAKE_UCAST		BIT(1)
+#define WAKE_MCAST		BIT(2)
+#define WAKE_BCAST		BIT(3)
+#define WAKE_ARP		BIT(4)
+#define WAKE_MAGIC		BIT(5)
+#define WAKE_MAGICSECURE	BIT(6) /* only meaningful if WAKE_MAGIC */
+
+#define skb_header_pointer _kc_skb_header_pointer
+static inline void *_kc_skb_header_pointer(const struct sk_buff *skb,
+					    int offset, int len, void *buffer)
+{
+	int hlen = skb_headlen(skb);
+
+	if (hlen - offset >= len)
+		return skb->data + offset;
+
+#ifdef MAX_SKB_FRAGS
+	if (skb_copy_bits(skb, offset, buffer, len) < 0)
+		return NULL;
+
+	return buffer;
+#else
+	return NULL;
+#endif
+
+#ifndef NETDEV_TX_OK
+#define NETDEV_TX_OK 0
+#endif
+#ifndef NETDEV_TX_BUSY
+#define NETDEV_TX_BUSY 1
+#endif
+#ifndef NETDEV_TX_LOCKED
+#define NETDEV_TX_LOCKED -1
+#endif
+}
+
+#ifndef __bitwise
+#define __bitwise
+#endif
+#endif /* < 2.6.9 */
+
+/*****************************************************************************/
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,10) )
+#ifdef module_param_array_named
+#undef module_param_array_named
+#define module_param_array_named(name, array, type, nump, perm)          \
+	static struct kparam_array __param_arr_##name                    \
+	= { ARRAY_SIZE(array), nump, param_set_##type, param_get_##type, \
+	    sizeof(array[0]), array };                                   \
+	module_param_call(name, param_array_set, param_array_get,        \
+			  &__param_arr_##name, perm)
+#endif /* module_param_array_named */
+/*
+ * num_online is broken for all < 2.6.10 kernels.
+ */
+#undef num_online_nodes
+#define num_online_nodes(n) 1
+extern DECLARE_BITMAP(_kcompat_node_online_map, MAX_NUMNODES);
+#undef node_online_map
+#define node_online_map _kcompat_node_online_map
+#define pci_get_class pci_find_class
+#endif /* < 2.6.10 */
+
+/*****************************************************************************/
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,11) )
+#define PCI_D0      0
+#define PCI_D1      1
+#define PCI_D2      2
+#define PCI_D3hot   3
+#define PCI_D3cold  4
+typedef int pci_power_t;
+#define pci_choose_state(pdev,state) state
+#define PMSG_SUSPEND 3
+#define PCI_EXP_LNKCTL	16
+
+#undef NETIF_F_LLTX
+
+#ifndef ARCH_HAS_PREFETCH
+#define prefetch(X)
+#endif
+
+#ifndef NET_IP_ALIGN
+#define NET_IP_ALIGN 2
+#endif
+
+#define KC_USEC_PER_SEC	1000000L
+#define usecs_to_jiffies _kc_usecs_to_jiffies
+static inline unsigned int _kc_jiffies_to_usecs(const unsigned long j)
+{
+#if HZ <= KC_USEC_PER_SEC && !(KC_USEC_PER_SEC % HZ)
+	return (KC_USEC_PER_SEC / HZ) * j;
+#elif HZ > KC_USEC_PER_SEC && !(HZ % KC_USEC_PER_SEC)
+	return (j + (HZ / KC_USEC_PER_SEC) - 1)/(HZ / KC_USEC_PER_SEC);
+#else
+	return (j * KC_USEC_PER_SEC) / HZ;
+#endif
+}
+static inline unsigned long _kc_usecs_to_jiffies(const unsigned int m)
+{
+	if (m > _kc_jiffies_to_usecs(MAX_JIFFY_OFFSET))
+		return MAX_JIFFY_OFFSET;
+#if HZ <= KC_USEC_PER_SEC && !(KC_USEC_PER_SEC % HZ)
+	return (m + (KC_USEC_PER_SEC / HZ) - 1) / (KC_USEC_PER_SEC / HZ);
+#elif HZ > KC_USEC_PER_SEC && !(HZ % KC_USEC_PER_SEC)
+	return m * (HZ / KC_USEC_PER_SEC);
+#else
+	return (m * HZ + KC_USEC_PER_SEC - 1) / KC_USEC_PER_SEC;
+#endif
+}
+
+#define PCI_EXP_LNKCAP		12	/* Link Capabilities */
+#define PCI_EXP_LNKSTA		18	/* Link Status */
+#define PCI_EXP_SLTCAP		20	/* Slot Capabilities */
+#define PCI_EXP_SLTCTL		24	/* Slot Control */
+#define PCI_EXP_SLTSTA		26	/* Slot Status */
+#define PCI_EXP_RTCTL		28	/* Root Control */
+#define PCI_EXP_RTCAP		30	/* Root Capabilities */
+#define PCI_EXP_RTSTA		32	/* Root Status */
+#endif /* < 2.6.11 */
+
+/*****************************************************************************/
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,12) )
+#include <linux/reboot.h>
+#define USE_REBOOT_NOTIFIER
+
+/* Generic MII registers. */
+#define MII_CTRL1000        0x09        /* 1000BASE-T control          */
+#define MII_STAT1000        0x0a        /* 1000BASE-T status           */
+/* Advertisement control register. */
+#define ADVERTISE_PAUSE_CAP     0x0400  /* Try for pause               */
+#define ADVERTISE_PAUSE_ASYM    0x0800  /* Try for asymmetric pause     */
+/* Link partner ability register. */
+#define LPA_PAUSE_CAP		0x0400	/* Can pause                   */
+#define LPA_PAUSE_ASYM		0x0800	/* Can pause asymetrically     */
+/* 1000BASE-T Control register */
+#define ADVERTISE_1000FULL      0x0200  /* Advertise 1000BASE-T full duplex */
+#define ADVERTISE_1000HALF	0x0100  /* Advertise 1000BASE-T half duplex */
+/* 1000BASE-T Status register */
+#define LPA_1000LOCALRXOK	0x2000	/* Link partner local receiver status */
+#define LPA_1000REMRXOK		0x1000	/* Link partner remote receiver status */
+
+#ifndef is_zero_ether_addr
+#define is_zero_ether_addr _kc_is_zero_ether_addr
+static inline int _kc_is_zero_ether_addr(const u8 *addr)
+{
+	return !(addr[0] | addr[1] | addr[2] | addr[3] | addr[4] | addr[5]);
+}
+#endif /* is_zero_ether_addr */
+#ifndef is_multicast_ether_addr
+#define is_multicast_ether_addr _kc_is_multicast_ether_addr
+static inline int _kc_is_multicast_ether_addr(const u8 *addr)
+{
+	return addr[0] & 0x01;
+}
+#endif /* is_multicast_ether_addr */
+#endif /* < 2.6.12 */
+
+/*****************************************************************************/
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,13) )
+#ifndef kstrdup
+#define kstrdup _kc_kstrdup
+char *_kc_kstrdup(const char *s, unsigned int gfp);
+#endif
+#endif /* < 2.6.13 */
+
+/*****************************************************************************/
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,14) )
+#define pm_message_t u32
+#ifndef kzalloc
+#define kzalloc _kc_kzalloc
+void *_kc_kzalloc(size_t size, int flags);
+#endif
+
+/* Generic MII registers. */
+#define MII_ESTATUS	    0x0f	/* Extended Status */
+/* Basic mode status register. */
+#define BMSR_ESTATEN		0x0100	/* Extended Status in R15 */
+/* Extended status register. */
+#define ESTATUS_1000_TFULL	0x2000	/* Can do 1000BT Full */
+#define ESTATUS_1000_THALF	0x1000	/* Can do 1000BT Half */
+
+#define SUPPORTED_Pause	        BIT(13)
+#define SUPPORTED_Asym_Pause	BIT(14)
+#define ADVERTISED_Pause	BIT(13)
+#define ADVERTISED_Asym_Pause	BIT(14)
+
+#if (!(RHEL_RELEASE_CODE && \
+       (RHEL_RELEASE_CODE > RHEL_RELEASE_VERSION(4,3)) && \
+       (RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(5,0))))
+#if ((LINUX_VERSION_CODE == KERNEL_VERSION(2,6,9)) && !defined(gfp_t))
+#define gfp_t unsigned
+#else
+typedef unsigned gfp_t;
+#endif
+#endif /* !RHEL4.3->RHEL5.0 */
+
+#if ( LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,9) )
+#ifdef CONFIG_X86_64
+#define dma_sync_single_range_for_cpu(dev, addr, off, sz, dir)       \
+	dma_sync_single_for_cpu((dev), (addr), (off) + (sz), (dir))
+#define dma_sync_single_range_for_device(dev, addr, off, sz, dir)    \
+	dma_sync_single_for_device((dev), (addr), (off) + (sz), (dir))
+#endif
+#endif
+#endif /* < 2.6.14 */
+
+/*****************************************************************************/
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,15) )
+#ifndef kfree_rcu
+/* this is placed here due to a lack of rcu_barrier in previous kernels */
+#define kfree_rcu(_ptr, _offset) kfree(_ptr)
+#endif /* kfree_rcu */
+#ifndef vmalloc_node
+#define vmalloc_node(a,b) vmalloc(a)
+#endif /* vmalloc_node*/
+
+#define setup_timer(_timer, _function, _data) \
+do { \
+	(_timer)->function = _function; \
+	(_timer)->data = _data; \
+	init_timer(_timer); \
+} while (0)
+#ifndef device_can_wakeup
+#define device_can_wakeup(dev)	(1)
+#endif
+#ifndef device_set_wakeup_enable
+#define device_set_wakeup_enable(dev, val)	do{}while(0)
+#endif
+#ifndef device_init_wakeup
+#define device_init_wakeup(dev,val) do {} while (0)
+#endif
+static inline unsigned _kc_compare_ether_addr(const u8 *addr1, const u8 *addr2)
+{
+	const u16 *a = (const u16 *) addr1;
+	const u16 *b = (const u16 *) addr2;
+
+	return ((a[0] ^ b[0]) | (a[1] ^ b[1]) | (a[2] ^ b[2])) != 0;
+}
+#undef compare_ether_addr
+#define compare_ether_addr(addr1, addr2) _kc_compare_ether_addr(addr1, addr2)
+#endif /* < 2.6.15 */
+
+/*****************************************************************************/
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,16) )
+#undef DEFINE_MUTEX
+#define DEFINE_MUTEX(x)	DECLARE_MUTEX(x)
+#define mutex_lock(x)	down_interruptible(x)
+#define mutex_unlock(x)	up(x)
+
+#ifndef ____cacheline_internodealigned_in_smp
+#ifdef CONFIG_SMP
+#define ____cacheline_internodealigned_in_smp ____cacheline_aligned_in_smp
+#else
+#define ____cacheline_internodealigned_in_smp
+#endif /* CONFIG_SMP */
+#endif /* ____cacheline_internodealigned_in_smp */
+#undef HAVE_PCI_ERS
+#else /* 2.6.16 and above */
+#undef HAVE_PCI_ERS
+#define HAVE_PCI_ERS
+#if ( SLE_VERSION_CODE && SLE_VERSION_CODE == SLE_VERSION(10,4,0) )
+#ifdef device_can_wakeup
+#undef device_can_wakeup
+#endif /* device_can_wakeup */
+#define device_can_wakeup(dev) 1
+#endif /* SLE_VERSION(10,4,0) */
+#endif /* < 2.6.16 */
+
+/*****************************************************************************/
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,17) )
+#ifndef dev_notice
+#define dev_notice(dev, fmt, args...)            \
+	dev_printk(KERN_NOTICE, dev, fmt, ## args)
+#endif
+
+#ifndef first_online_node
+#define first_online_node 0
+#endif
+#ifndef NET_SKB_PAD
+#define NET_SKB_PAD 16
+#endif
+#endif /* < 2.6.17 */
+
+/*****************************************************************************/
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,18) )
+
+#ifndef IRQ_HANDLED
+#define irqreturn_t void
+#define IRQ_HANDLED
+#define IRQ_NONE
+#endif
+
+#ifndef IRQF_PROBE_SHARED
+#ifdef SA_PROBEIRQ
+#define IRQF_PROBE_SHARED SA_PROBEIRQ
+#else
+#define IRQF_PROBE_SHARED 0
+#endif
+#endif
+
+#ifndef IRQF_SHARED
+#define IRQF_SHARED SA_SHIRQ
+#endif
+
+#ifndef ARRAY_SIZE
+#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
+#endif
+
+#ifndef skb_is_gso
+#ifdef NETIF_F_TSO
+#define skb_is_gso _kc_skb_is_gso
+static inline int _kc_skb_is_gso(const struct sk_buff *skb)
+{
+	return skb_shinfo(skb)->gso_size;
+}
+#else
+#define skb_is_gso(a) 0
+#endif
+#endif
+
+#ifndef resource_size_t
+#define resource_size_t unsigned long
+#endif
+
+#ifdef skb_pad
+#undef skb_pad
+#endif
+#define skb_pad(x,y) _kc_skb_pad(x, y)
+int _kc_skb_pad(struct sk_buff *skb, int pad);
+#ifdef skb_padto
+#undef skb_padto
+#endif
+#define skb_padto(x,y) _kc_skb_padto(x, y)
+static inline int _kc_skb_padto(struct sk_buff *skb, unsigned int len)
+{
+	unsigned int size = skb->len;
+	if(likely(size >= len))
+		return 0;
+	return _kc_skb_pad(skb, len - size);
+}
+
+#ifndef DECLARE_PCI_UNMAP_ADDR
+#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) \
+	dma_addr_t ADDR_NAME
+#define DECLARE_PCI_UNMAP_LEN(LEN_NAME) \
+	u32 LEN_NAME
+#define pci_unmap_addr(PTR, ADDR_NAME) \
+	((PTR)->ADDR_NAME)
+#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) \
+	(((PTR)->ADDR_NAME) = (VAL))
+#define pci_unmap_len(PTR, LEN_NAME) \
+	((PTR)->LEN_NAME)
+#define pci_unmap_len_set(PTR, LEN_NAME, VAL) \
+	(((PTR)->LEN_NAME) = (VAL))
+#endif /* DECLARE_PCI_UNMAP_ADDR */
+#endif /* < 2.6.18 */
+
+/*****************************************************************************/
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19) )
+enum pcie_link_width {
+	PCIE_LNK_WIDTH_RESRV    = 0x00,
+	PCIE_LNK_X1             = 0x01,
+	PCIE_LNK_X2             = 0x02,
+	PCIE_LNK_X4             = 0x04,
+	PCIE_LNK_X8             = 0x08,
+	PCIE_LNK_X12            = 0x0C,
+	PCIE_LNK_X16            = 0x10,
+	PCIE_LNK_X32            = 0x20,
+	PCIE_LNK_WIDTH_UNKNOWN  = 0xFF,
+};
+
+#if (!(RHEL_RELEASE_CODE && RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(5,0)))
+#define i_private u.generic_ip
+#endif /* >= RHEL 5.0 */
+
+#ifndef DIV_ROUND_UP
+#define DIV_ROUND_UP(n,d) (((n) + (d) - 1) / (d))
+#endif
+#ifndef __ALIGN_MASK
+#define __ALIGN_MASK(x, mask) (((x) + (mask)) & ~(mask))
+#endif
+#if ( LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0) )
+#if (!((RHEL_RELEASE_CODE && \
+        ((RHEL_RELEASE_CODE > RHEL_RELEASE_VERSION(4,4) && \
+          RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(5,0)) || \
+         (RHEL_RELEASE_CODE > RHEL_RELEASE_VERSION(5,0))))))
+typedef irqreturn_t (*irq_handler_t)(int, void*, struct pt_regs *);
+#endif
+#if (RHEL_RELEASE_CODE && RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(6,0))
+#undef CONFIG_INET_LRO
+#undef CONFIG_INET_LRO_MODULE
+#undef CONFIG_FCOE
+#undef CONFIG_FCOE_MODULE
+#endif
+typedef irqreturn_t (*new_handler_t)(int, void*);
+static inline irqreturn_t _kc_request_irq(unsigned int irq, new_handler_t handler, unsigned long flags, const char *devname, void *dev_id)
+#else /* 2.4.x */
+typedef void (*irq_handler_t)(int, void*, struct pt_regs *);
+typedef void (*new_handler_t)(int, void*);
+static inline int _kc_request_irq(unsigned int irq, new_handler_t handler, unsigned long flags, const char *devname, void *dev_id)
+#endif /* >= 2.5.x */
+{
+	irq_handler_t new_handler = (irq_handler_t) handler;
+	return request_irq(irq, new_handler, flags, devname, dev_id);
+}
+
+#undef request_irq
+#define request_irq(irq, handler, flags, devname, dev_id) _kc_request_irq((irq), (handler), (flags), (devname), (dev_id))
+
+#define irq_handler_t new_handler_t
+
+#if ( LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,11) )
+#ifndef skb_checksum_help
+static inline int __kc_skb_checksum_help(struct sk_buff *skb)
+{
+	return skb_checksum_help(skb, 0);
+}
+#define skb_checksum_help(skb) __kc_skb_checksum_help((skb))
+#endif
+#endif /* < 2.6.19 && >= 2.6.11 */
+
+/* pci_restore_state and pci_save_state handles MSI/PCIE from 2.6.19 */
+#if (!(RHEL_RELEASE_CODE && RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(5,4)))
+#define PCIE_CONFIG_SPACE_LEN 256
+#define PCI_CONFIG_SPACE_LEN 64
+#define PCIE_LINK_STATUS 0x12
+#define pci_config_space_ich8lan() do {} while(0)
+#undef pci_save_state
+int _kc_pci_save_state(struct pci_dev *);
+#define pci_save_state(pdev) _kc_pci_save_state(pdev)
+#undef pci_restore_state
+void _kc_pci_restore_state(struct pci_dev *);
+#define pci_restore_state(pdev) _kc_pci_restore_state(pdev)
+#endif /* !(RHEL_RELEASE_CODE >= RHEL 5.4) */
+
+#ifdef HAVE_PCI_ERS
+#undef free_netdev
+void _kc_free_netdev(struct net_device *);
+#define free_netdev(netdev) _kc_free_netdev(netdev)
+#endif
+static inline int pci_enable_pcie_error_reporting(struct pci_dev __always_unused *dev)
+{
+	return 0;
+}
+#define pci_disable_pcie_error_reporting(dev) do {} while (0)
+#define pci_cleanup_aer_uncorrect_error_status(dev) do {} while (0)
+
+void *_kc_kmemdup(const void *src, size_t len, unsigned gfp);
+#define kmemdup(src, len, gfp) _kc_kmemdup(src, len, gfp)
+#ifndef bool
+#define bool _Bool
+#define true 1
+#define false 0
+#endif
+#else /* 2.6.19 */
+#include <linux/aer.h>
+#include <linux/pci_hotplug.h>
+
+#define NEW_SKB_CSUM_HELP
+#endif /* < 2.6.19 */
+
+/*****************************************************************************/
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20) )
+#if ( LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,28) )
+#undef INIT_WORK
+#define INIT_WORK(_work, _func) \
+do { \
+	INIT_LIST_HEAD(&(_work)->entry); \
+	(_work)->pending = 0; \
+	(_work)->func = (void (*)(void *))_func; \
+	(_work)->data = _work; \
+	init_timer(&(_work)->timer); \
+} while (0)
+#endif
+
+#ifndef PCI_VDEVICE
+#define PCI_VDEVICE(ven, dev)        \
+	PCI_VENDOR_ID_##ven, (dev),  \
+	PCI_ANY_ID, PCI_ANY_ID, 0, 0
+#endif
+
+#ifndef PCI_VENDOR_ID_INTEL
+#define PCI_VENDOR_ID_INTEL 0x8086
+#endif
+
+#ifndef round_jiffies
+#define round_jiffies(x) x
+#endif
+
+#define csum_offset csum
+
+#define HAVE_EARLY_VMALLOC_NODE
+#define dev_to_node(dev) -1
+#undef set_dev_node
+/* remove compiler warning with b=b, for unused variable */
+#define set_dev_node(a, b) do { (b) = (b); } while(0)
+
+#if (!(RHEL_RELEASE_CODE && \
+       (((RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(4,7)) && \
+         (RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(5,0))) || \
+        (RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(5,6)))) && \
+     !(SLE_VERSION_CODE && SLE_VERSION_CODE >= SLE_VERSION(10,2,0)))
+typedef __u16 __bitwise __sum16;
+typedef __u32 __bitwise __wsum;
+#endif
+
+#if (!(RHEL_RELEASE_CODE && \
+       (((RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(4,7)) && \
+         (RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(5,0))) || \
+        (RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(5,4)))) && \
+     !(SLE_VERSION_CODE && SLE_VERSION_CODE >= SLE_VERSION(10,2,0)))
+static inline __wsum csum_unfold(__sum16 n)
+{
+	return (__force __wsum)n;
+}
+#endif
+
+#else /* < 2.6.20 */
+#define HAVE_DEVICE_NUMA_NODE
+#endif /* < 2.6.20 */
+
+/*****************************************************************************/
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21) )
+#define to_net_dev(class) container_of(class, struct net_device, class_dev)
+#define NETDEV_CLASS_DEV
+#if (!(RHEL_RELEASE_CODE && RHEL_RELEASE_CODE > RHEL_RELEASE_VERSION(5,5)))
+#define vlan_group_get_device(vg, id) (vg->vlan_devices[id])
+#define vlan_group_set_device(vg, id, dev)		\
+	do {						\
+		if (vg) vg->vlan_devices[id] = dev;	\
+	} while (0)
+#endif /* !(RHEL_RELEASE_CODE > RHEL_RELEASE_VERSION(5,5)) */
+#define pci_channel_offline(pdev) (pdev->error_state && \
+	pdev->error_state != pci_channel_io_normal)
+#define pci_request_selected_regions(pdev, bars, name) \
+        pci_request_regions(pdev, name)
+#define pci_release_selected_regions(pdev, bars) pci_release_regions(pdev);
+
+#ifndef __aligned
+#define __aligned(x)			__attribute__((aligned(x)))
+#endif
+
+struct pci_dev *_kc_netdev_to_pdev(struct net_device *netdev);
+#define netdev_to_dev(netdev)	\
+	pci_dev_to_dev(_kc_netdev_to_pdev(netdev))
+#define devm_kzalloc(dev, size, flags) kzalloc(size, flags)
+#define devm_kfree(dev, p) kfree(p)
+#else /* 2.6.21 */
+static inline struct device *netdev_to_dev(struct net_device *netdev)
+{
+	return &netdev->dev;
+}
+
+#endif /* < 2.6.21 */
+
+/*****************************************************************************/
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,22) )
+#define tcp_hdr(skb) (skb->h.th)
+#define tcp_hdrlen(skb) (skb->h.th->doff << 2)
+#define skb_transport_offset(skb) (skb->h.raw - skb->data)
+#define skb_transport_header(skb) (skb->h.raw)
+#define ipv6_hdr(skb) (skb->nh.ipv6h)
+#define ip_hdr(skb) (skb->nh.iph)
+#define skb_network_offset(skb) (skb->nh.raw - skb->data)
+#define skb_network_header(skb) (skb->nh.raw)
+#define skb_tail_pointer(skb) skb->tail
+#define skb_reset_tail_pointer(skb) \
+	do { \
+		skb->tail = skb->data; \
+	} while (0)
+#define skb_set_tail_pointer(skb, offset) \
+	do { \
+		skb->tail = skb->data + offset; \
+	} while (0)
+#define skb_copy_to_linear_data(skb, from, len) \
+				memcpy(skb->data, from, len)
+#define skb_copy_to_linear_data_offset(skb, offset, from, len) \
+				memcpy(skb->data + offset, from, len)
+#define skb_network_header_len(skb) (skb->h.raw - skb->nh.raw)
+#define pci_register_driver pci_module_init
+#define skb_mac_header(skb) skb->mac.raw
+
+#ifdef NETIF_F_MULTI_QUEUE
+#ifndef alloc_etherdev_mq
+#define alloc_etherdev_mq(_a, _b) alloc_etherdev(_a)
+#endif
+#endif /* NETIF_F_MULTI_QUEUE */
+
+#ifndef ETH_FCS_LEN
+#define ETH_FCS_LEN 4
+#endif
+#define cancel_work_sync(x) flush_scheduled_work()
+#ifndef udp_hdr
+#define udp_hdr _udp_hdr
+static inline struct udphdr *_udp_hdr(const struct sk_buff *skb)
+{
+	return (struct udphdr *)skb_transport_header(skb);
+}
+#endif
+
+#ifdef cpu_to_be16
+#undef cpu_to_be16
+#endif
+#define cpu_to_be16(x) __constant_htons(x)
+
+#if (!(RHEL_RELEASE_CODE && RHEL_RELEASE_CODE > RHEL_RELEASE_VERSION(5,1)))
+enum {
+	DUMP_PREFIX_NONE,
+	DUMP_PREFIX_ADDRESS,
+	DUMP_PREFIX_OFFSET
+};
+#endif /* !(RHEL_RELEASE_CODE > RHEL_RELEASE_VERSION(5,1)) */
+#ifndef hex_asc
+#define hex_asc(x)	"0123456789abcdef"[x]
+#endif
+#include <linux/ctype.h>
+void _kc_print_hex_dump(const char *level, const char *prefix_str,
+			int prefix_type, int rowsize, int groupsize,
+			const void *buf, size_t len, bool ascii);
+#define print_hex_dump(lvl, s, t, r, g, b, l, a) \
+		_kc_print_hex_dump(lvl, s, t, r, g, b, l, a)
+#ifndef ADVERTISED_2500baseX_Full
+#define ADVERTISED_2500baseX_Full BIT(15)
+#endif
+#ifndef SUPPORTED_2500baseX_Full
+#define SUPPORTED_2500baseX_Full BIT(15)
+#endif
+
+#ifndef ETH_P_PAUSE
+#define ETH_P_PAUSE 0x8808
+#endif
+
+static inline int compound_order(struct page *page)
+{
+	return 0;
+}
+
+#define __must_be_array(a) 0
+
+#ifndef SKB_WITH_OVERHEAD
+#define SKB_WITH_OVERHEAD(X) \
+	((X) - SKB_DATA_ALIGN(sizeof(struct skb_shared_info)))
+#endif
+#else /* 2.6.22 */
+#define ETH_TYPE_TRANS_SETS_DEV
+#define HAVE_NETDEV_STATS_IN_NETDEV
+#endif /* < 2.6.22 */
+
+/*****************************************************************************/
+#if ( LINUX_VERSION_CODE > KERNEL_VERSION(2,6,22) )
+#undef SET_MODULE_OWNER
+#define SET_MODULE_OWNER(dev) do { } while (0)
+#endif /* > 2.6.22 */
+
+/*****************************************************************************/
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,23) )
+#define netif_subqueue_stopped(_a, _b) 0
+#ifndef PTR_ALIGN
+#define PTR_ALIGN(p, a)         ((typeof(p))ALIGN((unsigned long)(p), (a)))
+#endif
+
+#ifndef CONFIG_PM_SLEEP
+#define CONFIG_PM_SLEEP	CONFIG_PM
+#endif
+
+#if ( LINUX_VERSION_CODE > KERNEL_VERSION(2,6,13) )
+#define HAVE_ETHTOOL_GET_PERM_ADDR
+#endif /* 2.6.14 through 2.6.22 */
+
+static inline int __kc_skb_cow_head(struct sk_buff *skb, unsigned int headroom)
+{
+	int delta = 0;
+
+	if (headroom > (skb->data - skb->head))
+		delta = headroom - (skb->data - skb->head);
+
+	if (delta || skb_header_cloned(skb))
+		return pskb_expand_head(skb, ALIGN(delta, NET_SKB_PAD), 0,
+					GFP_ATOMIC);
+	return 0;
+}
+#define skb_cow_head(s, h) __kc_skb_cow_head((s), (h))
+#endif /* < 2.6.23 */
+
+/*****************************************************************************/
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24) )
+#ifndef ETH_FLAG_LRO
+#define ETH_FLAG_LRO NETIF_F_LRO
+#endif
+
+#ifndef ACCESS_ONCE
+#define ACCESS_ONCE(x) (*(volatile typeof(x) *)&(x))
+#endif
+
+/* if GRO is supported then the napi struct must already exist */
+#ifndef NETIF_F_GRO
+/* NAPI API changes in 2.6.24 break everything */
+struct napi_struct {
+	/* used to look up the real NAPI polling routine */
+	int (*poll)(struct napi_struct *, int);
+	struct net_device *dev;
+	int weight;
+};
+#endif
+
+#ifdef NAPI
+int __kc_adapter_clean(struct net_device *, int *);
+/* The following definitions are multi-queue aware, and thus we have a driver
+ * define list which determines which drivers support multiple queues, and
+ * thus need these stronger defines. If a driver does not support multi-queue
+ * functionality, you don't need to add it to this list.
+ */
+struct net_device *napi_to_poll_dev(const struct napi_struct *napi);
+
+static inline void __kc_mq_netif_napi_add(struct net_device *dev, struct napi_struct *napi,
+					  int (*poll)(struct napi_struct *, int), int weight)
+{
+	struct net_device *poll_dev = napi_to_poll_dev(napi);
+	poll_dev->poll = __kc_adapter_clean;
+	poll_dev->priv = napi;
+	poll_dev->weight = weight;
+	set_bit(__LINK_STATE_RX_SCHED, &poll_dev->state);
+	set_bit(__LINK_STATE_START, &poll_dev->state);
+	dev_hold(poll_dev);
+	napi->poll = poll;
+	napi->weight = weight;
+	napi->dev = dev;
+}
+#define netif_napi_add __kc_mq_netif_napi_add
+
+static inline void __kc_mq_netif_napi_del(struct napi_struct *napi)
+{
+	struct net_device *poll_dev = napi_to_poll_dev(napi);
+	WARN_ON(!test_bit(__LINK_STATE_RX_SCHED, &poll_dev->state));
+	dev_put(poll_dev);
+	memset(poll_dev, 0, sizeof(struct net_device));
+}
+
+#define netif_napi_del __kc_mq_netif_napi_del
+
+static inline bool __kc_mq_napi_schedule_prep(struct napi_struct *napi)
+{
+	return netif_running(napi->dev) &&
+		netif_rx_schedule_prep(napi_to_poll_dev(napi));
+}
+#define napi_schedule_prep __kc_mq_napi_schedule_prep
+
+static inline void __kc_mq_napi_schedule(struct napi_struct *napi)
+{
+	if (napi_schedule_prep(napi))
+		__netif_rx_schedule(napi_to_poll_dev(napi));
+}
+#define napi_schedule __kc_mq_napi_schedule
+
+#define napi_enable(_napi) netif_poll_enable(napi_to_poll_dev(_napi))
+#define napi_disable(_napi) netif_poll_disable(napi_to_poll_dev(_napi))
+#ifdef CONFIG_SMP
+static inline void napi_synchronize(const struct napi_struct *n)
+{
+	struct net_device *dev = napi_to_poll_dev(n);
+
+	while (test_bit(__LINK_STATE_RX_SCHED, &dev->state)) {
+		/* No hurry. */
+		msleep(1);
+	}
+}
+#else
+#define napi_synchronize(n)	barrier()
+#endif /* CONFIG_SMP */
+#define __napi_schedule(_napi) __netif_rx_schedule(napi_to_poll_dev(_napi))
+static inline void _kc_napi_complete(struct napi_struct *napi)
+{
+#ifdef NETIF_F_GRO
+	napi_gro_flush(napi);
+#endif
+	netif_rx_complete(napi_to_poll_dev(napi));
+}
+#define napi_complete _kc_napi_complete
+#else /* NAPI */
+
+/* The following definitions are only used if we don't support NAPI at all. */
+
+static inline __kc_netif_napi_add(struct net_device *dev, struct napi_struct *napi,
+				  int (*poll)(struct napi_struct *, int), int weight)
+{
+	dev->poll = poll;
+	dev->weight = weight;
+	napi->poll = poll;
+	napi->weight = weight;
+	napi->dev = dev;
+}
+#define netif_napi_del(_a) do {} while (0)
+#endif /* NAPI */
+
+#undef dev_get_by_name
+#define dev_get_by_name(_a, _b) dev_get_by_name(_b)
+#define __netif_subqueue_stopped(_a, _b) netif_subqueue_stopped(_a, _b)
+#ifndef DMA_BIT_MASK
+#define DMA_BIT_MASK(n)	(((n) == 64) ? DMA_64BIT_MASK : ((1ULL<<(n))-1))
+#endif
+
+#ifdef NETIF_F_TSO6
+#define skb_is_gso_v6 _kc_skb_is_gso_v6
+static inline int _kc_skb_is_gso_v6(const struct sk_buff *skb)
+{
+	return skb_shinfo(skb)->gso_type & SKB_GSO_TCPV6;
+}
+#endif /* NETIF_F_TSO6 */
+
+#ifndef KERN_CONT
+#define KERN_CONT	""
+#endif
+#ifndef pr_err
+#define pr_err(fmt, arg...) \
+	printk(KERN_ERR fmt, ##arg)
+#endif
+
+#ifndef rounddown_pow_of_two
+#define rounddown_pow_of_two(n) \
+	__builtin_constant_p(n) ? ( \
+		(n == 1) ? 0 : \
+		(1UL << ilog2(n))) : \
+		(1UL << (fls_long(n) - 1))
+#endif
+
+#else /* < 2.6.24 */
+#define HAVE_ETHTOOL_GET_SSET_COUNT
+#define HAVE_NETDEV_NAPI_LIST
+#endif /* < 2.6.24 */
+
+/*****************************************************************************/
+#if ( LINUX_VERSION_CODE > KERNEL_VERSION(2,6,24) )
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(3,2,0) )
+#define INCLUDE_PM_QOS_PARAMS_H
+#include <linux/pm_qos_params.h>
+#else /* >= 3.2.0 */
+#include <linux/pm_qos.h>
+#endif /* else >= 3.2.0 */
+#endif /* > 2.6.24 */
+
+/*****************************************************************************/
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,25) )
+#define PM_QOS_CPU_DMA_LATENCY	1
+
+#if ( LINUX_VERSION_CODE > KERNEL_VERSION(2,6,18) )
+#include <linux/latency.h>
+#define PM_QOS_DEFAULT_VALUE	INFINITE_LATENCY
+#define pm_qos_add_requirement(pm_qos_class, name, value) \
+		set_acceptable_latency(name, value)
+#define pm_qos_remove_requirement(pm_qos_class, name) \
+		remove_acceptable_latency(name)
+#define pm_qos_update_requirement(pm_qos_class, name, value) \
+		modify_acceptable_latency(name, value)
+#else
+#define PM_QOS_DEFAULT_VALUE	-1
+#define pm_qos_add_requirement(pm_qos_class, name, value)
+#define pm_qos_remove_requirement(pm_qos_class, name)
+#define pm_qos_update_requirement(pm_qos_class, name, value) { \
+	if (value != PM_QOS_DEFAULT_VALUE) { \
+		printk(KERN_WARNING "%s: unable to set PM QoS requirement\n", \
+			pci_name(adapter->pdev)); \
+	} \
+}
+
+#endif /* > 2.6.18 */
+
+#define pci_enable_device_mem(pdev) pci_enable_device(pdev)
+
+#ifndef DEFINE_PCI_DEVICE_TABLE
+#define DEFINE_PCI_DEVICE_TABLE(_table) struct pci_device_id _table[]
+#endif /* DEFINE_PCI_DEVICE_TABLE */
+
+#ifndef strict_strtol
+#define strict_strtol(s, b, r) _kc_strict_strtol(s, b, r)
+static inline int _kc_strict_strtol(const char *buf, unsigned int base, long *res)
+{
+	/* adapted from strict_strtoul() in 2.6.25 */
+	char *tail;
+	long val;
+	size_t len;
+
+	*res = 0;
+	len = strlen(buf);
+	if (!len)
+		return -EINVAL;
+	val = simple_strtol(buf, &tail, base);
+	if (tail == buf)
+		return -EINVAL;
+	if ((*tail == '\0') ||
+	    ((len == (size_t)(tail - buf) + 1) && (*tail == '\n'))) {
+		*res = val;
+		return 0;
+	}
+
+	return -EINVAL;
+}
+#endif
+
+#else /* < 2.6.25 */
+
+#endif /* < 2.6.25 */
+
+/*****************************************************************************/
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,26) )
+#ifndef clamp_t
+#define clamp_t(type, val, min, max) ({		\
+	type __val = (val);			\
+	type __min = (min);			\
+	type __max = (max);			\
+	__val = __val < __min ? __min : __val;	\
+	__val > __max ? __max : __val; })
+#endif /* clamp_t */
+#undef kzalloc_node
+#define kzalloc_node(_size, _flags, _node) kzalloc(_size, _flags)
+
+void _kc_pci_disable_link_state(struct pci_dev *dev, int state);
+#define pci_disable_link_state(p, s) _kc_pci_disable_link_state(p, s)
+#else /* < 2.6.26 */
+#define NETDEV_CAN_SET_GSO_MAX_SIZE
+#define HAVE_NETDEV_VLAN_FEATURES
+#ifndef PCI_EXP_LNKCAP_ASPMS
+#define PCI_EXP_LNKCAP_ASPMS 0x00000c00 /* ASPM Support */
+#endif /* PCI_EXP_LNKCAP_ASPMS */
+#endif /* < 2.6.26 */
+/*****************************************************************************/
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,27) )
+static inline void _kc_ethtool_cmd_speed_set(struct ethtool_cmd *ep,
+					     __u32 speed)
+{
+	ep->speed = (__u16)speed;
+	/* ep->speed_hi = (__u16)(speed >> 16); */
+}
+#define ethtool_cmd_speed_set _kc_ethtool_cmd_speed_set
+
+static inline __u32 _kc_ethtool_cmd_speed(struct ethtool_cmd *ep)
+{
+	/* no speed_hi before 2.6.27, and probably no need for it yet */
+	return (__u32)ep->speed;
+}
+#define ethtool_cmd_speed _kc_ethtool_cmd_speed
+
+#if ( LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,15) )
+#if ((LINUX_VERSION_CODE < KERNEL_VERSION(2,6,23)) && defined(CONFIG_PM))
+#define ANCIENT_PM 1
+#elif ((LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,23)) && \
+       (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,26)) && \
+       defined(CONFIG_PM_SLEEP))
+#define NEWER_PM 1
+#endif
+#if defined(ANCIENT_PM) || defined(NEWER_PM)
+#undef device_set_wakeup_enable
+#define device_set_wakeup_enable(dev, val) \
+	do { \
+		u16 pmc = 0; \
+		int pm = pci_find_capability(adapter->pdev, PCI_CAP_ID_PM); \
+		if (pm) { \
+			pci_read_config_word(adapter->pdev, pm + PCI_PM_PMC, \
+				&pmc); \
+		} \
+		(dev)->power.can_wakeup = !!(pmc >> 11); \
+		(dev)->power.should_wakeup = (val && (pmc >> 11)); \
+	} while (0)
+#endif /* 2.6.15-2.6.22 and CONFIG_PM or 2.6.23-2.6.25 and CONFIG_PM_SLEEP */
+#endif /* 2.6.15 through 2.6.27 */
+#ifndef netif_napi_del
+#define netif_napi_del(_a) do {} while (0)
+#ifdef NAPI
+#ifdef CONFIG_NETPOLL
+#undef netif_napi_del
+#define netif_napi_del(_a) list_del(&(_a)->dev_list);
+#endif
+#endif
+#endif /* netif_napi_del */
+#ifdef dma_mapping_error
+#undef dma_mapping_error
+#endif
+#define dma_mapping_error(dev, dma_addr) pci_dma_mapping_error(dma_addr)
+
+#ifdef CONFIG_NETDEVICES_MULTIQUEUE
+#define HAVE_TX_MQ
+#endif
+
+#ifndef DMA_ATTR_WEAK_ORDERING
+#define DMA_ATTR_WEAK_ORDERING 0
+#endif
+
+#ifdef HAVE_TX_MQ
+void _kc_netif_tx_stop_all_queues(struct net_device *);
+void _kc_netif_tx_wake_all_queues(struct net_device *);
+void _kc_netif_tx_start_all_queues(struct net_device *);
+#define netif_tx_stop_all_queues(a) _kc_netif_tx_stop_all_queues(a)
+#define netif_tx_wake_all_queues(a) _kc_netif_tx_wake_all_queues(a)
+#define netif_tx_start_all_queues(a) _kc_netif_tx_start_all_queues(a)
+#undef netif_stop_subqueue
+#define netif_stop_subqueue(_ndev,_qi) do { \
+	if (netif_is_multiqueue((_ndev))) \
+		netif_stop_subqueue((_ndev), (_qi)); \
+	else \
+		netif_stop_queue((_ndev)); \
+	} while (0)
+#undef netif_start_subqueue
+#define netif_start_subqueue(_ndev,_qi) do { \
+	if (netif_is_multiqueue((_ndev))) \
+		netif_start_subqueue((_ndev), (_qi)); \
+	else \
+		netif_start_queue((_ndev)); \
+	} while (0)
+#else /* HAVE_TX_MQ */
+#define netif_tx_stop_all_queues(a) netif_stop_queue(a)
+#define netif_tx_wake_all_queues(a) netif_wake_queue(a)
+#if ( LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,12) )
+#define netif_tx_start_all_queues(a) netif_start_queue(a)
+#else
+#define netif_tx_start_all_queues(a) do {} while (0)
+#endif
+#define netif_stop_subqueue(_ndev,_qi) netif_stop_queue((_ndev))
+#define netif_start_subqueue(_ndev,_qi) netif_start_queue((_ndev))
+#endif /* HAVE_TX_MQ */
+#ifndef NETIF_F_MULTI_QUEUE
+#define NETIF_F_MULTI_QUEUE 0
+#define netif_is_multiqueue(a) 0
+#define netif_wake_subqueue(a, b)
+#endif /* NETIF_F_MULTI_QUEUE */
+
+#ifndef __WARN_printf
+void __kc_warn_slowpath(const char *file, const int line,
+		const char *fmt, ...) __attribute__((format(printf, 3, 4)));
+#define __WARN_printf(arg...) __kc_warn_slowpath(__FILE__, __LINE__, arg)
+#endif /* __WARN_printf */
+
+#ifndef WARN
+#define WARN(condition, format...) ({						\
+	int __ret_warn_on = !!(condition);				\
+	if (unlikely(__ret_warn_on))					\
+		__WARN_printf(format);					\
+	unlikely(__ret_warn_on);					\
+})
+#endif /* WARN */
+#define qdisc_reset_all_tx(a)
+#else /* < 2.6.27 */
+#define ethtool_cmd_speed_set _kc_ethtool_cmd_speed_set
+static inline void _kc_ethtool_cmd_speed_set(struct ethtool_cmd *ep,
+					     __u32 speed)
+{
+	ep->speed = (__u16)(speed & 0xFFFF);
+	ep->speed_hi = (__u16)(speed >> 16);
+}
+#define HAVE_TX_MQ
+#define HAVE_NETDEV_SELECT_QUEUE
+#endif /* < 2.6.27 */
+
+/*****************************************************************************/
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,28) )
+#define pci_ioremap_bar(pdev, bar)	ioremap(pci_resource_start(pdev, bar), \
+					        pci_resource_len(pdev, bar))
+#define pci_wake_from_d3 _kc_pci_wake_from_d3
+#define pci_prepare_to_sleep _kc_pci_prepare_to_sleep
+int _kc_pci_wake_from_d3(struct pci_dev *dev, bool enable);
+int _kc_pci_prepare_to_sleep(struct pci_dev *dev);
+#define netdev_alloc_page(a) alloc_page(GFP_ATOMIC)
+#ifndef __skb_queue_head_init
+static inline void __kc_skb_queue_head_init(struct sk_buff_head *list)
+{
+	list->prev = list->next = (struct sk_buff *)list;
+	list->qlen = 0;
+}
+#define __skb_queue_head_init(_q) __kc_skb_queue_head_init(_q)
+#endif
+
+#define PCI_EXP_DEVCAP2		36	/* Device Capabilities 2 */
+#define PCI_EXP_DEVCTL2		40	/* Device Control 2 */
+
+#define PCI_EXP_DEVCAP_FLR	0x10000000 /* Function Level Reset */
+#define PCI_EXP_DEVCTL_BCR_FLR	0x8000 /* Bridge Configuration Retry / FLR */
+
+#endif /* < 2.6.28 */
+
+/*****************************************************************************/
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,29) )
+#ifndef swap
+#define swap(a, b) \
+	do { typeof(a) __tmp = (a); (a) = (b); (b) = __tmp; } while (0)
+#endif
+#define pci_request_selected_regions_exclusive(pdev, bars, name) \
+		pci_request_selected_regions(pdev, bars, name)
+#ifndef CONFIG_NR_CPUS
+#define CONFIG_NR_CPUS 1
+#endif /* CONFIG_NR_CPUS */
+#ifndef pcie_aspm_enabled
+#define pcie_aspm_enabled()   (1)
+#endif /* pcie_aspm_enabled */
+
+#define  PCI_EXP_SLTSTA_PDS	0x0040	/* Presence Detect State */
+
+#ifndef PCI_EXP_LNKSTA_CLS
+#define  PCI_EXP_LNKSTA_CLS    0x000f  /* Current Link Speed */
+#endif
+#ifndef PCI_EXP_LNKSTA_NLW
+#define  PCI_EXP_LNKSTA_NLW    0x03f0  /* Negotiated Link Width */
+#endif
+
+#ifndef pci_clear_master
+void _kc_pci_clear_master(struct pci_dev *dev);
+#define pci_clear_master(dev)	_kc_pci_clear_master(dev)
+#endif
+
+#ifndef PCI_EXP_LNKCTL_ASPMC
+#define  PCI_EXP_LNKCTL_ASPMC	0x0003	/* ASPM Control */
+#endif
+
+#ifndef PCI_EXP_LNKCAP_MLW
+#define PCI_EXP_LNKCAP_MLW	0x000003f0 /* Maximum Link Width */
+#endif
+
+#else /* < 2.6.29 */
+#ifndef HAVE_NET_DEVICE_OPS
+#define HAVE_NET_DEVICE_OPS
+#endif
+#ifdef CONFIG_DCB
+#define HAVE_PFC_MODE_ENABLE
+#endif /* CONFIG_DCB */
+#endif /* < 2.6.29 */
+
+/*****************************************************************************/
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,30) )
+#define NO_PTP_SUPPORT
+#define skb_rx_queue_recorded(a) false
+#define skb_get_rx_queue(a) 0
+#define skb_record_rx_queue(a, b) do {} while (0)
+#define skb_tx_hash(n, s) ___kc_skb_tx_hash((n), (s), (n)->real_num_tx_queues)
+#undef CONFIG_FCOE
+#undef CONFIG_FCOE_MODULE
+#ifndef CONFIG_PCI_IOV
+#undef pci_enable_sriov
+#define pci_enable_sriov(a, b) -ENOTSUPP
+#undef pci_disable_sriov
+#define pci_disable_sriov(a) do {} while (0)
+#endif /* CONFIG_PCI_IOV */
+#ifndef pr_cont
+#define pr_cont(fmt, ...) \
+	printk(KERN_CONT fmt, ##__VA_ARGS__)
+#endif /* pr_cont */
+static inline void _kc_synchronize_irq(unsigned int a)
+{
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,5,28) )
+	synchronize_irq();
+#else /* < 2.5.28 */
+	synchronize_irq(a);
+#endif /* < 2.5.28 */
+}
+#undef synchronize_irq
+#define synchronize_irq(a) _kc_synchronize_irq(a)
+
+#define PCI_EXP_LNKCTL2		48	/* Link Control 2 */
+
+#ifdef nr_cpus_node
+#undef nr_cpus_node
+#define nr_cpus_node(node) cpumask_weight(cpumask_of_node(node))
+#endif
+
+#if (RHEL_RELEASE_CODE && RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(5,5))
+#define HAVE_PCI_DEV_IS_VIRTFN_BIT
+#endif /* RHEL >= 5.5 */
+
+#if (!(RHEL_RELEASE_CODE && RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(5,5)))
+static inline bool pci_is_root_bus(struct pci_bus *pbus)
+{
+	return !(pbus->parent);
+}
+#endif
+
+#else /* < 2.6.30 */
+#define HAVE_ASPM_QUIRKS
+#define HAVE_PCI_DEV_IS_VIRTFN_BIT
+#endif /* < 2.6.30 */
+
+/*****************************************************************************/
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,31) )
+#define ETH_P_1588 0x88F7
+#define ETH_P_FIP  0x8914
+#ifndef netdev_uc_count
+#define netdev_uc_count(dev) ((dev)->uc_count)
+#endif
+#ifndef netdev_for_each_uc_addr
+#define netdev_for_each_uc_addr(uclist, dev) \
+	for (uclist = dev->uc_list; uclist; uclist = uclist->next)
+#endif
+#ifndef PORT_OTHER
+#define PORT_OTHER 0xff
+#endif
+#ifndef MDIO_PHY_ID_PRTAD
+#define MDIO_PHY_ID_PRTAD 0x03e0
+#endif
+#ifndef MDIO_PHY_ID_DEVAD
+#define MDIO_PHY_ID_DEVAD 0x001f
+#endif
+#ifndef skb_dst
+#define skb_dst(s) ((s)->dst)
+#endif
+
+#ifndef SUPPORTED_1000baseKX_Full
+#define SUPPORTED_1000baseKX_Full	BIT(17)
+#endif
+#ifndef SUPPORTED_10000baseKX4_Full
+#define SUPPORTED_10000baseKX4_Full	BIT(18)
+#endif
+#ifndef SUPPORTED_10000baseKR_Full
+#define SUPPORTED_10000baseKR_Full	BIT(19)
+#endif
+
+#ifndef ADVERTISED_1000baseKX_Full
+#define ADVERTISED_1000baseKX_Full	BIT(17)
+#endif
+#ifndef ADVERTISED_10000baseKX4_Full
+#define ADVERTISED_10000baseKX4_Full	BIT(18)
+#endif
+#ifndef ADVERTISED_10000baseKR_Full
+#define ADVERTISED_10000baseKR_Full	BIT(19)
+#endif
+
+static inline unsigned long dev_trans_start(struct net_device *dev)
+{
+	return dev->trans_start;
+}
+#else /* < 2.6.31 */
+#ifndef HAVE_NETDEV_STORAGE_ADDRESS
+#define HAVE_NETDEV_STORAGE_ADDRESS
+#endif
+#ifndef HAVE_NETDEV_HW_ADDR
+#define HAVE_NETDEV_HW_ADDR
+#endif
+#ifndef HAVE_TRANS_START_IN_QUEUE
+#define HAVE_TRANS_START_IN_QUEUE
+#endif
+#ifndef HAVE_INCLUDE_LINUX_MDIO_H
+#define HAVE_INCLUDE_LINUX_MDIO_H
+#endif
+#include <linux/mdio.h>
+#endif /* < 2.6.31 */
+
+/*****************************************************************************/
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,32) )
+#undef netdev_tx_t
+#define netdev_tx_t int
+#if defined(CONFIG_FCOE) || defined(CONFIG_FCOE_MODULE)
+#ifndef NETIF_F_FCOE_MTU
+#define NETIF_F_FCOE_MTU       BIT(26)
+#endif
+#endif /* CONFIG_FCOE || CONFIG_FCOE_MODULE */
+
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0) )
+static inline int _kc_pm_runtime_get_sync()
+{
+	return 1;
+}
+#define pm_runtime_get_sync(dev)	_kc_pm_runtime_get_sync()
+#else /* 2.6.0 => 2.6.32 */
+static inline int _kc_pm_runtime_get_sync(struct device __always_unused *dev)
+{
+	return 1;
+}
+#ifndef pm_runtime_get_sync
+#define pm_runtime_get_sync(dev)	_kc_pm_runtime_get_sync(dev)
+#endif
+#endif /* 2.6.0 => 2.6.32 */
+#ifndef pm_runtime_put
+#define pm_runtime_put(dev)		do {} while (0)
+#endif
+#ifndef pm_runtime_put_sync
+#define pm_runtime_put_sync(dev)	do {} while (0)
+#endif
+#ifndef pm_runtime_resume
+#define pm_runtime_resume(dev)		do {} while (0)
+#endif
+#ifndef pm_schedule_suspend
+#define pm_schedule_suspend(dev, t)	do {} while (0)
+#endif
+#ifndef pm_runtime_set_suspended
+#define pm_runtime_set_suspended(dev)	do {} while (0)
+#endif
+#ifndef pm_runtime_disable
+#define pm_runtime_disable(dev)		do {} while (0)
+#endif
+#ifndef pm_runtime_put_noidle
+#define pm_runtime_put_noidle(dev)	do {} while (0)
+#endif
+#ifndef pm_runtime_set_active
+#define pm_runtime_set_active(dev)	do {} while (0)
+#endif
+#ifndef pm_runtime_enable
+#define pm_runtime_enable(dev)	do {} while (0)
+#endif
+#ifndef pm_runtime_get_noresume
+#define pm_runtime_get_noresume(dev)	do {} while (0)
+#endif
+#else /* < 2.6.32 */
+#if (RHEL_RELEASE_CODE && \
+     (RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(6,2)) && \
+     (RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(7,0)))
+#define HAVE_RHEL6_NET_DEVICE_EXTENDED
+#endif /* RHEL >= 6.2 && RHEL < 7.0 */
+#if (RHEL_RELEASE_CODE && \
+     (RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(6,6)) && \
+     (RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(7,0)))
+#define HAVE_RHEL6_NET_DEVICE_OPS_EXT
+#define HAVE_NDO_SET_FEATURES
+#endif /* RHEL >= 6.6 && RHEL < 7.0 */
+#if defined(CONFIG_FCOE) || defined(CONFIG_FCOE_MODULE)
+#ifndef HAVE_NETDEV_OPS_FCOE_ENABLE
+#define HAVE_NETDEV_OPS_FCOE_ENABLE
+#endif
+#endif /* CONFIG_FCOE || CONFIG_FCOE_MODULE */
+#ifdef CONFIG_DCB
+#ifndef HAVE_DCBNL_OPS_GETAPP
+#define HAVE_DCBNL_OPS_GETAPP
+#endif
+#endif /* CONFIG_DCB */
+#include <linux/pm_runtime.h>
+/* IOV bad DMA target work arounds require at least this kernel rev support */
+#define HAVE_PCIE_TYPE
+#endif /* < 2.6.32 */
+
+/*****************************************************************************/
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,33) )
+#ifndef pci_pcie_cap
+#define pci_pcie_cap(pdev) pci_find_capability(pdev, PCI_CAP_ID_EXP)
+#endif
+#ifndef IPV4_FLOW
+#define IPV4_FLOW 0x10
+#endif /* IPV4_FLOW */
+#ifndef IPV6_FLOW
+#define IPV6_FLOW 0x11
+#endif /* IPV6_FLOW */
+/* Features back-ported to RHEL6 or SLES11 SP1 after 2.6.32 */
+#if ( (RHEL_RELEASE_CODE && RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(6,0)) || \
+      (SLE_VERSION_CODE && SLE_VERSION_CODE >= SLE_VERSION(11,1,0)) )
+#if defined(CONFIG_FCOE) || defined(CONFIG_FCOE_MODULE)
+#ifndef HAVE_NETDEV_OPS_FCOE_GETWWN
+#define HAVE_NETDEV_OPS_FCOE_GETWWN
+#endif
+#endif /* CONFIG_FCOE || CONFIG_FCOE_MODULE */
+#endif /* RHEL6 or SLES11 SP1 */
+#ifndef __percpu
+#define __percpu
+#endif /* __percpu */
+
+#ifndef PORT_DA
+#define PORT_DA PORT_OTHER
+#endif /* PORT_DA */
+#ifndef PORT_NONE
+#define PORT_NONE PORT_OTHER
+#endif
+
+#if ((RHEL_RELEASE_CODE && \
+     (RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(6,3)) && \
+     (RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(7,0))))
+#if !defined(CONFIG_X86_32) && !defined(CONFIG_NEED_DMA_MAP_STATE)
+#undef DEFINE_DMA_UNMAP_ADDR
+#define DEFINE_DMA_UNMAP_ADDR(ADDR_NAME)	dma_addr_t ADDR_NAME
+#undef DEFINE_DMA_UNMAP_LEN
+#define DEFINE_DMA_UNMAP_LEN(LEN_NAME)		__u32 LEN_NAME
+#undef dma_unmap_addr
+#define dma_unmap_addr(PTR, ADDR_NAME)		((PTR)->ADDR_NAME)
+#undef dma_unmap_addr_set
+#define dma_unmap_addr_set(PTR, ADDR_NAME, VAL)	(((PTR)->ADDR_NAME) = (VAL))
+#undef dma_unmap_len
+#define dma_unmap_len(PTR, LEN_NAME)		((PTR)->LEN_NAME)
+#undef dma_unmap_len_set
+#define dma_unmap_len_set(PTR, LEN_NAME, VAL)	(((PTR)->LEN_NAME) = (VAL))
+#endif /* CONFIG_X86_64 && !CONFIG_NEED_DMA_MAP_STATE */
+#endif /* RHEL_RELEASE_CODE */
+
+#if (!(RHEL_RELEASE_CODE && \
+       (((RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(5,8)) && \
+         (RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(6,0))) || \
+        ((RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(6,1)) && \
+         (RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(7,0))))))
+static inline bool pci_is_pcie(struct pci_dev *dev)
+{
+	return !!pci_pcie_cap(dev);
+}
+#endif /* RHEL_RELEASE_CODE */
+
+#if (!(RHEL_RELEASE_CODE && \
+      (RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(6,2))))
+#define sk_tx_queue_get(_sk) (-1)
+#define sk_tx_queue_set(_sk, _tx_queue) do {} while(0)
+#endif /* !(RHEL >= 6.2) */
+
+#if (RHEL_RELEASE_CODE && \
+     (RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(6,4)) && \
+     (RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(7,0)))
+#define HAVE_RHEL6_ETHTOOL_OPS_EXT_STRUCT
+#define HAVE_ETHTOOL_GRXFHINDIR_SIZE
+#define HAVE_ETHTOOL_SET_PHYS_ID
+#define HAVE_ETHTOOL_GET_TS_INFO
+#if (RHEL_RELEASE_CODE > RHEL_RELEASE_VERSION(6,5))
+#define HAVE_ETHTOOL_GSRSSH
+#define HAVE_RHEL6_SRIOV_CONFIGURE
+#define HAVE_RXFH_NONCONST
+#endif /* RHEL > 6.5 */
+#endif /* RHEL >= 6.4 && RHEL < 7.0 */
+
+#else /* < 2.6.33 */
+#if defined(CONFIG_FCOE) || defined(CONFIG_FCOE_MODULE)
+#ifndef HAVE_NETDEV_OPS_FCOE_GETWWN
+#define HAVE_NETDEV_OPS_FCOE_GETWWN
+#endif
+#endif /* CONFIG_FCOE || CONFIG_FCOE_MODULE */
+#endif /* < 2.6.33 */
+
+/*****************************************************************************/
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,34) )
+#if (RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(6,0))
+#ifndef pci_num_vf
+#define pci_num_vf(pdev) _kc_pci_num_vf(pdev)
+int _kc_pci_num_vf(struct pci_dev *dev);
+#endif
+#endif /* RHEL_RELEASE_CODE */
+
+#ifndef dev_is_pci
+#define dev_is_pci(d) ((d)->bus == &pci_bus_type)
+#endif
+
+#ifndef ETH_FLAG_NTUPLE
+#define ETH_FLAG_NTUPLE NETIF_F_NTUPLE
+#endif
+
+#ifndef netdev_mc_count
+#define netdev_mc_count(dev) ((dev)->mc_count)
+#endif
+#ifndef netdev_mc_empty
+#define netdev_mc_empty(dev) (netdev_mc_count(dev) == 0)
+#endif
+#ifndef netdev_for_each_mc_addr
+#define netdev_for_each_mc_addr(mclist, dev) \
+	for (mclist = dev->mc_list; mclist; mclist = mclist->next)
+#endif
+#ifndef netdev_uc_count
+#define netdev_uc_count(dev) ((dev)->uc.count)
+#endif
+#ifndef netdev_uc_empty
+#define netdev_uc_empty(dev) (netdev_uc_count(dev) == 0)
+#endif
+#ifndef netdev_for_each_uc_addr
+#define netdev_for_each_uc_addr(ha, dev) \
+	list_for_each_entry(ha, &dev->uc.list, list)
+#endif
+#ifndef dma_set_coherent_mask
+#define dma_set_coherent_mask(dev,mask) \
+	pci_set_consistent_dma_mask(to_pci_dev(dev),(mask))
+#endif
+#ifndef pci_dev_run_wake
+#define pci_dev_run_wake(pdev)	(0)
+#endif
+
+/* netdev logging taken from include/linux/netdevice.h */
+#ifndef netdev_name
+static inline const char *_kc_netdev_name(const struct net_device *dev)
+{
+	if (dev->reg_state != NETREG_REGISTERED)
+		return "(unregistered net_device)";
+	return dev->name;
+}
+#define netdev_name(netdev)	_kc_netdev_name(netdev)
+#endif /* netdev_name */
+
+#undef netdev_printk
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0) )
+#define netdev_printk(level, netdev, format, args...)		\
+do {								\
+	struct pci_dev *pdev = _kc_netdev_to_pdev(netdev);	\
+	printk(level "%s: " format, pci_name(pdev), ##args);	\
+} while(0)
+#elif ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21) )
+#define netdev_printk(level, netdev, format, args...)		\
+do {								\
+	struct pci_dev *pdev = _kc_netdev_to_pdev(netdev);	\
+	struct device *dev = pci_dev_to_dev(pdev);		\
+	dev_printk(level, dev, "%s: " format,			\
+		   netdev_name(netdev), ##args);		\
+} while(0)
+#else /* 2.6.21 => 2.6.34 */
+#define netdev_printk(level, netdev, format, args...)		\
+	dev_printk(level, (netdev)->dev.parent,			\
+		   "%s: " format,				\
+		   netdev_name(netdev), ##args)
+#endif /* <2.6.0 <2.6.21 <2.6.34 */
+#undef netdev_emerg
+#define netdev_emerg(dev, format, args...)			\
+	netdev_printk(KERN_EMERG, dev, format, ##args)
+#undef netdev_alert
+#define netdev_alert(dev, format, args...)			\
+	netdev_printk(KERN_ALERT, dev, format, ##args)
+#undef netdev_crit
+#define netdev_crit(dev, format, args...)			\
+	netdev_printk(KERN_CRIT, dev, format, ##args)
+#undef netdev_err
+#define netdev_err(dev, format, args...)			\
+	netdev_printk(KERN_ERR, dev, format, ##args)
+#undef netdev_warn
+#define netdev_warn(dev, format, args...)			\
+	netdev_printk(KERN_WARNING, dev, format, ##args)
+#undef netdev_notice
+#define netdev_notice(dev, format, args...)			\
+	netdev_printk(KERN_NOTICE, dev, format, ##args)
+#undef netdev_info
+#define netdev_info(dev, format, args...)			\
+	netdev_printk(KERN_INFO, dev, format, ##args)
+#undef netdev_dbg
+#if defined(DEBUG)
+#define netdev_dbg(__dev, format, args...)			\
+	netdev_printk(KERN_DEBUG, __dev, format, ##args)
+#elif defined(CONFIG_DYNAMIC_DEBUG)
+#define netdev_dbg(__dev, format, args...)			\
+do {								\
+	dynamic_dev_dbg((__dev)->dev.parent, "%s: " format,	\
+			netdev_name(__dev), ##args);		\
+} while (0)
+#else /* DEBUG */
+#define netdev_dbg(__dev, format, args...)			\
+({								\
+	if (0)							\
+		netdev_printk(KERN_DEBUG, __dev, format, ##args); \
+	0;							\
+})
+#endif /* DEBUG */
+
+#undef netif_printk
+#define netif_printk(priv, type, level, dev, fmt, args...)	\
+do {								\
+	if (netif_msg_##type(priv))				\
+		netdev_printk(level, (dev), fmt, ##args);	\
+} while (0)
+
+#undef netif_emerg
+#define netif_emerg(priv, type, dev, fmt, args...)		\
+	netif_level(emerg, priv, type, dev, fmt, ##args)
+#undef netif_alert
+#define netif_alert(priv, type, dev, fmt, args...)		\
+	netif_level(alert, priv, type, dev, fmt, ##args)
+#undef netif_crit
+#define netif_crit(priv, type, dev, fmt, args...)		\
+	netif_level(crit, priv, type, dev, fmt, ##args)
+#undef netif_err
+#define netif_err(priv, type, dev, fmt, args...)		\
+	netif_level(err, priv, type, dev, fmt, ##args)
+#undef netif_warn
+#define netif_warn(priv, type, dev, fmt, args...)		\
+	netif_level(warn, priv, type, dev, fmt, ##args)
+#undef netif_notice
+#define netif_notice(priv, type, dev, fmt, args...)		\
+	netif_level(notice, priv, type, dev, fmt, ##args)
+#undef netif_info
+#define netif_info(priv, type, dev, fmt, args...)		\
+	netif_level(info, priv, type, dev, fmt, ##args)
+#undef netif_dbg
+#define netif_dbg(priv, type, dev, fmt, args...)		\
+	netif_level(dbg, priv, type, dev, fmt, ##args)
+
+#ifdef SET_SYSTEM_SLEEP_PM_OPS
+#define HAVE_SYSTEM_SLEEP_PM_OPS
+#endif
+
+#ifndef for_each_set_bit
+#define for_each_set_bit(bit, addr, size) \
+	for ((bit) = find_first_bit((addr), (size)); \
+		(bit) < (size); \
+		(bit) = find_next_bit((addr), (size), (bit) + 1))
+#endif /* for_each_set_bit */
+
+#ifndef DEFINE_DMA_UNMAP_ADDR
+#define DEFINE_DMA_UNMAP_ADDR DECLARE_PCI_UNMAP_ADDR
+#define DEFINE_DMA_UNMAP_LEN DECLARE_PCI_UNMAP_LEN
+#define dma_unmap_addr pci_unmap_addr
+#define dma_unmap_addr_set pci_unmap_addr_set
+#define dma_unmap_len pci_unmap_len
+#define dma_unmap_len_set pci_unmap_len_set
+#endif /* DEFINE_DMA_UNMAP_ADDR */
+
+#if (RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(6,3))
+#ifdef IGB_HWMON
+#ifdef CONFIG_DEBUG_LOCK_ALLOC
+#define sysfs_attr_init(attr)				\
+	do {						\
+		static struct lock_class_key __key;	\
+		(attr)->key = &__key;			\
+	} while (0)
+#else
+#define sysfs_attr_init(attr) do {} while (0)
+#endif /* CONFIG_DEBUG_LOCK_ALLOC */
+#endif /* IGB_HWMON */
+#endif /* RHEL_RELEASE_CODE */
+
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0) )
+static inline bool _kc_pm_runtime_suspended()
+{
+	return false;
+}
+#define pm_runtime_suspended(dev)	_kc_pm_runtime_suspended()
+#else /* 2.6.0 => 2.6.34 */
+static inline bool _kc_pm_runtime_suspended(struct device __always_unused *dev)
+{
+	return false;
+}
+#ifndef pm_runtime_suspended
+#define pm_runtime_suspended(dev)	_kc_pm_runtime_suspended(dev)
+#endif
+#endif /* 2.6.0 => 2.6.34 */
+
+#ifndef pci_bus_speed
+/* override pci_bus_speed introduced in 2.6.19 with an expanded enum type */
+enum _kc_pci_bus_speed {
+	_KC_PCIE_SPEED_2_5GT		= 0x14,
+	_KC_PCIE_SPEED_5_0GT		= 0x15,
+	_KC_PCIE_SPEED_8_0GT		= 0x16,
+	_KC_PCI_SPEED_UNKNOWN		= 0xff,
+};
+#define pci_bus_speed		_kc_pci_bus_speed
+#define PCIE_SPEED_2_5GT	_KC_PCIE_SPEED_2_5GT
+#define PCIE_SPEED_5_0GT	_KC_PCIE_SPEED_5_0GT
+#define PCIE_SPEED_8_0GT	_KC_PCIE_SPEED_8_0GT
+#define PCI_SPEED_UNKNOWN	_KC_PCI_SPEED_UNKNOWN
+#endif /* pci_bus_speed */
+
+#else /* < 2.6.34 */
+#define HAVE_SYSTEM_SLEEP_PM_OPS
+#ifndef HAVE_SET_RX_MODE
+#define HAVE_SET_RX_MODE
+#endif
+
+#endif /* < 2.6.34 */
+
+/*****************************************************************************/
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,35) )
+ssize_t _kc_simple_write_to_buffer(void *to, size_t available, loff_t *ppos,
+				   const void __user *from, size_t count);
+#define simple_write_to_buffer _kc_simple_write_to_buffer
+
+#if (!(RHEL_RELEASE_CODE && RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(6,4)))
+static inline struct pci_dev *pci_physfn(struct pci_dev *dev)
+{
+#ifdef HAVE_PCI_DEV_IS_VIRTFN_BIT
+#ifdef CONFIG_PCI_IOV
+	if (dev->is_virtfn)
+		dev = dev->physfn;
+#endif /* CONFIG_PCI_IOV */
+#endif /* HAVE_PCI_DEV_IS_VIRTFN_BIT */
+	return dev;
+}
+#endif /* ! RHEL >= 6.4 */
+
+#ifndef PCI_EXP_LNKSTA_NLW_SHIFT
+#define PCI_EXP_LNKSTA_NLW_SHIFT 4
+#endif
+
+#ifndef numa_node_id
+#define numa_node_id() 0
+#endif
+#ifndef numa_mem_id
+#define numa_mem_id numa_node_id
+#endif
+#if (!(RHEL_RELEASE_CODE && RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(6,0)))
+#ifdef HAVE_TX_MQ
+#include <net/sch_generic.h>
+#ifndef CONFIG_NETDEVICES_MULTIQUEUE
+int _kc_netif_set_real_num_tx_queues(struct net_device *, unsigned int);
+#else /* CONFIG_NETDEVICES_MULTI_QUEUE */
+static inline int _kc_netif_set_real_num_tx_queues(struct net_device *dev,
+						   unsigned int txq)
+{
+	dev->egress_subqueue_count = txq;
+	return 0;
+}
+#endif /* CONFIG_NETDEVICES_MULTI_QUEUE */
+#else /* HAVE_TX_MQ */
+static inline int _kc_netif_set_real_num_tx_queues(struct net_device __always_unused *dev,
+						   unsigned int __always_unused txq)
+{
+	return 0;
+}
+#endif /* HAVE_TX_MQ */
+#define netif_set_real_num_tx_queues(dev, txq) \
+	_kc_netif_set_real_num_tx_queues(dev, txq)
+#endif /* !(RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(6,0)) */
+#ifndef ETH_FLAG_RXHASH
+#define ETH_FLAG_RXHASH (1<<28)
+#endif /* ETH_FLAG_RXHASH */
+#if (RHEL_RELEASE_CODE && RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(6,0))
+#define HAVE_IRQ_AFFINITY_HINT
+#endif
+struct device_node;
+#else /* < 2.6.35 */
+#define HAVE_STRUCT_DEVICE_OF_NODE
+#define HAVE_PM_QOS_REQUEST_LIST
+#define HAVE_IRQ_AFFINITY_HINT
+#include <linux/of.h>
+#endif /* < 2.6.35 */
+
+/*****************************************************************************/
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,36) )
+int _kc_ethtool_op_set_flags(struct net_device *, u32, u32);
+#define ethtool_op_set_flags _kc_ethtool_op_set_flags
+u32 _kc_ethtool_op_get_flags(struct net_device *);
+#define ethtool_op_get_flags _kc_ethtool_op_get_flags
+
+enum {
+	WQ_UNBOUND = 0,
+	WQ_RESCUER = 0,
+};
+
+#ifdef CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS
+#ifdef NET_IP_ALIGN
+#undef NET_IP_ALIGN
+#endif
+#define NET_IP_ALIGN 0
+#endif /* CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS */
+
+#ifdef NET_SKB_PAD
+#undef NET_SKB_PAD
+#endif
+
+#if (L1_CACHE_BYTES > 32)
+#define NET_SKB_PAD L1_CACHE_BYTES
+#else
+#define NET_SKB_PAD 32
+#endif
+
+static inline struct sk_buff *_kc_netdev_alloc_skb_ip_align(struct net_device *dev,
+							    unsigned int length)
+{
+	struct sk_buff *skb;
+
+	skb = alloc_skb(length + NET_SKB_PAD + NET_IP_ALIGN, GFP_ATOMIC);
+	if (skb) {
+#if (NET_IP_ALIGN + NET_SKB_PAD)
+		skb_reserve(skb, NET_IP_ALIGN + NET_SKB_PAD);
+#endif
+		skb->dev = dev;
+	}
+	return skb;
+}
+
+#ifdef netdev_alloc_skb_ip_align
+#undef netdev_alloc_skb_ip_align
+#endif
+#define netdev_alloc_skb_ip_align(n, l) _kc_netdev_alloc_skb_ip_align(n, l)
+
+#undef netif_level
+#define netif_level(level, priv, type, dev, fmt, args...)	\
+do {								\
+	if (netif_msg_##type(priv))				\
+		netdev_##level(dev, fmt, ##args);		\
+} while (0)
+
+#if (!(RHEL_RELEASE_CODE && RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(6,3)))
+#undef usleep_range
+#define usleep_range(min, max)	msleep(DIV_ROUND_UP(min, 1000))
+#endif
+
+#define u64_stats_update_begin(a) do { } while(0)
+#define u64_stats_update_end(a) do { } while(0)
+#define u64_stats_fetch_begin(a) do { } while(0)
+#define u64_stats_fetch_retry_bh(a,b) (0)
+#define u64_stats_fetch_begin_bh(a) (0)
+
+#if (RHEL_RELEASE_CODE && RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(6,1))
+#define HAVE_8021P_SUPPORT
+#endif
+
+/* RHEL6.4 and SLES11sp2 backported skb_tx_timestamp */
+#if (!(RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(6,4)) && \
+     !(SLE_VERSION_CODE >= SLE_VERSION(11,2,0)))
+static inline void skb_tx_timestamp(struct sk_buff __always_unused *skb)
+{
+	return;
+}
+#endif
+
+#else /* < 2.6.36 */
+
+#define msleep(x)	do { if (x > 20)				\
+				msleep(x);				\
+			     else					\
+				usleep_range(1000 * x, 2000 * x);	\
+			} while (0)
+
+#define HAVE_PM_QOS_REQUEST_ACTIVE
+#define HAVE_8021P_SUPPORT
+#define HAVE_NDO_GET_STATS64
+#endif /* < 2.6.36 */
+
+/*****************************************************************************/
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,37) )
+#define HAVE_NON_CONST_PCI_DRIVER_NAME
+#ifndef netif_set_real_num_tx_queues
+static inline int _kc_netif_set_real_num_tx_queues(struct net_device *dev,
+						   unsigned int txq)
+{
+	netif_set_real_num_tx_queues(dev, txq);
+	return 0;
+}
+#define netif_set_real_num_tx_queues(dev, txq) \
+	_kc_netif_set_real_num_tx_queues(dev, txq)
+#endif
+#ifndef netif_set_real_num_rx_queues
+static inline int __kc_netif_set_real_num_rx_queues(struct net_device __always_unused *dev,
+						    unsigned int __always_unused rxq)
+{
+	return 0;
+}
+#define netif_set_real_num_rx_queues(dev, rxq) \
+	__kc_netif_set_real_num_rx_queues((dev), (rxq))
+#endif
+#ifndef ETHTOOL_RXNTUPLE_ACTION_CLEAR
+#define ETHTOOL_RXNTUPLE_ACTION_CLEAR (-2)
+#endif
+#ifndef VLAN_N_VID
+#define VLAN_N_VID	VLAN_GROUP_ARRAY_LEN
+#endif /* VLAN_N_VID */
+#ifndef ETH_FLAG_TXVLAN
+#define ETH_FLAG_TXVLAN BIT(7)
+#endif /* ETH_FLAG_TXVLAN */
+#ifndef ETH_FLAG_RXVLAN
+#define ETH_FLAG_RXVLAN BIT(8)
+#endif /* ETH_FLAG_RXVLAN */
+
+#define WQ_MEM_RECLAIM WQ_RESCUER
+
+static inline void _kc_skb_checksum_none_assert(struct sk_buff *skb)
+{
+	WARN_ON(skb->ip_summed != CHECKSUM_NONE);
+}
+#define skb_checksum_none_assert(skb) _kc_skb_checksum_none_assert(skb)
+
+static inline void *_kc_vzalloc_node(unsigned long size, int node)
+{
+	void *addr = vmalloc_node(size, node);
+	if (addr)
+		memset(addr, 0, size);
+	return addr;
+}
+#define vzalloc_node(_size, _node) _kc_vzalloc_node(_size, _node)
+
+static inline void *_kc_vzalloc(unsigned long size)
+{
+	void *addr = vmalloc(size);
+	if (addr)
+		memset(addr, 0, size);
+	return addr;
+}
+#define vzalloc(_size) _kc_vzalloc(_size)
+
+#if (!(RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(5,7)) || \
+     (RHEL_RELEASE_CODE == RHEL_RELEASE_VERSION(6,0)))
+static inline __be16 vlan_get_protocol(const struct sk_buff *skb)
+{
+	if (vlan_tx_tag_present(skb) ||
+	    skb->protocol != cpu_to_be16(ETH_P_8021Q))
+		return skb->protocol;
+
+	if (skb_headlen(skb) < sizeof(struct vlan_ethhdr))
+		return 0;
+
+	return ((struct vlan_ethhdr*)skb->data)->h_vlan_encapsulated_proto;
+}
+#endif /* !RHEL5.7+ || RHEL6.0 */
+
+#ifdef HAVE_HW_TIME_STAMP
+#define SKBTX_HW_TSTAMP BIT(0)
+#define SKBTX_IN_PROGRESS BIT(2)
+#define SKB_SHARED_TX_IS_UNION
+#endif
+
+#ifndef device_wakeup_enable
+#define device_wakeup_enable(dev)	device_set_wakeup_enable(dev, true)
+#endif
+
+#if ( LINUX_VERSION_CODE > KERNEL_VERSION(2,4,18) )
+#ifndef HAVE_VLAN_RX_REGISTER
+#define HAVE_VLAN_RX_REGISTER
+#endif
+#endif /* > 2.4.18 */
+#endif /* < 2.6.37 */
+
+/*****************************************************************************/
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,38) )
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,22) )
+#define skb_checksum_start_offset(skb) skb_transport_offset(skb)
+#else /* 2.6.22 -> 2.6.37 */
+static inline int _kc_skb_checksum_start_offset(const struct sk_buff *skb)
+{
+        return skb->csum_start - skb_headroom(skb);
+}
+#define skb_checksum_start_offset(skb) _kc_skb_checksum_start_offset(skb)
+#endif /* 2.6.22 -> 2.6.37 */
+#if IS_ENABLED(CONFIG_DCB)
+#ifndef IEEE_8021QAZ_MAX_TCS
+#define IEEE_8021QAZ_MAX_TCS 8
+#endif
+#ifndef DCB_CAP_DCBX_HOST
+#define DCB_CAP_DCBX_HOST		0x01
+#endif
+#ifndef DCB_CAP_DCBX_LLD_MANAGED
+#define DCB_CAP_DCBX_LLD_MANAGED	0x02
+#endif
+#ifndef DCB_CAP_DCBX_VER_CEE
+#define DCB_CAP_DCBX_VER_CEE		0x04
+#endif
+#ifndef DCB_CAP_DCBX_VER_IEEE
+#define DCB_CAP_DCBX_VER_IEEE		0x08
+#endif
+#ifndef DCB_CAP_DCBX_STATIC
+#define DCB_CAP_DCBX_STATIC		0x10
+#endif
+#endif /* CONFIG_DCB */
+#if (RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(6,2))
+#define CONFIG_XPS
+#endif /* RHEL_RELEASE_VERSION(6,2) */
+#endif /* < 2.6.38 */
+
+/*****************************************************************************/
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,39) )
+#ifndef TC_BITMASK
+#define TC_BITMASK 15
+#endif
+#ifndef NETIF_F_RXCSUM
+#define NETIF_F_RXCSUM		BIT(29)
+#endif
+#ifndef skb_queue_reverse_walk_safe
+#define skb_queue_reverse_walk_safe(queue, skb, tmp)				\
+		for (skb = (queue)->prev, tmp = skb->prev;			\
+		     skb != (struct sk_buff *)(queue);				\
+		     skb = tmp, tmp = skb->prev)
+#endif
+#if defined(CONFIG_FCOE) || defined(CONFIG_FCOE_MODULE)
+#ifndef FCOE_MTU
+#define FCOE_MTU	2158
+#endif
+#endif
+#if IS_ENABLED(CONFIG_DCB)
+#ifndef IEEE_8021QAZ_APP_SEL_ETHERTYPE
+#define IEEE_8021QAZ_APP_SEL_ETHERTYPE	1
+#endif
+#endif
+#if (!(RHEL_RELEASE_CODE && RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(6,4)))
+#define kstrtoul(a, b, c)  ((*(c)) = simple_strtoul((a), NULL, (b)), 0)
+#define kstrtouint(a, b, c)  ((*(c)) = simple_strtoul((a), NULL, (b)), 0)
+#define kstrtou32(a, b, c)  ((*(c)) = simple_strtoul((a), NULL, (b)), 0)
+#endif /* !(RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(6,4)) */
+#if (!(RHEL_RELEASE_CODE && RHEL_RELEASE_CODE > RHEL_RELEASE_VERSION(6,0)))
+u16 ___kc_skb_tx_hash(struct net_device *, const struct sk_buff *, u16);
+#define __skb_tx_hash(n, s, q) ___kc_skb_tx_hash((n), (s), (q))
+u8 _kc_netdev_get_num_tc(struct net_device *dev);
+#define netdev_get_num_tc(dev) _kc_netdev_get_num_tc(dev)
+int _kc_netdev_set_num_tc(struct net_device *dev, u8 num_tc);
+#define netdev_set_num_tc(dev, tc) _kc_netdev_set_num_tc((dev), (tc))
+#define netdev_reset_tc(dev) _kc_netdev_set_num_tc((dev), 0)
+#define netdev_set_tc_queue(dev, tc, cnt, off) do {} while (0)
+u8 _kc_netdev_get_prio_tc_map(struct net_device *dev, u8 up);
+#define netdev_get_prio_tc_map(dev, up) _kc_netdev_get_prio_tc_map(dev, up)
+#define netdev_set_prio_tc_map(dev, up, tc) do {} while (0)
+#else /* RHEL6.1 or greater */
+#ifndef HAVE_MQPRIO
+#define HAVE_MQPRIO
+#endif /* HAVE_MQPRIO */
+#if IS_ENABLED(CONFIG_DCB)
+#ifndef HAVE_DCBNL_IEEE
+#define HAVE_DCBNL_IEEE
+#ifndef IEEE_8021QAZ_TSA_STRICT
+#define IEEE_8021QAZ_TSA_STRICT		0
+#endif
+#ifndef IEEE_8021QAZ_TSA_ETS
+#define IEEE_8021QAZ_TSA_ETS		2
+#endif
+#ifndef IEEE_8021QAZ_APP_SEL_ETHERTYPE
+#define IEEE_8021QAZ_APP_SEL_ETHERTYPE	1
+#endif
+#endif
+#endif /* CONFIG_DCB */
+#endif /* !(RHEL_RELEASE_CODE > RHEL_RELEASE_VERSION(6,0)) */
+
+#ifndef udp_csum
+#define udp_csum __kc_udp_csum
+static inline __wsum __kc_udp_csum(struct sk_buff *skb)
+{
+	__wsum csum = csum_partial(skb_transport_header(skb),
+				   sizeof(struct udphdr), skb->csum);
+
+	for (skb = skb_shinfo(skb)->frag_list; skb; skb = skb->next) {
+		csum = csum_add(csum, skb->csum);
+	}
+	return csum;
+}
+#endif /* udp_csum */
+#else /* < 2.6.39 */
+#if defined(CONFIG_FCOE) || defined(CONFIG_FCOE_MODULE)
+#ifndef HAVE_NETDEV_OPS_FCOE_DDP_TARGET
+#define HAVE_NETDEV_OPS_FCOE_DDP_TARGET
+#endif
+#endif /* CONFIG_FCOE || CONFIG_FCOE_MODULE */
+#ifndef HAVE_MQPRIO
+#define HAVE_MQPRIO
+#endif
+#ifndef HAVE_SETUP_TC
+#define HAVE_SETUP_TC
+#endif
+#ifdef CONFIG_DCB
+#ifndef HAVE_DCBNL_IEEE
+#define HAVE_DCBNL_IEEE
+#endif
+#endif /* CONFIG_DCB */
+#ifndef HAVE_NDO_SET_FEATURES
+#define HAVE_NDO_SET_FEATURES
+#endif
+#define HAVE_IRQ_AFFINITY_NOTIFY
+#endif /* < 2.6.39 */
+
+/*****************************************************************************/
+/* use < 2.6.40 because of a Fedora 15 kernel update where they
+ * updated the kernel version to 2.6.40.x and they back-ported 3.0 features
+ * like set_phys_id for ethtool.
+ */
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,40) )
+#ifdef ETHTOOL_GRXRINGS
+#ifndef FLOW_EXT
+#define	FLOW_EXT	0x80000000
+union _kc_ethtool_flow_union {
+	struct ethtool_tcpip4_spec		tcp_ip4_spec;
+	struct ethtool_usrip4_spec		usr_ip4_spec;
+	__u8					hdata[60];
+};
+struct _kc_ethtool_flow_ext {
+	__be16	vlan_etype;
+	__be16	vlan_tci;
+	__be32	data[2];
+};
+struct _kc_ethtool_rx_flow_spec {
+	__u32		flow_type;
+	union _kc_ethtool_flow_union h_u;
+	struct _kc_ethtool_flow_ext h_ext;
+	union _kc_ethtool_flow_union m_u;
+	struct _kc_ethtool_flow_ext m_ext;
+	__u64		ring_cookie;
+	__u32		location;
+};
+#define ethtool_rx_flow_spec _kc_ethtool_rx_flow_spec
+#endif /* FLOW_EXT */
+#endif
+
+#define pci_disable_link_state_locked pci_disable_link_state
+
+#ifndef PCI_LTR_VALUE_MASK
+#define  PCI_LTR_VALUE_MASK	0x000003ff
+#endif
+#ifndef PCI_LTR_SCALE_MASK
+#define  PCI_LTR_SCALE_MASK	0x00001c00
+#endif
+#ifndef PCI_LTR_SCALE_SHIFT
+#define  PCI_LTR_SCALE_SHIFT	10
+#endif
+
+#else /* < 2.6.40 */
+#define HAVE_ETHTOOL_SET_PHYS_ID
+#endif /* < 2.6.40 */
+
+/*****************************************************************************/
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(3,0,0) )
+#define USE_LEGACY_PM_SUPPORT
+#ifndef kfree_rcu
+#define kfree_rcu(_ptr, _rcu_head) kfree(_ptr)
+#endif /* kfree_rcu */
+#ifndef kstrtol_from_user
+#define kstrtol_from_user(s, c, b, r) _kc_kstrtol_from_user(s, c, b, r)
+static inline int _kc_kstrtol_from_user(const char __user *s, size_t count,
+					unsigned int base, long *res)
+{
+	/* sign, base 2 representation, newline, terminator */
+	char buf[1 + sizeof(long) * 8 + 1 + 1];
+
+	count = min(count, sizeof(buf) - 1);
+	if (copy_from_user(buf, s, count))
+		return -EFAULT;
+	buf[count] = '\0';
+	return strict_strtol(buf, base, res);
+}
+#endif
+
+#if (RHEL_RELEASE_CODE && (RHEL_RELEASE_CODE > RHEL_RELEASE_VERSION(7,0) || \
+     RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(5,7)))
+/* 20000base_blah_full Supported and Advertised Registers */
+#define SUPPORTED_20000baseMLD2_Full	BIT(21)
+#define SUPPORTED_20000baseKR2_Full	BIT(22)
+#define ADVERTISED_20000baseMLD2_Full	BIT(21)
+#define ADVERTISED_20000baseKR2_Full	BIT(22)
+#endif /* RHEL_RELEASE_CODE */
+#endif /* < 3.0.0 */
+
+/*****************************************************************************/
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(3,1,0) )
+#ifndef __netdev_alloc_skb_ip_align
+#define __netdev_alloc_skb_ip_align(d,l,_g) netdev_alloc_skb_ip_align(d,l)
+#endif /* __netdev_alloc_skb_ip_align */
+#define dcb_ieee_setapp(dev, app) dcb_setapp(dev, app)
+#define dcb_ieee_delapp(dev, app) 0
+#define dcb_ieee_getapp_mask(dev, app) (1 << app->priority)
+
+/* 1000BASE-T Control register */
+#define CTL1000_AS_MASTER	0x0800
+#define CTL1000_ENABLE_MASTER	0x1000
+
+/* kernels less than 3.0.0 don't have this */
+#ifndef ETH_P_8021AD
+#define ETH_P_8021AD	0x88A8
+#endif
+
+/* Stub definition for !CONFIG_OF is introduced later */
+#ifdef CONFIG_OF
+static inline struct device_node *
+pci_device_to_OF_node(struct pci_dev __maybe_unused *pdev)
+{
+#ifdef HAVE_STRUCT_DEVICE_OF_NODE
+	return pdev ? pdev->dev.of_node : NULL;
+#else
+	return NULL;
+#endif /* !HAVE_STRUCT_DEVICE_OF_NODE */
+}
+#endif /* CONFIG_OF */
+#else /* < 3.1.0 */
+#ifndef HAVE_DCBNL_IEEE_DELAPP
+#define HAVE_DCBNL_IEEE_DELAPP
+#endif
+#endif /* < 3.1.0 */
+
+/*****************************************************************************/
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(3,2,0) )
+#ifndef dma_zalloc_coherent
+#define dma_zalloc_coherent(d, s, h, f) _kc_dma_zalloc_coherent(d, s, h, f)
+static inline void *_kc_dma_zalloc_coherent(struct device *dev, size_t size,
+					    dma_addr_t *dma_handle, gfp_t flag)
+{
+	void *ret = dma_alloc_coherent(dev, size, dma_handle, flag);
+	if (ret)
+		memset(ret, 0, size);
+	return ret;
+}
+#endif
+#ifdef ETHTOOL_GRXRINGS
+#define HAVE_ETHTOOL_GET_RXNFC_VOID_RULE_LOCS
+#endif /* ETHTOOL_GRXRINGS */
+
+#ifndef skb_frag_size
+#define skb_frag_size(frag)	_kc_skb_frag_size(frag)
+static inline unsigned int _kc_skb_frag_size(const skb_frag_t *frag)
+{
+	return frag->size;
+}
+#endif /* skb_frag_size */
+
+#ifndef skb_frag_size_sub
+#define skb_frag_size_sub(frag, delta)	_kc_skb_frag_size_sub(frag, delta)
+static inline void _kc_skb_frag_size_sub(skb_frag_t *frag, int delta)
+{
+	frag->size -= delta;
+}
+#endif /* skb_frag_size_sub */
+
+#ifndef skb_frag_page
+#define skb_frag_page(frag)	_kc_skb_frag_page(frag)
+static inline struct page *_kc_skb_frag_page(const skb_frag_t *frag)
+{
+	return frag->page;
+}
+#endif /* skb_frag_page */
+
+#ifndef skb_frag_address
+#define skb_frag_address(frag)	_kc_skb_frag_address(frag)
+static inline void *_kc_skb_frag_address(const skb_frag_t *frag)
+{
+	return page_address(skb_frag_page(frag)) + frag->page_offset;
+}
+#endif /* skb_frag_address */
+
+#ifndef skb_frag_dma_map
+#if ( LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0) )
+#include <linux/dma-mapping.h>
+#endif
+#define skb_frag_dma_map(dev,frag,offset,size,dir) \
+		_kc_skb_frag_dma_map(dev,frag,offset,size,dir)
+static inline dma_addr_t _kc_skb_frag_dma_map(struct device *dev,
+					      const skb_frag_t *frag,
+					      size_t offset, size_t size,
+					      enum dma_data_direction dir)
+{
+	return dma_map_page(dev, skb_frag_page(frag),
+			    frag->page_offset + offset, size, dir);
+}
+#endif /* skb_frag_dma_map */
+
+#ifndef __skb_frag_unref
+#define __skb_frag_unref(frag) __kc_skb_frag_unref(frag)
+static inline void __kc_skb_frag_unref(skb_frag_t *frag)
+{
+	put_page(skb_frag_page(frag));
+}
+#endif /* __skb_frag_unref */
+
+#ifndef SPEED_UNKNOWN
+#define SPEED_UNKNOWN	-1
+#endif
+#ifndef DUPLEX_UNKNOWN
+#define DUPLEX_UNKNOWN	0xff
+#endif
+#if ((RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(6,3)) ||\
+     (SLE_VERSION_CODE && SLE_VERSION_CODE >= SLE_VERSION(11,3,0)))
+#ifndef HAVE_PCI_DEV_FLAGS_ASSIGNED
+#define HAVE_PCI_DEV_FLAGS_ASSIGNED
+#endif
+#endif
+#else /* < 3.2.0 */
+#ifndef HAVE_PCI_DEV_FLAGS_ASSIGNED
+#define HAVE_PCI_DEV_FLAGS_ASSIGNED
+#define HAVE_VF_SPOOFCHK_CONFIGURE
+#endif
+#ifndef HAVE_SKB_L4_RXHASH
+#define HAVE_SKB_L4_RXHASH
+#endif
+#define HAVE_IOMMU_PRESENT
+#define HAVE_PM_QOS_REQUEST_LIST_NEW
+#endif /* < 3.2.0 */
+
+/*****************************************************************************/
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(3,3,0) )
+/* NOTE: the order of parameters to _kc_alloc_workqueue() is different than
+ * alloc_workqueue() to avoid compiler warning from -Wvarargs
+ */
+static inline struct workqueue_struct * __attribute__ ((format(printf, 3, 4)))
+_kc_alloc_workqueue(__maybe_unused int flags, __maybe_unused int max_active,
+		    const char *fmt, ...)
+{
+	struct workqueue_struct *wq;
+	va_list args, temp;
+	unsigned int len;
+	char *p;
+
+	va_start(args, fmt);
+	va_copy(temp, args);
+	len = vsnprintf(NULL, 0, fmt, temp);
+	va_end(temp);
+
+	p = kmalloc(len + 1, GFP_KERNEL);
+	if (!p) {
+		va_end(args);
+		return NULL;
+	}
+
+	vsnprintf(p, len + 1, fmt, args);
+	va_end(args);
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,36) )
+	wq = create_workqueue(p);
+#else
+	wq = alloc_workqueue(p, flags, max_active);
+#endif
+	kfree(p);
+
+	return wq;
+}
+#ifdef alloc_workqueue
+#undef alloc_workqueue
+#endif
+#define alloc_workqueue(fmt, flags, max_active, args...) \
+	_kc_alloc_workqueue(flags, max_active, fmt, ##args)
+
+#if !(RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(6,5))
+typedef u32 netdev_features_t;
+#endif
+#undef PCI_EXP_TYPE_RC_EC
+#define  PCI_EXP_TYPE_RC_EC	0xa	/* Root Complex Event Collector */
+#ifndef CONFIG_BQL
+#define netdev_tx_completed_queue(_q, _p, _b) do {} while (0)
+#define netdev_completed_queue(_n, _p, _b) do {} while (0)
+#define netdev_tx_sent_queue(_q, _b) do {} while (0)
+#define netdev_sent_queue(_n, _b) do {} while (0)
+#define netdev_tx_reset_queue(_q) do {} while (0)
+#define netdev_reset_queue(_n) do {} while (0)
+#endif
+#if (SLE_VERSION_CODE && SLE_VERSION_CODE >= SLE_VERSION(11,3,0))
+#define HAVE_ETHTOOL_GRXFHINDIR_SIZE
+#endif /* SLE_VERSION(11,3,0) */
+#define netif_xmit_stopped(_q) netif_tx_queue_stopped(_q)
+#if !(SLE_VERSION_CODE && SLE_VERSION_CODE >= SLE_VERSION(11,4,0))
+static inline int __kc_ipv6_skip_exthdr(const struct sk_buff *skb, int start,
+					u8 *nexthdrp,
+					__be16 __always_unused *frag_offp)
+{
+	return ipv6_skip_exthdr(skb, start, nexthdrp);
+}
+#undef ipv6_skip_exthdr
+#define ipv6_skip_exthdr(a,b,c,d) __kc_ipv6_skip_exthdr((a), (b), (c), (d))
+#endif /* !SLES11sp4 or greater */
+
+#if (!(RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(6,4)) && \
+     !(SLE_VERSION_CODE >= SLE_VERSION(11,3,0)))
+static inline u32 ethtool_rxfh_indir_default(u32 index, u32 n_rx_rings)
+{
+	return index % n_rx_rings;
+}
+#endif
+
+#else /* ! < 3.3.0 */
+#define HAVE_ETHTOOL_GRXFHINDIR_SIZE
+#define HAVE_INT_NDO_VLAN_RX_ADD_VID
+#ifdef ETHTOOL_SRXNTUPLE
+#undef ETHTOOL_SRXNTUPLE
+#endif
+#endif /* < 3.3.0 */
+
+/*****************************************************************************/
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(3,4,0) )
+#ifndef NETIF_F_RXFCS
+#define NETIF_F_RXFCS	0
+#endif /* NETIF_F_RXFCS */
+#ifndef NETIF_F_RXALL
+#define NETIF_F_RXALL	0
+#endif /* NETIF_F_RXALL */
+
+#if !(SLE_VERSION_CODE && SLE_VERSION_CODE >= SLE_VERSION(11,3,0))
+#define NUMTCS_RETURNS_U8
+
+int _kc_simple_open(struct inode *inode, struct file *file);
+#define simple_open _kc_simple_open
+#endif /* !(SLE_VERSION_CODE && SLE_VERSION_CODE >= SLE_VERSION(11,3,0)) */
+
+#ifndef skb_add_rx_frag
+#define skb_add_rx_frag _kc_skb_add_rx_frag
+void _kc_skb_add_rx_frag(struct sk_buff * skb, int i, struct page *page,
+			 int off, int size, unsigned int truesize);
+#endif
+#ifdef NET_ADDR_RANDOM
+#define eth_hw_addr_random(N) do { \
+	eth_random_addr(N->dev_addr); \
+	N->addr_assign_type |= NET_ADDR_RANDOM; \
+	} while (0)
+#else /* NET_ADDR_RANDOM */
+#define eth_hw_addr_random(N) eth_random_addr(N->dev_addr)
+#endif /* NET_ADDR_RANDOM */
+
+#ifndef for_each_set_bit_from
+#define for_each_set_bit_from(bit, addr, size) \
+	for ((bit) = find_next_bit((addr), (size), (bit)); \
+			(bit) < (size); \
+			(bit) = find_next_bit((addr), (size), (bit) + 1))
+#endif /* for_each_set_bit_from */
+
+#else /* < 3.4.0 */
+#include <linux/kconfig.h>
+#endif /* >= 3.4.0 */
+
+/*****************************************************************************/
+#if ( LINUX_VERSION_CODE >= KERNEL_VERSION(3,0,0) ) || \
+    ( RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(6,4) )
+#if !defined(NO_PTP_SUPPORT) && IS_ENABLED(CONFIG_PTP_1588_CLOCK)
+#define HAVE_PTP_1588_CLOCK
+#endif /* !NO_PTP_SUPPORT && IS_ENABLED(CONFIG_PTP_1588_CLOCK) */
+#endif /* >= 3.0.0 || RHEL_RELEASE > 6.4 */
+
+/*****************************************************************************/
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(3,5,0) )
+
+#ifndef SIZE_MAX
+#define SIZE_MAX (~(size_t)0)
+#endif
+
+#ifndef BITS_PER_LONG_LONG
+#define BITS_PER_LONG_LONG 64
+#endif
+
+#ifndef ether_addr_equal
+static inline bool __kc_ether_addr_equal(const u8 *addr1, const u8 *addr2)
+{
+	return !compare_ether_addr(addr1, addr2);
+}
+#define ether_addr_equal(_addr1, _addr2) __kc_ether_addr_equal((_addr1),(_addr2))
+#endif
+
+/* Definitions for !CONFIG_OF_NET are introduced in 3.10 */
+#ifdef CONFIG_OF_NET
+static inline int of_get_phy_mode(struct device_node __always_unused *np)
+{
+	return -ENODEV;
+}
+
+static inline const void *
+of_get_mac_address(struct device_node __always_unused *np)
+{
+	return NULL;
+}
+#endif
+#else
+#include <linux/of_net.h>
+#define HAVE_FDB_OPS
+#define HAVE_ETHTOOL_GET_TS_INFO
+#endif /* < 3.5.0 */
+
+/*****************************************************************************/
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(3,6,0) )
+#define PCI_EXP_LNKCAP2		44	/* Link Capability 2 */
+
+#ifndef MDIO_EEE_100TX
+#define MDIO_EEE_100TX		0x0002	/* 100TX EEE cap */
+#endif
+#ifndef MDIO_EEE_1000T
+#define MDIO_EEE_1000T		0x0004	/* 1000T EEE cap */
+#endif
+#ifndef MDIO_EEE_10GT
+#define MDIO_EEE_10GT		0x0008	/* 10GT EEE cap */
+#endif
+#ifndef MDIO_EEE_1000KX
+#define MDIO_EEE_1000KX		0x0010	/* 1000KX EEE cap */
+#endif
+#ifndef MDIO_EEE_10GKX4
+#define MDIO_EEE_10GKX4		0x0020	/* 10G KX4 EEE cap */
+#endif
+#ifndef MDIO_EEE_10GKR
+#define MDIO_EEE_10GKR		0x0040	/* 10G KR EEE cap */
+#endif
+
+#ifndef __GFP_MEMALLOC
+#define __GFP_MEMALLOC 0
+#endif
+
+#ifndef eth_broadcast_addr
+#define eth_broadcast_addr _kc_eth_broadcast_addr
+static inline void _kc_eth_broadcast_addr(u8 *addr)
+{
+	memset(addr, 0xff, ETH_ALEN);
+}
+#endif
+
+#ifndef eth_random_addr
+#define eth_random_addr _kc_eth_random_addr
+static inline void _kc_eth_random_addr(u8 *addr)
+{
+        get_random_bytes(addr, ETH_ALEN);
+        addr[0] &= 0xfe; /* clear multicast */
+        addr[0] |= 0x02; /* set local assignment */
+}
+#endif /* eth_random_addr */
+
+#ifndef DMA_ATTR_SKIP_CPU_SYNC
+#define DMA_ATTR_SKIP_CPU_SYNC 0
+#endif
+#else /* < 3.6.0 */
+#define HAVE_STRUCT_PAGE_PFMEMALLOC
+#endif /* < 3.6.0 */
+
+/******************************************************************************/
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(3,7,0) )
+#include <linux/workqueue.h>
+#ifndef ADVERTISED_40000baseKR4_Full
+/* these defines were all added in one commit, so should be safe
+ * to trigger activiation on one define
+ */
+#define SUPPORTED_40000baseKR4_Full	BIT(23)
+#define SUPPORTED_40000baseCR4_Full	BIT(24)
+#define SUPPORTED_40000baseSR4_Full	BIT(25)
+#define SUPPORTED_40000baseLR4_Full	BIT(26)
+#define ADVERTISED_40000baseKR4_Full	BIT(23)
+#define ADVERTISED_40000baseCR4_Full	BIT(24)
+#define ADVERTISED_40000baseSR4_Full	BIT(25)
+#define ADVERTISED_40000baseLR4_Full	BIT(26)
+#endif
+
+#ifndef mmd_eee_cap_to_ethtool_sup_t
+/**
+ * mmd_eee_cap_to_ethtool_sup_t
+ * @eee_cap: value of the MMD EEE Capability register
+ *
+ * A small helper function that translates MMD EEE Capability (3.20) bits
+ * to ethtool supported settings.
+ */
+static inline u32 __kc_mmd_eee_cap_to_ethtool_sup_t(u16 eee_cap)
+{
+	u32 supported = 0;
+
+	if (eee_cap & MDIO_EEE_100TX)
+		supported |= SUPPORTED_100baseT_Full;
+	if (eee_cap & MDIO_EEE_1000T)
+		supported |= SUPPORTED_1000baseT_Full;
+	if (eee_cap & MDIO_EEE_10GT)
+		supported |= SUPPORTED_10000baseT_Full;
+	if (eee_cap & MDIO_EEE_1000KX)
+		supported |= SUPPORTED_1000baseKX_Full;
+	if (eee_cap & MDIO_EEE_10GKX4)
+		supported |= SUPPORTED_10000baseKX4_Full;
+	if (eee_cap & MDIO_EEE_10GKR)
+		supported |= SUPPORTED_10000baseKR_Full;
+
+	return supported;
+}
+#define mmd_eee_cap_to_ethtool_sup_t(eee_cap) \
+	__kc_mmd_eee_cap_to_ethtool_sup_t(eee_cap)
+#endif /* mmd_eee_cap_to_ethtool_sup_t */
+
+#ifndef mmd_eee_adv_to_ethtool_adv_t
+/**
+ * mmd_eee_adv_to_ethtool_adv_t
+ * @eee_adv: value of the MMD EEE Advertisement/Link Partner Ability registers
+ *
+ * A small helper function that translates the MMD EEE Advertisement (7.60)
+ * and MMD EEE Link Partner Ability (7.61) bits to ethtool advertisement
+ * settings.
+ */
+static inline u32 __kc_mmd_eee_adv_to_ethtool_adv_t(u16 eee_adv)
+{
+	u32 adv = 0;
+
+	if (eee_adv & MDIO_EEE_100TX)
+		adv |= ADVERTISED_100baseT_Full;
+	if (eee_adv & MDIO_EEE_1000T)
+		adv |= ADVERTISED_1000baseT_Full;
+	if (eee_adv & MDIO_EEE_10GT)
+		adv |= ADVERTISED_10000baseT_Full;
+	if (eee_adv & MDIO_EEE_1000KX)
+		adv |= ADVERTISED_1000baseKX_Full;
+	if (eee_adv & MDIO_EEE_10GKX4)
+		adv |= ADVERTISED_10000baseKX4_Full;
+	if (eee_adv & MDIO_EEE_10GKR)
+		adv |= ADVERTISED_10000baseKR_Full;
+
+	return adv;
+}
+
+#define mmd_eee_adv_to_ethtool_adv_t(eee_adv) \
+	__kc_mmd_eee_adv_to_ethtool_adv_t(eee_adv)
+#endif /* mmd_eee_adv_to_ethtool_adv_t */
+
+#ifndef ethtool_adv_to_mmd_eee_adv_t
+/**
+ * ethtool_adv_to_mmd_eee_adv_t
+ * @adv: the ethtool advertisement settings
+ *
+ * A small helper function that translates ethtool advertisement settings
+ * to EEE advertisements for the MMD EEE Advertisement (7.60) and
+ * MMD EEE Link Partner Ability (7.61) registers.
+ */
+static inline u16 __kc_ethtool_adv_to_mmd_eee_adv_t(u32 adv)
+{
+	u16 reg = 0;
+
+	if (adv & ADVERTISED_100baseT_Full)
+		reg |= MDIO_EEE_100TX;
+	if (adv & ADVERTISED_1000baseT_Full)
+		reg |= MDIO_EEE_1000T;
+	if (adv & ADVERTISED_10000baseT_Full)
+		reg |= MDIO_EEE_10GT;
+	if (adv & ADVERTISED_1000baseKX_Full)
+		reg |= MDIO_EEE_1000KX;
+	if (adv & ADVERTISED_10000baseKX4_Full)
+		reg |= MDIO_EEE_10GKX4;
+	if (adv & ADVERTISED_10000baseKR_Full)
+		reg |= MDIO_EEE_10GKR;
+
+	return reg;
+}
+#define ethtool_adv_to_mmd_eee_adv_t(adv) __kc_ethtool_adv_to_mmd_eee_adv_t(adv)
+#endif /* ethtool_adv_to_mmd_eee_adv_t */
+
+#ifndef pci_pcie_type
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24) )
+static inline u8 pci_pcie_type(struct pci_dev *pdev)
+{
+	int pos;
+	u16 reg16;
+
+	pos = pci_find_capability(pdev, PCI_CAP_ID_EXP);
+	BUG_ON(!pos);
+	pci_read_config_word(pdev, pos + PCI_EXP_FLAGS, &reg16);
+	return (reg16 & PCI_EXP_FLAGS_TYPE) >> 4;
+}
+#else /* < 2.6.24 */
+#define pci_pcie_type(x)	(x)->pcie_type
+#endif /* < 2.6.24 */
+#endif /* pci_pcie_type */
+
+#if ( ! ( RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(6,4) ) ) && \
+    ( ! ( SLE_VERSION_CODE >= SLE_VERSION(11,3,0) ) ) && \
+    ( LINUX_VERSION_CODE >= KERNEL_VERSION(3,0,0) )
+#define ptp_clock_register(caps, args...) ptp_clock_register(caps)
+#endif
+
+#ifndef pcie_capability_read_word
+int __kc_pcie_capability_read_word(struct pci_dev *dev, int pos, u16 *val);
+#define pcie_capability_read_word(d,p,v) __kc_pcie_capability_read_word(d,p,v)
+#endif /* pcie_capability_read_word */
+
+#ifndef pcie_capability_read_dword
+int __kc_pcie_capability_read_dword(struct pci_dev *dev, int pos, u32 *val);
+#define pcie_capability_read_dword(d,p,v) __kc_pcie_capability_read_dword(d,p,v)
+#endif
+
+#ifndef pcie_capability_write_word
+int __kc_pcie_capability_write_word(struct pci_dev *dev, int pos, u16 val);
+#define pcie_capability_write_word(d,p,v) __kc_pcie_capability_write_word(d,p,v)
+#endif /* pcie_capability_write_word */
+
+#ifndef pcie_capability_clear_and_set_word
+int __kc_pcie_capability_clear_and_set_word(struct pci_dev *dev, int pos,
+					    u16 clear, u16 set);
+#define pcie_capability_clear_and_set_word(d,p,c,s) \
+	__kc_pcie_capability_clear_and_set_word(d,p,c,s)
+#endif /* pcie_capability_clear_and_set_word */
+
+#ifndef pcie_capability_clear_word
+int __kc_pcie_capability_clear_word(struct pci_dev *dev, int pos,
+					     u16 clear);
+#define pcie_capability_clear_word(d, p, c) \
+	__kc_pcie_capability_clear_word(d, p, c)
+#endif /* pcie_capability_clear_word */
+
+#ifndef PCI_EXP_LNKSTA2
+#define PCI_EXP_LNKSTA2		50	/* Link Status 2 */
+#endif
+
+#if (SLE_VERSION_CODE && SLE_VERSION_CODE >= SLE_VERSION(11,3,0))
+#define USE_CONST_DEV_UC_CHAR
+#define HAVE_NDO_FDB_ADD_NLATTR
+#endif
+
+#if !(RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(6,8))
+#define napi_gro_flush(_napi, _flush_old) napi_gro_flush(_napi)
+#endif /* !RHEL6.8+ */
+
+#if (RHEL_RELEASE_CODE && RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(6,6))
+#include <linux/hashtable.h>
+#else
+
+#define DEFINE_HASHTABLE(name, bits)						\
+	struct hlist_head name[1 << (bits)] =					\
+			{ [0 ... ((1 << (bits)) - 1)] = HLIST_HEAD_INIT }
+
+#define DEFINE_READ_MOSTLY_HASHTABLE(name, bits)				\
+	struct hlist_head name[1 << (bits)] __read_mostly =			\
+			{ [0 ... ((1 << (bits)) - 1)] = HLIST_HEAD_INIT }
+
+#define DECLARE_HASHTABLE(name, bits)                                   	\
+	struct hlist_head name[1 << (bits)]
+
+#define HASH_SIZE(name) (ARRAY_SIZE(name))
+#define HASH_BITS(name) ilog2(HASH_SIZE(name))
+
+/* Use hash_32 when possible to allow for fast 32bit hashing in 64bit kernels. */
+#define hash_min(val, bits)							\
+	(sizeof(val) <= 4 ? hash_32(val, bits) : hash_long(val, bits))
+
+static inline void __hash_init(struct hlist_head *ht, unsigned int sz)
+{
+	unsigned int i;
+
+	for (i = 0; i < sz; i++)
+		INIT_HLIST_HEAD(&ht[i]);
+}
+
+#define hash_init(hashtable) __hash_init(hashtable, HASH_SIZE(hashtable))
+
+#define hash_add(hashtable, node, key)						\
+	hlist_add_head(node, &hashtable[hash_min(key, HASH_BITS(hashtable))])
+
+static inline bool hash_hashed(struct hlist_node *node)
+{
+	return !hlist_unhashed(node);
+}
+
+static inline bool __hash_empty(struct hlist_head *ht, unsigned int sz)
+{
+	unsigned int i;
+
+	for (i = 0; i < sz; i++)
+		if (!hlist_empty(&ht[i]))
+			return false;
+
+	return true;
+}
+
+#define hash_empty(hashtable) __hash_empty(hashtable, HASH_SIZE(hashtable))
+
+static inline void hash_del(struct hlist_node *node)
+{
+	hlist_del_init(node);
+}
+#endif /* RHEL >= 6.6 */
+
+/* We don't have @flags support prior to 3.7, so we'll simply ignore the flags
+ * parameter on these older kernels.
+ */
+#define __setup_timer(_timer, _fn, _data, _flags)	\
+	setup_timer((_timer), (_fn), (_data))		\
+
+#if ( ! ( RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(6,7) ) ) && \
+	( ! ( SLE_VERSION_CODE >= SLE_VERSION(12,0,0) ) )
+
+#ifndef mod_delayed_work
+/**
+ * __mod_delayed_work - modify delay or queue delayed work
+ * @wq: workqueue to use
+ * @dwork: delayed work to queue
+ * @delay: number of jiffies to wait before queueing
+ *
+ * Return: %true if @dwork was pending and was rescheduled;
+ *         %false if it wasn't pending
+ *
+ * Note: the dwork parameter was declared as a void*
+ *       to avoid comptibility problems with early 2.6 kernels
+ *       where struct delayed_work is not declared. Unlike the original
+ *       implementation flags are not preserved and it shouldn't be
+ *       used in the interrupt context.
+ */
+static inline bool __mod_delayed_work(struct workqueue_struct *wq,
+				    void *dwork,
+				    unsigned long delay)
+{
+	bool ret = cancel_delayed_work(dwork);
+	queue_delayed_work(wq, dwork, delay);
+	return ret;
+}
+#define mod_delayed_work(wq, dwork, delay) __mod_delayed_work(wq, dwork, delay)
+#endif /* mod_delayed_work */
+
+#endif /* !(RHEL >= 6.7) && !(SLE >= 12.0) */
+#else /* >= 3.7.0 */
+#include <linux/hashtable.h>
+#define HAVE_CONST_STRUCT_PCI_ERROR_HANDLERS
+#define USE_CONST_DEV_UC_CHAR
+#define HAVE_NDO_FDB_ADD_NLATTR
+#endif /* >= 3.7.0 */
+
+/*****************************************************************************/
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(3,8,0) )
+#if (!(RHEL_RELEASE_CODE && RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(6,5)) && \
+     !(SLE_VERSION_CODE && SLE_VERSION_CODE >= SLE_VERSION(11,4,0)))
+#ifndef pci_sriov_set_totalvfs
+static inline int __kc_pci_sriov_set_totalvfs(struct pci_dev __always_unused *dev, u16 __always_unused numvfs)
+{
+	return 0;
+}
+#define pci_sriov_set_totalvfs(a, b) __kc_pci_sriov_set_totalvfs((a), (b))
+#endif
+#endif /* !(RHEL_RELEASE_CODE >= 6.5 && SLE_VERSION_CODE >= 11.4) */
+#ifndef PCI_EXP_LNKCTL_ASPM_L0S
+#define  PCI_EXP_LNKCTL_ASPM_L0S  0x01	/* L0s Enable */
+#endif
+#ifndef PCI_EXP_LNKCTL_ASPM_L1
+#define  PCI_EXP_LNKCTL_ASPM_L1   0x02	/* L1 Enable */
+#endif
+#define HAVE_CONFIG_HOTPLUG
+/* Reserved Ethernet Addresses per IEEE 802.1Q */
+static const u8 eth_reserved_addr_base[ETH_ALEN] __aligned(2) = {
+	0x01, 0x80, 0xc2, 0x00, 0x00, 0x00 };
+
+#ifndef is_link_local_ether_addr
+static inline bool __kc_is_link_local_ether_addr(const u8 *addr)
+{
+	__be16 *a = (__be16 *)addr;
+	static const __be16 *b = (const __be16 *)eth_reserved_addr_base;
+	static const __be16 m = cpu_to_be16(0xfff0);
+
+	return ((a[0] ^ b[0]) | (a[1] ^ b[1]) | ((a[2] ^ b[2]) & m)) == 0;
+}
+#define is_link_local_ether_addr(addr) __kc_is_link_local_ether_addr(addr)
+#endif /* is_link_local_ether_addr */
+
+#ifndef FLOW_MAC_EXT
+#define FLOW_MAC_EXT	0x40000000
+#endif /* FLOW_MAC_EXT */
+
+#if (SLE_VERSION_CODE && SLE_VERSION_CODE >= SLE_VERSION(11,4,0))
+#define HAVE_SRIOV_CONFIGURE
+#endif
+
+#ifndef PCI_EXP_LNKCAP_SLS_2_5GB
+#define PCI_EXP_LNKCAP_SLS_2_5GB 0x00000001 /* LNKCAP2 SLS Vector bit 0 */
+#endif
+
+#ifndef PCI_EXP_LNKCAP_SLS_5_0GB
+#define PCI_EXP_LNKCAP_SLS_5_0GB 0x00000002 /* LNKCAP2 SLS Vector bit 1 */
+#endif
+
+#undef PCI_EXP_LNKCAP2_SLS_2_5GB
+#define PCI_EXP_LNKCAP2_SLS_2_5GB 0x00000002 /* Supported Speed 2.5GT/s */
+
+#undef PCI_EXP_LNKCAP2_SLS_5_0GB
+#define PCI_EXP_LNKCAP2_SLS_5_0GB 0x00000004 /* Supported Speed 5GT/s */
+
+#undef PCI_EXP_LNKCAP2_SLS_8_0GB
+#define PCI_EXP_LNKCAP2_SLS_8_0GB 0x00000008 /* Supported Speed 8GT/s */
+
+#else /* >= 3.8.0 */
+#ifndef __devinit
+#define __devinit
+#endif
+
+#ifndef __devinitdata
+#define __devinitdata
+#endif
+
+#ifndef __devinitconst
+#define __devinitconst
+#endif
+
+#ifndef __devexit
+#define __devexit
+#endif
+
+#ifndef __devexit_p
+#define __devexit_p
+#endif
+
+#ifndef HAVE_ENCAP_CSUM_OFFLOAD
+#define HAVE_ENCAP_CSUM_OFFLOAD
+#endif
+
+#ifndef HAVE_GRE_ENCAP_OFFLOAD
+#define HAVE_GRE_ENCAP_OFFLOAD
+#endif
+
+#ifndef HAVE_SRIOV_CONFIGURE
+#define HAVE_SRIOV_CONFIGURE
+#endif
+
+#define HAVE_BRIDGE_ATTRIBS
+#ifndef BRIDGE_MODE_VEB
+#define BRIDGE_MODE_VEB		0	/* Default loopback mode */
+#endif /* BRIDGE_MODE_VEB */
+#ifndef BRIDGE_MODE_VEPA
+#define BRIDGE_MODE_VEPA	1	/* 802.1Qbg defined VEPA mode */
+#endif /* BRIDGE_MODE_VEPA */
+#endif /* >= 3.8.0 */
+
+/*****************************************************************************/
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(3,9,0) )
+
+#undef BUILD_BUG_ON
+#ifdef __CHECKER__
+#define BUILD_BUG_ON(condition) (0)
+#else /* __CHECKER__ */
+#ifndef __compiletime_warning
+#if defined(__GNUC__) && ((__GNUC__ * 10000 + __GNUC_MINOR__ * 100) >= 40400)
+#define __compiletime_warning(message) __attribute__((warning(message)))
+#else /* __GNUC__ */
+#define __compiletime_warning(message)
+#endif /* __GNUC__ */
+#endif /* __compiletime_warning */
+#ifndef __compiletime_error
+#if defined(__GNUC__) && ((__GNUC__ * 10000 + __GNUC_MINOR__ * 100) >= 40400)
+#define __compiletime_error(message) __attribute__((error(message)))
+#define __compiletime_error_fallback(condition) do { } while (0)
+#else /* __GNUC__ */
+#define __compiletime_error(message)
+#define __compiletime_error_fallback(condition) \
+	do { ((void)sizeof(char[1 - 2 * condition])); } while (0)
+#endif /* __GNUC__ */
+#else /* __compiletime_error */
+#define __compiletime_error_fallback(condition) do { } while (0)
+#endif /* __compiletime_error */
+#define __compiletime_assert(condition, msg, prefix, suffix)		\
+	do {								\
+		bool __cond = !(condition);				\
+		extern void prefix ## suffix(void) __compiletime_error(msg); \
+		if (__cond)						\
+			prefix ## suffix();				\
+		__compiletime_error_fallback(__cond);			\
+	} while (0)
+
+#define _compiletime_assert(condition, msg, prefix, suffix) \
+	__compiletime_assert(condition, msg, prefix, suffix)
+#define compiletime_assert(condition, msg) \
+	_compiletime_assert(condition, msg, __compiletime_assert_, __LINE__)
+#define BUILD_BUG_ON_MSG(cond, msg) compiletime_assert(!(cond), msg)
+#ifndef __OPTIMIZE__
+#define BUILD_BUG_ON(condition) ((void)sizeof(char[1 - 2*!!(condition)]))
+#else /* __OPTIMIZE__ */
+#define BUILD_BUG_ON(condition) \
+	BUILD_BUG_ON_MSG(condition, "BUILD_BUG_ON failed: " #condition)
+#endif /* __OPTIMIZE__ */
+#endif /* __CHECKER__ */
+
+#undef hlist_entry
+#define hlist_entry(ptr, type, member) container_of(ptr,type,member)
+
+#undef hlist_entry_safe
+#define hlist_entry_safe(ptr, type, member) \
+	({ typeof(ptr) ____ptr = (ptr); \
+	   ____ptr ? hlist_entry(____ptr, type, member) : NULL; \
+	})
+
+#undef hlist_for_each_entry
+#define hlist_for_each_entry(pos, head, member)                             \
+	for (pos = hlist_entry_safe((head)->first, typeof(*(pos)), member); \
+	     pos;                                                           \
+	     pos = hlist_entry_safe((pos)->member.next, typeof(*(pos)), member))
+
+#undef hlist_for_each_entry_safe
+#define hlist_for_each_entry_safe(pos, n, head, member) 		    \
+	for (pos = hlist_entry_safe((head)->first, typeof(*pos), member);   \
+	     pos && ({ n = pos->member.next; 1; });			    \
+	     pos = hlist_entry_safe(n, typeof(*pos), member))
+
+#undef hlist_for_each_entry_continue
+#define hlist_for_each_entry_continue(pos, member)			\
+	for (pos = hlist_entry_safe((pos)->member.next, typeof(*(pos)), member);\
+	     pos;							\
+	     pos = hlist_entry_safe((pos)->member.next, typeof(*(pos)), member))
+
+#undef hlist_for_each_entry_from
+#define hlist_for_each_entry_from(pos, member)				\
+	for (; pos;							\
+	     pos = hlist_entry_safe((pos)->member.next, typeof(*(pos)), member))
+
+#undef hash_for_each
+#define hash_for_each(name, bkt, obj, member)				\
+	for ((bkt) = 0, obj = NULL; obj == NULL && (bkt) < HASH_SIZE(name);\
+			(bkt)++)\
+		hlist_for_each_entry(obj, &name[bkt], member)
+
+#undef hash_for_each_safe
+#define hash_for_each_safe(name, bkt, tmp, obj, member)			\
+	for ((bkt) = 0, obj = NULL; obj == NULL && (bkt) < HASH_SIZE(name);\
+			(bkt)++)\
+		hlist_for_each_entry_safe(obj, tmp, &name[bkt], member)
+
+#undef hash_for_each_possible
+#define hash_for_each_possible(name, obj, member, key)			\
+	hlist_for_each_entry(obj, &name[hash_min(key, HASH_BITS(name))], member)
+
+#undef hash_for_each_possible_safe
+#define hash_for_each_possible_safe(name, obj, tmp, member, key)	\
+	hlist_for_each_entry_safe(obj, tmp,\
+		&name[hash_min(key, HASH_BITS(name))], member)
+
+#ifdef CONFIG_XPS
+int __kc_netif_set_xps_queue(struct net_device *, const struct cpumask *, u16);
+#define netif_set_xps_queue(_dev, _mask, _idx) __kc_netif_set_xps_queue((_dev), (_mask), (_idx))
+#else /* CONFIG_XPS */
+#define netif_set_xps_queue(_dev, _mask, _idx) do {} while (0)
+#endif /* CONFIG_XPS */
+
+#ifdef HAVE_NETDEV_SELECT_QUEUE
+#define _kc_hashrnd 0xd631614b /* not so random hash salt */
+u16 __kc_netdev_pick_tx(struct net_device *dev, struct sk_buff *skb);
+#define __netdev_pick_tx __kc_netdev_pick_tx
+#endif /* HAVE_NETDEV_SELECT_QUEUE */
+#else
+#define HAVE_BRIDGE_FILTER
+#define HAVE_FDB_DEL_NLATTR
+#endif /* < 3.9.0 */
+
+/*****************************************************************************/
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(3,10,0) )
+#ifndef NAPI_POLL_WEIGHT
+#define NAPI_POLL_WEIGHT 64
+#endif
+#ifdef CONFIG_PCI_IOV
+int __kc_pci_vfs_assigned(struct pci_dev *dev);
+#else
+static inline int __kc_pci_vfs_assigned(struct pci_dev __always_unused *dev)
+{
+	return 0;
+}
+#endif
+#define pci_vfs_assigned(dev) __kc_pci_vfs_assigned(dev)
+
+#ifndef list_first_entry_or_null
+#define list_first_entry_or_null(ptr, type, member) \
+	(!list_empty(ptr) ? list_first_entry(ptr, type, member) : NULL)
+#endif
+
+#ifndef VLAN_TX_COOKIE_MAGIC
+static inline struct sk_buff *__kc__vlan_hwaccel_put_tag(struct sk_buff *skb,
+							 u16 vlan_tci)
+{
+#ifdef VLAN_TAG_PRESENT
+	vlan_tci |= VLAN_TAG_PRESENT;
+#endif
+	skb->vlan_tci = vlan_tci;
+        return skb;
+}
+#define __vlan_hwaccel_put_tag(skb, vlan_proto, vlan_tci) \
+	__kc__vlan_hwaccel_put_tag(skb, vlan_tci)
+#endif
+
+#ifdef HAVE_FDB_OPS
+#if defined(HAVE_NDO_FDB_ADD_NLATTR)
+int __kc_ndo_dflt_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
+			  struct net_device *dev,
+			  const unsigned char *addr, u16 flags);
+#elif defined(USE_CONST_DEV_UC_CHAR)
+int __kc_ndo_dflt_fdb_add(struct ndmsg *ndm, struct net_device *dev,
+			  const unsigned char *addr, u16 flags);
+#else
+int __kc_ndo_dflt_fdb_add(struct ndmsg *ndm, struct net_device *dev,
+			  unsigned char *addr, u16 flags);
+#endif /* HAVE_NDO_FDB_ADD_NLATTR */
+#if defined(HAVE_FDB_DEL_NLATTR)
+int __kc_ndo_dflt_fdb_del(struct ndmsg *ndm, struct nlattr *tb[],
+			  struct net_device *dev,
+			  const unsigned char *addr);
+#elif defined(USE_CONST_DEV_UC_CHAR)
+int __kc_ndo_dflt_fdb_del(struct ndmsg *ndm, struct net_device *dev,
+			  const unsigned char *addr);
+#else
+int __kc_ndo_dflt_fdb_del(struct ndmsg *ndm, struct net_device *dev,
+			  unsigned char *addr);
+#endif /* HAVE_FDB_DEL_NLATTR */
+#define ndo_dflt_fdb_add __kc_ndo_dflt_fdb_add
+#define ndo_dflt_fdb_del __kc_ndo_dflt_fdb_del
+#endif /* HAVE_FDB_OPS */
+
+#ifndef PCI_DEVID
+#define PCI_DEVID(bus, devfn)  ((((u16)(bus)) << 8) | (devfn))
+#endif
+
+/* The definitions for these functions when CONFIG_OF_NET is defined are
+ * pulled in from <linux/of_net.h>. For kernels older than 3.5 we already have
+ * backports for when CONFIG_OF_NET is true. These are separated and
+ * duplicated in order to cover all cases so that all kernels get either the
+ * real definitions (when CONFIG_OF_NET is defined) or the stub definitions
+ * (when CONFIG_OF_NET is not defined, or the kernel is too old to have real
+ * definitions).
+ */
+#ifndef CONFIG_OF_NET
+static inline int of_get_phy_mode(struct device_node __always_unused *np)
+{
+	return -ENODEV;
+}
+
+static inline const void *
+of_get_mac_address(struct device_node __always_unused *np)
+{
+	return NULL;
+}
+#endif
+
+#else /* >= 3.10.0 */
+#define HAVE_ENCAP_TSO_OFFLOAD
+#define USE_DEFAULT_FDB_DEL_DUMP
+#define HAVE_SKB_INNER_NETWORK_HEADER
+
+#if (RHEL_RELEASE_CODE && \
+     (RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(7,0)) && \
+     (RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(8,0)))
+#define HAVE_RHEL7_PCI_DRIVER_RH
+#if (RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(7,2))
+#define HAVE_RHEL7_PCI_RESET_NOTIFY
+#endif /* RHEL >= 7.2 */
+#if (RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(7,3))
+#if (RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(7,5))
+#define HAVE_GENEVE_RX_OFFLOAD
+#endif /* RHEL >=7.3 && RHEL < 7.5 */
+#define HAVE_ETHTOOL_FLOW_UNION_IP6_SPEC
+#define HAVE_RHEL7_NET_DEVICE_OPS_EXT
+#if !defined(HAVE_UDP_ENC_TUNNEL) && IS_ENABLED(CONFIG_GENEVE)
+#define HAVE_UDP_ENC_TUNNEL
+#endif
+#endif /* RHEL >= 7.3 */
+
+/* new hooks added to net_device_ops_extended in RHEL7.4 */
+#if (RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(7,4))
+#define HAVE_RHEL7_NETDEV_OPS_EXT_NDO_SET_VF_VLAN
+#define HAVE_RHEL7_NETDEV_OPS_EXT_NDO_UDP_TUNNEL
+#define HAVE_UDP_ENC_RX_OFFLOAD
+#endif /* RHEL >= 7.4 */
+
+#endif /* RHEL >= 7.0 && RHEL < 8.0 */
+
+#if (RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(8,0))
+#define HAVE_TCF_BLOCK_CB_REGISTER_EXTACK
+#define NO_NETDEV_BPF_PROG_ATTACHED
+#endif /* RHEL >= 8.0 */
+#endif /* >= 3.10.0 */
+
+/*****************************************************************************/
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(3,11,0) )
+#define netdev_notifier_info_to_dev(ptr) ptr
+#if ((RHEL_RELEASE_CODE && RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(6,6)) ||\
+     (SLE_VERSION_CODE && SLE_VERSION_CODE >= SLE_VERSION(11,4,0)))
+#define HAVE_NDO_SET_VF_LINK_STATE
+#endif
+#if RHEL_RELEASE_CODE && (RHEL_RELEASE_CODE > RHEL_RELEASE_VERSION(7,2))
+#define HAVE_NDO_SELECT_QUEUE_ACCEL_FALLBACK
+#endif
+#else /* >= 3.11.0 */
+#define HAVE_NDO_SET_VF_LINK_STATE
+#define HAVE_SKB_INNER_PROTOCOL
+#define HAVE_MPLS_FEATURES
+#endif /* >= 3.11.0 */
+
+/*****************************************************************************/
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(3,12,0) )
+int __kc_pcie_get_minimum_link(struct pci_dev *dev, enum pci_bus_speed *speed,
+			       enum pcie_link_width *width);
+#ifndef pcie_get_minimum_link
+#define pcie_get_minimum_link(_p, _s, _w) __kc_pcie_get_minimum_link(_p, _s, _w)
+#endif
+#else /* >= 3.12.0 */
+#if ( SLE_VERSION_CODE && SLE_VERSION_CODE >= SLE_VERSION(12,0,0))
+#define HAVE_NDO_SELECT_QUEUE_ACCEL_FALLBACK
+#endif
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(4,8,0) )
+#define HAVE_VXLAN_RX_OFFLOAD
+#if !defined(HAVE_UDP_ENC_TUNNEL) && IS_ENABLED(CONFIG_VXLAN)
+#define HAVE_UDP_ENC_TUNNEL
+#endif
+#endif /* < 4.8.0 */
+#define HAVE_NDO_GET_PHYS_PORT_ID
+#define HAVE_NETIF_SET_XPS_QUEUE_CONST_MASK
+#endif /* >= 3.12.0 */
+
+/*****************************************************************************/
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(3,13,0) )
+#define dma_set_mask_and_coherent(_p, _m) __kc_dma_set_mask_and_coherent(_p, _m)
+int __kc_dma_set_mask_and_coherent(struct device *dev, u64 mask);
+#ifndef u64_stats_init
+#define u64_stats_init(a) do { } while(0)
+#endif
+#undef BIT_ULL
+#define BIT_ULL(n) (1ULL << (n))
+
+#if (!(SLE_VERSION_CODE && SLE_VERSION_CODE >= SLE_VERSION(12,0,0)) && \
+     !(RHEL_RELEASE_CODE && RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(7,0)))
+static inline struct pci_dev *pci_upstream_bridge(struct pci_dev *dev)
+{
+	dev = pci_physfn(dev);
+	if (pci_is_root_bus(dev->bus))
+		return NULL;
+
+	return dev->bus->self;
+}
+#endif
+
+#if (SLE_VERSION_CODE && SLE_VERSION_CODE >= SLE_VERSION(12,1,0))
+#undef HAVE_STRUCT_PAGE_PFMEMALLOC
+#define HAVE_DCBNL_OPS_SETAPP_RETURN_INT
+#endif
+#ifndef list_next_entry
+#define list_next_entry(pos, member) \
+	list_entry((pos)->member.next, typeof(*(pos)), member)
+#endif
+#ifndef list_prev_entry
+#define list_prev_entry(pos, member) \
+	list_entry((pos)->member.prev, typeof(*(pos)), member)
+#endif
+
+#if ( LINUX_VERSION_CODE > KERNEL_VERSION(2,6,20) )
+#define devm_kcalloc(dev, cnt, size, flags) \
+	devm_kzalloc(dev, (cnt) * (size), flags)
+#endif /* > 2.6.20 */
+
+#if (!(RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(7,2)))
+#define list_last_entry(ptr, type, member) list_entry((ptr)->prev, type, member)
+#endif
+
+#else /* >= 3.13.0 */
+#define HAVE_VXLAN_CHECKS
+#define HAVE_NDO_SELECT_QUEUE_ACCEL
+#define HAVE_HWMON_DEVICE_REGISTER_WITH_GROUPS
+#endif
+
+/*****************************************************************************/
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(3,14,0) )
+
+#ifndef U16_MAX
+#define U16_MAX ((u16)~0U)
+#endif
+
+#ifndef U32_MAX
+#define U32_MAX ((u32)~0U)
+#endif
+
+#define dev_consume_skb_any(x) dev_kfree_skb_any(x)
+
+#if (!(RHEL_RELEASE_CODE && RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(7,0)) && \
+     !(SLE_VERSION_CODE && SLE_VERSION_CODE >= SLE_VERSION(12,0,0)))
+
+/* it isn't expected that this would be a #define unless we made it so */
+#ifndef skb_set_hash
+
+#define PKT_HASH_TYPE_NONE	0
+#define PKT_HASH_TYPE_L2	1
+#define PKT_HASH_TYPE_L3	2
+#define PKT_HASH_TYPE_L4	3
+
+enum _kc_pkt_hash_types {
+	_KC_PKT_HASH_TYPE_NONE = PKT_HASH_TYPE_NONE,
+	_KC_PKT_HASH_TYPE_L2 = PKT_HASH_TYPE_L2,
+	_KC_PKT_HASH_TYPE_L3 = PKT_HASH_TYPE_L3,
+	_KC_PKT_HASH_TYPE_L4 = PKT_HASH_TYPE_L4,
+};
+#define pkt_hash_types         _kc_pkt_hash_types
+
+#define skb_set_hash __kc_skb_set_hash
+static inline void __kc_skb_set_hash(struct sk_buff __maybe_unused *skb,
+				     u32 __maybe_unused hash,
+				     int __maybe_unused type)
+{
+#ifdef HAVE_SKB_L4_RXHASH
+	skb->l4_rxhash = (type == PKT_HASH_TYPE_L4);
+#endif
+#ifdef NETIF_F_RXHASH
+	skb->rxhash = hash;
+#endif
+}
+#endif /* !skb_set_hash */
+
+#else	/* RHEL_RELEASE_CODE >= 7.0 || SLE_VERSION_CODE >= 12.0 */
+
+#if (!(RHEL_RELEASE_CODE && RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(7,5)))
+#ifndef HAVE_VXLAN_RX_OFFLOAD
+#define HAVE_VXLAN_RX_OFFLOAD
+#endif /* HAVE_VXLAN_RX_OFFLOAD */
+#endif
+
+#if !defined(HAVE_UDP_ENC_TUNNEL) && IS_ENABLED(CONFIG_VXLAN)
+#define HAVE_UDP_ENC_TUNNEL
+#endif
+
+#ifndef HAVE_VXLAN_CHECKS
+#define HAVE_VXLAN_CHECKS
+#endif /* HAVE_VXLAN_CHECKS */
+#endif /* !(RHEL_RELEASE_CODE >= 7.0 && SLE_VERSION_CODE >= 12.0) */
+
+#if ((RHEL_RELEASE_CODE && RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(7,3)) ||\
+     (SLE_VERSION_CODE && SLE_VERSION_CODE >= SLE_VERSION(12,0,0)))
+#define HAVE_NDO_DFWD_OPS
+#endif
+
+#ifndef pci_enable_msix_range
+int __kc_pci_enable_msix_range(struct pci_dev *dev, struct msix_entry *entries,
+			       int minvec, int maxvec);
+#define pci_enable_msix_range __kc_pci_enable_msix_range
+#endif
+
+#ifndef ether_addr_copy
+#define ether_addr_copy __kc_ether_addr_copy
+static inline void __kc_ether_addr_copy(u8 *dst, const u8 *src)
+{
+#if defined(CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS)
+	*(u32 *)dst = *(const u32 *)src;
+	*(u16 *)(dst + 4) = *(const u16 *)(src + 4);
+#else
+	u16 *a = (u16 *)dst;
+	const u16 *b = (const u16 *)src;
+
+	a[0] = b[0];
+	a[1] = b[1];
+	a[2] = b[2];
+#endif
+}
+#endif /* ether_addr_copy */
+int __kc_ipv6_find_hdr(const struct sk_buff *skb, unsigned int *offset,
+		       int target, unsigned short *fragoff, int *flags);
+#define ipv6_find_hdr(a, b, c, d, e) __kc_ipv6_find_hdr((a), (b), (c), (d), (e))
+
+#ifndef OPTIMIZE_HIDE_VAR
+#ifdef __GNUC__
+#define OPTIMIZER_HIDE_VAR(var) __asm__ ("" : "=r" (var) : "0" (var))
+#else
+#include <linux/barrier.h>
+#define OPTIMIZE_HIDE_VAR(var)	barrier()
+#endif
+#endif
+
+#if (!(RHEL_RELEASE_CODE && RHEL_RELEASE_CODE > RHEL_RELEASE_VERSION(7,0)) && \
+     !(SLE_VERSION_CODE && SLE_VERSION_CODE >= SLE_VERSION(10,4,0)))
+static inline __u32 skb_get_hash_raw(const struct sk_buff *skb)
+{
+#ifdef NETIF_F_RXHASH
+	return skb->rxhash;
+#else
+	return 0;
+#endif /* NETIF_F_RXHASH */
+}
+#endif /* !RHEL > 5.9 && !SLES >= 10.4 */
+
+#if (RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(7,5))
+#define request_firmware_direct	request_firmware
+#endif /* !RHEL || RHEL < 7.5 */
+
+#else /* >= 3.14.0 */
+
+/* for ndo_dfwd_ ops add_station, del_station and _start_xmit */
+#ifndef HAVE_NDO_DFWD_OPS
+#define HAVE_NDO_DFWD_OPS
+#endif
+#define HAVE_NDO_SELECT_QUEUE_ACCEL_FALLBACK
+#endif /* 3.14.0 */
+
+/*****************************************************************************/
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(3,15,0) )
+#if (!(RHEL_RELEASE_CODE && RHEL_RELEASE_CODE > RHEL_RELEASE_VERSION(7,1)))
+#define u64_stats_fetch_begin_irq u64_stats_fetch_begin_bh
+#define u64_stats_fetch_retry_irq u64_stats_fetch_retry_bh
+#endif
+
+char *_kc_devm_kstrdup(struct device *dev, const char *s, gfp_t gfp);
+#define devm_kstrdup(dev, s, gfp) _kc_devm_kstrdup(dev, s, gfp)
+
+#else
+#define HAVE_NET_GET_RANDOM_ONCE
+#define HAVE_PTP_1588_CLOCK_PINS
+#define HAVE_NETDEV_PORT
+#endif /* 3.15.0 */
+
+/*****************************************************************************/
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(3,16,0) )
+#ifndef smp_mb__before_atomic
+#define smp_mb__before_atomic() smp_mb()
+#define smp_mb__after_atomic()  smp_mb()
+#endif
+#ifndef __dev_uc_sync
+#ifdef HAVE_SET_RX_MODE
+#ifdef NETDEV_HW_ADDR_T_UNICAST
+int __kc_hw_addr_sync_dev(struct netdev_hw_addr_list *list,
+		struct net_device *dev,
+		int (*sync)(struct net_device *, const unsigned char *),
+		int (*unsync)(struct net_device *, const unsigned char *));
+void __kc_hw_addr_unsync_dev(struct netdev_hw_addr_list *list,
+		struct net_device *dev,
+		int (*unsync)(struct net_device *, const unsigned char *));
+#endif
+#ifndef NETDEV_HW_ADDR_T_MULTICAST
+int __kc_dev_addr_sync_dev(struct dev_addr_list **list, int *count,
+		struct net_device *dev,
+		int (*sync)(struct net_device *, const unsigned char *),
+		int (*unsync)(struct net_device *, const unsigned char *));
+void __kc_dev_addr_unsync_dev(struct dev_addr_list **list, int *count,
+		struct net_device *dev,
+		int (*unsync)(struct net_device *, const unsigned char *));
+#endif
+#endif /* HAVE_SET_RX_MODE */
+
+static inline int __kc_dev_uc_sync(struct net_device __maybe_unused *dev,
+				   int __maybe_unused (*sync)(struct net_device *, const unsigned char *),
+				   int __maybe_unused (*unsync)(struct net_device *, const unsigned char *))
+{
+#ifdef NETDEV_HW_ADDR_T_UNICAST
+	return __kc_hw_addr_sync_dev(&dev->uc, dev, sync, unsync);
+#elif defined(HAVE_SET_RX_MODE)
+	return __kc_dev_addr_sync_dev(&dev->uc_list, &dev->uc_count,
+				      dev, sync, unsync);
+#else
+	return 0;
+#endif
+}
+#define __dev_uc_sync __kc_dev_uc_sync
+
+static inline void __kc_dev_uc_unsync(struct net_device __maybe_unused *dev,
+				      int __maybe_unused (*unsync)(struct net_device *, const unsigned char *))
+{
+#ifdef HAVE_SET_RX_MODE
+#ifdef NETDEV_HW_ADDR_T_UNICAST
+	__kc_hw_addr_unsync_dev(&dev->uc, dev, unsync);
+#else /* NETDEV_HW_ADDR_T_MULTICAST */
+	__kc_dev_addr_unsync_dev(&dev->uc_list, &dev->uc_count, dev, unsync);
+#endif /* NETDEV_HW_ADDR_T_UNICAST */
+#endif /* HAVE_SET_RX_MODE */
+}
+#define __dev_uc_unsync __kc_dev_uc_unsync
+
+static inline int __kc_dev_mc_sync(struct net_device __maybe_unused *dev,
+				   int __maybe_unused (*sync)(struct net_device *, const unsigned char *),
+				   int __maybe_unused (*unsync)(struct net_device *, const unsigned char *))
+{
+#ifdef NETDEV_HW_ADDR_T_MULTICAST
+	return __kc_hw_addr_sync_dev(&dev->mc, dev, sync, unsync);
+#elif defined(HAVE_SET_RX_MODE)
+	return __kc_dev_addr_sync_dev(&dev->mc_list, &dev->mc_count,
+				      dev, sync, unsync);
+#else
+	return 0;
+#endif
+
+}
+#define __dev_mc_sync __kc_dev_mc_sync
+
+static inline void __kc_dev_mc_unsync(struct net_device __maybe_unused *dev,
+				      int __maybe_unused (*unsync)(struct net_device *, const unsigned char *))
+{
+#ifdef HAVE_SET_RX_MODE
+#ifdef NETDEV_HW_ADDR_T_MULTICAST
+	__kc_hw_addr_unsync_dev(&dev->mc, dev, unsync);
+#else /* NETDEV_HW_ADDR_T_MULTICAST */
+	__kc_dev_addr_unsync_dev(&dev->mc_list, &dev->mc_count, dev, unsync);
+#endif /* NETDEV_HW_ADDR_T_MULTICAST */
+#endif /* HAVE_SET_RX_MODE */
+}
+#define __dev_mc_unsync __kc_dev_mc_unsync
+#endif /* __dev_uc_sync */
+
+#if RHEL_RELEASE_CODE && (RHEL_RELEASE_CODE > RHEL_RELEASE_VERSION(7,1))
+#define HAVE_NDO_SET_VF_MIN_MAX_TX_RATE
+#endif
+
+#ifndef NETIF_F_GSO_UDP_TUNNEL_CSUM
+/* if someone backports this, hopefully they backport as a #define.
+ * declare it as zero on older kernels so that if it get's or'd in
+ * it won't effect anything, therefore preventing core driver changes
+ */
+#define NETIF_F_GSO_UDP_TUNNEL_CSUM 0
+#define SKB_GSO_UDP_TUNNEL_CSUM 0
+#endif
+void *__kc_devm_kmemdup(struct device *dev, const void *src, size_t len,
+			gfp_t gfp);
+#define devm_kmemdup __kc_devm_kmemdup
+
+#else
+#if ( ( LINUX_VERSION_CODE < KERNEL_VERSION(4,13,0) ) && \
+      ! ( SLE_VERSION_CODE && ( SLE_VERSION_CODE >= SLE_VERSION(12,4,0)) ) )
+#define HAVE_PCI_ERROR_HANDLER_RESET_NOTIFY
+#endif /* >= 3.16.0 && < 4.13.0 && !(SLES >= 12sp4) */
+#define HAVE_NDO_SET_VF_MIN_MAX_TX_RATE
+#endif /* 3.16.0 */
+
+/*****************************************************************************/
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(3,17,0) )
+#if !(RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(6,8) && \
+      RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(7,0)) && \
+    !(RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(7,2))
+#ifndef timespec64
+#define timespec64 timespec
+static inline struct timespec64 timespec_to_timespec64(const struct timespec ts)
+{
+	return ts;
+}
+static inline struct timespec timespec64_to_timespec(const struct timespec64 ts64)
+{
+	return ts64;
+}
+#define timespec64_equal timespec_equal
+#define timespec64_compare timespec_compare
+#define set_normalized_timespec64 set_normalized_timespec
+#define timespec64_add_safe timespec_add_safe
+#define timespec64_add timespec_add
+#define timespec64_sub timespec_sub
+#define timespec64_valid timespec_valid
+#define timespec64_valid_strict timespec_valid_strict
+#define timespec64_to_ns timespec_to_ns
+#define ns_to_timespec64 ns_to_timespec
+#define ktime_to_timespec64 ktime_to_timespec
+#define ktime_get_ts64 ktime_get_ts
+#define ktime_get_real_ts64 ktime_get_real_ts
+#define timespec64_add_ns timespec_add_ns
+#endif /* timespec64 */
+#endif /* !(RHEL6.8<RHEL7.0) && !RHEL7.2+ */
+
+#if !(RHEL_RELEASE_CODE && (RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(7,4)))
+#define hlist_add_behind(_a, _b) hlist_add_after(_b, _a)
+#endif
+
+#if (RHEL_RELEASE_CODE && (RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(7,3)))
+static inline u64 ktime_get_ns(void)
+{
+	return ktime_to_ns(ktime_get());
+}
+
+static inline u64 ktime_get_real_ns(void)
+{
+	return ktime_to_ns(ktime_get_real());
+}
+
+static inline u64 ktime_get_boot_ns(void)
+{
+	return ktime_to_ns(ktime_get_boottime());
+}
+#endif /* RHEL < 7.3 */
+
+#else
+#define HAVE_DCBNL_OPS_SETAPP_RETURN_INT
+#include <linux/time64.h>
+#endif /* 3.17.0 */
+
+/*****************************************************************************/
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(3,18,0) )
+#ifndef NO_PTP_SUPPORT
+#include <linux/errqueue.h>
+struct sk_buff *__kc_skb_clone_sk(struct sk_buff *skb);
+void __kc_skb_complete_tx_timestamp(struct sk_buff *skb,
+				    struct skb_shared_hwtstamps *hwtstamps);
+#define skb_clone_sk __kc_skb_clone_sk
+#define skb_complete_tx_timestamp __kc_skb_complete_tx_timestamp
+#endif
+u32 __kc_eth_get_headlen(const struct net_device *dev, unsigned char *data,
+			 unsigned int max_len);
+#define eth_get_headlen __kc_eth_get_headlen
+#ifndef ETH_P_XDSA
+#define ETH_P_XDSA 0x00F8
+#endif
+/* RHEL 7.1 backported csum_level, but SLES 12 and 12-SP1 did not */
+#if RHEL_RELEASE_CODE && (RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(7,1))
+#define HAVE_SKBUFF_CSUM_LEVEL
+#endif /* >= RH 7.1 */
+
+/* RHEL 7.3 backported xmit_more */
+#if (RHEL_RELEASE_CODE && RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(7,3))
+#define HAVE_SKB_XMIT_MORE
+#endif /* >= RH 7.3 */
+
+#undef GENMASK
+#define GENMASK(h, l) \
+	(((~0UL) << (l)) & (~0UL >> (BITS_PER_LONG - 1 - (h))))
+#undef GENMASK_ULL
+#define GENMASK_ULL(h, l) \
+	(((~0ULL) << (l)) & (~0ULL >> (BITS_PER_LONG_LONG - 1 - (h))))
+
+#else /*  3.18.0 */
+#define HAVE_SKBUFF_CSUM_LEVEL
+#define HAVE_SKB_XMIT_MORE
+#define HAVE_SKB_INNER_PROTOCOL_TYPE
+#endif /* 3.18.0 */
+
+/*****************************************************************************/
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(3,18,4) )
+#else
+#define HAVE_NDO_FEATURES_CHECK
+#endif /* 3.18.4 */
+
+/*****************************************************************************/
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(3,18,13) )
+#ifndef WRITE_ONCE
+#define WRITE_ONCE(x, val) ({ ACCESS_ONCE(x) = (val); })
+#endif
+#endif /* 3.18.13 */
+
+/*****************************************************************************/
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(3,19,0) )
+/* netdev_phys_port_id renamed to netdev_phys_item_id */
+#define netdev_phys_item_id netdev_phys_port_id
+
+static inline void _kc_napi_complete_done(struct napi_struct *napi,
+					  int __always_unused work_done) {
+	napi_complete(napi);
+}
+/* don't use our backport if the distro kernels already have it */
+#if (SLE_VERSION_CODE && (SLE_VERSION_CODE < SLE_VERSION(12,3,0))) || \
+    (RHEL_RELEASE_CODE && (RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(7,5)))
+#define napi_complete_done _kc_napi_complete_done
+#endif
+
+int _kc_bitmap_print_to_pagebuf(bool list, char *buf,
+				const unsigned long *maskp, int nmaskbits);
+#define bitmap_print_to_pagebuf _kc_bitmap_print_to_pagebuf
+
+#ifndef NETDEV_RSS_KEY_LEN
+#define NETDEV_RSS_KEY_LEN (13 * 4)
+#endif
+#if (!(RHEL_RELEASE_CODE && \
+      ((RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(6,7) && RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(7,0)) || \
+       (RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(7,2)))))
+#define netdev_rss_key_fill(buffer, len) __kc_netdev_rss_key_fill(buffer, len)
+#endif /* RHEL_RELEASE_CODE */
+void __kc_netdev_rss_key_fill(void *buffer, size_t len);
+#define SPEED_20000 20000
+#define SPEED_40000 40000
+#ifndef dma_rmb
+#define dma_rmb() rmb()
+#endif
+#ifndef dev_alloc_pages
+#ifndef NUMA_NO_NODE
+#define NUMA_NO_NODE -1
+#endif
+#define dev_alloc_pages(_order) alloc_pages_node(NUMA_NO_NODE, (GFP_ATOMIC | __GFP_COLD | __GFP_COMP | __GFP_MEMALLOC), (_order))
+#endif
+#ifndef dev_alloc_page
+#define dev_alloc_page() dev_alloc_pages(0)
+#endif
+#if !defined(eth_skb_pad) && !defined(skb_put_padto)
+/**
+ *     __kc_skb_put_padto - increase size and pad an skbuff up to a minimal size
+ *     @skb: buffer to pad
+ *     @len: minimal length
+ *
+ *     Pads up a buffer to ensure the trailing bytes exist and are
+ *     blanked. If the buffer already contains sufficient data it
+ *     is untouched. Otherwise it is extended. Returns zero on
+ *     success. The skb is freed on error.
+ */
+static inline int __kc_skb_put_padto(struct sk_buff *skb, unsigned int len)
+{
+	unsigned int size = skb->len;
+
+	if (unlikely(size < len)) {
+		len -= size;
+		if (skb_pad(skb, len))
+			return -ENOMEM;
+		__skb_put(skb, len);
+	}
+	return 0;
+}
+#define skb_put_padto(skb, len) __kc_skb_put_padto(skb, len)
+
+static inline int __kc_eth_skb_pad(struct sk_buff *skb)
+{
+	return __kc_skb_put_padto(skb, ETH_ZLEN);
+}
+#define eth_skb_pad(skb) __kc_eth_skb_pad(skb)
+#endif /* eth_skb_pad && skb_put_padto */
+
+#ifndef SKB_ALLOC_NAPI
+/* RHEL 7.2 backported napi_alloc_skb and friends */
+static inline struct sk_buff *__kc_napi_alloc_skb(struct napi_struct *napi, unsigned int length)
+{
+	return netdev_alloc_skb_ip_align(napi->dev, length);
+}
+#define napi_alloc_skb(napi,len) __kc_napi_alloc_skb(napi,len)
+#define __napi_alloc_skb(napi,len,mask) __kc_napi_alloc_skb(napi,len)
+#endif /* SKB_ALLOC_NAPI */
+#define HAVE_CONFIG_PM_RUNTIME
+#if (RHEL_RELEASE_CODE && (RHEL_RELEASE_CODE > RHEL_RELEASE_VERSION(6,7)) && \
+     (RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(7,0)))
+#define HAVE_RXFH_HASHFUNC
+#endif /* 6.7 < RHEL < 7.0 */
+#if RHEL_RELEASE_CODE && (RHEL_RELEASE_CODE > RHEL_RELEASE_VERSION(7,1))
+#define HAVE_RXFH_HASHFUNC
+#define NDO_DFLT_BRIDGE_GETLINK_HAS_BRFLAGS
+#endif /* RHEL > 7.1 */
+#ifndef napi_schedule_irqoff
+#define napi_schedule_irqoff	napi_schedule
+#endif
+#ifndef READ_ONCE
+#define READ_ONCE(_x) ACCESS_ONCE(_x)
+#endif
+#if RHEL_RELEASE_CODE && (RHEL_RELEASE_CODE > RHEL_RELEASE_VERSION(7,2))
+#define HAVE_NDO_FDB_ADD_VID
+#endif
+#ifndef ETH_MODULE_SFF_8636
+#define ETH_MODULE_SFF_8636		0x3
+#endif
+#ifndef ETH_MODULE_SFF_8636_LEN
+#define ETH_MODULE_SFF_8636_LEN		256
+#endif
+#ifndef ETH_MODULE_SFF_8436
+#define ETH_MODULE_SFF_8436		0x4
+#endif
+#ifndef ETH_MODULE_SFF_8436_LEN
+#define ETH_MODULE_SFF_8436_LEN		256
+#endif
+#ifndef writel_relaxed
+#define writel_relaxed	writel
+#endif
+#else /* 3.19.0 */
+#define HAVE_NDO_FDB_ADD_VID
+#define HAVE_RXFH_HASHFUNC
+#define NDO_DFLT_BRIDGE_GETLINK_HAS_BRFLAGS
+#endif /* 3.19.0 */
+
+/*****************************************************************************/
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(3,20,0) )
+/* vlan_tx_xx functions got renamed to skb_vlan */
+#ifndef skb_vlan_tag_get
+#define skb_vlan_tag_get vlan_tx_tag_get
+#endif
+#ifndef skb_vlan_tag_present
+#define skb_vlan_tag_present vlan_tx_tag_present
+#endif
+#if RHEL_RELEASE_CODE && (RHEL_RELEASE_CODE > RHEL_RELEASE_VERSION(7,1))
+#define HAVE_INCLUDE_LINUX_TIMECOUNTER_H
+#endif
+#if RHEL_RELEASE_CODE && (RHEL_RELEASE_CODE > RHEL_RELEASE_VERSION(7,2))
+#define HAVE_NDO_BRIDGE_SET_DEL_LINK_FLAGS
+#endif
+#else
+#define HAVE_INCLUDE_LINUX_TIMECOUNTER_H
+#define HAVE_NDO_BRIDGE_SET_DEL_LINK_FLAGS
+#endif /* 3.20.0 */
+
+/*****************************************************************************/
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(4,0,0) )
+/* Definition for CONFIG_OF was introduced earlier */
+#if !defined(CONFIG_OF) && \
+    !(RHEL_RELEASE_CODE && RHEL_RELEASE_CODE > RHEL_RELEASE_VERSION(7,2))
+static inline struct device_node *
+pci_device_to_OF_node(const struct pci_dev __always_unused *pdev) { return NULL; }
+#else /* !CONFIG_OF && RHEL < 7.3 */
+#define HAVE_DDP_PROFILE_UPLOAD_SUPPORT
+#endif /* !CONFIG_OF && RHEL < 7.3 */
+#else /* < 4.0 */
+#define HAVE_DDP_PROFILE_UPLOAD_SUPPORT
+#endif /* < 4.0 */
+
+/*****************************************************************************/
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(4,1,0) )
+#ifndef NO_PTP_SUPPORT
+#ifdef HAVE_INCLUDE_LINUX_TIMECOUNTER_H
+#include <linux/timecounter.h>
+#else
+#include <linux/clocksource.h>
+#endif
+static inline void __kc_timecounter_adjtime(struct timecounter *tc, s64 delta)
+{
+	tc->nsec += delta;
+}
+
+static inline struct net_device *
+of_find_net_device_by_node(struct device_node __always_unused *np)
+{
+	return NULL;
+}
+
+#define timecounter_adjtime __kc_timecounter_adjtime
+#endif
+#if ((RHEL_RELEASE_CODE && (RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(7,2))) || \
+     (SLE_VERSION_CODE && (SLE_VERSION_CODE >= SLE_VERSION(12,2,0))))
+#define HAVE_NDO_SET_VF_RSS_QUERY_EN
+#endif
+#if RHEL_RELEASE_CODE && (RHEL_RELEASE_CODE > RHEL_RELEASE_VERSION(7,2))
+#define HAVE_NDO_BRIDGE_GETLINK_NLFLAGS
+#endif
+#if !((RHEL_RELEASE_CODE > RHEL_RELEASE_VERSION(6,8) && RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(7,0)) && \
+      (RHEL_RELEASE_CODE > RHEL_RELEASE_VERSION(7,2)) && \
+      (SLE_VERSION_CODE > SLE_VERSION(12,1,0)))
+unsigned int _kc_cpumask_local_spread(unsigned int i, int node);
+#define cpumask_local_spread _kc_cpumask_local_spread
+#endif
+#else /* >= 4,1,0 */
+#define HAVE_NDO_GET_PHYS_PORT_NAME
+#define HAVE_PTP_CLOCK_INFO_GETTIME64
+#define HAVE_NDO_BRIDGE_GETLINK_NLFLAGS
+#define HAVE_PASSTHRU_FEATURES_CHECK
+#define HAVE_NDO_SET_VF_RSS_QUERY_EN
+#define HAVE_NDO_SET_TX_MAXRATE
+#endif /* 4,1,0 */
+
+/*****************************************************************************/
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(4,1,9))
+#if (!(RHEL_RELEASE_CODE > RHEL_RELEASE_VERSION(7,2)) && \
+     !((SLE_VERSION_CODE == SLE_VERSION(11,3,0)) && \
+       (SLE_LOCALVERSION_CODE >= SLE_LOCALVERSION(0,47,71))) && \
+     !((SLE_VERSION_CODE == SLE_VERSION(11,4,0)) && \
+       (SLE_LOCALVERSION_CODE >= SLE_LOCALVERSION(65,0,0))) && \
+     !(SLE_VERSION_CODE >= SLE_VERSION(12,1,0)))
+static inline bool page_is_pfmemalloc(struct page __maybe_unused *page)
+{
+#ifdef HAVE_STRUCT_PAGE_PFMEMALLOC
+	return page->pfmemalloc;
+#else
+	return false;
+#endif
+}
+#endif /* !RHEL7.2+ && !SLES11sp3(3.0.101-0.47.71+ update) && !SLES11sp4(3.0.101-65+ update) & !SLES12sp1+ */
+#else
+#undef HAVE_STRUCT_PAGE_PFMEMALLOC
+#endif /* 4.1.9 */
+
+/*****************************************************************************/
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(4,2,0))
+#if (!(RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(7,2)) && \
+     !(SLE_VERSION_CODE >= SLE_VERSION(12,1,0)))
+#define ETHTOOL_RX_FLOW_SPEC_RING	0x00000000FFFFFFFFULL
+#define ETHTOOL_RX_FLOW_SPEC_RING_VF	0x000000FF00000000ULL
+#define ETHTOOL_RX_FLOW_SPEC_RING_VF_OFF 32
+static inline __u64 ethtool_get_flow_spec_ring(__u64 ring_cookie)
+{
+	return ETHTOOL_RX_FLOW_SPEC_RING & ring_cookie;
+};
+
+static inline __u64 ethtool_get_flow_spec_ring_vf(__u64 ring_cookie)
+{
+	return (ETHTOOL_RX_FLOW_SPEC_RING_VF & ring_cookie) >>
+				ETHTOOL_RX_FLOW_SPEC_RING_VF_OFF;
+};
+#endif /* ! RHEL >= 7.2 && ! SLES >= 12.1 */
+#if (RHEL_RELEASE_CODE && RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(7,4))
+#define HAVE_NDO_DFLT_BRIDGE_GETLINK_VLAN_SUPPORT
+#endif
+
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,27))
+#if (!((RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(6,8) && \
+	RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(7,0)) || \
+       RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(7,2)))
+static inline bool pci_ari_enabled(struct pci_bus *bus)
+{
+	return bus->self && bus->self->ari_enabled;
+}
+#if (RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(7,2))
+#define HAVE_VF_STATS
+#endif /* (RHEL7.2+) */
+#endif /* !(RHEL6.8+ || RHEL7.2+) */
+#else
+static inline bool pci_ari_enabled(struct pci_bus *bus)
+{
+	return false;
+}
+#endif /* 2.6.27 */
+#else
+#define HAVE_NDO_DFLT_BRIDGE_GETLINK_VLAN_SUPPORT
+#define HAVE_VF_STATS
+#endif /* 4.2.0 */
+
+/*****************************************************************************/
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(4,4,0))
+#if (RHEL_RELEASE_CODE && RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(7,3))
+#define HAVE_NDO_SET_VF_TRUST
+#endif /* (RHEL_RELEASE >= 7.3) */
+#ifndef CONFIG_64BIT
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,3,0))
+#include <asm-generic/io-64-nonatomic-lo-hi.h>	/* 32-bit readq/writeq */
+#else /* 3.3.0 => 4.3.x */
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,26))
+#include <asm-generic/int-ll64.h>
+#endif /* 2.6.26 => 3.3.0 */
+#ifndef readq
+static inline __u64 readq(const volatile void __iomem *addr)
+{
+	const volatile u32 __iomem *p = addr;
+	u32 low, high;
+
+	low = readl(p);
+	high = readl(p + 1);
+
+	return low + ((u64)high << 32);
+}
+#define readq readq
+#endif
+
+#ifndef writeq
+static inline void writeq(__u64 val, volatile void __iomem *addr)
+{
+	writel(val, addr);
+	writel(val >> 32, addr + 4);
+}
+#define writeq writeq
+#endif
+#endif /* < 3.3.0 */
+#endif /* !CONFIG_64BIT */
+#else /* < 4.4.0 */
+#define HAVE_NDO_SET_VF_TRUST
+
+#ifndef CONFIG_64BIT
+#include <linux/io-64-nonatomic-lo-hi.h>	/* 32-bit readq/writeq */
+#endif /* !CONFIG_64BIT */
+#endif /* 4.4.0 */
+
+/*****************************************************************************/
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(4,5,0))
+/* protect against a likely backport */
+#ifndef NETIF_F_CSUM_MASK
+#define NETIF_F_CSUM_MASK NETIF_F_ALL_CSUM
+#endif /* NETIF_F_CSUM_MASK */
+#ifndef NETIF_F_SCTP_CRC
+#define NETIF_F_SCTP_CRC NETIF_F_SCTP_CSUM
+#endif /* NETIF_F_SCTP_CRC */
+#if (!(RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(7,3)))
+#define eth_platform_get_mac_address _kc_eth_platform_get_mac_address
+int _kc_eth_platform_get_mac_address(struct device *dev __maybe_unused,
+				     u8 *mac_addr __maybe_unused);
+#endif /* !(RHEL_RELEASE >= 7.3) */
+#else /* 4.5.0 */
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(4,8,0) )
+#define HAVE_GENEVE_RX_OFFLOAD
+#if !defined(HAVE_UDP_ENC_TUNNEL) && IS_ENABLED(CONFIG_GENEVE)
+#define HAVE_UDP_ENC_TUNNEL
+#endif
+#endif /* < 4.8.0 */
+#define HAVE_NETIF_NAPI_ADD_CALLS_NAPI_HASH_ADD
+#endif /* 4.5.0 */
+
+/*****************************************************************************/
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0))
+#if !(RHEL_RELEASE_CODE && RHEL_RELEASE_CODE > RHEL_RELEASE_VERSION(7,3))
+static inline unsigned char *skb_checksum_start(const struct sk_buff *skb)
+{
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,22))
+	return skb->head + skb->csum_start;
+#else /* < 2.6.22 */
+	return skb_transport_header(skb);
+#endif
+}
+#endif
+
+#if !(UBUNTU_VERSION_CODE && \
+		UBUNTU_VERSION_CODE >= UBUNTU_VERSION(4,4,0,0)) && \
+	!(RHEL_RELEASE_CODE && \
+		(RHEL_RELEASE_CODE > RHEL_RELEASE_VERSION(7,2))) && \
+	!(SLE_VERSION_CODE && (SLE_VERSION_CODE >= SLE_VERSION(12,3,0)))
+static inline void napi_consume_skb(struct sk_buff *skb,
+				    int __always_unused budget)
+{
+	dev_consume_skb_any(skb);
+}
+
+#endif /* RHEL 7.2, SLES12 SP3 */
+#if !(SLE_VERSION_CODE && (SLE_VERSION_CODE >= SLE_VERSION(12,3,0))) && \
+	!(RHEL_RELEASE_CODE && RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(7,4))
+static inline void csum_replace_by_diff(__sum16 *sum, __wsum diff)
+{
+	* sum = csum_fold(csum_add(diff, ~csum_unfold(*sum)));
+}
+#endif
+#if !(RHEL_RELEASE_CODE && (RHEL_RELEASE_CODE > RHEL_RELEASE_VERSION(7,2))) && \
+	!(SLE_VERSION_CODE && (SLE_VERSION_CODE > SLE_VERSION(12,3,0)))
+static inline void page_ref_inc(struct page *page)
+{
+	get_page(page);
+}
+#else
+#define HAVE_PAGE_COUNT_BULK_UPDATE
+#endif
+#ifndef IPV4_USER_FLOW
+#define	IPV4_USER_FLOW	0x0d	/* spec only (usr_ip4_spec) */
+#endif
+
+#if (RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(7,4))
+#define HAVE_TC_SETUP_CLSFLOWER
+#define HAVE_TC_FLOWER_ENC
+#endif
+
+#if (SLE_VERSION_CODE >= SLE_VERSION(12,2,0))
+#define HAVE_TC_SETUP_CLSFLOWER
+#endif
+
+#else /* >= 4.6.0 */
+#define HAVE_PAGE_COUNT_BULK_UPDATE
+#define HAVE_ETHTOOL_FLOW_UNION_IP6_SPEC
+#define HAVE_PTP_CROSSTIMESTAMP
+#define HAVE_TC_SETUP_CLSFLOWER
+#endif /* 4.6.0 */
+
+/*****************************************************************************/
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(4,7,0))
+#if ((SLE_VERSION_CODE >= SLE_VERSION(12,3,0)) ||\
+     (RHEL_RELEASE_CODE && RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(7,4)))
+#define HAVE_NETIF_TRANS_UPDATE
+#endif /* SLES12sp3+ || RHEL7.4+ */
+#if ((RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(7,4)) || \
+     (SLE_VERSION_CODE >= SLE_VERSION(12,3,0)))
+#define HAVE_DEVLINK_SUPPORT
+#endif /* RHEL 7.4, SLES12 SP3 */
+#if ((RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(7,3)) ||\
+     (SLE_VERSION_CODE >= SLE_VERSION(12,3,0)))
+#define HAVE_ETHTOOL_25G_BITS
+#define HAVE_ETHTOOL_50G_BITS
+#define HAVE_ETHTOOL_100G_BITS
+#endif /* RHEL7.3+ || SLES12sp3+ */
+#else /* 4.7.0 */
+#define HAVE_DEVLINK_SUPPORT
+#define HAVE_NETIF_TRANS_UPDATE
+#define HAVE_ETHTOOL_CONVERT_U32_AND_LINK_MODE
+#define HAVE_ETHTOOL_25G_BITS
+#define HAVE_ETHTOOL_50G_BITS
+#define HAVE_ETHTOOL_100G_BITS
+#define HAVE_TCF_MIRRED_REDIRECT
+#endif /* 4.7.0 */
+
+/*****************************************************************************/
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(4,8,0))
+#if !(RHEL_RELEASE_CODE && RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(7,4))
+enum udp_parsable_tunnel_type {
+	UDP_TUNNEL_TYPE_VXLAN,
+	UDP_TUNNEL_TYPE_GENEVE,
+};
+struct udp_tunnel_info {
+	unsigned short type;
+	sa_family_t sa_family;
+	__be16 port;
+};
+#endif
+
+#if (RHEL_RELEASE_CODE && RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(7,5))
+#define HAVE_TCF_EXTS_TO_LIST
+#define HAVE_PCI_IRQ_API
+#endif
+
+#if !(SLE_VERSION_CODE && (SLE_VERSION_CODE >= SLE_VERSION(12,3,0))) &&\
+	!(RHEL_RELEASE_CODE && RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(7,4))
+static inline int
+#ifdef HAVE_NON_CONST_PCI_DRIVER_NAME
+pci_request_io_regions(struct pci_dev *pdev, char *name)
+#else
+pci_request_io_regions(struct pci_dev *pdev, const char *name)
+#endif
+{
+	return pci_request_selected_regions(pdev,
+			    pci_select_bars(pdev, IORESOURCE_IO), name);
+}
+
+static inline void
+pci_release_io_regions(struct pci_dev *pdev)
+{
+	return pci_release_selected_regions(pdev,
+			    pci_select_bars(pdev, IORESOURCE_IO));
+}
+
+static inline int
+#ifdef HAVE_NON_CONST_PCI_DRIVER_NAME
+pci_request_mem_regions(struct pci_dev *pdev, char *name)
+#else
+pci_request_mem_regions(struct pci_dev *pdev, const char *name)
+#endif
+{
+	return pci_request_selected_regions(pdev,
+			    pci_select_bars(pdev, IORESOURCE_MEM), name);
+}
+
+static inline void
+pci_release_mem_regions(struct pci_dev *pdev)
+{
+	return pci_release_selected_regions(pdev,
+			    pci_select_bars(pdev, IORESOURCE_MEM));
+}
+#endif /* !SLE_VERSION(12,3,0) */
+#if ((RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(7,4)) ||\
+     (SLE_VERSION_CODE >= SLE_VERSION(12,3,0)))
+#define HAVE_ETHTOOL_NEW_50G_BITS
+#endif /* RHEL7.4+ || SLES12sp3+ */
+#else
+#define HAVE_UDP_ENC_RX_OFFLOAD
+#define HAVE_TCF_EXTS_TO_LIST
+#define HAVE_ETHTOOL_NEW_50G_BITS
+#define HAVE_PCI_IRQ_API
+#endif /* 4.8.0 */
+
+/*****************************************************************************/
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(4,9,0))
+#ifdef HAVE_TC_SETUP_CLSFLOWER
+#if (!(RHEL_RELEASE_CODE) && !(SLE_VERSION_CODE) || \
+    (SLE_VERSION_CODE && (SLE_VERSION_CODE < SLE_VERSION(12,3,0))))
+#define HAVE_TC_FLOWER_VLAN_IN_TAGS
+#endif /* !RHEL_RELEASE_CODE && !SLE_VERSION_CODE || <SLE_VERSION(12,3,0) */
+#endif /* HAVE_TC_SETUP_CLSFLOWER */
+#if (RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(7,4))
+#define HAVE_ETHTOOL_NEW_1G_BITS
+#define HAVE_ETHTOOL_NEW_10G_BITS
+#endif /* RHEL7.4+ */
+#else /* >=4.9 */
+#define HAVE_ETHTOOL_NEW_1G_BITS
+#define HAVE_ETHTOOL_NEW_10G_BITS
+#endif /* KERNEL_VERSION(4.9.0) */
+
+/*****************************************************************************/
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(4,10,0))
+/* SLES 12.3 and RHEL 7.5 backported this interface */
+#if (!SLE_VERSION_CODE && !RHEL_RELEASE_CODE) || \
+    (SLE_VERSION_CODE && (SLE_VERSION_CODE < SLE_VERSION(12,3,0))) || \
+    (RHEL_RELEASE_CODE && (RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(7,5)))
+static inline bool _kc_napi_complete_done2(struct napi_struct *napi,
+					   int __always_unused work_done)
+{
+	/* it was really hard to get napi_complete_done to be safe to call
+	 * recursively without running into our own kcompat, so just use
+	 * napi_complete
+	 */
+	napi_complete(napi);
+
+	/* true means that the stack is telling the driver to go-ahead and
+	 * re-enable interrupts
+	 */
+	return true;
+}
+
+#ifdef napi_complete_done
+#undef napi_complete_done
+#endif
+#define napi_complete_done _kc_napi_complete_done2
+#endif /* sles and rhel exclusion for < 4.10 */
+#if (RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(7,4))
+#define HAVE_DEV_WALK_API
+#define HAVE_ETHTOOL_NEW_2500MB_BITS
+#define HAVE_ETHTOOL_5G_BITS
+#endif /* RHEL7.4+ */
+#if (SLE_VERSION_CODE && (SLE_VERSION_CODE == SLE_VERSION(12,3,0)))
+#define HAVE_STRUCT_DMA_ATTRS
+#endif /* (SLES == 12.3.0) */
+#if (SLE_VERSION_CODE && (SLE_VERSION_CODE >= SLE_VERSION(12,3,0)))
+#define HAVE_NETDEVICE_MIN_MAX_MTU
+#endif /* (SLES >= 12.3.0) */
+#if (RHEL_RELEASE_CODE && (RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(7,5)))
+#define HAVE_STRUCT_DMA_ATTRS
+#define HAVE_RHEL7_EXTENDED_MIN_MAX_MTU
+#define HAVE_NETDEVICE_MIN_MAX_MTU
+#endif
+#if (!(SLE_VERSION_CODE && (SLE_VERSION_CODE >= SLE_VERSION(12,3,0))) && \
+     !(RHEL_RELEASE_CODE && (RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(7,5))))
+#ifndef dma_map_page_attrs
+#define dma_map_page_attrs __kc_dma_map_page_attrs
+static inline dma_addr_t __kc_dma_map_page_attrs(struct device *dev,
+						 struct page *page,
+						 size_t offset, size_t size,
+						 enum dma_data_direction dir,
+						 unsigned long __always_unused attrs)
+{
+	return dma_map_page(dev, page, offset, size, dir);
+}
+#endif
+
+#ifndef dma_unmap_page_attrs
+#define dma_unmap_page_attrs __kc_dma_unmap_page_attrs
+static inline void __kc_dma_unmap_page_attrs(struct device *dev,
+					     dma_addr_t addr, size_t size,
+					     enum dma_data_direction dir,
+					     unsigned long __always_unused attrs)
+{
+	dma_unmap_page(dev, addr, size, dir);
+}
+#endif
+
+static inline void __page_frag_cache_drain(struct page *page,
+					   unsigned int count)
+{
+#ifdef HAVE_PAGE_COUNT_BULK_UPDATE
+	if (!page_ref_sub_and_test(page, count))
+		return;
+
+	init_page_count(page);
+#else
+	BUG_ON(count > 1);
+	if (!count)
+		return;
+#endif
+	__free_pages(page, compound_order(page));
+}
+#endif /* !SLE_VERSION(12,3,0) && !RHEL_VERSION(7,5) */
+#if ((SLE_VERSION_CODE && (SLE_VERSION_CODE > SLE_VERSION(12,3,0))) ||\
+     (RHEL_RELEASE_CODE && RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(7,5)))
+#define HAVE_SWIOTLB_SKIP_CPU_SYNC
+#endif
+
+#if ((SLE_VERSION_CODE && (SLE_VERSION_CODE < SLE_VERSION(15,0,0))) ||\
+     (RHEL_RELEASE_CODE && (RHEL_RELEASE_CODE <= RHEL_RELEASE_VERSION(7,4))))
+#define page_frag_free __free_page_frag
+#endif
+#ifndef ETH_MIN_MTU
+#define ETH_MIN_MTU 68
+#endif /* ETH_MIN_MTU */
+#if (RHEL_RELEASE_CODE && RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(7,4))
+#define HAVE_PTP_ADJFINE
+#endif
+#else /* >= 4.10 */
+#define HAVE_TC_FLOWER_ENC
+#define HAVE_NETDEVICE_MIN_MAX_MTU
+#define HAVE_SWIOTLB_SKIP_CPU_SYNC
+#define HAVE_NETDEV_TC_RESETS_XPS
+#define HAVE_XPS_QOS_SUPPORT
+#define HAVE_DEV_WALK_API
+#define HAVE_ETHTOOL_NEW_2500MB_BITS
+#define HAVE_ETHTOOL_5G_BITS
+#define HAVE_PTP_ADJFINE
+/* kernel 4.10 onwards, as part of busy_poll rewrite, new state were added
+ * which is part of NAPI:state. If NAPI:state=NAPI_STATE_IN_BUSY_POLL,
+ * it means napi_poll is invoked in busy_poll context
+ */
+#define HAVE_NAPI_STATE_IN_BUSY_POLL
+#define HAVE_TCF_MIRRED_EGRESS_REDIRECT
+#endif /* 4.10.0 */
+
+/*****************************************************************************/
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(4,11,0))
+#ifdef CONFIG_NET_RX_BUSY_POLL
+#define HAVE_NDO_BUSY_POLL
+#endif /* CONFIG_NET_RX_BUSY_POLL */
+#if ((SLE_VERSION_CODE && (SLE_VERSION_CODE >= SLE_VERSION(12,3,0))) || \
+     (RHEL_RELEASE_CODE && (RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(7,5))))
+#define HAVE_VOID_NDO_GET_STATS64
+#endif /* (SLES >= 12.3.0) && (RHEL >= 7.5) */
+#else /* > 4.11 */
+#define HAVE_VOID_NDO_GET_STATS64
+#define HAVE_VM_OPS_FAULT_NO_VMA
+#endif /* 4.11.0 */
+
+/*****************************************************************************/
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(4,13,0))
+#if ((SLE_VERSION_CODE && (SLE_VERSION_CODE > SLE_VERSION(12,3,0))) || \
+     (RHEL_RELEASE_CODE && RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(7,5)))
+#define HAVE_TCF_EXTS_HAS_ACTION
+#endif
+#define  PCI_EXP_LNKCAP_SLS_8_0GB 0x00000003 /* LNKCAP2 SLS Vector bit 2 */
+#if (SLE_VERSION_CODE && (SLE_VERSION_CODE >= SLE_VERSION(12,4,0)))
+#define HAVE_PCI_ERROR_HANDLER_RESET_PREPARE
+#endif /* SLES >= 12sp4 */
+#else /* > 4.13 */
+#define HAVE_HWTSTAMP_FILTER_NTP_ALL
+#define HAVE_NDO_SETUP_TC_CHAIN_INDEX
+#define HAVE_PCI_ERROR_HANDLER_RESET_PREPARE
+#define HAVE_PTP_CLOCK_DO_AUX_WORK
+#endif /* 4.13.0 */
+
+/*****************************************************************************/
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(4,14,0))
+#ifdef ETHTOOL_GLINKSETTINGS
+#ifndef ethtool_link_ksettings_del_link_mode
+#define ethtool_link_ksettings_del_link_mode(ptr, name, mode)		\
+	__clear_bit(ETHTOOL_LINK_MODE_ ## mode ## _BIT, (ptr)->link_modes.name)
+#endif
+#endif /* ETHTOOL_GLINKSETTINGS */
+#if (SLE_VERSION_CODE && (SLE_VERSION_CODE >= SLE_VERSION(12,4,0)))
+#define HAVE_NDO_SETUP_TC_REMOVE_TC_TO_NETDEV
+#endif
+
+#if (RHEL_RELEASE_CODE && (RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(7,5)))
+#define HAVE_NDO_SETUP_TC_REMOVE_TC_TO_NETDEV
+#define HAVE_RHEL7_NETDEV_OPS_EXT_NDO_SETUP_TC
+#endif
+
+#define TIMER_DATA_TYPE		unsigned long
+#define TIMER_FUNC_TYPE		void (*)(TIMER_DATA_TYPE)
+
+#define timer_setup(timer, callback, flags)				\
+	__setup_timer((timer), (TIMER_FUNC_TYPE)(callback),		\
+		      (TIMER_DATA_TYPE)(timer), (flags))
+
+#define from_timer(var, callback_timer, timer_fieldname) \
+	container_of(callback_timer, typeof(*var), timer_fieldname)
+
+#ifndef xdp_do_flush_map
+#define xdp_do_flush_map() do {} while (0)
+#endif
+struct _kc_xdp_buff {
+	void *data;
+	void *data_end;
+	void *data_hard_start;
+};
+#define xdp_buff _kc_xdp_buff
+struct _kc_bpf_prog {
+};
+#define bpf_prog _kc_bpf_prog
+#else /* > 4.14 */
+#define HAVE_XDP_SUPPORT
+#define HAVE_NDO_SETUP_TC_REMOVE_TC_TO_NETDEV
+#define HAVE_TCF_EXTS_HAS_ACTION
+#endif /* 4.14.0 */
+
+/*****************************************************************************/
+#ifndef ETHTOOL_GLINKSETTINGS
+
+#define __ETHTOOL_LINK_MODE_MASK_NBITS 32
+#define ETHTOOL_LINK_MASK_SIZE BITS_TO_LONGS(__ETHTOOL_LINK_MODE_MASK_NBITS)
+
+/**
+ * struct ethtool_link_ksettings
+ * @link_modes: supported and advertising, single item arrays
+ * @link_modes.supported: bitmask of supported link speeds
+ * @link_modes.advertising: bitmask of currently advertised speeds
+ * @base: base link details
+ * @base.speed: current link speed
+ * @base.port: current port type
+ * @base.duplex: current duplex mode
+ * @base.autoneg: current autonegotiation settings
+ *
+ * This struct and the following macros provide a way to support the old
+ * ethtool get/set_settings API on older kernels, but in the style of the new
+ * GLINKSETTINGS API.  In this way, the same code can be used to support both
+ * APIs as seemlessly as possible.
+ *
+ * It should be noted the old API only has support up to the first 32 bits.
+ */
+struct ethtool_link_ksettings {
+	struct {
+		u32 speed;
+		u8 port;
+		u8 duplex;
+		u8 autoneg;
+	} base;
+	struct {
+		unsigned long supported[ETHTOOL_LINK_MASK_SIZE];
+		unsigned long advertising[ETHTOOL_LINK_MASK_SIZE];
+	} link_modes;
+};
+
+#define ETHTOOL_LINK_NAME_advertising(mode) ADVERTISED_ ## mode
+#define ETHTOOL_LINK_NAME_supported(mode) SUPPORTED_ ## mode
+#define ETHTOOL_LINK_NAME(name) ETHTOOL_LINK_NAME_ ## name
+#define ETHTOOL_LINK_CONVERT(name, mode) ETHTOOL_LINK_NAME(name)(mode)
+
+/**
+ * ethtool_link_ksettings_zero_link_mode
+ * @ptr: ptr to ksettings struct
+ * @name: supported or advertising
+ */
+#define ethtool_link_ksettings_zero_link_mode(ptr, name)\
+	(*((ptr)->link_modes.name) = 0x0)
+
+/**
+ * ethtool_link_ksettings_add_link_mode
+ * @ptr: ptr to ksettings struct
+ * @name: supported or advertising
+ * @mode: link mode to add
+ */
+#define ethtool_link_ksettings_add_link_mode(ptr, name, mode)\
+	(*((ptr)->link_modes.name) |= (typeof(*((ptr)->link_modes.name)))ETHTOOL_LINK_CONVERT(name, mode))
+
+/**
+ * ethtool_link_ksettings_del_link_mode
+ * @ptr: ptr to ksettings struct
+ * @name: supported or advertising
+ * @mode: link mode to delete
+ */
+#define ethtool_link_ksettings_del_link_mode(ptr, name, mode)\
+	(*((ptr)->link_modes.name) &= ~(typeof(*((ptr)->link_modes.name)))ETHTOOL_LINK_CONVERT(name, mode))
+
+/**
+ * ethtool_link_ksettings_test_link_mode
+ * @ptr: ptr to ksettings struct
+ * @name: supported or advertising
+ * @mode: link mode to add
+ */
+#define ethtool_link_ksettings_test_link_mode(ptr, name, mode)\
+	(!!(*((ptr)->link_modes.name) & ETHTOOL_LINK_CONVERT(name, mode)))
+
+/**
+ * _kc_ethtool_ksettings_to_cmd - Convert ethtool_link_ksettings to ethtool_cmd
+ * @ks: ethtool_link_ksettings struct
+ * @cmd: ethtool_cmd struct
+ *
+ * Convert an ethtool_link_ksettings structure into the older ethtool_cmd
+ * structure. We provide this in kcompat.h so that drivers can easily
+ * implement the older .{get|set}_settings as wrappers around the new api.
+ * Hence, we keep it prefixed with _kc_ to make it clear this isn't actually
+ * a real function in the kernel.
+ */
+static inline void
+_kc_ethtool_ksettings_to_cmd(struct ethtool_link_ksettings *ks,
+			     struct ethtool_cmd *cmd)
+{
+	cmd->supported = (u32)ks->link_modes.supported[0];
+	cmd->advertising = (u32)ks->link_modes.advertising[0];
+	ethtool_cmd_speed_set(cmd, ks->base.speed);
+	cmd->duplex = ks->base.duplex;
+	cmd->autoneg = ks->base.autoneg;
+	cmd->port = ks->base.port;
+}
+
+#endif /* !ETHTOOL_GLINKSETTINGS */
+
+/*****************************************************************************/
+#if ((LINUX_VERSION_CODE < KERNEL_VERSION(4,14,0)) || \
+     (SLE_VERSION_CODE && (SLE_VERSION_CODE <= SLE_VERSION(12,3,0))) || \
+     (RHEL_RELEASE_CODE && (RHEL_RELEASE_CODE <= RHEL_RELEASE_VERSION(7,5))))
+#define phy_speed_to_str _kc_phy_speed_to_str
+const char *_kc_phy_speed_to_str(int speed);
+#else /* (LINUX >= 4.14.0) || (SLES > 12.3.0) || (RHEL > 7.5) */
+#include <linux/phy.h>
+#endif /* (LINUX < 4.14.0) || (SLES <= 12.3.0) || (RHEL <= 7.5) */
+
+/*****************************************************************************/
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(4,15,0))
+#if (!(RHEL_RELEASE_CODE && (RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(7,6))) && \
+     !(SLE_VERSION_CODE && (SLE_VERSION_CODE >= SLE_VERSION(15,1,0))))
+#define TC_SETUP_QDISC_MQPRIO TC_SETUP_MQPRIO
+#endif /* !(RHEL >= 7.6) && !(SLES >= 15.1) */
+#if (RHEL_RELEASE_CODE && (RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(7,6)))
+#define HAVE_TCF_BLOCK
+#endif
+void _kc_ethtool_intersect_link_masks(struct ethtool_link_ksettings *dst,
+				      struct ethtool_link_ksettings *src);
+#define ethtool_intersect_link_masks _kc_ethtool_intersect_link_masks
+#else /* >= 4.15 */
+#define HAVE_NDO_BPF
+#define HAVE_XDP_BUFF_DATA_META
+#define HAVE_TC_CB_AND_SETUP_QDISC_MQPRIO
+#define HAVE_TCF_BLOCK
+#endif /* 4.15.0 */
+
+/*****************************************************************************/
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(4,16,0))
+#if (!(RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(7,7)) && \
+     !(SLE_VERSION_CODE >= SLE_VERSION(12,4,0) && \
+       SLE_VERSION_CODE < SLE_VERSION(15,0,0)) && \
+     !(SLE_VERSION_CODE >= SLE_VERSION(15,1,0)))
+/* The return value of the strscpy() and strlcpy() functions is different.
+ * This could be potentially hazard for the future.
+ * To avoid this the void result is forced.
+ * So it is not possible use this function with the return value.
+ * Return value is required in kernel 4.3 through 4.15
+ */
+#define strscpy(...) (void)(strlcpy(__VA_ARGS__))
+#endif /* !RHEL >= 7.7 && !SLES12sp4+ && !SLES15sp1+ */
+
+#define pci_printk(level, pdev, fmt, arg...) \
+	dev_printk(level, &(pdev)->dev, fmt, ##arg)
+#define pci_emerg(pdev, fmt, arg...)	dev_emerg(&(pdev)->dev, fmt, ##arg)
+#define pci_alert(pdev, fmt, arg...)	dev_alert(&(pdev)->dev, fmt, ##arg)
+#define pci_crit(pdev, fmt, arg...)	dev_crit(&(pdev)->dev, fmt, ##arg)
+#define pci_err(pdev, fmt, arg...)	dev_err(&(pdev)->dev, fmt, ##arg)
+#define pci_warn(pdev, fmt, arg...)	dev_warn(&(pdev)->dev, fmt, ##arg)
+#define pci_notice(pdev, fmt, arg...)	dev_notice(&(pdev)->dev, fmt, ##arg)
+#define pci_info(pdev, fmt, arg...)	dev_info(&(pdev)->dev, fmt, ##arg)
+#define pci_dbg(pdev, fmt, arg...)	dev_dbg(&(pdev)->dev, fmt, ##arg)
+
+#ifndef array_index_nospec
+static inline unsigned long _kc_array_index_mask_nospec(unsigned long index,
+							unsigned long size)
+{
+	/*
+	 * Always calculate and emit the mask even if the compiler
+	 * thinks the mask is not needed. The compiler does not take
+	 * into account the value of @index under speculation.
+	 */
+	OPTIMIZER_HIDE_VAR(index);
+	return ~(long)(index | (size - 1UL - index)) >> (BITS_PER_LONG - 1);
+}
+
+#define array_index_nospec(index, size)					\
+({									\
+	typeof(index) _i = (index);					\
+	typeof(size) _s = (size);					\
+	unsigned long _mask = _kc_array_index_mask_nospec(_i, _s);	\
+									\
+	BUILD_BUG_ON(sizeof(_i) > sizeof(long));			\
+	BUILD_BUG_ON(sizeof(_s) > sizeof(long));			\
+									\
+	(typeof(_i)) (_i & _mask);					\
+})
+#endif /* array_index_nospec */
+#ifndef DEFINE_SHOW_ATTRIBUTE
+#define DEFINE_SHOW_ATTRIBUTE(name) \
+static int name##_open(struct inode *inode, struct file *f)    \
+{                                                              \
+        return single_open(f, name##_show, inode->i_private);  \
+}                                                              \
+                                                               \
+static const struct file_operations name##_fops = {            \
+        .owner = THIS_MODULE,                                  \
+        .open = name##_open,                                   \
+        .read = seq_read,                                      \
+        .llseek = seq_lseek,                                   \
+        .release = single_release,                             \
+}
+#endif
+#ifdef HAVE_TC_CB_AND_SETUP_QDISC_MQPRIO
+#include <net/pkt_cls.h>
+static inline bool
+tc_cls_can_offload_and_chain0(const struct net_device *dev,
+			      struct tc_cls_common_offload *common)
+{
+	if (!tc_can_offload(dev))
+		return false;
+	if (common->chain_index)
+		return false;
+
+	return true;
+}
+#endif /* HAVE_TC_CB_AND_SETUP_QDISC_MQPRIO */
+
+#ifndef netdev_level_once
+#define netdev_level_once(level, dev, fmt, ...)			\
+do {								\
+	static bool __print_once __read_mostly;			\
+								\
+	if (!__print_once) {					\
+		__print_once = true;				\
+		netdev_printk(level, dev, fmt, ##__VA_ARGS__);	\
+	}							\
+} while (0)
+
+#define netdev_emerg_once(dev, fmt, ...) \
+	netdev_level_once(KERN_EMERG, dev, fmt, ##__VA_ARGS__)
+#define netdev_alert_once(dev, fmt, ...) \
+	netdev_level_once(KERN_ALERT, dev, fmt, ##__VA_ARGS__)
+#define netdev_crit_once(dev, fmt, ...) \
+	netdev_level_once(KERN_CRIT, dev, fmt, ##__VA_ARGS__)
+#define netdev_err_once(dev, fmt, ...) \
+	netdev_level_once(KERN_ERR, dev, fmt, ##__VA_ARGS__)
+#define netdev_warn_once(dev, fmt, ...) \
+	netdev_level_once(KERN_WARNING, dev, fmt, ##__VA_ARGS__)
+#define netdev_notice_once(dev, fmt, ...) \
+	netdev_level_once(KERN_NOTICE, dev, fmt, ##__VA_ARGS__)
+#define netdev_info_once(dev, fmt, ...) \
+	netdev_level_once(KERN_INFO, dev, fmt, ##__VA_ARGS__)
+#endif /* netdev_level_once */
+
+#ifndef sizeof_field
+#define sizeof_field(TYPE, MEMBER) (sizeof((((TYPE *)0)->MEMBER)))
+#endif /* sizeof_field */
+#else /* >= 4.16 */
+#include <linux/nospec.h>
+#define HAVE_XDP_BUFF_RXQ
+#define HAVE_TC_FLOWER_OFFLOAD_COMMON_EXTACK
+#define HAVE_TCF_MIRRED_DEV
+#define HAVE_VF_STATS_DROPPED
+#endif /* 4.16.0 */
+
+/*****************************************************************************/
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(4,17,0))
+#include <linux/pci_regs.h>
+#include <linux/pci.h>
+#define PCIE_SPEED_16_0GT 0x17
+#define PCI_EXP_LNKCAP_SLS_16_0GB 0x00000004 /* LNKCAP2 SLS Vector bit 3 */
+#define PCI_EXP_LNKSTA_CLS_16_0GB 0x0004 /* Current Link Speed 16.0GT/s */
+#define PCI_EXP_LNKCAP2_SLS_16_0GB 0x00000010 /* Supported Speed 16GT/s */
+void _kc_pcie_print_link_status(struct pci_dev *dev);
+#define pcie_print_link_status _kc_pcie_print_link_status
+#else /* >= 4.17.0 */
+#define HAVE_XDP_BUFF_IN_XDP_H
+#endif /* 4.17.0 */
+
+/*****************************************************************************/
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(4,18,0)) || (RHEL_RELEASE_CODE /* not in rhel yet */)
+#ifndef atomic_long_try_cmpxchg_relaxed
+#ifdef CONFIG_64BIT
+#define ATOMIC_LONG_TYPE long int
+#ifndef ATOMIC_LONG_PFX
+#define ATOMIC_LONG_PFX(x) atomic64 ## x
+#endif
+#ifndef atomic64_cmpxchg_relaxed
+#define atomic64_cmpxchg_relaxed	atomic64_cmpxchg
+#define atomic64_cmpxchg_acquire	atomic64_cmpxchg
+#define atomic64_cmpxchg_release	atomic64_cmpxchg
+#endif
+#else
+#define ATOMIC_LONG_TYPE int
+#ifndef ATOMIC_LONG_PFX
+#define ATOMIC_LONG_PFX(x) atomic ## x
+#endif
+#ifndef atomic_cmpxchg_relaxed
+#define atomic_cmpxchg_relaxed	atomic_cmpxchg
+#define atomic_cmpxchg_acquire	atomic_cmpxchg
+#define atomic_cmpxchg_release	atomic_cmpxchg
+#endif
+#endif
+#define __al_try_cmpxchg(type, _p, _po, _n)			\
+({									\
+	ATOMIC_LONG_TYPE *__po = (_po);					\
+	ATOMIC_LONG_TYPE __r, __o = *(ATOMIC_LONG_TYPE *)(__po);	\
+	__r = ATOMIC_LONG_PFX(_cmpxchg##type)((_p), __o, (_n));		\
+	if (unlikely(__r != __o))					\
+		*(ATOMIC_LONG_TYPE *)__po = __r;			\
+	likely(__r == __o);						\
+})
+#define atomic_long_try_cmpxchg(l, old, new) __al_try_cmpxchg(, l, old, new)
+#define atomic_long_try_cmpxchg_relaxed(l, old, new) __al_try_cmpxchg(_relaxed, l, old, new)
+#define atomic_long_try_cmpxchg_acquire(l, old, new) __al_try_cmpxchg(_acquire, l, old, new)
+#define atomic_long_try_cmpxchg_release(l, old, new) __al_try_cmpxchg(_release, l, old, new)
+#endif
+#endif
+
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(4,18,0))
+#ifdef NETIF_F_HW_L2FW_DOFFLOAD
+#include <linux/if_macvlan.h>
+#ifndef macvlan_supports_dest_filter
+#define macvlan_supports_dest_filter _kc_macvlan_supports_dest_filter
+static inline bool _kc_macvlan_supports_dest_filter(struct net_device *dev)
+{
+	struct macvlan_dev *macvlan = netdev_priv(dev);
+
+	return macvlan->mode == MACVLAN_MODE_PRIVATE ||
+	       macvlan->mode == MACVLAN_MODE_VEPA ||
+	       macvlan->mode == MACVLAN_MODE_BRIDGE;
+}
+#endif
+
+#if (!SLE_VERSION_CODE || (SLE_VERSION_CODE < SLE_VERSION(15,1,0)))
+#ifndef macvlan_accel_priv
+#define macvlan_accel_priv _kc_macvlan_accel_priv
+static inline void *_kc_macvlan_accel_priv(struct net_device *dev)
+{
+	struct macvlan_dev *macvlan = netdev_priv(dev);
+
+	return macvlan->fwd_priv;
+}
+#endif
+
+#ifndef macvlan_release_l2fw_offload
+#define macvlan_release_l2fw_offload _kc_macvlan_release_l2fw_offload
+static inline int _kc_macvlan_release_l2fw_offload(struct net_device *dev)
+{
+	struct macvlan_dev *macvlan = netdev_priv(dev);
+
+	macvlan->fwd_priv = NULL;
+	return dev_uc_add(macvlan->lowerdev, dev->dev_addr);
+}
+#endif
+#endif /* !SLES || SLES < 15.1 */
+#endif /* NETIF_F_HW_L2FW_DOFFLOAD */
+#include "kcompat_overflow.h"
+
+#if (SLE_VERSION_CODE < SLE_VERSION(15,1,0))
+#define firmware_request_nowarn	request_firmware_direct
+
+#if (RHEL_RELEASE_CODE && (RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(7,7)))
+#if IS_ENABLED(CONFIG_NET_DEVLINK)
+#include <net/devlink.h>
+
+enum devlink_port_flavour {
+	DEVLINK_PORT_FLAVOUR_PHYSICAL,
+	DEVLINK_PORT_FLAVOUR_CPU,
+	DEVLINK_PORT_FLAVOUR_DSA,
+	DEVLINK_PORT_FLAVOUR_PCI_PF,
+	DEVLINK_PORT_FLAVOUR_PCI_VF,
+};
+
+#endif /* CONFIG_NET_DEVLINK */
+#endif /* <RHEL7.7 */
+#endif /* !SLES || SLES < 15.1 */
+
+#else
+#include <linux/overflow.h>
+#include <net/xdp_sock.h>
+#define HAVE_XDP_FRAME_STRUCT
+#define HAVE_XDP_SOCK
+#define HAVE_NDO_XDP_XMIT_BULK_AND_FLAGS
+#define NO_NDO_XDP_FLUSH
+#define HAVE_AF_XDP_SUPPORT
+#endif /* 4.18.0 */
+
+/*****************************************************************************/
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(4,19,0))
+#if (RHEL_RELEASE_CODE && (RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(8,0)))
+#define HAVE_DEVLINK_REGIONS
+#endif
+#define bitmap_alloc(nbits, flags) \
+	kmalloc_array(BITS_TO_LONGS(nbits), sizeof(unsigned long), flags)
+#define bitmap_zalloc(nbits, flags) bitmap_alloc(nbits, ((flags) | __GFP_ZERO))
+#define bitmap_free(bitmap) kfree(bitmap)
+#ifdef ETHTOOL_GLINKSETTINGS
+#define ethtool_ks_clear(ptr, name) \
+	ethtool_link_ksettings_zero_link_mode(ptr, name)
+#define ethtool_ks_add_mode(ptr, name, mode) \
+	ethtool_link_ksettings_add_link_mode(ptr, name, mode)
+#define ethtool_ks_del_mode(ptr, name, mode) \
+	ethtool_link_ksettings_del_link_mode(ptr, name, mode)
+#define ethtool_ks_test(ptr, name, mode) \
+	ethtool_link_ksettings_test_link_mode(ptr, name, mode)
+#endif /* ETHTOOL_GLINKSETTINGS */
+#define HAVE_NETPOLL_CONTROLLER
+#ifndef netdev_set_sb_channel
+#define netdev_set_sb_channel(x, y) do { } while (0)
+#endif
+#ifndef netdev_unbind_sb_channel
+#define netdev_unbind_sb_channel(x, y) do { } while (0)
+
+#endif
+#define REQUIRE_PCI_CLEANUP_AER_ERROR_STATUS
+#if (SLE_VERSION_CODE && (SLE_VERSION_CODE >= SLE_VERSION(15,1,0)))
+#define HAVE_TCF_BLOCK
+#define HAVE_TCF_MIRRED_DEV
+#define HAVE_NDO_SELECT_QUEUE_SB_DEV
+#define HAVE_TCF_BLOCK_CB_REGISTER_EXTACK
+#endif
+#if ((RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(8,0)) ||\
+     (SLE_VERSION_CODE >= SLE_VERSION(15,1,0)))
+#define HAVE_TCF_EXTS_FOR_EACH_ACTION
+#define HAVE_NDO_SELECT_QUEUE_SB_DEV
+#undef HAVE_TCF_EXTS_TO_LIST
+#endif /* RHEL8.0+ */
+#else /* >= 4.19.0 */
+#define HAVE_TCF_BLOCK_CB_REGISTER_EXTACK
+#define NO_NETDEV_BPF_PROG_ATTACHED
+#define HAVE_NDO_SELECT_QUEUE_SB_DEV
+#define HAVE_NETDEV_SB_DEV
+#undef HAVE_TCF_EXTS_TO_LIST
+#define HAVE_TCF_EXTS_FOR_EACH_ACTION
+#define HAVE_DEVLINK_REGIONS
+#define HAVE_DEVLINK_PARAMS
+#endif /* 4.19.0 */
+
+/*****************************************************************************/
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(4,20,0))
+#define HAVE_XDP_UMEM_PROPS
+#ifdef HAVE_AF_XDP_SUPPORT
+#ifndef napi_if_scheduled_mark_missed
+static inline bool __kc_napi_if_scheduled_mark_missed(struct napi_struct *n)
+{
+	unsigned long val, new;
+
+	do {
+		val = READ_ONCE(n->state);
+		if (val & NAPIF_STATE_DISABLE)
+			return true;
+
+		if (!(val & NAPIF_STATE_SCHED))
+			return false;
+
+		new = val | NAPIF_STATE_MISSED;
+	} while (cmpxchg(&n->state, val, new) != val);
+
+	return true;
+}
+
+#define napi_if_scheduled_mark_missed __kc_napi_if_scheduled_mark_missed
+#endif /* !napi_if_scheduled_mark_missed */
+#endif /* HAVE_AF_XDP_SUPPORT */
+#if (RHEL_RELEASE_CODE && (RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(8,0)))
+#define HAVE_DEVLINK_ESWITCH_OPS_EXTACK
+#endif /* RHEL >= 8.0 */
+#else /* >= 4.20.0 */
+#define HAVE_DEVLINK_ESWITCH_OPS_EXTACK
+#define HAVE_AF_XDP_ZC_SUPPORT
+#define HAVE_VXLAN_TYPE
+#endif /* 4.20.0 */
+
+/*****************************************************************************/
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(5,0,0))
+#if (RHEL_RELEASE_CODE && \
+     (RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(7,7) && \
+      RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(8,0)) || \
+     (RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(8,1)))
+#define HAVE_PTP_SYS_OFFSET_EXTENDED_IOCTL
+#else /* RHEL >= 7.7 && RHEL < 8.0 || RHEL >= 8.1 */
+struct ptp_system_timestamp {
+	struct timespec64 pre_ts;
+	struct timespec64 post_ts;
+};
+
+static inline void
+ptp_read_system_prets(struct ptp_system_timestamp __always_unused *sts)
+{
+	;
+}
+
+static inline void
+ptp_read_system_postts(struct ptp_system_timestamp __always_unused *sts)
+{
+	;
+}
+#endif /* !(RHEL >= 7.7 && RHEL != 8.0) */
+#else /* >= 5.0.0 */
+#define HAVE_PHC_GETTIMEX64
+#define HAVE_PTP_SYS_OFFSET_EXTENDED_IOCTL
+#define HAVE_NDO_BRIDGE_SETLINK_EXTACK
+#define HAVE_DMA_ALLOC_COHERENT_ZEROES_MEM
+#define HAVE_GENEVE_TYPE
+#endif /* 5.0.0 */
+
+/*****************************************************************************/
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(5,1,0))
+#define __static_assert(expr, msg, ...) _Static_assert(expr, msg)
+#define static_assert(expr, ...) __static_assert(expr, ##__VA_ARGS__, #expr)
+#if (RHEL_RELEASE_CODE && (RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(8,1)))
+#define HAVE_DEVLINK_INFO_GET
+#define HAVE_DEVLINK_FLASH_UPDATE
+#endif /* RHEL < 8.1 */
+#else /* >= 5.1.0 */
+#define HAVE_NDO_FDB_ADD_EXTACK
+#define NO_XDP_QUERY_XSK_UMEM
+#define HAVE_TC_FLOW_RULE_INFRASTRUCTURE
+#define HAVE_DEVLINK_INFO_GET
+#define HAVE_DEVLINK_FLASH_UPDATE
+#define HAVE_DEVLINK_PORT_PARAMS
+#endif /* 5.1.0 */
+
+/*****************************************************************************/
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(5,2,0))
+#if (defined HAVE_SKB_XMIT_MORE) && \
+(!(RHEL_RELEASE_CODE && (RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(8,2))))
+#define netdev_xmit_more()	(skb->xmit_more)
+#else
+#define netdev_xmit_more()	(0)
+#endif
+
+#if (!(RHEL_RELEASE_CODE && (RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(8,2))))
+#ifndef eth_get_headlen
+static inline u32
+__kc_eth_get_headlen(const struct net_device __always_unused *dev, void *data,
+		     unsigned int len)
+{
+	return eth_get_headlen(data, len);
+}
+
+#define eth_get_headlen(dev, data, len) __kc_eth_get_headlen(dev, data, len)
+#endif /* !eth_get_headlen */
+#endif /* !RHEL >= 8.2 */
+
+#ifndef mmiowb
+#ifdef CONFIG_IA64
+#define mmiowb() asm volatile ("mf.a" ::: "memory")
+#else
+#define mmiowb()
+#endif
+#endif /* mmiowb */
+#if (RHEL_RELEASE_CODE && \
+      ((RHEL_RELEASE_CODE > RHEL_RELEASE_VERSION(7,6)) && \
+       (RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(8,2))))
+#if IS_ENABLED(CONFIG_NET_DEVLINK)
+#include <net/devlink.h>
+#ifndef devlink_port_attrs_set
+static inline void
+_kc_devlink_port_attrs_set(struct devlink_port *devlink_port,
+			   enum devlink_port_flavour flavour,
+			   u32 port_number, bool split,
+			   u32 split_subport_number,
+			   const unsigned char __always_unused *switch_id,
+			   unsigned char __always_unused switch_id_len)
+{
+	devlink_port_attrs_set(devlink_port, flavour, port_number, split,
+			       split_subport_number);
+}
+
+#define devlink_port_attrs_set _kc_devlink_port_attrs_set
+#endif /* !devlink_port_attrs_set */
+#endif /* CONFIG_NET_DEVLINK */
+#endif /* <RHEL8.2 */
+#else /* >= 5.2.0 */
+#define SPIN_UNLOCK_IMPLIES_MMIOWB
+#define HAVE_NETDEV_XMIT_MORE
+#endif /* 5.2.0 */
+
+ /*****************************************************************************/
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(5,3,0))
+
+#if (!RHEL_RELEASE_CODE || \
+     (RHEL_RELEASE_CODE && (RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(8,2))))
+#if IS_ENABLED(CONFIG_NET_DEVLINK)
+static inline void
+devlink_flash_update_begin_notify(struct devlink __always_unused *devlink)
+{
+}
+
+static inline void
+devlink_flash_update_end_notify(struct devlink __always_unused *devlink)
+{
+}
+
+static inline void
+devlink_flash_update_status_notify(struct devlink __always_unused *devlink,
+				   const char __always_unused *status_msg,
+				   const char __always_unused *component,
+				   unsigned long __always_unused done,
+				   unsigned long __always_unused total)
+{
+}
+#endif /* CONFIG_NET_DEVLINK */
+#endif /* not RH or RH < 8.2 */
+#endif /* 5.3.0 */
+
+/*****************************************************************************/
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(5,4,0))
+#define DEVLINK_INFO_VERSION_GENERIC_FW        "fw"
+#define DEVLINK_INFO_VERSION_GENERIC_ASIC_ID   "asic.id"
+#define DEVLINK_INFO_VERSION_GENERIC_ASIC_REV  "asic.rev"
+#endif /* 5.4.0 */
+
+/*****************************************************************************/
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(5,6,0))
+
+#if ((RHEL_RELEASE_CODE && (RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(8,3))) || \
+     (SLE_VERSION_CODE && (SLE_VERSION_CODE >= SLE_VERSION(15,3,0))))
+#define HAVE_TX_TIMEOUT_TXQUEUE
+#endif
+
+#else /* >= 5.6.0 */
+#define HAVE_TX_TIMEOUT_TXQUEUE
+#define HAVE_HWSTAMP_TX_ONESTEP_P2P
+#endif /* 5.6.0 */
+
+/*****************************************************************************/
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(5,7,0))
+
+#ifndef DEVLINK_INFO_VERSION_GENERIC_FW_BUNDLE_ID
+#define DEVLINK_INFO_VERSION_GENERIC_FW_BUNDLE_ID "fw.bundle_id"
+#endif
+
+#ifdef HAVE_DEVLINK_REGIONS
+#define HAVE_DEVLINK_SNAPSHOT_CREATE_DESTRUCTOR
+#endif /* HAVE_DEVLINK_REGIONS */
+#else /* >= 5.7.0 */
+#define HAVE_DEVLINK_REGION_OPS_SNAPSHOT
+#define HAVE_ETHTOOL_COALESCE_PARAMS_SUPPORT
+#endif /* 5.7.0 */
+
+/*****************************************************************************/
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(5,10,0))
+
+#if ((RHEL_RELEASE_CODE && (RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(8,5))) || \
+     (SLE_VERSION_CODE && (SLE_VERSION_CODE >= SLE_VERSION(15,3,0))))
+#define HAVE_DEVLINK_UPDATE_PARAMS
+#endif
+
+#else
+#define HAVE_DEVLINK_UPDATE_PARAMS
+#endif /* 5.10.0 */
+
+/*****************************************************************************/
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(5,11,0))
+
+#if (RHEL_RELEASE_CODE && (RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(8,5)))
+#define HAVE_DEVLINK_PREFETCH_FW
+static inline void devlink_flash_update_begin_notify(struct devlink *dl) { }
+static inline void devlink_flash_update_end_notify(struct devlink *dl) { }
+#endif
+
+#else
+#define HAVE_DEVLINK_PREFETCH_FW
+static inline void devlink_flash_update_begin_notify(struct devlink *dl) { }
+static inline void devlink_flash_update_end_notify(struct devlink *dl) { }
+#endif /* 5.11.0 */
+
+/*****************************************************************************/
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(5,12,0))
+#if (!RHEL_RELEASE_CODE || (RHEL_RELEASE_CODE && \
+       (RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(8,5))))
+static inline bool dev_page_is_reusable(struct page *page)
+{
+	return likely(page_to_nid(page) == numa_mem_id() &&
+		      !page_is_pfmemalloc(page));
+}
+#endif
+#endif /* 5.12.0 */
+
+/*****************************************************************************/
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(5,13,0))
+
+void _kc_ethtool_sprintf(u8 **data, const char *fmt, ...);
+#define ethtool_sprintf _kc_ethtool_sprintf
+#endif /* 5.13.0 */
+
+/*****************************************************************************/
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(5,15,0))
+#if (!RHEL_RELEASE_CODE || (RHEL_RELEASE_CODE && \
+       (RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(9,0))))
+
+#if (RHEL_RELEASE_CODE && (RHEL_RELEASE_VERSION(8, 6) == RHEL_RELEASE_CODE))
+#define HAVE_COALESCE_EXTACK
+#endif
+
+#define ndo_eth_ioctl ndo_do_ioctl
+
+#if IS_ENABLED(CONFIG_NET_DEVLINK)
+static inline struct devlink *_kc_devlink_alloc(const struct devlink_ops *ops,
+						size_t priv_size,
+						struct device *dev)
+{
+	return devlink_alloc(ops, priv_size);
+}
+#define devlink_alloc  _kc_devlink_alloc
+#endif /* CONFIG_NET_DEVLINK */
+
+#else
+
+#if IS_ENABLED(CONFIG_NET_DEVLINK)
+#define HAVE_VOID_DEVLINK_REGISTER
+#endif /* CONFIG_NET_DEVLINK */
+
+#endif /* not RH or RH < 9.0 */
+
+#else
+
+#define HAVE_COALESCE_EXTACK
+
+#if IS_ENABLED(CONFIG_NET_DEVLINK)
+#define HAVE_VOID_DEVLINK_REGISTER
+#endif /* CONFIG_NET_DEVLINK */
+
+#endif /* 5.15.0 */
+
+/*****************************************************************************/
+#if (KERNEL_VERSION(5, 17, 0) > LINUX_VERSION_CODE)
+#else
+#define HAVE_RINGPARAM_EXTACK
+#endif /* 5.17 */
+
+/*****************************************************************************/
+#if (KERNEL_VERSION(6, 0, 0) > LINUX_VERSION_CODE)
+static inline int skb_tcp_all_headers(const struct sk_buff *skb)
+{
+	return skb_transport_offset(skb) + tcp_hdrlen(skb);
+}
+
+static inline int skb_inner_tcp_all_headers(const struct sk_buff *skb)
+{
+	return skb_inner_transport_offset(skb) + inner_tcp_hdrlen(skb);
+}
+
+#else
+#endif /* 6.0 */
+
+/*****************************************************************************/
+#if (KERNEL_VERSION(6, 1, 0) > LINUX_VERSION_CODE)
+
+#if (RHEL_RELEASE_CODE && RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(7, 0) && defined(netif_napi_add))
+#undef netif_napi_add
+#define netif_napi_add(a, b, c)  _netif_napi_add((a), (b), (c), NAPI_POLL_WEIGHT)
+#else
+#define netif_napi_add(a, b, c)  netif_napi_add((a), (b), (c), NAPI_POLL_WEIGHT)
+#endif
+
+#else
+#endif /* 6.1 */
+
+/* We don't support PTP on older RHEL kernels (needs more compat work) */
+#if (RHEL_RELEASE_CODE && RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(7,4))
+#undef CONFIG_PTP_1588_CLOCK
+#undef CONFIG_PTP_1588_CLOCK_MODULE
+#endif
+
+/* We don't support PTP on SUSE kernels (needs more compat work) */
+#ifdef CONFIG_SUSE_KERNEL
+#undef CONFIG_PTP_1588_CLOCK
+#undef CONFIG_PTP_1588_CLOCK_MODULE
+#endif
+
+#endif /* _KCOMPAT_H_ */
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/kcompat_overflow.h b/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/kcompat_overflow.h
new file mode 100644
index 000000000..c6010e947
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/kcompat_overflow.h
@@ -0,0 +1,319 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/* Copyright(c) 1999 - 2019 Intel Corporation. */
+
+/* SPDX-License-Identifier: GPL-2.0 OR MIT */
+#ifndef __LINUX_OVERFLOW_H
+#define __LINUX_OVERFLOW_H
+
+#include <linux/compiler.h>
+
+/*
+ * In the fallback code below, we need to compute the minimum and
+ * maximum values representable in a given type. These macros may also
+ * be useful elsewhere, so we provide them outside the
+ * COMPILER_HAS_GENERIC_BUILTIN_OVERFLOW block.
+ *
+ * It would seem more obvious to do something like
+ *
+ * #define type_min(T) (T)(is_signed_type(T) ? (T)1 << (8*sizeof(T)-1) : 0)
+ * #define type_max(T) (T)(is_signed_type(T) ? ((T)1 << (8*sizeof(T)-1)) - 1 : ~(T)0)
+ *
+ * Unfortunately, the middle expressions, strictly speaking, have
+ * undefined behaviour, and at least some versions of gcc warn about
+ * the type_max expression (but not if -fsanitize=undefined is in
+ * effect; in that case, the warning is deferred to runtime...).
+ *
+ * The slightly excessive casting in type_min is to make sure the
+ * macros also produce sensible values for the exotic type _Bool. [The
+ * overflow checkers only almost work for _Bool, but that's
+ * a-feature-not-a-bug, since people shouldn't be doing arithmetic on
+ * _Bools. Besides, the gcc builtins don't allow _Bool* as third
+ * argument.]
+ *
+ * Idea stolen from
+ * https://mail-index.netbsd.org/tech-misc/2007/02/05/0000.html -
+ * credit to Christian Biere.
+ */
+/* The is_signed_type macro is redefined in a few places in various kernel
+ * headers. If this header is included at the same time as one of those, we
+ * will generate compilation warnings. Since we can't fix every old kernel,
+ * rename is_signed_type for this file to _kc_is_signed_type. This prevents
+ * the macro name collision, and should be safe since our drivers do not
+ * directly call the macro.
+ */
+#define _kc_is_signed_type(type)       (((type)(-1)) < (type)1)
+#define __type_half_max(type) ((type)1 << (8*sizeof(type) - 1 - _kc_is_signed_type(type)))
+#define type_max(T) ((T)((__type_half_max(T) - 1) + __type_half_max(T)))
+#define type_min(T) ((T)((T)-type_max(T)-(T)1))
+
+
+#ifdef COMPILER_HAS_GENERIC_BUILTIN_OVERFLOW
+/*
+ * For simplicity and code hygiene, the fallback code below insists on
+ * a, b and *d having the same type (similar to the min() and max()
+ * macros), whereas gcc's type-generic overflow checkers accept
+ * different types. Hence we don't just make check_add_overflow an
+ * alias for __builtin_add_overflow, but add type checks similar to
+ * below.
+ */
+#define check_add_overflow(a, b, d) ({		\
+	typeof(a) __a = (a);			\
+	typeof(b) __b = (b);			\
+	typeof(d) __d = (d);			\
+	(void) (&__a == &__b);			\
+	(void) (&__a == __d);			\
+	__builtin_add_overflow(__a, __b, __d);	\
+})
+
+#define check_sub_overflow(a, b, d) ({		\
+	typeof(a) __a = (a);			\
+	typeof(b) __b = (b);			\
+	typeof(d) __d = (d);			\
+	(void) (&__a == &__b);			\
+	(void) (&__a == __d);			\
+	__builtin_sub_overflow(__a, __b, __d);	\
+})
+
+#define check_mul_overflow(a, b, d) ({		\
+	typeof(a) __a = (a);			\
+	typeof(b) __b = (b);			\
+	typeof(d) __d = (d);			\
+	(void) (&__a == &__b);			\
+	(void) (&__a == __d);			\
+	__builtin_mul_overflow(__a, __b, __d);	\
+})
+
+#else
+
+
+/* Checking for unsigned overflow is relatively easy without causing UB. */
+#define __unsigned_add_overflow(a, b, d) ({	\
+	typeof(a) __a = (a);			\
+	typeof(b) __b = (b);			\
+	typeof(d) __d = (d);			\
+	(void) (&__a == &__b);			\
+	(void) (&__a == __d);			\
+	*__d = __a + __b;			\
+	*__d < __a;				\
+})
+#define __unsigned_sub_overflow(a, b, d) ({	\
+	typeof(a) __a = (a);			\
+	typeof(b) __b = (b);			\
+	typeof(d) __d = (d);			\
+	(void) (&__a == &__b);			\
+	(void) (&__a == __d);			\
+	*__d = __a - __b;			\
+	__a < __b;				\
+})
+/*
+ * If one of a or b is a compile-time constant, this avoids a division.
+ */
+#define __unsigned_mul_overflow(a, b, d) ({		\
+	typeof(a) __a = (a);				\
+	typeof(b) __b = (b);				\
+	typeof(d) __d = (d);				\
+	(void) (&__a == &__b);				\
+	(void) (&__a == __d);				\
+	*__d = __a * __b;				\
+	__builtin_constant_p(__b) ?			\
+	  __b > 0 && __a > type_max(typeof(__a)) / __b : \
+	  __a > 0 && __b > type_max(typeof(__b)) / __a;	 \
+})
+
+/*
+ * For signed types, detecting overflow is much harder, especially if
+ * we want to avoid UB. But the interface of these macros is such that
+ * we must provide a result in *d, and in fact we must produce the
+ * result promised by gcc's builtins, which is simply the possibly
+ * wrapped-around value. Fortunately, we can just formally do the
+ * operations in the widest relevant unsigned type (u64) and then
+ * truncate the result - gcc is smart enough to generate the same code
+ * with and without the (u64) casts.
+ */
+
+/*
+ * Adding two signed integers can overflow only if they have the same
+ * sign, and overflow has happened iff the result has the opposite
+ * sign.
+ */
+#define __signed_add_overflow(a, b, d) ({	\
+	typeof(a) __a = (a);			\
+	typeof(b) __b = (b);			\
+	typeof(d) __d = (d);			\
+	(void) (&__a == &__b);			\
+	(void) (&__a == __d);			\
+	*__d = (u64)__a + (u64)__b;		\
+	(((~(__a ^ __b)) & (*__d ^ __a))	\
+		& type_min(typeof(__a))) != 0;	\
+})
+
+/*
+ * Subtraction is similar, except that overflow can now happen only
+ * when the signs are opposite. In this case, overflow has happened if
+ * the result has the opposite sign of a.
+ */
+#define __signed_sub_overflow(a, b, d) ({	\
+	typeof(a) __a = (a);			\
+	typeof(b) __b = (b);			\
+	typeof(d) __d = (d);			\
+	(void) (&__a == &__b);			\
+	(void) (&__a == __d);			\
+	*__d = (u64)__a - (u64)__b;		\
+	((((__a ^ __b)) & (*__d ^ __a))		\
+		& type_min(typeof(__a))) != 0;	\
+})
+
+/*
+ * Signed multiplication is rather hard. gcc always follows C99, so
+ * division is truncated towards 0. This means that we can write the
+ * overflow check like this:
+ *
+ * (a > 0 && (b > MAX/a || b < MIN/a)) ||
+ * (a < -1 && (b > MIN/a || b < MAX/a) ||
+ * (a == -1 && b == MIN)
+ *
+ * The redundant casts of -1 are to silence an annoying -Wtype-limits
+ * (included in -Wextra) warning: When the type is u8 or u16, the
+ * __b_c_e in check_mul_overflow obviously selects
+ * __unsigned_mul_overflow, but unfortunately gcc still parses this
+ * code and warns about the limited range of __b.
+ */
+
+#define __signed_mul_overflow(a, b, d) ({				\
+	typeof(a) __a = (a);						\
+	typeof(b) __b = (b);						\
+	typeof(d) __d = (d);						\
+	typeof(a) __tmax = type_max(typeof(a));				\
+	typeof(a) __tmin = type_min(typeof(a));				\
+	(void) (&__a == &__b);						\
+	(void) (&__a == __d);						\
+	*__d = (u64)__a * (u64)__b;					\
+	(__b > 0   && (__a > __tmax/__b || __a < __tmin/__b)) ||	\
+	(__b < (typeof(__b))-1  && (__a > __tmin/__b || __a < __tmax/__b)) || \
+	(__b == (typeof(__b))-1 && __a == __tmin);			\
+})
+
+
+#define check_add_overflow(a, b, d)					\
+	__builtin_choose_expr(_kc_is_signed_type(typeof(a)),		\
+			__signed_add_overflow(a, b, d),			\
+			__unsigned_add_overflow(a, b, d))
+
+#define check_sub_overflow(a, b, d)					\
+	__builtin_choose_expr(_kc_is_signed_type(typeof(a)),		\
+			__signed_sub_overflow(a, b, d),			\
+			__unsigned_sub_overflow(a, b, d))
+
+#define check_mul_overflow(a, b, d)					\
+	__builtin_choose_expr(_kc_is_signed_type(typeof(a)),		\
+			__signed_mul_overflow(a, b, d),			\
+			__unsigned_mul_overflow(a, b, d))
+
+
+#endif /* COMPILER_HAS_GENERIC_BUILTIN_OVERFLOW */
+
+/** check_shl_overflow() - Calculate a left-shifted value and check overflow
+ *
+ * @a: Value to be shifted
+ * @s: How many bits left to shift
+ * @d: Pointer to where to store the result
+ *
+ * Computes *@d = (@a << @s)
+ *
+ * Returns true if '*d' cannot hold the result or when 'a << s' doesn't
+ * make sense. Example conditions:
+ * - 'a << s' causes bits to be lost when stored in *d.
+ * - 's' is garbage (e.g. negative) or so large that the result of
+ *   'a << s' is guaranteed to be 0.
+ * - 'a' is negative.
+ * - 'a << s' sets the sign bit, if any, in '*d'.
+ *
+ * '*d' will hold the results of the attempted shift, but is not
+ * considered "safe for use" if false is returned.
+ */
+#define check_shl_overflow(a, s, d) ({					\
+	typeof(a) _a = a;						\
+	typeof(s) _s = s;						\
+	typeof(d) _d = d;						\
+	u64 _a_full = _a;						\
+	unsigned int _to_shift =					\
+		_s >= 0 && _s < 8 * sizeof(*d) ? _s : 0;		\
+	*_d = (_a_full << _to_shift);					\
+	(_to_shift != _s || *_d < 0 || _a < 0 ||			\
+		(*_d >> _to_shift) != _a);				\
+})
+
+/**
+ * array_size() - Calculate size of 2-dimensional array.
+ *
+ * @a: dimension one
+ * @b: dimension two
+ *
+ * Calculates size of 2-dimensional array: @a * @b.
+ *
+ * Returns: number of bytes needed to represent the array or SIZE_MAX on
+ * overflow.
+ */
+static inline __must_check size_t array_size(size_t a, size_t b)
+{
+	size_t bytes;
+
+	if (check_mul_overflow(a, b, &bytes))
+		return SIZE_MAX;
+
+	return bytes;
+}
+
+/**
+ * array3_size() - Calculate size of 3-dimensional array.
+ *
+ * @a: dimension one
+ * @b: dimension two
+ * @c: dimension three
+ *
+ * Calculates size of 3-dimensional array: @a * @b * @c.
+ *
+ * Returns: number of bytes needed to represent the array or SIZE_MAX on
+ * overflow.
+ */
+static inline __must_check size_t array3_size(size_t a, size_t b, size_t c)
+{
+	size_t bytes;
+
+	if (check_mul_overflow(a, b, &bytes))
+		return SIZE_MAX;
+	if (check_mul_overflow(bytes, c, &bytes))
+		return SIZE_MAX;
+
+	return bytes;
+}
+
+static inline __must_check size_t __ab_c_size(size_t n, size_t size, size_t c)
+{
+	size_t bytes;
+
+	if (check_mul_overflow(n, size, &bytes))
+		return SIZE_MAX;
+	if (check_add_overflow(bytes, c, &bytes))
+		return SIZE_MAX;
+
+	return bytes;
+}
+
+/**
+ * struct_size() - Calculate size of structure with trailing array.
+ * @p: Pointer to the structure.
+ * @member: Name of the array member.
+ * @n: Number of elements in the array.
+ *
+ * Calculates size of memory needed for structure @p followed by an
+ * array of @n @member elements.
+ *
+ * Return: number of bytes needed or SIZE_MAX on overflow.
+ */
+#define struct_size(p, member, n)					\
+	__ab_c_size(n,							\
+		    sizeof(*(p)->member) + __must_be_array((p)->member),\
+		    sizeof(*(p)))
+
+#endif /* __LINUX_OVERFLOW_H */
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/net_dim.c b/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/net_dim.c
new file mode 100644
index 000000000..32dcf7278
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/net_dim.c
@@ -0,0 +1,248 @@
+// SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB
+/*
+ * Copyright (c) 2018, Mellanox Technologies inc.  All rights reserved.
+ */
+
+#ifndef CONFIG_DIMLIB
+#include "dim.h"
+
+/*
+ * Net DIM profiles:
+ *        There are different set of profiles for each CQ period mode.
+ *        There are different set of profiles for RX/TX CQs.
+ *        Each profile size must be of NET_DIM_PARAMS_NUM_PROFILES
+ */
+#define NET_DIM_PARAMS_NUM_PROFILES 5
+#define NET_DIM_DEFAULT_RX_CQ_MODERATION_PKTS_FROM_EQE 256
+#define NET_DIM_DEFAULT_TX_CQ_MODERATION_PKTS_FROM_EQE 128
+#define NET_DIM_DEF_PROFILE_CQE 1
+#define NET_DIM_DEF_PROFILE_EQE 1
+
+#define NET_DIM_RX_EQE_PROFILES { \
+	{1,   NET_DIM_DEFAULT_RX_CQ_MODERATION_PKTS_FROM_EQE}, \
+	{8,   NET_DIM_DEFAULT_RX_CQ_MODERATION_PKTS_FROM_EQE}, \
+	{64,  NET_DIM_DEFAULT_RX_CQ_MODERATION_PKTS_FROM_EQE}, \
+	{128, NET_DIM_DEFAULT_RX_CQ_MODERATION_PKTS_FROM_EQE}, \
+	{256, NET_DIM_DEFAULT_RX_CQ_MODERATION_PKTS_FROM_EQE}, \
+}
+
+#define NET_DIM_RX_CQE_PROFILES { \
+	{2,  256},             \
+	{8,  128},             \
+	{16, 64},              \
+	{32, 64},              \
+	{64, 64}               \
+}
+
+#define NET_DIM_TX_EQE_PROFILES { \
+	{1,   NET_DIM_DEFAULT_TX_CQ_MODERATION_PKTS_FROM_EQE},  \
+	{8,   NET_DIM_DEFAULT_TX_CQ_MODERATION_PKTS_FROM_EQE},  \
+	{32,  NET_DIM_DEFAULT_TX_CQ_MODERATION_PKTS_FROM_EQE},  \
+	{64,  NET_DIM_DEFAULT_TX_CQ_MODERATION_PKTS_FROM_EQE},  \
+	{128, NET_DIM_DEFAULT_TX_CQ_MODERATION_PKTS_FROM_EQE}   \
+}
+
+#define NET_DIM_TX_CQE_PROFILES { \
+	{5,  128},  \
+	{8,  64},  \
+	{16, 32},  \
+	{32, 32},  \
+	{64, 32}   \
+}
+
+static const struct dim_cq_moder
+rx_profile[DIM_CQ_PERIOD_NUM_MODES][NET_DIM_PARAMS_NUM_PROFILES] = {
+	NET_DIM_RX_EQE_PROFILES,
+	NET_DIM_RX_CQE_PROFILES,
+};
+
+static const struct dim_cq_moder
+tx_profile[DIM_CQ_PERIOD_NUM_MODES][NET_DIM_PARAMS_NUM_PROFILES] = {
+	NET_DIM_TX_EQE_PROFILES,
+	NET_DIM_TX_CQE_PROFILES,
+};
+
+struct dim_cq_moder
+net_dim_get_rx_moderation(u8 cq_period_mode, int ix)
+{
+	struct dim_cq_moder cq_moder = rx_profile[cq_period_mode][ix];
+
+	cq_moder.cq_period_mode = cq_period_mode;
+	return cq_moder;
+}
+//EXPORT_SYMBOL(net_dim_get_rx_moderation);
+
+struct dim_cq_moder
+net_dim_get_def_rx_moderation(u8 cq_period_mode)
+{
+	u8 profile_ix = cq_period_mode == DIM_CQ_PERIOD_MODE_START_FROM_CQE ?
+			NET_DIM_DEF_PROFILE_CQE : NET_DIM_DEF_PROFILE_EQE;
+
+	return net_dim_get_rx_moderation(cq_period_mode, profile_ix);
+}
+//EXPORT_SYMBOL(net_dim_get_def_rx_moderation);
+
+struct dim_cq_moder
+net_dim_get_tx_moderation(u8 cq_period_mode, int ix)
+{
+	struct dim_cq_moder cq_moder = tx_profile[cq_period_mode][ix];
+
+	cq_moder.cq_period_mode = cq_period_mode;
+	return cq_moder;
+}
+//EXPORT_SYMBOL(net_dim_get_tx_moderation);
+
+struct dim_cq_moder
+net_dim_get_def_tx_moderation(u8 cq_period_mode)
+{
+	u8 profile_ix = cq_period_mode == DIM_CQ_PERIOD_MODE_START_FROM_CQE ?
+			NET_DIM_DEF_PROFILE_CQE : NET_DIM_DEF_PROFILE_EQE;
+
+	return net_dim_get_tx_moderation(cq_period_mode, profile_ix);
+}
+//EXPORT_SYMBOL(net_dim_get_def_tx_moderation);
+
+static int net_dim_step(struct dim *dim)
+{
+	if (dim->tired == (NET_DIM_PARAMS_NUM_PROFILES * 2))
+		return DIM_TOO_TIRED;
+
+	switch (dim->tune_state) {
+	case DIM_PARKING_ON_TOP:
+	case DIM_PARKING_TIRED:
+		break;
+	case DIM_GOING_RIGHT:
+		if (dim->profile_ix == (NET_DIM_PARAMS_NUM_PROFILES - 1))
+			return DIM_ON_EDGE;
+		dim->profile_ix++;
+		dim->steps_right++;
+		break;
+	case DIM_GOING_LEFT:
+		if (dim->profile_ix == 0)
+			return DIM_ON_EDGE;
+		dim->profile_ix--;
+		dim->steps_left++;
+		break;
+	}
+
+	dim->tired++;
+	return DIM_STEPPED;
+}
+
+static void net_dim_exit_parking(struct dim *dim)
+{
+	dim->tune_state = dim->profile_ix ? DIM_GOING_LEFT : DIM_GOING_RIGHT;
+	net_dim_step(dim);
+}
+
+static int net_dim_stats_compare(struct dim_stats *curr,
+				 struct dim_stats *prev)
+{
+	if (!prev->bpms)
+		return curr->bpms ? DIM_STATS_BETTER : DIM_STATS_SAME;
+
+	if (IS_SIGNIFICANT_DIFF(curr->bpms, prev->bpms))
+		return (curr->bpms > prev->bpms) ? DIM_STATS_BETTER :
+						   DIM_STATS_WORSE;
+
+	if (!prev->ppms)
+		return curr->ppms ? DIM_STATS_BETTER :
+				    DIM_STATS_SAME;
+
+	if (IS_SIGNIFICANT_DIFF(curr->ppms, prev->ppms))
+		return (curr->ppms > prev->ppms) ? DIM_STATS_BETTER :
+						   DIM_STATS_WORSE;
+
+	if (!prev->epms)
+		return DIM_STATS_SAME;
+
+	if (IS_SIGNIFICANT_DIFF(curr->epms, prev->epms))
+		return (curr->epms < prev->epms) ? DIM_STATS_BETTER :
+						   DIM_STATS_WORSE;
+
+	return DIM_STATS_SAME;
+}
+
+static bool net_dim_decision(struct dim_stats *curr_stats, struct dim *dim)
+{
+	int prev_state = dim->tune_state;
+	int prev_ix = dim->profile_ix;
+	int stats_res;
+	int step_res;
+
+	switch (dim->tune_state) {
+	case DIM_PARKING_ON_TOP:
+		stats_res = net_dim_stats_compare(curr_stats,
+						  &dim->prev_stats);
+		if (stats_res != DIM_STATS_SAME)
+			net_dim_exit_parking(dim);
+		break;
+
+	case DIM_PARKING_TIRED:
+		dim->tired--;
+		if (!dim->tired)
+			net_dim_exit_parking(dim);
+		break;
+
+	case DIM_GOING_RIGHT:
+	case DIM_GOING_LEFT:
+		stats_res = net_dim_stats_compare(curr_stats,
+						  &dim->prev_stats);
+		if (stats_res != DIM_STATS_BETTER)
+			dim_turn(dim);
+
+		if (dim_on_top(dim)) {
+			dim_park_on_top(dim);
+			break;
+		}
+
+		step_res = net_dim_step(dim);
+		switch (step_res) {
+		case DIM_ON_EDGE:
+			dim_park_on_top(dim);
+			break;
+		case DIM_TOO_TIRED:
+			dim_park_tired(dim);
+			break;
+		}
+
+		break;
+	}
+
+	if (prev_state != DIM_PARKING_ON_TOP ||
+	    dim->tune_state != DIM_PARKING_ON_TOP)
+		dim->prev_stats = *curr_stats;
+
+	return dim->profile_ix != prev_ix;
+}
+
+void net_dim(struct dim *dim, struct dim_sample end_sample)
+{
+	struct dim_stats curr_stats;
+	u16 nevents;
+
+	switch (dim->state) {
+	case DIM_MEASURE_IN_PROGRESS:
+		nevents = BIT_GAP(BITS_PER_TYPE(u16),
+				  end_sample.event_ctr,
+				  dim->start_sample.event_ctr);
+		if (nevents < DIM_NEVENTS)
+			break;
+		dim_calc_stats(&dim->start_sample, &end_sample, &curr_stats);
+		if (net_dim_decision(&curr_stats, dim)) {
+			dim->state = DIM_APPLY_NEW_PROFILE;
+			schedule_work(&dim->work);
+			break;
+		}
+		/* fall through */
+	case DIM_START_MEASURE:
+		dim_update_sample(end_sample.event_ctr, end_sample.pkt_ctr,
+				  end_sample.byte_ctr, &dim->start_sample);
+		dim->state = DIM_MEASURE_IN_PROGRESS;
+		break;
+	case DIM_APPLY_NEW_PROFILE:
+		break;
+	}
+}
+//EXPORT_SYMBOL(net_dim);
+#endif
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/linux_ver.mk b/platform/pensando/dsc-drivers/src/drivers/linux/linux_ver.mk
new file mode 100644
index 000000000..c17125172
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/linux_ver.mk
@@ -0,0 +1,211 @@
+# SPDX-License-Identifier: GPL-2.0
+# Copyright(c) 1999 - 2019 Intel Corporation.
+
+# (thanks Intel!)
+#
+#####################
+# Helpful functions #
+#####################
+
+readlink = $(shell readlink -f ${1})
+
+# helper functions for converting kernel version to version codes
+get_kver = $(or $(word ${2},$(subst ., ,${1})),0)
+get_kvercode = $(shell [ "${1}" -ge 0 -a "${1}" -le 255 2>/dev/null ] && \
+                       [ "${2}" -ge 0 -a "${2}" -le 255 2>/dev/null ] && \
+                       [ "${3}" -ge 0 -a "${3}" -le 255 2>/dev/null ] && \
+                       printf %d $$(( ( ${1} << 16 ) + ( ${2} << 8 ) + ( ${3} ) )) )
+
+################
+# depmod Macro #
+################
+
+cmd_depmod = /sbin/depmod $(if ${SYSTEM_MAP_FILE},-e -F ${SYSTEM_MAP_FILE}) \
+                          $(if $(strip ${INSTALL_MOD_PATH}),-b ${INSTALL_MOD_PATH}) \
+                          -a ${KVER}
+
+################
+# dracut Macro #
+################
+
+cmd_initrd := $(shell \
+                if which dracut > /dev/null 2>&1 ; then \
+                    echo "dracut --force"; \
+                elif which update-initramfs > /dev/null 2>&1 ; then \
+                    echo "update-initramfs -u"; \
+                fi )
+
+#####################
+# Environment tests #
+#####################
+
+DRIVER_UPPERCASE := $(shell echo ${DRIVER} | tr "[:lower:]" "[:upper:]")
+
+ifeq (,${BUILD_KERNEL})
+BUILD_KERNEL=$(shell uname -r)
+endif
+
+# Kernel Search Path
+# All the places we look for kernel source
+KSP :=  /lib/modules/${BUILD_KERNEL}/build \
+	/lib/modules/${BUILD_KERNEL}/source \
+        /usr/src/linux-${BUILD_KERNEL} \
+        /usr/src/linux-$(shell echo ${BUILD_KERNEL} | sed 's/-.*//') \
+        /usr/src/kernel-headers-${BUILD_KERNEL} \
+        /usr/src/kernel-source-${BUILD_KERNEL} \
+        /usr/src/linux-$(shell echo ${BUILD_KERNEL} | sed 's/\([0-9]*\.[0-9]*\)\..*/\1/') \
+        /usr/src/linux \
+        /usr/src/kernels/${BUILD_KERNEL} \
+        /usr/src/kernels
+
+# prune the list down to only values that exist and have an include/linux
+# sub-directory. We can't use include/config because some older kernels don't
+# have this.
+test_dir = $(shell [ -e ${dir}/include/linux -o -e ${dir}/include/generated ] && echo ${dir})
+KSP := $(foreach dir, ${KSP}, ${test_dir})
+
+# we will use this first valid entry in the search path
+ifeq (,${KSRC})
+  KSRC := $(firstword ${KSP})
+endif
+
+ifeq (,${KSRC})
+  $(warning *** Kernel header files not in any of the expected locations.)
+  $(warning *** Install the appropriate kernel development package, e.g.)
+  $(error kernel-devel, for building kernel modules and try again)
+else
+ifeq (/lib/modules/${BUILD_KERNEL}/source, ${KSRC})
+  KOBJ :=  /lib/modules/${BUILD_KERNEL}/build
+else
+  KOBJ :=  ${KSRC}
+endif
+endif
+
+# Version file Search Path
+VSP :=  ${KOBJ}/include/generated/utsrelease.h \
+        ${KOBJ}/include/linux/utsrelease.h \
+        ${KOBJ}/include/linux/version.h \
+        ${KOBJ}/include/generated/uapi/linux/version.h \
+        /boot/vmlinuz.version.h
+
+# Config file Search Path
+CSP :=  ${KOBJ}/include/generated/autoconf.h \
+        ${KOBJ}/include/linux/autoconf.h \
+        /boot/vmlinuz.autoconf.h
+
+# System.map Search Path (for depmod)
+MSP := ${KSRC}/System.map \
+       /boot/System.map-${BUILD_KERNEL}
+
+# prune the lists down to only files that exist
+test_file = $(shell [ -f ${file} ] && echo ${file})
+VSP := $(foreach file, ${VSP}, ${test_file})
+CSP := $(foreach file, ${CSP}, ${test_file})
+MSP := $(foreach file, ${MSP}, ${test_file})
+
+
+# and use the first valid entry in the Search Paths
+ifeq (,${VERSION_FILE})
+  VERSION_FILE := $(firstword ${VSP})
+endif
+
+ifeq (,${CONFIG_FILE})
+  CONFIG_FILE := $(firstword ${CSP})
+endif
+
+ifeq (,${SYSTEM_MAP_FILE})
+  SYSTEM_MAP_FILE := $(firstword ${MSP})
+endif
+
+ifeq (,$(wildcard ${VERSION_FILE}))
+  $(error Linux kernel source not configured - missing version header file)
+endif
+
+ifeq (,$(wildcard ${CONFIG_FILE}))
+  $(error Linux kernel source not configured - missing autoconf.h)
+endif
+
+ifeq (,$(wildcard ${SYSTEM_MAP_FILE}))
+  $(warning Missing System.map file - depmod will not check for missing symbols)
+endif
+
+ifneq ($(words $(subst :, ,$(CURDIR))), 1)
+  $(error Sources directory '$(CURDIR)' cannot contain spaces nor colons. Rename directory or move sources to another path)
+endif
+
+#######################
+# Linux Version Setup #
+#######################
+
+# The following command line parameter is intended for development of KCOMPAT
+# against upstream kernels such as net-next which have broken or non-updated
+# version codes in their Makefile. They are intended for debugging and
+# development purpose only so that we can easily test new KCOMPAT early. If you
+# don't know what this means, you do not need to set this flag. There is no
+# arcane magic here.
+
+# Convert LINUX_VERSION into LINUX_VERSION_CODE
+ifneq (${LINUX_VERSION},)
+  LINUX_VERSION_CODE=$(call get_kvercode,$(call get_kver,${LINUX_VERSION},1),$(call get_kver,${LINUX_VERSION},2),$(call get_kver,${LINUX_VERSION},3))
+endif
+
+# Honor LINUX_VERSION_CODE
+ifneq (${LINUX_VERSION_CODE},)
+  $(warning Forcing target kernel to build with LINUX_VERSION_CODE of ${LINUX_VERSION_CODE}$(if ${LINUX_VERSION}, from LINUX_VERSION=${LINUX_VERSION}). Do this at your own risk.)
+  KVER_CODE := ${LINUX_VERSION_CODE}
+  EXTRA_CFLAGS += -DLINUX_VERSION_CODE=${LINUX_VERSION_CODE}
+endif
+
+# Determine SLE_LOCALVERSION_CODE for SuSE SLE >= 11 (needed by kcompat)
+# This assumes SuSE will continue setting CONFIG_LOCALVERSION to the string
+# appended to the stable kernel version on which their kernel is based with
+# additional versioning information (up to 3 numbers), a possible abbreviated
+# git SHA1 commit id and a kernel type, e.g. CONFIG_LOCALVERSION=-1.2.3-default
+# or CONFIG_LOCALVERSION=-999.gdeadbee-default
+ifeq (1,$(shell ${CC} -E -dM ${CONFIG_FILE} 2> /dev/null |\
+          grep -m 1 CONFIG_SUSE_KERNEL | awk '{ print $$3 }'))
+
+ifneq (10,$(shell ${CC} -E -dM ${CONFIG_FILE} 2> /dev/null |\
+	  grep -m 1 CONFIG_SLE_VERSION | awk '{ print $$3 }'))
+
+  LOCALVERSION := $(shell ${CC} -E -dM ${CONFIG_FILE} 2> /dev/null |\
+                    grep -m 1 CONFIG_LOCALVERSION | awk '{ print $$3 }' |\
+                    cut -d'-' -f2 | sed 's/\.g[[:xdigit:]]\{7\}//')
+  LOCALVER_A := $(shell echo ${LOCALVERSION} | cut -d'.' -f1)
+  LOCALVER_B := $(shell echo ${LOCALVERSION} | cut -s -d'.' -f2)
+  LOCALVER_C := $(shell echo ${LOCALVERSION} | cut -s -d'.' -f3)
+  SLE_LOCALVERSION_CODE := $(shell expr ${LOCALVER_A} \* 65536 + \
+                                        0${LOCALVER_B} \* 256 + 0${LOCALVER_C})
+  EXTRA_CFLAGS += -DSLE_LOCALVERSION_CODE=${SLE_LOCALVERSION_CODE}
+endif
+endif
+
+
+# get the kernel version - we use this to find the correct install path
+KVER := $(shell ${CC} ${EXTRA_CFLAGS} -E -dM ${VERSION_FILE} | grep UTS_RELEASE | \
+        awk '{ print $$3 }' | sed 's/\"//g')
+
+# assume source symlink is the same as build, otherwise adjust KOBJ
+ifneq (,$(wildcard /lib/modules/${KVER}/build))
+  ifneq (${KSRC},$(call readlink,/lib/modules/${KVER}/build))
+    KOBJ=/lib/modules/${KVER}/build
+  endif
+endif
+
+ifeq (${KVER_CODE},)
+  KVER_CODE := $(shell ${CC} ${EXTRA_CFLAGS} -E -dM ${VSP} 2> /dev/null |\
+                 grep -m 1 LINUX_VERSION_CODE | awk '{ print $$3 }' | sed 's/\"//g')
+endif
+
+# minimum_kver_check
+#
+# helper function to provide uniform output for different drivers to abort the
+# build based on kernel version check. Usage: "$(call minimum_kver_check,2,6,XX)".
+define _minimum_kver_check
+ifeq (0,$(shell [ ${KVER_CODE} -lt $(call get_kvercode,${1},${2},${3}) ]; echo "$$?"))
+  $$(warning *** Aborting the build.)
+  $$(error This driver is not supported on kernel versions older than ${1}.${2}.${3})
+endif
+endef
+minimum_kver_check = $(eval $(call _minimum_kver_check,${1},${2},${3}))
+
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/mdev/Makefile b/platform/pensando/dsc-drivers/src/drivers/linux/mdev/Makefile
new file mode 100644
index 000000000..22b423ce4
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/mdev/Makefile
@@ -0,0 +1,3 @@
+obj-$(CONFIG_MDEV) := mdev.o
+
+mdev-y := mdev_drv.o
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/mdev/mdev_drv.c b/platform/pensando/dsc-drivers/src/drivers/linux/mdev/mdev_drv.c
new file mode 100644
index 000000000..c3cb3baeb
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/mdev/mdev_drv.c
@@ -0,0 +1,670 @@
+// SPDX-License-Identifier: GPL-2.0
+/* Copyright (C) 2017-2021 Pensando Systems, Inc
+ * Copyright (C) 2008 Magnus Damm
+ *
+ * Based on uio_pdrv.c by Uwe Kleine-Koenig,
+ * Copyright (C) 2008 by Digi International Inc.
+ */
+
+#include <linux/module.h>
+#include <linux/version.h>
+#include <linux/netdevice.h>
+#include <linux/device.h>
+#include <linux/cdev.h>
+#include <linux/of.h>
+#include <linux/ioctl.h>
+#include <linux/of_platform.h>
+#include <linux/of_address.h>
+#include <linux/platform_device.h>
+#include <linux/uio_driver.h>
+#include <linux/spinlock.h>
+#include <linux/bitops.h>
+#include <linux/interrupt.h>
+#include <linux/stringify.h>
+#include <linux/slab.h>
+#include <linux/mm.h>
+#include "mdev_drv.h"
+
+#define DEVINFO_SIZE            0x1000
+#define DRVCFG_SIZE             0x80
+#define MSIXCFG_SIZE            0x40
+#define DOORBELL_PG_SIZE        0x8
+#define TSTAMP_SIZE             0x8
+#define MDEV_NODE_NAME_LEN      0x8
+
+typedef enum mdev_type {
+	MDEV_TYPE_MNET,
+	MDEV_TYPE_MCRYPT,
+} mdev_type_t;
+
+struct mdev_dev;
+
+typedef int (*platform_rsrc_func_t)(struct mdev_dev *,
+				    struct mdev_create_req *);
+typedef int (*attach_func_t)(struct platform_device *);
+typedef int (*detach_func_t)(struct platform_device *);
+
+struct mdev_dev {
+	struct device_node *of_node;
+	struct platform_device *pdev;
+	struct list_head node;
+	mdev_type_t type;
+	platform_rsrc_func_t platform_rsrc;
+	attach_func_t attach;
+	detach_func_t detach;
+};
+
+LIST_HEAD(mdev_list);
+
+static struct class *mdev_class;
+static dev_t mdev_dev;
+struct device *mdev_device;
+struct device *mnet_device;
+static unsigned int mdev_major;
+static struct cdev mdev_cdev;
+
+/* Yuck */
+extern int ionic_probe(struct platform_device *pfdev);
+extern int ionic_remove(struct platform_device *pfdev);
+
+struct uio_pdrv_genirq_platdata {
+	struct uio_info *uioinfo;
+	spinlock_t lock;
+	unsigned long flags;
+	struct platform_device *pdev;
+};
+
+/* Bits in uio_pdrv_genirq_platdata.flags */
+enum {
+	UIO_IRQ_DISABLED = 0,
+};
+
+static int uio_pdrv_genirq_open(struct uio_info *info, struct inode *inode)
+{
+	return 0;
+}
+
+static int uio_pdrv_genirq_release(struct uio_info *info, struct inode *inode)
+{
+	return 0;
+}
+
+static irqreturn_t uio_pdrv_genirq_handler(int irq, struct uio_info *dev_info)
+{
+	struct uio_pdrv_genirq_platdata *priv = dev_info->priv;
+
+	/* Just disable the interrupt in the interrupt controller, and
+	 * remember the state so we can allow user space to enable it later.
+	 */
+
+	spin_lock(&priv->lock);
+	if (!__test_and_set_bit(UIO_IRQ_DISABLED, &priv->flags))
+		disable_irq_nosync(irq);
+	spin_unlock(&priv->lock);
+
+	return IRQ_HANDLED;
+}
+
+static int uio_pdrv_genirq_irqcontrol(struct uio_info *dev_info, s32 irq_on)
+{
+	struct uio_pdrv_genirq_platdata *priv = dev_info->priv;
+	unsigned long flags;
+
+	/* Allow user space to enable and disable the interrupt
+	 * in the interrupt controller, but keep track of the
+	 * state to prevent per-irq depth damage.
+	 *
+	 * Serialize this operation to support multiple tasks and concurrency
+	 * with irq handler on SMP systems.
+	 */
+
+	spin_lock_irqsave(&priv->lock, flags);
+	if (irq_on) {
+		if (__test_and_clear_bit(UIO_IRQ_DISABLED, &priv->flags))
+			enable_irq(dev_info->irq);
+	} else {
+		if (!__test_and_set_bit(UIO_IRQ_DISABLED, &priv->flags))
+			disable_irq_nosync(dev_info->irq);
+	}
+	spin_unlock_irqrestore(&priv->lock, flags);
+
+	return 0;
+}
+
+static int mdev_uio_pdrv_genirq_probe(struct platform_device *pdev)
+{
+	struct uio_info *uioinfo = dev_get_platdata(&pdev->dev);
+	struct uio_pdrv_genirq_platdata *priv;
+	struct uio_mem *uiomem;
+	int ret = -EINVAL;
+	int i;
+
+	if (pdev->dev.of_node) {
+		/* alloc uioinfo for one device */
+		uioinfo = devm_kzalloc(&pdev->dev, sizeof(*uioinfo),
+				       GFP_KERNEL);
+		if (!uioinfo) {
+			dev_err(&pdev->dev, "unable to kmalloc\n");
+			return -ENOMEM;
+		}
+		uioinfo->name = pdev->name;
+		uioinfo->version = "devicetree";
+		/* Multiple IRQs are not supported */
+	}
+
+	if (!uioinfo || !uioinfo->name || !uioinfo->version) {
+		dev_err(&pdev->dev, "missing platform_data\n");
+		return ret;
+	}
+
+	if (uioinfo->handler || uioinfo->irqcontrol ||
+	    uioinfo->irq_flags & IRQF_SHARED) {
+		dev_err(&pdev->dev, "interrupt configuration error\n");
+		return ret;
+	}
+
+	priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
+	if (!priv) {
+		dev_err(&pdev->dev, "unable to kmalloc\n");
+		return -ENOMEM;
+	}
+
+	priv->uioinfo = uioinfo;
+	spin_lock_init(&priv->lock);
+	priv->flags = 0; /* interrupt is enabled to begin with */
+	priv->pdev = pdev;
+
+	if (!uioinfo->irq) {
+#if (KERNEL_VERSION(5, 10, 0) > LINUX_VERSION_CODE)
+		ret = platform_get_irq(pdev, 0);
+#else
+		ret = platform_get_irq_optional(pdev, 0);
+#endif
+		uioinfo->irq = ret;
+		if (ret == -ENXIO && pdev->dev.of_node)
+			uioinfo->irq = UIO_IRQ_NONE;
+		else if (ret < 0) {
+			dev_err(&pdev->dev, "failed to get IRQ: %d\n", ret);
+			return ret;
+		}
+	}
+
+	uiomem = &uioinfo->mem[0];
+
+	for (i = 0; i < pdev->num_resources; ++i) {
+		struct resource *r = &pdev->resource[i];
+
+		if (r->flags != IORESOURCE_MEM)
+			continue;
+
+		if (uiomem >= &uioinfo->mem[MAX_UIO_MAPS]) {
+			dev_warn(&pdev->dev, "device has more than "
+					__stringify(MAX_UIO_MAPS)
+					" I/O memory resources.\n");
+			break;
+		}
+
+		uiomem->memtype = UIO_MEM_PHYS;
+		uiomem->addr = r->start & PAGE_MASK;
+		uiomem->offs = (r->start & (PAGE_SIZE - 1));
+		uiomem->size = PAGE_ALIGN(resource_size(r));
+		dev_info(&pdev->dev, "resource %d size %llu", i, uiomem->size);
+		uiomem->name = r->name;
+		++uiomem;
+	}
+
+	while (uiomem < &uioinfo->mem[MAX_UIO_MAPS]) {
+		uiomem->size = 0;
+		++uiomem;
+	}
+
+	/* This driver requires no hardware specific kernel code to handle
+	 * interrupts. Instead, the interrupt handler simply disables the
+	 * interrupt in the interrupt controller. User space is responsible
+	 * for performing hardware specific acknowledge and re-enabling of
+	 * the interrupt in the interrupt controller.
+	 *
+	 * Interrupt sharing is not supported.
+	 */
+
+	uioinfo->handler = uio_pdrv_genirq_handler;
+	uioinfo->irqcontrol = uio_pdrv_genirq_irqcontrol;
+	uioinfo->open = uio_pdrv_genirq_open;
+	uioinfo->release = uio_pdrv_genirq_release;
+	uioinfo->priv = priv;
+
+	ret = uio_register_device(&pdev->dev, priv->uioinfo);
+	if (ret) {
+		dev_err(&pdev->dev, "unable to register uio device\n");
+		return ret;
+	}
+
+	platform_set_drvdata(pdev, priv);
+	return 0;
+}
+
+static int mdev_uio_pdrv_genirq_remove(struct platform_device *pdev)
+{
+	struct uio_pdrv_genirq_platdata *priv = platform_get_drvdata(pdev);
+
+	uio_unregister_device(priv->uioinfo);
+
+	priv->uioinfo->handler = NULL;
+	priv->uioinfo->irqcontrol = NULL;
+
+	return 0;
+}
+
+static int mdev_open(struct inode *inode, struct file *filep)
+{
+	return 0;
+}
+
+static int mdev_close(struct inode *i, struct file *f)
+{
+	return 0;
+}
+
+static int mdev_get_mnet_platform_rsrc(struct mdev_dev *mdev,
+				       struct mdev_create_req *req)
+{
+	struct resource mnet_resource[] = {
+		{ /*devinfo*/
+			.flags    = IORESOURCE_MEM,
+			.start    = req->regs_pa,
+			.end      = req->regs_pa + DEVINFO_SIZE - 1
+		}, {/*drvcfg/intr_ctrl*/
+			.flags    = IORESOURCE_MEM,
+			.start    = req->drvcfg_pa,
+			.end      = req->drvcfg_pa + DRVCFG_SIZE - 1
+		}, {/*msixcfg*/
+			.flags    = IORESOURCE_MEM,
+			.start    = req->msixcfg_pa,
+			.end      = req->msixcfg_pa + MSIXCFG_SIZE - 1
+		}, {/*doorbell*/
+			.flags    = IORESOURCE_MEM,
+			.start    = req->doorbell_pa,
+			.end      = req->doorbell_pa + DOORBELL_PG_SIZE - 1
+		}, {/*tstamp*/
+			.flags    = IORESOURCE_MEM,
+			.start    = req->tstamp_pa,
+			.end      = req->tstamp_pa + TSTAMP_SIZE - 1
+		}
+	};
+
+	/* add resource info */
+	return platform_device_add_resources(mdev->pdev, mnet_resource,
+					     ARRAY_SIZE(mnet_resource));
+}
+
+static int mdev_get_mcrypt_platform_rsrc(struct mdev_dev *mdev,
+					 struct mdev_create_req *req)
+{
+	struct resource mcrypt_resource[] = {
+		{ /*devinfo*/
+			.flags    = IORESOURCE_MEM,
+			.start    = req->regs_pa,
+			.end      = req->regs_pa + DEVINFO_SIZE - 1
+		}, {/*drvcfg/intr_ctrl*/
+			.flags    = IORESOURCE_MEM,
+			.start    = req->drvcfg_pa,
+			.end      = req->drvcfg_pa + DRVCFG_SIZE - 1
+		}, {/*msixcfg*/
+			.flags    = IORESOURCE_MEM,
+			.start    = req->msixcfg_pa,
+			.end      = req->msixcfg_pa + MSIXCFG_SIZE - 1
+		}, {/*doorbell*/
+			.flags    = IORESOURCE_MEM,
+			.start    = req->doorbell_pa,
+			.end      = req->doorbell_pa + DOORBELL_PG_SIZE - 1
+		}
+	};
+
+	/* add resource info */
+	return platform_device_add_resources(mdev->pdev, mcrypt_resource,
+					     ARRAY_SIZE(mcrypt_resource));
+}
+
+static int mdev_attach_one(struct mdev_dev *mdev,
+			   struct mdev_create_req *req)
+{
+	char *mdev_name = NULL;
+	int err = 0;
+
+	mdev->pdev = of_find_device_by_node(mdev->of_node);
+	if (!mdev->pdev) {
+		dev_err(mdev_device, "Can't find device for of_node %s\n",
+			mdev->of_node->name);
+		err = -ENXIO;
+		goto err;
+	}
+
+	err = (*mdev->platform_rsrc)(mdev, req);
+	if (err) {
+		dev_err(mdev_device, "Can't get platform resources\n");
+		err = -ENOSPC;
+		goto err_unset_pdev;
+	}
+
+	mdev_name = devm_kzalloc(mdev_device, MDEV_NAME_LEN + 1, GFP_KERNEL);
+	if (!mdev_name) {
+		dev_err(mdev_device, "Can't allocate memory for name\n");
+		err = -ENOMEM;
+		goto err_unset_pdev;
+	}
+
+	strncpy(mdev_name, req->name, MDEV_NAME_LEN);
+	mdev->pdev->name = mdev_name;
+
+	/* call probe with this platform_device */
+	err = (*mdev->attach)(mdev->pdev);
+	if (err) {
+		dev_err(mdev_device, "probe for %s failed: %d\n",
+			mdev->pdev->name, err);
+		goto err_free_name;
+	}
+
+	dev_info(mdev_device, "%s created successfully\n", mdev->pdev->name);
+	return 0;
+
+err_free_name:
+	//devm_kfree(mdev_device, mdev->pdev->name);
+	//mdev->pdev->name = NULL;
+err_unset_pdev:
+	mdev->pdev = NULL;
+err:
+	return err;
+}
+
+static int mdev_detach_one(struct mdev_dev *mdev)
+{
+	int err;
+
+	if (!mdev->pdev)
+		return 0;
+
+	dev_info(mdev_device, "Removing interface %s\n", mdev->pdev->name);
+	err = (*mdev->detach)(mdev->pdev);
+	if (err) {
+		dev_err(mdev_device, "Failed to remove %s\n",
+			mdev->pdev->name);
+		return err;
+	}
+
+	dev_info(mdev_device, "Successfully removed %s\n", mdev->pdev->name);
+
+	//devm_kfree(mdev_device, mdev->pdev->name);
+	mdev->pdev = NULL;
+
+	return 0;
+}
+
+static inline bool mdev_ioctl_matches(struct mdev_dev *mdev, uint32_t cmd)
+{
+	if (cmd == MDEV_CREATE_MNET && mdev->type == MDEV_TYPE_MNET)
+		return true;
+
+	if (cmd == MDEV_CREATE_MCRYPT && mdev->type == MDEV_TYPE_MCRYPT)
+		return true;
+
+	return false;
+}
+
+static long mdev_ioctl(struct file *f, unsigned int cmd, unsigned long arg)
+{
+	void __user *argp = (void __user *)arg;
+	char name[MDEV_NAME_LEN+1] = {0};
+	struct mdev_create_req req;
+	struct mdev_dev *mdev;
+	int ret = -EDQUOT;
+
+	switch (cmd) {
+	case MDEV_CREATE_MNET:
+	case MDEV_CREATE_MCRYPT:
+		if (copy_from_user(&req, argp, sizeof(req))) {
+			dev_err(mdev_device, "copy_from_user failed\n");
+			ret = -EFAULT;
+			break;
+		}
+		dev_info(mdev_device, "Creating %s %s\n",
+			 req.name, req.is_uio_dev ? "(UIO)" : "");
+
+		/* scan the list to see if it already exists,
+		 * and if so, quietly ignore this request
+		 */
+		list_for_each_entry(mdev, &mdev_list, node) {
+			if (mdev->pdev &&
+			    !strncmp(mdev->pdev->name, req.name, MDEV_NAME_LEN))
+				return 0;
+		}
+
+		/* find the first useful empty slot */
+		list_for_each_entry(mdev, &mdev_list, node) {
+			if (mdev->pdev || !mdev_ioctl_matches(mdev, cmd))
+				continue;
+
+			if (req.is_uio_dev) {
+				mdev->attach = mdev_uio_pdrv_genirq_probe;
+				mdev->detach = mdev_uio_pdrv_genirq_remove;
+			} else if (mdev->type == MDEV_TYPE_MNET) {
+				mdev->attach = ionic_probe;
+				mdev->detach = ionic_remove;
+			} else {
+				ret = -EINVAL;
+				break;
+			}
+
+			ret = mdev_attach_one(mdev, &req);
+			break;
+		}
+		break;
+
+	case MDEV_DESTROY:
+		if (copy_from_user(name, argp, MDEV_NAME_LEN)) {
+			dev_err(mdev_device, "copy_from_user failed\n");
+			ret = -EFAULT;
+			break;
+		}
+		dev_info(mdev_device, "Removing %s\n", name);
+		list_for_each_entry(mdev, &mdev_list, node) {
+			if (!mdev->pdev ||
+			    strncmp(mdev->pdev->name, name, MDEV_NAME_LEN))
+				continue;
+
+			ret = mdev_detach_one(mdev);
+			break;
+		}
+		break;
+
+	default:
+		dev_dbg(mdev_device, "Invalid ioctl %d\n", cmd);
+		ret = -EINVAL;
+		break;
+	}
+
+	return ret;
+}
+
+static int mdev_probe(struct platform_device *pfdev)
+{
+	return 0;
+}
+
+static int mdev_remove(struct platform_device *pfdev)
+{
+	struct mdev_dev *mdev, *tmp;
+
+	list_for_each_entry_safe(mdev, tmp, &mdev_list, node) {
+		(void)mdev_detach_one(mdev);
+		list_del(&mdev->node);
+		devm_kfree(mdev_device, mdev);
+	}
+
+	return 0;
+}
+
+static const struct of_device_id mdev_of_match[] = {
+	{.compatible = "pensando,mnet"},
+	{.compatible = "pensando,mcrypt"},
+	{/* end of table */}
+};
+
+static struct platform_driver mdev_driver = {
+	.probe = mdev_probe,
+	.remove = mdev_remove,
+	.driver = {
+		.name = "pensando-mdev",
+		.owner = THIS_MODULE,
+		.of_match_table = mdev_of_match,
+	},
+};
+
+static const struct file_operations mdev_fops = {
+	.owner = THIS_MODULE,
+	.open = mdev_open,
+	.release = mdev_close,
+	.unlocked_ioctl = mdev_ioctl,
+};
+
+static int mdev_init_dev_list(uint32_t max_dev, const char *pfx,
+			      platform_rsrc_func_t platform_rsrc)
+{
+	char of_node_name[MDEV_NODE_NAME_LEN + 1] = {0};
+	struct mdev_dev *mdev;
+	uint32_t i;
+
+	for (i = 0; i < max_dev; i++) {
+		mdev = devm_kzalloc(mdev_device, sizeof(*mdev), GFP_KERNEL);
+		if (!mdev)
+			return -ENOMEM;
+
+		snprintf(of_node_name, sizeof(of_node_name), "%s%u",
+			 pfx, i);
+		mdev->of_node = of_find_node_by_name(NULL, of_node_name);
+
+		/* skip any node not found in device tree */
+		if (mdev->of_node == NULL) {
+			devm_kfree(mdev_device, mdev);
+			continue;
+		}
+
+		dev_info(mdev_device, "Found node %s\n", mdev->of_node->name);
+		mdev->platform_rsrc = platform_rsrc;
+		list_add_tail(&mdev->node, &mdev_list);
+
+		// TODO: Should this put() happen when driver unloads?
+		of_node_put(mdev->of_node);
+	}
+
+	return 0;
+}
+
+static int __init mdev_init(void)
+{
+	struct mdev_dev *mdev, *tmp;
+	int ret;
+
+	mdev_class = class_create(THIS_MODULE, DRV_NAME);
+	if (IS_ERR(mdev_class)) {
+		ret = PTR_ERR(mdev_class);
+		goto error_out;
+	}
+
+	ret = alloc_chrdev_region(&mdev_dev, 0, NUM_MDEV_DEVICES,
+				  MDEV_CHAR_DEV_NAME);
+	if (ret < 0)
+		goto error_destroy_class;
+
+	mdev_major = MAJOR(mdev_dev);
+
+	pr_info("Pensando mdev driver: mdev_major = %d\n", mdev_major);
+
+	mdev_device = device_create(mdev_class, NULL,
+				    MKDEV(mdev_major, 0), NULL, DRV_NAME);
+	if (IS_ERR(mdev_device)) {
+		pr_err("Failed to create device %s", DRV_NAME);
+		ret = PTR_ERR(mdev_class);
+		goto error_unregister_chrdev;
+	}
+
+	dev_info(mdev_device, "device %s created\n", DRV_NAME);
+
+#ifndef MDEV_HACK
+	mnet_device = device_create(mdev_class, NULL,
+				    MKDEV(mdev_major, 1), NULL, DRV_NAME_ALT);
+	if (IS_ERR(mnet_device)) {
+		pr_err("Failed to create device %s", DRV_NAME_ALT);
+		ret = PTR_ERR(mdev_class);
+		goto error_destroy_mdev;
+	}
+
+	dev_info(mdev_device, "device %s created\n", DRV_NAME_ALT);
+#endif
+
+	cdev_init(&mdev_cdev, &mdev_fops);
+
+	mdev_cdev.owner = THIS_MODULE;
+
+	ret = cdev_add(&mdev_cdev, mdev_dev, NUM_MDEV_DEVICES);
+	if (ret) {
+		dev_err(mdev_device, "Error adding character device %s\n",
+			MDEV_CHAR_DEV_NAME);
+		goto error_destroy_mnet;
+	}
+
+	ret = mdev_init_dev_list(MAX_MNET_DEVICES, "mnet",
+				 mdev_get_mnet_platform_rsrc);
+	if (ret)
+		goto error_destroy_cdev;
+
+	ret = mdev_init_dev_list(MAX_MCRYPT_DEVICES, "mcrypt",
+				 mdev_get_mcrypt_platform_rsrc);
+	if (ret)
+		goto error_destroy_list;
+
+	ret = platform_driver_register(&mdev_driver);
+	if (ret)
+		goto error_destroy_list;
+
+	return 0;
+
+error_destroy_list:
+	list_for_each_entry_safe(mdev, tmp, &mdev_list, node) {
+		list_del(&mdev->node);
+		devm_kfree(mdev_device, mdev);
+	}
+error_destroy_cdev:
+	cdev_del(&mdev_cdev);
+error_destroy_mnet:
+#ifndef MDEV_HACK
+	device_destroy(mdev_class, MKDEV(mdev_major, 1));
+error_destroy_mdev:
+#endif
+	device_destroy(mdev_class, MKDEV(mdev_major, 0));
+error_unregister_chrdev:
+	unregister_chrdev_region(mdev_dev, NUM_MDEV_DEVICES);
+error_destroy_class:
+	class_destroy(mdev_class);
+error_out:
+	return ret;
+}
+
+static void __exit mdev_cleanup(void)
+{
+	platform_driver_unregister(&mdev_driver);
+	cdev_del(&mdev_cdev);
+#ifndef MDEV_HACK
+	device_destroy(mdev_class, MKDEV(mdev_major, 1));
+#endif
+	device_destroy(mdev_class, MKDEV(mdev_major, 0));
+	unregister_chrdev_region(mdev_dev, NUM_MDEV_DEVICES);
+	class_destroy(mdev_class);
+}
+
+module_init(mdev_init);
+module_exit(mdev_cleanup);
+
+MODULE_AUTHOR("Pensando Systems");
+MODULE_DESCRIPTION(DRV_DESCRIPTION);
+MODULE_LICENSE("GPL");
+MODULE_VERSION(DRV_VERSION);
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/mdev/mdev_drv.h b/platform/pensando/dsc-drivers/src/drivers/linux/mdev/mdev_drv.h
new file mode 100644
index 000000000..4d5c6e98b
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/mdev/mdev_drv.h
@@ -0,0 +1,47 @@
+#ifndef _MDEV_DRV_H
+#define _MDEV_DRV_H
+
+#include <linux/ioctl.h>
+
+#define DRV_VERSION         "0.1"
+#define DRV_DESCRIPTION     "Pensando mdev Driver"
+
+/* XXX There is a bug in older versions of the mnet driver - it fails to call
+ * cdev_del() on removal, leaving a landmine in the kobj_map. We can work around
+ * the issue by making sure this module loads at the same point in the map.
+ * Hence leaving the DRV_NAME as "mnet" and creating only a single device.
+ *
+ * Ideally this can be removed when we no longer support NDU from affected versions.
+ */
+#define MDEV_HACK
+
+#ifdef MDEV_HACK
+#define DRV_NAME            "mnet"
+#define MDEV_CHAR_DEV_NAME  "pen-mnet"
+#define NUM_MDEV_DEVICES    1		/* The parent device(s) */
+#else
+#define DRV_NAME            "mdev"
+#define DRV_NAME_ALT        "mnet"
+#define MDEV_CHAR_DEV_NAME  "pen-mdev"
+#define NUM_MDEV_DEVICES    2		/* The parent device(s) */
+#endif
+
+#define MAX_MNET_DEVICES    32
+#define MAX_MCRYPT_DEVICES  32
+#define MDEV_NAME_LEN       32
+
+struct mdev_create_req {
+	uint64_t regs_pa;
+	uint64_t drvcfg_pa;
+	uint64_t msixcfg_pa;
+	uint64_t doorbell_pa;
+	uint64_t tstamp_pa;
+	int is_uio_dev;
+	char name[MDEV_NAME_LEN];
+};
+
+#define MDEV_CREATE_MNET 	_IOWR('Q', 11, struct mdev_create_req)
+#define MDEV_DESTROY		_IOW('Q',  12, const char*)
+#define MDEV_CREATE_MCRYPT 	_IOWR('Q', 13, struct mdev_create_req)
+
+#endif /* _MDEV_DRV_H */
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/mnet_uio_pdrv_genirq/Makefile b/platform/pensando/dsc-drivers/src/drivers/linux/mnet_uio_pdrv_genirq/Makefile
new file mode 100644
index 000000000..94eaf0d28
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/mnet_uio_pdrv_genirq/Makefile
@@ -0,0 +1,3 @@
+obj-$(CONFIG_MNET_UIO_PDRV_GENIRQ) := mnet_uio_pdrv_genirq.o
+
+mnet_uio_pdrv_genirq-y := mnet_uio_pdrv_genirq_drv.o
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/mnet_uio_pdrv_genirq/mnet_uio_pdrv_genirq_drv.c b/platform/pensando/dsc-drivers/src/drivers/linux/mnet_uio_pdrv_genirq/mnet_uio_pdrv_genirq_drv.c
new file mode 100644
index 000000000..0b7ad249b
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/mnet_uio_pdrv_genirq/mnet_uio_pdrv_genirq_drv.c
@@ -0,0 +1,291 @@
+/*
+ * drivers/uio/uio_pdrv_genirq.c
+ *
+ * Userspace I/O platform driver with generic IRQ handling code.
+ *
+ * Copyright (C) 2008 Magnus Damm
+ *
+ * Based on uio_pdrv.c by Uwe Kleine-Koenig,
+ * Copyright (C) 2008 by Digi International Inc.
+ * All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published by
+ * the Free Software Foundation.
+ */
+
+#include <linux/platform_device.h>
+#include <linux/uio_driver.h>
+#include <linux/spinlock.h>
+#include <linux/bitops.h>
+#include <linux/module.h>
+#include <linux/interrupt.h>
+#include <linux/stringify.h>
+#include <linux/pm_runtime.h>
+#include <linux/slab.h>
+#include <linux/mm.h>
+
+#include <linux/of.h>
+#include <linux/of_platform.h>
+#include <linux/of_address.h>
+
+#define DRIVER_NAME "uio_pdrv_genirq"
+
+struct uio_pdrv_genirq_platdata {
+	struct uio_info *uioinfo;
+	spinlock_t lock;
+	unsigned long flags;
+	struct platform_device *pdev;
+};
+
+/* Bits in uio_pdrv_genirq_platdata.flags */
+enum {
+	UIO_IRQ_DISABLED = 0,
+};
+
+static int uio_pdrv_genirq_open(struct uio_info *info, struct inode *inode)
+{
+	// struct uio_pdrv_genirq_platdata *priv = info->priv;
+
+	/* Wait until the Runtime PM code has woken up the device */
+	//pm_runtime_get_sync(&priv->pdev->dev);
+	return 0;
+}
+
+static int uio_pdrv_genirq_release(struct uio_info *info, struct inode *inode)
+{
+	// struct uio_pdrv_genirq_platdata *priv = info->priv;
+
+	/* Tell the Runtime PM code that the device has become idle */
+	//pm_runtime_put_sync(&priv->pdev->dev);
+	return 0;
+}
+
+static irqreturn_t uio_pdrv_genirq_handler(int irq, struct uio_info *dev_info)
+{
+	struct uio_pdrv_genirq_platdata *priv = dev_info->priv;
+
+	/* Just disable the interrupt in the interrupt controller, and
+	 * remember the state so we can allow user space to enable it later.
+	 */
+
+	spin_lock(&priv->lock);
+	if (!__test_and_set_bit(UIO_IRQ_DISABLED, &priv->flags))
+		disable_irq_nosync(irq);
+	spin_unlock(&priv->lock);
+
+	return IRQ_HANDLED;
+}
+
+static int uio_pdrv_genirq_irqcontrol(struct uio_info *dev_info, s32 irq_on)
+{
+	struct uio_pdrv_genirq_platdata *priv = dev_info->priv;
+	unsigned long flags;
+
+	/* Allow user space to enable and disable the interrupt
+	 * in the interrupt controller, but keep track of the
+	 * state to prevent per-irq depth damage.
+	 *
+	 * Serialize this operation to support multiple tasks and concurrency
+	 * with irq handler on SMP systems.
+	 */
+
+	spin_lock_irqsave(&priv->lock, flags);
+	if (irq_on) {
+		if (__test_and_clear_bit(UIO_IRQ_DISABLED, &priv->flags))
+			enable_irq(dev_info->irq);
+	} else {
+		if (!__test_and_set_bit(UIO_IRQ_DISABLED, &priv->flags))
+			disable_irq_nosync(dev_info->irq);
+	}
+	spin_unlock_irqrestore(&priv->lock, flags);
+
+	return 0;
+}
+
+int mnet_uio_pdrv_genirq_probe(struct platform_device *pdev)
+{
+	struct uio_info *uioinfo = dev_get_platdata(&pdev->dev);
+	struct uio_pdrv_genirq_platdata *priv;
+	struct uio_mem *uiomem;
+	int ret = -EINVAL;
+	int i;
+
+	if (pdev->dev.of_node) {
+		/* alloc uioinfo for one device */
+		uioinfo = devm_kzalloc(&pdev->dev, sizeof(*uioinfo),
+				       GFP_KERNEL);
+		if (!uioinfo) {
+			dev_err(&pdev->dev, "unable to kmalloc\n");
+			return -ENOMEM;
+		}
+		uioinfo->name = pdev->name;
+		uioinfo->version = "devicetree";
+		/* Multiple IRQs are not supported */
+	}
+
+	if (!uioinfo || !uioinfo->name || !uioinfo->version) {
+		dev_err(&pdev->dev, "missing platform_data\n");
+		return ret;
+	}
+
+	if (uioinfo->handler || uioinfo->irqcontrol ||
+	    uioinfo->irq_flags & IRQF_SHARED) {
+		dev_err(&pdev->dev, "interrupt configuration error\n");
+		return ret;
+	}
+
+	priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
+	if (!priv) {
+		dev_err(&pdev->dev, "unable to kmalloc\n");
+		return -ENOMEM;
+	}
+
+	priv->uioinfo = uioinfo;
+	spin_lock_init(&priv->lock);
+	priv->flags = 0; /* interrupt is enabled to begin with */
+	priv->pdev = pdev;
+
+	if (!uioinfo->irq) {
+		ret = platform_get_irq(pdev, 0);
+		uioinfo->irq = ret;
+		if (ret == -ENXIO && pdev->dev.of_node)
+			uioinfo->irq = UIO_IRQ_NONE;
+		else if (ret < 0) {
+			dev_err(&pdev->dev, "failed to get IRQ\n");
+			return ret;
+		}
+	}
+
+	uiomem = &uioinfo->mem[0];
+
+	for (i = 0; i < pdev->num_resources; ++i) {
+		struct resource *r = &pdev->resource[i];
+
+		if (r->flags != IORESOURCE_MEM)
+			continue;
+
+		if (uiomem >= &uioinfo->mem[MAX_UIO_MAPS]) {
+			dev_warn(&pdev->dev, "device has more than "
+					__stringify(MAX_UIO_MAPS)
+					" I/O memory resources.\n");
+			break;
+		}
+
+		uiomem->memtype = UIO_MEM_PHYS;
+		uiomem->addr = r->start & PAGE_MASK;
+		uiomem->offs = (r->start & (PAGE_SIZE - 1));
+		uiomem->size = PAGE_ALIGN(resource_size(r));
+#if 1
+		dev_info(&pdev->dev, "resource %d size %llu", i, uiomem->size);
+		uiomem->name = r->name;
+#endif
+		++uiomem;
+	}
+
+	while (uiomem < &uioinfo->mem[MAX_UIO_MAPS]) {
+		uiomem->size = 0;
+		++uiomem;
+	}
+
+	/* This driver requires no hardware specific kernel code to handle
+	 * interrupts. Instead, the interrupt handler simply disables the
+	 * interrupt in the interrupt controller. User space is responsible
+	 * for performing hardware specific acknowledge and re-enabling of
+	 * the interrupt in the interrupt controller.
+	 *
+	 * Interrupt sharing is not supported.
+	 */
+
+	uioinfo->handler = uio_pdrv_genirq_handler;
+	uioinfo->irqcontrol = uio_pdrv_genirq_irqcontrol;
+	uioinfo->open = uio_pdrv_genirq_open;
+	uioinfo->release = uio_pdrv_genirq_release;
+	uioinfo->priv = priv;
+
+	/* Enable Runtime PM for this device:
+	 * The device starts in suspended state to allow the hardware to be
+	 * turned off by default. The Runtime PM bus code should power on the
+	 * hardware and enable clocks at open().
+	 */
+	//pm_runtime_enable(&pdev->dev);
+
+	ret = uio_register_device(&pdev->dev, priv->uioinfo);
+	if (ret) {
+		dev_err(&pdev->dev, "unable to register uio device\n");
+	//	pm_runtime_disable(&pdev->dev);
+		return ret;
+	}
+
+	platform_set_drvdata(pdev, priv);
+	return 0;
+}
+
+int mnet_uio_pdrv_genirq_remove(struct platform_device *pdev)
+{
+	struct uio_pdrv_genirq_platdata *priv = platform_get_drvdata(pdev);
+
+	uio_unregister_device(priv->uioinfo);
+	// pm_runtime_disable(&pdev->dev);
+
+	priv->uioinfo->handler = NULL;
+	priv->uioinfo->irqcontrol = NULL;
+
+	return 0;
+}
+
+#if 0
+static int uio_pdrv_genirq_runtime_nop(struct device *dev)
+{
+	/* Runtime PM callback shared between ->runtime_suspend()
+	 * and ->runtime_resume(). Simply returns success.
+	 *
+	 * In this driver pm_runtime_get_sync() and pm_runtime_put_sync()
+	 * are used at open() and release() time. This allows the
+	 * Runtime PM code to turn off power to the device while the
+	 * device is unused, ie before open() and after release().
+	 *
+	 * This Runtime PM callback does not need to save or restore
+	 * any registers since user space is responsbile for hardware
+	 * register reinitialization after open().
+	 */
+	return 0;
+}
+
+static const struct dev_pm_ops uio_pdrv_genirq_dev_pm_ops = {
+	.runtime_suspend = uio_pdrv_genirq_runtime_nop,
+	.runtime_resume = uio_pdrv_genirq_runtime_nop,
+};
+
+#ifdef CONFIG_OF
+static struct of_device_id uio_of_genirq_match[] = {
+	{ /* This is filled with module_parm */ },
+	{ /* Sentinel */ },
+};
+MODULE_DEVICE_TABLE(of, uio_of_genirq_match);
+module_param_string(of_id, uio_of_genirq_match[0].compatible, 128, 0);
+MODULE_PARM_DESC(of_id, "Openfirmware id of the device to be handled by uio");
+#endif
+
+static struct platform_driver uio_pdrv_genirq = {
+	.probe = uio_pdrv_genirq_probe,
+	.remove = uio_pdrv_genirq_remove,
+	.driver = {
+		.name = DRIVER_NAME,
+		.pm = &uio_pdrv_genirq_dev_pm_ops,
+		.of_match_table = of_match_ptr(uio_of_genirq_match),
+	},
+};
+
+EXPORT_SYMBOL(uio_pdrv_genirq_probe);
+EXPORT_SYMBOL(uio_pdrv_genirq_remove);
+module_platform_driver(uio_pdrv_genirq);
+#endif
+
+EXPORT_SYMBOL(mnet_uio_pdrv_genirq_probe);
+EXPORT_SYMBOL(mnet_uio_pdrv_genirq_remove);
+
+MODULE_AUTHOR("Magnus Damm");
+MODULE_DESCRIPTION("Userspace I/O platform driver with generic IRQ handling");
+MODULE_LICENSE("GPL v2");
+MODULE_ALIAS("platform:" DRIVER_NAME);
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/Makefile b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/Makefile
new file mode 100644
index 000000000..8c78f9ec0
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/Makefile
@@ -0,0 +1,42 @@
+#
+# usage: make KDIR=/path/to/kernel/build/area
+#
+MODNAME = pciesvc
+
+obj-m := $(MODNAME).o
+
+$(shell echo '#define PCIESVC_VERSION "'`date`'"' >version.h)
+
+kpci :=
+
+pciesvc-src := $(shell cd $(PWD) && ls pciesvc/src/*.c)
+pciesvc-obj := $(patsubst %.c,%.o,$(pciesvc-src))
+kpci += $(pciesvc-obj)
+
+INCLUDES = -I$(PWD) \
+	   -I$(PWD)/pciesvc/include \
+	   -I$(PWD)/pciesvc/src
+
+$(MODNAME)-y := $(kpci) kpcimgr_module.o kpcinterface.o kpci_entry.o \
+		kpci_kexec.o kpci_test.o pciesvc_end.o
+
+
+KDIR := /lib/modules/$(shell uname -r)/build
+PWD := $(shell pwd)
+UTS := X$(shell grep UTS_RELEASE $(KDIR)/include/generated/utsrelease.h)
+REL := $(shell echo $(UTS) | awk '{ print $$3 }' | sed -e 's/"//g')
+
+KCFLAGS = -fno-jump-tables -fno-stack-protector -fno-function-sections
+KCFLAGS += -fno-data-sections -fno-store-merging -mstrict-align
+KCFLAGS += $(INCLUDES) -DASIC_ELBA -DPCIESVC_SYSTEM_EXTERN
+KOPT = KCFLAGS="$(KCFLAGS)"
+
+all:
+	$(MAKE) -C $(KDIR) M=$(PWD) $(KOPT) modules
+	@mkdir -p $(REL)
+	@mv $(patsubst %.o,%.ko,$(obj-m)) $(REL)
+	@echo Checking for illegal relocations...
+	tools/reloc_check $(REL)/$(MODNAME).ko
+
+clean:
+	$(MAKE) -C $(KDIR) M=$(PWD) clean
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/README.md b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/README.md
new file mode 100644
index 000000000..858048fc7
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/README.md
@@ -0,0 +1,22 @@
+# pciesvc module
+
+## Overview
+
+This driver module is a companion to the kpcimgr driver.  This module
+provide support for servicing the pcie bus hardware "indirect" and
+"notify" transaction interrupts.  This driver runs on the Pensando ARM cpu.
+
+The core of the driver is built using sources from the pciesvc library
+with only a thin wrapper of code here to package the pciesvc core
+and register with the kpcimgr driver by calling "kpcimgr_module_register".
+
+## Building
+
+The Makefile in this directory can be used to build the module.
+If the kernel build support files are in /lib/modules then "make" will
+find them.  If kernel build support files are in another path then
+specify on the make command line with "make KDIR=/path/to/kernel".
+
+## History
+
+2022-12-02 - initial version
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/kpci_constants.h b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/kpci_constants.h
new file mode 100644
index 000000000..c0c01330e
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/kpci_constants.h
@@ -0,0 +1,42 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (c) 2021, 2022, Oracle and/or its affiliates.
+ */
+/*
+ * Layout of non-Linux Memory:
+ *  (base address provided in device tree and may change)
+ *  C500 0000  SHMEM segment (pciehw_shmem_t) [0x942440 bytes ~9.25Mb]
+ *  C5F0 0000  kpcimgr state (kstate_t)       [3 * 64k]
+ *  C5F3 0000  relocated code                 [Allow 256k]
+ *  C5F7 0000  available for stack when in nommu mode (64k)
+ *  C5F8 0000  top of stack
+ *  C5FF FFFF  end of 1M allotted range
+ */
+#define SHMEM_KSTATE_OFFSET       0xF00000
+#define SHMEM_KSTATE_SIZE          0x30000
+#define KSTATE_STACK_OFFSET        0x80000
+#define KSTATE_CODE_OFFSET      (SHMEM_KSTATE_OFFSET + SHMEM_KSTATE_SIZE)
+#define KSTATE_CODE_SIZE        (256 * 1024)
+#define KSTATE_MAGIC            0x1743BA1F
+
+/* size of trace data arrays */
+#define DATA_SIZE 100
+#define MSG_BUF_SIZE 32768
+
+/* uart and time related constants */
+#define PEN_UART 0x4800
+#define UART_THR 0
+#define UART_LSR 0x14
+#define DATA_READY 1
+#define OK_TO_WRITE 0x20
+#define UART_THRE_BIT 5
+
+/* phases */
+#define NOMMU 0
+#define NORMAL 1
+#define NUM_PHASES 2
+
+#define MSI_INDIRECT_IDX	0	/* indirect vector */
+#define MSI_NOTIFY_IDX		1	/* notify vector */
+#define MSI_NVECTORS		2
+
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/kpci_entry.S b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/kpci_entry.S
new file mode 100644
index 000000000..cd6e4f10e
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/kpci_entry.S
@@ -0,0 +1,364 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (c) 2021, 2022, Oracle and/or its affiliates.
+ */
+
+/*
+ *  Low Level Functions for kpcimgr (a.k.a. pciesvc glue layer)
+ *
+ *  Author: rob.gardner@oracle.com
+ */
+	
+#include <linux/linkage.h>
+#include <asm/assembler.h>
+#include <asm/sysreg.h>
+#include "kpci_constants.h"
+	
+/* Calling conventions for printl: */
+/* We use x12 as the branch link register and x13 as the first function arg */
+#define	return_addr 	x12
+#define arg0 		x13
+	
+/* defines for exception count and cpuid */
+#define ex_count	tpidr_el0
+#define cpuidreg	tpidr_el1
+	
+	/* macro to print a char given in x17 */
+	.macro putc0
+	mov	x16, PEN_UART
+	strb	w17, [x16, #UART_THR]
+11:	ldrb	w17, [x16, #UART_LSR]
+	tbz	x17, #UART_THRE_BIT, 11b
+	.endm
+
+	/* macro to print a given literal char */
+	.macro putc, c
+	mov	x17, \c
+	putc0
+	.endm
+
+	/* macro to print a literal string */
+	.macro print, msg
+	adr	x18, 77f
+76:	ldrb	w17, [x18], #1
+	cbz	x17, 78f
+	putc0
+	b	76b
+77:	.asciz "\msg"
+	.align	2
+78:
+	.endm
+	
+	/* macro to print a literal string with added cr/lf */
+	.macro println, msg
+	print	"\msg"
+	print	"\r\n"
+	.endm
+	
+	/* macro to print a system register */
+	.macro	printsr, reg
+	print	"\reg"
+	putc	':'
+	mrs	arg0, \reg
+	adr	return_addr, 99f
+	b	printl
+99:	
+	.endm
+	
+	/* print delineation marker */
+	.macro	delineate, c
+	mov	x15, #4
+4:	putc	\c
+	sub	x15, x15, 1
+	cbnz	x15, 4b
+	.endm
+	
+	/* macro to drop to exception level 1 */
+	.macro	drop_to_el1
+	mrs	x29, CurrentEL
+	asr	x29, x29, 2
+	tbnz	x29, #0, 88f	/* what? already at EL1 */
+	putc	'2'
+	
+	/* set up EL2 exception vectors */
+	adr	x29, xcpt_vectors
+	msr	vbar_el2, x29
+	isb
+
+	/* do the actual drop to EL1 */
+	putc	'#'
+	adr	x29, 88f
+	msr	elr_el2, x29
+	eret
+88:	
+	putc	'1'
+	msr	cpuidreg, x2	/* save cpu number */
+
+	/* save original address of spin table */
+	adr	x29, spin_table_start_addr
+	str	x0, [x29]
+	
+	/* limit number of times the exception handler runs */
+	mov	x16, 2
+	msr	ex_count, x16
+	putc	'!'
+
+	/* set up EL1 exception vectors */
+	adr	x29, xcpt_vectors
+	msr	vbar_el1, x29
+	isb
+	putc	'V'
+
+	/* unmask Serror */
+	msr	daifclr, #(1|4|8)
+	putc	'D'
+	.endm
+
+	/* macro to print the exception count value */
+	.macro	print_ex_count
+	putc	'('
+	print	"ex_count:"
+	mrs	x15, ex_count
+	add	x17, x15, '0'
+	putc0
+	putc	')'
+	.endm
+	
+	/* macro to print the cpu number */
+	.macro	print_cpuid
+	putc	'<'
+	print	"CPU"
+	mrs	x17, cpuidreg
+	add	x17, x17, '0'
+	putc0
+	putc	'>'
+	.endm
+
+	/* macro to print exception level */
+	.macro	print_el
+	putc	'['
+	print	"EL"
+	mrs	x17, CurrentEL
+	asr	x17, x17, 2
+	add	x17, x17, '0'
+	putc0
+	putc	']'
+	.endm
+	
+	
+	/*
+	 * This is the actual entry point for the first
+	 * cpu to be hijacked. After dropping to EL1,
+	 * we just need to set up a stack and we can
+	 * jump to C code to do the real work.
+	 */
+	SYM_CODE_START(__kpcimgr_cpu_holding_pen)
+
+	delineate '>'
+	drop_to_el1
+
+	/* load kstate base and set initial stack pointer */
+	adr	x0, kstate_paddr
+	ldr	x0, [x0]
+	add	x3, x0, KSTATE_STACK_OFFSET
+	mov	sp, x3
+	
+	/* jump to the real holding pen */
+	bl	kpcimgr_cpu_holding_pen
+
+	/* when C returns control here, we're done */
+	putc	'='
+	/* trap to EL2 and return to spin table */
+	mov	x0, #1
+	hvc	#0
+
+	/* we should never get here */
+	putc	'Q'
+	b	.exit
+	
+	SYM_CODE_END(__kpcimgr_cpu_holding_pen)
+
+	/*
+	 * This is the entry point for the second hijacked
+	 * cpu. Its job is to run the serial thread, which
+	 * can interact with a console user should the need
+	 * arise. Similar to the holding pen thread, we
+	 * drop to EL1, set up our own unique stack, and
+	 * jump to C.
+	 */
+	SYM_CODE_START(__kpcimgr_serial_thread)
+
+	delineate ']'
+	drop_to_el1
+	
+	putc	'\\'
+	adr	x1, kstate_paddr
+	ldr	x0, [x1]
+	add	x3, x0, KSTATE_STACK_OFFSET
+	sub	x3, x3, 0x2000	/* need a stack, different from other thread */
+	mov	sp, x3
+	bl	kpcimgr_serial_thread
+	putc	'+'
+	
+	/* trap to EL2 and return to spin table */
+	mov	x0, #1
+	hvc	#0
+
+	/* we should never get here */
+	b	.exit
+	SYM_CODE_END(__kpcimgr_serial_thread)
+	
+	/* C callable functions */
+	
+	/* long read_el(void) */
+	SYM_CODE_START(read_el)
+	mrs	x0, CurrentEL
+	lsr	x0, x0, #2
+	ret
+	SYM_CODE_END(read_el)
+	
+	/* int cpuid(void) */
+	SYM_CODE_START(cpuid)
+	mrs	x0, cpuidreg
+	ret
+	SYM_CODE_END(cpuid)
+
+	/* int release(void) */
+	SYM_CODE_START(release)
+	adr	x1, spin_table_start_addr
+	ldr	x1, [x1]
+	ldr	x0, [x1,#0x10]
+	ret
+	SYM_CODE_END(release)
+	
+/*
+ * printl, basically performs a printf("[%lx]")
+ *
+ * We use a few registers indiscriminately, but I am
+ * reasonably sure they are not used elsewhere
+ */
+#define shiftval 	x14
+#define nchars 		x15
+#define nibble 		x17
+	
+	SYM_CODE_START(printl)
+	putc	'['
+	mov	nchars, #0	/* number of characters actually printed */
+	mov	shiftval, #64
+.loop_top:
+	sub	shiftval, shiftval, 4
+	lsr	nibble, arg0, shiftval
+	and	nibble, nibble, #0xf
+
+	cbnz	nibble, .print		/* always print a non-zero nibble */
+	cbz	shiftval, .print	/* always print the last nibble, even if zero */
+	cbz	nchars, .loop_bottom	/* don't print leading zeros */
+	
+.print:	
+	add	nchars, nchars, 1
+	add	nibble, nibble, #'0'
+	cmp	nibble, #'0'+0xA
+	b.lt	1f
+	add	nibble, nibble, #-0xA-'0'+'A'
+1:	putc0
+.loop_bottom:
+	cbnz	shiftval, .loop_top
+	
+	putc	']'
+	br	return_addr
+	SYM_CODE_END(printl)
+
+	/*
+	 * Exception handler
+	 *
+	 * Mainly used to deal with Serror
+	 *
+	 * EL2 exceptions are fatal, but exceptions that arrive here
+	 * at EL1 cause some useful output to the console, and return.
+	 * The number of exceptions handled this way is limited to a few.
+	 * The Serror exception is an exception to this rule.
+	 */
+	SYM_CODE_START(exception_handler)
+	print_el
+	mrs	x29, CurrentEL
+	cmp	x29, #8
+	b.ne	1f
+
+	/* EL2 (fatal) */
+	printsr elr_el2
+	b	.exit
+
+	/* EL1 */
+1:	printsr	elr_el1
+	printsr far_el1
+	printsr	spsr_el1
+	printsr esr_el1
+	printsr sctlr_el1
+
+	print_ex_count
+
+	/* limit number of times we go through this code */
+	/* to avoid an infinite stream of exceptions */
+	mrs	x15, ex_count
+	cbz	x15, .exit
+	sub	x15, x15, 1
+	msr	ex_count, x15
+	
+	print	"\r\n"
+	eret
+
+	/*
+	 * Finish by jumping back to the original
+	 * spin table
+	 */
+.exit:	
+	print_el
+	print_cpuid
+	println	"done"
+	adr	x29, spin_table_start_addr
+	ldr	x0, [x29]
+	br	x0
+	
+	SYM_CODE_END(exception_handler)
+	
+	.macro	hyper, c
+	.align	7
+	putc	\c
+	b	.exit
+	.endm
+	
+	.macro	exlog, c
+	.align	7
+	putc	\c
+	print_el
+	b	exception_handler
+	.endm
+
+	.macro	serror, c
+	.align	7
+	putc	\c
+	mov	x16, #3
+	msr	ex_count, x16
+	b	exception_handler
+	.endm
+	
+
+	.align 3
+spin_table_start_addr:
+	.dword
+	
+	/* The actual Exception Vector table, used for both EL1 and EL2 */
+	.align 11
+xcpt_vectors:
+/* Current exception level with SP_EL0 */
+	exlog	'A'	/* Sync */	
+	exlog	'B'	/* IRQ/vIRQ */
+	exlog	'C'	/* FIQ/cFIQ */
+	exlog	'D'	/* SError/vSError */
+/* Current exception level with SP_ELx, x>0 */
+	hyper	'H'	/* Sync */
+	exlog	'I'	/* IRQ/vIRQ */
+	exlog	'Q'	/* FIQ/cFIQ */
+	serror	'S'	/* SError/vSError */
+
+	
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/kpci_kexec.c b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/kpci_kexec.c
new file mode 100644
index 000000000..0a3bd64b4
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/kpci_kexec.c
@@ -0,0 +1,263 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (c) 2021, 2022, Oracle and/or its affiliates.
+ */
+
+/*
+ * Kernel PCIE Manager - kexec related code
+ *
+ * Author: rob.gardner@oracle.com
+ */
+
+#include "kpcimgr_api.h"
+#include "pciesvc.h"
+#include "pciesvc_system.h"
+
+#define TICKS_PER_US 200
+#define TICKS_PER_MS  (1000*TICKS_PER_US)
+#define TICKS_PER_SEC (1000*TICKS_PER_MS)
+
+int holding_pen_idx;
+unsigned long kstate_paddr;
+kstate_t *kstate = NULL;
+
+void set_kstate(kstate_t *ks)
+{
+	kstate = ks;
+	kstate_paddr = ks->shmembase + SHMEM_KSTATE_OFFSET;
+}
+
+int virtual(void)
+{
+	return (unsigned long)kstate != kstate_paddr;
+}
+
+/* called in physical mode */
+void kpcimgr_nommu_poll(kstate_t *ks)
+{
+	kpcimgr_poll(ks, 0, NOMMU);
+	ks->trace_data[NOMMU][LAST_CALL_TIME] = read_sysreg(cntvct_el0);
+
+}
+
+void kpcimgr_cpu_holding_pen(kstate_t *ks)
+{
+	long npolls = 0;
+	int i;
+
+	set_kstate(ks);
+	ks->uart_addr = (void *) PEN_UART;
+	if (ks->debug)
+		_uart_write((void *) PEN_UART, 'C');
+	kpcimgr_init_poll(ks);
+
+	kpr_err("%s with EL%ld on cpu%d\n", __func__, read_el(), cpuid());
+
+	holding_pen_idx = 0;
+	kpr_err("going into poll loop...\n");
+
+	while (1) {
+		if (ks->debug)
+			_uart_write((void *) PEN_UART, 'S');
+
+		kpcimgr_nommu_poll(ks);
+		npolls++;
+
+		for (i=0; i<10; i++) {
+			if (release()) {
+				kpcimgr_nommu_poll(ks);
+				kpr_err("poll loop done, returning after %ld polls.\n", npolls);
+				return;
+			}
+			kp_udelay(1*1000); /* 1ms */
+		}
+	}
+}
+
+void serial_help(void)
+{
+	kpr_err("Commands:\n");
+	kpr_err(" c      Cpu id\n");
+	kpr_err(" e      Event queue\n");
+	kpr_err(" f      Show/set cfgval\n");
+	kpr_err(" h      Show help message\n");
+	kpr_err(" m      Memory ranges\n");
+	kpr_err(" q      Quit serial thread\n");
+	kpr_err(" r      Reboot\n");
+	kpr_err(" s      Serror trigger\n");
+	kpr_err(" t      Report Stats\n");
+}
+
+void set_cfgval(kstate_t *ks)
+{
+	int cfgval = 0, modify = 0;
+	char c;
+
+	kpr_err("New cfgval: ");
+	while (1) {
+		while (uart_read(ks, &c) == 0);
+		uart_write(ks, c);
+		if (c >= '0' && c <= '9')
+			cfgval = (cfgval << 4) + (c - '0');
+		else if (c >= 'a' && c <= 'f')
+			cfgval = (cfgval << 4) + (10 + c - 'a');
+		else if (c >= 'A' && c <= 'F')
+			cfgval = (cfgval << 4) + (10 + c - 'A');
+		else
+			break;
+		modify = 1;
+	}
+	if (modify) {
+		kpr_err("\r\ncfgval set to %x\n", cfgval);
+		ks->cfgval = cfgval;
+	}
+	else
+		kpr_err("\r\ncfgval not modified\n");
+}
+
+#define WDOG_REGS (void *)0x1400
+#define WDOG_CONTROL_REG_OFFSET             0x00
+#define WDOG_CONTROL_REG_WDT_EN_MASK        0x01
+#define WDOG_CONTROL_REG_RESP_MODE_MASK     0x02
+void watchdog_reboot(void)
+{
+        u32 val = readl(WDOG_REGS + WDOG_CONTROL_REG_OFFSET);
+
+	kpr_err("Rebooting...\n");
+        /* Disable interrupt mode; always perform system reset. */
+        val &= ~WDOG_CONTROL_REG_RESP_MODE_MASK;
+        /* Enable watchdog. */
+        val |= WDOG_CONTROL_REG_WDT_EN_MASK;
+        writel(val, WDOG_REGS + WDOG_CONTROL_REG_OFFSET);
+}
+
+
+void serial_input(char c)
+{
+	kstate_t *ks = get_kstate();
+	int n;
+
+	switch (c) {
+	case 'c': case 'C':
+		kpr_err("serial thread running on cpu#%d\n", cpuid());
+		break;
+	case 'e': case 'E':
+		n = ks->evq_head - ks->evq_tail;
+		if (n < 0)
+			n += EVENT_QUEUE_LENGTH;
+		kpr_err("event queue contains %d records\n", n);
+		break;
+	case 'f': case 'F':
+		kpr_err("cfgval = %x\n", ks->cfgval);
+		set_cfgval(ks);
+		break;
+	case '?':
+	case 'h':
+	case 'H':
+		serial_help();
+		break;
+	case 'm': case 'M':
+		for (n=0; n<ks->nranges; n++) {
+			struct mem_range_t *mr = &ks->mem_ranges[n];
+			kpr_err("range [%lx..%lx] mapped at %lx\n",
+				mr->base, mr->end, mr->vaddr);
+		}
+		break;
+	case 'q': case 'Q':
+		__asm__("hvc #0;" ::);
+		break;
+	case 'r': case 'R':
+		watchdog_reboot();
+		break;
+	case 's':
+	case 'S':
+		trigger_serr(0x100);
+		break;
+	case 't':
+	case 'T':
+		kpcimgr_report_stats(ks, NOMMU, 1, 1);
+		break;
+	default:
+		kpr_err("'%c' unknown command\n", c);
+		break;
+	}
+}
+
+
+void kpcimgr_serial_thread(kstate_t *ks)
+{
+	unsigned long start = read_sysreg(cntvct_el0);
+	int warning_printed = 0;
+
+	ks->uart_addr = (void *) PEN_UART;
+	set_kstate(ks);
+
+	kpr_err("%s el%d on cpu%d\n", __func__, read_el(), cpuid());
+	while (!release()) {
+		char c;
+		if (uart_read(ks, &c))
+			serial_input(c);
+		if (!warning_printed && time_elapsed(start, 2*TICKS_PER_SEC)) {
+			kpr_err("Serial thread running for >2s, 'H' for help\n");
+			warning_printed = 1;
+		}
+	}
+	kpr_err("%s done\n", __func__);
+}
+
+
+/*
+ * Called from kpcimgr when the secondary CPUs are being taken
+ * offline.  We return a physical address which the secondary CPU will
+ * jump to.  The global 'holding_pen_idx' keeps a count of how many
+ * times we've been called so that we can return the appropriate
+ * function pointer for a given cpu. It would seem that there are some
+ * very dangerous race conditions here:
+ *
+ * 1. Can't this function be called concurrently on multiple CPUs?
+ *    No, it cannot, because we are called by kpcimgr_get_entry(),
+ *    which protects against this with a spinlock.
+ *
+ * 2. holding_pen_idx is reset to zero in kpcimgr_cpu_holding_pen(),
+ *    and can't that execute on CPU1 while this function executes
+ *    concurrently on CPU2?
+ *    Good question! The answer is yes, they can execute
+ *    simultaneously, but it is not a race because they will operate
+ *    on different memory.  When this function is called, it is in
+ *    virtual mode, with the code and data in normal module_alloc'ed
+ *    memory. But when kpcimgr_cpu_holding_pen() executes, it is
+ *    running in physical mode from a copy of the code and data that
+ *    has been relocated to persistent memory. Thus, references to
+ *    'holding_pen_idx' in these two functions refer to different
+ *    memory locations.
+ */
+
+unsigned long kpcimgr_get_holding_pen(unsigned long old_entry, unsigned int cpu)
+{
+	kstate_t *ks = get_kstate();
+	unsigned long offset, entry;
+	extern void __kpcimgr_cpu_holding_pen(void);
+	extern void __kpcimgr_serial_thread(void);
+
+	if (ks == NULL || ks->valid != KSTATE_MAGIC || !ks->running || !ks->have_persistent_mem)
+		return old_entry;
+
+	if (cpu == 0)
+		return old_entry;
+
+	switch (holding_pen_idx) {
+	case 0:
+		offset = (unsigned long) __kpcimgr_cpu_holding_pen - (unsigned long) ks->code_base;
+		break;
+	case 1:
+		offset = (unsigned long) __kpcimgr_serial_thread - (unsigned long) ks->code_base;
+		break;
+	default:
+		return old_entry;
+	}
+	holding_pen_idx++;
+
+	entry = ks->shmembase + KSTATE_CODE_OFFSET + offset;
+	kpr_err("%s(cpu%d) entry = %lx\n", __func__, cpu, entry);
+	return entry;
+}
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/kpci_test.c b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/kpci_test.c
new file mode 100644
index 000000000..75a582ca8
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/kpci_test.c
@@ -0,0 +1,201 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (c) 2021, 2022, Oracle and/or its affiliates.
+ */
+
+/*
+ * Kernel PCIE Manager - test/serial/debug code
+ *
+ * Author: rob.gardner@oracle.com
+ */
+
+#include "kpcimgr_api.h"
+#include "pciesvc.h"
+#include "pciesvc_system.h"
+
+#define TICKS_PER_US 200
+#define TICKS_PER_MS  (1000*TICKS_PER_US)
+#define TICKS_PER_SEC (1000*TICKS_PER_MS)
+
+/*
+ * kp_udelay
+ *
+ * Like kernel udelay(), but avoids an external call.
+ */
+void kp_udelay(unsigned long us)
+{
+	unsigned long last = read_sysreg(cntvct_el0);
+	unsigned long now, elapsed = 0;
+	unsigned long limit = us * TICKS_PER_US;
+
+	while (elapsed < limit) {
+		now = read_sysreg(cntvct_el0);
+		if (now > last)
+			elapsed += now - last;
+		last = now;
+	}
+}
+
+int time_elapsed(unsigned long start, unsigned long elapsed)
+{
+	unsigned long now = read_sysreg(cntvct_el0);
+
+	if (now > start + elapsed)
+		return 1;
+
+	if (now < start && now > elapsed) /* good enough */
+		return 1;
+
+	return 0;
+}
+
+/*
+ * Very simple global spin lock:
+ * Not very well throught out or tested since it is
+ * not used for any important purpose. It is only
+ * used by the serial puts() function.
+ */
+unsigned long lock_table[16];
+
+void kp_lock(void)
+{
+	int i, cpu = cpuid();
+	unsigned long sum;
+
+	while (1) {
+		lock_table[cpu] = 1;
+		__asm__ __volatile__("dsb sy;" ::);
+
+		for (sum=0, i=0; i<16; i++)
+			sum += lock_table[i];
+
+		if (sum == 1)	/* acquired lock */
+			return;
+
+		lock_table[cpu] = 0;
+		__asm__ __volatile__("dsb sy;" ::);
+		kp_udelay(1000+cpu*1000); /* a few ms */
+	}
+}
+
+void kp_unlock(void)
+{
+	lock_table[cpuid()] = 0;
+	__asm__ __volatile__("dsb sy;" ::);
+}
+
+/*
+ * Mini serial output driver
+ *
+ * We want to avoid a potential infinite loop if something
+ * goes wrong with the uart, so let's wait no more than 1ms
+ * for the transmitter shift register to become empty. The
+ * baud rate is 115200, so theoretically, the shift register
+ * should never take longer than 100us to become empty.
+ */
+void _uart_write(unsigned char *reg, char c)
+{
+	int i;
+
+	for (i=0; i<10; i++) {
+		if (*(reg + UART_LSR) & OK_TO_WRITE)
+			break;
+		kp_udelay(100);
+	}
+	*(reg + UART_THR) = c;
+	for (i=0; i<10; i++) {
+		if (*(reg + UART_LSR) & OK_TO_WRITE)
+			break;
+		kp_udelay(100);
+	}
+}
+
+void uart_write(kstate_t *ks, char c)
+{
+	_uart_write(ks->uart_addr, c);
+}
+
+int uart_read(kstate_t *ks, char *c)
+{
+	volatile unsigned char *reg = ks->uart_addr;
+	if (*(reg + UART_LSR) & DATA_READY) {
+		*c = *(reg + UART_THR);
+		return 1;
+	}
+	return 0;
+}
+
+void uart_write_debug(kstate_t *ks, char c)
+{
+	if (ks->debug)
+		_uart_write(ks->uart_addr, c);
+}
+
+void kdbg_puts(const char *s)
+{
+	kstate_t *ks = get_kstate();
+
+	if (ks->uart_addr == NULL)
+		return;
+
+	kp_lock();
+	for ( ; *s; s++) {
+		uart_write(ks, *s);
+		if (*s == '\n')
+			uart_write(ks, '\r');
+	}
+	kp_unlock();
+}
+
+/*
+ * For testing, this causes an SERR to be generated
+ */
+void trigger_serr(int val)
+{
+	const uint64_t good_bad_pa = 0x20141000;
+	uint32_t dummy;
+
+	kdbg_puts("kpcimgr: triggering serr\n");
+	if (val == 0x100)
+		dummy = pciesvc_reg_rd32(good_bad_pa);
+	else
+		pciesvc_pciepreg_rd32(good_bad_pa, &dummy);
+}
+
+void kpcimgr_report_stats(kstate_t *ks, int phase, int always, int rightnow)
+{
+	pciehw_shmem_t *pshmem = pciesvc_shmem_get();
+	unsigned long now = read_sysreg(cntvct_el0);
+	uint64_t cfgrd, cfgwr, memrd, memwr;
+	static unsigned long last_call = 0;
+	pciemgr_stats_t *s;
+	pciehw_port_t *p;
+
+	if (!always && (now - last_call) < 5 * TICKS_PER_SEC)
+		return;
+
+	p = &pshmem->port[0];
+	s = &p->stats;
+	cfgrd = s->ind_cfgrd - ks->ind_cfgrd;
+	cfgwr = s->ind_cfgwr - ks->ind_cfgwr;
+	memrd = s->ind_memrd - ks->ind_memrd;
+	memwr = s->ind_memwr - ks->ind_memwr;
+
+	if (!always && (cfgrd + cfgwr + memrd + memwr) == 0)
+		return;
+
+	if (rightnow || ks->debug) {
+		kpr_err("KPCIMGR: called %d times during %s phase: %lld cfgrd, %lld cfgwr, %lld memrd, %lld memwr\n",
+			ks->ncalls, (phase == NOMMU) ? "nommu" : "normal",
+			cfgrd, cfgwr, memrd, memwr);
+		kpr_err("         %d ind_intr, %d not_intr, %d event_intr\n", ks->ind_intr, ks->not_intr, ks->event_intr);
+	}
+
+	ks->ind_cfgrd = s->ind_cfgrd;
+	ks->ind_cfgwr = s->ind_cfgwr;
+	ks->ind_memrd = s->ind_memrd;
+	ks->ind_memwr = s->ind_memwr;
+
+	last_call = read_sysreg(cntvct_el0);
+}
+
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/kpcimgr_api.h b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/kpcimgr_api.h
new file mode 100644
index 000000000..8bfcda1cc
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/kpcimgr_api.h
@@ -0,0 +1,172 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (c) 2021, 2022, Oracle and/or its affiliates.
+ */
+#ifndef __KPCIMGR_API_H__
+#define __KPCIMGR_API_H__
+
+#ifdef __KERNEL__
+#include <linux/miscdevice.h>
+#include <linux/io.h>
+#include <linux/module.h>
+#include <linux/cdev.h>
+#include <linux/reboot.h>
+#include <linux/poll.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_platform.h>
+#include <linux/interrupt.h>
+#include <linux/msi.h>
+#include <linux/mm.h>
+#include <linux/kallsyms.h>
+#include <linux/moduleloader.h>
+#include <linux/set_memory.h>
+#include <asm/insn.h>
+#endif
+
+#include "kpci_constants.h"
+
+#define K_ENTRY_INIT_INTR 0
+#define K_ENTRY_INIT_POLL 1
+#define K_ENTRY_SHUT 2
+#define K_ENTRY_POLL 3
+#define K_ENTRY_HOLDING_PEN 4
+#define K_ENTRY_INDIRECT_INTR 5
+#define K_ENTRY_NOTIFY_INTR 6
+#define K_ENTRY_INIT_FN 7
+#define K_ENTRY_CMD_READ 8
+#define K_ENTRY_CMD_WRITE 9
+#define K_ENTRY_GET_VERSION 10
+#define K_NUM_ENTRIES 16
+
+struct kpcimgr_entry_points_t {
+	int expected_mgr_version;
+	int lib_version_major;
+	int lib_version_minor;
+	void *code_end;
+	void *entry_point[K_NUM_ENTRIES];
+};
+
+/* upcalls */
+#define WAKE_UP_EVENT_QUEUE 1
+#define PRINT_LOG_MSG 2
+#define PREG_READ 3
+
+/* event queue sizing */
+#define EVENT_QUEUE_LENGTH 1024
+#define EVENT_SIZE 128
+
+/* max command size for sysfs cmd node */
+#define CMD_SIZE 4096
+
+/* max number of memory ranges from device tree */
+#define NUM_MEMRANGES 32
+
+struct kpcimgr_state_t {
+	/* essential state */
+	int valid;
+	int debug;
+	int running;
+	int active_port;
+	int have_persistent_mem;
+	int lib_version_major;
+	int lib_version_minor;
+
+	/* timestamps and general trace data */
+	long kexec_time;
+	long driver_start_time;
+	unsigned long trace_data[NUM_PHASES][DATA_SIZE];
+
+	/* virtual addresses */
+	void *uart_addr;
+	void *code_base;
+	void *persistent_base;
+	void *upcall;
+	void *pfdev;
+	void *shmemva;
+
+	unsigned long shmembase, shmem_size, code_size;
+	struct mem_range_t {
+		unsigned long base, end;
+		void *vaddr;
+	} mem_ranges[NUM_MEMRANGES];
+	int nranges;
+	int hwmem_idx;
+
+	/* interrupt vectors */
+	struct msi_info {
+		unsigned long msgaddr;
+		unsigned int msgdata;
+	} msi[MSI_NVECTORS];
+
+	/* stats for work done */
+	int ind_cfgrd, ind_cfgwr;
+	int ind_memrd, ind_memwr;
+	int ncalls;
+	int ind_intr, not_intr, event_intr;
+
+	int unused1[7];	/* was version=2 code_offsets[], keep evq* compat */
+
+	/* Event queue handling */
+	int evq_head, evq_tail;
+	char evq[EVENT_QUEUE_LENGTH][EVENT_SIZE];
+
+	/* debugging */
+	void *mod;
+	int msg_idx;
+	int cfgval;
+
+	/* offsets into relocated library code */
+	int code_offsets[K_NUM_ENTRIES];
+};
+
+typedef struct kpcimgr_state_t kstate_t;
+_Static_assert(sizeof(kstate_t) < SHMEM_KSTATE_SIZE,
+	       "kstate size insufficient");
+
+/* trace_data[] elements */
+#define FIRST_CALL_TIME 0
+#define FIRST_SEQNUM 1
+#define LAST_SEQNUM 2
+#define TAG 3
+#define PA_BAD_CNT 4
+#define NUM_CHECKS 5
+#define NUM_CALLS 6
+#define NUM_PENDINGS 7
+#define LAST_CALL_TIME 8
+#define EARLY_POLL 9
+#define MAX_DATA 10
+
+#define KPCIMGR_DEV "/dev/kpcimgr"
+#define KPCIMGR_NAME "kpcimgr"
+#define PFX KPCIMGR_NAME ": "
+#define KPCIMGR_KERNEL_VERSION 3
+
+#ifdef __KERNEL__
+int kpcimgr_module_register(struct module *mod,
+			    struct kpcimgr_entry_points_t *ep, int relocate);
+void kpcimgr_start_running(void);
+void kpcimgr_stop_running(void);
+void kpcimgr_sysfs_setup(struct platform_device *pfdev);
+void *kpci_memcpy(void *dst, const void *src, size_t n);
+void wake_up_event_queue(void);
+int aarch64_insn_read(void *addr, u32 *insnp);
+extern spinlock_t kpcimgr_lock;
+
+#define reset_stats(k) \
+	kpci_memset((void *)&(k)->trace_data[0][0], 0, sizeof((k)->trace_data))
+
+static inline void set_init_state(kstate_t *k)
+{
+	k->trace_data[NORMAL][FIRST_CALL_TIME] = 0;
+	k->ncalls = 0;
+}
+
+static inline kstate_t *get_kstate(void)
+{
+	extern kstate_t *kstate;
+	return kstate;
+}
+#endif
+
+#endif
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/kpcimgr_module.c b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/kpcimgr_module.c
new file mode 100644
index 000000000..ee7bc49b0
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/kpcimgr_module.c
@@ -0,0 +1,90 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2021, 2022, Oracle and/or its affiliates.
+ */
+
+/*
+ * PCIESVC Library Loader
+ *
+ * Author: rob.gardner@oracle.com
+ */
+
+#include <linux/init.h>
+#include <linux/device.h>
+#include <linux/module.h>
+#include <linux/ctype.h>
+
+MODULE_LICENSE("GPL");
+
+#include "kpcimgr_api.h"
+#include "version.h"
+
+static int relocate = 0;
+#ifdef DEBUG_KPCIMGR
+module_param(relocate, int, 0600);
+MODULE_PARM_DESC(relocate, "specifies whether or not to relocate module");
+#endif
+
+extern char pciesvc_end;
+extern void kpcimgr_init_intr(void *);
+extern void kpcimgr_init_fn(void *);
+extern void kpcimgr_version_fn(char **);
+extern void kpcimgr_init_poll(void *);
+extern void pciesvc_shut(int);
+extern void kpcimgr_poll(kstate_t *, int, int);
+extern unsigned long kpcimgr_get_holding_pen(unsigned long, unsigned int);
+extern int kpcimgr_ind_intr(void *, int);
+extern int kpcimgr_not_intr(void *, int);
+extern void kpcimgr_undefined_entry(void);
+extern int pciesvc_sysfs_cmd_read(void *, char *, int *);
+extern int pciesvc_sysfs_cmd_write(void *, char *, size_t, int *);
+
+extern int pciesvc_version_major;
+extern int pciesvc_version_minor;
+
+static int __init pciesvc_dev_init(void)
+{
+	struct kpcimgr_entry_points_t ep;
+	int i, ret = 0;
+
+	/* initialize entry_points struct via executable code so that
+	 * PC relative relocations are generated */
+	ep.expected_mgr_version = 3;
+	ep.lib_version_major = pciesvc_version_major;
+	ep.lib_version_minor = pciesvc_version_minor;
+	ep.code_end = &pciesvc_end;
+
+	for (i=0; i<K_NUM_ENTRIES; i++)
+		ep.entry_point[i] = kpcimgr_undefined_entry;
+
+	ep.entry_point[K_ENTRY_INIT_INTR] = kpcimgr_init_intr;
+	ep.entry_point[K_ENTRY_INIT_POLL] = kpcimgr_init_poll;
+	ep.entry_point[K_ENTRY_SHUT] = pciesvc_shut;
+	ep.entry_point[K_ENTRY_POLL] = kpcimgr_poll;
+	ep.entry_point[K_ENTRY_HOLDING_PEN] = kpcimgr_get_holding_pen;
+	ep.entry_point[K_ENTRY_INDIRECT_INTR] = kpcimgr_ind_intr;
+	ep.entry_point[K_ENTRY_NOTIFY_INTR] = kpcimgr_not_intr;
+	ep.entry_point[K_ENTRY_INIT_FN] = kpcimgr_init_fn;
+	ep.entry_point[K_ENTRY_CMD_READ] = pciesvc_sysfs_cmd_read;
+	ep.entry_point[K_ENTRY_CMD_WRITE] = pciesvc_sysfs_cmd_write;
+	ep.entry_point[K_ENTRY_GET_VERSION] = kpcimgr_version_fn;
+
+	/* call to Pensando SOC driver to copy the code to persistent memory */
+	ret = kpcimgr_module_register(THIS_MODULE, &ep, relocate);
+#ifdef PEN_COMPAT_V2
+	if (ret < 0) {
+		/* attempt compat registration, some entry_point[] unused */
+		ep.expected_mgr_version = 2;
+		ret = kpcimgr_module_register(THIS_MODULE, &ep, relocate);
+	}
+#endif
+
+	return ret;
+}
+
+module_init(pciesvc_dev_init);
+
+static void __exit pciesvc_dev_detach(void)
+{
+}
+module_exit(pciesvc_dev_detach);
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/kpcinterface.c b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/kpcinterface.c
new file mode 100644
index 000000000..07c1b826d
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/kpcinterface.c
@@ -0,0 +1,567 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (c) 2021, 2022, Oracle and/or its affiliates.
+ */
+
+/*
+ * Kernel PCIE Manager "glue" code
+ *
+ * Author: rob.gardner@oracle.com
+ */
+
+#include "kpcimgr_api.h"
+#include "pciesvc.h"
+#include "pciesvc_system.h"
+#include "version.h"
+
+/*
+ * This file contains only functions essential to the
+ * operation of the pciesvc library code.
+ */
+
+void kpcimgr_init_fn(kstate_t *ks)
+{
+	set_kstate(ks);
+}
+
+void kpcimgr_version_fn(char **version)
+{
+	if (version)
+		*version = PCIESVC_VERSION;
+}
+
+/*
+ * Dummy function called for undefined entry points
+ */
+void kpcimgr_undefined_entry(void)
+{
+	pciesvc_log(KERN_INFO "undefined entry called\n");
+}
+
+/*
+ * Initialize pciesvc for interrupt based operation
+ */
+void kpcimgr_init_intr(kstate_t *ks)
+{
+	pciesvc_params_t p;
+	volatile struct msi_info *msi;
+
+	set_kstate(ks);
+	memset(&p, 0, sizeof(pciesvc_params_t));
+
+	p.version = 0;
+	p.params_v0.port = ks->active_port;
+
+	msi = &ks->msi[MSI_INDIRECT_IDX];
+	p.params_v0.ind_intr = 1;
+	p.params_v0.ind_msgaddr = msi->msgaddr;
+	p.params_v0.ind_msgdata = msi->msgdata;
+
+	msi = &ks->msi[MSI_NOTIFY_IDX];
+	p.params_v0.not_intr = 1;
+	p.params_v0.not_msgaddr = msi->msgaddr;
+	p.params_v0.not_msgdata = msi->msgdata;
+
+	if (pciesvc_init(&p))
+		kpr_err("%s: pciesvc_init failed\n", __func__);
+
+	/* clear out any pending transactions */
+	kpcimgr_poll(ks, 0, NORMAL);
+}
+
+/*
+ * Initialize pciesvc for polling based operation
+ */
+void kpcimgr_init_poll(kstate_t *ks)
+{
+	pciesvc_params_t p;
+
+	set_kstate(ks);
+	memset(&p, 0, sizeof(pciesvc_params_t));
+
+	p.version = 0;
+	p.params_v0.port = ks->active_port;
+
+	p.params_v0.ind_poll = 1;
+	p.params_v0.not_poll = 1;
+
+	pciesvc_init(&p);
+}
+
+/*
+ * Main poll function
+ *
+ * Essentially a wrapper for pciesvc_poll() that
+ * updates statistics, does some error checking,
+ * and outputs some debugging information.
+ */
+void kpcimgr_poll(kstate_t *ks, int index, int phase)
+{
+	int i, result;
+	long ts = read_sysreg(cntvct_el0);
+
+	set_kstate(ks);
+	ks->ncalls++;
+
+	if (ks->trace_data[phase][FIRST_CALL_TIME] == 0) {
+		uart_write_debug(ks, 'F');
+		ks->trace_data[phase][FIRST_CALL_TIME] = ts;
+
+		if (phase == NOMMU)
+			kpcimgr_report_stats(ks, NORMAL, 1, 0);
+		else
+			kpcimgr_report_stats(ks, NOMMU, 1, 0);
+	}
+
+	ks->trace_data[phase][NUM_CALLS]++;
+
+	if (phase == NOMMU)
+		uart_write_debug(ks, 'M');
+
+	if (ks->valid != KSTATE_MAGIC) {
+		uart_write_debug(ks, 'V');
+		return;
+	}
+
+	if (!ks->running) {
+		uart_write_debug(ks, 'P');
+		return;
+	}
+
+	ks->trace_data[phase][LAST_CALL_TIME] = ts;
+	ks->trace_data[phase][NUM_CHECKS]++;
+
+	if (ks->debug & 0x300) {
+		trigger_serr(ks->debug & 0x300);
+		ks->debug &= ~0x300;
+	}
+
+	for (i=0; i<10; i++) {
+
+		result = pciesvc_poll(0);
+		/*
+		 * return value:
+		 *  1: valid pending and handled
+		 *  0: nothing pending
+		 */
+
+		if (result == 0)
+			break;
+		if (result == -1) {
+			uart_write_debug(ks, '?');
+			break;
+		}
+
+		uart_write_debug(ks, 'h');
+
+		ks->trace_data[phase][NUM_PENDINGS]++;
+	}
+	kpcimgr_report_stats(ks, phase, 0, 0);
+}
+
+/*
+ * ISR for Indirect Interrupt
+ */
+int kpcimgr_ind_intr(kstate_t *ks, int port)
+{
+	int ret;
+
+	set_kstate(ks);
+	ret = pciesvc_indirect_intr(port);
+	if (ks->debug & 0x300) {
+		trigger_serr(ks->debug & 0x300);
+		ks->debug &= ~0x300;
+	}
+
+	return ret;
+}
+
+/*
+ * ISR for Notify Interrupt
+ */
+int kpcimgr_not_intr(kstate_t *ks, int port)
+{
+	set_kstate(ks);
+	return pciesvc_notify_intr(port);
+}
+
+/*
+ * Return a VA from one of our known ranges
+ *
+ * If we're running with the MMU turned off, then just return the
+ * physical address.
+ *
+ */
+void *kpcimgr_va_get(unsigned long pa, unsigned long sz)
+{
+	kstate_t *ks = get_kstate();
+	int i;
+
+	if (!virtual())
+		return (void *) pa;
+
+	for (i=0; i<ks->nranges; i++) {
+		struct mem_range_t *mr = &ks->mem_ranges[i];
+		if (pa >= mr->base && pa < mr->end)
+			return mr->vaddr + (pa - mr->base);
+	}
+
+	kpr_err("%s: bad pa 0x%lx\n", __func__, pa);
+    	pciesvc_assert(0);
+	return NULL;
+}
+
+/*
+ * Reverse translation: return a physical address
+ * corresponding to some virtual address.
+ */
+u64 pciesvc_vtop(const void *hwmemva)
+{
+	kstate_t *ks = get_kstate();
+	u64 hwptr = (u64) hwmemva;
+	int i;
+
+	for (i=0; i<ks->nranges; i++) {
+		struct mem_range_t *mr = &ks->mem_ranges[i];
+		u64 size;
+
+		/* was a physical address passed in to us? */
+		if (hwptr >= mr->base && hwptr < mr->end)
+			return hwptr;
+		size = mr->end - mr->base;
+		if (hwmemva >= mr->vaddr &&
+		    hwmemva <  mr->vaddr + size)
+			return mr->base + (hwmemva - mr->vaddr);
+	}
+	return 0;
+}
+
+/*
+ * Up calls from pciesvc
+ */
+uint32_t
+pciesvc_reg_rd32(const uint64_t pa)
+{
+    u_int32_t val, *va = kpcimgr_va_get(pa, 4);
+
+    pciesvc_assert((pa & 0x3) == 0);
+    val = readl(va);
+    __asm__ __volatile__("isb; dsb sy;" ::);
+
+    return val;
+}
+
+static inline void
+pciesvc_reg_rd32w(const uint64_t pa, uint32_t *w, const uint32_t nw)
+{
+    int i;
+
+    for (i = 0; i < nw; i++) {
+        w[i] = pciesvc_reg_rd32(pa + (i * 4));
+    }
+}
+
+void
+pciesvc_pciepreg_rd32(const uint64_t pa, uint32_t *dest)
+{
+	u_int32_t val, (*upcall)(int req, unsigned long pa);
+	kstate_t *ks = get_kstate();
+
+	pciesvc_assert((pa & 0x3) == 0);
+	upcall = ks->upcall;
+	if (upcall && virtual())
+		val = upcall(PREG_READ, pa);
+	else
+		val = pciesvc_reg_rd32(pa);
+
+	*dest = val;
+}
+
+void
+pciesvc_reg_wr32(const uint64_t pa, const uint32_t val)
+{
+    u_int32_t *va = kpcimgr_va_get(pa, 4);
+
+    pciesvc_assert((pa & 0x3) == 0);
+    writel(val, va);
+}
+
+static inline void
+pciesvc_reg_wr32w(const uint64_t pa, const uint32_t *w, const uint32_t nw)
+{
+    int i;
+
+    for (i = 0; i < nw; i++) {
+        pciesvc_reg_wr32(pa + (i * 4), w[i]);
+    }
+}
+
+/*
+ * Similar calls implemented in terms of rd32/wr32.
+ */
+typedef union {
+    u_int32_t l;
+    u_int16_t h[2];
+    u_int8_t  b[4];
+} iodata_t;
+
+int
+pciesvc_mem_rd(const uint64_t pa, void *buf, const size_t sz)
+{
+    uint64_t pa_aligned;
+    uint8_t idx;
+    iodata_t v;
+
+    switch (sz) {
+    case 1:
+        pa_aligned = pa & ~0x3;
+        idx = pa & 0x3;
+        v.l = pciesvc_reg_rd32(pa_aligned);
+        *(uint8_t *)buf = v.b[idx];
+        break;
+    case 2:
+        pa_aligned = pa & ~0x3;
+        idx = (pa & 0x3) >> 1;
+        v.l = pciesvc_reg_rd32(pa_aligned);
+        *(uint16_t *)buf = v.h[idx];
+        break;
+    case 4:
+    case 8:
+        pciesvc_reg_rd32w(pa, (uint32_t *)buf, sz >> 2);
+        break;
+    default:
+        return -1;
+    }
+    return 0;
+}
+
+void
+pciesvc_mem_wr(const uint64_t pa, const void *buf, const size_t sz)
+{
+    uint64_t pa_aligned;
+    uint8_t idx;
+    iodata_t v;
+
+    switch (sz) {
+    case 1:
+        pa_aligned = pa & ~0x3;
+        idx = pa & 0x3;
+        v.l = pciesvc_reg_rd32(pa_aligned);
+        v.b[idx] = *(uint8_t *)buf;
+        pciesvc_reg_wr32(pa_aligned, v.l);
+        break;
+    case 2:
+        pa_aligned = pa & ~0x3;
+        idx = (pa & 0x3) >> 1;
+        v.l = pciesvc_reg_rd32(pa_aligned);
+        v.h[idx] = *(uint16_t *)buf;
+        pciesvc_reg_wr32(pa_aligned, v.l);
+        break;
+    case 4:
+    case 8:
+        pciesvc_reg_wr32w(pa, (uint32_t *)buf, sz >> 2);
+        break;
+    default:
+        break;
+    }
+}
+
+void
+pciesvc_mem_barrier(void)
+{
+	mb();
+}
+
+/*
+ * We need our own memset/memcpy functions because we
+ * cannot call any kernel functions. And even if we could,
+ * we need to avoid cache operations since "non-linux" memory
+ * is non-cached.
+ */
+void *
+pciesvc_memset(void *s, int c, size_t n)
+{
+	if (((uintptr_t)s & 0x3) == 0 && (n & 0x3) == 0) {
+		volatile u_int32_t *p;
+		int i;
+
+		c &= 0xff;
+		c = ((c << 0) |
+		     (c << 8) |
+		     (c << 16) |
+		     (c << 24));
+		for (p = s, i = 0; i < n >> 2; i++, p++) {
+			*p = c;
+		}
+	} else {
+		volatile u_int8_t *p;
+		int i;
+
+		for (p = s, i = 0; i < n; i++, p++) {
+			*p = c;
+		}
+	}
+
+	return s;
+}
+
+void *
+pciesvc_memcpy(void *dst, const void *src, size_t n)
+{
+	volatile u_int8_t *d = dst;
+	const u_int8_t *s = src;
+	int i;
+
+	for (i = 0; i < n; i++) {
+		*d++ = *s++;
+	}
+	return dst;
+}
+
+void *
+pciesvc_memcpy_toio(void *dsthw, const void *src, size_t n)
+{
+    return pciesvc_memcpy(dsthw, src, n);
+}
+
+void *
+pciesvc_shmem_get(void)
+{
+	kstate_t *ks = get_kstate();
+
+	if (virtual())
+		return ks->shmemva;
+	else
+		return (void *) ks->shmembase;
+}
+
+void *pciesvc_hwmem_get(void)
+{
+	kstate_t *ks = get_kstate();
+
+	if (virtual())
+		return ks->mem_ranges[ks->hwmem_idx].vaddr;
+	else
+		return (void *) ks->mem_ranges[ks->hwmem_idx].base;
+}
+
+void
+pciesvc_log(const char *msg)
+{
+	kstate_t *ks = get_kstate();
+	u64 (*upcall)(int req, char *msg);
+
+	upcall = ks->upcall;
+	if (upcall && virtual())
+		upcall(PRINT_LOG_MSG, (char *)msg);
+	else
+		kdbg_puts((char *)msg);
+}
+
+void wakeup_event_queue(void)
+{
+	kstate_t *ks = get_kstate();
+	u64 (*upcall)(int req);
+
+	upcall = ks->upcall;
+	if (upcall && virtual())
+		upcall(WAKE_UP_EVENT_QUEUE);
+}
+
+/*
+ * Event Queue Handler
+ *
+ * Event queue semantics:
+ *  evq_head = index of slot used for next insertion
+ *  evq_tail = index of slot used for next removal
+ *  queue is empty when head == tail
+ *  queue is full when (head + 1) % queue_size == tail
+ *  queue is nearly full when (head + 2) % queue_size == tail
+ *
+ * Only head is modified here, and the read() function only
+ * modifies tail, so theoretically no race can exist. It is
+ * possible for the reader to see an empty queue momentarily
+ * or the handler to see a full queue momentarily, but these
+ * situations do not justify adding locks.
+ */
+int pciesvc_event_handler(pciesvc_eventdata_t *evdata, const size_t evsize)
+{
+	kstate_t *ks = get_kstate();
+	int ret = 0;
+	static int was_full = 0;
+
+	if (evsize != sizeof(pciesvc_eventdata_t)) {
+		kpr_err("%s: evsize != sizeof(pciesvc_eventdata_t))\n", __func__);
+		return -1;
+	}
+
+	if ((ks->evq_head + 1) % EVENT_QUEUE_LENGTH == ks->evq_tail) {
+		if (!was_full)
+			pciesvc_log(KERN_INFO "pciesvc_event_handler: event queue full\n");
+		was_full = 1;
+		return -1;
+	}
+	was_full = 0;
+
+	if ((ks->evq_head + 2) % EVENT_QUEUE_LENGTH == ks->evq_tail) {
+		pciesvc_log(KERN_INFO "pciesvc_event_handler: event queue almost full\n");
+		evdata->evtype = PCIESVC_EV_QFULL;
+		ret = -1;
+	}
+
+	pciesvc_memcpy_toio((void *)ks->evq[ks->evq_head], evdata, sizeof(pciesvc_eventdata_t));
+
+	ks->evq_head = (ks->evq_head + 1) % EVENT_QUEUE_LENGTH;
+	wakeup_event_queue();
+	return ret;
+}
+
+void pciesvc_debug_cmd(uint32_t *cmd)
+{
+	kstate_t *ks = get_kstate();
+	uint32_t delayus;
+
+	switch (*cmd) {
+	case 0x17:
+		*cmd = virtual();
+		return;
+	case 0x19:
+		*cmd = ks->cfgval;
+		return;
+	case 0x100:
+	case 0x200:
+		ks->debug |= *cmd;
+		return;
+	default:
+		delayus = *cmd;
+		if (delayus) {
+			pciesvc_usleep(delayus);
+		}
+		break;
+	}
+}
+
+/*
+ * cmd read/write
+ */
+int pciesvc_sysfs_cmd_read(kstate_t *ks, char *buf, loff_t off, size_t count, int *exists)
+{
+	int ret;
+
+	if (exists)
+		*exists = 1;
+
+	ret = pciesvc_cmd_read(buf, off, count);
+	return ret < 0 ? -EINVAL : ret;
+}
+
+int pciesvc_sysfs_cmd_write(kstate_t *ks, char *buf, loff_t off, size_t count, int *exists)
+{
+	int ret;
+
+	if (exists)
+		*exists = 1;
+
+	ret = pciesvc_cmd_write(buf, off, count);
+	return ret < 0 ? -EINVAL : ret;
+}
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/include/indirect_entry.h b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/include/indirect_entry.h
new file mode 100644
index 000000000..42e35a00f
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/include/indirect_entry.h
@@ -0,0 +1,40 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (c) 2018, Pensando Systems Inc.
+ */
+
+#ifndef __INDIRECT_ENTRY_H__
+#define __INDIRECT_ENTRY_H__
+
+#include "tlpauxinfo.h"
+
+typedef enum {
+#define PCIEIND_REASON_DEF(NAME, VAL)               \
+    PCIEIND_REASON_##NAME = VAL,
+#include "indirect_reason.h"
+    PCIEIND_REASON_MAX
+} pcieind_reason_t;
+
+/*
+ * Completion Status field values
+ * PCIe 4.0, Table 2-34.
+ */
+typedef enum {
+    PCIECPL_SC          = 0x0,          /* Successful Completion */
+    PCIECPL_UR          = 0x1,          /* Unsupported Request */
+    PCIECPL_CRS         = 0x2,          /* Config Retry Status */
+    PCIECPL_CA          = 0x4,          /* Completer Abort */
+} pciecpl_t;
+
+#define INDIRECT_TLPSZ          64
+
+typedef struct indirect_entry_s {
+    u_int32_t port;
+    pciecpl_t cpl;                      /* PCIECPL_* completion type */
+    u_int32_t completed:1;              /* completion has been delivered */
+    u_int32_t data[4];
+    u_int8_t rtlp[INDIRECT_TLPSZ];
+    tlpauxinfo_t info;
+} indirect_entry_t;
+
+#endif /* __INDIRECT_ENTRY_H__ */
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/include/indirect_reason.h b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/include/indirect_reason.h
new file mode 100644
index 000000000..b88abb792
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/include/indirect_reason.h
@@ -0,0 +1,29 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (c) 2018, Pensando Systems Inc.
+ */
+
+#ifndef PCIEIND_REASON_DEF
+#define PCIEIND_REASON_DEF(NAME, VAL)
+#endif
+
+PCIEIND_REASON_DEF(RSRV0, 0)
+PCIEIND_REASON_DEF(RSRV1, 1)
+PCIEIND_REASON_DEF(MSG, 2)
+PCIEIND_REASON_DEF(UNSUPPORTED, 3)
+PCIEIND_REASON_DEF(PMV, 4)
+PCIEIND_REASON_DEF(DBPMV, 5)
+PCIEIND_REASON_DEF(ATOMIC, 6)
+PCIEIND_REASON_DEF(PMTMISS, 7)
+PCIEIND_REASON_DEF(PMRMISS, 8)
+PCIEIND_REASON_DEF(PRTMISS, 9)
+PCIEIND_REASON_DEF(DBF2VFIDMISS, 10)
+PCIEIND_REASON_DEF(PRTOOR, 11)
+PCIEIND_REASON_DEF(VFIDOOR, 12)
+PCIEIND_REASON_DEF(BDFOOR, 13)
+PCIEIND_REASON_DEF(PMRIND, 14)
+PCIEIND_REASON_DEF(PRTIND, 15)
+PCIEIND_REASON_DEF(PMRECC, 16)
+PCIEIND_REASON_DEF(PRTECC, 17)
+
+#undef PCIEIND_REASON_DEF
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/include/notify_entry.h b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/include/notify_entry.h
new file mode 100644
index 000000000..91eb2767e
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/include/notify_entry.h
@@ -0,0 +1,18 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (c) 2018,2021, Pensando Systems Inc.
+ */
+
+#ifndef __NOTIFY_ENTRY_H__
+#define __NOTIFY_ENTRY_H__
+
+#include "tlpauxinfo.h"
+
+#define NOTIFY_TLPSZ            48
+
+typedef struct notify_entry_s {
+    uint8_t rtlp[NOTIFY_TLPSZ];
+    tlpauxinfo_t info;
+} notify_entry_t;
+
+#endif /* __NOTIFY_ENTRY_H__ */
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/include/pciehdevice_types.h b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/include/pciehdevice_types.h
new file mode 100644
index 000000000..4ecb7a1a0
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/include/pciehdevice_types.h
@@ -0,0 +1,38 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (c) 2022, Pensando Systems Inc.
+ */
+
+#ifndef __PCIEHDEVICE_TYPES_H__
+#define __PCIEHDEVICE_TYPES_H__
+
+#ifdef __cplusplus
+extern "C" {
+#if 0
+} /* close to calm emacs autoindent */
+#endif
+#endif
+
+typedef enum pciehdevice_type_e {
+    PCIEHDEVICE_NONE,
+    PCIEHDEVICE_ETH,
+    PCIEHDEVICE_MGMTETH,
+    PCIEHDEVICE_ACCEL,
+    PCIEHDEVICE_NVME,
+    PCIEHDEVICE_VIRTIO,
+    PCIEHDEVICE_PCIESTRESS,
+    PCIEHDEVICE_DEBUG,
+    PCIEHDEVICE_RCDEV,
+    PCIEHDEVICE_CRYPT,
+    PCIEHDEVICE_UPT,
+    PCIEHDEVICE_SERIAL,
+    PCIEHDEVICE_CORE,
+} pciehdevice_type_t;
+
+#define PCIEHDEVICE_OVERRIDE_INTRGROUPS 8
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __PCIEHDEVICE_TYPES_H__ */
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/include/pciehw.h b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/include/pciehw.h
new file mode 100644
index 000000000..443a128b0
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/include/pciehw.h
@@ -0,0 +1,29 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (c) 2017-2018,2021, Pensando Systems Inc.
+ */
+
+#ifndef __PCIESVC_PCIEHW_H__
+#define __PCIESVC_PCIEHW_H__
+
+#ifdef __cplusplus
+extern "C" {
+#if 0
+} /* close to calm emacs autoindent */
+#endif
+#endif
+
+#define PCIEHW_NPORTS   8
+#define PCIEHW_NDEVS    1024
+#define PCIEHW_CFGSHIFT 11
+#define PCIEHW_CFGSZ    (1 << PCIEHW_CFGSHIFT)
+#define PCIEHW_NROMSK   128
+#define PCIEHW_NPMT     PMT_COUNT
+#define PCIEHW_NPRT     PRT_COUNT
+#define PCIEHW_NBAR     6               /* 6 cfgspace BARs */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __PCIESVC_PCIEHW_H__ */
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/include/pciehwmem.h b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/include/pciehwmem.h
new file mode 100644
index 000000000..fc8335a90
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/include/pciehwmem.h
@@ -0,0 +1,36 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (c) 2021, Pensando Systems Inc.
+ */
+
+#ifndef __PCIEHWMEM_H__
+#define __PCIEHWMEM_H__
+
+#ifdef __cplusplus
+extern "C" {
+#if 0
+} /* close to calm emacs autoindent */
+#endif
+#endif
+
+#include "pciehw.h"
+
+#define PCIEHW_NOTIFYSZ         (1 * 1024 * 1024)
+
+typedef struct pciehw_mem_s {
+    u_int8_t notify_area[PCIEHW_NPORTS][PCIEHW_NOTIFYSZ]
+                                     __attribute__((aligned(PCIEHW_NOTIFYSZ)));
+    /* page of zeros to back cfgspace */
+    u_int8_t zeros[4096] __attribute__((aligned(4096)));
+    u_int8_t cfgcur[PCIEHW_NDEVS][PCIEHW_CFGSZ] __attribute__((aligned(4096)));
+    u_int32_t notify_intr_dest[PCIEHW_NPORTS];   /* notify   intr dest */
+    u_int32_t indirect_intr_dest[PCIEHW_NPORTS]; /* indirect intr dest */
+    u_int32_t magic;                    /* PCIEHW_MAGIC when initialized */
+    u_int32_t version;                  /* PCIEHW_VERSION when initialized */
+} pciehw_mem_t;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __PCIEHWMEM_H__ */
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/include/pciemgr_stats.h b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/include/pciemgr_stats.h
new file mode 100644
index 000000000..980fa9bad
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/include/pciemgr_stats.h
@@ -0,0 +1,33 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (c) 2019, Pensando Systems Inc.
+ */
+
+#ifndef __PCIEMGR_STATS_H__
+#define __PCIEMGR_STATS_H__
+
+#ifdef __cplusplus
+extern "C" {
+#if 0
+} /* close to calm emacs autoindent */
+#endif
+#endif
+
+typedef union pciemgr_stats {
+    struct {
+
+#define PCIEMGR_STATS_DEF(S) \
+        uint64_t S;
+#include "pciemgr_stats_defs.h"
+
+    };
+    /* pad to 64 entries, room to grow */
+    uint64_t _pad[64];
+
+} pciemgr_stats_t;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __PCIEMGR_STATS_H__ */
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/include/pciemgr_stats_defs.h b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/include/pciemgr_stats_defs.h
new file mode 100644
index 000000000..d690ecd13
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/include/pciemgr_stats_defs.h
@@ -0,0 +1,56 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (c) 2019, Pensando Systems Inc.
+ */
+
+#ifndef PCIEMGR_STATS_DEF
+#define PCIEMGR_STATS_DEF(st)
+#endif
+
+PCIEMGR_STATS_DEF(not_intr)
+PCIEMGR_STATS_DEF(not_spurious)
+PCIEMGR_STATS_DEF(not_polled)
+PCIEMGR_STATS_DEF(not_cnt)
+PCIEMGR_STATS_DEF(not_max)
+PCIEMGR_STATS_DEF(not_cfgrd)
+PCIEMGR_STATS_DEF(not_cfgwr)
+PCIEMGR_STATS_DEF(not_memrd)
+PCIEMGR_STATS_DEF(not_memwr)
+PCIEMGR_STATS_DEF(not_iord)
+PCIEMGR_STATS_DEF(not_iowr)
+PCIEMGR_STATS_DEF(not_unknown)
+
+#define notify_reason_stats not_rsrv0
+PCIEMGR_STATS_DEF(not_rsrv0)
+PCIEMGR_STATS_DEF(not_rsrv1)
+PCIEMGR_STATS_DEF(not_msg)
+PCIEMGR_STATS_DEF(not_unsupported)
+PCIEMGR_STATS_DEF(not_pmv)
+PCIEMGR_STATS_DEF(not_dbpmv)
+PCIEMGR_STATS_DEF(not_atomic)
+PCIEMGR_STATS_DEF(not_pmtmiss)
+PCIEMGR_STATS_DEF(not_pmrmiss)
+PCIEMGR_STATS_DEF(not_prtmiss)
+PCIEMGR_STATS_DEF(not_bdf2vfidmiss)
+PCIEMGR_STATS_DEF(not_prtoor)
+PCIEMGR_STATS_DEF(not_vfidoor)
+PCIEMGR_STATS_DEF(not_bdfoor)
+PCIEMGR_STATS_DEF(not_pmrind)
+PCIEMGR_STATS_DEF(not_prtind)
+PCIEMGR_STATS_DEF(not_pmrecc)
+PCIEMGR_STATS_DEF(not_prtecc)
+
+PCIEMGR_STATS_DEF(ind_intr)
+PCIEMGR_STATS_DEF(ind_spurious)
+PCIEMGR_STATS_DEF(ind_polled)
+PCIEMGR_STATS_DEF(ind_cfgrd)
+PCIEMGR_STATS_DEF(ind_cfgwr)
+PCIEMGR_STATS_DEF(ind_memrd)
+PCIEMGR_STATS_DEF(ind_memwr)
+PCIEMGR_STATS_DEF(ind_iord)
+PCIEMGR_STATS_DEF(ind_iowr)
+PCIEMGR_STATS_DEF(ind_unknown)
+
+PCIEMGR_STATS_DEF(healthlog)
+
+#undef PCIEMGR_STATS_DEF
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/include/pcieshmem.h b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/include/pcieshmem.h
new file mode 100644
index 000000000..a7974dbc7
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/include/pcieshmem.h
@@ -0,0 +1,207 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (c) 2017-2018,2021-2022, Pensando Systems Inc.
+ */
+
+#ifndef __PCIESHMEM_H__
+#define __PCIESHMEM_H__
+
+#ifdef __cplusplus
+extern "C" {
+#if 0
+} /* close to calm emacs autoindent */
+#endif
+#endif
+
+#include "pciehdevice_types.h"
+#include "pciehw.h"
+#include "pciemgr_stats.h"
+#include "pmt.h"
+#include "prt.h"
+
+enum pciehw_cfghnd_e {
+    PCIEHW_CFGHND_NONE,
+    PCIEHW_CFGHND_CMD,
+    PCIEHW_CFGHND_DEV_BARS,
+    PCIEHW_CFGHND_ROM_BAR,
+    PCIEHW_CFGHND_BRIDGECTL,
+    PCIEHW_CFGHND_MSIX,
+    PCIEHW_CFGHND_VPD,
+    PCIEHW_CFGHND_PCIE_DEVCTL,
+    PCIEHW_CFGHND_SRIOV_CTRL,
+    PCIEHW_CFGHND_SRIOV_BARS,
+    PCIEHW_CFGHND_DBG_DELAY,
+    PCIEHW_CFGHND_BRIDGE_BUS,
+};
+typedef enum pciehw_cfghnd_e pciehw_cfghnd_t;
+
+typedef enum pciehwbartype_e {
+    PCIEHWBARTYPE_NONE,                 /* invalid bar type */
+    PCIEHWBARTYPE_MEM,                  /* 32-bit memory bar */
+    PCIEHWBARTYPE_MEM64,                /* 64-bit memory bar */
+    PCIEHWBARTYPE_IO,                   /* 32-bit I/O bar */
+} pciehwbartype_t;
+
+typedef enum pciehw_barhnd_e {
+    PCIEHW_BARHND_NONE,
+    PCIEHW_BARHND_SERIAL,
+    PCIEHW_BARHND_VIRTIO,
+} pciehw_barhnd_t;
+
+typedef union pciehwbar_u {
+    struct {
+        u_int64_t size;                 /* total size of this bar */
+        u_int32_t valid:1;              /* valid bar for this dev */
+        u_int32_t loaded:1;             /* pmts loaded */
+        u_int32_t ovrds:1;              /* override pmts chained on ovrd */
+        pciehwbartype_t type;           /* PCIEHWBARTYPE_* */
+        u_int8_t cfgidx;                /* config bars index (0-5) */
+        u_int8_t hnd;                   /* indirect/notify handling */
+        u_int16_t bdf;                  /* host bdf of bar owner */
+        u_int32_t pmtb;                 /* pmt base  for bar */
+        u_int32_t pmtc;                 /* pmt count for bar */
+        u_int16_t ovrd;                 /* override pmts */
+        u_int16_t _unused;
+        u_int64_t addr;                 /* addr of this bar */
+    };
+    u_int8_t _pad[64];
+} pciehwbar_t;
+
+typedef u_int32_t pciehwdevh_t;
+
+#define PCIEHW_ROMSKSZ  (PCIEHW_CFGSZ / sizeof (u_int32_t))
+#define PCIEHW_CFGHNDSZ (PCIEHW_CFGSZ / sizeof (u_int32_t))
+
+#define NOVRDINTR       8
+
+/*
+ * If PCIEHDEVICE_OVERRIDE_INTRGROUPS increases we'll have
+ * to grow the shared memory region with special handling.
+ */
+#if NOVRDINTR < PCIEHDEVICE_OVERRIDE_INTRGROUPS
+# error "NOVRDINTR < PCIEHDEVICE_OVERRIDE_INTRGROUPS"
+#endif
+
+typedef struct ovrdintr_s {
+    u_int32_t intrb;                    /* ovrd intr base */
+    u_int32_t intrc;                    /* ovrd intr count */
+} ovrdintr_t;
+
+typedef union pciehwdev_u {
+    struct {
+        char name[32];                  /* device name */
+        int port;                       /* pcie port */
+        u_int16_t pf:1;                 /* is pf */
+        u_int16_t vf:1;                 /* is vf */
+        u_int16_t flexvf:1;             /* is flexvf */
+        u_int16_t totalvfs;             /* totalvfs provisioned */
+        u_int16_t numvfs;               /* current numvfs */
+        u_int16_t vfidx;                /* if is vf, vf position */
+        u_int16_t bdf;                  /* bdf of this dev */
+        u_int8_t type;                  /* PCIEHDEVICE_* */
+        u_int8_t novrdintr;             /* number valid in ovrdintr[] */
+        u_int32_t lifb;                 /* lif base  for this dev */
+        u_int32_t lifc;                 /* lif count for this dev */
+        u_int32_t intrb;                /* intr resource base */
+        u_int32_t intrc;                /* intr resource count */
+        u_int32_t intrdmask:1;          /* reset val for drvcfg.mask */
+        u_int32_t cfgloaded:1;          /* cfg pmt entries loaded */
+        pciehwdevh_t parenth;           /* handle to parent */
+        pciehwdevh_t childh;            /* handle to child */
+        pciehwdevh_t peerh;             /* handle to peer */
+        u_int8_t intpin;                /* legacy int pin */
+        u_int8_t romsksel[PCIEHW_ROMSKSZ]; /* cfg read-only mask selectors */
+        u_int8_t cfgpmtf[PCIEHW_CFGHNDSZ]; /* cfg pmt flags */
+        u_int8_t cfghnd[PCIEHW_CFGHNDSZ];  /* cfg indirect/notify handlers */
+        pciehwbar_t bar[PCIEHW_NBAR];   /* bar info */
+        pciehwbar_t rombar;             /* option rom bar */
+        u_int16_t sriovctrl;            /* current sriov ctrl reg */
+        u_int16_t enabledvfs;           /* current numvfs enabled */
+        pciehwdevh_t hwdevh;            /* handle to this dev */
+        u_int32_t pmtb;                 /* pmt base  for cfg */
+        u_int32_t pmtc;                 /* pmt count for cfg */
+        ovrdintr_t ovrdintr[NOVRDINTR]; /* override intr resources */
+    };
+    u_int8_t _pad[4096];
+} pciehwdev_t;
+
+typedef union pciehw_port_u {
+    struct {
+        u_int8_t secbus;                /* bridge secondary bus */
+        pciemgr_stats_t stats;
+    };
+    u_int8_t _pad[1024];
+} pciehw_port_t;
+
+typedef union pciehw_sprt_u {
+    struct {
+        prt_t prt;                      /* shadow copy of prt */
+        u_int16_t next;                 /* next link for chained prts */
+    };
+    u_int8_t _pad[32];
+} pciehw_sprt_t;
+
+typedef union pciehw_spmt_u {
+    struct {
+        u_int64_t baroff;               /* bar addr offset */
+        u_int64_t swrd;                 /* reads  handled by sw (not/ind) */
+        u_int64_t swwr;                 /* writes handled by sw (not/ind) */
+        pciehwdevh_t owner;             /* current owner of this entry */
+        u_int8_t loaded:1;              /* is loaded into hw */
+        u_int8_t vf0:1;                 /* sriov vf0 apply enabledvfs limit */
+        u_int8_t vf0stride:5;           /* sriov vf0 addr mask stride */
+        u_int8_t chain:1;               /* chained pmts on next */
+        u_int8_t cfgidx;                /* cfgidx for bar we belong to */
+        pmt_t pmt;                      /* shadow copy of pmt */
+        u_int64_t vf0base:52;           /* sriov vf0 resource base address */
+        u_int64_t pmtstart:6;           /* sriov vf0 addr mask start */
+        u_int16_t next;                 /* next link for chained pmts */
+    };
+    u_int8_t _pad[128];
+} pciehw_spmt_t;
+
+typedef struct pciehw_sromsk_s {
+    u_int32_t entry;
+    u_int32_t count;
+} pciehw_sromsk_t;
+
+#define PCIEHW_MAGIC    0x706d656d      /* 'pmem' */
+#define PCIEHW_VERSION  0x1
+
+#define PCIEHW_VPDSZ    1024
+#define PCIEHW_SERIALSZ 1024
+
+typedef struct pciehw_shmem_s {
+    u_int32_t magic;                    /* PCIEHW_MAGIC when initialized */
+    u_int32_t version;                  /* PCIEHW_VERSION when initialized */
+    u_int32_t hwinit:1;                 /* hw is initialized */
+    u_int32_t notify_verbose:1;         /* notify logs all */
+    u_int32_t skip_notify:1;            /* notify skips if ring full */
+    u_int32_t pmtpri:1;                 /* support pmt pri */
+    u_int32_t evregistered:1;           /* event handler registered flag */
+    u_int32_t allocdev;
+    u_int32_t allocpmt_high;            /* high priority pmt free sequential */
+    u_int32_t allocprt;                 /* prt free sequential */
+    u_int32_t notify_ring_mask;
+    pciehwdevh_t rooth[PCIEHW_NPORTS];
+    pciehwdev_t dev[PCIEHW_NDEVS];
+    pciehw_port_t port[PCIEHW_NPORTS];
+    pciehw_sromsk_t sromsk[PCIEHW_NROMSK];
+    pciehw_spmt_t spmt[PCIEHW_NPMT];
+    pciehw_sprt_t sprt[PCIEHW_NPRT];
+    u_int8_t cfgrst[PCIEHW_NDEVS][PCIEHW_CFGSZ];
+    u_int8_t cfgmsk[PCIEHW_NDEVS][PCIEHW_CFGSZ];
+    u_int8_t vpddata[PCIEHW_NDEVS][PCIEHW_VPDSZ];
+    u_int8_t serial[PCIEHW_NPORTS][PCIEHW_SERIALSZ];
+    u_int32_t freepmt_high;             /* high priority pmt free list */
+    u_int32_t allocpmt_low;             /* low priority pmt free sequential */
+    u_int32_t freepmt_low;              /* low priority pmt free list */
+    u_int32_t allocpmt_vf0adj;          /* low pri vf0 adjust (never freed) */
+    u_int32_t freeprt_slab;             /* prt free slab adjacent */
+} pciehw_shmem_t;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __PCIESHMEM_H__ */
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/include/pciesvc.h b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/include/pciesvc.h
new file mode 100644
index 000000000..f4cfcc571
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/include/pciesvc.h
@@ -0,0 +1,85 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (c) 2021, Pensando Systems Inc.
+ * Copyright (c) 2022, Advanced Micro Devices, Inc.
+ */
+
+#ifndef __PCIESVC_H__
+#define __PCIESVC_H__
+
+#ifdef __cplusplus
+extern "C" {
+#if 0
+} /* close to calm emacs autoindent */
+#endif
+#endif
+
+#include "pmt.h"
+#include "prt.h"
+#include "pciehwmem.h"
+#include "pcieshmem.h"
+#include "pciesvc_event.h"
+#include "pciesvc_cmd.h"
+
+#define PCIESVC_VERSION_MAJ     3
+#define PCIESVC_VERSION_MIN     1
+
+typedef struct pciesvc_params_v0_s {
+    int         port;                   /* port to config */
+    uint32_t    ind_poll:1;             /* indirect trans poll */
+    uint32_t    ind_intr:1;             /* indirect trans intr */
+    uint32_t    not_poll:1;             /* notify trans poll */
+    uint32_t    not_intr:1;             /* notify trans intr */
+    uint32_t    mac_poll:1;             /* mac poll */
+    uint32_t    mac_intr:1;             /* mac intr */
+    uint64_t    ind_msgaddr;            /* ind_intr=1: intr msg addr */
+    uint32_t    ind_msgdata;            /* ind_intr=1: intr msg data */
+    uint64_t    not_msgaddr;            /* not_intr=1: intr msg addr */
+    uint32_t    not_msgdata;            /* not_intr=1: intr msg addr */
+} pciesvc_params_v0_t;
+
+typedef struct pciesvc_params_s {
+    int                         version;
+    union {
+        pciesvc_params_v0_t     params_v0;
+    };
+} pciesvc_params_t;
+
+int pciesvc_init(pciesvc_params_t *params);
+void pciesvc_shut(const int port);
+
+/*
+ * Return value:
+ *     <0 error
+ *     =0 no work done
+ *     >0 work done
+ */
+int pciesvc_poll(const int port);
+
+int pciesvc_indirect_poll_init(const int port);
+int pciesvc_indirect_poll(const int port);
+int pciesvc_indirect_intr_init(const int port,
+                               u_int64_t msgaddr, u_int32_t msgdata);
+int pciesvc_indirect_intr(const int port);
+
+int pciesvc_notify_poll_init(const int port);
+int pciesvc_notify_poll(const int port);
+int pciesvc_notify_intr_init(const int port,
+                             u_int64_t msgaddr, u_int32_t msgdata);
+int pciesvc_notify_intr(const int port);
+
+int pciesvc_cmd_read(char *buf, const long int off, const size_t count);
+int pciesvc_cmd_write(const char *buf, const long int off, const size_t count);
+
+extern int pciesvc_version_major;
+extern int pciesvc_version_minor;
+
+void pciesvc_get_version(int *maj, int *min);
+
+extern pciesvc_logpri_t pciesvc_log_level;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __PCIESVC_H__ */
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/include/pciesvc_cmd.h b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/include/pciesvc_cmd.h
new file mode 100644
index 000000000..bfde68648
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/include/pciesvc_cmd.h
@@ -0,0 +1,62 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (c) 2022, Advanced Micro Devices, Inc.
+ */
+
+#ifndef __PCIESVC_CMD_H__
+#define __PCIESVC_CMD_H__
+
+#ifdef __cplusplus
+extern "C" {
+#if 0
+} /* close to calm emacs autoindent */
+#endif
+#endif
+
+typedef enum pciesvc_cmdcode_e {
+    PCIESVC_CMD_NOP                     = 0,
+    PCIESVC_CMD_SET_LOG_LEVEL           = 1,
+} pciesvc_cmdcode_t;
+
+typedef enum pciesvc_cmdstatus_e {
+    PCIESVC_CMDSTATUS_SUCCESS           = 0,
+    PCIESVC_CMDSTATUS_UNKNOWN_CMD       = 1,
+} pciesvc_cmdstatus_t;
+
+typedef struct pciesvc_cmd_nop_s {
+    uint32_t cmd;
+} pciesvc_cmd_nop_t;
+
+typedef struct pciesvc_cmdres_nop_s {
+    uint32_t status;
+} pciesvc_cmdres_nop_t;
+
+typedef struct pciesvc_cmd_set_log_level_s {
+    uint32_t cmd;
+    uint32_t log_level;
+} pciesvc_cmd_set_log_level_t;
+
+typedef struct pciesvc_cmdres_set_log_level_s {
+    uint32_t status;
+    uint32_t old_level;
+} pciesvc_cmdres_set_log_level_t;
+
+typedef union pciesvc_cmd_u {
+    uint32_t words[16];
+    uint8_t cmd;
+    pciesvc_cmd_nop_t nop;
+    pciesvc_cmd_set_log_level_t set_log_level;
+} pciesvc_cmd_t;
+
+typedef union pciesvc_cmdres_u {
+    uint32_t words[16];
+    uint8_t status;
+    pciesvc_cmdres_nop_t nop;
+    pciesvc_cmdres_set_log_level_t set_log_level;
+} pciesvc_cmdres_t;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __PCIESVC_CMD_H__ */
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/include/pciesvc_event.h b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/include/pciesvc_event.h
new file mode 100644
index 000000000..3e7364d82
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/include/pciesvc_event.h
@@ -0,0 +1,81 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (c) 2020, Pensando Systems Inc.
+ */
+
+#ifndef __PCIESVC_EVENT_H__
+#define __PCIESVC_EVENT_H__
+
+#ifdef __cplusplus
+extern "C" {
+#if 0
+} /* close to calm emacs autoindent */
+#endif
+#endif
+
+typedef enum pciesvc_event_e {
+    PCIESVC_EV_NONE,
+    PCIESVC_EV_MEMRD_NOTIFY,
+    PCIESVC_EV_MEMWR_NOTIFY,
+    PCIESVC_EV_SRIOV_NUMVFS,
+    PCIESVC_EV_RESET,
+    PCIESVC_EV_QFULL,
+    PCIESVC_EV_MGMTCHG,
+    PCIESVC_EV_LOGMSG,
+} pciesvc_event_t;
+
+typedef struct pciesvc_memrw_notify_s {
+    u_int64_t baraddr;          /* PCIe bar address */
+    u_int64_t baroffset;        /* bar-local offset */
+    u_int8_t cfgidx;            /* bar cfgidx */
+    u_int32_t size;             /* i/o size */
+    u_int64_t localpa;          /* local physical address */
+    u_int64_t data;             /* data, if write */
+} pciesvc_memrw_notify_t;
+
+typedef struct pciesvc_sriov_numvfs_s {
+    u_int16_t numvfs;           /* number of vfs enabled */
+} pciesvc_sriov_numvfs_t;
+
+typedef enum pciesvc_rsttype_e {
+    PCIESVC_RSTTYPE_NONE,
+    PCIESVC_RSTTYPE_BUS,        /* bus reset */
+    PCIESVC_RSTTYPE_FLR,        /* function level reset */
+    PCIESVC_RSTTYPE_VF,         /* vf reset from sriov ctrl vfe */
+} pciesvc_rsttype_t;
+
+typedef struct pciesvc_reset_s {
+    pciesvc_rsttype_t rsttype;  /* RSTTYPE_* */
+    u_int32_t lifb;             /* lif base */
+    u_int32_t lifc;             /* lif count */
+} pciesvc_reset_t;
+
+typedef enum pciesvc_logpri_e {
+    PCIESVC_LOGPRI_DEBUG,
+    PCIESVC_LOGPRI_INFO,
+    PCIESVC_LOGPRI_WARN,
+    PCIESVC_LOGPRI_ERROR,
+} pciesvc_logpri_t;
+
+typedef struct pciesvc_logmsg_s {
+    pciesvc_logpri_t pri;       /* log priority LOGPRI_ */
+    char msg[80];               /* log string, NULL-terminated */
+} pciesvc_logmsg_t;
+
+typedef struct pciesvc_eventdata_s {
+    pciesvc_event_t evtype;     /* PCIESVC_EV_* */
+    u_int8_t port;              /* PCIe port */
+    u_int32_t lif;              /* lif if event for lifs */
+    union {
+        pciesvc_memrw_notify_t memrw_notify;    /* EV_MEMRD/WR_NOTIFY */
+        pciesvc_sriov_numvfs_t sriov_numvfs;    /* EV_SRIOV_NUMVFS */
+        pciesvc_reset_t reset;                  /* EV_RESET */
+        pciesvc_logmsg_t logmsg;                /* EV_LOGMSG */
+    };
+} pciesvc_eventdata_t;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __PCIESVC_EVENT_H__ */
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/include/pciesvc_local.h b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/include/pciesvc_local.h
new file mode 100644
index 000000000..c25e12fce
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/include/pciesvc_local.h
@@ -0,0 +1,62 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (c) 2021-2022, Pensando Systems Inc.
+ */
+
+#ifndef __PCIESVC_LOCAL_H__
+#define __PCIESVC_LOCAL_H__
+
+#ifdef __cplusplus
+extern "C" {
+#if 0
+} /* close to calm emacs autoindent */
+#endif
+#endif
+
+union pciehwdev_u; typedef union pciehwdev_u pciehwdev_t;
+union pciehwbar_u; typedef union pciehwbar_u pciehwbar_t;
+typedef u_int32_t pciehwdevh_t;
+
+u_int64_t pciehw_bar_getsize(pciehwbar_t *phwbar);
+void pciehw_bar_setaddr(pciehwbar_t *phwbar, const u_int64_t addr);
+void pciehw_bar_load_ovrds(pciehwbar_t *phwbar);
+void pciehw_bar_unload_ovrds(pciehwbar_t *phwbar);
+void pciehw_bar_load(pciehwdev_t *phwdev, pciehwbar_t *phwbar);
+void pciehw_cfg_load(pciehwdev_t *phwdev);
+void pciehw_pmt_setaddr(pciehwbar_t *phwbar, const u_int64_t addr);
+void pciehw_reset_bus(pciehwdev_t *phwdev, const u_int8_t bus);
+uint32_t pciehw_vpd_read(pciehwdevh_t hwdevh, const uint16_t addr);
+void pciehw_vpd_write(pciehwdevh_t hwdevh,
+                      const uint16_t addr, const uint32_t data);
+
+u_int16_t pciehwdev_get_hostbdf(const pciehwdev_t *phwdev);
+
+void pciehw_sriov_ctrl(pciehwdev_t *phwdev,
+                       const u_int16_t ctrl, const u_int16_t numvfs);
+
+struct pmt_s; typedef struct pmt_s pmt_t;
+int pmt_reserve_vf0adj(const int n);
+int pmt_alloc(const int n, const int pri);
+void pmt_free(const int pmtb, const int pmtc);
+void pmt_get(const int pmti, pmt_t *pmt);
+void pmt_set(const int pmti, const pmt_t *pmt);
+void pmt_bar_set_bdf(pmt_t *pmt, const u_int16_t bdf);
+u_int64_t pmt_bar_getaddr(const pmt_t *pmt);
+void pmt_bar_setaddr(pmt_t *pmt, const u_int64_t addr);
+
+union pmt_entry_u; typedef union pmt_entry_u pmt_entry_t;
+struct pmt_datamask_s; typedef struct pmt_datamask_s pmt_datamask_t;
+void pmt_entry_enc(pmt_entry_t *pmte, const pmt_datamask_t *dm);
+void pmt_entry_dec(const pmt_entry_t *pmte, pmt_datamask_t *dm);
+
+union prt_u; typedef union prt_u prt_t;
+int prt_alloc(const int n);
+void prt_free(const int prtbase, const int prtcount);
+void prt_get(const int prti, prt_t *prt);
+void prt_set(const int prti, const prt_t *prt);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __PCIESVC_LOCAL_H__ */
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/include/pcietlp.h b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/include/pcietlp.h
new file mode 100644
index 000000000..34bac8138
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/include/pcietlp.h
@@ -0,0 +1,218 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (c) 2018-2019, Pensando Systems Inc.
+ */
+
+#ifndef __PCIETLP_H__
+#define __PCIETLP_H__
+
+#ifdef __cplusplus
+extern "C" {
+#if 0
+} /* close to calm emacs autoindent */
+#endif
+#endif
+
+/*
+ * PCIe Transaction Layer Protocol, based on
+ *     PCI Express Base Specification
+ *     Revision 4.0 Version 1.0
+ *     September 27, 2017
+ */
+
+typedef enum pcie_stlp_type_e {
+    PCIE_STLP_MALFORMED,        /* malformed tlp */
+    PCIE_STLP_CFGRD,            /* cfg (type 0) read */
+    PCIE_STLP_CFGWR,            /* cfg (type 0) write */
+    PCIE_STLP_CFGRD1,           /* cfg (type 1) read */
+    PCIE_STLP_CFGWR1,           /* cfg (type 1) write */
+    PCIE_STLP_MEMRD,            /* memory read */
+    PCIE_STLP_MEMWR,            /* memory write */
+    PCIE_STLP_MEMRD64,          /* memory read - 64-bit addr */
+    PCIE_STLP_MEMWR64,          /* memory write - 64-bit addr */
+    PCIE_STLP_IORD,             /* I/O space read */
+    PCIE_STLP_IOWR,             /* I/O space write */
+    PCIE_STLP_MSG,              /* message */
+    PCIE_STLP_MSGD,             /* message with data */
+} pcie_stlp_type_t;
+
+typedef struct pcie_stlp_s {
+    u_int8_t type;              /* tlp type PCIE_STLP_* */
+    u_int16_t reqid;            /* requester id */
+    u_int16_t tag;              /* tag of request */
+    u_int16_t bdf;              /* bus,dev,fun of request */
+    u_int16_t size;             /* size of request */
+    u_int64_t addr;             /* address */
+    u_int64_t data;             /* payload data */
+} pcie_stlp_t;
+
+int pcietlp_decode(pcie_stlp_t *stlp, const void *rtlp, const size_t rtlpsz);
+int pcietlp_encode(const pcie_stlp_t *stlp, void *rtlp, const size_t rtlpsz);
+char *pcietlp_get_error(void);
+char *pcietlp_buf(const pcie_stlp_t *stlp, void *buf, const size_t bufsz);
+char *pcietlp_str(const pcie_stlp_t *stlp);
+
+/*
+ * PCIe Base Spec, Table 2-2
+ */
+#define PCIE_TLP_FMT_3DW        0x0     /* 3 DW header, no data (read) */
+#define PCIE_TLP_FMT_4DW        0x1     /* 4 DW header, no data (read) */
+#define PCIE_TLP_FMT_3DWD       0x2     /* 3 DW header, with data (write) */
+#define PCIE_TLP_FMT_4DWD       0x3     /* 4 DW header, with data (write) */
+#define PCIE_TLP_FMT_PREF       0x4     /* TLP prefix */
+
+#define mk_tlp_type(fmt, type)    (PCIE_TLP_FMT_##fmt << 5 | ((type) & 0x1f))
+
+/*
+ * PCIe Base Spec, Table 2-3
+ */
+typedef enum pcie_tlp_type_e {
+    PCIE_TLP_TYPE_MEMRD   = mk_tlp_type(3DW,  0x0),
+    PCIE_TLP_TYPE_MEMRD64 = mk_tlp_type(4DW,  0x0),
+    PCIE_TLP_TYPE_MEMWR   = mk_tlp_type(3DWD, 0x0),
+    PCIE_TLP_TYPE_MEMWR64 = mk_tlp_type(4DWD, 0x0),
+    PCIE_TLP_TYPE_IORD    = mk_tlp_type(3DW,  0x2),
+    PCIE_TLP_TYPE_IOWR    = mk_tlp_type(3DWD, 0x2),
+    PCIE_TLP_TYPE_CFGRD0  = mk_tlp_type(3DW,  0x4),
+    PCIE_TLP_TYPE_CFGWR0  = mk_tlp_type(3DWD, 0x4),
+    PCIE_TLP_TYPE_CFGRD1  = mk_tlp_type(3DW,  0x5),
+    PCIE_TLP_TYPE_CFGWR1  = mk_tlp_type(3DWD, 0x5),
+} pcie_tlp_type_t;
+
+typedef struct pcie_tlp_common_hdr_s {
+    /* dword 0 */
+    u_int32_t type:8;           /* transaction type */
+
+    u_int32_t th:1;             /* tlp hint */
+    u_int32_t ln:1;             /* lightweight notification */
+    u_int32_t attr_hi:1;        /* attributes[2] */
+    u_int32_t t8:1;             /* tag[8] */
+    u_int32_t tc:3;             /* traffic class */
+    u_int32_t t9:1;             /* tag[9] */
+
+    u_int32_t len_hi:2;         /* length[8:9] (dw) */
+    u_int32_t at:2;             /* at[0:1] */
+    u_int32_t attr_lo:2;        /* attributes[0:1] */
+    u_int32_t ep:1;             /* error poisoned */
+    u_int32_t td:1;             /* tlp digest */
+
+    u_int32_t len_lo:8;         /* length[0:7] (dw) */
+
+    /* dword 1 */
+    u_int32_t reqid:16;         /* requester id */
+
+    u_int32_t tag:8;            /* transaction tag */
+
+    u_int32_t fbe:4;            /* first dw byte enable */
+    u_int32_t lbe:4;            /* last dw byte enable */
+} __attribute__((packed)) pcie_tlp_common_hdr_t;
+
+typedef struct pcie_tlp_cfg_s {
+    /* dword 0 */
+    u_int32_t type:8;           /* transaction type */
+
+    u_int32_t th:1;             /* tlp hint */
+    u_int32_t ln:1;             /* lightweight notification */
+    u_int32_t attr_hi:1;        /* attributes[2] */
+    u_int32_t t8:1;             /* tag[8] */
+    u_int32_t tc:3;             /* traffic class */
+    u_int32_t t9:1;             /* tag[9] */
+
+    u_int32_t len_hi:2;         /* length[8:9] (dw) */
+    u_int32_t at:2;             /* at[0:1] */
+    u_int32_t attr_lo:2;        /* attributes[0:1] */
+    u_int32_t ep:1;             /* error poisoned */
+    u_int32_t td:1;             /* tlp digest */
+
+    u_int32_t len_lo:8;         /* length[0:7] (dw) */
+
+    /* dword 1 */
+    u_int32_t reqid:16;         /* requester id */
+
+    u_int32_t tag:8;            /* transaction tag */
+
+    u_int32_t fbe:4;            /* first dw byte enable */
+    u_int32_t lbe:4;            /* last dw byte enable */
+
+    /* dword 2 */
+    u_int32_t bdf:16;           /* bus,dev,fun target */
+
+    u_int32_t extreg:4;         /* extended register number */
+    u_int32_t rsrv:4;           /* reserved */
+
+    u_int32_t reg:8;            /* register number */
+} __attribute__((packed)) pcie_tlp_cfg_t;
+
+typedef struct pcie_tlp_mem32_s {
+    /* dword 0 */
+    u_int32_t type:8;           /* transaction type */
+
+    u_int32_t th:1;             /* tlp hint */
+    u_int32_t ln:1;             /* lightweight notification */
+    u_int32_t attr_hi:1;        /* attributes[2] */
+    u_int32_t t8:1;             /* tag[8] */
+    u_int32_t tc:3;             /* traffic class */
+    u_int32_t t9:1;             /* tag[9] */
+
+    u_int32_t len_hi:2;         /* length[8:9] (dw) */
+    u_int32_t at:2;             /* at[0:1] */
+    u_int32_t attr_lo:2;        /* attributes[0:1] */
+    u_int32_t ep:1;             /* error poisoned */
+    u_int32_t td:1;             /* tlp digest */
+
+    u_int32_t len_lo:8;         /* length[0:7] (dw) */
+
+    /* dword 1 */
+    u_int32_t reqid:16;         /* requester id */
+
+    u_int32_t tag:8;            /* transaction tag */
+
+    u_int32_t fbe:4;            /* first dw byte enable */
+    u_int32_t lbe:4;            /* last dw byte enable */
+
+    /* dword 2 */
+    u_int32_t addr;             /* address[31:2] */
+} __attribute__((packed)) pcie_tlp_mem32_t;
+
+/* I/O similar to mem32 */
+typedef pcie_tlp_mem32_t pcie_tlp_io_t;
+
+typedef struct pcie_tlp_mem64_s {
+    /* dword 0 */
+    u_int32_t type:8;           /* transaction type */
+
+    u_int32_t th:1;             /* tlp hint */
+    u_int32_t ln:1;             /* lightweight notification */
+    u_int32_t attr_hi:1;        /* attributes[2] */
+    u_int32_t t8:1;             /* tag[8] */
+    u_int32_t tc:3;             /* traffic class */
+    u_int32_t t9:1;             /* tag[9] */
+
+    u_int32_t len_hi:2;         /* length[8:9] (dw) */
+    u_int32_t at:2;             /* at[0:1] */
+    u_int32_t attr_lo:2;        /* attributes[0:1] */
+    u_int32_t ep:1;             /* error poisoned */
+    u_int32_t td:1;             /* tlp digest */
+
+    u_int32_t len_lo:8;         /* length[0:7] (dw) */
+
+    /* dword 1 */
+    u_int32_t reqid:16;         /* requester id */
+
+    u_int32_t tag:8;            /* transaction tag */
+
+    u_int32_t fbe:4;            /* first dw byte enable */
+    u_int32_t lbe:4;            /* last dw byte enable */
+
+    /* dword 2 */
+    u_int32_t addr_hi;          /* address[63:32] */
+
+    /* dword 3 */
+    u_int32_t addr_lo;          /* address[31:2] */
+} __attribute__((packed)) pcie_tlp_mem64_t;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __PCIETLP_H__ */
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/include/pmt.h b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/include/pmt.h
new file mode 100644
index 000000000..79cff5a77
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/include/pmt.h
@@ -0,0 +1,197 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (c) 2017-2018, Pensando Systems Inc.
+ */
+
+#ifndef __PCIESVC_PMT_H__
+#define __PCIESVC_PMT_H__
+
+#ifdef __cplusplus
+extern "C" {
+#if 0
+} /* close to calm emacs autoindent */
+#endif
+#endif
+
+/******************************************************************
+ * PCIe Match Table (PMT)
+ *
+ * PMT entry is the tcam entry used to match the incoming PCIe TLP.
+ * The corresponding PMR entry provides auxiliary information used
+ * in processing the transaction after the PMT match determines the
+ * entry that should be used for processing the TLP.
+ */
+
+#define PMT_COUNT       1024
+#define PMT_NWORDS      5
+#define PMR_NWORDS      4
+
+/* terminator index for chained pmts */
+#define PMT_INVALID     ((u_int16_t)-1)
+
+/*
+ * pmt_alloc priority.
+ * Lower pmtpri corresponds to lower index in tcam so higher priority.
+ */
+typedef enum pmtpri_e {
+    PMTPRI_HIGH,                        /* high priority in tcam */
+    PMTPRI_LOW,                         /* low priority in tcam */
+    PMTPRI_VF0ADJ,                      /* vf0 adjust entry */
+
+    PMTPRI_CFG = PMTPRI_HIGH,           /* cfg space pmt entry */
+    PMTPRI_BAR = PMTPRI_HIGH,           /* bar pmt entry */
+    PMTPRI_FLEXVF = PMTPRI_LOW,         /* flexvf bar pmt default entry */
+    PMTPRI_FLEXVFOVRD = PMTPRI_HIGH,    /* flexvf bar pmt override entry */
+} pmtpri_t;
+
+/* defines for PMT.type and PMR.type fields */
+#define PMT_TYPE_CFG    0       /* host cfg */
+#define PMT_TYPE_MEM    1       /* host mem bar */
+#define PMT_TYPE_RC     2       /* rc dma */
+#define PMT_TYPE_IO     5       /* host I/O bar */
+
+/* all PMTs start with these common fields */
+#define PMT_CMN_FIELDS                                    \
+    u_int64_t valid     :1;     /* entry is valid */      \
+    u_int64_t tblid     :2;     /* table id */            \
+    u_int64_t type      :3;     /* PMT_TYPE_* */          \
+    u_int64_t port      :3;     /* incoming pcie port */  \
+    u_int64_t rw        :1      /* 0=read, 1=write */
+
+/* common pmt entry format */
+typedef struct {
+    PMT_CMN_FIELDS;
+} __attribute__((packed)) pmt_cmn_format_t;
+
+/* cfg pmt entry format */
+typedef struct {
+    PMT_CMN_FIELDS;
+    u_int64_t bdf       :16;    /* bdf of tlp */
+    u_int64_t addrdw    :10;    /* config space dw address */
+    u_int64_t rsrv      :28;
+} __attribute__((packed)) pmt_cfg_format_t;
+
+/* bar pmt entry format */
+typedef struct {
+    PMT_CMN_FIELDS;
+    u_int64_t addrdw    :50;    /* tlp address */
+    u_int64_t rsrv      :4;
+} __attribute__((packed)) pmt_bar_format_t;
+
+/******************************************************************
+ * PMR entry is the RAM extension of the corresponding PMT entry
+ * containing auxiliary information used by hw after the PMT tcam
+ * match is determined.
+ */
+
+/* cfg pmr entry format */
+typedef struct {
+    u_int64_t valid     :1;     /* entry is valid */
+    u_int64_t type      :3;     /* matches PMT.type */
+    u_int64_t vfbase    :11;    /* vf base for vf id range for entry */
+    u_int64_t indirect  :1;     /* sw handles tlp */
+    u_int64_t notify    :1;     /* notify sw */
+    u_int64_t pstart    :3;     /* port     wildcard base */
+    u_int64_t bstart    :8;     /* bus      wildcard base */
+    u_int64_t dstart    :5;     /* device   wildcard base */
+    u_int64_t fstart    :3;     /* function wildcard base */
+    u_int64_t plimit    :3;     /* port     wildcard limit */
+    u_int64_t blimit    :8;     /* bus      wildcard limit */
+    u_int64_t dlimit    :5;     /* device   wildcard limit */
+    u_int64_t flimit    :3;     /* function wildcard limit */
+    u_int64_t vfstridesel:4;    /* p:bdf wildcard vf stride selector */
+    u_int64_t td        :1;     /* tlp digest, generate ecrc on completion */
+#if defined(ASIC_CAPRI)
+    u_int64_t addrdw    :34;    /* target resource address */
+#elif defined(ASIC_ELBA)
+    u_int64_t addrdw    :35;    /* target resource address */
+#else
+#error "ASIC not specified"
+#endif
+    u_int64_t aspace    :1;     /* target address space, 1=external (pcie) */
+    u_int64_t romsksel  :7;     /* read-only mask selector */
+#if defined(ASIC_CAPRI)
+    u_int64_t spare     :8;     /* implemented but unused in hw */
+#elif defined(ASIC_ELBA)
+    u_int64_t spare     :7;     /* implemented but unused in hw */
+#else
+#error "ASIC not specified"
+#endif
+    u_int64_t rsrv      :18;    /* unimplemented bits */
+} __attribute__((packed)) pmr_cfg_entry_t;
+
+/* bar pmr entry format */
+typedef struct {
+    u_int64_t valid     :1;     /* entry is valid */
+    u_int64_t type      :3;     /* matches PMT.type */
+    u_int64_t vfbase    :11;    /* vf base for vf ids valid for entry */
+    u_int64_t indirect  :1;     /* sw handles tlp */
+    u_int64_t notify    :1;     /* notify sw */
+    u_int64_t prtb      :12;    /* base  of contiguous prt entries */
+    u_int64_t prtc      :12;    /* count of contiguous prt entries */
+    u_int64_t prtsize   :5;     /* power-of-2 resource size, eg. 4=16 bytes */
+    u_int64_t vfstart   :6;     /* low  bit pos of vf field in addr */
+    u_int64_t vfend     :6;     /* high bit pos of vf field in addr */
+    u_int64_t vflimit   :11;    /* vf field upper limit */
+    u_int64_t bdf       :16;    /* bdf for completions */
+    u_int64_t td        :1;     /* tlp digest, generate ecrc on completion */
+    u_int64_t pagesize  :3;     /* encoded page size, PID bit pos start */
+    u_int64_t qtypestart:5;     /* low bit pos of 3-bit qtype */
+    u_int64_t qtypemask :3;     /* qtype mask on 3 bits at qtypestart */
+    u_int64_t qidstart  :5;     /* 32b db: low  bit pos of qid field in addr */
+    u_int64_t qidend    :5;     /* 32b db: high bit pos of qid field in addr */
+#if defined(ASIC_CAPRI)
+    u_int64_t spare     :3;     /* implemented but unused in hw */
+#elif defined(ASIC_ELBA)
+    u_int64_t hstridesel:3;     /* host stride select */
+#else
+#error "ASIC not specified"
+#endif
+    u_int64_t rsrv      :18;    /* unimplemented bits */
+} __attribute__((packed)) pmr_bar_entry_t;
+
+/* all pmt formats */
+typedef union {
+    pmt_cmn_format_t cmn;
+    pmt_cfg_format_t cfg;
+    pmt_bar_format_t bar;
+    u_int64_t all;
+} pmt_format_t;
+
+/* data and mask format used to describe pmt_tcam_t format */
+typedef struct pmt_datamask_s {
+    pmt_format_t data;
+    pmt_format_t mask;
+} pmt_datamask_t;
+
+/* tcam entry format */
+typedef struct {
+    u_int64_t x;                /* tcam x */
+    u_int64_t y;                /* tcam y */
+    u_int32_t v;                /* 1=entry valid */
+} __attribute__((packed)) pmt_tcam_t;
+
+/* tcam entry as words for reading/writing to hw */
+typedef union pmt_entry_u {
+    pmt_tcam_t tcam;
+    u_int32_t w[PMT_NWORDS];
+} pmt_entry_t;
+
+/* PMR entry format */
+typedef union {
+    pmr_cfg_entry_t cfg;
+    pmr_bar_entry_t bar;
+    u_int32_t w[PMR_NWORDS];
+} pmr_entry_t;
+
+/* full PMT/PMR entry */
+typedef struct pmt_s {
+    pmt_entry_t pmte;
+    pmr_entry_t pmre;
+} pmt_t;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __PCIESVC_PMT_H__ */
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/include/prt.h b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/include/prt.h
new file mode 100644
index 000000000..40b1b1ce0
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/include/prt.h
@@ -0,0 +1,132 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (c) 2017-2018,2021, Pensando Systems Inc.
+ */
+
+#ifndef __PCIESVC_PRT_H__
+#define __PCIESVC_PRT_H__
+
+#ifdef __cplusplus
+extern "C" {
+#if 0
+} /* close to calm emacs autoindent */
+#endif
+#endif
+
+/******************************************************************
+ * PCIe Resource Table (PRT)
+ *
+ * PRT entry is the table entry by PMT to describe
+ * bar match table resources and handling.
+ */
+
+#define PRT_COUNT       4096
+#define PRT_NWORDS      3
+
+/* terminator index for chained prts */
+#define PRT_INVALID     ((u_int16_t)-1)
+
+/* for PRT.type */
+#define PRT_TYPE_RES    0       /* resource */
+#define PRT_TYPE_DB64   1       /* 64-bit doorbells */
+#define PRT_TYPE_DB32   2       /* 32-bit doorbells */
+#define PRT_TYPE_DB16   3       /* 16-bit doorbells */
+
+/* for PRT.res.wqebpsize */
+#define PRT_WQEBP_SZ64  0       /*  64B aligned WQEs */
+#define PRT_WQEBP_SZ128 1       /* 128B aligned WQEs */
+#define PRT_WQEBP_SZ256 2       /* 256B aligned WQEs */
+#define PRT_WQEBP_SZ512 3       /* 512B aligned WQEs */
+
+/* for PRT.db.updvec */
+#define PRT_UPD_SCHED_NONE      0x00 /* no scheduler request */
+#define PRT_UPD_SCHED_EVAL      0x01 /* scheduler eval pi/ci */
+#define PRT_UPD_SCHED_CLEAR     0x02 /* scheduler clear */
+#define PRT_UPD_SCHED_SET       0x03 /* scheduler set */
+#define PRT_UPD_SCHED_MASK      0x03 /* sched bit mask */
+#define PRT_UPD_PICI_CISET      0x04 /* set ci */
+#define PRT_UPD_PICI_PISET      0x08 /* set pi */
+#define PRT_UPD_PICI_PIINC      0x0c /* increment pi */
+#define PRT_UPD_PICI_MASK       0x0c /* pici bit mask */
+#define PRT_UPD_PID_CHECK       0x10 /* check pid */
+
+#define PRT_CMN_FIELDS                                      \
+    u_int64_t valid     :1;     /* entry is valid */        \
+    u_int64_t type      :2;     /* PRT_TYPE_* */            \
+    u_int64_t indirect  :1;     /* sw handles tlp */        \
+    u_int64_t notify    :1;     /* notify sw */             \
+    u_int64_t vfstride  :5      /* power-of-2 stride added to addr */
+
+/* common prt entry format */
+typedef struct {
+    PRT_CMN_FIELDS;
+} __attribute__((packed)) prt_cmn_t;
+
+/* resource prt entry format */
+typedef struct {
+    PRT_CMN_FIELDS;
+    u_int64_t aspace    :1;     /* target address space, 1=external (pcie) */
+    u_int64_t addrdw    :50;    /* target resource address */
+    u_int64_t sizedw    :11;    /* encoded resource size */
+    u_int64_t pmvdis    :1;     /* disable Programming Model Violation check */
+#if defined(ASIC_CAPRI)
+    u_int64_t spare     :3;     /* implemented but unused in hw */
+    u_int64_t rsrv      :52;    /* unimplemented bits */
+#elif defined(ASIC_ELBA)
+    u_int64_t wqebpen   :1;     /* WQE bypass enable */
+    u_int64_t wqebpsize :2;     /* WQE bypass entry size encoded */
+    u_int64_t wqebpdben :1;     /* WQE bypass doorbell enable */
+    u_int64_t spare     :8;     /* implemented but unused in hw */
+    u_int64_t rsrv      :43;    /* unimplemented bits */
+#else
+#error "ASIC not specified"
+#endif
+} __attribute__((packed)) prt_res_t;
+
+/* db64/db32/db16 prt entry format */
+typedef struct {
+    PRT_CMN_FIELDS;
+    u_int64_t lif       :11;    /* target LIF */
+    u_int64_t updvec    :40;    /* 8x5-bit UPD field, indexed by qtype */
+    u_int64_t stridesel :2;     /* selects vfstride, 0=VF, 1={VF,LIF} */
+    u_int64_t idxshift  :2;     /* db16/32: index location in data */
+    u_int64_t idxwidth  :4;     /* db16/32: index width    in data */
+    u_int64_t qidshift  :2;     /* db16/32: qid   location in data */
+    u_int64_t qidwidth  :4;     /* db16/32: qid   width    in data */
+    u_int64_t qidsel    :1;     /* db16/32: qid source select, 0=data 1=addr */
+#if defined(ASIC_CAPRI)
+    u_int64_t rsrv      :52;    /* unimplemented bits */
+#elif defined(ASIC_ELBA)
+    u_int64_t dbbussel  :1;     /* doorbell bus select, 0=prp, 1=express */
+    u_int64_t spare     :8;     /* implemented but unused in hw */
+    u_int64_t rsrv      :43;    /* unimplemented bits */
+#else
+#error "ASIC not specified"
+#endif
+} __attribute__((packed)) prt_db_t;
+
+/* PRT entry */
+typedef union prt_u {
+    prt_cmn_t cmn;
+    prt_res_t res;
+    prt_db_t db;
+    u_int32_t w[PRT_NWORDS];
+} prt_t;
+
+static inline int
+prt_is_valid(const prt_t *prt)
+{
+    return prt->cmn.valid;
+}
+
+static inline u_int32_t
+prt_type(const prt_t *prt)
+{
+    return prt->cmn.type;
+}
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __PCIESVC_PRT_H__ */
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/include/serial_state.h b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/include/serial_state.h
new file mode 100644
index 000000000..604cb1438
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/include/serial_state.h
@@ -0,0 +1,41 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (c) 2022, Pensando Systems Inc.
+ */
+
+#ifndef __SERIAL_STATE_H__
+#define __SERIAL_STATE_H__
+
+#include "uart.h"
+
+#define MEMQ_BUFSZ    64
+
+typedef struct memq {
+    unsigned int pidx    __attribute__((aligned(64)));
+    unsigned int cidx    __attribute__((aligned(64)));
+    char buf[MEMQ_BUFSZ] __attribute__((aligned(64)));
+} memq_t;
+
+typedef struct serial_state {
+    u_int32_t intrb;            /* intr resource base */
+    u_int32_t intrc;            /* intr resource count */
+    u_int32_t gen;              /* generation number */
+    u_int32_t gen_ack;          /* generation number ack */
+    u_int32_t breakreq;         /* break request */
+    u_int32_t _unused[11];
+    memq_t txq;                 /* txq from device thr */
+    memq_t rxq;                 /* rxq to   device rbr */
+} serial_state_t;
+
+typedef struct serial_uart_state {
+    union {
+        serial_state_t serial_state;
+        u_int8_t _pad1[960];
+    };
+    union {
+        uart_state_t uart_state;
+        u_int8_t _pad2[64];
+    };
+} serial_uart_state_t;
+
+#endif /* __SERIAL_STATE_H__ */
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/include/tlpauxinfo.h b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/include/tlpauxinfo.h
new file mode 100644
index 000000000..9d275274c
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/include/tlpauxinfo.h
@@ -0,0 +1,53 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (c) 2018,2020, Pensando Systems Inc.
+ */
+
+#ifndef __TLPAUXINFO_H__
+#define __TLPAUXINFO_H__
+
+/*
+ * For indirect or notify transactions, the hardware delivers
+ * this auxiliary information along with the pcie tlp.
+ */
+typedef struct tlpauxinfo_s {
+#if defined(ASIC_CAPRI)
+    uint64_t direct_endaddr     :6;
+#elif defined(ASIC_ELBA)
+    uint64_t spare              :3;
+    uint64_t wqebpdbxen         :1;
+    uint64_t wqebpsize          :2;
+#else
+#error "ASIC not specified"
+#endif
+    uint64_t direct_blen        :4;
+    uint64_t is_indirect        :1;
+    uint64_t is_direct          :1;
+    uint64_t is_ur              :1;
+    uint64_t is_ca              :1;
+    uint64_t romsksel           :7;
+    uint64_t context_id         :7;
+    uint64_t vfid               :11;
+    uint64_t is_notify          :1;
+    uint64_t direct_size        :9;
+    uint64_t direct_addr        :52;
+    uint64_t aspace             :1;
+    uint64_t pmti               :10;
+    uint64_t pmt_hit            :1;
+    uint64_t indirect_reason    :5;
+    uint64_t is_host            :1;
+    uint64_t axilen             :4;
+#if defined(ASIC_CAPRI)
+    uint64_t rsrv               :3;
+#elif defined(ASIC_ELBA)
+    uint64_t rsrv               :1;
+    uint64_t wqetype            :1;     /* wqe type, 0=wqe, 1=doorbell */
+    uint64_t wqebpdben          :1;     /* wqe bypass doorbell enable */
+#else
+#error "ASIC not specified"
+#endif
+    uint64_t eop                :1;
+    uint64_t sop                :1;
+} __attribute__((packed)) tlpauxinfo_t;
+
+#endif /* __TLPAUXINFO_H__ */
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/include/uart.h b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/include/uart.h
new file mode 100644
index 000000000..2718a6cf1
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/include/uart.h
@@ -0,0 +1,127 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (c) 2022, Pensando Systems Inc.
+ */
+
+#ifndef __UART_H__
+#define __UART_H__
+
+/*
+ * UART definitions
+ */
+typedef struct uart_state {
+    uint8_t rbr;                 /* reg0: receive register (read) */
+    uint8_t thr;                 /* reg0: transmit holding register (write) */
+    uint8_t ier;                 /* reg1: interrupt enable register */
+    uint8_t iir;                 /* reg2: interrupt id register (read) */
+    uint8_t fcr;                 /* reg2: fifo control register (write) */
+    uint8_t lcr;                 /* reg3: line control register */
+    uint8_t mcr;                 /* reg4: modem control register */
+    uint8_t lsr;                 /* reg5: line status register */
+    uint8_t msr;                 /* reg6: modem status register */
+    uint8_t scr;                 /* reg7: scratch register */
+    int thr_ipending;
+    uint16_t divider;
+    int parity;
+    int data_bits;
+    int stop_bits;
+    uint8_t recv_fifo_itl;       /* interrupt trigger level */
+    uint8_t mcr_read;
+    uint8_t mcr_write;
+    int flags;
+} uart_state_t;
+
+
+enum uart_regs {
+    UART_RX_BUF = 0,
+    UART_TX_BUF = 0,
+    UART_INTERRUPT_ENABLE = 1,
+    UART_INTERRUPT_ID = 2,
+    UART_FIFO_CONTROL = 2,
+    UART_LINE_CONTROL = 3,
+    UART_MODEM_CONTROL = 4,
+    UART_LINE_STATUS = 5,
+    UART_MODEM_STATUS = 6,
+    UART_SCRATCH = 7,
+};
+
+#define UART_LCR_BRK    0x40    /* Set Break Enable */
+#define UART_LCR_DLAB   0x80    /* Divisor latch access bit */
+
+/*
+ * Interrupt Enable Register (offset 0x1)
+ */
+#define UART_IER_MSI    0x08    /* Enable Modem status interrupt */
+#define UART_IER_RLSI   0x04    /* Enable receiver line status interrupt */
+#define UART_IER_THRI   0x02    /* Enable Transmitter holding register int. */
+#define UART_IER_RDI    0x01    /* Enable receiver data interrupt */
+
+/*
+ * Interrupt Identification Register (offset 0x2) - read
+ */
+#define UART_IIR_NO_INT 0x01    /* No interrupts pending */
+#define UART_IIR_ID     0x06    /* Mask for the interrupt ID */
+
+#define UART_IIR_MSI    0x00    /* Modem status interrupt */
+#define UART_IIR_THRI   0x02    /* Transmitter holding register empty */
+#define UART_IIR_RDI    0x04    /* Receiver data interrupt */
+#define UART_IIR_RLSI   0x06    /* Receiver line status interrupt */
+#define UART_IIR_CTI    0x0C    /* Character Timeout Indication */
+
+#define UART_IIR_FENF   0x80    /* Fifo enabled, but not functionning */
+#define UART_IIR_FE     0xC0    /* Fifo enabled */
+
+/*
+ * FIFO Control Register (offset 0x2) - write
+ */
+#define UART_FCR_ITL_1  0x00    /* 1 byte ITL */
+#define UART_FCR_ITL_2  0x40    /* 4 bytes ITL */
+#define UART_FCR_ITL_3  0x80    /* 8 bytes ITL */
+#define UART_FCR_ITL_4  0xC0    /* 14 bytes ITL */
+#define UART_FCR_DMS    0x08    /* DMA Mode Select */
+#define UART_FCR_XFR    0x04    /* XMIT Fifo Reset */
+#define UART_FCR_RFR    0x02    /* RCVR Fifo Reset */
+#define UART_FCR_FE     0x01    /* FIFO Enable */
+
+/*
+ * Modem Control Register (offset 0x4)
+ */
+#define UART_MCR_LOOP   0x10    /* Enable loopback test mode */
+#define UART_MCR_OUT2   0x08    /* Out2 complement */
+#define UART_MCR_OUT1   0x04    /* Out1 complement */
+#define UART_MCR_RTS    0x02    /* RTS complement */
+#define UART_MCR_DTR    0x01    /* DTR complement */
+
+/*
+ * Line Status Register (offset 0x5)
+ */
+#define UART_LSR_TEMT   0x40    /* Transmitter empty */
+#define UART_LSR_THRE   0x20    /* Transmit-hold-register empty */
+#define UART_LSR_BI     0x10    /* Break interrupt indicator */
+#define UART_LSR_FE     0x08    /* Frame error indicator */
+#define UART_LSR_PE     0x04    /* Parity error indicator */
+#define UART_LSR_OE     0x02    /* Overrun error indicator */
+#define UART_LSR_DR     0x01    /* Receiver data ready */
+#define UART_LSR_INT_ANY 0x1E   /* Any of the lsr-interrupt-triggering bits */
+
+/*
+ * Modem Status Register (offset 0x6)
+ */
+#define UART_MSR_DCD    0x80    /* Data Carrier Detect */
+#define UART_MSR_RI     0x40    /* Ring Indicator */
+#define UART_MSR_DSR    0x20    /* Data Set Ready */
+#define UART_MSR_CTS    0x10    /* Clear to Send */
+#define UART_MSR_DDCD   0x08    /* Delta DCD */
+#define UART_MSR_TERI   0x04    /* Trailing edge ring indicator */
+#define UART_MSR_DDSR   0x02    /* Delta DSR */
+#define UART_MSR_DCTS   0x01    /* Delta CTS */
+#define UART_MSR_ANY_DELTA 0x0F /* Any of the delta bits! */
+
+#define CHR_TIOCM_CTS   0x020
+#define CHR_TIOCM_CAR   0x040
+#define CHR_TIOCM_DSR   0x100
+#define CHR_TIOCM_RI    0x080
+#define CHR_TIOCM_DTR   0x002
+#define CHR_TIOCM_RTS   0x004
+
+#endif /* __UART_H__ */
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/include/virtio_spec.h b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/include/virtio_spec.h
new file mode 100644
index 000000000..4ff97fbcc
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/include/virtio_spec.h
@@ -0,0 +1,240 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (c) 2022, Pensando Systems Inc.
+ */
+#ifndef __VIRTIO_SPEC_H__
+#define __VIRTIO_SPEC_H__
+
+#ifdef __cplusplus
+extern "C" {
+#if 0
+} /* close to calm emacs autoindent */
+#endif
+#endif
+
+#ifndef BIT
+#define BIT(nr)                 (1UL << (nr))
+#endif
+#ifndef BIT_ULL
+#define BIT_ULL(nr)             (1ULL << (nr))
+#endif
+#ifndef BIT_MASK
+#define BIT_MASK(nr)            (1UL << (nr))
+#endif
+#ifndef BITS_PER_BYTE
+#define BITS_PER_BYTE           (8)
+#endif
+
+/* 4.1.4.3 - common configuration structure layout */
+
+/* upper bounds, non-inclusive, for indirect access via select registers */
+enum {
+    VIRTIO_PCI_FEATURE_SELECT_COUNT = 2,
+    VIRTIO_PCI_QUEUE_SELECT_COUNT = 128,
+};
+
+/* feature config, for indirect access via select register */
+typedef uint32_t virtio_pci_feature_cfg_t;
+
+/* virtqueue config, for indirect access via select register */
+typedef struct virtio_pci_queue_cfg {
+    uint16_t                    queue_size;
+    uint16_t                    queue_msix_vector;
+    uint16_t                    queue_enable;
+    uint16_t                    queue_notify_off;
+    uint32_t                    queue_desc_lo;
+    uint32_t                    queue_desc_hi;
+    uint32_t                    queue_avail_lo;
+    uint32_t                    queue_avail_hi;
+    uint32_t                    queue_used_lo;
+    uint32_t                    queue_used_hi;
+} __attribute__((packed)) virtio_pci_queue_cfg_t;
+
+/* common config, with dummy fields in place of indirect access */
+typedef struct virtio_pci_common_cfg {
+    uint32_t                    device_feature_select;
+    virtio_pci_feature_cfg_t    device_feature; // indirect
+    uint32_t                    driver_feature_select;
+    virtio_pci_feature_cfg_t    driver_feature; // indirect
+    uint16_t                    config_msix_vector;
+    uint16_t                    num_queues;
+    uint8_t                     device_status;
+    uint8_t                     config_generation;
+    uint16_t                    queue_select;
+    union {
+        virtio_pci_queue_cfg_t  queue_cfg; // indirect
+        /* indirect features are hidden behind unused queue_cfg */
+        struct {
+            virtio_pci_feature_cfg_t device_feature_cfg[VIRTIO_PCI_FEATURE_SELECT_COUNT];
+            virtio_pci_feature_cfg_t driver_feature_cfg[VIRTIO_PCI_FEATURE_SELECT_COUNT];
+            /* pciemgr observed device status nonzero -> zero */
+            uint8_t need_reset;
+        };
+    };
+} __attribute__((packed)) virtio_pci_common_cfg_t;
+
+typedef struct virtio_net_config {
+    /* The config defining mac address (if VIRTIO_NET_F_MAC) */
+    uint8_t mac[6];
+
+    /* See VIRTIO_NET_F_STATUS and VIRTIO_NET_S_* above */
+    uint16_t status;
+
+    /* Maximum number of each of transmit and receive queues;
+     * see VIRTIO_NET_F_MQ and VIRTIO_NET_CTRL_MQ.
+     * Legal values are between 1 and 0x8000
+     */
+    uint16_t max_virtqueue_pairs;
+
+    /* Default maximum transmit unit advice */
+    uint16_t mtu;
+
+    /* Speed, in units of 1Mb. All values 0 to INT_MAX are legal.
+     * Any other value stands for unknown.
+     */
+    uint32_t speed;
+
+    /* 0x00 - half duplex
+     * 0x01 - full duplex
+     * Any other value stands for unknown.
+     */
+    uint8_t duplex;
+
+    /* maximum size of RSS key */
+    uint8_t rss_max_key_size;
+
+    /* maximum number of indirection table entries */
+    uint16_t rss_max_indirection_table_length;
+
+    /* bitmask of supported VIRTIO_NET_RSS_HASH_ types */
+    uint32_t supported_hash_types;
+} __attribute__((packed)) virtio_net_config_t;
+
+/* 2.1 - device status field */
+enum {
+    VIRTIO_S_ACKNOWLEDGE                = (1u << 0),
+    VIRTIO_S_DRIVER                     = (1u << 1),
+    VIRTIO_S_DRIVER_OK                  = (1u << 2),
+    VIRTIO_S_FEATURES_OK                = (1u << 3),
+    VIRTIO_S_NEEDS_RESET                = (1u << 6),
+    VIRTIO_S_FAILED                     = (1u << 7),
+};
+
+/* 5.1.3 - network device - feature bits */
+enum {
+    VIRTIO_NET_F_CSUM                   = (1ull << 0),
+    VIRTIO_NET_F_GUEST_CSUM             = (1ull << 1),
+    VIRTIO_NET_F_CTRL_GUEST_OFFLOADS    = (1ull << 2),
+    VIRTIO_NET_F_MTU                    = (1ull << 3),
+    VIRTIO_NET_F_MAC                    = (1ull << 5),
+    VIRTIO_NET_F_GSO                    = (1ull << 6),
+    VIRTIO_NET_F_GUEST_TSO4             = (1ull << 7),
+    VIRTIO_NET_F_GUEST_TSO6             = (1ull << 8),
+    VIRTIO_NET_F_GUEST_ECN              = (1ull << 9),
+    VIRTIO_NET_F_GUEST_UFO              = (1ull << 10),
+    VIRTIO_NET_F_HOST_TSO4              = (1ull << 11),
+    VIRTIO_NET_F_HOST_TSO6              = (1ull << 12),
+    VIRTIO_NET_F_HOST_ECN               = (1ull << 13),
+    VIRTIO_NET_F_HOST_UFO               = (1ull << 14),
+    VIRTIO_NET_F_MRG_RXBUF              = (1ull << 15),
+    VIRTIO_NET_F_STATUS                 = (1ull << 16),
+    VIRTIO_NET_F_CTRL_VQ                = (1ull << 17),
+    VIRTIO_NET_F_CTRL_RX                = (1ull << 18),
+    VIRTIO_NET_F_CTRL_VLAN              = (1ull << 19),
+    VIRTIO_NET_F_CTRL_RX_EXTRA          = (1ull << 20),
+    VIRTIO_NET_F_GUEST_ANNOUNCE         = (1ull << 21),
+    VIRTIO_NET_F_MQ                     = (1ull << 22),
+    VIRTIO_NET_F_CTRL_MAC_ADDR          = (1ull << 23),
+    VIRTIO_NET_F_NOTF_COAL              = (1ull << 53),
+    VIRTIO_NET_F_HASH_REPORT            = (1ull << 57),
+    VIRTIO_NET_F_RSS                    = (1ull << 60),
+    VIRTIO_NET_F_RSS_EXT                = (1ull << 61),
+    VIRTIO_NET_F_STANDBY                = (1ull << 62),
+    VIRTIO_NET_F_SPEED_DUPLEX           = (1ull << 63),
+};
+
+/* 6 - reserved feature bits */
+enum {
+    VIRTIO_F_NOTIFY_ON_EMPTY            = (1ull << 24),
+    VIRTIO_F_ANY_LAYOUT                 = (1ull << 27),
+    VIRTIO_F_RING_INDIRECT_DESC         = (1ull << 28),
+    VIRTIO_F_RING_EVENT_IDX             = (1ull << 29),
+    VIRTIO_F_UNUSED                     = (1ull << 30),
+    VIRTIO_F_VERSION_1                  = (1ull << 32),
+    VIRTIO_F_ACCESS_PLATFORM            = (1ull << 33),
+    VIRTIO_F_RING_PACKED                = (1ull << 34),
+    VIRTIO_F_IN_ORDER                   = (1ull << 35),
+    VIRTIO_F_ORDER_PLATFORM             = (1ull << 36),
+    VIRTIO_F_SR_IOV                     = (1ull << 37),
+    VIRTIO_F_NOTIFICATION_DATA          = (1ull << 38),
+};
+
+/* supported/enabled hash types */
+enum {
+    VIRTIO_NET_RSS_HASH_TYPE_IPv4       = (1u << 0),
+    VIRTIO_NET_RSS_HASH_TYPE_TCPv4      = (1u << 1),
+    VIRTIO_NET_RSS_HASH_TYPE_UDPv4      = (1u << 2),
+    VIRTIO_NET_RSS_HASH_TYPE_IPv6       = (1u << 3),
+    VIRTIO_NET_RSS_HASH_TYPE_TCPv6      = (1u << 4),
+    VIRTIO_NET_RSS_HASH_TYPE_UDPv6      = (1u << 5),
+    VIRTIO_NET_RSS_HASH_TYPE_IP_EX      = (1u << 6),
+    VIRTIO_NET_RSS_HASH_TYPE_TCP_EX     = (1u << 7),
+    VIRTIO_NET_RSS_HASH_TYPE_UDP_EX     = (1u << 8),
+};
+
+struct virtio_pci_notify_reg {
+    uint8_t inc_pi_dbell[512];
+    uint8_t set_pi_dbell[512];
+};
+
+#define VIRTIO_NOTIFY_MULTIPLIER 4
+
+struct virtio_ident_reg {
+    uint64_t hw_features;
+    uint16_t max_vqs;
+    uint16_t max_qlen;
+    uint16_t min_qlen;
+};
+
+struct virtio_dev_regs {
+    union {
+        struct virtio_pci_common_cfg cmn_cfg;
+        uint8_t part0[256];
+    };
+    union {
+        struct virtio_net_config net_cfg;
+        uint8_t dev_cfg[256];
+        uint8_t part1[256];
+    };
+    union {
+        struct virtio_ident_reg ident;
+        uint8_t part2[512];
+    };
+    union {
+        struct virtio_pci_notify_reg notify_reg;
+        uint8_t part3[1024];
+    };
+    union {
+        uint8_t isr_cfg[2048];
+        uint8_t part4[2048];
+    };
+    /* indirect queue configs */
+    struct virtio_pci_queue_cfg queue_cfg[VIRTIO_PCI_QUEUE_SELECT_COUNT];
+} __attribute__((packed));
+
+#define VIRTIO_DEV_REG_OFF(fld) offsetof(struct virtio_dev_regs, fld)
+#define VIRTIO_DEV_REG_SZ(fld) sizeof(((struct virtio_dev_regs *)0)->fld)
+#define VIRTIO_DEV_REG_ADDR(base, fld) ((base) + VIRTIO_DEV_REG_OFF(fld))
+
+struct pvirtq_desc {
+    uint64_t addr;      /* Buffer Address. */
+    uint32_t len;       /* Buffer Length. */
+    uint16_t id;        /* Buffer ID. */
+    uint16_t flags;     /* The flags depending on descriptor type. */
+};
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __VIRTIO_SPEC_H__ */
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/asic_regs.h b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/asic_regs.h
new file mode 100644
index 000000000..98f0ae15b
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/asic_regs.h
@@ -0,0 +1,16 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (c) 2021, Pensando Systems Inc.
+ */
+
+#ifndef __ASIC_REGS_H__
+#define __ASIC_REGS_H__
+
+#ifdef ASIC_CAPRI
+#include "asic_regs_capri.h"
+#endif
+#ifdef ASIC_ELBA
+#include "asic_regs_elba.h"
+#endif
+
+#endif /* __ASIC_REGS_H__ */
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/asic_regs_capri.h b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/asic_regs_capri.h
new file mode 100644
index 000000000..67b6b058e
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/asic_regs_capri.h
@@ -0,0 +1,66 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (c) 2021-2022, Pensando Systems Inc.
+ */
+
+#ifndef __ASIC_REGS_CAPRI_H__
+#define __ASIC_REGS_CAPRI_H__
+
+#ifdef __cplusplus
+extern "C" {
+#if 0
+} /* close to calm emacs autoindent */
+#endif
+#endif
+
+#define ASIC_(REG)      CAP_ ##REG
+#define PXB_(REG) \
+    (CAP_ADDR_BASE_PXB_PXB_OFFSET + CAP_PXB_CSR_ ##REG## _BYTE_ADDRESS)
+#define PXC_(REG, pn) \
+    (CAP_ADDR_BASE_PP_PP_OFFSET + \
+     ((pn) * CAP_PXC_CSR_BYTE_SIZE) + \
+     CAP_PP_CSR_PORT_C_ ##REG## _BYTE_ADDRESS)
+
+/* cap_top_csr_defines.h */
+#define CAP_ADDR_BASE_INTR_INTR_OFFSET 0x6000000
+#define CAP_ADDR_BASE_PP_PP_OFFSET 0x7000000
+#define CAP_ADDR_BASE_PXB_PXB_OFFSET 0x7100000
+
+/* cap_pxb_c_hdr.h */
+#define CAP_PXB_CSR_DHS_ITR_PCIHDRT_BYTE_ADDRESS 0x8000
+#define CAP_PXB_CSR_DHS_TGT_NOTIFY_BYTE_ADDRESS 0x9a000
+#define CAP_PXB_CSR_DHS_TGT_PMT_BYTE_ADDRESS 0x18000
+#define CAP_PXB_CSR_DHS_TGT_PMR_BYTE_ADDRESS 0x20000
+#define CAP_PXB_CSR_DHS_TGT_PRT_BYTE_ADDRESS 0x30000
+#define CAP_PXB_CSR_DHS_TGT_AXIMST0_BYTE_ADDRESS 0x62000
+#define CAP_PXB_CSR_DHS_TGT_AXIMST1_BYTE_ADDRESS 0x63000
+#define CAP_PXB_CSR_DHS_TGT_IND_RSP_ENTRY_BYTE_ADDRESS 0x9a020
+#define CAP_PXB_CSR_CFG_TGT_REQ_NOTIFY_INT_BYTE_ADDRESS 0x9a120
+#define CAP_PXB_CSR_CFG_TGT_REQ_NOTIFY_RING_SIZE_BYTE_ADDRESS 0x9a130
+#define CAP_PXB_CSR_CFG_TGT_REQ_INDIRECT_INT_BYTE_ADDRESS 0x9a140
+#define CAP_PXB_CSR_CFG_TGT_NOTIFY_EN_BYTE_ADDRESS 0x9a184
+#define CAP_PXB_CSR_CFG_TGT_PMT_GRST_BYTE_ADDRESS 0x9a204
+#define CAP_PXB_CSR_STA_TGT_IND_INFO_BYTE_ADDRESS 0x9a320
+#define CAP_PXB_CSR_DHS_ITR_PCIHDRT_ENTRIES 0x800
+#define CAP_PXB_CSR_DHS_ITR_PCIHDRT_ENTRY_BYTE_SIZE 0x10
+#define CAP_PXB_CSR_DHS_TGT_PMT_ENTRY_ARRAY_ELEMENT_SIZE 0x1
+#define CAP_PXB_CSR_DHS_TGT_PMR_ENTRY_BYTE_SIZE 0x10
+#define CAP_PXB_CSR_DHS_TGT_PRT_ENTRY_BYTE_SIZE 0x10
+
+/* cap_pp_c_hdr.h */
+#define CAP_PXC_CSR_BYTE_SIZE 0x2000
+#define CAP_PP_CSR_PORT_C_DHS_C_MAC_APB_ENTRY_BYTE_ADDRESS 0x10000
+
+/* cap_intr_c_hdr.h */
+#define CAP_INTR_CSR_DHS_INTR_ASSERT_ENTRY_ARRAY_COUNT 0x1000
+#define CAP_INTR_CSR_DHS_INTR_MSIXCFG_BYTE_OFFSET 0x10000
+#define CAP_INTR_CSR_DHS_INTR_FWCFG_BYTE_OFFSET 0x20000
+#define CAP_INTR_CSR_DHS_INTR_DRVCFG_BYTE_OFFSET 0x40000
+#define CAP_INTR_CSR_DHS_INTR_ASSERT_BYTE_OFFSET 0x68000
+#define CAP_INTR_CSR_DHS_INTR_STATE_BYTE_OFFSET 0x70000
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __ASIC_REGS_CAPRI_H__ */
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/asic_regs_elba.h b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/asic_regs_elba.h
new file mode 100644
index 000000000..c2e50cfed
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/asic_regs_elba.h
@@ -0,0 +1,67 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (c) 2021-2022, Pensando Systems Inc.
+ */
+
+#ifndef __ASIC_REGS_ELBA_H__
+#define __ASIC_REGS_ELBA_H__
+
+#ifdef __cplusplus
+extern "C" {
+#if 0
+} /* close to calm emacs autoindent */
+#endif
+#endif
+
+#define ASIC_(REG)      ELB_ ##REG
+#define PXB_(REG) \
+    (ELB_ADDR_BASE_PXB_PXB_OFFSET + ELB_PXB_CSR_ ##REG## _BYTE_ADDRESS)
+#define _PXC_BASE(pn) \
+    (ELB_ADDR_BASE_PP_PXC_0_OFFSET + \
+     ((pn) * ELB_ADDR_BASE_PP_PXC_0_SIZE))
+#define PXC_(REG, pn) \
+    (_PXC_BASE(pn) + ELB_PXC_CSR_ ##REG## _BYTE_ADDRESS)
+
+/* elb_top_csr_defines.h */
+#define ELB_ADDR_BASE_PXB_PXB_OFFSET 0x20000000
+#define ELB_ADDR_BASE_PP_PXC_0_OFFSET 0x20100000
+#define ELB_ADDR_BASE_PP_PXC_0_SIZE 0x40000
+#define ELB_ADDR_BASE_INTR_INTR_OFFSET 0x61800000
+
+/* elb_pxb_c_hdr.h */
+#define ELB_PXB_CSR_DHS_TGT_NOTIFY_BYTE_ADDRESS 0xc4000
+#define ELB_PXB_CSR_DHS_ITR_PCIHDRT_BYTE_ADDRESS 0x8000
+#define ELB_PXB_CSR_DHS_TGT_PMT_BYTE_ADDRESS 0x18000
+#define ELB_PXB_CSR_DHS_TGT_PMR_BYTE_ADDRESS 0x20000
+#define ELB_PXB_CSR_DHS_TGT_PRT_BYTE_ADDRESS 0x30000
+#define ELB_PXB_CSR_DHS_TGT_AXIMST0_BYTE_ADDRESS 0x62000
+#define ELB_PXB_CSR_DHS_TGT_AXIMST1_BYTE_ADDRESS 0x63000
+#define ELB_PXB_CSR_DHS_TGT_IND_RSP_ENTRY_BYTE_ADDRESS 0xc4020
+#define ELB_PXB_CSR_CFG_TGT_REQ_NOTIFY_INT_BYTE_ADDRESS 0xc4160
+#define ELB_PXB_CSR_CFG_TGT_REQ_NOTIFY_RING_SIZE_BYTE_ADDRESS 0xc4170
+#define ELB_PXB_CSR_CFG_TGT_REQ_INDIRECT_INT_BYTE_ADDRESS 0xc4180
+#define ELB_PXB_CSR_CFG_TGT_NOTIFY_EN_BYTE_ADDRESS 0xc41c4
+#define ELB_PXB_CSR_CFG_TGT_PMT_GRST_BYTE_ADDRESS 0xc4244
+#define ELB_PXB_CSR_STA_TGT_IND_INFO_BYTE_ADDRESS 0xc43c0
+#define ELB_PXB_CSR_DHS_ITR_PCIHDRT_ENTRIES 0x800
+#define ELB_PXB_CSR_DHS_ITR_PCIHDRT_ENTRY_BYTE_SIZE 0x10
+#define ELB_PXB_CSR_DHS_TGT_PMT_ENTRY_ARRAY_ELEMENT_SIZE 0x1
+#define ELB_PXB_CSR_DHS_TGT_PMR_ENTRY_BYTE_SIZE 0x10
+#define ELB_PXB_CSR_DHS_TGT_PRT_ENTRY_BYTE_SIZE 0x10
+
+/* elb_pxc_c_hdr.h */
+#define ELB_PXC_CSR_DHS_C_MAC_APB_ENTRY_BYTE_ADDRESS 0x1000
+
+/* elb_intr_c_hdr.h */
+#define ELB_INTR_CSR_DHS_INTR_ASSERT_ENTRY_ARRAY_COUNT 0x2000
+#define ELB_INTR_CSR_DHS_INTR_MSIXCFG_BYTE_OFFSET 0x20000
+#define ELB_INTR_CSR_DHS_INTR_FWCFG_BYTE_OFFSET 0x40000
+#define ELB_INTR_CSR_DHS_INTR_DRVCFG_BYTE_OFFSET 0x80000
+#define ELB_INTR_CSR_DHS_INTR_ASSERT_BYTE_OFFSET 0xd0000
+#define ELB_INTR_CSR_DHS_INTR_STATE_BYTE_OFFSET 0xe0000
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __ASIC_REGS_ELBA_H__ */
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/bar.c b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/bar.c
new file mode 100644
index 000000000..a21143f91
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/bar.c
@@ -0,0 +1,244 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2017-2018,2020-2022, Pensando Systems Inc.
+ */
+
+#include "pciesvc_impl.h"
+#include "pcietlp.h"
+#include "indirect.h"
+#include "notify.h"
+#include "serial.h"
+#include "virtio.h"
+#include "pmt.h"
+
+static pciehwbar_t *
+pciehw_bar_get(pciehwdev_t *phwdev, const int idx)
+{
+    if (idx < 0 || idx > 7) return NULL;
+    if (idx == 7) return &phwdev->rombar;
+    return &phwdev->bar[idx];
+}
+
+u_int64_t
+pciehw_bar_getsize(pciehwbar_t *phwbar)
+{
+    if (!phwbar->valid) return 0;
+    return phwbar->size;
+}
+
+void
+pciehw_bar_setaddr(pciehwbar_t *phwbar, const u_int64_t addr)
+{
+    if (phwbar->addr != addr) {
+        phwbar->addr = addr;
+        pciehw_pmt_setaddr(phwbar, addr);
+    }
+}
+
+void
+pciehw_bar_load(pciehwdev_t *phwdev, pciehwbar_t *phwbar)
+{
+    if (!phwbar->loaded) {
+#ifdef PCIEMGR_DEBUG
+        const pciehwdev_t *phwdev = pciehwdev_get(owner);
+        pciesvc_logdebug("%s: bar %d pmt %d loaded\n",
+                         pciehwdev_get_name(phwdev),
+                         phwbar->cfgidx, phwbar->pmtb);
+        pciehwdev_put(phwdev, CLEAN);
+#endif
+        phwbar->bdf = pciehwdev_get_hostbdf(phwdev);
+        pciehw_bar_load_pmts(phwbar);
+        phwbar->loaded = 1;
+    }
+}
+
+void
+pciehw_bar_unload(pciehwdev_t *phwdev, pciehwbar_t *phwbar)
+{
+    if (phwbar->loaded) {
+#ifdef PCIEMGR_DEBUG
+        const pciehwdev_t *phwdev = pciehwdev_get(owner);
+        pciesvc_logdebug("%s: bar %d pmt %d unloaded\n",
+                         pciehwdev_get_name(phwdev),
+                         phwbar->cfgidx, phwbar->pmtb);
+        pciehwdev_put(phwdev, CLEAN);
+#endif
+        pciehw_bar_unload_pmts(phwbar);
+        phwbar->loaded = 0;
+    }
+}
+
+void
+pciehw_bar_enable(pciehwdev_t *phwdev, pciehwbar_t *phwbar, const int on)
+{
+    if (on) {
+        pciehw_bar_load(phwdev, phwbar);
+    } else {
+        pciehw_bar_unload(phwdev, phwbar);
+    }
+}
+
+static void
+pciehw_barrw_notify(const pciesvc_event_t evtype,
+                    const int port,
+                    pciehwdev_t *phwdev,
+                    const pcie_stlp_t *stlp,
+                    const tlpauxinfo_t *info,
+                    const pciehw_spmt_t *spmt)
+{
+    const pciehwbar_t *phwbar = pciehw_bar_get(phwdev, spmt->cfgidx);
+    pciesvc_eventdata_t evd;
+    pciesvc_memrw_notify_t *memrw;
+
+    pciesvc_memset(&evd, 0, sizeof(evd));
+    evd.evtype = evtype;
+    evd.port = port;
+    evd.lif = phwdev->lifb;
+    memrw = &evd.memrw_notify;
+    memrw->baraddr = stlp->addr;
+    memrw->cfgidx = spmt->cfgidx;
+    memrw->baroffset = stlp->addr - phwbar->addr;
+    memrw->size = stlp->size;
+    memrw->localpa = info->direct_addr;
+    memrw->data = stlp->data; /* data, if write or hacked in */
+    pciesvc_event_handler(&evd, sizeof(evd));
+}
+
+void
+pciehw_barrd_notify(const int port, notify_entry_t *nentry)
+{
+    const tlpauxinfo_t *info = &nentry->info;
+    const pciehw_spmt_t *spmt = pciesvc_spmt_get(info->pmti);
+    pciehwdev_t *phwdev = pciehwdev_get(spmt->owner);
+    pcie_stlp_t stlpbuf, *stlp = &stlpbuf;
+
+    pcietlp_decode(stlp, nentry->rtlp, sizeof(nentry->rtlp));
+
+    pciehw_barrw_notify(PCIESVC_EV_MEMRD_NOTIFY,
+                        port, phwdev, stlp, info, spmt);
+
+    pciehwdev_put(phwdev, CLEAN);
+    pciesvc_spmt_put(spmt, CLEAN);
+}
+
+void
+pciehw_barwr_notify(const int port, notify_entry_t *nentry)
+{
+    const tlpauxinfo_t *info = &nentry->info;
+    const pciehw_spmt_t *spmt = pciesvc_spmt_get(info->pmti);
+    pciehwdev_t *phwdev = pciehwdev_get(spmt->owner);
+    pcie_stlp_t stlpbuf, *stlp = &stlpbuf;
+
+    pcietlp_decode(stlp, nentry->rtlp, sizeof(nentry->rtlp));
+
+    pciehw_barrw_notify(PCIESVC_EV_MEMWR_NOTIFY,
+                        port, phwdev, stlp, info, spmt);
+
+    pciehwdev_put(phwdev, CLEAN);
+    pciesvc_spmt_put(spmt, CLEAN);
+}
+
+void
+pciehw_barrd_indirect(const int port, indirect_entry_t *ientry)
+{
+    const tlpauxinfo_t *info = &ientry->info;
+    const pciehw_spmt_t *spmt = pciesvc_spmt_get(info->pmti);
+    pciehwdev_t *phwdev = pciehwdev_get(spmt->owner);
+    const pciehwbar_t *phwbar = pciehw_bar_get(phwdev, spmt->cfgidx);
+
+    switch (phwbar->hnd) {
+
+    case PCIEHW_BARHND_SERIAL: {
+        pcie_stlp_t stlpbuf, *stlp = &stlpbuf;
+        u_int64_t baroff;
+
+        pcietlp_decode(stlp, ientry->rtlp, sizeof(ientry->rtlp));
+        baroff = stlp->addr - phwbar->addr;
+        ientry->data[0] = serial_barrd(phwdev, baroff, info->direct_size);
+        break;
+    }
+
+    case PCIEHW_BARHND_VIRTIO: {
+        pcie_stlp_t stlpbuf, *stlp = &stlpbuf;
+        u_int64_t baroff;
+        u_int8_t do_notify = 0;
+
+        pcietlp_decode(stlp, ientry->rtlp, sizeof(ientry->rtlp));
+        baroff = stlp->addr - phwbar->addr;
+        ientry->data[0] = virtio_barrd(phwdev, info->direct_addr, baroff,
+                            info->direct_size, &do_notify);
+
+        stlp->data = ientry->data[0]; // HACK so logging shows real value
+
+        if (do_notify) {
+            pciehw_barrw_notify(PCIESVC_EV_MEMRD_NOTIFY,
+                       port, phwdev, stlp, info, spmt);
+        }
+
+        break;
+    }
+
+    default: {
+        u_int64_t pa = info->direct_addr;
+        size_t sz = info->direct_size;
+
+        pciesvc_mem_rd(pa, ientry->data, sz);
+        break;
+    }
+    }
+    pciehwdev_put(phwdev, CLEAN);
+    pciesvc_spmt_put(spmt, CLEAN);
+
+    pciehw_indirect_complete(ientry);
+}
+
+void
+pciehw_barwr_indirect(const int port, indirect_entry_t *ientry)
+{
+    const tlpauxinfo_t *info = &ientry->info;
+    const pciehw_spmt_t *spmt = pciesvc_spmt_get(info->pmti);
+    pciehwdev_t *phwdev = pciehwdev_get(spmt->owner);
+    const pciehwbar_t *phwbar = pciehw_bar_get(phwdev, spmt->cfgidx);
+    pcie_stlp_t stlpbuf, *stlp = &stlpbuf;
+
+    pcietlp_decode(stlp, ientry->rtlp, sizeof(ientry->rtlp));
+
+    switch (phwbar->hnd) {
+
+    case PCIEHW_BARHND_SERIAL: {
+        const u_int64_t baroff = stlp->addr - phwbar->addr;
+        const u_int32_t size = info->direct_size;
+
+        serial_barwr(phwdev, baroff, size, stlp->data);
+        break;
+    }
+
+    case PCIEHW_BARHND_VIRTIO: {
+        const u_int64_t baroff = stlp->addr - phwbar->addr;
+        const u_int32_t size = info->direct_size;
+        u_int8_t do_notify = 0;
+
+        virtio_barwr(phwdev, info->direct_addr, baroff, size, stlp->data,
+                     &do_notify);
+
+        if (do_notify) {
+            pciehw_barrw_notify(PCIESVC_EV_MEMWR_NOTIFY,
+                                port, phwdev, stlp, info, spmt);
+        }
+
+        break;
+    }
+
+    default: {
+        u_int64_t pa = info->direct_addr;
+        size_t sz = info->direct_size;
+
+        pciesvc_mem_wr(pa, &stlp->data, sz);
+        break;
+    }
+    }
+    pciehwdev_put(phwdev, CLEAN);
+    pciesvc_spmt_put(spmt, CLEAN);
+
+    pciehw_indirect_complete(ientry);
+}
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/bdf.h b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/bdf.h
new file mode 100644
index 000000000..1646e875e
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/bdf.h
@@ -0,0 +1,52 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (c) 2017,2021, Pensando Systems Inc.
+ */
+
+#ifndef __BDF_H__
+#define __BDF_H__
+
+static inline int
+bdf_to_bus(const int bdf)
+{
+    return (bdf >> 8) & 0xff;
+}
+
+static inline int
+bdf_to_dev(const int bdf)
+{
+    return (bdf >> 3) & 0x1f;
+}
+
+static inline int
+bdf_to_fnc(const int bdf)
+{
+    return bdf & 0x7;
+}
+
+static inline int
+bdf_make(const int b, const int d, const int f)
+{
+    return ((b & 0xff) << 8) | ((d & 0x1f) << 3) | (f & 0x7);
+}
+
+static inline char *
+bdf_to_buf(const int bdf, char *buf, size_t bufsz)
+{
+    const int b = bdf_to_bus(bdf);
+    const int d = bdf_to_dev(bdf);
+    const int f = bdf_to_fnc(bdf);
+    pciesvc_snprintf(buf, bufsz, "%02x:%02x.%d", b, d, f);
+    return buf;
+}
+
+static inline char *
+bdf_to_str(const int bdf)
+{
+#define NBUFS 8
+    static char buf[NBUFS][16];
+    static int bufi;
+    return bdf_to_buf(bdf, buf[bufi++ % NBUFS], sizeof(buf[0]));
+}
+
+#endif /* __BDF_H__ */
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/cfg.c b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/cfg.c
new file mode 100644
index 000000000..2ec811a03
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/cfg.c
@@ -0,0 +1,1072 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2017-2019,2021-2022, Pensando Systems Inc.
+ */
+
+#include "pciesvc_impl.h"
+#include "pcietlp.h"
+#include "portcfg.h"
+#include "cfgspace.h"
+#include "bdf.h"
+#include "intr.h"
+#include "indirect.h"
+#include "notify.h"
+#include "hdrt.h"
+#include "vpd.h"
+#include "reset.h"
+
+typedef struct handler_ctx_s {
+    pcie_stlp_t stlp;
+    int port;
+    pciehwdevh_t hwdevh;
+    uint32_t retval;
+    indirect_entry_t *ientry;
+    notify_entry_t *nentry;
+} handler_ctx_t;
+
+/*
+ * Detect these overlaps:
+ *
+ * regaddr        regsize
+ * v              v
+ * +--------------+
+ * +--------------+
+ * ^              ^
+ * tlpaddr        tpsize
+ *
+ * regaddr        regsize
+ * v              v
+ * +--------------+
+ *           +--------------+
+ *           ^              ^
+ *           tlpaddr        tpsize
+ *
+ *     regaddr        regsize
+ *     v              v
+ *     +--------------+
+ * +--------------+
+ * ^              ^
+ * tlpaddr        tpsize
+ */
+static int
+stlp_overlap(const pcie_stlp_t *stlp,
+             const u_int32_t regaddr, const u_int32_t regsize)
+{
+    const u_int32_t tlpaddr = stlp->addr;
+    const u_int32_t tlpsize = stlp->size;
+
+    return tlpaddr < regaddr + regsize && tlpaddr + tlpsize > regaddr;
+}
+
+/*
+ * The "info->vfid" parameter is scaled by the vfstride entry
+ * to compute the target config space physical address.  We
+ * use the hardware target "cfgpa" to determine the target
+ * hwdev that is being addressed.  This makes us independent
+ * of the vfstride scaling of "info->vfid" to find the target device.
+ *
+ * We could record the vfid scale factor in the spmt and then
+ * shift the "info->vfid" as the hw would do, but using the
+ * "info->direct_addr" provided by hw is easier and gives us
+ * the same answer.
+ *
+ * We could also lookup based on stlp->bdf that comes from the
+ * decode of the rawtlp so we know it is accurate.  Right now
+ * our bdf lookup is not very efficient so "cfgpa" is faster.
+ *
+ * Sometimes we get called with a "cfgpa" that is outside the
+ * device cfgcur region.  This happens when we have indirect_catchall
+ * and the cfgpa is in zerospa.  For this case we return 0
+ * which is an unused handle so config space is all 0's so we'll
+ * end up reading a 0 for all values.
+ */
+static pciehwdevh_t
+cfgpa_to_hwdevh(const u_int64_t cfgpa)
+{
+#define CFGCURSZ sizeof(((pciehw_mem_t *)0L)->cfgcur)
+    const u_int64_t cfgcurpa = pciesvc_cfgcur_pa();
+
+    if (cfgpa >= cfgcurpa && cfgpa < cfgcurpa + CFGCURSZ) {
+        const u_int64_t cfgoff = cfgpa - cfgcurpa;
+        return cfgoff >> PCIEHW_CFGSHIFT;
+    }
+    return 0;
+}
+
+void
+pciehw_cfg_load(pciehwdev_t *phwdev)
+{
+    pciehw_pmt_load_cfg(phwdev);
+}
+
+void
+pciehw_cfg_unload(pciehwdev_t *phwdev)
+{
+    pciehw_pmt_unload_cfg(phwdev);
+}
+
+/*****************************************************************
+ * cfgrd handlers
+ */
+
+static void
+pciehw_cfgrd_delay(handler_ctx_t *hctx)
+{
+    pciesvc_debug_cmd(&hctx->retval);
+}
+
+/*****************************************************************
+ * cfgwr handlers
+ */
+
+static u_int32_t
+cfg_bar32(cfgspace_t *cs, const u_int32_t cfgoff)
+{
+    u_int32_t baraddr = cfgspace_readd(cs, cfgoff);
+    return baraddr;
+}
+
+static u_int64_t
+cfg_bar64(cfgspace_t *cs, const u_int32_t cfgoff)
+{
+    u_int32_t barlo, barhi;
+
+    barlo = cfgspace_readd(cs, cfgoff + 0);
+    barhi = cfgspace_readd(cs, cfgoff + 4);
+
+    return ((u_int64_t)barhi << 32) | barlo;
+}
+
+static u_int64_t
+cfg_baraddr(cfgspace_t *cs, const u_int32_t cfgoff, const u_int32_t barlen)
+{
+    u_int64_t baraddr;
+
+    if (barlen == 8) {
+        baraddr = cfg_bar64(cs, cfgoff);
+    } else {
+        baraddr = cfg_bar32(cs, cfgoff);
+    }
+    return baraddr;
+}
+
+static void
+pciehw_cfg_bars_enable(pciehwdev_t *phwdev, const u_int16_t cmd)
+{
+    const int io_en = (cmd & PCI_COMMAND_IO) != 0;
+    const int mem_en = (cmd & PCI_COMMAND_MEMORY) != 0;
+    pciehwbar_t *phwbar;
+    int i;
+
+#ifdef PCIEMGR_DEBUG
+    if (!phwdev->vf) {
+        pciesvc_logdebug("bars_enable: %s mem%c io%c\n",
+                         pciehwdev_get_name(phwdev),
+                         mem_en ? '+' : '-',
+                         io_en ? '+' : '-');
+    }
+#endif
+
+    for (phwbar = phwdev->bar, i = 0; i < PCIEHW_NBAR; i++, phwbar++) {
+        if (!phwbar->valid) continue;
+
+        if ((phwbar->type == PCIEHWBARTYPE_MEM ||
+             phwbar->type == PCIEHWBARTYPE_MEM64)) {
+            pciehw_bar_enable(phwdev, phwbar, mem_en);
+        } else if (phwbar->type == PCIEHWBARTYPE_IO) {
+            pciehw_bar_enable(phwdev, phwbar, io_en);
+        }
+    }
+}
+
+/*
+ * rombar is enabled iff CMD.memory_space_en && ROMBAR.en.
+ */
+static void
+pciehw_cfg_rombar_enable(pciehwdev_t *phwdev, cfgspace_t *cs)
+{
+    pciehwbar_t *phwbar = &phwdev->rombar;
+
+    if (phwbar->valid) {
+        const int mem_en = (cfgspace_readw(cs, PCI_COMMAND) & 0x2) != 0;
+        const int rom_en = (cfgspace_readd(cs, PCI_ROM_ADDRESS) & 0x1) != 0;
+
+        pciehw_bar_enable(phwdev, phwbar, mem_en && rom_en);
+    }
+}
+
+static void
+pciehw_cfg_busmaster_enable(pciehwdev_t *phwdev, const int on)
+{
+#ifdef PCIEMGR_DEBUG
+    if (!phwdev->vf) {
+        pciesvc_logdebug("busmaster_enable: %s %s\n",
+                         pciehwdev_get_name(phwdev), on ? "on" : "off");
+    }
+#endif
+    if (on) {
+        pciehw_hdrt_load(phwdev->lifb, phwdev->lifc, phwdev->bdf);
+    } else {
+        pciehw_hdrt_unload(phwdev->lifb, phwdev->lifc);
+    }
+}
+
+static void
+pciehw_cfg_cmd(pciehwdev_t *phwdev, cfgspace_t *cs, const u_int16_t cmd)
+{
+    u_int16_t msixcap, msixctl;
+
+    /*
+     * PF check cmd reg for bar enables.
+     * VF bar enables come from PF sriov capability (see cfgwr_sriov()).
+     */
+    if (!phwdev->vf) {
+        /* bar control */
+        pciehw_cfg_bars_enable(phwdev, cmd);
+        /* cmd.mem_enable might have enabled rombar */
+        pciehw_cfg_rombar_enable(phwdev, cs);
+
+        msixcap = cfgspace_findcap(cs, PCI_CAP_ID_MSIX);
+        if (msixcap) {
+            msixctl = cfgspace_readw(cs, msixcap + PCI_MSIX_FLAGS);
+        } else {
+            msixctl = 0;
+        }
+
+        /* intx_disable */
+        if ((msixctl & PCI_MSIX_FLAGS_ENABLE) == 0) {
+            const int legacy = 1;
+            const int fmask = (cmd & PCI_COMMAND_INTX_DISABLE) != 0;
+            pciehw_intr_config(phwdev, legacy, fmask);
+        }
+    }
+
+    pciehw_cfg_busmaster_enable(phwdev, (cmd & PCI_COMMAND_MASTER) != 0);
+}
+
+static void
+pciehw_cfgwr_cmd(const handler_ctx_t *hctx)
+{
+    pciehwdev_t *phwdev;
+    cfgspace_t cs;
+    u_int16_t cmd;
+
+    phwdev = pciehwdev_get(hctx->hwdevh);
+    pciesvc_cfgspace_get(hctx->hwdevh, &cs);
+    cmd = cfgspace_readw(&cs, PCI_COMMAND);
+    pciehw_cfg_cmd(phwdev, &cs, cmd);
+    pciesvc_cfgspace_put(&cs, CLEAN);
+    pciehwdev_put(phwdev, DIRTY); /* updated bars[].bdf */
+}
+
+static void
+pciehw_cfgwr_bars(pciehwdev_t *phwdev,
+                  const pcie_stlp_t *stlp,
+                  cfgspace_t *cs,
+                  const int cfgbase)
+{
+    pciehwbar_t *phwbar;
+    int i;
+
+    for (phwbar = phwdev->bar, i = 0; i < PCIEHW_NBAR; i++, phwbar++) {
+        if (phwbar->valid) {
+            const int cfgoff = cfgbase + phwbar->cfgidx * 4;
+            const int barlen = phwbar->type == PCIEHWBARTYPE_MEM64 ? 8 : 4;
+            if (stlp_overlap(stlp, cfgoff, barlen)) {
+                const u_int64_t vfbaroff = (pciehw_bar_getsize(phwbar) *
+                                            phwdev->vfidx);
+                u_int64_t baraddr = cfg_baraddr(cs, cfgoff, barlen);
+                u_int64_t addr;
+
+                if (phwbar->type == PCIEHWBARTYPE_IO) {
+                    baraddr &= ~0x3ULL;
+                } else {
+                    baraddr &= ~0xfULL;
+                }
+                addr = baraddr + vfbaroff;
+#ifdef PCIEMGR_DEBUG
+                pciesvc_logdebug("%s: bar %d pmt %d setaddr 0x%" PRIx64 "\n",
+                                 pciehwdev_get_name(phwdev),
+                                 phwbar->cfgidx, phwbar->pmtb, addr);
+#endif
+                pciehw_bar_setaddr(phwbar, addr);
+            }
+        }
+    }
+}
+
+static void
+pciehw_cfgwr_dev_bars(const handler_ctx_t *hctx)
+{
+    const int cfgbase = 0x10;
+    pciehwdev_t *phwdev;
+    cfgspace_t cs;
+
+    phwdev = pciehwdev_get(hctx->hwdevh);
+    pciesvc_cfgspace_get(hctx->hwdevh, &cs);
+    pciehw_cfgwr_bars(phwdev, &hctx->stlp, &cs, cfgbase);
+    pciesvc_cfgspace_put(&cs, CLEAN);
+    pciehwdev_put(phwdev, DIRTY); /* updated phwdev->bars[] bdf,addr */
+
+}
+
+static void
+pciehw_cfgwr_rom_bar(const handler_ctx_t *hctx)
+{
+    pciehwdev_t *phwdev;
+    pciehwbar_t *phwbar;
+    cfgspace_t cs;
+    u_int32_t baraddr;
+
+    phwdev = pciehwdev_get(hctx->hwdevh);
+    pciesvc_cfgspace_get(hctx->hwdevh, &cs);
+    baraddr = cfgspace_readd(&cs, PCI_ROM_ADDRESS);
+    baraddr &= ~0x1; /* mask enable bit */
+    phwbar = &phwdev->rombar;
+    pciehw_bar_setaddr(phwbar, baraddr);
+    pciehw_cfg_rombar_enable(phwdev, &cs);
+    pciesvc_cfgspace_put(&cs, CLEAN);
+    pciehwdev_put(phwdev, DIRTY); /* updated phwdev->bars[] bdf,addr */
+}
+
+static void
+pciehw_mgmtchg_event(const pciehwdev_t *phwdev)
+{
+    pciesvc_eventdata_t evd;
+
+    pciesvc_memset(&evd, 0, sizeof(evd));
+    evd.evtype = PCIESVC_EV_MGMTCHG;
+    evd.port = phwdev->port;
+    evd.lif = phwdev->lifb;
+    pciesvc_event_handler(&evd, sizeof(evd));
+}
+
+/*
+ * Set a new device bus identity for this device.
+ * This happens when a bridge secondary bus is written.
+ * We also load the cfg entries into the pmt tcam if requested.
+ */
+static void
+pciehw_cfg_set_bus(pciehwdev_t *phwdev, const u_int8_t bus, const int load)
+{
+    u_int8_t busbase, busdelta;
+    u_int32_t pmti;
+
+    busbase = 0;
+    for (pmti = phwdev->pmtb; pmti < phwdev->pmtb + phwdev->pmtc; pmti++) {
+        pciehw_spmt_t *spmt = pciesvc_spmt_get(pmti);
+        pmt_t *pmt = &spmt->pmt;
+        const pmr_cfg_entry_t *pmr = &pmt->pmre.cfg;
+
+        /*
+         * If we have >255 vfs then some pmt entries will have a
+         * different bus.  We'll keep track of the (pre-adjusted) bstart
+         * from the first entry and apply any delta to the new bus.
+         */
+        if (pmti == phwdev->pmtb) {
+            busbase = pmr->bstart;
+        }
+        busdelta = pmr->bstart - busbase;
+
+        pmt_cfg_set_bus(pmt, bus + busdelta);
+        if (load) {
+            pmt_set(pmti, pmt);
+            spmt->loaded = 1;
+        }
+        pciesvc_spmt_put(spmt, DIRTY); /* pmt, loaded */
+    }
+    if (!phwdev->cfgloaded && load) {
+        phwdev->cfgloaded = 1;
+    }
+}
+
+/*
+ * Device captures a new bus.  We do this when our parent bridge
+ * gets a new secondary bus number assigned.
+ * If new bus == 0 then unload the cfg entries.  Host software
+ * will set bus == 0 during the bus walk step as the number of
+ * required buses due to ari/sriov is determined, only a single
+ * bus at a time gets a bus number assigned.
+ *
+ * For example, during bios scan
+ * (on UCS C220 Bios Version C220M5.3.1.3c.0307181404, and
+ *  Dell R6525 BIOS Version 2.2.5) we see:
+ * [2000-06-21 09:18:28.829918] bridgedn0: hwbus 0xb4 secbus 0xb5 adjbus 0x01
+ * [2000-06-21 09:18:28.833321] bridgedn0: hwbus 0xb4 secbus 0x00 adjbus 0x00
+ * [2000-06-21 09:18:28.837797] bridgedn1: hwbus 0xb4 secbus 0xb5 adjbus 0x01
+ * [2000-06-21 09:18:28.841914] bridgedn1: hwbus 0xb4 secbus 0x00 adjbus 0x00
+ * [2000-06-21 09:18:28.845558] bridgedn2: hwbus 0xb4 secbus 0xb5 adjbus 0x01
+ * [2000-06-21 09:18:28.849805] bridgedn2: hwbus 0xb4 secbus 0x00 adjbus 0x00
+ *
+ * Then, the bus requirements are determined, and the final config is set:
+ * [2000-06-21 09:18:31.920035] bridgedn0: hwbus 0xb4 secbus 0xb5 adjbus 0x01
+ * [2000-06-21 09:18:31.946122] bridgedn1: hwbus 0xb4 secbus 0xb6 adjbus 0x02
+ * [2000-06-21 09:18:31.968468] bridgedn2: hwbus 0xb4 secbus 0xb7 adjbus 0x03
+ */
+static void
+pciehw_capture_bus(pciehwdev_t *phwdev, const u_int8_t bus, const int load)
+{
+    if (!phwdev->vf) {
+        pciesvc_loginfo("capture_bus: %s bdf 0x%04x new bus 0x%02x\n",
+                        pciehwdev_get_name(phwdev), phwdev->bdf, bus);
+    }
+    if (bus) {
+        const uint8_t vfbusoff = phwdev->vf ? bdf_to_bus(phwdev->vfidx+1) : 0;
+        const uint16_t newbdf = bdf_make(bus + vfbusoff,
+                                         bdf_to_dev(phwdev->bdf),
+                                         bdf_to_fnc(phwdev->bdf));
+        if (phwdev->bdf != newbdf) {
+            phwdev->bdf = newbdf;
+            /* event for mgmteth bdf change */
+            if (phwdev->type == PCIEHDEVICE_MGMTETH) {
+                pciehw_mgmtchg_event(phwdev);
+            }
+        }
+        pciehw_cfg_set_bus(phwdev, bus, load);
+    } else {
+        pciehw_cfg_unload(phwdev);
+    }
+}
+
+static void
+pciehw_assign_bus(pciehwdevh_t hwdevh, const u_int8_t bus, const int load)
+{
+    while (hwdevh) {
+        pciehwdev_t *phwdev = pciehwdev_get(hwdevh);
+        const pciehwdevh_t childh = phwdev->childh;
+        const pciehwdevh_t peerh = phwdev->peerh;
+
+        pciehw_capture_bus(phwdev, bus, load);
+        pciehwdev_put(phwdev, DIRTY); /* bdf */
+
+        /* also assign bus to vfs if any */
+        pciehw_assign_bus(childh, bus, load);
+
+        hwdevh = peerh;
+    }
+}
+
+static void
+pciehw_bridge_secbus(pciehwdev_t *phwdev)
+{
+    cfgspace_t cs;
+    u_int8_t hwbus, secbus, adjbus;
+    pciehwdevh_t childh;
+
+    /*
+     * Note that our bridge PRIMARY_BUS is the same
+     * as hwbus, but pribus is optional in pcie and
+     * some systems (UCS bios) don't set bridge pribus
+     * during the initial bus scan, so we get the
+     * secbus of the hwbridge as a reliable bus.
+     */
+    portcfg_read_bus(phwdev->port, NULL, &hwbus, NULL);
+
+    pciesvc_cfgspace_get(phwdev->hwdevh, &cs);
+    secbus = cfgspace_get_secbus(&cs);
+    pciesvc_cfgspace_put(&cs, CLEAN);
+
+    /*
+     * The bridge secbus is a physical bus number.
+     * The hardware usually deals with "adjusted" bus numbers,
+     * i.e. bus numbers relative to the secondary bus of the hw bridge.
+     * Here we perform the bus adjustment the hw will do to our
+     * secondary bus by subtracting the hw bridge secondary bus
+     * from the configured secbus to get the
+     * adjusted bus to assign to our devices.
+     */
+    adjbus = (secbus && hwbus != 0xff) ? secbus - hwbus : 0;
+
+    pciesvc_loginfo("%s: hwbus 0x%02x secbus 0x%02x adjbus 0x%02x\n",
+                    pciehwdev_get_name(phwdev), hwbus, secbus, adjbus);
+    childh = phwdev->childh;
+
+    pciehw_assign_bus(childh, adjbus, 1);
+}
+
+static void
+pciehw_cfgwr_bridge_bus(const handler_ctx_t *hctx)
+{
+    if (stlp_overlap(&hctx->stlp, PCI_SECONDARY_BUS, sizeof(uint8_t))) {
+        pciehwdev_t *phwdev = pciehwdev_get(hctx->hwdevh);
+
+        pciehw_bridge_secbus(phwdev);
+
+        pciehwdev_put(phwdev, CLEAN);
+    }
+}
+
+static void
+pciehw_cfgwr_bridgectl(const handler_ctx_t *hctx)
+{
+    cfgspace_t cs;
+    u_int16_t brctl;
+    u_int8_t secbus;
+
+    pciesvc_cfgspace_get(hctx->hwdevh, &cs);
+    brctl = cfgspace_readw(&cs, PCI_BRIDGE_CONTROL);
+    secbus = cfgspace_get_secbus(&cs);
+    pciesvc_cfgspace_put(&cs, CLEAN);
+
+    if (brctl & PCI_BRIDGE_CTL_BUS_RESET) {
+        pciehwdev_t *phwdev = pciehwdev_get(hctx->hwdevh);
+        pciehw_reset_bus(phwdev, secbus);
+        pciehwdev_put(phwdev, CLEAN);
+    }
+}
+
+static void
+pciehw_cfgwr_msix(const handler_ctx_t *hctx)
+{
+    const u_int16_t reg = hctx->stlp.addr;
+    const u_int16_t regdw = reg >> 2;
+    pciehwdev_t *phwdev;
+    cfgspace_t cs;
+    u_int16_t msixctl, cmd;
+    int msix_en, msix_mask, fmask, legacy;
+
+    pciesvc_cfgspace_get(hctx->hwdevh, &cs);
+    msixctl = cfgspace_readw(&cs, (regdw << 2) + 2);
+    msix_en = (msixctl & PCI_MSIX_FLAGS_ENABLE) != 0;
+    msix_mask = (msixctl & PCI_MSIX_FLAGS_MASKALL) != 0;
+
+    phwdev = pciehwdev_get(hctx->hwdevh);
+
+    if (msix_en) {
+        /* msix mode */
+        legacy = 0;
+        fmask = msix_mask;
+    } else if (phwdev->vf) {
+        /* sriov vf disabled */
+        legacy = 0;
+        fmask = 1;
+    } else {
+        /* intx mode */
+        legacy = 1;
+        cmd = cfgspace_readw(&cs, PCI_COMMAND);
+        fmask = phwdev->vf || (cmd & PCI_COMMAND_INTX_DISABLE) != 0;
+    }
+    pciesvc_cfgspace_put(&cs, CLEAN);
+
+    pciehw_intr_config(phwdev, legacy, fmask);
+    pciehwdev_put(phwdev, CLEAN);
+}
+
+static void
+pciehw_cfgwr_vpd(const handler_ctx_t *hctx)
+{
+    cfgspace_t cs;
+    u_int16_t vpdcap, addr, f;
+    u_int32_t data;
+
+    pciesvc_cfgspace_get(hctx->hwdevh, &cs);
+    vpdcap = cfgspace_findcap(&cs, PCI_CAP_ID_VPD);
+    addr = cfgspace_readw(&cs, vpdcap + PCI_VPD_ADDR);
+    f = addr & PCI_VPD_ADDR_F;
+    addr &= PCI_VPD_ADDR_MASK;
+
+    /*
+     * Flag set indicates write data, clear flag when complete.
+     * Flag clear indicates read data, set flag when complete.
+     */
+    if (f) {
+        /* vpd write */
+        data = cfgspace_readd(&cs, vpdcap + PCI_VPD_DATA);
+        pciehw_vpd_write(hctx->hwdevh, addr, data);
+        cfgspace_writew(&cs, vpdcap + PCI_VPD_ADDR, addr);
+    } else {
+        /* vpd read */
+        data = pciehw_vpd_read(hctx->hwdevh, addr);
+        cfgspace_writed(&cs, vpdcap + PCI_VPD_DATA, data);
+        pciesvc_mem_barrier();  /* data lands *before* we set ADDR_F */
+        cfgspace_writew(&cs, vpdcap + PCI_VPD_ADDR, addr | PCI_VPD_ADDR_F);
+    }
+    pciesvc_cfgspace_put(&cs, DIRTY); /* VPD_DATA,VPD_ADDR */
+}
+
+static void
+pciehw_cfgwr_pcie_devctl(const handler_ctx_t *hctx)
+{
+    cfgspace_t cs;
+    u_int16_t pciecap, devctl;
+
+    pciesvc_cfgspace_get(hctx->hwdevh, &cs);
+    pciecap = cfgspace_findcap(&cs, PCI_CAP_ID_EXP);
+    devctl = cfgspace_readw(&cs, pciecap + PCI_EXP_DEVCTL);
+    pciesvc_cfgspace_put(&cs, CLEAN);
+
+    if (stlp_overlap(&hctx->stlp, pciecap + 0x8, sizeof(u_int16_t))) {
+        if (devctl & PCI_EXP_DEVCTL_BCR_FLR) {
+            pciehwdev_t *phwdev = pciehwdev_get(hctx->hwdevh);
+            pciehw_reset_flr(phwdev);
+            pciehwdev_put(phwdev, CLEAN);
+        }
+    }
+}
+
+static void
+pciehw_sriov_numvfs_event(pciehwdev_t *phwdev, const u_int16_t numvfs)
+{
+    pciesvc_eventdata_t evd;
+    pciesvc_sriov_numvfs_t *sriov_numvfs;
+
+    pciesvc_memset(&evd, 0, sizeof(evd));
+    evd.evtype = PCIESVC_EV_SRIOV_NUMVFS;
+    evd.port = phwdev->port;
+    evd.lif = phwdev->lifb;
+    sriov_numvfs = &evd.sriov_numvfs;
+    sriov_numvfs->numvfs = numvfs;
+    pciesvc_event_handler(&evd, sizeof(evd));
+}
+
+/*
+ * Some of the bar entries of vf0 cover the bars for all vfs.
+ * Apply the "numvfs" limit to these vf0 bars.
+ */
+static int
+pciehw_sriov_adjust_vf0(pciehwdev_t *vfhwdev, const int numvfs)
+{
+    pciehw_shmem_t *pshmem = pciesvc_shmem_get();
+    pciehwbar_t *phwbar;
+    int i, r, do_log;
+
+    r = 0;
+    for (phwbar = vfhwdev->bar, i = 0; i < PCIEHW_NBAR; i++, phwbar++) {
+        pciehw_spmt_t *spmt, *spmte;
+        if (!phwbar->valid) continue;
+        do_log = 1; /* log adjust_vf0 for first pmt of bar */
+        spmt = &pshmem->spmt[phwbar->pmtb];
+        spmte = spmt + phwbar->pmtc;
+        for ( ; spmt < spmte; spmt++) {
+            if (spmt->vf0) {
+                const u_int64_t pmtaddr = phwbar->addr + spmt->baroff;
+                r = pciehw_pmt_adjust_vf0(spmt, pmtaddr, numvfs, do_log);
+                if (r < 0) goto out;
+#ifndef PCIEMGR_DEBUG
+                do_log = 0;
+#endif
+            }
+        }
+    }
+ out:
+    return r;
+}
+
+/*
+ * Enable this VF.  Make it visible on the PCIe bus in cfg space,
+ * and enable bars too if Memory Space Enable (mse) is set.
+ */
+static void
+pciehw_sriov_enable_vf(pciehwdev_t *vfhwdev, const int mse)
+{
+    u_int16_t cmd;
+
+    /* XXX handle vfe load/unload cfg space */
+    /* refactor and call pciehw_cfg_load(vfhwdev) */
+
+    /* load/unload the bars */
+    cmd = mse ? PCI_COMMAND_MEMORY : 0;
+    pciehw_cfg_bars_enable(vfhwdev, cmd);
+}
+
+static void
+pciehw_sriov_enable_vfs(pciehwdev_t *phwdev, const int numvfs, const int mse)
+{
+    pciehwdev_t *vfhwdev;
+    int vfidx, r;
+
+    vfhwdev = pciehwdev_vfdev_get(phwdev, 0);
+    r = pciehw_sriov_adjust_vf0(vfhwdev, numvfs);
+    pciehwdev_vfdev_put(vfhwdev, CLEAN);
+    if (r < 0) {
+        pciesvc_logerror("%s: adjust_vf0 failed\n",
+                         pciehwdev_get_name(phwdev));
+        return;
+    }
+
+    for (vfidx = 0; vfidx < numvfs; vfidx++) {
+        vfhwdev = pciehwdev_vfdev_get(phwdev, vfidx);
+        pciehw_sriov_enable_vf(vfhwdev, mse);
+        pciehwdev_vfdev_put(vfhwdev, DIRTY); /* bdf */
+    }
+}
+
+static void
+pciehw_sriov_disable_vf(pciehwdev_t *vfhwdev)
+{
+    const u_int16_t cmd = 0;
+    pciehw_cfg_bars_enable(vfhwdev, cmd);
+
+    /* XXX handle vfe load/unload cfg space */
+    /* refactor and call pciehw_cfg_unload(vfhwdev) */
+}
+
+/*
+ * Disable VFs.  Unload the bars and clear bus master enable.
+ * We'll reset cfg space for the disable VFs which clears bus master enable.
+ */
+static void
+pciehw_sriov_disable_vfs(pciehwdev_t *phwdev, const int vfb, const int vfc)
+{
+    int vfidx;
+
+    for (vfidx = vfb; vfidx < vfb + vfc; vfidx++) {
+        pciehwdev_t *vfhwdev = pciehwdev_vfdev_get(phwdev, vfidx);
+        pciehw_sriov_disable_vf(vfhwdev);
+        pciehwdev_vfdev_put(vfhwdev, DIRTY);
+    }
+    /* Park disabled vf's in reset state. */
+    pciehw_reset_vfs(phwdev, vfb, vfc);
+}
+
+/*
+ * If VF Enable (vfe) is set, then enable VFs and possibly enable bars
+ * if Memory Space Enable (mse) is also set.
+ *
+ * If VF Enable (vfe) is clear, then disable VFs (mse is ignored).
+ */
+static void
+pciehw_sriov_ctrl_numvfs(pciehwdev_t *phwdev,
+                         const u_int16_t ctrl, const u_int16_t numvfs)
+{
+    const int vfe = (ctrl & PCI_SRIOV_CTRL_VFE) != 0; /* VF Enable */
+    const int mse = (ctrl & PCI_SRIOV_CTRL_MSE) != 0; /* Memory Space Enable */
+
+    if (vfe) {
+        /*
+         * VF Enable set, first disable any enabled VFs greater than numvfs,
+         * then enable [0-numvfs) range.
+         */
+        if (phwdev->enabledvfs > numvfs) {
+            pciehw_sriov_disable_vfs(phwdev,
+                                     numvfs, phwdev->enabledvfs - numvfs);
+        }
+        pciehw_sriov_enable_vfs(phwdev, numvfs, mse);
+        phwdev->enabledvfs = numvfs;
+
+    } else {
+        /*
+         * VF Enable clear, disable all enabled VFs.
+         */
+        if (phwdev->enabledvfs) {
+            pciehw_sriov_disable_vfs(phwdev, 0, phwdev->enabledvfs);
+            phwdev->enabledvfs = 0;
+        }
+    }
+
+    /*
+     * Generate an event for numvfs change.
+     */
+    if (phwdev->numvfs != numvfs) {
+        pciehw_sriov_numvfs_event(phwdev, numvfs);
+        phwdev->numvfs = numvfs;
+    }
+}
+
+void
+pciehw_sriov_ctrl(pciehwdev_t *phwdev,
+                  const u_int16_t ctrl, const u_int16_t numvfs)
+{
+    if (phwdev->sriovctrl != ctrl) {
+#ifdef __aarch64__
+        pciesvc_loginfo("%s "
+                        "sriov_ctrl 0x%04x vfe%c mse%c ari%c numvfs %d\n",
+                        pciehwdev_get_name(phwdev),
+                        ctrl,
+                        ctrl & PCI_SRIOV_CTRL_VFE ? '+' : '-',
+                        ctrl & PCI_SRIOV_CTRL_MSE ? '+' : '-',
+                        ctrl & PCI_SRIOV_CTRL_ARI ? '+' : '-',
+                        numvfs);
+#endif
+        pciehw_sriov_ctrl_numvfs(phwdev, ctrl, numvfs);
+        phwdev->sriovctrl = ctrl;
+    }
+}
+
+static void
+pciehw_cfgwr_sriov_ctrl(const handler_ctx_t *hctx)
+{
+    pciehwdev_t *phwdev;
+    cfgspace_t cs;
+    u_int16_t sriovcap, sriovctrl, numvfs;
+
+    phwdev = pciehwdev_get(hctx->hwdevh);
+    pciesvc_cfgspace_get(hctx->hwdevh, &cs);
+    sriovcap = cfgspace_findextcap(&cs, PCI_EXT_CAP_ID_SRIOV);
+    sriovctrl = cfgspace_readw(&cs, sriovcap + PCI_SRIOV_CTRL);
+
+    numvfs = cfgspace_readw(&cs, sriovcap + PCI_SRIOV_NUM_VF);
+    if (numvfs > phwdev->totalvfs) numvfs = phwdev->totalvfs;
+
+    pciesvc_cfgspace_put(&cs, CLEAN);
+
+    /*
+     * If we're running as an indirect transaction then we'll have ientry
+     * set.  If indirect, complete the transaction now before we go do
+     * the potentially long work of resetting a bunch of VFs.
+     */
+    if (hctx->ientry) {
+        pciehw_indirect_complete(hctx->ientry);
+    }
+
+    pciehw_sriov_ctrl(phwdev, sriovctrl, numvfs);
+    pciehwdev_put(phwdev, DIRTY); /* set sriovctrl,enabledvs */
+}
+
+static void
+pciehw_cfgwr_sriov_bars(const handler_ctx_t *hctx)
+{
+    pciehwdev_t *phwdev, *vfhwdev;
+    cfgspace_t pfcs;
+    int vfidx, sriovcap;
+
+    phwdev = pciehwdev_get(hctx->hwdevh);
+    pciesvc_cfgspace_get(hctx->hwdevh, &pfcs);
+    sriovcap = cfgspace_findextcap(&pfcs, PCI_EXT_CAP_ID_SRIOV);
+
+    /*
+     * Distribute the new bar address to all the VFs.
+     * Each VF will compute its own offset within
+     * the bar for its VF sliced region.
+     */
+    for (vfidx = 0; vfidx < phwdev->totalvfs; vfidx++) {
+        vfhwdev = pciehwdev_vfdev_get(phwdev, vfidx);
+        pciehw_cfgwr_bars(vfhwdev, &hctx->stlp, &pfcs, sriovcap + 0x24);
+        pciehwdev_vfdev_put(vfhwdev, DIRTY); /* vfhwdev->bars[] bdf,addr */
+    }
+    pciesvc_cfgspace_put(&pfcs, CLEAN);
+    pciehwdev_put(phwdev, CLEAN);
+}
+
+/*****************************************************************
+ * cfg handlers
+ */
+
+static void
+pciehw_cfgrd_handler(handler_ctx_t *hctx)
+{
+    const u_int16_t reg = hctx->stlp.addr;
+    const u_int16_t regdw = reg >> 2;
+    pciehw_cfghnd_t hnd = PCIEHW_CFGHND_NONE;
+
+    if (regdw < PCIEHW_CFGHNDSZ) {
+        pciehwdev_t *phwdev = pciehwdev_get(hctx->hwdevh);
+        hnd = phwdev->cfghnd[regdw];
+        pciehwdev_put(phwdev, CLEAN);
+    }
+    switch (hnd) {
+    default:
+    case PCIEHW_CFGHND_NONE:
+        break;
+    case PCIEHW_CFGHND_DBG_DELAY:
+        pciehw_cfgrd_delay(hctx);
+        break;
+    }
+}
+
+static void
+pciehw_cfgwr_handler(const handler_ctx_t *hctx)
+{
+    const u_int16_t reg = hctx->stlp.addr;
+    const u_int16_t regdw = reg >> 2;
+    pciehw_cfghnd_t hnd = PCIEHW_CFGHND_NONE;
+
+    if (regdw < PCIEHW_CFGHNDSZ) {
+        pciehwdev_t *phwdev = pciehwdev_get(hctx->hwdevh);
+        hnd = phwdev->cfghnd[regdw];
+        pciehwdev_put(phwdev, CLEAN);
+    }
+    switch (hnd) {
+    default:
+    case PCIEHW_CFGHND_NONE:
+        break;
+    case PCIEHW_CFGHND_CMD:
+        pciehw_cfgwr_cmd(hctx);
+        break;
+    case PCIEHW_CFGHND_DEV_BARS:
+        pciehw_cfgwr_dev_bars(hctx);
+        break;
+    case PCIEHW_CFGHND_ROM_BAR:
+        pciehw_cfgwr_rom_bar(hctx);
+        break;
+    case PCIEHW_CFGHND_BRIDGE_BUS:
+        pciehw_cfgwr_bridge_bus(hctx);
+        break;
+    case PCIEHW_CFGHND_BRIDGECTL:
+        pciehw_cfgwr_bridgectl(hctx);
+        break;
+    case PCIEHW_CFGHND_MSIX:
+        pciehw_cfgwr_msix(hctx);
+        break;
+    case PCIEHW_CFGHND_VPD:
+        pciehw_cfgwr_vpd(hctx);
+        break;
+    case PCIEHW_CFGHND_PCIE_DEVCTL:
+        pciehw_cfgwr_pcie_devctl(hctx);
+        break;
+    case PCIEHW_CFGHND_SRIOV_CTRL:
+        pciehw_cfgwr_sriov_ctrl(hctx);
+        break;
+    case PCIEHW_CFGHND_SRIOV_BARS:
+        pciehw_cfgwr_sriov_bars(hctx);
+        break;
+    }
+}
+
+/*****************************************************************
+ * notify handlers
+ */
+
+void
+pciehw_cfgrd_notify(const int port, notify_entry_t *nentry)
+{
+    handler_ctx_t hctx;
+
+    pciesvc_memset(&hctx, 0, sizeof(hctx));
+    hctx.port = port;
+    hctx.nentry = nentry;
+    hctx.hwdevh = cfgpa_to_hwdevh(nentry->info.direct_addr);
+    pcietlp_decode(&hctx.stlp, nentry->rtlp, sizeof(nentry->rtlp));
+
+    pciehw_cfgrd_handler(&hctx);
+}
+
+void
+pciehw_cfgwr_notify(const int port, notify_entry_t *nentry)
+{
+    handler_ctx_t hctx;
+
+    pciesvc_memset(&hctx, 0, sizeof(hctx));
+    hctx.port = port;
+    hctx.nentry = nentry;
+    hctx.hwdevh = cfgpa_to_hwdevh(nentry->info.direct_addr);
+    pcietlp_decode(&hctx.stlp, nentry->rtlp, sizeof(nentry->rtlp));
+
+    pciehw_cfgwr_handler(&hctx);
+}
+
+/*****************************************************************
+ * indirect handlers
+ */
+
+void
+pciehw_cfgrd_indirect(const int port, indirect_entry_t *ientry)
+{
+    handler_ctx_t hctx;
+    cfgspace_t cs;
+
+    pciesvc_memset(&hctx, 0, sizeof(hctx));
+    hctx.port = port;
+    hctx.ientry = ientry;
+    hctx.hwdevh = cfgpa_to_hwdevh(ientry->info.direct_addr);
+    pcietlp_decode(&hctx.stlp, ientry->rtlp, sizeof(ientry->rtlp));
+
+    /*
+     * For indirect reads read the current value at target addr
+     * and put in retval.  The handler has a chance to modify
+     * retval if desired.
+     */
+    pciesvc_cfgspace_get(hctx.hwdevh, &cs);
+    cfgspace_read(&cs, hctx.stlp.addr, hctx.stlp.size, &hctx.retval);
+    pciesvc_cfgspace_put(&cs, CLEAN);
+
+    pciehw_cfgrd_handler(&hctx);
+
+    ientry->data[0] = hctx.retval;
+    pciehw_indirect_complete(ientry);
+
+#ifdef PCIEMGR_DEBUG
+    pciesvc_logdebug("cfgrd_indirect: "
+                     "hwdevh %d vfid %d rd 0x%lx sz %d data 0x%x\n",
+                     hctx.hwdevh, ientry->info.vfid,
+                     hctx.stlp.addr, hctx.stlp.size, ientry->data[0]);
+#endif
+}
+
+void
+pciehw_cfgwr_indirect(const int port, indirect_entry_t *ientry)
+{
+    handler_ctx_t hctx;
+    cfgspace_t cs;
+    int r;
+
+    pciesvc_memset(&hctx, 0, sizeof(hctx));
+    hctx.port = port;
+    hctx.ientry = ientry;
+    hctx.hwdevh = cfgpa_to_hwdevh(ientry->info.direct_addr);
+    pcietlp_decode(&hctx.stlp, ientry->rtlp, sizeof(ientry->rtlp));
+
+#ifdef PCIEMGR_DEBUG
+    pciesvc_logdebug("cfgwr_indirect: "
+                     "hwdevh %d vfid %d wr 0x%lx sz %d data 0x%lx\n",
+                     hctx.hwdevh, ientry->info.vfid,
+                     hctx.stlp.addr, hctx.stlp.size, hctx.stlp.data);
+#endif
+
+    /*
+     * For indirect writes, write the data first,
+     * then let the handler run with the updated data.
+     */
+    pciesvc_cfgspace_get(hctx.hwdevh, &cs);
+    r = cfgspace_write(&cs, hctx.stlp.addr, hctx.stlp.size, hctx.stlp.data);
+    pciesvc_cfgspace_put(&cs, DIRTY);
+
+    if (r < 0) {
+        ientry->cpl = PCIECPL_CA;
+    }
+    pciehw_cfgwr_handler(&hctx);
+    pciehw_indirect_complete(ientry);
+}
+
+/*****************************************************************
+ * reset
+ */
+
+void
+pciehw_cfg_reset(pciehwdev_t *phwdev, const pciesvc_rsttype_t rsttype)
+{
+    cfgspace_t cs;
+    u_int16_t cfgsz, cmd;
+
+    pciesvc_cfgspace_get(pciehwdev_geth(phwdev), &cs);
+    cfgsz = cfgspace_size(&cs);
+
+    /*****************
+     * reset cfg space
+     */
+    pciesvc_memcpy_toio(cs.cur, cs.rst, cfgsz);
+
+    /* Read reset value for cmd */
+    cmd = cfgspace_readw(&cs, PCI_COMMAND);
+    pciehw_cfg_cmd(phwdev, &cs, cmd);
+    /* XXX Reset bar addrs? */
+
+    /* bridge just reset secbus to reset value=0 */
+    if (cfgspace_get_headertype(&cs) == 0x1) {
+        pciehw_bridge_secbus(phwdev);
+    }
+
+    if (phwdev->pf) {
+        u_int16_t sriovcap, sriovctrl, numvfs;
+
+        /* Read reset values for sriovctrl, numvfs. */
+        sriovcap = cfgspace_findextcap(&cs, PCI_EXT_CAP_ID_SRIOV);
+        sriovctrl = cfgspace_readw(&cs, sriovcap + PCI_SRIOV_CTRL);
+        numvfs = cfgspace_readw(&cs, sriovcap + PCI_SRIOV_NUM_VF);
+        if (numvfs > phwdev->totalvfs) numvfs = phwdev->totalvfs;
+
+        /* ARI-Capable bit preserved across FLR reset */
+        if (rsttype == PCIESVC_RSTTYPE_FLR) {
+            sriovctrl |= (phwdev->sriovctrl & PCI_SRIOV_CTRL_ARI);
+            cfgspace_writew(&cs, sriovcap + PCI_SRIOV_CTRL, sriovctrl);
+        }
+
+        /* release our cfgspace before resetting vfs */
+        pciesvc_cfgspace_put(&cs, DIRTY);
+
+        pciehw_sriov_ctrl(phwdev, sriovctrl, numvfs);
+        /* XXX Reset VF bar addrs? */
+    } else {
+        pciesvc_cfgspace_put(&cs, DIRTY);
+    }
+}
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/cfgspace.c b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/cfgspace.c
new file mode 100644
index 000000000..ecc9e24cf
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/cfgspace.c
@@ -0,0 +1,401 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2017,2021, Pensando Systems Inc.
+ */
+
+#include "pciesvc_impl.h"
+#include "cfgspace.h"
+
+/*
+ * These functions do the actual work of reading/writing
+ * the configuration space and associated mask region.
+ * These functions understand the implementation details
+ * and should not be called directly by external clients.
+ *
+ * Note that the config space memory region (in cfg->cur[]) is the
+ * actual representation of config space for devices exposed across
+ * the PCIe bus to the host.  PCIe config space is little-endian.
+ * These functions are implemented to be endian-agnostic to run on
+ * either big- or little-endian cpus.
+ */
+
+static inline u_int8_t
+_cfgspace_getb_fld(u_int8_t *fld, const u_int16_t offset)
+{
+    return fld[offset];
+}
+
+static inline u_int16_t
+_cfgspace_getw_fld(u_int8_t *fld, const u_int16_t offset)
+{
+    u_int16_t val;
+
+    val = (((u_int16_t)fld[offset + 1] << 8) |
+           ((u_int16_t)fld[offset + 0] << 0));
+    return val;
+}
+
+static inline u_int32_t
+_cfgspace_getd_fld(u_int8_t *fld, const u_int16_t offset)
+{
+    u_int32_t val;
+
+    val = (((u_int32_t)fld[offset + 3] << 24) |
+           ((u_int32_t)fld[offset + 2] << 16) |
+           ((u_int32_t)fld[offset + 1] <<  8) |
+           ((u_int32_t)fld[offset + 0] <<  0));
+    return val;
+}
+
+static inline void
+_cfgspace_setb_fld(u_int8_t *fld, const u_int16_t offset, const u_int8_t val)
+{
+    fld[offset] = val;
+}
+
+static inline void
+_cfgspace_setw_fld(u_int8_t *fld, const u_int16_t offset, const u_int16_t val)
+{
+    fld[offset + 0] = val;
+    fld[offset + 1] = val >> 8;
+}
+
+static inline void
+_cfgspace_setd_fld(u_int8_t *fld, const u_int16_t offset, const u_int32_t val)
+{
+    fld[offset + 0] = val;
+    fld[offset + 1] = val >> 8;
+    fld[offset + 2] = val >> 16;
+    fld[offset + 3] = val >> 24;
+}
+
+static inline u_int8_t
+cfgspace_getb_cur(cfgspace_t *cs, const u_int16_t offset)
+{
+    return _cfgspace_getb_fld(cs->cur, offset);
+}
+
+static inline u_int16_t
+cfgspace_getw_cur(cfgspace_t *cs, const u_int16_t offset)
+{
+    return _cfgspace_getw_fld(cs->cur, offset);
+}
+
+static inline u_int32_t
+cfgspace_getd_cur(cfgspace_t *cs, const u_int16_t offset)
+{
+    return _cfgspace_getd_fld(cs->cur, offset);
+}
+
+static inline void
+cfgspace_setb_cur(cfgspace_t *cs, const u_int16_t offset, const u_int8_t val)
+{
+    _cfgspace_setb_fld(cs->cur, offset, val);
+}
+
+static inline void
+cfgspace_setw_cur(cfgspace_t *cs, const u_int16_t offset, const u_int16_t val)
+{
+    _cfgspace_setw_fld(cs->cur, offset, val);
+}
+
+static inline void
+cfgspace_setd_cur(cfgspace_t *cs, const u_int16_t offset, const u_int32_t val)
+{
+    _cfgspace_setd_fld(cs->cur, offset, val);
+}
+
+static inline u_int8_t
+cfgspace_getb_msk(cfgspace_t *cs, const u_int16_t offset)
+{
+    return _cfgspace_getb_fld(cs->msk, offset);
+}
+
+static inline u_int16_t
+cfgspace_getw_msk(cfgspace_t *cs, const u_int16_t offset)
+{
+    return _cfgspace_getw_fld(cs->msk, offset);
+}
+
+static inline u_int32_t
+cfgspace_getd_msk(cfgspace_t *cs, const u_int16_t offset)
+{
+    return _cfgspace_getd_fld(cs->msk, offset);
+}
+
+static inline void
+cfgspace_setb_msk(cfgspace_t *cs, const u_int16_t offset, const u_int8_t val)
+{
+    _cfgspace_setb_fld(cs->msk, offset, val);
+}
+
+static inline void
+cfgspace_setw_msk(cfgspace_t *cs, const u_int16_t offset, const u_int16_t val)
+{
+    _cfgspace_setw_fld(cs->msk, offset, val);
+}
+
+static inline void
+cfgspace_setd_msk(cfgspace_t *cs, const u_int16_t offset, const u_int32_t val)
+{
+    _cfgspace_setd_fld(cs->msk, offset, val);
+}
+
+/*****************************************************************/
+
+/*
+ * Low-level config space initialization operations.
+ */
+
+static u_int8_t
+cfgspace_getb(cfgspace_t *cs, u_int16_t offset)
+{
+    if (offset < cfgspace_size(cs)) {
+        return cfgspace_getb_cur(cs, offset);
+    }
+    /*
+     * Any read between end of implementation and
+     * end of PCIe Spec size returns 0's.
+     */
+    if (offset < 4096) {
+        return 0;
+    }
+    /*
+     * Shouldn't get any access beyond end of PCIe Spec size,
+     * but if so, return all 0xff's.
+     */
+    return 0xff;
+}
+
+static u_int16_t
+cfgspace_getw(cfgspace_t *cs, u_int16_t offset)
+{
+    if (offset + 1 < cfgspace_size(cs)) {
+        return cfgspace_getw_cur(cs, offset);
+    }
+    /*
+     * Any read between end of implementation and
+     * end of PCIe Spec size returns 0's.
+     */
+    if (offset + 1 < 4096) {
+        return 0;
+    }
+    /*
+     * Shouldn't get any access beyond end of PCIe Spec size,
+     * but if so, return all 0xff's.
+     */
+    return 0xffff;
+}
+
+static u_int32_t
+cfgspace_getd(cfgspace_t *cs, u_int16_t offset)
+{
+    if (offset + 3 < cfgspace_size(cs)) {
+        return cfgspace_getd_cur(cs, offset);
+    }
+    /*
+     * Any read between end of implementation and
+     * end of PCIe Spec size returns 0's.
+     */
+    if (offset + 3 < 4096) {
+        return 0;
+    }
+    /*
+     * Shouldn't get any access beyond end of PCIe Spec size,
+     * but if so, return all 0xff's.
+     */
+    return 0xffffffff;
+}
+
+u_int8_t
+cfgspace_readb(cfgspace_t *cs, const u_int16_t offset)
+{
+    return cfgspace_getb(cs, offset);
+}
+
+u_int16_t
+cfgspace_readw(cfgspace_t *cs, const u_int16_t offset)
+{
+    return cfgspace_getw(cs, offset);
+}
+
+u_int32_t
+cfgspace_readd(cfgspace_t *cs, const u_int16_t offset)
+{
+    return cfgspace_getd(cs, offset);
+}
+
+int
+cfgspace_read(cfgspace_t *cs,
+              const u_int16_t offset,
+              const u_int8_t size,
+              u_int32_t *valp)
+{
+    switch (size) {
+    case 1: *valp = cfgspace_getb(cs, offset); break;
+    case 2: *valp = cfgspace_getw(cs, offset); break;
+    case 4: *valp = cfgspace_getd(cs, offset); break;
+    default:
+        return -1;
+    }
+    return 0;
+}
+
+/*****************************************************************/
+
+/*
+ * Config space writes.  Normally config space is initialized
+ * with the cfgspace_set* functions.  Once initialized, write
+ * accesses come through these APIs where we implement the write-mask
+ * fields (initialized with cfgspace_set[bwd]m() functions).
+ * A bit set in the write-mask indicates that bit is writeable
+ * by these operations.  Read-only fields in the current value are
+ * merged with writeable fields from the new written value and the
+ * current contents of config space are replaced with the result.
+ */
+
+void
+cfgspace_writeb(cfgspace_t *cs, const u_int16_t offset, const u_int8_t val)
+{
+    const u_int8_t oval = cfgspace_getb_cur(cs, offset);
+    const u_int8_t wmsk = cfgspace_getb_msk(cs, offset);
+    const u_int8_t nval = (oval & ~wmsk) | (val & wmsk);
+    cfgspace_setb_cur(cs, offset, nval);
+}
+
+void
+cfgspace_writew(cfgspace_t *cs, const u_int16_t offset, const u_int16_t val)
+{
+    const u_int16_t oval = cfgspace_getw_cur(cs, offset);
+    const u_int16_t wmsk = cfgspace_getw_msk(cs, offset);
+    const u_int16_t nval = (oval & ~wmsk) | (val & wmsk);
+    cfgspace_setw_cur(cs, offset, nval);
+}
+
+void
+cfgspace_writed(cfgspace_t *cs, const u_int16_t offset, const u_int32_t val)
+{
+    const u_int32_t oval = cfgspace_getd_cur(cs, offset);
+    const u_int32_t wmsk = cfgspace_getd_msk(cs, offset);
+    const u_int32_t nval = (oval & ~wmsk) | (val & wmsk);
+    cfgspace_setd_cur(cs, offset, nval);
+}
+
+int
+cfgspace_write(cfgspace_t *cs,
+               const u_int16_t offset,
+               const u_int8_t size,
+               const u_int32_t val)
+{
+    switch (size) {
+    case 1: cfgspace_writeb(cs, offset, val); break;
+    case 2: cfgspace_writew(cs, offset, val); break;
+    case 4: cfgspace_writed(cs, offset, val); break;
+    default:
+        return -1;
+    }
+    return 0;
+}
+
+/*****************************************************************/
+
+u_int16_t
+cfgspace_get_status(cfgspace_t *cs)
+{
+    return cfgspace_getw(cs, 0x6);
+}
+
+u_int8_t
+cfgspace_get_headertype(cfgspace_t *cs)
+{
+    return cfgspace_getb(cs, 0xe);
+}
+
+u_int8_t
+cfgspace_get_cap(cfgspace_t *cs)
+{
+    return cfgspace_getb(cs, 0x34);
+}
+
+u_int8_t
+cfgspace_get_pribus(cfgspace_t *cs)
+{
+    return cfgspace_getb(cs, 0x18);
+}
+
+u_int8_t
+cfgspace_get_secbus(cfgspace_t *cs)
+{
+    return cfgspace_getb(cs, 0x19);
+}
+
+u_int8_t
+cfgspace_get_subbus(cfgspace_t *cs)
+{
+    return cfgspace_getb(cs, 0x1a);
+}
+
+/*
+ * Find capability header with id "capid" in the linked list of
+ * capability headers and return the config space address of it.
+ * Return 0 if "capid" is not found in the list.
+ */
+u_int8_t
+cfgspace_findcap(cfgspace_t *cs, const u_int8_t capid)
+{
+    u_int16_t status = cfgspace_get_status(cs);
+
+    /* check Capability List bit in status reg */
+    if (status & (1 << 4)) {
+        int loops = 256 / 4; /* max-capspace / min-cap-size */
+        u_int8_t capaddr;
+
+        for (capaddr = cfgspace_get_cap(cs) & ~0x3;
+             loops && capaddr != 0;
+             capaddr = cfgspace_getb(cs, capaddr + 0x1) & ~0x3, loops--) {
+            const u_int8_t id = cfgspace_getb(cs, capaddr);
+            if (id == capid) {
+                return capaddr; /* found capid at capaddr */
+            }
+        }
+    }
+    return 0; /* not found */
+}
+
+/*****************************************************************/
+
+static u_int16_t
+extcap_get_id(u_int32_t caphdr)
+{
+    return caphdr & 0x0000ffff;
+}
+
+static u_int16_t
+extcap_get_next(u_int32_t caphdr)
+{
+    return (caphdr >> 20) & 0xffc;
+}
+
+/*
+ * Find extended capability header with id "capid" in the linked list of
+ * extended capability headers and return the config space address of it.
+ * Return 0 if "capid" is not found in the list.
+ */
+u_int16_t
+cfgspace_findextcap(cfgspace_t *cs, const u_int16_t capid)
+{
+    u_int16_t cap;
+    u_int32_t caphdr;
+    int loops = cfgspace_size(cs) / 4; /* (config size) / (min cap size) */
+
+    cap = 0x100;
+    do {
+        caphdr = cfgspace_getd(cs, cap);
+        if (extcap_get_id(caphdr) == capid) {
+            return cap;
+        }
+        cap = extcap_get_next(caphdr);
+    } while (cap && --loops);
+
+    return 0; /* not found */
+}
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/cfgspace.h b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/cfgspace.h
new file mode 100644
index 000000000..fd8934916
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/cfgspace.h
@@ -0,0 +1,94 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (c) 2017-2019,2021, Pensando Systems Inc.
+ */
+
+#ifndef __PCIESVC_CFGSPACE_H__
+#define __PCIESVC_CFGSPACE_H__
+
+#ifdef __cplusplus
+extern "C" {
+#if 0
+} /* close to calm emacs autoindent */
+#endif
+#endif
+
+typedef struct cfgspace_s {
+    u_int8_t *cur;
+    u_int8_t *msk;
+    u_int8_t *rst;
+    u_int16_t size;
+} cfgspace_t;
+
+static inline u_int16_t
+cfgspace_size(cfgspace_t *cs)
+{
+    return cs->size;
+}
+
+/* rename these to avoid static link dups */
+#define cfgspace_get_status     _pciesvc_cfgspace_get_status
+#define cfgspace_get_cap        _pciesvc_cfgspace_get_cap
+#define cfgspace_get_pribus     _pciesvc_cfgspace_get_pribus
+#define cfgspace_get_secbus     _pciesvc_cfgspace_get_secbus
+#define cfgspace_get_subbus     _pciesvc_cfgspace_get_subbus
+#define cfgspace_get_headertype _pciesvc_cfgspace_get_headertype
+#define cfgspace_findcap        _pciesvc_cfgspace_findcap
+#define cfgspace_findextcap     _pciesvc_cfgspace_findextcap
+#define cfgspace_readb          _pciesvc_cfgspace_readb
+#define cfgspace_readw          _pciesvc_cfgspace_readw
+#define cfgspace_readd          _pciesvc_cfgspace_readd
+#define cfgspace_read           _pciesvc_cfgspace_read
+#define cfgspace_writeb         _pciesvc_cfgspace_writeb
+#define cfgspace_writew         _pciesvc_cfgspace_writew
+#define cfgspace_writed         _pciesvc_cfgspace_writed
+#define cfgspace_write          _pciesvc_cfgspace_write
+
+/*
+ * Access specific config space registers.
+ */
+u_int8_t cfgspace_get_pribus(cfgspace_t *cs);
+u_int8_t cfgspace_get_secbus(cfgspace_t *cs);
+u_int8_t cfgspace_get_subbus(cfgspace_t *cs);
+u_int8_t cfgspace_get_headertype(cfgspace_t *cs);
+
+/*
+ * Capabilities.
+ */
+u_int8_t cfgspace_findcap(cfgspace_t *cs, const u_int8_t capid);
+
+/*
+ * Extended Capabilities.
+ */
+u_int16_t cfgspace_findextcap(cfgspace_t *cs, const u_int16_t capid);
+
+/*
+ * Config space operational accessors.
+ *
+ * Reads return current values, writes apply the write-mask to
+ * implement read-only fields.
+ */
+u_int8_t  cfgspace_readb(cfgspace_t *cs, const u_int16_t offset);
+u_int16_t cfgspace_readw(cfgspace_t *cs, const u_int16_t offset);
+u_int32_t cfgspace_readd(cfgspace_t *cs, const u_int16_t offset);
+int cfgspace_read(cfgspace_t *cs,
+                  const u_int16_t offset,
+                  const u_int8_t size,
+                  u_int32_t *valp);
+
+void cfgspace_writeb(cfgspace_t *cs,
+                     const u_int16_t offset, const u_int8_t val);
+void cfgspace_writew(cfgspace_t *cs,
+                     const u_int16_t offset, const u_int16_t val);
+void cfgspace_writed(cfgspace_t *cs,
+                     const u_int16_t offset, const u_int32_t val);
+int cfgspace_write(cfgspace_t *cs,
+                   const u_int16_t offset,
+                   const u_int8_t size,
+                   const u_int32_t val);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __PCIESVC_CFGSPACE_H__ */
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/cmd.c b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/cmd.c
new file mode 100644
index 000000000..ec236d7f6
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/cmd.c
@@ -0,0 +1,74 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2022, Advanced Micro Devices Inc.
+ */
+
+#include "pciesvc_impl.h"
+
+static pciesvc_cmdres_t resbuf;
+
+static int
+cmd_nop(const pciesvc_cmd_nop_t *cmd,
+        pciesvc_cmdres_nop_t *res)
+{
+    res->status = 0;
+    return 0;
+}
+
+static int
+cmd_set_log_level(const pciesvc_cmd_set_log_level_t *cmd,
+                  pciesvc_cmdres_set_log_level_t *res)
+{
+    res->old_level = pciesvc_log_level;
+    pciesvc_log_level = cmd->log_level;
+    res->status = 0;
+    return 0;
+}
+
+int
+pciesvc_cmd_read(char *buf, const long int off, const size_t count)
+{
+    int n;
+
+    if (off < 0 || off > sizeof(resbuf)) {
+        return -1;
+    }
+    if (off + count > sizeof(resbuf)) {
+        /* clamp read size to remainder of resbuf */
+        n = sizeof(resbuf) - off;
+    } else {
+        n = count;
+    }
+    pciesvc_memcpy(buf, ((char *)&resbuf) + off, n);
+    return n;
+}
+
+int
+pciesvc_cmd_write(const char *buf, const long int off, const size_t count)
+{
+    pciesvc_cmd_t *cmd;
+    pciesvc_cmdres_t *res = &resbuf;
+    int r;
+
+    if (off != 0 || count < sizeof(pciesvc_cmd_t)) {
+        return -1;
+    }
+
+    cmd = (pciesvc_cmd_t *)buf;
+    pciesvc_memset(res, 0, sizeof(*res));
+
+    switch (cmd->cmd) {
+    case PCIESVC_CMD_NOP:
+        r = cmd_nop(&cmd->nop, &res->nop);
+        break;
+    case PCIESVC_CMD_SET_LOG_LEVEL:
+        r = cmd_set_log_level(&cmd->set_log_level, &res->set_log_level);
+        break;
+    default:
+        res->status = PCIESVC_CMDSTATUS_UNKNOWN_CMD;
+        r = 0;  /* cmd_write "succeeded" */
+        break;
+    }
+
+    return r < 0 ? r : count;
+}
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/hdrt.c b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/hdrt.c
new file mode 100644
index 000000000..5ca81f6c2
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/hdrt.c
@@ -0,0 +1,71 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2017,2021, Pensando Systems Inc.
+ */
+
+#include "pciesvc_impl.h"
+#include "hdrt.h"
+
+#define HDRT_BASE       PXB_(DHS_ITR_PCIHDRT)
+#define HDRT_COUNT      ASIC_(PXB_CSR_DHS_ITR_PCIHDRT_ENTRIES)
+#define HDRT_STRIDE     ASIC_(PXB_CSR_DHS_ITR_PCIHDRT_ENTRY_BYTE_SIZE)
+#define HDRT_NWORDS     3
+
+static int
+hdrt_size(void)
+{
+    return HDRT_COUNT;
+}
+
+static u_int64_t
+hdrt_addr(const u_int32_t lif)
+{
+    pciesvc_assert(lif < hdrt_size());
+    return HDRT_BASE + (lif * HDRT_STRIDE);
+}
+
+static void
+hdrt_set(const u_int32_t lif, const hdrt_t *hdrt)
+{
+    pciesvc_reg_wr32w(hdrt_addr(lif), (u_int32_t *)hdrt, HDRT_NWORDS);
+}
+
+static void
+hdrt_set_itr(const u_int32_t lif, const u_int16_t bdf)
+{
+    hdrt_t h = { 0 };
+
+    h.valid = 1;
+    h.bdf = bdf;
+    h.attr2_1_rd = 0x1; /* reads get Relaxed Ordering */
+    hdrt_set(lif, &h);
+}
+
+/******************************************************************
+ * apis
+ */
+
+int
+pciehw_hdrt_load(const u_int32_t lifb,
+                 const u_int32_t lifc,
+                 const u_int16_t bdf)
+{
+    u_int32_t lif;
+
+    for (lif = lifb; lif < lifb + lifc; lif++) {
+        hdrt_set_itr(lif, bdf);
+    }
+    return 0;
+}
+
+int
+pciehw_hdrt_unload(const u_int32_t lifb, const u_int32_t lifc)
+{
+    const hdrt_t h0 = { 0 };
+    u_int32_t lif;
+
+    for (lif = lifb; lif < lifb + lifc; lif++) {
+        hdrt_set(lif, &h0);
+    }
+    return 0;
+}
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/hdrt.h b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/hdrt.h
new file mode 100644
index 000000000..7d74613c8
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/hdrt.h
@@ -0,0 +1,40 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (c) 2017,2021, Pensando Systems Inc.
+ */
+
+#ifndef __HDRT_H__
+#define __HDRT_H__
+
+typedef struct {
+    u_int64_t valid     :1;
+    u_int64_t bdf       :16;
+    u_int64_t td        :1;
+    u_int64_t pasid_en  :1;
+    u_int64_t pasid_sel :2;
+    u_int64_t pasid     :20;
+    u_int64_t pasid_exe :1;
+    u_int64_t pasid_priv:1;
+    u_int64_t attr2_1_rd:2;
+    u_int64_t attr2_1_wr:2;
+    u_int64_t rc_cfg1   :1;
+    u_int64_t attr0_rd  :1;
+    u_int64_t attr0_wr  :1;
+    u_int64_t ats_at_wr :1;
+    u_int64_t ats_at_rd :1;
+    u_int64_t tc        :3;
+    u_int64_t ln_wr     :1;
+    u_int64_t ln_rd     :1;
+    u_int64_t rsrv      :13;
+    u_int64_t ecc       :8;
+    u_int64_t _pad      :16;
+} __attribute__((packed)) hdrt_t;
+
+void pciehw_hdrt_init(void);
+int pciehw_hdrt_load(const u_int32_t lifb,
+                     const u_int32_t lifc,
+                     const u_int16_t bdf);
+int pciehw_hdrt_unload(const u_int32_t lifb,
+                       const u_int32_t lifc);
+
+#endif /* __HDRT_H__ */
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/indirect.c b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/indirect.c
new file mode 100644
index 000000000..bcd13e21f
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/indirect.c
@@ -0,0 +1,331 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2018,2021-2022, Pensando Systems Inc.
+ */
+
+#include "pciesvc_impl.h"
+#include "pcietlp.h"
+#include "req_int.h"
+#include "indirect.h"
+
+#define IND_INFO_BASE   PXB_(STA_TGT_IND_INFO)
+#define IND_INFO_NWORDS 1
+#define IND_INFO_STRIDE 4
+
+static u_int64_t
+ind_info_addr(const int port)
+{
+    return IND_INFO_BASE + (port * IND_INFO_STRIDE);
+}
+
+static u_int64_t
+indirect_int_addr(void)
+{
+    return PXB_(CFG_TGT_REQ_INDIRECT_INT);
+}
+
+/*****************************************************************
+ * aximst rams
+ */
+#define AXIMST_BASE     PXB_(DHS_TGT_AXIMST0)
+#define AXIMST_STRIDE   \
+    (ASIC_(PXB_CSR_DHS_TGT_AXIMST1_BYTE_ADDRESS) - \
+     ASIC_(PXB_CSR_DHS_TGT_AXIMST0_BYTE_ADDRESS))
+
+#define AXIMST_NWORDS           4
+#define AXIMST_ENTRY_STRIDE     32
+#define AXIMST_ENTRIES_PER_PORT 16
+#define AXIMST_PORTS_PER_ROW    8
+#define AXIMST_PORT_STRIDE      (AXIMST_ENTRY_STRIDE * AXIMST_ENTRIES_PER_PORT)
+
+static u_int64_t
+aximst_addr(const unsigned int port,
+            const unsigned int idx,
+            const unsigned int entry)
+{
+    return (AXIMST_BASE +
+            ((u_int64_t)idx * AXIMST_STRIDE) +
+            ((u_int64_t)port * AXIMST_PORT_STRIDE) +
+            ((u_int64_t)entry * AXIMST_ENTRY_STRIDE));
+}
+
+static void
+read_aximst(const unsigned int port,
+            const unsigned int idx,
+            const unsigned int entry,
+            u_int32_t *buf)
+{
+    const u_int64_t pa = aximst_addr(port, idx, entry);
+
+    pciesvc_reg_rd32w(pa, buf, AXIMST_NWORDS);
+}
+
+/*
+ * Indirect info tlp format is reversed in srams:
+ *
+ *    15 14 13 12 11 10  9  8  7  6  5  4  3  2  1  0
+ * --------------------------------------------------
+ * 0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+ * 1: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+ * 2: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 <= tlp[16]
+ * 3: 00 00 00 00 60 02 00 3d 0f 00 00 3a 01 00 00 05 <= tlp[0]
+ * 4: 24 48 00 00 00 04 c0 bc 05 78 02 00 40 0e 41 c4 <= indirect info
+ */
+static void
+decode_indirect_info(u_int8_t *info, indirect_entry_t *ientry)
+{
+    u_int8_t *p;
+    int i;
+
+    /* copy the raw tlp data */
+    p = (u_int8_t *)&ientry->rtlp;
+    for (i = 0; i < sizeof(ientry->rtlp); i++) {
+        p[i] = info[63 - i];
+    }
+
+    /* copy the tlp aux info */
+    p = (u_int8_t *)&ientry->info;
+    for (i = 0; i < sizeof(ientry->info); i++) {
+        p[i] = info[64 + i];
+    }
+}
+
+static void
+read_ind_info(const unsigned int port, int *entryp, int *pendingp)
+{
+    union {
+        struct {
+            u_int32_t pending:1;
+            u_int32_t entry:4;
+            u_int32_t port:3;
+        } __attribute__((packed));
+        u_int32_t w[IND_INFO_NWORDS];
+    } ind_info;
+
+    pciesvc_reg_rd32w(ind_info_addr(port), ind_info.w, IND_INFO_NWORDS);
+
+    /* pciesvc_assert(ind_info.port == port); */
+
+    if (entryp) *entryp = ind_info.entry;
+    if (pendingp) *pendingp = ind_info.pending;
+}
+
+/*
+ * Fill the buffer with the raw indirect info data
+ * from the aximst srams.
+ */
+static void
+read_indirect_info(const unsigned int port,
+                   const unsigned int entry,
+                   u_int8_t *buf)
+{
+    u_int8_t *bp;
+    int i;
+
+    for (bp = buf, i = 0; i < 5; i++, bp += 16) {
+        read_aximst(port, i, entry, (u_int32_t *)bp);
+    }
+}
+
+static void
+read_indirect_entry(const unsigned int port,
+                    const unsigned int entry,
+                    indirect_entry_t *ientry)
+{
+    u_int8_t buf[80];
+
+    read_indirect_info(port, entry, buf);
+    decode_indirect_info(buf, ientry);
+    ientry->port = port;
+}
+
+static int
+read_pending_indirect_entry(const unsigned int port,
+                            indirect_entry_t *ientry)
+{
+    int entry, pending;
+
+    read_ind_info(port, &entry, &pending);
+    read_indirect_entry(port, entry, ientry);
+    return pending;
+}
+
+void
+pciehw_indirect_complete(indirect_entry_t *ientry)
+{
+#define IND_RSP_ADDR    PXB_(DHS_TGT_IND_RSP_ENTRY)
+#define IND_RSP_NWORDS  5
+    union {
+        struct {
+            u_int32_t data0;
+            u_int32_t data1;
+            u_int32_t data2;
+            u_int32_t data3;
+            u_int32_t cpl_stat:3;
+            u_int32_t port_id:3;
+            u_int32_t axi_id:7;
+            u_int32_t fetch_rsp:1;
+        } __attribute__((packed));
+        u_int32_t w[IND_RSP_NWORDS];
+    } ind_rsp;
+    const u_int64_t pa = ientry->info.direct_addr;
+    const size_t sz = ientry->info.direct_size;
+
+    if (ientry->completed) return;
+
+    /*
+     * This indirect transaction was handled by software.
+     * We might have written some memory that will be read
+     * by subsequent direct transactions handled in hw.
+     * Insert barrier here to be sure all memory writes have
+     * landed so hw will always see the data we wrote.
+     */
+    pciesvc_mem_barrier();
+
+    if (sz < 4 && (pa & 0x3)) {
+        /*
+         * If sub-dword read, shift return data to the correct
+         * byte lanes expected for this transaction.
+         *
+         *     data0 = data0 << (address-dword-offset * 8);
+         */
+        ind_rsp.data0 = ientry->data[0] << ((pa & 0x3) << 3);
+    } else {
+        ind_rsp.data0 = ientry->data[0];
+        ind_rsp.data1 = ientry->data[1];
+        ind_rsp.data2 = ientry->data[2];
+        ind_rsp.data3 = ientry->data[3];
+    }
+    ind_rsp.cpl_stat = ientry->cpl;
+    ind_rsp.port_id = ientry->port;
+    ind_rsp.axi_id = ientry->info.context_id;
+    ind_rsp.fetch_rsp = 0;
+
+    pciesvc_reg_wr32w(IND_RSP_ADDR, ind_rsp.w, IND_RSP_NWORDS);
+
+    ientry->completed = 1;
+}
+
+static void
+handle_indirect(const int port, pciehw_port_t *p, indirect_entry_t *ientry)
+{
+    const u_int32_t pmti = ientry->info.pmti;
+    pciehw_spmt_t *spmt = pciesvc_spmt_get(pmti);
+    const pcie_tlp_common_hdr_t *hdr = (void *)ientry->rtlp;
+    const u_int8_t tlp_type = hdr->type;
+
+    switch (tlp_type) {
+    case PCIE_TLP_TYPE_CFGRD0:
+    case PCIE_TLP_TYPE_CFGRD1:
+        pciehw_cfgrd_indirect(port, ientry);
+        spmt->swrd++;
+        p->stats.ind_cfgrd++;
+        break;
+    case PCIE_TLP_TYPE_CFGWR0:
+    case PCIE_TLP_TYPE_CFGWR1:
+        pciehw_cfgwr_indirect(port, ientry);
+        spmt->swwr++;
+        p->stats.ind_cfgwr++;
+        break;
+    case PCIE_TLP_TYPE_MEMRD:
+    case PCIE_TLP_TYPE_MEMRD64:
+        pciehw_barrd_indirect(port, ientry);
+        spmt->swrd++;
+        p->stats.ind_memrd++;
+        break;
+    case PCIE_TLP_TYPE_MEMWR:
+    case PCIE_TLP_TYPE_MEMWR64:
+        pciehw_barwr_indirect(port, ientry);
+        spmt->swwr++;
+        p->stats.ind_memwr++;
+        break;
+    case PCIE_TLP_TYPE_IORD:
+        pciehw_barrd_indirect(port, ientry);
+        spmt->swrd++;
+        p->stats.ind_iord++;
+        break;
+    case PCIE_TLP_TYPE_IOWR:
+        pciehw_barwr_indirect(port, ientry);
+        spmt->swwr++;
+        p->stats.ind_iowr++;
+        break;
+    default:
+        ientry->cpl = PCIECPL_UR;
+        pciehw_indirect_complete(ientry);
+        p->stats.ind_unknown++;
+        break;
+    }
+
+    pciesvc_spmt_put(spmt, DIRTY);
+}
+
+/******************************************************************
+ * apis
+ */
+
+int
+pciehw_indirect_intr_init(const int port,
+                          const u_int64_t msgaddr, const u_int32_t msgdata)
+{
+    return req_int_init(indirect_int_addr(), port,
+                        msgaddr, msgdata | MSGDATA_ADD_PORT);
+}
+
+static int
+pciehw_indirect_handle(const int port, const int polled)
+{
+    pciehw_port_t *p = pciesvc_port_get(port);
+    indirect_entry_t ientrybuf, *ientry = &ientrybuf;
+    int pending;
+    int r = 0;
+
+    pciesvc_memset(ientry, 0, sizeof(*ientry));
+    pending = read_pending_indirect_entry(port, ientry);
+
+    p->stats.ind_intr++;
+    if (polled) p->stats.ind_polled++;
+    if (!pending) {
+        p->stats.ind_spurious++;
+        goto out;
+    }
+
+    ientry->cpl = PCIECPL_SC; /* assume success */
+    handle_indirect(port, p, ientry);
+    r = 1;
+
+ out:
+    pciesvc_port_put(p, DIRTY);
+    return r;
+}
+
+int
+pciehw_indirect_intr(const int port)
+{
+    return pciehw_indirect_handle(port, 0);
+}
+
+/*
+ * Arrange to have the notify interrupt written to memory,
+ * then we can poll memory locations to see if there is work to do.
+ */
+int
+pciehw_indirect_poll_init(const int port)
+{
+    const u_int64_t msgaddr = pciesvc_indirect_intr_dest_pa(port);
+    const u_int32_t msgdata = 1;
+
+    return req_int_init(indirect_int_addr(), port, msgaddr, msgdata);
+}
+
+int
+pciehw_indirect_poll(const int port)
+{
+    int pending;
+    int r = 0;
+
+    read_ind_info(port, NULL, &pending);
+    if (pending) {
+        r = pciehw_indirect_handle(port, 1);
+    }
+    return r;
+}
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/indirect.h b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/indirect.h
new file mode 100644
index 000000000..6e08b6ece
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/indirect.h
@@ -0,0 +1,19 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (c) 2018,2021, Pensando Systems Inc.
+ */
+
+#ifndef __INDIRECT_H__
+#define __INDIRECT_H__
+
+#include "indirect_entry.h"
+
+int pciehw_indirect_poll_init(const int port);
+int pciehw_indirect_poll(const int port);
+int pciehw_indirect_intr_init(const int port,
+                              u_int64_t msgaddr, u_int32_t msgdata);
+int pciehw_indirect_intr(const int port);
+
+void pciehw_indirect_complete(indirect_entry_t *ientry);
+
+#endif /* __INDIRECT_H__ */
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/intr.c b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/intr.c
new file mode 100644
index 000000000..b1186525c
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/intr.c
@@ -0,0 +1,38 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2018,2021, Pensando Systems Inc.
+ */
+
+#include "pciesvc_impl.h"
+#include "intr.h"
+#include "intrutils.h"
+
+static void
+intr_config(const u_int32_t intrb,
+            const u_int32_t intrc,
+            const int legacy,
+            const int fmask)
+{
+    u_int32_t intr;
+
+    for (intr = intrb; intr < intrb + intrc; intr++) {
+        intr_fwcfg_mode(intr, legacy, fmask);
+    }
+}
+
+void
+pciehw_intr_config(pciehwdev_t *phwdev, const int legacy, const int fmask)
+{
+    int i;
+
+    if (phwdev->novrdintr) {
+        for (i = 0; i < phwdev->novrdintr; i++) {
+            const u_int32_t intrb = phwdev->ovrdintr[i].intrb;
+            const u_int32_t intrc = phwdev->ovrdintr[i].intrc;
+
+            intr_config(intrb, intrc, legacy, fmask);
+        }
+    } else {
+        intr_config(phwdev->intrb, phwdev->intrc, legacy, fmask);
+    }
+}
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/intr.h b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/intr.h
new file mode 100644
index 000000000..2b5cd5b9b
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/intr.h
@@ -0,0 +1,14 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (c) 2018,2021, Pensando Systems Inc.
+ */
+
+#ifndef __INTR_H__
+#define __INTR_H__
+
+union pciehwdev_u; typedef union pciehwdev_u pciehwdev_t;
+
+void pciehw_intr_config(pciehwdev_t *phwdev,
+                        const int legacy, const int fmask);
+
+#endif /* __INTR_H__ */
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/intrutils.c b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/intrutils.c
new file mode 100644
index 000000000..c4ff5e3b7
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/intrutils.c
@@ -0,0 +1,238 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2017-2022, Pensando Systems Inc.
+ */
+
+#include "pciesvc_impl.h"
+#include "intrutils.h"
+
+#define INTR_BASE               ASIC_(ADDR_BASE_INTR_INTR_OFFSET)
+#define INTR_COUNT              ASIC_(INTR_CSR_DHS_INTR_ASSERT_ENTRY_ARRAY_COUNT)
+
+#define INTR_MSIXCFG_OFFSET     ASIC_(INTR_CSR_DHS_INTR_MSIXCFG_BYTE_OFFSET)
+#define INTR_MSIXCFG_BASE       (INTR_BASE + INTR_MSIXCFG_OFFSET)
+#define INTR_MSIXCFG_STRIDE     0x10
+
+#define INTR_FWCFG_OFFSET       ASIC_(INTR_CSR_DHS_INTR_FWCFG_BYTE_OFFSET)
+#define INTR_FWCFG_BASE         (INTR_BASE + INTR_FWCFG_OFFSET)
+#define INTR_FWCFG_STRIDE       0x8
+
+#define INTR_DRVCFG_OFFSET      ASIC_(INTR_CSR_DHS_INTR_DRVCFG_BYTE_OFFSET)
+#define INTR_DRVCFG_BASE        (INTR_BASE + INTR_DRVCFG_OFFSET)
+#define INTR_DRVCFG_STRIDE      0x20
+
+#define INTR_ASSERT_OFFSET      ASIC_(INTR_CSR_DHS_INTR_ASSERT_BYTE_OFFSET)
+#define INTR_ASSERT_BASE        (INTR_BASE + INTR_ASSERT_OFFSET)
+#define INTR_ASSERT_STRIDE      0x4
+#define INTR_ASSERT_DATA        0x00000001 /* in little-endian */
+
+#define INTR_STATE_OFFSET       ASIC_(INTR_CSR_DHS_INTR_STATE_BYTE_OFFSET)
+#define INTR_STATE_BASE         (INTR_BASE + INTR_STATE_OFFSET)
+#define INTR_STATE_STRIDE       0x10
+
+#define NWORDS(a)               (sizeof(a) / sizeof(u_int32_t))
+
+static u_int64_t
+intr_msixcfg_addr(const int intrb)
+{
+    pciesvc_assert(intrb < INTR_COUNT);
+    return INTR_MSIXCFG_BASE + (intrb * INTR_MSIXCFG_STRIDE);
+}
+
+static u_int64_t
+intr_fwcfg_addr(const int intrb)
+{
+    pciesvc_assert(intrb < INTR_COUNT);
+    return INTR_FWCFG_BASE + (intrb * INTR_FWCFG_STRIDE);
+}
+
+static u_int64_t
+intr_drvcfg_addr(const int intrb)
+{
+    pciesvc_assert(intrb < INTR_COUNT);
+    return INTR_DRVCFG_BASE + (intrb * INTR_DRVCFG_STRIDE);
+}
+
+/*
+ * Set the drvcfg_mask for this interrupt resource.
+ * Return the previous value of the mask so caller can
+ * restore to previous value if desired.
+ */
+int
+intr_drvcfg_mask(const int intr, const int on)
+{
+    const u_int64_t pa = intr_drvcfg_addr(intr);
+    const int omask = pciesvc_reg_rd32(pa + offsetof(intr_drvcfg_t, mask));
+
+    pciesvc_reg_wr32(pa + offsetof(intr_drvcfg_t, mask), on);
+    return omask;
+}
+
+static void
+intr_msixcfg(const int intr,
+             const u_int64_t msgaddr, const u_int32_t msgdata, const int vctrl)
+{
+    const u_int64_t pa = intr_msixcfg_addr(intr);
+#define MSG_ADDR_OFF    0
+#define MSG_DATA_OFF    8
+#define VECTOR_CTRL_OFF 12
+
+    pciesvc_reg_wr64(pa + MSG_ADDR_OFF, msgaddr);
+    pciesvc_reg_wr32(pa + MSG_DATA_OFF, msgdata);
+    pciesvc_reg_wr32(pa + VECTOR_CTRL_OFF, vctrl);
+}
+
+static void
+intr_fwcfg_set_function_mask(const int intr, const int on)
+{
+    const u_int64_t pa = intr_fwcfg_addr(intr);
+    pciesvc_reg_wr32(pa, on);
+}
+
+static u_int64_t
+intr_assert_addr(const int intr)
+{
+    pciesvc_assert(intr < INTR_COUNT);
+    return INTR_ASSERT_BASE + (intr * INTR_ASSERT_STRIDE);
+}
+
+static u_int32_t
+intr_assert_data(void)
+{
+    return INTR_ASSERT_DATA;
+}
+
+void
+intr_assert(const int intr)
+{
+    const u_int64_t pa = intr_assert_addr(intr);
+    const u_int32_t data = intr_assert_data();
+
+    pciesvc_reg_wr32(pa, data);
+}
+
+/*
+ * Change the mode of the interrupt between legacy and msi mode.
+ *
+ * Note:  We are careful to make config changes to fwcfg only with
+ * the function_mask set.  Masking the interrupt will deassert the
+ * interrupt if asserted in legacy mode, then we change any config,
+ * then re-enable with the new config.  If necessary the interrupt
+ * will re-assert with the new config.
+ */
+void
+intr_fwcfg_mode(const int intr, const int legacy, const int fmask)
+{
+    const u_int64_t pa = intr_fwcfg_addr(intr);
+    intr_fwcfg_t v;
+
+    /* mask via function_mask while making changes */
+    intr_fwcfg_set_function_mask(intr, 1);
+    {
+        pciesvc_reg_rd32w(pa, v.w, NWORDS(v.w));
+        v.legacy = legacy;
+        pciesvc_reg_wr32w(pa, v.w, NWORDS(v.w));
+    }
+    if (!fmask) {
+        intr_fwcfg_set_function_mask(intr, fmask);
+    }
+}
+
+/*****************************************************************
+ * Reset section
+ */
+
+/*****************
+ * pba
+ */
+
+/*
+ * Reset this interrupt's contribution to the interrupt status
+ * Pending Bit Array (PBA).  We clear the PBA bit for this interrupt
+ * resource by returning all the "credits" for the interrupt.
+ *
+ * The driver interface to return credits is drvcfg.int_credits,
+ * but that register has special semantics where the value written
+ * to this register is atomically subtracted from the current value.
+ * We could use this interface to read the value X then write X back
+ * to the register to X - X = 0.  This works even for negative values
+ * since (-X) - (-X) = 0.
+ */
+static void
+intr_pba_clear(const int intr)
+{
+    const u_int64_t pa = intr_drvcfg_addr(intr);
+    u_int32_t credits;
+
+    credits = pciesvc_reg_rd32(pa + offsetof(intr_drvcfg_t, int_credits));
+    if (credits) {
+        pciesvc_reg_wr32(pa + offsetof(intr_drvcfg_t, int_credits), credits);
+    }
+}
+
+void
+intr_deassert(const int intr)
+{
+    intr_pba_clear(intr);
+}
+
+/*****************
+ * msixcfg
+ */
+
+/*
+ * Reset the msix control register group.  This group is usually
+ * owned by the host OS and the behavior, including these reset values,
+ * are specified by the PCIe spec.
+ */
+static void
+reset_msixcfg(const int intr)
+{
+    /* clear msg addr/data, vector_ctrl mask=1 */
+    intr_msixcfg(intr, 0, 0, 1);
+}
+
+static void
+intr_reset_msixcfg(const int intrb, const int intrc)
+{
+    int intr;
+
+    for (intr = intrb; intr < intrb + intrc; intr++) {
+        reset_msixcfg(intr);
+    }
+}
+
+/*****************
+ * intr mode
+ */
+
+/*
+ * Reset the interrupt "mode" to "legacy".
+ */
+static void
+reset_mode(const int intr)
+{
+    /* reset to legacy mode, no fmask (CMD.int_disable == 0) */
+    intr_fwcfg_mode(intr, 1, 0);
+}
+
+static void
+intr_reset_mode(const int intrb, const int intrc)
+{
+    int intr;
+
+    for (intr = intrb; intr < intrb + intrc; intr++) {
+        reset_mode(intr);
+    }
+}
+
+/*****************
+ * external reset apis
+ */
+
+void
+intr_reset_pci(const int intrb, const int intrc, const int dmask)
+{
+    intr_reset_msixcfg(intrb, intrc);
+    intr_reset_mode(intrb, intrc);
+}
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/intrutils.h b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/intrutils.h
new file mode 100644
index 000000000..2d1362f39
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/intrutils.h
@@ -0,0 +1,84 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (c) 2018-2019,2022, Pensando Systems Inc.
+ */
+
+#ifndef __INTRUTILS_H__
+#define __INTRUTILS_H__
+
+#ifdef __cplusplus
+extern "C" {
+#if 0
+} /* close to calm emacs autoindent */
+#endif
+#endif
+
+typedef struct intr_drvcfg_s {
+    u_int32_t coal_init;
+    u_int32_t mask;
+    u_int32_t int_credits;
+    u_int32_t mask_on_assert;
+    u_int32_t coal_curr;
+} __attribute__((packed)) intr_drvcfg_t;
+
+typedef struct intr_msixcfg_s {
+    u_int64_t msgaddr;
+    u_int32_t msgdata;
+    u_int32_t vector_ctrl;
+} __attribute__((packed)) intr_msixcfg_t;
+
+typedef union intr_fwcfg_u {
+    struct {
+        u_int32_t function_mask:1;
+        u_int32_t rsrv:31;
+        u_int32_t lif:11;
+        u_int32_t port_id:3;
+        u_int32_t local_int:1;
+        u_int32_t legacy:1;
+        u_int32_t int_pin:2;
+        u_int32_t rsrv2:14;
+    } __attribute__((packed));
+    u_int32_t w[2];
+} intr_fwcfg_t;
+
+typedef union intr_state_s {
+    struct {
+        u_int64_t msixcfg_msg_addr_51_2:50;
+        u_int64_t msixcfg_msg_data:32;
+        u_int64_t msixcfg_vector_ctrl:1;
+        u_int64_t fwcfg_function_mask:1;
+        u_int64_t fwcfg_lif:11;
+        u_int64_t fwcfg_local_int:1;
+        u_int64_t fwcfg_legacy_int:1;
+        u_int64_t fwcfg_legacy_pin:2;
+        u_int64_t drvcfg_mask:1;
+          int64_t drvcfg_int_credits:16; /* signed */
+        u_int64_t drvcfg_mask_on_assert:1;
+        u_int64_t fwcfg_port_id:3;
+    } __attribute__((packed));
+    u_int32_t w[4];
+} intr_state_t;
+
+/* override these to avoid static link dups */
+#define intr_assert             _pciesvc_intr_assert
+#define intr_deassert           _pciesvc_intr_deassert
+#define intr_drvcfg_mask        _pciesvc_intr_drvcfg_mask
+#define intr_fwcfg_mode         _pciesvc_intr_fwcfg_mode
+#define intr_reset_pci          _pciesvc_intr_reset_pci
+
+void intr_assert(const int intr);
+void intr_deassert(const int intr);
+int intr_drvcfg_mask(const int intr, const int on);
+void intr_fwcfg_mode(const int intr, const int legacy, const int fmask);
+
+/*
+ * intr_reset_pci() - reset the pcie managed register groups to default values,
+ *                    use for pcie block resets (FLR, bus reset).
+ */
+void intr_reset_pci(const int intrb, const int intrc, const int dmask);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __INTRUTILS_H__ */
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/log.c b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/log.c
new file mode 100644
index 000000000..ed611a9f8
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/log.c
@@ -0,0 +1,84 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2017-2019,2021-2022, Pensando Systems Inc.
+ */
+
+#include "pciesvc_impl.h"
+#include "log.h"
+
+#ifdef PCIESVC_SYSTEM_EXTERN
+
+static void
+logv(pciesvc_logpri_t pri, const char *fmt, va_list ap)
+{
+    pciesvc_eventdata_t evd;
+    pciesvc_logmsg_t *logmsg;
+    char buf[80];
+
+    if (pri < pciesvc_log_level) {
+        return;
+    }
+
+    pciesvc_vsnprintf(buf, sizeof(buf), fmt, ap);
+
+    pciesvc_memset(&evd, 0, sizeof(evd));
+    evd.evtype = PCIESVC_EV_LOGMSG;
+    logmsg = &evd.logmsg;
+    logmsg->pri = pri;
+    pciesvc_memcpy(logmsg->msg, buf, sizeof(logmsg->msg));
+    pciesvc_event_handler(&evd, sizeof(evd));
+}
+
+void
+pciesvc_logdebug(const char *fmt, ...)
+{
+    va_list ap;
+
+    va_start(ap, fmt);
+    logv(PCIESVC_LOGPRI_DEBUG, fmt, ap);
+    va_end(ap);
+}
+
+void
+pciesvc_loginfo(const char *fmt, ...)
+{
+    va_list ap;
+
+    va_start(ap, fmt);
+    logv(PCIESVC_LOGPRI_INFO, fmt, ap);
+    va_end(ap);
+}
+
+void
+pciesvc_logwarn(const char *fmt, ...)
+{
+    va_list ap;
+
+    va_start(ap, fmt);
+    logv(PCIESVC_LOGPRI_WARN, fmt, ap);
+    va_end(ap);
+}
+
+void
+pciesvc_logerror(const char *fmt, ...)
+{
+    va_list ap;
+
+    va_start(ap, fmt);
+    logv(PCIESVC_LOGPRI_ERROR, fmt, ap);
+    va_end(ap);
+}
+
+void
+pciesvc_loglocal(const char *fmt, ...)
+{
+    char buf[80];
+    va_list ap;
+
+    va_start(ap, fmt);
+    pciesvc_vsnprintf(buf, sizeof(buf), fmt, ap);
+    va_end(ap);
+    pciesvc_log(buf);
+}
+
+#endif
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/log.h b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/log.h
new file mode 100644
index 000000000..3ceede499
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/log.h
@@ -0,0 +1,35 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (c) 2017-2018,2021-2022, Pensando Systems Inc.
+ */
+
+#ifndef __LOG_H__
+#define __LOG_H__
+
+#ifdef __cplusplus
+extern "C" {
+#if 0
+} /* close to calm emacs autoindent */
+#endif
+#endif
+
+#ifdef PCIESVC_SYSTEM_EXTERN
+
+void pciesvc_loglocal(const char *fmt, ...)
+    __attribute__((format (printf, 1, 2)));
+void pciesvc_logdebug(const char *fmt, ...)
+    __attribute__((format (printf, 1, 2)));
+void pciesvc_loginfo(const char *fmt, ...)
+    __attribute__((format (printf, 1, 2)));
+void pciesvc_logwarn(const char *fmt, ...)
+    __attribute__((format (printf, 1, 2)));
+void pciesvc_logerror(const char *fmt, ...)
+    __attribute__((format (printf, 1, 2)));
+
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __LOG_H__ */
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/notify.c b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/notify.c
new file mode 100644
index 000000000..cbedefb1e
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/notify.c
@@ -0,0 +1,272 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2018,2021, Pensando Systems Inc.
+ */
+
+#include "pciesvc_impl.h"
+#include "pcietlp.h"
+#include "req_int.h"
+#include "notify.h"
+
+#define NOTIFY_EN               PXB_(CFG_TGT_NOTIFY_EN)
+#define NOTIFY_RING_SIZE        PXB_(CFG_TGT_REQ_NOTIFY_RING_SIZE)
+
+#define NOTIFY_BASE             PXB_(DHS_TGT_NOTIFY)
+#define NOTIFY_STRIDE           4
+
+static u_int64_t
+notify_addr(const int port)
+{
+    return NOTIFY_BASE + (port * NOTIFY_STRIDE);
+}
+
+static u_int64_t
+notify_int_addr(void)
+{
+    return PXB_(CFG_TGT_REQ_NOTIFY_INT);
+}
+
+static void
+notify_get_pici(const int port, int *pip, int *cip)
+{
+    const u_int32_t pici = pciesvc_reg_rd32(notify_addr(port));
+
+    *pip = pici & 0xffff;
+    *cip = pici >> 16;
+}
+
+static void
+notify_get_masked_pici(const int port, int *pip, int *cip,
+                       const u_int32_t ring_mask)
+{
+    int pi, ci;
+
+    notify_get_pici(port, &pi, &ci);
+    *pip = pi & ring_mask;
+    *cip = ci & ring_mask;
+}
+
+/*
+ * NOTE: The hw doesn't allow sw to write to PI,
+ * when we write to the NOTIFY register only the CI is updated.
+ * To reset to empty ring, set CI = PI.
+ */
+static void
+notify_set_ci(const int port, const int ci)
+{
+    const u_int32_t pici = (ci << 16);
+    pciesvc_reg_wr32(notify_addr(port), pici);
+}
+
+static u_int32_t
+notify_pici_delta(const int pi, const int ci, const u_int32_t ring_mask)
+{
+    if (pi > ci) {
+        return pi - ci;
+    } else {
+        return pi + ring_mask + 1 - ci;
+    }
+}
+
+static void
+notify_set_enable(const u_int32_t mask)
+{
+    union {
+        struct {
+            u_int32_t msg:1;
+            u_int32_t pmv:1;
+            u_int32_t db_pmv:1;
+            u_int32_t unsupp:1;
+            u_int32_t atomic:1;
+            u_int32_t pmt_miss:1;
+            u_int32_t pmr_invalid:1;
+            u_int32_t prt_invalid:1;
+            u_int32_t rc_vfid_miss:1;
+            u_int32_t prt_oor:1;
+            u_int32_t vfid_oor:1;
+            u_int32_t cfg_bdf_oor:1;
+            u_int32_t pmr_ecc_err:1;
+            u_int32_t prt_ecc_err:1;
+        } __attribute__((packed));
+        u_int32_t w;
+    } en;
+
+    en.w = pciesvc_reg_rd32(NOTIFY_EN);
+    en.w = mask;
+    pciesvc_reg_wr32(NOTIFY_EN, en.w);
+}
+
+static void
+notify_enable(void)
+{
+    notify_set_enable(0x3fff); /* enable all sources */
+}
+
+static int
+notify_ring_inc(const int idx, const int inc, const u_int32_t ring_mask)
+{
+    return (idx + inc) & ring_mask;
+}
+
+static void
+handle_notify(const int port, pciehw_port_t *p, notify_entry_t *nentry)
+{
+    const tlpauxinfo_t *info = &nentry->info;
+
+    /*
+     * If info->indirect_reason == 0 means we hit an entry we installed
+     * in the PMT for indirect handling.  Go process the transaction.
+     *
+     * If info->indirect_reason != 0 then perhaps
+     * this is an exception or error.  Track reason code stats.
+     */
+    if (info->indirect_reason == 0) {
+        const u_int32_t pmti = info->pmti;
+        pciehw_spmt_t *spmt = pciesvc_spmt_get(pmti);
+        const pcie_tlp_common_hdr_t *hdr = (void *)nentry->rtlp;
+        const u_int8_t tlp_type = hdr->type;
+
+        switch (tlp_type) {
+        case PCIE_TLP_TYPE_CFGRD0:
+        case PCIE_TLP_TYPE_CFGRD1:
+            pciehw_cfgrd_notify(port, nentry);
+            spmt->swrd++;
+            p->stats.not_cfgrd++;
+            break;
+        case PCIE_TLP_TYPE_CFGWR0:
+        case PCIE_TLP_TYPE_CFGWR1:
+            pciehw_cfgwr_notify(port, nentry);
+            spmt->swwr++;
+            p->stats.not_cfgwr++;
+            break;
+        case PCIE_TLP_TYPE_MEMRD:
+        case PCIE_TLP_TYPE_MEMRD64:
+            pciehw_barrd_notify(port, nentry);
+            spmt->swrd++;
+            p->stats.not_memrd++;
+            break;
+        case PCIE_TLP_TYPE_MEMWR:
+        case PCIE_TLP_TYPE_MEMWR64:
+            pciehw_barwr_notify(port, nentry);
+            spmt->swwr++;
+            p->stats.not_memwr++;
+            break;
+        case PCIE_TLP_TYPE_IORD:
+            pciehw_barrd_notify(port, nentry);
+            spmt->swrd++;
+            p->stats.not_iord++;
+            break;
+        case PCIE_TLP_TYPE_IOWR:
+            pciehw_barwr_notify(port, nentry);
+            spmt->swwr++;
+            p->stats.not_iowr++;
+            break;
+        default:
+            p->stats.not_unknown++;
+            break;
+        }
+        pciesvc_spmt_put(spmt, DIRTY);
+    } else {
+        uint64_t *notify_reasons = &p->stats.notify_reason_stats;
+        notify_reasons[info->indirect_reason]++;
+    }
+}
+
+/******************************************************************
+ * apis
+ */
+
+/*
+ * CFG_TGT_REQ_NOTIFY_INT
+ */
+int
+pciehw_notify_intr_init(const int port, u_int64_t msgaddr, u_int32_t msgdata)
+{
+    notify_enable();
+    return req_int_init(notify_int_addr(), port,
+                        msgaddr, msgdata | MSGDATA_ADD_PORT);
+}
+
+static int
+pciehw_notify_handle(const int port, const int polled)
+{
+    pciehw_port_t *p = pciesvc_port_get(port);
+    const u_int32_t ring_mask = pciesvc_notify_ring_mask(port);
+    int r, pi, ci, i, endidx;
+    u_int32_t pici_delta;
+
+    p->stats.not_intr++;
+    if (polled) p->stats.not_polled++;
+
+    notify_get_masked_pici(port, &pi, &ci, ring_mask);
+    if (ci == pi) {
+        p->stats.not_spurious++;
+        r = 0; /* not our intr */
+        goto out;
+    }
+
+    pici_delta = notify_pici_delta(pi, ci, ring_mask);
+
+    p->stats.not_cnt += pici_delta;
+    if (pici_delta > p->stats.not_max) {
+        p->stats.not_max = pici_delta;
+    }
+
+    endidx = notify_ring_inc(pi, 1, ring_mask);
+    for (i = notify_ring_inc(ci, 1, ring_mask);
+         i != endidx;
+         i = notify_ring_inc(i, 1, ring_mask)) {
+        notify_entry_t *nentry;
+
+        nentry = pciesvc_notify_ring_get(port, i);
+        handle_notify(port, p, nentry);
+        pciesvc_notify_ring_put(nentry);
+
+        /* return some slots occasionally while processing */
+        if ((i & 0xff) == 0) {
+            notify_set_ci(port, i);
+        }
+    }
+
+    /* we consumed these, adjust ci */
+    notify_set_ci(port, pi);
+    r = 1; /* handled intr */
+
+ out:
+    pciesvc_port_put(p, DIRTY);
+    return r;
+}
+
+int
+pciehw_notify_intr(const int port)
+{
+    return pciehw_notify_handle(port, 0);
+}
+
+/*
+ * Arrange to have the notify interrupt written to memory,
+ * then we can poll memory locations to see if there is work to do.
+ */
+int
+pciehw_notify_poll_init(const int port)
+{
+    const u_int64_t msgaddr = pciesvc_notify_intr_dest_pa(port);
+    const u_int32_t msgdata = 1;
+
+    notify_enable();
+    return req_int_init(notify_int_addr(), port, msgaddr, msgdata);
+}
+
+int
+pciehw_notify_poll(const int port)
+{
+    const u_int32_t ring_mask = pciesvc_notify_ring_mask(port);
+    int pi, ci;
+    int r = 0;
+
+    notify_get_masked_pici(port, &pi, &ci, ring_mask);
+    if (ci != pi) {
+        r = pciehw_notify_handle(port, 1);
+    }
+    return r;
+}
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/notify.h b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/notify.h
new file mode 100644
index 000000000..5096ba67f
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/notify.h
@@ -0,0 +1,17 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (c) 2018, Pensando Systems Inc.
+ */
+
+#ifndef __NOTIFY_H__
+#define __NOTIFY_H__
+
+#include "notify_entry.h"
+
+int pciehw_notify_poll_init(const int port);
+int pciehw_notify_poll(const int port);
+int pciehw_notify_intr_init(const int port,
+                            u_int64_t msgaddr, u_int32_t msgdata);
+int pciehw_notify_intr(const int port);
+
+#endif /* __NOTIFY_H__ */
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/pciehwdev.c b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/pciehwdev.c
new file mode 100644
index 000000000..0f6800c2c
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/pciehwdev.c
@@ -0,0 +1,36 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2017-2022, Pensando Systems Inc.
+ */
+
+#include "pciesvc_impl.h"
+#include "bdf.h"
+
+u_int16_t
+pciehwdev_get_hostbdf(const pciehwdev_t *phwdev)
+{
+    pciehw_port_t *p;
+    u_int8_t secbus;
+    u_int16_t bdf;
+
+    p = pciesvc_port_get(phwdev->port);
+    secbus = p->secbus;
+    pciesvc_port_put(p, CLEAN);
+
+    /*
+     * If we have a parent then map our local bdf based on root secbus,
+     * else
+     *     No parent this is the root, so no local bdf,
+     *     construct bdf based on primary bus, also known as (secbus - 1).
+     *     If no secbus set yet because no bios scan, then use 0.
+     */
+    if (phwdev->parenth) {
+        bdf = bdf_make(bdf_to_bus(phwdev->bdf) + secbus,
+                       bdf_to_dev(phwdev->bdf),
+                       bdf_to_fnc(phwdev->bdf));
+    } else {
+        const u_int8_t bus = secbus ? secbus - 1 : 0;
+        bdf = bdf_make(bus, 0, 0);
+    }
+    return bdf;
+}
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/pciesvc.c b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/pciesvc.c
new file mode 100644
index 000000000..0ac9d11fe
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/pciesvc.c
@@ -0,0 +1,279 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2021-2022, Pensando Systems Inc.
+ */
+
+#include "pciesvc_impl.h"
+#include "indirect.h"
+#include "notify.h"
+
+int pciesvc_version_major = PCIESVC_VERSION_MAJ;
+int pciesvc_version_minor = PCIESVC_VERSION_MIN;
+
+pciesvc_logpri_t pciesvc_log_level = PCIESVC_LOGPRI_INFO;
+
+/* local sanitized version of our params. */
+typedef struct pciesvc_lparams_s {
+    int         port;                   /* port */
+    uint32_t    valid:1;                /* initialized */
+    uint32_t    ind_poll:1;             /* indirect poll for work */
+    uint32_t    ind_intr:1;             /* indirect intr for work */
+    uint32_t    not_poll:1;             /* notify   poll for work */
+    uint32_t    not_intr:1;             /* notify   intr for work */
+    uint32_t    mac_poll:1;             /* mac poll */
+    uint32_t    mac_intr:1;             /* mac intr */
+    uint64_t    ind_msgaddr;            /* ind_intr=1: intr msg addr */
+    uint32_t    ind_msgdata;            /* ind_intr=1: intr msg data */
+    uint64_t    not_msgaddr;            /* not_intr=1: intr msg addr */
+    uint32_t    not_msgdata;            /* not_intr=1: intr msg addr */
+} pciesvc_lparams_t;
+
+static pciesvc_lparams_t lparams[PCIEHW_NPORTS];
+
+static pciesvc_lparams_t *
+params_v0_to_lparams(pciesvc_params_v0_t *p)
+{
+    pciesvc_lparams_t *lp;
+
+    if (p->port < 0 || p->port >= PCIEHW_NPORTS) {
+        pciesvc_loglocal("pciesvc params invalid port %d\n", p->port);
+        return NULL;
+    }
+
+    lp = &lparams[p->port];
+    pciesvc_memset(lp, 0, sizeof(*lp));
+    lp->port = p->port;
+
+    /* poll *or* intr */
+    if (p->ind_poll && p->ind_intr) {
+        pciesvc_loglocal("pciesvc params indirect poll and intr\n");
+        return NULL;
+    }
+    if (p->not_poll && p->not_intr) {
+        pciesvc_loglocal("pciesvc params notify poll and intr\n");
+        return NULL;
+    }
+    if (p->mac_poll && p->mac_intr) {
+        pciesvc_loglocal("pciesvc params mac poll and intr\n");
+        return NULL;
+    }
+
+    /* XXX don't mac handle yet */
+    if (p->mac_poll || p->mac_intr) {
+        pciesvc_loglocal("pciesvc params mac poll/intr not implemented\n");
+        return NULL;
+    }
+
+    /* intr requires msgaddr */
+    if (p->ind_intr && p->ind_msgaddr == 0) {
+        pciesvc_loglocal("pciesvc params no indirect msgaddr\n");
+        return NULL;
+    }
+    if (p->not_intr && p->not_msgaddr == 0) {
+        pciesvc_loglocal("pciesvc params no notify msgaddr\n");
+        return NULL;
+    }
+
+    lp->ind_poll = p->ind_poll;
+    lp->ind_intr = p->ind_intr;
+    lp->not_poll = p->not_poll;
+    lp->not_intr = p->not_intr;
+    lp->mac_poll = p->mac_poll;
+    lp->mac_intr = p->mac_intr;
+    lp->ind_msgaddr = p->ind_msgaddr;
+    lp->ind_msgdata = p->ind_msgdata;
+    lp->not_msgaddr = p->not_msgaddr;
+    lp->not_msgdata = p->not_msgdata;
+    lp->valid = 1;
+    return lp;
+}
+
+static pciesvc_lparams_t *
+params_to_lparams(pciesvc_params_t *params)
+{
+    pciesvc_lparams_t *lp = NULL;
+
+    switch (params->version) {
+    case 0:
+        lp = params_v0_to_lparams(&params->params_v0);
+        break;
+    default:
+        lp = NULL;
+        break;
+    }
+    return lp;
+}
+
+static int
+params_port(pciesvc_params_t *params)
+{
+    int port = -2;
+
+    switch (params->version) {
+    case 0:
+        port = params->params_v0.port;
+        break;
+    default:
+        port = -2;
+        break;
+    }
+    return port;
+}
+
+int
+pciesvc_init(pciesvc_params_t *params)
+{
+    int r;
+    pciesvc_lparams_t *lp;
+
+    /* if kpcimgr active_ports is unset (0) we get -1 here */
+    if (params_port(params) == -1) {
+        pciesvc_loglocal("pciesvc_init: no active ports\n");
+        return 0;
+    }
+
+    lp = params_to_lparams(params);
+    if (lp == NULL) goto err_out;
+
+    if (lp->ind_poll) {
+        if ((r = pciesvc_indirect_poll_init(lp->port)) < 0) {
+            pciesvc_loglocal("indirect_poll_init failed: %d\n", r);
+            goto err_out;
+        }
+    } else if (lp->ind_intr) {
+        if ((r = pciesvc_indirect_intr_init(lp->port,
+                                            lp->ind_msgaddr,
+                                            lp->ind_msgdata)) < 0) {
+            pciesvc_loglocal("indirect_intr_init failed: %d\n", r);
+            goto err_out;
+        }
+    }
+
+    if (lp->not_poll) {
+        if ((r = pciesvc_notify_poll_init(lp->port)) < 0) {
+            pciesvc_loglocal("indirect_poll_init failed: %d\n", r);
+            goto err_out;
+        }
+    } else if (lp->not_intr) {
+        if ((r = pciesvc_notify_intr_init(lp->port,
+                                          lp->not_msgaddr,
+                                          lp->not_msgdata)) < 0) {
+            pciesvc_loglocal("notify_intr_init failed: %d\n", r);
+            goto err_out;
+        }
+    }
+
+    return 0;
+
+ err_out:
+    if (lp) lp->valid = 0;
+    return -1;
+}
+
+void
+pciesvc_shut(const int port)
+{
+    pciesvc_lparams_t *lp;
+
+    if (port < 0 || port >= PCIEHW_NPORTS) return;
+
+    lp = &lparams[port];
+    if (!lp->valid) return;
+
+    /*
+     * Shutdown any interrupts.
+     * Hardware doesn't have an interrupt disable setting.
+     * For now init for poll, then don't poll anymore.
+     */
+    if (lp->ind_intr) {
+        pciesvc_indirect_poll_init(port);
+    }
+    if (lp->not_intr) {
+        pciesvc_notify_poll_init(port);
+    }
+
+    lp->valid = 0;
+}
+
+int
+pciesvc_poll(const int port)
+{
+    pciesvc_lparams_t *lp;
+    int ind_poll = 0;
+    int not_poll = 0;
+
+    if (port < 0 || port >= PCIEHW_NPORTS) return -1;
+
+    lp = &lparams[port];
+    if (!lp->valid) return -1;
+
+    ind_poll = pciesvc_indirect_poll(lp->port);
+    not_poll = pciesvc_notify_poll(lp->port);
+
+    return (ind_poll || not_poll);
+}
+
+void
+pciesvc_get_version(int *maj, int *min)
+{
+    *maj = pciesvc_version_major;
+    *min = pciesvc_version_minor;
+}
+
+/******************************************************************
+ * indirect
+ */
+
+int
+pciesvc_indirect_poll_init(const int port)
+{
+    return pciehw_indirect_poll_init(port);
+}
+
+int
+pciesvc_indirect_poll(const int port)
+{
+    return pciehw_indirect_poll(port);
+}
+
+int
+pciesvc_indirect_intr_init(const int port,
+                           u_int64_t msgaddr, u_int32_t msgdata)
+{
+    return pciehw_indirect_intr_init(port, msgaddr, msgdata);
+}
+
+int
+pciesvc_indirect_intr(const int port)
+{
+    return pciehw_indirect_intr(port);
+}
+
+/******************************************************************
+ * notify
+ */
+
+int
+pciesvc_notify_poll_init(const int port)
+{
+    return pciehw_notify_poll_init(port);
+}
+
+int
+pciesvc_notify_poll(const int port)
+{
+    return pciehw_notify_poll(port);
+}
+
+int
+pciesvc_notify_intr_init(const int port,
+                         u_int64_t msgaddr, u_int32_t msgdata)
+{
+    return pciehw_notify_intr_init(port, msgaddr, msgdata);
+}
+
+int
+pciesvc_notify_intr(const int port)
+{
+    return pciehw_notify_intr(port);
+}
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/pciesvc_impl.h b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/pciesvc_impl.h
new file mode 100644
index 000000000..948cb6201
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/pciesvc_impl.h
@@ -0,0 +1,311 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (c) 2021-2022, Pensando Systems Inc.
+ */
+
+#ifndef __PCIESVC_IMPL_H__
+#define __PCIESVC_IMPL_H__
+
+#ifdef __cplusplus
+extern "C" {
+#if 0
+} /* close to calm emacs autoindent */
+#endif
+#endif
+
+#include "pciesvc_system.h"
+#include "pciesvc.h"
+#include "notify_entry.h"
+#include "cfgspace.h"
+#include "portcfg.h"
+#include "log.h"
+#include "asic_regs.h"
+#include "pmt.h"
+
+struct indirect_entry_s; typedef struct indirect_entry_s indirect_entry_t;
+struct notify_entry_s; typedef struct notify_entry_s notify_entry_t;
+
+void pciehw_cfgrd_indirect(const int port, indirect_entry_t *ientry);
+void pciehw_cfgwr_indirect(const int port, indirect_entry_t *ientry);
+void pciehw_barrd_indirect(const int port, indirect_entry_t *ientry);
+void pciehw_barwr_indirect(const int port, indirect_entry_t *ientry);
+
+void pciehw_cfgrd_notify(const int port, notify_entry_t *nentry);
+void pciehw_cfgwr_notify(const int port, notify_entry_t *nentry);
+void pciehw_barrd_notify(const int port, notify_entry_t *nentry);
+void pciehw_barwr_notify(const int port, notify_entry_t *nentry);
+
+enum pciesvc_rsttype_e; typedef enum pciesvc_rsttype_e pciesvc_rsttype_t;
+void pciehw_cfg_reset(pciehwdev_t *phwdev, const pciesvc_rsttype_t rsttype);
+
+u_int64_t pciehw_bar_getsize(pciehwbar_t *phwbar);
+void pciehw_bar_setaddr(pciehwbar_t *phwbar, const u_int64_t addr);
+void pciehw_bar_load(pciehwdev_t *phwdev, pciehwbar_t *phwbar);
+void pciehw_bar_enable(pciehwdev_t *phwdev, pciehwbar_t *phwbar, const int on);
+
+u_int16_t pciehwdev_get_hostbdf(const pciehwdev_t *phwdev);
+
+#define CLEAN                   0
+#define DIRTY                   1
+
+static inline void
+pciesvc_reg_rd32w(const uint64_t pa, uint32_t *w, const uint32_t nw)
+{
+    int i;
+
+    for (i = 0; i < nw; i++) {
+        w[i] = pciesvc_reg_rd32(pa + (i * 4));
+    }
+}
+
+static inline void
+pciesvc_reg_wr32w(const uint64_t pa, const uint32_t *w, const uint32_t nw)
+{
+    int i;
+
+    for (i = 0; i < nw; i++) {
+        pciesvc_reg_wr32(pa + (i * 4), w[i]);
+    }
+}
+
+static inline uint64_t
+pciesvc_reg_rd64(const uint64_t pa)
+{
+    uint64_t val;
+    uint32_t *w = (uint32_t *)&val;
+
+    pciesvc_reg_rd32w(pa, w, 2);
+    return val;
+}
+
+static inline void
+pciesvc_reg_wr64(const uint64_t pa, const uint64_t val)
+{
+    const uint32_t *w = (const uint32_t *)&val;
+
+    pciesvc_reg_wr32w(pa, w, 2);
+}
+
+static inline uint64_t
+pciesvc_indirect_intr_dest_pa(const int port)
+{
+    static uint64_t intr_dest_pa[PCIEHW_NPORTS];
+
+    pciesvc_assert(port >= 0 && port < PCIEHW_NPORTS);
+    if (intr_dest_pa[port] == 0) {
+        pciehw_mem_t *phwmem = pciesvc_hwmem_get();
+        intr_dest_pa[port] =
+            pciesvc_vtop(&phwmem->indirect_intr_dest[port]);
+    }
+    return intr_dest_pa[port];
+}
+
+static inline uint64_t
+pciesvc_notify_intr_dest_pa(const int port)
+{
+    static uint64_t intr_dest_pa[PCIEHW_NPORTS];
+
+    pciesvc_assert(port >= 0 && port < PCIEHW_NPORTS);
+    if (intr_dest_pa[port] == 0) {
+        pciehw_mem_t *phwmem = pciesvc_hwmem_get();
+        intr_dest_pa[port] =
+            pciesvc_vtop(&phwmem->notify_intr_dest[port]);
+    }
+    return intr_dest_pa[port];
+}
+
+static inline uint64_t
+pciesvc_cfgcur_pa(void)
+{
+    static uint64_t cfgcur_pa;
+
+    if (cfgcur_pa == 0) {
+        pciehw_mem_t *phwmem = pciesvc_hwmem_get();
+        cfgcur_pa = pciesvc_vtop(phwmem->cfgcur);
+    }
+    return cfgcur_pa;
+}
+
+static inline uint64_t
+pciesvc_notify_ring_mask(const int port)
+{
+    static uint64_t ring_mask;
+
+    if (ring_mask == 0) {
+        pciehw_shmem_t *pshmem = pciesvc_shmem_get();
+        ring_mask = pshmem->notify_ring_mask;
+    }
+    return ring_mask;
+}
+
+static inline notify_entry_t *
+pciesvc_notify_ring_get(const int port, const int idx)
+{
+    pciehw_mem_t *phwmem = pciesvc_hwmem_get();
+    notify_entry_t *notify_ring;
+
+    notify_ring = (notify_entry_t *)phwmem->notify_area[port];
+    return &notify_ring[idx];
+}
+
+static inline void
+pciesvc_notify_ring_put(const notify_entry_t *nentry)
+{
+    /* nop */
+}
+
+static inline pciehw_port_t *
+pciesvc_port_get(const int port)
+{
+    pciehw_shmem_t *pshmem = pciesvc_shmem_get();
+
+    pciesvc_assert(port >= 0 && port <= PCIEHW_NPORTS);
+    return &pshmem->port[port];
+}
+
+static inline void
+pciesvc_port_put(const pciehw_port_t *p, const int dirty)
+{
+    /* nop */
+}
+
+static inline pciehwdev_t *
+pciesvc_dev_get(const pciehwdevh_t hwdevh)
+{
+    pciehw_shmem_t *pshmem = pciesvc_shmem_get();
+
+    return hwdevh > 0 && hwdevh < PCIEHW_NDEVS ? &pshmem->dev[hwdevh] : NULL;
+}
+
+static inline void
+pciesvc_dev_put(const pciehwdev_t *phwdev, const int dirty)
+{
+    /* nop */
+}
+
+static inline void
+pciesvc_cfgspace_get(const pciehwdevh_t hwdevh, cfgspace_t *cs)
+{
+    pciehw_mem_t *phwmem = pciesvc_hwmem_get();
+    pciehw_shmem_t *pshmem = pciesvc_shmem_get();
+
+    cs->cur = phwmem->cfgcur[hwdevh];
+    cs->msk = pshmem->cfgmsk[hwdevh];
+    cs->rst = pshmem->cfgrst[hwdevh];
+    cs->size = PCIEHW_CFGSZ;
+}
+
+static inline void
+pciesvc_cfgspace_put(const cfgspace_t *cs, const int dirty)
+{
+    /* nop */
+}
+
+static inline pciehw_spmt_t *
+pciesvc_spmt_get(const int idx)
+{
+    pciehw_shmem_t *pshmem = pciesvc_shmem_get();
+
+    return &pshmem->spmt[idx];
+}
+
+static inline void
+pciesvc_spmt_put(const pciehw_spmt_t *spmt, const int dirty)
+{
+    /* nop */
+}
+
+static inline pciehw_sprt_t *
+pciesvc_sprt_get(const int idx)
+{
+    pciehw_shmem_t *pshmem = pciesvc_shmem_get();
+
+    return &pshmem->sprt[idx];
+}
+
+static inline void
+pciesvc_sprt_put(const pciehw_sprt_t *sprt, const int dirty)
+{
+    /* nop */
+}
+
+static inline void *
+pciesvc_vpd_get(const pciehwdevh_t hwdevh)
+{
+    pciehw_shmem_t *pshmem = pciesvc_shmem_get();
+
+    return &pshmem->vpddata[hwdevh];
+}
+
+static inline void
+pciesvc_vpd_put(const void *vpddata, const int dirty)
+{
+    /* nop */
+}
+
+static inline pciehwdev_t *
+pciehwdev_get(const pciehwdevh_t hwdevh)
+{
+    pciehwdev_t *phwdev = pciesvc_dev_get(hwdevh);
+
+    /* older fw versions didn't init hwdevh, set it now */
+    if (phwdev && phwdev->hwdevh != hwdevh) {
+        phwdev->hwdevh = hwdevh;
+    }
+    return phwdev;
+}
+
+static inline void
+pciehwdev_put(const pciehwdev_t *phwdev, const int dirty)
+{
+    pciesvc_dev_put(phwdev, dirty);
+}
+
+static inline pciehwdevh_t
+pciehwdev_geth(const pciehwdev_t *phwdev)
+{
+    return phwdev ? phwdev->hwdevh : 0;
+}
+
+static inline const char *
+pciehwdev_get_name(const pciehwdev_t *phwdev)
+{
+    return phwdev->name;
+}
+
+static inline pciehwdev_t *
+pciehwdev_vfdev_get(const pciehwdev_t *phwdev, const int vfidx)
+{
+    pciesvc_assert(vfidx >= 0 && vfidx < phwdev->totalvfs);
+    return pciehwdev_get(phwdev->childh + vfidx);
+}
+
+static inline void
+pciehwdev_vfdev_put(const pciehwdev_t *phwdev, const int dirty)
+{
+    pciehwdev_put(phwdev, dirty);
+}
+
+/*
+ * roundup_power2 - Round up to next power of 2.
+ */
+static inline u_int64_t
+roundup_power2(u_int64_t n)
+{
+    while (n & (n - 1)) {
+        n = (n | (n - 1)) + 1;
+    }
+    return n;
+}
+
+static inline u_int64_t
+rounddn_power2(u_int64_t n)
+{
+    return roundup_power2(n + 1) >> 1;
+}
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __PCIESVC_IMPL_H__ */
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/pciesvc_system.h b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/pciesvc_system.h
new file mode 100644
index 000000000..a8f29bca5
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/pciesvc_system.h
@@ -0,0 +1,22 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (c) 2021-2022, Pensando Systems Inc.
+ */
+
+#ifndef __PCIESVC_SYSTEM_H__
+#define __PCIESVC_SYSTEM_H__
+
+/*
+ * Some build environments bring a customized version of these
+ * "system" functions (e.g. Linux kernel).  If building for
+ * one of these environments build with -DPCIESVC_SYSTEM_EXTERN
+ * and provide a matching "pciesvc_system_extern.h",
+ * otherwise we pick up the local "system" functions.
+ */
+#ifdef PCIESVC_SYSTEM_EXTERN
+#include "pciesvc_system_extern.h"
+#else
+#include "pciesvc_system_local.h"
+#endif
+
+#endif /* __PCIESVC_SYSTEM_H__ */
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/pciesvc_system_local.h b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/pciesvc_system_local.h
new file mode 100644
index 000000000..a19177264
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/pciesvc_system_local.h
@@ -0,0 +1,158 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (c) 2021-2022, Pensando Systems Inc.
+ */
+
+#ifndef __PCIESVC_SYSTEM_LOCAL_H__
+#define __PCIESVC_SYSTEM_LOCAL_H__
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <stdarg.h>
+#include <stddef.h>
+#include <unistd.h>
+#define __USE_GNU
+#include <string.h>
+#include <inttypes.h>
+#include <assert.h>
+#include <endian.h>
+#include <sys/param.h>
+#include <linux/pci_regs.h>
+
+#include "platform/pal/include/pal.h"
+#include "platform/pciemgr/include/pciemgr.h"
+#include "platform/pciesvc/include/pciesvc.h"
+
+#define pciesvc_shmem_get       pciehw_get_shmem
+#define pciesvc_hwmem_get       pciehw_get_hwmem
+#define pciesvc_vtop            pal_mem_vtop
+#define pciesvc_reg_rd32        pal_reg_rd32
+#define pciesvc_reg_wr32        pal_reg_wr32
+#define pciesvc_pciepreg_rd32   pal_pciepreg_rd32
+#define pciesvc_pciepreg_wr32   pal_pciepreg_wr32
+#define pciesvc_mem_barrier     PAL_barrier
+#define pciesvc_memset          memset
+#define pciesvc_memcpy          memcpy
+#define pciesvc_memcpy_toio     memcpy
+#define pciesvc_assert          assert
+#define pciesvc_usleep          usleep
+#define pciesvc_ffs             ffs
+#define pciesvc_ffsll           ffsll
+#define pciesvc_snprintf        snprintf
+#define pciesvc_vsnprintf       vsnprintf
+
+#define pciesvc_htobe32         htobe32
+#define pciesvc_be32toh         be32toh
+#define pciesvc_htobe16         htobe16
+#define pciesvc_be16toh         be16toh
+#define pciesvc_htole32         htole32
+#define pciesvc_le32toh         le32toh
+
+#define pciesvc_loglocal        pciesys_loginfo
+
+#define pciesvc_logdebug(args...) do { \
+    if (PCIESVC_LOGPRI_DEBUG >= pciesvc_log_level) { \
+        pciesys_logdebug(args); \
+    } } while(0)
+
+#define pciesvc_loginfo(args...) do { \
+    if (PCIESVC_LOGPRI_INFO >= pciesvc_log_level) { \
+        pciesys_loginfo(args); \
+    } } while(0)
+
+#define pciesvc_logwarn(args...) do { \
+    if (PCIESVC_LOGPRI_WARN >= pciesvc_log_level) { \
+        pciesys_logwarn(args); \
+    } } while(0)
+
+#define pciesvc_logerror(args...) do { \
+    if (PCIESVC_LOGPRI_ERROR >= pciesvc_log_level) { \
+        pciesys_logerror(args); \
+    } } while(0)
+
+typedef union {
+    u_int32_t l;
+    u_int16_t h[2];
+    u_int8_t  b[4];
+} iodata_t;
+
+static inline int
+pciesvc_mem_rd(const uint64_t pa, void *buf, const size_t sz)
+{
+    uint64_t pa_aligned;
+    uint8_t idx;
+    iodata_t v;
+
+    switch (sz) {
+    case 1:
+        pa_aligned = pa & ~0x3;
+        idx = pa & 0x3;
+        v.l = pal_reg_rd32(pa_aligned);
+        *(uint8_t *)buf = v.b[idx];
+        break;
+    case 2:
+        pa_aligned = pa & ~0x3;
+        idx = (pa & 0x3) >> 1;
+        v.l = pal_reg_rd32(pa_aligned);
+        *(uint16_t *)buf = v.h[idx];
+        break;
+    case 4:
+    case 8:
+        pal_reg_rd32w(pa, (uint32_t *)buf, sz >> 2);
+        break;
+    default:
+        return -1;
+    }
+    return 0;
+}
+
+static inline void
+pciesvc_mem_wr(const uint64_t pa, const void *buf, const size_t sz)
+{
+    uint64_t pa_aligned;
+    uint8_t idx;
+    iodata_t v;
+
+    switch (sz) {
+    case 1:
+        pa_aligned = pa & ~0x3;
+        idx = pa & 0x3;
+        v.l = pal_reg_rd32(pa_aligned);
+        v.b[idx] = *(uint8_t *)buf;
+        pal_reg_wr32(pa_aligned, v.l);
+        break;
+    case 2:
+        pa_aligned = pa & ~0x3;
+        idx = (pa & 0x3) >> 1;
+        v.l = pal_reg_rd32(pa_aligned);
+        v.h[idx] = *(uint16_t *)buf;
+        pal_reg_wr32(pa_aligned, v.l);
+        break;
+    case 4:
+    case 8:
+        pal_reg_wr32w(pa, (uint32_t *)buf, sz >> 2);
+        break;
+    default:
+        break;
+    }
+}
+
+static inline int
+pciesvc_event_handler(const void *evdata, const size_t evsize)
+{
+    pciehdev_event(evdata);
+    return 0;
+}
+
+static inline void
+pciesvc_debug_cmd(uint32_t *valp)
+{
+    uint32_t delayus = *valp;
+
+    if (delayus) {
+        pciesvc_logdebug("cfgrd delay %uus\n", delayus);
+        pciesvc_usleep(delayus);
+    }
+}
+
+#endif /* __PCIESVC_SYSTEM_LOCAL_H__ */
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/pcietlp.c b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/pcietlp.c
new file mode 100644
index 000000000..1c931644a
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/pcietlp.c
@@ -0,0 +1,789 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2018,2021-2022, Pensando Systems Inc.
+ */
+
+#include "pciesvc_impl.h"
+#include "pcietlp.h"
+#include "bdf.h"
+
+typedef struct pcietlp_info_s {
+    unsigned int error:1;
+    char error_str[80];
+} pcietlp_info_t;
+
+static pcietlp_info_t pcietlp_info;
+
+static inline int
+bitcount(u_int32_t n)
+{
+    int count = 0;
+
+    while (n) {
+	count++;
+        n &= ~(-n); /* clear low order 1 bit */
+    }
+    return count;
+}
+
+static int pcietlp_set_error(const char *fmt, ...)
+    __attribute__((format (printf, 1, 2)));
+static int pcietlp_set_error(const char *fmt, ...)
+{
+    pcietlp_info_t *pi = &pcietlp_info;
+
+    if (pi->error == 0) {
+        va_list ap;
+
+        va_start(ap, fmt);
+        pciesvc_vsnprintf(pi->error_str, sizeof(pi->error_str), fmt, ap);
+        va_end(ap);
+        pi->error = 1;
+    }
+    return -1;
+}
+
+static void
+pcietlp_clr_error(void)
+{
+    pcietlp_info_t *pi = &pcietlp_info;
+    pi->error_str[0] = '\0';
+    pi->error = 0;
+}
+
+static int
+pcietlp_is_error(void)
+{
+    pcietlp_info_t *pi = &pcietlp_info;
+    return pi->error;
+}
+
+char *
+pcietlp_get_error(void)
+{
+    pcietlp_info_t *pi = &pcietlp_info;
+    return pi->error_str;
+}
+
+static u_int32_t
+stlp_dw(const pcie_stlp_t *stlp)
+{
+    const u_int64_t dw_start = stlp->addr >> 2;
+    const u_int64_t dw_end   = (stlp->addr + stlp->size + 3) >> 2;
+
+    return dw_end - dw_start;
+}
+
+static u_int32_t
+stlp_fbe(const pcie_stlp_t *stlp)
+{
+    static const u_int8_t betab[4] = { 0xf, 0xe, 0xc, 0x8 };
+
+    if (stlp_dw(stlp) <= 1) {
+        u_int8_t fbe = (1 << stlp->size) - 1;
+        return fbe << (stlp->addr & 0x3);
+    }
+    return betab[stlp->addr & 0x3];
+}
+
+static u_int32_t
+stlp_lbe(const pcie_stlp_t *stlp)
+{
+    static const u_int8_t betab[4] = { 0xf, 0x8, 0xc, 0xe };
+
+    /* ndw == 1 all encoded in fbe, no lbe bits */
+    if (stlp_dw(stlp) <= 1) return 0;
+
+    return betab[(stlp->addr + stlp->size) & 0x3];
+}
+
+/******************************************************************/
+
+static void
+encode_addr32(const pcie_stlp_t *stlp, u_int32_t *addrp)
+{
+    addrp[0] = pciesvc_htobe32(stlp->addr & ~0x3); /* DW-align addr */
+}
+
+static void
+decode_addr32(pcie_stlp_t *stlp, const u_int32_t addr)
+{
+    stlp->addr += pciesvc_be32toh(addr);
+}
+
+/******************************************************************/
+
+static void
+encode_addr64(const pcie_stlp_t *stlp, u_int32_t *addrp)
+{
+    addrp[0] = pciesvc_htobe32(stlp->addr >> 32);
+    addrp[1] = pciesvc_htobe32(stlp->addr & ~0x3); /* DW-align addr */
+}
+
+static void
+decode_addr64(pcie_stlp_t *stlp, const u_int32_t *addrp)
+{
+    stlp->addr += ((u_int64_t)pciesvc_be32toh(addrp[0]) << 32) |
+                              pciesvc_be32toh(addrp[1]);
+}
+
+/******************************************************************/
+
+static void
+encode_data32(const pcie_stlp_t *stlp, u_int32_t *datap)
+{
+    u_int32_t v = stlp->data;
+
+    /* shift data over to byte lanes based on addr */
+    v <<= (stlp->addr & 0x3) * 8;
+
+    datap[0] = pciesvc_htole32(v);
+}
+
+static void
+decode_data32(pcie_stlp_t *stlp, const u_int32_t *datap)
+{
+    const u_int32_t v = pciesvc_le32toh(*datap);
+
+    stlp->data = v >> ((stlp->addr & 0x3) * 8);
+
+    /* mask off unused byte lanes */
+    if (stlp->size < 4) {
+        const u_int32_t datamask = (1 << stlp->size * 8) - 1;
+        stlp->data &= datamask;
+    }
+}
+
+/******************************************************************/
+
+static void
+encode_data64(const pcie_stlp_t *stlp, u_int32_t *datap)
+{
+    u_int64_t v = stlp->data;
+
+    /* shift data over to byte lanes based on addr */
+    v <<= (stlp->addr & 0x3) * 8;
+
+    datap[0] = pciesvc_htole32(v);
+    datap[1] = pciesvc_htole32(v >> 32);
+}
+
+static void
+decode_data64(pcie_stlp_t *stlp, const u_int32_t *datap)
+{
+    const u_int64_t v = (pciesvc_le32toh(datap[0]) |
+                         (u_int64_t)pciesvc_le32toh(datap[1]) << 32);
+
+    stlp->data = v >> ((stlp->addr & 0x3) * 8);
+
+    /* mask off unused byte lanes */
+    if (stlp->size < 8) {
+        const u_int64_t datamask = (1ULL << stlp->size * 8) - 1;
+        stlp->data &= datamask;
+    }
+}
+
+/******************************************************************/
+
+static void
+encode_data(const pcie_stlp_t *stlp, u_int32_t *datap)
+{
+    if (stlp_dw(stlp) <= 1) {
+        encode_data32(stlp, datap);
+    } else {
+        encode_data64(stlp, datap);
+    }
+}
+
+static void
+decode_data(pcie_stlp_t *stlp, const u_int32_t *datap)
+{
+    if (stlp_dw(stlp) <= 1) {
+        decode_data32(stlp, datap);
+    } else {
+        decode_data64(stlp, datap);
+    }
+}
+
+/******************************************************************/
+
+static void
+encode_cmn_hdr(const pcie_stlp_t *stlp, const u_int8_t type, void *rtlp)
+{
+    pcie_tlp_common_hdr_t *hdr = rtlp;
+    u_int16_t ndw = stlp_dw(stlp);
+
+    hdr->type = type;
+
+    if (ndw == 0) {
+        /* 0-length transaction is allowed, ndw=1 and be=0 */
+        ndw = 1;
+    } else if (ndw == 0x400) {
+        /* 0x400 dw encoded as len=0 */
+        ndw = 0;
+    } else if (ndw > 0x400) {
+        /* can't encode > 0x400 */
+        pcietlp_set_error("encode_cmn_hdr: ndw %d > 0x400", ndw);
+        return;
+    }
+    hdr->len_lo = ndw;
+    hdr->len_hi = ndw >> 8;
+    hdr->reqid = pciesvc_htobe16(stlp->reqid);
+    hdr->tag = stlp->tag;
+    hdr->t8 = stlp->tag >> 8;
+    hdr->t9 = stlp->tag >> 9;
+    hdr->fbe = stlp_fbe(stlp);
+    hdr->lbe = stlp_lbe(stlp);
+}
+
+static void
+decode_cmn_hdr(pcie_stlp_t *stlp, const void *rtlp)
+{
+    const pcie_tlp_common_hdr_t *hdr = rtlp;
+    const u_int8_t be_dw = (hdr->fbe > 0) + (hdr->lbe > 0);
+    const u_int8_t be_bits = bitcount(hdr->fbe) + bitcount(hdr->lbe);
+    const u_int8_t ffbe = pciesvc_ffs(hdr->fbe);
+    u_int16_t ndw = (hdr->len_hi << 8) | hdr->len_lo;
+
+    /* ndw=0 indicates max 0x400 */
+    if (ndw == 0) ndw = 0x400;
+
+    /* Compute size.  Start with ndw, then adjust for the Byte Enable bits. */
+    if (ndw == 1 && !be_bits) {
+        stlp->size = 0;
+    } else {
+        stlp->size = ((ndw - be_dw) << 2) + be_bits;
+    }
+
+    /* addr start depends on first First Byte Enable bit position.*/
+    stlp->addr = ffbe ? ffbe - 1 : 0;
+
+    stlp->reqid = pciesvc_be16toh(hdr->reqid);
+    stlp->tag = (hdr->t9 << 9) | (hdr->t8 << 8) | hdr->tag;
+}
+
+/******************************************************************/
+
+static void
+encode_cfg_hdr(const pcie_stlp_t *stlp, const u_int8_t type, void *rtlp)
+{
+    pcie_tlp_cfg_t *cfg = rtlp;
+
+    encode_cmn_hdr(stlp, type, cfg);
+    cfg->bdf = pciesvc_htobe16(stlp->bdf);
+    cfg->reg = stlp->addr & ~0x3;       /* DW-aligned reg */
+    cfg->extreg = stlp->addr >> 8;
+}
+
+static void
+decode_cfg_hdr(pcie_stlp_t *stlp, const void *rtlp)
+{
+    const pcie_tlp_cfg_t *cfg = rtlp;
+
+    decode_cmn_hdr(stlp, cfg);
+    stlp->bdf = pciesvc_be16toh(cfg->bdf);
+    stlp->addr += (cfg->extreg << 8) | cfg->reg;
+}
+
+/******************************************************************/
+
+static void
+encode_mem32_hdr(const pcie_stlp_t *stlp, const u_int8_t type, void *rtlp)
+{
+    pcie_tlp_mem32_t *mem = rtlp;
+
+    encode_cmn_hdr(stlp, type, mem);
+    encode_addr32(stlp, &mem->addr);
+}
+
+static void
+decode_mem32_hdr(pcie_stlp_t *stlp, const void *rtlp)
+{
+    const pcie_tlp_mem32_t *mem = rtlp;
+
+    decode_cmn_hdr(stlp, mem);
+    decode_addr32(stlp, mem->addr);
+}
+
+/******************************************************************/
+
+static void
+encode_mem64_hdr(const pcie_stlp_t *stlp, const u_int8_t type, void *rtlp)
+{
+    pcie_tlp_mem64_t *mem = rtlp;
+
+    encode_cmn_hdr(stlp, type, mem);
+    encode_addr64(stlp, &mem->addr_hi);
+}
+
+static void
+decode_mem64_hdr(pcie_stlp_t *stlp, const void *rtlp)
+{
+    const pcie_tlp_mem64_t *mem = rtlp;
+
+    decode_cmn_hdr(stlp, mem);
+    decode_addr64(stlp, &mem->addr_hi);
+}
+
+/******************************************************************
+ * CFG
+ */
+
+static int
+encode_cfgrd(const pcie_stlp_t *stlp, void *rtlp, const size_t rtlpsz)
+{
+    const int tlpsz = 12;
+
+    if (rtlpsz < tlpsz) {
+        return pcietlp_set_error("cfgrd: rtlpsz want %d got %ld",
+                                 tlpsz, rtlpsz);
+    }
+    if (stlp->size > 4) {
+        return pcietlp_set_error("cfgrd: size %d > 4", stlp->size);
+    }
+
+    encode_cfg_hdr(stlp, PCIE_TLP_TYPE_CFGRD0, rtlp);
+    return tlpsz;
+}
+
+static int
+decode_cfgrd(pcie_stlp_t *stlp, const void *rtlp, const size_t rtlpsz)
+{
+    const int tlpsz = 12;
+
+    if (rtlpsz < tlpsz) {
+        return pcietlp_set_error("cfgrd: rtlpsz want %d got %ld",
+                                 tlpsz, rtlpsz);
+    }
+
+    decode_cfg_hdr(stlp, rtlp);
+    return tlpsz;
+}
+
+/******************************************************************/
+
+static int
+encode_cfgwr(const pcie_stlp_t *stlp, void *rtlp, const size_t rtlpsz)
+{
+    const int tlpsz = 16;
+
+    if (rtlpsz < tlpsz) {
+        return pcietlp_set_error("cfgwr: rtlpsz want %d got %ld",
+                                 tlpsz, rtlpsz);
+    }
+
+    encode_cfg_hdr(stlp, PCIE_TLP_TYPE_CFGWR0, rtlp);
+    encode_data32(stlp, rtlp + 12);
+    return tlpsz;
+}
+
+static int
+decode_cfgwr(pcie_stlp_t *stlp, const void *rtlp, const size_t rtlpsz)
+{
+    const int tlpsz = 16;
+
+    if (rtlpsz < tlpsz) {
+        return pcietlp_set_error("cfgwr: rtlpsz want %d got %ld",
+                                 tlpsz, rtlpsz);
+    }
+
+    decode_cfg_hdr(stlp, rtlp);
+    decode_data32(stlp, rtlp + 12);
+    return tlpsz;
+}
+
+/******************************************************************
+ * MEM
+ */
+
+static int
+encode_memrd(const pcie_stlp_t *stlp, void *rtlp, const size_t rtlpsz)
+{
+    const int tlpsz = 12;
+
+    if (rtlpsz < tlpsz) {
+        return pcietlp_set_error("memrd: rtlpsz want %d got %ld",
+                                 tlpsz, rtlpsz);
+    }
+
+    encode_mem32_hdr(stlp, PCIE_TLP_TYPE_MEMRD, rtlp);
+    encode_data(stlp, rtlp + 12);
+    return tlpsz;
+}
+
+static int
+decode_memrd(pcie_stlp_t *stlp, const void *rtlp, const size_t rtlpsz)
+{
+    const int tlpsz = 12;
+
+    if (rtlpsz < tlpsz) {
+        return pcietlp_set_error("memrd: rtlpsz want %d got %ld",
+                                 tlpsz, rtlpsz);
+    }
+
+    decode_mem32_hdr(stlp, rtlp);
+    return tlpsz;
+}
+
+/******************************************************************/
+
+static int
+encode_memwr(const pcie_stlp_t *stlp, void *rtlp, const size_t rtlpsz)
+{
+    const int tlpsz = 12 + stlp_dw(stlp) * 4;
+
+    if (rtlpsz < tlpsz) {
+        return pcietlp_set_error("memwr: rtlpsz want %d got %ld",
+                                 tlpsz, rtlpsz);
+    }
+    if (stlp->size > 8) {
+        /* stlp data is only 8 bytes */
+        return pcietlp_set_error("memwr: size %d > 8", stlp->size);
+    }
+
+    encode_mem32_hdr(stlp, PCIE_TLP_TYPE_MEMWR, rtlp);
+    encode_data(stlp, rtlp + 12);
+    return tlpsz;
+}
+
+static int
+decode_memwr(pcie_stlp_t *stlp, const void *rtlp, const size_t rtlpsz)
+{
+    const int tlpsz = 12;
+
+    if (rtlpsz < tlpsz) {
+        return pcietlp_set_error("memwr: rtlpsz want %d got %ld",
+                                 tlpsz, rtlpsz);
+    }
+
+    decode_mem32_hdr(stlp, rtlp);
+
+    if (rtlpsz < tlpsz + stlp->size) {
+        return pcietlp_set_error("memwr: rtlpsz want %d got %ld",
+                                 tlpsz + stlp->size, rtlpsz);
+    }
+
+    decode_data(stlp, rtlp + 12);
+    return tlpsz + stlp->size;
+}
+
+/******************************************************************
+ * MEM 64
+ */
+
+static int
+encode_memrd64(const pcie_stlp_t *stlp, void *rtlp, const size_t rtlpsz)
+{
+    const int tlpsz = 16;
+
+    if (rtlpsz < tlpsz) {
+        return pcietlp_set_error("memrd64: rtlpsz want %d got %ld",
+                                 tlpsz, rtlpsz);
+    }
+
+    encode_mem64_hdr(stlp, PCIE_TLP_TYPE_MEMRD64, rtlp);
+    return tlpsz;
+}
+
+static int
+decode_memrd64(pcie_stlp_t *stlp, const void *rtlp, const size_t rtlpsz)
+{
+    const int tlpsz = 16;
+
+    if (rtlpsz < tlpsz) {
+        return pcietlp_set_error("memrd64: rtlpsz want %d got %ld",
+                                 tlpsz, rtlpsz);
+    }
+
+    decode_mem64_hdr(stlp, rtlp);
+    return tlpsz;
+}
+
+/******************************************************************/
+
+static int
+encode_memwr64(const pcie_stlp_t *stlp, void *rtlp, const size_t rtlpsz)
+{
+    const int tlpsz = 16 + stlp_dw(stlp) * 4;
+
+    if (rtlpsz < tlpsz) {
+        return pcietlp_set_error("memwr64: rtlpsz want %d got %ld",
+                                 tlpsz, rtlpsz);
+    }
+    if (stlp->size > 8) {
+        /* stlp data is only 8 bytes */
+        return pcietlp_set_error("memwr64: size %d > 8", stlp->size);
+    }
+
+    encode_mem64_hdr(stlp, PCIE_TLP_TYPE_MEMWR64, rtlp);
+    encode_data(stlp, rtlp + 16);
+    return tlpsz;
+}
+
+static int
+decode_memwr64(pcie_stlp_t *stlp, const void *rtlp, const size_t rtlpsz)
+{
+    const int tlpsz = 16;
+
+    if (rtlpsz < tlpsz) {
+        return pcietlp_set_error("memwr64: rtlpsz want %d got %ld",
+                                 tlpsz, rtlpsz);
+    }
+
+    decode_mem64_hdr(stlp, rtlp);
+
+    if (rtlpsz < tlpsz + stlp->size) {
+        return pcietlp_set_error("memwr64: rtlpsz want %d got %ld",
+                                 tlpsz + stlp->size, rtlpsz);
+    }
+
+    decode_data(stlp, rtlp + 16);
+    return tlpsz + stlp->size;
+}
+
+/******************************************************************
+ * IO
+ */
+
+static int
+encode_iord(const pcie_stlp_t *stlp, void *rtlp, const size_t rtlpsz)
+{
+    const int tlpsz = 12;
+
+    if (rtlpsz < tlpsz) {
+        return pcietlp_set_error("iord: rtlpsz want %d got %ld",
+                                 tlpsz, rtlpsz);
+    }
+    if (stlp->size > 4) {
+        return pcietlp_set_error("iord: size %d > 4", stlp->size);
+    }
+
+    encode_mem32_hdr(stlp, PCIE_TLP_TYPE_IORD, rtlp);
+    return tlpsz;
+}
+
+static int
+decode_iord(pcie_stlp_t *stlp, const void *rtlp, const size_t rtlpsz)
+{
+    const int tlpsz = 12;
+
+    if (rtlpsz < tlpsz) {
+        return pcietlp_set_error("iord: rtlpsz want %d got %ld",
+                                 tlpsz, rtlpsz);
+    }
+
+    decode_mem32_hdr(stlp, rtlp);
+    return tlpsz;
+}
+
+/******************************************************************/
+
+static int
+encode_iowr(const pcie_stlp_t *stlp, void *rtlp, const size_t rtlpsz)
+{
+    const int tlpsz = 16;
+
+    if (rtlpsz < tlpsz) {
+        return pcietlp_set_error("iowr: rtlpsz want %d got %ld",
+                                 tlpsz, rtlpsz);
+    }
+    if (stlp->size > 4) {
+        return pcietlp_set_error("iowr: size %d > 4", stlp->size);
+    }
+
+    encode_mem32_hdr(stlp, PCIE_TLP_TYPE_IOWR, rtlp);
+    encode_data(stlp, rtlp + 12);
+    return tlpsz;
+}
+
+static int
+decode_iowr(pcie_stlp_t *stlp, const void *rtlp, const size_t rtlpsz)
+{
+    const int tlpsz = 16;
+
+    if (rtlpsz < tlpsz) {
+        return pcietlp_set_error("iowr: rtlpsz want %d got %ld",
+                                 tlpsz, rtlpsz);
+    }
+
+    decode_mem32_hdr(stlp, rtlp);
+    decode_data(stlp, rtlp + 12);
+    return tlpsz;
+}
+
+/******************************************************************/
+
+int
+pcietlp_encode(const pcie_stlp_t *stlp, void *rtlp, const size_t rtlpsz)
+{
+    int n;
+
+    pciesvc_memset(rtlp, 0, rtlpsz);
+    pcietlp_clr_error();
+    switch (stlp->type) {
+    case PCIE_STLP_CFGRD:
+        n = encode_cfgrd(stlp, rtlp, rtlpsz);
+        break;
+    case PCIE_STLP_CFGWR:
+        n = encode_cfgwr(stlp, rtlp, rtlpsz);
+        break;
+    case PCIE_STLP_MEMRD:
+        n = encode_memrd(stlp, rtlp, rtlpsz);
+        break;
+    case PCIE_STLP_MEMWR:
+        n = encode_memwr(stlp, rtlp, rtlpsz);
+        break;
+    case PCIE_STLP_MEMRD64:
+        n = encode_memrd64(stlp, rtlp, rtlpsz);
+        break;
+    case PCIE_STLP_MEMWR64:
+        n = encode_memwr64(stlp, rtlp, rtlpsz);
+        break;
+    case PCIE_STLP_IORD:
+        n = encode_iord(stlp, rtlp, rtlpsz);
+        break;
+    case PCIE_STLP_IOWR:
+        n = encode_iowr(stlp, rtlp, rtlpsz);
+        break;
+    default:
+        pcietlp_set_error("encode: unhandled type 0x%x", stlp->type);
+        n = -1;
+        break;
+    }
+    return pcietlp_is_error() ? -1 : n;
+}
+
+int
+pcietlp_decode(pcie_stlp_t *stlp, const void *rtlp, const size_t rtlpsz)
+{
+    const pcie_tlp_common_hdr_t *hdr = rtlp;
+    int n;
+
+    pcietlp_clr_error();
+    switch (hdr->type) {
+    case PCIE_TLP_TYPE_MEMRD:
+        stlp->type = PCIE_STLP_MEMRD;
+        n = decode_memrd(stlp, rtlp, rtlpsz);
+        break;
+    case PCIE_TLP_TYPE_MEMRD64:
+        stlp->type = PCIE_STLP_MEMRD64;
+        n = decode_memrd64(stlp, rtlp, rtlpsz);
+        break;
+    case PCIE_TLP_TYPE_MEMWR:
+        stlp->type = PCIE_STLP_MEMWR;
+        n = decode_memwr(stlp, rtlp, rtlpsz);
+        break;
+    case PCIE_TLP_TYPE_MEMWR64:
+        stlp->type = PCIE_STLP_MEMWR64;
+        n = decode_memwr64(stlp, rtlp, rtlpsz);
+        break;
+    case PCIE_TLP_TYPE_IORD:
+        stlp->type = PCIE_STLP_IORD;
+        n = decode_iord(stlp, rtlp, rtlpsz);
+        break;
+    case PCIE_TLP_TYPE_IOWR:
+        stlp->type = PCIE_STLP_IOWR;
+        n = decode_iowr(stlp, rtlp, rtlpsz);
+        break;
+    case PCIE_TLP_TYPE_CFGRD0:
+        stlp->type = PCIE_STLP_CFGRD;
+        n = decode_cfgrd(stlp, rtlp, rtlpsz);
+        break;
+    case PCIE_TLP_TYPE_CFGWR0:
+        stlp->type = PCIE_STLP_CFGWR;
+        n = decode_cfgwr(stlp, rtlp, rtlpsz);
+        break;
+    case PCIE_TLP_TYPE_CFGRD1:
+        stlp->type = PCIE_STLP_CFGRD1;
+        n = decode_cfgrd(stlp, rtlp, rtlpsz);
+        break;
+    case PCIE_TLP_TYPE_CFGWR1:
+        stlp->type = PCIE_STLP_CFGWR1;
+        n = decode_cfgwr(stlp, rtlp, rtlpsz);
+        break;
+    default:
+        pcietlp_set_error("decode: unhandled type 0x%x\n", hdr->type);
+        n = -1;
+        break;
+    }
+    return pcietlp_is_error() ? -1 : n;
+}
+
+/******************************************************************/
+
+char *
+pcietlp_buf(const pcie_stlp_t *stlp, void *buf, const size_t bufsz)
+{
+    switch (stlp->type) {
+    case PCIE_STLP_CFGRD:
+        pciesvc_snprintf(buf, bufsz,
+                 "CFGRD %s 0x%08"PRIx64" size %d tag %d",
+                 bdf_to_str(stlp->bdf), stlp->addr, stlp->size, stlp->tag);
+        break;
+    case PCIE_STLP_CFGWR:
+        pciesvc_snprintf(buf, bufsz,
+                 "CFGWR %s 0x%08"PRIx64" size %d tag %d 0x%0*"PRIx64"",
+                 bdf_to_str(stlp->bdf), stlp->addr, stlp->size, stlp->tag,
+                 stlp->size * 2, stlp->data);
+        break;
+    case PCIE_STLP_CFGRD1:
+        pciesvc_snprintf(buf, bufsz,
+                 "CFGRD1 %s 0x%08"PRIx64" size %d tag %d",
+                 bdf_to_str(stlp->bdf), stlp->addr, stlp->size, stlp->tag);
+        break;
+    case PCIE_STLP_CFGWR1:
+        pciesvc_snprintf(buf, bufsz,
+                 "CFGWR1 %s 0x%08"PRIx64" size %d tag %d 0x%0*"PRIx64"",
+                 bdf_to_str(stlp->bdf), stlp->addr, stlp->size, stlp->tag,
+                 stlp->size * 2, stlp->data);
+        break;
+    case PCIE_STLP_MEMRD:
+        pciesvc_snprintf(buf, bufsz,
+                 "MEMRD 0x%08"PRIx64" size %d tag %d",
+                 stlp->addr, stlp->size, stlp->tag);
+        break;
+    case PCIE_STLP_MEMWR:
+        pciesvc_snprintf(buf, bufsz,
+                 "MEMWR 0x%08"PRIx64" size %d tag %d 0x%0*"PRIx64"",
+                 stlp->addr, stlp->size, stlp->tag,
+                 stlp->size * 2, stlp->data);
+        break;
+    case PCIE_STLP_MEMRD64:
+        pciesvc_snprintf(buf, bufsz,
+                 "MEMRD64 0x%08"PRIx64" size %d tag %d",
+                 stlp->addr, stlp->size, stlp->tag);
+        break;
+    case PCIE_STLP_MEMWR64:
+        pciesvc_snprintf(buf, bufsz,
+                 "MEMWR64 0x%08"PRIx64" size %d tag %d 0x%0*"PRIx64"",
+                 stlp->addr, stlp->size, stlp->tag,
+                 stlp->size * 2, stlp->data);
+        break;
+    case PCIE_STLP_IORD:
+        pciesvc_snprintf(buf, bufsz,
+                 "IORD 0x%08"PRIx64" size %d tag %d",
+                 stlp->addr, stlp->size, stlp->tag);
+        break;
+    case PCIE_STLP_IOWR:
+        pciesvc_snprintf(buf, bufsz,
+                 "IOWR 0x%08"PRIx64" size %d tag %d 0x%0*"PRIx64"",
+                 stlp->addr, stlp->size, stlp->tag,
+                 stlp->size * 2, stlp->data);
+        break;
+    case PCIE_STLP_MALFORMED:
+        pciesvc_snprintf(buf, bufsz, "MALFORMED");
+        break;
+    default:
+        pciesvc_snprintf(buf, bufsz, "UNKNOWN type %d", stlp->type);
+        break;
+    }
+    return buf;
+}
+
+char *
+pcietlp_str(const pcie_stlp_t *stlp)
+{
+    static char buf[80];
+
+    return pcietlp_buf(stlp, buf, sizeof(buf));
+}
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/pmt.c b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/pmt.c
new file mode 100644
index 000000000..8eebb4c78
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/pmt.c
@@ -0,0 +1,947 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2017-2018,2021-2022, Pensando Systems Inc.
+ */
+
+#include "pciesvc_impl.h"
+#include "bdf.h"
+#include "prt.h"
+#include "pmt.h"
+
+#define PMT_BASE        PXB_(DHS_TGT_PMT)
+#define PMT_STRIDE      \
+    (ASIC_(PXB_CSR_DHS_TGT_PMT_ENTRY_ARRAY_ELEMENT_SIZE) * 4 * 8)
+#define PMT_GRST        PXB_(CFG_TGT_PMT_GRST)
+#define PMR_BASE        PXB_(DHS_TGT_PMR)
+#define PMR_STRIDE      ASIC_(PXB_CSR_DHS_TGT_PMR_ENTRY_BYTE_SIZE)
+
+static int
+pmt_count(void)
+{
+    return PMT_COUNT;
+}
+
+static void
+assert_pmti_in_range(const int pmti)
+{
+    pciesvc_assert(pmti >= 0 && pmti < pmt_count());
+}
+
+static void
+assert_pmts_in_range(const int pmtb, const int pmtc)
+{
+    if (pmtc > 0) {
+        assert_pmti_in_range(pmtb);
+        assert_pmti_in_range(pmtb + pmtc - 1);
+    }
+}
+
+static u_int64_t
+pmt_addr(const int pmti)
+{
+    assert_pmti_in_range(pmti);
+    return PMT_BASE + (pmti * PMT_STRIDE);
+}
+
+static u_int64_t
+pmr_addr(const int pmti)
+{
+    assert_pmti_in_range(pmti);
+    return PMR_BASE + (pmti * PMR_STRIDE);
+}
+
+static int
+pmt_alloc_high(const int n)
+{
+    pciehw_shmem_t *pshmem = pciesvc_shmem_get();
+    pciehw_spmt_t *spmt;
+    int pmti = -1;
+
+    if (n == 1 && pshmem->freepmt_high != PMT_INVALID) {
+        /* alloc a single entry from free list */
+        pmti = pshmem->freepmt_high;
+        spmt = pciesvc_spmt_get(pmti);
+        pshmem->freepmt_high = spmt->next;
+        spmt->next = PMT_INVALID;
+        pciesvc_spmt_put(spmt, DIRTY);
+    } else if (pshmem->allocpmt_high + n <= pshmem->allocpmt_low) {
+        /* alloc multiple entries from sequential block */
+        pmti = pshmem->allocpmt_high;
+        pshmem->allocpmt_high += n;
+    }
+    return pmti;
+}
+
+static int
+pmt_alloc_low(const int n)
+{
+    pciehw_shmem_t *pshmem = pciesvc_shmem_get();
+    pciehw_spmt_t *spmt;
+    int pmti = -1;
+
+    if (n == 1 && pshmem->freepmt_low != PMT_INVALID) {
+        /* alloc a single entry from free list */
+        pmti = pshmem->freepmt_low;
+        spmt = pciesvc_spmt_get(pmti);
+        pshmem->freepmt_low = spmt->next;
+        spmt->next = PMT_INVALID;
+        pciesvc_spmt_put(spmt, DIRTY);
+    } else if (pshmem->allocpmt_low - n >= pshmem->allocpmt_high) {
+        /* alloc multiple entries from sequential block */
+        pshmem->allocpmt_low -= n;
+        pmti = pshmem->allocpmt_low;
+    }
+    return pmti;
+}
+
+static int
+pmt_alloc_vf0adj(const int n)
+{
+    pciehw_shmem_t *pshmem = pciesvc_shmem_get();
+    int pmti = -1;
+
+    /* if no reserved vf0adj region alloc from high pri */
+    if (pshmem->allocpmt_vf0adj == -1) {
+        pmti = pmt_alloc_high(n);
+    } else if (pshmem->allocpmt_vf0adj + n <= pmt_count()) {
+        pmti = pshmem->allocpmt_vf0adj;
+        pshmem->allocpmt_vf0adj += n;
+    }
+    return pmti;
+}
+
+/*
+ * pmt_alloc - supports multiple priority regions in the tcam.
+ * We want both PMTPRI_HIGH and PMTPRI_LOW regions to
+ * be able to grow, LOW to support adding flexvfs and
+ * HIGH to support adding overrides.
+ *
+ * Once the base config is configured and all pmts allocated
+ * then only HIGH grows down to allow the max number of overrides.
+ *
+ *     +----------------+ <== 0
+ *     |  PMTPRI_HIGH   | <== pshmem->allocpmt_high
+ *     |  grows down    |
+ *     +----------------+
+ *     |  PMTPRI_LOW    |
+ *     |  grows up      | <== pshmem->allocpmt_low
+ *     +----------------+
+ *     |  PMTPRI_VF0ADJ | <== pshmem->allocpmt_vf0adj
+ *     |  grows down    |
+ *     +----------------+
+ *                        <== pmt_count()
+ *
+ * PMTPRI_HIGH   - config, PF bars, VF flexvf overrides
+ *
+ * PMTPRI_LOW    - VF flexvf base entries in this region
+ *
+ * PMTPRI_VF0ADJ - if we have flexvf then adjust_vf0 entries come
+ *                 from this region.  We want the priority to be lower
+ *                 that LOW so entries are lower than the flexvf base entries.
+ *                 This region grows down to meet the expectations of the
+ *                 user but is low priority so entries can be overridden
+ *                 by flexvf overrides in the HIGH region.
+ */
+int
+pmt_alloc(const int n, const int pri)
+{
+    pciehw_shmem_t *pshmem = pciesvc_shmem_get();
+    int pmti = -1;
+
+    pciesvc_assert(n > 0);
+    pciesvc_assert(n <= pmt_count());
+
+    if (!pshmem->pmtpri) {
+        pshmem->allocpmt_low = pmt_count();
+        pshmem->freepmt_high = PMT_INVALID;
+        pshmem->freepmt_low = PMT_INVALID;
+        pshmem->allocpmt_vf0adj = -1;
+        pshmem->freeprt_slab = PRT_INVALID;
+        pshmem->pmtpri = 1;
+    }
+
+    switch (pri) {
+    case PMTPRI_HIGH:
+        pmti = pmt_alloc_high(n);
+        break;
+    case PMTPRI_LOW:
+        pmti = pmt_alloc_low(n);
+        break;
+    case PMTPRI_VF0ADJ:
+        pmti = pmt_alloc_vf0adj(n);
+        break;
+    default:
+        pciesvc_logerror("pmt_alloc: unknown pri %d\n", pri);
+        pciesvc_assert(0);
+        break;
+    }
+
+    return pmti;
+}
+
+/*
+ * Reserve a contiguous range from PMTPRI_LOW to be used for
+ * the vf0adjust range.  PMTPRI_LOW grows up but we want
+ * PMTPRI_VF0ADJ to be lower than LOW priority and grow down.
+ */
+int
+pmt_reserve_vf0adj(const int n)
+{
+    pciehw_shmem_t *pshmem = pciesvc_shmem_get();
+
+    pshmem->allocpmt_vf0adj = pmt_alloc(n, PMTPRI_LOW);
+    return pshmem->allocpmt_vf0adj;
+}
+
+static int
+pmt_to_pri(const int pmti)
+{
+    pciehw_shmem_t *pshmem = pciesvc_shmem_get();
+    int pmtpri = -1;
+
+    if (pmti >= 0 && pmti <= pshmem->allocpmt_high) {
+        pmtpri = PMTPRI_HIGH;
+    } else if (pmti >= pshmem->allocpmt_low && pmti < pmt_count()) {
+        pmtpri = PMTPRI_LOW;
+    }
+    return pmtpri;
+}
+
+static int
+spmt_to_pmti(const pciehw_spmt_t *spmt)
+{
+    pciehw_shmem_t *pshmem = pciesvc_shmem_get();
+    return spmt - pshmem->spmt;
+}
+
+void
+pmt_free(const int pmtb, const int pmtc)
+{
+    pciehw_shmem_t *pshmem = pciesvc_shmem_get();
+    pciehw_spmt_t *spmt;
+    int pmti;
+
+    assert_pmts_in_range(pmtb, pmtc);
+
+    if (pmt_to_pri(pmtb + pmtc) == PMTPRI_HIGH) {
+        /* free high pri */
+        for (pmti = pmtb; pmti < pmtb + pmtc; pmti++) {
+            spmt = pciesvc_spmt_get(pmti);
+            spmt->next = pshmem->freepmt_high;
+            pciesvc_spmt_put(spmt, DIRTY);
+            pshmem->freepmt_high = pmti;
+        }
+    } else if (pmt_to_pri(pmtb) == PMTPRI_LOW) {
+        /* free low pri */
+        for (pmti = pmtb; pmti < pmtb + pmtc; pmti++) {
+            spmt = pciesvc_spmt_get(pmti);
+            spmt->next = pshmem->freepmt_low;
+            pciesvc_spmt_put(spmt, DIRTY);
+            pshmem->freepmt_low = pmti;
+        }
+    } else {
+        /* outside of both alloc ranges? */
+        pciesvc_logerror("pmt_free: leak pmt %d (%d), "
+                         "allocpmt_low %u allocpmt_high %u\n",
+                         pmtb, pmtc,
+                         pshmem->allocpmt_low,
+                         pshmem->allocpmt_high);
+    }
+}
+
+static void
+pmt_get_entry(const int pmti, pmt_entry_t *pmte)
+{
+    pciesvc_reg_rd32w(pmt_addr(pmti), pmte->w, PMT_NWORDS);
+}
+
+static void
+pmt_set_entry(const int pmti, const pmt_entry_t *pmte)
+{
+    pciesvc_reg_wr32w(pmt_addr(pmti), pmte->w, PMT_NWORDS);
+}
+
+static void
+pmr_get_entry(const int pmti, pmr_entry_t *pmre)
+{
+    pciesvc_reg_rd32w(pmr_addr(pmti), pmre->w, PMR_NWORDS);
+}
+
+static void
+pmr_set_entry(const int pmti, const pmr_entry_t *pmre)
+{
+    pciesvc_reg_wr32w(pmr_addr(pmti), pmre->w, PMR_NWORDS);
+}
+
+/*
+ * Retrieve an entry from hardware.
+ */
+void
+pmt_get(const int pmti, pmt_t *pmt)
+{
+    pmt_get_entry(pmti, &pmt->pmte);
+    pmr_get_entry(pmti, &pmt->pmre);
+}
+
+/*
+ * Install an entry in hardware at the specified index.
+ */
+void
+pmt_set(const int pmti, const pmt_t *pmt)
+{
+    /*
+     * Set PMR entry first, then TCAM, so by the time a tcam search
+     * can hit an entry the corresponding ram entry is valid too.
+     */
+    pmr_set_entry(pmti, &pmt->pmre);
+    pmt_set_entry(pmti, &pmt->pmte);
+}
+
+static void
+pmt_clr_tcam(const int pmti)
+{
+    pmt_entry_t pmte0;
+
+    pciesvc_memset(&pmte0, 0, sizeof(pmte0));
+    pmt_set_entry(pmti, &pmte0);
+}
+
+/*
+ * Clear a pmt slot.  For now we just invalidate the tcam entry
+ * so searches don't hit, but we don't write anything to PMR.
+ */
+static void
+pmt_clr(const int pmti)
+{
+    pmt_clr_tcam(pmti);
+}
+
+/*
+ * dm->data is the entry data values
+ * dm->mask is the entry mask bits,
+ *     1's for bits we want to match in "data",
+ *     0's for bits in "data" we want to ignore.
+ *
+ * {X Y} result
+ * -------
+ * {0 0} (always match)
+ * {0 1} match if 0
+ * {1 0} match if 1
+ * {1 1} (never match)
+ */
+void
+pmt_entry_enc(pmt_entry_t *pmte, const pmt_datamask_t *dm)
+{
+    const u_int64_t data = dm->data.all;
+    const u_int64_t mask = dm->mask.all;
+
+    pmte->tcam.x =  data & mask;
+    pmte->tcam.y = ~data & mask;
+    pmte->tcam.v = 1;
+}
+
+/*
+ * Fetch the dm->data/mask values from this pmt_entry.
+ */
+void
+pmt_entry_dec(const pmt_entry_t *pmte, pmt_datamask_t *dm)
+{
+    dm->data.all = pmte->tcam.x;
+    dm->mask.all = pmte->tcam.x ^ pmte->tcam.y;
+}
+
+void
+pmt_bar_set_bdf(pmt_t *pmt, const u_int16_t bdf)
+{
+    pmr_bar_entry_t *pmr = &pmt->pmre.bar;
+    pmr->bdf = bdf;
+}
+
+void
+pmt_bar_setaddr(pmt_t *pmt, const u_int64_t addr)
+{
+    pmt_datamask_t dm;
+
+    pmt_entry_dec(&pmt->pmte, &dm);
+    dm.data.bar.addrdw = addr >> 2;
+    pmt_entry_enc(&pmt->pmte, &dm);
+}
+
+void
+pmt_bar_setaddrm(pmt_t *pmt, const u_int64_t addr, const u_int64_t mask)
+{
+    pmt_datamask_t dm;
+
+    pmt_entry_dec(&pmt->pmte, &dm);
+    dm.data.bar.addrdw = addr >> 2;
+    dm.mask.bar.addrdw = mask >> 2;
+    pmt_entry_enc(&pmt->pmte, &dm);
+}
+
+u_int64_t
+pmt_bar_getaddr(const pmt_t *pmt)
+{
+    pmt_datamask_t dm;
+
+    pmt_entry_dec(&pmt->pmte, &dm);
+    return dm.data.bar.addrdw << 2;
+}
+
+u_int64_t
+pmt_bar_getaddrmask(const pmt_t *pmt)
+{
+    pmt_datamask_t dm;
+
+    pmt_entry_dec(&pmt->pmte, &dm);
+    return dm.mask.bar.addrdw << 2;
+}
+
+void
+pmt_cfg_set_bus(pmt_t *pmt, const u_int8_t bus)
+{
+    pmr_cfg_entry_t *pmr = &pmt->pmre.cfg;
+    pmt_datamask_t dm;
+    u_int8_t obus, busdelta;
+
+#define bdf_replace_bus(bdf, bus) \
+    bdf = ((bus << 8) | ((bdf) & 0x00ff))
+
+    pmt_entry_dec(&pmt->pmte, &dm);
+    /* assume no bus wildcards */
+    pciesvc_assert((dm.mask.cfg.bdf & 0xff00) == 0xff00);
+    obus = bdf_to_bus(dm.data.cfg.bdf);
+    bdf_replace_bus(dm.data.cfg.bdf, bus);
+    pmt_entry_enc(&pmt->pmte, &dm);
+
+    /* replicate the bus delta between start/limit with new bus */
+    busdelta = pmr->bstart - obus;
+    pmr->bstart = bus + busdelta;
+
+    busdelta = pmr->blimit - obus;
+    pmr->blimit = bus + busdelta;
+}
+
+/******************************************************************
+ * apis
+ */
+
+void
+pciehw_pmt_load_cfg(pciehwdev_t *phwdev)
+{
+    if (!phwdev->cfgloaded) {
+        u_int32_t pmti;
+
+        for (pmti = phwdev->pmtb; pmti < phwdev->pmtb + phwdev->pmtc; pmti++) {
+            pciehw_spmt_t *spmt = pciesvc_spmt_get(pmti);
+            int state = CLEAN;
+
+            if (!spmt->loaded) {
+                pmt_set(pmti, &spmt->pmt);
+                spmt->loaded = 1;
+                state = DIRTY; /* loaded */
+            }
+            pciesvc_spmt_put(spmt, state);
+        }
+        phwdev->cfgloaded = 1;
+    }
+}
+
+void
+pciehw_pmt_unload_cfg(pciehwdev_t *phwdev)
+{
+    if (phwdev->cfgloaded) {
+        u_int32_t pmti;
+
+        for (pmti = phwdev->pmtb; pmti < phwdev->pmtb + phwdev->pmtc; pmti++) {
+            pciehw_spmt_t *spmt = pciesvc_spmt_get(pmti);
+            int state = CLEAN;
+
+            if (spmt->loaded) {
+                pmt_clr(pmti);
+                spmt->loaded = 0;
+                state = DIRTY; /* loaded */
+            }
+            pciesvc_spmt_put(spmt, state);
+        }
+        phwdev->cfgloaded = 0;
+    }
+}
+
+static void
+pciehw_bar_foreach_pmt(pciehwbar_t *phwbar,
+                       void (*cb)(int pmti, pciehw_spmt_t *spmt, void *arg),
+                       void *arg)
+{
+    pciehw_spmt_t *spmt;
+    u_int32_t pmti;
+    int next;
+
+    /* process the base pmts */
+    for (pmti = phwbar->pmtb; pmti < phwbar->pmtb + phwbar->pmtc; pmti++) {
+        int chain;
+
+        spmt = pciesvc_spmt_get(pmti);
+        chain = spmt->chain;
+        next = spmt->next;
+
+        cb(pmti, spmt, arg);
+
+        pciesvc_spmt_put(spmt, DIRTY); /* spmt.pmt.pmr.bdf, loaded */
+
+        /* if chained pmts, process them */
+        if (chain) {
+            while (next != PMT_INVALID) {
+                spmt = pciesvc_spmt_get(next);
+
+                cb(next, spmt, arg);
+
+                next = spmt->next;
+                pciesvc_spmt_put(spmt, DIRTY); /* loaded */
+            }
+        }
+    }
+
+    /* if ovrds, process them */
+    if (phwbar->ovrds) {
+        next = phwbar->ovrd;
+        while (next != PMT_INVALID) {
+            spmt = pciesvc_spmt_get(next);
+
+            cb(next, spmt, arg);
+
+            next = spmt->next;
+            pciesvc_spmt_put(spmt, DIRTY); /* loaded */
+        }
+    }
+}
+
+static void
+pmt_load(const int pmti, pciehw_spmt_t *spmt, const u_int16_t bdf)
+{
+    /*
+     * Load PRT first, then load PMT so PMT tcam search hit
+     * will find valid PRT entries.
+     */
+    pciehw_prt_load(spmt->pmt.pmre.bar.prtb, spmt->pmt.pmre.bar.prtc);
+
+    /* vf0 bdf was adjusted already in adjust_vf0 */
+    if (!spmt->vf0) {
+        /* place bus-adjusted bdf in pmt, then load in hw */
+        pmt_bar_set_bdf(&spmt->pmt, bdf);
+    }
+    pmt_set(pmti, &spmt->pmt);
+
+    if (!spmt->loaded) {
+        spmt->loaded = 1;
+    }
+}
+
+static void
+pmt_load_cb(int pmti, pciehw_spmt_t *spmt, void *arg)
+{
+    const u_int16_t bdf = *(u_int16_t *)arg;
+
+    pmt_load(pmti, spmt, bdf);
+}
+
+void
+pciehw_bar_load_pmts(pciehwbar_t *phwbar)
+{
+    u_int16_t bdf = phwbar->bdf;
+
+    if (!phwbar->valid) return;
+    pciehw_bar_foreach_pmt(phwbar, pmt_load_cb, &bdf);
+}
+
+static void
+pmt_unload(const int pmti, pciehw_spmt_t *spmt)
+{
+    /*
+     * Unload PMT first THEN PRT, so PMT tcam search will not hit
+     * and PRT is unreferenced.  Then safe to unload PRT.
+     */
+    if (spmt->loaded) {
+        pmt_clr(pmti);
+        pciehw_prt_unload(spmt->pmt.pmre.bar.prtb,
+                          spmt->pmt.pmre.bar.prtc);
+        spmt->loaded = 0;
+    }
+}
+
+static void
+pmt_unload_cb(int pmti, pciehw_spmt_t *spmt, void *arg)
+{
+    pmt_unload(pmti, spmt);
+}
+
+void
+pciehw_bar_unload_pmts(pciehwbar_t *phwbar)
+{
+    pciesvc_assert(phwbar->valid);
+    pciehw_bar_foreach_pmt(phwbar, pmt_unload_cb, NULL);
+}
+
+void
+pciehw_bar_load_ovrds(pciehwbar_t *phwbar)
+{
+    pciesvc_assert(phwbar->valid);
+    if (phwbar->ovrds) {
+        u_int16_t pmti = phwbar->ovrd;
+        while (pmti != PMT_INVALID) {
+            pciehw_spmt_t *spmt = pciesvc_spmt_get(pmti);
+
+            pmt_load(pmti, spmt, phwbar->bdf);
+
+            pmti = spmt->next;
+            pciesvc_spmt_put(spmt, DIRTY); /* loaded */
+        }
+    }
+}
+
+void
+pciehw_bar_unload_ovrds(pciehwbar_t *phwbar)
+{
+    pciesvc_assert(phwbar->valid);
+    if (phwbar->ovrds) {
+        u_int16_t pmti = phwbar->ovrd;
+        while (pmti != PMT_INVALID) {
+            pciehw_spmt_t *spmt = pciesvc_spmt_get(pmti);
+
+            pmt_unload(pmti, spmt);
+
+            pmti = spmt->next;
+            pciesvc_spmt_put(spmt, DIRTY); /* loaded */
+        }
+    }
+}
+
+static int
+spmt_dup_prts(const pciehw_spmt_t *ospmt, pciehw_spmt_t *nspmt)
+{
+    pciehw_shmem_t *pshmem = pciesvc_shmem_get();
+    pciehw_sprt_t *osprt, *nsprt;
+    pmr_bar_entry_t *pmr;
+    pmt_t *pmt;
+    int prti;
+
+    pmt = &nspmt->pmt;
+    pmr = &pmt->pmre.bar;
+    prti = prt_alloc(pmr->prtc);
+    if (prti < 0) {
+        pciesvc_logerror("spmt_dup: prt_alloc %d failed\n", pmr->prtc);
+        return -1;
+    }
+    osprt = &pshmem->sprt[pmr->prtb];
+    nsprt = &pshmem->sprt[prti];
+    pmr->prtb = prti;
+    for (prti = pmr->prtb; prti < pmr->prtb + pmr->prtc; prti++) {
+        *nsprt = *osprt;
+    }
+    return 0;
+}
+
+static pciehw_spmt_t *
+spmt_get_dup(const pciehw_spmt_t *ospmt)
+{
+    pciehw_spmt_t *nspmt;
+    int pmti;
+
+    pmti = pmt_alloc(1, PMTPRI_VF0ADJ);
+    if (pmti < 0) {
+        pciesvc_logerror("spmt_dup: pmt_alloc failed\n");
+        return NULL;
+    }
+
+    nspmt = pciesvc_spmt_get(pmti);
+    pciesvc_memcpy(nspmt, ospmt, sizeof(*nspmt));
+    nspmt->next = PMT_INVALID;
+
+    if (spmt_dup_prts(ospmt, nspmt) < 0) {
+        pmt_free(pmti, 1);
+        return NULL;
+    }
+
+    return nspmt;
+}
+
+static pciehw_spmt_t *
+spmt_get_next(pciehw_spmt_t *spmt)
+{
+    pciehw_spmt_t *nspmt;
+    int pmti;
+
+    pmti = spmt->next;
+    if (pmti != PMT_INVALID) {
+        return pciesvc_spmt_get(pmti);
+    }
+    nspmt = spmt_get_dup(spmt);
+    if (nspmt) {
+        spmt->next = spmt_to_pmti(nspmt);
+        spmt->chain = 1;
+    }
+    return nspmt;
+}
+
+/*
+ * Stub out any remaining chain pmt entries
+ * by assigning 0 address.
+ */
+static void
+pmt_adjust_nullify_chain(int pmti)
+{
+    const u_int64_t addr = 0ULL;
+    const u_int64_t mask = ~0ULL;
+
+    while (pmti != PMT_INVALID) {
+        pciehw_spmt_t *spmt = pciesvc_spmt_get(pmti);
+        pmt_t *pmt = &spmt->pmt;
+
+        pmt_bar_setaddrm(pmt, addr, mask);
+
+        pmti = spmt->next;
+        pciesvc_spmt_put(spmt, DIRTY); /* pmt.addr/mask */
+    }
+}
+
+static int
+pmt_adjust_prt(pmt_t *pmt, prt_t *prt, const u_int64_t newval)
+{
+    int r = 0;
+
+    switch (prt_type(prt)) {
+    case PRT_TYPE_RES: {
+        prt_res_t *res = &prt->res;
+        res->addrdw = newval >> 2;
+        break;
+    }
+    case PRT_TYPE_DB16:
+    case PRT_TYPE_DB32:
+    case PRT_TYPE_DB64: {
+        prt_db_t *db = &prt->db;
+        db->lif = newval;
+        break;
+    }
+    default:
+        break;
+    }
+    return r;
+}
+
+static int
+pmt_adjust_prts(pmt_t *pmt, const u_int64_t newval)
+{
+    pmr_bar_entry_t *pmr = &pmt->pmre.bar;
+    const int prtend = pmr->prtb + pmr->prtc;
+    int prti, r;
+
+    r = 0;
+    for (prti = pmr->prtb; prti < prtend; prti++) {
+        pciehw_sprt_t *sprt = pciesvc_sprt_get(pmr->prtb);
+        r = pmt_adjust_prt(pmt, &sprt->prt, newval);
+        pciesvc_sprt_put(sprt, DIRTY); /* addrdw/lif */
+        if (r < 0) break;
+    }
+    return r;
+}
+
+/*
+ * We want to add the "numvfs" entries in the pmt.
+ * We want to match the address starting at "addr" and we need to
+ * be careful about bits already set in "addr".  We can put in pmt
+ * tcam "wildcard" masks to match bits in "addr" for contiguous power-of-2
+ * numvfs, but if some bits are set in "addr" we will install a pmt
+ * entry with exact match on the prefix up to that bit so we don't
+ * claim additional address space that is not allocated to this sriov
+ * vf group bar.
+ */
+static int
+pmt_adjust_pmt(const pciehwdev_t *phwdev,
+               pciehw_spmt_t *spmt,
+               const u_int64_t addr,
+               const int vfoffset,
+               const int numvfs,
+               const int do_log)
+{
+    pmt_t *pmt = &spmt->pmt;
+    pmr_bar_entry_t *pmr = &pmt->pmre.bar;
+    const u_int32_t vfstart = pmr->vfstart;
+    u_int32_t numvfs2, numvfs2bitc, numvfs2end;
+    u_int32_t addrvfs, nvfs, vfbitc, nvfend;
+    u_int32_t ovfend, ovflimit, nvflimit;
+    u_int64_t nvfmask, omask, nmask, nprtval;
+    u_int16_t obdf, nbdf;
+    int r;
+
+    /*
+     * Save pmtstart the first time through before any adjustments.
+     * We'll keep try of pmtstart to create the original addr mask
+     * for this entry.  We could arrange this to be set a init time
+     * but we do this here at "runtime" when we start to configure sriov
+     * to handle the case where we upgraded from an older fw that didn't
+     * set "pmtstart" at init time and *then* the OS enables sriov.
+     */
+    if (spmt->pmtstart == 0) {
+        const u_int64_t addrmask = pmt_bar_getaddrmask(pmt);
+        spmt->pmtstart = pciesvc_ffsll(addrmask) - 1;
+    }
+
+    /*
+     * Figure out how many bits for vf index to address "numvfs".
+     * "numvfs2end" contains the upper bit of the vf index mask.
+     */
+    numvfs2 = roundup_power2(numvfs);
+    numvfs2bitc = pciesvc_ffs(numvfs2) - 1;
+    numvfs2end = vfstart + numvfs2bitc;
+    /*
+     * "addrvfs" contains the bits set in "addr" for the vf range.
+     * We want to match on the existing bits in the address to
+     * avoid any wildcard matches claiming other (incorrect) addresses.
+     */
+    addrvfs = (addr & ((1ULL << numvfs2end) - 1)) >> vfstart;
+    /*
+     * "nvfs" is the number of vfs covered by this entry.
+     */
+    nvfs = addrvfs ? 1 << (pciesvc_ffs(addrvfs) - 1) : rounddn_power2(numvfs);
+    /*
+     * Now that we have the real vf count in "nvfs" calculate the
+     * new "nvfmask" that will select the vf index part of the "addr"
+     * for this pmt.
+     */
+    vfbitc = pciesvc_ffs(nvfs) - 1;
+    nvfend = vfstart + vfbitc;
+    nvfmask = ((1ULL << vfbitc) - 1) << vfstart;
+    /*
+     * Compute the "nmask" new address mask for this pmt.
+     * Start with the first bit of the old mask to
+     * match the remaining upper bits of "addr".  Then AND off
+     * the bits in "nvfmask" so the tcam entry will wildcard match
+     * on the vf index field.  "nmask" will become the new pmt
+     * mask used below in pmt_bar_setaddrm().
+     */
+    omask = ~((1ULL << spmt->pmtstart) - 1);
+    nmask = omask & ~nvfmask;
+
+    /* Compute the "nprtval" to be used for this "vfoffset". */
+    nprtval = spmt->vf0base + (vfoffset << spmt->vf0stride);
+    /* "nvflimit" is new vf limit for pmt */
+    nvflimit = nvfs - 1;
+    /* "nbdf" is adjusted completer bdf based on "vfoffset" */
+    obdf = pciehwdev_get_hostbdf(phwdev);
+    nbdf = obdf + vfoffset;
+    /* save these original values for logging below */
+    ovfend = pmr->vfend;
+    ovflimit = pmr->vflimit;
+
+    /* update pmt with adjusted values based on {addr, nvfs} */
+    pmr->vfend = nvfend;
+    pmr->vflimit = nvflimit;
+    pmr->bdf = nbdf;
+    pmt_bar_setaddrm(pmt, addr, nmask);
+
+    r = pmt_adjust_prts(pmt, nprtval);
+    if (do_log) {
+        pciesvc_loginfo("%s: adjust bar %u addr 0x%" PRIx64 " numvfs %d/%d\n",
+                        pciehwdev_get_name(phwdev), spmt->cfgidx, addr,
+                        nvfs, numvfs);
+        pciesvc_loginfo("  addr       0x%016" PRIx64 "\n", addr);
+        pciesvc_loginfo("  omask      0x%016" PRIx64 "\n", omask);
+        pciesvc_loginfo("  nmask      0x%016" PRIx64 "\n", nmask);
+        pciesvc_loginfo("  nvfmask    0x%016" PRIx64 "\n", nvfmask);
+        pciesvc_loginfo("  addrval    0x%016" PRIx64 " (0x%" PRIx64 ")\n",
+                        addr & nvfmask,
+                        (addr & nvfmask) >> vfstart);
+        pciesvc_loginfo("  nvfs %u addrvfs %u\n", nvfs, addrvfs);
+        pciesvc_loginfo("  vfstart %u vfend %u->%u vflimit %u->%u "
+                        "bdf 0x%04x->0x%04x\n",
+                        pmr->vfstart, ovfend, nvfend, ovflimit, nvflimit,
+                        obdf, nbdf);
+        pciesvc_loginfo("  vf0base 0x%" PRIx64
+                        " nprtval 0x%" PRIx64 " r %d\n",
+                        (u_int64_t)spmt->vf0base, nprtval, r);
+    }
+    return nvfs;
+}
+
+/*
+ * We've set up this PMT entry to match *all* the VFs that belong
+ * to this PF, taking advantage of the fact that the VF bars are
+ * "virtual", guaranteed to be configured with a bar address that
+ * is at a constant stride based on bar size.
+ */
+int
+pciehw_pmt_adjust_vf0(pciehw_spmt_t *spmt,
+                      u_int64_t addr,
+                      const int numvfs,
+                      const int do_log)
+{
+    const pciehwdev_t *phwdev = pciehwdev_get(spmt->owner);
+    pmt_t *pmt = &spmt->pmt;
+    pmr_bar_entry_t *pmr = &pmt->pmre.bar;
+    const u_int32_t vfstart = pmr->vfstart;
+    int vfoffset, nvfs_left, r;
+
+    vfoffset = 0;
+    nvfs_left = numvfs;
+    r = numvfs;
+    while (nvfs_left) {
+
+        const int nvfs =
+            pmt_adjust_pmt(phwdev, spmt, addr, vfoffset, nvfs_left, do_log);
+        if (nvfs <= 0) {
+            r = -1;
+            break;
+        }
+
+        nvfs_left -= nvfs;
+        vfoffset += nvfs;
+        addr += nvfs << vfstart;
+
+        /*
+         * We didn't cover all the nvfs with the entry above.
+         * Go fetch the next spmt on the list (or allocate a new
+         * one if necessary) to use for the remainder.
+         */
+        if (nvfs_left) {
+            pciehw_spmt_t *nspmt = spmt_get_next(spmt);
+            if (nspmt == NULL) {
+                r = -1;
+                break;
+            }
+            spmt = nspmt;
+        }
+    }
+
+    /*
+     * Deactivate remaining entries in the list, not needed for this config.
+     * Host might have enabled more/fewer sriov vfs last time so the previous
+     * config might have required more entries than we need to use right now.
+     * We keep the entries chained on the spmt list because they might be
+     * needed again if host enables more sriov vfs again in the future.
+     * Enabling with more/fewer sriov vfs is possible in theory, but uncommon
+     * in practice.  Normal case is max sriov vfs is always enabled and then
+     * keep that config.
+     */
+    pmt_adjust_nullify_chain(spmt->next);
+
+    pciehwdev_put(phwdev, CLEAN);
+    return r;
+}
+
+static void
+pmt_setaddr_cb(int pmti, pciehw_spmt_t *spmt, void *arg)
+{
+    const u_int64_t addr = *(u_int64_t *)arg;
+
+    pmt_bar_setaddr(&spmt->pmt, addr + spmt->baroff);
+
+    /* if loaded, update hw too */
+    if (spmt->loaded) {
+        pmt_set(pmti, &spmt->pmt);
+    }
+}
+
+void
+pciehw_pmt_setaddr(pciehwbar_t *phwbar, u_int64_t addr)
+{
+    pciehw_bar_foreach_pmt(phwbar, pmt_setaddr_cb, &addr);
+}
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/pmt.h b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/pmt.h
new file mode 100644
index 000000000..56d13bc38
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/pmt.h
@@ -0,0 +1,37 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (c) 2017-2018,2021, Pensando Systems Inc.
+ */
+
+#ifndef __PMT_H__
+#define __PMT_H__
+
+struct pmt_s;
+typedef struct pmt_s pmt_t;
+
+void pmt_get(const int pmti, pmt_t *pmt);
+void pmt_set(const int pmti, const pmt_t *pmt);
+
+void pmt_bar_setaddr(pmt_t *pmt, const u_int64_t addr);
+void pmt_bar_setaddrm(pmt_t *pmt, const u_int64_t addr, const u_int64_t mask);
+u_int64_t pmt_bar_getaddr(const pmt_t *pmt);
+
+void pmt_bar_set_bdf(pmt_t *pmt, const u_int16_t bdf);
+void pmt_cfg_set_bus(pmt_t *pmt, const u_int8_t bus);
+
+union pciehwbar_s;
+typedef union pciehwbar_u pciehwbar_t;
+
+void pciehw_pmt_setaddr(pciehwbar_t *phwbar, u_int64_t addr);
+void pciehw_bar_load_pmts(pciehwbar_t *phwbar);
+void pciehw_bar_unload_pmts(pciehwbar_t *phwbar);
+void pciehw_bar_load_ovrds(pciehwbar_t *phwbar);
+void pciehw_bar_unload_ovrds(pciehwbar_t *phwbar);
+void pciehw_pmt_load_cfg(pciehwdev_t *phwdev);
+void pciehw_pmt_unload_cfg(pciehwdev_t *phwdev);
+int pciehw_pmt_adjust_vf0(pciehw_spmt_t *spmt,
+                          const u_int64_t addr,
+                          const int numvfs,
+                          const int do_log);
+
+#endif /* __PMT_H__ */
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/portcfg.c b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/portcfg.c
new file mode 100644
index 000000000..1f1e2ef20
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/portcfg.c
@@ -0,0 +1,110 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2018-2021, Pensando Systems Inc.
+ */
+
+#include "pciesvc_impl.h"
+#include "portcfg.h"
+
+typedef union {
+    u_int32_t d;
+    u_int16_t w[2];
+    u_int8_t  b[4];
+} cfgdata_t;
+
+static u_int64_t
+portcfg_base(const int port)
+{
+    return PXC_(DHS_C_MAC_APB_ENTRY, port);
+}
+
+u_int32_t
+portcfg_readdw(const int port, const u_int16_t addr)
+{
+    u_int32_t v;
+    pciesvc_assert(addr < 4096);
+    pciesvc_pciepreg_rd32(portcfg_base(port) + addr, &v);
+    return v;
+}
+
+void
+portcfg_writedw(const int port, const u_int16_t addr, u_int32_t val)
+{
+    pciesvc_assert(addr < 4096);
+    pciesvc_pciepreg_wr32(portcfg_base(port) + addr, val);
+}
+
+u_int8_t
+portcfg_readb(const int port, const u_int16_t addr)
+{
+    const u_int16_t addrdw = addr & ~0x3;
+    const u_int8_t byteidx = addr & 0x3;
+    cfgdata_t v;
+
+    v.d = portcfg_readdw(port, addrdw);
+    return v.b[byteidx];
+}
+
+u_int16_t
+portcfg_readw(const int port, const u_int16_t addr)
+{
+    const u_int16_t addrdw = addr & ~0x3;
+    const u_int8_t wordidx = (addr & 0x3) >> 1;
+    cfgdata_t v;
+
+    pciesvc_assert((addr & 0x1) == 0);
+    v.d = portcfg_readdw(port, addrdw);
+    return v.w[wordidx];
+}
+
+u_int32_t
+portcfg_readd(const int port, const u_int16_t addr)
+{
+    pciesvc_assert((addr & 0x3) == 0);
+    return portcfg_readdw(port, addr);
+}
+
+void
+portcfg_writeb(const int port, const u_int16_t addr, const u_int8_t val)
+{
+    const u_int16_t addrdw = addr & ~0x3;
+    const u_int8_t byteidx = addr & 0x3;
+    cfgdata_t v;
+
+    v.d = portcfg_readdw(port, addrdw);
+    v.b[byteidx] = val;
+    portcfg_writedw(port, addrdw, v.d);
+}
+
+void
+portcfg_writew(const int port, const u_int16_t addr, const u_int16_t val)
+{
+    const u_int16_t addrdw = addr & ~0x3;
+    const u_int8_t wordidx = (addr & 0x3) >> 1;
+    cfgdata_t v;
+
+    pciesvc_assert((addr & 0x1) == 0);
+    v.d = portcfg_readdw(port, addrdw);
+    v.w[wordidx] = val;
+    portcfg_writedw(port, addrdw, v.d);
+}
+
+void
+portcfg_writed(const int port, const u_int16_t addr, const u_int32_t val)
+{
+    pciesvc_assert((addr & 0x3) == 0);
+    portcfg_writedw(port, addr, val);
+}
+
+void
+portcfg_read_bus(const int port,
+                 u_int8_t *pribus, u_int8_t *secbus, u_int8_t *subbus)
+{
+    cfgdata_t v;
+
+    v.d = portcfg_readdw(port, PCI_PRIMARY_BUS);
+
+    if (pribus) *pribus = v.b[0];
+    if (secbus) *secbus = v.b[1];
+    if (subbus) *subbus = v.b[2];
+}
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/portcfg.h b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/portcfg.h
new file mode 100644
index 000000000..f2242f31d
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/portcfg.h
@@ -0,0 +1,44 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (c) 2018,2021, Pensando Systems Inc.
+ */
+
+#ifndef __PORTCFG_H__
+#define __PORTCFG_H__
+
+#ifdef __cplusplus
+extern "C" {
+#if 0
+} /* close to calm emacs autoindent */
+#endif
+#endif
+
+#define PORTCFG_CAP_PCIE        0x80
+#define PORTCFG_CAP_AER         0x200
+#define PORTCFG_CAP_PHYSLAYER   0x340   /* Gen4 Physical Layer */
+
+/* rename these to avoid static link dups */
+#define portcfg_readb           _pciesvc_portcfg_readb
+#define portcfg_readw           _pciesvc_portcfg_readw
+#define portcfg_readd           _pciesvc_portcfg_readd
+#define portcfg_writeb          _pciesvc_portcfg_writeb
+#define portcfg_writew          _pciesvc_portcfg_writew
+#define portcfg_writed          _pciesvc_portcfg_writed
+#define portcfg_read_bus        _pciesvc_portcfg_read_bus
+
+void portcfg_read_bus(const int port,
+                      u_int8_t *pribus, u_int8_t *secbus, u_int8_t *subbus);
+
+u_int8_t  portcfg_readb(const int port, const u_int16_t addr);
+u_int16_t portcfg_readw(const int port, const u_int16_t addr);
+u_int32_t portcfg_readd(const int port, const u_int16_t addr);
+
+void portcfg_writeb(const int port, const u_int16_t addr, const u_int8_t val);
+void portcfg_writew(const int port, const u_int16_t addr, const u_int16_t val);
+void portcfg_writed(const int port, const u_int16_t addr, const u_int32_t val);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __PORTCFG_H__ */
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/printf.c b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/printf.c
new file mode 100644
index 000000000..c25d04b95
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/printf.c
@@ -0,0 +1,310 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2018, Pensando Systems Inc.
+ */
+
+#include "pciesvc_system.h"
+
+#ifdef PCIESVC_SYSTEM_EXTERN
+struct ostr_s {
+    void (*cb)(int c, void *arg);
+    void *arg;
+};
+
+static inline void
+prf_putc(const struct ostr_s *o, int c)
+{
+    o->cb(c, o->arg);
+}
+
+static void
+prf_emit_u64(const struct ostr_s *o, uint64_t n,
+        int base, int zeroes, int ptr, int neg, int width, int ljust)
+{
+    char buf[32];
+    int i = 0;
+    if (n == 0) {
+        buf[i++] = '0';
+    } else {
+        while (n) {
+            buf[i++] = "0123456789abcdef"[n % base];
+            n /= base;
+        }
+    }
+    if (ljust) {
+        int rpad;
+        if (neg) {
+            prf_putc(o, '-');
+            --width;
+        } else if (ptr) {
+            prf_putc(o, '0');
+            prf_putc(o, 'x');
+            width -= 2;
+        }
+        rpad = width - i;
+        while (i > 0) {
+            prf_putc(o, buf[--i]);
+        }
+        while (rpad-- > 0) {
+            prf_putc(o, ' ');
+        }
+    } else {
+        if (ptr) {
+            width -= 2;
+        } else if (neg) {
+            --width;
+            if (zeroes) {
+               prf_putc(o, '-');
+            }
+        }
+        while (i < width) {
+            prf_putc(o, zeroes ? '0' : ' ');
+            --width;
+        }
+        if (ptr) {
+            prf_putc(o, '0');
+            prf_putc(o, 'x');
+        } else if (neg && !zeroes) {
+            prf_putc(o, '-');
+        }
+        while (i > 0) {
+            prf_putc(o, buf[--i]);
+        }
+    }
+}
+
+#define strlen _strlen
+static size_t
+strlen(const char *s)
+{
+    const char *e;
+    for (e = s; *e; e++) {
+        ;
+    }
+    return (size_t)(e - s);
+}
+
+static void
+prf_emit_str(const struct ostr_s *o, const char *s, int width, int ljust)
+{
+    int c, nspc;
+
+    if (s == NULL) {
+        s = "<null>";
+    }
+    nspc = width - strlen(s);
+    if (width > 0 && !ljust) {
+        while (nspc-- > 0) {
+            prf_putc(o, ' ');
+        }
+    }
+    while ((c = *s++)) {
+        prf_putc(o, c);
+    }
+    if (width > 0 && ljust) {
+        while (nspc-- > 0) {
+            prf_putc(o, ' ');
+        }
+    }
+}
+
+static void
+subr_prf(const struct ostr_s *o, const char *s, va_list ap)
+{
+    int base, done, pop, is_long, zeroes, ptr, neg, sign, width, str, ljust;
+    uint64_t n;
+    char c;
+
+    while ((c = *s++)) {
+        switch (c) {
+        case '%':
+            done = pop = is_long = ptr = neg = sign = zeroes = str = ljust = 0;
+            width = -1;
+            base = 10;
+            do {
+                c = *s++;
+                switch (c) {
+                case '\0':
+                    return;
+                case '-':
+                    ljust = 1;
+                    break;
+                case '0':
+                    if (width < 0) {
+                        zeroes = 1;
+                        break;
+                    }
+                    width = (((width < 0) ? 0 : width) * 10) + c - '0';
+                    break;
+                case '1' ... '9':
+                    width = (((width < 0) ? 0 : width) * 10) + c - '0';
+                    break;
+                case '%':
+                    prf_putc(o, '%');
+                    done = 1;
+                    break;
+                case 'l':
+                    is_long = 1;
+                    break;
+                case 'p':
+                    ptr = 1;
+                    is_long = 1;
+                    base = 16;
+                    pop = 1;
+                    done = 1;
+                    break;
+                case 'x':
+                    base = 16;
+                    pop = 1;
+                    done = 1;
+                    break;
+                case 'd':
+                    sign = 1;
+                    pop = 1;
+                    done = 1;
+                    break;
+                case 'u':
+                    pop = 1;
+                    done = 1;
+                    break;
+                case 's':
+                    pop = 1;
+                    done = 1;
+                    str = 1;
+                    break;
+                case 'c':
+                    prf_putc(o, va_arg(ap, int));
+                    done = 1;
+                    break;
+                default:
+                    prf_putc(o, c);
+                    done = 1;
+                }
+            } while (!done);
+            if (pop) {
+                if (str) {
+                    prf_emit_str(o, va_arg(ap, char *), width, ljust);
+                } else {
+                    n = is_long ? va_arg(ap, uint64_t) : va_arg(ap, uint32_t);
+                    if (sign) {
+                        if (is_long) {
+                            neg = ((int64_t)n < 0);
+                            if (neg) {
+                                n = -n;
+                            }
+                        } else {
+                            neg = ((int32_t)n < 0);
+                            if (neg) {
+                                n = -(int64_t)(int32_t)n;
+                            }
+                        }
+                    }
+                    prf_emit_u64(o, n, base, zeroes, ptr, neg, width, ljust);
+                }
+            }
+            break;
+        default:
+            prf_putc(o, c);
+            break;
+        }
+    }
+}
+
+struct snprintf_ctx {
+    char *pos;
+    size_t remain;
+};
+
+static void
+snprintf_outchar(int c, void *arg)
+{
+    struct snprintf_ctx *ctx = arg;
+    if (ctx->remain) {
+        *ctx->pos++ = c;
+        --ctx->remain;
+    }
+}
+
+int
+pciesvc_vsnprintf(char *buf, size_t len, const char *fmt, va_list ap)
+{
+#ifdef PCIESVC_SYSTEM_EXTERN
+/*
+ * Oracle environment wants runtime init of these structs to
+ * use pc-relative offsets that are within the module and need
+ * no relocation required when running in different environments.
+ */
+#define RUNTIME_INIT
+#endif
+#ifdef RUNTIME_INIT
+    struct snprintf_ctx ctx;
+    struct ostr_s o;
+
+    ctx.pos = buf;
+    ctx.remain = len;
+    o.cb = snprintf_outchar;
+    o.arg = &ctx;
+#else
+    struct snprintf_ctx ctx = {
+        .pos = buf,
+        .remain = len,
+    };
+    struct ostr_s o = {
+        .cb = snprintf_outchar,
+        .arg = &ctx
+    };
+#endif
+
+    subr_prf(&o, fmt, ap);
+    if (ctx.remain) {
+        *ctx.pos = '\0';
+    } else {
+        *(ctx.pos - 1) = '\0';
+    }
+    return len - ctx.remain;
+}
+
+int
+pciesvc_snprintf(char *buf, size_t len, const char *fmt, ...)
+{
+    int r;
+    va_list ap;
+    va_start(ap, fmt);
+    r = pciesvc_vsnprintf(buf, len, fmt, ap);
+    va_end(ap);
+    return r;
+}
+#endif
+
+#ifdef CONFIG_PRINTF
+static void
+printf_outchar(int c, void *arg)
+{
+    putchar(c);
+}
+
+void
+pciesvc_vprintf(const char *fmt, va_list ap)
+{
+#ifdef RUNTIME_INIT
+    const struct ostr_s o;
+    o.cb = printf_outchar;
+    o.arg = NULL;
+#else
+    const struct ostr_s o = {
+        .cb = printf_outchar,
+        .arg = NULL,
+    };
+#endif
+    subr_prf(&o, fmt, ap);
+}
+
+void
+printf(const char *fmt, ...)
+{
+    va_list ap;
+    va_start(ap, fmt);
+    pciesvc_vprintf(fmt, ap);
+    va_end(ap);
+}
+#endif
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/prt.c b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/prt.c
new file mode 100644
index 000000000..811a3e30b
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/prt.c
@@ -0,0 +1,127 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2017-2018,2021-2022, Pensando Systems Inc.
+ */
+
+#include "pciesvc_impl.h"
+#include "prt.h"
+
+#define PRT_BASE        PXB_(DHS_TGT_PRT)
+#define PRT_STRIDE      ASIC_(PXB_CSR_DHS_TGT_PRT_ENTRY_BYTE_SIZE)
+
+/* the only client freeing slabs is overrides */
+#define PRT_SLAB_SIZE   PCIEHDEVICE_OVERRIDE_INTRGROUPS
+
+static int
+prt_count(void)
+{
+    return PRT_COUNT;
+}
+
+static void
+assert_prti_in_range(const int prti)
+{
+    pciesvc_assert(prti >= 0 && prti < prt_count());
+}
+
+static void
+assert_prts_in_range(const int prtb, const int prtc)
+{
+    if (prtc > 0) {
+        assert_prti_in_range(prtb);
+        assert_prti_in_range(prtb + prtc - 1);
+    }
+}
+
+int
+prt_alloc(const int n)
+{
+    pciehw_shmem_t *pshmem = pciesvc_shmem_get();
+    pciehw_sprt_t *sprt;
+    int prti = -1;
+
+    if (n == PRT_SLAB_SIZE && pshmem->freeprt_slab != PRT_INVALID) {
+        /* alloc slab entry from slab list */
+        prti = pshmem->freeprt_slab;
+        sprt = pciesvc_sprt_get(prti);
+        pshmem->freeprt_slab = sprt->next;
+        sprt->next = PRT_INVALID;
+        pciesvc_sprt_put(sprt, DIRTY);
+    } else if (pshmem->allocprt + n < prt_count()) {
+        prti = pshmem->allocprt;
+        pshmem->allocprt += n;
+    }
+    return prti;
+}
+
+void
+prt_free(const int prtb, const int prtc)
+{
+    assert_prts_in_range(prtb, prtc);
+
+    if (prtc == PRT_SLAB_SIZE) {
+        pciehw_shmem_t *pshmem = pciesvc_shmem_get();
+        pciehw_sprt_t *sprt;
+
+        sprt = pciesvc_sprt_get(prtb);
+        sprt->next = pshmem->freeprt_slab;
+        pciesvc_sprt_put(sprt, DIRTY);
+        pshmem->freeprt_slab = prtb;
+    } else {
+        /* XXX */
+    }
+}
+
+static u_int64_t
+prt_addr(const int prti)
+{
+    assert_prti_in_range(prti);
+    return PRT_BASE + (prti * PRT_STRIDE);
+}
+
+void
+prt_get(const int prti, prt_t *prt)
+{
+    pciesvc_reg_rd32w(prt_addr(prti), prt->w, PRT_NWORDS);
+}
+
+void
+prt_set(const int prti, const prt_t *prt)
+{
+    pciesvc_reg_wr32w(prt_addr(prti), prt->w, PRT_NWORDS);
+}
+
+/******************************************************************
+ * apis
+ */
+
+int
+pciehw_prt_load(const int prtbase, const int prtcount)
+{
+    const int prtend = prtbase + prtcount;
+    pciehw_sprt_t *sprt;
+    int prti;
+
+    assert_prts_in_range(prtbase, prtcount);
+
+    for (prti = prtbase; prti < prtend; prti++) {
+        sprt = pciesvc_sprt_get(prti);
+        prt_set(prti, &sprt->prt);
+        pciesvc_sprt_put(sprt, CLEAN);
+    }
+    return 0;
+}
+
+void
+pciehw_prt_unload(const int prtbase, const int prtcount)
+{
+    const int prtend = prtbase + prtcount;
+    const prt_t prt0 = {{ 0 }};
+    int prti;
+
+    assert_prts_in_range(prtbase, prtcount);
+
+    for (prti = prtbase; prti < prtend; prti++) {
+        prt_set(prti, &prt0);
+    }
+}
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/prt.h b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/prt.h
new file mode 100644
index 000000000..62dc1d921
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/prt.h
@@ -0,0 +1,18 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (c) 2017-2018,2021-2022, Pensando Systems Inc.
+ */
+
+#ifndef __PRT_H__
+#define __PRT_H__
+
+union prt_u; typedef union prt_u prt_t;
+int prt_alloc(const int n);
+void prt_free(const int prtbase, const int prtcount);
+void prt_get(const int prti, prt_t *prt);
+void prt_set(const int prti, const prt_t *prt);
+
+int pciehw_prt_load(const int prtbase, const int prtcount);
+void pciehw_prt_unload(const int prtbase, const int prtcount);
+
+#endif /* __PRT_H__ */
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/req_int.c b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/req_int.c
new file mode 100644
index 000000000..d30913090
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/req_int.c
@@ -0,0 +1,95 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2018,2021-2022, Pensando Systems Inc.
+ */
+
+#include "pciesvc_impl.h"
+#include "req_int.h"
+
+#define REQ_INT_NWORDS  3
+
+typedef union req_int_u {
+    struct {
+        u_int64_t data:32;
+        u_int64_t addrdw:34;
+    } __attribute__((packed));
+    u_int32_t w[REQ_INT_NWORDS];
+} req_int_t;
+
+void
+req_int_set(const u_int64_t reg, const u_int64_t addr, const u_int32_t data)
+{
+    req_int_t in = { .data = data, .addrdw = addr >> 2 };
+
+    pciesvc_reg_wr32w(reg, in.w, REQ_INT_NWORDS);
+}
+
+void
+req_int_get(const u_int64_t reg, u_int64_t *addrp, u_int32_t *datap)
+{
+    req_int_t in;
+
+    pciesvc_reg_rd32w(reg, in.w, REQ_INT_NWORDS);
+    *addrp = in.addrdw << 2;
+    *datap = in.data;
+}
+
+/*
+ * The pcie request hardware provides a single base register
+ * CFG_TGT_REQ_*_INT.addrdw to configure indirect/notify interrupts.
+ * Each per-port interrupt is sent to the address
+ * (CFG_TGT_REQ_*_INT.addrdw << 2) + (port * 4).
+ *
+ * If CFG_TGT_REQ_*_INT.data[31] == 0 then a "1" is written to
+ * the destination address.  This is used to trigger an interrupt
+ * through a write to INTR_ASSERT register.
+ * If CFG_TGT_REQ_*_INT.data[31] == 1 then data written is
+ *     data = (data & 0x7fffffff) + port.
+ *
+ * This routine provides the abstraction that we can configure each
+ * port independently.  When the first port is configured we set the
+ * base port0 values for msgaddr0/msgdata0 and configure the hw to match.
+ * Subsequent ports msgaddr/data are validated to be sure they match
+ * what the hw will do.
+ */
+int
+req_int_init(const u_int64_t reg,
+             const int port, u_int64_t msgaddr, u_int32_t msgdata)
+{
+    u_int64_t msgaddr0;
+    u_int32_t msgdata0;
+    int r = 0;
+
+    /*
+     * First time through set msgaddr0/data0 and hw to match.
+     * Doesn't matter which port we configure first,
+     * but subsequent ports must follow the pattern
+     *     msgaddr = msgaddr0 + (port * 4)
+     *     msgdata = msgdata0 + port
+     */
+    req_int_get(reg, &msgaddr0, &msgdata0);
+    if (port == 0 || msgaddr0 == 0) {
+        msgaddr0 = msgaddr - (port * 4);
+        if (MSGDATA_HAS_ADD_PORT(msgdata)) {
+            msgdata0 = (MSGDATA_DATA(msgdata) - port) | MSGDATA_ADD_PORT;
+        } else {
+            msgdata0 = msgdata;
+        }
+        req_int_set(reg, msgaddr0, msgdata0);
+    }
+
+    if (msgaddr != msgaddr0 + (port * 4)) {
+        r = -1;
+    } else if (MSGDATA_HAS_ADD_PORT(msgdata) !=
+               MSGDATA_HAS_ADD_PORT(msgdata0)) {
+        r = -2;
+    } else if (MSGDATA_HAS_ADD_PORT(msgdata) &&
+               MSGDATA_DATA(msgdata) !=
+               MSGDATA_DATA(MSGDATA_DATA(msgdata0) + port)) {
+        r = -3;
+    } else if (!MSGDATA_HAS_ADD_PORT(msgdata) &&
+               MSGDATA_DATA(msgdata) != MSGDATA_DATA(msgdata0)) {
+        r = -4;
+    }
+    return r;
+}
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/req_int.h b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/req_int.h
new file mode 100644
index 000000000..1900ac492
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/req_int.h
@@ -0,0 +1,27 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (c) 2018,2021, Pensando Systems Inc.
+ */
+
+#ifndef __REQ_INT_H__
+#define __REQ_INT_H__
+
+/*
+ * Common interface for tgt_req_notify_int and tgt_req_indirect_int.
+ */
+
+#define MSGDATA_ADD_PORT        0x80000000      /* intr: msgdata += port */
+#define MSGDATA_HAS_ADD_PORT(m) (((m) & MSGDATA_ADD_PORT) != 0)
+#define MSGDATA_DATA(m)         ((m) & ~MSGDATA_ADD_PORT)
+
+void
+req_int_set(const u_int64_t reg, const u_int64_t addr, const u_int32_t data);
+
+void
+req_int_get(const u_int64_t reg, u_int64_t *addrp, u_int32_t *datap);
+
+int
+req_int_init(const u_int64_t reg,
+             const int port, u_int64_t msgaddr, u_int32_t msgdata);
+
+#endif /* __REQ_INT_H__ */
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/reset.c b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/reset.c
new file mode 100644
index 000000000..04fc3e936
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/reset.c
@@ -0,0 +1,157 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2018-2019,2021-2022, Pensando Systems Inc.
+ */
+
+#include "pciesvc_impl.h"
+#include "intrutils.h"
+#include "serial.h"
+#include "reset.h"
+
+static void
+pciehw_reset_lifs_event(pciehwdev_t *phwdev,
+                        const int lifb, const int lifc,
+                        const pciesvc_rsttype_t rsttype)
+{
+    pciesvc_eventdata_t evd;
+    pciesvc_reset_t *reset;
+
+    pciesvc_memset(&evd, 0, sizeof(evd));
+    evd.evtype = PCIESVC_EV_RESET;
+    evd.port = phwdev->port;
+    evd.lif = phwdev->lifb;
+    reset = &evd.reset;
+    reset->rsttype = rsttype;
+    reset->lifb = lifb;
+    reset->lifc = lifc;
+    pciesvc_event_handler(&evd, sizeof(evd));
+}
+
+static void
+pciehw_reset_event(pciehwdev_t *phwdev, const pciesvc_rsttype_t rsttype)
+{
+    /* skip bridges, no lif so no reset event */
+    if (phwdev->lifc) {
+        pciehw_reset_lifs_event(phwdev, phwdev->lifb, phwdev->lifc, rsttype);
+    }
+}
+
+static void
+pciehw_reset_device_intrs(pciehwdev_t *phwdev, const pciesvc_rsttype_t rsttype)
+{
+    const int dmask = phwdev->intrdmask;
+    int i;
+
+    if (phwdev->novrdintr) {
+        for (i = 0; i < phwdev->novrdintr; i++) {
+            const u_int32_t intrb = phwdev->ovrdintr[i].intrb;
+            const u_int32_t intrc = phwdev->ovrdintr[i].intrc;
+
+            intr_reset_pci(intrb, intrc, dmask);
+        }
+    } else {
+        intr_reset_pci(phwdev->intrb, phwdev->intrc, dmask);
+    }
+}
+
+static void
+pciehw_reset_device(pciehwdev_t *phwdev, const pciesvc_rsttype_t rsttype)
+{
+#ifdef PCIEMGR_DEBUG
+    pciesvc_logdebug("%s: dev reset\n", pciehwdev_get_name(phwdev));
+#endif
+
+    if (rsttype != PCIESVC_RSTTYPE_NONE) {
+        pciehw_reset_event(phwdev, rsttype);
+    }
+    pciehw_reset_device_intrs(phwdev, rsttype);
+    pciehw_cfg_reset(phwdev, rsttype);
+
+    switch (phwdev->type) {
+    case PCIEHDEVICE_SERIAL:
+        serial_reset(phwdev, rsttype);
+        break;
+    default:
+        break;
+    }
+}
+
+static void
+pciehw_reset_descendents(pciehwdevh_t hwdevh, const pciesvc_rsttype_t rsttype)
+{
+    while (hwdevh) {
+        pciehwdev_t *phwdev = pciehwdev_get(hwdevh);
+        const int is_pf = phwdev->pf;
+        const pciehwdevh_t childh = phwdev->childh;
+        const pciehwdevh_t peerh = phwdev->peerh;
+
+        pciehw_reset_device(phwdev, rsttype);
+        pciehwdev_put(phwdev, DIRTY);
+
+        /*
+         * If we are a PF then resetting our cfg space will disable and
+         * reset all active VFs so no need to reset them again.  If this
+         * is a bridge with child devices, go reset those children here.
+         */
+        if (!is_pf) {
+            pciehw_reset_descendents(childh, rsttype);
+        }
+
+        hwdevh = peerh;
+    }
+}
+
+/*
+ * A "bus" reset originates on a bridge device with a request
+ * for a secondary bus reset.  We're called with the phwdev of
+ * the bridge, but the bridge doesn't get reset.  We reset all
+ * the descendents of the bridge device.
+ */
+void
+pciehw_reset_bus(pciehwdev_t *phwdev, const u_int8_t bus)
+{
+    pciesvc_loginfo("%s: bus reset 0x%02x\n", pciehwdev_get_name(phwdev), bus);
+    pciehw_reset_descendents(phwdev->childh, PCIESVC_RSTTYPE_BUS);
+}
+
+/*
+ * Function Level Reset (FLR) is issued on a device endpoint to reset
+ * the device.  If issued on a PF then all the VFs get reset too.
+ */
+void
+pciehw_reset_flr(pciehwdev_t *phwdev)
+{
+    pciesvc_loginfo("%s: flr reset\n", pciehwdev_get_name(phwdev));
+    pciehw_reset_device(phwdev, PCIESVC_RSTTYPE_FLR);
+}
+
+/*
+ * A PF controls enabling of VFs.  If some enabled VFs get disabled
+ * by the PF then we want to reset the VFs.
+ *
+ * In order to reduce the number of msgs generated for this reset event
+ * we compress all the VF reset msgs into a single reset msg spanning
+ * all the lifs that were affected.
+ */
+void
+pciehw_reset_vfs(pciehwdev_t *phwdev, const int vfb, const int vfc)
+{
+    pciehwdev_t *vfhwdev;
+    int vfidx, vflifb, vflifc;
+
+    pciesvc_loginfo("%s: vfs reset %d-%d\n",
+                    pciehwdev_get_name(phwdev), vfb, vfb + vfc - 1);
+    vflifb = 0;
+    vflifc = 0;
+    for (vfidx = vfb; vfidx < vfb + vfc; vfidx++) {
+        vfhwdev = pciehwdev_vfdev_get(phwdev, vfidx);
+        if (vfidx == vfb) {
+            /* save these from first reset vf for event */
+            vflifb = vfhwdev->lifb;
+            vflifc = vfhwdev->lifc;
+        }
+        pciehw_reset_device(vfhwdev, PCIESVC_RSTTYPE_NONE);
+        pciehwdev_vfdev_put(vfhwdev, DIRTY);
+    }
+    pciehw_reset_lifs_event(phwdev, vflifb, vflifc * vfc, PCIESVC_RSTTYPE_VF);
+}
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/reset.h b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/reset.h
new file mode 100644
index 000000000..505571ed3
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/reset.h
@@ -0,0 +1,16 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (c) 2018-2019, Pensando Systems Inc.
+ */
+
+#ifndef __RESET_H__
+#define __RESET_H__
+
+union pciehwdev_u;
+typedef union pciehwdev_u pciehwdev_t;
+
+void pciehw_reset_bus(pciehwdev_t *phwdev, const u_int8_t bus);
+void pciehw_reset_flr(pciehwdev_t *phwdev);
+void pciehw_reset_vfs(pciehwdev_t *phwdev, const int vfb, const int vfc);
+
+#endif /* __RESET_H__ */
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/serial.c b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/serial.c
new file mode 100644
index 000000000..981aca813
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/serial.c
@@ -0,0 +1,680 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2022, Pensando Systems Inc.
+ */
+
+#include "pciesvc_impl.h"
+#include "intrutils.h"
+#include "serial_state.h"
+#include "serial.h"
+#include "uart.h"
+
+typedef struct serial {
+    int inited;                 /* state has been initialized */
+    serial_state_t *state;      /* serial state */
+    uart_state_t *uart;         /* uart state */
+    memq_t *txq;                /* txq transfer from device to memq */
+    memq_t *rxq;                /* rxq transfer from memq to device */
+} serial_t;
+
+static void serial_update_msl(serial_t *s);
+
+static int
+memq_putc(volatile memq_t *q, const u_int8_t c)
+{
+    const unsigned int pidx = q->pidx;
+    const unsigned int cidx = q->cidx;
+    const unsigned int newpidx = (pidx + 1) % MEMQ_BUFSZ;
+
+    /* check for full q */
+    if (newpidx == cidx) return 0;
+
+    q->buf[pidx] = c;
+    q->pidx = newpidx;
+    return 1;
+}
+
+static int
+memq_getc(volatile memq_t *q, u_int8_t *cp)
+{
+    /* check for empty q */
+    if (q->cidx == q->pidx) return 0;
+
+    *cp = q->buf[q->cidx];
+    q->cidx = (q->cidx + 1) % MEMQ_BUFSZ;
+    return 1;
+}
+
+static int
+memq_full(volatile memq_t *q)
+{
+    const unsigned int pidx = q->pidx;
+    const unsigned int cidx = q->cidx;
+    const unsigned int newpidx = (pidx + 1) % MEMQ_BUFSZ;
+
+    return newpidx == cidx;
+}
+
+static u_int8_t
+serial_rd_rbr(serial_t *s)
+{
+    u_int8_t c;
+
+    if (memq_getc(s->rxq, &c)) {
+        return c;
+    }
+    return 0;
+}
+
+static int
+serial_wr_thr(serial_t *s, const u_int8_t c)
+{
+    if (!memq_putc(s->txq, c)) {
+        pciesvc_logerror("wr_thr: memq_putc failed\n");
+        return 0;
+    }
+    return 1;
+}
+
+static void
+tx_fifo_reset(serial_t *s)
+{
+    serial_state_t *st = s->state;
+
+    /* seriald detects generation change and resets cidx */
+    st->gen++;
+}
+
+static void
+rx_fifo_reset(serial_t *s)
+{
+    serial_state_t *st = s->state;
+
+    st->rxq.cidx = st->rxq.pidx;
+}
+
+/**
+ * serial_rxq_empty:
+ * @s: serial struct
+ *
+ * Returns: true if the receive queue is empty otherwise false.
+ */
+static int
+serial_rxq_empty(serial_t *s)
+{
+    volatile serial_state_t *st = s->state;
+
+    return st->rxq.cidx == st->rxq.pidx;
+}
+
+/**
+ * uart_reset:
+ * @s: serial struct
+ *
+ * Set uart state to power on default settings
+ */
+static void
+uart_reset(serial_t *s)
+{
+    uart_state_t *uart = s->uart;
+
+    uart->rbr = 0;
+    uart->ier = 0;
+    uart->iir = UART_IIR_NO_INT;
+    uart->lcr = 0;
+    uart->lsr = UART_LSR_TEMT | UART_LSR_THRE;
+    uart->msr = UART_MSR_DCD | UART_MSR_DSR | UART_MSR_CTS;
+    uart->scr = 0;
+    uart->divider = 0x0c;    /* default 9600 baud 8-N-1 */
+    uart->mcr = UART_MCR_RTS | UART_MCR_DTR;
+    uart->thr_ipending = ((uart->iir & UART_IIR_ID) == UART_IIR_THRI);
+    uart->flags = CHR_TIOCM_CAR;
+
+    serial_update_msl(s);
+    uart->msr &= ~UART_MSR_ANY_DELTA;
+}
+
+/**
+ * uart_write_fcr:
+ * @s: serial struct
+ * @val: register value
+ *
+ * Write fifo control register and interrupt identification
+ * register receive byte interrupt threshold.
+ */
+static void
+uart_write_fcr(serial_t *s, uint8_t val)
+{
+    uart_state_t *uart = s->uart;
+
+    uart->fcr = val & 0xc9;
+
+    if (uart->fcr & UART_FCR_FE) {
+        uart->iir |= UART_IIR_FE;
+        /* Set recv_fifo trigger Level */
+        switch (val & 0xc0) {
+        case UART_FCR_ITL_1:
+            uart->recv_fifo_itl = 1;
+            break;
+        case UART_FCR_ITL_2:
+            uart->recv_fifo_itl = 4;
+            break;
+        case UART_FCR_ITL_3:
+            uart->recv_fifo_itl = 8;
+            break;
+        case UART_FCR_ITL_4:
+            uart->recv_fifo_itl = 14;
+            break;
+        }
+    } else {
+        uart->iir &= ~UART_IIR_FE;
+    }
+}
+
+/**
+ * uart_update_parameters:
+ * @s: serial struct
+ *
+ * Set uart settings based on line control register.
+ */
+static void
+uart_update_parameters(serial_t *s)
+{
+    uart_state_t *uart = s->uart;
+    int parity, data_bits, stop_bits;
+
+    /* Start bit */
+    if (uart->lcr & 0x08) {
+        /* Parity bit. */
+        if (uart->lcr & 0x10)
+            parity = 'E';
+        else
+            parity = 'O';
+    } else {
+        parity = 'N';
+    }
+    if (uart->lcr & 0x04) {
+        stop_bits = 2;
+    } else {
+        stop_bits = 1;
+    }
+
+    data_bits = (uart->lcr & 0x03) + 5;
+    uart->parity = parity;
+    uart->data_bits = data_bits;
+    uart->stop_bits = stop_bits;
+}
+
+/**
+ * uart_update_irq:
+ * @s: serial struct
+ *
+ * Emulate interrupt identification register.
+ */
+static void
+uart_update_irq(serial_t *s)
+{
+    uart_state_t *uart = s->uart;
+    volatile serial_state_t *st = s->state;
+    uint8_t tmp_iir = UART_IIR_NO_INT;
+
+    if ((uart->ier & UART_IER_RLSI) && (uart->lsr & UART_LSR_INT_ANY)) {
+        tmp_iir = UART_IIR_RLSI;
+    } else if ((uart->ier & UART_IER_RDI) && (uart->lsr & UART_LSR_DR) &&
+               (!(uart->fcr & UART_FCR_FE) || !serial_rxq_empty(s))) {
+        tmp_iir = UART_IIR_RDI;
+    } else if ((uart->ier & UART_IER_THRI) && uart->thr_ipending) {
+        tmp_iir = UART_IIR_THRI;
+    } else if ((uart->ier & UART_IER_MSI) && (uart->msr & UART_MSR_ANY_DELTA)) {
+        tmp_iir = UART_IIR_MSI;
+    }
+
+    uart->iir = tmp_iir | (uart->iir & 0xf0);
+
+    if (tmp_iir != UART_IIR_NO_INT) {
+        intr_assert(st->intrb);                 /* raise interrupt */
+    } else {
+        intr_deassert(st->intrb);               /* lower interrupt */
+    }
+}
+
+static void
+serial_update_tiocm(serial_t *s)
+{
+    uart_state_t *uart = s->uart;
+
+    /* Clear flags and set to match modem control */
+    uart->flags &= ~(CHR_TIOCM_RTS | CHR_TIOCM_DTR);
+
+    if (uart->mcr & UART_MCR_RTS) {
+        uart->flags |= CHR_TIOCM_RTS;
+    }
+    if (uart->mcr & UART_MCR_DTR) {
+        uart->flags |= CHR_TIOCM_DTR;
+    }
+}
+
+static void
+serial_update_msl(serial_t *s)
+{
+    uart_state_t *uart = s->uart;
+    uint8_t omsr = uart->msr;
+    int flags = uart->flags;
+
+    uart->msr = (flags & CHR_TIOCM_CTS) ?
+                uart->msr | UART_MSR_CTS : uart->msr & ~UART_MSR_CTS;
+    uart->msr = (flags & CHR_TIOCM_DSR) ?
+                uart->msr | UART_MSR_DSR : uart->msr & ~UART_MSR_DSR;
+    uart->msr = (flags & CHR_TIOCM_CAR) ?
+                uart->msr | UART_MSR_DCD : uart->msr & ~UART_MSR_DCD;
+    uart->msr = (flags & CHR_TIOCM_RI) ?
+                uart->msr | UART_MSR_RI : uart->msr & ~UART_MSR_RI;
+
+    if (uart->msr != omsr) {
+         /* Set delta bits */
+         uart->msr = uart->msr | ((uart->msr >> 4) ^ (omsr >> 4));
+         /* UART_MSR_TERI only if change was from 1 -> 0 */
+         if ((uart->msr & UART_MSR_TERI) && !(omsr & UART_MSR_RI))
+             uart->msr &= ~UART_MSR_TERI;
+         uart_update_irq(s);
+    }
+}
+
+/**
+ * uart_xmit:
+ * @st: serial struct
+ *
+ * Transmit bytes to memq
+ */
+static void
+uart_xmit(serial_t *s)
+{
+    uart_state_t *uart = s->uart;
+
+    if (uart->mcr & UART_MCR_LOOP) {
+        /* Loopback mode, copy holding reg thr to receive reg rbr */
+        uart->rbr = uart->thr;
+        uart->lsr |= UART_LSR_THRE;    /* tx holding empty */
+        uart->lsr |= UART_LSR_DR;      /* rx data ready */
+
+        /* Add to rx queue in loopback */
+        memq_putc(s->rxq, uart->thr);
+        uart_update_irq(s);
+    } else {
+        if (!memq_full(s->txq)) {
+            serial_wr_thr(s, uart->thr);
+        }
+    }
+
+    if ((uart->lsr & UART_LSR_THRE) && !uart->thr_ipending) {
+        uart->thr_ipending = 1;
+        uart_update_irq(s);
+    }
+
+    uart->lsr |= UART_LSR_TEMT;
+    uart->thr_ipending = 0;
+}
+
+/**
+ * extract32:
+ * @value: the value to extract the bit field from
+ * @start: the lowest bit in the bit field (numbered from 0)
+ * @length: the length of the bit field
+ *
+ * Extract from the 32 bit input @value the bit field specified by the
+ * @start and @length parameters, and return it. The bit field must
+ * lie entirely within the 32 bit word. It is valid to request that
+ * all 32 bits are returned (ie @length 32 and @start 0).
+ *
+ * Returns: the value of the bit field extracted from the input value.
+ */
+static inline uint32_t extract32(uint32_t value, int start, int length)
+{
+    pciesvc_assert(start >= 0 && length > 0 && length <= 32 - start);
+    return (value >> start) & (~0U >> (32 - length));
+}
+
+/**
+ * extract16:
+ * @value: the value to extract the bit field from
+ * @start: the lowest bit in the bit field (numbered from 0)
+ * @length: the length of the bit field
+ *
+ * Extract from the 16 bit input @value the bit field specified by the
+ * @start and @length parameters, and return it. The bit field must
+ * lie entirely within the 16 bit word. It is valid to request that
+ * all 16 bits are returned (ie @length 16 and @start 0).
+ *
+ * Returns: the value of the bit field extracted from the input value.
+ */
+static inline uint16_t extract16(uint16_t value, int start, int length)
+{
+    pciesvc_assert(start >= 0 && length > 0 && length <= 16 - start);
+    return extract32(value, start, length);
+}
+
+/**
+ * deposit32:
+ * @value: initial value to insert bit field into
+ * @start: the lowest bit in the bit field (numbered from 0)
+ * @length: the length of the bit field
+ * @fieldval: the value to insert into the bit field
+ *
+ * Deposit @fieldval into the 32 bit @value at the bit field specified
+ * by the @start and @length parameters, and return the modified
+ * @value. Bits of @value outside the bit field are not modified.
+ * Bits of @fieldval above the least significant @length bits are
+ * ignored. The bit field must lie entirely within the 32 bit word.
+ * It is valid to request that all 32 bits are modified (ie @length
+ * 32 and @start 0).
+ *
+ * Returns: the modified @value.
+ */
+static inline uint32_t deposit32(uint32_t value, int start, int length,
+                                 uint32_t fieldval)
+{
+    uint32_t mask;
+    pciesvc_assert(start >= 0 && length > 0 && length <= 32 - start);
+    mask = (~0U >> (32 - length)) << start;
+    return (value & ~mask) | ((fieldval << start) & mask);
+}
+
+static serial_t *
+serial_get(pciehwdev_t *phwdev)
+{
+    static serial_t serial;
+
+    if (!serial.inited) {
+        pciehw_shmem_t *pshmem = pciesvc_shmem_get();
+        serial_uart_state_t *su = (serial_uart_state_t *)pshmem->serial[0];
+        serial_state_t *st = &su->serial_state;
+
+        serial.state = st;
+        serial.uart = &su->uart_state;
+        serial.txq = &st->txq;
+        serial.rxq = &st->rxq;
+
+        if (st->gen == 0) {
+            st->intrb = phwdev->intrb;
+            st->intrc = phwdev->intrc;
+
+            uart_reset(&serial);
+            rx_fifo_reset(&serial);
+            tx_fifo_reset(&serial);
+        }
+        serial.inited = 1;
+    }
+    return &serial;
+}
+
+uint64_t
+serial_barrd(pciehwdev_t *phwdev,
+             const u_int64_t baroff, const size_t size)
+{
+    serial_t *s = serial_get(phwdev);
+    uart_state_t *uart = s->uart;
+    uint32_t r;
+
+    /* only byte access */
+    if (size != 1) return 0;
+    if (baroff >= 8) return 0;
+
+    switch (baroff) {
+    case UART_RX_BUF:
+        if (uart->lcr & UART_LCR_DLAB) {
+            r = extract16(uart->divider, 8 * (int)baroff, 8);
+        } else {
+            r = 0;
+            if (uart->mcr & UART_MCR_LOOP) {
+                if (!serial_rxq_empty(s)) {
+                    r = serial_rd_rbr(s);
+                    uart->lsr |= UART_LSR_DR;
+                } else {
+                    uart->lsr &= ~(UART_LSR_DR | UART_LSR_BI);
+                }
+            } else {
+                r = serial_rd_rbr(s);
+                if (uart->fcr & UART_FCR_FE) {
+                    if (serial_rxq_empty(s)) {
+                        uart->lsr &= ~(UART_LSR_DR | UART_LSR_BI);
+                    }
+                } else {
+                    uart->lsr &= ~(UART_LSR_DR | UART_LSR_BI);
+                }
+                uart_update_irq(s);
+            }
+        }
+        break;
+    case UART_INTERRUPT_ENABLE:
+        if (uart->lcr & UART_LCR_DLAB) {
+            r = extract16(uart->divider, 8 * (int)baroff, 8);
+        } else {
+            r = uart->ier;
+        }
+        break;
+    case UART_INTERRUPT_ID:
+        if (!serial_rxq_empty(s)) {
+            uart->lsr |= UART_LSR_DR;
+        }
+        uart_update_irq(s);
+
+        if ((uart->iir & UART_IIR_ID) == UART_IIR_THRI) {
+            /* transmit hold register is empty */
+            uart->thr_ipending = 0;
+            uart_update_irq(s);
+        }
+        r = uart->iir;
+        break;
+    case UART_LINE_CONTROL:
+        r = uart->lcr;
+        break;
+    case UART_MODEM_CONTROL:
+        uart->mcr_read = 1;
+        if (uart->mcr_write == 0) {
+            /* linux */
+            uart->flags = CHR_TIOCM_CTS | CHR_TIOCM_DSR | CHR_TIOCM_CAR;
+            serial_update_msl(s);
+        }
+        r = uart->mcr;
+        break;
+    case UART_LINE_STATUS:
+        if (!serial_rxq_empty(s)) {
+            uart->lsr |= UART_LSR_DR;
+        }
+        if (memq_full(s->txq)) {
+            uart->lsr &= ~UART_LSR_THRE;   /* clear thr empty */
+            uart->lsr &= ~UART_LSR_TEMT;   /* clear transmitter empty */
+        } else {
+            uart->lsr |= UART_LSR_THRE;    /* thr empty */
+            uart->lsr |= UART_LSR_TEMT;    /* transmitter empty */
+        }
+        /* Clear break and overrun interrupts */
+        if (uart->lsr & (UART_LSR_BI | UART_LSR_OE)) {
+            uart->lsr &= ~(UART_LSR_BI | UART_LSR_OE);
+            uart_update_irq(s);
+        }
+        r = uart->lsr;
+        break;
+    case UART_MODEM_STATUS:
+        if (uart->mcr & UART_MCR_LOOP) {
+            /* In loopback modem output pins are connected to the inputs */
+            r = (uart->mcr & 0x0c) << 4;
+            r |= (uart->mcr & 0x02) << 3;
+            r |= (uart->mcr & 0x01) << 5;
+        } else {
+            serial_update_msl(s);
+            r = uart->msr;
+            /* Clear delta bits & msr int after read, if they were set */
+            if (uart->msr & UART_MSR_ANY_DELTA) {
+                uart->msr &= 0xf0;
+                uart_update_irq(s);
+            }
+        }
+        break;
+    case UART_SCRATCH:
+        r = uart->scr;
+        break;
+    default:
+        break;
+    }
+
+    return r;
+}
+
+void
+serial_barwr(pciehwdev_t *phwdev,
+             const u_int64_t baroff, const size_t size, const u_int64_t val)
+{
+    serial_t *s = serial_get(phwdev);
+    volatile serial_state_t *st = s->state;
+    uart_state_t *uart = s->uart;
+    uint8_t changed;
+    uint8_t temp;
+
+    /* only byte access */
+    if (size != 1) return;
+    if (baroff >= 8) return;
+
+    switch (baroff) {
+    case UART_TX_BUF:
+        if (uart->lcr & UART_LCR_DLAB) {
+            uart->divider = deposit32(uart->divider, 8 * (int)baroff, 8,
+                                      (int)val);
+            uart_update_parameters(s);
+        } else {
+            uart->thr = (uint8_t)val;
+            uart->thr_ipending = 0;
+            uart->lsr &= ~UART_LSR_THRE;    /* clear thr empty */
+            uart->lsr &= ~UART_LSR_TEMT;    /* clear transmitter empty */
+            uart_update_irq(s);
+            uart_xmit(s);
+        }
+        break;
+    case UART_INTERRUPT_ENABLE:
+        if (uart->lcr & UART_LCR_DLAB) {
+            uart->divider = deposit32(uart->divider, 8 * (int)baroff, 8, (int)val);
+            uart_update_parameters(s);
+        } else {
+            changed = (uart->ier ^ val) & 0x0f;
+            uart->ier = val & 0x0f;
+
+            if (changed & UART_IER_MSI) {
+                if (uart->ier & UART_IER_MSI) {
+                     /*
+                      * Carry over mcr RTS/DTR to msr and let
+                      * serial_update_msl set the delta bits.
+                      */
+                     if (uart->mcr == 0xb) {
+                         uart->msr = 0xb0;
+                     } else if (uart->mcr == 0x3) {
+                         uart->msr = 0xb0;
+                     } else if (uart->mcr == 0x8) {
+                         uart->msr = 0x80;
+                     } else if (uart->mcr == 0x0) {
+                         uart->msr = 0x80;
+                     }
+                     serial_update_msl(s);
+                }
+            }
+
+            /* Turning on the THRE interrupt on IER can trigger the interrupt
+             * if LSR.THRE=1, even if it had been masked before by reading IIR.
+             * This is not in the datasheet, but Windows relies on it.  It is
+             * unclear if THRE has to be resampled every time THRI becomes
+             * 1, or only on the rising edge.  Bochs does the latter, and
+             * Windows always toggles IER to all zeroes and back to all ones,
+             * so do the same.
+             *
+             * If IER.THRI is zero, thr_ipending is not used.  Set it to zero
+             * so that the thr_ipending subsection is not migrated.
+             */
+            if (changed & UART_IER_THRI) {
+                if ((uart->ier & UART_IER_THRI) &&
+                    (uart->lsr & UART_LSR_THRE)) {
+                    uart->thr_ipending = 1;
+                } else {
+                    uart->thr_ipending = 0;
+                }
+            }
+
+            if (changed) {
+                uart_update_irq(s);
+            }
+
+            if ((uart->ier & 0xf) == 0) {
+                intr_drvcfg_mask(st->intrb, 1);    /* mask */
+            } else {
+                intr_drvcfg_mask(st->intrb, 0);    /* unmask */
+            }
+        }
+        break;
+    case UART_FIFO_CONTROL:
+        /* Flush FIFOs if enable/disable flag changed */
+        temp = (uint8_t)val;
+        if ((temp ^ uart->fcr) & UART_FCR_FE) {
+            temp |= UART_FCR_XFR | UART_FCR_RFR;
+        }
+
+        if (temp & UART_FCR_RFR) {
+            /* Reset the receive fifo */
+            uart->lsr &= ~(UART_LSR_DR | UART_LSR_BI);
+            rx_fifo_reset(s);
+        }
+
+        if (temp & UART_FCR_XFR) {
+            /* Reset the transmit fifo */
+            uart->lsr |= UART_LSR_THRE;
+            uart->thr_ipending = 1;
+            tx_fifo_reset(s);
+        }
+        uart_write_fcr(s, val);
+        uart_update_irq(s);
+        break;
+    case UART_LINE_CONTROL:
+        uart->lcr = (uint8_t)val;
+        if (uart->lcr & UART_LCR_BRK) st->breakreq++;
+        uart_update_parameters(s);
+        break;
+    case UART_MODEM_CONTROL:
+        {
+            int old_mcr = uart->mcr;
+
+            uart->mcr_write = 1;
+            uart->mcr = val & 0x1f;
+            if (uart->mcr & UART_MCR_LOOP) {
+                break;
+            }
+
+            if (old_mcr != uart->mcr) {
+                serial_update_tiocm(s);
+            }
+        }
+        break;
+    case UART_LINE_STATUS:
+        break;
+    case UART_MODEM_STATUS:
+        break;
+    case UART_SCRATCH:
+        uart->scr = (uint8_t)val;
+        break;
+    default:
+        break;
+    }
+}
+
+void
+serial_reset(pciehwdev_t *phwdev, const pciesvc_rsttype_t rsttype)
+{
+    serial_t *s = serial_get(phwdev);
+
+    /*
+     * It makes some sense to do this here:
+     *     uart_reset(s);
+     * but it looks like the linux serial driver doesn't
+     * expect the uart registers to change during FLR so doing
+     * the uart_reset() will cause the serial driver not to recover.
+     */
+    rx_fifo_reset(s);
+    tx_fifo_reset(s);
+    s->state->breakreq++;
+}
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/serial.h b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/serial.h
new file mode 100644
index 000000000..9e28bf128
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/serial.h
@@ -0,0 +1,20 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (c) 2022, Pensando Systems Inc.
+ */
+
+#ifndef __SERIAL_H__
+#define __SERIAL_H__
+
+u_int64_t
+serial_barrd(pciehwdev_t *phwdev,
+             const u_int64_t baroff, const size_t size);
+
+void
+serial_barwr(pciehwdev_t *phwdev,
+             const u_int64_t baroff, const size_t size, const u_int64_t val);
+
+void
+serial_reset(pciehwdev_t *phwdev, const pciesvc_rsttype_t rsttype);
+
+#endif /* __SERIAL_H__ */
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/virtio.c b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/virtio.c
new file mode 100644
index 000000000..00930126c
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/virtio.c
@@ -0,0 +1,401 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2022, Pensando Systems Inc.
+ */
+
+#include "pciesvc_impl.h"
+#include "virtio.h"
+
+#include "virtio_spec.h"
+
+#define FMT64X  "0x%" PRIx64
+#define FMT64U "%" PRIu64
+#define FMT64S "%lu"
+
+#define VIRTIO_DEV_REG_NOTIFY(fld)                                      \
+    case VIRTIO_DEV_REG_OFF(fld):                                       \
+        *do_notify = 1;                                                 \
+        break;
+
+#define VIRTIO_DEV_REG_RD(fld)                                          \
+    case VIRTIO_DEV_REG_OFF(fld):                                       \
+        pciesvc_mem_rd(addr, &val, VIRTIO_DEV_REG_SZ(fld));             \
+        pciesvc_logdebug("%s: read %s addr "FMT64X" off "FMT64U" size "FMT64S" val "FMT64X"", \
+            pciehwdev_get_name(phwdev), #fld, addr, baroff, size, val); \
+        break;
+
+#define VIRTIO_DEV_REG_RD_ARR(fld, arr_fld, idx_fld, idx_count)         \
+    case VIRTIO_DEV_REG_OFF(fld):                                       \
+        pciesvc_mem_rd(VIRTIO_DEV_REG_ADDR(base, idx_fld),              \
+                       &idx, VIRTIO_DEV_REG_SZ(idx_fld));               \
+        if (idx < idx_count) {                                          \
+            pciesvc_mem_rd(VIRTIO_DEV_REG_ADDR(base, arr_fld),          \
+                           &val, VIRTIO_DEV_REG_SZ(arr_fld));           \
+            pciesvc_logdebug("%s: read %s["FMT64U"] addr "FMT64X" off "FMT64U" size "FMT64S" val "FMT64X"",\
+                             pciehwdev_get_name(phwdev), #fld, idx,     \
+                             VIRTIO_DEV_REG_ADDR(base, arr_fld),        \
+                             baroff, size, val);                        \
+        } else {                                                        \
+            pciesvc_logerror("%s: read %s["FMT64U"] addr "FMT64X" off "FMT64U" size "FMT64S" val "FMT64X" (out of bounds)",\
+                             pciehwdev_get_name(phwdev), #fld, idx,     \
+                             VIRTIO_DEV_REG_ADDR(base, arr_fld),        \
+                             baroff, size, val);                        \
+        }                                                               \
+        break;
+
+#define VIRTIO_DEV_REG_WR(fld)                               \
+    case VIRTIO_DEV_REG_OFF(fld):                                       \
+        pciesvc_logdebug("%s: write %s addr "FMT64X" off "FMT64U" size "FMT64S" val "FMT64X"",\
+            pciehwdev_get_name(phwdev), #fld, addr, baroff, size, val); \
+        pciesvc_mem_wr(addr, &val, VIRTIO_DEV_REG_SZ(fld));             \
+        break;
+
+#define VIRTIO_DEV_REG_WR_COND(fld, cond)                               \
+        case VIRTIO_DEV_REG_OFF(fld):                                              \
+            pciesvc_logdebug("%s: write %s addr "FMT64X" off "FMT64U" size "FMT64S" val "FMT64X" cond %u", \
+                pciehwdev_get_name(phwdev), #fld, addr, baroff, size, val, cond);  \
+            if (cond) {                                                            \
+                pciesvc_mem_wr(addr, &val, VIRTIO_DEV_REG_SZ(fld));                \
+            }                                                                      \
+            break;
+
+#define VIRTIO_DEV_REG_WR_PROC(fld, proc)                               \
+        case VIRTIO_DEV_REG_OFF(fld):                                              \
+            pciesvc_logdebug("%s: write %s addr "FMT64X" off "FMT64U" size "FMT64S" val "FMT64X" proc %s", \
+                pciehwdev_get_name(phwdev), #fld, addr, baroff, size, val, #proc);  \
+            proc(phwdev, addr, baroff, size, val);                                 \
+            break;
+
+#define VIRTIO_DEV_REG_WR_IGN(fld)                           \
+    case VIRTIO_DEV_REG_OFF(fld):                                       \
+        pciesvc_logdebug("%s: write %s addr "FMT64X" off "FMT64U" size "FMT64S" val "FMT64X" ignore",\
+            pciehwdev_get_name(phwdev), #fld, addr, baroff, size, val); \
+        break;
+
+#define VIRTIO_DEV_REG_WR_ARR(fld, arr_fld, idx_fld, idx_count)         \
+    case VIRTIO_DEV_REG_OFF(fld):                                       \
+        pciesvc_mem_rd(VIRTIO_DEV_REG_ADDR(base, idx_fld),              \
+                       &idx, VIRTIO_DEV_REG_SZ(idx_fld));               \
+        if (idx < idx_count) {                                          \
+            pciesvc_logdebug("%s: write %s["FMT64U"] addr "FMT64X" off "FMT64U" size "FMT64S" val "FMT64X"",\
+                             pciehwdev_get_name(phwdev), #fld, idx,     \
+                             VIRTIO_DEV_REG_ADDR(base, arr_fld),        \
+                             baroff, size, val);                        \
+            pciesvc_mem_wr(VIRTIO_DEV_REG_ADDR(base, arr_fld),          \
+                           &val, VIRTIO_DEV_REG_SZ(arr_fld));           \
+        } else {                                                        \
+            pciesvc_logerror("%s: write %s["FMT64U"] addr "FMT64X" off "FMT64U" size "FMT64S" val "FMT64X" (out of bounds)",\
+                             pciehwdev_get_name(phwdev), #fld, idx,     \
+                             VIRTIO_DEV_REG_ADDR(base, arr_fld),        \
+                             baroff, size, val);                        \
+        }                                                               \
+        break;
+
+#define VIRTIO_DEV_REG_WR_ARR_IGN(fld, arr_fld, idx_fld, idx_count)     \
+    case VIRTIO_DEV_REG_OFF(fld):                                       \
+        pciesvc_mem_rd(VIRTIO_DEV_REG_ADDR(base, idx_fld),              \
+                       &idx, VIRTIO_DEV_REG_SZ(idx_fld));               \
+        if (idx < idx_count) {                                          \
+            pciesvc_logdebug("%s: write %s["FMT64U"] addr "FMT64X" off "FMT64U" size "FMT64S" val "FMT64X" ignore",\
+                             pciehwdev_get_name(phwdev), #fld, idx,     \
+                             VIRTIO_DEV_REG_ADDR(base, arr_fld),        \
+                             baroff, size, val);                        \
+            pciesvc_mem_wr(VIRTIO_DEV_REG_ADDR(base, arr_fld),          \
+                           &val, VIRTIO_DEV_REG_SZ(arr_fld));           \
+        } else {                                                        \
+            pciesvc_logerror("%s: write %s["FMT64U"] addr "FMT64X" off "FMT64U" size "FMT64S" val "FMT64X" ignore (out of bounds)",\
+                             pciehwdev_get_name(phwdev), #fld, idx,     \
+                             VIRTIO_DEV_REG_ADDR(base, arr_fld),        \
+                             baroff, size, val);                        \
+        }                                                               \
+        break;
+
+#define VIRTIO_DEV_REG_INSIDE(_fld, _offs, _sz)                         \
+        (_offs >= VIRTIO_DEV_REG_OFF(_fld) &&                           \
+         (_offs + _sz) <= VIRTIO_DEV_REG_OFF(_fld) + VIRTIO_DEV_REG_SZ(_fld))
+
+u_int64_t
+virtio_barrd(pciehwdev_t *phwdev, u_int64_t addr,
+             const u_int64_t baroff, const size_t size,
+             u_int8_t *do_notify)
+{
+    u_int64_t base = addr - baroff;
+    u_int64_t val = 0;
+    u_int64_t idx = 0;
+
+    /* net_cfg */
+    if (VIRTIO_DEV_REG_INSIDE(part1, baroff, size)) {
+        pciesvc_mem_rd(addr, &val, size);
+        pciesvc_logdebug("%s: read part1 addr "FMT64X" "
+                         "off "FMT64U" size "FMT64S" val "FMT64X"",
+                         pciehwdev_get_name(phwdev), addr, baroff, size, val);
+        return val;
+    }
+
+    switch (baroff) {
+    VIRTIO_DEV_REG_RD(cmn_cfg.device_feature_select);
+
+    VIRTIO_DEV_REG_RD_ARR(cmn_cfg.device_feature,
+                          cmn_cfg.device_feature_cfg[idx],
+                          cmn_cfg.device_feature_select,
+                          VIRTIO_PCI_FEATURE_SELECT_COUNT);
+
+    VIRTIO_DEV_REG_RD(cmn_cfg.driver_feature_select);
+
+    VIRTIO_DEV_REG_RD_ARR(cmn_cfg.driver_feature,
+                          cmn_cfg.driver_feature_cfg[idx],
+                          cmn_cfg.driver_feature_select,
+                          VIRTIO_PCI_FEATURE_SELECT_COUNT);
+
+    VIRTIO_DEV_REG_RD(cmn_cfg.config_msix_vector);
+    VIRTIO_DEV_REG_RD(cmn_cfg.num_queues);
+    VIRTIO_DEV_REG_RD(cmn_cfg.device_status);
+    VIRTIO_DEV_REG_RD(cmn_cfg.config_generation);
+    VIRTIO_DEV_REG_RD(cmn_cfg.queue_select);
+
+    VIRTIO_DEV_REG_RD_ARR(cmn_cfg.queue_cfg.queue_size,
+                          queue_cfg[idx].queue_size,
+                          cmn_cfg.queue_select,
+                          VIRTIO_PCI_QUEUE_SELECT_COUNT);
+
+    VIRTIO_DEV_REG_RD_ARR(cmn_cfg.queue_cfg.queue_msix_vector,
+                          queue_cfg[idx].queue_msix_vector,
+                          cmn_cfg.queue_select,
+                          VIRTIO_PCI_QUEUE_SELECT_COUNT);
+
+    VIRTIO_DEV_REG_RD_ARR(cmn_cfg.queue_cfg.queue_enable,
+                          queue_cfg[idx].queue_enable,
+                          cmn_cfg.queue_select,
+                          VIRTIO_PCI_QUEUE_SELECT_COUNT);
+
+    VIRTIO_DEV_REG_RD_ARR(cmn_cfg.queue_cfg.queue_notify_off,
+                          queue_cfg[idx].queue_notify_off,
+                          cmn_cfg.queue_select,
+                          VIRTIO_PCI_QUEUE_SELECT_COUNT);
+
+    VIRTIO_DEV_REG_RD_ARR(cmn_cfg.queue_cfg.queue_desc_lo,
+                          queue_cfg[idx].queue_desc_lo,
+                          cmn_cfg.queue_select,
+                          VIRTIO_PCI_QUEUE_SELECT_COUNT);
+
+    VIRTIO_DEV_REG_RD_ARR(cmn_cfg.queue_cfg.queue_desc_hi,
+                          queue_cfg[idx].queue_desc_hi,
+                          cmn_cfg.queue_select,
+                          VIRTIO_PCI_QUEUE_SELECT_COUNT);
+
+    VIRTIO_DEV_REG_RD_ARR(cmn_cfg.queue_cfg.queue_avail_lo,
+                          queue_cfg[idx].queue_avail_lo,
+                          cmn_cfg.queue_select,
+                          VIRTIO_PCI_QUEUE_SELECT_COUNT);
+
+    VIRTIO_DEV_REG_RD_ARR(cmn_cfg.queue_cfg.queue_avail_hi,
+                          queue_cfg[idx].queue_avail_hi,
+                          cmn_cfg.queue_select,
+                          VIRTIO_PCI_QUEUE_SELECT_COUNT);
+
+    VIRTIO_DEV_REG_RD_ARR(cmn_cfg.queue_cfg.queue_used_lo,
+                          queue_cfg[idx].queue_used_lo,
+                          cmn_cfg.queue_select,
+                          VIRTIO_PCI_QUEUE_SELECT_COUNT);
+
+    VIRTIO_DEV_REG_RD_ARR(cmn_cfg.queue_cfg.queue_used_hi,
+                          queue_cfg[idx].queue_used_hi,
+                          cmn_cfg.queue_select,
+                          VIRTIO_PCI_QUEUE_SELECT_COUNT);
+
+    default:
+        val = 0;
+        pciesvc_logerror("%s: read addr "FMT64X" off "FMT64U" size "FMT64S" default ignore",
+            pciehwdev_get_name(phwdev), addr, baroff, size);
+        break;
+    }
+
+    return val;
+}
+
+static void
+virtio_barwr_device_status(pciehwdev_t *phwdev, u_int64_t addr,
+                           const u_int64_t baroff, const size_t size,
+                           const u_int64_t val)
+{
+    u_int64_t base = addr - baroff;
+    u_int8_t old = 0;
+
+    pciesvc_mem_rd(addr, &old, VIRTIO_DEV_REG_SZ(cmn_cfg.device_status));
+
+    if (!val) {
+        // If pciemgr sees the transition nonzero -> zero, then nicmgr needs to
+        // reset the device before device_status actually changes to zero.
+        //
+        // If the device status was already zero, and is written zero, there is
+        // a race!  After writing zero, the driver would read zero and proceed.
+        //
+        // Nicmgr, when it handles the event, cannot depend on the current
+        // value being the old value.  The driver may have written a new
+        // nonzero value after proceeding.  If nicmgr assumes that the now
+        // current nonzero value is the old value, it will falsely observe a
+        // transition from nonzero to zero, which did not actually occur, and
+        // reset the device at the same time as the driver is initializing.
+        //
+        // To avoid this, when pciemgr sees the transition from nonzero ->
+        // zero, then pciemgr indicates so in need_reset.
+        //
+        // If nicmgr receives an event for the device_status register, it
+        // should check need_reset.  If reset is needed, then clear need_reset,
+        // reset the device, and then finally clear device_status.  If reset is
+        // not needed, nicmgr should not reset the device, to avoid the race.
+        //
+        if (old) {
+            old = 1;
+            pciesvc_mem_wr(VIRTIO_DEV_REG_ADDR(base, cmn_cfg.need_reset),
+                           &old, sizeof(old));
+        }
+
+        // Eventually, nicmgr will update device_status.  Not here.
+        return;
+    }
+
+    if ((val & VIRTIO_S_FEATURES_OK) && !(old & VIRTIO_S_FEATURES_OK)) {
+        u_int32_t feature_lo = 0;
+        u_int32_t feature_hi = 0;
+        u_int64_t feature = 0;
+
+        pciesvc_mem_rd(VIRTIO_DEV_REG_ADDR(base, cmn_cfg.driver_feature_cfg[0]),
+                       &feature_lo, sizeof(feature_lo));
+
+        pciesvc_mem_rd(VIRTIO_DEV_REG_ADDR(base, cmn_cfg.driver_feature_cfg[1]),
+                       &feature_hi, sizeof(feature_hi));
+
+        feature = (u_int64_t)feature_lo | ((u_int64_t)feature_hi << 32);
+
+        pciesvc_loginfo("proc: features_ok "FMT64X"", feature);
+
+        if (feature & VIRTIO_F_NOTIFICATION_DATA) {
+            // Nicmgr initialized the queue configs with notify offsets in
+            // the incr_pi_dbell range.  If this feature is selected,
+            // modify the queue configs to ring the same doorbell via the
+            // set_pi_dbell range.
+            //
+            // This is done here in pciesvc, so that the driver can read
+            // the notify offset of queues _immediately_ after setting
+            // features ok.
+
+            const uint16_t notify_offset =
+                offsetof(struct virtio_pci_notify_reg, set_pi_dbell)
+                / VIRTIO_NOTIFY_MULTIPLIER;
+
+            u_int16_t vq_i = 0, vq_count = 0;
+
+            pciesvc_mem_rd(VIRTIO_DEV_REG_ADDR(base, cmn_cfg.num_queues),
+                           &vq_count, sizeof(vq_count));
+
+            pciesvc_logdebug("proc: vq_count %u notify_offset %u",
+                             vq_count, notify_offset);
+
+            for (; vq_i < vq_count; ++vq_i) {
+                u_int64_t off_addr =
+                    VIRTIO_DEV_REG_ADDR(base, queue_cfg[vq_i].queue_notify_off);
+
+                u_int16_t off = 0;
+
+                pciesvc_mem_rd(off_addr, &off, sizeof(off));
+                off += notify_offset;
+                pciesvc_mem_wr(off_addr, &off, sizeof(off));
+            }
+        }
+    }
+
+    pciesvc_mem_wr(addr, &val, VIRTIO_DEV_REG_SZ(cmn_cfg.device_status));
+}
+
+void
+virtio_barwr(pciehwdev_t *phwdev, u_int64_t addr,
+             const u_int64_t baroff, const size_t size, const u_int64_t val,
+             u_int8_t *do_notify)
+{
+    u_int64_t base = addr - baroff;
+    u_int64_t idx = 0;
+
+    switch (baroff) {
+    VIRTIO_DEV_REG_WR(cmn_cfg.device_feature_select);
+
+    VIRTIO_DEV_REG_WR_ARR_IGN(cmn_cfg.device_feature,
+                              cmn_cfg.device_feature_cfg[idx],
+                              cmn_cfg.device_feature_select,
+                              VIRTIO_PCI_FEATURE_SELECT_COUNT);
+
+    VIRTIO_DEV_REG_WR(cmn_cfg.driver_feature_select);
+
+    VIRTIO_DEV_REG_WR_ARR(cmn_cfg.driver_feature,
+                          cmn_cfg.driver_feature_cfg[idx],
+                          cmn_cfg.driver_feature_select,
+                          VIRTIO_PCI_FEATURE_SELECT_COUNT);
+
+    VIRTIO_DEV_REG_WR(cmn_cfg.config_msix_vector);
+    VIRTIO_DEV_REG_WR_IGN(cmn_cfg.num_queues);
+    VIRTIO_DEV_REG_WR_PROC(cmn_cfg.device_status, virtio_barwr_device_status);
+    VIRTIO_DEV_REG_WR_IGN(cmn_cfg.config_generation);
+    VIRTIO_DEV_REG_WR(cmn_cfg.queue_select);
+
+    VIRTIO_DEV_REG_WR_ARR(cmn_cfg.queue_cfg.queue_size,
+                          queue_cfg[idx].queue_size,
+                          cmn_cfg.queue_select,
+                          VIRTIO_PCI_QUEUE_SELECT_COUNT);
+
+    VIRTIO_DEV_REG_WR_ARR(cmn_cfg.queue_cfg.queue_msix_vector,
+                          queue_cfg[idx].queue_msix_vector,
+                          cmn_cfg.queue_select,
+                          VIRTIO_PCI_QUEUE_SELECT_COUNT);
+
+    VIRTIO_DEV_REG_WR_ARR(cmn_cfg.queue_cfg.queue_enable,
+                          queue_cfg[idx].queue_enable,
+                          cmn_cfg.queue_select,
+                          VIRTIO_PCI_QUEUE_SELECT_COUNT);
+
+    VIRTIO_DEV_REG_WR_ARR(cmn_cfg.queue_cfg.queue_notify_off,
+                          queue_cfg[idx].queue_notify_off,
+                          cmn_cfg.queue_select,
+                          VIRTIO_PCI_QUEUE_SELECT_COUNT);
+
+    VIRTIO_DEV_REG_WR_ARR(cmn_cfg.queue_cfg.queue_desc_lo,
+                          queue_cfg[idx].queue_desc_lo,
+                          cmn_cfg.queue_select,
+                          VIRTIO_PCI_QUEUE_SELECT_COUNT);
+
+    VIRTIO_DEV_REG_WR_ARR(cmn_cfg.queue_cfg.queue_desc_hi,
+                          queue_cfg[idx].queue_desc_hi,
+                          cmn_cfg.queue_select,
+                          VIRTIO_PCI_QUEUE_SELECT_COUNT);
+
+    VIRTIO_DEV_REG_WR_ARR(cmn_cfg.queue_cfg.queue_avail_lo,
+                          queue_cfg[idx].queue_avail_lo,
+                          cmn_cfg.queue_select,
+                          VIRTIO_PCI_QUEUE_SELECT_COUNT);
+
+    VIRTIO_DEV_REG_WR_ARR(cmn_cfg.queue_cfg.queue_avail_hi,
+                          queue_cfg[idx].queue_avail_hi,
+                          cmn_cfg.queue_select,
+                          VIRTIO_PCI_QUEUE_SELECT_COUNT);
+
+    VIRTIO_DEV_REG_WR_ARR(cmn_cfg.queue_cfg.queue_used_lo,
+                          queue_cfg[idx].queue_used_lo,
+                          cmn_cfg.queue_select,
+                          VIRTIO_PCI_QUEUE_SELECT_COUNT);
+
+    VIRTIO_DEV_REG_WR_ARR(cmn_cfg.queue_cfg.queue_used_hi,
+                          queue_cfg[idx].queue_used_hi,
+                          cmn_cfg.queue_select,
+                          VIRTIO_PCI_QUEUE_SELECT_COUNT);
+
+    default:
+        pciesvc_logerror("%s: write addr "FMT64X" off "FMT64U" size "FMT64S" val "FMT64X" default ignore",
+            pciehwdev_get_name(phwdev), addr, baroff, size, val);
+        break;
+    }
+
+    switch (baroff) {
+    VIRTIO_DEV_REG_NOTIFY(cmn_cfg.device_status);
+    VIRTIO_DEV_REG_NOTIFY(cmn_cfg.queue_select);
+    VIRTIO_DEV_REG_NOTIFY(cmn_cfg.queue_cfg.queue_enable);
+    }
+}
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/virtio.h b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/virtio.h
new file mode 100644
index 000000000..9e41903c6
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/virtio.h
@@ -0,0 +1,19 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (c) 2022, Pensando Systems Inc.
+ */
+
+#ifndef __VIRTIO_H__
+#define __VIRTIO_H__
+
+u_int64_t
+virtio_barrd(pciehwdev_t *phwdev, u_int64_t addr,
+             const u_int64_t baroff, const size_t size,
+             u_int8_t *do_notify);
+
+void
+virtio_barwr(pciehwdev_t *phwdev, u_int64_t addr,
+             const u_int64_t baroff, const size_t size, const u_int64_t val,
+             u_int8_t *do_notify);
+
+#endif /* __VIRTIO_H__ */
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/vpd.c b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/vpd.c
new file mode 100644
index 000000000..4ad3ecbc2
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/vpd.c
@@ -0,0 +1,29 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2019,2021-2022, Pensando Systems Inc.
+ */
+
+#include "pciesvc_impl.h"
+
+uint32_t
+pciehw_vpd_read(const pciehwdevh_t hwdevh, const uint16_t addr)
+{
+    if (addr < PCIEHW_VPDSZ) {
+        const uint16_t aligned_addr = addr & ~0x3;
+        const uint8_t *vpddata = pciesvc_vpd_get(hwdevh);
+        const uint32_t data = (((uint32_t)vpddata[aligned_addr + 3] << 24) |
+                               ((uint32_t)vpddata[aligned_addr + 2] << 16) |
+                               ((uint32_t)vpddata[aligned_addr + 1] <<  8) |
+                               ((uint32_t)vpddata[aligned_addr + 0] <<  0));
+        pciesvc_vpd_put(vpddata, CLEAN);
+        return data;
+    }
+    return 0;
+}
+
+void
+pciehw_vpd_write(const pciehwdevh_t hwdevh,
+                 const uint16_t addr, const uint32_t data)
+{
+    /* No writeable vpd data (yet). */
+}
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/vpd.h b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/vpd.h
new file mode 100644
index 000000000..fd17b40af
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src/vpd.h
@@ -0,0 +1,15 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (c) 2019,2021, Pensando Systems Inc.
+ */
+
+#ifndef __VPD_H__
+#define __VPD_H__
+
+typedef u_int32_t pciehwdevh_t;
+
+uint32_t pciehw_vpd_read(const pciehwdevh_t hwdevh, const uint16_t addr);
+void pciehw_vpd_write(const pciehwdevh_t hwdevh,
+                      const uint16_t addr, const uint32_t data);
+
+#endif /* __VPD_H__ */
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc_end.c b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc_end.c
new file mode 100644
index 000000000..53fee743d
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc_end.c
@@ -0,0 +1,24 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2021, 2022, Oracle and/or its affiliates.
+ */
+
+/*
+ * PCIESVC Library Loader - End of Code Marker
+ *
+ * This object file is last in the module link order and so the symbol
+ * pciesvc_end gives us the address of the end of the code section in
+ * the module. What follows are the various data sections.
+ *
+ * The reason this is needed is to be able to examine the code in in
+ * kpcimgr_module_register() without accidentally looking at data. At
+ * the time kpcimgr_module_register() is called, the kernel has
+ * completely finished loading the module and all the meta data (i.e.,
+ * section headers etc) have been discarded, and so there is nothing
+ * to tell us where the code ends.
+ *
+ * Author: rob.gardner@oracle.com
+ */
+noinline void pciesvc_end(void)
+{
+}
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc_system_extern.h b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc_system_extern.h
new file mode 100644
index 000000000..6d73f80a1
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc_system_extern.h
@@ -0,0 +1,133 @@
+/*
+ * Copyright (c) 2021, Pensando Systems Inc.
+ */
+
+#ifndef __PCIESVC_SYSTEM_EXTERN_H__
+#define __PCIESVC_SYSTEM_EXTERN_H__
+
+#include "kpcimgr_api.h"
+#include "pciesvc.h"
+#include "portcfg.h"
+
+#include <linux/pci_regs.h>
+#include "notify_entry.h"
+#include "cfgspace.h"
+
+#define KPR_LINESZ 512
+#define kpr_err(fmt, ...) \
+	do {		  \
+		char buf[KPR_LINESZ];		\
+		if (virtual()) \
+			pciesvc_snprintf(buf, KPR_LINESZ, KERN_ERR fmt, ##__VA_ARGS__);	\
+		else \
+			pciesvc_snprintf(buf, KPR_LINESZ, fmt, ##__VA_ARGS__);	\
+		pciesvc_log(buf); \
+	} while (0)
+
+#define kdbg_puts_caller() \
+	do {		      \
+		kstate_t *kstate = get_kstate();	\
+		kpr_err("%s called from offset %lx\n", __func__, \
+			((unsigned long)__builtin_return_address(0) - (unsigned long)kstate->code_base)); \
+	} while (0)
+
+#define pciesvc_assert(expr) \
+        if (unlikely(!(expr))) {                                   \
+		kpr_err("Assertion failed! %s,%s,%s,line=%d\n", \
+			#expr, __FILE__, __func__, __LINE__);	\
+        }
+
+#define pciesvc_usleep          kp_udelay
+#define pciesvc_ffs             ffs
+#define pciesvc_ffsll           __builtin_ffsl
+
+#define MIN(x,y) ((x) < (y) ? x : y)
+#define MAX(x,y) ((x) > (y) ? x : y)
+
+#define PRIi64 "lld"
+
+#define PRIx8 "x"
+#define PRIx16 "x"
+#define PRIx32 "x"
+#define PRIx64 "llx"
+#define PRIu64 "llu"
+
+#define pciesvc_htobe32(x) __cpu_to_be32(x)
+#define pciesvc_be32toh(x) __be32_to_cpu(x)
+
+#define pciesvc_htole32(x) __cpu_to_le32(x)
+#define pciesvc_le32toh(x) __le32_to_cpu(x)
+
+#define pciesvc_htobe16(x) __cpu_to_be16(x)
+#define pciesvc_be16toh(x) __be16_to_cpu(x)
+
+#define CLEAN                   0
+#define DIRTY                   1
+
+int
+pciesvc_snprintf(char *buf, size_t len, const char *fmt, ...);
+
+int
+pciesvc_vsnprintf(char *buf, size_t len, const char *fmt, va_list ap)
+    __attribute__((weak));
+
+
+u64
+pciesvc_vtop(const void *hwmemva);
+
+void
+*pciesvc_hwmem_get(void);
+uint32_t
+pciesvc_reg_rd32(const uint64_t pa);
+void
+pciesvc_pciepreg_rd32(const uint64_t pa, uint32_t *dest);
+void
+pciesvc_reg_wr32(const uint64_t pa, const uint32_t val);
+#define pciesvc_pciepreg_wr32   pciesvc_reg_wr32
+
+int
+pciesvc_mem_rd(const uint64_t pa, void *buf, const size_t sz);
+void
+pciesvc_mem_wr(const uint64_t pa, const void *buf, const size_t sz);
+void
+pciesvc_mem_barrier(void);
+
+void *
+pciesvc_memset(void *s, int c, size_t n);
+void *
+pciesvc_memcpy(void *dst, const void *src, size_t n);
+void *
+pciesvc_memcpy_toio(void *dsthw, const void *src, size_t n);
+
+void
+pciesvc_log(const char *msg);
+
+int
+pciesvc_event_handler(pciesvc_eventdata_t *evdata, const size_t evsize);
+
+void *
+pciesvc_shmem_get(void);
+
+int virtual(void);
+int cpuid(void);
+unsigned long release(void);
+long read_el(void);
+void kpcimgr_init_poll(kstate_t *ks);
+void pciesvc_debug_cmd(uint32_t *val);
+void kpcimgr_poll(kstate_t *ks, int index, int phase);
+
+/* functions in kpci_test.c */
+void kp_udelay(unsigned long us);
+int time_elapsed(unsigned long start, unsigned long elapsed);
+void _uart_write(unsigned char *reg, char c);
+void uart_write(kstate_t *ks, char c);
+int uart_read(kstate_t *ks, char *c);
+void uart_write_debug(kstate_t *ks, char c);
+void kdbg_puts(const char *s);
+void trigger_serr(int val);
+void kpcimgr_report_stats(kstate_t *ks, int phase, int always, int rightnow);
+
+/* functions in kpci_kexec.c */
+void set_kstate(kstate_t *ks);
+
+#endif /* __PCIESVC_SYSTEM_EXTERN_H__ */
diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/tools/reloc_check b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/tools/reloc_check
new file mode 100755
index 000000000..9c74736bb
--- /dev/null
+++ b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/tools/reloc_check
@@ -0,0 +1,78 @@
+#!/bin/bash
+
+relocs='R_AARCH64_ADR_PREL_PG_HI21|R_AARCH64_ADR_PREL_LO21|R_AARCH64_CALL26|R_AARCH64_JUMP26|LO12' 
+
+OBJDUMP=${CROSS_COMPILE}objdump
+tmp=/tmp/reloc_check$$
+trap "rm -f $tmp" EXIT
+
+$OBJDUMP --section=.text --section=.data --reloc $1 | grep '^000' >$tmp
+
+safe=yes
+num_relocs=$(wc -l $tmp | awk '{ print $1 }')
+echo Examining $num_relocs relocations
+cat $tmp | grep -vE "$relocs" |\
+ {
+     illegals=0
+     while read line
+     do
+	 echo Illegal relocation: $line
+	 ((illegals++))
+     done
+
+     if ((illegals>0))
+     then
+	 echo DO NOT PROCEED!
+	 exit 1
+     else
+	 echo No illegal relocations found
+	 exit 0
+     fi
+ }
+if [ $? != 0 ]
+then
+ safe=no
+fi
+
+# look for external symbol references
+
+nm -u $1  | grep -v mcount | awk '{ print $2 }' | 
+  {
+    read pattern
+    if [ "$pattern" != kpcimgr_module_register ]
+    then
+	echo Caution: found undesirable symbol $pattern
+    fi
+
+    while read symbol
+    do
+	pattern="$pattern|$symbol"
+	if [ "$symbol" != kpcimgr_module_register ]
+	then
+	  echo Caution: found undesirable symbol $symbol
+	fi
+    done
+    echo checking objects for any of these symbols: $pattern
+
+    nm kpci_entry.o kpcinterface.o pciesvc/src/*.o | grep -E $pattern >$tmp
+  }
+
+if [ -s $tmp ]
+then
+  echo Found external references:
+  cat $tmp
+  echo
+  echo DO NOT PROCEED!
+  safe=no
+else
+  echo No external references found
+fi
+
+
+if [ $safe = yes ]
+then
+  echo Safe to proceed.
+else
+  echo NOT safe to proceed.
+  rm -f $1
+fi
diff --git a/platform/pensando/dsc-drivers/systemd/ionic-modules.service b/platform/pensando/dsc-drivers/systemd/ionic-modules.service
new file mode 100644
index 000000000..892e6b926
--- /dev/null
+++ b/platform/pensando/dsc-drivers/systemd/ionic-modules.service
@@ -0,0 +1,12 @@
+[Unit]
+Description=Ionic kernel modules init
+After=local-fs.target
+
+[Service]
+Type=oneshot
+ExecStart=-/etc/init.d/ionic-modules start
+ExecStop=-/etc/init.d/ionic-modules stop
+RemainAfterExit=yes
+
+[Install]
+WantedBy=multi-user.target
diff --git a/platform/pensando/elba-asic-psci.dtb b/platform/pensando/elba-asic-psci.dtb
new file mode 100755
index 0000000000000000000000000000000000000000..c2400062d4907717c4d7dcdf0e032a4638a3babc
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diff --git a/platform/pensando/one-image.mk b/platform/pensando/one-image.mk
new file mode 100644
index 000000000..88558cc8d
--- /dev/null
+++ b/platform/pensando/one-image.mk
@@ -0,0 +1,17 @@
+# sonic centec one image installer
+
+SONIC_ONE_IMAGE = sonic-pensando.tar
+$(SONIC_ONE_IMAGE)_MACHINE = pensando
+$(SONIC_ONE_IMAGE)_IMAGE_TYPE = dsc
+
+$(SONIC_ONE_IMAGE)_INSTALLS += $(SYSTEMD_SONIC_GENERATOR)
+$(SONIC_ONE_IMAGE)_INSTALLS += $(DPU_MODULE)
+$(SONIC_ONE_IMAGE)_INSTALLS += $(IONIC_MODULE)
+
+ifeq ($(INSTALL_DEBUG_TOOLS),y)
+$(SONIC_ONE_IMAGE)_DOCKERS += $(SONIC_INSTALL_DOCKER_DBG_IMAGES)
+$(SONIC_ONE_IMAGE)_DOCKERS += $(filter-out $(patsubst %-$(DBG_IMAGE_MARK).gz,%.gz, $(SONIC_INSTALL_DOCKER_DBG_IMAGES)), $(SONIC_INSTALL_DOCKER_IMAGES))
+else
+$(SONIC_ONE_IMAGE)_DOCKERS = $(SONIC_INSTALL_DOCKER_IMAGES)
+endif
+SONIC_INSTALLERS += $(SONIC_ONE_IMAGE)
diff --git a/platform/pensando/platform.conf b/platform/pensando/platform.conf
new file mode 100644
index 000000000..b10f20e1c
--- /dev/null
+++ b/platform/pensando/platform.conf
@@ -0,0 +1,283 @@
+####### Pensando ########
+
+#!/bin/sh
+
+R=""
+export LD_LIBRARY_PATH=/platform/lib:/nic/lib:$LD_LIBRARY_PATH
+export PATH=/platform/bin:$PATH
+
+root_mnt=$R/mnt
+bl_conf_path=$root_mnt
+HOST=/host
+
+image_dir=image-$image_version
+
+INSTALLER_PAYLOAD=fs.zip
+DOCKERFS_DIR=docker
+FILESYSTEM_DOCKERFS=dockerfs.tar.gz
+BL_CONF=boot-$image_dir.conf
+
+DATA_PARTUUID=6ED62003-DD8D-44B8-9538-0A2B7C7E628F
+ROOT_PARTUUID=C7F48DD2-C265-404B-959D-C64D21D49168
+
+ROOT_PARTSIZE=24G
+
+exec 0< /dev/tty 1> /dev/tty 2> /dev/tty
+
+PKG=""
+ACTION=""
+
+root_pn=0
+data_pn=0
+
+REPART_NEEDED=0
+
+set -e
+
+fatal()
+{
+    echo "FATAL: $1" >&2
+    exit 1
+}
+
+check_existing_parts()
+{
+    local nparts i partuuid boot_partsize boot_lastsec data_firstsec
+
+    nparts=$(sgdisk -p /dev/mmcblk0 | grep '^[ ]*[1-9]' | wc -l)
+    for i in $(seq $nparts); do
+        partuuid=$(sgdisk -i $i /dev/mmcblk0 | awk '/Partition unique GUID/ { print $NF }')
+        case "$partuuid" in
+        $DATA_PARTUUID) data_pn=$i; ;;
+        $ROOT_PARTUUID) root_pn=$i; ;;
+        esac
+    done
+
+    if [ $root_pn -ne 0 ]; then
+        boot_partsize=$(sgdisk -i $root_pn /dev/mmcblk0 | awk -F '[( ]' '/Partition size/ {print int($6)}')
+        boot_lastsec=$(sgdisk -i $root_pn /dev/mmcblk0 | awk '/Last sector/ {print $3}')
+        if [ ${boot_partsize}G = $ROOT_PARTSIZE ]; then
+            echo "SONiC root partitions already present with requested size. No repartition, only formatting"
+        else
+            echo "SONiC root partitions already present with mismatch size ${partsize}G. Repartition needed"
+            REPART_NEEDED=1
+        fi
+    fi
+
+    if [ $data_pn -eq 0 ]; then
+        echo "Data partition not found; Repartition needed"
+        REPART_NEEDED=1
+    elif [ $data_pn -ne $nparts ]; then
+        fatal "Data partition is not the last partition; exiting." >&2
+    else
+        data_firstsec=$(sgdisk -i $data_pn /dev/mmcblk0 | awk '/First sector/ {print $3}')
+        if [ $data_firstsec -ne $((boot_lastsec+1)) ]; then
+            echo "Data partition not contigent with boot partition. Repartition needed"
+            REPART_NEEDED=1
+        fi
+    fi
+}
+
+setup_partitions_multi()
+{
+    echo "==> Setting up partitions..."
+
+    set +e
+    if [ $REPART_NEEDED -eq 0 ]; then
+        mkfs.ext4 -F -q /dev/mmcblk0p$root_pn >/dev/null
+    else
+
+        if [ $root_pn -ne 0 ]; then
+            sgdisk -d $root_pn /dev/mmcblk0 >/dev/null
+        fi
+        [ $data_pn -ne 0 ] && sgdisk -d $data_pn /dev/mmcblk0 >/dev/null
+
+        if [ $root_pn -eq 0 ]; then
+            root_pn=10
+            data_pn=$(($root_pn + 1))
+        fi
+
+        if [ $data_pn -eq 0 ]; then
+            data_pn=$(($root_pn + 1))
+        fi
+
+        sgdisk \
+            -n $root_pn:+0:+$ROOT_PARTSIZE -t $root_pn:8300 \
+            -u $root_pn:$ROOT_PARTUUID -c $root_pn:"SONiC Root Filesystem" \
+            -n $data_pn:+0:0 -t $data_pn:8300 -u $data_pn:$DATA_PARTUUID \
+            -c $data_pn:"Data Filesystem" \
+            /dev/mmcblk0 >/dev/null
+        sgdisk -U R /dev/mmcblk0 >/dev/null
+
+        while true; do
+            partprobe
+            if [ -e $R/dev/mmcblk0p$data_pn ]; then
+                break
+            fi
+            sleep 1
+        done
+
+        echo "==> Creating filesystems"
+        for i in $root_pn $data_pn; do
+            mkfs.ext4 -F -q /dev/mmcblk0p$i >/dev/null
+        done
+    fi
+    set -e
+}
+
+setup_partitions()
+{
+    setup_partitions_multi
+}
+
+cleanup()
+{
+    echo "==> Cleaning up residual files"
+    running_sonic_revision=`cat /etc/sonic/sonic_version.yml | grep build_version | awk -F \' '{print $2}'`
+    config_files=$(find /host -type f -name "boot*.conf" | grep -iv "$running_sonic_revision\|$image_dir" )
+    if [ -z $config_files ]; then
+        echo "No config files to remove"
+    else
+        echo "config files to remove are: $config_files"
+    fi
+    
+    for file in $config_files; do
+        if [ -f "$file" ]; then
+            echo "Removing file: $file"
+            rm "$file"
+        fi
+    done
+
+    faulty_image_dir=$(find /host -type d -name "image-*" | grep -iv "$running_sonic_revision\|$image_dir")
+    if [ -z $faulty_image_dir ]; then
+        echo "No faulty image directories to remove"
+    else
+        echo "Faulty image directories to remove are: $faulty_image_dir"
+    fi
+
+    for d in $faulty_image_dir; do
+        if [ -d "$d" ]; then
+            echo "Removing directory: $d"
+            rm -rfd "$d"
+        fi
+    done
+
+}
+
+create_bootloader_conf()
+{
+    echo "==> Create bootloader config"
+
+cat <<EOF >> $bl_conf_path/$BL_CONF
+default main
+
+label main
+	kernel /$image_dir/boot/vmlinuz-6.1.0-11-2-arm64
+	initrd /$image_dir/boot/initrd.img-6.1.0-11-2-arm64
+	devicetree /$image_dir/boot/elba-asic-psci.dtb
+	append softdog.soft_panic=1 FW_NAME=mainfwa root=/dev/mmcblk0p10 rw rootwait rootfstype=ext4 loopfstype=squashfs loop=/$image_dir/fs.squashfs
+}
+EOF
+}
+
+set_boot_command()
+{
+    local pn
+
+    echo "==> Setting u-boot environment for Debian Boot"
+    pn=$(printf "%x" $root_pn)
+
+    fw_setenv -f baudrate 115200
+    fw_setenv -f bootcmd 'test -n "$boot_once" && setenv do_boot_once "$boot_once" && setenv boot_once && saveenv && run do_boot_once; run boot_next'
+    fw_setenv -f bootdelay 0
+    fw_setenv -f fdt_addr_r bb100000
+    fw_setenv -f kernel_addr_r a0000000
+    fw_setenv -f kernel_comp_addr_r 88000000
+    fw_setenv -f kernel_comp_size 8000000
+    fw_setenv -f ramdisk_addr_r a4000000
+}
+
+set_sonic_env() {
+    echo "current env is $env"
+    BL_CONF_OLD=NONE
+    pn=$(printf "%x" $root_pn)
+    if [ "$install_env" = "onie" ]; then
+        echo "set sonic env onie"
+        fw_setenv -f linuxargs "${extra_cmdline_linux}"
+        fw_setenv -f sonic_image_1 "sysboot mmc 0:$pn any bf000000 /$BL_CONF"
+        fw_setenv -f sonic_image_2 "NONE"
+        fw_setenv -f sonic_dir_1 $image_dir
+        fw_setenv -f sonic_dir_2 "NONE"
+        fw_setenv -f sonic_version_1 `echo $image_dir | sed "s/^image-/SONiC-OS-/g"`
+        fw_setenv -f sonic_version_2 "NONE"
+
+        fw_setenv -f boot_next "run sonic_image_1"
+    else
+        check_existing_parts
+        pn=$(printf "%x" $root_pn)
+        running_sonic_revision=`cat /etc/sonic/sonic_version.yml | grep build_version | awk -F \' '{print $2}'`
+        SONIC_IMAGE_MAX=2
+        idx=0
+        for i in $(seq 1 $SONIC_IMAGE_MAX); do
+            if [ "`fw_printenv sonic_version_$i 2>/dev/null | awk -F = '{print $2}'`" != "SONiC-OS-$running_sonic_revision" ]; then
+                idx=$i
+                break
+            fi
+        done
+
+        fw_setenv linuxargs "${extra_cmdline_linux}"
+        fw_setenv sonic_image_$idx "sysboot mmc 0:$pn any bf000000 /$BL_CONF"
+        fw_setenv sonic_dir_$idx $image_dir
+        fw_setenv sonic_version_$idx `echo $image_dir | sed "s/^image-/SONiC-OS-/g"`
+
+        fw_setenv boot_next "run sonic_image_$idx"
+
+        cleanup
+    fi
+}
+
+
+
+########################################################################################################################
+
+prepare_boot_menu() {
+    echo "Sync up cache ..."
+    sync
+    echo "Setting up U-Boot environment..."
+    if [ "$install_env" = "onie" ]; then
+        bl_conf_path=$root_mnt
+    else
+        bl_conf_path=$HOST
+    fi
+    file=$bl_conf_path/$BL_CONF
+    if [ -f "$file" ]; then
+        rm "$file"
+    fi
+    create_bootloader_conf
+    MTD_UBOOTENV=$(cat /proc/mtd | grep -e 'ubootenv' | awk '{print $1}' | tr -dc '0-9')
+    FW_ENV_DEFAULT="/dev/mtd$MTD_UBOOTENV 0x0 0x1000 0x10000"
+    echo $FW_ENV_DEFAULT > /etc/fw_env.config
+    set_boot_command
+    set_sonic_env
+}
+
+create_partition() {
+    check_existing_parts
+    setup_partitions
+}
+
+mount_partition() {
+    demo_mnt=$root_mnt
+    mounted=$(mount | grep "/dev/mmcblk0p$root_pn on $demo_mnt type ext4" | wc -l)
+    if [ $mounted -eq 0 ]; then
+        mount /dev/mmcblk0p$root_pn $demo_mnt
+    fi
+}
+
+bootloader_menu_config() {
+    # Update uboot Environment
+    prepare_boot_menu
+    if [ "$install_env" = "onie" ]; then
+        chmod -x /bin/onie-nos-mode
+    fi
+}
diff --git a/platform/pensando/rules.mk b/platform/pensando/rules.mk
new file mode 100644
index 000000000..4af757c3a
--- /dev/null
+++ b/platform/pensando/rules.mk
@@ -0,0 +1,16 @@
+include $(PLATFORM_PATH)/docker-dpu-base.mk
+include $(PLATFORM_PATH)/docker-dpu.mk
+include $(PLATFORM_PATH)/one-image.mk
+include $(PLATFORM_PATH)/sdk.mk
+include $(PLATFORM_PATH)/docker-syncd-pensando.mk
+include $(PLATFORM_PATH)/dsc-drivers.mk
+
+SONIC_ALL += $(SONIC_ONE_IMAGE) \
+             $(DOCKER_FPM)
+
+# Inject pensando sai into syncd
+$(SYNCD)_DEPENDS += $(PENSANDO_SAI)
+$(SYNCD)_UNINSTALLS += $(PENSANDO_SAI)
+
+#Runtime dependency on pensando sai is set only for syncd
+$(SYNCD)_RDEPENDS += $(PENSANDO_SAI)
diff --git a/platform/pensando/sdk.mk b/platform/pensando/sdk.mk
new file mode 100644
index 000000000..072ac893b
--- /dev/null
+++ b/platform/pensando/sdk.mk
@@ -0,0 +1,10 @@
+# Pensando SAI
+PENSANDO_SAI = libsai_1.10.1-0_arm64.deb
+PENSANDO_SAI_DEV = libsai-dev_1.10.1-0_arm64.deb
+$(PENSANDO_SAI)_URL = https://github.com/pensando/dsc-artifacts/blob/main/libsai_1.10.1-0_arm64.deb?raw=true
+$(PENSANDO_SAI_DEV)_URL = https://github.com/pensando/dsc-artifacts/blob/main/libsai-dev_1.10.1-0_arm64.deb?raw=true
+
+$(eval $(call add_conflict_package,$(PENSANDO_SAI_DEV),$(LIBSAIVS_DEV)))
+
+SONIC_ONLINE_DEBS += $(PENSANDO_SAI)
+SONIC_ONLINE_DEBS += $(PENSANDO_SAI_DEV)
diff --git a/scripts/prepare_docker_buildinfo.sh b/scripts/prepare_docker_buildinfo.sh
index 0ee79c201..6dfd63bdd 100755
--- a/scripts/prepare_docker_buildinfo.sh
+++ b/scripts/prepare_docker_buildinfo.sh
@@ -1,5 +1,7 @@
 #!/bin/bash
 
+grep "^# SKIP_HOOK" $2 && exit 0
+
 [[ ! -z "${DBGOPT}" && $0 =~ ${DBGOPT} ]] && set -x
 
 BUILDINFO_BASE=/usr/local/share/buildinfo
diff --git a/slave.mk b/slave.mk
index 92103b5e2..c8dc936b1 100644
--- a/slave.mk
+++ b/slave.mk
@@ -1086,6 +1086,16 @@ $(foreach IMAGE,$(DOCKER_IMAGES), $(eval $(IMAGE)_FILES_PATH := $(FILES_PATH)))
 $(foreach IMAGE,$(DOCKER_DBG_IMAGES), $(eval $(IMAGE)_DEBS_PATH := $(DEBS_PATH)))
 $(foreach IMAGE,$(DOCKER_DBG_IMAGES), $(eval $(IMAGE)_FILES_PATH := $(FILES_PATH)))
 
+# Targets for downloaded docker images
+$(addprefix $(TARGET_PATH)/,$(DOWNLOADED_DOCKER_IMAGES)) : $(TARGET_PATH)/%.gz : .platform \
+		$$(%.gz_DEP_FILES)
+	$(HEADER)
+
+	rm -rf $@ $@.log
+	wget "$($*.gz_URL)" -O target/$(DOWNLOADED_DOCKER_IMAGES) $(LOG)
+
+	$(FOOTER)
+
 # Targets for building docker images
 $(addprefix $(TARGET_PATH)/, $(DOCKER_IMAGES)) : $(TARGET_PATH)/%.gz : .platform docker-start \
 		$$(addprefix $$($$*.gz_DEBS_PATH)/,$$($$*.gz_DEPENDS)) \
@@ -1141,7 +1151,7 @@ $(addprefix $(TARGET_PATH)/, $(DOCKER_IMAGES)) : $(TARGET_PATH)/%.gz : .platform
 		DBGOPT='$(DBGOPT)' \
 		scripts/prepare_docker_buildinfo.sh $* $($*.gz_PATH)/Dockerfile $(CONFIGURED_ARCH) $(LOG)
 		docker info $(LOG)
-		docker build --squash --no-cache \
+		docker build --no-cache $$( [[ "$($*.gz_SQUASH)" != n ]] && echo --squash)\
 			--build-arg http_proxy=$(HTTP_PROXY) \
 			--build-arg https_proxy=$(HTTPS_PROXY) \
 			--build-arg no_proxy=$(NO_PROXY) \
@@ -1245,6 +1255,7 @@ SONIC_TARGET_LIST += $(addprefix $(TARGET_PATH)/, $(DOCKER_DBG_IMAGES))
 
 DOCKER_LOAD_TARGETS = $(addsuffix -load,$(addprefix $(TARGET_PATH)/, \
 		      $(SONIC_SIMPLE_DOCKER_IMAGES) \
+		      $(DOWNLOADED_DOCKER_IMAGES) \
 		      $(DOCKER_IMAGES) \
 		      $(DOCKER_DBG_IMAGES)))
 
diff --git a/sonic-slave-buster/Dockerfile.j2 b/sonic-slave-buster/Dockerfile.j2
index bb1ec2c97..2d582f659 100644
--- a/sonic-slave-buster/Dockerfile.j2
+++ b/sonic-slave-buster/Dockerfile.j2
@@ -347,6 +347,7 @@ RUN apt-get update && apt-get install -y eatmydata && eatmydata apt-get install
 # For SAI3.7
         protobuf-compiler \
         libprotobuf-dev \
+        libgrpc++-dev \
         xxd \
 # For DHCP Monitor tool
         libexplain-dev \

From 2c50f8566ce8d476a38599b95bda13c387415929 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Tue, 5 Dec 2023 16:34:33 +0800
Subject: [PATCH 0015/1115] [submodule] Update submodule sonic-platform-common
 to the latest HEAD automatically (#17407)

#### Why I did it
src/sonic-platform-common
```
* d09e009 - (HEAD -> master, origin/master, origin/HEAD) APIs to help in finding NPU SI settings (#410) (18 minutes ago) [mihirpat1]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-platform-common | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-platform-common b/src/sonic-platform-common
index 036b2fc7b..d09e009dc 160000
--- a/src/sonic-platform-common
+++ b/src/sonic-platform-common
@@ -1 +1 @@
-Subproject commit 036b2fc7b5200e107d25b49418a38dac69465341
+Subproject commit d09e009dc240ffcf1234f8aa75a0bf640431bdb3

From c02c8f0cc36f4a2c7638d1911678acc8c2a8b91a Mon Sep 17 00:00:00 2001
From: Junchao-Mellanox <57339448+Junchao-Mellanox@users.noreply.github.com>
Date: Tue, 5 Dec 2023 23:52:38 +0800
Subject: [PATCH 0016/1115] [Mellanox] remove log in RAM kernel option for 2700
 A1 platform (#17254)

- Why I did it
Remove logs_inram kernel option

- How I did it
Remove logs_inram kernel option

- How to verify it
SONiC mgmt regression test of 202305
---
 device/mellanox/x86_64-mlnx_msn2700a1-r0/installer.conf | 1 -
 1 file changed, 1 deletion(-)
 delete mode 100644 device/mellanox/x86_64-mlnx_msn2700a1-r0/installer.conf

diff --git a/device/mellanox/x86_64-mlnx_msn2700a1-r0/installer.conf b/device/mellanox/x86_64-mlnx_msn2700a1-r0/installer.conf
deleted file mode 100644
index 580aa1fe4..000000000
--- a/device/mellanox/x86_64-mlnx_msn2700a1-r0/installer.conf
+++ /dev/null
@@ -1 +0,0 @@
-ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="logs_inram=on"
\ No newline at end of file

From 26bf38b6103bcf9f400ed0dab92f4ffffb718c41 Mon Sep 17 00:00:00 2001
From: Junchao-Mellanox <57339448+Junchao-Mellanox@users.noreply.github.com>
Date: Wed, 6 Dec 2023 02:27:29 +0800
Subject: [PATCH 0017/1115] [Mellanox] Provide default implementation for sfp
 error description when CMIS host management is enabled (#17294)

- Why I did it
Provide a dummy implementation for SFP error description when CMIS host management is enabled. A future feature shall be raised to implement SFP error description for such mode.

- How I did it
if SFP is under software control, provide "Not supported" as error description
if SFP is under initialization, provide "Initializing" as error description

- How to verify it
unit test
---
 .../sonic_platform/device_data.py             |  9 +++++
 .../mlnx-platform-api/sonic_platform/sfp.py   | 22 +++++++++++
 .../mlnx-platform-api/sonic_platform/utils.py | 35 ++++++++++++++---
 .../tests/test_device_data.py                 |  9 +++++
 .../mlnx-platform-api/tests/test_sfp.py       | 38 ++++++++++++++++++-
 .../mlnx-platform-api/tests/test_utils.py     |  3 ++
 6 files changed, 109 insertions(+), 7 deletions(-)

diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/device_data.py b/platform/mellanox/mlnx-platform-api/sonic_platform/device_data.py
index 84d1706e1..8ffb2afed 100644
--- a/platform/mellanox/mlnx-platform-api/sonic_platform/device_data.py
+++ b/platform/mellanox/mlnx-platform-api/sonic_platform/device_data.py
@@ -234,3 +234,12 @@ def get_cpld_component_list(cls):
             # Currently, only fetching BIOS version is supported
             return ComponentCPLDSN2201.get_component_list()
         return ComponentCPLD.get_component_list()
+
+    @classmethod
+    @utils.read_only_cache()
+    def is_independent_mode(cls):
+        from sonic_py_common import device_info
+        _, hwsku_dir = device_info.get_paths_to_platform_and_hwsku_dirs()
+        sai_profile_file = os.path.join(hwsku_dir, 'sai.profile')
+        data = utils.read_key_value_file(sai_profile_file, delimeter='=')
+        return data.get('SAI_INDEPENDENT_MODULE_MODE') == '1'
diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py b/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py
index a4dd7a8fc..4b5c9bf4e 100644
--- a/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py
+++ b/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py
@@ -139,6 +139,7 @@
 SFP_SYSFS_STATUS_ERROR = 'statuserror'
 SFP_SYSFS_PRESENT = 'present'
 SFP_SYSFS_RESET = 'reset'
+SFP_SYSFS_HWRESET = 'hw_reset'
 SFP_SYSFS_POWER_MODE = 'power_mode'
 SFP_SYSFS_POWER_MODE_POLICY = 'power_mode_policy'
 POWER_MODE_POLICY_HIGH = 1
@@ -638,6 +639,12 @@ def get_error_description(self):
         Returns:
             The error description
         """
+        try:
+            if self.is_sw_control():
+                return 'Not supported'
+        except:
+            return self.SFP_STATUS_INITIALIZING
+
         oper_status, error_code = self._get_module_info(self.sdk_index)
         if oper_status == SX_PORT_MODULE_STATUS_INITIALIZING:
             error_description = self.SFP_STATUS_INITIALIZING
@@ -792,6 +799,21 @@ def get_xcvr_api(self):
                 self._xcvr_api.get_tx_fault = self.get_tx_fault
         return self._xcvr_api
 
+    def is_sw_control(self):
+        if not DeviceDataManager.is_independent_mode():
+            return False
+
+        db = utils.DbUtils.get_db_instance('STATE_DB')
+        control_type = db.get('STATE_DB', f'TRANSCEIVER_MODULES_MGMT|{self.sdk_index}', 'control_type')
+        control_file_value = utils.read_int_from_file(f'/sys/module/sx_core/asic0/module{self.sdk_index}/control')
+
+        if control_type == 'SW_CONTROL' and control_file_value == 1:
+            return True
+        elif control_type == 'FW_CONTROL' and control_file_value == 0:
+            return False
+        else:
+            raise Exception(f'Module {self.sdk_index} is in initialization, please retry later')
+
 
 class RJ45Port(NvidiaSFPCommon):
     """class derived from SFP, representing RJ45 ports"""
diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/utils.py b/platform/mellanox/mlnx-platform-api/sonic_platform/utils.py
index 83063b5c3..51e9bc7f0 100644
--- a/platform/mellanox/mlnx-platform-api/sonic_platform/utils.py
+++ b/platform/mellanox/mlnx-platform-api/sonic_platform/utils.py
@@ -1,5 +1,5 @@
 #
-# Copyright (c) 2020-2021 NVIDIA CORPORATION & AFFILIATES.
+# Copyright (c) 2020-2023 NVIDIA CORPORATION & AFFILIATES.
 # Apache-2.0
 #
 # Licensed under the Apache License, Version 2.0 (the "License");
@@ -19,6 +19,7 @@
 import subprocess
 import json
 import sys
+import threading
 import time
 import os
 from sonic_py_common import device_info
@@ -100,15 +101,15 @@ def read_float_from_file(file_path, default=0.0, raise_exception=False, log_func
     return read_from_file(file_path=file_path, target_type=float, default=default, raise_exception=raise_exception, log_func=log_func)
 
 
-def _key_value_converter(content):
+def _key_value_converter(content, delimeter):
     ret = {}
     for line in content.splitlines():
-        k,v = line.split(':')
+        k,v = line.split(delimeter)
         ret[k.strip()] = v.strip()
     return ret
 
 
-def read_key_value_file(file_path, default={}, raise_exception=False, log_func=logger.log_error):
+def read_key_value_file(file_path, default={}, raise_exception=False, log_func=logger.log_error, delimeter=':'):
     """Read file content and parse the content to a dict. The file content should like:
        key1:value1
        key2:value2
@@ -119,7 +120,8 @@ def read_key_value_file(file_path, default={}, raise_exception=False, log_func=l
         raise_exception (bool, optional): If exception should be raised or hiden. Defaults to False.
         log_func (optional): logger function.. Defaults to logger.log_error.
     """
-    return read_from_file(file_path=file_path, target_type=_key_value_converter, default=default, raise_exception=raise_exception, log_func=log_func)
+    converter = lambda content: _key_value_converter(content, delimeter)
+    return read_from_file(file_path=file_path, target_type=converter, default=default, raise_exception=raise_exception, log_func=log_func)
 
 
 def write_file(file_path, content, raise_exception=False, log_func=logger.log_error):
@@ -285,3 +287,26 @@ def wait_until(predict, timeout, interval=1, *args, **kwargs):
         time.sleep(interval)
         timeout -= interval
     return False
+
+
+class DbUtils:
+    lock = threading.Lock()
+    db_instances = threading.local()
+
+    @classmethod
+    def get_db_instance(cls, db_name, **kargs):
+        try:
+            if not hasattr(cls.db_instances, 'data'):
+                with cls.lock:
+                    if not hasattr(cls.db_instances, 'data'):
+                        cls.db_instances.data = {}
+
+            if db_name not in cls.db_instances.data:
+                from swsscommon.swsscommon import SonicV2Connector
+                db = SonicV2Connector(use_unix_socket_path=True)
+                db.connect(db_name)
+                cls.db_instances.data[db_name] = db
+            return cls.db_instances.data[db_name]
+        except Exception as e:
+            logger.log_error(f'Failed to get DB instance for DB {db_name} - {e}')
+            raise e
diff --git a/platform/mellanox/mlnx-platform-api/tests/test_device_data.py b/platform/mellanox/mlnx-platform-api/tests/test_device_data.py
index d99591d51..866f01c3e 100644
--- a/platform/mellanox/mlnx-platform-api/tests/test_device_data.py
+++ b/platform/mellanox/mlnx-platform-api/tests/test_device_data.py
@@ -52,5 +52,14 @@ def test_get_linecard_max_port_count(self):
     def test_get_bios_component(self):
         assert DeviceDataManager.get_bios_component() is not None
 
+    @mock.patch('sonic_py_common.device_info.get_paths_to_platform_and_hwsku_dirs', mock.MagicMock(return_value=('', '/tmp')))
+    @mock.patch('sonic_platform.device_data.utils.read_key_value_file')
+    def test_is_independent_mode(self, mock_read):
+        mock_read.return_value = {}
+        assert not DeviceDataManager.is_independent_mode()
+        mock_read.return_value = {'SAI_INDEPENDENT_MODULE_MODE': '1'}
+        assert DeviceDataManager.is_independent_mode()
+
+
 
 
diff --git a/platform/mellanox/mlnx-platform-api/tests/test_sfp.py b/platform/mellanox/mlnx-platform-api/tests/test_sfp.py
index b9edc6838..d0805a0d6 100644
--- a/platform/mellanox/mlnx-platform-api/tests/test_sfp.py
+++ b/platform/mellanox/mlnx-platform-api/tests/test_sfp.py
@@ -54,17 +54,18 @@ def test_sfp_index(self, mock_max_port):
         assert sfp.sdk_index == 1
         assert sfp.index == 5
 
+    @mock.patch('sonic_platform.sfp.SFP.is_sw_control')
     @mock.patch('sonic_platform.sfp.SFP.read_eeprom', mock.MagicMock(return_value=None))
     @mock.patch('sonic_platform.sfp.SFP.shared_sdk_handle', mock.MagicMock(return_value=2))
     @mock.patch('sonic_platform.sfp.SFP._get_module_info')
     @mock.patch('sonic_platform.chassis.Chassis.get_num_sfps', mock.MagicMock(return_value=2))
     @mock.patch('sonic_platform.chassis.extract_RJ45_ports_index', mock.MagicMock(return_value=[]))
-    def test_sfp_get_error_status(self, mock_get_error_code):
+    def test_sfp_get_error_status(self, mock_get_error_code, mock_control):
         chassis = Chassis()
 
         # Fetch an SFP module to test
         sfp = chassis.get_sfp(1)
-
+        mock_control.return_value = False
         description_dict = sfp._get_error_description_dict()
         for error in description_dict.keys():
             mock_get_error_code.return_value = (SX_PORT_MODULE_STATUS_PLUGGED_WITH_ERROR, error)
@@ -88,6 +89,14 @@ def test_sfp_get_error_status(self, mock_get_error_code):
 
             assert description == expected_description
 
+        mock_control.return_value = True
+        description = sfp.get_error_description()
+        assert description == 'Not supported'
+
+        mock_control.side_effect = RuntimeError('')
+        description = sfp.get_error_description()
+        assert description == 'Initializing'
+
     @mock.patch('sonic_platform.sfp.SFP._get_page_and_page_offset')
     @mock.patch('sonic_platform.sfp.SFP._is_write_protected')
     def test_sfp_write_eeprom(self, mock_limited_eeprom, mock_get_page):
@@ -278,6 +287,31 @@ def test_rj45_basic(self):
         assert sfp.get_transceiver_threshold_info()
         sfp.reinit()
 
+    @mock.patch('sonic_platform.utils.read_int_from_file')
+    @mock.patch('sonic_platform.device_data.DeviceDataManager.is_independent_mode')
+    @mock.patch('sonic_platform.utils.DbUtils.get_db_instance')
+    def test_is_sw_control(self, mock_get_db, mock_mode, mock_read):
+        sfp = SFP(0)
+        mock_mode.return_value = False
+        assert not sfp.is_sw_control()
+        mock_mode.return_value = True
+
+        mock_db = mock.MagicMock()
+        mock_get_db.return_value = mock_db
+        mock_db.get = mock.MagicMock(return_value=None)
+        with pytest.raises(Exception):
+            sfp.is_sw_control()
+
+        mock_read.return_value = 0
+        mock_db.get.return_value = 'FW_CONTROL'
+        assert not sfp.is_sw_control()
+        mock_read.return_value = 1
+        mock_db.get.return_value = 'SW_CONTROL'
+        assert sfp.is_sw_control()
+        mock_read.return_value = 0
+        with pytest.raises(Exception):
+            sfp.is_sw_control()
+
     @mock.patch('sonic_platform.utils.is_host', mock.MagicMock(side_effect = [True, True, False, False]))
     @mock.patch('subprocess.check_output', mock.MagicMock(side_effect = ['True', 'False']))
     @mock.patch('sonic_platform.sfp.SFP._get_lpmode', mock.MagicMock(side_effect = [True, False]))
diff --git a/platform/mellanox/mlnx-platform-api/tests/test_utils.py b/platform/mellanox/mlnx-platform-api/tests/test_utils.py
index ad474433b..04b00f82f 100644
--- a/platform/mellanox/mlnx-platform-api/tests/test_utils.py
+++ b/platform/mellanox/mlnx-platform-api/tests/test_utils.py
@@ -191,3 +191,6 @@ def test_read_key_value_file(self):
         mock_os_open = mock.mock_open(read_data='a:b')
         with mock.patch('sonic_platform.utils.open', mock_os_open):
             assert utils.read_key_value_file('some_file') == {'a':'b'}
+        mock_os_open = mock.mock_open(read_data='a=b')
+        with mock.patch('sonic_platform.utils.open', mock_os_open):
+            assert utils.read_key_value_file('some_file', delimeter='=') == {'a':'b'}

From 164916681aa9cad37e32b983e54bb85da9960464 Mon Sep 17 00:00:00 2001
From: Hua Liu <58683130+liuh-80@users.noreply.github.com>
Date: Wed, 6 Dec 2023 03:51:56 +0800
Subject: [PATCH 0018/1115] Fix can't access IPV6 address via management
 interface because 'default' route table does not add to route lookup issue.
 (#17281)

Fix can't access IPV6 address via management interface because 'default' route table does not add to route lookup issue.

#### Why I did it
When device set with IPV6 TACACS server address, and shutdown all BGP, device can't connect to TACACS server via management interface.

After investigation, I found the IPV6 'default' route table does not add to route lookup:

admin@vlab-01:~$ ip -6 rule list
1001:   from all lookup local
32765:  from fec0::ffff:afa:1 lookup default
32766:  from all lookup main
admin@vlab-01:~$

As compare:
admin@vlab-01:~$ ip -4 rule list
1001:   from all lookup local
32764:  from all to 172.17.0.1/24 lookup default
32765:  from 10.250.0.101 lookup default
32766:  from all lookup main
32767:  from all lookup default <== 'default' route table exist in IPV4 route lookup

Issue fix by add 'default' route table to route lookup with following command:
admin@vlab-01:~$ sudo ip -6 rule add pref 32767 lookup default
admin@vlab-01:~$ ip -6 rule list
1001:   from all lookup local
32765:  from fec0::ffff:afa:1 lookup default
32766:  from all lookup main
32767:  from all lookup default <== 'default' route table been added to IPV6 route lookup
admin@vlab-01:~$

##### Work item tracking
- Microsoft ADO: 25798732

#### How I did it
When management interface using 'default' route table, add 'default' route table to IPV6 route lookup.

#### How to verify it
Pass all UT.
Add new UT to cover this change.
Manually verify issue fixed:

### Tested branch (Please provide the tested image version)

- [x]  master-17281.417570-2133d58fa

#### Description for the changelog
Fix can't access IPV6 address via management interface because 'default' route table does not add to route lookup issue.
---
 files/image_config/interfaces/interfaces.j2      | 16 ++++++++++++----
 .../tests/sample_output/py2/interfaces           |  3 +++
 .../tests/sample_output/py2/two_mgmt_interfaces  |  6 ++++++
 .../tests/sample_output/py3/interfaces           |  3 +++
 .../tests/sample_output/py3/two_mgmt_interfaces  |  6 ++++++
 5 files changed, 30 insertions(+), 4 deletions(-)

diff --git a/files/image_config/interfaces/interfaces.j2 b/files/image_config/interfaces/interfaces.j2
index b39331f45..3702eb1f6 100644
--- a/files/image_config/interfaces/interfaces.j2
+++ b/files/image_config/interfaces/interfaces.j2
@@ -79,21 +79,29 @@ iface {{ name }} {{ 'inet' if prefix | ipv4 else 'inet6' }} static
 {%     set vrf_table = '5000' %}
     vrf mgmt
 {% endif %}
+{% set force_mgmt_route_priority = 32764 %}
     ########## management network policy routing rules
     # management port up rules
     up ip {{ '-4' if prefix | ipv4 else '-6' }} route add default via {{ MGMT_INTERFACE[(name, prefix)]['gwaddr'] }} dev {{ name }} table {{ vrf_table }} metric 201
     up ip {{ '-4' if prefix | ipv4 else '-6' }} route add {{ prefix | network }}/{{ prefix | prefixlen }} dev {{ name }} table {{ vrf_table }}
-    up ip {{ '-4' if prefix | ipv4 else '-6' }} rule add pref 32765 from {{ prefix | ip }}/{{ '32' if prefix | ipv4 else '128' }} table {{ vrf_table }}
+    up ip {{ '-4' if prefix | ipv4 else '-6' }} rule add pref {{ force_mgmt_route_priority + 1 }} from {{ prefix | ip }}/{{ '32' if prefix | ipv4 else '128' }} table {{ vrf_table }}
 {% for route in MGMT_INTERFACE[(name, prefix)]['forced_mgmt_routes'] %}
-    up ip rule add pref 32764 to {{ route }} table {{ vrf_table }}
+    up ip rule add pref {{ force_mgmt_route_priority }} to {{ route }} table {{ vrf_table }}
 {% endfor %}
+{% if prefix | ipv6 and vrf_table == 'default'%}
+    # IPV6 default table not add to lookup by default, management server need this to access IPV6 address when BGP shutdown
+    up ip -6 rule add pref {{ force_mgmt_route_priority + 3 }} lookup {{ vrf_table }}
+{% endif %}
     # management port down rules
     pre-down ip {{ '-4' if prefix | ipv4 else '-6' }} route delete default via {{ MGMT_INTERFACE[(name, prefix)]['gwaddr'] }} dev {{ name }} table {{ vrf_table }}
     pre-down ip {{ '-4' if prefix | ipv4 else '-6' }} route delete {{ prefix | network }}/{{ prefix | prefixlen }} dev {{ name }} table {{ vrf_table }}
-    pre-down ip {{ '-4' if prefix | ipv4 else '-6' }} rule delete pref 32765 from {{ prefix | ip }}/{{ '32' if prefix | ipv4 else '128' }} table {{ vrf_table }}
+    pre-down ip {{ '-4' if prefix | ipv4 else '-6' }} rule delete pref {{ force_mgmt_route_priority + 1 }} from {{ prefix | ip }}/{{ '32' if prefix | ipv4 else '128' }} table {{ vrf_table }}
 {% for route in MGMT_INTERFACE[(name, prefix)]['forced_mgmt_routes'] %}
-    pre-down ip rule delete pref 32764 to {{ route }} table {{ vrf_table }}
+    pre-down ip rule delete pref {{ force_mgmt_route_priority }} to {{ route }} table {{ vrf_table }}
 {% endfor %}
+{% if prefix | ipv6 and vrf_table == 'default'%}
+    pre-down ip -6 rule delete pref {{ force_mgmt_route_priority + 3 }} lookup {{ vrf_table }}
+{% endif %}
 {# TODO: COPP policy type rules #}
 {% endfor %}
 {% else %}
diff --git a/src/sonic-config-engine/tests/sample_output/py2/interfaces b/src/sonic-config-engine/tests/sample_output/py2/interfaces
index 90aadce5f..15d5f8426 100644
--- a/src/sonic-config-engine/tests/sample_output/py2/interfaces
+++ b/src/sonic-config-engine/tests/sample_output/py2/interfaces
@@ -38,10 +38,13 @@ iface eth0 inet6 static
     up ip -6 route add default via 2603:10e2:0:2902::1 dev eth0 table default metric 201
     up ip -6 route add 2603:10e2:0:2902::/64 dev eth0 table default
     up ip -6 rule add pref 32765 from 2603:10e2:0:2902::8/128 table default
+    # IPV6 default table not add to lookup by default, management server need this to access IPV6 address when BGP shutdown
+    up ip -6 rule add pref 32767 lookup default
     # management port down rules
     pre-down ip -6 route delete default via 2603:10e2:0:2902::1 dev eth0 table default
     pre-down ip -6 route delete 2603:10e2:0:2902::/64 dev eth0 table default
     pre-down ip -6 rule delete pref 32765 from 2603:10e2:0:2902::8/128 table default
+    pre-down ip -6 rule delete pref 32767 lookup default
 #
 source /etc/network/interfaces.d/*
 #
diff --git a/src/sonic-config-engine/tests/sample_output/py2/two_mgmt_interfaces b/src/sonic-config-engine/tests/sample_output/py2/two_mgmt_interfaces
index 319f25c4e..1b46be4bc 100644
--- a/src/sonic-config-engine/tests/sample_output/py2/two_mgmt_interfaces
+++ b/src/sonic-config-engine/tests/sample_output/py2/two_mgmt_interfaces
@@ -53,10 +53,13 @@ iface eth1 inet6 static
     up ip -6 route add default via 2603:10e2:0:abcd::1 dev eth1 table default metric 201
     up ip -6 route add 2603:10e2:0:abcd::/64 dev eth1 table default
     up ip -6 rule add pref 32765 from 2603:10e2:0:abcd::8/128 table default
+    # IPV6 default table not add to lookup by default, management server need this to access IPV6 address when BGP shutdown
+    up ip -6 rule add pref 32767 lookup default
     # management port down rules
     pre-down ip -6 route delete default via 2603:10e2:0:abcd::1 dev eth1 table default
     pre-down ip -6 route delete 2603:10e2:0:abcd::/64 dev eth1 table default
     pre-down ip -6 rule delete pref 32765 from 2603:10e2:0:abcd::8/128 table default
+    pre-down ip -6 rule delete pref 32767 lookup default
 iface eth0 inet6 static
     address 2603:10e2:0:2902::8
     netmask 64
@@ -67,10 +70,13 @@ iface eth0 inet6 static
     up ip -6 route add default via 2603:10e2:0:2902::1 dev eth0 table default metric 201
     up ip -6 route add 2603:10e2:0:2902::/64 dev eth0 table default
     up ip -6 rule add pref 32765 from 2603:10e2:0:2902::8/128 table default
+    # IPV6 default table not add to lookup by default, management server need this to access IPV6 address when BGP shutdown
+    up ip -6 rule add pref 32767 lookup default
     # management port down rules
     pre-down ip -6 route delete default via 2603:10e2:0:2902::1 dev eth0 table default
     pre-down ip -6 route delete 2603:10e2:0:2902::/64 dev eth0 table default
     pre-down ip -6 rule delete pref 32765 from 2603:10e2:0:2902::8/128 table default
+    pre-down ip -6 rule delete pref 32767 lookup default
 #
 source /etc/network/interfaces.d/*
 #
diff --git a/src/sonic-config-engine/tests/sample_output/py3/interfaces b/src/sonic-config-engine/tests/sample_output/py3/interfaces
index 90aadce5f..15d5f8426 100644
--- a/src/sonic-config-engine/tests/sample_output/py3/interfaces
+++ b/src/sonic-config-engine/tests/sample_output/py3/interfaces
@@ -38,10 +38,13 @@ iface eth0 inet6 static
     up ip -6 route add default via 2603:10e2:0:2902::1 dev eth0 table default metric 201
     up ip -6 route add 2603:10e2:0:2902::/64 dev eth0 table default
     up ip -6 rule add pref 32765 from 2603:10e2:0:2902::8/128 table default
+    # IPV6 default table not add to lookup by default, management server need this to access IPV6 address when BGP shutdown
+    up ip -6 rule add pref 32767 lookup default
     # management port down rules
     pre-down ip -6 route delete default via 2603:10e2:0:2902::1 dev eth0 table default
     pre-down ip -6 route delete 2603:10e2:0:2902::/64 dev eth0 table default
     pre-down ip -6 rule delete pref 32765 from 2603:10e2:0:2902::8/128 table default
+    pre-down ip -6 rule delete pref 32767 lookup default
 #
 source /etc/network/interfaces.d/*
 #
diff --git a/src/sonic-config-engine/tests/sample_output/py3/two_mgmt_interfaces b/src/sonic-config-engine/tests/sample_output/py3/two_mgmt_interfaces
index 490a27366..4be6dcd5d 100644
--- a/src/sonic-config-engine/tests/sample_output/py3/two_mgmt_interfaces
+++ b/src/sonic-config-engine/tests/sample_output/py3/two_mgmt_interfaces
@@ -39,10 +39,13 @@ iface eth0 inet6 static
     up ip -6 route add default via 2603:10e2:0:2902::1 dev eth0 table default metric 201
     up ip -6 route add 2603:10e2:0:2902::/64 dev eth0 table default
     up ip -6 rule add pref 32765 from 2603:10e2:0:2902::8/128 table default
+    # IPV6 default table not add to lookup by default, management server need this to access IPV6 address when BGP shutdown
+    up ip -6 rule add pref 32767 lookup default
     # management port down rules
     pre-down ip -6 route delete default via 2603:10e2:0:2902::1 dev eth0 table default
     pre-down ip -6 route delete 2603:10e2:0:2902::/64 dev eth0 table default
     pre-down ip -6 rule delete pref 32765 from 2603:10e2:0:2902::8/128 table default
+    pre-down ip -6 rule delete pref 32767 lookup default
 iface eth1 inet static
     address 10.0.10.100
     netmask 255.255.255.0
@@ -67,10 +70,13 @@ iface eth1 inet6 static
     up ip -6 route add default via 2603:10e2:0:abcd::1 dev eth1 table default metric 201
     up ip -6 route add 2603:10e2:0:abcd::/64 dev eth1 table default
     up ip -6 rule add pref 32765 from 2603:10e2:0:abcd::8/128 table default
+    # IPV6 default table not add to lookup by default, management server need this to access IPV6 address when BGP shutdown
+    up ip -6 rule add pref 32767 lookup default
     # management port down rules
     pre-down ip -6 route delete default via 2603:10e2:0:abcd::1 dev eth1 table default
     pre-down ip -6 route delete 2603:10e2:0:abcd::/64 dev eth1 table default
     pre-down ip -6 rule delete pref 32765 from 2603:10e2:0:abcd::8/128 table default
+    pre-down ip -6 rule delete pref 32767 lookup default
 #
 source /etc/network/interfaces.d/*
 #

From 7d4f348c09b7c59b05047da1ebadc8088c1d0497 Mon Sep 17 00:00:00 2001
From: Ze Gan <ganze718@gmail.com>
Date: Wed, 6 Dec 2023 09:51:14 +0800
Subject: [PATCH 0019/1115] [submodule]: Update submodule
 sonic-swss/sonic-dash-api/protobuf (#17413)

### Why I did it
1. Protobuf 3.21 has been released in the Debian bookworm
2. Update submodule sonic-swss and sonic-dash-api because they include related updates.

##### Work item tracking
- Microsoft ADO **(number only)**:

#### How I did it

1. In the protobuf.mk, If it isn't bullseye, ignore to compile the protobuf package
2. Move sonic-swss commits:
```
fd852084 (HEAD, origin/master, origin/HEAD) [dashrouteorch]: Rename dash route namespace (#2966)
```
3. Move sonic-dash-api and move build chain to its submodule
```
d4448c7 (HEAD, origin/master, origin/HEAD, master) [azp]: Add multi-platform artifacts (#11)
8a5e5cc [debian]: Add debian package (#10)
d96163a [misc]: Add dash utils and its tests (#9)
```

#### How to verify it
Check Azp
---
 .gitmodules                          |  4 +--
 rules/protobuf.mk                    | 51 +++++++++++++++-------------
 rules/sonic-dash-api.mk              |  6 ++--
 sonic-slave-bookworm/Dockerfile.j2   |  7 ++--
 src/sonic-dash-api                   |  1 +
 src/sonic-dash-api/.gitignore        |  2 --
 src/sonic-dash-api/Makefile          | 47 -------------------------
 src/sonic-dash-api/debian/changelog  |  6 ----
 src/sonic-dash-api/debian/compat     |  1 -
 src/sonic-dash-api/debian/control    | 13 -------
 src/sonic-dash-api/debian/rules      |  8 -----
 src/sonic-dash-api/pypkg/__init__.py |  5 ---
 src/sonic-dash-api/sonic-dash-api    |  1 -
 src/sonic-swss                       |  2 +-
 14 files changed, 38 insertions(+), 116 deletions(-)
 create mode 160000 src/sonic-dash-api
 delete mode 100644 src/sonic-dash-api/.gitignore
 delete mode 100644 src/sonic-dash-api/Makefile
 delete mode 100644 src/sonic-dash-api/debian/changelog
 delete mode 100644 src/sonic-dash-api/debian/compat
 delete mode 100644 src/sonic-dash-api/debian/control
 delete mode 100755 src/sonic-dash-api/debian/rules
 delete mode 100644 src/sonic-dash-api/pypkg/__init__.py
 delete mode 160000 src/sonic-dash-api/sonic-dash-api

diff --git a/.gitmodules b/.gitmodules
index ccd3674cb..e9b57673b 100644
--- a/.gitmodules
+++ b/.gitmodules
@@ -112,8 +112,8 @@
 [submodule "src/dhcpmon"]
 	path = src/dhcpmon
 	url = https://github.com/sonic-net/sonic-dhcpmon.git
-[submodule "src/sonic-dash-api/sonic-dash-api"]
-	path = src/sonic-dash-api/sonic-dash-api
+[submodule "src/sonic-dash-api"]
+	path = src/sonic-dash-api
 	url = https://github.com/sonic-net/sonic-dash-api.git
 [submodule "platform/marvell-arm64/mrvl-prestera"]
 	path = platform/marvell-arm64/mrvl-prestera
diff --git a/rules/protobuf.mk b/rules/protobuf.mk
index 5e50eac86..866eb6b99 100644
--- a/rules/protobuf.mk
+++ b/rules/protobuf.mk
@@ -1,32 +1,37 @@
 # protobuf package
+# Protobuf 3.21.12 has been released in bookworm, So we only need to build it
+# in the bullseye environment.
+ifeq ($(BLDENV),bullseye)
 
-PROTOBUF_VERSION = 3.21.12
-PROTOBUF_VERSION_FULL = $(PROTOBUF_VERSION)-3
+    PROTOBUF_VERSION = 3.21.12
+    PROTOBUF_VERSION_FULL = $(PROTOBUF_VERSION)-3
 
-export PROTOBUF_VERSION
-export PROTOBUF_VERSION_FULL
+    export PROTOBUF_VERSION
+    export PROTOBUF_VERSION_FULL
 
-PROTOBUF = libprotobuf32_$(PROTOBUF_VERSION_FULL)_$(CONFIGURED_ARCH).deb
-$(PROTOBUF)_SRC_PATH = $(SRC_PATH)/protobuf
-SONIC_MAKE_DEBS += $(PROTOBUF)
+    PROTOBUF = libprotobuf32_$(PROTOBUF_VERSION_FULL)_$(CONFIGURED_ARCH).deb
+    $(PROTOBUF)_SRC_PATH = $(SRC_PATH)/protobuf
+    SONIC_MAKE_DEBS += $(PROTOBUF)
 
-PROTOBUF_DEV = libprotobuf-dev_$(PROTOBUF_VERSION_FULL)_$(CONFIGURED_ARCH).deb
-$(PROTOBUF_DEV)_DEPENDS = $(PROTOBUF) $(PROTOBUF_LITE)
-$(eval $(call add_derived_package,$(PROTOBUF),$(PROTOBUF_DEV)))
+    PROTOBUF_DEV = libprotobuf-dev_$(PROTOBUF_VERSION_FULL)_$(CONFIGURED_ARCH).deb
+    $(PROTOBUF_DEV)_DEPENDS = $(PROTOBUF) $(PROTOBUF_LITE)
+    $(eval $(call add_derived_package,$(PROTOBUF),$(PROTOBUF_DEV)))
 
-PROTOBUF_LITE = libprotobuf-lite32_$(PROTOBUF_VERSION_FULL)_$(CONFIGURED_ARCH).deb
-$(eval $(call add_derived_package,$(PROTOBUF),$(PROTOBUF_LITE)))
+    PROTOBUF_LITE = libprotobuf-lite32_$(PROTOBUF_VERSION_FULL)_$(CONFIGURED_ARCH).deb
+    $(eval $(call add_derived_package,$(PROTOBUF),$(PROTOBUF_LITE)))
 
-PROTOC32 = libprotoc32_$(PROTOBUF_VERSION_FULL)_$(CONFIGURED_ARCH).deb
-$(PROTOC32)_RDEPENDS = $(PROTOBUF) $(PROTOBUF_LITE)
-$(eval $(call add_derived_package,$(PROTOBUF),$(PROTOC32)))
+    PROTOC32 = libprotoc32_$(PROTOBUF_VERSION_FULL)_$(CONFIGURED_ARCH).deb
+    $(PROTOC32)_RDEPENDS = $(PROTOBUF) $(PROTOBUF_LITE)
+    $(eval $(call add_derived_package,$(PROTOBUF),$(PROTOC32)))
 
-PROTOBUF_COMPILER = protobuf-compiler_$(PROTOBUF_VERSION_FULL)_$(CONFIGURED_ARCH).deb
-$(PROTOBUF_COMPILER)_DEPENDS = $(PROTOC32)
-$(PROTOBUF_COMPILER)_RDEPENDS = $(PROTOC32)
-$(eval $(call add_derived_package,$(PROTOBUF),$(PROTOBUF_COMPILER)))
+    PROTOBUF_COMPILER = protobuf-compiler_$(PROTOBUF_VERSION_FULL)_$(CONFIGURED_ARCH).deb
+    $(PROTOBUF_COMPILER)_DEPENDS = $(PROTOC32)
+    $(PROTOBUF_COMPILER)_RDEPENDS = $(PROTOC32)
+    $(eval $(call add_derived_package,$(PROTOBUF),$(PROTOBUF_COMPILER)))
 
-PYTHON3_PROTOBUF = python3-protobuf_$(PROTOBUF_VERSION_FULL)_$(CONFIGURED_ARCH).deb
-$(PYTHON3_PROTOBUF)_DEPENDS = $(PROTOBUF_DEV) $(PROTOBUF)
-$(PYTHON3_PROTOBUF)_RDEPENDS = $(PROTOBUF)
-$(eval $(call add_derived_package,$(PROTOBUF),$(PYTHON3_PROTOBUF)))
+    PYTHON3_PROTOBUF = python3-protobuf_$(PROTOBUF_VERSION_FULL)_$(CONFIGURED_ARCH).deb
+    $(PYTHON3_PROTOBUF)_DEPENDS = $(PROTOBUF_DEV) $(PROTOBUF)
+    $(PYTHON3_PROTOBUF)_RDEPENDS = $(PROTOBUF)
+    $(eval $(call add_derived_package,$(PROTOBUF),$(PYTHON3_PROTOBUF)))
+
+endif
diff --git a/rules/sonic-dash-api.mk b/rules/sonic-dash-api.mk
index e6d9e34c0..742b2c3f9 100644
--- a/rules/sonic-dash-api.mk
+++ b/rules/sonic-dash-api.mk
@@ -5,8 +5,10 @@ LIB_SONIC_DASH_API_VERSION = 1.0.0
 LIB_SONIC_DASH_API = libdashapi_$(LIB_SONIC_DASH_API_VERSION)_$(CONFIGURED_ARCH).deb
 $(LIB_SONIC_DASH_API)_SRC_PATH = $(SRC_PATH)/sonic-dash-api
 
-$(LIB_SONIC_DASH_API)_DEPENDS += $(PROTOBUF) $(PROTOBUF_LITE) $(PROTOBUF_DEV) $(PROTOBUF_COMPILER)
-$(LIB_SONIC_DASH_API)_RDEPENDS += $(PROTOBUF) $(PROTOBUF_LITE) $(PYTHON3_PROTOBUF)
+ifeq ($(BLDENV),bullseye)
+    $(LIB_SONIC_DASH_API)_DEPENDS += $(PROTOBUF) $(PROTOBUF_LITE) $(PROTOBUF_DEV) $(PROTOBUF_COMPILER)
+    $(LIB_SONIC_DASH_API)_RDEPENDS += $(PROTOBUF) $(PROTOBUF_LITE) $(PYTHON3_PROTOBUF)
+endif
 
 SONIC_DPKG_DEBS += $(LIB_SONIC_DASH_API)
 
diff --git a/sonic-slave-bookworm/Dockerfile.j2 b/sonic-slave-bookworm/Dockerfile.j2
index 95af2bd82..ef29115b0 100644
--- a/sonic-slave-bookworm/Dockerfile.j2
+++ b/sonic-slave-bookworm/Dockerfile.j2
@@ -417,11 +417,8 @@ RUN apt-get update && apt-get install -y \
         libauparse-dev \
         auditd \
 # For protobuf
-        dh-elpa \
-        xmlto \
-        rake-compiler \
-        default-jdk \
-        libgoogle-gson-java
+        protobuf-compiler \
+        libprotobuf-dev
 
 {%- if CROSS_BUILD_ENVIRON == "y" %}
 # Arm vs. amd64 versions conflict - remove amd64 packages
diff --git a/src/sonic-dash-api b/src/sonic-dash-api
new file mode 160000
index 000000000..d4448c78b
--- /dev/null
+++ b/src/sonic-dash-api
@@ -0,0 +1 @@
+Subproject commit d4448c78b4e0afd1ec6dfaa390aef5c650cee4b3
diff --git a/src/sonic-dash-api/.gitignore b/src/sonic-dash-api/.gitignore
deleted file mode 100644
index ff64e429b..000000000
--- a/src/sonic-dash-api/.gitignore
+++ /dev/null
@@ -1,2 +0,0 @@
-build
-debian/sonic-dash-api
diff --git a/src/sonic-dash-api/Makefile b/src/sonic-dash-api/Makefile
deleted file mode 100644
index 0031800cc..000000000
--- a/src/sonic-dash-api/Makefile
+++ /dev/null
@@ -1,47 +0,0 @@
-.ONESHELL:
-SHELL = /bin/bash
-.SHELLFLAGS += -e
-
-RM := rm -rf
-CP := cp -rf
-MKDIR := mkdir
-MV := mv
-LIBDASHAPI := libdashapi.so
-BUILD_DIR := build
-PYPKG_DIR := pypkg
-DESTDIR := 
-DASH_API_PROTO_DIR := sonic-dash-api/proto
-INSTALLED_HEADER_DIR := $(DESTDIR)/usr/include/dash_api
-INSTALLED_LIB_DIR := $(DESTDIR)/usr/lib
-INSTALLED_PYTHON_DIR := $(DESTDIR)/usr/lib/python3/dist-packages/dash_api
-
-all: compile_cpp_proto dashapi.so compile_py_proto
-
-compile_cpp_proto:
-	$(MKDIR) -p $(BUILD_DIR)
-	protoc -I=$(DASH_API_PROTO_DIR) --cpp_out=$(BUILD_DIR) $(DASH_API_PROTO_DIR)/*.proto
-
-dashapi.so: compile_cpp_proto
-	g++ -std=c++14 -fPIC -shared -o $(BUILD_DIR)/$(LIBDASHAPI) $(wildcard $(BUILD_DIR)/*.pb.cc) -lprotobuf
-
-compile_py_proto:
-	protoc -I=$(DASH_API_PROTO_DIR) --python_out=$(PYPKG_DIR) $(DASH_API_PROTO_DIR)/*.proto
-
-clean:
-	$(RM) $(BUILD_DIR)
-	$(RM) $(PYPKG_DIR)/*_pb2.py
-
-install:
-	$(MKDIR) -p $(INSTALLED_HEADER_DIR)
-	$(CP) $(BUILD_DIR)/*.pb.h $(INSTALLED_HEADER_DIR)
-	$(MKDIR) -p $(INSTALLED_LIB_DIR)
-	$(CP) $(BUILD_DIR)/$(LIBDASHAPI) $(INSTALLED_LIB_DIR)
-	$(MKDIR) -p $(INSTALLED_PYTHON_DIR)
-	$(CP) $(PYPKG_DIR)/* $(INSTALLED_PYTHON_DIR)
-
-uninstall:
-	$(RM) $(INSTALLED_HEADER_DIR)
-	$(RM) $(INSTALLED_LIB_DIR)/$(LIBDASHAPI)
-	$(RM) $(INSTALLED_PYTHON_DIR)
-
-.PHONY: uninstall clean
diff --git a/src/sonic-dash-api/debian/changelog b/src/sonic-dash-api/debian/changelog
deleted file mode 100644
index e5cb52398..000000000
--- a/src/sonic-dash-api/debian/changelog
+++ /dev/null
@@ -1,6 +0,0 @@
-sonic (1.0.0) stable; urgency=medium
-
-  * Initial release.
-
- -- Ze Gan <zegan@microsoft.com>  Wed, 14 Jun 2023 12:00:00 -0800
-
diff --git a/src/sonic-dash-api/debian/compat b/src/sonic-dash-api/debian/compat
deleted file mode 100644
index 9d607966b..000000000
--- a/src/sonic-dash-api/debian/compat
+++ /dev/null
@@ -1 +0,0 @@
-11
\ No newline at end of file
diff --git a/src/sonic-dash-api/debian/control b/src/sonic-dash-api/debian/control
deleted file mode 100644
index 545204fbe..000000000
--- a/src/sonic-dash-api/debian/control
+++ /dev/null
@@ -1,13 +0,0 @@
-Source: sonic
-Maintainer: Ze Gan <zegan@microsoft.com>
-Section: net
-Priority: optional
-Build-Depends: dh-exec (>=0.3), debhelper (>= 12), autotools-dev,
-Standards-Version: 1.0.0
-
-Package: libdashapi
-Architecture: any
-Build-Depends: protobuf-compiler (>=3.21.12), libprotobuf-dev (>=3.21.12)
-Depends: libprotobuf32 (>=3.21.12), libprotobuf-lite32 (>=3.21.12)
-Section: libs
-Description: DASH API definition for the SONiC project.
diff --git a/src/sonic-dash-api/debian/rules b/src/sonic-dash-api/debian/rules
deleted file mode 100755
index e661a7acd..000000000
--- a/src/sonic-dash-api/debian/rules
+++ /dev/null
@@ -1,8 +0,0 @@
-#!/usr/bin/make -f
-#export DH_VERBOSE = 1
-
-%:
-	dh $@
-
-override_dh_auto_build:
-	make all
diff --git a/src/sonic-dash-api/pypkg/__init__.py b/src/sonic-dash-api/pypkg/__init__.py
deleted file mode 100644
index ade95c521..000000000
--- a/src/sonic-dash-api/pypkg/__init__.py
+++ /dev/null
@@ -1,5 +0,0 @@
-import sys
-import os
-
-
-sys.path.insert(0, os.path.abspath(os.path.dirname(__file__)))
diff --git a/src/sonic-dash-api/sonic-dash-api b/src/sonic-dash-api/sonic-dash-api
deleted file mode 160000
index 3f728d1bb..000000000
--- a/src/sonic-dash-api/sonic-dash-api
+++ /dev/null
@@ -1 +0,0 @@
-Subproject commit 3f728d1bbf65d2e8c41bdc023d5c07702a7f848b
diff --git a/src/sonic-swss b/src/sonic-swss
index d839eec3c..fd852084d 160000
--- a/src/sonic-swss
+++ b/src/sonic-swss
@@ -1 +1 @@
-Subproject commit d839eec3c02a5911645dbfc93aa5bb474bbff38f
+Subproject commit fd852084d49f54bb15fa414eff4b2eab546ed64a

From 1ff27db42f4f8722f8f74967030a4d7e31473731 Mon Sep 17 00:00:00 2001
From: Nazarii Hnydyn <nazariig@nvidia.com>
Date: Wed, 6 Dec 2023 05:09:54 +0200
Subject: [PATCH 0020/1115] [frr]: Force disable next hop group support.
 (#17344)

Signed-off-by: Nazarii Hnydyn nazariig@nvidia.com

Closes #17345

This W/A was proposed by Nvidia FRR team before the long term solution is ready.

Why I did it
A W/A to fix default route installation during LAG member flap
Work item tracking
N/A
How I did it
Disabled FRR next hop group support
How to verify it
Do LAG member flap
---
 dockers/docker-fpm-frr/docker_init.sh                         | 4 ++++
 dockers/docker-fpm-frr/frr/zebra/zebra.conf.j2                | 2 ++
 platform/vs/docker-sonic-vs/frr/zebra.conf                    | 3 +--
 src/sonic-bgpcfgd/tests/data/sonic-cfggen/zebra/zebra.conf    | 2 ++
 .../tests/sample_output/py2/t2-chassis-fe-vni-zebra.conf      | 2 ++
 .../tests/sample_output/py2/t2-chassis-fe-zebra.conf          | 2 ++
 .../tests/sample_output/py2/zebra_frr.conf                    | 2 ++
 .../tests/sample_output/py3/t2-chassis-fe-vni-zebra.conf      | 2 ++
 .../tests/sample_output/py3/t2-chassis-fe-zebra.conf          | 2 ++
 .../tests/sample_output/py3/zebra_frr.conf                    | 2 ++
 10 files changed, 21 insertions(+), 2 deletions(-)

diff --git a/dockers/docker-fpm-frr/docker_init.sh b/dockers/docker-fpm-frr/docker_init.sh
index 0ed274ec7..390a403aa 100755
--- a/dockers/docker-fpm-frr/docker_init.sh
+++ b/dockers/docker-fpm-frr/docker_init.sh
@@ -49,6 +49,10 @@ write_default_zebra_config()
         echo "no fpm use-next-hop-groups" >> $FILE_NAME
         echo "fpm address 127.0.0.1" >> $FILE_NAME
     }
+
+    grep -q '^no zebra nexthop kernel enable' $FILE_NAME || {
+        echo "no zebra nexthop kernel enable" >> $FILE_NAME
+    }
 }
 
 if [[ ! -z "$NAMESPACE_ID" ]]; then
diff --git a/dockers/docker-fpm-frr/frr/zebra/zebra.conf.j2 b/dockers/docker-fpm-frr/frr/zebra/zebra.conf.j2
index f5a56c316..4543ad8f9 100644
--- a/dockers/docker-fpm-frr/frr/zebra/zebra.conf.j2
+++ b/dockers/docker-fpm-frr/frr/zebra/zebra.conf.j2
@@ -7,6 +7,8 @@
 {% endblock banner %}
 !
 {% block fpm %}
+! Force disable next hop group support
+no zebra nexthop kernel enable
 ! Uses the old known FPM behavior of including next hop information in the route (e.g. RTM_NEWROUTE) messages
 no fpm use-next-hop-groups
 !
diff --git a/platform/vs/docker-sonic-vs/frr/zebra.conf b/platform/vs/docker-sonic-vs/frr/zebra.conf
index 4c994e60d..1980a6e15 100644
--- a/platform/vs/docker-sonic-vs/frr/zebra.conf
+++ b/platform/vs/docker-sonic-vs/frr/zebra.conf
@@ -1,4 +1,3 @@
+no zebra nexthop kernel enable
 no fpm use-next-hop-groups
-
 fpm address 127.0.0.1
-
diff --git a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/zebra/zebra.conf b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/zebra/zebra.conf
index 6b7e1feff..38db29648 100644
--- a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/zebra/zebra.conf
+++ b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/zebra/zebra.conf
@@ -4,6 +4,8 @@
 ! file: zebra.conf
 !
 !
+! Force disable next hop group support
+no zebra nexthop kernel enable
 ! Uses the old known FPM behavior of including next hop information in the route (e.g. RTM_NEWROUTE) messages
 no fpm use-next-hop-groups
 !
diff --git a/src/sonic-config-engine/tests/sample_output/py2/t2-chassis-fe-vni-zebra.conf b/src/sonic-config-engine/tests/sample_output/py2/t2-chassis-fe-vni-zebra.conf
index 8bb483456..120878fe1 100644
--- a/src/sonic-config-engine/tests/sample_output/py2/t2-chassis-fe-vni-zebra.conf
+++ b/src/sonic-config-engine/tests/sample_output/py2/t2-chassis-fe-vni-zebra.conf
@@ -4,6 +4,8 @@
 ! file: zebra.conf
 !
 !
+! Force disable next hop group support
+no zebra nexthop kernel enable
 ! Uses the old known FPM behavior of including next hop information in the route (e.g. RTM_NEWROUTE) messages
 no fpm use-next-hop-groups
 !
diff --git a/src/sonic-config-engine/tests/sample_output/py2/t2-chassis-fe-zebra.conf b/src/sonic-config-engine/tests/sample_output/py2/t2-chassis-fe-zebra.conf
index 402230348..a6e3ad053 100644
--- a/src/sonic-config-engine/tests/sample_output/py2/t2-chassis-fe-zebra.conf
+++ b/src/sonic-config-engine/tests/sample_output/py2/t2-chassis-fe-zebra.conf
@@ -4,6 +4,8 @@
 ! file: zebra.conf
 !
 !
+! Force disable next hop group support
+no zebra nexthop kernel enable
 ! Uses the old known FPM behavior of including next hop information in the route (e.g. RTM_NEWROUTE) messages
 no fpm use-next-hop-groups
 !
diff --git a/src/sonic-config-engine/tests/sample_output/py2/zebra_frr.conf b/src/sonic-config-engine/tests/sample_output/py2/zebra_frr.conf
index 9d0ab16ee..9e438caa0 100644
--- a/src/sonic-config-engine/tests/sample_output/py2/zebra_frr.conf
+++ b/src/sonic-config-engine/tests/sample_output/py2/zebra_frr.conf
@@ -4,6 +4,8 @@
 ! file: zebra.conf
 !
 !
+! Force disable next hop group support
+no zebra nexthop kernel enable
 ! Uses the old known FPM behavior of including next hop information in the route (e.g. RTM_NEWROUTE) messages
 no fpm use-next-hop-groups
 !
diff --git a/src/sonic-config-engine/tests/sample_output/py3/t2-chassis-fe-vni-zebra.conf b/src/sonic-config-engine/tests/sample_output/py3/t2-chassis-fe-vni-zebra.conf
index b55906056..c6c973f7f 100644
--- a/src/sonic-config-engine/tests/sample_output/py3/t2-chassis-fe-vni-zebra.conf
+++ b/src/sonic-config-engine/tests/sample_output/py3/t2-chassis-fe-vni-zebra.conf
@@ -4,6 +4,8 @@
 ! file: zebra.conf
 !
 !
+! Force disable next hop group support
+no zebra nexthop kernel enable
 ! Uses the old known FPM behavior of including next hop information in the route (e.g. RTM_NEWROUTE) messages
 no fpm use-next-hop-groups
 !
diff --git a/src/sonic-config-engine/tests/sample_output/py3/t2-chassis-fe-zebra.conf b/src/sonic-config-engine/tests/sample_output/py3/t2-chassis-fe-zebra.conf
index 19e303639..84e76ecdb 100644
--- a/src/sonic-config-engine/tests/sample_output/py3/t2-chassis-fe-zebra.conf
+++ b/src/sonic-config-engine/tests/sample_output/py3/t2-chassis-fe-zebra.conf
@@ -4,6 +4,8 @@
 ! file: zebra.conf
 !
 !
+! Force disable next hop group support
+no zebra nexthop kernel enable
 ! Uses the old known FPM behavior of including next hop information in the route (e.g. RTM_NEWROUTE) messages
 no fpm use-next-hop-groups
 !
diff --git a/src/sonic-config-engine/tests/sample_output/py3/zebra_frr.conf b/src/sonic-config-engine/tests/sample_output/py3/zebra_frr.conf
index a5fb8b1ca..b8adb9878 100644
--- a/src/sonic-config-engine/tests/sample_output/py3/zebra_frr.conf
+++ b/src/sonic-config-engine/tests/sample_output/py3/zebra_frr.conf
@@ -4,6 +4,8 @@
 ! file: zebra.conf
 !
 !
+! Force disable next hop group support
+no zebra nexthop kernel enable
 ! Uses the old known FPM behavior of including next hop information in the route (e.g. RTM_NEWROUTE) messages
 no fpm use-next-hop-groups
 !

From cfa92a488913f676ae1901464cf48818c6ae23dd Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Wed, 6 Dec 2023 16:34:18 +0800
Subject: [PATCH 0021/1115] [submodule] Update submodule sonic-restapi to the
 latest HEAD automatically (#17419)

#### Why I did it
src/sonic-restapi
```
* 24d440f - (HEAD -> master, origin/master, origin/HEAD) [build] Fix Makefile didn't set go build target file. #151 (39 minutes ago) [Liu Shilong]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-restapi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-restapi b/src/sonic-restapi
index 7971aa3c1..24d440ff6 160000
--- a/src/sonic-restapi
+++ b/src/sonic-restapi
@@ -1 +1 @@
-Subproject commit 7971aa3c1fa5e02c099df10fc3e4fdc7d89f99ec
+Subproject commit 24d440ff6469432001a82be3e6f44579afcba395

From 0f4a5b3d879b37d920f859ba45599e862602afe3 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Wed, 6 Dec 2023 18:35:35 +0800
Subject: [PATCH 0022/1115] [submodule] Update submodule sonic-sairedis to the
 latest HEAD automatically (#17408)

#### Why I did it
src/sonic-sairedis
```
* cd41369 - (HEAD -> master, origin/master, origin/HEAD) [Link Event Damping] Serialization/deserialization logic for link event (#1322) (2 days ago) [Ashish Singh]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-sairedis | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-sairedis b/src/sonic-sairedis
index 962131601..cd41369c4 160000
--- a/src/sonic-sairedis
+++ b/src/sonic-sairedis
@@ -1 +1 @@
-Subproject commit 962131601d5d99d1cb85eee636c2f1d01802e6d1
+Subproject commit cd41369c4b95cb0b7f92bdc65704bb95ed315237

From 90dc2546564611b5897f540ed187afda41b54e23 Mon Sep 17 00:00:00 2001
From: SuvarnaMeenakshi <50386592+SuvarnaMeenakshi@users.noreply.github.com>
Date: Wed, 6 Dec 2023 13:23:02 -0800
Subject: [PATCH 0023/1115] [SNMP]: Modify minigraph parser to update
 SNMP_AGENT_ADDRESS_CONFIG table (#17045)

#### Why I did it
SNMP query over IPv6 does not work due to issue in net-snmp where IPv6 query does not work on multi-nic environment.
To get around this, if snmpd listens on specific ipv4 or ipv6 address, then the issue is not seen.
We plan to configure Management IP and Loopback IP configured in minigraph.xml as SNMP_AGENT_ADDRESS in config_db., based on changes discussed in https://github.com/sonic-net/SONiC/pull/1457.

##### Work item tracking
- Microsoft ADO **(number only)**:26091228

#### How I did it
Modify minigraph parser to update SNMP_AGENT_ADDRESS_CONFIG with management and Loopback0 IP addresses.
Modify snmpd.conf.j2 to use SNMP_AGENT_ADDRESS_CONFIG table if it is present in config_db, if not listen on any IP.
Main change:
1. if minigraph.xml is used to configure the device, then snmpd will listen on mgmt and loopback IP addresses,
2. if config_db is used to configure the device, snmpd will listen IP present in SNMP_AGENT_ADDRESS_CONFIG  if that table is present, if table is not present snmpd will listen on any IP.
#### How to verify it
config_db.json created from minigraph.xml for single asic VS image with mgmt and Loopback IP addresses.
```
    "SNMP_AGENT_ADDRESS_CONFIG": {
        "10.1.0.32|161|": {},
        "10.250.0.101|161|": {},
        "FC00:1::32|161|": {},
        "fec0::ffff:afa:1|161|": {}
    },
 .....

 snmpd listening on the above IP addresses:
 admin@vlab-01:~$ sudo netstat -tulnp | grep 161
tcp        0      0 127.0.0.1:3161          0.0.0.0:*               LISTEN      71522/snmpd
udp        0      0 10.250.0.101:161        0.0.0.0:*                           71522/snmpd
udp        0      0 10.1.0.32:161           0.0.0.0:*                           71522/snmpd
udp6       0      0 fec0::ffff:afa:1:161    :::*                                71522/snmpd
udp6       0      0 fc00:1::32:161          :::*                                71522/snmpd
```
---
 dockers/docker-snmp/snmpd.conf.j2             | 26 -------------------
 dockers/docker-snmp/start.sh                  |  3 ---
 src/sonic-config-engine/minigraph.py          | 16 ++++++++++++
 .../tests/sample_graph.xml                    |  8 ++++++
 src/sonic-config-engine/tests/test_cfggen.py  |  7 ++++-
 5 files changed, 30 insertions(+), 30 deletions(-)

diff --git a/dockers/docker-snmp/snmpd.conf.j2 b/dockers/docker-snmp/snmpd.conf.j2
index 182056b63..aa04901f0 100644
--- a/dockers/docker-snmp/snmpd.conf.j2
+++ b/dockers/docker-snmp/snmpd.conf.j2
@@ -28,32 +28,6 @@
 {% for (agentip, port, vrf) in SNMP_AGENT_ADDRESS_CONFIG %}
 agentAddress {{ protocol(agentip) }}:[{{ agentip }}]{% if port %}:{{ port }}{% endif %}{% if vrf %}%{{ vrf }}{% endif %}{{ "" }}
 {% endfor %}
-{% elif NAMESPACE_COUNT is not defined or NAMESPACE_COUNT|int <= 1 %}
-{% if MGMT_INTERFACE is defined %}
-{% for intf, ip in MGMT_INTERFACE %}
-{% set agentip = ip.split('/')[0]|lower %}
-{% set zoneid = '' %}
-# Use interface as zoneid for link local ipv6
-{% if agentip.startswith('fe80') %}
-{% set zoneid = '%' + intf %}
-{% endif %}
-agentAddress {{ protocol(agentip) }}:[{{ agentip }}{{ zoneid }}]:161
-{% endfor %}
-{% endif %}
-{% if LOOPBACK_INTERFACE is defined %}
-{% for lo in LOOPBACK_INTERFACE %}
-{% if lo | length == 2 %}
-{% set intf = lo[0] %}
-{% set agentip = lo[1].split('/')[0]|lower %}
-{% set zoneid = '' %}
-# Use interface as zoneid for link local ipv6
-{% if agentip.startswith('fe80') %}
-{% set zoneid = '%' + intf %}
-{% endif %}
-agentAddress {{ protocol(agentip) }}:[{{ agentip }}{{ zoneid }}]:161
-{% endif %}
-{% endfor %}
-{% endif %}
 {% else %}
 agentAddress udp:161
 agentAddress udp6:161
diff --git a/dockers/docker-snmp/start.sh b/dockers/docker-snmp/start.sh
index 1d4c3b935..6de6f740b 100755
--- a/dockers/docker-snmp/start.sh
+++ b/dockers/docker-snmp/start.sh
@@ -16,14 +16,11 @@ mkdir -p /etc/ssw /etc/snmp
 # Parse snmp.yml and insert the data in Config DB
 /usr/bin/snmp_yml_to_configdb.py
 
-ADD_PARAM=$(printf '%s {"NAMESPACE_COUNT":"%s"}' "-a" "$NAMESPACE_COUNT")
-
 SONIC_CFGGEN_ARGS=" \
     -d \
     -y /etc/sonic/sonic_version.yml \
     -t /usr/share/sonic/templates/sysDescription.j2,/etc/ssw/sysDescription \
     -t /usr/share/sonic/templates/snmpd.conf.j2,/etc/snmp/snmpd.conf \
-    $ADD_PARAM \
 "
 
 sonic-cfggen $SONIC_CFGGEN_ARGS
diff --git a/src/sonic-config-engine/minigraph.py b/src/sonic-config-engine/minigraph.py
index 1cadd297e..bd7cb163d 100644
--- a/src/sonic-config-engine/minigraph.py
+++ b/src/sonic-config-engine/minigraph.py
@@ -16,6 +16,7 @@
 
 from portconfig import get_port_config, get_fabric_port_config, get_fabric_monitor_config
 from sonic_py_common.interface import backplane_prefix
+from sonic_py_common.multi_asic import is_multi_asic
 
 # TODO: Remove this once we no longer support Python 2
 if sys.version_info.major == 3:
@@ -1730,6 +1731,21 @@ def parse_xml(filename, platform=None, port_config_file=None, asic_name=None, hw
 
     results['MGMT_VRF_CONFIG'] = mvrf
 
+    # Update SNMP_AGENT_ADDRESS_CONFIG with Management IP and Loopback IP
+    # if available.
+    if not is_multi_asic() and asic_name is None:
+        results['SNMP_AGENT_ADDRESS_CONFIG'] = {}
+        port = '161'
+        for mgmt_intf in mgmt_intf.keys():
+            snmp_key = mgmt_intf[1].split('/')[0] + '|' + port + '|'
+            results['SNMP_AGENT_ADDRESS_CONFIG'][snmp_key] = {}
+        # Add Loopback IP as agent address for single asic
+        for loip in lo_intfs.keys():
+            snmp_key = loip[1].split('/')[0] + '|' + port + '|'
+            results['SNMP_AGENT_ADDRESS_CONFIG'][snmp_key] = {}
+    else:
+        results['SNMP_AGENT_ADDRESS_CONFIG'] = {}
+
     phyport_intfs = {}
     vlan_intfs = {}
     pc_intfs = {}
diff --git a/src/sonic-config-engine/tests/sample_graph.xml b/src/sonic-config-engine/tests/sample_graph.xml
index 478fdd5ba..35247671f 100644
--- a/src/sonic-config-engine/tests/sample_graph.xml
+++ b/src/sonic-config-engine/tests/sample_graph.xml
@@ -63,6 +63,14 @@
           </a:Prefix>
           <a:PrefixStr>100.0.0.6/32</a:PrefixStr>
         </a:LoopbackIPInterface>
+        <a:LoopbackIPInterface>
+          <Name>HostIP</Name>
+          <AttachTo>Loopback1</AttachTo>
+          <a:Prefix xmlns:b="Microsoft.Search.Autopilot.NetMux">
+            <b:IPPrefix>100.0.0.7/32</b:IPPrefix>
+          </a:Prefix>
+          <a:PrefixStr>100.0.0.7/32</a:PrefixStr>
+        </a:LoopbackIPInterface>
       </LoopbackIPInterfaces>
       <ManagementIPInterfaces xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution">
         <a:ManagementIPInterface>
diff --git a/src/sonic-config-engine/tests/test_cfggen.py b/src/sonic-config-engine/tests/test_cfggen.py
index 77c95c496..b8480cf81 100644
--- a/src/sonic-config-engine/tests/test_cfggen.py
+++ b/src/sonic-config-engine/tests/test_cfggen.py
@@ -1145,4 +1145,9 @@ def test_minigraph_cisco_400g_to_100G_speed_no_lane_change(self):
             )
         )
 
-
+    def testsnmp_agent_address_config(self):
+        argument = ['-m', self.sample_graph, '-p', self.port_config, '-v', 'SNMP_AGENT_ADDRESS_CONFIG.keys()|list']
+        output = self.run_script(argument)
+        self.assertEqual(
+            utils.liststr_to_dict(output.strip()),
+            utils.liststr_to_dict("['192.168.200.15|161|', '100.0.0.6|161|', '100.0.0.7|161|']"))

From 048f2a7c3901895a14518a347b3af23c96ae15cb Mon Sep 17 00:00:00 2001
From: Junhua Zhai <junhua.zhai@outlook.com>
Date: Thu, 7 Dec 2023 13:43:13 +0800
Subject: [PATCH 0024/1115] [gbsyncd] Graceful shutdown of syncd process in
 container gbsyncd (#16812)

Fix #16608. Need to gracefully shutdown syncd/gbsyncd individually.
---
 files/scripts/gbsyncd.sh | 27 ++++++++++++++++++++++++++-
 1 file changed, 26 insertions(+), 1 deletion(-)

diff --git a/files/scripts/gbsyncd.sh b/files/scripts/gbsyncd.sh
index 0948aaadc..74aafaead 100755
--- a/files/scripts/gbsyncd.sh
+++ b/files/scripts/gbsyncd.sh
@@ -19,7 +19,32 @@ function waitplatform() {
 }
 
 function stopplatform1() {
-    :
+    # Invoke platform specific pre shutdown routine.
+    PLATFORM=`$SONIC_DB_CLI CONFIG_DB hget 'DEVICE_METADATA|localhost' platform`
+    PLATFORM_PRE_SHUTDOWN="/usr/share/sonic/device/$PLATFORM/plugins/gbsyncd_request_pre_shutdown"
+    [ -f $PLATFORM_PRE_SHUTDOWN ] && \
+        /usr/bin/docker exec -i gbsyncd$DEV /usr/share/sonic/platform/plugins/gbsyncd_request_pre_shutdown --${TYPE}
+
+    debug "${TYPE} shutdown syncd process in container gbsyncd$DEV ..."
+    /usr/bin/docker exec -i gbsyncd$DEV /usr/bin/syncd_request_shutdown -g 1 -x /usr/share/sonic/hwsku/context_config.json --${TYPE}
+
+    # wait until syncd quits gracefully or force syncd to exit after
+    # waiting for 20 seconds
+    start_in_secs=${SECONDS}
+    end_in_secs=${SECONDS}
+    timer_threshold=20
+    while docker top gbsyncd$DEV | grep -q /usr/bin/syncd \
+            && [[ $((end_in_secs - start_in_secs)) -le $timer_threshold ]]; do
+        sleep 0.1
+        end_in_secs=${SECONDS}
+    done
+
+    if [[ $((end_in_secs - start_in_secs)) -gt $timer_threshold ]]; then
+        debug "syncd process in container gbsyncd$DEV did not exit gracefully"
+    fi
+
+    /usr/bin/docker exec -i gbsyncd$DEV /bin/sync
+    debug "Finished ${TYPE} shutdown syncd process in container gbsyncd$DEV ..."
 }
 
 function stopplatform2() {

From 0ecee5df05055cef2b59f2e66274cdb3a212fa3b Mon Sep 17 00:00:00 2001
From: Aaron Payment <aaronpayment@users.noreply.github.com>
Date: Wed, 6 Dec 2023 22:04:21 -0800
Subject: [PATCH 0025/1115] [gbsyncd]: Set SYSLOG_CONFIG_FEATURE for gbsyncd
 (#17325)

Why I did it
SONiC Mgmt test syslog/test_syslog_rate_limit.py syslog.test_syslog_rate_limit test_syslog_rate_limit was failing on SKUs with gbsyncd. This includes Arista 720DT when testing on the 202305 branch.

How I did it
The issue was no value for gbsyncd in "show syslog rate-limit-container",
because gbsyncd is not having a SYSLOG_CONFIG_FEAGTURE|gbsyncd entry in
config_db, which is further because gbsyncd feature is for not enabled
through init_cfg.json.j2.

How to verify it
Test is now passing on 720DT in 202305 branch.

Co-authored-by: Boyang Yu <byu@arista.com>
---
 files/scripts/gbsyncd.sh | 1 +
 1 file changed, 1 insertion(+)

diff --git a/files/scripts/gbsyncd.sh b/files/scripts/gbsyncd.sh
index 74aafaead..fc6b018b3 100755
--- a/files/scripts/gbsyncd.sh
+++ b/files/scripts/gbsyncd.sh
@@ -10,6 +10,7 @@ function startplatform() {
         if [ -z $($DB_CLI CONFIG_DB HGET 'FEATURE|gbsyncd' state) ]; then
             local CMD="local r=redis.call('DUMP', KEYS[1]); redis.call('RESTORE', KEYS[2], 0, r)"
             $DB_CLI CONFIG_DB EVAL "$CMD" 2 'FEATURE|syncd' 'FEATURE|gbsyncd'
+            $DB_CLI CONFIG_DB EVAL "$CMD" 2 'SYSLOG_CONFIG_FEATURE|syncd' 'SYSLOG_CONFIG_FEATURE|gbsyncd'
         fi
     done
 }

From fdc6f287330a3e72640056cf57c01813d2f1bb54 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Thu, 7 Dec 2023 16:34:06 +0800
Subject: [PATCH 0026/1115] [submodule] Update submodule sonic-sairedis to the
 latest HEAD automatically (#17438)

#### Why I did it
src/sonic-sairedis
```
* e7ad356 - (HEAD -> master, origin/master, origin/HEAD) [Azp]: Update dash api source from buildimage to submodule (#1330) (17 hours ago) [Ze Gan]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-sairedis | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-sairedis b/src/sonic-sairedis
index cd41369c4..e7ad3566a 160000
--- a/src/sonic-sairedis
+++ b/src/sonic-sairedis
@@ -1 +1 @@
-Subproject commit cd41369c4b95cb0b7f92bdc65704bb95ed315237
+Subproject commit e7ad3566a8265e1b4cc96a1ed50978eee319dc6a

From 719e41bab4805eb5edbe0fbcd66d2bb190e2ecfb Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Thu, 7 Dec 2023 16:34:10 +0800
Subject: [PATCH 0027/1115] [submodule] Update submodule sonic-platform-common
 to the latest HEAD automatically (#17437)

#### Why I did it
src/sonic-platform-common
```
* 427217b - (HEAD -> master, origin/master, origin/HEAD) Adding supported vendor PNs for remote CDB FW upgrade (#418) (2 hours ago) [mihirpat1]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-platform-common | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-platform-common b/src/sonic-platform-common
index d09e009dc..427217bd4 160000
--- a/src/sonic-platform-common
+++ b/src/sonic-platform-common
@@ -1 +1 @@
-Subproject commit d09e009dc240ffcf1234f8aa75a0bf640431bdb3
+Subproject commit 427217bd4c869915f43f4e23f877aeb09db6bc3a

From 28a7f200621a4948dc7f92f9593efc196e168acf Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Thu, 7 Dec 2023 16:34:16 +0800
Subject: [PATCH 0028/1115] [submodule] Update submodule linkmgrd to the latest
 HEAD automatically (#17435)

#### Why I did it
src/linkmgrd
```
* e420df4 - (HEAD -> master, origin/master, origin/HEAD) Exclude DbInterface in PR coverage check (#224) (5 hours ago) [Jing Zhang]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/linkmgrd | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/linkmgrd b/src/linkmgrd
index 489f6cee9..e420df41a 160000
--- a/src/linkmgrd
+++ b/src/linkmgrd
@@ -1 +1 @@
-Subproject commit 489f6cee955a10d5d6d576d8258e1bd69efa5665
+Subproject commit e420df41a08ea9ec421687fb06d1f96535ebf151

From 341b0cec38b7d9b91b34672edcdef6c5bd59c717 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Thu, 7 Dec 2023 16:34:21 +0800
Subject: [PATCH 0029/1115] [submodule] Update submodule sonic-swss to the
 latest HEAD automatically (#17409)

#### Why I did it
src/sonic-swss
```
* 6026b6d6 - (HEAD -> master, origin/master, origin/HEAD) [dash] add ACL group bind check for rule create/update (#2974) (88 minutes ago) [Yakiv Huryk]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-swss | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-swss b/src/sonic-swss
index fd852084d..6026b6d63 160000
--- a/src/sonic-swss
+++ b/src/sonic-swss
@@ -1 +1 @@
-Subproject commit fd852084d49f54bb15fa414eff4b2eab546ed64a
+Subproject commit 6026b6d63b686f5f7cef1522715141b4c725cfba

From 000a2ef8184246c9acea2b0d12e180eb51ccc81f Mon Sep 17 00:00:00 2001
From: dbarashinvd <105214075+dbarashinvd@users.noreply.github.com>
Date: Thu, 7 Dec 2023 14:54:56 +0200
Subject: [PATCH 0030/1115] [Mellanox] Enable CMIS host management (#16846)

- Why I did it
Enable CMIS host management for Mellanox devices which are expected to support the feature

- How I did it
new thread in a new file and changing logic in platform code in chassis.py which is calling this thread from get_change_event()
this thread in the new file handles the state machine per port.
first the static detection takes place once the thread is up (during switch bootup sequence), until final decision if it's FW control or SW control module.
After it ends, the dynamic detection takes place, listening to changes in the sysfs fds, per port,
so it will be able to detect plug in or out events of a cable.

- How to verify it
Enhanced unit tests
run sonic mgmt on Nvidia SN4700 with CMIS host management enabled
---
 .../sonic_platform/chassis.py                 |  59 +-
 .../sonic_platform/device_data.py             |   3 +-
 .../sonic_platform/modules_mgmt.py            | 743 ++++++++++++++++++
 .../mlnx-platform-api/tests/test_chassis.py   |  15 +-
 4 files changed, 783 insertions(+), 37 deletions(-)
 create mode 100644 platform/mellanox/mlnx-platform-api/sonic_platform/modules_mgmt.py

diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/chassis.py b/platform/mellanox/mlnx-platform-api/sonic_platform/chassis.py
index 105fc48d8..6efdfb61f 100644
--- a/platform/mellanox/mlnx-platform-api/sonic_platform/chassis.py
+++ b/platform/mellanox/mlnx-platform-api/sonic_platform/chassis.py
@@ -31,7 +31,10 @@
     from . import utils
     from .device_data import DeviceDataManager
     import re
+    import queue
+    import threading
     import time
+    from sonic_platform import modules_mgmt
 except ImportError as e:
     raise ImportError (str(e) + "- required module not found")
 
@@ -124,6 +127,10 @@ def __init__(self):
         self._RJ45_port_inited = False
         self._RJ45_port_list = None
 
+        self.modules_mgmt_thread = threading.Thread()
+        self.modules_changes_queue = queue.Queue()
+        self.modules_mgmt_task_stopping_event = threading.Event()
+
         logger.log_info("Chassis loaded successfully")
 
     def __del__(self):
@@ -371,7 +378,7 @@ def get_change_event(self, timeout=0):
 
         Returns:
             (bool, dict):
-                - True if call successful, False if not;
+                - True if call successful, False if not; - Deprecated, will always return True
                 - A nested dictionary where key is a device type,
                   value is a dictionary with key:value pairs in the format of
                   {'device_id':'device_event'},
@@ -383,38 +390,42 @@ def get_change_event(self, timeout=0):
                       indicates that fan 0 has been removed, fan 2
                       has been inserted and sfp 11 has been removed.
         """
+        if not self.modules_mgmt_thread.is_alive():
+            # open new SFP change events thread
+            self.modules_mgmt_thread = modules_mgmt.ModulesMgmtTask(q=self.modules_changes_queue
+                                                    , main_thread_stop_event = self.modules_mgmt_task_stopping_event)
+            # Set the thread as daemon so when pmon/xcvrd are shutting down, modules_mgmt will shut down immedietly.
+            self.modules_mgmt_thread.daemon = True
+            self.modules_mgmt_thread.start()
         self.initialize_sfp()
-        # Initialize SFP event first
-        if not self.sfp_event:
-            from .sfp_event import sfp_event
-            self.sfp_event = sfp_event(self.RJ45_port_list)
-            self.sfp_event.initialize()
-
         wait_for_ever = (timeout == 0)
-        # select timeout should be no more than 1000ms to ensure fast shutdown flow
-        select_timeout = 1000.0 if timeout >= 1000 else float(timeout)
+        # poll timeout should be no more than 1000ms to ensure fast shutdown flow
+        timeout = 1000.0 if timeout >= 1000 else float(timeout)
         port_dict = {}
         error_dict = {}
         begin = time.time()
+        i = 0
         while True:
-            status = self.sfp_event.check_sfp_status(port_dict, error_dict, select_timeout)
-            if bool(port_dict):
-                break
-
-            if not wait_for_ever:
-                elapse = time.time() - begin
-                if elapse * 1000 > timeout:
-                    break
+            try:
+                logger.log_info(f'get_change_event() trying to get changes from queue on iteration {i}')
+                port_dict = self.modules_changes_queue.get(timeout=timeout / 1000)
+                logger.log_info(f'get_change_event() iteration {i} port_dict: {port_dict}')
+            except queue.Empty:
+                logger.log_info(f"failed to get item from modules changes queue on itertaion {i}")
 
-        if status:
             if port_dict:
                 self.reinit_sfps(port_dict)
-            result_dict = {'sfp': port_dict}
-            if error_dict:
+                result_dict = {'sfp': port_dict}
                 result_dict['sfp_error'] = error_dict
-            return True, result_dict
-        else:
-            return True, {'sfp': {}}
+                return True, result_dict
+            else:
+                if not wait_for_ever:
+                    elapse = time.time() - begin
+                    logger.log_info(f"get_change_event: wait_for_ever {wait_for_ever} elapse {elapse} iteartion {i}")
+                    if elapse * 1000 >= timeout:
+                        logger.log_info(f"elapse {elapse} > timeout {timeout} iteartion {i} returning empty dict")
+                        return True, {'sfp': {}}
+            i += 1
 
     def reinit_sfps(self, port_dict):
         """
@@ -426,7 +437,7 @@ def reinit_sfps(self, port_dict):
         for index, status in port_dict.items():
             if status == sfp.SFP_STATUS_INSERTED:
                 try:
-                    self._sfp_list[index - 1].reinit()
+                    self._sfp_list[int(index) - 1].reinit()
                 except Exception as e:
                     logger.log_error("Fail to re-initialize SFP {} - {}".format(index, repr(e)))
 
diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/device_data.py b/platform/mellanox/mlnx-platform-api/sonic_platform/device_data.py
index 8ffb2afed..6bf0a9945 100644
--- a/platform/mellanox/mlnx-platform-api/sonic_platform/device_data.py
+++ b/platform/mellanox/mlnx-platform-api/sonic_platform/device_data.py
@@ -167,7 +167,8 @@ def is_psu_hotswapable(cls):
     @classmethod
     @utils.read_only_cache()
     def get_sfp_count(cls):
-        return utils.read_int_from_file('/run/hw-management/config/module_counter')
+        sfp_count = utils.read_int_from_file('/run/hw-management/config/sfp_counter')
+        return sfp_count if sfp_count > 0 else len(glob.glob('/sys/module/sx_core/asic0/module*'))
 
     @classmethod
     def get_linecard_sfp_count(cls, lc_index):
diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/modules_mgmt.py b/platform/mellanox/mlnx-platform-api/sonic_platform/modules_mgmt.py
new file mode 100644
index 000000000..470b39acb
--- /dev/null
+++ b/platform/mellanox/mlnx-platform-api/sonic_platform/modules_mgmt.py
@@ -0,0 +1,743 @@
+#
+# Copyright (c) 2023 NVIDIA CORPORATION & AFFILIATES.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+import threading
+import time
+import queue
+import os
+import select
+import traceback
+
+try:
+    from sonic_py_common.logger import Logger
+    from sonic_py_common import device_info, multi_asic
+    from .device_data import DeviceDataManager
+    from sonic_platform_base.sonic_xcvr.fields import consts
+    from sonic_platform_base.sonic_xcvr.api.public import cmis
+    from . import sfp as sfp_module
+    from . import utils
+    from swsscommon.swsscommon import SonicV2Connector
+except ImportError as e:
+    raise ImportError (str(e) + "- required module not found")
+
+# Global logger class instance
+logger = Logger()
+
+STATE_HW_NOT_PRESENT = "Initial state. module is not plugged to cage."
+STATE_HW_PRESENT = "Module is plugged to cage"
+STATE_MODULE_AVAILABLE = "Module hw present and power is good"
+STATE_POWERED = "Module power is already loaded"
+STATE_NOT_POWERED = "Module power is not loaded"
+STATE_FW_CONTROL = "The module is not CMIS and FW needs to handle"
+STATE_SW_CONTROL = "The module is CMIS and SW needs to handle"
+STATE_ERROR_HANDLER = "An error occurred - read/write error, power limit or power cap."
+STATE_POWER_LIMIT_ERROR = "The cage has not enough power for the plugged module"
+STATE_SYSFS_ERROR = "An error occurred while writing/reading SySFS."
+
+SAI_PROFILE_FILE = "/{}/sai.profile"
+SAI_INDEP_MODULE_MODE = "SAI_INDEPENDENT_MODULE_MODE"
+SAI_INDEP_MODULE_MODE_DELIMITER = "="
+SAI_INDEP_MODULE_MODE_TRUE_STR = "1"
+SYSFS_LEGACY_FD_PRESENCE = "/sys/module/sx_core/asic0/module{}/present"
+ASIC_NUM = 0
+SYSFS_INDEPENDENT_FD_PREFIX_WO_MODULE = "/sys/module/sx_core/asic{}".format(ASIC_NUM)
+SYSFS_INDEPENDENT_FD_PREFIX = SYSFS_INDEPENDENT_FD_PREFIX_WO_MODULE + "/module{}"
+SYSFS_INDEPENDENT_FD_PRESENCE = os.path.join(SYSFS_INDEPENDENT_FD_PREFIX, "hw_present")
+SYSFS_INDEPENDENT_FD_POWER_GOOD = os.path.join(SYSFS_INDEPENDENT_FD_PREFIX, "power_good")
+SYSFS_INDEPENDENT_FD_POWER_ON = os.path.join(SYSFS_INDEPENDENT_FD_PREFIX, "power_on")
+SYSFS_INDEPENDENT_FD_HW_RESET = os.path.join(SYSFS_INDEPENDENT_FD_PREFIX, "hw_reset")
+SYSFS_INDEPENDENT_FD_POWER_LIMIT = os.path.join(SYSFS_INDEPENDENT_FD_PREFIX, "power_limit")
+SYSFS_INDEPENDENT_FD_FW_CONTROL = os.path.join(SYSFS_INDEPENDENT_FD_PREFIX, "control")
+# echo <val>  /sys/module/sx_core/$asic/$module/frequency   //  val: 0 - up to 400KHz, 1 - up to 1MHz
+SYSFS_INDEPENDENT_FD_FREQ = os.path.join(SYSFS_INDEPENDENT_FD_PREFIX, "frequency")
+SYSFS_INDEPENDENT_FD_FREQ_SUPPORT = os.path.join(SYSFS_INDEPENDENT_FD_PREFIX, "frequency_support")
+IS_INDEPENDENT_MODULE = 'is_independent_module'
+
+MAX_EEPROM_ERROR_RESET_RETRIES = 4
+
+class ModulesMgmtTask(threading.Thread):
+
+    def __init__(self, namespaces=None, main_thread_stop_event=None, q=None):
+        threading.Thread.__init__(self)
+        self.name = "ModulesMgmtTask"
+        self.main_thread_stop_event = main_thread_stop_event
+        self.sfp_port_dict_initial = {}
+        self.sfp_port_dict = {}
+        self.sfp_changes_dict = {}
+        self.sfp_delete_list_from_port_dict = []
+        self.namespaces = namespaces
+        self.modules_changes_queue = q
+        self.is_supported_indep_mods_system = False
+        self.modules_lock_list = []
+        # A set to hold those modules waiting 3 seconds since power on and hw reset
+        self.waiting_modules_list = set()
+        self.timer = threading.Thread()
+        self.poll_obj = None
+        self.fds_mapping_to_obj = {}
+        self.port_to_fds = {}
+        self.fds_events_count_dict = {}
+        self.delete_ports_and_reset_states_dict = {}
+        self.setName("ModulesMgmtTask")
+        self.register_hw_present_fds = []
+
+    # SFPs state machine
+    def get_sm_func(self, sm, port):
+        SFP_SM_ENUM = {STATE_HW_NOT_PRESENT: self.check_if_hw_present
+            , STATE_HW_PRESENT: self.check_if_module_available
+            , STATE_MODULE_AVAILABLE: self.check_if_power_on
+            , STATE_NOT_POWERED: self.power_on_module
+            , STATE_POWERED: self.check_module_type
+            , STATE_FW_CONTROL: self.save_module_control_mode
+            , STATE_SW_CONTROL: self.save_module_control_mode
+            , STATE_ERROR_HANDLER: STATE_ERROR_HANDLER
+            , STATE_POWER_LIMIT_ERROR: STATE_POWER_LIMIT_ERROR
+            , STATE_SYSFS_ERROR: STATE_SYSFS_ERROR
+        }
+        logger.log_info("getting func for state {} for port {}".format(sm, port))
+        try:
+            func = SFP_SM_ENUM[sm]
+            logger.log_info("got func {} for state {} for port {}".format(func, sm, port))
+            return func
+        except KeyError as e:
+            logger.log_error("exception {} for port {} sm {}".format(e, port, sm))
+        return None
+
+    def run(self):
+        # check first if the system supports independent mode and set boolean accordingly
+        (platform_path, hwsku_dir) = device_info.get_paths_to_platform_and_hwsku_dirs()
+        logger.log_info("hwsku_dir {} found, continue to check sai.profile file".format(hwsku_dir))
+        independent_file = SAI_PROFILE_FILE.format(hwsku_dir)
+        if os.path.isfile(independent_file):
+            logger.log_info("file {} found, checking content for independent mode value".format(independent_file))
+            with open(independent_file, "r") as independent_file_fd:
+                found = False
+                independent_file_content = ' '
+                logger.log_info("file {} found, checking content for independent mode value".format(independent_file))
+                while independent_file_content and not found:
+                    independent_file_content = independent_file_fd.readline()
+                    if SAI_INDEP_MODULE_MODE in independent_file_content and \
+                            SAI_INDEP_MODULE_MODE_DELIMITER in independent_file_content:
+                        independent_file_splitted = independent_file_content.split(SAI_INDEP_MODULE_MODE_DELIMITER)
+                        if (len(independent_file_splitted) > 1):
+                            self.is_supported_indep_mods_system = int(independent_file_splitted[1]) == int(SAI_INDEP_MODULE_MODE_TRUE_STR)
+                            logger.log_info("file {} found, system will work in independent mode".format(independent_file))
+                            logger.log_info("value of indep mode var: {} found in file".format(independent_file_splitted[1]))
+                            found = True
+        else:
+            logger.log_info("file {} not found, system stays in legacy mode".format(independent_file))
+
+        # static init - at first go over all ports and check each one if it's independent module or legacy
+        self.sfp_changes_dict = {}
+        # check for each port if the module connected and if it supports independent mode or legacy
+        num_of_ports = DeviceDataManager.get_sfp_count()
+        # create the modules sysfs fds poller
+        self.poll_obj = select.poll()
+        for port in range(num_of_ports):
+            # check sysfs per port whether it's independent mode or legacy
+            temp_module_sm = ModuleStateMachine(port_num=port, initial_state=STATE_HW_NOT_PRESENT
+                                              , current_state=STATE_HW_NOT_PRESENT)
+            module_fd_indep_path = SYSFS_INDEPENDENT_FD_PRESENCE.format(port)
+            logger.log_info("system in indep mode: {} port {}".format(self.is_supported_indep_mods_system, port))
+            if self.is_supported_indep_mods_system and os.path.isfile(module_fd_indep_path):
+                logger.log_info("system in indep mode: {} port {} reading file {}".format(self.is_supported_indep_mods_system, port, module_fd_indep_path))
+                temp_module_sm.set_is_indep_modules(True)
+                temp_module_sm.set_module_fd_path(module_fd_indep_path)
+                module_fd = open(module_fd_indep_path, "r")
+                temp_module_sm.set_module_fd(module_fd)
+            else:
+                module_fd_legacy_path = self.get_sysfs_ethernet_port_fd(SYSFS_LEGACY_FD_PRESENCE, port)
+                temp_module_sm.set_module_fd_path(module_fd_legacy_path)
+                module_fd = open(module_fd_legacy_path, "r")
+                temp_module_sm.set_module_fd(module_fd)
+            # add lock to use with timer task updating next state per module object
+            self.modules_lock_list.append(threading.Lock())
+            # start SM for this independent module
+            logger.log_info("adding temp_module_sm {} to sfp_port_dict".format(temp_module_sm))
+            self.sfp_port_dict_initial[port] = temp_module_sm
+            self.sfp_port_dict[port] = temp_module_sm
+
+        i = 0
+        # need at least 1 module in final state until it makes sense to send changes dict
+        is_final_state_module = False
+        all_static_detection_done = False
+        logger.log_info(f"sfp_port_dict before starting static detection: {self.sfp_port_dict} main_thread_stop_event: "
+                    f"{self.main_thread_stop_event.is_set()} all_static_detection_done: {all_static_detection_done}")
+        # static detection - loop on different state for all ports until all done
+        while not self.main_thread_stop_event.is_set() and not all_static_detection_done:
+            logger.log_info("static detection running iteration {}".format(i))
+            waiting_list_len = len(self.waiting_modules_list)
+            sfp_port_dict_keys_len = len(self.sfp_port_dict.keys())
+            if waiting_list_len == sfp_port_dict_keys_len:
+                logger.log_info("static detection length of waiting list {}: {} and sfp port dict keys {}:{} is the same, sleeping 1 second..."
+                              .format(waiting_list_len, self.waiting_modules_list, sfp_port_dict_keys_len, self.sfp_port_dict.keys()))
+                time.sleep(1)
+            else:
+                logger.log_info("static detectionlength of waiting list {}: {} and sfp port dict keys {}: {} is different, NOT sleeping 1 second"
+                              .format(waiting_list_len, self.waiting_modules_list, sfp_port_dict_keys_len, self.sfp_port_dict.keys()))
+            for port_num, module_sm_obj in self.sfp_port_dict.items():
+                curr_state = module_sm_obj.get_current_state()
+                logger.log_info(f'static detection STATE_LOG {port_num}: curr_state is {curr_state}')
+                func = self.get_sm_func(curr_state, port_num)
+                logger.log_info("static detection got returned func {} for state {}".format(func, curr_state))
+                try:
+                    if not isinstance(func, str):
+                        if func is not None:
+                            next_state = func(port_num, module_sm_obj)
+                except TypeError as e:
+                    logger.log_info("static detection exception {} for port {} traceback:\n{}".format(e, port_num, traceback.format_exc()))
+                    module_sm_obj.set_final_state(STATE_ERROR_HANDLER)
+                    continue
+                logger.log_info(f'static detection STATE_LOG {port_num}: next_state is {next_state}')
+                if self.timer.is_alive():
+                    logger.log_info("static detection timer threads is alive, acquiring lock")
+                    self.modules_lock_list[port_num].acquire()
+                # for STATE_NOT_POWERED we dont advance to next state, timerTask is doing it into STATE_POWERED
+                if curr_state != STATE_NOT_POWERED or not module_sm_obj.wait_for_power_on:
+                    module_sm_obj.set_next_state(next_state)
+                    module_sm_obj.advance_state()
+                if module_sm_obj.get_final_state():
+                    logger.log_info(f'static detection STATE_LOG {port_num}: enter final state {module_sm_obj.get_final_state()}')
+                    is_final_state_module = True
+                if self.timer.is_alive():
+                    self.modules_lock_list[port_num].release()
+                is_timer_alive = self.timer.is_alive()
+                logger.log_info("static detection timer thread is_alive {} port {}".format(is_timer_alive, port_num))
+                if STATE_NOT_POWERED == curr_state:
+                    if not is_timer_alive:
+                        logger.log_info ("static detection curr_state is {} and timer thread is_alive {}, running timer task thread"
+                               .format(curr_state, is_timer_alive))
+                        # call timer task
+                        self.timer = threading.Timer(1.0, self.timerTask)
+                        self.timer.start()
+                    if self.timer.is_alive():
+                        logger.log_info("timer thread is_alive {}, locking module obj".format(self.timer.is_alive()))
+                        self.modules_lock_list[port_num].acquire()
+                    module_sm_obj.set_next_state(next_state)
+                    if self.timer.is_alive():
+                        logger.log_info("timer thread is_alive {}, releasing module obj".format(self.timer.is_alive()))
+                        self.modules_lock_list[port_num].release()
+
+            if is_final_state_module:
+                self.map_ports_final_state()
+                self.delete_ports_from_dict()
+                self.send_changes_to_shared_queue()
+                self.register_presece_closed_ports(False, self.register_hw_present_fds)
+            i += 1
+            self.register_hw_present_fds = []
+            logger.log_info("sfp_port_dict: {}".format(self.sfp_port_dict))
+            for port_num, module_sm_obj in self.sfp_port_dict.items():
+                logger.log_info("static detection port_num: {} initial state: {} current_state: {} next_state: {}"
+                       .format(port_num, module_sm_obj.initial_state, module_sm_obj.get_current_state()
+                               , module_sm_obj.get_next_state()))
+            sfp_port_dict_keys_len = len(self.sfp_port_dict.keys())
+            if sfp_port_dict_keys_len == 0:
+                logger.log_info("static detection len of keys of sfp_port_dict is 0: {}".format(sfp_port_dict_keys_len))
+                all_static_detection_done = True
+            else:
+                logger.log_info("static detection len of keys of sfp_port_dict is not 0: {}".format(sfp_port_dict_keys_len))
+            logger.log_info("static detection all_static_detection_done: {}".format(all_static_detection_done))
+
+        logger.log_info(f"sfp_port_dict before dynamic detection: {self.sfp_port_dict} "
+                        f"main_thread_stop_event.is_set(): {self.main_thread_stop_event.is_set()}")
+        # dynamic detection - loop on polling changes, run state machine for them and put them into shared queue
+        i = 0
+        # need at least 1 module in final state until it makes sense to send changes dict
+        is_final_state_module = False
+        # initialize fds events count to 0
+        for fd_fileno in self.fds_mapping_to_obj:
+            module_obj = self.fds_mapping_to_obj[fd_fileno]['module_obj']
+            # for debug purposes
+            self.fds_events_count_dict[module_obj.port_num] = { 'presence' : 0 , 'power_good' : 0 }
+        while not self.main_thread_stop_event.is_set():
+            logger.log_info("dynamic detection running iteration {}".format(i))
+            # poll for changes with 1 second timeout
+            fds_events = self.poll_obj.poll(1000)
+            logger.log_info("dynamic detection polled obj checking fds_events iteration {}".format(i))
+            for fd, event in fds_events:
+                # get modules object from fd according to saved key-value of fd-module obj saved earlier
+                logger.log_info("dynamic detection working on fd {} event {}".format(fd, event))
+                module_obj = self.fds_mapping_to_obj[fd]['module_obj']
+                module_fd = self.fds_mapping_to_obj[fd]['fd']
+                fd_name = self.fds_mapping_to_obj[fd]['fd_name']
+                if 'presence' == fd_name:
+                    module_fd_path = module_obj.module_fd_path
+                elif 'power_good' == fd_name:
+                    module_fd_path = module_obj.module_power_good_fd_path
+                self.fds_events_count_dict[module_obj.port_num][fd_name] += 1
+                try:
+                    val = module_fd.read()
+                    module_fd.seek(0)
+                    logger.log_info("dynamic detection got module_obj {} with port {} from fd number {} path {} val {} count {}"
+                                  .format(module_obj, module_obj.port_num, fd, module_fd_path
+                                          , val, self.fds_events_count_dict[module_obj.port_num]))
+                    # workaround for garbage received after the 0 or 1 value of sysfs i.e. 0#012 or 1#012
+                    if len(val) > 1:
+                        val = val[0]
+                    if self.is_dummy_event(int(val), module_obj):
+                        logger.log_info(f"dynamic detection dummy event port {module_obj.port_num} from fd number {fd}")
+                        continue
+                    if module_obj.port_num not in self.sfp_port_dict.keys():
+                        logger.log_info("dynamic detection port {} not found in sfp_port_dict keys: {} adding it"
+                                        .format(module_obj.port_num, self.sfp_port_dict.keys()))
+                        self.deregister_fd_from_polling(module_obj.port_num)
+                        # put again module obj in sfp_port_dict so next loop will work on it
+                        self.sfp_port_dict[module_obj.port_num] = module_obj
+                        self.delete_ports_and_reset_states_dict[module_obj.port_num] = val
+                except Exception as e:
+                    logger.log_error("dynamic detection exception on read presence {} for port {} fd name {} traceback:\n{}"
+                                    .format(e, module_obj.port_num, module_fd.name, traceback.format_exc()))
+            for port, val in self.delete_ports_and_reset_states_dict.items():
+                logger.log_info(f"dynamic detection resetting all states for port {port} close_presence_ports {val}")
+                module_obj = self.sfp_port_dict[port]
+                module_obj.reset_all_states(close_presence_ports=val)
+            self.delete_ports_and_reset_states_dict = {}
+            for port_num, module_sm_obj in self.sfp_port_dict.items():
+                curr_state = module_sm_obj.get_current_state()
+                logger.log_info(f'dynamic detection STATE_LOG {port_num}: curr_state is {curr_state}')
+                func = self.get_sm_func(curr_state, port)
+                logger.log_info("dynamic detection got returned func {} for state {}".format(func, curr_state))
+                try:
+                    if func is not None:
+                        next_state = func(port_num, module_sm_obj, dynamic=True)
+                except TypeError as e:
+                    logger.log_info("exception {} for port {}".format(e, port_num))
+                    continue
+                logger.log_info(f'dynamic detection STATE_LOG {port_num}: next_state is {next_state}')
+                if self.timer.is_alive():
+                    logger.log_info("dynamic detection timer threads is alive, acquiring lock")
+                    self.modules_lock_list[port_num].acquire()
+                if curr_state != STATE_NOT_POWERED or not module_sm_obj.wait_for_power_on:
+                    module_sm_obj.set_next_state(next_state)
+                    module_sm_obj.advance_state()
+                if module_sm_obj.get_final_state():
+                    logger.log_info(f'dynamic detection STATE_LOG {port_num}: enter final state {module_sm_obj.get_final_state()}')
+                    is_final_state_module = True
+                if self.timer.is_alive():
+                    self.modules_lock_list[port_num].release()
+                is_timer_alive = self.timer.is_alive()
+                logger.log_info("dynamic detection timer thread is_alive {} port {}".format(is_timer_alive, port_num))
+                if STATE_NOT_POWERED == curr_state:
+                    if not is_timer_alive:
+                        logger.log_info("dynamic detection curr_state is {} and timer thread is_alive {}, running timer task thread"
+                                      .format(curr_state, is_timer_alive))
+                        # call timer task
+                        self.timer = threading.Timer(1.0, self.timerTask)
+                        self.timer.start()
+                    if self.timer.is_alive():
+                        logger.log_info("dynamic detection timer thread is_alive {}, locking module obj".format(self.timer.is_alive()))
+                        self.modules_lock_list[port_num].acquire()
+                    module_sm_obj.set_next_state(next_state)
+                    if self.timer.is_alive():
+                        logger.log_info(
+                            "dynamic detection timer thread is_alive {}, releasing module obj".format(self.timer.is_alive()))
+                        self.modules_lock_list[port_num].release()
+
+            if is_final_state_module:
+                self.map_ports_final_state(dynamic=True)
+                self.delete_ports_from_dict(dynamic=True)
+                self.send_changes_to_shared_queue(dynamic=True)
+                self.register_presece_closed_ports(True, self.register_hw_present_fds)
+            if not self.sfp_port_dict and is_final_state_module:
+                is_final_state_module = False
+                logger.log_info(f"sft_port_dict is empty {self.sfp_port_dict}, set is_final_state_module to {is_final_state_module}")
+            self.register_hw_present_fds = []
+            i += 1
+            logger.log_info("sfp_port_dict: {}".format(self.sfp_port_dict))
+            for port_num, module_sm_obj in self.sfp_port_dict.items():
+                logger.log_info("port_num: {} module_sm_obj initial state: {} current_state: {} next_state: {}"
+                       .format(port_num, module_sm_obj.initial_state, module_sm_obj.get_current_state(), module_sm_obj.get_next_state()))
+
+    def is_dummy_event(self, val, module_sm_obj):
+        if val == 1:
+            return module_sm_obj.final_state in (STATE_HW_PRESENT, STATE_SW_CONTROL, STATE_FW_CONTROL)
+        elif val == 0:
+            return module_sm_obj.final_state in (STATE_HW_NOT_PRESENT,)
+        return False
+
+    def check_if_hw_present(self, port, module_sm_obj, dynamic=False):
+        detection_method = 'dynamic' if dynamic else 'static'
+        logger.log_info(f"{detection_method} detection enter check_if_hw_present port {port} module_sm_obj {module_sm_obj}")
+        module_fd_indep_path = module_sm_obj.module_fd_path
+        if os.path.isfile(module_fd_indep_path):
+            try:
+                val_int = utils.read_int_from_file(module_fd_indep_path)
+                if 0 == val_int:
+                    logger.log_info("returning {} for val {}".format(STATE_HW_NOT_PRESENT, val_int))
+                    retval_state = STATE_HW_NOT_PRESENT
+                    module_sm_obj.set_final_state(retval_state, detection_method)
+                    return retval_state
+                elif 1 == val_int:
+                    logger.log_info("returning {} for val {}".format(STATE_HW_PRESENT, val_int))
+                    retval_state = STATE_HW_PRESENT
+                    if not self.is_supported_indep_mods_system:
+                        module_sm_obj.set_final_state(retval_state, detection_method)
+                        self.register_fd_for_polling(module_sm_obj, module_sm_obj.module_fd, 'presence')
+                    return retval_state
+            except Exception as e:
+                logger.log_info("exception {} for port {} setting final state STATE_ERROR_HANDLER".format(e, port))
+                module_sm_obj.set_final_state(STATE_ERROR_HANDLER)
+                return STATE_ERROR_HANDLER
+        module_sm_obj.set_final_state(STATE_HW_NOT_PRESENT, detection_method)
+        return STATE_HW_NOT_PRESENT
+
+    def check_if_module_available(self, port, module_sm_obj, dynamic=False):
+        logger.log_info("enter check_if_module_available port {} module_sm_obj {}".format(port, module_sm_obj))
+        module_fd_indep_path = SYSFS_INDEPENDENT_FD_POWER_GOOD.format(port)
+        if os.path.isfile(module_fd_indep_path):
+            try:
+                # not using utils.read_int_from_file since need to catch the exception here if no such file or it is
+                # not accesible. utils.read_int_from_file will return 0 in such a case
+                module_power_good_fd = open(module_fd_indep_path, "r")
+                val = module_power_good_fd.read()
+                val_int = int(val)
+                module_sm_obj.module_power_good_fd_path = module_fd_indep_path
+                module_sm_obj.module_power_good_fd = module_power_good_fd
+
+                if 0 == val_int:
+                    logger.log_info(f'port {port} power is not good')
+                    module_sm_obj.set_final_state(STATE_HW_NOT_PRESENT)
+                    return STATE_HW_NOT_PRESENT
+                elif 1 == val_int:
+                    logger.log_info(f'port {port} power is good')
+                    return STATE_MODULE_AVAILABLE
+            except Exception as e:
+                logger.log_info("exception {} for port {}".format(e, port))
+                return STATE_HW_NOT_PRESENT
+        logger.log_info(f'port {port} has no power good file {module_fd_indep_path}')
+        module_sm_obj.set_final_state(STATE_HW_NOT_PRESENT)
+        return STATE_HW_NOT_PRESENT
+
+    def check_if_power_on(self, port, module_sm_obj, dynamic=False):
+        logger.log_info(f'enter check_if_power_on for port {port}')
+        module_fd_indep_path = SYSFS_INDEPENDENT_FD_POWER_ON.format(port)
+        if os.path.isfile(module_fd_indep_path):
+            try:
+                val_int = utils.read_int_from_file(module_fd_indep_path)
+                if 0 == val_int:
+                    logger.log_info(f'check_if_power_on port {port} is not powered')
+                    return STATE_NOT_POWERED
+                elif 1 == val_int:
+                    logger.log_info(f'check_if_power_on port {port} is powered')
+                    return STATE_POWERED
+            except Exception as e:
+                logger.log_info(f'check_if_power_on got exception {e}')
+                module_sm_obj.set_final_state(STATE_HW_NOT_PRESENT)
+                return STATE_HW_NOT_PRESENT
+
+    def power_on_module(self, port, module_sm_obj, dynamic=False):
+        logger.log_info(f'enter power_on_module for port {port}')
+        if not module_sm_obj.wait_for_power_on:
+            module_fd_indep_path_po = SYSFS_INDEPENDENT_FD_POWER_ON.format(port)
+            module_fd_indep_path_r = SYSFS_INDEPENDENT_FD_HW_RESET.format(port)
+            try:
+                if os.path.isfile(module_fd_indep_path_po):
+                    logger.log_info("powerOnModule powering on via {} for port {}".format(module_fd_indep_path_po, port))
+                    # echo 1 > /sys/module/sx_core/$asic/$module/power_on
+                    utils.write_file(module_fd_indep_path_po, "1")
+                if os.path.isfile(module_fd_indep_path_r):
+                    logger.log_info("powerOnModule resetting via {} for port {}".format(module_fd_indep_path_r, port))
+                    # echo 0 > /sys/module/sx_core/$asic/$module/hw_reset
+                    utils.write_file(module_fd_indep_path_r, "0")
+                self.add_port_to_wait_reset(module_sm_obj)
+            except Exception as e:
+                logger.log_info("exception in powerOnModule {} for port {}".format(e, port))
+                return STATE_HW_NOT_PRESENT
+        return STATE_NOT_POWERED
+
+    def check_module_type(self, port, module_sm_obj, dynamic=False):
+        logger.log_info("enter check_module_type port {} module_sm_obj {}".format(port, module_sm_obj))
+        sfp = sfp_module.SFP(port)
+        xcvr_api = sfp.get_xcvr_api()
+        if not xcvr_api:
+            logger.log_info("check_module_type calling sfp reinit for port {} module_sm_obj {}"
+                            .format(port, module_sm_obj))
+            sfp.reinit()
+            logger.log_info("check_module_type setting as FW control as xcvr_api is empty for port {} module_sm_obj {}"
+                            .format(port, module_sm_obj))
+            return STATE_FW_CONTROL
+        # QSFP-DD ID is 24, OSFP ID is 25 - only these 2 are supported currently as independent module - SW controlled
+        if not isinstance(xcvr_api, cmis.CmisApi):
+            logger.log_info("check_module_type setting STATE_FW_CONTROL for {} in check_module_type port {} module_sm_obj {}"
+                            .format(xcvr_api, port, module_sm_obj))
+            return STATE_FW_CONTROL
+        else:
+            if xcvr_api.is_flat_memory():
+                logger.log_info("check_module_type port {} setting STATE_FW_CONTROL module ID {} due to flat_mem device"
+                              .format(xcvr_api, port))
+                return STATE_FW_CONTROL
+            logger.log_info("check_module_type checking power cap for {} in check_module_type port {} module_sm_obj {}"
+                               .format(xcvr_api, port, module_sm_obj))
+            power_cap = self.check_power_cap(port, module_sm_obj)
+            if power_cap is STATE_POWER_LIMIT_ERROR:
+                module_sm_obj.set_final_state(STATE_POWER_LIMIT_ERROR)
+                return STATE_POWER_LIMIT_ERROR
+            else:
+                # first read the frequency support - if it's 1 then continue, if it's 0 no need to do anything
+                module_fd_freq_support_path = SYSFS_INDEPENDENT_FD_FREQ_SUPPORT.format(port)
+                val_int = utils.read_int_from_file(module_fd_freq_support_path)
+                if 1 == val_int:
+                    # read the module maximum supported clock of Management Comm Interface (MCI) from module EEPROM.
+                    # from byte 2 bits 3-2:
+                    # 00b means module supports up to 400KHz
+                    # 01b means module supports up to 1MHz
+                    logger.log_info(f"check_module_type reading mci max frequency for port {port}")
+                    read_mci = xcvr_api.xcvr_eeprom.read_raw(2, 1)
+                    logger.log_info(f"check_module_type read mci max frequency {read_mci} for port {port}")
+                    mci_bits = read_mci & 0b00001100
+                    logger.log_info(f"check_module_type read mci max frequency bits {mci_bits} for port {port}")
+                    # Then, set it to frequency Sysfs using:
+                    # echo <val> > /sys/module/sx_core/$asic/$module/frequency //  val: 0 - up to 400KHz, 1 - up to 1MHz
+                    indep_fd_freq = SYSFS_INDEPENDENT_FD_FREQ.format(port)
+                    utils.write_file(indep_fd_freq, mci_bits)
+                return STATE_SW_CONTROL
+
+    def check_power_cap(self, port, module_sm_obj, dynamic=False):
+        logger.log_info("enter check_power_cap port {} module_sm_obj {}".format(port, module_sm_obj))
+        sfp = sfp_module.SFP(port)
+        xcvr_api = sfp.get_xcvr_api()
+        field = xcvr_api.xcvr_eeprom.mem_map.get_field(consts.MAX_POWER_FIELD)
+        powercap_ba = xcvr_api.xcvr_eeprom.reader(field.get_offset(), field.get_size())
+        logger.log_info("check_power_cap got powercap bytearray {} for port {} module_sm_obj {}".format(powercap_ba, port, module_sm_obj))
+        powercap = int.from_bytes(powercap_ba, "big")
+        logger.log_info("check_power_cap got powercap {} for port {} module_sm_obj {}".format(powercap, port, module_sm_obj))
+        indep_fd_power_limit = self.get_sysfs_ethernet_port_fd(SYSFS_INDEPENDENT_FD_POWER_LIMIT, port)
+        cage_power_limit = utils.read_int_from_file(indep_fd_power_limit)
+        logger.log_info("check_power_cap got cage_power_limit {} for port {} module_sm_obj {}".format(cage_power_limit, port, module_sm_obj))
+        if powercap > int(cage_power_limit):
+            logger.log_info("check_power_cap powercap {} != cage_power_limit {} for port {} module_sm_obj {}".format(powercap, cage_power_limit, port, module_sm_obj))
+            module_sm_obj.set_final_state(STATE_POWER_LIMIT_ERROR)
+            return STATE_POWER_LIMIT_ERROR
+
+    def save_module_control_mode(self, port, module_sm_obj, dynamic=False):
+        detection_method = 'dynamic' if dynamic else 'static'
+        logger.log_info("{} detection save_module_control_mode setting current state {} for port {} as final state"
+                        .format(detection_method, module_sm_obj.get_current_state(), port))
+        state = module_sm_obj.get_current_state()
+        module_sm_obj.set_final_state(state)
+        try:
+            if state == STATE_FW_CONTROL:
+                # echo 0 > /sys/module/sx_core/$asic/$module/control
+                indep_fd_fw_control = SYSFS_INDEPENDENT_FD_FW_CONTROL.format(port)
+                utils.write_file(indep_fd_fw_control, "0")
+                logger.log_info("save_module_control_mode set FW control for state {} port {}".format(state, port))
+                # update the presence sysfs fd to legacy FD presence, first close the previous fd
+                module_sm_obj.module_fd.close()
+                module_fd_legacy_path = SYSFS_LEGACY_FD_PRESENCE.format(port)
+                module_sm_obj.set_module_fd_path(module_fd_legacy_path)
+                module_fd = open(module_fd_legacy_path, "r")
+                module_sm_obj.set_module_fd(module_fd)
+                logger.log_info("save_module_control_mode changed module fd to legacy present for port {}".format(port))
+            else:
+                # registering power good sysfs even if not good, so we can get an event from poller upon changes
+                self.register_fd_for_polling(module_sm_obj, module_sm_obj.module_power_good_fd, 'power_good')
+            # register the module's sysfs fd to poller with ERR and PRI attrs
+            logger.log_info("save_module_control_mode registering sysfs fd {} number {} path {} for port {}"
+                          .format(module_sm_obj.module_fd, module_sm_obj.module_fd.fileno(), module_sm_obj.set_module_fd_path, port))
+        except Exception as e:
+            logger.log_error("{} detection exception on read presence {} for port {} fd name {} traceback:\n{}"
+                             .format(detection_method, e, port, module_sm_obj.module_fd.name, traceback.format_exc()))
+        self.register_fd_for_polling(module_sm_obj, module_sm_obj.module_fd, 'presence')
+        logger.log_info("save_module_control_mode set current state {} for port {} as final state {}".format(
+            module_sm_obj.get_current_state(), port, module_sm_obj.get_final_state()))
+
+    def register_fd_for_polling(self, module_sm_obj, fd, fd_name):
+        self.fds_mapping_to_obj[fd.fileno()] = {'module_obj' : module_sm_obj,
+                                                'fd': fd,
+                                                'fd_name' : fd_name}
+        if module_sm_obj.port_num not in self.port_to_fds:
+            self.port_to_fds[module_sm_obj.port_num] = [fd]
+        else:
+            self.port_to_fds[module_sm_obj.port_num].append(fd)
+        self.poll_obj.register(fd, select.POLLERR | select.POLLPRI)
+
+    def deregister_fd_from_polling(self, port):
+        if port in self.port_to_fds:
+            fds = self.port_to_fds[port]
+            for fd in fds:
+                self.fds_mapping_to_obj.pop(fd.fileno())
+                self.poll_obj.unregister(fd)
+            self.port_to_fds.pop(port)
+
+    def timerTask(self): # wakes up every 1 second
+        logger.log_info("timerTask entered run state")
+        empty = False
+        i = 0
+        while not empty:
+            logger.log_info("timerTask while loop itartion {}".format(i))
+            empty = True
+            port_list_to_delete = []
+            for port in self.waiting_modules_list:
+                logger.log_info("timerTask working on port {}".format(port))
+                empty = False
+                module = self.sfp_port_dict[port]
+                logger.log_info("timerTask got module with port_num {} from port {}".format(module.port_num, port))
+                state = module.get_current_state()
+                if module and state == STATE_NOT_POWERED:
+                    logger.log_info("timerTask module {} current_state {} counting seconds since reset_start_time"
+                                  .format(module, module.get_current_state()))
+                    if time.time() - module.reset_start_time >= 3:
+                        # set next state as STATE_POWERED state to trigger the function of check module type
+                        logger.log_info("timerTask module port {} locking lock of port {}".format(module.port_num, module.port_num))
+                        self.modules_lock_list[module.port_num].acquire()
+                        logger.log_info("timerTask module port {} setting next state to STATE_POWERED".format(module.port_num))
+                        module.set_next_state(STATE_POWERED)
+                        logger.log_info("timerTask module port {} advancing next state".format(module.port_num))
+                        module.advance_state()
+                        logger.log_info("timerTask module port {} releasing lock of port {}".format(port, module.port_num))
+                        self.modules_lock_list[module.port_num].release()
+                        logger.log_info("timerTask module port {} adding to delete list to remove from waiting_modules_list".format(module.port_num))
+                        port_list_to_delete.append(module.port_num)
+            logger.log_info("timerTask deleting ports {} from waiting_modules_list...".format(port_list_to_delete))
+            for port in port_list_to_delete:
+                logger.log_info("timerTask deleting port {} from waiting_modules_list".format(port))
+                self.waiting_modules_list.remove(port)
+            logger.log_info("timerTask waiting_modules_list after deletion: {}".format(self.waiting_modules_list))
+            time.sleep(1)
+            i += 1
+
+    def get_sysfs_ethernet_port_fd(self, sysfs_fd, port):
+        sysfs_eth_port_fd = sysfs_fd.format(port)
+        return sysfs_eth_port_fd
+
+    def add_port_to_wait_reset(self, module_sm_obj):
+        module_sm_obj.reset_start_time = time.time()
+        logger.log_info("add_port_to_wait_reset reset_start_time {}".format(module_sm_obj.reset_start_time))
+        module_sm_obj.wait_for_power_on = True
+        logger.log_info("add_port_to_wait_reset wait_for_power_on {}".format(module_sm_obj.wait_for_power_on))
+        self.waiting_modules_list.add(module_sm_obj.port_num)
+        logger.log_info("add_port_to_wait_reset waiting_list after adding: {}".format(self.waiting_modules_list))
+
+    def map_ports_final_state(self, dynamic=False):
+        detection_method = 'dynamic' if dynamic else 'static'
+        logger.log_info(f"{detection_method} detection enter map_ports_final_state")
+        for port, module_obj in self.sfp_port_dict.items():
+            final_state = module_obj.get_final_state()
+            if final_state:
+                # add port to delete list that we will iterate on later and delete the ports from sfp_port_dict
+                self.sfp_delete_list_from_port_dict.append(port)
+                if final_state in [STATE_HW_NOT_PRESENT, STATE_POWER_LIMIT_ERROR, STATE_ERROR_HANDLER]:
+                    port_status = '0'
+                    logger.log_info(f"{detection_method} detection adding port {port} to register_hw_present_fds")
+                    self.register_hw_present_fds.append(module_obj)
+                else:
+                    port_status = '1'
+                self.sfp_changes_dict[str(module_obj.port_num + 1)] = port_status
+
+    def delete_ports_from_dict(self, dynamic=False):
+        detection_method = 'dynamic' if dynamic else 'static'
+        logger.log_info(f"{detection_method} detection sfp_port_dict before deletion: {self.sfp_port_dict}")
+        for port in self.sfp_delete_list_from_port_dict:
+            del self.sfp_port_dict[port]
+        self.sfp_delete_list_from_port_dict = []
+        logger.log_info("{} detection sfp_port_dict after deletion: {}".format(detection_method, self.sfp_port_dict))
+
+    def send_changes_to_shared_queue(self, dynamic=False):
+        detection_method = 'dynamic' if dynamic else 'static'
+        if self.sfp_changes_dict:
+            logger.log_info(f"{detection_method} detection putting sfp_changes_dict {self.sfp_changes_dict} "
+                               f"in modules changes queue...")
+            try:
+                self.modules_changes_queue.put(self.sfp_changes_dict, timeout=1)
+                self.sfp_changes_dict = {}
+                logger.log_info(f"{detection_method} sfp_changes_dict after put changes: {self.sfp_changes_dict}")
+            except queue.Full:
+                logger.log_info(f"{detection_method} failed to put item from modules changes queue, queue is full")
+        else:
+            logger.log_info(f"{detection_method} sfp_changes_dict {self.sfp_changes_dict} is empty...")
+
+    def register_presece_closed_ports(self, dynamic=False, module_obj_list=[]):
+        detection_method = 'dynamic' if dynamic else 'static'
+        logger.log_info(f"{detection_method} detection enter register_presence_closed_ports")
+        for module_obj in module_obj_list:
+            port = module_obj.port_num
+            if self.is_supported_indep_mods_system:
+                module_fd_indep_path = SYSFS_INDEPENDENT_FD_PRESENCE.format(port)
+            else:
+                module_fd_indep_path = SYSFS_LEGACY_FD_PRESENCE.format(port)
+            module_obj.set_module_fd_path(module_fd_indep_path)
+            module_fd = open(module_fd_indep_path, "r")
+            module_obj.set_module_fd(module_fd)
+            logger.log_info(f"{detection_method} registering fd {module_fd} fd name {module_fd.name} for port {port}")
+            self.register_fd_for_polling(module_obj, module_fd, 'presence')
+
+class ModuleStateMachine(object):
+
+    def __init__(self, port_num=0, initial_state=STATE_HW_NOT_PRESENT, current_state=STATE_HW_NOT_PRESENT
+                 , next_state=STATE_HW_NOT_PRESENT, final_state='', is_indep_module=False
+                 , module_fd_path='', module_fd=None, reset_start_time=None
+                 , eeprom_poweron_reset_retries=1, module_power_good_fd_path=None, module_power_good_fd=None):
+
+        self.port_num = port_num
+        self.initial_state = initial_state
+        self.current_state = current_state
+        self.next_state = next_state
+        self.final_state = final_state
+        self.is_indep_modules = is_indep_module
+        self.module_fd_path = module_fd_path
+        self.module_fd = module_fd
+        self.reset_start_time = reset_start_time
+        self.wait_for_power_on = False
+        self.eeprom_poweron_reset_retries = eeprom_poweron_reset_retries
+        self.module_power_good_fd_path = module_power_good_fd_path
+        self.module_power_good_fd = module_power_good_fd
+
+    def set_initial_state(self, state):
+        self.initial_state = state
+
+    def get_current_state(self):
+        return self.current_state
+
+    def set_current_state(self, state):
+        self.current_state = state
+
+    def get_next_state(self):
+        return self.next_state
+
+    def set_next_state(self, state):
+        self.next_state = state
+
+    def get_final_state(self):
+        return self.final_state
+
+    def set_final_state(self, state, detection_method='static'):
+        logger.log_info(f"{detection_method} set_final_state setting {state} port {self.port_num}")
+        self.final_state = state
+
+    def advance_state(self):
+        self.set_current_state(self.next_state)
+        self.next_state = ''
+
+    def set_is_indep_modules(self, is_indep_modules):
+        self.is_indep_modules = is_indep_modules
+
+    def set_module_fd_path(self, module_fd_path):
+        self.module_fd_path = module_fd_path
+
+    def set_module_fd(self, module_fd):
+        self.module_fd = module_fd
+
+    def reset_all_states(self, def_state=STATE_HW_NOT_PRESENT, retries=1, close_presence_ports='0'):
+        self.initial_state = def_state
+        self.current_state = def_state
+        self.next_state = def_state
+        self.final_state = ''
+        self.wait_for_power_on = False
+        self.eeprom_poweron_reset_retries = retries
+        if '0' == close_presence_ports:
+            self.module_fd.close()
+        if self.module_power_good_fd:
+            self.module_power_good_fd.close()
diff --git a/platform/mellanox/mlnx-platform-api/tests/test_chassis.py b/platform/mellanox/mlnx-platform-api/tests/test_chassis.py
index aefff3a7f..fce9bd00b 100644
--- a/platform/mellanox/mlnx-platform-api/tests/test_chassis.py
+++ b/platform/mellanox/mlnx-platform-api/tests/test_chassis.py
@@ -167,20 +167,11 @@ def test_sfp(self):
         assert len(sfp_list) == 3
         assert chassis.sfp_initialized_count == 3
 
-    @mock.patch('sonic_platform.sfp_event.sfp_event.check_sfp_status', MagicMock())
-    @mock.patch('sonic_platform.sfp_event.sfp_event.__init__', MagicMock(return_value=None))
-    @mock.patch('sonic_platform.sfp_event.sfp_event.initialize', MagicMock())
     @mock.patch('sonic_platform.device_data.DeviceDataManager.get_sfp_count', MagicMock(return_value=3))
     def test_change_event(self):
-        from sonic_platform.sfp_event import sfp_event
-
-        return_port_dict = {1: '1'}
-        def mock_check_sfp_status(self, port_dict, error_dict, timeout):
-            port_dict.update(return_port_dict)
-            return True if port_dict else False
-
-        sfp_event.check_sfp_status = mock_check_sfp_status
         chassis = Chassis()
+        chassis.modules_mgmt_thread.is_alive = MagicMock(return_value=True)
+        chassis.modules_changes_queue.get = MagicMock(return_value={1: '1'})
 
         # Call get_change_event with timeout=0, wait until an event is detected
         status, event_dict = chassis.get_change_event()
@@ -189,7 +180,7 @@ def mock_check_sfp_status(self, port_dict, error_dict, timeout):
         assert len(chassis._sfp_list) == 3
 
         # Call get_change_event with timeout=1.0
-        return_port_dict = {}
+        chassis.modules_changes_queue.get.return_value = {}
         status, event_dict = chassis.get_change_event(timeout=1.0)
         assert status is True
         assert 'sfp' in event_dict and not event_dict['sfp']

From 6435df10566881b2f5f81ee9ef292feb6010aa97 Mon Sep 17 00:00:00 2001
From: Stepan Blyshchak <38952541+stepanblyschak@users.noreply.github.com>
Date: Thu, 7 Dec 2023 15:22:44 +0200
Subject: [PATCH 0031/1115] [config-topology] use cached variables (#17343)

- Why I did it
Improve  boot performance mostly needed for fast and warmboot

- How I did it
Use cached variable.

- How to verify it
Boot the system. Simply do "systemd-analyze blame" and look at service start time.

Signed-off-by: Stepan Blyschak <stepanb@nvidia.com>
---
 files/image_config/config-topology/config-topology.sh | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/files/image_config/config-topology/config-topology.sh b/files/image_config/config-topology/config-topology.sh
index 9ba06cb87..2bc2b7861 100755
--- a/files/image_config/config-topology/config-topology.sh
+++ b/files/image_config/config-topology/config-topology.sh
@@ -4,7 +4,7 @@
 # which could be used for platform specific topology configuration
 #
 start() {
-    PLATFORM=`sonic-cfggen -H -v DEVICE_METADATA.localhost.platform`
+    PLATFORM=${PLATFORM:-`sonic-cfggen -H -v DEVICE_METADATA.localhost.platform`}
     #Path to platform topology script
     TOPOLOGY_SCRIPT="/usr/share/sonic/device/$PLATFORM/plugins/config-topology.sh"
     #if topology script file not present, do nothing and return 0
@@ -13,7 +13,7 @@ start() {
 }
 
 stop() {
-    PLATFORM=`sonic-cfggen -H -v DEVICE_METADATA.localhost.platform`
+    PLATFORM=${PLATFORM:-`sonic-cfggen -H -v DEVICE_METADATA.localhost.platform`}
     #Path to platform topology script
     TOPOLOGY_SCRIPT="/usr/share/sonic/device/$PLATFORM/plugins/config-topology.sh"
     #if topology script file not present, do nothing and return 0

From 9555883e6f49230fbd398e5424ff4665b9fd8969 Mon Sep 17 00:00:00 2001
From: Stepan Blyshchak <38952541+stepanblyschak@users.noreply.github.com>
Date: Thu, 7 Dec 2023 15:24:21 +0200
Subject: [PATCH 0032/1115] [config-chassisdb] use cached variables (#17342)

- Why I did it
Improve boot performance mostly needed for fast and warmboot

- How I did it
Use cached variable.

- How to verify it
Boot the system. Simply do "systemd-analyze blame" and look at service start time.

Signed-off-by: Stepan Blyschak <stepanb@nvidia.com>
---
 files/image_config/config-chassisdb/config-chassisdb | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/files/image_config/config-chassisdb/config-chassisdb b/files/image_config/config-chassisdb/config-chassisdb
index 3bdcf0a0f..f64443b27 100755
--- a/files/image_config/config-chassisdb/config-chassisdb
+++ b/files/image_config/config-chassisdb/config-chassisdb
@@ -27,7 +27,7 @@
 config_chassis_db() {
     startdb_file="/etc/sonic/chassisdb.conf"
     [ ! -e $startdb_file ] || rm $startdb_file
-    platform=$(sonic-cfggen -H -v DEVICE_METADATA.localhost.platform)
+    platform=${PLATFORM:-`sonic-cfggen -H -v DEVICE_METADATA.localhost.platform`}
     # database-chassis services will start when $chassis_config file exists
     chassis_config="/usr/share/sonic/device/$platform/chassisdb.conf"
     if [ ! -e $chassis_config ]; then
@@ -54,6 +54,9 @@ config_chassis_db() {
     fi
 }
 
+# read SONiC immutable variables
+[ -f /etc/sonic/sonic-environment ] && . /etc/sonic/sonic-environment
+
 config_chassis_db
 
 exit 0

From fef1346483da3048b161497ce1ee84c067620ec0 Mon Sep 17 00:00:00 2001
From: Oleksandr Ivantsiv <oivantsiv@nvidia.com>
Date: Thu, 7 Dec 2023 05:26:33 -0800
Subject: [PATCH 0033/1115] [smartswitch] Add support of a new 't1-smartswitch'
 topology to the sample config generator. (#17326)

- Why I did it
Add support of a new 't1-smartswitch' topology to the sample config generator. The topology passed to sonic-cfggen utility as a parameter to generate sample configuration for Smart Switch:

sonic-cfggen  -k <SKU> --preset t1-smartswitch ...

- How I did it
Extend sample config generator to support new topology and read Smart Switch specific data from hwsku.json.

- How to verify it
Run unit tests. The changes are covered with the new unit tests.
---
 src/sonic-config-engine/config_samples.py     |  37 ++
 src/sonic-config-engine/setup.py              |   1 +
 src/sonic-config-engine/smartswitch_config.py |  38 ++
 src/sonic-config-engine/sonic-cfggen          |   6 +
 .../smartswitch/SSwitch-32x1000Gb/hwsku.json  | 129 ++++
 .../tests/sample_output/t1-smartswitch.json   | 591 ++++++++++++++++++
 .../tests/t1-ss-sample-port-config.ini        |  33 +
 src/sonic-config-engine/tests/test_j2files.py |  12 +
 8 files changed, 847 insertions(+)
 create mode 100644 src/sonic-config-engine/smartswitch_config.py
 create mode 100644 src/sonic-config-engine/tests/data/smartswitch/SSwitch-32x1000Gb/hwsku.json
 create mode 100644 src/sonic-config-engine/tests/sample_output/t1-smartswitch.json
 create mode 100644 src/sonic-config-engine/tests/t1-ss-sample-port-config.ini

diff --git a/src/sonic-config-engine/config_samples.py b/src/sonic-config-engine/config_samples.py
index 2fc9480cd..77f11a9f3 100644
--- a/src/sonic-config-engine/config_samples.py
+++ b/src/sonic-config-engine/config_samples.py
@@ -75,6 +75,42 @@ def generate_t1_sample_config(data):
         port_count += 1
     return data
 
+def generate_t1_smartswitch_sample_config(data):
+    data = generate_t1_sample_config(data)
+    data['DEVICE_METADATA']['localhost']['subtype'] = 'SmartSwitch'
+
+    mpbr_prefix = '169.254.200'
+    mpbr_address = '{}.254'.format(mpbr_prefix)
+
+    bridge_name = 'bridge_midplane'
+    data['MID_PLANE_BRIDGE'] = {
+        'GLOBAL': {
+            'bridge': bridge_name,
+            'address': '{}/24'.format(mpbr_address)
+        }
+    }
+
+    dhcp_server_ports = {}
+
+    for dpu_name in natsorted(data.get('DPUS', {})):
+        midplane_interface = data['DPUS'][dpu_name]['midplane_interface']
+        dpu_id = int(midplane_interface.replace('dpu', ''))
+        dhcp_server_ports['{}|{}'.format(bridge_name, midplane_interface)] = {'ips': ['{}.{}'.format(mpbr_prefix, dpu_id + 1)]}
+
+    if dhcp_server_ports:
+        data['DHCP_SERVER_IPV4'] = {
+            bridge_name: {
+                'gateway': mpbr_address,
+                'lease_time': '3600',
+                'mode': 'PORT',
+                'netmask': '255.255.255.0',
+                "state": "enabled"
+            }
+        }
+        data['DHCP_SERVER_IPV4_PORT'] = dhcp_server_ports
+
+    return data
+
 def generate_empty_config(data):
     new_data = {'DEVICE_METADATA': data['DEVICE_METADATA']}
     if 'hostname' not in new_data['DEVICE_METADATA']['localhost']:
@@ -161,6 +197,7 @@ def generate_l2_config(data):
 _sample_generators = {
         't1': generate_t1_sample_config,
         'l2': generate_l2_config,
+        't1-smartswitch': generate_t1_smartswitch_sample_config,
         'empty': generate_empty_config,
         'l1': generate_l1_config,
         'l3': generate_l3_config
diff --git a/src/sonic-config-engine/setup.py b/src/sonic-config-engine/setup.py
index ac785aa10..263f4cea4 100644
--- a/src/sonic-config-engine/setup.py
+++ b/src/sonic-config-engine/setup.py
@@ -52,6 +52,7 @@
     'minigraph',
     'openconfig_acl',
     'portconfig',
+    'smartswitch_config'
 ]
 if sys.version_info.major == 3:
     # Python 3-only modules
diff --git a/src/sonic-config-engine/smartswitch_config.py b/src/sonic-config-engine/smartswitch_config.py
new file mode 100644
index 000000000..b11c6b558
--- /dev/null
+++ b/src/sonic-config-engine/smartswitch_config.py
@@ -0,0 +1,38 @@
+import os
+import sys
+import portconfig
+
+try:
+    if os.environ["CFGGEN_UNIT_TESTING"] == "2":
+        modules_path = os.path.join(os.path.dirname(__file__), ".")
+        tests_path = os.path.join(modules_path, "tests")
+        sys.path.insert(0, modules_path)
+        sys.path.insert(0, tests_path)
+        import mock_tables.dbconnector
+        mock_tables.dbconnector.load_namespace_config()
+
+except KeyError:
+    pass
+
+DPUS_TABLE  = 'DPUS'
+
+
+def get_smartswitch_config(hwsku=None, platform=None):
+    hwsku_json_file = portconfig.get_hwsku_file_name(hwsku, platform)
+
+    if os.environ.get("CFGGEN_UNIT_TESTING") == "2" and hwsku == 'SSwitch-32x1000Gb':
+        hwsku_json_file = os.path.join(tests_path, "data", "smartswitch", hwsku, "hwsku.json")
+
+    if not hwsku_json_file:
+        return {}
+
+    hwsku_dict = portconfig.readJson(hwsku_json_file)
+    if not hwsku_dict:
+        raise Exception("hwsku_dict is none")
+
+    config = {}
+
+    if DPUS_TABLE in hwsku_dict:
+        config[DPUS_TABLE] = hwsku_dict[DPUS_TABLE]
+
+    return config
diff --git a/src/sonic-config-engine/sonic-cfggen b/src/sonic-config-engine/sonic-cfggen
index 243cc3ac2..58bdfaa1f 100755
--- a/src/sonic-config-engine/sonic-cfggen
+++ b/src/sonic-config-engine/sonic-cfggen
@@ -32,6 +32,7 @@ from config_samples import generate_sample_config, get_available_config
 from functools import partial
 from minigraph import minigraph_encoder, parse_xml, parse_device_desc_xml, parse_asic_sub_role, parse_asic_switch_type
 from portconfig import get_port_config, get_breakout_mode
+from smartswitch_config import get_smartswitch_config
 from sonic_py_common.multi_asic import get_asic_id_from_name, get_asic_device_id, is_multi_asic
 from sonic_py_common import device_info
 from swsscommon.swsscommon import ConfigDBConnector, SonicDBConfig, ConfigDBPipeConnector
@@ -342,6 +343,11 @@ def main():
         if  brkout_table is not None:
             deep_update(data, {'BREAKOUT_CFG': brkout_table})
 
+        # Read Smart Switch config
+        smartswitch_config = get_smartswitch_config(hwsku, platform)
+        if smartswitch_config:
+            deep_update(data, smartswitch_config)
+
     _process_json(args, data)
 
     if args.yang is not None:
diff --git a/src/sonic-config-engine/tests/data/smartswitch/SSwitch-32x1000Gb/hwsku.json b/src/sonic-config-engine/tests/data/smartswitch/SSwitch-32x1000Gb/hwsku.json
new file mode 100644
index 000000000..9ce920b2d
--- /dev/null
+++ b/src/sonic-config-engine/tests/data/smartswitch/SSwitch-32x1000Gb/hwsku.json
@@ -0,0 +1,129 @@
+{
+    "interfaces": {
+        "Ethernet0": {
+            "default_brkout_mode": "1x100G[40G]"
+        },
+        "Ethernet4": {
+            "default_brkout_mode": "2x50G"
+        },
+        "Ethernet8": {
+            "default_brkout_mode": "4x25G[10G]"
+        },
+        "Ethernet12": {
+            "default_brkout_mode": "2x25G(2)+1x50G(2)"
+        },
+        "Ethernet16": {
+            "default_brkout_mode": "1x50G(2)+2x25G(2)"
+        },
+        "Ethernet20": {
+            "default_brkout_mode": "1x100G[40G]"
+        },
+        "Ethernet24": {
+            "default_brkout_mode": "2x50G"
+        },
+        "Ethernet28": {
+            "default_brkout_mode": "4x25G[10G]"
+        },
+        "Ethernet32": {
+            "default_brkout_mode": "2x25G(2)+1x50G(2)"
+        },
+        "Ethernet36": {
+            "default_brkout_mode": "1x50G(2)+2x25G(2)"
+        },
+        "Ethernet40": {
+            "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]"
+        },
+        "Ethernet44": {
+            "default_brkout_mode": "2x50G[40G,25G,10G,1G]"
+        },
+        "Ethernet48": {
+            "default_brkout_mode": "4x25G[10G]"
+        },
+        "Ethernet52": {
+            "default_brkout_mode": "2x25G(2)+1x50G(2)"
+        },
+        "Ethernet56": {
+            "default_brkout_mode": "1x50G(2)+2x25G(2)"
+        },
+        "Ethernet60": {
+            "default_brkout_mode": "1x100G[40G]"
+        },
+        "Ethernet64": {
+            "default_brkout_mode": "2x50G"
+        },
+        "Ethernet68": {
+            "default_brkout_mode": "4x25G[10G]"
+        },
+        "Ethernet72": {
+            "default_brkout_mode": "2x25G(2)+1x50G(2)"
+        },
+        "Ethernet76": {
+            "default_brkout_mode": "1x50G(2)+2x25G(2)"
+        },
+        "Ethernet80": {
+            "default_brkout_mode": "1x100G[40G]"
+        },
+        "Ethernet84": {
+            "default_brkout_mode": "2x50G"
+        },
+        "Ethernet88": {
+            "default_brkout_mode": "4x25G[10G]"
+        },
+        "Ethernet92": {
+            "default_brkout_mode": "2x25G(2)+1x50G(2)"
+        },
+        "Ethernet96": {
+            "default_brkout_mode": "1x50G(2)+2x25G(2)"
+        },
+        "Ethernet100": {
+            "default_brkout_mode": "1x100G[40G]"
+        },
+        "Ethernet104": {
+            "default_brkout_mode": "2x50G"
+        },
+        "Ethernet108": {
+            "default_brkout_mode": "4x25G[10G]"
+        },
+        "Ethernet112": {
+            "default_brkout_mode": "2x25G(2)+1x50G(2)"
+        },
+        "Ethernet116": {
+            "default_brkout_mode": "1x50G(2)+2x25G(2)"
+        },
+        "Ethernet120": {
+            "default_brkout_mode": "1x100G[40G]"
+        },
+        "Ethernet124": {
+            "default_brkout_mode": "2x50G"
+        },
+        "Ethernet128": {
+            "default_brkout_mode": "1x40G[100G]"
+        },
+        "Ethernet132": {
+            "default_brkout_mode": "1x25G[100G,50G,40G,10G]"
+        },
+        "Ethernet136": {
+            "default_brkout_mode": "4x10G[25G]"
+        },
+        "Ethernet140": {
+            "default_brkout_mode": "2x25G(2)+1x50000(2)"
+        },
+        "Ethernet144": {
+            "default_brkout_mode": "1x100000[50G,40000,25G,10000]"
+        }
+    },
+    "DPUS": {
+        "dpu0": {
+            "midplane_interface":  "dpu0"
+        },
+        "dpu1": {
+            "midplane_interface":  "dpu1"
+        },
+        "dpu2": {
+            "midplane_interface":  "dpu2"
+        },
+        "dpu3": {
+            "midplane_interface":  "dpu3"
+        }
+    }
+}
diff --git a/src/sonic-config-engine/tests/sample_output/t1-smartswitch.json b/src/sonic-config-engine/tests/sample_output/t1-smartswitch.json
new file mode 100644
index 000000000..7cccb9ab1
--- /dev/null
+++ b/src/sonic-config-engine/tests/sample_output/t1-smartswitch.json
@@ -0,0 +1,591 @@
+{
+    "DEVICE_METADATA": {
+        "localhost": {
+            "hwsku": "SSwitch-32x1000Gb",
+            "hostname": "sonic",
+            "type": "LeafRouter",
+            "bgp_asn": "65100",
+            "subtype": "SmartSwitch"
+        }
+    },
+    "PORT": {
+        "Ethernet0": {
+            "lanes": "0,1,2,3,4,5,6,7",
+            "alias": "etp1",
+            "admin_status": "up",
+            "mtu": "9100"
+        },
+        "Ethernet8": {
+            "lanes": "8,9,10,11,12,13,14,15",
+            "alias": "etp2",
+            "admin_status": "up",
+            "mtu": "9100"
+        },
+        "Ethernet16": {
+            "lanes": "16,17,18,19,20,21,22,23",
+            "alias": "etp3",
+            "admin_status": "up",
+            "mtu": "9100"
+        },
+        "Ethernet24": {
+            "lanes": "24,25,26,27,28,29,30,31",
+            "alias": "etp4",
+            "admin_status": "up",
+            "mtu": "9100"
+        },
+        "Ethernet32": {
+            "lanes": "32,33,34,35,36,37,38,39",
+            "alias": "etp5",
+            "admin_status": "up",
+            "mtu": "9100"
+        },
+        "Ethernet40": {
+            "lanes": "40,41,42,43,44,45,46,47",
+            "alias": "etp6",
+            "admin_status": "up",
+            "mtu": "9100"
+        },
+        "Ethernet48": {
+            "lanes": "48,49,50,51,52,53,54,55",
+            "alias": "etp7",
+            "admin_status": "up",
+            "mtu": "9100"
+        },
+        "Ethernet56": {
+            "lanes": "56,57,58,59,60,61,62,63",
+            "alias": "etp8",
+            "admin_status": "up",
+            "mtu": "9100"
+        },
+        "Ethernet64": {
+            "lanes": "64,65,66,67,68,69,70,71",
+            "alias": "etp9",
+            "admin_status": "up",
+            "mtu": "9100"
+        },
+        "Ethernet72": {
+            "lanes": "72,73,74,75,76,77,78,79",
+            "alias": "etp10",
+            "admin_status": "up",
+            "mtu": "9100"
+        },
+        "Ethernet80": {
+            "lanes": "80,81,82,83,84,85,86,87",
+            "alias": "etp11",
+            "admin_status": "up",
+            "mtu": "9100"
+        },
+        "Ethernet88": {
+            "lanes": "88,89,90,91,92,93,94,95",
+            "alias": "etp12",
+            "admin_status": "up",
+            "mtu": "9100"
+        },
+        "Ethernet96": {
+            "lanes": "96,97,98,99,100,101,102,103",
+            "alias": "etp13",
+            "admin_status": "up",
+            "mtu": "9100"
+        },
+        "Ethernet104": {
+            "lanes": "104,105,106,107,108,109,110,111",
+            "alias": "etp14",
+            "admin_status": "up",
+            "mtu": "9100"
+        },
+        "Ethernet112": {
+            "lanes": "112,113,114,115,116,117,118,119",
+            "alias": "etp15",
+            "admin_status": "up",
+            "mtu": "9100"
+        },
+        "Ethernet120": {
+            "lanes": "120,121,122,123,124,125,126,127",
+            "alias": "etp16",
+            "admin_status": "up",
+            "mtu": "9100"
+        },
+        "Ethernet128": {
+            "lanes": "128,129,130,131,132,133,134,135",
+            "alias": "etp17",
+            "admin_status": "up",
+            "mtu": "9100"
+        },
+        "Ethernet136": {
+            "lanes": "136,137,138,139,140,141,142,143",
+            "alias": "etp18",
+            "admin_status": "up",
+            "mtu": "9100"
+        },
+        "Ethernet144": {
+            "lanes": "144,145,146,147,148,149,150,151",
+            "alias": "etp19",
+            "admin_status": "up",
+            "mtu": "9100"
+        },
+        "Ethernet152": {
+            "lanes": "152,153,154,155,156,157,158,159",
+            "alias": "etp20",
+            "admin_status": "up",
+            "mtu": "9100"
+        },
+        "Ethernet160": {
+            "lanes": "160,161,162,163,164,165,166,167",
+            "alias": "etp21",
+            "admin_status": "up",
+            "mtu": "9100"
+        },
+        "Ethernet168": {
+            "lanes": "168,169,170,171,172,173,174,175",
+            "alias": "etp22",
+            "admin_status": "up",
+            "mtu": "9100"
+        },
+        "Ethernet176": {
+            "lanes": "176,177,178,179,180,181,182,183",
+            "alias": "etp23",
+            "admin_status": "up",
+            "mtu": "9100"
+        },
+        "Ethernet184": {
+            "lanes": "184,185,186,187,188,189,190,191",
+            "alias": "etp24",
+            "admin_status": "up",
+            "mtu": "9100"
+        },
+        "Ethernet192": {
+            "lanes": "192,193,194,195,196,197,198,199",
+            "alias": "etp25",
+            "admin_status": "up",
+            "mtu": "9100"
+        },
+        "Ethernet200": {
+            "lanes": "200,201,202,203,204,205,206,207",
+            "alias": "etp26",
+            "admin_status": "up",
+            "mtu": "9100"
+        },
+        "Ethernet208": {
+            "lanes": "208,209,210,211,212,213,214,215",
+            "alias": "etp27",
+            "admin_status": "up",
+            "mtu": "9100"
+        },
+        "Ethernet216": {
+            "lanes": "216,217,218,219,220,221,222,223",
+            "alias": "etp28",
+            "admin_status": "up",
+            "mtu": "9100"
+        },
+        "Ethernet224": {
+            "lanes": "224,225,226,227,228,229,230,231",
+            "alias": "etp29",
+            "admin_status": "up",
+            "mtu": "9100"
+        },
+        "Ethernet232": {
+            "lanes": "232,233,234,235,236,237,238,239",
+            "alias": "etp30",
+            "admin_status": "up",
+            "mtu": "9100"
+        },
+        "Ethernet240": {
+            "lanes": "240,241,242,243,244,245,246,247",
+            "alias": "etp31",
+            "admin_status": "up",
+            "mtu": "9100"
+        },
+        "Ethernet248": {
+            "lanes": "248,249,250,251,252,253,254,255",
+            "alias": "etp32",
+            "admin_status": "up",
+            "mtu": "9100"
+        }
+    },
+    "DPUS": {
+        "dpu0": {
+            "midplane_interface": "dpu0"
+        },
+        "dpu1": {
+            "midplane_interface": "dpu1"
+        },
+        "dpu2": {
+            "midplane_interface": "dpu2"
+        },
+        "dpu3": {
+            "midplane_interface": "dpu3"
+        }
+    },
+    "FLEX_COUNTER_TABLE": {
+        "ACL": {
+            "FLEX_COUNTER_STATUS": "disable",
+            "FLEX_COUNTER_DELAY_STATUS": "true",
+            "POLL_INTERVAL": "10000"
+        }
+    },
+    "LOOPBACK_INTERFACE": {
+        "Loopback0|10.1.0.1/32": {}
+    },
+    "BGP_NEIGHBOR": {
+        "10.0.0.1": {
+            "rrclient": 0,
+            "name": "ARISTA01T2",
+            "local_addr": "10.0.0.0",
+            "nhopself": 0,
+            "holdtime": "180",
+            "asn": "65200",
+            "keepalive": "60"
+        },
+        "10.0.0.3": {
+            "rrclient": 0,
+            "name": "ARISTA02T2",
+            "local_addr": "10.0.0.2",
+            "nhopself": 0,
+            "holdtime": "180",
+            "asn": "65200",
+            "keepalive": "60"
+        },
+        "10.0.0.5": {
+            "rrclient": 0,
+            "name": "ARISTA03T2",
+            "local_addr": "10.0.0.4",
+            "nhopself": 0,
+            "holdtime": "180",
+            "asn": "65200",
+            "keepalive": "60"
+        },
+        "10.0.0.7": {
+            "rrclient": 0,
+            "name": "ARISTA04T2",
+            "local_addr": "10.0.0.6",
+            "nhopself": 0,
+            "holdtime": "180",
+            "asn": "65200",
+            "keepalive": "60"
+        },
+        "10.0.0.9": {
+            "rrclient": 0,
+            "name": "ARISTA05T2",
+            "local_addr": "10.0.0.8",
+            "nhopself": 0,
+            "holdtime": "180",
+            "asn": "65200",
+            "keepalive": "60"
+        },
+        "10.0.0.11": {
+            "rrclient": 0,
+            "name": "ARISTA06T2",
+            "local_addr": "10.0.0.10",
+            "nhopself": 0,
+            "holdtime": "180",
+            "asn": "65200",
+            "keepalive": "60"
+        },
+        "10.0.0.13": {
+            "rrclient": 0,
+            "name": "ARISTA07T2",
+            "local_addr": "10.0.0.12",
+            "nhopself": 0,
+            "holdtime": "180",
+            "asn": "65200",
+            "keepalive": "60"
+        },
+        "10.0.0.15": {
+            "rrclient": 0,
+            "name": "ARISTA08T2",
+            "local_addr": "10.0.0.14",
+            "nhopself": 0,
+            "holdtime": "180",
+            "asn": "65200",
+            "keepalive": "60"
+        },
+        "10.0.0.17": {
+            "rrclient": 0,
+            "name": "ARISTA09T2",
+            "local_addr": "10.0.0.16",
+            "nhopself": 0,
+            "holdtime": "180",
+            "asn": "65200",
+            "keepalive": "60"
+        },
+        "10.0.0.19": {
+            "rrclient": 0,
+            "name": "ARISTA10T2",
+            "local_addr": "10.0.0.18",
+            "nhopself": 0,
+            "holdtime": "180",
+            "asn": "65200",
+            "keepalive": "60"
+        },
+        "10.0.0.21": {
+            "rrclient": 0,
+            "name": "ARISTA11T2",
+            "local_addr": "10.0.0.20",
+            "nhopself": 0,
+            "holdtime": "180",
+            "asn": "65200",
+            "keepalive": "60"
+        },
+        "10.0.0.23": {
+            "rrclient": 0,
+            "name": "ARISTA12T2",
+            "local_addr": "10.0.0.22",
+            "nhopself": 0,
+            "holdtime": "180",
+            "asn": "65200",
+            "keepalive": "60"
+        },
+        "10.0.0.25": {
+            "rrclient": 0,
+            "name": "ARISTA13T2",
+            "local_addr": "10.0.0.24",
+            "nhopself": 0,
+            "holdtime": "180",
+            "asn": "65200",
+            "keepalive": "60"
+        },
+        "10.0.0.27": {
+            "rrclient": 0,
+            "name": "ARISTA14T2",
+            "local_addr": "10.0.0.26",
+            "nhopself": 0,
+            "holdtime": "180",
+            "asn": "65200",
+            "keepalive": "60"
+        },
+        "10.0.0.29": {
+            "rrclient": 0,
+            "name": "ARISTA15T2",
+            "local_addr": "10.0.0.28",
+            "nhopself": 0,
+            "holdtime": "180",
+            "asn": "65200",
+            "keepalive": "60"
+        },
+        "10.0.0.31": {
+            "rrclient": 0,
+            "name": "ARISTA16T2",
+            "local_addr": "10.0.0.30",
+            "nhopself": 0,
+            "holdtime": "180",
+            "asn": "65200",
+            "keepalive": "60"
+        },
+        "10.0.0.33": {
+            "rrclient": 0,
+            "name": "ARISTA01T0",
+            "local_addr": "10.0.0.32",
+            "nhopself": 0,
+            "holdtime": "180",
+            "asn": "64001",
+            "keepalive": "60"
+        },
+        "10.0.0.35": {
+            "rrclient": 0,
+            "name": "ARISTA02T0",
+            "local_addr": "10.0.0.34",
+            "nhopself": 0,
+            "holdtime": "180",
+            "asn": "64002",
+            "keepalive": "60"
+        },
+        "10.0.0.37": {
+            "rrclient": 0,
+            "name": "ARISTA03T0",
+            "local_addr": "10.0.0.36",
+            "nhopself": 0,
+            "holdtime": "180",
+            "asn": "64003",
+            "keepalive": "60"
+        },
+        "10.0.0.39": {
+            "rrclient": 0,
+            "name": "ARISTA04T0",
+            "local_addr": "10.0.0.38",
+            "nhopself": 0,
+            "holdtime": "180",
+            "asn": "64004",
+            "keepalive": "60"
+        },
+        "10.0.0.41": {
+            "rrclient": 0,
+            "name": "ARISTA05T0",
+            "local_addr": "10.0.0.40",
+            "nhopself": 0,
+            "holdtime": "180",
+            "asn": "64005",
+            "keepalive": "60"
+        },
+        "10.0.0.43": {
+            "rrclient": 0,
+            "name": "ARISTA06T0",
+            "local_addr": "10.0.0.42",
+            "nhopself": 0,
+            "holdtime": "180",
+            "asn": "64006",
+            "keepalive": "60"
+        },
+        "10.0.0.45": {
+            "rrclient": 0,
+            "name": "ARISTA07T0",
+            "local_addr": "10.0.0.44",
+            "nhopself": 0,
+            "holdtime": "180",
+            "asn": "64007",
+            "keepalive": "60"
+        },
+        "10.0.0.47": {
+            "rrclient": 0,
+            "name": "ARISTA08T0",
+            "local_addr": "10.0.0.46",
+            "nhopself": 0,
+            "holdtime": "180",
+            "asn": "64008",
+            "keepalive": "60"
+        },
+        "10.0.0.49": {
+            "rrclient": 0,
+            "name": "ARISTA09T0",
+            "local_addr": "10.0.0.48",
+            "nhopself": 0,
+            "holdtime": "180",
+            "asn": "64009",
+            "keepalive": "60"
+        },
+        "10.0.0.51": {
+            "rrclient": 0,
+            "name": "ARISTA10T0",
+            "local_addr": "10.0.0.50",
+            "nhopself": 0,
+            "holdtime": "180",
+            "asn": "64010",
+            "keepalive": "60"
+        },
+        "10.0.0.53": {
+            "rrclient": 0,
+            "name": "ARISTA11T0",
+            "local_addr": "10.0.0.52",
+            "nhopself": 0,
+            "holdtime": "180",
+            "asn": "64011",
+            "keepalive": "60"
+        },
+        "10.0.0.55": {
+            "rrclient": 0,
+            "name": "ARISTA12T0",
+            "local_addr": "10.0.0.54",
+            "nhopself": 0,
+            "holdtime": "180",
+            "asn": "64012",
+            "keepalive": "60"
+        },
+        "10.0.0.57": {
+            "rrclient": 0,
+            "name": "ARISTA13T0",
+            "local_addr": "10.0.0.56",
+            "nhopself": 0,
+            "holdtime": "180",
+            "asn": "64013",
+            "keepalive": "60"
+        },
+        "10.0.0.59": {
+            "rrclient": 0,
+            "name": "ARISTA14T0",
+            "local_addr": "10.0.0.58",
+            "nhopself": 0,
+            "holdtime": "180",
+            "asn": "64014",
+            "keepalive": "60"
+        },
+        "10.0.0.61": {
+            "rrclient": 0,
+            "name": "ARISTA15T0",
+            "local_addr": "10.0.0.60",
+            "nhopself": 0,
+            "holdtime": "180",
+            "asn": "64015",
+            "keepalive": "60"
+        },
+        "10.0.0.63": {
+            "rrclient": 0,
+            "name": "ARISTA16T0",
+            "local_addr": "10.0.0.62",
+            "nhopself": 0,
+            "holdtime": "180",
+            "asn": "64016",
+            "keepalive": "60"
+        }
+    },
+    "DEVICE_NEIGHBOR": {},
+    "INTERFACE": {
+        "Ethernet0|10.0.0.0/31": {},
+        "Ethernet8|10.0.0.2/31": {},
+        "Ethernet16|10.0.0.4/31": {},
+        "Ethernet24|10.0.0.6/31": {},
+        "Ethernet32|10.0.0.8/31": {},
+        "Ethernet40|10.0.0.10/31": {},
+        "Ethernet48|10.0.0.12/31": {},
+        "Ethernet56|10.0.0.14/31": {},
+        "Ethernet64|10.0.0.16/31": {},
+        "Ethernet72|10.0.0.18/31": {},
+        "Ethernet80|10.0.0.20/31": {},
+        "Ethernet88|10.0.0.22/31": {},
+        "Ethernet96|10.0.0.24/31": {},
+        "Ethernet104|10.0.0.26/31": {},
+        "Ethernet112|10.0.0.28/31": {},
+        "Ethernet120|10.0.0.30/31": {},
+        "Ethernet128|10.0.0.32/31": {},
+        "Ethernet136|10.0.0.34/31": {},
+        "Ethernet144|10.0.0.36/31": {},
+        "Ethernet152|10.0.0.38/31": {},
+        "Ethernet160|10.0.0.40/31": {},
+        "Ethernet168|10.0.0.42/31": {},
+        "Ethernet176|10.0.0.44/31": {},
+        "Ethernet184|10.0.0.46/31": {},
+        "Ethernet192|10.0.0.48/31": {},
+        "Ethernet200|10.0.0.50/31": {},
+        "Ethernet208|10.0.0.52/31": {},
+        "Ethernet216|10.0.0.54/31": {},
+        "Ethernet224|10.0.0.56/31": {},
+        "Ethernet232|10.0.0.58/31": {},
+        "Ethernet240|10.0.0.60/31": {},
+        "Ethernet248|10.0.0.62/31": {}
+    },
+    "MID_PLANE_BRIDGE": {
+        "GLOBAL": {
+            "bridge": "bridge_midplane",
+            "address": "169.254.200.254/24"
+        }
+    },
+    "DHCP_SERVER_IPV4": {
+        "bridge_midplane": {
+            "gateway": "169.254.200.254",
+            "lease_time": "3600",
+            "mode": "PORT",
+            "netmask": "255.255.255.0",
+            "state": "enabled"
+        }
+    },
+    "DHCP_SERVER_IPV4_PORT": {
+        "bridge_midplane|dpu0": {
+            "ips": [
+                "169.254.200.1"
+            ]
+        },
+        "bridge_midplane|dpu1": {
+            "ips": [
+                "169.254.200.2"
+            ]
+        },
+        "bridge_midplane|dpu2": {
+            "ips": [
+                "169.254.200.3"
+            ]
+        },
+        "bridge_midplane|dpu3": {
+            "ips": [
+                "169.254.200.4"
+            ]
+        }
+    }
+}
diff --git a/src/sonic-config-engine/tests/t1-ss-sample-port-config.ini b/src/sonic-config-engine/tests/t1-ss-sample-port-config.ini
new file mode 100644
index 000000000..d140050c8
--- /dev/null
+++ b/src/sonic-config-engine/tests/t1-ss-sample-port-config.ini
@@ -0,0 +1,33 @@
+# name          lanes                               alias     
+Ethernet0       0,1,2,3,4,5,6,7                     etp1      
+Ethernet8       8,9,10,11,12,13,14,15               etp2      
+Ethernet16      16,17,18,19,20,21,22,23             etp3      
+Ethernet24      24,25,26,27,28,29,30,31             etp4      
+Ethernet32      32,33,34,35,36,37,38,39             etp5      
+Ethernet40      40,41,42,43,44,45,46,47             etp6      
+Ethernet48      48,49,50,51,52,53,54,55             etp7      
+Ethernet56      56,57,58,59,60,61,62,63             etp8      
+Ethernet64      64,65,66,67,68,69,70,71             etp9      
+Ethernet72      72,73,74,75,76,77,78,79             etp10     
+Ethernet80      80,81,82,83,84,85,86,87             etp11     
+Ethernet88      88,89,90,91,92,93,94,95             etp12     
+Ethernet96      96,97,98,99,100,101,102,103         etp13     
+Ethernet104     104,105,106,107,108,109,110,111     etp14     
+Ethernet112     112,113,114,115,116,117,118,119     etp15     
+Ethernet120     120,121,122,123,124,125,126,127     etp16     
+Ethernet128     128,129,130,131,132,133,134,135     etp17     
+Ethernet136     136,137,138,139,140,141,142,143     etp18     
+Ethernet144     144,145,146,147,148,149,150,151     etp19     
+Ethernet152     152,153,154,155,156,157,158,159     etp20     
+Ethernet160     160,161,162,163,164,165,166,167     etp21     
+Ethernet168     168,169,170,171,172,173,174,175     etp22     
+Ethernet176     176,177,178,179,180,181,182,183     etp23     
+Ethernet184     184,185,186,187,188,189,190,191     etp24     
+Ethernet192     192,193,194,195,196,197,198,199     etp25     
+Ethernet200     200,201,202,203,204,205,206,207     etp26     
+Ethernet208     208,209,210,211,212,213,214,215     etp27     
+Ethernet216     216,217,218,219,220,221,222,223     etp28     
+Ethernet224     224,225,226,227,228,229,230,231     etp29     
+Ethernet232     232,233,234,235,236,237,238,239     etp30     
+Ethernet240     240,241,242,243,244,245,246,247     etp31     
+Ethernet248     248,249,250,251,252,253,254,255     etp32     
diff --git a/src/sonic-config-engine/tests/test_j2files.py b/src/sonic-config-engine/tests/test_j2files.py
index 125668f24..a65dea2b0 100644
--- a/src/sonic-config-engine/tests/test_j2files.py
+++ b/src/sonic-config-engine/tests/test_j2files.py
@@ -26,6 +26,7 @@ def setUp(self):
         self.pc_minigraph = os.path.join(self.test_dir, 'pc-test-graph.xml')
         self.t0_port_config = os.path.join(self.test_dir, 't0-sample-port-config.ini')
         self.t0_port_config_tiny = os.path.join(self.test_dir, 't0-sample-port-config-tiny.ini')
+        self.t1_ss_port_config = os.path.join(self.test_dir, 't1-ss-sample-port-config.ini')
         self.l1_l3_port_config = os.path.join(self.test_dir, 'l1-l3-sample-port-config.ini')
         self.t0_7050cx3_port_config = os.path.join(self.test_dir, 't0_7050cx3_d48c8_port_config.ini')
         self.t1_mlnx_minigraph = os.path.join(self.test_dir, 't1-sample-graph-mlnx.xml')
@@ -292,6 +293,17 @@ def test_l2switch_template_dualtor(self):
         self.maxDiff = None
         self.assertEqual(sample_output_json, output_json)
 
+    def test_t1_smartswitch_template(self):
+        argument = ['-k', 'SSwitch-32x1000Gb', '--preset', 't1-smartswitch', '-p', self.t1_ss_port_config]
+        output = self.run_script(argument)
+        output_json = json.loads(output)
+
+        sample_output_file = os.path.join(self.test_dir, 'sample_output', 't1-smartswitch.json')
+        with open(sample_output_file) as sample_output_fd:
+            sample_output_json = json.load(sample_output_fd)
+
+        self.assertTrue(json.dumps(sample_output_json, sort_keys=True) == json.dumps(output_json, sort_keys=True))
+
     def test_qos_arista7050_render_template(self):
         self._test_qos_render_template('arista', 'x86_64-arista_7050_qx32s', 'Arista-7050-QX-32S', 'sample-arista-7050-t0-minigraph.xml', 'qos-arista7050.json')
 

From 8ec4b53451cdc79bf6a8e35f17e08350367907b4 Mon Sep 17 00:00:00 2001
From: centecqianj <110279455+centecqianj@users.noreply.github.com>
Date: Fri, 8 Dec 2023 00:42:13 +0800
Subject: [PATCH 0034/1115] [Bookworm] Upgrade centec-arm64 platform to
 Bookworm. (#17411)

Why I did it
1. Upgrade centec-arm64 platform to Bookworm.
2. Solve the problem of compiling the docker-syncd-centec-rpc.gz error on the centec platform.

How I did it
1. Modified platform driver to comply with bookworm kernel.
2. Upgrade SONiC package versions of the centec platform.

How to verify it
1. Compile the centec-arm64 platform to generate sonic-centec-arm64.bin.
2. Compile the centec platform to generate docker-syncd-centec-rpc.gz.

Signed-off-by: centecqianj <qianj@centec.com>
---
 .../versions-deb-bullseye                     | 26 ++++++------
 .../docker-syncd-centec/versions-deb-bullseye |  4 +-
 .../fan/fan-ctc5236.c                         |  2 +-
 .../tsingma-bsp/src/ctc-phy/mars.c            | 14 +++----
 .../src/ctc5236_switch/ctc5236_switch.c       |  1 -
 .../tsingma-bsp/src/ctcmac/ctcmac.c           | 28 +++++++------
 .../tsingma-bsp/src/gpio-ctc/gpio-ctc.c       | 18 ++++----
 .../tsingma-bsp/src/pwm-ctc/pwm-ctc.c         | 42 +++++++++++++++----
 .../tsingma-bsp/src/rtc-sd2405/rtc-sd2405.c   | 12 ------
 .../src/sdhci-ctc5236/sdhci-ctc5236.c         |  2 +-
 10 files changed, 85 insertions(+), 64 deletions(-)
 mode change 100644 => 100755 files/build/versions/dockers/docker-syncd-centec-rpc/versions-deb-bullseye
 mode change 100644 => 100755 files/build/versions/dockers/docker-syncd-centec/versions-deb-bullseye
 mode change 100644 => 100755 platform/centec-arm64/tsingma-bsp/src/rtc-sd2405/rtc-sd2405.c

diff --git a/files/build/versions/dockers/docker-syncd-centec-rpc/versions-deb-bullseye b/files/build/versions/dockers/docker-syncd-centec-rpc/versions-deb-bullseye
old mode 100644
new mode 100755
index dd0e740c7..f2b73ec9c
--- a/files/build/versions/dockers/docker-syncd-centec-rpc/versions-deb-bullseye
+++ b/files/build/versions/dockers/docker-syncd-centec-rpc/versions-deb-bullseye
@@ -15,14 +15,14 @@ libarchive13==3.4.3-2+deb11u1
 libasan6==10.2.1-6
 libbinutils==2.35.2-2
 libboost-atomic1.74.0==1.74.0-9
-libc-dev-bin==2.31-13+deb11u6
-libc6-dev==2.31-13+deb11u6
+libc-dev-bin==2.31-13+deb11u7
+libc6-dev==2.31-13+deb11u7
 libcc1-0==10.2.1-6
 libcrypt-dev==1:4.4.18-4
 libctf-nobfd0==2.35.2-2
 libctf0==2.35.2-2
 libdouble-conversion3==3.1.5-6.1
-libdpkg-perl==1.20.12
+libdpkg-perl==1.20.13
 libexpat1-dev==2.2.10-2+deb11u5
 libffi-dev==3.3-6
 libgcc-10-dev==10.2.1-6
@@ -39,17 +39,17 @@ libnsl-dev==1.3.0-2
 libpcre2-16-0==10.36-2+deb11u1
 libpython2-dev==2.7.18-3
 libpython2-stdlib==2.7.18-3
-libpython2.7==2.7.18-8
-libpython2.7-dev==2.7.18-8
-libpython2.7-minimal==2.7.18-8
-libpython2.7-stdlib==2.7.18-8
+libpython2.7==2.7.18-8+deb11u1
+libpython2.7-dev==2.7.18-8+deb11u1
+libpython2.7-minimal==2.7.18-8+deb11u1
+libpython2.7-stdlib==2.7.18-8+deb11u1
 libqt5core5a==5.15.2+dfsg-9
 libqt5dbus5==5.15.2+dfsg-9
 libqt5network5==5.15.2+dfsg-9
 libquadmath0==10.2.1-6
 librhash0==1.4.1-2
-libssl-dev==1.1.1n-0+deb11u5
-libssl1.1==1.1.1n-0+deb11u5
+libssl-dev==1.1.1w-0+deb11u1
+libssl1.1==1.1.1w-0+deb11u1
 libstdc++-10-dev==10.2.1-6
 libthrift-0.11.0==0.11.0-4
 libtirpc-dev==1.3.1-1+deb11u1
@@ -57,7 +57,7 @@ libtsan0==10.2.1-6
 libubsan1==10.2.1-6
 libuv1==1.40.0-2
 libxml2==2.9.10+dfsg-6.7+deb11u4
-linux-libc-dev==5.10.191-1
+linux-libc-dev==5.10.197-1
 mailcap==3.69
 make==4.3-4.1
 mime-support==3.66
@@ -70,9 +70,9 @@ python-setuptools==44.1.1-1
 python2==2.7.18-3
 python2-dev==2.7.18-3
 python2-minimal==2.7.18-3
-python2.7==2.7.18-8
-python2.7-dev==2.7.18-8
-python2.7-minimal==2.7.18-8
+python2.7==2.7.18-8+deb11u1
+python2.7-dev==2.7.18-8+deb11u1
+python2.7-minimal==2.7.18-8+deb11u1
 python3-pip==20.3.4-4+deb11u1
 python3-pkg-resources==52.0.0-4
 python3-setuptools==52.0.0-4
diff --git a/files/build/versions/dockers/docker-syncd-centec/versions-deb-bullseye b/files/build/versions/dockers/docker-syncd-centec/versions-deb-bullseye
old mode 100644
new mode 100755
index 77d75ecaa..36760cb71
--- a/files/build/versions/dockers/docker-syncd-centec/versions-deb-bullseye
+++ b/files/build/versions/dockers/docker-syncd-centec/versions-deb-bullseye
@@ -4,7 +4,7 @@ kmod==28-1
 libbabeltrace1==1.5.8-1+b3
 libboost-regex1.74.0==1.74.0-9
 libcbor0==0.5.0+dfsg-2
-libcurl3-gnutls==7.74.0-1.3+deb11u7
+libcurl3-gnutls==7.74.0-1.3+deb11u10
 libdebuginfod1==0.183-1
 libdw1==0.183-1
 libedit2==3.1-20191231-2+b1
@@ -24,7 +24,7 @@ libsource-highlight4v5==3.1.9-3+b1
 libswsscommon-dbg==1.0.0
 libswsscommon-dbgsym==1.0.0
 libunwind8==1.3.2-2
-openssh-client==1:8.4p1-5+deb11u1
+openssh-client==1:8.4p1-5+deb11u2
 sshpass==1.09-1+b1
 strace==5.10-1
 syncd==1.0.0
diff --git a/platform/centec-arm64/sonic-platform-modules-e530/fan/fan-ctc5236.c b/platform/centec-arm64/sonic-platform-modules-e530/fan/fan-ctc5236.c
index 96448c7db..605667330 100644
--- a/platform/centec-arm64/sonic-platform-modules-e530/fan/fan-ctc5236.c
+++ b/platform/centec-arm64/sonic-platform-modules-e530/fan/fan-ctc5236.c
@@ -180,7 +180,7 @@ static int fan_ctc5236_probe(struct platform_device *pdev)
 
     for (idx = 0; idx < CTC_MAX_FAN; idx++)
     {
-        data->pwm[idx] = devm_of_pwm_get(&pdev->dev, pdev->dev.of_node, pwmnames[idx]);
+        data->pwm[idx] = devm_pwm_get(&pdev->dev, pwmnames[idx]);
         if (IS_ERR(data->pwm[idx])) {
             dev_err(&pdev->dev, "Could not get PWM\n");
             return PTR_ERR(data->pwm[idx]);
diff --git a/platform/centec-arm64/tsingma-bsp/src/ctc-phy/mars.c b/platform/centec-arm64/tsingma-bsp/src/ctc-phy/mars.c
index 7f1cdafe2..129a3ea5f 100644
--- a/platform/centec-arm64/tsingma-bsp/src/ctc-phy/mars.c
+++ b/platform/centec-arm64/tsingma-bsp/src/ctc-phy/mars.c
@@ -167,7 +167,7 @@ int mars1s_config_aneg(struct phy_device *phydev)
 	return 0;
 }
 
-static int mars_ack_interrupt(struct phy_device *phydev)
+static irqreturn_t mars_handle_interrupt(struct phy_device *phydev)
 {
 	int err;
 
@@ -178,9 +178,9 @@ static int mars_ack_interrupt(struct phy_device *phydev)
 	err = mars_ext_read(phydev, 0xa011);
 #endif
 	if (err < 0)
-		return err;
+		return IRQ_NONE;
 
-	return 0;
+	return IRQ_HANDLED;
 }
 
 static int mars_config_intr(struct phy_device *phydev)
@@ -256,7 +256,7 @@ static struct phy_driver ctc_drivers[] = {
 	 .config_init = mars_config_init,
 	 .features = PHY_GBIT_FEATURES,
 	 .config_aneg = mars1s_config_aneg,
-	 .ack_interrupt = &mars_ack_interrupt,
+	 .handle_interrupt = &mars_handle_interrupt,
 	 .config_intr = &mars_config_intr,
 	 .read_status = genphy_read_status,
 	 .suspend = genphy_suspend,
@@ -269,7 +269,7 @@ static struct phy_driver ctc_drivers[] = {
 	 .config_init = mars_config_init,
 	 .features = PHY_GBIT_FEATURES,
 	 .config_aneg = mars1s_config_aneg,
-	 .ack_interrupt = &mars_ack_interrupt,
+	 .handle_interrupt = &mars_handle_interrupt,
 	 .config_intr = &mars_config_intr,
 	 .read_status = genphy_read_status,
 	 .suspend = genphy_suspend,
@@ -282,7 +282,7 @@ static struct phy_driver ctc_drivers[] = {
 	 .config_init = mars1p_config_init,
 	 .features = PHY_GBIT_FEATURES,
 	 .config_aneg = mars1s_config_aneg,
-	 .ack_interrupt = &mars_ack_interrupt,
+	 .handle_interrupt = &mars_handle_interrupt,
 	 .config_intr = &mars_config_intr,
 	 .read_status = genphy_read_status,
 	 .suspend = genphy_suspend,
@@ -295,7 +295,7 @@ static struct phy_driver ctc_drivers[] = {
 	 .config_init = mars1p_config_init,
 	 .features = PHY_GBIT_FEATURES,
 	 .config_aneg = mars1s_config_aneg,
-	 .ack_interrupt = &mars_ack_interrupt,
+	 .handle_interrupt = &mars_handle_interrupt,
 	 .config_intr = &mars_config_intr,
 	 .read_status = genphy_read_status,
 	 .suspend = genphy_suspend,
diff --git a/platform/centec-arm64/tsingma-bsp/src/ctc5236_switch/ctc5236_switch.c b/platform/centec-arm64/tsingma-bsp/src/ctc5236_switch/ctc5236_switch.c
index 2635a86e6..c3bee141c 100755
--- a/platform/centec-arm64/tsingma-bsp/src/ctc5236_switch/ctc5236_switch.c
+++ b/platform/centec-arm64/tsingma-bsp/src/ctc5236_switch/ctc5236_switch.c
@@ -278,7 +278,6 @@ static int ctc_switch_probe(struct platform_device *pdev)
 	struct resource *iomem;
 	void __iomem *ioaddr;
 	resource_size_t start;
-	uint val;
 
 	iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 
diff --git a/platform/centec-arm64/tsingma-bsp/src/ctcmac/ctcmac.c b/platform/centec-arm64/tsingma-bsp/src/ctcmac/ctcmac.c
index ea28b561e..0d970ae71 100755
--- a/platform/centec-arm64/tsingma-bsp/src/ctcmac/ctcmac.c
+++ b/platform/centec-arm64/tsingma-bsp/src/ctcmac/ctcmac.c
@@ -267,7 +267,7 @@ static int ctcmac_of_init(struct platform_device *ofdev,
 {
 	u32 val;
 	int err = 0, index, int_coalesce;
-	const void *mac_addr;
+	u8 mac_addr[ETH_ALEN];
 	const char *ctype, *automode, *dfe, *int_type, *tx_inv, *rx_inv;
 	struct net_device *dev = NULL;
 	struct ctcmac_private *priv = NULL;
@@ -313,10 +313,10 @@ static int ctcmac_of_init(struct platform_device *ofdev,
 	else
 		priv->index = 0;
 
-	mac_addr = of_get_mac_address(np);
-
-	if (!IS_ERR(mac_addr))
+	err = of_get_mac_address(np, mac_addr);
+	if (!err) {
 		memcpy(dev->dev_addr, mac_addr, ETH_ALEN);
+	}
 
 	err = of_property_read_string(np, "int-type", &int_type);
 	if ((err == 0) && !strncmp(int_type, "desc", 4)) {
@@ -977,7 +977,7 @@ static int ctc_mac_serdes_init(struct ctcmac_private *priv)
 
 static void ctcmac_mac_filter_init(struct ctcmac_private *priv)
 {
-	unsigned char *dev_addr;
+	const unsigned char *dev_addr;
 	u32 val, addr_h = 0, addr_l = 0;
 
 	if (priv->version == 0)
@@ -3147,7 +3147,9 @@ static void ctcmac_get_regs(struct net_device *dev, struct ethtool_regs *regs,
  * rx, rx_mini, and rx_jumbo rings are the same size, as mini and
  * jumbo are ignored by the driver */
 static void ctcmac_gringparam(struct net_device *dev,
-			      struct ethtool_ringparam *rvals)
+			      struct ethtool_ringparam *rvals,
+			      struct kernel_ethtool_ringparam *kernel_ring,
+			      struct netlink_ext_ack *extack)
 {
 	struct ctcmac_private *priv = netdev_priv(dev);
 	struct ctcmac_priv_tx_q *tx_queue = NULL;
@@ -3174,7 +3176,9 @@ static void ctcmac_gringparam(struct net_device *dev,
  * necessary so that we don't mess things up while we're in motion.
  */
 static int ctcmac_sringparam(struct net_device *dev,
-			     struct ethtool_ringparam *rvals)
+			     struct ethtool_ringparam *rvals,
+			     struct kernel_ethtool_ringparam *kernel_ring,
+			     struct netlink_ext_ack *extack)
 {
 	struct ctcmac_private *priv = netdev_priv(dev);
 	int err = 0, i;
@@ -3492,16 +3496,16 @@ static int ctcmac_probe(struct platform_device *ofdev)
 	dev->ethtool_ops = &ctcmac_ethtool_ops;
 
 	if (priv->version == 0) {
-		netif_napi_add(dev, &priv->napi_rx, ctcmac_poll_rx_sq,
+		netif_napi_add_weight(dev, &priv->napi_rx, ctcmac_poll_rx_sq,
 			       CTCMAC_NAIP_RX_WEIGHT);
-		netif_napi_add(dev, &priv->napi_tx, ctcmac_poll_tx_sq,
+		netif_napi_add_weight(dev, &priv->napi_tx, ctcmac_poll_tx_sq,
 			       CTCMAC_NAIP_TX_WEIGHT);
 	} else {
-		netif_napi_add(dev, &priv->napi_rx, ctcmac_poll_rx0_sq,
+		netif_napi_add_weight(dev, &priv->napi_rx, ctcmac_poll_rx0_sq,
 			       CTCMAC_NAIP_RX_WEIGHT);
-		netif_napi_add(dev, &priv->napi_rx1, ctcmac_poll_rx1_sq,
+		netif_napi_add_weight(dev, &priv->napi_rx1, ctcmac_poll_rx1_sq,
 			       CTCMAC_NAIP_RX_WEIGHT);
-		netif_napi_add(dev, &priv->napi_tx, ctcmac_poll_tx_sq,
+		netif_napi_add_weight(dev, &priv->napi_tx, ctcmac_poll_tx_sq,
 			       CTCMAC_NAIP_TX_WEIGHT);
 	}
 
diff --git a/platform/centec-arm64/tsingma-bsp/src/gpio-ctc/gpio-ctc.c b/platform/centec-arm64/tsingma-bsp/src/gpio-ctc/gpio-ctc.c
index 776f7da00..34d4cf812 100755
--- a/platform/centec-arm64/tsingma-bsp/src/gpio-ctc/gpio-ctc.c
+++ b/platform/centec-arm64/tsingma-bsp/src/gpio-ctc/gpio-ctc.c
@@ -34,6 +34,8 @@
 
 #define DWAPB_MAX_PORTS		2
 
+static DEFINE_SPINLOCK(ctcgpio_lock);
+
 struct ctcapb_gpio;
 
 static u32 soc_v;
@@ -118,9 +120,9 @@ static void ctcapb_irq_enable(struct irq_data *d)
 	struct gpio_chip *gc = &port->gc;
 	unsigned long flags;
 
-	spin_lock_irqsave(&gc->bgpio_lock, flags);
+	spin_lock_irqsave(&ctcgpio_lock, flags);
 	clrsetbits(&port->regs->GpioIntrEn, 0, BIT(d->hwirq));
-	spin_unlock_irqrestore(&gc->bgpio_lock, flags);
+	spin_unlock_irqrestore(&ctcgpio_lock, flags);
 }
 
 extern void irq_gc_mask_clr_bit(struct irq_data *d);
@@ -139,9 +141,9 @@ static void ctcapb_irq_disable(struct irq_data *d)
 	struct gpio_chip *gc = &port->gc;
 	unsigned long flags;
 
-	spin_lock_irqsave(&gc->bgpio_lock, flags);
+	spin_lock_irqsave(&ctcgpio_lock, flags);
 	clrsetbits(&port->regs->GpioIntrEn, ~BIT(d->hwirq), 0);
-	spin_unlock_irqrestore(&gc->bgpio_lock, flags);
+	spin_unlock_irqrestore(&ctcgpio_lock, flags);
 }
 #endif
 
@@ -180,7 +182,7 @@ static int ctcapb_irq_set_type(struct irq_data *d, u32 type)
 		     IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW))
 		return -EINVAL;
 
-	spin_lock_irqsave(&gc->bgpio_lock, flags);
+	spin_lock_irqsave(&ctcgpio_lock, flags);
 	level = readl(&port->regs->GpioIntrLevel);
 	polarity = readl(&port->regs->GpioIntrPolarity);
 
@@ -226,7 +228,7 @@ static int ctcapb_irq_set_type(struct irq_data *d, u32 type)
 
 	writel(level, &port->regs->GpioIntrLevel);
 	writel(polarity, &port->regs->GpioIntrPolarity);
-	spin_unlock_irqrestore(&gc->bgpio_lock, flags);
+	spin_unlock_irqrestore(&ctcgpio_lock, flags);
 
 	return 0;
 }
@@ -238,7 +240,7 @@ static int ctcapb_gpio_set_debounce(struct gpio_chip *gc,
 	unsigned long flags, val_deb;
 	unsigned long mask = BIT(offset);
 
-	spin_lock_irqsave(&gc->bgpio_lock, flags);
+	spin_lock_irqsave(&ctcgpio_lock, flags);
 
 	val_deb = readl(&port->regs->GpioDebCtl);
 	if (debounce)
@@ -246,7 +248,7 @@ static int ctcapb_gpio_set_debounce(struct gpio_chip *gc,
 	else
 		writel(val_deb & ~mask, &port->regs->GpioDebCtl);
 
-	spin_unlock_irqrestore(&gc->bgpio_lock, flags);
+	spin_unlock_irqrestore(&ctcgpio_lock, flags);
 
 	return 0;
 }
diff --git a/platform/centec-arm64/tsingma-bsp/src/pwm-ctc/pwm-ctc.c b/platform/centec-arm64/tsingma-bsp/src/pwm-ctc/pwm-ctc.c
index a2e1f9977..455f96b1d 100755
--- a/platform/centec-arm64/tsingma-bsp/src/pwm-ctc/pwm-ctc.c
+++ b/platform/centec-arm64/tsingma-bsp/src/pwm-ctc/pwm-ctc.c
@@ -133,7 +133,33 @@ static void ctc_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
 	ctc_pwm_writel(pc, pwm->hwpwm, CTC_CR_PWM, cur_value);
 }
 
-static void ctc_pwm_get_state(struct pwm_chip *chip, struct pwm_device *pwm,
+static int ctc_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
+			  const struct pwm_state *state)
+{
+	int err;
+
+	if (state->polarity != PWM_POLARITY_NORMAL)
+		return -EINVAL;
+
+	if (!state->enabled)
+	{
+		if(pwm->state.enabled)
+			ctc_pwm_disable(chip,pwm);
+		return 0;
+	}
+
+	err = ctc_pwm_config(pwm->chip, pwm, state->duty_cycle, state->period);
+	if (err)
+		return err;
+	
+	if (!pwm->state.enabled)
+		err = ctc_pwm_enable(chip, pwm);
+	
+	return err;
+}
+
+
+static int ctc_pwm_get_state(struct pwm_chip *chip, struct pwm_device *pwm,
 			      struct pwm_state *state)
 {
 	struct ctc_pwm_chip *pc = to_ctc_pwm_chip(chip);
@@ -154,6 +180,8 @@ static void ctc_pwm_get_state(struct pwm_chip *chip, struct pwm_device *pwm,
 	cur_value_2 = ctc_pwm_readl(pc, pwm->hwpwm, CTC_DUTY_PWM);
 
 	state->duty_cycle = cur_value_2 * 1000;	// in nanoseconds
+
+	return 0;
 }
 
 static int ctc_pwm_capture(struct pwm_chip *chip, struct pwm_device *pwm,
@@ -173,9 +201,9 @@ static int ctc_pwm_capture(struct pwm_chip *chip, struct pwm_device *pwm,
 }
 
 static const struct pwm_ops ctc_pwm_ops = {
-	.config = ctc_pwm_config,
-	.enable = ctc_pwm_enable,
-	.disable = ctc_pwm_disable,
+	.apply = ctc_pwm_apply,
+	//.enable = ctc_pwm_enable,
+	//.disable = ctc_pwm_disable,
 	.get_state = ctc_pwm_get_state,
 	.capture = ctc_pwm_capture,
 	.owner = THIS_MODULE,
@@ -225,7 +253,7 @@ static int ctc_pwm_probe(struct platform_device *pdev)
 	return 0;
 }
 
-static int ctc_pwm_remove(struct platform_device *pdev)
+static void ctc_pwm_remove(struct platform_device *pdev)
 {
 	struct ctc_pwm_chip *pc = platform_get_drvdata(pdev);
 	int i;
@@ -233,7 +261,7 @@ static int ctc_pwm_remove(struct platform_device *pdev)
 	for (i = 0; i < CTC_NUM_PWM; i++)
 		pwm_disable(&pc->chip.pwms[i]);
 
-	return pwmchip_remove(&pc->chip);
+	pwmchip_remove(&pc->chip);
 }
 
 static const struct of_device_id ctc_pwm_of_match[] = {
@@ -249,7 +277,7 @@ static struct platform_driver ctc_pwm_driver = {
 		   .of_match_table = ctc_pwm_of_match,
 		   },
 	.probe = ctc_pwm_probe,
-	.remove = ctc_pwm_remove,
+	.remove_new = ctc_pwm_remove,
 };
 
 module_platform_driver(ctc_pwm_driver);
diff --git a/platform/centec-arm64/tsingma-bsp/src/rtc-sd2405/rtc-sd2405.c b/platform/centec-arm64/tsingma-bsp/src/rtc-sd2405/rtc-sd2405.c
old mode 100644
new mode 100755
index f448b418b..d76856e5e
--- a/platform/centec-arm64/tsingma-bsp/src/rtc-sd2405/rtc-sd2405.c
+++ b/platform/centec-arm64/tsingma-bsp/src/rtc-sd2405/rtc-sd2405.c
@@ -180,17 +180,6 @@ static int sd2405_rtc_set_time(struct device *dev, struct rtc_time *tm)
 	return sd2405_i2c_set_time(to_i2c_client(dev), tm);
 }
 
-static int sd2405_remove(struct i2c_client *client)
-{
-#if 0
-	struct rtc_device *rtc = i2c_get_clientdata(client);
-
-	if (rtc)
-		rtc_device_unregister(rtc);
-#endif
-	return 0;
-}
-
 static const struct rtc_class_ops sd2405_rtc_ops = {
 	.read_time = sd2405_rtc_read_time,
 	.set_time = sd2405_rtc_set_time,
@@ -229,7 +218,6 @@ static struct i2c_driver sd2405_driver = {
 		   .name = "rtc-sd2405",
 		   },
 	.probe = sd2405_probe,
-	.remove = sd2405_remove,
 	.id_table = sd2405_id,
 };
 
diff --git a/platform/centec-arm64/tsingma-bsp/src/sdhci-ctc5236/sdhci-ctc5236.c b/platform/centec-arm64/tsingma-bsp/src/sdhci-ctc5236/sdhci-ctc5236.c
index 5641ba6cd..41516bde3 100755
--- a/platform/centec-arm64/tsingma-bsp/src/sdhci-ctc5236/sdhci-ctc5236.c
+++ b/platform/centec-arm64/tsingma-bsp/src/sdhci-ctc5236/sdhci-ctc5236.c
@@ -327,7 +327,7 @@ static int sdhci_ctc5236_probe(struct platform_device *pdev)
 
 	version = (val == 0x1) ? CTC_REV_TM_1_1 : CTC_REV_TM_1_0;
 
-	mmc_of_parse_voltage(pdev->dev.of_node, &host->ocr_mask);
+	mmc_of_parse_voltage(host->mmc, &host->ocr_mask);
 
 	ret = mmc_of_parse(host->mmc);
 	if (ret)

From 80e743716c00e3d92bf8121009d7e391ab7c7338 Mon Sep 17 00:00:00 2001
From: Arun Saravanan Balachandran
 <52521751+ArunSaravananBalachandran@users.noreply.github.com>
Date: Thu, 7 Dec 2023 23:38:42 +0530
Subject: [PATCH 0035/1115] [Dell] S6100 - Update EEPROM API serial_number_str
 to return service tag instead of serial number (#17440)

To modify EEPROM API serial_number_str to return service tag instead of serial number in Dell S6100.
Ref PR: #1239

How I did it
Update EEPROM API serial_number_str to return service tag instead of serial number.

How to verify it
Verify decode-syseeprom -s returns service tag in Dell S6100.
---
 .../s6100/sonic_platform/chassis.py            |  2 +-
 .../s6100/sonic_platform/eeprom.py             | 18 ++++++++----------
 .../s6100/sonic_platform/module.py             |  2 +-
 3 files changed, 10 insertions(+), 12 deletions(-)

diff --git a/platform/broadcom/sonic-platform-modules-dell/s6100/sonic_platform/chassis.py b/platform/broadcom/sonic-platform-modules-dell/s6100/sonic_platform/chassis.py
index 6af22720f..f151193b1 100755
--- a/platform/broadcom/sonic-platform-modules-dell/s6100/sonic_platform/chassis.py
+++ b/platform/broadcom/sonic-platform-modules-dell/s6100/sonic_platform/chassis.py
@@ -216,7 +216,7 @@ def get_serial(self):
         Returns:
             string: Serial number of chassis
         """
-        return self._eeprom.serial_str()
+        return self._eeprom.serial_number_str()
 
     def get_status(self):
         """
diff --git a/platform/broadcom/sonic-platform-modules-dell/s6100/sonic_platform/eeprom.py b/platform/broadcom/sonic-platform-modules-dell/s6100/sonic_platform/eeprom.py
index cab1998be..a2f5eb48e 100644
--- a/platform/broadcom/sonic-platform-modules-dell/s6100/sonic_platform/eeprom.py
+++ b/platform/broadcom/sonic-platform-modules-dell/s6100/sonic_platform/eeprom.py
@@ -83,8 +83,14 @@ def __init__(self, i2c_line=0, iom_eeprom=False):
                 self.eeprom_tlv_dict[mac_code] = '00:00:00:00:00:00'
 
     def serial_number_str(self):
-        (is_valid, results) = self.get_tlv_field(
-                    self.eeprom_data, self._TLV_CODE_SERIAL_NUMBER)
+        # For Chassis, return service tag instead of serial number
+        if not self.is_module:
+            (is_valid, results) = self.get_tlv_field(
+                        self.eeprom_data, self._TLV_CODE_SERVICE_TAG)
+        else:
+            (is_valid, results) = self.get_tlv_field(
+                        self.eeprom_data, self._TLV_CODE_SERIAL_NUMBER)
+
         if not is_valid:
             return "N/A"
 
@@ -118,14 +124,6 @@ def part_number_str(self):
 
         return results[2].decode('ascii')
 
-    def serial_str(self):
-        (is_valid, results) = self.get_tlv_field(
-                    self.eeprom_data, self._TLV_CODE_SERVICE_TAG)
-        if not is_valid:
-            return "N/A"
-
-        return results[2].decode('ascii')
-
     def revision_str(self):
         (is_valid, results) = self.get_tlv_field(
                     self.eeprom_data, self._TLV_CODE_LABEL_REVISION)
diff --git a/platform/broadcom/sonic-platform-modules-dell/s6100/sonic_platform/module.py b/platform/broadcom/sonic-platform-modules-dell/s6100/sonic_platform/module.py
index 163a0ab39..751d90fcc 100644
--- a/platform/broadcom/sonic-platform-modules-dell/s6100/sonic_platform/module.py
+++ b/platform/broadcom/sonic-platform-modules-dell/s6100/sonic_platform/module.py
@@ -139,7 +139,7 @@ def get_serial(self):
         Returns:
             string: Serial number of module
         """
-        return self._eeprom.serial_str()
+        return self._eeprom.serial_number_str()
 
     def get_status(self):
         """

From 2e072beb41fe571895527df1ee34a67068d5e393 Mon Sep 17 00:00:00 2001
From: Ying Xie <yxieca@users.noreply.github.com>
Date: Thu, 7 Dec 2023 11:01:47 -0800
Subject: [PATCH 0036/1115] Revert "[pmon] update gRPC version to 1.57.0
 (#16257)" (#17401)

This reverts commit 45a852233b22896c4c0d3ea3e21738fd31da698f.
---
 dockers/docker-platform-monitor/Dockerfile.j2                 | 4 ++--
 .../versions/dockers/docker-platform-monitor/versions-py3     | 4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/dockers/docker-platform-monitor/Dockerfile.j2 b/dockers/docker-platform-monitor/Dockerfile.j2
index de1bdb620..ee971e369 100755
--- a/dockers/docker-platform-monitor/Dockerfile.j2
+++ b/dockers/docker-platform-monitor/Dockerfile.j2
@@ -36,8 +36,8 @@ RUN apt-get update &&   \
 # doesn't ensure all dependencies are installed in the container. So here we
 # install any dependencies required by the Arista sonic_platform package.
 # TODO: eliminate the need to install these explicitly.
-RUN pip3 install grpcio==1.57.0 \
-        grpcio-tools==1.57.0
+RUN pip3 install grpcio==1.39.0 \
+        grpcio-tools==1.39.0
 
 # Barefoot platform vendors' sonic_platform packages import these Python libraries
 RUN pip3 install thrift==0.13.0 netifaces
diff --git a/files/build/versions/dockers/docker-platform-monitor/versions-py3 b/files/build/versions/dockers/docker-platform-monitor/versions-py3
index 78fa61800..685f61058 100644
--- a/files/build/versions/dockers/docker-platform-monitor/versions-py3
+++ b/files/build/versions/dockers/docker-platform-monitor/versions-py3
@@ -1,8 +1,8 @@
 attrs==20.3.0
 certifi==2023.7.22
 charset-normalizer==3.2.0
-grpcio==1.57.0
-grpcio-tools==1.57.0
+grpcio==1.39.0
+grpcio-tools==1.39.0
 guacamole==0.9.2
 idna==3.4
 importlib-metadata==1.6.0

From 5992765d943aef9c954aea3876ec732ad65e8fbb Mon Sep 17 00:00:00 2001
From: Xichen96 <lukelin0907@gmail.com>
Date: Fri, 8 Dec 2023 06:50:38 +0800
Subject: [PATCH 0037/1115] [dhcp_server] add show range cli (#17262)

* add show range

* add support for single ip
---
 .../cli-plugin-tests/mock_config_db.json      | 16 +++---
 .../cli-plugin-tests/test_show_dhcp_server.py | 55 +++++++++++++++++++
 .../cli/show/plugins/show_dhcp_server.py      | 41 +++++++++++++-
 3 files changed, 102 insertions(+), 10 deletions(-)

diff --git a/dockers/docker-dhcp-server/cli-plugin-tests/mock_config_db.json b/dockers/docker-dhcp-server/cli-plugin-tests/mock_config_db.json
index 3bd3eab7e..c8f42d4c3 100644
--- a/dockers/docker-dhcp-server/cli-plugin-tests/mock_config_db.json
+++ b/dockers/docker-dhcp-server/cli-plugin-tests/mock_config_db.json
@@ -1,4 +1,7 @@
 {
+    "FEATURE|dhcp_server": {
+        "state": "enabled"
+    },
     "DHCP_SERVER_IPV4|Vlan100": {
         "gateway": "100.1.1.1",
         "lease_time": "3600",
@@ -15,16 +18,13 @@
         "value": "dummy_value"
     },
     "DHCP_SERVER_IPV4_RANGE|range1": {
-        "ranges": [
-            "100.1.1.3",
-            "100.1.1.5"
-        ]
+        "range": "100.1.1.3,100.1.1.5"
     },
     "DHCP_SERVER_IPV4_RANGE|range2": {
-        "ips": [
-            "100.1.1.7",
-            "100.1.1.8"
-        ]
+        "range": "100.1.1.9,100.1.1.8"
+    },
+    "DHCP_SERVER_IPV4_RANGE|range3": {
+        "range": "100.1.1.10"
     },
     "DHCP_SERVER_IPV4_IP|eth0": {
         "ip": "240.127.1.2"
diff --git a/dockers/docker-dhcp-server/cli-plugin-tests/test_show_dhcp_server.py b/dockers/docker-dhcp-server/cli-plugin-tests/test_show_dhcp_server.py
index 0cb375515..a41650584 100644
--- a/dockers/docker-dhcp-server/cli-plugin-tests/test_show_dhcp_server.py
+++ b/dockers/docker-dhcp-server/cli-plugin-tests/test_show_dhcp_server.py
@@ -55,3 +55,58 @@ def test_show_dhcp_server_ipv4_lease_client_not_in_fdb(self, mock_db):
         result = runner.invoke(show_dhcp_server.dhcp_server.commands["ipv4"].commands["lease"], ["Vlan1001"], obj=db)
         assert result.exit_code == 0, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
         assert result.stdout == expected_stdout
+
+    def test_show_dhcp_server_ipv4_range_without_name(self, mock_db):
+        expected_stdout = """\
+Range    IP Start    IP End      IP Count
+-------  ----------  ----------  ----------------------
+range1   100.1.1.3   100.1.1.5   3
+range2   100.1.1.9   100.1.1.8   range value is illegal
+range3   100.1.1.10  100.1.1.10  1
+"""
+        runner = CliRunner()
+        db = clicommon.Db()
+        db.db = mock_db
+        result = runner.invoke(show_dhcp_server.dhcp_server.commands["ipv4"].commands["range"], [], obj=db)
+        assert result.exit_code == 0, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
+        assert result.stdout == expected_stdout
+
+    def test_show_dhcp_server_ipv4_range_with_name(self, mock_db):
+        expected_stdout = """\
+Range    IP Start    IP End       IP Count
+-------  ----------  ---------  ----------
+range1   100.1.1.3   100.1.1.5           3
+"""
+        runner = CliRunner()
+        db = clicommon.Db()
+        db.db = mock_db
+        result = runner.invoke(show_dhcp_server.dhcp_server.commands["ipv4"].commands["range"], ["range1"], obj=db)
+        assert result.exit_code == 0, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
+        assert result.stdout == expected_stdout
+
+    def test_show_dhcp_server_ipv4_range_wrong_data(self, mock_db):
+        expected_stdout = """\
+Range    IP Start    IP End     IP Count
+-------  ----------  ---------  ----------------------
+range2   100.1.1.9   100.1.1.8  range value is illegal
+"""
+        runner = CliRunner()
+        db = clicommon.Db()
+        db.db = mock_db
+        result = runner.invoke(show_dhcp_server.dhcp_server.commands["ipv4"].commands["range"], ["range2"], obj=db)
+        assert result.exit_code == 0, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
+        assert result.stdout == expected_stdout
+
+    def test_show_dhcp_server_ipv4_range_single_ip(self, mock_db):
+        expected_stdout = """\
+Range    IP Start    IP End        IP Count
+-------  ----------  ----------  ----------
+range3   100.1.1.10  100.1.1.10           1
+"""
+        runner = CliRunner()
+        db = clicommon.Db()
+        db.db = mock_db
+        result = runner.invoke(show_dhcp_server.dhcp_server.commands["ipv4"].commands["range"], ["range3"], obj=db)
+        assert result.exit_code == 0, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
+        assert result.stdout == expected_stdout
+
diff --git a/dockers/docker-dhcp-server/cli/show/plugins/show_dhcp_server.py b/dockers/docker-dhcp-server/cli/show/plugins/show_dhcp_server.py
index d21085693..303216855 100644
--- a/dockers/docker-dhcp-server/cli/show/plugins/show_dhcp_server.py
+++ b/dockers/docker-dhcp-server/cli/show/plugins/show_dhcp_server.py
@@ -12,9 +12,13 @@ def ts_to_str(ts):
 
 
 @click.group(cls=clicommon.AliasedGroup)
-def dhcp_server():
+@clicommon.pass_db
+def dhcp_server(db):
     """Show dhcp_server related info"""
-    pass
+    ctx = click.get_current_context()
+    dbconn = db.db
+    if dbconn.get("CONFIG_DB", "FEATURE|dhcp_server", "state") != "enabled":
+        ctx.fail("Feature dhcp_server is not enabled")
 
 
 @dhcp_server.group(cls=clicommon.AliasedGroup)
@@ -42,5 +46,38 @@ def lease(db, dhcp_interface):
     click.echo(tabulate(table, headers=headers))
 
 
+def count_ipv4(start, end):
+    ip1 = int(ipaddress.IPv4Address(start))
+    ip2 = int(ipaddress.IPv4Address(end))
+    return ip2 - ip1 + 1
+
+
+@ipv4.command()
+@click.argument('range_name', required=False)
+@clicommon.pass_db
+def range(db, range_name):
+    if not range_name:
+        range_name = "*"
+    headers = ["Range", "IP Start", "IP End", "IP Count"]
+    table = []
+    dbconn = db.db
+    for key in dbconn.keys("CONFIG_DB", "DHCP_SERVER_IPV4_RANGE|" + range_name):
+        name = key.split("|")[1]
+        entry = dbconn.get_all("CONFIG_DB", key)
+        range_ = entry["range"].split(",")
+        if len(range_) == 1:
+            start, end = range_[0], range_[0]
+        elif len(range_) == 2:
+            start, end = range_
+        else:
+            table.append([name, "", "", "range value is illegal"])
+            continue
+        count = count_ipv4(start, end)
+        if count < 1:
+            count = "range value is illegal"
+        table.append([name, start, end, count])
+    click.echo(tabulate(table, headers=headers))
+
+
 def register(cli):
     cli.add_command(dhcp_server)

From b61528bee9e68501f7789c3293675802636aeb7b Mon Sep 17 00:00:00 2001
From: Stepan Blyshchak <38952541+stepanblyschak@users.noreply.github.com>
Date: Fri, 8 Dec 2023 01:20:39 +0200
Subject: [PATCH 0038/1115] Revert "[swss/syncd] remove dependency on
 interfaces-config.service (#13084) (#14341)" (#15094) (#17367)

This reverts commit 499f57a7f772b4e3aca5a855640bcb406b399141.

Co-authored-by: Nazarii Hnydyn <nazariig@nvidia.com>
---
 files/build_templates/per_namespace/swss.service.j2  | 1 +
 files/build_templates/per_namespace/syncd.service.j2 | 1 +
 2 files changed, 2 insertions(+)

diff --git a/files/build_templates/per_namespace/swss.service.j2 b/files/build_templates/per_namespace/swss.service.j2
index 58bca6a21..765bee8a7 100644
--- a/files/build_templates/per_namespace/swss.service.j2
+++ b/files/build_templates/per_namespace/swss.service.j2
@@ -11,6 +11,7 @@ Requires=opennsl-modules.service
 {% endif %}
 Requires=updategraph.service
 After=updategraph.service
+After=interfaces-config.service
 BindsTo=sonic.target
 After=sonic.target
 Before=ntp-config.service
diff --git a/files/build_templates/per_namespace/syncd.service.j2 b/files/build_templates/per_namespace/syncd.service.j2
index 1fb803390..66861efca 100644
--- a/files/build_templates/per_namespace/syncd.service.j2
+++ b/files/build_templates/per_namespace/syncd.service.j2
@@ -16,6 +16,7 @@ After=nps-modules.service
 {% endif %}
 Requires=updategraph.service
 After=updategraph.service
+After=interfaces-config.service
 BindsTo=sonic.target
 After=sonic.target
 Before=ntp-config.service

From b222c7c2403d9069b4b5746a8a63ccaf2a5ebd98 Mon Sep 17 00:00:00 2001
From: Aravind-Subbaroyan
 <125076667+Aravind-Subbaroyan@users.noreply.github.com>
Date: Thu, 7 Dec 2023 17:05:05 -0800
Subject: [PATCH 0039/1115] Update cisco-8000.ini (#17428)

FCS/CRC Errors will only be reported as RX_ERR.
Fix to avoid the mac port related errors.
Fix for sharedResSize testcase failure in QoS-SAI
Fix the issue related to voltage in 'show platform psustatus'.
Support WRED drop for lossy queues.
Fixed an issue where lossy traffic was getting dropped.
Enhancement of SAI logging for errors and interrupts
---
 platform/checkout/cisco-8000.ini | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/platform/checkout/cisco-8000.ini b/platform/checkout/cisco-8000.ini
index e6ceacf35..d07141d59 100644
--- a/platform/checkout/cisco-8000.ini
+++ b/platform/checkout/cisco-8000.ini
@@ -1,3 +1,3 @@
 [module]
 repo=git@github.com:Cisco-8000-sonic/platform-cisco-8000.git
-ref=202205.2.2.11
+ref=202305.1.0.3

From 278a9585171eedfc60f942374602ad52ff928071 Mon Sep 17 00:00:00 2001
From: Nazarii Hnydyn <nazariig@nvidia.com>
Date: Sun, 10 Dec 2023 10:28:32 +0200
Subject: [PATCH 0040/1115] [Mellanox] Disable MFT bash autocompletion (#17442)

A W/A to overcome delay of about 20 sec on login due to MFT bash autocompletion bug.
Should be reverted once a formal solution will be available in future MFT release.

- Why I did it
To overcome SN2700 20 sec delay on login

- How I did it
Removed MFT bash autocompletion part

- How to verify it
1. Build a mellanox image
2. Verify no such links after system boot.

Signed-off-by: Nazarii Hnydyn <nazariig@nvidia.com>
---
 platform/mellanox/mft/Makefile | 16 +++++++++++++++-
 1 file changed, 15 insertions(+), 1 deletion(-)

diff --git a/platform/mellanox/mft/Makefile b/platform/mellanox/mft/Makefile
index 2f331ea87..2447e4b2a 100644
--- a/platform/mellanox/mft/Makefile
+++ b/platform/mellanox/mft/Makefile
@@ -42,7 +42,8 @@ DERIVED_TARGETS = mft-oem_$(MFT_VERSION)-$(MFT_REVISION)_$(CONFIGURED_ARCH).deb
 DKMS_CTRL = /var/lib/dkms/kernel-mft-dkms/
 DKMS_TMP := $(shell mktemp -u -d -t dkms.XXXXXXXXXX)
 
-MFT_TMP = /tmp/mft_build/
+MFT_DEB_TMP := $(shell mktemp -u -d -t mft.deb.XXXXXXXXXX)
+MFT_TMP := $(shell mktemp -u -d -t mft.XXXXXXXXXX)
 
 $(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% :
 	mkdir -p $(MFT_TMP)
@@ -50,6 +51,19 @@ $(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% :
 	wget -O $(MFT_TGZ) $(MFT_TGZ_URL)
 	tar xzf $(MFT_TGZ)
 
+	# w/a: disable bash autocompletion
+	mkdir -p $(MFT_DEB_TMP)/DEBIAN
+
+	dpkg -e $(MFT_NAME)/DEBS/$(MAIN_TARGET) $(MFT_DEB_TMP)/DEBIAN
+	dpkg -x $(MFT_NAME)/DEBS/$(MAIN_TARGET) $(MFT_DEB_TMP)
+
+	rm -rf $(MFT_DEB_TMP)/etc/bash_completion.d
+	sed -i '/bash_completion.d/d' $(MFT_DEB_TMP)/DEBIAN/conffiles
+
+	dpkg -b $(MFT_DEB_TMP) $(MFT_NAME)/DEBS/$(MAIN_TARGET)
+
+	rm -rf $(MFT_DEB_TMP)
+
 	# fix timestamp
 	touch $(MFT_NAME)/DEBS/*.deb
 	mv $(MFT_NAME)/DEBS/*.deb $(DEST)

From ee598deced21c6f8d0081c0b61e8fb94677e5bdc Mon Sep 17 00:00:00 2001
From: DavidZagury <32644413+DavidZagury@users.noreply.github.com>
Date: Sun, 10 Dec 2023 16:18:11 +0200
Subject: [PATCH 0041/1115] [Mellanox][SKU] Adding Mellanox-SN4700-O8V48 SKU
 (#17425)

- Why I did it
To add new SKU Mellanox-SN4700-O8V48 with following requirements:

- How I did it
Create new SKU files based on the below definition:
* Port Mapping: 1-12 2x200G, 13-20 1x400G, 21-32 2x200G
   T0 topology: 48x200G Downlinks 8x400G uplinks.
   Length of downlink: 5m
   Length of uplink: 40m
* Auto-negotiation enable/disable: Yes
* FEC mode: RS
* Shared headroom: Enabled
* Shared headroom pool factor: 2
* Warmboot enabled: yes

- How to verify it
SONiC build with new SKU finish init, all ports up, qos tests suite from sonic-mgmt
---
 .../Mellanox-SN4700-O8V48/buffers.json.j2     |  17 +
 .../buffers_defaults_objects.j2               |   1 +
 .../buffers_defaults_t0.j2                    |  38 +++
 .../buffers_defaults_t1.j2                    |  38 +++
 .../buffers_dynamic.json.j2                   |  18 ++
 .../Mellanox-SN4700-O8V48/hwsku.json          | 172 ++++++++++
 .../pg_profile_lookup.ini                     |   1 +
 .../Mellanox-SN4700-O8V48/port_config.ini     |  74 +++++
 .../Mellanox-SN4700-O8V48/qos.json.j2         |   1 +
 .../Mellanox-SN4700-O8V48/sai.profile         |   5 +
 .../sai_4700_8x400g_48x200g.xml               | 297 ++++++++++++++++++
 11 files changed, 662 insertions(+)
 create mode 100644 device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/buffers.json.j2
 create mode 120000 device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/buffers_defaults_objects.j2
 create mode 100644 device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/buffers_defaults_t0.j2
 create mode 100644 device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/buffers_defaults_t1.j2
 create mode 100644 device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/buffers_dynamic.json.j2
 create mode 100644 device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/hwsku.json
 create mode 120000 device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/pg_profile_lookup.ini
 create mode 100644 device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/port_config.ini
 create mode 120000 device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/qos.json.j2
 create mode 100644 device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/sai.profile
 create mode 100644 device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/sai_4700_8x400g_48x200g.xml

diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/buffers.json.j2 b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/buffers.json.j2
new file mode 100644
index 000000000..07a5d9ef1
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/buffers.json.j2
@@ -0,0 +1,17 @@
+{#
+    Copyright (c) 2023 NVIDIA CORPORATION & AFFILIATES.
+    Apache-2.0
+
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+    http://www.apache.org/licenses/LICENSE-2.0
+
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+#}
+{%- set default_topo = 't0' %}
+{%- include 'buffers_config.j2' %}
diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/buffers_defaults_objects.j2 b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/buffers_defaults_objects.j2
new file mode 120000
index 000000000..c01aebb7a
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/buffers_defaults_objects.j2
@@ -0,0 +1 @@
+../../x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D48C8/buffers_defaults_objects.j2
\ No newline at end of file
diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/buffers_defaults_t0.j2 b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/buffers_defaults_t0.j2
new file mode 100644
index 000000000..02de15759
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/buffers_defaults_t0.j2
@@ -0,0 +1,38 @@
+{#
+    Copyright (c) 2023 NVIDIA CORPORATION & AFFILIATES.
+    Apache-2.0
+
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+    http://www.apache.org/licenses/LICENSE-2.0
+
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+#}
+{% set default_cable = '5m' %}
+{% set ingress_lossless_pool_size =  '49946624' %}
+{% set ingress_lossless_pool_xoff  =  '4063232' %}
+{% set egress_lossless_pool_size =  '60817392' %}
+{% set egress_lossy_pool_size =  '49946624' %}
+
+{% import 'buffers_defaults_objects.j2' as defs with context %}
+
+{%- macro generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) %}
+{{ defs.generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_profile_lists_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_profile_lists(port_names_active, port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_queue_buffers_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_queue_buffers(port_names_active, port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_pg_profiles_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_pg_profiles(port_names_active, port_names_inactive) }}
+{%- endmacro %}
diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/buffers_defaults_t1.j2 b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/buffers_defaults_t1.j2
new file mode 100644
index 000000000..2c183413d
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/buffers_defaults_t1.j2
@@ -0,0 +1,38 @@
+{#
+    Copyright (c) 2023 NVIDIA CORPORATION & AFFILIATES.
+    Apache-2.0
+
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+    http://www.apache.org/licenses/LICENSE-2.0
+
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+#}
+{% set default_cable = '300m' %}
+{% set ingress_lossless_pool_size =  '47546368' %}
+{% set ingress_lossless_pool_xoff  =  '6463488' %}
+{% set egress_lossless_pool_size =  '60817392' %}
+{% set egress_lossy_pool_size =  '47546368' %}
+
+{% import 'buffers_defaults_objects.j2' as defs with context %}
+
+{%- macro generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) %}
+{{ defs.generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_profile_lists_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_profile_lists(port_names_active, port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_queue_buffers_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_queue_buffers(port_names_active, port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_pg_profiles_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_pg_profiles(port_names_active, port_names_inactive) }}
+{%- endmacro %}
diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/buffers_dynamic.json.j2 b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/buffers_dynamic.json.j2
new file mode 100644
index 000000000..eb46dffb8
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/buffers_dynamic.json.j2
@@ -0,0 +1,18 @@
+{#
+    Copyright (c) 2023 NVIDIA CORPORATION & AFFILIATES.
+    Apache-2.0
+
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+    http://www.apache.org/licenses/LICENSE-2.0
+
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+#}
+{%- set default_topo = 't0' %}
+{%- set dynamic_mode = 'true' %}
+{%- include 'buffers_config.j2' %}
diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/hwsku.json b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/hwsku.json
new file mode 100644
index 000000000..62030cf19
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/hwsku.json
@@ -0,0 +1,172 @@
+{
+    "interfaces": {
+        "Ethernet0": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+        },
+        "Ethernet4": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+        },
+        "Ethernet8": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+        },
+        "Ethernet12": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+        },
+        "Ethernet16": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+        },
+        "Ethernet20": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+        },
+        "Ethernet24": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+        },
+        "Ethernet28": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+        },
+        "Ethernet32": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+        },
+        "Ethernet36": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+        },
+        "Ethernet40": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+        },
+        "Ethernet44": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+        },
+        "Ethernet48": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+        },
+        "Ethernet52": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+        },
+        "Ethernet56": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+        },
+        "Ethernet60": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+        },
+        "Ethernet64": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+        },
+        "Ethernet68": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+        },
+        "Ethernet72": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+        },
+        "Ethernet76": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+        },
+        "Ethernet80": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+        },
+        "Ethernet84": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+        },
+        "Ethernet88": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+        },
+        "Ethernet92": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+        },
+        "Ethernet96": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]"
+        },
+        "Ethernet104": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]"
+        },
+        "Ethernet112": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]"
+        },
+        "Ethernet120": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]"
+        },
+        "Ethernet128": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]"
+        },
+        "Ethernet136": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]"
+        },
+        "Ethernet144": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]"
+        },
+        "Ethernet152": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]"
+        },
+        "Ethernet160": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+        },
+        "Ethernet164": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+        },
+        "Ethernet168": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+        },
+        "Ethernet172": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+        },
+        "Ethernet176": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+        },
+        "Ethernet180": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+        },
+        "Ethernet184": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+        },
+        "Ethernet188": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+        },
+        "Ethernet192": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+        },
+        "Ethernet196": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+        },
+        "Ethernet200": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+        },
+        "Ethernet204": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+        },
+        "Ethernet208": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+        },
+        "Ethernet212": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+        },
+        "Ethernet216": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+        },
+        "Ethernet220": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+        },
+        "Ethernet224": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+        },
+        "Ethernet228": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+        },
+        "Ethernet232": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+        },
+        "Ethernet236": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+        },
+        "Ethernet240": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+        },
+        "Ethernet244": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+        },
+        "Ethernet248": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+        },
+        "Ethernet252": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+        }
+    }
+}
diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/pg_profile_lookup.ini b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/pg_profile_lookup.ini
new file mode 120000
index 000000000..66cab04d2
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/pg_profile_lookup.ini
@@ -0,0 +1 @@
+../Mellanox-SN4700-C128/pg_profile_lookup.ini
\ No newline at end of file
diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/port_config.ini b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/port_config.ini
new file mode 100644
index 000000000..55ac271b9
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/port_config.ini
@@ -0,0 +1,74 @@
+##
+## Copyright (c) 2023 NVIDIA CORPORATION & AFFILIATES.
+## Apache-2.0
+##
+## Licensed under the Apache License, Version 2.0 (the "License");
+## you may not use this file except in compliance with the License.
+## You may obtain a copy of the License at
+##
+## http://www.apache.org/licenses/LICENSE-2.0
+##
+## Unless required by applicable law or agreed to in writing, software
+## distributed under the License is distributed on an "AS IS" BASIS,
+## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+## See the License for the specific language governing permissions and
+## limitations under the License.
+##
+
+# name         lanes                                  alias     index    speed
+Ethernet0      0,1,2,3                                etp1a     1        200000
+Ethernet4      4,5,6,7                                etp1b     1        200000
+Ethernet8      8,9,10,11                              etp2a     2        200000
+Ethernet12     12,13,14,15                            etp2b     2        200000
+Ethernet16     16,17,18,19                            etp3a     3        200000
+Ethernet20     20,21,22,23                            etp3b     3        200000
+Ethernet24     24,25,26,27                            etp4a     4        200000
+Ethernet28     28,29,30,31                            etp4b     4        200000
+Ethernet32     32,33,34,35                            etp5a     5        200000
+Ethernet36     36,37,38,39                            etp5b     5        200000
+Ethernet40     40,41,42,43                            etp6a     6        200000
+Ethernet44     44,45,46,47                            etp6b     6        200000
+Ethernet48     48,49,50,51                            etp7a     7        200000
+Ethernet52     52,53,54,55                            etp7b     7        200000
+Ethernet56     56,57,58,59                            etp8a     8        200000
+Ethernet60     60,61,62,63                            etp8b     8        200000
+Ethernet64     64,65,66,67                            etp9a     9        200000
+Ethernet68     68,69,70,71                            etp9b     9        200000
+Ethernet72     72,73,74,75                            etp10a    10       200000
+Ethernet76     76,77,78,79                            etp10b    10       200000
+Ethernet80     80,81,82,83                            etp11a    11       200000
+Ethernet84     84,85,86,87                            etp11b    11       200000
+Ethernet88     88,89,90,91                            etp12a    12       200000
+Ethernet92     92,93,94,95                            etp12b    12       200000
+Ethernet96     96,97,98,99,100,101,102,103            etp13     13       400000
+Ethernet104    104,105,106,107,108,109,110,111        etp14     14       400000
+Ethernet112    112,113,114,115,116,117,118,119        etp15     15       400000
+Ethernet120    120,121,122,123,124,125,126,127        etp16     16       400000
+Ethernet128    128,129,130,131,132,133,134,135        etp17     17       400000
+Ethernet136    136,137,138,139,140,141,142,143        etp18     18       400000
+Ethernet144    144,145,146,147,148,149,150,151        etp19     19       400000
+Ethernet152    152,153,154,155,156,157,158,159        etp20     20       400000
+Ethernet160    160,161,162,163                        etp21a    21       200000
+Ethernet164    164,165,166,167                        etp21b    21       200000
+Ethernet168    168,169,170,171                        etp22a    22       200000
+Ethernet172    172,173,174,175                        etp22b    22       200000
+Ethernet176    176,177,178,179                        etp23a    23       200000
+Ethernet180    180,181,182,183                        etp23b    23       200000
+Ethernet184    184,185,186,187                        etp24a    24       200000
+Ethernet188    188,189,190,191                        etp24b    24       200000
+Ethernet192    192,193,194,195                        etp25a    25       200000
+Ethernet196    196,197,198,199                        etp25b    25       200000
+Ethernet200    200,201,202,203                        etp26a    26       200000
+Ethernet204    204,205,206,207                        etp26b    26       200000
+Ethernet208    208,209,210,211                        etp27a    27       200000
+Ethernet212    212,213,214,215                        etp27b    27       200000
+Ethernet216    216,217,218,219                        etp28a    28       200000
+Ethernet220    220,221,222,223                        etp28b    28       200000
+Ethernet224    224,225,226,227                        etp29a    29       200000
+Ethernet228    228,229,230,231                        etp29b    29       200000
+Ethernet232    232,233,234,235                        etp30a    30       200000
+Ethernet236    236,237,238,239                        etp30b    30       200000
+Ethernet240    240,241,242,243                        etp31a    31       200000
+Ethernet244    244,245,246,247                        etp31b    31       200000
+Ethernet248    248,249,250,251                        etp32a    32       200000
+Ethernet252    252,253,254,255                        etp32b    32       200000
diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/qos.json.j2 b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/qos.json.j2
new file mode 120000
index 000000000..eccf286dc
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/qos.json.j2
@@ -0,0 +1 @@
+../../x86_64-mlnx_msn2700-r0/ACS-MSN2700/qos.json.j2
\ No newline at end of file
diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/sai.profile b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/sai.profile
new file mode 100644
index 000000000..e0109ecf2
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/sai.profile
@@ -0,0 +1,5 @@
+SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_4700_8x400g_48x200g.xml
+SAI_DUMP_STORE_PATH=/var/log/mellanox/sdk-dumps
+SAI_DUMP_STORE_AMOUNT=10
+SAI_DUMP_MFT_CFG_PATH=/etc/sonic/mft/fwtrace_cfg
+SAI_DEFAULT_SWITCHING_MODE_STORE_FORWARD=1
diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/sai_4700_8x400g_48x200g.xml b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/sai_4700_8x400g_48x200g.xml
new file mode 100644
index 000000000..bb1f8646b
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/sai_4700_8x400g_48x200g.xml
@@ -0,0 +1,297 @@
+<!--
+  Copyright (c) 2019-2023 NVIDIA CORPORATION & AFFILIATES.
+  Apache-2.0
+
+  Licensed under the Apache License, Version 2.0 (the "License");
+  you may not use this file except in compliance with the License.
+  You may obtain a copy of the License at
+
+  http://www.apache.org/licenses/LICENSE-2.0
+
+  Unless required by applicable law or agreed to in writing, software
+  distributed under the License is distributed on an "AS IS" BASIS,
+  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+  See the License for the specific language governing permissions and
+  limitations under the License.
+-->
+
+<root>
+    <platform_info type="4700">
+
+        <!-- Device MAC address  -->
+        <device-mac-address>00:02:03:04:05:00</device-mac-address>
+
+        <!-- ISSU enabled -->
+        <issu-enabled>1</issu-enabled>
+
+        <!-- Number of ports in the following port list -->
+        <number-of-physical-ports>32</number-of-physical-ports>
+
+        <!-- Global port late create -->
+        <late-create-all-ports>1</late-create-all-ports>
+
+        <!-- List of ports in the device -->
+        <ports-list>
+            <port-info>
+                <local-port>1</local-port>
+                <width>8</width>
+                <module>17</module>
+
+                <!-- 0 none, 1=2, 2=4, 3=2,4 -->
+                <breakout-modes>0</breakout-modes>
+
+                <!-- (BITMASK) 2 - 1Gb , 16 - 10Gb , 32 - 40Gb , 384 - 50Gb , 1536 - 100Gb , 4096 - 200Gb -->
+                <port-speed>32768</port-speed>
+                <split>1</split>
+            </port-info>
+            <port-info>
+                <local-port>5</local-port>
+                <width>8</width>
+                <module>16</module>
+                <breakout-modes>0</breakout-modes>
+                <port-speed>32768</port-speed>
+                <split>1</split>
+            </port-info>
+            <port-info>
+                <local-port>9</local-port>
+                <width>8</width>
+                <module>19</module>
+                <breakout-modes>0</breakout-modes>
+                <port-speed>32768</port-speed>
+                <split>1</split>
+            </port-info>
+            <port-info>
+                <local-port>13</local-port>
+                <width>8</width>
+                <module>18</module>
+                <breakout-modes>0</breakout-modes>
+                <port-speed>32768</port-speed>
+                <split>1</split>
+            </port-info>
+            <port-info>
+                <local-port>17</local-port>
+                <width>8</width>
+                <module>21</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>2</split>
+            </port-info>
+            <port-info>
+                <local-port>21</local-port>
+                <width>8</width>
+                <module>20</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>2</split>
+            </port-info>
+            <port-info>
+                <local-port>25</local-port>
+                <width>8</width>
+                <module>23</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>2</split>
+            </port-info>
+            <port-info>
+                <local-port>29</local-port>
+                <width>8</width>
+                <module>22</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>2</split>
+            </port-info>
+            <port-info>
+                <local-port>33</local-port>
+                <width>8</width>
+                <module>29</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>2</split>
+            </port-info>
+            <port-info>
+                <local-port>37</local-port>
+                <width>8</width>
+                <module>28</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>2</split>
+            </port-info>
+            <port-info>
+                <local-port>41</local-port>
+                <width>8</width>
+                <module>31</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>2</split>
+            </port-info>
+            <port-info>
+                <local-port>45</local-port>
+                <width>8</width>
+                <module>30</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>2</split>
+            </port-info>
+            <port-info>
+                <local-port>49</local-port>
+                <width>8</width>
+                <module>25</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>2</split>
+            </port-info>
+            <port-info>
+                <local-port>53</local-port>
+                <width>8</width>
+                <module>24</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>2</split>
+            </port-info>
+            <port-info>
+                <local-port>57</local-port>
+                <width>8</width>
+                <module>27</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>2</split>
+            </port-info>
+            <port-info>
+                <local-port>61</local-port>
+                <width>8</width>
+                <module>26</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>2</split>
+            </port-info>
+            <port-info>
+                <local-port>65</local-port>
+                <width>8</width>
+                <module>14</module>
+                <breakout-modes>0</breakout-modes>
+                <port-speed>32768</port-speed>
+                <split>1</split>
+            </port-info>
+            <port-info>
+                <local-port>69</local-port>
+                <width>8</width>
+                <module>15</module>
+                <breakout-modes>0</breakout-modes>
+                <port-speed>32768</port-speed>
+                <split>1</split>
+            </port-info>
+            <port-info>
+                <local-port>73</local-port>
+                <width>8</width>
+                <module>12</module>
+                <breakout-modes>0</breakout-modes>
+                <port-speed>32768</port-speed>
+                <split>1</split>
+            </port-info>
+            <port-info>
+                <local-port>77</local-port>
+                <width>8</width>
+                <module>13</module>
+                <breakout-modes>0</breakout-modes>
+                <port-speed>32768</port-speed>
+                <split>1</split>
+            </port-info>
+            <port-info>
+                <local-port>81</local-port>
+                <width>8</width>
+                <module>10</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>2</split>
+            </port-info>
+            <port-info>
+                <local-port>85</local-port>
+                <width>8</width>
+                <module>11</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>2</split>
+            </port-info>
+            <port-info>
+                <local-port>89</local-port>
+                <width>8</width>
+                <module>8</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>2</split>
+            </port-info>
+            <port-info>
+                <local-port>93</local-port>
+                <width>8</width>
+                <module>9</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>2</split>
+            </port-info>
+            <port-info>
+                <local-port>97</local-port>
+                <width>8</width>
+                <module>2</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>2</split>
+            </port-info>
+            <port-info>
+                <local-port>101</local-port>
+                <width>8</width>
+                <module>3</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>2</split>
+            </port-info>
+            <port-info>
+                <local-port>105</local-port>
+                <width>8</width>
+                <module>0</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>2</split>
+            </port-info>
+            <port-info>
+                <local-port>109</local-port>
+                <width>8</width>
+                <module>1</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>2</split>
+            </port-info>
+            <port-info>
+                <local-port>113</local-port>
+                <width>8</width>
+                <module>6</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>2</split>
+            </port-info>
+            <port-info>
+                <local-port>117</local-port>
+                <width>8</width>
+                <module>7</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>2</split>
+            </port-info>
+            <port-info>
+                <local-port>121</local-port>
+                <width>8</width>
+                <module>4</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>2</split>
+            </port-info>
+            <port-info>
+                <local-port>125</local-port>
+                <width>8</width>
+                <module>5</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>2</split>
+            </port-info>
+        </ports-list>
+    </platform_info>
+</root>

From b0bb3d40d38d6f000f415ecbe5cdacc00b748a09 Mon Sep 17 00:00:00 2001
From: Junchao-Mellanox <57339448+Junchao-Mellanox@users.noreply.github.com>
Date: Mon, 11 Dec 2023 16:42:01 +0800
Subject: [PATCH 0042/1115] [Mellanox] Implement low power mode for cmis host
 management (#17159)

- Why I did it
For cmis host management mode, the prevous sysfs cannot be used for low power mode setting. This PR reuses existing low power mode implementation in sonic_xcvr package when CMIS host management mode is enabled

- How I did it
Use sonic_xcvr low power mode implementation when CMIS host management mode is enabled.

- How to verify it
Manual test for CMIS host management mode
Regression test for old mode and backward compatible test
---
 .../mlnx-platform-api/sonic_platform/sfp.py   | 30 ++++++++++++
 .../mlnx-platform-api/tests/test_sfp.py       | 46 +++++++++++++++++++
 2 files changed, 76 insertions(+)

diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py b/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py
index 4b5c9bf4e..e0e11a50e 100644
--- a/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py
+++ b/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py
@@ -397,6 +397,18 @@ def get_lpmode(self):
         Returns:
             A Boolean, True if lpmode is enabled, False if disabled
         """
+        try:
+            if self.is_sw_control():
+                api = self.get_xcvr_api()
+                return api.get_lpmode() if api else False
+            elif DeviceDataManager.is_independent_mode():
+                file_path = SFP_SDK_MODULE_SYSFS_ROOT_TEMPLATE.format(self.sdk_index) + SFP_SYSFS_POWER_MODE
+                power_mode = utils.read_int_from_file(file_path)
+                return power_mode == POWER_MODE_LOW
+        except Exception as e:
+            print(e)
+            return False
+
         if utils.is_host():
             # To avoid performance issue,
             # call class level method to avoid initialize the whole sonic platform API
@@ -573,6 +585,24 @@ def set_lpmode(self, lpmode):
         Returns:
             A boolean, True if lpmode is set successfully, False if not
         """
+        try:
+            if self.is_sw_control():
+                api = self.get_xcvr_api()
+                if not api:
+                    return False
+                if api.get_lpmode() == lpmode:
+                    return True
+                api.set_lpmode(lpmode)
+                return api.get_lpmode() == lpmode
+            elif DeviceDataManager.is_independent_mode():
+                # FW control under CMIS host management mode. 
+                # Currently, we don't support set LPM under this mode.
+                # Just return False to indicate set Fail
+                return False
+        except Exception as e:
+            print(e)
+            return False
+
         if utils.is_host():
             # To avoid performance issue,
             # call class level method to avoid initialize the whole sonic platform API
diff --git a/platform/mellanox/mlnx-platform-api/tests/test_sfp.py b/platform/mellanox/mlnx-platform-api/tests/test_sfp.py
index d0805a0d6..4dfcf0f07 100644
--- a/platform/mellanox/mlnx-platform-api/tests/test_sfp.py
+++ b/platform/mellanox/mlnx-platform-api/tests/test_sfp.py
@@ -312,6 +312,8 @@ def test_is_sw_control(self, mock_get_db, mock_mode, mock_read):
         with pytest.raises(Exception):
             sfp.is_sw_control()
 
+    @mock.patch('sonic_platform.device_data.DeviceDataManager.is_independent_mode', mock.MagicMock(return_value=False))
+    @mock.patch('sonic_platform.sfp.SFP.is_sw_control', mock.MagicMock(return_value=False))
     @mock.patch('sonic_platform.utils.is_host', mock.MagicMock(side_effect = [True, True, False, False]))
     @mock.patch('subprocess.check_output', mock.MagicMock(side_effect = ['True', 'False']))
     @mock.patch('sonic_platform.sfp.SFP._get_lpmode', mock.MagicMock(side_effect = [True, False]))
@@ -323,6 +325,8 @@ def test_get_lpmode(self):
         assert sfp.get_lpmode()
         assert not sfp.get_lpmode()
 
+    @mock.patch('sonic_platform.device_data.DeviceDataManager.is_independent_mode', mock.MagicMock(return_value=False))
+    @mock.patch('sonic_platform.sfp.SFP.is_sw_control', mock.MagicMock(return_value=False))
     @mock.patch('sonic_platform.utils.is_host', mock.MagicMock(side_effect = [True, True, False, False]))
     @mock.patch('subprocess.check_output', mock.MagicMock(side_effect = ['True', 'False']))
     @mock.patch('sonic_platform.sfp.SFP._set_lpmode', mock.MagicMock(side_effect = [True, False]))
@@ -333,3 +337,45 @@ def test_set_lpmode(self):
         assert not sfp.set_lpmode(True)
         assert sfp.set_lpmode(False)
         assert not sfp.set_lpmode(False)
+        
+    @mock.patch('sonic_platform.device_data.DeviceDataManager.is_independent_mode', mock.MagicMock(return_value=True))
+    @mock.patch('sonic_platform.utils.read_int_from_file')
+    @mock.patch('sonic_platform.sfp.SFP.is_sw_control')
+    def test_get_lpmode_cmis_host_mangagement(self, mock_control, mock_read):
+        mock_control.return_value = True
+        sfp = SFP(0)
+        sfp.get_xcvr_api = mock.MagicMock(return_value=None)
+        assert not sfp.get_lpmode()
+        
+        mock_api = mock.MagicMock()
+        sfp.get_xcvr_api.return_value = mock_api
+        mock_api.get_lpmode = mock.MagicMock(return_value=False)
+        assert not sfp.get_lpmode()
+        
+        mock_api.get_lpmode.return_value = True
+        assert sfp.get_lpmode()
+        
+        mock_control.return_value = False
+        mock_read.return_value = 1
+        assert sfp.get_lpmode()
+        
+        mock_read.return_value = 2
+        assert not sfp.get_lpmode()
+
+    @mock.patch('sonic_platform.device_data.DeviceDataManager.is_independent_mode', mock.MagicMock(return_value=True))
+    @mock.patch('sonic_platform.sfp.SFP.is_sw_control')
+    def test_set_lpmode_cmis_host_mangagement(self, mock_control):
+        mock_control.return_value = True
+        sfp = SFP(0)
+        sfp.get_xcvr_api = mock.MagicMock(return_value=None)
+        assert not sfp.set_lpmode(False)
+        
+        mock_api = mock.MagicMock()
+        sfp.get_xcvr_api.return_value = mock_api
+        mock_api.get_lpmode = mock.MagicMock(return_value=False)
+        assert sfp.set_lpmode(False)
+        assert not sfp.set_lpmode(True)
+        
+        mock_control.return_value = False
+        assert not sfp.set_lpmode(True)
+        assert not sfp.set_lpmode(False)

From 5efb123ede3fc32ec48922998bebb4e86739bda6 Mon Sep 17 00:00:00 2001
From: Yevhen Fastiuk <yfastiuk@nvidia.com>
Date: Mon, 11 Dec 2023 23:31:35 +0200
Subject: [PATCH 0043/1115] [NTP] Add NTP extended configuration (#15058)

hld [#1296](https://github.com/sonic-net/SONiC/pull/1296)
closes [#1254](https://github.com/sonic-net/SONiC/issues/1254)
depends-on [#60](https://github.com/sonic-net/sonic-host-services/pull/60), [#781](https://github.com/sonic-net/sonic-swss-common/pull/781), [#2835](https://github.com/sonic-net/sonic-utilities/pull/2835), [#10749](https://github.com/sonic-net/sonic-mgmt/pull/10749)

#### Why I did it
To cover the next AIs:
* Configure NTP global parameters
* Add/remove new NTP servers
* Change the configuration for NTP servers
* Show NTP status
* Show NTP configuration

### How I did it
* Add YANG model for a new configuration
* Extend configuration templates to support new knobs

### Description for the changelog
* Add ability to configure NTP global parameters such as authentication, dhcp, admin state
* Change the configuration for NTP servers
* Add an ability to show NTP configuration

#### Link to config_db schema for YANG module changes
[NTP configuration](https://github.com/sonic-net/sonic-buildimage/blob/master/src/sonic-yang-models/doc/Configuration.md#ntp-and-syslog-servers)
---
 files/build_templates/init_cfg.json.j2        |  10 +
 .../build_templates/sonic_debian_extension.j2 |   4 +
 files/image_config/ntp/ntp-config.sh          |   2 +
 files/image_config/ntp/ntp-systemd-wrapper    |  11 +-
 files/image_config/ntp/ntp.conf.j2            | 126 ++++++---
 files/image_config/ntp/ntp.keys.j2            |  18 ++
 files/image_config/ntp/ntpsec                 | 100 -------
 src/sonic-config-engine/sonic-cfggen          |  28 ++
 .../tests/data/ntp/ntp_interfaces.json        |  44 ++-
 src/sonic-config-engine/tests/ntp.keys.j2     |   1 +
 .../tests/sample_output/py2/ntp.conf          |  59 +---
 .../tests/sample_output/py2/ntp.keys          |   1 +
 .../tests/sample_output/py3/ntp.conf          |  47 +---
 .../tests/sample_output/py3/ntp.keys          |   8 +
 src/sonic-config-engine/tests/test_j2files.py |  13 +-
 src/sonic-yang-models/doc/Configuration.md    | 130 ++++++++-
 .../tests/files/sample_config_db.json         |  28 +-
 .../tests/yang_model_tests/tests/ntp.json     |  77 ++++++
 .../yang_model_tests/tests_config/ntp.json    | 260 +++++++++++++++++-
 .../yang-models/sonic-ntp.yang                | 149 ++++++++++
 .../yang-templates/sonic-types.yang.j2        |  16 ++
 21 files changed, 888 insertions(+), 244 deletions(-)
 create mode 100644 files/image_config/ntp/ntp.keys.j2
 delete mode 100755 files/image_config/ntp/ntpsec
 create mode 120000 src/sonic-config-engine/tests/ntp.keys.j2
 mode change 100644 => 120000 src/sonic-config-engine/tests/sample_output/py2/ntp.conf
 create mode 120000 src/sonic-config-engine/tests/sample_output/py2/ntp.keys
 create mode 100644 src/sonic-config-engine/tests/sample_output/py3/ntp.keys

diff --git a/files/build_templates/init_cfg.json.j2 b/files/build_templates/init_cfg.json.j2
index 7ec71a358..53091a4a2 100644
--- a/files/build_templates/init_cfg.json.j2
+++ b/files/build_templates/init_cfg.json.j2
@@ -157,5 +157,15 @@
             "memory": "0M-2G:256M,2G-4G:320M,4G-8G:384M,8G-:448M",
             "num_dumps": "3"
         }
+    },
+    "NTP": {
+        "global": {
+            "authentication": "disabled",
+            "dhcp": "enabled",
+            "server_role": "disabled",
+            "src_intf": "eth0",
+            "admin_state": "enabled",
+            "vrf": "default"
+        }
     }
 }
diff --git a/files/build_templates/sonic_debian_extension.j2 b/files/build_templates/sonic_debian_extension.j2
index ed52539e2..4d58d7149 100644
--- a/files/build_templates/sonic_debian_extension.j2
+++ b/files/build_templates/sonic_debian_extension.j2
@@ -373,10 +373,14 @@ sudo dpkg --root=$FILESYSTEM_ROOT -i $debs_path/flashrom_*.deb
 sudo cp -f $IMAGE_CONFIGS/cron.d/* $FILESYSTEM_ROOT/etc/cron.d/
 
 # Copy NTP configuration files and templates
+sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT \
+    apt-get -y install ntpdate
+sudo rm -f $FILESYSTEM_ROOT/etc/network/if-up.d/ntpsec-ntpdate
 sudo cp $IMAGE_CONFIGS/ntp/ntp-config.service $FILESYSTEM_ROOT_USR_LIB_SYSTEMD_SYSTEM
 echo "ntp-config.service" | sudo tee -a $GENERATED_SERVICE_FILE
 sudo cp $IMAGE_CONFIGS/ntp/ntp-config.sh $FILESYSTEM_ROOT/usr/bin/
 sudo cp $IMAGE_CONFIGS/ntp/ntp.conf.j2 $FILESYSTEM_ROOT_USR_SHARE_SONIC_TEMPLATES/
+sudo cp $IMAGE_CONFIGS/ntp/ntp.keys.j2 $FILESYSTEM_ROOT_USR_SHARE_SONIC_TEMPLATES/
 sudo cp $IMAGE_CONFIGS/ntp/ntp-systemd-wrapper $FILESYSTEM_ROOT/usr/libexec/ntpsec/
 sudo mkdir $FILESYSTEM_ROOT_USR_LIB_SYSTEMD_SYSTEM/ntpsec.service.d
 sudo cp $IMAGE_CONFIGS/ntp/sonic-target.conf $FILESYSTEM_ROOT_USR_LIB_SYSTEMD_SYSTEM/ntpsec.service.d/
diff --git a/files/image_config/ntp/ntp-config.sh b/files/image_config/ntp/ntp-config.sh
index cda88dbf9..13469c589 100755
--- a/files/image_config/ntp/ntp-config.sh
+++ b/files/image_config/ntp/ntp-config.sh
@@ -24,6 +24,8 @@ function modify_ntp_default
 }
 
 sonic-cfggen -d -t /usr/share/sonic/templates/ntp.conf.j2 >/etc/ntpsec/ntp.conf
+sonic-cfggen -d -t /usr/share/sonic/templates/ntp.keys.j2 >/etc/ntpsec/ntp.keys
+chmod o-r /etc/ntp.keys
 
 get_database_reboot_type
 echo "Disabling NTP long jump for reboot type ${reboot_type} ..."
diff --git a/files/image_config/ntp/ntp-systemd-wrapper b/files/image_config/ntp/ntp-systemd-wrapper
index 87e8f8601..0704a8e92 100644
--- a/files/image_config/ntp/ntp-systemd-wrapper
+++ b/files/image_config/ntp/ntp-systemd-wrapper
@@ -13,7 +13,8 @@ if [ -r /etc/default/ntpsec ]; then
         . /etc/default/ntpsec
 fi
 
-if [ "$IGNORE_DHCP" != "yes" ] && [ -e /run/ntpsec/ntp.conf.dhcp ]; then
+dhcp=$(/usr/local/bin/sonic-cfggen -d -v 'NTP["global"]["dhcp"]' 2> /dev/null)
+if [ "$IGNORE_DHCP" != "yes" ] && [ -e /run/ntpsec/ntp.conf.dhcp ] && [ "$dhcp" = "enabled" ]; then
         NTPD_OPTS="$NTPD_OPTS -c /run/ntpsec/ntp.conf.dhcp"
 else
 	# List the default -c first, so if the admin has specified -c in
@@ -26,6 +27,14 @@ NTPD_OPTS="$NTPD_OPTS -u ntpsec:ntpsec"
 # Protect the service startup against concurrent ntpdate ifup hooks
 (
         if flock -w 180 9; then
+                ntpEnabled=$(/usr/local/bin/sonic-cfggen -d -v 'NTP["global"]["admin_state"]' 2> /dev/null)
+                if [ "$ntpEnabled" = "disabled" ]
+                then
+                        echo "Stopping NTP daemon"
+                        kill -9 $(cat $PIDFILE)
+                        exit 0
+                fi
+
                 # when mgmt vrf is configured, ntp starts in mgmt vrf by default unless user configures otherwise
                 vrfEnabled=$(/usr/local/bin/sonic-cfggen -d -v 'MGMT_VRF_CONFIG["vrf_global"]["mgmtVrfEnabled"]' 2> /dev/null)
                 vrfConfigured=$(/usr/local/bin/sonic-cfggen -d -v 'NTP["global"]["vrf"]' 2> /dev/null)
diff --git a/files/image_config/ntp/ntp.conf.j2 b/files/image_config/ntp/ntp.conf.j2
index c0c19db3b..0563e5044 100644
--- a/files/image_config/ntp/ntp.conf.j2
+++ b/files/image_config/ntp/ntp.conf.j2
@@ -1,9 +1,9 @@
 ###############################################################################
-# Managed by Ansible
-# file: ansible/roles/acs/templates/ntp.conf.j2
+# This file was AUTOMATICALLY GENERATED. DO NOT MODIFY.
+# Controlled by ntp-config.service
 ###############################################################################
 
-# /etc/ntpsec/ntp.conf, configuration for ntpd; see ntp.conf(5) for help
+# /etc/ntp.conf, configuration for ntpd; see ntp.conf(5) for help
 
 # To avoid ntpd from panic and exit if the drift between new time and
 # current system time is large.
@@ -12,35 +12,82 @@ tinker panic 0
 driftfile /var/lib/ntpsec/ntp.drift
 leapfile /usr/share/zoneinfo/leap-seconds.list
 
-# To enable Network Time Security support as a server, obtain a certificate
-# (e.g. with Let's Encrypt), configure the paths below, and uncomment:
-# nts cert CERT_FILE
-# nts key KEY_FILE
-# nts enable
-
-# You must create /var/log/ntpsec (owned by ntpsec:ntpsec) to enable logging.
-#statsdir /var/log/ntpsec/
-#statistics loopstats peerstats clockstats
-#filegen loopstats file loopstats type day enable
-#filegen peerstats file peerstats type day enable
-#filegen clockstats file clockstats type day enable
-
-# Specify one or more NTP servers.
-
-# Public NTP servers supporting Network Time Security:
-# server time.cloudflare.com nts
-{% for ntp_server in NTP_SERVER %}
-server {{ ntp_server }} iburst
+{# Getting NTP global configuration -#}
+{% set global = (NTP | d({})).get('global', {}) -%}
+
+{# Adding NTP servers. We need to know if we have some pools, to set proper
+config -#}
+{% set ns = namespace(is_pools=false) %}
+{% for server in NTP_SERVER if NTP_SERVER[server].admin_state != 'disabled' and
+                               NTP_SERVER[server].resolve_as and
+                               NTP_SERVER[server].association_type -%}
+    {% set config = NTP_SERVER[server] -%}
+    {# Server options -#}
+    {% set soptions = '' -%}
+    {# Server access control options -#}
+    {% set aoptions = '' -%}
+
+    {# Authentication key -#}
+    {% if global.authentication == 'enabled' -%}
+        {% if config.key -%}
+            {% set soptions = soptions ~ ' key ' ~ config.key -%}
+        {% endif -%}
+    {% endif -%}
+
+    {# Aggressive polling -#}
+    {% if config.iburst -%}
+        {% set soptions = soptions ~ ' iburst' -%}
+    {% endif -%}
+
+    {# Protocol version -#}
+    {% if config.version -%}
+        {% set soptions = soptions ~ ' version ' ~ config.version -%}
+    {% endif -%}
+
+    {# Check if there are any pool configured. BTW it doesn't matter what was
+    configured as "resolve_as" for pools. If they were configured with FQDN they
+    must remain like that -#}
+    {% set config_as = config.resolve_as -%}
+    {% if config.association_type == 'pool' -%}
+        {% set ns.is_pools = true -%}
+        {% set config_as = server -%}
+    {% else -%}
+        {% set aoptions = aoptions ~ ' nopeer' -%}
+    {% endif -%}
+
+{{ config.association_type }} {{ config_as }}{{ soptions }}
+{% if global.server_role == 'disabled' %}
+restrict {{ config_as }} kod limited nomodify notrap noquery{{ aoptions }}
+{% endif %}
+
+{% endfor -%}
+
+{% set trusted_keys_arr = [] -%}
+{% for key in NTP_KEY -%}
+    {% set keydata = NTP_KEY[key] -%}
+    {% if keydata.trusted == 'yes' -%}
+        {% set trusted_keys_arr = trusted_keys_arr.append(key) -%}
+    {% endif -%}
 {% endfor %}
 
-# pool.ntp.org maps to about 1000 low-stratum NTP servers.  Your server will
-# pick a different set every time it starts up.  Please consider joining the
-# pool: <https://www.pool.ntp.org/join.html>
+{% if global.authentication == 'enabled' %}
+keys /etc/ntpsec/ntp.keys
+{% if trusted_keys_arr != [] %}
+trustedkey {{ trusted_keys_arr|join(' ') }}
+{% endif %}
+{% endif %}
 
-#listen on source interface if configured, else 
-#only listen on MGMT_INTERFACE, LOOPBACK_INTERFACE ip when MGMT_INTERFACE is not defined, or eth0 
-# if we don't have both of them (default is to listen on all ip addresses)
+{# listen on source interface if configured, else only listen on MGMT_INTERFACE,
+LOOPBACK_INTERFACE ip when MGMT_INTERFACE is not defined, or eth0 if we don't
+have both of them (default is to listen on all ip addresses) -#}
 interface ignore wildcard
+
+{# Set interface to listen on:
+     * Set global variable for configured source interface name.
+     * Set global boolean to indicate if the ip of the configured source
+       interface is configured.
+     * If the source interface is configured but no ip on that
+       interface, then listen on another interface based on existing logic. -#}
 {%- macro check_ip_on_interface(interface_name, table_name) %}
     {%- set ns = namespace(valid_intf = 'false') %}
     {%- if table_name %}
@@ -55,8 +102,8 @@ interface ignore wildcard
 
 {% set ns = namespace(source_intf = "") %}
 {%- set ns = namespace(source_intf_ip = 'false') %}
-{%- if (NTP) and (NTP['global']['src_intf'])  %}
-    {%- set ns.source_intf = (NTP['global']['src_intf']) %}
+{%- if global.src_intf  %}
+    {%- set ns.source_intf = global.src_intf %}
     {%- if ns.source_intf != "" %}
         {%- if ns.source_intf == "eth0" %}
             {%- set ns.source_intf_ip = 'true' %}
@@ -91,16 +138,19 @@ interface listen eth0
 {% endif %}
 interface listen 127.0.0.1
 
-# Access control configuration; see /usr/share/doc/ntpsec-doc/html/accopt.html
-# for details.
-#
-# Note that "restrict" applies to both servers and clients, so a configuration
-# that might be intended to block requests from certain clients could also end
-# up blocking replies from your own upstream servers.
+{# Access control options -#}
+{% set options = '' -%}
+
+{# Disable NTP server functionality. Should stay on when dhcp is enabled -#}
+{# {% if global.server_role == 'disabled' and global.dhcp == 'disabled' -%}
+    {% set options = options ~ ' ignore' -%}
+{% endif -%} #}
 
+# Access control configuration
 # By default, exchange time with everybody, but don't allow configuration.
-# NTPsec doesn't establish peer associations, and so nopeer has no effect, and has been removed from here
-restrict default kod nomodify noquery limited
+# NTPsec doesn't establish peer associations, and so nopeer has no effect, and
+# has been removed from here
+restrict default kod nomodify noquery limited{{ options }}
 
 # Local users may interrogate the ntp server more closely.
 restrict 127.0.0.1
diff --git a/files/image_config/ntp/ntp.keys.j2 b/files/image_config/ntp/ntp.keys.j2
new file mode 100644
index 000000000..961fc7532
--- /dev/null
+++ b/files/image_config/ntp/ntp.keys.j2
@@ -0,0 +1,18 @@
+###############################################################################
+# This file was AUTOMATICALLY GENERATED. DO NOT MODIFY.
+# Controlled by ntp-config.service
+###############################################################################
+
+{# We can connect only to the servers we trust. Determine those servers -#}
+{% set trusted_arr = [] -%}
+{% for server in NTP_SERVER if NTP_SERVER[server].trusted == 'yes' and
+                               NTP_SERVER[server].resolve_as -%}
+    {% set _ = trusted_arr.append(NTP_SERVER[server].resolve_as) -%}
+{% endfor -%}
+
+{# Define authentication keys inventory -#}
+{% set trusted_str = ' ' ~ trusted_arr|join(',') -%}
+{% for keyid in NTP_KEY if NTP_KEY[keyid].type and NTP_KEY[keyid].value %}
+{% set keyval = NTP_KEY[keyid].value | b64decode %}
+{{ keyid }} {{ NTP_KEY[keyid].type }} {{ keyval }}{{trusted_str}}
+{% endfor -%}
diff --git a/files/image_config/ntp/ntpsec b/files/image_config/ntp/ntpsec
deleted file mode 100755
index 2056a0e12..000000000
--- a/files/image_config/ntp/ntpsec
+++ /dev/null
@@ -1,100 +0,0 @@
-#!/bin/sh
-
-# This file was originally created automatically as part of default NTP application installation from debian package.
-# This is now manually modified for supporting NTP in management VRF.
-# When management VRF is enabled, the NTP application should be started using "cgexec -g l3mdev:mgmt". 
-# Check has been added to verify the management VRF enabled status and use cgexec when it is enabled.
-# This file will be copied on top of the etc/init.d/ntpsec file that gets created during build process.
-
-### BEGIN INIT INFO
-# Provides:        ntpsec
-# Required-Start:  $network $remote_fs $syslog
-# Required-Stop:   $network $remote_fs $syslog
-# Default-Start:   2 3 4 5
-# Default-Stop:
-# Short-Description: Start NTP daemon
-# Description:       NTP, the Network Time Protocol, is used to keep computer
-#                    clocks accurate by synchronizing them over the Internet or
-#                    a local network, or by following an accurate hardware
-#                    receiver that interprets GPS, DCF-77, or similar time
-#                    signals.
-### END INIT INFO
-
-PATH=/sbin:/bin:/usr/sbin:/usr/bin
-
-. /lib/lsb/init-functions
-
-DAEMON=/usr/sbin/ntpd
-PIDFILE=/run/ntpd.pid
-
-test -x $DAEMON || exit 5
-
-if [ -r /etc/default/ntpsec ]; then
-	. /etc/default/ntpsec
-fi
-
-if [ "$IGNORE_DHCP" != "yes" ] && [ -e /run/ntpsec/ntp.conf.dhcp ]; then
-	NTPD_OPTS="$NTPD_OPTS -c /run/ntpsec/ntp.conf.dhcp"
-else
-	# List the default -c first, so if the admin has specified -c in
-	# NTPD_OPTS, it is honored.
-	NTPD_OPTS="-c /etc/ntpsec/ntp.conf $NTPD_OPTS"
-fi
-
-NTPD_OPTS="$NTPD_OPTS -u ntpsec:ntpsec"
-
-LOCKFILE=/run/lock/ntpsec-ntpdate
-
-case $1 in
-	start)
-		log_daemon_msg "Starting NTP server" "ntpd"
-		(
-			flock -w 180 9
-
-			# when mgmt vrf is configured, ntp starts in mgmt vrf by default unless user configures otherwise
-			vrfEnabled=$(/usr/local/bin/sonic-cfggen -d -v 'MGMT_VRF_CONFIG["vrf_global"]["mgmtVrfEnabled"]' 2> /dev/null)
-			vrfConfigured=$(/usr/local/bin/sonic-cfggen -d -v 'NTP["global"]["vrf"]' 2> /dev/null)
-			if [ "$vrfEnabled" = "true" ]
-			then
-				if [ "$vrfConfigured" = "default" ]
-				then
-					log_daemon_msg "Starting NTP server in default-vrf for default set as NTP vrf" "ntpd"
-					start-stop-daemon --start --quiet --oknodo --pidfile $PIDFILE --startas $DAEMON -- -p $PIDFILE $NTPD_OPTS
-				else
-					log_daemon_msg "Starting NTP server in mgmt-vrf" "ntpd"
-					cgexec -g l3mdev:mgmt start-stop-daemon --start --quiet --oknodo --pidfile $PIDFILE --startas $DAEMON -- -p $PIDFILE $NTPD_OPTS
-				fi
-			else
-				log_daemon_msg "Starting NTP server in default-vrf" "ntpd"
-				start-stop-daemon --start --quiet --oknodo --pidfile $PIDFILE --startas $DAEMON -- -p $PIDFILE $NTPD_OPTS
-			fi
-		) 9>$LOCKFILE
-		log_end_msg $?
-		;;
-	stop)
-		log_daemon_msg "Stopping NTP server" "ntpd"
-		start-stop-daemon --stop --quiet --oknodo --pidfile $PIDFILE --retry=TERM/30/KILL/5 --exec $DAEMON
-		log_end_msg $?
-		rm -f $PIDFILE
-		;;
-	restart|force-reload)
-		$0 stop && sleep 2 && $0 start
-		;;
-	try-restart)
-		if $0 status >/dev/null; then
-			$0 restart
-		else
-			exit 0
-		fi
-		;;
-	reload)
-		exit 3
-		;;
-	status)
-		status_of_proc $DAEMON "NTP server"
-		;;
-	*)
-		echo "Usage: $0 {start|stop|restart|try-restart|force-reload|status}"
-		exit 2
-		;;
-esac
diff --git a/src/sonic-config-engine/sonic-cfggen b/src/sonic-config-engine/sonic-cfggen
index 58bdfaa1f..215ca3ba5 100755
--- a/src/sonic-config-engine/sonic-cfggen
+++ b/src/sonic-config-engine/sonic-cfggen
@@ -26,6 +26,7 @@ import os
 import sys
 import yaml
 import ipaddress
+import base64
 
 from collections import OrderedDict
 from config_samples import generate_sample_config, get_available_config
@@ -139,6 +140,29 @@ def ip_network(value):
         return "Invalid ip address %s" % value
     return r_v.network
 
+def b64encode(value):
+    """Base64 encoder
+    Return:
+        encoded string or the same value in case of error
+    """
+    try:
+        ret = base64.b64encode(value.encode()).decode()
+    except:
+        return value
+    return ret
+
+
+def b64decode(value):
+    """Base64 decoder
+    Return:
+        decoded string or the same value in case of error
+    """
+    try:
+        ret = base64.b64decode(value.encode()).decode()
+    except:
+        return value
+    return ret
+
 def get_primary_addr(value):
     if not value:
         return ""
@@ -274,6 +298,10 @@ def _get_jinja2_env(paths):
     for attr in ['ip', 'network', 'prefixlen', 'netmask', 'broadcast']:
         env.filters[attr] = partial(prefix_attr, attr)
 
+    # Base64 encoder/decoder
+    env.filters['b64encode'] = b64encode
+    env.filters['b64decode'] = b64decode
+
     return env
 
 def main():
diff --git a/src/sonic-config-engine/tests/data/ntp/ntp_interfaces.json b/src/sonic-config-engine/tests/data/ntp/ntp_interfaces.json
index 284758301..a8da7f133 100644
--- a/src/sonic-config-engine/tests/data/ntp/ntp_interfaces.json
+++ b/src/sonic-config-engine/tests/data/ntp/ntp_interfaces.json
@@ -1,7 +1,49 @@
 {
     "NTP": {
         "global": {
-            "src_intf": "Ethernet0"
+            "src_intf": "eth0",
+            "vrf": "default",
+            "authentication": "enabled",
+            "dhcp": "disabled",
+            "server_role": "disabled",
+            "admin_state": "enabled"
+        }
+    },
+    "NTP_SERVER": {
+        "my_ntp_server": {
+            "association_type": "server",
+            "iburst": "off",
+            "admin_state": "disabled",
+            "version": 3,
+            "resolve_as": "10.20.30.40"
+        },
+        "server2": {
+            "association_type": "server",
+            "iburst": "off",
+            "admin_state": "enabled",
+            "version": 3,
+            "resolve_as": "10.20.30.50",
+            "key": 42,
+            "trusted": "no"
+        },
+        "pool.ntp.org": {
+            "association_type": "pool",
+            "iburst": "on",
+            "admin_state": "enabled",
+            "version": 3,
+            "resolve_as": "pool.ntp.org"
+        }
+    },
+    "NTP_KEY": {
+        "1": {
+            "type": "md5",
+            "trusted": "no",
+            "value": "blabla"
+        },
+        "42": {
+            "type": "sha1",
+            "trusted": "yes",
+            "value": "the_answer"
         }
     },
     "INTERFACE": {
diff --git a/src/sonic-config-engine/tests/ntp.keys.j2 b/src/sonic-config-engine/tests/ntp.keys.j2
new file mode 120000
index 000000000..a95603db8
--- /dev/null
+++ b/src/sonic-config-engine/tests/ntp.keys.j2
@@ -0,0 +1 @@
+../../../files/image_config/ntp/ntp.keys.j2
\ No newline at end of file
diff --git a/src/sonic-config-engine/tests/sample_output/py2/ntp.conf b/src/sonic-config-engine/tests/sample_output/py2/ntp.conf
deleted file mode 100644
index fc2228e26..000000000
--- a/src/sonic-config-engine/tests/sample_output/py2/ntp.conf
+++ /dev/null
@@ -1,58 +0,0 @@
-###############################################################################
-# Managed by Ansible
-# file: ansible/roles/acs/templates/ntp.conf.j2
-###############################################################################
-
-# /etc/ntpsec/ntp.conf, configuration for ntpd; see ntp.conf(5) for help
-
-# To avoid ntpd from panic and exit if the drift between new time and
-# current system time is large.
-tinker panic 0
-
-driftfile /var/lib/ntpsec/ntp.drift
-leapfile /usr/share/zoneinfo/leap-seconds.list
-
-# To enable Network Time Security support as a server, obtain a certificate
-# (e.g. with Let's Encrypt), configure the paths below, and uncomment:
-# nts cert CERT_FILE
-# nts key KEY_FILE
-# nts enable
-
-# You must create /var/log/ntpsec (owned by ntpsec:ntpsec) to enable logging.
-#statsdir /var/log/ntpsec/
-#statistics loopstats peerstats clockstats
-#filegen loopstats file loopstats type day enable
-#filegen peerstats file peerstats type day enable
-#filegen clockstats file clockstats type day enable
-
-# Specify one or more NTP servers.
-
-# Public NTP servers supporting Network Time Security:
-# server time.cloudflare.com nts
-
-# pool.ntp.org maps to about 1000 low-stratum NTP servers.  Your server will
-# pick a different set every time it starts up.  Please consider joining the
-# pool: <https://www.pool.ntp.org/join.html>
-
-#listen on source interface if configured, else 
-#only listen on MGMT_INTERFACE, LOOPBACK_INTERFACE ip when MGMT_INTERFACE is not defined, or eth0 
-# if we don't have both of them (default is to listen on all ip addresses)
-interface ignore wildcard
-
-interface listen Ethernet0
-interface listen 127.0.0.1
-
-# Access control configuration; see /usr/share/doc/ntpsec-doc/html/accopt.html
-# for details.
-#
-# Note that "restrict" applies to both servers and clients, so a configuration
-# that might be intended to block requests from certain clients could also end
-# up blocking replies from your own upstream servers.
-
-# By default, exchange time with everybody, but don't allow configuration.
-# NTPsec doesn't establish peer associations, and so nopeer has no effect, and has been removed from here
-restrict default kod nomodify noquery limited
-
-# Local users may interrogate the ntp server more closely.
-restrict 127.0.0.1
-restrict ::1
diff --git a/src/sonic-config-engine/tests/sample_output/py2/ntp.conf b/src/sonic-config-engine/tests/sample_output/py2/ntp.conf
new file mode 120000
index 000000000..5ebe39936
--- /dev/null
+++ b/src/sonic-config-engine/tests/sample_output/py2/ntp.conf
@@ -0,0 +1 @@
+../py3/ntp.conf
\ No newline at end of file
diff --git a/src/sonic-config-engine/tests/sample_output/py2/ntp.keys b/src/sonic-config-engine/tests/sample_output/py2/ntp.keys
new file mode 120000
index 000000000..5f1ab315e
--- /dev/null
+++ b/src/sonic-config-engine/tests/sample_output/py2/ntp.keys
@@ -0,0 +1 @@
+../py3/ntp.keys
\ No newline at end of file
diff --git a/src/sonic-config-engine/tests/sample_output/py3/ntp.conf b/src/sonic-config-engine/tests/sample_output/py3/ntp.conf
index fc2228e26..413615739 100644
--- a/src/sonic-config-engine/tests/sample_output/py3/ntp.conf
+++ b/src/sonic-config-engine/tests/sample_output/py3/ntp.conf
@@ -1,9 +1,9 @@
 ###############################################################################
-# Managed by Ansible
-# file: ansible/roles/acs/templates/ntp.conf.j2
+# This file was AUTOMATICALLY GENERATED. DO NOT MODIFY.
+# Controlled by ntp-config.service
 ###############################################################################
 
-# /etc/ntpsec/ntp.conf, configuration for ntpd; see ntp.conf(5) for help
+# /etc/ntp.conf, configuration for ntpd; see ntp.conf(5) for help
 
 # To avoid ntpd from panic and exit if the drift between new time and
 # current system time is large.
@@ -12,45 +12,28 @@ tinker panic 0
 driftfile /var/lib/ntpsec/ntp.drift
 leapfile /usr/share/zoneinfo/leap-seconds.list
 
-# To enable Network Time Security support as a server, obtain a certificate
-# (e.g. with Let's Encrypt), configure the paths below, and uncomment:
-# nts cert CERT_FILE
-# nts key KEY_FILE
-# nts enable
+server 10.20.30.50 key 42 iburst version 3
+restrict 10.20.30.50 kod limited nomodify notrap noquery nopeer
 
-# You must create /var/log/ntpsec (owned by ntpsec:ntpsec) to enable logging.
-#statsdir /var/log/ntpsec/
-#statistics loopstats peerstats clockstats
-#filegen loopstats file loopstats type day enable
-#filegen peerstats file peerstats type day enable
-#filegen clockstats file clockstats type day enable
+pool pool.ntp.org iburst version 3
+restrict pool.ntp.org kod limited nomodify notrap noquery
 
-# Specify one or more NTP servers.
 
-# Public NTP servers supporting Network Time Security:
-# server time.cloudflare.com nts
+keys /etc/ntpsec/ntp.keys
+trustedkey 42
 
-# pool.ntp.org maps to about 1000 low-stratum NTP servers.  Your server will
-# pick a different set every time it starts up.  Please consider joining the
-# pool: <https://www.pool.ntp.org/join.html>
-
-#listen on source interface if configured, else 
-#only listen on MGMT_INTERFACE, LOOPBACK_INTERFACE ip when MGMT_INTERFACE is not defined, or eth0 
-# if we don't have both of them (default is to listen on all ip addresses)
 interface ignore wildcard
 
-interface listen Ethernet0
+
+
+interface listen eth0
 interface listen 127.0.0.1
 
-# Access control configuration; see /usr/share/doc/ntpsec-doc/html/accopt.html
-# for details.
-#
-# Note that "restrict" applies to both servers and clients, so a configuration
-# that might be intended to block requests from certain clients could also end
-# up blocking replies from your own upstream servers.
 
+# Access control configuration
 # By default, exchange time with everybody, but don't allow configuration.
-# NTPsec doesn't establish peer associations, and so nopeer has no effect, and has been removed from here
+# NTPsec doesn't establish peer associations, and so nopeer has no effect, and
+# has been removed from here
 restrict default kod nomodify noquery limited
 
 # Local users may interrogate the ntp server more closely.
diff --git a/src/sonic-config-engine/tests/sample_output/py3/ntp.keys b/src/sonic-config-engine/tests/sample_output/py3/ntp.keys
new file mode 100644
index 000000000..4a1a37b69
--- /dev/null
+++ b/src/sonic-config-engine/tests/sample_output/py3/ntp.keys
@@ -0,0 +1,8 @@
+###############################################################################
+# This file was AUTOMATICALLY GENERATED. DO NOT MODIFY.
+# Controlled by ntp-config.service
+###############################################################################
+
+1 md5 blabla 
+42 sha1 the_answer 
+
diff --git a/src/sonic-config-engine/tests/test_j2files.py b/src/sonic-config-engine/tests/test_j2files.py
index a65dea2b0..6a660bec2 100644
--- a/src/sonic-config-engine/tests/test_j2files.py
+++ b/src/sonic-config-engine/tests/test_j2files.py
@@ -675,10 +675,19 @@ def test_ndppd_conf(self):
 
     def test_ntp_conf(self):
         conf_template = os.path.join(self.test_dir, "ntp.conf.j2")
-        ntp_interfaces_json = os.path.join(self.test_dir, "data", "ntp", "ntp_interfaces.json")
+        config_db_ntp_json = os.path.join(self.test_dir, "data", "ntp", "ntp_interfaces.json")
         expected = os.path.join(self.test_dir, "sample_output", utils.PYvX_DIR, "ntp.conf")
 
-        argument = ['-j', ntp_interfaces_json, '-t', conf_template]
+        argument = ['-j', config_db_ntp_json, '-t', conf_template]
+        self.run_script(argument, output_file=self.output_file)
+        assert utils.cmp(expected, self.output_file), self.run_diff(expected, self.output_file)
+
+    def test_ntp_keys(self):
+        conf_template = os.path.join(self.test_dir, "ntp.keys.j2")
+        config_db_ntp_json = os.path.join(self.test_dir, "data", "ntp", "ntp_interfaces.json")
+        expected = os.path.join(self.test_dir, "sample_output", utils.PYvX_DIR, "ntp.keys")
+
+        argument = ['-j', config_db_ntp_json, '-t', conf_template]
         self.run_script(argument, output_file=self.output_file)
         assert utils.cmp(expected, self.output_file), self.run_diff(expected, self.output_file)
 
diff --git a/src/sonic-yang-models/doc/Configuration.md b/src/sonic-yang-models/doc/Configuration.md
index a28ffa5c5..5ee894f7a 100644
--- a/src/sonic-yang-models/doc/Configuration.md
+++ b/src/sonic-yang-models/doc/Configuration.md
@@ -1538,6 +1538,35 @@ These configuration options are used to modify the way that
 ntp binds to the ports on the switch and which port it uses to
 make ntp update requests from.
 
+***NTP Admin state***
+
+If this option is set to `enabled` then ntp client will try to sync system time with configured NTP servers.
+Otherwise, NTP client feature will be disabled.
+```
+{
+    "NTP": {
+        "global": {
+            "admin_state": "enabled"
+        }
+    }
+}
+```
+
+***NTP Server role***
+
+This option is used to control NTP server state on the switch.
+If this option is set to `enabled` switch will act as NTP server.
+By default `server_role` is `disabled`.
+```
+{
+    "NTP": {
+        "global": {
+            "server_role": "enabled"
+        }
+    }
+}
+```
+
 ***NTP VRF***
 
 If this option is set to `default` then ntp will run within the default vrf
@@ -1575,6 +1604,36 @@ for that address.
 }
 ```
 
+***NTP Authentication***
+
+If this option is set to `enabled` then ntp will try to verify NTP servers it connects to.
+This option **has no effect** if key is not set for NTP server.
+By default it is `disabled`
+```
+{
+    "NTP": {
+        "global": {
+            "authentication": "enabled"
+        }
+    }
+}
+```
+
+***NTP DHCP leases***
+
+If this option is set to `enabled` then ntp client will try to use NTP servers provided by DHCP server.
+If this option is set to `disabled` you will be able to use the user-configured NTP servers.
+By default it is `enabled`
+```
+{
+    "NTP": {
+        "global": {
+            "dhcp": "enabled"
+        }
+    }
+}
+```
+
 ### NTP servers
 
 These information are configured in individual tables. Domain name or IP
@@ -1585,18 +1644,77 @@ attributes in those objects.
 ```
 {
     "NTP_SERVER": {
-        "2.debian.pool.ntp.org": {},
-        "1.debian.pool.ntp.org": {},
-        "3.debian.pool.ntp.org": {},
-        "0.debian.pool.ntp.org": {}
+        "2.debian.pool.ntp.org": {
+            "association_type": "pool",
+            "iburst": "on",
+            "admin_state": "enabled",
+            "version": 4
+        },
+        "1.debian.pool.ntp.org": {
+            "association_type": "pool",
+            "iburst": "off",
+            "admin_state": "enabled",
+            "version": 3
+        },
+        "3.debian.pool.ntp.org": {
+            "association_type": "pool",
+            "iburst": "on",
+            "admin_state": "disabled",
+            "version": 4
+        },
+        "0.debian.pool.ntp.org": {
+            "association_type": "pool",
+            "iburst": "off",
+            "admin_state": "disabled",
+            "version": 3
+        }
     },
 
     "NTP_SERVER": {
-        "23.92.29.245": {},
-        "204.2.134.164": {}
+        "23.92.29.245": {
+            "association_type": "server",
+            "iburst": "on",
+            "admin_state": "enabled",
+            "version": 4,
+            "key": 3,
+            "trusted": "yes"
+        },
+        "204.2.134.164": {
+            "association_type": "server",
+            "iburst": "on",
+            "admin_state": "enabled",
+            "version": 3
+        }
+    }
+}
+```
+* `association_type` - is used to control the type of the server. It can be `server` or `pool`.
+* `iburst` - agressive server polling `{on, off}`.
+* `version` - NTP protool version to use `[3..4]`.
+* `key` - authentication key id `[1..65535]` to use to auth the server.
+* `admin_state` - enable or disable specific server.
+* `trusted` - trust this server when auth is enabled.
+
+***NTP keys***
+```
+{
+    "NTP_KEY": {
+        "1": {
+            "type": "md5",
+            "value": "bXlwYXNzd29yZA==",
+            "trusted": "yes"
+        },
+        "42": {
+            "type": "sha1",
+            "value": "dGhlYW5zd2Vy",
+            "trusted": "no"
+        }
     }
 }
 ```
+* `type` - key type to use `{md5, sha1, sha256, sha384, sha512}`.
+* `value` - base64 encoded key value.
+* `trusted` - trust this NTP key `{yes, no}`.
 
 ### Peer Switch
 
diff --git a/src/sonic-yang-models/tests/files/sample_config_db.json b/src/sonic-yang-models/tests/files/sample_config_db.json
index 4eba94e72..b0e3f5f58 100644
--- a/src/sonic-yang-models/tests/files/sample_config_db.json
+++ b/src/sonic-yang-models/tests/files/sample_config_db.json
@@ -477,14 +477,36 @@
         },
         "NTP": {
             "global": {
+                "authentication": "disabled",
+                "dhcp": "enabled",
+                "server_role": "disabled",
+                "admin_state": "enabled",
                 "vrf": "mgmt",
                 "src_intf": "eth0;Loopback0"
             }
         },
         "NTP_SERVER": {
-            "0.debian.pool.ntp.org": {},
-            "23.92.29.245": {},
-            "2001:aa:aa::aa": {}
+            "0.debian.pool.ntp.org": {
+                "association_type": "pool",
+                "resolve_as": "0.debian.pool.ntp.org"
+            },
+            "time.google.com": {
+                "association_type": "server",
+                "resolve_as": "216.239.35.4"
+            },
+            "23.92.29.245": {
+                "admin_state": "enabled",
+                "association_type": "server",
+                "resolve_as": "23.92.29.245",
+                "iburst": "off",
+                "trusted": "yes"
+            },
+            "2001:aa:aa::aa": {
+                "admin_state": "disabled",
+                "iburst": "on",
+                "association_type": "server",
+                "resolve_as": "2001:aa:aa::aa"
+            }
         },
         "SYSLOG_SERVER" : {
             "10.13.14.17": {
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/ntp.json b/src/sonic-yang-models/tests/yang_model_tests/tests/ntp.json
index c798de7d8..f380162b8 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests/ntp.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests/ntp.json
@@ -58,5 +58,82 @@
         "desc": "CONFIGURE NON-EXISTING MGMT INTERFACE AS NTP SOURCE INTERFACE.",
         "eStrKey": "InvalidValue",
         "eStr": ["src"]
+    },
+    "NTP_GLOB_VALID1": {
+        "desc": "NTP global params valid config 1"
+    },
+    "NTP_GLOB_VALID2": {
+        "desc": "NTP global params valid config 2"
+    },
+    "NTP_AUTH_INVALID1": {
+        "desc": "NTP authentication state invalid 1",
+        "eStrKey": "InvalidValue"
+    },
+    "NTP_AUTH_INVALID2": {
+        "desc": "NTP authentication state invalid 2",
+        "eStrKey": "InvalidValue"
+    },
+    "NTP_DHCP_INVALID1": {
+        "desc": "NTP DHCP state invalid 1",
+        "eStrKey": "InvalidValue"
+    },
+    "NTP_DHCP_INVALID2": {
+        "desc": "NTP DHCP state invalid 2",
+        "eStrKey": "InvalidValue"
+    },
+    "NTP_SERVER_ROLE_INVALID1": {
+        "desc": "NTP server role state invalid 1",
+        "eStrKey": "InvalidValue"
+    },
+    "NTP_SERVER_ROLE_INVALID2": {
+        "desc": "NTP server role state invalid 2",
+        "eStrKey": "InvalidValue"
+    },
+    "NTP_STATE_INVALID1": {
+        "desc": "NTP daemon state invalid 1",
+        "eStrKey": "InvalidValue"
+    },
+    "NTP_STATE_INVALID2": {
+        "desc": "NTP daemon state invalid 2",
+        "eStrKey": "InvalidValue"
+    },
+    "NTP_SERVER_ASSOCIATION_INVALID": {
+        "desc": "NTP server type invalid",
+        "eStrKey": "InvalidValue"
+    },
+    "NTP_SERVER_IBURST_INVALID": {
+        "desc": "NTP server aggressive mode invalid",
+        "eStrKey": "InvalidValue"
+    },
+    "NTP_SERVER_KEY_INVALID": {
+        "desc": "NTP server authentication key invalid",
+        "eStrKey": "InvalidValue"
+    },
+    "NTP_SERVER_STATE_INVALID": {
+        "desc": "NTP server state invalid",
+        "eStrKey": "InvalidValue"
+    },
+    "NTP_SERVER_TRUSTED_INVALID": {
+        "desc": "NTP server trusted mode invalid",
+        "eStrKey": "InvalidValue"
+    },
+    "NTP_KEY_VALID": {
+        "desc": "NTP authentication keys inventory"
+    },
+    "NTP_KEY_ID_INVALID": {
+        "desc": "NTP authentication keys invalid key id",
+        "eStrKey": "InvalidValue"
+    },
+    "NTP_KEY_TRUSTED_INVALID": {
+        "desc": "NTP authentication keys invalid trustiness",
+        "eStrKey": "InvalidValue"
+    },
+    "NTP_KEY_TYPE_INVALID": {
+        "desc": "NTP authentication keys invalid key type",
+        "eStrKey": "InvalidValue"
+    },
+    "NTP_KEY_VALUE_INVALID": {
+        "desc": "NTP authentication keys bad key value",
+        "eStrKey": "Range"
     }
 }
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/ntp.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/ntp.json
index 5b9ab1495..c886bec3d 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/ntp.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/ntp.json
@@ -4,13 +4,38 @@
             "sonic-ntp:NTP_SERVER": {
                 "NTP_SERVER_LIST": [
                     {
-                        "server_address": "10.11.12.13"
+                        "server_address": "10.11.12.13",
+                        "association_type": "server",
+                        "iburst": "on",
+                        "key": 10,
+                        "admin_state": "enabled",
+                        "trusted": "no"
                     },
                     {
-                        "server_address": "2001:aa:aa::aa"
+                        "server_address": "2001:aa:aa::aa",
+                        "association_type": "server",
+                        "iburst": "off",
+                        "key": 15,
+                        "admin_state": "disabled",
+                        "trusted": "yes"
                     },
                     {
-                        "server_address": "pool.ntp.org"
+                        "server_address": "pool.ntp.org",
+                        "association_type": "pool",
+                        "iburst": "on",
+                        "admin_state": "enabled"
+                    }
+                ]
+            },
+            "sonic-ntp:NTP_KEY": {
+                "NTP_KEYS_LIST": [
+                    {
+                        "id": 10,
+                        "value": "bHVtb3M="
+                    },
+                    {
+                        "id": 15,
+                        "value": "Ym9tYmFyZGE="
                     }
                 ]
             }
@@ -237,5 +262,234 @@
                 ]
             }
         }
+    },
+    "NTP_GLOB_VALID1": {
+        "sonic-ntp:sonic-ntp": {
+            "sonic-ntp:NTP": {
+                "sonic-ntp:global": {
+                    "authentication": "enabled",
+                    "dhcp": "enabled",
+                    "server_role": "enabled",
+                    "admin_state": "enabled"
+                }
+            }
+        }
+    },
+    "NTP_GLOB_VALID2": {
+        "sonic-ntp:sonic-ntp": {
+            "sonic-ntp:NTP": {
+                "sonic-ntp:global": {
+                    "authentication": "disabled",
+                    "dhcp": "disabled",
+                    "server_role": "disabled",
+                    "admin_state": "disabled"
+                }
+            }
+        }
+    },
+    "NTP_AUTH_INVALID1": {
+        "sonic-ntp:sonic-ntp": {
+            "sonic-ntp:NTP": {
+                "sonic-ntp:global": {
+                    "authentication": ""
+                }
+            }
+        }
+    },
+    "NTP_AUTH_INVALID2": {
+        "sonic-ntp:sonic-ntp": {
+            "sonic-ntp:NTP": {
+                "sonic-ntp:global": {
+                    "authentication": "blahblah"
+                }
+            }
+        }
+    },
+    "NTP_DHCP_INVALID1": {
+        "sonic-ntp:sonic-ntp": {
+            "sonic-ntp:NTP": {
+                "sonic-ntp:global": {
+                    "dhcp": ""
+                }
+            }
+        }
+    },
+    "NTP_DHCP_INVALID2": {
+        "sonic-ntp:sonic-ntp": {
+            "sonic-ntp:NTP": {
+                "sonic-ntp:global": {
+                    "dhcp": "abracadabra"
+                }
+            }
+        }
+    },
+    "NTP_SERVER_ROLE_INVALID1": {
+        "sonic-ntp:sonic-ntp": {
+            "sonic-ntp:NTP": {
+                "sonic-ntp:global": {
+                    "server_role": ""
+                }
+            }
+        }
+    },
+    "NTP_SERVER_ROLE_INVALID2": {
+        "sonic-ntp:sonic-ntp": {
+            "sonic-ntp:NTP": {
+                "sonic-ntp:global": {
+                    "server_role": "olololo"
+                }
+            }
+        }
+    },
+    "NTP_STATE_INVALID1": {
+        "sonic-ntp:sonic-ntp": {
+            "sonic-ntp:NTP": {
+                "sonic-ntp:global": {
+                    "admin_state": ""
+                }
+            }
+        }
+    },
+    "NTP_STATE_INVALID2": {
+        "sonic-ntp:sonic-ntp": {
+            "sonic-ntp:NTP": {
+                "sonic-ntp:global": {
+                    "admin_state": "azazaza"
+                }
+            }
+        }
+    },
+    "NTP_SERVER_ASSOCIATION_INVALID": {
+        "sonic-ntp:sonic-ntp": {
+            "sonic-ntp:NTP_SERVER": {
+                "NTP_SERVER_LIST": [
+                    {
+                        "server_address": "2001:aa:aa:aa",
+                        "association_type": "puul"
+                    }
+                ]
+            }
+        }
+    },
+    "NTP_SERVER_IBURST_INVALID": {
+        "sonic-ntp:sonic-ntp": {
+            "sonic-ntp:NTP_SERVER": {
+                "NTP_SERVER_LIST": [
+                    {
+                        "server_address": "2001:aa:aa:aa",
+                        "iburst": "of"
+                    }
+                ]
+            }
+        }
+    },
+    "NTP_SERVER_KEY_INVALID": {
+        "sonic-ntp:sonic-ntp": {
+            "sonic-ntp:NTP_SERVER": {
+                "NTP_SERVER_LIST": [
+                    {
+                        "server_address": "2001:aa:aa:aa",
+                        "key": 0
+                    }
+                ]
+            }
+        }
+    },
+    "NTP_SERVER_STATE_INVALID": {
+        "sonic-ntp:sonic-ntp": {
+            "sonic-ntp:NTP_SERVER": {
+                "NTP_SERVER_LIST": [
+                    {
+                        "server_address": "2001:aa:aa:aa",
+                        "admin_state": "enable"
+                    }
+                ]
+            }
+        }
+    },
+    "NTP_SERVER_TRUSTED_INVALID": {
+        "sonic-ntp:sonic-ntp": {
+            "sonic-ntp:NTP_SERVER": {
+                "NTP_SERVER_LIST": [
+                    {
+                        "server_address": "2001:aa:aa:aa",
+                        "trusted": "not"
+                    }
+                ]
+            }
+        }
+    },
+    "NTP_KEY_VALID": {
+        "sonic-ntp:sonic-ntp": {
+            "sonic-ntp:NTP_KEY": {
+                "NTP_KEYS_LIST": [
+                    {
+                        "id": 20,
+                        "type": "md5",
+                        "value": "anNkZjg4MzIwZnNkMkBANDQ1",
+                        "trusted": "no"
+                    },
+                    {
+                        "id": 30,
+                        "type": "sha1",
+                        "value": "YWFiYmNjZGRlZWZm",
+                        "trusted": "yes"
+                    },
+                    {
+                        "id": 42,
+                        "type": "md5",
+                        "value": "dGhlYW5zd2Vy",
+                        "trusted": "yes"
+                    }
+                ]
+            }
+        }
+    },
+    "NTP_KEY_ID_INVALID": {
+        "sonic-ntp:sonic-ntp": {
+            "sonic-ntp:NTP_KEY": {
+                "NTP_KEYS_LIST": [
+                    {
+                        "id": 100000
+                    }
+                ]
+            }
+        }
+    },
+    "NTP_KEY_TRUSTED_INVALID": {
+        "sonic-ntp:sonic-ntp": {
+            "sonic-ntp:NTP_KEY": {
+                "NTP_KEYS_LIST": [
+                    {
+                        "id": 20,
+                        "trusted": "nope"
+                    }
+                ]
+            }
+        }
+    },
+    "NTP_KEY_TYPE_INVALID": {
+        "sonic-ntp:sonic-ntp": {
+            "sonic-ntp:NTP_KEY": {
+                "NTP_KEYS_LIST": [
+                    {
+                        "id": 20,
+                        "type": "md6"
+                    }
+                ]
+            }
+        }
+    },
+    "NTP_KEY_VALUE_INVALID": {
+        "sonic-ntp:sonic-ntp": {
+            "sonic-ntp:NTP_KEY": {
+                "NTP_KEYS_LIST": [
+                    {
+                        "id": 20,
+                        "value": ""
+                    }
+                ]
+            }
+        }
     }
 }
diff --git a/src/sonic-yang-models/yang-models/sonic-ntp.yang b/src/sonic-yang-models/yang-models/sonic-ntp.yang
index f28e10520..2591f8c7a 100644
--- a/src/sonic-yang-models/yang-models/sonic-ntp.yang
+++ b/src/sonic-yang-models/yang-models/sonic-ntp.yang
@@ -33,6 +33,10 @@ module sonic-ntp {
         prefix mprt;
     }
 
+    import sonic-types {
+        prefix stypes;
+    }
+
     description
         "NTP yang Module for SONiC OS";
 
@@ -41,6 +45,39 @@ module sonic-ntp {
             "First revision";
     }
 
+    revision 2023-03-20 {
+        description
+            "Add extended configuration options";
+    }
+
+    typedef association-type {
+        description "NTP server association type";
+        type enumeration {
+            enum server;
+            enum pool;
+        }
+    }
+
+    typedef key-type {
+        description "NTP key encryption type";
+        type enumeration {
+            enum md5;
+            enum sha1;
+            enum sha256;
+            enum sha384;
+            enum sha512;
+        }
+    }
+
+    typedef key-id {
+        description "NTP key ID";
+        type uint16 {
+            range 1..65535 {
+                error-message "Failed NTP key ID";
+            }
+        }
+    }
+
     container sonic-ntp {
 
         container NTP {
@@ -68,6 +105,9 @@ module sonic-ntp {
                         type leafref {
                             path /mprt:sonic-mgmt_port/mprt:MGMT_PORT/mprt:MGMT_PORT_LIST/mprt:name;
                         }
+                        type string {
+                            pattern 'eth0';
+                        }
                     }
 
                     description
@@ -92,6 +132,30 @@ module sonic-ntp {
                          default VRF or Management VRF.";
                 }
 
+                leaf authentication {
+                    type stypes:admin_mode;
+                    default disabled;
+                    description "NTP authentication state";
+                }
+
+                leaf dhcp {
+                    type stypes:admin_mode;
+                    default enabled;
+                    description "Use NTP servers distributed by DHCP";
+                }
+
+                leaf server_role {
+                    type stypes:admin_mode;
+                    default enabled;
+                    description "NTP server functionality state";
+                }
+
+                leaf admin_state {
+                    type stypes:admin_mode;
+                    default enabled;
+                    description "NTP feature state";
+                }
+
             } /* end of container global */
 
         } /* end of container NTP */
@@ -112,10 +176,95 @@ module sonic-ntp {
                 leaf server_address {
                     type inet:host;
                 }
+
+                leaf association_type {
+                    type association-type;
+                    default server;
+                    description "NTP remote association type: server or pool.";
+                }
+
+                leaf iburst {
+                    type stypes:on-off;
+                    default on;
+                    description "NTP aggressive polling";
+                }
+
+                leaf key {
+                    description "NTP server key ID";
+                    type leafref {
+                        path /ntp:sonic-ntp/ntp:NTP_KEY/ntp:NTP_KEYS_LIST/ntp:id;
+                    }
+                }
+
+                leaf resolve_as {
+                    type inet:host;
+                    description "Server resolved IP address";
+                }
+
+                leaf admin_state {
+                    type stypes:admin_mode;
+                    default enabled;
+                    description "NTP server state";
+                }
+
+                leaf trusted {
+                    type stypes:yes-no;
+                    default no;
+                    description "Trust this server. It will force time
+                                 synchronization only to this server when
+                                 authentication is enabled";
+                }
+
+                leaf version {
+                    type uint8 {
+                        range "3..4" {
+                            error-message "Failed NTP version";
+                        }
+                    }
+                    default 4;
+                    description "NTP proto version to communicate with NTP
+                                 server";
+                }
+
             } /* end of list NTP_SERVER_LIST */
 
         } /* end of container NTP_SERVER */
 
+        container NTP_KEY {
+
+            description "NTP authentication keys inventory";
+
+            list NTP_KEYS_LIST {
+                description "NTP authentication keys inventory";
+                key "id";
+
+                leaf id {
+                    type key-id;
+                    description "NTP key ID";
+                }
+
+                leaf trusted {
+                    type stypes:yes-no;
+                    default no;
+                    description "Trust this NTP key";
+                }
+
+                leaf value {
+                    type string {
+                        length 1..64;
+                    }
+                    description "NTP encrypted authentication key";
+                }
+
+                leaf type {
+                    type key-type;
+                    default md5;
+                    description "NTP authentication key type";
+                }
+            } /* end of list NTP_KEYS_LIST */
+
+        } /* end of container NTP_KEY */
+
     } /* end of container  sonic-ntp */
 
 } /* end of module sonic-ntp */
diff --git a/src/sonic-yang-models/yang-templates/sonic-types.yang.j2 b/src/sonic-yang-models/yang-templates/sonic-types.yang.j2
index 4007a386b..909a883a0 100644
--- a/src/sonic-yang-models/yang-templates/sonic-types.yang.j2
+++ b/src/sonic-yang-models/yang-templates/sonic-types.yang.j2
@@ -360,6 +360,22 @@ module sonic-types {
             "BCP 175: Procedures for Maintaining the Time Zone Database";
     }
 
+    typedef yes-no {
+        description "Yes/No configuration";
+        type enumeration {
+            enum yes;
+            enum no;
+        }
+    }
+
+    typedef on-off {
+        description "On/Off configuration";
+        type enumeration {
+            enum on;
+            enum off;
+        }
+    }
+
     {% if yang_model_type == "cvl" %}
     /* Required for CVL */
     container operation {

From f82980784de91fb9106be133282e894991f07147 Mon Sep 17 00:00:00 2001
From: Zain Budhwani <99770260+zbud-msft@users.noreply.github.com>
Date: Tue, 12 Dec 2023 11:35:46 -0800
Subject: [PATCH 0044/1115] Change leaf value of used_cnt of
 sonic-events-swss:chk_crm_threshold (#17430)

### Why I did it

Current YANG model of sonic-events-swss:chk_crm_threshold has the type uint8 for leaf used_cnt which is too small of a range to hold values of used_cnt which can greatly exceed that. Updating leaf type of used_cnt and free_cnt to match defined definition.

Changed to uint32 as per defined here: https://github.com/sonic-net/sonic-swss/blob/master/orchagent/crmorch.h#L99

##### Work item tracking
- Microsoft ADO **(number only)**:26091912

#### How I did it

Update leaf value

#### How to verify it

UT and sonic-mgmt PR checker
---
 .../yang_model_tests/tests_config/sonic-events-swss.json    | 6 +++---
 src/sonic-yang-models/yang-models/sonic-events-swss.yang    | 4 ++--
 2 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/sonic-events-swss.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/sonic-events-swss.json
index 6b50ccd55..e56acc0a4 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/sonic-events-swss.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/sonic-events-swss.json
@@ -180,9 +180,9 @@
     "SONIC_EVENTS_SWSS_CHK_CRM_THRESHOLD_VALID": {
         "sonic-events-swss:sonic-events-swss": {
             "sonic-events-swss:chk_crm_threshold": {
-                "percent": 0,
-                "used_cnt": 0,
-                "free_cnt": 0,
+                "percent": 80,
+                "used_cnt": 6414,
+                "free_cnt": 65300,
                 "timestamp": "1985-04-12T23:20:50.52Z"
             }
         }
diff --git a/src/sonic-yang-models/yang-models/sonic-events-swss.yang b/src/sonic-yang-models/yang-models/sonic-events-swss.yang
index f7b3ca3ea..93c617776 100644
--- a/src/sonic-yang-models/yang-models/sonic-events-swss.yang
+++ b/src/sonic-yang-models/yang-models/sonic-events-swss.yang
@@ -102,11 +102,11 @@ module sonic-events-swss {
             }
 
             leaf used_cnt {
-                type uint8;
+                type uint32;
             }
 
             leaf free_cnt {
-                type uint64;
+                type uint32;
             }
 
             uses evtcmn:sonic-events-cmn;

From dd39dd0e0393bac906e6fd7efb90303965c2d984 Mon Sep 17 00:00:00 2001
From: Sudharsan Dhamal Gopalarathnam <sudharsand@nvidia.com>
Date: Wed, 13 Dec 2023 02:48:49 -0800
Subject: [PATCH 0045/1115] [Mellanox] Update SAI to 2311.26.0.28, SDK/FW to
 4.6.2134/2012.2134 (#17481)

- Why I did it
Update SAI version to SAIBuild2311.26.0.28

Fixed issues
1. Traffic with unicast destination ip and multicast destination mac wasn't properly dropped
2. When working with SAI_DEFAULT_SWITCHING_MODE_STORE_FORWARD key/value enabled, trying to add a LAG member to a LAG which is created after warm boot initial configuration phase ended, will fail.
3. Optional feature of Port IP counters (SAI_PORT_STAT_IP*) , enabled by SAI XML per-port-ip-counter-enabled config node, wasn't initialized properly.
4. Creating BFD session for non default VRF fails (SAI_BFD_SESSION_ATTR_VIRTUAL_ROUTER != SAI_SWITCH_ATTR_DEFAULT_VIRTUAL_ROUTER_ID).
5. The default value for port FEC during switch init for Spectrum3 was initialized as 'auto' and not aligned to SAI header default 'none'. Note if setups has invalid configuration and relied previously on auto, now it might be necessary for the user to provide explicit valid value for SAI_PORT_ATTR_FEC_MODE

Update SDK/FW version to 4.6.2134/2012.2134
Fixed issues:
1. Updated SN3700C to enable limit to 100G speed.
2. Recovering from Low power mode might ends with port down.

- How I did it
Updating the versions in makefile

- How to verify it
Confirm issues fixed and run sonic-mgmt tests
---
 platform/mellanox/fw.mk       | 10 +++++-----
 platform/mellanox/mlnx-sai.mk |  2 +-
 platform/mellanox/sdk.mk      |  2 +-
 3 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/platform/mellanox/fw.mk b/platform/mellanox/fw.mk
index 1c54fec12..1ba74ca5c 100644
--- a/platform/mellanox/fw.mk
+++ b/platform/mellanox/fw.mk
@@ -25,29 +25,29 @@ SIMX_VERSION = 24.1-1007
 
 FW_FROM_URL = y
 
-MLNX_FW_ASSETS_RELEASE_TAG = fw-2012.2104
+MLNX_FW_ASSETS_RELEASE_TAG = fw-2012.2134
 MLNX_FW_ASSETS_URL = $(MLNX_ASSETS_GITHUB_URL)/releases/download/$(MLNX_FW_ASSETS_RELEASE_TAG)
 
 ifeq ($(MLNX_FW_BASE_URL), )
 MLNX_FW_BASE_URL = $(MLNX_FW_ASSETS_URL)
 endif
 
-MLNX_SPC_FW_VERSION = 13.2012.2104
+MLNX_SPC_FW_VERSION = 13.2012.2134
 MLNX_SPC_FW_FILE = fw-SPC-rel-$(subst .,_,$(MLNX_SPC_FW_VERSION))-EVB.mfa
 $(MLNX_SPC_FW_FILE)_PATH = $(MLNX_FW_BASE_PATH)
 $(MLNX_SPC_FW_FILE)_URL = $(MLNX_FW_BASE_URL)/$(MLNX_SPC_FW_FILE)
 
-MLNX_SPC2_FW_VERSION = 29.2012.2104
+MLNX_SPC2_FW_VERSION = 29.2012.2134
 MLNX_SPC2_FW_FILE = fw-SPC2-rel-$(subst .,_,$(MLNX_SPC2_FW_VERSION))-EVB.mfa
 $(MLNX_SPC2_FW_FILE)_PATH = $(MLNX_FW_BASE_PATH)
 $(MLNX_SPC2_FW_FILE)_URL = $(MLNX_FW_BASE_URL)/$(MLNX_SPC2_FW_FILE)
 
-MLNX_SPC3_FW_VERSION = 30.2012.2104
+MLNX_SPC3_FW_VERSION = 30.2012.2134
 MLNX_SPC3_FW_FILE = fw-SPC3-rel-$(subst .,_,$(MLNX_SPC3_FW_VERSION))-EVB.mfa
 $(MLNX_SPC3_FW_FILE)_PATH = $(MLNX_FW_BASE_PATH)
 $(MLNX_SPC3_FW_FILE)_URL = $(MLNX_FW_BASE_URL)/$(MLNX_SPC3_FW_FILE)
 
-MLNX_SPC4_FW_VERSION = 34.2012.2104
+MLNX_SPC4_FW_VERSION = 34.2012.2134
 MLNX_SPC4_FW_FILE = fw-SPC4-rel-$(subst .,_,$(MLNX_SPC4_FW_VERSION))-EVB.mfa
 $(MLNX_SPC4_FW_FILE)_PATH = $(MLNX_FW_BASE_PATH)
 $(MLNX_SPC4_FW_FILE)_URL = $(MLNX_FW_BASE_URL)/$(MLNX_SPC4_FW_FILE)
diff --git a/platform/mellanox/mlnx-sai.mk b/platform/mellanox/mlnx-sai.mk
index 733be9d92..39eaeabf7 100644
--- a/platform/mellanox/mlnx-sai.mk
+++ b/platform/mellanox/mlnx-sai.mk
@@ -1,6 +1,6 @@
 # Mellanox SAI
 
-MLNX_SAI_VERSION = SAIBuild2311.25.0.36
+MLNX_SAI_VERSION = SAIBuild2311.26.0.28
 MLNX_SAI_ASSETS_GITHUB_URL = https://github.com/Mellanox/Spectrum-SDK-Drivers-SONiC-Bins
 MLNX_SAI_ASSETS_RELEASE_TAG = sai-$(MLNX_SAI_VERSION)-$(BLDENV)-$(CONFIGURED_ARCH)
 MLNX_SAI_ASSETS_URL = $(MLNX_SAI_ASSETS_GITHUB_URL)/releases/download/$(MLNX_SAI_ASSETS_RELEASE_TAG)
diff --git a/platform/mellanox/sdk.mk b/platform/mellanox/sdk.mk
index b573dfb29..7188cfe05 100644
--- a/platform/mellanox/sdk.mk
+++ b/platform/mellanox/sdk.mk
@@ -14,7 +14,7 @@
 # See the License for the specific language governing permissions and
 # limitations under the License.
 #
-MLNX_SDK_VERSION = 4.6.2104
+MLNX_SDK_VERSION = 4.6.2134
 MLNX_SDK_ISSU_VERSION = 101
 
 MLNX_SDK_DRIVERS_GITHUB_URL = https://github.com/Mellanox/Spectrum-SDK-Drivers

From 0d62cf0e925d95313883136e590c04470bbc06dd Mon Sep 17 00:00:00 2001
From: Junchao-Mellanox <57339448+Junchao-Mellanox@users.noreply.github.com>
Date: Wed, 13 Dec 2023 20:16:40 +0800
Subject: [PATCH 0046/1115] [Mellanox] Remove EEPROM write limitation if it is
 software control (#17030)

- Why I did it
When module is under software control (CMIS host management enabled), EEPROM should be controlled by software and there should be no limitation for any write operation.

- How I did it
Remove EEPROM write limitation if a module is under software control

- How to verify it
Manual test
UT
---
 platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py | 7 +++++++
 platform/mellanox/mlnx-platform-api/tests/test_sfp.py     | 7 ++++++-
 2 files changed, 13 insertions(+), 1 deletion(-)

diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py b/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py
index e0e11a50e..9b9e97d18 100644
--- a/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py
+++ b/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py
@@ -771,6 +771,13 @@ def _is_write_protected(self, page, page_offset, num_bytes):
         Returns:
             bool: True if the limited bytes is hit
         """
+        try:
+            if self.is_sw_control():
+                return False
+        except Exception as e:
+            logger.log_notice(f'Module is under initialization, cannot write module EEPROM - {e}')
+            return True
+
         eeprom_path = self._get_eeprom_path()
         limited_data = limited_eeprom.get(self._get_sfp_type_str(eeprom_path))
         if not limited_data:
diff --git a/platform/mellanox/mlnx-platform-api/tests/test_sfp.py b/platform/mellanox/mlnx-platform-api/tests/test_sfp.py
index 4dfcf0f07..6bdc82b5b 100644
--- a/platform/mellanox/mlnx-platform-api/tests/test_sfp.py
+++ b/platform/mellanox/mlnx-platform-api/tests/test_sfp.py
@@ -162,8 +162,13 @@ def test_is_port_admin_status_up(self, mock_port_status):
 
     @mock.patch('sonic_platform.sfp.SFP._get_eeprom_path', mock.MagicMock(return_value = None))
     @mock.patch('sonic_platform.sfp.SFP._get_sfp_type_str')
-    def test_is_write_protected(self, mock_get_type_str):
+    @mock.patch('sonic_platform.sfp.SFP.is_sw_control')
+    def test_is_write_protected(self, mock_sw_control, mock_get_type_str):
         sfp = SFP(0)
+        mock_sw_control.return_value = True
+        assert not sfp._is_write_protected(page=0, page_offset=26, num_bytes=1)
+
+        mock_sw_control.return_value = False
         mock_get_type_str.return_value = 'cmis'
         assert sfp._is_write_protected(page=0, page_offset=26, num_bytes=1)
         assert not sfp._is_write_protected(page=0, page_offset=27, num_bytes=1)

From 1b84f3daa54ee0d644677e36e0e8d64947147f23 Mon Sep 17 00:00:00 2001
From: Junchao-Mellanox <57339448+Junchao-Mellanox@users.noreply.github.com>
Date: Wed, 13 Dec 2023 20:19:44 +0800
Subject: [PATCH 0047/1115] [Mellanox] update asic and module temperature in a
 thread for CMIS management (#16955)

- Why I did it
When module is totally under software control, driver cannot get module temperature/temperature threshold from firmware. In this case, sonic needs to get temperature/temperature threshold from EEPROM. In this PR, a thread thermal updater is created to update module temperature/temperature threshold while software control is enabled.

- How I did it
Query ASIC temperature from SDK sysfs and update hw-management-tc periodically
Query Module temperature from EEPROM and update hw-management-tc periodically

- How to verify it
Manual test
New Unit tests
---
 .../sonic_platform/chassis.py                 |   4 +
 .../mlnx-platform-api/sonic_platform/sfp.py   |  79 ++++++-
 .../sonic_platform/thermal.py                 | 114 ++++++++--
 .../sonic_platform/thermal_manager.py         |  27 +++
 .../sonic_platform/thermal_updater.py         | 213 ++++++++++++++++++
 .../mlnx-platform-api/sonic_platform/utils.py |  55 +++++
 .../mlnx-platform-api/tests/test_sfp.py       |  40 ++++
 .../mlnx-platform-api/tests/test_thermal.py   |  21 +-
 .../tests/test_thermal_updater.py             | 128 +++++++++++
 .../mlnx-platform-api/tests/test_utils.py     |  20 ++
 10 files changed, 675 insertions(+), 26 deletions(-)
 create mode 100644 platform/mellanox/mlnx-platform-api/sonic_platform/thermal_updater.py
 create mode 100644 platform/mellanox/mlnx-platform-api/tests/test_thermal_updater.py

diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/chassis.py b/platform/mellanox/mlnx-platform-api/sonic_platform/chassis.py
index 6efdfb61f..f0b73de66 100644
--- a/platform/mellanox/mlnx-platform-api/sonic_platform/chassis.py
+++ b/platform/mellanox/mlnx-platform-api/sonic_platform/chassis.py
@@ -82,6 +82,8 @@ class Chassis(ChassisBase):
     # System UID LED
     _led_uid = None
 
+    chassis_instance = None
+
     def __init__(self):
         super(Chassis, self).__init__()
 
@@ -127,6 +129,8 @@ def __init__(self):
         self._RJ45_port_inited = False
         self._RJ45_port_list = None
 
+        Chassis.chassis_instance = self
+
         self.modules_mgmt_thread = threading.Thread()
         self.modules_changes_queue = queue.Queue()
         self.modules_mgmt_task_stopping_event = threading.Event()
diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py b/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py
index 9b9e97d18..c5bcfddaf 100644
--- a/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py
+++ b/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py
@@ -31,6 +31,8 @@
     from . import utils
     from .device_data import DeviceDataManager
     from sonic_platform_base.sonic_xcvr.sfp_optoe_base import SfpOptoeBase
+    from sonic_platform_base.sonic_xcvr.fields import consts
+    from sonic_platform_base.sonic_xcvr.api.public import sff8636, sff8436
 
 except ImportError as e:
     raise ImportError (str(e) + "- required module not found")
@@ -155,6 +157,10 @@
 # SFP stderr
 SFP_EEPROM_NOT_AVAILABLE = 'Input/output error'
 
+SFP_DEFAULT_TEMP_WARNNING_THRESHOLD = 70.0
+SFP_DEFAULT_TEMP_CRITICAL_THRESHOLD = 80.0
+SFP_TEMPERATURE_SCALE = 8.0
+
 # SFP EEPROM limited bytes
 limited_eeprom = {
     SFP_TYPE_CMIS: {
@@ -264,7 +270,7 @@ def __init__(self, sfp_index, sfp_type=None, slot_id=0, linecard_port_count=0, l
 
         if slot_id == 0: # For non-modular chassis
             from .thermal import initialize_sfp_thermal
-            self._thermal_list = initialize_sfp_thermal(sfp_index)
+            self._thermal_list = initialize_sfp_thermal(self)
         else: # For modular chassis
             # (slot_id % MAX_LC_CONUNT - 1) * MAX_PORT_COUNT + (sfp_index + 1) * (MAX_PORT_COUNT / LC_PORT_COUNT)
             max_linecard_count = DeviceDataManager.get_linecard_count()
@@ -822,6 +828,77 @@ def get_tx_fault(self):
         api = self.get_xcvr_api()
         return [False] * api.NUM_CHANNELS if api else None
 
+    def get_temperature(self):
+        try:
+            if not self.is_sw_control():
+                temp_file = f'/sys/module/sx_core/asic0/module{self.sdk_index}/temperature/input'
+                if not os.path.exists(temp_file):
+                    logger.log_error(f'Failed to read from file {temp_file} - not exists')
+                    return None
+                temperature = utils.read_int_from_file(temp_file,
+                                                       log_func=None)
+                return temperature / SFP_TEMPERATURE_SCALE if temperature is not None else None
+        except:
+            return 0.0
+
+        self.reinit()
+        temperature = super().get_temperature()
+        return temperature if temperature is not None else None
+
+    def get_temperature_warning_threashold(self):
+        """Get temperature warning threshold
+
+        Returns:
+            int: temperature warning threshold
+        """
+        try:
+            if not self.is_sw_control():
+                emergency = utils.read_int_from_file(f'/sys/module/sx_core/asic0/module{self.sdk_index}/temperature/emergency',
+                                                     log_func=None,
+                                                     default=None)
+                return emergency / SFP_TEMPERATURE_SCALE if emergency is not None else SFP_DEFAULT_TEMP_WARNNING_THRESHOLD
+        except:
+            return SFP_DEFAULT_TEMP_WARNNING_THRESHOLD
+
+        thresh = self._get_temperature_threshold()
+        if thresh and consts.TEMP_HIGH_WARNING_FIELD in thresh:
+            return thresh[consts.TEMP_HIGH_WARNING_FIELD]
+        return SFP_DEFAULT_TEMP_WARNNING_THRESHOLD
+
+    def get_temperature_critical_threashold(self):
+        """Get temperature critical threshold
+
+        Returns:
+            int: temperature critical threshold
+        """
+        try:
+            if not self.is_sw_control():
+                critical = utils.read_int_from_file(f'/sys/module/sx_core/asic0/module{self.sdk_index}/temperature/critical',
+                                                    log_func=None,
+                                                    default=None)
+                return critical / SFP_TEMPERATURE_SCALE if critical is not None else SFP_DEFAULT_TEMP_CRITICAL_THRESHOLD
+        except:
+            return SFP_DEFAULT_TEMP_CRITICAL_THRESHOLD
+
+        thresh = self._get_temperature_threshold()
+        if thresh and consts.TEMP_HIGH_ALARM_FIELD in thresh:
+            return thresh[consts.TEMP_HIGH_ALARM_FIELD]
+        return SFP_DEFAULT_TEMP_CRITICAL_THRESHOLD
+
+    def _get_temperature_threshold(self):
+        self.reinit()
+        api = self.get_xcvr_api()
+        if not api:
+            return None
+
+        thresh_support = api.get_transceiver_thresholds_support()
+        if thresh_support:
+            if isinstance(api, sff8636.Sff8636Api) or isinstance(api, sff8436.Sff8436Api):
+                return api.xcvr_eeprom.read(consts.TEMP_THRESHOLDS_FIELD)
+            return api.xcvr_eeprom.read(consts.THRESHOLDS_FIELD)
+        else:
+            return None
+
     def get_xcvr_api(self):
         """
         Retrieves the XcvrApi associated with this SFP
diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/thermal.py b/platform/mellanox/mlnx-platform-api/sonic_platform/thermal.py
index 1a6b45da6..eadc822e3 100644
--- a/platform/mellanox/mlnx-platform-api/sonic_platform/thermal.py
+++ b/platform/mellanox/mlnx-platform-api/sonic_platform/thermal.py
@@ -36,6 +36,8 @@
 # Global logger class instance
 logger = Logger()
 
+DEFAULT_TEMP_SCALE = 1000
+
 """
 The most important information for creating a Thermal object is 3 sysfs files: temperature file, high threshold file and
 high critical threshold file. There is no common naming rule for thermal objects on Nvidia platform. There are two types
@@ -72,9 +74,11 @@
     "chassis thermals": [
         {
             "name": "ASIC",
-            "temperature": "asic",
-            "high_threshold": "asic_temp_emergency",
-            "high_critical_threshold": "asic_temp_trip_crit"
+            "temperature": "input",
+            "high_threshold_default": 105,
+            "high_critical_threshold_default": 120,
+            "sysfs_folder": "/sys/module/sx_core/asic0/temperature",
+            "scale": 8
         },
         {
             "name": "Ambient Port Side Temp",
@@ -187,8 +191,8 @@ def initialize_psu_thermal(psu_index, presence_cb):
     return [create_indexable_thermal(THERMAL_NAMING_RULE['psu thermals'], psu_index, CHASSIS_THERMAL_SYSFS_FOLDER, 1, presence_cb)]
 
 
-def initialize_sfp_thermal(sfp_index):
-    return [create_indexable_thermal(THERMAL_NAMING_RULE['sfp thermals'], sfp_index, CHASSIS_THERMAL_SYSFS_FOLDER, 1)]
+def initialize_sfp_thermal(sfp):
+    return [ModuleThermal(sfp)]
 
 
 def initialize_linecard_thermals(lc_name, lc_index):
@@ -214,6 +218,7 @@ def initialize_linecard_sfp_thermal(lc_name, lc_index, sfp_index):
 def create_indexable_thermal(rule, index, sysfs_folder, position, presence_cb=None):
     index += rule.get('start_index', 1)
     name = rule['name'].format(index)
+    sysfs_folder = rule.get('sysfs_folder', sysfs_folder)
     temp_file = os.path.join(sysfs_folder, rule['temperature'].format(index))
     _check_thermal_sysfs_existence(temp_file)
     if 'high_threshold' in rule:
@@ -226,10 +231,13 @@ def create_indexable_thermal(rule, index, sysfs_folder, position, presence_cb=No
         _check_thermal_sysfs_existence(high_crit_th_file)
     else:
         high_crit_th_file = None
+    high_th_default = rule.get('high_threshold_default')
+    high_crit_th_default = rule.get('high_critical_threshold_default')
+    scale = rule.get('scale', DEFAULT_TEMP_SCALE)
     if not presence_cb:
-        return Thermal(name, temp_file, high_th_file, high_crit_th_file, position)
+        return Thermal(name, temp_file, high_th_file, high_crit_th_file, high_th_default, high_crit_th_default, scale, position)
     else:
-        return RemovableThermal(name, temp_file, high_th_file, high_crit_th_file, position, presence_cb)
+        return RemovableThermal(name, temp_file, high_th_file, high_crit_th_file, high_th_default, high_crit_th_default, scale, position, presence_cb)
 
 
 def create_single_thermal(rule, sysfs_folder, position, presence_cb=None):
@@ -243,6 +251,7 @@ def create_single_thermal(rule, sysfs_folder, position, presence_cb=None):
     elif not default_present:
         return None
 
+    sysfs_folder = rule.get('sysfs_folder', sysfs_folder)
     temp_file = os.path.join(sysfs_folder, temp_file)
     _check_thermal_sysfs_existence(temp_file)
     if 'high_threshold' in rule:
@@ -255,11 +264,14 @@ def create_single_thermal(rule, sysfs_folder, position, presence_cb=None):
         _check_thermal_sysfs_existence(high_crit_th_file)
     else:
         high_crit_th_file = None
+    high_th_default = rule.get('high_threshold_default')
+    high_crit_th_default = rule.get('high_critical_threshold_default')
+    scale = rule.get('scale', DEFAULT_TEMP_SCALE)
     name = rule['name']
     if not presence_cb:
-        return Thermal(name, temp_file, high_th_file, high_crit_th_file, position)
+        return Thermal(name, temp_file, high_th_file, high_crit_th_file, high_th_default, high_crit_th_default, scale, position)
     else:
-        return RemovableThermal(name, temp_file, high_th_file, high_crit_th_file, position, presence_cb)
+        return RemovableThermal(name, temp_file, high_th_file, high_crit_th_file, high_th_default, high_crit_th_default, scale, position, presence_cb)
 
 
 def _check_thermal_sysfs_existence(file_path):
@@ -268,7 +280,7 @@ def _check_thermal_sysfs_existence(file_path):
 
 
 class Thermal(ThermalBase):
-    def __init__(self, name, temp_file, high_th_file, high_crit_th_file, position):
+    def __init__(self, name, temp_file, high_th_file, high_crit_th_file, high_th_default, high_crit_th_default, scale, position):
         """
         index should be a string for category ambient and int for other categories
         """
@@ -278,6 +290,9 @@ def __init__(self, name, temp_file, high_th_file, high_crit_th_file, position):
         self.temperature = temp_file
         self.high_threshold = high_th_file
         self.high_critical_threshold = high_crit_th_file
+        self.high_th_default = high_th_default
+        self.high_crit_th_default = high_crit_th_default
+        self.scale = scale
 
     def get_name(self):
         """
@@ -297,7 +312,7 @@ def get_temperature(self):
             of one degree Celsius, e.g. 30.125
         """
         value = utils.read_float_from_file(self.temperature, None, log_func=logger.log_info)
-        return value / 1000.0 if (value is not None and value != 0) else None
+        return value / self.scale if (value is not None and value != 0) else None
 
     def get_high_threshold(self):
         """
@@ -308,9 +323,9 @@ def get_high_threshold(self):
             up to nearest thousandth of one degree Celsius, e.g. 30.125
         """
         if self.high_threshold is None:
-            return None
+            return self.high_th_default
         value = utils.read_float_from_file(self.high_threshold, None, log_func=logger.log_info)
-        return value / 1000.0 if (value is not None and value != 0) else None
+        return value / self.scale if (value is not None and value != 0) else self.high_th_default
 
     def get_high_critical_threshold(self):
         """
@@ -321,9 +336,9 @@ def get_high_critical_threshold(self):
             up to nearest thousandth of one degree Celsius, e.g. 30.125
         """
         if self.high_critical_threshold is None:
-            return None
+            return self.high_crit_th_default
         value = utils.read_float_from_file(self.high_critical_threshold, None, log_func=logger.log_info)
-        return value / 1000.0 if (value is not None and value != 0) else None
+        return value / self.scale if (value is not None and value != 0) else self.high_crit_th_default
 
     def get_position_in_parent(self):
         """
@@ -343,8 +358,8 @@ def is_replaceable(self):
 
 
 class RemovableThermal(Thermal):
-    def __init__(self, name, temp_file, high_th_file, high_crit_th_file, position, presence_cb):
-        super(RemovableThermal, self).__init__(name, temp_file, high_th_file, high_crit_th_file, position)
+    def __init__(self, name, temp_file, high_th_file, high_crit_th_file, high_th_default, high_crit_th_default, scale, position, presence_cb):
+        super(RemovableThermal, self).__init__(name, temp_file, high_th_file, high_crit_th_file, high_th_default, high_crit_th_default, scale, position)
         self.presence_cb = presence_cb
 
     def get_temperature(self):
@@ -388,3 +403,68 @@ def get_high_critical_threshold(self):
             logger.log_debug("get_high_critical_threshold for {} failed due to {}".format(self.name, hint))
             return None
         return super(RemovableThermal, self).get_high_critical_threshold()
+
+
+class ModuleThermal(ThermalBase):
+    def __init__(self, sfp):
+        """
+        index should be a string for category ambient and int for other categories
+        """
+        super(ModuleThermal, self).__init__()
+        self.name = f'xSFP module {sfp.sdk_index + 1} Temp'
+        self.sfp = sfp
+
+    def get_name(self):
+        """
+        Retrieves the name of the device
+
+        Returns:
+            string: The name of the device
+        """
+        return self.name
+
+    def get_temperature(self):
+        """
+        Retrieves current temperature reading from thermal
+
+        Returns:
+            A float number of current temperature in Celsius up to nearest thousandth
+            of one degree Celsius, e.g. 30.125
+        """
+        return self.sfp.get_temperature()
+
+    def get_high_threshold(self):
+        """
+        Retrieves the high threshold temperature of thermal
+
+        Returns:
+            A float number, the high threshold temperature of thermal in Celsius
+            up to nearest thousandth of one degree Celsius, e.g. 30.125
+        """
+        return self.sfp.get_temperature_warning_threashold()
+
+    def get_high_critical_threshold(self):
+        """
+        Retrieves the high critical threshold temperature of thermal
+
+        Returns:
+            A float number, the high critical threshold temperature of thermal in Celsius
+            up to nearest thousandth of one degree Celsius, e.g. 30.125
+        """
+        return self.sfp.get_temperature_critical_threashold()
+
+    def get_position_in_parent(self):
+        """
+        Retrieves 1-based relative physical position in parent device
+        Returns:
+            integer: The 1-based relative physical position in parent device
+        """
+        return 1
+
+    def is_replaceable(self):
+        """
+        Indicate whether this device is replaceable.
+        Returns:
+            bool: True if it is replaceable.
+        """
+        return False
diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/thermal_manager.py b/platform/mellanox/mlnx-platform-api/sonic_platform/thermal_manager.py
index dd3d794d8..9e1aaded0 100644
--- a/platform/mellanox/mlnx-platform-api/sonic_platform/thermal_manager.py
+++ b/platform/mellanox/mlnx-platform-api/sonic_platform/thermal_manager.py
@@ -15,9 +15,36 @@
 # limitations under the License.
 #
 from sonic_platform_base.sonic_thermal_control.thermal_manager_base import ThermalManagerBase
+from . import thermal_updater
+from .device_data import DeviceDataManager
 
 
 class ThermalManager(ThermalManagerBase):
+    thermal_updater_task = None
+
     @classmethod
     def run_policy(cls, chassis):
         pass
+
+    @classmethod
+    def initialize(cls):
+        """
+        Initialize thermal manager, including register thermal condition types and thermal action types
+        and any other vendor specific initialization.
+        :return:
+        """
+        if DeviceDataManager.is_independent_mode():
+            from .chassis import Chassis
+            cls.thermal_updater_task = thermal_updater.ThermalUpdater(Chassis.chassis_instance.get_all_sfps())
+            cls.thermal_updater_task.start()
+
+
+    @classmethod
+    def deinitialize(cls):
+        """
+        Destroy thermal manager, including any vendor specific cleanup. The default behavior of this function
+        is a no-op.
+        :return:
+        """
+        if DeviceDataManager.is_independent_mode():
+            cls.thermal_updater_task.stop()
diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/thermal_updater.py b/platform/mellanox/mlnx-platform-api/sonic_platform/thermal_updater.py
new file mode 100644
index 000000000..ad0b92ef4
--- /dev/null
+++ b/platform/mellanox/mlnx-platform-api/sonic_platform/thermal_updater.py
@@ -0,0 +1,213 @@
+#
+# Copyright (c) 2023 NVIDIA CORPORATION & AFFILIATES.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+from . import utils
+from sonic_py_common import logger
+
+import sys
+import time
+
+sys.path.append('/run/hw-management/bin')
+
+try:
+    import hw_management_independent_mode_update
+except ImportError:
+    # For unit test only
+    from unittest import mock
+    hw_management_independent_mode_update = mock.MagicMock()
+    hw_management_independent_mode_update.module_data_set_module_counter = mock.MagicMock()
+    hw_management_independent_mode_update.thermal_data_set_asic = mock.MagicMock()
+    hw_management_independent_mode_update.thermal_data_set_module = mock.MagicMock()
+    hw_management_independent_mode_update.thermal_data_clean_asic = mock.MagicMock()
+    hw_management_independent_mode_update.thermal_data_clean_module = mock.MagicMock()
+
+
+SFP_TEMPERATURE_SCALE = 1000
+ASIC_TEMPERATURE_SCALE = 125
+ASIC_DEFAULT_TEMP_WARNNING_THRESHOLD = 105000
+ASIC_DEFAULT_TEMP_CRITICAL_THRESHOLD = 120000
+
+ERROR_READ_THERMAL_DATA = 254000
+
+TC_CONFIG_FILE = '/run/hw-management/config/tc_config.json'
+logger = logger.Logger('thermal-updater')
+
+
+class ThermalUpdater:
+    def __init__(self, sfp_list):
+        self._sfp_list = sfp_list
+        self._sfp_status = {}
+        self._timer = utils.Timer()
+
+    def load_tc_config(self):
+        asic_poll_interval = 1
+        sfp_poll_interval = 10
+        data = utils.load_json_file(TC_CONFIG_FILE)
+        if not data:
+            logger.log_notice(f'{TC_CONFIG_FILE} does not exist, use default polling interval')
+
+        if data:
+            dev_parameters = data.get('dev_parameters')
+            if dev_parameters is not None:
+                asic_parameter = dev_parameters.get('asic')
+                if asic_parameter is not None:
+                    asic_poll_interval_config = asic_parameter.get('poll_time')
+                    if asic_poll_interval_config:
+                        asic_poll_interval = int(asic_poll_interval_config) / 2
+                module_parameter = dev_parameters.get('module\\d+')
+                if module_parameter is not None:
+                    sfp_poll_interval_config = module_parameter.get('poll_time')
+                    if sfp_poll_interval_config:
+                        sfp_poll_interval = int(sfp_poll_interval_config) / 2
+
+        logger.log_notice(f'ASIC polling interval: {asic_poll_interval}')
+        self._timer.schedule(asic_poll_interval, self.update_asic)
+        logger.log_notice(f'Module polling interval: {sfp_poll_interval}')
+        self._timer.schedule(sfp_poll_interval, self.update_module)
+
+    def start(self):
+        self.clean_thermal_data()
+        if not self.wait_all_sfp_ready():
+            logger.log_error('Failed to wait for all SFP ready, will put hw-management-tc to suspend')
+            self.control_tc(True)
+            return
+        self.control_tc(False)
+        self.load_tc_config()
+        self._timer.start()
+
+    def stop(self):
+        self._timer.stop()
+        self.control_tc(True)
+
+    def control_tc(self, suspend):
+        logger.log_notice(f'Set hw-management-tc to {"suspend" if suspend else "resume"}')
+        utils.write_file('/run/hw-management/config/suspend', 1 if suspend else 0)
+
+    def clean_thermal_data(self):
+        hw_management_independent_mode_update.module_data_set_module_counter(len(self._sfp_list))
+        hw_management_independent_mode_update.thermal_data_clean_asic(0)
+        for sfp in self._sfp_list:
+            hw_management_independent_mode_update.thermal_data_clean_module(
+                0,
+                sfp.sdk_index + 1
+            )
+
+    def wait_all_sfp_ready(self):
+        logger.log_notice('Waiting for all SFP modules ready...')
+        max_wait_time = 60
+        ready_set = set()
+        while len(ready_set) != len(self._sfp_list):
+            for sfp in self._sfp_list:
+                try:
+                    sfp.is_sw_control()
+                    ready_set.add(sfp)
+                except:
+                    continue
+            max_wait_time -= 1
+            if max_wait_time == 0:
+                return False
+            time.sleep(1)
+
+        logger.log_notice('All SFP modules are ready')
+        return True
+
+    def get_asic_temp(self):
+        temperature = utils.read_int_from_file('/sys/module/sx_core/asic0/temperature/input', default=None)
+        return temperature * ASIC_TEMPERATURE_SCALE if temperature is not None else None
+
+    def get_asic_temp_warning_threashold(self):
+        emergency = utils.read_int_from_file('/sys/module/sx_core/asic0/temperature/emergency', default=None, log_func=None)
+        return emergency * ASIC_TEMPERATURE_SCALE if emergency is not None else ASIC_DEFAULT_TEMP_WARNNING_THRESHOLD
+
+    def get_asic_temp_critical_threashold(self):
+        critical = utils.read_int_from_file('/sys/module/sx_core/asic0/temperature/critical', default=None, log_func=None)
+        return critical * ASIC_TEMPERATURE_SCALE if  critical is not None else ASIC_DEFAULT_TEMP_CRITICAL_THRESHOLD
+
+    def update_single_module(self, sfp):
+        try:
+            presence = sfp.get_presence()
+            pre_presence = self._sfp_status.get(sfp.sdk_index)
+            if presence:
+                temperature = sfp.get_temperature()
+                if temperature == 0:
+                    warning_thresh = 0
+                    critical_thresh = 0
+                    fault = 0
+                else:
+                    warning_thresh = sfp.get_temperature_warning_threashold()
+                    critical_thresh = sfp.get_temperature_critical_threashold()
+                    fault = ERROR_READ_THERMAL_DATA if (temperature is None or warning_thresh is None or critical_thresh is None) else 0
+                    temperature = 0 if temperature is None else int(temperature * SFP_TEMPERATURE_SCALE)
+                    warning_thresh = 0 if warning_thresh is None else int(warning_thresh * SFP_TEMPERATURE_SCALE)
+                    critical_thresh = 0 if critical_thresh is None else int(critical_thresh * SFP_TEMPERATURE_SCALE)
+
+                hw_management_independent_mode_update.thermal_data_set_module(
+                    0, # ASIC index always 0 for now
+                    sfp.sdk_index + 1,
+                    temperature,
+                    critical_thresh,
+                    warning_thresh,
+                    fault
+                )
+            else:
+                if pre_presence != presence:
+                    hw_management_independent_mode_update.thermal_data_clean_module(0, sfp.sdk_index + 1)
+
+            if pre_presence != presence:
+                self._sfp_status[sfp.sdk_index] = presence
+        except Exception as e:
+            logger.log_error('Failed to update module {sfp.sdk_index} thermal data - {e}')
+            hw_management_independent_mode_update.thermal_data_set_module(
+                0, # ASIC index always 0 for now
+                sfp.sdk_index + 1,
+                0,
+                0,
+                0,
+                ERROR_READ_THERMAL_DATA
+            )
+
+    def update_module(self):
+        for sfp in self._sfp_list:
+            self.update_single_module(sfp)
+
+    def update_asic(self):
+        try:
+            asic_temp = self.get_asic_temp()
+            warn_threshold = self.get_asic_temp_warning_threashold()
+            critical_threshold = self.get_asic_temp_critical_threashold()
+            fault = 0
+            if asic_temp is None:
+                logger.log_error('Failed to read ASIC temperature, send fault to hw-management-tc')
+                asic_temp = warn_threshold
+                fault = ERROR_READ_THERMAL_DATA
+
+            hw_management_independent_mode_update.thermal_data_set_asic(
+                0, # ASIC index always 0 for now
+                asic_temp,
+                critical_threshold,
+                warn_threshold,
+                fault
+            )
+        except Exception as e:
+            logger.log_error('Failed to update ASIC thermal data - {e}')
+            hw_management_independent_mode_update.thermal_data_set_asic(
+                0, # ASIC index always 0 for now
+                0,
+                0,
+                0,
+                ERROR_READ_THERMAL_DATA
+            )
diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/utils.py b/platform/mellanox/mlnx-platform-api/sonic_platform/utils.py
index 51e9bc7f0..9db38e6b4 100644
--- a/platform/mellanox/mlnx-platform-api/sonic_platform/utils.py
+++ b/platform/mellanox/mlnx-platform-api/sonic_platform/utils.py
@@ -18,6 +18,7 @@
 import functools
 import subprocess
 import json
+import queue
 import sys
 import threading
 import time
@@ -289,6 +290,60 @@ def wait_until(predict, timeout, interval=1, *args, **kwargs):
     return False
 
 
+class TimerEvent:
+    def __init__(self, interval, cb, repeat):
+        self.interval = interval
+        self._cb = cb
+        self.repeat = repeat
+
+    def execute(self):
+        self._cb()
+
+
+class Timer(threading.Thread):
+    def __init__(self):
+        super(Timer, self).__init__()
+        self._timestamp_queue = queue.PriorityQueue()
+        self._wait_event = threading.Event()
+        self._stop_event = threading.Event()
+        self._min_timestamp = None
+
+    def schedule(self, interval, cb, repeat=True, run_now=True):
+        timer_event = TimerEvent(interval, cb, repeat)
+        self.add_timer_event(timer_event, run_now)
+
+    def add_timer_event(self, timer_event, run_now=True):
+        timestamp = time.time()
+        if not run_now:
+            timestamp += timer_event.interval
+
+        self._timestamp_queue.put_nowait((timestamp, timer_event))
+        if self._min_timestamp is not None and timestamp < self._min_timestamp:
+            self._wait_event.set()
+
+    def stop(self):
+        if self.is_alive():
+            self._wait_event.set()
+            self._stop_event.set()
+            self.join()
+
+    def run(self):
+        while not self._stop_event.is_set():
+            now = time.time()
+            item = self._timestamp_queue.get()
+            self._min_timestamp = item[0]
+            if self._min_timestamp > now:
+                self._wait_event.wait(self._min_timestamp - now)
+                self._wait_event.clear()
+                self._timestamp_queue.put(item)
+                continue
+
+            timer_event = item[1]
+            timer_event.execute()
+            if timer_event.repeat:
+                self.add_timer_event(timer_event, False)
+
+
 class DbUtils:
     lock = threading.Lock()
     db_instances = threading.local()
diff --git a/platform/mellanox/mlnx-platform-api/tests/test_sfp.py b/platform/mellanox/mlnx-platform-api/tests/test_sfp.py
index 6bdc82b5b..dccc727bf 100644
--- a/platform/mellanox/mlnx-platform-api/tests/test_sfp.py
+++ b/platform/mellanox/mlnx-platform-api/tests/test_sfp.py
@@ -292,6 +292,46 @@ def test_rj45_basic(self):
         assert sfp.get_transceiver_threshold_info()
         sfp.reinit()
 
+    @mock.patch('os.path.exists')
+    @mock.patch('sonic_platform.utils.read_int_from_file')
+    def test_get_temperature(self, mock_read, mock_exists):
+        sfp = SFP(0)
+        sfp.is_sw_control = mock.MagicMock(return_value=True)
+        mock_exists.return_value = False
+        assert sfp.get_temperature() == None
+
+        mock_exists.return_value = True
+        assert sfp.get_temperature() == None
+
+        mock_read.return_value = None
+        sfp.is_sw_control.return_value = False
+        assert sfp.get_temperature() == None
+
+        mock_read.return_value = 448
+        assert sfp.get_temperature() == 56.0
+
+    def test_get_temperature_threshold(self):
+        sfp = SFP(0)
+        sfp.is_sw_control = mock.MagicMock(return_value=True)
+        assert sfp.get_temperature_warning_threashold() == 70.0
+        assert sfp.get_temperature_critical_threashold() == 80.0
+
+        mock_api = mock.MagicMock()
+        mock_api.get_transceiver_thresholds_support = mock.MagicMock(return_value=False)
+        sfp.get_xcvr_api = mock.MagicMock(return_value=mock_api)
+        assert sfp.get_temperature_warning_threashold() == 70.0
+        assert sfp.get_temperature_critical_threashold() == 80.0
+
+        from sonic_platform_base.sonic_xcvr.fields import consts
+        mock_api.get_transceiver_thresholds_support.return_value = True
+        mock_api.xcvr_eeprom = mock.MagicMock()
+        mock_api.xcvr_eeprom.read = mock.MagicMock(return_value={
+            consts.TEMP_HIGH_ALARM_FIELD: 85.0,
+            consts.TEMP_HIGH_WARNING_FIELD: 75.0
+        })
+        assert sfp.get_temperature_warning_threashold() == 75.0
+        assert sfp.get_temperature_critical_threashold() == 85.0
+
     @mock.patch('sonic_platform.utils.read_int_from_file')
     @mock.patch('sonic_platform.device_data.DeviceDataManager.is_independent_mode')
     @mock.patch('sonic_platform.utils.DbUtils.get_db_instance')
diff --git a/platform/mellanox/mlnx-platform-api/tests/test_thermal.py b/platform/mellanox/mlnx-platform-api/tests/test_thermal.py
index db81f7309..a59b8dda4 100644
--- a/platform/mellanox/mlnx-platform-api/tests/test_thermal.py
+++ b/platform/mellanox/mlnx-platform-api/tests/test_thermal.py
@@ -31,6 +31,7 @@
 import sonic_platform.chassis
 from sonic_platform.chassis import Chassis
 from sonic_platform.device_data import DeviceDataManager
+from sonic_platform.sfp import SFP
 
 sonic_platform.chassis.extract_RJ45_ports_index = mock.MagicMock(return_value=[])
 
@@ -148,23 +149,27 @@ def test_psu_thermal(self):
 
     @mock.patch('os.path.exists', mock.MagicMock(return_value=True))
     def test_sfp_thermal(self):
-        from sonic_platform.thermal import initialize_sfp_thermal, THERMAL_NAMING_RULE
-        thermal_list = initialize_sfp_thermal(0)
+        from sonic_platform.thermal import THERMAL_NAMING_RULE
+        sfp = SFP(0)
+        thermal_list = sfp.get_all_thermals()
         assert len(thermal_list) == 1
         thermal = thermal_list[0]
         rule = THERMAL_NAMING_RULE['sfp thermals']
         start_index = rule.get('start_index', 1)
         assert thermal.get_name() == rule['name'].format(start_index)
-        assert rule['temperature'].format(start_index) in thermal.temperature
-        assert rule['high_threshold'].format(start_index) in thermal.high_threshold
-        assert rule['high_critical_threshold'].format(start_index) in thermal.high_critical_threshold
         assert thermal.get_position_in_parent() == 1
         assert thermal.is_replaceable() == False
+        sfp.get_temperature = mock.MagicMock(return_value=35.4)
+        sfp.get_temperature_warning_threashold = mock.MagicMock(return_value=70)
+        sfp.get_temperature_critical_threashold = mock.MagicMock(return_value=80)
+        assert thermal.get_temperature() == 35.4
+        assert thermal.get_high_threshold() == 70
+        assert thermal.get_high_critical_threshold() == 80
 
     @mock.patch('sonic_platform.utils.read_float_from_file')
     def test_get_temperature(self, mock_read):
         from sonic_platform.thermal import Thermal
-        thermal = Thermal('test', 'temp_file', None, None, 1)
+        thermal = Thermal('test', 'temp_file', None, None, None, None, 1000, 1)
         mock_read.return_value = 35727
         assert thermal.get_temperature() == 35.727
 
@@ -177,7 +182,7 @@ def test_get_temperature(self, mock_read):
     @mock.patch('sonic_platform.utils.read_float_from_file')
     def test_get_high_threshold(self, mock_read):
         from sonic_platform.thermal import Thermal
-        thermal = Thermal('test', None, None, None, 1)
+        thermal = Thermal('test', None, None, None, None, None, 1000, 1)
         assert thermal.get_high_threshold() is None
 
         thermal.high_threshold = 'high_th_file'
@@ -193,7 +198,7 @@ def test_get_high_threshold(self, mock_read):
     @mock.patch('sonic_platform.utils.read_float_from_file')
     def test_get_high_critical_threshold(self, mock_read):
         from sonic_platform.thermal import Thermal
-        thermal = Thermal('test', None, None, None, 1)
+        thermal = Thermal('test', None, None, None, None, None, 1000, 1)
         assert thermal.get_high_critical_threshold() is None
 
         thermal.high_critical_threshold = 'high_th_file'
diff --git a/platform/mellanox/mlnx-platform-api/tests/test_thermal_updater.py b/platform/mellanox/mlnx-platform-api/tests/test_thermal_updater.py
new file mode 100644
index 000000000..1a34a7440
--- /dev/null
+++ b/platform/mellanox/mlnx-platform-api/tests/test_thermal_updater.py
@@ -0,0 +1,128 @@
+#
+# Copyright (c) 2023 NVIDIA CORPORATION & AFFILIATES.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+import time
+from unittest import mock
+
+from sonic_platform import utils
+from sonic_platform.thermal_updater import ThermalUpdater, hw_management_independent_mode_update
+from sonic_platform.thermal_updater import ASIC_DEFAULT_TEMP_WARNNING_THRESHOLD, \
+                                           ASIC_DEFAULT_TEMP_CRITICAL_THRESHOLD
+
+
+mock_tc_config = """
+{
+    "dev_parameters": {
+        "asic": {
+            "pwm_min": 20,
+            "pwm_max": 100,
+            "val_min": "!70000",
+            "val_max": "!105000",
+            "poll_time": 3
+        },
+        "module\\\\d+": {
+            "pwm_min": 20,
+            "pwm_max": 100,
+            "val_min": 60000,
+            "val_max": 80000,
+            "poll_time": 20
+        }
+    }
+}
+"""
+
+
+class TestThermalUpdater:
+    def test_load_tc_config_non_exists(self):
+        updater = ThermalUpdater(None)
+        updater.load_tc_config()
+        assert updater._timer._timestamp_queue.qsize() == 2
+
+    def test_load_tc_config_mocked(self):
+        updater = ThermalUpdater(None)
+        mock_os_open = mock.mock_open(read_data=mock_tc_config)
+        with mock.patch('sonic_platform.utils.open', mock_os_open):
+            updater.load_tc_config()
+        assert updater._timer._timestamp_queue.qsize() == 2
+
+    @mock.patch('sonic_platform.thermal_updater.ThermalUpdater.update_asic', mock.MagicMock())
+    @mock.patch('sonic_platform.thermal_updater.ThermalUpdater.update_module', mock.MagicMock())
+    @mock.patch('sonic_platform.thermal_updater.ThermalUpdater.wait_all_sfp_ready')
+    @mock.patch('sonic_platform.utils.write_file')
+    def test_start_stop(self, mock_write, mock_wait):
+        mock_wait.return_value = True
+        mock_sfp = mock.MagicMock()
+        mock_sfp.sdk_index = 1
+        updater = ThermalUpdater([mock_sfp])
+        updater.start()
+        mock_write.assert_called_once_with('/run/hw-management/config/suspend', 0)
+        utils.wait_until(updater._timer.is_alive, timeout=5)
+
+        mock_write.reset_mock()
+        updater.stop()
+        assert not updater._timer.is_alive()
+        mock_write.assert_called_once_with('/run/hw-management/config/suspend', 1)
+
+        mock_wait.return_value = False
+        mock_write.reset_mock()
+        updater.start()
+        mock_write.assert_called_once_with('/run/hw-management/config/suspend', 1)
+        updater.stop()
+
+    @mock.patch('sonic_platform.thermal_updater.time.sleep', mock.MagicMock())
+    def test_wait_all_sfp_ready(self):
+        mock_sfp = mock.MagicMock()
+        mock_sfp.is_sw_control = mock.MagicMock(return_value=True)
+        updater = ThermalUpdater([mock_sfp])
+        assert updater.wait_all_sfp_ready()
+        mock_sfp.is_sw_control.side_effect = Exception('')
+        assert not updater.wait_all_sfp_ready()
+
+    @mock.patch('sonic_platform.utils.read_int_from_file')
+    def test_update_asic(self, mock_read):
+        mock_read.return_value = 8
+        updater = ThermalUpdater(None)
+        assert updater.get_asic_temp() == 1000
+        assert updater.get_asic_temp_warning_threashold() == 1000
+        assert updater.get_asic_temp_critical_threashold() == 1000
+        updater.update_asic()
+        hw_management_independent_mode_update.thermal_data_set_asic.assert_called_once()
+
+        mock_read.return_value = None
+        assert updater.get_asic_temp() is None
+        assert updater.get_asic_temp_warning_threashold() == ASIC_DEFAULT_TEMP_WARNNING_THRESHOLD
+        assert updater.get_asic_temp_critical_threashold() == ASIC_DEFAULT_TEMP_CRITICAL_THRESHOLD
+
+    def test_update_module(self):
+        mock_sfp = mock.MagicMock()
+        mock_sfp.sdk_index = 10
+        mock_sfp.get_presence = mock.MagicMock(return_value=True)
+        mock_sfp.get_temperature = mock.MagicMock(return_value=55.0)
+        mock_sfp.get_temperature_warning_threashold = mock.MagicMock(return_value=70.0)
+        mock_sfp.get_temperature_critical_threashold = mock.MagicMock(return_value=80.0)
+        updater = ThermalUpdater([mock_sfp])
+        updater.update_module()
+        hw_management_independent_mode_update.thermal_data_set_module.assert_called_once_with(0, 11, 55000, 80000, 70000, 0)
+
+        mock_sfp.get_temperature = mock.MagicMock(return_value=0.0)
+        hw_management_independent_mode_update.reset_mock()
+        updater.update_module()
+        hw_management_independent_mode_update.thermal_data_set_module.assert_called_once_with(0, 11, 0, 0, 0, 0)
+
+        mock_sfp.get_presence = mock.MagicMock(return_value=False)
+        updater.update_module()
+        hw_management_independent_mode_update.thermal_data_clean_module.assert_called_once_with(0, 11)
diff --git a/platform/mellanox/mlnx-platform-api/tests/test_utils.py b/platform/mellanox/mlnx-platform-api/tests/test_utils.py
index 04b00f82f..2a186de7e 100644
--- a/platform/mellanox/mlnx-platform-api/tests/test_utils.py
+++ b/platform/mellanox/mlnx-platform-api/tests/test_utils.py
@@ -191,6 +191,26 @@ def test_read_key_value_file(self):
         mock_os_open = mock.mock_open(read_data='a:b')
         with mock.patch('sonic_platform.utils.open', mock_os_open):
             assert utils.read_key_value_file('some_file') == {'a':'b'}
+
         mock_os_open = mock.mock_open(read_data='a=b')
         with mock.patch('sonic_platform.utils.open', mock_os_open):
             assert utils.read_key_value_file('some_file', delimeter='=') == {'a':'b'}
+
+    def test_timer(self):
+        timer = utils.Timer()
+        timer.start()
+        mock_cb_1000_run_now = mock.MagicMock()
+        mock_cb_1000_run_future = mock.MagicMock()
+        mock_cb_1_run_future_once = mock.MagicMock()
+        mock_cb_1_run_future_repeat = mock.MagicMock()
+        timer.schedule(1000, cb=mock_cb_1000_run_now, repeat=False, run_now=True)
+        timer.schedule(1000, cb=mock_cb_1000_run_future, repeat=False, run_now=False)
+        timer.schedule(1, cb=mock_cb_1_run_future_once, repeat=False, run_now=False)
+        timer.schedule(1, cb=mock_cb_1_run_future_repeat, repeat=True, run_now=False)
+        time.sleep(3)
+        timer.stop()
+
+        mock_cb_1000_run_now.assert_called_once()
+        mock_cb_1000_run_future.assert_not_called()
+        mock_cb_1_run_future_once.assert_called_once()
+        assert mock_cb_1_run_future_repeat.call_count > 1

From 6a9ec987b5e4da5d6126c1739c2033699219683b Mon Sep 17 00:00:00 2001
From: zitingguo-ms <zitingguo@microsoft.com>
Date: Thu, 14 Dec 2023 09:37:35 +0800
Subject: [PATCH 0048/1115] change branch name (#17267)

Why I did it
Upgrade xgs SAI to 10.1 version.

Work item tracking
Microsoft ADO (number only): 25931321
How I did it
Upgrade xgs SAI version in sai.mk file.

How to verify it
Run full qualification on 7050cx3/7260cx3:

7050cx3:
https://dev.azure.com/mssonic/internal/_build/results?buildId=425450&view=results
https://dev.azure.com/mssonic/internal/_build/results?buildId=425449&view=results
7260cx3: https://elastictest.org/scheduler/testplan/656f2b2b617fb27e41557494?leftSideViewMode=detail&prop=status&order=ascending
---
 platform/broadcom/sai.mk | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/platform/broadcom/sai.mk b/platform/broadcom/sai.mk
index 92a1d9598..eea4f47a4 100644
--- a/platform/broadcom/sai.mk
+++ b/platform/broadcom/sai.mk
@@ -1,6 +1,6 @@
-LIBSAIBCM_XGS_VERSION = 8.4.31.0
+LIBSAIBCM_XGS_VERSION = 10.1.0.0
 LIBSAIBCM_DNX_VERSION = 7.1.111.1
-LIBSAIBCM_XGS_BRANCH_NAME = SAI_8.4.0_GA
+LIBSAIBCM_XGS_BRANCH_NAME = SAI_10.1.0_GA
 LIBSAIBCM_DNX_BRANCH_NAME = REL_7.0_SAI_1.11
 LIBSAIBCM_XGS_URL_PREFIX = "https://sonicstorage.blob.core.windows.net/public/sai/sai-broadcom/$(LIBSAIBCM_XGS_BRANCH_NAME)/$(LIBSAIBCM_XGS_VERSION)/xgs"
 LIBSAIBCM_DNX_URL_PREFIX = "https://sonicstorage.blob.core.windows.net/public/sai/bcmsai/$(LIBSAIBCM_DNX_BRANCH_NAME)/$(LIBSAIBCM_DNX_VERSION)"

From 53be9de7439440590373e5e9a19f0c9a33d85670 Mon Sep 17 00:00:00 2001
From: Junhua Zhai <junhua.zhai@outlook.com>
Date: Thu, 14 Dec 2023 09:37:44 +0800
Subject: [PATCH 0049/1115] Fix syncd_request_shutdown coredump in config
 reload on KVM sonic (#17486)

The issue is related to #16812. Process syncd does not run in the container gbsyncd on kvm sonic with default hwsku.

Microsoft ADO : 26151608

How I did it
If syncd has not run in container gbsyncd, it is not needed to trigger graceful shudown of syncd.

How to verify it
None of syncd_request_shutdown coredump in config reload on KVM sonic
---
 files/scripts/gbsyncd.sh | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/files/scripts/gbsyncd.sh b/files/scripts/gbsyncd.sh
index fc6b018b3..34bcb7044 100755
--- a/files/scripts/gbsyncd.sh
+++ b/files/scripts/gbsyncd.sh
@@ -20,6 +20,11 @@ function waitplatform() {
 }
 
 function stopplatform1() {
+    if ! docker top gbsyncd$DEV | grep -q /usr/bin/syncd; then
+        debug "syncd process in container gbsyncd$DEV is not running"
+        return
+    fi
+
     # Invoke platform specific pre shutdown routine.
     PLATFORM=`$SONIC_DB_CLI CONFIG_DB hget 'DEVICE_METADATA|localhost' platform`
     PLATFORM_PRE_SHUTDOWN="/usr/share/sonic/device/$PLATFORM/plugins/gbsyncd_request_pre_shutdown"

From 6d043a25bd56d8b5ae3759ac3244dbdcc45e7a17 Mon Sep 17 00:00:00 2001
From: Nazarii Hnydyn <nazariig@nvidia.com>
Date: Thu, 14 Dec 2023 08:41:12 +0200
Subject: [PATCH 0050/1115] [installer] Create a blank grubenv if doesn't
 exist. (#17414)

- Why I did it
To fix BIOS firmware update after fresh image installation from ONiE

- How I did it
Initialized empty GRUB environment file after ONiE installation

- How to verify it
Install image from ONiE
Run BIOS firmware upgrade

Signed-off-by: Nazarii Hnydyn <nazariig@nvidia.com>
---
 installer/default_platform.conf | 24 ++++++++----------------
 1 file changed, 8 insertions(+), 16 deletions(-)

diff --git a/installer/default_platform.conf b/installer/default_platform.conf
index cf814c201..319b7009f 100755
--- a/installer/default_platform.conf
+++ b/installer/default_platform.conf
@@ -264,14 +264,6 @@ demo_install_grub()
         exit 1
     }
 
-    # Create a blank environment block file.
-    if [ ! -f "$onie_initrd_tmp/$demo_mnt/grub/grubenv" ]; then
-        grub-editenv "$onie_initrd_tmp/$demo_mnt/grub/grubenv" create || {
-            echo "ERROR: grub-editenv failed on: $blk_dev"
-            exit 1
-        }
-    fi
-
     if [ "$demo_type" = "DIAG" ] ; then
         # Install GRUB in the partition also.  This allows for
         # chainloading the DIAG image from another OS.
@@ -354,14 +346,6 @@ demo_install_uefi_grub()
     }
     rm -f $grub_install_log
 
-    # Create a blank environment block file.
-    if [ ! -f "$demo_mnt/grub/grubenv" ]; then
-        grub-editenv "$demo_mnt/grub/grubenv" create || {
-            echo "ERROR: grub-editenv failed on: $blk_dev"
-            exit 1
-        }
-    fi
-
     # Configure EFI NVRAM Boot variables.  --create also sets the
     # new boot number as active.
     grub=$(find /boot/efi/EFI/$demo_volume_label/ -name grub*.efi -exec basename {} \;)
@@ -631,6 +615,14 @@ EOF
         umount $demo_mnt
     else
         cp $grub_cfg $onie_initrd_tmp/$demo_mnt/grub/grub.cfg
+
+        # Create a blank environment block file.
+        if [ ! -f "$onie_initrd_tmp/$demo_mnt/grub/grubenv" ]; then
+            grub-editenv "$onie_initrd_tmp/$demo_mnt/grub/grubenv" create || {
+                echo "ERROR: grub-editenv failed on: $blk_dev"
+                exit 1
+            }
+        fi
     fi
 
     cd /

From b21f33b8b19e396752e509eea9a0b892df44e99b Mon Sep 17 00:00:00 2001
From: Ze Gan <ganze718@gmail.com>
Date: Thu, 14 Dec 2023 14:49:04 +0800
Subject: [PATCH 0051/1115] [Azp]: Fix azp on building ubuntu20.04 and
 sonic-mgmt (#17439)

The Azp failed on ubuntu20.04 and sonic-mgmt building due to sonic-dash-api updating.

Signed-off-by: Ze Gan <ganze718@gmail.com>
---
 .azure-pipelines/azure-pipelines-build-ubuntu-2004.yml | 2 +-
 dockers/docker-sonic-mgmt/Dockerfile.j2                | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/.azure-pipelines/azure-pipelines-build-ubuntu-2004.yml b/.azure-pipelines/azure-pipelines-build-ubuntu-2004.yml
index 697c87b3c..1ff50719c 100644
--- a/.azure-pipelines/azure-pipelines-build-ubuntu-2004.yml
+++ b/.azure-pipelines/azure-pipelines-build-ubuntu-2004.yml
@@ -34,7 +34,7 @@ stages:
         mkdir -p /tmp/artifacts
       displayName: "Install dependencies"
     - script: |
-        SONIC_CONFIG_MAKE_JOBS=$(nproc) CONFIGURED_ARCH=amd64 DEST=/tmp/artifacts make -f ../rules/protobuf.mk -f protobuf/Makefile
+        BLDENV=bullseye SONIC_CONFIG_MAKE_JOBS=$(nproc) CONFIGURED_ARCH=amd64 DEST=/tmp/artifacts make -f ../rules/protobuf.mk -f protobuf/Makefile
       workingDirectory: src
       displayName: "Build protobuf"
     - script: |
diff --git a/dockers/docker-sonic-mgmt/Dockerfile.j2 b/dockers/docker-sonic-mgmt/Dockerfile.j2
index 5e634f0b9..c42478d9a 100755
--- a/dockers/docker-sonic-mgmt/Dockerfile.j2
+++ b/dockers/docker-sonic-mgmt/Dockerfile.j2
@@ -224,7 +224,7 @@ RUN mkdir -p /tmp/protobuf \
 # Install dash-api
 RUN cd /tmp \
     && mkdir -p /usr/lib/python3/dist-packages/dash_api \
-    && wget https://raw.githubusercontent.com/sonic-net/sonic-buildimage/master/src/sonic-dash-api/pypkg/__init__.py -O /usr/lib/python3/dist-packages/dash_api/__init__.py \
+    && wget https://raw.githubusercontent.com/sonic-net/sonic-dash-api/master/misc/pypkg/dash_api/__init__.py -O /usr/lib/python3/dist-packages/dash_api/__init__.py \
     && git clone https://github.com/sonic-net/sonic-dash-api.git \
     && protoc -I=sonic-dash-api/proto --python_out=/usr/lib/python3/dist-packages/dash_api sonic-dash-api/proto/*.proto \
     && rm -rf /tmp/sonic-dash-api

From fa5829bca80ead2a882ba5bd1aa719e44c0ac68f Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Thu, 14 Dec 2023 15:38:45 +0800
Subject: [PATCH 0052/1115] [submodule] Update submodule sonic-utilities to the
 latest HEAD automatically (#17502)

---
 src/sonic-utilities | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-utilities b/src/sonic-utilities
index 3037959da..377e5812f 160000
--- a/src/sonic-utilities
+++ b/src/sonic-utilities
@@ -1 +1 @@
-Subproject commit 3037959da0db3639952d15c9cb0ba1b7a04c1e64
+Subproject commit 377e5812f66d4adba09221028191d459775d9a25

From 67c0543127d1ca9d7a0dfe26e334e229bdea1391 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Thu, 14 Dec 2023 15:42:08 +0800
Subject: [PATCH 0053/1115] [submodule] Update submodule sonic-linux-kernel to
 the latest HEAD automatically (#17498)

---
 src/sonic-linux-kernel | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-linux-kernel b/src/sonic-linux-kernel
index b2601c7b1..63705029d 160000
--- a/src/sonic-linux-kernel
+++ b/src/sonic-linux-kernel
@@ -1 +1 @@
-Subproject commit b2601c7b1a10f42488d0f21c6c133f5c60c2387d
+Subproject commit 63705029d7d3bbf480a18839a1e12524bd949fa5

From c7e7dffb6ee63fa7a90a5bada79dfb69064cbf72 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Thu, 14 Dec 2023 15:42:54 +0800
Subject: [PATCH 0054/1115] [submodule] Update submodule sonic-sairedis to the
 latest HEAD automatically (#17500)

---
 src/sonic-sairedis | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-sairedis b/src/sonic-sairedis
index e7ad3566a..641b7304f 160000
--- a/src/sonic-sairedis
+++ b/src/sonic-sairedis
@@ -1 +1 @@
-Subproject commit e7ad3566a8265e1b4cc96a1ed50978eee319dc6a
+Subproject commit 641b7304f2a10762a119b4c56c1621b4a88616b9

From 953d3dc1751728fa574d119dc0619cb4478be08d Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Thu, 14 Dec 2023 15:47:12 +0800
Subject: [PATCH 0055/1115] [submodule] Update submodule sonic-dash-api to the
 latest HEAD automatically (#17503)

---
 src/sonic-dash-api | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-dash-api b/src/sonic-dash-api
index d4448c78b..910814ffb 160000
--- a/src/sonic-dash-api
+++ b/src/sonic-dash-api
@@ -1 +1 @@
-Subproject commit d4448c78b4e0afd1ec6dfaa390aef5c650cee4b3
+Subproject commit 910814ffb4fd2e44e183d8d92086a724c62f5f1d

From e59ac879e61c795223df83ca7148778f6813747d Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Thu, 14 Dec 2023 16:15:27 +0800
Subject: [PATCH 0056/1115] [submodule] Update submodule sonic-host-services to
 the latest HEAD automatically (#17497)

---
 src/sonic-host-services | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-host-services b/src/sonic-host-services
index e8ae2afd6..722b7962f 160000
--- a/src/sonic-host-services
+++ b/src/sonic-host-services
@@ -1 +1 @@
-Subproject commit e8ae2afd612ef7fd08b7d855c48c78fe54b34ec4
+Subproject commit 722b7962f95e8d602a9a60e77356826e9f68891c

From da3e7cbbba436fd782d647e032304900d6f14a87 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Thu, 14 Dec 2023 16:34:10 +0800
Subject: [PATCH 0057/1115] [submodule] Update submodule linkmgrd to the latest
 HEAD automatically (#17476)

#### Why I did it
src/linkmgrd
```
* 79c3872 - (HEAD -> master, origin/master, origin/HEAD) [active-standby] Fix `show mux status` inconsistency introduced by orchagent rollback  (#225) (24 hours ago) [Jing Zhang]
* ba913c0 - [warmboot] use config_db connector to update mux mode config instead of CLI (#223) (2 days ago) [Jing Zhang]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/linkmgrd | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/linkmgrd b/src/linkmgrd
index e420df41a..79c3872b3 160000
--- a/src/linkmgrd
+++ b/src/linkmgrd
@@ -1 +1 @@
-Subproject commit e420df41a08ea9ec421687fb06d1f96535ebf151
+Subproject commit 79c3872b38b8ae464dd04907610657bb2a611360

From f373a16e957d559c646a2829799b8e4b2e21fbd7 Mon Sep 17 00:00:00 2001
From: Junchao-Mellanox <57339448+Junchao-Mellanox@users.noreply.github.com>
Date: Thu, 14 Dec 2023 18:01:11 +0800
Subject: [PATCH 0058/1115] [Mellanox] Fix race condition while creating SFP
 (#17441)

- Why I did it
Fix issue xcvrd crashes due to cannot import name 'initialize_sfp_thermal':

Nov 27 09:47:16.388639 sonic ERR pmon#xcvrd: Exception occured at CmisManagerTask thread due to ImportError("cannot import name 'initialize_sfp_thermal' from partially initialized module 'sonic_platform.thermal' (most likely due to a circular import) (/usr/local/lib/python3.9/dist-packages/sonic_platform/thermal.py)")

- How I did it
Add lock for creating SFP object

- How to verify it
Unit test
Manual Test
---
 .../sonic_platform/chassis.py                 | 70 +++++++++++--------
 .../mlnx-platform-api/tests/test_chassis.py   | 26 +++++++
 2 files changed, 67 insertions(+), 29 deletions(-)

diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/chassis.py b/platform/mellanox/mlnx-platform-api/sonic_platform/chassis.py
index f0b73de66..5870d7e6b 100644
--- a/platform/mellanox/mlnx-platform-api/sonic_platform/chassis.py
+++ b/platform/mellanox/mlnx-platform-api/sonic_platform/chassis.py
@@ -124,6 +124,7 @@ def __init__(self):
         self.reboot_cause_initialized = False
 
         self.sfp_module = None
+        self.sfp_lock = threading.Lock()
 
         # Build the RJ45 port list from platform.json and hwsku.json
         self._RJ45_port_inited = False
@@ -277,38 +278,49 @@ def _import_sfp_module(self):
 
     def initialize_single_sfp(self, index):
         sfp_count = self.get_num_sfps()
+        # Use double checked locking mechanism for:
+        #     1. protect shared resource self._sfp_list
+        #     2. performance (avoid locking every time)
         if index < sfp_count:
-            if not self._sfp_list:
-                self._sfp_list = [None] * sfp_count
-
-            if not self._sfp_list[index]:
-                sfp_module = self._import_sfp_module()
-                if self.RJ45_port_list and index in self.RJ45_port_list:
-                    self._sfp_list[index] = sfp_module.RJ45Port(index)
-                else:
-                    self._sfp_list[index] = sfp_module.SFP(index)
-                self.sfp_initialized_count += 1
+            if not self._sfp_list or not self._sfp_list[index]:
+                with self.sfp_lock:
+                    if not self._sfp_list:
+                        self._sfp_list = [None] * sfp_count
+
+                    if not self._sfp_list[index]:
+                        sfp_module = self._import_sfp_module()
+                        if self.RJ45_port_list and index in self.RJ45_port_list:
+                            self._sfp_list[index] = sfp_module.RJ45Port(index)
+                        else:
+                            self._sfp_list[index] = sfp_module.SFP(index)
+                        self.sfp_initialized_count += 1
 
     def initialize_sfp(self):
-        if not self._sfp_list:
-            sfp_module = self._import_sfp_module()
-            sfp_count = self.get_num_sfps()
-            for index in range(sfp_count):
-                if self.RJ45_port_list and index in self.RJ45_port_list:
-                    sfp_object = sfp_module.RJ45Port(index)
-                else:
-                    sfp_object = sfp_module.SFP(index)
-                self._sfp_list.append(sfp_object)
-            self.sfp_initialized_count = sfp_count
-        elif self.sfp_initialized_count != len(self._sfp_list):
-            sfp_module = self._import_sfp_module()
-            for index in range(len(self._sfp_list)):
-                if self._sfp_list[index] is None:
-                    if self.RJ45_port_list and index in self.RJ45_port_list:
-                        self._sfp_list[index] = sfp_module.RJ45Port(index)
-                    else:
-                        self._sfp_list[index] = sfp_module.SFP(index)
-            self.sfp_initialized_count = len(self._sfp_list)
+        sfp_count = self.get_num_sfps()
+        # Use double checked locking mechanism for:
+        #     1. protect shared resource self._sfp_list
+        #     2. performance (avoid locking every time)
+        if sfp_count != self.sfp_initialized_count:
+            with self.sfp_lock:
+                if sfp_count != self.sfp_initialized_count:
+                    if not self._sfp_list:
+                        sfp_module = self._import_sfp_module()
+                        for index in range(sfp_count):
+                            if self.RJ45_port_list and index in self.RJ45_port_list:
+                                sfp_object = sfp_module.RJ45Port(index)
+                            else:
+                                sfp_object = sfp_module.SFP(index)
+                            self._sfp_list.append(sfp_object)
+                        self.sfp_initialized_count = sfp_count
+                    elif self.sfp_initialized_count != len(self._sfp_list):
+                        sfp_module = self._import_sfp_module()
+                        for index in range(len(self._sfp_list)):
+                            if self._sfp_list[index] is None:
+                                if self.RJ45_port_list and index in self.RJ45_port_list:
+                                    self._sfp_list[index] = sfp_module.RJ45Port(index)
+                                else:
+                                    self._sfp_list[index] = sfp_module.SFP(index)
+                        self.sfp_initialized_count = len(self._sfp_list)
 
     def get_num_sfps(self):
         """
diff --git a/platform/mellanox/mlnx-platform-api/tests/test_chassis.py b/platform/mellanox/mlnx-platform-api/tests/test_chassis.py
index fce9bd00b..ffe86aaf3 100644
--- a/platform/mellanox/mlnx-platform-api/tests/test_chassis.py
+++ b/platform/mellanox/mlnx-platform-api/tests/test_chassis.py
@@ -16,8 +16,10 @@
 #
 
 import os
+import random
 import sys
 import subprocess
+import threading
 
 from mock import MagicMock
 if sys.version_info.major == 3:
@@ -167,6 +169,30 @@ def test_sfp(self):
         assert len(sfp_list) == 3
         assert chassis.sfp_initialized_count == 3
 
+    def test_create_sfp_in_multi_thread(self):
+        DeviceDataManager.get_sfp_count = mock.MagicMock(return_value=3)
+
+        iteration_num = 100
+        while iteration_num > 0:
+            chassis = Chassis()
+            assert chassis.sfp_initialized_count == 0
+            t1 = threading.Thread(target=lambda: chassis.get_sfp(1))
+            t2 = threading.Thread(target=lambda: chassis.get_sfp(1))
+            t3 = threading.Thread(target=lambda: chassis.get_all_sfps())
+            t4 = threading.Thread(target=lambda: chassis.get_all_sfps())
+            threads = [t1, t2, t3, t4]
+            random.shuffle(threads)
+            for t in threads:
+                t.start()
+            for t in threads:
+                t.join()
+            assert len(chassis.get_all_sfps()) == 3
+            assert chassis.sfp_initialized_count == 3
+            for index, s in enumerate(chassis.get_all_sfps()):
+                assert s.sdk_index == index
+            iteration_num -= 1
+
+
     @mock.patch('sonic_platform.device_data.DeviceDataManager.get_sfp_count', MagicMock(return_value=3))
     def test_change_event(self):
         chassis = Chassis()

From c1cb292310dca70562ba87f710575955e718864c Mon Sep 17 00:00:00 2001
From: Junchao-Mellanox <57339448+Junchao-Mellanox@users.noreply.github.com>
Date: Thu, 14 Dec 2023 18:04:24 +0800
Subject: [PATCH 0059/1115] [Mellanox] implement platform wait in python code
 (#17398)

- Why I did it
New implementation of Nvidia platform_wait due to:
1. sysfs deprecated by hw-mgmt
2. new dependencies to SDK
3. For CMIS host management mode

- How I did it
wait hw-management ready
wait SDK sysfs nodes ready

- How to verify it
manual test
unit test
sonic-mgmt regression
---
 .../x86_64-mlnx_msn2700-r0/platform_wait      | 100 ++++++------------
 .../sonic_platform/device_data.py             |  28 ++++-
 .../mlnx-platform-api/sonic_platform/utils.py |  24 +++++
 .../tests/test_device_data.py                 |  24 ++++-
 .../mlnx-platform-api/tests/test_utils.py     |   7 ++
 5 files changed, 111 insertions(+), 72 deletions(-)

diff --git a/device/mellanox/x86_64-mlnx_msn2700-r0/platform_wait b/device/mellanox/x86_64-mlnx_msn2700-r0/platform_wait
index 080974868..ea76db07a 100755
--- a/device/mellanox/x86_64-mlnx_msn2700-r0/platform_wait
+++ b/device/mellanox/x86_64-mlnx_msn2700-r0/platform_wait
@@ -1,68 +1,32 @@
-#!/bin/bash
-
-declare -r SYSLOG_LOGGER="/usr/bin/logger"
-declare -r SYSLOG_IDENTIFIER="platform_wait"
-declare -r SYSLOG_ERROR="error"
-declare -r SYSLOG_NOTICE="notice"
-declare -r SYSLOG_INFO="info"
-
-declare -r HW_MGMT_CONFIG="/var/run/hw-management/config"
-
-declare -r ASIC_INIT_DONE="${HW_MGMT_CONFIG}/asics_init_done"
-declare -r NUM_ASICS="${HW_MGMT_CONFIG}/asic_num"
-declare -r ASIC_CHIPUP_COMPLETED="${HW_MGMT_CONFIG}/asic_chipup_completed"
-
-declare -r EXIT_SUCCESS="0"
-declare -r EXIT_TIMEOUT="1"
-
-function log_error() {
-    eval "${SYSLOG_LOGGER} -t ${SYSLOG_IDENTIFIER} -p ${SYSLOG_ERROR} $@"
-}
-
-function log_notice() {
-    eval "${SYSLOG_LOGGER} -t ${SYSLOG_IDENTIFIER} -p ${SYSLOG_NOTICE} $@"
-}
-
-function log_info() {
-    eval "${SYSLOG_LOGGER} -t ${SYSLOG_IDENTIFIER} -p ${SYSLOG_INFO} $@"
-}
-
-function wait_for_asic_chipup() {
-
-    local _ASIC_INIT="0"
-    local _ASIC_COUNT="0"
-    local _ASICS_CHIPUP="0"
-
-    local -i _WDOG_CNT="1"
-    local -ir _WDOG_MAX="300"
-
-    local -r _TIMEOUT="1s"
-
-    while [[ "${_WDOG_CNT}" -le "${_WDOG_MAX}" ]]; do
-        _ASIC_INIT="$(cat ${ASIC_INIT_DONE} 2>&1)"
-        _ASIC_COUNT="$(cat ${NUM_ASICS} 2>&1)"
-        _ASICS_CHIPUP="$(cat ${ASIC_CHIPUP_COMPLETED} 2>&1)"
-
-        if [[ "${_ASIC_INIT}" -eq 1 && "${_ASIC_COUNT}" -eq "${_ASICS_CHIPUP}" ]]; then
-            return "${EXIT_SUCCESS}"
-        fi
-
-        let "_WDOG_CNT++"
-        sleep "${_TIMEOUT}"
-    done
-
-    log_error "Mellanox ASIC is not ready: INIT: ${_ASIC_INIT}, NUM_ASIC: ${_ASIC_COUNT}, CHIPUP: ${_ASICS_CHIPUP} timeout...."
-    return "${EXIT_TIMEOUT}"
-}
-
-log_info "Wait for Mellanox ASIC to be ready"
-
-wait_for_asic_chipup
-EXIT_CODE="$?"
-if [[ "${EXIT_CODE}" != "${EXIT_SUCCESS}" ]]; then
-    exit "${EXIT_CODE}"
-fi
-
-log_notice "Mellanox ASIC is ready"
-
-exit "${EXIT_SUCCESS}"
+#!/usr/bin/python3
+
+#
+# Copyright (c) 2023 NVIDIA CORPORATION & AFFILIATES.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+import sys
+from sonic_platform.device_data import DeviceDataManager
+from sonic_py_common.logger import Logger
+
+
+logger = Logger(log_identifier='platform_wait')
+logger.log_notice('Nvidia: Wait for PMON dependencies to be ready')
+if DeviceDataManager.wait_platform_ready():
+    logger.log_notice('Nvidia: PMON dependencies are ready')
+    sys.exit(0)
+else:
+    logger.log_error('Nvidia: PMON dependencies are not ready: timeout')
+    sys.exit(-1)
diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/device_data.py b/platform/mellanox/mlnx-platform-api/sonic_platform/device_data.py
index 6bf0a9945..aeceb15d1 100644
--- a/platform/mellanox/mlnx-platform-api/sonic_platform/device_data.py
+++ b/platform/mellanox/mlnx-platform-api/sonic_platform/device_data.py
@@ -17,6 +17,7 @@
 
 import glob
 import os
+import time
 
 from . import utils
 
@@ -167,8 +168,11 @@ def is_psu_hotswapable(cls):
     @classmethod
     @utils.read_only_cache()
     def get_sfp_count(cls):
-        sfp_count = utils.read_int_from_file('/run/hw-management/config/sfp_counter')
-        return sfp_count if sfp_count > 0 else len(glob.glob('/sys/module/sx_core/asic0/module*'))
+        from sonic_py_common import device_info
+        platform_path = device_info.get_path_to_platform_dir()
+        platform_json_path = os.path.join(platform_path, 'platform.json')
+        platform_data = utils.load_json_file(platform_json_path)
+        return len(platform_data['chassis']['sfps'])
 
     @classmethod
     def get_linecard_sfp_count(cls, lc_index):
@@ -244,3 +248,23 @@ def is_independent_mode(cls):
         sai_profile_file = os.path.join(hwsku_dir, 'sai.profile')
         data = utils.read_key_value_file(sai_profile_file, delimeter='=')
         return data.get('SAI_INDEPENDENT_MODULE_MODE') == '1'
+    
+    @classmethod
+    def wait_platform_ready(cls):
+        """
+        Wait for Nvidia platform related services(SDK, hw-management) ready
+        Returns:
+            bool: True if wait success else timeout
+        """
+        conditions = []
+        sysfs_nodes = ['power_mode', 'power_mode_policy', 'present', 'reset', 'status', 'statuserror']
+        if cls.is_independent_mode():
+            sysfs_nodes.extend(['control', 'frequency', 'frequency_support', 'hw_present', 'hw_reset',
+                                'power_good', 'power_limit', 'power_on', 'temperature/input'])
+        else:
+            conditions.append(lambda: utils.read_int_from_file('/var/run/hw-management/config/asics_init_done') == 1)
+        sfp_count = cls.get_sfp_count()
+        for sfp_index in range(sfp_count):
+            for sysfs_node in sysfs_nodes:
+                conditions.append(lambda: os.path.exists(f'/sys/module/sx_core/asic0/module{sfp_index}/{sysfs_node}'))
+        return utils.wait_until_conditions(conditions, 300, 1)
diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/utils.py b/platform/mellanox/mlnx-platform-api/sonic_platform/utils.py
index 9db38e6b4..1135903c2 100644
--- a/platform/mellanox/mlnx-platform-api/sonic_platform/utils.py
+++ b/platform/mellanox/mlnx-platform-api/sonic_platform/utils.py
@@ -290,6 +290,30 @@ def wait_until(predict, timeout, interval=1, *args, **kwargs):
     return False
 
 
+def wait_until_conditions(conditions, timeout, interval=1):
+    """
+    Wait until all the conditions become true
+    Args:
+        conditions (list): a list of callable which generate True|False
+        timeout (int): wait time in seconds
+        interval (int, optional):  interval to check the predict. Defaults to 1.
+
+    Returns:
+        bool: True if wait success else False
+    """
+    while timeout > 0:
+        pending_conditions = []
+        for condition in conditions:
+            if not condition():
+                pending_conditions.append(condition)
+        if not pending_conditions:
+            return True
+        conditions = pending_conditions
+        time.sleep(interval)
+        timeout -= interval
+    return False
+
+  
 class TimerEvent:
     def __init__(self, interval, cb, repeat):
         self.interval = interval
diff --git a/platform/mellanox/mlnx-platform-api/tests/test_device_data.py b/platform/mellanox/mlnx-platform-api/tests/test_device_data.py
index 866f01c3e..c172b82a3 100644
--- a/platform/mellanox/mlnx-platform-api/tests/test_device_data.py
+++ b/platform/mellanox/mlnx-platform-api/tests/test_device_data.py
@@ -60,6 +60,26 @@ def test_is_independent_mode(self, mock_read):
         mock_read.return_value = {'SAI_INDEPENDENT_MODULE_MODE': '1'}
         assert DeviceDataManager.is_independent_mode()
 
+    @mock.patch('sonic_py_common.device_info.get_path_to_platform_dir', mock.MagicMock(return_value='/tmp'))
+    @mock.patch('sonic_platform.device_data.utils.load_json_file')
+    def test_get_sfp_count(self, mock_load_json):
+        mock_load_json.return_value = {
+            'chassis': {
+                'sfps': [1,2,3]
+            }
+        }
+        assert DeviceDataManager.get_sfp_count() == 3
 
-
-
+    @mock.patch('sonic_platform.device_data.time.sleep', mock.MagicMock())
+    @mock.patch('sonic_platform.device_data.DeviceDataManager.get_sfp_count', mock.MagicMock(return_value=3))
+    @mock.patch('sonic_platform.device_data.utils.read_int_from_file', mock.MagicMock(return_value=1))
+    @mock.patch('sonic_platform.device_data.os.path.exists')
+    @mock.patch('sonic_platform.device_data.DeviceDataManager.is_independent_mode')
+    def test_wait_platform_ready(self, mock_is_indep, mock_exists):
+        mock_exists.return_value = True
+        mock_is_indep.return_value = True
+        assert DeviceDataManager.wait_platform_ready()
+        mock_is_indep.return_value = False
+        assert DeviceDataManager.wait_platform_ready()
+        mock_exists.return_value = False
+        assert not DeviceDataManager.wait_platform_ready()
diff --git a/platform/mellanox/mlnx-platform-api/tests/test_utils.py b/platform/mellanox/mlnx-platform-api/tests/test_utils.py
index 2a186de7e..b6ec67975 100644
--- a/platform/mellanox/mlnx-platform-api/tests/test_utils.py
+++ b/platform/mellanox/mlnx-platform-api/tests/test_utils.py
@@ -195,6 +195,13 @@ def test_read_key_value_file(self):
         mock_os_open = mock.mock_open(read_data='a=b')
         with mock.patch('sonic_platform.utils.open', mock_os_open):
             assert utils.read_key_value_file('some_file', delimeter='=') == {'a':'b'}
+            
+    @mock.patch('sonic_platform.utils.time.sleep', mock.MagicMock())
+    def test_wait_until_conditions(self):
+        conditions = [lambda: True]
+        assert utils.wait_until_conditions(conditions, 1)
+        conditions = [lambda: False]
+        assert not utils.wait_until_conditions(conditions, 1)
 
     def test_timer(self):
         timer = utils.Timer()

From d6f6bbfc5d2bef0734d0a3f237d49c7f7ea17c0c Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Thu, 14 Dec 2023 18:35:44 +0800
Subject: [PATCH 0060/1115] [submodule] Update submodule sonic-gnmi to the
 latest HEAD automatically (#17436)

#### Why I did it
src/sonic-gnmi
```
* 88e82d4 - (HEAD -> master, origin/master, origin/HEAD) Replace PFC_WD_TABLE with PFC_WD (#173) (8 days ago) [Zain Budhwani]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-gnmi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-gnmi b/src/sonic-gnmi
index 07e0b3643..88e82d4bc 160000
--- a/src/sonic-gnmi
+++ b/src/sonic-gnmi
@@ -1 +1 @@
-Subproject commit 07e0b364375c9b867ae1f5d600d0785f30e3f4d3
+Subproject commit 88e82d4bc40658bc100a9a0508b1d1289a924a61

From dac2ba6e1bc1bb620d742fd4f42fef1a82f76df7 Mon Sep 17 00:00:00 2001
From: Ze Gan <ganze718@gmail.com>
Date: Fri, 15 Dec 2023 00:59:16 +0800
Subject: [PATCH 0061/1115] [Azp]: Add dash-api dependencies on building Azp
 ubuntu20.04 (#17507)

Signed-off-by: Ze Gan <ganze718@gmail.com>
---
 .azure-pipelines/azure-pipelines-build-ubuntu-2004.yml | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/.azure-pipelines/azure-pipelines-build-ubuntu-2004.yml b/.azure-pipelines/azure-pipelines-build-ubuntu-2004.yml
index 1ff50719c..e2aa48057 100644
--- a/.azure-pipelines/azure-pipelines-build-ubuntu-2004.yml
+++ b/.azure-pipelines/azure-pipelines-build-ubuntu-2004.yml
@@ -28,7 +28,8 @@ stages:
                          cmake pkg-config python3-pip python cmake libgtest-dev libgmock-dev libyang-dev \
                          debhelper-compat dh-elpa dh-sequence-python3 python3-all \
                          libpython3-all-dev python3-six xmlto unzip rake-compiler gem2deb pkg-php-tools \
-                         ant default-jdk maven-repo-helper libguava-java
+                         ant default-jdk maven-repo-helper libguava-java \
+                         libboost-all-dev libgtest-dev build-essential
         wget http://ftp.us.debian.org/debian/pool/main/libg/libgoogle-gson-java/libgoogle-gson-java_2.8.6-1+deb11u1_all.deb
         sudo dpkg -i libgoogle-gson-java_2.8.6-1+deb11u1_all.deb
         mkdir -p /tmp/artifacts

From f3f507826b4887009d353f96bd5412cbbb2ae0f1 Mon Sep 17 00:00:00 2001
From: Sudharsan Dhamal Gopalarathnam <sudharsand@nvidia.com>
Date: Thu, 14 Dec 2023 09:13:20 -0800
Subject: [PATCH 0062/1115] [FRR] Fix zebra memory leak when bgp fib suppress
 pending is enabled (#17484)

Fix zebra leaking memory with fib suppress enabled. Porting the fix from
FRRouting/frr#14983

While running test_stress_route.py, systems with lower memory started to throw low memory logs. On further investigation, a memory leak has been found in zebra which was fixed in the FRR community.
---
 ...lane_fpm_nl-return-path-leaks-memory.patch | 57 +++++++++++++++++++
 src/sonic-frr/patch/series                    |  1 +
 2 files changed, 58 insertions(+)
 create mode 100644 src/sonic-frr/patch/0033-zebra-The-dplane_fpm_nl-return-path-leaks-memory.patch

diff --git a/src/sonic-frr/patch/0033-zebra-The-dplane_fpm_nl-return-path-leaks-memory.patch b/src/sonic-frr/patch/0033-zebra-The-dplane_fpm_nl-return-path-leaks-memory.patch
new file mode 100644
index 000000000..00e8cc006
--- /dev/null
+++ b/src/sonic-frr/patch/0033-zebra-The-dplane_fpm_nl-return-path-leaks-memory.patch
@@ -0,0 +1,57 @@
+From c13964525dae96299dc54daf635609971576a09e Mon Sep 17 00:00:00 2001
+From: Donald Sharp <sharpd@nvidia.com>
+Date: Mon, 11 Dec 2023 13:41:36 -0500
+Subject: [PATCH] zebra: The dplane_fpm_nl return path leaks memory
+
+The route entry created when using a ctx to pass route
+entry data backup to the master pthread in zebra is
+being leaked.  Prevent this from happening.
+
+Signed-off-by: Donald Sharp <sharpd@nvidia.com>
+
+diff --git a/zebra/rib.h b/zebra/rib.h
+index 016106312..e99eee67c 100644
+--- a/zebra/rib.h
++++ b/zebra/rib.h
+@@ -352,6 +352,8 @@ extern void _route_entry_dump(const char *func, union prefixconstptr pp,
+ 			      union prefixconstptr src_pp,
+ 			      const struct route_entry *re);
+ 
++void zebra_rib_route_entry_free(struct route_entry *re);
++
+ struct route_entry *
+ zebra_rib_route_entry_new(vrf_id_t vrf_id, int type, uint8_t instance,
+ 			  uint32_t flags, uint32_t nhe_id, uint32_t table_id,
+diff --git a/zebra/rt_netlink.c b/zebra/rt_netlink.c
+index 6bdc15592..fc9e8c457 100644
+--- a/zebra/rt_netlink.c
++++ b/zebra/rt_netlink.c
+@@ -1001,6 +1001,8 @@ int netlink_route_change_read_unicast_internal(struct nlmsghdr *h,
+ 						 re, ng, startup, ctx);
+ 			if (ng)
+ 				nexthop_group_delete(&ng);
++			if (ctx)
++				zebra_rib_route_entry_free(re);
+ 		} else {
+ 			/*
+ 			 * I really don't see how this is possible
+diff --git a/zebra/zebra_rib.c b/zebra/zebra_rib.c
+index f2f20bcf7..1cefdfae7 100644
+--- a/zebra/zebra_rib.c
++++ b/zebra/zebra_rib.c
+@@ -4136,6 +4136,12 @@ struct route_entry *zebra_rib_route_entry_new(vrf_id_t vrf_id, int type,
+ 
+ 	return re;
+ }
++
++void zebra_rib_route_entry_free(struct route_entry *re)
++{
++	XFREE(MTYPE_RE, re);
++}
++
+ /*
+  * Internal route-add implementation; there are a couple of different public
+  * signatures. Callers in this path are responsible for the memory they
+-- 
+2.17.1
+
diff --git a/src/sonic-frr/patch/series b/src/sonic-frr/patch/series
index c87c5e61f..bcb290088 100644
--- a/src/sonic-frr/patch/series
+++ b/src/sonic-frr/patch/series
@@ -32,3 +32,4 @@ cross-compile-changes.patch
 0030-bgpd-Treat-EOR-as-withdrawn-to-avoid-unwanted-handli.patch
 0031-bgpd-Ignore-handling-NLRIs-if-we-received-MP_UNREACH.patch
 0032-zebra-Fix-fpm-multipath-encap-addition.patch
+0033-zebra-The-dplane_fpm_nl-return-path-leaks-memory.patch

From be99434991b0bf7cf90e8fa423572540d7f0a63d Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Fri, 15 Dec 2023 06:32:51 +0800
Subject: [PATCH 0063/1115] [submodule] Update submodule sonic-swss to the
 latest HEAD automatically (#17501)

#### Why I did it
src/sonic-swss
```
* ff524e6d - (HEAD -> master, origin/master, origin/HEAD) [dash] add a retry for an ACL rule creation if a tag is not created yet (#2972) (7 hours ago) [Yakiv Huryk]
* 620db3da - [ci] Allow partially success build artifact in PR checker pipeline. #2986 (3 days ago) [Liu Shilong]
* d357e6f1 - [copporch] Add safeguard during policer attribute update (#2977) (4 days ago) [Vivek]
* cb460394 - [fpmsyncd][WR] Relax the static schema constraint for ROUTE_TABLE (#2981) (5 days ago) [Vivek]
* a1ce21f6 - Change base directory referenced in coverage.xml (#2976) (6 days ago) [Lawrence Lee]
* 920959cf - [Dash] [UT] Add ZMQ test case for dash (#2967) (6 days ago) [Hua Liu]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-swss | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-swss b/src/sonic-swss
index 6026b6d63..ff524e6dc 160000
--- a/src/sonic-swss
+++ b/src/sonic-swss
@@ -1 +1 @@
-Subproject commit 6026b6d63b686f5f7cef1522715141b4c725cfba
+Subproject commit ff524e6dc828a8dca2f4bf6fccabc819e77710f0

From 73f6e5895a069b81eb1b9b8e5b34453c19e8ab5c Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Fri, 15 Dec 2023 15:31:28 +0800
Subject: [PATCH 0064/1115] [submodule] Update submodule sonic-platform-daemons
 to the latest HEAD automatically (#17499)

---
 src/sonic-platform-daemons | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-platform-daemons b/src/sonic-platform-daemons
index 502c0b662..1c9b01d12 160000
--- a/src/sonic-platform-daemons
+++ b/src/sonic-platform-daemons
@@ -1 +1 @@
-Subproject commit 502c0b6622008363cb1ed6d1b7c85b4093997093
+Subproject commit 1c9b01d12393f25db7b258f58d10ea77c3f5b682

From 2532661cd9bce6a3205c4b5174a17f4f1e48572f Mon Sep 17 00:00:00 2001
From: Liu Shilong <shilongliu@microsoft.com>
Date: Fri, 15 Dec 2023 16:25:26 +0800
Subject: [PATCH 0065/1115] [ci] Enable sonic-restapi build in PR validation.
 (#17397)

Why I did it
Enable sonic-restapi build in two platform to avoid build break on restapi target.

Work item tracking
Microsoft ADO (number only): 26048426
How I did it
How to verify it
---
 azure-pipelines.yml | 2 ++
 rules/config        | 2 +-
 2 files changed, 3 insertions(+), 1 deletion(-)

diff --git a/azure-pipelines.yml b/azure-pipelines.yml
index 43ac0cb02..ca780398c 100644
--- a/azure-pipelines.yml
+++ b/azure-pipelines.yml
@@ -65,6 +65,7 @@ stages:
       - name: broadcom
         variables:
           swi_image: yes
+          INCLUDE_RESTAPI: y
       - name: mellanox
         variables:
           dbg_image: yes
@@ -79,6 +80,7 @@ stages:
         timeoutInMinutes: 1200
         variables:
           PLATFORM_ARCH: armhf
+          INCLUDE_RESTAPI: y
 
 - stage: Test
   dependsOn: BuildVS
diff --git a/rules/config b/rules/config
index 209129d03..70110469e 100644
--- a/rules/config
+++ b/rules/config
@@ -144,7 +144,7 @@ INCLUDE_MGMT_FRAMEWORK = y
 ENABLE_HOST_SERVICE_ON_START = y
 
 # INCLUDE_RESTAPI - build docker-sonic-restapi for configuring the switch using REST APIs
-INCLUDE_RESTAPI = n
+INCLUDE_RESTAPI ?= n
 
 # INCLUDE_NAT - build docker-nat for nat support
 INCLUDE_NAT = y

From 979516633d97f18a781f222b2c28e1b5df674d0c Mon Sep 17 00:00:00 2001
From: Liu Shilong <shilongliu@microsoft.com>
Date: Fri, 15 Dec 2023 16:52:51 +0800
Subject: [PATCH 0066/1115] [ci] Support pensando platform build in pipeline.
 (#17512)

Why I did it
Update pipeline file to support pensando's build.

Work item tracking
Microsoft ADO (number only): 26087700
How I did it
How to verify it
---
 .azure-pipelines/azure-pipelines-build.yml | 9 ++++++++-
 1 file changed, 8 insertions(+), 1 deletion(-)

diff --git a/.azure-pipelines/azure-pipelines-build.yml b/.azure-pipelines/azure-pipelines-build.yml
index 961e72a3e..d7f87456f 100644
--- a/.azure-pipelines/azure-pipelines-build.yml
+++ b/.azure-pipelines/azure-pipelines-build.yml
@@ -114,12 +114,19 @@ jobs:
             docker_syncd_rpc_image: yes
             platform_rpc: nephos
 
+        - name: pensando
+          pool: sonicbld-arm64
+          variables:
+            PLATFORM_ARCH: arm64
+
     buildSteps:
       - template: .azure-pipelines/template-skipvstest.yml@buildimage
       - template: .azure-pipelines/template-daemon.yml@buildimage
       - bash: |
           set -ex
-          if [ $(GROUP_NAME) == vs ]; then
+          if [ $(GROUP_NAME) == pensando ]; then
+            make $BUILD_OPTIONS target/sonic-pensando.tar
+          elif [ $(GROUP_NAME) == vs ]; then
             if [ $(dbg_image) == yes ]; then
               make $BUILD_OPTIONS INSTALL_DEBUG_TOOLS=y target/sonic-vs.img.gz
               mv target/sonic-vs.img.gz target/sonic-vs-dbg.img.gz

From 69ad1ed41a8600629453644e3fa64a2be3cef584 Mon Sep 17 00:00:00 2001
From: spilkey-cisco <110940806+spilkey-cisco@users.noreply.github.com>
Date: Fri, 15 Dec 2023 15:33:20 -0800
Subject: [PATCH 0067/1115] Fix system-health hardware_checker to consume fan
 tolerance details (#16689)

Why I did it

Fan tolerance checking is done through new APIs, is_under_speed and is_over_speed, which populate corresponding fields into the database. speed_tolerance is no longer used and was removed, but system-health was not updated and indicates failures:

ADO: 25279165

root@sonic/# show system-health summary
System status summary

  System status LED  red_blink
  Services:
    Status: OK
  Hardware:
    Status: Not OK
    Reasons: Failed to get speed tolerance for fantray5.fan1
	     Failed to get speed tolerance for fantray5.fan0
	     Failed to get speed tolerance for fantray4.fan1
	     Failed to get speed tolerance for fantray4.fan0
	     Failed to get speed tolerance for fantray3.fan1
	     Failed to get speed tolerance for fantray3.fan0
	     Failed to get speed tolerance for fantray2.fan1
	     Failed to get speed tolerance for fantray2.fan0
	     Failed to get speed tolerance for fantray1.fan1
	     Failed to get speed tolerance for fantray1.fan0
	     Failed to get speed tolerance for fantray0.fan1
	     Failed to get speed tolerance for fantray0.fan0
	     Failed to get speed tolerance for PSU1.fan0
	     Failed to get speed tolerance for PSU0.fan0

How I did it
Updated hardware_checker.py in system-health to consume new is_under_speed and is_over_speed database entries instead of speed_tolerance and hard-coded calculations.

How to verify it
root@sonic:/# show system-health summary
System status summary

  System status LED  green
  Services:
    Status: OK
  Hardware:
    Status: OK
---
 .../health_checker/hardware_checker.py        | 28 ++++++++++---------
 src/system-health/tests/test_system_health.py | 28 +++++++++++++++----
 2 files changed, 37 insertions(+), 19 deletions(-)

diff --git a/src/system-health/health_checker/hardware_checker.py b/src/system-health/health_checker/hardware_checker.py
index 8f7a11f55..113fd8866 100644
--- a/src/system-health/health_checker/hardware_checker.py
+++ b/src/system-health/health_checker/hardware_checker.py
@@ -102,37 +102,39 @@ def _check_fan_status(self, config):
             if not self._ignore_check(config.ignore_devices, 'fan', name, 'speed'):
                 speed = data_dict.get('speed', None)
                 speed_target = data_dict.get('speed_target', None)
-                speed_tolerance = data_dict.get('speed_tolerance', None)
+                is_under_speed = data_dict.get('is_under_speed', None)
+                is_over_speed = data_dict.get('is_over_speed', None)
                 if not speed:
                     self.set_object_not_ok('Fan', name, 'Failed to get actual speed data for {}'.format(name))
                     continue
                 elif not speed_target:
                     self.set_object_not_ok('Fan', name, 'Failed to get target speed date for {}'.format(name))
                     continue
-                elif not speed_tolerance:
-                    self.set_object_not_ok('Fan', name, 'Failed to get speed tolerance for {}'.format(name))
+                elif is_under_speed is None:
+                    self.set_object_not_ok('Fan', name, 'Failed to get under speed threshold check for {}'.format(name))
+                    continue
+                elif is_over_speed is None:
+                    self.set_object_not_ok('Fan', name, 'Failed to get over speed threshold check for {}'.format(name))
                     continue
                 else:
                     try:
                         speed = float(speed)
                         speed_target = float(speed_target)
-                        speed_tolerance = float(speed_tolerance)
-                        speed_min_th = speed_target * (1 - float(speed_tolerance) / 100)
-                        speed_max_th = speed_target * (1 + float(speed_tolerance) / 100)
-                        if speed < speed_min_th or speed > speed_max_th:
+                        if 'true' in (is_under_speed.lower(), is_over_speed.lower()):
                             self.set_object_not_ok('Fan', name,
-                                                   '{} speed is out of range, speed={}, range=[{},{}]'.format(name,
-                                                                                                              speed,
-                                                                                                              speed_min_th,
-                                                                                                              speed_max_th))
+                                                   '{} speed is out of range, speed={}, target={}'.format(
+                                                       name,
+                                                       speed,
+                                                       speed_target))
                             continue
                     except ValueError:
                         self.set_object_not_ok('Fan', name,
-                                               'Invalid fan speed data for {}, speed={}, target={}, tolerance={}'.format(
+                                               'Invalid fan speed data for {}, speed={}, target={}, is_under_speed={}, is_over_speed={}'.format(
                                                    name,
                                                    speed,
                                                    speed_target,
-                                                   speed_tolerance))
+                                                   is_under_speed,
+                                                   is_over_speed))
                         continue
 
             if not self._ignore_check(config.ignore_devices, 'fan', name, 'direction'):
diff --git a/src/system-health/tests/test_system_health.py b/src/system-health/tests/test_system_health.py
index c2d782230..67f819ecc 100644
--- a/src/system-health/tests/test_system_health.py
+++ b/src/system-health/tests/test_system_health.py
@@ -298,7 +298,8 @@ def test_hardware_checker():
             'status': 'True',
             'speed': '60',
             'speed_target': '60',
-            'speed_tolerance': '20',
+            'is_under_speed': 'False',
+            'is_over_speed': 'False',
             'direction': 'intake'
         },
         'FAN_INFO|fan2': {
@@ -306,28 +307,40 @@ def test_hardware_checker():
             'status': 'True',
             'speed': '60',
             'speed_target': '60',
-            'speed_tolerance': '20'
+            'is_under_speed': 'False',
+            'is_over_speed': 'False',
         },
         'FAN_INFO|fan3': {
             'presence': 'True',
             'status': 'False',
             'speed': '60',
             'speed_target': '60',
-            'speed_tolerance': '20'
+            'is_under_speed': 'False',
+            'is_over_speed': 'False',
         },
         'FAN_INFO|fan4': {
             'presence': 'True',
             'status': 'True',
             'speed': '20',
             'speed_target': '60',
-            'speed_tolerance': '20'
+            'is_under_speed': 'True',
+            'is_over_speed': 'False',
         },
         'FAN_INFO|fan5': {
+            'presence': 'True',
+            'status': 'True',
+            'speed': '90',
+            'speed_target': '60',
+            'is_under_speed': 'False',
+            'is_over_speed': 'True',
+        },
+        'FAN_INFO|fan6': {
             'presence': 'True',
             'status': 'True',
             'speed': '60',
             'speed_target': '60',
-            'speed_tolerance': '20',
+            'is_under_speed': 'False',
+            'is_over_speed': 'False',
             'direction': 'exhaust'
         }
     })
@@ -426,7 +439,10 @@ def test_hardware_checker():
 
     assert 'fan5' in checker._info
     assert checker._info['fan5'][HealthChecker.INFO_FIELD_OBJECT_STATUS] == HealthChecker.STATUS_NOT_OK
-    assert checker._info['fan5'][HealthChecker.INFO_FIELD_OBJECT_MSG] == 'fan5 direction exhaust is not aligned with fan1 direction intake'
+
+    assert 'fan6' in checker._info
+    assert checker._info['fan6'][HealthChecker.INFO_FIELD_OBJECT_STATUS] == HealthChecker.STATUS_NOT_OK
+    assert checker._info['fan6'][HealthChecker.INFO_FIELD_OBJECT_MSG] == 'fan6 direction exhaust is not aligned with fan1 direction intake'
 
     assert 'PSU 1' in checker._info
     assert checker._info['PSU 1'][HealthChecker.INFO_FIELD_OBJECT_STATUS] == HealthChecker.STATUS_OK

From 728df4e89d8d58bb017041bfbf62eb01fe565be9 Mon Sep 17 00:00:00 2001
From: Yaqiang Zhu <zyq1512099831@gmail.com>
Date: Fri, 15 Dec 2023 18:47:40 -0500
Subject: [PATCH 0068/1115] [dhcp_relay] Optimize j2 file in dhcp_relay
 container (#17506)

---
 dockers/docker-dhcp-relay/dhcp-relay.programs.j2 | 6 ++----
 1 file changed, 2 insertions(+), 4 deletions(-)

diff --git a/dockers/docker-dhcp-relay/dhcp-relay.programs.j2 b/dockers/docker-dhcp-relay/dhcp-relay.programs.j2
index 94f6adf76..087a734d6 100644
--- a/dockers/docker-dhcp-relay/dhcp-relay.programs.j2
+++ b/dockers/docker-dhcp-relay/dhcp-relay.programs.j2
@@ -1,9 +1,7 @@
 [group:dhcp-relay]
-programs=dhcprelayd,
+programs=dhcprelayd
 {%- set relay_for_ipv6 = { 'flag': False } %}
-{%- set add_preceding_comma = { 'flag': False } %}
-{% if dhcp_server_ipv4_enabled %}
-{%- endif %}
+{%- set add_preceding_comma = { 'flag': True } %}
 {% for vlan_name in VLAN_INTERFACE %}
 {% if DHCP_RELAY and vlan_name in DHCP_RELAY and DHCP_RELAY[vlan_name]['dhcpv6_servers']|length > 0 %}
 {% set _dummy = relay_for_ipv6.update({'flag': True})  %}

From ad90ad9fcd72df156ff8fc51963484d6a8e64f9c Mon Sep 17 00:00:00 2001
From: jingwenxie <jingwenxie@microsoft.com>
Date: Sat, 16 Dec 2023 09:04:55 +0800
Subject: [PATCH 0069/1115] Update TELEMETRY_CLIENT YANG model (#16861)

### Why I did it
Github issue: https://github.com/sonic-net/sonic-buildimage/issues/16356. The YANG definition breaks GCU feature.

We can either update sonic_yang and GCU's search algorithm to enable the same key count case or simply update YANG model to solve the issue.

The pros for update YANG model are it could solve the issue directly and we don't need to handle the complicate search algorithm in sonic_yang and GCU. This is the only YANG model that has this issue.

### How I did it
Combine two list into one. The previous YANG validation unit tests are still applicable.
#### How to verify it
Unit test and E2E test
---
 src/sonic-yang-models/doc/Configuration.md    | 26 ++++++++
 .../tests/files/sample_config_db.json         |  4 +-
 .../tests_config/telemetry_client.json        | 62 +++++++++----------
 .../yang-models/sonic-telemetry_client.yang   | 23 +++----
 4 files changed, 67 insertions(+), 48 deletions(-)

diff --git a/src/sonic-yang-models/doc/Configuration.md b/src/sonic-yang-models/doc/Configuration.md
index 5ee894f7a..1b78d7eb0 100644
--- a/src/sonic-yang-models/doc/Configuration.md
+++ b/src/sonic-yang-models/doc/Configuration.md
@@ -70,6 +70,7 @@ Table of Contents
          * [TC to Priority group map](#tc-to-priority-group-map)
          * [TC to Queue map](#tc-to-queue-map)
          * [Telemetry](#telemetry)
+         * [Telemetry client](#telemetry-client)
          * [Tunnel](#tunnel)
          * [Versions](#versions)
          * [VLAN](#vlan)
@@ -2221,6 +2222,31 @@ and is listed in this table.
 }
 ```
 
+### Telemetry client
+
+```
+{
+    "TELEMETRY_CLIENT": {
+        "Global": {
+            "encoding": "JSON_IETF",
+            "retry_interval": "30",
+            "src_ip": "30.57.185.38",
+            "unidirectional": "true"
+        },
+        "DestinationGroup|HS": {
+            "dst_addr": "30.57.186.214:8081,30.57.185.39:8081"
+        },
+        "Subscription|HS_RDMA": {
+            "dst_group": "HS",
+            "path_target": "COUNTERS_DB",
+            "paths": "COUNTERS/Ethernet*,COUNTERS_PORT_NAME_MAP",
+            "report_interval": "5000",
+            "report_type": "periodic"
+        }
+    }
+}
+```
+
 ### Tunnel
 
 This table configures the MUX tunnel for Dual-ToR setup
diff --git a/src/sonic-yang-models/tests/files/sample_config_db.json b/src/sonic-yang-models/tests/files/sample_config_db.json
index b0e3f5f58..30b6de917 100644
--- a/src/sonic-yang-models/tests/files/sample_config_db.json
+++ b/src/sonic-yang-models/tests/files/sample_config_db.json
@@ -1235,10 +1235,10 @@
                 "src_ip": "30.57.185.38",
                 "unidirectional": "true"
             },
-            "DestinationGroup_HS": {
+            "DestinationGroup|HS": {
                 "dst_addr": "30.57.186.214:8081,30.57.185.39:8081"
             },
-            "Subscription_HS_RDMA": {
+            "Subscription|HS_RDMA": {
                 "dst_group": "HS",
                 "path_target": "COUNTERS_DB",
                 "paths": "COUNTERS/Ethernet*,COUNTERS_PORT_NAME_MAP",
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/telemetry_client.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/telemetry_client.json
index 5286bcba8..91de532c8 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/telemetry_client.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/telemetry_client.json
@@ -8,15 +8,15 @@
           "src_ip": "30.57.185.38",
           "unidirectional": "true"
         },
-        "TELEMETRY_CLIENT_DS_LIST": [
+        "TELEMETRY_CLIENT_LIST": [
           {
-            "prefix": "DestinationGroup_HS",
+            "prefix": "DestinationGroup",
+            "name": "HS",
             "dst_addr": "30.57.186.214:8081,30.57.185.39:8081"
-          }
-        ],
-        "TELEMETRY_CLIENT_SUB_LIST": [
+          },
           {
-            "prefix": "Subscription_HS_RDMA",
+            "prefix": "Subscription",
+            "name": "HS_RDMA",
             "dst_group": "HS",
             "path_target": "COUNTERS_DB",
             "paths": "COUNTERS/Ethernet*,COUNTERS_PORT_NAME_MAP",
@@ -36,15 +36,15 @@
           "src_ip": "30.57.185.38",
           "unidirectional": "true"
         },
-        "TELEMETRY_CLIENT_DS_LIST": [
+        "TELEMETRY_CLIENT_LIST": [
           {
-            "prefix": "DestinationGroup_HS",
+            "prefix": "DestinationGroup",
+            "name": "HS",
             "dst_addr": "30.57.186.214:8081,30.57.185.39:8081"
-          }
-        ],
-        "TELEMETRY_CLIENT_SUB_LIST": [
+          },
           {
-            "prefix": "Subscription_HS_RDMA",
+            "prefix": "Subscription",
+            "name": "HS_RDMA",
             "dst_group": "FS",
             "path_target": "COUNTERS_DB",
             "paths": "COUNTERS/Ethernet*,COUNTERS_PORT_NAME_MAP",
@@ -64,15 +64,15 @@
           "src_ip": "30.57.185.388",
           "unidirectional": "true"
         },
-        "TELEMETRY_CLIENT_DS_LIST": [
+        "TELEMETRY_CLIENT_LIST": [
           {
-            "prefix": "DestinationGroup_HS",
+            "prefix": "DestinationGroup",
+            "name": "HS",
             "dst_addr": "30.57.186.214:8081,30.57.185.39:8081"
-          }
-        ],
-        "TELEMETRY_CLIENT_SUB_LIST": [
+          },
           {
-            "prefix": "Subscription_HS_RDMA",
+            "prefix": "Subscription",
+            "name": "HS_RDMA",
             "dst_group": "HS",
             "path_target": "COUNTERS_DB",
             "paths": "COUNTERS/Ethernet*,COUNTERS_PORT_NAME_MAP",
@@ -92,15 +92,15 @@
           "src_ip": "30.57.185.38",
           "unidirectional": "true"
         },
-        "TELEMETRY_CLIENT_DS_LIST": [
+        "TELEMETRY_CLIENT_LIST": [
           {
-            "prefix": "DestinationGroup_HS",
+            "prefix": "DestinationGroup",
+            "name": "HS",
             "dst_addr": "30.57.186.214:8081,30.57.185.39:8081"
-          }
-        ],
-        "TELEMETRY_CLIENT_SUB_LIST": [
+          },
           {
-            "prefix": "Subscription_HS_RDMA",
+            "prefix": "Subscription",
+            "name": "HS_RDMA",
             "dst_group": "HS",
             "path_target": "COUNTERS_DB",
             "paths": "COUNTERS/Ethernet*,COUNTERS_PORT_NAME_MAP",
@@ -120,15 +120,15 @@
           "src_ip": "30.57.185.38",
           "unidirectional": "true"
         },
-        "TELEMETRY_CLIENT_DS_LIST": [
+        "TELEMETRY_CLIENT_LIST": [
           {
-            "prefix": "DestinationGroup_HS",
+            "prefix": "DestinationGroup",
+            "name": "HS",
             "dst_addr": "30.57.186.214:80819,30.57.185.39:8081"
-          }
-        ],
-        "TELEMETRY_CLIENT_SUB_LIST": [
+          },
           {
-            "prefix": "Subscription_HS_RDMA",
+            "prefix": "Subscription",
+            "name": "HS_RDMA",
             "dst_group": "HS",
             "path_target": "COUNTERS_DB",
             "paths": "COUNTERS/Ethernet*,COUNTERS_PORT_NAME_MAP",
@@ -139,4 +139,4 @@
       }
     }
   }
-}
\ No newline at end of file
+}
diff --git a/src/sonic-yang-models/yang-models/sonic-telemetry_client.yang b/src/sonic-yang-models/yang-models/sonic-telemetry_client.yang
index 7b6b23103..7c4b7b37b 100644
--- a/src/sonic-yang-models/yang-models/sonic-telemetry_client.yang
+++ b/src/sonic-yang-models/yang-models/sonic-telemetry_client.yang
@@ -86,33 +86,26 @@ module sonic-telemetry_client {
                 }
             }
 
-            list TELEMETRY_CLIENT_DS_LIST {
+            list TELEMETRY_CLIENT_LIST {
                 ordered-by user;
-                key "prefix";
+                key "prefix name";
 
                 leaf prefix {
                     type string {
-                        pattern "DestinationGroup_" + ".*";
+                        pattern 'Subscription|DestinationGroup';
                     }
                 }
 
-                leaf dst_addr {
-                    type ipv4-port;
+                leaf name {
+                    type string;
                 }
-            }
-
-            list TELEMETRY_CLIENT_SUB_LIST {
-                ordered-by user;
-                key "prefix";
 
-                leaf prefix {
-                    type string {
-                        pattern "Subscription_" + ".*";
-                    }
+                leaf dst_addr {
+                    type ipv4-port;
                 }
 
                 leaf dst_group {
-                    must "(contains(../../TELEMETRY_CLIENT_DS_LIST/prefix, current()))";
+                    must "(contains(../../TELEMETRY_CLIENT_LIST/name, current()))";
                     type string;
                 }
 

From ff1c8e0c245ac667046c7c5880bac82d08f9b32b Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sat, 16 Dec 2023 15:30:37 +0800
Subject: [PATCH 0070/1115] [submodule] Update submodule sonic-sairedis to the
 latest HEAD automatically (#17534)

---
 src/sonic-sairedis | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-sairedis b/src/sonic-sairedis
index 641b7304f..92c050ab8 160000
--- a/src/sonic-sairedis
+++ b/src/sonic-sairedis
@@ -1 +1 @@
-Subproject commit 641b7304f2a10762a119b4c56c1621b4a88616b9
+Subproject commit 92c050ab86aac8b95ab83dc6aa06f2886038540e

From 9664c201f610572560f0eebab5d0830f88288a3a Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sat, 16 Dec 2023 15:34:43 +0800
Subject: [PATCH 0071/1115] [submodule] Update submodule sonic-platform-common
 to the latest HEAD automatically (#17532)

---
 src/sonic-platform-common | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-platform-common b/src/sonic-platform-common
index 427217bd4..0f72932a4 160000
--- a/src/sonic-platform-common
+++ b/src/sonic-platform-common
@@ -1 +1 @@
-Subproject commit 427217bd4c869915f43f4e23f877aeb09db6bc3a
+Subproject commit 0f72932a4cbfdf16cccc75e72304449b4df67d16

From e0dc6def82e03e85d0094693d84c35468073f2ba Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sat, 16 Dec 2023 15:49:20 +0800
Subject: [PATCH 0072/1115] [submodule] Update submodule sonic-platform-daemons
 to the latest HEAD automatically (#17533)

---
 src/sonic-platform-daemons | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-platform-daemons b/src/sonic-platform-daemons
index 1c9b01d12..b2b890540 160000
--- a/src/sonic-platform-daemons
+++ b/src/sonic-platform-daemons
@@ -1 +1 @@
-Subproject commit 1c9b01d12393f25db7b258f58d10ea77c3f5b682
+Subproject commit b2b890540d291d76b8763c1f6c22b3899385ff76

From 37a9c25cfb625df84a386f842c565e21ca2b79fe Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sat, 16 Dec 2023 15:51:42 +0800
Subject: [PATCH 0073/1115] [submodule] Update submodule sonic-swss to the
 latest HEAD automatically (#17535)

---
 src/sonic-swss | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-swss b/src/sonic-swss
index ff524e6dc..194daa04e 160000
--- a/src/sonic-swss
+++ b/src/sonic-swss
@@ -1 +1 @@
-Subproject commit ff524e6dc828a8dca2f4bf6fccabc819e77710f0
+Subproject commit 194daa04e05696afdb1f44765a57f6803ddc1c4c

From d8a1ffbaced4321e0dc7842af712b1e4083192f4 Mon Sep 17 00:00:00 2001
From: Junchao-Mellanox <57339448+Junchao-Mellanox@users.noreply.github.com>
Date: Sun, 17 Dec 2023 14:02:47 +0800
Subject: [PATCH 0074/1115] [Mellanox] implement sfp.reset for CMIS management
 (#16862)

- Why I did it
For CMIS host management module, we need a different implementation for sfp.reset. This PR is to implement it

- How I did it
For SW control modules, do reset from hw_reset
For FW control modules, do reset as the original way

- How to verify it
Manual test
sonic-mgmt platform test
---
 .../mlnx-platform-api/sonic_platform/sfp.py   | 72 +++++++++++++++----
 .../mlnx-platform-api/sonic_platform/utils.py |  6 +-
 .../mlnx-platform-api/tests/test_sfp.py       | 21 ++++--
 3 files changed, 77 insertions(+), 22 deletions(-)

diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py b/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py
index c5bcfddaf..d03c0fe10 100644
--- a/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py
+++ b/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py
@@ -26,6 +26,7 @@
     import ctypes
     import subprocess
     import os
+    import threading
     from sonic_py_common.logger import Logger
     from sonic_py_common.general import check_output_pipe
     from . import utils
@@ -219,6 +220,9 @@ def __exit__(self, exc_type, exc_val, exc_tb):
         deinitialize_sdk_handle(self.sdk_handle)
 
 class NvidiaSFPCommon(SfpOptoeBase):
+    sfp_index_to_logical_port_dict = {}
+    sfp_index_to_logical_lock = threading.Lock()
+    
     def __init__(self, sfp_index):
         super(NvidiaSFPCommon, self).__init__()
         self.index = sfp_index + 1
@@ -247,7 +251,31 @@ def _get_module_info(self, sdk_index):
         error_type = utils.read_int_from_file(status_error_file_path)
 
         return oper_state, error_type
-
+    
+    @classmethod
+    def get_sfp_index_to_logical_port(cls, force=False):
+        if not cls.sfp_index_to_logical_port_dict or force:
+            config_db = utils.DbUtils.get_db_instance('CONFIG_DB')
+            port_data = config_db.get_table('PORT')
+            for key, data in port_data.items():
+                if data['index'] not in cls.sfp_index_to_logical_port_dict:
+                    cls.sfp_index_to_logical_port_dict[int(data['index']) - 1] = key
+    
+    @classmethod
+    def get_logical_port_by_sfp_index(cls, sfp_index):
+        with cls.sfp_index_to_logical_lock:
+            cls.get_sfp_index_to_logical_port()
+            logical_port_name = cls.sfp_index_to_logical_port_dict.get(sfp_index)
+            if not logical_port_name:
+                cls.get_sfp_index_to_logical_port(force=True)
+            else:
+                config_db = utils.DbUtils.get_db_instance('CONFIG_DB')
+                current_index = int(config_db.get('CONFIG_DB', f'PORT|{logical_port_name}', 'index'))
+                if current_index != sfp_index:
+                    cls.get_sfp_index_to_logical_port(force=True)
+                    logical_port_name = cls.sfp_index_to_logical_port_dict.get(sfp_index)
+            return logical_port_name
+  
 
 class SFP(NvidiaSFPCommon):
     """Platform-specific SFP class"""
@@ -299,6 +327,17 @@ def get_presence(self):
         Returns:
             bool: True if device is present, False if not
         """
+        if DeviceDataManager.is_independent_mode():
+            if utils.read_int_from_file(f'/sys/module/sx_core/asic0/module{self.sdk_index}/control') != 0:
+                if not utils.read_int_from_file(f'/sys/module/sx_core/asic0/module{self.sdk_index}/hw_present'):
+                    return False
+                if not utils.read_int_from_file(f'/sys/module/sx_core/asic0/module{self.sdk_index}/power_good'):
+                    return False
+                if not utils.read_int_from_file(f'/sys/module/sx_core/asic0/module{self.sdk_index}/power_on'):
+                    return False
+                if utils.read_int_from_file(f'/sys/module/sx_core/asic0/module{self.sdk_index}/hw_reset') == 1:
+                    return False
+                
         eeprom_raw = self._read_eeprom(0, 1, log_on_error=False)
         return eeprom_raw is not None
 
@@ -455,8 +494,17 @@ def reset(self):
 
         refer plugins/sfpreset.py
         """
-        file_path = SFP_SDK_MODULE_SYSFS_ROOT_TEMPLATE.format(self.sdk_index) + SFP_SYSFS_RESET
-        return utils.write_file(file_path, '1')
+        try:
+            if not self.is_sw_control():
+                file_path = SFP_SDK_MODULE_SYSFS_ROOT_TEMPLATE.format(self.sdk_index) + SFP_SYSFS_RESET
+                return utils.write_file(file_path, '1')
+            else:
+                file_path = SFP_SDK_MODULE_SYSFS_ROOT_TEMPLATE.format(self.sdk_index) + SFP_SYSFS_HWRESET
+                return utils.write_file(file_path, '0') and utils.write_file(file_path, '1')
+        except Exception as e:
+            print(f'Failed to reset module - {e}')
+            logger.log_error(f'Failed to reset module - {e}')
+            return False
 
 
     @classmethod
@@ -918,15 +966,15 @@ def is_sw_control(self):
             return False
 
         db = utils.DbUtils.get_db_instance('STATE_DB')
-        control_type = db.get('STATE_DB', f'TRANSCEIVER_MODULES_MGMT|{self.sdk_index}', 'control_type')
-        control_file_value = utils.read_int_from_file(f'/sys/module/sx_core/asic0/module{self.sdk_index}/control')
-
-        if control_type == 'SW_CONTROL' and control_file_value == 1:
-            return True
-        elif control_type == 'FW_CONTROL' and control_file_value == 0:
-            return False
-        else:
-            raise Exception(f'Module {self.sdk_index} is in initialization, please retry later')
+        logical_port = NvidiaSFPCommon.get_logical_port_by_sfp_index(self.sdk_index)
+        if not logical_port:
+            raise Exception(f'Module {self.sdk_index} is not present or in initialization')
+        
+        initialized = db.exists('STATE_DB', f'TRANSCEIVER_STATUS|{logical_port}')
+        if not initialized:
+            raise Exception(f'Module {self.sdk_index} is not present or in initialization')
+        
+        return utils.read_int_from_file(f'/sys/module/sx_core/asic0/module{self.sdk_index}/control') == 1
 
 
 class RJ45Port(NvidiaSFPCommon):
diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/utils.py b/platform/mellanox/mlnx-platform-api/sonic_platform/utils.py
index 1135903c2..a7354ac7b 100644
--- a/platform/mellanox/mlnx-platform-api/sonic_platform/utils.py
+++ b/platform/mellanox/mlnx-platform-api/sonic_platform/utils.py
@@ -381,9 +381,9 @@ def get_db_instance(cls, db_name, **kargs):
                         cls.db_instances.data = {}
 
             if db_name not in cls.db_instances.data:
-                from swsscommon.swsscommon import SonicV2Connector
-                db = SonicV2Connector(use_unix_socket_path=True)
-                db.connect(db_name)
+                from swsscommon.swsscommon import ConfigDBConnector
+                db = ConfigDBConnector(use_unix_socket_path=True)
+                db.db_connect(db_name)
                 cls.db_instances.data[db_name] = db
             return cls.db_instances.data[db_name]
         except Exception as e:
diff --git a/platform/mellanox/mlnx-platform-api/tests/test_sfp.py b/platform/mellanox/mlnx-platform-api/tests/test_sfp.py
index dccc727bf..d273e9bce 100644
--- a/platform/mellanox/mlnx-platform-api/tests/test_sfp.py
+++ b/platform/mellanox/mlnx-platform-api/tests/test_sfp.py
@@ -266,9 +266,14 @@ def test_dummy_apis(self, mock_get_xcvr_api):
     @mock.patch('sonic_platform.utils.write_file')
     def test_reset(self, mock_write):
         sfp = SFP(0)
+        sfp.is_sw_control = mock.MagicMock(return_value=False)
         mock_write.return_value = True
         assert sfp.reset()
         mock_write.assert_called_with('/sys/module/sx_core/asic0/module0/reset', '1')
+        sfp.is_sw_control.return_value = True
+        assert sfp.reset()
+        sfp.is_sw_control.side_effect = Exception('')
+        assert not sfp.reset()
 
     @mock.patch('sonic_platform.sfp.SFP.read_eeprom')
     def test_get_xcvr_api(self, mock_read):
@@ -332,30 +337,32 @@ def test_get_temperature_threshold(self):
         assert sfp.get_temperature_warning_threashold() == 75.0
         assert sfp.get_temperature_critical_threashold() == 85.0
 
+    @mock.patch('sonic_platform.sfp.NvidiaSFPCommon.get_logical_port_by_sfp_index')
     @mock.patch('sonic_platform.utils.read_int_from_file')
     @mock.patch('sonic_platform.device_data.DeviceDataManager.is_independent_mode')
     @mock.patch('sonic_platform.utils.DbUtils.get_db_instance')
-    def test_is_sw_control(self, mock_get_db, mock_mode, mock_read):
+    def test_is_sw_control(self, mock_get_db, mock_mode, mock_read, mock_get_logical):
         sfp = SFP(0)
         mock_mode.return_value = False
         assert not sfp.is_sw_control()
         mock_mode.return_value = True
+        
+        mock_get_logical.return_value = None
+        with pytest.raises(Exception):
+            sfp.is_sw_control()
 
+        mock_get_logical.return_value = 'Ethernet0'
         mock_db = mock.MagicMock()
         mock_get_db.return_value = mock_db
-        mock_db.get = mock.MagicMock(return_value=None)
+        mock_db.exists = mock.MagicMock(return_value=False)
         with pytest.raises(Exception):
             sfp.is_sw_control()
 
+        mock_db.exists.return_value = True
         mock_read.return_value = 0
-        mock_db.get.return_value = 'FW_CONTROL'
         assert not sfp.is_sw_control()
         mock_read.return_value = 1
-        mock_db.get.return_value = 'SW_CONTROL'
         assert sfp.is_sw_control()
-        mock_read.return_value = 0
-        with pytest.raises(Exception):
-            sfp.is_sw_control()
 
     @mock.patch('sonic_platform.device_data.DeviceDataManager.is_independent_mode', mock.MagicMock(return_value=False))
     @mock.patch('sonic_platform.sfp.SFP.is_sw_control', mock.MagicMock(return_value=False))

From 2ba3c90ad4ac5c03299b86795418702bba26900d Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sun, 17 Dec 2023 15:46:25 +0800
Subject: [PATCH 0075/1115] [submodule] Update submodule sonic-utilities to the
 latest HEAD automatically (#17516)

---
 src/sonic-utilities | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-utilities b/src/sonic-utilities
index 377e5812f..19ea84933 160000
--- a/src/sonic-utilities
+++ b/src/sonic-utilities
@@ -1 +1 @@
-Subproject commit 377e5812f66d4adba09221028191d459775d9a25
+Subproject commit 19ea8493388536921ad204833157dac2cd2bf3ba

From ec92a6d4210170c27033a6b3bdd93e2e7ea9c17d Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Tue, 19 Dec 2023 16:33:50 +0800
Subject: [PATCH 0076/1115] [submodule] Update submodule sonic-swss to the
 latest HEAD automatically (#17561)

#### Why I did it
src/sonic-swss
```
* 5f367ebb - (HEAD -> master, origin/master, origin/HEAD) [dash] reduce the memory used by DASH ACL rules (#2984) (8 hours ago) [Yakiv Huryk]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-swss | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-swss b/src/sonic-swss
index 194daa04e..5f367ebb6 160000
--- a/src/sonic-swss
+++ b/src/sonic-swss
@@ -1 +1 @@
-Subproject commit 194daa04e05696afdb1f44765a57f6803ddc1c4c
+Subproject commit 5f367ebb63dab68e73b74092fc083d3d1755b4b3

From f804a6ec5a6a6294009f47bffd60f333fc00019d Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Tue, 19 Dec 2023 16:33:54 +0800
Subject: [PATCH 0077/1115] [submodule] Update submodule sonic-sairedis to the
 latest HEAD automatically (#17560)

#### Why I did it
src/sonic-sairedis
```
* e849160 - (HEAD -> master, origin/master, origin/HEAD) [vslib] add support for ACL table available entry/counter attributes (#1333) (9 hours ago) [Yakiv Huryk]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-sairedis | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-sairedis b/src/sonic-sairedis
index 92c050ab8..e8491609b 160000
--- a/src/sonic-sairedis
+++ b/src/sonic-sairedis
@@ -1 +1 @@
-Subproject commit 92c050ab86aac8b95ab83dc6aa06f2886038540e
+Subproject commit e8491609b609310c788bc007d103c7b6ff87af9d

From 050420f444716843afa0e92616030c0a831364c3 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Tue, 19 Dec 2023 16:33:58 +0800
Subject: [PATCH 0078/1115] [submodule] Update submodule sonic-platform-common
 to the latest HEAD automatically (#17559)

#### Why I did it
src/sonic-platform-common
```
* c82ae54 - (HEAD -> master, origin/master, origin/HEAD) Implementing set_optoe_write_timeout API (#422) (8 hours ago) [mihirpat1]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-platform-common | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-platform-common b/src/sonic-platform-common
index 0f72932a4..c82ae5436 160000
--- a/src/sonic-platform-common
+++ b/src/sonic-platform-common
@@ -1 +1 @@
-Subproject commit 0f72932a4cbfdf16cccc75e72304449b4df67d16
+Subproject commit c82ae543642411676fe9afa2bac32f733356cfc7

From 30ff77350ff85e79fc9efa981fca8e31ad9cef16 Mon Sep 17 00:00:00 2001
From: Prince George <45705344+prgeor@users.noreply.github.com>
Date: Tue, 19 Dec 2023 17:51:49 -0800
Subject: [PATCH 0079/1115] Fix the fsck script that does filesystem repair
 (#17424)

Fix the fsck check which is not working. Potentially fixes #16938
Modified fsck script to run on the ext4.fsck on the appropriate disk where SONiC resides

Microsoft ADO: 26098631
---
 files/initramfs-tools/fsck-rootfs | 12 ++++++++----
 1 file changed, 8 insertions(+), 4 deletions(-)

diff --git a/files/initramfs-tools/fsck-rootfs b/files/initramfs-tools/fsck-rootfs
index 25b1c096a..651d7e0a1 100644
--- a/files/initramfs-tools/fsck-rootfs
+++ b/files/initramfs-tools/fsck-rootfs
@@ -11,15 +11,19 @@ root_val=""
 set -- $(cat /proc/cmdline)
 for x in "$@"; do
     case "$x" in
+        root=UUID=*)
+            root_val="${x#root=UUID=}"
+            blkdev=$(blkid --uuid $root_val)
+            ;;
         root=*)
-            root_val="${x#root=}"
+            blkdev="${x#root=}"
             ;;
     esac
 done
 
 # Check the filesystem we are using
-if [ ! -z $root_val ]; then
-    fstype=$(blkid -o value -s TYPE $root_val)
+if [ ! -z $blkdev ]; then
+    fstype=$(blkid -o value -s TYPE $blkdev)
     case "$fstype" in
         ext4)
             cmd="fsck.ext4 -v -p"
@@ -29,6 +33,6 @@ if [ ! -z $root_val ]; then
             ;;
     esac
     if [ ! -z "$cmd" ]; then
-        $cmd $root_val 2>&1 | gzip -c > /tmp/fsck.log.gz
+        $cmd $blkdev 2>&1 | gzip -c > /tmp/fsck.log.gz
     fi
 fi

From 885f1629dd44a0dc732f20480dc3a025e9d58f69 Mon Sep 17 00:00:00 2001
From: Oleksandr Ivantsiv <oivantsiv@nvidia.com>
Date: Tue, 19 Dec 2023 23:05:11 -0800
Subject: [PATCH 0080/1115] [yang][smartswitch] Add YANG model for
 MID_PLANE_BRIDGE and DPU tables. (#17311)

- Why I did it
Add the YANG model according to Smart Switch IP address assignment HDL.

- How I did it
Implement new YANG model containers.

- How to verify it
Run YANG model unit tests. The changes add new unit tests to cover new functionality.
---
 src/sonic-yang-models/doc/Configuration.md    | 31 +++++++
 src/sonic-yang-models/setup.py                |  3 +-
 .../tests/files/sample_config_db.json         | 14 ++++
 .../yang_model_tests/tests/smart-switch.json  |  9 +++
 .../tests_config/smart-switch.json            | 40 ++++++++++
 .../yang-models/sonic-device_metadata.yang    |  2 +-
 .../yang-models/sonic-smart-switch.yang       | 80 +++++++++++++++++++
 7 files changed, 177 insertions(+), 2 deletions(-)
 create mode 100644 src/sonic-yang-models/tests/yang_model_tests/tests/smart-switch.json
 create mode 100644 src/sonic-yang-models/tests/yang_model_tests/tests_config/smart-switch.json
 create mode 100644 src/sonic-yang-models/yang-models/sonic-smart-switch.yang

diff --git a/src/sonic-yang-models/doc/Configuration.md b/src/sonic-yang-models/doc/Configuration.md
index 1b78d7eb0..4bf3a4a45 100644
--- a/src/sonic-yang-models/doc/Configuration.md
+++ b/src/sonic-yang-models/doc/Configuration.md
@@ -2718,6 +2718,37 @@ The FIPS table introduces FIPS  configuration.
     }
 }
 ```
+### MID_PLANE_BRIDGE"
+
+The MID_PLANE_BRIDGE" table introduces the configuration for the midplane bridge interface for Smart Switch.
+
+```json
+{
+    "MID_PLANE_BRIDGE": {
+        "GLOBAL" : {
+            "bridge": "bridge_midplane",
+            "ip_prefix": "169.254.200.254/24"
+        }
+    }
+}
+```
+
+### DPUS
+
+The DPUS table introduces the information on the DPUs (Data Processing Unit) available on the platform.
+
+```json
+{
+    "DPUS": {
+        "dpu0": {
+            "midplane_interface": "dpu0"
+        },
+        "dpu1": {
+            "midplane_interface": "dpu1"
+        }
+    }
+}
+```
 
 #### 5.2.3 Update value directly in db memory
 
diff --git a/src/sonic-yang-models/setup.py b/src/sonic-yang-models/setup.py
index ff0160ee3..650101c50 100644
--- a/src/sonic-yang-models/setup.py
+++ b/src/sonic-yang-models/setup.py
@@ -197,7 +197,8 @@ def run(self):
                          './yang-models/sonic-static-route.yang',
                          './yang-models/sonic-system-port.yang',
                          './yang-models/sonic-macsec.yang',
-                         './yang-models/sonic-bgp-sentinel.yang']),
+                         './yang-models/sonic-bgp-sentinel.yang',
+                         './yang-models/sonic-smart-switch.yang',]),
         ('cvlyang-models', ['./cvlyang-models/sonic-acl.yang',
                          './cvlyang-models/sonic-bgp-common.yang',
                          './cvlyang-models/sonic-bgp-global.yang',
diff --git a/src/sonic-yang-models/tests/files/sample_config_db.json b/src/sonic-yang-models/tests/files/sample_config_db.json
index 30b6de917..b9db43c87 100644
--- a/src/sonic-yang-models/tests/files/sample_config_db.json
+++ b/src/sonic-yang-models/tests/files/sample_config_db.json
@@ -2558,6 +2558,20 @@
                 "bank": "1",
                 "link": "PortChannel2"
             }
+        },
+        "MID_PLANE_BRIDGE": {
+            "GLOBAL" : {
+                "bridge": "bridge_midplane",
+                "ip_prefix": "169.254.200.254/24"
+            }
+        },
+        "DPUS": {
+            "dpu0": {
+                "midplane_interface": "dpu0"
+            },
+            "dpu1": {
+                "midplane_interface": "dpu1"
+            }
         }
     },
     "SAMPLE_CONFIG_DB_UNKNOWN": {
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/smart-switch.json b/src/sonic-yang-models/tests/yang_model_tests/tests/smart-switch.json
new file mode 100644
index 000000000..1676ad6ba
--- /dev/null
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests/smart-switch.json
@@ -0,0 +1,9 @@
+{
+    "SMART_SWITCH_MID_PLANE_BRIDGE_WITH_DPU_TEST" : {
+        "desc": "Valid configuration in MID_PLANE_BRIDGE and DPUS tables."
+    },
+    "SMART_SWITCH_DPU_NAME_TEST" : {
+        "desc": "DPU name validation.",
+        "eStr": "does not satisfy the constraint"
+    }
+}
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/smart-switch.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/smart-switch.json
new file mode 100644
index 000000000..4c15d63c7
--- /dev/null
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/smart-switch.json
@@ -0,0 +1,40 @@
+{
+    "SMART_SWITCH_MID_PLANE_BRIDGE_WITH_DPU_TEST": {
+        "sonic-smart-switch:sonic-smart-switch": {
+            "sonic-smart-switch:MID_PLANE_BRIDGE": {
+                "GLOBAL": {
+                    "bridge": "bridge_midplane",
+                    "ip_prefix": "169.254.200.254/24"
+                }
+            },
+            "sonic-smart-switch:DPUS": {
+                "DPUS_LIST": [
+                    {
+                        "dpu_name": "dpu0",
+                        "midplane_interface": "dpu0"
+                    },
+                    {
+                        "dpu_name": "dpu1",
+                        "midplane_interface": "dpu1"
+                    }
+                ]
+            }
+        }
+    },
+    "SMART_SWITCH_DPU_NAME_TEST": {
+        "sonic-smart-switch:sonic-smart-switch": {
+            "sonic-smart-switch:DPUS": {
+                "DPUS_LIST": [
+                    {
+                        "dpu_name": "dpu0",
+                        "midplane_interface": "dpuX"
+                    },
+                    {
+                        "dpu_name": "dpu1",
+                        "midplane_interface": "dpu0"
+                    }
+                ]
+            }
+        }
+    }
+}
diff --git a/src/sonic-yang-models/yang-models/sonic-device_metadata.yang b/src/sonic-yang-models/yang-models/sonic-device_metadata.yang
index 26e20d196..7226b02e5 100644
--- a/src/sonic-yang-models/yang-models/sonic-device_metadata.yang
+++ b/src/sonic-yang-models/yang-models/sonic-device_metadata.yang
@@ -157,7 +157,7 @@ module sonic-device_metadata {
 
                 leaf subtype {
                     type string {
-                        pattern "DualToR";
+                        pattern "DualToR|SmartSwitch";
                     }
                 }
 
diff --git a/src/sonic-yang-models/yang-models/sonic-smart-switch.yang b/src/sonic-yang-models/yang-models/sonic-smart-switch.yang
new file mode 100644
index 000000000..fdd4deb17
--- /dev/null
+++ b/src/sonic-yang-models/yang-models/sonic-smart-switch.yang
@@ -0,0 +1,80 @@
+module sonic-smart-switch {
+
+    yang-version 1.1;
+
+	namespace "http://github.com/sonic-net/sonic-smart-switch";
+	prefix smart-switch;
+
+	import ietf-inet-types {
+		prefix inet;
+	}
+
+    import sonic-types {
+        prefix stypes;
+    }
+
+	import sonic-port {
+        prefix port;
+    }
+
+	description "Smart Switch yang Module for SONiC OS";
+
+	revision 2023-10-17 {
+		description "First Revision";
+	}
+
+	container sonic-smart-switch {
+
+		container MID_PLANE_BRIDGE {
+
+			description "MID_PLANE_BRIDGE part of config_db.json";
+
+			container GLOBAL {
+				leaf bridge {
+					type string {
+						pattern "bridge_midplane";
+					}
+					description "Name of the midplane bridge";
+
+					must "(current()/../ip_prefix)";
+				}
+
+				leaf ip_prefix {
+					type stypes:sonic-ip4-prefix;
+					description "IP prefix of the midplane bridge";
+				}
+			}
+			/* end of container GLOBAL */
+		}
+		/* end of container MID_PLANE_BRIDGE */
+
+		container DPUS {
+			description "DPUS part of config_db.json";
+
+			list DPUS_LIST {
+				key "dpu_name";
+
+				leaf dpu_name {
+					description "Name of the DPU";
+					type string {
+						pattern "dpu[0-9]+";
+					}
+				}
+
+				leaf midplane_interface {
+					description "Name of the interface that represents DPU";
+
+					type string {
+						pattern "dpu[0-9]+";
+					}
+
+					must "(current() = current()/../dpu_name)";
+				}
+			}
+			/* end of container DPUS_LIST */
+		}
+		/* end of container DPUS */
+	}
+	/* end of container sonic-smart-switch */
+}
+/* end of module sonic-smart-switch */

From f3f2972512cbead84b89334aeb44f6de9a3cb365 Mon Sep 17 00:00:00 2001
From: Junchao-Mellanox <57339448+Junchao-Mellanox@users.noreply.github.com>
Date: Wed, 20 Dec 2023 15:12:03 +0800
Subject: [PATCH 0081/1115] Optimize syslog rate limit feature for fast and
 warm boot (#17458)

- Why I did it
Optimize syslog rate limit feature for fast and warm boot

- How I did it
Optimize redis start time
Don't render rsyslog.conf in container startup script
Disable containercfgd by default. There is a new CLI to enable it (in another PR)

- How to verify it
Manual test
Regression test
---
 dockers/docker-base-bullseye/Dockerfile.j2    |  2 +-
 dockers/docker-base-bullseye/etc/rsyslog.conf | 78 ++++++++++++++++
 dockers/docker-base-buster/Dockerfile.j2      |  2 +-
 dockers/docker-base-buster/etc/rsyslog.conf   | 78 ++++++++++++++++
 .../etc/supervisor/containercfgd.conf         |  9 --
 dockers/docker-base-stretch/Dockerfile.j2     |  2 +-
 dockers/docker-base-stretch/etc/rsyslog.conf  | 78 ++++++++++++++++
 .../etc/supervisor/containercfgd.conf         |  9 --
 dockers/docker-base/Dockerfile.j2             |  2 +-
 dockers/docker-base/etc/rsyslog.conf          | 78 ++++++++++++++++
 .../etc/supervisor/containercfgd.conf         |  9 --
 dockers/docker-database/supervisord.conf.j2   |  4 +-
 dockers/docker-platform-monitor/Dockerfile.j2 |  1 +
 .../docker-platform-monitor/etc/rsyslog.conf  | 88 +++++++++++++++++++
 files/build_templates/docker_image_ctl.j2     | 38 ++++----
 .../build_templates/sonic_debian_extension.j2 |  3 +
 .../containercfgd}/containercfgd.conf         |  0
 .../rsyslog/rsyslog-container.conf.j2         | 17 ++--
 .../containercfgd/containercfgd.py            | 20 ++---
 .../tests/test_config_daemon.py               |  3 +
 .../tests/test_syslog_config.py               | 11 +--
 21 files changed, 454 insertions(+), 78 deletions(-)
 create mode 100644 dockers/docker-base-bullseye/etc/rsyslog.conf
 create mode 100644 dockers/docker-base-buster/etc/rsyslog.conf
 delete mode 100644 dockers/docker-base-buster/etc/supervisor/containercfgd.conf
 create mode 100644 dockers/docker-base-stretch/etc/rsyslog.conf
 delete mode 100644 dockers/docker-base-stretch/etc/supervisor/containercfgd.conf
 create mode 100644 dockers/docker-base/etc/rsyslog.conf
 delete mode 100644 dockers/docker-base/etc/supervisor/containercfgd.conf
 create mode 100644 dockers/docker-platform-monitor/etc/rsyslog.conf
 rename {dockers/docker-base-bullseye/etc/supervisor => files/image_config/containercfgd}/containercfgd.conf (100%)

diff --git a/dockers/docker-base-bullseye/Dockerfile.j2 b/dockers/docker-base-bullseye/Dockerfile.j2
index 1fa7196ea..b31e986e7 100644
--- a/dockers/docker-base-bullseye/Dockerfile.j2
+++ b/dockers/docker-base-bullseye/Dockerfile.j2
@@ -119,10 +119,10 @@ RUN apt-get clean -y                     && \
     apt-get autoremove -y                && \
     rm -rf /var/lib/apt/lists/* /tmp/* ~/.cache
 
+COPY ["etc/rsyslog.conf", "/etc/rsyslog.conf"]
 COPY ["etc/rsyslog.d/*", "/etc/rsyslog.d/"]
 COPY ["root/.vimrc", "/root/.vimrc"]
 
 RUN ln /usr/bin/vim.tiny /usr/bin/vim
 
 COPY ["etc/supervisor/supervisord.conf", "/etc/supervisor/"]
-COPY ["etc/supervisor/containercfgd.conf", "/etc/supervisor/conf.d/"]
diff --git a/dockers/docker-base-bullseye/etc/rsyslog.conf b/dockers/docker-base-bullseye/etc/rsyslog.conf
new file mode 100644
index 000000000..7a6667d68
--- /dev/null
+++ b/dockers/docker-base-bullseye/etc/rsyslog.conf
@@ -0,0 +1,78 @@
+#
+#  /etc/rsyslog.conf    Configuration file for rsyslog.
+#
+#                       For more information see
+#                       /usr/share/doc/rsyslog-doc/html/rsyslog_conf.html
+
+
+#################
+#### MODULES ####
+#################
+
+$ModLoad imuxsock # provides support for local system logging
+
+#
+# Set a rate limit on messages from the container
+#
+$SystemLogRateLimitInterval 300
+$SystemLogRateLimitBurst 20000
+
+#$ModLoad imklog  # provides kernel logging support
+#$ModLoad immark  # provides --MARK-- message capability
+
+# provides UDP syslog reception
+#$ModLoad imudp
+#$UDPServerRun 514
+
+# provides TCP syslog reception
+#$ModLoad imtcp
+#$InputTCPServerRun 514
+
+
+###########################
+#### GLOBAL DIRECTIVES ####
+###########################
+
+set $.CONTAINER_NAME=getenv("CONTAINER_NAME");
+
+# Set remote syslog server
+template (name="ForwardFormatInContainer" type="string" string="<%PRI%>%TIMESTAMP:::date-rfc3339% %HOSTNAME% %$.CONTAINER_NAME%#%syslogtag%%msg:::sp-if-no-1st-sp%%msg%")
+*.* action(type="omfwd" target=`echo $SYSLOG_TARGET_IP` port="514" protocol="udp" Template="ForwardFormatInContainer")
+
+#
+# Use traditional timestamp format.
+# To enable high precision timestamps, comment out the following line.
+#
+#$ActionFileDefaultTemplate RSYSLOG_TraditionalFileFormat
+
+# Define a custom template
+$template SONiCFileFormat,"%TIMESTAMP%.%timestamp:::date-subseconds% %HOSTNAME% %syslogseverity-text:::uppercase% %$.CONTAINER_NAME%#%syslogtag%%msg:::sp-if-no-1st-sp%%msg:::drop-last-lf%\n"
+$ActionFileDefaultTemplate SONiCFileFormat
+
+#
+# Set the default permissions for all log files.
+#
+$FileOwner root
+$FileGroup adm
+$FileCreateMode 0640
+$DirCreateMode 0755
+$Umask 0022
+
+#
+# Where to place spool and state files
+#
+$WorkDirectory /var/spool/rsyslog
+
+#
+# Include all config files in /etc/rsyslog.d/
+#
+$IncludeConfig /etc/rsyslog.d/*.conf
+
+#
+# Suppress duplicate messages and report "message repeated n times"
+#
+$RepeatedMsgReduction on
+
+###############
+#### RULES ####
+###############
\ No newline at end of file
diff --git a/dockers/docker-base-buster/Dockerfile.j2 b/dockers/docker-base-buster/Dockerfile.j2
index c05973510..a4139eaa3 100644
--- a/dockers/docker-base-buster/Dockerfile.j2
+++ b/dockers/docker-base-buster/Dockerfile.j2
@@ -118,10 +118,10 @@ RUN apt-get clean -y                     && \
     apt-get autoremove -y                && \
     rm -rf /var/lib/apt/lists/* /tmp/* ~/.cache/
 
+COPY ["etc/rsyslog.conf", "/etc/rsyslog.conf"]
 COPY ["etc/rsyslog.d/*", "/etc/rsyslog.d/"]
 COPY ["root/.vimrc", "/root/.vimrc"]
 
 RUN ln /usr/bin/vim.tiny /usr/bin/vim
 
 COPY ["etc/supervisor/supervisord.conf", "/etc/supervisor/"]
-COPY ["etc/supervisor/containercfgd.conf", "/etc/supervisor/conf.d/"]
diff --git a/dockers/docker-base-buster/etc/rsyslog.conf b/dockers/docker-base-buster/etc/rsyslog.conf
new file mode 100644
index 000000000..7a6667d68
--- /dev/null
+++ b/dockers/docker-base-buster/etc/rsyslog.conf
@@ -0,0 +1,78 @@
+#
+#  /etc/rsyslog.conf    Configuration file for rsyslog.
+#
+#                       For more information see
+#                       /usr/share/doc/rsyslog-doc/html/rsyslog_conf.html
+
+
+#################
+#### MODULES ####
+#################
+
+$ModLoad imuxsock # provides support for local system logging
+
+#
+# Set a rate limit on messages from the container
+#
+$SystemLogRateLimitInterval 300
+$SystemLogRateLimitBurst 20000
+
+#$ModLoad imklog  # provides kernel logging support
+#$ModLoad immark  # provides --MARK-- message capability
+
+# provides UDP syslog reception
+#$ModLoad imudp
+#$UDPServerRun 514
+
+# provides TCP syslog reception
+#$ModLoad imtcp
+#$InputTCPServerRun 514
+
+
+###########################
+#### GLOBAL DIRECTIVES ####
+###########################
+
+set $.CONTAINER_NAME=getenv("CONTAINER_NAME");
+
+# Set remote syslog server
+template (name="ForwardFormatInContainer" type="string" string="<%PRI%>%TIMESTAMP:::date-rfc3339% %HOSTNAME% %$.CONTAINER_NAME%#%syslogtag%%msg:::sp-if-no-1st-sp%%msg%")
+*.* action(type="omfwd" target=`echo $SYSLOG_TARGET_IP` port="514" protocol="udp" Template="ForwardFormatInContainer")
+
+#
+# Use traditional timestamp format.
+# To enable high precision timestamps, comment out the following line.
+#
+#$ActionFileDefaultTemplate RSYSLOG_TraditionalFileFormat
+
+# Define a custom template
+$template SONiCFileFormat,"%TIMESTAMP%.%timestamp:::date-subseconds% %HOSTNAME% %syslogseverity-text:::uppercase% %$.CONTAINER_NAME%#%syslogtag%%msg:::sp-if-no-1st-sp%%msg:::drop-last-lf%\n"
+$ActionFileDefaultTemplate SONiCFileFormat
+
+#
+# Set the default permissions for all log files.
+#
+$FileOwner root
+$FileGroup adm
+$FileCreateMode 0640
+$DirCreateMode 0755
+$Umask 0022
+
+#
+# Where to place spool and state files
+#
+$WorkDirectory /var/spool/rsyslog
+
+#
+# Include all config files in /etc/rsyslog.d/
+#
+$IncludeConfig /etc/rsyslog.d/*.conf
+
+#
+# Suppress duplicate messages and report "message repeated n times"
+#
+$RepeatedMsgReduction on
+
+###############
+#### RULES ####
+###############
\ No newline at end of file
diff --git a/dockers/docker-base-buster/etc/supervisor/containercfgd.conf b/dockers/docker-base-buster/etc/supervisor/containercfgd.conf
deleted file mode 100644
index 704b5490c..000000000
--- a/dockers/docker-base-buster/etc/supervisor/containercfgd.conf
+++ /dev/null
@@ -1,9 +0,0 @@
-[program:containercfgd]
-command=python3 /usr/local/bin/containercfgd
-priority=99
-autostart=false
-autorestart=unexpected
-stdout_logfile=syslog
-stderr_logfile=syslog
-dependent_startup=true
-dependent_startup_wait_for=rsyslogd:running
diff --git a/dockers/docker-base-stretch/Dockerfile.j2 b/dockers/docker-base-stretch/Dockerfile.j2
index 8963024d1..652ca11e2 100644
--- a/dockers/docker-base-stretch/Dockerfile.j2
+++ b/dockers/docker-base-stretch/Dockerfile.j2
@@ -114,10 +114,10 @@ RUN apt-get clean -y                     && \
     apt-get autoremove -y                && \
     rm -rf /var/lib/apt/lists/* /tmp/*
 
+COPY ["etc/rsyslog.conf", "/etc/rsyslog.conf"]
 COPY ["etc/rsyslog.d/*", "/etc/rsyslog.d/"]
 COPY ["root/.vimrc", "/root/.vimrc"]
 
 RUN ln /usr/bin/vim.tiny /usr/bin/vim
 
 COPY ["etc/supervisor/supervisord.conf", "/etc/supervisor/"]
-COPY ["etc/supervisor/containercfgd.conf", "/etc/supervisor/conf.d/"]
diff --git a/dockers/docker-base-stretch/etc/rsyslog.conf b/dockers/docker-base-stretch/etc/rsyslog.conf
new file mode 100644
index 000000000..7a6667d68
--- /dev/null
+++ b/dockers/docker-base-stretch/etc/rsyslog.conf
@@ -0,0 +1,78 @@
+#
+#  /etc/rsyslog.conf    Configuration file for rsyslog.
+#
+#                       For more information see
+#                       /usr/share/doc/rsyslog-doc/html/rsyslog_conf.html
+
+
+#################
+#### MODULES ####
+#################
+
+$ModLoad imuxsock # provides support for local system logging
+
+#
+# Set a rate limit on messages from the container
+#
+$SystemLogRateLimitInterval 300
+$SystemLogRateLimitBurst 20000
+
+#$ModLoad imklog  # provides kernel logging support
+#$ModLoad immark  # provides --MARK-- message capability
+
+# provides UDP syslog reception
+#$ModLoad imudp
+#$UDPServerRun 514
+
+# provides TCP syslog reception
+#$ModLoad imtcp
+#$InputTCPServerRun 514
+
+
+###########################
+#### GLOBAL DIRECTIVES ####
+###########################
+
+set $.CONTAINER_NAME=getenv("CONTAINER_NAME");
+
+# Set remote syslog server
+template (name="ForwardFormatInContainer" type="string" string="<%PRI%>%TIMESTAMP:::date-rfc3339% %HOSTNAME% %$.CONTAINER_NAME%#%syslogtag%%msg:::sp-if-no-1st-sp%%msg%")
+*.* action(type="omfwd" target=`echo $SYSLOG_TARGET_IP` port="514" protocol="udp" Template="ForwardFormatInContainer")
+
+#
+# Use traditional timestamp format.
+# To enable high precision timestamps, comment out the following line.
+#
+#$ActionFileDefaultTemplate RSYSLOG_TraditionalFileFormat
+
+# Define a custom template
+$template SONiCFileFormat,"%TIMESTAMP%.%timestamp:::date-subseconds% %HOSTNAME% %syslogseverity-text:::uppercase% %$.CONTAINER_NAME%#%syslogtag%%msg:::sp-if-no-1st-sp%%msg:::drop-last-lf%\n"
+$ActionFileDefaultTemplate SONiCFileFormat
+
+#
+# Set the default permissions for all log files.
+#
+$FileOwner root
+$FileGroup adm
+$FileCreateMode 0640
+$DirCreateMode 0755
+$Umask 0022
+
+#
+# Where to place spool and state files
+#
+$WorkDirectory /var/spool/rsyslog
+
+#
+# Include all config files in /etc/rsyslog.d/
+#
+$IncludeConfig /etc/rsyslog.d/*.conf
+
+#
+# Suppress duplicate messages and report "message repeated n times"
+#
+$RepeatedMsgReduction on
+
+###############
+#### RULES ####
+###############
\ No newline at end of file
diff --git a/dockers/docker-base-stretch/etc/supervisor/containercfgd.conf b/dockers/docker-base-stretch/etc/supervisor/containercfgd.conf
deleted file mode 100644
index 8d938e6f0..000000000
--- a/dockers/docker-base-stretch/etc/supervisor/containercfgd.conf
+++ /dev/null
@@ -1,9 +0,0 @@
-[program:containercfgd]
-command=python /usr/local/bin/containercfgd
-priority=99
-autostart=false
-autorestart=unexpected
-stdout_logfile=syslog
-stderr_logfile=syslog
-dependent_startup=true
-dependent_startup_wait_for=rsyslogd:running
diff --git a/dockers/docker-base/Dockerfile.j2 b/dockers/docker-base/Dockerfile.j2
index 66fab1901..45e91fbab 100644
--- a/dockers/docker-base/Dockerfile.j2
+++ b/dockers/docker-base/Dockerfile.j2
@@ -50,6 +50,7 @@ RUN apt-get -y install \
     rsyslog            \
     less
 
+COPY ["etc/rsyslog.conf", "/etc/rsyslog.conf"]
 COPY ["etc/rsyslog.d/*", "/etc/rsyslog.d/"]
 COPY ["root/.vimrc", "/root/.vimrc"]
 
@@ -68,7 +69,6 @@ RUN mkdir -p /etc/supervisor/conf.d
 RUN mkdir -p /var/log/supervisor
 
 COPY ["etc/supervisor/supervisord.conf", "/etc/supervisor/"]
-COPY ["etc/supervisor/containercfgd.conf", "/etc/supervisor/conf.d/"]
 
 RUN apt-get -y purge   \
     exim4              \
diff --git a/dockers/docker-base/etc/rsyslog.conf b/dockers/docker-base/etc/rsyslog.conf
new file mode 100644
index 000000000..7a6667d68
--- /dev/null
+++ b/dockers/docker-base/etc/rsyslog.conf
@@ -0,0 +1,78 @@
+#
+#  /etc/rsyslog.conf    Configuration file for rsyslog.
+#
+#                       For more information see
+#                       /usr/share/doc/rsyslog-doc/html/rsyslog_conf.html
+
+
+#################
+#### MODULES ####
+#################
+
+$ModLoad imuxsock # provides support for local system logging
+
+#
+# Set a rate limit on messages from the container
+#
+$SystemLogRateLimitInterval 300
+$SystemLogRateLimitBurst 20000
+
+#$ModLoad imklog  # provides kernel logging support
+#$ModLoad immark  # provides --MARK-- message capability
+
+# provides UDP syslog reception
+#$ModLoad imudp
+#$UDPServerRun 514
+
+# provides TCP syslog reception
+#$ModLoad imtcp
+#$InputTCPServerRun 514
+
+
+###########################
+#### GLOBAL DIRECTIVES ####
+###########################
+
+set $.CONTAINER_NAME=getenv("CONTAINER_NAME");
+
+# Set remote syslog server
+template (name="ForwardFormatInContainer" type="string" string="<%PRI%>%TIMESTAMP:::date-rfc3339% %HOSTNAME% %$.CONTAINER_NAME%#%syslogtag%%msg:::sp-if-no-1st-sp%%msg%")
+*.* action(type="omfwd" target=`echo $SYSLOG_TARGET_IP` port="514" protocol="udp" Template="ForwardFormatInContainer")
+
+#
+# Use traditional timestamp format.
+# To enable high precision timestamps, comment out the following line.
+#
+#$ActionFileDefaultTemplate RSYSLOG_TraditionalFileFormat
+
+# Define a custom template
+$template SONiCFileFormat,"%TIMESTAMP%.%timestamp:::date-subseconds% %HOSTNAME% %syslogseverity-text:::uppercase% %$.CONTAINER_NAME%#%syslogtag%%msg:::sp-if-no-1st-sp%%msg:::drop-last-lf%\n"
+$ActionFileDefaultTemplate SONiCFileFormat
+
+#
+# Set the default permissions for all log files.
+#
+$FileOwner root
+$FileGroup adm
+$FileCreateMode 0640
+$DirCreateMode 0755
+$Umask 0022
+
+#
+# Where to place spool and state files
+#
+$WorkDirectory /var/spool/rsyslog
+
+#
+# Include all config files in /etc/rsyslog.d/
+#
+$IncludeConfig /etc/rsyslog.d/*.conf
+
+#
+# Suppress duplicate messages and report "message repeated n times"
+#
+$RepeatedMsgReduction on
+
+###############
+#### RULES ####
+###############
\ No newline at end of file
diff --git a/dockers/docker-base/etc/supervisor/containercfgd.conf b/dockers/docker-base/etc/supervisor/containercfgd.conf
deleted file mode 100644
index 8d938e6f0..000000000
--- a/dockers/docker-base/etc/supervisor/containercfgd.conf
+++ /dev/null
@@ -1,9 +0,0 @@
-[program:containercfgd]
-command=python /usr/local/bin/containercfgd
-priority=99
-autostart=false
-autorestart=unexpected
-stdout_logfile=syslog
-stderr_logfile=syslog
-dependent_startup=true
-dependent_startup_wait_for=rsyslogd:running
diff --git a/dockers/docker-database/supervisord.conf.j2 b/dockers/docker-database/supervisord.conf.j2
index 4d9172797..b71a4c59d 100644
--- a/dockers/docker-database/supervisord.conf.j2
+++ b/dockers/docker-database/supervisord.conf.j2
@@ -39,12 +39,10 @@ dependent_startup=true
 command=/bin/bash -c "{ [[ -s /var/lib/{{ redis_inst }}/dump.rdb ]] || rm -f /var/lib/{{ redis_inst }}/dump.rdb; } && mkdir -p /var/lib/{{ redis_inst }} && exec /usr/bin/redis-server /etc/redis/redis.conf --bind {{ LOOPBACK_IP }} {{ redis_items['hostname'] }} --port {{ redis_items['port'] }} --unixsocket {{ redis_items['unix_socket_path'] }} --pidfile /var/run/redis/{{ redis_inst }}.pid --dir /var/lib/{{ redis_inst }}"
 priority=2
 user=redis
-autostart=false
+autostart=true
 autorestart=false
 stdout_logfile=syslog
 stderr_logfile=syslog
-dependent_startup=true
-dependent_startup_wait_for=rsyslogd:running
 {%     endfor %}
 {% endif %}
 
diff --git a/dockers/docker-platform-monitor/Dockerfile.j2 b/dockers/docker-platform-monitor/Dockerfile.j2
index ee971e369..aeb201a20 100755
--- a/dockers/docker-platform-monitor/Dockerfile.j2
+++ b/dockers/docker-platform-monitor/Dockerfile.j2
@@ -89,6 +89,7 @@ COPY ["docker-pmon.supervisord.conf.j2", "docker_init.j2", "/usr/share/sonic/tem
 COPY ["ssd_tools/*", "/usr/bin/"]
 COPY ["files/supervisor-proc-exit-listener", "/usr/bin"]
 COPY ["critical_processes", "/etc/supervisor"]
+COPY ["etc/rsyslog.conf", "/etc/rsyslog.conf"]
 
 RUN sonic-cfggen -a "{\"CONFIGURED_PLATFORM\":\"{{CONFIGURED_PLATFORM}}\"}" -t /usr/share/sonic/templates/docker_init.j2 > /usr/bin/docker_init.sh
 RUN rm -f /usr/share/sonic/templates/docker_init.j2
diff --git a/dockers/docker-platform-monitor/etc/rsyslog.conf b/dockers/docker-platform-monitor/etc/rsyslog.conf
new file mode 100644
index 000000000..35815e532
--- /dev/null
+++ b/dockers/docker-platform-monitor/etc/rsyslog.conf
@@ -0,0 +1,88 @@
+#
+#  /etc/rsyslog.conf    Configuration file for rsyslog.
+#
+#                       For more information see
+#                       /usr/share/doc/rsyslog-doc/html/rsyslog_conf.html
+
+
+#################
+#### MODULES ####
+#################
+
+$ModLoad imuxsock # provides support for local system logging
+
+#
+# Set a rate limit on messages from the container
+#
+$SystemLogRateLimitInterval 300
+$SystemLogRateLimitBurst 20000
+
+#$ModLoad imklog  # provides kernel logging support
+#$ModLoad immark  # provides --MARK-- message capability
+
+# provides UDP syslog reception
+#$ModLoad imudp
+#$UDPServerRun 514
+
+# provides TCP syslog reception
+#$ModLoad imtcp
+#$InputTCPServerRun 514
+
+
+###########################
+#### GLOBAL DIRECTIVES ####
+###########################
+
+set $.PLATFORM=getenv("PLATFORM");
+set $.CONTAINER_NAME=getenv("CONTAINER_NAME");
+
+if ($.PLATFORM == "x86_64-mlnx_msn2700-r0" or $.PLATFORM == "x86_64-mlnx_msn2700a1-r0" or $.PLATFORM == "x86_64-mlnx_msn2410-r0") then {
+
+# This rsyslog configuration is intended to resolve the following error message that only appears on the MSN2700 and MSN2410 platforms:
+# "ERR pmon#sensord: Error getting sensor data: dps460/#10: Can't read"
+# This error is because of firmware issue with some type of PSU, we are not able to upgrade the FW online.
+# Since there is no functional impact, this error log can be ignored safely.
+if $programname contains "sensord" and $msg contains "Error getting sensor data: dps460/#" then stop
+}
+
+# Set remote syslog server
+template (name="ForwardFormatInContainer" type="string" string="<%PRI%>%TIMESTAMP:::date-rfc3339% %HOSTNAME% %$.CONTAINER_NAME%#%syslogtag%%msg:::sp-if-no-1st-sp%%msg%")
+*.* action(type="omfwd" target=`echo $SYSLOG_TARGET_IP` port="514" protocol="udp" Template="ForwardFormatInContainer")
+
+#
+# Use traditional timestamp format.
+# To enable high precision timestamps, comment out the following line.
+#
+#$ActionFileDefaultTemplate RSYSLOG_TraditionalFileFormat
+
+# Define a custom template
+$template SONiCFileFormat,"%TIMESTAMP%.%timestamp:::date-subseconds% %HOSTNAME% %syslogseverity-text:::uppercase% %$.CONTAINER_NAME%#%syslogtag%%msg:::sp-if-no-1st-sp%%msg:::drop-last-lf%\n"
+$ActionFileDefaultTemplate SONiCFileFormat
+
+#
+# Set the default permissions for all log files.
+#
+$FileOwner root
+$FileGroup adm
+$FileCreateMode 0640
+$DirCreateMode 0755
+$Umask 0022
+
+#
+# Where to place spool and state files
+#
+$WorkDirectory /var/spool/rsyslog
+
+#
+# Include all config files in /etc/rsyslog.d/
+#
+$IncludeConfig /etc/rsyslog.d/*.conf
+
+#
+# Suppress duplicate messages and report "message repeated n times"
+#
+$RepeatedMsgReduction on
+
+###############
+#### RULES ####
+###############
\ No newline at end of file
diff --git a/files/build_templates/docker_image_ctl.j2 b/files/build_templates/docker_image_ctl.j2
index 3397f7a88..2093622da 100644
--- a/files/build_templates/docker_image_ctl.j2
+++ b/files/build_templates/docker_image_ctl.j2
@@ -34,27 +34,16 @@ function updateSyslogConf()
     # Also update the container name
     if [[ ($NUM_ASIC -gt 1) ]]; then
         TARGET_IP=$(docker network inspect bridge --format={{ "'{{(index .IPAM.Config 0).Gateway}}'" }})
-    else
-        if [ "$CONTAINER_EXISTS" = "yes" ]; then
-            # database configuration has been synced to /etc/rsyslog.conf
-            # no need generate it to save boot time
-            return
-        fi
-        TARGET_IP="127.0.0.1"
-    fi
-    CONTAINER_NAME="$DOCKERNAME"
-    TMP_FILE="/tmp/rsyslog.$CONTAINER_NAME.conf"
-    {%- if docker_container_name == "database" %}
-    python -c "import jinja2, os; paths=['/usr/share/sonic/templates']; loader = jinja2.FileSystemLoader(paths); env = jinja2.Environment(loader=loader, trim_blocks=True); template_file='/usr/share/sonic/templates/rsyslog-container.conf.j2'; template = env.get_template(os.path.basename(template_file)); data=template.render({\"target_ip\":\"$TARGET_IP\",\"container_name\":\"$CONTAINER_NAME\"}); print(data)" > $TMP_FILE
-    {%- else %}
-    sonic-cfggen -d -t /usr/share/sonic/templates/rsyslog-container.conf.j2 -a "{\"target_ip\": \"$TARGET_IP\", \"container_name\": \"$CONTAINER_NAME\", \"platform\": \"$PLATFORM\" }"  > $TMP_FILE
-    if [ $? -ne 0 ]; then
-      echo "Error: Execute sonic-cfggen -d failed. Execute without '-d'."
-      sonic-cfggen -t /usr/share/sonic/templates/rsyslog-container.conf.j2 -a "{\"target_ip\": \"$TARGET_IP\", \"container_name\": \"$CONTAINER_NAME\", \"platform\": \"$PLATFORM\" }"  > $TMP_FILE
+        CONTAINER_NAME="$DOCKERNAME"
+        TMP_FILE="/tmp/rsyslog.$CONTAINER_NAME.conf"
+        {%- if docker_container_name == "database" %}
+        python -c "import jinja2, os; paths=['/usr/share/sonic/templates']; loader = jinja2.FileSystemLoader(paths); env = jinja2.Environment(loader=loader, trim_blocks=True); template_file='/usr/share/sonic/templates/rsyslog-container.conf.j2'; template = env.get_template(os.path.basename(template_file)); data=template.render({\"target_ip\":\"$TARGET_IP\",\"container_name\":\"$CONTAINER_NAME\"}); print(data)" > $TMP_FILE
+        {%- else %}
+        sonic-cfggen -t /usr/share/sonic/templates/rsyslog-container.conf.j2 -a "{\"target_ip\": \"$TARGET_IP\", \"container_name\": \"$CONTAINER_NAME\" }"  > $TMP_FILE
+        {%- endif %}
+        docker cp $TMP_FILE ${DOCKERNAME}:/etc/rsyslog.conf
+        rm -rf $TMP_FILE
     fi
-    {%- endif %}
-    docker cp $TMP_FILE ${DOCKERNAME}:/etc/rsyslog.conf
-    rm -rf $TMP_FILE
 }
 function ebtables_config()
 {
@@ -326,13 +315,18 @@ start() {
     # Obtain our platform as we will mount directories with these names in each docker
     PLATFORM=${PLATFORM:-`$SONIC_CFGGEN -H -v DEVICE_METADATA.localhost.platform`}
 
-
     # Parse the device specific asic conf file, if it exists
     ASIC_CONF=/usr/share/sonic/device/$PLATFORM/asic.conf
     if [ -f "$ASIC_CONF" ]; then
         source $ASIC_CONF
     fi
 
+    # Default rsyslog target IP for single ASIC platform
+    SYSLOG_TARGET_IP=127.0.0.1
+    if [[ ($NUM_ASIC -gt 1) ]]; then
+        SYSLOG_TARGET_IP=$(docker network inspect bridge --format={{ "'{{(index .IPAM.Config 0).Gateway}}'" }})
+    fi
+
     PLATFORM_ENV_CONF=/usr/share/sonic/device/$PLATFORM/platform_env.conf
     if [ -f "$PLATFORM_ENV_CONF" ]; then
         source $PLATFORM_ENV_CONF
@@ -646,6 +640,8 @@ start() {
         --env "NAMESPACE_COUNT"="$NUM_ASIC" \
         --env "DEV"="$DEV" \
         --env "CONTAINER_NAME"=$DOCKERNAME \
+        --env "SYSLOG_TARGET_IP"=$SYSLOG_TARGET_IP \
+        --env "PLATFORM"=$PLATFORM \
         --name=$DOCKERNAME \
 {%- if docker_container_name == "gbsyncd" %}
         -v /var/run/docker-syncd$DEV:/var/run/sswsyncd \
diff --git a/files/build_templates/sonic_debian_extension.j2 b/files/build_templates/sonic_debian_extension.j2
index 4d58d7149..73564c03c 100644
--- a/files/build_templates/sonic_debian_extension.j2
+++ b/files/build_templates/sonic_debian_extension.j2
@@ -407,6 +407,9 @@ sudo cp $IMAGE_CONFIGS/rsyslog/rsyslog-container.conf.j2 $FILESYSTEM_ROOT_USR_SH
 sudo cp $IMAGE_CONFIGS/rsyslog/rsyslog.d/* $FILESYSTEM_ROOT/etc/rsyslog.d/
 echo "rsyslog-config.service" | sudo tee -a $GENERATED_SERVICE_FILE
 
+# Copy containercfgd configuration files
+sudo cp $IMAGE_CONFIGS/containercfgd/containercfgd.conf $FILESYSTEM_ROOT_USR_SHARE_SONIC_TEMPLATES/
+
 # Copy syslog override files
 sudo mkdir -p $FILESYSTEM_ROOT/etc/systemd/system/syslog.socket.d
 sudo cp $IMAGE_CONFIGS/syslog/override.conf $FILESYSTEM_ROOT/etc/systemd/system/syslog.socket.d/override.conf
diff --git a/dockers/docker-base-bullseye/etc/supervisor/containercfgd.conf b/files/image_config/containercfgd/containercfgd.conf
similarity index 100%
rename from dockers/docker-base-bullseye/etc/supervisor/containercfgd.conf
rename to files/image_config/containercfgd/containercfgd.conf
diff --git a/files/image_config/rsyslog/rsyslog-container.conf.j2 b/files/image_config/rsyslog/rsyslog-container.conf.j2
index 4dff46957..eb13ddd7b 100644
--- a/files/image_config/rsyslog/rsyslog-container.conf.j2
+++ b/files/image_config/rsyslog/rsyslog-container.conf.j2
@@ -52,21 +52,26 @@ $SystemLogRateLimitBurst 20000
 ###########################
 #### GLOBAL DIRECTIVES ####
 ###########################
+
+set $.PLATFORM=getenv("PLATFORM");
+set $.CONTAINER_NAME=getenv("CONTAINER_NAME");
+
 {% if container_name == 'pmon' %}
-{% if platform == 'x86_64-mlnx_msn2700-r0' or platform == 'x86_64-mlnx_msn2700a1-r0' or platform == 'x86_64-mlnx_msn2410-r0' %}
 
 # This rsyslog configuration is intended to resolve the following error message that only appears on the MSN2700 and MSN2410 platforms:
 # "ERR pmon#sensord: Error getting sensor data: dps460/#10: Can't read"
 # This error is because of firmware issue with some type of PSU, we are not able to upgrade the FW online.
 # Since there is no functional impact, this error log can be ignored safely.
 
-if $programname contains "sensord" and $msg contains "Error getting sensor data: dps460/#" then stop
+if ($.PLATFORM == "x86_64-mlnx_msn2700-r0" or $.PLATFORM == "x86_64-mlnx_msn2700a1-r0" or $.PLATFORM == "x86_64-mlnx_msn2410-r0") then {
+    if $programname contains "sensord" and $msg contains "Error getting sensor data: dps460/#" then stop
+}
 
 {% endif %}
-{% endif %}
+
 # Set remote syslog server
-template (name="ForwardFormatInContainer" type="string" string="<%PRI%>%TIMESTAMP:::date-rfc3339% %HOSTNAME% {{container_name}}#%syslogtag%%msg:::sp-if-no-1st-sp%%msg%")
-*.* action(type="omfwd" target="{{target_ip}}" port="514" protocol="udp" Template="ForwardFormatInContainer")
+template (name="ForwardFormatInContainer" type="string" string="<%PRI%>%TIMESTAMP:::date-rfc3339% %HOSTNAME% %$.CONTAINER_NAME%#%syslogtag%%msg:::sp-if-no-1st-sp%%msg%")
+*.* action(type="omfwd" target=`echo $SYSLOG_TARGET_IP` port="514" protocol="udp" Template="ForwardFormatInContainer")
 
 #
 # Use traditional timestamp format.
@@ -75,7 +80,7 @@ template (name="ForwardFormatInContainer" type="string" string="<%PRI%>%TIMESTAM
 #$ActionFileDefaultTemplate RSYSLOG_TraditionalFileFormat
 
 # Define a custom template
-$template SONiCFileFormat,"%TIMESTAMP%.%timestamp:::date-subseconds% %HOSTNAME% %syslogseverity-text:::uppercase% {{container_name}}#%syslogtag%%msg:::sp-if-no-1st-sp%%msg:::drop-last-lf%\n"
+$template SONiCFileFormat,"%TIMESTAMP%.%timestamp:::date-subseconds% %HOSTNAME% %syslogseverity-text:::uppercase% %$.CONTAINER_NAME%#%syslogtag%%msg:::sp-if-no-1st-sp%%msg:::drop-last-lf%\n"
 $ActionFileDefaultTemplate SONiCFileFormat
 
 #
diff --git a/src/sonic-containercfgd/containercfgd/containercfgd.py b/src/sonic-containercfgd/containercfgd/containercfgd.py
index 4eda8a6d8..f604034fc 100644
--- a/src/sonic-containercfgd/containercfgd/containercfgd.py
+++ b/src/sonic-containercfgd/containercfgd/containercfgd.py
@@ -1,3 +1,6 @@
+from swsscommon.swsscommon import RestartWaiter
+RestartWaiter.waitAdvancedBootDone()
+
 import os
 import re
 import signal
@@ -5,7 +8,7 @@
 import sys
 
 from sonic_py_common import daemon_base, logger
-from swsscommon.swsscommon import ConfigDBConnector, RestartWaiter
+from swsscommon.swsscommon import ConfigDBConnector
 
 SYSLOG_IDENTIFIER = "containercfgd"
 logger = logger.Logger(SYSLOG_IDENTIFIER)
@@ -101,10 +104,9 @@ class SyslogHandler:
     # Regular expressions to extract value from rsyslog.conf
     INTERVAL_PATTERN = '.*SystemLogRateLimitInterval\s+(\d+).*'
     BURST_PATTERN = '.*SystemLogRateLimitBurst\s+(\d+).*'
-    TARGET_IP_PATTERN = '.*target="(.*?)".*'
 
     def __init__(self):
-        self.current_interval, self.current_burst, self.target_ip = self.parse_syslog_conf()
+        self.current_interval, self.current_burst = self.parse_syslog_conf()
 
     def handle_config(self, table, key, data):
         """Handle CONFIG DB change. Callback by ConfigDBConnector.
@@ -149,7 +151,7 @@ def update_syslog_config(self, data):
         if os.path.exists(self.TMP_SYSLOG_CONF_PATH):
             os.remove(self.TMP_SYSLOG_CONF_PATH)
         with open(self.TMP_SYSLOG_CONF_PATH, 'w+') as f:
-            json_args = f'{{"target_ip": "{self.target_ip}", "container_name": "{container_name}" }}'
+            json_args = f'{{"container_name": "{container_name}" }}'
             output = run_command(['sonic-cfggen', '-d', '-t', '/usr/share/sonic/templates/rsyslog-container.conf.j2', '-a', json_args])
             f.write(output)
         run_command(['cp', self.TMP_SYSLOG_CONF_PATH, self.SYSLOG_CONF_PATH])
@@ -161,11 +163,10 @@ def parse_syslog_conf(self):
         """Passe existing syslog conf and extract config values
 
         Returns:
-            tuple: interval,burst,target_ip
+            tuple: interval,burst
         """
         interval = '0'
         burst = '0'
-        target_ip = None
 
         with open(self.SYSLOG_CONF_PATH, 'r') as f:
             content = f.read()
@@ -179,15 +180,10 @@ def parse_syslog_conf(self):
                 burst = match.group(1)
                 break
 
-            pattern = re.compile(self.TARGET_IP_PATTERN)
-            for match in pattern.finditer(content):
-                target_ip = match.group(1)
-                break
-        return interval, burst, target_ip
+        return interval, burst
 
 
 def main():
-    RestartWaiter.waitAdvancedBootDone()
     global container_name
     container_name = os.environ['CONTAINER_NAME']
     daemon = ContainerConfigDaemon()
diff --git a/src/sonic-containercfgd/tests/test_config_daemon.py b/src/sonic-containercfgd/tests/test_config_daemon.py
index 3604a32ab..05014d397 100644
--- a/src/sonic-containercfgd/tests/test_config_daemon.py
+++ b/src/sonic-containercfgd/tests/test_config_daemon.py
@@ -2,6 +2,9 @@
 import sys
 from unittest import mock
 
+from swsscommon import swsscommon
+swsscommon.RestartWaiter = mock.MagicMock()
+
 test_path = os.path.dirname(os.path.abspath(__file__))
 modules_path = os.path.dirname(test_path)
 sys.path.insert(0, modules_path)
diff --git a/src/sonic-containercfgd/tests/test_syslog_config.py b/src/sonic-containercfgd/tests/test_syslog_config.py
index 23e5887b9..a823d9f9a 100644
--- a/src/sonic-containercfgd/tests/test_syslog_config.py
+++ b/src/sonic-containercfgd/tests/test_syslog_config.py
@@ -2,6 +2,9 @@
 import sys
 from unittest import mock
 
+from swsscommon import swsscommon
+swsscommon.RestartWaiter = mock.MagicMock()
+
 test_path = os.path.dirname(os.path.abspath(__file__))
 modules_path = os.path.dirname(test_path)
 sys.path.insert(0, modules_path)
@@ -49,7 +52,7 @@ def test_handle_init_data():
 
 
 @mock.patch('containercfgd.containercfgd.run_command')
-@mock.patch('containercfgd.containercfgd.SyslogHandler.parse_syslog_conf', mock.MagicMock(return_value=('100', '200', '127.0.0.1')))
+@mock.patch('containercfgd.containercfgd.SyslogHandler.parse_syslog_conf', mock.MagicMock(return_value=('100', '200')))
 def test_update_syslog_config(mock_run_cmd):
     mock_run_cmd.return_value = ""
     handler = containercfgd.SyslogHandler()
@@ -69,13 +72,11 @@ def test_update_syslog_config(mock_run_cmd):
 def test_parse_syslog_conf():
     handler = containercfgd.SyslogHandler()
     handler.SYSLOG_CONF_PATH = os.path.join(test_path, 'mock_rsyslog.conf')
-    interval, burst, target_ip = handler.parse_syslog_conf()
+    interval, burst = handler.parse_syslog_conf()
     assert interval == '50'
     assert burst == '10002'
-    assert target_ip == '127.0.0.1'
 
     handler.SYSLOG_CONF_PATH = os.path.join(test_path, 'mock_empty_rsyslog.conf')
-    interval, burst, target_ip = handler.parse_syslog_conf()
+    interval, burst = handler.parse_syslog_conf()
     assert interval == '0'
     assert burst == '0'
-    assert target_ip is None

From 2559d7e541576d852a5a28f0669588fb864618b3 Mon Sep 17 00:00:00 2001
From: byu343 <byu@arista.com>
Date: Tue, 19 Dec 2023 23:29:43 -0800
Subject: [PATCH 0082/1115] [Arista] Use port_config.ini for
 Arista-7050QX-32S-S4Q31 (#17253)

This change of removing hwsku.json is to correct the port index for
sfp ports (Ethernet0, Ethernet1, Ethernet2, Ethernet3) by using
port_config.ini, which should be '1, 2, 3, 4'. We could not do it
with hwsku.json, as it is defined as '5, 5, 5, 5' by platform.json
for the breakout_mode 1x40G[10G].
---
 .../Arista-7050QX-32S-S4Q31/hwsku.json        | 132 ------------------
 .../Arista-7050QX-32S-S4Q31/port_config.ini   |  72 +++++-----
 2 files changed, 36 insertions(+), 168 deletions(-)
 delete mode 100644 device/arista/x86_64-arista_7050_qx32s/Arista-7050QX-32S-S4Q31/hwsku.json

diff --git a/device/arista/x86_64-arista_7050_qx32s/Arista-7050QX-32S-S4Q31/hwsku.json b/device/arista/x86_64-arista_7050_qx32s/Arista-7050QX-32S-S4Q31/hwsku.json
deleted file mode 100644
index 0f17443e4..000000000
--- a/device/arista/x86_64-arista_7050_qx32s/Arista-7050QX-32S-S4Q31/hwsku.json
+++ /dev/null
@@ -1,132 +0,0 @@
-{
-    "interfaces": {
-        "Ethernet0": {
-            "default_brkout_mode": "3x10G(3)+1x1G(1)",
-            "port_type": "RJ45"
-        },
-        "Ethernet4": {
-            "default_brkout_mode": "1x40G[10G]",
-            "port_type": "QSFP+"
-        },
-        "Ethernet8": {
-            "default_brkout_mode": "1x40G[10G]",
-            "port_type": "QSFP+"
-        },
-        "Ethernet12": {
-            "default_brkout_mode": "1x40G[10G]",
-            "port_type": "QSFP+"
-        },
-        "Ethernet16": {
-            "default_brkout_mode": "1x40G[10G]",
-            "port_type": "QSFP+"
-        },
-        "Ethernet20": {
-            "default_brkout_mode": "1x40G[10G]",
-            "port_type": "QSFP+"
-        },
-        "Ethernet24": {
-            "default_brkout_mode": "1x40G[10G]",
-            "port_type": "QSFP+"
-        },
-        "Ethernet28": {
-            "default_brkout_mode": "1x40G[10G]",
-            "port_type": "QSFP+"
-        },
-        "Ethernet32": {
-            "default_brkout_mode": "1x40G[10G]",
-            "port_type": "QSFP+"
-        },
-        "Ethernet36": {
-            "default_brkout_mode": "1x40G[10G]",
-            "port_type": "QSFP+"
-        },
-        "Ethernet40": {
-            "default_brkout_mode": "1x40G[10G]",
-            "port_type": "QSFP+"
-        },
-        "Ethernet44": {
-            "default_brkout_mode": "1x40G[10G]",
-            "port_type": "QSFP+"
-        },
-        "Ethernet48": {
-            "default_brkout_mode": "1x40G[10G]",
-            "port_type": "QSFP+"
-        },
-        "Ethernet52": {
-            "default_brkout_mode": "1x40G[10G]",
-            "port_type": "QSFP+"
-        },
-        "Ethernet56": {
-            "default_brkout_mode": "1x40G[10G]",
-            "port_type": "QSFP+"
-        },
-        "Ethernet60": {
-            "default_brkout_mode": "1x40G[10G]",
-            "port_type": "QSFP+"
-        },
-        "Ethernet64": {
-            "default_brkout_mode": "1x40G[10G]",
-            "port_type": "QSFP+"
-        },
-        "Ethernet68": {
-            "default_brkout_mode": "1x40G[10G]",
-            "port_type": "QSFP+"
-        },
-        "Ethernet72": {
-            "default_brkout_mode": "1x40G[10G]",
-            "port_type": "QSFP+"
-        },
-        "Ethernet76": {
-            "default_brkout_mode": "1x40G[10G]",
-            "port_type": "QSFP+"
-        },
-        "Ethernet80": {
-            "default_brkout_mode": "1x40G[10G]",
-            "port_type": "QSFP+"
-        },
-        "Ethernet84": {
-            "default_brkout_mode": "1x40G[10G]",
-            "port_type": "QSFP+"
-        },
-        "Ethernet88": {
-            "default_brkout_mode": "1x40G[10G]",
-            "port_type": "QSFP+"
-        },
-        "Ethernet92": {
-            "default_brkout_mode": "1x40G[10G]",
-            "port_type": "QSFP+"
-        },
-        "Ethernet96": {
-            "default_brkout_mode": "1x40G[10G]",
-            "port_type": "QSFP+"
-        },
-        "Ethernet100": {
-            "default_brkout_mode": "1x40G[10G]",
-            "port_type": "QSFP+"
-        },
-        "Ethernet104": {
-            "default_brkout_mode": "1x40G[10G]",
-            "port_type": "QSFP+"
-        },
-        "Ethernet108": {
-            "default_brkout_mode": "1x40G[10G]",
-            "port_type": "QSFP+"
-        },
-        "Ethernet112": {
-            "default_brkout_mode": "1x40G[10G]",
-            "port_type": "QSFP+"
-        },
-        "Ethernet116": {
-            "default_brkout_mode": "1x40G[10G]",
-            "port_type": "QSFP+"
-        },
-        "Ethernet120": {
-            "default_brkout_mode": "1x40G[10G]",
-            "port_type": "QSFP+"
-        },
-        "Ethernet124": {
-            "default_brkout_mode": "1x40G[10G]",
-            "port_type": "QSFP+"
-        }
-    }
-}
diff --git a/device/arista/x86_64-arista_7050_qx32s/Arista-7050QX-32S-S4Q31/port_config.ini b/device/arista/x86_64-arista_7050_qx32s/Arista-7050QX-32S-S4Q31/port_config.ini
index dafdb570e..182f04aca 100644
--- a/device/arista/x86_64-arista_7050_qx32s/Arista-7050QX-32S-S4Q31/port_config.ini
+++ b/device/arista/x86_64-arista_7050_qx32s/Arista-7050QX-32S-S4Q31/port_config.ini
@@ -1,36 +1,36 @@
-# name          lanes             alias         index
-Ethernet0       9                 Ethernet1     1
-Ethernet1       10                Ethernet2     2
-Ethernet2       11                Ethernet3     3
-Ethernet3       12                Ethernet4     4
-Ethernet4       13,14,15,16       Ethernet6/1   6
-Ethernet8       17,18,19,20       Ethernet7/1   7
-Ethernet12      21,22,23,24       Ethernet8/1   8
-Ethernet16      29,30,31,32       Ethernet9/1   9
-Ethernet20      25,26,27,28       Ethernet10/1  10
-Ethernet24      33,34,35,36       Ethernet11/1  11
-Ethernet28      37,38,39,40       Ethernet12/1  12
-Ethernet32      45,46,47,48       Ethernet13/1  13
-Ethernet36      41,42,43,44       Ethernet14/1  14
-Ethernet40      49,50,51,52       Ethernet15/1  15
-Ethernet44      53,54,55,56       Ethernet16/1  16
-Ethernet48      69,70,71,72       Ethernet17/1  17
-Ethernet52      65,66,67,68       Ethernet18/1  18
-Ethernet56      73,74,75,76       Ethernet19/1  19
-Ethernet60      77,78,79,80       Ethernet20/1  20
-Ethernet64      93,94,95,96       Ethernet21/1  21
-Ethernet68      89,90,91,92       Ethernet22/1  22
-Ethernet72      97,98,99,100      Ethernet23/1  23
-Ethernet76      101,102,103,104   Ethernet24/1  24
-Ethernet80      109,110,111,112   Ethernet25/1  25
-Ethernet84      105,106,107,108   Ethernet26/1  26
-Ethernet88      121,122,123,124   Ethernet27/1  27
-Ethernet92      125,126,127,128   Ethernet28/1  28
-Ethernet96      61,62,63,64       Ethernet29    29
-Ethernet100     57,58,59,60       Ethernet30    30
-Ethernet104     81,82,83,84       Ethernet31    31
-Ethernet108     85,86,87,88       Ethernet32    32
-Ethernet112     117,118,119,120   Ethernet33    33
-Ethernet116     113,114,115,116   Ethernet34    34
-Ethernet120     1,2,3,4           Ethernet35    35
-Ethernet124     5,6,7,8           Ethernet36    36
+# name          lanes             alias         index    speed
+Ethernet0       9                 Ethernet1     1        10000
+Ethernet1       10                Ethernet2     2        10000
+Ethernet2       11                Ethernet3     3        10000
+Ethernet3       12                Ethernet4     4        1000
+Ethernet4       13,14,15,16       Ethernet6/1   6        40000
+Ethernet8       17,18,19,20       Ethernet7/1   7        40000
+Ethernet12      21,22,23,24       Ethernet8/1   8        40000
+Ethernet16      29,30,31,32       Ethernet9/1   9        40000
+Ethernet20      25,26,27,28       Ethernet10/1  10       40000
+Ethernet24      33,34,35,36       Ethernet11/1  11       40000
+Ethernet28      37,38,39,40       Ethernet12/1  12       40000
+Ethernet32      45,46,47,48       Ethernet13/1  13       40000
+Ethernet36      41,42,43,44       Ethernet14/1  14       40000
+Ethernet40      49,50,51,52       Ethernet15/1  15       40000
+Ethernet44      53,54,55,56       Ethernet16/1  16       40000
+Ethernet48      69,70,71,72       Ethernet17/1  17       40000
+Ethernet52      65,66,67,68       Ethernet18/1  18       40000
+Ethernet56      73,74,75,76       Ethernet19/1  19       40000
+Ethernet60      77,78,79,80       Ethernet20/1  20       40000
+Ethernet64      93,94,95,96       Ethernet21/1  21       40000
+Ethernet68      89,90,91,92       Ethernet22/1  22       40000
+Ethernet72      97,98,99,100      Ethernet23/1  23       40000
+Ethernet76      101,102,103,104   Ethernet24/1  24       40000
+Ethernet80      109,110,111,112   Ethernet25/1  25       40000
+Ethernet84      105,106,107,108   Ethernet26/1  26       40000
+Ethernet88      121,122,123,124   Ethernet27/1  27       40000
+Ethernet92      125,126,127,128   Ethernet28/1  28       40000
+Ethernet96      61,62,63,64       Ethernet29    29       40000
+Ethernet100     57,58,59,60       Ethernet30    30       40000
+Ethernet104     81,82,83,84       Ethernet31    31       40000
+Ethernet108     85,86,87,88       Ethernet32    32       40000
+Ethernet112     117,118,119,120   Ethernet33    33       40000
+Ethernet116     113,114,115,116   Ethernet34    34       40000
+Ethernet120     1,2,3,4           Ethernet35    35       40000
+Ethernet124     5,6,7,8           Ethernet36    36       40000

From 86fb9eaf0642b0ebdf471c7c984ba0e6919779d0 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Wed, 20 Dec 2023 16:32:37 +0800
Subject: [PATCH 0083/1115] [submodule] Update submodule dhcprelay to the
 latest HEAD automatically (#17572)

#### Why I did it
src/dhcprelay
```
* 5ae186f - (HEAD -> master, origin/master, origin/HEAD) [counter] Clear counter table when init (#45) (10 hours ago) [Yaqiang Zhu]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/dhcprelay | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/dhcprelay b/src/dhcprelay
index 40c68778d..5ae186f4a 160000
--- a/src/dhcprelay
+++ b/src/dhcprelay
@@ -1 +1 @@
-Subproject commit 40c68778d4b7a0d6318f1ac271871b87d0058a8a
+Subproject commit 5ae186f4a6c25647f5ce7b4d2c884b08423455e7

From 1e92ba24ec6f4fe7b7fbcb6e1323e5ad360884df Mon Sep 17 00:00:00 2001
From: Xichen96 <lukelin0907@gmail.com>
Date: Thu, 21 Dec 2023 01:07:32 +0800
Subject: [PATCH 0084/1115] [dhcp_server] add show dhcp server info (#17468)

* add show dhcp server info
---
 .../cli-plugin-tests/mock_config_db.json      |  4 +-
 .../cli-plugin-tests/test_show_dhcp_server.py | 39 +++++++++++++++++++
 .../cli/show/plugins/show_dhcp_server.py      | 21 ++++++++++
 3 files changed, 61 insertions(+), 3 deletions(-)

diff --git a/dockers/docker-dhcp-server/cli-plugin-tests/mock_config_db.json b/dockers/docker-dhcp-server/cli-plugin-tests/mock_config_db.json
index c8f42d4c3..908c11435 100644
--- a/dockers/docker-dhcp-server/cli-plugin-tests/mock_config_db.json
+++ b/dockers/docker-dhcp-server/cli-plugin-tests/mock_config_db.json
@@ -7,9 +7,7 @@
         "lease_time": "3600",
         "mode": "PORT",
         "netmask": "255.255.255.0",
-        "customized_options": [
-            "option60"
-        ],
+        "customized_options": "option60",
         "state": "enabled"
     },
     "DHCP_SERVER_IPV4_CUSTOMIZED_OPTIONS|option60": {
diff --git a/dockers/docker-dhcp-server/cli-plugin-tests/test_show_dhcp_server.py b/dockers/docker-dhcp-server/cli-plugin-tests/test_show_dhcp_server.py
index a41650584..e461396ef 100644
--- a/dockers/docker-dhcp-server/cli-plugin-tests/test_show_dhcp_server.py
+++ b/dockers/docker-dhcp-server/cli-plugin-tests/test_show_dhcp_server.py
@@ -110,3 +110,42 @@ def test_show_dhcp_server_ipv4_range_single_ip(self, mock_db):
         assert result.exit_code == 0, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
         assert result.stdout == expected_stdout
 
+    def test_show_dhcp_server_ipv4_info_without_intf(self, mock_db):
+        expected_stdout = """\
+Interface    Mode    Gateway    Netmask          Lease Time(s)  State
+-----------  ------  ---------  -------------  ---------------  -------
+Vlan100      PORT    100.1.1.1  255.255.255.0             3600  enabled
+"""
+        runner = CliRunner()
+        db = clicommon.Db()
+        db.db = mock_db
+        result = runner.invoke(show_dhcp_server.dhcp_server.commands["ipv4"].commands["info"], [], obj=db)
+        assert result.exit_code == 0, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
+        assert result.stdout == expected_stdout
+
+    def test_show_dhcp_server_ipv4_info_with_intf(self, mock_db):
+        expected_stdout = """\
+Interface    Mode    Gateway    Netmask          Lease Time(s)  State
+-----------  ------  ---------  -------------  ---------------  -------
+Vlan100      PORT    100.1.1.1  255.255.255.0             3600  enabled
+"""
+        runner = CliRunner()
+        db = clicommon.Db()
+        db.db = mock_db
+        result = runner.invoke(show_dhcp_server.dhcp_server.commands["ipv4"].commands["info"], ["Vlan100"], obj=db)
+        assert result.exit_code == 0, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
+        assert result.stdout == expected_stdout
+
+    def test_show_dhcp_server_ipv4_info_with_customized_options(self, mock_db):
+        expected_stdout = """\
+Interface    Mode    Gateway    Netmask          Lease Time(s)  State    Customized Options
+-----------  ------  ---------  -------------  ---------------  -------  --------------------
+Vlan100      PORT    100.1.1.1  255.255.255.0             3600  enabled  option60
+"""
+        runner = CliRunner()
+        db = clicommon.Db()
+        db.db = mock_db
+        result = runner.invoke(show_dhcp_server.dhcp_server.commands["ipv4"].commands["info"], ["Vlan100", "--with_customized_options"], obj=db)
+        assert result.exit_code == 0, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
+        assert result.stdout == expected_stdout
+
diff --git a/dockers/docker-dhcp-server/cli/show/plugins/show_dhcp_server.py b/dockers/docker-dhcp-server/cli/show/plugins/show_dhcp_server.py
index 303216855..93e38af92 100644
--- a/dockers/docker-dhcp-server/cli/show/plugins/show_dhcp_server.py
+++ b/dockers/docker-dhcp-server/cli/show/plugins/show_dhcp_server.py
@@ -79,5 +79,26 @@ def range(db, range_name):
     click.echo(tabulate(table, headers=headers))
 
 
+@ipv4.command()
+@click.argument('dhcp_interface', required=False)
+@click.option('--with_customized_options', default=False, is_flag=True)
+@clicommon.pass_db
+def info(db, dhcp_interface, with_customized_options):
+    if not dhcp_interface:
+        dhcp_interface = "*"
+    headers = ["Interface", "Mode", "Gateway", "Netmask", "Lease Time(s)", "State"]
+    if with_customized_options:
+        headers.append("Customized Options")
+    table = []
+    dbconn = db.db
+    for key in dbconn.keys("CONFIG_DB", "DHCP_SERVER_IPV4|" + dhcp_interface):
+        entry = dbconn.get_all("CONFIG_DB", key)
+        interface = key.split("|")[1]
+        table.append([interface, entry["mode"], entry["gateway"], entry["netmask"], entry["lease_time"], entry["state"]])
+        if with_customized_options:
+            table[-1].append(entry["customized_options"])
+    click.echo(tabulate(table, headers=headers))
+
+
 def register(cli):
     cli.add_command(dhcp_server)

From 13a16cf87f1be857cb93aa2d3f82affcb350416b Mon Sep 17 00:00:00 2001
From: Xichen96 <lukelin0907@gmail.com>
Date: Thu, 21 Dec 2023 01:09:46 +0800
Subject: [PATCH 0085/1115] [dhcp_server] add config dhcp_server add (#17489)

* dhcp_server add
* add test dup gw nm
---
 .../cli-plugin-tests/conftest.py              |  16 +++
 .../cli-plugin-tests/mock_config_db.json      |  10 ++
 .../test_config_dhcp_server.py                | 115 ++++++++++++++++++
 .../cli/config/plugins/dhcp_server.py         |  94 ++++++++++++++
 4 files changed, 235 insertions(+)
 create mode 100644 dockers/docker-dhcp-server/cli-plugin-tests/test_config_dhcp_server.py

diff --git a/dockers/docker-dhcp-server/cli-plugin-tests/conftest.py b/dockers/docker-dhcp-server/cli-plugin-tests/conftest.py
index a51f76ac1..4dc078f76 100644
--- a/dockers/docker-dhcp-server/cli-plugin-tests/conftest.py
+++ b/dockers/docker-dhcp-server/cli-plugin-tests/conftest.py
@@ -48,8 +48,24 @@ def get(table, key, entry):
         if table == "STATE_DB":
             return mock_state_db.get(key, {}).get(entry, None)
 
+    def hmset(table, key, value):
+        assert table == "CONFIG_DB" or table == "STATE_DB"
+        if table == "CONFIG_DB":
+            mock_config_db[key] = value
+        if table == "STATE_DB":
+            mock_state_db[key] = value
+
+    def exists(table, key):
+        assert table == "CONFIG_DB" or table == "STATE_DB"
+        if table == "CONFIG_DB":
+            return key in mock_config_db
+        if table == "STATE_DB":
+            return key in mock_state_db
+
     db.keys = mock.Mock(side_effect=keys)
     db.get_all = mock.Mock(side_effect=get_all)
     db.get = mock.Mock(side_effect=get)
+    db.hmset = mock.Mock(side_effect=hmset)
+    db.exists = mock.Mock(side_effect=exists)
 
     yield db
diff --git a/dockers/docker-dhcp-server/cli-plugin-tests/mock_config_db.json b/dockers/docker-dhcp-server/cli-plugin-tests/mock_config_db.json
index 908c11435..751f716f6 100644
--- a/dockers/docker-dhcp-server/cli-plugin-tests/mock_config_db.json
+++ b/dockers/docker-dhcp-server/cli-plugin-tests/mock_config_db.json
@@ -2,6 +2,16 @@
     "FEATURE|dhcp_server": {
         "state": "enabled"
     },
+    "VLAN_INTERFACE|Vlan100": {
+    },
+    "VLAN_INTERFACE|Vlan100|100.1.1.1/24": {
+    },
+    "VLAN_INTERFACE|Vlan200": {
+    },
+    "VLAN_INTERFACE|Vlan200|100.1.1.2/24": {
+    },
+    "VLAN_INTERFACE|Vlan300": {
+    },
     "DHCP_SERVER_IPV4|Vlan100": {
         "gateway": "100.1.1.1",
         "lease_time": "3600",
diff --git a/dockers/docker-dhcp-server/cli-plugin-tests/test_config_dhcp_server.py b/dockers/docker-dhcp-server/cli-plugin-tests/test_config_dhcp_server.py
new file mode 100644
index 000000000..bc71154cc
--- /dev/null
+++ b/dockers/docker-dhcp-server/cli-plugin-tests/test_config_dhcp_server.py
@@ -0,0 +1,115 @@
+import sys
+from unittest import mock
+import pytest
+
+from click.testing import CliRunner
+
+import utilities_common.cli as clicommon
+
+sys.path.append('../cli/config/plugins/')
+import dhcp_server
+
+
+class TestConfigDHCPServer(object):
+    def test_plugin_registration(self):
+        cli = mock.MagicMock()
+        dhcp_server.register(cli)
+
+    str_type = [[12, "whatever", False],
+                ["text", "whatever", False],
+                ["string", "whatever", True],
+                ["binary", "12abc", False],
+                ["binary", "123abc45", True],
+                ["boolean", "True", False],
+                ["boolean", "true", True],
+                ["ipv4-address", "10.10.1", False],
+                ["ipv4-address", "10.10.1.0", True],
+                ["uint8", "4500", False],
+                ["uint8", "-45", False],
+                ["uint8", "45", True],
+                ]
+
+    @pytest.mark.parametrize("type, value, result", str_type)
+    def test_validate_str_type(self, type, value, result):
+        assert dhcp_server.validate_str_type(type, value) == result
+
+    def test_config_dhcp_server_ipv4_add(self, mock_db):
+        expected_value = {
+            "gateway": "10.10.10.10",
+            "lease_time": "1000",
+            "mode": "PORT",
+            "netmask": "255.255.254.0",
+            "state": "disabled"
+        }
+        runner = CliRunner()
+        db = clicommon.Db()
+        db.db = mock_db
+        result = runner.invoke(dhcp_server.dhcp_server.commands["ipv4"].commands["add"], \
+                ["Vlan200", "--mode=PORT", "--lease_time=1000", "--gateway=10.10.10.10", "--netmask=255.255.254.0"], obj=db)
+        assert result.exit_code == 0, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
+        assert mock_db.get_all("CONFIG_DB", "DHCP_SERVER_IPV4|Vlan200") == expected_value
+
+    def test_config_dhcp_server_ipv4_add_dup_gw_nm(self, mock_db):
+        expected_value = {
+            "gateway": "100.1.1.2",
+            "lease_time": "1000",
+            "mode": "PORT",
+            "netmask": "255.255.255.0",
+            "state": "disabled"
+        }
+        runner = CliRunner()
+        db = clicommon.Db()
+        db.db = mock_db
+        result = runner.invoke(dhcp_server.dhcp_server.commands["ipv4"].commands["add"], \
+                ["Vlan200", "--mode=PORT", "--lease_time=1000", "--dup_gw_nm"], obj=db)
+        assert result.exit_code == 0, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
+        assert mock_db.get_all("CONFIG_DB", "DHCP_SERVER_IPV4|Vlan200") == expected_value
+
+    def test_config_dhcp_server_ipv4_add_illegal_mode(self, mock_db):
+        runner = CliRunner()
+        db = clicommon.Db()
+        db.db = mock_db
+        result = runner.invoke(dhcp_server.dhcp_server.commands["ipv4"].commands["add"], \
+                ["Vlan200", "--mode=WHATEVER", "--lease_time=1000", "--gateway=10.10.10.10", "--netmask=255.255.254.0"], obj=db)
+        assert result.exit_code == 2, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
+
+    def test_config_dhcp_server_ipv4_add_illegal_lease_time(self, mock_db):
+        runner = CliRunner()
+        db = clicommon.Db()
+        db.db = mock_db
+        result = runner.invoke(dhcp_server.dhcp_server.commands["ipv4"].commands["add"], \
+                ["Vlan200", "--mode=PORT", "--lease_time=-1000", "--gateway=10.10.10.10", "--netmask=255.255.254.0"], obj=db)
+        assert result.exit_code == 2, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
+
+    def test_config_dhcp_server_ipv4_add_no_vlan(self, mock_db):
+        runner = CliRunner()
+        db = clicommon.Db()
+        db.db = mock_db
+        result = runner.invoke(dhcp_server.dhcp_server.commands["ipv4"].commands["add"], \
+                ["Vlan400", "--mode=PORT", "--lease_time=1000", "--gateway=10.10.10.10", "--netmask=255.255.254.0"], obj=db)
+        assert result.exit_code == 2, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
+
+    def test_config_dhcp_server_ipv4_add_no_vlan_ip(self, mock_db):
+        runner = CliRunner()
+        db = clicommon.Db()
+        db.db = mock_db
+        result = runner.invoke(dhcp_server.dhcp_server.commands["ipv4"].commands["add"], \
+                ["Vlan300", "--mode=PORT", "--lease_time=1000", "--dup_gw_nm"], obj=db)
+        assert result.exit_code == 2, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
+
+    def test_config_dhcp_server_ipv4_add_illegal_ip(self, mock_db):
+        runner = CliRunner()
+        db = clicommon.Db()
+        db.db = mock_db
+        result = runner.invoke(dhcp_server.dhcp_server.commands["ipv4"].commands["add"], \
+                ["Vlan200", "--mode=PORT", "--lease_time=1000", "--gateway=10000.10.10.10", "--netmask=255.255.254.0"], obj=db)
+        assert result.exit_code == 2, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
+
+    def test_config_dhcp_server_ipv4_add_already_exist(self, mock_db):
+        runner = CliRunner()
+        db = clicommon.Db()
+        db.db = mock_db
+        result = runner.invoke(dhcp_server.dhcp_server.commands["ipv4"].commands["add"], \
+                ["Vlan100", "--mode=PORT", "--lease_time=1000", "--gateway=10.10.10.10", "--netmask=255.255.254.0"], obj=db)
+        assert result.exit_code == 2, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
+
diff --git a/dockers/docker-dhcp-server/cli/config/plugins/dhcp_server.py b/dockers/docker-dhcp-server/cli/config/plugins/dhcp_server.py
index 539a71e6a..faf920b99 100644
--- a/dockers/docker-dhcp-server/cli/config/plugins/dhcp_server.py
+++ b/dockers/docker-dhcp-server/cli/config/plugins/dhcp_server.py
@@ -1,13 +1,107 @@
 import click
 import utilities_common.cli as clicommon
 
+import ipaddress
+import string
+
+
+SUPPORT_TYPE = ["binary", "boolean", "ipv4-address", "string", "uint8", "uint16", "uint32"]
+
+
+def validate_str_type(type, value):
+    """
+    To validate whether type is consistent with string value
+    Args:
+        type: string, value type
+        value: checked value
+    Returns:
+        True, type consistent with value
+        False, type not consistent with value
+    """
+    if not isinstance(value, str):
+        return False
+    if type not in SUPPORT_TYPE:
+        return False
+    if type == "string":
+        return True
+    if type == "binary":
+        if len(value) == 0 or len(value) % 2 != 0:
+            return False
+        return all(c in set(string.hexdigits) for c in value)
+    if type == "boolean":
+        return value in ["true", "false"]
+    if type == "ipv4-address":
+        try:
+            if len(value.split(".")) != 4:
+                return False
+            return ipaddress.ip_address(value).version == 4
+        except ValueError:
+            return False
+    if type.startswith("uint"):
+        if not value.isdigit():
+            return False
+        length = int("".join([c for c in type if c.isdigit()]))
+        return 0 <= int(value) <= int(pow(2, length)) - 1
+    return False
+
 
 @click.group(cls=clicommon.AbbreviationGroup, name="dhcp_server")
 def dhcp_server():
     """config DHCP Server information"""
+    ctx = click.get_current_context()
+    dbconn = db.db
+    if dbconn.get("CONFIG_DB", "FEATURE|dhcp_server", "state") != "enabled":
+        ctx.fail("Feature dhcp_server is not enabled")
+
+
+@dhcp_server.group(cls=clicommon.AliasedGroup, name="ipv4")
+def dhcp_server_ipv4():
+    """Show ipv4 related dhcp_server info"""
     pass
 
 
+@dhcp_server_ipv4.command(name="add")
+@click.argument("dhcp_interface", required=True)
+@click.option("--mode", required=True)
+@click.option("--lease_time", required=False, default="900")
+@click.option("--dup_gw_nm", required=False, default=False, is_flag=True)
+@click.option("--gateway", required=False)
+@click.option("--netmask", required=False)
+@clicommon.pass_db
+def dhcp_server_ipv4_add(db, mode, lease_time, dup_gw_nm, gateway, netmask, dhcp_interface):
+    ctx = click.get_current_context()
+    if mode != "PORT":
+        ctx.fail("Only mode PORT is supported")
+    if not validate_str_type("uint32", lease_time):
+        ctx.fail("lease_time is required and must be nonnegative integer")
+    dbconn = db.db
+    if not dbconn.exists("CONFIG_DB", "VLAN_INTERFACE|" + dhcp_interface):
+        ctx.fail("dhcp_interface {} does not exist".format(dhcp_interface))
+    if dup_gw_nm:
+        dup_success = False
+        for key in dbconn.keys("CONFIG_DB", "VLAN_INTERFACE|" + dhcp_interface + "|*"):
+            intf = ipaddress.ip_interface(key.split("|")[2])
+            if intf.version != 4:
+                continue
+            dup_success = True
+            gateway, netmask = str(intf.ip), str(intf.netmask)
+        if not dup_success:
+            ctx.fail("failed to found gateway and netmask for Vlan interface {}".format(dhcp_interface))
+    elif not validate_str_type("ipv4-address", gateway) or not validate_str_type("ipv4-address", netmask):
+        ctx.fail("gateway and netmask must be valid ipv4 string")
+    key = "DHCP_SERVER_IPV4|" + dhcp_interface
+    if dbconn.exists("CONFIG_DB", key):
+        ctx.fail("Dhcp_interface %s already exist".format(dhcp_interface))
+    else:
+        dbconn.hmset("CONFIG_DB", key, {
+            "mode": mode,
+            "lease_time": lease_time,
+            "gateway": gateway,
+            "netmask": netmask,
+            "state": "disabled",
+            })
+
+
 def register(cli):
     # cli.add_command(dhcp_server)
     pass

From d7a422e57a9663da36a0d18a528faccf31b68a1a Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Thu, 21 Dec 2023 15:26:40 +0800
Subject: [PATCH 0086/1115] [submodule] Update submodule linkmgrd to the latest
 HEAD automatically (#17588)

---
 src/linkmgrd | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/linkmgrd b/src/linkmgrd
index 79c3872b3..6586abfa8 160000
--- a/src/linkmgrd
+++ b/src/linkmgrd
@@ -1 +1 @@
-Subproject commit 79c3872b38b8ae464dd04907610657bb2a611360
+Subproject commit 6586abfa832f4995804ea0227b06f332bd5d354e

From d8926262537b9ad9d7cca880fb51b4eef7976571 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Thu, 21 Dec 2023 15:47:39 +0800
Subject: [PATCH 0087/1115] [submodule] Update submodule sonic-linux-kernel to
 the latest HEAD automatically (#17591)

---
 src/sonic-linux-kernel | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-linux-kernel b/src/sonic-linux-kernel
index 63705029d..5d83a17e5 160000
--- a/src/sonic-linux-kernel
+++ b/src/sonic-linux-kernel
@@ -1 +1 @@
-Subproject commit 63705029d7d3bbf480a18839a1e12524bd949fa5
+Subproject commit 5d83a17e5fd890d5f0113df422bb18d002e5d0c3

From d4a78665eeba62d597b8a6319dbc1a5ab5cfa775 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Fri, 22 Dec 2023 06:00:06 +0800
Subject: [PATCH 0088/1115] [submodule] Update submodule sonic-sairedis to the
 latest HEAD automatically (#17596)

---
 src/sonic-sairedis | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-sairedis b/src/sonic-sairedis
index e8491609b..c774f13ad 160000
--- a/src/sonic-sairedis
+++ b/src/sonic-sairedis
@@ -1 +1 @@
-Subproject commit e8491609b609310c788bc007d103c7b6ff87af9d
+Subproject commit c774f13ad7f50efb7734baba22b1bb6b757eca2c

From 08666100fcde33bcb8025df8ae411b877ef78243 Mon Sep 17 00:00:00 2001
From: Xichen96 <lukelin0907@gmail.com>
Date: Sat, 23 Dec 2023 01:07:24 +0800
Subject: [PATCH 0089/1115] [dhcp_server] add config dhcp server del (#17603)

* add config dhcp server del
---
 .../cli-plugin-tests/conftest.py                  |  9 +++++++++
 .../cli-plugin-tests/test_config_dhcp_server.py   | 15 +++++++++++++++
 .../cli/config/plugins/dhcp_server.py             | 14 ++++++++++++++
 3 files changed, 38 insertions(+)

diff --git a/dockers/docker-dhcp-server/cli-plugin-tests/conftest.py b/dockers/docker-dhcp-server/cli-plugin-tests/conftest.py
index 4dc078f76..560e25667 100644
--- a/dockers/docker-dhcp-server/cli-plugin-tests/conftest.py
+++ b/dockers/docker-dhcp-server/cli-plugin-tests/conftest.py
@@ -62,10 +62,19 @@ def exists(table, key):
         if table == "STATE_DB":
             return key in mock_state_db
 
+    def delete(table, key):
+        assert table == "CONFIG_DB" or table == "STATE_DB"
+        if table == "CONFIG_DB":
+            del mock_config_db[key]
+        if table == "STATE_DB":
+            del mock_state_db[key]
+
+
     db.keys = mock.Mock(side_effect=keys)
     db.get_all = mock.Mock(side_effect=get_all)
     db.get = mock.Mock(side_effect=get)
     db.hmset = mock.Mock(side_effect=hmset)
     db.exists = mock.Mock(side_effect=exists)
+    db.delete = mock.Mock(side_effect=delete)
 
     yield db
diff --git a/dockers/docker-dhcp-server/cli-plugin-tests/test_config_dhcp_server.py b/dockers/docker-dhcp-server/cli-plugin-tests/test_config_dhcp_server.py
index bc71154cc..17add53a2 100644
--- a/dockers/docker-dhcp-server/cli-plugin-tests/test_config_dhcp_server.py
+++ b/dockers/docker-dhcp-server/cli-plugin-tests/test_config_dhcp_server.py
@@ -113,3 +113,18 @@ def test_config_dhcp_server_ipv4_add_already_exist(self, mock_db):
                 ["Vlan100", "--mode=PORT", "--lease_time=1000", "--gateway=10.10.10.10", "--netmask=255.255.254.0"], obj=db)
         assert result.exit_code == 2, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
 
+    def test_config_dhcp_server_ipv4_del_already_exist(self, mock_db):
+        runner = CliRunner()
+        db = clicommon.Db()
+        db.db = mock_db
+        result = runner.invoke(dhcp_server.dhcp_server.commands["ipv4"].commands["del"], ["Vlan100"], obj=db)
+        assert result.exit_code == 0, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
+        assert mock_db.exists("CONFIG_DB", "DHCP_SERVER_IPV4|Vlan100") == False
+
+    def test_config_dhcp_server_ipv4_del_does_not_exist(self, mock_db):
+        runner = CliRunner()
+        db = clicommon.Db()
+        db.db = mock_db
+        result = runner.invoke(dhcp_server.dhcp_server.commands["ipv4"].commands["del"], ["Vlan200"], obj=db)
+        assert result.exit_code == 2, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
+
diff --git a/dockers/docker-dhcp-server/cli/config/plugins/dhcp_server.py b/dockers/docker-dhcp-server/cli/config/plugins/dhcp_server.py
index faf920b99..45475e3f6 100644
--- a/dockers/docker-dhcp-server/cli/config/plugins/dhcp_server.py
+++ b/dockers/docker-dhcp-server/cli/config/plugins/dhcp_server.py
@@ -102,6 +102,20 @@ def dhcp_server_ipv4_add(db, mode, lease_time, dup_gw_nm, gateway, netmask, dhcp
             })
 
 
+@dhcp_server_ipv4.command(name="del")
+@click.argument("dhcp_interface", required=True)
+@clicommon.pass_db
+def dhcp_server_ipv4_del(db, dhcp_interface):
+    ctx = click.get_current_context()
+    dbconn = db.db
+    key = "DHCP_SERVER_IPV4|" + dhcp_interface
+    if dbconn.exists("CONFIG_DB", key):
+        click.echo("Dhcp interface %s exists in config db, proceed to delete".format(dhcp_interface))
+        dbconn.delete("CONFIG_DB", key)
+    else:
+        ctx.fail("Dhcp interface %s does not exist in config db".format(dhcp_interface))
+
+
 def register(cli):
     # cli.add_command(dhcp_server)
     pass

From c0bc1d9753d7ded820f2965f5e74abf42bd5c231 Mon Sep 17 00:00:00 2001
From: bktsim <144830673+bktsim-arista@users.noreply.github.com>
Date: Fri, 22 Dec 2023 17:10:41 -0800
Subject: [PATCH 0090/1115] [Arista] Remove aggregate port config files for
 multi-asic devices (#16923)

An aggregate port_config.ini file for Arista multi-asic devices was first introduced by mistake. This PR cleans up these unnecessary files.
---
 .../Arista-7800R3A-36D2-C36/port_config.ini   | 41 ----------
 .../Arista-7800R3A-36D2-C72/port_config.ini   | 77 -------------------
 .../Arista-7800R3A-36D2-D36/port_config.ini   | 41 ----------
 3 files changed, 159 deletions(-)
 delete mode 100644 device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/port_config.ini
 delete mode 100644 device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/port_config.ini
 delete mode 100644 device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/port_config.ini

diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/port_config.ini b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/port_config.ini
deleted file mode 100644
index 268ba635e..000000000
--- a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/port_config.ini
+++ /dev/null
@@ -1,41 +0,0 @@
-# name         lanes             alias        index  role       speed       asic_port_name     coreId      corePortId      numVoq
-Ethernet0      72,73,74,75       Ethernet1/1  1      Ext        100000      Eth0-ASIC0         1           1               8
-Ethernet8      80,81,82,83       Ethernet2/1  2      Ext        100000      Eth8-ASIC0         1           2               8
-Ethernet16     88,89,90,91       Ethernet3/1  3      Ext        100000      Eth16-ASIC0        1           3               8
-Ethernet24     96,97,98,99       Ethernet4/1  4      Ext        100000      Eth24-ASIC0        1           4               8
-Ethernet32     104,105,106,107   Ethernet5/1  5      Ext        100000      Eth32-ASIC0        1           5               8
-Ethernet40     112,113,114,115   Ethernet6/1  6      Ext        100000      Eth40-ASIC0        1           6               8
-Ethernet48     120,121,122,123   Ethernet7/1  7      Ext        100000      Eth48-ASIC0        1           7               8
-Ethernet56     128,129,130,131   Ethernet8/1  8      Ext        100000      Eth56-ASIC0        1           8               8
-Ethernet64     136,137,138,139   Ethernet9/1  9      Ext        100000      Eth64-ASIC0        1           9               8
-Ethernet72     64,65,66,67       Ethernet10/1 10     Ext        100000      Eth72-ASIC0        0           10              8
-Ethernet80     56,57,58,59       Ethernet11/1 11     Ext        100000      Eth80-ASIC0        0           11              8
-Ethernet88     48,49,50,51       Ethernet12/1 12     Ext        100000      Eth88-ASIC0        0           12              8
-Ethernet96     40,41,42,43       Ethernet13/1 13     Ext        100000      Eth96-ASIC0        0           13              8
-Ethernet104    32,33,34,35       Ethernet14/1 14     Ext        100000      Eth104-ASIC0       0           14              8
-Ethernet112    24,25,26,27       Ethernet15/1 15     Ext        100000      Eth112-ASIC0       0           15              8
-Ethernet120    16,17,18,19       Ethernet16/1 16     Ext        100000      Eth120-ASIC0       0           16              8
-Ethernet128    8,9,10,11         Ethernet17/1 17     Ext        100000      Eth128-ASIC0       0           17              8
-Ethernet136    0,1,2,3           Ethernet18/1 18     Ext        100000      Eth136-ASIC0       0           18              8
-Ethernet144    72,73,74,75       Ethernet19/1 19     Ext        100000      Eth0-ASIC1         1           1               8
-Ethernet152    80,81,82,83       Ethernet20/1 20     Ext        100000      Eth8-ASIC1         1           2               8
-Ethernet160    88,89,90,91       Ethernet21/1 21     Ext        100000      Eth16-ASIC1        1           3               8
-Ethernet168    96,97,98,99       Ethernet22/1 22     Ext        100000      Eth24-ASIC1        1           4               8
-Ethernet176    104,105,106,107   Ethernet23/1 23     Ext        100000      Eth32-ASIC1        1           5               8
-Ethernet184    112,113,114,115   Ethernet24/1 24     Ext        100000      Eth40-ASIC1        1           6               8
-Ethernet192    120,121,122,123   Ethernet25/1 25     Ext        100000      Eth48-ASIC1        1           7               8
-Ethernet200    128,129,130,131   Ethernet26/1 26     Ext        100000      Eth56-ASIC1        1           8               8
-Ethernet208    136,137,138,139   Ethernet27/1 27     Ext        100000      Eth64-ASIC1        1           9               8
-Ethernet216    64,65,66,67       Ethernet28/1 28     Ext        100000      Eth72-ASIC1        0           10              8
-Ethernet224    56,57,58,59       Ethernet29/1 29     Ext        100000      Eth80-ASIC1        0           11              8
-Ethernet232    48,49,50,51       Ethernet30/1 30     Ext        100000      Eth88-ASIC1        0           12              8
-Ethernet240    40,41,42,43       Ethernet31/1 31     Ext        100000      Eth96-ASIC1        0           13              8
-Ethernet248    32,33,34,35       Ethernet32/1 32     Ext        100000      Eth104-ASIC1       0           14              8
-Ethernet256    24,25,26,27       Ethernet33/1 33     Ext        100000      Eth112-ASIC1       0           15              8
-Ethernet264    16,17,18,19       Ethernet34/1 34     Ext        100000      Eth120-ASIC1       0           16              8
-Ethernet272    8,9,10,11         Ethernet35/1 35     Ext        100000      Eth128-ASIC1       0           17              8
-Ethernet280    0,1,2,3           Ethernet36/1 36     Ext        100000      Eth136-ASIC1       0           18              8
-Ethernet-Rec0  249               Recirc0/0    37     Rec        400000      Rcy0-ASIC0         0           49              8
-Ethernet-IB0   250               Recirc0/1    38     Inb        400000      Rcy1-ASIC0         1           50              8
-Ethernet-Rec1  249               Recirc0/0    39     Rec        400000      Rcy0-ASIC1         0           49              8
-Ethernet-IB1   250               Recirc0/1    40     Inb        400000      Rcy1-ASIC1         1           50              8
diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/port_config.ini b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/port_config.ini
deleted file mode 100644
index d23b2070d..000000000
--- a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/port_config.ini
+++ /dev/null
@@ -1,77 +0,0 @@
-# name         lanes             alias        index  role       speed      asic_port_name     coreId      corePortId      numVoq
-Ethernet0      72,73,74,75       Ethernet1/1  1      Ext        100000      Eth0-ASIC0         1           1               8
-Ethernet4      76,77,78,79       Ethernet1/5  1      Ext        100000      Eth4-ASIC0         1           2               8
-Ethernet8      80,81,82,83       Ethernet2/1  2      Ext        100000      Eth8-ASIC0         1           3               8
-Ethernet12     84,85,86,87       Ethernet2/5  2      Ext        100000      Eth12-ASIC0        1           4               8
-Ethernet16     88,89,90,91       Ethernet3/1  3      Ext        100000      Eth16-ASIC0        1           5               8
-Ethernet20     92,93,94,95       Ethernet3/5  3      Ext        100000      Eth20-ASIC0        1           6               8
-Ethernet24     96,97,98,99       Ethernet4/1  4      Ext        100000      Eth24-ASIC0        1           7               8
-Ethernet28     100,101,102,103   Ethernet4/5  4      Ext        100000      Eth28-ASIC0        1           8               8
-Ethernet32     104,105,106,107   Ethernet5/1  5      Ext        100000      Eth32-ASIC0        1           9               8
-Ethernet36     108,109,110,111   Ethernet5/5  5      Ext        100000      Eth36-ASIC0        1           10              8
-Ethernet40     112,113,114,115   Ethernet6/1  6      Ext        100000      Eth40-ASIC0        1           11              8
-Ethernet44     116,117,118,119   Ethernet6/5  6      Ext        100000      Eth44-ASIC0        1           12              8
-Ethernet48     120,121,122,123   Ethernet7/1  7      Ext        100000      Eth48-ASIC0        1           13              8
-Ethernet52     124,125,126,127   Ethernet7/5  7      Ext        100000      Eth52-ASIC0        1           14              8
-Ethernet56     128,129,130,131   Ethernet8/1  8      Ext        100000      Eth56-ASIC0        1           15              8
-Ethernet60     132,133,134,135   Ethernet8/5  8      Ext        100000      Eth60-ASIC0        1           16              8
-Ethernet64     136,137,138,139   Ethernet9/1  9      Ext        100000      Eth64-ASIC0        1           17              8
-Ethernet68     140,141,142,143   Ethernet9/5  9      Ext        100000      Eth68-ASIC0        1           18              8
-Ethernet72     64,65,66,67       Ethernet10/1 10     Ext        100000      Eth72-ASIC0        0           19              8
-Ethernet76     68,69,70,71       Ethernet10/5 10     Ext        100000      Eth76-ASIC0        0           20              8
-Ethernet80     56,57,58,59       Ethernet11/1 11     Ext        100000      Eth80-ASIC0        0           21              8
-Ethernet84     60,61,62,63       Ethernet11/5 11     Ext        100000      Eth84-ASIC0        0           22              8
-Ethernet88     48,49,50,51       Ethernet12/1 12     Ext        100000      Eth88-ASIC0        0           23              8
-Ethernet92     52,53,54,55       Ethernet12/5 12     Ext        100000      Eth92-ASIC0        0           24              8
-Ethernet96     40,41,42,43       Ethernet13/1 13     Ext        100000      Eth96-ASIC0        0           25              8
-Ethernet100    44,45,46,47       Ethernet13/5 13     Ext        100000      Eth100-ASIC0       0           26              8
-Ethernet104    32,33,34,35       Ethernet14/1 14     Ext        100000      Eth104-ASIC0       0           27              8
-Ethernet108    36,37,38,39       Ethernet14/5 14     Ext        100000      Eth108-ASIC0       0           28              8
-Ethernet112    24,25,26,27       Ethernet15/1 15     Ext        100000      Eth112-ASIC0       0           29              8
-Ethernet116    28,29,30,31       Ethernet15/5 15     Ext        100000      Eth116-ASIC0       0           30              8
-Ethernet120    16,17,18,19       Ethernet16/1 16     Ext        100000      Eth120-ASIC0       0           31              8
-Ethernet124    20,21,22,23       Ethernet16/5 16     Ext        100000      Eth124-ASIC0       0           32              8
-Ethernet128    8,9,10,11         Ethernet17/1 17     Ext        100000      Eth128-ASIC0       0           33              8
-Ethernet132    12,13,14,15       Ethernet17/5 17     Ext        100000      Eth132-ASIC0       0           34              8
-Ethernet136    0,1,2,3           Ethernet18/1 18     Ext        100000      Eth136-ASIC0       0           35              8
-Ethernet140    4,5,6,7           Ethernet18/5 18     Ext        100000      Eth140-ASIC0       0           36              8
-Ethernet144    72,73,74,75       Ethernet19/1 19     Ext        100000      Eth144-ASIC1       1           1               8
-Ethernet148    76,77,78,79       Ethernet19/5 19     Ext        100000      Eth148-ASIC1       1           2               8
-Ethernet152    80,81,82,83       Ethernet20/1 20     Ext        100000      Eth152-ASIC1       1           3               8
-Ethernet156    84,85,86,87       Ethernet20/5 20     Ext        100000      Eth156-ASIC1       1           4               8
-Ethernet160    88,89,90,91       Ethernet21/1 21     Ext        100000      Eth160-ASIC1       1           5               8
-Ethernet164    92,93,94,95       Ethernet21/5 21     Ext        100000      Eth164-ASIC1       1           6               8
-Ethernet168    96,97,98,99       Ethernet22/1 22     Ext        100000      Eth168-ASIC1       1           7               8
-Ethernet172    100,101,102,103   Ethernet22/5 22     Ext        100000      Eth172-ASIC1       1           8               8
-Ethernet176    104,105,106,107   Ethernet23/1 23     Ext        100000      Eth176-ASIC1       1           9               8
-Ethernet180    108,109,110,111   Ethernet23/5 23     Ext        100000      Eth180-ASIC1       1           10              8
-Ethernet184    112,113,114,115   Ethernet24/1 24     Ext        100000      Eth184-ASIC1       1           11              8
-Ethernet188    116,117,118,119   Ethernet24/5 24     Ext        100000      Eth188-ASIC1       1           12              8
-Ethernet192    120,121,122,123   Ethernet25/1 25     Ext        100000      Eth192-ASIC1       1           13              8
-Ethernet196    124,125,126,127   Ethernet25/5 25     Ext        100000      Eth196-ASIC1       1           14              8
-Ethernet200    128,129,130,131   Ethernet26/1 26     Ext        100000      Eth200-ASIC1       1           15              8
-Ethernet204    132,133,134,135   Ethernet26/5 26     Ext        100000      Eth204-ASIC1       1           16              8
-Ethernet208    136,137,138,139   Ethernet27/1 27     Ext        100000      Eth208-ASIC1       1           17              8
-Ethernet212    140,141,142,143   Ethernet27/5 27     Ext        100000      Eth212-ASIC1       1           18              8
-Ethernet216    64,65,66,67       Ethernet28/1 28     Ext        100000      Eth216-ASIC1       0           19              8
-Ethernet220    68,69,70,71       Ethernet28/5 28     Ext        100000      Eth220-ASIC1       0           20              8
-Ethernet224    56,57,58,59       Ethernet29/1 29     Ext        100000      Eth224-ASIC1       0           21              8
-Ethernet228    60,61,62,63       Ethernet29/5 29     Ext        100000      Eth228-ASIC1       0           22              8
-Ethernet232    48,49,50,51       Ethernet30/1 30     Ext        100000      Eth232-ASIC1       0           23              8
-Ethernet236    52,53,54,55       Ethernet30/5 30     Ext        100000      Eth236-ASIC1       0           24              8
-Ethernet240    40,41,42,43       Ethernet31/1 31     Ext        100000      Eth240-ASIC1       0           25              8
-Ethernet244    44,45,46,47       Ethernet31/5 31     Ext        100000      Eth244-ASIC1       0           26              8
-Ethernet248    32,33,34,35       Ethernet32/1 32     Ext        100000      Eth248-ASIC1       0           27              8
-Ethernet252    36,37,38,39       Ethernet32/5 32     Ext        100000      Eth252-ASIC1       0           28              8
-Ethernet256    24,25,26,27       Ethernet33/1 33     Ext        100000      Eth256-ASIC1       0           29              8
-Ethernet260    28,29,30,31       Ethernet33/5 33     Ext        100000      Eth260-ASIC1       0           30              8
-Ethernet264    16,17,18,19       Ethernet34/1 34     Ext        100000      Eth264-ASIC1       0           31              8
-Ethernet268    20,21,22,23       Ethernet34/5 34     Ext        100000      Eth268-ASIC1       0           32              8
-Ethernet272    8,9,10,11         Ethernet35/1 35     Ext        100000      Eth272-ASIC1       0           33              8
-Ethernet276    12,13,14,15       Ethernet35/5 35     Ext        100000      Eth276-ASIC1       0           34              8
-Ethernet280    0,1,2,3           Ethernet36/1 36     Ext        100000      Eth280-ASIC1       0           35              8
-Ethernet284    4,5,6,7           Ethernet36/5 36     Ext        100000      Eth284-ASIC1       0           36              8
-Ethernet-Rec0  221               Recirc0/0    37     Rec        400000      Rcy0-ASIC0         0           221             8
-Ethernet-IB0   222               Recirc0/1    38     Inb        400000      Rcy1-ASIC0         1           222             8
-Ethernet-Rec1  221               Recirc0/0    39     Rec        400000      Rcy0-ASIC1         0           221             8
-Ethernet-IB1   222               Recirc0/1    40     Inb        400000      Rcy1-ASIC1         1           222             8
diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/port_config.ini b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/port_config.ini
deleted file mode 100644
index 37a8915cf..000000000
--- a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/port_config.ini
+++ /dev/null
@@ -1,41 +0,0 @@
-# name         lanes                             alias        index  role       speed       asic_port_name     coreId      corePortId      numVoq
-Ethernet0      72,73,74,75,76,77,78,79           Ethernet1/1  1      Ext        400000      Eth0-ASIC0         1           1               8
-Ethernet8      80,81,82,83,84,85,86,87           Ethernet2/1  2      Ext        400000      Eth8-ASIC0         1           2               8
-Ethernet16     88,89,90,91,92,93,94,95           Ethernet3/1  3      Ext        400000      Eth16-ASIC0        1           3               8
-Ethernet24     96,97,98,99,100,101,102,103       Ethernet4/1  4      Ext        400000      Eth24-ASIC0        1           4               8
-Ethernet32     104,105,106,107,108,109,110,111   Ethernet5/1  5      Ext        400000      Eth32-ASIC0        1           5               8
-Ethernet40     112,113,114,115,116,117,118,119   Ethernet6/1  6      Ext        400000      Eth40-ASIC0        1           6               8
-Ethernet48     120,121,122,123,124,125,126,127   Ethernet7/1  7      Ext        400000      Eth48-ASIC0        1           7               8
-Ethernet56     128,129,130,131,132,133,134,135   Ethernet8/1  8      Ext        400000      Eth56-ASIC0        1           8               8
-Ethernet64     136,137,138,139,140,141,142,143   Ethernet9/1  9      Ext        400000      Eth64-ASIC0        1           9               8
-Ethernet72     64,65,66,67,68,69,70,71           Ethernet10/1 10     Ext        400000      Eth72-ASIC0        0           10              8
-Ethernet80     56,57,58,59,60,61,62,63           Ethernet11/1 11     Ext        400000      Eth80-ASIC0        0           11              8
-Ethernet88     48,49,50,51,52,53,54,55           Ethernet12/1 12     Ext        400000      Eth88-ASIC0        0           12              8
-Ethernet96     40,41,42,43,44,45,46,47           Ethernet13/1 13     Ext        400000      Eth96-ASIC0        0           13              8
-Ethernet104    32,33,34,35,36,37,38,39           Ethernet14/1 14     Ext        400000      Eth104-ASIC0       0           14              8
-Ethernet112    24,25,26,27,28,29,30,31           Ethernet15/1 15     Ext        400000      Eth112-ASIC0       0           15              8
-Ethernet120    16,17,18,19,20,21,22,23           Ethernet16/1 16     Ext        400000      Eth120-ASIC0       0           16              8
-Ethernet128    8,9,10,11,12,13,14,15             Ethernet17/1 17     Ext        400000      Eth128-ASIC0       0           17              8
-Ethernet136    0,1,2,3,4,5,6,7                   Ethernet18/1 18     Ext        400000      Eth136-ASIC0       0           18              8
-Ethernet144    72,73,74,75,76,77,78,79           Ethernet19/1 19     Ext        400000      Eth0-ASIC1         1           1               8
-Ethernet152    80,81,82,83,84,85,86,87           Ethernet20/1 20     Ext        400000      Eth8-ASIC1         1           2               8
-Ethernet160    88,89,90,91,92,93,94,95           Ethernet21/1 21     Ext        400000      Eth16-ASIC1        1           3               8
-Ethernet168    96,97,98,99,100,101,102,103       Ethernet22/1 22     Ext        400000      Eth24-ASIC1        1           4               8
-Ethernet176    104,105,106,107,108,109,110,111   Ethernet23/1 23     Ext        400000      Eth32-ASIC1        1           5               8
-Ethernet184    112,113,114,115,116,117,118,119   Ethernet24/1 24     Ext        400000      Eth40-ASIC1        1           6               8
-Ethernet192    120,121,122,123,124,125,126,127   Ethernet25/1 25     Ext        400000      Eth48-ASIC1        1           7               8
-Ethernet200    128,129,130,131,132,133,134,135   Ethernet26/1 26     Ext        400000      Eth56-ASIC1        1           8               8
-Ethernet208    136,137,138,139,140,141,142,143   Ethernet27/1 27     Ext        400000      Eth64-ASIC1        1           9               8
-Ethernet216    64,65,66,67,68,69,70,71           Ethernet28/1 28     Ext        400000      Eth72-ASIC1        0           10              8
-Ethernet224    56,57,58,59,60,61,62,63           Ethernet29/1 29     Ext        400000      Eth80-ASIC1        0           11              8
-Ethernet232    48,49,50,51,52,53,54,55           Ethernet30/1 30     Ext        400000      Eth88-ASIC1        0           12              8
-Ethernet240    40,41,42,43,44,45,46,47           Ethernet31/1 31     Ext        400000      Eth96-ASIC1        0           13              8
-Ethernet248    32,33,34,35,36,37,38,39           Ethernet32/1 32     Ext        400000      Eth104-ASIC1       0           14              8
-Ethernet256    24,25,26,27,28,29,30,31           Ethernet33/1 33     Ext        400000      Eth112-ASIC1       0           15              8
-Ethernet264    16,17,18,19,20,21,22,23           Ethernet34/1 34     Ext        400000      Eth120-ASIC1       0           16              8
-Ethernet272    8,9,10,11,12,13,14,15             Ethernet35/1 35     Ext        400000      Eth128-ASIC1       0           17              8
-Ethernet280    0,1,2,3,4,5,6,7                   Ethernet36/1 36     Ext        400000      Eth136-ASIC1       0           18              8
-Ethernet-Rec0  249                               Recirc0/0    37     Rec        400000      Rcy0-ASIC0         0           49              8
-Ethernet-IB0   250                               Recirc0/1    38     Inb        400000      Rcy1-ASIC0         1           50              8
-Ethernet-Rec1  249                               Recirc0/0    39     Rec        400000      Rcy0-ASIC1         0           49              8
-Ethernet-IB1   250                               Recirc0/1    40     Inb        400000      Rcy1-ASIC1         1           50              8

From 18dd948e6033123da6de0ab5e26fb96c11227c56 Mon Sep 17 00:00:00 2001
From: Vivek <vkarri@nvidia.com>
Date: Mon, 25 Dec 2023 01:13:19 -0800
Subject: [PATCH 0091/1115] Fix kdump-tools to not overwrite MODULES conf to
 dep (#17490)

- Why I did it
Fix kdump-tools to not overwrite MODULES conf to dep. Problem is seen if the build is failed and the build is retriggered immediately as part of retry mechanism
This command is failing during the second run

+ for kernel_release in $(ls $FILESYSTEM_ROOT/lib/modules/)
+ sudo LANG=C chroot ./fsroot-mellanox /etc/kernel/postinst.d/kdump-tools 6.1.0-11-2-amd64
+ clean_sys
https://github.com/sonic-net/sonic-buildimage/blob/master/files/build_templates/sonic_debian_extension.j2#L311

Community Issue: https://www.mail-archive.com/kernel-packages@lists.launchpad.net/msg515013.html

- How I did it
Add a patch to revert the override

- How to verify it
vkarri@482a053c44f4:/sonic$ sudo unsquashfs -d ./fsroot-mellanox target/sonic-mellanox.bin__mellanox__rfs.squashfs

Signed-off-by: Vivek Reddy <vkarri@nvidia.com>
---
 ...-Revert-the-MODULES-dep-optimization.patch | 35 +++++++++++++++++++
 src/kdump-tools/patch/series                  |  1 +
 2 files changed, 36 insertions(+)
 create mode 100644 src/kdump-tools/patch/0003-Revert-the-MODULES-dep-optimization.patch

diff --git a/src/kdump-tools/patch/0003-Revert-the-MODULES-dep-optimization.patch b/src/kdump-tools/patch/0003-Revert-the-MODULES-dep-optimization.patch
new file mode 100644
index 000000000..e8f7e07e4
--- /dev/null
+++ b/src/kdump-tools/patch/0003-Revert-the-MODULES-dep-optimization.patch
@@ -0,0 +1,35 @@
+From 9f15d2abc8c39bc6eae6ffaccbb3a5d9d4fa84b8 Mon Sep 17 00:00:00 2001
+From: Vivek Reddy <vkarri@nvidia.com>
+Date: Tue, 12 Dec 2023 11:15:54 +0200
+Subject: [PATCH] Revert the MODULES=dep optimization to reduce the size of initramfs
+
+kdump-tools command is failing in chroot because of this optimization
+Overriding the MODULES to dep is causing mkinitramfs to search for the 
+block device where the / is mounted
+Ref: https://www.mail-archive.com/kernel-packages@lists.launchpad.net/msg515013.html
+
+Signed-off-by: Vivek Reddy <vkarri@nvidia.com>
+---
+ debian/kernel-postinst-generate-initrd | 6 ------
+ 1 file changed, 6 deletions(-)
+
+diff --git a/debian/kernel-postinst-generate-initrd b/debian/kernel-postinst-generate-initrd
+index 1140c40..96a0f15 100755
+--- a/debian/kernel-postinst-generate-initrd
++++ b/debian/kernel-postinst-generate-initrd
+@@ -40,12 +40,6 @@ for conf_file in /etc/initramfs-tools/conf.d/*; do
+ 	fi
+ done
+ 
+-if test "${MODULES-most}" = most; then
+-	# Switch from "most" to "dep" to reduce the size of the initramfs.
+-	# "netboot" and "list" are expected to be already small enough.
+-	KDUMP_MODULES=dep
+-fi
+-
+ # We need a modified copy of initramfs-tools directory
+ # with MODULES=dep in initramfs.conf
+ if [ ! -d "$kdumpdir" ];then
+-- 
+2.41.0
+
diff --git a/src/kdump-tools/patch/series b/src/kdump-tools/patch/series
index c45a72202..0af2c9760 100644
--- a/src/kdump-tools/patch/series
+++ b/src/kdump-tools/patch/series
@@ -1 +1,2 @@
 0002-core-file-prefixed-by-kdump.patch
+0003-Revert-the-MODULES-dep-optimization.patch

From 80f2f6bce13ca7741422c967b622223bb9b6cfa5 Mon Sep 17 00:00:00 2001
From: davidpil2002 <91657985+davidpil2002@users.noreply.github.com>
Date: Mon, 25 Dec 2023 11:14:17 +0200
Subject: [PATCH 0092/1115] password-hardening: Add support to disable
 expiration date like in Linux (PAM) (#17426)

- Why I did it
Enhance the feature to support disabling password hardening as Linux support.
-1: expiration will never occur
0: expiration will expired immediately

Opened bug:
#17427

- How I did it
Added the -1 value to be supported in hostcfgd and this value will propagate to the relevant Linux files

- How to verify it
Pls see the details in the bug description that link attached above
---
 src/sonic-yang-models/yang-models/sonic-passwh.yang | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/src/sonic-yang-models/yang-models/sonic-passwh.yang b/src/sonic-yang-models/yang-models/sonic-passwh.yang
index 347a74018..5047b40c5 100755
--- a/src/sonic-yang-models/yang-models/sonic-passwh.yang
+++ b/src/sonic-yang-models/yang-models/sonic-passwh.yang
@@ -28,14 +28,14 @@ module sonic-passwh {
                 }
                 leaf expiration {
                     description "expiration time (days unit)";
-                    type uint16 {
-                        range 1..365;
+                    type int16 {
+                        range -1..365;
                     }
                 }
                 leaf expiration_warning {
                     description "expiration warning time (days unit)";
-                    type uint8 {
-                        range 1..30;
+                    type int8 {
+                        range -1..30;
                     }
                 }
                 leaf history_cnt {

From 7d388cd0e66e9e156e36f4408de736abdb3ded69 Mon Sep 17 00:00:00 2001
From: Junchao-Mellanox <57339448+Junchao-Mellanox@users.noreply.github.com>
Date: Wed, 27 Dec 2023 00:27:18 +0800
Subject: [PATCH 0093/1115] [Mellanox] wait until hw-management watchdog files
 ready (#17618)

- Why I did it
watchdog-control service always disarm watchdog during system startup stage. It could be the case that watchdog is not fully initialized while the watchdog-control service is accessing it. This PR adds a wait to make sure watchdog has been fully initialized.

- How I did it
adds a wait to make sure watchdog has been fully initialized.

- How to verify it
Manual test
sonic regression
---
 platform/mellanox/mlnx-platform-api/sonic_platform/watchdog.py | 3 ++-
 platform/mellanox/mlnx-platform-api/tests/test_watchdog.py     | 2 ++
 2 files changed, 4 insertions(+), 1 deletion(-)

diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/watchdog.py b/platform/mellanox/mlnx-platform-api/sonic_platform/watchdog.py
index 630163c12..9e16b6d69 100644
--- a/platform/mellanox/mlnx-platform-api/sonic_platform/watchdog.py
+++ b/platform/mellanox/mlnx-platform-api/sonic_platform/watchdog.py
@@ -283,7 +283,8 @@ def get_watchdog():
     """
     Return WatchdogType1 or WatchdogType2 based on system
     """
-
+    
+    utils.wait_until(lambda: os.path.exists('/run/hw-management/watchdog/main/state'), timeout=10, interval=1)
     watchdog_main_device_name = None
 
     for device in os.listdir("/dev/"):
diff --git a/platform/mellanox/mlnx-platform-api/tests/test_watchdog.py b/platform/mellanox/mlnx-platform-api/tests/test_watchdog.py
index 68d29d38a..6e925d594 100644
--- a/platform/mellanox/mlnx-platform-api/tests/test_watchdog.py
+++ b/platform/mellanox/mlnx-platform-api/tests/test_watchdog.py
@@ -36,6 +36,7 @@
 
 
 class TestWatchdog:
+    @mock.patch('sonic_platform.utils.wait_until', mock.MagicMock())
     @mock.patch('sonic_platform.watchdog.is_mlnx_wd_main')
     @mock.patch('sonic_platform.watchdog.os.listdir')
     def test_get_watchdog_no_device(self, mock_listdir, mock_is_main):
@@ -50,6 +51,7 @@ def test_get_watchdog_no_device(self, mock_listdir, mock_is_main):
         mock_is_main.return_value = False
         assert get_watchdog() is None
 
+    @mock.patch('sonic_platform.utils.wait_until', mock.MagicMock())
     @mock.patch('sonic_platform.watchdog.is_mlnx_wd_main')
     @mock.patch('sonic_platform.watchdog.is_wd_type2')
     @mock.patch('sonic_platform.watchdog.os.listdir', mock.MagicMock(return_value=['watchdog1', 'watchdog2']))

From f7200698f1129f242be95979bf2b9ed8fecea4da Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Wed, 27 Dec 2023 16:00:25 +0800
Subject: [PATCH 0094/1115] [submodule] Update submodule sonic-platform-daemons
 to the latest HEAD automatically (#17594)

---
 src/sonic-platform-daemons | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-platform-daemons b/src/sonic-platform-daemons
index b2b890540..b1e51c3e5 160000
--- a/src/sonic-platform-daemons
+++ b/src/sonic-platform-daemons
@@ -1 +1 @@
-Subproject commit b2b890540d291d76b8763c1f6c22b3899385ff76
+Subproject commit b1e51c3e5f90220a79166817204a6ee80a7fa4fd

From da3c6b99852143cd5a0e23a1d74eade70d48e2b7 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Thu, 28 Dec 2023 15:44:21 +0800
Subject: [PATCH 0095/1115] [submodule] Update submodule sonic-swss to the
 latest HEAD automatically (#17629)

---
 src/sonic-swss | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-swss b/src/sonic-swss
index 5f367ebb6..8fa982d77 160000
--- a/src/sonic-swss
+++ b/src/sonic-swss
@@ -1 +1 @@
-Subproject commit 5f367ebb63dab68e73b74092fc083d3d1755b4b3
+Subproject commit 8fa982d77053e3e108253d24ba49ea56c864de87

From 0e58512353f670e52084ba58ed900e36a588db0c Mon Sep 17 00:00:00 2001
From: Ze Gan <ganze718@gmail.com>
Date: Sat, 30 Dec 2023 06:20:52 +0800
Subject: [PATCH 0096/1115] [docker-databse]: Revise database_global schema for
 dpu (#17443)

### Why I did it
Revise DPU's database_global.json schema to achieve a more general design

### How I did it
1. Remove databse_type
2. Add a new field databse_name
---
 dockers/docker-database/database_global.json.j2 | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/dockers/docker-database/database_global.json.j2 b/dockers/docker-database/database_global.json.j2
index 535b71446..032f5e722 100644
--- a/dockers/docker-database/database_global.json.j2
+++ b/dockers/docker-database/database_global.json.j2
@@ -26,7 +26,7 @@
 {% if dpu_cnt > 0 %}
 {% for dpu in range(dpu_cnt) %}
         {
-            "database_type" : "dpudb",
+            "database_name" : "dpu{{dpu}}",
             "include" : "../../redisdpu{{dpu}}/sonic-db/database_config.json"
 {% if dpu == dpu_cnt-1  %}
         }

From 6d3cef1a9c4504d3c97e750d5b7bf16fc3820cdc Mon Sep 17 00:00:00 2001
From: Ze Gan <ganze718@gmail.com>
Date: Sat, 30 Dec 2023 06:22:23 +0800
Subject: [PATCH 0097/1115] [yang]: Add yang model for dpu database service
 (#17191)

### Why I did it
According to the design, the database instances of DPU will be kept in the NPU host.

### How I did it
Declare a new field, `has_per_dpu_scope`, in the config_db for database feature.

#### How to verify it
Check Azp
---
 src/sonic-yang-models/tests/files/sample_config_db.json    | 1 +
 .../tests/yang_model_tests/tests_config/feature.json       | 1 +
 src/sonic-yang-models/yang-models/sonic-feature.yang       | 7 +++++++
 3 files changed, 9 insertions(+)

diff --git a/src/sonic-yang-models/tests/files/sample_config_db.json b/src/sonic-yang-models/tests/files/sample_config_db.json
index b9db43c87..5eaeb7d5d 100644
--- a/src/sonic-yang-models/tests/files/sample_config_db.json
+++ b/src/sonic-yang-models/tests/files/sample_config_db.json
@@ -1825,6 +1825,7 @@
                 "auto_restart": "always_enabled",
                 "has_global_scope": "true",
                 "has_per_asic_scope": "true",
+                "has_per_dpu_scope": "true",
                 "delayed": "false",
                 "high_mem_alert": "disabled",
                 "state": "always_enabled",
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/feature.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/feature.json
index c806c8b56..12e1e0717 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/feature.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/feature.json
@@ -10,6 +10,7 @@
                         "delayed": "False",
                         "has_global_scope": "True",
                         "has_per_asic_scope": "True",
+                        "has_per_dpu_scope": "True",
                         "set_owner": "local",
                         "check_up_status": "False",
                         "support_syslog_rate_limit": "true"
diff --git a/src/sonic-yang-models/yang-models/sonic-feature.yang b/src/sonic-yang-models/yang-models/sonic-feature.yang
index 410710a82..6f23135b6 100644
--- a/src/sonic-yang-models/yang-models/sonic-feature.yang
+++ b/src/sonic-yang-models/yang-models/sonic-feature.yang
@@ -78,6 +78,13 @@ module sonic-feature{
                     default "false";
                 }
 
+                leaf has_per_dpu_scope {
+                    description "This configuration identicates there will only one service
+                                spawned per DPU";
+                    type feature-scope-status;
+                    default "false";
+                }
+
                 leaf high_mem_alert {
                     description "This configuration controls the trigger to generate
                                 alert on high memory utilization";

From c410b18f8f849f5f81e7173f3db0050d71e649e6 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sun, 31 Dec 2023 15:47:15 +0800
Subject: [PATCH 0098/1115] [submodule] Update submodule sonic-linux-kernel to
 the latest HEAD automatically (#17639)

---
 src/sonic-linux-kernel | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-linux-kernel b/src/sonic-linux-kernel
index 5d83a17e5..a1d003941 160000
--- a/src/sonic-linux-kernel
+++ b/src/sonic-linux-kernel
@@ -1 +1 @@
-Subproject commit 5d83a17e5fd890d5f0113df422bb18d002e5d0c3
+Subproject commit a1d003941f2ae62bd5a40f265659490639596204

From a0210df43a73087cead3464ea469322c54be5b0f Mon Sep 17 00:00:00 2001
From: Ying Xie <yxieca@users.noreply.github.com>
Date: Tue, 2 Jan 2024 08:38:30 -0800
Subject: [PATCH 0099/1115] [YANG] update sonic DB version string format
 (#17608)

Old format: version_a_b_c
New format: version_<branch>_<nn>

Signed-off-by: Ying Xie <ying.xie@microsoft.com>
---
 src/sonic-yang-models/yang-models/sonic-versions.yang | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-yang-models/yang-models/sonic-versions.yang b/src/sonic-yang-models/yang-models/sonic-versions.yang
index ad9b95f94..9c405e4de 100644
--- a/src/sonic-yang-models/yang-models/sonic-versions.yang
+++ b/src/sonic-yang-models/yang-models/sonic-versions.yang
@@ -23,7 +23,7 @@ module sonic-versions {
                 leaf VERSION {
                     type string {
                         length 1..255;
-                        pattern 'version_([1-9]|[1-9]{1}[0-9]{1})_([0-9]{1,2})_([0-9]{1,2})';
+                        pattern 'version_(([1-9]|[1-9]{1}[0-9]{1})_([0-9]{1,2})_([0-9]{1,2})|([1-9]{1}[0-9]{5})_([0-9]{2}))';
                     }
                 }
             }

From 2824489a2960ad96264dc8b676dc4c9d74966cb1 Mon Sep 17 00:00:00 2001
From: Yaqiang Zhu <yaqiangzhu@microsoft.com>
Date: Wed, 3 Jan 2024 00:59:17 +0800
Subject: [PATCH 0100/1115] [dhcp_server] Fix ut issue in test_utils and
 test_dhcp_cfggen (#17646)

---
 .../tests/test_dhcp_db_monitor.py             | 54 ++++++-------------
 src/sonic-dhcp-utilities/tests/test_utils.py  | 12 ++++-
 2 files changed, 27 insertions(+), 39 deletions(-)

diff --git a/src/sonic-dhcp-utilities/tests/test_dhcp_db_monitor.py b/src/sonic-dhcp-utilities/tests/test_dhcp_db_monitor.py
index 6cea6868d..75b773599 100644
--- a/src/sonic-dhcp-utilities/tests/test_dhcp_db_monitor.py
+++ b/src/sonic-dhcp-utilities/tests/test_dhcp_db_monitor.py
@@ -211,15 +211,12 @@ def test_db_event_checker_subscribe_table(mock_swsscommon_dbconnector_init, enab
             mock_sub.assert_called_once_with(ANY, "")
 
 
-@pytest.mark.parametrize("tested_db_snapshot", [{"enabled_dhcp_interfaces": "Vlan1000"}, {}])
+@pytest.mark.parametrize("tested_db_snapshot", [{"enabled_dhcp_interfaces": {"Vlan1000"}}, {}])
 @pytest.mark.parametrize("tested_data", get_subscribe_table_tested_data("test_dhcp_server_update"))
-@pytest.mark.parametrize("enabled", [True, False])
-def test_dhcp_server_table_cfg_change_checker(mock_swsscommon_dbconnector_init, tested_data, tested_db_snapshot,
-                                              enabled):
+def test_dhcp_server_table_cfg_change_checker(mock_swsscommon_dbconnector_init, tested_data, tested_db_snapshot):
     with patch.object(ConfigDbEventChecker, "enable"), \
          patch.object(ConfigDbEventChecker, "subscriber_state_table",
                       return_value=MockSubscribeTable(tested_data["table"]), new_callable=PropertyMock), \
-         patch.object(ConfigDbEventChecker, "enabled", return_value=enabled, new_callable=PropertyMock), \
          patch.object(sys, "exit"):
         sel = swsscommon.Select()
         db_event_checker = DhcpServerTableCfgChangeEventChecker(sel, MagicMock())
@@ -232,15 +229,12 @@ def test_dhcp_server_table_cfg_change_checker(mock_swsscommon_dbconnector_init,
             assert expected_res == check_res
 
 
-@pytest.mark.parametrize("tested_db_snapshot", [{"enabled_dhcp_interfaces": "Vlan1000"}, {}])
+@pytest.mark.parametrize("tested_db_snapshot", [{"enabled_dhcp_interfaces": {"Vlan1000"}}, {}])
 @pytest.mark.parametrize("tested_data", get_subscribe_table_tested_data("test_dhcp_server_update"))
-@pytest.mark.parametrize("enabled", [True, False])
-def test_dhcp_server_table_enablement_change_checker(mock_swsscommon_dbconnector_init, tested_data, tested_db_snapshot,
-                                                     enabled):
+def test_dhcp_server_table_enablement_change_checker(mock_swsscommon_dbconnector_init, tested_data, tested_db_snapshot):
     with patch.object(ConfigDbEventChecker, "enable"), \
          patch.object(ConfigDbEventChecker, "subscriber_state_table",
                       return_value=MockSubscribeTable(tested_data["table"]), new_callable=PropertyMock), \
-         patch.object(ConfigDbEventChecker, "enabled", return_value=enabled, new_callable=PropertyMock), \
          patch.object(sys, "exit"):
         sel = swsscommon.Select()
         db_event_checker = DhcpServerTableIntfEnablementEventChecker(sel, MagicMock())
@@ -253,14 +247,12 @@ def test_dhcp_server_table_enablement_change_checker(mock_swsscommon_dbconnector
             assert expected_res == check_res
 
 
-@pytest.mark.parametrize("tested_db_snapshot", [{"enabled_dhcp_interfaces": "Vlan1000"}, {}])
+@pytest.mark.parametrize("tested_db_snapshot", [{"enabled_dhcp_interfaces": {"Vlan1000"}}, {}])
 @pytest.mark.parametrize("tested_data", get_subscribe_table_tested_data("test_port_update"))
-@pytest.mark.parametrize("enabled", [True, False])
-def test_dhcp_port_table_checker(mock_swsscommon_dbconnector_init, tested_data, tested_db_snapshot, enabled):
+def test_dhcp_port_table_checker(mock_swsscommon_dbconnector_init, tested_data, tested_db_snapshot):
     with patch.object(ConfigDbEventChecker, "enable"), \
          patch.object(ConfigDbEventChecker, "subscriber_state_table",
                       return_value=MockSubscribeTable(tested_data["table"]), new_callable=PropertyMock), \
-         patch.object(ConfigDbEventChecker, "enabled", return_value=enabled, new_callable=PropertyMock), \
          patch.object(sys, "exit"):
         sel = swsscommon.Select()
         db_event_checker = DhcpPortTableEventChecker(sel, MagicMock())
@@ -272,14 +264,12 @@ def test_dhcp_port_table_checker(mock_swsscommon_dbconnector_init, tested_data,
             assert expected_res == check_res
 
 
-@pytest.mark.parametrize("tested_db_snapshot", [{"used_range": "range1"}, {}])
+@pytest.mark.parametrize("tested_db_snapshot", [{"used_range": {"range1"}}, {}])
 @pytest.mark.parametrize("tested_data", get_subscribe_table_tested_data("test_range_update"))
-@pytest.mark.parametrize("enabled", [True, False])
-def test_dhcp_range_table_checker(mock_swsscommon_dbconnector_init, tested_data, tested_db_snapshot, enabled):
+def test_dhcp_range_table_checker(mock_swsscommon_dbconnector_init, tested_data, tested_db_snapshot):
     with patch.object(ConfigDbEventChecker, "enable"), \
          patch.object(ConfigDbEventChecker, "subscriber_state_table",
                       return_value=MockSubscribeTable(tested_data["table"]), new_callable=PropertyMock), \
-         patch.object(ConfigDbEventChecker, "enabled", return_value=enabled, new_callable=PropertyMock), \
          patch.object(sys, "exit"):
         sel = swsscommon.Select()
         db_event_checker = DhcpRangeTableEventChecker(sel, MagicMock())
@@ -291,14 +281,12 @@ def test_dhcp_range_table_checker(mock_swsscommon_dbconnector_init, tested_data,
             assert expected_res == check_res
 
 
-@pytest.mark.parametrize("tested_db_snapshot", [{"used_options": "option223"}, {}])
+@pytest.mark.parametrize("tested_db_snapshot", [{"used_options": {"option223"}}, {}])
 @pytest.mark.parametrize("tested_data", get_subscribe_table_tested_data("test_option_update"))
-@pytest.mark.parametrize("enabled", [True, False])
-def test_dhcp_option_table_checker(mock_swsscommon_dbconnector_init, tested_data, tested_db_snapshot, enabled):
+def test_dhcp_option_table_checker(mock_swsscommon_dbconnector_init, tested_data, tested_db_snapshot):
     with patch.object(ConfigDbEventChecker, "enable"), \
          patch.object(ConfigDbEventChecker, "subscriber_state_table",
                       return_value=MockSubscribeTable(tested_data["table"]), new_callable=PropertyMock), \
-         patch.object(ConfigDbEventChecker, "enabled", return_value=enabled, new_callable=PropertyMock), \
          patch.object(sys, "exit"):
         sel = swsscommon.Select()
         db_event_checker = DhcpOptionTableEventChecker(sel, MagicMock())
@@ -310,14 +298,12 @@ def test_dhcp_option_table_checker(mock_swsscommon_dbconnector_init, tested_data
             assert expected_res == check_res
 
 
-@pytest.mark.parametrize("tested_db_snapshot", [{"enabled_dhcp_interfaces": "Vlan1000"}, {}])
+@pytest.mark.parametrize("tested_db_snapshot", [{"enabled_dhcp_interfaces": {"Vlan1000"}}, {}])
 @pytest.mark.parametrize("tested_data", get_subscribe_table_tested_data("test_vlan_update"))
-@pytest.mark.parametrize("enabled", [True, False])
-def test_vlan_table_checker(mock_swsscommon_dbconnector_init, tested_data, tested_db_snapshot, enabled):
+def test_vlan_table_checker(mock_swsscommon_dbconnector_init, tested_data, tested_db_snapshot):
     with patch.object(ConfigDbEventChecker, "enable"), \
          patch.object(ConfigDbEventChecker, "subscriber_state_table",
                       return_value=MockSubscribeTable(tested_data["table"]), new_callable=PropertyMock), \
-         patch.object(ConfigDbEventChecker, "enabled", return_value=enabled, new_callable=PropertyMock), \
          patch.object(sys, "exit"):
         sel = swsscommon.Select()
         db_event_checker = VlanTableEventChecker(sel, MagicMock())
@@ -329,14 +315,12 @@ def test_vlan_table_checker(mock_swsscommon_dbconnector_init, tested_data, teste
             assert expected_res == check_res
 
 
-@pytest.mark.parametrize("tested_db_snapshot", [{"enabled_dhcp_interfaces": "Vlan1000"}, {}])
+@pytest.mark.parametrize("tested_db_snapshot", [{"enabled_dhcp_interfaces": {"Vlan1000"}}, {}])
 @pytest.mark.parametrize("tested_data", get_subscribe_table_tested_data("test_vlan_intf_update"))
-@pytest.mark.parametrize("enabled", [True, False])
-def test_vlan_intf_table_checker(mock_swsscommon_dbconnector_init, tested_data, tested_db_snapshot, enabled):
+def test_vlan_intf_table_checker(mock_swsscommon_dbconnector_init, tested_data, tested_db_snapshot):
     with patch.object(ConfigDbEventChecker, "enable"), \
          patch.object(ConfigDbEventChecker, "subscriber_state_table",
                       return_value=MockSubscribeTable(tested_data["table"]), new_callable=PropertyMock), \
-         patch.object(ConfigDbEventChecker, "enabled", return_value=enabled, new_callable=PropertyMock), \
          patch.object(sys, "exit"):
         sel = swsscommon.Select()
         db_event_checker = VlanIntfTableEventChecker(sel, MagicMock())
@@ -348,14 +332,12 @@ def test_vlan_intf_table_checker(mock_swsscommon_dbconnector_init, tested_data,
             assert expected_res == check_res
 
 
-@pytest.mark.parametrize("tested_db_snapshot", [{"enabled_dhcp_interfaces": "Vlan1000"}, {}])
+@pytest.mark.parametrize("tested_db_snapshot", [{"enabled_dhcp_interfaces": {"Vlan1000"}}, {}])
 @pytest.mark.parametrize("tested_data", get_subscribe_table_tested_data("test_vlan_member_update"))
-@pytest.mark.parametrize("enabled", [True, False])
-def test_vlan_member_table_checker(mock_swsscommon_dbconnector_init, tested_data, tested_db_snapshot, enabled):
+def test_vlan_member_table_checker(mock_swsscommon_dbconnector_init, tested_data, tested_db_snapshot):
     with patch.object(ConfigDbEventChecker, "enable"), \
          patch.object(ConfigDbEventChecker, "subscriber_state_table",
                       return_value=MockSubscribeTable(tested_data["table"]), new_callable=PropertyMock), \
-         patch.object(ConfigDbEventChecker, "enabled", return_value=enabled, new_callable=PropertyMock), \
          patch.object(sys, "exit"):
         sel = swsscommon.Select()
         db_event_checker = VlanMemberTableEventChecker(sel, MagicMock())
@@ -370,12 +352,10 @@ def test_vlan_member_table_checker(mock_swsscommon_dbconnector_init, tested_data
 @pytest.mark.parametrize("tested_db_snapshot", [{"dhcp_server_feature_enabled": True},
                                                 {"dhcp_server_feature_enabled": False}, {}])
 @pytest.mark.parametrize("tested_data", get_subscribe_table_tested_data("test_feature_update"))
-@pytest.mark.parametrize("enabled", [True, False])
-def test_feature_table_checker(mock_swsscommon_dbconnector_init, tested_data, tested_db_snapshot, enabled):
+def test_feature_table_checker(mock_swsscommon_dbconnector_init, tested_data, tested_db_snapshot):
     with patch.object(ConfigDbEventChecker, "enable"), \
          patch.object(ConfigDbEventChecker, "subscriber_state_table",
                       return_value=MockSubscribeTable(tested_data["table"]), new_callable=PropertyMock), \
-         patch.object(ConfigDbEventChecker, "enabled", return_value=enabled, new_callable=PropertyMock), \
          patch.object(sys, "exit"):
         sel = swsscommon.Select()
         db_event_checker = DhcpServerFeatureStateChecker(sel, MagicMock())
diff --git a/src/sonic-dhcp-utilities/tests/test_utils.py b/src/sonic-dhcp-utilities/tests/test_utils.py
index 8eb018a3c..8017d23cb 100644
--- a/src/sonic-dhcp-utilities/tests/test_utils.py
+++ b/src/sonic-dhcp-utilities/tests/test_utils.py
@@ -142,5 +142,13 @@ def test_validate_ttr_type(test_data):
 
 
 def test_get_target_process_cmds():
-    with patch.object(psutil, "process_iter", return_value=[MockProc("dhcrelay", 1), MockProc("dhcpmon", 2)], new_callable=PropertyMock):
-        res = utils.get_target_process_cmds("dhcrelay")
\ No newline at end of file
+    with patch.object(psutil, "process_iter", return_value=[MockProc("dhcrelay", 1), MockProc("dhcpmon", 2)],
+                      new_callable=PropertyMock):
+        res = utils.get_target_process_cmds("dhcrelay")
+        expected_res = [
+            [
+                "/usr/sbin/dhcrelay", "-d", "-m", "discard", "-a", "%h:%p", "%P", "--name-alias-map-file",
+                "/tmp/port-name-alias-map.txt", "-id", "Vlan1000", "-iu", "docker0", "240.127.1.2"
+            ]
+        ]
+        assert res == expected_res

From 525e1f48746f2a47d5be3cc0bef2896b4692ebc3 Mon Sep 17 00:00:00 2001
From: Yaqiang Zhu <yaqiangzhu@microsoft.com>
Date: Wed, 3 Jan 2024 01:04:14 +0800
Subject: [PATCH 0101/1115] [dhcp_server] Add field not exist checks in
 dhcp_cfggen (#17645)

* [dhcp_server] Add field not exist checks in dhcp_cfggen
---
 .../dhcp_utilities/dhcpservd/dhcp_cfggen.py   | 12 +++++++++--
 src/sonic-dhcp-utilities/tests/conftest.py    |  3 ++-
 .../tests/test_data/mock_config_db.json       | 21 ++++++++++++++++++-
 .../tests/test_dhcp_cfggen.py                 | 18 +++++++++++++---
 4 files changed, 47 insertions(+), 7 deletions(-)

diff --git a/src/sonic-dhcp-utilities/dhcp_utilities/dhcpservd/dhcp_cfggen.py b/src/sonic-dhcp-utilities/dhcp_utilities/dhcpservd/dhcp_cfggen.py
index 438a6e814..136ff01c8 100755
--- a/src/sonic-dhcp-utilities/dhcp_utilities/dhcpservd/dhcp_cfggen.py
+++ b/src/sonic-dhcp-utilities/dhcp_utilities/dhcpservd/dhcp_cfggen.py
@@ -136,6 +136,7 @@ def _construct_obj_for_template(self, dhcp_server_ipv4, port_ips, hostname, cust
         client_classes = []
         enabled_dhcp_interfaces = set()
         used_options = set()
+        customized_option_keys = customized_options.keys()
         # Different mode would subscribe different table, always subscribe DHCP_SERVER_IPV4
         subscribe_table = set(["DhcpServerTableCfgChangeEventChecker"])
         for dhcp_interface_name, dhcp_config in dhcp_server_ipv4.items():
@@ -149,8 +150,12 @@ def _construct_obj_for_template(self, dhcp_server_ipv4, port_ips, hostname, cust
                                   .format(dhcp_interface_name))
                     continue
                 curr_options = {}
-                for option in dhcp_config["customized_options"]:
-                    if option in customized_options.keys():
+                if "customized_options" in dhcp_config:
+                    for option in dhcp_config["customized_options"]:
+                        if option not in customized_option_keys:
+                            syslog.syslog(syslog.LOG_WARNING, "Customized option {} configured for {} is not defined"
+                                          .format(option, dhcp_interface_name))
+                            continue
                         curr_options[option] = {
                             "always_send": customized_options[option]["always_send"],
                             "value": customized_options[option]["value"]
@@ -354,6 +359,9 @@ def _parse_port(self, port_ipv4, vlan_interfaces, vlan_members, ranges):
                 syslog.syslog(syslog.LOG_WARNING, f"Cannot find {splits[1]} in port_alias_map")
                 continue
             port = self.port_alias_map[splits[1]]
+            if dhcp_interface_name not in vlan_interfaces:
+                syslog.syslog(syslog.LOG_WARNING, f"Interface {dhcp_interface_name} doesn't have IPv4 address")
+                continue
             if dhcp_interface_name not in port_ips:
                 port_ips[dhcp_interface_name] = {}
             # Get ip information of Vlan
diff --git a/src/sonic-dhcp-utilities/tests/conftest.py b/src/sonic-dhcp-utilities/tests/conftest.py
index ae75df482..2b3076d5a 100644
--- a/src/sonic-dhcp-utilities/tests/conftest.py
+++ b/src/sonic-dhcp-utilities/tests/conftest.py
@@ -35,7 +35,8 @@ def mock_get_render_template():
 def mock_parse_port_map_alias(scope="function"):
     with patch("dhcp_utilities.dhcpservd.dhcp_cfggen.DhcpServCfgGenerator._parse_port_map_alias",
                return_value=None) as mock_map, \
-         patch.object(DhcpServCfgGenerator, "port_alias_map", return_value={"Ethernet24": "etp7", "Ethernet28": "etp8"},
+         patch.object(DhcpServCfgGenerator, "port_alias_map", return_value={"Ethernet24": "etp7", "Ethernet28": "etp8",
+                                                                            "Ethernet44": "etp12"},
                       new_callable=PropertyMock), \
          patch.object(DhcpServCfgGenerator, "lease_update_script_path", return_value="/etc/kea/lease_update.sh",
                       new_callable=PropertyMock), \
diff --git a/src/sonic-dhcp-utilities/tests/test_data/mock_config_db.json b/src/sonic-dhcp-utilities/tests/test_data/mock_config_db.json
index 1afb7c7e8..3bdfa0401 100644
--- a/src/sonic-dhcp-utilities/tests/test_data/mock_config_db.json
+++ b/src/sonic-dhcp-utilities/tests/test_data/mock_config_db.json
@@ -6,7 +6,8 @@
     },
     "VLAN": {
         "Vlan1000": {},
-        "Vlan2000": {}
+        "Vlan2000": {},
+        "Vlan3000": {}
     },
     "VLAN_INTERFACE": {
         "Vlan1000|192.168.0.1/21": {
@@ -26,6 +27,9 @@
         },
         "Vlan2000": {
             "NULL": "NULL"
+        },
+        "Vlan3000": {
+            "NULL": "NULL"
         }
     },
     "VLAN_MEMBER": {
@@ -37,6 +41,9 @@
         },
         "Vlan1000|Ethernet40": {
             "tagging_mode": "untagged"
+        },
+        "Vlan3000|Ethernet44": {
+            "tagging_mode": "untagged"
         }
     },
     "DHCP_SERVER_IPV4": {
@@ -92,6 +99,13 @@
             "mode": "PORT",
             "netmask": "255.255.255.0",
             "state": "disabled"
+        },
+        "Vlan6000": {
+            "gateway": "192.168.2.1",
+            "lease_time": "900",
+            "mode": "PORT",
+            "netmask": "255.255.255.0",
+            "state": "enabled"
         }
     },
     "DHCP_SERVER_IPV4_RANGE": {
@@ -160,6 +174,11 @@
             "ips": [
                 "192.168.0.10"
             ]
+        },
+        "Vlan3000|Ethernet44": {
+            "ips": [
+                "192.168.0.10"
+            ]
         }
     }
 }
diff --git a/src/sonic-dhcp-utilities/tests/test_dhcp_cfggen.py b/src/sonic-dhcp-utilities/tests/test_dhcp_cfggen.py
index db76cacb2..dc387bc0c 100644
--- a/src/sonic-dhcp-utilities/tests/test_dhcp_cfggen.py
+++ b/src/sonic-dhcp-utilities/tests/test_dhcp_cfggen.py
@@ -302,7 +302,8 @@ def test_parse_vlan(mock_swsscommon_dbconnector_init, mock_parse_port_map_alias,
     vlan_interfaces, vlan_members = dhcp_cfg_generator._parse_vlan(mock_config_db.config_db.get("VLAN_INTERFACE"),
                                                                    mock_config_db.config_db.get("VLAN_MEMBER"))
     assert vlan_interfaces == expected_vlan_ipv4_interface
-    assert list(vlan_members) == ["Vlan1000|Ethernet24", "Vlan1000|Ethernet28", "Vlan1000|Ethernet40"]
+    expeceted_members = ["Vlan1000|Ethernet24", "Vlan1000|Ethernet28", "Vlan1000|Ethernet40", "Vlan3000|Ethernet44"]
+    assert list(vlan_members) == expeceted_members
 
 
 @pytest.mark.parametrize("test_config_db", ["mock_config_db.json", "mock_config_db_without_port_config.json"])
@@ -351,11 +352,22 @@ def test_construct_obj_for_template(mock_swsscommon_dbconnector_init, mock_parse
     customized_options = {"option223": {"id": "223", "value": "dummy_value", "type": "string", "always_send": "true"}}
     dhcp_cfg_generator = DhcpServCfgGenerator(dhcp_db_connector)
     tested_hostname = "sonic-host"
+    port_ips = {
+        "Vlan1000": {
+            "192.168.0.1/21": {
+                "etp8": [["192.168.0.2", "192.168.0.6"], ["192.168.0.10", "192.168.0.10"]],
+                "etp7": [["192.168.0.7", "192.168.0.7"]],
+                "etp9": []
+            }
+        },
+        "Vlan6000": {
+        }
+    }
     render_obj, enabled_dhcp_interfaces, used_options, subscribe_table = \
         dhcp_cfg_generator._construct_obj_for_template(mock_config_db.config_db.get("DHCP_SERVER_IPV4"),
-                                                       tested_parsed_port, tested_hostname, customized_options)
+                                                       port_ips, tested_hostname, customized_options)
     assert render_obj == expected_render_obj
-    assert enabled_dhcp_interfaces == {"Vlan1000", "Vlan4000", "Vlan3000"}
+    assert enabled_dhcp_interfaces == {"Vlan1000", "Vlan4000", "Vlan3000", "Vlan6000"}
     assert used_options == set(["option223"])
     assert subscribe_table == set(PORT_MODE_CHECKER)
 

From b9e90c2901cd6db0e169a60a383fbc9230fa66e2 Mon Sep 17 00:00:00 2001
From: Yaqiang Zhu <yaqiangzhu@microsoft.com>
Date: Wed, 3 Jan 2024 01:07:44 +0800
Subject: [PATCH 0102/1115] [smart_switch][dhcp_server] Add related checker for
 smart_switch in dhcp_db_monitor (#17338)

---
 .../dhcp_utilities/common/dhcp_db_monitor.py  | 41 +++++++++++++++++
 .../test_data/dhcp_db_monitor_test_data.json  | 46 +++++++++++++++++++
 .../tests/test_dhcp_db_monitor.py             | 37 ++++++++++++++-
 3 files changed, 123 insertions(+), 1 deletion(-)

diff --git a/src/sonic-dhcp-utilities/dhcp_utilities/common/dhcp_db_monitor.py b/src/sonic-dhcp-utilities/dhcp_utilities/common/dhcp_db_monitor.py
index e2caab826..cbc46cfee 100644
--- a/src/sonic-dhcp-utilities/dhcp_utilities/common/dhcp_db_monitor.py
+++ b/src/sonic-dhcp-utilities/dhcp_utilities/common/dhcp_db_monitor.py
@@ -13,6 +13,8 @@
 VLAN_MEMBER = "VLAN_MEMBER"
 VLAN_INTERFACE = "VLAN_INTERFACE"
 FEATURE = "FEATURE"
+MID_PLANE_BRIDGE = "MID_PLANE_BRIDGE"
+DPUS = "DPUS"
 
 
 class ConfigDbEventChecker(object):
@@ -344,6 +346,45 @@ def _process_check(self, key, op, entry, enabled_dhcp_interfaces):
         return False
 
 
+class MidPlaneTableEventChecker(ConfigDbEventChecker):
+    """
+    This event checker interested in changes in MID_PLANE_BRIDGE table
+    """
+    table_name = MID_PLANE_BRIDGE
+
+    def __init__(self, sel, db):
+        self.table_name = MID_PLANE_BRIDGE
+        ConfigDbEventChecker.__init__(self, sel, db)
+
+    def _get_parameter(self, db_snapshot):
+        return ConfigDbEventChecker.get_parameter_by_name(db_snapshot, "enabled_dhcp_interfaces")
+
+    def _process_check(self, key, op, entry, enabled_dhcp_interfaces):
+        if op == "DEL":
+            return True
+        for field, value in entry:
+            if field == "bridge" and value in enabled_dhcp_interfaces:
+                return True
+        return False
+
+
+class DpusTableEventChecker(ConfigDbEventChecker):
+    """
+    This event checker interested in changes in DPUS table
+    """
+    table_name = DPUS
+
+    def __init__(self, sel, db):
+        self.table_name = DPUS
+        ConfigDbEventChecker.__init__(self, sel, db)
+
+    def _get_parameter(self, db_snapshot):
+        return True, None
+
+    def _process_check(self, key, op, entry, param):
+        return True
+
+
 class DhcpServerFeatureStateChecker(ConfigDbEventChecker):
     """
     This event checker interested in dhcp_server feature state change in FEATURE table
diff --git a/src/sonic-dhcp-utilities/tests/test_data/dhcp_db_monitor_test_data.json b/src/sonic-dhcp-utilities/tests/test_data/dhcp_db_monitor_test_data.json
index db3b328fa..da422685a 100644
--- a/src/sonic-dhcp-utilities/tests/test_data/dhcp_db_monitor_test_data.json
+++ b/src/sonic-dhcp-utilities/tests/test_data/dhcp_db_monitor_test_data.json
@@ -289,5 +289,51 @@
                 "pre_disabled": false
             }
         }
+    ],
+    "test_mid_plane_update": [
+        {
+            "table": [
+                ["GLOBAL", "SET", [["bridge", "bridge_midplane"], ["ip_prefix", "169.254.200.254/24"]]]
+            ],
+            "exp_res": true
+        },
+        {
+            "table": [
+                ["GLOBAL", "SET", [["bridge", "bridge_midplane2"], ["ip_prefix", "169.254.200.254/24"]]]
+            ],
+            "exp_res": false
+        },
+        {
+            "table": [
+                ["GLOBAL", "DEL", []]
+            ],
+            "exp_res": true
+        }
+    ],
+    "test_dpus_update": [
+        {
+            "table": [
+                ["dpu0", "SET", [["midplane_interface", "dpu0"]]]
+            ],
+            "exp_res": true
+        },
+        {
+            "table": [
+                ["dpu1", "SET", [["midplane_interface", "dpu1"]]]
+            ],
+            "exp_res": true
+        },
+        {
+            "table": [
+                ["dpu0", "DEL", []]
+            ],
+            "exp_res": true
+        },
+        {
+            "table": [
+                ["dpu1", "DEL", []]
+            ],
+            "exp_res": true
+        }
     ]
 }
\ No newline at end of file
diff --git a/src/sonic-dhcp-utilities/tests/test_dhcp_db_monitor.py b/src/sonic-dhcp-utilities/tests/test_dhcp_db_monitor.py
index 75b773599..8a5a58c9c 100644
--- a/src/sonic-dhcp-utilities/tests/test_dhcp_db_monitor.py
+++ b/src/sonic-dhcp-utilities/tests/test_dhcp_db_monitor.py
@@ -5,7 +5,8 @@
 from dhcp_utilities.common.dhcp_db_monitor import DhcpRelaydDbMonitor, DhcpServdDbMonitor, ConfigDbEventChecker, \
     DhcpServerTableIntfEnablementEventChecker, DhcpServerTableCfgChangeEventChecker, \
     DhcpPortTableEventChecker, DhcpRangeTableEventChecker, DhcpOptionTableEventChecker, \
-    VlanTableEventChecker, VlanMemberTableEventChecker, VlanIntfTableEventChecker, DhcpServerFeatureStateChecker
+    VlanTableEventChecker, VlanMemberTableEventChecker, VlanIntfTableEventChecker, DhcpServerFeatureStateChecker, \
+    MidPlaneTableEventChecker, DpusTableEventChecker
 from dhcp_utilities.common.utils import DhcpDbConnector
 from swsscommon import swsscommon
 from unittest.mock import patch, ANY, PropertyMock, MagicMock
@@ -366,3 +367,37 @@ def test_feature_table_checker(mock_swsscommon_dbconnector_init, tested_data, te
             expected_res = tested_data["exp_res"]["pre_enabled"] if tested_db_snapshot["dhcp_server_feature_enabled"] \
                 else tested_data["exp_res"]["pre_disabled"]
             assert expected_res == check_res
+
+
+@pytest.mark.parametrize("tested_db_snapshot", [{"enabled_dhcp_interfaces": {"bridge_midplane": ["dpu0"]}}, {}])
+@pytest.mark.parametrize("tested_data", get_subscribe_table_tested_data("test_mid_plane_update"))
+def test_mid_plane_table_checker(mock_swsscommon_dbconnector_init, tested_data, tested_db_snapshot):
+    with patch.object(ConfigDbEventChecker, "enable"), \
+         patch.object(ConfigDbEventChecker, "subscriber_state_table",
+                      return_value=MockSubscribeTable(tested_data["table"]), new_callable=PropertyMock), \
+         patch.object(sys, "exit"):
+        sel = swsscommon.Select()
+        db_event_checker = MidPlaneTableEventChecker(sel, MagicMock())
+        expected_res = tested_data["exp_res"]
+        check_res = db_event_checker.check_update_event(tested_db_snapshot)
+        if "enabled_dhcp_interfaces" not in tested_db_snapshot:
+            assert check_res
+        else:
+            assert expected_res == check_res
+
+
+@pytest.mark.parametrize("tested_db_snapshot", [{"enabled_dhcp_interfaces": {"bridge_midplane": ["dpu0"]}}, {}])
+@pytest.mark.parametrize("tested_data", get_subscribe_table_tested_data("test_dpus_update"))
+def test_dpus_table_checker(mock_swsscommon_dbconnector_init, tested_data, tested_db_snapshot):
+    with patch.object(ConfigDbEventChecker, "enable"), \
+         patch.object(ConfigDbEventChecker, "subscriber_state_table",
+                      return_value=MockSubscribeTable(tested_data["table"]), new_callable=PropertyMock), \
+         patch.object(sys, "exit"):
+        sel = swsscommon.Select()
+        db_event_checker = DpusTableEventChecker(sel, MagicMock())
+        expected_res = tested_data["exp_res"]
+        check_res = db_event_checker.check_update_event(tested_db_snapshot)
+        if "enabled_dhcp_interfaces" not in tested_db_snapshot:
+            assert check_res
+        else:
+            assert expected_res == check_res

From a25b9d8ecb4d543fd47ea2aec91485a9de710346 Mon Sep 17 00:00:00 2001
From: Yaqiang Zhu <yaqiangzhu@microsoft.com>
Date: Wed, 3 Jan 2024 01:08:22 +0800
Subject: [PATCH 0103/1115] [yang] Add support for smart switch in
 dhcp_server_ipv4 (#17320)

---
 .../tests/dhcp_server_ipv4.json               | 10 ++-
 .../tests_config/dhcp_server_ipv4.json        | 75 +++++++++++++++++++
 .../yang-models/sonic-dhcp-server-ipv4.yang   | 26 +++++--
 3 files changed, 103 insertions(+), 8 deletions(-)

diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/dhcp_server_ipv4.json b/src/sonic-yang-models/tests/yang_model_tests/tests/dhcp_server_ipv4.json
index b3d301150..4c65925b0 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests/dhcp_server_ipv4.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests/dhcp_server_ipv4.json
@@ -4,7 +4,7 @@
     },
     "DHCP_SERVER_IPV4_WITH_INVALID_VLAN": {
         "desc": "Configure vlan-id in DHCP_SERVER_IPV4 table which is invalid.",
-        "eStrKey" : "Pattern"
+        "eStrKey" : "InvalidValue"
     },
     "DHCP_SERVER_IPV4_INCORRECT_GATEWAY": {
         "desc": "Add gateway which is not in correct ip-prefix format.",
@@ -22,6 +22,10 @@
         "desc": "Configure wrong value for mode.",
         "eStrKey": "InvalidValue"
     },
+    "DHCP_SERVER_IPV4_WITH_NON_EXIST_BRIDGE": {
+        "desc": "Configure bridge in DHCP_SERVER_IPV4 table which does not exist in MID_PLANE_BRIDGE table.",
+        "eStrKey": "InvalidValue"
+    },
     "DHCP_SREVER_IPV4_NON_EXIST_OPTION": {
         "desc": "Configure option in DHCP_SERVER_IPV4 table which does not exist in DHCP_SERVER_IPV4_CUSTOMIZED_OPTIONS table.",
         "eStrKey": "LeafRef"
@@ -35,6 +39,10 @@
         "eStrKey": "InvalidValue",
         "eStr": ["type"]
     },
+    "DHCP_SERVER_IPV4_PORT_WITH_NO_EXIST_PORT": {
+        "desc": "Configure DHCP port in DHCP_SERVER_IPV4_PORT table which is no exist.",
+        "eStrKey": "InvalidValue"
+    },
     "DHCP_SERVER_IPV4_CUSTOMIZED_OPTIONS_TYPE_VALID_VALUE_TEXT": {
         "desc": "Add text type of DHCP_SERVER_IPV4_CUSTOMIZED_OPTIONS."
     },
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/dhcp_server_ipv4.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/dhcp_server_ipv4.json
index 3ea58eb67..3991c9317 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/dhcp_server_ipv4.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/dhcp_server_ipv4.json
@@ -1,5 +1,13 @@
 {
     "DHCP_SERVER_IPV4_VALID_FORMAT": {
+        "sonic-smart-switch:sonic-smart-switch": {
+            "sonic-smart-switch:MID_PLANE_BRIDGE": {
+                "GLOBAL": {
+                    "bridge": "bridge_midplane",
+                    "ip_prefix": "169.254.200.254/24"
+                }
+            }
+        },
         "sonic-portchannel:sonic-portchannel": {
             "sonic-portchannel:PORTCHANNEL": {
                 "PORTCHANNEL_LIST": [
@@ -38,6 +46,14 @@
                             "option60"
                         ],
                         "state": "enabled"
+                    },
+                    {
+                        "name": "bridge_midplane",
+                        "gateway": "169.254.200.254",
+                        "lease_time": 3600,
+                        "mode": "PORT",
+                        "netmask": "255.255.255.0",
+                        "state": "enabled"
                     }
                 ]
             },
@@ -164,6 +180,30 @@
             }
         }
     },
+    "DHCP_SERVER_IPV4_WITH_NON_EXIST_BRIDGE": {
+        "sonic-smart-switch:sonic-smart-switch": {
+            "sonic-smart-switch:MID_PLANE_BRIDGE": {
+                "GLOBAL": {
+                    "bridge": "bridge_midplane",
+                    "ip_prefix": "169.254.200.254/24"
+                }
+            }
+        },
+        "sonic-dhcp-server-ipv4:sonic-dhcp-server-ipv4": {
+            "sonic-dhcp-server-ipv4:DHCP_SERVER_IPV4": {
+                "DHCP_SERVER_IPV4_LIST": [
+                    {
+                        "name": "non_exist_bridge_midplane",
+                        "gateway": "192.168.0.1",
+                        "lease_time": 3600,
+                        "mode": "PORT",
+                        "netmask": "255.255.255.0",
+                        "state": "enabled"
+                    }
+                ]
+            }
+        }
+    },
     "DHCP_SREVER_IPV4_NON_EXIST_OPTION": {
         "sonic-dhcp-server-ipv4:sonic-dhcp-server-ipv4": {
             "sonic-dhcp-server-ipv4:DHCP_SERVER_IPV4_CUSTOMIZED_OPTIONS": {
@@ -248,6 +288,41 @@
             }
         }
     },
+    "DHCP_SERVER_IPV4_PORT_WITH_NO_EXIST_PORT": {
+        "sonic-smart-switch:sonic-smart-switch": {
+            "sonic-smart-switch:MID_PLANE_BRIDGE": {
+                "GLOBAL": {
+                    "bridge": "bridge_midplane",
+                    "ip_prefix": "169.254.200.254/24"
+                }
+            }
+        },
+        "sonic-dhcp-server-ipv4:sonic-dhcp-server-ipv4": {
+            "sonic-dhcp-server-ipv4:DHCP_SERVER_IPV4": {
+                "DHCP_SERVER_IPV4_LIST": [
+                    {
+                        "name": "bridge_midplane",
+                        "gateway": "169.254.200.254",
+                        "lease_time": 3600,
+                        "mode": "PORT",
+                        "netmask": "255.255.255.0",
+                        "state": "enabled"
+                    }
+                ]
+            },
+            "sonic-dhcp-server-ipv4:DHCP_SERVER_IPV4_PORT": {
+                "DHCP_SERVER_IPV4_PORT_LIST": [
+                    {
+                        "name": "bridge_midplane",
+                        "port": "non_exit_dpu",
+                        "ips": [
+                            "169.254.200.1"
+                        ]
+                    }
+                ]
+            }
+        }
+    },
     "DHCP_SERVER_IPV4_CUSTOMIZED_OPTIONS_TYPE_VALID_VALUE_TEXT": {
         "sonic-dhcp-server-ipv4:sonic-dhcp-server-ipv4": {
             "sonic-dhcp-server-ipv4:DHCP_SERVER_IPV4_CUSTOMIZED_OPTIONS": {
diff --git a/src/sonic-yang-models/yang-models/sonic-dhcp-server-ipv4.yang b/src/sonic-yang-models/yang-models/sonic-dhcp-server-ipv4.yang
index 065366639..46d31faa3 100644
--- a/src/sonic-yang-models/yang-models/sonic-dhcp-server-ipv4.yang
+++ b/src/sonic-yang-models/yang-models/sonic-dhcp-server-ipv4.yang
@@ -27,6 +27,10 @@ module sonic-dhcp-server-ipv4 {
         prefix lag;
     }
 
+    import sonic-smart-switch {
+        prefix smartswitch;
+    }
+
     description "DHCP_SERVER_IPV4 YANG module for SONiC OS";
 
     revision 2023-07-19 {
@@ -46,12 +50,17 @@ module sonic-dhcp-server-ipv4 {
 
                 leaf name {
                     description "Interface name for DHCP server";
-                    // Comment VLAN leaf reference here until libyang back-links issue is resolved and use VLAN string pattern
-                    // type leafref {
-                    //     path "/vlan:sonic-vlan/vlan:VLAN/vlan:VLAN_LIST/vlan:name";
-                    // }
-                    type string {
-                        pattern 'Vlan([0-9]{1,3}|[1-3][0-9]{3}|[4][0][0-8][0-9]|[4][0][9][0-4])';
+                    type union {
+                        // Comment VLAN leaf reference here until libyang back-links issue is resolved and use VLAN string pattern
+                        // type leafref {
+                        //     path "/vlan:sonic-vlan/vlan:VLAN/vlan:VLAN_LIST/vlan:name";
+                        // }
+                        type string {
+                            pattern 'Vlan([0-9]{1,3}|[1-3][0-9]{3}|[4][0][0-8][0-9]|[4][0][9][0-4])';
+                        }
+                        type leafref {
+                            path "/smartswitch:sonic-smart-switch/smartswitch:MID_PLANE_BRIDGE/smartswitch:GLOBAL/smartswitch:bridge";
+                        }
                     }
                 }
 
@@ -204,7 +213,7 @@ module sonic-dhcp-server-ipv4 {
                 }
 
                 leaf port {
-                    description "Interface under vlan";
+                    description "Interface under DHCP interface";
                     type union {
                         type leafref {
                             path "/port:sonic-port/port:PORT/port:PORT_LIST/port:name";
@@ -212,6 +221,9 @@ module sonic-dhcp-server-ipv4 {
                         type leafref {
                             path "/lag:sonic-portchannel/lag:PORTCHANNEL/lag:PORTCHANNEL_LIST/lag:name";
                         }
+                        type leafref {
+                            path "/smartswitch:sonic-smart-switch/smartswitch:DPUS/smartswitch:DPUS_LIST/smartswitch:midplane_interface";
+                        }
                     }
                 }
 

From 8ed161fec71b58ab8123e341e0488f4a06f8064a Mon Sep 17 00:00:00 2001
From: Jon Goldberg <63672455+jon-nokia@users.noreply.github.com>
Date: Wed, 3 Jan 2024 00:18:25 -0500
Subject: [PATCH 0104/1115] sonic-slave-bookworm/Dockerfile.j2 remove sudo
 (#17433)

PROXY variables are not available to sudo users during docker build

This patch fixes below error during builds using proxy:

Step 57/63 : RUN sudo apt-get install python3-m2crypto
 ---> Running in ebfa797ebcf8
Reading package lists...
Building dependency tree...
Reading state information...
Suggested packages:
  python-m2crypto-doc
The following NEW packages will be installed:
  python3-m2crypto
0 upgraded, 1 newly installed, 0 to remove and 5 not upgraded.
Need to get 169 kB of archives.
After this operation, 725 kB of additional disk space will be used.
Ign:1 http://deb.debian.org/debian bookworm/main armhf python3-m2crypto armhf 0.38.0-4+b1
Ign:1 http://deb.debian.org/debian bookworm/main armhf python3-m2crypto armhf 0.38.0-4+b1
Ign:1 http://deb.debian.org/debian bookworm/main armhf python3-m2crypto armhf 0.38.0-4+b1
Err:1 http://deb.debian.org/debian bookworm/main armhf python3-m2crypto armhf 0.38.0-4+b1
  Could not connect to debian.map.fastlydns.net:80 (146.75.78.132), connection timed out Unable to connect to deb.debian.org:http:
E: Failed to fetch http://deb.debian.org/debian/pool/main/m/m2crypto/python3-m2crypto_0.38.0-4%2bb1_armhf.deb  Could not connect to debian.map.fastlydns.net:80 (146.75.78.132), connection timed out Unable to connect to deb.debian.org:http:
E: Unable to fetch some archives, maybe run apt-get update or try with --fix-missing?
---
 sonic-slave-bookworm/Dockerfile.j2 | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/sonic-slave-bookworm/Dockerfile.j2 b/sonic-slave-bookworm/Dockerfile.j2
index ef29115b0..60f3c0b98 100644
--- a/sonic-slave-bookworm/Dockerfile.j2
+++ b/sonic-slave-bookworm/Dockerfile.j2
@@ -556,7 +556,7 @@ RUN echo "DOCKER_OPTS=\"--experimental --storage-driver=vfs {{ DOCKER_EXTRA_OPTS
 RUN update-alternatives --set iptables /usr/sbin/iptables-legacy
 
 # Install m2crypto package, needed by SWI tools
-RUN sudo apt-get install python3-m2crypto
+RUN apt-get install python3-m2crypto
 
 # Install swi tools
 RUN pip3 install git+https://github.com/aristanetworks/swi-tools.git@bead66bf261770237f7dd21ace3774ba04a017e9

From 038ca267c8c930176213945300bdd3ff812633c8 Mon Sep 17 00:00:00 2001
From: prabhataravind <108555774+prabhataravind@users.noreply.github.com>
Date: Tue, 2 Jan 2024 21:29:34 -0800
Subject: [PATCH 0105/1115] [image_config]: Update DHCP rate-limit for mgmt TOR
 devices (#17630)

* [image_config]: Update DHCP rate-limit for mgmt TOR devices

    Change DHCP rate limit(queue4,group3) in SONiC copp configuration to 300 PPS
    for mgmt TORs while keeping the rate limit at 100 PPS for other topologies.

    Why I did it:
    Some mgmt TORs based on Marvell ASIC do not support 100 PPS CIR, so that led
    to these devices silently dropping DHCP packets.

    Microsoft ADO: **25820076**

    How to verify it:
    Send DHCP broadcast packets to an M0 DUT and verify that they are trapped to
    CPU at 300 PPS. On non-mgmt devices, the packets should be trapped at CIR of
    100 PPS. Also ran sonic-mgmt dhcp_relay test and confirmed that it passes.

Signed-off-by: Prabhat Aravind <paravind@microsoft.com>
---
 files/image_config/copp/copp_cfg.j2 | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/files/image_config/copp/copp_cfg.j2 b/files/image_config/copp/copp_cfg.j2
index f3550677d..dcae06fc0 100755
--- a/files/image_config/copp/copp_cfg.j2
+++ b/files/image_config/copp/copp_cfg.j2
@@ -34,8 +34,13 @@
 		    "queue": "4",
 		    "meter_type":"packets",
 		    "mode":"sr_tcm",
+{% if DEVICE_METADATA is defined and DEVICE_METADATA['localhost'] is defined and DEVICE_METADATA['localhost']['type'] is defined and 'Mgmt' in DEVICE_METADATA['localhost']['type'] %}
+		    "cir":"300",
+		    "cbs":"300",
+{% else %}
 		    "cir":"100",
 		    "cbs":"100",
+{% endif %}
 		    "red_action":"drop"
 	    },
 	    "queue1_group1": {

From 7011e00eba1d3bd19a4739afd391a8e396dd3533 Mon Sep 17 00:00:00 2001
From: Xichen96 <lukelin0907@gmail.com>
Date: Thu, 4 Jan 2024 05:39:03 +0800
Subject: [PATCH 0106/1115] [dhcp_server] add dhcp server show option (#17469)

* add show dhcp_server option

* Option to option id
---
 .../cli-plugin-tests/test_show_dhcp_server.py | 25 +++++++++++++++++++
 .../cli/show/plugins/show_dhcp_server.py      | 16 ++++++++++++
 2 files changed, 41 insertions(+)

diff --git a/dockers/docker-dhcp-server/cli-plugin-tests/test_show_dhcp_server.py b/dockers/docker-dhcp-server/cli-plugin-tests/test_show_dhcp_server.py
index e461396ef..55ab4cbdb 100644
--- a/dockers/docker-dhcp-server/cli-plugin-tests/test_show_dhcp_server.py
+++ b/dockers/docker-dhcp-server/cli-plugin-tests/test_show_dhcp_server.py
@@ -149,3 +149,28 @@ def test_show_dhcp_server_ipv4_info_with_customized_options(self, mock_db):
         assert result.exit_code == 0, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
         assert result.stdout == expected_stdout
 
+    def test_show_dhcp_server_ipv4_option_without_name(self, mock_db):
+        expected_stdout = """\
+Option Name      Option ID  Value        Type
+-------------  -----------  -----------  ------
+option60                60  dummy_value  string
+"""
+        runner = CliRunner()
+        db = clicommon.Db()
+        db.db = mock_db
+        result = runner.invoke(show_dhcp_server.dhcp_server.commands["ipv4"].commands["option"], [], obj=db)
+        assert result.exit_code == 0, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
+        assert result.stdout == expected_stdout
+
+    def test_show_dhcp_server_ipv4_option_with_name(self, mock_db):
+        expected_stdout = """\
+Option Name      Option ID  Value        Type
+-------------  -----------  -----------  ------
+option60                60  dummy_value  string
+"""
+        runner = CliRunner()
+        db = clicommon.Db()
+        db.db = mock_db
+        result = runner.invoke(show_dhcp_server.dhcp_server.commands["ipv4"].commands["option"], ["option60"], obj=db)
+        assert result.exit_code == 0, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
+        assert result.stdout == expected_stdout
diff --git a/dockers/docker-dhcp-server/cli/show/plugins/show_dhcp_server.py b/dockers/docker-dhcp-server/cli/show/plugins/show_dhcp_server.py
index 93e38af92..7f68bf055 100644
--- a/dockers/docker-dhcp-server/cli/show/plugins/show_dhcp_server.py
+++ b/dockers/docker-dhcp-server/cli/show/plugins/show_dhcp_server.py
@@ -100,5 +100,21 @@ def info(db, dhcp_interface, with_customized_options):
     click.echo(tabulate(table, headers=headers))
 
 
+@ipv4.command()
+@click.argument("option_name", required=False)
+@clicommon.pass_db
+def option(db, option_name):
+    if not option_name:
+        option_name = "*"
+    headers = ["Option Name", "Option ID", "Value", "Type"]
+    table = []
+    dbconn = db.db
+    for key in dbconn.keys("CONFIG_DB", "DHCP_SERVER_IPV4_CUSTOMIZED_OPTIONS|" + option_name):
+        entry = dbconn.get_all("CONFIG_DB", key)
+        name = key.split("|")[1]
+        table.append([name, entry["id"], entry["value"], entry["type"]])
+    click.echo(tabulate(table, headers=headers))
+
+
 def register(cli):
     cli.add_command(dhcp_server)

From ffe292a021b86c41c53b42983f5da757b7938aa0 Mon Sep 17 00:00:00 2001
From: Xichen96 <lukelin0907@gmail.com>
Date: Thu, 4 Jan 2024 05:39:39 +0800
Subject: [PATCH 0107/1115] [dhcp_server] add config dhcp server enable
 (#17605)

* add config dhcp_server enable

* fix bug

* fix bug

* fix bug

* fix bug
---
 .../cli-plugin-tests/conftest.py                  |  7 +++++++
 .../cli-plugin-tests/mock_config_db.json          |  8 ++++++++
 .../cli-plugin-tests/test_config_dhcp_server.py   | 15 +++++++++++++++
 .../cli-plugin-tests/test_show_dhcp_server.py     |  3 ++-
 .../cli/config/plugins/dhcp_server.py             | 13 +++++++++++++
 5 files changed, 45 insertions(+), 1 deletion(-)

diff --git a/dockers/docker-dhcp-server/cli-plugin-tests/conftest.py b/dockers/docker-dhcp-server/cli-plugin-tests/conftest.py
index 560e25667..ece7d576d 100644
--- a/dockers/docker-dhcp-server/cli-plugin-tests/conftest.py
+++ b/dockers/docker-dhcp-server/cli-plugin-tests/conftest.py
@@ -69,6 +69,12 @@ def delete(table, key):
         if table == "STATE_DB":
             del mock_state_db[key]
 
+    def set_(table, key, k, v):
+        assert table == "CONFIG_DB" or table == "STATE_DB"
+        if table == "CONFIG_DB":
+            mock_config_db[key][k] = v
+        if table == "STATE_DB":
+            mock_state_db[key][k] = v
 
     db.keys = mock.Mock(side_effect=keys)
     db.get_all = mock.Mock(side_effect=get_all)
@@ -76,5 +82,6 @@ def delete(table, key):
     db.hmset = mock.Mock(side_effect=hmset)
     db.exists = mock.Mock(side_effect=exists)
     db.delete = mock.Mock(side_effect=delete)
+    db.set = mock.Mock(side_effect=set_)
 
     yield db
diff --git a/dockers/docker-dhcp-server/cli-plugin-tests/mock_config_db.json b/dockers/docker-dhcp-server/cli-plugin-tests/mock_config_db.json
index 751f716f6..fcc088e8c 100644
--- a/dockers/docker-dhcp-server/cli-plugin-tests/mock_config_db.json
+++ b/dockers/docker-dhcp-server/cli-plugin-tests/mock_config_db.json
@@ -20,6 +20,14 @@
         "customized_options": "option60",
         "state": "enabled"
     },
+    "DHCP_SERVER_IPV4|Vlan300": {
+        "gateway": "100.1.1.1",
+        "lease_time": "3600",
+        "mode": "PORT",
+        "netmask": "255.255.255.0",
+        "customized_options": "option60",
+        "state": "disabled"
+    },
     "DHCP_SERVER_IPV4_CUSTOMIZED_OPTIONS|option60": {
         "id": "60",
         "type": "string",
diff --git a/dockers/docker-dhcp-server/cli-plugin-tests/test_config_dhcp_server.py b/dockers/docker-dhcp-server/cli-plugin-tests/test_config_dhcp_server.py
index 17add53a2..57ed08161 100644
--- a/dockers/docker-dhcp-server/cli-plugin-tests/test_config_dhcp_server.py
+++ b/dockers/docker-dhcp-server/cli-plugin-tests/test_config_dhcp_server.py
@@ -128,3 +128,18 @@ def test_config_dhcp_server_ipv4_del_does_not_exist(self, mock_db):
         result = runner.invoke(dhcp_server.dhcp_server.commands["ipv4"].commands["del"], ["Vlan200"], obj=db)
         assert result.exit_code == 2, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
 
+    def test_config_dhcp_server_ipv4_enable_already_exist(self, mock_db):
+        runner = CliRunner()
+        db = clicommon.Db()
+        db.db = mock_db
+        result = runner.invoke(dhcp_server.dhcp_server.commands["ipv4"].commands["enable"], ["Vlan300"], obj=db)
+        assert result.exit_code == 0, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
+        assert mock_db.get("CONFIG_DB", "DHCP_SERVER_IPV4|Vlan300", "state") == "enabled"
+
+    def test_config_dhcp_server_ipv4_enable_does_not_exist(self, mock_db):
+        runner = CliRunner()
+        db = clicommon.Db()
+        db.db = mock_db
+        result = runner.invoke(dhcp_server.dhcp_server.commands["ipv4"].commands["enable"], ["Vlan200"], obj=db)
+        assert result.exit_code == 2, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
+
diff --git a/dockers/docker-dhcp-server/cli-plugin-tests/test_show_dhcp_server.py b/dockers/docker-dhcp-server/cli-plugin-tests/test_show_dhcp_server.py
index 55ab4cbdb..348e7f0ed 100644
--- a/dockers/docker-dhcp-server/cli-plugin-tests/test_show_dhcp_server.py
+++ b/dockers/docker-dhcp-server/cli-plugin-tests/test_show_dhcp_server.py
@@ -113,8 +113,9 @@ def test_show_dhcp_server_ipv4_range_single_ip(self, mock_db):
     def test_show_dhcp_server_ipv4_info_without_intf(self, mock_db):
         expected_stdout = """\
 Interface    Mode    Gateway    Netmask          Lease Time(s)  State
------------  ------  ---------  -------------  ---------------  -------
+-----------  ------  ---------  -------------  ---------------  --------
 Vlan100      PORT    100.1.1.1  255.255.255.0             3600  enabled
+Vlan300      PORT    100.1.1.1  255.255.255.0             3600  disabled
 """
         runner = CliRunner()
         db = clicommon.Db()
diff --git a/dockers/docker-dhcp-server/cli/config/plugins/dhcp_server.py b/dockers/docker-dhcp-server/cli/config/plugins/dhcp_server.py
index 45475e3f6..ae60611ae 100644
--- a/dockers/docker-dhcp-server/cli/config/plugins/dhcp_server.py
+++ b/dockers/docker-dhcp-server/cli/config/plugins/dhcp_server.py
@@ -116,6 +116,19 @@ def dhcp_server_ipv4_del(db, dhcp_interface):
         ctx.fail("Dhcp interface %s does not exist in config db".format(dhcp_interface))
 
 
+@dhcp_server_ipv4.command(name="enable")
+@click.argument("dhcp_interface", required=True)
+@clicommon.pass_db
+def dhcp_server_ipv4_enable(db, dhcp_interface):
+    ctx = click.get_current_context()
+    dbconn = db.db
+    key = "DHCP_SERVER_IPV4|" + dhcp_interface
+    if dbconn.exists("CONFIG_DB", key):
+        dbconn.set("CONFIG_DB", key, "state", "enabled")
+    else:
+        ctx.fail("Failed to enable, dhcp interface %s does not exist".format(dhcp_interface))
+
+
 def register(cli):
     # cli.add_command(dhcp_server)
     pass

From 977e73d37049901b6e3cd51190f1e19cdb3fcec5 Mon Sep 17 00:00:00 2001
From: bingwang-ms <66248323+bingwang-ms@users.noreply.github.com>
Date: Wed, 3 Jan 2024 14:55:38 -0800
Subject: [PATCH 0108/1115] Update backend_acl.py to specify ACL table name
 (#17553)

---
 files/image_config/backend_acl/backend_acl.py | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/files/image_config/backend_acl/backend_acl.py b/files/image_config/backend_acl/backend_acl.py
index bb22a6088..113e1d1ac 100755
--- a/files/image_config/backend_acl/backend_acl.py
+++ b/files/image_config/backend_acl/backend_acl.py
@@ -78,7 +78,7 @@ def load_backend_acl(device_type):
         if os.path.isfile(BACKEND_ACL_TEMPLATE_FILE):
             run_command(['sudo', SONIC_CFGGEN_PATH, '-d', '-t', '{},{}'.format(BACKEND_ACL_TEMPLATE_FILE, BACKEND_ACL_FILE)])
         if os.path.isfile(BACKEND_ACL_FILE):
-            run_command(['acl-loader', 'update', 'incremental', BACKEND_ACL_FILE])
+            run_command(['acl-loader', 'update', 'full', BACKEND_ACL_FILE, '--table_name', 'DATAACL'])
     else:
         log_info("Skipping backend acl load - conditions not met")
 

From c20abb9e28d93cd0b9ecab8d77881ff7a4934b5a Mon Sep 17 00:00:00 2001
From: prabhataravind <108555774+prabhataravind@users.noreply.github.com>
Date: Wed, 3 Jan 2024 17:44:22 -0800
Subject: [PATCH 0109/1115] [docker_image_ctl.j2]: swss docker initialization
 improvements (#17628)

* [docker_image_ctl.j2]: swss docker initialization improvements

This commit attempts to address the following:
 * Make sure swss container is indeed up and running before running any commands
   on it. In case where swss container is not fully up when swss.sh attempts to
   create swss:/ready file using "docker exec swss$DEV touch", the command can
   fail silently and can cause swssconfig to wait forever leading to missing IP
   decap configuration among other things. Add a wait so that docker commands
   are run only after swss container status is "Running"
*  Add a log when swss:/ready file is created or if the file creation fails so
   that it becomes easier to debug such scenarios in the future
* [docker_image_ctl.j2]: Use swss$DEV to accommodate multi ASIC platforms as well

Signed-off-by: Prabhat Aravind <paravind@microsoft.com>
---
 files/build_templates/docker_image_ctl.j2 | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/files/build_templates/docker_image_ctl.j2 b/files/build_templates/docker_image_ctl.j2
index 2093622da..95c2e1fa5 100644
--- a/files/build_templates/docker_image_ctl.j2
+++ b/files/build_templates/docker_image_ctl.j2
@@ -283,6 +283,12 @@ function postStartAction()
     fi
     chgrp -f redis $REDIS_SOCK && chmod -f 0760 $REDIS_SOCK
 {%- elif docker_container_name == "swss" %}
+    # Wait until swss container state is Running
+    until [[ ($(docker inspect -f {{"'{{.State.Running}}'"}} swss$DEV) == "true") ]]; do
+        sleep 0.1
+    done
+    echo "swss container is up and running"
+
     docker exec swss$DEV rm -f /ready   # remove cruft
     if [[ "$BOOT_TYPE" == "fast" ]] && [[ -d /host/fast-reboot ]]; then
         test -e /host/fast-reboot/fdb.json && docker cp /host/fast-reboot/fdb.json swss$DEV:/
@@ -292,6 +298,9 @@ function postStartAction()
         rm -fr /host/fast-reboot
     fi
     docker exec swss$DEV touch /ready # signal swssconfig.sh to go
+    # Re-confirm that file is indeed created and log an error if not
+    docker exec swss$DEV test -f /ready && echo "File swss:/ready created" || echo "Error: File swss:/ready doesn't exist"
+
 {%- elif docker_container_name == "pmon" %}
 
     DEVPATH="/usr/share/sonic/device"

From ee49d0dfec0070f113f21ad9203ff223a76d7433 Mon Sep 17 00:00:00 2001
From: Junchao-Mellanox <57339448+Junchao-Mellanox@users.noreply.github.com>
Date: Thu, 4 Jan 2024 15:42:33 +0800
Subject: [PATCH 0110/1115] [Mellanox] Fix issues found for CMIS host
 management  (#17637)

- Why I did it
1. Thermal updater should wait more time for module to be initialized
2. sfp should get temperature threshold from EEPROM because SDK sysfs is not yet supported
3. Rename sfp function to fix typo
4. sfp.get_presence should return False if module is under initialization

- How I did it
1. Thermal updater should wait more time for module to be initialized
2. sfp should get temperature threshold from EEPROM because SDK sysfs is not yet supported
3. Rename sfp function to fix typo
4. sfp.get_presence should return False if module is under initialization

- How to verify it
Manual test
Unit test
---
 .../mlnx-platform-api/sonic_platform/sfp.py   | 102 ++++++++++--------
 .../sonic_platform/thermal.py                 |   9 +-
 .../sonic_platform/thermal_manager.py         |   2 +-
 .../sonic_platform/thermal_updater.py         |  32 +++---
 .../mlnx-platform-api/tests/test_sfp.py       |  22 ++--
 .../mlnx-platform-api/tests/test_thermal.py   |  10 +-
 .../tests/test_thermal_updater.py             |  12 +--
 7 files changed, 109 insertions(+), 80 deletions(-)

diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py b/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py
index d03c0fe10..f6a9380bf 100644
--- a/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py
+++ b/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py
@@ -327,17 +327,10 @@ def get_presence(self):
         Returns:
             bool: True if device is present, False if not
         """
-        if DeviceDataManager.is_independent_mode():
-            if utils.read_int_from_file(f'/sys/module/sx_core/asic0/module{self.sdk_index}/control') != 0:
-                if not utils.read_int_from_file(f'/sys/module/sx_core/asic0/module{self.sdk_index}/hw_present'):
-                    return False
-                if not utils.read_int_from_file(f'/sys/module/sx_core/asic0/module{self.sdk_index}/power_good'):
-                    return False
-                if not utils.read_int_from_file(f'/sys/module/sx_core/asic0/module{self.sdk_index}/power_on'):
-                    return False
-                if utils.read_int_from_file(f'/sys/module/sx_core/asic0/module{self.sdk_index}/hw_reset') == 1:
-                    return False
-                
+        try:
+            self.is_sw_control()
+        except:
+            return False
         eeprom_raw = self._read_eeprom(0, 1, log_on_error=False)
         return eeprom_raw is not None
 
@@ -877,6 +870,13 @@ def get_tx_fault(self):
         return [False] * api.NUM_CHANNELS if api else None
 
     def get_temperature(self):
+        """Get SFP temperature
+
+        Returns:
+            None if there is an error (sysfs does not exist or sysfs return None or module EEPROM not readable)
+            0.0 if module temperature is not supported or module is under initialization
+            other float value if module temperature is available
+        """
         try:
             if not self.is_sw_control():
                 temp_file = f'/sys/module/sx_core/asic0/module{self.sdk_index}/temperature/input'
@@ -893,59 +893,68 @@ def get_temperature(self):
         temperature = super().get_temperature()
         return temperature if temperature is not None else None
 
-    def get_temperature_warning_threashold(self):
+    def get_temperature_warning_threshold(self):
         """Get temperature warning threshold
 
         Returns:
-            int: temperature warning threshold
+            None if there is an error (module EEPROM not readable)
+            0.0 if warning threshold is not supported or module is under initialization
+            other float value if warning threshold is available
         """
         try:
-            if not self.is_sw_control():
-                emergency = utils.read_int_from_file(f'/sys/module/sx_core/asic0/module{self.sdk_index}/temperature/emergency',
-                                                     log_func=None,
-                                                     default=None)
-                return emergency / SFP_TEMPERATURE_SCALE if emergency is not None else SFP_DEFAULT_TEMP_WARNNING_THRESHOLD
+            self.is_sw_control()
         except:
-            return SFP_DEFAULT_TEMP_WARNNING_THRESHOLD
-
-        thresh = self._get_temperature_threshold()
-        if thresh and consts.TEMP_HIGH_WARNING_FIELD in thresh:
-            return thresh[consts.TEMP_HIGH_WARNING_FIELD]
-        return SFP_DEFAULT_TEMP_WARNNING_THRESHOLD
+            return 0.0
+        
+        support, thresh = self._get_temperature_threshold()
+        if support is None or thresh is None:
+            # Failed to read from EEPROM
+            return None
+        if support is False:
+            # Do not support
+            return 0.0
+        return thresh.get(consts.TEMP_HIGH_WARNING_FIELD, SFP_DEFAULT_TEMP_WARNNING_THRESHOLD)
 
-    def get_temperature_critical_threashold(self):
+    def get_temperature_critical_threshold(self):
         """Get temperature critical threshold
 
         Returns:
-            int: temperature critical threshold
+            None if there is an error (module EEPROM not readable)
+            0.0 if critical threshold is not supported or module is under initialization
+            other float value if critical threshold is available
         """
         try:
-            if not self.is_sw_control():
-                critical = utils.read_int_from_file(f'/sys/module/sx_core/asic0/module{self.sdk_index}/temperature/critical',
-                                                    log_func=None,
-                                                    default=None)
-                return critical / SFP_TEMPERATURE_SCALE if critical is not None else SFP_DEFAULT_TEMP_CRITICAL_THRESHOLD
+            self.is_sw_control()
         except:
-            return SFP_DEFAULT_TEMP_CRITICAL_THRESHOLD
+            return 0.0
 
-        thresh = self._get_temperature_threshold()
-        if thresh and consts.TEMP_HIGH_ALARM_FIELD in thresh:
-            return thresh[consts.TEMP_HIGH_ALARM_FIELD]
-        return SFP_DEFAULT_TEMP_CRITICAL_THRESHOLD
+        support, thresh = self._get_temperature_threshold()
+        if support is None or thresh is None:
+            # Failed to read from EEPROM
+            return None
+        if support is False:
+            # Do not support
+            return 0.0
+        return thresh.get(consts.TEMP_HIGH_ALARM_FIELD, SFP_DEFAULT_TEMP_CRITICAL_THRESHOLD)
 
     def _get_temperature_threshold(self):
+        """Get temperature thresholds data from EEPROM
+
+        Returns:
+            tuple: (support, thresh_dict)
+        """
         self.reinit()
         api = self.get_xcvr_api()
         if not api:
-            return None
+            return None, None
 
         thresh_support = api.get_transceiver_thresholds_support()
         if thresh_support:
             if isinstance(api, sff8636.Sff8636Api) or isinstance(api, sff8436.Sff8436Api):
-                return api.xcvr_eeprom.read(consts.TEMP_THRESHOLDS_FIELD)
-            return api.xcvr_eeprom.read(consts.THRESHOLDS_FIELD)
+                return thresh_support, api.xcvr_eeprom.read(consts.TEMP_THRESHOLDS_FIELD)
+            return thresh_support, api.xcvr_eeprom.read(consts.THRESHOLDS_FIELD)
         else:
-            return None
+            return thresh_support, {}
 
     def get_xcvr_api(self):
         """
@@ -964,17 +973,22 @@ def get_xcvr_api(self):
     def is_sw_control(self):
         if not DeviceDataManager.is_independent_mode():
             return False
-
+        
         db = utils.DbUtils.get_db_instance('STATE_DB')
         logical_port = NvidiaSFPCommon.get_logical_port_by_sfp_index(self.sdk_index)
         if not logical_port:
-            raise Exception(f'Module {self.sdk_index} is not present or in initialization')
+            raise Exception(f'Module {self.sdk_index} is not present or under initialization')
         
         initialized = db.exists('STATE_DB', f'TRANSCEIVER_STATUS|{logical_port}')
         if not initialized:
-            raise Exception(f'Module {self.sdk_index} is not present or in initialization')
+            raise Exception(f'Module {self.sdk_index} is not present or under initialization')
         
-        return utils.read_int_from_file(f'/sys/module/sx_core/asic0/module{self.sdk_index}/control') == 1
+        try:
+            return utils.read_int_from_file(f'/sys/module/sx_core/asic0/module{self.sdk_index}/control', 
+                                            raise_exception=True, log_func=None) == 1
+        except:
+            # just in case control file does not exist
+            raise Exception(f'Module {self.sdk_index} is under initialization')
 
 
 class RJ45Port(NvidiaSFPCommon):
diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/thermal.py b/platform/mellanox/mlnx-platform-api/sonic_platform/thermal.py
index eadc822e3..180310952 100644
--- a/platform/mellanox/mlnx-platform-api/sonic_platform/thermal.py
+++ b/platform/mellanox/mlnx-platform-api/sonic_platform/thermal.py
@@ -431,7 +431,8 @@ def get_temperature(self):
             A float number of current temperature in Celsius up to nearest thousandth
             of one degree Celsius, e.g. 30.125
         """
-        return self.sfp.get_temperature()
+        value = self.sfp.get_temperature()
+        return value if (value != 0.0 and value is not None) else None
 
     def get_high_threshold(self):
         """
@@ -441,7 +442,8 @@ def get_high_threshold(self):
             A float number, the high threshold temperature of thermal in Celsius
             up to nearest thousandth of one degree Celsius, e.g. 30.125
         """
-        return self.sfp.get_temperature_warning_threashold()
+        value = self.sfp.get_temperature_warning_threshold()
+        return value if (value != 0.0 and value is not None) else None
 
     def get_high_critical_threshold(self):
         """
@@ -451,7 +453,8 @@ def get_high_critical_threshold(self):
             A float number, the high critical threshold temperature of thermal in Celsius
             up to nearest thousandth of one degree Celsius, e.g. 30.125
         """
-        return self.sfp.get_temperature_critical_threashold()
+        value = self.sfp.get_temperature_critical_threshold()
+        return value if (value != 0.0 and value is not None) else None
 
     def get_position_in_parent(self):
         """
diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/thermal_manager.py b/platform/mellanox/mlnx-platform-api/sonic_platform/thermal_manager.py
index 9e1aaded0..5c118b4c9 100644
--- a/platform/mellanox/mlnx-platform-api/sonic_platform/thermal_manager.py
+++ b/platform/mellanox/mlnx-platform-api/sonic_platform/thermal_manager.py
@@ -46,5 +46,5 @@ def deinitialize(cls):
         is a no-op.
         :return:
         """
-        if DeviceDataManager.is_independent_mode():
+        if DeviceDataManager.is_independent_mode() and cls.thermal_updater_task:
             cls.thermal_updater_task.stop()
diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/thermal_updater.py b/platform/mellanox/mlnx-platform-api/sonic_platform/thermal_updater.py
index ad0b92ef4..f2f0f75b2 100644
--- a/platform/mellanox/mlnx-platform-api/sonic_platform/thermal_updater.py
+++ b/platform/mellanox/mlnx-platform-api/sonic_platform/thermal_updater.py
@@ -56,7 +56,7 @@ def __init__(self, sfp_list):
     def load_tc_config(self):
         asic_poll_interval = 1
         sfp_poll_interval = 10
-        data = utils.load_json_file(TC_CONFIG_FILE)
+        data = utils.load_json_file(TC_CONFIG_FILE, log_func=None)
         if not data:
             logger.log_notice(f'{TC_CONFIG_FILE} does not exist, use default polling interval')
 
@@ -108,7 +108,7 @@ def clean_thermal_data(self):
 
     def wait_all_sfp_ready(self):
         logger.log_notice('Waiting for all SFP modules ready...')
-        max_wait_time = 60
+        max_wait_time = 300
         ready_set = set()
         while len(ready_set) != len(self._sfp_list):
             for sfp in self._sfp_list:
@@ -129,11 +129,11 @@ def get_asic_temp(self):
         temperature = utils.read_int_from_file('/sys/module/sx_core/asic0/temperature/input', default=None)
         return temperature * ASIC_TEMPERATURE_SCALE if temperature is not None else None
 
-    def get_asic_temp_warning_threashold(self):
+    def get_asic_temp_warning_threshold(self):
         emergency = utils.read_int_from_file('/sys/module/sx_core/asic0/temperature/emergency', default=None, log_func=None)
         return emergency * ASIC_TEMPERATURE_SCALE if emergency is not None else ASIC_DEFAULT_TEMP_WARNNING_THRESHOLD
 
-    def get_asic_temp_critical_threashold(self):
+    def get_asic_temp_critical_threshold(self):
         critical = utils.read_int_from_file('/sys/module/sx_core/asic0/temperature/critical', default=None, log_func=None)
         return critical * ASIC_TEMPERATURE_SCALE if  critical is not None else ASIC_DEFAULT_TEMP_CRITICAL_THRESHOLD
 
@@ -148,19 +148,19 @@ def update_single_module(self, sfp):
                     critical_thresh = 0
                     fault = 0
                 else:
-                    warning_thresh = sfp.get_temperature_warning_threashold()
-                    critical_thresh = sfp.get_temperature_critical_threashold()
+                    warning_thresh = sfp.get_temperature_warning_threshold()
+                    critical_thresh = sfp.get_temperature_critical_threshold()
                     fault = ERROR_READ_THERMAL_DATA if (temperature is None or warning_thresh is None or critical_thresh is None) else 0
-                    temperature = 0 if temperature is None else int(temperature * SFP_TEMPERATURE_SCALE)
-                    warning_thresh = 0 if warning_thresh is None else int(warning_thresh * SFP_TEMPERATURE_SCALE)
-                    critical_thresh = 0 if critical_thresh is None else int(critical_thresh * SFP_TEMPERATURE_SCALE)
+                    temperature = 0 if temperature is None else temperature * SFP_TEMPERATURE_SCALE
+                    warning_thresh = 0 if warning_thresh is None else warning_thresh * SFP_TEMPERATURE_SCALE
+                    critical_thresh = 0 if critical_thresh is None else critical_thresh * SFP_TEMPERATURE_SCALE
 
                 hw_management_independent_mode_update.thermal_data_set_module(
                     0, # ASIC index always 0 for now
                     sfp.sdk_index + 1,
-                    temperature,
-                    critical_thresh,
-                    warning_thresh,
+                    int(temperature),
+                    int(critical_thresh),
+                    int(warning_thresh),
                     fault
                 )
             else:
@@ -170,7 +170,7 @@ def update_single_module(self, sfp):
             if pre_presence != presence:
                 self._sfp_status[sfp.sdk_index] = presence
         except Exception as e:
-            logger.log_error('Failed to update module {sfp.sdk_index} thermal data - {e}')
+            logger.log_error(f'Failed to update module {sfp.sdk_index} thermal data - {e}')
             hw_management_independent_mode_update.thermal_data_set_module(
                 0, # ASIC index always 0 for now
                 sfp.sdk_index + 1,
@@ -187,8 +187,8 @@ def update_module(self):
     def update_asic(self):
         try:
             asic_temp = self.get_asic_temp()
-            warn_threshold = self.get_asic_temp_warning_threashold()
-            critical_threshold = self.get_asic_temp_critical_threashold()
+            warn_threshold = self.get_asic_temp_warning_threshold()
+            critical_threshold = self.get_asic_temp_critical_threshold()
             fault = 0
             if asic_temp is None:
                 logger.log_error('Failed to read ASIC temperature, send fault to hw-management-tc')
@@ -203,7 +203,7 @@ def update_asic(self):
                 fault
             )
         except Exception as e:
-            logger.log_error('Failed to update ASIC thermal data - {e}')
+            logger.log_error(f'Failed to update ASIC thermal data - {e}')
             hw_management_independent_mode_update.thermal_data_set_asic(
                 0, # ASIC index always 0 for now
                 0,
diff --git a/platform/mellanox/mlnx-platform-api/tests/test_sfp.py b/platform/mellanox/mlnx-platform-api/tests/test_sfp.py
index d273e9bce..499983a01 100644
--- a/platform/mellanox/mlnx-platform-api/tests/test_sfp.py
+++ b/platform/mellanox/mlnx-platform-api/tests/test_sfp.py
@@ -230,14 +230,18 @@ def test_get_page_and_page_offset(self, mock_get_type_str, mock_eeprom_path, moc
         assert page == '/tmp/1/data'
         assert page_offset is 0
 
+    @mock.patch('sonic_platform.sfp.SFP.is_sw_control')
     @mock.patch('sonic_platform.sfp.SFP._read_eeprom')
-    def test_sfp_get_presence(self, mock_read):
+    def test_sfp_get_presence(self, mock_read, mock_control):
         sfp = SFP(0)
         mock_read.return_value = None
         assert not sfp.get_presence()
 
         mock_read.return_value = 0
         assert sfp.get_presence()
+        
+        mock_control.side_effect = RuntimeError('')
+        assert not sfp.get_presence()
 
     @mock.patch('sonic_platform.utils.read_int_from_file')
     def test_rj45_get_presence(self, mock_read_int):
@@ -318,14 +322,16 @@ def test_get_temperature(self, mock_read, mock_exists):
     def test_get_temperature_threshold(self):
         sfp = SFP(0)
         sfp.is_sw_control = mock.MagicMock(return_value=True)
-        assert sfp.get_temperature_warning_threashold() == 70.0
-        assert sfp.get_temperature_critical_threashold() == 80.0
 
         mock_api = mock.MagicMock()
         mock_api.get_transceiver_thresholds_support = mock.MagicMock(return_value=False)
-        sfp.get_xcvr_api = mock.MagicMock(return_value=mock_api)
-        assert sfp.get_temperature_warning_threashold() == 70.0
-        assert sfp.get_temperature_critical_threashold() == 80.0
+        sfp.get_xcvr_api = mock.MagicMock(return_value=None)
+        assert sfp.get_temperature_warning_threshold() is None
+        assert sfp.get_temperature_critical_threshold() is None
+        
+        sfp.get_xcvr_api.return_value = mock_api
+        assert sfp.get_temperature_warning_threshold() == 0.0
+        assert sfp.get_temperature_critical_threshold() == 0.0
 
         from sonic_platform_base.sonic_xcvr.fields import consts
         mock_api.get_transceiver_thresholds_support.return_value = True
@@ -334,8 +340,8 @@ def test_get_temperature_threshold(self):
             consts.TEMP_HIGH_ALARM_FIELD: 85.0,
             consts.TEMP_HIGH_WARNING_FIELD: 75.0
         })
-        assert sfp.get_temperature_warning_threashold() == 75.0
-        assert sfp.get_temperature_critical_threashold() == 85.0
+        assert sfp.get_temperature_warning_threshold() == 75.0
+        assert sfp.get_temperature_critical_threshold() == 85.0
 
     @mock.patch('sonic_platform.sfp.NvidiaSFPCommon.get_logical_port_by_sfp_index')
     @mock.patch('sonic_platform.utils.read_int_from_file')
diff --git a/platform/mellanox/mlnx-platform-api/tests/test_thermal.py b/platform/mellanox/mlnx-platform-api/tests/test_thermal.py
index a59b8dda4..e17d91cb0 100644
--- a/platform/mellanox/mlnx-platform-api/tests/test_thermal.py
+++ b/platform/mellanox/mlnx-platform-api/tests/test_thermal.py
@@ -160,11 +160,17 @@ def test_sfp_thermal(self):
         assert thermal.get_position_in_parent() == 1
         assert thermal.is_replaceable() == False
         sfp.get_temperature = mock.MagicMock(return_value=35.4)
-        sfp.get_temperature_warning_threashold = mock.MagicMock(return_value=70)
-        sfp.get_temperature_critical_threashold = mock.MagicMock(return_value=80)
+        sfp.get_temperature_warning_threshold = mock.MagicMock(return_value=70)
+        sfp.get_temperature_critical_threshold = mock.MagicMock(return_value=80)
         assert thermal.get_temperature() == 35.4
         assert thermal.get_high_threshold() == 70
         assert thermal.get_high_critical_threshold() == 80
+        sfp.get_temperature = mock.MagicMock(return_value=0)
+        sfp.get_temperature_warning_threshold = mock.MagicMock(return_value=0)
+        sfp.get_temperature_critical_threshold = mock.MagicMock(return_value=None)
+        assert thermal.get_temperature() is None
+        assert thermal.get_high_threshold() is None
+        assert thermal.get_high_critical_threshold() is None
 
     @mock.patch('sonic_platform.utils.read_float_from_file')
     def test_get_temperature(self, mock_read):
diff --git a/platform/mellanox/mlnx-platform-api/tests/test_thermal_updater.py b/platform/mellanox/mlnx-platform-api/tests/test_thermal_updater.py
index 1a34a7440..8e7509ce9 100644
--- a/platform/mellanox/mlnx-platform-api/tests/test_thermal_updater.py
+++ b/platform/mellanox/mlnx-platform-api/tests/test_thermal_updater.py
@@ -97,23 +97,23 @@ def test_update_asic(self, mock_read):
         mock_read.return_value = 8
         updater = ThermalUpdater(None)
         assert updater.get_asic_temp() == 1000
-        assert updater.get_asic_temp_warning_threashold() == 1000
-        assert updater.get_asic_temp_critical_threashold() == 1000
+        assert updater.get_asic_temp_warning_threshold() == 1000
+        assert updater.get_asic_temp_critical_threshold() == 1000
         updater.update_asic()
         hw_management_independent_mode_update.thermal_data_set_asic.assert_called_once()
 
         mock_read.return_value = None
         assert updater.get_asic_temp() is None
-        assert updater.get_asic_temp_warning_threashold() == ASIC_DEFAULT_TEMP_WARNNING_THRESHOLD
-        assert updater.get_asic_temp_critical_threashold() == ASIC_DEFAULT_TEMP_CRITICAL_THRESHOLD
+        assert updater.get_asic_temp_warning_threshold() == ASIC_DEFAULT_TEMP_WARNNING_THRESHOLD
+        assert updater.get_asic_temp_critical_threshold() == ASIC_DEFAULT_TEMP_CRITICAL_THRESHOLD
 
     def test_update_module(self):
         mock_sfp = mock.MagicMock()
         mock_sfp.sdk_index = 10
         mock_sfp.get_presence = mock.MagicMock(return_value=True)
         mock_sfp.get_temperature = mock.MagicMock(return_value=55.0)
-        mock_sfp.get_temperature_warning_threashold = mock.MagicMock(return_value=70.0)
-        mock_sfp.get_temperature_critical_threashold = mock.MagicMock(return_value=80.0)
+        mock_sfp.get_temperature_warning_threshold = mock.MagicMock(return_value=70.0)
+        mock_sfp.get_temperature_critical_threshold = mock.MagicMock(return_value=80.0)
         updater = ThermalUpdater([mock_sfp])
         updater.update_module()
         hw_management_independent_mode_update.thermal_data_set_module.assert_called_once_with(0, 11, 55000, 80000, 70000, 0)

From a0e2082efd206876930dcd2b181a09963e892061 Mon Sep 17 00:00:00 2001
From: Dev Ojha <47282568+developfast@users.noreply.github.com>
Date: Thu, 4 Jan 2024 22:35:42 +0530
Subject: [PATCH 0111/1115] Update Dockerfile.j2 (#17663)

---
 dockers/docker-sonic-mgmt/Dockerfile.j2 | 12 +++++++++---
 1 file changed, 9 insertions(+), 3 deletions(-)

diff --git a/dockers/docker-sonic-mgmt/Dockerfile.j2 b/dockers/docker-sonic-mgmt/Dockerfile.j2
index c42478d9a..3efb3e599 100755
--- a/dockers/docker-sonic-mgmt/Dockerfile.j2
+++ b/dockers/docker-sonic-mgmt/Dockerfile.j2
@@ -101,7 +101,9 @@ RUN python3 -m pip install aiohttp \
                  scapy==2.4.5 \
                  setuptools-rust \
                  six \
-                 snappi[ixnetwork,convergence]==0.9.1 \
+                 snappi==0.9.1 \
+                 snappi-convergence==0.4.1 \
+                 snappi-ixnetwork==0.9.1 \
                  tabulate \
                  textfsm==1.1.2 \
                  thrift==0.11.0 \
@@ -182,7 +184,9 @@ RUN python2 -m pip install allure-pytest==2.8.22 \
                 scandir \
                 scapy==2.4.5 \
                 six \
-                snappi[ixnetwork,convergence]==0.9.1 \
+                snappi==0.9.1 \
+                snappi-convergence==0.4.1 \
+                snappi-ixnetwork==0.9.1 \
                 statistics \
                 tabulate \
                 textfsm==1.1.3 \
@@ -333,7 +337,9 @@ RUN python3 -m pip install aiohttp \
                            scapy==2.4.5 \
                            setuptools-rust \
                            six \
-                           snappi[ixnetwork,convergence]==0.9.1 \
+                           snappi==0.9.1 \
+                           snappi-convergence==0.4.1 \
+                           snappi-ixnetwork==0.9.1 \
                            sshconf==0.2.5 \
                            tabulate \
                            textfsm==1.1.2 \

From 98c1f95a93a16336d53ece8858393582c7f8798d Mon Sep 17 00:00:00 2001
From: zitingguo-ms <zitingguo@microsoft.com>
Date: Fri, 5 Jan 2024 23:05:29 +0800
Subject: [PATCH 0112/1115] [YANG] Enable Yang model for BGP_BBR config entry
 (#17622)

Why I did it
Enable Yang model for BGP_BBR config entry.

{
        "BGP_BBR": {
            "all": {
                "status": "enabled"/"disabled"
            }
        }
}
Work item tracking
Microsoft ADO (number only): 25988660
How I did it
Add yang model and ut for BGP_BBR.

How to verify it
Use GCU cmd to change bbr status.
Create following json patch: disable_bbr.json-patch

[
 {
  "op": "replace",
  "path": "/BGP_BBR/all/status",
  "value": "disabled"
 }
]
Run sudo config apply-patch ./disable_bbr.json-patch cmd on dut. Success.
---
 src/sonic-yang-models/doc/Configuration.md    | 15 +++++++
 src/sonic-yang-models/setup.py                |  1 +
 .../tests/files/sample_config_db.json         |  5 +++
 .../tests/yang_model_tests/tests/bgp_bbr.json |  9 ++++
 .../tests_config/bgp_bbr.json                 | 22 ++++++++++
 .../yang-models/sonic-bgp-bbr.yang            | 41 +++++++++++++++++++
 6 files changed, 93 insertions(+)
 create mode 100644 src/sonic-yang-models/tests/yang_model_tests/tests/bgp_bbr.json
 create mode 100644 src/sonic-yang-models/tests/yang_model_tests/tests_config/bgp_bbr.json
 create mode 100644 src/sonic-yang-models/yang-models/sonic-bgp-bbr.yang

diff --git a/src/sonic-yang-models/doc/Configuration.md b/src/sonic-yang-models/doc/Configuration.md
index 4bf3a4a45..269a60f67 100644
--- a/src/sonic-yang-models/doc/Configuration.md
+++ b/src/sonic-yang-models/doc/Configuration.md
@@ -7,9 +7,12 @@ Table of Contents
    * [Introduction](#introduction)
    * [Configuration](#configuration)
    * [<strong>Config Load and Save</strong>](#config-load-and-save)
+
          * [Incremental Configuration](#incremental-configuration)
    * [<strong>Redis and Json Schema</strong>](#redis-and-json-schema)
+
          * [ACL and Mirroring](#acl-and-mirroring)
+         * [BGP BBR](#bgp-bbr)
          * [BGP Device Global](#bgp-device-global)
          * [BGP Sessions](#bgp-sessions)
          * [BUFFER_PG](#buffer_pg)
@@ -367,6 +370,18 @@ and migration plan
     }
 }
 ```
+### BGP BBR
+
+The **BGP_BBR** table contains device-level BBR state.
+```
+{
+        "BGP_BBR": {
+            "all": {
+                "status": "enabled"/"disabled"
+            }
+        }
+}
+```
 ### BGP Device Global
 
 The **BGP_DEVICE_GLOBAL** table contains device-level BGP global state.
diff --git a/src/sonic-yang-models/setup.py b/src/sonic-yang-models/setup.py
index 650101c50..95f98bd53 100644
--- a/src/sonic-yang-models/setup.py
+++ b/src/sonic-yang-models/setup.py
@@ -85,6 +85,7 @@ def run(self):
     data_files=[
         ('yang-models', ['./yang-models/sonic-acl.yang',
                          './yang-models/sonic-auto_techsupport.yang',
+                         './yang-models/sonic-bgp-bbr.yang',
                          './yang-models/sonic-bgp-common.yang',
                          './yang-models/sonic-bgp-device-global.yang',
                          './yang-models/sonic-bgp-global.yang',
diff --git a/src/sonic-yang-models/tests/files/sample_config_db.json b/src/sonic-yang-models/tests/files/sample_config_db.json
index 5eaeb7d5d..e0fa7631e 100644
--- a/src/sonic-yang-models/tests/files/sample_config_db.json
+++ b/src/sonic-yang-models/tests/files/sample_config_db.json
@@ -1597,6 +1597,11 @@
                 "local_ip": "12.12.0.2"
             }
         },
+        "BGP_BBR": {
+            "all": {
+                "status": "enabled"
+            }
+        },
         "BGP_GLOBALS": {
             "default": {
                 "router_id": "5.5.5.5",
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/bgp_bbr.json b/src/sonic-yang-models/tests/yang_model_tests/tests/bgp_bbr.json
new file mode 100644
index 000000000..50d1c40b1
--- /dev/null
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests/bgp_bbr.json
@@ -0,0 +1,9 @@
+{
+    "BGP_BBR_TABLE": {
+        "desc": "BGP BBR Table"
+    },
+    "BGP_BBR_INVALID_STATUS": {
+        "desc": "Configure status key with invalid value",
+        "eStrKey": "InvalidValue"
+    }
+}
\ No newline at end of file
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/bgp_bbr.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/bgp_bbr.json
new file mode 100644
index 000000000..f5379a409
--- /dev/null
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/bgp_bbr.json
@@ -0,0 +1,22 @@
+{
+    "BGP_BBR_TABLE": {
+        "sonic-bgp-bbr:sonic-bgp-bbr": {
+            "sonic-bgp-bbr:BGP_BBR": {
+                "all":
+                {
+                    "status": "enabled"
+                }
+            }
+        }
+    },
+    "BGP_BBR_INVALID_STATUS": {
+        "sonic-bgp-bbr:sonic-bgp-bbr": {
+            "sonic-bgp-bbr:BGP_BBR": {
+                "all":
+                {
+                    "status": "true"
+                }
+            }
+        }
+    }
+}
\ No newline at end of file
diff --git a/src/sonic-yang-models/yang-models/sonic-bgp-bbr.yang b/src/sonic-yang-models/yang-models/sonic-bgp-bbr.yang
new file mode 100644
index 000000000..58cc8823d
--- /dev/null
+++ b/src/sonic-yang-models/yang-models/sonic-bgp-bbr.yang
@@ -0,0 +1,41 @@
+module sonic-bgp-bbr {
+    namespace "http://github.com/sonic-net/sonic-bgp-bbr";
+    prefix bgpbbr;
+    yang-version 1.1;
+
+    import sonic-types {
+        prefix stypes;
+    }
+
+    organization
+        "SONiC";
+
+    contact
+        "SONiC";
+
+    description
+        "SONIC BGP BBR";
+
+    revision 2023-12-25 {
+        description
+            "Initial revision.";
+    }
+
+    container sonic-bgp-bbr {
+        container BGP_BBR {
+
+            description "BGP_BBR table part of config_db.json";
+
+            container all {
+                leaf status {
+                    type stypes:admin_mode;
+                    default enabled;
+                    description "bgp bbr status";
+                }
+            }
+            /* end of container all */
+        }
+        /* end of container BGP_BBR */
+    }
+    /* end of container sonic-bgp-bbr */
+}
\ No newline at end of file

From acb2e9447591c843b656968365cf2a1b2912b511 Mon Sep 17 00:00:00 2001
From: abdosi <58047199+abdosi@users.noreply.github.com>
Date: Fri, 5 Jan 2024 12:24:31 -0800
Subject: [PATCH 0113/1115] [chassis] Added support of isolating given LC in
 Chassis with TSA mode (#16732)

What I did:
Added support when TSA is done on Line Card make sure it's completely
isolated from all e-BGP peer devices from this LC or remote LC

Why I did:
Currently when TSA is executed on LC routes are withdrawn from it's connected e-BGP peers only. e-BGP peers on remote LC can/will (via i-BGP) still have route pointing/attracting traffic towards this isolated LC.

How I did:

When TSA is applied on LC all the routes that are advertised via i-BGP are set with community tag of no-export so that when remote LC received these routes it does not send over to it's connected e-BGP peers.

Also once we receive the route with no-export  over iBGP match on it and and set the local preference of that route to lower value (80) so that we remove that route from the forwarding database. Below scenario explains why we do this:

- LC1 advertise R1 to LC3
- LC2 advertise R1 to LC3
- On LC3 we have multi-path/ECMP over both LC1 and LC2
- On LC3 R1 received from LC1 is consider best route over R1 over received from LC2 and is send to LC3 e-BGP peers
- Now we do TSA on LC2
- LC3 will receive R1 from LC2 with community no-export and from LC1 same as earlier (no change)
- LC3 will still get traffic for R1 since it is still advertised to e-BGP peers (since R1 from LC1 is best route)
- LC3 will forward to both LC1 and LC2 (ecmp) and this causes issue as LC2 is in TSA mode and should not receive traffic

To fix above scenario we change the preference to lower value of R1 received from LC2 so that it is removed from Multi-path/ECMP group.

How I verfiy:

UT has been added to make sure Template generation is correct
Manual Verification of the functionality
sonic-mgmt test case will be updated accordingly.
Please note this PR is on top of this :#16714 which needs to be merged first.

Signed-off-by: Abhishek Dosi <abdosi@microsoft.com>
---
 dockers/docker-fpm-frr/TS                     | 22 +++++++++---
 dockers/docker-fpm-frr/TSA                    |  5 +--
 dockers/docker-fpm-frr/TSB                    |  5 +--
 .../bgpd/templates/internal/policies.conf.j2  |  9 +++++
 .../templates/voq_chassis/policies.conf.j2    |  9 +++++
 .../frr/bgpd/tsa/bgpd.tsa.isolate.conf.j2     |  7 ++++
 .../frr/bgpd/tsa/bgpd.tsa.unisolate.conf.j2   |  6 ++++
 .../bgpcfgd/managers_device_global.py         |  6 ++--
 .../result_chassis_packet_isolate.conf        | 35 +++++++++++++++++++
 .../result_chassis_packet_unisolate.conf      | 33 +++++++++++++++++
 .../policies.conf/result_chasiss_packet.conf  |  9 +++++
 .../policies.conf/result_base.conf            |  9 +++++
 src/sonic-bgpcfgd/tests/test_device_global.py | 30 +++++++++++++---
 13 files changed, 171 insertions(+), 14 deletions(-)
 create mode 100644 src/sonic-bgpcfgd/tests/data/internal/peer-group.conf/result_chassis_packet_isolate.conf
 create mode 100644 src/sonic-bgpcfgd/tests/data/internal/peer-group.conf/result_chassis_packet_unisolate.conf

diff --git a/dockers/docker-fpm-frr/TS b/dockers/docker-fpm-frr/TS
index 888b2c20b..fda750d9c 100755
--- a/dockers/docker-fpm-frr/TS
+++ b/dockers/docker-fpm-frr/TS
@@ -4,7 +4,12 @@ switch_type=`sonic-cfggen -d -v "DEVICE_METADATA['localhost']['switch_type']"`
 # Check whether the routemap is for internal BGP sessions.
 function is_internal_route_map()
 {
-    [[ "$1" =~ .*"_INTERNAL_".* || "$1" =~ .*"VOQ_".* ]]
+    if [[ "$1" =~ .*"_INTERNAL_".* || "$1" =~ .*"VOQ_".* ]]
+    then
+         return 1
+    else
+         return 0
+    fi
 }
 
 function check_not_installed()
@@ -13,7 +18,10 @@ function check_not_installed()
   config=$(vtysh -c "show run")
   for route_map_name in $(echo "$config" | sed -ne 's/  neighbor \S* route-map \(\S*\) out/\1/p' | egrep 'V4|V6' | uniq);
   do
-    is_internal_route_map $route_map_name && continue
+    is_internal_route_map $route_map_name
+    if [[ $? -eq 1 ]]; then
+        continue
+    fi
     echo "$config" | egrep -q "^route-map $route_map_name permit 20$"
     c=$((c+$?))
     echo "$config" | egrep -q "^route-map $route_map_name permit 30$"
@@ -31,7 +39,10 @@ function check_installed()
   config=$(vtysh -c "show run")
   for route_map_name in $(echo "$config" | sed -ne 's/  neighbor \S* route-map \(\S*\) out/\1/p' | egrep 'V4|V6' | uniq);
   do
-    is_internal_route_map $route_map_name && continue
+    is_internal_route_map $route_map_name
+    if [[ $? -eq 1 ]]; then
+        continue
+    fi
     echo "$config" | egrep -q "^route-map $route_map_name permit 20$"
     c=$((c+$?))
     e=$((e+1))
@@ -51,7 +62,10 @@ function find_num_routemap()
   config=$(vtysh -c "show run")
   for route_map_name in $(echo "$config" | sed -ne 's/  neighbor \S* route-map \(\S*\) out/\1/p' | egrep 'V4|V6' | uniq);
   do
-    is_internal_route_map $route_map_name && continue
+    is_internal_route_map $route_map_name
+    if [[ $? -eq 1 ]]; then
+        continue
+    fi
     c=$((c+1))
   done
   return $c
diff --git a/dockers/docker-fpm-frr/TSA b/dockers/docker-fpm-frr/TSA
index f45d3bf0b..c94a35ea0 100755
--- a/dockers/docker-fpm-frr/TSA
+++ b/dockers/docker-fpm-frr/TSA
@@ -16,7 +16,8 @@ then
   TSA_FILE=$(mktemp)
   for route_map_name in $(echo "$config" | sed -ne 's/  neighbor \S* route-map \(\S*\) out/\1/p' | uniq);
   do
-    is_internal_route_map $route_map_name && continue
+    is_internal_route_map $route_map_name
+    internal_route_map=$?
     case "$route_map_name" in
       *V4*)
         ip_version=V4
@@ -30,7 +31,7 @@ then
         continue
       ;;
     esac
-    sonic-cfggen -d -a "{\"route_map_name\":\"$route_map_name\", \"ip_version\": \"$ip_version\", \"ip_protocol\": \"$ip_protocol\"}" -y /etc/sonic/constants.yml -t /usr/share/sonic/templates/bgpd/tsa/bgpd.tsa.isolate.conf.j2 > "$TSA_FILE"
+    sonic-cfggen -d -a "{\"route_map_name\":\"$route_map_name\", \"ip_version\": \"$ip_version\", \"ip_protocol\": \"$ip_protocol\", \"internal_route_map\": \"$internal_route_map\"}" -y /etc/sonic/constants.yml -t /usr/share/sonic/templates/bgpd/tsa/bgpd.tsa.isolate.conf.j2 > "$TSA_FILE"
     vtysh -f "$TSA_FILE"
     rm -f "$TSA_FILE"
   done
diff --git a/dockers/docker-fpm-frr/TSB b/dockers/docker-fpm-frr/TSB
index 50f1ebc3c..add7eda94 100755
--- a/dockers/docker-fpm-frr/TSB
+++ b/dockers/docker-fpm-frr/TSB
@@ -16,7 +16,8 @@ then
   TSB_FILE=$(mktemp)
   for route_map_name in $(echo "$config" | sed -ne 's/  neighbor \S* route-map \(\S*\) out/\1/p' | uniq);
   do
-    is_internal_route_map $route_map_name && continue
+    is_internal_route_map $route_map_name
+    internal_route_map=$?
     case "$route_map_name" in
       *V4*)
       ;;
@@ -26,7 +27,7 @@ then
         continue
       ;;
     esac
-    sonic-cfggen -d -a "{\"route_map_name\":\"$route_map_name\"}" -t /usr/share/sonic/templates/bgpd/tsa/bgpd.tsa.unisolate.conf.j2 > "$TSB_FILE"
+    sonic-cfggen -d -a "{\"route_map_name\":\"$route_map_name\", \"internal_route_map\": \"$internal_route_map\"}" -t /usr/share/sonic/templates/bgpd/tsa/bgpd.tsa.unisolate.conf.j2 > "$TSB_FILE"
     vtysh -f "$TSB_FILE"
     rm -f "$TSB_FILE"
   done
diff --git a/dockers/docker-fpm-frr/frr/bgpd/templates/internal/policies.conf.j2 b/dockers/docker-fpm-frr/frr/bgpd/templates/internal/policies.conf.j2
index 5f9c8a83e..bedc6eeea 100644
--- a/dockers/docker-fpm-frr/frr/bgpd/templates/internal/policies.conf.j2
+++ b/dockers/docker-fpm-frr/frr/bgpd/templates/internal/policies.conf.j2
@@ -16,12 +16,17 @@ route-map FROM_BGP_INTERNAL_PEER_V6 permit 2
  set originator-id {{ get_ipv4_loopback_address(CONFIG_DB__LOOPBACK_INTERFACE, "Loopback4096") | ip }}
 {% elif CONFIG_DB__DEVICE_METADATA['localhost']['switch_type'] == 'chassis-packet' %}
 bgp community-list standard DEVICE_INTERNAL_COMMUNITY permit {{ constants.bgp.internal_community }}
+bgp community-list standard NO_EXPORT permit no-export
 !
 route-map FROM_BGP_INTERNAL_PEER_V4 permit 1
   match community DEVICE_INTERNAL_COMMUNITY
   set comm-list DEVICE_INTERNAL_COMMUNITY delete
   set tag {{ constants.bgp.internal_community_match_tag }}
 !
+route-map FROM_BGP_INTERNAL_PEER_V4 permit 2
+  match community NO_EXPORT
+  set local-preference 80
+!
 route-map FROM_BGP_INTERNAL_PEER_V6 permit 1
  set ipv6 next-hop prefer-global
  on-match next
@@ -31,6 +36,10 @@ route-map FROM_BGP_INTERNAL_PEER_V6 permit 2
   set comm-list DEVICE_INTERNAL_COMMUNITY delete
   set tag {{ constants.bgp.internal_community_match_tag }}
 !
+route-map FROM_BGP_INTERNAL_PEER_V6 permit 3
+  match community NO_EXPORT
+  set local-preference 80
+!
 route-map TO_BGP_INTERNAL_PEER_V4 permit 1
   match ip address prefix-list PL_LoopbackV4
   set community {{ constants.bgp.internal_community }}
diff --git a/dockers/docker-fpm-frr/frr/bgpd/templates/voq_chassis/policies.conf.j2 b/dockers/docker-fpm-frr/frr/bgpd/templates/voq_chassis/policies.conf.j2
index 9ffe00d14..7002a0ac1 100644
--- a/dockers/docker-fpm-frr/frr/bgpd/templates/voq_chassis/policies.conf.j2
+++ b/dockers/docker-fpm-frr/frr/bgpd/templates/voq_chassis/policies.conf.j2
@@ -2,12 +2,17 @@
 ! template: bgpd/templates/voq_chassis/policies.conf.j2
 !
 bgp community-list standard DEVICE_INTERNAL_COMMUNITY permit {{ constants.bgp.internal_community }}
+bgp community-list standard NO_EXPORT permit no-export
 !
 route-map FROM_VOQ_CHASSIS_V4_PEER permit 1
   match community DEVICE_INTERNAL_COMMUNITY
   set comm-list DEVICE_INTERNAL_COMMUNITY delete
   set tag {{ constants.bgp.internal_community_match_tag }}
 !
+route-map FROM_VOQ_CHASSIS_V4_PEER permit 2
+  match community NO_EXPORT
+  set local-preference 80
+!
 route-map FROM_VOQ_CHASSIS_V4_PEER permit 100
 !
 route-map TO_VOQ_CHASSIS_V4_PEER permit 1
@@ -26,6 +31,10 @@ route-map FROM_VOQ_CHASSIS_V6_PEER permit 2
   set comm-list DEVICE_INTERNAL_COMMUNITY delete
   set tag {{ constants.bgp.internal_community_match_tag }}
 !
+route-map FROM_VOQ_CHASSIS_V6_PEER permit 3
+  match community NO_EXPORT
+  set local-preference 80
+!
 route-map FROM_VOQ_CHASSIS_V6_PEER permit 100
 !
 route-map TO_VOQ_CHASSIS_V6_PEER permit 1
diff --git a/dockers/docker-fpm-frr/frr/bgpd/tsa/bgpd.tsa.isolate.conf.j2 b/dockers/docker-fpm-frr/frr/bgpd/tsa/bgpd.tsa.isolate.conf.j2
index 2321643f8..1d39af2a8 100644
--- a/dockers/docker-fpm-frr/frr/bgpd/tsa/bgpd.tsa.isolate.conf.j2
+++ b/dockers/docker-fpm-frr/frr/bgpd/tsa/bgpd.tsa.isolate.conf.j2
@@ -1,3 +1,8 @@
+{%- if internal_route_map == '1' -%}
+route-map {{ route_map_name }} permit 20
+  set community no-export additive
+{# #}
+{%- else -%}
 route-map {{ route_map_name }} permit 20
   match {{ ip_protocol }} address prefix-list PL_Loopback{{ ip_version }}
   set community {{ constants.bgp.traffic_shift_community }}
@@ -5,4 +10,6 @@ route-map {{ route_map_name }} permit 30
   match tag {{ constants.bgp.internal_community_match_tag }}
   set community {{ constants.bgp.traffic_shift_community }}
 route-map {{ route_map_name }} deny 40
+{# #}
+{%- endif -%}
 !
diff --git a/dockers/docker-fpm-frr/frr/bgpd/tsa/bgpd.tsa.unisolate.conf.j2 b/dockers/docker-fpm-frr/frr/bgpd/tsa/bgpd.tsa.unisolate.conf.j2
index 7ba4c1bd6..45caddc21 100644
--- a/dockers/docker-fpm-frr/frr/bgpd/tsa/bgpd.tsa.unisolate.conf.j2
+++ b/dockers/docker-fpm-frr/frr/bgpd/tsa/bgpd.tsa.unisolate.conf.j2
@@ -1,4 +1,10 @@
+{%- if internal_route_map == '1' -%}
+no route-map {{ route_map_name }} permit 20
+{# #}
+{%- else -%}
 no route-map {{ route_map_name }} permit 20
 no route-map {{ route_map_name }} permit 30
 no route-map {{ route_map_name }} deny 40
+{# #}
+{%- endif -%}
 !
diff --git a/src/sonic-bgpcfgd/bgpcfgd/managers_device_global.py b/src/sonic-bgpcfgd/bgpcfgd/managers_device_global.py
index 4f7c28cbd..db2bcd989 100644
--- a/src/sonic-bgpcfgd/bgpcfgd/managers_device_global.py
+++ b/src/sonic-bgpcfgd/bgpcfgd/managers_device_global.py
@@ -91,14 +91,16 @@ def __generate_routemaps_from_template(self, route_map_names, template):
             # For packet-based chassis, the bgp session between the linecards are also considered internal sessions
             # While isolating a single linecard, these sessions should not be skipped
             if "_INTERNAL_" in rm or "VOQ_" in rm:
-                continue
+                is_internal="1"
+            else:
+                is_internal="0"
             if "V4" in rm:
                 ipv="V4" ; ipp="ip"
             elif "V6" in rm:
                 ipv="V6" ; ipp="ipv6"
             else:
                 continue
-            cmd += template.render(route_map_name=rm,ip_version=ipv,ip_protocol=ipp, constants=self.constants)
+            cmd += template.render(route_map_name=rm,ip_version=ipv,ip_protocol=ipp,internal_route_map=is_internal, constants=self.constants)
             cmd += "\n"
         return cmd
 
diff --git a/src/sonic-bgpcfgd/tests/data/internal/peer-group.conf/result_chassis_packet_isolate.conf b/src/sonic-bgpcfgd/tests/data/internal/peer-group.conf/result_chassis_packet_isolate.conf
new file mode 100644
index 000000000..cfb47916e
--- /dev/null
+++ b/src/sonic-bgpcfgd/tests/data/internal/peer-group.conf/result_chassis_packet_isolate.conf
@@ -0,0 +1,35 @@
+!
+! template: bgpd/templates/internal/peer-group.conf.j2
+!
+  neighbor INTERNAL_PEER_V4 peer-group
+  neighbor INTERNAL_PEER_V6 peer-group
+  neighbor INTERNAL_PEER_V4 update-source Loopback4096 
+  address-family ipv4
+    neighbor INTERNAL_PEER_V4 soft-reconfiguration inbound
+    neighbor INTERNAL_PEER_V4 allowas-in 1
+    neighbor INTERNAL_PEER_V4 route-map FROM_BGP_INTERNAL_PEER_V4 in
+    neighbor INTERNAL_PEER_V4 route-map TO_BGP_INTERNAL_PEER_V4 out
+    neighbor INTERNAL_PEER_V4 send-community
+    neighbor INTERNAL_PEER_V4 ttl-security hops 1
+  exit-address-family
+  neighbor INTERNAL_PEER_V6 update-source Loopback4096 
+  address-family ipv6
+    neighbor INTERNAL_PEER_V6 soft-reconfiguration inbound
+    neighbor INTERNAL_PEER_V6 allowas-in 1
+    neighbor INTERNAL_PEER_V6 route-map FROM_BGP_INTERNAL_PEER_V6 in
+    neighbor INTERNAL_PEER_V6 route-map TO_BGP_INTERNAL_PEER_V6 out
+    neighbor INTERNAL_PEER_V6 send-community
+    neighbor INTERNAL_PEER_V6 ttl-security hops 1
+  exit-address-family
+!
+! end of template: bgpd/templates/internal/peer-group.conf.j2
+!
+
+
+route-map TO_BGP_INTERNAL_PEER_V4 permit 20
+  set community no-export additive
+!
+route-map TO_BGP_INTERNAL_PEER_V6 permit 20
+  set community no-export additive
+!
+
diff --git a/src/sonic-bgpcfgd/tests/data/internal/peer-group.conf/result_chassis_packet_unisolate.conf b/src/sonic-bgpcfgd/tests/data/internal/peer-group.conf/result_chassis_packet_unisolate.conf
new file mode 100644
index 000000000..2711f46d5
--- /dev/null
+++ b/src/sonic-bgpcfgd/tests/data/internal/peer-group.conf/result_chassis_packet_unisolate.conf
@@ -0,0 +1,33 @@
+!
+! template: bgpd/templates/internal/peer-group.conf.j2
+!
+  neighbor INTERNAL_PEER_V4 peer-group
+  neighbor INTERNAL_PEER_V6 peer-group
+  neighbor INTERNAL_PEER_V4 update-source Loopback4096 
+  address-family ipv4
+    neighbor INTERNAL_PEER_V4 soft-reconfiguration inbound
+    neighbor INTERNAL_PEER_V4 allowas-in 1
+    neighbor INTERNAL_PEER_V4 route-map FROM_BGP_INTERNAL_PEER_V4 in
+    neighbor INTERNAL_PEER_V4 route-map TO_BGP_INTERNAL_PEER_V4 out
+    neighbor INTERNAL_PEER_V4 send-community
+    neighbor INTERNAL_PEER_V4 ttl-security hops 1
+  exit-address-family
+  neighbor INTERNAL_PEER_V6 update-source Loopback4096 
+  address-family ipv6
+    neighbor INTERNAL_PEER_V6 soft-reconfiguration inbound
+    neighbor INTERNAL_PEER_V6 allowas-in 1
+    neighbor INTERNAL_PEER_V6 route-map FROM_BGP_INTERNAL_PEER_V6 in
+    neighbor INTERNAL_PEER_V6 route-map TO_BGP_INTERNAL_PEER_V6 out
+    neighbor INTERNAL_PEER_V6 send-community
+    neighbor INTERNAL_PEER_V6 ttl-security hops 1
+  exit-address-family
+!
+! end of template: bgpd/templates/internal/peer-group.conf.j2
+!
+
+
+no route-map TO_BGP_INTERNAL_PEER_V4 permit 20
+!
+no route-map TO_BGP_INTERNAL_PEER_V6 permit 20
+!
+
diff --git a/src/sonic-bgpcfgd/tests/data/internal/policies.conf/result_chasiss_packet.conf b/src/sonic-bgpcfgd/tests/data/internal/policies.conf/result_chasiss_packet.conf
index e3a4e2e07..4b346d635 100644
--- a/src/sonic-bgpcfgd/tests/data/internal/policies.conf/result_chasiss_packet.conf
+++ b/src/sonic-bgpcfgd/tests/data/internal/policies.conf/result_chasiss_packet.conf
@@ -2,12 +2,17 @@
 ! template: bgpd/templates/internal/policies.conf.j2
 !
 bgp community-list standard DEVICE_INTERNAL_COMMUNITY permit 12345:556
+bgp community-list standard NO_EXPORT permit no-export
 !
 route-map FROM_BGP_INTERNAL_PEER_V4 permit 1
   match community DEVICE_INTERNAL_COMMUNITY
   set comm-list DEVICE_INTERNAL_COMMUNITY delete
   set tag 101
 !
+route-map FROM_BGP_INTERNAL_PEER_V4 permit 2
+  match community NO_EXPORT
+  set local-preference 80
+!
 route-map FROM_BGP_INTERNAL_PEER_V6 permit 1
  set ipv6 next-hop prefer-global
  on-match next
@@ -17,6 +22,10 @@ route-map FROM_BGP_INTERNAL_PEER_V6 permit 2
   set comm-list DEVICE_INTERNAL_COMMUNITY delete
   set tag 101
 !
+route-map FROM_BGP_INTERNAL_PEER_V6 permit 3
+  match community NO_EXPORT
+  set local-preference 80
+!
 route-map TO_BGP_INTERNAL_PEER_V4 permit 1
   match ip address prefix-list PL_LoopbackV4
   set community 12345:556
diff --git a/src/sonic-bgpcfgd/tests/data/voq_chassis/policies.conf/result_base.conf b/src/sonic-bgpcfgd/tests/data/voq_chassis/policies.conf/result_base.conf
index 4dc2f9cec..f0e3771d1 100644
--- a/src/sonic-bgpcfgd/tests/data/voq_chassis/policies.conf/result_base.conf
+++ b/src/sonic-bgpcfgd/tests/data/voq_chassis/policies.conf/result_base.conf
@@ -2,12 +2,17 @@
 ! template: bgpd/templates/voq_chassis/policies.conf.j2
 !
 bgp community-list standard DEVICE_INTERNAL_COMMUNITY permit 12345:556
+bgp community-list standard NO_EXPORT permit no-export
 !
 route-map FROM_VOQ_CHASSIS_V4_PEER permit 1
   match community DEVICE_INTERNAL_COMMUNITY
   set comm-list DEVICE_INTERNAL_COMMUNITY delete
   set tag 101
 !
+route-map FROM_VOQ_CHASSIS_V4_PEER permit 2
+  match community NO_EXPORT
+  set local-preference 80
+!
 route-map FROM_VOQ_CHASSIS_V4_PEER permit 100
 !
 route-map TO_VOQ_CHASSIS_V4_PEER permit 1
@@ -25,6 +30,10 @@ route-map FROM_VOQ_CHASSIS_V6_PEER permit 2
   set comm-list DEVICE_INTERNAL_COMMUNITY delete
   set tag 101
 !
+route-map FROM_VOQ_CHASSIS_V6_PEER permit 3
+  match community NO_EXPORT
+  set local-preference 80
+!
 route-map FROM_VOQ_CHASSIS_V6_PEER permit 100
 !
 route-map TO_VOQ_CHASSIS_V6_PEER permit 1
diff --git a/src/sonic-bgpcfgd/tests/test_device_global.py b/src/sonic-bgpcfgd/tests/test_device_global.py
index 049bcbeec..396a72a23 100644
--- a/src/sonic-bgpcfgd/tests/test_device_global.py
+++ b/src/sonic-bgpcfgd/tests/test_device_global.py
@@ -11,6 +11,7 @@
 
 TEMPLATE_PATH = os.path.abspath('../../dockers/docker-fpm-frr/frr')
 BASE_PATH = os.path.abspath('../sonic-bgpcfgd/tests/data/general/peer-group.conf/')
+INTERNAL_BASE_PATH = os.path.abspath('../sonic-bgpcfgd/tests/data/internal/peer-group.conf/')
 global_constants = {
     "bgp":  {
         "traffic_shift_community" :"12345:12345",
@@ -18,7 +19,7 @@
     }
 }
 
-def constructor():
+def constructor(check_internal=False):
     cfg_mgr = MagicMock()
     def get_text():
         text = []
@@ -29,7 +30,10 @@ def get_text():
         text += ["     "]
         return text
     def update():
-        cfg_mgr.changes = get_string_from_file("/result_all.conf")
+        if check_internal:
+            cfg_mgr.changes = get_string_from_file("/result_chasiss_packet.conf", INTERNAL_BASE_PATH)
+        else:
+            cfg_mgr.changes = get_string_from_file("/result_all.conf")
     def push(cfg):
         cfg_mgr.changes += cfg + "\n"
     def get_config():
@@ -59,6 +63,15 @@ def test_isolate_device(mocked_log_info):
     mocked_log_info.assert_called_with("DeviceGlobalCfgMgr::Done")
     assert m.cfg_mgr.get_config() == get_string_from_file("/result_all_isolate.conf")
 
+@patch('bgpcfgd.managers_device_global.log_debug')
+def test_isolate_device_internal_session(mocked_log_info):
+    m = constructor(check_internal=True)
+    res = m.set_handler("STATE", {"tsa_enabled": "true"})
+    assert res, "Expect True return value for set_handler"
+    mocked_log_info.assert_called_with("DeviceGlobalCfgMgr::Done")
+    assert m.cfg_mgr.get_config() == get_string_from_file("/result_chassis_packet_isolate.conf", INTERNAL_BASE_PATH)
+
+
 @patch('bgpcfgd.managers_device_global.log_debug')
 def test_unisolate_device(mocked_log_info):
     m = constructor()
@@ -67,6 +80,15 @@ def test_unisolate_device(mocked_log_info):
     mocked_log_info.assert_called_with("DeviceGlobalCfgMgr::Done")
     assert m.cfg_mgr.get_config() == get_string_from_file("/result_all_unisolate.conf")
 
+@patch('bgpcfgd.managers_device_global.log_debug')
+def test_unisolate_device_internal_session(mocked_log_info):
+    m = constructor(check_internal=True)
+    res = m.set_handler("STATE", {"tsa_enabled": "false"})
+    assert res, "Expect True return value for set_handler"
+    mocked_log_info.assert_called_with("DeviceGlobalCfgMgr::Done")
+    assert m.cfg_mgr.get_config() == get_string_from_file("/result_chassis_packet_unisolate.conf", INTERNAL_BASE_PATH)
+
+
 def test_check_state_and_get_tsa_routemaps():
     m = constructor()
     m.set_handler("STATE", {"tsa_enabled": "true"})
@@ -93,8 +115,8 @@ def test_get_tsb_routemaps():
     expected_res = get_string_from_file("/result_unisolate.conf")
     assert res == expected_res
 
-def get_string_from_file(filename):
-    fp = open(BASE_PATH + filename, "r")
+def get_string_from_file(filename, base_path=BASE_PATH):
+    fp = open(base_path + filename, "r")
     cfg = fp.read()
     fp.close()
 

From cdd164bd129e18f560e369170e27ab69157b939b Mon Sep 17 00:00:00 2001
From: Xincun Li <147451452+xincunli-sonic@users.noreply.github.com>
Date: Fri, 5 Jan 2024 13:33:04 -0800
Subject: [PATCH 0114/1115] Refactor get_num_dpus function. (#17601)

Refactor current get_num_dpus function to consuming platform.json which is reliable way to retrieve the number of DPUs.
---
 .../sonic_py_common/device_info.py            | 48 ++++++++++++-------
 1 file changed, 31 insertions(+), 17 deletions(-)

diff --git a/src/sonic-py-common/sonic_py_common/device_info.py b/src/sonic-py-common/sonic_py_common/device_info.py
index 43af72c01..733625d4a 100644
--- a/src/sonic-py-common/sonic_py_common/device_info.py
+++ b/src/sonic-py-common/sonic_py_common/device_info.py
@@ -847,23 +847,37 @@ def is_frontend_port_present_in_host():
 
 
 def get_num_dpus():
-    # Todo: we should use platform api to get the dpu number
-    # instead of rely on the platform env config.
-    num_dpus = 0
-    platform_env_conf_file_path = get_platform_env_conf_file_path()
+    """
+    Retrieves the number of DPUs from platform.json file.
 
-    # platform_env.conf file not present for platform
-    if platform_env_conf_file_path is None:
-        return num_dpus
+    Args:
 
-    # Else open the file check for keyword - num_dpu -
-    with open(platform_env_conf_file_path) as platform_env_conf_file:
-        for line in platform_env_conf_file:
-            tokens = line.split('=')
-            if len(tokens) < 2:
-               continue
-            if tokens[0].lower() == 'num_dpu':
-                num_dpus = tokens[1].strip()
-                break
-    return int(num_dpus)
+    Returns:
+        A integer to indicate the number of DPUs.
+    """
+
+    platform = get_platform()
+    if not platform:
+        return 0
+
+    # Get Platform path.
+    platform_path = get_path_to_platform_dir()
+
+    if os.path.isfile(os.path.join(platform_path, PLATFORM_JSON_FILE)):
+        json_file = os.path.join(platform_path, PLATFORM_JSON_FILE)
+        
+        try:
+            with open(json_file, 'r') as file:
+                platform_data = json.load(file)
+        except (json.JSONDecodeError, IOError, TypeError, ValueError):
+            # Handle any file reading and JSON parsing errors
+            return 0
+        
+        # Convert to lower case avoid case sensitive.
+        data = {k.lower(): v for k, v in platform_data.items()}
+        DPUs = data.get('dpus', None)
+        if DPUs is not None and len(DPUs) > 0:
+            return len(DPUs)
+
+    return 0
 

From 5d511d4485a40f125e1fdbd9ba6bcfec520c787e Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sun, 7 Jan 2024 15:37:48 +0800
Subject: [PATCH 0115/1115] [submodule] Update submodule dhcpmon to the latest
 HEAD automatically (#17695)

---
 src/dhcpmon | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/dhcpmon b/src/dhcpmon
index 7c55e502a..bace2e036 160000
--- a/src/dhcpmon
+++ b/src/dhcpmon
@@ -1 +1 @@
-Subproject commit 7c55e502a1b054aa01c056dc1018e4b863975445
+Subproject commit bace2e0360b7004ac5e0f4f5dc0efa2615d08614

From 98f24b639e853096d7618f070ca06d57ae1eb0f2 Mon Sep 17 00:00:00 2001
From: snider-nokia <76123698+snider-nokia@users.noreply.github.com>
Date: Mon, 8 Jan 2024 14:38:46 -0500
Subject: [PATCH 0116/1115] [Nokia][sonic-platform] Update Nokia sonic-platform
 submodule and device data (#17378)

These changes, in conjunction with NDK version >= 22.9.17 address the thermal logging issues discussed at Nokia-ION/ndk#27. While the changes contained at this PR do not require coupling to NDK version >= 22.9.17, thermal logging enhancements will not be available without updated NDK >= 22.9.17. Thus, coupling with NDK >=22.9.17 is preferred and recommended.

Why I did it
To address thermal logging deficiencies.

Work item tracking
Microsoft ADO (number only): 26365734
How I did it
The following changes are included:

Threshold configuration values are provided in the associated device data .json files. There is also a change included to better handle the condition where an SFP module read fails.

Modify the module.py reboot to support reboot linecard from Supervisor

 - Modify reboot to call _reboot_imm for single IMM card reboot
 - Add log to the ndk_cmd to log the operation of "reboot-linecard" and "shutdown/satrtup the sfm"
Add new nokia_cmd set command and modify show ndk-status output

 - Add a new function reboot_imm() to nokia_common.py to support reboot a single IMM slot from CPM
 - Added new command: nokia_cmd set reboot-linecard <slot> [forece] for CPM
 - Append a new column "RebootStatus" at the end of output of "nokia_cmd show ndk-status"
 - Provide ability for IMM to disable all transceiver module TX at reboot time
 - Remove defunct xcvr-resync service
---
 .../platform_ndk.json                         | 22 ++++++++++++++++++-
 .../platform_ndk.json                         | 20 +++++++++++++++++
 .../broadcom/sonic-platform-modules-nokia     |  2 +-
 3 files changed, 42 insertions(+), 2 deletions(-)

diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/platform_ndk.json b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/platform_ndk.json
index 4fbd84df3..f444a14a8 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/platform_ndk.json
+++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/platform_ndk.json
@@ -14,7 +14,7 @@
     },
     {
         "key": "monitor_action",
-        "stringval": "warn"
+        "stringval": "reboot"
     },
     {
         "key": "grpc_thermal_monitor",
@@ -43,6 +43,26 @@
     {
       "key": "sonic_log_level",
       "stringval": "debug"
+    },
+    {
+      "key": "thermal_low_margin_threshold",
+      "intval": 10
+    },
+    {
+      "key": "thermal_log_current_threshold",
+      "intval": 2
+    },
+    {
+      "key": "thermal_log_margin_threshold",
+      "intval": 2
+    },
+    {
+      "key": "thermal_log_min_threshold",
+      "intval": 2
+    },
+    {
+      "key": "thermal_log_max_threshold",
+      "intval": 1
     }
     ]
 }
diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/platform_ndk.json b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/platform_ndk.json
index dddefb0bc..9d68aacc5 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/platform_ndk.json
+++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/platform_ndk.json
@@ -31,6 +31,26 @@
     {
       "key": "sonic_log_level",
       "stringval": "debug"
+    },
+    {
+      "key": "thermal_low_margin_threshold",
+      "intval": 10
+    },
+    {
+      "key": "thermal_log_current_threshold",
+      "intval": 3
+    },
+    {
+      "key": "thermal_log_margin_threshold",
+      "intval": 3
+    },
+    {
+      "key": "thermal_log_min_threshold",
+      "intval": 5
+    },
+    {
+      "key": "thermal_log_max_threshold",
+      "intval": 1
     }
     ]
 }
diff --git a/platform/broadcom/sonic-platform-modules-nokia b/platform/broadcom/sonic-platform-modules-nokia
index 6b07af449..e82caa40d 160000
--- a/platform/broadcom/sonic-platform-modules-nokia
+++ b/platform/broadcom/sonic-platform-modules-nokia
@@ -1 +1 @@
-Subproject commit 6b07af449c4b40e2a80e3154347ca0308817ebd5
+Subproject commit e82caa40d4eec59e574bd4acffb0e92fd7187da4

From a5d443d60a6aa7521da0ffe77e236f9698834b67 Mon Sep 17 00:00:00 2001
From: "Marty Y. Lok" <76118573+mlok-nokia@users.noreply.github.com>
Date: Mon, 8 Jan 2024 14:39:30 -0500
Subject: [PATCH 0117/1115] [Nokia-IXR7250E] Modify the platform_reboot on the
 IXR7250E for PMON API reboot and Disable all SFPs (#17483)

Why I did it
When Supervisor card is rebooted by using PMON API, it takes about 90 seconds to trigger the shutdown in down path. At this time linecards have been up. This delays linecards database initialization which is trying to PING/PONG the database-chassis. To address this issue, we modified the NDK to use the system call with "sudo reboot" when the request is from PMON API on Supervisor case. The NDK version is 22.9.20 and greater. This new NDK requires this modifcaiton of platform_reboot to work with.

Work item tracking
Microsoft ADO (number only): 26365734
How I did it
Modify the platform_reboot In Supervisor not to reboot all IMMs since it has been done in the function reboot() in module.py. Also handle the reboot-cause.txt for on the Supervisor when the reboot is request from PMON API.
Modify the Nokia platform specific platform_reboot in linecard to disable all SPFs.
This PR works with NDK version 22.9.20 and above

Signed-off-by: mlok <marty.lok@nokia.com>
---
 .../platform_reboot                           |  4 +++
 .../platform_reboot                           | 34 ++++++++++++++++---
 2 files changed, 33 insertions(+), 5 deletions(-)

diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/platform_reboot b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/platform_reboot
index 43aace70f..eb0bebef0 100755
--- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/platform_reboot
+++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/platform_reboot
@@ -17,6 +17,10 @@ update_reboot_cause()
     sync
 }
 
+echo "Disable all SFPs"
+python3 -c 'import sonic_platform.platform; platform_chassis = sonic_platform.platform.Platform().get_chassis(); platform_chassis.tx_disable_all_sfps()'
+sleep 3
+
 # update the reboot_cuase file when reboot is trigger by device-mgr
 update_reboot_cause
 
diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/platform_reboot b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/platform_reboot
index 00ae76c9d..dc4f93433 100755
--- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/platform_reboot
+++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/platform_reboot
@@ -1,15 +1,39 @@
 #!/bin/bash
-echo "Rebooting all Linecards"
-python3 -c 'import sonic_platform.platform; platform_chassis = sonic_platform.platform.Platform().get_chassis(); platform_chassis.reboot_imms()'
-sleep 3
+
+DEVICE_MGR_REBOOT_FILE="/tmp/device_mgr_reboot"
+
+update_reboot_cause()
+{
+    DEVICE_MGR_REBOOT_FILE=/tmp/device_mgr_reboot
+    REBOOT_CAUSE_FILE=/host/reboot-cause/reboot-cause.txt
+    DEVICE_REBOOT_CAUSE_FILE=/etc/opt/srlinux/reboot-cause.txt
+    if [ -e  $DEVICE_MGR_REBOOT_FILE ]; then
+        if [ -e $DEVICE_REBOOT_CAUSE_FILE ]; then
+            cp -f $DEVICE_REBOOT_CAUSE_FILE $REBOOT_CAUSE_FILE
+        fi
+        rm -f $DEVICE_MGR_REBOOT_FILE
+    else
+        touch /etc/opt/srlinux/devmgr_reboot_cause.done
+        rm -f $DEVICE_REBOOT_CAUSE_FILE &> /dev/null
+    fi
+    sync
+}
+
+if [ ! -e $DEVICE_MGR_REBOOT_FILE ]; then
+    echo "Rebooting all Linecards"
+    python3 -c 'import sonic_platform.platform; platform_chassis = sonic_platform.platform.Platform().get_chassis(); platform_chassis.reboot_imms()'
+    sleep 3
+fi
+
+# update the reboot_cuase file when reboot is trigger by device-mgr
+update_reboot_cause
+
 systemctl stop nokia-watchdog.service
 sleep 2
 echo "w" > /dev/watchdog
 kick_date=`date -u`
 echo "last watchdog kick $kick_date" > /var/log/nokia-watchdog-last.log
 rm -f /sys/firmware/efi/efivars/dump-*
-touch /etc/opt/srlinux/devmgr_reboot_cause.done
-rm -f /etc/opt/srlinux/reboot-cause.txt
 echo "Shutdown midplane"
 ifconfig xe0 down
 sync

From 2c9b16484a596055274b035f6a474aee688631b3 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Tue, 9 Jan 2024 15:44:28 +0800
Subject: [PATCH 0118/1115] [submodule] Update submodule sonic-swss to the
 latest HEAD automatically (#17712)

---
 src/sonic-swss | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-swss b/src/sonic-swss
index 8fa982d77..a0c20c38a 160000
--- a/src/sonic-swss
+++ b/src/sonic-swss
@@ -1 +1 @@
-Subproject commit 8fa982d77053e3e108253d24ba49ea56c864de87
+Subproject commit a0c20c38abdae525aa59cd4abf89a06df911261e

From 47dfb7cc863dc6baf7f2c23c78c8dbef0ec71156 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Tue, 9 Jan 2024 15:52:47 +0800
Subject: [PATCH 0119/1115] [submodule] Update submodule sonic-mgmt-common to
 the latest HEAD automatically (#17612)

---
 src/sonic-mgmt-common | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-mgmt-common b/src/sonic-mgmt-common
index 3dbabda4d..40021f6f9 160000
--- a/src/sonic-mgmt-common
+++ b/src/sonic-mgmt-common
@@ -1 +1 @@
-Subproject commit 3dbabda4d599f8dd2c470d8ec6da47fe2ec0853f
+Subproject commit 40021f6f949bb15f79342da30ca779b68e73747b

From b406502a42d55441073dd8fb782199379529dcdc Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Tue, 9 Jan 2024 18:35:46 +0800
Subject: [PATCH 0120/1115] [submodule] Update submodule sonic-snmpagent to the
 latest HEAD automatically (#17711)

#### Why I did it
src/sonic-snmpagent
```
* 29481f9 - (HEAD -> master, origin/master, origin/HEAD) Fix SNMP dropping some of the queue counter when create_only_config_db_buffers is set to true (#303) (69 minutes ago) [DavidZagury]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-snmpagent | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-snmpagent b/src/sonic-snmpagent
index 3b6a4ad33..29481f9c4 160000
--- a/src/sonic-snmpagent
+++ b/src/sonic-snmpagent
@@ -1 +1 @@
-Subproject commit 3b6a4ad338adc0044331b70fc1e6cd589f152829
+Subproject commit 29481f9c42c53123a88baa8a6e64cf8a4e37041f

From 1c3bf41b8901a26542074623fca502797efb1b5e Mon Sep 17 00:00:00 2001
From: Liu Shilong <shilongliu@microsoft.com>
Date: Tue, 9 Jan 2024 20:28:18 +0800
Subject: [PATCH 0121/1115] [workflow] Use automerge_scan instead of automerge
 for correct commit message. (#17669)

Why I did it
automerge and automerge_scan have different behavior when merging PRs.
automerge may left some PRs unmerged. So, use automerge_scan instead.

Work item tracking
Microsoft ADO (number only): 26361240
How I did it
How to verify it
---
 .github/workflows/automerge.yml | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/.github/workflows/automerge.yml b/.github/workflows/automerge.yml
index 3edb8ad53..b330d0cc5 100644
--- a/.github/workflows/automerge.yml
+++ b/.github/workflows/automerge.yml
@@ -9,7 +9,8 @@ on:
 
 jobs:
   automerge:
-    if: github.event.check_suite.app.name == 'Azure Pipelines' &&  github.event.check_suite.conclusion == 'success'
+    # Disable workflow. Use automerge_scan instead to have the same behaviour.
+    if: github.event.check_suite.app.name == 'Azure Pipelines' &&  github.event.check_suite.conclusion == 'success' && false
     runs-on: ubuntu-latest
     steps:
     - name: automerge

From e30782b0fe78274544555ec75341636ff063d966 Mon Sep 17 00:00:00 2001
From: Liu Shilong <shilongliu@microsoft.com>
Date: Tue, 9 Jan 2024 20:28:31 +0800
Subject: [PATCH 0122/1115] [ci] Enable cache for marvell-arm64 build in PR
 checks. (#15449)

Why I did it
Enable build cache for marvell-arm64 build to decrease PR check duration.

Work item tracking
Microsoft ADO (number only): 26340500
How I did it
How to verify it
---
 .azure-pipelines/azure-pipelines-image-template.yml |  2 +-
 platform/marvell-arm64/docker-saiserver-mrvl.dep    |  8 ++++++++
 platform/marvell-arm64/docker-syncd-mrvl-rpc.dep    |  8 ++++++++
 platform/marvell-arm64/docker-syncd-mrvl.dep        | 10 ++++++++++
 platform/marvell-arm64/libsaithrift-dev.dep         | 11 +++++++++++
 platform/marvell-arm64/mrvl-prestera.dep            |  9 +++++++++
 platform/marvell-arm64/one-image.dep                |  1 +
 platform/marvell-arm64/platform-marvell.dep         |  9 +++++++++
 platform/marvell-arm64/platform-nokia.dep           |  8 ++++++++
 platform/marvell-arm64/rules.dep                    |  9 +++++++++
 platform/marvell-arm64/sai.dep                      |  8 ++++++++
 11 files changed, 82 insertions(+), 1 deletion(-)
 create mode 100644 platform/marvell-arm64/docker-saiserver-mrvl.dep
 create mode 100644 platform/marvell-arm64/docker-syncd-mrvl-rpc.dep
 create mode 100644 platform/marvell-arm64/docker-syncd-mrvl.dep
 create mode 100644 platform/marvell-arm64/libsaithrift-dev.dep
 create mode 100644 platform/marvell-arm64/mrvl-prestera.dep
 create mode 100644 platform/marvell-arm64/one-image.dep
 create mode 100644 platform/marvell-arm64/platform-marvell.dep
 create mode 100644 platform/marvell-arm64/platform-nokia.dep
 create mode 100644 platform/marvell-arm64/rules.dep
 create mode 100644 platform/marvell-arm64/sai.dep

diff --git a/.azure-pipelines/azure-pipelines-image-template.yml b/.azure-pipelines/azure-pipelines-image-template.yml
index 0b480638c..c412edb42 100644
--- a/.azure-pipelines/azure-pipelines-image-template.yml
+++ b/.azure-pipelines/azure-pipelines-image-template.yml
@@ -30,7 +30,7 @@ jobs:
       - script: |
           [ -n "$OVERRIDE_BUILD_OPTIONS" ] && OVERRIDE_BUILD_OPTIONS=$(OVERRIDE_BUILD_OPTIONS)
           BUILD_OPTIONS="$(BUILD_OPTIONS) $OVERRIDE_BUILD_OPTIONS"
-          if [ -n "$(CACHE_MODE)" ] && echo $(PLATFORM_AZP) | grep -E -q "^(vs|broadcom|mellanox|marvell-armhf)$"; then
+          if [ -n "$(CACHE_MODE)" ] && echo $(PLATFORM_AZP) | grep -E -q "^(vs|broadcom|mellanox|marvell-armhf|marvell-arm64)$"; then
             CACHE_OPTIONS="SONIC_DPKG_CACHE_METHOD=$(CACHE_MODE) SONIC_DPKG_CACHE_SOURCE=/nfs/dpkg_cache/$(PLATFORM_AZP)"
             BUILD_OPTIONS="$BUILD_OPTIONS $CACHE_OPTIONS"
           fi
diff --git a/platform/marvell-arm64/docker-saiserver-mrvl.dep b/platform/marvell-arm64/docker-saiserver-mrvl.dep
new file mode 100644
index 000000000..3ded7bc91
--- /dev/null
+++ b/platform/marvell-arm64/docker-saiserver-mrvl.dep
@@ -0,0 +1,8 @@
+DPATH       := $($(DOCKER_SAISERVER_MRVL)_PATH)
+DEP_FILES   := $(SONIC_COMMON_FILES_LIST) $(PLATFORM_PATH)/docker-saiserver-mrvl.mk $(PLATFORM_PATH)/docker-saiserver-mrvl.dep
+DEP_FILES   += $(SONIC_COMMON_BASE_FILES_LIST)
+DEP_FILES   += $(shell git ls-files $(DPATH))
+
+$(DOCKER_SAISERVER_MRVL)_CACHE_MODE  := GIT_CONTENT_SHA
+$(DOCKER_SAISERVER_MRVL)_DEP_FLAGS   := $(SONIC_COMMON_FLAGS_LIST)
+$(DOCKER_SAISERVER_MRVL)_DEP_FILES   := $(DEP_FILES)
diff --git a/platform/marvell-arm64/docker-syncd-mrvl-rpc.dep b/platform/marvell-arm64/docker-syncd-mrvl-rpc.dep
new file mode 100644
index 000000000..3ab0dec8e
--- /dev/null
+++ b/platform/marvell-arm64/docker-syncd-mrvl-rpc.dep
@@ -0,0 +1,8 @@
+DPATH       := $($(DOCKER_SYNCD_MRVL_RPC)_PATH)
+DEP_FILES   := $(SONIC_COMMON_FILES_LIST) $(PLATFORM_PATH)/docker-syncd-mrvl-rpc.mk $(PLATFORM_PATH)/docker-syncd-mrvl-rpc.dep
+DEP_FILES   += $(SONIC_COMMON_BASE_FILES_LIST)
+DEP_FILES   += $(shell git ls-files $(DPATH))
+
+$(DOCKER_SYNCD_MRVL_RPC)_CACHE_MODE  := GIT_CONTENT_SHA
+$(DOCKER_SYNCD_MRVL_RPC)_DEP_FLAGS   := $(SONIC_COMMON_FLAGS_LIST)
+$(DOCKER_SYNCD_MRVL_RPC)_DEP_FILES   := $(DEP_FILES)
diff --git a/platform/marvell-arm64/docker-syncd-mrvl.dep b/platform/marvell-arm64/docker-syncd-mrvl.dep
new file mode 100644
index 000000000..d3f213a2d
--- /dev/null
+++ b/platform/marvell-arm64/docker-syncd-mrvl.dep
@@ -0,0 +1,10 @@
+DPATH       := $($(DOCKER_SYNCD_BASE)_PATH)
+DEP_FILES   := $(SONIC_COMMON_FILES_LIST) $(PLATFORM_PATH)/docker-syncd-mrvl.mk $(PLATFORM_PATH)/docker-syncd-mrvl.dep $(PLATFORM_PATH)/sai.mk
+DEP_FILES   += $(SONIC_COMMON_BASE_FILES_LIST)
+DEP_FILES   += $(shell git ls-files $(DPATH))
+
+$(DOCKER_SYNCD_BASE)_CACHE_MODE  := GIT_CONTENT_SHA
+$(DOCKER_SYNCD_BASE)_DEP_FLAGS   := $(SONIC_COMMON_FLAGS_LIST)
+$(DOCKER_SYNCD_BASE)_DEP_FILES   := $(DEP_FILES)
+
+$(eval $(call add_dbg_docker,$(DOCKER_SYNCD_BASE),$(DOCKER_SYNCD_BASE_DBG)))
diff --git a/platform/marvell-arm64/libsaithrift-dev.dep b/platform/marvell-arm64/libsaithrift-dev.dep
new file mode 100644
index 000000000..d7d08f14a
--- /dev/null
+++ b/platform/marvell-arm64/libsaithrift-dev.dep
@@ -0,0 +1,11 @@
+SPATH       := $($(LIBSAITHRIFT_DEV)_SRC_PATH)
+DEP_FILES   := $(SONIC_COMMON_FILES_LIST) $(PLATFORM_PATH)/libsaithrift-dev.mk $(PLATFORM_PATH)/libsaithrift-dev.dep
+DEP_FILES   += $(SONIC_COMMON_BASE_FILES_LIST)
+SMDEP_PATHS := $(SPATH)  $(SPATH)/bm/behavioral-model  $(SPATH)/test/ptf  $(SPATH)/test/saithrift/ctypesgen
+$(foreach path, $(SMDEP_PATHS), $(eval $(path) :=$(filter-out $(SMDEP_PATHS),$(addprefix $(path)/, $(shell cd $(path) &&  git ls-files | grep -Ev " " )))))
+
+$(LIBSAITHRIFT_DEV)_CACHE_MODE  := GIT_CONTENT_SHA
+$(LIBSAITHRIFT_DEV)_DEP_FLAGS   := $(SONIC_COMMON_FLAGS_LIST)
+$(LIBSAITHRIFT_DEV)_DEP_FILES   := $(DEP_FILES)
+$(LIBSAITHRIFT_DEV)_SMDEP_FILES := $(foreach path, $(SMDEP_PATHS), $($(path)))
+$(LIBSAITHRIFT_DEV)_SMDEP_PATHS := $(SMDEP_PATHS)
diff --git a/platform/marvell-arm64/mrvl-prestera.dep b/platform/marvell-arm64/mrvl-prestera.dep
new file mode 100644
index 000000000..3ee32c3cb
--- /dev/null
+++ b/platform/marvell-arm64/mrvl-prestera.dep
@@ -0,0 +1,9 @@
+MPATH       := $($(MRVL_PRESTERA_DEB)_SRC_PATH)
+DEP_FILES   := $(SONIC_COMMON_FILES_LIST) $(PLATFORM_PATH)/mrvl-prestera.mk $(PLATFORM_PATH)/mrvl-prestera.dep
+DEP_FILES   += $(SONIC_COMMON_BASE_FILES_LIST)
+SMDEP_FILES := $(addprefix $(MPATH)/,$(shell cd $(MPATH) && git ls-files))
+
+$(MRVL_PRESTERA_DEB)_CACHE_MODE  := GIT_CONTENT_SHA
+$(MRVL_PRESTERA_DEB)_DEP_FLAGS   := $(SONIC_COMMON_FLAGS_LIST)
+$(MRVL_PRESTERA_DEB)_DEP_FILES   := $(DEP_FILES)
+$(MRVL_PRESTERA_DEB)_SMDEP_FILES := $(SMDEP_FILES)
diff --git a/platform/marvell-arm64/one-image.dep b/platform/marvell-arm64/one-image.dep
new file mode 100644
index 000000000..154112a82
--- /dev/null
+++ b/platform/marvell-arm64/one-image.dep
@@ -0,0 +1 @@
+$(SONIC_ONE_IMAGE)_CACHE_MODE  := none
diff --git a/platform/marvell-arm64/platform-marvell.dep b/platform/marvell-arm64/platform-marvell.dep
new file mode 100644
index 000000000..f906215e3
--- /dev/null
+++ b/platform/marvell-arm64/platform-marvell.dep
@@ -0,0 +1,9 @@
+MPATH       := $($(AC5X_RD98DX35xx_PLATFORM)_SRC_PATH)
+DEP_FILES   := $(SONIC_COMMON_FILES_LIST) $(PLATFORM_PATH)/platform-marvell.dep $(PLATFORM_PATH)/platform-marvell.mk
+DEP_FILES   += $(SONIC_COMMON_BASE_FILES_LIST)
+SMDEP_FILES := $(addprefix $(MPATH)/,$(shell cd $(MPATH) && git ls-files))
+
+$(AC5X_RD98DX35xx_PLATFORM)_CACHE_MODE  := GIT_CONTENT_SHA
+$(AC5X_RD98DX35xx_PLATFORM)_DEP_FLAGS   := $(SONIC_COMMON_FLAGS_LIST)
+$(AC5X_RD98DX35xx_PLATFORM)_DEP_FILES   := $(DEP_FILES)
+$(AC5X_RD98DX35xx_PLATFORM)_SMDEP_FILES := $(SMDEP_FILES)
diff --git a/platform/marvell-arm64/platform-nokia.dep b/platform/marvell-arm64/platform-nokia.dep
new file mode 100644
index 000000000..603feb645
--- /dev/null
+++ b/platform/marvell-arm64/platform-nokia.dep
@@ -0,0 +1,8 @@
+MPATH       := $($(NOKIA_7215_PLATFORM)_SRC_PATH)
+DEP_FILES   := $(SONIC_COMMON_FILES_LIST) $(PLATFORM_PATH)/platform-nokia.mk $(PLATFORM_PATH)/platform-nokia.dep
+DEP_FILES   += $(SONIC_COMMON_BASE_FILES_LIST)
+DEP_FILES   += $(shell git ls-files $(MPATH))
+
+$(NOKIA_7215_PLATFORM)_CACHE_MODE  := GIT_CONTENT_SHA
+$(NOKIA_7215_PLATFORM)_DEP_FLAGS   := $(SONIC_COMMON_FLAGS_LIST)
+$(NOKIA_7215_PLATFORM)_DEP_FILES   := $(DEP_FILES)
diff --git a/platform/marvell-arm64/rules.dep b/platform/marvell-arm64/rules.dep
new file mode 100644
index 000000000..b14b76ef0
--- /dev/null
+++ b/platform/marvell-arm64/rules.dep
@@ -0,0 +1,9 @@
+include $(PLATFORM_PATH)/docker-saiserver-mrvl.dep
+include $(PLATFORM_PATH)/docker-syncd-mrvl-rpc.dep
+include $(PLATFORM_PATH)/docker-syncd-mrvl.dep
+include $(PLATFORM_PATH)/libsaithrift-dev.dep
+include $(PLATFORM_PATH)/mrvl-prestera.dep
+include $(PLATFORM_PATH)/one-image.dep
+include $(PLATFORM_PATH)/platform-marvell.dep
+include $(PLATFORM_PATH)/platform-nokia.dep
+include $(PLATFORM_PATH)/sai.dep
diff --git a/platform/marvell-arm64/sai.dep b/platform/marvell-arm64/sai.dep
new file mode 100644
index 000000000..618babe65
--- /dev/null
+++ b/platform/marvell-arm64/sai.dep
@@ -0,0 +1,8 @@
+SPATH       := $($(MRVL_SAI)_SRC_PATH)
+DEP_FILES   := $(SONIC_COMMON_FILES_LIST) $(PLATFORM_PATH)/sai.mk $(PLATFORM_PATH)/sai.dep
+DEP_FILES   += $(SONIC_COMMON_BASE_FILES_LIST)
+DEP_FILES   += $(shell git ls-files $(SPATH))
+
+$(MRVL_SAI)_CACHE_MODE  := GIT_CONTENT_SHA
+$(MRVL_SAI)_DEP_FLAGS   := $(SONIC_COMMON_FLAGS_LIST)
+$(MRVL_SAI)_DEP_FILES   := $(DEP_FILES)

From b2ca36aa1c02147963e0973b18f203a106625970 Mon Sep 17 00:00:00 2001
From: Yaqiang Zhu <zyq1512099831@gmail.com>
Date: Wed, 10 Jan 2024 07:40:11 +0800
Subject: [PATCH 0123/1115] [smart_switch][dhcp_server] Add smart_switch
 support in dhcpservd (#17576)

* [smart_switch][dhcp_server] Add related checker for smart_switch in dhcp_db_monitor
* [smart_switch][dhcp_server] Add smart_switch support in dhcpservd
---
 .../dhcp_utilities/common/utils.py            | 11 +++
 .../dhcp_utilities/dhcpservd/dhcp_cfggen.py   | 70 +++++++++++++++----
 .../dhcp_utilities/dhcpservd/dhcpservd.py     |  4 +-
 .../tests/common_utils.py                     |  1 +
 .../tests/test_dhcp_cfggen.py                 | 38 +++++++---
 .../tests/test_dhcp_db_monitor.py             | 12 ++--
 src/sonic-dhcp-utilities/tests/test_utils.py  |  6 ++
 7 files changed, 110 insertions(+), 32 deletions(-)

diff --git a/src/sonic-dhcp-utilities/dhcp_utilities/common/utils.py b/src/sonic-dhcp-utilities/dhcp_utilities/common/utils.py
index c92936bfc..f6975c452 100644
--- a/src/sonic-dhcp-utilities/dhcp_utilities/common/utils.py
+++ b/src/sonic-dhcp-utilities/dhcp_utilities/common/utils.py
@@ -163,3 +163,14 @@ def get_target_process_cmds(process_name):
         if proc.name() == process_name:
             res.append(proc.cmdline())
     return res
+
+
+def is_smart_switch(device_metadata):
+    """
+    Check in device metadata whether subtype is smartswitch
+    Args:
+        device_metadata: DEVICE_METADATA table
+    Returns:
+        If subtype is "SmartSwitch", return True. Else, return False
+    """
+    return device_metadata.get("localhost", {}).get("subtype", "") == "SmartSwitch"
diff --git a/src/sonic-dhcp-utilities/dhcp_utilities/dhcpservd/dhcp_cfggen.py b/src/sonic-dhcp-utilities/dhcp_utilities/dhcpservd/dhcp_cfggen.py
index 136ff01c8..dc69281c3 100755
--- a/src/sonic-dhcp-utilities/dhcp_utilities/dhcpservd/dhcp_cfggen.py
+++ b/src/sonic-dhcp-utilities/dhcp_utilities/dhcpservd/dhcp_cfggen.py
@@ -5,7 +5,7 @@
 import syslog
 
 from jinja2 import Environment, FileSystemLoader
-from dhcp_utilities.common.utils import merge_intervals, validate_str_type
+from dhcp_utilities.common.utils import merge_intervals, validate_str_type, is_smart_switch
 
 PORT_MAP_PATH = "/tmp/port-name-alias-map.txt"
 UNICODE_TYPE = str
@@ -15,9 +15,12 @@
 DHCP_SERVER_IPV4_PORT = "DHCP_SERVER_IPV4_PORT"
 VLAN_INTERFACE = "VLAN_INTERFACE"
 VLAN_MEMBER = "VLAN_MEMBER"
+DPUS = "DPUS"
+MID_PLANE_BRIDGE = "MID_PLANE_BRIDGE"
 PORT_MODE_CHECKER = ["DhcpServerTableCfgChangeEventChecker", "DhcpPortTableEventChecker", "DhcpRangeTableEventChecker",
                      "DhcpOptionTableEventChecker", "VlanTableEventChecker", "VlanIntfTableEventChecker",
                      "VlanMemberTableEventChecker"]
+SMART_SWITCH_CHECKER = ["DpusTableEventChecker", "MidPlaneTableEventChecker"]
 LEASE_UPDATE_SCRIPT_PATH = "/etc/kea/lease_update.sh"
 DEFAULT_LEASE_TIME = 900
 DEFAULT_LEASE_PATH = "/tmp/kea-lease.csv"
@@ -58,21 +61,62 @@ def generate(self):
         # Get host name
         device_metadata = self.db_connector.get_config_db_table("DEVICE_METADATA")
         hostname = self._parse_hostname(device_metadata)
+        smart_switch = is_smart_switch(device_metadata)
         # Get ip information of vlan
         vlan_interface = self.db_connector.get_config_db_table(VLAN_INTERFACE)
         vlan_member_table = self.db_connector.get_config_db_table(VLAN_MEMBER)
         vlan_interfaces, vlan_members = self._parse_vlan(vlan_interface, vlan_member_table)
+
+        # Parse dpu
+        dpus_table = self.db_connector.get_config_db_table(DPUS)
+        mid_plane_table = self.db_connector.get_config_db_table(MID_PLANE_BRIDGE)
+        mid_plane, dpus = self._parse_dpu(dpus_table, mid_plane_table) if smart_switch else {}, {}
+
         dhcp_server_ipv4, customized_options_ipv4, range_ipv4, port_ipv4 = self._get_dhcp_ipv4_tables_from_db()
         # Parse range table
         ranges = self._parse_range(range_ipv4)
 
         # Parse port table
-        port_ips, used_ranges = self._parse_port(port_ipv4, vlan_interfaces, vlan_members, ranges)
+        dhcp_interfaces = vlan_interfaces
+        if smart_switch and "bridge" in mid_plane and "ip_prefix" in mid_plane:
+            mid_plane_name = mid_plane["bridge"]
+            dhcp_interfaces[mid_plane_name] = [{
+                "network": ipaddress.ip_network(mid_plane["ip_prefix"], strict=False),
+                "ip": mid_plane["ip_prefix"]
+            }]
+            dpus = ["{}|{}".format(mid_plane_name, dpu) for dpu in dpus]
+        dhcp_members = vlan_members | set(dpus)
+        port_ips, used_ranges = self._parse_port(port_ipv4, dhcp_interfaces, dhcp_members, ranges)
         customized_options = self._parse_customized_options(customized_options_ipv4)
         render_obj, enabled_dhcp_interfaces, used_options, subscribe_table = \
             self._construct_obj_for_template(dhcp_server_ipv4, port_ips, hostname, customized_options)
+
+        if smart_switch:
+            subscribe_table |= set(SMART_SWITCH_CHECKER)
+
         return self._render_config(render_obj), used_ranges, enabled_dhcp_interfaces, used_options, subscribe_table
 
+    def _parse_dpu(self, dpus_table, mid_plane_table):
+        """
+        Parse dpu related tables
+        Args:
+            dpus_table: DPU table dict
+            mid_plane_table: mid_plane table dict
+        Returns:
+            Parsed obj, sample:
+                mid_plane = {
+                    "bridge": "bridge_midplane",
+                    "address": "169.254.200.254/24"
+                }
+                dpus = {
+                    "dpu0"
+                }
+        """
+        mid_plane = mid_plane_table.get("GLOBAL", {})
+        dpus = set([dpu_value["midplane_interface"] for dpu_value in dpus_table.values()
+                   if "midplane_interface" in dpu_value])
+        return mid_plane, dpus
+
     def _parse_customized_options(self, customized_options_ipv4):
         customized_options = {}
         for option_name, config in customized_options_ipv4.items():
@@ -107,7 +151,7 @@ def _render_config(self, render_obj):
 
     def _parse_vlan(self, vlan_interface, vlan_member):
         vlan_interfaces = self._get_vlan_ipv4_interface(vlan_interface.keys())
-        vlan_members = vlan_member.keys()
+        vlan_members = set(vlan_member.keys())
         return vlan_interfaces, vlan_members
 
     def _parse_hostname(self, device_metadata):
@@ -306,19 +350,19 @@ def _match_range_network(self, dhcp_interface, dhcp_interface_name, port, range,
             port_ips[dhcp_interface_name][dhcp_interface_ip_str][port].append([range[0], range[1]])
             break
 
-    def _parse_port(self, port_ipv4, vlan_interfaces, vlan_members, ranges):
+    def _parse_port(self, port_ipv4, dhcp_interfaces, dhcp_members, ranges):
         """
         Parse content in DHCP_SERVER_IPV4_PORT table to below format, which indicate ip ranges assign to interface.
         Args:
             port_ipv4: Table object.
-            vlan_interfaces: Vlan information, sample:
+            dhcp_interfaces: DHCP interfaces information, sample:
                 {
                     'Vlan1000': [{
                         'network': IPv4Network('192.168.0.0/24'),
                         'ip': '192.168.0.1/24'
                     }]
                 }
-            vlan_members: List of vlan members
+            dhcp_members: List of DHCP members
             ranges: Dict of ranges
         Returns:
             Dict of dhcp conf, sample:
@@ -349,23 +393,21 @@ def _parse_port(self, port_ipv4, vlan_interfaces, vlan_members, ranges):
                 continue
             splits = port_key.split("|")
             # Skip port not in correct vlan
-            if port_key not in vlan_members:
+            if port_key not in dhcp_members:
                 syslog.syslog(syslog.LOG_WARNING, f"Port {splits[1]} is not in {splits[0]}")
                 continue
             # Get dhcp interface name like Vlan1000
             dhcp_interface_name = splits[0]
-            # Get dhcp member interface name like etp1
-            if splits[1] not in self.port_alias_map:
-                syslog.syslog(syslog.LOG_WARNING, f"Cannot find {splits[1]} in port_alias_map")
-                continue
-            port = self.port_alias_map[splits[1]]
-            if dhcp_interface_name not in vlan_interfaces:
+            # Get dhcp member interface name like etp1, be consistent with dhcp_relay, if alias doesn't exist,
+            # use port name directly
+            port = self.port_alias_map[splits[1]] if splits[1] in self.port_alias_map else splits[1]
+            if dhcp_interface_name not in dhcp_interfaces:
                 syslog.syslog(syslog.LOG_WARNING, f"Interface {dhcp_interface_name} doesn't have IPv4 address")
                 continue
             if dhcp_interface_name not in port_ips:
                 port_ips[dhcp_interface_name] = {}
             # Get ip information of Vlan
-            dhcp_interface = vlan_interfaces[dhcp_interface_name]
+            dhcp_interface = dhcp_interfaces[dhcp_interface_name]
 
             for dhcp_interface_ip in dhcp_interface:
                 ip_ports[str(dhcp_interface_ip["network"])] = dhcp_interface_name
diff --git a/src/sonic-dhcp-utilities/dhcp_utilities/dhcpservd/dhcpservd.py b/src/sonic-dhcp-utilities/dhcp_utilities/dhcpservd/dhcpservd.py
index 8911a3341..b95e95417 100644
--- a/src/sonic-dhcp-utilities/dhcp_utilities/dhcpservd/dhcpservd.py
+++ b/src/sonic-dhcp-utilities/dhcp_utilities/dhcpservd/dhcpservd.py
@@ -9,7 +9,7 @@
 from dhcp_utilities.common.utils import DhcpDbConnector
 from dhcp_utilities.common.dhcp_db_monitor import DhcpServdDbMonitor, DhcpServerTableCfgChangeEventChecker, \
     DhcpOptionTableEventChecker, DhcpRangeTableEventChecker, DhcpPortTableEventChecker, VlanIntfTableEventChecker, \
-    VlanMemberTableEventChecker, VlanTableEventChecker
+    VlanMemberTableEventChecker, VlanTableEventChecker, MidPlaneTableEventChecker, DpusTableEventChecker
 from swsscommon import swsscommon
 
 KEA_DHCP4_CONFIG = "/etc/kea/kea-dhcp4.conf"
@@ -110,6 +110,8 @@ def main():
     checkers.append(VlanTableEventChecker(sel, dhcp_db_connector.config_db))
     checkers.append(VlanIntfTableEventChecker(sel, dhcp_db_connector.config_db))
     checkers.append(VlanMemberTableEventChecker(sel, dhcp_db_connector.config_db))
+    checkers.append(DpusTableEventChecker(sel, dhcp_db_connector.config_db))
+    checkers.append(MidPlaneTableEventChecker(sel, dhcp_db_connector.config_db))
     dhcp_servd_monitor = DhcpServdDbMonitor(dhcp_db_connector, sel, checkers, DEFAULT_SELECT_TIMEOUT)
     dhcpservd = DhcpServd(dhcp_cfg_generator, dhcp_db_connector, dhcp_servd_monitor)
     dhcpservd.start()
diff --git a/src/sonic-dhcp-utilities/tests/common_utils.py b/src/sonic-dhcp-utilities/tests/common_utils.py
index bf8811729..6b7d0acd0 100644
--- a/src/sonic-dhcp-utilities/tests/common_utils.py
+++ b/src/sonic-dhcp-utilities/tests/common_utils.py
@@ -14,6 +14,7 @@
 PORT_MODE_CHECKER = ["DhcpServerTableCfgChangeEventChecker", "DhcpPortTableEventChecker", "DhcpRangeTableEventChecker",
                      "DhcpOptionTableEventChecker", "VlanTableEventChecker", "VlanIntfTableEventChecker",
                      "VlanMemberTableEventChecker"]
+SMART_SWITCH_CHECKER = ["DpusTableEventChecker", "MidPlaneTableEventChecker"]
 
 
 class MockConfigDb(object):
diff --git a/src/sonic-dhcp-utilities/tests/test_dhcp_cfggen.py b/src/sonic-dhcp-utilities/tests/test_dhcp_cfggen.py
index dc387bc0c..4d841df7b 100644
--- a/src/sonic-dhcp-utilities/tests/test_dhcp_cfggen.py
+++ b/src/sonic-dhcp-utilities/tests/test_dhcp_cfggen.py
@@ -2,10 +2,10 @@
 import ipaddress
 import json
 import pytest
-from common_utils import MockConfigDb, mock_get_config_db_table, PORT_MODE_CHECKER
+from common_utils import MockConfigDb, mock_get_config_db_table, PORT_MODE_CHECKER, SMART_SWITCH_CHECKER
 from dhcp_utilities.common.utils import DhcpDbConnector
 from dhcp_utilities.dhcpservd.dhcp_cfggen import DhcpServCfgGenerator
-from unittest.mock import patch
+from unittest.mock import patch, MagicMock
 
 expected_dhcp_config = {
     "Dhcp4": {
@@ -165,7 +165,8 @@
     "Vlan1000": {
         "192.168.0.1/21": {
             "etp8": [["192.168.0.2", "192.168.0.5"], ["192.168.0.10", "192.168.0.10"]],
-            "etp7": [["192.168.0.7", "192.168.0.7"]]
+            "etp7": [["192.168.0.7", "192.168.0.7"]],
+            "Ethernet40": [["192.168.0.10", "192.168.0.10"]]
         }
     }
 }
@@ -302,8 +303,8 @@ def test_parse_vlan(mock_swsscommon_dbconnector_init, mock_parse_port_map_alias,
     vlan_interfaces, vlan_members = dhcp_cfg_generator._parse_vlan(mock_config_db.config_db.get("VLAN_INTERFACE"),
                                                                    mock_config_db.config_db.get("VLAN_MEMBER"))
     assert vlan_interfaces == expected_vlan_ipv4_interface
-    expeceted_members = ["Vlan1000|Ethernet24", "Vlan1000|Ethernet28", "Vlan1000|Ethernet40", "Vlan3000|Ethernet44"]
-    assert list(vlan_members) == expeceted_members
+    assert vlan_members == set(["Vlan1000|Ethernet24", "Vlan1000|Ethernet28", "Vlan1000|Ethernet40",
+                                "Vlan3000|Ethernet44"])
 
 
 @pytest.mark.parametrize("test_config_db", ["mock_config_db.json", "mock_config_db_without_port_config.json"])
@@ -323,17 +324,22 @@ def test_parse_port(test_config_db, mock_swsscommon_dbconnector_init, mock_get_r
                            if test_config_db == "mock_config_db.json" else set())
 
 
-def test_generate(mock_swsscommon_dbconnector_init, mock_parse_port_map_alias, mock_get_render_template):
+@pytest.mark.parametrize("mid_plane", [{}, {"bridge": "mid_plane", "ip_prefix": "192.168.0.1/24"}])
+@pytest.mark.parametrize("is_smart_switch", [True, False])
+def test_generate(mock_swsscommon_dbconnector_init, mock_parse_port_map_alias, mock_get_render_template, mid_plane,
+                  is_smart_switch):
     with patch.object(DhcpServCfgGenerator, "_parse_hostname"), \
-         patch.object(DhcpServCfgGenerator, "_parse_vlan", return_value=(None, None)), \
+         patch.object(DhcpServCfgGenerator, "_parse_vlan", return_value=({}, set(["Ethernet0"]))), \
          patch.object(DhcpServCfgGenerator, "_get_dhcp_ipv4_tables_from_db", return_value=(None, None, None, None)), \
          patch.object(DhcpServCfgGenerator, "_parse_range"), \
          patch.object(DhcpServCfgGenerator, "_parse_port", return_value=(None, set(["range1"]))), \
          patch.object(DhcpServCfgGenerator, "_parse_customized_options"), \
+         patch.object(DhcpServCfgGenerator, "_parse_dpu", side_effect=[mid_plane, set()]), \
          patch.object(DhcpServCfgGenerator, "_construct_obj_for_template",
                       return_value=(None, set(["Vlan1000"]), set(["option1"]), set(["dummy"]))), \
          patch.object(DhcpServCfgGenerator, "_render_config", return_value="dummy_config"), \
-         patch.object(DhcpDbConnector, "get_config_db_table", side_effect=mock_get_config_db_table):
+         patch.object(DhcpDbConnector, "get_config_db_table", side_effect=mock_get_config_db_table), \
+         patch("dhcp_utilities.dhcpservd.dhcp_cfggen.is_smart_switch", return_value=is_smart_switch):
         dhcp_db_connector = DhcpDbConnector()
         dhcp_cfg_generator = DhcpServCfgGenerator(dhcp_db_connector)
         kea_dhcp4_config, used_ranges, enabled_dhcp_interfaces, used_options, subscribe_table = \
@@ -342,7 +348,11 @@ def test_generate(mock_swsscommon_dbconnector_init, mock_parse_port_map_alias, m
         assert used_ranges == set(["range1"])
         assert enabled_dhcp_interfaces == set(["Vlan1000"])
         assert used_options == set(["option1"])
-        assert subscribe_table == set(["dummy"])
+        expected_tables = set(["dummy"])
+        if is_smart_switch:
+            expected_tables |= set(["DpusTableEventChecker", "MidPlaneTableEventChecker"])
+
+        assert subscribe_table == expected_tables
 
 
 def test_construct_obj_for_template(mock_swsscommon_dbconnector_init, mock_parse_port_map_alias,
@@ -414,3 +424,13 @@ def test_parse_customized_options(mock_swsscommon_dbconnector_init, mock_get_ren
         }
     else:
         assert customized_options == {}
+
+
+def test_parse_dpus(mock_swsscommon_dbconnector_init, mock_get_render_template, mock_parse_port_map_alias):
+    dhcp_db_connector = DhcpDbConnector()
+    dhcp_cfg_generator = DhcpServCfgGenerator(dhcp_db_connector)
+    dpus_table = {"dpu0": {"midplane_interface": "dpu0"}}
+    mid_plane_table = {"GLOBAL": {"bridge": "bridge_midplane", "ip_prefix": "169.254.200.254/24"}}
+    mid_plane, dpus = dhcp_cfg_generator._parse_dpu(dpus_table, mid_plane_table)
+    assert mid_plane == {"bridge": "bridge_midplane", "ip_prefix": "169.254.200.254/24"}
+    assert dpus == set(["dpu0"])
diff --git a/src/sonic-dhcp-utilities/tests/test_dhcp_db_monitor.py b/src/sonic-dhcp-utilities/tests/test_dhcp_db_monitor.py
index 8a5a58c9c..4352ee60f 100644
--- a/src/sonic-dhcp-utilities/tests/test_dhcp_db_monitor.py
+++ b/src/sonic-dhcp-utilities/tests/test_dhcp_db_monitor.py
@@ -369,7 +369,7 @@ def test_feature_table_checker(mock_swsscommon_dbconnector_init, tested_data, te
             assert expected_res == check_res
 
 
-@pytest.mark.parametrize("tested_db_snapshot", [{"enabled_dhcp_interfaces": {"bridge_midplane": ["dpu0"]}}, {}])
+@pytest.mark.parametrize("tested_db_snapshot", [{"enabled_dhcp_interfaces": {"bridge_midplane"}}, {}])
 @pytest.mark.parametrize("tested_data", get_subscribe_table_tested_data("test_mid_plane_update"))
 def test_mid_plane_table_checker(mock_swsscommon_dbconnector_init, tested_data, tested_db_snapshot):
     with patch.object(ConfigDbEventChecker, "enable"), \
@@ -386,9 +386,8 @@ def test_mid_plane_table_checker(mock_swsscommon_dbconnector_init, tested_data,
             assert expected_res == check_res
 
 
-@pytest.mark.parametrize("tested_db_snapshot", [{"enabled_dhcp_interfaces": {"bridge_midplane": ["dpu0"]}}, {}])
 @pytest.mark.parametrize("tested_data", get_subscribe_table_tested_data("test_dpus_update"))
-def test_dpus_table_checker(mock_swsscommon_dbconnector_init, tested_data, tested_db_snapshot):
+def test_dpus_table_checker(mock_swsscommon_dbconnector_init, tested_data):
     with patch.object(ConfigDbEventChecker, "enable"), \
          patch.object(ConfigDbEventChecker, "subscriber_state_table",
                       return_value=MockSubscribeTable(tested_data["table"]), new_callable=PropertyMock), \
@@ -396,8 +395,5 @@ def test_dpus_table_checker(mock_swsscommon_dbconnector_init, tested_data, teste
         sel = swsscommon.Select()
         db_event_checker = DpusTableEventChecker(sel, MagicMock())
         expected_res = tested_data["exp_res"]
-        check_res = db_event_checker.check_update_event(tested_db_snapshot)
-        if "enabled_dhcp_interfaces" not in tested_db_snapshot:
-            assert check_res
-        else:
-            assert expected_res == check_res
+        check_res = db_event_checker.check_update_event({})
+        assert expected_res == check_res
diff --git a/src/sonic-dhcp-utilities/tests/test_utils.py b/src/sonic-dhcp-utilities/tests/test_utils.py
index 8017d23cb..cf69c2f93 100644
--- a/src/sonic-dhcp-utilities/tests/test_utils.py
+++ b/src/sonic-dhcp-utilities/tests/test_utils.py
@@ -152,3 +152,9 @@ def test_get_target_process_cmds():
             ]
         ]
         assert res == expected_res
+
+
+@pytest.mark.parametrize("is_smart_switch", [True, False])
+def test_is_smart_switch(is_smart_switch):
+    device_metadata = {"localhost": {"subtype": "SmartSwitch"}} if is_smart_switch else {"localhost": {}}
+    assert utils.is_smart_switch(device_metadata) == is_smart_switch

From 5987dcf59ed1637b7f7fd7303ffc746d38a01947 Mon Sep 17 00:00:00 2001
From: Xichen96 <lukelin0907@gmail.com>
Date: Wed, 10 Jan 2024 12:59:13 +0800
Subject: [PATCH 0124/1115] add config dhcp_server disable (#17689)

---
 .../test_config_dhcp_server.py                | 15 +++++++++++++
 .../cli/config/plugins/dhcp_server.py         | 21 +++++++++++++++----
 2 files changed, 32 insertions(+), 4 deletions(-)

diff --git a/dockers/docker-dhcp-server/cli-plugin-tests/test_config_dhcp_server.py b/dockers/docker-dhcp-server/cli-plugin-tests/test_config_dhcp_server.py
index 57ed08161..379ad502e 100644
--- a/dockers/docker-dhcp-server/cli-plugin-tests/test_config_dhcp_server.py
+++ b/dockers/docker-dhcp-server/cli-plugin-tests/test_config_dhcp_server.py
@@ -143,3 +143,18 @@ def test_config_dhcp_server_ipv4_enable_does_not_exist(self, mock_db):
         result = runner.invoke(dhcp_server.dhcp_server.commands["ipv4"].commands["enable"], ["Vlan200"], obj=db)
         assert result.exit_code == 2, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
 
+    def test_config_dhcp_server_ipv4_disable_already_exist(self, mock_db):
+        runner = CliRunner()
+        db = clicommon.Db()
+        db.db = mock_db
+        result = runner.invoke(dhcp_server.dhcp_server.commands["ipv4"].commands["disable"], ["Vlan100"], obj=db)
+        assert result.exit_code == 0, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
+        assert mock_db.get("CONFIG_DB", "DHCP_SERVER_IPV4|Vlan300", "state") == "disabled"
+
+    def test_config_dhcp_server_ipv4_disable_does_not_exist(self, mock_db):
+        runner = CliRunner()
+        db = clicommon.Db()
+        db.db = mock_db
+        result = runner.invoke(dhcp_server.dhcp_server.commands["ipv4"].commands["disable"], ["Vlan200"], obj=db)
+        assert result.exit_code == 2, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
+
diff --git a/dockers/docker-dhcp-server/cli/config/plugins/dhcp_server.py b/dockers/docker-dhcp-server/cli/config/plugins/dhcp_server.py
index ae60611ae..43d7fd5c8 100644
--- a/dockers/docker-dhcp-server/cli/config/plugins/dhcp_server.py
+++ b/dockers/docker-dhcp-server/cli/config/plugins/dhcp_server.py
@@ -91,7 +91,7 @@ def dhcp_server_ipv4_add(db, mode, lease_time, dup_gw_nm, gateway, netmask, dhcp
         ctx.fail("gateway and netmask must be valid ipv4 string")
     key = "DHCP_SERVER_IPV4|" + dhcp_interface
     if dbconn.exists("CONFIG_DB", key):
-        ctx.fail("Dhcp_interface %s already exist".format(dhcp_interface))
+        ctx.fail("Dhcp_interface {} already exist".format(dhcp_interface))
     else:
         dbconn.hmset("CONFIG_DB", key, {
             "mode": mode,
@@ -110,10 +110,10 @@ def dhcp_server_ipv4_del(db, dhcp_interface):
     dbconn = db.db
     key = "DHCP_SERVER_IPV4|" + dhcp_interface
     if dbconn.exists("CONFIG_DB", key):
-        click.echo("Dhcp interface %s exists in config db, proceed to delete".format(dhcp_interface))
+        click.echo("Dhcp interface {} exists in config db, proceed to delete".format(dhcp_interface))
         dbconn.delete("CONFIG_DB", key)
     else:
-        ctx.fail("Dhcp interface %s does not exist in config db".format(dhcp_interface))
+        ctx.fail("Dhcp interface {} does not exist in config db".format(dhcp_interface))
 
 
 @dhcp_server_ipv4.command(name="enable")
@@ -126,7 +126,20 @@ def dhcp_server_ipv4_enable(db, dhcp_interface):
     if dbconn.exists("CONFIG_DB", key):
         dbconn.set("CONFIG_DB", key, "state", "enabled")
     else:
-        ctx.fail("Failed to enable, dhcp interface %s does not exist".format(dhcp_interface))
+        ctx.fail("Failed to enable, dhcp interface {} does not exist".format(dhcp_interface))
+
+
+@dhcp_server_ipv4.command(name="disable")
+@click.argument("dhcp_interface", required=True)
+@clicommon.pass_db
+def dhcp_server_ipv4_disable(db, dhcp_interface):
+    ctx = click.get_current_context()
+    dbconn = db.db
+    key = "DHCP_SERVER_IPV4|" + dhcp_interface
+    if dbconn.exists("CONFIG_DB", key):
+        dbconn.set("CONFIG_DB", key, "state", "disabled")
+    else:
+        ctx.fail("Failed to disable, dhcp interface {} does not exist".format(dhcp_interface))
 
 
 def register(cli):

From 6ceec9a78b60ed6510402a1a8705d1d47f9b9a99 Mon Sep 17 00:00:00 2001
From: Xichen96 <lukelin0907@gmail.com>
Date: Wed, 10 Jan 2024 13:00:01 +0800
Subject: [PATCH 0125/1115] [dhcp_server] add show dhcp server port (#17491)

* add show dhcp_server port
---
 .../cli-plugin-tests/mock_config_db.json      | 12 +++
 .../cli-plugin-tests/test_show_dhcp_server.py | 78 +++++++++++++++++++
 .../cli/show/plugins/show_dhcp_server.py      | 33 ++++++++
 3 files changed, 123 insertions(+)

diff --git a/dockers/docker-dhcp-server/cli-plugin-tests/mock_config_db.json b/dockers/docker-dhcp-server/cli-plugin-tests/mock_config_db.json
index fcc088e8c..6183453af 100644
--- a/dockers/docker-dhcp-server/cli-plugin-tests/mock_config_db.json
+++ b/dockers/docker-dhcp-server/cli-plugin-tests/mock_config_db.json
@@ -44,5 +44,17 @@
     },
     "DHCP_SERVER_IPV4_IP|eth0": {
         "ip": "240.127.1.2"
+    },
+    "DHCP_SERVER_IPV4_PORT|Vlan100|Ethernet4": {
+        "ips": "100.1.1.10,10.1.1.11"
+    },
+    "DHCP_SERVER_IPV4_PORT|Vlan100|Ethernet7": {
+        "ranges": "range1,range2"
+    },
+    "DHCP_SERVER_IPV4_PORT|Vlan200|Ethernet8": {
+        "ranges": "range3,range4"
+    },
+    "DHCP_SERVER_IPV4_PORT|Ethernet9": {
+        "ranges": "range5,range6"
     }
 }
diff --git a/dockers/docker-dhcp-server/cli-plugin-tests/test_show_dhcp_server.py b/dockers/docker-dhcp-server/cli-plugin-tests/test_show_dhcp_server.py
index 348e7f0ed..9fffce6c2 100644
--- a/dockers/docker-dhcp-server/cli-plugin-tests/test_show_dhcp_server.py
+++ b/dockers/docker-dhcp-server/cli-plugin-tests/test_show_dhcp_server.py
@@ -175,3 +175,81 @@ def test_show_dhcp_server_ipv4_option_with_name(self, mock_db):
         result = runner.invoke(show_dhcp_server.dhcp_server.commands["ipv4"].commands["option"], ["option60"], obj=db)
         assert result.exit_code == 0, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
         assert result.stdout == expected_stdout
+
+    def test_show_dhcp_server_ipv4_port_without_intf(self, mock_db):
+        expected_stdout = """\
+Interface          Bind
+-----------------  ----------
+Vlan100|Ethernet4  100.1.1.10
+                   10.1.1.11
+Vlan100|Ethernet7  range1
+                   range2
+Vlan200|Ethernet8  range3
+                   range4
+Ethernet9          range5
+                   range6
+"""
+        runner = CliRunner()
+        db = clicommon.Db()
+        db.db = mock_db
+        result = runner.invoke(show_dhcp_server.dhcp_server.commands["ipv4"].commands["port"], [], obj=db)
+        assert result.exit_code == 0, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
+        assert result.stdout == expected_stdout
+
+    def test_show_dhcp_server_ipv4_port_with_port(self, mock_db):
+        expected_stdout = """\
+Interface          Bind
+-----------------  ------
+Vlan100|Ethernet7  range1
+                   range2
+"""
+        runner = CliRunner()
+        db = clicommon.Db()
+        db.db = mock_db
+        result = runner.invoke(show_dhcp_server.dhcp_server.commands["ipv4"].commands["port"], ["Ethernet7"], obj=db)
+        assert result.exit_code == 0, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
+        assert result.stdout == expected_stdout
+
+    def test_show_dhcp_server_ipv4_port_with_vlan(self, mock_db):
+        expected_stdout = """\
+Interface          Bind
+-----------------  ----------
+Vlan100|Ethernet4  100.1.1.10
+                   10.1.1.11
+Vlan100|Ethernet7  range1
+                   range2
+"""
+        runner = CliRunner()
+        db = clicommon.Db()
+        db.db = mock_db
+        result = runner.invoke(show_dhcp_server.dhcp_server.commands["ipv4"].commands["port"], ["Vlan100"], obj=db)
+        assert result.exit_code == 0, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
+        assert result.stdout == expected_stdout
+
+    def test_show_dhcp_server_ipv4_port_with_port_and_vlan(self, mock_db):
+        expected_stdout = """\
+Interface          Bind
+-----------------  ------
+Vlan200|Ethernet8  range3
+                   range4
+"""
+        runner = CliRunner()
+        db = clicommon.Db()
+        db.db = mock_db
+        result = runner.invoke(show_dhcp_server.dhcp_server.commands["ipv4"].commands["port"], ["Vlan200|Ethernet8"], obj=db)
+        assert result.exit_code == 0, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
+        assert result.stdout == expected_stdout
+
+    def test_show_dhcp_server_ipv4_port_with_single_port(self, mock_db):
+        expected_stdout = """\
+Interface    Bind
+-----------  ------
+Ethernet9    range5
+             range6
+"""
+        runner = CliRunner()
+        db = clicommon.Db()
+        db.db = mock_db
+        result = runner.invoke(show_dhcp_server.dhcp_server.commands["ipv4"].commands["port"], ["Ethernet9"], obj=db)
+        assert result.exit_code == 0, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
+        assert result.stdout == expected_stdout
diff --git a/dockers/docker-dhcp-server/cli/show/plugins/show_dhcp_server.py b/dockers/docker-dhcp-server/cli/show/plugins/show_dhcp_server.py
index 7f68bf055..5afba07bd 100644
--- a/dockers/docker-dhcp-server/cli/show/plugins/show_dhcp_server.py
+++ b/dockers/docker-dhcp-server/cli/show/plugins/show_dhcp_server.py
@@ -5,6 +5,8 @@
 
 import ipaddress
 from datetime import datetime
+import fnmatch
+import re
 
 
 def ts_to_str(ts):
@@ -79,6 +81,17 @@ def range(db, range_name):
     click.echo(tabulate(table, headers=headers))
 
 
+def dhcp_interface_is_match(input_, key):
+    regex = fnmatch.translate(input_)
+    regex = re.compile(regex)
+    if regex.match(key):
+        return True
+    for item in key.split("|"):
+        if regex.match(item):
+            return True
+    return False
+
+
 @ipv4.command()
 @click.argument('dhcp_interface', required=False)
 @click.option('--with_customized_options', default=False, is_flag=True)
@@ -116,5 +129,25 @@ def option(db, option_name):
     click.echo(tabulate(table, headers=headers))
 
 
+@ipv4.command()
+@click.argument('interface', required=False)
+@clicommon.pass_db
+def port(db, interface):
+    if not interface:
+        interface = "*"
+    headers = ["Interface", "Bind"]
+    table = []
+    dbconn = db.db
+    for key in dbconn.keys("CONFIG_DB", "DHCP_SERVER_IPV4_PORT|*"):
+        intf = key[len("DHCP_SERVER_IPV4_PORT|"):]
+        if dhcp_interface_is_match(interface, intf):
+            entry = dbconn.get_all("CONFIG_DB", key)
+            if "ranges" in entry:
+                table.append([intf, entry["ranges"].replace(",", "\n")])
+            if "ips" in entry:
+                table.append([intf, entry["ips"].replace(",", "\n")])
+    click.echo(tabulate(table, headers=headers))
+
+
 def register(cli):
     cli.add_command(dhcp_server)

From 5e3fb7df8ba6e744358694c521bade3c5d841a6e Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Wed, 10 Jan 2024 16:34:14 +0800
Subject: [PATCH 0126/1115] [submodule] Update submodule dhcpmon to the latest
 HEAD automatically (#17730)

#### Why I did it
src/dhcpmon
```
* fc20a97 - (HEAD -> master, origin/master, origin/HEAD) [202311][counter] Clear counter table when dhcpmon init (#14) (2 hours ago) [Yaqiang Zhu]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/dhcpmon | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/dhcpmon b/src/dhcpmon
index bace2e036..fc20a97ba 160000
--- a/src/dhcpmon
+++ b/src/dhcpmon
@@ -1 +1 @@
-Subproject commit bace2e0360b7004ac5e0f4f5dc0efa2615d08614
+Subproject commit fc20a97ba2eba753974ea95d504d130093030596

From 8d1a0ddf0b2c15fef9e444785d0501cf748e7f84 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Wed, 10 Jan 2024 16:34:17 +0800
Subject: [PATCH 0127/1115] [submodule] Update submodule sonic-swss to the
 latest HEAD automatically (#17725)

#### Why I did it
src/sonic-swss
```
* 7702b8a2 - (HEAD -> master, origin/master, origin/HEAD) Add host_tx_ready enhancements (#2930) (10 hours ago) [noaOrMlnx]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-swss | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-swss b/src/sonic-swss
index a0c20c38a..7702b8a2f 160000
--- a/src/sonic-swss
+++ b/src/sonic-swss
@@ -1 +1 @@
-Subproject commit a0c20c38abdae525aa59cd4abf89a06df911261e
+Subproject commit 7702b8a2fb6306cfb61ea970b4498ce8534f0abb

From 4022f95850709a594368599566567ccad88522d9 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Wed, 10 Jan 2024 16:34:21 +0800
Subject: [PATCH 0128/1115] [submodule] Update submodule sonic-mgmt-common to
 the latest HEAD automatically (#17724)

#### Why I did it
src/sonic-mgmt-common
```
* 891413a - (HEAD -> master, origin/master, origin/HEAD) Add 'AppTag' in translib app errors (8 hours ago) [Sachin Holla]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-mgmt-common | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-mgmt-common b/src/sonic-mgmt-common
index 40021f6f9..891413ab9 160000
--- a/src/sonic-mgmt-common
+++ b/src/sonic-mgmt-common
@@ -1 +1 @@
-Subproject commit 40021f6f949bb15f79342da30ca779b68e73747b
+Subproject commit 891413ab9688fca451344852037e99d44e4b192b

From 2e27b116219dbd1bd862d2cff7ed04939c1372a8 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Wed, 10 Jan 2024 16:34:27 +0800
Subject: [PATCH 0129/1115] [submodule] Update submodule sonic-swss-common to
 the latest HEAD automatically (#17410)

#### Why I did it
src/sonic-swss-common
```
* 16bc247 - (HEAD -> master, origin/master, origin/HEAD) [tests] fix binary_data_get unit test (#841) (72 minutes ago) [Yakiv Huryk]
* b2480ad - Add SonicDBConfig::reset method (#843) (4 weeks ago) [ganglv]
* ab3ce86 - [Azp]: Fix azp dash dependency (#842) (5 weeks ago) [Ze Gan]
* 5d1fe2d - add support for binary data read for Table::get() (#836) (5 weeks ago) [Yakiv Huryk]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-swss-common | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-swss-common b/src/sonic-swss-common
index 8dc6218e8..16bc24707 160000
--- a/src/sonic-swss-common
+++ b/src/sonic-swss-common
@@ -1 +1 @@
-Subproject commit 8dc6218e8ebdd7ca6f422fbb525137e346aa0ff0
+Subproject commit 16bc247079adfadf95a90bc12a9e2c9063120766

From 0ecab6cfbca4aefa1e6863ee4ff25e82094fba6b Mon Sep 17 00:00:00 2001
From: Xichen96 <lukelin0907@gmail.com>
Date: Thu, 11 Jan 2024 02:33:05 +0800
Subject: [PATCH 0130/1115] [dhcp_server] add config dhcp_server update
 (#17736)

* add config dhcp_server update
---
 .../test_config_dhcp_server.py                | 82 +++++++++++++++++++
 .../cli/config/plugins/dhcp_server.py         | 44 ++++++++++
 2 files changed, 126 insertions(+)

diff --git a/dockers/docker-dhcp-server/cli-plugin-tests/test_config_dhcp_server.py b/dockers/docker-dhcp-server/cli-plugin-tests/test_config_dhcp_server.py
index 379ad502e..9cc12aa3c 100644
--- a/dockers/docker-dhcp-server/cli-plugin-tests/test_config_dhcp_server.py
+++ b/dockers/docker-dhcp-server/cli-plugin-tests/test_config_dhcp_server.py
@@ -158,3 +158,85 @@ def test_config_dhcp_server_ipv4_disable_does_not_exist(self, mock_db):
         result = runner.invoke(dhcp_server.dhcp_server.commands["ipv4"].commands["disable"], ["Vlan200"], obj=db)
         assert result.exit_code == 2, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
 
+    def test_config_dhcp_server_ipv4_update_does_not_exist(self, mock_db):
+        runner = CliRunner()
+        db = clicommon.Db()
+        db.db = mock_db
+        result = runner.invoke(dhcp_server.dhcp_server.commands["ipv4"].commands["update"], ["Vlan200"], obj=db)
+        assert result.exit_code == 2, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
+
+    def test_config_dhcp_server_ipv4_update_already_exist(self, mock_db):
+        runner = CliRunner()
+        db = clicommon.Db()
+        db.db = mock_db
+        result = runner.invoke(dhcp_server.dhcp_server.commands["ipv4"].commands["update"], ["Vlan100"], obj=db)
+        assert result.exit_code == 0, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
+
+    def test_config_dhcp_server_ipv4_update_wrong_mode(self, mock_db):
+        runner = CliRunner()
+        db = clicommon.Db()
+        db.db = mock_db
+        result = runner.invoke(dhcp_server.dhcp_server.commands["ipv4"].commands["update"], ["Vlan100", "--mode=XX"], obj=db)
+        assert result.exit_code == 2, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
+
+    def test_config_dhcp_server_ipv4_update_lease_time(self, mock_db):
+        runner = CliRunner()
+        db = clicommon.Db()
+        db.db = mock_db
+        result = runner.invoke(dhcp_server.dhcp_server.commands["ipv4"].commands["update"], ["Vlan100", "--lease_time=1800"], obj=db)
+        assert result.exit_code == 0, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
+        assert mock_db.get("CONFIG_DB", "DHCP_SERVER_IPV4|Vlan100", "lease_time") == "1800"
+
+    def test_config_dhcp_server_ipv4_update_wrong_lease_time(self, mock_db):
+        runner = CliRunner()
+        db = clicommon.Db()
+        db.db = mock_db
+        result = runner.invoke(dhcp_server.dhcp_server.commands["ipv4"].commands["update"], ["Vlan100", "--lease_time=-1800"], obj=db)
+        assert result.exit_code == 2, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
+
+    def test_config_dhcp_server_ipv4_update_dup_gw_nm(self, mock_db):
+        runner = CliRunner()
+        db = clicommon.Db()
+        db.db = mock_db
+        result = runner.invoke(dhcp_server.dhcp_server.commands["ipv4"].commands["update"], ["Vlan100", "--dup_gw_nm"], obj=db)
+        assert result.exit_code == 0, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
+        assert mock_db.get("CONFIG_DB", "DHCP_SERVER_IPV4|Vlan100", "gateway") == "100.1.1.1"
+        assert mock_db.get("CONFIG_DB", "DHCP_SERVER_IPV4|Vlan100", "netmask") == "255.255.255.0"
+
+    def test_config_dhcp_server_ipv4_update_dup_gw_nm_no_data(self, mock_db):
+        runner = CliRunner()
+        db = clicommon.Db()
+        db.db = mock_db
+        result = runner.invoke(dhcp_server.dhcp_server.commands["ipv4"].commands["update"], ["Vlan300", "--dup_gw_nm"], obj=db)
+        assert result.exit_code == 2, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
+
+    def test_config_dhcp_server_ipv4_update_gateway(self, mock_db):
+        runner = CliRunner()
+        db = clicommon.Db()
+        db.db = mock_db
+        result = runner.invoke(dhcp_server.dhcp_server.commands["ipv4"].commands["update"], ["Vlan100", "--gateway=100.1.1.9"], obj=db)
+        assert result.exit_code == 0, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
+        assert mock_db.get("CONFIG_DB", "DHCP_SERVER_IPV4|Vlan100", "gateway") == "100.1.1.9"
+
+    def test_config_dhcp_server_ipv4_update_wrong_gateway(self, mock_db):
+        runner = CliRunner()
+        db = clicommon.Db()
+        db.db = mock_db
+        result = runner.invoke(dhcp_server.dhcp_server.commands["ipv4"].commands["update"], ["Vlan100", "--gateway=100.1.9"], obj=db)
+        assert result.exit_code == 2, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
+
+    def test_config_dhcp_server_ipv4_update_netmask(self, mock_db):
+        runner = CliRunner()
+        db = clicommon.Db()
+        db.db = mock_db
+        result = runner.invoke(dhcp_server.dhcp_server.commands["ipv4"].commands["update"], ["Vlan100", "--netmask=255.255.254.0"], obj=db)
+        assert result.exit_code == 0, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
+        assert mock_db.get("CONFIG_DB", "DHCP_SERVER_IPV4|Vlan100", "netmask") == "255.255.254.0"
+
+    def test_config_dhcp_server_ipv4_update_wrong_netmask(self, mock_db):
+        runner = CliRunner()
+        db = clicommon.Db()
+        db.db = mock_db
+        result = runner.invoke(dhcp_server.dhcp_server.commands["ipv4"].commands["update"], ["Vlan100", "--netmask=255.255.254"], obj=db)
+        assert result.exit_code == 2, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
+
diff --git a/dockers/docker-dhcp-server/cli/config/plugins/dhcp_server.py b/dockers/docker-dhcp-server/cli/config/plugins/dhcp_server.py
index 43d7fd5c8..9abd5a275 100644
--- a/dockers/docker-dhcp-server/cli/config/plugins/dhcp_server.py
+++ b/dockers/docker-dhcp-server/cli/config/plugins/dhcp_server.py
@@ -116,6 +116,50 @@ def dhcp_server_ipv4_del(db, dhcp_interface):
         ctx.fail("Dhcp interface {} does not exist in config db".format(dhcp_interface))
 
 
+@dhcp_server_ipv4.command(name="update")
+@click.argument("dhcp_interface", required=True)
+@click.option("--mode", required=False)
+@click.option("--lease_time", required=False)
+@click.option("--dup_gw_nm", required=False, default=False, is_flag=True)
+@click.option("--gateway", required=False)
+@click.option("--netmask", required=False)
+@clicommon.pass_db
+def dhcp_server_ipv4_update(db, mode, lease_time, dup_gw_nm, gateway, netmask, dhcp_interface):
+    ctx = click.get_current_context()
+    dbconn = db.db
+    key = "DHCP_SERVER_IPV4|" + dhcp_interface
+    if not dbconn.exists("CONFIG_DB", key):
+        ctx.fail("Dhcp interface {} does not exist in config db".format(dhcp_interface))
+    if mode:
+        if mode != "PORT":
+            ctx.fail("Only mode PORT is supported")
+        else:
+            dbconn.set("CONFIG_DB", key, "mode", mode)
+    if lease_time:
+        if not validate_str_type("uint32", lease_time):
+            ctx.fail("lease_time is required and must be nonnegative integer")
+        else:
+            dbconn.set("CONFIG_DB", key, "lease_time", lease_time)
+    if dup_gw_nm:
+        dup_success = False
+        for key in dbconn.keys("CONFIG_DB", "VLAN_INTERFACE|" + dhcp_interface + "|*"):
+            intf = ipaddress.ip_interface(key.split("|")[2])
+            if intf.version != 4:
+                continue
+            dup_success = True
+            gateway, netmask = str(intf.ip), str(intf.netmask)
+        if not dup_success:
+            ctx.fail("failed to found gateway and netmask for Vlan interface {}".format(dhcp_interface))
+    elif gateway and not validate_str_type("ipv4-address", gateway):
+        ctx.fail("gateway must be valid ipv4 string")
+    elif netmask and not validate_str_type("ipv4-address", netmask):
+        ctx.fail("netmask must be valid ipv4 string")
+    if gateway:
+        dbconn.set("CONFIG_DB", key, "gateway", gateway)
+    if netmask:
+        dbconn.set("CONFIG_DB", key, "netmask", netmask)
+
+
 @dhcp_server_ipv4.command(name="enable")
 @click.argument("dhcp_interface", required=True)
 @clicommon.pass_db

From 24e995024b6638a34cf7acf3269fb667b19dabed Mon Sep 17 00:00:00 2001
From: Xichen96 <lukelin0907@gmail.com>
Date: Thu, 11 Jan 2024 02:34:22 +0800
Subject: [PATCH 0131/1115] [dhcp_server] improve show dhcp server output
 (#17734)

* fix show dhcp_server semantics
* show dhcp_server table format
---
 .../cli-plugin-tests/test_show_dhcp_server.py | 184 +++++++++++-------
 .../cli/show/plugins/show_dhcp_server.py      |  30 +--
 2 files changed, 124 insertions(+), 90 deletions(-)

diff --git a/dockers/docker-dhcp-server/cli-plugin-tests/test_show_dhcp_server.py b/dockers/docker-dhcp-server/cli-plugin-tests/test_show_dhcp_server.py
index 9fffce6c2..1373dfe0b 100644
--- a/dockers/docker-dhcp-server/cli-plugin-tests/test_show_dhcp_server.py
+++ b/dockers/docker-dhcp-server/cli-plugin-tests/test_show_dhcp_server.py
@@ -16,11 +16,15 @@ def test_plugin_registration(self):
 
     def test_show_dhcp_server_ipv4_lease_without_dhcpintf(self, mock_db):
         expected_stdout = """\
-Interface            MAC Address        IP           Lease Start          Lease End
--------------------  -----------------  -----------  -------------------  -------------------
-Vlan1000|Ethernet10  10:70:fd:b6:13:00  192.168.0.1  2023-03-01 03:16:21  2023-03-01 03:31:21
-Vlan1000|Ethernet11  10:70:fd:b6:13:01  192.168.0.2  2023-03-01 03:16:21  2023-03-01 03:31:21
-Vlan1001|<Unknown>   10:70:fd:b6:13:02  192.168.0.3  2023-03-01 03:16:21  2023-03-01 03:31:21
++---------------------+-------------------+-------------+---------------------+---------------------+
+| Interface           | MAC Address       | IP          | Lease Start         | Lease End           |
++=====================+===================+=============+=====================+=====================+
+| Vlan1000|Ethernet10 | 10:70:fd:b6:13:00 | 192.168.0.1 | 2023-03-01 03:16:21 | 2023-03-01 03:31:21 |
++---------------------+-------------------+-------------+---------------------+---------------------+
+| Vlan1000|Ethernet11 | 10:70:fd:b6:13:01 | 192.168.0.2 | 2023-03-01 03:16:21 | 2023-03-01 03:31:21 |
++---------------------+-------------------+-------------+---------------------+---------------------+
+| Vlan1001|<Unknown>  | 10:70:fd:b6:13:02 | 192.168.0.3 | 2023-03-01 03:16:21 | 2023-03-01 03:31:21 |
++---------------------+-------------------+-------------+---------------------+---------------------+
 """
         runner = CliRunner()
         db = clicommon.Db()
@@ -31,10 +35,13 @@ def test_show_dhcp_server_ipv4_lease_without_dhcpintf(self, mock_db):
 
     def test_show_dhcp_server_ipv4_lease_with_dhcpintf(self, mock_db):
         expected_stdout = """\
-Interface            MAC Address        IP           Lease Start          Lease End
--------------------  -----------------  -----------  -------------------  -------------------
-Vlan1000|Ethernet10  10:70:fd:b6:13:00  192.168.0.1  2023-03-01 03:16:21  2023-03-01 03:31:21
-Vlan1000|Ethernet11  10:70:fd:b6:13:01  192.168.0.2  2023-03-01 03:16:21  2023-03-01 03:31:21
++---------------------+-------------------+-------------+---------------------+---------------------+
+| Interface           | MAC Address       | IP          | Lease Start         | Lease End           |
++=====================+===================+=============+=====================+=====================+
+| Vlan1000|Ethernet10 | 10:70:fd:b6:13:00 | 192.168.0.1 | 2023-03-01 03:16:21 | 2023-03-01 03:31:21 |
++---------------------+-------------------+-------------+---------------------+---------------------+
+| Vlan1000|Ethernet11 | 10:70:fd:b6:13:01 | 192.168.0.2 | 2023-03-01 03:16:21 | 2023-03-01 03:31:21 |
++---------------------+-------------------+-------------+---------------------+---------------------+
 """
         runner = CliRunner()
         db = clicommon.Db()
@@ -45,9 +52,11 @@ def test_show_dhcp_server_ipv4_lease_with_dhcpintf(self, mock_db):
 
     def test_show_dhcp_server_ipv4_lease_client_not_in_fdb(self, mock_db):
         expected_stdout = """\
-Interface           MAC Address        IP           Lease Start          Lease End
-------------------  -----------------  -----------  -------------------  -------------------
-Vlan1001|<Unknown>  10:70:fd:b6:13:02  192.168.0.3  2023-03-01 03:16:21  2023-03-01 03:31:21
++--------------------+-------------------+-------------+---------------------+---------------------+
+| Interface          | MAC Address       | IP          | Lease Start         | Lease End           |
++====================+===================+=============+=====================+=====================+
+| Vlan1001|<Unknown> | 10:70:fd:b6:13:02 | 192.168.0.3 | 2023-03-01 03:16:21 | 2023-03-01 03:31:21 |
++--------------------+-------------------+-------------+---------------------+---------------------+
 """
         runner = CliRunner()
         db = clicommon.Db()
@@ -58,11 +67,15 @@ def test_show_dhcp_server_ipv4_lease_client_not_in_fdb(self, mock_db):
 
     def test_show_dhcp_server_ipv4_range_without_name(self, mock_db):
         expected_stdout = """\
-Range    IP Start    IP End      IP Count
--------  ----------  ----------  ----------------------
-range1   100.1.1.3   100.1.1.5   3
-range2   100.1.1.9   100.1.1.8   range value is illegal
-range3   100.1.1.10  100.1.1.10  1
++---------+------------+------------+------------------------+
+| Range   | IP Start   | IP End     | IP Count               |
++=========+============+============+========================+
+| range1  | 100.1.1.3  | 100.1.1.5  | 3                      |
++---------+------------+------------+------------------------+
+| range2  | 100.1.1.9  | 100.1.1.8  | range value is illegal |
++---------+------------+------------+------------------------+
+| range3  | 100.1.1.10 | 100.1.1.10 | 1                      |
++---------+------------+------------+------------------------+
 """
         runner = CliRunner()
         db = clicommon.Db()
@@ -73,9 +86,11 @@ def test_show_dhcp_server_ipv4_range_without_name(self, mock_db):
 
     def test_show_dhcp_server_ipv4_range_with_name(self, mock_db):
         expected_stdout = """\
-Range    IP Start    IP End       IP Count
--------  ----------  ---------  ----------
-range1   100.1.1.3   100.1.1.5           3
++---------+------------+-----------+------------+
+| Range   | IP Start   | IP End    |   IP Count |
++=========+============+===========+============+
+| range1  | 100.1.1.3  | 100.1.1.5 |          3 |
++---------+------------+-----------+------------+
 """
         runner = CliRunner()
         db = clicommon.Db()
@@ -86,9 +101,11 @@ def test_show_dhcp_server_ipv4_range_with_name(self, mock_db):
 
     def test_show_dhcp_server_ipv4_range_wrong_data(self, mock_db):
         expected_stdout = """\
-Range    IP Start    IP End     IP Count
--------  ----------  ---------  ----------------------
-range2   100.1.1.9   100.1.1.8  range value is illegal
++---------+------------+-----------+------------------------+
+| Range   | IP Start   | IP End    | IP Count               |
++=========+============+===========+========================+
+| range2  | 100.1.1.9  | 100.1.1.8 | range value is illegal |
++---------+------------+-----------+------------------------+
 """
         runner = CliRunner()
         db = clicommon.Db()
@@ -99,9 +116,11 @@ def test_show_dhcp_server_ipv4_range_wrong_data(self, mock_db):
 
     def test_show_dhcp_server_ipv4_range_single_ip(self, mock_db):
         expected_stdout = """\
-Range    IP Start    IP End        IP Count
--------  ----------  ----------  ----------
-range3   100.1.1.10  100.1.1.10           1
++---------+------------+------------+------------+
+| Range   | IP Start   | IP End     |   IP Count |
++=========+============+============+============+
+| range3  | 100.1.1.10 | 100.1.1.10 |          1 |
++---------+------------+------------+------------+
 """
         runner = CliRunner()
         db = clicommon.Db()
@@ -112,10 +131,13 @@ def test_show_dhcp_server_ipv4_range_single_ip(self, mock_db):
 
     def test_show_dhcp_server_ipv4_info_without_intf(self, mock_db):
         expected_stdout = """\
-Interface    Mode    Gateway    Netmask          Lease Time(s)  State
------------  ------  ---------  -------------  ---------------  --------
-Vlan100      PORT    100.1.1.1  255.255.255.0             3600  enabled
-Vlan300      PORT    100.1.1.1  255.255.255.0             3600  disabled
++-------------+--------+-----------+---------------+-----------------+----------+
+| Interface   | Mode   | Gateway   | Netmask       |   Lease Time(s) | State    |
++=============+========+===========+===============+=================+==========+
+| Vlan100     | PORT   | 100.1.1.1 | 255.255.255.0 |            3600 | enabled  |
++-------------+--------+-----------+---------------+-----------------+----------+
+| Vlan300     | PORT   | 100.1.1.1 | 255.255.255.0 |            3600 | disabled |
++-------------+--------+-----------+---------------+-----------------+----------+
 """
         runner = CliRunner()
         db = clicommon.Db()
@@ -126,9 +148,11 @@ def test_show_dhcp_server_ipv4_info_without_intf(self, mock_db):
 
     def test_show_dhcp_server_ipv4_info_with_intf(self, mock_db):
         expected_stdout = """\
-Interface    Mode    Gateway    Netmask          Lease Time(s)  State
------------  ------  ---------  -------------  ---------------  -------
-Vlan100      PORT    100.1.1.1  255.255.255.0             3600  enabled
++-------------+--------+-----------+---------------+-----------------+---------+
+| Interface   | Mode   | Gateway   | Netmask       |   Lease Time(s) | State   |
++=============+========+===========+===============+=================+=========+
+| Vlan100     | PORT   | 100.1.1.1 | 255.255.255.0 |            3600 | enabled |
++-------------+--------+-----------+---------------+-----------------+---------+
 """
         runner = CliRunner()
         db = clicommon.Db()
@@ -139,9 +163,11 @@ def test_show_dhcp_server_ipv4_info_with_intf(self, mock_db):
 
     def test_show_dhcp_server_ipv4_info_with_customized_options(self, mock_db):
         expected_stdout = """\
-Interface    Mode    Gateway    Netmask          Lease Time(s)  State    Customized Options
------------  ------  ---------  -------------  ---------------  -------  --------------------
-Vlan100      PORT    100.1.1.1  255.255.255.0             3600  enabled  option60
++-------------+--------+-----------+---------------+-----------------+---------+----------------------+
+| Interface   | Mode   | Gateway   | Netmask       |   Lease Time(s) | State   | Customized Options   |
++=============+========+===========+===============+=================+=========+======================+
+| Vlan100     | PORT   | 100.1.1.1 | 255.255.255.0 |            3600 | enabled | option60             |
++-------------+--------+-----------+---------------+-----------------+---------+----------------------+
 """
         runner = CliRunner()
         db = clicommon.Db()
@@ -152,9 +178,11 @@ def test_show_dhcp_server_ipv4_info_with_customized_options(self, mock_db):
 
     def test_show_dhcp_server_ipv4_option_without_name(self, mock_db):
         expected_stdout = """\
-Option Name      Option ID  Value        Type
--------------  -----------  -----------  ------
-option60                60  dummy_value  string
++---------------+-------------+-------------+--------+
+| Option Name   |   Option ID | Value       | Type   |
++===============+=============+=============+========+
+| option60      |          60 | dummy_value | string |
++---------------+-------------+-------------+--------+
 """
         runner = CliRunner()
         db = clicommon.Db()
@@ -165,9 +193,11 @@ def test_show_dhcp_server_ipv4_option_without_name(self, mock_db):
 
     def test_show_dhcp_server_ipv4_option_with_name(self, mock_db):
         expected_stdout = """\
-Option Name      Option ID  Value        Type
--------------  -----------  -----------  ------
-option60                60  dummy_value  string
++---------------+-------------+-------------+--------+
+| Option Name   |   Option ID | Value       | Type   |
++===============+=============+=============+========+
+| option60      |          60 | dummy_value | string |
++---------------+-------------+-------------+--------+
 """
         runner = CliRunner()
         db = clicommon.Db()
@@ -178,16 +208,21 @@ def test_show_dhcp_server_ipv4_option_with_name(self, mock_db):
 
     def test_show_dhcp_server_ipv4_port_without_intf(self, mock_db):
         expected_stdout = """\
-Interface          Bind
------------------  ----------
-Vlan100|Ethernet4  100.1.1.10
-                   10.1.1.11
-Vlan100|Ethernet7  range1
-                   range2
-Vlan200|Ethernet8  range3
-                   range4
-Ethernet9          range5
-                   range6
++-------------------+------------+
+| Interface         | Bind       |
++===================+============+
+| Vlan100|Ethernet4 | 100.1.1.10 |
+|                   | 10.1.1.11  |
++-------------------+------------+
+| Vlan100|Ethernet7 | range1     |
+|                   | range2     |
++-------------------+------------+
+| Vlan200|Ethernet8 | range3     |
+|                   | range4     |
++-------------------+------------+
+| Ethernet9         | range5     |
+|                   | range6     |
++-------------------+------------+
 """
         runner = CliRunner()
         db = clicommon.Db()
@@ -198,10 +233,12 @@ def test_show_dhcp_server_ipv4_port_without_intf(self, mock_db):
 
     def test_show_dhcp_server_ipv4_port_with_port(self, mock_db):
         expected_stdout = """\
-Interface          Bind
------------------  ------
-Vlan100|Ethernet7  range1
-                   range2
++-------------------+--------+
+| Interface         | Bind   |
++===================+========+
+| Vlan100|Ethernet7 | range1 |
+|                   | range2 |
++-------------------+--------+
 """
         runner = CliRunner()
         db = clicommon.Db()
@@ -212,12 +249,15 @@ def test_show_dhcp_server_ipv4_port_with_port(self, mock_db):
 
     def test_show_dhcp_server_ipv4_port_with_vlan(self, mock_db):
         expected_stdout = """\
-Interface          Bind
------------------  ----------
-Vlan100|Ethernet4  100.1.1.10
-                   10.1.1.11
-Vlan100|Ethernet7  range1
-                   range2
++-------------------+------------+
+| Interface         | Bind       |
++===================+============+
+| Vlan100|Ethernet4 | 100.1.1.10 |
+|                   | 10.1.1.11  |
++-------------------+------------+
+| Vlan100|Ethernet7 | range1     |
+|                   | range2     |
++-------------------+------------+
 """
         runner = CliRunner()
         db = clicommon.Db()
@@ -228,10 +268,12 @@ def test_show_dhcp_server_ipv4_port_with_vlan(self, mock_db):
 
     def test_show_dhcp_server_ipv4_port_with_port_and_vlan(self, mock_db):
         expected_stdout = """\
-Interface          Bind
------------------  ------
-Vlan200|Ethernet8  range3
-                   range4
++-------------------+--------+
+| Interface         | Bind   |
++===================+========+
+| Vlan200|Ethernet8 | range3 |
+|                   | range4 |
++-------------------+--------+
 """
         runner = CliRunner()
         db = clicommon.Db()
@@ -242,10 +284,12 @@ def test_show_dhcp_server_ipv4_port_with_port_and_vlan(self, mock_db):
 
     def test_show_dhcp_server_ipv4_port_with_single_port(self, mock_db):
         expected_stdout = """\
-Interface    Bind
------------  ------
-Ethernet9    range5
-             range6
++-------------+--------+
+| Interface   | Bind   |
++=============+========+
+| Ethernet9   | range5 |
+|             | range6 |
++-------------+--------+
 """
         runner = CliRunner()
         db = clicommon.Db()
diff --git a/dockers/docker-dhcp-server/cli/show/plugins/show_dhcp_server.py b/dockers/docker-dhcp-server/cli/show/plugins/show_dhcp_server.py
index 5afba07bd..50b6586ca 100644
--- a/dockers/docker-dhcp-server/cli/show/plugins/show_dhcp_server.py
+++ b/dockers/docker-dhcp-server/cli/show/plugins/show_dhcp_server.py
@@ -30,11 +30,9 @@ def ipv4():
 
 
 @ipv4.command()
-@click.argument('dhcp_interface', required=False)
+@click.argument('dhcp_interface', required=False, default="*")
 @clicommon.pass_db
 def lease(db, dhcp_interface):
-    if not dhcp_interface:
-        dhcp_interface = "*"
     headers = ["Interface", "MAC Address", "IP", "Lease Start", "Lease End"]
     table = []
     dbconn = db.db
@@ -45,7 +43,7 @@ def lease(db, dhcp_interface):
         if not port:
             port = "<Unknown>"
         table.append([interface + "|" + port, mac, entry["ip"], ts_to_str(entry["lease_start"]), ts_to_str(entry["lease_end"])])
-    click.echo(tabulate(table, headers=headers))
+    click.echo(tabulate(table, headers=headers, tablefmt="grid"))
 
 
 def count_ipv4(start, end):
@@ -55,11 +53,9 @@ def count_ipv4(start, end):
 
 
 @ipv4.command()
-@click.argument('range_name', required=False)
+@click.argument('range_name', required=False, default="*")
 @clicommon.pass_db
 def range(db, range_name):
-    if not range_name:
-        range_name = "*"
     headers = ["Range", "IP Start", "IP End", "IP Count"]
     table = []
     dbconn = db.db
@@ -78,7 +74,7 @@ def range(db, range_name):
         if count < 1:
             count = "range value is illegal"
         table.append([name, start, end, count])
-    click.echo(tabulate(table, headers=headers))
+    click.echo(tabulate(table, headers=headers, tablefmt="grid"))
 
 
 def dhcp_interface_is_match(input_, key):
@@ -93,12 +89,10 @@ def dhcp_interface_is_match(input_, key):
 
 
 @ipv4.command()
-@click.argument('dhcp_interface', required=False)
+@click.argument('dhcp_interface', required=False, default="*")
 @click.option('--with_customized_options', default=False, is_flag=True)
 @clicommon.pass_db
 def info(db, dhcp_interface, with_customized_options):
-    if not dhcp_interface:
-        dhcp_interface = "*"
     headers = ["Interface", "Mode", "Gateway", "Netmask", "Lease Time(s)", "State"]
     if with_customized_options:
         headers.append("Customized Options")
@@ -110,15 +104,13 @@ def info(db, dhcp_interface, with_customized_options):
         table.append([interface, entry["mode"], entry["gateway"], entry["netmask"], entry["lease_time"], entry["state"]])
         if with_customized_options:
             table[-1].append(entry["customized_options"])
-    click.echo(tabulate(table, headers=headers))
+    click.echo(tabulate(table, headers=headers, tablefmt="grid"))
 
 
 @ipv4.command()
-@click.argument("option_name", required=False)
+@click.argument("option_name", required=False, default="*")
 @clicommon.pass_db
 def option(db, option_name):
-    if not option_name:
-        option_name = "*"
     headers = ["Option Name", "Option ID", "Value", "Type"]
     table = []
     dbconn = db.db
@@ -126,15 +118,13 @@ def option(db, option_name):
         entry = dbconn.get_all("CONFIG_DB", key)
         name = key.split("|")[1]
         table.append([name, entry["id"], entry["value"], entry["type"]])
-    click.echo(tabulate(table, headers=headers))
+    click.echo(tabulate(table, headers=headers, tablefmt="grid"))
 
 
 @ipv4.command()
-@click.argument('interface', required=False)
+@click.argument('interface', required=False, default="*")
 @clicommon.pass_db
 def port(db, interface):
-    if not interface:
-        interface = "*"
     headers = ["Interface", "Bind"]
     table = []
     dbconn = db.db
@@ -146,7 +136,7 @@ def port(db, interface):
                 table.append([intf, entry["ranges"].replace(",", "\n")])
             if "ips" in entry:
                 table.append([intf, entry["ips"].replace(",", "\n")])
-    click.echo(tabulate(table, headers=headers))
+    click.echo(tabulate(table, headers=headers, tablefmt="grid"))
 
 
 def register(cli):

From eb70bff4b703decc9b2dbf25638570955e4f2482 Mon Sep 17 00:00:00 2001
From: Lawrence Lee <lawlee@microsoft.com>
Date: Wed, 10 Jan 2024 14:40:15 -0800
Subject: [PATCH 0132/1115] add timeout to ping6 command (#17729)

Signed-off-by: Lawrence Lee <lawlee@microsoft.com>
---
 files/scripts/arp_update | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/files/scripts/arp_update b/files/scripts/arp_update
index f402d53dc..7fd5667bc 100755
--- a/files/scripts/arp_update
+++ b/files/scripts/arp_update
@@ -68,7 +68,7 @@ while /bin/true; do
 
   ALL_INTERFACE="$INTERFACE $PC_INTERFACE $VLAN_SUB_INTERFACE"
   for intf in $ALL_INTERFACE; do
-      ping6cmd="ping6 -I $intf -n -q -i 0 -c 1 -W 0 ff02::1 >/dev/null"
+      ping6cmd="timeout 0.2 ping6 -I $intf -n -q -i 0 -c 1 -W 0 ff02::1 >/dev/null"
       intf_up=$(ip link show $intf | grep "state UP")
       if [[ -n "$intf_up" ]]; then
           eval $ping6cmd

From 677adb55451a7ed50114636fe1e5c0e491177a57 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Thu, 11 Jan 2024 14:35:08 +0800
Subject: [PATCH 0133/1115] [submodule] Update submodule sonic-mgmt-framework
 to the latest HEAD automatically (#17753)

#### Why I did it
src/sonic-mgmt-framework
```
* ca0656c - (HEAD -> master, origin/master, origin/HEAD) remove tls cipher suite settings (#127) (12 hours ago) [Mai Bui]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-mgmt-framework | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-mgmt-framework b/src/sonic-mgmt-framework
index 99cbc4804..ca0656ca2 160000
--- a/src/sonic-mgmt-framework
+++ b/src/sonic-mgmt-framework
@@ -1 +1 @@
-Subproject commit 99cbc4804ba5fa18adcf6a29271fc58a769e174d
+Subproject commit ca0656ca2f1a982133ed7b69982de1f79a1213c9

From cbd44e1ac487c93c814e6428afc62f67e1167e6b Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Thu, 11 Jan 2024 14:35:12 +0800
Subject: [PATCH 0134/1115] [submodule] Update submodule sonic-mgmt-common to
 the latest HEAD automatically (#17751)

#### Why I did it
src/sonic-mgmt-common
```
* 9a12683 - (HEAD -> master, origin/master, origin/HEAD) Made following APIs TABLE List name agnostic. 1. sortDepTables 2. GetOrderedDepTables 3. GetOrderedTables Also fixed following issues in the above APIs 1. Missing Nodes(toposort) when Table has multiple lists. 2. Inconsistent comparison (few places list names where compared with    table name) 3. Inconsistent I/O. These functions were designed to work on Lists but    it accepted table names and due to which inconsistent results were    observed. Fixed the behavior the I/O is always TABLE NAME but    internally it gets converted to LIST and processed. It is done    because there is a possibility of having an dependency between TABLE    LIST. 4. Optimise the code. (9 hours ago) [Mohammed Faraaz]
* 7795bbb - CVL Infra Enhancments and Fixes (9 hours ago) [Mohammed Faraaz]
* 2bb6dbc - CVL Infra Enhancments and Fixes (9 hours ago) [Mohammed Faraaz]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-mgmt-common | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-mgmt-common b/src/sonic-mgmt-common
index 891413ab9..9a1268344 160000
--- a/src/sonic-mgmt-common
+++ b/src/sonic-mgmt-common
@@ -1 +1 @@
-Subproject commit 891413ab9688fca451344852037e99d44e4b192b
+Subproject commit 9a126834441ca6a203cff901416258a1ab961b1f

From 3974a3459e146ea0c71c43619d46903e37e816c0 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Thu, 11 Jan 2024 16:34:47 +0800
Subject: [PATCH 0135/1115] [submodule] Update submodule sonic-gnmi to the
 latest HEAD automatically (#17557)

#### Why I did it
src/sonic-gnmi
```
* 752f1fc - (HEAD -> master, origin/master, origin/HEAD) Use swsscommon API to read database configuration (#176) (3 weeks ago) [ganglv]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-gnmi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-gnmi b/src/sonic-gnmi
index 88e82d4bc..752f1fcef 160000
--- a/src/sonic-gnmi
+++ b/src/sonic-gnmi
@@ -1 +1 @@
-Subproject commit 88e82d4bc40658bc100a9a0508b1d1289a924a61
+Subproject commit 752f1fceffa2d8fa7138638dd49c2d0aec96bc7b

From 843958fe6ecac13fa4bef2ef784352cd96b13e4f Mon Sep 17 00:00:00 2001
From: Feng-msft <fenpan@microsoft.com>
Date: Fri, 12 Jan 2024 10:51:48 +0800
Subject: [PATCH 0136/1115] Fix dialout build flag issue. (#17715)

### Why I did it
Fix ENABLE_DIALOUT flag issue.

##### Work item tracking
- Microsoft ADO **(number only)**: 21326000

#### How I did it
Update Makefile.work and add debug string.

#### How to verify it
![image](https://github.com/sonic-net/sonic-buildimage/assets/97083744/960d75d1-618c-4734-acb5-7a32a28c262b)
---
 Makefile.work | 4 ++++
 slave.mk      | 1 +
 2 files changed, 5 insertions(+)

diff --git a/Makefile.work b/Makefile.work
index e678791d5..a9f74d4fe 100644
--- a/Makefile.work
+++ b/Makefile.work
@@ -40,6 +40,9 @@
 #  * ENABLE_NATIVE_WRITE: Enable native write/config operations via the gNMI interface.
 #  *                 Default: unset
 #  *                 Values: y
+#  * ENABLE_DIALOUT: Enable dialout client in telemetry.
+#  *                 Default: unset
+#  *                 Values: y
 #  * SONIC_DPKG_CACHE_METHOD: Specifying method of obtaining the Debian packages from cache: none or cache
 #  * SONIC_DPKG_CACHE_SOURCE: Debian package cache location when cache enabled for debian packages
 #  * BUILD_LOG_TIMESTAMP: Set timestamp in the build log (simple/none)
@@ -560,6 +563,7 @@ SONIC_BUILD_INSTRUCTION :=  $(MAKE) \
                            SONIC_INCLUDE_MUX=$(INCLUDE_MUX) \
                            ENABLE_TRANSLIB_WRITE=$(ENABLE_TRANSLIB_WRITE) \
                            ENABLE_NATIVE_WRITE=$(ENABLE_NATIVE_WRITE) \
+			   ENABLE_DIALOUT=$(ENABLE_DIALOUT) \
                            EXTRA_DOCKER_TARGETS=$(EXTRA_DOCKER_TARGETS) \
                            BUILD_LOG_TIMESTAMP=$(BUILD_LOG_TIMESTAMP) \
                            SONIC_ENABLE_IMAGE_SIGNATURE=$(ENABLE_IMAGE_SIGNATURE) \
diff --git a/slave.mk b/slave.mk
index c8dc936b1..bb62d963b 100644
--- a/slave.mk
+++ b/slave.mk
@@ -441,6 +441,7 @@ $(info "ENABLE_BOOTCHART                 : "$(ENABLE_BOOTCHART)")
 $(info "INCLUDE_FIPS"             : "$(INCLUDE_FIPS)")
 $(info "ENABLE_TRANSLIB_WRITE"           : "$(ENABLE_TRANSLIB_WRITE)")
 $(info "ENABLE_NATIVE_WRITE"             : "$(ENABLE_NATIVE_WRITE)")
+$(info "ENABLE_DIALOUT"                  : "$(ENABLE_DIALOUT)")
 $(info "ENABLE_AUTO_TECH_SUPPORT"        : "$(ENABLE_AUTO_TECH_SUPPORT)")
 $(info "PDDF_SUPPORT"                    : "$(PDDF_SUPPORT)")
 $(info "MULTIARCH_QEMU_ENVIRON"          : "$(MULTIARCH_QEMU_ENVIRON)")

From d6e0bf66a6c78e8053590ba434ece7e8c69bd021 Mon Sep 17 00:00:00 2001
From: Liping Xu <108326363+lipxu@users.noreply.github.com>
Date: Fri, 12 Jan 2024 15:26:06 +0800
Subject: [PATCH 0137/1115] disable restapi for leafRouter in slim image
 (#17713)

Why I did it
For some devices with small memory, after upgrading to the latest image, the available memory is not enough.

Work item tracking
Microsoft ADO (number only):
26324242
How I did it
Disable restapi feature for LeafRouter which with slim image.

How to verify it
verified on 7050qx T1 (slim image), restapi disabled
verified on 7050qx T0 (slim image), restapi enabled
verified on 7260 T1 (normal image), restapi enabled
---
 files/build_templates/init_cfg.json.j2 | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/files/build_templates/init_cfg.json.j2 b/files/build_templates/init_cfg.json.j2
index 53091a4a2..b43206332 100644
--- a/files/build_templates/init_cfg.json.j2
+++ b/files/build_templates/init_cfg.json.j2
@@ -51,7 +51,11 @@
 {%- if include_mux == "y" %}{% do features.append(("mux", "{% if 'subtype' in DEVICE_METADATA['localhost'] and DEVICE_METADATA['localhost']['subtype'] == 'DualToR' %}enabled{% else %}always_disabled{% endif %}", false, "enabled")) %}{% endif %}
 {%- if include_nat == "y" %}{% do features.append(("nat", "disabled", false, "enabled")) %}{% endif %}
 {%- if include_p4rt == "y" %}{% do features.append(("p4rt", "disabled", false, "enabled")) %}{% endif %}
-{%- if include_restapi == "y" %}{% do features.append(("restapi", "enabled", false, "enabled")) %}{% endif %}
+{%- if include_restapi == "y" and BUILD_REDUCE_IMAGE_SIZE == "y" and sonic_asic_platform == "broadcom" %}
+    {% do features.append(("restapi", "{% if (DEVICE_METADATA is defined and DEVICE_METADATA['localhost'] is defined and DEVICE_METADATA['localhost']['type'] is defined and DEVICE_METADATA['localhost']['type'] is not in ['LeafRouter', 'BackEndLeafRouter']) %}enabled{% else %}disabled{% endif %}", false, "enabled")) %}
+{%- elif include_restapi == "y" %}
+    {% do features.append(("restapi", "enabled", false, "enabled")) %}
+{%- endif %}
 {%- if include_sflow == "y" %}{% do features.append(("sflow", "disabled", true, "enabled")) %}{% endif %}
 {%- if include_macsec == "y" %}{% do features.append(("macsec", "{% if 'type' in DEVICE_METADATA['localhost'] and DEVICE_METADATA['localhost']['type'] == 'SpineRouter' and DEVICE_RUNTIME_METADATA['MACSEC_SUPPORTED'] %}enabled{% else %}disabled{% endif %}", false, "enabled")) %}{% endif %}
 {%- if include_system_gnmi == "y" %}{% do features.append(("gnmi", "enabled", true, "enabled")) %}{% endif %}

From bc0b122f7b34e8e8b785f0025995edb2743e328a Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Fri, 12 Jan 2024 16:34:30 +0800
Subject: [PATCH 0138/1115] [submodule] Update submodule sonic-swss-common to
 the latest HEAD automatically (#17760)

#### Why I did it
src/sonic-swss-common
```
* b563580 - (HEAD -> master, origin/master, origin/HEAD) Add redisreply.h to swsscommon.i for generate SWIG wrapper (#820) (20 hours ago) [Hua Liu]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-swss-common | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-swss-common b/src/sonic-swss-common
index 16bc24707..b5635800c 160000
--- a/src/sonic-swss-common
+++ b/src/sonic-swss-common
@@ -1 +1 @@
-Subproject commit 16bc247079adfadf95a90bc12a9e2c9063120766
+Subproject commit b5635800ce2eae6d9ee5f9d0141922a7dd52c993

From 62eeaa43ba02569b4661778c84e5100383ec190b Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Fri, 12 Jan 2024 18:35:33 +0800
Subject: [PATCH 0139/1115] [submodule] Update submodule sonic-linux-kernel to
 the latest HEAD automatically (#17758)

#### Why I did it
src/sonic-linux-kernel
```
* ee073d9 - (HEAD -> master, origin/master, origin/HEAD) [Marvell-arm64] Enable CONFIG_ARM_SMC_WATCHDOG (#374) (2 hours ago) [Pavan Naregundi]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-linux-kernel | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-linux-kernel b/src/sonic-linux-kernel
index a1d003941..ee073d93c 160000
--- a/src/sonic-linux-kernel
+++ b/src/sonic-linux-kernel
@@ -1 +1 @@
-Subproject commit a1d003941f2ae62bd5a40f265659490639596204
+Subproject commit ee073d93cf726b26470ebb8a6c753025082ae089

From 3e3c7aa09dbaeeef3d129c54b7d1a04581476630 Mon Sep 17 00:00:00 2001
From: Saikrishna Arcot <sarcot@microsoft.com>
Date: Fri, 12 Jan 2024 09:48:26 -0800
Subject: [PATCH 0140/1115] Add Bookworm base and config-engine layers (#17742)

The layers compile for amd64; however, functionality has not been
tested.

Signed-off-by: Saikrishna Arcot <sarcot@microsoft.com>
---
 dockers/docker-base-bookworm/Dockerfile.j2    | 126 ++++++++++++++++++
 dockers/docker-base-bookworm/LICENSE          |  13 ++
 .../docker-base-bookworm/apt-multiple-retries |   4 +
 dockers/docker-base-bookworm/dpkg_01_drop     |  29 ++++
 dockers/docker-base-bookworm/etc/rsyslog.conf |  78 +++++++++++
 .../etc/rsyslog.d/supervisor.conf             |   9 ++
 .../etc/supervisor/supervisord.conf           |  29 ++++
 .../docker-base-bookworm/no-check-valid-until |   4 +
 .../no_install_recommend_suggest              |   5 +
 dockers/docker-base-bookworm/root/.vimrc      |   2 +
 .../00-load-omprog.conf                       |   1 +
 .../Dockerfile.j2                             |  59 ++++++++
 rules/docker-base-bookworm.dep                |   9 ++
 rules/docker-base-bookworm.mk                 |  22 +++
 rules/docker-config-engine-bookworm.dep       |   9 ++
 rules/docker-config-engine-bookworm.mk        |  30 +++++
 16 files changed, 429 insertions(+)
 create mode 100644 dockers/docker-base-bookworm/Dockerfile.j2
 create mode 100644 dockers/docker-base-bookworm/LICENSE
 create mode 100644 dockers/docker-base-bookworm/apt-multiple-retries
 create mode 100644 dockers/docker-base-bookworm/dpkg_01_drop
 create mode 100644 dockers/docker-base-bookworm/etc/rsyslog.conf
 create mode 100644 dockers/docker-base-bookworm/etc/rsyslog.d/supervisor.conf
 create mode 100644 dockers/docker-base-bookworm/etc/supervisor/supervisord.conf
 create mode 100644 dockers/docker-base-bookworm/no-check-valid-until
 create mode 100644 dockers/docker-base-bookworm/no_install_recommend_suggest
 create mode 100644 dockers/docker-base-bookworm/root/.vimrc
 create mode 100644 dockers/docker-config-engine-bookworm/00-load-omprog.conf
 create mode 100644 dockers/docker-config-engine-bookworm/Dockerfile.j2
 create mode 100644 rules/docker-base-bookworm.dep
 create mode 100644 rules/docker-base-bookworm.mk
 create mode 100644 rules/docker-config-engine-bookworm.dep
 create mode 100644 rules/docker-config-engine-bookworm.mk

diff --git a/dockers/docker-base-bookworm/Dockerfile.j2 b/dockers/docker-base-bookworm/Dockerfile.j2
new file mode 100644
index 000000000..cad47da40
--- /dev/null
+++ b/dockers/docker-base-bookworm/Dockerfile.j2
@@ -0,0 +1,126 @@
+{% set prefix = DEFAULT_CONTAINER_REGISTRY %}
+{% from "dockers/dockerfile-macros.j2" import install_debian_packages, install_python_wheels, copy_files %}
+{% if CONFIGURED_ARCH == "armhf" and (MULTIARCH_QEMU_ENVIRON == "y" or CROSS_BUILD_ENVIRON == "y") %}
+FROM {{ prefix }}multiarch/debian-debootstrap:armhf-bookworm
+{% elif CONFIGURED_ARCH == "arm64" and (MULTIARCH_QEMU_ENVIRON == "y" or CROSS_BUILD_ENVIRON == "y") %}
+FROM {{ prefix }}multiarch/debian-debootstrap:arm64-bookworm
+{% else %}
+FROM {{ prefix }}{{DOCKER_BASE_ARCH}}/debian:bookworm
+{% endif %}
+
+# Clean documentation in FROM image
+RUN find /usr/share/doc -depth \( -type f -o -type l \) ! -name copyright | xargs rm || true
+
+# Clean doc directories that are empty or only contain empty directories
+RUN while [ -n "$(find /usr/share/doc -depth -type d -empty -print -exec rmdir {} +)" ]; do :; done && \
+    rm -rf               \
+    /usr/share/man/*     \
+    /usr/share/groff/*   \
+    /usr/share/info/*    \
+    /usr/share/lintian/* \
+    /usr/share/linda/*   \
+    /var/cache/man/*     \
+    /usr/share/locale/*
+
+# Make apt-get non-interactive
+ENV DEBIAN_FRONTEND=noninteractive
+
+# Configure data sources for apt/dpkg
+COPY ["dpkg_01_drop", "/etc/dpkg/dpkg.cfg.d/01_drop"]
+COPY ["sources.list.{{ CONFIGURED_ARCH }}", "/etc/apt/sources.list"]
+COPY ["no_install_recommend_suggest", "/etc/apt/apt.conf.d"]
+COPY ["no-check-valid-until", "/etc/apt/apt.conf.d"]
+COPY ["apt-multiple-retries", "/etc/apt/apt.conf.d"]
+
+# Update apt cache and
+# pre-install fundamental packages
+RUN apt update &&            \
+    apt -y install           \
+        curl                 \
+        less                 \
+        perl                 \
+        procps               \
+        python3              \
+        python3-distutils    \
+        python3-pip          \
+        python3-setuptools   \
+        python3-wheel        \
+        python-is-python3    \
+        vim-tiny             \
+        rsyslog              \
+# Install redis-tools
+        redis-tools          \
+# common dependencies
+        libdaemon0           \
+        libdbus-1-3          \
+        libjansson4          \
+# ip and ifconfig utility missing in docker for arm arch
+        iproute2             \
+        net-tools            \
+# for processing/handling json files in bash environment
+        jq                   \
+# for sairedis zmq rpc channel
+        libzmq5              \
+        libwrap0
+
+# Add a config file to allow pip to install packages outside of apt/the Debian repos
+COPY ["pip.conf", "/etc/pip.conf"]
+
+# Upgrade pip via PyPI and uninstall the Debian version
+RUN pip3 install --upgrade pip
+RUN apt purge -y python3-pip
+
+# For templating
+RUN pip3 install j2cli
+
+# Install supervisor
+RUN pip3 install supervisor==4.2.5
+
+# Add support for supervisord to handle startup dependencies
+RUN pip3 install supervisord-dependent-startup==1.4.0
+
+RUN mkdir -p /var/log/supervisor /etc/supervisor/conf.d
+
+# Install gcc, libc6-dev and python3-dev for compiling python-lzf
+RUN apt-get -y install build-essential libc6-dev python3-dev
+
+# Install python-lzf
+RUN pip3 install 'python-lzf==0.2.4'
+
+# Install rdbtools
+RUN pip3 install 'rdbtools==0.1.15'
+
+# Uninstall gcc, libc6-dev and python3-dev for compiling python-lzf
+RUN apt-get -y purge build-essential libc6-dev python3-dev
+
+# Uninstall unused dependencies
+RUN apt autoremove -y --purge
+
+RUN apt-get -y purge   \
+    exim4              \
+    exim4-base         \
+    exim4-config       \
+    exim4-daemon-light
+
+{% if docker_base_bookworm_debs.strip() -%}
+# Copy locally-built Debian package dependencies
+{{ copy_files("debs/", docker_base_bookworm_debs.split(' '), "/debs/") }}
+
+# Install built Debian packages and implicitly install their dependencies
+{{ install_debian_packages(docker_base_bookworm_debs.split(' ')) }}
+{%- endif %}
+
+# Clean up apt
+# Remove /var/lib/apt/lists/*, could be obsoleted for derived images
+RUN apt-get clean -y                     && \
+    apt-get autoclean -y                 && \
+    apt-get autoremove -y                && \
+    rm -rf /var/lib/apt/lists/* /tmp/* ~/.cache
+
+COPY ["etc/rsyslog.conf", "/etc/rsyslog.conf"]
+COPY ["etc/rsyslog.d/*", "/etc/rsyslog.d/"]
+COPY ["root/.vimrc", "/root/.vimrc"]
+
+RUN ln /usr/bin/vim.tiny /usr/bin/vim
+
+COPY ["etc/supervisor/supervisord.conf", "/etc/supervisor/"]
diff --git a/dockers/docker-base-bookworm/LICENSE b/dockers/docker-base-bookworm/LICENSE
new file mode 100644
index 000000000..03d8f31e5
--- /dev/null
+++ b/dockers/docker-base-bookworm/LICENSE
@@ -0,0 +1,13 @@
+Copyright 2016 Microsoft, Inc.
+
+Licensed under the Apache License, Version 2.0 (the "License");
+you may not use this file except in compliance with the License.
+You may obtain a copy of the License at
+
+    http://www.apache.org/licenses/LICENSE-2.0
+
+Unless required by applicable law or agreed to in writing, software
+distributed under the License is distributed on an "AS IS" BASIS,
+WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+See the License for the specific language governing permissions and
+limitations under the License.
diff --git a/dockers/docker-base-bookworm/apt-multiple-retries b/dockers/docker-base-bookworm/apt-multiple-retries
new file mode 100644
index 000000000..c4c638252
--- /dev/null
+++ b/dockers/docker-base-bookworm/apt-multiple-retries
@@ -0,0 +1,4 @@
+# Instruct apt to retry downloads on failures
+# This is required only for bullseye.
+
+Acquire::Retries "3";
diff --git a/dockers/docker-base-bookworm/dpkg_01_drop b/dockers/docker-base-bookworm/dpkg_01_drop
new file mode 100644
index 000000000..d238f4049
--- /dev/null
+++ b/dockers/docker-base-bookworm/dpkg_01_drop
@@ -0,0 +1,29 @@
+## Drop unnecessary files
+## ref: https://wiki.ubuntu.com/ReducingDiskFootprint
+
+## Documentation
+path-exclude /usr/share/doc/*
+# we need to keep copyright files for legal reasons
+path-include /usr/share/doc/*/copyright
+path-exclude /usr/share/man/*
+path-exclude /usr/share/groff/*
+path-exclude /usr/share/info/*
+# lintian stuff is small, but really unnecessary
+path-exclude /usr/share/lintian/*
+path-exclude /usr/share/linda/*
+
+## Translations
+path-exclude /usr/share/locale/*
+
+## Landscape
+path-exclude /usr/share/pyshared/twisted/test*
+path-exclude /usr/lib/python*/dist-packages/twisted/test*
+path-exclude /usr/share/pyshared/twisted/*/test*
+path-exclude /usr/lib/python*/dist-packages/twisted/*/test*
+
+## install the configuration file if it’s currently missing
+force-confmiss
+## combined with confold: overwrite configuration files that you have not modified
+force-confdef
+## do not modify the current configuration file, the new version is installed with a .dpkg-dist suffix
+force-confold
diff --git a/dockers/docker-base-bookworm/etc/rsyslog.conf b/dockers/docker-base-bookworm/etc/rsyslog.conf
new file mode 100644
index 000000000..7a6667d68
--- /dev/null
+++ b/dockers/docker-base-bookworm/etc/rsyslog.conf
@@ -0,0 +1,78 @@
+#
+#  /etc/rsyslog.conf    Configuration file for rsyslog.
+#
+#                       For more information see
+#                       /usr/share/doc/rsyslog-doc/html/rsyslog_conf.html
+
+
+#################
+#### MODULES ####
+#################
+
+$ModLoad imuxsock # provides support for local system logging
+
+#
+# Set a rate limit on messages from the container
+#
+$SystemLogRateLimitInterval 300
+$SystemLogRateLimitBurst 20000
+
+#$ModLoad imklog  # provides kernel logging support
+#$ModLoad immark  # provides --MARK-- message capability
+
+# provides UDP syslog reception
+#$ModLoad imudp
+#$UDPServerRun 514
+
+# provides TCP syslog reception
+#$ModLoad imtcp
+#$InputTCPServerRun 514
+
+
+###########################
+#### GLOBAL DIRECTIVES ####
+###########################
+
+set $.CONTAINER_NAME=getenv("CONTAINER_NAME");
+
+# Set remote syslog server
+template (name="ForwardFormatInContainer" type="string" string="<%PRI%>%TIMESTAMP:::date-rfc3339% %HOSTNAME% %$.CONTAINER_NAME%#%syslogtag%%msg:::sp-if-no-1st-sp%%msg%")
+*.* action(type="omfwd" target=`echo $SYSLOG_TARGET_IP` port="514" protocol="udp" Template="ForwardFormatInContainer")
+
+#
+# Use traditional timestamp format.
+# To enable high precision timestamps, comment out the following line.
+#
+#$ActionFileDefaultTemplate RSYSLOG_TraditionalFileFormat
+
+# Define a custom template
+$template SONiCFileFormat,"%TIMESTAMP%.%timestamp:::date-subseconds% %HOSTNAME% %syslogseverity-text:::uppercase% %$.CONTAINER_NAME%#%syslogtag%%msg:::sp-if-no-1st-sp%%msg:::drop-last-lf%\n"
+$ActionFileDefaultTemplate SONiCFileFormat
+
+#
+# Set the default permissions for all log files.
+#
+$FileOwner root
+$FileGroup adm
+$FileCreateMode 0640
+$DirCreateMode 0755
+$Umask 0022
+
+#
+# Where to place spool and state files
+#
+$WorkDirectory /var/spool/rsyslog
+
+#
+# Include all config files in /etc/rsyslog.d/
+#
+$IncludeConfig /etc/rsyslog.d/*.conf
+
+#
+# Suppress duplicate messages and report "message repeated n times"
+#
+$RepeatedMsgReduction on
+
+###############
+#### RULES ####
+###############
\ No newline at end of file
diff --git a/dockers/docker-base-bookworm/etc/rsyslog.d/supervisor.conf b/dockers/docker-base-bookworm/etc/rsyslog.d/supervisor.conf
new file mode 100644
index 000000000..fde8d8a6c
--- /dev/null
+++ b/dockers/docker-base-bookworm/etc/rsyslog.d/supervisor.conf
@@ -0,0 +1,9 @@
+module(load="imfile" mode="inotify") # Ensure "inotify" mode is used
+$WorkDirectory /var/log/supervisor
+# Start Monitoring the file
+input(type="imfile"
+      File="/var/log/supervisor/supervisord.log"
+      Tag="supervisord"
+      Severity="info"
+      Facility="local0"
+      PersistStateInterval="1")
diff --git a/dockers/docker-base-bookworm/etc/supervisor/supervisord.conf b/dockers/docker-base-bookworm/etc/supervisor/supervisord.conf
new file mode 100644
index 000000000..6d7d7390e
--- /dev/null
+++ b/dockers/docker-base-bookworm/etc/supervisor/supervisord.conf
@@ -0,0 +1,29 @@
+; supervisor config file
+
+[unix_http_server]
+file=/var/run/supervisor.sock  ; (the path to the socket file)
+chmod=0700                     ; socket file mode (default 0700)
+
+[supervisord]
+logfile=/var/log/supervisor/supervisord.log  ; (main log file;default $CWD/supervisord.log)
+pidfile=/var/run/supervisord.pid             ; (supervisord pidfile;default supervisord.pid)
+childlogdir=/var/log/supervisor              ; ('AUTO' child log dir, default $TEMP)
+user=root
+
+; the below section must remain in the config file for RPC
+; (supervisorctl/web interface) to work, additional interfaces may be
+; added by defining them in separate rpcinterface: sections
+[rpcinterface:supervisor]
+supervisor.rpcinterface_factory = supervisor.rpcinterface:make_main_rpcinterface
+
+[supervisorctl]
+serverurl=unix:///var/run/supervisor.sock  ; use a unix:// URL  for a unix socket
+
+; The [include] section can just contain the "files" setting.  This
+; setting can list multiple files (separated by whitespace or
+; newlines).  It can also contain wildcards.  The filenames are
+; interpreted as relative to this file.  Included files *cannot*
+; include files themselves.
+
+[include]
+files = /etc/supervisor/conf.d/*.conf
diff --git a/dockers/docker-base-bookworm/no-check-valid-until b/dockers/docker-base-bookworm/no-check-valid-until
new file mode 100644
index 000000000..c7c25d017
--- /dev/null
+++ b/dockers/docker-base-bookworm/no-check-valid-until
@@ -0,0 +1,4 @@
+# Instruct apt-get to NOT check the "Valid Until" date in Release files
+# Once the Debian team archives a repo, they stop updating this date
+
+Acquire::Check-Valid-Until "false";
diff --git a/dockers/docker-base-bookworm/no_install_recommend_suggest b/dockers/docker-base-bookworm/no_install_recommend_suggest
new file mode 100644
index 000000000..b5bca577d
--- /dev/null
+++ b/dockers/docker-base-bookworm/no_install_recommend_suggest
@@ -0,0 +1,5 @@
+# Instruct apt-get to NOT install "recommended" or "suggested" packages by
+# default when installing a package.
+
+APT::Install-Recommends "false";
+APT::Install-Suggests "false";
diff --git a/dockers/docker-base-bookworm/root/.vimrc b/dockers/docker-base-bookworm/root/.vimrc
new file mode 100644
index 000000000..5c1ba8a04
--- /dev/null
+++ b/dockers/docker-base-bookworm/root/.vimrc
@@ -0,0 +1,2 @@
+" enable vim features
+set nocompatible
diff --git a/dockers/docker-config-engine-bookworm/00-load-omprog.conf b/dockers/docker-config-engine-bookworm/00-load-omprog.conf
new file mode 100644
index 000000000..f59297370
--- /dev/null
+++ b/dockers/docker-config-engine-bookworm/00-load-omprog.conf
@@ -0,0 +1 @@
+$ModLoad omprog
diff --git a/dockers/docker-config-engine-bookworm/Dockerfile.j2 b/dockers/docker-config-engine-bookworm/Dockerfile.j2
new file mode 100644
index 000000000..9662c98ec
--- /dev/null
+++ b/dockers/docker-config-engine-bookworm/Dockerfile.j2
@@ -0,0 +1,59 @@
+{% from "dockers/dockerfile-macros.j2" import install_debian_packages, install_python_wheels, copy_files %}
+FROM docker-base-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}}
+
+## Make apt-get non-interactive
+ENV DEBIAN_FRONTEND=noninteractive
+
+RUN apt-get update         && \
+    apt-get install -y        \
+        apt-utils             \
+        build-essential       \
+        python3-dev           \
+        python3-yaml
+
+{%- if CONFIGURED_ARCH == "armhf" or CONFIGURED_ARCH == "arm64" %}
+RUN apt-get install -y        \
+        libxslt-dev           \
+        libz-dev
+{%- endif %}
+
+# For sonic-config-engine Python 3 package
+# Explicitly install pyangbind here, as pyangbind causes enum34 to be installed.
+# enum34 causes Python 're' package to not work properly as it redefines an incompatible enum.py module
+# https://github.com/robshakir/pyangbind/issues/232
+RUN pip3 install pyangbind==0.8.1
+RUN pip3 uninstall -y enum34
+
+# Install python-redis
+RUN pip3 install redis==5.0.1
+
+{% if docker_config_engine_bookworm_debs.strip() %}
+# Copy locally-built Debian package dependencies
+{{ copy_files("debs/", docker_config_engine_bookworm_debs.split(' '), "/debs/") }}
+
+# Install locally-built Debian packages and implicitly install their dependencies
+{{ install_debian_packages(docker_config_engine_bookworm_debs.split(' ')) }}
+{% endif %}
+
+{% if docker_config_engine_bookworm_whls.strip() %}
+# Copy locally-built Python wheel dependencies
+{{ copy_files("python-wheels/", docker_config_engine_bookworm_whls.split(' '), "/python-wheels/") }}
+
+# Install locally-built Python wheel dependencies
+{{ install_python_wheels(docker_config_engine_bookworm_whls.split(' ')) }}
+{% endif %}
+
+# Copy files
+COPY ["files/swss_vars.j2", "/usr/share/sonic/templates/"]
+COPY ["files/readiness_probe.sh", "/usr/bin/"]
+COPY ["files/container_startup.py", "/usr/share/sonic/scripts/"]
+COPY ["00-load-omprog.conf", "/etc/rsyslog.d/"]
+
+## Clean up
+RUN apt-get purge -y               \
+        python3-dev                \
+        build-essential         && \
+    apt-get clean -y            && \
+    apt-get autoclean -y        && \
+    apt-get autoremove -y       && \
+    rm -rf /debs /python-wheels ~/.cache
diff --git a/rules/docker-base-bookworm.dep b/rules/docker-base-bookworm.dep
new file mode 100644
index 000000000..afa364765
--- /dev/null
+++ b/rules/docker-base-bookworm.dep
@@ -0,0 +1,9 @@
+
+DPATH       := $($(DOCKER_BASE_BOOKWORM)_PATH)
+DEP_FILES   := $(SONIC_COMMON_FILES_LIST) rules/docker-base-bookworm.mk rules/docker-base-bookworm.dep   
+DEP_FILES   += $(SONIC_COMMON_BASE_FILES_LIST)
+DEP_FILES   += $(shell git ls-files $(DPATH))
+
+$(DOCKER_BASE_BOOKWORM)_CACHE_MODE  := GIT_CONTENT_SHA 
+$(DOCKER_BASE_BOOKWORM)_DEP_FLAGS   := $(SONIC_COMMON_FLAGS_LIST)
+$(DOCKER_BASE_BOOKWORM)_DEP_FILES   := $(DEP_FILES)
diff --git a/rules/docker-base-bookworm.mk b/rules/docker-base-bookworm.mk
new file mode 100644
index 000000000..afd74ceb5
--- /dev/null
+++ b/rules/docker-base-bookworm.mk
@@ -0,0 +1,22 @@
+# Docker base image (based on Debian Bookworm)
+
+DOCKER_BASE_BOOKWORM = docker-base-bookworm.gz
+$(DOCKER_BASE_BOOKWORM)_PATH = $(DOCKERS_PATH)/docker-base-bookworm
+
+$(DOCKER_BASE_BOOKWORM)_DEPENDS += $(SOCAT)
+
+GDB = gdb
+GDBSERVER = gdbserver
+VIM = vim
+OPENSSH = openssh-client
+SSHPASS = sshpass
+STRACE = strace
+
+ifeq ($(INCLUDE_FIPS), y)
+$(DOCKER_BASE_BOOKWORM)_DEPENDS += $(FIPS_OPENSSL_LIBSSL) $(FIPS_OPENSSL_LIBSSL_DEV) $(FIPS_OPENSSL) $(SYMCRYPT_OPENSSL) $(FIPS_KRB5)
+endif
+
+$(DOCKER_BASE_BOOKWORM)_DBG_IMAGE_PACKAGES += $(GDB) $(GDBSERVER) $(VIM) $(OPENSSH) $(SSHPASS) $(STRACE)
+
+SONIC_DOCKER_IMAGES += $(DOCKER_BASE_BOOKWORM)
+SONIC_BOOKWORM_DOCKERS += $(DOCKER_BASE_BOOKWORM)
diff --git a/rules/docker-config-engine-bookworm.dep b/rules/docker-config-engine-bookworm.dep
new file mode 100644
index 000000000..7cabd9f4b
--- /dev/null
+++ b/rules/docker-config-engine-bookworm.dep
@@ -0,0 +1,9 @@
+
+DPATH       := $($(DOCKER_CONFIG_ENGINE_BOOKWORM)_PATH)
+DEP_FILES   := $(SONIC_COMMON_FILES_LIST) rules/docker-config-engine-bookworm.mk rules/docker-config-engine-bookworm.dep   
+DEP_FILES   += $(SONIC_COMMON_BASE_FILES_LIST)
+DEP_FILES   += $(shell git ls-files $(DPATH))
+
+$(DOCKER_CONFIG_ENGINE_BOOKWORM)_CACHE_MODE  := GIT_CONTENT_SHA 
+$(DOCKER_CONFIG_ENGINE_BOOKWORM)_DEP_FLAGS   := $(SONIC_COMMON_FLAGS_LIST)
+$(DOCKER_CONFIG_ENGINE_BOOKWORM)_DEP_FILES   := $(DEP_FILES)
diff --git a/rules/docker-config-engine-bookworm.mk b/rules/docker-config-engine-bookworm.mk
new file mode 100644
index 000000000..35145d890
--- /dev/null
+++ b/rules/docker-config-engine-bookworm.mk
@@ -0,0 +1,30 @@
+# docker image for sonic config engine
+
+DOCKER_CONFIG_ENGINE_BOOKWORM = docker-config-engine-bookworm.gz
+$(DOCKER_CONFIG_ENGINE_BOOKWORM)_PATH = $(DOCKERS_PATH)/docker-config-engine-bookworm
+
+$(DOCKER_CONFIG_ENGINE_BOOKWORM)_DEPENDS += $(LIBSWSSCOMMON) \
+                                          $(LIBYANG) \
+                                          $(LIBYANG_CPP) \
+                                          $(LIBYANG_PY3) \
+                                          $(PYTHON3_SWSSCOMMON) \
+                                          $(SONIC_DB_CLI) \
+                                          $(SONIC_EVENTD)
+$(DOCKER_CONFIG_ENGINE_BOOKWORM)_PYTHON_WHEELS += $(SONIC_PY_COMMON_PY3) \
+                                                  $(SONIC_YANG_MGMT_PY3) \
+                                                  $(SONIC_YANG_MODELS_PY3) \
+                                                  $(SONIC_CONTAINERCFGD)
+$(DOCKER_CONFIG_ENGINE_BOOKWORM)_PYTHON_WHEELS += $(SONIC_CONFIG_ENGINE_PY3)
+$(DOCKER_CONFIG_ENGINE_BOOKWORM)_LOAD_DOCKERS += $(DOCKER_BASE_BOOKWORM)
+$(DOCKER_CONFIG_ENGINE_BOOKWORM)_FILES += $(SWSS_VARS_TEMPLATE)
+$(DOCKER_CONFIG_ENGINE_BOOKWORM)_FILES += $(RSYSLOG_PLUGIN_CONF_J2)
+$(DOCKER_CONFIG_ENGINE_BOOKWORM)_FILES += $($(SONIC_CTRMGRD)_CONTAINER_SCRIPT)
+$(DOCKER_CONFIG_ENGINE_BOOKWORM)_FILES += $($(SONIC_CTRMGRD)_HEALTH_PROBE)
+$(DOCKER_CONFIG_ENGINE_BOOKWORM)_FILES += $($(SONIC_CTRMGRD)_STARTUP_SCRIPT)
+
+$(DOCKER_CONFIG_ENGINE_BOOKWORM)_DBG_DEPENDS = $($(DOCKER_BASE_BOOKWORM)_DBG_DEPENDS) \
+                                             $(LIBSWSSCOMMON_DBG)
+$(DOCKER_CONFIG_ENGINE_BOOKWORM)_DBG_IMAGE_PACKAGES = $($(DOCKER_BASE_BOOKWORM)_DBG_IMAGE_PACKAGES)
+
+SONIC_DOCKER_IMAGES += $(DOCKER_CONFIG_ENGINE_BOOKWORM)
+SONIC_BOOKWORM_DOCKERS += $(DOCKER_CONFIG_ENGINE_BOOKWORM)

From 17045addb715985f801317950058288ce2e907d4 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sat, 13 Jan 2024 16:32:34 +0800
Subject: [PATCH 0141/1115] [submodule] Update submodule sonic-sairedis to the
 latest HEAD automatically (#17774)

#### Why I did it
src/sonic-sairedis
```
* 4f4c6d1 - (HEAD -> master, origin/master, origin/HEAD) Fix code coverage and ASAN not being enabled (#1338) (9 hours ago) [Saikrishna Arcot]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-sairedis | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-sairedis b/src/sonic-sairedis
index c774f13ad..4f4c6d16f 160000
--- a/src/sonic-sairedis
+++ b/src/sonic-sairedis
@@ -1 +1 @@
-Subproject commit c774f13ad7f50efb7734baba22b1bb6b757eca2c
+Subproject commit 4f4c6d16f911c5acbcd7c9f0ea81b1fb2f1a9d13

From 8c1653605b14d1c22469c0ad6e8a52a18948ccff Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sat, 13 Jan 2024 16:32:38 +0800
Subject: [PATCH 0142/1115] [submodule] Update submodule sonic-linux-kernel to
 the latest HEAD automatically (#17773)

#### Why I did it
src/sonic-linux-kernel
```
* e17e31c - (HEAD -> master, origin/master, origin/HEAD) Add Kernel config diff script between different kernel versions (#375) (9 hours ago) [Vivek]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-linux-kernel | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-linux-kernel b/src/sonic-linux-kernel
index ee073d93c..e17e31cb8 160000
--- a/src/sonic-linux-kernel
+++ b/src/sonic-linux-kernel
@@ -1 +1 @@
-Subproject commit ee073d93cf726b26470ebb8a6c753025082ae089
+Subproject commit e17e31cb860b0cfdabf140ac4382586fdc99a629

From 90485126e14f1c342d44462d5c8334833a9859f5 Mon Sep 17 00:00:00 2001
From: Liu Shilong <shilongliu@microsoft.com>
Date: Mon, 15 Jan 2024 14:59:21 +0800
Subject: [PATCH 0143/1115] [build] Fix a bash script some times called by sh
 issue. (#17761)

Why I did it
Fix a bug that sometimes the script runs in sh not bash.

Work item tracking
Microsoft ADO (number only): 26297955
How I did it
---
 scripts/docker_version_control.sh | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/scripts/docker_version_control.sh b/scripts/docker_version_control.sh
index e94370d0e..7af5173de 100755
--- a/scripts/docker_version_control.sh
+++ b/scripts/docker_version_control.sh
@@ -1,7 +1,8 @@
+#!/bin/bash
+
 # This script is for reproducible build.
 # Reproducible build for docker enabled: Before build docker image, this script will change image:tag to image:sha256 in DOCKERFILE.
 # And record image sha256 to a target file.
-#!/bin/bash
 
 IMAGENAME=$1
 DOCKERFILE=$2

From 6107b5151fb6975cd409d39429e7038a474a6a5f Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Mon, 15 Jan 2024 16:35:37 +0800
Subject: [PATCH 0144/1115] [submodule] Update submodule sonic-utilities to the
 latest HEAD automatically (#17573)

#### Why I did it
src/sonic-utilities
```
* 942a7c9e - (HEAD -> master, origin/master, origin/HEAD) Revert "Enhanced route_check.py for multi_asic platforms" (#3122) (2 minutes ago) [Ying Xie]
* 01ee98ec - Revert "route_check: Skip route checks if bgp feature is not enabled" (#3121) (3 minutes ago) [Ying Xie]
* 1489c727 - [Techsupport]Adding more FRR and BGP dumps (#3118) (2 days ago) [Sudharsan Dhamal Gopalarathnam]
* 359e6925 - Disable Key Validation feature during sonic-installation for Cisco Platforms (#3115) (4 days ago) [selvipal]
* 9515c642 - [chassis]: Support show ip bgp summary to display without error when no external neighbors are configured on chassis LC (#3099) (10 days ago) [Arvindsrinivasan Lakshmi Narasimhan]
* 9400691c - Fix database initialization for db_migrator (#3100) (3 weeks ago) [ganglv]
* 56dafb07 - Support disable/enable syslog rate limit feature (#3072) (3 weeks ago) [Junchao-Mellanox]
* 529bb96b - route_check: Skip route checks if bgp feature is not enabled (#3075) (3 weeks ago) [anamehra]
* bcb10f18 - Support golden config in db migrator (#3076) (3 weeks ago) [ganglv]
* 20d1495b - [db_migrator] add db migrator version space for 202305/202311 branch (#3081) (4 weeks ago) [Ying Xie]
* a68d3d3a - Collect module EEPROM data in dump (#3009) (4 weeks ago) [Junchao-Mellanox]
* e7a8def6 - Enhanced route_check.py for multi_asic platforms (#3077) (4 weeks ago) [Deepak Singhal]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-utilities | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-utilities b/src/sonic-utilities
index 19ea84933..942a7c9e3 160000
--- a/src/sonic-utilities
+++ b/src/sonic-utilities
@@ -1 +1 @@
-Subproject commit 19ea8493388536921ad204833157dac2cd2bf3ba
+Subproject commit 942a7c9e3d68a7a881824416d0aa4a47d50bf958

From 36e111af80a81a6a3d6cc65158861009e5df95de Mon Sep 17 00:00:00 2001
From: Yaqiang Zhu <yaqiangzhu@microsoft.com>
Date: Wed, 17 Jan 2024 01:52:50 +0800
Subject: [PATCH 0145/1115] [dhcp_server] Add support for smart switch in
 dhcprelayd (#17779)

* [dhcp_server] Add support for smart switch in dhcprelayd
---
 .../dhcp_utilities/dhcprelayd/dhcprelayd.py   | 143 +++++++++++++-----
 .../tests/common_utils.py                     |  72 +++++++++
 .../mock_config_db_smart_switch.json          |  27 ++++
 .../tests/test_dhcp_cfggen.py                 |   4 +-
 .../tests/test_dhcprelayd.py                  |  62 ++++++--
 .../tests/test_smart_switch.py                |  26 ++++
 6 files changed, 275 insertions(+), 59 deletions(-)
 create mode 100644 src/sonic-dhcp-utilities/tests/test_data/mock_config_db_smart_switch.json
 create mode 100644 src/sonic-dhcp-utilities/tests/test_smart_switch.py

diff --git a/src/sonic-dhcp-utilities/dhcp_utilities/dhcprelayd/dhcprelayd.py b/src/sonic-dhcp-utilities/dhcp_utilities/dhcprelayd/dhcprelayd.py
index 92249e8b9..66139500d 100644
--- a/src/sonic-dhcp-utilities/dhcp_utilities/dhcprelayd/dhcprelayd.py
+++ b/src/sonic-dhcp-utilities/dhcp_utilities/dhcprelayd/dhcprelayd.py
@@ -8,21 +8,25 @@
 import syslog
 import time
 from swsscommon import swsscommon
-from dhcp_utilities.common.utils import DhcpDbConnector, terminate_proc, get_target_process_cmds
+from dhcp_utilities.common.utils import DhcpDbConnector, terminate_proc, get_target_process_cmds, is_smart_switch
 from dhcp_utilities.common.dhcp_db_monitor import DhcpRelaydDbMonitor, DhcpServerTableIntfEnablementEventChecker, \
-     VlanTableEventChecker, VlanIntfTableEventChecker, DhcpServerFeatureStateChecker
+     VlanTableEventChecker, VlanIntfTableEventChecker, DhcpServerFeatureStateChecker, MidPlaneTableEventChecker
 
 REDIS_SOCK_PATH = "/var/run/redis/redis.sock"
 SUPERVISORD_CONF_PATH = "/etc/supervisor/conf.d/docker-dhcp-relay.supervisord.conf"
 DHCP_SERVER_IPV4_SERVER_IP = "DHCP_SERVER_IPV4_SERVER_IP"
 DHCP_SERVER_IPV4 = "DHCP_SERVER_IPV4"
 VLAN = "VLAN"
+MID_PLANE_BRIDGE = "MID_PLANE_BRIDGE"
+DEVICE_METADATA = "DEVICE_METADATA"
 DEFAULT_SELECT_TIMEOUT = 5000  # millisecond
 DHCP_SERVER_INTERFACE = "eth0"
 FEATURE_CHECKER = "DhcpServerFeatureStateChecker"
 DHCP_SERVER_CHECKER = "DhcpServerTableIntfEnablementEventChecker"
 VLAN_CHECKER = "VlanTableEventChecker"
 VLAN_INTF_CHECKER = "VlanIntfTableEventChecker"
+MID_PLANE_CHECKER = "MidPlaneTableEventChecker"
+VLAN_CHECKERS = [VLAN_CHECKER, VLAN_INTF_CHECKER]
 KILLED_OLD = 1
 NOT_KILLED = 2
 NOT_FOUND_PROC = 3
@@ -33,8 +37,11 @@ class DhcpRelayd(object):
     dhcp_server_feature_enabled = None
     dhcp_relay_supervisor_config = {}
     supervisord_conf_path = ""
+    enabled_checkers = set()
+    smart_switch = False
 
-    def __init__(self, db_connector, db_monitor, supervisord_conf_path=SUPERVISORD_CONF_PATH):
+    def __init__(self, db_connector, db_monitor, supervisord_conf_path=SUPERVISORD_CONF_PATH,
+                 enabled_checkers=[FEATURE_CHECKER]):
         """
         Args:
             db_connector: db connector obj
@@ -46,6 +53,7 @@ def __init__(self, db_connector, db_monitor, supervisord_conf_path=SUPERVISORD_C
         self.enabled_dhcp_interfaces = set()
         self.dhcp_server_feature_enabled = None
         self.supervisord_conf_path = supervisord_conf_path
+        self.enabled_checkers = set(enabled_checkers)
 
     def start(self):
         """
@@ -53,12 +61,15 @@ def start(self):
         """
         self.dhcp_relay_supervisor_config = self._get_dhcp_relay_config()
         self.dhcp_server_feature_enabled = self._is_dhcp_server_enabled()
+        device_metadata = self.db_connector.get_config_db_table(DEVICE_METADATA)
+        self.smart_switch = is_smart_switch(device_metadata)
         # Sleep to wait dhcrelay process start
         time.sleep(5)
         if self.dhcp_server_feature_enabled:
             # If dhcp_server is enabled, need to stop related relay processes start by supervisord
             self._execute_supervisor_dhcp_relay_process("stop")
-            self.dhcp_relayd_monitor.enable_checkers([DHCP_SERVER_CHECKER, VLAN_CHECKER, VLAN_INTF_CHECKER])
+            self.enabled_checkers.add(DHCP_SERVER_CHECKER)
+        self.dhcp_relayd_monitor.enable_checkers(self.enabled_checkers)
 
     def refresh_dhcrelay(self, force_kill=False):
         """
@@ -70,9 +81,12 @@ def refresh_dhcrelay(self, force_kill=False):
         dhcp_server_ip = self._get_dhcp_server_ip()
         dhcp_server_ipv4_table = self.db_connector.get_config_db_table(DHCP_SERVER_IPV4)
         vlan_table = self.db_connector.get_config_db_table(VLAN)
+        mid_plane_table = self.db_connector.get_config_db_table(MID_PLANE_BRIDGE)
+        mid_plane_bridge_name = mid_plane_table.get("GLOBAL", {}).get("bridge", None)
 
         dhcp_interfaces = set()
         self.enabled_dhcp_interfaces = set()
+        checkers_to_be_enabled = set()
         for dhcp_interface, config in dhcp_server_ipv4_table.items():
             # Reason for add to enabled_dhcp_interfaces firstly is for below scenario:
             # Firstly vlan 1000 is not in vlan table but enabled in dhcp_server table, then add vlan1000 to vlan table
@@ -80,9 +94,20 @@ def refresh_dhcrelay(self, force_kill=False):
             if config["state"] == "enabled":
                 dhcp_interfaces.add(dhcp_interface)
                 self.enabled_dhcp_interfaces.add(dhcp_interface)
-            if dhcp_interface not in vlan_table:
+            if dhcp_interface not in vlan_table and dhcp_interface != mid_plane_bridge_name:
                 dhcp_interfaces.discard(dhcp_interface)
                 continue
+            if dhcp_interface in vlan_table:
+                checkers_to_be_enabled |= set(VLAN_CHECKERS)
+            elif dhcp_interface == mid_plane_bridge_name and self.smart_switch:
+                checkers_to_be_enabled |= set([MID_PLANE_CHECKER])
+        self._enable_checkers(checkers_to_be_enabled - self.enabled_checkers)
+
+        # Checkers for FEATURE and DHCP_SERVER_IPV4 table should not be disabled
+        checkers_to_be_disabled = self.enabled_checkers - checkers_to_be_enabled - \
+            set([FEATURE_CHECKER, DHCP_SERVER_CHECKER])
+        self._disable_checkers(checkers_to_be_disabled)
+
         self._start_dhcrelay_process(dhcp_interfaces, dhcp_server_ip, force_kill)
         self._start_dhcpmon_process(dhcp_interfaces, force_kill)
 
@@ -96,41 +121,77 @@ def wait(self):
                 "dhcp_server_feature_enabled": self.dhcp_server_feature_enabled
             }
             res = (self.dhcp_relayd_monitor.check_db_update(check_param))
-            dhcp_feature_statue_changed = False
-            if FEATURE_CHECKER in res:
-                dhcp_feature_statue_changed = res[FEATURE_CHECKER]
-                self.dhcp_server_feature_enabled = not self.dhcp_server_feature_enabled if dhcp_feature_statue_changed \
-                    else self.dhcp_server_feature_enabled
-            # If dhcp_server feature is enabled, dhcprelayd will manage dhcpmon/dhcrelay process
-            if self.dhcp_server_feature_enabled:
-                # disabled -> enabled, we need to enable dhcp_server related checkers and do refresh processes
-                if dhcp_feature_statue_changed:
-                    self.dhcp_relayd_monitor.enable_checkers([DHCP_SERVER_CHECKER, VLAN_CHECKER, VLAN_INTF_CHECKER])
-                    # Stop dhcrelay process
-                    self._execute_supervisor_dhcp_relay_process("stop")
-                    self.refresh_dhcrelay()
-                # enabled -> enabled, just need to check dhcp_server related tables to see whether need to refresh
-                else:
-                    # Check vlan_interface table change, if it changed, need to refresh with force kill
-                    if res.get(VLAN_INTF_CHECKER, False):
-                        self.refresh_dhcrelay(True)
-                    elif res.get(VLAN_CHECKER, False) or res.get(DHCP_SERVER_CHECKER, False):
-                        self.refresh_dhcrelay(False)
-
-            # If dhcp_server feature is disabled, dhcprelayd will checke whether dhcpmon/dhcrelay processes,
-            # if they are not running as expected, dhcprelayd will kill itself to make dhcp_relay container restart.
+            self._proceed_with_check_res(res, self.dhcp_server_feature_enabled)
+
+    def _proceed_with_check_res(self, check_res, previous_dhcp_server_status):
+        """
+        Proceed depends on check result
+        Args:
+            check_res: result of checker, sample: {
+                "DhcpServerFeatureStateChecker": True,
+                "VlanIntfTableEventChecker": False
+            }
+            previous_dhcp_server_status: previous enabled/disabled status of dhcp_server feature
+        """
+        dhcp_feature_status_changed = False
+        if FEATURE_CHECKER in check_res:
+            dhcp_feature_status_changed = check_res[FEATURE_CHECKER]
+            self.dhcp_server_feature_enabled = not previous_dhcp_server_status if dhcp_feature_status_changed \
+                else previous_dhcp_server_status
+        # If dhcp_server feature is enabled, dhcprelayd will manage dhcpmon/dhcrelay process
+        if self.dhcp_server_feature_enabled:
+            # disabled -> enabled, we need to enable dhcp_server checker and do refresh processes
+            if dhcp_feature_status_changed:
+                self._enable_checkers([DHCP_SERVER_CHECKER])
+                # Stop dhcrelay process
+                self._execute_supervisor_dhcp_relay_process("stop")
+                self.refresh_dhcrelay()
+            # enabled -> enabled, just need to check dhcp_server related tables to see whether need to refresh
+            else:
+                # Check vlan_interface table change, if it changed, need to refresh with force kill
+                if (check_res.get(VLAN_INTF_CHECKER, False) or check_res.get(MID_PLANE_CHECKER, False) or
+                   check_res.get(MID_PLANE_CHECKER, False)):
+                    self.refresh_dhcrelay(True)
+                elif check_res.get(VLAN_CHECKER, False) or check_res.get(DHCP_SERVER_CHECKER, False):
+                    self.refresh_dhcrelay(False)
+
+        # If dhcp_server feature is disabled, dhcprelayd will checke whether dhcpmon/dhcrelay processes,
+        # if they are not running as expected, dhcprelayd will kill itself to make dhcp_relay container restart.
+        else:
+            # enabled -> disabled, we need to disable dhcp_server related checkers and start dhcrelay/dhcpmon
+            # processes follow supervisord configuration
+            if dhcp_feature_status_changed:
+                checkers_to_be_disabled = [DHCP_SERVER_CHECKER] + VLAN_CHECKERS
+                if self.smart_switch:
+                    checkers_to_be_disabled.append(MID_PLANE_CHECKER)
+                self._disable_checkers(self.enabled_checkers & set(checkers_to_be_disabled))
+                self._kill_exist_relay_releated_process([], "dhcpmon", True)
+                self._kill_exist_relay_releated_process([], "dhcrelay", True)
+                self._execute_supervisor_dhcp_relay_process("start")
+            # disabled -> disabled, to check whether dhcpmon/dhcrelay running status consistent with supervisord
+            # configuration
             else:
-                # enabled -> disabled, we need to disable dhcp_server related checkers and start dhcrelay/dhcpmon
-                # processes follow supervisord configuration
-                if dhcp_feature_statue_changed:
-                    self.dhcp_relayd_monitor.disable_checkers([DHCP_SERVER_CHECKER, VLAN_CHECKER, VLAN_INTF_CHECKER])
-                    self._kill_exist_relay_releated_process([], "dhcpmon", True)
-                    self._kill_exist_relay_releated_process([], "dhcrelay", True)
-                    self._execute_supervisor_dhcp_relay_process("start")
-                # disabled -> disabled, to check whether dhcpmon/dhcrelay running status consistent with supervisord
-                # configuration
-                else:
-                    self._check_dhcp_relay_processes()
+                self._check_dhcp_relay_processes()
+
+    def _enable_checkers(self, checkers):
+        """
+        Update set of enabled_checkers and enable checkers
+        Args:
+            checkers: checkers need to be enabled
+        """
+        new_enabled_checkers = set(checkers) - self.enabled_checkers
+        self.dhcp_relayd_monitor.enable_checkers(new_enabled_checkers)
+        self.enabled_checkers = self.enabled_checkers | new_enabled_checkers
+
+    def _disable_checkers(self, checkers):
+        """
+        Update set of enabled_checkers and disable checkers
+        Args:
+            checkers: checkers need to be disabled
+        """
+        new_disabled_checkers = set(checkers) & self.enabled_checkers
+        self.dhcp_relayd_monitor.disable_checkers(new_disabled_checkers)
+        self.enabled_checkers = self.enabled_checkers - new_disabled_checkers
 
     def _is_dhcp_server_enabled(self):
         """
@@ -300,10 +361,10 @@ def main():
     checkers.append(DhcpServerTableIntfEnablementEventChecker(sel, dhcp_db_connector.config_db))
     checkers.append(VlanIntfTableEventChecker(sel, dhcp_db_connector.config_db))
     checkers.append(VlanTableEventChecker(sel, dhcp_db_connector.config_db))
+    checkers.append(MidPlaneTableEventChecker(sel, dhcp_db_connector.config_db))
     checkers.append(DhcpServerFeatureStateChecker(sel, dhcp_db_connector.config_db))
     db_monitor = DhcpRelaydDbMonitor(dhcp_db_connector, sel, checkers, DEFAULT_SELECT_TIMEOUT)
-    db_monitor.enable_checkers([FEATURE_CHECKER])
-    dhcprelayd = DhcpRelayd(dhcp_db_connector, db_monitor)
+    dhcprelayd = DhcpRelayd(dhcp_db_connector, db_monitor, enabled_checkers=[FEATURE_CHECKER])
     dhcprelayd.start()
     dhcprelayd.wait()
 
diff --git a/src/sonic-dhcp-utilities/tests/common_utils.py b/src/sonic-dhcp-utilities/tests/common_utils.py
index 6b7d0acd0..6f3c07a17 100644
--- a/src/sonic-dhcp-utilities/tests/common_utils.py
+++ b/src/sonic-dhcp-utilities/tests/common_utils.py
@@ -1,6 +1,10 @@
 import heapq
 import json
 import psutil
+from dhcp_utilities.common.dhcp_db_monitor import DhcpRelaydDbMonitor
+from dhcp_utilities.common.utils import DhcpDbConnector
+from dhcp_utilities.dhcprelayd.dhcprelayd import DhcpRelayd, FEATURE_CHECKER, DHCP_SERVER_CHECKER, VLAN_INTF_CHECKER
+from unittest.mock import patch, PropertyMock, call
 
 MOCK_CONFIG_DB_PATH = "tests/test_data/mock_config_db.json"
 TEST_DATA_PATH = "tests/test_data/dhcp_db_monitor_test_data.json"
@@ -114,3 +118,71 @@ def get_subscribe_table_tested_data(test_name):
 class MockSubprocessRes(object):
     def __init__(self, returncode):
         self.returncode = returncode
+
+
+def dhcprelayd_refresh_dhcrelay_test(expected_checkers, is_smart_switch, mock_get_config_db_table):
+    with patch.object(DhcpRelayd, "_get_dhcp_server_ip", return_value="240.127.1.2"), \
+         patch.object(DhcpDbConnector, "get_config_db_table", side_effect=mock_get_config_db_table), \
+         patch.object(DhcpRelayd, "_start_dhcrelay_process", return_value=None), \
+         patch.object(DhcpRelayd, "_start_dhcpmon_process", return_value=None), \
+         patch.object(DhcpRelayd, "_enable_checkers") as mock_enable_checkers, \
+         patch.object(DhcpRelayd, "_disable_checkers") as mock_disable_checkers, \
+         patch.object(DhcpRelayd, "smart_switch", return_value=is_smart_switch, new_callable=PropertyMock):
+        dhcp_db_connector = DhcpDbConnector()
+        dhcprelayd = DhcpRelayd(dhcp_db_connector, None)
+        dhcprelayd.refresh_dhcrelay()
+        mock_enable_checkers.assert_called_once_with(expected_checkers)
+        mock_disable_checkers.assert_called_once_with(set())
+
+
+def dhcprelayd_proceed_with_check_res_test(enabled_checkers, feature_enabled, feature_res, dhcp_server_res,
+                                           vlan_intf_res, is_smart_switch, expected_checkers):
+    with patch.object(DhcpRelayd, "_enable_checkers") as mock_enable_checkers, \
+         patch.object(DhcpRelayd, "_execute_supervisor_dhcp_relay_process") as mock_execute_process, \
+         patch.object(DhcpRelayd, "refresh_dhcrelay") as mock_refresh_dhcrelay, \
+         patch.object(DhcpRelayd, "_disable_checkers") as mock_disable_checkers, \
+         patch.object(DhcpRelayd, "_kill_exist_relay_releated_process") as mock_kill_process, \
+         patch.object(DhcpRelayd, "_check_dhcp_relay_processes") as mock_check_process, \
+         patch.object(DhcpRelayd, "smart_switch", return_value=is_smart_switch,
+                      new_callable=PropertyMock), \
+         patch.object(DhcpRelayd, "enabled_checkers", return_value=enabled_checkers, new_callable=PropertyMock):
+        dhcp_db_connector = DhcpDbConnector()
+        dhcprelayd = DhcpRelayd(dhcp_db_connector, DhcpRelaydDbMonitor(None, None, []))
+        dhcprelayd.dhcp_server_feature_enabled = True if feature_enabled else False
+        check_res = {}
+        if feature_res is not None:
+            check_res[FEATURE_CHECKER] = feature_res
+        if dhcp_server_res is not None:
+            check_res[DHCP_SERVER_CHECKER] = dhcp_server_res
+        if vlan_intf_res is not None:
+            check_res[VLAN_INTF_CHECKER] = vlan_intf_res
+        dhcprelayd._proceed_with_check_res(check_res, feature_enabled)
+        if feature_res is None or not feature_res:
+            # Feature status didn't change
+
+            # disabled -> disabled
+            if not feature_enabled:
+                mock_check_process.assert_called_once_with()
+            # enabled-> enabled
+            else:
+                if vlan_intf_res:
+                    mock_refresh_dhcrelay.assert_called_once_with(True)
+                elif dhcp_server_res:
+                    mock_refresh_dhcrelay.assert_called_once_with(False)
+                else:
+                    mock_refresh_dhcrelay.assert_not_called()
+        else:
+            # Feature status changed
+
+            # enabled -> disabled
+            if feature_enabled:
+                mock_disable_checkers.assert_called_once_with(expected_checkers)
+                mock_kill_process.assert_has_calls([
+                    call([], "dhcpmon", True),
+                    call([], "dhcrelay", True)
+                ])
+            # disabled-> enabled
+            else:
+                mock_enable_checkers.assert_called_once_with([DHCP_SERVER_CHECKER])
+                mock_execute_process.assert_called_once_with("stop")
+                mock_refresh_dhcrelay.assert_called_once_with()
diff --git a/src/sonic-dhcp-utilities/tests/test_data/mock_config_db_smart_switch.json b/src/sonic-dhcp-utilities/tests/test_data/mock_config_db_smart_switch.json
new file mode 100644
index 000000000..365306033
--- /dev/null
+++ b/src/sonic-dhcp-utilities/tests/test_data/mock_config_db_smart_switch.json
@@ -0,0 +1,27 @@
+{
+    "DEVICE_METADATA": {
+        "localhost": {
+            "hostname": "sonic-host",
+            "subtype": "SmartSwitch"
+        }
+    },
+    "MID_PLANE_BRIDGE": {
+        "GLOBAL": {
+            "bridge": "bridge_midplane",
+            "address": "169.254.200.254/24"
+        }
+    },
+    "DHCP_SERVER_IPV4": {
+        "bridge_midplane": {
+            "customized_options": [
+                "option60",
+                "option223"
+            ],
+            "gateway": "169.254.200.254",
+            "lease_time": "900",
+            "mode": "PORT",
+            "netmask": "255.255.255.0",
+            "state": "enabled"
+        }
+    }
+}
diff --git a/src/sonic-dhcp-utilities/tests/test_dhcp_cfggen.py b/src/sonic-dhcp-utilities/tests/test_dhcp_cfggen.py
index 4d841df7b..41ba6fb27 100644
--- a/src/sonic-dhcp-utilities/tests/test_dhcp_cfggen.py
+++ b/src/sonic-dhcp-utilities/tests/test_dhcp_cfggen.py
@@ -2,10 +2,10 @@
 import ipaddress
 import json
 import pytest
-from common_utils import MockConfigDb, mock_get_config_db_table, PORT_MODE_CHECKER, SMART_SWITCH_CHECKER
+from common_utils import MockConfigDb, mock_get_config_db_table, PORT_MODE_CHECKER
 from dhcp_utilities.common.utils import DhcpDbConnector
 from dhcp_utilities.dhcpservd.dhcp_cfggen import DhcpServCfgGenerator
-from unittest.mock import patch, MagicMock
+from unittest.mock import patch
 
 expected_dhcp_config = {
     "Dhcp4": {
diff --git a/src/sonic-dhcp-utilities/tests/test_dhcprelayd.py b/src/sonic-dhcp-utilities/tests/test_dhcprelayd.py
index 9e519aad4..0cc95ad6a 100644
--- a/src/sonic-dhcp-utilities/tests/test_dhcprelayd.py
+++ b/src/sonic-dhcp-utilities/tests/test_dhcprelayd.py
@@ -3,12 +3,14 @@
 import subprocess
 import sys
 import time
-from common_utils import mock_get_config_db_table, MockProc, MockPopen, MockSubprocessRes, mock_exit_func
+from common_utils import mock_get_config_db_table, MockProc, MockPopen, MockSubprocessRes, mock_exit_func, \
+    dhcprelayd_refresh_dhcrelay_test, dhcprelayd_proceed_with_check_res_test
 from dhcp_utilities.common.utils import DhcpDbConnector
 from dhcp_utilities.common.dhcp_db_monitor import ConfigDbEventChecker, DhcpRelaydDbMonitor
-from dhcp_utilities.dhcprelayd.dhcprelayd import DhcpRelayd, KILLED_OLD, NOT_KILLED, NOT_FOUND_PROC
+from dhcp_utilities.dhcprelayd.dhcprelayd import DhcpRelayd, KILLED_OLD, NOT_KILLED, NOT_FOUND_PROC, \
+    DHCP_SERVER_CHECKER, VLAN_CHECKERS
 from swsscommon import swsscommon
-from unittest.mock import patch, call, ANY, PropertyMock
+from unittest.mock import patch, call, PropertyMock
 
 
 @pytest.mark.parametrize("dhcp_server_enabled", [True, False])
@@ -16,30 +18,26 @@ def test_start(mock_swsscommon_dbconnector_init, dhcp_server_enabled):
     with patch.object(DhcpRelayd, "_get_dhcp_relay_config") as mock_get_config, \
          patch.object(DhcpRelayd, "_is_dhcp_server_enabled", return_value=dhcp_server_enabled) as mock_enabled, \
          patch.object(DhcpRelayd, "_execute_supervisor_dhcp_relay_process") as mock_execute, \
-         patch.object(DhcpRelaydDbMonitor, "enable_checkers") as mock_enable_checkers, \
-         patch.object(time, "sleep"):
+         patch.object(time, "sleep"), \
+         patch.object(DhcpRelaydDbMonitor, "enable_checkers") as mock_enabled_checkers, \
+         patch.object(DhcpDbConnector, "get_config_db_table", side_effect=mock_get_config_db_table):
         dhcp_db_connector = DhcpDbConnector()
-        dhcprelayd = DhcpRelayd(dhcp_db_connector, DhcpRelaydDbMonitor)
+        dhcprelayd = DhcpRelayd(dhcp_db_connector, DhcpRelaydDbMonitor(None, None, []))
         dhcprelayd.start()
         mock_get_config.assert_called_once_with()
         mock_enabled.assert_called_once_with()
+        enabled_checkers = set(["DhcpServerFeatureStateChecker"])
         if dhcp_server_enabled:
             mock_execute.assert_called_once_with("stop")
-            mock_enable_checkers.assert_called_once_with([ANY, ANY, ANY])
+            enabled_checkers.add("DhcpServerTableIntfEnablementEventChecker")
         else:
             mock_execute.assert_not_called()
-            mock_enable_checkers.assert_not_called()
+        mock_enabled_checkers.assert_called_once_with(enabled_checkers)
 
 
 def test_refresh_dhcrelay(mock_swsscommon_dbconnector_init):
-    with patch.object(DhcpRelayd, "_get_dhcp_server_ip", return_value="240.127.1.2"), \
-         patch.object(DhcpDbConnector, "get_config_db_table", side_effect=mock_get_config_db_table), \
-         patch.object(DhcpRelayd, "_start_dhcrelay_process", return_value=None), \
-         patch.object(DhcpRelayd, "_start_dhcpmon_process", return_value=None), \
-         patch.object(ConfigDbEventChecker, "enable"):
-        dhcp_db_connector = DhcpDbConnector()
-        dhcprelayd = DhcpRelayd(dhcp_db_connector, None)
-        dhcprelayd.refresh_dhcrelay()
+    expected_checkers = set(["VlanIntfTableEventChecker", "VlanTableEventChecker"])
+    dhcprelayd_refresh_dhcrelay_test(expected_checkers, False, mock_get_config_db_table)
 
 
 @pytest.mark.parametrize("new_dhcp_interfaces", [[], ["Vlan1000"], ["Vlan1000", "Vlan2000"]])
@@ -232,3 +230,35 @@ def test_get_dhcp_relay_config(mock_swsscommon_dbconnector_init, mock_swsscommon
                 "PortChannel103", "-iu", "PortChannel104", "-im", "eth0"
             ]
         }
+
+
+@pytest.mark.parametrize("enabled_checkers", [set(["dummy"]), set()])
+def test_enable_checkers(mock_swsscommon_dbconnector_init, mock_swsscommon_table_init, enabled_checkers):
+    with patch.object(DhcpRelayd, "enabled_checkers", return_value=enabled_checkers, new_callable=PropertyMock), \
+         patch.object(DhcpRelaydDbMonitor, "enable_checkers") as mock_enable_checkers:
+        dhcp_db_connector = DhcpDbConnector()
+        dhcprelayd = DhcpRelayd(dhcp_db_connector, DhcpRelaydDbMonitor(None, None, []))
+        dhcprelayd._enable_checkers(["dummy"])
+        mock_enable_checkers.assert_called_once_with(set() if "dummy" in enabled_checkers else set(["dummy"]))
+
+
+@pytest.mark.parametrize("enabled_checkers", [set(["dummy"]), set()])
+def test_disable_checkers(mock_swsscommon_dbconnector_init, mock_swsscommon_table_init, enabled_checkers):
+    with patch.object(DhcpRelayd, "enabled_checkers", return_value=enabled_checkers, new_callable=PropertyMock), \
+         patch.object(DhcpRelaydDbMonitor, "disable_checkers") as mock_disable_checkers:
+        dhcp_db_connector = DhcpDbConnector()
+        dhcprelayd = DhcpRelayd(dhcp_db_connector, DhcpRelaydDbMonitor(None, None, []))
+        dhcprelayd._disable_checkers(["dummy"])
+        mock_disable_checkers.assert_called_once_with(set() if "dummy" not in enabled_checkers else set(["dummy"]))
+
+
+@pytest.mark.parametrize("feature_enabled", [True, False])
+@pytest.mark.parametrize("feature_res", [True, False, None])
+@pytest.mark.parametrize("dhcp_server_res", [True, False, None])
+@pytest.mark.parametrize("vlan_intf_res", [True, False, None])
+def test_proceed_with_check_res(mock_swsscommon_dbconnector_init, mock_swsscommon_table_init, feature_enabled,
+                                feature_res, dhcp_server_res, vlan_intf_res):
+    enabled_checkers = set([DHCP_SERVER_CHECKER] + VLAN_CHECKERS)
+    expected_checkers = set([DHCP_SERVER_CHECKER] + VLAN_CHECKERS)
+    dhcprelayd_proceed_with_check_res_test(enabled_checkers, feature_enabled, feature_res, dhcp_server_res,
+                                           vlan_intf_res, False, expected_checkers)
diff --git a/src/sonic-dhcp-utilities/tests/test_smart_switch.py b/src/sonic-dhcp-utilities/tests/test_smart_switch.py
new file mode 100644
index 000000000..916b1e6c3
--- /dev/null
+++ b/src/sonic-dhcp-utilities/tests/test_smart_switch.py
@@ -0,0 +1,26 @@
+import pytest
+from common_utils import MockConfigDb, dhcprelayd_refresh_dhcrelay_test, dhcprelayd_proceed_with_check_res_test
+from dhcp_utilities.dhcprelayd.dhcprelayd import DHCP_SERVER_CHECKER, MID_PLANE_CHECKER
+
+MOCK_CONFIG_DB_PATH_SMART_SWITCH = "tests/test_data/mock_config_db_smart_switch.json"
+
+
+def test_dhcprelayd_refresh_dhcrelay(mock_swsscommon_dbconnector_init):
+    expected_checkers = set(["MidPlaneTableEventChecker"])
+    dhcprelayd_refresh_dhcrelay_test(expected_checkers, True, mock_get_config_db_table)
+
+
+@pytest.mark.parametrize("feature_enabled", [True, False])
+@pytest.mark.parametrize("feature_res", [True, False, None])
+@pytest.mark.parametrize("dhcp_server_res", [True, False, None])
+def test_dhcprelayd_proceed_with_check_res(mock_swsscommon_dbconnector_init, mock_swsscommon_table_init,
+                                           feature_enabled, feature_res, dhcp_server_res):
+    enabled_checkers = set([DHCP_SERVER_CHECKER, MID_PLANE_CHECKER])
+    expected_checkers = set([DHCP_SERVER_CHECKER, MID_PLANE_CHECKER])
+    dhcprelayd_proceed_with_check_res_test(enabled_checkers, feature_enabled, feature_res, dhcp_server_res,
+                                           None, True, expected_checkers)
+
+
+def mock_get_config_db_table(table_name):
+    mock_config_db = MockConfigDb(MOCK_CONFIG_DB_PATH_SMART_SWITCH)
+    return mock_config_db.get_config_db_table(table_name)

From 9f18587234abefe726ba3ddcd30f8dfc9e5b8ab1 Mon Sep 17 00:00:00 2001
From: vdahiya12 <67608553+vdahiya12@users.noreply.github.com>
Date: Tue, 16 Jan 2024 11:34:19 -0800
Subject: [PATCH 0146/1115] [Arista] Update config.bcm of 7060_cx32s for
 handling 40g optics with unreliable los settings (#17768)

For 40G optics there is SAI handling of T0 facing ports to be set with SR4 type and unreliable los set for a fixed set of ports. For this property to be invoked the requirement is set
phy_unlos_msft=1 in config.bcm.
This change is to meet the requirement and once this property is set, the los/interface type settings is applied by SAI on the required ports.

Why I did it
For Arista-7060CX-32S-Q32 T1, 40G ports RX_ERR minimalization during connected device reboot
can be achieved by turning on Unreliable LOS and SR4 media_type for all ports which are connected to T0.

The property phy_unlos_msft=1 is to exclusively enable this property.

Microsoft ADO: 25941176

How I did it
Changes in SAI and turning on property

How to verify it
Ran the changes on a testbed and verified configurations are as intended.

with property

admin@sonic2:~$ bcmcmd "phy diag xe8 dsc config" | grep -C 2 "LOS"
Brdfe_on                    = 0
Media Type                  = 2
Unreliable LOS              = 1
Scrambling Disable          = 0
Lane Config from PCS        = 0

without property

admin@sonic:~$ bcmcmd "phy diag xe8 dsc config" | grep -C 2 "LOS"
Brdfe_on                    = 0
Media Type                  = 0
Unreliable LOS              = 0
Scrambling Disable          = 0
Lane Config from PCS        = 0

Signed-off-by: vaibhav-dahiya <vdahiya@microsoft.com>
---
 .../Arista-7060CX-32S-Q32/th-a7060-cx32s-32x40G-t1.config.bcm    | 1 +
 src/sonic-device-data/tests/permitted_list                       | 1 +
 2 files changed, 2 insertions(+)

diff --git a/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-Q32/th-a7060-cx32s-32x40G-t1.config.bcm b/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-Q32/th-a7060-cx32s-32x40G-t1.config.bcm
index 9b0dc2193..27fccd876 100644
--- a/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-Q32/th-a7060-cx32s-32x40G-t1.config.bcm
+++ b/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-Q32/th-a7060-cx32s-32x40G-t1.config.bcm
@@ -449,3 +449,4 @@ serdes_preemphasis_109=0x145c00
 
 mmu_init_config="MSFT-TH-Tier1"
 phy_an_lt_msft=1
+phy_unlos_msft=1
diff --git a/src/sonic-device-data/tests/permitted_list b/src/sonic-device-data/tests/permitted_list
index 2992024b9..f89d80ac8 100644
--- a/src/sonic-device-data/tests/permitted_list
+++ b/src/sonic-device-data/tests/permitted_list
@@ -326,6 +326,7 @@ phy_pcs_repeater
 l3_alpm_hit_skip
 sai_verify_incoming_chksum
 phy_an_lt_msft
+phy_unlos_msft
 system_ref_core_clock_khz
 xflow_macsec_secure_chan_to_num_secure_assoc_encrypt
 xflow_macsec_secure_chan_to_num_secure_assoc_decrypt

From 00fa56760f97e051c73655bd316a281a7d5e96ea Mon Sep 17 00:00:00 2001
From: Saikrishna Arcot <sarcot@microsoft.com>
Date: Tue, 16 Jan 2024 18:27:06 -0800
Subject: [PATCH 0147/1115] Fix building the SONiC slave container for
 QEMU-based build (#17571)

Why I did it
The existing source of multiarch/debian-debootstrap doesn't appear to have Bookworm-based images available. Because of this, slave containers for cross-compilation of SONiC (with QEMU) cannot be built.

Work item tracking
Microsoft ADO (number only): 26214341
How I did it
Since those images don't do anything to the Debian container besides add QEMU to it (which we overwrite anyways with the latest version of QEMU available from multiarch/qemu-user-static, just take the platform-specific version of the official Debian image and add QEMU to it.

How to verify it
---
 sonic-slave-bookworm/Dockerfile.j2 | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/sonic-slave-bookworm/Dockerfile.j2 b/sonic-slave-bookworm/Dockerfile.j2
index 60f3c0b98..6bf09c425 100644
--- a/sonic-slave-bookworm/Dockerfile.j2
+++ b/sonic-slave-bookworm/Dockerfile.j2
@@ -1,11 +1,11 @@
 {% set prefix = DEFAULT_CONTAINER_REGISTRY %}
 {%- if CONFIGURED_ARCH == "armhf" and MULTIARCH_QEMU_ENVIRON == "y" %}
 FROM {{ prefix }}multiarch/qemu-user-static:x86_64-arm-7.2.0-1 as qemu
-FROM {{ prefix }}multiarch/debian-debootstrap:armhf-bookworm
+FROM --platform=linux/arm/v7 {{ prefix }}debian:bookworm
 COPY --from=qemu /usr/bin/qemu-arm-static /usr/bin
 {%- elif CONFIGURED_ARCH == "arm64" and MULTIARCH_QEMU_ENVIRON == "y" %}
 FROM {{ prefix }}multiarch/qemu-user-static:x86_64-aarch64-7.2.0-1 as qemu
-FROM {{ prefix }}multiarch/debian-debootstrap:arm64-bookworm
+FROM --platform=linux/arm64 {{ prefix }}debian:bookworm
 COPY --from=qemu /usr/bin/qemu-aarch64-static /usr/bin
 {%- elif CONFIGURED_ARCH == "armhf" and CROSS_BUILD_ENVIRON == "y" %}
 FROM {{ prefix }}multiarch/qemu-user-static:x86_64-arm-7.2.0-1 as qemu

From a100f15ba2e8a718f2a46a77557b50035c368e72 Mon Sep 17 00:00:00 2001
From: Xichen96 <lukelin0907@gmail.com>
Date: Wed, 17 Jan 2024 11:24:57 +0800
Subject: [PATCH 0148/1115] [dhcp_server] add config dhcp server range (#17741)

* add range related function and ut
---
 .../cli-plugin-tests/mock_config_db.json      |   4 +-
 .../test_config_dhcp_server.py                | 130 ++++++++++++++++++
 .../cli-plugin-tests/test_show_dhcp_server.py |  10 +-
 .../cli/config/plugins/dhcp_server.py         |  88 ++++++++++--
 4 files changed, 217 insertions(+), 15 deletions(-)

diff --git a/dockers/docker-dhcp-server/cli-plugin-tests/mock_config_db.json b/dockers/docker-dhcp-server/cli-plugin-tests/mock_config_db.json
index 6183453af..773b7e178 100644
--- a/dockers/docker-dhcp-server/cli-plugin-tests/mock_config_db.json
+++ b/dockers/docker-dhcp-server/cli-plugin-tests/mock_config_db.json
@@ -49,10 +49,10 @@
         "ips": "100.1.1.10,10.1.1.11"
     },
     "DHCP_SERVER_IPV4_PORT|Vlan100|Ethernet7": {
-        "ranges": "range1,range2"
+        "ranges": "range1,range3"
     },
     "DHCP_SERVER_IPV4_PORT|Vlan200|Ethernet8": {
-        "ranges": "range3,range4"
+        "ranges": "range1,range4"
     },
     "DHCP_SERVER_IPV4_PORT|Ethernet9": {
         "ranges": "range5,range6"
diff --git a/dockers/docker-dhcp-server/cli-plugin-tests/test_config_dhcp_server.py b/dockers/docker-dhcp-server/cli-plugin-tests/test_config_dhcp_server.py
index 9cc12aa3c..612f229cc 100644
--- a/dockers/docker-dhcp-server/cli-plugin-tests/test_config_dhcp_server.py
+++ b/dockers/docker-dhcp-server/cli-plugin-tests/test_config_dhcp_server.py
@@ -240,3 +240,133 @@ def test_config_dhcp_server_ipv4_update_wrong_netmask(self, mock_db):
         result = runner.invoke(dhcp_server.dhcp_server.commands["ipv4"].commands["update"], ["Vlan100", "--netmask=255.255.254"], obj=db)
         assert result.exit_code == 2, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
 
+    def test_config_dhcp_server_ipv4_range_add(self, mock_db):
+        expected_value = {
+            "range": "10.10.10.10,10.10.10.11"
+        }
+        runner = CliRunner()
+        db = clicommon.Db()
+        db.db = mock_db
+        result = runner.invoke(dhcp_server.dhcp_server.commands["ipv4"].commands["range"].commands["add"], \
+                ["range4", "10.10.10.10", "10.10.10.11"], obj=db)
+        assert result.exit_code == 0, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
+        assert mock_db.get_all("CONFIG_DB", "DHCP_SERVER_IPV4_RANGE|range4") == expected_value
+
+    def test_config_dhcp_server_ipv4_range_add_existing(self, mock_db):
+        runner = CliRunner()
+        db = clicommon.Db()
+        db.db = mock_db
+        result = runner.invoke(dhcp_server.dhcp_server.commands["ipv4"].commands["range"].commands["add"], \
+                ["range1", "10.10.10.10", "10.10.10.11"], obj=db)
+        assert result.exit_code == 2, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
+
+    def test_config_dhcp_server_ipv4_range_add_single_ip(self, mock_db):
+        expected_value = {
+            "range": "10.10.10.10,10.10.10.10"
+        }
+        runner = CliRunner()
+        db = clicommon.Db()
+        db.db = mock_db
+        result = runner.invoke(dhcp_server.dhcp_server.commands["ipv4"].commands["range"].commands["add"], \
+                ["range4", "10.10.10.10"], obj=db)
+        assert result.exit_code == 0, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
+        assert mock_db.get_all("CONFIG_DB", "DHCP_SERVER_IPV4_RANGE|range4") == expected_value
+
+    def test_config_dhcp_server_ipv4_range_add_wrong_ip(self, mock_db):
+        runner = CliRunner()
+        db = clicommon.Db()
+        db.db = mock_db
+        result = runner.invoke(dhcp_server.dhcp_server.commands["ipv4"].commands["range"].commands["add"], \
+                ["range4", "10.10.10"], obj=db)
+        assert result.exit_code == 2, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
+
+    def test_config_dhcp_server_ipv4_range_add_wrong_order(self, mock_db):
+        runner = CliRunner()
+        db = clicommon.Db()
+        db.db = mock_db
+        result = runner.invoke(dhcp_server.dhcp_server.commands["ipv4"].commands["range"].commands["add"], \
+                ["range4", "10.10.10.10", "10.10.10.9"], obj=db)
+        assert result.exit_code == 2, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
+
+    def test_config_dhcp_server_ipv4_range_update(self, mock_db):
+        expected_value = {
+            "range": "10.10.10.10,10.10.10.11"
+        }
+        runner = CliRunner()
+        db = clicommon.Db()
+        db.db = mock_db
+        result = runner.invoke(dhcp_server.dhcp_server.commands["ipv4"].commands["range"].commands["update"], \
+                ["range1", "10.10.10.10", "10.10.10.11"], obj=db)
+        assert result.exit_code == 0, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
+        assert mock_db.get_all("CONFIG_DB", "DHCP_SERVER_IPV4_RANGE|range1") == expected_value
+
+    def test_config_dhcp_server_ipv4_range_update_nonexisting(self, mock_db):
+        runner = CliRunner()
+        db = clicommon.Db()
+        db.db = mock_db
+        result = runner.invoke(dhcp_server.dhcp_server.commands["ipv4"].commands["range"].commands["update"], \
+                ["range4", "10.10.10.10", "10.10.10.11"], obj=db)
+        assert result.exit_code == 2, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
+
+    def test_config_dhcp_server_ipv4_range_update_single_ip(self, mock_db):
+        expected_value = {
+            "range": "10.10.10.10,10.10.10.10"
+        }
+        runner = CliRunner()
+        db = clicommon.Db()
+        db.db = mock_db
+        result = runner.invoke(dhcp_server.dhcp_server.commands["ipv4"].commands["range"].commands["update"], \
+                ["range1", "10.10.10.10"], obj=db)
+        assert result.exit_code == 0, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
+        assert mock_db.get_all("CONFIG_DB", "DHCP_SERVER_IPV4_RANGE|range1") == expected_value
+
+    def test_config_dhcp_server_ipv4_range_update_wrong_ip(self, mock_db):
+        runner = CliRunner()
+        db = clicommon.Db()
+        db.db = mock_db
+        result = runner.invoke(dhcp_server.dhcp_server.commands["ipv4"].commands["range"].commands["update"], \
+                ["range1", "10.10.10"], obj=db)
+        assert result.exit_code == 2, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
+
+    def test_config_dhcp_server_ipv4_range_add_wrong_order(self, mock_db):
+        runner = CliRunner()
+        db = clicommon.Db()
+        db.db = mock_db
+        result = runner.invoke(dhcp_server.dhcp_server.commands["ipv4"].commands["range"].commands["update"], \
+                ["range1", "10.10.10.10", "10.10.10.9"], obj=db)
+        assert result.exit_code == 2, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
+
+    def test_config_dhcp_server_ipv4_range_delete(self, mock_db):
+        runner = CliRunner()
+        db = clicommon.Db()
+        db.db = mock_db
+        result = runner.invoke(dhcp_server.dhcp_server.commands["ipv4"].commands["range"].commands["del"], \
+                ["range2"], obj=db)
+        assert result.exit_code == 0, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
+        assert mock_db.exists("CONFIG_DB", "DHCP_SERVER_IPV4_RANGE|range2") == False
+
+    def test_config_dhcp_server_ipv4_range_delete_nonexisting(self, mock_db):
+        runner = CliRunner()
+        db = clicommon.Db()
+        db.db = mock_db
+        result = runner.invoke(dhcp_server.dhcp_server.commands["ipv4"].commands["range"].commands["del"], \
+                ["range4"], obj=db)
+        assert result.exit_code == 2, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
+
+    def test_config_dhcp_server_ipv4_range_delete_referenced(self, mock_db):
+        runner = CliRunner()
+        db = clicommon.Db()
+        db.db = mock_db
+        result = runner.invoke(dhcp_server.dhcp_server.commands["ipv4"].commands["range"].commands["del"], \
+                ["range1"], obj=db)
+        assert result.exit_code == 2, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
+
+    def test_config_dhcp_server_ipv4_range_delete_referenced_force(self, mock_db):
+        runner = CliRunner()
+        db = clicommon.Db()
+        db.db = mock_db
+        result = runner.invoke(dhcp_server.dhcp_server.commands["ipv4"].commands["range"].commands["del"], \
+                ["range1", "--force"], obj=db)
+        assert result.exit_code == 0, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
+        assert mock_db.exists("CONFIG_DB", "DHCP_SERVER_IPV4_RANGE|range1") == False
+
diff --git a/dockers/docker-dhcp-server/cli-plugin-tests/test_show_dhcp_server.py b/dockers/docker-dhcp-server/cli-plugin-tests/test_show_dhcp_server.py
index 1373dfe0b..f09c0a9c8 100644
--- a/dockers/docker-dhcp-server/cli-plugin-tests/test_show_dhcp_server.py
+++ b/dockers/docker-dhcp-server/cli-plugin-tests/test_show_dhcp_server.py
@@ -215,9 +215,9 @@ def test_show_dhcp_server_ipv4_port_without_intf(self, mock_db):
 |                   | 10.1.1.11  |
 +-------------------+------------+
 | Vlan100|Ethernet7 | range1     |
-|                   | range2     |
+|                   | range3     |
 +-------------------+------------+
-| Vlan200|Ethernet8 | range3     |
+| Vlan200|Ethernet8 | range1     |
 |                   | range4     |
 +-------------------+------------+
 | Ethernet9         | range5     |
@@ -237,7 +237,7 @@ def test_show_dhcp_server_ipv4_port_with_port(self, mock_db):
 | Interface         | Bind   |
 +===================+========+
 | Vlan100|Ethernet7 | range1 |
-|                   | range2 |
+|                   | range3 |
 +-------------------+--------+
 """
         runner = CliRunner()
@@ -256,7 +256,7 @@ def test_show_dhcp_server_ipv4_port_with_vlan(self, mock_db):
 |                   | 10.1.1.11  |
 +-------------------+------------+
 | Vlan100|Ethernet7 | range1     |
-|                   | range2     |
+|                   | range3     |
 +-------------------+------------+
 """
         runner = CliRunner()
@@ -271,7 +271,7 @@ def test_show_dhcp_server_ipv4_port_with_port_and_vlan(self, mock_db):
 +-------------------+--------+
 | Interface         | Bind   |
 +===================+========+
-| Vlan200|Ethernet8 | range3 |
+| Vlan200|Ethernet8 | range1 |
 |                   | range4 |
 +-------------------+--------+
 """
diff --git a/dockers/docker-dhcp-server/cli/config/plugins/dhcp_server.py b/dockers/docker-dhcp-server/cli/config/plugins/dhcp_server.py
index 9abd5a275..237550a4b 100644
--- a/dockers/docker-dhcp-server/cli/config/plugins/dhcp_server.py
+++ b/dockers/docker-dhcp-server/cli/config/plugins/dhcp_server.py
@@ -8,7 +8,7 @@
 SUPPORT_TYPE = ["binary", "boolean", "ipv4-address", "string", "uint8", "uint16", "uint32"]
 
 
-def validate_str_type(type, value):
+def validate_str_type(type_, value):
     """
     To validate whether type is consistent with string value
     Args:
@@ -20,27 +20,27 @@ def validate_str_type(type, value):
     """
     if not isinstance(value, str):
         return False
-    if type not in SUPPORT_TYPE:
+    if type_ not in SUPPORT_TYPE:
         return False
-    if type == "string":
+    if type_ == "string":
         return True
-    if type == "binary":
+    if type_ == "binary":
         if len(value) == 0 or len(value) % 2 != 0:
             return False
         return all(c in set(string.hexdigits) for c in value)
-    if type == "boolean":
+    if type_ == "boolean":
         return value in ["true", "false"]
-    if type == "ipv4-address":
+    if type_ == "ipv4-address":
         try:
             if len(value.split(".")) != 4:
                 return False
             return ipaddress.ip_address(value).version == 4
         except ValueError:
             return False
-    if type.startswith("uint"):
+    if type_.startswith("uint"):
         if not value.isdigit():
             return False
-        length = int("".join([c for c in type if c.isdigit()]))
+        length = int("".join([c for c in type_ if c.isdigit()]))
         return 0 <= int(value) <= int(pow(2, length)) - 1
     return False
 
@@ -186,6 +186,78 @@ def dhcp_server_ipv4_disable(db, dhcp_interface):
         ctx.fail("Failed to disable, dhcp interface {} does not exist".format(dhcp_interface))
 
 
+@dhcp_server_ipv4.group(cls=clicommon.AliasedGroup, name="range")
+def dhcp_server_ipv4_range():
+    pass
+
+
+def count_ipv4(start, end):
+    ip1 = int(ipaddress.IPv4Address(start))
+    ip2 = int(ipaddress.IPv4Address(end))
+    return ip2 - ip1 + 1
+
+
+@dhcp_server_ipv4_range.command(name="add")
+@click.argument("range_name", required=True)
+@click.argument("ip_start", required=True)
+@click.argument("ip_end", required=False)
+@clicommon.pass_db
+def dhcp_server_ipv4_range_add(db, range_name, ip_start, ip_end):
+    ctx = click.get_current_context()
+    if not ip_end:
+        ip_end = ip_start
+    if not validate_str_type("ipv4-address", ip_start) or not validate_str_type("ipv4-address", ip_end):
+        ctx.fail("ip_start or ip_end is not valid ipv4 address")
+    if count_ipv4(ip_start, ip_end) < 1:
+        ctx.fail("range value is illegal")
+    dbconn = db.db
+    key = "DHCP_SERVER_IPV4_RANGE|" + range_name
+    if dbconn.exists("CONFIG_DB", key):
+        ctx.fail("Range {} already exist".format(range_name))
+    else:
+        dbconn.hmset("CONFIG_DB", key, {"range": ip_start + "," + ip_end})
+
+
+@dhcp_server_ipv4_range.command(name="update")
+@click.argument("range_name", required=True)
+@click.argument("ip_start", required=True)
+@click.argument("ip_end", required=False)
+@clicommon.pass_db
+def dhcp_server_ipv4_range_update(db, range_name, ip_start, ip_end):
+    ctx = click.get_current_context()
+    if not ip_end:
+        ip_end = ip_start
+    if not validate_str_type("ipv4-address", ip_start) or not validate_str_type("ipv4-address", ip_end):
+        ctx.fail("ip_start or ip_end is not valid ipv4 address")
+    if count_ipv4(ip_start, ip_end) < 1:
+        ctx.fail("range value is illegal")
+    dbconn = db.db
+    key = "DHCP_SERVER_IPV4_RANGE|" + range_name
+    if dbconn.exists("CONFIG_DB", key):
+        dbconn.set("CONFIG_DB", key, "range", ip_start + "," + ip_end)
+    else:
+        ctx.fail("Range {} does not exist, cannot update".format(range_name))
+
+
+@dhcp_server_ipv4_range.command(name="del")
+@click.argument("range_name", required=True)
+@click.option("--force", required=False, default=False, is_flag=True)
+@clicommon.pass_db
+def dhcp_sever_ipv4_range_del(db, range_name, force):
+    ctx = click.get_current_context()
+    dbconn = db.db
+    key = "DHCP_SERVER_IPV4_RANGE|" + range_name
+    if dbconn.exists("CONFIG_DB", key):
+        if not force:
+            for port in dbconn.keys("CONFIG_DB", "DHCP_SERVER_IPV4_PORT*"):
+                ranges = dbconn.get("CONFIG_DB", port, "ranges")
+                if ranges and range_name in ranges.split(","):
+                    ctx.fail("Range {} is referenced in {}, cannot delete, add --force to bypass".format(range_name, port))
+        dbconn.delete("CONFIG_DB", key)
+    else:
+        ctx.fail("Range {} does not exist, cannot delete".format(range_name))
+
+
 def register(cli):
     # cli.add_command(dhcp_server)
     pass

From 0fb13590c01f48d8615f55672c50c1b67def0fd4 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Wed, 17 Jan 2024 16:34:49 +0800
Subject: [PATCH 0149/1115] [submodule] Update submodule sonic-swss-common to
 the latest HEAD automatically (#17803)

#### Why I did it
src/sonic-swss-common
```
* 2711f6f - (HEAD -> master, origin/master, origin/HEAD) Use selectable event to terminate logger thread (#848) (15 hours ago) [Junchao-Mellanox]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-swss-common | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-swss-common b/src/sonic-swss-common
index b5635800c..2711f6f98 160000
--- a/src/sonic-swss-common
+++ b/src/sonic-swss-common
@@ -1 +1 @@
-Subproject commit b5635800ce2eae6d9ee5f9d0141922a7dd52c993
+Subproject commit 2711f6f98e14796086f8d8cb11dda327bb2bd439

From c8707dc78ecab66d0d9980e63df2c2d57f88aca6 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Wed, 17 Jan 2024 16:34:55 +0800
Subject: [PATCH 0150/1115] [submodule] Update submodule sonic-gnmi to the
 latest HEAD automatically (#17800)

#### Why I did it
src/sonic-gnmi
```
* c44d154 - (HEAD -> master, origin/master, origin/HEAD) Account for GLOBAL key in PFC_WD (#178) (6 hours ago) [Zain Budhwani]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-gnmi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-gnmi b/src/sonic-gnmi
index 752f1fcef..c44d15474 160000
--- a/src/sonic-gnmi
+++ b/src/sonic-gnmi
@@ -1 +1 @@
-Subproject commit 752f1fceffa2d8fa7138638dd49c2d0aec96bc7b
+Subproject commit c44d154742722e5d9605aab946b6bb9881475f47

From 774cd910a00a46206e8157f6280ef4f3f837e79e Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Wed, 17 Jan 2024 18:36:07 +0800
Subject: [PATCH 0151/1115] [submodule] Update submodule sonic-platform-daemons
 to the latest HEAD automatically (#17802)

#### Why I did it
src/sonic-platform-daemons
```
* d8977f3 - (HEAD -> master, origin/master, origin/HEAD) Unable to retrieve media settings with just Vendor name (#419) (8 hours ago) [mihirpat1]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-platform-daemons | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-platform-daemons b/src/sonic-platform-daemons
index b1e51c3e5..d8977f360 160000
--- a/src/sonic-platform-daemons
+++ b/src/sonic-platform-daemons
@@ -1 +1 @@
-Subproject commit b1e51c3e5f90220a79166817204a6ee80a7fa4fd
+Subproject commit d8977f3608e5c9263d9b9d9b33087890637ac436

From d9517c77f1f658a71b177bd3ebbecacf27a4c96e Mon Sep 17 00:00:00 2001
From: Saikrishna Arcot <sarcot@microsoft.com>
Date: Wed, 17 Jan 2024 18:50:22 -0800
Subject: [PATCH 0152/1115] dhcrelay: Don't look up the ifindex for the
 fallback interface (#17797)

Currently, whenever isc-dhcp-relay forwards a packet upstream,
internally, it will try to send it on a "fallback" interface. My
understanding is that this isn't meant to be a real interface, but
instead is basically saying to use Linux's regular routing stack to
route the packet appropriately (rather than having isc-dhcp-relay
specify specifically which interface to use).

The problem is that on systems with a weak CPU, a large number of
interfaces, and many upstream servers specified, this can introduce a
noticeable delay in packets getting sent. The delay comes from trying to
get the ifindex of the fallback interface. In one test case, it got to
the point that only 2 packets could be processed per second. Because of
this, dhcrelay will easily get backlogged and likely get to a point
where packets get dropped in the kernel.

Fix this by adding a check saying if we're using the fallback interface,
then don't try to get the ifindex of this interface. We're never going
to have an interface named this in SONiC.

Signed-off-by: Saikrishna Arcot <sarcot@microsoft.com>
---
 ...n-t-look-up-the-ifindex-for-fallback.patch | 34 +++++++++++++++++++
 src/isc-dhcp/patch/series                     |  1 +
 2 files changed, 35 insertions(+)
 create mode 100644 src/isc-dhcp/patch/0016-Don-t-look-up-the-ifindex-for-fallback.patch

diff --git a/src/isc-dhcp/patch/0016-Don-t-look-up-the-ifindex-for-fallback.patch b/src/isc-dhcp/patch/0016-Don-t-look-up-the-ifindex-for-fallback.patch
new file mode 100644
index 000000000..55fde475f
--- /dev/null
+++ b/src/isc-dhcp/patch/0016-Don-t-look-up-the-ifindex-for-fallback.patch
@@ -0,0 +1,34 @@
+From 079ff1bb570dae96c4ca513e210c9856e9cc75b0 Mon Sep 17 00:00:00 2001
+From: Saikrishna Arcot <sarcot@microsoft.com>
+Date: Wed, 10 Jan 2024 23:30:17 -0800
+Subject: [PATCH] Don't look up the ifindex for fallback
+
+If sending a packet on the "fallback" interface, then don't try to get the
+ifindex for that interface. There will never be an actual interface named
+"fallback" in SONiC (at least, not one that we will want to use).
+
+This might save 0.009-0.012 seconds per upstream server, and when there
+are as many as 48 upstream servers, it can save about 0.4-0.5 seconds of
+time. This then allows dhcrelay to process more packets.
+
+Signed-off-by: Saikrishna Arcot <sarcot@microsoft.com>
+
+diff --git a/common/socket.c b/common/socket.c
+index da9f501..e707a7f 100644
+--- a/common/socket.c
++++ b/common/socket.c
+@@ -767,7 +767,10 @@ ssize_t send_packet (interface, packet, raw, len, from, to, hto)
+ 	memcpy(&dst, to, sizeof(dst));
+ 	m.msg_name = &dst;
+ 	m.msg_namelen = sizeof(dst);
+-	ifindex = if_nametoindex(interface->name);
++	if (strcmp(interface->name, "fallback") != 0)
++		ifindex = if_nametoindex(interface->name);
++	else
++		ifindex = 0;
+ 
+ 	/*
+ 	 * Set the data buffer we're sending. (Using this wacky
+-- 
+2.34.1
+
diff --git a/src/isc-dhcp/patch/series b/src/isc-dhcp/patch/series
index 07f78949a..5a58b41b1 100644
--- a/src/isc-dhcp/patch/series
+++ b/src/isc-dhcp/patch/series
@@ -14,3 +14,4 @@
 0013-Fix-dhcrelay-agent-option-buffer-pointer-logic.patch
 0014-enable-parallel-build.patch
 0015-option-to-set-primary-address-in-interface.patch
+0016-Don-t-look-up-the-ifindex-for-fallback.patch

From 07a43b96b7fccccd12aa49517a03eaffb7c68926 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Thu, 18 Jan 2024 14:35:59 +0800
Subject: [PATCH 0153/1115] [submodule] Update submodule sonic-snmpagent to the
 latest HEAD automatically (#17824)

#### Why I did it
src/sonic-snmpagent
```
* 4a6de8b - (HEAD -> master, origin/master, origin/HEAD) Set the execute bit on sysDescr_pass.py (#306) (6 hours ago) [Andre Kostur]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-snmpagent | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-snmpagent b/src/sonic-snmpagent
index 29481f9c4..4a6de8b93 160000
--- a/src/sonic-snmpagent
+++ b/src/sonic-snmpagent
@@ -1 +1 @@
-Subproject commit 29481f9c42c53123a88baa8a6e64cf8a4e37041f
+Subproject commit 4a6de8b936a50fd8b3ea6a3b9931b9c6a03b4c18

From c94a233f6757686b85adda69598360b2775f6ca7 Mon Sep 17 00:00:00 2001
From: Oleksandr Ivantsiv <oivantsiv@nvidia.com>
Date: Thu, 18 Jan 2024 00:00:05 -0800
Subject: [PATCH 0154/1115] [smartswitch] Align the smart switch config
 generator with the YANG model. (#17636)

- Why I did it
Align the smart switch config generator with the YANG model.

- How I did it
Change MID_PLANE_BRIDGE table field name in the generated config from address to ip_prefix.

- How to verify it
Run UT. The tests are aligned with the changes.

Signed-off-by: Oleksandr Ivantsiv <oivantsiv@nvidia.com>
---
 src/sonic-config-engine/config_samples.py                       | 2 +-
 src/sonic-config-engine/tests/sample_output/t1-smartswitch.json | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/sonic-config-engine/config_samples.py b/src/sonic-config-engine/config_samples.py
index 77f11a9f3..4989b8802 100644
--- a/src/sonic-config-engine/config_samples.py
+++ b/src/sonic-config-engine/config_samples.py
@@ -86,7 +86,7 @@ def generate_t1_smartswitch_sample_config(data):
     data['MID_PLANE_BRIDGE'] = {
         'GLOBAL': {
             'bridge': bridge_name,
-            'address': '{}/24'.format(mpbr_address)
+            'ip_prefix': '{}/24'.format(mpbr_address)
         }
     }
 
diff --git a/src/sonic-config-engine/tests/sample_output/t1-smartswitch.json b/src/sonic-config-engine/tests/sample_output/t1-smartswitch.json
index 7cccb9ab1..58d91aa90 100644
--- a/src/sonic-config-engine/tests/sample_output/t1-smartswitch.json
+++ b/src/sonic-config-engine/tests/sample_output/t1-smartswitch.json
@@ -554,7 +554,7 @@
     "MID_PLANE_BRIDGE": {
         "GLOBAL": {
             "bridge": "bridge_midplane",
-            "address": "169.254.200.254/24"
+            "ip_prefix": "169.254.200.254/24"
         }
     },
     "DHCP_SERVER_IPV4": {

From 080bbd5492f971ce8235dd0127a6db8e892cedf7 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Thu, 18 Jan 2024 16:33:52 +0800
Subject: [PATCH 0155/1115] [submodule] Update submodule sonic-sairedis to the
 latest HEAD automatically (#17823)

#### Why I did it
src/sonic-sairedis
```
* b26ce7a - (HEAD -> master, origin/master, origin/HEAD) Skip FABRIC PORT Attributes from sairedis logging (#1339) (2 hours ago) [saksarav-nokia]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-sairedis | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-sairedis b/src/sonic-sairedis
index 4f4c6d16f..b26ce7a35 160000
--- a/src/sonic-sairedis
+++ b/src/sonic-sairedis
@@ -1 +1 @@
-Subproject commit 4f4c6d16f911c5acbcd7c9f0ea81b1fb2f1a9d13
+Subproject commit b26ce7a35a0203724d87509fa56ee1b7f2c0ffbd

From ee72c068b272f2f03f7779e4fe4b998a33becd45 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Thu, 18 Jan 2024 16:33:56 +0800
Subject: [PATCH 0156/1115] [submodule] Update submodule sonic-platform-common
 to the latest HEAD automatically (#17822)

#### Why I did it
src/sonic-platform-common
```
* 65e3cc3 - (HEAD -> master, origin/master, origin/HEAD) Fix memory map parsing issue (#427) (18 minutes ago) [Stephen Sun]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-platform-common | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-platform-common b/src/sonic-platform-common
index c82ae5436..65e3cc3d8 160000
--- a/src/sonic-platform-common
+++ b/src/sonic-platform-common
@@ -1 +1 @@
-Subproject commit c82ae543642411676fe9afa2bac32f733356cfc7
+Subproject commit 65e3cc3d8ddac83231cdd15a460eb5128410a135

From fc2c319c3ddf0b94b8274977ed8b2178a13a2cf7 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Thu, 18 Jan 2024 16:34:04 +0800
Subject: [PATCH 0157/1115] [submodule] Update submodule linkmgrd to the latest
 HEAD automatically (#17820)

#### Why I did it
src/linkmgrd
```
* 74c33ea - (HEAD -> master, origin/master, origin/HEAD) [active-standby] Probe the link in suspend timeout (#235) (12 hours ago) [Longxiang Lyu]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/linkmgrd | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/linkmgrd b/src/linkmgrd
index 6586abfa8..74c33eacf 160000
--- a/src/linkmgrd
+++ b/src/linkmgrd
@@ -1 +1 @@
-Subproject commit 6586abfa832f4995804ea0227b06f332bd5d354e
+Subproject commit 74c33eacf4325b6e0f3e3b11fc6c50b4222921a1

From ed7a5d15d460ed500cfb6c4121f76e0e2bcbb277 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Thu, 18 Jan 2024 16:34:10 +0800
Subject: [PATCH 0158/1115] [submodule] Update submodule sonic-mgmt-common to
 the latest HEAD automatically (#17801)

#### Why I did it
src/sonic-mgmt-common
```
* 1e84a49 - (HEAD -> master, origin/master, origin/HEAD) Remove Duplicates in topsort results (25 hours ago) [Mohammed Faraaz]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-mgmt-common | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-mgmt-common b/src/sonic-mgmt-common
index 9a1268344..1e84a4902 160000
--- a/src/sonic-mgmt-common
+++ b/src/sonic-mgmt-common
@@ -1 +1 @@
-Subproject commit 9a126834441ca6a203cff901416258a1ab961b1f
+Subproject commit 1e84a4902ca7250f30fecdad1a5b1396167c6676

From e173987a564f80c53cdbb05d07e303d63f8cc89f Mon Sep 17 00:00:00 2001
From: Nazarii Hnydyn <nazariig@nvidia.com>
Date: Thu, 18 Jan 2024 18:04:00 +0200
Subject: [PATCH 0159/1115] [swss/syncd]: Remove dependency on
 interfaces-config.service (#17739)

Signed-off-by: Nazarii Hnydyn <nazariig@nvidia.com>
Co-authored-by: Stepan Blyshchak <38952541+stepanblyschak@users.noreply.github.com>
---
 files/build_templates/per_namespace/swss.service.j2  | 1 -
 files/build_templates/per_namespace/syncd.service.j2 | 1 -
 2 files changed, 2 deletions(-)

diff --git a/files/build_templates/per_namespace/swss.service.j2 b/files/build_templates/per_namespace/swss.service.j2
index 765bee8a7..58bca6a21 100644
--- a/files/build_templates/per_namespace/swss.service.j2
+++ b/files/build_templates/per_namespace/swss.service.j2
@@ -11,7 +11,6 @@ Requires=opennsl-modules.service
 {% endif %}
 Requires=updategraph.service
 After=updategraph.service
-After=interfaces-config.service
 BindsTo=sonic.target
 After=sonic.target
 Before=ntp-config.service
diff --git a/files/build_templates/per_namespace/syncd.service.j2 b/files/build_templates/per_namespace/syncd.service.j2
index 66861efca..1fb803390 100644
--- a/files/build_templates/per_namespace/syncd.service.j2
+++ b/files/build_templates/per_namespace/syncd.service.j2
@@ -16,7 +16,6 @@ After=nps-modules.service
 {% endif %}
 Requires=updategraph.service
 After=updategraph.service
-After=interfaces-config.service
 BindsTo=sonic.target
 After=sonic.target
 Before=ntp-config.service

From 9a9ab183c8bd1c0a6a5dae3f9ee8c00fb7b6d1ab Mon Sep 17 00:00:00 2001
From: Longxiang Lyu <35479537+lolyu@users.noreply.github.com>
Date: Fri, 19 Jan 2024 00:36:06 +0800
Subject: [PATCH 0160/1115] [dualtor] Disable zebra link-detect for vlan
 interfaces (#17784)

* [dualtor] Disable zebra link-detect for vlan interfaces

Signed-off-by: Longxiang Lyu <lolv@microsoft.com>
---
 .../frr/zebra/zebra.interfaces.conf.j2        |  8 +++
 .../sample_output/py2/zebra_frr_dualtor.conf  | 49 +++++++++++++++++++
 .../sample_output/py3/zebra_frr_dualtor.conf  | 49 +++++++++++++++++++
 src/sonic-config-engine/tests/test_frr.py     |  4 ++
 4 files changed, 110 insertions(+)
 create mode 100644 src/sonic-config-engine/tests/sample_output/py2/zebra_frr_dualtor.conf
 create mode 100644 src/sonic-config-engine/tests/sample_output/py3/zebra_frr_dualtor.conf

diff --git a/dockers/docker-fpm-frr/frr/zebra/zebra.interfaces.conf.j2 b/dockers/docker-fpm-frr/frr/zebra/zebra.interfaces.conf.j2
index 44e8bca8b..82b973d37 100644
--- a/dockers/docker-fpm-frr/frr/zebra/zebra.interfaces.conf.j2
+++ b/dockers/docker-fpm-frr/frr/zebra/zebra.interfaces.conf.j2
@@ -24,5 +24,13 @@ interface {{ pc }}
 link-detect
 !
 {% endfor %}
+{% if (DEVICE_METADATA is defined) and ('localhost' in DEVICE_METADATA) and ('subtype' in DEVICE_METADATA['localhost']) and (DEVICE_METADATA['localhost']['subtype'].lower() == 'dualtor') %}
+! Disable link-detect on VLAN interfaces for dualtor
+{% for (name, prefix) in VLAN_INTERFACE|pfx_filter|unique(attribute=0) %}
+interface {{ name }}
+no link-detect
+!
+{% endfor %}
+{% endif %}
 {% endblock interfaces %}
 !
diff --git a/src/sonic-config-engine/tests/sample_output/py2/zebra_frr_dualtor.conf b/src/sonic-config-engine/tests/sample_output/py2/zebra_frr_dualtor.conf
new file mode 100644
index 000000000..0f49b229b
--- /dev/null
+++ b/src/sonic-config-engine/tests/sample_output/py2/zebra_frr_dualtor.conf
@@ -0,0 +1,49 @@
+!
+! =========== Managed by sonic-cfggen DO NOT edit manually! ====================
+! generated by templates/zebra/zebra.conf.j2 using config DB data
+! file: zebra.conf
+!
+!
+! Force disable next hop group support
+no zebra nexthop kernel enable
+! Uses the old known FPM behavior of including next hop information in the route (e.g. RTM_NEWROUTE) messages
+no fpm use-next-hop-groups
+!
+fpm address 127.0.0.1
+!
+! template: common/daemons.common.conf.j2
+!
+hostname switch-t0
+password zebra
+enable password zebra
+!
+log syslog informational
+log facility local4
+!
+! end of template: common/daemons.common.conf.j2!
+!
+!
+! Enable nht through default route
+ip nht resolve-via-default
+ipv6 nht resolve-via-default
+! Enable link-detect (default disabled)
+interface PortChannel03
+link-detect
+!
+interface PortChannel02
+link-detect
+!
+interface PortChannel01
+link-detect
+!
+interface PortChannel04
+link-detect
+!
+! Disable link-detect on VLAN interfaces for dualtor
+interface Vlan2000
+no link-detect
+!
+interface Vlan1000
+no link-detect
+!
+!!
diff --git a/src/sonic-config-engine/tests/sample_output/py3/zebra_frr_dualtor.conf b/src/sonic-config-engine/tests/sample_output/py3/zebra_frr_dualtor.conf
new file mode 100644
index 000000000..2741ba54c
--- /dev/null
+++ b/src/sonic-config-engine/tests/sample_output/py3/zebra_frr_dualtor.conf
@@ -0,0 +1,49 @@
+!
+! =========== Managed by sonic-cfggen DO NOT edit manually! ====================
+! generated by templates/zebra/zebra.conf.j2 using config DB data
+! file: zebra.conf
+!
+!
+! Force disable next hop group support
+no zebra nexthop kernel enable
+! Uses the old known FPM behavior of including next hop information in the route (e.g. RTM_NEWROUTE) messages
+no fpm use-next-hop-groups
+!
+fpm address 127.0.0.1
+!
+! template: common/daemons.common.conf.j2
+!
+hostname switch-t0
+password zebra
+enable password zebra
+!
+log syslog informational
+log facility local4
+!
+! end of template: common/daemons.common.conf.j2!
+!
+!
+! Enable nht through default route
+ip nht resolve-via-default
+ipv6 nht resolve-via-default
+! Enable link-detect (default disabled)
+interface PortChannel01
+link-detect
+!
+interface PortChannel02
+link-detect
+!
+interface PortChannel03
+link-detect
+!
+interface PortChannel04
+link-detect
+!
+! Disable link-detect on VLAN interfaces for dualtor
+interface Vlan1000
+no link-detect
+!
+interface Vlan2000
+no link-detect
+!
+!!
diff --git a/src/sonic-config-engine/tests/test_frr.py b/src/sonic-config-engine/tests/test_frr.py
index 3b89f9452..92deef922 100644
--- a/src/sonic-config-engine/tests/test_frr.py
+++ b/src/sonic-config-engine/tests/test_frr.py
@@ -74,3 +74,7 @@ def test_zebra_frr(self):
     def test_bgpd_frr_dualtor(self):
         extra_data = {"DEVICE_METADATA": {"localhost": {"subtype": "DualToR"}}}
         self.assertTrue(*self.run_case('bgpd/bgpd.conf.j2', 'bgpd_frr_dualtor.conf', extra_data=extra_data))
+
+    def test_zebra_frr_dualtor(self):
+        extra_data = {"DEVICE_METADATA": {"localhost": {"subtype": "DualToR"}}}
+        self.assertTrue(*self.run_case('zebra/zebra.conf.j2', 'zebra_frr_dualtor.conf', extra_data=extra_data))

From 9516c67be03f7d2086c506d479c8c815185910e6 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Fri, 19 Jan 2024 16:34:51 +0800
Subject: [PATCH 0161/1115] [submodule] Update submodule sonic-mgmt-framework
 to the latest HEAD automatically (#17852)

#### Why I did it
src/sonic-mgmt-framework
```
* 796eb59 - (HEAD -> master, origin/master, origin/HEAD) OpenAPI 3.0 upgrade, swagger tool chain update (8 hours ago) [Mohammed Faraaz]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-mgmt-framework | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-mgmt-framework b/src/sonic-mgmt-framework
index ca0656ca2..796eb5915 160000
--- a/src/sonic-mgmt-framework
+++ b/src/sonic-mgmt-framework
@@ -1 +1 @@
-Subproject commit ca0656ca2f1a982133ed7b69982de1f79a1213c9
+Subproject commit 796eb591554b243da51933bb516b32da155e12f0

From 4b57845f86400b0bec035c297f5cd9966f2eda98 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Fri, 19 Jan 2024 16:34:59 +0800
Subject: [PATCH 0162/1115] [submodule] Update submodule sonic-host-services to
 the latest HEAD automatically (#17850)

#### Why I did it
src/sonic-host-services
```
* 970e7b3 - (HEAD -> master, origin/master, origin/HEAD) Fix sonic host service (#101) (5 hours ago) [ganglv]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-host-services | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-host-services b/src/sonic-host-services
index 722b7962f..970e7b34d 160000
--- a/src/sonic-host-services
+++ b/src/sonic-host-services
@@ -1 +1 @@
-Subproject commit 722b7962f95e8d602a9a60e77356826e9f68891c
+Subproject commit 970e7b34dec888c4f32a728146cba27ddafb37ba

From c014eec6272f54a36cb12e592a933cf9cfeafca9 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Fri, 19 Jan 2024 16:35:03 +0800
Subject: [PATCH 0163/1115] [submodule] Update submodule sonic-gnmi to the
 latest HEAD automatically (#17848)

#### Why I did it
src/sonic-gnmi
```
* 07a64ab - (HEAD -> master, origin/master, origin/HEAD) Azp: install sonic yangs during pipline build (8 hours ago) [Sachin Holla]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-gnmi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-gnmi b/src/sonic-gnmi
index c44d15474..07a64ab46 160000
--- a/src/sonic-gnmi
+++ b/src/sonic-gnmi
@@ -1 +1 @@
-Subproject commit c44d154742722e5d9605aab946b6bb9881475f47
+Subproject commit 07a64ab46d0713ac7d2ad640cc99461b40fa6d7c

From fd08edf82fc440b2e9d5b139ed6fb589eb32d9a4 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Fri, 19 Jan 2024 16:35:07 +0800
Subject: [PATCH 0164/1115] [submodule] Update submodule sonic-dash-api to the
 latest HEAD automatically (#17847)

#### Why I did it
src/sonic-dash-api
```
* 8f481de - (HEAD -> master, origin/master, origin/HEAD) [misc]: Add utils CLI (#12) (24 hours ago) [Ze Gan]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-dash-api | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-dash-api b/src/sonic-dash-api
index 910814ffb..8f481de41 160000
--- a/src/sonic-dash-api
+++ b/src/sonic-dash-api
@@ -1 +1 @@
-Subproject commit 910814ffb4fd2e44e183d8d92086a724c62f5f1d
+Subproject commit 8f481de41a82366a49ebcae71288d51792aebd25

From fcceb3fcebbd6bb3e3929088ec21a2ed36e3d858 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Fri, 19 Jan 2024 18:35:57 +0800
Subject: [PATCH 0165/1115] [submodule] Update submodule sonic-swss to the
 latest HEAD automatically (#17854)

#### Why I did it
src/sonic-swss
```
* 09ffb25d - (HEAD -> master, origin/master, origin/HEAD) [RouteOrch] Publish route state for route to Loopback interface (#3013) (58 minutes ago) [Stepan Blyshchak]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-swss | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-swss b/src/sonic-swss
index 7702b8a2f..09ffb25d8 160000
--- a/src/sonic-swss
+++ b/src/sonic-swss
@@ -1 +1 @@
-Subproject commit 7702b8a2fb6306cfb61ea970b4498ce8534f0abb
+Subproject commit 09ffb25d8746495342a7c433a30c3a8c5326e643

From 6a8aea8d50f8c1c160c58fa7bda00ed5b4ba35b8 Mon Sep 17 00:00:00 2001
From: Zhijian Li <zhijianli@microsoft.com>
Date: Sat, 20 Jan 2024 01:11:52 +0800
Subject: [PATCH 0166/1115] [docker-sonic-mgmt] Upgrade scapy to 2.5.0 (#17738)

---
 dockers/docker-sonic-mgmt/Dockerfile.j2 | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/dockers/docker-sonic-mgmt/Dockerfile.j2 b/dockers/docker-sonic-mgmt/Dockerfile.j2
index 3efb3e599..152613a9c 100755
--- a/dockers/docker-sonic-mgmt/Dockerfile.j2
+++ b/dockers/docker-sonic-mgmt/Dockerfile.j2
@@ -98,7 +98,7 @@ RUN python3 -m pip install aiohttp \
                  retry \
                  rpyc \
                  scandir \
-                 scapy==2.4.5 \
+                 scapy==2.5.0 \
                  setuptools-rust \
                  six \
                  snappi==0.9.1 \
@@ -182,7 +182,7 @@ RUN python2 -m pip install allure-pytest==2.8.22 \
                 retry \
                 rpyc \
                 scandir \
-                scapy==2.4.5 \
+                scapy==2.5.0 \
                 six \
                 snappi==0.9.1 \
                 snappi-convergence==0.4.1 \
@@ -334,7 +334,7 @@ RUN python3 -m pip install aiohttp \
                            retry \
                            rpyc \
                            scandir \
-                           scapy==2.4.5 \
+                           scapy==2.5.0 \
                            setuptools-rust \
                            six \
                            snappi==0.9.1 \

From 3da08d340ce61448556fe668c70d1bc481bf199e Mon Sep 17 00:00:00 2001
From: Mai Bui <maibui@microsoft.com>
Date: Fri, 19 Jan 2024 13:49:44 -0500
Subject: [PATCH 0167/1115] [docker-iccpd] limit privileged flag for iccpd
 container (#17835)

### Why I did it
HLD implementation: Container Hardening (https://github.com/sonic-net/SONiC/pull/1364)
##### Work item tracking
- Microsoft ADO **(number only)**: 14807420
#### How I did it
Reduce linux capabilities in privileged flag

#### How to verify it
Check container's settings: Privileged is false and container only has default Linux caps, does not have extended caps.
```
admin@vlab-01:~$ docker inspect iccpd | grep Privi
            "Privileged": false,


admin@vlab-01:~$ docker exec -it iccpd bash
root@vlab-01:/# capsh --print
Current: cap_chown,cap_dac_override,cap_fowner,cap_fsetid,cap_kill,cap_setgid,cap_setuid,cap_setpcap,cap_net_bind_service,cap_net_raw,cap_sys_chroot,cap_mknod,cap_audit_write,cap_setfcap=ep
```
---
 rules/docker-iccpd.mk | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/rules/docker-iccpd.mk b/rules/docker-iccpd.mk
index e9f280499..3b94dec42 100644
--- a/rules/docker-iccpd.mk
+++ b/rules/docker-iccpd.mk
@@ -21,7 +21,7 @@ SONIC_INSTALL_DOCKER_DBG_IMAGES += $(DOCKER_ICCPD_DBG)
 endif
 
 $(DOCKER_ICCPD)_CONTAINER_NAME = iccpd
-$(DOCKER_ICCPD)_RUN_OPT += --privileged -t
+$(DOCKER_ICCPD)_RUN_OPT += -t
 $(DOCKER_ICCPD)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro
 $(DOCKER_ICCPD)_RUN_OPT += -v /etc/timezone:/etc/timezone:ro 
 

From 96ae68fedf7016ec996572172c7b0abc292a4ef9 Mon Sep 17 00:00:00 2001
From: Saikrishna Arcot <sarcot@microsoft.com>
Date: Fri, 19 Jan 2024 17:25:31 -0800
Subject: [PATCH 0168/1115] Fix docker-base-bookworm build (#17795)

* Add missing pip.conf for docker-base-bookworm

Signed-off-by: Saikrishna Arcot <sarcot@microsoft.com>
---
 dockers/docker-base-bookworm/Dockerfile.j2        | 5 ++---
 dockers/docker-base-bookworm/apt-multiple-retries | 4 ----
 dockers/docker-base-bookworm/pip.conf             | 2 ++
 3 files changed, 4 insertions(+), 7 deletions(-)
 delete mode 100644 dockers/docker-base-bookworm/apt-multiple-retries
 create mode 100644 dockers/docker-base-bookworm/pip.conf

diff --git a/dockers/docker-base-bookworm/Dockerfile.j2 b/dockers/docker-base-bookworm/Dockerfile.j2
index cad47da40..e500259bb 100644
--- a/dockers/docker-base-bookworm/Dockerfile.j2
+++ b/dockers/docker-base-bookworm/Dockerfile.j2
@@ -1,9 +1,9 @@
 {% set prefix = DEFAULT_CONTAINER_REGISTRY %}
 {% from "dockers/dockerfile-macros.j2" import install_debian_packages, install_python_wheels, copy_files %}
 {% if CONFIGURED_ARCH == "armhf" and (MULTIARCH_QEMU_ENVIRON == "y" or CROSS_BUILD_ENVIRON == "y") %}
-FROM {{ prefix }}multiarch/debian-debootstrap:armhf-bookworm
+FROM --platform=linux/arm/v7 {{ prefix }}debian:bookworm
 {% elif CONFIGURED_ARCH == "arm64" and (MULTIARCH_QEMU_ENVIRON == "y" or CROSS_BUILD_ENVIRON == "y") %}
-FROM {{ prefix }}multiarch/debian-debootstrap:arm64-bookworm
+FROM --platform=linux/arm64 {{ prefix }}debian:bookworm
 {% else %}
 FROM {{ prefix }}{{DOCKER_BASE_ARCH}}/debian:bookworm
 {% endif %}
@@ -30,7 +30,6 @@ COPY ["dpkg_01_drop", "/etc/dpkg/dpkg.cfg.d/01_drop"]
 COPY ["sources.list.{{ CONFIGURED_ARCH }}", "/etc/apt/sources.list"]
 COPY ["no_install_recommend_suggest", "/etc/apt/apt.conf.d"]
 COPY ["no-check-valid-until", "/etc/apt/apt.conf.d"]
-COPY ["apt-multiple-retries", "/etc/apt/apt.conf.d"]
 
 # Update apt cache and
 # pre-install fundamental packages
diff --git a/dockers/docker-base-bookworm/apt-multiple-retries b/dockers/docker-base-bookworm/apt-multiple-retries
deleted file mode 100644
index c4c638252..000000000
--- a/dockers/docker-base-bookworm/apt-multiple-retries
+++ /dev/null
@@ -1,4 +0,0 @@
-# Instruct apt to retry downloads on failures
-# This is required only for bullseye.
-
-Acquire::Retries "3";
diff --git a/dockers/docker-base-bookworm/pip.conf b/dockers/docker-base-bookworm/pip.conf
new file mode 100644
index 000000000..9d54ef902
--- /dev/null
+++ b/dockers/docker-base-bookworm/pip.conf
@@ -0,0 +1,2 @@
+[global]
+break-system-packages = true

From ac09abd72a486f93f4ac7514942c006398cfdd0b Mon Sep 17 00:00:00 2001
From: Nazarii Hnydyn <nazariig@nvidia.com>
Date: Sat, 20 Jan 2024 07:52:30 +0200
Subject: [PATCH 0169/1115] [sonic-cfggen]: Optimize template rendering and
 database access. (#17740)

#### Why I did it
* Improved switch init time

### How I did it
* Replaced: `sonic-cfggen` -> `sonic-db-cli`
* Aggregated template list for `sonic-cfggen`

#### How to verify it
1. Run `warm-reboot`
---
 dockers/docker-database/docker-database-init.sh | 10 ++++++----
 dockers/docker-orchagent/docker-init.j2         |  4 ++--
 2 files changed, 8 insertions(+), 6 deletions(-)

diff --git a/dockers/docker-database/docker-database-init.sh b/dockers/docker-database/docker-database-init.sh
index 9fe5ae242..f6f8522bb 100755
--- a/dockers/docker-database/docker-database-init.sh
+++ b/dockers/docker-database/docker-database-init.sh
@@ -63,8 +63,9 @@ if [[ $DATABASE_TYPE == "chassisdb" ]]; then
     echo "Init docker-database-chassis..."
     update_chassisdb_config -j $db_cfg_file_tmp -k -p $chassis_db_port
     # generate all redis server supervisord configuration file
-    sonic-cfggen -j $db_cfg_file_tmp -t /usr/share/sonic/templates/supervisord.conf.j2 > /etc/supervisor/conf.d/supervisord.conf
-    sonic-cfggen -j $db_cfg_file_tmp -t /usr/share/sonic/templates/critical_processes.j2 > /etc/supervisor/critical_processes
+    sonic-cfggen -j $db_cfg_file_tmp \
+    -t /usr/share/sonic/templates/supervisord.conf.j2,/etc/supervisor/conf.d/supervisord.conf \
+    -t /usr/share/sonic/templates/critical_processes.j2,/etc/supervisor/critical_processes
     rm $db_cfg_file_tmp
     exec /usr/local/bin/supervisord
     exit 0
@@ -81,8 +82,9 @@ then
 fi
 # delete chassisdb config to generate supervisord config
 update_chassisdb_config -j $db_cfg_file_tmp -d
-sonic-cfggen -j $db_cfg_file_tmp -t /usr/share/sonic/templates/supervisord.conf.j2 > /etc/supervisor/conf.d/supervisord.conf
-sonic-cfggen -j $db_cfg_file_tmp -t /usr/share/sonic/templates/critical_processes.j2 > /etc/supervisor/critical_processes
+sonic-cfggen -j $db_cfg_file_tmp \
+-t /usr/share/sonic/templates/supervisord.conf.j2,/etc/supervisor/conf.d/supervisord.conf \
+-t /usr/share/sonic/templates/critical_processes.j2,/etc/supervisor/critical_processes
 
 if [[ "$start_chassis_db" != "1" ]] && [[ -z "$chassis_db_address" ]]; then
      cp $db_cfg_file_tmp $db_cfg_file
diff --git a/dockers/docker-orchagent/docker-init.j2 b/dockers/docker-orchagent/docker-init.j2
index 1e8574de1..41dbe2728 100755
--- a/dockers/docker-orchagent/docker-init.j2
+++ b/dockers/docker-orchagent/docker-init.j2
@@ -23,8 +23,8 @@ CFGGEN_PARAMS=" \
     -t /usr/share/sonic/templates/wait_for_link.sh.j2,/usr/bin/wait_for_link.sh \
 "
 VLAN=$(sonic-cfggen $CFGGEN_PARAMS)
-SUBTYPE=$(sonic-cfggen -d -v "DEVICE_METADATA['localhost']['subtype']")
-SWITCH_TYPE=${SWITCH_TYPE:-`sonic-cfggen -d -v "DEVICE_METADATA['localhost']['switch_type']"`}
+SUBTYPE=$(sonic-db-cli -s CONFIG_DB HGET 'DEVICE_METADATA|localhost' 'subtype')
+SWITCH_TYPE=${SWITCH_TYPE:-`sonic-db-cli -s CONFIG_DB HGET 'DEVICE_METADATA|localhost' 'switch_type'`}
 chmod +x /usr/bin/wait_for_link.sh
 
 # Executed platform specific initialization tasks.

From da0f4ace7afe6baa074965bfe6ec7b2cbc87ee90 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sat, 20 Jan 2024 16:32:41 +0800
Subject: [PATCH 0170/1115] [submodule] Update submodule sonic-swss-common to
 the latest HEAD automatically (#17864)

#### Why I did it
src/sonic-swss-common
```
* ad4d386 - (HEAD -> master, origin/master, origin/HEAD) Add support of 'with' statement to ConfigDBConnector (#838) (19 hours ago) [Hua Liu]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-swss-common | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-swss-common b/src/sonic-swss-common
index 2711f6f98..ad4d38670 160000
--- a/src/sonic-swss-common
+++ b/src/sonic-swss-common
@@ -1 +1 @@
-Subproject commit 2711f6f98e14796086f8d8cb11dda327bb2bd439
+Subproject commit ad4d3867050c4d13f9cc4ffaca8919bd7ab3f6b4

From 91d77fe7ae64ff82d728ba093ff3f26bab0c4daf Mon Sep 17 00:00:00 2001
From: Junchao-Mellanox <57339448+Junchao-Mellanox@users.noreply.github.com>
Date: Mon, 22 Jan 2024 22:22:07 +0800
Subject: [PATCH 0171/1115] Fix error log while creating PSU thermal object
 (#17789)

- Why I did it
If a PSU is not present, there could be error log while restarting psud or thermalctld:

Jan  8 17:15:52.689616 sonic ERR pmon#psud: Thermal sysfs /run/hw-management/thermal/psu2_temp1_max does not exist

Jan  8 17:15:57.747723 sonic ERR pmon#thermalctld: Thermal sysfs /run/hw-management/thermal/psu2_temp1 does not exist

- How I did it
if a PSU is not present, we should not check the PSU temperature sysfs.
---
 .../sonic_platform/thermal.py                 | 20 +++++++++++--------
 1 file changed, 12 insertions(+), 8 deletions(-)

diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/thermal.py b/platform/mellanox/mlnx-platform-api/sonic_platform/thermal.py
index 180310952..7ac703b78 100644
--- a/platform/mellanox/mlnx-platform-api/sonic_platform/thermal.py
+++ b/platform/mellanox/mlnx-platform-api/sonic_platform/thermal.py
@@ -1,5 +1,5 @@
 #
-# Copyright (c) 2019-2023 NVIDIA CORPORATION & AFFILIATES.
+# Copyright (c) 2019-2024 NVIDIA CORPORATION & AFFILIATES.
 # Apache-2.0
 #
 # Licensed under the Apache License, Version 2.0 (the "License");
@@ -220,15 +220,15 @@ def create_indexable_thermal(rule, index, sysfs_folder, position, presence_cb=No
     name = rule['name'].format(index)
     sysfs_folder = rule.get('sysfs_folder', sysfs_folder)
     temp_file = os.path.join(sysfs_folder, rule['temperature'].format(index))
-    _check_thermal_sysfs_existence(temp_file)
+    _check_thermal_sysfs_existence(temp_file, presence_cb)
     if 'high_threshold' in rule:
         high_th_file = os.path.join(sysfs_folder, rule['high_threshold'].format(index))
-        _check_thermal_sysfs_existence(high_th_file)
+        _check_thermal_sysfs_existence(high_th_file, presence_cb)
     else:
         high_th_file = None
     if 'high_critical_threshold' in rule:
         high_crit_th_file = os.path.join(sysfs_folder, rule['high_critical_threshold'].format(index))
-        _check_thermal_sysfs_existence(high_crit_th_file)
+        _check_thermal_sysfs_existence(high_crit_th_file, presence_cb)
     else:
         high_crit_th_file = None
     high_th_default = rule.get('high_threshold_default')
@@ -253,15 +253,15 @@ def create_single_thermal(rule, sysfs_folder, position, presence_cb=None):
 
     sysfs_folder = rule.get('sysfs_folder', sysfs_folder)
     temp_file = os.path.join(sysfs_folder, temp_file)
-    _check_thermal_sysfs_existence(temp_file)
+    _check_thermal_sysfs_existence(temp_file, presence_cb)
     if 'high_threshold' in rule:
         high_th_file = os.path.join(sysfs_folder, rule['high_threshold'])
-        _check_thermal_sysfs_existence(high_th_file)
+        _check_thermal_sysfs_existence(high_th_file, presence_cb)
     else:
         high_th_file = None
     if 'high_critical_threshold' in rule:
         high_crit_th_file = os.path.join(sysfs_folder, rule['high_critical_threshold'])
-        _check_thermal_sysfs_existence(high_crit_th_file)
+        _check_thermal_sysfs_existence(high_crit_th_file, presence_cb)
     else:
         high_crit_th_file = None
     high_th_default = rule.get('high_threshold_default')
@@ -274,7 +274,11 @@ def create_single_thermal(rule, sysfs_folder, position, presence_cb=None):
         return RemovableThermal(name, temp_file, high_th_file, high_crit_th_file, high_th_default, high_crit_th_default, scale, position, presence_cb)
 
 
-def _check_thermal_sysfs_existence(file_path):
+def _check_thermal_sysfs_existence(file_path, presence_cb):
+    if presence_cb:
+        status, _ = presence_cb()
+        if not status:
+            return
     if not os.path.exists(file_path):
         logger.log_error('Thermal sysfs {} does not exist'.format(file_path))
 

From c274be2e5999b307f965edea6fb380b3957efc97 Mon Sep 17 00:00:00 2001
From: Hua Liu <58683130+liuh-80@users.noreply.github.com>
Date: Tue, 23 Jan 2024 01:59:12 +0800
Subject: [PATCH 0172/1115] Fix IPV6 forced-mgmt-route not work issue (#17299)

ix IPV6 forced-mgmt-route not work issue

Why I did it
IPV6 forced-mgmt-route not work

When add a IPV6 route, should use 'ip -6 rule add pref 32764 address' command, but currently in the template the '-6' parameter are missing, so the IPV6 route been add to IPV4 route table.

Also this PR depends on #17281 , which will fix the IPV6 'default' route table missing in IPV6 route lookup issue.

Microsoft ADO (number only):24719238
---
 files/image_config/interfaces/interfaces.j2   |  4 +--
 src/sonic-config-engine/minigraph.py          | 30 +++++++++++++++++--
 .../tests/sample_output/py2/mvrf_interfaces   | 10 ++++---
 .../tests/sample_output/py3/mvrf_interfaces   | 10 ++++---
 .../tests/t0-sample-graph-mvrf.xml            |  2 +-
 5 files changed, 43 insertions(+), 13 deletions(-)

diff --git a/files/image_config/interfaces/interfaces.j2 b/files/image_config/interfaces/interfaces.j2
index 3702eb1f6..a75b617f1 100644
--- a/files/image_config/interfaces/interfaces.j2
+++ b/files/image_config/interfaces/interfaces.j2
@@ -86,7 +86,7 @@ iface {{ name }} {{ 'inet' if prefix | ipv4 else 'inet6' }} static
     up ip {{ '-4' if prefix | ipv4 else '-6' }} route add {{ prefix | network }}/{{ prefix | prefixlen }} dev {{ name }} table {{ vrf_table }}
     up ip {{ '-4' if prefix | ipv4 else '-6' }} rule add pref {{ force_mgmt_route_priority + 1 }} from {{ prefix | ip }}/{{ '32' if prefix | ipv4 else '128' }} table {{ vrf_table }}
 {% for route in MGMT_INTERFACE[(name, prefix)]['forced_mgmt_routes'] %}
-    up ip rule add pref {{ force_mgmt_route_priority }} to {{ route }} table {{ vrf_table }}
+    up ip {{ '-4' if prefix | ipv4 else '-6' }} rule add pref {{ force_mgmt_route_priority }} to {{ route }} table {{ vrf_table }}
 {% endfor %}
 {% if prefix | ipv6 and vrf_table == 'default'%}
     # IPV6 default table not add to lookup by default, management server need this to access IPV6 address when BGP shutdown
@@ -97,7 +97,7 @@ iface {{ name }} {{ 'inet' if prefix | ipv4 else 'inet6' }} static
     pre-down ip {{ '-4' if prefix | ipv4 else '-6' }} route delete {{ prefix | network }}/{{ prefix | prefixlen }} dev {{ name }} table {{ vrf_table }}
     pre-down ip {{ '-4' if prefix | ipv4 else '-6' }} rule delete pref {{ force_mgmt_route_priority + 1 }} from {{ prefix | ip }}/{{ '32' if prefix | ipv4 else '128' }} table {{ vrf_table }}
 {% for route in MGMT_INTERFACE[(name, prefix)]['forced_mgmt_routes'] %}
-    pre-down ip rule delete pref {{ force_mgmt_route_priority }} to {{ route }} table {{ vrf_table }}
+    pre-down ip {{ '-4' if route | ipv4 else '-6' }} rule delete pref {{ force_mgmt_route_priority }} to {{ route }} table {{ vrf_table }}
 {% endfor %}
 {% if prefix | ipv6 and vrf_table == 'default'%}
     pre-down ip -6 rule delete pref {{ force_mgmt_route_priority + 3 }} lookup {{ vrf_table }}
diff --git a/src/sonic-config-engine/minigraph.py b/src/sonic-config-engine/minigraph.py
index bd7cb163d..e13a17f43 100644
--- a/src/sonic-config-engine/minigraph.py
+++ b/src/sonic-config-engine/minigraph.py
@@ -1459,6 +1459,33 @@ def select_mmu_profiles(profile, platform, hwsku):
                 base_file = os.path.join(path, file_item)
                 exec_cmd(["sudo", "cp", file_in_dir, base_file])
 
+def address_type(address):
+    # encode and decode to unicode, because when address is bytes type, ip_network will throw AddressValueError
+    # set strict to False because address may set host bit, for example 192.168.0.1/24
+    return type(ipaddress.ip_network(UNICODE_TYPE(address), False))
+
+def update_forced_mgmt_route(mgmt_intf, mgmt_routes):
+    for mgmt_intf_key in mgmt_intf.keys():
+        forced_mgmt_routes = []
+
+        try:
+            # get mgmt interface type
+            mgmt_intf_addr = mgmt_intf_key[1]
+            mgmt_iftype = address_type(mgmt_intf_addr)
+
+            # add mgmt route to different mgmt interface by address type
+            for mgmt_route in mgmt_routes:
+                route_iftype = address_type(mgmt_route)
+                if mgmt_iftype == route_iftype:
+                    forced_mgmt_routes.append(mgmt_route)
+        except ValueError as e:
+            print("Warning: invalid management routes in minigraph, exception: {}".format(e), file=sys.stderr)
+            continue
+
+        # forced_mgmt_routes yang model not support empty list
+        if len(forced_mgmt_routes) > 0:
+            mgmt_intf[mgmt_intf_key]['forced_mgmt_routes'] = forced_mgmt_routes
+
 ###############################################################################
 #
 # Main functions
@@ -1700,8 +1727,7 @@ def parse_xml(filename, platform=None, port_config_file=None, asic_name=None, hw
     results['BGP_VOQ_CHASSIS_NEIGHBOR'] = bgp_voq_chassis_sessions
     results['BGP_SENTINELS'] = bgp_sentinel_sessions
     if mgmt_routes:
-        # TODO: differentiate v4 and v6
-        next(iter(mgmt_intf.values()))['forced_mgmt_routes'] = mgmt_routes
+        update_forced_mgmt_route(mgmt_intf, mgmt_routes)
     results['MGMT_PORT'] = {}
     results['MGMT_INTERFACE'] = {}
     mgmt_intf_count = 0
diff --git a/src/sonic-config-engine/tests/sample_output/py2/mvrf_interfaces b/src/sonic-config-engine/tests/sample_output/py2/mvrf_interfaces
index 1c33cfe81..518fbb038 100644
--- a/src/sonic-config-engine/tests/sample_output/py2/mvrf_interfaces
+++ b/src/sonic-config-engine/tests/sample_output/py2/mvrf_interfaces
@@ -34,14 +34,14 @@ iface eth0 inet static
     up ip -4 route add default via 10.0.0.1 dev eth0 table 5000 metric 201
     up ip -4 route add 10.0.0.0/24 dev eth0 table 5000
     up ip -4 rule add pref 32765 from 10.0.0.100/32 table 5000
-    up ip rule add pref 32764 to 11.11.11.11 table 5000
-    up ip rule add pref 32764 to 22.22.22.0/23 table 5000
+    up ip -4 rule add pref 32764 to 11.11.11.11 table 5000
+    up ip -4 rule add pref 32764 to 22.22.22.0/23 table 5000
     # management port down rules
     pre-down ip -4 route delete default via 10.0.0.1 dev eth0 table 5000
     pre-down ip -4 route delete 10.0.0.0/24 dev eth0 table 5000
     pre-down ip -4 rule delete pref 32765 from 10.0.0.100/32 table 5000
-    pre-down ip rule delete pref 32764 to 11.11.11.11 table 5000
-    pre-down ip rule delete pref 32764 to 22.22.22.0/23 table 5000
+    pre-down ip -4 rule delete pref 32764 to 11.11.11.11 table 5000
+    pre-down ip -4 rule delete pref 32764 to 22.22.22.0/23 table 5000
 iface eth0 inet6 static
     address 2603:10e2:0:2902::8
     netmask 64
@@ -53,10 +53,12 @@ iface eth0 inet6 static
     up ip -6 route add default via 2603:10e2:0:2902::1 dev eth0 table 5000 metric 201
     up ip -6 route add 2603:10e2:0:2902::/64 dev eth0 table 5000
     up ip -6 rule add pref 32765 from 2603:10e2:0:2902::8/128 table 5000
+    up ip -6 rule add pref 32764 to 33:33:33::0/64 table 5000
     # management port down rules
     pre-down ip -6 route delete default via 2603:10e2:0:2902::1 dev eth0 table 5000
     pre-down ip -6 route delete 2603:10e2:0:2902::/64 dev eth0 table 5000
     pre-down ip -6 rule delete pref 32765 from 2603:10e2:0:2902::8/128 table 5000
+    pre-down ip -6 rule delete pref 32764 to 33:33:33::0/64 table 5000
 #
 source /etc/network/interfaces.d/*
 #
diff --git a/src/sonic-config-engine/tests/sample_output/py3/mvrf_interfaces b/src/sonic-config-engine/tests/sample_output/py3/mvrf_interfaces
index 1c33cfe81..518fbb038 100644
--- a/src/sonic-config-engine/tests/sample_output/py3/mvrf_interfaces
+++ b/src/sonic-config-engine/tests/sample_output/py3/mvrf_interfaces
@@ -34,14 +34,14 @@ iface eth0 inet static
     up ip -4 route add default via 10.0.0.1 dev eth0 table 5000 metric 201
     up ip -4 route add 10.0.0.0/24 dev eth0 table 5000
     up ip -4 rule add pref 32765 from 10.0.0.100/32 table 5000
-    up ip rule add pref 32764 to 11.11.11.11 table 5000
-    up ip rule add pref 32764 to 22.22.22.0/23 table 5000
+    up ip -4 rule add pref 32764 to 11.11.11.11 table 5000
+    up ip -4 rule add pref 32764 to 22.22.22.0/23 table 5000
     # management port down rules
     pre-down ip -4 route delete default via 10.0.0.1 dev eth0 table 5000
     pre-down ip -4 route delete 10.0.0.0/24 dev eth0 table 5000
     pre-down ip -4 rule delete pref 32765 from 10.0.0.100/32 table 5000
-    pre-down ip rule delete pref 32764 to 11.11.11.11 table 5000
-    pre-down ip rule delete pref 32764 to 22.22.22.0/23 table 5000
+    pre-down ip -4 rule delete pref 32764 to 11.11.11.11 table 5000
+    pre-down ip -4 rule delete pref 32764 to 22.22.22.0/23 table 5000
 iface eth0 inet6 static
     address 2603:10e2:0:2902::8
     netmask 64
@@ -53,10 +53,12 @@ iface eth0 inet6 static
     up ip -6 route add default via 2603:10e2:0:2902::1 dev eth0 table 5000 metric 201
     up ip -6 route add 2603:10e2:0:2902::/64 dev eth0 table 5000
     up ip -6 rule add pref 32765 from 2603:10e2:0:2902::8/128 table 5000
+    up ip -6 rule add pref 32764 to 33:33:33::0/64 table 5000
     # management port down rules
     pre-down ip -6 route delete default via 2603:10e2:0:2902::1 dev eth0 table 5000
     pre-down ip -6 route delete 2603:10e2:0:2902::/64 dev eth0 table 5000
     pre-down ip -6 rule delete pref 32765 from 2603:10e2:0:2902::8/128 table 5000
+    pre-down ip -6 rule delete pref 32764 to 33:33:33::0/64 table 5000
 #
 source /etc/network/interfaces.d/*
 #
diff --git a/src/sonic-config-engine/tests/t0-sample-graph-mvrf.xml b/src/sonic-config-engine/tests/t0-sample-graph-mvrf.xml
index 3fd73f736..996720ba2 100644
--- a/src/sonic-config-engine/tests/t0-sample-graph-mvrf.xml
+++ b/src/sonic-config-engine/tests/t0-sample-graph-mvrf.xml
@@ -787,7 +787,7 @@
           <a:DeviceProperty>
             <a:Name>ForcedMgmtRoutes</a:Name>
             <a:Reference i:nil="true"/>
-            <a:Value>11.11.11.11;22.22.22.0/23</a:Value>
+            <a:Value>11.11.11.11;22.22.22.0/23;33:33:33::0/64</a:Value>
           </a:DeviceProperty>
           <a:DeviceProperty>
             <a:Name>ErspanDestinationIpv4</a:Name>

From 927dde73f12629f3a4da84a729fa6ea65cad9676 Mon Sep 17 00:00:00 2001
From: dbarashinvd <105214075+dbarashinvd@users.noreply.github.com>
Date: Mon, 22 Jan 2024 20:53:55 +0200
Subject: [PATCH 0173/1115] fix low polarity wrong value for hw_reset deassert
 and seek(0) before reading sysfs upon poll event (#17627)

* fix hw_reset low polarity (reverse values)

* move seek to beginning of sysfs fd before reading to resolve power_good
sysfs returns empty upon plug out cable
---
 .../mlnx-platform-api/sonic_platform/modules_mgmt.py       | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/modules_mgmt.py b/platform/mellanox/mlnx-platform-api/sonic_platform/modules_mgmt.py
index 470b39acb..f69d00772 100644
--- a/platform/mellanox/mlnx-platform-api/sonic_platform/modules_mgmt.py
+++ b/platform/mellanox/mlnx-platform-api/sonic_platform/modules_mgmt.py
@@ -279,8 +279,8 @@ def run(self):
                     module_fd_path = module_obj.module_power_good_fd_path
                 self.fds_events_count_dict[module_obj.port_num][fd_name] += 1
                 try:
-                    val = module_fd.read()
                     module_fd.seek(0)
+                    val = module_fd.read()
                     logger.log_info("dynamic detection got module_obj {} with port {} from fd number {} path {} val {} count {}"
                                   .format(module_obj, module_obj.port_num, fd, module_fd_path
                                           , val, self.fds_events_count_dict[module_obj.port_num]))
@@ -450,8 +450,9 @@ def power_on_module(self, port, module_sm_obj, dynamic=False):
                     utils.write_file(module_fd_indep_path_po, "1")
                 if os.path.isfile(module_fd_indep_path_r):
                     logger.log_info("powerOnModule resetting via {} for port {}".format(module_fd_indep_path_r, port))
-                    # echo 0 > /sys/module/sx_core/$asic/$module/hw_reset
-                    utils.write_file(module_fd_indep_path_r, "0")
+                    # de-assert hw_reset - low polarity. 1 for de-assert 0 for assert
+                    # echo 1 > /sys/module/sx_core/$asic/$module/hw_reset
+                    utils.write_file(module_fd_indep_path_r, "1")
                 self.add_port_to_wait_reset(module_sm_obj)
             except Exception as e:
                 logger.log_info("exception in powerOnModule {} for port {}".format(e, port))

From ec3142032931fae6922e8859250463ce45827c40 Mon Sep 17 00:00:00 2001
From: Yaqiang Zhu <yaqiangzhu@microsoft.com>
Date: Tue, 23 Jan 2024 07:20:20 +0800
Subject: [PATCH 0174/1115] [dhcp_server] Fix parse_dpus error (#17870)

---
 .../dhcp_utilities/dhcpservd/dhcp_cfggen.py   |   2 +-
 .../mock_config_db_smart_switch.json          |  38 +++++-
 .../tests/test_dhcp_cfggen.py                 |  12 +-
 .../tests/test_smart_switch.py                | 116 ++++++++++++++++++
 4 files changed, 157 insertions(+), 11 deletions(-)

diff --git a/src/sonic-dhcp-utilities/dhcp_utilities/dhcpservd/dhcp_cfggen.py b/src/sonic-dhcp-utilities/dhcp_utilities/dhcpservd/dhcp_cfggen.py
index dc69281c3..9745f6626 100755
--- a/src/sonic-dhcp-utilities/dhcp_utilities/dhcpservd/dhcp_cfggen.py
+++ b/src/sonic-dhcp-utilities/dhcp_utilities/dhcpservd/dhcp_cfggen.py
@@ -70,7 +70,7 @@ def generate(self):
         # Parse dpu
         dpus_table = self.db_connector.get_config_db_table(DPUS)
         mid_plane_table = self.db_connector.get_config_db_table(MID_PLANE_BRIDGE)
-        mid_plane, dpus = self._parse_dpu(dpus_table, mid_plane_table) if smart_switch else {}, {}
+        mid_plane, dpus = self._parse_dpu(dpus_table, mid_plane_table) if smart_switch else ({}, {})
 
         dhcp_server_ipv4, customized_options_ipv4, range_ipv4, port_ipv4 = self._get_dhcp_ipv4_tables_from_db()
         # Parse range table
diff --git a/src/sonic-dhcp-utilities/tests/test_data/mock_config_db_smart_switch.json b/src/sonic-dhcp-utilities/tests/test_data/mock_config_db_smart_switch.json
index 365306033..06c3050a2 100644
--- a/src/sonic-dhcp-utilities/tests/test_data/mock_config_db_smart_switch.json
+++ b/src/sonic-dhcp-utilities/tests/test_data/mock_config_db_smart_switch.json
@@ -8,7 +8,7 @@
     "MID_PLANE_BRIDGE": {
         "GLOBAL": {
             "bridge": "bridge_midplane",
-            "address": "169.254.200.254/24"
+            "ip_prefix": "169.254.200.254/24"
         }
     },
     "DHCP_SERVER_IPV4": {
@@ -23,5 +23,41 @@
             "netmask": "255.255.255.0",
             "state": "enabled"
         }
+    },
+    "DHCP_SERVER_IPV4_PORT": {
+        "bridge_midplane|dpu0": {
+            "ips": [
+                "169.254.200.1"
+            ]
+        },
+        "bridge_midplane|dpu1": {
+            "ips": [
+                "169.254.200.2"
+            ]
+        },
+        "bridge_midplane|dpu2": {
+            "ips": [
+                "169.254.200.3"
+            ]
+        },
+        "bridge_midplane|dpu3": {
+            "ips": [
+                "169.254.200.4"
+            ]
+        }
+    },
+    "DPUS": {
+        "dpu0": {
+            "midplane_interface": "dpu0"
+        },
+        "dpu1": {
+            "midplane_interface": "dpu1"
+        },
+        "dpu2": {
+            "midplane_interface": "dpu2"
+        },
+        "dpu3": {
+            "midplane_interface": "dpu3"
+        }
     }
 }
diff --git a/src/sonic-dhcp-utilities/tests/test_dhcp_cfggen.py b/src/sonic-dhcp-utilities/tests/test_dhcp_cfggen.py
index 41ba6fb27..d2e6d11d3 100644
--- a/src/sonic-dhcp-utilities/tests/test_dhcp_cfggen.py
+++ b/src/sonic-dhcp-utilities/tests/test_dhcp_cfggen.py
@@ -324,22 +324,19 @@ def test_parse_port(test_config_db, mock_swsscommon_dbconnector_init, mock_get_r
                            if test_config_db == "mock_config_db.json" else set())
 
 
-@pytest.mark.parametrize("mid_plane", [{}, {"bridge": "mid_plane", "ip_prefix": "192.168.0.1/24"}])
-@pytest.mark.parametrize("is_smart_switch", [True, False])
-def test_generate(mock_swsscommon_dbconnector_init, mock_parse_port_map_alias, mock_get_render_template, mid_plane,
-                  is_smart_switch):
+def test_generate(mock_swsscommon_dbconnector_init, mock_parse_port_map_alias, mock_get_render_template):
     with patch.object(DhcpServCfgGenerator, "_parse_hostname"), \
          patch.object(DhcpServCfgGenerator, "_parse_vlan", return_value=({}, set(["Ethernet0"]))), \
          patch.object(DhcpServCfgGenerator, "_get_dhcp_ipv4_tables_from_db", return_value=(None, None, None, None)), \
          patch.object(DhcpServCfgGenerator, "_parse_range"), \
          patch.object(DhcpServCfgGenerator, "_parse_port", return_value=(None, set(["range1"]))), \
          patch.object(DhcpServCfgGenerator, "_parse_customized_options"), \
-         patch.object(DhcpServCfgGenerator, "_parse_dpu", side_effect=[mid_plane, set()]), \
+         patch.object(DhcpServCfgGenerator, "_parse_dpu", return_value=(set(), set())), \
          patch.object(DhcpServCfgGenerator, "_construct_obj_for_template",
                       return_value=(None, set(["Vlan1000"]), set(["option1"]), set(["dummy"]))), \
          patch.object(DhcpServCfgGenerator, "_render_config", return_value="dummy_config"), \
          patch.object(DhcpDbConnector, "get_config_db_table", side_effect=mock_get_config_db_table), \
-         patch("dhcp_utilities.dhcpservd.dhcp_cfggen.is_smart_switch", return_value=is_smart_switch):
+         patch("dhcp_utilities.dhcpservd.dhcp_cfggen.is_smart_switch", return_value=False):
         dhcp_db_connector = DhcpDbConnector()
         dhcp_cfg_generator = DhcpServCfgGenerator(dhcp_db_connector)
         kea_dhcp4_config, used_ranges, enabled_dhcp_interfaces, used_options, subscribe_table = \
@@ -349,9 +346,6 @@ def test_generate(mock_swsscommon_dbconnector_init, mock_parse_port_map_alias, m
         assert enabled_dhcp_interfaces == set(["Vlan1000"])
         assert used_options == set(["option1"])
         expected_tables = set(["dummy"])
-        if is_smart_switch:
-            expected_tables |= set(["DpusTableEventChecker", "MidPlaneTableEventChecker"])
-
         assert subscribe_table == expected_tables
 
 
diff --git a/src/sonic-dhcp-utilities/tests/test_smart_switch.py b/src/sonic-dhcp-utilities/tests/test_smart_switch.py
index 916b1e6c3..0835e6b7b 100644
--- a/src/sonic-dhcp-utilities/tests/test_smart_switch.py
+++ b/src/sonic-dhcp-utilities/tests/test_smart_switch.py
@@ -1,8 +1,106 @@
+import json
 import pytest
 from common_utils import MockConfigDb, dhcprelayd_refresh_dhcrelay_test, dhcprelayd_proceed_with_check_res_test
 from dhcp_utilities.dhcprelayd.dhcprelayd import DHCP_SERVER_CHECKER, MID_PLANE_CHECKER
+from dhcp_utilities.dhcpservd.dhcp_cfggen import DhcpServCfgGenerator
+from dhcp_utilities.common.utils import DhcpDbConnector
+from unittest.mock import patch
 
 MOCK_CONFIG_DB_PATH_SMART_SWITCH = "tests/test_data/mock_config_db_smart_switch.json"
+expected_kea_config = {
+    "Dhcp4": {
+        "hooks-libraries": [
+            {
+                "library": "/usr/local/lib/kea/hooks/libdhcp_run_script.so",
+                "parameters": {
+                    "name": "/etc/kea/lease_update.sh",
+                    "sync": False
+                }
+            }
+        ],
+        "interfaces-config": {
+            "interfaces": [
+                "eth0"
+            ]
+        },
+        "control-socket": {
+            "socket-type": "unix",
+            "socket-name": "/run/kea/kea4-ctrl-socket"
+        },
+        "lease-database": {
+            "type": "memfile",
+            "persist": True,
+            "name": "/tmp/kea-lease.csv",
+            "lfc-interval": 3600
+        },
+        "subnet4": [
+            {
+                "subnet": "169.254.200.0/24",
+                "pools": [
+                    {
+                        "pool": "169.254.200.1 - 169.254.200.1",
+                        "client-class": "sonic-host:dpu0"
+                    },
+                    {
+                        "pool": "169.254.200.2 - 169.254.200.2",
+                        "client-class": "sonic-host:dpu1"
+                    },
+                    {
+                        "pool": "169.254.200.3 - 169.254.200.3",
+                        "client-class": "sonic-host:dpu2"
+                    },
+                    {
+                        "pool": "169.254.200.4 - 169.254.200.4",
+                        "client-class": "sonic-host:dpu3"
+                    }
+                ],
+                "option-data": [
+                    {
+                        "name": "routers",
+                        "data": "169.254.200.254"
+                    },
+                    {
+                        "name": "dhcp-server-identifier",
+                        "data": "169.254.200.254"
+                    }
+                ],
+                "valid-lifetime": 900,
+                "reservations": []
+            }
+        ],
+        "loggers": [
+            {
+                "name": "kea-dhcp4",
+                "output_options": [
+                    {
+                        "output": "/var/log/kea-dhcp.log",
+                        "pattern": "%-5p %m\n"
+                    }
+                ],
+                "severity": "INFO",
+                "debuglevel": 0
+            }
+        ],
+        "client-classes": [
+            {
+                "name": "sonic-host:dpu0",
+                "test": "substring(relay4[1].hex, -15, 15) == 'sonic-host:dpu0'"
+            },
+            {
+                "name": "sonic-host:dpu1",
+                "test": "substring(relay4[1].hex, -15, 15) == 'sonic-host:dpu1'"
+            },
+            {
+                "name": "sonic-host:dpu2",
+                "test": "substring(relay4[1].hex, -15, 15) == 'sonic-host:dpu2'"
+            },
+            {
+                "name": "sonic-host:dpu3",
+                "test": "substring(relay4[1].hex, -15, 15) == 'sonic-host:dpu3'"
+            }
+        ]
+    }
+}
 
 
 def test_dhcprelayd_refresh_dhcrelay(mock_swsscommon_dbconnector_init):
@@ -21,6 +119,24 @@ def test_dhcprelayd_proceed_with_check_res(mock_swsscommon_dbconnector_init, moc
                                            None, True, expected_checkers)
 
 
+def test_dhcp_dhcp_cfggen_generate(mock_swsscommon_dbconnector_init, mock_parse_port_map_alias):
+    with patch.object(DhcpDbConnector, "get_config_db_table", side_effect=mock_get_config_db_table):
+        dhcp_db_connector = DhcpDbConnector()
+        dhcp_cfg_generator = DhcpServCfgGenerator(dhcp_db_connector,
+                                                  kea_conf_template_path="tests/test_data/kea-dhcp4.conf.j2")
+        kea_dhcp4_config, used_ranges, enabled_dhcp_interfaces, used_options, subscribe_table = \
+            dhcp_cfg_generator.generate()
+        assert json.loads(kea_dhcp4_config) == expected_kea_config
+        assert used_ranges == set()
+        assert enabled_dhcp_interfaces == set(["bridge_midplane"])
+        assert used_options == set()
+        expected_tables = set(["DpusTableEventChecker", "MidPlaneTableEventChecker", "VlanTableEventChecker",
+                               "VlanIntfTableEventChecker", "DhcpRangeTableEventChecker", "VlanMemberTableEventChecker",
+                               "DhcpOptionTableEventChecker", "DhcpPortTableEventChecker",
+                               "DhcpServerTableCfgChangeEventChecker"])
+        assert subscribe_table == expected_tables
+
+
 def mock_get_config_db_table(table_name):
     mock_config_db = MockConfigDb(MOCK_CONFIG_DB_PATH_SMART_SWITCH)
     return mock_config_db.get_config_db_table(table_name)

From 27edaf78576370ba0b3d13ffdda1cd049913994c Mon Sep 17 00:00:00 2001
From: Yaqiang Zhu <yaqiangzhu@microsoft.com>
Date: Tue, 23 Jan 2024 07:21:16 +0800
Subject: [PATCH 0175/1115] [dhcp_server] Remove dependency in
 port-name-alias-map.txt.j2 (#17858)

* [dhcp_server] Remove dependency in port-name-alias-map.txt.j2
---
 dockers/docker-dhcp-server/Dockerfile.j2      |  2 +-
 dockers/docker-dhcp-server/docker_init.sh     |  1 -
 .../port-name-alias-map.txt.j2                |  8 -----
 .../dhcp_utilities/dhcpservd/dhcp_cfggen.py   | 20 +++++------
 .../tests/test_data/mock_config_db.json       | 33 +++++++++++++++++++
 .../tests/test_data/port-name-alias-map.txt   |  3 --
 .../tests/test_dhcp_cfggen.py                 |  9 ++---
 .../tests/test_dhcpservd.py                   |  4 +--
 8 files changed, 50 insertions(+), 30 deletions(-)
 delete mode 100644 dockers/docker-dhcp-server/port-name-alias-map.txt.j2
 delete mode 100644 src/sonic-dhcp-utilities/tests/test_data/port-name-alias-map.txt

diff --git a/dockers/docker-dhcp-server/Dockerfile.j2 b/dockers/docker-dhcp-server/Dockerfile.j2
index 9257ee38c..0b6244d32 100755
--- a/dockers/docker-dhcp-server/Dockerfile.j2
+++ b/dockers/docker-dhcp-server/Dockerfile.j2
@@ -86,7 +86,7 @@ RUN apt-get clean -y        && \
 COPY ["docker_init.sh", "start.sh", "/usr/bin/"]
 COPY ["supervisord.conf", "/etc/supervisor/conf.d/"]
 COPY ["files/supervisor-proc-exit-listener", "/usr/bin"]
-COPY ["port-name-alias-map.txt.j2", "rsyslog/rsyslog.conf.j2", "kea-dhcp4.conf.j2", "/usr/share/sonic/templates/"]
+COPY ["rsyslog/rsyslog.conf.j2", "kea-dhcp4.conf.j2", "/usr/share/sonic/templates/"]
 COPY ["critical_processes", "/etc/supervisor/"]
 COPY ["lease_update.sh", "/etc/kea/"]
 COPY ["kea-dhcp4-init.conf", "/etc/kea/kea-dhcp4.conf"]
diff --git a/dockers/docker-dhcp-server/docker_init.sh b/dockers/docker-dhcp-server/docker_init.sh
index 21ff37059..5220f9ffe 100755
--- a/dockers/docker-dhcp-server/docker_init.sh
+++ b/dockers/docker-dhcp-server/docker_init.sh
@@ -12,7 +12,6 @@ hostname=$(hostname)
 sonic-cfggen -d -t /usr/share/sonic/templates/rsyslog.conf.j2 \
     -a "{\"udp_server_ip\": \"$udp_server_ip\", \"hostname\": \"$hostname\"}" \
     > /etc/rsyslog.conf
-sonic-cfggen -d -t /usr/share/sonic/templates/port-name-alias-map.txt.j2,/tmp/port-name-alias-map.txt
 
 # Make the script that waits for all interfaces to come up executable
 chmod +x /etc/kea/lease_update.sh /usr/bin/start.sh
diff --git a/dockers/docker-dhcp-server/port-name-alias-map.txt.j2 b/dockers/docker-dhcp-server/port-name-alias-map.txt.j2
deleted file mode 100644
index efafe4d5b..000000000
--- a/dockers/docker-dhcp-server/port-name-alias-map.txt.j2
+++ /dev/null
@@ -1,8 +0,0 @@
-{# Generate port name-alias map for isc-dhcp-relay to parse. Each line contains one #}
-{#  name-alias pair of the form "<name> <alias>" #}
-{% for port, config in PORT.items() %}
-    {{- port }} {% if "alias" in config %}{{ config["alias"] }}{% else %}{{ port }}{% endif %} {{- "\n" -}}
-{% endfor -%}
-{% for pc, config in PORTCHANNEL.items() %}
-    {{- pc }} {{ pc }} {{- "\n" -}}
-{% endfor -%}
diff --git a/src/sonic-dhcp-utilities/dhcp_utilities/dhcpservd/dhcp_cfggen.py b/src/sonic-dhcp-utilities/dhcp_utilities/dhcpservd/dhcp_cfggen.py
index 9745f6626..1180ed33d 100755
--- a/src/sonic-dhcp-utilities/dhcp_utilities/dhcpservd/dhcp_cfggen.py
+++ b/src/sonic-dhcp-utilities/dhcp_utilities/dhcpservd/dhcp_cfggen.py
@@ -7,7 +7,6 @@
 from jinja2 import Environment, FileSystemLoader
 from dhcp_utilities.common.utils import merge_intervals, validate_str_type, is_smart_switch
 
-PORT_MAP_PATH = "/tmp/port-name-alias-map.txt"
 UNICODE_TYPE = str
 DHCP_SERVER_IPV4 = "DHCP_SERVER_IPV4"
 DHCP_SERVER_IPV4_CUSTOMIZED_OPTIONS = "DHCP_SERVER_IPV4_CUSTOMIZED_OPTIONS"
@@ -35,14 +34,14 @@ class DhcpServCfgGenerator(object):
     lease_update_script_path = ""
     lease_path = ""
 
-    def __init__(self, dhcp_db_connector, lease_path=DEFAULT_LEASE_PATH, port_map_path=PORT_MAP_PATH,
+    def __init__(self, dhcp_db_connector, lease_path=DEFAULT_LEASE_PATH,
                  lease_update_script_path=LEASE_UPDATE_SCRIPT_PATH, dhcp_option_path=DHCP_OPTION_FILE,
                  kea_conf_template_path=KEA_DHCP4_CONF_TEMPLATE_PATH):
         self.db_connector = dhcp_db_connector
         self.lease_path = lease_path
         self.lease_update_script_path = lease_update_script_path
         # Read port alias map file, this file is render after container start, so it would not change any more
-        self._parse_port_map_alias(port_map_path)
+        self._parse_port_map_alias()
         # Get kea config template
         self._get_render_template(kea_conf_template_path)
         self._read_dhcp_option(dhcp_option_path)
@@ -166,14 +165,13 @@ def _get_render_template(self, kea_conf_template_path):
         env = Environment(loader=FileSystemLoader(os.path.dirname(kea_conf_template_path)))  # nosemgrep
         self.kea_template = env.get_template(os.path.basename(kea_conf_template_path))
 
-    def _parse_port_map_alias(self, port_map_path):
-        with open(port_map_path, "r") as file:
-            lines = file.readlines()
-            for line in lines:
-                splits = line.strip().split(" ")
-                if len(splits) != 2:
-                    continue
-                self.port_alias_map[splits[0]] = splits[1]
+    def _parse_port_map_alias(self):
+        port_table = self.db_connector.get_config_db_table("PORT")
+        pc_table = self.db_connector.get_config_db_table("PORTCHANNEL")
+        for port_name, item in port_table.items():
+            self.port_alias_map[port_name] = item.get("alias", port_name)
+        for pc_name in pc_table.keys():
+            self.port_alias_map[pc_name] = pc_name
 
     def _construct_obj_for_template(self, dhcp_server_ipv4, port_ips, hostname, customized_options):
         subnets = []
diff --git a/src/sonic-dhcp-utilities/tests/test_data/mock_config_db.json b/src/sonic-dhcp-utilities/tests/test_data/mock_config_db.json
index 3bdfa0401..ca7974673 100644
--- a/src/sonic-dhcp-utilities/tests/test_data/mock_config_db.json
+++ b/src/sonic-dhcp-utilities/tests/test_data/mock_config_db.json
@@ -180,5 +180,38 @@
                 "192.168.0.10"
             ]
         }
+    },
+    "PORT": {
+        "Ethernet0": {
+            "admin_status": "up",
+            "alias": "etp1",
+            "description": "Servers0:eth0",
+            "index": "1",
+            "lanes": "25",
+            "mtu": "9100",
+            "pfc_asym": "off",
+            "speed": "1000",
+            "tpid": "0x8100"
+        },
+        "Ethernet1": {
+            "admin_status": "up",
+            "alias": "etp2",
+            "description": "Servers1:eth0",
+            "index": "2",
+            "lanes": "26",
+            "mtu": "9100",
+            "pfc_asym": "off",
+            "speed": "1000",
+            "tpid": "0x8100"
+        }
+    },
+    "PORTCHANNEL": {
+        "PortChannel101": {
+            "admin_status": "up",
+            "lacp_key": "auto",
+            "min_links": "1",
+            "mtu": "9100",
+            "tpid": "0x8100"
+        }
     }
 }
diff --git a/src/sonic-dhcp-utilities/tests/test_data/port-name-alias-map.txt b/src/sonic-dhcp-utilities/tests/test_data/port-name-alias-map.txt
deleted file mode 100644
index edebd17db..000000000
--- a/src/sonic-dhcp-utilities/tests/test_data/port-name-alias-map.txt
+++ /dev/null
@@ -1,3 +0,0 @@
-Ethernet24 etp7
-Ethernet28 etp8
-Ethernet32
\ No newline at end of file
diff --git a/src/sonic-dhcp-utilities/tests/test_dhcp_cfggen.py b/src/sonic-dhcp-utilities/tests/test_dhcp_cfggen.py
index d2e6d11d3..df6d6d4e2 100644
--- a/src/sonic-dhcp-utilities/tests/test_dhcp_cfggen.py
+++ b/src/sonic-dhcp-utilities/tests/test_dhcp_cfggen.py
@@ -268,10 +268,11 @@
 
 
 def test_parse_port_alias(mock_swsscommon_dbconnector_init, mock_get_render_template):
-    dhcp_db_connector = DhcpDbConnector()
-    dhcp_cfg_generator = DhcpServCfgGenerator(dhcp_db_connector,
-                                              port_map_path="tests/test_data/port-name-alias-map.txt")
-    assert dhcp_cfg_generator.port_alias_map == {"Ethernet24": "etp7", "Ethernet28": "etp8"}
+    with patch.object(DhcpDbConnector, "get_config_db_table", side_effect=mock_get_config_db_table):
+        dhcp_db_connector = DhcpDbConnector()
+        dhcp_cfg_generator = DhcpServCfgGenerator(dhcp_db_connector)
+        assert dhcp_cfg_generator.port_alias_map == {"Ethernet0": "etp1", "Ethernet1": "etp2",
+                                                     "PortChannel101": "PortChannel101"}
 
 
 @pytest.mark.parametrize("is_success", [True, False])
diff --git a/src/sonic-dhcp-utilities/tests/test_dhcpservd.py b/src/sonic-dhcp-utilities/tests/test_dhcpservd.py
index 5a77999d7..dd3d09a63 100644
--- a/src/sonic-dhcp-utilities/tests/test_dhcpservd.py
+++ b/src/sonic-dhcp-utilities/tests/test_dhcpservd.py
@@ -29,10 +29,10 @@ def test_dump_dhcp4_config(mock_swsscommon_dbconnector_init, enabled_checker):
                       new_callable=PropertyMock), \
          patch.object(DhcpServdDbMonitor, "disable_checkers") as mock_unsubscribe, \
          patch.object(DhcpServdDbMonitor, "enable_checkers") as mock_subscribe, \
-         patch.object(DhcpServd, "enabled_checker", return_value=enabled_checker, new_callable=PropertyMock):
+         patch.object(DhcpServd, "enabled_checker", return_value=enabled_checker, new_callable=PropertyMock), \
+         patch.object(DhcpServCfgGenerator, "_parse_port_map_alias"):
         dhcp_db_connector = DhcpDbConnector()
         dhcp_cfg_generator = DhcpServCfgGenerator(dhcp_db_connector,
-                                                  port_map_path="tests/test_data/port-name-alias-map.txt",
                                                   kea_conf_template_path="tests/test_data/kea-dhcp4.conf.j2")
         dhcpservd = DhcpServd(dhcp_cfg_generator, dhcp_db_connector, None,
                               kea_dhcp4_config_path="/tmp/kea-dhcp4.conf")

From a2e57d849b7c3bdc73d2a24a24673e6406626404 Mon Sep 17 00:00:00 2001
From: Hua Liu <58683130+liuh-80@users.noreply.github.com>
Date: Tue, 23 Jan 2024 12:13:48 +0800
Subject: [PATCH 0176/1115] [TACACS] Ignore TACACS accounting trace log when
 debug disabled. (#16482)

Ignore TACACS accounting trace log when debug disabled.

#### Why I did it
TACACS accounting trace log is only for debug, improve code to not generate trace log when debug disabled.

##### Work item tracking
- Microsoft ADO: 25270078

#### How I did it
Ignore TACACS accounting trace log when debug disabled.

#### How to verify it
Pass all UT.
Manually verified the auditd-tacplus not generate trace log when debug disabled.

### Description for the changelog
Ignore TACACS accounting trace log when debug disabled.
---
 ...-Remove-user-secret-from-accounting-log.patch | 16 +++++++++++++---
 1 file changed, 13 insertions(+), 3 deletions(-)

diff --git a/src/tacacs/audisp/patches/0002-Remove-user-secret-from-accounting-log.patch b/src/tacacs/audisp/patches/0002-Remove-user-secret-from-accounting-log.patch
index 1cacaa8a0..209db4937 100644
--- a/src/tacacs/audisp/patches/0002-Remove-user-secret-from-accounting-log.patch
+++ b/src/tacacs/audisp/patches/0002-Remove-user-secret-from-accounting-log.patch
@@ -13,7 +13,7 @@ Subject: [PATCH] Remove user secret from accounting log.
  regex_helper.h           |  17 +++
  sudoers_helper.c         | 250 +++++++++++++++++++++++++++++++++++++++
  sudoers_helper.h         |  18 +++
- trace.c                  |  21 ++++
+ trace.c                  |  31 +++++
  trace.h                  |  10 ++
  unittest/Makefile        |  21 ++++
  unittest/mock.h          |  17 +++
@@ -21,7 +21,7 @@ Subject: [PATCH] Remove user secret from accounting log.
  unittest/mock_helper.h   |  48 ++++++++
  unittest/password_test.c | 199 +++++++++++++++++++++++++++++++
  unittest/sudoers         |   5 +
- 17 files changed, 931 insertions(+), 4 deletions(-)
+ 17 files changed, 941 insertions(+), 4 deletions(-)
  create mode 100644 password.c
  create mode 100644 password.h
  create mode 100644 regex_helper.c
@@ -700,7 +700,7 @@ new file mode 100644
 index 0000000..44bbbc7
 --- /dev/null
 +++ b/trace.c
-@@ -0,0 +1,21 @@
+@@ -0,0 +1,31 @@
 +#include <stdarg.h>
 +#include <stdio.h>
 +#include <string.h>
@@ -709,9 +709,19 @@ index 0000000..44bbbc7
 +
 +#include "trace.h"
 +
++/* Tacacs+ support lib */
++#include <libtac/support.h>
++
++/* Tacacs control flag */
++extern int tacacs_ctrl;
++
 +/* Output trace log. */
 +void trace(const char *format, ...)
 +{
++    if ((tacacs_ctrl & PAM_TAC_DEBUG) == 0) {
++        return;
++    }
++
 +    // convert log to a string because va args resoursive issue:
 +    // http://www.c-faq.com/varargs/handoff.html
 +    char logBuffer[MAX_LINE_SIZE];

From b1750b7ceed487680832944e5262e069a8b514ce Mon Sep 17 00:00:00 2001
From: Hua Liu <58683130+liuh-80@users.noreply.github.com>
Date: Tue, 23 Jan 2024 13:49:47 +0800
Subject: [PATCH 0177/1115] Improve SSHD config to use more secure settings
 (#17798)

Improve SSHD config to use more secure settings

Why I did it
According to Sonic OS review result, SSHD config file /etc/ssh/sshd_config using insecure settings.

Work item tracking
Microsoft ADO: 15022083
How I did it
Change build_debian.sh script to set following settings to /etc/ssh/sshd_config:
ClientAliveInterval is set to 300
MaxAuthTries is set to default of 3
Banner set to /etc/issue

How to verify it
Pass all E2E test case.
---
 build_debian.sh | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/build_debian.sh b/build_debian.sh
index 8a0d0be39..c507275d1 100755
--- a/build_debian.sh
+++ b/build_debian.sh
@@ -484,10 +484,14 @@ rm /files/etc/ssh/sshd_config/ClientAliveInterval
 rm /files/etc/ssh/sshd_config/ClientAliveCountMax
 touch /files/etc/ssh/sshd_config/EmptyLineHack
 rename /files/etc/ssh/sshd_config/EmptyLineHack ""
-set /files/etc/ssh/sshd_config/ClientAliveInterval 900
+set /files/etc/ssh/sshd_config/ClientAliveInterval 300
 set /files/etc/ssh/sshd_config/ClientAliveCountMax 0
 ins #comment before /files/etc/ssh/sshd_config/ClientAliveInterval
-set /files/etc/ssh/sshd_config/#comment[following-sibling::*[1][self::ClientAliveInterval]] "Close inactive client sessions after 15 minutes"
+set /files/etc/ssh/sshd_config/#comment[following-sibling::*[1][self::ClientAliveInterval]] "Close inactive client sessions after 5 minutes"
+rm /files/etc/ssh/sshd_config/MaxAuthTries
+set /files/etc/ssh/sshd_config/MaxAuthTries 3
+rm /files/etc/ssh/sshd_config/Banner
+set /files/etc/ssh/sshd_config/Banner /etc/issue
 rm /files/etc/ssh/sshd_config/LogLevel
 set /files/etc/ssh/sshd_config/LogLevel VERBOSE
 save

From 2c08e90203f23093803843217e60936edb9acc81 Mon Sep 17 00:00:00 2001
From: Yaqiang Zhu <zyq1512099831@gmail.com>
Date: Wed, 24 Jan 2024 00:33:00 +0800
Subject: [PATCH 0178/1115] [dhcp_server] Update dhcp_server container to
 bookworm (#17647)

---
 dockers/docker-dhcp-server/Dockerfile.j2      | 46 +++----------------
 .../docker-dhcp-server/kea-dhcp4-init.conf    |  9 ----
 dockers/docker-dhcp-server/kea-dhcp4.conf.j2  |  2 +-
 dockers/docker-dhcp-server/supervisord.conf   |  2 +-
 rules/docker-dhcp-server.mk                   | 10 ++--
 .../dhcp_utilities/dhcpservd/dhcp_cfggen.py   |  7 ++-
 .../dhcp_utilities/dhcpservd/dhcpservd.py     |  8 +++-
 src/sonic-dhcp-utilities/setup.py             |  8 ++--
 .../tests/test_data/kea-dhcp4.conf.j2         |  2 +-
 .../tests/test_dhcp_cfggen.py                 | 23 +++++-----
 .../tests/test_dhcpservd.py                   |  8 ++--
 .../tests/test_smart_switch.py                |  2 +-
 12 files changed, 46 insertions(+), 81 deletions(-)

diff --git a/dockers/docker-dhcp-server/Dockerfile.j2 b/dockers/docker-dhcp-server/Dockerfile.j2
index 0b6244d32..4ca46d5c5 100755
--- a/dockers/docker-dhcp-server/Dockerfile.j2
+++ b/dockers/docker-dhcp-server/Dockerfile.j2
@@ -1,5 +1,5 @@
 {% from "dockers/dockerfile-macros.j2" import install_debian_packages, install_python_wheels, copy_files %}
-FROM docker-config-engine-bullseye-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}}
+FROM docker-config-engine-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}}
 
 ARG docker_container_name
 ARG image_version
@@ -15,40 +15,11 @@ RUN apt-get update &&       \
     apt-get install -f -y   \
         tcpdump             \
         python3-dev         \
-# For kea build environment
-        automake            \
-        libtool             \
-        pkg-config          \
         build-essential     \
-        ccache              \
-# For kea dependancies
-        libboost-dev        \
-        libboost-system-dev \
-        liblog4cplus-dev    \
-        libssl-dev
+        kea-dhcp4-server
+
+RUN mkdir -p /var/run/kea
 
-# Install kea from source
-RUN apt-get install -f -y devscripts
-RUN mkdir kea && cd kea && dget -u http://deb.debian.org/debian/pool/main/i/isc-kea/isc-kea_2.2.0-6.dsc
-RUN cd /kea/isc-kea-2.2.0 && autoreconf --install && ./configure --disable-FEATURE \
-    --enable-static=no --disable-install-configurations --enable-pgsql-ssl=no --with-PACKAGE=no \
-    && make -j$(nproc) && make install
-# Create run folder for kea
-RUN mkdir -p /run/kea
-# Create config folder for kea
-RUN mkdir -p /etc/kea
-# Remove stuff we don't need to reduce image size
-RUN cd /usr/local/lib && rm -v *.la && rm -v kea/hooks/*.la
-# Strip debug symbols to reduce file size of binaries
-Run find /usr/local/sbin/ /usr/local/lib/ -type f -exec strip --strip-unneeded {} \;
-# Remove source code
-RUN rm -rf /kea
-RUN echo "/usr/local/lib/kea/hooks" > /etc/ld.so.conf.d/kea.conf && \
-    ldconfig
-# Remove sbin we don't need
-RUN cd /usr/local/sbin && rm -f kea-admin kea-ctrl-agent kea-dhcp-ddns kea-dhcp6 keactrl
-# Remove hook lib we don't need
-RUN cd /usr/local/lib/kea/hooks && rm -f libdhcp_bootp.so libdhcp_flex_option.so libdhcp_stat_cmds.so
 RUN pip3 install psutil
 # TODO issue on remote rsyslog server in non-host container
 RUN rm -f /etc/supervisor/conf.d/containercfgd.conf
@@ -70,13 +41,8 @@ RUN rm -f /etc/supervisor/conf.d/containercfgd.conf
 {% endif %}
 
 # Remove build stuff we don't need
-RUN apt-get remove -y devscripts    \
-                automake            \
-                libtool             \
-                pkg-config          \
-                build-essential     \
-                python3-dev         \
-                ccache
+RUN apt-get remove -y build-essential     \
+                      python3-dev
 
 RUN apt-get clean -y        && \
     apt-get autoclean -y    && \
diff --git a/dockers/docker-dhcp-server/kea-dhcp4-init.conf b/dockers/docker-dhcp-server/kea-dhcp4-init.conf
index 63733d3ef..a2c680380 100644
--- a/dockers/docker-dhcp-server/kea-dhcp4-init.conf
+++ b/dockers/docker-dhcp-server/kea-dhcp4-init.conf
@@ -1,14 +1,5 @@
 {
     "Dhcp4": {
-        "hooks-libraries": [
-            {
-                "library": "/usr/local/lib/kea/hooks/libdhcp_run_script.so",
-                "parameters": {
-                    "name": "/etc/kea/lease_update.sh",
-                    "sync": false
-                }
-            }
-        ],
         "interfaces-config": {
             "interfaces": ["eth0"]
         },
diff --git a/dockers/docker-dhcp-server/kea-dhcp4.conf.j2 b/dockers/docker-dhcp-server/kea-dhcp4.conf.j2
index d1e457764..082cbca14 100644
--- a/dockers/docker-dhcp-server/kea-dhcp4.conf.j2
+++ b/dockers/docker-dhcp-server/kea-dhcp4.conf.j2
@@ -14,7 +14,7 @@
 {%- endif %}
         "hooks-libraries": [
             {
-                "library": "/usr/local/lib/kea/hooks/libdhcp_run_script.so",
+                "library": "{{ hook_lib_path }}",
                 "parameters": {
                     "name": "{{ lease_update_script_path }}",
                     "sync": false
diff --git a/dockers/docker-dhcp-server/supervisord.conf b/dockers/docker-dhcp-server/supervisord.conf
index 73f454d7c..bf368376f 100644
--- a/dockers/docker-dhcp-server/supervisord.conf
+++ b/dockers/docker-dhcp-server/supervisord.conf
@@ -53,7 +53,7 @@ dependent_startup=true
 dependent_startup_wait_for=start:exited
 
 [program:kea-dhcp4]
-command=/usr/local/sbin/kea-dhcp4 -c /etc/kea/kea-dhcp4.conf
+command=/usr/sbin/kea-dhcp4 -c /etc/kea/kea-dhcp4.conf
 priority=3
 autostart=false
 autorestart=false
diff --git a/rules/docker-dhcp-server.mk b/rules/docker-dhcp-server.mk
index 004888b68..bfcf88327 100644
--- a/rules/docker-dhcp-server.mk
+++ b/rules/docker-dhcp-server.mk
@@ -6,21 +6,19 @@ DOCKER_DHCP_SERVER_DBG = $(DOCKER_DHCP_SERVER_STEM)-$(DBG_IMAGE_MARK).gz
 
 $(DOCKER_DHCP_SERVER)_PATH = $(DOCKERS_PATH)/$(DOCKER_DHCP_SERVER_STEM)
 
-$(DOCKER_DHCP_SERVER)_DEPENDS = $(SWSS) $(LIBSWSSCOMMON) $(SONIC_RSYSLOG_PLUGIN)
-$(DOCKER_DHCP_SERVER)_DBG_DEPENDS = $($(DOCKER_CONFIG_ENGINE_BULLSEYE)_DBG_DEPENDS)
+$(DOCKER_DHCP_SERVER)_DEPENDS = $(LIBSWSSCOMMON) $(SONIC_RSYSLOG_PLUGIN)
+$(DOCKER_DHCP_SERVER)_DBG_DEPENDS = $($(DOCKER_CONFIG_ENGINE_BOOKWORM)_DBG_DEPENDS)
 
-$(DOCKER_DHCP_SERVER)_DBG_IMAGE_PACKAGES = $($(DOCKER_CONFIG_ENGINE_BULLSEYE)_DBG_IMAGE_PACKAGES)
+$(DOCKER_DHCP_SERVER)_DBG_IMAGE_PACKAGES = $($(DOCKER_CONFIG_ENGINE_BOOKWORM)_DBG_IMAGE_PACKAGES)
 
-$(DOCKER_DHCP_SERVER)_LOAD_DOCKERS = $(DOCKER_CONFIG_ENGINE_BULLSEYE)
+$(DOCKER_DHCP_SERVER)_LOAD_DOCKERS = $(DOCKER_CONFIG_ENGINE_BOOKWORM)
 
 $(DOCKER_DHCP_SERVER)_INSTALL_DEBS = $(PYTHON3_SWSSCOMMON)
 $(DOCKER_DHCP_SERVER)_PYTHON_WHEELS += $(SONIC_DHCP_UTILITIES_PY3)
 $(DOCKER_DHCP_SERVER)_INSTALL_PYTHON_WHEELS = $(SONIC_UTILITIES_PY3)
 
 SONIC_DOCKER_IMAGES += $(DOCKER_DHCP_SERVER)
-SONIC_BULLSEYE_DOCKERS += $(DOCKER_DHCP_SERVER)
 SONIC_DOCKER_DBG_IMAGES += $(DOCKER_DHCP_SERVER_DBG)
-SONIC_BULLSEYE_DBG_DOCKERS += $(DOCKER_DHCP_SERVER_DBG)
 
 ifeq ($(INCLUDE_KUBERNETES),y)
 $(DOCKER_DHCP_SERVER)_DEFAULT_FEATURE_OWNER = kube
diff --git a/src/sonic-dhcp-utilities/dhcp_utilities/dhcpservd/dhcp_cfggen.py b/src/sonic-dhcp-utilities/dhcp_utilities/dhcpservd/dhcp_cfggen.py
index 1180ed33d..cc5bf0dba 100755
--- a/src/sonic-dhcp-utilities/dhcp_utilities/dhcpservd/dhcp_cfggen.py
+++ b/src/sonic-dhcp-utilities/dhcp_utilities/dhcpservd/dhcp_cfggen.py
@@ -33,13 +33,15 @@ class DhcpServCfgGenerator(object):
     port_alias_map = {}
     lease_update_script_path = ""
     lease_path = ""
+    hook_lib_path = ""
 
-    def __init__(self, dhcp_db_connector, lease_path=DEFAULT_LEASE_PATH,
+    def __init__(self, dhcp_db_connector, hook_lib_path, lease_path=DEFAULT_LEASE_PATH,
                  lease_update_script_path=LEASE_UPDATE_SCRIPT_PATH, dhcp_option_path=DHCP_OPTION_FILE,
                  kea_conf_template_path=KEA_DHCP4_CONF_TEMPLATE_PATH):
         self.db_connector = dhcp_db_connector
         self.lease_path = lease_path
         self.lease_update_script_path = lease_update_script_path
+        self.hook_lib_path = hook_lib_path
         # Read port alias map file, this file is render after container start, so it would not change any more
         self._parse_port_map_alias()
         # Get kea config template
@@ -235,7 +237,8 @@ def _construct_obj_for_template(self, dhcp_server_ipv4, port_ips, hostname, cust
             "client_classes": client_classes,
             "lease_update_script_path": self.lease_update_script_path,
             "lease_path": self.lease_path,
-            "customized_options": customized_options
+            "customized_options": customized_options,
+            "hook_lib_path": self.hook_lib_path
         }
         return render_obj, enabled_dhcp_interfaces, used_options, subscribe_table
 
diff --git a/src/sonic-dhcp-utilities/dhcp_utilities/dhcpservd/dhcpservd.py b/src/sonic-dhcp-utilities/dhcp_utilities/dhcpservd/dhcpservd.py
index b95e95417..7a9b65092 100644
--- a/src/sonic-dhcp-utilities/dhcp_utilities/dhcpservd/dhcpservd.py
+++ b/src/sonic-dhcp-utilities/dhcp_utilities/dhcpservd/dhcpservd.py
@@ -2,6 +2,7 @@
 import psutil
 import signal
 import time
+import subprocess
 import sys
 import syslog
 from .dhcp_cfggen import DhcpServCfgGenerator
@@ -100,7 +101,12 @@ def wait(self):
 
 def main():
     dhcp_db_connector = DhcpDbConnector(redis_sock=REDIS_SOCK_PATH)
-    dhcp_cfg_generator = DhcpServCfgGenerator(dhcp_db_connector)
+    hook_lib_path_res = subprocess.run(["find", "/", "-name", "libdhcp_run_script.so"],
+                                       capture_output=True).stdout.decode().strip()
+    if len(hook_lib_path_res) == 0:
+        syslog.syslog(syslog.LOG_ERR, "Cannot find hook lib for kea-dhcp-server")
+        sys.exit(1)
+    dhcp_cfg_generator = DhcpServCfgGenerator(dhcp_db_connector, hook_lib_path_res.split("\n")[0])
     sel = swsscommon.Select()
     checkers = []
     checkers.append(DhcpServerTableCfgChangeEventChecker(sel, dhcp_db_connector.config_db))
diff --git a/src/sonic-dhcp-utilities/setup.py b/src/sonic-dhcp-utilities/setup.py
index 2429cd109..c25bd0088 100644
--- a/src/sonic-dhcp-utilities/setup.py
+++ b/src/sonic-dhcp-utilities/setup.py
@@ -1,12 +1,12 @@
-from setuptools import setup, find_packages
+from setuptools import setup
 
 dependencies = [
-    "psutil"
+    "psutil",
+    "freezegun"
 ]
 
 test_deps = [
     "pytest",
-    "freezegun"
 ]
 
 setup(
@@ -20,7 +20,7 @@
     author_email="yaqiangzhu@microsoft.com",
     setup_requires=[
         "pytest-runner",
-        "wheel",
+        "wheel"
     ],
     packages=[
         "dhcp_utilities.common",
diff --git a/src/sonic-dhcp-utilities/tests/test_data/kea-dhcp4.conf.j2 b/src/sonic-dhcp-utilities/tests/test_data/kea-dhcp4.conf.j2
index d1e457764..082cbca14 100644
--- a/src/sonic-dhcp-utilities/tests/test_data/kea-dhcp4.conf.j2
+++ b/src/sonic-dhcp-utilities/tests/test_data/kea-dhcp4.conf.j2
@@ -14,7 +14,7 @@
 {%- endif %}
         "hooks-libraries": [
             {
-                "library": "/usr/local/lib/kea/hooks/libdhcp_run_script.so",
+                "library": "{{ hook_lib_path }}",
                 "parameters": {
                     "name": "{{ lease_update_script_path }}",
                     "sync": false
diff --git a/src/sonic-dhcp-utilities/tests/test_dhcp_cfggen.py b/src/sonic-dhcp-utilities/tests/test_dhcp_cfggen.py
index df6d6d4e2..2b60a66dc 100644
--- a/src/sonic-dhcp-utilities/tests/test_dhcp_cfggen.py
+++ b/src/sonic-dhcp-utilities/tests/test_dhcp_cfggen.py
@@ -208,7 +208,8 @@
             "type": "string",
             "always_send": "true"
         }
-    }
+    },
+    "hook_lib_path": "/usr/local/lib/kea/hooks/libdhcp_run_script.so"
 }
 tested_options_data = [
     {
@@ -270,7 +271,7 @@
 def test_parse_port_alias(mock_swsscommon_dbconnector_init, mock_get_render_template):
     with patch.object(DhcpDbConnector, "get_config_db_table", side_effect=mock_get_config_db_table):
         dhcp_db_connector = DhcpDbConnector()
-        dhcp_cfg_generator = DhcpServCfgGenerator(dhcp_db_connector)
+        dhcp_cfg_generator = DhcpServCfgGenerator(dhcp_db_connector, "/usr/local/lib/kea/hooks/libdhcp_run_script.so")
         assert dhcp_cfg_generator.port_alias_map == {"Ethernet0": "etp1", "Ethernet1": "etp2",
                                                      "PortChannel101": "PortChannel101"}
 
@@ -280,7 +281,7 @@ def test_parse_hostname(is_success, mock_swsscommon_dbconnector_init, mock_parse
                         mock_get_render_template):
     mock_config_db = MockConfigDb(config_db_path="tests/test_data/mock_config_db.json")
     dhcp_db_connector = DhcpDbConnector()
-    dhcp_cfg_generator = DhcpServCfgGenerator(dhcp_db_connector)
+    dhcp_cfg_generator = DhcpServCfgGenerator(dhcp_db_connector, "/usr/local/lib/kea/hooks/libdhcp_run_script.so")
     device_metadata = mock_config_db.config_db.get("DEVICE_METADATA") if is_success else {}
     try:
         hostname = dhcp_cfg_generator._parse_hostname(device_metadata)
@@ -292,7 +293,7 @@ def test_parse_hostname(is_success, mock_swsscommon_dbconnector_init, mock_parse
 def test_parse_range(mock_swsscommon_dbconnector_init, mock_parse_port_map_alias, mock_get_render_template):
     mock_config_db = MockConfigDb(config_db_path="tests/test_data/mock_config_db.json")
     dhcp_db_connector = DhcpDbConnector()
-    dhcp_cfg_generator = DhcpServCfgGenerator(dhcp_db_connector)
+    dhcp_cfg_generator = DhcpServCfgGenerator(dhcp_db_connector, "/usr/local/lib/kea/hooks/libdhcp_run_script.so")
     parse_result = dhcp_cfg_generator._parse_range(mock_config_db.config_db.get("DHCP_SERVER_IPV4_RANGE"))
     assert parse_result == expected_parsed_range
 
@@ -300,7 +301,7 @@ def test_parse_range(mock_swsscommon_dbconnector_init, mock_parse_port_map_alias
 def test_parse_vlan(mock_swsscommon_dbconnector_init, mock_parse_port_map_alias, mock_get_render_template):
     mock_config_db = MockConfigDb(config_db_path="tests/test_data/mock_config_db.json")
     dhcp_db_connector = DhcpDbConnector()
-    dhcp_cfg_generator = DhcpServCfgGenerator(dhcp_db_connector)
+    dhcp_cfg_generator = DhcpServCfgGenerator(dhcp_db_connector, "/usr/local/lib/kea/hooks/libdhcp_run_script.so")
     vlan_interfaces, vlan_members = dhcp_cfg_generator._parse_vlan(mock_config_db.config_db.get("VLAN_INTERFACE"),
                                                                    mock_config_db.config_db.get("VLAN_MEMBER"))
     assert vlan_interfaces == expected_vlan_ipv4_interface
@@ -313,7 +314,7 @@ def test_parse_port(test_config_db, mock_swsscommon_dbconnector_init, mock_get_r
                     mock_parse_port_map_alias):
     mock_config_db = MockConfigDb(config_db_path="tests/test_data/{}".format(test_config_db))
     dhcp_db_connector = DhcpDbConnector()
-    dhcp_cfg_generator = DhcpServCfgGenerator(dhcp_db_connector)
+    dhcp_cfg_generator = DhcpServCfgGenerator(dhcp_db_connector, "/usr/local/lib/kea/hooks/libdhcp_run_script.so")
     tested_vlan_interfaces = expected_vlan_ipv4_interface
     tested_ranges = expected_parsed_range
     ipv4_port = mock_config_db.config_db.get("DHCP_SERVER_IPV4_PORT")
@@ -339,7 +340,7 @@ def test_generate(mock_swsscommon_dbconnector_init, mock_parse_port_map_alias, m
          patch.object(DhcpDbConnector, "get_config_db_table", side_effect=mock_get_config_db_table), \
          patch("dhcp_utilities.dhcpservd.dhcp_cfggen.is_smart_switch", return_value=False):
         dhcp_db_connector = DhcpDbConnector()
-        dhcp_cfg_generator = DhcpServCfgGenerator(dhcp_db_connector)
+        dhcp_cfg_generator = DhcpServCfgGenerator(dhcp_db_connector, "/usr/local/lib/kea/hooks/libdhcp_run_script.so")
         kea_dhcp4_config, used_ranges, enabled_dhcp_interfaces, used_options, subscribe_table = \
             dhcp_cfg_generator.generate()
         assert kea_dhcp4_config == "dummy_config"
@@ -355,7 +356,7 @@ def test_construct_obj_for_template(mock_swsscommon_dbconnector_init, mock_parse
     mock_config_db = MockConfigDb(config_db_path="tests/test_data/mock_config_db.json")
     dhcp_db_connector = DhcpDbConnector()
     customized_options = {"option223": {"id": "223", "value": "dummy_value", "type": "string", "always_send": "true"}}
-    dhcp_cfg_generator = DhcpServCfgGenerator(dhcp_db_connector)
+    dhcp_cfg_generator = DhcpServCfgGenerator(dhcp_db_connector, "/usr/local/lib/kea/hooks/libdhcp_run_script.so")
     tested_hostname = "sonic-host"
     port_ips = {
         "Vlan1000": {
@@ -382,7 +383,7 @@ def test_construct_obj_for_template(mock_swsscommon_dbconnector_init, mock_parse
 def test_render_config(mock_swsscommon_dbconnector_init, mock_parse_port_map_alias, with_port_config,
                        with_option_config):
     dhcp_db_connector = DhcpDbConnector()
-    dhcp_cfg_generator = DhcpServCfgGenerator(dhcp_db_connector,
+    dhcp_cfg_generator = DhcpServCfgGenerator(dhcp_db_connector, "/usr/local/lib/kea/hooks/libdhcp_run_script.so",
                                               kea_conf_template_path="tests/test_data/kea-dhcp4.conf.j2")
     render_obj = copy.deepcopy(expected_render_obj)
     expected_config = copy.deepcopy(expected_dhcp_config)
@@ -405,7 +406,7 @@ def test_render_config(mock_swsscommon_dbconnector_init, mock_parse_port_map_ali
 def test_parse_customized_options(mock_swsscommon_dbconnector_init, mock_get_render_template,
                                   mock_parse_port_map_alias, tested_options_data):
     dhcp_db_connector = DhcpDbConnector()
-    dhcp_cfg_generator = DhcpServCfgGenerator(dhcp_db_connector)
+    dhcp_cfg_generator = DhcpServCfgGenerator(dhcp_db_connector, "/usr/local/lib/kea/hooks/libdhcp_run_script.so")
     customized_options_ipv4 = tested_options_data["data"]
     customized_options = dhcp_cfg_generator._parse_customized_options(customized_options_ipv4)
     if tested_options_data["res"]:
@@ -423,7 +424,7 @@ def test_parse_customized_options(mock_swsscommon_dbconnector_init, mock_get_ren
 
 def test_parse_dpus(mock_swsscommon_dbconnector_init, mock_get_render_template, mock_parse_port_map_alias):
     dhcp_db_connector = DhcpDbConnector()
-    dhcp_cfg_generator = DhcpServCfgGenerator(dhcp_db_connector)
+    dhcp_cfg_generator = DhcpServCfgGenerator(dhcp_db_connector, "/usr/local/lib/kea/hooks/libdhcp_run_script.so")
     dpus_table = {"dpu0": {"midplane_interface": "dpu0"}}
     mid_plane_table = {"GLOBAL": {"bridge": "bridge_midplane", "ip_prefix": "169.254.200.254/24"}}
     mid_plane, dpus = dhcp_cfg_generator._parse_dpu(dpus_table, mid_plane_table)
diff --git a/src/sonic-dhcp-utilities/tests/test_dhcpservd.py b/src/sonic-dhcp-utilities/tests/test_dhcpservd.py
index dd3d09a63..17239a734 100644
--- a/src/sonic-dhcp-utilities/tests/test_dhcpservd.py
+++ b/src/sonic-dhcp-utilities/tests/test_dhcpservd.py
@@ -32,7 +32,7 @@ def test_dump_dhcp4_config(mock_swsscommon_dbconnector_init, enabled_checker):
          patch.object(DhcpServd, "enabled_checker", return_value=enabled_checker, new_callable=PropertyMock), \
          patch.object(DhcpServCfgGenerator, "_parse_port_map_alias"):
         dhcp_db_connector = DhcpDbConnector()
-        dhcp_cfg_generator = DhcpServCfgGenerator(dhcp_db_connector,
+        dhcp_cfg_generator = DhcpServCfgGenerator(dhcp_db_connector, "/usr/local/lib/kea/hooks/libdhcp_run_script.so",
                                                   kea_conf_template_path="tests/test_data/kea-dhcp4.conf.j2")
         dhcpservd = DhcpServd(dhcp_cfg_generator, dhcp_db_connector, None,
                               kea_dhcp4_config_path="/tmp/kea-dhcp4.conf")
@@ -56,7 +56,7 @@ def test_notify_kea_dhcp4_proc(process_list, mock_swsscommon_dbconnector_init, m
     with patch.object(psutil, "process_iter", return_value=proc_list), \
          patch.object(MockProc, "send_signal", MagicMock()) as mock_send_signal:
         dhcp_db_connector = DhcpDbConnector()
-        dhcp_cfg_generator = DhcpServCfgGenerator(dhcp_db_connector)
+        dhcp_cfg_generator = DhcpServCfgGenerator(dhcp_db_connector, "/usr/local/lib/kea/hooks/libdhcp_run_script.so")
         dhcpservd = DhcpServd(dhcp_cfg_generator, dhcp_db_connector, None)
         dhcpservd._notify_kea_dhcp4_proc()
         if "kea-dhcp4" in process_list:
@@ -81,7 +81,7 @@ def test_update_dhcp_server_ip(mock_swsscommon_dbconnector_init, mock_parse_port
          patch.object(time, "sleep") as mock_sleep, \
          patch.object(sys, "exit") as mock_exit:
         dhcp_db_connector = DhcpDbConnector()
-        dhcp_cfg_generator = DhcpServCfgGenerator(dhcp_db_connector)
+        dhcp_cfg_generator = DhcpServCfgGenerator(dhcp_db_connector, "/usr/local/lib/kea/hooks/libdhcp_run_script.so")
         dhcpservd = DhcpServd(dhcp_cfg_generator, dhcp_db_connector, None)
         dhcpservd._update_dhcp_server_ip()
         if mock_intf:
@@ -99,7 +99,7 @@ def test_start(mock_swsscommon_dbconnector_init, mock_parse_port_map_alias, mock
          patch.object(DhcpServd, "_update_dhcp_server_ip") as mock_update_dhcp_server_ip, \
          patch.object(DhcpServdDbMonitor, "enable_checkers"):
         dhcp_db_connector = DhcpDbConnector()
-        dhcp_cfg_generator = DhcpServCfgGenerator(dhcp_db_connector)
+        dhcp_cfg_generator = DhcpServCfgGenerator(dhcp_db_connector, "/usr/local/lib/kea/hooks/libdhcp_run_script.so")
         dhcpservd = DhcpServd(dhcp_cfg_generator, dhcp_db_connector, MagicMock())
         dhcpservd.start()
         mock_dump.assert_called_once_with()
diff --git a/src/sonic-dhcp-utilities/tests/test_smart_switch.py b/src/sonic-dhcp-utilities/tests/test_smart_switch.py
index 0835e6b7b..9d9d8a33f 100644
--- a/src/sonic-dhcp-utilities/tests/test_smart_switch.py
+++ b/src/sonic-dhcp-utilities/tests/test_smart_switch.py
@@ -122,7 +122,7 @@ def test_dhcprelayd_proceed_with_check_res(mock_swsscommon_dbconnector_init, moc
 def test_dhcp_dhcp_cfggen_generate(mock_swsscommon_dbconnector_init, mock_parse_port_map_alias):
     with patch.object(DhcpDbConnector, "get_config_db_table", side_effect=mock_get_config_db_table):
         dhcp_db_connector = DhcpDbConnector()
-        dhcp_cfg_generator = DhcpServCfgGenerator(dhcp_db_connector,
+        dhcp_cfg_generator = DhcpServCfgGenerator(dhcp_db_connector, "/usr/local/lib/kea/hooks/libdhcp_run_script.so",
                                                   kea_conf_template_path="tests/test_data/kea-dhcp4.conf.j2")
         kea_dhcp4_config, used_ranges, enabled_dhcp_interfaces, used_options, subscribe_table = \
             dhcp_cfg_generator.generate()

From 2d96186091512ba35cabfa5d27ba067610d17434 Mon Sep 17 00:00:00 2001
From: Liu Shilong <shilongliu@microsoft.com>
Date: Wed, 24 Jan 2024 01:01:14 +0800
Subject: [PATCH 0179/1115] [ci] Update reproducible build pipeline, disable
 barefoot build. (#17857)

Fix reproducible build Upgrade version pipeline.

Remove barefoot build. Because it failed on sai package.
add marvell-arm64/pensando build.

Microsoft ADO (number only): 26515265
---
 .azure-pipelines/azure-pipelines-UpgrateVersion.yml | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/.azure-pipelines/azure-pipelines-UpgrateVersion.yml b/.azure-pipelines/azure-pipelines-UpgrateVersion.yml
index 6800b0c8e..d2be6dcbd 100644
--- a/.azure-pipelines/azure-pipelines-UpgrateVersion.yml
+++ b/.azure-pipelines/azure-pipelines-UpgrateVersion.yml
@@ -33,13 +33,14 @@ parameters:
   type: object
   default:
   - vs
-  - barefoot
   - broadcom
   - centec
   - centec-arm64
   - generic
   - marvell-armhf
+  - marvell-arm64
   - mellanox
+  - pensando
 
 stages:
 - stage: Prepare

From ff7c9930609c51e1dc20683d30e55dbde5a93279 Mon Sep 17 00:00:00 2001
From: Mai Bui <maibui@microsoft.com>
Date: Tue, 23 Jan 2024 14:02:54 -0500
Subject: [PATCH 0180/1115] [docker-p4rt limit privileged flag for p4rt
 container (#17796)

### Why I did it
HLD implementation: Container Hardening (https://github.com/sonic-net/SONiC/pull/1364)
##### Work item tracking
- Microsoft ADO **(number only)**: 14807420
#### How I did it
Reduce linux capabilities in privileged flag

#### How to verify it
Check container's settings: Privileged is false and container only has default Linux caps, does not have extended caps.
```
admin@vlab-01:~$ docker inspect p4rt | grep Privi
            "Privileged": false,


admin@vlab-01:~$ docker exec -it p4rt bash
root@vlab-01:/# capsh --print
Current: cap_chown,cap_dac_override,cap_fowner,cap_fsetid,cap_kill,cap_setgid,cap_setuid,cap_setpcap,cap_net_bind_service,cap_net_raw,cap_sys_chroot,cap_mknod,cap_audit_write,cap_setfcap=ep
```
---
 rules/docker-p4rt.mk | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/rules/docker-p4rt.mk b/rules/docker-p4rt.mk
index d34447b0e..bc8d6b9fb 100644
--- a/rules/docker-p4rt.mk
+++ b/rules/docker-p4rt.mk
@@ -31,7 +31,7 @@ SONIC_INSTALL_DOCKER_IMAGES += $(DOCKER_P4RT)
 endif
 
 $(DOCKER_P4RT)_CONTAINER_NAME = p4rt
-$(DOCKER_P4RT)_RUN_OPT += --privileged -t
+$(DOCKER_P4RT)_RUN_OPT += -t
 $(DOCKER_P4RT)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro
 $(DOCKER_P4RT)_RUN_OPT += -v /etc/timezone:/etc/timezone:ro 
 $(DOCKER_P4RT)_GIT_COMMIT = $(shell cd "$($(SONIC_P4RT)_SRC_PATH)" && git log -n 1 --format=format:"%H %s" || echo "Unable to fetch git log for p4rt")

From c693e75f0fd8d869d52f45fdf57987e79efb257b Mon Sep 17 00:00:00 2001
From: Oleksandr Ivantsiv <oivantsiv@nvidia.com>
Date: Tue, 23 Jan 2024 16:29:55 -0800
Subject: [PATCH 0181/1115] [dns] Do not apply dynamic DNS configuration when
 MGMT interface has static IP address. (#17769)

### Why I did it
Fix the issue detected by[ TestStaticMgmtPortIP::test_dynamic_dns_not_working_when_static_ip_configured ](https://github.com/sonic-net/sonic-mgmt/blob/master/tests/dns/static_dns/test_static_dns.py#L105C9-L105C63) test.

### How I did it
Query MGMT interface configuration. Do not apply dynamic DNS configuration when MGMT interface has static IP address.

#### How to verify it
Run `tests/dns/static_dns/test_static_dns.py` sonic-mgmt tests.
---
 .../resolv-config/resolv-config.sh            | 19 +++++++++++++++----
 1 file changed, 15 insertions(+), 4 deletions(-)

diff --git a/files/image_config/resolv-config/resolv-config.sh b/files/image_config/resolv-config/resolv-config.sh
index cffda6acb..a9f061e31 100755
--- a/files/image_config/resolv-config/resolv-config.sh
+++ b/files/image_config/resolv-config/resolv-config.sh
@@ -14,13 +14,24 @@ start()
 {
     update_symlink
 
-    redis-dump -d 4 -k "DNS_NAMESERVER*" -y > /tmp/dns.json
-    if [[ $? -eq 0 && "$(cat /tmp/dns.json)" != "{}" ]]; then
+    has_static_mgmt_ip=false
+    mgmt_ip_cfg=$(redis-dump -d 4 -k "MGMT_INTERFACE|eth0|*" -y)
+    if [[ $? -eq 0 && ${mgmt_ip_cfg} != "{}" ]]; then
+        has_static_mgmt_ip=true
+    fi
+
+    has_static_dns=false
+    dns_cfg=$(redis-dump -d 4 -k "DNS_NAMESERVER*" -y)
+    if [[ $? -eq 0 && ${dns_cfg} != "{}" ]]; then
+        has_static_dns=true
+    fi
+
+    if [[ ${has_static_mgmt_ip} == true || ${has_static_dns} == true ]]; then
         # Apply static DNS configuration and disable updates
         /sbin/resolvconf --disable-updates
         pushd ${CONFIG_DIR}
         # Backup dynamic configuration to restore it when the static configuration is removed
-        mv ${DYNAMIC_CONFIG_FILE_TEMPLATE} ${WD} || true
+        mv ${DYNAMIC_CONFIG_FILE_TEMPLATE} ${WD} 2>/dev/null || true
 
         sonic-cfggen -d -t /usr/share/sonic/templates/resolv.conf.j2,${STATIC_CONFIG_FILE}
 
@@ -34,7 +45,7 @@ start()
         pushd ${CONFIG_DIR}
         rm -f ${STATIC_CONFIG_FILE}
         # Restore dynamic configuration if it exists
-        mv ${WD}/${DYNAMIC_CONFIG_FILE_TEMPLATE} ${CONFIG_DIR} || true
+        mv ${WD}/${DYNAMIC_CONFIG_FILE_TEMPLATE} ${CONFIG_DIR} 2>/dev/null || true
 
         /sbin/resolvconf --enable-updates
         /sbin/resolvconf -u

From 24f8f8b9665b143be1d1cae535fb26f0286d9b5d Mon Sep 17 00:00:00 2001
From: abdosi <58047199+abdosi@users.noreply.github.com>
Date: Wed, 24 Jan 2024 10:36:01 -0800
Subject: [PATCH 0182/1115] [chassis] update service_checker module to handle
 database-chassis service (#17836)

* Update service_checker.py

Signed-off-by: Abhishek Dosi <abdosi@microsoft.com>
---
 src/system-health/health_checker/service_checker.py | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/src/system-health/health_checker/service_checker.py b/src/system-health/health_checker/service_checker.py
index a310fbba1..d2f245e70 100644
--- a/src/system-health/health_checker/service_checker.py
+++ b/src/system-health/health_checker/service_checker.py
@@ -4,7 +4,7 @@
 import re
 
 from swsscommon import swsscommon
-from sonic_py_common import multi_asic
+from sonic_py_common import multi_asic, device_info
 from sonic_py_common.logger import Logger
 from .health_checker import HealthChecker
 from . import utils
@@ -99,7 +99,9 @@ def get_expected_running_containers(self, feature_table):
                 else:
                     expected_running_containers.add(feature_name)
                     container_feature_dict[feature_name] = feature_name
-
+                    
+        if device_info.is_supervisor():
+            expected_running_containers.add("database-chassis")
         return expected_running_containers, container_feature_dict
 
     def get_current_running_containers(self):

From caefe1d17b2a19cd5be54f9fd324db62f7174349 Mon Sep 17 00:00:00 2001
From: Xichen96 <lukelin0907@gmail.com>
Date: Thu, 25 Jan 2024 11:38:29 +0800
Subject: [PATCH 0183/1115] [Dhcp_server] add config dhcp_server bind/unbind
 (#17811)

* add dhcp_server bind/unbind
---
 .../cli-plugin-tests/mock_config_db.json      |  20 +-
 .../test_config_dhcp_server.py                | 238 +++++++++++++++++-
 .../cli-plugin-tests/test_show_dhcp_server.py |  16 +-
 .../cli/config/plugins/dhcp_server.py         |  85 ++++++-
 4 files changed, 348 insertions(+), 11 deletions(-)

diff --git a/dockers/docker-dhcp-server/cli-plugin-tests/mock_config_db.json b/dockers/docker-dhcp-server/cli-plugin-tests/mock_config_db.json
index 773b7e178..cc5256079 100644
--- a/dockers/docker-dhcp-server/cli-plugin-tests/mock_config_db.json
+++ b/dockers/docker-dhcp-server/cli-plugin-tests/mock_config_db.json
@@ -8,10 +8,18 @@
     },
     "VLAN_INTERFACE|Vlan200": {
     },
-    "VLAN_INTERFACE|Vlan200|100.1.1.2/24": {
+    "VLAN_INTERFACE|Vlan200|100.1.2.2/24": {
     },
     "VLAN_INTERFACE|Vlan300": {
     },
+    "VLAN_MEMBER|Vlan100|Ethernet2": {
+    },
+    "VLAN_MEMBER|Vlan100|Ethernet4": {
+    },
+    "VLAN_MEMBER|Vlan100|Ethernet7": {
+    },
+    "VLAN_MEMBER|Vlan100|Ethernet8": {
+    },
     "DHCP_SERVER_IPV4|Vlan100": {
         "gateway": "100.1.1.1",
         "lease_time": "3600",
@@ -42,17 +50,23 @@
     "DHCP_SERVER_IPV4_RANGE|range3": {
         "range": "100.1.1.10"
     },
+    "DHCP_SERVER_IPV4_RANGE|range5": {
+        "range": "100.1.2.10"
+    },
+    "DHCP_SERVER_IPV4_RANGE|range6": {
+        "range": "100.1.2.11"
+    },
     "DHCP_SERVER_IPV4_IP|eth0": {
         "ip": "240.127.1.2"
     },
     "DHCP_SERVER_IPV4_PORT|Vlan100|Ethernet4": {
-        "ips": "100.1.1.10,10.1.1.11"
+        "ips": "100.1.1.10,100.1.1.11"
     },
     "DHCP_SERVER_IPV4_PORT|Vlan100|Ethernet7": {
         "ranges": "range1,range3"
     },
     "DHCP_SERVER_IPV4_PORT|Vlan200|Ethernet8": {
-        "ranges": "range1,range4"
+        "ranges": "range5,range6"
     },
     "DHCP_SERVER_IPV4_PORT|Ethernet9": {
         "ranges": "range5,range6"
diff --git a/dockers/docker-dhcp-server/cli-plugin-tests/test_config_dhcp_server.py b/dockers/docker-dhcp-server/cli-plugin-tests/test_config_dhcp_server.py
index 612f229cc..8cada47f0 100644
--- a/dockers/docker-dhcp-server/cli-plugin-tests/test_config_dhcp_server.py
+++ b/dockers/docker-dhcp-server/cli-plugin-tests/test_config_dhcp_server.py
@@ -51,7 +51,7 @@ def test_config_dhcp_server_ipv4_add(self, mock_db):
 
     def test_config_dhcp_server_ipv4_add_dup_gw_nm(self, mock_db):
         expected_value = {
-            "gateway": "100.1.1.2",
+            "gateway": "100.1.2.2",
             "lease_time": "1000",
             "mode": "PORT",
             "netmask": "255.255.255.0",
@@ -370,3 +370,239 @@ def test_config_dhcp_server_ipv4_range_delete_referenced_force(self, mock_db):
         assert result.exit_code == 0, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
         assert mock_db.exists("CONFIG_DB", "DHCP_SERVER_IPV4_RANGE|range1") == False
 
+    def test_config_dhcp_server_ipv4_bind_range_nonexisting(self, mock_db):
+        expected_value = "range2,range3"
+        runner = CliRunner()
+        db = clicommon.Db()
+        db.db = mock_db
+        result = runner.invoke(dhcp_server.dhcp_server.commands["ipv4"].commands["bind"], \
+                ["Vlan100", "Ethernet2", "--range", "range2,range3"], obj=db)
+        assert result.exit_code == 0, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
+        result = mock_db.get("CONFIG_DB", "DHCP_SERVER_IPV4_PORT|Vlan100|Ethernet2", "ranges")
+        assert result and set(result.split(",")) == set(expected_value.split(","))
+
+    def test_config_dhcp_server_ipv4_bind_ip_nonexisting(self, mock_db):
+        expected_value = "100.1.1.1,100.1.1.2"
+        runner = CliRunner()
+        db = clicommon.Db()
+        db.db = mock_db
+        result = runner.invoke(dhcp_server.dhcp_server.commands["ipv4"].commands["bind"], \
+                ["Vlan100", "Ethernet2", "100.1.1.1,100.1.1.2"], obj=db)
+        assert result.exit_code == 0, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
+        result = mock_db.get("CONFIG_DB", "DHCP_SERVER_IPV4_PORT|Vlan100|Ethernet2", "ips")
+        assert result and set(result.split(",")) == set(expected_value.split(","))
+
+    def test_config_dhcp_server_ipv4_bind_range_existing_no_duplicate(self, mock_db):
+        expected_value = "range1,range2,range3"
+        runner = CliRunner()
+        db = clicommon.Db()
+        db.db = mock_db
+        result = runner.invoke(dhcp_server.dhcp_server.commands["ipv4"].commands["bind"], \
+                ["Vlan100", "Ethernet7", "--range", "range2"], obj=db)
+        assert result.exit_code == 0, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
+        result = mock_db.get("CONFIG_DB", "DHCP_SERVER_IPV4_PORT|Vlan100|Ethernet7", "ranges")
+        assert result and set(result.split(",")) == set(expected_value.split(","))
+
+    def test_config_dhcp_server_ipv4_bind_range_existing_duplicate(self, mock_db):
+        expected_value = "range1,range2,range3"
+        runner = CliRunner()
+        db = clicommon.Db()
+        db.db = mock_db
+        result = runner.invoke(dhcp_server.dhcp_server.commands["ipv4"].commands["bind"], \
+                ["Vlan100", "Ethernet7", "--range", "range2,range3"], obj=db)
+        assert result.exit_code == 0, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
+        result = mock_db.get("CONFIG_DB", "DHCP_SERVER_IPV4_PORT|Vlan100|Ethernet7", "ranges")
+        assert result and set(result.split(",")) == set(expected_value.split(","))
+
+    def test_config_dhcp_server_ipv4_bind_ip_existing_no_duplicate(self, mock_db):
+        expected_value = "100.1.1.10,100.1.1.11,100.1.1.12,100.1.1.13"
+        runner = CliRunner()
+        db = clicommon.Db()
+        db.db = mock_db
+        result = runner.invoke(dhcp_server.dhcp_server.commands["ipv4"].commands["bind"], \
+                ["Vlan100", "Ethernet4", "100.1.1.12,100.1.1.13"], obj=db)
+        assert result.exit_code == 0, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
+        result = mock_db.get("CONFIG_DB", "DHCP_SERVER_IPV4_PORT|Vlan100|Ethernet4", "ips")
+        assert result and set(result.split(",")) == set(expected_value.split(","))
+
+    def test_config_dhcp_server_ipv4_bind_ip_existing_duplicate(self, mock_db):
+        expected_value = "100.1.1.10,100.1.1.11,100.1.1.12"
+        runner = CliRunner()
+        db = clicommon.Db()
+        db.db = mock_db
+        result = runner.invoke(dhcp_server.dhcp_server.commands["ipv4"].commands["bind"], \
+                ["Vlan100", "Ethernet4", "100.1.1.11,100.1.1.12"], obj=db)
+        assert result.exit_code == 0, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
+        result = mock_db.get("CONFIG_DB", "DHCP_SERVER_IPV4_PORT|Vlan100|Ethernet4", "ips")
+        assert result and set(result.split(",")) == set(expected_value.split(","))
+
+    def test_config_dhcp_server_ipv4_bind_nonexisting_range(self, mock_db):
+        runner = CliRunner()
+        db = clicommon.Db()
+        db.db = mock_db
+        result = runner.invoke(dhcp_server.dhcp_server.commands["ipv4"].commands["bind"], \
+                ["Vlan100", "Ethernet7", "--range", "range4"], obj=db)
+        assert result.exit_code == 2, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
+
+    def test_config_dhcp_server_ipv4_bind_range_out_of_subnet(self, mock_db):
+        runner = CliRunner()
+        db = clicommon.Db()
+        db.db = mock_db
+        result = runner.invoke(dhcp_server.dhcp_server.commands["ipv4"].commands["bind"], \
+                ["Vlan100", "Ethernet7", "--range", "range5"], obj=db)
+        assert result.exit_code == 2, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
+
+    def test_config_dhcp_server_ipv4_bind_ip_out_of_subnet(self, mock_db):
+        runner = CliRunner()
+        db = clicommon.Db()
+        db.db = mock_db
+        result = runner.invoke(dhcp_server.dhcp_server.commands["ipv4"].commands["bind"], \
+                ["Vlan100", "Ethernet4", "100.1.2.10"], obj=db)
+        assert result.exit_code == 2, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
+
+    def test_config_dhcp_server_ipv4_bind_interface_not_in_vlan(self, mock_db):
+        runner = CliRunner()
+        db = clicommon.Db()
+        db.db = mock_db
+        result = runner.invoke(dhcp_server.dhcp_server.commands["ipv4"].commands["bind"], \
+                ["Vlan100", "Ethernet5", "100.1.1.10"], obj=db)
+        assert result.exit_code == 2, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
+
+    def test_config_dhcp_server_ipv4_bind_range_and_ip(self, mock_db):
+        runner = CliRunner()
+        db = clicommon.Db()
+        db.db = mock_db
+        result = runner.invoke(dhcp_server.dhcp_server.commands["ipv4"].commands["bind"], \
+                ["Vlan100", "Ethernet2", "100.1.1.13,100.1.1.14", "--range", "range3"], obj=db)
+        assert result.exit_code == 2, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
+
+    def test_config_dhcp_server_ipv4_bind_range_to_existing_ip(self, mock_db):
+        runner = CliRunner()
+        db = clicommon.Db()
+        db.db = mock_db
+        result = runner.invoke(dhcp_server.dhcp_server.commands["ipv4"].commands["bind"], \
+                ["Vlan100", "Ethernet4", "--range", "range3"], obj=db)
+        assert result.exit_code == 2, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
+
+    def test_config_dhcp_server_ipv4_bind_ip_to_existing_range(self, mock_db):
+        runner = CliRunner()
+        db = clicommon.Db()
+        db.db = mock_db
+        result = runner.invoke(dhcp_server.dhcp_server.commands["ipv4"].commands["bind"], \
+                ["Vlan100", "Ethernet7", "100.1.1.13,100.1.1.14"], obj=db)
+        assert result.exit_code == 2, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
+
+    def test_config_dhcp_server_ipv4_bind_nothing(self, mock_db):
+        runner = CliRunner()
+        db = clicommon.Db()
+        db.db = mock_db
+        result = runner.invoke(dhcp_server.dhcp_server.commands["ipv4"].commands["bind"], \
+                ["Vlan100", "Ethernet2"], obj=db)
+        assert result.exit_code == 2, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
+
+    def test_config_dhcp_server_ipv4_unbind_range_with_remain(self, mock_db):
+        expected_value = "range1"
+        runner = CliRunner()
+        db = clicommon.Db()
+        db.db = mock_db
+        result = runner.invoke(dhcp_server.dhcp_server.commands["ipv4"].commands["unbind"], \
+                ["Vlan100", "Ethernet7", "--range", "range3"], obj=db)
+        assert result.exit_code == 0, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
+        result = mock_db.get("CONFIG_DB", "DHCP_SERVER_IPV4_PORT|Vlan100|Ethernet7", "ranges")
+        assert result and set(result.split(",")) == set(expected_value.split(","))
+
+    def test_config_dhcp_server_ipv4_unbind_range_with_no_remain(self, mock_db):
+        runner = CliRunner()
+        db = clicommon.Db()
+        db.db = mock_db
+        result = runner.invoke(dhcp_server.dhcp_server.commands["ipv4"].commands["unbind"], \
+                ["Vlan100", "Ethernet7", "--range", "range1,range3"], obj=db)
+        assert result.exit_code == 0, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
+        assert mock_db.exists("CONFIG_DB", "DHCP_SERVER_IPV4_PORT|Vlan100|Ethernet7") == False
+
+    def test_config_dhcp_server_ipv4_unbind_range_with_all(self, mock_db):
+        runner = CliRunner()
+        db = clicommon.Db()
+        db.db = mock_db
+        result = runner.invoke(dhcp_server.dhcp_server.commands["ipv4"].commands["unbind"], \
+                ["Vlan100", "Ethernet7", "all"], obj=db)
+        assert result.exit_code == 0, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
+        assert mock_db.exists("CONFIG_DB", "DHCP_SERVER_IPV4_PORT|Vlan100|Ethernet7") == False
+
+    def test_config_dhcp_server_ipv4_unbind_ip_with_remain(self, mock_db):
+        expected_value = "100.1.1.10"
+        runner = CliRunner()
+        db = clicommon.Db()
+        db.db = mock_db
+        result = runner.invoke(dhcp_server.dhcp_server.commands["ipv4"].commands["unbind"], \
+                ["Vlan100", "Ethernet4", "100.1.1.11"], obj=db)
+        assert result.exit_code == 0, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
+        result = mock_db.get("CONFIG_DB", "DHCP_SERVER_IPV4_PORT|Vlan100|Ethernet4", "ips")
+        assert result and set(result.split(",")) == set(expected_value.split(","))
+
+    def test_config_dhcp_server_ipv4_unbind_ip_with_no_remain(self, mock_db):
+        runner = CliRunner()
+        db = clicommon.Db()
+        db.db = mock_db
+        result = runner.invoke(dhcp_server.dhcp_server.commands["ipv4"].commands["unbind"], \
+                ["Vlan100", "Ethernet4", "100.1.1.10,100.1.1.11"], obj=db)
+        assert result.exit_code == 0, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
+        assert mock_db.exists("CONFIG_DB", "DHCP_SERVER_IPV4_PORT|Vlan100|Ethernet4") == False
+
+    def test_config_dhcp_server_ipv4_unbind_ip_all(self, mock_db):
+        runner = CliRunner()
+        db = clicommon.Db()
+        db.db = mock_db
+        result = runner.invoke(dhcp_server.dhcp_server.commands["ipv4"].commands["unbind"], \
+                ["Vlan100", "Ethernet4", "all"], obj=db)
+        assert result.exit_code == 0, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
+        assert mock_db.exists("CONFIG_DB", "DHCP_SERVER_IPV4_PORT|Vlan100|Ethernet4") == False
+
+    def test_config_dhcp_server_ipv4_unbind_range_and_ip(self, mock_db):
+        runner = CliRunner()
+        db = clicommon.Db()
+        db.db = mock_db
+        result = runner.invoke(dhcp_server.dhcp_server.commands["ipv4"].commands["unbind"], \
+                ["Vlan100", "Ethernet2", "100.1.1.13,100.1.1.14", "--range", "range3"], obj=db)
+        assert result.exit_code == 2, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
+
+    def test_config_dhcp_server_ipv4_unbind_range_to_existing_ip(self, mock_db):
+        runner = CliRunner()
+        db = clicommon.Db()
+        db.db = mock_db
+        result = runner.invoke(dhcp_server.dhcp_server.commands["ipv4"].commands["unbind"], \
+                ["Vlan100", "Ethernet4", "--range", "range3"], obj=db)
+        assert result.exit_code == 2, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
+
+    def test_config_dhcp_server_ipv4_unbind_ip_to_existing_range(self, mock_db):
+        runner = CliRunner()
+        db = clicommon.Db()
+        db.db = mock_db
+        result = runner.invoke(dhcp_server.dhcp_server.commands["ipv4"].commands["unbind"], \
+                ["Vlan100", "Ethernet7", "100.1.1.13,100.1.1.14"], obj=db)
+        assert result.exit_code == 2, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
+
+    def test_config_dhcp_server_ipv4_unbind_nothing(self, mock_db):
+        runner = CliRunner()
+        db = clicommon.Db()
+        db.db = mock_db
+        result = runner.invoke(dhcp_server.dhcp_server.commands["ipv4"].commands["unbind"], \
+                ["Vlan100", "Ethernet4"], obj=db)
+        assert result.exit_code == 2, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
+
+    def test_config_dhcp_server_ipv4_unbind_unbind_range(self, mock_db):
+        runner = CliRunner()
+        db = clicommon.Db()
+        db.db = mock_db
+        result = runner.invoke(dhcp_server.dhcp_server.commands["ipv4"].commands["unbind"], \
+                ["Vlan100", "Ethernet7", "--range", "range2"], obj=db)
+        assert result.exit_code == 2, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
+
+    def test_config_dhcp_server_ipv4_unbind_unbind_ip(self, mock_db):
+        runner = CliRunner()
+        db = clicommon.Db()
+        db.db = mock_db
+        result = runner.invoke(dhcp_server.dhcp_server.commands["ipv4"].commands["unbind"], \
+                ["Vlan100", "Ethernet4", "100.1.1.13,100.1.1.14"], obj=db)
+        assert result.exit_code == 2, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
+
diff --git a/dockers/docker-dhcp-server/cli-plugin-tests/test_show_dhcp_server.py b/dockers/docker-dhcp-server/cli-plugin-tests/test_show_dhcp_server.py
index f09c0a9c8..258c6d11c 100644
--- a/dockers/docker-dhcp-server/cli-plugin-tests/test_show_dhcp_server.py
+++ b/dockers/docker-dhcp-server/cli-plugin-tests/test_show_dhcp_server.py
@@ -76,6 +76,10 @@ def test_show_dhcp_server_ipv4_range_without_name(self, mock_db):
 +---------+------------+------------+------------------------+
 | range3  | 100.1.1.10 | 100.1.1.10 | 1                      |
 +---------+------------+------------+------------------------+
+| range5  | 100.1.2.10 | 100.1.2.10 | 1                      |
++---------+------------+------------+------------------------+
+| range6  | 100.1.2.11 | 100.1.2.11 | 1                      |
++---------+------------+------------+------------------------+
 """
         runner = CliRunner()
         db = clicommon.Db()
@@ -212,13 +216,13 @@ def test_show_dhcp_server_ipv4_port_without_intf(self, mock_db):
 | Interface         | Bind       |
 +===================+============+
 | Vlan100|Ethernet4 | 100.1.1.10 |
-|                   | 10.1.1.11  |
+|                   | 100.1.1.11 |
 +-------------------+------------+
 | Vlan100|Ethernet7 | range1     |
 |                   | range3     |
 +-------------------+------------+
-| Vlan200|Ethernet8 | range1     |
-|                   | range4     |
+| Vlan200|Ethernet8 | range5     |
+|                   | range6     |
 +-------------------+------------+
 | Ethernet9         | range5     |
 |                   | range6     |
@@ -253,7 +257,7 @@ def test_show_dhcp_server_ipv4_port_with_vlan(self, mock_db):
 | Interface         | Bind       |
 +===================+============+
 | Vlan100|Ethernet4 | 100.1.1.10 |
-|                   | 10.1.1.11  |
+|                   | 100.1.1.11 |
 +-------------------+------------+
 | Vlan100|Ethernet7 | range1     |
 |                   | range3     |
@@ -271,8 +275,8 @@ def test_show_dhcp_server_ipv4_port_with_port_and_vlan(self, mock_db):
 +-------------------+--------+
 | Interface         | Bind   |
 +===================+========+
-| Vlan200|Ethernet8 | range1 |
-|                   | range4 |
+| Vlan200|Ethernet8 | range5 |
+|                   | range6 |
 +-------------------+--------+
 """
         runner = CliRunner()
diff --git a/dockers/docker-dhcp-server/cli/config/plugins/dhcp_server.py b/dockers/docker-dhcp-server/cli/config/plugins/dhcp_server.py
index 237550a4b..fcf2bf1db 100644
--- a/dockers/docker-dhcp-server/cli/config/plugins/dhcp_server.py
+++ b/dockers/docker-dhcp-server/cli/config/plugins/dhcp_server.py
@@ -252,12 +252,95 @@ def dhcp_sever_ipv4_range_del(db, range_name, force):
             for port in dbconn.keys("CONFIG_DB", "DHCP_SERVER_IPV4_PORT*"):
                 ranges = dbconn.get("CONFIG_DB", port, "ranges")
                 if ranges and range_name in ranges.split(","):
-                    ctx.fail("Range {} is referenced in {}, cannot delete, add --force to bypass".format(range_name, port))
+                    ctx.fail("Range {} is referenced in {}, cannot delete, add --force to bypass or range unbind to unbind range first".format(range_name, port))
         dbconn.delete("CONFIG_DB", key)
     else:
         ctx.fail("Range {} does not exist, cannot delete".format(range_name))
 
 
+@dhcp_server_ipv4.command(name="bind")
+@click.argument("dhcp_interface", required=True)
+@click.argument("member_interface", required=True)
+@click.option("--range", "range_", required=False)
+@click.argument("ip_list", required=False)
+@clicommon.pass_db
+def dhcp_server_ipv4_ip_bind(db, dhcp_interface, member_interface, range_, ip_list):
+    ctx = click.get_current_context()
+    dbconn = db.db
+    if not dbconn.exists("CONFIG_DB", "VLAN_MEMBER|" + dhcp_interface + "|" + member_interface):
+        ctx.fail("Cannot confirm member interface {} is really in dhcp interface {}".format(member_interface, dhcp_interface))
+    vlan_prefix = "VLAN_INTERFACE|" + dhcp_interface + "|"
+    subnets = [ipaddress.ip_network(key[len(vlan_prefix):], strict=False) for key in dbconn.keys("CONFIG_DB", vlan_prefix + "*")]
+    if range_:
+        range_ = set(range_.split(","))
+        for r in range_:
+            if not dbconn.exists("CONFIG_DB", "DHCP_SERVER_IPV4_RANGE|" + r):
+                ctx.fail("Cannot bind nonexistent range {} to interface".format(r))
+            ip_range = dbconn.get("CONFIG_DB", "DHCP_SERVER_IPV4_RANGE|" + r, "range").split(",")
+            if len(ip_range) == 1:
+                ip_start = ip_range[0]
+                ip_end = ip_range[0]
+            if len(ip_range) == 2:
+                ip_start = ip_range[0]
+                ip_end = ip_range[1]
+            if not any([ipaddress.ip_address(ip_start) in subnet and ipaddress.ip_address(ip_end) in subnet for subnet in subnets]):
+                ctx.fail("Range {} is not in any subnet of vlan {}".format(r, dhcp_interface))
+    if ip_list:
+        ip_list = set(ip_list.split(","))
+        for ip in ip_list:
+            if not validate_str_type("ipv4-address", ip):
+                ctx.fail("Illegal IP address {}".format(ip))
+            if not any([ipaddress.ip_address(ip) in subnet for subnet in subnets]):
+                ctx.fail("IP {} is not in any subnet of vlan {}".format(ip, dhcp_interface))
+    if range_ and ip_list or not range_ and not ip_list:
+        ctx.fail("Only one of range and ip list need to be provided")
+    key = "DHCP_SERVER_IPV4_PORT|" + dhcp_interface + "|" + member_interface
+    key_exist = dbconn.exists("CONFIG_DB", key)
+    for bind_value_name, bind_value in [["ips", ip_list], ["ranges", range_]]:
+        if key_exist:
+            existing_value = dbconn.get("CONFIG_DB", key, bind_value_name)
+            if (not not existing_value) == (not bind_value):
+                ctx.fail("IP bind cannot have ip range and ip list configured at the same time")
+            if bind_value:
+                value_set = set(existing_value.split(",")) if existing_value else set()
+                new_value_set = value_set.union(bind_value)
+                dbconn.set("CONFIG_DB", key, bind_value_name, ",".join(new_value_set))
+        elif bind_value:
+            dbconn.hmset("CONFIG_DB", key, {bind_value_name: ",".join(bind_value)})
+
+
+@dhcp_server_ipv4.command(name="unbind")
+@click.argument("dhcp_interface", required=True)
+@click.argument("member_interface", required=True)
+@click.option("--range", "range_", required=False)
+@click.argument("ip_list", required=False)
+@clicommon.pass_db
+def dhcp_server_ipv4_ip_unbind(db, dhcp_interface, member_interface, range_, ip_list):
+    ctx = click.get_current_context()
+    dbconn = db.db
+    key = "DHCP_SERVER_IPV4_PORT|" + dhcp_interface + "|" + member_interface
+    if ip_list == "all":
+        dbconn.delete("CONFIG_DB", key)
+        return
+    if range_ and ip_list or not range_ and not ip_list:
+        ctx.fail("Only one of range and ip list need to be provided")
+    if not dbconn.exists("CONFIG_DB", key):
+        ctx.fail("The specified dhcp_interface and member interface is not bind to ip or range")
+    for unbind_value_name, unbind_value in [["ips", ip_list], ["ranges", range_]]:
+        if unbind_value:
+            unbind_value = set(unbind_value.split(","))
+            existing_value = dbconn.get("CONFIG_DB", key, unbind_value_name)
+            value_set = set(existing_value.split(",")) if existing_value else set()
+            if value_set.issuperset(unbind_value):
+                new_value_set = value_set.difference(unbind_value)
+                if new_value_set:
+                    dbconn.set("CONFIG_DB", key, unbind_value_name, ",".join(new_value_set))
+                else:
+                    dbconn.delete("CONFIG_DB", key)
+            else:
+                ctx.fail("Attempting to unbind range or ip that is not binded")
+
+
 def register(cli):
     # cli.add_command(dhcp_server)
     pass

From 1fb9732f41a167e923643f60c7972661103f8024 Mon Sep 17 00:00:00 2001
From: mssonicbld <sonicbld@microsoft.com>
Date: Wed, 24 Jan 2024 06:46:30 +0000
Subject: [PATCH 0184/1115] [ci/build]: Upgrade SONiC package versions

---
 .../versions-deb-bookworm                     |  11 +-
 .../versions-deb-bookworm-arm64               |   2 -
 .../versions-deb-bookworm-armhf               |   3 +-
 .../build-sonic-slave-bookworm/versions-py3   |  20 +-
 .../versions-py3-all-arm64                    |   7 -
 .../versions-py3-all-armhf                    |   7 -
 .../versions-deb-bullseye                     |  38 +--
 .../versions-deb-bullseye-arm64               |   3 -
 .../versions-deb-bullseye-armhf               |   3 -
 .../build-sonic-slave-bullseye/versions-py3   |  25 +-
 .../versions-py3-all-arm64                    |   6 -
 .../versions-py3-all-armhf                    |   6 -
 .../versions-deb-buster                       |   4 +
 .../versions-deb-buster-arm64                 |   4 -
 .../versions-deb-buster-armhf                 |   4 -
 .../build-sonic-slave-buster/versions-py2     |   5 +-
 .../versions-py2-all-arm64                    |   1 -
 .../versions-py2-all-armhf                    |   1 -
 .../build-sonic-slave-buster/versions-py3     |   2 +
 .../versions-py3-all-arm64                    |   1 -
 .../versions-py3-all-armhf                    |   1 -
 files/build/versions/default/versions-docker  |  30 +--
 files/build/versions/default/versions-git     |  22 +-
 files/build/versions/default/versions-mirror  |  40 ++--
 files/build/versions/default/versions-web     | 154 +++++++------
 .../versions-deb-bullseye                     |  12 +-
 .../dockers/docker-base-bullseye/versions-py3 |  10 +-
 .../docker-base-buster/versions-deb-buster    |   6 +-
 .../dockers/docker-base-buster/versions-py3   |   6 +-
 .../versions-deb-bullseye                     |  14 ++
 .../versions-deb-bullseye-arm64               |  14 --
 .../versions-deb-bullseye-armhf               |  14 --
 .../versions-py3                              |   5 +-
 .../versions-deb-buster                       |  14 ++
 .../versions-deb-buster-arm64                 |  14 --
 .../versions-deb-buster-armhf                 |  14 --
 .../docker-config-engine-buster/versions-py3  |   4 +-
 .../docker-database/versions-deb-bullseye     |   4 +-
 .../docker-dhcp-relay/versions-deb-bullseye   |   4 +-
 .../dockers/docker-dhcp-relay/versions-py3    |   3 +
 .../docker-eventd/versions-deb-bullseye       |   4 +-
 .../docker-fpm-frr/versions-deb-bullseye      |   4 +-
 .../versions-deb-bullseye                     |   8 +-
 .../versions-deb-bullseye                     |   8 +-
 .../docker-gbsyncd-vs/versions-deb-bullseye   |   4 +-
 .../dockers/docker-lldp/versions-deb-bullseye |   4 +-
 .../docker-macsec/versions-deb-bullseye       |   4 +-
 .../dockers/docker-mux/versions-deb-bullseye  |   4 +-
 .../dockers/docker-nat/versions-deb-bullseye  |   4 +-
 .../docker-orchagent/versions-deb-bullseye    |   4 +-
 .../versions-deb-bullseye                     |  22 +-
 .../docker-platform-monitor/versions-py3      |  12 +-
 .../dockers/docker-ptf-sai/versions-py3       |   4 +-
 .../dockers/docker-ptf/versions-deb-buster    |  26 +--
 .../versions/dockers/docker-ptf/versions-py2  |   6 +-
 .../versions-deb-bullseye                     |   4 +-
 .../docker-sflow/versions-deb-bullseye        |   4 +-
 .../dockers/docker-snmp/versions-deb-bullseye |   4 +-
 .../versions/dockers/docker-snmp/versions-py3 |   4 +-
 .../docker-sonic-gnmi/versions-deb-bullseye   |  26 +++
 .../versions-deb-buster                       |   8 +-
 .../docker-sonic-mgmt-framework/versions-py3  |   8 +-
 .../docker-sonic-vs/versions-deb-bullseye     |   8 +-
 .../dockers/docker-sonic-vs/versions-py3      |  34 +--
 .../versions-deb-bullseye                     |   2 +-
 .../versions-deb-bullseye                     |   4 +-
 .../versions-deb-bullseye                     |   2 +-
 .../docker-syncd-brcm/versions-deb-bullseye   |   5 +-
 .../versions-deb-bullseye                     |   2 +-
 .../docker-syncd-centec/versions-deb-bullseye |   6 +-
 .../versions-deb-bullseye-arm64               |  16 +-
 .../docker-syncd-mlnx-rpc/versions-py2        |   2 +-
 .../docker-syncd-mlnx/versions-deb-bullseye   |  44 ++--
 .../dockers/docker-syncd-mlnx/versions-py3    |   2 +-
 .../versions-deb-bullseye-armhf               |   2 +-
 .../versions-deb-bullseye                     |  17 ++
 .../docker-syncd-vs/versions-deb-bullseye     |   4 +-
 .../docker-teamd/versions-deb-bullseye        |   4 +-
 .../versions-deb-bookworm                     | 218 ++++++++----------
 .../versions-deb-bookworm-arm64               |  29 ---
 .../versions-deb-bookworm-armhf               |  17 +-
 .../dockers/sonic-slave-bookworm/versions-py3 |  13 +-
 .../versions-deb-bullseye                     |  72 +++---
 .../versions-deb-bullseye-arm64               |  20 --
 .../versions-deb-bullseye-armhf               |   9 +-
 .../dockers/sonic-slave-bullseye/versions-py3 |  12 +-
 .../sonic-slave-buster/versions-deb-buster    |  94 ++++----
 .../versions-deb-buster-arm64                 |   6 -
 .../versions-deb-buster-armhf                 |   7 +-
 .../dockers/sonic-slave-buster/versions-py3   |  14 +-
 .../host-base-image/versions-deb-bookworm     |  25 +-
 .../versions/host-image/versions-deb-bookworm |  71 ++++--
 .../host-image/versions-deb-bookworm-arm64    |  19 +-
 .../host-image/versions-deb-bookworm-armhf    |  15 +-
 files/build/versions/host-image/versions-py3  |  38 +--
 .../host-image/versions-py3-all-armhf         |   2 -
 96 files changed, 749 insertions(+), 800 deletions(-)
 delete mode 100644 files/build/versions/build/build-sonic-slave-bookworm/versions-deb-bookworm-arm64
 delete mode 100644 files/build/versions/build/build-sonic-slave-bookworm/versions-py3-all-arm64
 delete mode 100644 files/build/versions/build/build-sonic-slave-bookworm/versions-py3-all-armhf
 delete mode 100644 files/build/versions/build/build-sonic-slave-bullseye/versions-deb-bullseye-arm64
 delete mode 100644 files/build/versions/build/build-sonic-slave-bullseye/versions-deb-bullseye-armhf
 delete mode 100644 files/build/versions/build/build-sonic-slave-bullseye/versions-py3-all-arm64
 delete mode 100644 files/build/versions/build/build-sonic-slave-bullseye/versions-py3-all-armhf
 delete mode 100644 files/build/versions/build/build-sonic-slave-buster/versions-deb-buster-arm64
 delete mode 100644 files/build/versions/build/build-sonic-slave-buster/versions-deb-buster-armhf
 delete mode 100644 files/build/versions/build/build-sonic-slave-buster/versions-py2-all-arm64
 delete mode 100644 files/build/versions/build/build-sonic-slave-buster/versions-py2-all-armhf
 delete mode 100644 files/build/versions/build/build-sonic-slave-buster/versions-py3-all-arm64
 delete mode 100644 files/build/versions/build/build-sonic-slave-buster/versions-py3-all-armhf
 delete mode 100644 files/build/versions/dockers/docker-config-engine-bullseye/versions-deb-bullseye-arm64
 delete mode 100644 files/build/versions/dockers/docker-config-engine-bullseye/versions-deb-bullseye-armhf
 delete mode 100644 files/build/versions/dockers/docker-config-engine-buster/versions-deb-buster-arm64
 delete mode 100644 files/build/versions/dockers/docker-config-engine-buster/versions-deb-buster-armhf
 create mode 100644 files/build/versions/dockers/docker-dhcp-relay/versions-py3
 create mode 100644 files/build/versions/dockers/docker-sonic-gnmi/versions-deb-bullseye
 mode change 100755 => 100644 files/build/versions/dockers/docker-syncd-centec-rpc/versions-deb-bullseye
 mode change 100755 => 100644 files/build/versions/dockers/docker-syncd-centec/versions-deb-bullseye
 create mode 100644 files/build/versions/dockers/docker-syncd-pensando/versions-deb-bullseye
 delete mode 100644 files/build/versions/host-image/versions-py3-all-armhf

diff --git a/files/build/versions/build/build-sonic-slave-bookworm/versions-deb-bookworm b/files/build/versions/build/build-sonic-slave-bookworm/versions-deb-bookworm
index d5cd410a3..04542d6ef 100644
--- a/files/build/versions/build/build-sonic-slave-bookworm/versions-deb-bookworm
+++ b/files/build/versions/build/build-sonic-slave-bookworm/versions-deb-bookworm
@@ -1,5 +1,6 @@
-debootstrap==1.0.123+deb11u1
+applibs==1.mlnx.4.6.2134
 kernel-mft-dkms==4.25.0-62
+libnl-3-200==3.5.0-1
 libnl-3-dev==3.5.0-1
 libnl-cli-3-200==3.5.0-1
 libnl-cli-3-dev==3.5.0-1
@@ -7,6 +8,7 @@ libnl-genl-3-200==3.5.0-1
 libnl-genl-3-dev==3.5.0-1
 libnl-nf-3-200==3.5.0-1
 libnl-nf-3-dev==3.5.0-1
+libnl-route-3-200==3.5.0-1
 libnl-route-3-dev==3.5.0-1
 libswsscommon==1.0.0
 libswsscommon-dev==1.0.0
@@ -16,9 +18,16 @@ libyang==1.0.73
 libyang-cpp==1.0.73
 libyang-dev==1.0.73
 linux-headers-6.1.0-11-2-amd64==6.1.38-4
+linux-headers-6.1.0-11-2-arm64==6.1.38-4
 linux-headers-6.1.0-11-2-common==6.1.38-4
 net-tools==2.10-0.1
 python3-swsscommon==1.0.0
 python3-yang==1.0.73
 sonic-platform-pddf==1.1
 sonic-platform-pddf-sym==1.1
+sx-complib==1.mlnx.4.6.2134
+sx-complib-dev==1.mlnx.4.6.2134
+sx-gen-utils==1.mlnx.4.6.2134
+sx-gen-utils-dev==1.mlnx.4.6.2134
+sxd-libs==1.mlnx.4.6.2134
+sxd-libs-dev==1.mlnx.4.6.2134
diff --git a/files/build/versions/build/build-sonic-slave-bookworm/versions-deb-bookworm-arm64 b/files/build/versions/build/build-sonic-slave-bookworm/versions-deb-bookworm-arm64
deleted file mode 100644
index 3fb7b6ad0..000000000
--- a/files/build/versions/build/build-sonic-slave-bookworm/versions-deb-bookworm-arm64
+++ /dev/null
@@ -1,2 +0,0 @@
-libnl-3-200==3.5.0-1
-libnl-route-3-200==3.5.0-1
diff --git a/files/build/versions/build/build-sonic-slave-bookworm/versions-deb-bookworm-armhf b/files/build/versions/build/build-sonic-slave-bookworm/versions-deb-bookworm-armhf
index 3fb7b6ad0..9096b1dd6 100644
--- a/files/build/versions/build/build-sonic-slave-bookworm/versions-deb-bookworm-armhf
+++ b/files/build/versions/build/build-sonic-slave-bookworm/versions-deb-bookworm-armhf
@@ -1,2 +1 @@
-libnl-3-200==3.5.0-1
-libnl-route-3-200==3.5.0-1
+linux-headers-6.1.0-11-2-armmp==6.1.38-4
diff --git a/files/build/versions/build/build-sonic-slave-bookworm/versions-py3 b/files/build/versions/build/build-sonic-slave-bookworm/versions-py3
index c4ed4b16a..3278e5b87 100644
--- a/files/build/versions/build/build-sonic-slave-bookworm/versions-py3
+++ b/files/build/versions/build/build-sonic-slave-bookworm/versions-py3
@@ -1,34 +1,40 @@
+bitarray==2.8.1
 blessed==1.20.0
 cffi==1.16.0
+click==7.0
 click-log==0.4.0
-colorful==0.5.5
+colorful==0.5.6
 deepdiff==6.2.2
-docker==6.1.3
+docker==7.0.0
 docker-image-py==0.1.12
-enlighten==1.12.0
-filelock==3.12.4
+enlighten==1.12.4
+filelock==3.13.1
 ijson==3.2.3
 ipaddress==1.0.23
 jsondiff==2.0.0
 jsonpatch==1.33
 jsonpointer==2.4
 jsonschema==2.6.0
+lxml==4.9.1
 natsort==6.2.1
 netaddr==0.8.0
 netifaces==0.11.0
 ordered-set==4.1.0
 paramiko==2.11.0
+pexpect==4.9.0
 prefixed==0.7.0
 prettyprinter==0.18.0
-pycairo==1.25.0
+ptyprocess==0.7.0
+pycairo==1.25.1
 pycparser==2.21
 pynacl==1.5.0
 pyroute2==0.5.19
+pyyaml==6.0.1
 semantic-version==2.10.0
 systemd-python==235
 tabulate==0.9.0
 toposort==1.6
-wcwidth==0.2.8
-websocket-client==1.6.4
+urllib3==2.1.0
+wcwidth==0.2.13
 www-authenticate==0.9.2
 xmltodict==0.12.0
diff --git a/files/build/versions/build/build-sonic-slave-bookworm/versions-py3-all-arm64 b/files/build/versions/build/build-sonic-slave-bookworm/versions-py3-all-arm64
deleted file mode 100644
index 7a2aadd0d..000000000
--- a/files/build/versions/build/build-sonic-slave-bookworm/versions-py3-all-arm64
+++ /dev/null
@@ -1,7 +0,0 @@
-bitarray==2.8.1
-click==7.0
-lxml==4.9.1
-pexpect==4.8.0
-ptyprocess==0.7.0
-pyyaml==6.0.1
-urllib3==2.0.7
diff --git a/files/build/versions/build/build-sonic-slave-bookworm/versions-py3-all-armhf b/files/build/versions/build/build-sonic-slave-bookworm/versions-py3-all-armhf
deleted file mode 100644
index 7a2aadd0d..000000000
--- a/files/build/versions/build/build-sonic-slave-bookworm/versions-py3-all-armhf
+++ /dev/null
@@ -1,7 +0,0 @@
-bitarray==2.8.1
-click==7.0
-lxml==4.9.1
-pexpect==4.8.0
-ptyprocess==0.7.0
-pyyaml==6.0.1
-urllib3==2.0.7
diff --git a/files/build/versions/build/build-sonic-slave-bullseye/versions-deb-bullseye b/files/build/versions/build/build-sonic-slave-bullseye/versions-deb-bullseye
index 167336348..fe066a23f 100644
--- a/files/build/versions/build/build-sonic-slave-bullseye/versions-deb-bullseye
+++ b/files/build/versions/build/build-sonic-slave-bullseye/versions-deb-bullseye
@@ -1,6 +1,7 @@
-applibs==1.mlnx.4.6.1062
-applibs-dev==1.mlnx.4.6.1062
+applibs==1.mlnx.4.6.2134
+applibs-dev==1.mlnx.4.6.2134
 libdashapi==1.0.0
+libnl-3-200==3.5.0-1
 libnl-3-dev==3.5.0-1
 libnl-cli-3-200==3.5.0-1
 libnl-cli-3-dev==3.5.0-1
@@ -8,11 +9,14 @@ libnl-genl-3-200==3.5.0-1
 libnl-genl-3-dev==3.5.0-1
 libnl-nf-3-200==3.5.0-1
 libnl-nf-3-dev==3.5.0-1
+libnl-route-3-200==3.5.0-1
 libnl-route-3-dev==3.5.0-1
 libprotobuf-dev==3.21.12-3
 libprotobuf-lite32==3.21.12-3
 libprotobuf32==3.21.12-3
 libprotoc32==3.21.12-3
+libsai==1.13.0-1
+libsai-dev==1.13.0-1
 libsaimetadata==1.0.0
 libsaimetadata-dev==1.0.0
 libsairedis==1.0.0
@@ -36,19 +40,19 @@ python3-swsscommon==1.0.0
 python3-yang==1.0.73
 sonic-mgmt-common==1.0.0
 sonic-mgmt-common-codegen==1.0.0
-sx-acl-helper==1.mlnx.4.6.1062
-sx-acl-helper-dev==1.mlnx.4.6.1062
-sx-complib==1.mlnx.4.6.1062
-sx-complib-dev==1.mlnx.4.6.1062
-sx-examples==1.mlnx.4.6.1062
-sx-examples-dev==1.mlnx.4.6.1062
-sx-gen-utils==1.mlnx.4.6.1062
-sx-gen-utils-dev==1.mlnx.4.6.1062
-sx-hash-calc==1.mlnx.4.6.1062
-sx-obj-desc-lib==1.mlnx.4.6.1062
-sx-obj-desc-lib-dev==1.mlnx.4.6.1062
-sxd-libs==1.mlnx.4.6.1062
-sxd-libs-dev==1.mlnx.4.6.1062
+sx-acl-helper==1.mlnx.4.6.2134
+sx-acl-helper-dev==1.mlnx.4.6.2134
+sx-complib==1.mlnx.4.6.2134
+sx-complib-dev==1.mlnx.4.6.2134
+sx-examples==1.mlnx.4.6.2134
+sx-examples-dev==1.mlnx.4.6.2134
+sx-gen-utils==1.mlnx.4.6.2134
+sx-gen-utils-dev==1.mlnx.4.6.2134
+sx-hash-calc==1.mlnx.4.6.2134
+sx-obj-desc-lib==1.mlnx.4.6.2134
+sx-obj-desc-lib-dev==1.mlnx.4.6.2134
+sxd-libs==1.mlnx.4.6.2134
+sxd-libs-dev==1.mlnx.4.6.2134
 thrift-compiler==0.11.0-4
-wjh-libs==1.mlnx.4.6.1062
-wjh-libs-dev==1.mlnx.4.6.1062
+wjh-libs==1.mlnx.4.6.2134
+wjh-libs-dev==1.mlnx.4.6.2134
diff --git a/files/build/versions/build/build-sonic-slave-bullseye/versions-deb-bullseye-arm64 b/files/build/versions/build/build-sonic-slave-bullseye/versions-deb-bullseye-arm64
deleted file mode 100644
index a5524aa61..000000000
--- a/files/build/versions/build/build-sonic-slave-bullseye/versions-deb-bullseye-arm64
+++ /dev/null
@@ -1,3 +0,0 @@
-libnl-3-200==3.5.0-1
-libnl-route-3-200==3.5.0-1
-mrvllibsai==1.12.0-2
diff --git a/files/build/versions/build/build-sonic-slave-bullseye/versions-deb-bullseye-armhf b/files/build/versions/build/build-sonic-slave-bullseye/versions-deb-bullseye-armhf
deleted file mode 100644
index a5524aa61..000000000
--- a/files/build/versions/build/build-sonic-slave-bullseye/versions-deb-bullseye-armhf
+++ /dev/null
@@ -1,3 +0,0 @@
-libnl-3-200==3.5.0-1
-libnl-route-3-200==3.5.0-1
-mrvllibsai==1.12.0-2
diff --git a/files/build/versions/build/build-sonic-slave-bullseye/versions-py3 b/files/build/versions/build/build-sonic-slave-bullseye/versions-py3
index ec6e3108d..8cdab5b72 100644
--- a/files/build/versions/build/build-sonic-slave-bullseye/versions-py3
+++ b/files/build/versions/build/build-sonic-slave-bullseye/versions-py3
@@ -1,12 +1,16 @@
+bcrypt==3.2.2
+bitarray==2.8.1
 blessed==1.20.0
 cffi==1.16.0
-charset-normalizer==3.3.0
+charset-normalizer==3.3.2
+click==7.0
 click-log==0.4.0
-colorful==0.5.5
-docker==6.1.3
+colorful==0.5.6
+docker==7.0.0
 docker-image-py==0.1.12
-enlighten==1.12.0
-filelock==3.12.4
+enlighten==1.12.4
+filelock==3.13.1
+freezegun==1.4.0
 ijson==3.2.3
 ipaddress==1.0.23
 jsondiff==2.0.0
@@ -19,17 +23,20 @@ netifaces==0.11.0
 paramiko==2.11.0
 prefixed==0.7.0
 prettyprinter==0.18.0
-psutil==5.9.5
-pycairo==1.25.0
+psutil==5.9.8
+pycairo==1.25.1
 pycparser==2.21
 pynacl==1.5.0
 pyroute2==0.5.19
 python-arptable==0.0.2
+pyyaml==6.0.1
+requests==2.31.0
 semantic-version==2.10.0
 systemd-python==235
 tabulate==0.9.0
 toposort==1.6
-wcwidth==0.2.8
-websocket-client==1.6.4
+urllib3==2.1.0
+wcwidth==0.2.13
 www-authenticate==0.9.2
 xmltodict==0.12.0
+zipp==1.2.0
diff --git a/files/build/versions/build/build-sonic-slave-bullseye/versions-py3-all-arm64 b/files/build/versions/build/build-sonic-slave-bullseye/versions-py3-all-arm64
deleted file mode 100644
index f330ec47a..000000000
--- a/files/build/versions/build/build-sonic-slave-bullseye/versions-py3-all-arm64
+++ /dev/null
@@ -1,6 +0,0 @@
-bcrypt==3.2.2
-click==7.0
-pyyaml==6.0.1
-requests==2.31.0
-urllib3==2.0.7
-zipp==1.2.0
diff --git a/files/build/versions/build/build-sonic-slave-bullseye/versions-py3-all-armhf b/files/build/versions/build/build-sonic-slave-bullseye/versions-py3-all-armhf
deleted file mode 100644
index f330ec47a..000000000
--- a/files/build/versions/build/build-sonic-slave-bullseye/versions-py3-all-armhf
+++ /dev/null
@@ -1,6 +0,0 @@
-bcrypt==3.2.2
-click==7.0
-pyyaml==6.0.1
-requests==2.31.0
-urllib3==2.0.7
-zipp==1.2.0
diff --git a/files/build/versions/build/build-sonic-slave-buster/versions-deb-buster b/files/build/versions/build/build-sonic-slave-buster/versions-deb-buster
index 847836dae..0e5dff071 100644
--- a/files/build/versions/build/build-sonic-slave-buster/versions-deb-buster
+++ b/files/build/versions/build/build-sonic-slave-buster/versions-deb-buster
@@ -1,9 +1,13 @@
+libnl-3-200==3.5.0-1
+libnl-3-dev==3.5.0-1
 libnl-cli-3-200==3.5.0-1
 libnl-cli-3-dev==3.5.0-1
 libnl-genl-3-200==3.5.0-1
 libnl-genl-3-dev==3.5.0-1
 libnl-nf-3-200==3.5.0-1
 libnl-nf-3-dev==3.5.0-1
+libnl-route-3-200==3.5.0-1
+libnl-route-3-dev==3.5.0-1
 libsaimetadata==1.0.0
 libsaimetadata-dev==1.0.0
 libsairedis==1.0.0
diff --git a/files/build/versions/build/build-sonic-slave-buster/versions-deb-buster-arm64 b/files/build/versions/build/build-sonic-slave-buster/versions-deb-buster-arm64
deleted file mode 100644
index 93d9a650c..000000000
--- a/files/build/versions/build/build-sonic-slave-buster/versions-deb-buster-arm64
+++ /dev/null
@@ -1,4 +0,0 @@
-libnl-3-200==3.5.0-1
-libnl-3-dev==3.5.0-1
-libnl-route-3-200==3.5.0-1
-libnl-route-3-dev==3.5.0-1
diff --git a/files/build/versions/build/build-sonic-slave-buster/versions-deb-buster-armhf b/files/build/versions/build/build-sonic-slave-buster/versions-deb-buster-armhf
deleted file mode 100644
index 93d9a650c..000000000
--- a/files/build/versions/build/build-sonic-slave-buster/versions-deb-buster-armhf
+++ /dev/null
@@ -1,4 +0,0 @@
-libnl-3-200==3.5.0-1
-libnl-3-dev==3.5.0-1
-libnl-route-3-200==3.5.0-1
-libnl-route-3-dev==3.5.0-1
diff --git a/files/build/versions/build/build-sonic-slave-buster/versions-py2 b/files/build/versions/build/build-sonic-slave-buster/versions-py2
index e78665e7a..fcf28ba4b 100644
--- a/files/build/versions/build/build-sonic-slave-buster/versions-py2
+++ b/files/build/versions/build/build-sonic-slave-buster/versions-py2
@@ -1,10 +1,11 @@
-bitarray==1.5.3
+bitarray==2.8.1
 contextlib2==0.6.0.post1
 future==0.18.3
 importlib-resources==3.3.1
+ipaddress==1.0.23
 natsort==6.2.1
 netaddr==0.8.0
-pyang==2.5.3
+pyang==2.6.0
 pyangbind==0.6.0
 thrift==0.11.0
 zipp==1.2.0
diff --git a/files/build/versions/build/build-sonic-slave-buster/versions-py2-all-arm64 b/files/build/versions/build/build-sonic-slave-buster/versions-py2-all-arm64
deleted file mode 100644
index 0e2a77d69..000000000
--- a/files/build/versions/build/build-sonic-slave-buster/versions-py2-all-arm64
+++ /dev/null
@@ -1 +0,0 @@
-ipaddress==1.0.23
diff --git a/files/build/versions/build/build-sonic-slave-buster/versions-py2-all-armhf b/files/build/versions/build/build-sonic-slave-buster/versions-py2-all-armhf
deleted file mode 100644
index 0e2a77d69..000000000
--- a/files/build/versions/build/build-sonic-slave-buster/versions-py2-all-armhf
+++ /dev/null
@@ -1 +0,0 @@
-ipaddress==1.0.23
diff --git a/files/build/versions/build/build-sonic-slave-buster/versions-py3 b/files/build/versions/build/build-sonic-slave-buster/versions-py3
index 24e958d15..dd31a1ab2 100644
--- a/files/build/versions/build/build-sonic-slave-buster/versions-py3
+++ b/files/build/versions/build/build-sonic-slave-buster/versions-py3
@@ -1,7 +1,9 @@
+bitarray==2.8.1
 ijson==3.2.3
 ipaddress==1.0.23
 jsondiff==2.0.0
 natsort==6.2.1
 netaddr==0.8.0
+pyyaml==6.0.1
 tabulate==0.9.0
 xmltodict==0.12.0
diff --git a/files/build/versions/build/build-sonic-slave-buster/versions-py3-all-arm64 b/files/build/versions/build/build-sonic-slave-buster/versions-py3-all-arm64
deleted file mode 100644
index cf39afa6b..000000000
--- a/files/build/versions/build/build-sonic-slave-buster/versions-py3-all-arm64
+++ /dev/null
@@ -1 +0,0 @@
-pyyaml==6.0.1
diff --git a/files/build/versions/build/build-sonic-slave-buster/versions-py3-all-armhf b/files/build/versions/build/build-sonic-slave-buster/versions-py3-all-armhf
deleted file mode 100644
index cf39afa6b..000000000
--- a/files/build/versions/build/build-sonic-slave-buster/versions-py3-all-armhf
+++ /dev/null
@@ -1 +0,0 @@
-pyyaml==6.0.1
diff --git a/files/build/versions/default/versions-docker b/files/build/versions/default/versions-docker
index 5c1c36f34..a1c053f5a 100644
--- a/files/build/versions/default/versions-docker
+++ b/files/build/versions/default/versions-docker
@@ -1,15 +1,15 @@
-amd64:amd64/debian:bullseye==sha256:3da0c9fb1282040a13e26074dc1712f656fc2fa6d8d2e264612e5c7266f17653
-amd64:amd64/debian:buster==sha256:88a98482ebe4b8ef20104c844d74ac59a7241e8782c9ea3a1c1d47503dbbbddb
-amd64:debian:bookworm==sha256:7d3e8810c96a6a278c218eb8e7f01efaec9d65f50c54aae37421dc3cbeba6535
-amd64:debian:bullseye==sha256:c141beaa9e0767774221cc82efe3a6712a1cc4f75d2699334dfd9a28a6f7357b
-amd64:debian:buster==sha256:853b9ec779e55f670cbdcb5e15bfb778b5be2c5c61fc8c655638b7a977d273c6
-arm64:arm64v8/debian:bullseye==sha256:7a89d1fd045f797f2f34dd778bdf19335587357c3603859f2048f4c0285b06a8
-arm64:arm64v8/debian:buster==sha256:22d2604df80a9385e2dd191b518bb33b7204805e01fbc80621aac7441f8dd0fd
-arm64:debian:bookworm==sha256:7d3e8810c96a6a278c218eb8e7f01efaec9d65f50c54aae37421dc3cbeba6535
-arm64:debian:bullseye==sha256:c141beaa9e0767774221cc82efe3a6712a1cc4f75d2699334dfd9a28a6f7357b
-arm64:debian:buster==sha256:853b9ec779e55f670cbdcb5e15bfb778b5be2c5c61fc8c655638b7a977d273c6
-armhf:arm32v7/debian:bullseye==sha256:6879eee9d653dfa6d92b36fa682482facf009a5434036afdba78b488ea1b7e62
-armhf:arm32v7/debian:buster==sha256:68111b72aab43dcb684b0b4a3dc0926fcbb43f6f6c1f3a370ea6619ec7228d08
-armhf:debian:bookworm==sha256:7d3e8810c96a6a278c218eb8e7f01efaec9d65f50c54aae37421dc3cbeba6535
-armhf:debian:bullseye==sha256:c141beaa9e0767774221cc82efe3a6712a1cc4f75d2699334dfd9a28a6f7357b
-armhf:debian:buster==sha256:853b9ec779e55f670cbdcb5e15bfb778b5be2c5c61fc8c655638b7a977d273c6
+amd64:amd64/debian:bullseye==sha256:4cb3f4198e4af2d03dffe6bfa4f3686773596494ef298f3882553d52e885634b
+amd64:amd64/debian:buster==sha256:d39357a2a8840e450e387df33a5aaf8f0c8f99e388a0e18169f3dd240fc2393d
+amd64:debian:bookworm==sha256:b16cef8cbcb20935c0f052e37fc3d38dc92bfec0bcfb894c328547f81e932d67
+amd64:debian:bullseye==sha256:71cb300d5448af821aedfe63afd55ba05f45a6a79f00dcd131b96b780bb99fe4
+amd64:debian:buster==sha256:defa5d214292f2aaf7905d3e4bcdf8f628019feb63e7c8746df563d1a941f8d7
+arm64:arm64v8/debian:bullseye==sha256:c4a762841d008c85d809f0981c47e2a490c43483e4a169e17afa2dc83d18b2b1
+arm64:arm64v8/debian:buster==sha256:7d6cb4b56f1230b8692ed0c5fa5fa838ddd7ebd436a6463a6e9b29d1aa4c6e24
+arm64:debian:bookworm==sha256:b16cef8cbcb20935c0f052e37fc3d38dc92bfec0bcfb894c328547f81e932d67
+arm64:debian:bullseye==sha256:71cb300d5448af821aedfe63afd55ba05f45a6a79f00dcd131b96b780bb99fe4
+arm64:debian:buster==sha256:defa5d214292f2aaf7905d3e4bcdf8f628019feb63e7c8746df563d1a941f8d7
+armhf:arm32v7/debian:bullseye==sha256:70dcc7f2c51acbeaff85f700d9c1ef936371e60bdec8da15729c19503ef1fb8f
+armhf:arm32v7/debian:buster==sha256:d984bf6bd66a53445e82ca3e6ae8d3c40a866c053339acfd5f3fa705a7092b90
+armhf:debian:bookworm==sha256:b16cef8cbcb20935c0f052e37fc3d38dc92bfec0bcfb894c328547f81e932d67
+armhf:debian:bullseye==sha256:71cb300d5448af821aedfe63afd55ba05f45a6a79f00dcd131b96b780bb99fe4
+armhf:debian:buster==sha256:defa5d214292f2aaf7905d3e4bcdf8f628019feb63e7c8746df563d1a941f8d7
diff --git a/files/build/versions/default/versions-git b/files/build/versions/default/versions-git
index ffd7266ec..d1971d19c 100644
--- a/files/build/versions/default/versions-git
+++ b/files/build/versions/default/versions-git
@@ -1,22 +1,24 @@
-https://chromium.googlesource.com/chromium/tools/depot_tools.git==c7628f780970136892e71d9de0dee072a1982dc9
+https://chromium.googlesource.com/chromium/tools/depot_tools.git==00ae0c065cac5c7fd0855a38249dc17f4092bc14
 https://github.com/aristanetworks/swi-tools.git==b5f087e4774168bf536360d43c9c509c8f14ad9f
-https://github.com/CESNET/libyang.git==7e5ea21030fe6632b6faad30c0de8d9669503773
+https://github.com/CESNET/libyang.git==fc4dbd923e044006c93df020590a1e5a8656c09e
 https://github.com/daveolson53/audisp-tacplus.git==559c9f22edd4f2dea0ecedffb3ad9502b12a75b6
 https://github.com/daveolson53/libnss-tacplus.git==19008ab68d9d504aa58eb34d5f564755a1613b8b
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 https://salsa.debian.org/sk-guest/monit.git==c9da7ebb1f35dfba17b50b5969a6e75e29cbec0d
-https://salsa.debian.org/ssh-team/openssh.git==2b4ef335ae2ef4e1fe846b92c7047754aa706539
+https://salsa.debian.org/ssh-team/openssh.git==1d67ef8053a0ea5e9a57c0e6ad33604d17e95456
diff --git a/files/build/versions/default/versions-mirror b/files/build/versions/default/versions-mirror
index 27c915d41..d53f85a4d 100644
--- a/files/build/versions/default/versions-mirror
+++ b/files/build/versions/default/versions-mirror
@@ -1,23 +1,23 @@
-deb.debian.org_debian-security_dists_bookworm-security==2023-10-27T23:54:58Z
-deb.debian.org_debian_dists_bookworm==2023-10-07T09:29:19Z
-deb.debian.org_debian_dists_bookworm-updates==2023-10-27T20:11:46Z
+deb.debian.org_debian-security_dists_bookworm-security==2024-01-23T21:49:41Z
+deb.debian.org_debian_dists_bookworm==2023-12-10T17:43:24Z
+deb.debian.org_debian_dists_bookworm-updates==2024-01-23T20:15:19Z
 deb.nodesource.com_node%5f14.x_dists_bookworm==2023-02-17T00:35:29Z
 deb.nodesource.com_node%5f14.x_dists_bullseye==2023-02-17T00:35:28Z
 deb.nodesource.com_node%5f14.x_dists_buster==2023-02-17T00:35:28Z
-debian==20231027T000138Z
-debian-security==20231027T000139Z
-download.docker.com_linux_debian_dists_bookworm==2023-10-26T15:36:36Z
-download.docker.com_linux_debian_dists_bullseye==2023-10-26T15:36:36Z
-download.docker.com_linux_debian_dists_buster==2023-10-26T15:36:37Z
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-packages.trafficmanager.net_snapshot_debian_20231027T000138Z_dists_buster-updates==2023-06-10T08:55:10Z
+debian==20240123T000238Z
+debian-security==20240123T000351Z
+download.docker.com_linux_debian_dists_bookworm==2024-01-19T10:37:46Z
+download.docker.com_linux_debian_dists_bullseye==2024-01-19T10:37:46Z
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+packages.trafficmanager.net_snapshot_debian-security_20240123T000351Z_dists_bookworm-security==2024-01-22T18:13:05Z
+packages.trafficmanager.net_snapshot_debian-security_20240123T000351Z_dists_bullseye-security==2024-01-22T18:13:06Z
+packages.trafficmanager.net_snapshot_debian-security_20240123T000351Z_dists_buster_updates==2024-01-22T18:13:05Z
+packages.trafficmanager.net_snapshot_debian_20240123T000238Z_dists_bookworm==2023-12-10T17:43:24Z
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+packages.trafficmanager.net_snapshot_debian_20240123T000238Z_dists_bookworm-updates==2024-01-22T20:16:33Z
+packages.trafficmanager.net_snapshot_debian_20240123T000238Z_dists_bullseye==2023-10-07T11:07:16Z
+packages.trafficmanager.net_snapshot_debian_20240123T000238Z_dists_bullseye-backports==2024-01-22T20:16:33Z
+packages.trafficmanager.net_snapshot_debian_20240123T000238Z_dists_bullseye-updates==2024-01-22T20:16:33Z
+packages.trafficmanager.net_snapshot_debian_20240123T000238Z_dists_buster==2023-06-10T08:53:33Z
+packages.trafficmanager.net_snapshot_debian_20240123T000238Z_dists_buster-backports==2024-01-22T20:16:33Z
+packages.trafficmanager.net_snapshot_debian_20240123T000238Z_dists_buster-updates==2023-06-10T08:55:10Z
diff --git a/files/build/versions/default/versions-web b/files/build/versions/default/versions-web
index 4bb4ed84f..c30f1261a 100644
--- a/files/build/versions/default/versions-web
+++ b/files/build/versions/default/versions-web
@@ -19,8 +19,6 @@ http://ftp.us.debian.org/debian/pool/main/s/scapy/python-scapy_2.4.0-2_all.deb==
 http://www.mellanox.com/downloads/MFT/mft-4.25.0-62-x86_64-deb.tgz==658a7f7170f6798c98ef8b8045c70f0d
 https://archive.apache.org/dist/thrift/0.14.1/thrift-0.14.1.tar.gz==c64434548438df2cb1e53fb27c600e85
 https://bootstrap.pypa.io/pip/2.7/get-pip.py==60e8267eb1b7bc71dc4843eb7bd294d3
-https://deb.debian.org/debian/pool/main/d/debootstrap/debootstrap_1.0.123+deb11u1.dsc==27f74ae171f50bfc1116d3e23dbbab3f
-https://deb.debian.org/debian/pool/main/d/debootstrap/debootstrap_1.0.123+deb11u1.tar.gz==37b56a6cf74721c6496d05d032cd22af
 https://deb.debian.org/debian/pool/main/k/kdump-tools/kdump-tools_1.8.1.dsc==cf20d7dc926e6efb6946622f25728074
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 https://deb.nodesource.com/gpgkey/nodesource.gpg.key==003b51a89a133b5db4cca98b2dea3117
@@ -30,42 +28,58 @@ https://deb.nodesource.com/node_14.x/dists/buster/Release==42875141604382f0abb4d
 https://deb.nodesource.com/setup_14.x==c30873f4a513bb935afaf8f65e7de9e1
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+https://sonicstorage.blob.core.windows.net/public/fips/bullseye/0.9/amd64/libk5crypto3_1.18.3-6+deb11u1+fips_amd64.deb==5e8de29d5f6844f71f15cbf0c3993f1c
+https://sonicstorage.blob.core.windows.net/public/fips/bullseye/0.9/amd64/libpython3.9-minimal_3.9.2-1+fips_amd64.deb==e47afaa81099fa2949a2dce75cffb6da
+https://sonicstorage.blob.core.windows.net/public/fips/bullseye/0.9/amd64/libpython3.9-stdlib_3.9.2-1+fips_amd64.deb==ab079d683259b241186cc1b3c68f3d73
+https://sonicstorage.blob.core.windows.net/public/fips/bullseye/0.9/amd64/libpython3.9_3.9.2-1+fips_amd64.deb==c405132eacaf059c7c903f853d48be7e
+https://sonicstorage.blob.core.windows.net/public/fips/bullseye/0.9/amd64/libssl-dev_1.1.1n-0+deb11u5+fips_amd64.deb==7deccb6cb0197bd9dc257d54505533cf
+https://sonicstorage.blob.core.windows.net/public/fips/bullseye/0.9/amd64/libssl-doc_1.1.1n-0+deb11u5+fips_all.deb==3ac7462c370d85e42c03b11d26f35016
+https://sonicstorage.blob.core.windows.net/public/fips/bullseye/0.9/amd64/libssl1.1_1.1.1n-0+deb11u5+fips_amd64.deb==6a4505b82957d711e983e03364275521
+https://sonicstorage.blob.core.windows.net/public/fips/bullseye/0.9/amd64/openssh-client_8.4p1-5+deb11u2+fips_amd64.deb==1fb734b040398b0fb9c674385253b993
+https://sonicstorage.blob.core.windows.net/public/fips/bullseye/0.9/amd64/openssh-server_8.4p1-5+deb11u2+fips_amd64.deb==8ec9f1fbfedd6c36312c5181d9950b58
+https://sonicstorage.blob.core.windows.net/public/fips/bullseye/0.9/amd64/openssh-sftp-server_8.4p1-5+deb11u2+fips_amd64.deb==02e8be0633aff33497655261256eadca
+https://sonicstorage.blob.core.windows.net/public/fips/bullseye/0.9/amd64/openssl_1.1.1n-0+deb11u5+fips_amd64.deb==ee086d7e1fb0cfd36513ec242381af53
+https://sonicstorage.blob.core.windows.net/public/fips/bullseye/0.9/amd64/python3.9-minimal_3.9.2-1+fips_amd64.deb==44c28ede910f014efc84118bc8a4b73c
+https://sonicstorage.blob.core.windows.net/public/fips/bullseye/0.9/amd64/python3.9_3.9.2-1+fips_amd64.deb==30be224443931a2a3428aa270b87384a
+https://sonicstorage.blob.core.windows.net/public/fips/bullseye/0.9/amd64/symcrypt-openssl_0.9_amd64.deb==9095ce7fd2283806f0c3ce8a60d36ad2
+https://sonicstorage.blob.core.windows.net/public/fips/bullseye/0.9/arm64/golang-1.15-doc_1.15.15-1~deb11u4+fips_all.deb==72ead09139135d4ecd91b76c89128567
+https://sonicstorage.blob.core.windows.net/public/fips/bullseye/0.9/arm64/golang-1.15-go_1.15.15-1~deb11u4+fips_arm64.deb==b59f315800ca2ec31de79136dfb8979d
+https://sonicstorage.blob.core.windows.net/public/fips/bullseye/0.9/arm64/golang-1.15-src_1.15.15-1~deb11u4+fips_arm64.deb==0038c68ed1e3adb1b43434af81cff678
+https://sonicstorage.blob.core.windows.net/public/fips/bullseye/0.9/arm64/golang-1.15_1.15.15-1~deb11u4+fips_all.deb==847bc1fc5ce9c8ebae5176947ab34d30
+https://sonicstorage.blob.core.windows.net/public/fips/bullseye/0.9/arm64/libk5crypto3_1.18.3-6+deb11u1+fips_arm64.deb==0bb2a2d23f73e882d91b2e256aad08f6
+https://sonicstorage.blob.core.windows.net/public/fips/bullseye/0.9/arm64/libpython3.9-minimal_3.9.2-1+fips_arm64.deb==7e6ac5f9bce1ecd59532ed669040436d
+https://sonicstorage.blob.core.windows.net/public/fips/bullseye/0.9/arm64/libpython3.9-stdlib_3.9.2-1+fips_arm64.deb==1b86a9d8bafe7cddc484f4ac1010ee07
+https://sonicstorage.blob.core.windows.net/public/fips/bullseye/0.9/arm64/libpython3.9_3.9.2-1+fips_arm64.deb==edae5c269e2c401873e7cff3d4f93a7a
+https://sonicstorage.blob.core.windows.net/public/fips/bullseye/0.9/arm64/libssl-dev_1.1.1n-0+deb11u5+fips_arm64.deb==2116b0e949a521b02098f01aee5a33d4
+https://sonicstorage.blob.core.windows.net/public/fips/bullseye/0.9/arm64/libssl-doc_1.1.1n-0+deb11u5+fips_all.deb==3ac7462c370d85e42c03b11d26f35016
+https://sonicstorage.blob.core.windows.net/public/fips/bullseye/0.9/arm64/libssl1.1_1.1.1n-0+deb11u5+fips_arm64.deb==a6a6a6f2d23d91398f44570da6e2e80c
+https://sonicstorage.blob.core.windows.net/public/fips/bullseye/0.9/arm64/openssh-client_8.4p1-5+deb11u2+fips_arm64.deb==b30c745ca94e392740c67225802e9068
+https://sonicstorage.blob.core.windows.net/public/fips/bullseye/0.9/arm64/openssh-server_8.4p1-5+deb11u2+fips_arm64.deb==8ab6d9e3bac9d486bda5664e40f634ef
+https://sonicstorage.blob.core.windows.net/public/fips/bullseye/0.9/arm64/openssh-sftp-server_8.4p1-5+deb11u2+fips_arm64.deb==73c51fa8f165a014571c2bdbd843c517
+https://sonicstorage.blob.core.windows.net/public/fips/bullseye/0.9/arm64/openssl_1.1.1n-0+deb11u5+fips_arm64.deb==5c16b501e97678e7f55c616afa6423bb
+https://sonicstorage.blob.core.windows.net/public/fips/bullseye/0.9/arm64/python3.9-minimal_3.9.2-1+fips_arm64.deb==3ea50a9bb61102b7e2ffe8f7b79c3d5f
+https://sonicstorage.blob.core.windows.net/public/fips/bullseye/0.9/arm64/python3.9_3.9.2-1+fips_arm64.deb==4d6307dabcd3060235d6188cfa0346b8
+https://sonicstorage.blob.core.windows.net/public/fips/bullseye/0.9/arm64/symcrypt-openssl_0.9_arm64.deb==5138fe3d77f84c995ed412f064c07951
+https://sonicstorage.blob.core.windows.net/public/sai/bcmpai/REL_3.11/3.11/libsaibroncos_3.11_amd64.deb==6e21a16126e833516a9659d4c35c284e
 https://storage.googleapis.com/golang/go1.15.15.linux-amd64.tar.gz==b75227438c6129b5013da053b3aa3f38
 https://storage.googleapis.com/golang/go1.15.15.linux-arm64.tar.gz==6d721146a9195592d92a80cf27d475f9
 https://storage.googleapis.com/golang/go1.15.15.linux-armv6l.tar.gz==23d140bbeedc978b954de1a199a22bdb
diff --git a/files/build/versions/dockers/docker-base-bullseye/versions-deb-bullseye b/files/build/versions/dockers/docker-base-bullseye/versions-deb-bullseye
index 9c97d0cec..7ab5e0cfb 100644
--- a/files/build/versions/dockers/docker-base-bullseye/versions-deb-bullseye
+++ b/files/build/versions/dockers/docker-base-bullseye/versions-deb-bullseye
@@ -1,5 +1,5 @@
 ca-certificates==20210119
-curl==7.74.0-1.3+deb11u10
+curl==7.74.0-1.3+deb11u11
 iproute2==5.10.0-4
 jq==1.6-2.1
 less==551-2
@@ -9,7 +9,7 @@ libbrotli1==1.0.9-2+b2
 libbsd0==0.11.3-1+deb11u1
 libcap2==1:2.44-1
 libcap2-bin==1:2.44-1
-libcurl4==7.74.0-1.3+deb11u10
+libcurl4==7.74.0-1.3+deb11u11
 libdaemon0==0.14-7.1
 libdbus-1-3==1.12.28-0+deb11u1
 libelf1==0.183-1
@@ -31,7 +31,7 @@ libmnl0==1.0.4-3
 libmpdec3==2.5.1-1
 libncurses6==6.2+20201114-2+deb11u2
 libncursesw6==6.2+20201114-2+deb11u2
-libnghttp2-14==1.43.0-1
+libnghttp2-14==1.43.0-1+deb11u1
 libnorm1==1.5.9+dfsg-2
 libonig5==6.9.6-1.1
 libperl5.32==5.32.1-4+deb11u2
@@ -48,8 +48,8 @@ libsasl2-modules-db==2.1.27+dfsg-2.1+deb11u1
 libsodium23==1.0.18-1
 libsqlite3-0==3.34.1-3
 libssh2-1==1.9.0-2
-libssl-dev==1.1.1n-0+deb11u4+fips
-libssl1.1==1.1.1n-0+deb11u4+fips
+libssl-dev==1.1.1n-0+deb11u5+fips
+libssl1.1==1.1.1n-0+deb11u5+fips
 libwrap0==7.6.q-31
 libxtables12==1.8.7-1
 libzmq5==4.3.4-1
@@ -57,7 +57,7 @@ lua-bitop==1.0.2-5
 lua-cjson==2.1.0+dfsg-2.1
 media-types==4.0.0
 net-tools==1.60+git20181103.0eebece-1
-openssl==1.1.1n-0+deb11u4+fips
+openssl==1.1.1n-0+deb11u5+fips
 perl==5.32.1-4+deb11u2
 perl-modules-5.32==5.32.1-4+deb11u2
 procps==2:3.3.17-5
diff --git a/files/build/versions/dockers/docker-base-bullseye/versions-py3 b/files/build/versions/dockers/docker-base-bullseye/versions-py3
index 61ebeea0c..5145466a0 100644
--- a/files/build/versions/dockers/docker-base-bullseye/versions-py3
+++ b/files/build/versions/dockers/docker-base-bullseye/versions-py3
@@ -1,7 +1,11 @@
+async-timeout==4.0.3
 j2cli==0.3.10
-jinja2==3.1.2
-markupsafe==2.1.3
-pip==23.2.1
+jinja2==3.1.3
+markupsafe==2.1.4
+pip==23.3.2
+python-lzf==0.2.4
+rdbtools==0.1.15
+redis==5.0.1
 setuptools==49.6.0
 supervisor==4.2.1
 supervisord-dependent-startup==1.4.0
diff --git a/files/build/versions/dockers/docker-base-buster/versions-deb-buster b/files/build/versions/dockers/docker-base-buster/versions-deb-buster
index a2007f3c3..ab4875803 100644
--- a/files/build/versions/dockers/docker-base-buster/versions-deb-buster
+++ b/files/build/versions/dockers/docker-base-buster/versions-deb-buster
@@ -1,9 +1,9 @@
 ca-certificates==20200601~deb10u2
-curl==7.64.0-4+deb10u7
+curl==7.64.0-4+deb10u8
 jq==1.5+dfsg-2+b1
 less==487-0.1+b1
 libatomic1==8.3.0-6
-libcurl4==7.64.0-4+deb10u7
+libcurl4==7.64.0-4+deb10u8
 libdaemon0==0.14-7
 libdbus-1-3==1.12.28-0+deb10u1
 libestr0==0.1.10-2.1
@@ -24,7 +24,7 @@ libldap-common==2.4.47+dfsg-3+deb10u7
 liblognorm5==2.0.5-1
 liblua5.1-0==5.1.5-8.1+b2
 libmpdec2==2.4.2-2
-libncurses6==6.1+20181013-2+deb10u4
+libncurses6==6.1+20181013-2+deb10u5
 libnghttp2-14==1.36.0-2+deb10u2
 libnorm1==1.5.8+dfsg2-1
 libonig5==6.9.1-1
diff --git a/files/build/versions/dockers/docker-base-buster/versions-py3 b/files/build/versions/dockers/docker-base-buster/versions-py3
index 61ebeea0c..09ce5c537 100644
--- a/files/build/versions/dockers/docker-base-buster/versions-py3
+++ b/files/build/versions/dockers/docker-base-buster/versions-py3
@@ -1,7 +1,7 @@
 j2cli==0.3.10
-jinja2==3.1.2
-markupsafe==2.1.3
-pip==23.2.1
+jinja2==3.1.3
+markupsafe==2.1.4
+pip==23.3.2
 setuptools==49.6.0
 supervisor==4.2.1
 supervisord-dependent-startup==1.4.0
diff --git a/files/build/versions/dockers/docker-config-engine-bullseye/versions-deb-bullseye b/files/build/versions/dockers/docker-config-engine-bullseye/versions-deb-bullseye
index 1db2454d7..af8fc851e 100644
--- a/files/build/versions/dockers/docker-config-engine-bullseye/versions-deb-bullseye
+++ b/files/build/versions/dockers/docker-config-engine-bullseye/versions-deb-bullseye
@@ -1,18 +1,32 @@
 apt-utils==2.2.4
 dpkg-dev==1.20.13
+icu-devtools==67.1-7
 libboost-serialization1.74.0==1.74.0-9
+libc-dev-bin==2.31-13+deb11u7
+libc6-dev==2.31-13+deb11u7
+libcrypt-dev==1:4.4.18-4
 libhiredis0.14==0.14.1-1
+libicu-dev==67.1-7
+libicu67==67.1-7
 libjs-jquery==3.5.1+dfsg+~3.5.5-7
 libnl-3-200==3.5.0-1
 libnl-cli-3-200==3.5.0-1
 libnl-genl-3-200==3.5.0-1
 libnl-nf-3-200==3.5.0-1
 libnl-route-3-200==3.5.0-1
+libnsl-dev==1.3.0-2
 libpython3.9==3.9.2-1
 libswsscommon==1.0.0
+libtirpc-dev==1.3.1-1+deb11u1
+libxml2==2.9.10+dfsg-6.7+deb11u4
+libxml2-dev==2.9.10+dfsg-6.7+deb11u4
+libxslt1-dev==1.1.34-4+deb11u1
+libxslt1.1==1.1.34-4+deb11u1
 libyang==1.0.73
 libyang-cpp==1.0.73
+linux-libc-dev==5.10.205-2
 python3-swsscommon==1.0.0
 python3-yang==1.0.73
 sonic-db-cli==1.0.0
 sonic-eventd==1.0.0-0
+zlib1g-dev==1:1.2.11.dfsg-2+deb11u2
diff --git a/files/build/versions/dockers/docker-config-engine-bullseye/versions-deb-bullseye-arm64 b/files/build/versions/dockers/docker-config-engine-bullseye/versions-deb-bullseye-arm64
deleted file mode 100644
index e0c238bb3..000000000
--- a/files/build/versions/dockers/docker-config-engine-bullseye/versions-deb-bullseye-arm64
+++ /dev/null
@@ -1,14 +0,0 @@
-icu-devtools==67.1-7
-libc-dev-bin==2.31-13+deb11u7
-libc6-dev==2.31-13+deb11u7
-libcrypt-dev==1:4.4.18-4
-libicu-dev==67.1-7
-libicu67==67.1-7
-libnsl-dev==1.3.0-2
-libtirpc-dev==1.3.1-1+deb11u1
-libxml2==2.9.10+dfsg-6.7+deb11u4
-libxml2-dev==2.9.10+dfsg-6.7+deb11u4
-libxslt1-dev==1.1.34-4+deb11u1
-libxslt1.1==1.1.34-4+deb11u1
-linux-libc-dev==5.10.197-1
-zlib1g-dev==1:1.2.11.dfsg-2+deb11u2
diff --git a/files/build/versions/dockers/docker-config-engine-bullseye/versions-deb-bullseye-armhf b/files/build/versions/dockers/docker-config-engine-bullseye/versions-deb-bullseye-armhf
deleted file mode 100644
index e0c238bb3..000000000
--- a/files/build/versions/dockers/docker-config-engine-bullseye/versions-deb-bullseye-armhf
+++ /dev/null
@@ -1,14 +0,0 @@
-icu-devtools==67.1-7
-libc-dev-bin==2.31-13+deb11u7
-libc6-dev==2.31-13+deb11u7
-libcrypt-dev==1:4.4.18-4
-libicu-dev==67.1-7
-libicu67==67.1-7
-libnsl-dev==1.3.0-2
-libtirpc-dev==1.3.1-1+deb11u1
-libxml2==2.9.10+dfsg-6.7+deb11u4
-libxml2-dev==2.9.10+dfsg-6.7+deb11u4
-libxslt1-dev==1.1.34-4+deb11u1
-libxslt1.1==1.1.34-4+deb11u1
-linux-libc-dev==5.10.197-1
-zlib1g-dev==1:1.2.11.dfsg-2+deb11u2
diff --git a/files/build/versions/dockers/docker-config-engine-bullseye/versions-py3 b/files/build/versions/dockers/docker-config-engine-bullseye/versions-py3
index a2aba0f8a..57643d054 100644
--- a/files/build/versions/dockers/docker-config-engine-bullseye/versions-py3
+++ b/files/build/versions/dockers/docker-config-engine-bullseye/versions-py3
@@ -1,4 +1,3 @@
-async-timeout==4.0.3
 bitarray==2.8.1
 ijson==3.2.3
 ipaddress==1.0.23
@@ -6,12 +5,12 @@ jsondiff==2.0.0
 lxml==4.9.1
 natsort==6.2.1
 netaddr==0.8.0
-pyang==2.5.3
+pyang==2.6.0
 pyangbind==0.8.1
 pyyaml==6.0.1
 redis==4.5.4
 redis-dump-load==1.1
-regex==2023.8.8
+regex==2023.12.25
 six==1.16.0
 tabulate==0.9.0
 xmltodict==0.12.0
diff --git a/files/build/versions/dockers/docker-config-engine-buster/versions-deb-buster b/files/build/versions/dockers/docker-config-engine-buster/versions-deb-buster
index 8317e357d..4709ef8e9 100644
--- a/files/build/versions/dockers/docker-config-engine-buster/versions-deb-buster
+++ b/files/build/versions/dockers/docker-config-engine-buster/versions-deb-buster
@@ -1,9 +1,16 @@
 apt-utils==1.8.2.3
 bzip2==1.0.6-9.2~deb10u2
 dpkg-dev==1.19.8
+icu-devtools==63.1-6+deb10u3
 libapt-inst2.0==1.8.2.3
 libboost-serialization1.71.0==1.71.0-6~bpo10+1
+libc-dev-bin==2.28-10+deb10u2
+libc6-dev==2.28-10+deb10u2
+libdpkg-perl==1.19.8
+libglib2.0-0==2.58.3-2+deb10u5
 libhiredis0.14==0.14.0-3
+libicu-dev==63.1-6+deb10u3
+libicu63==63.1-6+deb10u3
 libnl-3-200==3.5.0-1
 libnl-cli-3-200==3.5.0-1
 libnl-genl-3-200==3.5.0-1
@@ -11,9 +18,16 @@ libnl-nf-3-200==3.5.0-1
 libnl-route-3-200==3.5.0-1
 libpython3.7==3.7.3-2+deb10u6
 libswsscommon==1.0.0
+libxml2==2.9.4+dfsg1-7+deb10u6
+libxml2-dev==2.9.4+dfsg1-7+deb10u6
+libxslt1-dev==1.1.32-2.2~deb10u2
+libxslt1.1==1.1.32-2.2~deb10u2
 libyang==1.0.73
 libyang-cpp==1.0.73
+linux-libc-dev==4.19.304-1
+pkg-config==0.29-6
 python3-swsscommon==1.0.0
 python3-yang==1.0.73
 sonic-db-cli==1.0.0
 xz-utils==5.2.4-1+deb10u1
+zlib1g-dev==1:1.2.11.dfsg-1+deb10u2
diff --git a/files/build/versions/dockers/docker-config-engine-buster/versions-deb-buster-arm64 b/files/build/versions/dockers/docker-config-engine-buster/versions-deb-buster-arm64
deleted file mode 100644
index 37c0b05bf..000000000
--- a/files/build/versions/dockers/docker-config-engine-buster/versions-deb-buster-arm64
+++ /dev/null
@@ -1,14 +0,0 @@
-icu-devtools==63.1-6+deb10u3
-libc-dev-bin==2.28-10+deb10u2
-libc6-dev==2.28-10+deb10u2
-libdpkg-perl==1.19.8
-libglib2.0-0==2.58.3-2+deb10u5
-libicu-dev==63.1-6+deb10u3
-libicu63==63.1-6+deb10u3
-libxml2==2.9.4+dfsg1-7+deb10u6
-libxml2-dev==2.9.4+dfsg1-7+deb10u6
-libxslt1-dev==1.1.32-2.2~deb10u2
-libxslt1.1==1.1.32-2.2~deb10u2
-linux-libc-dev==4.19.289-2
-pkg-config==0.29-6
-zlib1g-dev==1:1.2.11.dfsg-1+deb10u2
diff --git a/files/build/versions/dockers/docker-config-engine-buster/versions-deb-buster-armhf b/files/build/versions/dockers/docker-config-engine-buster/versions-deb-buster-armhf
deleted file mode 100644
index 37c0b05bf..000000000
--- a/files/build/versions/dockers/docker-config-engine-buster/versions-deb-buster-armhf
+++ /dev/null
@@ -1,14 +0,0 @@
-icu-devtools==63.1-6+deb10u3
-libc-dev-bin==2.28-10+deb10u2
-libc6-dev==2.28-10+deb10u2
-libdpkg-perl==1.19.8
-libglib2.0-0==2.58.3-2+deb10u5
-libicu-dev==63.1-6+deb10u3
-libicu63==63.1-6+deb10u3
-libxml2==2.9.4+dfsg1-7+deb10u6
-libxml2-dev==2.9.4+dfsg1-7+deb10u6
-libxslt1-dev==1.1.32-2.2~deb10u2
-libxslt1.1==1.1.32-2.2~deb10u2
-linux-libc-dev==4.19.289-2
-pkg-config==0.29-6
-zlib1g-dev==1:1.2.11.dfsg-1+deb10u2
diff --git a/files/build/versions/dockers/docker-config-engine-buster/versions-py3 b/files/build/versions/dockers/docker-config-engine-buster/versions-py3
index 4f3f381d6..bef6bce2d 100644
--- a/files/build/versions/dockers/docker-config-engine-buster/versions-py3
+++ b/files/build/versions/dockers/docker-config-engine-buster/versions-py3
@@ -7,12 +7,12 @@ jsondiff==2.0.0
 lxml==4.9.1
 natsort==6.2.1
 netaddr==0.8.0
-pyang==2.5.3
+pyang==2.6.0
 pyangbind==0.8.1
 pyyaml==6.0.1
 redis==4.5.4
 redis-dump-load==1.1
-regex==2023.8.8
+regex==2023.12.25
 six==1.16.0
 tabulate==0.9.0
 typing_extensions==4.7.1
diff --git a/files/build/versions/dockers/docker-database/versions-deb-bullseye b/files/build/versions/dockers/docker-database/versions-deb-bullseye
index ab7d28f43..c5d9dce12 100644
--- a/files/build/versions/dockers/docker-database/versions-deb-bullseye
+++ b/files/build/versions/dockers/docker-database/versions-deb-bullseye
@@ -3,7 +3,7 @@ gdbserver==10.1-1.7
 libbabeltrace1==1.5.8-1+b3
 libboost-regex1.74.0==1.74.0-9
 libcbor0==0.5.0+dfsg-2
-libcurl3-gnutls==7.74.0-1.3+deb11u10
+libcurl3-gnutls==7.74.0-1.3+deb11u11
 libdebuginfod1==0.183-1
 libdw1==0.183-1
 libedit2==3.1-20191231-2+b1
@@ -17,7 +17,7 @@ libsource-highlight-common==3.1.9-3
 libsource-highlight4v5==3.1.9-3+b1
 libswsscommon-dbgsym==1.0.0
 libunwind8==1.3.2-2
-openssh-client==1:8.4p1-5+deb11u2
+openssh-client==1:8.4p1-5+deb11u3
 redis-server==5:6.0.16-1+deb11u2
 sshpass==1.09-1+b1
 strace==5.10-1
diff --git a/files/build/versions/dockers/docker-dhcp-relay/versions-deb-bullseye b/files/build/versions/dockers/docker-dhcp-relay/versions-deb-bullseye
index 70ce46d96..5e65ac7c3 100644
--- a/files/build/versions/dockers/docker-dhcp-relay/versions-deb-bullseye
+++ b/files/build/versions/dockers/docker-dhcp-relay/versions-deb-bullseye
@@ -5,7 +5,7 @@ isc-dhcp-relay-dbgsym==4.4.1-2.3+deb11u2
 libbabeltrace1==1.5.8-1+b3
 libboost-regex1.74.0==1.74.0-9
 libcbor0==0.5.0+dfsg-2
-libcurl3-gnutls==7.74.0-1.3+deb11u10
+libcurl3-gnutls==7.74.0-1.3+deb11u11
 libdebuginfod1==0.183-1
 libdns-export1110==1:9.11.19+dfsg-2.1
 libdw1==0.183-1
@@ -28,7 +28,7 @@ libsource-highlight4v5==3.1.9-3+b1
 libswsscommon-dbgsym==1.0.0
 libunwind8==1.3.2-2
 lsof==4.93.2+dfsg-1.1
-openssh-client==1:8.4p1-5+deb11u2
+openssh-client==1:8.4p1-5+deb11u3
 sonic-dhcp6relay==1.0.0-0
 sonic-dhcp6relay-dbgsym==1.0.0-0
 sonic-dhcpmon==1.0.0-0
diff --git a/files/build/versions/dockers/docker-dhcp-relay/versions-py3 b/files/build/versions/dockers/docker-dhcp-relay/versions-py3
new file mode 100644
index 000000000..f26ca9b37
--- /dev/null
+++ b/files/build/versions/dockers/docker-dhcp-relay/versions-py3
@@ -0,0 +1,3 @@
+freezegun==1.4.0
+psutil==5.9.8
+python-dateutil==2.8.2
diff --git a/files/build/versions/dockers/docker-eventd/versions-deb-bullseye b/files/build/versions/dockers/docker-eventd/versions-deb-bullseye
index a5198084f..10c7dbc37 100644
--- a/files/build/versions/dockers/docker-eventd/versions-deb-bullseye
+++ b/files/build/versions/dockers/docker-eventd/versions-deb-bullseye
@@ -3,7 +3,7 @@ gdbserver==10.1-1.7
 libbabeltrace1==1.5.8-1+b3
 libboost-regex1.74.0==1.74.0-9
 libcbor0==0.5.0+dfsg-2
-libcurl3-gnutls==7.74.0-1.3+deb11u10
+libcurl3-gnutls==7.74.0-1.3+deb11u11
 libdebuginfod1==0.183-1
 libdw1==0.183-1
 libedit2==3.1-20191231-2+b1
@@ -17,7 +17,7 @@ libsource-highlight-common==3.1.9-3
 libsource-highlight4v5==3.1.9-3+b1
 libswsscommon-dbgsym==1.0.0
 libunwind8==1.3.2-2
-openssh-client==1:8.4p1-5+deb11u2
+openssh-client==1:8.4p1-5+deb11u3
 sonic-eventd-dbgsym==1.0.0-0
 sshpass==1.09-1+b1
 strace==5.10-1
diff --git a/files/build/versions/dockers/docker-fpm-frr/versions-deb-bullseye b/files/build/versions/dockers/docker-fpm-frr/versions-deb-bullseye
index 61b9cb9d4..c122570ea 100644
--- a/files/build/versions/dockers/docker-fpm-frr/versions-deb-bullseye
+++ b/files/build/versions/dockers/docker-fpm-frr/versions-deb-bullseye
@@ -9,7 +9,7 @@ libbabeltrace1==1.5.8-1+b3
 libboost-regex1.74.0==1.74.0-9
 libc-ares2==1.17.1-1+deb11u3
 libcbor0==0.5.0+dfsg-2
-libcurl3-gnutls==7.74.0-1.3+deb11u10
+libcurl3-gnutls==7.74.0-1.3+deb11u11
 libdebuginfod1==0.183-1
 libdw1==0.183-1
 libedit2==3.1-20191231-2+b1
@@ -34,7 +34,7 @@ libyang2==2.0.112-6
 libyang2-dbgsym==2.0.112-6
 logrotate==3.18.0-2+deb11u2
 lsof==4.93.2+dfsg-1.1
-openssh-client==1:8.4p1-5+deb11u2
+openssh-client==1:8.4p1-5+deb11u3
 pci.ids==0.0~2021.02.08-1
 sensible-utils==0.0.14
 sonic-rsyslog-plugin==1.0.0-0
diff --git a/files/build/versions/dockers/docker-gbsyncd-broncos/versions-deb-bullseye b/files/build/versions/dockers/docker-gbsyncd-broncos/versions-deb-bullseye
index a1e8206d9..5dc6c1313 100644
--- a/files/build/versions/dockers/docker-gbsyncd-broncos/versions-deb-bullseye
+++ b/files/build/versions/dockers/docker-gbsyncd-broncos/versions-deb-bullseye
@@ -6,7 +6,7 @@ libc-dev-bin==2.31-13+deb11u7
 libc6-dev==2.31-13+deb11u7
 libcbor0==0.5.0+dfsg-2
 libcrypt-dev==1:4.4.18-4
-libcurl3-gnutls==7.74.0-1.3+deb11u10
+libcurl3-gnutls==7.74.0-1.3+deb11u11
 libdebuginfod1==0.183-1
 libdw1==0.183-1
 libedit2==3.1-20191231-2+b1
@@ -20,7 +20,7 @@ libnsl-dev==1.3.0-2
 libprotobuf-dev==3.12.4-1+deb11u1
 libprotobuf-lite23==3.12.4-1+deb11u1
 libprotobuf23==3.12.4-1+deb11u1
-libsaibroncos==3.8
+libsaibroncos==3.11
 libsaimetadata==1.0.0
 libsairedis==1.0.0
 libsource-highlight-common==3.1.9-3
@@ -28,8 +28,8 @@ libsource-highlight4v5==3.1.9-3+b1
 libswsscommon-dbgsym==1.0.0
 libtirpc-dev==1.3.1-1+deb11u1
 libunwind8==1.3.2-2
-linux-libc-dev==5.10.197-1
-openssh-client==1:8.4p1-5+deb11u2
+linux-libc-dev==5.10.205-2
+openssh-client==1:8.4p1-5+deb11u3
 sshpass==1.09-1+b1
 strace==5.10-1
 syncd==1.0.0
diff --git a/files/build/versions/dockers/docker-gbsyncd-credo/versions-deb-bullseye b/files/build/versions/dockers/docker-gbsyncd-credo/versions-deb-bullseye
index 1d1a1c2a2..b993d31f2 100644
--- a/files/build/versions/dockers/docker-gbsyncd-credo/versions-deb-bullseye
+++ b/files/build/versions/dockers/docker-gbsyncd-credo/versions-deb-bullseye
@@ -3,7 +3,7 @@ gdbserver==10.1-1.7
 libbabeltrace1==1.5.8-1+b3
 libboost-regex1.74.0==1.74.0-9
 libcbor0==0.5.0+dfsg-2
-libcurl3-gnutls==7.74.0-1.3+deb11u10
+libcurl3-gnutls==7.74.0-1.3+deb11u11
 libdebuginfod1==0.183-1
 libdw1==0.183-1
 libedit2==3.1-20191231-2+b1
@@ -13,15 +13,15 @@ libgpm2==1.20.7-8
 libicu67==67.1-7
 libipt2==2.0.3-1
 libmpfr6==4.1.0-3
-libsaicredo==0.8.2
-libsaicredo-owl==0.8.2
+libsaicredo==0.9.3
+libsaicredo-owl==0.9.3
 libsaimetadata==1.0.0
 libsairedis==1.0.0
 libsource-highlight-common==3.1.9-3
 libsource-highlight4v5==3.1.9-3+b1
 libswsscommon-dbgsym==1.0.0
 libunwind8==1.3.2-2
-openssh-client==1:8.4p1-5+deb11u2
+openssh-client==1:8.4p1-5+deb11u3
 sshpass==1.09-1+b1
 strace==5.10-1
 syncd==1.0.0
diff --git a/files/build/versions/dockers/docker-gbsyncd-vs/versions-deb-bullseye b/files/build/versions/dockers/docker-gbsyncd-vs/versions-deb-bullseye
index 886fd078e..cdfa7d2de 100644
--- a/files/build/versions/dockers/docker-gbsyncd-vs/versions-deb-bullseye
+++ b/files/build/versions/dockers/docker-gbsyncd-vs/versions-deb-bullseye
@@ -3,7 +3,7 @@ gdbserver==10.1-1.7
 libbabeltrace1==1.5.8-1+b3
 libboost-regex1.74.0==1.74.0-9
 libcbor0==0.5.0+dfsg-2
-libcurl3-gnutls==7.74.0-1.3+deb11u10
+libcurl3-gnutls==7.74.0-1.3+deb11u11
 libdebuginfod1==0.183-1
 libdw1==0.183-1
 libedit2==3.1-20191231-2+b1
@@ -25,7 +25,7 @@ libsource-highlight4v5==3.1.9-3+b1
 libswsscommon-dbg==1.0.0
 libswsscommon-dbgsym==1.0.0
 libunwind8==1.3.2-2
-openssh-client==1:8.4p1-5+deb11u2
+openssh-client==1:8.4p1-5+deb11u3
 sshpass==1.09-1+b1
 strace==5.10-1
 syncd-vs==1.0.0
diff --git a/files/build/versions/dockers/docker-lldp/versions-deb-bullseye b/files/build/versions/dockers/docker-lldp/versions-deb-bullseye
index 35266c350..5ef038468 100644
--- a/files/build/versions/dockers/docker-lldp/versions-deb-bullseye
+++ b/files/build/versions/dockers/docker-lldp/versions-deb-bullseye
@@ -3,7 +3,7 @@ gdbserver==10.1-1.7
 libbabeltrace1==1.5.8-1+b3
 libboost-regex1.74.0==1.74.0-9
 libcbor0==0.5.0+dfsg-2
-libcurl3-gnutls==7.74.0-1.3+deb11u10
+libcurl3-gnutls==7.74.0-1.3+deb11u11
 libdebuginfod1==0.183-1
 libdw1==0.183-1
 libedit2==3.1-20191231-2+b1
@@ -26,7 +26,7 @@ libunwind8==1.3.2-2
 libxml2==2.9.10+dfsg-6.7+deb11u4
 lldpd==1.0.16-1+deb12u1
 lldpd-dbgsym==1.0.16-1+deb12u1
-openssh-client==1:8.4p1-5+deb11u2
+openssh-client==1:8.4p1-5+deb11u3
 pci.ids==0.0~2021.02.08-1
 sshpass==1.09-1+b1
 strace==5.10-1
diff --git a/files/build/versions/dockers/docker-macsec/versions-deb-bullseye b/files/build/versions/dockers/docker-macsec/versions-deb-bullseye
index 628968a2f..a24cc64c4 100644
--- a/files/build/versions/dockers/docker-macsec/versions-deb-bullseye
+++ b/files/build/versions/dockers/docker-macsec/versions-deb-bullseye
@@ -3,7 +3,7 @@ gdbserver==10.1-1.7
 libbabeltrace1==1.5.8-1+b3
 libboost-regex1.74.0==1.74.0-9
 libcbor0==0.5.0+dfsg-2
-libcurl3-gnutls==7.74.0-1.3+deb11u10
+libcurl3-gnutls==7.74.0-1.3+deb11u11
 libdashapi==1.0.0
 libdebuginfod1==0.183-1
 libdw1==0.183-1
@@ -25,7 +25,7 @@ libswsscommon-dbgsym==1.0.0
 libteam5==1.30-1
 libteamdctl0==1.30-1
 libunwind8==1.3.2-2
-openssh-client==1:8.4p1-5+deb11u2
+openssh-client==1:8.4p1-5+deb11u3
 python3-protobuf==3.21.12-3
 sshpass==1.09-1+b1
 strace==5.10-1
diff --git a/files/build/versions/dockers/docker-mux/versions-deb-bullseye b/files/build/versions/dockers/docker-mux/versions-deb-bullseye
index 0bdc24a59..04ef7009f 100644
--- a/files/build/versions/dockers/docker-mux/versions-deb-bullseye
+++ b/files/build/versions/dockers/docker-mux/versions-deb-bullseye
@@ -7,7 +7,7 @@ libboost-program-options1.74.0==1.74.0-9
 libboost-regex1.74.0==1.74.0-9
 libboost-thread1.74.0==1.74.0-9
 libcbor0==0.5.0+dfsg-2
-libcurl3-gnutls==7.74.0-1.3+deb11u10
+libcurl3-gnutls==7.74.0-1.3+deb11u11
 libdebuginfod1==0.183-1
 libdw1==0.183-1
 libedit2==3.1-20191231-2+b1
@@ -21,7 +21,7 @@ libsource-highlight-common==3.1.9-3
 libsource-highlight4v5==3.1.9-3+b1
 libswsscommon-dbgsym==1.0.0
 libunwind8==1.3.2-2
-openssh-client==1:8.4p1-5+deb11u2
+openssh-client==1:8.4p1-5+deb11u3
 sonic-linkmgrd==1.0.0-1
 sonic-linkmgrd-dbgsym==1.0.0-1
 sshpass==1.09-1+b1
diff --git a/files/build/versions/dockers/docker-nat/versions-deb-bullseye b/files/build/versions/dockers/docker-nat/versions-deb-bullseye
index 4a9c50d69..ae4e94d4f 100644
--- a/files/build/versions/dockers/docker-nat/versions-deb-bullseye
+++ b/files/build/versions/dockers/docker-nat/versions-deb-bullseye
@@ -6,7 +6,7 @@ iptables==1.8.7-1
 libbabeltrace1==1.5.8-1+b3
 libboost-regex1.74.0==1.74.0-9
 libcbor0==0.5.0+dfsg-2
-libcurl3-gnutls==7.74.0-1.3+deb11u10
+libcurl3-gnutls==7.74.0-1.3+deb11u11
 libdebuginfod1==0.183-1
 libdw1==0.183-1
 libedit2==3.1-20191231-2+b1
@@ -27,7 +27,7 @@ libsource-highlight4v5==3.1.9-3+b1
 libswsscommon-dbgsym==1.0.0
 libunwind8==1.3.2-2
 netbase==6.3
-openssh-client==1:8.4p1-5+deb11u2
+openssh-client==1:8.4p1-5+deb11u3
 sshpass==1.09-1+b1
 strace==5.10-1
 swss-dbg==1.0.0
diff --git a/files/build/versions/dockers/docker-orchagent/versions-deb-bullseye b/files/build/versions/dockers/docker-orchagent/versions-deb-bullseye
index c592d0c23..fb351d232 100644
--- a/files/build/versions/dockers/docker-orchagent/versions-deb-bullseye
+++ b/files/build/versions/dockers/docker-orchagent/versions-deb-bullseye
@@ -7,7 +7,7 @@ ifupdown==0.8.36
 libbabeltrace1==1.5.8-1+b3
 libboost-regex1.74.0==1.74.0-9
 libcbor0==0.5.0+dfsg-2
-libcurl3-gnutls==7.74.0-1.3+deb11u10
+libcurl3-gnutls==7.74.0-1.3+deb11u11
 libdebuginfod1==0.183-1
 libdw1==0.183-1
 libedit2==3.1-20191231-2+b1
@@ -29,7 +29,7 @@ libswsscommon-dbgsym==1.0.0
 libunwind8==1.3.2-2
 ndisc6==1.0.4-2
 ndppd==0.2.5-6
-openssh-client==1:8.4p1-5+deb11u2
+openssh-client==1:8.4p1-5+deb11u3
 pci.ids==0.0~2021.02.08-1
 pciutils==1:3.7.0-5
 sonic-rsyslog-plugin==1.0.0-0
diff --git a/files/build/versions/dockers/docker-platform-monitor/versions-deb-bullseye b/files/build/versions/dockers/docker-platform-monitor/versions-deb-bullseye
index 1ededc320..eff86a1a1 100644
--- a/files/build/versions/dockers/docker-platform-monitor/versions-deb-bullseye
+++ b/files/build/versions/dockers/docker-platform-monitor/versions-deb-bullseye
@@ -1,5 +1,5 @@
-applibs==1.mlnx.4.6.1062
-applibs-dev==1.mlnx.4.6.1062
+applibs==1.mlnx.4.6.2134
+applibs-dev==1.mlnx.4.6.2134
 dmidecode==3.3-2
 ethtool==1:5.9-1
 fancontrol==1:3.6.0-7
@@ -16,7 +16,7 @@ libbabeltrace1==1.5.8-1+b3
 libboost-regex1.74.0==1.74.0-9
 libcairo2==1.16.0-5
 libcbor0==0.5.0+dfsg-2
-libcurl3-gnutls==7.74.0-1.3+deb11u10
+libcurl3-gnutls==7.74.0-1.3+deb11u11
 libdatrie1==0.2.13-1
 libdbi1==0.9.0-6
 libdebuginfod1==0.183-1
@@ -65,11 +65,11 @@ libxml2==2.9.10+dfsg-6.7+deb11u4
 libxrender1==1:0.9.10-1
 lm-sensors==1:3.6.0-7
 lm-sensors-dbgsym==1:3.6.0-7
-openssh-client==1:8.4p1-5+deb11u2
+openssh-client==1:8.4p1-5+deb11u3
 pci.ids==0.0~2021.02.08-1
 pciutils==1:3.7.0-5
 psmisc==23.4-2
-python-sdk-api==1.mlnx.4.6.1062
+python-sdk-api==1.mlnx.4.6.2134
 python3-attr==20.3.0-1
 python3-importlib-metadata==1.6.0-2
 python3-jsonschema==3.2.0-3
@@ -87,12 +87,12 @@ sensord-dbgsym==1:3.6.0-7
 smartmontools==7.2-1
 sshpass==1.09-1+b1
 strace==5.10-1
-sx-complib==1.mlnx.4.6.1062
-sx-complib-dev==1.mlnx.4.6.1062
-sx-gen-utils==1.mlnx.4.6.1062
-sx-gen-utils-dev==1.mlnx.4.6.1062
-sxd-libs==1.mlnx.4.6.1062
-sxd-libs-dev==1.mlnx.4.6.1062
+sx-complib==1.mlnx.4.6.2134
+sx-complib-dev==1.mlnx.4.6.2134
+sx-gen-utils==1.mlnx.4.6.2134
+sx-gen-utils-dev==1.mlnx.4.6.2134
+sxd-libs==1.mlnx.4.6.2134
+sxd-libs-dev==1.mlnx.4.6.2134
 ucf==3.0043
 udev==247.3-7+deb11u4
 vim==2:8.2.2434-3+deb11u1
diff --git a/files/build/versions/dockers/docker-platform-monitor/versions-py3 b/files/build/versions/dockers/docker-platform-monitor/versions-py3
index 685f61058..2c02139a0 100644
--- a/files/build/versions/dockers/docker-platform-monitor/versions-py3
+++ b/files/build/versions/dockers/docker-platform-monitor/versions-py3
@@ -1,19 +1,19 @@
 attrs==20.3.0
-certifi==2023.7.22
-charset-normalizer==3.2.0
+certifi==2023.11.17
+charset-normalizer==3.3.2
 grpcio==1.39.0
 grpcio-tools==1.39.0
 guacamole==0.9.2
-idna==3.4
+idna==3.6
 importlib-metadata==1.6.0
 jsonschema==2.6.0
 libpci==0.2
 more-itertools==4.2.0
 netifaces==0.11.0
-protobuf==4.24.3
+protobuf==3.20.3
 pyrsistent==0.15.5
-python_sdk_api==4.6.1062
+python_sdk_api==4.6.2134
 requests==2.31.0
 thrift==0.13.0
-urllib3==2.0.5
+urllib3==2.1.0
 zipp==1.0.0
diff --git a/files/build/versions/dockers/docker-ptf-sai/versions-py3 b/files/build/versions/dockers/docker-ptf-sai/versions-py3
index 4aceee6c0..9a32487b4 100644
--- a/files/build/versions/dockers/docker-ptf-sai/versions-py3
+++ b/files/build/versions/dockers/docker-ptf-sai/versions-py3
@@ -2,9 +2,9 @@ crc16==0.1.1
 getmac==0.9.4
 importlib-metadata==6.7.0
 netifaces==0.11.0
-packaging==23.1
+packaging==23.2
 packet-helper==0.0.1
-psutil==5.9.5
+psutil==5.9.8
 ptf==0.0.0
 pyperclip==1.8.2
 pysubnettree==0.37
diff --git a/files/build/versions/dockers/docker-ptf/versions-deb-buster b/files/build/versions/dockers/docker-ptf/versions-deb-buster
index 0b9f3a2f3..e3414d16c 100644
--- a/files/build/versions/dockers/docker-ptf/versions-deb-buster
+++ b/files/build/versions/dockers/docker-ptf/versions-deb-buster
@@ -18,7 +18,7 @@ cmake-data==3.13.4-1
 cpp==4:8.3.0-1
 cpp-8==8.3.0-6
 cron==3.0pl1-134+deb10u1
-curl==7.64.0-4+deb10u7
+curl==7.64.0-4+deb10u8
 dbus==1.12.28-0+deb10u1
 dbus-user-session==1.12.28-0+deb10u1
 dconf-gsettings-backend==0.30.1-2
@@ -29,9 +29,9 @@ dirmngr==2.2.12-1+deb10u2
 dmsetup==2:1.02.155-3
 dpkg-dev==1.19.8
 ethtool==1:4.19-1
-exim4-base==4.92-8+deb10u8
-exim4-config==4.92-8+deb10u8
-exim4-daemon-light==4.92-8+deb10u8
+exim4-base==4.92-8+deb10u9
+exim4-config==4.92-8+deb10u9
+exim4-daemon-light==4.92-8+deb10u9
 fakeroot==1.23-1
 file==1:5.35-4+deb10u2
 fontconfig==2.13.1-2
@@ -114,8 +114,8 @@ libcryptsetup12==2:2.1.0-5+deb10u2
 libcups2==2.2.10-6+deb10u9
 libcupsfilters1==1.21.6-5+deb10u1
 libcupsimage2==2.2.10-6+deb10u9
-libcurl3-gnutls==7.64.0-4+deb10u7
-libcurl4==7.64.0-4+deb10u7
+libcurl3-gnutls==7.64.0-4+deb10u8
+libcurl4==7.64.0-4+deb10u8
 libdaemon0==0.14-7
 libdata-dump-perl==1.23-1
 libdatrie1==0.2.12-2
@@ -177,7 +177,7 @@ libglib2.0-data==2.58.3-2+deb10u5
 libglvnd0==1.1.0-1
 libglx-mesa0==18.3.6-2+deb10u1
 libglx0==1.1.0-1
-libgnutls-dane0==3.6.7-4+deb10u10
+libgnutls-dane0==3.6.7-4+deb10u11
 libgnutls30==3.6.7-4+deb10u10
 libgomp1==8.3.0-6
 libgpm2==1.20.7-5
@@ -263,7 +263,7 @@ libmpdec2==2.4.2-2
 libmpfr6==4.0.2-1
 libmpx2==8.3.0-6
 libmtdev1==1.1.5-1+b1
-libncurses6==6.1+20181013-2+deb10u4
+libncurses6==6.1+20181013-2+deb10u5
 libnet-dbus-perl==1.1.0-5+b1
 libnet-http-perl==6.18-1
 libnet-smtp-ssl-perl==1.04-1
@@ -462,7 +462,7 @@ libxxf86dga1==2:1.1.4-1+b3
 libxxf86vm1==1:1.1.4-1+b2
 libxxhash0==0.6.5-2
 libzzip-0-13==0.13.62-3.2+deb10u1
-linux-libc-dev==4.19.289-2
+linux-libc-dev==4.19.304-1
 lmodern==2.004.5-6
 logrotate==3.14.0-4
 lsb-base==10.2019051400
@@ -472,15 +472,15 @@ make==4.2.1-1.2
 manpages==4.16-2
 manpages-dev==4.16-2
 mime-support==3.62
-ncurses-term==6.1+20181013-2+deb10u4
+ncurses-term==6.1+20181013-2+deb10u5
 net-tools==1.60+git20180626.aebd88e-1
 netbase==5.6
 ntp==1:4.2.8p12+dfsg-4
 ntpdate==1:4.2.8p12+dfsg-4
 ntpstat==0.0.0.1-2
-openssh-client==1:7.9p1-10+deb10u3
-openssh-server==1:7.9p1-10+deb10u3
-openssh-sftp-server==1:7.9p1-10+deb10u3
+openssh-client==1:7.9p1-10+deb10u4
+openssh-server==1:7.9p1-10+deb10u4
+openssh-sftp-server==1:7.9p1-10+deb10u4
 openssl==1.1.1n-0+deb10u6
 patch==2.7.6-3+deb10u1
 perl==5.28.1-6+deb10u1
diff --git a/files/build/versions/dockers/docker-ptf/versions-py2 b/files/build/versions/dockers/docker-ptf/versions-py2
index c70de1d36..e3a3025a7 100644
--- a/files/build/versions/dockers/docker-ptf/versions-py2
+++ b/files/build/versions/dockers/docker-ptf/versions-py2
@@ -22,13 +22,13 @@ ipython-genutils==0.2.0
 itsdangerous==1.1.0
 jinja2==2.11.3
 markupsafe==1.1.1
-netaddr==0.9.0
+netaddr==0.10.1
 nnpy==1.4.2
 oslo.config==2.1.0
 paramiko==2.12.0
 pathlib2==2.3.7.post1
 pbr==2.0.0
-pexpect==4.8.0
+pexpect==4.9.0
 pickleshare==0.7.5
 pip==20.3.4
 plumbum==1.7.2
@@ -65,7 +65,7 @@ twisted==16.0.0
 typing==3.10.0.0
 unittest-xml-reporting==2.5.2
 unknown==0.0.0
-wcwidth==0.2.6
+wcwidth==0.2.13
 werkzeug==1.0.1
 wheel==0.37.1
 yabgp==0.8.2
diff --git a/files/build/versions/dockers/docker-router-advertiser/versions-deb-bullseye b/files/build/versions/dockers/docker-router-advertiser/versions-deb-bullseye
index 0956c97f7..c96c2d625 100644
--- a/files/build/versions/dockers/docker-router-advertiser/versions-deb-bullseye
+++ b/files/build/versions/dockers/docker-router-advertiser/versions-deb-bullseye
@@ -3,7 +3,7 @@ gdbserver==10.1-1.7
 libbabeltrace1==1.5.8-1+b3
 libboost-regex1.74.0==1.74.0-9
 libcbor0==0.5.0+dfsg-2
-libcurl3-gnutls==7.74.0-1.3+deb11u10
+libcurl3-gnutls==7.74.0-1.3+deb11u11
 libdebuginfod1==0.183-1
 libdw1==0.183-1
 libedit2==3.1-20191231-2+b1
@@ -17,7 +17,7 @@ libsource-highlight-common==3.1.9-3
 libsource-highlight4v5==3.1.9-3+b1
 libswsscommon-dbgsym==1.0.0
 libunwind8==1.3.2-2
-openssh-client==1:8.4p1-5+deb11u2
+openssh-client==1:8.4p1-5+deb11u3
 radvd==1:2.18-3
 sshpass==1.09-1+b1
 strace==5.10-1
diff --git a/files/build/versions/dockers/docker-sflow/versions-deb-bullseye b/files/build/versions/dockers/docker-sflow/versions-deb-bullseye
index a63e16446..889af0d45 100644
--- a/files/build/versions/dockers/docker-sflow/versions-deb-bullseye
+++ b/files/build/versions/dockers/docker-sflow/versions-deb-bullseye
@@ -6,7 +6,7 @@ hsflowd-dbg==2.0.51-26
 libbabeltrace1==1.5.8-1+b3
 libboost-regex1.74.0==1.74.0-9
 libcbor0==0.5.0+dfsg-2
-libcurl3-gnutls==7.74.0-1.3+deb11u10
+libcurl3-gnutls==7.74.0-1.3+deb11u11
 libdebuginfod1==0.183-1
 libdw1==0.183-1
 libedit2==3.1-20191231-2+b1
@@ -20,7 +20,7 @@ libsource-highlight-common==3.1.9-3
 libsource-highlight4v5==3.1.9-3+b1
 libswsscommon-dbgsym==1.0.0
 libunwind8==1.3.2-2
-openssh-client==1:8.4p1-5+deb11u2
+openssh-client==1:8.4p1-5+deb11u3
 psample==1.1-1
 sflowtool==5.04
 sshpass==1.09-1+b1
diff --git a/files/build/versions/dockers/docker-snmp/versions-deb-bullseye b/files/build/versions/dockers/docker-snmp/versions-deb-bullseye
index 7873406fe..02097494e 100644
--- a/files/build/versions/dockers/docker-snmp/versions-deb-bullseye
+++ b/files/build/versions/dockers/docker-snmp/versions-deb-bullseye
@@ -6,7 +6,7 @@ libbabeltrace1==1.5.8-1+b3
 libboost-regex1.74.0==1.74.0-9
 libc-l10n==2.31-13+deb11u7
 libcbor0==0.5.0+dfsg-2
-libcurl3-gnutls==7.74.0-1.3+deb11u10
+libcurl3-gnutls==7.74.0-1.3+deb11u11
 libdebuginfod1==0.183-1
 libdw1==0.183-1
 libedit2==3.1-20191231-2+b1
@@ -28,7 +28,7 @@ libsource-highlight4v5==3.1.9-3+b1
 libswsscommon-dbgsym==1.0.0
 libunwind8==1.3.2-2
 locales==2.31-13+deb11u7
-openssh-client==1:8.4p1-5+deb11u2
+openssh-client==1:8.4p1-5+deb11u3
 pci.ids==0.0~2021.02.08-1
 snmp==5.9+dfsg-4+deb11u1
 snmp-dbgsym==5.9+dfsg-4+deb11u1
diff --git a/files/build/versions/dockers/docker-snmp/versions-py3 b/files/build/versions/dockers/docker-snmp/versions-py3
index 91e8ffcda..6578258d1 100644
--- a/files/build/versions/dockers/docker-snmp/versions-py3
+++ b/files/build/versions/dockers/docker-snmp/versions-py3
@@ -1,4 +1,4 @@
-hiredis==2.2.3
-psutil==5.9.5
+hiredis==2.3.2
+psutil==5.9.8
 python-arptable==0.0.2
 smbus==1.1.post2
diff --git a/files/build/versions/dockers/docker-sonic-gnmi/versions-deb-bullseye b/files/build/versions/dockers/docker-sonic-gnmi/versions-deb-bullseye
new file mode 100644
index 000000000..33c2b2450
--- /dev/null
+++ b/files/build/versions/dockers/docker-sonic-gnmi/versions-deb-bullseye
@@ -0,0 +1,26 @@
+gdb==10.1-1.7
+gdbserver==10.1-1.7
+libbabeltrace1==1.5.8-1+b3
+libboost-regex1.74.0==1.74.0-9
+libcbor0==0.5.0+dfsg-2
+libcurl3-gnutls==7.74.0-1.3+deb11u11
+libdebuginfod1==0.183-1
+libdw1==0.183-1
+libedit2==3.1-20191231-2+b1
+libfido2-1==1.6.0-2
+libglib2.0-0==2.66.8-1
+libgpm2==1.20.7-8
+libicu67==67.1-7
+libipt2==2.0.3-1
+libmpfr6==4.1.0-3
+libsource-highlight-common==3.1.9-3
+libsource-highlight4v5==3.1.9-3+b1
+libswsscommon-dbgsym==1.0.0
+libunwind8==1.3.2-2
+openssh-client==1:8.4p1-5+deb11u3
+sonic-gnmi==0.1
+sonic-mgmt-common==1.0.0
+sshpass==1.09-1+b1
+strace==5.10-1
+vim==2:8.2.2434-3+deb11u1
+vim-runtime==2:8.2.2434-3+deb11u1
diff --git a/files/build/versions/dockers/docker-sonic-mgmt-framework/versions-deb-buster b/files/build/versions/dockers/docker-sonic-mgmt-framework/versions-deb-buster
index 2d38de20f..989ddfd32 100644
--- a/files/build/versions/dockers/docker-sonic-mgmt-framework/versions-deb-buster
+++ b/files/build/versions/dockers/docker-sonic-mgmt-framework/versions-deb-buster
@@ -2,9 +2,9 @@ gdb==8.2.1-2+b3
 gdbserver==8.2.1-2+b3
 libbabeltrace1==1.5.6-2+deb10u1
 libbsd0==0.9.1-2+deb10u1
-libcjson-dev==1.7.10-1.1+deb10u1
-libcjson1==1.7.10-1.1+deb10u1
-libcurl3-gnutls==7.64.0-4+deb10u7
+libcjson-dev==1.7.10-1.1+deb10u2
+libcjson1==1.7.10-1.1+deb10u2
+libcurl3-gnutls==7.64.0-4+deb10u8
 libdw1==0.176-1.1+deb10u1
 libedit2==3.1-20181209-1
 libglib2.0-0==2.58.3-2+deb10u5
@@ -15,7 +15,7 @@ libpopt0==1.16-12
 libswsscommon-dbgsym==1.0.0
 libunwind8==1.2.1-10~deb10u1
 libxml2==2.9.4+dfsg1-7+deb10u6
-openssh-client==1:7.9p1-10+deb10u3
+openssh-client==1:7.9p1-10+deb10u4
 sonic-mgmt-common==1.0.0
 sonic-mgmt-framework==1.0-01
 sonic-mgmt-framework-dbg==1.0-01
diff --git a/files/build/versions/dockers/docker-sonic-mgmt-framework/versions-py3 b/files/build/versions/dockers/docker-sonic-mgmt-framework/versions-py3
index fb5bbf7c8..6459004bb 100644
--- a/files/build/versions/dockers/docker-sonic-mgmt-framework/versions-py3
+++ b/files/build/versions/dockers/docker-sonic-mgmt-framework/versions-py3
@@ -1,13 +1,13 @@
-attrs==23.1.0
+attrs==23.2.0
 certifi==2017.4.17
-charset-normalizer==3.2.0
+charset-normalizer==3.3.2
 click==8.1.7
 clickclick==20.10.2
 connexion==2.7.0
 flask==2.2.5
 grpcio==1.58.0
 grpcio-tools==1.20.0
-idna==3.4
+idna==3.6
 importlib-resources==5.12.0
 inflection==0.5.1
 itsdangerous==2.1.2
@@ -18,7 +18,7 @@ openapi-schema-validator==0.4.4
 openapi-spec-validator==0.5.7
 pathable==0.4.3
 pkgutil_resolve_name==1.3.10
-protobuf==4.24.3
+protobuf==4.24.4
 pyrsistent==0.19.3
 python-dateutil==2.6.0
 requests==2.31.0
diff --git a/files/build/versions/dockers/docker-sonic-vs/versions-deb-bullseye b/files/build/versions/dockers/docker-sonic-vs/versions-deb-bullseye
index 2c99094fb..683c92343 100644
--- a/files/build/versions/dockers/docker-sonic-vs/versions-deb-bullseye
+++ b/files/build/versions/dockers/docker-sonic-vs/versions-deb-bullseye
@@ -98,16 +98,16 @@ libxml2==2.9.10+dfsg-6.7+deb11u4
 libxml2-dev==2.9.10+dfsg-6.7+deb11u4
 libyang2==2.0.112-6
 libzmq3-dev==4.3.4-1
-linux-libc-dev==5.10.197-1
+linux-libc-dev==5.10.205-2
 logrotate==3.18.0-2+deb11u2
 lsof==4.93.2+dfsg-1.1
 mailcap==3.69
 mime-support==3.66
 ndisc6==1.0.4-2
 netbase==6.3
-openssh-client==1:8.4p1-5+deb11u2
-openssh-server==1:8.4p1-5+deb11u2
-openssh-sftp-server==1:8.4p1-5+deb11u2
+openssh-client==1:8.4p1-5+deb11u3
+openssh-server==1:8.4p1-5+deb11u3
+openssh-sftp-server==1:8.4p1-5+deb11u3
 openssl==1.1.1w-0+deb11u1
 pinentry-curses==1.1.0-4
 psmisc==23.4-2
diff --git a/files/build/versions/dockers/docker-sonic-vs/versions-py3 b/files/build/versions/dockers/docker-sonic-vs/versions-py3
index 69b5c72aa..f603a7695 100644
--- a/files/build/versions/dockers/docker-sonic-vs/versions-py3
+++ b/files/build/versions/dockers/docker-sonic-vs/versions-py3
@@ -1,34 +1,34 @@
 async-timeout==4.0.2
 bcrypt==3.2.2
 blessed==1.20.0
-certifi==2023.7.22
-cffi==1.15.1
-charset-normalizer==3.2.0
+certifi==2023.11.17
+cffi==1.16.0
+charset-normalizer==3.3.2
 click==7.0
 click-log==0.4.0
-colorful==0.5.5
-cryptography==3.3.2
+colorful==0.5.6
+cryptography==42.0.0
 dbus-python==1.3.2
-docker==6.1.3
+docker==7.0.0
 docker-image-py==0.1.12
-enlighten==1.12.0
-filelock==3.12.4
-idna==3.4
+enlighten==1.12.4
+filelock==3.13.1
+idna==3.6
 importlib-metadata==6.1.0
 jsonpatch==1.33
 jsonpointer==2.4
-lazy-object-proxy==1.9.0
-m2crypto==0.39.0
+lazy-object-proxy==1.10.0
+m2crypto==0.40.1
 netifaces==0.10.9
-packaging==23.1
+packaging==23.2
 paramiko==2.11.0
-pexpect==4.8.0
+pexpect==4.9.0
 prefixed==0.7.0
 prettyprinter==0.18.0
 ptyprocess==0.7.0
-pycairo==1.24.0
+pycairo==1.25.1
 pycparser==2.21
-pygments==2.16.1
+pygments==2.17.2
 pygobject==3.46.0
 pynacl==1.5.0
 pyroute2==0.5.14
@@ -39,8 +39,8 @@ semantic-version==2.10.0
 systemd-python==235
 toposort==1.6
 typing_extensions==4.7.1
-urllib3==2.0.5
-wcwidth==0.2.6
+urllib3==2.1.0
+wcwidth==0.2.13
 websocket-client==1.6.3
 www-authenticate==0.9.2
 zipp==3.15.0
diff --git a/files/build/versions/dockers/docker-syncd-brcm-dnx-rpc/versions-deb-bullseye b/files/build/versions/dockers/docker-syncd-brcm-dnx-rpc/versions-deb-bullseye
index f2b73ec9c..053ffe835 100644
--- a/files/build/versions/dockers/docker-syncd-brcm-dnx-rpc/versions-deb-bullseye
+++ b/files/build/versions/dockers/docker-syncd-brcm-dnx-rpc/versions-deb-bullseye
@@ -57,7 +57,7 @@ libtsan0==10.2.1-6
 libubsan1==10.2.1-6
 libuv1==1.40.0-2
 libxml2==2.9.10+dfsg-6.7+deb11u4
-linux-libc-dev==5.10.197-1
+linux-libc-dev==5.10.205-2
 mailcap==3.69
 make==4.3-4.1
 mime-support==3.66
diff --git a/files/build/versions/dockers/docker-syncd-brcm-dnx/versions-deb-bullseye b/files/build/versions/dockers/docker-syncd-brcm-dnx/versions-deb-bullseye
index d4f54326a..1b0765aa1 100644
--- a/files/build/versions/dockers/docker-syncd-brcm-dnx/versions-deb-bullseye
+++ b/files/build/versions/dockers/docker-syncd-brcm-dnx/versions-deb-bullseye
@@ -5,7 +5,7 @@ kmod==28-1
 libbabeltrace1==1.5.8-1+b3
 libboost-regex1.74.0==1.74.0-9
 libcbor0==0.5.0+dfsg-2
-libcurl3-gnutls==7.74.0-1.3+deb11u10
+libcurl3-gnutls==7.74.0-1.3+deb11u11
 libdebuginfod1==0.183-1
 libdw1==0.183-1
 libedit2==3.1-20191231-2+b1
@@ -22,7 +22,7 @@ libsource-highlight-common==3.1.9-3
 libsource-highlight4v5==3.1.9-3+b1
 libswsscommon-dbgsym==1.0.0
 libunwind8==1.3.2-2
-openssh-client==1:8.4p1-5+deb11u2
+openssh-client==1:8.4p1-5+deb11u3
 sshpass==1.09-1+b1
 strace==5.10-1
 syncd==1.0.0
diff --git a/files/build/versions/dockers/docker-syncd-brcm-rpc/versions-deb-bullseye b/files/build/versions/dockers/docker-syncd-brcm-rpc/versions-deb-bullseye
index f2b73ec9c..053ffe835 100644
--- a/files/build/versions/dockers/docker-syncd-brcm-rpc/versions-deb-bullseye
+++ b/files/build/versions/dockers/docker-syncd-brcm-rpc/versions-deb-bullseye
@@ -57,7 +57,7 @@ libtsan0==10.2.1-6
 libubsan1==10.2.1-6
 libuv1==1.40.0-2
 libxml2==2.9.10+dfsg-6.7+deb11u4
-linux-libc-dev==5.10.197-1
+linux-libc-dev==5.10.205-2
 mailcap==3.69
 make==4.3-4.1
 mime-support==3.66
diff --git a/files/build/versions/dockers/docker-syncd-brcm/versions-deb-bullseye b/files/build/versions/dockers/docker-syncd-brcm/versions-deb-bullseye
index f0e5c2bef..1dd59320f 100644
--- a/files/build/versions/dockers/docker-syncd-brcm/versions-deb-bullseye
+++ b/files/build/versions/dockers/docker-syncd-brcm/versions-deb-bullseye
@@ -5,7 +5,7 @@ kmod==28-1
 libbabeltrace1==1.5.8-1+b3
 libboost-regex1.74.0==1.74.0-9
 libcbor0==0.5.0+dfsg-2
-libcurl3-gnutls==7.74.0-1.3+deb11u10
+libcurl3-gnutls==7.74.0-1.3+deb11u11
 libdebuginfod1==0.183-1
 libdw1==0.183-1
 libedit2==3.1-20191231-2+b1
@@ -23,7 +23,8 @@ libsource-highlight4v5==3.1.9-3+b1
 libswsscommon-dbgsym==1.0.0
 libunwind8==1.3.2-2
 libyaml-0-2==0.2.2-1
-openssh-client==1:8.4p1-5+deb11u2
+lz4==1.9.3-2
+openssh-client==1:8.4p1-5+deb11u3
 sshpass==1.09-1+b1
 strace==5.10-1
 syncd==1.0.0
diff --git a/files/build/versions/dockers/docker-syncd-centec-rpc/versions-deb-bullseye b/files/build/versions/dockers/docker-syncd-centec-rpc/versions-deb-bullseye
old mode 100755
new mode 100644
index f2b73ec9c..053ffe835
--- a/files/build/versions/dockers/docker-syncd-centec-rpc/versions-deb-bullseye
+++ b/files/build/versions/dockers/docker-syncd-centec-rpc/versions-deb-bullseye
@@ -57,7 +57,7 @@ libtsan0==10.2.1-6
 libubsan1==10.2.1-6
 libuv1==1.40.0-2
 libxml2==2.9.10+dfsg-6.7+deb11u4
-linux-libc-dev==5.10.197-1
+linux-libc-dev==5.10.205-2
 mailcap==3.69
 make==4.3-4.1
 mime-support==3.66
diff --git a/files/build/versions/dockers/docker-syncd-centec/versions-deb-bullseye b/files/build/versions/dockers/docker-syncd-centec/versions-deb-bullseye
old mode 100755
new mode 100644
index 36760cb71..f28efa949
--- a/files/build/versions/dockers/docker-syncd-centec/versions-deb-bullseye
+++ b/files/build/versions/dockers/docker-syncd-centec/versions-deb-bullseye
@@ -4,7 +4,7 @@ kmod==28-1
 libbabeltrace1==1.5.8-1+b3
 libboost-regex1.74.0==1.74.0-9
 libcbor0==0.5.0+dfsg-2
-libcurl3-gnutls==7.74.0-1.3+deb11u10
+libcurl3-gnutls==7.74.0-1.3+deb11u11
 libdebuginfod1==0.183-1
 libdw1==0.183-1
 libedit2==3.1-20191231-2+b1
@@ -16,7 +16,7 @@ libicu67==67.1-7
 libipt2==2.0.3-1
 libkmod2==28-1
 libmpfr6==4.1.0-3
-libsai==1.12.0-1
+libsai==1.13.0-1
 libsaimetadata==1.0.0
 libsairedis==1.0.0
 libsource-highlight-common==3.1.9-3
@@ -24,7 +24,7 @@ libsource-highlight4v5==3.1.9-3+b1
 libswsscommon-dbg==1.0.0
 libswsscommon-dbgsym==1.0.0
 libunwind8==1.3.2-2
-openssh-client==1:8.4p1-5+deb11u2
+openssh-client==1:8.4p1-5+deb11u3
 sshpass==1.09-1+b1
 strace==5.10-1
 syncd==1.0.0
diff --git a/files/build/versions/dockers/docker-syncd-centec/versions-deb-bullseye-arm64 b/files/build/versions/dockers/docker-syncd-centec/versions-deb-bullseye-arm64
index 1bbee2b22..27985507a 100644
--- a/files/build/versions/dockers/docker-syncd-centec/versions-deb-bullseye-arm64
+++ b/files/build/versions/dockers/docker-syncd-centec/versions-deb-bullseye-arm64
@@ -3,7 +3,7 @@ iputils-ping==3:20210202-1
 keyutils==1.6.1-2
 libdbus-1-dev==1.12.28-0+deb11u1
 libdevmapper1.02.1==2:1.02.175-2.1
-libdpkg-perl==1.20.12
+libdpkg-perl==1.20.13
 libevent-2.1-7==2.1.12-stable-1
 libexpat1-dev==2.2.10-2+deb11u5
 libnfsidmap2==0.25-6
@@ -12,10 +12,10 @@ libpcap0.8==1.10.0-2
 libpcap0.8-dev==1.10.0-2
 libpython2-dev==2.7.18-3
 libpython2-stdlib==2.7.18-3
-libpython2.7==2.7.18-8
-libpython2.7-dev==2.7.18-8
-libpython2.7-minimal==2.7.18-8
-libpython2.7-stdlib==2.7.18-8
+libpython2.7==2.7.18-8+deb11u1
+libpython2.7-dev==2.7.18-8+deb11u1
+libpython2.7-minimal==2.7.18-8+deb11u1
+libpython2.7-stdlib==2.7.18-8+deb11u1
 libsensors-config==1:3.6.0-7
 libsensors-dev==1:3.6.0-7
 libsensors4-dev==1:3.6.0-7
@@ -29,9 +29,9 @@ python-is-python2==2.7.18-9
 python2==2.7.18-3
 python2-dev==2.7.18-3
 python2-minimal==2.7.18-3
-python2.7==2.7.18-8
-python2.7-dev==2.7.18-8
-python2.7-minimal==2.7.18-8
+python2.7==2.7.18-8+deb11u1
+python2.7-dev==2.7.18-8+deb11u1
+python2.7-minimal==2.7.18-8+deb11u1
 rpcbind==1.2.5-9
 sensible-utils==0.0.14
 swig==4.0.2-1
diff --git a/files/build/versions/dockers/docker-syncd-mlnx-rpc/versions-py2 b/files/build/versions/dockers/docker-syncd-mlnx-rpc/versions-py2
index c7bc4a636..4544b66bc 100644
--- a/files/build/versions/dockers/docker-syncd-mlnx-rpc/versions-py2
+++ b/files/build/versions/dockers/docker-syncd-mlnx-rpc/versions-py2
@@ -3,7 +3,7 @@ nnpy==1.4.2
 pip==20.3.4
 ptf==0.9.1
 pycparser==2.21
-python-sdk-api==4.6.1062
+python-sdk-api==4.6.2134
 scapy==2.4.0
 setuptools==44.1.1
 wheel==0.37.1
diff --git a/files/build/versions/dockers/docker-syncd-mlnx/versions-deb-bullseye b/files/build/versions/dockers/docker-syncd-mlnx/versions-deb-bullseye
index c7bf22daf..2c1fb9b9d 100644
--- a/files/build/versions/dockers/docker-syncd-mlnx/versions-deb-bullseye
+++ b/files/build/versions/dockers/docker-syncd-mlnx/versions-deb-bullseye
@@ -1,5 +1,5 @@
-applibs==1.mlnx.4.6.1062
-applibs-dev==1.mlnx.4.6.1062
+applibs==1.mlnx.4.6.2134
+applibs-dev==1.mlnx.4.6.2134
 gdb==10.1-1.7
 gdbserver==10.1-1.7
 iproute2==1.mlnx.4.5.4206
@@ -11,7 +11,7 @@ libc-dev-bin==2.31-13+deb11u7
 libc6-dev==2.31-13+deb11u7
 libcbor0==0.5.0+dfsg-2
 libcrypt-dev==1:4.4.18-4
-libcurl3-gnutls==7.74.0-1.3+deb11u10
+libcurl3-gnutls==7.74.0-1.3+deb11u11
 libdebuginfod1==0.183-1
 libdw1==0.183-1
 libedit2==3.1-20191231-2+b1
@@ -40,13 +40,13 @@ libswsscommon-dbgsym==1.0.0
 libtirpc-dev==1.3.1-1+deb11u1
 libunwind8==1.3.2-2
 libxml2==2.9.10+dfsg-6.7+deb11u4
-linux-libc-dev==5.10.197-1
+linux-libc-dev==5.10.205-2
 mft==4.25.0-62
 mft-fwtrace-cfg==1.0.0
-mlnx-sai==1.mlnx.SAIBuild2211.25.1.4
-openssh-client==1:8.4p1-5+deb11u2
+mlnx-sai==1.mlnx.SAIBuild2311.26.0.28
+openssh-client==1:8.4p1-5+deb11u3
 python-pip-whl==20.3.4-4+deb11u1
-python-sdk-api==1.mlnx.4.6.1062
+python-sdk-api==1.mlnx.4.6.2134
 python3-attr==20.3.0-1
 python3-dev==3.9.2-3
 python3-importlib-metadata==1.6.0-2
@@ -62,25 +62,25 @@ python3-zipp==1.0.0-3
 python3.9-dev==3.9.2-1
 sshpass==1.09-1+b1
 strace==5.10-1
-sx-acl-helper==1.mlnx.4.6.1062
-sx-acl-helper-dev==1.mlnx.4.6.1062
-sx-complib==1.mlnx.4.6.1062
-sx-complib-dev==1.mlnx.4.6.1062
-sx-examples==1.mlnx.4.6.1062
-sx-examples-dev==1.mlnx.4.6.1062
-sx-gen-utils==1.mlnx.4.6.1062
-sx-gen-utils-dev==1.mlnx.4.6.1062
-sx-hash-calc==1.mlnx.4.6.1062
-sx-obj-desc-lib==1.mlnx.4.6.1062
-sx-obj-desc-lib-dev==1.mlnx.4.6.1062
+sx-acl-helper==1.mlnx.4.6.2134
+sx-acl-helper-dev==1.mlnx.4.6.2134
+sx-complib==1.mlnx.4.6.2134
+sx-complib-dev==1.mlnx.4.6.2134
+sx-examples==1.mlnx.4.6.2134
+sx-examples-dev==1.mlnx.4.6.2134
+sx-gen-utils==1.mlnx.4.6.2134
+sx-gen-utils-dev==1.mlnx.4.6.2134
+sx-hash-calc==1.mlnx.4.6.2134
+sx-obj-desc-lib==1.mlnx.4.6.2134
+sx-obj-desc-lib-dev==1.mlnx.4.6.2134
 sx-scew==1.mlnx.4.5.5142
 sx-scew-dev==1.mlnx.4.5.5142
-sxd-libs==1.mlnx.4.6.1062
-sxd-libs-dev==1.mlnx.4.6.1062
+sxd-libs==1.mlnx.4.6.2134
+sxd-libs-dev==1.mlnx.4.6.2134
 syncd==1.0.0
 syncd-dbg==1.0.0
 vim==2:8.2.2434-3+deb11u1
 vim-runtime==2:8.2.2434-3+deb11u1
-wjh-libs==1.mlnx.4.6.1062
-wjh-libs-dev==1.mlnx.4.6.1062
+wjh-libs==1.mlnx.4.6.2134
+wjh-libs-dev==1.mlnx.4.6.2134
 zlib1g-dev==1:1.2.11.dfsg-2+deb11u2
diff --git a/files/build/versions/dockers/docker-syncd-mlnx/versions-py3 b/files/build/versions/dockers/docker-syncd-mlnx/versions-py3
index c7bb4ca74..8d8f2bcb4 100644
--- a/files/build/versions/dockers/docker-syncd-mlnx/versions-py3
+++ b/files/build/versions/dockers/docker-syncd-mlnx/versions-py3
@@ -3,5 +3,5 @@ importlib-metadata==1.6.0
 jsonschema==3.2.0
 more-itertools==4.2.0
 pyrsistent==0.15.5
-python_sdk_api==4.6.1062
+python_sdk_api==4.6.2134
 zipp==1.0.0
diff --git a/files/build/versions/dockers/docker-syncd-mrvl/versions-deb-bullseye-armhf b/files/build/versions/dockers/docker-syncd-mrvl/versions-deb-bullseye-armhf
index 50830ad96..bb286f115 100644
--- a/files/build/versions/dockers/docker-syncd-mrvl/versions-deb-bullseye-armhf
+++ b/files/build/versions/dockers/docker-syncd-mrvl/versions-deb-bullseye-armhf
@@ -25,7 +25,7 @@ libsensors4-dev==1:3.6.0-7
 libsensors5==1:3.6.0-7
 mailcap==3.69
 mime-support==3.66
-mrvllibsai==1.12.0-2
+mrvllibsai==1.13.0-1
 nfs-common==1:1.3.4-6
 pkg-config==0.29.2-1
 python-dev-is-python2==2.7.18-9
diff --git a/files/build/versions/dockers/docker-syncd-pensando/versions-deb-bullseye b/files/build/versions/dockers/docker-syncd-pensando/versions-deb-bullseye
new file mode 100644
index 000000000..d79c3934e
--- /dev/null
+++ b/files/build/versions/dockers/docker-syncd-pensando/versions-deb-bullseye
@@ -0,0 +1,17 @@
+kmod==28-1
+libabsl20200923==0~20200923.3-2
+libc-ares2==1.17.1-1+deb11u3
+libgrpc++-dev==1.30.2-3
+libgrpc++1==1.30.2-3
+libgrpc-dev==1.30.2-3
+libgrpc10==1.30.2-3
+libkmod2==28-1
+libprotobuf-dev==3.12.4-1+deb11u1
+libprotobuf-lite23==3.12.4-1+deb11u1
+libprotobuf23==3.12.4-1+deb11u1
+libprotoc23==3.12.4-1+deb11u1
+libsai==1.10.1-0
+libsaimetadata==1.0.0
+libsairedis==1.0.0
+protobuf-compiler==3.12.4-1+deb11u1
+syncd==1.0.0
diff --git a/files/build/versions/dockers/docker-syncd-vs/versions-deb-bullseye b/files/build/versions/dockers/docker-syncd-vs/versions-deb-bullseye
index b1763d477..526f470f7 100644
--- a/files/build/versions/dockers/docker-syncd-vs/versions-deb-bullseye
+++ b/files/build/versions/dockers/docker-syncd-vs/versions-deb-bullseye
@@ -4,7 +4,7 @@ iproute2==5.10.0-4sonic1
 libbabeltrace1==1.5.8-1+b3
 libboost-regex1.74.0==1.74.0-9
 libcbor0==0.5.0+dfsg-2
-libcurl3-gnutls==7.74.0-1.3+deb11u10
+libcurl3-gnutls==7.74.0-1.3+deb11u11
 libdebuginfod1==0.183-1
 libdw1==0.183-1
 libedit2==3.1-20191231-2+b1
@@ -25,7 +25,7 @@ libsource-highlight-common==3.1.9-3
 libsource-highlight4v5==3.1.9-3+b1
 libswsscommon-dbgsym==1.0.0
 libunwind8==1.3.2-2
-openssh-client==1:8.4p1-5+deb11u2
+openssh-client==1:8.4p1-5+deb11u3
 sshpass==1.09-1+b1
 strace==5.10-1
 syncd-vs==1.0.0
diff --git a/files/build/versions/dockers/docker-teamd/versions-deb-bullseye b/files/build/versions/dockers/docker-teamd/versions-deb-bullseye
index 3f6d9d44e..7b97b1684 100644
--- a/files/build/versions/dockers/docker-teamd/versions-deb-bullseye
+++ b/files/build/versions/dockers/docker-teamd/versions-deb-bullseye
@@ -3,7 +3,7 @@ gdbserver==10.1-1.7
 libbabeltrace1==1.5.8-1+b3
 libboost-regex1.74.0==1.74.0-9
 libcbor0==0.5.0+dfsg-2
-libcurl3-gnutls==7.74.0-1.3+deb11u10
+libcurl3-gnutls==7.74.0-1.3+deb11u11
 libdebuginfod1==0.183-1
 libdw1==0.183-1
 libedit2==3.1-20191231-2+b1
@@ -20,7 +20,7 @@ libteam-utils==1.30-1
 libteam-utils-dbgsym==1.30-1
 libteamdctl0-dbgsym==1.30-1
 libunwind8==1.3.2-2
-openssh-client==1:8.4p1-5+deb11u2
+openssh-client==1:8.4p1-5+deb11u3
 sshpass==1.09-1+b1
 strace==5.10-1
 swss-dbg==1.0.0
diff --git a/files/build/versions/dockers/sonic-slave-bookworm/versions-deb-bookworm b/files/build/versions/dockers/sonic-slave-bookworm/versions-deb-bookworm
index 5c5d7f55e..6319662ec 100644
--- a/files/build/versions/dockers/sonic-slave-bookworm/versions-deb-bookworm
+++ b/files/build/versions/dockers/sonic-slave-bookworm/versions-deb-bookworm
@@ -30,6 +30,8 @@ bind9-dnsutils==1:9.18.19-1~deb12u1
 bind9-host==1:9.18.19-1~deb12u1
 bind9-libs==1:9.18.19-1~deb12u1
 binutils==2.40-2
+binutils-aarch64-linux-gnu==2.40-2
+binutils-arm-linux-gnueabihf==2.40-2
 binutils-common==2.40-2
 binutils-x86-64-linux-gnu==2.40-2
 bison==2:3.8.2+dfsg-1+b1
@@ -41,7 +43,7 @@ byacc==1:2.0.20221106-1
 bzip2==1.0.8-5+b1
 bzip2-doc==1.0.8-5
 ca-certificates==20230311
-ca-certificates-java==20230620~deb12u1
+ca-certificates-java==20230710~deb12u1
 cdbs==0.4.166
 check==0.15.2-2+b1
 chrpath==0.16-2+b1
@@ -58,13 +60,13 @@ cowdancer==0.89
 cpio==2.13+dfsg-7.1
 cpp==4:12.2.0-3
 cpp-12==12.2.0-14
+cpp-12-arm-linux-gnueabihf==12.2.0-14cross1
+cpp-arm-linux-gnueabihf==4:12.2.0-3
 cppcheck==2.10-2
 cppzmq-dev==4.9.0-1
 cron==3.0pl1-162
 cron-daemon-common==3.0pl1-162
-curl==7.88.1-10+deb12u4
-dblatex==0.3.12py3-2
-dblatex-doc==0.3.12py3-2
+curl==7.88.1-10+deb12u5
 dbus==1.14.10-1~deb12u1
 dbus-bin==1.14.10-1~deb12u1
 dbus-daemon==1.14.10-1~deb12u1
@@ -76,17 +78,15 @@ dconf-service==0.40.0-4
 dctrl-tools==2.24-3+b1
 debhelper==13.11.4
 debian-keyring==2022.12.24
-debootstrap==1.0.128+nmu2
-default-jdk==2:1.17-74
+debootstrap==1.0.128+nmu2+deb12u1
 default-jdk-headless==2:1.17-74
 default-jre==2:1.17-74
 default-jre-headless==2:1.17-74
 default-libmysqlclient-dev==1.1.0
 device-tree-compiler==1.6.1-4+b1
-devscripts==2.23.4
+devscripts==2.23.4+deb12u1
 dh-apparmor==3.0.8-3
 dh-autoreconf==20
-dh-elpa==2.0.16
 dh-exec==0.27
 dh-make==2.202301
 dh-python==5.20230130+deb12u1
@@ -95,7 +95,7 @@ dh-strip-nondeterminism==1.13.1-1
 dictionaries-common==1.29.5
 diffstat==1.65-1
 dirmngr==2.2.40-1.1
-distro-info-data==0.58
+distro-info-data==0.58+deb12u1
 dkms==3.0.10-8+deb12u1
 dmsetup==2:1.02.185-2
 dnsutils==1:9.18.19-1~deb12u1
@@ -104,11 +104,10 @@ docbook-dsssl==1.79-10
 docbook-to-man==1:2.0.0-45
 docbook-utils==0.6.14-4
 docbook-xml==4.5-12
-docbook-xsl==1.79.2+dfsg-2
 docker-buildx-plugin==0.10.5-1~debian.12~bookworm
 docker-ce==5:24.0.2-1~debian.12~bookworm
 docker-ce-cli==5:24.0.2-1~debian.12~bookworm
-docker-ce-rootless-extras==5:24.0.7-1~debian.12~bookworm
+docker-ce-rootless-extras==5:25.0.0-1~debian.12~bookworm
 docker-compose-plugin==2.18.1-1~debian.12~bookworm
 docutils-common==0.19+dfsg-6
 dosfstools==4.2-1
@@ -120,15 +119,11 @@ dvisvgm==3.0.3-1
 dwz==0.15-1
 eatmydata==130-2
 ed==1.19-1
-emacs-bin-common==1:28.2+1-15
-emacs-common==1:28.2+1-15
-emacs-el==1:28.2+1-15
-emacs-nox==1:28.2+1-15
 emacsen-common==3.0.5
 equivs==2.3.1
-exim4-base==4.96-15+deb12u2
-exim4-config==4.96-15+deb12u2
-exim4-daemon-light==4.96-15+deb12u2
+exim4-base==4.96-15+deb12u4
+exim4-config==4.96-15+deb12u4
+exim4-daemon-light==4.96-15+deb12u4
 expat==2.5.0-1
 fakeroot==1.31-1.2
 file==1:5.44-3
@@ -139,8 +134,6 @@ fonts-dejavu-core==2.37-6
 fonts-dejavu-extra==2.37-6
 fonts-droid-fallback==1:6.0.1r16-1.1
 fonts-font-awesome==5.0.10+really4.7.0~dfsg-4.1
-fonts-gfs-baskerville==1.1-6
-fonts-gfs-porson==1.1-7
 fonts-lato==2.0-2.1
 fonts-liberation2==2.1.5-1
 fonts-lmodern==2.005-1
@@ -153,7 +146,11 @@ g++-12==12.2.0-14
 gawk==1:5.2.1-2
 gcc==4:12.2.0-3
 gcc-12==12.2.0-14
+gcc-12-arm-linux-gnueabihf==12.2.0-14cross1
+gcc-12-arm-linux-gnueabihf-base==12.2.0-14cross1
+gcc-12-cross-base==12.2.0-14cross1
 gcc-12-multilib==12.2.0-14
+gcc-arm-linux-gnueabihf==4:12.2.0-3
 gcc-multilib==4:12.2.0-3
 gcovr==5.2-1
 gdb==13.1-3
@@ -161,7 +158,7 @@ gem2deb==2.1
 gem2deb-test-runner==2.1
 gettext==0.21-12
 gettext-base==0.21-12
-ghostscript==10.0.0~dfsg-11+deb12u2
+ghostscript==10.0.0~dfsg-11+deb12u3
 gir1.2-atk-1.0==2.46.0-5
 gir1.2-atspi-2.0==2.46.0-5
 gir1.2-freedesktop==1.74.0-3
@@ -200,7 +197,6 @@ gpgsm==2.2.40-1.1
 graphviz==2.42.2-7+b3
 groff==1.22.4-10
 groff-base==1.22.4-10
-gsasl-common==2.2.0-1
 gsettings-desktop-schemas==43.0-1
 gsfonts==2:20200910-7
 gstreamer1.0-libav==1.22.0-2
@@ -272,9 +268,8 @@ libarchive-zip-perl==1.68-1
 libarchive13==3.6.2-1
 libargon2-1==0~20171227-0.3+deb12u1
 libarray-intspan-perl==2.004-2
-libarray-unique-perl==0.08-4
-libarray-utils-perl==0.5-3
 libasan8==12.2.0-14
+libasan8-armhf-cross==12.2.0-14cross1
 libasm-java==9.4-1
 libasound2==1.2.8-1+b1
 libasound2-data==1.2.8-1
@@ -292,6 +287,7 @@ libatk1.0-dev==2.46.0-5
 libatm1==1:2.5.1-4+b2
 libatm1-dev==1:2.5.1-4+b2
 libatomic1==12.2.0-14
+libatomic1-armhf-cross==12.2.0-14cross1
 libatspi2.0-0==2.46.0-5
 libatspi2.0-dev==2.46.0-5
 libattr1-dev==1:2.5.1-4
@@ -304,11 +300,11 @@ libavahi-client3==0.8-10
 libavahi-common-data==0.8-10
 libavahi-common3==0.8-10
 libavc1394-0==0.5.4-5
-libavcodec59==7:5.1.3-1
-libavfilter8==7:5.1.3-1
-libavformat59==7:5.1.3-1
+libavcodec59==7:5.1.4-0+deb12u1
+libavfilter8==7:5.1.4-0+deb12u1
+libavformat59==7:5.1.4-0+deb12u1
 libavif15==0.11.1-1
-libavutil57==7:5.1.3-1
+libavutil57==7:5.1.4-0+deb12u1
 libb-hooks-endofscope-perl==0.26-1
 libb-hooks-op-check-perl==0.22-2+b1
 libbabeltrace-dev==1.5.11-1+b2
@@ -389,6 +385,7 @@ libc-ares2==1.18.1-3
 libc-dev-bin==2.36-9+deb12u3
 libc-devtools==2.36-9+deb12u3
 libc-l10n==2.36-9+deb12u3
+libc6-armhf-cross==2.36-8cross1
 libc6-dbg==2.36-9+deb12u3
 libc6-dev==2.36-9+deb12u3
 libc6-dev-i386==2.36-9+deb12u3
@@ -464,11 +461,11 @@ libctf-nobfd0==2.40-2
 libctf0==2.40-2
 libcunit1==2.1-3-dfsg-2.6
 libcunit1-dev==2.1-3-dfsg-2.6
-libcups2==2.4.2-3+deb12u4
-libcurl3-gnutls==7.88.1-10+deb12u4
-libcurl3-nss==7.88.1-10+deb12u4
-libcurl4==7.88.1-10+deb12u4
-libcurl4-openssl-dev==7.88.1-10+deb12u4
+libcups2==2.4.2-3+deb12u5
+libcurl3-gnutls==7.88.1-10+deb12u5
+libcurl3-nss==7.88.1-10+deb12u5
+libcurl4==7.88.1-10+deb12u5
+libcurl4-openssl-dev==7.88.1-10+deb12u5
 libdaemon-dev==0.14-7.1
 libdaemon0==0.14-7.1
 libdata-dpath-perl==0.58-2
@@ -494,9 +491,8 @@ libdbus-glib-1-2==0.112-3
 libdbus-glib-1-dev==0.112-3
 libdbus-glib-1-dev-bin==0.112-3
 libdconf1==0.40.0-4
-libde265-0==1.0.11-1
+libde265-0==1.0.11-1+deb12u1
 libdebhelper-perl==13.11.4
-libdebian-source-perl==0.122
 libdebuginfod-common==0.188-2.1
 libdebuginfod1==0.188-2.1
 libdecor-0-0==0.1.1-2
@@ -514,7 +510,7 @@ libdevel-stacktrace-perl==2.0400-2
 libdevmapper1.02.1==2:1.02.185-2
 libdigest-perl-md5-perl==1.9-5
 libdist-checkconflicts-perl==0.11-2
-libdistro-info-perl==1.5
+libdistro-info-perl==1.5+deb12u1
 libdjvulibre-text==3.5.28-2
 libdjvulibre21==3.5.28-2+b1
 libdom4j-java==2.1.3-2
@@ -545,7 +541,6 @@ libel-api-java==3.0.0-3
 libelf-dev==0.188-2.1
 libelf1==0.188-2.1
 libemail-address-xs-perl==1.05-1+b1
-libemail-date-format-perl==1.008-1
 libencode-locale-perl==1.05-3
 libepoxy-dev==1.5.10-1
 libepoxy0==1.5.10-1
@@ -566,7 +561,6 @@ libexpat1==2.5.0-1
 libexpat1-dev==2.5.0-1
 libexplain-dev==1.4.D001-12+b1
 libexplain51==1.4.D001-12+b1
-libexporter-lite-perl==0.09-2
 libexporter-tiny-perl==1.006000-1
 libfabric1==1.17.0-3
 libfakeroot==1.31-1.2
@@ -622,7 +616,8 @@ libgav1-1==0.18.0-1+b1
 libgbm1==22.3.6-1+deb12u1
 libgc1==1:8.2.2-3
 libgcc-12-dev==12.2.0-14
-libgccjit0==12.2.0-14
+libgcc-12-dev-armhf-cross==12.2.0-14cross1
+libgcc-s1-armhf-cross==12.2.0-14cross1
 libgd3==2.3.3-9
 libgdbm-compat4==1.23-3
 libgdbm6==1.23-3
@@ -667,22 +662,20 @@ libgme0==0.6.3-6
 libgmock-dev==1.12.1-0.2
 libgmp-dev==2:6.2.1+dfsg1-1.1
 libgmpxx4ldbl==2:6.2.1+dfsg1-1.1
-libgnutls-dane0==3.7.9-2
+libgnutls-dane0==3.7.9-2+deb12u1
 libgomp1==12.2.0-14
-libgoogle-gson-java==2.10-1
+libgomp1-armhf-cross==12.2.0-14cross1
 libgoogle-perftools4==2.10-1
 libgpgme11==1.18.0-3+b1
 libgpm2==1.20.7-10+b1
 libgprofng0==2.40-2
 libgraphite2-3==1.3.14-1
 libgraphite2-dev==1.3.14-1
-libgs-common==10.0.0~dfsg-11+deb12u2
-libgs10==10.0.0~dfsg-11+deb12u2
-libgs10-common==10.0.0~dfsg-11+deb12u2
-libgsasl18==2.2.0-1
+libgs-common==10.0.0~dfsg-11+deb12u3
+libgs10==10.0.0~dfsg-11+deb12u3
+libgs10-common==10.0.0~dfsg-11+deb12u3
 libgsm1==1.0.22-1
 libgssapi-krb5-2==1.20.1-2+deb12u1
-libgssglue1==0.7-1.1
 libgssrpc4==1.20.1-2+deb12u1
 libgstreamer-plugins-base1.0-0==1.22.0-3+deb12u1
 libgstreamer1.0-0==1.22.0-2
@@ -726,6 +719,7 @@ libhttp-negotiate-perl==6.01-2
 libhttp-tiny-multipart-perl==0.08-2
 libhttpclient-java==4.5.14-1
 libhttpcore-java==4.4.16-1
+libhwasan0==12.2.0-14
 libhwloc-plugins==2.9.0-1
 libhwloc15==2.9.0-1
 libhwy1==1.0.3-3+deb12u1
@@ -759,7 +753,6 @@ libip6tc-dev==1.8.9-2
 libip6tc2==1.8.9-2
 libipc-run-perl==20220807.0-1
 libipc-run3-perl==0.048-3
-libipc-shareable-perl==1.13-1
 libipc-system-simple-perl==1.30-2
 libipt2==2.0.5-1
 libiptc-dev==1.8.9-2
@@ -781,7 +774,7 @@ libjbig2dec0==0.19-3
 libjcode-pm-perl==2.06-1.1
 libjemalloc-dev==5.3.0-1
 libjemalloc2==5.3.0-1
-libjetty9-java==9.4.50-4+deb12u1
+libjetty9-java==9.4.50-4+deb12u2
 libjpeg-dev==1:2.1.5-2
 libjpeg62-turbo==1:2.1.5-2
 libjpeg62-turbo-dev==1:2.1.5-2
@@ -835,8 +828,6 @@ liblerc-dev==4.0.0+ds-2
 liblerc4==4.0.0+ds-2
 liblilv-0-0==0.24.14-1
 liblist-compare-perl==0.55-2
-liblist-moreutils-perl==0.430-2
-liblist-moreutils-xs-perl==0.430-3+b1
 liblist-someutils-perl==0.59-1
 liblist-someutils-xs-perl==0.58-3
 liblist-utilsby-perl==0.12-2
@@ -848,8 +839,6 @@ liblockfile-bin==1.17-1+b1
 liblockfile1==1.17-1+b1
 liblog-any-adapter-screen-perl==0.140-2
 liblog-any-perl==1.713-1
-liblog-dispatch-perl==2.70-1
-liblog-log4perl-perl==1.57-1
 liblognorm5==2.0.6-4
 liblqr-1-0==0.4.2-2.1
 liblsan0==12.2.0-14
@@ -870,7 +859,6 @@ libmagickcore-6.q16-6-extra==8:6.9.11.60+dfsg-1.6
 libmagickwand-6.q16-6==8:6.9.11.60+dfsg-1.6
 libmail-sendmail-perl==0.80-3
 libmailtools-perl==2.21-2
-libmailutils9==1:3.15-4
 libmariadb-dev==1:10.11.4-1~deb12u1
 libmariadb-dev-compat==1:10.11.4-1~deb12u1
 libmariadb3==1:10.11.4-1~deb12u1
@@ -900,10 +888,7 @@ libmbedcrypto7==2.28.3-1
 libmd-dev==1.0.4-2
 libmd4c0==0.4.8-1
 libmfx1==22.5.4-1
-libmime-charset-perl==1.013.1-2
-libmime-lite-perl==3.033-1
 libmime-tools-perl==5.510-1
-libmime-types-perl==2.24-1
 libmldbm-perl==2.05-4
 libmnl-dev==1.0.4-3
 libmnl0==1.0.4-3
@@ -954,18 +939,18 @@ libnfs13==4.0.0-1
 libnftables1==1.0.6-2+deb12u2
 libnftnl-dev==1.2.4-2
 libnftnl11==1.2.4-2
-libnghttp2-14==1.52.0-1
+libnghttp2-14==1.52.0-1+deb12u1
 libnl-3-200==3.7.0-0.2+b1
 libnl-route-3-200==3.7.0-0.2+b1
+libnode108==18.19.0+dfsg-6~deb12u1
 libnorm-dev==1.5.9+dfsg-2
 libnorm1==1.5.9+dfsg-2
 libnpth0==1.6-3
 libnsl-dev==1.3.0-2
 libnsl2==1.3.0-2
 libnspr4==2:4.35-1
-libnss-systemd==252.17-1~deb12u1
+libnss-systemd==252.19-1~deb12u1
 libnss3==2:3.87.1-1
-libntlm0==1.6-4
 libnuma-dev==2.0.16-1
 libnuma1==2.0.16-1
 libnumber-compare-perl==0.03-3
@@ -998,7 +983,7 @@ libpackage-stash-xs-perl==0.30-1+b1
 libpackagekit-glib2-18==1.2.6-5
 libpadwalker-perl==2.5-1+b3
 libpam-cap==1:2.66-4
-libpam-systemd==252.17-1~deb12u1
+libpam-systemd==252.19-1~deb12u1
 libpam0g-dev==1.5.2-6+deb12u1
 libpango-1.0-0==1.50.12+ds-1
 libpango1.0-dev==1.50.12+ds-1
@@ -1010,8 +995,6 @@ libpaper1==1.1.29
 libparams-classify-perl==0.015-2+b1
 libparams-util-perl==1.102-2+b1
 libparams-validate-perl==1.31-1
-libparams-validationcompiler-perl==0.31-1
-libparse-debcontrol-perl==2.005-6
 libparse-recdescent-perl==1.967015+dfsg-4
 libpath-iterator-rule-perl==1.015-2
 libpath-tiny-perl==0.144-1
@@ -1034,8 +1017,8 @@ libpcrecpp0v5==2:8.39-15
 libpcsclite-dev==1.9.9-2
 libpcsclite1==1.9.9-2
 libpdfbox-java==1:1.8.16-2
-libperl-dev==5.36.0-7
-libperl5.36==5.36.0-7
+libperl-dev==5.36.0-7+deb12u1
+libperl5.36==5.36.0-7+deb12u1
 libperlio-gzip-perl==0.20-1+b1
 libperlio-utf8-strict-perl==0.010-1
 libpfm4==4.13.0-1
@@ -1065,7 +1048,7 @@ libplexus-sec-dispatcher-java==2.0-3
 libplexus-utils2-java==3.4.2-1
 libplexus-velocity-java==1.2-3.1
 libpmem1==1.12.1-2
-libpmix2==4.2.2-1+b1
+libpmix2==4.2.2-1+deb12u1
 libpng-dev==1.6.39-2
 libpng-tools==1.6.39-2
 libpng16-16==1.6.39-2
@@ -1075,12 +1058,15 @@ libpod-parser-perl==1.65-1
 libpolkit-agent-1-0==122-3
 libpolkit-gobject-1-0==122-3
 libpopt0==1.19+dfsg-1
-libpostproc56==7:5.1.3-1
+libpostproc56==7:5.1.4-0+deb12u1
 libpotrace0==1.16-2
-libpq5==15.3-0+deb12u1
 libproc-processtable-perl==0.634-1+b2
 libproc2-0==2:4.0.2-3
 libprotobuf-c1==1.4.1-1+b1
+libprotobuf-dev==3.21.12-3
+libprotobuf-lite32==3.21.12-3
+libprotobuf32==3.21.12-3
+libprotoc32==3.21.12-3
 libproxy1v5==0.4.18-1.2
 libpsl5==0.21.2-1
 libpsm-infinipath1==3.3+20.604758e7-6.2
@@ -1193,7 +1179,6 @@ libsoap-lite-perl==1.27-3
 libsocket6-perl==0.29-3
 libsodium-dev==1.0.18-1
 libsodium23==1.0.18-1
-libsombok3==2.4.0-2+b1
 libsord-0-0==0.16.14+git221008-1
 libsort-versions-perl==1.62-3
 libsoup2.4-1==2.74.3-1
@@ -1201,25 +1186,24 @@ libsoup2.4-common==2.74.3-1
 libsource-highlight-common==3.1.9-4.2
 libsource-highlight4v5==3.1.9-4.2+b3
 libsoxr0==0.1.3-4
-libspecio-perl==0.48-1
 libspeex1==1.2.1-2
 libsphinxbase3==0.8+5prealpha+1-16
 libspice-server1==0.15.1-1
-libspreadsheet-parseexcel-perl==0.6500-3
+libspreadsheet-parseexcel-perl==0.6500-4~deb12u1
 libspreadsheet-writeexcel-perl==2.40-4
 libsqlite3-0==3.40.1-2
 libsratom-0-0==0.6.14-1
 libsrt1.5-gnutls==1.5.1-1
-libssh-4==0.10.5-2
-libssh-gcrypt-4==0.10.5-2
+libssh-4==0.10.6-0+deb12u1
+libssh-gcrypt-4==0.10.6-0+deb12u1
 libssh2-1==1.10.0-3+b1
 libssl-dev==3.0.11-1~deb12u2
 libssl3==3.0.11-1~deb12u2
 libstdc++-12-dev==12.2.0-14
+libstdc++6-armhf-cross==12.2.0-14cross1
 libstemmer0d==2.2.0-2
 libstrictures-perl==2.000006-1
 libstring-copyright-perl==0.003014-1
-libstring-crc32-perl==2.100-2
 libstring-escape-perl==2010.002-3
 libstring-license-perl==0.0.2-1
 libstring-shellquote-perl==1.04-3
@@ -1235,14 +1219,14 @@ libsubunit0==1.4.0-3
 libsurefire-java==2.22.3-2
 libsvtav1enc1==1.4.1+dfsg-1
 libswitch-perl==2.17-3
-libswresample4==7:5.1.3-1
-libswscale6==7:5.1.3-1
+libswresample4==7:5.1.4-0+deb12u1
+libswscale6==7:5.1.4-0+deb12u1
 libsynctex2==2022.20220321.62855-5.1+deb12u1
 libsyntax-keyword-try-perl==0.28-1
 libsys-cpuaffinity-perl==1.13~03-2+b1
 libsys-hostname-long-perl==1.5-3
-libsystemd-dev==252.17-1~deb12u1
-libsystemd-shared==252.17-1~deb12u1
+libsystemd-dev==252.19-1~deb12u1
+libsystemd-shared==252.19-1~deb12u1
 libtag1v5==1.13-2
 libtag1v5-vanilla==1.13-2
 libtask-weaken-perl==1.06-2
@@ -1268,9 +1252,9 @@ libthai-dev==0.1.29-1
 libthai0==0.1.29-1
 libtheora0==1.1.1+dfsg.1-16.1+b1
 libtie-ixhash-perl==1.23-4
-libtiff-dev==4.5.0-6
-libtiff6==4.5.0-6
-libtiffxx6==4.5.0-6
+libtiff-dev==4.5.0-6+deb12u1
+libtiff6==4.5.0-6+deb12u1
+libtiffxx6==4.5.0-6+deb12u1
 libtime-duration-perl==1.21-2
 libtime-moment-perl==0.44-2+b1
 libtimedate-perl==2.3300-2
@@ -1293,12 +1277,12 @@ libtype-tiny-perl==2.002001-1
 libtype-tiny-xs-perl==0.025-1
 libtypes-serialiser-perl==1.01-1
 libubsan1==12.2.0-14
+libubsan1-armhf-cross==12.2.0-14cross1
 libuchardet0==0.0.7-1
 libucx0==1.13.1-1
-libudev-dev==252.17-1~deb12u1
+libudev-dev==252.19-1~deb12u1
 libudfread0==1.1.2-1
 libunbound8==1.17.1-2+deb12u1
-libunicode-linebreak-perl==0.0.20190101-1+b5
 libunicode-map-perl==0.112-13+b1
 libunicode-utf8-perl==0.62-2
 libunivocity-parsers-java==2.9.1-1
@@ -1458,6 +1442,7 @@ libxrender1==1:0.9.10-1.1
 libxs-parse-keyword-perl==0.33-1
 libxs-parse-sublike-perl==0.16-1+b2
 libxshmfence1==1.3-1
+libxslt1-dev==1.1.35-1
 libxslt1.1==1.1.35-1
 libxss1==1:1.2.3-1
 libxstring-perl==0.005-2+b1
@@ -1476,7 +1461,6 @@ libyajl2==2.1.0-3+deb12u2
 libyaml-0-2==0.2.5-1
 libyaml-dev==0.2.5-1
 libyaml-libyaml-perl==0.86+ds-1
-libyaml-tiny-perl==1.73-1
 libyuv0==0.0~git20230123.b2528b0-1
 libz3-4==4.8.12-3.1
 libz3-dev==4.8.12-3.1
@@ -1489,12 +1473,14 @@ libzvbi0==0.2.41-1
 libzzip-0-13==0.13.72+dfsg.1-1.1
 licensecheck==3.3.5-1
 lintian==2.116.3
-linux-compiler-gcc-12-x86==6.1.55-1
-linux-headers-6.1.0-13-amd64==6.1.55-1
-linux-headers-6.1.0-13-common==6.1.55-1
-linux-headers-amd64==6.1.55-1
-linux-kbuild-6.1==6.1.55-1
-linux-libc-dev==6.1.55-1
+linux-compiler-gcc-12-x86==6.1.69-1
+linux-headers-6.1.0-17-amd64==6.1.69-1
+linux-headers-6.1.0-17-arm64==6.1.69-1
+linux-headers-6.1.0-17-common==6.1.69-1
+linux-headers-amd64==6.1.69-1
+linux-headers-arm64==6.1.69-1
+linux-kbuild-6.1==6.1.69-1
+linux-libc-dev==6.1.69-1
 linuxdoc-tools==0.9.82-1
 llvm-14==1:14.0.6-12
 llvm-14-dev==1:14.0.6-12
@@ -1516,8 +1502,6 @@ lz4==1.9.4-1
 lzop==1.04-2
 m4==1.4.19-3
 mailcap==3.70+nmu1
-mailutils==1:3.15-4
-mailutils-common==1:3.15-4
 make==4.3-4.1
 man-db==2.11.2-2
 man2html-base==1.6g-14
@@ -1540,18 +1524,25 @@ netbase==6.4
 netpbm==2:11.01.00-2
 nftables==1.0.6-2+deb12u2
 nlohmann-json3-dev==3.11.2-2
+node-acorn==8.8.1+ds+~cs25.17.7-2
+node-busboy==1.6.0+~cs2.6.0-2
+node-cjs-module-lexer==1.2.2+dfsg-5
 node-jquery==3.6.1+dfsg+~3.5.14-1
+node-undici==5.15.0+dfsg1+~cs20.10.9.3-1+deb12u3
+node-xtend==4.0.2-3
+nodejs==18.19.0+dfsg-6~deb12u1
+nodejs-doc==18.19.0+dfsg-6~deb12u1
 nss-plugin-pem==1.0.8+1-1
 ocl-icd-libopencl1==2.3.1-1
 openjade==1.4devel1-22
-openjdk-17-jdk==17.0.8+7-1~deb12u1
-openjdk-17-jdk-headless==17.0.8+7-1~deb12u1
-openjdk-17-jre==17.0.8+7-1~deb12u1
-openjdk-17-jre-headless==17.0.8+7-1~deb12u1
+openjdk-17-jdk==17.0.9+9-1~deb12u1
+openjdk-17-jdk-headless==17.0.9+9-1~deb12u1
+openjdk-17-jre==17.0.9+9-1~deb12u1
+openjdk-17-jre-headless==17.0.9+9-1~deb12u1
 opensp==1.5.2-13+b2
-openssh-client==1:9.2p1-2+deb12u1
-openssh-server==1:9.2p1-2+deb12u1
-openssh-sftp-server==1:9.2p1-2+deb12u1
+openssh-client==1:9.2p1-2+deb12u2
+openssh-server==1:9.2p1-2+deb12u2
+openssh-sftp-server==1:9.2p1-2+deb12u2
 openssl==3.0.11-1~deb12u2
 ovmf==2022.11-6
 packagekit==1.2.6-5
@@ -1563,8 +1554,8 @@ patchutils==0.4.2-1
 pbuilder==0.231
 pbzip2==1.1.13-1
 pci.ids==0.0~2023.04.11-1
-perl==5.36.0-7
-perl-modules-5.36==5.36.0-7
+perl==5.36.0-7+deb12u1
+perl-modules-5.36==5.36.0-7+deb12u1
 perl-openssl-defaults==7+b1
 php-cli==2:8.2+93
 php-codecoverage==9.2.26+dfsg-1
@@ -1622,6 +1613,7 @@ preview-latex-style==12.2-1
 pristine-tar==1.50
 procmail==3.22-27
 procps==2:4.0.2-3
+protobuf-compiler==3.21.12-3
 psmisc==23.6-1
 psutils==1.17.dfsg-4
 publicsuffix==20230209.2326-1
@@ -1748,12 +1740,12 @@ python3.11-dbg==3.11.2-6
 python3.11-dev==3.11.2-6
 python3.11-minimal==3.11.2-6
 python3.11-venv==3.11.2-6
-qemu-block-extra==1:7.2+dfsg-7+deb12u2
-qemu-system-common==1:7.2+dfsg-7+deb12u2
-qemu-system-data==1:7.2+dfsg-7+deb12u2
-qemu-system-gui==1:7.2+dfsg-7+deb12u2
-qemu-system-x86==1:7.2+dfsg-7+deb12u2
-qemu-utils==1:7.2+dfsg-7+deb12u2
+qemu-block-extra==1:7.2+dfsg-7+deb12u3
+qemu-system-common==1:7.2+dfsg-7+deb12u3
+qemu-system-data==1:7.2+dfsg-7+deb12u3
+qemu-system-gui==1:7.2+dfsg-7+deb12u3
+qemu-system-x86==1:7.2+dfsg-7+deb12u3
+qemu-utils==1:7.2+dfsg-7+deb12u3
 qt5-gtk-platformtheme==5.15.8+dfsg-11
 qt5-qmake==5.15.8+dfsg-11
 qt5-qmake-bin==5.15.8+dfsg-11
@@ -1764,7 +1756,6 @@ qttranslations5-l10n==5.15.8-2
 qtwayland5==5.15.8-2
 quilt==0.67+really0.66-1
 rake==13.0.6-3
-rake-compiler==1.2.1-1
 readline-common==8.2-1.3
 rpcsvc-proto==1.4.3-1
 rrdtool==1.7.2-4+b8
@@ -1803,9 +1794,9 @@ strace==6.1-0.1
 sudo==1.9.13p3-1+deb12u1
 swig==4.1.0-0.2
 swig4.0==4.1.0-0.2
-systemd==252.17-1~deb12u1
-systemd-sysv==252.17-1~deb12u1
-systemd-timesyncd==252.17-1~deb12u1
+systemd==252.19-1~deb12u1
+systemd-sysv==252.19-1~deb12u1
+systemd-timesyncd==252.19-1~deb12u1
 t1utils==1.41-4
 tcl==8.6.13
 tcl8.6==8.6.13+dfsg-2
@@ -1815,21 +1806,15 @@ tex-common==6.18
 tex-gyre==20180621-6
 texi2html==1.82+dfsg1-7
 texinfo==6.8-6+b1
-texlive==2022.20230122-3
 texlive-base==2022.20230122-3
-texlive-bibtex-extra==2022.20230122-4
 texlive-binaries==2022.20220321.62855-5.1+deb12u1
-texlive-extra-utils==2022.20230122-4
 texlive-fonts-recommended==2022.20230122-3
 texlive-formats-extra==2022.20230122-4
-texlive-lang-greek==2022.20230122-1
 texlive-latex-base==2022.20230122-3
 texlive-latex-extra==2022.20230122-4
 texlive-latex-recommended==2022.20230122-3
-texlive-luatex==2022.20230122-3
 texlive-pictures==2022.20230122-3
 texlive-plain-generic==2022.20230122-4
-texlive-science==2022.20230122-4
 texlive-xetex==2022.20230122-3
 time==1.9-0.2
 tipa==2:1.3-21
@@ -1861,7 +1846,6 @@ xfonts-encodings==1:1.0.4-2.2
 xfonts-utils==1:7.7+6
 xkb-data==2.35.1-1
 xml-core==0.18+nmu1
-xmlto==0.0.28-2.1
 xorg-sgml-doctools==1:1.11-1.1
 xsltproc==1.1.35-1
 xtrans-dev==1.4.0-1
diff --git a/files/build/versions/dockers/sonic-slave-bookworm/versions-deb-bookworm-arm64 b/files/build/versions/dockers/sonic-slave-bookworm/versions-deb-bookworm-arm64
index 655e32820..1f4f94d11 100644
--- a/files/build/versions/dockers/sonic-slave-bookworm/versions-deb-bookworm-arm64
+++ b/files/build/versions/dockers/sonic-slave-bookworm/versions-deb-bookworm-arm64
@@ -1,35 +1,6 @@
 bc==1.07.1-3
-binutils-aarch64-linux-gnu==2.40-2
-binutils-arm-linux-gnueabihf==2.40-2
-cpp-12-arm-linux-gnueabihf==12.2.0-14cross1
-cpp-arm-linux-gnueabihf==4:12.2.0-3
 dctrl-tools==2.24-3
 dvipng==1.15-1.1
-gcc-12-arm-linux-gnueabihf==12.2.0-14cross1
-gcc-12-arm-linux-gnueabihf-base==12.2.0-14cross1
-gcc-12-cross-base==12.2.0-14cross1
-gcc-arm-linux-gnueabihf==4:12.2.0-3
-libasan8-armhf-cross==12.2.0-14cross1
-libatomic1-armhf-cross==12.2.0-14cross1
-libc6-armhf-cross==2.36-8cross1
-libgcc-12-dev-armhf-cross==12.2.0-14cross1
-libgcc-s1-armhf-cross==12.2.0-14cross1
-libgomp1-armhf-cross==12.2.0-14cross1
-libhwasan0==12.2.0-14
 libnanomsg-dev==1.1.5+dfsg-1.1
 libnanomsg5==1.1.5+dfsg-1.1
-libnode108==18.13.0+dfsg1-1
-libstdc++6-armhf-cross==12.2.0-14cross1
-libubsan1-armhf-cross==12.2.0-14cross1
-libunicode-linebreak-perl==0.0.20190101-1+b4
-libxslt1-dev==1.1.35-1
-linux-headers-6.1.0-13-arm64==6.1.55-1
-linux-headers-arm64==6.1.55-1
-node-acorn==8.8.1+ds+~cs25.17.7-2
-node-busboy==1.6.0+~cs2.6.0-2
-node-cjs-module-lexer==1.2.2+dfsg-5
-node-undici==5.15.0+dfsg1+~cs20.10.9.3-1+deb12u1
-node-xtend==4.0.2-3
-nodejs==18.13.0+dfsg1-1
-nodejs-doc==18.13.0+dfsg1-1
 wget==1.21.3-1+b1
diff --git a/files/build/versions/dockers/sonic-slave-bookworm/versions-deb-bookworm-armhf b/files/build/versions/dockers/sonic-slave-bookworm/versions-deb-bookworm-armhf
index 6e3f0d9b6..42afef5cd 100644
--- a/files/build/versions/dockers/sonic-slave-bookworm/versions-deb-bookworm-armhf
+++ b/files/build/versions/dockers/sonic-slave-bookworm/versions-deb-bookworm-armhf
@@ -1,20 +1,9 @@
 bc==1.07.1-3
-binutils-arm-linux-gnueabihf==2.40-2
 dctrl-tools==2.24-3
 dvipng==1.15-1.1
 libnanomsg-dev==1.1.5+dfsg-1.1
 libnanomsg5==1.1.5+dfsg-1.1
-libnode108==18.13.0+dfsg1-1
-libunicode-linebreak-perl==0.0.20190101-1+b4
-libxslt1-dev==1.1.35-1
-linux-compiler-gcc-12-arm==6.1.55-1
-linux-headers-6.1.0-13-armmp==6.1.55-1
-linux-headers-armmp==6.1.55-1
-node-acorn==8.8.1+ds+~cs25.17.7-2
-node-busboy==1.6.0+~cs2.6.0-2
-node-cjs-module-lexer==1.2.2+dfsg-5
-node-undici==5.15.0+dfsg1+~cs20.10.9.3-1+deb12u1
-node-xtend==4.0.2-3
-nodejs==18.13.0+dfsg1-1
-nodejs-doc==18.13.0+dfsg1-1
+linux-compiler-gcc-12-arm==6.1.69-1
+linux-headers-6.1.0-17-armmp==6.1.69-1
+linux-headers-armmp==6.1.69-1
 wget==1.21.3-1+b1
diff --git a/files/build/versions/dockers/sonic-slave-bookworm/versions-py3 b/files/build/versions/dockers/sonic-slave-bookworm/versions-py3
index 89b00ee41..1ba64419f 100644
--- a/files/build/versions/dockers/sonic-slave-bookworm/versions-py3
+++ b/files/build/versions/dockers/sonic-slave-bookworm/versions-py3
@@ -6,7 +6,7 @@ automat==22.10.0
 babel==2.10.3
 bcrypt==3.2.2
 beautifulsoup4==4.11.2
-bitarray==2.8.2
+bitarray==2.9.2
 blinker==1.5
 build==0.9.0
 certifi==2022.9.24
@@ -19,9 +19,8 @@ coverage==6.5.0
 crc16==0.1.1
 cryptography==38.0.4
 ctypesgen==1.0.2
-dblatex==0.3.12
 dbus-python==1.3.2
-devscripts==2.23.4
+devscripts==2.23.4+deb12u1
 dill==0.3.6
 distro==1.8.0
 docutils==0.19
@@ -64,16 +63,16 @@ parse==1.19.0
 pep517==0.13.0
 pexpect==4.8.0
 pillow==10.0.0
-pip==23.3
+pip==23.3.2
 platformdirs==2.6.0
 pluggy==1.0.0+repack
 ptyprocess==0.7.0
 py==1.11.0
 pyang==2.4.0
-pyangbind==0.8.1
+pyangbind==0.8.2
 pyasn1==0.4.8
 pyasn1-modules==0.2.8
-pyfakefs==5.3.0
+pyfakefs==5.3.4
 pygments==2.14.0
 pygobject==3.42.2
 pyhamcrest==2.0.3
@@ -93,7 +92,7 @@ pytz==2022.7.1
 pyxdg==0.28
 pyyaml==6.0
 redis==5.0.1
-regex==2023.10.3
+regex==2023.12.25
 requests==2.28.1
 roman==3.3
 scour==0.38.2
diff --git a/files/build/versions/dockers/sonic-slave-bullseye/versions-deb-bullseye b/files/build/versions/dockers/sonic-slave-bullseye/versions-deb-bullseye
index 7e277bcfe..28a5458df 100644
--- a/files/build/versions/dockers/sonic-slave-bullseye/versions-deb-bullseye
+++ b/files/build/versions/dockers/sonic-slave-bullseye/versions-deb-bullseye
@@ -29,6 +29,8 @@ bind9-host==1:9.16.44-1~deb11u1
 bind9-libs==1:9.16.44-1~deb11u1
 binfmt-support==2.2.1-1+deb11u1
 binutils==2.35.2-2
+binutils-aarch64-linux-gnu==2.35.2-2
+binutils-arm-linux-gnueabihf==2.35.2-2
 binutils-common==2.35.2-2
 binutils-x86-64-linux-gnu==2.35.2-2
 bison==2:3.7.5+dfsg-1
@@ -56,9 +58,11 @@ cowdancer==0.89
 cpio==2.13+dfsg-7.1~deb11u1
 cpp==4:10.2.1-1
 cpp-10==10.2.1-6
+cpp-10-arm-linux-gnueabihf==10.2.1-6cross1
+cpp-arm-linux-gnueabihf==4:10.2.1-1
 cppcheck==2.3-1
 cron==3.0pl1-137
-curl==7.74.0-1.3+deb11u10
+curl==7.74.0-1.3+deb11u11
 dblatex==0.3.12py3-1
 dblatex-doc==0.3.12py3-1
 dbus==1.12.28-0+deb11u1
@@ -101,7 +105,7 @@ docbook-xsl==1.79.2+dfsg-1
 docker-buildx-plugin==0.10.5-1~debian.11~bullseye
 docker-ce==5:24.0.2-1~debian.11~bullseye
 docker-ce-cli==5:24.0.2-1~debian.11~bullseye
-docker-ce-rootless-extras==5:24.0.7-1~debian.11~bullseye
+docker-ce-rootless-extras==5:25.0.0-1~debian.11~bullseye
 docker-compose-plugin==2.18.1-1~debian.11~bullseye
 docutils-common==0.16+dfsg-4
 dosfstools==4.2-1
@@ -121,9 +125,9 @@ emacs-el==1:27.1+1-3.1+deb11u2
 emacs-nox==1:27.1+1-3.1+deb11u2
 emacsen-common==3.0.4
 equivs==2.3.1
-exim4-base==4.94.2-7+deb11u1
-exim4-config==4.94.2-7+deb11u1
-exim4-daemon-light==4.94.2-7+deb11u1
+exim4-base==4.94.2-7+deb11u2
+exim4-config==4.94.2-7+deb11u2
+exim4-daemon-light==4.94.2-7+deb11u2
 expat==2.2.10-2+deb11u5
 fakeroot==1.25.3-1.1
 file==1:5.39-3+deb11u1
@@ -147,7 +151,11 @@ g++-10==10.2.1-6
 gawk==1:5.1.0-1
 gcc==4:10.2.1-1
 gcc-10==10.2.1-6
+gcc-10-arm-linux-gnueabihf==10.2.1-6cross1
+gcc-10-arm-linux-gnueabihf-base==10.2.1-6cross1
+gcc-10-cross-base==10.2.1-6cross1
 gcc-10-multilib==10.2.1-6
+gcc-arm-linux-gnueabihf==4:10.2.1-1
 gcc-multilib==4:10.2.1-1
 gcovr==4.2-1
 gdb==10.1-1.7
@@ -262,6 +270,7 @@ libarray-intspan-perl==2.004-1
 libarray-unique-perl==0.08-2.1
 libarray-utils-perl==0.5-1.1
 libasan6==10.2.1-6
+libasan6-armhf-cross==10.2.1-6cross1
 libasm-java==9.1-1
 libasound2==1.2.4-1.1
 libasound2-data==1.2.4-1.1
@@ -280,6 +289,7 @@ libatk1.0-dev==2.36.0-2
 libatm1==1:2.5.1-4
 libatm1-dev==1:2.5.1-4
 libatomic1==10.2.1-6
+libatomic1-armhf-cross==10.2.1-6cross1
 libatspi2.0-0==2.38.0-4+deb11u1
 libatspi2.0-dev==2.38.0-4+deb11u1
 libattr1-dev==1:2.4.48-6
@@ -375,6 +385,7 @@ libc-ares2==1.17.1-1+deb11u3
 libc-dev-bin==2.31-13+deb11u7
 libc-devtools==2.31-13+deb11u7
 libc-l10n==2.31-13+deb11u7
+libc6-armhf-cross==2.31-9cross4
 libc6-dbg==2.31-13+deb11u7
 libc6-dev==2.31-13+deb11u7
 libc6-dev-i386==2.31-13+deb11u7
@@ -449,9 +460,9 @@ libctf0==2.35.2-2
 libcunit1==2.1-3-dfsg-2.3
 libcunit1-dev==2.1-3-dfsg-2.3
 libcups2==2.3.3op2-3+deb11u6
-libcurl3-gnutls==7.74.0-1.3+deb11u10
-libcurl4==7.74.0-1.3+deb11u10
-libcurl4-openssl-dev==7.74.0-1.3+deb11u10
+libcurl3-gnutls==7.74.0-1.3+deb11u11
+libcurl4==7.74.0-1.3+deb11u11
+libcurl4-openssl-dev==7.74.0-1.3+deb11u11
 libdaemon-dev==0.14-7.1
 libdaemon0==0.14-7.1
 libdata-dpath-perl==0.58-1
@@ -588,6 +599,8 @@ libfstrm0==0.6.0-1+b1
 libgbm1==20.3.5-1
 libgc1==1:8.0.4-3
 libgcc-10-dev==10.2.1-6
+libgcc-10-dev-armhf-cross==10.2.1-6cross1
+libgcc-s1-armhf-cross==10.2.1-6cross1
 libgd-perl==2.73-1+b1
 libgd3==2.3.0-2
 libgdbm-compat4==1.19-2
@@ -630,6 +643,7 @@ libgmp-dev==2:6.2.1+dfsg-1+deb11u1
 libgmpxx4ldbl==2:6.2.1+dfsg-1+deb11u1
 libgnutls-dane0==3.7.1-5+deb11u3
 libgomp1==10.2.1-6
+libgomp1-armhf-cross==10.2.1-6cross1
 libgoogle-gson-java==2.8.6-1+deb11u1
 libgoogle-perftools4==2.8.1-1
 libgpgme11==1.14.0-1+b2
@@ -735,7 +749,7 @@ libjbig0==2.1-3.1+b2
 libjbig2dec0==0.19-2
 libjemalloc-dev==5.2.1-3
 libjemalloc2==5.2.1-3
-libjetty9-java==9.4.39-3+deb11u2
+libjetty9-java==9.4.50-4+deb11u1
 libjpeg62-turbo==1:2.0.6-4
 libjq1==1.6-2.1
 libjs-bootstrap4==4.5.2+dfsg1-8~deb11u1
@@ -893,7 +907,7 @@ libnfnetlink0==1.0.1-3+b1
 libnftables1==0.9.8-3.1+deb11u1
 libnftnl-dev==1.1.9-1
 libnftnl11==1.1.9-1
-libnghttp2-14==1.43.0-1
+libnghttp2-14==1.43.0-1+deb11u1
 libnl-3-200==3.4.0-1+b1
 libnl-route-3-200==3.4.0-1+b1
 libnorm-dev==1.5.9+dfsg-2
@@ -1002,7 +1016,7 @@ libplexus-sec-dispatcher-java==1.4-4
 libplexus-utils2-java==3.3.0-1
 libplexus-velocity-java==1.2-3.1
 libpmem1==1.10-2+deb11u1
-libpmix2==4.0.0-4.1
+libpmix2==4.0.0-4.1+deb11u1
 libpng-dev==1.6.37-3
 libpng-tools==1.6.37-3
 libpng16-16==1.6.37-3
@@ -1134,10 +1148,11 @@ libspice-server1==0.14.3-2.1
 libsqlite3-0==3.34.1-3
 libsratom-0-0==0.6.8-1
 libsrt1.4-gnutls==1.4.2-1.3
-libssh-gcrypt-4==0.9.7-0+deb11u1
+libssh-gcrypt-4==0.9.8-0+deb11u1
 libssh2-1==1.9.0-2
 libssl-dev==1.1.1w-0+deb11u1
 libstdc++-10-dev==10.2.1-6
+libstdc++6-armhf-cross==10.2.1-6cross1
 libstemmer0d==2.1.0-1
 libstrictures-perl==2.000006-1
 libstring-copyright-perl==0.003006-1
@@ -1185,7 +1200,7 @@ libthai-dev==0.1.28-3
 libthai0==0.1.28-3
 libtheora0==1.1.1+dfsg.1-15
 libtie-ixhash-perl==1.23-2.1
-libtiff5==4.2.0-1+deb11u4
+libtiff5==4.2.0-1+deb11u5
 libtime-duration-perl==1.21-1
 libtime-moment-perl==0.44-1+b3
 libtimedate-perl==2.3300-2
@@ -1202,6 +1217,7 @@ libtype-tiny-perl==1.012001-2
 libtype-tiny-xs-perl==0.022-1
 libtypes-serialiser-perl==1.01-1
 libubsan1==10.2.1-6
+libubsan1-armhf-cross==10.2.1-6cross1
 libuchardet0==0.0.7-1
 libucx0==1.10.1~rc1+really.1.10.0-1
 libudev-dev==247.3-7+deb11u4
@@ -1372,6 +1388,7 @@ libxrandr2==2:1.5.1-1
 libxrender-dev==1:0.9.10-1
 libxrender1==1:0.9.10-1
 libxshmfence1==1.3-1
+libxslt1-dev==1.1.34-4+deb11u1
 libxslt1.1==1.1.34-4+deb11u1
 libxss1==1:1.2.3-1
 libxstring-perl==0.005-1+b1
@@ -1400,12 +1417,14 @@ libzvbi0==0.2.35-18
 libzzip-0-13==0.13.62-3.3+deb11u1
 licensecheck==3.1.1-2
 lintian==2.104.0
-linux-compiler-gcc-10-x86==5.10.197-1
-linux-headers-5.10.0-26-amd64==5.10.197-1
-linux-headers-5.10.0-26-common==5.10.197-1
-linux-headers-amd64==5.10.197-1
-linux-kbuild-5.10==5.10.197-1
-linux-libc-dev==5.10.197-1
+linux-compiler-gcc-10-x86==5.10.205-2
+linux-headers-5.10.0-27-amd64==5.10.205-2
+linux-headers-5.10.0-27-arm64==5.10.205-2
+linux-headers-5.10.0-27-common==5.10.205-2
+linux-headers-amd64==5.10.205-2
+linux-headers-arm64==5.10.205-2
+linux-kbuild-5.10==5.10.205-2
+linux-libc-dev==5.10.205-2
 linuxdoc-tools==0.9.82-1
 llvm-11==1:11.0.1-2
 llvm-11-runtime==1:11.0.1-2
@@ -1450,16 +1469,17 @@ netpbm==2:10.0-15.4
 nftables==0.9.8-3.1+deb11u1
 nlohmann-json3-dev==3.9.1-1
 node-jquery==3.5.1+dfsg+~3.5.5-7
+nodejs==14.21.3-deb-1nodesource1
 ocl-icd-libopencl1==2.2.14-2
 openjade==1.4devel1-22
-openjdk-11-jdk==11.0.20+8-1~deb11u1
-openjdk-11-jdk-headless==11.0.20+8-1~deb11u1
-openjdk-11-jre==11.0.20+8-1~deb11u1
-openjdk-11-jre-headless==11.0.20+8-1~deb11u1
+openjdk-11-jdk==11.0.21+9-1~deb11u1
+openjdk-11-jdk-headless==11.0.21+9-1~deb11u1
+openjdk-11-jre==11.0.21+9-1~deb11u1
+openjdk-11-jre-headless==11.0.21+9-1~deb11u1
 opensp==1.5.2-13+b2
-openssh-client==1:8.4p1-5+deb11u2
-openssh-server==1:8.4p1-5+deb11u2
-openssh-sftp-server==1:8.4p1-5+deb11u2
+openssh-client==1:8.4p1-5+deb11u3
+openssh-server==1:8.4p1-5+deb11u3
+openssh-sftp-server==1:8.4p1-5+deb11u3
 openssl==1.1.1w-0+deb11u1
 ovmf==2020.11-2+deb11u1
 packagekit==1.2.2-2
diff --git a/files/build/versions/dockers/sonic-slave-bullseye/versions-deb-bullseye-arm64 b/files/build/versions/dockers/sonic-slave-bullseye/versions-deb-bullseye-arm64
index 0418672f7..8c3682088 100644
--- a/files/build/versions/dockers/sonic-slave-bullseye/versions-deb-bullseye-arm64
+++ b/files/build/versions/dockers/sonic-slave-bullseye/versions-deb-bullseye-arm64
@@ -1,23 +1,3 @@
-binutils-aarch64-linux-gnu==2.35.2-2
-binutils-arm-linux-gnueabihf==2.35.2-2
-cpp-10-arm-linux-gnueabihf==10.2.1-6cross1
-cpp-arm-linux-gnueabihf==4:10.2.1-1
 dctrl-tools==2.24-3
 dvipng==1.15-1.1
-gcc-10-arm-linux-gnueabihf==10.2.1-6cross1
-gcc-10-arm-linux-gnueabihf-base==10.2.1-6cross1
-gcc-10-cross-base==10.2.1-6cross1
-gcc-arm-linux-gnueabihf==4:10.2.1-1
-libasan6-armhf-cross==10.2.1-6cross1
-libatomic1-armhf-cross==10.2.1-6cross1
-libc6-armhf-cross==2.31-9cross4
-libgcc-10-dev-armhf-cross==10.2.1-6cross1
-libgcc-s1-armhf-cross==10.2.1-6cross1
-libgomp1-armhf-cross==10.2.1-6cross1
-libstdc++6-armhf-cross==10.2.1-6cross1
-libubsan1-armhf-cross==10.2.1-6cross1
 libunicode-linebreak-perl==0.0.20190101-1+b2
-libxslt1-dev==1.1.34-4+deb11u1
-linux-headers-5.10.0-26-arm64==5.10.197-1
-linux-headers-arm64==5.10.197-1
-nodejs==14.21.3-deb-1nodesource1
diff --git a/files/build/versions/dockers/sonic-slave-bullseye/versions-deb-bullseye-armhf b/files/build/versions/dockers/sonic-slave-bullseye/versions-deb-bullseye-armhf
index 08b75c3dc..faf01b854 100644
--- a/files/build/versions/dockers/sonic-slave-bullseye/versions-deb-bullseye-armhf
+++ b/files/build/versions/dockers/sonic-slave-bullseye/versions-deb-bullseye-armhf
@@ -1,4 +1,3 @@
-binutils-arm-linux-gnueabihf==2.35.2-2
 dctrl-tools==2.24-3
 dvipng==1.15-1.1
 golang-1.15-go==1.15.15-1~deb11u4
@@ -6,9 +5,7 @@ golang-1.15-src==1.15.15-1~deb11u4
 libjpeg-dev==1:2.0.6-4
 libjpeg62-turbo-dev==1:2.0.6-4
 libunicode-linebreak-perl==0.0.20190101-1+b2
-libxslt1-dev==1.1.34-4+deb11u1
-linux-compiler-gcc-10-arm==5.10.197-1
-linux-headers-5.10.0-26-armmp==5.10.197-1
-linux-headers-armmp==5.10.197-1
+linux-compiler-gcc-10-arm==5.10.205-2
+linux-headers-5.10.0-27-armmp==5.10.205-2
+linux-headers-armmp==5.10.205-2
 nasm==2.15.05-1
-nodejs==14.21.3-deb-1nodesource1
diff --git a/files/build/versions/dockers/sonic-slave-bullseye/versions-py3 b/files/build/versions/dockers/sonic-slave-bullseye/versions-py3
index 41000dc5b..3b9b3be6d 100644
--- a/files/build/versions/dockers/sonic-slave-bullseye/versions-py3
+++ b/files/build/versions/dockers/sonic-slave-bullseye/versions-py3
@@ -6,7 +6,7 @@ automat==20.2.0
 babel==2.8.0
 bcrypt==3.1.7
 beautifulsoup4==4.9.3
-bitarray==2.8.1
+bitarray==2.9.2
 certifi==2020.6.20
 chardet==4.0.0
 click==7.1.2
@@ -60,9 +60,9 @@ parameterized==0.8.1
 parse==1.6.6
 pexpect==4.8.0
 pillow==9.4.0
-pip==23.2.1
+pip==23.3.2
 pluggy==0.13.0
-protobuf==4.24.4
+protobuf==4.25.2
 ptyprocess==0.7.0
 py==1.10.0
 pyang==2.4.0
@@ -70,7 +70,7 @@ pyangbind==0.8.1
 pyasn1==0.4.8
 pyasn1-modules==0.2.1
 pycurl==7.43.0.6
-pyfakefs==5.2.4
+pyfakefs==5.3.4
 pygments==2.7.1
 pygobject==3.38.0
 pyhamcrest==1.9.0
@@ -88,8 +88,8 @@ python-magic==0.4.20
 pytz==2021.1
 pyxdg==0.27
 pyyaml==5.4.1
-redis==5.0.0
-regex==2023.8.8
+redis==5.0.1
+regex==2023.12.25
 requests==2.25.1
 roman==2.0.0
 service-identity==18.1.0
diff --git a/files/build/versions/dockers/sonic-slave-buster/versions-deb-buster b/files/build/versions/dockers/sonic-slave-buster/versions-deb-buster
index 28001101d..84fc7427e 100644
--- a/files/build/versions/dockers/sonic-slave-buster/versions-deb-buster
+++ b/files/build/versions/dockers/sonic-slave-buster/versions-deb-buster
@@ -26,6 +26,7 @@ bc==1.07.1-2+b1
 bind9-host==1:9.11.5.P4+dfsg-5.1+deb10u9
 binfmt-support==2.2.0-2
 binutils==2.31.1-16
+binutils-aarch64-linux-gnu==2.31.1-16
 binutils-common==2.31.1-16
 binutils-x86-64-linux-gnu==2.31.1-16
 bison==2:3.3.2.dfsg-1
@@ -56,7 +57,7 @@ cpp==4:8.3.0-1
 cpp-8==8.3.0-6
 cppcheck==1.86-1
 cron==3.0pl1-134+deb10u1
-curl==7.64.0-4+deb10u7
+curl==7.64.0-4+deb10u8
 dbus==1.12.28-0+deb10u1
 dbus-user-session==1.12.28-0+deb10u1
 dconf-gsettings-backend==0.30.1-2
@@ -81,7 +82,7 @@ dh-systemd==12.1.1
 dictionaries-common==1.28.1
 diffstat==1.62-1
 dirmngr==2.2.12-1+deb10u2
-distro-info-data==0.41+deb10u7
+distro-info-data==0.41+deb10u8
 dkms==2.6.1-4
 dmeventd==2:1.02.155-3
 dmsetup==2:1.02.155-3
@@ -94,7 +95,7 @@ docbook-xml==4.5-8
 docker-buildx-plugin==0.10.5-1~debian.10~buster
 docker-ce==5:24.0.2-1~debian.10~buster
 docker-ce-cli==5:24.0.2-1~debian.10~buster
-docker-ce-rootless-extras==5:24.0.7-1~debian.10~buster
+docker-ce-rootless-extras==5:25.0.0-1~debian.10~buster
 docker-compose-plugin==2.18.1-1~debian.10~buster
 docutils-common==0.14+dfsg-4
 docutils-doc==0.14+dfsg-4
@@ -108,9 +109,9 @@ dwz==0.13-5~bpo10+1
 eatmydata==105-7
 emacsen-common==3.0.4
 equivs==2.2.0
-exim4-base==4.92-8+deb10u8
-exim4-config==4.92-8+deb10u8
-exim4-daemon-light==4.92-8+deb10u8
+exim4-base==4.92-8+deb10u9
+exim4-config==4.92-8+deb10u9
+exim4-daemon-light==4.92-8+deb10u9
 expat==2.2.6-2+deb10u6
 exuberant-ctags==1:5.9~svn20110310-12+deb10u1
 fakeroot==1.23-1
@@ -292,7 +293,7 @@ libbinutils==2.31.1-16
 libbison-dev==2:3.3.2.dfsg-1
 libbit-vector-perl==7.4-1+b5
 libblkid-dev==2.33.1-0.1
-libbluetooth3==5.50-1.2~deb10u3
+libbluetooth3==5.50-1.2~deb10u4
 libbluray2==1:1.1.0-1+deb10u1
 libboost-atomic1.71-dev==1.71.0-6~bpo10+1
 libboost-atomic1.71.0==1.71.0-6~bpo10+1
@@ -371,8 +372,8 @@ libcgi-pm-perl==4.40-1
 libcglib-java==3.2.10-1
 libcgraph6==2.40.1-6+deb10u1
 libchromaprint1==1.4.3-3
-libcjson-dev==1.7.10-1.1+deb10u1
-libcjson1==1.7.10-1.1+deb10u1
+libcjson-dev==1.7.10-1.1+deb10u2
+libcjson1==1.7.10-1.1+deb10u2
 libclang-common-7-dev==1:7.0.1-8+deb10u2
 libclang1-6.0==1:6.0.1-10
 libclang1-7==1:7.0.1-8+deb10u2
@@ -417,9 +418,9 @@ libcunit1-dev==2.1-3-dfsg-2+b12
 libcups2==2.2.10-6+deb10u9
 libcupsfilters1==1.21.6-5+deb10u1
 libcupsimage2==2.2.10-6+deb10u9
-libcurl3-gnutls==7.64.0-4+deb10u7
-libcurl4==7.64.0-4+deb10u7
-libcurl4-openssl-dev==7.64.0-4+deb10u7
+libcurl3-gnutls==7.64.0-4+deb10u8
+libcurl4==7.64.0-4+deb10u8
+libcurl4-openssl-dev==7.64.0-4+deb10u8
 libdaemon-dev==0.14-7
 libdaemon0==0.14-7
 libdata-dump-perl==1.23-1
@@ -434,7 +435,7 @@ libdbus-glib-1-2==0.110-4
 libdbus-glib-1-dev==0.110-4
 libdbus-glib-1-dev-bin==0.110-4
 libdconf1==0.30.1-2
-libde265-0==1.0.11-0+deb10u4
+libde265-0==1.0.11-0+deb10u6
 libdebhelper-perl==13.3.3~bpo10+1
 libdevel-callchecker-perl==0.008-1
 libdevel-caller-perl==2.06-2+b1
@@ -448,7 +449,7 @@ libdevmapper1.02.1==2:1.02.155-3
 libdigest-bubblebabble-perl==0.02-2
 libdigest-hmac-perl==1.03+dfsg-2
 libdist-checkconflicts-perl==0.11-1
-libdistro-info-perl==0.21
+libdistro-info-perl==0.21+deb10u1
 libdjvulibre-text==3.5.27.1-10+deb10u1
 libdjvulibre21==3.5.27.1-10+deb10u1
 libdns-export1104==1:9.11.5.P4+dfsg-5.1+deb10u9
@@ -462,9 +463,12 @@ libdpkg-perl==1.19.8
 libdrm-amdgpu1==2.4.97-1
 libdrm-common==2.4.97-1
 libdrm-dev==2.4.97-1
+libdrm-etnaviv1==2.4.97-1
+libdrm-freedreno1==2.4.97-1
 libdrm-intel1==2.4.97-1
 libdrm-nouveau2==2.4.97-1
 libdrm-radeon1==2.4.97-1
+libdrm-tegra0==2.4.97-1
 libdrm2==2.4.97-1
 libdv4==1.0.0-12
 libdvdnav4==6.0.0-1
@@ -577,17 +581,19 @@ libgme0==0.6.2-1
 libgmock-dev==1.8.1-3
 libgmp-dev==2:6.1.2+dfsg-4+deb10u1
 libgmpxx4ldbl==2:6.1.2+dfsg-4+deb10u1
-libgnutls-dane0==3.6.7-4+deb10u10
-libgnutls-openssl27==3.6.7-4+deb10u10
-libgnutls28-dev==3.6.7-4+deb10u10
-libgnutlsxx28==3.6.7-4+deb10u10
+libgnutls-dane0==3.6.7-4+deb10u11
+libgnutls-openssl27==3.6.7-4+deb10u11
+libgnutls28-dev==3.6.7-4+deb10u11
+libgnutlsxx28==3.6.7-4+deb10u11
 libgomp1==8.3.0-6
 libgoogle-perftools4==2.7-1
 libgpgme11==1.12.0-6
 libgpm2==1.20.7-5
 libgraphite2-3==1.3.13-7
 libgraphite2-dev==1.3.13-7
+libgrpc++-dev==1.16.1-1
 libgrpc++1==1.16.1-1
+libgrpc-dev==1.16.1-1
 libgrpc6==1.16.1-1
 libgs9==9.27~dfsg-2+deb10u9
 libgs9-common==9.27~dfsg-2+deb10u9
@@ -691,7 +697,7 @@ libjbig0==2.1-3.1+b2
 libjbig2dec0==0.16-1+deb10u1
 libjemalloc-dev==5.1.0-3
 libjemalloc2==5.1.0-3
-libjetty9-java==9.4.16-0+deb10u3
+libjetty9-java==9.4.50-4+deb10u1
 libjpeg62-turbo==1:1.5.2-2+deb10u1
 libjq1==1.5+dfsg-2+b1
 libjs-bootstrap==3.4.1+dfsg-1
@@ -811,9 +817,9 @@ libnamespace-autoclean-perl==0.28-1
 libnamespace-clean-perl==0.27-1
 libnanomsg-dev==1.1.5+dfsg-1
 libnanomsg5==1.1.5+dfsg-1
-libncurses-dev==6.1+20181013-2+deb10u4
-libncurses5-dev==6.1+20181013-2+deb10u4
-libncurses6==6.1+20181013-2+deb10u4
+libncurses-dev==6.1+20181013-2+deb10u5
+libncurses5-dev==6.1+20181013-2+deb10u5
+libncurses6==6.1+20181013-2+deb10u5
 libnet-dbus-perl==1.1.0-5+b1
 libnet-dns-perl==1.19-1
 libnet-dns-sec-perl==1.11-1
@@ -843,7 +849,7 @@ libnorm1==1.5.8+dfsg2-1
 libnpth0==1.6-1
 libnspr4==2:4.20-1
 libnss-systemd==241-7~deb10u10
-libnss3==2:3.42.1-1+deb10u6
+libnss3==2:3.42.1-1+deb10u7
 libnuma-dev==2.0.12-1
 libnuma1==2.0.12-1
 libnumber-compare-perl==0.03-1
@@ -939,7 +945,7 @@ libplexus-languages-java==0.9.10-1
 libplexus-sec-dispatcher-java==1.4-4
 libplexus-utils2-java==3.1.1-1
 libplexus-velocity-java==1.2-3
-libpmix2==3.1.2-3
+libpmix2==3.1.2-3+deb10u1
 libpng-dev==1.6.36-6
 libpng-tools==1.6.36-6
 libpng16-16==1.6.36-6
@@ -1107,8 +1113,8 @@ libsub-identify-perl==0.14-1+b1
 libsub-install-perl==0.928-1
 libsub-name-perl==0.21-1+b3
 libsub-quote-perl==2.005001-1
-libsubunit-dev==1.3.0-1
-libsubunit0==1.3.0-1
+libsubunit-dev==1.3.0-1+deb10u1
+libsubunit0==1.3.0-1+deb10u1
 libsurefire-java==2.22.1-1
 libswitch-perl==2.17-2
 libswresample3==7:4.1.11-0+deb10u1
@@ -1327,6 +1333,7 @@ libxrender-dev==1:0.9.10-1
 libxrender1==1:0.9.10-1
 libxshmfence-dev==1.3-1
 libxshmfence1==1.3-1
+libxslt1-dev==1.1.32-2.2~deb10u2
 libxslt1.1==1.1.32-2.2~deb10u2
 libxss1==1:1.2.3-1
 libxt-dev==1:1.1.5-1+b3
@@ -1352,12 +1359,12 @@ libzvbi0==0.2.35-16
 libzzip-0-13==0.13.62-3.2+deb10u1
 licensecheck==3.0.31-3
 lintian==2.15.0
-linux-compiler-gcc-8-x86==4.19.289-2
-linux-headers-4.19.0-25-amd64==4.19.289-2
-linux-headers-4.19.0-25-common==4.19.289-2
-linux-headers-amd64==4.19+105+deb10u20
-linux-kbuild-4.19==4.19.289-2
-linux-libc-dev==4.19.289-2
+linux-compiler-gcc-8-x86==4.19.304-1
+linux-headers-4.19.0-26-amd64==4.19.304-1
+linux-headers-4.19.0-26-common==4.19.304-1
+linux-headers-amd64==4.19+105+deb10u21
+linux-kbuild-4.19==4.19.304-1
+linux-libc-dev==4.19.304-1
 linuxdoc-tools==0.9.73-2
 llvm-7==1:7.0.1-8+deb10u2
 llvm-7-dev==1:7.0.1-8+deb10u2
@@ -1391,24 +1398,25 @@ mesa-vdpau-drivers==18.3.6-2+deb10u1
 mime-support==3.62
 module-assistant==0.11.10
 mysql-common==5.8+1.0.5
-ncurses-term==6.1+20181013-2+deb10u4
+ncurses-term==6.1+20181013-2+deb10u5
 netbase==5.6
 netpbm==2:10.0-15.3+b2
 nettle-dev==3.4.1-1+deb10u1
 nftables==0.9.0-2
 nlohmann-json3-dev==3.5.0-0.1
+nodejs==14.21.3-deb-1nodesource1
 ocl-icd-libopencl1==2.2.12-2
 openjade==1.4devel1-21.3+b1
-openjdk-11-jdk==11.0.20+8-1~deb10u1
-openjdk-11-jdk-headless==11.0.20+8-1~deb10u1
-openjdk-11-jre==11.0.20+8-1~deb10u1
-openjdk-11-jre-headless==11.0.20+8-1~deb10u1
+openjdk-11-jdk==11.0.21+9-1~deb10u1
+openjdk-11-jdk-headless==11.0.21+9-1~deb10u1
+openjdk-11-jre==11.0.21+9-1~deb10u1
+openjdk-11-jre-headless==11.0.21+9-1~deb10u1
 openmpi-bin==3.1.3-11
 openmpi-common==3.1.3-11
 opensp==1.5.2-13+b1
-openssh-client==1:7.9p1-10+deb10u3
-openssh-server==1:7.9p1-10+deb10u3
-openssh-sftp-server==1:7.9p1-10+deb10u3
+openssh-client==1:7.9p1-10+deb10u4
+openssh-server==1:7.9p1-10+deb10u4
+openssh-sftp-server==1:7.9p1-10+deb10u4
 openssl==1.1.1n-0+deb10u6
 ovmf==0~20181115.85588389-3+deb10u3
 packagekit==1.1.12-5
@@ -1566,7 +1574,7 @@ python-twisted-bin==18.9.0-3+deb10u2
 python-twisted-core==18.9.0-3+deb10u2
 python-typing==3.6.6-1
 python-tz==2019.1-1
-python-urllib3==1.24.1-1+deb10u1
+python-urllib3==1.24.1-1+deb10u2
 python-webencodings==0.5.1-1
 python-wheel==0.32.3-2
 python-wrapt==1.10.11-1
@@ -1600,7 +1608,7 @@ python3-dbg==3.7.3-1
 python3-dbus==1.2.8-3
 python3-debian==0.1.35
 python3-dev==3.7.3-1
-python3-distro-info==0.21
+python3-distro-info==0.21+deb10u1
 python3-distutils==3.7.3-1
 python3-docutils==0.14+dfsg-4
 python3-entrypoints==0.3-1
@@ -1642,7 +1650,7 @@ python3-sphinx==1.8.4-1
 python3-sphinx-rtd-theme==0.4.3+dfsg-1
 python3-tz==2019.1-1
 python3-unidiff==0.5.4-1
-python3-urllib3==1.24.1-1+deb10u1
+python3-urllib3==1.24.1-1+deb10u2
 python3-wheel==0.32.3-2
 python3-xdg==0.25-5
 python3.7==3.7.3-2+deb10u6
diff --git a/files/build/versions/dockers/sonic-slave-buster/versions-deb-buster-arm64 b/files/build/versions/dockers/sonic-slave-buster/versions-deb-buster-arm64
index 36d10bb07..8f68d6329 100644
--- a/files/build/versions/dockers/sonic-slave-buster/versions-deb-buster-arm64
+++ b/files/build/versions/dockers/sonic-slave-buster/versions-deb-buster-arm64
@@ -1,7 +1 @@
-binutils-aarch64-linux-gnu==2.31.1-16
-libdrm-etnaviv1==2.4.97-1
-libdrm-freedreno1==2.4.97-1
-libdrm-tegra0==2.4.97-1
 libtext-iconv-perl==1.7-5+b6
-libxslt1-dev==1.1.32-2.2~deb10u2
-nodejs==14.21.3-deb-1nodesource1
diff --git a/files/build/versions/dockers/sonic-slave-buster/versions-deb-buster-armhf b/files/build/versions/dockers/sonic-slave-buster/versions-deb-buster-armhf
index 255632f99..cad875a8e 100644
--- a/files/build/versions/dockers/sonic-slave-buster/versions-deb-buster-armhf
+++ b/files/build/versions/dockers/sonic-slave-buster/versions-deb-buster-armhf
@@ -1,13 +1,8 @@
 binutils-arm-linux-gnueabihf==2.31.1-16
-libdrm-etnaviv1==2.4.97-1
 libdrm-exynos1==2.4.97-1
-libdrm-freedreno1==2.4.97-1
 libdrm-omap1==2.4.97-1
-libdrm-tegra0==2.4.97-1
 libgles2-mesa-dev==18.3.6-2+deb10u1
 libjpeg-dev==1:1.5.2-2+deb10u1
 libjpeg62-turbo-dev==1:1.5.2-2+deb10u1
-libxslt1-dev==1.1.32-2.2~deb10u2
-linux-compiler-gcc-8-arm==4.19.289-2
+linux-compiler-gcc-8-arm==4.19.304-1
 nasm==2.14-1
-nodejs==14.21.3-deb-1nodesource1
diff --git a/files/build/versions/dockers/sonic-slave-buster/versions-py3 b/files/build/versions/dockers/sonic-slave-buster/versions-py3
index a831ef80c..27cb1be11 100644
--- a/files/build/versions/dockers/sonic-slave-buster/versions-py3
+++ b/files/build/versions/dockers/sonic-slave-buster/versions-py3
@@ -4,14 +4,14 @@ async-timeout==4.0.3
 atomicwrites==1.1.5
 attrs==18.2.0
 babel==2.6.0
-bitarray==2.8.1
+bitarray==2.9.2
 certifi==2018.8.24
 chardet==3.0.4
 cov-core==1.15.0
 coverage==4.5.2
 cryptography==2.6.1
 devscripts==2.19.5+deb10u1
-distro-info==0.21
+distro-info==0.21+deb10u1
 docutils==0.14
 entrypoints==0.3
 fastentrypoints==0.12
@@ -25,7 +25,7 @@ jinja2==3.0.3
 keyring==17.1.1
 keyrings.alt==3.1.1
 lxml==4.9.1
-m2crypto==0.39.0
+m2crypto==0.40.1
 mako==1.0.7
 markdown==3.0.1
 markupsafe==2.0.1
@@ -41,7 +41,7 @@ parameterized==0.8.1
 pbr==4.2.0
 pexpect==4.8.0
 pillow==9.4.0
-pip==23.2.1
+pip==23.3.2
 pluggy==0.8.0
 ptyprocess==0.7.0
 py==1.7.0
@@ -49,7 +49,7 @@ pyang==2.4.0
 pyangbind==0.8.1
 pycrypto==2.6.1
 pycurl==7.43.0.2
-pyfakefs==5.2.4
+pyfakefs==5.3.4
 pygments==2.3.1
 pygobject==3.30.4
 pympler==0.8
@@ -64,8 +64,8 @@ python-magic==0.4.16
 pytz==2019.1
 pyxdg==0.25
 pyyaml==5.4.1
-redis==5.0.0
-regex==2023.8.8
+redis==5.0.1
+regex==2023.12.25
 requests==2.21.0
 roman==2.0.0
 secretstorage==2.3.1
diff --git a/files/build/versions/host-base-image/versions-deb-bookworm b/files/build/versions/host-base-image/versions-deb-bookworm
index 06b78961a..7f4b57b33 100644
--- a/files/build/versions/host-base-image/versions-deb-bookworm
+++ b/files/build/versions/host-base-image/versions-deb-bookworm
@@ -1,6 +1,6 @@
 adduser==3.134
 apt==2.6.1
-base-files==12.4+deb12u2
+base-files==12.4+deb12u4
 base-passwd==3.6.1
 bash==5.2.15-2+b2
 bsdutils==1:2.38.1-5+b1
@@ -26,8 +26,8 @@ libaudit-common==1:3.0.9-1
 libaudit1==1:3.0.9-1
 libblkid1==2.38.1-5+b1
 libbz2-1.0==1.0.8-5+b1
-libc-bin==2.36-9+deb12u2
-libc6==2.36-9+deb12u2
+libc-bin==2.36-9+deb12u3
+libc6==2.36-9+deb12u3
 libcap-ng0==0.8.3-1+b3
 libcap2==1:2.66-4
 libcom-err2==1.47.0-2
@@ -36,13 +36,10 @@ libdb5.3==5.3.28+dfsg2-1
 libdebconfclient0==0.270
 libext2fs2==1.47.0-2
 libffi8==3.4.4-1
-libfile-find-rule-perl==0.34-3
 libgcc-s1==12.2.0-14
 libgcrypt20==1.10.1-3
-libgdbm-compat4==1.23-3
-libgdbm6==1.23-3
 libgmp10==2:6.2.1+dfsg1-1.1
-libgnutls30==3.7.9-2
+libgnutls30==3.7.9-2+deb12u1
 libgpg-error0==1.46-1
 libhogweed6==3.8.1-2
 libidn2-0==2.3.3-1+b1
@@ -51,14 +48,12 @@ liblzma5==5.4.1-0.2
 libmd0==1.0.4-2
 libmount1==2.38.1-5+b1
 libnettle8==3.8.1-2
-libnumber-compare-perl==0.03-3
 libp11-kit0==0.24.1-2
 libpam-modules==1.5.2-6+deb12u1
 libpam-modules-bin==1.5.2-6+deb12u1
 libpam-runtime==1.5.2-6+deb12u1
 libpam0g==1.5.2-6+deb12u1
 libpcre2-8-0==10.42-1
-libperl5.36==5.36.0-7
 libseccomp2==2.5.4-1+b3
 libselinux1==3.4-1+b6
 libsemanage-common==3.4-1
@@ -67,11 +62,10 @@ libsepol2==3.4-2.1
 libsmartcols1==2.38.1-5+b1
 libss2==1.47.0-2
 libstdc++6==12.2.0-14
-libsystemd0==252.17-1~deb12u1
+libsystemd0==252.19-1~deb12u1
 libtasn1-6==4.19.0-2
-libtext-glob-perl==0.11-3
 libtinfo6==6.4-4
-libudev1==252.17-1~deb12u1
+libudev1==252.19-1~deb12u1
 libunistring2==1.0-2
 libuuid1==2.38.1-5+b1
 libxxhash0==0.8.1-1
@@ -83,15 +77,12 @@ mount==2.38.1-5+b1
 ncurses-base==6.4-4
 ncurses-bin==6.4-4
 passwd==1:4.13+dfsg1-1+b1
-perl==5.36.0-7
-perl-base==5.36.0-7
-perl-modules-5.36==5.36.0-7
+perl-base==5.36.0-7+deb12u1
 sed==4.9-1
 sysvinit-utils==3.06-4
 tar==1.34+dfsg-1.2
-tzdata==2023c-5
+tzdata==2023c-5+deb12u1
 usr-is-merged==35
-usrmerge==35
 util-linux==2.38.1-5+b1
 util-linux-extra==2.38.1-5+b1
 zlib1g==1:1.2.13.dfsg-1
diff --git a/files/build/versions/host-image/versions-deb-bookworm b/files/build/versions/host-image/versions-deb-bookworm
index 22ebf5a31..0ba23f1d4 100644
--- a/files/build/versions/host-image/versions-deb-bookworm
+++ b/files/build/versions/host-image/versions-deb-bookworm
@@ -8,6 +8,7 @@ bash==5.1-2
 bash-completion==1:2.11-6
 bash-tacplus==1.0.0
 binutils==2.40-2
+binutils-aarch64-linux-gnu==2.40-2
 binutils-common==2.40-2
 binutils-x86-64-linux-gnu==2.40-2
 bridge-utils==1.7.1-1
@@ -23,14 +24,14 @@ cpp==4:12.2.0-3
 cpp-12==12.2.0-14
 cron==3.0pl1-162
 cron-daemon-common==3.0pl1-162
-curl==7.88.1-10+deb12u4
+curl==7.88.1-10+deb12u5
 dbus==1.14.10-1~deb12u1
 dbus-bin==1.14.10-1~deb12u1
 dbus-daemon==1.14.10-1~deb12u1
 dbus-session-bus-common==1.14.10-1~deb12u1
 dbus-system-bus-common==1.14.10-1~deb12u1
 device-tree-compiler==1.6.1-4+b1
-distro-info-data==0.58
+distro-info-data==0.58+deb12u1
 dmidecode==3.4-1
 dmsetup==2:1.02.185-2
 docker-ce==5:24.0.2-1~debian.12~bookworm
@@ -61,12 +62,14 @@ grub2-common==2.06-13+deb12u1
 haveged==1.9.14-1+b1
 hdparm==9.65+ds-1
 hping3==3.a2.ds2-10
-hw-management==1.mlnx.7.0030.1011
+hw-management==1.mlnx.7.0030.2008
 i2c-tools==4.3-2+b3
+icu-devtools==72.1-3
 ifmetric==0.3-5
 ifupdown2==3.0.0-1
 initramfs-tools==0.142
 initramfs-tools-core==0.142
+ionic-modules==22.11.1-001
 ipmitool==1.8.19-4
 iproute2==6.1.0-3
 iptables==1.8.9-2
@@ -95,9 +98,9 @@ libbpf1==1:1.1.0-1
 libbrotli1==1.0.9-2+b6
 libbsd0==0.11.7-2
 libc-ares2==1.18.1-3
-libc-bin==2.36-9+deb12u3
+libc-dev-bin==2.36-9+deb12u3
 libc-l10n==2.36-9+deb12u3
-libc6==2.36-9+deb12u3
+libc6-dev==2.36-9+deb12u3
 libcap2-bin==1:2.66-4
 libcbor0.8==0.8.0-2+b1
 libcc1-0==12.2.0-14
@@ -107,7 +110,7 @@ libcrypt-dev==1:4.4.33-2
 libcryptsetup12==2:2.6.1-4~deb12u1
 libctf-nobfd0==2.40-2
 libctf0==2.40-2
-libcurl4==7.88.1-10+deb12u4
+libcurl4==7.88.1-10+deb12u5
 libdbd-sqlite3-perl==1.72-1
 libdbi-perl==1.643-4
 libdbus-1-3==1.14.10-1~deb12u1
@@ -129,6 +132,8 @@ libfreeipmi17==1.6.10-1+b1
 libfreetype6==2.12.1+dfsg-5
 libfuse2==2.9.9-6+b1
 libgcc-12-dev==12.2.0-14
+libgdbm-compat4==1.23-3
+libgdbm6==1.23-3
 libgirepository-1.0-1==1.74.0-3
 libglib2.0-0==2.74.6-2
 libgomp1==12.2.0-14
@@ -138,7 +143,10 @@ libgrpc29==1.51.1-3+b1
 libgssapi-krb5-2==1.20.1-2+deb12u1
 libhavege2==1.9.14-1+b1
 libhiredis0.14==0.14.1-3
+libhwasan0==12.2.0-14
 libi2c0==4.3-2+b3
+libicu-dev==72.1-3
+libicu72==72.1-3
 libiniparser1==4.1-6
 libip4tc2==1.8.9-2
 libip6tc2==1.8.9-2
@@ -170,13 +178,14 @@ libnet1==1.1.6+dfsg-3.2
 libnetfilter-conntrack3==1.0.9-3
 libnfnetlink0==1.0.2-2
 libnftnl11==1.2.4-2
-libnghttp2-14==1.52.0-1
+libnghttp2-14==1.52.0-1+deb12u1
 libnl-3-200==3.5.0-1
 libnl-cli-3-200==3.5.0-1
 libnl-genl-3-200==3.5.0-1
 libnl-nf-3-200==3.5.0-1
 libnl-route-3-200==3.5.0-1
 libnorm1==1.5.9+dfsg-2
+libnsl-dev==1.3.0-2
 libnsl2==1.3.0-2
 libnss-radius==1.0.1-1
 libnss-tacplus==1.0.4-1
@@ -189,6 +198,7 @@ libpam-tacplus==1.4.1-1
 libpcap0.8==1.10.3-1
 libpci3==1:3.9.0-4
 libpcre3==2:8.39-15
+libperl5.36==5.36.0-7+deb12u1
 libpgm-5.3-0==5.3.128~dfsg-2
 libpng16-16==1.6.39-2
 libpopt0==1.19+dfsg-1
@@ -218,10 +228,11 @@ libssl-dev==3.0.11-1~deb12u2
 libssl3==3.0.11-1~deb12u2
 libswsscommon==1.0.0
 libsysfs2==2.1.1-4
-libsystemd-shared==252.17-1~deb12u1
+libsystemd-shared==252.19-1~deb12u1
 libtac2==1.4.1-1
 libtcl8.6==8.6.13+dfsg-2
 libtirpc-common==1.3.3+ds-1
+libtirpc-dev==1.3.3+ds-1
 libtirpc3==1.3.3+ds-1
 libtsan2==12.2.0-14
 libubootenv-tool==0.3.2-1
@@ -231,16 +242,20 @@ libunwind8==1.6.2-3
 libusb-1.0-0==2:1.0.26-1
 libutempter0==1.2.1-3
 libwrap0==7.6.q-32
-libxencall1==4.17.1+2-gb773c48e36-1
-libxendevicemodel1==4.17.1+2-gb773c48e36-1
-libxenevtchn1==4.17.1+2-gb773c48e36-1
-libxenforeignmemory1==4.17.1+2-gb773c48e36-1
-libxengnttab1==4.17.1+2-gb773c48e36-1
-libxenhypfs1==4.17.1+2-gb773c48e36-1
-libxenmisc4.17==4.17.1+2-gb773c48e36-1
-libxenstore4==4.17.1+2-gb773c48e36-1
-libxentoolcore1==4.17.1+2-gb773c48e36-1
-libxentoollog1==4.17.1+2-gb773c48e36-1
+libxencall1==4.17.2+76-ge1f9cb16e2-1~deb12u1
+libxendevicemodel1==4.17.2+76-ge1f9cb16e2-1~deb12u1
+libxenevtchn1==4.17.2+76-ge1f9cb16e2-1~deb12u1
+libxenforeignmemory1==4.17.2+76-ge1f9cb16e2-1~deb12u1
+libxengnttab1==4.17.2+76-ge1f9cb16e2-1~deb12u1
+libxenhypfs1==4.17.2+76-ge1f9cb16e2-1~deb12u1
+libxenmisc4.17==4.17.2+76-ge1f9cb16e2-1~deb12u1
+libxenstore4==4.17.2+76-ge1f9cb16e2-1~deb12u1
+libxentoolcore1==4.17.2+76-ge1f9cb16e2-1~deb12u1
+libxentoollog1==4.17.2+76-ge1f9cb16e2-1~deb12u1
+libxml2==2.9.14+dfsg-1.3~deb12u1
+libxml2-dev==2.9.14+dfsg-1.3~deb12u1
+libxslt1-dev==1.1.35-1
+libxslt1.1==1.1.35-1
 libxtables12==1.8.9-2
 libyajl2==2.1.0-3+deb12u2
 libyaml-0-2==0.2.5-1
@@ -249,7 +264,9 @@ libyang-cpp==1.0.73
 libzmq5==4.3.4-6
 linux-base==4.9
 linux-image-6.1.0-11-2-amd64-unsigned==6.1.38-4
-linux-perf==6.1.55-1
+linux-image-6.1.0-11-2-arm64-unsigned==6.1.38-4
+linux-libc-dev==6.1.69-1
+linux-perf==6.1.69-1
 locales==2.36-9+deb12u3
 logrotate==3.21.0-1
 lsof==4.95.0-1
@@ -269,14 +286,20 @@ net-tools==2.10-0.1
 netbase==6.4
 netfilter-persistent==1.0.20
 ntp==1:4.2.8p15+dfsg-2~1.2.2+dfsg1-1+deb12u1
+ntpdate==1:4.2.8p15+dfsg-2~1.2.2+dfsg1-1+deb12u1
 ntpsec==1.2.2+dfsg1-1+deb12u1
+ntpsec-ntpdate==1.2.2+dfsg1-1+deb12u1
+ntpsec-ntpdig==1.2.2+dfsg1-1+deb12u1
 ntpstat==0.0.0.1-2+b1
+opennsl-modules==7.1.0.0
 openssh-client==1:9.2p1-2+deb12u1
 openssh-server==1:9.2p1-2+deb12u1
 openssh-sftp-server==1:9.2p1-2+deb12u1
 openssl==3.0.11-1~deb12u2
 pci.ids==0.0~2023.04.11-1
 pciutils==1:3.9.0-4
+perl==5.36.0-7+deb12u1
+perl-modules-5.36==5.36.0-7+deb12u1
 picocom==3.1-4
 pkgconf==1.8.1-1
 procps==2:4.0.2-3
@@ -311,6 +334,7 @@ python3.11-minimal==3.11.2-6
 rasdaemon==0.6.8-1.1
 readline-common==8.2-1.3
 resolvconf==1.91+nmu1
+rpcsvc-proto==1.4.3-1
 rsyslog==8.2302.0-1
 runit-helper==2.15.2
 sbsigntool==0.9.4-3.1
@@ -327,18 +351,19 @@ sonic-utilities-data==1.0-1
 sqlite3==3.40.1-2
 squashfs-tools==1:4.5.1-1
 sudo==1.9.13p3-1+deb12u1
+sx-kernel==1.mlnx.4.6.2134
 sysfsutils==2.1.1-4
 sysstat==12.6.1-1
-systemd==252.17-1~deb12u1
+systemd==252.19-1~deb12u1
 systemd-bootchart==234-2+b1
 systemd-sonic-generator==1.0.0
-systemd-sysv==252.17-1~deb12u1
+systemd-sysv==252.19-1~deb12u1
 tcpdump==4.99.3-1
 tcptraceroute==1.5beta7+debian-4.1+b1
 traceroute==1:2.1.2-1
 u-boot-tools==2023.01+dfsg-2
 ucf==3.0043+nmu1
-udev==252.17-1~deb12u1
+udev==252.19-1~deb12u1
 unzip==6.0-28
 usbutils==1:014-1
 vim==2:9.0.1378-2
@@ -346,5 +371,7 @@ vim-common==2:9.0.1378-2
 vim-runtime==2:9.0.1378-2
 x11-common==1:7.7+23
 xml-core==0.18+nmu1
+xxd==2:9.0.1378-2
 xz-utils==5.4.1-0.2
+zlib1g-dev==1:1.2.13.dfsg-1
 zstd==1.5.4+dfsg2-5
diff --git a/files/build/versions/host-image/versions-deb-bookworm-arm64 b/files/build/versions/host-image/versions-deb-bookworm-arm64
index 99c1b8152..d82ad8838 100644
--- a/files/build/versions/host-image/versions-deb-bookworm-arm64
+++ b/files/build/versions/host-image/versions-deb-bookworm-arm64
@@ -1,18 +1,3 @@
-binutils-aarch64-linux-gnu==2.40-2
-icu-devtools==72.1-3
-libc-dev-bin==2.36-9+deb12u3
-libc6-dev==2.36-9+deb12u3
-libhwasan0==12.2.0-14
-libicu-dev==72.1-3
-libicu72==72.1-3
-libnsl-dev==1.3.0-2
-libtirpc-dev==1.3.3+ds-1
-libxml2==2.9.14+dfsg-1.3~deb12u1
-libxml2-dev==2.9.14+dfsg-1.3~deb12u1
-libxslt1-dev==1.1.35-1
-libxslt1.1==1.1.35-1
-linux-image-6.1.0-11-2-arm64-unsigned==6.1.38-4
-linux-libc-dev==6.1.55-1
+mrvlprestera==1.0
 ntpstat==0.0.0.1-2
-rpcsvc-proto==1.4.3-1
-zlib1g-dev==1:1.2.13.dfsg-1
+tsingma-bsp==1.0
diff --git a/files/build/versions/host-image/versions-deb-bookworm-armhf b/files/build/versions/host-image/versions-deb-bookworm-armhf
index 96902736c..e4f4b1983 100644
--- a/files/build/versions/host-image/versions-deb-bookworm-armhf
+++ b/files/build/versions/host-image/versions-deb-bookworm-armhf
@@ -1,17 +1,4 @@
 binutils-arm-linux-gnueabihf==2.40-2
-icu-devtools==72.1-3
-libc-dev-bin==2.36-9+deb12u3
-libc6-dev==2.36-9+deb12u3
-libicu-dev==72.1-3
-libicu72==72.1-3
-libnsl-dev==1.3.0-2
-libtirpc-dev==1.3.3+ds-1
-libxml2==2.9.14+dfsg-1.3~deb12u1
-libxml2-dev==2.9.14+dfsg-1.3~deb12u1
-libxslt1-dev==1.1.35-1
-libxslt1.1==1.1.35-1
 linux-image-6.1.0-11-2-armmp==6.1.38-4
-linux-libc-dev==6.1.55-1
+mrvlprestera==1.0
 ntpstat==0.0.0.1-2
-rpcsvc-proto==1.4.3-1
-zlib1g-dev==1:1.2.13.dfsg-1
diff --git a/files/build/versions/host-image/versions-py3 b/files/build/versions/host-image/versions-py3
index 996c97950..68eb83d7a 100644
--- a/files/build/versions/host-image/versions-py3
+++ b/files/build/versions/host-image/versions-py3
@@ -4,21 +4,21 @@ azure-storage==0.36.0
 bcrypt==3.2.2
 bitarray==2.8.1
 blessed==1.20.0
-certifi==2023.7.22
+certifi==2023.11.17
 cffi==1.15.1
-charset-normalizer==3.2.0
+charset-normalizer==3.3.2
 click==7.0
 click-log==0.4.0
-colorful==0.5.5
-cryptography==3.3.2
+colorful==0.5.6
+cryptography==38.0.4
 dbus-python==1.3.2
 docker==6.1.1
 docker-image-py==0.1.12
-enlighten==1.12.0
-filelock==3.12.4
+enlighten==1.12.4
+filelock==3.13.1
 grpcio==1.51.1
 grpcio-tools==1.51.1
-idna==3.4
+idna==3.6
 ijson==3.2.3
 ipaddr==2.2.0
 ipaddress==1.0.23
@@ -28,7 +28,7 @@ jsondiff==2.0.0
 jsonpatch==1.33
 jsonpointer==2.4
 jsonschema==2.6.0
-lazy-object-proxy==1.9.0
+lazy-object-proxy==1.10.0
 lxml==4.9.1
 m2crypto==0.38.0
 markupsafe==2.1.2
@@ -36,23 +36,23 @@ natsort==6.2.1
 netaddr==0.8.0
 netifaces==0.11.0
 ntpsec==1.2.2
-packaging==23.1
+packaging==23.2
 paramiko==2.11.0
 pathtools==0.1.2
 perf==0.1
-pexpect==4.8.0
+pexpect==4.9.0
 pip==23.0.1
 ply==3.11
 prefixed==0.7.0
 prettyprinter==0.18.0
-protobuf==4.24.4
-psutil==5.9.5
+protobuf==4.25.2
+psutil==5.9.8
 ptyprocess==0.7.0
-pyang==2.5.3
+pyang==2.6.0
 pyangbind==0.8.2
-pycairo==1.25.0
+pycairo==1.25.1
 pycparser==2.21
-pygments==2.16.1
+pygments==2.17.2
 pygobject==3.46.0
 pynacl==1.5.0
 pyroute2==0.5.19
@@ -60,7 +60,7 @@ python-apt==2.6.0
 python-dateutil==2.8.2
 pyyaml==6.0.1
 redis==3.5.3
-regex==2023.10.3
+regex==2023.12.25
 requests==2.31.0
 scapy==2.4.4
 semantic-version==2.10.0
@@ -69,10 +69,10 @@ six==1.16.0
 systemd-python==235
 tabulate==0.9.0
 toposort==1.6
-urllib3==2.0.5
+urllib3==2.1.0
 watchdog==0.10.3
-wcwidth==0.2.8
-websocket-client==1.6.3
+wcwidth==0.2.13
+websocket-client==1.7.0
 wheel==0.38.4
 www-authenticate==0.9.2
 xmltodict==0.12.0
diff --git a/files/build/versions/host-image/versions-py3-all-armhf b/files/build/versions/host-image/versions-py3-all-armhf
deleted file mode 100644
index c7a414120..000000000
--- a/files/build/versions/host-image/versions-py3-all-armhf
+++ /dev/null
@@ -1,2 +0,0 @@
-filelock==3.13.0
-pycairo==1.25.1

From 1a838dda2f36e6892c5833cdb4d990b3ffcf338d Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Thu, 25 Jan 2024 16:34:54 +0800
Subject: [PATCH 0185/1115] [submodule] Update submodule sonic-gnmi to the
 latest HEAD automatically (#17896)

#### Why I did it
src/sonic-gnmi
```
* 2c862b8 - (HEAD -> master, origin/master, origin/HEAD) Merge pull request #184 from abdosi/master (9 hours ago) [Rita Hui]
* 1d7f24c - Fix (4 days ago) [Abhishek Dosi]
* eda628c - Fix (4 days ago) [Abhishek Dosi]
* e37da40 - Fix Compile Error (4 days ago) [Abhishek Dosi]
* 22d0d0f - Update db_client.go (5 days ago) [abdosi]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-gnmi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-gnmi b/src/sonic-gnmi
index 07a64ab46..2c862b82e 160000
--- a/src/sonic-gnmi
+++ b/src/sonic-gnmi
@@ -1 +1 @@
-Subproject commit 07a64ab46d0713ac7d2ad640cc99461b40fa6d7c
+Subproject commit 2c862b82eff557cbc19cfeb5724542487c89e0b3

From 001668e34a4e95fe62c77342a463c8632fffd9f7 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Thu, 25 Jan 2024 16:34:58 +0800
Subject: [PATCH 0186/1115] [submodule] Update submodule sonic-swss to the
 latest HEAD automatically (#17889)

#### Why I did it
src/sonic-swss
```
* 41330abf - (HEAD -> master, origin/master, origin/HEAD) [Build] Support to collect the test coverage in cobertura format (#3019) (33 hours ago) [xumia]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-swss | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-swss b/src/sonic-swss
index 09ffb25d8..41330abf9 160000
--- a/src/sonic-swss
+++ b/src/sonic-swss
@@ -1 +1 @@
-Subproject commit 09ffb25d8746495342a7c433a30c3a8c5326e643
+Subproject commit 41330abf944bffd41e7b15e9df84ee4d44e30bd2

From fb2c3cdf14226b8387beeba5eeea163be2c2dbc0 Mon Sep 17 00:00:00 2001
From: Liu Shilong <shilongliu@microsoft.com>
Date: Thu, 25 Jan 2024 19:00:04 +0800
Subject: [PATCH 0187/1115] [ci] Use correct branch when downloading SONiC vs
 image in elastic test. (#17873)

Why I did it
Use dynamic variable for branch reference.

Work item tracking
Microsoft ADO (number only): 26563706
How I did it
How to verify it
---
 azure-pipelines.yml | 20 ++++++++++++--------
 1 file changed, 12 insertions(+), 8 deletions(-)

diff --git a/azure-pipelines.yml b/azure-pipelines.yml
index ca780398c..ed8632203 100644
--- a/azure-pipelines.yml
+++ b/azure-pipelines.yml
@@ -43,6 +43,11 @@ variables:
   value: rcache
 - name: ENABLE_FIPS
   value: n
+- name: BUILD_BRANCH
+  ${{ if eq(variables['Build.Reason'], 'PullRequest') }}:
+    value: $(System.PullRequest.TargetBranch)
+  ${{ else }}:
+    value: $(Build.SourceBranchName)
 
 stages:
 - stage: BuildVS
@@ -166,7 +171,7 @@ stages:
         TOPOLOGY: t0
         MIN_WORKER: $(T0_INSTANCE_NUM)
         MAX_WORKER: $(T0_INSTANCE_NUM)
-        MGMT_BRANCH: "master"
+        MGMT_BRANCH: $(BUILD_BRANCH)
 
   - job: t0_2vlans_elastictest
     pool: ubuntu-20.04
@@ -180,7 +185,7 @@ stages:
         TEST_SET: t0-2vlans
         MIN_WORKER: $(T0_2VLANS_INSTANCE_NUM)
         MAX_WORKER: $(T0_2VLANS_INSTANCE_NUM)
-        MGMT_BRANCH: "master"
+        MGMT_BRANCH: $(BUILD_BRANCH)
         DEPLOY_MG_EXTRA_PARAMS: "-e vlan_config=two_vlan_a"
 
   - job: t1_lag_elastictest
@@ -194,7 +199,7 @@ stages:
         TOPOLOGY: t1-lag
         MIN_WORKER: $(T1_LAG_INSTANCE_NUM)
         MAX_WORKER: $(T1_LAG_INSTANCE_NUM)
-        MGMT_BRANCH: "master"
+        MGMT_BRANCH: $(BUILD_BRANCH)
 
   - job: multi_asic_elastictest
     displayName: "kvmtest-multi-asic-t1-lag by Elastictest"
@@ -209,7 +214,7 @@ stages:
           MIN_WORKER: $(MULTI_ASIC_INSTANCE_NUM)
           MAX_WORKER: $(MULTI_ASIC_INSTANCE_NUM)
           NUM_ASIC: 4
-          MGMT_BRANCH: "master"
+          MGMT_BRANCH: $(BUILD_BRANCH)
 
   - job: dualtor_elastictest
     pool: ubuntu-20.04
@@ -222,7 +227,7 @@ stages:
           TOPOLOGY: dualtor
           MIN_WORKER: $(T0_DUALTOR_INSTANCE_NUM)
           MAX_WORKER: $(T0_DUALTOR_INSTANCE_NUM)
-          MGMT_BRANCH: "master"
+          MGMT_BRANCH: $(BUILD_BRANCH)
           COMMON_EXTRA_PARAMS: "--disable_loganalyzer "
 
   - job: sonic_t0_elastictest
@@ -237,7 +242,7 @@ stages:
           MIN_WORKER: $(T0_SONIC_INSTANCE_NUM)
           MAX_WORKER: $(T0_SONIC_INSTANCE_NUM)
           TEST_SET: t0-sonic
-          MGMT_BRANCH: "master"
+          MGMT_BRANCH: $(BUILD_BRANCH)
           COMMON_EXTRA_PARAMS: "--neighbor_type=sonic "
           VM_TYPE: vsonic
 
@@ -252,8 +257,7 @@ stages:
           TOPOLOGY: dpu
           MIN_WORKER: $(T0_SONIC_INSTANCE_NUM)
           MAX_WORKER: $(T0_SONIC_INSTANCE_NUM)
-          KVM_IMAGE_BRANCH: "master"
-          MGMT_BRANCH: "master"
+          MGMT_BRANCH: $(BUILD_BRANCH)
 
 
 #  - job: wan_elastictest

From b557488608908c6c0f74c5ef264dcece9cb9a5c3 Mon Sep 17 00:00:00 2001
From: Zain Budhwani <99770260+zbud-msft@users.noreply.github.com>
Date: Thu, 25 Jan 2024 17:14:21 -0800
Subject: [PATCH 0188/1115] Remove echo log to /tmp/{$SERVICE}-debug.log in
 service_mgmt.sh (#17838)

### Why I did it

Unnecessary for logs to be written out to /tmp/${SERVICE}-debug.log as they are already being written to syslog. Therefore, removing writing to a new log in concern for memory space and not being able to startup some services in RO state.

##### Work item tracking
- Microsoft ADO **(number only)**:26458976

#### How I did it

Remove DEBUGLOG definition and line that echo's message to mentioned log file.

#### How to verify it

Manually verified, /tmp/${SERVICE}-debug.log files do not exist and log for service starting still appears in syslog
---
 files/scripts/service_mgmt.sh | 2 --
 1 file changed, 2 deletions(-)

diff --git a/files/scripts/service_mgmt.sh b/files/scripts/service_mgmt.sh
index a3709bf2b..6a038c0a3 100755
--- a/files/scripts/service_mgmt.sh
+++ b/files/scripts/service_mgmt.sh
@@ -3,7 +3,6 @@
 function debug()
 {
     /usr/bin/logger $1
-    /bin/echo `date` "- $1" >> ${DEBUGLOG}
 }
 
 function check_warm_boot()
@@ -87,7 +86,6 @@ DEV=$2
 
 SCRIPT_NAME=$(basename -- "$0")
 SERVICE="${SCRIPT_NAME%.*}"
-DEBUGLOG="/tmp/$SERVICE-debug$DEV.log"
 NAMESPACE_PREFIX="asic"
 if [ "$DEV" ]; then
     NET_NS="$NAMESPACE_PREFIX$DEV" #name of the network namespace

From d712861634df8687520a604d7b50dc0e2b9e12f4 Mon Sep 17 00:00:00 2001
From: Hua Liu <58683130+liuh-80@users.noreply.github.com>
Date: Fri, 26 Jan 2024 16:00:00 +0800
Subject: [PATCH 0189/1115] [TACACS] Fix when set TACACS to "tacacs+, local"
 user can run blocked command with local permission issue. (#17749)

Fix when set TACACS to "tacacs+, local" user can run blocked command with local permission issue.

#### Why I did it
When set TACACS to "tacacs+, local", user still can run a blocked command with local permission.

##### Work item tracking
- Microsoft ADO: 26399545

#### How I did it
Fix code to reject command when authorized failed from TACACS server side.

#### How to verify it
Pass all UT.

### Description for the changelog
Fix when set TACACS to "tacacs+, local" user can run blocked command with local permission issue.
---
 src/tacacs/bash_tacplus/bash_tacplus.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/src/tacacs/bash_tacplus/bash_tacplus.c b/src/tacacs/bash_tacplus/bash_tacplus.c
index 6e72e8f0a..169d6bec3 100644
--- a/src/tacacs/bash_tacplus/bash_tacplus.c
+++ b/src/tacacs/bash_tacplus/bash_tacplus.c
@@ -471,8 +471,9 @@ int on_shell_execve (char *user, int shell_level, char *cmd, char **argv)
                 fprintf(stdout, "%s not authorized by TACACS+ with given arguments, not executing\n", cmd);
             break;
             default:
+                // when command reject by server, authorization will failed immediately
                 fprintf(stdout, "%s authorize failed by TACACS+ with given arguments, not executing\n", cmd);
-            break;
+                return ret;
         }
 
         if ((tacacs_ctrl & AUTHORIZATION_FLAG_LOCAL) == 0) {

From bdb24676eb8c4430a96521aa9484fe75aa79ee64 Mon Sep 17 00:00:00 2001
From: Hua Liu <58683130+liuh-80@users.noreply.github.com>
Date: Fri, 26 Jan 2024 16:01:50 +0800
Subject: [PATCH 0190/1115] Change orchagent stuck message from ERR to WARNING
 (#17872)

Change orchagent stuck message from ERR to WARNING

#### Why I did it
During switch initialization, sometime Orchagent will busy for more than 40seconds and will trigger process stuck workdog error.
To improve this issue, change watchdog error message to warning message.

##### Work item tracking
- Microsoft ADO: 26517622

#### How I did it
Change orchagent stuck message from ERR to WARNING.

#### How to verify it
Pass all UT.

### Description for the changelog
Change orchagent stuck message from ERR to WARNING.
---
 files/scripts/supervisor-proc-exit-listener | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/files/scripts/supervisor-proc-exit-listener b/files/scripts/supervisor-proc-exit-listener
index 61c12d8ce..8628826e6 100755
--- a/files/scripts/supervisor-proc-exit-listener
+++ b/files/scripts/supervisor-proc-exit-listener
@@ -73,7 +73,7 @@ def get_group_and_process_list(process_file):
     return group_list, process_list
 
 
-def generate_alerting_message(process_name, status, dead_minutes):
+def generate_alerting_message(process_name, status, dead_minutes, priority=syslog.LOG_ERR):
     """
     @summary: If a critical process was not running, this function will determine it resides in host
               or in a specific namespace. Then an alerting message will be written into syslog.
@@ -86,7 +86,7 @@ def generate_alerting_message(process_name, status, dead_minutes):
     else:
         namespace = namespace_prefix + namespace_id
 
-    syslog.syslog(syslog.LOG_ERR, "Process '{}' is {} in namespace '{}' ({} minutes)."
+    syslog.syslog(priority, "Process '{}' is {} in namespace '{}' ({} minutes)."
                   .format(process_name, status, namespace, dead_minutes))
 
 
@@ -213,7 +213,7 @@ def main(argv):
             elapsed_secs = epoch_time - process_heart_beat_info[process]["last_heart_beat"]
             if elapsed_secs >= ALERTING_INTERVAL_SECS:
                 elapsed_mins = elapsed_secs // 60
-                generate_alerting_message(process, "stuck", elapsed_mins)
+                generate_alerting_message(process, "stuck", elapsed_mins, syslog.LOG_WARNING)
 
 if __name__ == "__main__":
     main(sys.argv[1:])
\ No newline at end of file

From 4e6a128369875a7688237962acf65b08c50f2dfe Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Fri, 26 Jan 2024 16:33:27 +0800
Subject: [PATCH 0191/1115] [submodule] Update submodule sonic-utilities to the
 latest HEAD automatically (#17911)

#### Why I did it
src/sonic-utilities
```
* b3d856bf - (HEAD -> master, origin/master, origin/HEAD) Add all SKUs to the generic config update list (#3131) (7 hours ago) [Stephen Sun]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-utilities | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-utilities b/src/sonic-utilities
index 942a7c9e3..b3d856bf4 160000
--- a/src/sonic-utilities
+++ b/src/sonic-utilities
@@ -1 +1 @@
-Subproject commit 942a7c9e3d68a7a881824416d0aa4a47d50bf958
+Subproject commit b3d856bf49dff209c48705e635720b740ccad42e

From 12f6d8535208b5d1dcfb8186063e07b3b4e4f9bc Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Fri, 26 Jan 2024 16:33:31 +0800
Subject: [PATCH 0192/1115] [submodule] Update submodule sonic-swss-common to
 the latest HEAD automatically (#17910)

#### Why I did it
src/sonic-swss-common
```
* e4db436 - (HEAD -> master, origin/master, origin/HEAD) [schema] Add SAG table for static anycast gateway (#540) (8 hours ago) [Jimi Chen]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-swss-common | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-swss-common b/src/sonic-swss-common
index ad4d38670..e4db43672 160000
--- a/src/sonic-swss-common
+++ b/src/sonic-swss-common
@@ -1 +1 @@
-Subproject commit ad4d3867050c4d13f9cc4ffaca8919bd7ab3f6b4
+Subproject commit e4db4367245659bce386a568512248ea54c34172

From c798ea8e08138ad94457687f9dff3866fb9381de Mon Sep 17 00:00:00 2001
From: ganglv <88995770+ganglyu@users.noreply.github.com>
Date: Sat, 27 Jan 2024 01:31:09 +0800
Subject: [PATCH 0193/1115] Change tcp port range to support telemetry and gnmi
 (#17907)

* Reserve tcp port for telemetry and gnmi

* Use ip_local_port_range instead

* Fix sysctl config
---
 files/image_config/sysctl/sysctl-net.conf | 1 +
 1 file changed, 1 insertion(+)

diff --git a/files/image_config/sysctl/sysctl-net.conf b/files/image_config/sysctl/sysctl-net.conf
index 3e7c08112..7946d2c86 100644
--- a/files/image_config/sysctl/sysctl-net.conf
+++ b/files/image_config/sysctl/sysctl-net.conf
@@ -15,6 +15,7 @@ net.ipv4.conf.all.arp_announce=1
 net.ipv4.conf.all.arp_filter=0
 net.ipv4.conf.all.arp_notify=1
 net.ipv4.conf.all.arp_ignore=2
+net.ipv4.ip_local_port_range="32768 50001"
 net.ipv4.neigh.default.base_reachable_time_ms=1800000
 net.ipv6.neigh.default.base_reachable_time_ms=1800000
 net.ipv4.neigh.default.gc_thresh1=1024

From e8b17220055d4cfd71fcc34d1d7215aaa750500d Mon Sep 17 00:00:00 2001
From: Mai Bui <maibui@microsoft.com>
Date: Fri, 26 Jan 2024 13:43:35 -0500
Subject: [PATCH 0194/1115] [docker-nat] limit privileged flag for nat
 container (#17756)

### Why I did it
HLD implementation: Container Hardening (https://github.com/sonic-net/SONiC/pull/1364)
### How I did it
Reduce linux capabilities in privileged flag

#### How to verify it
Check container's settings: Privileged is false and container only has default Linux caps, does not have extended caps.
```
admin@vlab-01:~$ docker inspect nat | grep Privi
            "Privileged": false,


admin@vlab-01:~$ docker exec -it nat bash
root@vlab-01:/# capsh --print
Current: cap_chown,cap_dac_override,cap_fowner,cap_fsetid,cap_kill,cap_setgid,cap_setuid,cap_setpcap,cap_net_bind_service,cap_net_raw,cap_sys_chroot,cap_mknod,cap_audit_write,cap_setfcap=ep
```
---
 rules/docker-nat.mk | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/rules/docker-nat.mk b/rules/docker-nat.mk
index f4022547f..0298ace83 100644
--- a/rules/docker-nat.mk
+++ b/rules/docker-nat.mk
@@ -29,7 +29,7 @@ SONIC_INSTALL_DOCKER_DBG_IMAGES += $(DOCKER_NAT_DBG)
 endif
 
 $(DOCKER_NAT)_CONTAINER_NAME = nat
-$(DOCKER_NAT)_RUN_OPT += --privileged -t
+$(DOCKER_NAT)_RUN_OPT += -t --cap-add=NET_ADMIN
 $(DOCKER_NAT)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro
 $(DOCKER_NAT)_RUN_OPT += -v /etc/timezone:/etc/timezone:ro 
 $(DOCKER_NAT)_RUN_OPT += -v /host/warmboot:/var/warmboot

From 88f80fbe08dd0f9373febfca5e0012f470522910 Mon Sep 17 00:00:00 2001
From: Rida Hanif <61490193+ridahanif96@users.noreply.github.com>
Date: Sat, 27 Jan 2024 00:19:08 +0500
Subject: [PATCH 0195/1115] Switchport Modes Port & Port Channel Yang Model
 Configurations (#13580)

### Why I did it

-  Modified "sonic-port.yang" for adding support in Port Yang model for the "mode" attribute for adding port modes

- Modified "sonic-portchannel.yang" for adding support in Port Channel Yang model for the "mode" attribute for adding port modes

- Updated tests for these modifications

#### How to verify it

-  Added support to align SONiC yang with Config_db
---
 .../tests/files/sample_config_db.json         | 135 ++++++++++++------
 .../tests/yang_model_tests/tests/port.json    |   5 +
 .../yang_model_tests/tests/portchannel.json   |   5 +
 .../tests_config/dhcp_server_ipv4.json        |  24 ++--
 .../tests_config/dhcpv6_relay.json            |   3 +-
 .../tests_config/interface.json               |  27 ++--
 .../yang_model_tests/tests_config/mclag.json  |  25 ++--
 .../yang_model_tests/tests_config/port.json   |  57 ++++++--
 .../tests_config/portchannel.json             |  65 ++++++---
 .../yang_model_tests/tests_config/vlan.json   |  15 +-
 .../yang-models/sonic-port.yang               |   6 +
 .../yang-models/sonic-portchannel.yang        |   7 +
 .../yang-templates/sonic-types.yang.j2        |   8 ++
 13 files changed, 276 insertions(+), 106 deletions(-)

diff --git a/src/sonic-yang-models/tests/files/sample_config_db.json b/src/sonic-yang-models/tests/files/sample_config_db.json
index e0fa7631e..8fc127b2c 100644
--- a/src/sonic-yang-models/tests/files/sample_config_db.json
+++ b/src/sonic-yang-models/tests/files/sample_config_db.json
@@ -88,21 +88,24 @@
                 "min_links": "1",
                 "tpid": "0x8100",
                 "mtu": "9100",
-                "lacp_key": "auto"
+                "lacp_key": "auto",
+                "mode":"trunk"
             },
             "PortChannel0004": {
                 "admin_status": "up",
                 "min_links": "1",
                 "tpid": "0x9200",
                 "mtu": "9100",
-                "lacp_key": "auto"
+                "lacp_key": "auto",
+                "mode":"routed"
             },
             "PortChannel2": {
                 "admin_status": "up",
                 "min_links": "1",
                 "tpid": "0x9200",
                 "mtu": "9100",
-                "lacp_key": "auto"
+                "lacp_key": "auto",
+                "mode":"trunk"
             },
             "PortChannel42": {
                 "admin_status": "up",
@@ -110,7 +113,8 @@
                 "mtu": "9100",
                 "tpid": "0x8100",
                 "fast_rate": "false",
-                "fallback" : "true"
+                "fallback" : "true",
+                "mode":"routed"
             }
         },
         "PORTCHANNEL_INTERFACE": {
@@ -572,7 +576,8 @@
                 "macsec": "test",
                 "link_training": "off",
                 "laser_freq": "191600",
-                "tx_power": "-26.6"
+                "tx_power": "-26.6",
+                "mode":"trunk"
             },
             "Ethernet1": {
                 "alias": "Eth1/2",
@@ -586,7 +591,8 @@
                 "adv_interface_types": "CR,CR4",
                 "link_training": "on",
                 "laser_freq": "191300",
-                "tx_power": "-27.3"
+                "tx_power": "-27.3",
+                "mode":"trunk"
             },
             "Ethernet2": {
                 "alias": "Eth1/3",
@@ -598,7 +604,8 @@
                 "autoneg": "on",
                 "adv_speeds": "all",
                 "adv_interface_types": "all",
-                "subport" : "0"
+                "subport" : "0",
+                "mode":"trunk"
             },
             "Ethernet3": {
                 "alias": "Eth1/4",
@@ -607,7 +614,8 @@
                 "speed": "11100",
                 "tpid": "0x88A8",
                 "admin_status": "up",
-                "subport": "1"
+                "subport": "1",
+                "mode":"trunk"
             },
             "Ethernet4": {
                 "alias": "Eth2/1",
@@ -616,7 +624,8 @@
                 "speed": "11100",
                 "tpid": "0x9100",
                 "admin_status": "up",
-                "subport": "2"
+                "subport": "2",
+                "mode":"trunk"
             },
             "Ethernet5": {
                 "alias": "Eth2/2",
@@ -625,7 +634,8 @@
                 "speed": "11100",
                 "tpid": "0x9200",
                 "admin_status": "up",
-                "subport": "3"
+                "subport": "3",
+                "mode":"trunk"
             },
             "Ethernet6": {
                 "alias": "Eth2/3",
@@ -634,7 +644,8 @@
                 "speed": "11100",
                 "tpid": "0x8100",
                 "admin_status": "up",
-                "subport": "4"
+                "subport": "4",
+                "mode":"trunk"
             },
             "Ethernet7": {
                 "alias": "Eth2/4",
@@ -643,7 +654,8 @@
                 "speed": "11100",
                 "tpid": "0x8100",
                 "admin_status": "up",
-                "subport": "5"
+                "subport": "5",
+                "mode":"routed"
             },
             "Ethernet8": {
                 "alias": "Eth3/1",
@@ -652,7 +664,8 @@
                 "speed": "11100",
                 "tpid": "0x8100",
                 "admin_status": "up",
-                "subport": "6"
+                "subport": "6",
+                "mode":"routed"
             },
             "Ethernet9": {
                 "alias": "Eth3/2",
@@ -661,7 +674,8 @@
                 "speed": "11100",
                 "tpid": "0x8100",
                 "admin_status": "up",
-                "subport": "7"
+                "subport": "7",
+                "mode":"routed"
             },
             "Ethernet10": {
                 "alias": "Eth3/3",
@@ -670,7 +684,8 @@
                 "speed": "11100",
                 "tpid": "0x8100",
                 "admin_status": "up",
-                "subport": "8"
+                "subport": "8",
+                "mode":"routed"
             },
             "Ethernet11": {
                 "alias": "Eth3/4",
@@ -678,7 +693,8 @@
                 "description": "",
                 "speed": "11100",
                 "tpid": "0x8100",
-                "admin_status": "up"
+                "admin_status": "up",
+                "mode":"routed"
             },
             "Ethernet12": {
                 "alias": "Eth4/1",
@@ -686,7 +702,8 @@
                 "description": "",
                 "speed": "11100",
                 "tpid": "0x8100",
-                "admin_status": "up"
+                "admin_status": "up",
+                "mode":"routed"
             },
             "Ethernet13": {
                 "alias": "Eth4/2",
@@ -694,7 +711,8 @@
                 "description": "",
                 "speed": "11100",
                 "tpid": "0x8100",
-                "admin_status": "up"
+                "admin_status": "up",
+                "mode":"routed"
             },
             "Ethernet14": {
                 "alias": "Eth4/3",
@@ -702,7 +720,8 @@
                 "description": "",
                 "speed": "11100",
                 "tpid": "0x8100",
-                "admin_status": "up"
+                "admin_status": "up",
+                "mode":"routed"
             },
             "Ethernet15": {
                 "alias": "Eth4/4",
@@ -710,7 +729,8 @@
                 "description": "",
                 "speed": "11100",
                 "tpid": "0x8100",
-                "admin_status": "up"
+                "admin_status": "up",
+                "mode":"routed"
             },
             "Ethernet16": {
                 "alias": "Eth5/1",
@@ -718,7 +738,8 @@
                 "description": "",
                 "speed": "11100",
                 "tpid": "0x8100",
-                "admin_status": "up"
+                "admin_status": "up",
+                "mode":"routed"
             },
             "Ethernet17": {
                 "alias": "Eth5/2",
@@ -726,7 +747,8 @@
                 "description": "",
                 "speed": "11100",
                 "tpid": "0x8100",
-                "admin_status": "up"
+                "admin_status": "up",
+                "mode":"routed"
             },
             "Ethernet18": {
                 "alias": "Eth5/3",
@@ -734,7 +756,8 @@
                 "description": "",
                 "speed": "11100",
                 "tpid": "0x8100",
-                "admin_status": "up"
+                "admin_status": "up",
+                "mode":"routed"
             },
             "Ethernet19": {
                 "alias": "Eth5/4",
@@ -742,7 +765,8 @@
                 "description": "",
                 "speed": "11100",
                 "tpid": "0x8100",
-                "admin_status": "up"
+                "admin_status": "up",
+                "mode":"routed"
             },
             "Ethernet20": {
                 "alias": "Eth6/1",
@@ -750,7 +774,8 @@
                 "description": "",
                 "speed": "11100",
                 "tpid": "0x8100",
-                "admin_status": "up"
+                "admin_status": "up",
+                "mode":"routed"
             },
             "Ethernet21": {
                 "alias": "Eth6/2",
@@ -758,7 +783,8 @@
                 "description": "",
                 "speed": "11100",
                 "tpid": "0x8100",
-                "admin_status": "up"
+                "admin_status": "up",
+                "mode":"routed"
             },
             "Ethernet22": {
                 "alias": "Eth6/3",
@@ -766,7 +792,8 @@
                 "description": "",
                 "speed": "11100",
                 "tpid": "0x8100",
-                "admin_status": "up"
+                "admin_status": "up",
+                "mode":"routed"
             },
             "Ethernet23": {
                 "alias": "Eth6/4",
@@ -774,7 +801,8 @@
                 "description": "",
                 "speed": "11100",
                 "tpid": "0x8100",
-                "admin_status": "up"
+                "admin_status": "up",
+                "mode":"routed"
             },
             "Ethernet24": {
                 "alias": "Eth7/1",
@@ -782,7 +810,8 @@
                 "description": "",
                 "speed": "11100",
                 "tpid": "0x8100",
-                "admin_status": "up"
+                "admin_status": "up",
+                "mode":"routed"
             },
             "Ethernet25": {
                 "alias": "Eth7/2",
@@ -790,7 +819,8 @@
                 "description": "",
                 "speed": "11100",
                 "tpid": "0x8100",
-                "admin_status": "up"
+                "admin_status": "up",
+                "mode":"routed"
             },
             "Ethernet26": {
                 "alias": "Eth7/3",
@@ -798,7 +828,8 @@
                 "description": "",
                 "speed": "11100",
                 "tpid": "0x8100",
-                "admin_status": "up"
+                "admin_status": "up",
+                "mode":"routed"
             },
             "Ethernet27": {
                 "alias": "Eth7/4",
@@ -806,7 +837,8 @@
                 "description": "",
                 "speed": "11100",
                 "tpid": "0x8100",
-                "admin_status": "up"
+                "admin_status": "up",
+                "mode":"routed"
             },
             "Ethernet28": {
                 "alias": "Eth8/1",
@@ -814,7 +846,8 @@
                 "description": "",
                 "speed": "11100",
                 "tpid": "0x8100",
-                "admin_status": "up"
+                "admin_status": "up",
+                "mode":"routed"
             },
             "Ethernet29": {
                 "alias": "Eth8/2",
@@ -822,7 +855,8 @@
                 "description": "",
                 "speed": "11100",
                 "tpid": "0x8100",
-                "admin_status": "up"
+                "admin_status": "up",
+                "mode":"trunk"
             },
             "Ethernet30": {
                 "alias": "Eth8/3",
@@ -830,7 +864,8 @@
                 "description": "",
                 "speed": "11100",
                 "tpid": "0x8100",
-                "admin_status": "up"
+                "admin_status": "up",
+                "mode":"trunk"
             },
             "Ethernet31": {
                 "alias": "Eth8/4",
@@ -838,7 +873,8 @@
                 "description": "",
                 "speed": "11100",
                 "tpid": "0x8100",
-                "admin_status": "up"
+                "admin_status": "up",
+                "mode":"trunk"
             },
             "Ethernet32": {
                 "alias": "Eth9/1",
@@ -846,7 +882,8 @@
                 "description": "",
                 "speed": "11100",
                 "tpid": "0x8100",
-                "admin_status": "up"
+                "admin_status": "up",
+                "mode":"trunk"
             },
             "Ethernet33": {
                 "alias": "Eth9/2",
@@ -854,7 +891,8 @@
                 "description": "",
                 "speed": "11100",
                 "tpid": "0x8100",
-                "admin_status": "up"
+                "admin_status": "up",
+                "mode":"trunk"
             },
             "Ethernet34": {
                 "alias": "Eth9/3",
@@ -862,7 +900,8 @@
                 "description": "",
                 "speed": "11100",
                 "tpid": "0x8100",
-                "admin_status": "up"
+                "admin_status": "up",
+                "mode":"trunk"
             },
             "Ethernet35": {
                 "alias": "Eth9/4",
@@ -870,7 +909,8 @@
                 "description": "",
                 "speed": "11100",
                 "tpid": "0x8100",
-                "admin_status": "up"
+                "admin_status": "up",
+                "mode":"trunk"
             },
             "Ethernet36": {
                 "alias": "Eth10/1",
@@ -878,7 +918,8 @@
                 "description": "",
                 "speed": "11100",
                 "tpid": "0x8100",
-                "admin_status": "up"
+                "admin_status": "up",
+                "mode":"trunk"
             },
             "Ethernet112": {
                 "alias": "Eth29/1",
@@ -887,7 +928,8 @@
                 "fec": "fc",
                 "speed": "11100",
                 "tpid": "0x8100",
-                "admin_status": "up"
+                "admin_status": "up",
+                "mode":"routed"
             },
             "Ethernet120": {
                 "alias": "Eth31/1",
@@ -896,7 +938,8 @@
                 "fec": "auto",
                 "speed": "11100",
                 "tpid": "0x8100",
-                "admin_status": "up"
+                "admin_status": "up",
+                "mode":"routed"
             },
             "Ethernet-BP0": {
                 "admin_status": "up",
@@ -909,7 +952,8 @@
                 "pfc_asym": "off",
                 "role": "Int",
                 "speed": "40000",
-                "tpid": "0x8100"
+                "tpid": "0x8100",
+                "mode":"routed"
             },
             "Ethernet-BP4": {
                 "admin_status": "up",
@@ -922,7 +966,8 @@
                 "pfc_asym": "off",
                 "role": "Int",
                 "speed": "40000",
-                "tpid": "0x8100"
+                "tpid": "0x8100",
+                "mode":"routed"
             }
         },
         "LOGGER": {
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/port.json b/src/sonic-yang-models/tests/yang_model_tests/tests/port.json
index cffa5bac6..38c2b27cb 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests/port.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests/port.json
@@ -19,6 +19,11 @@
     "PORT_VALID_MTU_TEST_2": {
         "desc": "PORT_VALID_MTU_TEST_2 no failure."
     },
+    "PORT_INVLAID_MODE_TEST": {
+        "desc": "PORT_INVLAID_MODE_TEST invalid mode failure.",
+        "eStrKey" : "Pattern",
+        "eStr": ["routed|access|trunk"]
+    },
     "PORT_VALID_AUTONEG_TEST_1": {
         "desc": "PORT_VALID_AUTONEG_TEST_1 no failure."
     },
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/portchannel.json b/src/sonic-yang-models/tests/yang_model_tests/tests/portchannel.json
index c44ffef29..b2044e02d 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests/portchannel.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests/portchannel.json
@@ -19,6 +19,11 @@
         "eStrKey" : "Pattern",
         "eStr": ["0x8100|0x9100|0x9200|0x88a8|0x88A8"]
     },
+    "PORT_CHANNEL_INVALID_MODE": {
+        "desc": "INCORRECT VALUE OF MODE IN PORT_CHANNEL TABLE.",
+        "eStrKey" : "Pattern",
+        "eStr": ["routed|access|trunk"]
+    },
     "PORT_CHANNEL_INVALID_FALLBACK": {
         "desc": "INCORRECT PORTCHANNEL FALLBACK IN PORT_CHANNEL TABLE.",
         "eStrKey" : "Pattern",
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/dhcp_server_ipv4.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/dhcp_server_ipv4.json
index 3991c9317..8ee25a164 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/dhcp_server_ipv4.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/dhcp_server_ipv4.json
@@ -28,7 +28,8 @@
                         "mtu": 9000,
                         "lanes": "1",
                         "name": "Ethernet0",
-                        "speed": 25000
+                        "speed": 25000,
+                        "mode" : "trunk"
                     }
                 ]
             }
@@ -244,7 +245,8 @@
                         "mtu": 9000,
                         "lanes": "1",
                         "name": "Ethernet0",
-                        "speed": 25000
+                        "speed": 25000,
+                        "mode" : "trunk"
                     }
                 ]
             }
@@ -433,7 +435,8 @@
                         "mtu": 9000,
                         "lanes": "1",
                         "name": "Ethernet0",
-                        "speed": 25000
+                        "speed": 25000,
+                        "mode" : "trunk"
                     }
                 ]
             }
@@ -498,7 +501,8 @@
                         "mtu": 9000,
                         "lanes": "1",
                         "name": "Ethernet0",
-                        "speed": 25000
+                        "speed": 25000,
+                        "mode" : "trunk"
                     }
                 ]
             }
@@ -579,7 +583,8 @@
                         "mtu": 9000,
                         "lanes": "1",
                         "name": "Ethernet0",
-                        "speed": 25000
+                        "speed": 25000,
+                        "mode" : "trunk"
                     }
                 ]
             }
@@ -660,7 +665,8 @@
                         "mtu": 9000,
                         "lanes": "1",
                         "name": "Ethernet0",
-                        "speed": 25000
+                        "speed": 25000,
+                        "mode" : "trunk"
                     }
                 ]
             }
@@ -741,7 +747,8 @@
                         "mtu": 9000,
                         "lanes": "1",
                         "name": "Ethernet0",
-                        "speed": 25000
+                        "speed": 25000,
+                        "mode" : "trunk"
                     }
                 ]
             }
@@ -822,7 +829,8 @@
                         "mtu": 9000,
                         "lanes": "1",
                         "name": "Ethernet0",
-                        "speed": 25000
+                        "speed": 25000,
+                        "mode" : "trunk"
                     }
                 ]
             }
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/dhcpv6_relay.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/dhcpv6_relay.json
index 3a8dc377c..0547b06fb 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/dhcpv6_relay.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/dhcpv6_relay.json
@@ -24,7 +24,8 @@
                         "mtu": 9000,
                         "lanes": "1",
                         "name": "Ethernet0",
-                        "speed": 25000
+                        "speed": 25000,
+                        "mode":"trunk"
                     }
                 ]
             }
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/interface.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/interface.json
index b0b9fdb68..03f96de28 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/interface.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/interface.json
@@ -27,7 +27,8 @@
                         "lanes": "65",
                         "mtu": 9000,
                         "name": "Ethernet8",
-                        "speed": 25000
+                        "speed": 25000,
+                        "mode":"trunk"
                     },
                     {
                         "admin_status": "up",
@@ -36,7 +37,8 @@
                         "lanes": "71",
                         "mtu": 9000,
                         "name": "Ethernet9",
-                        "speed": 25000
+                        "speed": 25000,
+                        "mode":"trunk"
                     }
                 ]
             }
@@ -71,7 +73,8 @@
                         "lanes": "65",
                         "mtu": 9000,
                         "name": "Ethernet8",
-                        "speed": 25000
+                        "speed": 25000,
+                        "mode":"trunk"
                     }
                 ]
             }
@@ -104,7 +107,8 @@
                         "description": "Ethernet8",
                         "mtu": 9000,
                         "name": "Ethernet8",
-                        "speed": 25000
+                        "speed": 25000,
+                        "mode":"trunk"
                     }
                 ]
             }
@@ -140,7 +144,8 @@
                         "lanes": "65",
                         "mtu": 9000,
                         "name": "Ethernet8",
-                        "speed": 25000
+                        "speed": 25000,
+                        "mode":"trunk"
                     }
                 ]
             }
@@ -176,7 +181,8 @@
                         "lanes": "65",
                         "mtu": 9000,
                         "name": "Ethernet8",
-                        "speed": 25000
+                        "speed": 25000,
+                        "mode":"trunk"
                     }
                 ]
             }
@@ -204,7 +210,8 @@
                         "lanes": "65",
                         "mtu": 9000,
                         "name": "Ethernet8",
-                        "speed": 25000
+                        "speed": 25000,
+                        "mode":"trunk"
                     }
                 ]
             }
@@ -232,7 +239,8 @@
                         "lanes": "65",
                         "mtu": 9000,
                         "name": "Ethernet8",
-                        "speed": 25000
+                        "speed": 25000,
+                        "mode":"trunk"
                     }
                 ]
             }
@@ -260,7 +268,8 @@
                         "lanes": "65",
                         "mtu": 9000,
                         "name": "Ethernet8",
-                        "speed": 25000
+                        "speed": 25000,
+                        "mode":"trunk"
                     }
                 ]
             }
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/mclag.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/mclag.json
index 3d2ca3c92..30c4a7331 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/mclag.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/mclag.json
@@ -10,7 +10,8 @@
                         "lanes": "65",
                         "mtu": 9000,
                         "name": "Ethernet0",
-                        "speed": 25000
+                        "speed": 25000,
+                        "mode": "trunk"
                     },
                     {
                         "admin_status": "up",
@@ -19,7 +20,8 @@
                         "lanes": "65",
                         "mtu": 9000,
                         "name": "Ethernet10",
-                        "speed": 25000
+                        "speed": 25000,
+                        "mode":"routed"
                     }
                 ]
             }
@@ -32,14 +34,17 @@
                         "min_links": "1",
                         "mtu": "9100",
                         "lacp_key": "auto",
-                        "name": "PortChannel2"
+                        "name": "PortChannel2",
+                        "mode":"trunk"
                     },
                     {
                         "admin_status": "up",
                         "min_links": "1",
                         "mtu": "9100",
                         "lacp_key": "auto",
-                        "name": "PortChannel10"
+                        "name": "PortChannel10",
+                        "mode":"trunk"
+
                     }
                 ]
             }
@@ -126,7 +131,8 @@
                         "lanes": "65",
                         "mtu": 9000,
                         "name": "Ethernet0",
-                        "speed": 25000
+                        "speed": 25000,
+                        "mode":"trunk"
                     },
                     {
                         "admin_status": "up",
@@ -135,7 +141,8 @@
                         "lanes": "65",
                         "mtu": 9000,
                         "name": "Ethernet4",
-                        "speed": 25000
+                        "speed": 25000,
+                        "mode":"trunk"
                     }
                 ]
             }
@@ -148,7 +155,8 @@
                         "min_links": "1",
                         "mtu": "9100",
                         "lacp_key": "auto",
-                        "name": "PortChannel2"
+                        "name": "PortChannel2",
+                        "mode":"trunk"
                     }
                 ]
             }
@@ -302,7 +310,8 @@
                         "lanes": "65",
                         "mtu": 9000,
                         "name": "Ethernet12",
-                        "speed": 25000
+                        "speed": 25000,
+                        "mode":"routed"
                     }
                 ]
             }
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/port.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/port.json
index 5879bbac5..5864ae144 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/port.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/port.json
@@ -13,7 +13,8 @@
                         "pfc_asym": "off",
                         "name": "Ethernet8",
                         "tpid": "0x8100",
-                        "speed": 25000
+                        "speed": 25000,
+                        "mode":"trunk"
                     }
                 ]
             }
@@ -33,7 +34,8 @@
                         "pfc_asym": "on",
                         "name": "Ethernet8",
                         "tpid": "0x8100",
-                        "speed": 25000
+                        "speed": 25000,
+                        "mode":"trunk"
                     }
                 ]
             }
@@ -48,7 +50,8 @@
                         "alias": "eth8",
                         "lanes": "65",
                         "speed": 25000,
-                        "mtu": 68
+                        "mtu": 68,
+                        "mode":"trunk"
                     }
                 ]
             }
@@ -63,7 +66,23 @@
                         "alias": "eth8",
                         "lanes": "65",
                         "speed": 25000,
-                        "mtu": 9216
+                        "mtu": 9216,
+                        "mode":"trunk"
+                    }
+                ]
+            }
+        }
+    },
+    "PORT_INVLAID_MODE_TEST": {
+        "sonic-port:sonic-port": {
+            "sonic-port:PORT": {
+                "PORT_LIST": [
+                    {
+                        "name": "Ethernet8",
+                        "alias": "eth8",
+                        "lanes": "65",
+                        "speed": 25000,
+                        "mode" : "off"
                     }
                 ]
             }
@@ -79,7 +98,8 @@
                         "lanes": "65",
                         "speed": 25000,
                         "tpid": "0x8100",
-                        "autoneg": "on"
+                        "autoneg": "on",
+                        "mode":"trunk"
                     }
                 ]
             }
@@ -96,7 +116,8 @@
                         "lanes": "65",
                         "speed": 25000,
                         "tpid": "0x8100",
-                        "autoneg": "off"
+                        "autoneg": "off",
+                        "mode":"trunk"
                     }
                 ]
             }
@@ -113,7 +134,8 @@
                         "lanes": "65",
                         "speed": 25000,
                         "tpid": "0x8100",
-                        "autoneg": 0
+                        "autoneg": 0,
+                        "mode":"trunk"
                     }
                 ]
             }
@@ -419,7 +441,8 @@
                         "lanes": "65",
                         "speed": 25000,
                         "tpid": "0x8100",
-                        "link_training": "on"
+                        "link_training": "on",
+                        "mode":"trunk"
                     }
                 ]
             }
@@ -436,7 +459,8 @@
                         "lanes": "65",
                         "speed": 25000,
                         "tpid": "0x8100",
-                        "link_training": "off"
+                        "link_training": "off",
+                        "mode":"trunk"
                     }
                 ]
             }
@@ -525,7 +549,8 @@
                          "alias": "etp1a",
                          "lanes": "60, 61",
                          "speed": 100000,
-                         "subport": 9
+                         "subport": 9,
+                         "mode":"trunk"
                      }
                  ]
              }
@@ -541,28 +566,32 @@
                         "alias": "etp1a",
                         "lanes": "60, 61",
                         "speed": 100000,
-                        "subport": 1
+                        "subport": 1,
+                        "mode":"trunk"
                     },
                     {
                        "name": "Ethernet2",
                         "alias": "etp1b",
                         "lanes": "62, 63",
                         "speed": 100000,
-                        "subport": 2
+                        "subport": 2,
+                        "mode":"trunk"
                     },
                     {
                         "name": "Ethernet4",
                         "alias": "etp1c",
                         "lanes": "64, 65",
                         "speed": 100000,
-                        "subport": 3
+                        "subport": 3,
+                        "mode":"trunk"
                     },
                     {
                         "name": "Ethernet6",
                         "alias": "etp1d",
                         "lanes": "66, 67",
                         "speed": 100000,
-                        "subport": 4
+                        "subport": 4,
+                        "mode":"trunk"
                     }
                 ]
             }
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/portchannel.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/portchannel.json
index 7837d0544..6772d7c5b 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/portchannel.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/portchannel.json
@@ -11,7 +11,8 @@
                         "mtu": 9000,
                         "name": "Ethernet0",
                         "tpid": "0x8100",
-                        "speed": 25000
+                        "speed": 25000,
+                        "mode": "routed"
                     }
                 ]
             }
@@ -27,7 +28,8 @@
                         "lacp_key": "auto",
                         "name": "PortChannel0001",
                         "fast_rate": "false",
-                        "fallback" : "false"
+                        "fallback" : "false",
+                        "mode" :  "routed"
                     }
                 ]
             }
@@ -44,7 +46,8 @@
                         "lanes": "65",
                         "mtu": 9000,
                         "name": "Ethernet0",
-                        "speed": 25000
+                        "speed": 25000,
+                        "mode": "routed"
                     }
                 ]
             }
@@ -56,7 +59,8 @@
                         "admin_status": "up",
                         "min_links": "1024",
                         "mtu": "9100",
-                        "name": "PortChannel0001"
+                        "name": "PortChannel0001",
+                        "mode": "routed"
                     }
                 ]
             }
@@ -73,7 +77,8 @@
                         "lanes": "65",
                         "mtu": 9000,
                         "name": "Ethernet0",
-                        "speed": 25000
+                        "speed": 25000,
+                        "mode": "routed"
                     }
                 ]
             }
@@ -85,7 +90,8 @@
                         "admin_status": "up",
                         "min_links": "1025",
                         "mtu": "9100",
-                        "name": "PortChannel0001"
+                        "name": "PortChannel0001",
+                        "mode":"routed"
                     }
                 ]
             }
@@ -113,6 +119,23 @@
                         "mtu": "9100",
                         "tpid": "0x9500",
                         "name": "PortChannel0001"
+                        
+                    }
+                ]
+            }
+        }
+    },
+    "PORT_CHANNEL_INVALID_MODE": {
+        "sonic-portchannel:sonic-portchannel": {
+            "sonic-portchannel:PORTCHANNEL": {
+                "PORTCHANNEL_LIST": [
+                    {
+                        "admin_status": "up",
+                        "mtu": "9100",
+                        "tpid" :  "0x9100",
+                        "name": "PortChannel0001",
+                        "mode": "off"
+
                     }
                 ]
             }
@@ -316,7 +339,8 @@
                         "lanes": "65",
                         "mtu": 9000,
                         "name": "Ethernet0",
-                        "speed": 25000
+                        "speed": 25000,
+                        "mode": "routed"
                     }
                 ]
             }
@@ -328,7 +352,8 @@
                         "admin_status": "up",
                         "min_links": "1",
                         "mtu": "9100",
-                        "name": "PortChannel0001"
+                        "name": "PortChannel0001",
+                        "mode":"routed"
                     }
                 ]
             },
@@ -360,7 +385,8 @@
                         "lanes": "65",
                         "mtu": 9000,
                         "name": "Ethernet0",
-                        "speed": 25000
+                        "speed": 25000,
+                        "mode": "routed"
                     }
                 ]
             }
@@ -372,7 +398,8 @@
                         "admin_status": "up",
                         "min_links": "1",
                         "mtu": "9100",
-                        "name": "PortChannel0001"
+                        "name": "PortChannel0001",
+                        "mode": "routed"
                     }
                 ]
             },
@@ -403,7 +430,8 @@
                         "lanes": "65",
                         "mtu": 9000,
                         "name": "Ethernet0",
-                        "speed": 25000
+                        "speed": 25000,
+                        "mode": "trunk"
                     }
                 ]
             }
@@ -415,7 +443,8 @@
                         "admin_status": "up",
                         "min_links": "1",
                         "mtu": "9100",
-                        "name": "PortChannel0001"
+                        "name": "PortChannel0001",
+                        "mode": "routed"
                     }
                 ]
             },
@@ -440,7 +469,8 @@
                         "lanes": "65",
                         "mtu": 9000,
                         "name": "Ethernet0",
-                        "speed": 25000
+                        "speed": 25000,
+                        "mode": "routed"
                     }
                 ]
             }
@@ -452,7 +482,8 @@
                         "admin_status": "up",
                         "min_links": "1",
                         "mtu": "9100",
-                        "name": "PortChannel0001"
+                        "name": "PortChannel0001",
+                        "mode": "routed"
                     }
                 ]
             },
@@ -477,7 +508,8 @@
                         "lanes": "65",
                         "mtu": 9000,
                         "name": "Ethernet0",
-                        "speed": 25000
+                        "speed": 25000,
+                        "mode": "routed"
                     }
                 ]
             }
@@ -489,7 +521,8 @@
                         "admin_status": "up",
                         "min_links": "1",
                         "mtu": "9100",
-                        "name": "PortChannel0001"
+                        "name": "PortChannel0001",
+                        "mode": "routed"
                     }
                 ]
             },
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/vlan.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/vlan.json
index c4db119b7..9f3086b60 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/vlan.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/vlan.json
@@ -224,7 +224,8 @@
                 "PORTCHANNEL_LIST": [
                     {
                         "admin_status": "up",
-                        "name": "PortChannel5"
+                        "name": "PortChannel5",
+                        "mode":"trunk"
                     }
                 ]
             }
@@ -373,7 +374,8 @@
                         "mtu": 9000,
                         "lanes": "1",
                         "name": "Ethernet0",
-                        "speed": 25000
+                        "speed": 25000,
+                        "mode":"trunk"
                     }
                 ]
             }
@@ -425,7 +427,8 @@
                         "mtu": 9000,
                         "lanes": "1",
                         "name": "Ethernet0",
-                        "speed": 25000
+                        "speed": 25000,
+                        "mode":"trunk"
                     }
                 ]
             }
@@ -481,7 +484,8 @@
                         "mtu": 9000,
                         "lanes": "1",
                         "name": "Ethernet0",
-                        "speed": 25000
+                        "speed": 25000,
+                        "mode":"trunk"
                     }
                 ]
             }
@@ -638,7 +642,8 @@
                         "mtu": 9000,
                         "lanes": "1",
                         "name": "Ethernet0",
-                        "speed": 25000
+                        "speed": 25000,
+                        "mode":"trunk"
                     }
                 ]
             }
diff --git a/src/sonic-yang-models/yang-models/sonic-port.yang b/src/sonic-yang-models/yang-models/sonic-port.yang
index f164140d0..94a38967c 100644
--- a/src/sonic-yang-models/yang-models/sonic-port.yang
+++ b/src/sonic-yang-models/yang-models/sonic-port.yang
@@ -51,6 +51,12 @@ module sonic-port{
 						length 1..128;
 					}
 				}
+                
+				leaf mode {
+					description "SwitchPort Modes possible values are routed|access|trunk. Default value  for mode is routed"; 
+					type stypes:switchport_mode; 
+					default "routed";
+				}
 
 				leaf description {
 					type string {
diff --git a/src/sonic-yang-models/yang-models/sonic-portchannel.yang b/src/sonic-yang-models/yang-models/sonic-portchannel.yang
index 791094a7c..d5b57f70f 100644
--- a/src/sonic-yang-models/yang-models/sonic-portchannel.yang
+++ b/src/sonic-yang-models/yang-models/sonic-portchannel.yang
@@ -63,6 +63,13 @@ module sonic-portchannel {
                         range 1..1024;
                     }
                 }
+               
+               leaf mode {
+                   description "PortChannel SwitchPort Mode possible values are routed|access|trunk. Default value for mode is routed.";
+                   type stypes:switchport_mode;
+                   default "routed";
+
+                }
 
                 leaf description {
                     type string {
diff --git a/src/sonic-yang-models/yang-templates/sonic-types.yang.j2 b/src/sonic-yang-models/yang-templates/sonic-types.yang.j2
index 909a883a0..a5de49f77 100644
--- a/src/sonic-yang-models/yang-templates/sonic-types.yang.j2
+++ b/src/sonic-yang-models/yang-templates/sonic-types.yang.j2
@@ -209,6 +209,14 @@ module sonic-types {
         }
     }
 
+    typedef switchport_mode {
+        type string {
+            pattern "routed|access|trunk";
+        }
+        description
+            "SwitchPort Modes for Port & PortChannel";
+    }
+
     typedef meter_type {
         type enumeration {
             enum packets;

From 235cf3e661974c557252517155d50369d56b8d30 Mon Sep 17 00:00:00 2001
From: xumia <59720581+xumia@users.noreply.github.com>
Date: Sat, 27 Jan 2024 07:34:22 +0800
Subject: [PATCH 0196/1115] [Security] Fix the krb5 vulnerability issue
 (#17914)

### Why I did it
Fix the krb5 vulnerable issue
CVE-2021-36222  allows remote attackers to cause a NULL pointer dereference and daemon crash
CVE-2021-37750  NULL pointer dereference in kdc/do_tgs_req.c via a FAST inner body that lacks a server field
DSA 5286-1  remote code execution

##### Work item tracking
- Microsoft ADO **(number only)**: 26577929

#### How I did it
Upgrade the krb5 version to 1.18.3-6+deb11u14+fips.
---
 rules/sonic-fips.mk | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/rules/sonic-fips.mk b/rules/sonic-fips.mk
index ad37f51e1..d44bf627c 100644
--- a/rules/sonic-fips.mk
+++ b/rules/sonic-fips.mk
@@ -1,13 +1,13 @@
 # fips packages
 
-FIPS_VERSION = 0.9
+FIPS_VERSION = 0.10
 FIPS_OPENSSL_VERSION = 1.1.1n-0+deb11u5+fips
 FIPS_OPENSSH_VERSION = 8.4p1-5+deb11u2+fips
 FIPS_PYTHON_MAIN_VERSION = 3.9
 FIPS_PYTHON_VERSION = 3.9.2-1+fips
 FIPS_GOLANG_MAIN_VERSION = 1.15
 FIPS_GOLANG_VERSION = 1.15.15-1~deb11u4+fips
-FIPS_KRB5_VERSION = 1.18.3-6+deb11u1+fips
+FIPS_KRB5_VERSION = 1.18.3-6+deb11u14+fips
 FIPS_URL_PREFIX = https://sonicstorage.blob.core.windows.net/public/fips/$(BLDENV)/$(FIPS_VERSION)/$(CONFIGURED_ARCH)
 
 SYMCRYPT_OPENSSL_NAME = symcrypt-openssl

From 77c1134dbc803f86453727fedeec235026da961f Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sat, 27 Jan 2024 16:32:29 +0800
Subject: [PATCH 0197/1115] [submodule] Update submodule sonic-mgmt-common to
 the latest HEAD automatically (#17897)

#### Why I did it
src/sonic-mgmt-common
```
* 9905269 - (HEAD -> master, origin/master, origin/HEAD) Added support for singleton containers and a sibling list in a single SONIC table (3 days ago) [Mohammed Faraaz]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-mgmt-common | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-mgmt-common b/src/sonic-mgmt-common
index 1e84a4902..99052691c 160000
--- a/src/sonic-mgmt-common
+++ b/src/sonic-mgmt-common
@@ -1 +1 @@
-Subproject commit 1e84a4902ca7250f30fecdad1a5b1396167c6676
+Subproject commit 99052691c3aa2c9ddaf5f69104af12677a387d4d

From 7ff4174394474c33f19f7d2b29c01cf12d9b8bf0 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sun, 28 Jan 2024 16:32:05 +0800
Subject: [PATCH 0198/1115] [submodule] Update submodule sonic-utilities to the
 latest HEAD automatically (#17921)

#### Why I did it
src/sonic-utilities
```
* 96e42cc6 - (HEAD -> master, origin/master, origin/HEAD) Additional check to skip FRR-Offloaded check if the bgp route-src was not selected as best (#3130) (11 hours ago) [Deepak Singhal]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-utilities | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-utilities b/src/sonic-utilities
index b3d856bf4..96e42cc63 160000
--- a/src/sonic-utilities
+++ b/src/sonic-utilities
@@ -1 +1 @@
-Subproject commit b3d856bf49dff209c48705e635720b740ccad42e
+Subproject commit 96e42cc63d12b232ffaa7cff64b610529f023e32

From 6a38584878d88c0ccc59598bf99998dcb4a728a4 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sun, 28 Jan 2024 16:32:09 +0800
Subject: [PATCH 0199/1115] [submodule] Update submodule sonic-swss-common to
 the latest HEAD automatically (#17920)

#### Why I did it
src/sonic-swss-common
```
* 41ee154 - (HEAD -> master, origin/master, origin/HEAD) [dbconnect]: Support DPU database schema (#845) (12 hours ago) [Ze Gan]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-swss-common | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-swss-common b/src/sonic-swss-common
index e4db43672..41ee1547c 160000
--- a/src/sonic-swss-common
+++ b/src/sonic-swss-common
@@ -1 +1 @@
-Subproject commit e4db4367245659bce386a568512248ea54c34172
+Subproject commit 41ee1547c484b1b51477d3f21d0784aeba3407f2

From f1d6655004760046089c0e2ca256fcc5027ba661 Mon Sep 17 00:00:00 2001
From: Volodymyr Samotiy <volodymyrs@nvidia.com>
Date: Sun, 28 Jan 2024 16:26:07 +0200
Subject: [PATCH 0200/1115] [Mellanox] Disable SSD NCQ on Mellanox platforms
 (#17567)

- Why I did it
Based on some research some products might experience an occasional IO failures in the communication between CPU and SSD because of NCQ.
There seems to be a problem between some kernel versions and some SATA controllers.

Syslog error message examples:

Error "ata1: SError: { UnrecovData Handshk }" - "failed command: WRITE FPDMA QUEUED".
Error "ata1: SError: { RecovComm HostInt PHYRdyChg CommWake 10B8B DevExch }" - "failed command: READ FPDMA QUEUED".
Some vendors already disabled NCQ on their platforms in SONiC due to similar issue:

[Arista] Disable ATA NCQ for a few products #13739 [Arista] Disable ATA NCQ for a few products
[Arista] Disable SSD NCQ on DCS-7050CX3-32S #13964 [Arista] Disable SSD NCQ on DCS-7050CX3-32S
Also there are other discussions on Debian/Ubuntu forums about similar issues and it was suggested to disable NCQ:

https://askubuntu.com/questions/133946/are-these-sata-errors-dangerous

- How I did it
Add a kernel parameter to tell libata to disable NCQ

- How to verify it
Use FIO tool - fio --direct=1 --rw=randrw --bs=64k --ioengine=libaio --iodepth=64 --runtime=120 --numjobs=4
---
 device/mellanox/x86_64-mlnx_msn2010-r0/installer.conf   | 2 +-
 device/mellanox/x86_64-mlnx_msn2700-r0/installer.conf   | 2 +-
 device/mellanox/x86_64-mlnx_msn2700a1-r0/installer.conf | 1 +
 device/mellanox/x86_64-mlnx_msn3420-r0/installer.conf   | 1 +
 device/mellanox/x86_64-mlnx_msn3700-r0/installer.conf   | 1 +
 device/mellanox/x86_64-mlnx_msn3700c-r0/installer.conf  | 1 +
 device/mellanox/x86_64-mlnx_msn3800-r0/installer.conf   | 1 +
 device/mellanox/x86_64-mlnx_msn4410-r0/installer.conf   | 1 +
 device/mellanox/x86_64-mlnx_msn4600-r0/installer.conf   | 1 +
 device/mellanox/x86_64-mlnx_msn4600c-r0/installer.conf  | 1 +
 device/mellanox/x86_64-mlnx_msn4700-r0/installer.conf   | 1 +
 device/mellanox/x86_64-nvidia_sn2201-r0/installer.conf  | 2 +-
 device/mellanox/x86_64-nvidia_sn4800-r0/installer.conf  | 1 +
 device/mellanox/x86_64-nvidia_sn5600-r0/installer.conf  | 1 +
 14 files changed, 14 insertions(+), 3 deletions(-)
 create mode 100644 device/mellanox/x86_64-mlnx_msn2700a1-r0/installer.conf
 create mode 100644 device/mellanox/x86_64-mlnx_msn3420-r0/installer.conf
 create mode 100644 device/mellanox/x86_64-mlnx_msn3700-r0/installer.conf
 create mode 100644 device/mellanox/x86_64-mlnx_msn3700c-r0/installer.conf
 create mode 100644 device/mellanox/x86_64-mlnx_msn3800-r0/installer.conf
 create mode 100644 device/mellanox/x86_64-mlnx_msn4410-r0/installer.conf
 create mode 100644 device/mellanox/x86_64-mlnx_msn4600-r0/installer.conf
 create mode 100644 device/mellanox/x86_64-mlnx_msn4600c-r0/installer.conf
 create mode 100644 device/mellanox/x86_64-mlnx_msn4700-r0/installer.conf
 create mode 100644 device/mellanox/x86_64-nvidia_sn4800-r0/installer.conf
 create mode 100644 device/mellanox/x86_64-nvidia_sn5600-r0/installer.conf

diff --git a/device/mellanox/x86_64-mlnx_msn2010-r0/installer.conf b/device/mellanox/x86_64-mlnx_msn2010-r0/installer.conf
index c9c9493a5..1aba51906 100644
--- a/device/mellanox/x86_64-mlnx_msn2010-r0/installer.conf
+++ b/device/mellanox/x86_64-mlnx_msn2010-r0/installer.conf
@@ -1 +1 @@
-ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="acpi_enforce_resources=lax acpi=noirq"
+ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="acpi_enforce_resources=lax acpi=noirq libata.force=noncq"
diff --git a/device/mellanox/x86_64-mlnx_msn2700-r0/installer.conf b/device/mellanox/x86_64-mlnx_msn2700-r0/installer.conf
index c9c9493a5..1aba51906 100644
--- a/device/mellanox/x86_64-mlnx_msn2700-r0/installer.conf
+++ b/device/mellanox/x86_64-mlnx_msn2700-r0/installer.conf
@@ -1 +1 @@
-ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="acpi_enforce_resources=lax acpi=noirq"
+ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="acpi_enforce_resources=lax acpi=noirq libata.force=noncq"
diff --git a/device/mellanox/x86_64-mlnx_msn2700a1-r0/installer.conf b/device/mellanox/x86_64-mlnx_msn2700a1-r0/installer.conf
new file mode 100644
index 000000000..c46f0eb7a
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn2700a1-r0/installer.conf
@@ -0,0 +1 @@
+ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="libata.force=noncq"
diff --git a/device/mellanox/x86_64-mlnx_msn3420-r0/installer.conf b/device/mellanox/x86_64-mlnx_msn3420-r0/installer.conf
new file mode 100644
index 000000000..c46f0eb7a
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn3420-r0/installer.conf
@@ -0,0 +1 @@
+ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="libata.force=noncq"
diff --git a/device/mellanox/x86_64-mlnx_msn3700-r0/installer.conf b/device/mellanox/x86_64-mlnx_msn3700-r0/installer.conf
new file mode 100644
index 000000000..c46f0eb7a
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn3700-r0/installer.conf
@@ -0,0 +1 @@
+ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="libata.force=noncq"
diff --git a/device/mellanox/x86_64-mlnx_msn3700c-r0/installer.conf b/device/mellanox/x86_64-mlnx_msn3700c-r0/installer.conf
new file mode 100644
index 000000000..c46f0eb7a
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn3700c-r0/installer.conf
@@ -0,0 +1 @@
+ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="libata.force=noncq"
diff --git a/device/mellanox/x86_64-mlnx_msn3800-r0/installer.conf b/device/mellanox/x86_64-mlnx_msn3800-r0/installer.conf
new file mode 100644
index 000000000..c46f0eb7a
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn3800-r0/installer.conf
@@ -0,0 +1 @@
+ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="libata.force=noncq"
diff --git a/device/mellanox/x86_64-mlnx_msn4410-r0/installer.conf b/device/mellanox/x86_64-mlnx_msn4410-r0/installer.conf
new file mode 100644
index 000000000..c46f0eb7a
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn4410-r0/installer.conf
@@ -0,0 +1 @@
+ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="libata.force=noncq"
diff --git a/device/mellanox/x86_64-mlnx_msn4600-r0/installer.conf b/device/mellanox/x86_64-mlnx_msn4600-r0/installer.conf
new file mode 100644
index 000000000..c46f0eb7a
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn4600-r0/installer.conf
@@ -0,0 +1 @@
+ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="libata.force=noncq"
diff --git a/device/mellanox/x86_64-mlnx_msn4600c-r0/installer.conf b/device/mellanox/x86_64-mlnx_msn4600c-r0/installer.conf
new file mode 100644
index 000000000..c46f0eb7a
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn4600c-r0/installer.conf
@@ -0,0 +1 @@
+ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="libata.force=noncq"
diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/installer.conf b/device/mellanox/x86_64-mlnx_msn4700-r0/installer.conf
new file mode 100644
index 000000000..c46f0eb7a
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn4700-r0/installer.conf
@@ -0,0 +1 @@
+ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="libata.force=noncq"
diff --git a/device/mellanox/x86_64-nvidia_sn2201-r0/installer.conf b/device/mellanox/x86_64-nvidia_sn2201-r0/installer.conf
index 8fcb08aba..c1376afcd 100644
--- a/device/mellanox/x86_64-nvidia_sn2201-r0/installer.conf
+++ b/device/mellanox/x86_64-nvidia_sn2201-r0/installer.conf
@@ -1 +1 @@
-ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="acpi_enforce_resources=lax"
+ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="acpi_enforce_resources=lax libata.force=noncq"
diff --git a/device/mellanox/x86_64-nvidia_sn4800-r0/installer.conf b/device/mellanox/x86_64-nvidia_sn4800-r0/installer.conf
new file mode 100644
index 000000000..c46f0eb7a
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4800-r0/installer.conf
@@ -0,0 +1 @@
+ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="libata.force=noncq"
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/installer.conf b/device/mellanox/x86_64-nvidia_sn5600-r0/installer.conf
new file mode 100644
index 000000000..c46f0eb7a
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/installer.conf
@@ -0,0 +1 @@
+ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="libata.force=noncq"

From 5516381d7e19be441a9f2a49b7aa10c8f0080f05 Mon Sep 17 00:00:00 2001
From: Kevin Wang <65380078+kevinskwang@users.noreply.github.com>
Date: Mon, 29 Jan 2024 10:10:54 +0800
Subject: [PATCH 0201/1115] [qos] change the template keyword from Compute-AI
 to ComputeAI (#17902)

Why I did it
Align the keywords to make qos configuration take effect

Work item tracking
Microsoft ADO (number only):
How I did it
Change the keyword to ComputeAI

How to verify it
reload minigraph and check the qos configuration
---
 files/build_templates/qos_config.j2 | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/files/build_templates/qos_config.j2 b/files/build_templates/qos_config.j2
index 9a3741a39..a85d4f1e4 100644
--- a/files/build_templates/qos_config.j2
+++ b/files/build_templates/qos_config.j2
@@ -83,7 +83,7 @@
         ('type' in DEVICE_METADATA['localhost'] and
           DEVICE_METADATA['localhost']['type'] in backend_device_types) and
         ('resource_type' in DEVICE_METADATA['localhost'] and
-          DEVICE_METADATA['localhost']['resource_type'] == 'Compute-AI') %}
+          DEVICE_METADATA['localhost']['resource_type'] == 'ComputeAI') %}
     {{- generate_tc_to_pg_map() }}
 {% else %}
     "TC_TO_PRIORITY_GROUP_MAP": {
@@ -147,7 +147,7 @@
          ('type' in DEVICE_METADATA['localhost'] and
            DEVICE_METADATA['localhost']['type'] in backend_device_types) and
          ('resource_type' in DEVICE_METADATA['localhost'] and
-           DEVICE_METADATA['localhost']['resource_type'] == 'Compute-AI') %}
+           DEVICE_METADATA['localhost']['resource_type'] == 'ComputeAI') %}
     {{- generate_dscp_to_tc_map() }}
 {% else %}
     "DSCP_TO_TC_MAP": {
@@ -241,7 +241,7 @@
         ('type' in DEVICE_METADATA['localhost'] and
           DEVICE_METADATA['localhost']['type'] in backend_device_types) and
         ('resource_type' in DEVICE_METADATA['localhost'] and
-          DEVICE_METADATA['localhost']['resource_type'] == 'Compute-AI') %}
+          DEVICE_METADATA['localhost']['resource_type'] == 'ComputeAI') %}
     "SCHEDULER": {
         "scheduler.0": {
             "type"  : "DWRR",
@@ -406,7 +406,7 @@
 {% if 'type' in DEVICE_METADATA['localhost'] and
        DEVICE_METADATA['localhost']['type'] in backend_device_types and
       'resource_type' in DEVICE_METADATA['localhost'] and
-       DEVICE_METADATA['localhost']['resource_type'] == 'Compute-AI' %}
+       DEVICE_METADATA['localhost']['resource_type'] == 'ComputeAI' %}
 {% for port in PORT_ACTIVE %}
         "{{ port }}|0": {
             "scheduler": "scheduler.0"

From c23c8afbf4ba32640b210e53fb9fbba6fd0d1328 Mon Sep 17 00:00:00 2001
From: Liping Xu <108326363+lipxu@users.noreply.github.com>
Date: Mon, 29 Jan 2024 15:55:28 +0800
Subject: [PATCH 0202/1115] handle json load exception in bgpmon (#17856)

Why I did it
ICM reported due to "BGPMon Process exited" which was caused by json load exception.

Work item tracking
Microsoft ADO (number only):
25916773
How I did it
Add an exception handle during json load.

How to verify it
Verified locally, add debug log to modify the output string of cmd to make it not with json formation, then check the syslog.
---
 src/sonic-bgpcfgd/bgpmon/bgpmon.py | 51 +++++++++++++++++++++++-------
 1 file changed, 39 insertions(+), 12 deletions(-)

diff --git a/src/sonic-bgpcfgd/bgpmon/bgpmon.py b/src/sonic-bgpcfgd/bgpmon/bgpmon.py
index f60f1c5eb..26a5b2454 100755
--- a/src/sonic-bgpcfgd/bgpmon/bgpmon.py
+++ b/src/sonic-bgpcfgd/bgpmon/bgpmon.py
@@ -49,6 +49,7 @@ def __init__(self):
         self.db.connect(self.db.STATE_DB, False)
         self.pipe = swsscommon.RedisPipeline(self.db.get_redis_client(self.db.STATE_DB))
         self.db.delete_all_by_pattern(self.db.STATE_DB, "NEIGH_STATE_TABLE|*" )
+        self.MAX_RETRY_ATTEMPTS = 3
 
     # A quick way to check if there are anything happening within BGP is to
     # check its log file has any activities. This is by checking its modified
@@ -77,18 +78,44 @@ def update_new_peer_states(self, peer_dict):
     # Get a new snapshot of BGP neighbors and store them in the "new" location
     def get_all_neigh_states(self):
         cmd = ["vtysh", "-c", 'show bgp summary json']
-        rc, output = getstatusoutput_noshell(cmd)
-        if rc:
-            syslog.syslog(syslog.LOG_ERR, "*ERROR* Failed with rc:{} when execute: {}".format(rc, cmd))
-            return
-
-        peer_info = json.loads(output)
-        # cmd ran successfully, safe to Clean the "new" set/dict for new snapshot
-        self.new_peer_l.clear()
-        self.new_peer_state.clear()
-        for key, value in peer_info.items():
-            if key == "ipv4Unicast" or key == "ipv6Unicast":
-                self.update_new_peer_states(value)
+        retry_attempt = 0
+
+        while retry_attempt < self.MAX_RETRY_ATTEMPTS:
+            try:
+                rc, output = getstatusoutput_noshell(cmd)
+                if rc:
+                    syslog.syslog(syslog.LOG_ERR, "*ERROR* Failed with rc:{} when execute: {}".format(rc, cmd))
+                    return
+                if len(output) == 0:
+                    syslog.syslog(syslog.LOG_WARNING, "*WARNING* output none when execute: {}".format(cmd))
+                    return
+
+                peer_info = json.loads(output)
+                # cmd ran successfully, safe to Clean the "new" set/dict for new snapshot
+                self.new_peer_l.clear()
+                self.new_peer_state.clear()
+                for key, value in peer_info.items():
+                    if key == "ipv4Unicast" or key == "ipv6Unicast":
+                        self.update_new_peer_states(value)
+                return
+
+            except json.JSONDecodeError as decode_error:
+                # Log the exception and retry if within the maximum attempts
+                retry_attempt += 1
+                syslog.syslog(syslog.LOG_WARNING, "*WARNING* JSONDecodeError: {} when execute: {} Retry attempt: {}".format(decode_error, cmd, retry_attempt))
+                time.sleep(1)
+                continue
+            except Exception as e:
+                # Log other exceptions and return failure
+                retry_attempt += 1
+                syslog.syslog(syslog.LOG_WARNING, "*WARNING* An unexpected error occurred: {} when execute: {} Retry attempt: {}".format(e, cmd, retry_attempt))
+                time.sleep(1)
+                continue
+
+        # Log an error if the maximum retry attempts are reached
+        syslog.syslog(syslog.LOG_ERR, "*ERROR* Maximum retry attempts reached. Failed to execute: {} Output: {}".format(cmd, output))
+        sys.exit(1)
+
 
     # This method will take the caller's dictionary which contains the peer state operation
     # That need to be updated in StateDB using Redis pipeline.

From bf9b6091d946660a026cad32859fc24d7e1a9208 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Tue, 30 Jan 2024 16:32:31 +0800
Subject: [PATCH 0203/1115] [submodule] Update submodule sonic-utilities to the
 latest HEAD automatically (#17940)

#### Why I did it
src/sonic-utilities
```
* 3d45c0c6 - (HEAD -> master, origin/master, origin/HEAD) Migrate GNMI table (#3053) (9 hours ago) [ganglv]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-utilities | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-utilities b/src/sonic-utilities
index 96e42cc63..3d45c0c65 160000
--- a/src/sonic-utilities
+++ b/src/sonic-utilities
@@ -1 +1 @@
-Subproject commit 96e42cc63d12b232ffaa7cff64b610529f023e32
+Subproject commit 3d45c0c65106d3ba744b20d9f2276f12430244a6

From 2683e378e96dd747e0978d4dbccf3ea0c2d8bfe1 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Tue, 30 Jan 2024 16:32:35 +0800
Subject: [PATCH 0204/1115] [submodule] Update submodule sonic-sairedis to the
 latest HEAD automatically (#17939)

#### Why I did it
src/sonic-sairedis
```
* 5b2a517 - (HEAD -> master, origin/master, origin/HEAD) Revert "add if statement for module control mode support" (#1341) (22 hours ago) [dbarashinvd]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-sairedis | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-sairedis b/src/sonic-sairedis
index b26ce7a35..5b2a517d9 160000
--- a/src/sonic-sairedis
+++ b/src/sonic-sairedis
@@ -1 +1 @@
-Subproject commit b26ce7a35a0203724d87509fa56ee1b7f2c0ffbd
+Subproject commit 5b2a517d940d295b56914abc9bb08a349ed80420

From bb5a420de5cb2584fff23b3059f301f86c83fd75 Mon Sep 17 00:00:00 2001
From: xumia <59720581+xumia@users.noreply.github.com>
Date: Tue, 30 Jan 2024 21:44:32 +0800
Subject: [PATCH 0205/1115] [Build] Fix krb5 package not found issue (#17926)

Why I did it
Fix the build issue caused by the wrong version specified.

See the build error logs:

Try 4: /usr/bin/wget --retry-connrefused failed to get: -O
--2024-01-26 11:38:23--  https://sonicstorage.blob.core.windows.net/public/fips/bullseye/0.10/amd64/libk5crypto3_1.18.3-6+deb11u14+fips_amd64.deb
Resolving sonicstorage.blob.core.windows.net (sonicstorage.blob.core.windows.net)... 20.60.59.131
Connecting to sonicstorage.blob.core.windows.net (sonicstorage.blob.core.windows.net)|20.60.59.131|:443... connected.
HTTP request sent, awaiting response... 404 The specified blob does not exist.
2024-01-26 11:38:23 ERROR 404: The specified blob does not exist..

Try 5: /usr/bin/wget --retry-connrefused failed to get: -O
make[1]: *** [Makefile:12: /sonic/target/debs/bullseye/symcrypt-openssl_0.10_amd64.deb] Error 8
make[1]: Leaving directory '/sonic/src/sonic-fips'
Work item tracking
Microsoft ADO (number only): 26577929
The package not installed but PR passed issue is traced in another issue #17927

How I did it
Add the libkrb5-dev and the depended packages to fix docker-sonic-vs build failure.
The package libzmq3-dev has dependency on the libkrb5-dev.
---
 platform/vs/docker-sonic-vs.mk            |  4 ++++
 platform/vs/docker-sonic-vs/Dockerfile.j2 |  9 +++++++--
 rules/sonic-fips.mk                       | 12 ++++++++++--
 3 files changed, 21 insertions(+), 4 deletions(-)

diff --git a/platform/vs/docker-sonic-vs.mk b/platform/vs/docker-sonic-vs.mk
index 18b1e92cf..dfcff23a5 100644
--- a/platform/vs/docker-sonic-vs.mk
+++ b/platform/vs/docker-sonic-vs.mk
@@ -34,6 +34,10 @@ else
 $(DOCKER_SONIC_VS)_DEPENDS += $(GOBGP)
 endif
 
+ifeq ($(INCLUDE_FIPS), y)
+$(DOCKER_SONIC_VS)_DEPENDS += $(FIPS_KRB5_ALL)
+endif
+
 $(DOCKER_SONIC_VS)_FILES += $(CONFIGDB_LOAD_SCRIPT) \
                             $(ARP_UPDATE_SCRIPT) \
                             $(ARP_UPDATE_VARS_TEMPLATE) \
diff --git a/platform/vs/docker-sonic-vs/Dockerfile.j2 b/platform/vs/docker-sonic-vs/Dockerfile.j2
index 20f87d19f..6ffef790f 100644
--- a/platform/vs/docker-sonic-vs/Dockerfile.j2
+++ b/platform/vs/docker-sonic-vs/Dockerfile.j2
@@ -38,7 +38,6 @@ RUN apt-get install -y net-tools \
                        iptables \
                        jq \
                        libzmq5 \
-                       libzmq3-dev \
                        uuid-dev \
                        # For installing Python m2crypto package
                        # (these can be uninstalled after installation)
@@ -64,7 +63,11 @@ RUN apt-get install -y net-tools \
                        libasan6 \
                        {%- endif %}
                        dbus \
-                       redis-server
+                       redis-server \
+                       # For libkrb5-dev
+                       comerr-dev \
+                       libgssrpc4 \
+                       libkdb5-10
 
 # For sonic-config-engine Python 3 package
 # Install pyangbind here, outside sonic-config-engine dependencies, as pyangbind causes enum34 to be installed.
@@ -88,6 +91,8 @@ COPY {%- for deb in docker_sonic_vs_debs.split(' ') %} debs/{{ deb }}{%- endfor
 RUN dpkg_apt() { [ -f $1 ] && { dpkg -i $1 || apt-get -y install -f; } || return 1; }; {%- for deb in docker_sonic_vs_debs.split(' ') %} dpkg_apt /debs/{{ deb }};{%- endfor %}
 {%- endif %}
 
+RUN apt-get install -y libzmq3-dev
+
 {% if docker_sonic_vs_pydebs.strip() -%}
 # Copy locally-built Debian package dependencies
 COPY {%- for deb in docker_sonic_vs_pydebs.split(' ') %} python-debs/{{ deb }}{%- endfor %} /debs/
diff --git a/rules/sonic-fips.mk b/rules/sonic-fips.mk
index d44bf627c..3ce37224b 100644
--- a/rules/sonic-fips.mk
+++ b/rules/sonic-fips.mk
@@ -7,7 +7,7 @@ FIPS_PYTHON_MAIN_VERSION = 3.9
 FIPS_PYTHON_VERSION = 3.9.2-1+fips
 FIPS_GOLANG_MAIN_VERSION = 1.15
 FIPS_GOLANG_VERSION = 1.15.15-1~deb11u4+fips
-FIPS_KRB5_VERSION = 1.18.3-6+deb11u14+fips
+FIPS_KRB5_VERSION = 1.18.3-6+deb11u4+fips
 FIPS_URL_PREFIX = https://sonicstorage.blob.core.windows.net/public/fips/$(BLDENV)/$(FIPS_VERSION)/$(CONFIGURED_ARCH)
 
 SYMCRYPT_OPENSSL_NAME = symcrypt-openssl
@@ -40,7 +40,15 @@ FIPS_GOLANG_DOC = golang-$(FIPS_GOLANG_MAIN_VERSION)-doc_$(FIPS_GOLANG_VERSION)_
 FIPS_GOLANG_ALL = $(FIPS_GOLANG) $(FIPS_GOLANG_GO) $(FIPS_GOLANG_SRC) $(FIPS_GOLANG_DOC)
 
 FIPS_KRB5 = libk5crypto3_$(FIPS_KRB5_VERSION)_$(CONFIGURED_ARCH).deb
-FIPS_KRB5_ALL = $(FIPS_KRB5)
+FIPS_KRB5_SUPPORT0 = libkrb5support0_$(FIPS_KRB5_VERSION)_$(CONFIGURED_ARCH).deb
+FIPS_KRB5_3 = libkrb5-3_$(FIPS_KRB5_VERSION)_$(CONFIGURED_ARCH).deb
+FIPS_KRB5_LIBGSSAPI = libgssapi-krb5-2_$(FIPS_KRB5_VERSION)_$(CONFIGURED_ARCH).deb
+FIPS_KRB5_LIBKADM5CLNT = libkadm5clnt-mit12_$(FIPS_KRB5_VERSION)_$(CONFIGURED_ARCH).deb
+FIPS_KRB5_LIBKADM5SRV = libkadm5srv-mit12_$(FIPS_KRB5_VERSION)_$(CONFIGURED_ARCH).deb
+FIPS_KRB5_LIBGSSRPC4 = libgssrpc4_$(FIPS_KRB5_VERSION)_$(CONFIGURED_ARCH).deb
+FIPS_KRB5_MULTIDEV = krb5-multidev_$(FIPS_KRB5_VERSION)_$(CONFIGURED_ARCH).deb
+FIPS_KRB5_DEV = libkrb5-dev_$(FIPS_KRB5_VERSION)_$(CONFIGURED_ARCH).deb
+FIPS_KRB5_ALL = $(FIPS_KRB5) $(FIPS_KRB5_SUPPORT0) $(FIPS_KRB5_3) $(FIPS_KRB5_LIBGSSAPI) $(FIPS_KRB5_LIBKADM5CLNT) $(FIPS_KRB5_LIBKADM5SRV) $(FIPS_KRB5_LIBGSSRPC4) $(FIPS_KRB5_MULTIDEV) $(FIPS_KRB5_DEV)
 
 FIPS_DERIVED_TARGET = $(FIPS_OPENSSL_ALL) $(FIPS_OPENSSH_ALL) $(FIPS_GOLANG_ALL) $(FIPS_PYTHON_ALL) $(FIPS_KRB5_ALL)
 FIPS_PACKAGE_ALL = $(SYMCRYPT_OPENSSL) $(FIPS_DERIVED_TARGET)

From 90056a92accb0192766c800d2d9e9142e1d05aad Mon Sep 17 00:00:00 2001
From: kellyyeh <42761586+kellyyeh@users.noreply.github.com>
Date: Tue, 30 Jan 2024 10:02:34 -0800
Subject: [PATCH 0206/1115] Only add to DHCP_RELAY if dhcpv6 servers exist
 (#17770)

---
 src/sonic-config-engine/minigraph.py | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/sonic-config-engine/minigraph.py b/src/sonic-config-engine/minigraph.py
index e13a17f43..cbfa4caba 100644
--- a/src/sonic-config-engine/minigraph.py
+++ b/src/sonic-config-engine/minigraph.py
@@ -680,8 +680,8 @@ def parse_dpg(dpg, hname):
                 vdhcpserver_list = vintfdhcpservers.split(';')
                 vlan_attributes['dhcpv6_servers'] = vdhcpserver_list
                 dhcp_attributes['dhcpv6_servers'] = vdhcpserver_list
-            sonic_vlan_member_name = "Vlan%s" % (vlanid)
-            dhcp_relay_table[sonic_vlan_member_name] = dhcp_attributes
+                sonic_vlan_member_name = "Vlan%s" % (vlanid)
+                dhcp_relay_table[sonic_vlan_member_name] = dhcp_attributes
 
             vlanmac = vintf.find(str(QName(ns, "MacAddress")))
             if vlanmac is not None and vlanmac.text is not None:

From 865042ed238ccb805b76e1b5b13cd1c5d9837418 Mon Sep 17 00:00:00 2001
From: Lior Avramov <73036155+liorghub@users.noreply.github.com>
Date: Tue, 30 Jan 2024 23:47:39 +0200
Subject: [PATCH 0207/1115] [Nvidia] Update syncd docker to use python version
 3 (#17735)

* Remove python2 from compilation of python-sdk-api

* Upgrade Python version in syncd RPC docker image to Python3
---
 .../docker-syncd-mlnx-rpc/Dockerfile.j2       | 48 +++++++++----------
 .../docker-syncd-mlnx-rpc/ptf_nn_agent.conf   |  2 +-
 .../mellanox/docker-syncd-mlnx/Dockerfile.j2  |  2 +-
 .../mellanox/sdk-src/python-sdk-api/Makefile  |  2 +-
 4 files changed, 27 insertions(+), 27 deletions(-)

diff --git a/platform/mellanox/docker-syncd-mlnx-rpc/Dockerfile.j2 b/platform/mellanox/docker-syncd-mlnx-rpc/Dockerfile.j2
index d10d56011..511e360cb 100644
--- a/platform/mellanox/docker-syncd-mlnx-rpc/Dockerfile.j2
+++ b/platform/mellanox/docker-syncd-mlnx-rpc/Dockerfile.j2
@@ -1,5 +1,5 @@
 ##
-## Copyright (c) 2016-2021 NVIDIA CORPORATION & AFFILIATES.
+## Copyright (c) 2016-2024 NVIDIA CORPORATION & AFFILIATES.
 ## Apache-2.0
 ##
 ## Licensed under the Apache License, Version 2.0 (the "License");
@@ -25,23 +25,27 @@ RUN mkdir -p /var/run/sx_sdk
 RUN apt-get purge -y syncd
 
 ## Pre-install the fundamental packages
-RUN apt-get update \
- && apt-get -y install  \
-    net-tools           \
-    python-setuptools   \
-    build-essential     \
-    libssl-dev          \
-    libffi-dev          \
-    python-dev          \
-    wget                \
-    cmake               \
-    libqt5core5a        \
-    libqt5network5      \
-    libboost-atomic1.74.0
+RUN apt-get update        \
+ && apt-get -y install    \
+    net-tools             \
+    build-essential       \
+    libssl-dev            \
+    libffi-dev            \
+    wget                  \
+    cmake                 \
+    libqt5core5a          \
+    libqt5network5        \
+    libboost-atomic1.74.0 \
+    python3-pip           \
+    python3-dev           \
+    python-is-python3     \
+    python3-setuptools
+
+RUN pip3 install --upgrade pip
 
 # Build and install python-scapy
-RUN curl http://ftp.us.debian.org/debian/pool/main/s/scapy/python-scapy_2.4.0-2_all.deb --output python-scapy_2.4.0-2_all.deb \
- && dpkg -i python-scapy_2.4.0-2_all.deb \
+RUN curl http://ftp.us.debian.org/debian/pool/main/s/scapy/python3-scapy_2.4.0-2_all.deb --output python3-scapy_2.4.0-2_all.deb \
+ && dpkg -i python3-scapy_2.4.0-2_all.deb \
  && apt install -f
 
 {% if docker_syncd_mlnx_rpc_debs.strip() -%}
@@ -64,10 +68,6 @@ RUN curl http://ftp.us.debian.org/debian/pool/main/s/scapy/python-scapy_2.4.0-2_
 {{ install_debian_packages(docker_syncd_mlnx_rpc_pydebs.split(' ')) }}
 {% endif %}
 
-# Install pip2 since it is no longer in the APT upstream
-RUN curl https://bootstrap.pypa.io/pip/2.7/get-pip.py --output get-pip.py \
- && python2 get-pip.py
-
 RUN wget https://github.com/nanomsg/nanomsg/archive/1.0.0.tar.gz \
  && tar xvfz 1.0.0.tar.gz \
  && cd nanomsg-1.0.0    \
@@ -78,10 +78,10 @@ RUN wget https://github.com/nanomsg/nanomsg/archive/1.0.0.tar.gz \
  && cd ..               \
  && rm -fr nanomsg-1.0.0 \
  && rm -f 1.0.0.tar.gz  \
- && pip2 install cffi==1.7.0    \
- && pip2 install --upgrade cffi==1.7.0 \
- && pip2 install wheel  \
- && pip2 install nnpy    \
+ && pip3 install cffi==1.16.0    \
+ && pip3 install wheel  \
+ && pip3 install nnpy   \
+ && pip3 install ptf    \
  && mkdir -p /opt       \
  && cd /opt             \
  && wget https://raw.githubusercontent.com/p4lang/ptf/master/ptf_nn/ptf_nn_agent.py \
diff --git a/platform/mellanox/docker-syncd-mlnx-rpc/ptf_nn_agent.conf b/platform/mellanox/docker-syncd-mlnx-rpc/ptf_nn_agent.conf
index 80812464a..1b91d3efb 100644
--- a/platform/mellanox/docker-syncd-mlnx-rpc/ptf_nn_agent.conf
+++ b/platform/mellanox/docker-syncd-mlnx-rpc/ptf_nn_agent.conf
@@ -1,5 +1,5 @@
 [program:ptf_nn_agent]
-command=/usr/bin/python2 /opt/ptf_nn_agent.py --device-socket 1@tcp://0.0.0.0:10900 -i 1-3@Ethernet12 --set-nn-rcv-buffer=109430400 --set-iface-rcv-buffer=109430400 --set-nn-snd-buffer=109430400 --set-iface-snd-buffer=109430400
+command=/usr/bin/python3 /opt/ptf_nn_agent.py --device-socket 1@tcp://0.0.0.0:10900 -i 1-3@Ethernet12 --set-nn-rcv-buffer=109430400 --set-iface-rcv-buffer=109430400 --set-nn-snd-buffer=109430400 --set-iface-snd-buffer=109430400
 process_name=ptf_nn_agent
 stdout_logfile=/tmp/ptf_nn_agent.out.log
 stderr_logfile=/tmp/ptf_nn_agent.err.log
diff --git a/platform/mellanox/docker-syncd-mlnx/Dockerfile.j2 b/platform/mellanox/docker-syncd-mlnx/Dockerfile.j2
index 3d68ba4bc..dbd51e278 100755
--- a/platform/mellanox/docker-syncd-mlnx/Dockerfile.j2
+++ b/platform/mellanox/docker-syncd-mlnx/Dockerfile.j2
@@ -1,5 +1,5 @@
 ##
-## Copyright (c) 2016-2021 NVIDIA CORPORATION & AFFILIATES.
+## Copyright (c) 2016-2024 NVIDIA CORPORATION & AFFILIATES.
 ## Apache-2.0
 ##
 ## Licensed under the Apache License, Version 2.0 (the "License");
diff --git a/platform/mellanox/sdk-src/python-sdk-api/Makefile b/platform/mellanox/sdk-src/python-sdk-api/Makefile
index 5ac3e8504..2d27e367e 100644
--- a/platform/mellanox/sdk-src/python-sdk-api/Makefile
+++ b/platform/mellanox/sdk-src/python-sdk-api/Makefile
@@ -18,7 +18,7 @@ $(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% :
 		./autogen.sh
 	fi
 
-	debuild -e PYTHON_INTERPRETERS="\"python2 python3\"" -b -us -uc -j$(SONIC_CONFIG_MAKE_JOBS)
+	debuild -e PYTHON_INTERPRETERS="\"python3\"" -b -us -uc -j$(SONIC_CONFIG_MAKE_JOBS)
 
 	popd
 

From c8439cdd4b740345c949ca47c19cadd642f50122 Mon Sep 17 00:00:00 2001
From: Zain Budhwani <99770260+zbud-msft@users.noreply.github.com>
Date: Tue, 30 Jan 2024 22:14:23 -0800
Subject: [PATCH 0208/1115] Disable eventd and rsyslog plugin in slim images
 (#17905)

### Why I did it

Disable eventd at buildtime for slim images

##### Work item tracking
- Microsoft ADO **(number only)**:26386286

#### How I did it

Add flags for disabling eventd and only copy rsyslog conf files when eventd is included and not slim image

#### How to verify it

Manual testing
---
 Makefile.work                                         |  1 +
 dockers/docker-dhcp-relay/Dockerfile.j2               |  6 +++++-
 dockers/docker-fpm-frr/Dockerfile.j2                  |  8 ++++++--
 dockers/docker-orchagent/Dockerfile.j2                | 11 +++++++----
 files/build_templates/init_cfg.json.j2                |  6 +++++-
 files/build_templates/sonic_debian_extension.j2       |  9 ++++++++-
 .../rsyslog.d/{00-sonic.conf => 00-sonic.conf.j2}     |  6 ++++++
 rules/config                                          |  3 +++
 rules/docker-eventd.mk                                |  4 ++++
 slave.mk                                              |  9 +++++++++
 10 files changed, 54 insertions(+), 9 deletions(-)
 rename files/image_config/rsyslog/rsyslog.d/{00-sonic.conf => 00-sonic.conf.j2} (87%)

diff --git a/Makefile.work b/Makefile.work
index a9f74d4fe..a50743967 100644
--- a/Makefile.work
+++ b/Makefile.work
@@ -556,6 +556,7 @@ SONIC_BUILD_INSTRUCTION :=  $(MAKE) \
                            SONIC_CONFIG_USE_NATIVE_DOCKERD_FOR_BUILD=$(SONIC_CONFIG_USE_NATIVE_DOCKERD_FOR_BUILD) \
                            SONIC_INCLUDE_SYSTEM_TELEMETRY=$(INCLUDE_SYSTEM_TELEMETRY) \
                            SONIC_INCLUDE_SYSTEM_GNMI=$(INCLUDE_SYSTEM_GNMI) \
+                           SONIC_INCLUDE_SYSTEM_EVENTD=$(INCLUDE_SYSTEM_EVENTD) \
                            INCLUDE_DHCP_RELAY=$(INCLUDE_DHCP_RELAY) \
                            INCLUDE_DHCP_SERVER=$(INCLUDE_DHCP_SERVER) \
                            INCLUDE_MACSEC=$(INCLUDE_MACSEC) \
diff --git a/dockers/docker-dhcp-relay/Dockerfile.j2 b/dockers/docker-dhcp-relay/Dockerfile.j2
index 8b0753f28..a406af404 100644
--- a/dockers/docker-dhcp-relay/Dockerfile.j2
+++ b/dockers/docker-dhcp-relay/Dockerfile.j2
@@ -51,13 +51,17 @@ COPY ["dhcp-relay.programs.j2", "dhcpv4-relay.agents.j2", "dhcpv6-relay.agents.j
 COPY ["files/supervisor-proc-exit-listener", "/usr/bin"]
 COPY ["critical_processes", "/etc/supervisor"]
 COPY ["cli", "/cli/"]
+
+{% if include_system_eventd == "y" %}
+{% if build_reduce_image_size != "y" or sonic_asic_platform != "broadcom" %}
 # Copy regex json and rsyslog_plugin.conf file into rsyslog.d
 COPY ["*.json", "/etc/rsyslog.d/"]
 COPY ["files/rsyslog_plugin.conf.j2", "/etc/rsyslog.d/"]
-
 # Create dhcp_relay_regex.conf
 RUN j2 -f json /etc/rsyslog.d/rsyslog_plugin.conf.j2 /etc/rsyslog.d/events_info.json  > /etc/rsyslog.d/dhcp_relay_events.conf
 RUN rm -f /etc/rsyslog.d/rsyslog_plugin.conf.j2
 RUN rm -f /etc/rsyslog.d/events_info.json
+{% endif %}
+{% endif %}
 
 ENTRYPOINT ["/usr/bin/docker_init.sh"]
diff --git a/dockers/docker-fpm-frr/Dockerfile.j2 b/dockers/docker-fpm-frr/Dockerfile.j2
index d15fc1846..d0cb32d02 100644
--- a/dockers/docker-fpm-frr/Dockerfile.j2
+++ b/dockers/docker-fpm-frr/Dockerfile.j2
@@ -54,15 +54,19 @@ COPY ["TSC", "/usr/bin/TSC"]
 COPY ["TS", "/usr/bin/TS"]
 COPY ["files/supervisor-proc-exit-listener", "/usr/bin"]
 COPY ["zsocket.sh", "/usr/bin/"]
-COPY ["*.json", "/etc/rsyslog.d/"]
-COPY ["files/rsyslog_plugin.conf.j2", "/etc/rsyslog.d/"]
 RUN chmod a+x /usr/bin/TSA && \
     chmod a+x /usr/bin/TSB && \
     chmod a+x /usr/bin/TSC && \
     chmod a+x /usr/bin/zsocket.sh
 
+{% if include_system_eventd == "y" %}
+{% if build_reduce_image_size != "y" or sonic_asic_platform != "broadcom" %}
+COPY ["*.json", "/etc/rsyslog.d/"]
+COPY ["files/rsyslog_plugin.conf.j2", "/etc/rsyslog.d/"]
 RUN j2 -f json /etc/rsyslog.d/rsyslog_plugin.conf.j2 /etc/rsyslog.d/events_info.json  > /etc/rsyslog.d/bgp_events.conf
 RUN rm -f /etc/rsyslog.d/rsyslog_plugin.conf.j2
 RUN rm -f /etc/rsyslog.d/events_info.json
+{% endif %}
+{% endif %}
 
 ENTRYPOINT ["/usr/bin/docker_init.sh"]
diff --git a/dockers/docker-orchagent/Dockerfile.j2 b/dockers/docker-orchagent/Dockerfile.j2
index b8b95a913..ec17575eb 100755
--- a/dockers/docker-orchagent/Dockerfile.j2
+++ b/dockers/docker-orchagent/Dockerfile.j2
@@ -75,17 +75,20 @@ COPY ["files/supervisor-proc-exit-listener", "/usr/bin"]
 # Copy all Jinja2 template files into the templates folder
 COPY ["*.j2", "/usr/share/sonic/templates/"]
 
-# Copy all regex json files and rsyslog_plugin.conf to rsyslog.d
-COPY ["*.json", "/etc/rsyslog.d/"]
-COPY ["files/rsyslog_plugin.conf.j2", "/etc/rsyslog.d/"]
-
 RUN sonic-cfggen -a "{\"ENABLE_ASAN\":\"{{ENABLE_ASAN}}\"}" -t /usr/share/sonic/templates/docker-init.j2 > /usr/bin/docker-init.sh
 RUN rm -f /usr/share/sonic/templates/docker-init.j2
 RUN chmod 755 /usr/bin/docker-init.sh
 
+{% if include_system_eventd == "y" %}
+{% if build_reduce_image_size != "y" or sonic_asic_platform != "broadcom" %}
+# Copy all regex json files and rsyslog_plugin.conf to rsyslog.d
+COPY ["*.json", "/etc/rsyslog.d/"]
+COPY ["files/rsyslog_plugin.conf.j2", "/etc/rsyslog.d/"]
 # Create swss rsyslog_plugin conf file
 RUN j2 -f json /etc/rsyslog.d/rsyslog_plugin.conf.j2 /etc/rsyslog.d/events_info.json  > /etc/rsyslog.d/swss_events.conf
 RUN rm -f /etc/rsyslog.d/rsyslog_plugin.conf.j2
 RUN rm -f /etc/rsyslog.d/events_info.json
+{% endif %}
+{% endif %}
 
 ENTRYPOINT ["/usr/bin/docker-init.sh"]
diff --git a/files/build_templates/init_cfg.json.j2 b/files/build_templates/init_cfg.json.j2
index b43206332..9c02de602 100644
--- a/files/build_templates/init_cfg.json.j2
+++ b/files/build_templates/init_cfg.json.j2
@@ -38,7 +38,6 @@
                    ("lldp", "enabled", true, "enabled"),
                    ("pmon", "enabled", true, "enabled"),
                    ("snmp", "enabled", true, "enabled"),
-                   ("eventd", "enabled", false, "enabled"),
                    ("swss", "enabled", false, "enabled"),
                    ("syncd", "enabled", false, "enabled")] %}
 {%- if include_router_advertiser == "y" %}{% do features.append(("radv", "enabled", false, "enabled")) %}{% endif %}
@@ -60,6 +59,11 @@
 {%- if include_macsec == "y" %}{% do features.append(("macsec", "{% if 'type' in DEVICE_METADATA['localhost'] and DEVICE_METADATA['localhost']['type'] == 'SpineRouter' and DEVICE_RUNTIME_METADATA['MACSEC_SUPPORTED'] %}enabled{% else %}disabled{% endif %}", false, "enabled")) %}{% endif %}
 {%- if include_system_gnmi == "y" %}{% do features.append(("gnmi", "enabled", true, "enabled")) %}{% endif %}
 {%- if include_system_telemetry == "y" %}{% do features.append(("telemetry", "enabled", true, "enabled")) %}{% endif %}
+{%- if include_system_eventd == "y" and BUILD_REDUCE_IMAGE_SIZE == "y" and sonic_asic_platform == "broadcom" %}
+    {% do features.append(("eventd","disabled", false, "enabled")) %}
+{%- elif include_system_eventd == "y" %}
+    {% do features.append(("eventd", "enabled", false, "enabled")) %}
+{%- endif %}
     "FEATURE": {
 {# delayed field if set, will start the feature systemd .timer unit instead of .service unit #}
 {%- for feature, state, delayed, autorestart in features %}
diff --git a/files/build_templates/sonic_debian_extension.j2 b/files/build_templates/sonic_debian_extension.j2
index 73564c03c..377c4116f 100644
--- a/files/build_templates/sonic_debian_extension.j2
+++ b/files/build_templates/sonic_debian_extension.j2
@@ -324,6 +324,9 @@ sudo dpkg --root=$FILESYSTEM_ROOT -i {{deb}} || sudo LANG=C DEBIAN_FRONTEND=noni
 sudo dpkg --root=$FILESYSTEM_ROOT -i $debs_path/sonic-db-cli_*.deb || \
     sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install -f
 
+
+{% if include_system_eventd == "y" %}
+{% if build_reduce_image_size != "y" or sonic_asic_platform != "broadcom" %}
 # Install sonic-rsyslog-plugin
 sudo dpkg --root=$FILESYSTEM_ROOT -i $debs_path/sonic-rsyslog-plugin_*.deb || \
     sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install -f
@@ -343,6 +346,9 @@ sudo cp $BUILD_TEMPLATES/bgpd_regex.json $FILESYSTEM_ROOT_ETC/rsyslog.d/
 j2 -f json $BUILD_TEMPLATES/rsyslog_plugin.conf.j2 $BUILD_TEMPLATES/syncd_events_info.json | sudo tee $FILESYSTEM_ROOT_ETC/rsyslog.d/syncd_events.conf
 sudo cp $BUILD_TEMPLATES/syncd_regex.json $FILESYSTEM_ROOT_ETC/rsyslog.d/
 
+{% endif %}
+{% endif %}
+
 # Install custom-built monit package and SONiC configuration files
 sudo dpkg --root=$FILESYSTEM_ROOT -i $debs_path/monit_*.deb || \
     sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install -f
@@ -404,7 +410,8 @@ sudo cp $IMAGE_CONFIGS/rsyslog/rsyslog-config.service $FILESYSTEM_ROOT_USR_LIB_S
 sudo cp $IMAGE_CONFIGS/rsyslog/rsyslog-config.sh $FILESYSTEM_ROOT/usr/bin/
 sudo cp $IMAGE_CONFIGS/rsyslog/rsyslog.conf.j2 $FILESYSTEM_ROOT_USR_SHARE_SONIC_TEMPLATES/
 sudo cp $IMAGE_CONFIGS/rsyslog/rsyslog-container.conf.j2 $FILESYSTEM_ROOT_USR_SHARE_SONIC_TEMPLATES/
-sudo cp $IMAGE_CONFIGS/rsyslog/rsyslog.d/* $FILESYSTEM_ROOT/etc/rsyslog.d/
+j2 $IMAGE_CONFIGS/rsyslog/rsyslog.d/00-sonic.conf.j2 | sudo tee $FILESYSTEM_ROOT/etc/rsyslog.d/00-sonic.conf
+sudo cp $IMAGE_CONFIGS/rsyslog/rsyslog.d/*.conf $FILESYSTEM_ROOT/etc/rsyslog.d/
 echo "rsyslog-config.service" | sudo tee -a $GENERATED_SERVICE_FILE
 
 # Copy containercfgd configuration files
diff --git a/files/image_config/rsyslog/rsyslog.d/00-sonic.conf b/files/image_config/rsyslog/rsyslog.d/00-sonic.conf.j2
similarity index 87%
rename from files/image_config/rsyslog/rsyslog.d/00-sonic.conf
rename to files/image_config/rsyslog/rsyslog.d/00-sonic.conf.j2
index e949365da..66eb13463 100644
--- a/files/image_config/rsyslog/rsyslog.d/00-sonic.conf
+++ b/files/image_config/rsyslog/rsyslog.d/00-sonic.conf.j2
@@ -5,6 +5,9 @@ template(name="prog_msg" type="list") {
     constant(value="\n")
 }
 
+{% if include_system_eventd == "y" %}
+{% if build_reduce_image_size != "y" or sonic_asic_platform != "broadcom" %}
+
 $ModLoad omprog
 
 if re_match($programname, "bgp[0-9]*#(frr|zebra|staticd|watchfrr)") then {
@@ -25,6 +28,9 @@ if re_match($programname, "bgp[0-9]*#bgpd") then {
     stop
 }
 
+{% endif %}
+{% endif %}
+
 ## Teamd rules
 
 if $programname contains "teamd_" then {
diff --git a/rules/config b/rules/config
index 70110469e..d0a4b8cb5 100644
--- a/rules/config
+++ b/rules/config
@@ -127,6 +127,9 @@ DEFAULT_VS_PREPARE_MEM = yes
 # INCLUDE_SYSTEM_GNMI - build docker-sonic-gnmi for system gnmi support
 INCLUDE_SYSTEM_GNMI = y
 
+# INCLUDE_SYSTEM_EVENTD - build docker-eventd for system eventd support
+INCLUDE_SYSTEM_EVENTD = y
+
 # INCLUDE_SYSTEM_TELEMETRY - build docker-sonic-telemetry for system telemetry support
 INCLUDE_SYSTEM_TELEMETRY = n
 
diff --git a/rules/docker-eventd.mk b/rules/docker-eventd.mk
index 509465133..ef926a064 100644
--- a/rules/docker-eventd.mk
+++ b/rules/docker-eventd.mk
@@ -25,10 +25,14 @@ $(DOCKER_DHCP)_SERVICE_REQUIRES = updategraph
 $(DOCKER_DHCP)_SERVICE_AFTER = database
 
 SONIC_DOCKER_IMAGES += $(DOCKER_EVENTD)
+ifeq ($(INCLUDE_SYSTEM_EVENTD), y)
 SONIC_INSTALL_DOCKER_IMAGES += $(DOCKER_EVENTD)
+endif
 
 SONIC_DOCKER_DBG_IMAGES += $(DOCKER_EVENTD_DBG)
+ifeq ($(INCLUDE_SYSTEM_EVENTD), y)
 SONIC_INSTALL_DOCKER_DBG_IMAGES += $(DOCKER_EVENTD_DBG)
+endif
 
 $(DOCKER_EVENTD)_FILES += $(SUPERVISOR_PROC_EXIT_LISTENER_SCRIPT)
 $(DOCKER_EVENTD)_CONTAINER_NAME = eventd
diff --git a/slave.mk b/slave.mk
index bb62d963b..2e35874c6 100644
--- a/slave.mk
+++ b/slave.mk
@@ -165,6 +165,10 @@ ifeq ($(SONIC_INCLUDE_SYSTEM_GNMI),y)
 INCLUDE_SYSTEM_GNMI = y
 endif
 
+ifeq ($(SONIC_INCLUDE_SYSTEM_EVENTD),y)
+INCLUDE_SYSTEM_EVENTD = y
+endif
+
 ifeq ($(SONIC_INCLUDE_RESTAPI),y)
 INCLUDE_RESTAPI = y
 endif
@@ -423,6 +427,7 @@ $(info "INCLUDE_MGMT_FRAMEWORK"          : "$(INCLUDE_MGMT_FRAMEWORK)")
 $(info "INCLUDE_ICCPD"                   : "$(INCLUDE_ICCPD)")
 $(info "INCLUDE_SYSTEM_TELEMETRY"        : "$(INCLUDE_SYSTEM_TELEMETRY)")
 $(info "INCLUDE_SYSTEM_GNMI"             : "$(INCLUDE_SYSTEM_GNMI)")
+$(info "INCLUDE_SYSTEM_EVENTD"           : "$(INCLUDE_SYSTEM_EVENTD)")
 $(info "ENABLE_HOST_SERVICE_ON_START"    : "$(ENABLE_HOST_SERVICE_ON_START)")
 $(info "INCLUDE_RESTAPI"                 : "$(INCLUDE_RESTAPI)")
 $(info "INCLUDE_SFLOW"                   : "$(INCLUDE_SFLOW)")
@@ -1129,6 +1134,8 @@ $(addprefix $(TARGET_PATH)/, $(DOCKER_IMAGES)) : $(TARGET_PATH)/%.gz : .platform
 		sudo mount --bind $(PYTHON_DEBS_PATH) $($*.gz_PATH)/python-debs $(LOG)
 		sudo mount --bind $(PYTHON_WHEELS_PATH) $($*.gz_PATH)/python-wheels $(LOG)
 		# Export variables for j2. Use path for unique variable names, e.g. docker_orchagent_debs
+		export include_system_eventd="$(INCLUDE_SYSTEM_EVENTD)"
+		export build_reduce_image_size="$(BUILD_REDUCE_IMAGE_SIZE)"
 		$(eval export $(subst -,_,$(notdir $($*.gz_PATH)))_debs=$(shell printf "$(subst $(SPACE),\n,$(call expand,$($*.gz_DEPENDS),RDEPENDS))\n" | awk '!a[$$0]++'))
 		$(eval export $(subst -,_,$(notdir $($*.gz_PATH)))_pydebs=$(shell printf "$(subst $(SPACE),\n,$(call expand,$($*.gz_PYTHON_DEBS)))\n" | awk '!a[$$0]++'))
 		$(eval export $(subst -,_,$(notdir $($*.gz_PATH)))_whls=$(shell printf "$(subst $(SPACE),\n,$(call expand,$($*.gz_PYTHON_WHEELS)))\n" | awk '!a[$$0]++'))
@@ -1413,6 +1420,8 @@ $(addprefix $(TARGET_PATH)/, $(SONIC_INSTALLERS)) : $(TARGET_PATH)/% : \
 	export sonic_su_prod_signing_tool="/sonic/scripts/$(shell basename -- $(SECURE_UPGRADE_PROD_SIGNING_TOOL))"
 	export include_system_telemetry="$(INCLUDE_SYSTEM_TELEMETRY)"
 	export include_system_gnmi="$(INCLUDE_SYSTEM_GNMI)"
+	export include_system_eventd="$(INCLUDE_SYSTEM_EVENTD)"
+	export build_reduce_image_size="$(BUILD_REDUCE_IMAGE_SIZE)"
 	export include_restapi="$(INCLUDE_RESTAPI)"
 	export include_nat="$(INCLUDE_NAT)"
 	export include_p4rt="$(INCLUDE_P4RT)"

From d1cce42f4aaf6c6cdfbbc2f281ccc2491a468cff Mon Sep 17 00:00:00 2001
From: Baorong Liu <baorliu@cisco.com>
Date: Tue, 30 Jan 2024 22:21:46 -0800
Subject: [PATCH 0209/1115] [staticroutebfd] fix an error in error logging
 (#17043)

Why I did it
Fix an error in the log_err call.
this error can be triggered by an invalid static route key. usually the code cannot go here with normal config file. but hit this issue with an invalid key by manual testing with redis-cli directly. the file is scanned by Python lint to prevent such errors.

Work item tracking
Microsoft ADO ():26250268

How I did it
fix the format error.

How to verify it
1, ran pylint to check the design, make sure no such error in the design file.
2, wrote a separate python program to verify the log call.
In the current logging related testing, usually use patch/mock for logging. for this specific error, could not trigger it if we call mock function instead the real function in the design. so need to do lint checking for code change.
---
 src/sonic-bgpcfgd/staticroutebfd/main.py      |  2 +-
 src/sonic-bgpcfgd/tests/test_static_rt_bfd.py | 17 +++++++++++++++++
 2 files changed, 18 insertions(+), 1 deletion(-)

diff --git a/src/sonic-bgpcfgd/staticroutebfd/main.py b/src/sonic-bgpcfgd/staticroutebfd/main.py
index 268dbd3c1..89f10f2dc 100644
--- a/src/sonic-bgpcfgd/staticroutebfd/main.py
+++ b/src/sonic-bgpcfgd/staticroutebfd/main.py
@@ -376,7 +376,7 @@ def static_route_set_handler(self, key, data):
 
         valid, is_ipv4, ip = check_ip(ip_prefix)
         if not valid:
-            log_err("invalid ip prefix for static route: ", key)
+            log_err("invalid ip prefix for static route: '%s'"%(key))
             return True
 
         #use lower case if there is letter in IPv6 address string
diff --git a/src/sonic-bgpcfgd/tests/test_static_rt_bfd.py b/src/sonic-bgpcfgd/tests/test_static_rt_bfd.py
index f9b613924..5198e50ea 100644
--- a/src/sonic-bgpcfgd/tests/test_static_rt_bfd.py
+++ b/src/sonic-bgpcfgd/tests/test_static_rt_bfd.py
@@ -171,6 +171,23 @@ def test_set_del_ipv6():
         {'del_default:2603:10e2:400::4/128': { }}
     )
 
+@patch('staticroutebfd.main.log_err')
+def test_invalid_key(mocked_log_err):
+    dut = constructor()
+    intf_setup(dut)
+
+    set_del_test(dut, "srt",
+        "SET",
+        ("2.2.2/24", {
+            "bfd": "true",
+            "nexthop": "192.168.1.2 , 192.168.2.2, 192.168.3.2",
+            "ifname": "if1, if2, if3",
+        }),
+        {},
+        {}
+    )
+    mocked_log_err.assert_called_with("invalid ip prefix for static route: '2.2.2/24'")
+
 def test_set_del():
     dut = constructor()
     intf_setup(dut)

From 3cdc76e18c304e984cbb4f1460aac7da2d1f1e54 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Wed, 31 Jan 2024 14:32:16 +0800
Subject: [PATCH 0210/1115] [submodule] Update submodule sonic-platform-pde to
 the latest HEAD automatically (#17953)
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

#### Why I did it
src/sonic-platform-pde
```
* f2cc748 - (HEAD -> master, origin/master, origin/HEAD) Merge pull request #35 from nonodark/local (21 hours ago) [賓少鈺]
* 607e920 - Fix 'Chassis' object has no attribute 'get_num_psu' in test_psu.py (3 weeks ago) [nonodark]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-platform-pde | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-platform-pde b/src/sonic-platform-pde
index 77090359c..f2cc7484c 160000
--- a/src/sonic-platform-pde
+++ b/src/sonic-platform-pde
@@ -1 +1 @@
-Subproject commit 77090359ca21a4d5df9186edcf568713a2f6bcf4
+Subproject commit f2cc7484cced6c3379127ff9ce1658830077c5b5

From 77384494b3842b7a745072a5f7655823566398d1 Mon Sep 17 00:00:00 2001
From: Sudharsan Dhamal Gopalarathnam <sudharsand@nvidia.com>
Date: Tue, 30 Jan 2024 22:35:16 -0800
Subject: [PATCH 0211/1115] [Mellanox]Update SDK/FW to 4.6.2202/2012.2202
 (#17947)

- Why I did it
Update SDK/FW version to 4.6.2202/2012.2202

Fixed issues:
1. On Spectrum-3 systems, ports' toggling while sending traffic on 400G speed ports, might result in stuck FW.
2. In Spectrum-1 switch systems, 50G SR2 speed mode is not supported when AutoNeg is enabled. In this case although the max interface speed is 50G for SR2 or SR4 or SR, the actual max interface speed negotiated between the loopback is 25G.
3. On Spectrum-2 and Spectrum-3, Switch create in fastboot might take more than 40 seconds in case there are no active links.
4. When performing warmboot from version prior to 202205 to 202205 and above , no aging and mac move take place

- How I did it
Updating make files.

-How to verify it
Running regression
---
 platform/mellanox/fw.mk  | 10 +++++-----
 platform/mellanox/sdk.mk |  2 +-
 2 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/platform/mellanox/fw.mk b/platform/mellanox/fw.mk
index 1ba74ca5c..696a3f339 100644
--- a/platform/mellanox/fw.mk
+++ b/platform/mellanox/fw.mk
@@ -25,29 +25,29 @@ SIMX_VERSION = 24.1-1007
 
 FW_FROM_URL = y
 
-MLNX_FW_ASSETS_RELEASE_TAG = fw-2012.2134
+MLNX_FW_ASSETS_RELEASE_TAG = fw-2012.2202
 MLNX_FW_ASSETS_URL = $(MLNX_ASSETS_GITHUB_URL)/releases/download/$(MLNX_FW_ASSETS_RELEASE_TAG)
 
 ifeq ($(MLNX_FW_BASE_URL), )
 MLNX_FW_BASE_URL = $(MLNX_FW_ASSETS_URL)
 endif
 
-MLNX_SPC_FW_VERSION = 13.2012.2134
+MLNX_SPC_FW_VERSION = 13.2012.2202
 MLNX_SPC_FW_FILE = fw-SPC-rel-$(subst .,_,$(MLNX_SPC_FW_VERSION))-EVB.mfa
 $(MLNX_SPC_FW_FILE)_PATH = $(MLNX_FW_BASE_PATH)
 $(MLNX_SPC_FW_FILE)_URL = $(MLNX_FW_BASE_URL)/$(MLNX_SPC_FW_FILE)
 
-MLNX_SPC2_FW_VERSION = 29.2012.2134
+MLNX_SPC2_FW_VERSION = 29.2012.2202
 MLNX_SPC2_FW_FILE = fw-SPC2-rel-$(subst .,_,$(MLNX_SPC2_FW_VERSION))-EVB.mfa
 $(MLNX_SPC2_FW_FILE)_PATH = $(MLNX_FW_BASE_PATH)
 $(MLNX_SPC2_FW_FILE)_URL = $(MLNX_FW_BASE_URL)/$(MLNX_SPC2_FW_FILE)
 
-MLNX_SPC3_FW_VERSION = 30.2012.2134
+MLNX_SPC3_FW_VERSION = 30.2012.2202
 MLNX_SPC3_FW_FILE = fw-SPC3-rel-$(subst .,_,$(MLNX_SPC3_FW_VERSION))-EVB.mfa
 $(MLNX_SPC3_FW_FILE)_PATH = $(MLNX_FW_BASE_PATH)
 $(MLNX_SPC3_FW_FILE)_URL = $(MLNX_FW_BASE_URL)/$(MLNX_SPC3_FW_FILE)
 
-MLNX_SPC4_FW_VERSION = 34.2012.2134
+MLNX_SPC4_FW_VERSION = 34.2012.2202
 MLNX_SPC4_FW_FILE = fw-SPC4-rel-$(subst .,_,$(MLNX_SPC4_FW_VERSION))-EVB.mfa
 $(MLNX_SPC4_FW_FILE)_PATH = $(MLNX_FW_BASE_PATH)
 $(MLNX_SPC4_FW_FILE)_URL = $(MLNX_FW_BASE_URL)/$(MLNX_SPC4_FW_FILE)
diff --git a/platform/mellanox/sdk.mk b/platform/mellanox/sdk.mk
index 7188cfe05..d91823d41 100644
--- a/platform/mellanox/sdk.mk
+++ b/platform/mellanox/sdk.mk
@@ -14,7 +14,7 @@
 # See the License for the specific language governing permissions and
 # limitations under the License.
 #
-MLNX_SDK_VERSION = 4.6.2134
+MLNX_SDK_VERSION = 4.6.2202
 MLNX_SDK_ISSU_VERSION = 101
 
 MLNX_SDK_DRIVERS_GITHUB_URL = https://github.com/Mellanox/Spectrum-SDK-Drivers

From 36cd5b6a24848a4e7633753c4bc42b7ca5a9de8a Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Wed, 31 Jan 2024 16:32:33 +0800
Subject: [PATCH 0212/1115] [submodule] Update submodule sonic-swss-common to
 the latest HEAD automatically (#17955)

#### Why I did it
src/sonic-swss-common
```
* 253ceb6 - (HEAD -> master, origin/master, origin/HEAD) Fix race condition in ZmqServer. (#850) (23 hours ago) [mint570]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-swss-common | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-swss-common b/src/sonic-swss-common
index 41ee1547c..253ceb619 160000
--- a/src/sonic-swss-common
+++ b/src/sonic-swss-common
@@ -1 +1 @@
-Subproject commit 41ee1547c484b1b51477d3f21d0784aeba3407f2
+Subproject commit 253ceb61916fabbf8f261aa9c7507e33d8628312

From 4af43dc63b49f29b2b9e1c6d304d738a18ecf693 Mon Sep 17 00:00:00 2001
From: Dror Prital <76714716+dprital@users.noreply.github.com>
Date: Wed, 31 Jan 2024 19:41:23 +0200
Subject: [PATCH 0213/1115] [Mellanox] Update SIMX version to 23.10-1123
 (#17958)

- Why I did it
Update NVIDIA SIMX Version to 23.10-1123

- How I did it
Changed fw.mk file
---
 platform/mellanox/fw.mk | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/platform/mellanox/fw.mk b/platform/mellanox/fw.mk
index 696a3f339..7bfdee402 100644
--- a/platform/mellanox/fw.mk
+++ b/platform/mellanox/fw.mk
@@ -21,7 +21,7 @@ MLNX_FW_BASE_PATH = $(MLNX_SDK_BASE_PATH)
 # Place an URL here to FW if you want to download FW instead
 MLNX_FW_BASE_URL =
 
-SIMX_VERSION = 24.1-1007
+SIMX_VERSION = 23.10-1123
 
 FW_FROM_URL = y
 

From 1c901b8f12cfa2c7f56fa0da62e93a7f7abc7e0c Mon Sep 17 00:00:00 2001
From: Ze Gan <ganze718@gmail.com>
Date: Fri, 2 Feb 2024 03:13:51 +0800
Subject: [PATCH 0214/1115] [docker-database]: Install sonic-dash-api CLI in
 database container (#17479)

Add sonic-dash-api CLI in database container for decoding the dash objects from protobuf to readable json.

Signed-off-by: Ze Gan <ganze718@gmail.com>
---
 .azure-pipelines/azure-pipelines-build-ubuntu-2004.yml | 3 ++-
 dockers/docker-database/Dockerfile.j2                  | 3 +++
 rules/docker-database.mk                               | 3 ++-
 3 files changed, 7 insertions(+), 2 deletions(-)

diff --git a/.azure-pipelines/azure-pipelines-build-ubuntu-2004.yml b/.azure-pipelines/azure-pipelines-build-ubuntu-2004.yml
index e2aa48057..f3c966c86 100644
--- a/.azure-pipelines/azure-pipelines-build-ubuntu-2004.yml
+++ b/.azure-pipelines/azure-pipelines-build-ubuntu-2004.yml
@@ -29,7 +29,8 @@ stages:
                          debhelper-compat dh-elpa dh-sequence-python3 python3-all \
                          libpython3-all-dev python3-six xmlto unzip rake-compiler gem2deb pkg-php-tools \
                          ant default-jdk maven-repo-helper libguava-java \
-                         libboost-all-dev libgtest-dev build-essential
+                         libboost-all-dev libgtest-dev build-essential swig4.0 swig
+        sudo pip3 install pytest click
         wget http://ftp.us.debian.org/debian/pool/main/libg/libgoogle-gson-java/libgoogle-gson-java_2.8.6-1+deb11u1_all.deb
         sudo dpkg -i libgoogle-gson-java_2.8.6-1+deb11u1_all.deb
         mkdir -p /tmp/artifacts
diff --git a/dockers/docker-database/Dockerfile.j2 b/dockers/docker-database/Dockerfile.j2
index 22e88275e..3b0de019e 100644
--- a/dockers/docker-database/Dockerfile.j2
+++ b/dockers/docker-database/Dockerfile.j2
@@ -12,6 +12,9 @@ RUN apt-get update
 # Install redis-server
 RUN apt-get install -y redis-tools redis-server
 
+# Install click for CLI
+RUN pip3 install click
+
 {% if docker_database_debs.strip() -%}
 # Copy locally-built Debian package dependencies
 {{ copy_files("debs/", docker_database_debs.split(' '), "/debs/") }}
diff --git a/rules/docker-database.mk b/rules/docker-database.mk
index 888031a7b..5fb090835 100644
--- a/rules/docker-database.mk
+++ b/rules/docker-database.mk
@@ -5,7 +5,8 @@ DOCKER_DATABASE = $(DOCKER_DATABASE_STEM).gz
 DOCKER_DATABASE_DBG = $(DOCKER_DATABASE_STEM)-$(DBG_IMAGE_MARK).gz
 
 $(DOCKER_DATABASE)_DEPENDS += $(LIBSWSSCOMMON) \
-                              $(SONIC_DB_CLI)
+                              $(SONIC_DB_CLI) \
+                              $(LIB_SONIC_DASH_API)
 
 $(DOCKER_DATABASE)_PATH = $(DOCKERS_PATH)/$(DOCKER_DATABASE_STEM)
 

From 89137b8fc94e608d5937471585d29a989b0ee736 Mon Sep 17 00:00:00 2001
From: Ze Gan <ganze718@gmail.com>
Date: Fri, 2 Feb 2024 03:14:30 +0800
Subject: [PATCH 0215/1115] [ci]: Enable daily building for ubuntu20.04 to
 every branch (#17520)

- The ubuntu 2004 is needed by 202311
- Because the artifacts of ubuntu2004 are used by other repos, a daily building is needed without an updating of this repo for a long time.

Signed-off-by: Ze Gan <ganze718@gmail.com>
---
 .azure-pipelines/azure-pipelines-build-ubuntu-2004.yml | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/.azure-pipelines/azure-pipelines-build-ubuntu-2004.yml b/.azure-pipelines/azure-pipelines-build-ubuntu-2004.yml
index f3c966c86..a077bb132 100644
--- a/.azure-pipelines/azure-pipelines-build-ubuntu-2004.yml
+++ b/.azure-pipelines/azure-pipelines-build-ubuntu-2004.yml
@@ -9,6 +9,16 @@ trigger:
   branches:
     include:
     - master
+    - 202???
+
+schedules:
+- cron: "0 0 * * *"
+  displayName: Daily build
+  branches:
+    include:
+      - master
+      - 202???
+  always: true
 
 stages:
 - stage: Build

From 892f171b80e2f6a2e22535640bc5a62cb2b46915 Mon Sep 17 00:00:00 2001
From: wenyiz2021 <91497961+wenyiz2021@users.noreply.github.com>
Date: Thu, 1 Feb 2024 17:44:48 -0800
Subject: [PATCH 0216/1115] [Master] [DNX SAI] Update DNX SAI to 9.2.X and SDK
 on master branch (#17935)

SAI 9.2.x was sanitized and posted on 202305 branch: https://github.com/sonic-net/sonic-buildimage/pull/17432/files

Posting SAI 9.2.x to master branch also.

26607678
---
 platform/broadcom/sai-modules.mk     | 2 +-
 platform/broadcom/sai.mk             | 6 +++---
 platform/broadcom/saibcm-modules-dnx | 2 +-
 3 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/platform/broadcom/sai-modules.mk b/platform/broadcom/sai-modules.mk
index dce19b622..1666b9590 100644
--- a/platform/broadcom/sai-modules.mk
+++ b/platform/broadcom/sai-modules.mk
@@ -10,7 +10,7 @@ $(BRCM_OPENNSL_KERNEL)_MACHINE = broadcom
 SONIC_DPKG_DEBS += $(BRCM_OPENNSL_KERNEL)
 
 # SAI bcm modules for DNX family ASIC
-BRCM_DNX_OPENNSL_KERNEL_VERSION = 7.1.0.0
+BRCM_DNX_OPENNSL_KERNEL_VERSION = 9.2.0.0
 
 BRCM_DNX_OPENNSL_KERNEL = opennsl-modules-dnx_$(BRCM_DNX_OPENNSL_KERNEL_VERSION)_amd64.deb
 $(BRCM_DNX_OPENNSL_KERNEL)_SRC_PATH = $(PLATFORM_PATH)/saibcm-modules-dnx
diff --git a/platform/broadcom/sai.mk b/platform/broadcom/sai.mk
index eea4f47a4..18210ecef 100644
--- a/platform/broadcom/sai.mk
+++ b/platform/broadcom/sai.mk
@@ -1,9 +1,9 @@
 LIBSAIBCM_XGS_VERSION = 10.1.0.0
-LIBSAIBCM_DNX_VERSION = 7.1.111.1
+LIBSAIBCM_DNX_VERSION = 9.2.12.1
 LIBSAIBCM_XGS_BRANCH_NAME = SAI_10.1.0_GA
-LIBSAIBCM_DNX_BRANCH_NAME = REL_7.0_SAI_1.11
+LIBSAIBCM_DNX_BRANCH_NAME = SAI_9.2.0.3
 LIBSAIBCM_XGS_URL_PREFIX = "https://sonicstorage.blob.core.windows.net/public/sai/sai-broadcom/$(LIBSAIBCM_XGS_BRANCH_NAME)/$(LIBSAIBCM_XGS_VERSION)/xgs"
-LIBSAIBCM_DNX_URL_PREFIX = "https://sonicstorage.blob.core.windows.net/public/sai/bcmsai/$(LIBSAIBCM_DNX_BRANCH_NAME)/$(LIBSAIBCM_DNX_VERSION)"
+LIBSAIBCM_DNX_URL_PREFIX = "https://sonicstorage.blob.core.windows.net/public/sai/sai-broadcom/$(LIBSAIBCM_DNX_BRANCH_NAME)/$(LIBSAIBCM_DNX_VERSION)/dnx"
 
 BRCM_XGS_SAI = libsaibcm_$(LIBSAIBCM_XGS_VERSION)_amd64.deb
 $(BRCM_XGS_SAI)_URL = "$(LIBSAIBCM_XGS_URL_PREFIX)/$(BRCM_XGS_SAI)"
diff --git a/platform/broadcom/saibcm-modules-dnx b/platform/broadcom/saibcm-modules-dnx
index 504485ceb..21cceea21 160000
--- a/platform/broadcom/saibcm-modules-dnx
+++ b/platform/broadcom/saibcm-modules-dnx
@@ -1 +1 @@
-Subproject commit 504485cebcb6c1ffe0ba6ea19155c88be46ac51a
+Subproject commit 21cceea219c117fed4dac7af834b403c6ebc827e

From 665184ee4363b3e0970a4883a7ea38f9bbc4041b Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Fri, 2 Feb 2024 16:32:19 +0800
Subject: [PATCH 0217/1115] [submodule] Update submodule sonic-platform-common
 to the latest HEAD automatically (#18010)

#### Why I did it
src/sonic-platform-common
```
* 538ec67 - (HEAD -> master, origin/master, origin/HEAD) Tx/Rx power values should be rounded up to 3 decimal places (#432) (6 hours ago) [mihirpat1]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-platform-common | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-platform-common b/src/sonic-platform-common
index 65e3cc3d8..538ec672b 160000
--- a/src/sonic-platform-common
+++ b/src/sonic-platform-common
@@ -1 +1 @@
-Subproject commit 65e3cc3d8ddac83231cdd15a460eb5128410a135
+Subproject commit 538ec672b3bfd789559c6c3c750db6f35e8770f6

From 6c258bec644880c2087ee782e0216dc7a5f82f2d Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sat, 3 Feb 2024 16:32:18 +0800
Subject: [PATCH 0218/1115] [submodule] Update submodule sonic-swss-common to
 the latest HEAD automatically (#18021)

#### Why I did it
src/sonic-swss-common
```
* 3c3ae57 - (HEAD -> master, origin/master, origin/HEAD) Provide build flag to Disable compilation of libyang dependent interfaces (#853) (5 hours ago) [Vivek]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-swss-common | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-swss-common b/src/sonic-swss-common
index 253ceb619..3c3ae5710 160000
--- a/src/sonic-swss-common
+++ b/src/sonic-swss-common
@@ -1 +1 @@
-Subproject commit 253ceb61916fabbf8f261aa9c7507e33d8628312
+Subproject commit 3c3ae571051e7bc308e2ec41928c936af1feb2f8

From 185d2f4e62408cd6a91c11562491420cc40b2f41 Mon Sep 17 00:00:00 2001
From: StormLiangMS <89824293+StormLiangMS@users.noreply.github.com>
Date: Sun, 4 Feb 2024 10:30:58 +0800
Subject: [PATCH 0219/1115] fix the compile issue for slim image (#18015)

Why I did it
The PR introduced a bug for slim image build, #17905, by which the sonic_asic_platform is missing when build docker image for slim image.

[ building ] [ target/docker-dhcp-relay.gz ]
/sonic/dockers/docker-dhcp-relay/cli-plugin-tests /sonic
/sonic
Traceback (most recent call last):
  File "/usr/local/bin/j2", line 8, in <module>
    sys.exit(main())
  File "/usr/local/lib/python3.9/dist-packages/j2cli/cli.py", line 202, in main
    output = render_command(
  File "/usr/local/lib/python3.9/dist-packages/j2cli/cli.py", line 186, in render_command
    result = renderer.render(args.template, context)
  File "/usr/local/lib/python3.9/dist-packages/j2cli/cli.py", line 85, in render
    return self._env \
  File "/usr/lib/python3/dist-packages/jinja2/environment.py", line 1090, in render
    self.environment.handle_exception()
  File "/usr/lib/python3/dist-packages/jinja2/environment.py", line 832, in handle_exception
    reraise(*rewrite_traceback_stack(source=source))
  File "/usr/lib/python3/dist-packages/jinja2/_compat.py", line 28, in reraise
    raise value.with_traceback(tb)
  File "/sonic/dockers/docker-dhcp-relay/Dockerfile.j2", line 48, in top-level template code
    {% if build_reduce_image_size != "y" or sonic_asic_platform != "broadcom" %}
jinja2.exceptions.UndefinedError: 'sonic_asic_platform' is undefined
make: *** [slave.mk:1072: target/docker-dhcp-relay.gz] Error 1
make: *** Waiting for unfinished jobs....
[ finished ] [ target/docker-swss-layer-bullseye.gz ]
[ finished ] [ target/docker-syncd-brcm-dnx.gz ]
make[1]: *** [Makefile.work:608: target/sonic-broadcom.bin] Error 2
make[1]: Leaving directory '/data/work/1/s'
make: *** [Makefile:41: target/sonic-broadcom.bin] Error 2
And why it slipped the PR test? PR test doesn't compile with slim option, it won't check sonic_asic_platform != "broadcom" for PR build.

Work item tracking
Microsoft ADO (number only):
How I did it
Export sonic_asic_platform for docker build in slave.mk

How to verify it
build with slim image option.
---
 slave.mk | 1 +
 1 file changed, 1 insertion(+)

diff --git a/slave.mk b/slave.mk
index 2e35874c6..8473b2b3e 100644
--- a/slave.mk
+++ b/slave.mk
@@ -1136,6 +1136,7 @@ $(addprefix $(TARGET_PATH)/, $(DOCKER_IMAGES)) : $(TARGET_PATH)/%.gz : .platform
 		# Export variables for j2. Use path for unique variable names, e.g. docker_orchagent_debs
 		export include_system_eventd="$(INCLUDE_SYSTEM_EVENTD)"
 		export build_reduce_image_size="$(BUILD_REDUCE_IMAGE_SIZE)"
+		export sonic_asic_platform="$(patsubst %-$(CONFIGURED_ARCH),%,$(CONFIGURED_PLATFORM))"
 		$(eval export $(subst -,_,$(notdir $($*.gz_PATH)))_debs=$(shell printf "$(subst $(SPACE),\n,$(call expand,$($*.gz_DEPENDS),RDEPENDS))\n" | awk '!a[$$0]++'))
 		$(eval export $(subst -,_,$(notdir $($*.gz_PATH)))_pydebs=$(shell printf "$(subst $(SPACE),\n,$(call expand,$($*.gz_PYTHON_DEBS)))\n" | awk '!a[$$0]++'))
 		$(eval export $(subst -,_,$(notdir $($*.gz_PATH)))_whls=$(shell printf "$(subst $(SPACE),\n,$(call expand,$($*.gz_PYTHON_WHEELS)))\n" | awk '!a[$$0]++'))

From 412cd7acbfb2bb2b987fbc5643c00aad5b77cd06 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Mon, 5 Feb 2024 14:33:07 +0800
Subject: [PATCH 0220/1115] [submodule] Update submodule sonic-dash-api to the
 latest HEAD automatically (#18017)

#### Why I did it
src/sonic-dash-api
```
* ec15bc7 - (HEAD -> master, origin/master, origin/HEAD) Revert "rename VnetMapping.action_type" (#17) (2 hours ago) [Ze Gan]
* ad0f59e - Add unspecified default value to all enums (2 days ago) [Lawrence Lee]
*   dd844b1 - Merge branch 'add-enum-default' of github.com:theasianpianist/sonic-dash-api into add-enum-default (4 days ago) [Lawrence Lee]
|\
| * 4b31135 - Merge branch 'master' into add-enum-default (4 days ago) [Lawrence Lee]
* | 4b41ea7 - rename VnetMapping.action_type (4 days ago) [Lawrence Lee]
|/
* b1ab99f - Add unspecified default value to all enums (4 days ago) [Lawrence Lee]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-dash-api | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-dash-api b/src/sonic-dash-api
index 8f481de41..ec15bc76c 160000
--- a/src/sonic-dash-api
+++ b/src/sonic-dash-api
@@ -1 +1 @@
-Subproject commit 8f481de41a82366a49ebcae71288d51792aebd25
+Subproject commit ec15bc76c2435ae20c5034aa3fa01e05b5e59bc1

From e1a8d2a6e8077fe8ee6a2507aae75663120bc14a Mon Sep 17 00:00:00 2001
From: Stepan Blyshchak <38952541+stepanblyschak@users.noreply.github.com>
Date: Mon, 5 Feb 2024 10:00:29 +0200
Subject: [PATCH 0221/1115] [nvidia][syncd] fix incorrect permission of /tmp in
 syncd container (#17777)

Fixes #16034
---
 platform/mellanox/nv-syncd-shared/nv-syncd-shared.service | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/platform/mellanox/nv-syncd-shared/nv-syncd-shared.service b/platform/mellanox/nv-syncd-shared/nv-syncd-shared.service
index a298b4fae..e39506f58 100644
--- a/platform/mellanox/nv-syncd-shared/nv-syncd-shared.service
+++ b/platform/mellanox/nv-syncd-shared/nv-syncd-shared.service
@@ -10,7 +10,7 @@ PartOf=syncd.service
 Type=oneshot
 RemainAfterExit=yes
 ExecStart=rm -rf /tmp/nv-syncd-shared/
-ExecStart=mkdir -p /tmp/nv-syncd-shared/
+ExecStart=mkdir -m 777 -p /tmp/nv-syncd-shared/
 
 [Install]
 WantedBy=sonic.target

From 529031210fd61749d09863e0f792aa91ddbee9af Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Mon, 5 Feb 2024 16:32:54 +0800
Subject: [PATCH 0222/1115] [submodule] Update submodule sonic-sairedis to the
 latest HEAD automatically (#18019)

#### Why I did it
src/sonic-sairedis
```
* e5b8d4e - (HEAD -> master, origin/master, origin/HEAD) Make changes to support compiling on Bookworm (with GCC 12) (#1344) (3 days ago) [Saikrishna Arcot]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-sairedis | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-sairedis b/src/sonic-sairedis
index 5b2a517d9..e5b8d4e56 160000
--- a/src/sonic-sairedis
+++ b/src/sonic-sairedis
@@ -1 +1 @@
-Subproject commit 5b2a517d940d295b56914abc9bb08a349ed80420
+Subproject commit e5b8d4e567352b96f70a00cb08d60b864b11b9e8

From 0aacc1f28ea136b7e9d82bd61bce70fd14eeda04 Mon Sep 17 00:00:00 2001
From: dbarashinvd <105214075+dbarashinvd@users.noreply.github.com>
Date: Mon, 5 Feb 2024 19:39:55 +0200
Subject: [PATCH 0223/1115] [Mellanox] fix sysfs reading that gets garbage end
 of line using strip (#17830)

- Why I did it
when reading sysfs fd upon python poller events, there's end of line garbage like "# 012" (without space between the 2 parts) trailing the real value of 1 or 0

- How I did it
using python strip() to remove end of line

- How to verify it
run the CMIS host management feature on a switch
wait few minutes until switch completes boot up sequence including CMIS host manager
then disconnect or reconnect a port to create a poller event
---
 .../mlnx-platform-api/sonic_platform/modules_mgmt.py       | 7 ++-----
 1 file changed, 2 insertions(+), 5 deletions(-)

diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/modules_mgmt.py b/platform/mellanox/mlnx-platform-api/sonic_platform/modules_mgmt.py
index f69d00772..ae7064f3a 100644
--- a/platform/mellanox/mlnx-platform-api/sonic_platform/modules_mgmt.py
+++ b/platform/mellanox/mlnx-platform-api/sonic_platform/modules_mgmt.py
@@ -1,5 +1,5 @@
 #
-# Copyright (c) 2023 NVIDIA CORPORATION & AFFILIATES.
+# Copyright (c) 2023-2024 NVIDIA CORPORATION & AFFILIATES.
 # Apache-2.0
 #
 # Licensed under the Apache License, Version 2.0 (the "License");
@@ -280,13 +280,10 @@ def run(self):
                 self.fds_events_count_dict[module_obj.port_num][fd_name] += 1
                 try:
                     module_fd.seek(0)
-                    val = module_fd.read()
+                    val = module_fd.read().strip()
                     logger.log_info("dynamic detection got module_obj {} with port {} from fd number {} path {} val {} count {}"
                                   .format(module_obj, module_obj.port_num, fd, module_fd_path
                                           , val, self.fds_events_count_dict[module_obj.port_num]))
-                    # workaround for garbage received after the 0 or 1 value of sysfs i.e. 0#012 or 1#012
-                    if len(val) > 1:
-                        val = val[0]
                     if self.is_dummy_event(int(val), module_obj):
                         logger.log_info(f"dynamic detection dummy event port {module_obj.port_num} from fd number {fd}")
                         continue

From 2f35079979368c5cbba53876af11b8b51ac98f3f Mon Sep 17 00:00:00 2001
From: Yevhen Fastiuk <yfastiuk@nvidia.com>
Date: Mon, 5 Feb 2024 19:41:16 +0200
Subject: [PATCH 0224/1115] [Mellanox] Fix uninitialized variable on module
 plug event (#17011)

- Why I did it
To fix uninitialized variable

- How I did it
Add initial value

Signed-off-by: Yevhen Fastiuk <yfastiuk@nvidia.com>
---
 .../mellanox/mlnx-platform-api/sonic_platform/sfp_event.py     | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/sfp_event.py b/platform/mellanox/mlnx-platform-api/sonic_platform/sfp_event.py
index c390e9a4d..133001020 100644
--- a/platform/mellanox/mlnx-platform-api/sonic_platform/sfp_event.py
+++ b/platform/mellanox/mlnx-platform-api/sonic_platform/sfp_event.py
@@ -1,5 +1,5 @@
 #
-# Copyright (c) 2019-2022 NVIDIA CORPORATION & AFFILIATES.
+# Copyright (c) 2019-2024 NVIDIA CORPORATION & AFFILIATES.
 # Apache-2.0
 #
 # Licensed under the Apache License, Version 2.0 (the "License");
@@ -336,6 +336,7 @@ def on_pmpe(self, fd_p):
         uint32_t_p_assign(port_cnt_p, 0)
         label_port_list = []
         module_state = 0
+        error_type = pmpe_t.error_type
 
         rc = sx_lib_host_ifc_recv(fd_p, pkt, pkt_size_p, recv_info_p)
         if rc != 0:

From c323ccfa723303c832df89c19998d6927529432c Mon Sep 17 00:00:00 2001
From: Yaqiang Zhu <zyq1512099831@gmail.com>
Date: Tue, 6 Feb 2024 02:25:55 +0800
Subject: [PATCH 0225/1115] [dhcp_server][yang] Update supported option type to
 string (#18029)

---
 src/sonic-yang-models/doc/Configuration.md    |  2 +-
 .../tests/files/sample_config_db.json         |  2 +-
 .../tests/dhcp_server_ipv4.json               |  4 +--
 .../tests_config/dhcp_server_ipv4.json        | 26 +++++++++----------
 .../yang-models/sonic-dhcp-server-ipv4.yang   |  2 +-
 5 files changed, 18 insertions(+), 18 deletions(-)

diff --git a/src/sonic-yang-models/doc/Configuration.md b/src/sonic-yang-models/doc/Configuration.md
index 269a60f67..fb30dc422 100644
--- a/src/sonic-yang-models/doc/Configuration.md
+++ b/src/sonic-yang-models/doc/Configuration.md
@@ -1024,7 +1024,7 @@ IPV4 DHPC Server related configuration are defined in **DHCP_SERVER_IPV4**, **DH
     "DHCP_SERVER_IPV4_CUSTOMIZED_OPTIONS": {
         "option60": {
             "id": 60,
-            "type": "text",
+            "type": "string",
             "value": "dummy_value"
         }
     },
diff --git a/src/sonic-yang-models/tests/files/sample_config_db.json b/src/sonic-yang-models/tests/files/sample_config_db.json
index 8fc127b2c..f54e9f588 100644
--- a/src/sonic-yang-models/tests/files/sample_config_db.json
+++ b/src/sonic-yang-models/tests/files/sample_config_db.json
@@ -1970,7 +1970,7 @@
         "DHCP_SERVER_IPV4_CUSTOMIZED_OPTIONS": {
             "option60": {
                 "id": "60",
-                "type": "text",
+                "type": "string",
                 "value": "dummy_value"
             }
         },
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/dhcp_server_ipv4.json b/src/sonic-yang-models/tests/yang_model_tests/tests/dhcp_server_ipv4.json
index 4c65925b0..13da6d717 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests/dhcp_server_ipv4.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests/dhcp_server_ipv4.json
@@ -43,8 +43,8 @@
         "desc": "Configure DHCP port in DHCP_SERVER_IPV4_PORT table which is no exist.",
         "eStrKey": "InvalidValue"
     },
-    "DHCP_SERVER_IPV4_CUSTOMIZED_OPTIONS_TYPE_VALID_VALUE_TEXT": {
-        "desc": "Add text type of DHCP_SERVER_IPV4_CUSTOMIZED_OPTIONS."
+    "DHCP_SERVER_IPV4_CUSTOMIZED_OPTIONS_TYPE_VALID_VALUE_STRING": {
+        "desc": "Add string type of DHCP_SERVER_IPV4_CUSTOMIZED_OPTIONS."
     },
     "DHCP_SERVER_IPV4_CUSTOMIZED_OPTIONS_TYPE_VALID_VALUE_IPV4_ADDRESS": {
         "desc": "Add ipv4-address type of DHCP_SERVER_IPV4_CUSTOMIZED_OPTIONS."
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/dhcp_server_ipv4.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/dhcp_server_ipv4.json
index 8ee25a164..9e0f6f686 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/dhcp_server_ipv4.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/dhcp_server_ipv4.json
@@ -63,7 +63,7 @@
                     {
                         "name": "option60",
                         "id": 60,
-                        "type": "text",
+                        "type": "string",
                         "value": "dummy_value"
                     }
                 ]
@@ -212,7 +212,7 @@
                     {
                         "name": "option60",
                         "id": 60,
-                        "type": "text",
+                        "type": "string",
                         "value": "dummy_value"
                     }
                 ]
@@ -272,7 +272,7 @@
                     {
                         "name": "option60",
                         "id": 60,
-                        "type": "text",
+                        "type": "string",
                         "value": "dummy_value"
                     }
                 ]
@@ -325,14 +325,14 @@
             }
         }
     },
-    "DHCP_SERVER_IPV4_CUSTOMIZED_OPTIONS_TYPE_VALID_VALUE_TEXT": {
+    "DHCP_SERVER_IPV4_CUSTOMIZED_OPTIONS_TYPE_VALID_VALUE_STRING": {
         "sonic-dhcp-server-ipv4:sonic-dhcp-server-ipv4": {
             "sonic-dhcp-server-ipv4:DHCP_SERVER_IPV4_CUSTOMIZED_OPTIONS": {
                 "DHCP_SERVER_IPV4_CUSTOMIZED_OPTIONS_LIST": [
                     {
                         "name": "option60",
                         "id": 60,
-                        "type": "text",
+                        "type": "string",
                         "value": "dummy_value"
                     }
                 ]
@@ -402,7 +402,7 @@
                     {
                         "name": "option60",
                         "id": 60,
-                        "type": "texts",
+                        "type": "text",
                         "value": "dummy_value"
                     }
                 ]
@@ -527,7 +527,7 @@
                     {
                         "name": "option60",
                         "id": 60,
-                        "type": "text",
+                        "type": "string",
                         "value": "dummy_value"
                     }
                 ]
@@ -609,7 +609,7 @@
                     {
                         "name": "option60",
                         "id": 60,
-                        "type": "text",
+                        "type": "string",
                         "value": "dummy_value"
                     }
                 ]
@@ -691,7 +691,7 @@
                     {
                         "name": "option60",
                         "id": 60,
-                        "type": "text",
+                        "type": "string",
                         "value": "dummy_value"
                     }
                 ]
@@ -773,7 +773,7 @@
                     {
                         "name": "option60",
                         "id": 60,
-                        "type": "text",
+                        "type": "string",
                         "value": "dummy_value"
                     }
                 ]
@@ -855,7 +855,7 @@
                     {
                         "name": "option60",
                         "id": 60,
-                        "type": "text",
+                        "type": "string",
                         "value": "dummy_value"
                     }
                 ]
@@ -897,7 +897,7 @@
                 "DHCP_SERVER_IPV4_CUSTOMIZED_OPTIONS_LIST": [
                     {
                         "name": "option60",
-                        "type": "text",
+                        "type": "string",
                         "value": "dummy_value"
                     }
                 ]
@@ -911,7 +911,7 @@
                     {
                         "name": "option60",
                         "id": 60,
-                        "type": "text"
+                        "type": "string"
                     }
                 ]
             }
diff --git a/src/sonic-yang-models/yang-models/sonic-dhcp-server-ipv4.yang b/src/sonic-yang-models/yang-models/sonic-dhcp-server-ipv4.yang
index 46d31faa3..5a3605d70 100644
--- a/src/sonic-yang-models/yang-models/sonic-dhcp-server-ipv4.yang
+++ b/src/sonic-yang-models/yang-models/sonic-dhcp-server-ipv4.yang
@@ -139,7 +139,7 @@ module sonic-dhcp-server-ipv4 {
                 leaf type {
                     description "Type of customized option, for standard DHCP option, this field is invalid";
                     type enumeration {
-                        enum text;
+                        enum string;
                         enum ipv4-address;
                         enum uint8;
                         enum uint16;

From ea02734b8d126074eab9de47d274221acc91e3b3 Mon Sep 17 00:00:00 2001
From: Oleksandr Ivantsiv <oivantsiv@nvidia.com>
Date: Mon, 5 Feb 2024 10:26:46 -0800
Subject: [PATCH 0226/1115] [dhcp-server] Change the kea-dhcp4 PID file
 directory to tmpfs. (#17974)

---
 dockers/docker-dhcp-server/supervisord.conf | 1 +
 1 file changed, 1 insertion(+)

diff --git a/dockers/docker-dhcp-server/supervisord.conf b/dockers/docker-dhcp-server/supervisord.conf
index bf368376f..54df6bd81 100644
--- a/dockers/docker-dhcp-server/supervisord.conf
+++ b/dockers/docker-dhcp-server/supervisord.conf
@@ -61,3 +61,4 @@ stdout_logfile=syslog
 stderr_logfile=syslog
 dependent_startup=true
 dependent_startup_wait_for=dhcpservd:running
+environment=KEA_PIDFILE_DIR=/tmp/

From 3d9cf77c26a25271f30f736ac17248681be185fe Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Tue, 6 Feb 2024 16:32:18 +0800
Subject: [PATCH 0227/1115] [submodule] Update submodule sonic-utilities to the
 latest HEAD automatically (#18049)

#### Why I did it
src/sonic-utilities
```
* b5487357 - (HEAD -> master, origin/master, origin/HEAD) [route_check.py] account static routes in route_check.py (#3120) (9 hours ago) [Stepan Blyshchak]
* 64e1f9f4 - [Mellanox buffer migrator] Do not touch the buffer model on generic SKUs if the buffer configuration is empty (#3114) (19 hours ago) [Stephen Sun]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-utilities | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-utilities b/src/sonic-utilities
index 3d45c0c65..b54873575 160000
--- a/src/sonic-utilities
+++ b/src/sonic-utilities
@@ -1 +1 @@
-Subproject commit 3d45c0c65106d3ba744b20d9f2276f12430244a6
+Subproject commit b54873575fc446afdbd8f2fd6fa721e3e60398a5

From 858107eb28861808f416616a0a76606388700212 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Tue, 6 Feb 2024 16:32:22 +0800
Subject: [PATCH 0228/1115] [submodule] Update submodule sonic-swss to the
 latest HEAD automatically (#18048)

#### Why I did it
src/sonic-swss
```
* d566e15a - (HEAD -> master, origin/master, origin/HEAD) Allow L4 port range egress ACL rules on DNX (#3014) (9 hours ago) [arista-nwolfe]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-swss | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-swss b/src/sonic-swss
index 41330abf9..d566e15a8 160000
--- a/src/sonic-swss
+++ b/src/sonic-swss
@@ -1 +1 @@
-Subproject commit 41330abf944bffd41e7b15e9df84ee4d44e30bd2
+Subproject commit d566e15a86b4064a2abdb0b2b3edf3ef56bdb666

From c8371422fba3117472bf40ea47beb1c7a0fe8794 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Tue, 6 Feb 2024 16:32:27 +0800
Subject: [PATCH 0229/1115] [submodule] Update submodule dhcprelay to the
 latest HEAD automatically (#18046)

#### Why I did it
src/dhcprelay
```
* 363fa06 - (HEAD -> master, origin/master, origin/HEAD) Skip vlans with no dhcpv6 server configured (#46) (8 hours ago) [kellyyeh]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/dhcprelay | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/dhcprelay b/src/dhcprelay
index 5ae186f4a..363fa060f 160000
--- a/src/dhcprelay
+++ b/src/dhcprelay
@@ -1 +1 @@
-Subproject commit 5ae186f4a6c25647f5ce7b4d2c884b08423455e7
+Subproject commit 363fa060f8b1752b0a3007b12eb81da35be24ee6

From 74494010e10bd40b512b83e8cc0f4ee6f2cb40f6 Mon Sep 17 00:00:00 2001
From: zitingguo-ms <zitingguo@microsoft.com>
Date: Wed, 7 Feb 2024 09:29:40 +0800
Subject: [PATCH 0230/1115] [Broadcom] Upgrade xgs SAI to 10.1.6.0 (#18044)

Why I did it
Upgrade the xgs SAI version to 10.1.6.0 to include the following fix:

10.1.6.0: [CS00012332630][SAI_BRANCH rel_ocp_sai_10_1] SAI - OTHER - [SAI BUG] sflow use psample to send packet, but the psample in linux version is not right.
10.1.4.0: [CS00012329827]ECMP LB traffic polarization, configure hash_offset along with hash_seed attr
10.1.3.0: Double commit test code fixes in EM for 10.1.
10.1.2.0: fix ODP packaging in rel_ocp_sai_10_1
10.1.1.0: Use knet-cb procfs path for DNX port speed sampling rate (does not use new genl)
Work item tracking
Microsoft ADO (number only): 26720003
How I did it
Upgrade xgs SAI version in sai.mk file.

How to verify it
Run full qual on s6100 T1: https://elastictest.org/scheduler/testplan/65c1c2e69e3e72f540cae34b
---
 platform/broadcom/sai.mk | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/platform/broadcom/sai.mk b/platform/broadcom/sai.mk
index 18210ecef..fab50fb57 100644
--- a/platform/broadcom/sai.mk
+++ b/platform/broadcom/sai.mk
@@ -1,4 +1,4 @@
-LIBSAIBCM_XGS_VERSION = 10.1.0.0
+LIBSAIBCM_XGS_VERSION = 10.1.6.0
 LIBSAIBCM_DNX_VERSION = 9.2.12.1
 LIBSAIBCM_XGS_BRANCH_NAME = SAI_10.1.0_GA
 LIBSAIBCM_DNX_BRANCH_NAME = SAI_9.2.0.3

From 18bba22f88fa8648e009931db11c7405b9772111 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Wed, 7 Feb 2024 16:32:37 +0800
Subject: [PATCH 0231/1115] [submodule] Update submodule sonic-utilities to the
 latest HEAD automatically (#18052)

#### Why I did it
src/sonic-utilities
```
* 0408226f - (HEAD -> master, origin/master, origin/HEAD) Fix `sudo config load_mgmt_config` fails with error "File /var/run/dhclient.eth0.pid does not exist" (#3149) (18 hours ago) [Mai Bui]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-utilities | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-utilities b/src/sonic-utilities
index b54873575..0408226f2 160000
--- a/src/sonic-utilities
+++ b/src/sonic-utilities
@@ -1 +1 @@
-Subproject commit b54873575fc446afdbd8f2fd6fa721e3e60398a5
+Subproject commit 0408226f26287bd85987579e7b6d7ac9bb86beb2

From 22ac869f55ff97af2374cf603b8eb20a3cd68ea0 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Wed, 7 Feb 2024 16:32:41 +0800
Subject: [PATCH 0232/1115] [submodule] Update submodule sonic-swss to the
 latest HEAD automatically (#18051)

#### Why I did it
src/sonic-swss
```
* b18cbac6 - (HEAD -> master, origin/master, origin/HEAD) [Ci] Fix the test script naming issue (#3021) (81 minutes ago) [xumia]
* 5fd896f6 - [PortOrch] Add FEC codeword errors in port stats (#3029) (87 minutes ago) [vdahiya12]
* 77d56e6e - Fix the Orchagent crash seen during Port channel OC test cases. (#3042) (9 hours ago) [saksarav-nokia]
* 4d470592 - Fix memory leak and object copying bugs in orchagent (#3017) (10 hours ago) [Saikrishna Arcot]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-swss | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-swss b/src/sonic-swss
index d566e15a8..b18cbac60 160000
--- a/src/sonic-swss
+++ b/src/sonic-swss
@@ -1 +1 @@
-Subproject commit d566e15a86b4064a2abdb0b2b3edf3ef56bdb666
+Subproject commit b18cbac601bac8d19a575c97409de7070055e91c

From f9e510ccfa633966a0a64e09843243d915b9f905 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Wed, 7 Feb 2024 16:32:44 +0800
Subject: [PATCH 0233/1115] [submodule] Update submodule sonic-dash-api to the
 latest HEAD automatically (#18050)

#### Why I did it
src/sonic-dash-api
```
* da6899b - (HEAD -> master, origin/master, origin/HEAD) Add/update fields needed for private link implementation (9 hours ago) [Prince Sunny]
* 960eab3 - Merge branch 'master' into pl-api (33 hours ago) [Prince Sunny]
* bc29979 - Merge branch 'master' into pl-api (4 days ago) [Lawrence Lee]
* 2d565d3 - Merge branch 'master' into pl-api (4 days ago) [Lawrence Lee]
* df6c512 - remove tunnel_key (4 days ago) [Lawrence Lee]
* 4d5ebda - Update proto files for PL (4 days ago) [Lawrence Lee]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-dash-api | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-dash-api b/src/sonic-dash-api
index ec15bc76c..da6899b89 160000
--- a/src/sonic-dash-api
+++ b/src/sonic-dash-api
@@ -1 +1 @@
-Subproject commit ec15bc76c2435ae20c5034aa3fa01e05b5e59bc1
+Subproject commit da6899b8962d8823e315eae0ce563d9d6cf50f41

From fffd6e6607a47364c69555704007153405a4a153 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Wed, 7 Feb 2024 16:32:48 +0800
Subject: [PATCH 0234/1115] [submodule] Update submodule sonic-platform-common
 to the latest HEAD automatically (#18047)

#### Why I did it
src/sonic-platform-common
```
* 888075d - (HEAD -> master, origin/master, origin/HEAD) [ssd_generic] Add support Transcend ssd-health. (#436) (31 hours ago) [Michael Shih]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-platform-common | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-platform-common b/src/sonic-platform-common
index 538ec672b..888075d7a 160000
--- a/src/sonic-platform-common
+++ b/src/sonic-platform-common
@@ -1 +1 @@
-Subproject commit 538ec672b3bfd789559c6c3c750db6f35e8770f6
+Subproject commit 888075d7a8ec40867269a523c1771b3c2d50523a

From 5a2058941551a298584250440c877a71ca842ae8 Mon Sep 17 00:00:00 2001
From: jfeng-arista <98421150+jfeng-arista@users.noreply.github.com>
Date: Wed, 7 Feb 2024 23:45:10 -0800
Subject: [PATCH 0235/1115] Start fabric mgr daemon in swss container. (#17473)

The fabricmgr daemon started in vs environment for testing from #16791, we now start the daemon in product code.
---
 dockers/docker-orchagent/critical_processes.j2 |  1 +
 dockers/docker-orchagent/supervisord.conf.j2   | 13 +++++++++++++
 2 files changed, 14 insertions(+)

diff --git a/dockers/docker-orchagent/critical_processes.j2 b/dockers/docker-orchagent/critical_processes.j2
index 10828b3fa..b9bad7408 100644
--- a/dockers/docker-orchagent/critical_processes.j2
+++ b/dockers/docker-orchagent/critical_processes.j2
@@ -12,6 +12,7 @@ program:fdbsyncd
 program:vlanmgrd
 program:intfmgrd
 program:portmgrd
+program:fabricmgrd
 program:buffermgrd
 program:vrfmgrd
 program:nbrmgrd
diff --git a/dockers/docker-orchagent/supervisord.conf.j2 b/dockers/docker-orchagent/supervisord.conf.j2
index 6c822f464..026958197 100644
--- a/dockers/docker-orchagent/supervisord.conf.j2
+++ b/dockers/docker-orchagent/supervisord.conf.j2
@@ -190,6 +190,19 @@ environment=ASAN_OPTIONS="log_path=/var/log/asan/portmgrd-asan.log{{ asan_extra_
 {% endif %}
 {%- endif %}
 
+[program:fabricmgrd]
+command=/usr/bin/fabricmgrd
+priority=10
+autostart=false
+autorestart=false
+stdout_logfile=syslog
+stderr_logfile=syslog
+dependent_startup=true
+dependent_startup_wait_for=swssconfig:exited
+{% if ENABLE_ASAN == "y" %}
+environment=ASAN_OPTIONS="log_path=/var/log/asan/fabricmgrd-asan.log{{ asan_extra_options }}"
+{% endif %}
+
 {% if is_fabric_asic == 0 %}
 [program:buffermgrd]
 command=/usr/bin/buffermgrd.sh

From f49711f246cdd75b11a894231005456592ae7e2c Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Thu, 8 Feb 2024 16:32:39 +0800
Subject: [PATCH 0236/1115] [submodule] Update submodule sonic-utilities to the
 latest HEAD automatically (#18071)

#### Why I did it
src/sonic-utilities
```
* a3cf5c02 - (HEAD -> master, origin/master, origin/HEAD) Fix the sfputil treats page number as decimal instead of hexadecimal (#3153) (6 hours ago) [Kebo Liu]
* 167f9966 - [Mellanox] Add support of the nvidia-bluefield platform to generate-dump utility. (#3091) (20 hours ago) [Oleksandr Ivantsiv]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-utilities | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-utilities b/src/sonic-utilities
index 0408226f2..a3cf5c024 160000
--- a/src/sonic-utilities
+++ b/src/sonic-utilities
@@ -1 +1 @@
-Subproject commit 0408226f26287bd85987579e7b6d7ac9bb86beb2
+Subproject commit a3cf5c0241f5d0ea2e1e634b0a894510ff1b78b7

From bd4bf761634672ce765b3df1a3bbb03d3fea6c99 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Thu, 8 Feb 2024 16:32:42 +0800
Subject: [PATCH 0237/1115] [submodule] Update submodule sonic-swss to the
 latest HEAD automatically (#18070)

#### Why I did it
src/sonic-swss
```
* b3b6a838 - (HEAD -> master, origin/master, origin/HEAD) [test_mux] Multi-mux-nh full test coverage (#3028) (25 minutes ago) [Nikola Dancejic]
* 3bd01444 - Bfd support for TSA state. (#2926) (6 hours ago) [siqbal1986]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-swss | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-swss b/src/sonic-swss
index b18cbac60..b3b6a8384 160000
--- a/src/sonic-swss
+++ b/src/sonic-swss
@@ -1 +1 @@
-Subproject commit b18cbac601bac8d19a575c97409de7070055e91c
+Subproject commit b3b6a8384aa2cfc2e6cb1c08312af1cbeac5c0c5

From a554ac40a7922c65cc785652cc19d5d306eb7b9f Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Thu, 8 Feb 2024 16:32:49 +0800
Subject: [PATCH 0238/1115] [submodule] Update submodule sonic-sairedis to the
 latest HEAD automatically (#18068)

#### Why I did it
src/sonic-sairedis
```
* a504933 - (HEAD -> master, origin/master, origin/HEAD) Change dash API pipeline name (#1351) (11 hours ago) [Kamil Cudnik]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-sairedis | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-sairedis b/src/sonic-sairedis
index e5b8d4e56..a5049331b 160000
--- a/src/sonic-sairedis
+++ b/src/sonic-sairedis
@@ -1 +1 @@
-Subproject commit e5b8d4e567352b96f70a00cb08d60b864b11b9e8
+Subproject commit a5049331b05f52f73eb8ab3f0a87245739180112

From 7a34d4a275e67cc4ff8d121d3170ebafc2c4e002 Mon Sep 17 00:00:00 2001
From: dbarashinvd <105214075+dbarashinvd@users.noreply.github.com>
Date: Thu, 8 Feb 2024 14:49:56 +0200
Subject: [PATCH 0239/1115] [Mellanox] fix code for warm reboot to work with FW
 controlled ports (#18065)

- Why I did it
Fix the code to work also after warm reboot to work with FW controlled ports.
In warm reboot the control state sysfs of each port does not change unlike reboot or fast boot.

- How I did it
1. Check procfs cmdline if warm reboot done this is due to the fact pmon don't recognize warm reboot when it's taking place since pmon is loaded after warm reboot is finished.
2. If warm reboot done, check in static detection part for each port if it's FW controlled. If so, leave it this way and stop the state machine flow (set it to final state).

- How to verify it
1. Boot a switch with CMIS host management with at least one FW controlled port (non active cables or non cmis cables) then run warm reboot.
2. Verify no errors of sysfs reading appears for control sysfs
---
 .../sonic_platform/modules_mgmt.py            | 32 +++++++++++++++++--
 1 file changed, 30 insertions(+), 2 deletions(-)

diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/modules_mgmt.py b/platform/mellanox/mlnx-platform-api/sonic_platform/modules_mgmt.py
index ae7064f3a..ddc5ac599 100644
--- a/platform/mellanox/mlnx-platform-api/sonic_platform/modules_mgmt.py
+++ b/platform/mellanox/mlnx-platform-api/sonic_platform/modules_mgmt.py
@@ -66,9 +66,13 @@
 SYSFS_INDEPENDENT_FD_FREQ = os.path.join(SYSFS_INDEPENDENT_FD_PREFIX, "frequency")
 SYSFS_INDEPENDENT_FD_FREQ_SUPPORT = os.path.join(SYSFS_INDEPENDENT_FD_PREFIX, "frequency_support")
 IS_INDEPENDENT_MODULE = 'is_independent_module'
+PROC_CMDLINE = "/proc/cmdline"
+CMDLINE_STR_TO_LOOK_FOR = 'SONIC_BOOT_TYPE='
+CMDLINE_VAL_TO_LOOK_FOR = 'fastfast'
 
 MAX_EEPROM_ERROR_RESET_RETRIES = 4
 
+
 class ModulesMgmtTask(threading.Thread):
 
     def __init__(self, namespaces=None, main_thread_stop_event=None, q=None):
@@ -93,6 +97,8 @@ def __init__(self, namespaces=None, main_thread_stop_event=None, q=None):
         self.delete_ports_and_reset_states_dict = {}
         self.setName("ModulesMgmtTask")
         self.register_hw_present_fds = []
+        self.is_warm_reboot = False
+        self.port_control_dict = {}
 
     # SFPs state machine
     def get_sm_func(self, sm, port):
@@ -146,13 +152,35 @@ def run(self):
         num_of_ports = DeviceDataManager.get_sfp_count()
         # create the modules sysfs fds poller
         self.poll_obj = select.poll()
+        # read cmdline to check if warm reboot done. cannot use swsscommon warmstart since this code runs after
+        # warm-reboot is finished. if done, need to read control sysfs per port and act accordingly since modules are
+        # not reset in warm-reboot
+        cmdline_dict = {}
+        proc_cmdline_str = utils.read_str_from_file(PROC_CMDLINE)
+        if CMDLINE_STR_TO_LOOK_FOR in proc_cmdline_str:
+            cmdline_dict[CMDLINE_STR_TO_LOOK_FOR] = proc_cmdline_str.split(CMDLINE_STR_TO_LOOK_FOR)[1]
+        if CMDLINE_STR_TO_LOOK_FOR in cmdline_dict.keys():
+            self.is_warm_reboot = cmdline_dict[CMDLINE_STR_TO_LOOK_FOR] == CMDLINE_VAL_TO_LOOK_FOR
+            logger.log_info(f"system was warm rebooted is_warm_reboot: {self.is_warm_reboot}")
         for port in range(num_of_ports):
             # check sysfs per port whether it's independent mode or legacy
             temp_module_sm = ModuleStateMachine(port_num=port, initial_state=STATE_HW_NOT_PRESENT
                                               , current_state=STATE_HW_NOT_PRESENT)
             module_fd_indep_path = SYSFS_INDEPENDENT_FD_PRESENCE.format(port)
             logger.log_info("system in indep mode: {} port {}".format(self.is_supported_indep_mods_system, port))
-            if self.is_supported_indep_mods_system and os.path.isfile(module_fd_indep_path):
+            if self.is_warm_reboot:
+                logger.log_info("system was warm rebooted is_warm_reboot: {} trying to read control sysfs for port {}"
+                                .format(self.is_warm_reboot, port))
+                port_control_file = SYSFS_INDEPENDENT_FD_FW_CONTROL.format(port)
+                try:
+                    port_control = utils.read_int_from_file(port_control_file, raise_exception=True)
+                    self.port_control_dict[port] = port_control
+                    logger.log_info(f"port control sysfs is {port_control} for port {port}")
+                except Exception as e:
+                    logger.log_error("exception {} for port {} trying to read port control sysfs {}"
+                                     .format(e, port, port_control_file))
+            if (self.is_supported_indep_mods_system and os.path.isfile(module_fd_indep_path)) \
+                    and not (self.is_warm_reboot and 0 == port_control):
                 logger.log_info("system in indep mode: {} port {} reading file {}".format(self.is_supported_indep_mods_system, port, module_fd_indep_path))
                 temp_module_sm.set_is_indep_modules(True)
                 temp_module_sm.set_module_fd_path(module_fd_indep_path)
@@ -380,7 +408,7 @@ def check_if_hw_present(self, port, module_sm_obj, dynamic=False):
                 elif 1 == val_int:
                     logger.log_info("returning {} for val {}".format(STATE_HW_PRESENT, val_int))
                     retval_state = STATE_HW_PRESENT
-                    if not self.is_supported_indep_mods_system:
+                    if not self.is_supported_indep_mods_system or (self.is_warm_reboot and 0 == self.port_control_dict[port] and not dynamic):
                         module_sm_obj.set_final_state(retval_state, detection_method)
                         self.register_fd_for_polling(module_sm_obj, module_sm_obj.module_fd, 'presence')
                     return retval_state

From 4703192d0fd27442e49a6299320706376894d1b1 Mon Sep 17 00:00:00 2001
From: Arvindsrinivasan Lakshmi Narasimhan
 <55814491+arlakshm@users.noreply.github.com>
Date: Thu, 8 Feb 2024 13:01:51 -0800
Subject: [PATCH 0240/1115] [nokia][chassis][voq] update the sai_post_init soc
 file with interrupt ids (#18066)

Update/Add the sai_postinit_cmd.soc with the interrupt-ids

Microsoft ADO 26730061:

How to verify it
Verify on the Chassis LCs
---
 .../0/jr2cp-nokia-18x100g-4x25g-config.bcm    |  1 +
 .../0/sai_postinit_cmd.soc                    | 28 ++++++++++++++++++
 .../1/jr2cp-nokia-18x100g-4x25g-config.bcm    |  1 +
 .../1/sai_postinit_cmd.soc                    | 28 ++++++++++++++++++
 .../0/sai_postinit_cmd.soc                    | 29 +++++++++++++++++++
 .../1/sai_postinit_cmd.soc                    | 29 +++++++++++++++++++
 6 files changed, 116 insertions(+)

diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/0/jr2cp-nokia-18x100g-4x25g-config.bcm b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/0/jr2cp-nokia-18x100g-4x25g-config.bcm
index 9f3064f27..e289de509 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/0/jr2cp-nokia-18x100g-4x25g-config.bcm
+++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/0/jr2cp-nokia-18x100g-4x25g-config.bcm
@@ -2094,3 +2094,4 @@ cmic_dma_abort_in_cold_boot=0
 sai_pfc_dlr_init_capability=0
 trunk_group_max_members=16
 sai_default_cpu_tx_tc=7
+sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc
\ No newline at end of file
diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/0/sai_postinit_cmd.soc b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/0/sai_postinit_cmd.soc
index 8b1378917..80338902b 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/0/sai_postinit_cmd.soc
+++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/0/sai_postinit_cmd.soc
@@ -1 +1,29 @@
+INTeRrupt ENAble id=2209
+INTeRrupt ENAble id=2210
+INTeRrupt ENAble id=2211
+INTeRrupt ENAble id=2212
+INTeRrupt ENAble id=2213
+INTeRrupt ENAble id=2214
+INTeRrupt ENAble id=2215
+INTeRrupt ENAble id=2216
+INTeRrupt ENAble id=2217
+INTeRrupt ENAble id=2218
+INTeRrupt ENAble id=2219
+INTeRrupt ENAble id=2220
+INTeRrupt ENAble id=2221
+INTeRrupt ENAble id=2222
+INTeRrupt ENAble id=2223
+INTeRrupt ENAble id=2224
+INTeRrupt ENAble id=2225
+INTeRrupt ENAble id=2226
 
+INTeRrupt ENAble id=482
+INTeRrupt ENAble id=483
+INTeRrupt ENAble id=484
+INTeRrupt ENAble id=485
+INTeRrupt ENAble id=486
+INTeRrupt ENAble id=487
+INTeRrupt ENAble id=488
+
+INTeRrupt ENAble id=1597
+debug intr error
\ No newline at end of file
diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/1/jr2cp-nokia-18x100g-4x25g-config.bcm b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/1/jr2cp-nokia-18x100g-4x25g-config.bcm
index 27ff4d423..cb112766e 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/1/jr2cp-nokia-18x100g-4x25g-config.bcm
+++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/1/jr2cp-nokia-18x100g-4x25g-config.bcm
@@ -2095,3 +2095,4 @@ cmic_dma_abort_in_cold_boot=0
 sai_pfc_dlr_init_capability=0
 trunk_group_max_members=16
 sai_default_cpu_tx_tc=7
+sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc
\ No newline at end of file
diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/1/sai_postinit_cmd.soc b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/1/sai_postinit_cmd.soc
index 8b1378917..80338902b 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/1/sai_postinit_cmd.soc
+++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/1/sai_postinit_cmd.soc
@@ -1 +1,29 @@
+INTeRrupt ENAble id=2209
+INTeRrupt ENAble id=2210
+INTeRrupt ENAble id=2211
+INTeRrupt ENAble id=2212
+INTeRrupt ENAble id=2213
+INTeRrupt ENAble id=2214
+INTeRrupt ENAble id=2215
+INTeRrupt ENAble id=2216
+INTeRrupt ENAble id=2217
+INTeRrupt ENAble id=2218
+INTeRrupt ENAble id=2219
+INTeRrupt ENAble id=2220
+INTeRrupt ENAble id=2221
+INTeRrupt ENAble id=2222
+INTeRrupt ENAble id=2223
+INTeRrupt ENAble id=2224
+INTeRrupt ENAble id=2225
+INTeRrupt ENAble id=2226
 
+INTeRrupt ENAble id=482
+INTeRrupt ENAble id=483
+INTeRrupt ENAble id=484
+INTeRrupt ENAble id=485
+INTeRrupt ENAble id=486
+INTeRrupt ENAble id=487
+INTeRrupt ENAble id=488
+
+INTeRrupt ENAble id=1597
+debug intr error
\ No newline at end of file
diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/0/sai_postinit_cmd.soc b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/0/sai_postinit_cmd.soc
index 97f62c07c..26b9099a9 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/0/sai_postinit_cmd.soc
+++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/0/sai_postinit_cmd.soc
@@ -36,3 +36,32 @@ phy set 17 reg=0xd137 data=0      lane=2
 phy set 17 reg=0xd138 data=0      lane=2
 phy set 17 reg=0xd133 data=0x1804 lane=2
 
+INTeRrupt ENAble id=2209
+INTeRrupt ENAble id=2210
+INTeRrupt ENAble id=2211
+INTeRrupt ENAble id=2212
+INTeRrupt ENAble id=2213
+INTeRrupt ENAble id=2214
+INTeRrupt ENAble id=2215
+INTeRrupt ENAble id=2216
+INTeRrupt ENAble id=2217
+INTeRrupt ENAble id=2218
+INTeRrupt ENAble id=2219
+INTeRrupt ENAble id=2220
+INTeRrupt ENAble id=2221
+INTeRrupt ENAble id=2222
+INTeRrupt ENAble id=2223
+INTeRrupt ENAble id=2224
+INTeRrupt ENAble id=2225
+INTeRrupt ENAble id=2226
+
+INTeRrupt ENAble id=482
+INTeRrupt ENAble id=483
+INTeRrupt ENAble id=484
+INTeRrupt ENAble id=485
+INTeRrupt ENAble id=486
+INTeRrupt ENAble id=487
+INTeRrupt ENAble id=488
+
+INTeRrupt ENAble id=1597
+debug intr error
\ No newline at end of file
diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/1/sai_postinit_cmd.soc b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/1/sai_postinit_cmd.soc
index ed471c6c1..19c3f73e9 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/1/sai_postinit_cmd.soc
+++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/1/sai_postinit_cmd.soc
@@ -13,3 +13,32 @@ phy set 8 reg=0xd137 data=0      lane=1
 phy set 8 reg=0xd138 data=0      lane=1
 phy set 8 reg=0xd133 data=0x1802 lane=1
 
+INTeRrupt ENAble id=2209
+INTeRrupt ENAble id=2210
+INTeRrupt ENAble id=2211
+INTeRrupt ENAble id=2212
+INTeRrupt ENAble id=2213
+INTeRrupt ENAble id=2214
+INTeRrupt ENAble id=2215
+INTeRrupt ENAble id=2216
+INTeRrupt ENAble id=2217
+INTeRrupt ENAble id=2218
+INTeRrupt ENAble id=2219
+INTeRrupt ENAble id=2220
+INTeRrupt ENAble id=2221
+INTeRrupt ENAble id=2222
+INTeRrupt ENAble id=2223
+INTeRrupt ENAble id=2224
+INTeRrupt ENAble id=2225
+INTeRrupt ENAble id=2226
+
+INTeRrupt ENAble id=482
+INTeRrupt ENAble id=483
+INTeRrupt ENAble id=484
+INTeRrupt ENAble id=485
+INTeRrupt ENAble id=486
+INTeRrupt ENAble id=487
+INTeRrupt ENAble id=488
+
+INTeRrupt ENAble id=1597
+debug intr error
\ No newline at end of file

From 7f3fd1377de9be1d243fadf1b49930170e609389 Mon Sep 17 00:00:00 2001
From: snider-nokia <76123698+snider-nokia@users.noreply.github.com>
Date: Thu, 8 Feb 2024 16:03:05 -0500
Subject: [PATCH 0241/1115] [Nokia-IXR7250E][Devicedata] Update the device data
 for Nokia IXR7250E platform (thermal logging thresholds) (#18063)

These changes adjust Nokia IXR7250 thermal sensor logging thresholds.

Why I did it
To modify the thermal sensor logging thresholds used on LC and Supervisor.

How I did it
Modified the JSON based thermal logging thresholds used to determine when to log current high sensor temperature and hottest sensor margin fluctuations.

How to verify it
Verify that syslog messages indicating current (high) temperature and margin values are only logged when these respective values fluctuate by at least 5 degrees.
---
 .../nokia/x86_64-nokia_ixr7250e_36x400g-r0/platform_ndk.json  | 4 ++--
 device/nokia/x86_64-nokia_ixr7250e_sup-r0/platform_ndk.json   | 4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/platform_ndk.json b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/platform_ndk.json
index f444a14a8..57bc959d7 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/platform_ndk.json
+++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/platform_ndk.json
@@ -50,11 +50,11 @@
     },
     {
       "key": "thermal_log_current_threshold",
-      "intval": 2
+      "intval": 5
     },
     {
       "key": "thermal_log_margin_threshold",
-      "intval": 2
+      "intval": 5
     },
     {
       "key": "thermal_log_min_threshold",
diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/platform_ndk.json b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/platform_ndk.json
index 9d68aacc5..bf7f1ed57 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/platform_ndk.json
+++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/platform_ndk.json
@@ -38,11 +38,11 @@
     },
     {
       "key": "thermal_log_current_threshold",
-      "intval": 3
+      "intval": 5
     },
     {
       "key": "thermal_log_margin_threshold",
-      "intval": 3
+      "intval": 5
     },
     {
       "key": "thermal_log_min_threshold",

From bd47fd1559169b8c2371ad883d2a2f8e77d82cb9 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Fri, 9 Feb 2024 16:32:30 +0800
Subject: [PATCH 0242/1115] [submodule] Update submodule sonic-utilities to the
 latest HEAD automatically (#18078)

#### Why I did it
src/sonic-utilities
```
* 81c5349f - (HEAD -> master, origin/master, origin/HEAD) [chassis] fix show bgp summary when no neighbors are present on one ASIC (#3158) (10 hours ago) [Arvindsrinivasan Lakshmi Narasimhan]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-utilities | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-utilities b/src/sonic-utilities
index a3cf5c024..81c5349f7 160000
--- a/src/sonic-utilities
+++ b/src/sonic-utilities
@@ -1 +1 @@
-Subproject commit a3cf5c0241f5d0ea2e1e634b0a894510ff1b78b7
+Subproject commit 81c5349f7dca6e43dc8e9254f15b24125ccf4090

From 34bdfc8b39754903f8bbeb3f63ce72ef8505c67a Mon Sep 17 00:00:00 2001
From: Saikrishna Arcot <sarcot@microsoft.com>
Date: Fri, 9 Feb 2024 15:56:26 -0800
Subject: [PATCH 0243/1115] Add Bookworm swss-layer (#18062)

Signed-off-by: Saikrishna Arcot <sarcot@microsoft.com>
---
 .../docker-swss-layer-bookworm/Dockerfile.j2  | 24 +++++++++++++++++++
 rules/docker-swss-layer-bookworm.dep          |  9 +++++++
 rules/docker-swss-layer-bookworm.mk           | 14 +++++++++++
 3 files changed, 47 insertions(+)
 create mode 100644 dockers/docker-swss-layer-bookworm/Dockerfile.j2
 create mode 100644 rules/docker-swss-layer-bookworm.dep
 create mode 100644 rules/docker-swss-layer-bookworm.mk

diff --git a/dockers/docker-swss-layer-bookworm/Dockerfile.j2 b/dockers/docker-swss-layer-bookworm/Dockerfile.j2
new file mode 100644
index 000000000..4c9b578eb
--- /dev/null
+++ b/dockers/docker-swss-layer-bookworm/Dockerfile.j2
@@ -0,0 +1,24 @@
+{% from "dockers/dockerfile-macros.j2" import install_debian_packages, install_python_wheels, copy_files %}
+FROM docker-config-engine-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}}
+
+## Make apt-get non-interactive
+ENV DEBIAN_FRONTEND=noninteractive
+
+RUN apt-get update
+
+RUN apt-get install iputils-ping
+
+{% if docker_swss_layer_bookworm_debs.strip() -%}
+# Copy locally-built Debian package dependencies
+{{ copy_files("debs/", docker_swss_layer_bookworm_debs.split(' '), "/debs/") }}
+
+# Install locally-built Debian packages and implicitly install their dependencies
+{{ install_debian_packages(docker_swss_layer_bookworm_debs.split(' ')) }}
+{%- endif %}
+
+RUN apt-get clean -y      && \
+    apt-get autoclean -y  && \
+    apt-get autoremove -y && \
+    rm -rf /debs
+
+ENTRYPOINT ["/usr/local/bin/supervisord"]
diff --git a/rules/docker-swss-layer-bookworm.dep b/rules/docker-swss-layer-bookworm.dep
new file mode 100644
index 000000000..9442cd4f4
--- /dev/null
+++ b/rules/docker-swss-layer-bookworm.dep
@@ -0,0 +1,9 @@
+
+DPATH       := $($(DOCKER_SWSS_LAYER_BOOKWORM)_PATH)
+DEP_FILES   := $(SONIC_COMMON_FILES_LIST) rules/docker-swss-layer-bookworm.mk rules/docker-swss-layer-bookworm.dep
+DEP_FILES   += $(SONIC_COMMON_BASE_FILES_LIST)
+DEP_FILES   += $(shell git ls-files $(DPATH))
+
+$(DOCKER_SWSS_LAYER_BOOKWORM)_CACHE_MODE  := GIT_CONTENT_SHA
+$(DOCKER_SWSS_LAYER_BOOKWORM)_DEP_FLAGS   := $(SONIC_COMMON_FLAGS_LIST)
+$(DOCKER_SWSS_LAYER_BOOKWORM)_DEP_FILES   := $(DEP_FILES)
diff --git a/rules/docker-swss-layer-bookworm.mk b/rules/docker-swss-layer-bookworm.mk
new file mode 100644
index 000000000..a485289ba
--- /dev/null
+++ b/rules/docker-swss-layer-bookworm.mk
@@ -0,0 +1,14 @@
+# bookworm-based docker image for sonic swss layer
+
+DOCKER_SWSS_LAYER_BOOKWORM= docker-swss-layer-bookworm.gz
+$(DOCKER_SWSS_LAYER_BOOKWORM)_PATH = $(DOCKERS_PATH)/docker-swss-layer-bookworm
+
+$(DOCKER_SWSS_LAYER_BOOKWORM)_DEPENDS += $(SWSS)
+$(DOCKER_SWSS_LAYER_BOOKWORM)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE_BOOKWORM)
+
+$(DOCKER_SWSS_LAYER_BOOKWORM)_DBG_DEPENDS = $($(DOCKER_CONFIG_ENGINE_BOOKWORM)_DBG_DEPENDS) \
+                                             $(SWSS_DBG)
+$(DOCKER_SWSS_LAYER_BOOKWORM)_DBG_IMAGE_PACKAGES = $($(DOCKER_CONFIG_ENGINE_BOOKWORM)_DBG_IMAGE_PACKAGES)
+
+SONIC_DOCKER_IMAGES += $(DOCKER_SWSS_LAYER_BOOKWORM)
+SONIC_BOOKWORM_DOCKERS += $(DOCKER_SWSS_LAYER_BOOKWORM)

From 1b5f72127a446d3ea46d7a2d4939a120d3db5642 Mon Sep 17 00:00:00 2001
From: Kebo Liu <kebol@nvidia.com>
Date: Mon, 12 Feb 2024 22:12:57 +0800
Subject: [PATCH 0244/1115] [Mellanox] Remove SFP sensors from sensors.conf
 (#17631)

- Why I did it
The cable thermal sensors will be deprecated from the kernel driver. When cable host management is enabled, NOS will fetch the cable temperature from cable EEPROM, kernel driver will not provide the sysfs anymore.

- How I did it
Remove the relevant sensor form the conf files

- How to verify it
Run sonic mgmt sensor test

Signed-off-by: Kebo Liu <kebol@nvidia.com>
---
 .../x86_64-mlnx_msn2010-r0/sensors.conf       | 22 +++++++
 .../x86_64-mlnx_msn2100-r0/sensors.conf       | 16 +++++
 .../x86_64-mlnx_msn2410-r0/sensors.conf       | 56 ++++++++++++++++
 .../x86_64-mlnx_msn2700-r0/sensors.conf       | 32 +++++++++
 .../x86_64-mlnx_msn2700a1-r0/sensors.conf     | 32 +++++++++
 .../x86_64-mlnx_msn2740-r0/sensors.conf       | 33 ++++++++++
 .../x86_64-mlnx_msn3420-r0/sensors.conf       | 60 +++++++++++++++++
 .../x86_64-mlnx_msn3700-r0/sensors.conf       | 32 +++++++++
 .../sensors_respin.conf                       | 32 +++++++++
 .../sensors_swb_respin.conf                   | 32 +++++++++
 .../x86_64-mlnx_msn3700c-r0/sensors.conf      | 32 +++++++++
 .../sensors_respin.conf                       | 32 +++++++++
 .../sensors_swb_respin.conf                   | 32 +++++++++
 .../x86_64-mlnx_msn3800-r0/sensors.conf       | 64 ++++++++++++++++++
 .../x86_64-mlnx_msn4600-r0/sensors.conf       | 64 ++++++++++++++++++
 .../x86_64-mlnx_msn4600c-r0/sensors.conf      | 64 ++++++++++++++++++
 .../x86_64-mlnx_msn4600c-r0/sensors.conf.a1   | 64 ++++++++++++++++++
 .../sensors_respin.conf                       | 64 ++++++++++++++++++
 .../sensors_respin.conf.a1                    | 64 ++++++++++++++++++
 .../x86_64-mlnx_msn4700-r0/sensors.conf       | 32 +++++++++
 .../x86_64-mlnx_msn4700-r0/sensors.conf.a1    | 32 +++++++++
 .../x86_64-nvidia_sn2201-r0/sensors.conf      |  4 ++
 .../x86_64-nvidia_sn5600-r0/sensors.conf      | 65 +++++++++++++++++++
 23 files changed, 960 insertions(+)

diff --git a/device/mellanox/x86_64-mlnx_msn2010-r0/sensors.conf b/device/mellanox/x86_64-mlnx_msn2010-r0/sensors.conf
index 7f5b023af..9bcfcbe21 100644
--- a/device/mellanox/x86_64-mlnx_msn2010-r0/sensors.conf
+++ b/device/mellanox/x86_64-mlnx_msn2010-r0/sensors.conf
@@ -47,3 +47,25 @@ bus "i2c-2" "i2c-1-mux (chan_id 1)"
         label fan2 "Chassis Fan 2"
         label fan3 "Chassis Fan 3"
         label fan4 "Chassis Fan 4"
+        ignore temp2
+        ignore temp3
+        ignore temp4
+        ignore temp5
+        ignore temp6
+        ignore temp7
+        ignore temp8
+        ignore temp9
+        ignore temp10
+        ignore temp11
+        ignore temp12
+        ignore temp13
+        ignore temp14
+        ignore temp15
+        ignore temp16
+        ignore temp17
+        ignore temp18
+        ignore temp19
+        ignore temp20
+        ignore temp21
+        ignore temp22
+        ignore temp23
diff --git a/device/mellanox/x86_64-mlnx_msn2100-r0/sensors.conf b/device/mellanox/x86_64-mlnx_msn2100-r0/sensors.conf
index e37dd25f0..22b8e4dd8 100644
--- a/device/mellanox/x86_64-mlnx_msn2100-r0/sensors.conf
+++ b/device/mellanox/x86_64-mlnx_msn2100-r0/sensors.conf
@@ -49,3 +49,19 @@ bus "i2c-2" "i2c-1-mux (chan_id 1)"
         label fan2 "Chassis Fan 2"
         label fan3 "Chassis Fan 3"
         label fan4 "Chassis Fan 4"
+        ignore temp2
+        ignore temp3
+        ignore temp4
+        ignore temp5
+        ignore temp6
+        ignore temp7
+        ignore temp8
+        ignore temp9
+        ignore temp10
+        ignore temp11
+        ignore temp12
+        ignore temp13
+        ignore temp14
+        ignore temp15
+        ignore temp16
+        ignore temp17
diff --git a/device/mellanox/x86_64-mlnx_msn2410-r0/sensors.conf b/device/mellanox/x86_64-mlnx_msn2410-r0/sensors.conf
index ede1fbe3c..fa446832f 100644
--- a/device/mellanox/x86_64-mlnx_msn2410-r0/sensors.conf
+++ b/device/mellanox/x86_64-mlnx_msn2410-r0/sensors.conf
@@ -79,3 +79,59 @@ bus "i2c-2" "i2c-1-mux (chan_id 1)"
         label fan6 "Chassis Drawer-3 Fan-2"
         label fan7 "Chassis Drawer-4 Fan-1"
         label fan8 "Chassis Drawer-4 Fan-2"
+        ignore temp2
+        ignore temp3
+        ignore temp4
+        ignore temp5
+        ignore temp6
+        ignore temp7
+        ignore temp8
+        ignore temp9
+        ignore temp10
+        ignore temp11
+        ignore temp12
+        ignore temp13
+        ignore temp14
+        ignore temp15
+        ignore temp16
+        ignore temp17
+        ignore temp18
+        ignore temp19
+        ignore temp20
+        ignore temp21
+        ignore temp22
+        ignore temp23
+        ignore temp24
+        ignore temp25
+        ignore temp26
+        ignore temp27
+        ignore temp28
+        ignore temp29
+        ignore temp30
+        ignore temp31
+        ignore temp32
+        ignore temp33
+        ignore temp34
+        ignore temp35
+        ignore temp36
+        ignore temp37
+        ignore temp38
+        ignore temp39
+        ignore temp40
+        ignore temp41
+        ignore temp42
+        ignore temp43
+        ignore temp44
+        ignore temp45
+        ignore temp46
+        ignore temp47
+        ignore temp48
+        ignore temp49
+        ignore temp50
+        ignore temp51
+        ignore temp52
+        ignore temp53
+        ignore temp54
+        ignore temp55
+        ignore temp56
+        ignore temp57
diff --git a/device/mellanox/x86_64-mlnx_msn2700-r0/sensors.conf b/device/mellanox/x86_64-mlnx_msn2700-r0/sensors.conf
index 62f100d75..8197e191b 100644
--- a/device/mellanox/x86_64-mlnx_msn2700-r0/sensors.conf
+++ b/device/mellanox/x86_64-mlnx_msn2700-r0/sensors.conf
@@ -79,3 +79,35 @@ bus "i2c-2" "i2c-1-mux (chan_id 2)"
         label fan6 "Chassis Drawer-3 Fan-2"
         label fan7 "Chassis Drawer-4 Fan-1"
         label fan8 "Chassis Drawer-4 Fan-2"
+        ignore temp2
+        ignore temp3
+        ignore temp4
+        ignore temp5
+        ignore temp6
+        ignore temp7
+        ignore temp8
+        ignore temp9
+        ignore temp10
+        ignore temp11
+        ignore temp12
+        ignore temp13
+        ignore temp14
+        ignore temp15
+        ignore temp16
+        ignore temp17
+        ignore temp18
+        ignore temp19
+        ignore temp20
+        ignore temp21
+        ignore temp22
+        ignore temp23
+        ignore temp24
+        ignore temp25
+        ignore temp26
+        ignore temp27
+        ignore temp28
+        ignore temp29
+        ignore temp30
+        ignore temp31
+        ignore temp32
+        ignore temp33
diff --git a/device/mellanox/x86_64-mlnx_msn2700a1-r0/sensors.conf b/device/mellanox/x86_64-mlnx_msn2700a1-r0/sensors.conf
index d9a5d2648..e8f5e1568 100644
--- a/device/mellanox/x86_64-mlnx_msn2700a1-r0/sensors.conf
+++ b/device/mellanox/x86_64-mlnx_msn2700a1-r0/sensors.conf
@@ -21,6 +21,38 @@ bus "i2c-17" "i2c-1-mux (chan_id 8)"
 # Temperature sensors
 chip "mlxsw-i2c-*-48"
     label temp1 "Ambient ASIC Temp"
+    ignore temp2
+    ignore temp3
+    ignore temp4
+    ignore temp5
+    ignore temp6
+    ignore temp7
+    ignore temp8
+    ignore temp9
+    ignore temp10
+    ignore temp11
+    ignore temp12
+    ignore temp13
+    ignore temp14
+    ignore temp15
+    ignore temp16
+    ignore temp17
+    ignore temp18
+    ignore temp19
+    ignore temp20
+    ignore temp21
+    ignore temp22
+    ignore temp23
+    ignore temp24
+    ignore temp25
+    ignore temp26
+    ignore temp27
+    ignore temp28
+    ignore temp29
+    ignore temp30
+    ignore temp31
+    ignore temp32
+    ignore temp33
 
 chip "tmp102-i2c-*-49"
     label temp1 "Ambient COMEX Temp"
diff --git a/device/mellanox/x86_64-mlnx_msn2740-r0/sensors.conf b/device/mellanox/x86_64-mlnx_msn2740-r0/sensors.conf
index ffc36fe21..2e60f6b45 100644
--- a/device/mellanox/x86_64-mlnx_msn2740-r0/sensors.conf
+++ b/device/mellanox/x86_64-mlnx_msn2740-r0/sensors.conf
@@ -74,3 +74,36 @@ bus "i2c-2" "i2c-1-mux (chan_id 1)"
         label fan2 "Chassis Fan Drawer-2"
         label fan3 "Chassis Fan Drawer-3"
         label fan4 "Chassis Fan Drawer-4"
+        ignore temp2
+        ignore temp3
+        ignore temp4
+        ignore temp5
+        ignore temp6
+        ignore temp7
+        ignore temp8
+        ignore temp9
+        ignore temp10
+        ignore temp11
+        ignore temp12
+        ignore temp13
+        ignore temp14
+        ignore temp15
+        ignore temp16
+        ignore temp17
+        ignore temp18
+        ignore temp19
+        ignore temp20
+        ignore temp21
+        ignore temp22
+        ignore temp23
+        ignore temp24
+        ignore temp25
+        ignore temp26
+        ignore temp27
+        ignore temp28
+        ignore temp29
+        ignore temp30
+        ignore temp31
+        ignore temp32
+        ignore temp33
+
diff --git a/device/mellanox/x86_64-mlnx_msn3420-r0/sensors.conf b/device/mellanox/x86_64-mlnx_msn3420-r0/sensors.conf
index b0e4901ec..83a5c7ce4 100644
--- a/device/mellanox/x86_64-mlnx_msn3420-r0/sensors.conf
+++ b/device/mellanox/x86_64-mlnx_msn3420-r0/sensors.conf
@@ -8,6 +8,66 @@
 bus "i2c-2" "i2c-1-mux (chan_id 1)"
     chip "mlxsw-i2c-*-48"
         label temp1 "Ambient ASIC Temp"
+        ignore temp2
+        ignore temp3
+        ignore temp4
+        ignore temp5
+        ignore temp6
+        ignore temp7
+        ignore temp8
+        ignore temp9
+        ignore temp10
+        ignore temp11
+        ignore temp12
+        ignore temp13
+        ignore temp14
+        ignore temp15
+        ignore temp16
+        ignore temp17
+        ignore temp18
+        ignore temp19
+        ignore temp20
+        ignore temp21
+        ignore temp22
+        ignore temp23
+        ignore temp24
+        ignore temp25
+        ignore temp26
+        ignore temp27
+        ignore temp28
+        ignore temp29
+        ignore temp30
+        ignore temp31
+        ignore temp32
+        ignore temp33
+        ignore temp34
+        ignore temp35
+        ignore temp36
+        ignore temp37
+        ignore temp38
+        ignore temp39
+        ignore temp40
+        ignore temp41
+        ignore temp42
+        ignore temp43
+        ignore temp44
+        ignore temp45
+        ignore temp46
+        ignore temp47
+        ignore temp48
+        ignore temp49
+        ignore temp50
+        ignore temp51
+        ignore temp52
+        ignore temp53
+        ignore temp54
+        ignore temp55
+        ignore temp56
+        ignore temp57
+        ignore temp58
+        ignore temp59
+        ignore temp60
+        ignore temp61
 
 bus "i2c-7" "i2c-1-mux (chan_id 6)"
     chip "tmp102-i2c-*-49"
diff --git a/device/mellanox/x86_64-mlnx_msn3700-r0/sensors.conf b/device/mellanox/x86_64-mlnx_msn3700-r0/sensors.conf
index 59c99ac98..37446268a 100644
--- a/device/mellanox/x86_64-mlnx_msn3700-r0/sensors.conf
+++ b/device/mellanox/x86_64-mlnx_msn3700-r0/sensors.conf
@@ -8,6 +8,38 @@
 bus "i2c-2" "i2c-1-mux (chan_id 1)"
     chip "mlxsw-i2c-*-48"
         label temp1 "Ambient ASIC Temp"
+        ignore temp2
+        ignore temp3
+        ignore temp4
+        ignore temp5
+        ignore temp6
+        ignore temp7
+        ignore temp8
+        ignore temp9
+        ignore temp10
+        ignore temp11
+        ignore temp12
+        ignore temp13
+        ignore temp14
+        ignore temp15
+        ignore temp16
+        ignore temp17
+        ignore temp18
+        ignore temp19
+        ignore temp20
+        ignore temp21
+        ignore temp22
+        ignore temp23
+        ignore temp24
+        ignore temp25
+        ignore temp26
+        ignore temp27
+        ignore temp28
+        ignore temp29
+        ignore temp30
+        ignore temp31
+        ignore temp32
+        ignore temp33
 
 bus "i2c-7" "i2c-1-mux (chan_id 6)"
     chip "tmp102-i2c-*-49"
diff --git a/device/mellanox/x86_64-mlnx_msn3700-r0/sensors_respin.conf b/device/mellanox/x86_64-mlnx_msn3700-r0/sensors_respin.conf
index d3cd3091f..db5cd3009 100644
--- a/device/mellanox/x86_64-mlnx_msn3700-r0/sensors_respin.conf
+++ b/device/mellanox/x86_64-mlnx_msn3700-r0/sensors_respin.conf
@@ -19,6 +19,38 @@
 bus "i2c-2" "i2c-1-mux (chan_id 1)"
     chip "mlxsw-i2c-*-48"
         label temp1 "Ambient ASIC Temp"
+        ignore temp2
+        ignore temp3
+        ignore temp4
+        ignore temp5
+        ignore temp6
+        ignore temp7
+        ignore temp8
+        ignore temp9
+        ignore temp10
+        ignore temp11
+        ignore temp12
+        ignore temp13
+        ignore temp14
+        ignore temp15
+        ignore temp16
+        ignore temp17
+        ignore temp18
+        ignore temp19
+        ignore temp20
+        ignore temp21
+        ignore temp22
+        ignore temp23
+        ignore temp24
+        ignore temp25
+        ignore temp26
+        ignore temp27
+        ignore temp28
+        ignore temp29
+        ignore temp30
+        ignore temp31
+        ignore temp32
+        ignore temp33
 
 bus "i2c-7" "i2c-1-mux (chan_id 6)"
     chip "tmp102-i2c-*-49"
diff --git a/device/mellanox/x86_64-mlnx_msn3700-r0/sensors_swb_respin.conf b/device/mellanox/x86_64-mlnx_msn3700-r0/sensors_swb_respin.conf
index c10d0fd15..8c546c107 100644
--- a/device/mellanox/x86_64-mlnx_msn3700-r0/sensors_swb_respin.conf
+++ b/device/mellanox/x86_64-mlnx_msn3700-r0/sensors_swb_respin.conf
@@ -19,6 +19,38 @@
 bus "i2c-2" "i2c-1-mux (chan_id 1)"
     chip "mlxsw-i2c-*-48"
         label temp1 "Ambient ASIC Temp"
+        ignore temp2
+        ignore temp3
+        ignore temp4
+        ignore temp5
+        ignore temp6
+        ignore temp7
+        ignore temp8
+        ignore temp9
+        ignore temp10
+        ignore temp11
+        ignore temp12
+        ignore temp13
+        ignore temp14
+        ignore temp15
+        ignore temp16
+        ignore temp17
+        ignore temp18
+        ignore temp19
+        ignore temp20
+        ignore temp21
+        ignore temp22
+        ignore temp23
+        ignore temp24
+        ignore temp25
+        ignore temp26
+        ignore temp27
+        ignore temp28
+        ignore temp29
+        ignore temp30
+        ignore temp31
+        ignore temp32
+        ignore temp33
 
 bus "i2c-7" "i2c-1-mux (chan_id 6)"
     chip "tmp102-i2c-*-49"
diff --git a/device/mellanox/x86_64-mlnx_msn3700c-r0/sensors.conf b/device/mellanox/x86_64-mlnx_msn3700c-r0/sensors.conf
index 343385fcd..ed6cebd1d 100644
--- a/device/mellanox/x86_64-mlnx_msn3700c-r0/sensors.conf
+++ b/device/mellanox/x86_64-mlnx_msn3700c-r0/sensors.conf
@@ -8,6 +8,38 @@
 bus "i2c-2" "i2c-1-mux (chan_id 1)"
     chip "mlxsw-i2c-*-48"
         label temp1 "Ambient ASIC Temp"
+        ignore temp2
+        ignore temp3
+        ignore temp4
+        ignore temp5
+        ignore temp6
+        ignore temp7
+        ignore temp8
+        ignore temp9
+        ignore temp10
+        ignore temp11
+        ignore temp12
+        ignore temp13
+        ignore temp14
+        ignore temp15
+        ignore temp16
+        ignore temp17
+        ignore temp18
+        ignore temp19
+        ignore temp20
+        ignore temp21
+        ignore temp22
+        ignore temp23
+        ignore temp24
+        ignore temp25
+        ignore temp26
+        ignore temp27
+        ignore temp28
+        ignore temp29
+        ignore temp30
+        ignore temp31
+        ignore temp32
+        ignore temp33
 
 bus "i2c-7" "i2c-1-mux (chan_id 6)"
     chip "tmp102-i2c-*-49"
diff --git a/device/mellanox/x86_64-mlnx_msn3700c-r0/sensors_respin.conf b/device/mellanox/x86_64-mlnx_msn3700c-r0/sensors_respin.conf
index 740f9ae96..fdc7bac39 100644
--- a/device/mellanox/x86_64-mlnx_msn3700c-r0/sensors_respin.conf
+++ b/device/mellanox/x86_64-mlnx_msn3700c-r0/sensors_respin.conf
@@ -19,6 +19,38 @@
 bus "i2c-2" "i2c-1-mux (chan_id 1)"
     chip "mlxsw-i2c-*-48"
         label temp1 "Ambient ASIC Temp"
+        ignore temp2
+        ignore temp3
+        ignore temp4
+        ignore temp5
+        ignore temp6
+        ignore temp7
+        ignore temp8
+        ignore temp9
+        ignore temp10
+        ignore temp11
+        ignore temp12
+        ignore temp13
+        ignore temp14
+        ignore temp15
+        ignore temp16
+        ignore temp17
+        ignore temp18
+        ignore temp19
+        ignore temp20
+        ignore temp21
+        ignore temp22
+        ignore temp23
+        ignore temp24
+        ignore temp25
+        ignore temp26
+        ignore temp27
+        ignore temp28
+        ignore temp29
+        ignore temp30
+        ignore temp31
+        ignore temp32
+        ignore temp33
 
 bus "i2c-7" "i2c-1-mux (chan_id 6)"
     chip "tmp102-i2c-*-49"
diff --git a/device/mellanox/x86_64-mlnx_msn3700c-r0/sensors_swb_respin.conf b/device/mellanox/x86_64-mlnx_msn3700c-r0/sensors_swb_respin.conf
index 027c63d74..2b0394f80 100644
--- a/device/mellanox/x86_64-mlnx_msn3700c-r0/sensors_swb_respin.conf
+++ b/device/mellanox/x86_64-mlnx_msn3700c-r0/sensors_swb_respin.conf
@@ -19,6 +19,38 @@
 bus "i2c-2" "i2c-1-mux (chan_id 1)"
     chip "mlxsw-i2c-*-48"
         label temp1 "Ambient ASIC Temp"
+        ignore temp2
+        ignore temp3
+        ignore temp4
+        ignore temp5
+        ignore temp6
+        ignore temp7
+        ignore temp8
+        ignore temp9
+        ignore temp10
+        ignore temp11
+        ignore temp12
+        ignore temp13
+        ignore temp14
+        ignore temp15
+        ignore temp16
+        ignore temp17
+        ignore temp18
+        ignore temp19
+        ignore temp20
+        ignore temp21
+        ignore temp22
+        ignore temp23
+        ignore temp24
+        ignore temp25
+        ignore temp26
+        ignore temp27
+        ignore temp28
+        ignore temp29
+        ignore temp30
+        ignore temp31
+        ignore temp32
+        ignore temp33
 
 bus "i2c-7" "i2c-1-mux (chan_id 6)"
     chip "tmp102-i2c-*-49"
diff --git a/device/mellanox/x86_64-mlnx_msn3800-r0/sensors.conf b/device/mellanox/x86_64-mlnx_msn3800-r0/sensors.conf
index 0b1cfc755..5400269b3 100644
--- a/device/mellanox/x86_64-mlnx_msn3800-r0/sensors.conf
+++ b/device/mellanox/x86_64-mlnx_msn3800-r0/sensors.conf
@@ -8,6 +8,70 @@
 bus "i2c-2" "i2c-1-mux (chan_id 1)"
     chip "mlxsw-i2c-*-48"
         label temp1 "Ambient ASIC Temp"
+        ignore temp2
+        ignore temp3
+        ignore temp4
+        ignore temp5
+        ignore temp6
+        ignore temp7
+        ignore temp8
+        ignore temp9
+        ignore temp10
+        ignore temp11
+        ignore temp12
+        ignore temp13
+        ignore temp14
+        ignore temp15
+        ignore temp16
+        ignore temp17
+        ignore temp18
+        ignore temp19
+        ignore temp20
+        ignore temp21
+        ignore temp22
+        ignore temp23
+        ignore temp24
+        ignore temp25
+        ignore temp26
+        ignore temp27
+        ignore temp28
+        ignore temp29
+        ignore temp30
+        ignore temp31
+        ignore temp32
+        ignore temp33
+        ignore temp34
+        ignore temp35
+        ignore temp36
+        ignore temp37
+        ignore temp38
+        ignore temp39
+        ignore temp40
+        ignore temp41
+        ignore temp42
+        ignore temp43
+        ignore temp44
+        ignore temp45
+        ignore temp46
+        ignore temp47
+        ignore temp48
+        ignore temp49
+        ignore temp50
+        ignore temp51
+        ignore temp52
+        ignore temp53
+        ignore temp54
+        ignore temp55
+        ignore temp56
+        ignore temp57
+        ignore temp58
+        ignore temp59
+        ignore temp60
+        ignore temp61
+        ignore temp62
+        ignore temp63
+        ignore temp64
+        ignore temp65
 
 bus "i2c-7" "i2c-1-mux (chan_id 6)"
     chip "tmp102-i2c-*-49"
diff --git a/device/mellanox/x86_64-mlnx_msn4600-r0/sensors.conf b/device/mellanox/x86_64-mlnx_msn4600-r0/sensors.conf
index dfe848ca8..8443e1b11 100644
--- a/device/mellanox/x86_64-mlnx_msn4600-r0/sensors.conf
+++ b/device/mellanox/x86_64-mlnx_msn4600-r0/sensors.conf
@@ -8,6 +8,70 @@
 bus "i2c-2" "i2c-1-mux (chan_id 1)"
     chip "mlxsw-i2c-*-48"
         label temp1 "Ambient ASIC Temp"
+        ignore temp2
+        ignore temp3
+        ignore temp4
+        ignore temp5
+        ignore temp6
+        ignore temp7
+        ignore temp8
+        ignore temp9
+        ignore temp10
+        ignore temp11
+        ignore temp12
+        ignore temp13
+        ignore temp14
+        ignore temp15
+        ignore temp16
+        ignore temp17
+        ignore temp18
+        ignore temp19
+        ignore temp20
+        ignore temp21
+        ignore temp22
+        ignore temp23
+        ignore temp24
+        ignore temp25
+        ignore temp26
+        ignore temp27
+        ignore temp28
+        ignore temp29
+        ignore temp30
+        ignore temp31
+        ignore temp32
+        ignore temp33
+        ignore temp34
+        ignore temp35
+        ignore temp36
+        ignore temp37
+        ignore temp38
+        ignore temp39
+        ignore temp40
+        ignore temp41
+        ignore temp42
+        ignore temp43
+        ignore temp44
+        ignore temp45
+        ignore temp46
+        ignore temp47
+        ignore temp48
+        ignore temp49
+        ignore temp50
+        ignore temp51
+        ignore temp52
+        ignore temp53
+        ignore temp54
+        ignore temp55
+        ignore temp56
+        ignore temp57
+        ignore temp58
+        ignore temp59
+        ignore temp60
+        ignore temp61
+        ignore temp62
+        ignore temp63
+        ignore temp64
+        ignore temp65
 
 bus "i2c-7" "i2c-1-mux (chan_id 6)"
     chip "tmp102-i2c-*-49"
diff --git a/device/mellanox/x86_64-mlnx_msn4600c-r0/sensors.conf b/device/mellanox/x86_64-mlnx_msn4600c-r0/sensors.conf
index b0ad1ff40..02f811b6c 100644
--- a/device/mellanox/x86_64-mlnx_msn4600c-r0/sensors.conf
+++ b/device/mellanox/x86_64-mlnx_msn4600c-r0/sensors.conf
@@ -8,6 +8,70 @@
 bus "i2c-2" "i2c-1-mux (chan_id 1)"
     chip "mlxsw-i2c-*-48"
         label temp1 "Ambient ASIC Temp"
+        ignore temp2
+        ignore temp3
+        ignore temp4
+        ignore temp5
+        ignore temp6
+        ignore temp7
+        ignore temp8
+        ignore temp9
+        ignore temp10
+        ignore temp11
+        ignore temp12
+        ignore temp13
+        ignore temp14
+        ignore temp15
+        ignore temp16
+        ignore temp17
+        ignore temp18
+        ignore temp19
+        ignore temp20
+        ignore temp21
+        ignore temp22
+        ignore temp23
+        ignore temp24
+        ignore temp25
+        ignore temp26
+        ignore temp27
+        ignore temp28
+        ignore temp29
+        ignore temp30
+        ignore temp31
+        ignore temp32
+        ignore temp33
+        ignore temp34
+        ignore temp35
+        ignore temp36
+        ignore temp37
+        ignore temp38
+        ignore temp39
+        ignore temp40
+        ignore temp41
+        ignore temp42
+        ignore temp43
+        ignore temp44
+        ignore temp45
+        ignore temp46
+        ignore temp47
+        ignore temp48
+        ignore temp49
+        ignore temp50
+        ignore temp51
+        ignore temp52
+        ignore temp53
+        ignore temp54
+        ignore temp55
+        ignore temp56
+        ignore temp57
+        ignore temp58
+        ignore temp59
+        ignore temp60
+        ignore temp61
+        ignore temp62
+        ignore temp63
+        ignore temp64
+        ignore temp65
 
 bus "i2c-7" "i2c-1-mux (chan_id 6)"
     chip "tmp102-i2c-*-49"
diff --git a/device/mellanox/x86_64-mlnx_msn4600c-r0/sensors.conf.a1 b/device/mellanox/x86_64-mlnx_msn4600c-r0/sensors.conf.a1
index a0ebc677a..4200febc3 100644
--- a/device/mellanox/x86_64-mlnx_msn4600c-r0/sensors.conf.a1
+++ b/device/mellanox/x86_64-mlnx_msn4600c-r0/sensors.conf.a1
@@ -20,6 +20,70 @@
 bus "i2c-2" "i2c-1-mux (chan_id 1)"
     chip "mlxsw-i2c-*-48"
         label temp1 "Ambient ASIC Temp"
+        ignore temp2
+        ignore temp3
+        ignore temp4
+        ignore temp5
+        ignore temp6
+        ignore temp7
+        ignore temp8
+        ignore temp9
+        ignore temp10
+        ignore temp11
+        ignore temp12
+        ignore temp13
+        ignore temp14
+        ignore temp15
+        ignore temp16
+        ignore temp17
+        ignore temp18
+        ignore temp19
+        ignore temp20
+        ignore temp21
+        ignore temp22
+        ignore temp23
+        ignore temp24
+        ignore temp25
+        ignore temp26
+        ignore temp27
+        ignore temp28
+        ignore temp29
+        ignore temp30
+        ignore temp31
+        ignore temp32
+        ignore temp33
+        ignore temp34
+        ignore temp35
+        ignore temp36
+        ignore temp37
+        ignore temp38
+        ignore temp39
+        ignore temp40
+        ignore temp41
+        ignore temp42
+        ignore temp43
+        ignore temp44
+        ignore temp45
+        ignore temp46
+        ignore temp47
+        ignore temp48
+        ignore temp49
+        ignore temp50
+        ignore temp51
+        ignore temp52
+        ignore temp53
+        ignore temp54
+        ignore temp55
+        ignore temp56
+        ignore temp57
+        ignore temp58
+        ignore temp59
+        ignore temp60
+        ignore temp61
+        ignore temp62
+        ignore temp63
+        ignore temp64
+        ignore temp65
 
 bus "i2c-7" "i2c-1-mux (chan_id 6)"
     chip "tmp102-i2c-*-49"
diff --git a/device/mellanox/x86_64-mlnx_msn4600c-r0/sensors_respin.conf b/device/mellanox/x86_64-mlnx_msn4600c-r0/sensors_respin.conf
index caaa42ac0..4cf7b71ef 100644
--- a/device/mellanox/x86_64-mlnx_msn4600c-r0/sensors_respin.conf
+++ b/device/mellanox/x86_64-mlnx_msn4600c-r0/sensors_respin.conf
@@ -19,6 +19,70 @@
 bus "i2c-2" "i2c-1-mux (chan_id 1)"
     chip "mlxsw-i2c-*-48"
         label temp1 "Ambient ASIC Temp"
+        ignore temp2
+        ignore temp3
+        ignore temp4
+        ignore temp5
+        ignore temp6
+        ignore temp7
+        ignore temp8
+        ignore temp9
+        ignore temp10
+        ignore temp11
+        ignore temp12
+        ignore temp13
+        ignore temp14
+        ignore temp15
+        ignore temp16
+        ignore temp17
+        ignore temp18
+        ignore temp19
+        ignore temp20
+        ignore temp21
+        ignore temp22
+        ignore temp23
+        ignore temp24
+        ignore temp25
+        ignore temp26
+        ignore temp27
+        ignore temp28
+        ignore temp29
+        ignore temp30
+        ignore temp31
+        ignore temp32
+        ignore temp33
+        ignore temp34
+        ignore temp35
+        ignore temp36
+        ignore temp37
+        ignore temp38
+        ignore temp39
+        ignore temp40
+        ignore temp41
+        ignore temp42
+        ignore temp43
+        ignore temp44
+        ignore temp45
+        ignore temp46
+        ignore temp47
+        ignore temp48
+        ignore temp49
+        ignore temp50
+        ignore temp51
+        ignore temp52
+        ignore temp53
+        ignore temp54
+        ignore temp55
+        ignore temp56
+        ignore temp57
+        ignore temp58
+        ignore temp59
+        ignore temp60
+        ignore temp61
+        ignore temp62
+        ignore temp63
+        ignore temp64
+        ignore temp65
 
 bus "i2c-7" "i2c-1-mux (chan_id 6)"
     chip "tmp102-i2c-*-49"
diff --git a/device/mellanox/x86_64-mlnx_msn4600c-r0/sensors_respin.conf.a1 b/device/mellanox/x86_64-mlnx_msn4600c-r0/sensors_respin.conf.a1
index f3096b01f..a959a7a2c 100644
--- a/device/mellanox/x86_64-mlnx_msn4600c-r0/sensors_respin.conf.a1
+++ b/device/mellanox/x86_64-mlnx_msn4600c-r0/sensors_respin.conf.a1
@@ -19,6 +19,70 @@
 bus "i2c-2" "i2c-1-mux (chan_id 1)"
     chip "mlxsw-i2c-*-48"
         label temp1 "Ambient ASIC Temp"
+        ignore temp2
+        ignore temp3
+        ignore temp4
+        ignore temp5
+        ignore temp6
+        ignore temp7
+        ignore temp8
+        ignore temp9
+        ignore temp10
+        ignore temp11
+        ignore temp12
+        ignore temp13
+        ignore temp14
+        ignore temp15
+        ignore temp16
+        ignore temp17
+        ignore temp18
+        ignore temp19
+        ignore temp20
+        ignore temp21
+        ignore temp22
+        ignore temp23
+        ignore temp24
+        ignore temp25
+        ignore temp26
+        ignore temp27
+        ignore temp28
+        ignore temp29
+        ignore temp30
+        ignore temp31
+        ignore temp32
+        ignore temp33
+        ignore temp34
+        ignore temp35
+        ignore temp36
+        ignore temp37
+        ignore temp38
+        ignore temp39
+        ignore temp40
+        ignore temp41
+        ignore temp42
+        ignore temp43
+        ignore temp44
+        ignore temp45
+        ignore temp46
+        ignore temp47
+        ignore temp48
+        ignore temp49
+        ignore temp50
+        ignore temp51
+        ignore temp52
+        ignore temp53
+        ignore temp54
+        ignore temp55
+        ignore temp56
+        ignore temp57
+        ignore temp58
+        ignore temp59
+        ignore temp60
+        ignore temp61
+        ignore temp62
+        ignore temp63
+        ignore temp64
+        ignore temp65
 
 bus "i2c-7" "i2c-1-mux (chan_id 6)"
     chip "tmp102-i2c-*-49"
diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/sensors.conf b/device/mellanox/x86_64-mlnx_msn4700-r0/sensors.conf
index 3b19dc80c..e4c6724b6 100644
--- a/device/mellanox/x86_64-mlnx_msn4700-r0/sensors.conf
+++ b/device/mellanox/x86_64-mlnx_msn4700-r0/sensors.conf
@@ -8,6 +8,38 @@
 bus "i2c-2" "i2c-1-mux (chan_id 1)"
     chip "mlxsw-i2c-*-48"
         label temp1 "Ambient ASIC Temp"
+        ignore temp2
+        ignore temp3
+        ignore temp4
+        ignore temp5
+        ignore temp6
+        ignore temp7
+        ignore temp8
+        ignore temp9
+        ignore temp10
+        ignore temp11
+        ignore temp12
+        ignore temp13
+        ignore temp14
+        ignore temp15
+        ignore temp16
+        ignore temp17
+        ignore temp18
+        ignore temp19
+        ignore temp20
+        ignore temp21
+        ignore temp22
+        ignore temp23
+        ignore temp24
+        ignore temp25
+        ignore temp26
+        ignore temp27
+        ignore temp28
+        ignore temp29
+        ignore temp30
+        ignore temp31
+        ignore temp32
+        ignore temp33
 
 bus "i2c-7" "i2c-1-mux (chan_id 6)"
     chip "tmp102-i2c-*-49"
diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/sensors.conf.a1 b/device/mellanox/x86_64-mlnx_msn4700-r0/sensors.conf.a1
index 87308be50..d609b4321 100644
--- a/device/mellanox/x86_64-mlnx_msn4700-r0/sensors.conf.a1
+++ b/device/mellanox/x86_64-mlnx_msn4700-r0/sensors.conf.a1
@@ -9,6 +9,38 @@
 bus "i2c-2" "i2c-1-mux (chan_id 1)"
     chip "mlxsw-i2c-*-48"
         label temp1 "Ambient ASIC Temp"
+        ignore temp2
+        ignore temp3
+        ignore temp4
+        ignore temp5
+        ignore temp6
+        ignore temp7
+        ignore temp8
+        ignore temp9
+        ignore temp10
+        ignore temp11
+        ignore temp12
+        ignore temp13
+        ignore temp14
+        ignore temp15
+        ignore temp16
+        ignore temp17
+        ignore temp18
+        ignore temp19
+        ignore temp20
+        ignore temp21
+        ignore temp22
+        ignore temp23
+        ignore temp24
+        ignore temp25
+        ignore temp26
+        ignore temp27
+        ignore temp28
+        ignore temp29
+        ignore temp30
+        ignore temp31
+        ignore temp32
+        ignore temp33
 
 bus "i2c-7" "i2c-1-mux (chan_id 6)"
     chip "tmp102-i2c-*-49"
diff --git a/device/mellanox/x86_64-nvidia_sn2201-r0/sensors.conf b/device/mellanox/x86_64-nvidia_sn2201-r0/sensors.conf
index 1c29cfd2d..908ebe7c1 100644
--- a/device/mellanox/x86_64-nvidia_sn2201-r0/sensors.conf
+++ b/device/mellanox/x86_64-nvidia_sn2201-r0/sensors.conf
@@ -70,6 +70,10 @@ bus "i2c-2" "i2c-1-mux (chan_id 4)"
 	ignore temp47
 	ignore temp48
 	ignore temp49
+    ignore temp50
+    ignore temp51
+    ignore temp52
+    ignore temp53
 
 bus "i2c-2" "i2c-1-mux (chan_id 0)"
     chip "lm75-i2c-*-4a"
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/sensors.conf b/device/mellanox/x86_64-nvidia_sn5600-r0/sensors.conf
index 9180bf38d..2a78b7cd6 100644
--- a/device/mellanox/x86_64-nvidia_sn5600-r0/sensors.conf
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/sensors.conf
@@ -10,6 +10,71 @@ bus "i2c-39" "i2c-1-mux (chan_id 6)"
 # Temperature sensors
 chip "mlxsw-i2c-*-48"
     label temp1 "Ambient ASIC Temp"
+        ignore temp2
+        ignore temp3
+        ignore temp4
+        ignore temp5
+        ignore temp6
+        ignore temp7
+        ignore temp8
+        ignore temp9
+        ignore temp10
+        ignore temp11
+        ignore temp12
+        ignore temp13
+        ignore temp14
+        ignore temp15
+        ignore temp16
+        ignore temp17
+        ignore temp18
+        ignore temp19
+        ignore temp20
+        ignore temp21
+        ignore temp22
+        ignore temp23
+        ignore temp24
+        ignore temp25
+        ignore temp26
+        ignore temp27
+        ignore temp28
+        ignore temp29
+        ignore temp30
+        ignore temp31
+        ignore temp32
+        ignore temp33
+        ignore temp34
+        ignore temp35
+        ignore temp36
+        ignore temp37
+        ignore temp38
+        ignore temp39
+        ignore temp40
+        ignore temp41
+        ignore temp42
+        ignore temp43
+        ignore temp44
+        ignore temp45
+        ignore temp46
+        ignore temp47
+        ignore temp48
+        ignore temp49
+        ignore temp50
+        ignore temp51
+        ignore temp52
+        ignore temp53
+        ignore temp54
+        ignore temp55
+        ignore temp56
+        ignore temp57
+        ignore temp58
+        ignore temp59
+        ignore temp60
+        ignore temp61
+        ignore temp62
+        ignore temp63
+        ignore temp64
+        ignore temp65
+        ignore temp66
 
 chip "tmp102-i2c-*-49"
     label temp1 "Ambient Fan Side Temp (air intake)"

From cac73d80caccbecfcf1a433cb9be63c94ea043fd Mon Sep 17 00:00:00 2001
From: Stepan Blyshchak <38952541+stepanblyschak@users.noreply.github.com>
Date: Mon, 12 Feb 2024 18:36:44 +0200
Subject: [PATCH 0245/1115] [bootchart] enable command line recording (#17778)

Signed-off-by: Stepan Blyschak <stepanb@nvidia.com>
---
 files/build_templates/sonic_debian_extension.j2 | 1 +
 1 file changed, 1 insertion(+)

diff --git a/files/build_templates/sonic_debian_extension.j2 b/files/build_templates/sonic_debian_extension.j2
index 377c4116f..5793f6961 100644
--- a/files/build_templates/sonic_debian_extension.j2
+++ b/files/build_templates/sonic_debian_extension.j2
@@ -494,6 +494,7 @@ sudo tee $FILESYSTEM_ROOT_ETC/systemd/bootchart.conf > /dev/null <<EOF
 [Bootchart]
 Samples=4500
 Frequency=25
+Cmdline=yes
 EOF
 {% if enable_bootchart == 'y' %}
 sudo LANG=C chroot $FILESYSTEM_ROOT systemctl enable systemd-bootchart

From 0564ce48c9e5f6ca3a82194018db82b4e696d50b Mon Sep 17 00:00:00 2001
From: Prince George <45705344+prgeor@users.noreply.github.com>
Date: Mon, 12 Feb 2024 09:37:12 -0800
Subject: [PATCH 0246/1115] [baseimage]: Update smartmontool version >= v7.4
 (#17635)

Why I did it
Update smartmontool verson to 7.4. This is done to prevent smartmontools service to exit with non-zero exit status on platform that does not have a SSD/disk to be monitored.

Until Debian Bullseye (which had smartmontools 7.2), Debian had a patch applied that changed the default quit mode to never exit. A bug report was filed on Debian, saying that the source code patch isn't needed and could just be done via command line options, and also that smartmontools 7.3 has a new built-in option to exit with 0 if there are no monitorable devices found (which prevents systemd from treating it as a service failure). Because of that, Debian Bookworm (which also upgraded to 7.3) removed the patch and restored the default behavior of exiting with exit code 17 if there are no devices found.

Smartmontools v7.3 has this issue, because of which smartd exits with non-zero exit status even with "-q" option.

How I did it
Update the smartmontools to version 7.4 which has the fix for exiting gracefully if no monitoring device is found
Added smartd option "-q nodev0" to allow smartd to exit with status 0 if no monitoring device found
---
 files/build_templates/sonic_debian_extension.j2 | 3 ++-
 files/image_config/smartmontools/smartmontools  | 8 ++++++++
 2 files changed, 10 insertions(+), 1 deletion(-)
 create mode 100644 files/image_config/smartmontools/smartmontools

diff --git a/files/build_templates/sonic_debian_extension.j2 b/files/build_templates/sonic_debian_extension.j2
index 5793f6961..3dc242cc7 100644
--- a/files/build_templates/sonic_debian_extension.j2
+++ b/files/build_templates/sonic_debian_extension.j2
@@ -365,7 +365,8 @@ sudo chmod 755 $FILESYSTEM_ROOT/usr/bin/restart_service
 
 # Installed smartmontools version should match installed smartmontools in docker-platform-monitor Dockerfile
 # TODO: are mismatching versions fine for bookworm?
-sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install smartmontools
+sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install -t bookworm-backports smartmontools
+sudo cp $IMAGE_CONFIGS/smartmontools/smartmontools $FILESYSTEM_ROOT/etc/default/smartmontools
 
 # Install custom-built openssh sshd
 sudo dpkg --root=$FILESYSTEM_ROOT -i $debs_path/openssh-server_${OPENSSH_VERSION}_*.deb $debs_path/openssh-client_${OPENSSH_VERSION}_*.deb $debs_path/openssh-sftp-server_${OPENSSH_VERSION}_*.deb
diff --git a/files/image_config/smartmontools/smartmontools b/files/image_config/smartmontools/smartmontools
new file mode 100644
index 000000000..443322992
--- /dev/null
+++ b/files/image_config/smartmontools/smartmontools
@@ -0,0 +1,8 @@
+# Defaults for smartmontools initscript (/etc/init.d/smartmontools)
+# This is a POSIX shell fragment
+
+# List of devices you want to explicitly enable S.M.A.R.T. for
+# Not needed (and not recommended) if the device is monitored by smartd
+#enable_smart="/dev/hda /dev/hdb"
+
+smartd_opts="-q nodev0"
\ No newline at end of file

From b31a3030fb07364fb4ed626d65d50450f77b603a Mon Sep 17 00:00:00 2001
From: Pavan Naregundi <92989231+pavannaregundi@users.noreply.github.com>
Date: Tue, 13 Feb 2024 04:41:00 +0530
Subject: [PATCH 0247/1115] [Marvell-arm64] Fix boot issue on rd98DX35xx_cn9131
 (#17277)

Change-Id: I411f12963fb8dc0eb3569faf4df68082b852e3a8

Signed-off-by: Pavan Naregundi <pnaregundi@marvell.com>
---
 platform/marvell-arm64/sonic_fit.its | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/platform/marvell-arm64/sonic_fit.its b/platform/marvell-arm64/sonic_fit.its
index e0d1e7b5d..99a634ba8 100644
--- a/platform/marvell-arm64/sonic_fit.its
+++ b/platform/marvell-arm64/sonic_fit.its
@@ -60,8 +60,8 @@
             arch = "arm64";
             os = "linux";
             compression = "none";
-            load = <0x2000000>;
-            entry = <0x2000000>;
+            load = <0x1000000>;
+            entry = <0x1000000>;
             hash@1 {
                 algo = "sha1";
             };
@@ -85,8 +85,8 @@
             type = "flat_dt";
             arch = "arm64";
             compression = "none";
-            load = <0x1000000>;
-            entry = <0x1000000>;
+            load = <0x0a00000>;
+            entry = <0x0a00000>;
             hash@1 {
                 algo = "sha1";
             };

From c6602c95855bac27e741d5b60caf9e40838f8e16 Mon Sep 17 00:00:00 2001
From: Pavan Naregundi <92989231+pavannaregundi@users.noreply.github.com>
Date: Tue, 13 Feb 2024 04:41:19 +0530
Subject: [PATCH 0248/1115] [Marvell-arm64]: Fix SYNCD_RPC build (#17266)

Change-Id: I0bd4932d03141f3f7bc523b49a1bf3d1809817a8

Signed-off-by: Pavan Naregundi <pnaregundi@marvell.com>
---
 platform/marvell-arm64/docker-syncd-mrvl-rpc.mk | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/platform/marvell-arm64/docker-syncd-mrvl-rpc.mk b/platform/marvell-arm64/docker-syncd-mrvl-rpc.mk
index 20698efdf..587902336 100644
--- a/platform/marvell-arm64/docker-syncd-mrvl-rpc.mk
+++ b/platform/marvell-arm64/docker-syncd-mrvl-rpc.mk
@@ -23,3 +23,5 @@ $(DOCKER_SYNCD_MRVL_RPC)_RUN_OPT += --privileged -t
 $(DOCKER_SYNCD_MRVL_RPC)_RUN_OPT += -v /host/machine.conf:/etc/machine.conf
 $(DOCKER_SYNCD_MRVL_RPC)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro
 $(DOCKER_SYNCD_MRVL_RPC)_RUN_OPT += -v /host/warmboot:/var/warmboot
+
+SONIC_BULLSEYE_DOCKERS += $(DOCKER_SYNCD_MRVL_RPC)

From ff5efe8fb3cc830c70ad98949fa82f1b04a23f80 Mon Sep 17 00:00:00 2001
From: Zain Budhwani <99770260+zbud-msft@users.noreply.github.com>
Date: Mon, 12 Feb 2024 21:52:38 -0800
Subject: [PATCH 0249/1115] [eventd] Fix eventd UT flakiness (#17055)

### Why I did it

Fix flakiness of eventd UT - run sub after capture service starts

##### Work item tracking
- Microsoft ADO **(number only)**:25650744

#### How I did it

Run sub socket after capture socket is initialized

#### How to verify it

Pipeline
---
 src/sonic-eventd/Makefile            |  2 +-
 src/sonic-eventd/src/eventd.cpp      |  4 +-
 src/sonic-eventd/src/eventd.h        |  2 +
 src/sonic-eventd/tests/eventd_ut.cpp | 72 ++++++++++++++++++----------
 src/sonic-eventd/tests/main.cpp      | 42 ++++------------
 5 files changed, 63 insertions(+), 59 deletions(-)

diff --git a/src/sonic-eventd/Makefile b/src/sonic-eventd/Makefile
index f9cc5bf8b..835d0732a 100644
--- a/src/sonic-eventd/Makefile
+++ b/src/sonic-eventd/Makefile
@@ -29,7 +29,7 @@ endif
 -include rsyslog_plugin/subdir.mk
 -include rsyslog_plugin_tests/subdir.mk
 
-all: sonic-eventd eventd-tool rsyslog-plugin
+all: sonic-eventd eventd-tests eventd-tool rsyslog-plugin rsyslog-plugin-tests
 
 sonic-eventd: $(OBJS)
 	@echo 'Building target: $@'
diff --git a/src/sonic-eventd/src/eventd.cpp b/src/sonic-eventd/src/eventd.cpp
index 953fe9b7c..36c162453 100644
--- a/src/sonic-eventd/src/eventd.cpp
+++ b/src/sonic-eventd/src/eventd.cpp
@@ -546,9 +546,9 @@ capture_service::set_control(capture_control_t ctrl, event_serialized_lst_t *lst
     switch(ctrl) {
         case INIT_CAPTURE:
             m_thr = thread(&capture_service::do_capture, this);
-            for(int i=0; !m_cap_run && (i < 100); ++i) {
+            for(int i=0; !m_cap_run && (i < CAPTURE_SERVICE_POLLING_RETRIES); ++i) {
                 /* Wait max a second for thread to init */
-                this_thread::sleep_for(chrono::milliseconds(10));
+                this_thread::sleep_for(chrono::milliseconds(CAPTURE_SERVICE_POLLING_DURATION));
             }
             RET_ON_ERR(m_cap_run, "Failed to init capture");
             m_ctrl = ctrl;
diff --git a/src/sonic-eventd/src/eventd.h b/src/sonic-eventd/src/eventd.h
index 706863667..a7a87f943 100644
--- a/src/sonic-eventd/src/eventd.h
+++ b/src/sonic-eventd/src/eventd.h
@@ -21,6 +21,8 @@ typedef enum {
 
 #define EVENTS_STATS_FIELD_NAME "value"
 #define STATS_HEARTBEAT_MIN 300
+#define CAPTURE_SERVICE_POLLING_DURATION 10
+#define CAPTURE_SERVICE_POLLING_RETRIES 100
 
 /*
  *  Started by eventd_service.
diff --git a/src/sonic-eventd/tests/eventd_ut.cpp b/src/sonic-eventd/tests/eventd_ut.cpp
index db46845b0..729563fcd 100644
--- a/src/sonic-eventd/tests/eventd_ut.cpp
+++ b/src/sonic-eventd/tests/eventd_ut.cpp
@@ -152,25 +152,23 @@ static const test_data_t ldata[] = {
 
 
 void run_cap(void *zctx, bool &term, string &read_source,
-        int &cnt)
+        int &cnt, bool &should_read_control)
 {
     void *mock_cap = zmq_socket (zctx, ZMQ_SUB);
     string source;
     internal_event_t ev_int;
     int block_ms = 200;
     int i=0;
-    static int proxy_finished_init = false;
 
     EXPECT_TRUE(NULL != mock_cap);
     EXPECT_EQ(0, zmq_connect(mock_cap, get_config(CAPTURE_END_KEY).c_str()));
     EXPECT_EQ(0, zmq_setsockopt(mock_cap, ZMQ_SUBSCRIBE, "", 0));
     EXPECT_EQ(0, zmq_setsockopt(mock_cap, ZMQ_RCVTIMEO, &block_ms, sizeof (block_ms)));
 
-    if(!proxy_finished_init) {
+    if(should_read_control) {
         zmq_msg_t msg;
         zmq_msg_init(&msg);
-        EXPECT_EQ(1, zmq_msg_recv(&msg, mock_cap, 0)); // Subscription message
-        proxy_finished_init = true;
+        EXPECT_NE(1, zmq_msg_recv(&msg, mock_cap, 0)); // Subscription message should be read by do_capture
     }
 
     while(!term) {
@@ -227,10 +225,10 @@ void run_pub(void *mock_pub, const string wr_source, internal_events_lst_t &lst)
     }
 }
 
-
 TEST(eventd, proxy)
 {
     printf("Proxy TEST started\n");
+    bool should_read_control = false;
     bool term_sub = false;
     bool term_cap = false;
     string rd_csource, rd_source, wr_source("hello");
@@ -247,12 +245,12 @@ TEST(eventd, proxy)
     /* Starting proxy */
     EXPECT_EQ(0, pxy->init());
 
+    /* capture in a thread */
+    thread thrc(&run_cap, zctx, ref(term_cap), ref(rd_csource), ref(rd_cevts_sz), ref(should_read_control));
+
     /* subscriber in a thread */
     thread thr(&run_sub, zctx, ref(term_sub), ref(rd_source), ref(rd_evts), ref(rd_evts_sz));
 
-    /* capture in a thread */
-    thread thrc(&run_cap, zctx, ref(term_cap), ref(rd_csource), ref(rd_cevts_sz));
-
     /* Init pub connection */
     void *mock_pub = init_pub(zctx);
 
@@ -275,9 +273,6 @@ TEST(eventd, proxy)
     }
     this_thread::sleep_for(chrono::milliseconds(1000));
 
-    delete pxy;
-    pxy = NULL;
-
     term_sub = true;
     term_cap = true;
 
@@ -287,6 +282,18 @@ TEST(eventd, proxy)
     EXPECT_EQ(rd_cevts_sz,  wr_evts.size());
 
     zmq_close(mock_pub);
+
+    /* Do control test */
+
+    should_read_control = true;
+
+    /* capture in a thread */
+    thread thrcc(&run_cap, zctx, ref(term_cap), ref(rd_csource), ref(rd_cevts_sz), ref(should_read_control));
+
+    delete pxy;
+    pxy = NULL;
+
+    thrcc.join();
     zmq_ctx_term(zctx);
 
     /* Provide time for async proxy removal to complete */
@@ -295,7 +302,6 @@ TEST(eventd, proxy)
     printf("eventd_proxy is tested GOOD\n");
 }
 
-
 TEST(eventd, capture)
 {
     printf("Capture TEST started\n");
@@ -329,9 +335,6 @@ TEST(eventd, capture)
     /* Starting proxy */
     EXPECT_EQ(0, pxy->init());
 
-    /* Run subscriber; Else publisher will drop events on floor, with no subscriber. */
-    thread thr_sub(&run_sub, zctx, ref(term_sub), ref(sub_source), ref(sub_evts), ref(sub_evts_sz));
-
     /* Create capture service */
     capture_service *pcap = new capture_service(zctx, cache_max, &stats_instance);
 
@@ -341,6 +344,9 @@ TEST(eventd, capture)
     /* Initialize the capture */
     EXPECT_EQ(0, pcap->set_control(INIT_CAPTURE));
 
+    /* Run subscriber; Else publisher will drop events on floor, with no subscriber. */
+    thread thr_sub(&run_sub, zctx, ref(term_sub), ref(sub_source), ref(sub_evts), ref(sub_evts_sz));
+
     EXPECT_TRUE(init_cache > 1);
     EXPECT_TRUE((cache_max+3) < (int)ARRAY_SIZE(ldata));
 
@@ -473,9 +479,6 @@ TEST(eventd, captureCacheMax)
     /* Starting proxy */
     EXPECT_EQ(0, pxy->init());
 
-    /* Run subscriber; Else publisher will drop events on floor, with no subscriber. */
-    thread thr_sub(&run_sub, zctx, ref(term_sub), ref(sub_source), ref(sub_evts), ref(sub_evts_sz));
-
     /* Create capture service */
     capture_service *pcap = new capture_service(zctx, cache_max, &stats_instance);
 
@@ -484,6 +487,9 @@ TEST(eventd, captureCacheMax)
 
     EXPECT_TRUE(init_cache > 1);
 
+    /* Run subscriber; Else publisher will drop events on floor, with no subscriber. */
+    thread thr_sub(&run_sub, zctx, ref(term_sub), ref(sub_source), ref(sub_evts), ref(sub_evts_sz));
+
     /* Collect few serailized strings of events for startup cache */
     for(int i=0; i < init_cache; ++i) {
         internal_event_t ev(create_ev(ldata[i]));
@@ -595,6 +601,7 @@ TEST(eventd, service)
     }
 
     thread thread_service(&run_eventd_service);
+    this_thread::sleep_for(chrono::milliseconds(CAPTURE_SERVICE_POLLING_DURATION * CAPTURE_SERVICE_POLLING_RETRIES));
 
     /* Need client side service to interact with server side */
     EXPECT_EQ(0, service.init_client(zctx));
@@ -610,7 +617,7 @@ TEST(eventd, service)
         string wr_source("hello");
 
         /* Test service startup caching */
-        event_serialized_lst_t evts_start, evts_read;
+        event_serialized_lst_t evts_start, evts_read, polled_events;
 
         for(int i=0; i<wr_sz; ++i) {
             string evt_str;
@@ -624,15 +631,32 @@ TEST(eventd, service)
         /* Publish events. */
         run_pub(mock_pub, wr_source, wr_evts);
 
-        /* Published events must have been captured. Give a pause, to ensure sent. */
-        this_thread::sleep_for(chrono::milliseconds(200));
+        int max_polling_duration = 2000;
+        int polling_interval = 100;
+        auto poll_start_ts = chrono::steady_clock::now();
+
+        while(true) {
+            auto current_ts = chrono::steady_clock::now();
+            if(chrono::duration_cast<chrono::milliseconds>(current_ts - poll_start_ts).count() >= max_polling_duration) {
+                break;
+            }
+            event_serialized_lst_t read_events;
+            service.cache_read(read_events);
+            polled_events.insert(polled_events.end(), read_events.begin(), read_events.end());
+            if (!read_events.empty()) {
+                break;
+            }
+            this_thread::sleep_for(chrono::milliseconds(polling_interval));	    
+        }
 
         EXPECT_EQ(0, service.cache_stop());
 
-        /* Read the cache; expect wr_sz events */
+        /* Read remaining events in cache, if any */
         EXPECT_EQ(0, service.cache_read(evts_read));
 
-        EXPECT_EQ(evts_read, evts_start);
+        polled_events.insert(polled_events.end(), evts_read.begin(), evts_read.end());
+
+        EXPECT_EQ(polled_events, evts_start);
 
         zmq_close(mock_pub);
     }
diff --git a/src/sonic-eventd/tests/main.cpp b/src/sonic-eventd/tests/main.cpp
index fdc175e64..f0d011305 100644
--- a/src/sonic-eventd/tests/main.cpp
+++ b/src/sonic-eventd/tests/main.cpp
@@ -1,6 +1,7 @@
 #include "gtest/gtest.h"
 #include "dbconnector.h"
 #include <iostream>
+#include <stdexcept>
 
 using namespace std;
 using namespace swss;
@@ -20,57 +21,34 @@ class SwsscommonEnvironment : public ::testing::Environment {
     // Override this to define how to set up the environment
     void SetUp() override {
         // by default , init should be false
-        cout<<"Default : isInit = "<<SonicDBConfig::isInit()<<endl;
+        cout << "Default : isInit = " << SonicDBConfig::isInit() << endl;
         EXPECT_FALSE(SonicDBConfig::isInit());
 
-        // load nonexisting file, should throw exception with NO file existing
-        try
-        {
-            cout<<"INIT: loading nonexisting db config file"<<endl;
-            SonicDBConfig::initialize(nonexisting_file);
-        }
-        catch (exception &e)
-        {
-            EXPECT_TRUE(strstr(e.what(), "Sonic database config file doesn't exist"));
-        }
+        EXPECT_THROW(SonicDBConfig::initialize(nonexisting_file), runtime_error);
+
         EXPECT_FALSE(SonicDBConfig::isInit());
 
         // load local config file, init should be true
         SonicDBConfig::initialize(existing_file);
-        cout<<"INIT: load local db config file, isInit = "<<SonicDBConfig::isInit()<<endl;
+        cout << "INIT: load local db config file, isInit = " << SonicDBConfig::isInit() << endl;
         EXPECT_TRUE(SonicDBConfig::isInit());
 
         // Test the database_global.json file
         // by default , global_init should be false
-        cout<<"Default : isGlobalInit = "<<SonicDBConfig::isGlobalInit()<<endl;
+        cout << "Default : isGlobalInit = " << SonicDBConfig::isGlobalInit() << endl;
         EXPECT_FALSE(SonicDBConfig::isGlobalInit());
 
         // Call an API which actually needs the data populated by SonicDBConfig::initializeGlobalConfig
-        try
-        {
-            cout<<"INIT: Invoking SonicDBConfig::getDbId(APPL_DB, asic0)"<<endl;
-            SonicDBConfig::getDbId(TEST_DB, TEST_NAMESPACE);
-        }
-        catch (exception &e)
-        {
-            EXPECT_TRUE(strstr(e.what(), "Initialize global DB config using API SonicDBConfig::initializeGlobalConfig"));
-        }
+        EXPECT_THROW(SonicDBConfig::getDbId(TEST_DB, TEST_NAMESPACE), runtime_error);
 
         // load local global file, init should be true
         SonicDBConfig::initializeGlobalConfig(global_existing_file);
-        cout<<"INIT: load global db config file, isInit = "<<SonicDBConfig::isGlobalInit()<<endl;
+        cout << "INIT: load global db config file, isInit = " << SonicDBConfig::isGlobalInit() << endl;
         EXPECT_TRUE(SonicDBConfig::isGlobalInit());
 
         // Call an API with wrong namespace passed
-        try
-        {
-            cout<<"INIT: Invoking SonicDBConfig::getDbId(APPL_DB, invalid)"<<endl;
-            SonicDBConfig::getDbId(TEST_DB, INVALID_NAMESPACE);
-        }
-        catch (exception &e)
-        {
-            EXPECT_TRUE(strstr(e.what(), "Namespace invalid is not a valid namespace name in config file"));
-        }
+        cout << "INIT: Invoking SonicDBConfig::getDbId(APPL_DB, invalid)" << endl;
+        EXPECT_THROW(SonicDBConfig::getDbId(TEST_DB, INVALID_NAMESPACE), out_of_range);
 
         // Get this info handy
         try

From fe0a5e128535bdff98e8f4a00da669844a63c31a Mon Sep 17 00:00:00 2001
From: Saikrishna Arcot <sarcot@microsoft.com>
Date: Tue, 13 Feb 2024 20:40:25 -0800
Subject: [PATCH 0250/1115] Install netaddr 0.10.1 in the Python 2 part of
 sonic-mgmt (#18094)

Recently, netaddr 1.0.0 was released, which dropped Python 2 support
entirely. Because of this, an empty netaddr package is installed for
Python 2. Ansible still uses Python 2, so this needs to remain
functional. The Python 3 part of sonic-mgmt is fine.

Pin the version of netaddr installed in Python 2 to 0.10.1, the last
supported version.

Signed-off-by: Saikrishna Arcot <sarcot@microsoft.com>
---
 dockers/docker-sonic-mgmt/Dockerfile.j2 | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/dockers/docker-sonic-mgmt/Dockerfile.j2 b/dockers/docker-sonic-mgmt/Dockerfile.j2
index 152613a9c..c544ef8b0 100755
--- a/dockers/docker-sonic-mgmt/Dockerfile.j2
+++ b/dockers/docker-sonic-mgmt/Dockerfile.j2
@@ -151,7 +151,7 @@ RUN python2 -m pip install allure-pytest==2.8.22 \
                 mock \
                 msrest==0.6.21 \
                 natsort \
-                netaddr \
+                netaddr==0.10.1 \
                 netmiko==2.4.2 \
                 nnpy \
                 pandas \

From 7b8c135e6cbab2e2ba0ff91b728dad3cecfa94e9 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Thu, 15 Feb 2024 10:33:38 +0800
Subject: [PATCH 0251/1115] [submodule] Update submodule sonic-ztp to the
 latest HEAD automatically (#18097)

#### Why I did it
src/sonic-ztp
```
* 56cebae - (HEAD -> master, origin/master, origin/HEAD) Enhancements to allow custom umask usage while executing plugins (#42) (2 hours ago) [rajendra-dendukuri]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-ztp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-ztp b/src/sonic-ztp
index 739470d66..56cebaeec 160000
--- a/src/sonic-ztp
+++ b/src/sonic-ztp
@@ -1 +1 @@
-Subproject commit 739470d666a1ed4f62dd29af2316eb7d70366ace
+Subproject commit 56cebaeec285c74ef531fa7b8436febe85547608

From ca258a260e85c683381d07c6888bcd4730576a8f Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Thu, 15 Feb 2024 14:33:40 +0800
Subject: [PATCH 0252/1115] [submodule] Update submodule sonic-dash-api to the
 latest HEAD automatically (#18087)

#### Why I did it
src/sonic-dash-api
```
* d033898 - (HEAD -> master, origin/master, origin/HEAD) Generate and install python stubs (2 days ago) [Lawrence Lee]
* 4fbed99 - Generate and install python stubs (8 days ago) [Lawrence Lee]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-dash-api | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-dash-api b/src/sonic-dash-api
index da6899b89..d033898e7 160000
--- a/src/sonic-dash-api
+++ b/src/sonic-dash-api
@@ -1 +1 @@
-Subproject commit da6899b8962d8823e315eae0ce563d9d6cf50f41
+Subproject commit d033898e7e4774fad88229610a5bb502b4152a5a

From 0b73937ec558617050b3f547d0c3ef5ead7ba31e Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Thu, 15 Feb 2024 16:32:54 +0800
Subject: [PATCH 0253/1115] [submodule] Update submodule sonic-swss to the
 latest HEAD automatically (#18096)

#### Why I did it
src/sonic-swss
```
* 1221eae4 - (HEAD -> master, origin/master, origin/HEAD) Explicitly initialize two local variables to 0 (#3046) (26 hours ago) [Saikrishna Arcot]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-swss | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-swss b/src/sonic-swss
index b3b6a8384..1221eae41 160000
--- a/src/sonic-swss
+++ b/src/sonic-swss
@@ -1 +1 @@
-Subproject commit b3b6a8384aa2cfc2e6cb1c08312af1cbeac5c0c5
+Subproject commit 1221eae41788176b5de0db3e869006ff22d2d4ff

From de2ee9f96d23f4502abc8a021aaac9bc5c6bfe1d Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Thu, 15 Feb 2024 16:33:07 +0800
Subject: [PATCH 0254/1115] [submodule] Update submodule sonic-sairedis to the
 latest HEAD automatically (#18077)

#### Why I did it
src/sonic-sairedis
```
* a91d51d - (HEAD -> master, origin/master, origin/HEAD) Enable 8 Lanes Support in vslib (#1355) (55 minutes ago) [Deepak Singhal]
* ea8767c - [nvidia] Update syncd start to cover changes in SDK initialization process. (#1343) (6 days ago) [Oleksandr Ivantsiv]
* 46e713d - [syncd] Add workaround for SET operation on SAI_HOSTIF_ATTR_QUEUE (#1345) (7 days ago) [Kamil Cudnik]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-sairedis | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-sairedis b/src/sonic-sairedis
index a5049331b..a91d51d8f 160000
--- a/src/sonic-sairedis
+++ b/src/sonic-sairedis
@@ -1 +1 @@
-Subproject commit a5049331b05f52f73eb8ab3f0a87245739180112
+Subproject commit a91d51d8feefdd883c72bc11af79d12e95a7d105

From 4b39bf60de93d77a99f692cb68361b7a844207a9 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Fri, 16 Feb 2024 16:32:55 +0800
Subject: [PATCH 0255/1115] [submodule] Update submodule sonic-platform-daemons
 to the latest HEAD automatically (#18107)

#### Why I did it
src/sonic-platform-daemons
```
* 13c5049 - (HEAD -> master, origin/master, origin/HEAD) [ycabled][tests] Fix UT for bookworm (#431) (15 hours ago) [Arun Saravanan Balachandran]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-platform-daemons | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-platform-daemons b/src/sonic-platform-daemons
index d8977f360..13c50494c 160000
--- a/src/sonic-platform-daemons
+++ b/src/sonic-platform-daemons
@@ -1 +1 @@
-Subproject commit d8977f3608e5c9263d9b9d9b33087890637ac436
+Subproject commit 13c50494ca8baf035a518e1aac033afcef87a419

From 5a34a4982844c85873740cbdb88c79ec82eb626b Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Fri, 16 Feb 2024 16:33:10 +0800
Subject: [PATCH 0256/1115] [submodule] Update submodule sonic-linux-kernel to
 the latest HEAD automatically (#18098)

#### Why I did it
src/sonic-linux-kernel
```
* f4b1a58 - (HEAD -> master, origin/master, origin/HEAD) Fix kexec kernel panic in mvpp2 (#377) (2 days ago) [Pavan Naregundi]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-linux-kernel | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-linux-kernel b/src/sonic-linux-kernel
index e17e31cb8..f4b1a5807 160000
--- a/src/sonic-linux-kernel
+++ b/src/sonic-linux-kernel
@@ -1 +1 @@
-Subproject commit e17e31cb860b0cfdabf140ac4382586fdc99a629
+Subproject commit f4b1a580708b53a544ae7d4ce1770e087a4d6dfb

From 4b8f172b463f708384583d5ee64f9f942bc503e2 Mon Sep 17 00:00:00 2001
From: Pavan Naregundi <92989231+pavannaregundi@users.noreply.github.com>
Date: Fri, 16 Feb 2024 22:21:49 +0530
Subject: [PATCH 0257/1115] [marvell-armhf] Update MRVL_PRESTERA_DRIVER
 (#17780)

Changes in MRVL_PRESTERA_DRIVER_1.8:
 * Migrate dtb to kernel 6.1.
 * Fix i2c kernel error log,
	[ 51.331287] i2c i2c-0: mv64xxx: I2C bus locked, block: 1, time_left: 0.

Signed-off-by: Pavan Naregundi <pnaregundi@marvell.com>
---
 platform/marvell-armhf/prestera.mk | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/platform/marvell-armhf/prestera.mk b/platform/marvell-armhf/prestera.mk
index 2a7bc336a..50f44804f 100644
--- a/platform/marvell-armhf/prestera.mk
+++ b/platform/marvell-armhf/prestera.mk
@@ -4,7 +4,7 @@ export MRVL_PRESTERA_VER = 1.0
 export MRVL_PRESTERA = mrvlprestera_$(MRVL_PRESTERA_VER)_$(PLATFORM_ARCH)
 export MRVL_PRESTERA_DEB = $(MRVL_PRESTERA).deb
 export MRVL_PRESTERA_SRC_URL = https://github.com/Marvell-switching/mrvl-prestera.git
-export MRVL_PRESTERA_SRC_TAG = MRVL_PRESTERA_DRIVER_1.7
+export MRVL_PRESTERA_SRC_TAG = MRVL_PRESTERA_DRIVER_1.8
 
 $(MRVL_PRESTERA_DEB)_SRC_PATH = $(PLATFORM_PATH)/prestera
 $(MRVL_PRESTERA_DEB)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON)

From a7d948ff4eb08027960500da6dee8c492110c452 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Mon, 19 Feb 2024 16:33:11 +0800
Subject: [PATCH 0258/1115] [submodule] Update submodule sonic-platform-daemons
 to the latest HEAD automatically (#18125)

#### Why I did it
src/sonic-platform-daemons
```
* f1511c2 - (HEAD -> master, origin/master, origin/HEAD) Move firmware version fields to TRANSCEIVER_FIRMWARE_INFO table (#435) (2 days ago) [mihirpat1]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-platform-daemons | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-platform-daemons b/src/sonic-platform-daemons
index 13c50494c..f1511c2a5 160000
--- a/src/sonic-platform-daemons
+++ b/src/sonic-platform-daemons
@@ -1 +1 @@
-Subproject commit 13c50494ca8baf035a518e1aac033afcef87a419
+Subproject commit f1511c2a5a2712d12a755c02a0db3b01c3109682

From 97b396467793b6d608d4a7a7800f119a83e44e6b Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Mon, 19 Feb 2024 16:33:15 +0800
Subject: [PATCH 0259/1115] [submodule] Update submodule sonic-platform-common
 to the latest HEAD automatically (#18124)

#### Why I did it
src/sonic-platform-common
```
* 796e89a - (HEAD -> master, origin/master, origin/HEAD) Change get_transceiver_info_firmware_versions return type to dict (#440) (2 days ago) [mihirpat1]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-platform-common | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-platform-common b/src/sonic-platform-common
index 888075d7a..796e89a82 160000
--- a/src/sonic-platform-common
+++ b/src/sonic-platform-common
@@ -1 +1 @@
-Subproject commit 888075d7a8ec40867269a523c1771b3c2d50523a
+Subproject commit 796e89a8279681391ab8a125df9ed4e5eb0af126

From 3634a831d96d2908a8e2a8cd5c70f996067a2f6c Mon Sep 17 00:00:00 2001
From: Liu Shilong <shilongliu@microsoft.com>
Date: Mon, 19 Feb 2024 18:27:31 +0800
Subject: [PATCH 0260/1115] [ci] Disable some workflow use github app instead
 to have stable performance. (#18132)

Why I did it
github workflow is not easy to extend to other repos.
Use github app instead to share the same workflow.

Work item tracking
Microsoft ADO (number only): 26855292
How I did it
How to verify it
---
 .github/workflows/automerge_scan.yml         | 3 ++-
 .github/workflows/pr_cherrypick_poststep.yml | 3 ++-
 .github/workflows/pr_cherrypick_prestep.yml  | 3 ++-
 3 files changed, 6 insertions(+), 3 deletions(-)

diff --git a/.github/workflows/automerge_scan.yml b/.github/workflows/automerge_scan.yml
index 760c137cf..68903a209 100644
--- a/.github/workflows/automerge_scan.yml
+++ b/.github/workflows/automerge_scan.yml
@@ -6,7 +6,8 @@ on:
 
 jobs:
   automerge_scan:
-    if: github.repository_owner == 'sonic-net'
+    # Disable workflow, and use pipeline instead to have same logic with other automation
+    if: github.repository_owner == 'sonic-net' && false
     runs-on: ubuntu-latest
     steps:
     - name: Debug
diff --git a/.github/workflows/pr_cherrypick_poststep.yml b/.github/workflows/pr_cherrypick_poststep.yml
index a343bed03..6d9c567e0 100644
--- a/.github/workflows/pr_cherrypick_poststep.yml
+++ b/.github/workflows/pr_cherrypick_poststep.yml
@@ -8,7 +8,8 @@ on:
 
 jobs:
   post_cherry_pick:
-    if: github.event.pull_request.merged == true && contains(github.event.pull_request.labels.*.name, 'automerge') && github.event.pull_request.head.user.login == 'mssonicbld' && startsWith(github.event.pull_request.title, '[action]')
+    # Use azpw instead to have stable performance
+    if: false && github.event.pull_request.merged == true && contains(github.event.pull_request.labels.*.name, 'automerge') && github.event.pull_request.head.user.login == 'mssonicbld' && startsWith(github.event.pull_request.title, '[action]')
     runs-on: ubuntu-latest
     steps:
     - name: Debug
diff --git a/.github/workflows/pr_cherrypick_prestep.yml b/.github/workflows/pr_cherrypick_prestep.yml
index a1f8015b7..d885c96d3 100644
--- a/.github/workflows/pr_cherrypick_prestep.yml
+++ b/.github/workflows/pr_cherrypick_prestep.yml
@@ -9,7 +9,8 @@ on:
 
 jobs:
   pre_cherry_pick:
-    if: github.repository_owner == 'sonic-net' && github.event.pull_request.merged == true && ( (github.event.action == 'closed' && contains(join(github.event.pull_request.labels.*.name, ','), 'Approved for 20')) || (github.event.action == 'labeled' && startsWith(github.event.label.name, 'Approved for 20')) )
+    # Use azpw instead of workflow to have stable performance.
+    if: false && github.repository_owner == 'sonic-net' && github.event.pull_request.merged == true && ( (github.event.action == 'closed' && contains(join(github.event.pull_request.labels.*.name, ','), 'Approved for 20')) || (github.event.action == 'labeled' && startsWith(github.event.label.name, 'Approved for 20')) )
     runs-on: ubuntu-latest
     steps:
     - name: Checkout

From df70bd304bea4bccc6cc3679e342b9532ac2b3a3 Mon Sep 17 00:00:00 2001
From: ShiyanWangMS <shiyanwang@microsoft.com>
Date: Wed, 21 Feb 2024 16:39:17 +0800
Subject: [PATCH 0261/1115] Remove Python3 venv from sonic-mgmt-docker build
 file (#18130)

Why I did it
This is sonic-mgmt-docker Python3 migration.

How I did it
Remove Python3 venv from sonic-mgmt-docker

How to verify it
Compile docker and verify the Python3 venv is NOT there.
---
 dockers/docker-sonic-mgmt/Dockerfile.j2 | 85 -------------------------
 1 file changed, 85 deletions(-)

diff --git a/dockers/docker-sonic-mgmt/Dockerfile.j2 b/dockers/docker-sonic-mgmt/Dockerfile.j2
index c544ef8b0..e5cbf9b1f 100755
--- a/dockers/docker-sonic-mgmt/Dockerfile.j2
+++ b/dockers/docker-sonic-mgmt/Dockerfile.j2
@@ -265,91 +265,6 @@ WORKDIR /var/$user
 # Add az symlink for backwards compatibility
 RUN mkdir bin && ln -s /usr/bin/az bin/az
 
-{% if legacy == 'y' or legacy == '1' %}
-RUN python3 -m venv --system-site-packages env-python3
-
-# Activating a virtualenv. The virtualenv automatically works for RUN, ENV and CMD.
-ENV VIRTUAL_ENV=env-python3
-ARG BACKUP_OF_PATH="$PATH"
-ENV PATH="$VIRTUAL_ENV/bin:$PATH"
-
-ENV LANG=C.UTF-8 LC_ALL=C.UTF-8 PYTHONIOENCODING=UTF-8
-
-RUN python3 -m pip install --upgrade pip setuptools wheel
-RUN python3 -m pip install aiohttp \
-                           allure-pytest==2.8.22 \
-                           ansible==2.9.27 \
-                           azure-storage-blob==12.9.0 \
-                           azure-kusto-data \
-                           azure-kusto-ingest \
-                           defusedxml \
-                           celery[redis]==5.2.7 \
-                           cffi \
-                           contextlib2==0.6.0.post1 \
-                           cryptography==41.0.2 \
-                           ctypesgen \
-                           dpkt \
-                           dpugen==0.1.1 \
-                           "future>=0.16.0" \
-                           gitpython \
-                           ipaddr \
-                           ipython==8.12.2 \
-                           ixload \
-                           ixnetwork-restpy==1.0.64 \
-                           ixnetwork-open-traffic-generator==0.0.79 \
-                           jinja2==2.10.1 \
-                           jsonpatch \
-                           lxml \
-                           markupsafe==2.0.1 \
-                           mock \
-                           msrest==0.6.21 \
-                           natsort \
-                           ncclient \
-                           netaddr \
-                           netmiko==2.4.2 \
-                           nnpy \
-                           pandas \
-                           paramiko==2.7.2 \
-                           passlib \
-                           pexpect \
-                           prettytable \
-                           psutil \
-                           ptf \
-                           pyasn1==0.4.8 \
-                           pycryptodome==3.9.8 \
-                           pyfiglet \
-                           pylint==1.8.1 \
-                           pyro4 \
-                           pysnmp==4.4.12 \
-                           pysubnettree \
-                           pytest-ansible \
-                           pytest-html \
-                           pytest-repeat \
-                           pytest-xdist==1.28.0 \
-                           python-dateutil \
-                           pytest==7.1.3 \
-                           PyYAML \
-                           redis \
-                           requests \
-                           retry \
-                           rpyc \
-                           scandir \
-                           scapy==2.5.0 \
-                           setuptools-rust \
-                           six \
-                           snappi==0.9.1 \
-                           snappi-convergence==0.4.1 \
-                           snappi-ixnetwork==0.9.1 \
-                           sshconf==0.2.5 \
-                           tabulate \
-                           textfsm==1.1.2 \
-                           thrift==0.11.0 \
-                           virtualenv
-
-# Deactivating a virtualenv
-ENV PATH="$BACKUP_OF_PATH"
-{% endif %}
-
 USER root
 WORKDIR /azp
 COPY start.sh \

From 3a0a6899ebed7a079ce143bc5fd1478236f0e0cf Mon Sep 17 00:00:00 2001
From: "Marty Y. Lok" <76118573+mlok-nokia@users.noreply.github.com>
Date: Wed, 21 Feb 2024 13:44:58 -0500
Subject: [PATCH 0262/1115] [service-checker] Fix the service-checker issue
 which is caused by PR17836 (#18109)

PR #17836 added the container checking for database-chassis for Supervisor. But the related container_feature_dict[] is missing for the database-chassis. This causes the exception failure shows on Supervisor

Signed-off-by: mlok <marty.lok@nokia.com>
---
 src/system-health/health_checker/service_checker.py | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/system-health/health_checker/service_checker.py b/src/system-health/health_checker/service_checker.py
index d2f245e70..bc38bd43a 100644
--- a/src/system-health/health_checker/service_checker.py
+++ b/src/system-health/health_checker/service_checker.py
@@ -102,6 +102,7 @@ def get_expected_running_containers(self, feature_table):
                     
         if device_info.is_supervisor():
             expected_running_containers.add("database-chassis")
+            container_feature_dict["database-chassis"] = "database"
         return expected_running_containers, container_feature_dict
 
     def get_current_running_containers(self):

From 8506826348c422be191599572404eab9af89638c Mon Sep 17 00:00:00 2001
From: Saikrishna Arcot <sarcot@microsoft.com>
Date: Wed, 21 Feb 2024 13:22:07 -0800
Subject: [PATCH 0263/1115] Update the database, teamd, and radv containers to
 Bookworm (#18108)

* Update Redis DB start options for multi-asic and chassis cases

Starting with Redis 7.0 (specifically, redis/redis#9034), setting a
custom `--bind` address on the command line no longer disables protected
mode (which blocks connections from non-localhost IP addresses unless a
password is set). For multi-asic and chassis database DBs, we currently
specify a non-localhost IP address and do not specify any password,
which means this change would break things there.

To work around this, if we are specifying a non-localhost IP address on
the command line, then disable protected mode.

* Clean up debug pacakge list for docker-teamd

The debug pacakges for swss and libswsscommon are already installed by
docker-swss-layer-bookworm and docker-config-engine-bookworm, so they
don't need to be specified here again.

Signed-off-by: Saikrishna Arcot <sarcot@microsoft.com>
---
 .../Dockerfile.j2                             |  2 +-
 dockers/docker-database/Dockerfile.j2         |  2 +-
 dockers/docker-database/supervisord.conf.j2   |  8 +++-
 .../docker-router-advertiser/Dockerfile.j2    |  2 +-
 dockers/docker-teamd/Dockerfile.j2            |  2 +-
 rules/docker-database.mk                      | 10 ++---
 rules/docker-router-advertiser.mk             | 11 +++--
 rules/docker-teamd.mk                         | 13 +++---
 rules/libteam.mk                              | 18 ++++----
 src/libteam/Makefile                          | 43 +++++++++----------
 .../0008-libteam-Add-warm_reboot-mode.patch   |  8 ++--
 .../0015-add-support-for-custom-retry.patch   | 23 +++++-----
 .../0016-block-retry-count-changes.patch      |  4 +-
 src/libteam/patch/series                      |  8 ++--
 14 files changed, 76 insertions(+), 78 deletions(-)

diff --git a/dockers/docker-config-engine-bookworm/Dockerfile.j2 b/dockers/docker-config-engine-bookworm/Dockerfile.j2
index 9662c98ec..f31f996ab 100644
--- a/dockers/docker-config-engine-bookworm/Dockerfile.j2
+++ b/dockers/docker-config-engine-bookworm/Dockerfile.j2
@@ -21,7 +21,7 @@ RUN apt-get install -y        \
 # Explicitly install pyangbind here, as pyangbind causes enum34 to be installed.
 # enum34 causes Python 're' package to not work properly as it redefines an incompatible enum.py module
 # https://github.com/robshakir/pyangbind/issues/232
-RUN pip3 install pyangbind==0.8.1
+RUN pip3 install pyangbind==0.8.2
 RUN pip3 uninstall -y enum34
 
 # Install python-redis
diff --git a/dockers/docker-database/Dockerfile.j2 b/dockers/docker-database/Dockerfile.j2
index 3b0de019e..b73762da5 100644
--- a/dockers/docker-database/Dockerfile.j2
+++ b/dockers/docker-database/Dockerfile.j2
@@ -1,5 +1,5 @@
 {% from "dockers/dockerfile-macros.j2" import install_debian_packages, install_python_wheels, copy_files %}
-FROM docker-config-engine-bullseye-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}}
+FROM docker-config-engine-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}}
 
 ARG docker_container_name
 
diff --git a/dockers/docker-database/supervisord.conf.j2 b/dockers/docker-database/supervisord.conf.j2
index b71a4c59d..62909aae3 100644
--- a/dockers/docker-database/supervisord.conf.j2
+++ b/dockers/docker-database/supervisord.conf.j2
@@ -31,12 +31,16 @@ dependent_startup=true
 {% if INSTANCES %}
 {%     for redis_inst, redis_items in INSTANCES.items() %}
 [program:{{ redis_inst }}]
-{% if redis_items['hostname'] != '127.0.0.1' and redis_inst != 'redis_chassis' %}
+{% if redis_items['hostname'] != '127.0.0.1' %}
+{%- set ADDITIONAL_OPTS = '--protected-mode no' %}
+{%- if redis_inst != 'redis_chassis' %}
 {%- set LOOPBACK_IP = '127.0.0.1' -%}
+{%- endif -%}
 {%- else -%}
 {%- set LOOPBACK_IP = '' -%}
+{%- set ADDITIONAL_OPTS = '' %}
 {%- endif -%}
-command=/bin/bash -c "{ [[ -s /var/lib/{{ redis_inst }}/dump.rdb ]] || rm -f /var/lib/{{ redis_inst }}/dump.rdb; } && mkdir -p /var/lib/{{ redis_inst }} && exec /usr/bin/redis-server /etc/redis/redis.conf --bind {{ LOOPBACK_IP }} {{ redis_items['hostname'] }} --port {{ redis_items['port'] }} --unixsocket {{ redis_items['unix_socket_path'] }} --pidfile /var/run/redis/{{ redis_inst }}.pid --dir /var/lib/{{ redis_inst }}"
+command=/bin/bash -c "{ [[ -s /var/lib/{{ redis_inst }}/dump.rdb ]] || rm -f /var/lib/{{ redis_inst }}/dump.rdb; } && mkdir -p /var/lib/{{ redis_inst }} && exec /usr/bin/redis-server /etc/redis/redis.conf --bind {{ LOOPBACK_IP }} {{ redis_items['hostname'] }} --port {{ redis_items['port'] }} --unixsocket {{ redis_items['unix_socket_path'] }} --pidfile /var/run/redis/{{ redis_inst }}.pid --dir /var/lib/{{ redis_inst }} {{ ADDITIONAL_OPTS }}"
 priority=2
 user=redis
 autostart=true
diff --git a/dockers/docker-router-advertiser/Dockerfile.j2 b/dockers/docker-router-advertiser/Dockerfile.j2
index d36eb7efe..3818453fb 100644
--- a/dockers/docker-router-advertiser/Dockerfile.j2
+++ b/dockers/docker-router-advertiser/Dockerfile.j2
@@ -1,5 +1,5 @@
 {% from "dockers/dockerfile-macros.j2" import install_debian_packages, install_python_wheels, copy_files %}
-FROM docker-config-engine-bullseye-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}}
+FROM docker-config-engine-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}}
 
 ARG docker_container_name
 ARG image_version
diff --git a/dockers/docker-teamd/Dockerfile.j2 b/dockers/docker-teamd/Dockerfile.j2
index 33cb3af92..b128a7c94 100644
--- a/dockers/docker-teamd/Dockerfile.j2
+++ b/dockers/docker-teamd/Dockerfile.j2
@@ -1,5 +1,5 @@
 {% from "dockers/dockerfile-macros.j2" import install_debian_packages, install_python_wheels, copy_files %}
-FROM docker-swss-layer-bullseye-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}}
+FROM docker-swss-layer-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}}
 
 ARG docker_container_name
 
diff --git a/rules/docker-database.mk b/rules/docker-database.mk
index 5fb090835..c38f574af 100644
--- a/rules/docker-database.mk
+++ b/rules/docker-database.mk
@@ -10,21 +10,21 @@ $(DOCKER_DATABASE)_DEPENDS += $(LIBSWSSCOMMON) \
 
 $(DOCKER_DATABASE)_PATH = $(DOCKERS_PATH)/$(DOCKER_DATABASE_STEM)
 
-$(DOCKER_DATABASE)_DBG_DEPENDS = $($(DOCKER_CONFIG_ENGINE_BULLSEYE)_DBG_DEPENDS)
+$(DOCKER_DATABASE)_DBG_DEPENDS = $($(DOCKER_CONFIG_ENGINE_BOOKWORM)_DBG_DEPENDS)
 
-$(DOCKER_DATABASE)_DBG_IMAGE_PACKAGES = $($(DOCKER_CONFIG_ENGINE_BULLSEYE)_DBG_IMAGE_PACKAGES)
+$(DOCKER_DATABASE)_DBG_IMAGE_PACKAGES = $($(DOCKER_CONFIG_ENGINE_BOOKWORM)_DBG_IMAGE_PACKAGES)
 
-$(DOCKER_DATABASE)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE_BULLSEYE)
+$(DOCKER_DATABASE)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE_BOOKWORM)
 
 $(DOCKER_DATABASE)_VERSION = 1.0.0
 $(DOCKER_DATABASE)_PACKAGE_NAME = database
 
 SONIC_DOCKER_IMAGES += $(DOCKER_DATABASE)
-SONIC_BULLSEYE_DOCKERS += $(DOCKER_DATABASE)
+SONIC_BOOKWORM_DOCKERS += $(DOCKER_DATABASE)
 SONIC_INSTALL_DOCKER_IMAGES += $(DOCKER_DATABASE)
 
 SONIC_DOCKER_DBG_IMAGES += $(DOCKER_DATABASE_DBG)
-SONIC_BULLSEYE_DBG_DOCKERS += $(DOCKER_DATABASE_DBG)
+SONIC_BOOKWORM_DBG_DOCKERS += $(DOCKER_DATABASE_DBG)
 SONIC_INSTALL_DOCKER_DBG_IMAGES += $(DOCKER_DATABASE_DBG)
 
 $(DOCKER_DATABASE)_CONTAINER_NAME = database
diff --git a/rules/docker-router-advertiser.mk b/rules/docker-router-advertiser.mk
index f7dec2430..fc23a4319 100644
--- a/rules/docker-router-advertiser.mk
+++ b/rules/docker-router-advertiser.mk
@@ -6,12 +6,11 @@ DOCKER_ROUTER_ADVERTISER_DBG = $(DOCKER_ROUTER_ADVERTISER_STEM)-$(DBG_IMAGE_MARK
 
 $(DOCKER_ROUTER_ADVERTISER)_PATH = $(DOCKERS_PATH)/$(DOCKER_ROUTER_ADVERTISER_STEM)
 
-$(DOCKER_ROUTER_ADVERTISER)_DBG_DEPENDS = $($(DOCKER_CONFIG_ENGINE_BULLSEYE)_DBG_DEPENDS)
-$(DOCKER_ROUTER_ADVERTISER)_DBG_DEPENDS += $(RADVD_DBG)
+$(DOCKER_ROUTER_ADVERTISER)_DBG_DEPENDS = $($(DOCKER_CONFIG_ENGINE_BOOKWORM)_DBG_DEPENDS)
 
-$(DOCKER_ROUTER_ADVERTISER)_DBG_IMAGE_PACKAGES = $($(DOCKER_CONFIG_ENGINE_BULLSEYE)_DBG_IMAGE_PACKAGES)
+$(DOCKER_ROUTER_ADVERTISER)_DBG_IMAGE_PACKAGES = $($(DOCKER_CONFIG_ENGINE_BOOKWORM)_DBG_IMAGE_PACKAGES)
 
-$(DOCKER_ROUTER_ADVERTISER)_LOAD_DOCKERS = $(DOCKER_CONFIG_ENGINE_BULLSEYE)
+$(DOCKER_ROUTER_ADVERTISER)_LOAD_DOCKERS = $(DOCKER_CONFIG_ENGINE_BOOKWORM)
 
 $(DOCKER_ROUTER_ADVERTISER)_VERSION = 1.0.0
 $(DOCKER_ROUTER_ADVERTISER)_PACKAGE_NAME = radv
@@ -28,8 +27,8 @@ ifeq ($(INCLUDE_ROUTER_ADVERTISER), y)
 SONIC_INSTALL_DOCKER_DBG_IMAGES += $(DOCKER_ROUTER_ADVERTISER_DBG)
 endif
 
-SONIC_BULLSEYE_DOCKERS += $(DOCKER_ROUTER_ADVERTISER)
-SONIC_BULLSEYE_DBG_DOCKERS += $(DOCKER_ROUTER_ADVERTISER_DBG)
+SONIC_BOOKWORM_DOCKERS += $(DOCKER_ROUTER_ADVERTISER)
+SONIC_BOOKWORM_DBG_DOCKERS += $(DOCKER_ROUTER_ADVERTISER_DBG)
 
 $(DOCKER_ROUTER_ADVERTISER)_CONTAINER_NAME = radv
 $(DOCKER_ROUTER_ADVERTISER)_RUN_OPT += -t
diff --git a/rules/docker-teamd.mk b/rules/docker-teamd.mk
index 275fe1c06..6d29e0f7e 100644
--- a/rules/docker-teamd.mk
+++ b/rules/docker-teamd.mk
@@ -6,14 +6,13 @@ DOCKER_TEAMD_DBG = $(DOCKER_TEAMD_STEM)-$(DBG_IMAGE_MARK).gz
 
 $(DOCKER_TEAMD)_PATH = $(DOCKERS_PATH)/$(DOCKER_TEAMD_STEM)
 
-$(DOCKER_TEAMD)_DEPENDS += $(SWSS) $(LIBTEAMDCTL) $(LIBTEAM_UTILS)
-$(DOCKER_TEAMD)_DBG_DEPENDS = $($(DOCKER_SWSS_LAYER_BULLSEYE)_DBG_DEPENDS)
-$(DOCKER_TEAMD)_DBG_DEPENDS += $(SWSS_DBG) $(LIBSWSSCOMMON_DBG)
+$(DOCKER_TEAMD)_DEPENDS += $(LIBTEAMDCTL) $(LIBTEAM_UTILS)
+$(DOCKER_TEAMD)_DBG_DEPENDS = $($(DOCKER_SWSS_LAYER_BOOKWORM)_DBG_DEPENDS)
 $(DOCKER_TEAMD)_DBG_DEPENDS += $(LIBTEAMDCTL_DBG) $(LIBTEAM_UTILS_DBG)
 
-$(DOCKER_TEAMD)_DBG_IMAGE_PACKAGES = $($(DOCKER_SWSS_LAYER_BULLSEYE)_DBG_IMAGE_PACKAGES)
+$(DOCKER_TEAMD)_DBG_IMAGE_PACKAGES = $($(DOCKER_SWSS_LAYER_BOOKWORM)_DBG_IMAGE_PACKAGES)
 
-$(DOCKER_TEAMD)_LOAD_DOCKERS += $(DOCKER_SWSS_LAYER_BULLSEYE)
+$(DOCKER_TEAMD)_LOAD_DOCKERS += $(DOCKER_SWSS_LAYER_BOOKWORM)
 
 $(DOCKER_TEAMD)_VERSION = 1.0.0
 $(DOCKER_TEAMD)_PACKAGE_NAME = teamd
@@ -41,5 +40,5 @@ $(DOCKER_TEAMD)_RUN_OPT += -v /host/warmboot:/var/warmboot
 $(DOCKER_TEAMD)_BASE_IMAGE_FILES += teamdctl:/usr/bin/teamdctl
 $(DOCKER_TEAMD)_FILES += $(SUPERVISOR_PROC_EXIT_LISTENER_SCRIPT)
 
-SONIC_BULLSEYE_DOCKERS += $(DOCKER_TEAMD)
-SONIC_BULLSEYE_DBG_DOCKERS += $(DOCKER_TEAMD_DBG)
+SONIC_BOOKWORM_DOCKERS += $(DOCKER_TEAMD)
+SONIC_BOOKWORM_DBG_DOCKERS += $(DOCKER_TEAMD_DBG)
diff --git a/rules/libteam.mk b/rules/libteam.mk
index 0dd1b88b0..e2bf72631 100644
--- a/rules/libteam.mk
+++ b/rules/libteam.mk
@@ -1,32 +1,34 @@
 # libteam packages
 
-LIBTEAM_VERSION = 1.30-1
+LIBTEAM_VERSION := 1.31
+LIBTEAM_VERSION_FULL := $(LIBTEAM_VERSION)-1
 
 export LIBTEAM_VERSION
+export LIBTEAM_VERSION_FULL
 
-LIBTEAM = libteam5_$(LIBTEAM_VERSION)_$(CONFIGURED_ARCH).deb
+LIBTEAM = libteam5_$(LIBTEAM_VERSION_FULL)_$(CONFIGURED_ARCH).deb
 $(LIBTEAM)_SRC_PATH = $(SRC_PATH)/libteam
 $(LIBTEAM)_DEPENDS += $(LIBNL_GENL3_DEV) $(LIBNL_CLI_DEV)
 SONIC_MAKE_DEBS += $(LIBTEAM)
 
-LIBTEAM_DBG = libteam5-dbgsym_$(LIBTEAM_VERSION)_$(CONFIGURED_ARCH).deb
+LIBTEAM_DBG = libteam5-dbgsym_$(LIBTEAM_VERSION_FULL)_$(CONFIGURED_ARCH).deb
 $(eval $(call add_derived_package,$(LIBTEAM),$(LIBTEAM_DBG)))
 
-LIBTEAM_DEV = libteam-dev_$(LIBTEAM_VERSION)_$(CONFIGURED_ARCH).deb
+LIBTEAM_DEV = libteam-dev_$(LIBTEAM_VERSION_FULL)_$(CONFIGURED_ARCH).deb
 $(LIBTEAM_DEV)_DEPENDS += $(LIBTEAMDCTL)
 $(eval $(call add_derived_package,$(LIBTEAM),$(LIBTEAM_DEV)))
 
-LIBTEAMDCTL = libteamdctl0_$(LIBTEAM_VERSION)_$(CONFIGURED_ARCH).deb
+LIBTEAMDCTL = libteamdctl0_$(LIBTEAM_VERSION_FULL)_$(CONFIGURED_ARCH).deb
 $(eval $(call add_derived_package,$(LIBTEAM),$(LIBTEAMDCTL)))
 
-LIBTEAMDCTL_DBG = libteamdctl0-dbgsym_$(LIBTEAM_VERSION)_$(CONFIGURED_ARCH).deb
+LIBTEAMDCTL_DBG = libteamdctl0-dbgsym_$(LIBTEAM_VERSION_FULL)_$(CONFIGURED_ARCH).deb
 $(eval $(call add_derived_package,$(LIBTEAM),$(LIBTEAMDCTL_DBG)))
 
-LIBTEAM_UTILS = libteam-utils_$(LIBTEAM_VERSION)_$(CONFIGURED_ARCH).deb
+LIBTEAM_UTILS = libteam-utils_$(LIBTEAM_VERSION_FULL)_$(CONFIGURED_ARCH).deb
 $(LIBTEAM_UTILS)_DEPENDS += $(LIBTEAMDCTL)
 $(eval $(call add_derived_package,$(LIBTEAM),$(LIBTEAM_UTILS)))
 
-LIBTEAM_UTILS_DBG = libteam-utils-dbgsym_$(LIBTEAM_VERSION)_$(CONFIGURED_ARCH).deb
+LIBTEAM_UTILS_DBG = libteam-utils-dbgsym_$(LIBTEAM_VERSION_FULL)_$(CONFIGURED_ARCH).deb
 $(eval $(call add_derived_package,$(LIBTEAM),$(LIBTEAM_UTILS_DBG)))
 
 # The .c, .cpp, .h & .hpp files under src/{$DBG_SRC_ARCHIVE list}
diff --git a/src/libteam/Makefile b/src/libteam/Makefile
index 0c98c0ce4..fa34d30ee 100644
--- a/src/libteam/Makefile
+++ b/src/libteam/Makefile
@@ -2,35 +2,32 @@
 SHELL = /bin/bash
 .SHELLFLAGS += -e
 
-MAIN_TARGET = libteam5_$(LIBTEAM_VERSION)_$(CONFIGURED_ARCH).deb
-DERIVED_TARGETS = libteam-dev_$(LIBTEAM_VERSION)_$(CONFIGURED_ARCH).deb \
-		  libteamdctl0_$(LIBTEAM_VERSION)_$(CONFIGURED_ARCH).deb \
-		  libteam-utils_$(LIBTEAM_VERSION)_$(CONFIGURED_ARCH).deb \
-		  libteam5-dbgsym_$(LIBTEAM_VERSION)_$(CONFIGURED_ARCH).deb \
-		  libteamdctl0-dbgsym_$(LIBTEAM_VERSION)_$(CONFIGURED_ARCH).deb \
-		  libteam-utils-dbgsym_$(LIBTEAM_VERSION)_$(CONFIGURED_ARCH).deb
+MAIN_TARGET = libteam5_$(LIBTEAM_VERSION_FULL)_$(CONFIGURED_ARCH).deb
+DERIVED_TARGETS = libteam-dev_$(LIBTEAM_VERSION_FULL)_$(CONFIGURED_ARCH).deb \
+		  libteamdctl0_$(LIBTEAM_VERSION_FULL)_$(CONFIGURED_ARCH).deb \
+		  libteam-utils_$(LIBTEAM_VERSION_FULL)_$(CONFIGURED_ARCH).deb \
+		  libteam5-dbgsym_$(LIBTEAM_VERSION_FULL)_$(CONFIGURED_ARCH).deb \
+		  libteamdctl0-dbgsym_$(LIBTEAM_VERSION_FULL)_$(CONFIGURED_ARCH).deb \
+		  libteam-utils-dbgsym_$(LIBTEAM_VERSION_FULL)_$(CONFIGURED_ARCH).deb
 
 $(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% :
-	# Obtain libteam
-	rm -rf ./libteam
-	git clone https://github.com/jpirko/libteam.git
-	pushd ./libteam
-	git checkout -b teamd -f c7237377dead39ae4a711297203bacf7edb9fa41
+	# Remove any stale files
+	rm -rf ./libteam-$(LIBTEAM_VERSION)
 
-	# Apply patch series
+	# Get libteam release, debian files
+	dget -u https://deb.debian.org/debian/pool/main/libt/libteam/libteam_$(LIBTEAM_VERSION_FULL).dsc
+	pushd ./libteam-$(LIBTEAM_VERSION)
+
+	# Create a git repository here for stg to apply patches
+	git init
+	git add -f *
+	git commit -qm "initial commit"
+
+	# Apply patches
 	stg init
 	stg import -s ../patch/series
-	popd
-
-	# Obtain debian packaging
-	git clone https://salsa.debian.org/debian/libteam.git tmp
-	pushd ./tmp
-	git checkout -f debian/1.30-1
-	popd
 
-	mv tmp/debian libteam/
-	rm -rf tmp
-	pushd ./libteam
+	# Build source and Debian packages
 ifeq ($(CROSS_BUILD_ENVIRON), y)
 	dpkg-buildpackage -rfakeroot -b -us -uc -a$(CONFIGURED_ARCH) -Pcross,nocheck -j$(SONIC_CONFIG_MAKE_JOBS) --admindir $(SONIC_DPKG_ADMINDIR)
 else
diff --git a/src/libteam/patch/0008-libteam-Add-warm_reboot-mode.patch b/src/libteam/patch/0008-libteam-Add-warm_reboot-mode.patch
index 397ee8565..c1a8abcd1 100644
--- a/src/libteam/patch/0008-libteam-Add-warm_reboot-mode.patch
+++ b/src/libteam/patch/0008-libteam-Add-warm_reboot-mode.patch
@@ -667,7 +667,7 @@ index 955ef0c..782fc05 100644
  	teamd_log_info("%s: Changed port state: \"%s\" -> \"%s\"",
  		       lacp_port->tdport->ifname,
  		       lacp_port_state_name[lacp_port->state],
-@@ -1097,34 +1402,23 @@ static int lacpdu_send(struct lacp_port *lacp_port)
+@@ -1097,32 +1402,21 @@ static int lacpdu_send(struct lacp_port *lacp_port)
  	return err;
  }
  
@@ -691,11 +691,9 @@ index 955ef0c..782fc05 100644
 -	if (!teamd_port_present(lacp_port->ctx, lacp_port->tdport))
 -		return 0;
  
--	if (!lacpdu_check(&lacpdu)) {
-+	if (!lacpdu_check(lacpdu)) {
- 		teamd_log_warn("malformed LACP PDU came.");
+-	if (!lacpdu_check(&lacpdu))
++	if (!lacpdu_check(lacpdu))
  		return 0;
- 	}
  
 +	/* save received lacp pdu frame */
 +	(void)memcpy(&lacp_port->last_pdu, lacpdu, sizeof(struct lacpdu));
diff --git a/src/libteam/patch/0015-add-support-for-custom-retry.patch b/src/libteam/patch/0015-add-support-for-custom-retry.patch
index f8bee7dec..9bf8d9595 100644
--- a/src/libteam/patch/0015-add-support-for-custom-retry.patch
+++ b/src/libteam/patch/0015-add-support-for-custom-retry.patch
@@ -64,7 +64,7 @@ index 6b43916..3e8a0f6 100644
  }
  
  static bool lacpdu_check(struct lacpdu *lacpdu)
-@@ -100,14 +123,31 @@ static bool lacpdu_check(struct lacpdu *lacpdu)
+@@ -100,12 +123,31 @@ static bool lacpdu_check(struct lacpdu *lacpdu)
  	/*
  	 * According to 43.4.12 version_number, tlv_type and reserved fields
  	 * should not be checked.
@@ -74,33 +74,32 @@ index 6b43916..3e8a0f6 100644
 +	 * need to be checked.
  	 */
  
--	if (lacpdu->subtype		!= 0x01 ||
--	    lacpdu->actor_info_len	!= 0x14 ||
+-	if (lacpdu->actor_info_len	!= 0x14 ||
 -	    lacpdu->partner_info_len	!= 0x14 ||
 -	    lacpdu->collector_info_len	!= 0x10 ||
--	    lacpdu->terminator_info_len	!= 0x00)
-+	if (lacpdu->subtype	!= 0x01)
-+		return false;
+-	    lacpdu->terminator_info_len	!= 0x00) {
 +	if (lacpdu->version_number == 0x01) {
 +	    if (lacpdu->actor_info_len	!= 0x14 ||
 +			lacpdu->partner_info_len	!= 0x14 ||
 +			lacpdu->collector_info_len	!= 0x10 ||
-+			lacpdu->v1.terminator_info_len	!= 0x00)
++			lacpdu->v1.terminator_info_len	!= 0x00) {
++			teamd_log_warn("malformed LACPv1 PDU came.");
 +			return false;
++		}
 +	} else if (lacpdu->version_number == 0xf1) {
 +	    if (lacpdu->actor_info_len	!= 0x14 ||
 +			lacpdu->partner_info_len	!= 0x14 ||
 +			lacpdu->collector_info_len	!= 0x10 ||
 +			lacpdu->v2.actor_retry_tlv_len != 0x04 ||
 +			lacpdu->v2.partner_retry_tlv_len != 0x04 ||
-+			lacpdu->v2.terminator_info_len	!= 0x00)
++			lacpdu->v2.terminator_info_len	!= 0x00) {
++			teamd_log_warn("malformed LACPv241 PDU came.");
 +			return false;
++		}
 +	} else {
+ 		teamd_log_warn("malformed LACP PDU came.");
  		return false;
-+	}
- 	return true;
- }
- 
+ 	}
 @@ -154,6 +194,10 @@ struct lacp {
  #define		LACP_CFG_DFLT_MIN_PORTS_MAX 1024
  		enum lacp_agg_select_policy agg_select_policy;
diff --git a/src/libteam/patch/0016-block-retry-count-changes.patch b/src/libteam/patch/0016-block-retry-count-changes.patch
index d78479595..40a0a996b 100644
--- a/src/libteam/patch/0016-block-retry-count-changes.patch
+++ b/src/libteam/patch/0016-block-retry-count-changes.patch
@@ -58,8 +58,8 @@ index 3e8a0f6..b6a8647 100644
  	int err;
 +	struct timespec monotonic_time = {0};
  
- 	if (!lacpdu_check(lacpdu)) {
- 		teamd_log_warn("malformed LACP PDU came.");
+ 	if (!lacpdu_check(lacpdu))
+ 		return 0;
 @@ -1523,14 +1529,38 @@ static int lacpdu_process(struct lacp_port *lacp_port, struct lacpdu* lacpdu)
  					lacp_port->partner_retry_count,
  					lacpdu->v2.actor_retry_count);
diff --git a/src/libteam/patch/series b/src/libteam/patch/series
index 889320ec6..7dc1e0a76 100644
--- a/src/libteam/patch/series
+++ b/src/libteam/patch/series
@@ -1,13 +1,13 @@
 0001-libteam-Temporarily-remove-redundant-debug-messages.patch
 0002-teamd-lacp-runner-will-send-lacp-update-right-after-.patch
 0003-libteam-Add-fallback-support-for-single-member-port-.patch
-0004-Skip-setting-the-same-hwaddr-to-lag-port-to-avoid-di.patch
+#0004-Skip-setting-the-same-hwaddr-to-lag-port-to-avoid-di.patch
 0005-Increase-default-buffer-size-from-98304-to-983040.patch
 0006-teamd-Administratively-shutdown-port-channel-has-mem.patch
-0007-Send-LACP-PDU-immediately-if-our-state-changed.patch
+#0007-Send-LACP-PDU-immediately-if-our-state-changed.patch
 0008-libteam-Add-warm_reboot-mode.patch
-0009-Fix-ifinfo_link_with_port-race-condition-with-newlink.patch
-0010-When-read-of-timerfd-returned-0-don-t-consider-this-.patch
+#0009-Fix-ifinfo_link_with_port-race-condition-with-newlink.patch
+#0010-When-read-of-timerfd-returned-0-don-t-consider-this-.patch
 0011-Remove-extensive-debug-output.patch
 0012-Increase-min_ports-upper-limit-to-1024.patch
 0013-set-port-to-disabled-state-during-removal.patch

From 2244aa2d7ba20237f3216f808f5452cde587094b Mon Sep 17 00:00:00 2001
From: Xichen96 <lukelin0907@gmail.com>
Date: Thu, 22 Feb 2024 08:52:51 +0800
Subject: [PATCH 0264/1115] [dhcp_server] add config dhcp server option
 (#18013)

* add dhcp server option cli
---
 .../cli-plugin-tests/mock_config_db.json      |   8 +-
 .../test_config_dhcp_server.py                | 150 ++++++++++++++++++
 .../cli-plugin-tests/test_show_dhcp_server.py |   6 +-
 .../cli/config/plugins/dhcp_server.py         | 102 +++++++++++-
 .../cli/show/plugins/show_dhcp_server.py      |   2 +-
 5 files changed, 259 insertions(+), 9 deletions(-)

diff --git a/dockers/docker-dhcp-server/cli-plugin-tests/mock_config_db.json b/dockers/docker-dhcp-server/cli-plugin-tests/mock_config_db.json
index cc5256079..cf108db8b 100644
--- a/dockers/docker-dhcp-server/cli-plugin-tests/mock_config_db.json
+++ b/dockers/docker-dhcp-server/cli-plugin-tests/mock_config_db.json
@@ -33,11 +33,15 @@
         "lease_time": "3600",
         "mode": "PORT",
         "netmask": "255.255.255.0",
-        "customized_options": "option60",
         "state": "disabled"
     },
     "DHCP_SERVER_IPV4_CUSTOMIZED_OPTIONS|option60": {
-        "id": "60",
+        "id": "163",
+        "type": "string",
+        "value": "dummy_value"
+    },
+    "DHCP_SERVER_IPV4_CUSTOMIZED_OPTIONS|option61": {
+        "id": "164",
         "type": "string",
         "value": "dummy_value"
     },
diff --git a/dockers/docker-dhcp-server/cli-plugin-tests/test_config_dhcp_server.py b/dockers/docker-dhcp-server/cli-plugin-tests/test_config_dhcp_server.py
index 8cada47f0..bc91dfe98 100644
--- a/dockers/docker-dhcp-server/cli-plugin-tests/test_config_dhcp_server.py
+++ b/dockers/docker-dhcp-server/cli-plugin-tests/test_config_dhcp_server.py
@@ -606,3 +606,153 @@ def test_config_dhcp_server_ipv4_unbind_unbind_ip(self, mock_db):
                 ["Vlan100", "Ethernet4", "100.1.1.13,100.1.1.14"], obj=db)
         assert result.exit_code == 2, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
 
+    def test_config_dhcp_server_ipv4_option_add(self, mock_db):
+        expected_value = {
+            "option_id": "165",
+            "type": "string",
+            "value": "dummy_value"
+        }
+        runner = CliRunner()
+        db = clicommon.Db()
+        db.db = mock_db
+        result = runner.invoke(dhcp_server.dhcp_server.commands["ipv4"].commands["option"].commands["add"], \
+                ["option62", "165", "string", "dummy_value"], obj=db)
+        assert result.exit_code == 0, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
+        assert mock_db.get_all("CONFIG_DB", "DHCP_SERVER_IPV4_CUSTOMIZED_OPTIONS|option62") == expected_value
+
+    def test_config_dhcp_server_ipv4_option_add_existing(self, mock_db):
+        runner = CliRunner()
+        db = clicommon.Db()
+        db.db = mock_db
+        result = runner.invoke(dhcp_server.dhcp_server.commands["ipv4"].commands["option"].commands["add"], \
+                ["option60", "163", "string", "dummy_value"], obj=db)
+        assert result.exit_code == 2, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
+
+    def test_config_dhcp_server_ipv4_option_add_illegal_option_id(self, mock_db):
+        runner = CliRunner()
+        db = clicommon.Db()
+        db.db = mock_db
+        result = runner.invoke(dhcp_server.dhcp_server.commands["ipv4"].commands["option"].commands["add"], \
+                ["option62", "10", "string", "dummy_value"], obj=db)
+        assert result.exit_code == 2, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
+
+    def test_config_dhcp_server_ipv4_option_add_illegal_type(self, mock_db):
+        runner = CliRunner()
+        db = clicommon.Db()
+        db.db = mock_db
+        result = runner.invoke(dhcp_server.dhcp_server.commands["ipv4"].commands["option"].commands["add"], \
+                ["option62", "165", "xx", "xx"], obj=db)
+        assert result.exit_code == 2, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
+
+    def test_config_dhcp_server_ipv4_option_add_illegal_value(self, mock_db):
+        runner = CliRunner()
+        db = clicommon.Db()
+        db.db = mock_db
+        result = runner.invoke(dhcp_server.dhcp_server.commands["ipv4"].commands["option"].commands["add"], \
+                ["option62", "165", "uint8", "1000000"], obj=db)
+        assert result.exit_code == 2, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
+
+    def test_config_dhcp_server_ipv4_option_del(self, mock_db):
+        runner = CliRunner()
+        db = clicommon.Db()
+        db.db = mock_db
+        result = runner.invoke(dhcp_server.dhcp_server.commands["ipv4"].commands["option"].commands["del"], \
+                ["option61"], obj=db)
+        assert result.exit_code == 0, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
+        assert mock_db.exists("CONFIG_DB", "DHCP_SERVER_IPV4_CUSTOMIZED_OPTIONS|option61") == False
+
+    def test_config_dhcp_server_ipv4_option_del_nonexisting(self, mock_db):
+        runner = CliRunner()
+        db = clicommon.Db()
+        db.db = mock_db
+        result = runner.invoke(dhcp_server.dhcp_server.commands["ipv4"].commands["option"].commands["del"], \
+                ["option62"], obj=db)
+        assert result.exit_code == 2, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
+
+    def test_config_dhcp_server_ipv4_option_del_referenced(self, mock_db):
+        runner = CliRunner()
+        db = clicommon.Db()
+        db.db = mock_db
+        result = runner.invoke(dhcp_server.dhcp_server.commands["ipv4"].commands["option"].commands["del"], \
+                ["option60"], obj=db)
+        assert result.exit_code == 2, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
+
+    def test_config_dhcp_server_ipv4_option_bind(self, mock_db):
+        runner = CliRunner()
+        db = clicommon.Db()
+        db.db = mock_db
+        result = runner.invoke(dhcp_server.dhcp_server.commands["ipv4"].commands["option"].commands["bind"], \
+                ["Vlan300", "option60"], obj=db)
+        assert result.exit_code == 0, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
+        assert mock_db.get("CONFIG_DB", "DHCP_SERVER_IPV4|Vlan300", "customized_options") == "option60"
+
+    def test_config_dhcp_server_ipv4_option_bind_multiple_options(self, mock_db):
+        runner = CliRunner()
+        db = clicommon.Db()
+        db.db = mock_db
+        result = runner.invoke(dhcp_server.dhcp_server.commands["ipv4"].commands["option"].commands["bind"], \
+                ["Vlan300", "option60,option61"], obj=db)
+        assert result.exit_code == 0, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
+        result = mock_db.get("CONFIG_DB", "DHCP_SERVER_IPV4|Vlan300", "customized_options")
+        assert result and set(result.split(",")) == set("option60,option61".split(","))
+
+    def test_config_dhcp_server_ipv4_option_bind_to_existing(self, mock_db):
+        runner = CliRunner()
+        db = clicommon.Db()
+        db.db = mock_db
+        result = runner.invoke(dhcp_server.dhcp_server.commands["ipv4"].commands["option"].commands["bind"], \
+                ["Vlan100", "option61"], obj=db)
+        assert result.exit_code == 0, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
+        result = mock_db.get("CONFIG_DB", "DHCP_SERVER_IPV4|Vlan100", "customized_options")
+        assert result and set(result.split(",")) == set("option60,option61".split(","))
+
+    def test_config_dhcp_server_ipv4_option_bind_same_option_to_existing(self, mock_db):
+        runner = CliRunner()
+        db = clicommon.Db()
+        db.db = mock_db
+        result = runner.invoke(dhcp_server.dhcp_server.commands["ipv4"].commands["option"].commands["bind"], \
+                ["Vlan100", "option60"], obj=db)
+        assert result.exit_code == 0, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
+        assert mock_db.get("CONFIG_DB", "DHCP_SERVER_IPV4|Vlan100", "customized_options") == "option60"
+
+    def test_config_dhcp_server_ipv4_option_bind_to_nonexisting_intf(self, mock_db):
+        runner = CliRunner()
+        db = clicommon.Db()
+        db.db = mock_db
+        result = runner.invoke(dhcp_server.dhcp_server.commands["ipv4"].commands["option"].commands["bind"], \
+                ["Vlan200", "option60"], obj=db)
+        assert result.exit_code == 2, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
+
+    def test_config_dhcp_server_ipv4_option_bind_nonexisting_option(self, mock_db):
+        runner = CliRunner()
+        db = clicommon.Db()
+        db.db = mock_db
+        result = runner.invoke(dhcp_server.dhcp_server.commands["ipv4"].commands["option"].commands["bind"], \
+                ["Vlan300", "option62"], obj=db)
+        assert result.exit_code == 2, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
+
+    def test_config_dhcp_server_ipv4_option_unbind(self, mock_db):
+        runner = CliRunner()
+        db = clicommon.Db()
+        db.db = mock_db
+        result = runner.invoke(dhcp_server.dhcp_server.commands["ipv4"].commands["option"].commands["unbind"], \
+                ["Vlan100", "option60"], obj=db)
+        assert result.exit_code == 0, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
+        result = mock_db.get("CONFIG_DB", "DHCP_SERVER_IPV4|Vlan100", "customized_options")
+        assert result == None or result == ""
+
+    def test_config_dhcp_server_ipv4_option_unbind_nonexisting_intf(self, mock_db):
+        runner = CliRunner()
+        db = clicommon.Db()
+        db.db = mock_db
+        result = runner.invoke(dhcp_server.dhcp_server.commands["ipv4"].commands["option"].commands["unbind"], \
+                ["Vlan200", "option60"], obj=db)
+        assert result.exit_code == 2, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
+
+    def test_config_dhcp_server_ipv4_option_unbind_nonexisting_option(self, mock_db):
+        runner = CliRunner()
+        db = clicommon.Db()
+        db.db = mock_db
+        result = runner.invoke(dhcp_server.dhcp_server.commands["ipv4"].commands["option"].commands["unbind"], \
+                ["Vlan100", "option61"], obj=db)
+        assert result.exit_code == 2, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
diff --git a/dockers/docker-dhcp-server/cli-plugin-tests/test_show_dhcp_server.py b/dockers/docker-dhcp-server/cli-plugin-tests/test_show_dhcp_server.py
index 258c6d11c..bacf911b3 100644
--- a/dockers/docker-dhcp-server/cli-plugin-tests/test_show_dhcp_server.py
+++ b/dockers/docker-dhcp-server/cli-plugin-tests/test_show_dhcp_server.py
@@ -185,7 +185,9 @@ def test_show_dhcp_server_ipv4_option_without_name(self, mock_db):
 +---------------+-------------+-------------+--------+
 | Option Name   |   Option ID | Value       | Type   |
 +===============+=============+=============+========+
-| option60      |          60 | dummy_value | string |
+| option60      |         163 | dummy_value | string |
++---------------+-------------+-------------+--------+
+| option61      |         164 | dummy_value | string |
 +---------------+-------------+-------------+--------+
 """
         runner = CliRunner()
@@ -200,7 +202,7 @@ def test_show_dhcp_server_ipv4_option_with_name(self, mock_db):
 +---------------+-------------+-------------+--------+
 | Option Name   |   Option ID | Value       | Type   |
 +===============+=============+=============+========+
-| option60      |          60 | dummy_value | string |
+| option60      |         163 | dummy_value | string |
 +---------------+-------------+-------------+--------+
 """
         runner = CliRunner()
diff --git a/dockers/docker-dhcp-server/cli/config/plugins/dhcp_server.py b/dockers/docker-dhcp-server/cli/config/plugins/dhcp_server.py
index fcf2bf1db..7f94045e6 100644
--- a/dockers/docker-dhcp-server/cli/config/plugins/dhcp_server.py
+++ b/dockers/docker-dhcp-server/cli/config/plugins/dhcp_server.py
@@ -5,7 +5,7 @@
 import string
 
 
-SUPPORT_TYPE = ["binary", "boolean", "ipv4-address", "string", "uint8", "uint16", "uint32"]
+SUPPORTED_TYPE = ["binary", "boolean", "ipv4-address", "string", "uint8", "uint16", "uint32"]
 
 
 def validate_str_type(type_, value):
@@ -20,7 +20,7 @@ def validate_str_type(type_, value):
     """
     if not isinstance(value, str):
         return False
-    if type_ not in SUPPORT_TYPE:
+    if type_ not in SUPPORTED_TYPE:
         return False
     if type_ == "string":
         return True
@@ -46,6 +46,7 @@ def validate_str_type(type_, value):
 
 
 @click.group(cls=clicommon.AbbreviationGroup, name="dhcp_server")
+@clicommon.pass_db
 def dhcp_server():
     """config DHCP Server information"""
     ctx = click.get_current_context()
@@ -341,10 +342,103 @@ def dhcp_server_ipv4_ip_unbind(db, dhcp_interface, member_interface, range_, ip_
                 ctx.fail("Attempting to unbind range or ip that is not binded")
 
 
-def register(cli):
-    # cli.add_command(dhcp_server)
+@dhcp_server_ipv4.group(cls=clicommon.AliasedGroup, name="option")
+def dhcp_server_ipv4_option():
     pass
 
 
+SUPPORTED_OPTION_ID = ["147", "148", "149", "163", "164", "165", "166", "167", "168", "169", "170", "171", "172", "173", "174", "178", "179", "180", "181", "182", "183", "184", "185", "186", "187", "188", "189", "190", "191", "192", "193", "194", "195", "196", "197", "198", "199", "200", "201", "202", "203", "204", "205", "206", "207", "214", "215", "216", "217", "218", "219", "222", "223"]
+
+
+@dhcp_server_ipv4_option.command(name="add")
+@click.argument("option_name", required=True)
+@click.argument("option_id", required=True)
+@click.argument("type_", required=True)
+@click.argument("value", required=True)
+@clicommon.pass_db
+def dhcp_server_ipv4_option_add(db, option_name, option_id, type_, value):
+    ctx = click.get_current_context()
+    if option_id not in SUPPORTED_OPTION_ID:
+        ctx.fail("Option id {} is not supported".format(option_id))
+    if type_ not in SUPPORTED_TYPE:
+        ctx.fail("Input type is not supported")
+    if not validate_str_type(type_, value):
+        ctx.fail("Value {} is not of type {}".format(value, type_))
+    dbconn = db.db
+    key = "DHCP_SERVER_IPV4_CUSTOMIZED_OPTIONS|" + option_name
+    if dbconn.exists("CONFIG_DB", key):
+        ctx.fail("Option {} already exist".format(option_name))
+    dbconn.hmset("CONFIG_DB", key, {
+        "option_id": option_id,
+        "type": type_,
+        "value": value,
+        })
+
+
+@dhcp_server_ipv4_option.command(name="del")
+@click.argument("option_name", required=True)
+@clicommon.pass_db
+def dhcp_server_ipv4_option_del(db, option_name):
+    ctx = click.get_current_context()
+    dbconn = db.db
+    option_key = "DHCP_SERVER_IPV4_CUSTOMIZED_OPTIONS|" + option_name
+    if not dbconn.exists("CONFIG_DB", option_key):
+        ctx.fail("Option {} does not exist, cannot delete".format(option_name))
+    for key in dbconn.keys("CONFIG_DB", "DHCP_SERVER_IPV4|*"):
+        existing_options = dbconn.get("CONFIG_DB", key, "customized_options")
+        if existing_options and option_name in existing_options.split(","):
+            ctx.fail("Option {} is referenced in {}, cannot delete".format(option_name, key[len("DHCP_SERVER_IPV4|"):]))
+    dbconn.delete("CONFIG_DB", option_key)
+
+
+@dhcp_server_ipv4_option.command(name="bind")
+@click.argument("dhcp_interface", required=True)
+@click.argument("option_list", required=True)
+@clicommon.pass_db
+def dhcp_server_ipv4_option_bind(db, dhcp_interface, option_list):
+    ctx = click.get_current_context()
+    dbconn = db.db
+    key = "DHCP_SERVER_IPV4|" + dhcp_interface
+    if not dbconn.exists("CONFIG_DB", key):
+        ctx.fail("Interface {} is not valid dhcp interface".format(dhcp_interface))
+    option_list = option_list.split(",")
+    for option_name in option_list:
+        option_key = "DHCP_SERVER_IPV4_CUSTOMIZED_OPTIONS|" + option_name
+        if not dbconn.exists("CONFIG_DB", option_key):
+            ctx.fail("Option {} does not exist, cannot bind".format(option_name))
+    existing_value = dbconn.get("CONFIG_DB", key, "customized_options")
+    value_set = set(existing_value.split(",")) if existing_value else set()
+    new_value_set = value_set.union(option_list)
+    dbconn.set("CONFIG_DB", key, "customized_options", ",".join(new_value_set))
+
+
+@dhcp_server_ipv4_option.command(name="unbind")
+@click.argument("dhcp_interface", required=True)
+@click.argument("option_list", required=False)
+@click.option("--all", "all_", required=False, default=False, is_flag=True)
+@clicommon.pass_db
+def dhcp_server_ipv4_option_unbind(db, dhcp_interface, option_list, all_):
+    ctx = click.get_current_context()
+    dbconn = db.db
+    key = "DHCP_SERVER_IPV4|" + dhcp_interface
+    if not dbconn.exists("CONFIG_DB", key):
+        ctx.fail("Interface {} is not valid dhcp interface".format(dhcp_interface))
+    if all_:
+        dbconn.set("CONFIG_DB", key, "customized_options", "")
+    else:
+        unbind_value = set(option_list.split(","))
+        existing_value = dbconn.get("CONFIG_DB", key, "customized_options")
+        value_set = set(existing_value.split(",")) if existing_value else set()
+        if value_set.issuperset(unbind_value):
+            new_value_set = value_set.difference(unbind_value)
+            dbconn.set("CONFIG_DB", key, "customized_options", ",".join(new_value_set))
+        else:
+            ctx.fail("Attempting to unbind option that is not binded")
+
+
+def register(cli):
+    cli.add_command(dhcp_server)
+
+
 if __name__ == '__main__':
     dhcp_server()
diff --git a/dockers/docker-dhcp-server/cli/show/plugins/show_dhcp_server.py b/dockers/docker-dhcp-server/cli/show/plugins/show_dhcp_server.py
index 50b6586ca..eb5e276c3 100644
--- a/dockers/docker-dhcp-server/cli/show/plugins/show_dhcp_server.py
+++ b/dockers/docker-dhcp-server/cli/show/plugins/show_dhcp_server.py
@@ -13,7 +13,7 @@ def ts_to_str(ts):
     return datetime.fromtimestamp(int(ts)).strftime("%Y-%m-%d %H:%M:%S")
 
 
-@click.group(cls=clicommon.AliasedGroup)
+@click.group(cls=clicommon.AbbreviationGroup, name="dhcp_server")
 @clicommon.pass_db
 def dhcp_server(db):
     """Show dhcp_server related info"""

From 8a7e38b3a30784b6a5957acd2aa7d65119243369 Mon Sep 17 00:00:00 2001
From: Lahav-Nvidia <158030815+lfridlander@users.noreply.github.com>
Date: Thu, 22 Feb 2024 11:35:10 +0200
Subject: [PATCH 0265/1115] [Mellanox] Add N/A as a valid fan direction for
 Nvidia platforms (#17930)

- Why I did it
On some Nvidia platforms, fan direction could not be determined. Therefore 'N/A' becomes a valid value for those cases.

- How I did it
Add 'N/A' to the valid fan direction mapping, to avoid an error in the log.

- How to verify it
Check fan direction on Nvidia platforms, and make sure there aren't errors in the log.
---
 platform/mellanox/mlnx-platform-api/sonic_platform/fan.py | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/fan.py b/platform/mellanox/mlnx-platform-api/sonic_platform/fan.py
index 40dadb0f4..fba246361 100644
--- a/platform/mellanox/mlnx-platform-api/sonic_platform/fan.py
+++ b/platform/mellanox/mlnx-platform-api/sonic_platform/fan.py
@@ -46,9 +46,11 @@
 FAN_DIR = "/var/run/hw-management/thermal/fan{}_dir"
 FAN_DIR_VALUE_EXHAUST = 0
 FAN_DIR_VALUE_INTAKE = 1
+FAN_DIR_VALUE_NOT_APPLICABLE = 2
 FAN_DIR_MAPPING = {
     FAN_DIR_VALUE_EXHAUST: FanBase.FAN_DIRECTION_EXHAUST,
     FAN_DIR_VALUE_INTAKE: FanBase.FAN_DIRECTION_INTAKE,
+    FAN_DIR_VALUE_NOT_APPLICABLE: FanBase.FAN_DIRECTION_NOT_APPLICABLE,
 }
 
 class MlnxFan(FanBase):
@@ -170,7 +172,7 @@ def get_direction(self):
         Retrieves the fan's direction
 
         Returns:
-            A string, either FAN_DIRECTION_INTAKE or FAN_DIRECTION_EXHAUST
+            A string, either FAN_DIRECTION_INTAKE or FAN_DIRECTION_EXHAUST or FAN_DIRECTION_NOT_APPLICABLE
             depending on fan direction
 
         Notes:
@@ -181,6 +183,7 @@ def get_direction(self):
             Air flow from QSFP side to fans side, for example: MSN2700-CS2R
             which means exhaust in community
             According to hw-mgmt:
+                2 stands for N/A, in case fan direction could not be determined
                 1 stands for forward, in other words intake
                 0 stands for reverse, in other words exhaust
         """
@@ -275,7 +278,7 @@ def get_direction(self):
         Retrieves the fan's direction
 
         Returns:
-            A string, either FAN_DIRECTION_INTAKE or FAN_DIRECTION_EXHAUST
+            A string, either FAN_DIRECTION_INTAKE or FAN_DIRECTION_EXHAUST or FAN_DIRECTION_NOT_APPLICABLE
             depending on fan direction
 
         Notes:
@@ -286,6 +289,7 @@ def get_direction(self):
             Air flow from QSFP side to fans side, for example: MSN2700-CS2R
             which means exhaust in community
             According to hw-mgmt:
+                2 stands for N/A, in case fan direction could not be determined
                 1 stands for forward, in other words intake
                 0 stands for reverse, in other words exhaust
         """

From cf9929546d5ec557010af8ebfbdf716553f796d7 Mon Sep 17 00:00:00 2001
From: Oleksandr Ivantsiv <oivantsiv@nvidia.com>
Date: Thu, 22 Feb 2024 08:04:52 -0800
Subject: [PATCH 0266/1115] [build] Use configured architecture in the GRUB
 config. (#18093)

- Why I did it
The existing grub configuration has a hardcoded "amd64" architecture in the kernel and initramfs names. This causes an error in the attempt to load the image compiled for a different architecture.

- How I did it
Use configured architecture in the GRUB config.

- How to verify it
Compile the image for Arm64 architecture and install it on the device.
---
 installer/default_platform.conf | 4 ++--
 installer/install.sh            | 2 ++
 onie-mk-demo.sh                 | 1 +
 3 files changed, 5 insertions(+), 2 deletions(-)

diff --git a/installer/default_platform.conf b/installer/default_platform.conf
index 319b7009f..85882f001 100755
--- a/installer/default_platform.conf
+++ b/installer/default_platform.conf
@@ -588,13 +588,13 @@ menuentry '$demo_grub_entry' {
         if [ x$grub_platform = xxen ]; then insmod xzio; insmod lzopio; fi
         insmod part_msdos
         insmod ext2
-        $GRUB_CFG_LINUX_CMD   /$image_dir/boot/vmlinuz-6.1.0-11-2-amd64 root=$grub_cfg_root rw $GRUB_CMDLINE_LINUX  \
+        $GRUB_CFG_LINUX_CMD   /$image_dir/boot/vmlinuz-6.1.0-11-2-${arch} root=$grub_cfg_root rw $GRUB_CMDLINE_LINUX  \
                 net.ifnames=0 biosdevname=0 \
                 loop=$image_dir/$FILESYSTEM_SQUASHFS loopfstype=squashfs                       \
                 systemd.unified_cgroup_hierarchy=0 \
                 apparmor=1 security=apparmor varlog_size=$VAR_LOG_SIZE usbcore.autosuspend=-1 $ONIE_PLATFORM_EXTRA_CMDLINE_LINUX
         echo    'Loading $demo_volume_label $demo_type initial ramdisk ...'
-        $GRUB_CFG_INITRD_CMD  /$image_dir/boot/initrd.img-6.1.0-11-2-amd64
+        $GRUB_CFG_INITRD_CMD  /$image_dir/boot/initrd.img-6.1.0-11-2-${arch}
 }
 EOF
 
diff --git a/installer/install.sh b/installer/install.sh
index 0b03cf98f..557358fd5 100755
--- a/installer/install.sh
+++ b/installer/install.sh
@@ -141,6 +141,8 @@ if [ "$install_env" = "onie" ]; then
     onie_initrd_tmp=/
 fi
 
+arch="%%ARCH%%"
+
 # The build system prepares this script by replacing %%DEMO-TYPE%%
 # with "OS" or "DIAG".
 demo_type="%%DEMO_TYPE%%"
diff --git a/onie-mk-demo.sh b/onie-mk-demo.sh
index b466441ca..c197731fa 100755
--- a/onie-mk-demo.sh
+++ b/onie-mk-demo.sh
@@ -97,6 +97,7 @@ output_raw_image=$(eval echo $output_raw_image)
 
 # Tailor the demo installer for OS mode or DIAG mode
 sed -i -e "s/%%DEMO_TYPE%%/$demo_type/g" \
+       -e "s/%%ARCH%%/$arch/g" \
        -e "s/%%IMAGE_VERSION%%/$image_version/g" \
        -e "s/%%ONIE_IMAGE_PART_SIZE%%/$onie_image_part_size/" \
        -e "s/%%EXTRA_CMDLINE_LINUX%%/$EXTRA_CMDLINE_LINUX/" \

From 41aa3295b96efc4639caa36d840e6ccc2c9ecb7a Mon Sep 17 00:00:00 2001
From: zitingguo-ms <zitingguo@microsoft.com>
Date: Fri, 23 Feb 2024 00:56:03 +0800
Subject: [PATCH 0267/1115] upgrade xgs SAI version to 10.1.7.0 (#18156)

Signed-off-by: zitingguo-ms <zitingguo@microsoft.com>
---
 platform/broadcom/sai.mk | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/platform/broadcom/sai.mk b/platform/broadcom/sai.mk
index fab50fb57..44022326e 100644
--- a/platform/broadcom/sai.mk
+++ b/platform/broadcom/sai.mk
@@ -1,4 +1,4 @@
-LIBSAIBCM_XGS_VERSION = 10.1.6.0
+LIBSAIBCM_XGS_VERSION = 10.1.7.0
 LIBSAIBCM_DNX_VERSION = 9.2.12.1
 LIBSAIBCM_XGS_BRANCH_NAME = SAI_10.1.0_GA
 LIBSAIBCM_DNX_BRANCH_NAME = SAI_9.2.0.3

From 54c1a4963414d0f70371d8d2547ac662e95f4f4f Mon Sep 17 00:00:00 2001
From: Mridul Bajpai <30709399+bmridul@users.noreply.github.com>
Date: Fri, 23 Feb 2024 22:25:48 -0800
Subject: [PATCH 0268/1115] Sensormond support (#16089)

Enable Sensormon daemon in PMON container.
Pls see HLD : sonic-net/SONiC#1394
---
 .../docker-pmon.supervisord.conf.j2                 | 13 +++++++++++++
 rules/docker-platform-monitor.mk                    |  1 +
 rules/sonic-sensormond.dep                          | 10 ++++++++++
 rules/sonic-sensormond.mk                           | 10 ++++++++++
 4 files changed, 34 insertions(+)
 create mode 100644 rules/sonic-sensormond.dep
 create mode 100644 rules/sonic-sensormond.mk

diff --git a/dockers/docker-platform-monitor/docker-pmon.supervisord.conf.j2 b/dockers/docker-platform-monitor/docker-pmon.supervisord.conf.j2
index 899160dd3..3cb5f0509 100644
--- a/dockers/docker-platform-monitor/docker-pmon.supervisord.conf.j2
+++ b/dockers/docker-platform-monitor/docker-pmon.supervisord.conf.j2
@@ -183,3 +183,16 @@ startsecs=10
 dependent_startup=true
 dependent_startup_wait_for=rsyslogd:running
 {% endif %}
+
+{% if include_sensormond %}
+[program:sensormond]
+command=/usr/local/bin/sensormond
+priority=10
+autostart=false
+autorestart=unexpected
+stdout_logfile=syslog
+stderr_logfile=syslog
+startsecs=10
+dependent_startup=true
+dependent_startup_wait_for=rsyslogd:running
+{% endif %}
diff --git a/rules/docker-platform-monitor.mk b/rules/docker-platform-monitor.mk
index 559234168..a225ec99b 100644
--- a/rules/docker-platform-monitor.mk
+++ b/rules/docker-platform-monitor.mk
@@ -18,6 +18,7 @@ $(DOCKER_PLATFORM_MONITOR)_PYTHON_WHEELS += $(SONIC_PCIED_PY3)
 $(DOCKER_PLATFORM_MONITOR)_PYTHON_WHEELS += $(SONIC_PSUD_PY3)
 $(DOCKER_PLATFORM_MONITOR)_PYTHON_WHEELS += $(SONIC_SYSEEPROMD_PY3)
 $(DOCKER_PLATFORM_MONITOR)_PYTHON_WHEELS += $(SONIC_THERMALCTLD_PY3)
+$(DOCKER_PLATFORM_MONITOR)_PYTHON_WHEELS += $(SONIC_SENSORMOND_PY3)
 $(DOCKER_PLATFORM_MONITOR)_PYTHON_WHEELS += $(SONIC_XCVRD_PY3)
 $(DOCKER_PLATFORM_MONITOR)_PYTHON_WHEELS += $(SONIC_YCABLED_PY3)
 $(DOCKER_PLATFORM_MONITOR)_PYTHON_WHEELS += $(SONIC_CHASSISD_PY3)
diff --git a/rules/sonic-sensormond.dep b/rules/sonic-sensormond.dep
new file mode 100644
index 000000000..6346c803b
--- /dev/null
+++ b/rules/sonic-sensormond.dep
@@ -0,0 +1,10 @@
+SPATH       := $($(SONIC_SENSORMOND_PY3)_SRC_PATH)
+DEP_FILES   := $(SONIC_COMMON_FILES_LIST) rules/sonic-sensormond.mk rules/sonic-sensormond.dep
+DEP_FILES   += $(SONIC_COMMON_BASE_FILES_LIST)
+SMDEP_FILES := $(addprefix $(SPATH)/,$(shell cd $(SPATH) && git ls-files))
+
+$(SONIC_SENSORMOND_PY3)_CACHE_MODE  := GIT_CONTENT_SHA
+$(SONIC_SENSORMOND_PY3)_DEP_FLAGS   := $(SONIC_COMMON_FLAGS_LIST)
+$(SONIC_SENSORMOND_PY3)_DEP_FILES   := $(DEP_FILES)
+$(SONIC_SENSORMOND_PY3)_SMDEP_FILES := $(SMDEP_FILES)
+$(SONIC_SENSORMOND_PY3)_SMDEP_PATHS := $(SPATH)
diff --git a/rules/sonic-sensormond.mk b/rules/sonic-sensormond.mk
new file mode 100644
index 000000000..0daccdb25
--- /dev/null
+++ b/rules/sonic-sensormond.mk
@@ -0,0 +1,10 @@
+# sonic-sensormond (SONiC Thermal control daemon) Debian package
+
+# SONIC_SENSORMOND_PY3 package
+
+SONIC_SENSORMOND_PY3 = sonic_sensormond-1.0-py3-none-any.whl
+$(SONIC_SENSORMOND_PY3)_SRC_PATH = $(SRC_PATH)/sonic-platform-daemons/sonic-sensormond
+$(SONIC_SENSORMOND_PY3)_DEPENDS = $(SONIC_PY_COMMON_PY3) $(SONIC_PLATFORM_COMMON_PY3)
+$(SONIC_SENSORMOND_PY3)_DEBS_DEPENDS = $(LIBSWSSCOMMON) $(PYTHON3_SWSSCOMMON)
+$(SONIC_SENSORMOND_PY3)_PYTHON_VERSION = 3
+SONIC_PYTHON_WHEELS += $(SONIC_SENSORMOND_PY3)

From c172b19c062e34ad7c8cc5328d2917b42dcf3bc9 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Mon, 26 Feb 2024 19:50:33 +0800
Subject: [PATCH 0269/1115] [submodule] Update submodule sonic-swss to the
 latest HEAD automatically (#18175)

#### Why I did it
src/sonic-swss
```
* 91321737 - (HEAD -> master, origin/master, origin/HEAD) Fixed orchagent crash in VM with the Qos BUFFER_QUEUE|system-port|Queue-id-range config (#3050) (2 days ago) [saksarav-nokia]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-swss | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-swss b/src/sonic-swss
index 1221eae41..913217377 160000
--- a/src/sonic-swss
+++ b/src/sonic-swss
@@ -1 +1 @@
-Subproject commit 1221eae41788176b5de0db3e869006ff22d2d4ff
+Subproject commit 913217377260353c9b08f1d2a0dadc51c4399a2a

From 2a34756370282e198ea9a848e34ee6d9e28b25a4 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Mon, 26 Feb 2024 19:50:39 +0800
Subject: [PATCH 0270/1115] [submodule] Update submodule sonic-platform-daemons
 to the latest HEAD automatically (#18174)

#### Why I did it
src/sonic-platform-daemons
```
* 9141305 - (HEAD -> master, origin/master, origin/HEAD) Enhance port_update_event logic to be thread-safe (#430) (3 days ago) [longhuan-cisco]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-platform-daemons | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-platform-daemons b/src/sonic-platform-daemons
index f1511c2a5..9141305c6 160000
--- a/src/sonic-platform-daemons
+++ b/src/sonic-platform-daemons
@@ -1 +1 @@
-Subproject commit f1511c2a5a2712d12a755c02a0db3b01c3109682
+Subproject commit 9141305c636c93aa9b0d79549395ba4e9df66595

From 4034abedc629fa694c8d04ff1b6e265b51d592c3 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Mon, 26 Feb 2024 19:50:59 +0800
Subject: [PATCH 0271/1115] [submodule] Update submodule
 wpasupplicant/sonic-wpa-supplicant to the latest HEAD automatically (#18168)

#### Why I did it
src/wpasupplicant/sonic-wpa-supplicant
```
* d41110905 - (HEAD -> master, origin/master, origin/HEAD) Merge pull request #80 from wumiaont/master (4 days ago) [Kamil Cudnik]
* 7406f4ba4 - Fix compile issues with debian bookworm (10 days ago) [wumiaont]
* caed4ef71 - Fix compile issues with bookworm and openssl 3.0 (10 days ago) [wumiaont]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/wpasupplicant/sonic-wpa-supplicant | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/wpasupplicant/sonic-wpa-supplicant b/src/wpasupplicant/sonic-wpa-supplicant
index d1ca633d1..d41110905 160000
--- a/src/wpasupplicant/sonic-wpa-supplicant
+++ b/src/wpasupplicant/sonic-wpa-supplicant
@@ -1 +1 @@
-Subproject commit d1ca633d125ba34d2a7c5e042e2f1c9003e176e6
+Subproject commit d41110905e10201e938058505cf33a170b68522d

From caee2b8bf7ffe4c71520c2b1eeea297a4568350b Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Mon, 26 Feb 2024 19:51:04 +0800
Subject: [PATCH 0272/1115] [submodule] Update submodule sonic-swss-common to
 the latest HEAD automatically (#18167)

#### Why I did it
src/sonic-swss-common
```
* 9330086 - (HEAD -> master, origin/master, origin/HEAD) [dbconnector]: Add API getDbKeys in dbconnector (#854) (4 days ago) [Ze Gan]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-swss-common | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-swss-common b/src/sonic-swss-common
index 3c3ae5710..933008642 160000
--- a/src/sonic-swss-common
+++ b/src/sonic-swss-common
@@ -1 +1 @@
-Subproject commit 3c3ae571051e7bc308e2ec41928c936af1feb2f8
+Subproject commit 93300864273d571886eb1eb4c60b13245c68442f

From 4783a6cafc5df26163e997cdf72c83f99d409807 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Mon, 26 Feb 2024 19:51:10 +0800
Subject: [PATCH 0273/1115] [submodule] Update submodule sonic-utilities to the
 latest HEAD automatically (#18139)

#### Why I did it
src/sonic-utilities
```
* 7670609a - (HEAD -> master, origin/master, origin/HEAD) Fix sfputil CLI failure for multi-asic platforms (#3168) (2 days ago) [longhuan-cisco]
* 6e4130d8 - [config] Check golden config exist early if flag is set (#3169) (3 days ago) [jingwenxie]
* 1c094d30 - [show] Update show run all to cover all asic config in multiasic (#3148) (5 days ago) [jingwenxie]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-utilities | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-utilities b/src/sonic-utilities
index 81c5349f7..7670609a4 160000
--- a/src/sonic-utilities
+++ b/src/sonic-utilities
@@ -1 +1 @@
-Subproject commit 81c5349f7dca6e43dc8e9254f15b24125ccf4090
+Subproject commit 7670609a47e1419e5f3154866304f7578a02cd96

From 6224d672ba1ff82dbba681fe665fa0d12c58f875 Mon Sep 17 00:00:00 2001
From: jingwenxie <jingwenxie@microsoft.com>
Date: Tue, 27 Feb 2024 09:34:32 +0800
Subject: [PATCH 0274/1115] [yang] Restrict AAA authorization with TACPLUS
 passkey (#18155)

### Why I did it
Command cannot be executed when tacacs+ in AAA authorization is set and passkey in TACPLUs is not set. There should be such restriction in YANG model definition.
##### Work item tracking
- Microsoft ADO **(number only)**: 26898399

#### How I did it
Add restirction
#### How to verify it
unit test
---
 .../tests/yang_model_tests/tests/aaa.json     |  4 ++++
 .../yang_model_tests/tests_config/aaa.json    | 19 +++++++++++++++++++
 .../yang-models/sonic-system-aaa.yang         |  8 ++++++++
 3 files changed, 31 insertions(+)

diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/aaa.json b/src/sonic-yang-models/tests/yang_model_tests/tests/aaa.json
index 972b404b8..e1cf51385 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests/aaa.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests/aaa.json
@@ -18,6 +18,10 @@
     "AAA_AUTHORIZATION_TEST": {
         "desc": "Configure an authorization type in AAA table."
     },
+    "AAA_AUTHORIZATION_TEST_TACACS_WITHOUT_TACPLUS": {
+        "desc": "Configure tacacs in authorization type in AAA table without TACPLUS table.",
+        "eStr": ["Authorization with 'tacacs+' is not allowed when passkey not exists."]
+    },
     "AAA_ACCOUNTING_TEST": {
         "desc": "Configure an accounting type in AAA table."
     }
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/aaa.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/aaa.json
index fbf63f994..0be9b4b1f 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/aaa.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/aaa.json
@@ -46,6 +46,25 @@
     },
 
     "AAA_AUTHORIZATION_TEST": {
+        "sonic-system-aaa:sonic-system-aaa": {
+            "sonic-system-aaa:AAA": {
+                "AAA_LIST": [{
+                        "type": "authorization",
+                        "login": "tacacs+"
+                }]
+            }
+        },
+        "sonic-system-tacacs:sonic-system-tacacs": {
+            "sonic-system-tacacs:TACPLUS": {
+                "global": {
+                        "timeout": 5,
+                        "passkey": "aabb"
+                }
+            }
+        }
+    },
+
+    "AAA_AUTHORIZATION_TEST_TACACS_WITHOUT_TACPLUS": {
         "sonic-system-aaa:sonic-system-aaa": {
             "sonic-system-aaa:AAA": {
                 "AAA_LIST": [{
diff --git a/src/sonic-yang-models/yang-models/sonic-system-aaa.yang b/src/sonic-yang-models/yang-models/sonic-system-aaa.yang
index 08d5f6f94..1b1a8c493 100644
--- a/src/sonic-yang-models/yang-models/sonic-system-aaa.yang
+++ b/src/sonic-yang-models/yang-models/sonic-system-aaa.yang
@@ -7,6 +7,10 @@ module sonic-system-aaa {
         prefix stypes;
     }
 
+    import sonic-system-tacacs{
+        prefix tacacs;
+    }
+
     revision 2021-10-12 {
         description "Add AAA authorization/accounting support.";
     }
@@ -39,6 +43,10 @@ module sonic-system-aaa {
                     default "local";
                 }
 
+                must 'not(./type = "authorization" and contains(./login, "tacacs+") and not(/tacacs:sonic-system-tacacs/tacacs:TACPLUS/tacacs:global/tacacs:passkey))' {
+                    error-message "Authorization with 'tacacs+' is not allowed when passkey not exists.";
+                }
+
                 leaf failthrough {
                     type stypes:boolean_type;
                     description "When set to true, authentication is attempted on next configured server/local in the list upon failure.";

From 4753953ed01e65d1cb519f83e5cc4f1177b16ac4 Mon Sep 17 00:00:00 2001
From: rajib-dutta1 <105753715+rajib-dutta1@users.noreply.github.com>
Date: Mon, 26 Feb 2024 17:49:06 -0800
Subject: [PATCH 0275/1115] Ipmitool bookworm: Fix and patch enterprise-numbers
 URL (#17878)

### Why I did it

ipmitool utility is used to access various HW sensors. Some platforms use "ipmitool raw " to read specific addresses.

ipmitool_1.8.19-4_amd64.deb, that is part of bookworm has a defect. The package is missing file enterprise.txt that is expected by the "raw read" code path.
It is so because the file the .deb tries to download at the build time does not have the necessary extension as it is available on remote server: https://www.iana.org/assignments/enterprise-numbers.txt

### How I did it

The defect had been fixed using coding changes in next unstable version of Linux. It is expected to be available in future stable version of the OS. Hence to keep the changes to minimal, the .dsc file is downloaded and only the Makefile is modified to download the correct file. To make is work as patch necessary changes are made.

#### How to verify it
Build log is attached and installation of the file is noted line #2274
When using vanilla bookworm on platforms like 5212 or 5224:
-------------------------------------------------------------------
root@sonic:~# ipmitool raw 0x04 0x2d 0x31
IANA PEN registry open failed: No such file or directory
00 c0 01 80

When fixed we should not see the above error:
--------------------------------------------------
root@sonic:/home/admin# ipmitool raw 0x04 0x2d 0x31
 00 c0 00 80

### Description for the changelog

This change is to address ipmitool raw read issue. This patch must be removed once it is available in next stable Linux release that contains the fix.

https://github.com/ipmitool/ipmitool/commit/1edb0e27e44196d1ebe449aba0b9be22d376bcb6
---
 build_debian.sh                               |   1 -
 .../build_templates/sonic_debian_extension.j2 |   4 +
 rules/ipmitool.dep                            |  11 ++
 rules/ipmitool.mk                             |  17 +++
 slave.mk                                      |   1 +
 src/ipmitool/Makefile                         |  28 +++++
 ...ges-needed-to-install-enterprise.txt.patch | 113 ++++++++++++++++++
 src/ipmitool/patch/series                     |   1 +
 8 files changed, 175 insertions(+), 1 deletion(-)
 create mode 100644 rules/ipmitool.dep
 create mode 100644 rules/ipmitool.mk
 create mode 100644 src/ipmitool/Makefile
 create mode 100644 src/ipmitool/patch/0001-Changes-needed-to-install-enterprise.txt.patch
 create mode 100644 src/ipmitool/patch/series

diff --git a/build_debian.sh b/build_debian.sh
index c507275d1..65966f4a9 100755
--- a/build_debian.sh
+++ b/build_debian.sh
@@ -377,7 +377,6 @@ sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y in
     mtr-tiny                \
     locales                 \
     cgroup-tools            \
-    ipmitool                \
     ndisc6                  \
     makedumpfile            \
     conntrack               \
diff --git a/files/build_templates/sonic_debian_extension.j2 b/files/build_templates/sonic_debian_extension.j2
index 3dc242cc7..e0bd1242d 100644
--- a/files/build_templates/sonic_debian_extension.j2
+++ b/files/build_templates/sonic_debian_extension.j2
@@ -101,6 +101,10 @@ sudo mkdir -p $FILESYSTEM_ROOT_USR_LIB_SYSTEMD_SYSTEM
 sudo dpkg --root=$FILESYSTEM_ROOT -i $debs_path/ifupdown2_*.deb || \
     sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install -f
 
+# Install a patched version of ipmitool  (and its dependencies via 'apt-get -y install -f')
+sudo dpkg --root=$FILESYSTEM_ROOT -i $debs_path/ipmitool_*.deb || \
+    sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install -f
+
 # Install a patched version of ntp  (and its dependencies via 'apt-get -y install -f')
 sudo dpkg --root=$FILESYSTEM_ROOT --force-confdef --force-confold -i $debs_path/ntp_*.deb || \
     sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y \
diff --git a/rules/ipmitool.dep b/rules/ipmitool.dep
new file mode 100644
index 000000000..7643d2477
--- /dev/null
+++ b/rules/ipmitool.dep
@@ -0,0 +1,11 @@
+
+SPATH       := $($(IPMITOOL)_SRC_PATH)
+DEP_FILES   := $(SONIC_COMMON_FILES_LIST) rules/ipmitool.mk rules/ipmitool.dep   
+DEP_FILES   += $(SONIC_COMMON_BASE_FILES_LIST)
+DEP_FILES   += $(shell git ls-files $(SPATH))
+
+$(IPMITOOL)_CACHE_MODE  := GIT_CONTENT_SHA 
+$(IPMITOOL)_DEP_FLAGS   := $(SONIC_COMMON_FLAGS_LIST)
+$(IPMITOOL)_DEP_FILES   := $(DEP_FILES)
+
+
diff --git a/rules/ipmitool.mk b/rules/ipmitool.mk
new file mode 100644
index 000000000..aad6fea3a
--- /dev/null
+++ b/rules/ipmitool.mk
@@ -0,0 +1,17 @@
+# ipmitool packages
+IPMITOOL_VERSION = 1.8.19
+IPMITOOL_VERSION_SUFFIX = 4
+IPMITOOL_VERSION_FULL = $(IPMITOOL_VERSION)-$(IPMITOOL_VERSION_SUFFIX)
+IPMITOOL = ipmitool_$(IPMITOOL_VERSION_FULL)_$(CONFIGURED_ARCH).deb
+$(IPMITOOL)_SRC_PATH = $(SRC_PATH)/ipmitool
+SONIC_MAKE_DEBS += $(IPMITOOL)
+IPMITOOL_DBG = ipmitool-dbgsym_$(IPMITOOL_VERSION_FULL)_$(CONFIGURED_ARCH).deb
+$(eval $(call add_derived_package,$(IPMITOOL),$(IPMITOOL_DBG)))
+DBG_SRC_ARCHIVE += ipmitool 
+# The .c, .cpp, .h & .hpp files under src/{$DBG_SRC_ARCHIVE list}
+# are archived into debug one image to facilitate debugging.
+# Export these variables so they can be used in a sub-make
+export IPMITOOL_VERSION
+export IPMITOOL_VERSION_FULL 
+export IPMITOOL
+export IPMITOOL_DBG
diff --git a/slave.mk b/slave.mk
index 8473b2b3e..32e88c2b6 100644
--- a/slave.mk
+++ b/slave.mk
@@ -1356,6 +1356,7 @@ $(addprefix $(TARGET_PATH)/, $(SONIC_INSTALLERS)) : $(TARGET_PATH)/% : \
                 $(LINUX_KERNEL) \
                 $(SONIC_DEVICE_DATA) \
                 $(IFUPDOWN2) \
+                $(IPMITOOL) \
                 $(KDUMP_TOOLS) \
                 $(LIBPAM_RADIUS) \
                 $(LIBNSS_RADIUS) \
diff --git a/src/ipmitool/Makefile b/src/ipmitool/Makefile
new file mode 100644
index 000000000..dc8b9c05c
--- /dev/null
+++ b/src/ipmitool/Makefile
@@ -0,0 +1,28 @@
+.ONESHELL:
+SHELL = /bin/bash
+.SHELLFLAGS += -e
+
+MAIN_TARGET = $(IPMITOOL)
+DERIVED_TARGETS = $(IPMITOOL_DBG)
+
+$(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% :
+	# Remove any stale files
+	rm -rf ./ipmitool-$(IPMITOOL_VERSION) ./ipmitool*.{deb,udeb,dsc,gz,xz}
+	# Obtain ipmitool
+	dget https://deb.debian.org/debian/pool/main/i/ipmitool/ipmitool_$(IPMITOOL_VERSION_FULL).dsc
+	# Build source and Debian packages
+	pushd ipmitool-$(IPMITOOL_VERSION)
+
+	git init
+	git add -f *
+	git commit -m "unmodified ipmitool source"
+
+	# Apply patches
+	stg init
+	stg import -s ../patch/series
+	dpkg-buildpackage -rfakeroot -d -b -us -uc -j$(SONIC_CONFIG_MAKE_JOBS) --admindir $(SONIC_DPKG_ADMINDIR)
+	popd
+	mv $* $(DERIVED_TARGETS) $(DEST)/
+
+$(addprefix $(DEST)/, $(DERIVED_TARGETS)): $(DEST)/% : $(DEST)/$(MAIN_TARGET)
+
diff --git a/src/ipmitool/patch/0001-Changes-needed-to-install-enterprise.txt.patch b/src/ipmitool/patch/0001-Changes-needed-to-install-enterprise.txt.patch
new file mode 100644
index 000000000..dcaab247a
--- /dev/null
+++ b/src/ipmitool/patch/0001-Changes-needed-to-install-enterprise.txt.patch
@@ -0,0 +1,113 @@
+From 719292c4800054ead278affc2972d8f77babd227 Mon Sep 17 00:00:00 2001
+From: rajib-dutta1 <rajib.dutta@dell.com>
+Date: Wed, 10 Jan 2024 20:51:03 -0800
+Subject: [PATCH] Changes needed to install enterprise.txt
+
+---
+ Makefile.am  | 40 ++++++++++++++++++++--------------------
+ configure.ac | 30 +++++++++++++++---------------
+ 2 files changed, 35 insertions(+), 35 deletions(-)
+
+diff --git a/Makefile.am b/Makefile.am
+index 355d3f0..ec9605c 100644
+--- a/Makefile.am
++++ b/Makefile.am
+@@ -49,25 +49,25 @@ dist-hook:
+ .PHONY: install-pen-database uninstall-pen-database
+ .INTERMEDIATE: %.o %.la enterprise-numbers
+ 
+-#if DOWNLOAD
+-
+-#enterprise-numbers:
+-#	@echo Downloading IANA PEN database...
+-#	@$(DOWNLOAD) "$(IANA_PEN)" > tmpfile.$$PPID || {\
+-#		echo "FAILED to download the IANA PEN database"; \
+-#		rm tmpfile.$$PPID; \
+-#		false; \
+-#	}
+-#	@mv tmpfile.$$PPID $@
+-#
+-#install-pen-database: enterprise-numbers
+-#	mkdir -m 755 -p $(DESTDIR)$(IANADIR)
+-#	$(INSTALL_DATA) $< $(DESTDIR)$(IANADIR)/
+-#
+-#uninstall-pen-database:
+-#	-rm -rf $(DESTDIR)$(IANADIR)/enterprise-numbers
+-#
+-#else
++if DOWNLOAD
++
++enterprise-numbers.txt:
++	@echo Downloading IANA PEN database...
++	@$(DOWNLOAD) "$(IANA_PEN)" > tmpfile.$$PPID || {\
++		echo "FAILED to download the IANA PEN database"; \
++		rm tmpfile.$$PPID; \
++		false; \
++	}
++	@mv tmpfile.$$PPID $@
++
++install-pen-database: enterprise-numbers.txt
++	mkdir -m 755 -p $(DESTDIR)$(IANADIR)
++	$(INSTALL_DATA) $< $(DESTDIR)$(IANADIR)/
++
++uninstall-pen-database:
++	-rm -rf $(DESTDIR)$(IANADIR)/enterprise-numbers.txt
++
++else
+ 
+ install-pen-database:
+ 	@echo "*** NOT installing the IANA PEN database."
+@@ -77,7 +77,7 @@ uninstall-pen-database:
+ 	@echo "*** NOT uninstalling the IANA PEN database."
+ 	@echo "*** It was installed manually (if ever)."
+ 
+-#endif
++endif
+ 
+ install-data-local: install-pen-database
+ 	mkdir -p $(DESTDIR)$(DOCDIR)
+diff --git a/configure.ac b/configure.ac
+index b4321c6..d6ba62b 100644
+--- a/configure.ac
++++ b/configure.ac
+@@ -56,22 +56,22 @@ if test "x$exec_prefix" = "xNONE"; then
+ 	exec_prefix="$prefix"
+ fi
+ 
+-#if test "x$WGET" = "x"; then
+-#	if test "x$CURL" = "x"; then
+-#		AC_MSG_WARN([** Neither wget nor curl could be found.])
+-#		AC_MSG_WARN([** IANA PEN database will not be installed by `make install` !])
+-#	else
+-#		DOWNLOAD="$CURL --location --progress-bar"
+-#		AM_CONDITIONAL([DOWNLOAD], [true])
+-#	fi
+-#else
+-#	DOWNLOAD="$WGET -c -nd -O -"
+-#	AM_CONDITIONAL([DOWNLOAD], [true])
+-#fi
++if test "x$WGET" = "x"; then
++	if test "x$CURL" = "x"; then
++		AC_MSG_WARN([** Neither wget nor curl could be found.])
++		AC_MSG_WARN([** IANA PEN database will not be installed by `make install` !])
++	else
++		DOWNLOAD="$CURL --location --progress-bar"
++		AM_CONDITIONAL([DOWNLOAD], [true])
++	fi
++else
++	DOWNLOAD="$WGET -c -nd -O -"
++	AM_CONDITIONAL([DOWNLOAD], [true])
++fi
+ 
+-#AC_MSG_WARN([** Download is:])
+-#AC_MSG_WARN($DOWNLOAD)
+-#AC_SUBST(DOWNLOAD, $DOWNLOAD)
++AC_MSG_WARN([** Download is:])
++AC_MSG_WARN($DOWNLOAD)
++AC_SUBST(DOWNLOAD, $DOWNLOAD)
+ 
+ dnl
+ dnl set default option values
+-- 
+2.25.1
+
diff --git a/src/ipmitool/patch/series b/src/ipmitool/patch/series
new file mode 100644
index 000000000..df9c99f74
--- /dev/null
+++ b/src/ipmitool/patch/series
@@ -0,0 +1 @@
+0001-Changes-needed-to-install-enterprise.txt.patch

From 732f42e1a3c004f5539eeb2ed14143a577e02bbb Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Tue, 27 Feb 2024 19:01:12 +0800
Subject: [PATCH 0276/1115] [submodule] Update submodule sonic-sairedis to the
 latest HEAD automatically (#18186)

#### Why I did it
src/sonic-sairedis
```
* 09cd7f6 - (HEAD -> master, origin/master, origin/HEAD) Add new functionality to syncd_init_common.sh, to use common sai.profile (#1352) (17 hours ago) [noaOrMlnx]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-sairedis | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-sairedis b/src/sonic-sairedis
index a91d51d8f..09cd7f68d 160000
--- a/src/sonic-sairedis
+++ b/src/sonic-sairedis
@@ -1 +1 @@
-Subproject commit a91d51d8feefdd883c72bc11af79d12e95a7d105
+Subproject commit 09cd7f68d7c36f436653f46964718a25f8ee1dc1

From 1bf2f72a48068c491ca4adb4f8bdf2bbb5ddd7f1 Mon Sep 17 00:00:00 2001
From: Nikola Dancejic <26731235+Ndancejic@users.noreply.github.com>
Date: Tue, 27 Feb 2024 13:11:58 -0800
Subject: [PATCH 0277/1115] [ebtables] Add multicast drop rule to ebtables
 (#18064)

Adding rule to ebtables to drop multicast packets in kernel. This was
done to address a bug where NS packets were flooding ports with
duplicate packets.

Signed-off-by: Nikola Dancejic <ndancejic@microsoft.com>
---
 files/image_config/ebtables/ebtables.filter.cfg | 1 +
 1 file changed, 1 insertion(+)

diff --git a/files/image_config/ebtables/ebtables.filter.cfg b/files/image_config/ebtables/ebtables.filter.cfg
index 7a2dc5c8b..fae04a378 100644
--- a/files/image_config/ebtables/ebtables.filter.cfg
+++ b/files/image_config/ebtables/ebtables.filter.cfg
@@ -8,4 +8,5 @@
 -A FORWARD -d BGA -j DROP
 -A FORWARD -p ARP -j DROP
 -A FORWARD -p 802_1Q --vlan-encap ARP -j DROP
+-A FORWARD -d Multicast -j DROP
 

From b7ca5e6968a3474096625dcb014fa3898abb351d Mon Sep 17 00:00:00 2001
From: noaOrMlnx <58519608+noaOrMlnx@users.noreply.github.com>
Date: Tue, 27 Feb 2024 23:30:08 +0200
Subject: [PATCH 0278/1115] Update sonic-sairedis submodule pointer (#18181)

### Why I did it
Update sonic-sairedis submodule pointer to include the following:
Add new functionality to syncd_init_common.sh, to use common sai.profile (https://github.com/sonic-net/sonic-sairedis/pull/1352)

### How I did it
Advance sonic-sairedis pointer

From 5e23a6bc9389d18b5248a5f1c9506424ab37e2dd Mon Sep 17 00:00:00 2001
From: Liu Shilong <shilongliu@microsoft.com>
Date: Wed, 28 Feb 2024 09:45:49 +0800
Subject: [PATCH 0279/1115] [build] Use public storage for public resources.
 (#18038)

---
 dockers/docker-base-buster/Dockerfile.j2    | 6 +++---
 dockers/docker-base-stretch/Dockerfile.j2   | 6 +++---
 files/build/versions/default/versions-web   | 7 -------
 get_docker-base.sh                          | 2 +-
 platform/broadcom/rules.mk                  | 4 ++--
 platform/components/docker-gbsyncd-credo.mk | 4 ++--
 platform/nephos/rules.mk                    | 2 +-
 platform/vs/onie.mk                         | 6 +++---
 sonic-slave-stretch/Dockerfile.j2           | 8 ++++----
 src/ixgbe/Makefile                          | 2 +-
 src/socat/Makefile                          | 6 +++---
 src/swig/Makefile                           | 6 +++---
 src/thrift/Makefile                         | 8 ++++----
 13 files changed, 30 insertions(+), 37 deletions(-)

diff --git a/dockers/docker-base-buster/Dockerfile.j2 b/dockers/docker-base-buster/Dockerfile.j2
index a4139eaa3..b1940e90d 100644
--- a/dockers/docker-base-buster/Dockerfile.j2
+++ b/dockers/docker-base-buster/Dockerfile.j2
@@ -65,15 +65,15 @@ RUN apt-get update &&        \
 
 # Install redis-tools
 {% if CONFIGURED_ARCH == "armhf" %}
-RUN curl -k -o redis-tools_6.0.6-1~bpo10+1_armhf.deb "https://sonicstorage.blob.core.windows.net/packages/redis/redis-tools_6.0.6-1_bpo10+1_armhf.deb?sv=2015-04-05&sr=b&sig=67vHAMxsl%2BS3X1KsqhdYhakJkGdg5FKSPgU8kUiw4as%3D&se=2030-10-24T04%3A22%3A40Z&sp=r"
+RUN curl -k -o redis-tools_6.0.6-1~bpo10+1_armhf.deb "https://sonicstorage.blob.core.windows.net/public/redis/redis-tools_6.0.6-1_bpo10+1_armhf.deb"
 RUN dpkg -i redis-tools_6.0.6-1~bpo10+1_armhf.deb || apt-get install -f -y
 RUN rm redis-tools_6.0.6-1~bpo10+1_armhf.deb
 {% elif CONFIGURED_ARCH == "arm64" %}
-RUN curl -o redis-tools_6.0.6-1~bpo10+1_arm64.deb "https://sonicstorage.blob.core.windows.net/packages/redis/redis-tools_6.0.6-1_bpo10+1_arm64.deb?sv=2015-04-05&sr=b&sig=GbkJV2wWln3hoz27zKi5erdk3NDKrAFrQriA97bcRCY%3D&se=2030-10-24T04%3A22%3A21Z&sp=r"
+RUN curl -o redis-tools_6.0.6-1~bpo10+1_arm64.deb "https://sonicstorage.blob.core.windows.net/public/redis/redis-tools_6.0.6-1_bpo10+1_arm64.deb"
 RUN dpkg -i redis-tools_6.0.6-1~bpo10+1_arm64.deb || apt-get install -f -y
 RUN rm redis-tools_6.0.6-1~bpo10+1_arm64.deb
 {% else %}
-RUN curl -o redis-tools_6.0.6-1~bpo10+1_amd64.deb "https://sonicstorage.blob.core.windows.net/packages/redis/redis-tools_6.0.6-1~bpo10+1_amd64.deb?sv=2015-04-05&sr=b&sig=73zbmjkf3pi%2Bn0R8Hy7CWT2EUvOAyzM5aLYJWCLySGM%3D&se=2030-09-06T19%3A44%3A59Z&sp=r"
+RUN curl -o redis-tools_6.0.6-1~bpo10+1_amd64.deb "https://sonicstorage.blob.core.windows.net/public/redis/redis-tools_6.0.6-1~bpo10+1_amd64.deb"
 RUN dpkg -i redis-tools_6.0.6-1~bpo10+1_amd64.deb || apt-get install -f -y
 RUN rm redis-tools_6.0.6-1~bpo10+1_amd64.deb
 {% endif %}
diff --git a/dockers/docker-base-stretch/Dockerfile.j2 b/dockers/docker-base-stretch/Dockerfile.j2
index 652ca11e2..df1025749 100644
--- a/dockers/docker-base-stretch/Dockerfile.j2
+++ b/dockers/docker-base-stretch/Dockerfile.j2
@@ -64,15 +64,15 @@ RUN apt-get -y -t stretch-backports install rsyslog
 # Install redis-tools
 
 {% if CONFIGURED_ARCH == "armhf" %}
-    RUN curl -o  redis-tools_6.0.6-1~bpo10+1_armhf.deb "https://sonicstorage.blob.core.windows.net/packages/redis/redis-tools_6.0.6-1_bpo10+1_armhf.deb?sv=2015-04-05&sr=b&sig=67vHAMxsl%2BS3X1KsqhdYhakJkGdg5FKSPgU8kUiw4as%3D&se=2030-10-24T04%3A22%3A40Z&sp=r"
+    RUN curl -o  redis-tools_6.0.6-1~bpo10+1_armhf.deb "https://sonicstorage.blob.core.windows.net/public/redis/redis-tools_6.0.6-1_bpo10+1_armhf.deb"
     RUN dpkg -i redis-tools_6.0.6-1~bpo10+1_armhf.deb || apt-get install -f -y
     RUN rm redis-tools_6.0.6-1~bpo10+1_armhf.deb
 {% elif CONFIGURED_ARCH == "arm64" %}
-    RUN curl -o  redis-tools_6.0.6-1~bpo10+1_arm64.deb  "https://sonicstorage.blob.core.windows.net/packages/redis/redis-tools_6.0.6-1_bpo10+1_arm64.deb?sv=2015-04-05&sr=b&sig=GbkJV2wWln3hoz27zKi5erdk3NDKrAFrQriA97bcRCY%3D&se=2030-10-24T04%3A22%3A21Z&sp=r"
+    RUN curl -o  redis-tools_6.0.6-1~bpo10+1_arm64.deb  "https://sonicstorage.blob.core.windows.net/public/redis/redis-tools_6.0.6-1_bpo10+1_arm64.deb"
     RUN dpkg -i redis-tools_6.0.6-1~bpo10+1_arm64.deb || apt-get install -f -y
     RUN rm redis-tools_6.0.6-1~bpo10+1_arm64.deb
 {% else %}
-    RUN curl -o redis-tools_6.0.6-1~bpo10+1_amd64.deb "https://sonicstorage.blob.core.windows.net/packages/redis/redis-tools_6.0.6-1~bpo10+1_amd64.deb?sv=2015-04-05&sr=b&sig=73zbmjkf3pi%2Bn0R8Hy7CWT2EUvOAyzM5aLYJWCLySGM%3D&se=2030-09-06T19%3A44%3A59Z&sp=r"
+    RUN curl -o redis-tools_6.0.6-1~bpo10+1_amd64.deb "https://sonicstorage.blob.core.windows.net/public/redis/redis-tools_6.0.6-1~bpo10+1_amd64.deb"
     RUN dpkg -i redis-tools_6.0.6-1~bpo10+1_amd64.deb || apt-get install -f -y
     RUN rm redis-tools_6.0.6-1~bpo10+1_amd64.deb
 {% endif %}
diff --git a/files/build/versions/default/versions-web b/files/build/versions/default/versions-web
index c30f1261a..be448a72a 100644
--- a/files/build/versions/default/versions-web
+++ b/files/build/versions/default/versions-web
@@ -93,10 +93,6 @@ https://sonicstorage.blob.core.windows.net/debian/pool/main/liby/libyang/libyang
 https://sonicstorage.blob.core.windows.net/debian/pool/main/n/net-snmp/net-snmp_5.9+dfsg-4+deb11u1.debian.tar.xz==a3e626b1ed5adc26430e1727d81641df
 https://sonicstorage.blob.core.windows.net/debian/pool/main/n/net-snmp/net-snmp_5.9+dfsg-4+deb11u1.dsc==a36ed553b5034b7400d9e9a8d529b27e
 https://sonicstorage.blob.core.windows.net/debian/pool/main/n/net-snmp/net-snmp_5.9+dfsg.orig.tar.xz==6c2d346ce3320e8999500497e9bacc99
-https://sonicstorage.blob.core.windows.net/packages/20190307/bcmcmd?sv=2015-04-05&sr=b&sig=sUdbU7oVbh5exbXXHVL5TDFBTWDDBASHeJ8Cp0B0TIc%3D&se=2038-05-06T22%3A34%3A19Z&sp=r==b8aefc751bdf93218716bca6797460ff
-https://sonicstorage.blob.core.windows.net/packages/20190307/dsserve?sv=2015-04-05&sr=b&sig=lk7BH3DtW%2F5ehc0Rkqfga%2BUCABI0UzQmDamBsZH9K6w%3D&se=2038-05-06T22%3A34%3A45Z&sp=r==f9d4b815ebb9be9f755dedca8a51170d
-https://sonicstorage.blob.core.windows.net/packages/credosai/libsaicredo-owl_0.9.3_amd64.deb?sv=2021-04-10&st=2023-10-12T02%3A21%3A51Z&se=2031-10-13T02%3A21%3A00Z&sr=b&sp=r&sig=olu3%2Bq5eJYRtXCygJWgKUx%2FdlrlB%2FWE0i9ruftYdB7g%3D==c69922a1589cf5615a3fddd5b66aa296
-https://sonicstorage.blob.core.windows.net/packages/credosai/libsaicredo_0.9.3_amd64.deb?sv=2021-04-10&st=2023-10-12T02%3A21%3A05Z&se=2031-10-13T02%3A21%3A00Z&sr=b&sp=r&sig=UXC%2FYKm%2BvHRjGmM3xjnFMQzY%2BMpxhKtMxNHQPdwvtN8%3D==0400bc2015f56bff7d4283c030be26cc
 https://sonicstorage.blob.core.windows.net/packages/debian/socat_1.7.4.1-3.debian.tar.xz?sv=2020-04-08&st=2021-12-14T08%3A00%3A00Z&se=2030-12-14T18%3A18%3A00Z&sr=b&sp=r&sig=C8aYSvaQgMJ58Z13kFY0Wr0J0QF6i7WCeET9%2BpF%2BAxc%3D==e8d1e99b4b9e93f5dde860f6d55f42e3
 https://sonicstorage.blob.core.windows.net/packages/debian/socat_1.7.4.1-3.dsc?sv=2020-04-08&st=2021-12-14T00%3A00%3A00Z&se=2050-12-15T00%3A00%3A00Z&sr=b&sp=r&sig=fIy6dVz3s59K0TiMkTlwSWN8lCzRl3i76ruAtROhfWA%3D==df3ed0dd965589fd09bf6a2920bc273e
 https://sonicstorage.blob.core.windows.net/packages/debian/socat_1.7.4.1.orig.tar.gz?sv=2020-04-08&st=2021-12-14T00%3A00%3A00Z&se=2050-12-15T00%3A00%3A00Z&sr=b&sp=r&sig=gpihyZv%2Fr0bVrCUKCKwpS4bIoqiPpdd%2BgCfuUGNHOUc%3D==780d14908dc1a6aa2790de376ab56b7a
@@ -106,9 +102,6 @@ https://sonicstorage.blob.core.windows.net/packages/debian/thrift_0.11.0.orig.ta
 https://sonicstorage.blob.core.windows.net/packages/onie/onie-recovery-x86_64-kvm_x86_64-r0.iso?sv=2015-04-05&sr=b&sig=XMAk1cttBFM369CMbihe5oZgXwe4uaDVfwg4CTLT%2F5U%3D&se=2155-10-13T10%3A40%3A13Z&sp=r==54e11e450a461b1f4ae39c3ce3f15eff
 https://sonicstorage.blob.core.windows.net/packages/onie/onie-recovery-x86_64-kvm_x86_64_4_asic-r0.iso?sv=2020-04-08&st=2021-08-27T22%3A41%3A07Z&se=2030-08-28T22%3A41%3A00Z&sr=b&sp=r&sig=zyaX7rHnE5jXldpgrnWq1nvsfmMTrVCSuESZqrIxDLc%3D==1d8b8d3fa37f842d0184b5205be22be9
 https://sonicstorage.blob.core.windows.net/packages/onie/onie-recovery-x86_64-kvm_x86_64_6_asic-r0.iso?sv=2020-04-08&st=2021-08-27T22%3A42%3A24Z&se=2030-08-28T22%3A42%3A00Z&sr=b&sp=r&sig=RqbtHJt8Hvy7j78jt3TgXo27T7zjdUDfSxqmOID1YUU%3D==58494305d4ac201daedf9364a1018a1b
-https://sonicstorage.blob.core.windows.net/packages/redis/redis-tools_6.0.6-1_bpo10+1_arm64.deb?sv=2015-04-05&sr=b&sig=GbkJV2wWln3hoz27zKi5erdk3NDKrAFrQriA97bcRCY%3D&se=2030-10-24T04%3A22%3A21Z&sp=r==282b4766cc9ac7d8bb70622bd69d9f5c
-https://sonicstorage.blob.core.windows.net/packages/redis/redis-tools_6.0.6-1_bpo10+1_armhf.deb?sv=2015-04-05&sr=b&sig=67vHAMxsl%2BS3X1KsqhdYhakJkGdg5FKSPgU8kUiw4as%3D&se=2030-10-24T04%3A22%3A40Z&sp=r==62f287117afab6caaec564232ebbb5de
-https://sonicstorage.blob.core.windows.net/packages/redis/redis-tools_6.0.6-1~bpo10+1_amd64.deb?sv=2015-04-05&sr=b&sig=73zbmjkf3pi%2Bn0R8Hy7CWT2EUvOAyzM5aLYJWCLySGM%3D&se=2030-09-06T19%3A44%3A59Z&sp=r==2d58c3c3358290c04d5e0ba70f297f18
 https://sonicstorage.blob.core.windows.net/public/fips/bullseye/0.1/amd64/golang-1.15-go_1.15.15-1~deb11u4%2Bfips_amd64.deb==b60f6db62805696b47ab422ab798fe56
 https://sonicstorage.blob.core.windows.net/public/fips/bullseye/0.1/amd64/golang-1.15-src_1.15.15-1~deb11u4%2Bfips_amd64.deb==1c920937aa49b602a1bfec3c49747131
 https://sonicstorage.blob.core.windows.net/public/fips/bullseye/0.1/arm64/golang-1.15-go_1.15.15-1~deb11u4%2Bfips_arm64.deb==0b70c104b907db13ff2fe5d52b3d0008
diff --git a/get_docker-base.sh b/get_docker-base.sh
index ff2bdeaff..0951e5fa1 100755
--- a/get_docker-base.sh
+++ b/get_docker-base.sh
@@ -12,7 +12,7 @@ set -x -e
 TARGET_PATH=$(sed -n 's/TARGET_PATH\s*=\s*//p' slave.mk)
 
 ## [SuppressMessage("Microsoft.Security", "CS002:SecretInNextLine", Justification="Read-only link of Azure Blob storage with shared access signature (SAS)")]
-BASE_URL="https://sonicstorage.blob.core.windows.net/packages/docker-base.ea507753d98b0769e2a15be13003331f8ad38d1c15b40a683e05fc53b1463b10.gz?sv=2015-04-05&sr=b&sig=YNN6eYVMEFndUaiHIRnqcZFdDZwIG%2BaAuVj0IoyDWPw%3D&se=2026-10-27T20%3A46%3A18Z&sp=r"
+BASE_URL="https://sonicstorage.blob.core.windows.net/public/docker-base.ea507753d98b0769e2a15be13003331f8ad38d1c15b40a683e05fc53b1463b10.gz"
 
 base_image_name=docker-base
 docker_try_rmi $base_image_name
diff --git a/platform/broadcom/rules.mk b/platform/broadcom/rules.mk
index 9a506192d..ddf04c37c 100755
--- a/platform/broadcom/rules.mk
+++ b/platform/broadcom/rules.mk
@@ -41,10 +41,10 @@ include $(PLATFORM_PATH)/../components/docker-gbsyncd-broncos.mk
 endif
 
 BCMCMD = bcmcmd
-$(BCMCMD)_URL = "https://sonicstorage.blob.core.windows.net/packages/20190307/bcmcmd?sv=2015-04-05&sr=b&sig=sUdbU7oVbh5exbXXHVL5TDFBTWDDBASHeJ8Cp0B0TIc%3D&se=2038-05-06T22%3A34%3A19Z&sp=r"
+$(BCMCMD)_URL = "https://sonicstorage.blob.core.windows.net/public/20190307/bcmcmd"
 
 DSSERVE = dsserve
-$(DSSERVE)_URL = "https://sonicstorage.blob.core.windows.net/packages/20190307/dsserve?sv=2015-04-05&sr=b&sig=lk7BH3DtW%2F5ehc0Rkqfga%2BUCABI0UzQmDamBsZH9K6w%3D&se=2038-05-06T22%3A34%3A45Z&sp=r"
+$(DSSERVE)_URL = "https://sonicstorage.blob.core.windows.net/public/20190307/dsserve"
 
 SONIC_ONLINE_FILES += $(BCMCMD) $(DSSERVE)
 
diff --git a/platform/components/docker-gbsyncd-credo.mk b/platform/components/docker-gbsyncd-credo.mk
index 2181add0f..a500a34a4 100644
--- a/platform/components/docker-gbsyncd-credo.mk
+++ b/platform/components/docker-gbsyncd-credo.mk
@@ -1,9 +1,9 @@
 DOCKER_GBSYNCD_PLATFORM_CODE = credo
 
 LIBSAI_CREDO = libsaicredo_0.9.3_amd64.deb
-$(LIBSAI_CREDO)_URL = "https://sonicstorage.blob.core.windows.net/packages/credosai/libsaicredo_0.9.3_amd64.deb?sv=2021-04-10&st=2023-10-12T02%3A21%3A05Z&se=2031-10-13T02%3A21%3A00Z&sr=b&sp=r&sig=UXC%2FYKm%2BvHRjGmM3xjnFMQzY%2BMpxhKtMxNHQPdwvtN8%3D"
+$(LIBSAI_CREDO)_URL = "https://sonicstorage.blob.core.windows.net/public/credosai/libsaicredo_0.9.3_amd64.deb"
 LIBSAI_CREDO_OWL = libsaicredo-owl_0.9.3_amd64.deb
-$(LIBSAI_CREDO_OWL)_URL = "https://sonicstorage.blob.core.windows.net/packages/credosai/libsaicredo-owl_0.9.3_amd64.deb?sv=2021-04-10&st=2023-10-12T02%3A21%3A51Z&se=2031-10-13T02%3A21%3A00Z&sr=b&sp=r&sig=olu3%2Bq5eJYRtXCygJWgKUx%2FdlrlB%2FWE0i9ruftYdB7g%3D"
+$(LIBSAI_CREDO_OWL)_URL = "https://sonicstorage.blob.core.windows.net/public/credosai/libsaicredo-owl_0.9.3_amd64.deb?"
 
 ifneq ($($(LIBSAI_CREDO)_URL),)
 include $(PLATFORM_PATH)/../template/docker-gbsyncd-base.mk
diff --git a/platform/nephos/rules.mk b/platform/nephos/rules.mk
index 4ee2443e7..2691de76a 100644
--- a/platform/nephos/rules.mk
+++ b/platform/nephos/rules.mk
@@ -15,7 +15,7 @@ WARM_VERIFIER = warm-verifier
 $(WARM_VERIFIER)_URL = "https://github.com/NephosInc/SONiC/raw/master/sai/warm-verifier"
 
 DSSERVE = dsserve
-$(DSSERVE)_URL = "https://sonicstorage.blob.core.windows.net/packages/20190307/dsserve?sv=2015-04-05&sr=b&sig=lk7BH3DtW%2F5ehc0Rkqfga%2BUCABI0UzQmDamBsZH9K6w%3D&se=2038-05-06T22%3A34%3A45Z&sp=r"
+$(DSSERVE)_URL = "https://sonicstorage.blob.core.windows.net/public/20190307/dsserve"
 
 SONIC_ONLINE_FILES += $(NPX_DIAG) $(WARM_VERIFIER) $(DSSERVE)
 
diff --git a/platform/vs/onie.mk b/platform/vs/onie.mk
index c64a09b88..9d4f843b0 100644
--- a/platform/vs/onie.mk
+++ b/platform/vs/onie.mk
@@ -1,10 +1,10 @@
 ONIE_RECOVERY_IMAGE = onie-recovery-x86_64-kvm_x86_64-r0.iso
-$(ONIE_RECOVERY_IMAGE)_URL = "https://sonicstorage.blob.core.windows.net/packages/onie/onie-recovery-x86_64-kvm_x86_64-r0.iso?sv=2015-04-05&sr=b&sig=XMAk1cttBFM369CMbihe5oZgXwe4uaDVfwg4CTLT%2F5U%3D&se=2155-10-13T10%3A40%3A13Z&sp=r"
+$(ONIE_RECOVERY_IMAGE)_URL = "https://sonicstorage.blob.core.windows.net/public/onie/onie-recovery-x86_64-kvm_x86_64-r0.iso"
 
 ONIE_RECOVERY_KVM_4ASIC_IMAGE = onie-recovery-x86_64-kvm_x86_64_4_asic-r0.iso
-$(ONIE_RECOVERY_KVM_4ASIC_IMAGE)_URL = "https://sonicstorage.blob.core.windows.net/packages/onie/onie-recovery-x86_64-kvm_x86_64_4_asic-r0.iso?sv=2020-04-08&st=2021-08-27T22%3A41%3A07Z&se=2030-08-28T22%3A41%3A00Z&sr=b&sp=r&sig=zyaX7rHnE5jXldpgrnWq1nvsfmMTrVCSuESZqrIxDLc%3D"
+$(ONIE_RECOVERY_KVM_4ASIC_IMAGE)_URL = "https://sonicstorage.blob.core.windows.net/public/onie/onie-recovery-x86_64-kvm_x86_64_4_asic-r0.iso"
 
 ONIE_RECOVERY_KVM_6ASIC_IMAGE = onie-recovery-x86_64-kvm_x86_64_6_asic-r0.iso
-$(ONIE_RECOVERY_KVM_6ASIC_IMAGE)_URL = "https://sonicstorage.blob.core.windows.net/packages/onie/onie-recovery-x86_64-kvm_x86_64_6_asic-r0.iso?sv=2020-04-08&st=2021-08-27T22%3A42%3A24Z&se=2030-08-28T22%3A42%3A00Z&sr=b&sp=r&sig=RqbtHJt8Hvy7j78jt3TgXo27T7zjdUDfSxqmOID1YUU%3D"
+$(ONIE_RECOVERY_KVM_6ASIC_IMAGE)_URL = "https://sonicstorage.blob.core.windows.net/public/onie/onie-recovery-x86_64-kvm_x86_64_6_asic-r0.iso"
 
 SONIC_ONLINE_FILES += $(ONIE_RECOVERY_IMAGE) $(ONIE_RECOVERY_KVM_4ASIC_IMAGE) $(ONIE_RECOVERY_KVM_6ASIC_IMAGE)
diff --git a/sonic-slave-stretch/Dockerfile.j2 b/sonic-slave-stretch/Dockerfile.j2
index d63861c6d..5d2d345e2 100644
--- a/sonic-slave-stretch/Dockerfile.j2
+++ b/sonic-slave-stretch/Dockerfile.j2
@@ -373,16 +373,16 @@ RUN apt-get install -y libarchive13 librhash0
 RUN apt-get -t stretch-backports install -y libuv1
 # Install cmake/cmake-data 3.13.2-1_bpo9+1
 # latest cmake 3.16.3 break the build libyang 1.0.73
-RUN wget -O cmake-data_3.13.2-1_bpo9+1_all.deb "https://sonicstorage.blob.core.windows.net/packages/cmake/cmake-data_3.13.2-1_bpo9%2B1_all.deb?st=2020-03-27T02%3A22%3A24Z&se=2100-03-26T19%3A00%3A00Z&sp=rl&sv=2018-03-28&sr=b&sig=Xby%2Bm3OZOjPB%2FSlDbHD65yDcPzAgoys%2FA3vK8RB4BzA%3D"
+RUN wget -O cmake-data_3.13.2-1_bpo9+1_all.deb "https://sonicstorage.blob.core.windows.net/public/cmake/cmake-data_3.13.2-1_bpo9%2B1_all.deb"
 RUN dpkg -i cmake-data_3.13.2-1_bpo9+1_all.deb || apt-get install -f
 {% if CONFIGURED_ARCH == "armhf" %}
-RUN wget -O cmake_3.13.2-1_bpo9+1_armhf.deb "https://sonicstorage.blob.core.windows.net/packages/cmake/cmake_3.13.2-1_bpo9%2B1_armhf.deb?st=2020-03-27T02%3A29%3A41Z&se=2100-03-26T19%3A00%3A00Z&sp=rl&sv=2018-03-28&sr=b&sig=sWt7kxrFumn020d2GeutGJ716cuQsFwmAmgU%2BJ0kqnk%3D"
+RUN wget -O cmake_3.13.2-1_bpo9+1_armhf.deb "https://sonicstorage.blob.core.windows.net/public/cmake/cmake_3.13.2-1_bpo9%2B1_armhf.deb"
 RUN dpkg -i cmake_3.13.2-1_bpo9+1_armhf.deb || apt-get install -f
 {% elif CONFIGURED_ARCH == "arm64" %}
-RUN wget -O cmake_3.13.2-1_bpo9+1_arm64.deb "https://sonicstorage.blob.core.windows.net/packages/cmake/cmake_3.13.2-1_bpo9%2B1_arm64.deb?st=2020-03-27T02%3A28%3A38Z&se=2100-03-26T19%3A00%3A00Z&sp=rl&sv=2018-03-28&sr=b&sig=rrHMkLi29aI8yH6s52ILCY8VcEbNFrzYT2DmC5RwOgs%3D"
+RUN wget -O cmake_3.13.2-1_bpo9+1_arm64.deb "https://sonicstorage.blob.core.windows.net/public/cmake/cmake_3.13.2-1_bpo9%2B1_arm64.deb"
 RUN dpkg -i cmake_3.13.2-1_bpo9+1_arm64.deb || apt-get install -f
 {% else %}
-RUN wget -O cmake_3.13.2-1_bpo9+1_amd64.deb "https://sonicstorage.blob.core.windows.net/packages/cmake/cmake_3.13.2-1_bpo9%2B1_amd64.deb?st=2020-03-27T02%3A27%3A21Z&se=2100-03-26T19%3A00%3A00Z&sp=rl&sv=2018-03-28&sr=b&sig=4MvmmDBQuicFEJYakLm7xCNU19yJ8GIP4ankFSnITKY%3D"
+RUN wget -O cmake_3.13.2-1_bpo9+1_amd64.deb "https://sonicstorage.blob.core.windows.net/public/cmake/cmake_3.13.2-1_bpo9%2B1_amd64.deb"
 RUN dpkg -i cmake_3.13.2-1_bpo9+1_amd64.deb || apt-get install -f
 {% endif %}
 RUN cd /usr/src/gtest && cmake . && make -C /usr/src/gtest
diff --git a/src/ixgbe/Makefile b/src/ixgbe/Makefile
index 90d20e606..7514a08fa 100644
--- a/src/ixgbe/Makefile
+++ b/src/ixgbe/Makefile
@@ -6,7 +6,7 @@ MAIN_TARGET = ixgbe.ko
 
 $(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% :
 	rm -rf ./ixgbe-$(IXGBE_DRIVER_VERSION)
-	wget -O ixgbe-$(IXGBE_DRIVER_VERSION).tar.gz "https://sonicstorage.blob.core.windows.net/packages/ixgbe-5.2.4.tar.gz?sv=2015-04-05&sr=b&sig=AaqJHHaPiJRp8R3HKobi0GNDgHAVnqijk6hpahwJ0Mg%3D&se=2154-10-05T22%3A19%3A29Z&sp=r"
+	wget -O ixgbe-$(IXGBE_DRIVER_VERSION).tar.gz "https://sonicstorage.blob.core.windows.net/public/ixgbe-5.2.4.tar.gz"
 	tar xzf ixgbe-$(IXGBE_DRIVER_VERSION).tar.gz
 
 	# Patch
diff --git a/src/socat/Makefile b/src/socat/Makefile
index 8df6c8260..db1fd3d02 100644
--- a/src/socat/Makefile
+++ b/src/socat/Makefile
@@ -9,9 +9,9 @@ $(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% :
 	rm -rf ./socat-1.7.4.1
 
 	# Get source package
-	wget -NO socat_$(SOCAT_VERSION).dsc "https://sonicstorage.blob.core.windows.net/packages/debian/socat_1.7.4.1-3.dsc?sv=2020-04-08&st=2021-12-14T00%3A00%3A00Z&se=2050-12-15T00%3A00%3A00Z&sr=b&sp=r&sig=fIy6dVz3s59K0TiMkTlwSWN8lCzRl3i76ruAtROhfWA%3D"
-	wget -NO socat_$(SOCAT_VERSION).debian.tar.xz "https://sonicstorage.blob.core.windows.net/packages/debian/socat_1.7.4.1-3.debian.tar.xz?sv=2020-04-08&st=2021-12-14T08%3A00%3A00Z&se=2030-12-14T18%3A18%3A00Z&sr=b&sp=r&sig=C8aYSvaQgMJ58Z13kFY0Wr0J0QF6i7WCeET9%2BpF%2BAxc%3D"
-	wget -NO socat_1.7.4.1.orig.tar.gz "https://sonicstorage.blob.core.windows.net/packages/debian/socat_1.7.4.1.orig.tar.gz?sv=2020-04-08&st=2021-12-14T00%3A00%3A00Z&se=2050-12-15T00%3A00%3A00Z&sr=b&sp=r&sig=gpihyZv%2Fr0bVrCUKCKwpS4bIoqiPpdd%2BgCfuUGNHOUc%3D"
+	wget -NO socat_$(SOCAT_VERSION).dsc "https://sonicstorage.blob.core.windows.net/public/debian/socat_1.7.4.1-3.dsc"
+	wget -NO socat_$(SOCAT_VERSION).debian.tar.xz "https://sonicstorage.blob.core.windows.net/public/debian/socat_1.7.4.1-3.debian.tar.xz"
+	wget -NO socat_1.7.4.1.orig.tar.gz "https://sonicstorage.blob.core.windows.net/public/debian/socat_1.7.4.1.orig.tar.gz"
 
 	dpkg-source -x socat_$(SOCAT_VERSION).dsc
 
diff --git a/src/swig/Makefile b/src/swig/Makefile
index f00d86521..2e3dc237d 100644
--- a/src/swig/Makefile
+++ b/src/swig/Makefile
@@ -7,9 +7,9 @@ DERIVED_TARGETS = $(SWIG) $(SWIG_DBG)
 
 $(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% :
 	rm -fr ./swig-$(SWIG_VERSION) *.deb
-	wget -O swig_$(SWIG_VERSION).orig.tar.gz                      'https://sonicstorage.blob.core.windows.net/packages/swig_3.0.12.orig.tar.gz?sv=2015-04-05&sr=b&sig=kcSKFvlTQZst8Dbb8MUfckGbVEZU5sptFqT2HbwOUtA%3D&se=2046-09-30T22%3A11%3A59Z&sp=r'
-	wget -O swig_$(SWIG_VERSION).dsc                              'https://sonicstorage.blob.core.windows.net/packages/swig_3.0.12-2.dsc?sv=2015-04-05&sr=b&sig=k3eLfmWgmCz1Kx8SYcirX18FSQdJ76ifo%2B9rbJBnrf8%3D&se=2046-09-30T22%3A11%3A45Z&sp=r'
-	wget -O swig_$(SWIG_VERSION)-$(SWIG_SUBVERSION).debian.tar.xz 'https://sonicstorage.blob.core.windows.net/packages/swig_3.0.12-2.debian.tar.xz?sv=2015-04-05&sr=b&sig=SQICTE%2BR1BO7npUBNwTQjo447OaFz%2BooX6VAm912c7g%3D&se=2046-09-30T22%3A11%3A32Z&sp=r'
+	wget -O swig_$(SWIG_VERSION).orig.tar.gz                      'https://sonicstorage.blob.core.windows.net/public/swig_3.0.12.orig.tar.gz'
+	wget -O swig_$(SWIG_VERSION).dsc                              'https://sonicstorage.blob.core.windows.net/public/swig_3.0.12-2.dsc'
+	wget -O swig_$(SWIG_VERSION)-$(SWIG_SUBVERSION).debian.tar.xz 'https://sonicstorage.blob.core.windows.net/public/swig_3.0.12-2.debian.tar.xz'
 	dpkg-source -x swig_$(SWIG_VERSION).dsc
 
 	pushd ./swig-$(SWIG_VERSION)
diff --git a/src/thrift/Makefile b/src/thrift/Makefile
index 643cc61fa..293b65912 100644
--- a/src/thrift/Makefile
+++ b/src/thrift/Makefile
@@ -10,14 +10,14 @@ DERIVED_TARGETS = libthrift-dev_$(THRIFT_VERSION_FULL)_$(CONFIGURED_ARCH).deb \
 		  python-thrift_$(THRIFT_VERSION_FULL)_$(CONFIGURED_ARCH).deb \
 		  thrift-compiler_$(THRIFT_VERSION_FULL)_$(CONFIGURED_ARCH).deb
 
-THRIFT_LINK_PRE = https://sonicstorage.blob.core.windows.net/packages/debian
+THRIFT_LINK_PRE = https://sonicstorage.blob.core.windows.net/public/debian
 
 $(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% :
 	rm -rf thrift-$(THRIFT_VERSION)
 
-	wget -NO "thrift_$(THRIFT_VERSION).orig.tar.gz" "$(THRIFT_LINK_PRE)/thrift_0.11.0.orig.tar.gz?sv=2015-04-05&sr=b&sig=%2BrAjWESiSNRCMN7NGqEqVGceLefpwwS%2FWPKEfJpPLSQ%3D&se=2156-02-02T17%3A17%3A20Z&sp=r"
-	wget -NO "thrift_$(THRIFT_VERSION_FULL).debian.tar.xz" "$(THRIFT_LINK_PRE)/thrift_0.11.0-4.debian.tar.xz?sv=2015-04-05&sr=b&sig=dj9uJ5YjUNupcmuxSX6%2F5IS9NqaGAyM9iF2h%2F2rROZA%3D&se=2156-02-02T17%3A19%3A34Z&sp=r"
-	wget -NO "thrift_$(THRIFT_VERSION_FULL).dsc" "$(THRIFT_LINK_PRE)/thrift_0.11.0-4.dsc?sv=2015-04-05&sr=b&sig=pWfg55owvQ2jZtZ6ylHp0OP8uZyfc9sxO6H%2BP4Ez7w4%3D&se=2156-02-02T17%3A20%3A05Z&sp=r"
+	wget -NO "thrift_$(THRIFT_VERSION).orig.tar.gz" "$(THRIFT_LINK_PRE)/thrift_0.11.0.orig.tar.gz"
+	wget -NO "thrift_$(THRIFT_VERSION_FULL).debian.tar.xz" "$(THRIFT_LINK_PRE)/thrift_0.11.0-4.debian.tar.xz"
+	wget -NO "thrift_$(THRIFT_VERSION_FULL).dsc" "$(THRIFT_LINK_PRE)/thrift_0.11.0-4.dsc"
 
 	dpkg-source -x thrift_$(THRIFT_VERSION_FULL).dsc
 	pushd thrift-$(THRIFT_VERSION)

From 9fef78c4f0a20d241aac67e6e94cfb6851f19eca Mon Sep 17 00:00:00 2001
From: lixiaoyuner <35456895+lixiaoyuner@users.noreply.github.com>
Date: Tue, 27 Feb 2024 18:09:12 -0800
Subject: [PATCH 0280/1115] Install and upgrade packages for k8s master image
 (#18159)

### Why I did it
- Currently inside k8s master image we are going to use AAD to do authentication related stuff with python language, we need to pre-install several azure key-vault related python packages.
- Need to upgrade cri-dockerd to 0.3.10 to support bookworm
- Need to change netcat package name to netcat-openbsd for bookworm
- Remove the unnecessary apt-get update
##### Work item tracking
- Microsoft ADO **(number only)**: 26435886

#### How I did it
- pip3 install azure-keyvault-secrets
- apt-get -y install netcat-openbsd
- upgrade the cri-dockerd version for bookworm
#### How to verify it
- pip3 list to check if azure-keyvault-secrets is installed inside image
- dpkg -l to check if netcat-openbsd is installed inside image
- systemctl status cri-dockerd.service to check if it's running well
---
 build_debian.sh                                 | 4 +---
 files/build_templates/sonic_debian_extension.j2 | 2 +-
 rules/config                                    | 2 +-
 3 files changed, 3 insertions(+), 5 deletions(-)

diff --git a/build_debian.sh b/build_debian.sh
index 65966f4a9..f2e7fd153 100755
--- a/build_debian.sh
+++ b/build_debian.sh
@@ -298,9 +298,7 @@ then
     echo '[INFO] Install kubernetes master'
     install_kubernetes ${MASTER_KUBERNETES_VERSION}
 
-    sudo LANG=C chroot $FILESYSTEM_ROOT apt-get update
-    sudo LANG=C chroot $FILESYSTEM_ROOT apt-get -y install hyperv-daemons gnupg xmlstarlet parted netcat
-    sudo LANG=C chroot $FILESYSTEM_ROOT apt-get -y remove gnupg
+    sudo LANG=C chroot $FILESYSTEM_ROOT apt-get -y install hyperv-daemons xmlstarlet parted netcat-openbsd
     sudo https_proxy=$https_proxy LANG=C chroot $FILESYSTEM_ROOT curl -o /tmp/cri-dockerd.deb -fsSL \
         https://github.com/Mirantis/cri-dockerd/releases/download/v${MASTER_CRI_DOCKERD}/cri-dockerd_${MASTER_CRI_DOCKERD}.3-0.debian-${IMAGE_DISTRO}_amd64.deb
     sudo LANG=C chroot $FILESYSTEM_ROOT apt-get -y install -f /tmp/cri-dockerd.deb
diff --git a/files/build_templates/sonic_debian_extension.j2 b/files/build_templates/sonic_debian_extension.j2
index e0bd1242d..97bf714e2 100644
--- a/files/build_templates/sonic_debian_extension.j2
+++ b/files/build_templates/sonic_debian_extension.j2
@@ -837,7 +837,7 @@ sudo https_proxy=$https_proxy LANG=C chroot $FILESYSTEM_ROOT pip3 install statsd
 sudo https_proxy=$https_proxy LANG=C chroot $FILESYSTEM_ROOT pip3 install kubernetes
 sudo https_proxy=$https_proxy LANG=C chroot $FILESYSTEM_ROOT pip3 install pyOpenSSL
 # Install python packages to upload and download etcd backup files for backup and restore service usage
-sudo https_proxy=$https_proxy LANG=C chroot $FILESYSTEM_ROOT pip3 install azure-storage-blob azure-identity
+sudo https_proxy=$https_proxy LANG=C chroot $FILESYSTEM_ROOT pip3 install azure-storage-blob azure-identity azure-keyvault-secrets
 sudo LANG=C chroot $FILESYSTEM_ROOT systemctl enable kubelet.service
 # Add kubernetes master entrance
 sudo cp files/image_config/kubernetes/kubernetes_master_entrance.service ${FILESYSTEM_ROOT_USR_LIB_SYSTEMD_SYSTEM}/
diff --git a/rules/config b/rules/config
index d0a4b8cb5..026cf34fb 100644
--- a/rules/config
+++ b/rules/config
@@ -217,7 +217,7 @@ MASTER_KUBERNETES_CONTAINER_IMAGE_VERSION = v1.22.2
 MASTER_PAUSE_VERSION = 3.5
 MASTER_COREDNS_VERSION = v1.8.4
 MASTER_ETCD_VERSION = 3.5.0-0
-MASTER_CRI_DOCKERD = 0.3.1
+MASTER_CRI_DOCKERD = 0.3.10
 MASTER_UI_METRIC_VERSION = v1.0.8
 MASTER_UI_DASH_VERSION = v2.7.0
 MASTER_MDM_VERSION = 2.2023.505.1124-45da18-20230505t1700

From d49b09024b7be21dcf3f50ba1f87a1f88c524bfb Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Wed, 28 Feb 2024 19:01:03 +0800
Subject: [PATCH 0281/1115] [submodule] Update submodule sonic-swss to the
 latest HEAD automatically (#18196)

#### Why I did it
src/sonic-swss
```
* 97c7f3ed - (HEAD -> master, origin/master, origin/HEAD) Fix multi VLAN neighbor learning (#3049) (4 hours ago) [Lawrence Lee]
* 2617d4c5 - [intfsorch] Enable ipv6 proxy ndp along with proxy arp (#3045) (6 hours ago) [Nikola Dancejic]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-swss | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-swss b/src/sonic-swss
index 913217377..97c7f3edb 160000
--- a/src/sonic-swss
+++ b/src/sonic-swss
@@ -1 +1 @@
-Subproject commit 913217377260353c9b08f1d2a0dadc51c4399a2a
+Subproject commit 97c7f3edbfedddceaa3bbac04f9d56e9bcad558c

From 6511c3bc26e553764d99227742184f829a1b26bd Mon Sep 17 00:00:00 2001
From: Pavan-Nokia <120486223+Pavan-Nokia@users.noreply.github.com>
Date: Wed, 28 Feb 2024 11:24:01 -0500
Subject: [PATCH 0282/1115] [Nokia-7215-T1] Disable sysrq-trigger from platform
 init (#18161)

---
 .../sonic-platform-nokia/7215/scripts/nokia-7215init.sh        | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/platform/marvell-armhf/sonic-platform-nokia/7215/scripts/nokia-7215init.sh b/platform/marvell-armhf/sonic-platform-nokia/7215/scripts/nokia-7215init.sh
index f8a7ad54b..5ec108d1c 100755
--- a/platform/marvell-armhf/sonic-platform-nokia/7215/scripts/nokia-7215init.sh
+++ b/platform/marvell-armhf/sonic-platform-nokia/7215/scripts/nokia-7215init.sh
@@ -30,6 +30,9 @@ nokia_7215_profile()
 # Install kernel drivers required for i2c bus access
 load_kernel_drivers
 
+# Disable sysrq-trigger
+echo 0 > /proc/sys/kernel/sysrq
+
 # LOGIC to enumerate SFP eeprom devices - send 0x50 to kernel i2c driver - initialize devices
 # the mux may be enumerated at number 4 or 5 so we check for the mux and skip if needed
 

From b25dfa91c1af352eed26235e762f966c1ec3d287 Mon Sep 17 00:00:00 2001
From: noaOrMlnx <58519608+noaOrMlnx@users.noreply.github.com>
Date: Wed, 28 Feb 2024 21:05:20 +0200
Subject: [PATCH 0283/1115] [Mellanox] Update Nvidia sai.profile SKU files to
 have common file (#18074)

* Update Nvidia sai.profile SKU files to have common file

* Remove SAI_DUMP_MFT_CFG_PATH from sai-common.profile as it is not in use
---
 device/mellanox/x86_64-mlnx_msn2010-r0/ACS-MSN2010/sai.profile | 2 --
 device/mellanox/x86_64-mlnx_msn2100-r0/ACS-MSN2100/sai.profile | 2 --
 device/mellanox/x86_64-mlnx_msn2410-r0/ACS-MSN2410/sai.profile | 2 --
 device/mellanox/x86_64-mlnx_msn2700-r0/ACS-MSN2700/sai.profile | 2 --
 .../x86_64-mlnx_msn2700-r0/Mellanox-SN2700-C28D8/sai.profile   | 2 --
 .../x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D40C8S8/sai.profile | 2 --
 .../x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D44C10/sai.profile  | 2 --
 .../x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D48C8/sai.profile   | 2 --
 .../x86_64-mlnx_msn2700-r0/Mellanox-SN2700/sai.profile         | 2 --
 device/mellanox/x86_64-mlnx_msn2740-r0/ACS-MSN2740/sai.profile | 2 --
 device/mellanox/x86_64-mlnx_msn3420-r0/ACS-MSN3420/sai.profile | 3 ---
 device/mellanox/x86_64-mlnx_msn3700-r0/ACS-MSN3700/sai.profile | 3 ---
 .../mellanox/x86_64-mlnx_msn3700c-r0/ACS-MSN3700C/sai.profile  | 3 ---
 device/mellanox/x86_64-mlnx_msn3800-r0/ACS-MSN3800/sai.profile | 3 ---
 .../x86_64-mlnx_msn3800-r0/Mellanox-SN3800-C64/sai.profile     | 3 ---
 .../Mellanox-SN3800-D100C12S2/sai.profile                      | 3 ---
 .../x86_64-mlnx_msn3800-r0/Mellanox-SN3800-D112C8/sai.profile  | 3 ---
 .../x86_64-mlnx_msn3800-r0/Mellanox-SN3800-D24C52/sai.profile  | 3 ---
 .../Mellanox-SN3800-D28C49S1/sai.profile                       | 3 ---
 .../x86_64-mlnx_msn3800-r0/Mellanox-SN3800-D28C50/sai.profile  | 3 ---
 device/mellanox/x86_64-mlnx_msn4410-r0/ACS-MSN4410/sai.profile | 3 ---
 device/mellanox/x86_64-mlnx_msn4600-r0/ACS-MSN4600/sai.profile | 3 ---
 .../mellanox/x86_64-mlnx_msn4600c-r0/ACS-MSN4600C/sai.profile  | 3 ---
 .../x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-C64/sai.profile   | 3 ---
 .../Mellanox-SN4600C-D100C12S2/sai.profile                     | 3 ---
 .../Mellanox-SN4600C-D112C8/sai.profile                        | 3 ---
 .../Mellanox-SN4600C-D48C40/sai.profile                        | 3 ---
 device/mellanox/x86_64-mlnx_msn4700-r0/ACS-MSN4700/sai.profile | 3 ---
 .../x86_64-mlnx_msn4700-r0/Mellanox-SN4700-A96C8V8/sai.profile | 3 ---
 .../x86_64-mlnx_msn4700-r0/Mellanox-SN4700-C128/sai.profile    | 3 ---
 .../x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/sai.profile     | 2 --
 .../x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/sai.profile   | 3 ---
 .../x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/sai.profile   | 3 ---
 .../x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V48C32/sai.profile  | 3 ---
 device/mellanox/x86_64-nvidia_sn2201-r0/ACS-SN2201/sai.profile | 2 --
 device/mellanox/x86_64-nvidia_sn4800-r0/ACS-SN4800/sai.profile | 3 ---
 device/mellanox/x86_64-nvidia_sn5600-r0/ACS-SN5600/sai.profile | 2 --
 .../x86_64-nvidia_sn5600_simx-r0/ACS-SN5600/sai.profile        | 2 --
 platform/mellanox/docker-syncd-mlnx/Dockerfile.j2              | 3 +++
 platform/mellanox/docker-syncd-mlnx/sai-common.profile         | 2 ++
 40 files changed, 5 insertions(+), 100 deletions(-)
 create mode 100644 platform/mellanox/docker-syncd-mlnx/sai-common.profile

diff --git a/device/mellanox/x86_64-mlnx_msn2010-r0/ACS-MSN2010/sai.profile b/device/mellanox/x86_64-mlnx_msn2010-r0/ACS-MSN2010/sai.profile
index fa261ec65..c13ca3737 100644
--- a/device/mellanox/x86_64-mlnx_msn2010-r0/ACS-MSN2010/sai.profile
+++ b/device/mellanox/x86_64-mlnx_msn2010-r0/ACS-MSN2010/sai.profile
@@ -1,3 +1 @@
 SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_2010.xml
-SAI_DUMP_STORE_PATH=/var/log/mellanox/sdk-dumps
-SAI_DUMP_STORE_AMOUNT=10
diff --git a/device/mellanox/x86_64-mlnx_msn2100-r0/ACS-MSN2100/sai.profile b/device/mellanox/x86_64-mlnx_msn2100-r0/ACS-MSN2100/sai.profile
index 25f879a53..5a381e466 100644
--- a/device/mellanox/x86_64-mlnx_msn2100-r0/ACS-MSN2100/sai.profile
+++ b/device/mellanox/x86_64-mlnx_msn2100-r0/ACS-MSN2100/sai.profile
@@ -1,3 +1 @@
 SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_2100.xml
-SAI_DUMP_STORE_PATH=/var/log/mellanox/sdk-dumps
-SAI_DUMP_STORE_AMOUNT=10
diff --git a/device/mellanox/x86_64-mlnx_msn2410-r0/ACS-MSN2410/sai.profile b/device/mellanox/x86_64-mlnx_msn2410-r0/ACS-MSN2410/sai.profile
index b707c2692..f7cb264c2 100644
--- a/device/mellanox/x86_64-mlnx_msn2410-r0/ACS-MSN2410/sai.profile
+++ b/device/mellanox/x86_64-mlnx_msn2410-r0/ACS-MSN2410/sai.profile
@@ -1,3 +1 @@
 SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_2410.xml
-SAI_DUMP_STORE_PATH=/var/log/mellanox/sdk-dumps
-SAI_DUMP_STORE_AMOUNT=10
diff --git a/device/mellanox/x86_64-mlnx_msn2700-r0/ACS-MSN2700/sai.profile b/device/mellanox/x86_64-mlnx_msn2700-r0/ACS-MSN2700/sai.profile
index 2b855ccb2..696f3d818 100644
--- a/device/mellanox/x86_64-mlnx_msn2700-r0/ACS-MSN2700/sai.profile
+++ b/device/mellanox/x86_64-mlnx_msn2700-r0/ACS-MSN2700/sai.profile
@@ -1,3 +1 @@
 SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_2700.xml
-SAI_DUMP_STORE_PATH=/var/log/mellanox/sdk-dumps
-SAI_DUMP_STORE_AMOUNT=10
diff --git a/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-C28D8/sai.profile b/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-C28D8/sai.profile
index 3b0945975..5ee219f34 100644
--- a/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-C28D8/sai.profile
+++ b/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-C28D8/sai.profile
@@ -1,4 +1,2 @@
 SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_2700_8x50g_28x100g.xml
-SAI_DUMP_STORE_PATH=/var/log/mellanox/sdk-dumps
-SAI_DUMP_STORE_AMOUNT=10
 SAI_DEFAULT_SWITCHING_MODE_STORE_FORWARD=1
diff --git a/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D40C8S8/sai.profile b/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D40C8S8/sai.profile
index c18106550..8498641f5 100644
--- a/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D40C8S8/sai.profile
+++ b/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D40C8S8/sai.profile
@@ -1,4 +1,2 @@
 SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_2700_8x100g_40x50g_8x10g.xml
-SAI_DUMP_STORE_PATH=/var/log/mellanox/sdk-dumps
-SAI_DUMP_STORE_AMOUNT=10
 SAI_DEFAULT_SWITCHING_MODE_STORE_FORWARD=1
diff --git a/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D44C10/sai.profile b/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D44C10/sai.profile
index e6f3c2f0c..7a2add983 100644
--- a/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D44C10/sai.profile
+++ b/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D44C10/sai.profile
@@ -1,4 +1,2 @@
 SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_2700_44x50g_10x100g.xml
-SAI_DUMP_STORE_PATH=/var/log/mellanox/sdk-dumps
-SAI_DUMP_STORE_AMOUNT=10
 SAI_DEFAULT_SWITCHING_MODE_STORE_FORWARD=1
diff --git a/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D48C8/sai.profile b/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D48C8/sai.profile
index daf2235f0..1d1563cd6 100644
--- a/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D48C8/sai.profile
+++ b/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D48C8/sai.profile
@@ -1,4 +1,2 @@
 SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_2700_48x50g_8x100g.xml
-SAI_DUMP_STORE_PATH=/var/log/mellanox/sdk-dumps
-SAI_DUMP_STORE_AMOUNT=10
 SAI_DEFAULT_SWITCHING_MODE_STORE_FORWARD=1
diff --git a/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700/sai.profile b/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700/sai.profile
index fcd0120d8..f1c554fa5 100644
--- a/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700/sai.profile
+++ b/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700/sai.profile
@@ -1,4 +1,2 @@
 SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_2700.xml
-SAI_DUMP_STORE_PATH=/var/log/mellanox/sdk-dumps
-SAI_DUMP_STORE_AMOUNT=10
 SAI_DEFAULT_SWITCHING_MODE_STORE_FORWARD=1
diff --git a/device/mellanox/x86_64-mlnx_msn2740-r0/ACS-MSN2740/sai.profile b/device/mellanox/x86_64-mlnx_msn2740-r0/ACS-MSN2740/sai.profile
index e212df2e5..adaa280e6 100644
--- a/device/mellanox/x86_64-mlnx_msn2740-r0/ACS-MSN2740/sai.profile
+++ b/device/mellanox/x86_64-mlnx_msn2740-r0/ACS-MSN2740/sai.profile
@@ -1,3 +1 @@
 SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_2740.xml
-SAI_DUMP_STORE_PATH=/var/log/mellanox/sdk-dumps
-SAI_DUMP_STORE_AMOUNT=10
diff --git a/device/mellanox/x86_64-mlnx_msn3420-r0/ACS-MSN3420/sai.profile b/device/mellanox/x86_64-mlnx_msn3420-r0/ACS-MSN3420/sai.profile
index 9b50bab67..a30106c86 100644
--- a/device/mellanox/x86_64-mlnx_msn3420-r0/ACS-MSN3420/sai.profile
+++ b/device/mellanox/x86_64-mlnx_msn3420-r0/ACS-MSN3420/sai.profile
@@ -1,4 +1 @@
 SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_3420.xml
-SAI_DUMP_STORE_PATH=/var/log/mellanox/sdk-dumps
-SAI_DUMP_STORE_AMOUNT=10
-SAI_DUMP_MFT_CFG_PATH=/etc/mft/fwtrace_cfg
diff --git a/device/mellanox/x86_64-mlnx_msn3700-r0/ACS-MSN3700/sai.profile b/device/mellanox/x86_64-mlnx_msn3700-r0/ACS-MSN3700/sai.profile
index a040416bf..4907e971a 100644
--- a/device/mellanox/x86_64-mlnx_msn3700-r0/ACS-MSN3700/sai.profile
+++ b/device/mellanox/x86_64-mlnx_msn3700-r0/ACS-MSN3700/sai.profile
@@ -1,4 +1 @@
 SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_3700.xml
-SAI_DUMP_STORE_PATH=/var/log/mellanox/sdk-dumps
-SAI_DUMP_STORE_AMOUNT=10
-SAI_DUMP_MFT_CFG_PATH=/etc/mft/fwtrace_cfg
diff --git a/device/mellanox/x86_64-mlnx_msn3700c-r0/ACS-MSN3700C/sai.profile b/device/mellanox/x86_64-mlnx_msn3700c-r0/ACS-MSN3700C/sai.profile
index 1b1b4bbe2..46750fb2e 100644
--- a/device/mellanox/x86_64-mlnx_msn3700c-r0/ACS-MSN3700C/sai.profile
+++ b/device/mellanox/x86_64-mlnx_msn3700c-r0/ACS-MSN3700C/sai.profile
@@ -1,4 +1 @@
 SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_3700c.xml
-SAI_DUMP_STORE_PATH=/var/log/mellanox/sdk-dumps
-SAI_DUMP_STORE_AMOUNT=10
-SAI_DUMP_MFT_CFG_PATH=/etc/mft/fwtrace_cfg
diff --git a/device/mellanox/x86_64-mlnx_msn3800-r0/ACS-MSN3800/sai.profile b/device/mellanox/x86_64-mlnx_msn3800-r0/ACS-MSN3800/sai.profile
index 5fe089467..367f6c4e9 100644
--- a/device/mellanox/x86_64-mlnx_msn3800-r0/ACS-MSN3800/sai.profile
+++ b/device/mellanox/x86_64-mlnx_msn3800-r0/ACS-MSN3800/sai.profile
@@ -1,4 +1 @@
 SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_3800.xml
-SAI_DUMP_STORE_PATH=/var/log/mellanox/sdk-dumps
-SAI_DUMP_STORE_AMOUNT=10
-SAI_DUMP_MFT_CFG_PATH=/etc/mft/fwtrace_cfg
diff --git a/device/mellanox/x86_64-mlnx_msn3800-r0/Mellanox-SN3800-C64/sai.profile b/device/mellanox/x86_64-mlnx_msn3800-r0/Mellanox-SN3800-C64/sai.profile
index 7b27b5a2b..011612d97 100644
--- a/device/mellanox/x86_64-mlnx_msn3800-r0/Mellanox-SN3800-C64/sai.profile
+++ b/device/mellanox/x86_64-mlnx_msn3800-r0/Mellanox-SN3800-C64/sai.profile
@@ -1,5 +1,2 @@
 SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_3800.xml
-SAI_DUMP_STORE_PATH=/var/log/mellanox/sdk-dumps
-SAI_DUMP_STORE_AMOUNT=10
-SAI_DUMP_MFT_CFG_PATH=/etc/mft/fwtrace_cfg
 SAI_DEFAULT_SWITCHING_MODE_STORE_FORWARD=1
diff --git a/device/mellanox/x86_64-mlnx_msn3800-r0/Mellanox-SN3800-D100C12S2/sai.profile b/device/mellanox/x86_64-mlnx_msn3800-r0/Mellanox-SN3800-D100C12S2/sai.profile
index 92fb9921f..a0d219afc 100644
--- a/device/mellanox/x86_64-mlnx_msn3800-r0/Mellanox-SN3800-D100C12S2/sai.profile
+++ b/device/mellanox/x86_64-mlnx_msn3800-r0/Mellanox-SN3800-D100C12S2/sai.profile
@@ -1,5 +1,2 @@
 SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_3800_2x10g_100x50g_12x100g.xml
-SAI_DUMP_STORE_PATH=/var/log/mellanox/sdk-dumps
-SAI_DUMP_STORE_AMOUNT=10
-SAI_DUMP_MFT_CFG_PATH=/etc/mft/fwtrace_cfg
 SAI_DEFAULT_SWITCHING_MODE_STORE_FORWARD=1
diff --git a/device/mellanox/x86_64-mlnx_msn3800-r0/Mellanox-SN3800-D112C8/sai.profile b/device/mellanox/x86_64-mlnx_msn3800-r0/Mellanox-SN3800-D112C8/sai.profile
index 90534ae58..eba550e54 100644
--- a/device/mellanox/x86_64-mlnx_msn3800-r0/Mellanox-SN3800-D112C8/sai.profile
+++ b/device/mellanox/x86_64-mlnx_msn3800-r0/Mellanox-SN3800-D112C8/sai.profile
@@ -1,5 +1,2 @@
 SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_3800_112x50g_8x100g.xml
-SAI_DUMP_STORE_PATH=/var/log/mellanox/sdk-dumps
-SAI_DUMP_STORE_AMOUNT=10
-SAI_DUMP_MFT_CFG_PATH=/etc/mft/fwtrace_cfg
 SAI_DEFAULT_SWITCHING_MODE_STORE_FORWARD=1
diff --git a/device/mellanox/x86_64-mlnx_msn3800-r0/Mellanox-SN3800-D24C52/sai.profile b/device/mellanox/x86_64-mlnx_msn3800-r0/Mellanox-SN3800-D24C52/sai.profile
index f00701cde..f7d985529 100644
--- a/device/mellanox/x86_64-mlnx_msn3800-r0/Mellanox-SN3800-D24C52/sai.profile
+++ b/device/mellanox/x86_64-mlnx_msn3800-r0/Mellanox-SN3800-D24C52/sai.profile
@@ -1,5 +1,2 @@
 SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_3800_24x50g_52x100g.xml
-SAI_DUMP_STORE_PATH=/var/log/mellanox/sdk-dumps
-SAI_DUMP_STORE_AMOUNT=10
-SAI_DUMP_MFT_CFG_PATH=/etc/mft/fwtrace_cfg
 SAI_DEFAULT_SWITCHING_MODE_STORE_FORWARD=1
diff --git a/device/mellanox/x86_64-mlnx_msn3800-r0/Mellanox-SN3800-D28C49S1/sai.profile b/device/mellanox/x86_64-mlnx_msn3800-r0/Mellanox-SN3800-D28C49S1/sai.profile
index e90f26e77..1ad374639 100644
--- a/device/mellanox/x86_64-mlnx_msn3800-r0/Mellanox-SN3800-D28C49S1/sai.profile
+++ b/device/mellanox/x86_64-mlnx_msn3800-r0/Mellanox-SN3800-D28C49S1/sai.profile
@@ -1,5 +1,2 @@
 SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_3800_1x10g_28x50g_49x100g.xml
-SAI_DUMP_STORE_PATH=/var/log/mellanox/sdk-dumps
-SAI_DUMP_STORE_AMOUNT=10
-SAI_DUMP_MFT_CFG_PATH=/etc/mft/fwtrace_cfg
 SAI_DEFAULT_SWITCHING_MODE_STORE_FORWARD=1
diff --git a/device/mellanox/x86_64-mlnx_msn3800-r0/Mellanox-SN3800-D28C50/sai.profile b/device/mellanox/x86_64-mlnx_msn3800-r0/Mellanox-SN3800-D28C50/sai.profile
index 3b36aff31..0e989e17c 100644
--- a/device/mellanox/x86_64-mlnx_msn3800-r0/Mellanox-SN3800-D28C50/sai.profile
+++ b/device/mellanox/x86_64-mlnx_msn3800-r0/Mellanox-SN3800-D28C50/sai.profile
@@ -1,5 +1,2 @@
 SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_3800_28x50g_52x100g.xml
-SAI_DUMP_STORE_PATH=/var/log/mellanox/sdk-dumps
-SAI_DUMP_STORE_AMOUNT=10
-SAI_DUMP_MFT_CFG_PATH=/etc/mft/fwtrace_cfg
 SAI_DEFAULT_SWITCHING_MODE_STORE_FORWARD=1
diff --git a/device/mellanox/x86_64-mlnx_msn4410-r0/ACS-MSN4410/sai.profile b/device/mellanox/x86_64-mlnx_msn4410-r0/ACS-MSN4410/sai.profile
index 09cacbed0..be729cb4e 100644
--- a/device/mellanox/x86_64-mlnx_msn4410-r0/ACS-MSN4410/sai.profile
+++ b/device/mellanox/x86_64-mlnx_msn4410-r0/ACS-MSN4410/sai.profile
@@ -1,4 +1 @@
 SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_4410.xml
-SAI_DUMP_STORE_PATH=/var/log/mellanox/sdk-dumps
-SAI_DUMP_STORE_AMOUNT=10
-SAI_DUMP_MFT_CFG_PATH=/etc/mft/fwtrace_cfg
diff --git a/device/mellanox/x86_64-mlnx_msn4600-r0/ACS-MSN4600/sai.profile b/device/mellanox/x86_64-mlnx_msn4600-r0/ACS-MSN4600/sai.profile
index f9d517245..8d18361c1 100644
--- a/device/mellanox/x86_64-mlnx_msn4600-r0/ACS-MSN4600/sai.profile
+++ b/device/mellanox/x86_64-mlnx_msn4600-r0/ACS-MSN4600/sai.profile
@@ -1,4 +1 @@
 SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_4600.xml
-SAI_DUMP_STORE_PATH=/var/log/mellanox/sdk-dumps
-SAI_DUMP_STORE_AMOUNT=10
-SAI_DUMP_MFT_CFG_PATH=/etc/mft/fwtrace_cfg
diff --git a/device/mellanox/x86_64-mlnx_msn4600c-r0/ACS-MSN4600C/sai.profile b/device/mellanox/x86_64-mlnx_msn4600c-r0/ACS-MSN4600C/sai.profile
index 6dfcaf49b..e9d1e3e5f 100644
--- a/device/mellanox/x86_64-mlnx_msn4600c-r0/ACS-MSN4600C/sai.profile
+++ b/device/mellanox/x86_64-mlnx_msn4600c-r0/ACS-MSN4600C/sai.profile
@@ -1,4 +1 @@
 SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_4600C.xml
-SAI_DUMP_STORE_PATH=/var/log/mellanox/sdk-dumps
-SAI_DUMP_STORE_AMOUNT=10
-SAI_DUMP_MFT_CFG_PATH=/etc/mft/fwtrace_cfg
diff --git a/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-C64/sai.profile b/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-C64/sai.profile
index 8bf256a6a..3324d5b4b 100644
--- a/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-C64/sai.profile
+++ b/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-C64/sai.profile
@@ -1,5 +1,2 @@
 SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_4600C.xml
-SAI_DUMP_STORE_PATH=/var/log/mellanox/sdk-dumps
-SAI_DUMP_STORE_AMOUNT=10
-SAI_DUMP_MFT_CFG_PATH=/etc/mft/fwtrace_cfg
 SAI_DEFAULT_SWITCHING_MODE_STORE_FORWARD=1
diff --git a/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D100C12S2/sai.profile b/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D100C12S2/sai.profile
index ac24ca45f..acf46cd35 100644
--- a/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D100C12S2/sai.profile
+++ b/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D100C12S2/sai.profile
@@ -1,5 +1,2 @@
 SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_4600c_100x50g_12x100g_2x10g.xml
-SAI_DUMP_STORE_PATH=/var/log/mellanox/sdk-dumps
-SAI_DUMP_STORE_AMOUNT=10
-SAI_DUMP_MFT_CFG_PATH=/etc/mft/fwtrace_cfg
 SAI_DEFAULT_SWITCHING_MODE_STORE_FORWARD=1
diff --git a/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D112C8/sai.profile b/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D112C8/sai.profile
index 6c8656b90..cbe1b241b 100644
--- a/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D112C8/sai.profile
+++ b/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D112C8/sai.profile
@@ -1,5 +1,2 @@
 SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_4600c_112x50g_8x100g.xml
-SAI_DUMP_STORE_PATH=/var/log/mellanox/sdk-dumps
-SAI_DUMP_STORE_AMOUNT=10
-SAI_DUMP_MFT_CFG_PATH=/etc/mft/fwtrace_cfg
 SAI_DEFAULT_SWITCHING_MODE_STORE_FORWARD=1
diff --git a/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D48C40/sai.profile b/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D48C40/sai.profile
index f8174ebe6..5d63094db 100644
--- a/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D48C40/sai.profile
+++ b/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D48C40/sai.profile
@@ -1,5 +1,2 @@
 SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_4600c_48x50g_40x100g.xml
-SAI_DUMP_STORE_PATH=/var/log/mellanox/sdk-dumps
-SAI_DUMP_STORE_AMOUNT=10
-SAI_DUMP_MFT_CFG_PATH=/etc/mft/fwtrace_cfg
 SAI_DEFAULT_SWITCHING_MODE_STORE_FORWARD=1
diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/ACS-MSN4700/sai.profile b/device/mellanox/x86_64-mlnx_msn4700-r0/ACS-MSN4700/sai.profile
index 8c76d4ca1..d145093ca 100644
--- a/device/mellanox/x86_64-mlnx_msn4700-r0/ACS-MSN4700/sai.profile
+++ b/device/mellanox/x86_64-mlnx_msn4700-r0/ACS-MSN4700/sai.profile
@@ -1,4 +1 @@
 SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_4700.xml
-SAI_DUMP_STORE_PATH=/var/log/mellanox/sdk-dumps
-SAI_DUMP_STORE_AMOUNT=10
-SAI_DUMP_MFT_CFG_PATH=/etc/mft/fwtrace_cfg
diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-A96C8V8/sai.profile b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-A96C8V8/sai.profile
index b90eb55a9..a1542c6e1 100644
--- a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-A96C8V8/sai.profile
+++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-A96C8V8/sai.profile
@@ -1,4 +1 @@
 SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_4700_8x200g_8x100g_96x25g.xml
-SAI_DUMP_STORE_PATH=/var/log/mellanox/sdk-dumps
-SAI_DUMP_STORE_AMOUNT=10
-SAI_DUMP_MFT_CFG_PATH=/etc/sonic/mft/fwtrace_cfg
diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-C128/sai.profile b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-C128/sai.profile
index cd04cc332..ad1011267 100644
--- a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-C128/sai.profile
+++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-C128/sai.profile
@@ -1,4 +1 @@
 SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_4700_128x100g.xml
-SAI_DUMP_STORE_PATH=/var/log/mellanox/sdk-dumps
-SAI_DUMP_STORE_AMOUNT=10
-SAI_DUMP_MFT_CFG_PATH=/etc/sonic/mft/fwtrace_cfg
diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/sai.profile b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/sai.profile
index fddba40b2..e246cad50 100644
--- a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/sai.profile
+++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/sai.profile
@@ -1,4 +1,2 @@
 SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_4700.xml
-SAI_DUMP_STORE_PATH=/var/log/mellanox/sdk-dumps
-SAI_DUMP_STORE_AMOUNT=10
 SAI_DEFAULT_SWITCHING_MODE_STORE_FORWARD=1
diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/sai.profile b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/sai.profile
index 42f665d76..8238fae60 100644
--- a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/sai.profile
+++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/sai.profile
@@ -1,5 +1,2 @@
 SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_4700_8x400g_48x100g.xml
-SAI_DUMP_STORE_PATH=/var/log/mellanox/sdk-dumps
-SAI_DUMP_STORE_AMOUNT=10
-SAI_DUMP_MFT_CFG_PATH=/etc/sonic/mft/fwtrace_cfg
 SAI_DEFAULT_SWITCHING_MODE_STORE_FORWARD=1
diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/sai.profile b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/sai.profile
index e0109ecf2..0570470af 100644
--- a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/sai.profile
+++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/sai.profile
@@ -1,5 +1,2 @@
 SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_4700_8x400g_48x200g.xml
-SAI_DUMP_STORE_PATH=/var/log/mellanox/sdk-dumps
-SAI_DUMP_STORE_AMOUNT=10
-SAI_DUMP_MFT_CFG_PATH=/etc/sonic/mft/fwtrace_cfg
 SAI_DEFAULT_SWITCHING_MODE_STORE_FORWARD=1
diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V48C32/sai.profile b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V48C32/sai.profile
index 27e1cdad3..5a780a8cc 100644
--- a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V48C32/sai.profile
+++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V48C32/sai.profile
@@ -1,4 +1 @@
 SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_4700_32x100g_48x200g.xml
-SAI_DUMP_STORE_PATH=/var/log/mellanox/sdk-dumps
-SAI_DUMP_STORE_AMOUNT=10
-SAI_DUMP_MFT_CFG_PATH=/etc/sonic/mft/fwtrace_cfg
diff --git a/device/mellanox/x86_64-nvidia_sn2201-r0/ACS-SN2201/sai.profile b/device/mellanox/x86_64-nvidia_sn2201-r0/ACS-SN2201/sai.profile
index 692ad368d..21a54436b 100644
--- a/device/mellanox/x86_64-nvidia_sn2201-r0/ACS-SN2201/sai.profile
+++ b/device/mellanox/x86_64-nvidia_sn2201-r0/ACS-SN2201/sai.profile
@@ -1,3 +1 @@
 SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_2201.xml
-SAI_DUMP_STORE_PATH=/var/log/mellanox/sdk-dumps
-SAI_DUMP_STORE_AMOUNT=10
diff --git a/device/mellanox/x86_64-nvidia_sn4800-r0/ACS-SN4800/sai.profile b/device/mellanox/x86_64-nvidia_sn4800-r0/ACS-SN4800/sai.profile
index 2ce406ef0..3a8824058 100644
--- a/device/mellanox/x86_64-nvidia_sn4800-r0/ACS-SN4800/sai.profile
+++ b/device/mellanox/x86_64-nvidia_sn4800-r0/ACS-SN4800/sai.profile
@@ -1,4 +1 @@
 SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_4800.xml
-SAI_DUMP_STORE_PATH=/var/log/mellanox/sdk-dumps
-SAI_DUMP_STORE_AMOUNT=10
-SAI_DUMP_MFT_CFG_PATH=/etc/mft/fwtrace_cfg
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/ACS-SN5600/sai.profile b/device/mellanox/x86_64-nvidia_sn5600-r0/ACS-SN5600/sai.profile
index b37ca8c3e..ace2d70a8 100644
--- a/device/mellanox/x86_64-nvidia_sn5600-r0/ACS-SN5600/sai.profile
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/ACS-SN5600/sai.profile
@@ -1,3 +1 @@
 SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_5600.xml
-SAI_DUMP_STORE_PATH=/var/log/mellanox/sdk-dumps
-SAI_DUMP_STORE_AMOUNT=10
diff --git a/device/mellanox/x86_64-nvidia_sn5600_simx-r0/ACS-SN5600/sai.profile b/device/mellanox/x86_64-nvidia_sn5600_simx-r0/ACS-SN5600/sai.profile
index b37ca8c3e..ace2d70a8 100644
--- a/device/mellanox/x86_64-nvidia_sn5600_simx-r0/ACS-SN5600/sai.profile
+++ b/device/mellanox/x86_64-nvidia_sn5600_simx-r0/ACS-SN5600/sai.profile
@@ -1,3 +1 @@
 SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_5600.xml
-SAI_DUMP_STORE_PATH=/var/log/mellanox/sdk-dumps
-SAI_DUMP_STORE_AMOUNT=10
diff --git a/platform/mellanox/docker-syncd-mlnx/Dockerfile.j2 b/platform/mellanox/docker-syncd-mlnx/Dockerfile.j2
index dbd51e278..bdc51abca 100755
--- a/platform/mellanox/docker-syncd-mlnx/Dockerfile.j2
+++ b/platform/mellanox/docker-syncd-mlnx/Dockerfile.j2
@@ -66,6 +66,9 @@ COPY ["files/supervisor-proc-exit-listener", "/usr/bin"]
 COPY ["critical_processes", "/etc/supervisor/"]
 COPY ["platform_syncd_dump.sh", "/usr/bin/"]
 
+RUN mkdir -p /etc/mlnx/
+COPY ["sai-common.profile", "/etc/mlnx/"]
+
 RUN mkdir -p /etc/supervisor/conf.d/
 RUN sonic-cfggen -a "{\"ENABLE_ASAN\":\"{{ENABLE_ASAN}}\"}" -t /usr/share/sonic/templates/supervisord.conf.j2 > /etc/supervisor/conf.d/supervisord.conf
 RUN rm -f /usr/share/sonic/templates/supervisord.conf.j2
diff --git a/platform/mellanox/docker-syncd-mlnx/sai-common.profile b/platform/mellanox/docker-syncd-mlnx/sai-common.profile
new file mode 100644
index 000000000..3b9e6fe00
--- /dev/null
+++ b/platform/mellanox/docker-syncd-mlnx/sai-common.profile
@@ -0,0 +1,2 @@
+SAI_DUMP_STORE_PATH=/var/log/mellanox/sdk-dumps
+SAI_DUMP_STORE_AMOUNT=10

From a4e7d065da671a5cddd21305a1fcd7a949c91849 Mon Sep 17 00:00:00 2001
From: Pavan Naregundi <92989231+pavannaregundi@users.noreply.github.com>
Date: Thu, 29 Feb 2024 01:13:48 +0530
Subject: [PATCH 0284/1115] [Marvell-arm64] Update sonic-platform submodule
 (#17717)

Signed-off-by: Pavan Naregundi <pnaregundi@marvell.com>
---
 platform/marvell-arm64/sonic-platform-marvell | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/platform/marvell-arm64/sonic-platform-marvell b/platform/marvell-arm64/sonic-platform-marvell
index c108e5e38..f6b5e6cc8 160000
--- a/platform/marvell-arm64/sonic-platform-marvell
+++ b/platform/marvell-arm64/sonic-platform-marvell
@@ -1 +1 @@
-Subproject commit c108e5e38e65d4d44520c52079a95a0a9262d6cc
+Subproject commit f6b5e6cc8f382275e9d1647321ecd27e87038b90

From 4e1c38a3fe00ce1a22c942b0d4b95d467d8b96a9 Mon Sep 17 00:00:00 2001
From: Ze Gan <ganze718@gmail.com>
Date: Thu, 29 Feb 2024 14:23:03 +0800
Subject: [PATCH 0285/1115] [sonic-dash-api]: Fix wrong path in
 sonic-dash-api.dep (#18206)

In some local buildings, an error /bin/bash: line 0: cd: src/sonic-dash-api/sonic-dash-api: No such file or directory will be raised due to the directory structure of sonic-dash-api has been changed.

Signed-off-by: Ze Gan <ganze718@gmail.com>
---
 rules/sonic-dash-api.dep | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/rules/sonic-dash-api.dep b/rules/sonic-dash-api.dep
index 6d4ffcad8..64e23961d 100644
--- a/rules/sonic-dash-api.dep
+++ b/rules/sonic-dash-api.dep
@@ -3,7 +3,7 @@ SPATH       := $($(LIB_SONIC_DASH_API)_SRC_PATH)
 DEP_FILES   := $(SONIC_COMMON_FILES_LIST) rules/sonic-dash-api.mk rules/sonic-dash-api.dep   
 DEP_FILES   += $(SONIC_COMMON_BASE_FILES_LIST)
 DEP_FILES   += $(shell git ls-files $(SPATH) | grep -v sonic-dash-api)
-SMDEP_FILES := $(addprefix $(SPATH)/sonic-dash-api/,$(shell cd $(SPATH)/sonic-dash-api && git ls-files))
+SMDEP_FILES := $(addprefix $(SPATH)/,$(shell cd $(SPATH)/ && git ls-files))
 
 $(LIB_SONIC_DASH_API)_CACHE_MODE  := GIT_CONTENT_SHA 
 $(LIB_SONIC_DASH_API)_DEP_FLAGS   := $(SONIC_COMMON_FLAGS_LIST)

From 881ceb7034a204414deed61018ecd9ae945662a4 Mon Sep 17 00:00:00 2001
From: Kebo Liu <kebol@nvidia.com>
Date: Thu, 29 Feb 2024 21:46:49 +0800
Subject: [PATCH 0286/1115] [Mellanox] Extend the time to wait for EEPROM VPD
 file creation (#18146)

- Why I did it
The creation of system EEPROM VPD file "/var/run/hw-management/eeprom/vpd_info" is triggered by the udev event during the system boot up, in case the CPU is busy during the bootup, the udev event handling can be delayed, and need to wait for some more time for the file creation.

- How I did it
Extend the waiting time from 10s to 20s to overcome some extreme case.

- How to verify it
continuously run reboot case and verify whether still can see error msg "ERR decode-syseeprom: Nowhere to read syseeprom from! No symlink found"

Signed-off-by: Kebo Liu <kebol@nvidia.com>
---
 platform/mellanox/mlnx-platform-api/sonic_platform/eeprom.py | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/eeprom.py b/platform/mellanox/mlnx-platform-api/sonic_platform/eeprom.py
index 2767a24d3..8a2aa058c 100644
--- a/platform/mellanox/mlnx-platform-api/sonic_platform/eeprom.py
+++ b/platform/mellanox/mlnx-platform-api/sonic_platform/eeprom.py
@@ -1,5 +1,5 @@
 #
-# Copyright (c) 2019-2023 NVIDIA CORPORATION & AFFILIATES.
+# Copyright (c) 2019-2024 NVIDIA CORPORATION & AFFILIATES.
 # Apache-2.0
 #
 # Licensed under the Apache License, Version 2.0 (the "License");
@@ -51,7 +51,7 @@
             os.makedirs(os.path.dirname(EEPROM_SYMLINK))
         subprocess.check_call(['/usr/bin/xxd', '-r', '-p', 'syseeprom.hex', EEPROM_SYMLINK], cwd=platform_path)
 
-WAIT_EEPROM_READY_SEC = 10
+WAIT_EEPROM_READY_SEC = 20
 
 
 class Eeprom(eeprom_tlvinfo.TlvInfoDecoder):

From f30936d1e83f77e769d19b8dad3d25969553b40a Mon Sep 17 00:00:00 2001
From: Stepan Blyshchak <38952541+stepanblyschak@users.noreply.github.com>
Date: Thu, 29 Feb 2024 15:59:36 +0200
Subject: [PATCH 0287/1115] [systemd-sonic-generator] Fix handling service
 files with additional fields under [Install] section (#17764)

If encountered a line without RequiredBy or WantedBy the code passes uninitialized pointer to get_install_targets_from_line(). Where it can fail with segfault or silently pass randomly.

- Why I did it
Uninitialized target_suffix is passed to get_install_targets_from_line() when other fields are present in [Install] section, like this:

root@sonic:/home/admin# systemctl cat ntpsec
...
[Install]
Alias=ntp.service
Alias=ntpd.service
WantedBy=multi-user.target

- How I did it
Initialize target_suffix with NULL, put an assert in get_install_targets_from_line(). Edited test to cover this scenario.

- How to verify it
UT and on the switch.

Signed-off-by: Stepan Blyschak <stepanb@nvidia.com>
---
 src/systemd-sonic-generator/systemd-sonic-generator.c    | 7 ++++++-
 src/systemd-sonic-generator/tests/testfiles/test.service | 1 +
 2 files changed, 7 insertions(+), 1 deletion(-)

diff --git a/src/systemd-sonic-generator/systemd-sonic-generator.c b/src/systemd-sonic-generator/systemd-sonic-generator.c
index 1d1a53dbc..d9bb75fea 100644
--- a/src/systemd-sonic-generator/systemd-sonic-generator.c
+++ b/src/systemd-sonic-generator/systemd-sonic-generator.c
@@ -141,6 +141,9 @@ static int get_install_targets_from_line(char* target_string, char* install_type
     char final_target[PATH_MAX];
     int num_targets = 0;
 
+    assert(target_string);
+    assert(install_type);
+
     while ((token = strtok_r(target_string, " ", &target_string))) {
         if (num_targets + existing_targets >= MAX_NUM_TARGETS) {
             fputs("Number of targets found exceeds MAX_NUM_TARGETS\n", stderr);
@@ -269,7 +272,7 @@ int get_install_targets(char* unit_file, char* targets[]) {
     char* token;
     char* line = NULL;
     bool first;
-    char* target_suffix;
+    char* target_suffix = NULL;
     char *instance_name;
     char *dot_ptr;
 
@@ -306,6 +309,8 @@ int get_install_targets(char* unit_file, char* targets[]) {
                 }
                 else if (strstr(token, "WantedBy") != NULL) {
                     target_suffix = ".wants";
+                } else {
+                    break;
                 }
             }
             else {
diff --git a/src/systemd-sonic-generator/tests/testfiles/test.service b/src/systemd-sonic-generator/tests/testfiles/test.service
index e8b37f641..ebc8b1f8d 100644
--- a/src/systemd-sonic-generator/tests/testfiles/test.service
+++ b/src/systemd-sonic-generator/tests/testfiles/test.service
@@ -7,4 +7,5 @@ Type=oneshot
 RemainAfterExit=yes
 ExecStart=/usr/bin/test.sh start
 [Install]
+Alias=test.service
 WantedBy=multi-user.target

From 744a152685c30e74f70992f7aa3ed9c26304e46f Mon Sep 17 00:00:00 2001
From: Tomer Shalvi <116184476+tshalvi@users.noreply.github.com>
Date: Thu, 29 Feb 2024 16:07:10 +0200
Subject: [PATCH 0288/1115] [Mellanox] Adding a new field to CONFIG DB:
 "subport" (#18204)

- Why I did it
The field 'subport' represents the index of the split port within a physical port. For example, if a port is split into 4, the subport of the first logical port is 1, the subport of the second logical port is 2, and so on.
In xcvrd, the CMIS manager uses the subport to calculate the lane mask, which is used to control the data path per lane. In Nvidia platform, the subport is missing and is always set to 0. According to the xcvrd code, when subport=0, it will always correspond to the first logical port. Therefore, if we shut down any logical port that is not the first one, we will see the operational status of the first logical port also becomes down.
This PR aims to add the subport field to CONFIG DB and prevent such scenarios. This is applicable only for static default breakout mode. For DPB, subport calculation will happen on the fly (changes are not in Sonic yet).
(Subport HLD: HLD of subport: [link to the HLD document])

- How I did it
I have added the 'subport' field to all relevant Nvidia hwsku.json files (minigraph generation is based on them). Additionally, I introduced the new 'subport' field to portconfig.py, so that sonic-cfggen will be able to generate the minigraph with it. In this file, I also fixed an error that caused all attributes from hwsku.json to be applied only to the first logical ports associated with a physical port.
Furthermore, I updated hwsku_json_checker to include the new field and applied a fix to the sample_hwsku.json file. sample_hwsku.json is the file that sonic-config-engine's unit tests rely on for its tests. Previously, it only included attributes for the first logical port of a split physical port. For example, if Ethernet4, a 4-lane port, was split into 2 ports, then sample_hwsku.json included only the entry for Ethernet4, with no entry for Ethernet6. This misalignment with the structure of other hwsku.json files has been corrected as well.

- How to verify it
Ensure that each logical port has the correct value of 'subport' in CONFIG DB, and that shutting down a logical port affects only that port and not other ports in the split.
---
 .../Mellanox-SN4700-C128/hwsku.json           | 384 ++++++++++++------
 .../Mellanox-SN4700-O28/hwsku.json            |  96 +++--
 .../Mellanox-SN4700-O8C48/hwsku.json          | 168 +++++---
 .../Mellanox-SN4700-O8V48/hwsku.json          | 168 +++++---
 .../Mellanox-SN4700-V48C32/hwsku.json         | 240 +++++++----
 src/sonic-config-engine/portconfig.py         |   9 +-
 .../tests/sample_hwsku.json                   | 163 ++++++++
 .../tests/hwsku_json_checker                  |   2 +-
 8 files changed, 873 insertions(+), 357 deletions(-)

diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-C128/hwsku.json b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-C128/hwsku.json
index 867637000..2692ca30c 100644
--- a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-C128/hwsku.json
+++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-C128/hwsku.json
@@ -1,388 +1,516 @@
 {
     "interfaces": {
         "Ethernet0": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet2": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet4": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "3"
         },
         "Ethernet6": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "4"
         },
         "Ethernet8": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet10": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet12": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "3"
         },
         "Ethernet14": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "4"
         },
         "Ethernet16": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet18": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet20": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "3"
         },
         "Ethernet22": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "4"
         },
         "Ethernet24": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet26": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet28": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "3"
         },
         "Ethernet30": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "4"
         },
         "Ethernet32": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet34": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet36": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "3"
         },
         "Ethernet38": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "4"
         },
         "Ethernet40": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet42": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet44": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "3"
         },
         "Ethernet46": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "4"
         },
         "Ethernet48": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet50": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet52": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "3"
         },
         "Ethernet54": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "4"
         },
         "Ethernet56": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet58": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet60": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "3"
         },
         "Ethernet62": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "4"
         },
         "Ethernet64": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet66": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet68": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "3"
         },
         "Ethernet70": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "4"
         },
         "Ethernet72": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet74": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet76": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "3"
         },
         "Ethernet78": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "4"
         },
         "Ethernet80": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet82": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet84": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "3"
         },
         "Ethernet86": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "4"
         },
         "Ethernet88": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet90": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet92": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "3"
         },
         "Ethernet94": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "4"
         },
         "Ethernet96": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet98": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet100": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "3"
         },
         "Ethernet102": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "4"
         },
         "Ethernet104": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet106": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet108": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "3"
         },
         "Ethernet110": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "4"
         },
         "Ethernet112": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet114": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet116": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "3"
         },
         "Ethernet118": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "4"
         },
         "Ethernet120": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet122": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet124": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "3"
         },
         "Ethernet126": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "4"
         },
         "Ethernet128": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet130": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet132": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "3"
         },
         "Ethernet134": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "4"
         },
         "Ethernet136": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet138": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet140": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "3"
         },
         "Ethernet142": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "4"
         },
         "Ethernet144": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet146": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet148": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "3"
         },
         "Ethernet150": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "4"
         },
         "Ethernet152": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet154": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet156": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "3"
         },
         "Ethernet158": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "4"
         },
         "Ethernet160": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet162": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet164": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "3"
         },
         "Ethernet166": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "4"
         },
         "Ethernet168": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet170": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet172": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "3"
         },
         "Ethernet174": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "4"
         },
         "Ethernet176": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet178": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet180": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "3"
         },
         "Ethernet182": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "4"
         },
         "Ethernet184": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet186": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet188": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "3"
         },
         "Ethernet190": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "4"
         },
         "Ethernet192": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet194": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet196": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "3"
         },
         "Ethernet198": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "4"
         },
         "Ethernet200": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet202": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet204": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "3"
         },
         "Ethernet206": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "4"
         },
         "Ethernet208": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet210": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet212": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "3"
         },
         "Ethernet214": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "4"
         },
         "Ethernet216": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet218": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet220": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "3"
         },
         "Ethernet222": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "4"
         },
         "Ethernet224": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet226": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet228": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "3"
         },
         "Ethernet230": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "4"
         },
         "Ethernet232": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet234": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet236": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "3"
         },
         "Ethernet238": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "4"
         },
         "Ethernet240": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet242": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet244": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "3"
         },
         "Ethernet246": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "4"
         },
         "Ethernet248": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet250": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet252": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "3"
         },
         "Ethernet254": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "4"
         }
     }
 }
diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/hwsku.json b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/hwsku.json
index b9c07d3cd..86d6ec991 100644
--- a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/hwsku.json
+++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/hwsku.json
@@ -1,100 +1,132 @@
 {
     "interfaces": {
         "Ethernet0": {
-            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet8": {
-            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet16": {
-            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet24": {
-            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet32": {
-            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet40": {
-            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet48": {
-            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet56": {
-            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet64": {
-            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet72": {
-            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet80": {
-            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet88": {
-            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet96": {
-            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet104": {
-            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet112": {
-            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet120": {
-            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet128": {
-            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet136": {
-            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet144": {
-            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet152": {
-            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet160": {
-            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet168": {
-            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet176": {
-            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet184": {
-            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet192": {
-            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet200": {
-            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet208": {
-            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet216": {
-            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet224": {
-	    "default_brkout_mode": "1x200G[400G,100G,50G,40G,25G,10G,1G]"
+	     "default_brkout_mode": "1x200G[400G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet232": {
-	    "default_brkout_mode": "1x200G[400G,100G,50G,40G,25G,10G,1G]"
+	     "default_brkout_mode": "1x200G[400G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet240": {
-	    "default_brkout_mode": "1x200G[400G,100G,50G,40G,25G,10G,1G]"
+	     "default_brkout_mode": "1x200G[400G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet248": {
-	    "default_brkout_mode": "1x200G[400G,100G,50G,40G,25G,10G,1G]"
+	     "default_brkout_mode": "1x200G[400G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         }
     }
 }
diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/hwsku.json b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/hwsku.json
index eb3ad6bb9..d50fae23e 100644
--- a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/hwsku.json
+++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/hwsku.json
@@ -1,172 +1,228 @@
 {
     "interfaces": {
         "Ethernet0": {
-            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet4": {
-            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet8": {
-            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet12": {
-            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet16": {
-            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet20": {
-            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet24": {
-            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet28": {
-            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet32": {
-            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet36": {
-            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet40": {
-            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet44": {
-            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet48": {
-            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet52": {
-            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet56": {
-            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet60": {
-            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet64": {
-            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet68": {
-            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet72": {
-            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet76": {
-            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet80": {
-            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet84": {
-            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet88": {
-            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet92": {
-            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet96": {
-            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet104": {
-            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet112": {
-            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet120": {
-            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet128": {
-            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet136": {
-            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet144": {
-            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet152": {
-            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet160": {
-            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet164": {
-            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet168": {
-            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet172": {
-            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet176": {
-            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet180": {
-            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet184": {
-            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet188": {
-            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet192": {
-            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet196": {
-            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet200": {
-            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet204": {
-            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet208": {
-            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet212": {
-            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet216": {
-            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet220": {
-            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet224": {
-            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet228": {
-            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet232": {
-            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet236": {
-            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet240": {
-            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet244": {
-            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet248": {
-            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet252": {
-            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
+            "subport": "2"
         }
     }
 }
diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/hwsku.json b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/hwsku.json
index 62030cf19..3d51a36be 100644
--- a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/hwsku.json
+++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/hwsku.json
@@ -1,172 +1,228 @@
 {
     "interfaces": {
         "Ethernet0": {
-            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet4": {
-            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet8": {
-            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet12": {
-            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet16": {
-            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet20": {
-            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet24": {
-            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet28": {
-            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet32": {
-            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet36": {
-            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet40": {
-            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet44": {
-            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet48": {
-            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet52": {
-            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet56": {
-            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet60": {
-            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet64": {
-            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet68": {
-            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet72": {
-            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet76": {
-            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet80": {
-            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet84": {
-            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet88": {
-            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet92": {
-            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet96": {
-            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet104": {
-            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet112": {
-            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet120": {
-            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet128": {
-            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet136": {
-            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet144": {
-            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet152": {
-            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet160": {
-            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet164": {
-            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet168": {
-            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet172": {
-            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet176": {
-            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet180": {
-            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet184": {
-            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet188": {
-            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet192": {
-            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet196": {
-            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet200": {
-            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet204": {
-            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet208": {
-            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet212": {
-            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet216": {
-            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet220": {
-            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet224": {
-            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet228": {
-            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet232": {
-            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet236": {
-            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet240": {
-            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet244": {
-            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet248": {
-            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet252": {
-            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "2"
         }
     }
 }
diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V48C32/hwsku.json b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V48C32/hwsku.json
index 50d2faec2..4fef97820 100644
--- a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V48C32/hwsku.json
+++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V48C32/hwsku.json
@@ -1,244 +1,324 @@
 {
     "interfaces": {
         "Ethernet0": {
-            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet4": {
-            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet8": {
-            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet12": {
-            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet16": {
-            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet20": {
-            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet24": {
-            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet28": {
-            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet32": {
-            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet36": {
-            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet40": {
-            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet44": {
-            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet48": {
-            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet52": {
-            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet56": {
-            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet60": {
-            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet64": {
-            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet68": {
-            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet72": {
-            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet76": {
-            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet80": {
-            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet84": {
-            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet88": {
-            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet92": {
-            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet96": {
-            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet100": {
-            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet104": {
-            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet108": {
-            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet112": {
-            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet116": {
-            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet120": {
-            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet124": {
-            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet128": {
-            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet132": {
-            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet136": {
-            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet140": {
-            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet144": {
-            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet148": {
-            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet152": {
-            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet156": {
-            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet160": {
-            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet164": {
-            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet168": {
-            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet172": {
-            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet176": {
-            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet180": {
-            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet184": {
-            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet188": {
-            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]"
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet192": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet194": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet196": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "3"
         },
         "Ethernet198": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "4"
         },
         "Ethernet200": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet202": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet204": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "3"
         },
         "Ethernet206": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "4"
         },
         "Ethernet208": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet210": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet212": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "3"
         },
         "Ethernet214": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "4"
         },
         "Ethernet216": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet218": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet220": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "3"
         },
         "Ethernet222": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "4"
         },
         "Ethernet224": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet226": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet228": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "3"
         },
         "Ethernet230": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "4"
         },
         "Ethernet232": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet234": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet236": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "3"
         },
         "Ethernet238": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "4"
         },
         "Ethernet240": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet242": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet244": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "3"
         },
         "Ethernet246": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "4"
         },
         "Ethernet248": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "1"
         },
         "Ethernet250": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "2"
         },
         "Ethernet252": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "3"
         },
         "Ethernet254": {
-            "default_brkout_mode": "4x100G[50G,25G,10G,1G]"
+            "default_brkout_mode": "4x100G[50G,25G,10G,1G]",
+            "subport": "4"
         }
     }
 }
diff --git a/src/sonic-config-engine/portconfig.py b/src/sonic-config-engine/portconfig.py
index f1bb80460..81b3dfb8f 100644
--- a/src/sonic-config-engine/portconfig.py
+++ b/src/sonic-config-engine/portconfig.py
@@ -37,7 +37,7 @@
 BRKOUT_MODE = "default_brkout_mode"
 CUR_BRKOUT_MODE = "brkout_mode"
 INTF_KEY = "interfaces"
-OPTIONAL_HWSKU_ATTRIBUTES = ["fec", "autoneg"]
+OPTIONAL_HWSKU_ATTRIBUTES = ["fec", "autoneg", "subport"]
 
 BRKOUT_PATTERN = r'(\d{1,6})x(\d{1,6}G?)(\[(\d{1,6}G?,?)*\])?(\((\d{1,6})\))?'
 BRKOUT_PATTERN_GROUPS = 6
@@ -422,9 +422,10 @@ def parse_platform_json_file(hwsku_json_file, platform_json_file):
         child_ports = get_child_ports(intf, brkout_mode, platform_json_file)
 
         # take optional fields from hwsku.json
-        for key, item in hwsku_dict[INTF_KEY][intf].items():
-            if key in OPTIONAL_HWSKU_ATTRIBUTES:
-                child_ports.get(intf)[key] = item
+        for child_port in child_ports:
+            for key, item in hwsku_dict[INTF_KEY][child_port].items():
+                if key in OPTIONAL_HWSKU_ATTRIBUTES:
+                    child_ports.get(child_port)[key] = item
 
         ports.update(child_ports)
 
diff --git a/src/sonic-config-engine/tests/sample_hwsku.json b/src/sonic-config-engine/tests/sample_hwsku.json
index 697fb7b1c..3615cda26 100644
--- a/src/sonic-config-engine/tests/sample_hwsku.json
+++ b/src/sonic-config-engine/tests/sample_hwsku.json
@@ -6,96 +6,243 @@
         "Ethernet4": {
             "default_brkout_mode": "2x50G"
         },
+        "Ethernet6": {
+            "default_brkout_mode": "2x50G"
+        },
         "Ethernet8": {
             "default_brkout_mode": "4x25G[10G]"
         },
+        "Ethernet9": {
+            "default_brkout_mode": "4x25G[10G]"
+        },
+        "Ethernet10": {
+            "default_brkout_mode": "4x25G[10G]"
+        },
+        "Ethernet11": {
+            "default_brkout_mode": "4x25G[10G]"
+        },
         "Ethernet12": {
             "default_brkout_mode": "2x25G(2)+1x50G(2)"
         },
+        "Ethernet13": {
+            "default_brkout_mode": "2x25G(2)+1x50G(2)"
+        },
+        "Ethernet14": {
+            "default_brkout_mode": "2x25G(2)+1x50G(2)"
+        },
         "Ethernet16": {
             "default_brkout_mode": "1x50G(2)+2x25G(2)"
         },
+        "Ethernet18": {
+            "default_brkout_mode": "1x50G(2)+2x25G(2)"
+        },
+        "Ethernet19": {
+            "default_brkout_mode": "1x50G(2)+2x25G(2)"
+        },
         "Ethernet20": {
             "default_brkout_mode": "1x100G[40G]"
         },
         "Ethernet24": {
             "default_brkout_mode": "2x50G"
         },
+        "Ethernet26": {
+            "default_brkout_mode": "2x50G"
+        },
         "Ethernet28": {
             "default_brkout_mode": "4x25G[10G]"
         },
+        "Ethernet29": {
+            "default_brkout_mode": "4x25G[10G]"
+        },
+        "Ethernet30": {
+            "default_brkout_mode": "4x25G[10G]"
+        },
+        "Ethernet31": {
+            "default_brkout_mode": "4x25G[10G]"
+        },
         "Ethernet32": {
             "default_brkout_mode": "2x25G(2)+1x50G(2)"
         },
+        "Ethernet33": {
+            "default_brkout_mode": "2x25G(2)+1x50G(2)"
+        },
+        "Ethernet34": {
+            "default_brkout_mode": "2x25G(2)+1x50G(2)"
+        },
         "Ethernet36": {
             "default_brkout_mode": "1x50G(2)+2x25G(2)"
         },
+        "Ethernet38": {
+            "default_brkout_mode": "1x50G(2)+2x25G(2)"
+        },
+        "Ethernet39": {
+            "default_brkout_mode": "1x50G(2)+2x25G(2)"
+        },
         "Ethernet40": {
             "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]"
         },
         "Ethernet44": {
             "default_brkout_mode": "2x50G[40G,25G,10G,1G]"
         },
+        "Ethernet46": {
+            "default_brkout_mode": "2x50G[40G,25G,10G,1G]"
+        },
         "Ethernet48": {
             "default_brkout_mode": "4x25G[10G]"
         },
+        "Ethernet49": {
+            "default_brkout_mode": "4x25G[10G]"
+        },
+        "Ethernet50": {
+            "default_brkout_mode": "4x25G[10G]"
+        },
+        "Ethernet51": {
+            "default_brkout_mode": "4x25G[10G]"
+        },
         "Ethernet52": {
             "default_brkout_mode": "2x25G(2)+1x50G(2)"
         },
+        "Ethernet53": {
+            "default_brkout_mode": "2x25G(2)+1x50G(2)"
+        },
+        "Ethernet54": {
+            "default_brkout_mode": "2x25G(2)+1x50G(2)"
+        },
         "Ethernet56": {
             "default_brkout_mode": "1x50G(2)+2x25G(2)"
         },
+        "Ethernet58": {
+            "default_brkout_mode": "1x50G(2)+2x25G(2)"
+        },
+        "Ethernet59": {
+            "default_brkout_mode": "1x50G(2)+2x25G(2)"
+        },
         "Ethernet60": {
             "default_brkout_mode": "1x100G[40G]"
         },
         "Ethernet64": {
             "default_brkout_mode": "2x50G"
         },
+        "Ethernet66": {
+            "default_brkout_mode": "2x50G"
+        },
         "Ethernet68": {
             "default_brkout_mode": "4x25G[10G]"
         },
+        "Ethernet69": {
+            "default_brkout_mode": "4x25G[10G]"
+        },
+        "Ethernet70": {
+            "default_brkout_mode": "4x25G[10G]"
+        },
+        "Ethernet71": {
+            "default_brkout_mode": "4x25G[10G]"
+        },
         "Ethernet72": {
             "default_brkout_mode": "2x25G(2)+1x50G(2)"
         },
+        "Ethernet73": {
+            "default_brkout_mode": "2x25G(2)+1x50G(2)"
+        },
+        "Ethernet74": {
+            "default_brkout_mode": "2x25G(2)+1x50G(2)"
+        },
         "Ethernet76": {
             "default_brkout_mode": "1x50G(2)+2x25G(2)"
         },
+        "Ethernet78": {
+            "default_brkout_mode": "1x50G(2)+2x25G(2)"
+        },
+        "Ethernet79": {
+            "default_brkout_mode": "1x50G(2)+2x25G(2)"
+        },
         "Ethernet80": {
             "default_brkout_mode": "1x100G[40G]"
         },
         "Ethernet84": {
             "default_brkout_mode": "2x50G"
         },
+        "Ethernet86": {
+            "default_brkout_mode": "2x50G"
+        },
         "Ethernet88": {
             "default_brkout_mode": "4x25G[10G]"
         },
+        "Ethernet89": {
+            "default_brkout_mode": "4x25G[10G]"
+        },
+        "Ethernet90": {
+            "default_brkout_mode": "4x25G[10G]"
+        },
+        "Ethernet91": {
+            "default_brkout_mode": "4x25G[10G]"
+        },
         "Ethernet92": {
             "default_brkout_mode": "2x25G(2)+1x50G(2)"
         },
+        "Ethernet93": {
+            "default_brkout_mode": "2x25G(2)+1x50G(2)"
+        },
+        "Ethernet94": {
+            "default_brkout_mode": "2x25G(2)+1x50G(2)"
+        },
         "Ethernet96": {
             "default_brkout_mode": "1x50G(2)+2x25G(2)"
         },
+        "Ethernet98": {
+            "default_brkout_mode": "1x50G(2)+2x25G(2)"
+        },
+        "Ethernet99": {
+            "default_brkout_mode": "1x50G(2)+2x25G(2)"
+        },
         "Ethernet100": {
             "default_brkout_mode": "1x100G[40G]"
         },
         "Ethernet104": {
             "default_brkout_mode": "2x50G"
         },
+        "Ethernet106": {
+            "default_brkout_mode": "2x50G"
+        },
         "Ethernet108": {
             "default_brkout_mode": "4x25G[10G]"
         },
+        "Ethernet109": {
+            "default_brkout_mode": "4x25G[10G]"
+        },
+        "Ethernet110": {
+            "default_brkout_mode": "4x25G[10G]"
+        },
+        "Ethernet111": {
+            "default_brkout_mode": "4x25G[10G]"
+        },
         "Ethernet112": {
             "default_brkout_mode": "2x25G(2)+1x50G(2)"
         },
+        "Ethernet113": {
+            "default_brkout_mode": "2x25G(2)+1x50G(2)"
+        },
+        "Ethernet114": {
+            "default_brkout_mode": "2x25G(2)+1x50G(2)"
+        },
         "Ethernet116": {
             "default_brkout_mode": "1x50G(2)+2x25G(2)"
         },
+        "Ethernet118": {
+            "default_brkout_mode": "1x50G(2)+2x25G(2)"
+        },
+        "Ethernet119": {
+            "default_brkout_mode": "1x50G(2)+2x25G(2)"
+        },
         "Ethernet120": {
             "default_brkout_mode": "1x100G[40G]"
         },
         "Ethernet124": {
             "default_brkout_mode": "2x50G"
         },
+        "Ethernet126": {
+            "default_brkout_mode": "2x50G"
+        },
         "Ethernet128": {
             "default_brkout_mode": "1x40G[100G]"
         },
@@ -105,11 +252,27 @@
         "Ethernet136": {
             "default_brkout_mode": "4x10G[25G]"
         },
+        "Ethernet137": {
+            "default_brkout_mode": "4x10G[25G]"
+        },
+        "Ethernet138": {
+            "default_brkout_mode": "4x10G[25G]"
+        },
+        "Ethernet139": {
+            "default_brkout_mode": "4x10G[25G]"
+        },
         "Ethernet140": {
             "default_brkout_mode": "2x25G(2)+1x50000(2)"
         },
+        "Ethernet141": {
+            "default_brkout_mode": "2x25G(2)+1x50000(2)"
+        },
+        "Ethernet142": {
+            "default_brkout_mode": "2x25G(2)+1x50000(2)"
+        },
         "Ethernet144": {
             "default_brkout_mode": "1x100000[50G,40000,25G,10000]"
         }
     }
 }
+
diff --git a/src/sonic-device-data/tests/hwsku_json_checker b/src/sonic-device-data/tests/hwsku_json_checker
index ee15c6fb4..4abf62c15 100755
--- a/src/sonic-device-data/tests/hwsku_json_checker
+++ b/src/sonic-device-data/tests/hwsku_json_checker
@@ -7,7 +7,7 @@ import sys
 
 # Global variable
 PORT_ATTRIBUTES = ["default_brkout_mode"]
-OPTIONAL_PORT_ATTRIBUTES = ["fec", "autoneg", "port_type"]
+OPTIONAL_PORT_ATTRIBUTES = ["fec", "autoneg", "port_type", "subport"]
 PORT_REG = "Ethernet(\d+)"
 HWSKU_JSON = '*hwsku.json'
 INTF_KEY = "interfaces"

From 05160592113760ce0267d7d80a09547a234508a7 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Fri, 1 Mar 2024 19:01:09 +0800
Subject: [PATCH 0289/1115] [submodule] Update submodule sonic-utilities to the
 latest HEAD automatically (#18222)

#### Why I did it
src/sonic-utilities
```
* bf355960 - (HEAD -> master, origin/master, origin/HEAD) Add vlan validation in config interface ip add command (#3155) (24 hours ago) [Mati Alfaro]
* ba98c7f8 - CLI enhancements to revtrieve data from TRANSCEIVER_FIRMWARE_INFO table (#3177) (34 hours ago) [mihirpat1]
* aefb61bd - Modify transceiver PM CLI to handle N/A value for DOM threshold (#3174) (34 hours ago) [mihirpat1]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-utilities | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-utilities b/src/sonic-utilities
index 7670609a4..bf3559604 160000
--- a/src/sonic-utilities
+++ b/src/sonic-utilities
@@ -1 +1 @@
-Subproject commit 7670609a47e1419e5f3154866304f7578a02cd96
+Subproject commit bf3559604b2bcb027093e2d1afa68a8de8503c15

From aca3487d1335452f51f03e6f525605ad242b6f9d Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Fri, 1 Mar 2024 19:01:14 +0800
Subject: [PATCH 0290/1115] [submodule] Update submodule sonic-swss to the
 latest HEAD automatically (#18221)

#### Why I did it
src/sonic-swss
```
* 9c995f0c - (HEAD -> master, origin/master, origin/HEAD) [asan] Disable the "maybe-uninitialized" warning when compiled with ASAN enabled. (30 hours ago) [Oleksandr Ivantsiv]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-swss | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-swss b/src/sonic-swss
index 97c7f3edb..9c995f0c8 160000
--- a/src/sonic-swss
+++ b/src/sonic-swss
@@ -1 +1 @@
-Subproject commit 97c7f3edbfedddceaa3bbac04f9d56e9bcad558c
+Subproject commit 9c995f0c83892ae9a4f6657c1c4673164e803169

From fe0a277805d70cc00a6a7521045c1180a2f3b244 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Fri, 1 Mar 2024 19:01:20 +0800
Subject: [PATCH 0291/1115] [submodule] Update submodule sonic-sairedis to the
 latest HEAD automatically (#18220)

#### Why I did it
src/sonic-sairedis
```
* d770370 - (HEAD -> master, origin/master, origin/HEAD) [asan] Disable the "maybe-uninitialized" warning when compiled with ASAN enabled. (#1360) (30 hours ago) [Oleksandr Ivantsiv]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-sairedis | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-sairedis b/src/sonic-sairedis
index 09cd7f68d..d77037069 160000
--- a/src/sonic-sairedis
+++ b/src/sonic-sairedis
@@ -1 +1 @@
-Subproject commit 09cd7f68d7c36f436653f46964718a25f8ee1dc1
+Subproject commit d7703706917bcc0ea60edd78be9359ed87954cbc

From 0c4db5efda051cdc33f1f3588fedbe224182e6f4 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Fri, 1 Mar 2024 19:01:31 +0800
Subject: [PATCH 0292/1115] [submodule] Update submodule sonic-platform-daemons
 to the latest HEAD automatically (#18218)

#### Why I did it
src/sonic-platform-daemons
```
* b9e6ba5 - (HEAD -> master, origin/master, origin/HEAD) Updated supported CMIS module types in xcvrd to include new module for SPC4 (#440) (25 hours ago) [Tomer Shalvi]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-platform-daemons | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-platform-daemons b/src/sonic-platform-daemons
index 9141305c6..b9e6ba54c 160000
--- a/src/sonic-platform-daemons
+++ b/src/sonic-platform-daemons
@@ -1 +1 @@
-Subproject commit 9141305c636c93aa9b0d79549395ba4e9df66595
+Subproject commit b9e6ba54c8edf63256b01055561a2ded6858025c

From 05e51f4b8a04e7457397aa1d066237062cad10f9 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Fri, 1 Mar 2024 19:01:41 +0800
Subject: [PATCH 0293/1115] [submodule] Update submodule sonic-platform-common
 to the latest HEAD automatically (#18216)

#### Why I did it
src/sonic-platform-common
```
* 3d35404 - (HEAD -> master, origin/master, origin/HEAD) Certain VDM fields not populating after encountering KeyError on 400ZR optics (#442) (34 hours ago) [mihirpat1]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-platform-common | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-platform-common b/src/sonic-platform-common
index 796e89a82..3d354047c 160000
--- a/src/sonic-platform-common
+++ b/src/sonic-platform-common
@@ -1 +1 @@
-Subproject commit 796e89a8279681391ab8a125df9ed4e5eb0af126
+Subproject commit 3d354047c8f0b26228fcdf3d5bdceca1eebf5744

From c2aa77c438c42f04710ae636fa2fc96b49a2bb79 Mon Sep 17 00:00:00 2001
From: noaOrMlnx <58519608+noaOrMlnx@users.noreply.github.com>
Date: Mon, 4 Mar 2024 16:38:51 +0200
Subject: [PATCH 0294/1115] [Mellanox] Fix timing issue in lpmode change
 (#18223)

- Why I did it
Changing LPMODE timing is different between cables.
We want to add functionality to make sure LPMODE has changed.
For that, the wait_until utility is used and every 1 second (until timeout), it will check with lower-layers what is the current Lpmode.
Once it is the expected mode, set_lpmode() functino will return True.
If after seconds, Lpmode is still not in the expected mode, set_lpmode() function will return False.

- How I did it
Add use of wait_until function to make sure lpmode was changed.

- How to verify it
sfputil lpmode on
sfputil lpmode off
---
 .../mellanox/mlnx-platform-api/sonic_platform/sfp.py     | 9 +++++++--
 1 file changed, 7 insertions(+), 2 deletions(-)

diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py b/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py
index f6a9380bf..90462e9ed 100644
--- a/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py
+++ b/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py
@@ -1,5 +1,5 @@
 #
-# Copyright (c) 2019-2023 NVIDIA CORPORATION & AFFILIATES.
+# Copyright (c) 2019-2024 NVIDIA CORPORATION & AFFILIATES.
 # Apache-2.0
 #
 # Licensed under the Apache License, Version 2.0 (the "License");
@@ -640,7 +640,12 @@ def set_lpmode(self, lpmode):
                 if api.get_lpmode() == lpmode:
                     return True
                 api.set_lpmode(lpmode)
-                return api.get_lpmode() == lpmode
+                # check_lpmode is a lambda function which checks if current lpmode already updated to the desired lpmode
+                check_lpmode = lambda api, lpmode: api.get_lpmode() == lpmode
+                # utils.wait_until function will call check_lpmode function every 1 second for a total timeout of 2 seconds.
+                # If at some point get_lpmode=desired_lpmode, it will return true.
+                # If after timeout ends, lpmode will not be desired_lpmode, it will return false.
+                return utils.wait_until(check_lpmode, 2, 1, api=api, lpmode=lpmode)
             elif DeviceDataManager.is_independent_mode():
                 # FW control under CMIS host management mode. 
                 # Currently, we don't support set LPM under this mode.

From 26bc08850bbdf92b86472bb3fd39d418821ff213 Mon Sep 17 00:00:00 2001
From: Sasha <117593183+oleksandra-bella@users.noreply.github.com>
Date: Mon, 4 Mar 2024 19:35:06 +0200
Subject: [PATCH 0295/1115] Check if PSU files exists when getting psu_voltage
 properties (#17042)

- Why I did it
Error messages occured when trying to read PSU files on init:
ERR pmon#psud: Failed to read from file /var/run/hw-management/power/psu1_volt_out2_capability - FileNotFoundError(2, 'No such file or directory')

This can happen when the power cord is disconnected from the PSU, so some PSU files may be absent, e.g.:
/var/run/hw-management/power/psu2_volt_out2
/var/run/hw-management/power/psu2_volt_out2_capability

- How I did it
Check if a file exists for a specific PSU parameter If not, return None so we can't read the PSU file any further

- How to verify it
Disconnect power cord from PSU and power supply from system
Wait few minutes and then connect power supply to system without power cord
Check logs for errors

Signed-off-by: Oleksandra Bella <oleksandrab@nvidia.com>
---
 platform/mellanox/mlnx-platform-api/sonic_platform/psu.py | 8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/psu.py b/platform/mellanox/mlnx-platform-api/sonic_platform/psu.py
index 6b42fad6d..977ac5f86 100644
--- a/platform/mellanox/mlnx-platform-api/sonic_platform/psu.py
+++ b/platform/mellanox/mlnx-platform-api/sonic_platform/psu.py
@@ -1,5 +1,5 @@
 #
-# Copyright (c) 2019-2023 NVIDIA CORPORATION & AFFILIATES.
+# Copyright (c) 2019-2024 NVIDIA CORPORATION & AFFILIATES.
 # Apache-2.0
 #
 # Licensed under the Apache License, Version 2.0 (the "License");
@@ -440,7 +440,8 @@ def get_voltage_high_threshold(self):
             The thresholds of voltage are not supported on all platforms.
             So we have to check capability first.
         """
-        if self.psu_voltage_capability and self.psu_voltage_max and self.get_powergood_status():
+        if self.psu_voltage_capability and os.path.exists(self.psu_voltage_capability) and \
+           self.psu_voltage_max and os.path.exists(self.psu_voltage_max) and self.get_powergood_status():
             capability = utils.read_str_from_file(self.psu_voltage_capability)
             if 'max' in capability:
                 max_voltage = utils.read_int_from_file(self.psu_voltage_max, log_func=logger.log_info)
@@ -463,7 +464,8 @@ def get_voltage_low_threshold(self):
             The thresholds of voltage are not supported on all platforms.
             So we have to check capability first.
         """
-        if self.psu_voltage_capability and self.psu_voltage_min and self.get_powergood_status():
+        if self.psu_voltage_capability and os.path.exists(self.psu_voltage_capability) and \
+           self.psu_voltage_min and os.path.exists(self.psu_voltage_min) and self.get_powergood_status():
             capability = utils.read_str_from_file(self.psu_voltage_capability)
             if 'min' in capability:
                 min_voltage = utils.read_int_from_file(self.psu_voltage_min, log_func=logger.log_info)

From 0c6b143e005e2d192bf60e2b4e03c287f4c81ea7 Mon Sep 17 00:00:00 2001
From: Sudharsan Dhamal Gopalarathnam <sudharsand@nvidia.com>
Date: Mon, 4 Mar 2024 09:58:31 -0800
Subject: [PATCH 0296/1115] [Mellanox]Adding dependency of libnl-route-3 for
 Mellanox SAI library (#18197)

- Why I did it
Adding explicit dependency of libnl-route-3 for Mellanox SAI library. This is required for the latest SAI library.

- How I did it
Modifying Make files

- How to verify it
Building with the changes.
---
 platform/mellanox/mlnx-sai.mk | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/platform/mellanox/mlnx-sai.mk b/platform/mellanox/mlnx-sai.mk
index 39eaeabf7..626c167d5 100644
--- a/platform/mellanox/mlnx-sai.mk
+++ b/platform/mellanox/mlnx-sai.mk
@@ -19,8 +19,8 @@ export MLNX_SAI_VERSION MLNX_SAI_SOURCE_BASE_URL
 
 MLNX_SAI = mlnx-sai_1.mlnx.$(MLNX_SAI_VERSION)_$(CONFIGURED_ARCH).deb
 $(MLNX_SAI)_SRC_PATH = $(PLATFORM_PATH)/mlnx-sai
-$(MLNX_SAI)_DEPENDS += $(MLNX_SDK_DEBS)
-$(MLNX_SAI)_RDEPENDS += $(MLNX_SDK_RDEBS) $(MLNX_SDK_DEBS)
+$(MLNX_SAI)_DEPENDS += $(MLNX_SDK_DEBS) $(LIBNL_ROUTE3_DEV)
+$(MLNX_SAI)_RDEPENDS += $(MLNX_SDK_RDEBS) $(MLNX_SDK_DEBS) $(LIBNL_ROUTE3)
 $(eval $(call add_conflict_package,$(MLNX_SAI),$(LIBSAIVS_DEV)))
 MLNX_SAI_DBGSYM = mlnx-sai-dbgsym_1.mlnx.$(MLNX_SAI_VERSION)_$(CONFIGURED_ARCH).deb
 $(eval $(call add_derived_package,$(MLNX_SAI),$(MLNX_SAI_DBGSYM)))

From d4ca86bf9d868891efd672d6d0b90a7f60876453 Mon Sep 17 00:00:00 2001
From: Pavan-Nokia <120486223+Pavan-Nokia@users.noreply.github.com>
Date: Mon, 4 Mar 2024 13:53:00 -0500
Subject: [PATCH 0297/1115] [Nokia-7215-A1]Update Nokia-7215-A1 Platform
 (#18147)

1) Update Nokia-7215-A1 platform to address UT and OC test failures
2) Enable watchdog service
3) EZB files for SAI upgrade
---
 .../Nokia-7215-A1/ASK-Board-AC5X-xb.md5       |   2 +-
 .../Nokia-7215-A1/ASK-Board-AC5X-xb.xml       | 290 ++++++------------
 .../Nokia-7215-A1/ASK-L1-AC5X-xb.md5          |   2 +-
 .../Nokia-7215-A1/ASK-L1-AC5X-xb.xml          |   2 +-
 .../Nokia-7215-A1/ASK-PP-AC5X-xb.md5          |   2 +-
 .../Nokia-7215-A1/ASK-PP-AC5X-xb.xml          |  24 +-
 .../Nokia-7215-A1/SAI-AC5X-xb.md5             |   2 +-
 .../Nokia-7215-A1/SAI-AC5X-xb.xml             | 138 ++++++++-
 .../installer.conf                            |   1 -
 .../arm64-nokia_ixs7215_52xb-r0/pcie.yaml     |  10 +
 .../arm64-nokia_ixs7215_52xb-r0/platform.json |  11 +-
 .../platform_reboot                           |  10 +-
 .../pmon_daemon_control.json                  |   3 -
 .../system_health_monitoring_config.json      |   4 +-
 .../7215/modules/Makefile                     |   2 +-
 .../7215/modules/ac5_thermal_sensor.c         | 218 -------------
 .../7215/modules/cn9130_cpu_thermal_sensor.c  | 242 +++++++++++++++
 .../7215/scripts/cpu_wdt.py                   |  46 +++
 .../7215/service/cpu_wdt.service              |   8 +
 .../7215/sonic_platform/chassis.py            |  23 +-
 .../7215/sonic_platform/component.py          |   2 +-
 .../7215/sonic_platform/eeprom.py             |   3 +-
 .../7215/sonic_platform/fan.py                |  34 +-
 .../7215/sonic_platform/psu.py                |  34 +-
 .../7215/sonic_platform/sfp.py                |   2 +-
 .../7215/sonic_platform/thermal.py            |  73 +++--
 .../7215/sonic_platform/thermal_infos.py      |  33 +-
 .../7215/sonic_platform/watchdog.py           | 159 ++++++----
 .../sonic-platform-nokia/debian/rules         |   2 +-
 .../debian/sonic-platform-nokia-7215.install  |   2 +
 .../debian/sonic-platform-nokia-7215.postinst |   3 +
 31 files changed, 818 insertions(+), 569 deletions(-)
 create mode 100644 device/nokia/arm64-nokia_ixs7215_52xb-r0/pcie.yaml
 mode change 100644 => 100755 device/nokia/arm64-nokia_ixs7215_52xb-r0/platform_reboot
 delete mode 100644 device/nokia/arm64-nokia_ixs7215_52xb-r0/pmon_daemon_control.json
 delete mode 100644 platform/marvell-arm64/sonic-platform-nokia/7215/modules/ac5_thermal_sensor.c
 create mode 100644 platform/marvell-arm64/sonic-platform-nokia/7215/modules/cn9130_cpu_thermal_sensor.c
 create mode 100755 platform/marvell-arm64/sonic-platform-nokia/7215/scripts/cpu_wdt.py
 create mode 100644 platform/marvell-arm64/sonic-platform-nokia/7215/service/cpu_wdt.service

diff --git a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-Board-AC5X-xb.md5 b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-Board-AC5X-xb.md5
index 64cb21add..fe63caf78 100644
--- a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-Board-AC5X-xb.md5
+++ b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-Board-AC5X-xb.md5
@@ -1 +1 @@
-ee44e299ca857b9f0abf2e804ec4850f
\ No newline at end of file
+4983b60d1d68623c202b91093f3730db
\ No newline at end of file
diff --git a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-Board-AC5X-xb.xml b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-Board-AC5X-xb.xml
index 08936c133..20cdef069 100644
--- a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-Board-AC5X-xb.xml
+++ b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-Board-AC5X-xb.xml
@@ -1,5 +1,5 @@
 <?xml version="1.0" encoding="utf-8"?>
-<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2023-05-05-1.04" profile="Askboard" dsig="md5">
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2023-11-20-1.05" profile="Askboard" sid="20929980-c61f-4f1d-b08a-4e64f6d717c2">
   <askboardplt:ASK-Board xmlns:askboardplt="urn:marvell:askboard:yang">
     <askboardplt:typedefs>
       <askboardplt:typedef>
@@ -82,9 +82,9 @@
       <askboardplt:typedef>
         <askboardplt:name>device-id-type</askboardplt:name>
         <askboardplt:type>uint32</askboardplt:type>
-        <askboardplt:description>Device ID 0..1023</askboardplt:description>
+        <askboardplt:description>Device ID 0..1</askboardplt:description>
         <askboardplt:min>0</askboardplt:min>
-        <askboardplt:max>1023</askboardplt:max>
+        <askboardplt:max>1</askboardplt:max>
       </askboardplt:typedef>
       <askboardplt:typedef>
         <askboardplt:name>port-mapping-type</askboardplt:name>
@@ -111,11 +111,9 @@
       <askboardplt:typedef>
         <askboardplt:name>txq-port-number-type</askboardplt:name>
         <askboardplt:type>uint32</askboardplt:type>
-        <askboardplt:description>0 - 8 queues are configured per port (legacy mode),
-1...16 - the number of queues configured per port
-   	SIP 5 : Bobcat2,BobK:0..71 ;Bobcat3: 0..576 ;Aldrin2:0..99</askboardplt:description>
+        <askboardplt:description>TXq port number </askboardplt:description>
         <askboardplt:min>0</askboardplt:min>
-        <askboardplt:max>576</askboardplt:max>
+        <askboardplt:max>99</askboardplt:max>
       </askboardplt:typedef>
       <askboardplt:typedef>
         <askboardplt:name>phy-smi-interface-type</askboardplt:name>
@@ -162,12 +160,14 @@
         </askboardplt:enum>
         <askboardplt:enum>
           <askboardplt:name>alaska-88E3140</askboardplt:name>
-          <askboardplt:description>Specifies PHY identifier 88E3140, used for Copper with speeds of 100M/1G/10G. Uses with FW SolarFlare next generation.</askboardplt:description>
+          <askboardplt:description>Specifies PHY identifier 88E3140, used for Copper with speeds of 100M/1G/10G.
+Uses with FW SolarFlare next generation.</askboardplt:description>
           <askboardplt:value>5</askboardplt:value>
         </askboardplt:enum>
         <askboardplt:enum>
           <askboardplt:name>alaska-88E3240</askboardplt:name>
-          <askboardplt:description>Specifies PHY identifier 88E3240, used for Copper with speeds of 100M/1G/10G. Uses with FW, SolarFlare next generation.</askboardplt:description>
+          <askboardplt:description>Specifies PHY identifier 88E3240, used for Copper with speeds of 100M/1G/10G.
+Uses with FW, SolarFlare next generation.</askboardplt:description>
           <askboardplt:value>6</askboardplt:value>
         </askboardplt:enum>
         <askboardplt:enum>
@@ -177,7 +177,8 @@
         </askboardplt:enum>
         <askboardplt:enum>
           <askboardplt:name>alaska-88E3220</askboardplt:name>
-          <askboardplt:description>Specifies PHY identifier 88E3220, used for Combo port with speeds of 100M/1G/10G. Uses FW, SolarFlare next generation.</askboardplt:description>
+          <askboardplt:description>Specifies PHY identifier 88E3220, used for Combo port with speeds of 100M/1G/10G.
+Uses FW, SolarFlare next generation.</askboardplt:description>
           <askboardplt:value>8</askboardplt:value>
         </askboardplt:enum>
         <askboardplt:enum>
@@ -212,17 +213,20 @@
         </askboardplt:enum>
         <askboardplt:enum>
           <askboardplt:name>alaska-88E1780</askboardplt:name>
-          <askboardplt:description>Specifies PHY identifier 88E1780, Integrated Octal 10/100/1000 Mbps Energy Efficient Ethernet Transceiver</askboardplt:description>
+          <askboardplt:description>Specifies PHY identifier 88E1780, Integrated Octal 10/100/1000 Mbps Energy
+Efficient Ethernet Transceiver</askboardplt:description>
           <askboardplt:value>15</askboardplt:value>
         </askboardplt:enum>
         <askboardplt:enum>
           <askboardplt:name>alaska-88E2540</askboardplt:name>
-          <askboardplt:description>Specifies PHY identifier 88E2540, 4 ports 10/100/1000/2.5G/5GBASE-T Ethernet Transceiver with IEEE 1588v2 PTP Support</askboardplt:description>
+          <askboardplt:description>Specifies PHY identifier 88E2540, 4 ports 10/100/1000/2.5G/5GBASE-T Ethernet
+Transceiver with IEEE 1588v2 PTP Support</askboardplt:description>
           <askboardplt:value>16</askboardplt:value>
         </askboardplt:enum>
         <askboardplt:enum>
           <askboardplt:name>alaska-88E2580</askboardplt:name>
-          <askboardplt:description>Specifies PHY identifier 88E12580, Octal 10/100/1000/2.5G/5GBASE-T Ethernet Transceiver with IEEE 1588v2 PTP Support</askboardplt:description>
+          <askboardplt:description>Specifies PHY identifier 88E12580, Octal 10/100/1000/2.5G/5GBASE-T Ethernet Transceiver
+with IEEE 1588v2 PTP Support</askboardplt:description>
           <askboardplt:value>17</askboardplt:value>
         </askboardplt:enum>
       </askboardplt:typedef>
@@ -510,7 +514,7 @@
         <askboardplt:type>uint32</askboardplt:type>
         <askboardplt:description>serdes lane</askboardplt:description>
         <askboardplt:min>0</askboardplt:min>
-        <askboardplt:max>255</askboardplt:max>
+        <askboardplt:max>7</askboardplt:max>
       </askboardplt:typedef>
       <askboardplt:typedef>
         <askboardplt:name>cpu-type</askboardplt:name>
@@ -589,12 +593,12 @@ lowercase characters.</askboardplt:description>
         </askboardplt:enum>
         <askboardplt:enum>
           <askboardplt:name>sip5</askboardplt:name>
-          <askboardplt:description>SIP5: AC5, AC3x</askboardplt:description>
+          <askboardplt:description>SIP5: AC3x</askboardplt:description>
           <askboardplt:value>5</askboardplt:value>
         </askboardplt:enum>
         <askboardplt:enum>
           <askboardplt:name>sip6</askboardplt:name>
-          <askboardplt:description>SIP6: Falcon, AC5x, AC5P</askboardplt:description>
+          <askboardplt:description>SIP6: Falcon, AC5x</askboardplt:description>
           <askboardplt:value>6</askboardplt:value>
         </askboardplt:enum>
       </askboardplt:typedef>
@@ -665,12 +669,28 @@ lowercase characters.</askboardplt:description>
           <askboardplt:value>1</askboardplt:value>
         </askboardplt:enum>
       </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>asic-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>ASIC Type</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>ASIC_AC3X</askboardplt:name>
+          <askboardplt:description>AC3X</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>ASIC_AC5X</askboardplt:name>
+          <askboardplt:description>AC5X</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
     </askboardplt:typedefs>
+    <askboardplt:ASIC_Type askboardplt:type="asic-type">ASIC_AC5X</askboardplt:ASIC_Type>
     <askboardplt:boardName askboardplt:type="std-string">AC5X-xb</askboardplt:boardName>
     <askboardplt:osCallType askboardplt:type="board-callback-type">linux-static</askboardplt:osCallType>
     <askboardplt:extDrvCallType askboardplt:type="board-callback-type">linux-static</askboardplt:extDrvCallType>
     <askboardplt:mapType askboardplt:type="board-pp-map-type">autoscan</askboardplt:mapType>
-    <askboardplt:cpuType askboardplt:type="cpu-type">internal</askboardplt:cpuType>
+    <askboardplt:cpuType askboardplt:type="cpu-type">external</askboardplt:cpuType>
     <askboardplt:mngInterfaceType askboardplt:type="board-pp-interface-channel-type">pex_eagle</askboardplt:mngInterfaceType>
     <askboardplt:device-list>
       <askboardplt:devNum askboardplt:type="device-id-type">0</askboardplt:devNum>
@@ -683,10 +703,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">0</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">0</askboardplt:phyNumber>
@@ -704,10 +722,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">1</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">0</askboardplt:phyNumber>
@@ -725,10 +741,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">2</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">0</askboardplt:phyNumber>
@@ -746,10 +760,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">3</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">0</askboardplt:phyNumber>
@@ -767,10 +779,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">4</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">0</askboardplt:phyNumber>
@@ -788,10 +798,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">5</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">0</askboardplt:phyNumber>
@@ -809,10 +817,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">6</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">0</askboardplt:phyNumber>
@@ -830,10 +836,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">7</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">0</askboardplt:phyNumber>
@@ -851,10 +855,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">8</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">1</askboardplt:phyNumber>
@@ -872,10 +874,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">9</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">1</askboardplt:phyNumber>
@@ -893,10 +893,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">10</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">1</askboardplt:phyNumber>
@@ -914,10 +912,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">11</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">1</askboardplt:phyNumber>
@@ -935,10 +931,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">12</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">1</askboardplt:phyNumber>
@@ -956,10 +950,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">13</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">1</askboardplt:phyNumber>
@@ -977,10 +969,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">14</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">1</askboardplt:phyNumber>
@@ -998,10 +988,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">15</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">1</askboardplt:phyNumber>
@@ -1019,10 +1007,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">16</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">2</askboardplt:phyNumber>
@@ -1040,10 +1026,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">17</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">2</askboardplt:phyNumber>
@@ -1061,10 +1045,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">18</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">2</askboardplt:phyNumber>
@@ -1082,10 +1064,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">19</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">2</askboardplt:phyNumber>
@@ -1103,10 +1083,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">20</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">2</askboardplt:phyNumber>
@@ -1124,10 +1102,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">21</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">2</askboardplt:phyNumber>
@@ -1145,10 +1121,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">22</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">2</askboardplt:phyNumber>
@@ -1166,10 +1140,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">23</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">2</askboardplt:phyNumber>
@@ -1187,10 +1159,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">24</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">3</askboardplt:phyNumber>
@@ -1208,10 +1178,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">25</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">3</askboardplt:phyNumber>
@@ -1229,10 +1197,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">26</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">3</askboardplt:phyNumber>
@@ -1250,10 +1216,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">27</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">3</askboardplt:phyNumber>
@@ -1271,10 +1235,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">28</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">3</askboardplt:phyNumber>
@@ -1292,10 +1254,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">29</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">3</askboardplt:phyNumber>
@@ -1313,10 +1273,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">30</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">3</askboardplt:phyNumber>
@@ -1334,10 +1292,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">31</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">3</askboardplt:phyNumber>
@@ -1355,10 +1311,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">32</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">4</askboardplt:phyNumber>
@@ -1372,18 +1326,16 @@ lowercase characters.</askboardplt:description>
         </askboardplt:ledstream-port>
       </askboardplt:portMap-list>
       <askboardplt:portMap-list>
-        <askboardplt:portNumber askboardplt:type="physical-port-num-type">33</askboardplt:portNumber>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">47</askboardplt:portNumber>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
-          <askboardplt:interfaceNum askboardplt:type="interface-num-type">33</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">47</askboardplt:interfaceNum>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
-          <askboardplt:phyNumber askboardplt:type="uint32">4</askboardplt:phyNumber>
-          <askboardplt:phyAddr askboardplt:type="uint32">9</askboardplt:phyAddr>
+          <askboardplt:phyNumber askboardplt:type="uint32">6</askboardplt:phyNumber>
+          <askboardplt:phyAddr askboardplt:type="uint32">23</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
         <askboardplt:serdesMuxScheme askboardplt:type="string"/>
@@ -1393,18 +1345,16 @@ lowercase characters.</askboardplt:description>
         </askboardplt:ledstream-port>
       </askboardplt:portMap-list>
       <askboardplt:portMap-list>
-        <askboardplt:portNumber askboardplt:type="physical-port-num-type">34</askboardplt:portNumber>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">46</askboardplt:portNumber>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
-          <askboardplt:interfaceNum askboardplt:type="interface-num-type">34</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">46</askboardplt:interfaceNum>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
-          <askboardplt:phyNumber askboardplt:type="uint32">4</askboardplt:phyNumber>
-          <askboardplt:phyAddr askboardplt:type="uint32">10</askboardplt:phyAddr>
+          <askboardplt:phyNumber askboardplt:type="uint32">6</askboardplt:phyNumber>
+          <askboardplt:phyAddr askboardplt:type="uint32">22</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
         <askboardplt:serdesMuxScheme askboardplt:type="string"/>
@@ -1414,18 +1364,16 @@ lowercase characters.</askboardplt:description>
         </askboardplt:ledstream-port>
       </askboardplt:portMap-list>
       <askboardplt:portMap-list>
-        <askboardplt:portNumber askboardplt:type="physical-port-num-type">35</askboardplt:portNumber>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">45</askboardplt:portNumber>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
-          <askboardplt:interfaceNum askboardplt:type="interface-num-type">35</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">45</askboardplt:interfaceNum>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
-          <askboardplt:phyNumber askboardplt:type="uint32">4</askboardplt:phyNumber>
-          <askboardplt:phyAddr askboardplt:type="uint32">11</askboardplt:phyAddr>
+          <askboardplt:phyNumber askboardplt:type="uint32">6</askboardplt:phyNumber>
+          <askboardplt:phyAddr askboardplt:type="uint32">21</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
         <askboardplt:serdesMuxScheme askboardplt:type="string"/>
@@ -1435,18 +1383,16 @@ lowercase characters.</askboardplt:description>
         </askboardplt:ledstream-port>
       </askboardplt:portMap-list>
       <askboardplt:portMap-list>
-        <askboardplt:portNumber askboardplt:type="physical-port-num-type">36</askboardplt:portNumber>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">44</askboardplt:portNumber>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
-          <askboardplt:interfaceNum askboardplt:type="interface-num-type">36</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">44</askboardplt:interfaceNum>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
-          <askboardplt:phyNumber askboardplt:type="uint32">4</askboardplt:phyNumber>
-          <askboardplt:phyAddr askboardplt:type="uint32">12</askboardplt:phyAddr>
+          <askboardplt:phyNumber askboardplt:type="uint32">6</askboardplt:phyNumber>
+          <askboardplt:phyAddr askboardplt:type="uint32">20</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
         <askboardplt:serdesMuxScheme askboardplt:type="string"/>
@@ -1456,18 +1402,16 @@ lowercase characters.</askboardplt:description>
         </askboardplt:ledstream-port>
       </askboardplt:portMap-list>
       <askboardplt:portMap-list>
-        <askboardplt:portNumber askboardplt:type="physical-port-num-type">37</askboardplt:portNumber>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">43</askboardplt:portNumber>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
-          <askboardplt:interfaceNum askboardplt:type="interface-num-type">37</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">43</askboardplt:interfaceNum>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
-          <askboardplt:phyNumber askboardplt:type="uint32">4</askboardplt:phyNumber>
-          <askboardplt:phyAddr askboardplt:type="uint32">13</askboardplt:phyAddr>
+          <askboardplt:phyNumber askboardplt:type="uint32">5</askboardplt:phyNumber>
+          <askboardplt:phyAddr askboardplt:type="uint32">19</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
         <askboardplt:serdesMuxScheme askboardplt:type="string"/>
@@ -1477,18 +1421,16 @@ lowercase characters.</askboardplt:description>
         </askboardplt:ledstream-port>
       </askboardplt:portMap-list>
       <askboardplt:portMap-list>
-        <askboardplt:portNumber askboardplt:type="physical-port-num-type">38</askboardplt:portNumber>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">42</askboardplt:portNumber>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
-          <askboardplt:interfaceNum askboardplt:type="interface-num-type">38</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">42</askboardplt:interfaceNum>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
-          <askboardplt:phyNumber askboardplt:type="uint32">4</askboardplt:phyNumber>
-          <askboardplt:phyAddr askboardplt:type="uint32">14</askboardplt:phyAddr>
+          <askboardplt:phyNumber askboardplt:type="uint32">5</askboardplt:phyNumber>
+          <askboardplt:phyAddr askboardplt:type="uint32">18</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
         <askboardplt:serdesMuxScheme askboardplt:type="string"/>
@@ -1498,18 +1440,16 @@ lowercase characters.</askboardplt:description>
         </askboardplt:ledstream-port>
       </askboardplt:portMap-list>
       <askboardplt:portMap-list>
-        <askboardplt:portNumber askboardplt:type="physical-port-num-type">39</askboardplt:portNumber>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">41</askboardplt:portNumber>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
-          <askboardplt:interfaceNum askboardplt:type="interface-num-type">39</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">41</askboardplt:interfaceNum>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
-          <askboardplt:phyNumber askboardplt:type="uint32">4</askboardplt:phyNumber>
-          <askboardplt:phyAddr askboardplt:type="uint32">15</askboardplt:phyAddr>
+          <askboardplt:phyNumber askboardplt:type="uint32">5</askboardplt:phyNumber>
+          <askboardplt:phyAddr askboardplt:type="uint32">17</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
         <askboardplt:serdesMuxScheme askboardplt:type="string"/>
@@ -1523,10 +1463,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">40</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">5</askboardplt:phyNumber>
@@ -1540,18 +1478,16 @@ lowercase characters.</askboardplt:description>
         </askboardplt:ledstream-port>
       </askboardplt:portMap-list>
       <askboardplt:portMap-list>
-        <askboardplt:portNumber askboardplt:type="physical-port-num-type">41</askboardplt:portNumber>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">39</askboardplt:portNumber>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
-          <askboardplt:interfaceNum askboardplt:type="interface-num-type">41</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">39</askboardplt:interfaceNum>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
-          <askboardplt:phyNumber askboardplt:type="uint32">5</askboardplt:phyNumber>
-          <askboardplt:phyAddr askboardplt:type="uint32">17</askboardplt:phyAddr>
+          <askboardplt:phyNumber askboardplt:type="uint32">4</askboardplt:phyNumber>
+          <askboardplt:phyAddr askboardplt:type="uint32">15</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
         <askboardplt:serdesMuxScheme askboardplt:type="string"/>
@@ -1561,18 +1497,16 @@ lowercase characters.</askboardplt:description>
         </askboardplt:ledstream-port>
       </askboardplt:portMap-list>
       <askboardplt:portMap-list>
-        <askboardplt:portNumber askboardplt:type="physical-port-num-type">42</askboardplt:portNumber>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">38</askboardplt:portNumber>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
-          <askboardplt:interfaceNum askboardplt:type="interface-num-type">42</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">38</askboardplt:interfaceNum>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
-          <askboardplt:phyNumber askboardplt:type="uint32">5</askboardplt:phyNumber>
-          <askboardplt:phyAddr askboardplt:type="uint32">18</askboardplt:phyAddr>
+          <askboardplt:phyNumber askboardplt:type="uint32">4</askboardplt:phyNumber>
+          <askboardplt:phyAddr askboardplt:type="uint32">14</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
         <askboardplt:serdesMuxScheme askboardplt:type="string"/>
@@ -1582,18 +1516,16 @@ lowercase characters.</askboardplt:description>
         </askboardplt:ledstream-port>
       </askboardplt:portMap-list>
       <askboardplt:portMap-list>
-        <askboardplt:portNumber askboardplt:type="physical-port-num-type">43</askboardplt:portNumber>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">37</askboardplt:portNumber>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
-          <askboardplt:interfaceNum askboardplt:type="interface-num-type">43</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">37</askboardplt:interfaceNum>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
-          <askboardplt:phyNumber askboardplt:type="uint32">5</askboardplt:phyNumber>
-          <askboardplt:phyAddr askboardplt:type="uint32">19</askboardplt:phyAddr>
+          <askboardplt:phyNumber askboardplt:type="uint32">4</askboardplt:phyNumber>
+          <askboardplt:phyAddr askboardplt:type="uint32">13</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
         <askboardplt:serdesMuxScheme askboardplt:type="string"/>
@@ -1603,18 +1535,16 @@ lowercase characters.</askboardplt:description>
         </askboardplt:ledstream-port>
       </askboardplt:portMap-list>
       <askboardplt:portMap-list>
-        <askboardplt:portNumber askboardplt:type="physical-port-num-type">44</askboardplt:portNumber>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">36</askboardplt:portNumber>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
-          <askboardplt:interfaceNum askboardplt:type="interface-num-type">44</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">36</askboardplt:interfaceNum>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
-          <askboardplt:phyNumber askboardplt:type="uint32">6</askboardplt:phyNumber>
-          <askboardplt:phyAddr askboardplt:type="uint32">20</askboardplt:phyAddr>
+          <askboardplt:phyNumber askboardplt:type="uint32">4</askboardplt:phyNumber>
+          <askboardplt:phyAddr askboardplt:type="uint32">12</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
         <askboardplt:serdesMuxScheme askboardplt:type="string"/>
@@ -1624,18 +1554,16 @@ lowercase characters.</askboardplt:description>
         </askboardplt:ledstream-port>
       </askboardplt:portMap-list>
       <askboardplt:portMap-list>
-        <askboardplt:portNumber askboardplt:type="physical-port-num-type">45</askboardplt:portNumber>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">35</askboardplt:portNumber>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
-          <askboardplt:interfaceNum askboardplt:type="interface-num-type">45</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">35</askboardplt:interfaceNum>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
-          <askboardplt:phyNumber askboardplt:type="uint32">6</askboardplt:phyNumber>
-          <askboardplt:phyAddr askboardplt:type="uint32">21</askboardplt:phyAddr>
+          <askboardplt:phyNumber askboardplt:type="uint32">4</askboardplt:phyNumber>
+          <askboardplt:phyAddr askboardplt:type="uint32">11</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
         <askboardplt:serdesMuxScheme askboardplt:type="string"/>
@@ -1645,18 +1573,16 @@ lowercase characters.</askboardplt:description>
         </askboardplt:ledstream-port>
       </askboardplt:portMap-list>
       <askboardplt:portMap-list>
-        <askboardplt:portNumber askboardplt:type="physical-port-num-type">46</askboardplt:portNumber>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">34</askboardplt:portNumber>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
-          <askboardplt:interfaceNum askboardplt:type="interface-num-type">46</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">34</askboardplt:interfaceNum>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
-          <askboardplt:phyNumber askboardplt:type="uint32">6</askboardplt:phyNumber>
-          <askboardplt:phyAddr askboardplt:type="uint32">22</askboardplt:phyAddr>
+          <askboardplt:phyNumber askboardplt:type="uint32">4</askboardplt:phyNumber>
+          <askboardplt:phyAddr askboardplt:type="uint32">10</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
         <askboardplt:serdesMuxScheme askboardplt:type="string"/>
@@ -1666,18 +1592,16 @@ lowercase characters.</askboardplt:description>
         </askboardplt:ledstream-port>
       </askboardplt:portMap-list>
       <askboardplt:portMap-list>
-        <askboardplt:portNumber askboardplt:type="physical-port-num-type">47</askboardplt:portNumber>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">33</askboardplt:portNumber>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
-          <askboardplt:interfaceNum askboardplt:type="interface-num-type">47</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">33</askboardplt:interfaceNum>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
-          <askboardplt:phyNumber askboardplt:type="uint32">6</askboardplt:phyNumber>
-          <askboardplt:phyAddr askboardplt:type="uint32">23</askboardplt:phyAddr>
+          <askboardplt:phyNumber askboardplt:type="uint32">4</askboardplt:phyNumber>
+          <askboardplt:phyAddr askboardplt:type="uint32">9</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
         <askboardplt:serdesMuxScheme askboardplt:type="string"/>
@@ -1691,10 +1615,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">49</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
         </askboardplt:phy>
@@ -1703,7 +1625,7 @@ lowercase characters.</askboardplt:description>
           <askboardplt:ledPosition askboardplt:type="led-position-type">0</askboardplt:ledPosition>
           <askboardplt:polarityInvertList-list>
             <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
-            <askboardplt:invertEnable askboardplt:type="boolean-type">false</askboardplt:invertEnable>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
           </askboardplt:polarityInvertList-list>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
         </askboardplt:ledstream-port>
@@ -1713,10 +1635,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">48</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
         </askboardplt:phy>
@@ -1725,7 +1645,7 @@ lowercase characters.</askboardplt:description>
           <askboardplt:ledPosition askboardplt:type="led-position-type">1</askboardplt:ledPosition>
           <askboardplt:polarityInvertList-list>
             <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
-            <askboardplt:invertEnable askboardplt:type="boolean-type">false</askboardplt:invertEnable>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
           </askboardplt:polarityInvertList-list>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
         </askboardplt:ledstream-port>
@@ -1735,10 +1655,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">51</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
         </askboardplt:phy>
@@ -1747,7 +1665,7 @@ lowercase characters.</askboardplt:description>
           <askboardplt:ledPosition askboardplt:type="led-position-type">0</askboardplt:ledPosition>
           <askboardplt:polarityInvertList-list>
             <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
-            <askboardplt:invertEnable askboardplt:type="boolean-type">false</askboardplt:invertEnable>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
           </askboardplt:polarityInvertList-list>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
         </askboardplt:ledstream-port>
@@ -1757,10 +1675,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">50</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
         </askboardplt:phy>
@@ -1769,30 +1685,26 @@ lowercase characters.</askboardplt:description>
           <askboardplt:ledPosition askboardplt:type="led-position-type">1</askboardplt:ledPosition>
           <askboardplt:polarityInvertList-list>
             <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
-            <askboardplt:invertEnable askboardplt:type="boolean-type">false</askboardplt:invertEnable>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
           </askboardplt:polarityInvertList-list>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
         </askboardplt:ledstream-port>
       </askboardplt:portMap-list>
       <askboardplt:portMap-list>
-        <askboardplt:portNumber askboardplt:type="physical-port-num-type">60</askboardplt:portNumber>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">63</askboardplt:portNumber>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">cpu_sdma</askboardplt:mappingType>
-          <askboardplt:interfaceNum askboardplt:type="interface-num-type">55</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">54</askboardplt:interfaceNum>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
       </askboardplt:portMap-list>
       <askboardplt:portMap-list>
-        <askboardplt:portNumber askboardplt:type="physical-port-num-type">63</askboardplt:portNumber>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">60</askboardplt:portNumber>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">cpu_sdma</askboardplt:mappingType>
-          <askboardplt:interfaceNum askboardplt:type="interface-num-type">54</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">55</askboardplt:interfaceNum>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
       </askboardplt:portMap-list>
       <askboardplt:laneList-list>
         <askboardplt:laneNumber askboardplt:type="uint32">0</askboardplt:laneNumber>
diff --git a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-L1-AC5X-xb.md5 b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-L1-AC5X-xb.md5
index e8daa7b6f..6ea0d9634 100644
--- a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-L1-AC5X-xb.md5
+++ b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-L1-AC5X-xb.md5
@@ -1 +1 @@
-8d006b7a29c75f81b641df68102a6aa3
\ No newline at end of file
+48c76e16726ad2b1cb797c55c477fc30
\ No newline at end of file
diff --git a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-L1-AC5X-xb.xml b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-L1-AC5X-xb.xml
index 534b21855..e00ba0314 100644
--- a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-L1-AC5X-xb.xml
+++ b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-L1-AC5X-xb.xml
@@ -1,5 +1,5 @@
 <?xml version="1.0" encoding="utf-8"?>
-<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2023-05-05-1.04" profile="Askl1" dsig="md5">
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2023-11-20-1.05" profile="Askl1" sid="a9deb744-f6cb-4675-bab3-11132e7db1cd">
   <ASKL1plt:ASK-L1 xmlns:ASKL1plt="urn:marvell:ASKL1:yang">
     <ASKL1plt:typedefs>
       <ASKL1plt:typedef>
diff --git a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-PP-AC5X-xb.md5 b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-PP-AC5X-xb.md5
index de23afe95..bcd85e67a 100644
--- a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-PP-AC5X-xb.md5
+++ b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-PP-AC5X-xb.md5
@@ -1 +1 @@
-b42f2a2be9da6c7752c0807f9dee48bf
\ No newline at end of file
+d36319f76733ae8593e31f3231599936
\ No newline at end of file
diff --git a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-PP-AC5X-xb.xml b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-PP-AC5X-xb.xml
index ad457fe7d..cd948edc2 100644
--- a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-PP-AC5X-xb.xml
+++ b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-PP-AC5X-xb.xml
@@ -1,5 +1,5 @@
 <?xml version="1.0" encoding="utf-8"?>
-<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2023-05-05-1.04" profile="Askpp" dsig="md5">
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2023-11-20-1.05" profile="Askpp" sid="fdf5b1c2-b80a-47a6-ac37-47e174286524">
   <askppplt:ASK-PP xmlns:askppplt="urn:marvell:askpp:yang">
     <askppplt:typedefs>
       <askppplt:typedef>
@@ -357,28 +357,28 @@
         <askppplt:enum>
           <askppplt:name>NATIVE</askppplt:name>
           <askppplt:description>NATIVE
-   	 *  the trunk members are filled
-   	 *  according to the order given by application.
-   	 *  Regular trunk may hold max of 8 members.
-   	 *  Cascade trunk may hold :
-   	 *  max of 64 members</askppplt:description>
+*  the trunk members are filled
+*  according to the order given by application.
+*  Regular trunk may hold max of 8 members.
+*  Cascade trunk may hold :
+*  max of 64 members</askppplt:description>
           <askppplt:value>0</askppplt:value>
         </askppplt:enum>
         <askppplt:enum>
           <askppplt:name>FLEX</askppplt:name>
           <askppplt:description>FLEX
-   	 *  A mode to allows flexibility for
-   	 *  each Regular trunk to state it's max number of members (before starting to add members).
-   	 *  (this mode not effect 'cascade trunk' members)
-   	 *  Regular trunk may hold : max of 4K members. (each trunk set it's own limit)
-   	 *  Cascade trunk may hold : max of 64 members.</askppplt:description>
+*  A mode to allows flexibility for
+*  each Regular trunk to state it's max number of members (before starting to add members).
+*  (this mode not effect 'cascade trunk' members)
+*  Regular trunk may hold : max of 4K members. (each trunk set it's own limit)
+*  Cascade trunk may hold : max of 64 members.</askppplt:description>
           <askppplt:value>2</askppplt:value>
         </askppplt:enum>
       </askppplt:typedef>
       <askppplt:typedef>
         <askppplt:name>number-physical-port-type</askppplt:name>
         <askppplt:type>enumeration</askppplt:type>
-        <askppplt:description>ac5x 128, falcon 64,128,256, 512, 1024</askppplt:description>
+        <askppplt:description>AC3X/AC5X 128, falcon 64, 128, 256, 512, 1024</askppplt:description>
         <askppplt:enum>
           <askppplt:name>no-ports</askppplt:name>
           <askppplt:description>no-ports</askppplt:description>
diff --git a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/SAI-AC5X-xb.md5 b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/SAI-AC5X-xb.md5
index 951dd3007..dd43b5857 100644
--- a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/SAI-AC5X-xb.md5
+++ b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/SAI-AC5X-xb.md5
@@ -1 +1 @@
-b43a871130f9e59ac21a74940574558f
\ No newline at end of file
+1ff8c65eb4b5dfff5d2c9be67401c723
\ No newline at end of file
diff --git a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/SAI-AC5X-xb.xml b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/SAI-AC5X-xb.xml
index 5e374fdb0..d88939c00 100644
--- a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/SAI-AC5X-xb.xml
+++ b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/SAI-AC5X-xb.xml
@@ -1,13 +1,13 @@
 <?xml version="1.0" encoding="utf-8"?>
-<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2023-05-05-1.04" profile="SAI" dsig="md5">
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-01-08-1.05" profile="SAI" sid="fd56a8b4-6b41-4ead-9a27-c491bc2f95b9">
   <SAIplt:SAI xmlns:SAIplt="urn:marvell:SAI:yang">
     <SAIplt:typedefs>
       <SAIplt:typedef>
         <SAIplt:name>device-id-type</SAIplt:name>
         <SAIplt:type>uint32</SAIplt:type>
-        <SAIplt:description>Device ID 0..1023</SAIplt:description>
+        <SAIplt:description>Device ID 0..1</SAIplt:description>
         <SAIplt:min>0</SAIplt:min>
-        <SAIplt:max>1023</SAIplt:max>
+        <SAIplt:max>1</SAIplt:max>
       </SAIplt:typedef>
       <SAIplt:typedef>
         <SAIplt:name>port-id-type</SAIplt:name>
@@ -22,7 +22,7 @@
         <SAIplt:description>Logging Feature Options</SAIplt:description>
         <SAIplt:enum>
           <SAIplt:name>SAI_LOG_SYSLOG</SAIplt:name>
-          <SAIplt:description>SYSLOG               {Syslog service should be running to use this option}</SAIplt:description>
+          <SAIplt:description>SYSLOG  {Syslog service should be running to use this option}</SAIplt:description>
           <SAIplt:value>0</SAIplt:value>
         </SAIplt:enum>
         <SAIplt:enum>
@@ -32,7 +32,7 @@
         </SAIplt:enum>
         <SAIplt:enum>
           <SAIplt:name>SAI_LOG_FILE</SAIplt:name>
-          <SAIplt:description>FILE                       {Warning !!! Use with caution. Can cause disk full issues}</SAIplt:description>
+          <SAIplt:description>FILE  {Warning !!! Use with caution. Can cause disk full issues}</SAIplt:description>
           <SAIplt:value>2</SAIplt:value>
         </SAIplt:enum>
       </SAIplt:typedef>
@@ -43,11 +43,93 @@
         <SAIplt:min>2</SAIplt:min>
         <SAIplt:max>30</SAIplt:max>
       </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>acl-feature-name-type</SAIplt:name>
+        <SAIplt:type>enumeration</SAIplt:type>
+        <SAIplt:description/>
+        <SAIplt:enum>
+          <SAIplt:name>port-sFlow</SAIplt:name>
+          <SAIplt:description>SFlow over Port</SAIplt:description>
+          <SAIplt:value>0</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>port-counters-ipv4-ipv6</SAIplt:name>
+          <SAIplt:description>Port ipv4/ipv6 counters</SAIplt:description>
+          <SAIplt:value>1</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>control-acl</SAIplt:name>
+          <SAIplt:description>ACLs for control packet handling</SAIplt:description>
+          <SAIplt:value>2</SAIplt:value>
+        </SAIplt:enum>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>ingress-acl-stage-type</SAIplt:name>
+        <SAIplt:type>enumeration</SAIplt:type>
+        <SAIplt:description/>
+        <SAIplt:enum>
+          <SAIplt:name>disabled</SAIplt:name>
+          <SAIplt:description>Feature not enabled</SAIplt:description>
+          <SAIplt:value>0</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>IPCL0</SAIplt:name>
+          <SAIplt:description>Stage IPCL0</SAIplt:description>
+          <SAIplt:value>1</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>IPCL1</SAIplt:name>
+          <SAIplt:description>Stage IPCL1</SAIplt:description>
+          <SAIplt:value>2</SAIplt:value>
+        </SAIplt:enum>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>egress-acl-stage-type</SAIplt:name>
+        <SAIplt:type>enumeration</SAIplt:type>
+        <SAIplt:description/>
+        <SAIplt:enum>
+          <SAIplt:name>disabled</SAIplt:name>
+          <SAIplt:description>Feature not enabled</SAIplt:description>
+          <SAIplt:value>0</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>EPCL0</SAIplt:name>
+          <SAIplt:description>Stage EPCL0</SAIplt:description>
+          <SAIplt:value>2</SAIplt:value>
+        </SAIplt:enum>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>feature-priority-type</SAIplt:name>
+        <SAIplt:type>uint32</SAIplt:type>
+        <SAIplt:description>Feature priority</SAIplt:description>
+        <SAIplt:min>2</SAIplt:min>
+        <SAIplt:max>15</SAIplt:max>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>hit-number-type</SAIplt:name>
+        <SAIplt:type>uint32</SAIplt:type>
+        <SAIplt:description>Hit/lookup number</SAIplt:description>
+        <SAIplt:min>0</SAIplt:min>
+        <SAIplt:max>3</SAIplt:max>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>asic-type</SAIplt:name>
+        <SAIplt:type>enumeration</SAIplt:type>
+        <SAIplt:description>ASIC Type</SAIplt:description>
+        <SAIplt:enum>
+          <SAIplt:name>ASIC_AC3X</SAIplt:name>
+          <SAIplt:description>AC3X</SAIplt:description>
+          <SAIplt:value>0</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>ASIC_AC5X</SAIplt:name>
+          <SAIplt:description>AC5X</SAIplt:description>
+          <SAIplt:value>1</SAIplt:value>
+        </SAIplt:enum>
+      </SAIplt:typedef>
     </SAIplt:typedefs>
+    <SAIplt:ASIC_Type SAIplt:type="asic-type">ASIC_AC5X</SAIplt:ASIC_Type>
     <SAIplt:ASK-BOARD-Profile-Name SAIplt:type="string">ASK-Board-AC5X-xb.xml</SAIplt:ASK-BOARD-Profile-Name>
-    <SAIplt:Features>
-      <SAIplt:RoCE SAIplt:type="boolean">false</SAIplt:RoCE>
-    </SAIplt:Features>
     <SAIplt:Ports>
       <SAIplt:port-list>
         <SAIplt:sai_port_id SAIplt:type="port-id-type">0</SAIplt:sai_port_id>
@@ -310,7 +392,7 @@
         <SAIplt:sdk_port_id SAIplt:type="port-id-type">51</SAIplt:sdk_port_id>
       </SAIplt:port-list>
     </SAIplt:Ports>
-    <SAIplt:Scaling>
+    <SAIplt:scalingAC5>
       <SAIplt:max_lag_members SAIplt:type="uint32">8</SAIplt:max_lag_members>
       <SAIplt:max_route_ipv4 SAIplt:type="uint32">0</SAIplt:max_route_ipv4>
       <SAIplt:max_route_ipv6 SAIplt:type="uint32">0</SAIplt:max_route_ipv6>
@@ -320,9 +402,45 @@
       <SAIplt:max_tti SAIplt:type="uint32">1024</SAIplt:max_tti>
       <SAIplt:wred_size SAIplt:type="uint32">0</SAIplt:wred_size>
       <SAIplt:max_nat SAIplt:type="uint32">0</SAIplt:max_nat>
-    </SAIplt:Scaling>
+    </SAIplt:scalingAC5>
     <SAIplt:Logging>
       <SAIplt:log_dest SAIplt:type="logDest-type">SAI_LOG_SYSLOG</SAIplt:log_dest>
     </SAIplt:Logging>
+    <SAIplt:Features-using-acl>
+      <SAIplt:feature SAIplt:type="acl-feature-name-type">control-acl</SAIplt:feature>
+      <SAIplt:feature-priority SAIplt:type="feature-priority-type">2</SAIplt:feature-priority>
+      <SAIplt:Ingress>
+        <SAIplt:ingress-stage SAIplt:type="ingress-acl-stage-type">IPCL0</SAIplt:ingress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">1</SAIplt:hit-number>
+      </SAIplt:Ingress>
+      <SAIplt:Egress>
+        <SAIplt:egress-stage SAIplt:type="egress-acl-stage-type">EPCL0</SAIplt:egress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">0</SAIplt:hit-number>
+      </SAIplt:Egress>
+    </SAIplt:Features-using-acl>
+    <SAIplt:Features-using-acl>
+      <SAIplt:feature SAIplt:type="acl-feature-name-type">port-sFlow</SAIplt:feature>
+      <SAIplt:feature-priority SAIplt:type="feature-priority-type">3</SAIplt:feature-priority>
+      <SAIplt:Ingress>
+        <SAIplt:ingress-stage SAIplt:type="ingress-acl-stage-type">IPCL0</SAIplt:ingress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">0</SAIplt:hit-number>
+      </SAIplt:Ingress>
+      <SAIplt:Egress>
+        <SAIplt:egress-stage SAIplt:type="egress-acl-stage-type">EPCL0</SAIplt:egress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">0</SAIplt:hit-number>
+      </SAIplt:Egress>
+    </SAIplt:Features-using-acl>
+    <SAIplt:Features-using-acl>
+      <SAIplt:feature SAIplt:type="acl-feature-name-type">port-counters-ipv4-ipv6</SAIplt:feature>
+      <SAIplt:feature-priority SAIplt:type="feature-priority-type">4</SAIplt:feature-priority>
+      <SAIplt:Ingress>
+        <SAIplt:ingress-stage SAIplt:type="ingress-acl-stage-type">IPCL0</SAIplt:ingress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">3</SAIplt:hit-number>
+      </SAIplt:Ingress>
+      <SAIplt:Egress>
+        <SAIplt:egress-stage SAIplt:type="egress-acl-stage-type">EPCL0</SAIplt:egress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">0</SAIplt:hit-number>
+      </SAIplt:Egress>
+    </SAIplt:Features-using-acl>
   </SAIplt:SAI>
 </data>
\ No newline at end of file
diff --git a/device/nokia/arm64-nokia_ixs7215_52xb-r0/installer.conf b/device/nokia/arm64-nokia_ixs7215_52xb-r0/installer.conf
index 3d02aab20..bcce80934 100644
--- a/device/nokia/arm64-nokia_ixs7215_52xb-r0/installer.conf
+++ b/device/nokia/arm64-nokia_ixs7215_52xb-r0/installer.conf
@@ -1,2 +1 @@
-VAR_LOG_SIZE=4096
 ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="default_hugepagesz=32M hugepages=4 loglevel=4"
diff --git a/device/nokia/arm64-nokia_ixs7215_52xb-r0/pcie.yaml b/device/nokia/arm64-nokia_ixs7215_52xb-r0/pcie.yaml
new file mode 100644
index 000000000..865f9090e
--- /dev/null
+++ b/device/nokia/arm64-nokia_ixs7215_52xb-r0/pcie.yaml
@@ -0,0 +1,10 @@
+- bus: '00'
+  dev: '00'
+  fn: '0'
+  id: '0110'
+  name: 'PCI bridge: Marvell Technology Group Ltd. 88F60x0/88F70x0/88F80x0/CN913x ARM SoC'
+- bus: '01'
+  dev: '00'
+  fn: '0'
+  id: '9821'
+  name: 'Ethernet controller: Marvell Technology Group Ltd. Device 9821'
diff --git a/device/nokia/arm64-nokia_ixs7215_52xb-r0/platform.json b/device/nokia/arm64-nokia_ixs7215_52xb-r0/platform.json
index 0ddd1f395..89a7a3e9d 100644
--- a/device/nokia/arm64-nokia_ixs7215_52xb-r0/platform.json
+++ b/device/nokia/arm64-nokia_ixs7215_52xb-r0/platform.json
@@ -97,17 +97,22 @@
                 "high-crit-threshold": false
             },
             {
-                "name": "AC5X CORE",
+                "name": "PCB MID",
                 "controllable": false,
                 "low-threshold": false,
                 "low-crit-threshold": false,
                 "high-crit-threshold": false
             },
             {
-                "name": "OOB PHY",
+                "name": "ASIC",
+                "controllable": false,
+                "low-threshold": false,
+                "low-crit-threshold": false
+            },
+            {
+                "name": "CPU CORE",
                 "controllable": false,
                 "low-threshold": false,
-                "high-threshold": false,
                 "low-crit-threshold": false
             }
         ],
diff --git a/device/nokia/arm64-nokia_ixs7215_52xb-r0/platform_reboot b/device/nokia/arm64-nokia_ixs7215_52xb-r0/platform_reboot
old mode 100644
new mode 100755
index b99b9bcfe..aeb9f87f1
--- a/device/nokia/arm64-nokia_ixs7215_52xb-r0/platform_reboot
+++ b/device/nokia/arm64-nokia_ixs7215_52xb-r0/platform_reboot
@@ -1,11 +1,13 @@
 #!/bin/bash
 
-function SafePwrCycle() {
+function SafeReboot() {
     sync ; sync
     sudo umount -fa > /dev/null 2&>1
 
-    # Write CPLD register to initiate cold reboot
-    sudo echo 0 > /sys/bus/i2c/devices/i2c-0/0-0041/cold_reset
+    # Turn off watchdog monitor gpio for correct reboot-cause
+    sudo echo 1 > /sys/class/gpio/gpio41/value
+    cat /sys/bus/i2c/devices/0-0041/last_reset_cause > /dev/null 2&>1
+    exec /sbin/reboot
 }
 
-SafePwrCycle
+SafeReboot
diff --git a/device/nokia/arm64-nokia_ixs7215_52xb-r0/pmon_daemon_control.json b/device/nokia/arm64-nokia_ixs7215_52xb-r0/pmon_daemon_control.json
deleted file mode 100644
index f6445f875..000000000
--- a/device/nokia/arm64-nokia_ixs7215_52xb-r0/pmon_daemon_control.json
+++ /dev/null
@@ -1,3 +0,0 @@
-{
-    "skip_pcied": true
-}
diff --git a/device/nokia/arm64-nokia_ixs7215_52xb-r0/system_health_monitoring_config.json b/device/nokia/arm64-nokia_ixs7215_52xb-r0/system_health_monitoring_config.json
index b4c438a10..d5f3a7b98 100644
--- a/device/nokia/arm64-nokia_ixs7215_52xb-r0/system_health_monitoring_config.json
+++ b/device/nokia/arm64-nokia_ixs7215_52xb-r0/system_health_monitoring_config.json
@@ -2,9 +2,7 @@
     "services_to_ignore": [],
     "devices_to_ignore": [
         "asic",
-        "psu.temperature",
-        "fan",
-        "psu"
+        "psu.temperature"
     ],
     "user_defined_checkers": [],
     "polling_interval": 60,
diff --git a/platform/marvell-arm64/sonic-platform-nokia/7215/modules/Makefile b/platform/marvell-arm64/sonic-platform-nokia/7215/modules/Makefile
index 73d6e5f38..d82a871c1 100644
--- a/platform/marvell-arm64/sonic-platform-nokia/7215/modules/Makefile
+++ b/platform/marvell-arm64/sonic-platform-nokia/7215/modules/Makefile
@@ -1 +1 @@
-obj-m:= nokia_7215_ixs_a1_cpld.o ac5_thermal_sensor.o
+obj-m:= nokia_7215_ixs_a1_cpld.o cn9130_cpu_thermal_sensor.o
diff --git a/platform/marvell-arm64/sonic-platform-nokia/7215/modules/ac5_thermal_sensor.c b/platform/marvell-arm64/sonic-platform-nokia/7215/modules/ac5_thermal_sensor.c
deleted file mode 100644
index faf4402ff..000000000
--- a/platform/marvell-arm64/sonic-platform-nokia/7215/modules/ac5_thermal_sensor.c
+++ /dev/null
@@ -1,218 +0,0 @@
-/*
- * HWMON Driver for AC5x thermal sensor
- *
- * Author: Natarajan Subbiramani <nataraja.subbiramani.ext@nokia.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- */
-
-#include <linux/module.h>
-#include <linux/init.h>
-#include <linux/miscdevice.h>
-#include <linux/hwmon.h>
-#include <linux/hwmon-sysfs.h>
-#include <linux/err.h>
-#include <linux/io.h>
-#include <linux/delay.h>
-
-#define AC5_DEFAULT_TEMP_CRIT 100000
-#define AC5_DEFAULT_TEMP_MAX  110000
-
-#define AC5_TEMP_BASE_ADDR 0x944F80D0
-static unsigned long thermal_base_addr=AC5_TEMP_BASE_ADDR;
-module_param(thermal_base_addr, ulong, 0444);
-MODULE_PARM_DESC(thermal_base_addr,
-        "Initialize the base address of the thermal sensor");
-
-struct ac5_thermal_data {
-    struct device *dev;
-    struct device *hwmon_dev;
-    uint8_t * __iomem temp_base;
-    int temp_input;
-    int temp_crit;
-    int temp_max;
-};
-
-static long ac5_thermal_read_reg_in_mcelcius(struct device *dev, struct ac5_thermal_data *data)
-{
-    volatile uint8_t * __iomem temp_base = data->temp_base;
-    uint32_t regval;
-    long output=data->temp_max;
-
-    //STOP MEASUREMENT
-    writel(0xF0F01034, temp_base);
-
-    //delay for 1ms
-    mdelay(1);
-
-    //Read thermal value
-    regval = readl(temp_base+0xC);
-
-    //RE-START MEASUREMENT
-    writel(0xF0F01035, temp_base);
-
-    //Validate data
-    if(regval & 0x10000) {
-        //Calibrate it to milli-celcius
-        output = (regval>> 6) & 0x3FF;
-        output = ((output*42)-27250)*10;
-    }
-
-    return output;
-}
-static int ac5_thermal_read(struct device *dev, enum hwmon_sensor_types type,
-        u32 attr, int channel, long *val)
-{
-    struct ac5_thermal_data *data = dev_get_drvdata(dev);
-
-    switch (type) {
-        case hwmon_temp:
-            switch (attr) {
-                case hwmon_temp_input:
-                    *val = ac5_thermal_read_reg_in_mcelcius(dev, data);
-                    break;
-                case hwmon_temp_crit:
-                    *val = data->temp_crit;
-                    break;
-                case hwmon_temp_max:
-                    *val = data->temp_max;
-                    break;
-                default:
-                    return -EINVAL;
-            }
-            break;
-        default:
-            return -EINVAL;
-    }
-    return 0;
-}
-
-static int ac5_thermal_write(struct device *dev, enum hwmon_sensor_types type,
-        u32 attr, int channel, long val)
-{
-    struct ac5_thermal_data *data = dev_get_drvdata(dev);
-    switch (type) {
-        case hwmon_temp:
-            switch (attr) {
-                case hwmon_temp_crit:
-                    data->temp_crit = val;
-                    break;
-                case hwmon_temp_max:
-                    data->temp_max = val;
-                    break;
-                default:
-                    return -EINVAL;
-            }
-            break;
-        default:
-            return -EINVAL;
-    }
-    return 0;
-}
-
-
-static umode_t ac5_thermal_is_visible(const void *data, enum hwmon_sensor_types type,
-        u32 attr, int channel)
-{
-    switch (type) {
-        case hwmon_temp:
-            switch (attr) {
-                case hwmon_temp_input:
-                    return 0444;
-                case hwmon_temp_crit:
-                case hwmon_temp_max:
-                    return 0644;
-            }
-            break;
-        default:
-            break;
-    }
-    return 0;
-}
-
-static const struct hwmon_channel_info *ac5_thermal_info[] = {
-    HWMON_CHANNEL_INFO(temp,
-            HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_CRIT),
-    NULL
-};
-
-static const struct hwmon_ops ac5_thermal_hwmon_ops = {
-    .is_visible = ac5_thermal_is_visible,
-    .read = ac5_thermal_read,
-    .write = ac5_thermal_write,
-};
-
-static const struct hwmon_chip_info ac5_thermal_chip_info = {
-    .ops = &ac5_thermal_hwmon_ops,
-    .info = ac5_thermal_info,
-};
-
-static const struct file_operations fops = {
-    .owner          = THIS_MODULE,
-};
-
-struct miscdevice ac5_thermal_misc_device = {
-    .minor = TEMP_MINOR,
-    .name = "ac5_thermal",
-    .fops = &fops,
-};
-
-static int __init ac5_thermal_init_misc_driver(void)
-{
-    struct device *dev;
-    struct ac5_thermal_data *thermal_data;
-    int err;
-    void * __iomem reg;
-
-    err = misc_register(&ac5_thermal_misc_device);
-    if (err) {
-        pr_err("ac5_thermal misc_register failed!!!\n");
-        return err;
-    }
-
-    dev = ac5_thermal_misc_device.this_device;
-    thermal_data = devm_kzalloc(dev, sizeof(struct ac5_thermal_data), GFP_KERNEL);
-    if (!thermal_data)
-        return -ENOMEM;
-
-    thermal_data->dev = dev;
-    thermal_data->temp_crit  = AC5_DEFAULT_TEMP_CRIT;
-    thermal_data->temp_max   = AC5_DEFAULT_TEMP_MAX;
-
-    thermal_data->hwmon_dev = devm_hwmon_device_register_with_info(dev, ac5_thermal_misc_device.name,
-            thermal_data, &ac5_thermal_chip_info,
-            NULL);
-    if (IS_ERR(thermal_data->hwmon_dev)) {
-        dev_err(dev, "%s: hwmon registration failed.\n", ac5_thermal_misc_device.name);
-        return PTR_ERR(thermal_data->hwmon_dev);
-    }
-
-    reg = devm_ioremap(dev, thermal_base_addr, 16);
-    if (IS_ERR(reg)) {
-        dev_err(dev, "%s: base addr remap failed\n", ac5_thermal_misc_device.name);
-        return PTR_ERR(reg);
-    }
-    thermal_data->temp_base = reg;
-    /*Enable measurement*/
-    writel(0xF0F01035, thermal_data->temp_base);
-    writel(0x0584e680, thermal_data->temp_base+8);
-
-    dev_info(dev, "%s: initialized. base_addr: 0x%lx\n", dev_name(thermal_data->hwmon_dev), thermal_base_addr);
-
-    return 0;
-}
-
-static void __exit ac5_thermal_exit_misc_driver(void)
-{
-    misc_deregister(&ac5_thermal_misc_device);
-}
-
-module_init(ac5_thermal_init_misc_driver);
-module_exit(ac5_thermal_exit_misc_driver);
-
-MODULE_AUTHOR("Natarajan Subbiramani <natarajan.subbiramani.ext@nokia.com>");
-MODULE_DESCRIPTION("AC5 Thermal sensor Driver");
-MODULE_LICENSE("GPL");
diff --git a/platform/marvell-arm64/sonic-platform-nokia/7215/modules/cn9130_cpu_thermal_sensor.c b/platform/marvell-arm64/sonic-platform-nokia/7215/modules/cn9130_cpu_thermal_sensor.c
new file mode 100644
index 000000000..e11e28157
--- /dev/null
+++ b/platform/marvell-arm64/sonic-platform-nokia/7215/modules/cn9130_cpu_thermal_sensor.c
@@ -0,0 +1,242 @@
+/*
+ * HWMON Driver for CN9130 thermal sensor
+ *
+ * Author: Natarajan Subbiramani <nataraja.subbiramani.ext@nokia.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/miscdevice.h>
+#include <linux/hwmon.h>
+#include <linux/hwmon-sysfs.h>
+#include <linux/err.h>
+#include <linux/io.h>
+#include <linux/delay.h>
+
+#define CN9130_DEFAULT_TEMP_CRIT 100000
+#define CN9130_DEFAULT_TEMP_MAX  106000
+
+#define CN9130_TEMP_BASE_ADDR 0xF06F8080
+#define CN9130_TSEN_REG_CTRL_0_OFFSET 0x4
+#define CN9130_TSEN_REG_CTRL_1_OFFSET 0x8
+#define CN9130_TSEN_REG_STATUS_OFFSET 0xC
+#define CN9130_TSEN_SENSOR_MAX_ID 6
+static unsigned long thermal_base_addr=CN9130_TEMP_BASE_ADDR;
+module_param(thermal_base_addr, ulong, 0444);
+MODULE_PARM_DESC(thermal_base_addr,
+        "Initialize the base address of the thermal sensor");
+
+struct cn9130_thermal_data {
+    struct device *dev;
+    struct device *hwmon_dev;
+    uint8_t * __iomem temp_base;
+    int temp_input;
+    int temp_crit;
+    int temp_max;
+};
+
+static long cn9130_thermal_read_reg_in_mcelcius(struct device *dev, struct cn9130_thermal_data *data)
+{
+    volatile uint8_t * __iomem temp_base = data->temp_base;
+    uint32_t regval;
+    uint32_t status_regval=0;
+    uint32_t output=data->temp_max;
+
+    //STOP MEASUREMENT
+    regval = readl(temp_base+CN9130_TSEN_REG_CTRL_0_OFFSET);
+    regval &= ~( 1 << 0); //TSEN_STOP
+    writel(regval, temp_base+CN9130_TSEN_REG_CTRL_0_OFFSET);
+
+    //delay for 1ms
+    mdelay(1);
+
+    //Read thermal value
+    status_regval = readl(temp_base+CN9130_TSEN_REG_STATUS_OFFSET);
+    dev_dbg(dev, "%s: cn9130_thermal_read_reg_in_mcelcius: addr: 0x%lx value:0x%x\n", dev_name(data->hwmon_dev), temp_base+CN9130_TSEN_REG_STATUS_OFFSET, status_regval);
+
+    //START MEASUREMENT
+    regval = readl(temp_base+CN9130_TSEN_REG_CTRL_0_OFFSET);
+    regval |= 1 << 0; //TSEN_START
+    writel(regval, temp_base+CN9130_TSEN_REG_CTRL_0_OFFSET);
+
+    //Validate data
+    if(status_regval &= 0x3ff) {
+        //Convert it to milli-celcius
+        output = 150000 - (~(status_regval-1) & 0x3ff) * 423;
+    }
+
+    return output;
+}
+static int cn9130_thermal_read(struct device *dev, enum hwmon_sensor_types type,
+        u32 attr, int channel, long *val)
+{
+    struct cn9130_thermal_data *data = dev_get_drvdata(dev);
+
+    switch (type) {
+        case hwmon_temp:
+            switch (attr) {
+                case hwmon_temp_input:
+                    *val = cn9130_thermal_read_reg_in_mcelcius(dev, data);
+                    break;
+                case hwmon_temp_crit:
+                    *val = data->temp_crit;
+                    break;
+                case hwmon_temp_max:
+                    *val = data->temp_max;
+                    break;
+                default:
+                    return -EINVAL;
+            }
+            break;
+        default:
+            return -EINVAL;
+    }
+    return 0;
+}
+
+static int cn9130_thermal_write(struct device *dev, enum hwmon_sensor_types type,
+        u32 attr, int channel, long val)
+{
+    struct cn9130_thermal_data *data = dev_get_drvdata(dev);
+    switch (type) {
+        case hwmon_temp:
+            switch (attr) {
+                case hwmon_temp_crit:
+                    data->temp_crit = val;
+                    break;
+                case hwmon_temp_max:
+                    data->temp_max = val;
+                    break;
+                default:
+                    return -EINVAL;
+            }
+            break;
+        default:
+            return -EINVAL;
+    }
+    return 0;
+}
+
+
+static umode_t cn9130_thermal_is_visible(const void *data, enum hwmon_sensor_types type,
+        u32 attr, int channel)
+{
+    switch (type) {
+        case hwmon_temp:
+            switch (attr) {
+                case hwmon_temp_input:
+                    return 0444;
+                case hwmon_temp_crit:
+                case hwmon_temp_max:
+                    return 0644;
+            }
+            break;
+        default:
+            break;
+    }
+    return 0;
+}
+
+static const struct hwmon_channel_info *cn9130_thermal_info[] = {
+    HWMON_CHANNEL_INFO(temp,
+            HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_CRIT),
+    NULL
+};
+
+static const struct hwmon_ops cn9130_thermal_hwmon_ops = {
+    .is_visible = cn9130_thermal_is_visible,
+    .read = cn9130_thermal_read,
+    .write = cn9130_thermal_write,
+};
+
+static const struct hwmon_chip_info cn9130_thermal_chip_info = {
+    .ops = &cn9130_thermal_hwmon_ops,
+    .info = cn9130_thermal_info,
+};
+
+static const struct file_operations fops = {
+    .owner          = THIS_MODULE,
+};
+
+struct miscdevice cn9130_thermal_device = {
+    .minor = TEMP_MINOR,
+    .name = "cn9130_thermal",
+    .fops = &fops,
+};
+
+static int __init cn9130_thermal_init_driver(void)
+{
+    struct device *dev;
+    struct cn9130_thermal_data *thermal_data;
+    int err;
+    void * __iomem reg;
+    uint32_t regval=0;
+
+    err = misc_register(&cn9130_thermal_device);
+    if (err) {
+        pr_err("cn9130_thermal misc_register failed!!!\n");
+        return err;
+    }
+
+    dev = cn9130_thermal_device.this_device;
+    thermal_data = devm_kzalloc(dev, sizeof(struct cn9130_thermal_data), GFP_KERNEL);
+    if (!thermal_data)
+        return -ENOMEM;
+
+    thermal_data->dev = dev;
+    thermal_data->temp_crit  = CN9130_DEFAULT_TEMP_CRIT;
+    thermal_data->temp_max   = CN9130_DEFAULT_TEMP_MAX;
+
+    thermal_data->hwmon_dev = devm_hwmon_device_register_with_info(dev, cn9130_thermal_device.name,
+            thermal_data, &cn9130_thermal_chip_info,
+            NULL);
+    if (IS_ERR(thermal_data->hwmon_dev)) {
+        dev_err(dev, "%s: hwmon registration failed.\n", cn9130_thermal_device.name);
+        return PTR_ERR(thermal_data->hwmon_dev);
+    }
+
+    reg = devm_ioremap(dev, thermal_base_addr, 16);
+    if (IS_ERR(reg)) {
+        dev_err(dev, "%s: base addr remap failed\n", cn9130_thermal_device.name);
+        return PTR_ERR(reg);
+    }
+    thermal_data->temp_base = reg;
+
+    /*Enable measurement*/
+    regval = readl(thermal_data->temp_base+CN9130_TSEN_REG_CTRL_0_OFFSET);
+    regval |= 1 << 2; //TSEN_EN
+    writel(regval, thermal_data->temp_base+CN9130_TSEN_REG_CTRL_0_OFFSET);
+    mdelay(10);
+
+    // Set temperature reading zone as max reading
+    regval = readl(thermal_data->temp_base+CN9130_TSEN_REG_CTRL_1_OFFSET);
+    regval &= ~(0x7 << 21);
+    regval |= (CN9130_TSEN_SENSOR_MAX_ID & 0x7) << 21;
+    writel(regval, thermal_data->temp_base+CN9130_TSEN_REG_CTRL_1_OFFSET);
+
+    //START MEASUREMENT
+    regval = readl(thermal_data->temp_base+CN9130_TSEN_REG_CTRL_0_OFFSET);
+    regval |= 1 << 0; //TSEN_START
+    writel(regval, thermal_data->temp_base+CN9130_TSEN_REG_CTRL_0_OFFSET);
+
+    dev_info(dev, "%s: initialized. base_addr: 0x%lx virt_addr:0x%lx\n", dev_name(thermal_data->hwmon_dev), thermal_base_addr, thermal_data->temp_base);
+
+    return 0;
+}
+
+static void __exit cn9101_thermal_exit_driver(void)
+{
+    misc_deregister(&cn9130_thermal_device);
+}
+
+module_init(cn9130_thermal_init_driver);
+module_exit(cn9101_thermal_exit_driver);
+
+MODULE_AUTHOR("Natarajan Subbiramani <natarajan.subbiramani.ext@nokia.com>");
+MODULE_DESCRIPTION("CN9130 CPU Thermal sensor Driver");
+MODULE_LICENSE("GPL");
diff --git a/platform/marvell-arm64/sonic-platform-nokia/7215/scripts/cpu_wdt.py b/platform/marvell-arm64/sonic-platform-nokia/7215/scripts/cpu_wdt.py
new file mode 100755
index 000000000..b23cd4656
--- /dev/null
+++ b/platform/marvell-arm64/sonic-platform-nokia/7215/scripts/cpu_wdt.py
@@ -0,0 +1,46 @@
+#!/usr/bin/python
+
+from sonic_platform.chassis import Chassis
+from sonic_py_common import logger
+import time
+import os
+import signal
+import sys
+
+
+TIMEOUT=180
+KEEPALIVE=60
+sonic_logger = logger.Logger('Watchdog')
+sonic_logger.set_min_log_priority_info()
+time.sleep(60)
+chassis = Chassis()
+watchdog = chassis.get_watchdog()
+
+def stopWdtService(signal, frame):
+    watchdog._disablewatchdog()
+    sonic_logger.log_notice("CPUWDT Disabled: watchdog armed=%s" % watchdog.is_armed() )
+    sys.exit()
+
+def main():
+
+    signal.signal(signal.SIGHUP, signal.SIG_IGN)
+    signal.signal(signal.SIGINT, stopWdtService)
+    signal.signal(signal.SIGTERM, stopWdtService)
+    
+    watchdog.arm(TIMEOUT)
+    sonic_logger.log_notice("CPUWDT Enabled: watchdog armed=%s" % watchdog.is_armed() )
+
+
+    while True:
+        time.sleep(KEEPALIVE)
+        watchdog._keepalive()
+        sonic_logger.log_info("CPUWDT keepalive")
+    done
+
+    stopWdtService
+
+    return
+
+
+if __name__ == '__main__':
+    main()
diff --git a/platform/marvell-arm64/sonic-platform-nokia/7215/service/cpu_wdt.service b/platform/marvell-arm64/sonic-platform-nokia/7215/service/cpu_wdt.service
new file mode 100644
index 000000000..761deec56
--- /dev/null
+++ b/platform/marvell-arm64/sonic-platform-nokia/7215/service/cpu_wdt.service
@@ -0,0 +1,8 @@
+[Unit]
+Description=CPU WDT
+After=nokia-7215init.service
+[Service]
+ExecStart=/usr/local/bin/cpu_wdt.py
+
+[Install]
+WantedBy=multi-user.target
diff --git a/platform/marvell-arm64/sonic-platform-nokia/7215/sonic_platform/chassis.py b/platform/marvell-arm64/sonic-platform-nokia/7215/sonic_platform/chassis.py
index 11eeb1510..19007a3b4 100644
--- a/platform/marvell-arm64/sonic-platform-nokia/7215/sonic_platform/chassis.py
+++ b/platform/marvell-arm64/sonic-platform-nokia/7215/sonic_platform/chassis.py
@@ -35,7 +35,7 @@
 MAX_7215_FAN_DRAWERS = 2
 MAX_7215_FANS_PER_DRAWER = 1
 MAX_7215_PSU = 2
-MAX_7215_THERMAL = 4
+MAX_7215_THERMAL = 5
 CPLD_DIR = "/sys/bus/i2c/devices/0-0041/"
 
 SYSLOG_IDENTIFIER = "chassis"
@@ -92,7 +92,7 @@ def __init__(self):
             drawer = drawer_ctor(drawer_index)
             self._fan_drawer_list.append(drawer)
             for index in range(fan_num_per_drawer):
-                fan = Fan(fan_index, drawer)
+                fan = Fan(fan_index, drawer, self.get_model())
                 fan_index += 1
                 drawer._fan_list.append(fan)
                 self._fan_list.append(fan)
@@ -259,10 +259,21 @@ def get_reboot_cause(self):
             is "REBOOT_CAUSE_HARDWARE_OTHER", the second string can be used
             to pass a description of the reboot cause.
         """
-        # The ixs7215 CPLD does not have a hardware reboot cause register so
-        # the hardware portion of reboot cause can't be implemented
-
-        return (ChassisBase.REBOOT_CAUSE_NON_HARDWARE, None)
+        value = self._read_sysfs_file(CPLD_DIR+"last_reset_cause")
+        thermal = self._read_sysfs_file(CPLD_DIR+"temp_event_status")
+        if (value == 'cold_reset'):
+            reboot_cause=(ChassisBase.REBOOT_CAUSE_POWER_LOSS, "Cold Reset")
+        elif (value == 'warm_reset'):
+            reboot_cause=(ChassisBase.REBOOT_CAUSE_HARDWARE_OTHER, "Warm Reset")
+        elif (value == 'wdog_reset'):
+            reboot_cause=(ChassisBase.REBOOT_CAUSE_WATCHDOG, None)
+        elif (value == 'thermal_reset'):
+            reboot_cause=(ChassisBase.REBOOT_CAUSE_THERMAL_OVERLOAD_OTHER, thermal)
+        else:
+            reboot_cause=(ChassisBase.REBOOT_CAUSE_NON_HARDWARE, None)
+        #unmask temperature event    
+        self._write_sysfs_file(CPLD_DIR+"temp_event_mask", 0)
+        return reboot_cause
 
     def get_watchdog(self):
         """
diff --git a/platform/marvell-arm64/sonic-platform-nokia/7215/sonic_platform/component.py b/platform/marvell-arm64/sonic-platform-nokia/7215/sonic_platform/component.py
index cda5abc3c..f4d012911 100644
--- a/platform/marvell-arm64/sonic-platform-nokia/7215/sonic_platform/component.py
+++ b/platform/marvell-arm64/sonic-platform-nokia/7215/sonic_platform/component.py
@@ -175,7 +175,7 @@ def get_firmware_version(self):
             return self._get_cpld_version(self.index)
 
         if self.index == 1:
-            cmdstatus, uboot_version = cmd.getstatusoutput('grep --null-data ^U-Boot /dev/mtd0ro | cut -d" " -f2')
+            cmdstatus, uboot_version = cmd.getstatusoutput('grep --null-data ^U-Boot /dev/mtd0ro | cut -d" " -f4')
             return uboot_version
 
     def install_firmware(self, image_path):
diff --git a/platform/marvell-arm64/sonic-platform-nokia/7215/sonic_platform/eeprom.py b/platform/marvell-arm64/sonic-platform-nokia/7215/sonic_platform/eeprom.py
index 4abfad47b..b9f770abf 100644
--- a/platform/marvell-arm64/sonic-platform-nokia/7215/sonic_platform/eeprom.py
+++ b/platform/marvell-arm64/sonic-platform-nokia/7215/sonic_platform/eeprom.py
@@ -41,8 +41,7 @@ def __init__(self, is_psu=False, psu_index=0, is_fan=False, fan_index=0):
                 self.index = psu_index
                 self.part_number = '1'
                 self.model_str = 'PJT-12V100WBBA'
-                self.serial_number = 'NA'
-                self.serial_number = 'NA'                
+                self.serial_number = 'NA'               
 
             if self.is_fan_eeprom:
                 self.index = fan_index
diff --git a/platform/marvell-arm64/sonic-platform-nokia/7215/sonic_platform/fan.py b/platform/marvell-arm64/sonic-platform-nokia/7215/sonic_platform/fan.py
index aa4a51a95..b86370dc0 100644
--- a/platform/marvell-arm64/sonic-platform-nokia/7215/sonic_platform/fan.py
+++ b/platform/marvell-arm64/sonic-platform-nokia/7215/sonic_platform/fan.py
@@ -16,8 +16,8 @@
 except ImportError as e:
     raise ImportError(str(e) + "- required module not found")
 
-MAX_IXS7215_FAN_SPEED = 24000
-WORKING_IXS7215_FAN_SPEED = 2400
+MAX_IXS7215_FAN_SPEED = 23000
+WORKING_IXS7215_FAN_SPEED = 2300
 
 
 sonic_logger = logger.Logger('fan')
@@ -26,10 +26,10 @@
 class Fan(FanBase):
     """Nokia platform-specific Fan class"""
 
-    def __init__(self, fan_index, fan_drawer, psu_fan=False, dependency=None):
+    def __init__(self, fan_index, fan_drawer, chassis_model, psu_fan=False, dependency=None):
         self.is_psu_fan = psu_fan
         EMC2302_DIR = " "
-        i2c_path = "/sys/bus/i2c/devices/0-002e/hwmon/"
+        i2c_path = "/sys/bus/i2c/devices/0-002f/hwmon/"
         if(os.path.exists(i2c_path)):
             hwmon_node = os.listdir(i2c_path)[0]
             EMC2302_DIR = i2c_path + hwmon_node + '/'
@@ -38,6 +38,7 @@ def __init__(self, fan_index, fan_drawer, psu_fan=False, dependency=None):
             # Fan is 1-based in Nokia platforms
             self.index = fan_index + 1
             self.fan_drawer = fan_drawer
+            self.chassis_model = chassis_model
             self.set_fan_speed_reg = EMC2302_DIR+"pwm{}".format(self.index)
             self.get_fan_speed_reg = EMC2302_DIR+"fan{}_input".format(self.index)
             self.max_fan_speed = MAX_IXS7215_FAN_SPEED
@@ -116,7 +117,16 @@ def get_model(self):
         Returns:
             string: Model number of Fan. Use part number for this.
         """
-        return self.eeprom.part_number_str()
+        return self.eeprom.modelstr()
+    
+    def get_chassis_model(self):
+        """
+        Retrieves the model number of the Fan
+
+        Returns:
+            string: Model number of Fan. Use part number for this.
+        """
+        return self.chassis_model
 
     def get_serial(self):
         """
@@ -169,8 +179,14 @@ def get_direction(self):
             A string, either FAN_DIRECTION_INTAKE or
             FAN_DIRECTION_EXHAUST depending on fan direction
         """
+        ch_model=self.get_chassis_model()
+        #compare first 8 characters of chassis molel string
+        if(ch_model[:8]=='3HE18723'):
+            direction = 'intake'
+        else:
+            direction = 'exhaust'
 
-        return 'intake'
+        return direction
 
     def get_position_in_parent(self):
         """
@@ -219,8 +235,10 @@ def get_speed_tolerance(self):
             which is considered tolerable
         """
         if self.get_presence():
-            # The tolerance value is fixed as 25% for this platform
-            tolerance = 50
+            if self.get_target_speed()<50:
+                tolerance=60
+            else:
+                tolerance = 25
         else:
             tolerance = 0
 
diff --git a/platform/marvell-arm64/sonic-platform-nokia/7215/sonic_platform/psu.py b/platform/marvell-arm64/sonic-platform-nokia/7215/sonic_platform/psu.py
index eb8aeeaed..824995493 100644
--- a/platform/marvell-arm64/sonic-platform-nokia/7215/sonic_platform/psu.py
+++ b/platform/marvell-arm64/sonic-platform-nokia/7215/sonic_platform/psu.py
@@ -19,6 +19,8 @@
 sonic_logger = logger.Logger('psu')
 INA230_DIR = "/sys/bus/i2c/devices/0-0040/iio:device0/"
 CPLD_DIR = "/sys/bus/i2c/devices/0-0041/"
+PSU_GPIO_DIR = ["/sys/class/gpio/gpio61/value", "/sys/class/gpio/gpio62/value"]
+
 
 class Psu(PsuBase):
     """Nokia platform-specific PSU class for 7215 """
@@ -32,6 +34,8 @@ def __init__(self, psu_index):
 
         # PSU eeprom
         self.eeprom = Eeprom(is_psu=True, psu_index=self.index)
+        self.MAX_VOLTAGE = 14
+        self.MIN_VOLTAGE = 10
 
     def _read_sysfs_file(self, sysfs_file):
         # On successful read, returns the value read from given
@@ -80,8 +84,8 @@ def _get_active_psus(self):
             Integer: Number of active PSU's
         """  
         active_psus = 0
-        psu1_good = self._read_sysfs_file(CPLD_DIR+"psu1_power_good")
-        psu2_good = self._read_sysfs_file(CPLD_DIR+"psu2_power_good")
+        psu1_good = self._read_sysfs_file(PSU_GPIO_DIR[0])
+        psu2_good = self._read_sysfs_file(PSU_GPIO_DIR[1])
 
         active_psus = int(psu1_good) + int(psu2_good)
         
@@ -150,7 +154,7 @@ def get_status(self):
         Returns:
             bool: True if PSU is operating properly, False if not
         """
-        psu_sysfs_str=CPLD_DIR+"psu{}_power_good".format(self.index)
+        psu_sysfs_str=PSU_GPIO_DIR[self.index-1]
         psu_status = self._read_sysfs_file(psu_sysfs_str)
 
         if psu_status == '1':
@@ -212,6 +216,26 @@ def get_position_in_parent(self):
         """
         return self.index
 
+    def get_voltage_high_threshold(self):
+        """
+        Retrieves the high threshold PSU voltage output
+
+        Returns:
+            A float number, the high threshold output voltage in volts,
+            e.g. 12.1
+        """
+        return self.MAX_VOLTAGE
+
+    def get_voltage_low_threshold(self):
+        """
+        Retrieves the low threshold PSU voltage output
+
+        Returns:
+            A float number, the low threshold output voltage in volts,
+            e.g. 12.1
+        """
+        return self.MIN_VOLTAGE
+
     def is_replaceable(self):
         """
         Indicate whether this device is replaceable.
@@ -227,7 +251,7 @@ def get_powergood_status(self):
             A boolean, True if PSU has stablized its output voltages and
             passed all its internal self-tests, False if not.
         """
-        psu_sysfs_str=CPLD_DIR+"psu{}_power_good".format(self.index)
+        psu_sysfs_str=PSU_GPIO_DIR[self.index-1]
         psu_pg_status = self._read_sysfs_file(psu_sysfs_str)
 
         if psu_pg_status == '1':
@@ -294,4 +318,4 @@ def set_status_master_led(self, color):
         if status == "ERR":
             return False
 
-        return True
\ No newline at end of file
+        return True
diff --git a/platform/marvell-arm64/sonic-platform-nokia/7215/sonic_platform/sfp.py b/platform/marvell-arm64/sonic-platform-nokia/7215/sonic_platform/sfp.py
index 4cb96ed47..b682080e1 100644
--- a/platform/marvell-arm64/sonic-platform-nokia/7215/sonic_platform/sfp.py
+++ b/platform/marvell-arm64/sonic-platform-nokia/7215/sonic_platform/sfp.py
@@ -30,7 +30,7 @@
 
 class Sfp(SfpOptoeBase):
     """
-    Nokia IXR-7215 Platform-specific Sfp refactor class
+    Nokia IXS-7215 Platform-specific Sfp refactor class
     """
     instances = []
 
diff --git a/platform/marvell-arm64/sonic-platform-nokia/7215/sonic_platform/thermal.py b/platform/marvell-arm64/sonic-platform-nokia/7215/sonic_platform/thermal.py
index 5a8a084cf..20c15452b 100644
--- a/platform/marvell-arm64/sonic-platform-nokia/7215/sonic_platform/thermal.py
+++ b/platform/marvell-arm64/sonic-platform-nokia/7215/sonic_platform/thermal.py
@@ -10,6 +10,7 @@
 try:
     import os
     from sonic_platform_base.thermal_base import ThermalBase
+    from swsscommon.swsscommon import SonicV2Connector
     from sonic_py_common import logger
 except ImportError as e:
     raise ImportError(str(e) + "- required module not found")
@@ -21,12 +22,13 @@ class Thermal(ThermalBase):
 
     I2C_CLASS_DIR = "/sys/class/i2c-adapter/"
     I2C_DEV_MAPPING = (['i2c-0/0-0048/hwmon/', 1],
-                       ['i2c-0/0-0049/hwmon/', 1])
+                       ['i2c-0/0-0049/hwmon/', 1],
+                       ['i2c-0/0-004a/hwmon/', 1])
 
-    HWMON_CLASS_DIR = "/sys/class/hwmon/hwmon0/"
-    AC5X_THERMAL_DIR = "/sys/class/hwmon/hwmon1/"
+    CN9130_THERMAL_DIR = "/sys/class/hwmon/hwmon1/"
+    ASIC_TEMP_INFO = "ASIC_TEMPERATURE_INFO"
 
-    THERMAL_NAME = ("PCB BACK", "PCB FRONT", "AC5X CORE", "OOB PHY")
+    THERMAL_NAME = ("PCB BACK", "PCB FRONT", "PCB MID", "ASIC", "CPU CORE")
 
     def __init__(self, thermal_index):
         ThermalBase.__init__(self)
@@ -37,7 +39,7 @@ def __init__(self, thermal_index):
         self._maximum = None
         self.thermal_high_threshold_file = None
         # PCB temperature sensors
-        if self.index < 3:
+        if self.index < 4:
             i2c_path = self.I2C_CLASS_DIR + self.I2C_DEV_MAPPING[self.index - 1][0]
             sensor_index = self.I2C_DEV_MAPPING[self.index - 1][1]
             sensor_high_suffix = "max"
@@ -45,24 +47,26 @@ def __init__(self, thermal_index):
             hwmon_node = os.listdir(i2c_path)[0]
             self.SENSOR_DIR = i2c_path + hwmon_node + '/'
 
-        # SOC temperature sensor
-        elif self.index == 3:
-            dev_path = self.AC5X_THERMAL_DIR
-            sensor_index = 1
-            sensor_high_suffix = "max"
+        #ASIC temperature sensor
+        elif self.index == 4:
+            sensor_high_suffix = None
             sensor_high_crit_suffix = None
-            self.SENSOR_DIR = dev_path
-        #
-        else:
-            dev_path = self.HWMON_CLASS_DIR
+            self.sensor_high_threshold = 100.0
+            self.sensor_crit_threshold = 110.0
+            self.SENSOR_DIR = None
+
+        # CPU CN9130 temperature sensor
+        elif self.index == 5:
+            dev_path = self.CN9130_THERMAL_DIR
             sensor_index = 1
-            sensor_high_suffix = None
-            sensor_high_crit_suffix = "crit"
+            sensor_high_suffix = "crit"
+            sensor_high_crit_suffix = "max"
             self.SENSOR_DIR = dev_path
 
         # sysfs file for current temperature value
-        self.thermal_temperature_file = self.SENSOR_DIR \
-            + "temp{}_input".format(sensor_index)
+        if self.SENSOR_DIR:
+            self.thermal_temperature_file = self.SENSOR_DIR \
+                + "temp{}_input".format(sensor_index)
 
         # sysfs file for high threshold value if supported for this sensor
         if sensor_high_suffix:
@@ -156,16 +160,23 @@ def get_temperature(self):
             A float number of current temperature in Celsius up to
             nearest thousandth of one degree Celsius, e.g. 30.125
         """
-        thermal_temperature = self._read_sysfs_file(
-            self.thermal_temperature_file)
-        if (thermal_temperature != 'ERR'):
-            thermal_temperature = float(thermal_temperature) / 1000
-            if self._minimum is None or self._minimum > thermal_temperature:
-                self._minimum = thermal_temperature
-            if self._maximum is None or self._maximum < thermal_temperature:
-                self._maximum = thermal_temperature
+        #read from state_db for asic temperature
+        if self.index == 4:
+            db = SonicV2Connector()
+            db.connect(db.STATE_DB)
+            data_dict = db.get_all(db.STATE_DB, self.ASIC_TEMP_INFO)
+            thermal_temperature = float(data_dict['maximum_temperature'])
         else:
-            thermal_temperature = 0
+            thermal_temperature = self._read_sysfs_file(self.thermal_temperature_file)
+            if (thermal_temperature != 'ERR'):
+                thermal_temperature = float(thermal_temperature) / 1000
+            else:
+                thermal_temperature = 0
+
+        if self._minimum is None or self._minimum > thermal_temperature:
+            self._minimum = thermal_temperature
+        if self._maximum is None or self._maximum < thermal_temperature:
+            self._maximum = thermal_temperature
 
         return float("{:.3f}".format(thermal_temperature))
 
@@ -178,12 +189,13 @@ def get_high_threshold(self):
             Celsius up to nearest thousandth of one degree Celsius,
             e.g. 30.125
         """
+        if self.index == 4:
+            return float("{:.3f}".format(self.sensor_high_threshold))
         # Not implemented for this sensor
         if not self.thermal_high_threshold_file:
             raise  NotImplementedError
 
-        thermal_high_threshold = self._read_sysfs_file(
-            self.thermal_high_threshold_file)
+        thermal_high_threshold = self._read_sysfs_file(self.thermal_high_threshold_file)
         if (thermal_high_threshold != 'ERR'):
             thermal_high_threshold = float(thermal_high_threshold) / 1000
         else:
@@ -213,7 +225,8 @@ def get_high_critical_threshold(self):
             A float number, the high critical threshold temperature of thermal in Celsius
             up to nearest thousandth of one degree Celsius, e.g. 30.125
         """
-
+        if self.index == 4:
+            return float("{:.3f}".format(self.sensor_crit_threshold))
         # Not implemented for this sensor
         if not self.thermal_high_crit_threshold_file:
             raise  NotImplementedError
diff --git a/platform/marvell-arm64/sonic-platform-nokia/7215/sonic_platform/thermal_infos.py b/platform/marvell-arm64/sonic-platform-nokia/7215/sonic_platform/thermal_infos.py
index cf9b0cdee..0f03ee7a4 100644
--- a/platform/marvell-arm64/sonic-platform-nokia/7215/sonic_platform/thermal_infos.py
+++ b/platform/marvell-arm64/sonic-platform-nokia/7215/sonic_platform/thermal_infos.py
@@ -73,14 +73,22 @@ def __init__(self):
         self._current_threshold_level = 0
         self._num_fan_levels = 3
         self._high_crital_threshold = 75
-        self._level_up_threshold = [[31,39,58,46],
-                                    [39,46,65,54],
-                                    [51,57,77,68]]
+        #THERMAL_NAME ("PCB BACK", "PCB FRONT", "PCB MID", "ASIC", "CPU CORE")
+        self._f2b_level_up_threshold = [[38,30,37,60,77],
+                                        [51,44,50,72,90],
+                                        [61,57,61,77,94]]
         
-        self._level_down_threshold = [[24,31,47,40],
-                                      [31,38,53,46],
-                                      [48,54,72,63]]
-
+        self._f2b_level_down_threshold = [[29,24,29,50,64],
+                                          [40,37,40,59,75],
+                                          [58,54,58,72,90]]
+        
+        self._b2f_level_up_threshold = [[30,38,41,65,71],
+                                        [43,50,54,76,86],
+                                        [53,59,61,79,92]]
+        
+        self._b2f_level_down_threshold = [[22,30,33,54,60],
+                                          [37,44,46,62,73],
+                                          [51,57,58,75,90]]
     def collect(self, chassis):
         """
         Collect thermal sensor temperature change status
@@ -99,6 +107,13 @@ def collect(self, chassis):
         for index in range(num_of_thermals):
             self._temps.insert(index, chassis.get_thermal(index).get_temperature())
         
+        fan_direction=chassis.get_fan(1).get_direction()
+        if(fan_direction == "intake"):
+            level_up_threshold=self._f2b_level_up_threshold
+            level_down_threshold=self._f2b_level_down_threshold
+        else:
+            level_up_threshold=self._b2f_level_up_threshold
+            level_down_threshold=self._b2f_level_down_threshold
 
        # Find current required threshold level
         max_level =0
@@ -106,10 +121,10 @@ def collect(self, chassis):
         for index in range(num_of_thermals):
             for level in range(self._num_fan_levels):
 
-                if self._temps[index]>self._level_up_threshold[level][index]:
+                if self._temps[index]>level_up_threshold[level][index]:
                     if max_level<level+1:
                         max_level=level+1
-                if self._temps[index]<self._level_down_threshold[level][index]:
+                if self._temps[index]<level_down_threshold[level][index]:
                     if min_level[index]>level:
                         min_level[index]=level
 
diff --git a/platform/marvell-arm64/sonic-platform-nokia/7215/sonic_platform/watchdog.py b/platform/marvell-arm64/sonic-platform-nokia/7215/sonic_platform/watchdog.py
index cf655448d..052a276af 100644
--- a/platform/marvell-arm64/sonic-platform-nokia/7215/sonic_platform/watchdog.py
+++ b/platform/marvell-arm64/sonic-platform-nokia/7215/sonic_platform/watchdog.py
@@ -6,9 +6,8 @@
 import os
 import fcntl
 import array
-
+import time
 from sonic_platform_base.watchdog_base import WatchdogBase
-from sonic_py_common import logger
 
 """ ioctl constants """
 IO_WRITE = 0x40000000
@@ -34,13 +33,12 @@
 WDIOS_ENABLECARD = 0x0002
 
 """ watchdog sysfs """
-WD_SYSFS_PATH = "/sys/class/watchdog/"
+WD_SYSFS_PATH = "/sys/class/watchdog/watchdog0/"
+WD_GPIO_PATH = "/sys/class/gpio/gpio41/value"
+CPLD_DIR = "/sys/bus/i2c/devices/0-0041/"
 
 WD_COMMON_ERROR = -1
 
-sonic_logger = logger.Logger()
-
-
 class WatchdogImplBase(WatchdogBase):
     """
     Base class that implements common logic for interacting
@@ -53,34 +51,53 @@ def __init__(self, wd_device_path):
         @param wd_device_path Path to watchdog device
         """
         super(WatchdogImplBase, self).__init__()
-
+        
+        self.watchdog=""
         self.watchdog_path = wd_device_path
-        self.watchdog = os.open(self.watchdog_path, os.O_WRONLY)
-
-        # Opening a watchdog descriptor starts
-        # watchdog timer; by default it should be stopped
-        self._disablewatchdog()
-        self.armed = False
+        self.watchdog_gpio_reg = WD_GPIO_PATH
+        self.wd_state_reg = WD_SYSFS_PATH+"state"
+        self.wd_timeout_reg = WD_SYSFS_PATH+"timeout"
+        self.wd_timeleft_reg = WD_SYSFS_PATH+"timeleft"
+    
         self.timeout = self._gettimeout()
 
-    def disarm(self):
-        """
-        Disarm the hardware watchdog
-
-        Returns:
-            A boolean, True if watchdog is disarmed successfully, False
-            if not
-        """
-        sonic_logger.log_info(" Debug disarm watchdog ")
+    def _read_sysfs_file(self, sysfs_file):
+        # On successful read, returns the value read from given
+        # reg_name and on failure returns 'ERR'
+        rv = 'ERR'
 
+        if (not os.path.isfile(sysfs_file)):
+            return rv
         try:
-            self._disablewatchdog()
-            self.armed = False
-            self.timeout = 0
-        except IOError:
-            return False
+            with open(sysfs_file, 'r') as fd:
+                rv = fd.read()
+        except Exception as e:
+            rv = 'ERR'
+
+        rv = rv.rstrip('\r\n')
+        rv = rv.lstrip(" ")
+        return rv
+    
+    def _write_sysfs_file(self, sysfs_file, value):
+        # On successful write, the value read will be written on
+        # reg_name and on failure returns 'ERR'
+        rv = 'ERR'
+
+        if (not os.path.isfile(sysfs_file)):
+            return rv
+        try:
+            with open(sysfs_file, 'w') as fd:
+                rv = fd.write(str(value))
+        except Exception as e:
+            rv = 'ERR'
 
-        return True
+        # Ensure that the write operation has succeeded
+        if (int(self._read_sysfs_file(sysfs_file)) != value ):
+            time.sleep(3)
+            if (int(self._read_sysfs_file(sysfs_file)) != value ):
+                rv = 'ERR'
+
+        return rv
 
     def _disablewatchdog(self):
         """
@@ -89,6 +106,23 @@ def _disablewatchdog(self):
 
         req = array.array('h', [WDIOS_DISABLECARD])
         fcntl.ioctl(self.watchdog, WDIOC_SETOPTIONS, req, False)
+        self._write_sysfs_file(self.watchdog_gpio_reg, 1)
+        self._read_sysfs_file(CPLD_DIR+"last_reset_cause")
+        
+    def _enablewatchdog(self):
+        """
+        Turn on the watchdog timer
+        """
+
+        req = array.array('h', [WDIOS_ENABLECARD])
+        fcntl.ioctl(self.watchdog, WDIOC_SETOPTIONS, req, False)
+
+    def _keepalive(self):
+        """
+        Keep alive watchdog timer
+        """
+
+        fcntl.ioctl(self.watchdog, WDIOC_KEEPALIVE)
 
     def _settimeout(self, seconds):
         """
@@ -107,11 +141,10 @@ def _gettimeout(self):
         Get watchdog timeout
         @return watchdog timeout
         """
+        timeout=0
+        timeout=self._read_sysfs_file(self.wd_timeout_reg)
 
-        req = array.array('I', [0])
-        fcntl.ioctl(self.watchdog, WDIOC_GETTIMEOUT, req, True)
-
-        return int(req[0])
+        return timeout
 
     def _gettimeleft(self):
         """
@@ -128,47 +161,62 @@ def arm(self, seconds):
         """
         Implements arm WatchdogBase API
         """
-        sonic_logger.log_info(" Debug arm watchdog4 ")
+
         ret = WD_COMMON_ERROR
-        if seconds < 0:
+        if (seconds < 0 or seconds > 340 ):
             return ret
-
+        # Stop the watchdog service to gain access of watchdog file pointer
+        if self.is_armed():
+            os.popen("systemctl stop cpu_wdt.service")
+            time.sleep(2)
+        if not self.watchdog:
+            self.watchdog = os.open(self.watchdog_path, os.O_WRONLY)
         try:
             if self.timeout != seconds:
                 self.timeout = self._settimeout(seconds)
-            if self.armed:
+            if self.is_armed():
                 self._keepalive()
             else:
-                sonic_logger.log_info(" Debug arm watchdog5 ")
                 self._enablewatchdog()
-                self.armed = True
             ret = self.timeout
         except IOError:
             pass
-
+        if(ret == seconds):
+            self._write_sysfs_file(self.watchdog_gpio_reg, 0)
         return ret
 
-    def _enablewatchdog(self):
-        """
-        Turn on the watchdog timer
+    def disarm(self):
         """
+        Implements disarm WatchdogBase API
 
-        req = array.array('h', [WDIOS_ENABLECARD])
-        fcntl.ioctl(self.watchdog, WDIOC_SETOPTIONS, req, False)
-
-    def _keepalive(self):
-        """
-        Keep alive watchdog timer
+        Returns:
+            A boolean, True if watchdog is disarmed successfully, False
+            if not
         """
-
-        fcntl.ioctl(self.watchdog, WDIOC_KEEPALIVE)
+        
+        if self.is_armed():
+            os.popen("systemctl stop cpu_wdt.service")
+            time.sleep(2)
+            if not self.watchdog:
+                self.watchdog = os.open(self.watchdog_path, os.O_WRONLY)
+            try:
+                self._disablewatchdog()
+                self.timeout = 0
+            except IOError:
+                return False    
+        return True
 
     def is_armed(self):
         """
         Implements is_armed WatchdogBase API
         """
+        status = False
 
-        return self.armed
+        state = self._read_sysfs_file(self.wd_state_reg)
+        if (state != 'inactive'):
+            status = True
+
+        return status
 
     def get_remaining_time(self):
         """
@@ -177,10 +225,7 @@ def get_remaining_time(self):
 
         timeleft = WD_COMMON_ERROR
 
-        if self.armed:
-            try:
-                timeleft = self._gettimeleft()
-            except IOError:
-                pass
+        if self.is_armed():
+            timeleft=self._read_sysfs_file(self.wd_timeleft_reg)
 
-        return timeleft
+        return int(timeleft)
diff --git a/platform/marvell-arm64/sonic-platform-nokia/debian/rules b/platform/marvell-arm64/sonic-platform-nokia/debian/rules
index 27015185a..de6ed670d 100755
--- a/platform/marvell-arm64/sonic-platform-nokia/debian/rules
+++ b/platform/marvell-arm64/sonic-platform-nokia/debian/rules
@@ -33,7 +33,7 @@ build:
 	(for mod in $(MODULE_DIRS); do \
 		cd $(MOD_SRC_DIR)/../$(PRESTERA_MODULE_SRC)/; \
 		make clean; \
-		make modules -C $(KERNEL_SRC)/build M=`pwd` CONFIG_KM_MVMBUS=y CONFIG_KM_MVINT=y || exit 1; \
+		make modules -C $(KERNEL_SRC)/build M=`pwd` CONFIG_KM_MVPCI=y CONFIG_KM_MVINT=y || exit 1; \
 		mkdir $(MOD_SRC_DIR)/$${mod}/$(MRVL_MODULE_DIR); \
 		cp *.ko $(MOD_SRC_DIR)/$${mod}/$(MRVL_MODULE_DIR)/; \
 		cd $(MOD_SRC_DIR); \
diff --git a/platform/marvell-arm64/sonic-platform-nokia/debian/sonic-platform-nokia-7215.install b/platform/marvell-arm64/sonic-platform-nokia/debian/sonic-platform-nokia-7215.install
index ec9e8d9f6..efa3c696b 100644
--- a/platform/marvell-arm64/sonic-platform-nokia/debian/sonic-platform-nokia-7215.install
+++ b/platform/marvell-arm64/sonic-platform-nokia/debian/sonic-platform-nokia-7215.install
@@ -1,4 +1,6 @@
 7215/scripts/nokia-7215-init.sh usr/local/bin
+7215/scripts/cpu_wdt.py  usr/local/bin
 7215/service/nokia-7215init.service  etc/systemd/system
+7215/service/cpu_wdt.service  etc/systemd/system
 7215/sonic_platform-1.0-py3-none-any.whl usr/share/sonic/device/arm64-nokia_ixs7215_52xb-r0
 ../mrvl-prestera/platform/arm64/ac5x/* /
diff --git a/platform/marvell-arm64/sonic-platform-nokia/debian/sonic-platform-nokia-7215.postinst b/platform/marvell-arm64/sonic-platform-nokia/debian/sonic-platform-nokia-7215.postinst
index e48b6feee..949cd1a28 100644
--- a/platform/marvell-arm64/sonic-platform-nokia/debian/sonic-platform-nokia-7215.postinst
+++ b/platform/marvell-arm64/sonic-platform-nokia/debian/sonic-platform-nokia-7215.postinst
@@ -26,6 +26,9 @@ case "$1" in
         systemctl enable nokia-7215init.service
         systemctl start nokia-7215init.service
 
+        systemctl enable cpu_wdt.service
+        systemctl start cpu_wdt.service
+
     ;;
 
     abort-upgrade|abort-remove|abort-deconfigure)

From 0c44d3ddff510cb977ccfc4a5e6859b450fd92ab Mon Sep 17 00:00:00 2001
From: wumiao_nokia <wu.miao@nokia.com>
Date: Mon, 4 Mar 2024 18:47:07 -0500
Subject: [PATCH 0298/1115] Make macsec container to build with bookworm
 (#18148)

Why I did it
We Nokia took the task to make macsec container to work with bookworm.

This PR requires another PR for sonic-wpa-supplicant(sonic-net/sonic-wpa-supplicant#80) to be in first. Otherwise sonic build will fail for bookworm wpasupplicant debian package.

How I did it
How to verify it
After build and boot up system with new image, macsec container should run with bookworm. Corresponding mgmt macsec suite will work here.

Which release branch to backport (provide reason below if selected)
Tested branch (Please provide the tested image version)
Tested with latest master of sonic-buildimage. Built vs image and loaded into vs testing environment. Code pass with macsec test suites.

Description for the changelog
Make macsec container to build with bookworm
---
 dockers/docker-macsec/Dockerfile.j2 |  2 +-
 rules/docker-macsec.mk              | 15 +++++++--------
 2 files changed, 8 insertions(+), 9 deletions(-)

diff --git a/dockers/docker-macsec/Dockerfile.j2 b/dockers/docker-macsec/Dockerfile.j2
index 3ec18b137..fc8674859 100644
--- a/dockers/docker-macsec/Dockerfile.j2
+++ b/dockers/docker-macsec/Dockerfile.j2
@@ -1,5 +1,5 @@
 {% from "dockers/dockerfile-macros.j2" import install_debian_packages, install_python_wheels, copy_files %}
-FROM docker-config-engine-bullseye-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}}
+FROM docker-swss-layer-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}}
 
 ARG docker_container_name
 
diff --git a/rules/docker-macsec.mk b/rules/docker-macsec.mk
index acadbea64..c36518aaf 100644
--- a/rules/docker-macsec.mk
+++ b/rules/docker-macsec.mk
@@ -6,21 +6,21 @@ DOCKER_MACSEC_DBG = $(DOCKER_MACSEC_STEM)-$(DBG_IMAGE_MARK).gz
 
 $(DOCKER_MACSEC)_PATH = $(DOCKERS_PATH)/$(DOCKER_MACSEC_STEM)
 
-$(DOCKER_MACSEC)_DEPENDS += $(SWSS) $(WPASUPPLICANT) $(LIBSWSSCOMMON) $(LIBNL3) $(LIBNL_GENL3) $(LIBNL_ROUTE3)
-$(DOCKER_MACSEC)_DBG_DEPENDS = $($(DOCKER_CONFIG_ENGINE_BULLSEYE)_DBG_DEPENDS)
-$(DOCKER_MACSEC)_DBG_DEPENDS += $(SWSS_DBG) $(WPASUPPLICANT_DBG) $(LIBSWSSCOMMON_DBG)
+$(DOCKER_MACSEC)_DEPENDS += $(WPASUPPLICANT)
+$(DOCKER_MACSEC)_DBG_DEPENDS = $($(DOCKER_SWSS_LAYER_BOOKWORM)_DBG_DEPENDS)
+$(DOCKER_MACSEC)_DBG_DEPENDS +=  $(WPASUPPLICANT_DBG)
 
-$(DOCKER_MACSEC)_DBG_IMAGE_PACKAGES = $($(DOCKER_CONFIG_ENGINE_BULLSEYE)_DBG_IMAGE_PACKAGES)
+$(DOCKER_MACSEC)_DBG_IMAGE_PACKAGES = $($(DOCKER_SWSS_LAYER_BOOKWORM)_DBG_IMAGE_PACKAGES)
 
-$(DOCKER_MACSEC)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE_BULLSEYE)
+$(DOCKER_MACSEC)_LOAD_DOCKERS += $(DOCKER_SWSS_LAYER_BOOKWORM)
 
 $(DOCKER_MACSEC)_INSTALL_PYTHON_WHEELS = $(SONIC_UTILITIES_PY3)
 $(DOCKER_MACSEC)_INSTALL_DEBS = $(PYTHON3_SWSSCOMMON) $(LIBYANG_PY3)
 
 SONIC_DOCKER_IMAGES += $(DOCKER_MACSEC)
-SONIC_BULLSEYE_DOCKERS += $(DOCKER_MACSEC)
+SONIC_BOOKWORM_DOCKERS += $(DOCKER_MACSEC)
 SONIC_DOCKER_DBG_IMAGES += $(DOCKER_MACSEC_DBG)
-SONIC_BULLSEYE_DBG_DOCKERS += $(DOCKER_MACSEC_DBG)
+SONIC_BOOKWORM_DBG_DOCKERS += $(DOCKER_MACSEC_DBG)
 
 ifeq ($(INCLUDE_KUBERNETES),y)
 $(DOCKER_MACSEC)_DEFAULT_FEATURE_OWNER = kube
@@ -28,7 +28,6 @@ endif
 
 $(DOCKER_MACSEC)_DEFAULT_FEATURE_STATE_ENABLED = y
 
-
 ifeq ($(INCLUDE_MACSEC),y)
 ifeq ($(INSTALL_DEBUG_TOOLS),y)
 SONIC_PACKAGES_LOCAL += $(DOCKER_MACSEC_DBG)

From 10ec32cbe87ef0d563aba1b5a2af8631c56e9c81 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Tue, 5 Mar 2024 19:01:26 +0800
Subject: [PATCH 0299/1115] [submodule] Update submodule sonic-platform-common
 to the latest HEAD automatically (#18260)

#### Why I did it
src/sonic-platform-common
```
* 56921d8 - (HEAD -> master, origin/master, origin/HEAD) File system based sensors implementation for voltage and current sensors (#426) (21 hours ago) [Mridul Bajpai]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-platform-common | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-platform-common b/src/sonic-platform-common
index 3d354047c..56921d80e 160000
--- a/src/sonic-platform-common
+++ b/src/sonic-platform-common
@@ -1 +1 @@
-Subproject commit 3d354047c8f0b26228fcdf3d5bdceca1eebf5744
+Subproject commit 56921d80e42971f2579115f26c5194b9e0ecbc05

From 16b31f233802e9b4403a29a1acb132e3075d0aac Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Tue, 5 Mar 2024 19:01:39 +0800
Subject: [PATCH 0300/1115] [submodule] Update submodule sonic-mgmt-common to
 the latest HEAD automatically (#18257)

#### Why I did it
src/sonic-mgmt-common
```
* fbb5fcd - (HEAD -> master, origin/master, origin/HEAD) Script to populate the test data to the simulator db (10 hours ago) [Sachin Holla]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-mgmt-common | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-mgmt-common b/src/sonic-mgmt-common
index 99052691c..fbb5fcdb9 160000
--- a/src/sonic-mgmt-common
+++ b/src/sonic-mgmt-common
@@ -1 +1 @@
-Subproject commit 99052691c3aa2c9ddaf5f69104af12677a387d4d
+Subproject commit fbb5fcdb9c8fc142b2840f99c6aa25894c369185

From a6a8d198b06d784a018c9a539b7428211974ebc3 Mon Sep 17 00:00:00 2001
From: Shashanka Balakuntala
 <135858627+shbalaku-microsoft@users.noreply.github.com>
Date: Tue, 5 Mar 2024 22:58:26 +0530
Subject: [PATCH 0301/1115] Added new test case to check docker-dhcp-relay file
 generation when secondary subnets are present (#17263)

* Added new test case to check docker-dhcp-relay file generation when secondary subnets are present
---
 ...p-relay-secondary-subnets.supervisord.conf | 107 ++
 ...p-relay-secondary-subnets.supervisord.conf | 107 ++
 .../t0-sample-graph-secondary-subnets.xml     | 943 ++++++++++++++++++
 src/sonic-config-engine/tests/test_j2files.py |   9 +
 4 files changed, 1166 insertions(+)
 create mode 100644 src/sonic-config-engine/tests/sample_output/py2/docker-dhcp-relay-secondary-subnets.supervisord.conf
 create mode 100644 src/sonic-config-engine/tests/sample_output/py3/docker-dhcp-relay-secondary-subnets.supervisord.conf
 create mode 100644 src/sonic-config-engine/tests/t0-sample-graph-secondary-subnets.xml

diff --git a/src/sonic-config-engine/tests/sample_output/py2/docker-dhcp-relay-secondary-subnets.supervisord.conf b/src/sonic-config-engine/tests/sample_output/py2/docker-dhcp-relay-secondary-subnets.supervisord.conf
new file mode 100644
index 000000000..4f28edaa4
--- /dev/null
+++ b/src/sonic-config-engine/tests/sample_output/py2/docker-dhcp-relay-secondary-subnets.supervisord.conf
@@ -0,0 +1,107 @@
+[supervisord]
+logfile_maxbytes=1MB
+logfile_backups=2
+nodaemon=true
+
+[eventlistener:dependent-startup]
+command=python3 -m supervisord_dependent_startup
+autostart=true
+autorestart=unexpected
+startretries=0
+exitcodes=0,3
+events=PROCESS_STATE
+buffer_size=1024
+
+[eventlistener:supervisor-proc-exit-listener]
+command=/usr/bin/supervisor-proc-exit-listener --container-name dhcp_relay
+events=PROCESS_STATE_EXITED,PROCESS_STATE_RUNNING
+autostart=true
+autorestart=unexpected
+buffer_size=1024
+
+[program:rsyslogd]
+command=/usr/sbin/rsyslogd -n -iNONE
+priority=1
+autostart=false
+autorestart=false
+stdout_logfile=syslog
+stderr_logfile=syslog
+dependent_startup=true
+
+[program:start]
+command=/usr/bin/start.sh
+priority=2
+autostart=false
+autorestart=false
+startsecs=0
+stdout_logfile=syslog
+stderr_logfile=syslog
+dependent_startup=true
+dependent_startup_wait_for=rsyslogd:running
+
+[group:dhcp-relay]
+programs=dhcprelayd,dhcp6relay
+
+[program:isc-dhcpv4-relay-Vlan1000]
+command=/usr/sbin/dhcrelay -d -m discard -a %%h:%%p %%P --name-alias-map-file /tmp/port-name-alias-map.txt -id Vlan1000 -iu Vlan2000 -iu PortChannel02 -iu PortChannel03 -iu PortChannel04 -iu PortChannel01 -pg 192.168.0.1 192.0.0.1 192.0.0.2
+priority=3
+autostart=false
+autorestart=false
+stdout_logfile=syslog
+stderr_logfile=syslog
+dependent_startup=true
+dependent_startup_wait_for=start:exited
+
+[program:isc-dhcpv4-relay-Vlan2000]
+command=/usr/sbin/dhcrelay -d -m discard -a %%h:%%p %%P --name-alias-map-file /tmp/port-name-alias-map.txt -id Vlan2000 -iu Vlan1000 -iu Vlan1000 -iu PortChannel02 -iu PortChannel03 -iu PortChannel04 -iu PortChannel01 192.0.0.3 192.0.0.4
+priority=3
+autostart=false
+autorestart=false
+stdout_logfile=syslog
+stderr_logfile=syslog
+dependent_startup=true
+dependent_startup_wait_for=start:exited
+
+
+[program:dhcp6relay]
+command=/usr/sbin/dhcp6relay
+priority=3
+autostart=false
+autorestart=false
+stdout_logfile=syslog
+stderr_logfile=syslog
+dependent_startup=true
+dependent_startup_wait_for=start:exited
+
+[group:dhcpmon]
+programs=dhcpmon-Vlan1000,dhcpmon-Vlan2000
+
+[program:dhcpmon-Vlan1000]
+command=/usr/sbin/dhcpmon -id Vlan1000 -iu Vlan2000 -iu PortChannel02 -iu PortChannel03 -iu PortChannel04 -iu PortChannel01 -im eth0
+priority=4
+autostart=false
+autorestart=false
+stdout_logfile=syslog
+stderr_logfile=syslog
+dependent_startup=true
+dependent_startup_wait_for=isc-dhcpv4-relay-Vlan1000:running 
+
+[program:dhcpmon-Vlan2000]
+command=/usr/sbin/dhcpmon -id Vlan2000 -iu Vlan1000 -iu Vlan1000 -iu PortChannel02 -iu PortChannel03 -iu PortChannel04 -iu PortChannel01 -im eth0
+priority=4
+autostart=false
+autorestart=false
+stdout_logfile=syslog
+stderr_logfile=syslog
+dependent_startup=true
+dependent_startup_wait_for=isc-dhcpv4-relay-Vlan2000:running 
+
+[program:dhcprelayd]
+command=/usr/local/bin/dhcprelayd
+priority=3
+autostart=false
+autorestart=false
+stdout_logfile=syslog
+stderr_logfile=syslog
+dependent_startup=true
+dependent_startup_wait_for=start:exited
diff --git a/src/sonic-config-engine/tests/sample_output/py3/docker-dhcp-relay-secondary-subnets.supervisord.conf b/src/sonic-config-engine/tests/sample_output/py3/docker-dhcp-relay-secondary-subnets.supervisord.conf
new file mode 100644
index 000000000..80a172ef2
--- /dev/null
+++ b/src/sonic-config-engine/tests/sample_output/py3/docker-dhcp-relay-secondary-subnets.supervisord.conf
@@ -0,0 +1,107 @@
+[supervisord]
+logfile_maxbytes=1MB
+logfile_backups=2
+nodaemon=true
+
+[eventlistener:dependent-startup]
+command=python3 -m supervisord_dependent_startup
+autostart=true
+autorestart=unexpected
+startretries=0
+exitcodes=0,3
+events=PROCESS_STATE
+buffer_size=1024
+
+[eventlistener:supervisor-proc-exit-listener]
+command=/usr/bin/supervisor-proc-exit-listener --container-name dhcp_relay
+events=PROCESS_STATE_EXITED,PROCESS_STATE_RUNNING
+autostart=true
+autorestart=unexpected
+buffer_size=1024
+
+[program:rsyslogd]
+command=/usr/sbin/rsyslogd -n -iNONE
+priority=1
+autostart=false
+autorestart=false
+stdout_logfile=syslog
+stderr_logfile=syslog
+dependent_startup=true
+
+[program:start]
+command=/usr/bin/start.sh
+priority=2
+autostart=false
+autorestart=false
+startsecs=0
+stdout_logfile=syslog
+stderr_logfile=syslog
+dependent_startup=true
+dependent_startup_wait_for=rsyslogd:running
+
+[group:dhcp-relay]
+programs=dhcprelayd,dhcp6relay
+
+[program:isc-dhcpv4-relay-Vlan1000]
+command=/usr/sbin/dhcrelay -d -m discard -a %%h:%%p %%P --name-alias-map-file /tmp/port-name-alias-map.txt -id Vlan1000 -iu Vlan2000 -iu PortChannel01 -iu PortChannel02 -iu PortChannel03 -iu PortChannel04 -pg 192.168.0.1 192.0.0.1 192.0.0.2
+priority=3
+autostart=false
+autorestart=false
+stdout_logfile=syslog
+stderr_logfile=syslog
+dependent_startup=true
+dependent_startup_wait_for=start:exited
+
+[program:isc-dhcpv4-relay-Vlan2000]
+command=/usr/sbin/dhcrelay -d -m discard -a %%h:%%p %%P --name-alias-map-file /tmp/port-name-alias-map.txt -id Vlan2000 -iu Vlan1000 -iu Vlan1000 -iu PortChannel01 -iu PortChannel02 -iu PortChannel03 -iu PortChannel04 192.0.0.3 192.0.0.4
+priority=3
+autostart=false
+autorestart=false
+stdout_logfile=syslog
+stderr_logfile=syslog
+dependent_startup=true
+dependent_startup_wait_for=start:exited
+
+
+[program:dhcp6relay]
+command=/usr/sbin/dhcp6relay
+priority=3
+autostart=false
+autorestart=false
+stdout_logfile=syslog
+stderr_logfile=syslog
+dependent_startup=true
+dependent_startup_wait_for=start:exited
+
+[group:dhcpmon]
+programs=dhcpmon-Vlan1000,dhcpmon-Vlan2000
+
+[program:dhcpmon-Vlan1000]
+command=/usr/sbin/dhcpmon -id Vlan1000 -iu Vlan2000 -iu PortChannel01 -iu PortChannel02 -iu PortChannel03 -iu PortChannel04 -im eth0
+priority=4
+autostart=false
+autorestart=false
+stdout_logfile=syslog
+stderr_logfile=syslog
+dependent_startup=true
+dependent_startup_wait_for=isc-dhcpv4-relay-Vlan1000:running 
+
+[program:dhcpmon-Vlan2000]
+command=/usr/sbin/dhcpmon -id Vlan2000 -iu Vlan1000 -iu Vlan1000 -iu PortChannel01 -iu PortChannel02 -iu PortChannel03 -iu PortChannel04 -im eth0
+priority=4
+autostart=false
+autorestart=false
+stdout_logfile=syslog
+stderr_logfile=syslog
+dependent_startup=true
+dependent_startup_wait_for=isc-dhcpv4-relay-Vlan2000:running 
+
+[program:dhcprelayd]
+command=/usr/local/bin/dhcprelayd
+priority=3
+autostart=false
+autorestart=false
+stdout_logfile=syslog
+stderr_logfile=syslog
+dependent_startup=true
+dependent_startup_wait_for=start:exited
diff --git a/src/sonic-config-engine/tests/t0-sample-graph-secondary-subnets.xml b/src/sonic-config-engine/tests/t0-sample-graph-secondary-subnets.xml
new file mode 100644
index 000000000..fb142d763
--- /dev/null
+++ b/src/sonic-config-engine/tests/t0-sample-graph-secondary-subnets.xml
@@ -0,0 +1,943 @@
+<DeviceMiniGraph xmlns="Microsoft.Search.Autopilot.Evolution" xmlns:i="http://www.w3.org/2001/XMLSchema-instance">
+  <CpgDec>
+    <IsisRouters xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+    <PeeringSessions>
+       <BGPSession>
+         <StartRouter>switch-t0</StartRouter>
+         <StartPeer>10.1.0.32</StartPeer>
+         <EndRouter>BGPMonitor</EndRouter>
+         <EndPeer>10.20.30.40</EndPeer>
+         <Multihop>30</Multihop>
+         <HoldTime>10</HoldTime>
+         <KeepAliveTime>3</KeepAliveTime>
+      </BGPSession>
+      <BGPSession>
+        <MacSec>false</MacSec>
+        <StartRouter>switch-t0</StartRouter>
+        <StartPeer>10.0.0.56</StartPeer>
+        <EndRouter>ARISTA01T1</EndRouter>
+        <EndPeer>10.0.0.57</EndPeer>
+        <Multihop>1</Multihop>
+        <HoldTime>180</HoldTime>
+        <KeepAliveTime>60</KeepAliveTime>
+      </BGPSession>
+      <BGPSession>
+        <StartRouter>switch-t0</StartRouter>
+        <StartPeer>FC00::71</StartPeer>
+        <EndRouter>ARISTA01T1</EndRouter>
+        <EndPeer>FC00::72</EndPeer>
+        <Multihop>1</Multihop>
+        <HoldTime>180</HoldTime>
+        <KeepAliveTime>60</KeepAliveTime>
+      </BGPSession>
+      <BGPSession>
+        <MacSec>false</MacSec>
+        <StartRouter>switch-t0</StartRouter>
+        <StartPeer>10.0.0.58</StartPeer>
+        <EndRouter>ARISTA02T1</EndRouter>
+        <EndPeer>10.0.0.59</EndPeer>
+        <Multihop>1</Multihop>
+        <HoldTime>180</HoldTime>
+        <KeepAliveTime>60</KeepAliveTime>
+      </BGPSession>
+      <BGPSession>
+        <StartRouter>switch-t0</StartRouter>
+        <StartPeer>FC00::75</StartPeer>
+        <EndRouter>ARISTA02T1</EndRouter>
+        <EndPeer>FC00::76</EndPeer>
+        <Multihop>1</Multihop>
+        <HoldTime>180</HoldTime>
+        <KeepAliveTime>60</KeepAliveTime>
+      </BGPSession>
+      <BGPSession>
+        <MacSec>false</MacSec>
+        <StartRouter>switch-t0</StartRouter>
+        <StartPeer>10.0.0.60</StartPeer>
+        <EndRouter>ARISTA03T1</EndRouter>
+        <EndPeer>10.0.0.61</EndPeer>
+        <Multihop>1</Multihop>
+        <HoldTime>180</HoldTime>
+        <KeepAliveTime>60</KeepAliveTime>
+      </BGPSession>
+      <BGPSession>
+        <StartRouter>switch-t0</StartRouter>
+        <StartPeer>FC00::79</StartPeer>
+        <EndRouter>ARISTA03T1</EndRouter>
+        <EndPeer>FC00::7A</EndPeer>
+        <Multihop>1</Multihop>
+        <HoldTime>180</HoldTime>
+        <KeepAliveTime>60</KeepAliveTime>
+      </BGPSession>
+      <BGPSession>
+        <MacSec>false</MacSec>
+        <StartRouter>switch-t0</StartRouter>
+        <StartPeer>10.0.0.62</StartPeer>
+        <EndRouter>ARISTA04T1</EndRouter>
+        <EndPeer>10.0.0.63</EndPeer>
+        <Multihop>1</Multihop>
+        <HoldTime>180</HoldTime>
+        <KeepAliveTime>60</KeepAliveTime>
+      </BGPSession>
+      <BGPSession>
+        <StartRouter>switch-t0</StartRouter>
+        <StartPeer>FC00::7D</StartPeer>
+        <EndRouter>ARISTA04T1</EndRouter>
+        <EndPeer>FC00::7E</EndPeer>
+        <Multihop>1</Multihop>
+        <HoldTime>180</HoldTime>
+        <KeepAliveTime>60</KeepAliveTime>
+      </BGPSession>
+    </PeeringSessions>
+    <Routers xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution">
+      <a:BGPRouterDeclaration>
+          <a:ASN>1</a:ASN>
+          <a:BgpGroups/>
+          <a:Hostname>BGPMonitor</a:Hostname>
+          <a:Peers>
+              <BGPPeer>
+                  <ElementType>BGPPeer</ElementType>
+                  <Address>10.1.0.32</Address>
+                  <RouteMapIn i:nil="true"/>
+                  <RouteMapOut i:nil="true"/>
+                  <Vrf i:nil="true"/>
+              </BGPPeer>
+          </a:Peers>
+          <a:RouteMaps/>
+      </a:BGPRouterDeclaration>
+      <a:BGPRouterDeclaration>
+        <a:ASN>65100</a:ASN>
+        <a:Hostname>switch-t0</a:Hostname>
+        <a:Peers>
+          <BGPPeer>
+            <Address>10.0.0.57</Address>
+            <RouteMapIn i:nil="true"/>
+            <RouteMapOut i:nil="true"/>
+            <Vrf i:nil="true"/>
+          </BGPPeer>
+          <BGPPeer>
+            <Address>10.0.0.59</Address>
+            <RouteMapIn i:nil="true"/>
+            <RouteMapOut i:nil="true"/>
+            <Vrf i:nil="true"/>
+          </BGPPeer>
+          <BGPPeer>
+            <Address>10.0.0.61</Address>
+            <RouteMapIn i:nil="true"/>
+            <RouteMapOut i:nil="true"/>
+            <Vrf i:nil="true"/>
+          </BGPPeer>
+          <BGPPeer>
+            <Address>10.0.0.63</Address>
+            <RouteMapIn i:nil="true"/>
+            <RouteMapOut i:nil="true"/>
+            <Vrf i:nil="true"/>
+          </BGPPeer>
+        </a:Peers>
+        <a:RouteMaps/>
+      </a:BGPRouterDeclaration>
+      <a:BGPRouterDeclaration>
+        <a:ASN>64600</a:ASN>
+        <a:Hostname>ARISTA01T1</a:Hostname>
+        <a:RouteMaps/>
+      </a:BGPRouterDeclaration>
+      <a:BGPRouterDeclaration>
+        <a:ASN>64600</a:ASN>
+        <a:Hostname>ARISTA02T1</a:Hostname>
+        <a:RouteMaps/>
+      </a:BGPRouterDeclaration>
+      <a:BGPRouterDeclaration>
+        <a:ASN>64600</a:ASN>
+        <a:Hostname>ARISTA03T1</a:Hostname>
+        <a:RouteMaps/>
+      </a:BGPRouterDeclaration>
+      <a:BGPRouterDeclaration>
+        <a:ASN>64600</a:ASN>
+        <a:Hostname>ARISTA04T1</a:Hostname>
+        <a:RouteMaps/>
+      </a:BGPRouterDeclaration>
+    </Routers>
+  </CpgDec>
+  <DpgDec>
+    <DeviceDataPlaneInfo>
+      <IPSecTunnels/>
+      <LoopbackIPInterfaces xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution">
+        <a:LoopbackIPInterface>
+          <Name>HostIP</Name>
+          <AttachTo>Loopback0</AttachTo>
+          <a:Prefix xmlns:b="Microsoft.Search.Autopilot.Evolution">
+            <b:IPPrefix>10.1.0.32/32</b:IPPrefix>
+          </a:Prefix>
+          <a:PrefixStr>10.1.0.32/32</a:PrefixStr>
+        </a:LoopbackIPInterface>
+        <a:LoopbackIPInterface>
+          <Name>HostIP1</Name>
+          <AttachTo>Loopback0</AttachTo>
+          <a:Prefix xmlns:b="Microsoft.Search.Autopilot.Evolution">
+            <b:IPPrefix>FC00:1::32/128</b:IPPrefix>
+          </a:Prefix>
+          <a:PrefixStr>FC00:1::32/128</a:PrefixStr>
+        </a:LoopbackIPInterface>
+        <a:LoopbackIPInterface>
+          <Name>LoopbackIP1</Name>
+          <AttachTo>Loopback1</AttachTo>
+          <a:Prefix xmlns:b="Microsoft.Search.Autopilot.Evolution">
+            <b:IPPrefix>10.10.0.99/32</b:IPPrefix>
+          </a:Prefix>
+          <a:PrefixStr>10.10.0.99/32</a:PrefixStr>
+        </a:LoopbackIPInterface>
+        <a:LoopbackIPInterface>
+          <Name>LoopbackIP2</Name>
+          <AttachTo>Loopback2</AttachTo>
+          <a:Prefix xmlns:b="Microsoft.Search.Autopilot.Evolution">
+            <b:IPPrefix>10.21.0.64/32</b:IPPrefix>
+          </a:Prefix>
+          <a:PrefixStr>10.21.0.64/32</a:PrefixStr>
+        </a:LoopbackIPInterface>
+        <a:LoopbackIPInterface>
+          <Name>LoopbackIP3</Name>
+          <AttachTo>Loopback3</AttachTo>
+          <a:Prefix xmlns:b="Microsoft.Search.Autopilot.Evolution">
+            <b:IPPrefix>10.21.64.2/32</b:IPPrefix>
+          </a:Prefix>
+          <a:PrefixStr>10.21.64.2/32</a:PrefixStr>
+        </a:LoopbackIPInterface>
+       </LoopbackIPInterfaces>
+      <ManagementIPInterfaces xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution">
+        <a:ManagementIPInterface>
+          <Name>HostIP</Name>
+          <AttachTo>eth0</AttachTo>
+          <a:Prefix xmlns:b="Microsoft.Search.Autopilot.Evolution">
+            <b:IPPrefix>10.0.0.100/24</b:IPPrefix>
+          </a:Prefix>
+          <a:PrefixStr>10.0.0.100/24</a:PrefixStr>
+        </a:ManagementIPInterface>
+        <a:ManagementIPInterface>
+          <Name>HostIP</Name>
+          <AttachTo>eth0</AttachTo>
+          <a:Prefix xmlns:b="Microsoft.Search.Autopilot.Evolution">
+            <b:IPPrefix>2603:10e2:0:2902::8/64</b:IPPrefix>
+          </a:Prefix>
+          <a:PrefixStr>2603:10e2:0:2902::8/64</a:PrefixStr>
+        </a:ManagementIPInterface>
+      </ManagementIPInterfaces>
+      <ManagementVIPInterfaces xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+      <MplsInterfaces/>
+      <MplsTeInterfaces/>
+      <RsvpInterfaces/>
+      <Hostname>switch-t0</Hostname>
+      <PortChannelInterfaces>
+        <PortChannel>
+          <Name>PortChannel01</Name>
+          <AttachTo>fortyGigE0/112</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <Name>PortChannel02</Name>
+          <AttachTo>fortyGigE0/116</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <Name>PortChannel03</Name>
+          <AttachTo>fortyGigE0/120</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <Name>PortChannel04</Name>
+          <AttachTo>fortyGigE0/124</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+      </PortChannelInterfaces>
+      <VlanInterfaces>
+        <VlanInterface>
+          <Name>Vlan1000</Name>
+          <AttachTo>fortyGigE0/4;fortyGigE0/8;fortyGigE0/12;fortyGigE0/16;fortyGigE0/20;fortyGigE0/24;fortyGigE0/28;fortyGigE0/32;fortyGigE0/36;fortyGigE0/40;fortyGigE0/44;fortyGigE0/48;fortyGigE0/52;fortyGigE0/56;fortyGigE0/60;fortyGigE0/64;fortyGigE0/68;fortyGigE0/72;fortyGigE0/76;fortyGigE0/80;fortyGigE0/84;fortyGigE0/88;fortyGigE0/92;fortyGigE0/96</AttachTo>
+          <NoDhcpRelay>False</NoDhcpRelay>
+          <StaticDHCPRelay>0.0.0.0/0</StaticDHCPRelay>
+          <FhrpProtoType i:nil="true"/>
+          <Type i:nil="true"/>
+          <DhcpRelays>192.0.0.1;192.0.0.2</DhcpRelays>
+          <Dhcpv6Relays>fc02:2000::1;fc02:2000::2</Dhcpv6Relays>
+          <VlanID>1000</VlanID>
+          <Tag>1000</Tag>
+          <Subnets>192.168.0.0/27</Subnets>
+          <MacAddress i:nil="true"/>
+          <SecondarySubnets>192.168.1.0/27</SecondarySubnets>
+        </VlanInterface>
+        <VlanInterface>
+          <Name>Vlan2000</Name>
+          <AttachTo>fortyGigE0/112;fortyGigE0/116;fortyGigE0/120</AttachTo>
+          <NoDhcpRelay>False</NoDhcpRelay>
+          <StaticDHCPRelay>0.0.0.0/0</StaticDHCPRelay>
+          <FhrpProtoType i:nil="true"/>
+          <Type i:nil="true"/>
+          <DhcpRelays>192.0.0.3;192.0.0.4</DhcpRelays>
+          <Dhcpv6Relays>fc02:2000::3;fc02:2000::4</Dhcpv6Relays>
+          <VlanID>2000</VlanID>
+          <Tag>2000</Tag>
+          <Subnets>192.168.200.0/27</Subnets>
+          <MacAddress i:nil="true"/>
+          <SecondarySubnets/>
+        </VlanInterface>
+        <VlanInterface>
+          <Name>Vlan99</Name>
+          <AttachTo>fortyGigE0/100</AttachTo>
+          <NoDhcpRelay>False</NoDhcpRelay>
+          <StaticDHCPRelay>0.0.0.0/0</StaticDHCPRelay>
+          <FhrpProtoType i:nil="true"/>
+          <Type>UserDefinedL2Vlan</Type>
+          <DhcpRelays>192.0.0.1;192.0.0.2</DhcpRelays>
+          <VlanID>99</VlanID>
+          <Tag>99</Tag>
+          <Subnets/>
+          <MacAddress i:nil="true"/>
+          <SecondarySubnets/>
+        </VlanInterface>
+        <VlanInterface>
+          <Name>Vlan98</Name>
+          <AttachTo>fortyGigE0/100;PortChannel01;PortChannel03</AttachTo>
+          <NoDhcpRelay>False</NoDhcpRelay>
+          <StaticDHCPRelay>0.0.0.0/0</StaticDHCPRelay>
+          <FhrpProtoType i:nil="true"/>
+          <Type>UserDefinedL2Vlan</Type>
+          <DhcpRelays>192.0.0.1;192.0.0.2</DhcpRelays>
+          <VlanID>98</VlanID>
+          <Tag>98</Tag>
+          <Subnets/>
+          <MacAddress i:nil="true"/>
+          <SecondarySubnets/>
+        </VlanInterface>
+      </VlanInterfaces>
+      <IPInterfaces>
+        <IPInterface>
+          <Name i:nil="true"/>
+          <AttachTo>PortChannel01</AttachTo>
+          <Prefix>10.0.0.56/31</Prefix>
+        </IPInterface>
+        <IPInterface>
+          <Name i:Name="true"/>
+          <AttachTo>PortChannel01</AttachTo>
+          <Prefix>FC00::71/126</Prefix>
+        </IPInterface>
+        <IPInterface>
+          <Name i:nil="true"/>
+          <AttachTo>PortChannel02</AttachTo>
+          <Prefix>10.0.0.58/31</Prefix>
+        </IPInterface>
+        <IPInterface>
+          <Name i:Name="true"/>
+          <AttachTo>PortChannel02</AttachTo>
+          <Prefix>FC00::75/126</Prefix>
+        </IPInterface>
+        <IPInterface>
+          <Name i:nil="true"/>
+          <AttachTo>PortChannel03</AttachTo>
+          <Prefix>10.0.0.60/31</Prefix>
+        </IPInterface>
+        <IPInterface>
+          <Name i:Name="true"/>
+          <AttachTo>PortChannel03</AttachTo>
+          <Prefix>FC00::79/126</Prefix>
+        </IPInterface>
+        <IPInterface>
+          <Name i:nil="true"/>
+          <AttachTo>PortChannel04</AttachTo>
+          <Prefix>10.0.0.62/31</Prefix>
+        </IPInterface>
+        <IPInterface>
+          <Name i:Name="true"/>
+          <AttachTo>PortChannel04</AttachTo>
+          <Prefix>FC00::7D/126</Prefix>
+        </IPInterface>
+        <IPInterface>
+          <Name i:nil="true"/>
+          <AttachTo>Vlan1000</AttachTo>
+          <Prefix>192.168.0.1/27</Prefix>
+        </IPInterface>
+        <IPInterface>
+          <Name i:nil="true"/>
+          <AttachTo>Vlan1000</AttachTo>
+          <Prefix>192.168.1.1/27</Prefix>
+        </IPInterface>
+        <IPInterface>
+          <Name i:nil="true"/>
+          <AttachTo>Vlan2000</AttachTo>
+          <Prefix>192.168.200.1/27</Prefix>
+        </IPInterface>
+      </IPInterfaces>
+      <DataAcls/>
+      <AclInterfaces>
+        <AclInterface>
+          <AttachTo>ERSPAN</AttachTo>
+          <InAcl>everflow</InAcl>
+          <Type>Everflow</Type>
+        </AclInterface>
+        <AclInterface>
+          <AttachTo>ERSPANv6</AttachTo>
+          <InAcl>everflowV6</InAcl>
+          <Type>Everflow</Type>
+        </AclInterface>
+	<AclInterface>
+          <AttachTo>EGRESS_ERSPAN</AttachTo>
+	  <OutAcl>everflow_egress</OutAcl>
+	  <Type>Everflow</Type>
+        </AclInterface>
+        <AclInterface>
+          <AttachTo>PortChannel01;PortChannel02;PortChannel03;PortChannel04</AttachTo>
+          <InAcl>DataAclIngress</InAcl>
+          <Type>DataPlane</Type>
+        </AclInterface>
+        <AclInterface>
+          <AttachTo>PortChannel01;PortChannel02;Vlan98</AttachTo>
+          <OutAcl>DataAclEgress</OutAcl>
+          <Type>DataPlane</Type>
+        </AclInterface>
+        <AclInterface>
+          <AttachTo>SNMP</AttachTo>
+          <InAcl>SNMP_ACL</InAcl>
+          <Type>SNMP</Type>
+        </AclInterface>
+        <AclInterface>
+          <AttachTo>NTP</AttachTo>
+          <InAcl>NTP_ACL</InAcl>
+          <Type>NTP</Type>
+        </AclInterface>
+        <AclInterface>
+          <AttachTo>SSH</AttachTo>
+          <InAcl>SSH_ACL</InAcl>
+          <Type>SSH</Type>
+        </AclInterface>
+        <AclInterface>
+          <AttachTo>SSH</AttachTo>
+          <InAcl>ROUTER-PROTECT</InAcl>
+          <Type>SSH</Type>
+        </AclInterface>
+        <AclInterface>
+          <AttachTo>SNMP</AttachTo>
+          <InAcl>ROUTER-PROTECT</InAcl>
+          <Type>SNMP</Type>
+        </AclInterface>
+        <AclInterface>
+          <AttachTo>NTP</AttachTo>
+          <InAcl>NTP_ACL</InAcl>
+        </AclInterface>
+      </AclInterfaces>
+      <DownstreamSummaries/>
+      <DownstreamSummarySet xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+    </DeviceDataPlaneInfo>
+  </DpgDec>
+  <PngDec>
+    <DeviceInterfaceLinks>
+      <DeviceLinkBase>
+        <ElementType>DeviceInterfaceLink</ElementType>
+        <EndDevice>ARISTA01T1</EndDevice>
+        <EndPort>Ethernet1/1</EndPort>
+        <StartDevice>switch-t0</StartDevice>
+        <StartPort>fortyGigE0/112</StartPort>
+      </DeviceLinkBase>
+      <DeviceLinkBase>
+        <ElementType>DeviceInterfaceLink</ElementType>
+        <EndDevice>ARISTA02T1</EndDevice>
+        <EndPort>Ethernet1/1</EndPort>
+        <StartDevice>switch-t0</StartDevice>
+        <StartPort>fortyGigE0/116</StartPort>
+      </DeviceLinkBase>
+      <DeviceLinkBase>
+        <ElementType>DeviceInterfaceLink</ElementType>
+        <EndDevice>ARISTA03T1</EndDevice>
+        <EndPort>Ethernet1/1</EndPort>
+        <StartDevice>switch-t0</StartDevice>
+        <StartPort>fortyGigE0/120</StartPort>
+      </DeviceLinkBase>
+      <DeviceLinkBase>
+        <ElementType>DeviceInterfaceLink</ElementType>
+        <EndDevice>ARISTA04T1</EndDevice>
+        <EndPort>Ethernet1/1</EndPort>
+        <StartDevice>switch-t0</StartDevice>
+        <StartPort>fortyGigE0/124</StartPort>
+        <Bandwidth>100000</Bandwidth>
+      </DeviceLinkBase>
+      <DeviceLinkBase>
+        <ElementType>DeviceInterfaceLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <EndDevice>switch-t0</EndDevice>
+        <EndPort>fortyGigE0/4</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>ARISTA05T1</StartDevice>
+        <StartPort>Ethernet1/33</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase>
+        <ElementType>DeviceInterfaceLink</ElementType>
+        <EndDevice>Servers0</EndDevice>
+        <EndPort>eth0</EndPort>
+        <StartDevice>switch-t0</StartDevice>
+        <StartPort>fortyGigE0/4</StartPort>
+      </DeviceLinkBase>
+      <DeviceLinkBase>
+        <ElementType>DeviceInterfaceLink</ElementType>
+        <EndDevice>Servers100</EndDevice>
+        <EndPort>eth0</EndPort>
+        <StartDevice>switch-t0</StartDevice>
+        <StartPort>fortyGigE0/100</StartPort>
+      </DeviceLinkBase>
+    </DeviceInterfaceLinks>
+    <Devices>
+      <Device i:type="ToRRouter">
+        <Hostname>switch-t0</Hostname>
+        <HwSku>Force10-S6000</HwSku>
+      </Device>
+      <Device i:type="LeafRouter">
+        <Hostname>ARISTA01T1</Hostname>
+        <HwSku>Arista</HwSku>
+      </Device>
+      <Device i:type="LeafRouter">
+        <Hostname>ARISTA02T1</Hostname>
+        <HwSku>Arista</HwSku>
+      </Device>
+      <Device i:type="LeafRouter">
+        <Hostname>ARISTA03T1</Hostname>
+        <HwSku>Arista</HwSku>
+      </Device>
+      <Device i:type="LeafRouter">
+        <Hostname>ARISTA04T1</Hostname>
+        <HwSku>Arista</HwSku>
+      </Device>
+    </Devices>
+  </PngDec>
+  <DeviceInfos>
+    <DeviceInfo>
+      <EthernetInterfaces xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution">
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>Ethernet0</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>Ethernet8</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>Ethernet12</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>Ethernet16</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>Ethernet20</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>Ethernet24</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>Ethernet28</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>Ethernet32</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>Ethernet36</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>Ethernet40</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>Ethernet44</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>Ethernet48</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>Ethernet52</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>Ethernet56</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>Ethernet60</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>Ethernet64</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>Ethernet68</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>Ethernet72</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>Ethernet76</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>Ethernet80</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>Ethernet84</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>Ethernet88</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>Ethernet92</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>Ethernet96</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>Ethernet100</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>Ethernet104</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>Ethernet108</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>Ethernet112</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>Ethernet116</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>Ethernet120</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+      </EthernetInterfaces>
+      <HwSku>Force10-S6000</HwSku>
+      <ManagementInterfaces/>
+    </DeviceInfo>
+  </DeviceInfos>
+  <MetadataDeclaration>
+    <Devices xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution">
+      <a:DeviceMetadata>
+        <a:Name>switch-t0</a:Name>
+        <a:Properties>
+          <a:DeviceProperty>
+            <a:Name>ErspanDestinationIpv4</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>2.2.2.2</a:Value>
+          </a:DeviceProperty>
+        </a:Properties>
+      </a:DeviceMetadata>
+    </Devices>
+    <Properties xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+  </MetadataDeclaration>
+  <LinkMetadataDeclaration>
+    <Link xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution">
+      <a:LinkMetadata>
+        <a:Name i:nil="true"/>
+        <a:Properties>
+          <a:DeviceProperty>
+            <a:Name>AutoNegotiation</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>True</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>FECDisabled</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>True</a:Value>
+          </a:DeviceProperty>
+        </a:Properties>
+        <a:Key>ARISTA05T1:Ethernet1/33;switch-t0:fortyGigE0/4</a:Key>
+      </a:LinkMetadata>
+      <a:LinkMetadata>
+        <a:Name i:nil="true"/>
+        <a:Properties>
+          <a:DeviceProperty>
+            <a:Name>AutoNegotiation</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>False</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>FECDisabled</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>True</a:Value>
+          </a:DeviceProperty>
+        </a:Properties>
+        <a:Key>ARISTA06T1:Ethernet1/34;switch-t0:fortyGigE0/8</a:Key>
+      </a:LinkMetadata>
+    </Link>
+  </LinkMetadataDeclaration>
+<MetadataDeclaration>
+ <Devices xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution">
+  <a:DeviceMetadata>
+   <a:Name>switch-t0</a:Name>
+   <a:Properties>
+    <a:DeviceProperty>
+     <a:Name>DeploymentId</a:Name>
+     <a:Reference i:nil="true"/>
+     <a:Value>1</a:Value>
+    </a:DeviceProperty>
+  </a:Properties>
+  </a:DeviceMetadata>
+ </Devices>
+ <Properties xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+</MetadataDeclaration>
+  <Hostname>switch-t0</Hostname>
+  <HwSku>Force10-S6000</HwSku>
+</DeviceMiniGraph>
diff --git a/src/sonic-config-engine/tests/test_j2files.py b/src/sonic-config-engine/tests/test_j2files.py
index 6a660bec2..5e0a052f2 100644
--- a/src/sonic-config-engine/tests/test_j2files.py
+++ b/src/sonic-config-engine/tests/test_j2files.py
@@ -19,6 +19,7 @@ def setUp(self):
         self.ztp_ip = os.path.join(self.test_dir, "sample-ztp-ip.json")
         self.ztp_inband_ip = os.path.join(self.test_dir, "sample-ztp-inband-ip.json")
         self.t0_minigraph = os.path.join(self.test_dir, 't0-sample-graph.xml')
+        self.t0_minigraph_secondary_subnets = os.path.join(self.test_dir, 't0-sample-graph-secondary-subnets.xml')
         self.t0_mvrf_minigraph = os.path.join(self.test_dir, 't0-sample-graph-mvrf.xml')
         self.t0_minigraph_nomgmt = os.path.join(self.test_dir, 't0-sample-graph-nomgmt.xml')
         self.t0_minigraph_two_mgmt = os.path.join(self.test_dir, 't0-sample-graph-two-mgmt.xml')
@@ -172,6 +173,14 @@ def test_dhcp_relay(self):
         self.run_script(argument, output_file=self.output_file)
         self.assertTrue(utils.cmp(os.path.join(self.test_dir, 'sample_output', utils.PYvX_DIR,
                                                'docker-dhcp-relay-no-ip-helper.supervisord.conf'), self.output_file))
+        
+        # Test generation of docker-dhcp-relay.supervisord.conf when a vlan has secondary subnets specified
+        template_path = os.path.join(self.test_dir, '..', '..', '..', 'dockers', 'docker-dhcp-relay',
+                                     'docker-dhcp-relay.supervisord.conf.j2')
+        argument = ['-m', self.t0_minigraph_secondary_subnets, '-p', self.t0_port_config, '-t', template_path]
+        self.run_script(argument, output_file=self.output_file)
+        self.assertTrue(utils.cmp(os.path.join(self.test_dir, 'sample_output', utils.PYvX_DIR,
+                                               'docker-dhcp-relay-secondary-subnets.supervisord.conf'), self.output_file))
 
     def test_radv(self):
         # Test generation of radvd.conf with multiple ipv6 prefixes

From ef47385f8a4f42cc0b1a401f8e3a0363ad63ff8a Mon Sep 17 00:00:00 2001
From: lixiaoyuner <35456895+lixiaoyuner@users.noreply.github.com>
Date: Tue, 5 Mar 2024 16:57:18 -0800
Subject: [PATCH 0302/1115] Fix missing gnupg package issue during installing
 k8s gpg file process (#18158)

### Why I did it
When try to install k8s gpg file, there reports an error.
- "E: gnupg, gnupg2 and gnupg1 do not seem to be installed, but one of them is required for this operation   curl: (23) Failed writing body".

To fix error we need to install gunpg package. But apt-key add is going to be deprecated, mv the gpg file to /etc/apt/trusted.gpg.d/ directly
### How I did it
Download k8s gpg file and put it in /etc/apt/trusted.gpg.d/
#### How to verify it
We can install k8s gpg file successfully, but no gnupg package installed inside sonic image.
---
 build_debian.sh | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/build_debian.sh b/build_debian.sh
index f2e7fd153..207bc95a7 100755
--- a/build_debian.sh
+++ b/build_debian.sh
@@ -273,7 +273,7 @@ install_kubernetes () {
     local ver="$1"
     sudo https_proxy=$https_proxy LANG=C chroot $FILESYSTEM_ROOT curl -fsSL \
         https://packages.cloud.google.com/apt/doc/apt-key.gpg | \
-        sudo LANG=C chroot $FILESYSTEM_ROOT apt-key add -
+        sudo LANG=C chroot $FILESYSTEM_ROOT tee /etc/apt/trusted.gpg.d/kubernetes.asc
     ## Check out the sources list update matches current Debian version
     sudo cp files/image_config/kubernetes/kubernetes.list $FILESYSTEM_ROOT/etc/apt/sources.list.d/
     sudo LANG=C chroot $FILESYSTEM_ROOT apt-get update

From b99e96862b2f30cfa420807267810b234dda6b16 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Wed, 6 Mar 2024 19:00:51 +0800
Subject: [PATCH 0303/1115] [submodule] Update submodule sonic-platform-daemons
 to the latest HEAD automatically (#18275)

#### Why I did it
src/sonic-platform-daemons
```
* 8829614 - (HEAD -> master, origin/master, origin/HEAD) Enable periodic polling of TRANSCEIVER_FIRMWARE_INFO table in DomInfoUpdateTask (#443) (10 minutes ago) [mihirpat1]
* 55b5805 - Combine psu presence/status update with data update (#424) (9 hours ago) [Yuanzhe]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-platform-daemons | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-platform-daemons b/src/sonic-platform-daemons
index b9e6ba54c..88296143a 160000
--- a/src/sonic-platform-daemons
+++ b/src/sonic-platform-daemons
@@ -1 +1 @@
-Subproject commit b9e6ba54c8edf63256b01055561a2ded6858025c
+Subproject commit 88296143ab2b272bd79bcbc5745d4b79a33a6e4d

From f886328897c3072dcc5381b3544eff980c60bb10 Mon Sep 17 00:00:00 2001
From: Xincun Li <147451452+xincunli-sonic@users.noreply.github.com>
Date: Wed, 6 Mar 2024 07:39:00 -0800
Subject: [PATCH 0304/1115] [sn2700]: Add CPLD update. (#17376)

Why I did it
Porting #12173 to master, this will ensure all above 201911 version will have CPLD update files.

Microsoft ADO 25846069:

How I did it
Added Mellanox CPLD burn/refresh vme bundle for SN2700 platforms

How to verify it
Using update_firmware script to install private image that contains CPLD VME files with UPDATE_MLNX_CPLD_FW parameter.

Before update, the CPLD version was 15
admin@str2-msn2700-spy-1:~$ sudo fwutil show status
Chassis    Module    Component    Version                Description
---------  --------  -----------  ---------------------  ----------------------------------------
MSN2700    N/A       ONIE         2016.11-5.1.0012-9600  ONIE - Open Network Install Environment
                     SSD          0115-000               SSD - Solid-State Drive
                     BIOS         0ABZS017_01.01.213     BIOS - Basic Input/Output System
                     CPLD1        CPLD000085_REV1501     CPLD - Complex Programmable Logic Device
                     CPLD2        CPLD000043_REV0400     CPLD - Complex Programmable Logic Device
                     CPLD3        CPLD000000_REV0100     CPLD - Complex Programmable Logic Device
Do Update
admin@str2-msn2700-spy-1:/tmp$ sudo ./update_firmware sonic-mellanox-xincun-cpld.bin UPDATE_MLNX_CPLD_FW=1
Available space: 8101 MB
Warning: 'sonic_installer' command is deprecated and will be removed in the future
Please use 'sonic-installer' instead
Current FW version: SONiC-OS-20201231.110
Target FW version number: add-cpld-2.83464431-a0237f7aef
Target FW version: SONiC-OS-add-cpld-2.83464431-a0237f7aef
expr: non-integer argument
NOTICE: Reset Drop caches to index 1
Warning: 'sonic_installer' command is deprecated and will be removed in the future
Please use 'sonic-installer' instead
Image SONiC-OS-add-cpld-2.83464431-a0237f7aef is already installed. Setting it as default...
Command: grub-set-default --boot-directory=/host 0

Command: sync;sync;sync

Command: sleep 3

Done
NOTICE: sonic_installer install successfully
Mellanox platform is detected: x86_64-mlnx_msn2700-r0
Mellanox ASIC maintenance...
Mellanox ASIC firmware is up to date
Mellanox CPLD maintenance...
NOTICE: Copy Mellanox firmware upgrade utility
'/tmp/image-add-cpld-2.83464431-a0237f7aef-fs//usr/bin/mlnx-fw-upgrade.sh' -> '/usr/bin/mlnx-fw-upgrade.sh'
NOTICE: Copy Mellanox cpldupdate utility
'/tmp/image-add-cpld-2.83464431-a0237f7aef-fs//usr/bin/cpldupdate' -> '/usr/bin/cpldupdate'
Mellanox CPLD firmware upgrade is required. Installing compatible version...
Current CPLD firmware version: 15
Target CPLD firmware version: 20
NOTICE: Upgrade MLNX CPLD FW from 15 to 20
CPLD burn firmware file: /tmp/tmp.42DXmW1pQS/FUI000193_Burn_Panther_CPLD000085_REV2000_CPLD000128_REV0600_CPLD000130_REV0300.vme
CPLD refresh firmware file: /tmp/tmp.42DXmW1pQS/FUI000193_Refresh_Panther_CPLD000085_REV2000_CPLD000128_REV0600_CPLD000130_REV0300.vme
[/] CPLD update...                 Lattice Semiconductor Corp.

             ispVME(tm) V12.2 Copyright 1998-2012.

               Customized for Mellanox products.

Processing virtual machine file (/tmp/tmp.42DXmW1pQS/FUI000193_Burn_Panther_CPLD000085_REV2000_CPLD000128_REV0600_CPLD000130_REV0300.vme)......

Diamond Deployment Tool 3.12
CREATION DATE: Tue Sep 20 09:41:49 2022


[|] CPLD update...+=======+
| PASS! |
+=======+
Power cycle the device, then check CPLD version, it has changed to 20.
admin@str2-msn2700-spy-1:~$ sudo fwutil show status
Chassis    Module    Component    Version                Description
---------  --------  -----------  ---------------------  ----------------------------------------
MSN2700    N/A       ONIE         2016.11-5.1.0012-9600  ONIE - Open Network Install Environment
                     SSD          0115-000               SSD - Solid-State Drive
                     BIOS         0ABZS017_01.01.213     BIOS - Basic Input/Output System
                     CPLD1        CPLD000085_REV2000     CPLD - Complex Programmable Logic Device
                     CPLD2        CPLD000128_REV0600     CPLD - Complex Programmable Logic Device
                     CPLD3        CPLD000000_REV0000     CPLD - Complex Programmable Logic Device
---
 .../build_templates/sonic_debian_extension.j2  |   4 ++++
 platform/mellanox/cpld.mk                      |   6 ++++++
 platform/mellanox/cpld/msn2700_cpld.tar.gz     | Bin 0 -> 286108 bytes
 platform/mellanox/one-image.mk                 |   2 +-
 platform/mellanox/rules.mk                     |   1 +
 5 files changed, 12 insertions(+), 1 deletion(-)
 create mode 100644 platform/mellanox/cpld.mk
 create mode 100644 platform/mellanox/cpld/msn2700_cpld.tar.gz

diff --git a/files/build_templates/sonic_debian_extension.j2 b/files/build_templates/sonic_debian_extension.j2
index 97bf714e2..167bdaaa4 100644
--- a/files/build_templates/sonic_debian_extension.j2
+++ b/files/build_templates/sonic_debian_extension.j2
@@ -983,6 +983,10 @@ sudo cp $files_path/$MLNX_FFB_SCRIPT $FILESYSTEM_ROOT/usr/bin/mlnx-ffb.sh
 sudo cp $files_path/$MLNX_ONIE_FW_UPDATE $FILESYSTEM_ROOT/usr/bin/$MLNX_ONIE_FW_UPDATE
 sudo cp $files_path/$MLNX_SSD_FW_UPDATE $FILESYSTEM_ROOT/usr/bin/$MLNX_SSD_FW_UPDATE
 sudo cp $files_path/$MLNX_INSTALL_PENDING_FW $FILESYSTEM_ROOT/usr/bin/$MLNX_INSTALL_PENDING_FW
+sudo mkdir -p $FILESYSTEM_ROOT/etc/mlnx/cpld/
+for MLNX_CPLD_ARCHIVE in $MLNX_CPLD_ARCHIVES; do
+    sudo cp $files_path/$MLNX_CPLD_ARCHIVE $FILESYSTEM_ROOT/etc/mlnx/cpld/
+done
 j2 platform/mellanox/mlnx-fw-upgrade.j2 | sudo tee $FILESYSTEM_ROOT/usr/bin/mlnx-fw-upgrade.sh
 sudo chmod 755 $FILESYSTEM_ROOT/usr/bin/mlnx-fw-upgrade.sh
 
diff --git a/platform/mellanox/cpld.mk b/platform/mellanox/cpld.mk
new file mode 100644
index 000000000..0b2fbee4b
--- /dev/null
+++ b/platform/mellanox/cpld.mk
@@ -0,0 +1,6 @@
+# mellanox cpld firmware
+MLNX_SN2700_CPLD_ARCHIVE = msn2700_cpld.tar.gz
+$(MLNX_SN2700_CPLD_ARCHIVE)_PATH = platform/mellanox/cpld/
+SONIC_COPY_FILES += $(MLNX_SN2700_CPLD_ARCHIVE)
+MLNX_CPLD_ARCHIVES += $(MLNX_SN2700_CPLD_ARCHIVE)
+export MLNX_CPLD_ARCHIVES
diff --git a/platform/mellanox/cpld/msn2700_cpld.tar.gz b/platform/mellanox/cpld/msn2700_cpld.tar.gz
new file mode 100644
index 0000000000000000000000000000000000000000..2d68694452c239941d5ed94221c89fbf3dd75732
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PUn66QYF;2%W+wO_Wo91D

literal 0
HcmV?d00001

diff --git a/platform/mellanox/one-image.mk b/platform/mellanox/one-image.mk
index 74365cfea..9db68f1c5 100644
--- a/platform/mellanox/one-image.mk
+++ b/platform/mellanox/one-image.mk
@@ -27,5 +27,5 @@ $(SONIC_ONE_IMAGE)_DOCKERS += $(filter-out $(patsubst %-$(DBG_IMAGE_MARK).gz,%.g
 else
 $(SONIC_ONE_IMAGE)_DOCKERS = $(SONIC_INSTALL_DOCKER_IMAGES)
 endif
-$(SONIC_ONE_IMAGE)_FILES += $(MLNX_FILES)
+$(SONIC_ONE_IMAGE)_FILES += $(MLNX_FILES) $(MLNX_CPLD_ARCHIVES)
 SONIC_INSTALLERS += $(SONIC_ONE_IMAGE)
diff --git a/platform/mellanox/rules.mk b/platform/mellanox/rules.mk
index 654c6b65a..e81a1af20 100644
--- a/platform/mellanox/rules.mk
+++ b/platform/mellanox/rules.mk
@@ -15,6 +15,7 @@
 # limitations under the License.
 #
 include $(PLATFORM_PATH)/sdk.mk
+include $(PLATFORM_PATH)/cpld.mk
 include $(PLATFORM_PATH)/fw.mk
 include $(PLATFORM_PATH)/mft.mk
 include $(PLATFORM_PATH)/mft-fwtrace-cfg.mk

From 1cc78c92404330ee960fa357fd47fa819dbf1cc3 Mon Sep 17 00:00:00 2001
From: Hua Liu <58683130+liuh-80@users.noreply.github.com>
Date: Thu, 7 Mar 2024 07:29:52 +0800
Subject: [PATCH 0305/1115] [TACACS] Improve nss-tacplus TACACS connect timeout
 (#17460)

Improve nss-tacplus TACACS connect timeout

#### Why I did it
TACACS login usually config multiple server, when a high priority server not reachable or high lantency, remote user login will slowly, also run SUDO command will slowly.
To improve this issue, enable read timeout in nss-tacplus.

### How I did it
Enable read timeout in nss-tacplus.

#### How to verify it
Pass all UT.

### Description for the changelog
Improve nss-tacplus TACACS connect timeout.
---
 .../nss/patch/0001-Modify-user-map-profile.patch   | 14 ++++++++++----
 1 file changed, 10 insertions(+), 4 deletions(-)

diff --git a/src/tacacs/nss/patch/0001-Modify-user-map-profile.patch b/src/tacacs/nss/patch/0001-Modify-user-map-profile.patch
index b1ca5f8e2..05d1c3906 100644
--- a/src/tacacs/nss/patch/0001-Modify-user-map-profile.patch
+++ b/src/tacacs/nss/patch/0001-Modify-user-map-profile.patch
@@ -180,7 +180,7 @@ index 79e62b9..ecfa0b0 100644
  
  /*
   * pwbuf is used to reduce number of arguments passed around; the strings in
-@@ -63,255 +59,239 @@ struct pwbuf {
+@@ -63,255 +59,245 @@ struct pwbuf {
  typedef struct {
      struct addrinfo *addr;
      char *key;
@@ -445,9 +445,15 @@ index 79e62b9..ecfa0b0 100644
 +                tac_srv[tac_srv_no].key = strdup(token + 7);
 +            }
 +            else if(!strncmp(token, "timeout=", 8)) {
-+                tac_srv[tac_srv_no].timeout = (int)strtoul(token + 8, NULL, 0);
-+                if(tac_srv[tac_srv_no].timeout < 0)
-+                    tac_srv[tac_srv_no].timeout = 0;
++                int timeout = (int)strtoul(token + 8, NULL, 0);
++                if(timeout < 0) {
++                   tac_srv[tac_srv_no].timeout = 0;
++                   tac_readtimeout_enable = 0;
++                }
++                else {
++                   tac_srv[tac_srv_no].timeout = timeout;
++                   tac_readtimeout_enable = 1;
++                }
 +                /* Limit timeout to make sure upper application not wait
 +                 * for a long time*/
 +                if(tac_srv[tac_srv_no].timeout > 5)

From d47fa10a5bc88b5a992df1e6a480284763bcf48b Mon Sep 17 00:00:00 2001
From: James An <94036556+jamesan47@users.noreply.github.com>
Date: Wed, 6 Mar 2024 16:03:16 -0800
Subject: [PATCH 0306/1115] Cho 202311.main.0.1 (master) (#18281)

* Update cisco-8000.ini
---
 platform/checkout/cisco-8000.ini | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/platform/checkout/cisco-8000.ini b/platform/checkout/cisco-8000.ini
index d07141d59..ccda22289 100644
--- a/platform/checkout/cisco-8000.ini
+++ b/platform/checkout/cisco-8000.ini
@@ -1,3 +1,3 @@
 [module]
 repo=git@github.com:Cisco-8000-sonic/platform-cisco-8000.git
-ref=202305.1.0.3
+ref=202311.main.0.1

From fdc8ce12ceeccdf7bae85989ed017c18c6e45d28 Mon Sep 17 00:00:00 2001
From: lixiaoyuner <35456895+lixiaoyuner@users.noreply.github.com>
Date: Wed, 6 Mar 2024 21:46:31 -0800
Subject: [PATCH 0307/1115] [Build] Install k8s packages from sonic build
 storage to mitigate k8s source deprecation issue (#18280)

Why I did it
pkgs.k8s.io: Introducing Kubernetes Community-Owned Package Repositories | Kubernetes

For 1.22.2 k8s packages, source repo has been deprecated, going to store these packages in sonic build storage for installation to mitigate the issue. Will migrate to new repo when we are ready to upgrade k8s version.

Work item tracking
Microsoft ADO (number only): 27075924
How I did it
Store the 1.22.2 k8s package in sonic build storage and install the package there.

How to verify it
"apt list" to check if it's installed.
---
 Makefile.work   |  1 +
 build_debian.sh | 29 +++++++++++++++++++----------
 rules/config    |  1 +
 3 files changed, 21 insertions(+), 10 deletions(-)

diff --git a/Makefile.work b/Makefile.work
index a50743967..18ff536f5 100644
--- a/Makefile.work
+++ b/Makefile.work
@@ -530,6 +530,7 @@ SONIC_BUILD_INSTRUCTION :=  $(MAKE) \
                            INCLUDE_KUBERNETES=$(INCLUDE_KUBERNETES) \
                            KUBERNETES_VERSION=$(KUBERNETES_VERSION) \
                            KUBERNETES_CNI_VERSION=$(KUBERNETES_CNI_VERSION) \
+                           KUBERNETES_CRI_TOOLS_VERSION=$(KUBERNETES_CRI_TOOLS_VERSION) \
                            K8s_GCR_IO_PAUSE_VERSION=$(K8s_GCR_IO_PAUSE_VERSION) \
                            INCLUDE_KUBERNETES_MASTER=$(INCLUDE_KUBERNETES_MASTER) \
                            SONIC_ENABLE_PFCWD_ON_START=$(ENABLE_PFCWD_ON_START) \
diff --git a/build_debian.sh b/build_debian.sh
index 207bc95a7..b9dfd47bb 100755
--- a/build_debian.sh
+++ b/build_debian.sh
@@ -271,16 +271,25 @@ sudo LANG=C chroot $FILESYSTEM_ROOT apt-get -y install docker-ce=${DOCKER_VERSIO
 
 install_kubernetes () {
     local ver="$1"
-    sudo https_proxy=$https_proxy LANG=C chroot $FILESYSTEM_ROOT curl -fsSL \
-        https://packages.cloud.google.com/apt/doc/apt-key.gpg | \
-        sudo LANG=C chroot $FILESYSTEM_ROOT tee /etc/apt/trusted.gpg.d/kubernetes.asc
-    ## Check out the sources list update matches current Debian version
-    sudo cp files/image_config/kubernetes/kubernetes.list $FILESYSTEM_ROOT/etc/apt/sources.list.d/
-    sudo LANG=C chroot $FILESYSTEM_ROOT apt-get update
-    sudo LANG=C chroot $FILESYSTEM_ROOT apt-get -y install kubernetes-cni=${KUBERNETES_CNI_VERSION}
-    sudo LANG=C chroot $FILESYSTEM_ROOT apt-get -y install kubelet=${ver}
-    sudo LANG=C chroot $FILESYSTEM_ROOT apt-get -y install kubectl=${ver}
-    sudo LANG=C chroot $FILESYSTEM_ROOT apt-get -y install kubeadm=${ver}
+    ## Install k8s package from storage
+    local storage_prefix="https://sonicstorage.blob.core.windows.net/public/kubernetes"
+    sudo https_proxy=$https_proxy LANG=C chroot $FILESYSTEM_ROOT curl -o /tmp/cri-tools.deb -fsSL \
+        ${storage_prefix}/cri-tools_${KUBERNETES_CRI_TOOLS_VERSION}_${CONFIGURED_ARCH}.deb
+    sudo https_proxy=$https_proxy LANG=C chroot $FILESYSTEM_ROOT curl -o /tmp/kubernetes-cni.deb -fsSL \
+        ${storage_prefix}/kubernetes-cni_${KUBERNETES_CNI_VERSION}_${CONFIGURED_ARCH}.deb
+    sudo https_proxy=$https_proxy LANG=C chroot $FILESYSTEM_ROOT curl -o /tmp/kubelet.deb -fsSL \
+        ${storage_prefix}/kubelet_${ver}_${CONFIGURED_ARCH}.deb
+    sudo https_proxy=$https_proxy LANG=C chroot $FILESYSTEM_ROOT curl -o /tmp/kubectl.deb -fsSL \
+        ${storage_prefix}/kubectl_${ver}_${CONFIGURED_ARCH}.deb
+    sudo https_proxy=$https_proxy LANG=C chroot $FILESYSTEM_ROOT curl -o /tmp/kubeadm.deb -fsSL \
+        ${storage_prefix}/kubeadm_${ver}_${CONFIGURED_ARCH}.deb
+
+    sudo LANG=C chroot $FILESYSTEM_ROOT apt-get -y install -f /tmp/cri-tools.deb
+    sudo LANG=C chroot $FILESYSTEM_ROOT apt-get -y install -f /tmp/kubernetes-cni.deb
+    sudo LANG=C chroot $FILESYSTEM_ROOT apt-get -y install -f /tmp/kubelet.deb
+    sudo LANG=C chroot $FILESYSTEM_ROOT apt-get -y install -f /tmp/kubectl.deb
+    sudo LANG=C chroot $FILESYSTEM_ROOT apt-get -y install -f /tmp/kubeadm.deb
+    sudo LANG=C chroot $FILESYSTEM_ROOT rm -f /tmp/{cri-tools,kubernetes-cni,kubelet,kubeadm,kubectl}.deb
 }
 
 if [ "$INCLUDE_KUBERNETES" == "y" ]
diff --git a/rules/config b/rules/config
index 026cf34fb..4628313dc 100644
--- a/rules/config
+++ b/rules/config
@@ -196,6 +196,7 @@ KUBE_DOCKER_PROXY = http://172.16.1.1:3128/
 #
 KUBERNETES_VERSION = 1.22.2-00
 KUBERNETES_CNI_VERSION = 0.8.7-00
+KUBERNETES_CRI_TOOLS_VERSION = 1.26.0-00
 K8s_GCR_IO_PAUSE_VERSION = 3.5
 
 # INCLUDE_KUBERNETES_MASTER - if set to y kubernetes packages are installed o be able 

From 560817f3d3eafdc6e94ee2dbdb0a5373fd5b729c Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Thu, 7 Mar 2024 19:01:00 +0800
Subject: [PATCH 0308/1115] [submodule] Update submodule sonic-linux-kernel to
 the latest HEAD automatically (#18290)

#### Why I did it
src/sonic-linux-kernel
```
* 45295bf - (HEAD -> master, origin/master, origin/HEAD) Fix the issue with signed kernel compilation for ARM64 architecture (#381) (54 minutes ago) [Oleksandr Ivantsiv]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-linux-kernel | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-linux-kernel b/src/sonic-linux-kernel
index f4b1a5807..45295bfbf 160000
--- a/src/sonic-linux-kernel
+++ b/src/sonic-linux-kernel
@@ -1 +1 @@
-Subproject commit f4b1a580708b53a544ae7d4ce1770e087a4d6dfb
+Subproject commit 45295bfbf051bc7d9b591eab465bd01ca81687ff

From ab7153abada200838e5fbab4a5b1b60223915742 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Thu, 7 Mar 2024 19:01:11 +0800
Subject: [PATCH 0309/1115] [submodule] Update submodule dhcprelay to the
 latest HEAD automatically (#18288)

#### Why I did it
src/dhcprelay
```
* 84e4419 - (HEAD -> master, origin/master, origin/HEAD) Revert DHCPv6 Counter (#48) (24 hours ago) [kellyyeh]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/dhcprelay | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/dhcprelay b/src/dhcprelay
index 363fa060f..84e4419ee 160000
--- a/src/dhcprelay
+++ b/src/dhcprelay
@@ -1 +1 @@
-Subproject commit 363fa060f8b1752b0a3007b12eb81da35be24ee6
+Subproject commit 84e4419eef4f9b1fafa86ebb7937fe4904aa0795

From 5db634beb118a0abd4e0d8b3fd0e60a3aa535790 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Thu, 7 Mar 2024 19:01:17 +0800
Subject: [PATCH 0310/1115] [submodule] Update submodule dhcpmon to the latest
 HEAD automatically (#18273)

#### Why I did it
src/dhcpmon
```
* 22a7467 - (HEAD -> master, origin/master, origin/HEAD) Fix revert (#21) (9 hours ago) [kellyyeh]
* b1d890a - Revert DHCP Counter (#20) (24 hours ago) [kellyyeh]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/dhcpmon | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/dhcpmon b/src/dhcpmon
index fc20a97ba..22a7467a8 160000
--- a/src/dhcpmon
+++ b/src/dhcpmon
@@ -1 +1 @@
-Subproject commit fc20a97ba2eba753974ea95d504d130093030596
+Subproject commit 22a7467a8ab3e26c3d20e959a0702380f0d4b5ae

From c66acd93b4a86e68d4dc0a7f5610277f5b1b6ba5 Mon Sep 17 00:00:00 2001
From: Xichen96 <lukelin0907@gmail.com>
Date: Fri, 8 Mar 2024 00:46:28 +0800
Subject: [PATCH 0311/1115] replace host check command in e1031 (#18279)

---
 .../x86_64-cel_e1031-r0/sonic_platform/common.py   | 14 +++++++-------
 1 file changed, 7 insertions(+), 7 deletions(-)

diff --git a/device/celestica/x86_64-cel_e1031-r0/sonic_platform/common.py b/device/celestica/x86_64-cel_e1031-r0/sonic_platform/common.py
index 7d3b37e36..0838f0cf0 100644
--- a/device/celestica/x86_64-cel_e1031-r0/sonic_platform/common.py
+++ b/device/celestica/x86_64-cel_e1031-r0/sonic_platform/common.py
@@ -24,7 +24,6 @@ class Common:
 
     SET_METHOD_IPMI = 'ipmitool'
     NULL_VAL = 'N/A'
-    HOST_CHK_CMD = ["docker"]
     REF_KEY = '$ref:'
 
     def __init__(self, conf=None):
@@ -184,12 +183,13 @@ def write_txt_file(self, file_path, value):
             return False
         return True
 
-    def is_host(self):
-        try:
-            subprocess.call(self.HOST_CHK_CMD, stdout=subprocess.DEVNULL, stderr=subprocess.DEVNULL)
-        except FileNotFoundError:
-            return False
-        return True
+    def is_host():
+        """
+        Test whether current process is running on the host or an docker
+        return True for host and False for docker
+        """
+        docker_env_file = '/.dockerenv'
+        return os.path.exists(docker_env_file) is False
 
     def load_json_file(self, path):
         """

From b0679faf4a7404ec89c14b98a00bddefbedf5e95 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Fri, 8 Mar 2024 19:01:16 +0800
Subject: [PATCH 0312/1115] [submodule] Update submodule sonic-sairedis to the
 latest HEAD automatically (#18303)

#### Why I did it
src/sonic-sairedis
```
* bb948f6 - (HEAD -> master, origin/master, origin/HEAD) Check MDIO server thread joinable before join the thread (#1342) (18 hours ago) [Jiahua Wang]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-sairedis | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-sairedis b/src/sonic-sairedis
index d77037069..bb948f632 160000
--- a/src/sonic-sairedis
+++ b/src/sonic-sairedis
@@ -1 +1 @@
-Subproject commit d7703706917bcc0ea60edd78be9359ed87954cbc
+Subproject commit bb948f632bed2bec2eaa34085a8cbed92069bf83

From e57d46c7a981ac662ed49320efc5292ab25418b9 Mon Sep 17 00:00:00 2001
From: Mai Bui <maibui@microsoft.com>
Date: Fri, 8 Mar 2024 11:52:44 -0500
Subject: [PATCH 0313/1115] [iccpd]: remove unused function (#18269)

set_route_by_linux_route() is not called by any function within this repo and its submodules, checked on 202106 branch and master branch

git grep --recurse-submodules "set_route_by_linux_route"
src/iccpd/src/mlacp_link_handler.c:static void set_route_by_linux_route(struct CSM* csm,
src/iccpd/src/mlacp_link_handler.c:            /*set_route_by_linux_route(csm, set_l3_local_if, 1);*/   /*add static route by linux route tool*/
src/iccpd/src/mlacp_link_handler.c:            /*set_route_by_linux_route(csm, set_l3_local_if, 0);*/    /*del static route by linux route tool*/


Microsoft ADO (number only): 27008034

Remove unused function set_route_by_linux_route()

Signed-off-by: Mai Bui <maibui@microsoft.com>
---
 src/iccpd/src/mlacp_link_handler.c | 35 ------------------------------
 1 file changed, 35 deletions(-)

diff --git a/src/iccpd/src/mlacp_link_handler.c b/src/iccpd/src/mlacp_link_handler.c
index cf3e99bd0..fe6e63923 100644
--- a/src/iccpd/src/mlacp_link_handler.c
+++ b/src/iccpd/src/mlacp_link_handler.c
@@ -258,39 +258,6 @@ static int ndisc_set_handler(struct CSM *csm, struct LocalInterface *lif, int ad
  * Port-Channel Status Handler
  *
  ****************************************/
-static void set_route_by_linux_route(struct CSM* csm,
-                                     struct LocalInterface *local_if,
-                                     int is_add)
-{
-    /* TODO Need to remove this function
-         when set static route with zebra works fine*/
-
-    char ipv4_dest_str[INET_ADDRSTRLEN];
-    char syscmd[128];
-    char *ptr;
-    int ret = 0;
-
-    /* enable kernel forwarding support*/
-    system("echo 1 > /proc/sys/net/ipv4/ip_forward");
-
-    if (!csm || !local_if)
-        return;
-
-    sprintf(ipv4_dest_str, "%s", show_ip_str(htonl(local_if->ipv4_addr)));
-    ptr = strrchr(ipv4_dest_str, '.');
-    strcpy(ptr, ".0\0");
-
-    /* set gw route */
-    /* sprintf(syscmd, "ip route %s %s/%d proto static metric 200 nexthop via %s > /dev/null 2>&1", */
-    sprintf(syscmd, "ip route %s %s/%d metric 200 nexthop via %s > /dev/null 2>&1",
-            (is_add) ? "add" : "del", ipv4_dest_str, local_if->prefixlen, csm->peer_ip);
-
-    ret = system(syscmd);
-    ICCPD_LOG_DEBUG(__FUNCTION__, "%s  ret = %d", syscmd, ret);
-
-    return;
-}
-
 static void update_vlan_if_info(struct CSM *csm,
                                 struct LocalInterface *local_if,
                                 struct LocalInterface *vlan_if,
@@ -354,7 +321,6 @@ static void set_l3_itf_state(struct CSM *csm,
         /* set static route*/
         if (route_type == ROUTE_ADD)
         {
-            /*set_route_by_linux_route(csm, set_l3_local_if, 1);*/   /*add static route by linux route tool*/
             /*If the L3 intf is not Vlan, del ARP; else wait ARP age*/
             if (strncmp(set_l3_local_if->name, VLAN_PREFIX, 4) != 0)
             {
@@ -364,7 +330,6 @@ static void set_l3_itf_state(struct CSM *csm,
         }
         else if (route_type == ROUTE_DEL)
         {
-            /*set_route_by_linux_route(csm, set_l3_local_if, 0);*/    /*del static route by linux route tool*/
             arp_set_handler(csm, set_l3_local_if, 1);     /* add arp*/
             ndisc_set_handler(csm, set_l3_local_if, 1); /* add nd */
         }

From f10220d4286d3517ea090f92b728997f1caa68cc Mon Sep 17 00:00:00 2001
From: Pavan-Nokia <120486223+Pavan-Nokia@users.noreply.github.com>
Date: Fri, 8 Mar 2024 11:53:46 -0500
Subject: [PATCH 0314/1115] [Nokia-7215-A1][arm64]Update platform init files
 (#18266)

Why I did it
Update Nokia-7215-A1 platform to address UT and OC test failures.
Update platform init and build files

Microsoft ADO: 27111894

How I did it
Identify failed test cases from OC run on arm64-nokia_ixs7215_52xb-r0 (Nokia-7215-A1) platform and fix bugs

How to verify it
Build a Marvell-arm64 target for Nokia-7215-A1

Run this image on arm64-nokia_ixs7215_52xb-r0 and verify all dockers are up and test basic commands like:

show version
show platform summary
show platform syseeprom
show platform fan
show platform psustatus
show platform firmware status
show platform temperature
show platform ssdhealth
Verify ports are up using "show interface status" command

Run unit tests and OC test cases.
---
 platform/marvell-arm64/platform.conf          |   8 +-
 .../7215/modules/nokia_7215_ixs_a1_cpld.c     | 148 +++++++-----------
 .../7215/scripts/nokia-7215-init.sh           |  26 ++-
 platform/marvell-arm64/sonic_fit.its          |  32 +++-
 4 files changed, 115 insertions(+), 99 deletions(-)

diff --git a/platform/marvell-arm64/platform.conf b/platform/marvell-arm64/platform.conf
index a11314acf..6332c9178 100644
--- a/platform/marvell-arm64/platform.conf
+++ b/platform/marvell-arm64/platform.conf
@@ -31,7 +31,7 @@ PLATFORM_AC5X=0
 PLATFORM_CN9131=0
 
 case $PLATFORM in
-    arm64-nokia_ixs7215_52xb-r0) PLATFORM_AC5X=1;
+    arm64-nokia_ixs7215_52xb-r0) PLATFORM_7215_A1=1;
 		fdt_fname="/usr/lib/linux-image-${kernel_version}/marvell/7215-ixs-a1.dtb";
 		fit_conf_name="#conf_7215_a1";;
     arm64-marvell_rd98DX35xx-r0) PLATFORM_AC5X=1;
@@ -50,6 +50,12 @@ if [ $PLATFORM_AC5X -eq 1 ]; then
     FW_ENV_DEFAULT='/dev/mtd0 0x400000 0x10000 0x10000'
     demo_part=2
     mmc_bus="mmc0:0001"
+elif [ $PLATFORM_7215_A1 -eq 1 ]; then
+    fit_addr=0x20000000
+    VAR_LOG=4096
+    FW_ENV_DEFAULT='/dev/mtd1 0x0 0x10000 0x10000'
+    demo_part=2
+    mmc_bus="mmc0:0001"
 elif [ $PLATFORM_CN9131 -eq 1 ]; then
     fdt_addr=0x1000000
     fit_addr=0x8000000
diff --git a/platform/marvell-arm64/sonic-platform-nokia/7215/modules/nokia_7215_ixs_a1_cpld.c b/platform/marvell-arm64/sonic-platform-nokia/7215/modules/nokia_7215_ixs_a1_cpld.c
index df8e0ea64..3c0639770 100644
--- a/platform/marvell-arm64/sonic-platform-nokia/7215/modules/nokia_7215_ixs_a1_cpld.c
+++ b/platform/marvell-arm64/sonic-platform-nokia/7215/modules/nokia_7215_ixs_a1_cpld.c
@@ -56,18 +56,14 @@
 #define SYSTEM_STATUS_LED_CONTROL_REG 0x07
 #define POWER_AND_FAN_LED_CONTROL_REG 0x08
 #define SFP_TX_FAULT_STATUS_REG       0x09
-#define PSU1_PSU2_DEVICE_STATUS_REG   0x0A
-#define FAN_ENABLE_REG                0x0B
-#define USB_POWER_ENABLE_REG          0x0C
+#define TEMP_EVENT_STATUS_REG         0x0D
+#define TEMP_EVENT_MASK_REG           0x0E 
 #define SFP_LED_TEST_REG              0x0F
 #define RESET_REG                     0x10
-#define PHY_IRQ_LIVE_STATE_REG        0x11
 #define MISC_IRQ_LIVE_STATE_REG       0x12
 #define INTERRUPT_REG                 0x13
 #define INTERRUPT_MASK_REG            0x14
-#define PHY_INT_STATUS_REG            0x15
 #define MISC_INT_STATUS_REG           0x16
-#define PHY_INT_MASK_REG              0x17
 #define MISC_INT_MASK_REG             0x18
 #define GPIO_DIRECTION_REG            0x19
 #define GPIO_DATA_IN_REG              0x1A
@@ -79,6 +75,7 @@
 #define RESET_CAUSE_REG_WARM_RESET    0x2
 #define RESET_CAUSE_REG_WDOG_RESET    0x4
 #define RESET_CAUSE_REG_SYS_RESET     0x8
+#define RESET_CAUSE_REG_THERMAL_OL    0x10
 
 #define SFP_PRESENCE_REG_SFP49        0x0
 #define SFP_PRESENCE_REG_SFP50        0x1
@@ -96,6 +93,13 @@
 #define SFP_TX_DISABLE_REG_SFP52      0x3
 #define SFP_TX_DISABLE_REG_LED_MUX    0x4
 
+#define TS1_ALERT_EVENT               0x2
+#define TS2_ALERT_EVENT               0x4
+#define TS3_ALERT_EVENT               0x8
+#define CPU_TEMP_EVENT                0x10
+#define AC5X_HIGHTEMP_EVENT           0x20  
+#define DIMM_TEMP_EVENT               0x40     
+
 #define MAC_INIT_STATUS_REG_INIT_DONE 0x2
 
 enum system_status_led_mode {
@@ -129,14 +133,6 @@ char *power_fan_led_mode_str[]={"off", "green", "amber", "blink-green", "invalid
 #define SFP_TX_FAULT_STATUS_SFP51  0x2
 #define SFP_TX_FAULT_STATUS_SFP52  0x3
 
-#define PSU1_POWERGOOD   2
-#define PSU2_POWERGOOD   3
-
-#define FAN1_ENABLE      0
-#define FAN2_ENABLE      1
-
-#define USB_POWER_ENABLE 0
-
 #define RESET_REG_WARM_RESET   0x0
 #define RESET_REG_COLD_RESET   0x4
 #define RESET_REG_I2CMUX_RESET 0x6
@@ -193,22 +189,26 @@ static ssize_t show_last_reset_cause(struct device *dev, struct device_attribute
     val = nokia_7215_ixs_a1_cpld_read(data, RESET_CAUSE_REG);
     switch (val) {
     case RESET_CAUSE_REG_COLD_RESET:
-        reason="cold reset";
+        reason="cold_reset";
         break;
     case RESET_CAUSE_REG_WARM_RESET:
-        reason="warm reset";
+        reason="warm_reset";
         break;
     case RESET_CAUSE_REG_WDOG_RESET:
-        reason="wdog reset";
+        reason="wdog_reset";
         break;
     case RESET_CAUSE_REG_SYS_RESET:
-        reason="sys reset";
+        reason="sys_reset";
+        break;
+    case RESET_CAUSE_REG_THERMAL_OL:
+        reason="thermal_reset";
         break;
+        
     default:
         reason="unknown";
         break;
     }
-    return sprintf(buf,"0x%02x %s\n",val, reason);
+    return sprintf(buf,"%s\n",reason);
 }
 
 static ssize_t show_cpld_version(struct device *dev, struct device_attribute *devattr, char *buf) 
@@ -343,67 +343,48 @@ static ssize_t show_sfp_tx_fault(struct device *dev, struct device_attribute *de
     return sprintf(buf,"%d\n",(val>>sda->index) & 0x1 ? 1:0);
 }
 
-
-static ssize_t show_psu_pg_status(struct device *dev, struct device_attribute *devattr, char *buf) 
+static ssize_t show_temp_event_status(struct device *dev, struct device_attribute *devattr, char *buf) 
 {
     struct cpld_data *data = dev_get_drvdata(dev);
-    struct sensor_device_attribute *sda = to_sensor_dev_attr(devattr);
     u8 val=0;
-    val = nokia_7215_ixs_a1_cpld_read(data, PSU1_PSU2_DEVICE_STATUS_REG);
-    
-    /* If the bit is set, psu power is good */
-    return sprintf(buf,"%d\n",(val>>sda->index) & 0x1 ? 1:0);
-}
-
-static ssize_t show_fan_enable_status(struct device *dev, struct device_attribute *devattr, char *buf) 
-{
-    struct cpld_data *data = dev_get_drvdata(dev);
-    struct sensor_device_attribute *sda = to_sensor_dev_attr(devattr);
-    u8 val=0;
-    val = nokia_7215_ixs_a1_cpld_read(data, FAN_ENABLE_REG);
-    
-    /* If the bit is set, fan is disabled. So, toggling intentionally */
-    return sprintf(buf,"%d\n",(val>>sda->index) & 0x1 ? 0:1);
-}
-
-static ssize_t set_fan_enable_status(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) 
-{
-    struct cpld_data *data = dev_get_drvdata(dev);
-    struct sensor_device_attribute *sda = to_sensor_dev_attr(devattr);
-    u8 reg_val=0, usr_val=0, mask;
-    int ret=kstrtou8(buf,10, &usr_val);
-    if (ret != 0) {
-        return ret; 
-    }
-    if (usr_val > 1) {
-        return -EINVAL;
+    char *reason=NULL;
+    val = nokia_7215_ixs_a1_cpld_read(data, TEMP_EVENT_STATUS_REG);
+    switch (val) {
+    case TS1_ALERT_EVENT:
+        reason="ts1";
+        break;
+    case TS2_ALERT_EVENT:
+        reason="ts2";
+        break;
+    case TS3_ALERT_EVENT:
+        reason="ts3";
+        break;
+    case CPU_TEMP_EVENT:
+        reason="cpu";
+        break;
+    case AC5X_HIGHTEMP_EVENT:
+        reason="ac5x";
+        break;
+    case DIMM_TEMP_EVENT:
+        reason="dimm";
+        break;
+ 
+    default:
+        reason="none";
+        break;
     }
-
-    mask = (~(1 << sda->index)) & 0xFF;
-    reg_val = nokia_7215_ixs_a1_cpld_read(data, RESET_REG);
-    reg_val = reg_val & mask;
-
-    usr_val = !usr_val; // If the bit is set, fan is disabled. So, toggling intentionally
-    usr_val = usr_val << sda->index;
-
-    nokia_7215_ixs_a1_cpld_write(data, FAN_ENABLE_REG, (reg_val|usr_val));
-
-    return count;
+    return sprintf(buf,"0x%02x %s\n",val, reason);
 
 }
 
-static ssize_t show_usb_enable_status(struct device *dev, struct device_attribute *devattr, char *buf) 
+static ssize_t show_sfp_ledtest_status(struct device *dev, struct device_attribute *devattr, char *buf) 
 {
     struct cpld_data *data = dev_get_drvdata(dev);
-    struct sensor_device_attribute *sda = to_sensor_dev_attr(devattr);
-    u8 val=0;
-    val = nokia_7215_ixs_a1_cpld_read(data, USB_POWER_ENABLE_REG);
-    
-    /* If the bit is set, usb power is disabled. So, toggling intentionally */
-    return sprintf(buf,"%d\n",(val>>sda->index) & 0x1 ? 0:1);
+    u8 val = nokia_7215_ixs_a1_cpld_read(data, SFP_LED_TEST_REG);
+    return sprintf(buf,"0x%02x\n",val);
 }
 
-static ssize_t set_usb_enable_status(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) 
+static ssize_t set_sfp_ledtest_status(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) 
 {
     struct cpld_data *data = dev_get_drvdata(dev);
     u8 usr_val=0;
@@ -411,24 +392,19 @@ static ssize_t set_usb_enable_status(struct device *dev, struct device_attribute
     if (ret != 0) {
         return ret; 
     }
-    if(usr_val > 1) {
-        return -EINVAL;
-    }
-    /* If the bit is set, usb power is disabled. So, toggling intentionally */
-    usr_val = !usr_val;
 
-    nokia_7215_ixs_a1_cpld_write(data, USB_POWER_ENABLE_REG, usr_val);
+    nokia_7215_ixs_a1_cpld_write(data, SFP_LED_TEST_REG, usr_val);
     return count;
 }
 
-static ssize_t show_sfp_ledtest_status(struct device *dev, struct device_attribute *devattr, char *buf) 
+static ssize_t show_temp_event_mask_status(struct device *dev, struct device_attribute *devattr, char *buf) 
 {
     struct cpld_data *data = dev_get_drvdata(dev);
-    u8 val = nokia_7215_ixs_a1_cpld_read(data, SFP_LED_TEST_REG);
+    u8 val = nokia_7215_ixs_a1_cpld_read(data, TEMP_EVENT_MASK_REG);
     return sprintf(buf,"0x%02x\n",val);
 }
 
-static ssize_t set_sfp_ledtest_status(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) 
+static ssize_t set_temp_event_mask_status(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) 
 {
     struct cpld_data *data = dev_get_drvdata(dev);
     u8 usr_val=0;
@@ -437,7 +413,7 @@ static ssize_t set_sfp_ledtest_status(struct device *dev, struct device_attribut
         return ret; 
     }
 
-    nokia_7215_ixs_a1_cpld_write(data, SFP_LED_TEST_REG, usr_val);
+    nokia_7215_ixs_a1_cpld_write(data, TEMP_EVENT_MASK_REG, usr_val);
     return count;
 }
 
@@ -499,12 +475,9 @@ static SENSOR_DEVICE_ATTR(sfp49_tx_fault, S_IRUGO, show_sfp_tx_fault, NULL, SFP_
 static SENSOR_DEVICE_ATTR(sfp50_tx_fault, S_IRUGO, show_sfp_tx_fault, NULL, SFP_TX_FAULT_STATUS_SFP50);
 static SENSOR_DEVICE_ATTR(sfp51_tx_fault, S_IRUGO, show_sfp_tx_fault, NULL, SFP_TX_FAULT_STATUS_SFP51);
 static SENSOR_DEVICE_ATTR(sfp52_tx_fault, S_IRUGO, show_sfp_tx_fault, NULL, SFP_TX_FAULT_STATUS_SFP52);
-static SENSOR_DEVICE_ATTR(psu1_power_good, S_IRUGO, show_psu_pg_status, NULL, PSU1_POWERGOOD);
-static SENSOR_DEVICE_ATTR(psu2_power_good, S_IRUGO, show_psu_pg_status, NULL, PSU2_POWERGOOD);
-static SENSOR_DEVICE_ATTR(fan1_enable, S_IRUGO | S_IWUSR, show_fan_enable_status, set_fan_enable_status, FAN1_ENABLE);
-static SENSOR_DEVICE_ATTR(fan2_enable, S_IRUGO | S_IWUSR, show_fan_enable_status, set_fan_enable_status, FAN2_ENABLE);
-static SENSOR_DEVICE_ATTR(usb_power_enable, S_IRUGO | S_IWUSR, show_usb_enable_status, set_usb_enable_status, 0);
+static SENSOR_DEVICE_ATTR(temp_event_status, S_IRUGO, show_temp_event_status, NULL, 0);
 static SENSOR_DEVICE_ATTR(sfp_led_test, S_IRUGO | S_IWUSR, show_sfp_ledtest_status, set_sfp_ledtest_status, 0);
+static SENSOR_DEVICE_ATTR(temp_event_mask, S_IRUGO | S_IWUSR, show_temp_event_mask_status, set_temp_event_mask_status, 0);
 static SENSOR_DEVICE_ATTR(warm_reset, S_IRUGO | S_IWUSR, show_reset_reg, set_reset_reg, RESET_REG_WARM_RESET);
 static SENSOR_DEVICE_ATTR(cold_reset, S_IRUGO | S_IWUSR, show_reset_reg, set_reset_reg, RESET_REG_COLD_RESET);
 static SENSOR_DEVICE_ATTR(i2cmux_reset, S_IRUGO | S_IWUSR, show_reset_reg, set_reset_reg, RESET_REG_I2CMUX_RESET);
@@ -526,6 +499,7 @@ static struct attribute *nokia_7215_ixs_a1_cpld_attributes[] = {
     &sensor_dev_attr_sfp50_tx_disable.dev_attr.attr,
     &sensor_dev_attr_sfp51_tx_disable.dev_attr.attr,
     &sensor_dev_attr_sfp52_tx_disable.dev_attr.attr,
+    &sensor_dev_attr_temp_event_status.dev_attr.attr,
     &sensor_dev_attr_system_led.dev_attr.attr,
     &sensor_dev_attr_psu_led.dev_attr.attr,
     &sensor_dev_attr_fan_led.dev_attr.attr,
@@ -533,12 +507,8 @@ static struct attribute *nokia_7215_ixs_a1_cpld_attributes[] = {
     &sensor_dev_attr_sfp50_tx_fault.dev_attr.attr,
     &sensor_dev_attr_sfp51_tx_fault.dev_attr.attr,
     &sensor_dev_attr_sfp52_tx_fault.dev_attr.attr,
-    &sensor_dev_attr_psu1_power_good.dev_attr.attr,
-    &sensor_dev_attr_psu2_power_good.dev_attr.attr,
-    &sensor_dev_attr_fan1_enable.dev_attr.attr,
-    &sensor_dev_attr_fan2_enable.dev_attr.attr,
-    &sensor_dev_attr_usb_power_enable.dev_attr.attr,
     &sensor_dev_attr_sfp_led_test.dev_attr.attr,
+    &sensor_dev_attr_temp_event_mask.dev_attr.attr,
     &sensor_dev_attr_warm_reset.dev_attr.attr,
     &sensor_dev_attr_cold_reset.dev_attr.attr,
     &sensor_dev_attr_i2cmux_reset.dev_attr.attr,
diff --git a/platform/marvell-arm64/sonic-platform-nokia/7215/scripts/nokia-7215-init.sh b/platform/marvell-arm64/sonic-platform-nokia/7215/scripts/nokia-7215-init.sh
index 83da12487..a69c871b0 100644
--- a/platform/marvell-arm64/sonic-platform-nokia/7215/scripts/nokia-7215-init.sh
+++ b/platform/marvell-arm64/sonic-platform-nokia/7215/scripts/nokia-7215-init.sh
@@ -6,7 +6,14 @@
 load_kernel_drivers() {
     echo "Loading Kernel Drivers"
     sudo insmod /lib/modules/6.1.0-11-2-arm64/kernel/extra/nokia_7215_ixs_a1_cpld.ko
-    sudo insmod /lib/modules/6.1.0-11-2-arm64/kernel/extra/ac5_thermal_sensor.ko
+    sudo insmod /lib/modules/6.1.0-11-2-arm64/kernel/extra/cn9130_cpu_thermal_sensor.ko
+}
+
+fw_uboot_env_cfg()
+{
+    echo "Setting up U-Boot environment for Nokia-7215-A1"
+    FW_ENV_DEFAULT='/dev/mtd1 0x0 0x10000 0x10000'
+    echo $FW_ENV_DEFAULT > /etc/fw_env.config
 }
 
 nokia_7215_profile()
@@ -33,8 +40,8 @@ file_exists() {
 # Install kernel drivers required for i2c bus access
 load_kernel_drivers
 
-# Enumerate RTC
-echo m41t11 0x68 > /sys/bus/i2c/devices/i2c-0/new_device
+#setting up uboot environment
+fw_uboot_env_cfg
 
 # Enumerate the SFP eeprom device on each mux channel
 echo pca9546 0x70> /sys/bus/i2c/devices/i2c-1/new_device
@@ -43,11 +50,12 @@ echo pca9546 0x70> /sys/bus/i2c/devices/i2c-1/new_device
 echo ina230 0x40 > /sys/bus/i2c/devices/i2c-0/new_device
 
 # Enumerate fan
-echo emc2305 0x2e > /sys/bus/i2c/devices/i2c-0/new_device
+echo emc2305 0x2f > /sys/bus/i2c/devices/i2c-0/new_device
 
 # Enumerate Thermals
 echo tmp75 0x48 > /sys/bus/i2c/devices/i2c-0/new_device
 echo tmp75 0x49 > /sys/bus/i2c/devices/i2c-0/new_device
+echo tmp75 0x4A > /sys/bus/i2c/devices/i2c-0/new_device
 
 #Enumerate CPLD
 echo nokia_7215_a1_cpld 0x41 > /sys/bus/i2c/devices/i2c-0/new_device
@@ -63,6 +71,12 @@ else
     echo "SYSEEPROM file not foud"
 fi
 
+#Enumurate GPIO
+echo 41 > /sys/class/gpio/export
+echo 61 > /sys/class/gpio/export
+echo 62 > /sys/class/gpio/export
+chmod 666 /sys/class/gpio/gpio41/value
+
 # Get list of the mux channels
 for((i=0; i<10; i++));
     do  
@@ -85,8 +99,8 @@ do
     echo 0 > /sys/bus/i2c/devices/0-0041/sfp${i}_tx_disable
 done
 
-#slow down fan speed to 50 untill thermal algorithm kicks in%
-i2c_path="/sys/bus/i2c/devices/0-002e/hwmon/hwmon?"  
+#slow down fan speed to 50% untill thermal algorithm kicks in
+i2c_path="/sys/bus/i2c/devices/0-002f/hwmon/hwmon?"  
 echo 128 > $i2c_path/pwm1
 echo 128 > $i2c_path/pwm2 
 
diff --git a/platform/marvell-arm64/sonic_fit.its b/platform/marvell-arm64/sonic_fit.its
index 99a634ba8..3208388d9 100644
--- a/platform/marvell-arm64/sonic_fit.its
+++ b/platform/marvell-arm64/sonic_fit.its
@@ -35,7 +35,7 @@
             type = "flat_dt";
             arch = "arm64";
             compression = "none";
-            load = <0x2 0x1000000>;
+            load = <0x11000000>;
             hash@1 {
                 algo = "sha1";
             };
@@ -79,6 +79,32 @@
                 algo = "sha1";
             };
         };
+        kernel_2 {
+            description = "Linux Kernel";
+            data = /incbin/("/boot/vmlinuz-6.1.0-11-2-arm64");
+            type = "kernel";
+            arch = "arm64";
+            os = "linux";
+            compression = "none";
+            load = <0x12000000>;
+            entry = <0x12000000>;
+            hash@1 {
+                algo = "sha1";
+            };
+        };
+        ramdisk_2 {
+            description = "ramdisk";
+            data = /incbin/("/boot/initrd.img-6.1.0-11-2-arm64");
+            type = "ramdisk";
+            arch = "arm64";
+            os = "linux";
+            compression = "gzip";
+            load = <0x18000000>;
+            entry = <0x18000000>;
+            hash@1 {
+                algo = "sha1";
+            };
+        };
         fdt_cn9131 {
             description = "Flattened Device Tree blob";
             data = /incbin/("/boot/cn9131-db-comexpress.dtb");
@@ -105,9 +131,9 @@
         };
         conf_7215_a1 {
             description = "Boot Linux kernel with FDT blob + ramdisk for 7125_IXS_A1";
-            kernel = "kernel_ac5x";
+            kernel = "kernel_2";
             fdt = "fdt_7215_a1";
-            ramdisk = "ramdisk_ac5x";
+            ramdisk = "ramdisk_2";
             hash@1 {
                 algo = "sha1";
             };

From a46a7483c168d89f48f643e0e364a28b6f154c01 Mon Sep 17 00:00:00 2001
From: Vivek <vivekreddykarri98@gmail.com>
Date: Fri, 8 Mar 2024 08:55:58 -0800
Subject: [PATCH 0315/1115] [docker-ptf]: Upgrade ptf-py3 to 0.10.0 (#18263)

ptf-py3 0.9.3 couldn't compile on bookworm
Update ptf-py3 to latest release.

How to verify it
Verify the build and installation is successful in bookworm, buster and bullseye environment
Test docker-ptf.gz is built properly.
Ran sonic-mgmt tests with this docker-ptf.gz


Signed-off-by: Vivek Reddy Karri <vkarri@nvidia.com>
---
 rules/ptf-py3.dep                             |  2 +-
 rules/ptf-py3.mk                              |  2 +-
 sonic-slave-bookworm/Dockerfile.j2            |  5 +++-
 src/ptf-py3                                   |  2 +-
 ...cal-version-scheme-by-setuptools-scm.patch | 23 +++++++++++++++++++
 src/ptf-py3.patch/series                      |  3 ++-
 6 files changed, 32 insertions(+), 5 deletions(-)
 create mode 100644 src/ptf-py3.patch/0003-Avoid-local-version-scheme-by-setuptools-scm.patch

diff --git a/rules/ptf-py3.dep b/rules/ptf-py3.dep
index eadb32aab..7dbd9b3d5 100644
--- a/rules/ptf-py3.dep
+++ b/rules/ptf-py3.dep
@@ -2,7 +2,7 @@
 SPATH       := $($(PTF_PY3)_SRC_PATH)
 DEP_FILES   := $(SONIC_COMMON_FILES_LIST) rules/ptf-py3.mk rules/ptf-py3.dep   
 DEP_FILES   += $(SONIC_COMMON_BASE_FILES_LIST)
-SMDEP_FILES := $(addprefix $(SPATH)/,$(shell cd $(SPATH) && git ls-files))
+SMDEP_FILES := $(addprefix $(SPATH)/,$(shell cd $(SPATH) && find . -type f -exec sh -c 'git ls-files --error-unmatch "$0" >/dev/null 2>&1' {} \; -printf '%P\n'))
 
 $(PTF_PY3)_CACHE_MODE  := GIT_CONTENT_SHA 
 $(PTF_PY3)_DEP_FLAGS   := $(SONIC_COMMON_FLAGS_LIST)
diff --git a/rules/ptf-py3.mk b/rules/ptf-py3.mk
index bf583b57b..1c85c45f3 100644
--- a/rules/ptf-py3.mk
+++ b/rules/ptf-py3.mk
@@ -1,6 +1,6 @@
 # ptf package
 
-PTF_PY3 = ptf-0.9.3-py3-none-any.whl
+PTF_PY3 = ptf-0.10.0.post0-py3-none-any.whl
 $(PTF_PY3)_SRC_PATH = $(SRC_PATH)/ptf-py3
 $(PTF_PY3)_PYTHON_VERSION = 3
 $(PTF_PY3)_TEST = n
diff --git a/sonic-slave-bookworm/Dockerfile.j2 b/sonic-slave-bookworm/Dockerfile.j2
index 6bf09c425..4af1b401c 100644
--- a/sonic-slave-bookworm/Dockerfile.j2
+++ b/sonic-slave-bookworm/Dockerfile.j2
@@ -68,7 +68,7 @@ RUN pip3 install virtualenv
 RUN mkdir /python_virtualenv
 RUN cd /python_virtualenv && python3 -m virtualenv --copies -p /usr/bin/python3 env3
 
-RUN PATH=/python_virtualenv/env3/bin/:$PATH pip3 install setuptools==66.1.1 wheel==0.38.4 fastentrypoints pytest pytest-cov pytest-runner==5.2 nose==1.3.7 mockredispy==2.9.3 mock==3.0.5 PyYAML==6.0.1 redis==3.5.3 pexpect==4.8.0 Pympler==0.8 parameterized natsort==6.2.1 MarkupSafe==2.0.1 Jinja2==3.0.3 click tabulate netaddr netifaces pyroute2 pyfakefs sphinx && ln -s /python_virtualenv/env3/bin/pytest /python_virtualenv/env3/bin/pytest-3
+RUN PATH=/python_virtualenv/env3/bin/:$PATH pip3 install setuptools==66.1.1 setuptools-scm==8.0.4 setuptools-scm-git-archive==1.4.1 wheel==0.38.4 fastentrypoints pytest pytest-cov pytest-runner==5.2 nose==1.3.7 mockredispy==2.9.3 mock==3.0.5 PyYAML==6.0.1 redis==3.5.3 pexpect==4.8.0 Pympler==0.8 parameterized natsort==6.2.1 MarkupSafe==2.0.1 Jinja2==3.0.3 click tabulate netaddr netifaces pyroute2 pyfakefs sphinx && ln -s /python_virtualenv/env3/bin/pytest /python_virtualenv/env3/bin/pytest-3
 
 RUN apt-get --fix-broken install -y
 RUN LIBPYTHON3_DEPS="`apt-cache depends libpython3-dev:$arch |grep Depends|awk {'print \$2;'}|tr "\n" " "`" && apt-get install -y libpython2.7-dev:$arch $LIBPYTHON3_DEPS libxml2-dev:$arch libxslt-dev:$arch libssl-dev:$arch libz-dev:$arch
@@ -510,6 +510,9 @@ RUN pip3 install pyang==2.4.0
 # For mgmt-framework build
 RUN pip3 install mmh3==2.5.1
 
+# For ptf-py3 0.10.0
+RUN pip3 install setuptools==66.1.1 setuptools-scm==8.0.4 setuptools-scm-git-archive==1.4.1
+
 RUN apt-get install -y xsltproc
 
 # Install dependencies for isc-dhcp-relay build
diff --git a/src/ptf-py3 b/src/ptf-py3
index 405513bca..978598dd0 160000
--- a/src/ptf-py3
+++ b/src/ptf-py3
@@ -1 +1 @@
-Subproject commit 405513bcad2eae3092b0ac4ceb31e8dec5e32311
+Subproject commit 978598dd04434b5270495ac0c6466eb2c6c752f5
diff --git a/src/ptf-py3.patch/0003-Avoid-local-version-scheme-by-setuptools-scm.patch b/src/ptf-py3.patch/0003-Avoid-local-version-scheme-by-setuptools-scm.patch
new file mode 100644
index 000000000..776172da5
--- /dev/null
+++ b/src/ptf-py3.patch/0003-Avoid-local-version-scheme-by-setuptools-scm.patch
@@ -0,0 +1,23 @@
+From 5e46050967f5c29c6572b318d9aebb184f8275cf Mon Sep 17 00:00:00 2001
+From: Vivek Reddy <vkarri@nvidia.com>
+Date: Wed, 21 Feb 2024 19:04:40 +0000
+Subject: [PATCH] Avoid local version scheme by setuptools-scm
+
+Signed-off-by: Vivek Reddy <vkarri@nvidia.com>
+---
+ pyproject.toml | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/pyproject.toml b/pyproject.toml
+index 74a5350..33af092 100644
+--- a/pyproject.toml
++++ b/pyproject.toml
+@@ -11,4 +11,5 @@ build-backend = 'setuptools.build_meta'
+ root = "./"
+ # use current tag and not next one
+ version_scheme = "post-release"
++local_scheme = "no-local-version"
+ write_to = "src/ptf/_version.py"
+-- 
+2.17.1
+
diff --git a/src/ptf-py3.patch/series b/src/ptf-py3.patch/series
index d18987dd5..9bbcdfcbf 100644
--- a/src/ptf-py3.patch/series
+++ b/src/ptf-py3.patch/series
@@ -1,2 +1,3 @@
 0001-Remove-ord-in-get_mac-to-avoid-TypeError.patch
-0002-Fill-byte-formatted-client-mac-address-in-DHCP-Disco.patch
\ No newline at end of file
+0002-Fill-byte-formatted-client-mac-address-in-DHCP-Disco.patch
+0003-Avoid-local-version-scheme-by-setuptools-scm.patch

From 68f0a15dfc1376a5e24e1a678b1e0f8658bff584 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sun, 10 Mar 2024 19:01:26 +0800
Subject: [PATCH 0316/1115] [submodule] Update submodule sonic-platform-daemons
 to the latest HEAD automatically (#18301)

#### Why I did it
src/sonic-platform-daemons
```
* 8a5ca2b - (HEAD -> master, origin/master, origin/HEAD) Add deterministic link bring-up feature for SFF compliant modules (#383) (2 days ago) [longhuan-cisco]
* a591c8a - [ycabled][build] Fix sonic_ycabled build failure in Bookworm (#432) (2 days ago) [Arun Saravanan Balachandran]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-platform-daemons | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-platform-daemons b/src/sonic-platform-daemons
index 88296143a..8a5ca2bac 160000
--- a/src/sonic-platform-daemons
+++ b/src/sonic-platform-daemons
@@ -1 +1 @@
-Subproject commit 88296143ab2b272bd79bcbc5745d4b79a33a6e4d
+Subproject commit 8a5ca2bac634f5dfb440a9c635ca4cc7e06d478a

From 9505f820c169f6942b328ed38325c64f3994d609 Mon Sep 17 00:00:00 2001
From: Pavan-Nokia <120486223+Pavan-Nokia@users.noreply.github.com>
Date: Mon, 11 Mar 2024 00:44:31 -0400
Subject: [PATCH 0317/1115] [armhf][Nokia-7215]Update HWSKU files for new SAI
 (#18294)

---
 .../Nokia-7215/ASK-Board-M0-48x1G-4x10G.md5   |   2 +-
 .../Nokia-7215/ASK-Board-M0-48x1G-4x10G.xml   |  52 ++++++---
 .../Nokia-7215/ASK-L1-M0-D0-48x1G-4x10G.md5   |   2 +-
 .../Nokia-7215/ASK-L1-M0-D0-48x1G-4x10G.xml   |   2 +-
 .../Nokia-7215/ASK-L1-M0-D1-48x1G-4x10G.md5   |   2 +-
 .../Nokia-7215/ASK-L1-M0-D1-48x1G-4x10G.xml   |   2 +-
 .../Nokia-7215/ASK-PP-M0-48x1G-4x10G.md5      |   2 +-
 .../Nokia-7215/ASK-PP-M0-48x1G-4x10G.xml      |  24 ++---
 .../Nokia-7215/SAI-M0-48x1G-4x10G.md5         |   2 +-
 .../Nokia-7215/SAI-M0-48x1G-4x10G.xml         | 101 ++++++++++++++++--
 10 files changed, 147 insertions(+), 44 deletions(-)

diff --git a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-Board-M0-48x1G-4x10G.md5 b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-Board-M0-48x1G-4x10G.md5
index b9adf45e0..d381d2541 100644
--- a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-Board-M0-48x1G-4x10G.md5
+++ b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-Board-M0-48x1G-4x10G.md5
@@ -1 +1 @@
-429e9dc38eebb3093b21e687edf55e79
\ No newline at end of file
+78ea2f9bc238a32b68823bc7b082198d
\ No newline at end of file
diff --git a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-Board-M0-48x1G-4x10G.xml b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-Board-M0-48x1G-4x10G.xml
index b3ee5191c..63b6aeba3 100644
--- a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-Board-M0-48x1G-4x10G.xml
+++ b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-Board-M0-48x1G-4x10G.xml
@@ -1,5 +1,5 @@
 <?xml version="1.0" encoding="utf-8"?>
-<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2023-05-05-1.04" profile="Askboard" dsig="md5">
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2023-11-20-1.05" profile="Askboard" sid="20929980-c61f-4f1d-b08a-4e64f6d717c2">
   <askboardplt:ASK-Board xmlns:askboardplt="urn:marvell:askboard:yang">
     <askboardplt:typedefs>
       <askboardplt:typedef>
@@ -82,9 +82,9 @@
       <askboardplt:typedef>
         <askboardplt:name>device-id-type</askboardplt:name>
         <askboardplt:type>uint32</askboardplt:type>
-        <askboardplt:description>Device ID 0..1023</askboardplt:description>
+        <askboardplt:description>Device ID 0..1</askboardplt:description>
         <askboardplt:min>0</askboardplt:min>
-        <askboardplt:max>1023</askboardplt:max>
+        <askboardplt:max>1</askboardplt:max>
       </askboardplt:typedef>
       <askboardplt:typedef>
         <askboardplt:name>port-mapping-type</askboardplt:name>
@@ -111,11 +111,9 @@
       <askboardplt:typedef>
         <askboardplt:name>txq-port-number-type</askboardplt:name>
         <askboardplt:type>uint32</askboardplt:type>
-        <askboardplt:description>0 - 8 queues are configured per port (legacy mode),
-1...16 - the number of queues configured per port
-   	SIP 5 : Bobcat2,BobK:0..71 ;Bobcat3: 0..576 ;Aldrin2:0..99</askboardplt:description>
+        <askboardplt:description>TXq port number </askboardplt:description>
         <askboardplt:min>0</askboardplt:min>
-        <askboardplt:max>576</askboardplt:max>
+        <askboardplt:max>99</askboardplt:max>
       </askboardplt:typedef>
       <askboardplt:typedef>
         <askboardplt:name>phy-smi-interface-type</askboardplt:name>
@@ -162,12 +160,14 @@
         </askboardplt:enum>
         <askboardplt:enum>
           <askboardplt:name>alaska-88E3140</askboardplt:name>
-          <askboardplt:description>Specifies PHY identifier 88E3140, used for Copper with speeds of 100M/1G/10G. Uses with FW SolarFlare next generation.</askboardplt:description>
+          <askboardplt:description>Specifies PHY identifier 88E3140, used for Copper with speeds of 100M/1G/10G.
+Uses with FW SolarFlare next generation.</askboardplt:description>
           <askboardplt:value>5</askboardplt:value>
         </askboardplt:enum>
         <askboardplt:enum>
           <askboardplt:name>alaska-88E3240</askboardplt:name>
-          <askboardplt:description>Specifies PHY identifier 88E3240, used for Copper with speeds of 100M/1G/10G. Uses with FW, SolarFlare next generation.</askboardplt:description>
+          <askboardplt:description>Specifies PHY identifier 88E3240, used for Copper with speeds of 100M/1G/10G.
+Uses with FW, SolarFlare next generation.</askboardplt:description>
           <askboardplt:value>6</askboardplt:value>
         </askboardplt:enum>
         <askboardplt:enum>
@@ -177,7 +177,8 @@
         </askboardplt:enum>
         <askboardplt:enum>
           <askboardplt:name>alaska-88E3220</askboardplt:name>
-          <askboardplt:description>Specifies PHY identifier 88E3220, used for Combo port with speeds of 100M/1G/10G. Uses FW, SolarFlare next generation.</askboardplt:description>
+          <askboardplt:description>Specifies PHY identifier 88E3220, used for Combo port with speeds of 100M/1G/10G.
+Uses FW, SolarFlare next generation.</askboardplt:description>
           <askboardplt:value>8</askboardplt:value>
         </askboardplt:enum>
         <askboardplt:enum>
@@ -212,17 +213,20 @@
         </askboardplt:enum>
         <askboardplt:enum>
           <askboardplt:name>alaska-88E1780</askboardplt:name>
-          <askboardplt:description>Specifies PHY identifier 88E1780, Integrated Octal 10/100/1000 Mbps Energy Efficient Ethernet Transceiver</askboardplt:description>
+          <askboardplt:description>Specifies PHY identifier 88E1780, Integrated Octal 10/100/1000 Mbps Energy
+Efficient Ethernet Transceiver</askboardplt:description>
           <askboardplt:value>15</askboardplt:value>
         </askboardplt:enum>
         <askboardplt:enum>
           <askboardplt:name>alaska-88E2540</askboardplt:name>
-          <askboardplt:description>Specifies PHY identifier 88E2540, 4 ports 10/100/1000/2.5G/5GBASE-T Ethernet Transceiver with IEEE 1588v2 PTP Support</askboardplt:description>
+          <askboardplt:description>Specifies PHY identifier 88E2540, 4 ports 10/100/1000/2.5G/5GBASE-T Ethernet
+Transceiver with IEEE 1588v2 PTP Support</askboardplt:description>
           <askboardplt:value>16</askboardplt:value>
         </askboardplt:enum>
         <askboardplt:enum>
           <askboardplt:name>alaska-88E2580</askboardplt:name>
-          <askboardplt:description>Specifies PHY identifier 88E12580, Octal 10/100/1000/2.5G/5GBASE-T Ethernet Transceiver with IEEE 1588v2 PTP Support</askboardplt:description>
+          <askboardplt:description>Specifies PHY identifier 88E12580, Octal 10/100/1000/2.5G/5GBASE-T Ethernet Transceiver
+with IEEE 1588v2 PTP Support</askboardplt:description>
           <askboardplt:value>17</askboardplt:value>
         </askboardplt:enum>
       </askboardplt:typedef>
@@ -510,7 +514,7 @@
         <askboardplt:type>uint32</askboardplt:type>
         <askboardplt:description>serdes lane</askboardplt:description>
         <askboardplt:min>0</askboardplt:min>
-        <askboardplt:max>255</askboardplt:max>
+        <askboardplt:max>7</askboardplt:max>
       </askboardplt:typedef>
       <askboardplt:typedef>
         <askboardplt:name>cpu-type</askboardplt:name>
@@ -589,12 +593,12 @@ lowercase characters.</askboardplt:description>
         </askboardplt:enum>
         <askboardplt:enum>
           <askboardplt:name>sip5</askboardplt:name>
-          <askboardplt:description>SIP5: AC5, AC3x</askboardplt:description>
+          <askboardplt:description>SIP5: AC3x</askboardplt:description>
           <askboardplt:value>5</askboardplt:value>
         </askboardplt:enum>
         <askboardplt:enum>
           <askboardplt:name>sip6</askboardplt:name>
-          <askboardplt:description>SIP6: Falcon, AC5x, AC5P</askboardplt:description>
+          <askboardplt:description>SIP6: Falcon, AC5x</askboardplt:description>
           <askboardplt:value>6</askboardplt:value>
         </askboardplt:enum>
       </askboardplt:typedef>
@@ -665,7 +669,23 @@ lowercase characters.</askboardplt:description>
           <askboardplt:value>1</askboardplt:value>
         </askboardplt:enum>
       </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>asic-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>ASIC Type</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>ASIC_AC3X</askboardplt:name>
+          <askboardplt:description>AC3X</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>ASIC_AC5X</askboardplt:name>
+          <askboardplt:description>AC5X</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
     </askboardplt:typedefs>
+    <askboardplt:ASIC_Type askboardplt:type="asic-type">ASIC_AC3X</askboardplt:ASIC_Type>
     <askboardplt:boardName askboardplt:type="std-string">M0-48x1G-4x10G</askboardplt:boardName>
     <askboardplt:osCallType askboardplt:type="board-callback-type">linux-static</askboardplt:osCallType>
     <askboardplt:extDrvCallType askboardplt:type="board-callback-type">linux-static</askboardplt:extDrvCallType>
diff --git a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D0-48x1G-4x10G.md5 b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D0-48x1G-4x10G.md5
index 036debeca..7ff2b96da 100644
--- a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D0-48x1G-4x10G.md5
+++ b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D0-48x1G-4x10G.md5
@@ -1 +1 @@
-c2fad8d9eea6eb57614af010b4c7ad17
\ No newline at end of file
+a51445be255ef6afa324278ba9e191d9
\ No newline at end of file
diff --git a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D0-48x1G-4x10G.xml b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D0-48x1G-4x10G.xml
index abd5a2e8d..a254fbaa5 100644
--- a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D0-48x1G-4x10G.xml
+++ b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D0-48x1G-4x10G.xml
@@ -1,5 +1,5 @@
 <?xml version="1.0" encoding="utf-8"?>
-<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2023-05-05-1.04" profile="Askl1" dsig="md5">
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2023-11-20-1.05" profile="Askl1" sid="a9deb744-f6cb-4675-bab3-11132e7db1cd">
   <ASKL1plt:ASK-L1 xmlns:ASKL1plt="urn:marvell:ASKL1:yang">
     <ASKL1plt:typedefs>
       <ASKL1plt:typedef>
diff --git a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D1-48x1G-4x10G.md5 b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D1-48x1G-4x10G.md5
index 81dcc7fb6..63460edb3 100644
--- a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D1-48x1G-4x10G.md5
+++ b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D1-48x1G-4x10G.md5
@@ -1 +1 @@
-d1884cf0a6d9728290e522a41337e86e
\ No newline at end of file
+afe146bae79635a1513eba92343210b6
\ No newline at end of file
diff --git a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D1-48x1G-4x10G.xml b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D1-48x1G-4x10G.xml
index 3dd94351a..d9ea4a9e2 100644
--- a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D1-48x1G-4x10G.xml
+++ b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D1-48x1G-4x10G.xml
@@ -1,5 +1,5 @@
 <?xml version="1.0" encoding="utf-8"?>
-<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2023-05-05-1.04" profile="Askl1" dsig="md5">
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2023-11-20-1.05" profile="Askl1" sid="a9deb744-f6cb-4675-bab3-11132e7db1cd">
   <ASKL1plt:ASK-L1 xmlns:ASKL1plt="urn:marvell:ASKL1:yang">
     <ASKL1plt:typedefs>
       <ASKL1plt:typedef>
diff --git a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-PP-M0-48x1G-4x10G.md5 b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-PP-M0-48x1G-4x10G.md5
index 0ecbf1e4b..6405ae291 100644
--- a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-PP-M0-48x1G-4x10G.md5
+++ b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-PP-M0-48x1G-4x10G.md5
@@ -1 +1 @@
-8fdb417a68122b4d127e5b7c6750bd68
\ No newline at end of file
+e9257245632ec82a066bef433451b17f
\ No newline at end of file
diff --git a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-PP-M0-48x1G-4x10G.xml b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-PP-M0-48x1G-4x10G.xml
index 4f4670997..4c89ace68 100644
--- a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-PP-M0-48x1G-4x10G.xml
+++ b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-PP-M0-48x1G-4x10G.xml
@@ -1,5 +1,5 @@
 <?xml version="1.0" encoding="utf-8"?>
-<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2023-05-05-1.04" profile="Askpp" dsig="md5">
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2023-11-20-1.05" profile="Askpp" sid="fdf5b1c2-b80a-47a6-ac37-47e174286524">
   <askppplt:ASK-PP xmlns:askppplt="urn:marvell:askpp:yang">
     <askppplt:typedefs>
       <askppplt:typedef>
@@ -357,28 +357,28 @@
         <askppplt:enum>
           <askppplt:name>NATIVE</askppplt:name>
           <askppplt:description>NATIVE
-   	 *  the trunk members are filled
-   	 *  according to the order given by application.
-   	 *  Regular trunk may hold max of 8 members.
-   	 *  Cascade trunk may hold :
-   	 *  max of 64 members</askppplt:description>
+*  the trunk members are filled
+*  according to the order given by application.
+*  Regular trunk may hold max of 8 members.
+*  Cascade trunk may hold :
+*  max of 64 members</askppplt:description>
           <askppplt:value>0</askppplt:value>
         </askppplt:enum>
         <askppplt:enum>
           <askppplt:name>FLEX</askppplt:name>
           <askppplt:description>FLEX
-   	 *  A mode to allows flexibility for
-   	 *  each Regular trunk to state it's max number of members (before starting to add members).
-   	 *  (this mode not effect 'cascade trunk' members)
-   	 *  Regular trunk may hold : max of 4K members. (each trunk set it's own limit)
-   	 *  Cascade trunk may hold : max of 64 members.</askppplt:description>
+*  A mode to allows flexibility for
+*  each Regular trunk to state it's max number of members (before starting to add members).
+*  (this mode not effect 'cascade trunk' members)
+*  Regular trunk may hold : max of 4K members. (each trunk set it's own limit)
+*  Cascade trunk may hold : max of 64 members.</askppplt:description>
           <askppplt:value>2</askppplt:value>
         </askppplt:enum>
       </askppplt:typedef>
       <askppplt:typedef>
         <askppplt:name>number-physical-port-type</askppplt:name>
         <askppplt:type>enumeration</askppplt:type>
-        <askppplt:description>ac5x 128, falcon 64,128,256, 512, 1024</askppplt:description>
+        <askppplt:description>AC3X/AC5X 128, falcon 64, 128, 256, 512, 1024</askppplt:description>
         <askppplt:enum>
           <askppplt:name>no-ports</askppplt:name>
           <askppplt:description>no-ports</askppplt:description>
diff --git a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/SAI-M0-48x1G-4x10G.md5 b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/SAI-M0-48x1G-4x10G.md5
index 666eb19a9..3f32972fe 100644
--- a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/SAI-M0-48x1G-4x10G.md5
+++ b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/SAI-M0-48x1G-4x10G.md5
@@ -1 +1 @@
-6a6dc37a64244b9e80f31008ea68f276
\ No newline at end of file
+999d0a26c697a35601fcef34127c216d
\ No newline at end of file
diff --git a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/SAI-M0-48x1G-4x10G.xml b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/SAI-M0-48x1G-4x10G.xml
index d3f85bb01..ca34f67ad 100644
--- a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/SAI-M0-48x1G-4x10G.xml
+++ b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/SAI-M0-48x1G-4x10G.xml
@@ -1,13 +1,13 @@
 <?xml version="1.0" encoding="utf-8"?>
-<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2023-05-05-1.04" profile="SAI" dsig="md5">
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2023-11-20-1.05" profile="SAI" sid="fd56a8b4-6b41-4ead-9a27-c491bc2f95b9">
   <SAIplt:SAI xmlns:SAIplt="urn:marvell:SAI:yang">
     <SAIplt:typedefs>
       <SAIplt:typedef>
         <SAIplt:name>device-id-type</SAIplt:name>
         <SAIplt:type>uint32</SAIplt:type>
-        <SAIplt:description>Device ID 0..1023</SAIplt:description>
+        <SAIplt:description>Device ID 0..1</SAIplt:description>
         <SAIplt:min>0</SAIplt:min>
-        <SAIplt:max>1023</SAIplt:max>
+        <SAIplt:max>1</SAIplt:max>
       </SAIplt:typedef>
       <SAIplt:typedef>
         <SAIplt:name>port-id-type</SAIplt:name>
@@ -22,7 +22,7 @@
         <SAIplt:description>Logging Feature Options</SAIplt:description>
         <SAIplt:enum>
           <SAIplt:name>SAI_LOG_SYSLOG</SAIplt:name>
-          <SAIplt:description>SYSLOG               {Syslog service should be running to use this option}</SAIplt:description>
+          <SAIplt:description>SYSLOG  {Syslog service should be running to use this option}</SAIplt:description>
           <SAIplt:value>0</SAIplt:value>
         </SAIplt:enum>
         <SAIplt:enum>
@@ -32,7 +32,7 @@
         </SAIplt:enum>
         <SAIplt:enum>
           <SAIplt:name>SAI_LOG_FILE</SAIplt:name>
-          <SAIplt:description>FILE                       {Warning !!! Use with caution. Can cause disk full issues}</SAIplt:description>
+          <SAIplt:description>FILE  {Warning !!! Use with caution. Can cause disk full issues}</SAIplt:description>
           <SAIplt:value>2</SAIplt:value>
         </SAIplt:enum>
       </SAIplt:typedef>
@@ -43,7 +43,92 @@
         <SAIplt:min>2</SAIplt:min>
         <SAIplt:max>30</SAIplt:max>
       </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>acl-feature-name-type</SAIplt:name>
+        <SAIplt:type>enumeration</SAIplt:type>
+        <SAIplt:description/>
+        <SAIplt:enum>
+          <SAIplt:name>port-sFlow</SAIplt:name>
+          <SAIplt:description>SFlow over Port</SAIplt:description>
+          <SAIplt:value>0</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>port-counters-ipv4-ipv6</SAIplt:name>
+          <SAIplt:description>Port ipv4/ipv6 counters</SAIplt:description>
+          <SAIplt:value>1</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>control-acl</SAIplt:name>
+          <SAIplt:description>ACLs for control packet handling</SAIplt:description>
+          <SAIplt:value>2</SAIplt:value>
+        </SAIplt:enum>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>ingress-acl-stage-type</SAIplt:name>
+        <SAIplt:type>enumeration</SAIplt:type>
+        <SAIplt:description/>
+        <SAIplt:enum>
+          <SAIplt:name>disabled</SAIplt:name>
+          <SAIplt:description>Feature not enabled</SAIplt:description>
+          <SAIplt:value>0</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>IPCL0</SAIplt:name>
+          <SAIplt:description>Stage IPCL0</SAIplt:description>
+          <SAIplt:value>1</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>IPCL1</SAIplt:name>
+          <SAIplt:description>Stage IPCL1</SAIplt:description>
+          <SAIplt:value>2</SAIplt:value>
+        </SAIplt:enum>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>egress-acl-stage-type</SAIplt:name>
+        <SAIplt:type>enumeration</SAIplt:type>
+        <SAIplt:description/>
+        <SAIplt:enum>
+          <SAIplt:name>disabled</SAIplt:name>
+          <SAIplt:description>Feature not enabled</SAIplt:description>
+          <SAIplt:value>0</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>EPCL0</SAIplt:name>
+          <SAIplt:description>Stage EPCL0</SAIplt:description>
+          <SAIplt:value>2</SAIplt:value>
+        </SAIplt:enum>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>feature-priority-type</SAIplt:name>
+        <SAIplt:type>uint32</SAIplt:type>
+        <SAIplt:description>Feature priority</SAIplt:description>
+        <SAIplt:min>2</SAIplt:min>
+        <SAIplt:max>15</SAIplt:max>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>hit-number-type</SAIplt:name>
+        <SAIplt:type>uint32</SAIplt:type>
+        <SAIplt:description>Hit/lookup number</SAIplt:description>
+        <SAIplt:min>0</SAIplt:min>
+        <SAIplt:max>3</SAIplt:max>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>asic-type</SAIplt:name>
+        <SAIplt:type>enumeration</SAIplt:type>
+        <SAIplt:description>ASIC Type</SAIplt:description>
+        <SAIplt:enum>
+          <SAIplt:name>ASIC_AC3X</SAIplt:name>
+          <SAIplt:description>AC3X</SAIplt:description>
+          <SAIplt:value>0</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>ASIC_AC5X</SAIplt:name>
+          <SAIplt:description>AC5X</SAIplt:description>
+          <SAIplt:value>1</SAIplt:value>
+        </SAIplt:enum>
+      </SAIplt:typedef>
     </SAIplt:typedefs>
+    <SAIplt:ASIC_Type SAIplt:type="asic-type">ASIC_AC3X</SAIplt:ASIC_Type>
     <SAIplt:ASK-BOARD-Profile-Name SAIplt:type="string">ASK-Board-M0-48x1G-4x10G.xml</SAIplt:ASK-BOARD-Profile-Name>
     <SAIplt:Features>
       <SAIplt:RoCE SAIplt:type="boolean">false</SAIplt:RoCE>
@@ -310,7 +395,7 @@
         <SAIplt:sdk_port_id SAIplt:type="port-id-type">52</SAIplt:sdk_port_id>
       </SAIplt:port-list>
     </SAIplt:Ports>
-    <SAIplt:Scaling>
+    <SAIplt:scalingAC3>
       <SAIplt:max_lag_members SAIplt:type="uint32">8</SAIplt:max_lag_members>
       <SAIplt:max_route_ipv4 SAIplt:type="uint32">0</SAIplt:max_route_ipv4>
       <SAIplt:max_route_ipv6 SAIplt:type="uint32">0</SAIplt:max_route_ipv6>
@@ -318,9 +403,7 @@
       <SAIplt:max_ipv4_tunnel SAIplt:type="uint32">8</SAIplt:max_ipv4_tunnel>
       <SAIplt:max_ipv6_tunnel SAIplt:type="uint32">8</SAIplt:max_ipv6_tunnel>
       <SAIplt:max_tti SAIplt:type="uint32">1024</SAIplt:max_tti>
-      <SAIplt:wred_size SAIplt:type="uint32">0</SAIplt:wred_size>
-      <SAIplt:max_nat SAIplt:type="uint32">0</SAIplt:max_nat>
-    </SAIplt:Scaling>
+    </SAIplt:scalingAC3>
     <SAIplt:Counters>
       <SAIplt:cnc-base-list>
         <SAIplt:counter-base SAIplt:type="uint32">4096</SAIplt:counter-base>

From cd897b40cc6c33c3af98bb29af55b51edb12c359 Mon Sep 17 00:00:00 2001
From: lixiaoyuner <35456895+lixiaoyuner@users.noreply.github.com>
Date: Sun, 10 Mar 2024 23:45:18 -0700
Subject: [PATCH 0318/1115] [ci] Fix and improve k8s master image build process
 (#18157)

Why I did it
When we change k8s script file to trigger k8s master image build, there's error reported.

/agent/_work/_temp/433f6aca-4fd0-4a79-898e-49d7d0fc7465.sh: line 19: unexpected EOF while looking for matching `''
The main reason is something wrong with passing k8s_options variable(in file template-skipvstest.yml) to build pipeline. Need to fix and improve the passing variable process.

Work item tracking
Microsoft ADO (number only): 25063800
How I did it
Separate the job of checking if k8s image build is needed from skipvstest checking job
Build a VHDX k8s master image for convenient
How to verify it
No error found when k8s master image build is triggered
We have a VHDX k8s master image in the build result.
---
 .azure-pipelines/azure-pipelines-build.yml | 10 +++++++---
 .azure-pipelines/template-skipvstest.yml   | 13 +++++++++----
 2 files changed, 16 insertions(+), 7 deletions(-)

diff --git a/.azure-pipelines/azure-pipelines-build.yml b/.azure-pipelines/azure-pipelines-build.yml
index d7f87456f..b5e5c7322 100644
--- a/.azure-pipelines/azure-pipelines-build.yml
+++ b/.azure-pipelines/azure-pipelines-build.yml
@@ -135,9 +135,13 @@ jobs:
               make $BUILD_OPTIONS ENABLE_ASAN=y target/docker-sonic-vs.gz
               mv target/docker-sonic-vs.gz target/docker-sonic-vs-asan.gz
             fi
-            if [ "$(K8S_OPTIONS)" == 'INCLUDE_KUBERNETES_MASTER=y' ]; then
-              make $BUILD_OPTIONS $(K8S_OPTIONS) target/sonic-vs.img.gz
-              mv target/sonic-vs.img.gz target/sonic-vs-k8s.img.gz
+            if [ "$(K8S_MASTER_CHANGED)" == 'YES' ]; then
+              make $BUILD_OPTIONS INCLUDE_KUBERNETES_MASTER=y target/sonic-vs.img.gz
+              gzip -d target/sonic-vs.img.gz
+              SONIC_RUN_CMDS="qemu-img convert target/sonic-vs.img -O vhdx -o subformat=dynamic target/sonic-vs.vhdx" make $BUILD_OPTIONS sonic-slave-run
+              gzip target/sonic-vs.vhdx
+              mv target/sonic-vs.vhdx.gz target/sonic-vs-k8s.vhdx.gz
+              rm target/sonic-vs.img
             fi
             make $BUILD_OPTIONS target/docker-sonic-vs.gz target/sonic-vs.img.gz target/docker-ptf.gz
             make $BUILD_OPTIONS target/docker-ptf-sai.gz
diff --git a/.azure-pipelines/template-skipvstest.yml b/.azure-pipelines/template-skipvstest.yml
index ca968d009..86a2abd1f 100644
--- a/.azure-pipelines/template-skipvstest.yml
+++ b/.azure-pipelines/template-skipvstest.yml
@@ -4,11 +4,16 @@ steps:
       set -ex
       tar_branch=origin/$(System.PullRequest.TargetBranchName)
       # Check if k8s master entrance script is changed
-      if ! git diff $tar_branch..HEAD --name-only | grep -F files/image_config/kubernetes/kubernetes_master_entrance.sh; then
-        echo "##vso[task.setvariable variable=K8S_OPTIONS;]INCLUDE_KUBERNETES_MASTER=n"
-      else
-        echo "##vso[task.setvariable variable=K8S_OPTIONS;]INCLUDE_KUBERNETES_MASTER=y"
+      K8S_MASTER_CHANGED=NO
+      if git diff $tar_branch..HEAD --name-only | grep -F files/image_config/kubernetes/kubernetes_master_entrance.sh; then
+        K8S_MASTER_CHANGED=YES
       fi
+      set +x
+      echo "##vso[task.setvariable variable=K8S_MASTER_CHANGED;]$K8S_MASTER_CHANGED"
+    displayName: "Check if k8s master image build is needed."
+  - script: |
+      set -ex
+      tar_branch=origin/$(System.PullRequest.TargetBranchName)
       git diff $tar_branch..HEAD --name-only | grep -v -f .azure-pipelines/vstest-exclude && exit 0
       git diff $tar_branch..HEAD --name-only | grep -f .azure-pipelines/vstest-include && exit 0
       set +x

From 1ed3644e6a0920f612ffbfe9e9d92cd1f9cc4ce8 Mon Sep 17 00:00:00 2001
From: bingwang-ms <66248323+bingwang-ms@users.noreply.github.com>
Date: Mon, 11 Mar 2024 10:13:12 -0700
Subject: [PATCH 0319/1115] Fix yang model for ICMP and ICMPV6 (#18311)

* Fix yang model for ICMP and ICMPV6

* Change ICMP type and code to 0-255
---
 .../tests/yang_model_tests/tests/acl.json     |   6 +
 .../yang_model_tests/tests_config/acl.json    | 110 ++++++++++++++++++
 .../yang-templates/sonic-acl.yang.j2          |   8 +-
 3 files changed, 120 insertions(+), 4 deletions(-)

diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/acl.json b/src/sonic-yang-models/tests/yang_model_tests/tests/acl.json
index 779a96d02..18f053e2a 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests/acl.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests/acl.json
@@ -20,6 +20,12 @@
     "ACL_RULE_WITH_VALID_OUT_PORTS": {
         "desc": "Configure ACL_RULE with valid OUT_PORTS."
     },
+    "ACL_RULE_WITH_VALID_ICMPV4_CODE": {
+        "desc": "Configure ACL_RULE with valid ICMPV4 type and code."
+    },
+    "ACL_RULE_WITH_VALID_ICMPV6_CODE": {
+        "desc": "Configure ACL_RULE with valid ICMPV6 type and code."
+    },
     "ACL_TABLE_EMPTY_PORTS": {
         "desc": "Configure ACL_TABLE with empty ports."
     },
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/acl.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/acl.json
index aa908fdb7..6f39ab6e4 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/acl.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/acl.json
@@ -590,6 +590,116 @@
             }
         }
     },
+    "ACL_RULE_WITH_VALID_ICMPV4_CODE": {
+        "sonic-acl:sonic-acl": {
+            "sonic-acl:ACL_RULE": {
+                "ACL_RULE_LIST": [
+                    {
+                        "ACL_TABLE_NAME": "NO-NSW-PACL-V4",
+                        "ICMP_CODE": 0,
+                        "ICMP_TYPE": 0,
+                        "IP_TYPE": "IPV4",
+                        "PACKET_ACTION": "FORWARD",
+                        "PRIORITY": 999960,
+                        "RULE_NAME": "Rule_40"
+                    }
+                ]
+            },
+            "sonic-acl:ACL_TABLE": {
+                "ACL_TABLE_LIST": [
+                    {
+                        "ACL_TABLE_NAME": "NO-NSW-PACL-V4",
+                        "policy_desc": "Filter IPv4",
+                        "ports": [
+                            "Ethernet0",
+                            "Ethernet1"
+                        ],
+                        "stage": "EGRESS",
+                        "type": "L3"
+                    }
+                ]
+            }
+        },
+        "sonic-port:sonic-port": {
+            "sonic-port:PORT": {
+                "PORT_LIST": [
+                    {
+                        "admin_status": "up",
+                        "alias": "eth0",
+                        "description": "Ethernet0",
+                        "lanes": "0,1,2,3",
+                        "mtu": 9000,
+                        "name": "Ethernet0",
+                        "speed": 25000
+                    },
+                    {
+                        "admin_status": "up",
+                        "alias": "eth1",
+                        "description": "Ethernet1",
+                        "lanes": "4,5,6,7",
+                        "mtu": 9000,
+                        "name": "Ethernet1",
+                        "speed": 25000
+                    }
+                ]
+            }
+        }
+    },
+    "ACL_RULE_WITH_VALID_ICMPV6_CODE": {
+        "sonic-acl:sonic-acl": {
+            "sonic-acl:ACL_RULE": {
+                "ACL_RULE_LIST": [
+                    {
+                        "ACL_TABLE_NAME": "NO-NSW-PACL-V6",
+                        "ICMPV6_CODE": 0,
+                        "ICMPV6_TYPE": 129,
+                        "IP_TYPE": "IPV6",
+                        "PACKET_ACTION": "FORWARD",
+                        "PRIORITY": 999960,
+                        "RULE_NAME": "Rule_40"
+                    }
+                ]
+            },
+            "sonic-acl:ACL_TABLE": {
+                "ACL_TABLE_LIST": [
+                    {
+                        "ACL_TABLE_NAME": "NO-NSW-PACL-V6",
+                        "policy_desc": "Filter IPv6",
+                        "ports": [
+                            "Ethernet0",
+                            "Ethernet1"
+                        ],
+                        "stage": "EGRESS",
+                        "type": "L3"
+                    }
+                ]
+            }
+        },
+        "sonic-port:sonic-port": {
+            "sonic-port:PORT": {
+                "PORT_LIST": [
+                    {
+                        "admin_status": "up",
+                        "alias": "eth0",
+                        "description": "Ethernet0",
+                        "lanes": "0,1,2,3",
+                        "mtu": 9000,
+                        "name": "Ethernet0",
+                        "speed": 25000
+                    },
+                    {
+                        "admin_status": "up",
+                        "alias": "eth1",
+                        "description": "Ethernet1",
+                        "lanes": "4,5,6,7",
+                        "mtu": 9000,
+                        "name": "Ethernet1",
+                        "speed": 25000
+                    }
+                ]
+            }
+        }
+    },
     "ACL_TABLE_DEFAULT_VALUE_STAGE": {
         "sonic-acl:sonic-acl": {
             "sonic-acl:ACL_TABLE": {
diff --git a/src/sonic-yang-models/yang-templates/sonic-acl.yang.j2 b/src/sonic-yang-models/yang-templates/sonic-acl.yang.j2
index 513c46709..882dbf8ef 100644
--- a/src/sonic-yang-models/yang-templates/sonic-acl.yang.j2
+++ b/src/sonic-yang-models/yang-templates/sonic-acl.yang.j2
@@ -202,13 +202,13 @@ module sonic-acl {
 						when "not(IP_TYPE) or boolean(IP_TYPE[.='ANY' or .='IP' or .='IPV4' or .='IPv4ANY' or .='ARP'])";
 						leaf ICMP_TYPE {
 							type uint8 {
-								range 1..44;
+								range 0..255;
 							}
 						}
 
 						leaf ICMP_CODE {
 							type uint8 {
-								range 1..16;
+								range 0..255;
 							}
 						}
 					}
@@ -217,13 +217,13 @@ module sonic-acl {
 						when "not(IP_TYPE) or boolean(IP_TYPE[.='ANY' or .='IP' or .='IPV6' or .='IPv6ANY'])";
 						leaf ICMPV6_TYPE {
 							type uint8 {
-								range 1..44;
+								range 0..255;
 							}
 						}
 
 						leaf ICMPV6_CODE {
 							type uint8 {
-								range 1..16;
+								range 0..255;
 							}
 						}
 					}

From 8a780ca7e93a37eb1a8ee6a1822221f7d8fd92e9 Mon Sep 17 00:00:00 2001
From: ganglv <88995770+ganglyu@users.noreply.github.com>
Date: Tue, 12 Mar 2024 02:46:23 +0800
Subject: [PATCH 0320/1115] ASN 0 for BGP monitor (#18322)

### Why I did it
BGP monitor asn is 0 in production, and we should have test to cover this configuration.

### How I did it
Update sonic-config-engine unit test, BGP monitor uses asn 0.

#### How to verify it
Run sonic-config-engine unit test.
---
 src/sonic-config-engine/tests/simple-sample-graph.xml | 2 +-
 src/sonic-config-engine/tests/test_cfggen.py          | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/sonic-config-engine/tests/simple-sample-graph.xml b/src/sonic-config-engine/tests/simple-sample-graph.xml
index 7da7cb58d..d0dcc0280 100644
--- a/src/sonic-config-engine/tests/simple-sample-graph.xml
+++ b/src/sonic-config-engine/tests/simple-sample-graph.xml
@@ -72,7 +72,7 @@
     </PeeringSessions>
     <Routers xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution">
       <a:BGPRouterDeclaration>
-          <a:ASN>1</a:ASN>
+          <a:ASN>0</a:ASN>
           <a:BgpGroups/>
           <a:Hostname>BGPMonitor</a:Hostname>
           <a:Peers>
diff --git a/src/sonic-config-engine/tests/test_cfggen.py b/src/sonic-config-engine/tests/test_cfggen.py
index b8480cf81..7018dc7db 100644
--- a/src/sonic-config-engine/tests/test_cfggen.py
+++ b/src/sonic-config-engine/tests/test_cfggen.py
@@ -720,7 +720,7 @@ def test_minigraph_bgp_mon(self):
         output = self.run_script(argument)
         self.assertEqual(
             utils.to_dict(output.strip()),
-            utils.to_dict("{'10.20.30.40': {'rrclient': 0, 'name': 'BGPMonitor', 'local_addr': '10.1.0.32', 'nhopself': 0, 'holdtime': '10', 'asn': '1', 'keepalive': '3'}}")
+            utils.to_dict("{'10.20.30.40': {'rrclient': 0, 'name': 'BGPMonitor', 'local_addr': '10.1.0.32', 'nhopself': 0, 'holdtime': '10', 'asn': '0', 'keepalive': '3'}}")
         )
 
     def test_minigraph_bgp_voq_chassis_peer(self):

From f9af461dd035415707773b5682b962a586950124 Mon Sep 17 00:00:00 2001
From: mihirpat1 <112018033+mihirpat1@users.noreply.github.com>
Date: Mon, 11 Mar 2024 15:27:25 -0700
Subject: [PATCH 0321/1115] [YANG]: Add Yang model support for adding
 dom_polling to PORT table (#18277)

### Why I did it
Added YANG related changes for adding `dom_polling` field in PORT table of CONFIG_DB. This field can be set with `config interface transceiver dom PORT_NAME (enable|disable)` CLI.

The `dom_polling` field was added through https://github.com/sonic-net/sonic-utilities/pull/3187. Please refer to this PR for the details on the reason for adding `dom_polling` field.

### How I did it
Added `dom_polling` field to CONFIG_DB PORT table.

#### How to verify it
Added unit tests for both valid and invalid options for controlling `dom_polling`.
Valid values for for `dom_polling` are `enabled` and `disabled`
Any other value is treated as an invalid value
---
 src/sonic-yang-models/doc/Configuration.md    | 15 ++++---
 .../tests/files/sample_config_db.json         |  6 ++-
 .../tests/yang_model_tests/tests/port.json    |  8 ++++
 .../yang_model_tests/tests_config/port.json   | 42 +++++++++++++++++++
 .../yang-models/sonic-port.yang               |  4 ++
 5 files changed, 68 insertions(+), 7 deletions(-)

diff --git a/src/sonic-yang-models/doc/Configuration.md b/src/sonic-yang-models/doc/Configuration.md
index fb30dc422..886277d26 100644
--- a/src/sonic-yang-models/doc/Configuration.md
+++ b/src/sonic-yang-models/doc/Configuration.md
@@ -1807,7 +1807,8 @@ optional attributes.
             "speed": "40000",
             "link_training": "off",
             "laser_freq": "191300",
-            "tx_power": "-27.3"
+            "tx_power": "-27.3",
+            "dom_polling": "enabled"
         },
         "Ethernet1": {
             "index": "1",
@@ -1819,7 +1820,8 @@ optional attributes.
             "speed": "40000",
             "link_training": "on",
             "laser_freq": "191300",
-            "tx_power": "-27.3"
+            "tx_power": "-27.3",
+            "dom_polling": "enabled"
         },
         "Ethernet63": {
             "index": "63",
@@ -1829,7 +1831,8 @@ optional attributes.
             "alias": "fortyGigE1/4/16",
             "speed": "40000",
             "laser_freq": "191300",
-            "tx_power": "-27.3"
+            "tx_power": "-27.3",
+            "dom_polling": "disabled"
         }
     }
 }
@@ -1845,7 +1848,8 @@ optional attributes.
             "mtu": "9100",
             "alias": "etp1a",
             "speed": "100000",
-            "subport": 1
+            "subport": 1,
+            "dom_polling": "enabled"
         },
         "Ethernet4": {
             "admin_status": "up",
@@ -1855,7 +1859,8 @@ optional attributes.
             "mtu": "9100",
             "alias": "etp1b",
             "speed": "100000",
-            "subport": 2
+            "subport": 2,
+            "dom_polling": "enabled"
         },
     }
 }
diff --git a/src/sonic-yang-models/tests/files/sample_config_db.json b/src/sonic-yang-models/tests/files/sample_config_db.json
index f54e9f588..050f4433b 100644
--- a/src/sonic-yang-models/tests/files/sample_config_db.json
+++ b/src/sonic-yang-models/tests/files/sample_config_db.json
@@ -605,7 +605,8 @@
                 "adv_speeds": "all",
                 "adv_interface_types": "all",
                 "subport" : "0",
-                "mode":"trunk"
+                "mode":"trunk",
+                "dom_polling":"enabled"
             },
             "Ethernet3": {
                 "alias": "Eth1/4",
@@ -625,7 +626,8 @@
                 "tpid": "0x9100",
                 "admin_status": "up",
                 "subport": "2",
-                "mode":"trunk"
+                "mode":"trunk",
+                "dom_polling":"enabled"
             },
             "Ethernet5": {
                 "alias": "Eth2/2",
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/port.json b/src/sonic-yang-models/tests/yang_model_tests/tests/port.json
index 38c2b27cb..a6656b832 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests/port.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests/port.json
@@ -134,6 +134,14 @@
          "eStrKey": "Range",
          "eStr": "0..8"
      },
+     "PORT_VALID_DOM_POLLING": {
+        "desc": "PORT_VALID_DOM_POLLING no failure."
+    },
+    "PORT_INVALID_DOM_POLLING": {
+        "desc": "PORT_INVALID_DOM_POLLING invalid condition failure.",
+        "eStrKey" : "InvalidValue",
+        "eStr": ["dom_polling"]
+    },
      "PORT_AUTO_FEC_TEST": {
          "desc": "PORT_AUTO_FEC_TEST validate auto mode in fec."
      }
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/port.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/port.json
index 5864ae144..3e8899b6e 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/port.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/port.json
@@ -669,6 +669,48 @@
         }
     },
 
+    "PORT_INVALID_DOM_POLLING": {
+        "sonic-port:sonic-port": {
+            "sonic-port:PORT": {
+                "PORT_LIST": [
+                    {
+                        "name": "Ethernet0",
+                        "alias": "etp1a",
+                        "lanes": "60, 61",
+                        "speed": 100000,
+                        "subport": 1,
+                        "dom_polling": "on"
+                    }
+                ]
+            }
+        }
+    },
+
+    "PORT_VALID_DOM_POLLING": {
+       "sonic-port:sonic-port": {
+           "sonic-port:PORT": {
+               "PORT_LIST": [
+                   {
+                       "name": "Ethernet0",
+                       "alias": "etp1a",
+                       "lanes": "60, 61",
+                       "speed": 100000,
+                       "subport": 1,
+                       "dom_polling": "enabled"
+                   },
+                   {
+                      "name": "Ethernet2",
+                       "alias": "etp1b",
+                       "lanes": "62, 63",
+                       "speed": 100000,
+                       "subport": 2,
+                       "dom_polling": "disabled"
+                   }
+               ]
+           }
+       }
+   },
+
     "PORT_AUTO_FEC_TEST": {
         "sonic-port:sonic-port": {
             "sonic-port:PORT": {
diff --git a/src/sonic-yang-models/yang-models/sonic-port.yang b/src/sonic-yang-models/yang-models/sonic-port.yang
index 94a38967c..f82d74465 100644
--- a/src/sonic-yang-models/yang-models/sonic-port.yang
+++ b/src/sonic-yang-models/yang-models/sonic-port.yang
@@ -161,6 +161,10 @@ module sonic-port{
 					}
 				}
 
+				leaf dom_polling {
+					type stypes:admin_mode;
+				}
+
 				leaf pfc_asym {
 					type string {
 						pattern "on|off";

From c02206652290268f3fdf6de7b2a0277ab6c443fb Mon Sep 17 00:00:00 2001
From: longhuan-cisco <84595962+longhuan-cisco@users.noreply.github.com>
Date: Mon, 11 Mar 2024 19:39:13 -0700
Subject: [PATCH 0322/1115] Add enable_sff_mgr flag support for xcvrd (#18054)

This PR is a dependency of sonic-net/sonic-platform-daemons#383
HLD of sff_mgr: sonic-net/SONiC#1371

Why I did it
Add enable_xcvrd_sff_mgr flag support for sff_mgr
---
 .../docker-pmon.supervisord.conf.j2           | 20 ++++++++++++++-----
 1 file changed, 15 insertions(+), 5 deletions(-)

diff --git a/dockers/docker-platform-monitor/docker-pmon.supervisord.conf.j2 b/dockers/docker-platform-monitor/docker-pmon.supervisord.conf.j2
index 3cb5f0509..4673b62da 100644
--- a/dockers/docker-platform-monitor/docker-pmon.supervisord.conf.j2
+++ b/dockers/docker-platform-monitor/docker-pmon.supervisord.conf.j2
@@ -95,13 +95,23 @@ dependent_startup_wait_for=rsyslogd:running
 
 {% if not skip_xcvrd %}
 [program:xcvrd]
-{% if delay_xcvrd %}
-command={% if skip_xcvrd_cmis_mgr %} bash -c "sleep 30 && python3 /usr/local/bin/xcvrd --skip_cmis_mgr" {% else %} bash -c "sleep 30 && python3 /usr/local/bin/xcvrd" {% endif %}
+{% set base_command = "python3 /usr/local/bin/xcvrd" %}
+{% set options = "" -%}
 
-{% else %}
-command={% if skip_xcvrd_cmis_mgr %} python3 /usr/local/bin/xcvrd --skip_cmis_mgr {% else %} python3 /usr/local/bin/xcvrd {% endif %}
+{% if skip_xcvrd_cmis_mgr %}
+    {%- set options = options + " --skip_cmis_mgr" %}
+{% endif -%}
 
-{% endif %}
+{% if enable_xcvrd_sff_mgr %}
+    {%- set options = options + " --enable_sff_mgr" %}
+{% endif -%}
+
+{% if delay_xcvrd %}
+    {%- set command = "bash -c \"sleep 30 && " ~ base_command ~ options ~ "\"" %}
+{% else %}
+    {%- set command = base_command ~ options %}
+{% endif -%}
+command={{ command }}
 priority=6
 autostart=false
 autorestart=unexpected

From 283d1ff97d3094281dd040428e000028bc14e57f Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Tue, 12 Mar 2024 19:01:17 +0800
Subject: [PATCH 0323/1115] [submodule] Update submodule sonic-linux-kernel to
 the latest HEAD automatically (#18333)

#### Why I did it
src/sonic-linux-kernel
```
* b6fd1ba - (HEAD -> master, origin/master, origin/HEAD) arm64: dts: marvell: Add DTS for 7215-IXS-A1 board (#378) (4 hours ago) [Pavan-Nokia]
* bab1510 - Disable small sector erase size for UBIFS on flash (#382) (8 hours ago) [Mridul Bajpai]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-linux-kernel | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-linux-kernel b/src/sonic-linux-kernel
index 45295bfbf..b6fd1ba62 160000
--- a/src/sonic-linux-kernel
+++ b/src/sonic-linux-kernel
@@ -1 +1 @@
-Subproject commit 45295bfbf051bc7d9b591eab465bd01ca81687ff
+Subproject commit b6fd1ba62cd3677536a33f261cdce0350194706c

From b05f488ba6fc61d24ea50656951d3865de68158d Mon Sep 17 00:00:00 2001
From: Zhijian Li <zhijianli@microsoft.com>
Date: Wed, 13 Mar 2024 06:07:08 +0800
Subject: [PATCH 0324/1115] Update minigraph testcases (#18321)

---
 src/sonic-config-engine/tests/test_minigraph_case.py | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/src/sonic-config-engine/tests/test_minigraph_case.py b/src/sonic-config-engine/tests/test_minigraph_case.py
index 70c5c4103..8bad0f5f3 100644
--- a/src/sonic-config-engine/tests/test_minigraph_case.py
+++ b/src/sonic-config-engine/tests/test_minigraph_case.py
@@ -528,7 +528,7 @@ def test_minigraph_acl_type_bmcdata(self):
         }
         # TC1: Minigraph contains acl table type BmcData
         sample_mx_graph = os.path.join(self.test_dir,'simple-sample-graph-mx.xml')
-        result = minigraph.parse_xml(sample_mx_graph)
+        result = minigraph.parse_xml(sample_mx_graph, port_config_file=self.port_config)
         self.assertIn('ACL_TABLE_TYPE', result)
         self.assertIn('BMCDATA', result['ACL_TABLE_TYPE'])
         self.assertIn('BMCDATAV6', result['ACL_TABLE_TYPE'])
@@ -537,7 +537,7 @@ def test_minigraph_acl_type_bmcdata(self):
         self.assertDictEqual(result['ACL_TABLE']['BMC_ACL_NORTHBOUND'], expected_acl_table_bmc_acl_northbound)
         self.assertDictEqual(result['ACL_TABLE']['BMC_ACL_NORTHBOUND_V6'], expected_acl_table_bmc_acl_northbound_v6)
         # TC2: Minigraph doesn't contain acl table type BmcData
-        result = minigraph.parse_xml(self.sample_graph)
+        result = minigraph.parse_xml(self.sample_graph, port_config_file=self.port_config)
         self.assertNotIn('ACL_TABLE_TYPE', result)
 
     def test_parse_device_desc_xml_mgmt_interface(self):
@@ -564,7 +564,7 @@ def test_mgmt_device_disable_counters(self):
         mgmt_graphs = ['simple-sample-graph-mx.xml', 'simple-sample-graph-m0.xml']
         for graph in mgmt_graphs:
             graph_path = os.path.join(self.test_dir, graph)
-            result = minigraph.parse_xml(graph_path)
+            result = minigraph.parse_xml(graph_path, port_config_file=self.port_config)
             self.assertIn('FLEX_COUNTER_TABLE', result)
             for counter in expected_mgmt_disabled_counters:
                 self.assertIn(counter, result['FLEX_COUNTER_TABLE'])
@@ -573,5 +573,5 @@ def test_mgmt_device_disable_counters(self):
                 if counter in result['FLEX_COUNTER_TABLE']:
                     self.assertDictEqual(result['FLEX_COUNTER_TABLE'][counter], {'FLEX_COUNTER_STATUS': 'enable'})
         # TC2: For other minigraph, result should not contain FLEX_COUNTER_TABLE
-        result = minigraph.parse_xml(self.sample_graph)
+        result = minigraph.parse_xml(self.sample_graph, port_config_file=self.port_config)
         self.assertNotIn('FLEX_COUNTER_TABLE', result)

From 80448380e6976a3e326902a37818252abb160dc0 Mon Sep 17 00:00:00 2001
From: amulyan7 <98349131+amulyan7@users.noreply.github.com>
Date: Tue, 12 Mar 2024 18:36:51 -0700
Subject: [PATCH 0325/1115] Set loglevel for crash kernel to reduce verbosity
 and improve overall router recovery time (#18285)

Why I did it
On certain routers with baud rate 9600, crash kernel is taking a long time , close to ~5mins, to complete kernel dump and reload the box. On contrast to routers with baud rate 115200, crash kernel dump process is observed to be completed under 35s-60s (depending on the platform). Currently, all debug and informational messages are printed on the console which also factors in for the delay seen. Unless the router is monitored on console in real time, these messages are not very useful. Setting the loglevel to warning will help reduce the verbosity of logs on console, in turn allow crash kernel dump process to be completed in a reasonable time which will also help in overall router recovery time.

How I did it
Setting loglevel attribute in crashkernel cmdline

How to verify it
Install SONiC image with crashkernel cmdline with loglevel set to warning and initiate an induced a crash (sysrq-trigger)
crashkernel boot and dump process will be completed in 20s-30s depending on the platform
---
 files/image_config/kdump/kdump-tools | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/files/image_config/kdump/kdump-tools b/files/image_config/kdump/kdump-tools
index 83c276652..2fb39d81b 100644
--- a/files/image_config/kdump/kdump-tools
+++ b/files/image_config/kdump/kdump-tools
@@ -7,10 +7,11 @@ KDUMP_CMDLINE_APPEND="irqpoll nr_cpus=1 nousb systemd.unit=kdump-tools.service a
 
 # Reboot crash kernel on panic
 # Enable debug level logging of crash kernel for better visibility
+# Set loglevel to reduce verbosity and print only warning conditions
 # Disable advanced pcie features
 # Disable high precision event timer as on some platforms it is interfering with the kdump operation
 # Pass platform identifier string as part of crash kernel command line to be used by the reboot script during kdump
-KDUMP_CMDLINE_APPEND="${KDUMP_CMDLINE_APPEND} panic=10 debug hpet=disable pcie_port=compat pci=nommconf sonic_platform=__PLATFORM__"
+KDUMP_CMDLINE_APPEND="${KDUMP_CMDLINE_APPEND} panic=10 debug loglevel=4 hpet=disable pcie_port=compat pci=nommconf sonic_platform=__PLATFORM__"
 
 # Use SONiC reboot wrapper script present in /usr/local/bin post kdump
 PATH=/usr/local/bin:$PATH

From 86a9ab6a7b8c08d142a2eb65d5f7ba8ab77ad221 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Wed, 13 Mar 2024 19:01:17 +0800
Subject: [PATCH 0326/1115] [submodule] Update submodule sonic-host-services to
 the latest HEAD automatically (#18354)

#### Why I did it
src/sonic-host-services
```
* 6fce478 - (HEAD -> master, origin/master, origin/HEAD) Remove UpdateGraphService feature (#105) (2 hours ago) [ganglv]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-host-services | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-host-services b/src/sonic-host-services
index 970e7b34d..6fce4781d 160000
--- a/src/sonic-host-services
+++ b/src/sonic-host-services
@@ -1 +1 @@
-Subproject commit 970e7b34dec888c4f32a728146cba27ddafb37ba
+Subproject commit 6fce4781da508709f11be595e3c7048ffd3138cb

From a924e779a9febc5fe2fb8b3150692830e91ed9c2 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Thu, 14 Mar 2024 19:00:58 +0800
Subject: [PATCH 0327/1115] [submodule] Update submodule sonic-platform-daemons
 to the latest HEAD automatically (#18366)

#### Why I did it
src/sonic-platform-daemons
```
* 04b0f88 - (HEAD -> master, origin/master, origin/HEAD) [ycabled] Fix insert delete events for ycabled OIR by subscribing to TRANSCEIVER_INFO instead of TRANSCEIVER_STATUS table (#442) (13 hours ago) [vdahiya12]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-platform-daemons | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-platform-daemons b/src/sonic-platform-daemons
index 8a5ca2bac..04b0f88d0 160000
--- a/src/sonic-platform-daemons
+++ b/src/sonic-platform-daemons
@@ -1 +1 @@
-Subproject commit 8a5ca2bac634f5dfb440a9c635ca4cc7e06d478a
+Subproject commit 04b0f88d06537f934ca1ebb853ba00609650274b

From 533a3861fca9b267c730ba0def2f5339d35c8162 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Thu, 14 Mar 2024 19:01:04 +0800
Subject: [PATCH 0328/1115] [submodule] Update submodule sonic-linux-kernel to
 the latest HEAD automatically (#18365)

#### Why I did it
src/sonic-linux-kernel
```
* 4d82cd7 - (HEAD -> master, origin/master, origin/HEAD) [marvell-arm64] Update patches for 98DX35xx platform (#383) (2 hours ago) [Pavan Naregundi]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-linux-kernel | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-linux-kernel b/src/sonic-linux-kernel
index b6fd1ba62..4d82cd7ef 160000
--- a/src/sonic-linux-kernel
+++ b/src/sonic-linux-kernel
@@ -1 +1 @@
-Subproject commit b6fd1ba62cd3677536a33f261cdce0350194706c
+Subproject commit 4d82cd7efee871a8f1295175c704820b6d4b7f33

From 9da50901c40ddc63bdcb181b43f2f0e3d14e4c45 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Thu, 14 Mar 2024 19:01:09 +0800
Subject: [PATCH 0329/1115] [submodule] Update submodule sonic-swss-common to
 the latest HEAD automatically (#18356)

#### Why I did it
src/sonic-swss-common
```
* 476a65c - (HEAD -> master, origin/master, origin/HEAD) Added new P4RT table names. (#832) (34 hours ago) [mint570]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-swss-common | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-swss-common b/src/sonic-swss-common
index 933008642..476a65c7a 160000
--- a/src/sonic-swss-common
+++ b/src/sonic-swss-common
@@ -1 +1 @@
-Subproject commit 93300864273d571886eb1eb4c60b13245c68442f
+Subproject commit 476a65c7adaf28438bc80261f0877c98dc851d64

From 9a6d6137a3c1603995c6169924bc32be9a707183 Mon Sep 17 00:00:00 2001
From: ganglv <88995770+ganglyu@users.noreply.github.com>
Date: Fri, 15 Mar 2024 04:12:26 +0800
Subject: [PATCH 0330/1115] Remove UpdateGraphService feature (#18330)

### Why I did it
Remove UpdateGraphService feature from sonic image. The goal is to simplify the bootup process.

### How I did it
Remove updategraph service and updategraph script.
Update all related services, replace updategraph.service with config-setup.service.

#### How to verify it
Build and install new image, load minigraph and check all the services.
---
 Makefile.work                                 |  3 --
 files/build_templates/dhcp_relay.service.j2   |  4 +-
 files/build_templates/eventd.service.j2       |  4 +-
 files/build_templates/iccpd.service.j2        |  4 +-
 files/build_templates/mux.service.j2          |  2 +-
 files/build_templates/nat.service.j2          |  4 +-
 files/build_templates/pde.service.j2          |  2 +-
 .../per_namespace/bgp.service.j2              |  4 +-
 .../per_namespace/gbsyncd.service.j2          |  4 +-
 .../per_namespace/lldp.service.j2             |  4 +-
 .../per_namespace/swss.service.j2             |  4 +-
 .../per_namespace/syncd.service.j2            |  4 +-
 .../per_namespace/teamd.service.j2            |  4 +-
 files/build_templates/pmon.service.j2         |  4 +-
 files/build_templates/radv.service.j2         |  4 +-
 files/build_templates/restapi.service.j2      |  4 +-
 files/build_templates/snmp.service.j2         |  4 +-
 .../build_templates/sonic_debian_extension.j2 | 12 -----
 files/build_templates/tacacs-config.service   |  4 +-
 files/build_templates/tacacs-config.timer     |  2 +-
 files/build_templates/updategraph.service.j2  | 12 -----
 files/image_config/config-setup/config-setup  | 38 ++------------
 files/image_config/copp/copp-config.service   |  4 +-
 .../hostname/hostname-config.service          |  4 +-
 .../interfaces/interfaces-config.service      |  4 +-
 .../logrotate/logrotate-config.service        |  4 +-
 files/image_config/ntp/ntp-config.service     |  4 +-
 files/image_config/platform/rc.local          |  3 +-
 .../resolv-config/resolv-config.service       |  4 +-
 .../rsyslog/rsyslog-config.service            |  4 +-
 .../secureboot/allowlist_paths.conf           |  1 -
 .../system-health/system-health.service       |  4 +-
 files/image_config/updategraph/updategraph    | 51 -------------------
 rules/config                                  |  6 ---
 rules/docker-dhcp-relay.mk                    |  2 +-
 rules/docker-dhcp-server.mk                   |  2 +-
 rules/docker-eventd.mk                        |  3 --
 rules/docker-macsec.mk                        |  2 +-
 slave.mk                                      |  2 -
 39 files changed, 58 insertions(+), 177 deletions(-)
 delete mode 100644 files/build_templates/updategraph.service.j2
 delete mode 100755 files/image_config/updategraph/updategraph

diff --git a/Makefile.work b/Makefile.work
index 18ff536f5..bece7e56c 100644
--- a/Makefile.work
+++ b/Makefile.work
@@ -5,8 +5,6 @@
 #
 #  * PLATFORM: Specific platform we wish to build images for.
 #  * BUILD_NUMBER: Desired version-number to pass to the building-system.
-#  * ENABLE_DHCP_GRAPH_SERVICE: Enables get-graph service to fetch minigraph files
-#    through http.
 #  * ENABLE_ZTP: Enables zero touch provisioning.
 #  * SHUTDOWN_BGP_ON_START: Sets admin-down state for all bgp peerings after restart.
 #  * INCLUDE_KUBERNETES: Allows including Kubernetes
@@ -523,7 +521,6 @@ SONIC_BUILD_INSTRUCTION :=  $(MAKE) \
                            BUILD_TIMESTAMP=$(BUILD_TIMESTAMP) \
                            SONIC_IMAGE_VERSION=$(SONIC_IMAGE_VERSION) \
                            SLAVE_TAG=$(SLAVE_TAG) \
-                           ENABLE_DHCP_GRAPH_SERVICE=$(ENABLE_DHCP_GRAPH_SERVICE) \
                            ENABLE_ZTP=$(ENABLE_ZTP) \
                            INCLUDE_PDE=$(INCLUDE_PDE) \
                            SHUTDOWN_BGP_ON_START=$(SHUTDOWN_BGP_ON_START) \
diff --git a/files/build_templates/dhcp_relay.service.j2 b/files/build_templates/dhcp_relay.service.j2
index 55a0ab0a4..d87186e4d 100644
--- a/files/build_templates/dhcp_relay.service.j2
+++ b/files/build_templates/dhcp_relay.service.j2
@@ -1,7 +1,7 @@
 [Unit]
 Description=DHCP relay container
-Requires=updategraph.service
-After=updategraph.service swss.service syncd.service teamd.service
+Requires=config-setup.service
+After=config-setup.service swss.service syncd.service teamd.service
 BindsTo=sonic.target
 After=sonic.target
 Before=ntp-config.service
diff --git a/files/build_templates/eventd.service.j2 b/files/build_templates/eventd.service.j2
index 0ad7f52ee..95e2805f7 100644
--- a/files/build_templates/eventd.service.j2
+++ b/files/build_templates/eventd.service.j2
@@ -1,7 +1,7 @@
 [Unit]
 Description=EVENTD container
-Requires=updategraph.service
-After=updategraph.service
+Requires=config-setup.service
+After=config-setup.service
 BindsTo=sonic.target
 After=sonic.target
 StartLimitIntervalSec=1200
diff --git a/files/build_templates/iccpd.service.j2 b/files/build_templates/iccpd.service.j2
index d78407a87..d62662d50 100644
--- a/files/build_templates/iccpd.service.j2
+++ b/files/build_templates/iccpd.service.j2
@@ -1,7 +1,7 @@
 [Unit]
 Description=ICCPD container
-Requires=updategraph.service swss.service
-After=updategraph.service swss.service
+Requires=config-setup.service swss.service
+After=config-setup.service swss.service
 BindsTo=sonic.target
 After=sonic.target
 
diff --git a/files/build_templates/mux.service.j2 b/files/build_templates/mux.service.j2
index dbb65ac9e..6e54f137e 100644
--- a/files/build_templates/mux.service.j2
+++ b/files/build_templates/mux.service.j2
@@ -1,6 +1,6 @@
 [Unit]
 Description=MUX Cable Container
-Requires=database.service updategraph.service swss.service
+Requires=database.service config-setup.service swss.service
 After=swss.service interfaces-config.service
 BindsTo=sonic.target
 After=sonic.target
diff --git a/files/build_templates/nat.service.j2 b/files/build_templates/nat.service.j2
index d0ec4a283..095bcd40c 100644
--- a/files/build_templates/nat.service.j2
+++ b/files/build_templates/nat.service.j2
@@ -1,7 +1,7 @@
 [Unit]
 Description=NAT container
-Requires=updategraph.service
-After=updategraph.service swss.service syncd.service
+Requires=config-setup.service
+After=config-setup.service swss.service syncd.service
 BindsTo=sonic.target
 After=sonic.target
 Before=ntp-config.service
diff --git a/files/build_templates/pde.service.j2 b/files/build_templates/pde.service.j2
index f053b57ad..61c0b6339 100644
--- a/files/build_templates/pde.service.j2
+++ b/files/build_templates/pde.service.j2
@@ -5,7 +5,7 @@ Requires=opennsl-modules.service
 ConditionPathExists=!/usr/bin/swss.sh
 {% endif %}
 
-After=updategraph.service
+After=config-setup.service
 {% if sonic_asic_platform == 'broadcom' %}
 After=opennsl-modules.service
 {% endif %}
diff --git a/files/build_templates/per_namespace/bgp.service.j2 b/files/build_templates/per_namespace/bgp.service.j2
index e9c1a9231..52d7d1084 100644
--- a/files/build_templates/per_namespace/bgp.service.j2
+++ b/files/build_templates/per_namespace/bgp.service.j2
@@ -2,8 +2,8 @@
 Description=BGP container
 Requires=database{% if multi_instance == 'true' %}@%i{% endif %}.service
 After=database{% if multi_instance == 'true' %}@%i{% endif %}.service
-Requires=updategraph.service
-After=updategraph.service
+Requires=config-setup.service
+After=config-setup.service
 BindsTo=sonic.target
 After=sonic.target
 Before=ntp-config.service
diff --git a/files/build_templates/per_namespace/gbsyncd.service.j2 b/files/build_templates/per_namespace/gbsyncd.service.j2
index 90a92b7e8..7a6de8c7d 100644
--- a/files/build_templates/per_namespace/gbsyncd.service.j2
+++ b/files/build_templates/per_namespace/gbsyncd.service.j2
@@ -1,8 +1,8 @@
 [Unit]
 Description={{docker_container_name}} service
-Requires=database{% if multi_instance == 'true' %}@%i{% endif %}.service updategraph.service
+Requires=database{% if multi_instance == 'true' %}@%i{% endif %}.service config-setup.service
 ConditionPathExists=!/usr/share/sonic/hwsku/gearbox_config.json
-After=database{% if multi_instance == 'true' %}@%i{% endif %}.service updategraph.service
+After=database{% if multi_instance == 'true' %}@%i{% endif %}.service config-setup.service
 After=interfaces-config.service
 After=swss{% if multi_instance == 'true' %}@%i{% endif %}.service
 BindsTo=sonic.target
diff --git a/files/build_templates/per_namespace/lldp.service.j2 b/files/build_templates/per_namespace/lldp.service.j2
index d23abc0a1..95d938472 100644
--- a/files/build_templates/per_namespace/lldp.service.j2
+++ b/files/build_templates/per_namespace/lldp.service.j2
@@ -4,8 +4,8 @@ Requires=database{% if multi_instance == 'true' %}@%i{% endif %}.service
 After=database{% if multi_instance == 'true' %}@%i{% endif %}.service
 After=swss{% if multi_instance == 'true' %}@%i{% endif %}.service
 After=syncd{% if multi_instance == 'true' %}@%i{% endif %}.service
-Requires=updategraph.service
-After=updategraph.service
+Requires=config-setup.service
+After=config-setup.service
 BindsTo=sonic.target
 After=sonic.target
 BindsTo=sonic.target
diff --git a/files/build_templates/per_namespace/swss.service.j2 b/files/build_templates/per_namespace/swss.service.j2
index 58bca6a21..b0560aabc 100644
--- a/files/build_templates/per_namespace/swss.service.j2
+++ b/files/build_templates/per_namespace/swss.service.j2
@@ -9,8 +9,8 @@ After=topology.service
 {% if sonic_asic_platform == 'broadcom' %}
 Requires=opennsl-modules.service
 {% endif %}
-Requires=updategraph.service
-After=updategraph.service
+Requires=config-setup.service
+After=config-setup.service
 BindsTo=sonic.target
 After=sonic.target
 Before=ntp-config.service
diff --git a/files/build_templates/per_namespace/syncd.service.j2 b/files/build_templates/per_namespace/syncd.service.j2
index 1fb803390..842eaebc7 100644
--- a/files/build_templates/per_namespace/syncd.service.j2
+++ b/files/build_templates/per_namespace/syncd.service.j2
@@ -14,8 +14,8 @@ After=opennsl-modules.service
 Requires=nps-modules.service
 After=nps-modules.service
 {% endif %}
-Requires=updategraph.service
-After=updategraph.service
+Requires=config-setup.service
+After=config-setup.service
 BindsTo=sonic.target
 After=sonic.target
 Before=ntp-config.service
diff --git a/files/build_templates/per_namespace/teamd.service.j2 b/files/build_templates/per_namespace/teamd.service.j2
index 212209e37..ddf6691ea 100644
--- a/files/build_templates/per_namespace/teamd.service.j2
+++ b/files/build_templates/per_namespace/teamd.service.j2
@@ -5,8 +5,8 @@ After=swss{% if multi_instance == 'true' %}@%i{% endif %}.service
 Requires=topology.service
 After=topology.service
 {% endif %}
-Requires=updategraph.service
-After=updategraph.service
+Requires=config-setup.service
+After=config-setup.service
 BindsTo=sonic.target
 After=sonic.target
 Before=ntp-config.service
diff --git a/files/build_templates/pmon.service.j2 b/files/build_templates/pmon.service.j2
index 2e7ebca1c..b2cd75ac7 100644
--- a/files/build_templates/pmon.service.j2
+++ b/files/build_templates/pmon.service.j2
@@ -1,7 +1,7 @@
 [Unit]
 Description=Platform monitor container
-Requires=database.service updategraph.service
-After=database.service updategraph.service
+Requires=database.service config-setup.service
+After=database.service config-setup.service
 {% if sonic_asic_platform == 'mellanox' %}
 After=syncd.service
 {% endif %}
diff --git a/files/build_templates/radv.service.j2 b/files/build_templates/radv.service.j2
index 0c1352f9e..4c414a83c 100644
--- a/files/build_templates/radv.service.j2
+++ b/files/build_templates/radv.service.j2
@@ -1,7 +1,7 @@
 [Unit]
 Description=Router advertiser container
-Requires=updategraph.service
-After=updategraph.service swss.service syncd.service
+Requires=config-setup.service
+After=config-setup.service swss.service syncd.service
 Before=ntp-config.service
 BindsTo=sonic.target
 After=sonic.target
diff --git a/files/build_templates/restapi.service.j2 b/files/build_templates/restapi.service.j2
index d44f5f1ba..c82510238 100644
--- a/files/build_templates/restapi.service.j2
+++ b/files/build_templates/restapi.service.j2
@@ -1,7 +1,7 @@
 [Unit]
 Description=RestAPI container
-Requires=updategraph.service
-After=updategraph.service
+Requires=config-setup.service
+After=config-setup.service
 BindsTo=sonic.target
 After=sonic.target
 Before=ntp-config.service
diff --git a/files/build_templates/snmp.service.j2 b/files/build_templates/snmp.service.j2
index 503d54eed..db3ac1907 100644
--- a/files/build_templates/snmp.service.j2
+++ b/files/build_templates/snmp.service.j2
@@ -1,8 +1,8 @@
 [Unit]
 Description=SNMP container
-Requires=updategraph.service
+Requires=config-setup.service
 Requisite=swss.service
-After=updategraph.service swss.service syncd.service interfaces-config.service
+After=config-setup.service swss.service syncd.service interfaces-config.service
 BindsTo=sonic.target
 After=sonic.target
 Before=ntp-config.service
diff --git a/files/build_templates/sonic_debian_extension.j2 b/files/build_templates/sonic_debian_extension.j2
index 167bdaaa4..a1e102759 100644
--- a/files/build_templates/sonic_debian_extension.j2
+++ b/files/build_templates/sonic_debian_extension.j2
@@ -610,18 +610,6 @@ sudo cp $IMAGE_CONFIGS/config-topology/config-topology.service $FILESYSTEM_ROOT_
 echo "config-topology.service" | sudo tee -a $GENERATED_SERVICE_FILE
 sudo cp $IMAGE_CONFIGS/config-topology/config-topology.sh $FILESYSTEM_ROOT/usr/bin
 
-# Copy updategraph script and service file
-j2 files/build_templates/updategraph.service.j2 | sudo tee $FILESYSTEM_ROOT_USR_LIB_SYSTEMD_SYSTEM/updategraph.service
-sudo cp $IMAGE_CONFIGS/updategraph/updategraph $FILESYSTEM_ROOT/usr/bin/
-echo "updategraph.service" | sudo tee -a $GENERATED_SERVICE_FILE
-{% if enable_dhcp_graph_service == "y" %}
-sudo bash -c "echo enabled=true > $FILESYSTEM_ROOT/etc/sonic/updategraph.conf"
-sudo bash -c "echo src=dhcp >> $FILESYSTEM_ROOT/etc/sonic/updategraph.conf"
-sudo bash -c "echo dhcp_as_static=true >> $FILESYSTEM_ROOT/etc/sonic/updategraph.conf"
-{% else %}
-sudo bash -c "echo enabled=false > $FILESYSTEM_ROOT/etc/sonic/updategraph.conf"
-{% endif %}
-
 # Generate initial SONiC configuration file
 j2 files/build_templates/init_cfg.json.j2 | sudo tee $FILESYSTEM_ROOT/etc/sonic/init_cfg.json
 
diff --git a/files/build_templates/tacacs-config.service b/files/build_templates/tacacs-config.service
index 27e0e6891..e9a205065 100644
--- a/files/build_templates/tacacs-config.service
+++ b/files/build_templates/tacacs-config.service
@@ -1,7 +1,7 @@
 [Unit]
 Description=TACACS application
-Requires=updategraph.service
-After=updategraph.service
+Requires=config-setup.service
+After=config-setup.service
 BindsTo=sonic.target
 After=sonic.target
 
diff --git a/files/build_templates/tacacs-config.timer b/files/build_templates/tacacs-config.timer
index f8380cbab..0726f3ccd 100644
--- a/files/build_templates/tacacs-config.timer
+++ b/files/build_templates/tacacs-config.timer
@@ -1,7 +1,7 @@
 [Unit]
 Description=Delays tacacs apply until SONiC has started
 PartOf=tacacs-config.service
-After=updategraph.service
+After=config-setup.service
 
 [Timer]
 OnUnitActiveSec=0 sec
diff --git a/files/build_templates/updategraph.service.j2 b/files/build_templates/updategraph.service.j2
deleted file mode 100644
index 0e05cbf14..000000000
--- a/files/build_templates/updategraph.service.j2
+++ /dev/null
@@ -1,12 +0,0 @@
-[Unit]
-Description=Update minigraph and set configuration based on minigraph
-After=config-setup.service
-Requires=config-setup.service
-
-[Service]
-Type=oneshot
-ExecStart=/usr/bin/updategraph
-RemainAfterExit=yes
-
-[Install]
-WantedBy=multi-user.target
diff --git a/files/image_config/config-setup/config-setup b/files/image_config/config-setup/config-setup
index 3369b0ec8..21d56217c 100755
--- a/files/image_config/config-setup/config-setup
+++ b/files/image_config/config-setup/config-setup
@@ -25,7 +25,6 @@
 ###########################################################################
 
 # Initialize constants
-UPDATEGRAPH_CONF=/etc/sonic/updategraph.conf
 INIT_CFG_JSON=/etc/sonic/init_cfg.json
 CONFIG_DB_JSON=/etc/sonic/config_db.json
 CONFIG_DB_PATH=/etc/sonic/
@@ -180,24 +179,6 @@ check_system_warm_boot()
     fi
 }
 
-# Check if updategraph service is administratively enabled
-updategraph_is_enabled()
-{
-    rv=1
-    if [ -e ${UPDATEGRAPH_CONF} ]; then
-        updategraph_mode=$(grep enabled ${UPDATEGRAPH_CONF} | head -n 1 | cut -f2 -d=)
-        [ "${updategraph_mode}" = "true" ] && rv=0
-    fi
-    return $rv
-}
-
-# Disable updategraph admininistratively
-disable_updategraph()
-{
-    sed -i "/enabled=/d" ${UPDATEGRAPH_CONF}
-    echo "enabled=false" >> ${UPDATEGRAPH_CONF}
-}
-
 # Check if Zero Touch Provisioning is available and is administratively enabled
 ztp_is_enabled()
 {
@@ -273,18 +254,14 @@ generate_config()
 
 # Create SONiC configuration for first time bootup
 #  - If ZTP is enabled, ZTP configuraion is created
-#  - If ZTP is disabled and updategraph is disabled, factory default configuration
+#  - If ZTP is disabled, factory default configuration
 #    is created
-#  - If updategraph is enabled and ZTP is disabled, updategraph initializes
-#    configuration
 do_config_initialization()
 {
-    if  ! updategraph_is_enabled ; then
-        if ! ztp_is_enabled ; then
-            echo "No configuration detected, generating factory default configuration..."
-            generate_config factory ${CONFIG_DB_JSON}
-            reload_configdb ${CONFIG_DB_JSON}
-        fi
+    if ! ztp_is_enabled ; then
+        echo "No configuration detected, generating factory default configuration..."
+        generate_config factory ${CONFIG_DB_JSON}
+        reload_configdb ${CONFIG_DB_JSON}
     fi
 
     if  ztp_is_enabled ; then
@@ -376,7 +353,6 @@ do_config_migration()
 
     if [ x"${WARM_BOOT}" == x"true" ]; then
         echo "Warm reboot detected..."
-        disable_updategraph
         do_db_migration
         rm -f /tmp/pending_config_migration
         exit 0
@@ -384,14 +360,10 @@ do_config_migration()
         echo "Use config_db.json from old system..."
         reload_configdb
         do_db_migration
-        # Disable updategraph
-        disable_updategraph
     elif [ -r ${MINGRAPH_FILE} ]; then
         echo "Use minigraph.xml from old system..."
         reload_minigraph
         do_db_migration
-        # Disable updategraph
-        disable_updategraph
     else
         echo "Didn't found neither config_db.json nor minigraph.xml ..."
     fi
diff --git a/files/image_config/copp/copp-config.service b/files/image_config/copp/copp-config.service
index bd15de80b..e93e2908b 100644
--- a/files/image_config/copp/copp-config.service
+++ b/files/image_config/copp/copp-config.service
@@ -1,7 +1,7 @@
 [Unit]
 Description=Update CoPP configuration
-Requires=updategraph.service
-After=updategraph.service
+Requires=config-setup.service
+After=config-setup.service
 BindsTo=sonic.target
 After=sonic.target
 
diff --git a/files/image_config/hostname/hostname-config.service b/files/image_config/hostname/hostname-config.service
index c82c2d0bf..99bbe7e0e 100644
--- a/files/image_config/hostname/hostname-config.service
+++ b/files/image_config/hostname/hostname-config.service
@@ -1,7 +1,7 @@
 [Unit]
 Description=Update hostname based on configdb
-Requires=updategraph.service
-After=updategraph.service
+Requires=config-setup.service
+After=config-setup.service
 BindsTo=sonic.target
 After=sonic.target
 
diff --git a/files/image_config/interfaces/interfaces-config.service b/files/image_config/interfaces/interfaces-config.service
index a3f715764..46b6f5dfb 100644
--- a/files/image_config/interfaces/interfaces-config.service
+++ b/files/image_config/interfaces/interfaces-config.service
@@ -1,7 +1,7 @@
 [Unit]
 Description=Update interfaces configuration
-Requires=updategraph.service
-After=updategraph.service
+Requires=config-setup.service
+After=config-setup.service
 BindsTo=sonic.target
 After=sonic.target
 
diff --git a/files/image_config/logrotate/logrotate-config.service b/files/image_config/logrotate/logrotate-config.service
index 0b89f9d85..2e1486eed 100644
--- a/files/image_config/logrotate/logrotate-config.service
+++ b/files/image_config/logrotate/logrotate-config.service
@@ -1,7 +1,7 @@
 [Unit]
 Description=Update logrotate configuration
-Requires=updategraph.service
-After=updategraph.service
+Requires=config-setup.service
+After=config-setup.service
 
 [Service]
 Type=oneshot
diff --git a/files/image_config/ntp/ntp-config.service b/files/image_config/ntp/ntp-config.service
index 5639b0452..97ee960bd 100644
--- a/files/image_config/ntp/ntp-config.service
+++ b/files/image_config/ntp/ntp-config.service
@@ -1,7 +1,7 @@
 [Unit]
 Description=Update NTP configuration
-Requires=updategraph.service
-After=updategraph.service
+Requires=config-setup.service
+After=config-setup.service
 BindsTo=sonic.target
 After=sonic.target
 Before=ntp.service
diff --git a/files/image_config/platform/rc.local b/files/image_config/platform/rc.local
index 5cdefa887..c8fb1213c 100755
--- a/files/image_config/platform/rc.local
+++ b/files/image_config/platform/rc.local
@@ -254,7 +254,7 @@ if [ -f $FIRST_BOOT_FILE ]; then
     fi
 
     # Try to take old configuration saved during installation
-    # and create a flag in /tmp/ to let updategraph service know
+    # and create a flag in /tmp/
     if [ -d /host/old_config ]; then
         mv -f /host/old_config /etc/sonic/
         rm -rf /etc/sonic/old_config/old_config
@@ -275,7 +275,6 @@ if [ -f $FIRST_BOOT_FILE ]; then
         [ -f /host/migration/snmp.yml ] && mv /host/migration/snmp.yml /etc/sonic/old_config/
         [ -f /host/migration/golden_config_db.json ] && mv /host/migration/golden_config_db.json /etc/sonic/old_config/
         touch /tmp/pending_config_migration
-        [ -f /etc/sonic/updategraph.conf ] && sed -i -e "s/enabled=false/enabled=true/g" /etc/sonic/updategraph.conf
     else
         touch /tmp/pending_config_initialization
     fi
diff --git a/files/image_config/resolv-config/resolv-config.service b/files/image_config/resolv-config/resolv-config.service
index 18a261dcf..fa69330ab 100644
--- a/files/image_config/resolv-config/resolv-config.service
+++ b/files/image_config/resolv-config/resolv-config.service
@@ -1,7 +1,7 @@
 [Unit]
 Description=Update DNS configuration
-Requires=updategraph.service
-After=updategraph.service
+Requires=config-setup.service
+After=config-setup.service
 BindsTo=sonic.target
 After=sonic.target
 StartLimitIntervalSec=0
diff --git a/files/image_config/rsyslog/rsyslog-config.service b/files/image_config/rsyslog/rsyslog-config.service
index 4290766da..c3db881b8 100644
--- a/files/image_config/rsyslog/rsyslog-config.service
+++ b/files/image_config/rsyslog/rsyslog-config.service
@@ -1,7 +1,7 @@
 [Unit]
 Description=Update rsyslog configuration
-Requires=updategraph.service
-After=updategraph.service
+Requires=config-setup.service
+After=config-setup.service
 BindsTo=sonic.target
 After=sonic.target
 After=interfaces-config.service
diff --git a/files/image_config/secureboot/allowlist_paths.conf b/files/image_config/secureboot/allowlist_paths.conf
index 53ade2515..d63c3de72 100644
--- a/files/image_config/secureboot/allowlist_paths.conf
+++ b/files/image_config/secureboot/allowlist_paths.conf
@@ -28,7 +28,6 @@ etc/sonic/old_config/.*
 etc/sonic/port_config.json
 etc/sonic/snmp.yml
 etc/sonic/sonic-environment
-etc/sonic/updategraph.conf
 etc/ssh/ssh_host_rsa_key.pub
 etc/ssh/ssh_host_rsa_key
 etc/subgid
diff --git a/files/image_config/system-health/system-health.service b/files/image_config/system-health/system-health.service
index 3de6a5158..b8d375bda 100644
--- a/files/image_config/system-health/system-health.service
+++ b/files/image_config/system-health/system-health.service
@@ -1,7 +1,7 @@
 [Unit]
 Description=SONiC system health monitor
-Requires=database.service updategraph.service
-After=database.service updategraph.service
+Requires=database.service config-setup.service
+After=database.service config-setup.service
 
 [Service]
 ExecStart=/usr/local/bin/healthd
diff --git a/files/image_config/updategraph/updategraph b/files/image_config/updategraph/updategraph
deleted file mode 100755
index 905831ae7..000000000
--- a/files/image_config/updategraph/updategraph
+++ /dev/null
@@ -1,51 +0,0 @@
-#!/bin/bash
-
-# read SONiC immutable variables
-[ -f /etc/sonic/sonic-environment ] && . /etc/sonic/sonic-environment
-
-if [ ! -f /etc/sonic/updategraph.conf ]; then
-    echo "No updategraph.conf found, generating a default one."
-    echo "enabled=false" >/etc/sonic/updategraph.conf
-fi
-
-. /etc/sonic/updategraph.conf
-
-if [ "$enabled" = "reload_only" ]; then
-    echo "reload_only will not be supported in file updategraph.conf"
-    exit 1
-fi
-
-if [ "$enabled" != "true" ]; then
-    echo "Disabled in updategraph.conf. Skipping graph update."
-    exit 0
-fi
-
-# If ZTP package is available and enabled, use ZTP to download and load the graph.
-if [ -e /usr/bin/ztp ] && [ "$(ztp status -c)" != "0:DISABLED" ]; then
-    echo "ZTP is available and enabled. Skipping graph update."
-    exit 0
-fi
-
-# "`cat /tmp/dhcp_graph_url`" is always "N/A"
-echo "No graph_url option in DHCP response. Skipping graph update and generating an empty configuration."
-PLATFORM=${PLATFORM:-`sonic-cfggen -H -v DEVICE_METADATA.localhost.platform`}
-if [ -f /etc/sonic/minigraph.xml ]; then
-    sonic-cfggen -H -m /etc/sonic/minigraph.xml --preset empty > /tmp/device_meta.json
-else
-    PRESET=(`head -n 1 /usr/share/sonic/device/$PLATFORM/default_sku`)
-    sonic-cfggen -H -k ${PRESET[0]} --preset empty > /tmp/device_meta.json
-fi
-if [ -f /etc/sonic/init_cfg.json ]; then
-    sonic-cfggen -j /tmp/device_meta.json -j /etc/sonic/init_cfg.json --print-data > /etc/sonic/config_db.json
-else
-    cp -f /tmp/device_meta.json /etc/sonic/config_db.json
-fi
-sonic-db-cli CONFIG_DB FLUSHDB
-sonic-cfggen -j /etc/sonic/config_db.json --write-to-db
-sonic-db-cli CONFIG_DB SET "CONFIG_DB_INITIALIZED" "1"
-if [ "$dhcp_as_static" = "true" ]; then
-    sed -i "/enabled=/d" /etc/sonic/updategraph.conf
-    echo "enabled=false" >> /etc/sonic/updategraph.conf
-fi
-exit 0
-
diff --git a/rules/config b/rules/config
index 4628313dc..e52eeae4c 100644
--- a/rules/config
+++ b/rules/config
@@ -48,12 +48,6 @@ DEFAULT_USERNAME = admin
 # DEFAULT_PASSWORD - default password for installer build
 DEFAULT_PASSWORD = YourPaSsWoRd
 
-# ENABLE_DHCP_GRAPH_SERVICE - specify the source of minigraph to generate configuration file.
-# If set to y SONiC will get the minigraph from graph service. Graph service URL need to be
-# passed through DHCP option 225.
-# If not set (default behavior) the default minigraph built into the image will be used.
-# ENABLE_DHCP_GRAPH_SERVICE = y
-
 # ENABLE_ZTP - installs Zero Touch Provisioning support.
 # ENABLE_ZTP = y
 
diff --git a/rules/docker-dhcp-relay.mk b/rules/docker-dhcp-relay.mk
index 6f1b23ab8..13915a49e 100644
--- a/rules/docker-dhcp-relay.mk
+++ b/rules/docker-dhcp-relay.mk
@@ -23,7 +23,7 @@ $(DOCKER_DHCP_RELAY)_VERSION = 1.0.0
 $(DOCKER_DHCP_RELAY)_PACKAGE_NAME = dhcp-relay
 $(DOCKER_DHCP_RELAY)_PACKAGE_DEPENDS = database^1.0.0
 
-$(DOCKER_DHCP_RELAY)_SERVICE_REQUIRES = updategraph
+$(DOCKER_DHCP_RELAY)_SERVICE_REQUIRES = config-setup
 $(DOCKER_DHCP_RELAY)_SERVICE_AFTER = swss syncd teamd
 $(DOCKER_DHCP_RELAY)_SERVICE_BEFORE = ntp-config
 $(DOCKER_DHCP_RELAY)_SERVICE_DEPENDENT_OF = swss
diff --git a/rules/docker-dhcp-server.mk b/rules/docker-dhcp-server.mk
index bfcf88327..94ec1bf0a 100644
--- a/rules/docker-dhcp-server.mk
+++ b/rules/docker-dhcp-server.mk
@@ -38,7 +38,7 @@ $(DOCKER_DHCP_SERVER)_CONTAINER_NAME = dhcp_server
 $(DOCKER_DHCP_SERVER)_VERSION = 1.0.0
 $(DOCKER_DHCP_SERVER)_PACKAGE_NAME = dhcp-server
 
-$(DOCKER_MACSEC)_SERVICE_REQUIRES = updategraph
+$(DOCKER_MACSEC)_SERVICE_REQUIRES = config-setup
 $(DOCKER_MACSEC)_SERVICE_AFTER = swss syncd
 
 $(DOCKER_DHCP_SERVER)_CONTAINER_PRIVILEGED = false
diff --git a/rules/docker-eventd.mk b/rules/docker-eventd.mk
index ef926a064..49ac4f468 100644
--- a/rules/docker-eventd.mk
+++ b/rules/docker-eventd.mk
@@ -21,9 +21,6 @@ $(DOCKER_EVENTD)_INSTALL_DEBS = $(PYTHON3_SWSSCOMMON)
 $(DOCKER_EVENTD)_VERSION = 1.0.0
 $(DOCKER_EVENTD)_PACKAGE_NAME = eventd
 
-$(DOCKER_DHCP)_SERVICE_REQUIRES = updategraph
-$(DOCKER_DHCP)_SERVICE_AFTER = database
-
 SONIC_DOCKER_IMAGES += $(DOCKER_EVENTD)
 ifeq ($(INCLUDE_SYSTEM_EVENTD), y)
 SONIC_INSTALL_DOCKER_IMAGES += $(DOCKER_EVENTD)
diff --git a/rules/docker-macsec.mk b/rules/docker-macsec.mk
index c36518aaf..df52eccdf 100644
--- a/rules/docker-macsec.mk
+++ b/rules/docker-macsec.mk
@@ -44,7 +44,7 @@ $(DOCKER_MACSEC)_CONTAINER_VOLUMES += /etc/sonic:/etc/sonic:ro
 $(DOCKER_MACSEC)_CONTAINER_VOLUMES += /etc/timezone:/etc/timezone:ro
 $(DOCKER_MACSEC)_CONTAINER_VOLUMES += /host/warmboot:/var/warmboot
 
-$(DOCKER_MACSEC)_SERVICE_REQUIRES = updategraph
+$(DOCKER_MACSEC)_SERVICE_REQUIRES = config-setup
 $(DOCKER_MACSEC)_SERVICE_AFTER = swss syncd
 
 $(DOCKER_MACSEC)_CLI_CONFIG_PLUGIN = /cli/config/plugins/macsec.py
diff --git a/slave.mk b/slave.mk
index 32e88c2b6..73088e945 100644
--- a/slave.mk
+++ b/slave.mk
@@ -397,7 +397,6 @@ $(info "SECURE_UPGRADE_SIGNING_CERT" : "$(SECURE_UPGRADE_SIGNING_CERT)")
 $(info "SECURE_UPGRADE_PROD_SIGNING_TOOL": "$(SECURE_UPGRADE_PROD_SIGNING_TOOL)")
 $(info "SECURE_UPGRADE_PROD_TOOL_ARGS"   : "$(SECURE_UPGRADE_PROD_TOOL_ARGS)")
 $(info "ONIE_IMAGE_PART_SIZE"            : "$(ONIE_IMAGE_PART_SIZE)")
-$(info "ENABLE_DHCP_GRAPH_SERVICE"       : "$(ENABLE_DHCP_GRAPH_SERVICE)")
 $(info "SHUTDOWN_BGP_ON_START"           : "$(SHUTDOWN_BGP_ON_START)")
 $(info "ENABLE_PFCWD_ON_START"           : "$(ENABLE_PFCWD_ON_START)")
 $(info "SONIC_BUFFER_MODEL"              : "$(SONIC_BUFFER_MODEL)")
@@ -1412,7 +1411,6 @@ $(addprefix $(TARGET_PATH)/, $(SONIC_INSTALLERS)) : $(TARGET_PATH)/% : \
 	export sonicadmin_user="$(USERNAME)"
 	export sonic_asic_platform="$(patsubst %-$(CONFIGURED_ARCH),%,$(CONFIGURED_PLATFORM))"
 	export enable_organization_extensions="$(ENABLE_ORGANIZATION_EXTENSIONS)"
-	export enable_dhcp_graph_service="$(ENABLE_DHCP_GRAPH_SERVICE)"
 	export enable_ztp="$(ENABLE_ZTP)"
 	export include_teamd="$(INCLUDE_TEAMD)"
 	export include_router_advertiser="$(INCLUDE_ROUTER_ADVERTISER)"

From a53cbdc782d5bf7ecf388222157d56c880bf8798 Mon Sep 17 00:00:00 2001
From: Zain Budhwani <99770260+zbud-msft@users.noreply.github.com>
Date: Thu, 14 Mar 2024 19:00:11 -0700
Subject: [PATCH 0331/1115] [eventd] Add incremental polling when waiting for
 capture service to start (#18138)

### Why I did it

Addresses https://github.com/sonic-net/sonic-buildimage/issues/17350

### How I did it

Instead of a 1 second delay, we poll to check that the thread is available and after each poll increment the delay. There were situations where if there was less memory available, fixed polling would not be effective for starting zmq capture service. Add an incremental delay such that eventd can wait longer to start up capture service if system is too busy or overloaded, but still keep a max duration/retry limit so that we do not wait forever.

#### How to verify it
UT
---
 src/sonic-eventd/src/eventd.cpp | 42 ++++++++++++++++++++-------------
 src/sonic-eventd/src/eventd.h   |  2 ++
 2 files changed, 28 insertions(+), 16 deletions(-)

diff --git a/src/sonic-eventd/src/eventd.cpp b/src/sonic-eventd/src/eventd.cpp
index 36c162453..eb692d5b3 100644
--- a/src/sonic-eventd/src/eventd.cpp
+++ b/src/sonic-eventd/src/eventd.cpp
@@ -1,4 +1,5 @@
 #include <thread>
+#include <memory>
 #include "eventd.h"
 #include "dbconnector.h"
 #include "zmq.h"
@@ -539,6 +540,7 @@ int
 capture_service::set_control(capture_control_t ctrl, event_serialized_lst_t *lst)
 {
     int ret = -1;
+    int duration = CAPTURE_SERVICE_POLLING_DURATION;
 
     /* Can go in single step only. */
     RET_ON_ERR((ctrl - m_ctrl) == 1, "m_ctrl(%d)+1 < ctrl(%d)", m_ctrl, ctrl);
@@ -547,8 +549,9 @@ capture_service::set_control(capture_control_t ctrl, event_serialized_lst_t *lst
         case INIT_CAPTURE:
             m_thr = thread(&capture_service::do_capture, this);
             for(int i=0; !m_cap_run && (i < CAPTURE_SERVICE_POLLING_RETRIES); ++i) {
-                /* Wait max a second for thread to init */
-                this_thread::sleep_for(chrono::milliseconds(CAPTURE_SERVICE_POLLING_DURATION));
+                /* Poll to see if thread has been init, if so exit early. Add delay on every attempt */
+                this_thread::sleep_for(chrono::milliseconds(duration));
+                duration = min(duration + CAPTURE_SERVICE_POLLING_INCREMENT, CAPTURE_SERVICE_POLLING_MAX_DURATION);
             }
             RET_ON_ERR(m_cap_run, "Failed to init capture");
             m_ctrl = ctrl;
@@ -646,7 +649,8 @@ run_eventd_service()
     event_service service;
     stats_collector stats_instance;
     eventd_proxy *proxy = NULL;
-    capture_service *capture = NULL;
+    unique_ptr<capture_service> capture;
+    bool skip_caching = false;
 
     event_serialized_lst_t capture_fifo_events;
     last_events_t capture_last_events;
@@ -676,9 +680,14 @@ run_eventd_service()
      * events until telemetry starts.
      * Telemetry will send a stop & collect cache upon startup
      */
-    capture = new capture_service(zctx, cache_max, &stats_instance);
-    RET_ON_ERR(capture->set_control(INIT_CAPTURE) == 0, "Failed to init capture");
-    RET_ON_ERR(capture->set_control(START_CAPTURE) == 0, "Failed to start capture");
+    capture = make_unique<capture_service>(zctx, cache_max, &stats_instance);
+    if (capture->set_control(INIT_CAPTURE) != 0) {
+        SWSS_LOG_WARN("Failed to initialize capture service, so we skip caching");
+        skip_caching = true;
+        capture.reset(); // Capture service will not be available
+    } else {
+        RET_ON_ERR(capture->set_control(START_CAPTURE) == 0, "Failed to start capture");
+    }
 
     this_thread::sleep_for(chrono::milliseconds(200));
     RET_ON_ERR(stats_instance.is_running(), "Failed to start stats instance");
@@ -694,12 +703,12 @@ run_eventd_service()
             case EVENT_CACHE_INIT:
                 /* connect only*/
                 if (capture != NULL) {
-                    delete capture;
+                    capture.reset();
                 }
                 event_serialized_lst_t().swap(capture_fifo_events);
                 last_events_t().swap(capture_last_events);
 
-                capture = new capture_service(zctx, cache_max, &stats_instance);
+                capture = make_unique<capture_service>(zctx, cache_max, &stats_instance);
                 if (capture != NULL) {
                     resp = capture->set_control(INIT_CAPTURE);
                 }
@@ -708,7 +717,7 @@ run_eventd_service()
 
             case EVENT_CACHE_START:
                 if (capture == NULL) {
-                    SWSS_LOG_ERROR("Cache is not initialized to start");
+                    SWSS_LOG_WARN("Cache is not initialized to start");
                     resp = -1;
                     break;
                 }
@@ -721,7 +730,7 @@ run_eventd_service()
 
             case EVENT_CACHE_STOP:
                 if (capture == NULL) {
-                    SWSS_LOG_ERROR("Cache is not initialized to stop");
+                    SWSS_LOG_WARN("Cache is not initialized to stop");
                     resp = -1;
                     break;
                 }
@@ -731,8 +740,7 @@ run_eventd_service()
                     resp = capture->read_cache(capture_fifo_events, capture_last_events,
                             overflow);
                 }
-                delete capture;
-                capture = NULL;
+                capture.reset();
 
                 /* Unpause heartbeat upon stop caching */
                 stats_instance.heartbeat_ctrl();
@@ -740,6 +748,11 @@ run_eventd_service()
 
 
             case EVENT_CACHE_READ:
+                if (skip_caching) {
+                    SWSS_LOG_WARN("Capture service is unavailable, skipping cache read");
+                    resp = -1;
+                    break;
+                }
                 if (capture != NULL) {
                     SWSS_LOG_ERROR("Cache is not stopped yet.");
                     resp = -1;
@@ -802,13 +815,10 @@ run_eventd_service()
     if (proxy != NULL) {
         delete proxy;
     }
-    if (capture != NULL) {
-        delete capture;
-    }
     if (zctx != NULL) {
         zmq_ctx_term(zctx);
     }
-    SWSS_LOG_ERROR("Eventd service exiting\n");
+    SWSS_LOG_INFO("Eventd service exiting\n");
 }
 
 void set_unit_testing(bool b)
diff --git a/src/sonic-eventd/src/eventd.h b/src/sonic-eventd/src/eventd.h
index a7a87f943..960dfb8b8 100644
--- a/src/sonic-eventd/src/eventd.h
+++ b/src/sonic-eventd/src/eventd.h
@@ -22,6 +22,8 @@ typedef enum {
 #define EVENTS_STATS_FIELD_NAME "value"
 #define STATS_HEARTBEAT_MIN 300
 #define CAPTURE_SERVICE_POLLING_DURATION 10
+#define CAPTURE_SERVICE_POLLING_INCREMENT 10
+#define CAPTURE_SERVICE_POLLING_MAX_DURATION 100
 #define CAPTURE_SERVICE_POLLING_RETRIES 100
 
 /*

From a33330941c26a98927c57ed93beeddbe98281fd3 Mon Sep 17 00:00:00 2001
From: Stephen Sun <5379172+stephenxs@users.noreply.github.com>
Date: Fri, 15 Mar 2024 10:02:21 +0800
Subject: [PATCH 0332/1115] Support dot in the additional information of the
 PFC watchdog event in the yang model (#18235)

### Why I did it

Support dot (`.`) in the `additional_info` field in the PFC watchdog event in the yang model.

The `additional_info` field was introduced to represent diagnosis information when a PFC storm is detected, which can include fragments.

Signed-off-by: Stephen Sun <stephens@nvidia.com>

### How I did it

#### How to verify it

Unit test.
---
 .../yang_model_tests/tests/sonic-events-swss.json    |  3 +++
 .../tests_config/sonic-events-swss.json              | 12 ++++++++++++
 .../yang-models/sonic-events-swss.yang               |  2 +-
 3 files changed, 16 insertions(+), 1 deletion(-)

diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/sonic-events-swss.json b/src/sonic-yang-models/tests/yang_model_tests/tests/sonic-events-swss.json
index 6592fd101..56a05d173 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests/sonic-events-swss.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests/sonic-events-swss.json
@@ -40,6 +40,9 @@
 	"SONIC_EVENTS_SWSS_PFC_STORM_VALID_WITH_ADDITIONAL_INFO": {
 		"desc": "VALID IF_STATE EVENT."
 	},
+	"SONIC_EVENTS_SWSS_PFC_STORM_VALID_WITH_ADDITIONAL_INFO_FRAGMENT": {
+		"desc": "VALID IF_STATE EVENT."
+	},
 	"SONIC_EVENTS_SWSS_PFC_STORM_WITH_INVALID_ADDITIONAL_INFO_1": {
 	    "desc": "PFC_STORM_EVENT_INCORRECT_ADDITIONAL_INFO failure.",
             "eStrKey": "Pattern"
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/sonic-events-swss.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/sonic-events-swss.json
index e56acc0a4..919468dcb 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/sonic-events-swss.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/sonic-events-swss.json
@@ -113,6 +113,18 @@
             }
         }
     },
+    "SONIC_EVENTS_SWSS_PFC_STORM_VALID_WITH_ADDITIONAL_INFO_FRAGMENT": {
+        "sonic-events-swss:sonic-events-swss": {
+            "sonic-events-swss:pfc-storm": {
+                "ifname": "Ethernet0",
+                "queue_index": 0,
+                "queue_id": 0,
+                "port_id": 0,
+                "additional_info": "info1:1.2|info2:3.25",
+                "timestamp": "1985-04-12T23:20:50.52Z"
+            }
+        }
+    },
     "SONIC_EVENTS_SWSS_PFC_STORM_WITH_INVALID_ADDITIONAL_INFO_1": {
         "sonic-events-swss:sonic-events-swss": {
             "sonic-events-swss:pfc-storm": {
diff --git a/src/sonic-yang-models/yang-models/sonic-events-swss.yang b/src/sonic-yang-models/yang-models/sonic-events-swss.yang
index 93c617776..4092fe42d 100644
--- a/src/sonic-yang-models/yang-models/sonic-events-swss.yang
+++ b/src/sonic-yang-models/yang-models/sonic-events-swss.yang
@@ -80,7 +80,7 @@ module sonic-events-swss {
 
             leaf additional_info {
                 type string {
-                    pattern '[-a-zA-Z0-9_]+:[-a-zA-Z0-9_]+(\|{1}[-a-zA-Z0-9_]+:[-a-zA-Z0-9_]+)*';
+                    pattern '[-a-zA-Z0-9_]+:[-a-zA-Z0-9_.]+(\|{1}[-a-zA-Z0-9_]+:[-a-zA-Z0-9_.]+)*';
                 }
                 description "Additional information to investigate PFC storm";
             }

From a0ba655b34095969ed2bead2bc2598eb3395d630 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Fri, 15 Mar 2024 19:01:16 +0800
Subject: [PATCH 0333/1115] [submodule] Update submodule linkmgrd to the latest
 HEAD automatically (#18372)

#### Why I did it
src/linkmgrd
```
* dd61844 - (HEAD -> master, origin/master, origin/HEAD) [active-standby] reset mux probing backoff factor in link flaps (#245) (5 hours ago) [Jing Zhang]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/linkmgrd | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/linkmgrd b/src/linkmgrd
index 74c33eacf..dd618447e 160000
--- a/src/linkmgrd
+++ b/src/linkmgrd
@@ -1 +1 @@
-Subproject commit 74c33eacf4325b6e0f3e3b11fc6c50b4222921a1
+Subproject commit dd618447e2cc1838431d94f1f8bffa807ef65d89

From 2622aa112a18b8f65ba275cbc1ccf935354e787e Mon Sep 17 00:00:00 2001
From: Jing Zhang <zhangjing@microsoft.com>
Date: Fri, 15 Mar 2024 08:35:31 -0700
Subject: [PATCH 0334/1115] bookworm (#18310)

---
 dockers/docker-mux/Dockerfile.j2 |  2 +-
 rules/docker-mux.mk              | 10 +++++-----
 2 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/dockers/docker-mux/Dockerfile.j2 b/dockers/docker-mux/Dockerfile.j2
index 5908c432e..8bb6ca909 100755
--- a/dockers/docker-mux/Dockerfile.j2
+++ b/dockers/docker-mux/Dockerfile.j2
@@ -1,5 +1,5 @@
 {% from "dockers/dockerfile-macros.j2" import install_debian_packages, install_python_wheels, copy_files %}
-FROM docker-config-engine-bullseye-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}}
+FROM docker-config-engine-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}}
 
 ARG docker_container_name
 
diff --git a/rules/docker-mux.mk b/rules/docker-mux.mk
index fae8d2178..a0b173233 100644
--- a/rules/docker-mux.mk
+++ b/rules/docker-mux.mk
@@ -7,12 +7,12 @@ DOCKER_MUX_DBG = $(DOCKER_MUX_STEM)-$(DBG_IMAGE_MARK).gz
 $(DOCKER_MUX)_PATH = $(DOCKERS_PATH)/$(DOCKER_MUX_STEM)
 
 $(DOCKER_MUX)_DEPENDS = $(SONIC_LINKMGRD) $(LIBSWSSCOMMON)
-$(DOCKER_MUX)_DBG_DEPENDS = $($(DOCKER_CONFIG_ENGINE_BULLSEYE)_DBG_DEPENDS)
+$(DOCKER_MUX)_DBG_DEPENDS = $($(DOCKER_CONFIG_ENGINE_BOOKWORM)_DBG_DEPENDS)
 $(DOCKER_MUX)_DBG_DEPENDS += $(SONIC_LINKMGRD_DBG) $(LIBSWSSCOMMON_DBG)
 
-$(DOCKER_MUX)_DBG_IMAGE_PACKAGES = $($(DOCKER_CONFIG_ENGINE_BULLSEYE)_DBG_IMAGE_PACKAGES)
+$(DOCKER_MUX)_DBG_IMAGE_PACKAGES = $($(DOCKER_CONFIG_ENGINE_BOOKWORM)_DBG_IMAGE_PACKAGES)
 
-$(DOCKER_MUX)_LOAD_DOCKERS = $(DOCKER_CONFIG_ENGINE_BULLSEYE)
+$(DOCKER_MUX)_LOAD_DOCKERS = $(DOCKER_CONFIG_ENGINE_BOOKWORM)
 
 $(DOCKER_MUX)_VERSION = 1.0.0
 $(DOCKER_MUX)_PACKAGE_NAME = mux
@@ -29,8 +29,8 @@ SONIC_DOCKER_DBG_IMAGES += $(DOCKER_MUX_DBG)
 SONIC_INSTALL_DOCKER_DBG_IMAGES += $(DOCKER_MUX_DBG)
 endif
 
-SONIC_BULLSEYE_DOCKERS += $(DOCKER_MUX)
-SONIC_BULLSEYE_DBG_DOCKERS += $(DOCKER_MUX_DBG)
+SONIC_BOOKWORM_DOCKERS += $(DOCKER_MUX)
+SONIC_BOOKWORM_DBG_DOCKERS += $(DOCKER_MUX_DBG)
 
 $(DOCKER_MUX)_CONTAINER_NAME = mux
 $(DOCKER_MUX)_RUN_OPT += -t

From 9fdbdeee85df957d4544ae5175f0ca3091e5dda8 Mon Sep 17 00:00:00 2001
From: snider-nokia <76123698+snider-nokia@users.noreply.github.com>
Date: Fri, 15 Mar 2024 15:18:45 -0400
Subject: [PATCH 0335/1115] [Nokia][sonic-platform] Update Nokia sonic-platform
 submodule - ungraceful reboot hooks to induce NIF port shutdown (#18014)

These changes provide for the automatic shutdown of NIF ports on LC when an ungraceful reboot scenario occurs. Reboot and panic notifier hooks are now registered so that callback occurs from the kernel and NIF ports are subsequently shut down.

Why I did it
To facilitate the timely movement of traffic away from a crashed LC when its peers recognize that the associated links have gone down.

How I did it
Linux kernel reboot and panic notifier hooks are used to register a callback routine that, when invoked, stuffs all present transceiver modules into reset.

How to verify it
Cause an ungraceful reboot (whether via /usr/sbin/reboot or by causing a kernel panic) and verify that all LC native NIF links are brought down at reboot/panic time (on the way down). It may be necessary to monitor the LC link peer(s) in order to verify in real-time.
---
 platform/broadcom/sonic-platform-modules-nokia | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/platform/broadcom/sonic-platform-modules-nokia b/platform/broadcom/sonic-platform-modules-nokia
index e82caa40d..1ef68bdba 160000
--- a/platform/broadcom/sonic-platform-modules-nokia
+++ b/platform/broadcom/sonic-platform-modules-nokia
@@ -1 +1 @@
-Subproject commit e82caa40d4eec59e574bd4acffb0e92fd7187da4
+Subproject commit 1ef68bdba5dfcb1b7946c952ee233f0ee5b7738a

From ec57a44b47f373c072419f5f6d57ffca1ae8da3b Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Mon, 18 Mar 2024 15:18:20 +0800
Subject: [PATCH 0336/1115] [submodule] Update submodule sonic-gnmi to the
 latest HEAD automatically (#18076)

#### Why I did it
src/sonic-gnmi
```
* d56712a - (HEAD -> master, origin/master, origin/HEAD) Update GNMI path schema (#197) (4 days ago) [ganglv]
* 758ec18 - Call flag.Parse() to parse global flags like -logtostderr (#198) (5 days ago) [Zain Budhwani]
* 736e3b4 - Add signal handler to stop gnmi server for when sigterm or sigquit is called (#189) (3 weeks ago) [Zain Budhwani]
* 5b59c57 - Fix sonic string in osversion/build (#190) (4 weeks ago) [Zain Budhwani]
* d8d15c7 - Enable unit tests and code coverage for telemetry.go (#186) (5 weeks ago) [Zain Budhwani]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-gnmi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-gnmi b/src/sonic-gnmi
index 2c862b82e..d56712a08 160000
--- a/src/sonic-gnmi
+++ b/src/sonic-gnmi
@@ -1 +1 @@
-Subproject commit 2c862b82eff557cbc19cfeb5724542487c89e0b3
+Subproject commit d56712a085a258a214917fac00db8d9383e9fb96

From 5f2a2b905149222ab221f01220df5b46bf27d269 Mon Sep 17 00:00:00 2001
From: Oleksandr Ivantsiv <oivantsiv@nvidia.com>
Date: Mon, 18 Mar 2024 09:52:25 -0700
Subject: [PATCH 0337/1115] [YANG] Add an infrastructure to write pytest tests
 for the YANG model. (#17767)

### Why I did it
The existing test cases and test data for YANG model tests are defined in JSON files. The tests are limited and require a huge amount of copy-paste to provide good coverage.
For the features that have a lot of similar attributes that need to be covered with the tests, the JSON files can be quite big and hard to maintain (for example CRM).
The debuggability of the JSON tests is almost zero. Which makes implementation of the new test cases much harder than it should be.  When the single test case fails it generates thousands of lines of output that make it hard to understand the issue. It is hard to find what failed, and what is the error message. It is impossible to re-run single test cases. Etc.

The Pytest provides an alternative way to implement the tests.
Both JSON tests and Pytests can co-exist. But it is suggested to use Pytest for the new tests.
The tests written in Pytest are compact, readable, and human-friendly.
They give more flexibility in the testing of corner cases allow to leverage Python and Pytest capabilities to generate configuration and data for better coverage.

### How I did it
Add an infrastructure that allows to write model tests in Python.
Conver CRM, DASH CRM, and SmartSwitch tests to Pytest.

#### How to verify it
Build the YANG model package.
---
 .../tests/yang_model_pytests/conftest.py      |   43 +
 .../tests/yang_model_pytests/test_crm.py      |  101 ++
 .../tests/yang_model_pytests/test_dash_crm.py |  104 ++
 .../yang_model_pytests/test_smart_switch.py   |  110 ++
 .../tests/yang_model_tests/tests/crm.json     |  157 --
 .../yang_model_tests/tests/crm_dash.json      |  287 ----
 .../yang_model_tests/tests/smart-switch.json  |    9 -
 .../yang_model_tests/tests_config/crm.json    |  442 ------
 .../tests_config/crm_dash.json                | 1352 -----------------
 .../tests_config/smart-switch.json            |   40 -
 10 files changed, 358 insertions(+), 2287 deletions(-)
 create mode 100644 src/sonic-yang-models/tests/yang_model_pytests/conftest.py
 create mode 100644 src/sonic-yang-models/tests/yang_model_pytests/test_crm.py
 create mode 100644 src/sonic-yang-models/tests/yang_model_pytests/test_dash_crm.py
 create mode 100644 src/sonic-yang-models/tests/yang_model_pytests/test_smart_switch.py
 delete mode 100644 src/sonic-yang-models/tests/yang_model_tests/tests/crm.json
 delete mode 100644 src/sonic-yang-models/tests/yang_model_tests/tests/crm_dash.json
 delete mode 100644 src/sonic-yang-models/tests/yang_model_tests/tests/smart-switch.json
 delete mode 100644 src/sonic-yang-models/tests/yang_model_tests/tests_config/crm.json
 delete mode 100644 src/sonic-yang-models/tests/yang_model_tests/tests_config/crm_dash.json
 delete mode 100644 src/sonic-yang-models/tests/yang_model_tests/tests_config/smart-switch.json

diff --git a/src/sonic-yang-models/tests/yang_model_pytests/conftest.py b/src/sonic-yang-models/tests/yang_model_pytests/conftest.py
new file mode 100644
index 000000000..59d55ebfb
--- /dev/null
+++ b/src/sonic-yang-models/tests/yang_model_pytests/conftest.py
@@ -0,0 +1,43 @@
+import os
+import pytest
+import yang as ly
+from json import dumps
+from glob import glob
+
+
+class YangModel:
+
+    def __init__(self) -> None:
+        cur_dir = os.path.dirname(os.path.abspath(__file__))
+        project_root = os.path.abspath(os.path.join(cur_dir, '..', '..'))
+        self.model_dir = os.path.join(project_root, 'yang-models')
+
+        self._load_model()
+
+    def _load_model(self) -> None:
+        self.ctx = ly.Context(self.model_dir)
+        yang_files = glob(self.model_dir +"/*.yang")
+
+        for file in yang_files:
+            m = self.ctx.parse_module_path(file, ly.LYS_IN_YANG)
+            if not m:
+                raise RuntimeError("Failed to parse '{file}' model")
+
+    def _load_data(self, data) -> None:
+        self.ctx.parse_data_mem(dumps(data), ly.LYD_JSON,
+                                ly.LYD_OPT_CONFIG | ly.LYD_OPT_STRICT)
+
+    def load_data(self, data, expected_error=None) -> None:
+        if expected_error:
+            with pytest.raises(RuntimeError) as exc_info:
+                self._load_data(data)
+
+            assert expected_error in str(exc_info)
+        else:
+            self._load_data(data)
+
+
+@pytest.fixture
+def yang_model():
+    yang_model = YangModel()
+    return yang_model
diff --git a/src/sonic-yang-models/tests/yang_model_pytests/test_crm.py b/src/sonic-yang-models/tests/yang_model_pytests/test_crm.py
new file mode 100644
index 000000000..ada390c61
--- /dev/null
+++ b/src/sonic-yang-models/tests/yang_model_pytests/test_crm.py
@@ -0,0 +1,101 @@
+import pytest
+
+
+thresholds = [
+    'free', 'FREE',
+    'used', 'USED',
+    'percentage', 'PERCENTAGE'
+]
+
+
+@pytest.fixture(params=thresholds)
+def threshold(request):
+    return request.param
+
+
+resources = [
+    'acl_counter',
+    'acl_group',
+    'acl_entry',
+    'acl_table',
+    'fdb_entry',
+    'ipv4_neighbor',
+    'ipv4_nexthop',
+    'ipv4_route',
+    'ipv6_neighbor',
+    'ipv6_nexthop',
+    'ipv6_route',
+    'nexthop_group',
+    'nexthop_group_member',
+    'dnat_entry',
+    'snat_entry',
+    'ipmc_entry',
+    'mpls_inseg',
+    'mpls_nexthop',
+    'srv6_my_sid_entry',
+    'srv6_nexthop'
+]
+
+
+@pytest.fixture(params=resources)
+def resource(request):
+    return request.param
+
+
+class TestCrm:
+
+    def test_crm_valid_data(self, yang_model, resource, threshold):
+        data = {
+            "sonic-crm:sonic-crm": {
+                "sonic-crm:CRM": {
+                    "Config": {
+                        f"{resource}_high_threshold": 95,
+                        f"{resource}_low_threshold": 70,
+                        f"{resource}_threshold_type": threshold
+                    }
+                }
+            }
+        }
+
+        yang_model.load_data(data)
+
+    @pytest.mark.parametrize(
+        "high, low, error_message", [
+            (-1, 70, 'Invalid value "-1"'),
+            (100, -70, 'Invalid value "-70"'),
+            (10, 70, 'high_threshold should be more than low_threshold')]
+        )
+    def test_crm_thresholds(self, yang_model, resource, threshold, high, low, error_message):
+        data = {
+            "sonic-crm:sonic-crm": {
+                "sonic-crm:CRM": {
+                    "Config": {
+                        f"{resource}_high_threshold": high,
+                        f"{resource}_low_threshold": low,
+                        f"{resource}_threshold_type": threshold
+                    }
+                }
+            }
+        }
+
+        yang_model.load_data(data, error_message)
+
+    @pytest.mark.parametrize(
+        "high, low, th_type, error_message", [
+            (100, 70, 'wrong', 'Value "wrong" does not satisfy the constraint'),
+            (110, 20, 'percentage', 'Must condition')]
+        )
+    def test_crm_threshold_type(self, yang_model, resource, high, low, th_type, error_message):
+        data = {
+            "sonic-crm:sonic-crm": {
+                "sonic-crm:CRM": {
+                    "Config": {
+                        f"{resource}_high_threshold": high,
+                        f"{resource}_low_threshold": low,
+                        f"{resource}_threshold_type": th_type
+                    }
+                }
+            }
+        }
+
+        yang_model.load_data(data, error_message)
diff --git a/src/sonic-yang-models/tests/yang_model_pytests/test_dash_crm.py b/src/sonic-yang-models/tests/yang_model_pytests/test_dash_crm.py
new file mode 100644
index 000000000..ead37b98f
--- /dev/null
+++ b/src/sonic-yang-models/tests/yang_model_pytests/test_dash_crm.py
@@ -0,0 +1,104 @@
+import pytest
+from copy import deepcopy
+
+
+@pytest.fixture(scope='function')
+def data(request):
+    base_data = {
+        "sonic-device_metadata:sonic-device_metadata": {
+            "sonic-device_metadata:DEVICE_METADATA": {
+                "localhost": {
+                    "switch_type": "dpu"
+                }
+            }
+        }
+    }
+
+    return base_data
+
+
+dash_thresholds = [
+    'free', 'FREE',
+    'used', 'USED',
+    'percentage', 'PERCENTAGE'
+]
+
+
+@pytest.fixture(params=dash_thresholds)
+def threshold(request):
+    return request.param
+
+
+dash_resources = [
+    'vnet',
+    'eni',
+    'eni_ether_address_map',
+    'ipv4_inbound_routing',
+    'ipv6_inbound_routing',
+    'ipv4_outbound_routing',
+    'ipv6_outbound_routing',
+    'ipv4_pa_validation',
+    'ipv6_pa_validation',
+    'ipv4_outbound_ca_to_pa',
+    'ipv6_outbound_ca_to_pa',
+    'ipv4_acl_group',
+    'ipv6_acl_group'
+]
+
+
+@pytest.fixture(params=dash_resources)
+def resource(request):
+    return request.param
+
+
+class TestDashCrm:
+
+    def test_dash_crm_valid_data(self, yang_model, data, resource, threshold):
+        data["sonic-crm:sonic-crm"] = {
+            "sonic-crm:CRM": {
+                "Config": {
+                    f"dash_{resource}_high_threshold": 95,
+                    f"dash_{resource}_low_threshold": 70,
+                    f"dash_{resource}_threshold_type": threshold
+                }
+            }
+        }
+
+        yang_model.load_data(data)
+
+    @pytest.mark.parametrize(
+        "high, low, error_message", [
+            (-1, 70, 'Invalid value "-1"'),
+            (100, -70, 'Invalid value "-70"'),
+            (10, 70, 'high_threshold should be more than low_threshold')]
+        )
+    def test_dash_crm_thresholds(self, yang_model, data, resource, threshold, high, low, error_message):
+        data["sonic-crm:sonic-crm"] = {
+            "sonic-crm:CRM": {
+                "Config": {
+                    f"dash_{resource}_high_threshold": high,
+                    f"dash_{resource}_low_threshold": low,
+                    f"dash_{resource}_threshold_type": threshold
+                }
+            }
+        }
+
+        yang_model.load_data(data, error_message)
+
+    @pytest.mark.parametrize(
+        "high, low, th_type, error_message", [
+            (100, 70, 'wrong', 'Value "wrong" does not satisfy the constraint'),
+            (110, 20, 'percentage', 'Must condition')]
+        )
+    def test_dash_crm_threshold_type(self, yang_model, data, resource, high, low, th_type, error_message):
+        data["sonic-crm:sonic-crm"] = {
+            "sonic-crm:CRM": {
+                "Config": {
+                    f"dash_{resource}_high_threshold": high,
+                    f"dash_{resource}_low_threshold": low,
+                    f"dash_{resource}_threshold_type": th_type
+                }
+            }
+        }
+
+        yang_model.load_data(data, error_message)
diff --git a/src/sonic-yang-models/tests/yang_model_pytests/test_smart_switch.py b/src/sonic-yang-models/tests/yang_model_pytests/test_smart_switch.py
new file mode 100644
index 000000000..ccd0f312e
--- /dev/null
+++ b/src/sonic-yang-models/tests/yang_model_pytests/test_smart_switch.py
@@ -0,0 +1,110 @@
+import pytest
+
+
+class TestSmartSwitch:
+
+    def test_valid_data(self, yang_model):
+        data = {
+            "sonic-smart-switch:sonic-smart-switch": {
+                "sonic-smart-switch:MID_PLANE_BRIDGE": {
+                    "GLOBAL": {
+                        "bridge": "bridge_midplane",
+                        "ip_prefix": "169.254.200.254/24"
+                    }
+                },
+                "sonic-smart-switch:DPUS": {
+                    "DPUS_LIST": [
+                        {
+                            "dpu_name": "dpu0",
+                            "midplane_interface": "dpu0"
+                        },
+                        {
+                            "dpu_name": "dpu1",
+                            "midplane_interface": "dpu1"
+                        }
+                    ]
+                }
+            }
+        }
+
+        yang_model.load_data(data)
+
+    @pytest.mark.parametrize(
+        "bridge_name, error_message", [
+            ("bridge_midplane", None),
+            ("wrong_name", 'Value "wrong_name" does not satisfy the constraint "bridge_midplane"')]
+        )
+    def test_bridge_name(self, yang_model, bridge_name, error_message):
+        data = {
+            "sonic-smart-switch:sonic-smart-switch": {
+                "sonic-smart-switch:MID_PLANE_BRIDGE": {
+                    "GLOBAL": {
+                        "bridge": bridge_name,
+                        "ip_prefix": "169.254.200.254/24"
+                    }
+                }
+            }
+        }
+
+        yang_model.load_data(data, error_message)
+
+    @pytest.mark.parametrize(
+        "ip_prefix, error_message", [
+            ("169.254.200.254/24", None),
+            ("169.254.xyz.254/24", 'Value "169.254.xyz.254/24" does not satisfy the constraint')]
+        )
+    def test_bridge_ip_prefix(self, yang_model, ip_prefix, error_message):
+        data = {
+            "sonic-smart-switch:sonic-smart-switch": {
+                "sonic-smart-switch:MID_PLANE_BRIDGE": {
+                    "GLOBAL": {
+                        "bridge": "bridge_midplane",
+                        "ip_prefix": ip_prefix
+                    }
+                }
+            }
+        }
+
+        yang_model.load_data(data, error_message)
+
+    @pytest.mark.parametrize(
+        "dpu_name, error_message", [
+            ("dpu0", None),
+            ("xyz", 'Value "xyz" does not satisfy the constraint "dpu[0-9]+')]
+        )
+    def test_dpu_name(self, yang_model, dpu_name, error_message):
+        data = {
+            "sonic-smart-switch:sonic-smart-switch": {
+                "sonic-smart-switch:DPUS": {
+                    "DPUS_LIST": [
+                        {
+                            "dpu_name": dpu_name,
+                            "midplane_interface": "dpu0"
+                        }
+                    ]
+                }
+            }
+        }
+
+        yang_model.load_data(data, error_message)
+
+    @pytest.mark.parametrize(
+        "midplane_interface, error_message", [
+            ("dpu0", None),
+            ("xyz", 'Value "xyz" does not satisfy the constraint "dpu[0-9]+')]
+        )
+    def test_dpu_midplane_interface(self, yang_model, midplane_interface, error_message):
+        data = {
+            "sonic-smart-switch:sonic-smart-switch": {
+                "sonic-smart-switch:DPUS": {
+                    "DPUS_LIST": [
+                        {
+                            "dpu_name": "dpu0",
+                            "midplane_interface": midplane_interface
+                        }
+                    ]
+                }
+            }
+        }
+
+        yang_model.load_data(data, error_message)
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/crm.json b/src/sonic-yang-models/tests/yang_model_tests/tests/crm.json
deleted file mode 100644
index b79986819..000000000
--- a/src/sonic-yang-models/tests/yang_model_tests/tests/crm.json
+++ /dev/null
@@ -1,157 +0,0 @@
-{
-    "CRM_WITH_CORRECT_FREE_VALUE": {
-	"desc": "CRM_WITH_CORRECT_FREE_VALUE no failure."
-    },
-    "CRM_WITH_CORRECT_USED_VALUE": {
-	"desc": "CRM_WITH_CORRECT_USED_VALUE no failure."
-    },
-    "CRM_WITH_WRONG_THRESHOLD_TYPE": {
-	"desc": "CRM_WITH_WRONG_THRESHOLD_TYPE pattern failure.",
-        "eStrKey": "Pattern",
-	"eStr": ["wrong" ]
-    },
-    "CRM_WITH_WRONG_PERCENTAGE": {
-	"desc": "CRM_WITH_WRONG_PERCENTAGE must condition failure.",
-        "eStrKey": "Must"
-    },
-    "CRM_WITH_HIGH_THRESHOLD_ERR": {
-	"desc": "CRM_WITH_HIGH_THRESHOLD_ERR must condition failure  about high threshold being lower than low threshold.",
-	"eStr": ["high_threshold should be more than low_threshold"]
-    },
-    "CRM_WITH_CORRECT_USED_VALUE": {
-	"desc": "CRM_WITH_CORRECT_USED_VALUE no failure."
-    },
-    "SNAT_WITH_WRONG_PERCENTAGE": {
-	"desc": "SNAT_WITH_WRONG_PERCENTAGE must condition failure.",
-        "eStrKey": "Must"
-    },
-    "SNAT_WITH_HIGH_THRESHOLD_ERR": {
-	"desc": "SNAT_WITH_HIGH_THRESHOLD_ERR must condition failure about high threshold being lower than low threshold.",
-	"eStr": [ "high_threshold should be more than low_threshold" ]
-    },
-    "SNAT_WITH_CORRECT_FREE_VALUE": {
-	"desc": "SNAT_WITH_CORRECT_FREE_VALUE no failure."
-    },
-    "SNAT_WITH_CORRECT_USED_VALUE": {
-	"desc": "SNAT_WITH_CORRECT_USED_VALUE no failure."
-    },
-    "SNAT_WITH_WRONG_THRESHOLD_TYPE": {
-	"desc": "SNAT_WITH_WRONG_THRESHOLD_TYPE pattern failure.",
-        "eStrKey": "Pattern",
-	"eStr": ["wrong" ]
-    },
-    "DNAT_WITH_WRONG_PERCENTAGE": {
-	"desc": "DNAT_WITH_WRONG_PERCENTAGE must condition failure.",
-        "eStrKey": "Must"
-    },
-    "DNAT_WITH_HIGH_THRESHOLD_ERR": {
-	"desc": "DNAT_WITH_HIGH_THRESHOLD_ERR must condition failure about high threshold being lower than low threshold.",
-	"eStr": [ "high_threshold should be more than low_threshold" ]
-    },
-    "DNAT_WITH_CORRECT_FREE_VALUE": {
-	"desc": "DNAT_WITH_CORRECT_FREE_VALUE no failure."
-    },
-    "DNAT_WITH_CORRECT_USED_VALUE": {
-	"desc": "DNAT_WITH_CORRECT_USED_VALUE no failure."
-    },
-    "DNAT_WITH_WRONG_THRESHOLD_TYPE": {
-	"desc": "DNAT_WITH_WRONG_THRESHOLD_TYPE pattern failure.",
-        "eStrKey": "Pattern",
-	"eStr": ["wrong" ]
-    },
-    "IPMC_WITH_WRONG_PERCENTAGE": {
-	"desc": "IPMC_WITH_WRONG_PERCENTAGE must condition failure.",
-        "eStrKey": "Must"
-    },
-    "IPMC_WITH_HIGH_THRESHOLD_ERR": {
-	"desc": "IPMC_WITH_HIGH_THRESHOLD_ERR must condition failure about high threshold being lower than low threshold.",
-	"eStr": [ "high_threshold should be more than low_threshold" ]
-    },
-    "IPMC_WITH_CORRECT_FREE_VALUE": {
-	"desc": "IPMC_WITH_CORRECT_FREE_VALUE no failure."
-    },
-    "IPMC_WITH_CORRECT_USED_VALUE": {
-	"desc": "IPMC_WITH_CORRECT_USED_VALUE no failure."
-    },
-    "IPMC_WITH_WRONG_THRESHOLD_TYPE": {
-	"desc": "IPMC_WITH_WRONG_THRESHOLD_TYPE pattern failure.",
-        "eStrKey": "Pattern",
-	"eStr": ["wrong" ]
-    },
-    "MPLS_INSEG_WITH_WRONG_THRESHOLD_TYPE": {
-	"desc": "MPLS_INSEG_WITH_WRONG_THRESHOLD_TYPE pattern failure.",
-        "eStrKey": "Pattern",
-	"eStr": ["wrong" ]
-    },
-    "MPLS_INSEG_WITH_WRONG_PERCENTAGE": {
-	"desc": "MPLS_INSEG_WITH_WRONG_PERCENTAGE must condition failure.",
-        "eStrKey": "Must"
-    },
-    "MPLS_INSEG_WITH_HIGH_THRESHOLD_ERR": {
-	"desc": "MPLS_INSEG_WITH_HIGH_THRESHOLD_ERR must condition failure  about high threshold being lower than low threshold.",
-	"eStr": ["high_threshold should be more than low_threshold"]
-    },
-    "MPLS_INSEG_WITH_CORRECT_USED_VALUE": {
-	"desc": "MPLS_INSEG_WITH_CORRECT_USED_VALUE no failure."
-    },
-    "MPLS_INSEG_WITH_CORRECT_FREE_VALUE": {
-	"desc": "MPLS_INSEG_WITH_CORRECT_FREE_VALUE no failure."
-    },
-    "MPLS_NH_WITH_WRONG_THRESHOLD_TYPE": {
-	"desc": "MPLS_NH_WITH_WRONG_THRESHOLD_TYPE pattern failure.",
-        "eStrKey": "Pattern",
-	"eStr": ["wrong" ]
-    },
-    "MPLS_NH_WITH_WRONG_PERCENTAGE": {
-	"desc": "MPLS_NH_WITH_WRONG_PERCENTAGE must condition failure.",
-        "eStrKey": "Must"
-    },
-    "MPLS_NH_WITH_HIGH_THRESHOLD_ERR": {
-	"desc": "MPLS_NH_WITH_HIGH_THRESHOLD_ERR must condition failure  about high threshold being lower than low threshold.",
-	"eStr": ["high_threshold should be more than low_threshold"]
-    },
-    "MPLS_NH_WITH_CORRECT_USED_VALUE": {
-	"desc": "MPLS_NH_WITH_CORRECT_USED_VALUE no failure."
-    },
-    "MPLS_NH_WITH_CORRECT_USED_VALUE": {
-	"desc": "MPLS_NH_WITH_CORRECT_USED_VALUE no failure."
-    },
-    "SRV6_MY_SID_ENTRY_WITH_WRONG_THRESHOLD_TYPE": {
-	"desc": "SRV6_MY_SID_ENTRY_WITH_WRONG_THRESHOLD_TYPE pattern failure.",
-        "eStrKey": "Pattern",
-	"eStr": ["wrong" ]
-    },
-    "SRV6_MY_SID_ENTRY_WITH_WRONG_PERCENTAGE": {
-	"desc": "SRV6_MY_SID_ENTRY_WITH_WRONG_PERCENTAGE must condition failure.",
-        "eStrKey": "Must"
-    },
-    "SRV6_MY_SID_ENTRY_WITH_HIGH_THRESHOLD_ERR": {
-	"desc": "SRV6_MY_SID_ENTRY_WITH_HIGH_THRESHOLD_ERR must condition failure  about high threshold being lower than low threshold.",
-	"eStr": ["high_threshold should be more than low_threshold"]
-    },
-    "SRV6_MY_SID_ENTRY_WITH_CORRECT_USED_VALUE": {
-	"desc": "SRV6_MY_SID_ENTRY_WITH_CORRECT_USED_VALUE no failure."
-    },
-    "SRV6_MY_SID_ENTRY_WITH_CORRECT_FREE_VALUE": {
-	"desc": "SRV6_MY_SID_ENTRY_WITH_CORRECT_FREE_VALUE no failure."
-    },
-    "SRV6_NH_WITH_WRONG_THRESHOLD_TYPE": {
-	"desc": "SRV6_NH_WITH_WRONG_THRESHOLD_TYPE pattern failure.",
-        "eStrKey": "Pattern",
-	"eStr": ["wrong" ]
-    },
-    "SRV6_NH_WITH_WRONG_PERCENTAGE": {
-	"desc": "SRV6_NH_WITH_WRONG_PERCENTAGE must condition failure.",
-        "eStrKey": "Must"
-    },
-    "SRV6_NH_WITH_HIGH_THRESHOLD_ERR": {
-	"desc": "SRV6_NH_WITH_HIGH_THRESHOLD_ERR must condition failure  about high threshold being lower than low threshold.",
-	"eStr": ["high_threshold should be more than low_threshold"]
-    },
-    "SRV6_NH_WITH_CORRECT_USED_VALUE": {
-	"desc": "SRV6_NH_WITH_CORRECT_USED_VALUE no failure."
-    },
-    "SRV6_NH_WITH_CORRECT_USED_VALUE": {
-	"desc": "SRV6_NH_WITH_CORRECT_USED_VALUE no failure."
-    }
-}
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/crm_dash.json b/src/sonic-yang-models/tests/yang_model_tests/tests/crm_dash.json
deleted file mode 100644
index 4c1d6818c..000000000
--- a/src/sonic-yang-models/tests/yang_model_tests/tests/crm_dash.json
+++ /dev/null
@@ -1,287 +0,0 @@
-{
-    "CRM_DASH_VNET_WITH_CORRECT_FREE_VALUE": {
-        "desc": "CRM_DASH_VNET_WITH_CORRECT_FREE_VALUE no failure."
-    },
-    "CRM_DASH_VNET_WITH_CORRECT_USED_VALUE": {
-        "desc": "CRM_DASH_VNET_WITH_CORRECT_USED_VALUE no failure."
-    },
-    "CRM_DASH_VNET_WITH_WRONG_THRESHOLD_TYPE": {
-        "desc": "CRM_DASH_VNET_WITH_WRONG_THRESHOLD_TYPE pattern failure.",
-        "eStrKey": "Pattern",
-        "eStr": ["wrong" ]
-    },
-    "CRM_DASH_VNET_WITH_WRONG_PERCENTAGE": {
-        "desc": "CRM_DASH_VNET_WITH_WRONG_PERCENTAGE must condition failure.",
-        "eStrKey": "Must"
-    },
-    "CRM_DASH_VNET_WITH_HIGH_THRESHOLD_ERR": {
-        "desc": "CRM_DASH_VNET_WITH_HIGH_THRESHOLD_ERR must condition failure  about high threshold being lower than low threshold.",
-        "eStr": ["high_threshold should be more than low_threshold"]
-    },
-    "CRM_DASH_ENI_WITH_CORRECT_FREE_VALUE": {
-        "desc": "CRM_DASH_ENI_WITH_CORRECT_FREE_VALUE no failure."
-    },
-    "CRM_DASH_ENI_WITH_CORRECT_USED_VALUE": {
-        "desc": "CRM_DASH_ENI_WITH_CORRECT_USED_VALUE no failure."
-    },
-    "CRM_DASH_ENI_WITH_WRONG_THRESHOLD_TYPE": {
-        "desc": "CRM_DASH_ENI_WITH_WRONG_THRESHOLD_TYPE pattern failure.",
-        "eStrKey": "Pattern",
-        "eStr": ["wrong" ]
-    },
-    "CRM_DASH_ENI_WITH_WRONG_PERCENTAGE": {
-        "desc": "CRM_DASH_ENI_WITH_WRONG_PERCENTAGE must condition failure.",
-        "eStrKey": "Must"
-    },
-    "CRM_DASH_ENI_WITH_HIGH_THRESHOLD_ERR": {
-        "desc": "CRM_DASH_ENI_WITH_HIGH_THRESHOLD_ERR must condition failure  about high threshold being lower than low threshold.",
-        "eStr": ["high_threshold should be more than low_threshold"]
-    },
-    "CRM_DASH_ENI_ETHER_ADDRESS_MAP_WITH_CORRECT_FREE_VALUE": {
-        "desc": "CRM_DASH_ENI_ETHER_ADDRESS_MAP_WITH_CORRECT_FREE_VALUE no failure."
-    },
-    "CRM_DASH_ENI_ETHER_ADDRESS_MAP_WITH_CORRECT_USED_VALUE": {
-        "desc": "CRM_DASH_ENI_ETHER_ADDRESS_MAP_WITH_CORRECT_USED_VALUE no failure."
-    },
-    "CRM_DASH_ENI_ETHER_ADDRESS_MAP_WITH_WRONG_THRESHOLD_TYPE": {
-        "desc": "CRM_DASH_ENI_ETHER_ADDRESS_MAP_WITH_WRONG_THRESHOLD_TYPE pattern failure.",
-        "eStrKey": "Pattern",
-        "eStr": ["wrong" ]
-    },
-    "CRM_DASH_ENI_ETHER_ADDRESS_MAP_WITH_WRONG_PERCENTAGE": {
-        "desc": "CRM_DASH_ENI_ETHER_ADDRESS_MAP_WITH_WRONG_PERCENTAGE must condition failure.",
-        "eStrKey": "Must"
-    },
-    "CRM_DASH_ENI_ETHER_ADDRESS_MAP_WITH_HIGH_THRESHOLD_ERR": {
-        "desc": "CRM_DASH_ENI_ETHER_ADDRESS_MAP_WITH_HIGH_THRESHOLD_ERR must condition failure  about high threshold being lower than low threshold.",
-        "eStr": ["high_threshold should be more than low_threshold"]
-    },
-    "CRM_DASH_IPV4_INBOUND_ROUTING_WITH_CORRECT_FREE_VALUE": {
-        "desc": "CRM_DASH_IPV4_INBOUND_ROUTING_WITH_CORRECT_FREE_VALUE no failure."
-    },
-    "CRM_DASH_IPV4_INBOUND_ROUTING_WITH_CORRECT_USED_VALUE": {
-        "desc": "CRM_DASH_IPV4_INBOUND_ROUTING_WITH_CORRECT_USED_VALUE no failure."
-    },
-    "CRM_DASH_IPV4_INBOUND_ROUTING_WITH_WRONG_THRESHOLD_TYPE": {
-        "desc": "CRM_DASH_IPV4_INBOUND_ROUTING_WITH_WRONG_THRESHOLD_TYPE pattern failure.",
-        "eStrKey": "Pattern",
-        "eStr": ["wrong" ]
-    },
-    "CRM_DASH_IPV4_INBOUND_ROUTING_WITH_WRONG_PERCENTAGE": {
-        "desc": "CRM_DASH_IPV4_INBOUND_ROUTING_WITH_WRONG_PERCENTAGE must condition failure.",
-        "eStrKey": "Must"
-    },
-    "CRM_DASH_IPV4_INBOUND_ROUTING_WITH_HIGH_THRESHOLD_ERR": {
-        "desc": "CRM_DASH_IPV4_INBOUND_ROUTING_WITH_HIGH_THRESHOLD_ERR must condition failure  about high threshold being lower than low threshold.",
-        "eStr": ["high_threshold should be more than low_threshold"]
-    },
-    "CRM_DASH_IPV6_INBOUND_ROUTING_WITH_CORRECT_FREE_VALUE": {
-        "desc": "CRM_DASH_IPV6_INBOUND_ROUTING_WITH_CORRECT_FREE_VALUE no failure."
-    },
-    "CRM_DASH_IPV6_INBOUND_ROUTING_WITH_CORRECT_USED_VALUE": {
-        "desc": "CRM_DASH_IPV6_INBOUND_ROUTING_WITH_CORRECT_USED_VALUE no failure."
-    },
-    "CRM_DASH_IPV6_INBOUND_ROUTING_WITH_WRONG_THRESHOLD_TYPE": {
-        "desc": "CRM_DASH_IPV6_INBOUND_ROUTING_WITH_WRONG_THRESHOLD_TYPE pattern failure.",
-        "eStrKey": "Pattern",
-        "eStr": ["wrong" ]
-    },
-    "CRM_DASH_IPV6_INBOUND_ROUTING_WITH_WRONG_PERCENTAGE": {
-        "desc": "CRM_DASH_IPV6_INBOUND_ROUTING_WITH_WRONG_PERCENTAGE must condition failure.",
-        "eStrKey": "Must"
-    },
-    "CRM_DASH_IPV6_INBOUND_ROUTING_WITH_HIGH_THRESHOLD_ERR": {
-        "desc": "CRM_DASH_IPV6_INBOUND_ROUTING_WITH_HIGH_THRESHOLD_ERR must condition failure  about high threshold being lower than low threshold.",
-        "eStr": ["high_threshold should be more than low_threshold"]
-    },
-    "CRM_DASH_IPV4_OUTBOUND_ROUTING_WITH_CORRECT_FREE_VALUE": {
-        "desc": "CRM_DASH_IPV4_OUTBOUND_ROUTING_WITH_CORRECT_FREE_VALUE no failure."
-    },
-    "CRM_DASH_IPV4_OUTBOUND_ROUTING_WITH_CORRECT_USED_VALUE": {
-        "desc": "CRM_DASH_IPV4_OUTBOUND_ROUTING_WITH_CORRECT_USED_VALUE no failure."
-    },
-    "CRM_DASH_IPV4_OUTBOUND_ROUTING_WITH_WRONG_THRESHOLD_TYPE": {
-        "desc": "CRM_DASH_IPV4_OUTBOUND_ROUTING_WITH_WRONG_THRESHOLD_TYPE pattern failure.",
-        "eStrKey": "Pattern",
-        "eStr": ["wrong" ]
-    },
-    "CRM_DASH_IPV4_OUTBOUND_ROUTING_WITH_WRONG_PERCENTAGE": {
-        "desc": "CRM_DASH_IPV4_OUTBOUND_ROUTING_WITH_WRONG_PERCENTAGE must condition failure.",
-        "eStrKey": "Must"
-    },
-    "CRM_DASH_IPV4_OUTBOUND_ROUTING_WITH_HIGH_THRESHOLD_ERR": {
-        "desc": "CRM_DASH_IPV4_OUTBOUND_ROUTING_WITH_HIGH_THRESHOLD_ERR must condition failure  about high threshold being lower than low threshold.",
-        "eStr": ["high_threshold should be more than low_threshold"]
-    },
-    "CRM_DASH_IPV6_OUTBOUND_ROUTING_WITH_CORRECT_FREE_VALUE": {
-        "desc": "CRM_DASH_IPV6_OUTBOUND_ROUTING_WITH_CORRECT_FREE_VALUE no failure."
-    },
-    "CRM_DASH_IPV6_OUTBOUND_ROUTING_WITH_CORRECT_USED_VALUE": {
-        "desc": "CRM_DASH_IPV6_OUTBOUND_ROUTING_WITH_CORRECT_USED_VALUE no failure."
-    },
-    "CRM_DASH_IPV6_OUTBOUND_ROUTING_WITH_WRONG_THRESHOLD_TYPE": {
-        "desc": "CRM_DASH_IPV6_OUTBOUND_ROUTING_WITH_WRONG_THRESHOLD_TYPE pattern failure.",
-        "eStrKey": "Pattern",
-        "eStr": ["wrong" ]
-    },
-    "CRM_DASH_IPV6_OUTBOUND_ROUTING_WITH_WRONG_PERCENTAGE": {
-        "desc": "CRM_DASH_IPV6_OUTBOUND_ROUTING_WITH_WRONG_PERCENTAGE must condition failure.",
-        "eStrKey": "Must"
-    },
-    "CRM_DASH_IPV6_OUTBOUND_ROUTING_WITH_HIGH_THRESHOLD_ERR": {
-        "desc": "CRM_DASH_IPV6_OUTBOUND_ROUTING_WITH_HIGH_THRESHOLD_ERR must condition failure  about high threshold being lower than low threshold.",
-        "eStr": ["high_threshold should be more than low_threshold"]
-    },
-    "CRM_DASH_IPV4_PA_VALIDATION_WITH_CORRECT_FREE_VALUE": {
-        "desc": "CRM_DASH_IPV4_PA_VALIDATION_WITH_CORRECT_FREE_VALUE no failure."
-    },
-    "CRM_DASH_IPV4_PA_VALIDATION_WITH_CORRECT_USED_VALUE": {
-        "desc": "CRM_DASH_IPV4_PA_VALIDATION_WITH_CORRECT_USED_VALUE no failure."
-    },
-    "CRM_DASH_IPV4_PA_VALIDATION_WITH_WRONG_THRESHOLD_TYPE": {
-        "desc": "CRM_DASH_IPV4_PA_VALIDATION_WITH_WRONG_THRESHOLD_TYPE pattern failure.",
-        "eStrKey": "Pattern",
-        "eStr": ["wrong" ]
-    },
-    "CRM_DASH_IPV4_PA_VALIDATION_WITH_WRONG_PERCENTAGE": {
-        "desc": "CRM_DASH_IPV4_PA_VALIDATION_WITH_WRONG_PERCENTAGE must condition failure.",
-        "eStrKey": "Must"
-    },
-    "CRM_DASH_IPV4_PA_VALIDATION_WITH_HIGH_THRESHOLD_ERR": {
-        "desc": "CRM_DASH_IPV4_PA_VALIDATION_WITH_HIGH_THRESHOLD_ERR must condition failure  about high threshold being lower than low threshold.",
-        "eStr": ["high_threshold should be more than low_threshold"]
-    },
-    "CRM_DASH_IPV6_PA_VALIDATION_WITH_CORRECT_FREE_VALUE": {
-        "desc": "CRM_DASH_IPV6_PA_VALIDATION_WITH_CORRECT_FREE_VALUE no failure."
-    },
-    "CRM_DASH_IPV6_PA_VALIDATION_WITH_CORRECT_USED_VALUE": {
-        "desc": "CRM_DASH_IPV6_PA_VALIDATION_WITH_CORRECT_USED_VALUE no failure."
-    },
-    "CRM_DASH_IPV6_PA_VALIDATION_WITH_WRONG_THRESHOLD_TYPE": {
-        "desc": "CRM_DASH_IPV6_PA_VALIDATION_WITH_WRONG_THRESHOLD_TYPE pattern failure.",
-        "eStrKey": "Pattern",
-        "eStr": ["wrong" ]
-    },
-    "CRM_DASH_IPV6_PA_VALIDATION_WITH_WRONG_PERCENTAGE": {
-        "desc": "CRM_DASH_IPV6_PA_VALIDATION_WITH_WRONG_PERCENTAGE must condition failure.",
-        "eStrKey": "Must"
-    },
-    "CRM_DASH_IPV6_PA_VALIDATION_WITH_HIGH_THRESHOLD_ERR": {
-        "desc": "CRM_DASH_IPV6_PA_VALIDATION_WITH_HIGH_THRESHOLD_ERR must condition failure  about high threshold being lower than low threshold.",
-        "eStr": ["high_threshold should be more than low_threshold"]
-    },
-    "CRM_DASH_IPV4_OUTBOUND_CA_TO_PA_WITH_CORRECT_FREE_VALUE": {
-        "desc": "CRM_DASH_IPV4_OUTBOUND_CA_TO_PA_WITH_CORRECT_FREE_VALUE no failure."
-    },
-    "CRM_DASH_IPV4_OUTBOUND_CA_TO_PA_WITH_CORRECT_USED_VALUE": {
-        "desc": "CRM_DASH_IPV4_OUTBOUND_CA_TO_PA_WITH_CORRECT_USED_VALUE no failure."
-    },
-    "CRM_DASH_IPV4_OUTBOUND_CA_TO_PA_WITH_WRONG_THRESHOLD_TYPE": {
-        "desc": "CRM_DASH_IPV4_OUTBOUND_CA_TO_PA_WITH_WRONG_THRESHOLD_TYPE pattern failure.",
-        "eStrKey": "Pattern",
-        "eStr": ["wrong" ]
-    },
-    "CRM_DASH_IPV4_OUTBOUND_CA_TO_PA_WITH_WRONG_PERCENTAGE": {
-        "desc": "CRM_DASH_IPV4_OUTBOUND_CA_TO_PA_WITH_WRONG_PERCENTAGE must condition failure.",
-        "eStrKey": "Must"
-    },
-    "CRM_DASH_IPV4_OUTBOUND_CA_TO_PA_WITH_HIGH_THRESHOLD_ERR": {
-        "desc": "CRM_DASH_IPV4_OUTBOUND_CA_TO_PA_WITH_HIGH_THRESHOLD_ERR must condition failure  about high threshold being lower than low threshold.",
-        "eStr": ["high_threshold should be more than low_threshold"]
-    },
-    "CRM_DASH_IPV6_OUTBOUND_CA_TO_PA_WITH_CORRECT_FREE_VALUE": {
-        "desc": "CRM_DASH_IPV6_OUTBOUND_CA_TO_PA_WITH_CORRECT_FREE_VALUE no failure."
-    },
-    "CRM_DASH_IPV6_OUTBOUND_CA_TO_PA_WITH_CORRECT_USED_VALUE": {
-        "desc": "CRM_DASH_IPV6_OUTBOUND_CA_TO_PA_WITH_CORRECT_USED_VALUE no failure."
-    },
-    "CRM_DASH_IPV6_OUTBOUND_CA_TO_PA_WITH_WRONG_THRESHOLD_TYPE": {
-        "desc": "CRM_DASH_IPV6_OUTBOUND_CA_TO_PA_WITH_WRONG_THRESHOLD_TYPE pattern failure.",
-        "eStrKey": "Pattern",
-        "eStr": ["wrong" ]
-    },
-    "CRM_DASH_IPV6_OUTBOUND_CA_TO_PA_WITH_WRONG_PERCENTAGE": {
-        "desc": "CRM_DASH_IPV6_OUTBOUND_CA_TO_PA_WITH_WRONG_PERCENTAGE must condition failure.",
-        "eStrKey": "Must"
-    },
-    "CRM_DASH_IPV6_OUTBOUND_CA_TO_PA_WITH_HIGH_THRESHOLD_ERR": {
-        "desc": "CRM_DASH_IPV6_OUTBOUND_CA_TO_PA_WITH_HIGH_THRESHOLD_ERR must condition failure  about high threshold being lower than low threshold.",
-        "eStr": ["high_threshold should be more than low_threshold"]
-    },
-    "CRM_DASH_IPV4_ACL_GROUP_WITH_CORRECT_FREE_VALUE": {
-        "desc": "CRM_DASH_IPV4_ACL_GROUP_WITH_CORRECT_FREE_VALUE no failure."
-    },
-    "CRM_DASH_IPV4_ACL_GROUP_WITH_CORRECT_USED_VALUE": {
-        "desc": "CRM_DASH_IPV4_ACL_GROUP_WITH_CORRECT_USED_VALUE no failure."
-    },
-    "CRM_DASH_IPV4_ACL_GROUP_WITH_WRONG_THRESHOLD_TYPE": {
-        "desc": "CRM_DASH_IPV4_ACL_GROUP_WITH_WRONG_THRESHOLD_TYPE pattern failure.",
-        "eStrKey": "Pattern",
-        "eStr": ["wrong" ]
-    },
-    "CRM_DASH_IPV4_ACL_GROUP_WITH_WRONG_PERCENTAGE": {
-        "desc": "CRM_DASH_IPV4_ACL_GROUP_WITH_WRONG_PERCENTAGE must condition failure.",
-        "eStrKey": "Must"
-    },
-    "CRM_DASH_IPV4_ACL_GROUP_WITH_HIGH_THRESHOLD_ERR": {
-        "desc": "CRM_DASH_IPV4_ACL_GROUP_WITH_HIGH_THRESHOLD_ERR must condition failure  about high threshold being lower than low threshold.",
-        "eStr": ["high_threshold should be more than low_threshold"]
-    },
-    "CRM_DASH_IPV6_ACL_GROUP_WITH_CORRECT_FREE_VALUE": {
-        "desc": "CRM_DASH_IPV6_ACL_GROUP_WITH_CORRECT_FREE_VALUE no failure."
-    },
-    "CRM_DASH_IPV6_ACL_GROUP_WITH_CORRECT_USED_VALUE": {
-        "desc": "CRM_DASH_IPV6_ACL_GROUP_WITH_CORRECT_USED_VALUE no failure."
-    },
-    "CRM_DASH_IPV6_ACL_GROUP_WITH_WRONG_THRESHOLD_TYPE": {
-        "desc": "CRM_DASH_IPV6_ACL_GROUP_WITH_WRONG_THRESHOLD_TYPE pattern failure.",
-        "eStrKey": "Pattern",
-        "eStr": ["wrong" ]
-    },
-    "CRM_DASH_IPV6_ACL_GROUP_WITH_WRONG_PERCENTAGE": {
-        "desc": "CRM_DASH_IPV6_ACL_GROUP_WITH_WRONG_PERCENTAGE must condition failure.",
-        "eStrKey": "Must"
-    },
-    "CRM_DASH_IPV6_ACL_GROUP_WITH_HIGH_THRESHOLD_ERR": {
-        "desc": "CRM_DASH_IPV6_ACL_GROUP_WITH_HIGH_THRESHOLD_ERR must condition failure  about high threshold being lower than low threshold.",
-        "eStr": ["high_threshold should be more than low_threshold"]
-    },
-    "CRM_DASH_IPV4_ACL_RULE_WITH_CORRECT_FREE_VALUE": {
-        "desc": "CRM_DASH_IPV4_ACL_RULE_WITH_CORRECT_FREE_VALUE no failure."
-    },
-    "CRM_DASH_IPV4_ACL_RULE_WITH_CORRECT_USED_VALUE": {
-        "desc": "CRM_DASH_IPV4_ACL_RULE_WITH_CORRECT_USED_VALUE no failure."
-    },
-    "CRM_DASH_IPV4_ACL_RULE_WITH_WRONG_THRESHOLD_TYPE": {
-        "desc": "CRM_DASH_IPV4_ACL_RULE_WITH_WRONG_THRESHOLD_TYPE pattern failure.",
-        "eStrKey": "Pattern",
-        "eStr": ["wrong" ]
-    },
-    "CRM_DASH_IPV4_ACL_RULE_WITH_WRONG_PERCENTAGE": {
-        "desc": "CRM_DASH_IPV4_ACL_RULE_WITH_WRONG_PERCENTAGE must condition failure.",
-        "eStrKey": "Must"
-    },
-    "CRM_DASH_IPV4_ACL_RULE_WITH_HIGH_THRESHOLD_ERR": {
-        "desc": "CRM_DASH_IPV4_ACL_RULE_WITH_HIGH_THRESHOLD_ERR must condition failure  about high threshold being lower than low threshold.",
-        "eStr": ["high_threshold should be more than low_threshold"]
-    },
-    "CRM_DASH_IPV6_ACL_RULE_WITH_CORRECT_FREE_VALUE": {
-        "desc": "CRM_DASH_IPV6_ACL_RULE_WITH_CORRECT_FREE_VALUE no failure."
-    },
-    "CRM_DASH_IPV6_ACL_RULE_WITH_CORRECT_USED_VALUE": {
-        "desc": "CRM_DASH_IPV6_ACL_RULE_WITH_CORRECT_USED_VALUE no failure."
-    },
-    "CRM_DASH_IPV6_ACL_RULE_WITH_WRONG_THRESHOLD_TYPE": {
-        "desc": "CRM_DASH_IPV6_ACL_RULE_WITH_WRONG_THRESHOLD_TYPE pattern failure.",
-        "eStrKey": "Pattern",
-        "eStr": ["wrong" ]
-    },
-    "CRM_DASH_IPV6_ACL_RULE_WITH_WRONG_PERCENTAGE": {
-        "desc": "CRM_DASH_IPV6_ACL_RULE_WITH_WRONG_PERCENTAGE must condition failure.",
-        "eStrKey": "Must"
-    },
-    "CRM_DASH_IPV6_ACL_RULE_WITH_HIGH_THRESHOLD_ERR": {
-        "desc": "CRM_DASH_IPV6_ACL_RULE_WITH_HIGH_THRESHOLD_ERR must condition failure  about high threshold being lower than low threshold.",
-        "eStr": ["high_threshold should be more than low_threshold"]
-    }
-}
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/smart-switch.json b/src/sonic-yang-models/tests/yang_model_tests/tests/smart-switch.json
deleted file mode 100644
index 1676ad6ba..000000000
--- a/src/sonic-yang-models/tests/yang_model_tests/tests/smart-switch.json
+++ /dev/null
@@ -1,9 +0,0 @@
-{
-    "SMART_SWITCH_MID_PLANE_BRIDGE_WITH_DPU_TEST" : {
-        "desc": "Valid configuration in MID_PLANE_BRIDGE and DPUS tables."
-    },
-    "SMART_SWITCH_DPU_NAME_TEST" : {
-        "desc": "DPU name validation.",
-        "eStr": "does not satisfy the constraint"
-    }
-}
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/crm.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/crm.json
deleted file mode 100644
index 5f910b0b6..000000000
--- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/crm.json
+++ /dev/null
@@ -1,442 +0,0 @@
-{
-    "CRM_WITH_CORRECT_FREE_VALUE": {
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "acl_counter_high_threshold": 90,
-                    "acl_counter_low_threshold": 70,
-                    "acl_counter_threshold_type": "free"
-                }
-            }
-        }
-    },
-    "CRM_WITH_CORRECT_USED_VALUE": {
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "acl_counter_high_threshold": 85,
-                    "acl_counter_low_threshold": 25,
-                    "acl_counter_threshold_type": "used"
-                }
-            }
-        }
-    },
-    "CRM_WITH_HIGH_THRESHOLD_ERR": {
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "acl_counter_high_threshold": 80,
-                    "acl_counter_low_threshold": 81,
-                    "acl_counter_threshold_type": "PERCENTAGE"
-                }
-            }
-        }
-    },
-    "CRM_WITH_WRONG_PERCENTAGE": {
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "acl_counter_high_threshold": 110,
-                    "acl_counter_low_threshold": 85,
-                    "acl_counter_threshold_type": "PERCENTAGE"
-                }
-            }
-        }
-    },
-    "CRM_WITH_WRONG_THRESHOLD_TYPE": {
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "acl_counter_high_threshold": 90,
-                    "acl_counter_low_threshold": 70,
-                    "acl_counter_threshold_type": "wrong"
-                }
-            }
-        }
-    },
-    "DNAT_WITH_CORRECT_FREE_VALUE": {
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "dnat_entry_high_threshold": 90,
-                    "dnat_entry_low_threshold": 70,
-                    "dnat_entry_threshold_type": "free"
-                }
-            }
-        }
-    },
-    "DNAT_WITH_CORRECT_USED_VALUE": {
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "dnat_entry_high_threshold": 85,
-                    "dnat_entry_low_threshold": 25,
-                    "dnat_entry_threshold_type": "used"
-                }
-            }
-        }
-    },
-    "DNAT_WITH_HIGH_THRESHOLD_ERR": {
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "dnat_entry_high_threshold": 80,
-                    "dnat_entry_low_threshold": 81,
-                    "dnat_entry_threshold_type": "PERCENTAGE"
-                }
-            }
-        }
-    },
-    "DNAT_WITH_WRONG_PERCENTAGE": {
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "dnat_entry_high_threshold": 110,
-                    "dnat_entry_low_threshold": 85,
-                    "dnat_entry_threshold_type": "PERCENTAGE"
-                }
-            }
-        }
-    },
-    "DNAT_WITH_WRONG_THRESHOLD_TYPE": {
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "dnat_entry_high_threshold": 90,
-                    "dnat_entry_low_threshold": 70,
-                    "dnat_entry_threshold_type": "wrong"
-                }
-            }
-        }
-    },
-    "IPMC_WITH_CORRECT_FREE_VALUE": {
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "ipmc_entry_high_threshold": 90,
-                    "ipmc_entry_low_threshold": 70,
-                    "ipmc_entry_threshold_type": "free"
-                }
-            }
-        }
-    },
-    "IPMC_WITH_CORRECT_USED_VALUE": {
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "ipmc_entry_high_threshold": 85,
-                    "ipmc_entry_low_threshold": 25,
-                    "ipmc_entry_threshold_type": "used"
-                }
-            }
-        }
-    },
-    "IPMC_WITH_HIGH_THRESHOLD_ERR": {
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "ipmc_entry_high_threshold": 80,
-                    "ipmc_entry_low_threshold": 81,
-                    "ipmc_entry_threshold_type": "PERCENTAGE"
-                }
-            }
-        }
-    },
-    "IPMC_WITH_WRONG_PERCENTAGE": {
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "ipmc_entry_high_threshold": 110,
-                    "ipmc_entry_low_threshold": 85,
-                    "ipmc_entry_threshold_type": "PERCENTAGE"
-                }
-            }
-        }
-    },
-    "IPMC_WITH_WRONG_THRESHOLD_TYPE": {
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "ipmc_entry_high_threshold": 90,
-                    "ipmc_entry_low_threshold": 70,
-                    "ipmc_entry_threshold_type": "wrong"
-                }
-            }
-        }
-    },
-    "SNAT_WITH_CORRECT_FREE_VALUE": {
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "snat_entry_high_threshold": 90,
-                    "snat_entry_low_threshold": 70,
-                    "snat_entry_threshold_type": "free"
-                }
-            }
-        }
-    },
-    "SNAT_WITH_CORRECT_USED_VALUE": {
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "snat_entry_high_threshold": 85,
-                    "snat_entry_low_threshold": 25,
-                    "snat_entry_threshold_type": "used"
-                }
-            }
-        }
-    },
-    "SNAT_WITH_HIGH_THRESHOLD_ERR": {
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "snat_entry_high_threshold": 80,
-                    "snat_entry_low_threshold": 81,
-                    "snat_entry_threshold_type": "PERCENTAGE"
-                }
-            }
-        }
-    },
-    "SNAT_WITH_WRONG_PERCENTAGE": {
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "snat_entry_high_threshold": 110,
-                    "snat_entry_low_threshold": 85,
-                    "snat_entry_threshold_type": "PERCENTAGE"
-                }
-            }
-        }
-    },
-    "SNAT_WITH_WRONG_THRESHOLD_TYPE": {
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "snat_entry_high_threshold": 90,
-                    "snat_entry_low_threshold": 70,
-                    "snat_entry_threshold_type": "wrong"
-                }
-            }
-        }
-    },
-    "MPLS_INSEG_WITH_CORRECT_FREE_VALUE": {
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "mpls_inseg_high_threshold": 90,
-                    "mpls_inseg_low_threshold": 70,
-                    "mpls_inseg_threshold_type": "free"
-                }
-            }
-        }
-    },
-    "MPLS_INSEG_WITH_CORRECT_USED_VALUE": {
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "mpls_inseg_high_threshold": 85,
-                    "mpls_inseg_low_threshold": 25,
-                    "mpls_inseg_threshold_type": "used"
-                }
-            }
-        }
-    },
-    "MPLS_INSEG_WITH_HIGH_THRESHOLD_ERR": {
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "mpls_inseg_high_threshold": 80,
-                    "mpls_inseg_low_threshold": 81,
-                    "mpls_inseg_threshold_type": "PERCENTAGE"
-                }
-            }
-        }
-    },
-    "MPLS_INSEG_WITH_WRONG_PERCENTAGE": {
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "mpls_inseg_high_threshold": 110,
-                    "mpls_inseg_low_threshold": 85,
-                    "mpls_inseg_threshold_type": "PERCENTAGE"
-                }
-            }
-        }
-    },
-    "MPLS_INSEG_WITH_WRONG_THRESHOLD_TYPE": {
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "mpls_inseg_high_threshold": 90,
-                    "mpls_inseg_low_threshold": 70,
-                    "mpls_inseg_threshold_type": "wrong"
-                }
-            }
-        }
-    },
-    "MPLS_NH_WITH_CORRECT_FREE_VALUE": {
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "mpls_nexthop_high_threshold": 90,
-                    "mpls_nexthop_low_threshold": 70,
-                    "mpls_nexthop_threshold_type": "free"
-                }
-            }
-        }
-    },
-    "MPLS_NH_WITH_CORRECT_USED_VALUE": {
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "mpls_nexthop_high_threshold": 85,
-                    "mpls_nexthop_low_threshold": 25,
-                    "mpls_nexthop_threshold_type": "used"
-                }
-            }
-        }
-    },
-    "MPLS_NH_WITH_HIGH_THRESHOLD_ERR": {
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "mpls_nexthop_high_threshold": 80,
-                    "mpls_nexthop_low_threshold": 81,
-                    "mpls_nexthop_threshold_type": "PERCENTAGE"
-                }
-            }
-        }
-    },
-    "MPLS_NH_WITH_WRONG_PERCENTAGE": {
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "mpls_nexthop_high_threshold": 110,
-                    "mpls_nexthop_low_threshold": 85,
-                    "mpls_nexthop_threshold_type": "PERCENTAGE"
-                }
-            }
-        }
-    },
-    "MPLS_NH_WITH_WRONG_THRESHOLD_TYPE": {
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "mpls_nexthop_high_threshold": 90,
-                    "mpls_nexthop_low_threshold": 70,
-                    "mpls_nexthop_threshold_type": "wrong"
-                }
-            }
-        }
-    },
-    "SRV6_MY_SID_ENTRY_WITH_CORRECT_FREE_VALUE": {
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "srv6_my_sid_entry_high_threshold": 90,
-                    "srv6_my_sid_entry_low_threshold": 70,
-                    "srv6_my_sid_entry_threshold_type": "free"
-                }
-            }
-        }
-    },
-    "SRV6_MY_SID_ENTRY_WITH_CORRECT_USED_VALUE": {
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "srv6_my_sid_entry_high_threshold": 85,
-                    "srv6_my_sid_entry_low_threshold": 25,
-                    "srv6_my_sid_entry_threshold_type": "used"
-                }
-            }
-        }
-    },
-    "SRV6_MY_SID_ENTRY_WITH_HIGH_THRESHOLD_ERR": {
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "srv6_my_sid_entry_high_threshold": 80,
-                    "srv6_my_sid_entry_low_threshold": 81,
-                    "srv6_my_sid_entry_threshold_type": "PERCENTAGE"
-                }
-            }
-        }
-    },
-    "SRV6_MY_SID_ENTRY_WITH_WRONG_PERCENTAGE": {
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "srv6_my_sid_entry_high_threshold": 110,
-                    "srv6_my_sid_entry_low_threshold": 85,
-                    "srv6_my_sid_entry_threshold_type": "PERCENTAGE"
-                }
-            }
-        }
-    },
-    "SRV6_MY_SID_ENTRY_WITH_WRONG_THRESHOLD_TYPE": {
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "srv6_my_sid_entry_high_threshold": 90,
-                    "srv6_my_sid_entry_low_threshold": 70,
-                    "srv6_my_sid_entry_threshold_type": "wrong"
-                }
-            }
-        }
-    },
-    "SRV6_NH_WITH_CORRECT_FREE_VALUE": {
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "srv6_nexthop_high_threshold": 90,
-                    "srv6_nexthop_low_threshold": 70,
-                    "srv6_nexthop_threshold_type": "free"
-                }
-            }
-        }
-    },
-    "SRV6_NH_WITH_CORRECT_USED_VALUE": {
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "srv6_nexthop_high_threshold": 85,
-                    "srv6_nexthop_low_threshold": 25,
-                    "srv6_nexthop_threshold_type": "used"
-                }
-            }
-        }
-    },
-    "SRV6_NH_WITH_HIGH_THRESHOLD_ERR": {
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "srv6_nexthop_high_threshold": 80,
-                    "srv6_nexthop_low_threshold": 81,
-                    "srv6_nexthop_threshold_type": "PERCENTAGE"
-                }
-            }
-        }
-    },
-    "SRV6_NH_WITH_WRONG_PERCENTAGE": {
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "srv6_nexthop_high_threshold": 110,
-                    "srv6_nexthop_low_threshold": 85,
-                    "srv6_nexthop_threshold_type": "PERCENTAGE"
-                }
-            }
-        }
-    },
-    "SRV6_NH_WITH_WRONG_THRESHOLD_TYPE": {
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "srv6_nexthop_high_threshold": 90,
-                    "srv6_nexthop_low_threshold": 70,
-                    "srv6_nexthop_threshold_type": "wrong"
-                }
-            }
-        }
-    }
-}
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/crm_dash.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/crm_dash.json
deleted file mode 100644
index b6fe92856..000000000
--- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/crm_dash.json
+++ /dev/null
@@ -1,1352 +0,0 @@
-{
-    "CRM_DASH_VNET_WITH_CORRECT_FREE_VALUE": {
-        "sonic-device_metadata:sonic-device_metadata": {
-            "sonic-device_metadata:DEVICE_METADATA": {
-                "localhost": {
-                    "switch_type": "dpu"
-                }
-            }
-        },
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "dash_vnet_high_threshold": 90,
-                    "dash_vnet_low_threshold": 70,
-                    "dash_vnet_threshold_type": "free"
-                }
-            }
-        }
-    },
-    "CRM_DASH_VNET_WITH_CORRECT_USED_VALUE": {
-        "sonic-device_metadata:sonic-device_metadata": {
-            "sonic-device_metadata:DEVICE_METADATA": {
-                "localhost": {
-                    "switch_type": "dpu"
-                }
-            }
-        },
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "dash_vnet_high_threshold": 85,
-                    "dash_vnet_low_threshold": 25,
-                    "dash_vnet_threshold_type": "used"
-                }
-            }
-        }
-    },
-    "CRM_DASH_VNET_WITH_HIGH_THRESHOLD_ERR": {
-        "sonic-device_metadata:sonic-device_metadata": {
-            "sonic-device_metadata:DEVICE_METADATA": {
-                "localhost": {
-                    "switch_type": "dpu"
-                }
-            }
-        },
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "dash_vnet_high_threshold": 80,
-                    "dash_vnet_low_threshold": 81,
-                    "dash_vnet_threshold_type": "PERCENTAGE"
-                }
-            }
-        }
-    },
-    "CRM_DASH_VNET_WITH_WRONG_PERCENTAGE": {
-        "sonic-device_metadata:sonic-device_metadata": {
-            "sonic-device_metadata:DEVICE_METADATA": {
-                "localhost": {
-                    "switch_type": "dpu"
-                }
-            }
-        },
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "dash_vnet_high_threshold": 110,
-                    "dash_vnet_low_threshold": 85,
-                    "dash_vnet_threshold_type": "PERCENTAGE"
-                }
-            }
-        }
-    },
-    "CRM_DASH_VNET_WITH_WRONG_THRESHOLD_TYPE": {
-        "sonic-device_metadata:sonic-device_metadata": {
-            "sonic-device_metadata:DEVICE_METADATA": {
-                "localhost": {
-                    "switch_type": "dpu"
-                }
-            }
-        },
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "dash_vnet_high_threshold": 90,
-                    "dash_vnet_low_threshold": 70,
-                    "dash_vnet_threshold_type": "wrong"
-                }
-            }
-        }
-    },
-    "CRM_DASH_ENI_WITH_CORRECT_FREE_VALUE": {
-        "sonic-device_metadata:sonic-device_metadata": {
-            "sonic-device_metadata:DEVICE_METADATA": {
-                "localhost": {
-                    "switch_type": "dpu"
-                }
-            }
-        },
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "dash_eni_high_threshold": 90,
-                    "dash_eni_low_threshold": 70,
-                    "dash_eni_threshold_type": "free"
-                }
-            }
-        }
-    },
-    "CRM_DASH_ENI_WITH_CORRECT_USED_VALUE": {
-        "sonic-device_metadata:sonic-device_metadata": {
-            "sonic-device_metadata:DEVICE_METADATA": {
-                "localhost": {
-                    "switch_type": "dpu"
-                }
-            }
-        },
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "dash_eni_high_threshold": 85,
-                    "dash_eni_low_threshold": 25,
-                    "dash_eni_threshold_type": "used"
-                }
-            }
-        }
-    },
-    "CRM_DASH_ENI_WITH_HIGH_THRESHOLD_ERR": {
-        "sonic-device_metadata:sonic-device_metadata": {
-            "sonic-device_metadata:DEVICE_METADATA": {
-                "localhost": {
-                    "switch_type": "dpu"
-                }
-            }
-        },
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "dash_eni_high_threshold": 80,
-                    "dash_eni_low_threshold": 81,
-                    "dash_eni_threshold_type": "PERCENTAGE"
-                }
-            }
-        }
-    },
-    "CRM_DASH_ENI_WITH_WRONG_PERCENTAGE": {
-        "sonic-device_metadata:sonic-device_metadata": {
-            "sonic-device_metadata:DEVICE_METADATA": {
-                "localhost": {
-                    "switch_type": "dpu"
-                }
-            }
-        },
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "dash_eni_high_threshold": 110,
-                    "dash_eni_low_threshold": 85,
-                    "dash_eni_threshold_type": "PERCENTAGE"
-                }
-            }
-        }
-    },
-    "CRM_DASH_ENI_WITH_WRONG_THRESHOLD_TYPE": {
-        "sonic-device_metadata:sonic-device_metadata": {
-            "sonic-device_metadata:DEVICE_METADATA": {
-                "localhost": {
-                    "switch_type": "dpu"
-                }
-            }
-        },
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "dash_eni_high_threshold": 90,
-                    "dash_eni_low_threshold": 70,
-                    "dash_eni_threshold_type": "wrong"
-                }
-            }
-        }
-    },
-    "CRM_DASH_ENI_ETHER_ADDRESS_MAP_WITH_CORRECT_FREE_VALUE": {
-        "sonic-device_metadata:sonic-device_metadata": {
-            "sonic-device_metadata:DEVICE_METADATA": {
-                "localhost": {
-                    "switch_type": "dpu"
-                }
-            }
-        },
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "dash_eni_ether_address_map_high_threshold": 90,
-                    "dash_eni_ether_address_map_low_threshold": 70,
-                    "dash_eni_ether_address_map_threshold_type": "free"
-                }
-            }
-        }
-    },
-    "CRM_DASH_ENI_ETHER_ADDRESS_MAP_WITH_CORRECT_USED_VALUE": {
-        "sonic-device_metadata:sonic-device_metadata": {
-            "sonic-device_metadata:DEVICE_METADATA": {
-                "localhost": {
-                    "switch_type": "dpu"
-                }
-            }
-        },
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "dash_eni_ether_address_map_high_threshold": 85,
-                    "dash_eni_ether_address_map_low_threshold": 25,
-                    "dash_eni_ether_address_map_threshold_type": "used"
-                }
-            }
-        }
-    },
-    "CRM_DASH_ENI_ETHER_ADDRESS_MAP_WITH_HIGH_THRESHOLD_ERR": {
-        "sonic-device_metadata:sonic-device_metadata": {
-            "sonic-device_metadata:DEVICE_METADATA": {
-                "localhost": {
-                    "switch_type": "dpu"
-                }
-            }
-        },
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "dash_eni_ether_address_map_high_threshold": 80,
-                    "dash_eni_ether_address_map_low_threshold": 81,
-                    "dash_eni_ether_address_map_threshold_type": "PERCENTAGE"
-                }
-            }
-        }
-    },
-    "CRM_DASH_ENI_ETHER_ADDRESS_MAP_WITH_WRONG_PERCENTAGE": {
-        "sonic-device_metadata:sonic-device_metadata": {
-            "sonic-device_metadata:DEVICE_METADATA": {
-                "localhost": {
-                    "switch_type": "dpu"
-                }
-            }
-        },
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "dash_eni_ether_address_map_high_threshold": 110,
-                    "dash_eni_ether_address_map_low_threshold": 85,
-                    "dash_eni_ether_address_map_threshold_type": "PERCENTAGE"
-                }
-            }
-        }
-    },
-    "CRM_DASH_ENI_ETHER_ADDRESS_MAP_WITH_WRONG_THRESHOLD_TYPE": {
-        "sonic-device_metadata:sonic-device_metadata": {
-            "sonic-device_metadata:DEVICE_METADATA": {
-                "localhost": {
-                    "switch_type": "dpu"
-                }
-            }
-        },
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "dash_eni_ether_address_map_high_threshold": 90,
-                    "dash_eni_ether_address_map_low_threshold": 70,
-                    "dash_eni_ether_address_map_threshold_type": "wrong"
-                }
-            }
-        }
-    },
-    "CRM_DASH_IPV4_INBOUND_ROUTING_WITH_CORRECT_FREE_VALUE": {
-        "sonic-device_metadata:sonic-device_metadata": {
-            "sonic-device_metadata:DEVICE_METADATA": {
-                "localhost": {
-                    "switch_type": "dpu"
-                }
-            }
-        },
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "dash_ipv4_inbound_routing_high_threshold": 90,
-                    "dash_ipv4_inbound_routing_low_threshold": 70,
-                    "dash_ipv4_inbound_routing_threshold_type": "free"
-                }
-            }
-        }
-    },
-    "CRM_DASH_IPV4_INBOUND_ROUTING_WITH_CORRECT_USED_VALUE": {
-        "sonic-device_metadata:sonic-device_metadata": {
-            "sonic-device_metadata:DEVICE_METADATA": {
-                "localhost": {
-                    "switch_type": "dpu"
-                }
-            }
-        },
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "dash_ipv4_inbound_routing_high_threshold": 85,
-                    "dash_ipv4_inbound_routing_low_threshold": 25,
-                    "dash_ipv4_inbound_routing_threshold_type": "used"
-                }
-            }
-        }
-    },
-    "CRM_DASH_IPV4_INBOUND_ROUTING_WITH_HIGH_THRESHOLD_ERR": {
-        "sonic-device_metadata:sonic-device_metadata": {
-            "sonic-device_metadata:DEVICE_METADATA": {
-                "localhost": {
-                    "switch_type": "dpu"
-                }
-            }
-        },
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "dash_ipv4_inbound_routing_high_threshold": 80,
-                    "dash_ipv4_inbound_routing_low_threshold": 81,
-                    "dash_ipv4_inbound_routing_threshold_type": "PERCENTAGE"
-                }
-            }
-        }
-    },
-    "CRM_DASH_IPV4_INBOUND_ROUTING_WITH_WRONG_PERCENTAGE": {
-        "sonic-device_metadata:sonic-device_metadata": {
-            "sonic-device_metadata:DEVICE_METADATA": {
-                "localhost": {
-                    "switch_type": "dpu"
-                }
-            }
-        },
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "dash_ipv4_inbound_routing_high_threshold": 110,
-                    "dash_ipv4_inbound_routing_low_threshold": 85,
-                    "dash_ipv4_inbound_routing_threshold_type": "PERCENTAGE"
-                }
-            }
-        }
-    },
-    "CRM_DASH_IPV4_INBOUND_ROUTING_WITH_WRONG_THRESHOLD_TYPE": {
-        "sonic-device_metadata:sonic-device_metadata": {
-            "sonic-device_metadata:DEVICE_METADATA": {
-                "localhost": {
-                    "switch_type": "dpu"
-                }
-            }
-        },
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "dash_ipv4_inbound_routing_high_threshold": 90,
-                    "dash_ipv4_inbound_routing_low_threshold": 70,
-                    "dash_ipv4_inbound_routing_threshold_type": "wrong"
-                }
-            }
-        }
-    },
-    "CRM_DASH_IPV6_INBOUND_ROUTING_WITH_CORRECT_FREE_VALUE": {
-        "sonic-device_metadata:sonic-device_metadata": {
-            "sonic-device_metadata:DEVICE_METADATA": {
-                "localhost": {
-                    "switch_type": "dpu"
-                }
-            }
-        },
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "dash_ipv6_inbound_routing_high_threshold": 90,
-                    "dash_ipv6_inbound_routing_low_threshold": 70,
-                    "dash_ipv6_inbound_routing_threshold_type": "free"
-                }
-            }
-        }
-    },
-    "CRM_DASH_IPV6_INBOUND_ROUTING_WITH_CORRECT_USED_VALUE": {
-        "sonic-device_metadata:sonic-device_metadata": {
-            "sonic-device_metadata:DEVICE_METADATA": {
-                "localhost": {
-                    "switch_type": "dpu"
-                }
-            }
-        },
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "dash_ipv6_inbound_routing_high_threshold": 85,
-                    "dash_ipv6_inbound_routing_low_threshold": 25,
-                    "dash_ipv6_inbound_routing_threshold_type": "used"
-                }
-            }
-        }
-    },
-    "CRM_DASH_IPV6_INBOUND_ROUTING_WITH_HIGH_THRESHOLD_ERR": {
-        "sonic-device_metadata:sonic-device_metadata": {
-            "sonic-device_metadata:DEVICE_METADATA": {
-                "localhost": {
-                    "switch_type": "dpu"
-                }
-            }
-        },
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "dash_ipv6_inbound_routing_high_threshold": 80,
-                    "dash_ipv6_inbound_routing_low_threshold": 81,
-                    "dash_ipv6_inbound_routing_threshold_type": "PERCENTAGE"
-                }
-            }
-        }
-    },
-    "CRM_DASH_IPV6_INBOUND_ROUTING_WITH_WRONG_PERCENTAGE": {
-        "sonic-device_metadata:sonic-device_metadata": {
-            "sonic-device_metadata:DEVICE_METADATA": {
-                "localhost": {
-                    "switch_type": "dpu"
-                }
-            }
-        },
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "dash_ipv6_inbound_routing_high_threshold": 110,
-                    "dash_ipv6_inbound_routing_low_threshold": 85,
-                    "dash_ipv6_inbound_routing_threshold_type": "PERCENTAGE"
-                }
-            }
-        }
-    },
-    "CRM_DASH_IPV6_INBOUND_ROUTING_WITH_WRONG_THRESHOLD_TYPE": {
-        "sonic-device_metadata:sonic-device_metadata": {
-            "sonic-device_metadata:DEVICE_METADATA": {
-                "localhost": {
-                    "switch_type": "dpu"
-                }
-            }
-        },
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "dash_ipv6_inbound_routing_high_threshold": 90,
-                    "dash_ipv6_inbound_routing_low_threshold": 70,
-                    "dash_ipv6_inbound_routing_threshold_type": "wrong"
-                }
-            }
-        }
-    },
-    "CRM_DASH_IPV4_OUTBOUND_ROUTING_WITH_CORRECT_FREE_VALUE": {
-        "sonic-device_metadata:sonic-device_metadata": {
-            "sonic-device_metadata:DEVICE_METADATA": {
-                "localhost": {
-                    "switch_type": "dpu"
-                }
-            }
-        },
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "dash_ipv4_outbound_routing_high_threshold": 90,
-                    "dash_ipv4_outbound_routing_low_threshold": 70,
-                    "dash_ipv4_outbound_routing_threshold_type": "free"
-                }
-            }
-        }
-    },
-    "CRM_DASH_IPV4_OUTBOUND_ROUTING_WITH_CORRECT_USED_VALUE": {
-        "sonic-device_metadata:sonic-device_metadata": {
-            "sonic-device_metadata:DEVICE_METADATA": {
-                "localhost": {
-                    "switch_type": "dpu"
-                }
-            }
-        },
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "dash_ipv4_outbound_routing_high_threshold": 85,
-                    "dash_ipv4_outbound_routing_low_threshold": 25,
-                    "dash_ipv4_outbound_routing_threshold_type": "used"
-                }
-            }
-        }
-    },
-    "CRM_DASH_IPV4_OUTBOUND_ROUTING_WITH_HIGH_THRESHOLD_ERR": {
-        "sonic-device_metadata:sonic-device_metadata": {
-            "sonic-device_metadata:DEVICE_METADATA": {
-                "localhost": {
-                    "switch_type": "dpu"
-                }
-            }
-        },
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "dash_ipv4_outbound_routing_high_threshold": 80,
-                    "dash_ipv4_outbound_routing_low_threshold": 81,
-                    "dash_ipv4_outbound_routing_threshold_type": "PERCENTAGE"
-                }
-            }
-        }
-    },
-    "CRM_DASH_IPV4_OUTBOUND_ROUTING_WITH_WRONG_PERCENTAGE": {
-        "sonic-device_metadata:sonic-device_metadata": {
-            "sonic-device_metadata:DEVICE_METADATA": {
-                "localhost": {
-                    "switch_type": "dpu"
-                }
-            }
-        },
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "dash_ipv4_outbound_routing_high_threshold": 110,
-                    "dash_ipv4_outbound_routing_low_threshold": 85,
-                    "dash_ipv4_outbound_routing_threshold_type": "PERCENTAGE"
-                }
-            }
-        }
-    },
-    "CRM_DASH_IPV4_OUTBOUND_ROUTING_WITH_WRONG_THRESHOLD_TYPE": {
-        "sonic-device_metadata:sonic-device_metadata": {
-            "sonic-device_metadata:DEVICE_METADATA": {
-                "localhost": {
-                    "switch_type": "dpu"
-                }
-            }
-        },
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "dash_ipv4_outbound_routing_high_threshold": 90,
-                    "dash_ipv4_outbound_routing_low_threshold": 70,
-                    "dash_ipv4_outbound_routing_threshold_type": "wrong"
-                }
-            }
-        }
-    },
-    "CRM_DASH_IPV6_OUTBOUND_ROUTING_WITH_CORRECT_FREE_VALUE": {
-        "sonic-device_metadata:sonic-device_metadata": {
-            "sonic-device_metadata:DEVICE_METADATA": {
-                "localhost": {
-                    "switch_type": "dpu"
-                }
-            }
-        },
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "dash_ipv6_outbound_routing_high_threshold": 90,
-                    "dash_ipv6_outbound_routing_low_threshold": 70,
-                    "dash_ipv6_outbound_routing_threshold_type": "free"
-                }
-            }
-        }
-    },
-    "CRM_DASH_IPV6_OUTBOUND_ROUTING_WITH_CORRECT_USED_VALUE": {
-        "sonic-device_metadata:sonic-device_metadata": {
-            "sonic-device_metadata:DEVICE_METADATA": {
-                "localhost": {
-                    "switch_type": "dpu"
-                }
-            }
-        },
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "dash_ipv6_outbound_routing_high_threshold": 85,
-                    "dash_ipv6_outbound_routing_low_threshold": 25,
-                    "dash_ipv6_outbound_routing_threshold_type": "used"
-                }
-            }
-        }
-    },
-    "CRM_DASH_IPV6_OUTBOUND_ROUTING_WITH_HIGH_THRESHOLD_ERR": {
-        "sonic-device_metadata:sonic-device_metadata": {
-            "sonic-device_metadata:DEVICE_METADATA": {
-                "localhost": {
-                    "switch_type": "dpu"
-                }
-            }
-        },
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "dash_ipv6_outbound_routing_high_threshold": 80,
-                    "dash_ipv6_outbound_routing_low_threshold": 81,
-                    "dash_ipv6_outbound_routing_threshold_type": "PERCENTAGE"
-                }
-            }
-        }
-    },
-    "CRM_DASH_IPV6_OUTBOUND_ROUTING_WITH_WRONG_PERCENTAGE": {
-        "sonic-device_metadata:sonic-device_metadata": {
-            "sonic-device_metadata:DEVICE_METADATA": {
-                "localhost": {
-                    "switch_type": "dpu"
-                }
-            }
-        },
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "dash_ipv6_outbound_routing_high_threshold": 110,
-                    "dash_ipv6_outbound_routing_low_threshold": 85,
-                    "dash_ipv6_outbound_routing_threshold_type": "PERCENTAGE"
-                }
-            }
-        }
-    },
-    "CRM_DASH_IPV6_OUTBOUND_ROUTING_WITH_WRONG_THRESHOLD_TYPE": {
-        "sonic-device_metadata:sonic-device_metadata": {
-            "sonic-device_metadata:DEVICE_METADATA": {
-                "localhost": {
-                    "switch_type": "dpu"
-                }
-            }
-        },
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "dash_ipv6_outbound_routing_high_threshold": 90,
-                    "dash_ipv6_outbound_routing_low_threshold": 70,
-                    "dash_ipv6_outbound_routing_threshold_type": "wrong"
-                }
-            }
-        }
-    },
-    "CRM_DASH_IPV4_PA_VALIDATION_WITH_CORRECT_FREE_VALUE": {
-        "sonic-device_metadata:sonic-device_metadata": {
-            "sonic-device_metadata:DEVICE_METADATA": {
-                "localhost": {
-                    "switch_type": "dpu"
-                }
-            }
-        },
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "dash_ipv4_pa_validation_high_threshold": 90,
-                    "dash_ipv4_pa_validation_low_threshold": 70,
-                    "dash_ipv4_pa_validation_threshold_type": "free"
-                }
-            }
-        }
-    },
-    "CRM_DASH_IPV4_PA_VALIDATION_WITH_CORRECT_USED_VALUE": {
-        "sonic-device_metadata:sonic-device_metadata": {
-            "sonic-device_metadata:DEVICE_METADATA": {
-                "localhost": {
-                    "switch_type": "dpu"
-                }
-            }
-        },
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "dash_ipv4_pa_validation_high_threshold": 85,
-                    "dash_ipv4_pa_validation_low_threshold": 25,
-                    "dash_ipv4_pa_validation_threshold_type": "used"
-                }
-            }
-        }
-    },
-    "CRM_DASH_IPV4_PA_VALIDATION_WITH_HIGH_THRESHOLD_ERR": {
-        "sonic-device_metadata:sonic-device_metadata": {
-            "sonic-device_metadata:DEVICE_METADATA": {
-                "localhost": {
-                    "switch_type": "dpu"
-                }
-            }
-        },
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "dash_ipv4_pa_validation_high_threshold": 80,
-                    "dash_ipv4_pa_validation_low_threshold": 81,
-                    "dash_ipv4_pa_validation_threshold_type": "PERCENTAGE"
-                }
-            }
-        }
-    },
-    "CRM_DASH_IPV4_PA_VALIDATION_WITH_WRONG_PERCENTAGE": {
-        "sonic-device_metadata:sonic-device_metadata": {
-            "sonic-device_metadata:DEVICE_METADATA": {
-                "localhost": {
-                    "switch_type": "dpu"
-                }
-            }
-        },
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "dash_ipv4_pa_validation_high_threshold": 110,
-                    "dash_ipv4_pa_validation_low_threshold": 85,
-                    "dash_ipv4_pa_validation_threshold_type": "PERCENTAGE"
-                }
-            }
-        }
-    },
-    "CRM_DASH_IPV4_PA_VALIDATION_WITH_WRONG_THRESHOLD_TYPE": {
-        "sonic-device_metadata:sonic-device_metadata": {
-            "sonic-device_metadata:DEVICE_METADATA": {
-                "localhost": {
-                    "switch_type": "dpu"
-                }
-            }
-        },
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "dash_ipv4_pa_validation_high_threshold": 90,
-                    "dash_ipv4_pa_validation_low_threshold": 70,
-                    "dash_ipv4_pa_validation_threshold_type": "wrong"
-                }
-            }
-        }
-    },
-    "CRM_DASH_IPV6_PA_VALIDATION_WITH_CORRECT_FREE_VALUE": {
-        "sonic-device_metadata:sonic-device_metadata": {
-            "sonic-device_metadata:DEVICE_METADATA": {
-                "localhost": {
-                    "switch_type": "dpu"
-                }
-            }
-        },
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "dash_ipv6_pa_validation_high_threshold": 90,
-                    "dash_ipv6_pa_validation_low_threshold": 70,
-                    "dash_ipv6_pa_validation_threshold_type": "free"
-                }
-            }
-        }
-    },
-    "CRM_DASH_IPV6_PA_VALIDATION_WITH_CORRECT_USED_VALUE": {
-        "sonic-device_metadata:sonic-device_metadata": {
-            "sonic-device_metadata:DEVICE_METADATA": {
-                "localhost": {
-                    "switch_type": "dpu"
-                }
-            }
-        },
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "dash_ipv6_pa_validation_high_threshold": 85,
-                    "dash_ipv6_pa_validation_low_threshold": 25,
-                    "dash_ipv6_pa_validation_threshold_type": "used"
-                }
-            }
-        }
-    },
-    "CRM_DASH_IPV6_PA_VALIDATION_WITH_HIGH_THRESHOLD_ERR": {
-        "sonic-device_metadata:sonic-device_metadata": {
-            "sonic-device_metadata:DEVICE_METADATA": {
-                "localhost": {
-                    "switch_type": "dpu"
-                }
-            }
-        },
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "dash_ipv6_pa_validation_high_threshold": 80,
-                    "dash_ipv6_pa_validation_low_threshold": 81,
-                    "dash_ipv6_pa_validation_threshold_type": "PERCENTAGE"
-                }
-            }
-        }
-    },
-    "CRM_DASH_IPV6_PA_VALIDATION_WITH_WRONG_PERCENTAGE": {
-        "sonic-device_metadata:sonic-device_metadata": {
-            "sonic-device_metadata:DEVICE_METADATA": {
-                "localhost": {
-                    "switch_type": "dpu"
-                }
-            }
-        },
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "dash_ipv6_pa_validation_high_threshold": 110,
-                    "dash_ipv6_pa_validation_low_threshold": 85,
-                    "dash_ipv6_pa_validation_threshold_type": "PERCENTAGE"
-                }
-            }
-        }
-    },
-    "CRM_DASH_IPV6_PA_VALIDATION_WITH_WRONG_THRESHOLD_TYPE": {
-        "sonic-device_metadata:sonic-device_metadata": {
-            "sonic-device_metadata:DEVICE_METADATA": {
-                "localhost": {
-                    "switch_type": "dpu"
-                }
-            }
-        },
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "dash_ipv6_pa_validation_high_threshold": 90,
-                    "dash_ipv6_pa_validation_low_threshold": 70,
-                    "dash_ipv6_pa_validation_threshold_type": "wrong"
-                }
-            }
-        }
-    },
-    "CRM_DASH_IPV4_OUTBOUND_CA_TO_PA_WITH_CORRECT_FREE_VALUE": {
-        "sonic-device_metadata:sonic-device_metadata": {
-            "sonic-device_metadata:DEVICE_METADATA": {
-                "localhost": {
-                    "switch_type": "dpu"
-                }
-            }
-        },
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "dash_ipv4_outbound_ca_to_pa_high_threshold": 90,
-                    "dash_ipv4_outbound_ca_to_pa_low_threshold": 70,
-                    "dash_ipv4_outbound_ca_to_pa_threshold_type": "free"
-                }
-            }
-        }
-    },
-    "CRM_DASH_IPV4_OUTBOUND_CA_TO_PA_WITH_CORRECT_USED_VALUE": {
-        "sonic-device_metadata:sonic-device_metadata": {
-            "sonic-device_metadata:DEVICE_METADATA": {
-                "localhost": {
-                    "switch_type": "dpu"
-                }
-            }
-        },
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "dash_ipv4_outbound_ca_to_pa_high_threshold": 85,
-                    "dash_ipv4_outbound_ca_to_pa_low_threshold": 25,
-                    "dash_ipv4_outbound_ca_to_pa_threshold_type": "used"
-                }
-            }
-        }
-    },
-    "CRM_DASH_IPV4_OUTBOUND_CA_TO_PA_WITH_HIGH_THRESHOLD_ERR": {
-        "sonic-device_metadata:sonic-device_metadata": {
-            "sonic-device_metadata:DEVICE_METADATA": {
-                "localhost": {
-                    "switch_type": "dpu"
-                }
-            }
-        },
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "dash_ipv4_outbound_ca_to_pa_high_threshold": 80,
-                    "dash_ipv4_outbound_ca_to_pa_low_threshold": 81,
-                    "dash_ipv4_outbound_ca_to_pa_threshold_type": "PERCENTAGE"
-                }
-            }
-        }
-    },
-    "CRM_DASH_IPV4_OUTBOUND_CA_TO_PA_WITH_WRONG_PERCENTAGE": {
-        "sonic-device_metadata:sonic-device_metadata": {
-            "sonic-device_metadata:DEVICE_METADATA": {
-                "localhost": {
-                    "switch_type": "dpu"
-                }
-            }
-        },
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "dash_ipv4_outbound_ca_to_pa_high_threshold": 110,
-                    "dash_ipv4_outbound_ca_to_pa_low_threshold": 85,
-                    "dash_ipv4_outbound_ca_to_pa_threshold_type": "PERCENTAGE"
-                }
-            }
-        }
-    },
-    "CRM_DASH_IPV4_OUTBOUND_CA_TO_PA_WITH_WRONG_THRESHOLD_TYPE": {
-        "sonic-device_metadata:sonic-device_metadata": {
-            "sonic-device_metadata:DEVICE_METADATA": {
-                "localhost": {
-                    "switch_type": "dpu"
-                }
-            }
-        },
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "dash_ipv4_outbound_ca_to_pa_high_threshold": 90,
-                    "dash_ipv4_outbound_ca_to_pa_low_threshold": 70,
-                    "dash_ipv4_outbound_ca_to_pa_threshold_type": "wrong"
-                }
-            }
-        }
-    },
-    "CRM_DASH_IPV6_OUTBOUND_CA_TO_PA_WITH_CORRECT_FREE_VALUE": {
-        "sonic-device_metadata:sonic-device_metadata": {
-            "sonic-device_metadata:DEVICE_METADATA": {
-                "localhost": {
-                    "switch_type": "dpu"
-                }
-            }
-        },
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "dash_ipv6_outbound_ca_to_pa_high_threshold": 90,
-                    "dash_ipv6_outbound_ca_to_pa_low_threshold": 70,
-                    "dash_ipv6_outbound_ca_to_pa_threshold_type": "free"
-                }
-            }
-        }
-    },
-    "CRM_DASH_IPV6_OUTBOUND_CA_TO_PA_WITH_CORRECT_USED_VALUE": {
-        "sonic-device_metadata:sonic-device_metadata": {
-            "sonic-device_metadata:DEVICE_METADATA": {
-                "localhost": {
-                    "switch_type": "dpu"
-                }
-            }
-        },
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "dash_ipv6_outbound_ca_to_pa_high_threshold": 85,
-                    "dash_ipv6_outbound_ca_to_pa_low_threshold": 25,
-                    "dash_ipv6_outbound_ca_to_pa_threshold_type": "used"
-                }
-            }
-        }
-    },
-    "CRM_DASH_IPV6_OUTBOUND_CA_TO_PA_WITH_HIGH_THRESHOLD_ERR": {
-        "sonic-device_metadata:sonic-device_metadata": {
-            "sonic-device_metadata:DEVICE_METADATA": {
-                "localhost": {
-                    "switch_type": "dpu"
-                }
-            }
-        },
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "dash_ipv6_outbound_ca_to_pa_high_threshold": 80,
-                    "dash_ipv6_outbound_ca_to_pa_low_threshold": 81,
-                    "dash_ipv6_outbound_ca_to_pa_threshold_type": "PERCENTAGE"
-                }
-            }
-        }
-    },
-    "CRM_DASH_IPV6_OUTBOUND_CA_TO_PA_WITH_WRONG_PERCENTAGE": {
-        "sonic-device_metadata:sonic-device_metadata": {
-            "sonic-device_metadata:DEVICE_METADATA": {
-                "localhost": {
-                    "switch_type": "dpu"
-                }
-            }
-        },
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "dash_ipv6_outbound_ca_to_pa_high_threshold": 110,
-                    "dash_ipv6_outbound_ca_to_pa_low_threshold": 85,
-                    "dash_ipv6_outbound_ca_to_pa_threshold_type": "PERCENTAGE"
-                }
-            }
-        }
-    },
-    "CRM_DASH_IPV6_OUTBOUND_CA_TO_PA_WITH_WRONG_THRESHOLD_TYPE": {
-        "sonic-device_metadata:sonic-device_metadata": {
-            "sonic-device_metadata:DEVICE_METADATA": {
-                "localhost": {
-                    "switch_type": "dpu"
-                }
-            }
-        },
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "dash_ipv6_outbound_ca_to_pa_high_threshold": 90,
-                    "dash_ipv6_outbound_ca_to_pa_low_threshold": 70,
-                    "dash_ipv6_outbound_ca_to_pa_threshold_type": "wrong"
-                }
-            }
-        }
-    },
-    "CRM_DASH_IPV4_ACL_GROUP_WITH_CORRECT_FREE_VALUE": {
-        "sonic-device_metadata:sonic-device_metadata": {
-            "sonic-device_metadata:DEVICE_METADATA": {
-                "localhost": {
-                    "switch_type": "dpu"
-                }
-            }
-        },
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "dash_ipv4_acl_group_high_threshold": 90,
-                    "dash_ipv4_acl_group_low_threshold": 70,
-                    "dash_ipv4_acl_group_threshold_type": "free"
-                }
-            }
-        }
-    },
-    "CRM_DASH_IPV4_ACL_GROUP_WITH_CORRECT_USED_VALUE": {
-        "sonic-device_metadata:sonic-device_metadata": {
-            "sonic-device_metadata:DEVICE_METADATA": {
-                "localhost": {
-                    "switch_type": "dpu"
-                }
-            }
-        },
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "dash_ipv4_acl_group_high_threshold": 85,
-                    "dash_ipv4_acl_group_low_threshold": 25,
-                    "dash_ipv4_acl_group_threshold_type": "used"
-                }
-            }
-        }
-    },
-    "CRM_DASH_IPV4_ACL_GROUP_WITH_HIGH_THRESHOLD_ERR": {
-        "sonic-device_metadata:sonic-device_metadata": {
-            "sonic-device_metadata:DEVICE_METADATA": {
-                "localhost": {
-                    "switch_type": "dpu"
-                }
-            }
-        },
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "dash_ipv4_acl_group_high_threshold": 80,
-                    "dash_ipv4_acl_group_low_threshold": 81,
-                    "dash_ipv4_acl_group_threshold_type": "PERCENTAGE"
-                }
-            }
-        }
-    },
-    "CRM_DASH_IPV4_ACL_GROUP_WITH_WRONG_PERCENTAGE": {
-        "sonic-device_metadata:sonic-device_metadata": {
-            "sonic-device_metadata:DEVICE_METADATA": {
-                "localhost": {
-                    "switch_type": "dpu"
-                }
-            }
-        },
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "dash_ipv4_acl_group_high_threshold": 110,
-                    "dash_ipv4_acl_group_low_threshold": 85,
-                    "dash_ipv4_acl_group_threshold_type": "PERCENTAGE"
-                }
-            }
-        }
-    },
-    "CRM_DASH_IPV4_ACL_GROUP_WITH_WRONG_THRESHOLD_TYPE": {
-        "sonic-device_metadata:sonic-device_metadata": {
-            "sonic-device_metadata:DEVICE_METADATA": {
-                "localhost": {
-                    "switch_type": "dpu"
-                }
-            }
-        },
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "dash_ipv4_acl_group_high_threshold": 90,
-                    "dash_ipv4_acl_group_low_threshold": 70,
-                    "dash_ipv4_acl_group_threshold_type": "wrong"
-                }
-            }
-        }
-    },
-    "CRM_DASH_IPV6_ACL_GROUP_WITH_CORRECT_FREE_VALUE": {
-        "sonic-device_metadata:sonic-device_metadata": {
-            "sonic-device_metadata:DEVICE_METADATA": {
-                "localhost": {
-                    "switch_type": "dpu"
-                }
-            }
-        },
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "dash_ipv6_acl_group_high_threshold": 90,
-                    "dash_ipv6_acl_group_low_threshold": 70,
-                    "dash_ipv6_acl_group_threshold_type": "free"
-                }
-            }
-        }
-    },
-    "CRM_DASH_IPV6_ACL_GROUP_WITH_CORRECT_USED_VALUE": {
-        "sonic-device_metadata:sonic-device_metadata": {
-            "sonic-device_metadata:DEVICE_METADATA": {
-                "localhost": {
-                    "switch_type": "dpu"
-                }
-            }
-        },
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "dash_ipv6_acl_group_high_threshold": 85,
-                    "dash_ipv6_acl_group_low_threshold": 25,
-                    "dash_ipv6_acl_group_threshold_type": "used"
-                }
-            }
-        }
-    },
-    "CRM_DASH_IPV6_ACL_GROUP_WITH_HIGH_THRESHOLD_ERR": {
-        "sonic-device_metadata:sonic-device_metadata": {
-            "sonic-device_metadata:DEVICE_METADATA": {
-                "localhost": {
-                    "switch_type": "dpu"
-                }
-            }
-        },
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "dash_ipv6_acl_group_high_threshold": 80,
-                    "dash_ipv6_acl_group_low_threshold": 81,
-                    "dash_ipv6_acl_group_threshold_type": "PERCENTAGE"
-                }
-            }
-        }
-    },
-    "CRM_DASH_IPV6_ACL_GROUP_WITH_WRONG_PERCENTAGE": {
-        "sonic-device_metadata:sonic-device_metadata": {
-            "sonic-device_metadata:DEVICE_METADATA": {
-                "localhost": {
-                    "switch_type": "dpu"
-                }
-            }
-        },
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "dash_ipv6_acl_group_high_threshold": 110,
-                    "dash_ipv6_acl_group_low_threshold": 85,
-                    "dash_ipv6_acl_group_threshold_type": "PERCENTAGE"
-                }
-            }
-        }
-    },
-    "CRM_DASH_IPV6_ACL_GROUP_WITH_WRONG_THRESHOLD_TYPE": {
-        "sonic-device_metadata:sonic-device_metadata": {
-            "sonic-device_metadata:DEVICE_METADATA": {
-                "localhost": {
-                    "switch_type": "dpu"
-                }
-            }
-        },
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "dash_ipv6_acl_group_high_threshold": 90,
-                    "dash_ipv6_acl_group_low_threshold": 70,
-                    "dash_ipv6_acl_group_threshold_type": "wrong"
-                }
-            }
-        }
-    },
-    "CRM_DASH_IPV4_ACL_RULE_WITH_CORRECT_FREE_VALUE": {
-        "sonic-device_metadata:sonic-device_metadata": {
-            "sonic-device_metadata:DEVICE_METADATA": {
-                "localhost": {
-                    "switch_type": "dpu"
-                }
-            }
-        },
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "dash_ipv4_acl_rule_high_threshold": 90,
-                    "dash_ipv4_acl_rule_low_threshold": 70,
-                    "dash_ipv4_acl_rule_threshold_type": "free"
-                }
-            }
-        }
-    },
-    "CRM_DASH_IPV4_ACL_RULE_WITH_CORRECT_USED_VALUE": {
-        "sonic-device_metadata:sonic-device_metadata": {
-            "sonic-device_metadata:DEVICE_METADATA": {
-                "localhost": {
-                    "switch_type": "dpu"
-                }
-            }
-        },
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "dash_ipv4_acl_rule_high_threshold": 85,
-                    "dash_ipv4_acl_rule_low_threshold": 25,
-                    "dash_ipv4_acl_rule_threshold_type": "used"
-                }
-            }
-        }
-    },
-    "CRM_DASH_IPV4_ACL_RULE_WITH_HIGH_THRESHOLD_ERR": {
-        "sonic-device_metadata:sonic-device_metadata": {
-            "sonic-device_metadata:DEVICE_METADATA": {
-                "localhost": {
-                    "switch_type": "dpu"
-                }
-            }
-        },
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "dash_ipv4_acl_rule_high_threshold": 80,
-                    "dash_ipv4_acl_rule_low_threshold": 81,
-                    "dash_ipv4_acl_rule_threshold_type": "PERCENTAGE"
-                }
-            }
-        }
-    },
-    "CRM_DASH_IPV4_ACL_RULE_WITH_WRONG_PERCENTAGE": {
-        "sonic-device_metadata:sonic-device_metadata": {
-            "sonic-device_metadata:DEVICE_METADATA": {
-                "localhost": {
-                    "switch_type": "dpu"
-                }
-            }
-        },
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "dash_ipv4_acl_rule_high_threshold": 110,
-                    "dash_ipv4_acl_rule_low_threshold": 85,
-                    "dash_ipv4_acl_rule_threshold_type": "PERCENTAGE"
-                }
-            }
-        }
-    },
-    "CRM_DASH_IPV4_ACL_RULE_WITH_WRONG_THRESHOLD_TYPE": {
-        "sonic-device_metadata:sonic-device_metadata": {
-            "sonic-device_metadata:DEVICE_METADATA": {
-                "localhost": {
-                    "switch_type": "dpu"
-                }
-            }
-        },
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "dash_ipv4_acl_rule_high_threshold": 90,
-                    "dash_ipv4_acl_rule_low_threshold": 70,
-                    "dash_ipv4_acl_rule_threshold_type": "wrong"
-                }
-            }
-        }
-    },
-    "CRM_DASH_IPV6_ACL_RULE_WITH_CORRECT_FREE_VALUE": {
-        "sonic-device_metadata:sonic-device_metadata": {
-            "sonic-device_metadata:DEVICE_METADATA": {
-                "localhost": {
-                    "switch_type": "dpu"
-                }
-            }
-        },
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "dash_ipv6_acl_rule_high_threshold": 90,
-                    "dash_ipv6_acl_rule_low_threshold": 70,
-                    "dash_ipv6_acl_rule_threshold_type": "free"
-                }
-            }
-        }
-    },
-    "CRM_DASH_IPV6_ACL_RULE_WITH_CORRECT_USED_VALUE": {
-        "sonic-device_metadata:sonic-device_metadata": {
-            "sonic-device_metadata:DEVICE_METADATA": {
-                "localhost": {
-                    "switch_type": "dpu"
-                }
-            }
-        },
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "dash_ipv6_acl_rule_high_threshold": 85,
-                    "dash_ipv6_acl_rule_low_threshold": 25,
-                    "dash_ipv6_acl_rule_threshold_type": "used"
-                }
-            }
-        }
-    },
-    "CRM_DASH_IPV6_ACL_RULE_WITH_HIGH_THRESHOLD_ERR": {
-        "sonic-device_metadata:sonic-device_metadata": {
-            "sonic-device_metadata:DEVICE_METADATA": {
-                "localhost": {
-                    "switch_type": "dpu"
-                }
-            }
-        },
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "dash_ipv6_acl_rule_high_threshold": 80,
-                    "dash_ipv6_acl_rule_low_threshold": 81,
-                    "dash_ipv6_acl_rule_threshold_type": "PERCENTAGE"
-                }
-            }
-        }
-    },
-    "CRM_DASH_IPV6_ACL_RULE_WITH_WRONG_PERCENTAGE": {
-        "sonic-device_metadata:sonic-device_metadata": {
-            "sonic-device_metadata:DEVICE_METADATA": {
-                "localhost": {
-                    "switch_type": "dpu"
-                }
-            }
-        },
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "dash_ipv6_acl_rule_high_threshold": 110,
-                    "dash_ipv6_acl_rule_low_threshold": 85,
-                    "dash_ipv6_acl_rule_threshold_type": "PERCENTAGE"
-                }
-            }
-        }
-    },
-    "CRM_DASH_IPV6_ACL_RULE_WITH_WRONG_THRESHOLD_TYPE": {
-        "sonic-device_metadata:sonic-device_metadata": {
-            "sonic-device_metadata:DEVICE_METADATA": {
-                "localhost": {
-                    "switch_type": "dpu"
-                }
-            }
-        },
-        "sonic-crm:sonic-crm": {
-            "sonic-crm:CRM": {
-                "Config": {
-                    "dash_ipv6_acl_rule_high_threshold": 90,
-                    "dash_ipv6_acl_rule_low_threshold": 70,
-                    "dash_ipv6_acl_rule_threshold_type": "wrong"
-                }
-            }
-        }
-    }
-}
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/smart-switch.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/smart-switch.json
deleted file mode 100644
index 4c15d63c7..000000000
--- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/smart-switch.json
+++ /dev/null
@@ -1,40 +0,0 @@
-{
-    "SMART_SWITCH_MID_PLANE_BRIDGE_WITH_DPU_TEST": {
-        "sonic-smart-switch:sonic-smart-switch": {
-            "sonic-smart-switch:MID_PLANE_BRIDGE": {
-                "GLOBAL": {
-                    "bridge": "bridge_midplane",
-                    "ip_prefix": "169.254.200.254/24"
-                }
-            },
-            "sonic-smart-switch:DPUS": {
-                "DPUS_LIST": [
-                    {
-                        "dpu_name": "dpu0",
-                        "midplane_interface": "dpu0"
-                    },
-                    {
-                        "dpu_name": "dpu1",
-                        "midplane_interface": "dpu1"
-                    }
-                ]
-            }
-        }
-    },
-    "SMART_SWITCH_DPU_NAME_TEST": {
-        "sonic-smart-switch:sonic-smart-switch": {
-            "sonic-smart-switch:DPUS": {
-                "DPUS_LIST": [
-                    {
-                        "dpu_name": "dpu0",
-                        "midplane_interface": "dpuX"
-                    },
-                    {
-                        "dpu_name": "dpu1",
-                        "midplane_interface": "dpu0"
-                    }
-                ]
-            }
-        }
-    }
-}

From 2ccd9e5e0f1cb8298e14257831d62c61e582d448 Mon Sep 17 00:00:00 2001
From: Vivek <vkarri@nvidia.com>
Date: Mon, 18 Mar 2024 09:53:25 -0700
Subject: [PATCH 0338/1115] Upgrade SwSS to bookworm (#18342)

### Why I did it

Upgrade SwSS to bookworm

### How I did it

#### How to verify it

Manual Verification and sonic-mgmt tests
---
 dockers/docker-orchagent/Dockerfile.j2 |  2 +-
 rules/docker-orchagent.mk              | 10 +++++-----
 2 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/dockers/docker-orchagent/Dockerfile.j2 b/dockers/docker-orchagent/Dockerfile.j2
index ec17575eb..5148cddeb 100755
--- a/dockers/docker-orchagent/Dockerfile.j2
+++ b/dockers/docker-orchagent/Dockerfile.j2
@@ -1,5 +1,5 @@
 {% from "dockers/dockerfile-macros.j2" import install_debian_packages, install_python_wheels, copy_files %}
-FROM docker-swss-layer-bullseye-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}}
+FROM docker-swss-layer-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}}
 
 ARG docker_container_name
 
diff --git a/rules/docker-orchagent.mk b/rules/docker-orchagent.mk
index 0560c280a..7cf538eae 100644
--- a/rules/docker-orchagent.mk
+++ b/rules/docker-orchagent.mk
@@ -10,18 +10,18 @@ ifeq ($(ENABLE_ASAN), y)
 $(DOCKER_ORCHAGENT)_DEPENDS += $(SWSS_DBG)
 endif
 
-$(DOCKER_ORCHAGENT)_DBG_DEPENDS = $($(DOCKER_SWSS_LAYER_BULLSEYE)_DBG_DEPENDS)
+$(DOCKER_ORCHAGENT)_DBG_DEPENDS = $($(DOCKER_SWSS_LAYER_BOOKWORM)_DBG_DEPENDS)
 $(DOCKER_ORCHAGENT)_DBG_DEPENDS +=   $(SWSS_DBG) \
                                 $(LIBSWSSCOMMON_DBG) \
                                 $(LIBSAIREDIS_DBG) \
 				$(SONIC_RSYSLOG_PLUGIN)
 $(DOCKER_ORCHAGENT)_PYTHON_WHEELS += $(SCAPY)
 
-$(DOCKER_ORCHAGENT)_DBG_IMAGE_PACKAGES = $($(DOCKER_SWSS_LAYER_BULLSEYE)_DBG_IMAGE_PACKAGES)
+$(DOCKER_ORCHAGENT)_DBG_IMAGE_PACKAGES = $($(DOCKER_SWSS_LAYER_BOOKWORM)_DBG_IMAGE_PACKAGES)
 
 $(DOCKER_ORCHAGENT)_PATH = $(DOCKERS_PATH)/$(DOCKER_ORCHAGENT_STEM)
 
-$(DOCKER_ORCHAGENT)_LOAD_DOCKERS += $(DOCKER_SWSS_LAYER_BULLSEYE)
+$(DOCKER_ORCHAGENT)_LOAD_DOCKERS += $(DOCKER_SWSS_LAYER_BOOKWORM)
 
 $(DOCKER_ORCHAGENT)_VERSION = 1.0.0
 $(DOCKER_ORCHAGENT)_PACKAGE_NAME = swss
@@ -29,11 +29,11 @@ $(DOCKER_ORCHAGENT)_WARM_SHUTDOWN_BEFORE = syncd
 $(DOCKER_ORCHAGENT)_FAST_SHUTDOWN_BEFORE = syncd
 
 SONIC_DOCKER_IMAGES += $(DOCKER_ORCHAGENT)
-SONIC_BULLSEYE_DOCKERS += $(DOCKER_ORCHAGENT)
+SONIC_BOOKWORM_DOCKERS += $(DOCKER_ORCHAGENT)
 SONIC_INSTALL_DOCKER_IMAGES += $(DOCKER_ORCHAGENT)
 
 SONIC_DOCKER_DBG_IMAGES += $(DOCKER_ORCHAGENT_DBG)
-SONIC_BULLSEYE_DBG_DOCKERS += $(DOCKER_ORCHAGENT_DBG)
+SONIC_BOOKWORM_DBG_DOCKERS += $(DOCKER_ORCHAGENT_DBG)
 SONIC_INSTALL_DOCKER_DBG_IMAGES += $(DOCKER_ORCHAGENT_DBG)
 
 $(DOCKER_ORCHAGENT)_CONTAINER_NAME = swss

From 2e1410c7b7975d3bc5fad19d07fa7958f65ad9c4 Mon Sep 17 00:00:00 2001
From: Andriy Yurkiv <70649192+ayurkiv-nvda@users.noreply.github.com>
Date: Mon, 18 Mar 2024 23:32:24 +0200
Subject: [PATCH 0339/1115] [Mellanox] Support DSCP remapping in Dual-ToR topo
 for SN4700-O8V48, update buffers for t0 (#18293)

* [Mellanox] Support DSCP remapping in Dual-ToR topo for SN4700-O8V48, update buffers for t0

Signed-off-by: Andriy Yurkiv <ayurkiv@nvidia.com>

* [Mellanox] Support DSCP remapping in Dual-ToR topo for SN4700-O8V48, update buffers for t0 (fixes after recalculation)

Signed-off-by: Andriy Yurkiv <ayurkiv@nvidia.com>

---------

Signed-off-by: Andriy Yurkiv <ayurkiv@nvidia.com>
---
 .../buffers_defaults_t0.j2                      | 17 ++++++++++++++++-
 .../Mellanox-SN4700-O8V48/qos.json.j2           |  2 +-
 2 files changed, 17 insertions(+), 2 deletions(-)

diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/buffers_defaults_t0.j2 b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/buffers_defaults_t0.j2
index 02de15759..beaa88723 100644
--- a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/buffers_defaults_t0.j2
+++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/buffers_defaults_t0.j2
@@ -1,5 +1,5 @@
 {#
-    Copyright (c) 2023 NVIDIA CORPORATION & AFFILIATES.
+    Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
     Apache-2.0
 
     Licensed under the Apache License, Version 2.0 (the "License");
@@ -14,10 +14,17 @@
     limitations under the License.
 #}
 {% set default_cable = '5m' %}
+{%- if ((SYSTEM_DEFAULTS is defined) and ('tunnel_qos_remap' in SYSTEM_DEFAULTS) and (SYSTEM_DEFAULTS['tunnel_qos_remap']['status'] == 'enabled')) -%}
+{% set ingress_lossless_pool_size =  '48168960' %}
+{% set ingress_lossless_pool_xoff  =  '5218304' %}
+{% set egress_lossless_pool_size =  '60817392' %}
+{% set egress_lossy_pool_size =  '48168960' %}
+{%- else -%}
 {% set ingress_lossless_pool_size =  '49946624' %}
 {% set ingress_lossless_pool_xoff  =  '4063232' %}
 {% set egress_lossless_pool_size =  '60817392' %}
 {% set egress_lossy_pool_size =  '49946624' %}
+{%- endif -%}
 
 {% import 'buffers_defaults_objects.j2' as defs with context %}
 
@@ -29,10 +36,18 @@
 {{ defs.generate_profile_lists(port_names_active, port_names_inactive) }}
 {%- endmacro %}
 
+{%- macro generate_queue_buffers_with_extra_lossless_queues_with_inactive_ports(port_names_active, port_names_extra_queues, port_names_inactive) %}
+{{ defs.generate_queue_buffers_with_extra_lossless_queues(port_names_active, port_names_extra_queues, port_names_inactive) }}
+{%- endmacro %}
+
 {%- macro generate_queue_buffers_with_inactive_ports(port_names_active, port_names_inactive) %}
 {{ defs.generate_queue_buffers(port_names_active, port_names_inactive) }}
 {%- endmacro %}
 
+{%- macro generate_pg_profiles_with_extra_lossless_pgs_with_inactive_ports(port_names_active, port_names_extra_pgs, port_names_inactive) %}
+{{ defs.generate_pg_profiles_with_extra_lossless_pgs(port_names_active, port_names_extra_pgs, port_names_inactive) }}
+{%- endmacro %}
+
 {%- macro generate_pg_profiles_with_inactive_ports(port_names_active, port_names_inactive) %}
 {{ defs.generate_pg_profiles(port_names_active, port_names_inactive) }}
 {%- endmacro %}
diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/qos.json.j2 b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/qos.json.j2
index eccf286dc..48221aa2b 120000
--- a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/qos.json.j2
+++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/qos.json.j2
@@ -1 +1 @@
-../../x86_64-mlnx_msn2700-r0/ACS-MSN2700/qos.json.j2
\ No newline at end of file
+../../x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-C64/qos.json.j2
\ No newline at end of file

From ab966ceeeae8638278aa0df6e129050e4505097c Mon Sep 17 00:00:00 2001
From: Zhijian Li <zhijianli@microsoft.com>
Date: Tue, 19 Mar 2024 14:04:38 +0800
Subject: [PATCH 0340/1115] [E1031] Bugfix for Python syntax error in
 sonic_platform/common.py (#18386)

Why I did it
Bugfix for Python syntax error in sonic_platform/common.py.
A method of class need to have self as parameter.

Fixing below issue:

e1031:~$ show int st
Traceback (most recent call last):
  File "/usr/local/bin/intfutil", line 836, in <module>
    main()
  File "/usr/local/bin/intfutil", line 819, in main
    interface_stat.display_intf_status()
  File "/usr/local/bin/intfutil", line 448, in display_intf_status
    self.get_intf_status()
  File "/usr/local/lib/python3.9/dist-packages/utilities_common/multi_asic.py", line 157, in wrapped_run_on_all_asics
    func(self,  *args, **kwargs)
  File "/usr/local/bin/intfutil", line 529, in get_intf_status
    self.portchannel_speed_dict = po_speed_dict(self.po_int_dict, self.db)
  File "/usr/local/bin/intfutil", line 334, in po_speed_dict
    optics_type = port_optics_get(appl_db, value[0], PORT_OPTICS_TYPE)
  File "/usr/local/bin/intfutil", line 224, in port_optics_get
    if is_rj45_port(intf_name):
  File "/usr/local/lib/python3.9/dist-packages/utilities_common/platform_sfputil_helper.py", line 120, in is_rj45_port
    platform_chassis = sonic_platform.platform.Platform().get_chassis()
  File "/usr/local/lib/python3.9/dist-packages/sonic_platform/platform.py", line 21, in __init__
    self._chassis = Chassis()
  File "/usr/local/lib/python3.9/dist-packages/sonic_platform/chassis.py", line 37, in __init__
    self._is_host = self._api_common.is_host()
TypeError: is_host() takes 0 positional arguments but 1 was given
Work item tracking
Microsoft ADO (number only): 27208152
How I did it
Add self parameter to function Common::is_host().

How to verify it
Verified on E1031 DUT with this patch.
---
 device/celestica/x86_64-cel_e1031-r0/sonic_platform/common.py | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/device/celestica/x86_64-cel_e1031-r0/sonic_platform/common.py b/device/celestica/x86_64-cel_e1031-r0/sonic_platform/common.py
index 0838f0cf0..0dcbf7f33 100644
--- a/device/celestica/x86_64-cel_e1031-r0/sonic_platform/common.py
+++ b/device/celestica/x86_64-cel_e1031-r0/sonic_platform/common.py
@@ -183,7 +183,7 @@ def write_txt_file(self, file_path, value):
             return False
         return True
 
-    def is_host():
+    def is_host(self):
         """
         Test whether current process is running on the host or an docker
         return True for host and False for docker

From f1439ee6c5ea009f791026722263b726be60c8f3 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Tue, 19 Mar 2024 19:00:43 +0800
Subject: [PATCH 0341/1115] [submodule] Update submodule sonic-swss-common to
 the latest HEAD automatically (#18388)

#### Why I did it
src/sonic-swss-common
```
* e7917ac - (HEAD -> master, origin/master, origin/HEAD) Add new status code. (#828) (2 hours ago) [mint570]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-swss-common | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-swss-common b/src/sonic-swss-common
index 476a65c7a..e7917acd2 160000
--- a/src/sonic-swss-common
+++ b/src/sonic-swss-common
@@ -1 +1 @@
-Subproject commit 476a65c7adaf28438bc80261f0877c98dc851d64
+Subproject commit e7917acd2d4a9c0121802437e3c899bd513ac888

From b1b79c5c94e0e3c27bdd63c721fc76443d2c8fce Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Tue, 19 Mar 2024 19:00:48 +0800
Subject: [PATCH 0342/1115] [submodule] Update submodule sonic-gnmi to the
 latest HEAD automatically (#18387)

#### Why I did it
src/sonic-gnmi
```
* 3fa77c6 - (HEAD -> master, origin/master, origin/HEAD) Support multiple database for DPU (#188) (20 hours ago) [ganglv]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-gnmi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-gnmi b/src/sonic-gnmi
index d56712a08..3fa77c614 160000
--- a/src/sonic-gnmi
+++ b/src/sonic-gnmi
@@ -1 +1 @@
-Subproject commit d56712a085a258a214917fac00db8d9383e9fb96
+Subproject commit 3fa77c6148d7b9c9d00d5d6142fa05effdbecfcc

From 5c893be2918cfda71c2c4879162e554f4c51840d Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Tue, 19 Mar 2024 19:00:54 +0800
Subject: [PATCH 0343/1115] [submodule] Update submodule
 wpasupplicant/sonic-wpa-supplicant to the latest HEAD automatically (#18374)

#### Why I did it
src/wpasupplicant/sonic-wpa-supplicant
```
* 13e6f1100 - (HEAD -> master, origin/master, origin/HEAD) Fix a memory leak introduced by last commit for high level EVP API #82 (64 minutes ago) [xumia]
|\
| failure_prs.log 225157a01 - Merge branch 'master' into master (3 days ago) [wumiao_nokia]
| |\
| |/
|/|
* | 413704a6c - Provide CMAC high level API replacement #81 (4 days ago) [xumia]
| failure_prs.log c7eafc778 - Fix a memory leak introduced by last commit for high level EVP API for CMAC (3 days ago) [wumiao_nokia]
|/
* 8521d4abb - Fix a port issue (6 days ago) [wumiao_nokia]
* 01a39044a - Provide CMAC high level API replacement (6 days ago) [wumiao_nokia]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/wpasupplicant/sonic-wpa-supplicant | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/wpasupplicant/sonic-wpa-supplicant b/src/wpasupplicant/sonic-wpa-supplicant
index d41110905..13e6f1100 160000
--- a/src/wpasupplicant/sonic-wpa-supplicant
+++ b/src/wpasupplicant/sonic-wpa-supplicant
@@ -1 +1 @@
-Subproject commit d41110905e10201e938058505cf33a170b68522d
+Subproject commit 13e6f11007d3e6d33a514a702fea5d40daaad055

From 8399450c9a280c857ba972e154749c2bbb628e26 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Tue, 19 Mar 2024 19:01:00 +0800
Subject: [PATCH 0344/1115] [submodule] Update submodule sonic-linux-kernel to
 the latest HEAD automatically (#18373)

#### Why I did it
src/sonic-linux-kernel
```
* fdb3145 - (HEAD -> master, origin/master, origin/HEAD) [nvidia-bluefield] Add config inclusions for Nvidia Bluefield-3 DPU (#380) (4 days ago) [Oleksandr Ivantsiv]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-linux-kernel | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-linux-kernel b/src/sonic-linux-kernel
index 4d82cd7ef..fdb31452b 160000
--- a/src/sonic-linux-kernel
+++ b/src/sonic-linux-kernel
@@ -1 +1 @@
-Subproject commit 4d82cd7efee871a8f1295175c704820b6d4b7f33
+Subproject commit fdb31452b4a6c5d696a2cfdacfe5fa97ea48218f

From 53d8b1a38293ad49f1e33fed31cfb56bb7a1990d Mon Sep 17 00:00:00 2001
From: Saikrishna Arcot <sarcot@microsoft.com>
Date: Tue, 19 Mar 2024 10:24:57 -0700
Subject: [PATCH 0345/1115] Fix debug package variables for syncd (#18319)

* Fix debug package variables for syncd

PR #16072 renamed the debug package variables from `*_DBG` to
`*_DBGSYM`, since the package names had changed. However, the references
weren't updated. Since all the other debug packages (including ones that
are named `*-dbgsym`) use `*_DBG`, just use that here as well.

Signed-off-by: Saikrishna Arcot <sarcot@microsoft.com>

* Update sairedis.mk as well

Signed-off-by: Saikrishna Arcot <sarcot@microsoft.com>

---------

Signed-off-by: Saikrishna Arcot <sarcot@microsoft.com>
---
 platform/vs/syncd-vs.mk |  8 ++++----
 rules/sairedis.mk       | 28 ++++++++++++++--------------
 rules/syncd.mk          | 16 ++++++++--------
 3 files changed, 26 insertions(+), 26 deletions(-)

diff --git a/platform/vs/syncd-vs.mk b/platform/vs/syncd-vs.mk
index 7070240cb..e9edf78b2 100644
--- a/platform/vs/syncd-vs.mk
+++ b/platform/vs/syncd-vs.mk
@@ -4,7 +4,7 @@ SYNCD_VS = syncd-vs_1.0.0_$(CONFIGURED_ARCH).deb
 $(SYNCD_VS)_RDEPENDS += $(LIBSAIREDIS) $(LIBSAIMETADATA) $(LIBSAIVS)
 $(eval $(call add_derived_package,$(LIBSAIREDIS),$(SYNCD_VS)))
 
-SYNCD_VS_DBGSYM = syncd-vs-dbgsym_1.0.0_$(CONFIGURED_ARCH).deb
-$(SYNCD_VS_DBGSYM)_DEPENDS += $(SYNCD_VS)
-$(SYNCD_VS_DBGSYM)_RDEPENDS += $(SYNCD_VS)
-$(eval $(call add_derived_package,$(LIBSAIREDIS),$(SYNCD_VS_DBGSYM)))
+SYNCD_VS_DBG = syncd-vs-dbgsym_1.0.0_$(CONFIGURED_ARCH).deb
+$(SYNCD_VS_DBG)_DEPENDS += $(SYNCD_VS)
+$(SYNCD_VS_DBG)_RDEPENDS += $(SYNCD_VS)
+$(eval $(call add_derived_package,$(LIBSAIREDIS),$(SYNCD_VS_DBG)))
diff --git a/rules/sairedis.mk b/rules/sairedis.mk
index 163e9b797..1dae3b6bb 100644
--- a/rules/sairedis.mk
+++ b/rules/sairedis.mk
@@ -29,20 +29,20 @@ LIBSAIMETADATA_DEV = libsaimetadata-dev_$(LIBSAIREDIS_VERSION)_$(CONFIGURED_ARCH
 $(LIBSAIMETADATA_DEV)_DEPENDS += $(LIBSAIMETADATA)
 $(eval $(call add_derived_package,$(LIBSAIREDIS),$(LIBSAIMETADATA_DEV)))
 
-LIBSAIREDIS_DBGSYM = $(LIBSAIREDIS_NAME)-dbgsym_$(LIBSAIREDIS_VERSION)_$(CONFIGURED_ARCH).deb
-$(LIBSAIREDIS_DBGSYM)_DEPENDS += $(LIBSAIREDIS)
-$(LIBSAIREDIS_DBGSYM)_RDEPENDS += $(LIBSAIREDIS)
-$(eval $(call add_derived_package,$(LIBSAIREDIS),$(LIBSAIREDIS_DBGSYM)))
-
-LIBSAIVS_DBGSYM = libsaivs-dbgsym_$(LIBSAIREDIS_VERSION)_$(CONFIGURED_ARCH).deb
-$(LIBSAIVS_DBGSYM)_DEPENDS += $(LIBSAIVS)
-$(LIBSAIVS_DBGSYM)_RDEPENDS += $(LIBSAIVS)
-$(eval $(call add_derived_package,$(LIBSAIREDIS),$(LIBSAIVS_DBGSYM)))
-
-LIBSAIMETADATA_DBGSYM = libsaimetadata-dbgsym_$(LIBSAIREDIS_VERSION)_$(CONFIGURED_ARCH).deb
-$(LIBSAIMETADATA_DBGSYM)_DEPENDS += $(LIBSAIMETADATA)
-$(LIBSAIMETADATA_DBGSYM)_RDEPENDS += $(LIBSAIMETADATA)
-$(eval $(call add_derived_package,$(LIBSAIREDIS),$(LIBSAIMETADATA_DBGSYM)))
+LIBSAIREDIS_DBG = $(LIBSAIREDIS_NAME)-dbgsym_$(LIBSAIREDIS_VERSION)_$(CONFIGURED_ARCH).deb
+$(LIBSAIREDIS_DBG)_DEPENDS += $(LIBSAIREDIS)
+$(LIBSAIREDIS_DBG)_RDEPENDS += $(LIBSAIREDIS)
+$(eval $(call add_derived_package,$(LIBSAIREDIS),$(LIBSAIREDIS_DBG)))
+
+LIBSAIVS_DBG = libsaivs-dbgsym_$(LIBSAIREDIS_VERSION)_$(CONFIGURED_ARCH).deb
+$(LIBSAIVS_DBG)_DEPENDS += $(LIBSAIVS)
+$(LIBSAIVS_DBG)_RDEPENDS += $(LIBSAIVS)
+$(eval $(call add_derived_package,$(LIBSAIREDIS),$(LIBSAIVS_DBG)))
+
+LIBSAIMETADATA_DBG = libsaimetadata-dbgsym_$(LIBSAIREDIS_VERSION)_$(CONFIGURED_ARCH).deb
+$(LIBSAIMETADATA_DBG)_DEPENDS += $(LIBSAIMETADATA)
+$(LIBSAIMETADATA_DBG)_RDEPENDS += $(LIBSAIMETADATA)
+$(eval $(call add_derived_package,$(LIBSAIREDIS),$(LIBSAIMETADATA_DBG)))
 
 ifeq ($(ENABLE_PY2_MODULES), n)
     $(LIBSAIREDIS)_DEB_BUILD_PROFILES += nopython2
diff --git a/rules/syncd.mk b/rules/syncd.mk
index 2f5cce6ce..cbed33fbf 100644
--- a/rules/syncd.mk
+++ b/rules/syncd.mk
@@ -21,16 +21,16 @@ $(SYNCD)_DEPENDS += $(LIBSWSSCOMMON_DEV) $(LIBTHRIFT_DEV)
 $(SYNCD)_DEB_BUILD_PROFILES += rpc
 endif
 
-SYNCD_DBGSYM = syncd-dbgsym_1.0.0_$(CONFIGURED_ARCH).deb
-$(SYNCD_DBGSYM)_DEPENDS += $(SYNCD)
-$(SYNCD_DBGSYM)_RDEPENDS += $(SYNCD)
-$(eval $(call add_derived_package,$(SYNCD),$(SYNCD_DBGSYM)))
+SYNCD_DBG = syncd-dbgsym_1.0.0_$(CONFIGURED_ARCH).deb
+$(SYNCD_DBG)_DEPENDS += $(SYNCD)
+$(SYNCD_DBG)_RDEPENDS += $(SYNCD)
+$(eval $(call add_derived_package,$(SYNCD),$(SYNCD_DBG)))
 
 ifeq ($(ENABLE_SYNCD_RPC),y)
-SYNCD_RPC_DBGSYM = syncd-rpc-dbgsym_1.0.0_$(CONFIGURED_ARCH).deb
-$(SYNCD_RPC_DBGSYM)_DEPENDS += $(SYNCD_RPC)
-$(SYNCD_RPC_DBGSYM)_RDEPENDS += $(SYNCD_RPC)
-$(eval $(call add_derived_package,$(SYNCD),$(SYNCD_RPC_DBGSYM)))
+SYNCD_RPC_DBG = syncd-rpc-dbgsym_1.0.0_$(CONFIGURED_ARCH).deb
+$(SYNCD_RPC_DBG)_DEPENDS += $(SYNCD_RPC)
+$(SYNCD_RPC_DBG)_RDEPENDS += $(SYNCD_RPC)
+$(eval $(call add_derived_package,$(SYNCD),$(SYNCD_RPC_DBG)))
 endif
 
 ifeq ($(ENABLE_PY2_MODULES), n)

From 371f6a6835fa8117038fc871875c51521139983d Mon Sep 17 00:00:00 2001
From: dbarashinvd <105214075+dbarashinvd@users.noreply.github.com>
Date: Wed, 20 Mar 2024 22:15:50 +0200
Subject: [PATCH 0346/1115] add unit tests for CMIS host management feature
 (#18211)

* add unit tests for CMIS host management feature
---
 .../tests/test_modules_mgmt.py                | 800 ++++++++++++++++++
 1 file changed, 800 insertions(+)
 create mode 100644 platform/mellanox/mlnx-platform-api/tests/test_modules_mgmt.py

diff --git a/platform/mellanox/mlnx-platform-api/tests/test_modules_mgmt.py b/platform/mellanox/mlnx-platform-api/tests/test_modules_mgmt.py
new file mode 100644
index 000000000..d0cab978c
--- /dev/null
+++ b/platform/mellanox/mlnx-platform-api/tests/test_modules_mgmt.py
@@ -0,0 +1,800 @@
+#
+# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+import os
+import queue
+import sys
+import threading
+import time
+import types
+import unittest
+
+from mock import MagicMock, patch, mock_open, Mock
+if sys.version_info.major == 3:
+    from unittest import mock
+else:
+    import mock
+
+test_path = os.path.dirname(os.path.abspath(__file__))
+modules_path = os.path.dirname(test_path)
+sys.path.insert(0, modules_path)
+
+from sonic_platform.device_data import DeviceDataManager
+from sonic_py_common import device_info
+from sonic_platform import modules_mgmt
+from sonic_platform.modules_mgmt import ModulesMgmtTask
+from sonic_platform_base.sonic_xcvr.api.public.cmis import CmisApi
+from sonic_platform_base.sonic_xcvr.xcvr_eeprom import XcvrEeprom
+from sonic_platform_base.sonic_xcvr.codes.public.cmis import CmisCodes
+from sonic_platform_base.sonic_xcvr.mem_maps.public.cmis import CmisMemMap
+from sonic_platform_base.sonic_xcvr.fields import consts
+
+DEFAULT_NUM_OF_PORTS_1 = 1
+DEFAULT_NUM_OF_PORTS_3 = 3
+DEFAULT_NUM_OF_PORTS_32 = 32
+POLLER_EXECUTED = False
+
+def _mock_sysfs_default_file_content():
+    return {
+        modules_mgmt.SYSFS_INDEPENDENT_FD_PRESENCE.format("0"): "1",
+        modules_mgmt.SYSFS_INDEPENDENT_FD_PRESENCE.format("1"): "1",
+        modules_mgmt.SYSFS_INDEPENDENT_FD_PRESENCE.format("2"): "1",
+        modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_GOOD.format("0"): "1",
+        modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_GOOD.format("1"): "1",
+        modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_GOOD.format("2"): "1",
+        modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_ON.format("0"): "1",
+        modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_ON.format("1"): "1",
+        modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_ON.format("2"): "1",
+        modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_LIMIT.format("0"): "48",
+        modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_LIMIT.format("1"): "48",
+        modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_LIMIT.format("2"): "48",
+        modules_mgmt.SYSFS_INDEPENDENT_FD_FREQ_SUPPORT.format("0"): "0",
+        modules_mgmt.SYSFS_INDEPENDENT_FD_FREQ_SUPPORT.format("1"): "0",
+        modules_mgmt.SYSFS_INDEPENDENT_FD_FREQ_SUPPORT.format("2"): "0",
+        modules_mgmt.SYSFS_INDEPENDENT_FD_HW_RESET: "",
+        modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_LIMIT: "48",
+        modules_mgmt.SYSFS_LEGACY_FD_PRESENCE.format("0"): "1",
+        modules_mgmt.SYSFS_INDEPENDENT_FD_FW_CONTROL.format("0"): "1",
+        modules_mgmt.SYSFS_INDEPENDENT_FD_FW_CONTROL.format("1"): "1",
+        modules_mgmt.SYSFS_INDEPENDENT_FD_FW_CONTROL.format("2"): "1",
+        modules_mgmt.SYSFS_LEGACY_FD_PRESENCE: "1",
+        modules_mgmt.PROC_CMDLINE: ""
+    }
+
+
+mock_file_content = _mock_sysfs_default_file_content()
+
+
+class MockPoller:
+
+    def __init__(self, modules_mgmt_task_stopping_event, modules_mgmt_thrd=None, num_of_ports=3, port_plug_out=False
+                 , feature_enabled=True, warm_reboot=False, port_plug_in=False, sleep_timeout=False):
+        self.fds_dict = {}
+        self.poller_iteration_count = 0
+        self.modules_mgmt_task_stopping_event = modules_mgmt_task_stopping_event
+        self.modules_mgmt_thrd = modules_mgmt_thrd
+        self.num_of_ports = num_of_ports
+        self.port_plug_out = port_plug_out
+        self.port_plug_in = port_plug_in
+        self.feature_enabled = feature_enabled
+        self.warm_reboot = warm_reboot
+        self.port_plug_out_changed = False
+        self.port_plug_in_changed = False
+        self.sleep_timeout = sleep_timeout
+
+    def register(self, fd, attrs):
+        self.fds_dict[fd.fileno()] = { fd : attrs }
+        assert fd.fileno() in self.fds_dict
+
+    def unregister(self, fd):
+        if fd.fileno() in self.fds_dict.keys():
+            del self.fds_dict[fd.fileno()]
+        assert fd.fileno() not in self.fds_dict.keys()
+
+    def poll(self, timeout=1000):
+        global POLLER_EXECUTED
+        assert len(self.modules_mgmt_thrd.sfp_port_dict_initial) == self.num_of_ports
+        assert self.modules_mgmt_thrd.is_supported_indep_mods_system == self.feature_enabled
+        # counting the number of poller iterations to know when to do the checks after plug out (and plug in)
+        # have to check at least on iteration 7 to let ports reach final state
+        self.poller_iteration_count += 1
+        if self.num_of_ports > 0:
+            if not self.port_plug_out_changed:
+                if self.port_plug_out:
+                    # return first fd registered with some made up event number 870
+                    fd_no_to_return = list(self.fds_dict.keys())[0]
+                    fd = list(self.fds_dict[fd_no_to_return].keys())[0]
+                    fd.set_file_int_content(0)
+                    event_to_return = 870
+                    self.port_plug_out_changed = True
+                    return [(fd_no_to_return, event_to_return)]
+            if not self.port_plug_in_changed:
+                if self.port_plug_in:
+                    # return first fd registered with some made up event number 871
+                    fd_no_to_return = list(self.fds_dict.keys())[0]
+                    fd = list(self.fds_dict[fd_no_to_return].keys())[0]
+                    fd.set_file_int_content(1)
+                    event_to_return = 871
+                    self.port_plug_in_changed = True
+                    return [(fd_no_to_return, event_to_return)]
+            if 7 == self.poller_iteration_count:
+                # when feature is enabled, need to check for each port both power_good and hw_present sysfs for
+                # cmis non-flat memory cables
+                num_of_sysfs_to_check = self.num_of_ports if (not self.port_plug_out or not self.feature_enabled
+                                                              or self.warm_reboot) else self.num_of_ports * 2
+                for i in range(num_of_sysfs_to_check):
+                    # when feature is enabled, power_good sysfs is also registered for cmis non-flat memory cables
+                    # so each SW controlled port has 2 fds registered
+                    port_to_test = i if not self.feature_enabled else int(i / 2)
+                    assert self.modules_mgmt_thrd.sfp_port_dict_initial[port_to_test].port_num == port_to_test
+                    assert self.modules_mgmt_thrd.sfp_port_dict_initial[
+                               port_to_test].initial_state == modules_mgmt.STATE_HW_NOT_PRESENT
+                    if self.feature_enabled:
+                        module_obj = self.modules_mgmt_thrd.fds_mapping_to_obj[list(self.fds_dict.keys())[i]][
+                            'module_obj']
+                        assert module_obj.port_num == port_to_test
+                        if not self.warm_reboot:
+                            # in tests other than warm reboot it creates only SW control ports
+                            if not self.port_plug_out:
+                                assert module_obj.final_state == modules_mgmt.STATE_SW_CONTROL
+                            else:
+                                assert module_obj.final_state == modules_mgmt.STATE_HW_NOT_PRESENT
+                        else:
+                            if not self.port_plug_out:
+                                assert module_obj.final_state == modules_mgmt.STATE_HW_PRESENT
+                            # in warm reboot test with plug out plug in test creates only FW control ports
+                            elif self.port_plug_out and self.port_plug_in:
+                                assert module_obj.final_state == modules_mgmt.STATE_FW_CONTROL
+                            else:
+                                assert module_obj.final_state == modules_mgmt.STATE_HW_NOT_PRESENT
+                        POLLER_EXECUTED = True
+                self.modules_mgmt_task_stopping_event.set()
+        if self.sleep_timeout:
+            time.sleep(timeout/1000)
+        return []
+
+
+class MockOpen:
+
+    def __init__(self, name='', file_no=None, indep_mode_supported=True):
+        self.name = name
+        self.file_no = file_no
+        self.indep_mode_supported = indep_mode_supported
+        self.retint = None
+        self.curr = 0
+
+    def read(self):
+        if self.fileno() in [SAI_PROFILE_FD_FILENO]:
+            pass
+        else:
+            # if return value was changed, i.e. sysfs content changed from 1 to 0 to simulate plug out
+            if self.retint is not None:
+                return str(self.retint)
+            # return default values (can be changed per test)
+            else:
+                return mock_file_content[self.name]
+
+    def readline(self):
+        # if trying to read sai profile file, according to fd fileno
+        if self.fileno() in [SAI_PROFILE_FD_FILENO]:
+            if self.indep_mode_supported:
+                return "SAI_INDEPENDENT_MODULE_MODE=1"
+            else:
+                return ""
+        else:
+            return mock_file_content[self.name]
+
+    def fileno(self):
+        return self.file_no
+
+    def seek(self, seek_val):
+        self.curr = seek_val
+
+    def close(self):
+        pass
+
+    def write(self, write_val):
+        self.set_file_int_content(write_val)
+
+    def set_file_int_content(self, retint):
+        self.retint = str(retint)
+        mock_file_content[self.name] = str(retint)
+
+    def __enter__(self):
+        return self
+
+    def __exit__(self, filename, *args, **kwargs):
+        pass
+
+class MockPollerStopEvent:
+
+    def __init__(self, modules_mgmt_task_stopping_event, modules_mgmt_thrd=None, num_of_ports=DEFAULT_NUM_OF_PORTS_3
+                 , feature_enabled=True, ports_connected=True, fw_controlled_ports=False, sleep_timeout=False):
+        self.fds_dict = {}
+        self.modules_mgmt_task_stopping_event = modules_mgmt_task_stopping_event
+        self.modules_mgmt_thrd = modules_mgmt_thrd
+        self.num_of_ports = num_of_ports
+        self.feature_enabled = feature_enabled
+        self.ports_connected = ports_connected
+        self.sleep_timeout = sleep_timeout
+        self.fw_controlled_ports = fw_controlled_ports
+
+    def register(self, fd, attrs):
+        self.fds_dict[fd.fileno()] = 1 & attrs
+        assert fd.fileno() in self.fds_dict
+
+    def poll(self, timeout=0):
+        assert len(self.modules_mgmt_thrd.sfp_port_dict_initial) == self.num_of_ports
+        assert self.modules_mgmt_thrd.is_supported_indep_mods_system == self.feature_enabled
+        global POLLER_EXECUTED
+        if self.num_of_ports > 0:
+            # when feature is enabled, need to check for each port both power_good and hw_present sysfs for
+            # cmis non-flat memory cables
+            ports_to_test = self.num_of_ports if (not self.feature_enabled or not self.ports_connected
+                                                  or self.fw_controlled_ports) else self.num_of_ports * 2
+            for i in range(ports_to_test):
+                # when feature is enabled, power_good sysfs is also registered for cmis non-flat memory cables
+                port_to_test = i if (not self.feature_enabled or not self.ports_connected
+                                     or self.fw_controlled_ports) else int(i / 2)
+                assert self.modules_mgmt_thrd.sfp_port_dict_initial[port_to_test].port_num == port_to_test
+                assert self.modules_mgmt_thrd.sfp_port_dict_initial[port_to_test].initial_state == modules_mgmt.STATE_HW_NOT_PRESENT
+                module_obj = self.modules_mgmt_thrd.fds_mapping_to_obj[list(self.fds_dict.keys())[i]]['module_obj']
+                assert module_obj.port_num == port_to_test
+                if self.ports_connected:
+                    if self.feature_enabled:
+                        if self.fw_controlled_ports:
+                            assert module_obj.final_state == modules_mgmt.STATE_FW_CONTROL
+                        else:
+                            assert module_obj.final_state == modules_mgmt.STATE_SW_CONTROL
+                    else:
+                        assert module_obj.final_state == modules_mgmt.STATE_HW_PRESENT
+                else:
+                    assert module_obj.final_state == modules_mgmt.STATE_HW_NOT_PRESENT
+                POLLER_EXECUTED = True
+        else:
+            POLLER_EXECUTED = True
+        self.modules_mgmt_task_stopping_event.set()
+        if self.sleep_timeout:
+            time.sleep(timeout/1000)
+        return []
+
+
+def _mock_is_file_indep_mode_disabled_content():
+    return {
+        modules_mgmt.SYSFS_INDEPENDENT_FD_PRESENCE: True,
+        modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_GOOD: True,
+        modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_ON: True,
+        modules_mgmt.SYSFS_INDEPENDENT_FD_HW_RESET: True,
+        modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_LIMIT: True,
+        modules_mgmt.SYSFS_INDEPENDENT_FD_FW_CONTROL: True,
+        modules_mgmt.SYSFS_LEGACY_FD_PRESENCE.format("0"): True,
+        modules_mgmt.SYSFS_LEGACY_FD_PRESENCE.format("1"): True,
+        modules_mgmt.SYSFS_LEGACY_FD_PRESENCE.format("2"): True,
+        '//usr/share/sonic/platform/ACS-MSN4700/sai.profile' : True
+    }
+
+mock_is_file_indep_mode_disabled_content = _mock_is_file_indep_mode_disabled_content()
+
+def mock_is_file_indep_mode_disabled(file_path, **kwargs):
+    return mock_is_file_indep_mode_disabled_content[file_path]
+
+def _mock_is_file_indep_mode_enabled_content():
+    return {
+        modules_mgmt.SYSFS_INDEPENDENT_FD_PRESENCE: True,
+        modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_GOOD: True,
+        modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_ON: True,
+        modules_mgmt.SYSFS_INDEPENDENT_FD_HW_RESET: True,
+        modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_LIMIT: True,
+        modules_mgmt.SYSFS_INDEPENDENT_FD_FW_CONTROL: True,
+        modules_mgmt.SYSFS_LEGACY_FD_PRESENCE.format("0"): True,
+        modules_mgmt.SYSFS_INDEPENDENT_FD_PRESENCE.format("0"): True,
+        modules_mgmt.SYSFS_INDEPENDENT_FD_PRESENCE.format("1"): True,
+        modules_mgmt.SYSFS_INDEPENDENT_FD_PRESENCE.format("2"): True,
+        modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_GOOD.format("0"): True,
+        modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_GOOD.format("1"): True,
+        modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_GOOD.format("2"): True,
+        modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_ON.format("0"): True,
+        modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_ON.format("1"): True,
+        modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_ON.format("2"): True,
+        '//usr/share/sonic/platform/ACS-MSN4700/sai.profile'    :   True
+    }
+
+mock_is_file_indep_mode_enabled_content = _mock_is_file_indep_mode_enabled_content()
+
+
+def mock_is_file_indep_mode_enabled(file_path, **kwargs):
+    return mock_is_file_indep_mode_enabled_content[file_path]
+
+
+def mock_read_int_from_file(filename, *args):
+    return_dict = {
+        modules_mgmt.SYSFS_LEGACY_FD_PRESENCE.format("0") : 1,
+        modules_mgmt.SYSFS_LEGACY_FD_PRESENCE.format("1") : 1,
+        modules_mgmt.SYSFS_LEGACY_FD_PRESENCE.format("2") : 1
+    }
+
+    return return_dict[filename]
+
+
+class MockXcvrEeprom():
+    def __init__(self, is_flat_memory, mem_map):
+        self.is_flat_memory = is_flat_memory
+        self.mem_map = mem_map
+
+    def is_cmis_api(self):
+        return self.is_cmis_api
+
+    def is_flat_memory(self):
+        return self.is_flat_memory
+
+    def read(self, field):
+        if consts.FLAT_MEM_FIELD == field:
+            return 0 if self.is_flat_memory else 1
+        else:
+            return 0
+
+
+class MockXcvrapi:
+    def __init__(self, is_cmis_api=True, is_flat_memory_bool=False):
+        self.is_cmis_api = is_cmis_api
+        self.is_flat_memory_bool = is_flat_memory_bool
+        self.xcvr_eeprom = MagicMock(autospec=XcvrEeprom, return_value=MockXcvrEeprom(is_flat_memory_bool, CmisMemMap(CmisCodes)))
+
+    def is_flat_memory(self):
+        return self.is_flat_memory_bool
+
+    def xcvr_eeprom(self):
+        return self.xcvr_eeprom
+
+
+class MockSFPxcvrapi:
+    def __init__(self, xcvr_api_is_cmis_api=True, xcvr_eeprom_is_flat_memory=False):
+        self.xcvr_api = Mock(spec=CmisApi(MockXcvrEeprom(False, CmisMemMap(CmisCodes))), return_value=MockXcvrapi(xcvr_api_is_cmis_api, xcvr_eeprom_is_flat_memory))
+        self.xcvr_api_is_cmis_api = xcvr_api_is_cmis_api
+        self.xcvr_eeprom_is_flat_memory = xcvr_eeprom_is_flat_memory
+        self.xcvr_api.is_flat_memory = types.MethodType(self.is_flat_memory, self)
+
+    def get_xcvr_api(self):
+        return self.xcvr_api
+
+    def is_flat_memory(self, ref):
+        return self.xcvr_eeprom_is_flat_memory
+
+
+def check_power_cap(port, module_sm_obj):
+    pass
+
+SAI_PROFILE_FD_FILENO = 99
+
+
+class TestModulesMgmt(unittest.TestCase):
+    """Test class to test modules_mgmt.py. The test cases covers:
+        1. cables detection for 1 to 3 ports - feature disabled / enabled / poller
+        2. cable disconnection - plug out
+        3. cable reconnection - plug in
+        4. warm reboot normal flow with FW ports
+        5. warm reboot flow with FW ports plugged out
+        6. warm reboot flow with FW ports plugged out and then plugged in (stays FW controlled, no SFP mock change)
+        7. test 32 FW controlled (non cmis flat mem) cables powered off
+        8. test 32 SW controlled (cmis active non flat mem) cables powered off
+    """
+
+    def _mock_sysfs_file_content(self):
+        return {
+            modules_mgmt.SYSFS_INDEPENDENT_FD_PRESENCE : "1",
+            modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_GOOD : "1",
+            modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_ON : "0",
+            modules_mgmt.SYSFS_INDEPENDENT_FD_HW_RESET : "",
+            modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_LIMIT : "48",
+            modules_mgmt.SYSFS_INDEPENDENT_FD_FW_CONTROL : "1",
+            modules_mgmt.SYSFS_LEGACY_FD_PRESENCE.format("0") : "1",
+            modules_mgmt.SYSFS_LEGACY_FD_PRESENCE.format("1") : "1",
+            modules_mgmt.SYSFS_LEGACY_FD_PRESENCE.format("2") : "1",
+            modules_mgmt.SYSFS_INDEPENDENT_FD_FREQ_SUPPORT.format("0"): "0"
+        }
+
+    def mock_open_builtin(self, file_name, feature_enabled=True):
+        return_dict = {
+            (modules_mgmt.SYSFS_LEGACY_FD_PRESENCE.format("0"), 'r') : MockOpen(modules_mgmt.SYSFS_LEGACY_FD_PRESENCE.format("0"), 100),
+            (modules_mgmt.SYSFS_LEGACY_FD_PRESENCE.format("1"), 'r') : MockOpen(modules_mgmt.SYSFS_LEGACY_FD_PRESENCE.format("1"), 101),
+            (modules_mgmt.SYSFS_LEGACY_FD_PRESENCE.format("2"), 'r') : MockOpen(modules_mgmt.SYSFS_LEGACY_FD_PRESENCE.format("2"), 102),
+            '//usr/share/sonic/platform/ACS-MSN4700/sai.profile' : MockOpen('//usr/share/sonic/platform/ACS-MSN4700/sai.profile'
+                                                                            , SAI_PROFILE_FD_FILENO, feature_enabled),
+            modules_mgmt.SYSFS_LEGACY_FD_PRESENCE.format("0") : MockOpen(modules_mgmt.SYSFS_LEGACY_FD_PRESENCE.format("0"), 100),
+            modules_mgmt.SYSFS_LEGACY_FD_PRESENCE.format("1") : MockOpen(modules_mgmt.SYSFS_LEGACY_FD_PRESENCE.format("1"), 101),
+            modules_mgmt.SYSFS_LEGACY_FD_PRESENCE.format("2") : MockOpen(modules_mgmt.SYSFS_LEGACY_FD_PRESENCE.format("2"), 102),
+            modules_mgmt.SYSFS_INDEPENDENT_FD_PRESENCE.format("0"): MockOpen(modules_mgmt.SYSFS_INDEPENDENT_FD_PRESENCE.format("0"), 0),
+            modules_mgmt.SYSFS_INDEPENDENT_FD_PRESENCE.format("1"): MockOpen(modules_mgmt.SYSFS_INDEPENDENT_FD_PRESENCE.format("1"), 1),
+            modules_mgmt.SYSFS_INDEPENDENT_FD_PRESENCE.format("2"): MockOpen(modules_mgmt.SYSFS_INDEPENDENT_FD_PRESENCE.format("2"), 2),
+            modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_GOOD.format("0"): MockOpen(modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_GOOD.format("0"), 200),
+            modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_GOOD.format("1"): MockOpen(modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_GOOD.format("1"), 201),
+            modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_GOOD.format("2"): MockOpen(modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_GOOD.format("2"), 202),
+            modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_ON.format("0"): MockOpen(modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_ON.format("0"), 300),
+            modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_ON.format("1"): MockOpen(modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_ON.format("1"), 301),
+            modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_ON.format("2"): MockOpen(modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_ON.format("2"), 302),
+            modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_LIMIT.format("0"): MockOpen(modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_LIMIT.format("0"), 500),
+            modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_LIMIT.format("1"): MockOpen(modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_LIMIT.format("1"), 501),
+            modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_LIMIT.format("2"): MockOpen(modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_LIMIT.format("2"), 502),
+            modules_mgmt.SYSFS_INDEPENDENT_FD_FREQ_SUPPORT.format("0"): MockOpen(modules_mgmt.SYSFS_INDEPENDENT_FD_FREQ_SUPPORT.format("0"), 602),
+            modules_mgmt.SYSFS_INDEPENDENT_FD_FREQ_SUPPORT.format("1"): MockOpen(modules_mgmt.SYSFS_INDEPENDENT_FD_FREQ_SUPPORT.format("1"), 602),
+            modules_mgmt.SYSFS_INDEPENDENT_FD_FREQ_SUPPORT.format("2"): MockOpen(modules_mgmt.SYSFS_INDEPENDENT_FD_FREQ_SUPPORT.format("2"), 602),
+            modules_mgmt.PROC_CMDLINE: MockOpen(modules_mgmt.PROC_CMDLINE, self.fd_number_by_fd_name_dict[modules_mgmt.PROC_CMDLINE])
+        }
+        return return_dict[file_name]
+
+    # side effects are used in mock when want to create different mocks per variable, i.e. here it's filename
+    # see below mock_open_new_side_effect_poller_test where returning a new MockOpen passing it the filename
+    def mock_open_new_side_effect_feature_disabled(self, filename, *args, **kwargs):
+        mock_context = MagicMock()
+        mock_context.__enter__.return_value = self.mock_open_builtin(filename, False)
+        mock_context.__exit__.return_value = False
+        return mock_context
+
+    def mock_open_new_side_effect_feature_enabled(self, filename, *args, **kwargs):
+        mock_context = MagicMock()
+        mock_context.__enter__.return_value = self.mock_open_builtin(filename)
+        mock_context.__exit__.return_value = False
+        return mock_context
+
+    def mock_open_new_side_effect_poller_test(self, filename, *args, **kwargs):
+        if filename in ['//usr/share/sonic/platform/ACS-MSN4700/sai.profile']:
+            mock_context = MagicMock()
+            mock_context.__enter__.return_value = MockOpen(filename, SAI_PROFILE_FD_FILENO)
+            mock_context.__exit__.return_value = False
+            return mock_context
+        else:
+            mock_context = MagicMock()
+            mock_open_new = MockOpen(filename, self.fd_number_by_fd_name_dict[filename])
+            mock_context.return_value = mock_open_new
+            mock_context.__enter__.return_value = mock_open_new
+            mock_context.__exit__.return_value = False
+            if 'hw_present' in filename or 'power_on' in filename or 'freq' in filename or 'control' in filename:
+                return mock_context
+            else:
+                return mock_context.return_value
+
+    def mock_open_new_side_effect_warm_reboot(self, filename, *args, **kwargs):
+        if filename in ['//usr/share/sonic/platform/ACS-MSN4700/sai.profile']:
+            mock_context = MagicMock()
+            mock_context.__enter__.return_value = MockOpen(filename, SAI_PROFILE_FD_FILENO)
+            mock_context.__exit__.return_value = False
+            return mock_context
+        else:
+            mock_open_new = MockOpen(filename, self.fd_number_by_fd_name_dict[filename])
+            return mock_open_new
+
+    def setUp(cls):
+        cls.modules_mgmt_task_stopping_event = threading.Event()
+        cls.modules_changes_queue = queue.Queue()
+        global POLLER_EXECUTED
+        POLLER_EXECUTED = False
+        # start modules_mgmt thread and the test in poller part
+        cls.modules_mgmt_thrd = ModulesMgmtTask(main_thread_stop_event=cls.modules_mgmt_task_stopping_event,
+                                            q=cls.modules_changes_queue)
+        cls.modules_mgmt_thrd.check_power_cap = check_power_cap
+        assert cls.modules_mgmt_thrd.sfp_port_dict_initial == {}
+
+    @classmethod
+    def setup_class(cls):
+        os.environ["MLNX_PLATFORM_API_UNIT_TESTING"] = "1"
+        cls.fd_number_by_fd_name_dict = {
+                modules_mgmt.SYSFS_LEGACY_FD_PRESENCE.format("0") : 100,
+                modules_mgmt.SYSFS_LEGACY_FD_PRESENCE.format("1") : 101,
+                modules_mgmt.SYSFS_LEGACY_FD_PRESENCE.format("2") : 102,
+                '//usr/share/sonic/platform/ACS-MSN4700/sai.profile' : SAI_PROFILE_FD_FILENO,
+                modules_mgmt.SYSFS_INDEPENDENT_FD_PRESENCE.format("0") : 0,
+                modules_mgmt.SYSFS_INDEPENDENT_FD_PRESENCE.format("1") : 1,
+                modules_mgmt.SYSFS_INDEPENDENT_FD_PRESENCE.format("2") : 2,
+                modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_GOOD.format("0") : 200,
+                modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_GOOD.format("1") : 201,
+                modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_GOOD.format("2") : 202,
+                modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_ON.format("0") : 300,
+                modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_ON.format("1") : 301,
+                modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_ON.format("2") : 302,
+                modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_LIMIT.format("0") : 500,
+                modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_LIMIT.format("1") : 501,
+                modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_LIMIT.format("2") : 502,
+                modules_mgmt.SYSFS_INDEPENDENT_FD_FREQ_SUPPORT.format("0") : 600,
+                modules_mgmt.SYSFS_INDEPENDENT_FD_FREQ_SUPPORT.format("1") : 601,
+                modules_mgmt.SYSFS_INDEPENDENT_FD_FREQ_SUPPORT.format("2") : 602,
+                modules_mgmt.SYSFS_INDEPENDENT_FD_FW_CONTROL.format("0") : 700,
+                modules_mgmt.SYSFS_INDEPENDENT_FD_FW_CONTROL.format("1") : 701,
+                modules_mgmt.SYSFS_INDEPENDENT_FD_FW_CONTROL.format("2") : 702,
+                modules_mgmt.PROC_CMDLINE : 800
+        }
+        # mock the directory holding relevant sai.profile
+        device_info.get_paths_to_platform_and_hwsku_dirs = mock.MagicMock(return_value=('', '/usr/share/sonic/platform/ACS-MSN4700'))
+
+
+    @patch('sonic_platform.device_data.DeviceDataManager.get_sfp_count', MagicMock(return_value=DEFAULT_NUM_OF_PORTS_3))
+    @patch('os.path.isfile', MagicMock(side_effect=mock_is_file_indep_mode_disabled))
+    @patch('sonic_platform.utils.read_int_from_file', MagicMock(side_effect=mock_read_int_from_file))
+    @patch('builtins.open', spec=open)
+    def test_mdf_all_ports_feature_disabled(self, mock_open):
+        mock_open.side_effect = self.mock_open_new_side_effect_feature_disabled
+        num_of_tested_ports = DeviceDataManager.get_sfp_count()
+        assert num_of_tested_ports == DEFAULT_NUM_OF_PORTS_3
+
+        # start modules_mgmt thread and the test in poller part
+        with patch('select.poll', MagicMock(return_value=MockPollerStopEvent(self.modules_mgmt_task_stopping_event
+                                                                    , self.modules_mgmt_thrd, feature_enabled=False))):
+            self.modules_mgmt_thrd.run()
+
+    @patch('sonic_platform.device_data.DeviceDataManager.get_sfp_count', MagicMock(return_value=DEFAULT_NUM_OF_PORTS_3))
+    @patch('os.path.isfile', MagicMock(side_effect=mock_is_file_indep_mode_enabled))
+    @patch('builtins.open', spec=open)
+    @patch('sonic_platform.sfp.SFP', MagicMock(return_value=MockSFPxcvrapi()))
+    def test_mdf_all_ports_feature_enabled(self, mock_open):
+        mock_open.side_effect = self.mock_open_new_side_effect_feature_enabled
+        num_of_tested_ports = DeviceDataManager.get_sfp_count()
+        assert num_of_tested_ports == DEFAULT_NUM_OF_PORTS_3
+
+        # start modules_mgmt thread and the test in poller part
+        with patch('select.poll', MagicMock(return_value=MockPollerStopEvent(self.modules_mgmt_task_stopping_event
+                , self.modules_mgmt_thrd))):
+            self.modules_mgmt_thrd.run()
+
+    @patch('os.path.isfile', MagicMock(side_effect=mock_is_file_indep_mode_enabled))
+    @patch('builtins.open', spec=open)
+    @patch('sonic_platform.sfp.SFP', MagicMock(return_value=MockSFPxcvrapi()))
+    def test_modules_mgmt_poller_events_3_ports(self, mock_open):
+        mock_open.side_effect = self.mock_open_new_side_effect_poller_test
+        DeviceDataManager.get_sfp_count = mock.MagicMock(return_value=DEFAULT_NUM_OF_PORTS_3)
+        num_of_tested_ports = DeviceDataManager.get_sfp_count()
+        assert num_of_tested_ports == DEFAULT_NUM_OF_PORTS_3
+
+        # start modules_mgmt thread and the test in poller part
+        with patch('select.poll', MagicMock(return_value=MockPollerStopEvent(self.modules_mgmt_task_stopping_event
+                , self.modules_mgmt_thrd))):
+            self.modules_mgmt_thrd.run()
+
+    @patch('os.path.isfile', MagicMock(side_effect=mock_is_file_indep_mode_enabled))
+    @patch('builtins.open', spec=open)
+    @patch('sonic_platform.sfp.SFP', MagicMock(return_value=MockSFPxcvrapi()))
+    def test_modules_mgmt_poller_events_single_port(self, mock_open):
+        mock_open.side_effect = self.mock_open_new_side_effect_poller_test
+        DeviceDataManager.get_sfp_count = mock.MagicMock(return_value=DEFAULT_NUM_OF_PORTS_1)
+        num_of_tested_ports = DeviceDataManager.get_sfp_count()
+        assert num_of_tested_ports == DEFAULT_NUM_OF_PORTS_1
+
+        # start modules_mgmt thread and the test in poller part
+        with patch('select.poll', MagicMock(return_value=MockPollerStopEvent(self.modules_mgmt_task_stopping_event
+                , self.modules_mgmt_thrd, num_of_tested_ports))):
+            #with patch('builtins.open', MagicMock(side_effect=self.mock_open_new_side_effect_poller_test)):
+            self.modules_mgmt_thrd.run()
+
+    @patch('os.path.isfile', MagicMock(side_effect=mock_is_file_indep_mode_enabled))
+    @patch('builtins.open', spec=open)
+    @patch('sonic_platform.sfp.SFP', MagicMock(return_value=MockSFPxcvrapi(False, True)))
+    def test_modules_mgmt_normal_warm_reboot(self, mock_open):
+        mock_open.side_effect = self.mock_open_new_side_effect_warm_reboot
+        # mock /proc/cmdline with warm reboot boot type key value
+        mock_file_content[modules_mgmt.PROC_CMDLINE] = f'{modules_mgmt.CMDLINE_STR_TO_LOOK_FOR}{modules_mgmt.CMDLINE_VAL_TO_LOOK_FOR}'
+        DeviceDataManager.get_sfp_count = mock.MagicMock(return_value=DEFAULT_NUM_OF_PORTS_1)
+        num_of_tested_ports = DeviceDataManager.get_sfp_count()
+        assert num_of_tested_ports == DEFAULT_NUM_OF_PORTS_1
+        # set the port to start with FW controlled before warm reboot takes place
+        mock_file_content[modules_mgmt.SYSFS_INDEPENDENT_FD_FW_CONTROL.format("0")] = "0"
+
+        # start modules_mgmt thread and the test in poller part
+        with patch('select.poll', MagicMock(return_value=MockPoller(self.modules_mgmt_task_stopping_event
+                , self.modules_mgmt_thrd, num_of_tested_ports, warm_reboot=True))):
+            self.modules_mgmt_thrd.run()
+
+    @patch('os.path.isfile', MagicMock(side_effect=mock_is_file_indep_mode_enabled))
+    @patch('builtins.open', spec=open)
+    @patch('sonic_platform.sfp.SFP', MagicMock(return_value=MockSFPxcvrapi(False, True)))
+    def test_modules_mgmt_plug_out_fw_cable_after_warm_reboot(self, mock_open):
+        mock_open.side_effect = self.mock_open_new_side_effect_warm_reboot
+        # mock /proc/cmdline with warm reboot boot type key value
+        mock_file_content[modules_mgmt.PROC_CMDLINE] = f'{modules_mgmt.CMDLINE_STR_TO_LOOK_FOR}{modules_mgmt.CMDLINE_VAL_TO_LOOK_FOR}'
+        DeviceDataManager.get_sfp_count = mock.MagicMock(return_value=DEFAULT_NUM_OF_PORTS_1)
+        num_of_tested_ports = DeviceDataManager.get_sfp_count()
+        assert num_of_tested_ports == DEFAULT_NUM_OF_PORTS_1
+
+        # set the port to start with FW controlled before warm reboot takes place
+        mock_file_content[modules_mgmt.SYSFS_INDEPENDENT_FD_FW_CONTROL.format("0")] = "0"
+
+        # start modules_mgmt thread and the test in poller part
+        with patch('select.poll', MagicMock(return_value=MockPoller(self.modules_mgmt_task_stopping_event
+                , self.modules_mgmt_thrd, num_of_tested_ports, port_plug_out=True, warm_reboot=True))):
+            self.modules_mgmt_thrd.run()
+
+    @patch('os.path.isfile', MagicMock(side_effect=mock_is_file_indep_mode_enabled))
+    @patch('builtins.open', spec=open)
+    @patch('sonic_platform.sfp.SFP', MagicMock(return_value=MockSFPxcvrapi(False, True)))
+    def test_modules_mgmt_plug_out_plug_in_fw_cable_after_warm_reboot(self, mock_open):
+        mock_open.side_effect = self.mock_open_new_side_effect_warm_reboot
+        # mock /proc/cmdline with warm reboot boot type key value
+        mock_file_content[modules_mgmt.PROC_CMDLINE] = f'{modules_mgmt.CMDLINE_STR_TO_LOOK_FOR}{modules_mgmt.CMDLINE_VAL_TO_LOOK_FOR}'
+        DeviceDataManager.get_sfp_count = mock.MagicMock(return_value=DEFAULT_NUM_OF_PORTS_1)
+        num_of_tested_ports = DeviceDataManager.get_sfp_count()
+        assert num_of_tested_ports == DEFAULT_NUM_OF_PORTS_1
+
+        mock_file_content[modules_mgmt.SYSFS_INDEPENDENT_FD_FW_CONTROL.format("0")] = "0"
+
+        # start modules_mgmt thread and the test in poller part
+        with patch('select.poll', MagicMock(return_value=MockPoller(self.modules_mgmt_task_stopping_event
+                , self.modules_mgmt_thrd, num_of_tested_ports, port_plug_out=True, warm_reboot=True, port_plug_in=True))):
+            self.modules_mgmt_thrd.run()
+
+    @patch('os.path.isfile', MagicMock(side_effect=mock_is_file_indep_mode_enabled))
+    @patch('builtins.open', spec=open)
+    @patch('sonic_platform.sfp.SFP', MagicMock(return_value=MockSFPxcvrapi(False, True)))
+    def test_modules_mgmt_no_ports(self, mock_open):
+        mock_open.side_effect = self.mock_open_new_side_effect_poller_test
+        DeviceDataManager.get_sfp_count = mock.MagicMock(return_value=0)
+        num_of_tested_ports = DeviceDataManager.get_sfp_count()
+        assert num_of_tested_ports == 0
+
+        # start modules_mgmt thread and the test in poller part
+        with patch('select.poll', MagicMock(return_value=MockPollerStopEvent(self.modules_mgmt_task_stopping_event
+                , self.modules_mgmt_thrd, num_of_tested_ports))):
+            self.modules_mgmt_thrd.run()
+
+    @patch('os.path.isfile', MagicMock(side_effect=mock_is_file_indep_mode_enabled))
+    @patch('builtins.open', spec=open)
+    @patch('sonic_platform.sfp.SFP', MagicMock(return_value=MockSFPxcvrapi(False, True)))
+    def test_modules_mgmt_ports_disconnected(self, mock_open):
+        mock_open.side_effect = self.mock_open_new_side_effect_poller_test
+        DeviceDataManager.get_sfp_count = mock.MagicMock(return_value=DEFAULT_NUM_OF_PORTS_3)
+        num_of_tested_ports = DeviceDataManager.get_sfp_count()
+        assert num_of_tested_ports == DEFAULT_NUM_OF_PORTS_3
+
+        # update hw_present sysfs with value of 0 for each port
+        for i in range(num_of_tested_ports):
+            modules_sysfs = modules_mgmt.SYSFS_INDEPENDENT_FD_PRESENCE.format(f"{i}")
+            mock_file_content[modules_sysfs] = "0"
+
+        # start modules_mgmt thread and the test in poller part
+        with patch('select.poll', MagicMock(return_value=MockPollerStopEvent(self.modules_mgmt_task_stopping_event
+                , self.modules_mgmt_thrd, num_of_tested_ports, ports_connected=False))):
+            self.modules_mgmt_thrd.run()
+
+    @patch('os.path.isfile', MagicMock(side_effect=mock_is_file_indep_mode_enabled))
+    @patch('builtins.open', spec=open)
+    @patch('sonic_platform.sfp.SFP', MagicMock(return_value=MockSFPxcvrapi(False, True)))
+    def test_modules_mgmt_bad_flows_port_disconnected(self, mock_open):
+        mock_open.side_effect = self.mock_open_new_side_effect_poller_test
+        DeviceDataManager.get_sfp_count = mock.MagicMock(return_value=DEFAULT_NUM_OF_PORTS_1)
+        num_of_tested_ports = DeviceDataManager.get_sfp_count()
+        assert num_of_tested_ports == DEFAULT_NUM_OF_PORTS_1
+
+        # update hw_present sysfs with value of 0 for each port
+        for i in range(num_of_tested_ports):
+            modules_sysfs = modules_mgmt.SYSFS_INDEPENDENT_FD_PRESENCE.format(f"{i}")
+            mock_file_content[modules_sysfs] = "0"
+
+        # start modules_mgmt thread and the test in poller part
+        with patch('select.poll', MagicMock(return_value=MockPollerStopEvent(self.modules_mgmt_task_stopping_event
+                , self.modules_mgmt_thrd, num_of_tested_ports, ports_connected=False))):
+            self.modules_mgmt_thrd.run()
+
+    @patch('os.path.isfile', MagicMock(side_effect=mock_is_file_indep_mode_enabled))
+    @patch('builtins.open', spec=open)
+    @patch('sonic_platform.sfp.SFP', MagicMock(return_value=MockSFPxcvrapi(False, True)))
+    def test_modules_mgmt_bad_flows_power_good(self, mock_open):
+        mock_open.side_effect = self.mock_open_new_side_effect_poller_test
+        DeviceDataManager.get_sfp_count = mock.MagicMock(return_value=DEFAULT_NUM_OF_PORTS_1)
+        num_of_tested_ports = DeviceDataManager.get_sfp_count()
+        assert num_of_tested_ports == DEFAULT_NUM_OF_PORTS_1
+
+        # update power_good sysfs with value of 0 for each port
+        for i in range(num_of_tested_ports):
+            modules_sysfs = modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_GOOD.format(f"{i}")
+            mock_file_content[modules_sysfs] = "0"
+
+        # start modules_mgmt thread and the test in poller part
+        with patch('select.poll', MagicMock(return_value=MockPollerStopEvent(self.modules_mgmt_task_stopping_event
+                , self.modules_mgmt_thrd, num_of_tested_ports, ports_connected=False))):
+            self.modules_mgmt_thrd.run()
+        for i in range(num_of_tested_ports):
+            modules_sysfs = modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_GOOD.format(f"{i}")
+            mock_file_content[modules_sysfs] = "1"
+
+    @patch('os.path.isfile', MagicMock(side_effect=mock_is_file_indep_mode_enabled))
+    @patch('builtins.open', spec=open)
+    @patch('sonic_platform.sfp.SFP', MagicMock(return_value=MockSFPxcvrapi(False, True)))
+    def test_modules_mgmt_bad_flows_ports_powered_off_fw_controlled(self, mock_open):
+        mock_open.side_effect = self.mock_open_new_side_effect_poller_test
+        DeviceDataManager.get_sfp_count = mock.MagicMock(return_value=DEFAULT_NUM_OF_PORTS_32)
+        num_of_tested_ports = DeviceDataManager.get_sfp_count()
+        assert num_of_tested_ports == DEFAULT_NUM_OF_PORTS_32
+
+        # create or update different sysfs and is_file mocking with relevant value for each port
+        for i in range(num_of_tested_ports):
+            # mock power_on sysfs for all ports
+            modules_sysfs = modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_ON.format(f"{i}")
+            mock_file_content[modules_sysfs] = "0"
+            mock_is_file_indep_mode_enabled_content[modules_sysfs] = True
+            self.fd_number_by_fd_name_dict[modules_sysfs] = 300 + i
+            # mock hw_presence sysfs for all ports
+            modules_sysfs = modules_mgmt.SYSFS_INDEPENDENT_FD_PRESENCE.format(f'{i}')
+            mock_file_content[modules_sysfs] = "1"
+            mock_is_file_indep_mode_enabled_content[modules_sysfs] = True
+            self.fd_number_by_fd_name_dict[modules_sysfs] = i
+            # mock power_good sysfs for all ports
+            modules_sysfs = modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_GOOD.format(f'{i}')
+            mock_file_content[modules_sysfs] = "1"
+            mock_is_file_indep_mode_enabled_content[modules_sysfs] = True
+            self.fd_number_by_fd_name_dict[modules_sysfs] = 200 + i
+            # mock hw_reset sysfs for all ports
+            modules_sysfs = modules_mgmt.SYSFS_INDEPENDENT_FD_HW_RESET.format(f'{i}')
+            mock_is_file_indep_mode_enabled_content[modules_sysfs] = True
+            self.fd_number_by_fd_name_dict[modules_sysfs] = 400 + i
+
+        # start modules_mgmt thread and the test in poller part
+        with patch('select.poll', MagicMock(return_value=MockPollerStopEvent(self.modules_mgmt_task_stopping_event
+                , self.modules_mgmt_thrd, num_of_tested_ports, fw_controlled_ports=True))):
+            self.modules_mgmt_thrd.run()
+
+        # change power_on sysfs values back to the default ones
+        for i in range(num_of_tested_ports):
+            modules_sysfs = modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_ON.format(f"{i}")
+            mock_file_content[modules_sysfs] = "1"
+
+    @patch('os.path.isfile', MagicMock(side_effect=mock_is_file_indep_mode_enabled))
+    @patch('builtins.open', spec=open)
+    @patch('sonic_platform.sfp.SFP', MagicMock(return_value=MockSFPxcvrapi()))
+    def test_modules_mgmt_bad_flows_ports_powered_off_sw_controlled(self, mock_open):
+        mock_open.side_effect = self.mock_open_new_side_effect_poller_test
+        DeviceDataManager.get_sfp_count = mock.MagicMock(return_value=DEFAULT_NUM_OF_PORTS_32)
+        num_of_tested_ports = DeviceDataManager.get_sfp_count()
+        assert num_of_tested_ports == DEFAULT_NUM_OF_PORTS_32
+
+        # create or update different sysfs and is_file mocking with relevant value for each port
+        for i in range(num_of_tested_ports):
+            # mock power_on sysfs for all ports
+            modules_sysfs = modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_ON.format(f"{i}")
+            mock_file_content[modules_sysfs] = "0"
+            mock_is_file_indep_mode_enabled_content[modules_sysfs] = True
+            self.fd_number_by_fd_name_dict[modules_sysfs] = 300 + i
+            # mock hw_presence sysfs for all ports
+            modules_sysfs = modules_mgmt.SYSFS_INDEPENDENT_FD_PRESENCE.format(f'{i}')
+            mock_file_content[modules_sysfs] = "1"
+            mock_is_file_indep_mode_enabled_content[modules_sysfs] = True
+            self.fd_number_by_fd_name_dict[modules_sysfs] = i
+            # mock power_good sysfs for all ports
+            modules_sysfs = modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_GOOD.format(f'{i}')
+            mock_file_content[modules_sysfs] = "1"
+            mock_is_file_indep_mode_enabled_content[modules_sysfs] = True
+            self.fd_number_by_fd_name_dict[modules_sysfs] = 200 + i
+            # mock hw_reset sysfs for all ports
+            modules_sysfs = modules_mgmt.SYSFS_INDEPENDENT_FD_HW_RESET.format(f'{i}')
+            mock_is_file_indep_mode_enabled_content[modules_sysfs] = True
+            self.fd_number_by_fd_name_dict[modules_sysfs] = 400 + i
+            # mock frequency_support sysfs for all ports
+            modules_sysfs = modules_mgmt.SYSFS_INDEPENDENT_FD_FREQ_SUPPORT.format(f'{i}')
+            mock_file_content[modules_sysfs] = "0"
+            mock_is_file_indep_mode_enabled_content[modules_sysfs] = True
+            self.fd_number_by_fd_name_dict[modules_sysfs] = 600 + i
+
+        # start modules_mgmt thread and the test in poller part
+        with patch('select.poll', MagicMock(return_value=MockPollerStopEvent(self.modules_mgmt_task_stopping_event
+                , self.modules_mgmt_thrd, num_of_tested_ports))):
+            self.modules_mgmt_thrd.run()
+
+        # change power_on sysfs values back to the default ones
+        for i in range(num_of_tested_ports):
+            modules_sysfs = modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_ON.format(f"{i}")
+            mock_file_content[modules_sysfs] = "1"
+
+    def tearDown(cls):
+        mock_file_content[modules_mgmt.PROC_CMDLINE] = ''
+        cls.modules_mgmt_thrd = None
+        # a check that modules mgmt thread ran and got into the poller part where the tests here has all checks
+        assert POLLER_EXECUTED

From 4cbb559fd1f4f7e521998a4b5d2df5a72dd4e1c6 Mon Sep 17 00:00:00 2001
From: Hua Liu <58683130+liuh-80@users.noreply.github.com>
Date: Thu, 21 Mar 2024 12:28:39 +0800
Subject: [PATCH 0347/1115] Fix tacacs local accounting break. (#18357)

Fix TACACS local accounting disabled when debug flag disabled.

#### Why I did it
TACACS local accounting use trace() method to output local accounting log, following PR disable trace log when debug flag disabled,
https://github.com/sonic-net/sonic-buildimage/pull/16482

Because test case issue, this regression not found. the issue only exists on master branch.

### How I did it
Fix TACACS local accounting disabled when debug flag disabled.

#### How to verify it
Pass all UT.
Fix TACACS accounting UT to prevent regression.

### Tested branch (Please provide the tested image version)

- [] SONiC.master-16482.360728-2c8b4066f

#### Description for the changelog
Fix TACACS local accounting disabled when debug flag disabled.
---
 src/tacacs/audisp/patches/0003-Add-local-accounting.patch | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/tacacs/audisp/patches/0003-Add-local-accounting.patch b/src/tacacs/audisp/patches/0003-Add-local-accounting.patch
index 1883f5591..00f7b1349 100644
--- a/src/tacacs/audisp/patches/0003-Add-local-accounting.patch
+++ b/src/tacacs/audisp/patches/0003-Add-local-accounting.patch
@@ -70,12 +70,12 @@ index 0000000..e23acec
 +#include "trace.h"
 +
 +/* Accounting log format. */
-+#define ACCOUNTING_LOG_FORMAT "Accounting: user: %s, tty: %s, host: %s, command: %s, type: %d, task ID: %d"
++#define ACCOUNTING_LOG_FORMAT "Audisp-tacplus: Accounting: user: %s, tty: %s, host: %s, command: %s, type: %d, task ID: %d"
 +
 +/* Write the accounting information to syslog. */
 +void accounting_to_syslog(char *user, char *tty, char *host, char *cmdmsg, int type, uint16_t task_id)
 +{
-+    trace(ACCOUNTING_LOG_FORMAT, user, tty, host, cmdmsg, type, task_id);
++    syslog(LOG_INFO, ACCOUNTING_LOG_FORMAT, user, tty, host, cmdmsg, type, task_id);
 +}
 \ No newline at end of file
 diff --git a/local_accounting.h b/local_accounting.h

From 2468dfad71ced1a6adab12e2ddf616d67b91da7c Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Thu, 21 Mar 2024 19:00:57 +0800
Subject: [PATCH 0348/1115] [submodule] Update submodule sonic-platform-daemons
 to the latest HEAD automatically (#18410)

#### Why I did it
src/sonic-platform-daemons
```
* 2770fd2 - (HEAD -> master, origin/master, origin/HEAD) Disable periodic polling of port in DomInfoUpdateTask thread during CMIS init (#449) (5 hours ago) [mihirpat1]
* d513eca - Added support for file system based sensors implementation. (#438) (22 hours ago) [Mridul Bajpai]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-platform-daemons | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-platform-daemons b/src/sonic-platform-daemons
index 04b0f88d0..2770fd2c7 160000
--- a/src/sonic-platform-daemons
+++ b/src/sonic-platform-daemons
@@ -1 +1 @@
-Subproject commit 04b0f88d06537f934ca1ebb853ba00609650274b
+Subproject commit 2770fd2c7909ae031d72066530559f4b2e3ea23c

From 2ee5c05e750fd5e2a1f5a977e2b505efb933a6b1 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Thu, 21 Mar 2024 19:01:03 +0800
Subject: [PATCH 0349/1115] [submodule] Update submodule sonic-platform-common
 to the latest HEAD automatically (#18409)

#### Why I did it
src/sonic-platform-common
```
* 2606cd5 - (HEAD -> master, origin/master, origin/HEAD) Add flag to read partial VDM (#397) (22 hours ago) [ChiouRung Haung]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-platform-common | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-platform-common b/src/sonic-platform-common
index 56921d80e..2606cd5fb 160000
--- a/src/sonic-platform-common
+++ b/src/sonic-platform-common
@@ -1 +1 @@
-Subproject commit 56921d80e42971f2579115f26c5194b9e0ecbc05
+Subproject commit 2606cd5fb0a58fc956577602235a9f8f84a887c6

From 6ada967685f0a3145f4400169b49abb4ed168f75 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Thu, 21 Mar 2024 19:01:09 +0800
Subject: [PATCH 0350/1115] [submodule] Update submodule sonic-mgmt-common to
 the latest HEAD automatically (#18408)

#### Why I did it
src/sonic-mgmt-common
```
* 4f32923 - (HEAD -> master, origin/master, origin/HEAD) Fix subscriptions for lists with multiple keys. (9 hours ago) [Steve Licking]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-mgmt-common | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-mgmt-common b/src/sonic-mgmt-common
index fbb5fcdb9..4f329233b 160000
--- a/src/sonic-mgmt-common
+++ b/src/sonic-mgmt-common
@@ -1 +1 @@
-Subproject commit fbb5fcdb9c8fc142b2840f99c6aa25894c369185
+Subproject commit 4f329233be35d223f01f85b02f8124ad096926ed

From b3845b620d90121a5bdb33769f8b3a687122a504 Mon Sep 17 00:00:00 2001
From: Yaqiang Zhu <zyq1512099831@gmail.com>
Date: Fri, 22 Mar 2024 00:27:51 +0800
Subject: [PATCH 0351/1115] [dhcp_relay] Upgrade dhcp_relay container to
 bookworm (#17783)

* [dhcp_relay] Update dhcp_relay to bookworm
---
 dockers/docker-dhcp-relay/Dockerfile.j2       |  2 +-
 rules/docker-dhcp-relay.mk                    |  8 +-
 rules/isc-dhcp.mk                             |  4 +-
 sonic-slave-bookworm/Dockerfile.j2            |  4 +-
 ...ion-82-circuit-ID-and-remote-ID-fiel.patch | 32 ++++----
 ...ing-port-alias-map-file-to-replace-p.patch | 36 ++++-----
 ...ockets-to-configure-flags-in-debian-.patch | 12 +--
 ...VE_SO_BINDTODEVICE-has-a-chance-to-b.patch | 14 ++--
 ...f-BOOTREQUEST-is-directed-broadcast-.patch | 76 +++++++++----------
 ...interfaces-when-discovering-interfac.patch |  8 +-
 .../0009-Support-for-dual-tor-scenario.patch  | 60 +++++++--------
 ...o-support-using-src-intf-ip-in-relay.patch | 25 +++---
 ...ay-agent-option-buffer-pointer-logic.patch | 53 -------------
 .../patch/0014-enable-parallel-build.patch    | 14 ++--
 ...-to-set-primary-address-in-interface.patch | 25 +++---
 src/isc-dhcp/patch/series                     |  1 -
 16 files changed, 161 insertions(+), 213 deletions(-)
 delete mode 100644 src/isc-dhcp/patch/0013-Fix-dhcrelay-agent-option-buffer-pointer-logic.patch

diff --git a/dockers/docker-dhcp-relay/Dockerfile.j2 b/dockers/docker-dhcp-relay/Dockerfile.j2
index a406af404..9d0614ce4 100644
--- a/dockers/docker-dhcp-relay/Dockerfile.j2
+++ b/dockers/docker-dhcp-relay/Dockerfile.j2
@@ -1,5 +1,5 @@
 {% from "dockers/dockerfile-macros.j2" import install_debian_packages, install_python_wheels, copy_files %}
-FROM docker-config-engine-bullseye-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}}
+FROM docker-config-engine-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}}
 
 ARG docker_container_name
 ARG image_version
diff --git a/rules/docker-dhcp-relay.mk b/rules/docker-dhcp-relay.mk
index 13915a49e..6462b4d41 100644
--- a/rules/docker-dhcp-relay.mk
+++ b/rules/docker-dhcp-relay.mk
@@ -8,12 +8,12 @@ $(DOCKER_DHCP_RELAY)_PATH = $(DOCKERS_PATH)/$(DOCKER_DHCP_RELAY_STEM)
 
 $(DOCKER_DHCP_RELAY)_DEPENDS += $(ISC_DHCP_RELAY) $(SONIC_DHCPMON) $(SONIC_DHCPRELAY) $(LIBSWSSCOMMON) $(SONIC_RSYSLOG_PLUGIN) 
 
-$(DOCKER_DHCP_RELAY)_DBG_DEPENDS = $($(DOCKER_CONFIG_ENGINE_BULLSEYE)_DBG_DEPENDS)
+$(DOCKER_DHCP_RELAY)_DBG_DEPENDS = $($(DOCKER_CONFIG_ENGINE_BOOKWORM)_DBG_DEPENDS)
 $(DOCKER_DHCP_RELAY)_DBG_DEPENDS += $(ISC_DHCP_RELAY_DBG) $(SONIC_DHCPRELAY_DBG) $(SONIC_DHCPMON_DBG) $(SONIC_RSYSLOG_PLUGIN)
 
-$(DOCKER_DHCP_RELAY)_DBG_IMAGE_PACKAGES = $($(DOCKER_CONFIG_ENGINE_BULLSEYE)_DBG_IMAGE_PACKAGES)
+$(DOCKER_DHCP_RELAY)_DBG_IMAGE_PACKAGES = $($(DOCKER_CONFIG_ENGINE_BOOKWORM)_DBG_IMAGE_PACKAGES)
 
-$(DOCKER_DHCP_RELAY)_LOAD_DOCKERS = $(DOCKER_CONFIG_ENGINE_BULLSEYE)
+$(DOCKER_DHCP_RELAY)_LOAD_DOCKERS = $(DOCKER_CONFIG_ENGINE_BOOKWORM)
 
 $(DOCKER_DHCP_RELAY)_INSTALL_PYTHON_WHEELS = $(SONIC_UTILITIES_PY3)
 $(DOCKER_DHCP_RELAY)_INSTALL_DEBS = $(PYTHON3_SWSSCOMMON)
@@ -29,9 +29,7 @@ $(DOCKER_DHCP_RELAY)_SERVICE_BEFORE = ntp-config
 $(DOCKER_DHCP_RELAY)_SERVICE_DEPENDENT_OF = swss
 
 SONIC_DOCKER_IMAGES += $(DOCKER_DHCP_RELAY)
-SONIC_BULLSEYE_DOCKERS += $(DOCKER_DHCP_RELAY)
 SONIC_DOCKER_DBG_IMAGES += $(DOCKER_DHCP_RELAY_DBG)
-SONIC_BULLSEYE_DBG_DOCKERS += $(DOCKER_DHCP_RELAY_DBG)
 
 ifeq ($(INCLUDE_KUBERNETES),y)
 $(DOCKER_DHCP_RELAY)_DEFAULT_FEATURE_OWNER = kube
diff --git a/rules/isc-dhcp.mk b/rules/isc-dhcp.mk
index 5dc98d5d5..803ffba7a 100644
--- a/rules/isc-dhcp.mk
+++ b/rules/isc-dhcp.mk
@@ -1,7 +1,7 @@
 # isc-dhcp packages
 
-ISC_DHCP_VERSION = 4.4.1
-ISC_DHCP_VERSION_FULL = ${ISC_DHCP_VERSION}-2.3+deb11u2
+ISC_DHCP_VERSION = 4.4.3-P1
+ISC_DHCP_VERSION_FULL = ${ISC_DHCP_VERSION}-2
 
 export ISC_DHCP_VERSION ISC_DHCP_VERSION_FULL
 
diff --git a/sonic-slave-bookworm/Dockerfile.j2 b/sonic-slave-bookworm/Dockerfile.j2
index 4af1b401c..4e855aa67 100644
--- a/sonic-slave-bookworm/Dockerfile.j2
+++ b/sonic-slave-bookworm/Dockerfile.j2
@@ -418,7 +418,9 @@ RUN apt-get update && apt-get install -y \
         auditd \
 # For protobuf
         protobuf-compiler \
-        libprotobuf-dev
+        libprotobuf-dev \
+# For sonic-dhcp6relay build
+        libjsoncpp-dev
 
 {%- if CROSS_BUILD_ENVIRON == "y" %}
 # Arm vs. amd64 versions conflict - remove amd64 packages
diff --git a/src/isc-dhcp/patch/0002-Customizable-Option-82-circuit-ID-and-remote-ID-fiel.patch b/src/isc-dhcp/patch/0002-Customizable-Option-82-circuit-ID-and-remote-ID-fiel.patch
index e6d09dedc..7eafe3b77 100644
--- a/src/isc-dhcp/patch/0002-Customizable-Option-82-circuit-ID-and-remote-ID-fiel.patch
+++ b/src/isc-dhcp/patch/0002-Customizable-Option-82-circuit-ID-and-remote-ID-fiel.patch
@@ -4,11 +4,11 @@ Date: Thu, 25 Apr 2019 22:07:20 +0000
 Subject: [PATCH] Customizable Option 82 circuit ID and remote ID fields
 
 ---
- relay/dhcrelay.c | 171 ++++++++++++++++++++++++++++++++++++++++-------
- 1 file changed, 147 insertions(+), 24 deletions(-)
+ relay/dhcrelay.c | 178 +++++++++++++++++++++++++++++++++++++++--------
+ 1 file changed, 150 insertions(+), 28 deletions(-)
 
 diff --git a/relay/dhcrelay.c b/relay/dhcrelay.c
-index 0cb2ef6..418b943 100644
+index 3b9c71b..19843f7 100644
 --- a/relay/dhcrelay.c
 +++ b/relay/dhcrelay.c
 @@ -75,6 +75,8 @@ int bad_circuit_id = 0;		/* Circuit ID option in matching RAI option
@@ -20,7 +20,7 @@ index 0cb2ef6..418b943 100644
  int max_hop_count = 10;		/* Maximum hop count */
  
  int no_daemon = 0;
-@@ -151,10 +153,20 @@ static const char url[] =
+@@ -160,10 +162,20 @@ static const char url[] =
  
  char *progname;
  
@@ -42,7 +42,7 @@ index 0cb2ef6..418b943 100644
  "                     [-A <length>] [-c <hops>]\n" \
  "                     [-p <port> | -rp <relay-port>]\n" \
  "                     [-pf <pid-file>] [--no-pid]\n"\
-@@ -171,11 +183,11 @@ char *progname;
+@@ -180,11 +192,11 @@ char *progname;
  "                     -l lower0 [ ... -l lowerN]\n" \
  "                     -u upper0 [ ... -u upperN]\n" \
  "           lower (client link): [address%%]interface[#index]\n" \
@@ -56,7 +56,7 @@ index 0cb2ef6..418b943 100644
  "                     [-A <length>] [-c <hops>] [-p <port>]\n" \
  "                     [-pf <pid-file>] [--no-pid]\n"\
  "                     [-m append|replace|forward|discard]\n" \
-@@ -190,13 +202,13 @@ char *progname;
+@@ -199,13 +211,13 @@ char *progname;
  "                     -l lower0 [ ... -l lowerN]\n" \
  "                     -u upper0 [ ... -u upperN]\n" \
  "           lower (client link): [address%%]interface[#index]\n" \
@@ -72,10 +72,10 @@ index 0cb2ef6..418b943 100644
  "                [-p <port> | -rp <relay-port>]\n" \
  "                [-pf <pid-file>] [--no-pid]\n" \
  "                [-m append|replace|forward|discard]\n" \
-@@ -204,18 +216,18 @@ char *progname;
+@@ -213,18 +225,18 @@ char *progname;
  "                [-iu interface0 [ ... -iu interfaceN]\n" \
  "                [-id interface0 [ ... -id interfaceN]\n" \
- "                [-U interface]\n" \
+ "                [-U interface] [-g <ip-address>]\n" \
 -"                server0 [ ... serverN]\n\n" \
 +"                server0 [ ... serverN]\n\n" DHCRELAY_OPTION82_USAGE \
  "       %s {--version|--help|-h}"
@@ -88,13 +88,13 @@ index 0cb2ef6..418b943 100644
  "                [-i interface0 [ ... -i interfaceN]\n" \
  "                [-iu interface0 [ ... -iu interfaceN]\n" \
  "                [-id interface0 [ ... -id interfaceN]\n" \
- "                [-U interface]\n" \
+ "                [-U interface] [-g <ip-address>]\n" \
 -"                server0 [ ... serverN]\n\n" \
 +"                server0 [ ... serverN]\n\n" DHCRELAY_OPTION82_USAGE \
  "       %s {--version|--help|-h}"
  #endif
  #endif
-@@ -471,6 +483,15 @@ main(int argc, char **argv) {
+@@ -480,6 +492,15 @@ main(int argc, char **argv) {
  			local_family_set = 1;
  			local_family = AF_INET;
  #endif
@@ -110,7 +110,7 @@ index 0cb2ef6..418b943 100644
  			add_agent_options = 1;
  		} else if (!strcmp(argv[i], "-A")) {
  #ifdef DHCPv6
-@@ -1171,6 +1192,81 @@ find_interface_by_agent_option(struct dhcp_packet *packet,
+@@ -1207,6 +1228,81 @@ find_interface_by_agent_option(struct dhcp_packet *packet,
  	return (-1);
  }
  
@@ -192,7 +192,7 @@ index 0cb2ef6..418b943 100644
  /*
   * Examine a packet to see if it's a candidate to have a Relay
   * Agent Information option tacked onto its tail.   If it is, tack
-@@ -1180,9 +1276,12 @@ static int
+@@ -1216,9 +1312,12 @@ int
  add_relay_agent_options(struct interface_info *ip, struct dhcp_packet *packet,
  			unsigned length, struct in_addr giaddr) {
  	int is_dhcp = 0, mms;
@@ -206,7 +206,7 @@ index 0cb2ef6..418b943 100644
  
  	/* If we're not adding agent options to packets, we can skip
  	   this. */
-@@ -1316,17 +1415,40 @@ add_relay_agent_options(struct interface_info *ip, struct dhcp_packet *packet,
+@@ -1357,17 +1456,40 @@ add_relay_agent_options(struct interface_info *ip, struct dhcp_packet *packet,
  	op = sp;
  #endif
  
@@ -258,7 +258,7 @@ index 0cb2ef6..418b943 100644
  	}
  
  	if (adding_link_select) {
-@@ -1351,7 +1473,7 @@ add_relay_agent_options(struct interface_info *ip, struct dhcp_packet *packet,
+@@ -1392,7 +1514,7 @@ add_relay_agent_options(struct interface_info *ip, struct dhcp_packet *packet,
  	 * If not, forward without adding the option.
  	 */
  	if (max - sp >= optlen + 3) {
@@ -267,7 +267,7 @@ index 0cb2ef6..418b943 100644
  
  		/* Okay, cons up *our* Relay Agent Information option. */
  		*sp++ = DHO_DHCP_AGENT_OPTIONS;
-@@ -1359,16 +1481,16 @@ add_relay_agent_options(struct interface_info *ip, struct dhcp_packet *packet,
+@@ -1400,16 +1522,16 @@ add_relay_agent_options(struct interface_info *ip, struct dhcp_packet *packet,
  
  		/* Copy in the circuit id... */
  		*sp++ = RAI_CIRCUIT_ID;
@@ -292,5 +292,5 @@ index 0cb2ef6..418b943 100644
  
  		/* RFC3527: Use the inbound packet's interface address in
 -- 
-2.17.1
+2.25.1
 
diff --git a/src/isc-dhcp/patch/0004-Support-for-loading-port-alias-map-file-to-replace-p.patch b/src/isc-dhcp/patch/0004-Support-for-loading-port-alias-map-file-to-replace-p.patch
index f26871019..ec1277152 100644
--- a/src/isc-dhcp/patch/0004-Support-for-loading-port-alias-map-file-to-replace-p.patch
+++ b/src/isc-dhcp/patch/0004-Support-for-loading-port-alias-map-file-to-replace-p.patch
@@ -9,10 +9,10 @@ Subject: [PATCH] Support for loading port alias map file to replace port name
  1 file changed, 104 insertions(+), 1 deletion(-)
 
 diff --git a/relay/dhcrelay.c b/relay/dhcrelay.c
-index 00c81d3..54f132a 100644
+index 0d9b2e7..b72b1bc 100644
 --- a/relay/dhcrelay.c
 +++ b/relay/dhcrelay.c
-@@ -129,6 +129,14 @@ static void setup_streams(void);
+@@ -133,6 +133,14 @@ static void setup_streams(void);
  char *dhcrelay_sub_id = NULL;
  #endif
  
@@ -24,11 +24,11 @@ index 00c81d3..54f132a 100644
 +static struct interface_name_alias_tuple *g_interface_name_alias_map = NULL;
 +static size_t g_interface_name_alias_map_size = 0;
 +
+ #ifndef UNIT_TEST
  static void do_relay4(struct interface_info *, struct dhcp_packet *,
  	              unsigned int, unsigned int, struct iaddr,
- 		      struct hardware *);
-@@ -143,6 +151,10 @@ static int strip_relay_agent_options(struct interface_info *,
- 
+@@ -152,6 +160,10 @@ extern int strip_relay_agent_options(struct interface_info *,
+ #ifndef UNIT_TEST
  static void request_v4_interface(const char* name, int flags);
  
 +static int load_interface_alias_map(const char *port_alias_map_file_path);
@@ -36,9 +36,9 @@ index 00c81d3..54f132a 100644
 +static void free_interface_alias_map(void);
 +
  static const char copyright[] =
- "Copyright 2004-2018 Internet Systems Consortium.";
+ "Copyright 2004-2022 Internet Systems Consortium.";
  static const char arr[] = "All rights reserved.";
-@@ -158,7 +170,7 @@ char *progname;
+@@ -167,7 +179,7 @@ char *progname;
  "\n" \
  "  %%%%  A single %%\n" \
  "  %%h  Hostname of device\n" \
@@ -47,7 +47,7 @@ index 00c81d3..54f132a 100644
  "  %%P  Hardware address of interface that generated the request\n" \
  "  %%C  Client hardware address\n" \
  "  %%I  DHCP relay agent IP Address\n" \
-@@ -171,6 +183,7 @@ char *progname;
+@@ -180,6 +192,7 @@ char *progname;
  "                     [-p <port> | -rp <relay-port>]\n" \
  "                     [-pf <pid-file>] [--no-pid]\n"\
  "                     [-m append|replace|forward|discard]\n" \
@@ -55,7 +55,7 @@ index 00c81d3..54f132a 100644
  "                     [-i interface0 [ ... -i interfaceN]\n" \
  "                     [-iu interface0 [ ... -iu interfaceN]\n" \
  "                     [-id interface0 [ ... -id interfaceN]\n" \
-@@ -179,6 +192,7 @@ char *progname;
+@@ -188,6 +201,7 @@ char *progname;
  "       %s -6   [-d] [-q] [-I] [-c <hops>]\n" \
  "                     [-p <port> | -rp <relay-port>]\n" \
  "                     [-pf <pid-file>] [--no-pid]\n" \
@@ -63,7 +63,7 @@ index 00c81d3..54f132a 100644
  "                     [-s <subscriber-id>]\n" \
  "                     -l lower0 [ ... -l lowerN]\n" \
  "                     -u upper0 [ ... -u upperN]\n" \
-@@ -619,6 +633,11 @@ main(int argc, char **argv) {
+@@ -643,6 +657,11 @@ main(int argc, char **argv) {
  			no_dhcrelay_pid = ISC_TRUE;
  		} else if (!strcmp(argv[i], "--no-pid")) {
  			no_pid_file = ISC_TRUE;
@@ -75,7 +75,7 @@ index 00c81d3..54f132a 100644
   		} else if (argv[i][0] == '-') {
  			usage("Unknown command: %s", argv[i]);
   		} else {
-@@ -841,6 +860,7 @@ main(int argc, char **argv) {
+@@ -865,6 +884,7 @@ main(int argc, char **argv) {
  	dispatch();
  
  	/* In fact dispatch() never returns. */
@@ -83,7 +83,7 @@ index 00c81d3..54f132a 100644
  	return (0);
  }
  
-@@ -1271,6 +1291,7 @@ format_relay_agent_rfc3046_msg(const struct interface_info *ip, struct dhcp_pack
+@@ -1307,6 +1327,7 @@ format_relay_agent_rfc3046_msg(const struct interface_info *ip, struct dhcp_pack
  					*/
  					if (packet->htype && !packet->giaddr.s_addr) {
  						int ret = 0, vlanid = 0;
@@ -91,10 +91,11 @@ index 00c81d3..54f132a 100644
  
  						ret = _bridgefdbquery(print_hw_addr(packet->htype, packet->hlen, packet->chaddr),
  											  ifname,
-@@ -1287,6 +1308,18 @@ format_relay_agent_rfc3046_msg(const struct interface_info *ip, struct dhcp_pack
+@@ -1322,6 +1343,18 @@ format_relay_agent_rfc3046_msg(const struct interface_info *ip, struct dhcp_pack
+ 
  							strncpy(ifname, ip->name, IFNAMSIZ);
  						}
- 
++
 +						// Attempt to translate SONiC interface name to vendor alias
 +						ret = get_interface_alias_by_name(ifname, ifalias);
 +						if (ret < 0) {
@@ -106,11 +107,10 @@ index 00c81d3..54f132a 100644
 +
 +							strncpy(ifname, ifalias, IFNAMSIZ);
 +						}
-+
+ 
  						str = ifname;
  					}
- 				break;
-@@ -2313,3 +2346,73 @@ void request_v4_interface(const char* name, int flags) {
+@@ -2361,3 +2394,73 @@ void request_v4_interface(const char* name, int flags) {
          interface_snorf(tmp, (INTERFACE_REQUESTED | flags));
          interface_dereference(&tmp, MDL);
  }
@@ -185,5 +185,5 @@ index 00c81d3..54f132a 100644
 +	g_interface_name_alias_map_size = 0;
 +}
 -- 
-2.17.1
+2.25.1
 
diff --git a/src/isc-dhcp/patch/0005-Add-enable-use-sockets-to-configure-flags-in-debian-.patch b/src/isc-dhcp/patch/0005-Add-enable-use-sockets-to-configure-flags-in-debian-.patch
index 7e9bcc30f..48e7f5d20 100644
--- a/src/isc-dhcp/patch/0005-Add-enable-use-sockets-to-configure-flags-in-debian-.patch
+++ b/src/isc-dhcp/patch/0005-Add-enable-use-sockets-to-configure-flags-in-debian-.patch
@@ -9,18 +9,18 @@ Subject: [PATCH 1/3] Add --enable-use-sockets to configure flags in
  1 file changed, 1 insertion(+), 1 deletion(-)
 
 diff --git a/debian/rules b/debian/rules
-index d3fcc1d..2a7219d 100755
+index dc2a9b1..3d12fb5 100755
 --- a/debian/rules
 +++ b/debian/rules
-@@ -24,7 +24,7 @@ CFLAGS+=-D_PATH_DHCLIENT_CONF='\"/etc/dhcp/dhclient.conf\"'
+@@ -23,7 +23,7 @@ CFLAGS+=-D_PATH_DHCLIENT_CONF='\"/etc/dhcp/dhclient.conf\"'
  CFLAGS+=-D_PATH_DHCLIENT_DB='\"$(LEASE_PATH)/dhclient.leases\"'
  CFLAGS+=-D_PATH_DHCLIENT6_DB='\"$(LEASE_PATH)/dhclient6.leases\"'
  
--CONFFLAGS=--prefix=/usr --with-libbind=/usr --enable-log-pid --enable-paranoia
-+CONFFLAGS=--prefix=/usr --with-libbind=/usr --enable-log-pid --enable-paranoia --enable-use-sockets
+-CONFFLAGS+=--prefix=/usr --enable-log-pid --enable-paranoia
++CONFFLAGS+=--prefix=/usr --enable-log-pid --enable-paranoia --enable-use-sockets
  
+ include /usr/share/dpkg/buildtools.mk
  # cross-architecture building
- ifneq ($(DEB_HOST_GNU_TYPE),$(DEB_BUILD_GNU_TYPE))
 -- 
-2.17.1
+2.25.1
 
diff --git a/src/isc-dhcp/patch/0006-Bugfix-Ensure-HAVE_SO_BINDTODEVICE-has-a-chance-to-b.patch b/src/isc-dhcp/patch/0006-Bugfix-Ensure-HAVE_SO_BINDTODEVICE-has-a-chance-to-b.patch
index 5553180f4..f0e06b692 100644
--- a/src/isc-dhcp/patch/0006-Bugfix-Ensure-HAVE_SO_BINDTODEVICE-has-a-chance-to-b.patch
+++ b/src/isc-dhcp/patch/0006-Bugfix-Ensure-HAVE_SO_BINDTODEVICE-has-a-chance-to-b.patch
@@ -9,10 +9,10 @@ Subject: [PATCH 2/3] Bugfix: Ensure HAVE_SO_BINDTODEVICE has a chance to be
  1 file changed, 120 insertions(+), 119 deletions(-)
 
 diff --git a/includes/osdep.h b/includes/osdep.h
-index cfae90b..f07c43c 100644
+index 0742858..dfccb8c 100644
 --- a/includes/osdep.h
 +++ b/includes/osdep.h
-@@ -48,37 +48,6 @@
+@@ -47,37 +47,6 @@
  #define BYTE_ORDER DHCP_BYTE_ORDER
  #endif /* BYTE_ORDER */
  
@@ -50,7 +50,7 @@ index cfae90b..f07c43c 100644
  #if !defined (TIME_MAX)
  # define TIME_MAX 2147483647
  #endif
-@@ -91,94 +60,6 @@
+@@ -90,98 +59,10 @@
  # define vsnprintf isc_print_vsnprintf
  #endif
  
@@ -102,6 +102,10 @@ index cfae90b..f07c43c 100644
 -#  define USE_UPF_RECEIVE
 -#endif
 -
+ #if defined (SO_BINDTODEVICE) && !defined (HAVE_SO_BINDTODEVICE)
+ # define HAVE_SO_BINDTODEVICE
+ #endif
+ 
 -/* Porting::
 -
 -   If you add support for sending packets directly out an interface,
@@ -145,7 +149,7 @@ index cfae90b..f07c43c 100644
  /* If we don't have a DLPI packet filter, we have to filter in userland.
     Probably not worth doing, actually. */
  #if defined (USE_DLPI_RECEIVE) && !defined (USE_DLPI_PFMOD)
-@@ -288,4 +169,124 @@
+@@ -287,4 +168,124 @@
  # define STDERR_FILENO 2
  #endif
  
@@ -271,5 +275,5 @@ index cfae90b..f07c43c 100644
 +
  #endif /* __ISC_DHCP_OSDEP_H__ */
 -- 
-2.17.1
+2.25.1
 
diff --git a/src/isc-dhcp/patch/0007-If-destination-of-BOOTREQUEST-is-directed-broadcast-.patch b/src/isc-dhcp/patch/0007-If-destination-of-BOOTREQUEST-is-directed-broadcast-.patch
index bf24e448e..63d14701f 100644
--- a/src/isc-dhcp/patch/0007-If-destination-of-BOOTREQUEST-is-directed-broadcast-.patch
+++ b/src/isc-dhcp/patch/0007-If-destination-of-BOOTREQUEST-is-directed-broadcast-.patch
@@ -6,16 +6,16 @@ Subject: [PATCH 3/3] If destination of BOOTREQUEST is directed broadcast,
  interfaces
 
 ---
- common/discover.c | 46 +++++++++++++++++++---
+ common/discover.c | 40 +++++++++++++++++++--
  includes/dhcpd.h  |  3 ++
- relay/dhcrelay.c  | 98 +++++++++++++++++++++++++++++++++++++++++------
- 3 files changed, 131 insertions(+), 16 deletions(-)
+ relay/dhcrelay.c  | 90 +++++++++++++++++++++++++++++++++++++++++++----
+ 3 files changed, 123 insertions(+), 10 deletions(-)
 
 diff --git a/common/discover.c b/common/discover.c
-index 98ac46a..53afecc 100644
+index 0c5ad39..32f2516 100644
 --- a/common/discover.c
 +++ b/common/discover.c
-@@ -236,6 +236,7 @@ struct iface_conf_list {
+@@ -239,6 +239,7 @@ struct iface_conf_list {
  struct iface_info {
  	char name[IF_NAMESIZE+1];	/* name of the interface, e.g. "bge0" */
  	struct sockaddr_storage addr;	/* address information */
@@ -23,7 +23,7 @@ index 98ac46a..53afecc 100644
  	isc_uint64_t flags;		/* interface flags, e.g. IFF_LOOPBACK */
  };
  
-@@ -367,6 +368,17 @@ next_iface(struct iface_info *info, int *err, struct iface_conf_list *ifaces) {
+@@ -370,6 +371,17 @@ next_iface(struct iface_info *info, int *err, struct iface_conf_list *ifaces) {
  	}
  	info->flags = tmp.lifr_flags;
  
@@ -41,7 +41,7 @@ index 98ac46a..53afecc 100644
  	ifaces->next++;
  	*err = 0;
  	return 1;
-@@ -410,6 +422,7 @@ struct iface_conf_list {
+@@ -413,6 +425,7 @@ struct iface_conf_list {
  struct iface_info {
  	char name[IFNAMSIZ];		/* name of the interface, e.g. "bge0" */
  	struct sockaddr_storage addr;	/* address information */
@@ -49,17 +49,17 @@ index 98ac46a..53afecc 100644
  	isc_uint64_t flags;		/* interface flags, e.g. IFF_LOOPBACK */
  };
  
-@@ -487,7 +500,8 @@ end_iface_scan(struct iface_conf_list *ifaces) {
+@@ -490,7 +503,8 @@ end_iface_scan(struct iface_conf_list *ifaces) {
  /* XXX: perhaps create drealloc() rather than do it manually */
  void
- add_ipv4_addr_to_interface(struct interface_info *iface, 
+ add_ipv4_addr_to_interface(struct interface_info *iface,
 -			   const struct in_addr *addr) {
 +			   const struct in_addr *addr,
 +			   const struct in_addr *netmask) {
  	/*
  	 * We don't expect a lot of addresses per IPv4 interface, so
  	 * we use 4, as our "chunk size" for collecting addresses.
-@@ -498,6 +512,11 @@ add_ipv4_addr_to_interface(struct interface_info *iface,
+@@ -501,6 +515,11 @@ add_ipv4_addr_to_interface(struct interface_info *iface,
  			log_fatal("Out of memory saving IPv4 address "
  			          "on interface.");
  		}
@@ -71,7 +71,7 @@ index 98ac46a..53afecc 100644
  		iface->address_count = 0;
  		iface->address_max = 4;
  	} else if (iface->address_count >= iface->address_max) {
-@@ -515,9 +534,23 @@ add_ipv4_addr_to_interface(struct interface_info *iface,
+@@ -518,9 +537,23 @@ add_ipv4_addr_to_interface(struct interface_info *iface,
  		       iface->address_max * sizeof(struct in_addr));
  		dfree(iface->addresses, MDL);
  		iface->addresses = tmp;
@@ -96,15 +96,15 @@ index 98ac46a..53afecc 100644
  }
  
  #ifdef DHCPv6
-@@ -656,6 +689,7 @@ discover_interfaces(int state) {
- 		if ((info.addr.ss_family == AF_INET) && 
+@@ -661,6 +694,7 @@ discover_interfaces(int state) {
+ 		if ((info.addr.ss_family == AF_INET) &&
  		    (local_family == AF_INET)) {
  			struct sockaddr_in *a = (struct sockaddr_in*)&info.addr;
 +			struct sockaddr_in *n = (struct sockaddr_in*)&info.netmask;
  			struct iaddr addr;
  
  			/* We don't want the loopback interface. */
-@@ -670,7 +704,7 @@ discover_interfaces(int state) {
+@@ -675,7 +709,7 @@ discover_interfaces(int state) {
  			if (a->sin_addr.s_addr != htonl(INADDR_ANY))
  				tmp->configured = 1;
  
@@ -114,10 +114,10 @@ index 98ac46a..53afecc 100644
  			/* invoke the setup hook */
  			addr.len = 4;
 diff --git a/includes/dhcpd.h b/includes/dhcpd.h
-index df3da59..2c7f059 100644
+index 20f9bfb..b54a36e 100644
 --- a/includes/dhcpd.h
 +++ b/includes/dhcpd.h
-@@ -1369,6 +1369,9 @@ struct interface_info {
+@@ -1380,6 +1380,9 @@ struct interface_info {
  	struct in_addr *addresses;	/* Addresses associated with this
  					 * interface.
  					 */
@@ -128,7 +128,7 @@ index df3da59..2c7f059 100644
  	int address_max;		/* Size of addresses buffer. */
  	struct in6_addr *v6addresses;	/* IPv6 addresses associated with
 diff --git a/relay/dhcrelay.c b/relay/dhcrelay.c
-index 54f132a..beae977 100644
+index b72b1bc..9143e85 100644
 --- a/relay/dhcrelay.c
 +++ b/relay/dhcrelay.c
 @@ -30,6 +30,7 @@
@@ -139,7 +139,7 @@ index 54f132a..beae977 100644
  #include <isc/file.h>
  
  TIME default_lease_time = 43200; /* 12 hours... */
-@@ -1001,20 +1002,95 @@ do_relay4(struct interface_info *ip, struct dhcp_packet *packet,
+@@ -1030,20 +1031,95 @@ do_relay4(struct interface_info *ip, struct dhcp_packet *packet,
  	/* Otherwise, it's a BOOTREQUEST, so forward it to all the
  	   servers. */
  	for (sp = servers; sp; sp = sp->next) {
@@ -147,7 +147,6 @@ index 54f132a..beae977 100644
 -				 ? fallback_interface : interfaces),
 -				 NULL, packet, length, ip->addresses[0],
 -				 &sp->to, NULL) < 0) {
--			++client_packet_errors;
 +		int packet_relay_attempted = 0;
 +
 +		log_debug("Server IP: %s", inet_ntoa(sp->to.sin_addr));
@@ -180,14 +179,16 @@ index 54f132a..beae977 100644
 +					log_debug("Packet destined for broadcast IP of %s", out->name);
 +					if (send_packet(out, NULL, packet,
 +							length, ip->addresses[0],&sp->to, NULL) < 0) {
-+						++client_packet_errors;
-+					} else {
-+						log_debug("Forwarded BOOTREQUEST for %s to %s on interface %s",
-+						       print_hw_addr(packet->htype, packet->hlen,
-+								      packet->chaddr),
-+						       inet_ntoa(sp->to.sin_addr), out->name);
-+
-+						++client_packets_relayed;
+ 			++client_packet_errors;
+ 		} else {
+-			log_debug("Forwarded BOOTREQUEST for %s to %s",
++			log_debug("Forwarded BOOTREQUEST for %s to %s on interface %s",
+ 			       print_hw_addr(packet->htype, packet->hlen,
+ 					      packet->chaddr),
+-			       inet_ntoa(sp->to.sin_addr));
++			       inet_ntoa(sp->to.sin_addr), out->name);
++
+ 			++client_packets_relayed;
 +					}
 +
 +					packet_relay_attempted = 1;
@@ -198,8 +199,9 @@ index 54f132a..beae977 100644
 +
 +			if (packet_relay_attempted)
 +				break;
-+		}
-+
+ 		}
+-	}
+ 
 +		if (packet_relay_attempted)
 +			continue;
 +
@@ -217,12 +219,7 @@ index 54f132a..beae977 100644
 +
 +				++client_packets_relayed;
 +			}
- 		} else {
--			log_debug("Forwarded BOOTREQUEST for %s to %s",
--			       print_hw_addr(packet->htype, packet->hlen,
--					      packet->chaddr),
--			       inet_ntoa(sp->to.sin_addr));
--			++client_packets_relayed;
++		} else {
 +			for (out = interfaces; out; out = out->next) {
 +				// Only relay BOOTREQUEST on upstream interfaces
 +				if (!(out->flags & INTERFACE_UPSTREAM))
@@ -240,12 +237,11 @@ index 54f132a..beae977 100644
 +					++client_packets_relayed;
 +				}
 +			}
- 		}
- 	}
--				 
++		}
++	}
  }
  
- /* Strip any Relay Agent Information options from the DHCP packet
+ #endif /* UNIT_TEST */
 -- 
-2.17.1
+2.25.1
 
diff --git a/src/isc-dhcp/patch/0008-Don-t-skip-down-interfaces-when-discovering-interfac.patch b/src/isc-dhcp/patch/0008-Don-t-skip-down-interfaces-when-discovering-interfac.patch
index f088b035e..212445307 100644
--- a/src/isc-dhcp/patch/0008-Don-t-skip-down-interfaces-when-discovering-interfac.patch
+++ b/src/isc-dhcp/patch/0008-Don-t-skip-down-interfaces-when-discovering-interfac.patch
@@ -14,10 +14,10 @@ didn't discover the interface(s) when it started up.
  1 file changed, 2 insertions(+), 1 deletion(-)
 
 diff --git a/common/discover.c b/common/discover.c
-index 8d5b958..5efff49 100644
+index 32f2516..31dae3c 100644
 --- a/common/discover.c
 +++ b/common/discover.c
-@@ -1016,7 +1016,8 @@ discover_interfaces(int state) {
+@@ -668,7 +668,8 @@ discover_interfaces(int state) {
  		      info.flags & IFF_LOOPBACK ||
  		      info.flags & IFF_POINTOPOINT) && !tmp) ||
  		    (!(info.flags & IFF_UP) &&
@@ -25,8 +25,8 @@ index 8d5b958..5efff49 100644
 +		     state != DISCOVER_UNCONFIGURED &&
 +		     state != DISCOVER_RELAY))
  			continue;
- 		
+ 
  		/* If there isn't already an interface by this name,
 -- 
-2.17.1
+2.25.1
 
diff --git a/src/isc-dhcp/patch/0009-Support-for-dual-tor-scenario.patch b/src/isc-dhcp/patch/0009-Support-for-dual-tor-scenario.patch
index 0f7495f49..2fa3f0ed7 100644
--- a/src/isc-dhcp/patch/0009-Support-for-dual-tor-scenario.patch
+++ b/src/isc-dhcp/patch/0009-Support-for-dual-tor-scenario.patch
@@ -4,11 +4,11 @@ Date: Tue, 1 Dec 2020 16:33:34 -0800
 Subject: [PATCH] support for dual tor scenario
 
 ---
- relay/dhcrelay.c | 117 +++++++++++++++++++++++++++++++++++++++--------
- 1 file changed, 98 insertions(+), 19 deletions(-)
+ relay/dhcrelay.c | 115 +++++++++++++++++++++++++++++++++++++++--------
+ 1 file changed, 97 insertions(+), 18 deletions(-)
 
 diff --git a/relay/dhcrelay.c b/relay/dhcrelay.c
-index e158efe..055d97f 100644
+index 9143e85..4134a58 100644
 --- a/relay/dhcrelay.c
 +++ b/relay/dhcrelay.c
 @@ -56,6 +56,8 @@ int bogus_agent_drops = 0;	/* Packets dropped because agent option
@@ -34,52 +34,51 @@ index e158efe..055d97f 100644
  #ifdef DHCPv6
  	/* Force use of DHCPv6 interface-id option. */
  isc_boolean_t use_if_id = ISC_FALSE;
-@@ -156,6 +165,8 @@ static int load_interface_alias_map(const char *port_alias_map_file_path);
+@@ -165,6 +174,8 @@ static int load_interface_alias_map(const char *port_alias_map_file_path);
  static int get_interface_alias_by_name(const char *if_name, char *if_alias_out);
  static void free_interface_alias_map(void);
  
 +static void free_downstream_intfs(void);
 +
  static const char copyright[] =
- "Copyright 2004-2018 Internet Systems Consortium.";
+ "Copyright 2004-2022 Internet Systems Consortium.";
  static const char arr[] = "All rights reserved.";
-@@ -189,6 +200,7 @@ char *progname;
+@@ -198,6 +209,7 @@ char *progname;
  "                     [-iu interface0 [ ... -iu interfaceN]\n" \
  "                     [-id interface0 [ ... -id interfaceN]\n" \
- "                     [-U interface]\n" \
+ "                     [-U interface] [-g <ip-address>]\n" \
 +"                     [-dt]\n"\
  "                     server0 [ ... serverN]\n\n" \
  "       %s -6   [-d] [-q] [-I] [-c <hops>]\n" \
  "                     [-p <port> | -rp <relay-port>]\n" \
-@@ -210,6 +222,7 @@ char *progname;
+@@ -219,6 +231,7 @@ char *progname;
  "                     [-iu interface0 [ ... -iu interfaceN]\n" \
  "                     [-id interface0 [ ... -id interfaceN]\n" \
- "                     [-U interface]\n" \
+ "                     [-U interface] [-g <ip-address>]\n" \
 +"                     [-dt]\n"\
  "                     server0 [ ... serverN]\n\n" \
  "       %s -6   [-d] [-q] [-I] [-c <hops>] [-p <port>]\n" \
  "                     [-pf <pid-file>] [--no-pid]\n" \
-@@ -231,6 +244,7 @@ char *progname;
+@@ -240,6 +253,7 @@ char *progname;
  "                [-iu interface0 [ ... -iu interfaceN]\n" \
  "                [-id interface0 [ ... -id interfaceN]\n" \
- "                [-U interface]\n" \
+ "                [-U interface] [-g <ip-address>]\n" \
 +"                [-dt]\n"\
  "                server0 [ ... serverN]\n\n" DHCRELAY_OPTION82_USAGE \
  "       %s {--version|--help|-h}"
  #else
-@@ -242,6 +256,7 @@ char *progname;
+@@ -251,6 +265,7 @@ char *progname;
  "                [-iu interface0 [ ... -iu interfaceN]\n" \
  "                [-id interface0 [ ... -id interfaceN]\n" \
- "                [-U interface]\n" \
+ "                [-U interface] [-g <ip-address>]\n" \
 +"                [-dt]\n"\
  "                server0 [ ... serverN]\n\n" DHCRELAY_OPTION82_USAGE \
  "       %s {--version|--help|-h}"
  #endif
-@@ -639,7 +654,16 @@ main(int argc, char **argv) {
+@@ -663,6 +678,15 @@ main(int argc, char **argv) {
  				usage(use_noarg, argv[i-1]);
  			if (load_interface_alias_map(argv[i]) != 0)
  				log_fatal("Failed to load interface name-alias map.");
-- 		} else if (argv[i][0] == '-') {
 +		} else if (!strcmp(argv[i], "-dt")) {
 +#ifdef DHCPv6
 +			if (local_family_set && (local_family == AF_INET6)) {
@@ -89,11 +88,10 @@ index e158efe..055d97f 100644
 +			local_family = AF_INET;
 +#endif
 +			enable_support_for_dual_tor = 1;
-+		} else if (argv[i][0] == '-') {
+  		} else if (argv[i][0] == '-') {
  			usage("Unknown command: %s", argv[i]);
   		} else {
- 			struct hostent *he;
-@@ -747,7 +771,6 @@ main(int argc, char **argv) {
+@@ -771,7 +795,6 @@ main(int argc, char **argv) {
  			log_fatal("No servers specified.");
  		}
  
@@ -101,7 +99,7 @@ index e158efe..055d97f 100644
  		/* Set up the server sockaddrs. */
  		for (sp = servers; sp; sp = sp->next) {
  			sp->to.sin_port = local_port;
-@@ -862,6 +885,8 @@ main(int argc, char **argv) {
+@@ -886,6 +909,8 @@ main(int argc, char **argv) {
  
  	/* In fact dispatch() never returns. */
  	free_interface_alias_map();
@@ -110,7 +108,7 @@ index e158efe..055d97f 100644
  	return (0);
  }
  
-@@ -885,25 +910,50 @@ do_relay4(struct interface_info *ip, struct dhcp_packet *packet,
+@@ -909,25 +934,50 @@ do_relay4(struct interface_info *ip, struct dhcp_packet *packet,
  		return;
  	}
  
@@ -174,7 +172,7 @@ index e158efe..055d97f 100644
  	}
  
  	/* If it's a bootreply, forward it to the client. */
-@@ -913,6 +963,10 @@ do_relay4(struct interface_info *ip, struct dhcp_packet *packet,
+@@ -937,6 +987,10 @@ do_relay4(struct interface_info *ip, struct dhcp_packet *packet,
  			return;
  		}
  
@@ -182,10 +180,10 @@ index e158efe..055d97f 100644
 +		if (enable_support_for_dual_tor && !out)
 +			return;
 +
+ 		log_debug("BOOTREPLY giaddr: %s\n", inet_ntoa(packet->giaddr));
  		if (!(packet->flags & htons(BOOTP_BROADCAST)) &&
  			can_unicast_without_arp(out)) {
- 			to.sin_addr = packet->yiaddr;
-@@ -945,9 +999,13 @@ do_relay4(struct interface_info *ip, struct dhcp_packet *packet,
+@@ -970,9 +1024,13 @@ do_relay4(struct interface_info *ip, struct dhcp_packet *packet,
  			return;
  
  		if (!out) {
@@ -202,7 +200,7 @@ index e158efe..055d97f 100644
  			return;
  		}
  
-@@ -989,6 +1047,7 @@ do_relay4(struct interface_info *ip, struct dhcp_packet *packet,
+@@ -1023,6 +1081,7 @@ do_relay4(struct interface_info *ip, struct dhcp_packet *packet,
  	   that set giaddr, so we won't see it. */
  	if (!packet->giaddr.s_addr)
  		packet->giaddr = ip->addresses[0];
@@ -210,7 +208,7 @@ index e158efe..055d97f 100644
  	if (packet->hops < max_hop_count)
  		packet->hops = packet->hops + 1;
  	else
-@@ -1264,7 +1323,6 @@ find_interface_by_agent_option(struct dhcp_packet *packet,
+@@ -1305,7 +1364,6 @@ find_interface_by_agent_option(struct dhcp_packet *packet,
  
  	/* Scan the interface list looking for an interface whose
  	   name matches the one specified in circuit_id. */
@@ -218,7 +216,7 @@ index e158efe..055d97f 100644
  	for (ip = interfaces; ip; ip = ip->next) {
  		if (ip->circuit_id &&
  		    ip->circuit_id_len == circuit_id_len &&
-@@ -1668,6 +1726,7 @@ add_relay_agent_options(struct interface_info *ip, struct dhcp_packet *packet,
+@@ -1714,6 +1772,7 @@ add_relay_agent_options(struct interface_info *ip, struct dhcp_packet *packet,
  			*sp++ = 4u;
  			memcpy(sp, &giaddr.s_addr, 4);
  			sp += 4;
@@ -226,7 +224,7 @@ index e158efe..055d97f 100644
  			packet->giaddr = uplink->addresses[0];
  			log_debug ("Adding link selection suboption"
  				   " with addr: %s", inet_ntoa(giaddr));
-@@ -2398,6 +2457,7 @@ void request_v4_interface(const char* name, int flags) {
+@@ -2451,6 +2510,7 @@ void request_v4_interface(const char* name, int flags) {
          struct interface_info *tmp = NULL;
          int len = strlen(name);
          isc_result_t status;
@@ -234,7 +232,7 @@ index e158efe..055d97f 100644
  
          if (len >= sizeof(tmp->name)) {
                  log_fatal("%s: interface name too long (is %d)", name, len);
-@@ -2413,6 +2473,15 @@ void request_v4_interface(const char* name, int flags) {
+@@ -2466,6 +2526,15 @@ void request_v4_interface(const char* name, int flags) {
  		  (flags & INTERFACE_UPSTREAM ? 'Y' : 'N'),
  		  (flags & INTERFACE_DOWNSTREAM ? 'Y' : 'N'));
  
@@ -247,10 +245,10 @@ index e158efe..055d97f 100644
 +		ci->interface = tmp;
 +	}
 +
-         strncpy(tmp->name, name, len);
+         memcpy(tmp->name, name, len);
          interface_snorf(tmp, (INTERFACE_REQUESTED | flags));
          interface_dereference(&tmp, MDL);
-@@ -2487,3 +2556,13 @@ free_interface_alias_map(void) {
+@@ -2540,3 +2609,13 @@ free_interface_alias_map(void) {
  	free(g_interface_name_alias_map);
  	g_interface_name_alias_map_size = 0;
  }
@@ -265,5 +263,5 @@ index e158efe..055d97f 100644
 +	}
 +}
 -- 
-2.17.1
+2.25.1
 
diff --git a/src/isc-dhcp/patch/0012-add-option-si-to-support-using-src-intf-ip-in-relay.patch b/src/isc-dhcp/patch/0012-add-option-si-to-support-using-src-intf-ip-in-relay.patch
index 19a119203..039c4479e 100644
--- a/src/isc-dhcp/patch/0012-add-option-si-to-support-using-src-intf-ip-in-relay.patch
+++ b/src/isc-dhcp/patch/0012-add-option-si-to-support-using-src-intf-ip-in-relay.patch
@@ -4,13 +4,13 @@ Date: Fri, 12 Mar 2021 23:30:56 -0800
 Subject: [PATCH] add option -si to support using src intf ip in relay
 
 ---
- common/socket.c  | 119 ++++++++++++++++++++++++++++++++++++-----------
+ common/socket.c  | 120 +++++++++++++++++++++++++++++++++++------------
  includes/dhcpd.h |   1 +
- relay/dhcrelay.c |   8 ++++
- 3 files changed, 100 insertions(+), 28 deletions(-)
+ relay/dhcrelay.c |   2 +
+ 3 files changed, 94 insertions(+), 29 deletions(-)
 
 diff --git a/common/socket.c b/common/socket.c
-index 483eb9c..da9f501 100644
+index 3953eac..eae86e8 100644
 --- a/common/socket.c
 +++ b/common/socket.c
 @@ -83,6 +83,29 @@ static unsigned int global_v4_socket_references = 0;
@@ -43,7 +43,7 @@ index 483eb9c..da9f501 100644
  /*
   * If we can't bind() to a specific interface, then we can only have
   * a single socket. This variable insures that we don't try to listen
-@@ -712,37 +735,77 @@ ssize_t send_packet (interface, packet, raw, len, from, to, hto)
+@@ -722,38 +745,77 @@ ssize_t send_packet (interface, packet, raw, len, from, to, hto)
  	struct hardware *hto;
  {
  	int result;
@@ -59,8 +59,9 @@ index 483eb9c..da9f501 100644
 -			pktinfo.ipi_ifindex = interface->ifp->ifr_index;
 -			if (setsockopt(interface->wfdesc, IPPROTO_IP,
 -				       IP_PKTINFO, (char *)&pktinfo,
--				       sizeof(pktinfo)) < 0) 
--				log_fatal("setsockopt: IP_PKTINFO: %m");
+-				       sizeof(pktinfo)) < 0)
+-				log_fatal("setsockopt: IP_PKTINFO for %s: %m",
+-					  (char*)(interface->ifp));
 +	struct msghdr m;
 +	struct iovec v;
 +	struct sockaddr_in dst;
@@ -150,10 +151,10 @@ index 483eb9c..da9f501 100644
  }
  
 diff --git a/includes/dhcpd.h b/includes/dhcpd.h
-index 36cd518..0c25582 100644
+index b54a36e..68d44cf 100644
 --- a/includes/dhcpd.h
 +++ b/includes/dhcpd.h
-@@ -2660,6 +2660,7 @@ ssize_t send_fallback6(struct interface_info *, struct packet *,
+@@ -2676,6 +2676,7 @@ ssize_t send_fallback6(struct interface_info *, struct packet *,
  #endif
  
  #ifdef USE_SOCKET_SEND
@@ -162,10 +163,10 @@ index 36cd518..0c25582 100644
  void if_register_send (struct interface_info *);
  void if_deregister_send (struct interface_info *);
 diff --git a/relay/dhcrelay.c b/relay/dhcrelay.c
-index 221106a..c44a79d 100644
+index ccf7417..6aa1179 100644
 --- a/relay/dhcrelay.c
 +++ b/relay/dhcrelay.c
-@@ -431,6 +431,8 @@ main(int argc, char **argv) {
+@@ -440,6 +440,8 @@ main(int argc, char **argv) {
  #endif
  		} else if (!strcmp(argv[i], "-d")) {
  			/* no_daemon = 1; */
@@ -175,5 +176,5 @@ index 221106a..c44a79d 100644
  			quiet = 1;
  			quiet_interface_discovery = 1;
 -- 
-2.17.1
+2.25.1
 
diff --git a/src/isc-dhcp/patch/0013-Fix-dhcrelay-agent-option-buffer-pointer-logic.patch b/src/isc-dhcp/patch/0013-Fix-dhcrelay-agent-option-buffer-pointer-logic.patch
deleted file mode 100644
index 051b58966..000000000
--- a/src/isc-dhcp/patch/0013-Fix-dhcrelay-agent-option-buffer-pointer-logic.patch
+++ /dev/null
@@ -1,53 +0,0 @@
-From 0a2f9a62bceb90b0d30461add2e25c4ce7a24547 Mon Sep 17 00:00:00 2001
-From: Thomas Markwalder <tmark@isc.org>
-Date: Fri, 20 Dec 2019 10:11:54 -0500
-Subject: [PATCH] [#71] Fix dhcrelay agent option buffer pointer logic
-
-relay/dhcrelay.c
-    strip_relay_agent_options()
-    strip_relay_agent_options()
-    - corrected buffer pointer logic
-
----
- relay/dhcrelay.c | 18 ++++++++++++++----
- 1 file changed, 14 insertions(+), 4 deletions(-)
-
-diff --git a/relay/dhcrelay.c b/relay/dhcrelay.c
-index 896e1e2e..980dacae 100644
---- a/relay/dhcrelay.c
-+++ b/relay/dhcrelay.c
-@@ -1238,8 +1238,13 @@ strip_relay_agent_options(struct interface_info *in,
- 				return (0);
- 
- 			if (sp != op) {
--				memmove(sp, op, op[1] + 2);
--				sp += op[1] + 2;
-+				size_t mlen = op[1] + 2;
-+				memmove(sp, op, mlen);
-+				sp += mlen;
-+				if (sp > max) {
-+					return (0);
-+				}
-+
- 				op = nextop;
- 			} else
- 				op = sp = nextop;
-@@ -1620,8 +1620,13 @@ add_relay_agent_options(struct interface_info *ip, struct dhcp_packet *packet,
- 			end_pad = NULL;
- 
- 			if (sp != op) {
--				memmove(sp, op, op[1] + 2);
--				sp += op[1] + 2;
-+				size_t mlen = op[1] + 2;
-+				memmove(sp, op, mlen);
-+				sp += mlen;
-+				if (sp > max) {
-+					return (0);
-+				}
-+
- 				op = nextop;
- 			} else
- 				op = sp = nextop;
--- 
-2.17.1
-
diff --git a/src/isc-dhcp/patch/0014-enable-parallel-build.patch b/src/isc-dhcp/patch/0014-enable-parallel-build.patch
index 4b451b910..38860e21d 100644
--- a/src/isc-dhcp/patch/0014-enable-parallel-build.patch
+++ b/src/isc-dhcp/patch/0014-enable-parallel-build.patch
@@ -1,8 +1,8 @@
 diff --git a/debian/rules b/debian/rules
-index 3c8318f..28f4657 100755
+index 0906e53..6e96ffe 100755
 --- a/debian/rules
 +++ b/debian/rules
-@@ -37,6 +37,13 @@ export DO_LPF=1
+@@ -38,6 +38,13 @@ export DO_LPF=1
  CONFFLAGS+=--enable-use-sockets
  endif
  
@@ -16,27 +16,27 @@ index 3c8318f..28f4657 100755
  %:
  	dh $@ --parallel --with autoreconf
  
-@@ -46,17 +53,17 @@ override_dh_auto_build:
+@@ -59,17 +66,17 @@ override_dh_auto_build:
  	# ldap-enabled build
  	test -f Makefile && $(MAKE) distclean || true
- 	./configure --with-ldap --with-ldapcrypto CFLAGS="$(CFLAGS) -DNSUPDATE" LIBS="-lirs-export $(LIBS)" $(CONFFLAGS)
+ 	./configure --with-ldap --with-ldapcrypto CFLAGS="$(CFLAGS) -DNSUPDATE" $(CONFFLAGS) LIBS="$(LIBS) -latomic"
 -	$(MAKE)
 +	$(MAKE) $(PARALLEL)
  	mv server/dhcpd dhcpd
  	# ddns-disabled build
  	test -f Makefile && $(MAKE) distclean || true
- 	./configure CFLAGS="$(CFLAGS)" $(CONFFLAGS)
+ 	./configure CFLAGS="$(CFLAGS)" $(CONFFLAGS) LIBS="$(LIBS) -latomic"
 -	$(MAKE)
 +	$(MAKE) $(PARALLEL)
  	mv client/dhclient dhclient
  	# ldap-disabled build
  	test -f Makefile && $(MAKE) distclean || true
- 	./configure CFLAGS="$(CFLAGS) -DNSUPDATE" LIBS="-lirs-export $(LIBS)" $(CONFFLAGS)
+ 	./configure CFLAGS="$(CFLAGS) -DNSUPDATE" $(CONFFLAGS) LIBS="$(LIBS) -latomic"
 -	$(MAKE)
 +	$(MAKE) $(PARALLEL)
  
  override_dh_install:
  	# rename some upstream files
 -- 
-2.34.1
+2.25.1
 
diff --git a/src/isc-dhcp/patch/0015-option-to-set-primary-address-in-interface.patch b/src/isc-dhcp/patch/0015-option-to-set-primary-address-in-interface.patch
index 67283ba02..b68ce0cb2 100644
--- a/src/isc-dhcp/patch/0015-option-to-set-primary-address-in-interface.patch
+++ b/src/isc-dhcp/patch/0015-option-to-set-primary-address-in-interface.patch
@@ -1,8 +1,8 @@
 diff --git a/common/discover.c b/common/discover.c
-index ab50234..40e13f5 100644
+index 20d7c54..9ee8bc2 100644
 --- a/common/discover.c
 +++ b/common/discover.c
-@@ -1614,3 +1614,16 @@ void interface_snorf (struct interface_info *tmp, int ir)
+@@ -1619,3 +1619,16 @@ void interface_snorf (struct interface_info *tmp, int ir)
  	}
  	interface_reference (&interfaces, tmp, MDL);
  }
@@ -21,10 +21,10 @@ index ab50234..40e13f5 100644
 +}
 \ No newline at end of file
 diff --git a/includes/dhcpd.h b/includes/dhcpd.h
-index 257b31e..e7f9f06 100644
+index 68d44cf..8c307b6 100644
 --- a/includes/dhcpd.h
 +++ b/includes/dhcpd.h
-@@ -2873,6 +2873,7 @@ extern int interface_count;
+@@ -2885,6 +2885,7 @@ extern int interface_count;
  extern int interface_max;
  isc_result_t interface_initialize(omapi_object_t *, const char *, int);
  void discover_interfaces(int);
@@ -33,7 +33,7 @@ index 257b31e..e7f9f06 100644
  int if_readsocket (omapi_object_t *);
  void reinitialize_interfaces (void);
 diff --git a/relay/dhcrelay.c b/relay/dhcrelay.c
-index ff0ad17..31fe61b 100644
+index 6aa1179..a1aa234 100644
 --- a/relay/dhcrelay.c
 +++ b/relay/dhcrelay.c
 @@ -92,6 +92,11 @@ struct downstream_intf_list {
@@ -48,23 +48,23 @@ index ff0ad17..31fe61b 100644
  #ifdef DHCPv6
  	/* Force use of DHCPv6 interface-id option. */
  isc_boolean_t use_if_id = ISC_FALSE;
-@@ -199,6 +204,7 @@ char *progname;
+@@ -208,6 +213,7 @@ char *progname;
  "                     [-i interface0 [ ... -i interfaceN]\n" \
  "                     [-iu interface0 [ ... -iu interfaceN]\n" \
  "                     [-id interface0 [ ... -id interfaceN]\n" \
 +"					  [-pg ip-address0 [ ... -pg ip-addressN]]\n" \
- "                     [-U interface]\n" \
+ "                     [-U interface] [-g <ip-address>]\n" \
  "                     [-dt]\n"\
  "                     server0 [ ... serverN]\n\n" \
-@@ -221,6 +227,7 @@ char *progname;
+@@ -230,6 +236,7 @@ char *progname;
  "                     [-i interface0 [ ... -i interfaceN]\n" \
  "                     [-iu interface0 [ ... -iu interfaceN]\n" \
  "                     [-id interface0 [ ... -id interfaceN]\n" \
 +"					  [-pg ip-address0 [ ... -pg ip-addressN]]\n" \
- "                     [-U interface]\n" \
+ "                     [-U interface] [-g <ip-address>]\n" \
  "                     [-dt]\n"\
  "                     server0 [ ... serverN]\n\n" \
-@@ -649,6 +656,34 @@ main(int argc, char **argv) {
+@@ -673,6 +680,34 @@ main(int argc, char **argv) {
  				usage(use_noarg, argv[i-1]);
  			path_dhcrelay_pid = argv[i];
  			no_dhcrelay_pid = ISC_TRUE;
@@ -99,7 +99,7 @@ index ff0ad17..31fe61b 100644
  		} else if (!strcmp(argv[i], "--no-pid")) {
  			no_pid_file = ISC_TRUE;
  		} else if (!strcmp(argv[i], "--name-alias-map-file")) {
-@@ -818,6 +853,12 @@ main(int argc, char **argv) {
+@@ -842,6 +877,12 @@ main(int argc, char **argv) {
  	/* Discover all the network interfaces. */
  	discover_interfaces(DISCOVER_RELAY);
  
@@ -112,3 +112,6 @@ index ff0ad17..31fe61b 100644
  #ifdef DHCPv6
  	if (local_family == AF_INET6)
  		setup_streams();
+-- 
+2.25.1
+
diff --git a/src/isc-dhcp/patch/series b/src/isc-dhcp/patch/series
index 5a58b41b1..755200d9e 100644
--- a/src/isc-dhcp/patch/series
+++ b/src/isc-dhcp/patch/series
@@ -11,7 +11,6 @@
 0010-Bugfix-correctly-set-interface-netmask.patch
 0011-dhcp-relay-Prevent-Buffer-Overrun.patch
 0012-add-option-si-to-support-using-src-intf-ip-in-relay.patch
-0013-Fix-dhcrelay-agent-option-buffer-pointer-logic.patch
 0014-enable-parallel-build.patch
 0015-option-to-set-primary-address-in-interface.patch
 0016-Don-t-look-up-the-ifindex-for-fallback.patch

From 0688aa38ae83feda6ce7af50941600413fedc662 Mon Sep 17 00:00:00 2001
From: Vladimir Kuk <31180446+VladimirKuk@users.noreply.github.com>
Date: Thu, 21 Mar 2024 19:51:04 +0200
Subject: [PATCH 0352/1115] Missing container in list support in YANG Model
 #16704 (#18091)

Fixes "Missing container in list support in YANG Model https://github.com/sonic-net/sonic-buildimage/issues/16704"

Why I did it
Adds support for container in list

How I did it
Identify container in list's leaf and add its data.

Fixes "Update dhcpv6 option yang model" #16290

Why I did it
Adds support for single "choice" statement in container/list

How I did it
Check if choice data is dictionary (instead of list).

How to verify it
Reconstruction details in bug's description.

Tested branch (Please provide the tested image version)
 202311
Description for the changelog
Adds support for container in list to yang parsing

Link to config_db schema for YANG module changes
https://github.com/sonic-net/sonic-buildimage/blob/master/src/sonic-yang-models/doc/Configuration.md#dhcp_relay

Signed-off-by: vkuk [vkuk@marvell.com]
---
 src/sonic-yang-mgmt/sonic_yang_ext.py         |  66 ++++++++++-
 .../libyang-python-tests/config_data.json     |  34 ++++++
 .../test-yang-structure.yang                  | 105 ++++++++++++++++++
 .../libyang-python-tests/test_SonicYang.json  |   8 ++
 4 files changed, 210 insertions(+), 3 deletions(-)
 create mode 100755 src/sonic-yang-mgmt/tests/libyang-python-tests/sample-yang-models/test-yang-structure.yang

diff --git a/src/sonic-yang-mgmt/sonic_yang_ext.py b/src/sonic-yang-mgmt/sonic_yang_ext.py
index 6fd4f4ef4..c1624e695 100644
--- a/src/sonic-yang-mgmt/sonic_yang_ext.py
+++ b/src/sonic-yang-mgmt/sonic_yang_ext.py
@@ -378,10 +378,17 @@ def _createLeafDict(self, model, table):
         #choices, this is tricky, since leafs are under cases in tree.
         choices = model.get('choice')
         if choices:
-            for choice in choices:
-                cases = choice['case']
+            # If single choice exists in container/list
+            if isinstance(choices, dict):
+                cases = choices['case']
                 for case in cases:
                     self._fillLeafDict(case.get('leaf'), leafDict)
+            # If multiple choices exist in container/list
+            else:
+                for choice in choices:
+                    cases = choice['case']
+                    for case in cases:
+                        self._fillLeafDict(case.get('leaf'), leafDict)
 
         # leaf-lists
         self._fillLeafDict(model.get('leaf-list'), leafDict, True)
@@ -535,6 +542,29 @@ def _xlateType1MapList(self, model, yang, config, table, exceptionList):
                 continue
         return
 
+    """
+    Process container inside a List.
+    This function will call xlateContainer based on Container(s) present
+    in outer List.
+    """
+    def _xlateContainerInList(self, model, yang, configC, table):
+        ccontainer = model
+        ccName = ccontainer.get('@name')
+        if ccName not in configC:
+            # Inner container doesn't exist in config
+            return
+
+        if bool(configC[ccName]):
+            # Empty container - return
+            return
+
+        self.sysLog(msg="xlateProcessListOfContainer: {}".format(ccName))
+        self.elementPath.append(ccName)
+        self._xlateContainer(ccontainer, yang, configC[ccName], table)
+        self.elementPath.pop()
+
+        return
+
     """
     Xlate a list
     This function will xlate from a dict in config DB to a Yang JSON list
@@ -553,6 +583,9 @@ def _xlateList(self, model, yang, config, table, exceptionList):
             self._xlateType1MapList(model, yang, config, table, exceptionList)
             return
 
+        # For handling of container(s) in list
+        ccontainer = model.get('container')
+
         #create a dict to map each key under primary key with a dict yang model.
         #This is done to improve performance of mapping from values of TABLEs in
         #config DB to leaf in YANG LIST.
@@ -572,6 +605,19 @@ def _xlateList(self, model, yang, config, table, exceptionList):
                 keyDict = self._extractKey(pkey, listKeys)
                 # fill rest of the values in keyDict
                 for vKey in config[pkey]:
+                    if ccontainer and vKey == ccontainer.get('@name'):
+                        self.sysLog(syslog.LOG_DEBUG, "xlateList Handle container {} in list {}".\
+                            format(vKey, table))
+                        yangContainer = dict()
+                        if isinstance(ccontainer, dict) and bool(config):
+                            self._xlateContainerInList(ccontainer, yangContainer, config[pkey], table)
+                        # If multi-list exists in container,
+                        elif ccontainer and isinstance(ccontainer, list) and bool(config):
+                            for modelContainer in ccontainer:
+                                self._xlateContainerInList(modelContainer, yangContainer, config[pkey], table)
+                        if len(yangContainer):
+                            keyDict[vKey] = yangContainer
+                        continue
                     self.elementPath.append(vKey)
                     self.sysLog(syslog.LOG_DEBUG, "xlateList vkey {}".format(vKey))
                     try:
@@ -617,7 +663,7 @@ def _xlateListInContainer(self, model, yang, configC, table, exceptionList):
     """
     def _xlateContainerInContainer(self, model, yang, configC, table):
         ccontainer = model
-        ccName = ccontainer['@name']
+        ccName = ccontainer.get('@name')
         yang[ccName] = dict()
         if ccName not in configC:
             # Inner container doesn't exist in config
@@ -876,6 +922,9 @@ def _revXlateList(self, model, yang, config, table):
            self._revXlateType1MapList(model, yang, config, table)
            return
 
+        # For handling of container(s) in list
+        ccontainer = model.get('container')
+
         # get keys from YANG model list itself
         listKeys = model['key']['@value']
         # create a dict to map each key under primary key with a dict yang model.
@@ -894,6 +943,17 @@ def _revXlateList(self, model, yang, config, table):
                 # fill rest of the entries
                 for key in entry:
                     if key not in pkeydict:
+                        if ccontainer and key == ccontainer['@name']:
+                            self.sysLog(syslog.LOG_DEBUG, "revXlateList handle container {} in list {}".format(pkey, table))
+                            # IF container has only one inner container
+                            if isinstance(ccontainer, dict):
+                                self._revXlateContainerInContainer(ccontainer, entry, config[pkey], table)
+                            # IF container has many inner container
+                            elif isinstance(ccontainer, list):
+                                for modelContainer in ccontainer:
+                                    self._revXlateContainerInContainer(modelContainer, entry, config[pkey], table)
+                            continue
+
                         self.elementPath.append(key)
                         config[pkey][key] = self._revFindYangTypedValue(key, \
                             entry[key], leafDict)
diff --git a/src/sonic-yang-mgmt/tests/libyang-python-tests/config_data.json b/src/sonic-yang-mgmt/tests/libyang-python-tests/config_data.json
index 8a4eaed17..154ef21b4 100644
--- a/src/sonic-yang-mgmt/tests/libyang-python-tests/config_data.json
+++ b/src/sonic-yang-mgmt/tests/libyang-python-tests/config_data.json
@@ -256,5 +256,39 @@
 				}
 			]
 		}
+	},
+
+	"test-yang-structure:test-yang-container": {
+		"test-yang-structure:YANG_STRUCT_TEST": {
+			"YANG_LIST_TEST_LIST": [{
+					"name" : "Vlan1001",
+					"leaf-list-test": [
+						"fc02:2000::1",
+						"fc02:2000::2"
+					],
+					"container-in-list-test": {
+						"leaf-1": true,
+						"leaf-2": "test1",
+						"mc-case-leaf-1": 55,
+						"mc-case-leaf-3": 1234
+					},
+					"case-leaf-1": 101
+				},
+				{
+					"name" : "Test123",
+					"leaf-list-test": [
+						"3003:2000::1",
+						"2002:2001::2"
+					],
+					"container-in-list-test": {
+						"leaf-1": false,
+						"leaf-2": "test2",
+						"mc-case-leaf-2": 77,
+						"mc-case-leaf-3": 4321
+					},
+					"case-leaf-2": 1001
+				}
+			]
+		}
 	}
 }
diff --git a/src/sonic-yang-mgmt/tests/libyang-python-tests/sample-yang-models/test-yang-structure.yang b/src/sonic-yang-mgmt/tests/libyang-python-tests/sample-yang-models/test-yang-structure.yang
new file mode 100755
index 000000000..1f57ae337
--- /dev/null
+++ b/src/sonic-yang-mgmt/tests/libyang-python-tests/sample-yang-models/test-yang-structure.yang
@@ -0,0 +1,105 @@
+module test-yang-structure {
+
+  namespace "http://github.com/sonic-net/test";
+  prefix yangstructtest;
+
+  yang-version 1.1;
+
+  import ietf-yang-types {
+    prefix yang;
+  }
+
+  import ietf-inet-types {
+    prefix inet;
+  }
+
+  import test-head {
+    prefix head;
+    revision-date 2019-07-01;
+  }
+
+  revision 2021-10-30 {
+    description "First Revision";
+  }
+
+  container test-yang-container {
+
+    container YANG_STRUCT_TEST {
+
+      description "sample test container";
+
+      list YANG_LIST_TEST_LIST {
+
+        key "name";
+
+        leaf name {
+          type string;
+        }
+
+        leaf-list leaf-list-test {
+          description "Test leaf-list statement";
+          type inet:ipv6-address;
+        }
+
+        container container-in-list-test {
+          leaf leaf-1 {
+            description "test leaf in container";
+            type string {
+              pattern "false|true";
+            }
+          }
+
+          leaf leaf-2 {
+            description "test leaf in container";
+            type string;
+          }
+
+          choice multi-choice-in-container-test-1 {
+            case mc-case-test-1 {
+              leaf mc-case-leaf-1 {
+                description "test leaf in multi choice";
+                type uint32;
+              }
+            }
+
+            case mc-case-test-2 {
+              leaf mc-case-leaf-2 {
+                description "test leaf in multi choice";
+                type uint8;
+              }
+            }
+          }
+
+          choice multi-choice-in-container-test-2 {
+            case mc-case-test-3 {
+              leaf mc-case-leaf-3 {
+                description "test leaf in multi choice";
+                type uint16;
+              }
+            }
+          }
+        }
+
+        choice single-choice-in-list-test {
+          case case-test-1 {
+            leaf case-leaf-1 {
+              description "test leaf in single choice";
+              type uint32;
+            }
+          }
+
+          case case-test-2 {
+            leaf case-leaf-2 {
+              description "test leaf in single choice";
+              type uint16;
+            }
+          }
+        }
+      }
+      /* end of YANG_LIST_TEST_LIST */
+    }
+    /* end of container YANG_STRUCT_TEST */
+  }
+  /* end of container test-yang-container */
+}
+/* end of module test-yang-structure */
diff --git a/src/sonic-yang-mgmt/tests/libyang-python-tests/test_SonicYang.json b/src/sonic-yang-mgmt/tests/libyang-python-tests/test_SonicYang.json
index b62322d50..2376c357b 100644
--- a/src/sonic-yang-mgmt/tests/libyang-python-tests/test_SonicYang.json
+++ b/src/sonic-yang-mgmt/tests/libyang-python-tests/test_SonicYang.json
@@ -168,6 +168,10 @@
       {
          "file" : "test-vlan.yang",
          "module" : "test-vlan"
+      },
+      {
+         "file" : "test-yang-structure.yang",
+         "module" : "test-yang-structure"
       }
    ],
    "new_nodes" : [
@@ -244,6 +248,10 @@
       {
          "module_name" : "test-vlan",
          "module_prefix" : "vlan"
+      },
+      {
+         "module_name" : "test-yang-structure",
+         "module_prefix" : "yangstructtest"
       }
    ],
    "schema_dependencies" : [

From 4ee6b6e8b56bf46806103045aec3864061bfad29 Mon Sep 17 00:00:00 2001
From: Ze Gan <ganze718@gmail.com>
Date: Fri, 22 Mar 2024 07:39:02 +0800
Subject: [PATCH 0353/1115] [Fixbug 18418] [Yang] MACSEC_PROFILE table does not
 match yang definition (#18419)

### Why I did it
Fix the issue [18418](https://github.com/sonic-net/sonic-buildimage/issues/18418), The YANG model to MACsec fallback cak/ckn is wrong. We should allow the fallback option is empty.

### How I did it
Add a condition to check whether the fallback is providered

#### How to verify it
Check Azp
---
 .../tests/yang_model_tests/tests_config/macsec.json  | 12 ++++++++++++
 src/sonic-yang-models/yang-models/sonic-macsec.yang  |  4 ++--
 2 files changed, 14 insertions(+), 2 deletions(-)

diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/macsec.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/macsec.json
index 5c748606e..89abcb386 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/macsec.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/macsec.json
@@ -30,6 +30,18 @@
                         "replay_window": 64,
                         "send_sci": "true",
                         "rekey_period": 3600
+                    },
+                    {
+                        "name": "test_nofallback",
+                        "priority": 64,
+                        "cipher_suite": "GCM-AES-XPN-256",
+                        "primary_cak": "5207554155500e5d5157786d6c2a3d2031425a5e577e7e727f6b6c03312432262706080a00005b554f4e007975707670725b0a54540c0252445e5d7a29252b046a",
+                        "primary_ckn": "6162636465666768696A6B6C6D6E6F706162636465666768696A6B6C6D6E6F70",
+                        "policy": "security",
+                        "enable_replay_protect": "true",
+                        "replay_window": 64,
+                        "send_sci": "true",
+                        "rekey_period": 3600
                     }
                 ]
             }
diff --git a/src/sonic-yang-models/yang-models/sonic-macsec.yang b/src/sonic-yang-models/yang-models/sonic-macsec.yang
index b3d04b725..2d76737ee 100644
--- a/src/sonic-yang-models/yang-models/sonic-macsec.yang
+++ b/src/sonic-yang-models/yang-models/sonic-macsec.yang
@@ -70,9 +70,9 @@ module sonic-macsec {
                     }
                 }
 
-                must "string-length(fallback_cak) = string-length(primary_cak)";
+                must "string-length(fallback_cak) = 0 or string-length(fallback_cak) = string-length(primary_cak)";
 
-                must "primary_ckn != fallback_ckn";
+                must "string-length(fallback_ckn) = 0 or primary_ckn != fallback_ckn";
 
                 leaf policy {
                     type string {

From c91d45ae6cd486214818fd8d640c2817ae915d9c Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Fri, 22 Mar 2024 19:01:23 +0800
Subject: [PATCH 0354/1115] [submodule] Update submodule sonic-swss-common to
 the latest HEAD automatically (#18434)

#### Why I did it
src/sonic-swss-common
```
* 8e24ced - (HEAD -> master, origin/master, origin/HEAD) Add SWIG GO wrapper for ConfigDBConnector. (#865) (13 hours ago) [Hua Liu]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-swss-common | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-swss-common b/src/sonic-swss-common
index e7917acd2..8e24cedf0 160000
--- a/src/sonic-swss-common
+++ b/src/sonic-swss-common
@@ -1 +1 @@
-Subproject commit e7917acd2d4a9c0121802437e3c899bd513ac888
+Subproject commit 8e24cedf016c73112561eac4c7f6a6fe3b21faf3

From d4300fc34f8a3fea4a8063d928bea1ff7c2dcf0d Mon Sep 17 00:00:00 2001
From: "Marty Y. Lok" <76118573+mlok-nokia@users.noreply.github.com>
Date: Fri, 22 Mar 2024 17:18:47 -0400
Subject: [PATCH 0355/1115] [build_debian] libgrpc++1 installation for bookworm
 debian image build (#18034)

Why I did it
Fix libgrpc++ bookworm debian installation issue. Fix #18033

How I did it
Modified the build_debian.sh to change the libgrpc++1 to libgrcp++1.51 for debian bookworm image build

How to verify it
After the image is built in the workspace, verify the libgrpc++.so.1.51 is installed in fsroot-broadcom-dnx/lib/x86_64-linux-gnu diretcory

~/data/master/sonic-buildimage/fsroot-broadcom-dnx/lib/x86_64-linux-gnu (master)$ ls libgrpc++.so.1.51
libgrpc++.so.1.51
~/data/master/sonic-buildimage/fsroot-broadcom-dnx/lib/x86_64-linux-gnu (master)$

Signed-off-by: mlok <marty.lok@nokia.com>
---
 build_debian.sh | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/build_debian.sh b/build_debian.sh
index b9dfd47bb..4b0504b40 100755
--- a/build_debian.sh
+++ b/build_debian.sh
@@ -393,8 +393,8 @@ sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y in
     python-is-python3       \
     cron                    \
     libprotobuf32           \
-    libgrpc++1              \
     libgrpc29               \
+    libgrpc++1.51           \
     haveged                 \
     fdisk                   \
     gpg                     \

From 2e81eff2e8a878d48fb53183808e4a1260336f12 Mon Sep 17 00:00:00 2001
From: "Marty Y. Lok" <76118573+mlok-nokia@users.noreply.github.com>
Date: Fri, 22 Mar 2024 17:20:12 -0400
Subject: [PATCH 0356/1115] [Supervisor][datbase-chassis] Fixthe failure of
 starting redis_chassis in database-chassis on Supervisor (#18242)

Why I did it
redis_chassis process fails to start in the database-chassis on the supervisor card.

How I did it
The redis and redis_chassis processes in supervisor.conf has been modified to start with 'redis' as user. The modification only added redis and redis group for database containers except database-chassis container. This commit adds code to the docker-database-init.sh to add redis and redis group for the database-chassis to address this issue.

How to verify it
Booting the image on Supervisor. And verify the database-chassis container should be in UP state, and the database-chassis.service is in active(running) state

admin@ixre-cpm-chassis15:~$ docker ps -a
CONTAINER ID   IMAGE                             COMMAND                  CREATED        STATUS        PORTS     NAMES
9691c6111e0f   docker-fpm-frr:latest             "/usr/bin/docker_ini?"   16 hours ago   Up 16 hours             bgp5
...
c7c7159d4e0c   docker-database:latest            "/usr/local/bin/dock?"   31 hours ago   Up 16 hours             database-chassis


admin@ixre-cpm-chassis15:~$ sudo systemctl status database-chassis
? database-chassis.service - database-chassis container
     Loaded: loaded (/lib/systemd/system/database-chassis.service; enabled-runtime; preset: enabled)
     Active: active (running) since Sun 2024-03-03 04:43:12 UTC; 16h ago
    Process: 1640 ExecStartPre=/usr/bin/database.sh start chassisdb (code=exited, status=0/SUCCESS)
   Main PID: 1938 (database.sh)
      Tasks: 10 (limit: 38307)
     Memory: 49.7M
     CGroup: /system.slice/database-chassis.service
             ??1938 /bin/bash /usr/bin/database.sh wait chassisdb
             ??1940 docker wait database-chassis

Notice: journal has been rotated since unit was started, output may be incomplete.
admin@ixre-cpm-chassis15:~$

Signed-off-by: mlok <marty.lok@nokia.com>
---
 dockers/docker-database/docker-database-init.sh | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/dockers/docker-database/docker-database-init.sh b/dockers/docker-database/docker-database-init.sh
index f6f8522bb..f3679e08a 100755
--- a/dockers/docker-database/docker-database-init.sh
+++ b/dockers/docker-database/docker-database-init.sh
@@ -61,12 +61,16 @@ cp $db_cfg_file $db_cfg_file_tmp
 if [[ $DATABASE_TYPE == "chassisdb" ]]; then
     # Docker init for database-chassis
     echo "Init docker-database-chassis..."
+    VAR_LIB_REDIS_CHASSIS_DIR="/var/lib/redis_chassis"
+    mkdir -p $VAR_LIB_REDIS_CHASSIS_DIR   
     update_chassisdb_config -j $db_cfg_file_tmp -k -p $chassis_db_port
     # generate all redis server supervisord configuration file
     sonic-cfggen -j $db_cfg_file_tmp \
     -t /usr/share/sonic/templates/supervisord.conf.j2,/etc/supervisor/conf.d/supervisord.conf \
     -t /usr/share/sonic/templates/critical_processes.j2,/etc/supervisor/critical_processes
     rm $db_cfg_file_tmp
+    chown -R redis:redis $VAR_LIB_REDIS_CHASSIS_DIR
+    chown -R redis:redis $REDIS_DIR
     exec /usr/local/bin/supervisord
     exit 0
 fi

From 009b029f99eac7149409dd6ee841961a9bc3580b Mon Sep 17 00:00:00 2001
From: Nazarii Hnydyn <nazariig@nvidia.com>
Date: Sat, 23 Mar 2024 00:13:32 +0200
Subject: [PATCH 0357/1115] [Mellanox][MFT]: Update MFT to 4.27.0-83: bash
 login fix (#18443)

* Revert "[Mellanox] Disable MFT bash autocompletion (#17442)"

This reverts commit 278a9585171eedfc60f942374602ad52ff928071.

* [mellanox][mft]: Update MFT to 4.27.0-83: bash login fix.

Signed-off-by: Nazarii Hnydyn <nazariig@nvidia.com>

---------

Signed-off-by: Nazarii Hnydyn <nazariig@nvidia.com>
---
 platform/mellanox/mft.mk       |  4 ++--
 platform/mellanox/mft/Makefile | 16 +---------------
 2 files changed, 3 insertions(+), 17 deletions(-)

diff --git a/platform/mellanox/mft.mk b/platform/mellanox/mft.mk
index 2fd01811e..4dbdf07cf 100644
--- a/platform/mellanox/mft.mk
+++ b/platform/mellanox/mft.mk
@@ -16,8 +16,8 @@
 #
 # Mellanox SAI
 
-MFT_VERSION = 4.25.0
-MFT_REVISION = 62
+MFT_VERSION = 4.27.0
+MFT_REVISION = 83
 
 MLNX_MFT_INTERNAL_SOURCE_BASE_URL =
 
diff --git a/platform/mellanox/mft/Makefile b/platform/mellanox/mft/Makefile
index 2447e4b2a..2f331ea87 100644
--- a/platform/mellanox/mft/Makefile
+++ b/platform/mellanox/mft/Makefile
@@ -42,8 +42,7 @@ DERIVED_TARGETS = mft-oem_$(MFT_VERSION)-$(MFT_REVISION)_$(CONFIGURED_ARCH).deb
 DKMS_CTRL = /var/lib/dkms/kernel-mft-dkms/
 DKMS_TMP := $(shell mktemp -u -d -t dkms.XXXXXXXXXX)
 
-MFT_DEB_TMP := $(shell mktemp -u -d -t mft.deb.XXXXXXXXXX)
-MFT_TMP := $(shell mktemp -u -d -t mft.XXXXXXXXXX)
+MFT_TMP = /tmp/mft_build/
 
 $(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% :
 	mkdir -p $(MFT_TMP)
@@ -51,19 +50,6 @@ $(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% :
 	wget -O $(MFT_TGZ) $(MFT_TGZ_URL)
 	tar xzf $(MFT_TGZ)
 
-	# w/a: disable bash autocompletion
-	mkdir -p $(MFT_DEB_TMP)/DEBIAN
-
-	dpkg -e $(MFT_NAME)/DEBS/$(MAIN_TARGET) $(MFT_DEB_TMP)/DEBIAN
-	dpkg -x $(MFT_NAME)/DEBS/$(MAIN_TARGET) $(MFT_DEB_TMP)
-
-	rm -rf $(MFT_DEB_TMP)/etc/bash_completion.d
-	sed -i '/bash_completion.d/d' $(MFT_DEB_TMP)/DEBIAN/conffiles
-
-	dpkg -b $(MFT_DEB_TMP) $(MFT_NAME)/DEBS/$(MAIN_TARGET)
-
-	rm -rf $(MFT_DEB_TMP)
-
 	# fix timestamp
 	touch $(MFT_NAME)/DEBS/*.deb
 	mv $(MFT_NAME)/DEBS/*.deb $(DEST)

From 84ec2a43e06a4c8c57393bd5ccd494c5d1b1c4e4 Mon Sep 17 00:00:00 2001
From: jfeng-arista <98421150+jfeng-arista@users.noreply.github.com>
Date: Fri, 22 Mar 2024 16:25:39 -0700
Subject: [PATCH 0358/1115] Fix arista_7800r3a_36d2_lc fabric link down issue
 (#18198)

---
 .../1/j2p-a7800r3a-36d-36x400G.config.bcm     | 102 +++++++++---------
 .../1/j2p-a7800r3a-36d-36x400G.config.bcm     | 102 +++++++++---------
 .../1/j2p-a7800r3a-36d-36x400G.config.bcm     | 102 +++++++++---------
 3 files changed, 153 insertions(+), 153 deletions(-)

diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/1/j2p-a7800r3a-36d-36x400G.config.bcm b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/1/j2p-a7800r3a-36d-36x400G.config.bcm
index cc7d79bc2..5ece4f833 100644
--- a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/1/j2p-a7800r3a-36d-36x400G.config.bcm
+++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/1/j2p-a7800r3a-36d-36x400G.config.bcm
@@ -453,17 +453,17 @@ fabric_connect_mode=FE
 fabric_logical_port_base=512
 
 # Fabric lane mapping
-lane_to_serdes_map_fabric_lane0=rx0:tx0
+lane_to_serdes_map_fabric_lane0=rx0:tx3
 lane_to_serdes_map_fabric_lane1=rx1:tx1
 lane_to_serdes_map_fabric_lane2=rx2:tx2
-lane_to_serdes_map_fabric_lane3=rx3:tx3
+lane_to_serdes_map_fabric_lane3=rx3:tx0
 lane_to_serdes_map_fabric_lane4=rx4:tx4
 lane_to_serdes_map_fabric_lane5=rx5:tx5
 lane_to_serdes_map_fabric_lane6=rx6:tx6
 lane_to_serdes_map_fabric_lane7=rx7:tx7
-lane_to_serdes_map_fabric_lane8=rx8:tx10
+lane_to_serdes_map_fabric_lane8=rx8:tx9
 lane_to_serdes_map_fabric_lane9=rx9:tx11
-lane_to_serdes_map_fabric_lane10=rx10:tx9
+lane_to_serdes_map_fabric_lane10=rx10:tx10
 lane_to_serdes_map_fabric_lane11=rx11:tx8
 lane_to_serdes_map_fabric_lane12=rx12:tx12
 lane_to_serdes_map_fabric_lane13=rx13:tx15
@@ -475,15 +475,15 @@ lane_to_serdes_map_fabric_lane18=rx18:tx16
 lane_to_serdes_map_fabric_lane19=rx19:tx19
 lane_to_serdes_map_fabric_lane20=rx20:tx21
 lane_to_serdes_map_fabric_lane21=rx21:tx23
-lane_to_serdes_map_fabric_lane22=rx22:tx20
-lane_to_serdes_map_fabric_lane23=rx23:tx22
-lane_to_serdes_map_fabric_lane24=rx24:tx26
+lane_to_serdes_map_fabric_lane22=rx22:tx22
+lane_to_serdes_map_fabric_lane23=rx23:tx20
+lane_to_serdes_map_fabric_lane24=rx24:tx25
 lane_to_serdes_map_fabric_lane25=rx25:tx24
-lane_to_serdes_map_fabric_lane26=rx26:tx25
-lane_to_serdes_map_fabric_lane27=rx27:tx27
+lane_to_serdes_map_fabric_lane26=rx26:tx27
+lane_to_serdes_map_fabric_lane27=rx27:tx26
 lane_to_serdes_map_fabric_lane28=rx28:tx31
-lane_to_serdes_map_fabric_lane29=rx29:tx30
-lane_to_serdes_map_fabric_lane30=rx30:tx29
+lane_to_serdes_map_fabric_lane29=rx29:tx29
+lane_to_serdes_map_fabric_lane30=rx30:tx30
 lane_to_serdes_map_fabric_lane31=rx31:tx28
 lane_to_serdes_map_fabric_lane32=rx32:tx32
 lane_to_serdes_map_fabric_lane33=rx33:tx33
@@ -522,17 +522,17 @@ lane_to_serdes_map_fabric_lane65=rx65:tx65
 lane_to_serdes_map_fabric_lane66=rx66:tx66
 lane_to_serdes_map_fabric_lane67=rx67:tx67
 lane_to_serdes_map_fabric_lane68=rx68:tx68
-lane_to_serdes_map_fabric_lane69=rx69:tx69
-lane_to_serdes_map_fabric_lane70=rx70:tx70
-lane_to_serdes_map_fabric_lane71=rx71:tx71
+lane_to_serdes_map_fabric_lane69=rx69:tx70
+lane_to_serdes_map_fabric_lane70=rx70:tx71
+lane_to_serdes_map_fabric_lane71=rx71:tx69
 lane_to_serdes_map_fabric_lane72=rx72:tx75
 lane_to_serdes_map_fabric_lane73=rx73:tx74
 lane_to_serdes_map_fabric_lane74=rx74:tx73
 lane_to_serdes_map_fabric_lane75=rx75:tx72
-lane_to_serdes_map_fabric_lane76=rx76:tx79
+lane_to_serdes_map_fabric_lane76=rx76:tx76
 lane_to_serdes_map_fabric_lane77=rx77:tx78
 lane_to_serdes_map_fabric_lane78=rx78:tx77
-lane_to_serdes_map_fabric_lane79=rx79:tx76
+lane_to_serdes_map_fabric_lane79=rx79:tx79
 lane_to_serdes_map_fabric_lane80=rx80:tx80
 lane_to_serdes_map_fabric_lane81=rx81:tx81
 lane_to_serdes_map_fabric_lane82=rx82:tx83
@@ -543,11 +543,11 @@ lane_to_serdes_map_fabric_lane86=rx86:tx84
 lane_to_serdes_map_fabric_lane87=rx87:tx87
 lane_to_serdes_map_fabric_lane88=rx88:tx90
 lane_to_serdes_map_fabric_lane89=rx89:tx88
-lane_to_serdes_map_fabric_lane90=rx90:tx91
-lane_to_serdes_map_fabric_lane91=rx91:tx89
+lane_to_serdes_map_fabric_lane90=rx90:tx89
+lane_to_serdes_map_fabric_lane91=rx91:tx91
 lane_to_serdes_map_fabric_lane92=rx92:tx93
-lane_to_serdes_map_fabric_lane93=rx93:tx92
-lane_to_serdes_map_fabric_lane94=rx94:tx94
+lane_to_serdes_map_fabric_lane93=rx93:tx94
+lane_to_serdes_map_fabric_lane94=rx94:tx92
 lane_to_serdes_map_fabric_lane95=rx95:tx95
 lane_to_serdes_map_fabric_lane96=rx96:tx96
 lane_to_serdes_map_fabric_lane97=rx97:tx97
@@ -557,30 +557,30 @@ lane_to_serdes_map_fabric_lane100=rx100:tx100
 lane_to_serdes_map_fabric_lane101=rx101:tx101
 lane_to_serdes_map_fabric_lane102=rx102:tx102
 lane_to_serdes_map_fabric_lane103=rx103:tx103
-lane_to_serdes_map_fabric_lane104=rx104:tx105
-lane_to_serdes_map_fabric_lane105=rx105:tx106
-lane_to_serdes_map_fabric_lane106=rx106:tx107
-lane_to_serdes_map_fabric_lane107=rx107:tx104
-lane_to_serdes_map_fabric_lane108=rx108:tx111
+lane_to_serdes_map_fabric_lane104=rx104:tx104
+lane_to_serdes_map_fabric_lane105=rx105:tx107
+lane_to_serdes_map_fabric_lane106=rx106:tx106
+lane_to_serdes_map_fabric_lane107=rx107:tx105
+lane_to_serdes_map_fabric_lane108=rx108:tx108
 lane_to_serdes_map_fabric_lane109=rx109:tx109
 lane_to_serdes_map_fabric_lane110=rx110:tx110
-lane_to_serdes_map_fabric_lane111=rx111:tx108
-lane_to_serdes_map_fabric_lane112=rx112:tx114
-lane_to_serdes_map_fabric_lane113=rx113:tx113
+lane_to_serdes_map_fabric_lane111=rx111:tx111
+lane_to_serdes_map_fabric_lane112=rx112:tx115
+lane_to_serdes_map_fabric_lane113=rx113:tx114
 lane_to_serdes_map_fabric_lane114=rx114:tx112
-lane_to_serdes_map_fabric_lane115=rx115:tx115
-lane_to_serdes_map_fabric_lane116=rx116:tx117
-lane_to_serdes_map_fabric_lane117=rx117:tx116
-lane_to_serdes_map_fabric_lane118=rx118:tx119
-lane_to_serdes_map_fabric_lane119=rx119:tx118
-lane_to_serdes_map_fabric_lane120=rx120:tx123
-lane_to_serdes_map_fabric_lane121=rx121:tx120
-lane_to_serdes_map_fabric_lane122=rx122:tx122
-lane_to_serdes_map_fabric_lane123=rx123:tx121
-lane_to_serdes_map_fabric_lane124=rx124:tx127
-lane_to_serdes_map_fabric_lane125=rx125:tx125
-lane_to_serdes_map_fabric_lane126=rx126:tx124
-lane_to_serdes_map_fabric_lane127=rx127:tx126
+lane_to_serdes_map_fabric_lane115=rx115:tx113
+lane_to_serdes_map_fabric_lane116=rx116:tx118
+lane_to_serdes_map_fabric_lane117=rx117:tx119
+lane_to_serdes_map_fabric_lane118=rx118:tx116
+lane_to_serdes_map_fabric_lane119=rx119:tx117
+lane_to_serdes_map_fabric_lane120=rx120:tx121
+lane_to_serdes_map_fabric_lane121=rx121:tx122
+lane_to_serdes_map_fabric_lane122=rx122:tx120
+lane_to_serdes_map_fabric_lane123=rx123:tx123
+lane_to_serdes_map_fabric_lane124=rx124:tx124
+lane_to_serdes_map_fabric_lane125=rx125:tx127
+lane_to_serdes_map_fabric_lane126=rx126:tx126
+lane_to_serdes_map_fabric_lane127=rx127:tx125
 lane_to_serdes_map_fabric_lane128=rx128:tx128
 lane_to_serdes_map_fabric_lane129=rx129:tx129
 lane_to_serdes_map_fabric_lane130=rx130:tx130
@@ -593,12 +593,12 @@ lane_to_serdes_map_fabric_lane136=rx136:tx139
 lane_to_serdes_map_fabric_lane137=rx137:tx138
 lane_to_serdes_map_fabric_lane138=rx138:tx137
 lane_to_serdes_map_fabric_lane139=rx139:tx136
-lane_to_serdes_map_fabric_lane140=rx140:tx140
+lane_to_serdes_map_fabric_lane140=rx140:tx143
 lane_to_serdes_map_fabric_lane141=rx141:tx142
 lane_to_serdes_map_fabric_lane142=rx142:tx141
-lane_to_serdes_map_fabric_lane143=rx143:tx143
-lane_to_serdes_map_fabric_lane144=rx144:tx144
-lane_to_serdes_map_fabric_lane145=rx145:tx145
+lane_to_serdes_map_fabric_lane143=rx143:tx140
+lane_to_serdes_map_fabric_lane144=rx144:tx145
+lane_to_serdes_map_fabric_lane145=rx145:tx144
 lane_to_serdes_map_fabric_lane146=rx146:tx146
 lane_to_serdes_map_fabric_lane147=rx147:tx147
 lane_to_serdes_map_fabric_lane148=rx148:tx148
@@ -614,8 +614,8 @@ lane_to_serdes_map_fabric_lane157=rx157:tx158
 lane_to_serdes_map_fabric_lane158=rx158:tx157
 lane_to_serdes_map_fabric_lane159=rx159:tx156
 lane_to_serdes_map_fabric_lane160=rx160:tx160
-lane_to_serdes_map_fabric_lane161=rx161:tx161
-lane_to_serdes_map_fabric_lane162=rx162:tx162
+lane_to_serdes_map_fabric_lane161=rx161:tx162
+lane_to_serdes_map_fabric_lane162=rx162:tx161
 lane_to_serdes_map_fabric_lane163=rx163:tx163
 lane_to_serdes_map_fabric_lane164=rx164:tx164
 lane_to_serdes_map_fabric_lane165=rx165:tx165
@@ -639,11 +639,11 @@ lane_to_serdes_map_fabric_lane182=rx182:tx180
 lane_to_serdes_map_fabric_lane183=rx183:tx183
 lane_to_serdes_map_fabric_lane184=rx184:tx186
 lane_to_serdes_map_fabric_lane185=rx185:tx184
-lane_to_serdes_map_fabric_lane186=rx186:tx185
-lane_to_serdes_map_fabric_lane187=rx187:tx187
-lane_to_serdes_map_fabric_lane188=rx188:tx188
+lane_to_serdes_map_fabric_lane186=rx186:tx187
+lane_to_serdes_map_fabric_lane187=rx187:tx185
+lane_to_serdes_map_fabric_lane188=rx188:tx190
 lane_to_serdes_map_fabric_lane189=rx189:tx189
-lane_to_serdes_map_fabric_lane190=rx190:tx190
+lane_to_serdes_map_fabric_lane190=rx190:tx188
 lane_to_serdes_map_fabric_lane191=rx191:tx191
 
 #
diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/1/j2p-a7800r3a-36d-36x400G.config.bcm b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/1/j2p-a7800r3a-36d-36x400G.config.bcm
index 97a58f37a..ed7d23113 100644
--- a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/1/j2p-a7800r3a-36d-36x400G.config.bcm
+++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/1/j2p-a7800r3a-36d-36x400G.config.bcm
@@ -471,17 +471,17 @@ fabric_connect_mode=FE
 fabric_logical_port_base=512
 
 # Fabric lane mapping
-lane_to_serdes_map_fabric_lane0=rx0:tx0
+lane_to_serdes_map_fabric_lane0=rx0:tx3
 lane_to_serdes_map_fabric_lane1=rx1:tx1
 lane_to_serdes_map_fabric_lane2=rx2:tx2
-lane_to_serdes_map_fabric_lane3=rx3:tx3
+lane_to_serdes_map_fabric_lane3=rx3:tx0
 lane_to_serdes_map_fabric_lane4=rx4:tx4
 lane_to_serdes_map_fabric_lane5=rx5:tx5
 lane_to_serdes_map_fabric_lane6=rx6:tx6
 lane_to_serdes_map_fabric_lane7=rx7:tx7
-lane_to_serdes_map_fabric_lane8=rx8:tx10
+lane_to_serdes_map_fabric_lane8=rx8:tx9
 lane_to_serdes_map_fabric_lane9=rx9:tx11
-lane_to_serdes_map_fabric_lane10=rx10:tx9
+lane_to_serdes_map_fabric_lane10=rx10:tx10
 lane_to_serdes_map_fabric_lane11=rx11:tx8
 lane_to_serdes_map_fabric_lane12=rx12:tx12
 lane_to_serdes_map_fabric_lane13=rx13:tx15
@@ -493,15 +493,15 @@ lane_to_serdes_map_fabric_lane18=rx18:tx16
 lane_to_serdes_map_fabric_lane19=rx19:tx19
 lane_to_serdes_map_fabric_lane20=rx20:tx21
 lane_to_serdes_map_fabric_lane21=rx21:tx23
-lane_to_serdes_map_fabric_lane22=rx22:tx20
-lane_to_serdes_map_fabric_lane23=rx23:tx22
-lane_to_serdes_map_fabric_lane24=rx24:tx26
+lane_to_serdes_map_fabric_lane22=rx22:tx22
+lane_to_serdes_map_fabric_lane23=rx23:tx20
+lane_to_serdes_map_fabric_lane24=rx24:tx25
 lane_to_serdes_map_fabric_lane25=rx25:tx24
-lane_to_serdes_map_fabric_lane26=rx26:tx25
-lane_to_serdes_map_fabric_lane27=rx27:tx27
+lane_to_serdes_map_fabric_lane26=rx26:tx27
+lane_to_serdes_map_fabric_lane27=rx27:tx26
 lane_to_serdes_map_fabric_lane28=rx28:tx31
-lane_to_serdes_map_fabric_lane29=rx29:tx30
-lane_to_serdes_map_fabric_lane30=rx30:tx29
+lane_to_serdes_map_fabric_lane29=rx29:tx29
+lane_to_serdes_map_fabric_lane30=rx30:tx30
 lane_to_serdes_map_fabric_lane31=rx31:tx28
 lane_to_serdes_map_fabric_lane32=rx32:tx32
 lane_to_serdes_map_fabric_lane33=rx33:tx33
@@ -540,17 +540,17 @@ lane_to_serdes_map_fabric_lane65=rx65:tx65
 lane_to_serdes_map_fabric_lane66=rx66:tx66
 lane_to_serdes_map_fabric_lane67=rx67:tx67
 lane_to_serdes_map_fabric_lane68=rx68:tx68
-lane_to_serdes_map_fabric_lane69=rx69:tx69
-lane_to_serdes_map_fabric_lane70=rx70:tx70
-lane_to_serdes_map_fabric_lane71=rx71:tx71
+lane_to_serdes_map_fabric_lane69=rx69:tx70
+lane_to_serdes_map_fabric_lane70=rx70:tx71
+lane_to_serdes_map_fabric_lane71=rx71:tx69
 lane_to_serdes_map_fabric_lane72=rx72:tx75
 lane_to_serdes_map_fabric_lane73=rx73:tx74
 lane_to_serdes_map_fabric_lane74=rx74:tx73
 lane_to_serdes_map_fabric_lane75=rx75:tx72
-lane_to_serdes_map_fabric_lane76=rx76:tx79
+lane_to_serdes_map_fabric_lane76=rx76:tx76
 lane_to_serdes_map_fabric_lane77=rx77:tx78
 lane_to_serdes_map_fabric_lane78=rx78:tx77
-lane_to_serdes_map_fabric_lane79=rx79:tx76
+lane_to_serdes_map_fabric_lane79=rx79:tx79
 lane_to_serdes_map_fabric_lane80=rx80:tx80
 lane_to_serdes_map_fabric_lane81=rx81:tx81
 lane_to_serdes_map_fabric_lane82=rx82:tx83
@@ -561,11 +561,11 @@ lane_to_serdes_map_fabric_lane86=rx86:tx84
 lane_to_serdes_map_fabric_lane87=rx87:tx87
 lane_to_serdes_map_fabric_lane88=rx88:tx90
 lane_to_serdes_map_fabric_lane89=rx89:tx88
-lane_to_serdes_map_fabric_lane90=rx90:tx91
-lane_to_serdes_map_fabric_lane91=rx91:tx89
+lane_to_serdes_map_fabric_lane90=rx90:tx89
+lane_to_serdes_map_fabric_lane91=rx91:tx91
 lane_to_serdes_map_fabric_lane92=rx92:tx93
-lane_to_serdes_map_fabric_lane93=rx93:tx92
-lane_to_serdes_map_fabric_lane94=rx94:tx94
+lane_to_serdes_map_fabric_lane93=rx93:tx94
+lane_to_serdes_map_fabric_lane94=rx94:tx92
 lane_to_serdes_map_fabric_lane95=rx95:tx95
 lane_to_serdes_map_fabric_lane96=rx96:tx96
 lane_to_serdes_map_fabric_lane97=rx97:tx97
@@ -575,30 +575,30 @@ lane_to_serdes_map_fabric_lane100=rx100:tx100
 lane_to_serdes_map_fabric_lane101=rx101:tx101
 lane_to_serdes_map_fabric_lane102=rx102:tx102
 lane_to_serdes_map_fabric_lane103=rx103:tx103
-lane_to_serdes_map_fabric_lane104=rx104:tx105
-lane_to_serdes_map_fabric_lane105=rx105:tx106
-lane_to_serdes_map_fabric_lane106=rx106:tx107
-lane_to_serdes_map_fabric_lane107=rx107:tx104
-lane_to_serdes_map_fabric_lane108=rx108:tx111
+lane_to_serdes_map_fabric_lane104=rx104:tx104
+lane_to_serdes_map_fabric_lane105=rx105:tx107
+lane_to_serdes_map_fabric_lane106=rx106:tx106
+lane_to_serdes_map_fabric_lane107=rx107:tx105
+lane_to_serdes_map_fabric_lane108=rx108:tx108
 lane_to_serdes_map_fabric_lane109=rx109:tx109
 lane_to_serdes_map_fabric_lane110=rx110:tx110
-lane_to_serdes_map_fabric_lane111=rx111:tx108
-lane_to_serdes_map_fabric_lane112=rx112:tx114
-lane_to_serdes_map_fabric_lane113=rx113:tx113
+lane_to_serdes_map_fabric_lane111=rx111:tx111
+lane_to_serdes_map_fabric_lane112=rx112:tx115
+lane_to_serdes_map_fabric_lane113=rx113:tx114
 lane_to_serdes_map_fabric_lane114=rx114:tx112
-lane_to_serdes_map_fabric_lane115=rx115:tx115
-lane_to_serdes_map_fabric_lane116=rx116:tx117
-lane_to_serdes_map_fabric_lane117=rx117:tx116
-lane_to_serdes_map_fabric_lane118=rx118:tx119
-lane_to_serdes_map_fabric_lane119=rx119:tx118
-lane_to_serdes_map_fabric_lane120=rx120:tx123
-lane_to_serdes_map_fabric_lane121=rx121:tx120
-lane_to_serdes_map_fabric_lane122=rx122:tx122
-lane_to_serdes_map_fabric_lane123=rx123:tx121
-lane_to_serdes_map_fabric_lane124=rx124:tx127
-lane_to_serdes_map_fabric_lane125=rx125:tx125
-lane_to_serdes_map_fabric_lane126=rx126:tx124
-lane_to_serdes_map_fabric_lane127=rx127:tx126
+lane_to_serdes_map_fabric_lane115=rx115:tx113
+lane_to_serdes_map_fabric_lane116=rx116:tx118
+lane_to_serdes_map_fabric_lane117=rx117:tx119
+lane_to_serdes_map_fabric_lane118=rx118:tx116
+lane_to_serdes_map_fabric_lane119=rx119:tx117
+lane_to_serdes_map_fabric_lane120=rx120:tx121
+lane_to_serdes_map_fabric_lane121=rx121:tx122
+lane_to_serdes_map_fabric_lane122=rx122:tx120
+lane_to_serdes_map_fabric_lane123=rx123:tx123
+lane_to_serdes_map_fabric_lane124=rx124:tx124
+lane_to_serdes_map_fabric_lane125=rx125:tx127
+lane_to_serdes_map_fabric_lane126=rx126:tx126
+lane_to_serdes_map_fabric_lane127=rx127:tx125
 lane_to_serdes_map_fabric_lane128=rx128:tx128
 lane_to_serdes_map_fabric_lane129=rx129:tx129
 lane_to_serdes_map_fabric_lane130=rx130:tx130
@@ -611,12 +611,12 @@ lane_to_serdes_map_fabric_lane136=rx136:tx139
 lane_to_serdes_map_fabric_lane137=rx137:tx138
 lane_to_serdes_map_fabric_lane138=rx138:tx137
 lane_to_serdes_map_fabric_lane139=rx139:tx136
-lane_to_serdes_map_fabric_lane140=rx140:tx140
+lane_to_serdes_map_fabric_lane140=rx140:tx143
 lane_to_serdes_map_fabric_lane141=rx141:tx142
 lane_to_serdes_map_fabric_lane142=rx142:tx141
-lane_to_serdes_map_fabric_lane143=rx143:tx143
-lane_to_serdes_map_fabric_lane144=rx144:tx144
-lane_to_serdes_map_fabric_lane145=rx145:tx145
+lane_to_serdes_map_fabric_lane143=rx143:tx140
+lane_to_serdes_map_fabric_lane144=rx144:tx145
+lane_to_serdes_map_fabric_lane145=rx145:tx144
 lane_to_serdes_map_fabric_lane146=rx146:tx146
 lane_to_serdes_map_fabric_lane147=rx147:tx147
 lane_to_serdes_map_fabric_lane148=rx148:tx148
@@ -632,8 +632,8 @@ lane_to_serdes_map_fabric_lane157=rx157:tx158
 lane_to_serdes_map_fabric_lane158=rx158:tx157
 lane_to_serdes_map_fabric_lane159=rx159:tx156
 lane_to_serdes_map_fabric_lane160=rx160:tx160
-lane_to_serdes_map_fabric_lane161=rx161:tx161
-lane_to_serdes_map_fabric_lane162=rx162:tx162
+lane_to_serdes_map_fabric_lane161=rx161:tx162
+lane_to_serdes_map_fabric_lane162=rx162:tx161
 lane_to_serdes_map_fabric_lane163=rx163:tx163
 lane_to_serdes_map_fabric_lane164=rx164:tx164
 lane_to_serdes_map_fabric_lane165=rx165:tx165
@@ -657,11 +657,11 @@ lane_to_serdes_map_fabric_lane182=rx182:tx180
 lane_to_serdes_map_fabric_lane183=rx183:tx183
 lane_to_serdes_map_fabric_lane184=rx184:tx186
 lane_to_serdes_map_fabric_lane185=rx185:tx184
-lane_to_serdes_map_fabric_lane186=rx186:tx185
-lane_to_serdes_map_fabric_lane187=rx187:tx187
-lane_to_serdes_map_fabric_lane188=rx188:tx188
+lane_to_serdes_map_fabric_lane186=rx186:tx187
+lane_to_serdes_map_fabric_lane187=rx187:tx185
+lane_to_serdes_map_fabric_lane188=rx188:tx190
 lane_to_serdes_map_fabric_lane189=rx189:tx189
-lane_to_serdes_map_fabric_lane190=rx190:tx190
+lane_to_serdes_map_fabric_lane190=rx190:tx188
 lane_to_serdes_map_fabric_lane191=rx191:tx191
 
 #
diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/1/j2p-a7800r3a-36d-36x400G.config.bcm b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/1/j2p-a7800r3a-36d-36x400G.config.bcm
index ee9bf638a..30b740af2 100644
--- a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/1/j2p-a7800r3a-36d-36x400G.config.bcm
+++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/1/j2p-a7800r3a-36d-36x400G.config.bcm
@@ -453,17 +453,17 @@ fabric_connect_mode=FE
 fabric_logical_port_base=512
 
 # Fabric lane mapping
-lane_to_serdes_map_fabric_lane0=rx0:tx0
+lane_to_serdes_map_fabric_lane0=rx0:tx3
 lane_to_serdes_map_fabric_lane1=rx1:tx1
 lane_to_serdes_map_fabric_lane2=rx2:tx2
-lane_to_serdes_map_fabric_lane3=rx3:tx3
+lane_to_serdes_map_fabric_lane3=rx3:tx0
 lane_to_serdes_map_fabric_lane4=rx4:tx4
 lane_to_serdes_map_fabric_lane5=rx5:tx5
 lane_to_serdes_map_fabric_lane6=rx6:tx6
 lane_to_serdes_map_fabric_lane7=rx7:tx7
-lane_to_serdes_map_fabric_lane8=rx8:tx10
+lane_to_serdes_map_fabric_lane8=rx8:tx9
 lane_to_serdes_map_fabric_lane9=rx9:tx11
-lane_to_serdes_map_fabric_lane10=rx10:tx9
+lane_to_serdes_map_fabric_lane10=rx10:tx10
 lane_to_serdes_map_fabric_lane11=rx11:tx8
 lane_to_serdes_map_fabric_lane12=rx12:tx12
 lane_to_serdes_map_fabric_lane13=rx13:tx15
@@ -475,15 +475,15 @@ lane_to_serdes_map_fabric_lane18=rx18:tx16
 lane_to_serdes_map_fabric_lane19=rx19:tx19
 lane_to_serdes_map_fabric_lane20=rx20:tx21
 lane_to_serdes_map_fabric_lane21=rx21:tx23
-lane_to_serdes_map_fabric_lane22=rx22:tx20
-lane_to_serdes_map_fabric_lane23=rx23:tx22
-lane_to_serdes_map_fabric_lane24=rx24:tx26
+lane_to_serdes_map_fabric_lane22=rx22:tx22
+lane_to_serdes_map_fabric_lane23=rx23:tx20
+lane_to_serdes_map_fabric_lane24=rx24:tx25
 lane_to_serdes_map_fabric_lane25=rx25:tx24
-lane_to_serdes_map_fabric_lane26=rx26:tx25
-lane_to_serdes_map_fabric_lane27=rx27:tx27
+lane_to_serdes_map_fabric_lane26=rx26:tx27
+lane_to_serdes_map_fabric_lane27=rx27:tx26
 lane_to_serdes_map_fabric_lane28=rx28:tx31
-lane_to_serdes_map_fabric_lane29=rx29:tx30
-lane_to_serdes_map_fabric_lane30=rx30:tx29
+lane_to_serdes_map_fabric_lane29=rx29:tx29
+lane_to_serdes_map_fabric_lane30=rx30:tx30
 lane_to_serdes_map_fabric_lane31=rx31:tx28
 lane_to_serdes_map_fabric_lane32=rx32:tx32
 lane_to_serdes_map_fabric_lane33=rx33:tx33
@@ -522,17 +522,17 @@ lane_to_serdes_map_fabric_lane65=rx65:tx65
 lane_to_serdes_map_fabric_lane66=rx66:tx66
 lane_to_serdes_map_fabric_lane67=rx67:tx67
 lane_to_serdes_map_fabric_lane68=rx68:tx68
-lane_to_serdes_map_fabric_lane69=rx69:tx69
-lane_to_serdes_map_fabric_lane70=rx70:tx70
-lane_to_serdes_map_fabric_lane71=rx71:tx71
+lane_to_serdes_map_fabric_lane69=rx69:tx70
+lane_to_serdes_map_fabric_lane70=rx70:tx71
+lane_to_serdes_map_fabric_lane71=rx71:tx69
 lane_to_serdes_map_fabric_lane72=rx72:tx75
 lane_to_serdes_map_fabric_lane73=rx73:tx74
 lane_to_serdes_map_fabric_lane74=rx74:tx73
 lane_to_serdes_map_fabric_lane75=rx75:tx72
-lane_to_serdes_map_fabric_lane76=rx76:tx79
+lane_to_serdes_map_fabric_lane76=rx76:tx76
 lane_to_serdes_map_fabric_lane77=rx77:tx78
 lane_to_serdes_map_fabric_lane78=rx78:tx77
-lane_to_serdes_map_fabric_lane79=rx79:tx76
+lane_to_serdes_map_fabric_lane79=rx79:tx79
 lane_to_serdes_map_fabric_lane80=rx80:tx80
 lane_to_serdes_map_fabric_lane81=rx81:tx81
 lane_to_serdes_map_fabric_lane82=rx82:tx83
@@ -543,11 +543,11 @@ lane_to_serdes_map_fabric_lane86=rx86:tx84
 lane_to_serdes_map_fabric_lane87=rx87:tx87
 lane_to_serdes_map_fabric_lane88=rx88:tx90
 lane_to_serdes_map_fabric_lane89=rx89:tx88
-lane_to_serdes_map_fabric_lane90=rx90:tx91
-lane_to_serdes_map_fabric_lane91=rx91:tx89
+lane_to_serdes_map_fabric_lane90=rx90:tx89
+lane_to_serdes_map_fabric_lane91=rx91:tx91
 lane_to_serdes_map_fabric_lane92=rx92:tx93
-lane_to_serdes_map_fabric_lane93=rx93:tx92
-lane_to_serdes_map_fabric_lane94=rx94:tx94
+lane_to_serdes_map_fabric_lane93=rx93:tx94
+lane_to_serdes_map_fabric_lane94=rx94:tx92
 lane_to_serdes_map_fabric_lane95=rx95:tx95
 lane_to_serdes_map_fabric_lane96=rx96:tx96
 lane_to_serdes_map_fabric_lane97=rx97:tx97
@@ -557,30 +557,30 @@ lane_to_serdes_map_fabric_lane100=rx100:tx100
 lane_to_serdes_map_fabric_lane101=rx101:tx101
 lane_to_serdes_map_fabric_lane102=rx102:tx102
 lane_to_serdes_map_fabric_lane103=rx103:tx103
-lane_to_serdes_map_fabric_lane104=rx104:tx105
-lane_to_serdes_map_fabric_lane105=rx105:tx106
-lane_to_serdes_map_fabric_lane106=rx106:tx107
-lane_to_serdes_map_fabric_lane107=rx107:tx104
-lane_to_serdes_map_fabric_lane108=rx108:tx111
+lane_to_serdes_map_fabric_lane104=rx104:tx104
+lane_to_serdes_map_fabric_lane105=rx105:tx107
+lane_to_serdes_map_fabric_lane106=rx106:tx106
+lane_to_serdes_map_fabric_lane107=rx107:tx105
+lane_to_serdes_map_fabric_lane108=rx108:tx108
 lane_to_serdes_map_fabric_lane109=rx109:tx109
 lane_to_serdes_map_fabric_lane110=rx110:tx110
-lane_to_serdes_map_fabric_lane111=rx111:tx108
-lane_to_serdes_map_fabric_lane112=rx112:tx114
-lane_to_serdes_map_fabric_lane113=rx113:tx113
+lane_to_serdes_map_fabric_lane111=rx111:tx111
+lane_to_serdes_map_fabric_lane112=rx112:tx115
+lane_to_serdes_map_fabric_lane113=rx113:tx114
 lane_to_serdes_map_fabric_lane114=rx114:tx112
-lane_to_serdes_map_fabric_lane115=rx115:tx115
-lane_to_serdes_map_fabric_lane116=rx116:tx117
-lane_to_serdes_map_fabric_lane117=rx117:tx116
-lane_to_serdes_map_fabric_lane118=rx118:tx119
-lane_to_serdes_map_fabric_lane119=rx119:tx118
-lane_to_serdes_map_fabric_lane120=rx120:tx123
-lane_to_serdes_map_fabric_lane121=rx121:tx120
-lane_to_serdes_map_fabric_lane122=rx122:tx122
-lane_to_serdes_map_fabric_lane123=rx123:tx121
-lane_to_serdes_map_fabric_lane124=rx124:tx127
-lane_to_serdes_map_fabric_lane125=rx125:tx125
-lane_to_serdes_map_fabric_lane126=rx126:tx124
-lane_to_serdes_map_fabric_lane127=rx127:tx126
+lane_to_serdes_map_fabric_lane115=rx115:tx113
+lane_to_serdes_map_fabric_lane116=rx116:tx118
+lane_to_serdes_map_fabric_lane117=rx117:tx119
+lane_to_serdes_map_fabric_lane118=rx118:tx116
+lane_to_serdes_map_fabric_lane119=rx119:tx117
+lane_to_serdes_map_fabric_lane120=rx120:tx121
+lane_to_serdes_map_fabric_lane121=rx121:tx122
+lane_to_serdes_map_fabric_lane122=rx122:tx120
+lane_to_serdes_map_fabric_lane123=rx123:tx123
+lane_to_serdes_map_fabric_lane124=rx124:tx124
+lane_to_serdes_map_fabric_lane125=rx125:tx127
+lane_to_serdes_map_fabric_lane126=rx126:tx126
+lane_to_serdes_map_fabric_lane127=rx127:tx125
 lane_to_serdes_map_fabric_lane128=rx128:tx128
 lane_to_serdes_map_fabric_lane129=rx129:tx129
 lane_to_serdes_map_fabric_lane130=rx130:tx130
@@ -593,12 +593,12 @@ lane_to_serdes_map_fabric_lane136=rx136:tx139
 lane_to_serdes_map_fabric_lane137=rx137:tx138
 lane_to_serdes_map_fabric_lane138=rx138:tx137
 lane_to_serdes_map_fabric_lane139=rx139:tx136
-lane_to_serdes_map_fabric_lane140=rx140:tx140
+lane_to_serdes_map_fabric_lane140=rx140:tx143
 lane_to_serdes_map_fabric_lane141=rx141:tx142
 lane_to_serdes_map_fabric_lane142=rx142:tx141
-lane_to_serdes_map_fabric_lane143=rx143:tx143
-lane_to_serdes_map_fabric_lane144=rx144:tx144
-lane_to_serdes_map_fabric_lane145=rx145:tx145
+lane_to_serdes_map_fabric_lane143=rx143:tx140
+lane_to_serdes_map_fabric_lane144=rx144:tx145
+lane_to_serdes_map_fabric_lane145=rx145:tx144
 lane_to_serdes_map_fabric_lane146=rx146:tx146
 lane_to_serdes_map_fabric_lane147=rx147:tx147
 lane_to_serdes_map_fabric_lane148=rx148:tx148
@@ -614,8 +614,8 @@ lane_to_serdes_map_fabric_lane157=rx157:tx158
 lane_to_serdes_map_fabric_lane158=rx158:tx157
 lane_to_serdes_map_fabric_lane159=rx159:tx156
 lane_to_serdes_map_fabric_lane160=rx160:tx160
-lane_to_serdes_map_fabric_lane161=rx161:tx161
-lane_to_serdes_map_fabric_lane162=rx162:tx162
+lane_to_serdes_map_fabric_lane161=rx161:tx162
+lane_to_serdes_map_fabric_lane162=rx162:tx161
 lane_to_serdes_map_fabric_lane163=rx163:tx163
 lane_to_serdes_map_fabric_lane164=rx164:tx164
 lane_to_serdes_map_fabric_lane165=rx165:tx165
@@ -639,11 +639,11 @@ lane_to_serdes_map_fabric_lane182=rx182:tx180
 lane_to_serdes_map_fabric_lane183=rx183:tx183
 lane_to_serdes_map_fabric_lane184=rx184:tx186
 lane_to_serdes_map_fabric_lane185=rx185:tx184
-lane_to_serdes_map_fabric_lane186=rx186:tx185
-lane_to_serdes_map_fabric_lane187=rx187:tx187
-lane_to_serdes_map_fabric_lane188=rx188:tx188
+lane_to_serdes_map_fabric_lane186=rx186:tx187
+lane_to_serdes_map_fabric_lane187=rx187:tx185
+lane_to_serdes_map_fabric_lane188=rx188:tx190
 lane_to_serdes_map_fabric_lane189=rx189:tx189
-lane_to_serdes_map_fabric_lane190=rx190:tx190
+lane_to_serdes_map_fabric_lane190=rx190:tx188
 lane_to_serdes_map_fabric_lane191=rx191:tx191
 
 #

From 568149081c88b8a55d206e03c0beedb63a71fc36 Mon Sep 17 00:00:00 2001
From: "Marty Y. Lok" <76118573+mlok-nokia@users.noreply.github.com>
Date: Fri, 22 Mar 2024 21:01:32 -0400
Subject: [PATCH 0359/1115] [Nokia][sonic-platform][bookworm] Update Nokia
 sonic-platform submodule (#18445)

Update Nokia-IXR7250E sonic-platform submodule

Signed-off-by: mlok <marty.lok@nokia.com>
---
 platform/broadcom/sonic-platform-modules-nokia | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/platform/broadcom/sonic-platform-modules-nokia b/platform/broadcom/sonic-platform-modules-nokia
index 1ef68bdba..840927827 160000
--- a/platform/broadcom/sonic-platform-modules-nokia
+++ b/platform/broadcom/sonic-platform-modules-nokia
@@ -1 +1 @@
-Subproject commit 1ef68bdba5dfcb1b7946c952ee233f0ee5b7738a
+Subproject commit 84092782791ecc42b4f597fbea0c16204e4a8f9d

From e877ca404eaf32ed27b6d62b902c3fa1d2467002 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sat, 23 Mar 2024 19:01:11 +0800
Subject: [PATCH 0360/1115] [submodule] Update submodule
 wpasupplicant/sonic-wpa-supplicant to the latest HEAD automatically (#18450)

#### Why I did it
src/wpasupplicant/sonic-wpa-supplicant
```
* 3c7fd8e10 - (HEAD -> master, origin/master, origin/HEAD) Make Openssl CMAC API (omac1_aes_vector) Availalable in Non FIPs Mode (#85) (2 hours ago) [wumiao_nokia]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/wpasupplicant/sonic-wpa-supplicant | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/wpasupplicant/sonic-wpa-supplicant b/src/wpasupplicant/sonic-wpa-supplicant
index 13e6f1100..3c7fd8e10 160000
--- a/src/wpasupplicant/sonic-wpa-supplicant
+++ b/src/wpasupplicant/sonic-wpa-supplicant
@@ -1 +1 @@
-Subproject commit 13e6f11007d3e6d33a514a702fea5d40daaad055
+Subproject commit 3c7fd8e10d0e675c3cc1376206a2276e4d8e16da

From 1d57472eb013b8a3ab12a1a3c91db5d6c66b9e69 Mon Sep 17 00:00:00 2001
From: Vadym Hlushko <62022266+vadymhlushko-mlnx@users.noreply.github.com>
Date: Sun, 24 Mar 2024 01:45:36 +0200
Subject: [PATCH 0361/1115] [graceful reboot] Rename the platform_reboot to the
 pre_reboot_hook, remove the sysfs power cycle (#18324)

**DEPENDS ON: [[graceful reboot] Add the pre_reboot_hook script execution, add the watchdog arm before the reboot](https://github.com/sonic-net/sonic-utilities/pull/3203)**

#### Why I did it
Add support for the `graceful reboot` instead of  the `sysfs power cycle` to avoid filesystem corruption

### How I did it
Rename the `platform_reboot` script to the `pre_reboot_hook`.
Remove the sysfs power cycle function, from now on the Debian reboot (`/sbin/reboot`) will be executed instead of the sysfs power cycle.

#### How to verify it
1. Start watching logs by using `show log -f` and `journalctl -p debug -f`
2. Execute the `reboot` command from the switch CLI
3. Check in logs that all systemd services terminated
---
 .../x86_64-mlnx_lssn2700-r0/platform_reboot   |  1 -
 .../x86_64-mlnx_lssn2700-r0/pre_reboot_hook   |  1 +
 .../x86_64-mlnx_msn2010-r0/platform_reboot    |  1 -
 .../x86_64-mlnx_msn2010-r0/pre_reboot_hook    |  1 +
 .../x86_64-mlnx_msn2100-r0/platform_reboot    |  1 -
 .../x86_64-mlnx_msn2100-r0/pre_reboot_hook    |  1 +
 .../x86_64-mlnx_msn2410-r0/platform_reboot    |  1 -
 .../x86_64-mlnx_msn2410-r0/pre_reboot_hook    |  1 +
 .../x86_64-mlnx_msn2700-r0/platform_reboot    | 55 -------------------
 .../x86_64-mlnx_msn2700-r0/pre_reboot_hook    | 34 ++++++++++++
 .../x86_64-mlnx_msn2700a1-r0/platform_reboot  |  1 -
 .../x86_64-mlnx_msn2700a1-r0/pre_reboot_hook  |  1 +
 .../x86_64-mlnx_msn2740-r0/platform_reboot    |  1 -
 .../x86_64-mlnx_msn2740-r0/pre_reboot_hook    |  1 +
 .../x86_64-mlnx_msn3420-r0/platform_reboot    |  1 -
 .../x86_64-mlnx_msn3420-r0/pre_reboot_hook    |  1 +
 .../x86_64-mlnx_msn3700-r0/platform_reboot    |  1 -
 .../x86_64-mlnx_msn3700-r0/pre_reboot_hook    |  1 +
 .../x86_64-mlnx_msn3700c-r0/platform_reboot   |  1 -
 .../x86_64-mlnx_msn3700c-r0/pre_reboot_hook   |  1 +
 .../x86_64-mlnx_msn3800-r0/platform_reboot    |  1 -
 .../x86_64-mlnx_msn3800-r0/pre_reboot_hook    |  1 +
 .../x86_64-mlnx_msn4410-r0/platform_reboot    |  1 -
 .../x86_64-mlnx_msn4410-r0/pre_reboot_hook    |  1 +
 .../x86_64-mlnx_msn4600-r0/platform_reboot    |  1 -
 .../x86_64-mlnx_msn4600-r0/pre_reboot_hook    |  1 +
 .../x86_64-mlnx_msn4600c-r0/platform_reboot   |  1 -
 .../x86_64-mlnx_msn4600c-r0/pre_reboot_hook   |  1 +
 .../x86_64-mlnx_msn4700-r0/platform_reboot    |  1 -
 .../x86_64-mlnx_msn4700-r0/pre_reboot_hook    |  1 +
 .../x86_64-nvidia_sn2201-r0/platform_reboot   |  1 -
 .../x86_64-nvidia_sn2201-r0/pre_reboot_hook   |  1 +
 .../x86_64-nvidia_sn4800-r0/platform_reboot   |  1 -
 .../x86_64-nvidia_sn4800-r0/pre_reboot_hook   |  1 +
 .../x86_64-nvidia_sn5600-r0/platform_reboot   |  1 -
 .../x86_64-nvidia_sn5600-r0/pre_reboot_hook   |  1 +
 36 files changed, 51 insertions(+), 72 deletions(-)
 delete mode 120000 device/mellanox/x86_64-mlnx_lssn2700-r0/platform_reboot
 create mode 120000 device/mellanox/x86_64-mlnx_lssn2700-r0/pre_reboot_hook
 delete mode 120000 device/mellanox/x86_64-mlnx_msn2010-r0/platform_reboot
 create mode 120000 device/mellanox/x86_64-mlnx_msn2010-r0/pre_reboot_hook
 delete mode 120000 device/mellanox/x86_64-mlnx_msn2100-r0/platform_reboot
 create mode 120000 device/mellanox/x86_64-mlnx_msn2100-r0/pre_reboot_hook
 delete mode 120000 device/mellanox/x86_64-mlnx_msn2410-r0/platform_reboot
 create mode 120000 device/mellanox/x86_64-mlnx_msn2410-r0/pre_reboot_hook
 delete mode 100755 device/mellanox/x86_64-mlnx_msn2700-r0/platform_reboot
 create mode 100755 device/mellanox/x86_64-mlnx_msn2700-r0/pre_reboot_hook
 delete mode 120000 device/mellanox/x86_64-mlnx_msn2700a1-r0/platform_reboot
 create mode 120000 device/mellanox/x86_64-mlnx_msn2700a1-r0/pre_reboot_hook
 delete mode 120000 device/mellanox/x86_64-mlnx_msn2740-r0/platform_reboot
 create mode 120000 device/mellanox/x86_64-mlnx_msn2740-r0/pre_reboot_hook
 delete mode 120000 device/mellanox/x86_64-mlnx_msn3420-r0/platform_reboot
 create mode 120000 device/mellanox/x86_64-mlnx_msn3420-r0/pre_reboot_hook
 delete mode 120000 device/mellanox/x86_64-mlnx_msn3700-r0/platform_reboot
 create mode 120000 device/mellanox/x86_64-mlnx_msn3700-r0/pre_reboot_hook
 delete mode 120000 device/mellanox/x86_64-mlnx_msn3700c-r0/platform_reboot
 create mode 120000 device/mellanox/x86_64-mlnx_msn3700c-r0/pre_reboot_hook
 delete mode 120000 device/mellanox/x86_64-mlnx_msn3800-r0/platform_reboot
 create mode 120000 device/mellanox/x86_64-mlnx_msn3800-r0/pre_reboot_hook
 delete mode 120000 device/mellanox/x86_64-mlnx_msn4410-r0/platform_reboot
 create mode 120000 device/mellanox/x86_64-mlnx_msn4410-r0/pre_reboot_hook
 delete mode 120000 device/mellanox/x86_64-mlnx_msn4600-r0/platform_reboot
 create mode 120000 device/mellanox/x86_64-mlnx_msn4600-r0/pre_reboot_hook
 delete mode 120000 device/mellanox/x86_64-mlnx_msn4600c-r0/platform_reboot
 create mode 120000 device/mellanox/x86_64-mlnx_msn4600c-r0/pre_reboot_hook
 delete mode 120000 device/mellanox/x86_64-mlnx_msn4700-r0/platform_reboot
 create mode 120000 device/mellanox/x86_64-mlnx_msn4700-r0/pre_reboot_hook
 delete mode 120000 device/mellanox/x86_64-nvidia_sn2201-r0/platform_reboot
 create mode 120000 device/mellanox/x86_64-nvidia_sn2201-r0/pre_reboot_hook
 delete mode 120000 device/mellanox/x86_64-nvidia_sn4800-r0/platform_reboot
 create mode 120000 device/mellanox/x86_64-nvidia_sn4800-r0/pre_reboot_hook
 delete mode 120000 device/mellanox/x86_64-nvidia_sn5600-r0/platform_reboot
 create mode 120000 device/mellanox/x86_64-nvidia_sn5600-r0/pre_reboot_hook

diff --git a/device/mellanox/x86_64-mlnx_lssn2700-r0/platform_reboot b/device/mellanox/x86_64-mlnx_lssn2700-r0/platform_reboot
deleted file mode 120000
index 43c8ea567..000000000
--- a/device/mellanox/x86_64-mlnx_lssn2700-r0/platform_reboot
+++ /dev/null
@@ -1 +0,0 @@
-../x86_64-mlnx_msn2700-r0/platform_reboot
\ No newline at end of file
diff --git a/device/mellanox/x86_64-mlnx_lssn2700-r0/pre_reboot_hook b/device/mellanox/x86_64-mlnx_lssn2700-r0/pre_reboot_hook
new file mode 120000
index 000000000..6fc31078e
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_lssn2700-r0/pre_reboot_hook
@@ -0,0 +1 @@
+../x86_64-mlnx_msn2700-r0/pre_reboot_hook
\ No newline at end of file
diff --git a/device/mellanox/x86_64-mlnx_msn2010-r0/platform_reboot b/device/mellanox/x86_64-mlnx_msn2010-r0/platform_reboot
deleted file mode 120000
index 43c8ea567..000000000
--- a/device/mellanox/x86_64-mlnx_msn2010-r0/platform_reboot
+++ /dev/null
@@ -1 +0,0 @@
-../x86_64-mlnx_msn2700-r0/platform_reboot
\ No newline at end of file
diff --git a/device/mellanox/x86_64-mlnx_msn2010-r0/pre_reboot_hook b/device/mellanox/x86_64-mlnx_msn2010-r0/pre_reboot_hook
new file mode 120000
index 000000000..6fc31078e
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn2010-r0/pre_reboot_hook
@@ -0,0 +1 @@
+../x86_64-mlnx_msn2700-r0/pre_reboot_hook
\ No newline at end of file
diff --git a/device/mellanox/x86_64-mlnx_msn2100-r0/platform_reboot b/device/mellanox/x86_64-mlnx_msn2100-r0/platform_reboot
deleted file mode 120000
index 43c8ea567..000000000
--- a/device/mellanox/x86_64-mlnx_msn2100-r0/platform_reboot
+++ /dev/null
@@ -1 +0,0 @@
-../x86_64-mlnx_msn2700-r0/platform_reboot
\ No newline at end of file
diff --git a/device/mellanox/x86_64-mlnx_msn2100-r0/pre_reboot_hook b/device/mellanox/x86_64-mlnx_msn2100-r0/pre_reboot_hook
new file mode 120000
index 000000000..6fc31078e
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn2100-r0/pre_reboot_hook
@@ -0,0 +1 @@
+../x86_64-mlnx_msn2700-r0/pre_reboot_hook
\ No newline at end of file
diff --git a/device/mellanox/x86_64-mlnx_msn2410-r0/platform_reboot b/device/mellanox/x86_64-mlnx_msn2410-r0/platform_reboot
deleted file mode 120000
index 43c8ea567..000000000
--- a/device/mellanox/x86_64-mlnx_msn2410-r0/platform_reboot
+++ /dev/null
@@ -1 +0,0 @@
-../x86_64-mlnx_msn2700-r0/platform_reboot
\ No newline at end of file
diff --git a/device/mellanox/x86_64-mlnx_msn2410-r0/pre_reboot_hook b/device/mellanox/x86_64-mlnx_msn2410-r0/pre_reboot_hook
new file mode 120000
index 000000000..6fc31078e
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn2410-r0/pre_reboot_hook
@@ -0,0 +1 @@
+../x86_64-mlnx_msn2700-r0/pre_reboot_hook
\ No newline at end of file
diff --git a/device/mellanox/x86_64-mlnx_msn2700-r0/platform_reboot b/device/mellanox/x86_64-mlnx_msn2700-r0/platform_reboot
deleted file mode 100755
index 9b6879049..000000000
--- a/device/mellanox/x86_64-mlnx_msn2700-r0/platform_reboot
+++ /dev/null
@@ -1,55 +0,0 @@
-#!/bin/bash
-
-declare -r EXIT_SUCCESS="0"
-declare -r EXIT_ERROR="1"
-
-declare -r PENDING_COMPONENT_FW="/usr/bin/install-pending-fw.py"
-declare -r FW_UPGRADE_SCRIPT="/usr/bin/mlnx-fw-upgrade.sh"
-declare -r SYSFS_PWR_CYCLE="/var/run/hw-management/system/pwr_cycle"
-
-FORCE_REBOOT="no"
-
-function ParseArguments() {
-    while [ $# -ge 1 ]; do
-        case "$1" in
-            -f|--force)
-                FORCE_REBOOT="yes"
-            ;;
-        esac
-        shift
-    done
-}
-
-function SafePwrCycle() {
-    sync; sync
-    umount -fa > /dev/null 2>&1
-    echo 1 > $SYSFS_PWR_CYCLE
-}
-
-ParseArguments "$@"
-
-# Reboot immediately if the kdump capture kernel is running
-VMCORE_FILE=/proc/vmcore
-if [ -s $VMCORE_FILE ]; then
-    sync; sync
-    umount -fa > /dev/null 2>&1
-
-    # Run Debian reboot because the platform reboot isn't available
-    /sbin/reboot
-fi
-
-
-${FW_UPGRADE_SCRIPT} --upgrade --verbose
-EXIT_CODE="$?"
-if [[ "${EXIT_CODE}" != "${EXIT_SUCCESS}" ]]; then
-    echo "Failed to burn MLNX FW: errno=${EXIT_CODE}"
-
-    if [[ "${FORCE_REBOOT}" != "yes" ]]; then
-        echo "Reboot is interrupted: use -f|--force to override"
-        exit "${EXIT_ERROR}"
-    fi
-fi
-
-${PENDING_COMPONENT_FW}
-
-SafePwrCycle
diff --git a/device/mellanox/x86_64-mlnx_msn2700-r0/pre_reboot_hook b/device/mellanox/x86_64-mlnx_msn2700-r0/pre_reboot_hook
new file mode 100755
index 000000000..134357d32
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn2700-r0/pre_reboot_hook
@@ -0,0 +1,34 @@
+#!/bin/bash
+
+# Copyright (c) 2020-2023 NVIDIA CORPORATION & AFFILIATES.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+declare -r EXIT_SUCCESS=0
+declare -r EXIT_ERROR=1
+
+declare -r PENDING_COMPONENT_FW="/usr/bin/install-pending-fw.py"
+declare -r FW_UPGRADE_SCRIPT="/usr/bin/mlnx-fw-upgrade.sh"
+
+
+${FW_UPGRADE_SCRIPT} --upgrade --verbose
+EXIT_CODE=$?
+if [[ ${EXIT_CODE} != ${EXIT_SUCCESS} ]]; then
+    echo "Failed to burn MLNX FW: errno=${EXIT_CODE}"
+    exit ${EXIT_ERROR}
+fi
+
+${PENDING_COMPONENT_FW}
+
+exit ${EXIT_SUCCESS}
\ No newline at end of file
diff --git a/device/mellanox/x86_64-mlnx_msn2700a1-r0/platform_reboot b/device/mellanox/x86_64-mlnx_msn2700a1-r0/platform_reboot
deleted file mode 120000
index 43c8ea567..000000000
--- a/device/mellanox/x86_64-mlnx_msn2700a1-r0/platform_reboot
+++ /dev/null
@@ -1 +0,0 @@
-../x86_64-mlnx_msn2700-r0/platform_reboot
\ No newline at end of file
diff --git a/device/mellanox/x86_64-mlnx_msn2700a1-r0/pre_reboot_hook b/device/mellanox/x86_64-mlnx_msn2700a1-r0/pre_reboot_hook
new file mode 120000
index 000000000..6fc31078e
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn2700a1-r0/pre_reboot_hook
@@ -0,0 +1 @@
+../x86_64-mlnx_msn2700-r0/pre_reboot_hook
\ No newline at end of file
diff --git a/device/mellanox/x86_64-mlnx_msn2740-r0/platform_reboot b/device/mellanox/x86_64-mlnx_msn2740-r0/platform_reboot
deleted file mode 120000
index 43c8ea567..000000000
--- a/device/mellanox/x86_64-mlnx_msn2740-r0/platform_reboot
+++ /dev/null
@@ -1 +0,0 @@
-../x86_64-mlnx_msn2700-r0/platform_reboot
\ No newline at end of file
diff --git a/device/mellanox/x86_64-mlnx_msn2740-r0/pre_reboot_hook b/device/mellanox/x86_64-mlnx_msn2740-r0/pre_reboot_hook
new file mode 120000
index 000000000..6fc31078e
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn2740-r0/pre_reboot_hook
@@ -0,0 +1 @@
+../x86_64-mlnx_msn2700-r0/pre_reboot_hook
\ No newline at end of file
diff --git a/device/mellanox/x86_64-mlnx_msn3420-r0/platform_reboot b/device/mellanox/x86_64-mlnx_msn3420-r0/platform_reboot
deleted file mode 120000
index 43c8ea567..000000000
--- a/device/mellanox/x86_64-mlnx_msn3420-r0/platform_reboot
+++ /dev/null
@@ -1 +0,0 @@
-../x86_64-mlnx_msn2700-r0/platform_reboot
\ No newline at end of file
diff --git a/device/mellanox/x86_64-mlnx_msn3420-r0/pre_reboot_hook b/device/mellanox/x86_64-mlnx_msn3420-r0/pre_reboot_hook
new file mode 120000
index 000000000..6fc31078e
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn3420-r0/pre_reboot_hook
@@ -0,0 +1 @@
+../x86_64-mlnx_msn2700-r0/pre_reboot_hook
\ No newline at end of file
diff --git a/device/mellanox/x86_64-mlnx_msn3700-r0/platform_reboot b/device/mellanox/x86_64-mlnx_msn3700-r0/platform_reboot
deleted file mode 120000
index 43c8ea567..000000000
--- a/device/mellanox/x86_64-mlnx_msn3700-r0/platform_reboot
+++ /dev/null
@@ -1 +0,0 @@
-../x86_64-mlnx_msn2700-r0/platform_reboot
\ No newline at end of file
diff --git a/device/mellanox/x86_64-mlnx_msn3700-r0/pre_reboot_hook b/device/mellanox/x86_64-mlnx_msn3700-r0/pre_reboot_hook
new file mode 120000
index 000000000..6fc31078e
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn3700-r0/pre_reboot_hook
@@ -0,0 +1 @@
+../x86_64-mlnx_msn2700-r0/pre_reboot_hook
\ No newline at end of file
diff --git a/device/mellanox/x86_64-mlnx_msn3700c-r0/platform_reboot b/device/mellanox/x86_64-mlnx_msn3700c-r0/platform_reboot
deleted file mode 120000
index 43c8ea567..000000000
--- a/device/mellanox/x86_64-mlnx_msn3700c-r0/platform_reboot
+++ /dev/null
@@ -1 +0,0 @@
-../x86_64-mlnx_msn2700-r0/platform_reboot
\ No newline at end of file
diff --git a/device/mellanox/x86_64-mlnx_msn3700c-r0/pre_reboot_hook b/device/mellanox/x86_64-mlnx_msn3700c-r0/pre_reboot_hook
new file mode 120000
index 000000000..6fc31078e
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn3700c-r0/pre_reboot_hook
@@ -0,0 +1 @@
+../x86_64-mlnx_msn2700-r0/pre_reboot_hook
\ No newline at end of file
diff --git a/device/mellanox/x86_64-mlnx_msn3800-r0/platform_reboot b/device/mellanox/x86_64-mlnx_msn3800-r0/platform_reboot
deleted file mode 120000
index 43c8ea567..000000000
--- a/device/mellanox/x86_64-mlnx_msn3800-r0/platform_reboot
+++ /dev/null
@@ -1 +0,0 @@
-../x86_64-mlnx_msn2700-r0/platform_reboot
\ No newline at end of file
diff --git a/device/mellanox/x86_64-mlnx_msn3800-r0/pre_reboot_hook b/device/mellanox/x86_64-mlnx_msn3800-r0/pre_reboot_hook
new file mode 120000
index 000000000..6fc31078e
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn3800-r0/pre_reboot_hook
@@ -0,0 +1 @@
+../x86_64-mlnx_msn2700-r0/pre_reboot_hook
\ No newline at end of file
diff --git a/device/mellanox/x86_64-mlnx_msn4410-r0/platform_reboot b/device/mellanox/x86_64-mlnx_msn4410-r0/platform_reboot
deleted file mode 120000
index 43c8ea567..000000000
--- a/device/mellanox/x86_64-mlnx_msn4410-r0/platform_reboot
+++ /dev/null
@@ -1 +0,0 @@
-../x86_64-mlnx_msn2700-r0/platform_reboot
\ No newline at end of file
diff --git a/device/mellanox/x86_64-mlnx_msn4410-r0/pre_reboot_hook b/device/mellanox/x86_64-mlnx_msn4410-r0/pre_reboot_hook
new file mode 120000
index 000000000..6fc31078e
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn4410-r0/pre_reboot_hook
@@ -0,0 +1 @@
+../x86_64-mlnx_msn2700-r0/pre_reboot_hook
\ No newline at end of file
diff --git a/device/mellanox/x86_64-mlnx_msn4600-r0/platform_reboot b/device/mellanox/x86_64-mlnx_msn4600-r0/platform_reboot
deleted file mode 120000
index 43c8ea567..000000000
--- a/device/mellanox/x86_64-mlnx_msn4600-r0/platform_reboot
+++ /dev/null
@@ -1 +0,0 @@
-../x86_64-mlnx_msn2700-r0/platform_reboot
\ No newline at end of file
diff --git a/device/mellanox/x86_64-mlnx_msn4600-r0/pre_reboot_hook b/device/mellanox/x86_64-mlnx_msn4600-r0/pre_reboot_hook
new file mode 120000
index 000000000..6fc31078e
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn4600-r0/pre_reboot_hook
@@ -0,0 +1 @@
+../x86_64-mlnx_msn2700-r0/pre_reboot_hook
\ No newline at end of file
diff --git a/device/mellanox/x86_64-mlnx_msn4600c-r0/platform_reboot b/device/mellanox/x86_64-mlnx_msn4600c-r0/platform_reboot
deleted file mode 120000
index 43c8ea567..000000000
--- a/device/mellanox/x86_64-mlnx_msn4600c-r0/platform_reboot
+++ /dev/null
@@ -1 +0,0 @@
-../x86_64-mlnx_msn2700-r0/platform_reboot
\ No newline at end of file
diff --git a/device/mellanox/x86_64-mlnx_msn4600c-r0/pre_reboot_hook b/device/mellanox/x86_64-mlnx_msn4600c-r0/pre_reboot_hook
new file mode 120000
index 000000000..6fc31078e
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn4600c-r0/pre_reboot_hook
@@ -0,0 +1 @@
+../x86_64-mlnx_msn2700-r0/pre_reboot_hook
\ No newline at end of file
diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/platform_reboot b/device/mellanox/x86_64-mlnx_msn4700-r0/platform_reboot
deleted file mode 120000
index 43c8ea567..000000000
--- a/device/mellanox/x86_64-mlnx_msn4700-r0/platform_reboot
+++ /dev/null
@@ -1 +0,0 @@
-../x86_64-mlnx_msn2700-r0/platform_reboot
\ No newline at end of file
diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/pre_reboot_hook b/device/mellanox/x86_64-mlnx_msn4700-r0/pre_reboot_hook
new file mode 120000
index 000000000..6fc31078e
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn4700-r0/pre_reboot_hook
@@ -0,0 +1 @@
+../x86_64-mlnx_msn2700-r0/pre_reboot_hook
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn2201-r0/platform_reboot b/device/mellanox/x86_64-nvidia_sn2201-r0/platform_reboot
deleted file mode 120000
index 43c8ea567..000000000
--- a/device/mellanox/x86_64-nvidia_sn2201-r0/platform_reboot
+++ /dev/null
@@ -1 +0,0 @@
-../x86_64-mlnx_msn2700-r0/platform_reboot
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn2201-r0/pre_reboot_hook b/device/mellanox/x86_64-nvidia_sn2201-r0/pre_reboot_hook
new file mode 120000
index 000000000..6fc31078e
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn2201-r0/pre_reboot_hook
@@ -0,0 +1 @@
+../x86_64-mlnx_msn2700-r0/pre_reboot_hook
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn4800-r0/platform_reboot b/device/mellanox/x86_64-nvidia_sn4800-r0/platform_reboot
deleted file mode 120000
index 43c8ea567..000000000
--- a/device/mellanox/x86_64-nvidia_sn4800-r0/platform_reboot
+++ /dev/null
@@ -1 +0,0 @@
-../x86_64-mlnx_msn2700-r0/platform_reboot
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn4800-r0/pre_reboot_hook b/device/mellanox/x86_64-nvidia_sn4800-r0/pre_reboot_hook
new file mode 120000
index 000000000..6fc31078e
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4800-r0/pre_reboot_hook
@@ -0,0 +1 @@
+../x86_64-mlnx_msn2700-r0/pre_reboot_hook
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/platform_reboot b/device/mellanox/x86_64-nvidia_sn5600-r0/platform_reboot
deleted file mode 120000
index 43c8ea567..000000000
--- a/device/mellanox/x86_64-nvidia_sn5600-r0/platform_reboot
+++ /dev/null
@@ -1 +0,0 @@
-../x86_64-mlnx_msn2700-r0/platform_reboot
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/pre_reboot_hook b/device/mellanox/x86_64-nvidia_sn5600-r0/pre_reboot_hook
new file mode 120000
index 000000000..6fc31078e
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/pre_reboot_hook
@@ -0,0 +1 @@
+../x86_64-mlnx_msn2700-r0/pre_reboot_hook
\ No newline at end of file

From 6324fe15b661fbb384eaa7581eba4bfab109e70e Mon Sep 17 00:00:00 2001
From: Vivek <vkarri@nvidia.com>
Date: Sat, 23 Mar 2024 16:53:05 -0700
Subject: [PATCH 0362/1115] Add log files into the cache tar for improved
 debugging (#18026)

### Why I did it

Cache currently does not save the log of the deb. But it's useful to have the log to understand any cache related problems.

### How I did it

#### How to verify it

```
vkarri@s-build-sonic-01:/sonic-buildimage$ tar -tvf /sonic/sonic_caches/libnl-3-200_3.5.0-1_amd64.deb-adc83b19e793491b1c6ea0f-0ea77d65c49ae3a11dffbca.tgz
-rw-r--r-- vkarri/dip   496230 2024-01-12 19:49 target/debs/bookworm/libnl-3-200_3.5.0-1_amd64.deb.log
```
---
 Makefile.cache | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/Makefile.cache b/Makefile.cache
index 2d9858d44..909f32910 100644
--- a/Makefile.cache
+++ b/Makefile.cache
@@ -295,10 +295,12 @@ define SAVE_INTO_CACHE
 		echo "Target $(1) dependencies are modifed - global save cache skipped" >> $($(1)_DST_PATH)/$(1).log
 		$(eval $(1)_CACHE_DIR := $(SONIC_DPKG_LOCAL_CACHE_DIR))
 	 )
-	$($(1)_CACHE_USER) tar -C $($(1)_BASE_PATH) -mczvf $($(1)_CACHE_DIR)/$(MOD_CACHE_FILE) $(2) $(addprefix $($(1)_DST_PATH)/,$($(1)_DERIVED_DEBS) $($(1)_EXTRA_DEBS) )  \
+	cp $($(1)_DST_PATH)/$(1).log $($(1)_DST_PATH)/$(1).cached.log
+	$($(1)_CACHE_USER) tar -C $($(1)_BASE_PATH) -mczvf $($(1)_CACHE_DIR)/$(MOD_CACHE_FILE) $(2) $(addprefix $($(1)_DST_PATH)/,$($(1)_DERIVED_DEBS) $($(1)_EXTRA_DEBS) $(1).cached.log)  \
 		1>>$($(1)_DST_PATH)/$(1).log
 	sudo chmod 777 $($(1)_CACHE_DIR)/$(MOD_CACHE_FILE)
-
+	rm -f $($(1)_DST_PATH)/$(1).cached.log
+	
 	echo "File $($(1)_CACHE_DIR)/$(MOD_CACHE_FILE) saved in cache " >> $($(1)_DST_PATH)/$(1).log
 	echo "[ CACHE::SAVED ] $($(1)_CACHE_DIR)/$(MOD_CACHE_FILE)" >> $($(1)_DST_PATH)/$(1).log
 

From 610685d27b32e0fbfab6b75c1c8c1142a6598ada Mon Sep 17 00:00:00 2001
From: Stephen Sun <5379172+stephenxs@users.noreply.github.com>
Date: Sun, 24 Mar 2024 08:04:00 +0800
Subject: [PATCH 0363/1115] Do not pass the option "device" in rsyslog.conf by
 default when syslog server's source address is configured (#17616)

### Why I did it

An in-band syslog server will not receive any syslog if it is configured without a VRF specified, which is because `eth0` is always specified as the `device` of a syslog server and the syslog packets will be sent to `eth0` regardless of its destination IP address.

### How I did it

Pass the option "device" in rsyslog.conf only if when syslog server's source address is configured with a non-default VRF

#### How to verify it

Manually test:
1. Configuring a syslog server without VRF specified or with `default` as the VRF: no `device` passed in `rsyslog.conf`
2. Configuring a syslog server with non-default VRF: the configured VRF passed as `device` in `rsyslog.conf`
---
 files/image_config/rsyslog/rsyslog.conf.j2 | 9 +++++++--
 1 file changed, 7 insertions(+), 2 deletions(-)

diff --git a/files/image_config/rsyslog/rsyslog.conf.j2 b/files/image_config/rsyslog/rsyslog.conf.j2
index c29d803d0..f6d480494 100644
--- a/files/image_config/rsyslog/rsyslog.conf.j2
+++ b/files/image_config/rsyslog/rsyslog.conf.j2
@@ -107,7 +107,7 @@ $RepeatedMsgReduction on
 {% set regex = conf.get('filter_regex') -%}
 
 {% set fmodifier = '!' if filter == 'exclude' else '' %}
-{% set device = 'eth0' if vrf == 'default' else vrf -%}
+{% set device = vrf if vrf != '' and vrf != 'default' -%}
 {% set template = 'WelfRemoteFormat' if format == 'welf' else 'SONiCFileFormat' -%}
 
 {# Server extra options -#}
@@ -115,11 +115,16 @@ $RepeatedMsgReduction on
 
 {% if source -%}
     {% set options = options ~ ' Address="' ~ source ~ '"'-%}
+    {% set device = device if device != 'eth0' else '' -%}
+{% endif -%}
+
+{% if device -%}
+    {% set options = options ~ ' Device="' ~ device ~ '"'-%}
 {% endif -%}
 
 {% if filter %}
 :msg, {{ fmodifier }}ereregex, "{{ regex }}"
 {% endif %}
 *.{{ severity }}
-action(type="omfwd" Target="{{ server }}" Port="{{ port }}" Protocol="{{ proto }}" Device="{{ device }}" Template="{{ template }}"{{ options }})
+action(type="omfwd" Target="{{ server }}" Port="{{ port }}" Protocol="{{ proto }}" Template="{{ template }}"{{ options }})
 {% endfor %}

From fb29a4047c77d25538ad438aa39816b291589fd1 Mon Sep 17 00:00:00 2001
From: Justin Thomas <justin@jdt.io>
Date: Mon, 25 Mar 2024 12:53:36 -0700
Subject: [PATCH 0364/1115] [devices]: fix show environment for n3248te
 (#17508)

Why I did it
The command show environment has been broken on this platform for quite a while. These adjustments allow it to function again.

How I did it
I adjusted the platform_sensors.py file for the n3248te to appease the errors that it was generating from the Python interpreter.

How to verify it
Run sudo show environment on an unchanged n3248te to see that it generates an error right away about print statements being malformed. Then place this file at /usr/bin/platform_sensors.py in the pmon container and run the command again to see the correct output.
---
 .../n3248te/scripts/platform_sensors.py       | 98 +++++++++----------
 1 file changed, 49 insertions(+), 49 deletions(-)

diff --git a/platform/broadcom/sonic-platform-modules-dell/n3248te/scripts/platform_sensors.py b/platform/broadcom/sonic-platform-modules-dell/n3248te/scripts/platform_sensors.py
index 02aa59595..7b9e6b3a0 100755
--- a/platform/broadcom/sonic-platform-modules-dell/n3248te/scripts/platform_sensors.py
+++ b/platform/broadcom/sonic-platform-modules-dell/n3248te/scripts/platform_sensors.py
@@ -10,24 +10,24 @@
 output = ""
 try:
     rc = 0
-    output = subprocess.check_output('/usr/bin/sensors').splitlines()
+    output = subprocess.check_output('/usr/bin/sensors', text=True).splitlines()
 
     valid = False
     for line in output:
         if line.startswith('acpitz') or line.startswith('coretemp'):
             valid = True
         if valid:
-            print line
+            print(line)
             if line == '': valid = False
 
-    print "Onboard Temperature Sensors:"
+    print("Onboard Temperature Sensors:")
     idx = 0
     for line in output:
         if line.startswith('tmp75'):
-            print '\t' + output[idx+2].split('(')[0]
+            print('\t' + output[idx+2].split('(')[0])
         idx += 1
 
-    print "\nFanTrays:"
+    print("\nFanTrays:")
     idx = 0
     found_emc = False
     for line in output:
@@ -37,50 +37,50 @@
                 line = f.readline()
             present = int(line, 0)
             if present :
-                print '\t' + 'FanTray1:'
-                print '\t\t' + 'Fan Speed:' + (output[idx+2].split('(')[0]).split(':')[1]
+                print('\t' + 'FanTray1:')
+                print('\t\t' + 'Fan Speed:' + (output[idx+2].split('(')[0]).split(':')[1])
                 with open('/sys/devices/platform/dell-n3248te-cpld.0/fan0_dir') as f:
                     line = f.readline()
                 dir = 'Intake' if line[:-1] == 'B2F' else 'Exhaust'
-                print '\t\t' + 'Airflow:\t' + dir
-            else : print '\t' + 'FanTray1:\tNot Present'
+                print('\t\t' + 'Airflow:\t' + dir)
+            else : print('\t' + 'FanTray1:\tNot Present')
 
             with open('/sys/devices/platform/dell-n3248te-cpld.0/fan1_prs') as f:
                 line = f.readline()
             present = int(line, 0)
             if present :
-                print '\t' + 'FanTray2:'
-                print '\t\t' + 'Fan Speed:' + (output[idx+3].split('(')[0]).split(':')[1]
+                print('\t' + 'FanTray2:')
+                print('\t\t' + 'Fan Speed:' + (output[idx+3].split('(')[0]).split(':')[1])
                 with open('/sys/devices/platform/dell-n3248te-cpld.0/fan1_dir') as f:
                     line = f.readline()
                 dir = 'Intake' if line[:-1] == 'B2F' else 'Exhaust'
-                print '\t\t' + 'Airflow:\t' + dir
-            else : print '\t' + 'FanTray2:\tNot Present'
+                print('\t\t' + 'Airflow:\t' + dir)
+            else : print('\t' + 'FanTray2:\tNot Present')
 
             with open('/sys/devices/platform/dell-n3248te-cpld.0/fan2_prs') as f:
                 line = f.readline()
             present = int(line, 0)
             if present :
-                print '\t' + 'FanTray3:'
-                print '\t\t' + 'Fan Speed:' + (output[idx+4].split('(')[0]).split(':')[1]
+                print('\t' + 'FanTray3:')
+                print('\t\t' + 'Fan Speed:' + (output[idx+4].split('(')[0]).split(':')[1])
                 with open('/sys/devices/platform/dell-n3248te-cpld.0/fan2_dir') as f:
                     line = f.readline()
                 dir = 'Intake' if line[:-1] == 'B2F' else 'Exhaust'
-                print '\t\t' + 'Airflow:\t' + dir
-            else : print '\t' + 'FanTray3:\tNot Present'
+                print('\t\t' + 'Airflow:\t' + dir)
+            else : print('\t' + 'FanTray3:\tNot Present')
         idx += 1
     if not found_emc :
-        print '\t' + 'FanTray1:\tNot Present'
-        print '\t' + 'FanTray2:\tNot Present'
-        print '\t' + 'FanTray3:\tNot Present'
+        print('\t' + 'FanTray1:\tNot Present')
+        print('\t' + 'FanTray2:\tNot Present')
+        print('\t' + 'FanTray3:\tNot Present')
 
-    print '\nPSUs:'
+    print('\nPSUs:')
     idx = 0
     with open('/sys/devices/platform/dell-n3248te-cpld.0/psu0_prs') as f:
         line = f.readline()
     found_psu1 = int(line, 0)
     if not found_psu1 :
-        print '\tPSU1:\tNot Present'
+        print('\tPSU1:\tNot Present')
     with open('/sys/devices/platform/dell-n3248te-cpld.0/psu1_prs') as f:
         line = f.readline()
     found_psu2 = int(line, 0)
@@ -90,46 +90,46 @@
                 line = f.readline()
             status = int(line, 0)
             if not status :
-                print '\tPSU1:\tNot OK'
+                print('\tPSU1:\tNot OK')
                 break
-            with open('/sys/bus/i2c/devices/10-0056/eeprom') as f:
+            with open('/sys/bus/i2c/devices/10-0056/eeprom', encoding='iso-8859-1') as f:
                 line = f.readline()
             dir = 'Exhaust' if 'FORWARD' in line else 'Intake'
-            print '\tPSU1:'
-            print '\t\t' + output[idx+2].split('(')[0]
-            print '\t\t' + output[idx+4].split('(')[0]
-            print '\t\t' + output[idx+6].split('(')[0]
-            print '\t\t' + output[idx+7].split('(')[0]
-            print '\t\t' + output[idx+9].split('(')[0]
-            print '\t\t' + output[idx+11].split('(')[0]
-            print '\t\t' + output[idx+12].split('(')[0]
-            print '\t\t' + output[idx+14].split('(')[0]
-            print '\t\t' + output[idx+15].split('(')[0]
-            print '\t\t' + 'Airflow:\t\t  ' + dir
+            print('\tPSU1:')
+            print('\t\t' + output[idx+2].split('(')[0])
+            print('\t\t' + output[idx+4].split('(')[0])
+            print('\t\t' + output[idx+6].split('(')[0])
+            print('\t\t' + output[idx+7].split('(')[0])
+            print('\t\t' + output[idx+9].split('(')[0])
+            print('\t\t' + output[idx+11].split('(')[0])
+            print('\t\t' + output[idx+12].split('(')[0])
+            print('\t\t' + output[idx+14].split('(')[0])
+            print('\t\t' + output[idx+15].split('(')[0])
+            print('\t\t' + 'Airflow:\t\t  ' + dir)
         if line.startswith('dps460-i2c-11'):
             with open('/sys/devices/platform/dell-n3248te-cpld.0/psu1_status') as f:
                 line = f.readline()
             status = int(line, 0)
             if not status :
-                print '\tPSU2:\tNot OK'
+                print('\tPSU2:\tNot OK')
                 break
-            print '\tPSU2:'
-            with open('/sys/bus/i2c/devices/11-0056/eeprom') as f:
+            print('\tPSU2:')
+            with open('/sys/bus/i2c/devices/11-0056/eeprom', encoding='iso-8859-1') as f:
                 line = f.readline()
             dir = 'Exhaust' if 'FORWARD' in line else 'Intake'
-            print '\t\t' + output[idx+2].split('(')[0]
-            print '\t\t' + output[idx+4].split('(')[0]
-            print '\t\t' + output[idx+6].split('(')[0]
-            print '\t\t' + output[idx+7].split('(')[0]
-            print '\t\t' + output[idx+9].split('(')[0]
-            print '\t\t' + output[idx+11].split('(')[0]
-            print '\t\t' + output[idx+12].split('(')[0]
-            print '\t\t' + output[idx+14].split('(')[0]
-            print '\t\t' + output[idx+15].split('(')[0]
-            print '\t\t' + 'Airflow:\t\t  ' + dir
+            print('\t\t' + output[idx+2].split('(')[0])
+            print('\t\t' + output[idx+4].split('(')[0])
+            print('\t\t' + output[idx+6].split('(')[0])
+            print('\t\t' + output[idx+7].split('(')[0])
+            print('\t\t' + output[idx+9].split('(')[0])
+            print('\t\t' + output[idx+11].split('(')[0])
+            print('\t\t' + output[idx+12].split('(')[0])
+            print('\t\t' + output[idx+14].split('(')[0])
+            print('\t\t' + output[idx+15].split('(')[0])
+            print('\t\t' + 'Airflow:\t\t  ' + dir)
         idx += 1
     if not found_psu2 :
-        print '\tPSU2:\tNot Present'
+        print('\tPSU2:\tNot Present')
 
 except subprocess.CalledProcessError as err:
     print ("Exception when calling get_sonic_error -> %s\n" %(err))

From 39392419464911e038214387bb878183c70c76e3 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Tue, 26 Mar 2024 19:01:12 +0800
Subject: [PATCH 0365/1115] [submodule] Update submodule sonic-gnmi to the
 latest HEAD automatically (#18469)

#### Why I did it
src/sonic-gnmi
```
* 98d8e0f - (HEAD -> master, origin/master, origin/HEAD) Add getDpuAddress method to support multiple DPU. (#194) (2 hours ago) [Hua Liu]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-gnmi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-gnmi b/src/sonic-gnmi
index 3fa77c614..98d8e0f8d 160000
--- a/src/sonic-gnmi
+++ b/src/sonic-gnmi
@@ -1 +1 @@
-Subproject commit 3fa77c6148d7b9c9d00d5d6142fa05effdbecfcc
+Subproject commit 98d8e0f8dd8c979e3d53d8ae1c1fd24c19e3c501

From bfc689f1dcfcf4c6e62d07538da5201e65fa28b2 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Wed, 27 Mar 2024 19:00:55 +0800
Subject: [PATCH 0366/1115] [submodule] Update submodule sonic-swss-common to
 the latest HEAD automatically (#18477)

#### Why I did it
src/sonic-swss-common
```
* afd561f - (HEAD -> master, origin/master, origin/HEAD) ASIC/SDK health event (#849) (42 seconds ago) [Stephen Sun]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-swss-common | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-swss-common b/src/sonic-swss-common
index 8e24cedf0..afd561f38 160000
--- a/src/sonic-swss-common
+++ b/src/sonic-swss-common
@@ -1 +1 @@
-Subproject commit 8e24cedf016c73112561eac4c7f6a6fe3b21faf3
+Subproject commit afd561f389a7b247d722b55154cc835371fabf96

From 7e1a09fb1cd8d6bbdb0bd4d378a1122960dc092c Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Wed, 27 Mar 2024 19:01:01 +0800
Subject: [PATCH 0367/1115] [submodule] Update submodule sonic-sairedis to the
 latest HEAD automatically (#18476)

#### Why I did it
src/sonic-sairedis
```
* 594944d - (HEAD -> master, origin/master, origin/HEAD) Fix flow counter out-of-order issue by notifying counter operations using SelectableChannel (#1362) (13 hours ago) [Stephen Sun]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-sairedis | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-sairedis b/src/sonic-sairedis
index bb948f632..594944dbe 160000
--- a/src/sonic-sairedis
+++ b/src/sonic-sairedis
@@ -1 +1 @@
-Subproject commit bb948f632bed2bec2eaa34085a8cbed92069bf83
+Subproject commit 594944dbe4414f135fc6366a30118afa10c135eb

From d5e2f64d2915ac14dd820166b1eb95a2d10e8977 Mon Sep 17 00:00:00 2001
From: saksarav-nokia <sakthivadivu.saravanaraj@nokia.com>
Date: Wed, 27 Mar 2024 12:25:22 -0400
Subject: [PATCH 0368/1115] [Nokia][Platform] Update the BCM config file to
 disable Dos attack when the MAC_SA=MAC_DA (#18446)

The SAI code was modified to trap and drop the packets if the MAC_SA==MAC_DA and soc variable sai_disable_srcmacqedstmac_ctrl=1 needs to be set in bcm config. There was a PR #13346 which added updated bcm config in 202205, but never merged to master.

Signed-off-by: saksarav <sakthivadivu.saravanaraj@nokia.com>
---
 .../0/jr2cp-nokia-18x100g-4x25g-config.bcm                     | 3 ++-
 .../1/jr2cp-nokia-18x100g-4x25g-config.bcm                     | 3 ++-
 .../Nokia-IXR7250E-36x400G/0/jr2cp-nokia-18x400g-config.bcm    | 1 +
 .../Nokia-IXR7250E-36x400G/1/jr2cp-nokia-18x400g-config.bcm    | 1 +
 4 files changed, 6 insertions(+), 2 deletions(-)

diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/0/jr2cp-nokia-18x100g-4x25g-config.bcm b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/0/jr2cp-nokia-18x100g-4x25g-config.bcm
index e289de509..bb0d84804 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/0/jr2cp-nokia-18x100g-4x25g-config.bcm
+++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/0/jr2cp-nokia-18x100g-4x25g-config.bcm
@@ -2094,4 +2094,5 @@ cmic_dma_abort_in_cold_boot=0
 sai_pfc_dlr_init_capability=0
 trunk_group_max_members=16
 sai_default_cpu_tx_tc=7
-sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc
\ No newline at end of file
+sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc
+sai_disable_srcmacqedstmac_ctrl=1
diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/1/jr2cp-nokia-18x100g-4x25g-config.bcm b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/1/jr2cp-nokia-18x100g-4x25g-config.bcm
index cb112766e..68b0e1fb6 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/1/jr2cp-nokia-18x100g-4x25g-config.bcm
+++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/1/jr2cp-nokia-18x100g-4x25g-config.bcm
@@ -2095,4 +2095,5 @@ cmic_dma_abort_in_cold_boot=0
 sai_pfc_dlr_init_capability=0
 trunk_group_max_members=16
 sai_default_cpu_tx_tc=7
-sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc
\ No newline at end of file
+sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc
+sai_disable_srcmacqedstmac_ctrl=1
diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/0/jr2cp-nokia-18x400g-config.bcm b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/0/jr2cp-nokia-18x400g-config.bcm
index eee3aad3f..f1f5052f7 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/0/jr2cp-nokia-18x400g-config.bcm
+++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/0/jr2cp-nokia-18x400g-config.bcm
@@ -2096,3 +2096,4 @@ cmic_dma_abort_in_cold_boot=0
 sai_pfc_dlr_init_capability=0
 trunk_group_max_members=16
 sai_default_cpu_tx_tc=7
+sai_disable_srcmacqedstmac_ctrl=1
diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/1/jr2cp-nokia-18x400g-config.bcm b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/1/jr2cp-nokia-18x400g-config.bcm
index 9634b0451..ff4e432ab 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/1/jr2cp-nokia-18x400g-config.bcm
+++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/1/jr2cp-nokia-18x400g-config.bcm
@@ -2098,3 +2098,4 @@ cmic_dma_abort_in_cold_boot=0
 sai_pfc_dlr_init_capability=0
 trunk_group_max_members=16
 sai_default_cpu_tx_tc=7
+sai_disable_srcmacqedstmac_ctrl=1

From 17d728ec7a9291c10ae41d0f8a3c2b4bbd5f2f58 Mon Sep 17 00:00:00 2001
From: Rida Hanif <61490193+ridahanif96@users.noreply.github.com>
Date: Thu, 28 Mar 2024 01:12:37 +0500
Subject: [PATCH 0369/1115] fix for yang disreptive change (#18428)

#### Why I did it
Removed Default Mode value from sonic-port.yang & sonic-portchannel.yang to avoid disruptive change

#### How I did it
This PR is created in reference with [PR](https://github.com/sonic-net/sonic-buildimage/pull/13580)
---
 src/sonic-yang-models/yang-models/sonic-port.yang        | 1 -
 src/sonic-yang-models/yang-models/sonic-portchannel.yang | 1 -
 2 files changed, 2 deletions(-)

diff --git a/src/sonic-yang-models/yang-models/sonic-port.yang b/src/sonic-yang-models/yang-models/sonic-port.yang
index f82d74465..2ee1d8878 100644
--- a/src/sonic-yang-models/yang-models/sonic-port.yang
+++ b/src/sonic-yang-models/yang-models/sonic-port.yang
@@ -55,7 +55,6 @@ module sonic-port{
 				leaf mode {
 					description "SwitchPort Modes possible values are routed|access|trunk. Default value  for mode is routed"; 
 					type stypes:switchport_mode; 
-					default "routed";
 				}
 
 				leaf description {
diff --git a/src/sonic-yang-models/yang-models/sonic-portchannel.yang b/src/sonic-yang-models/yang-models/sonic-portchannel.yang
index d5b57f70f..2c61f4eb5 100644
--- a/src/sonic-yang-models/yang-models/sonic-portchannel.yang
+++ b/src/sonic-yang-models/yang-models/sonic-portchannel.yang
@@ -67,7 +67,6 @@ module sonic-portchannel {
                leaf mode {
                    description "PortChannel SwitchPort Mode possible values are routed|access|trunk. Default value for mode is routed.";
                    type stypes:switchport_mode;
-                   default "routed";
 
                 }
 

From 1510b6e763b018bfe28faee783e5785c1bb8b3fa Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Thu, 28 Mar 2024 19:00:50 +0800
Subject: [PATCH 0370/1115] [submodule] Update submodule sonic-swss-common to
 the latest HEAD automatically (#18492)

#### Why I did it
src/sonic-swss-common
```
* 6b56543 - (HEAD -> master, origin/master, origin/HEAD) Add "STATE_" prefix to ASIC SDK health/event table definition (#867) (5 hours ago) [Stephen Sun]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-swss-common | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-swss-common b/src/sonic-swss-common
index afd561f38..6b5654366 160000
--- a/src/sonic-swss-common
+++ b/src/sonic-swss-common
@@ -1 +1 @@
-Subproject commit afd561f389a7b247d722b55154cc835371fabf96
+Subproject commit 6b565436645797585bd7589b17d970ef60f1f580

From 44dfff81198e467b68d6172a6ab13a62c21297f1 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Thu, 28 Mar 2024 19:00:56 +0800
Subject: [PATCH 0371/1115] [submodule] Update submodule sonic-gnmi to the
 latest HEAD automatically (#18491)

#### Why I did it
src/sonic-gnmi
```
* ad8850d - (HEAD -> master, origin/master, origin/HEAD) Merge pull request #195 from liuh-80/dev/liuh/zmq_dpu_support (2 hours ago) [Hua Liu]
* 9b2dcdb - Improve code coverage (2 days ago) [liuh-80]
* a9e52de - Fix code issue (2 days ago) [liuh-80]
* c2d594e - Handle remove ZMQ client error (2 days ago) [liuh-80]
* 70bb2ac - Merge remote-tracking branch 'origin' into dev/liuh/zmq_dpu_support (2 days ago) [liuh-80]
* 1adbee3 - Remove client when retry connect failed (3 days ago) [liuh-80]
* 359459b - Update mixed_db_client.go (7 days ago) [Hua Liu]
* 70352fa - Get DPU address by connecter (7 days ago) [liuh-80]
* 254a29d - Fix UT (8 days ago) [liuh-80]
* c1186ce - Merge with latest code (8 days ago) [liuh-80]
* e4c0649 - Fix space/tab issue (8 days ago) [liuh-80]
* e7fc8fc - Merge remote-tracking branch 'origin' into dev/liuh/get_dpu_address (9 days ago) [liuh-80]
* 0993451 - Add DbSubscriber (9 days ago) [liuh-80]
* ea5f91d - Improve code to use ConfigDBConnector (2 weeks ago) [liuh-80]
* b978e4d - Merge branch 'master' into dev/liuh/get_dpu_address (2 weeks ago) [Qi Luo]
* 654934f - Fix UT (3 weeks ago) [liuh-80]
* cb3d12f - Fix UT (3 weeks ago) [liuh-80]
* 1e2132b - Improve code coverage and fix PR comments (3 weeks ago) [liuh-80]
* a34d2b5 - Fix code (4 weeks ago) [liuh-80]
* 32ab774 - Fix build issue (4 weeks ago) [liuh-80]
* 6862050 - Add getZmqAddress method (4 weeks ago) [liuh-80]
* 17d7c4a - Fix PR comments (4 weeks ago) [liuh-80]
* 39ae8fe - Fix PR comments (4 weeks ago) [liuh-80]
* 628ce20 - Improve code (4 weeks ago) [liuh-80]
* 5f63e1c - Add getDpuAddress method to supprot multiple DPU (4 weeks ago) [liuh-80]
* 44a8071 - (origin/dev/liuh/get_dpu_address) Add getDpuAddress method (4 weeks ago) [liuh-80]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-gnmi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-gnmi b/src/sonic-gnmi
index 98d8e0f8d..ad8850d59 160000
--- a/src/sonic-gnmi
+++ b/src/sonic-gnmi
@@ -1 +1 @@
-Subproject commit 98d8e0f8dd8c979e3d53d8ae1c1fd24c19e3c501
+Subproject commit ad8850d5919993e14687feb131b349c6674d3945

From 3ed1995462cebe430a6912dcc8625f5c3c3af0c8 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Thu, 28 Mar 2024 19:01:07 +0800
Subject: [PATCH 0372/1115] [submodule] Update submodule sonic-utilities to the
 latest HEAD automatically (#18240)

#### Why I did it
src/sonic-utilities
```
* bdc57206 - (HEAD -> master, origin/master, origin/HEAD) Revert "Fix for Switch Port Modes and VLAN CLI Enhancement (#3108)" (#3246) (89 minutes ago) [jingwenxie]
* e35452b7 - Modify "show interface transceiver status" CLI to show SW cmis state (#3238) (2 days ago) [mihirpat1]
* 04a33e1f - Add "state" field in CONFIG_DB a toggle of the fabric port monitor feature (#2932) (2 days ago) [jfeng-arista]
* 3c489ba5 - Enhance route-check for multi-asic platforms (#3216) (5 days ago) [Deepak Singhal]
* c149e48b - [chassis] Add chassis support for CLI "config qos reload" (#3233) (6 days ago) [wenyiz2021]
* d8541add - Update port2alias (#3217) (8 days ago) [abdosi]
* d4688a8f - [graceful reboot] Add the pre_reboot_hook script execution, add the watchdog arm before the reboot (#3203) (8 days ago) [Vadym Hlushko]
* 125f36f3 - [ipintutil]Handle exception in show ip interfaces command (#3182) (10 days ago) [Sudharsan Dhamal Gopalarathnam]
* 9d532017 - [chassis][show-runningconfig] Fix the show runningconfiguration all issue on the Supervisor (#3194) (2 weeks ago) [Marty Y. Lok]
* 1a9261ce - [Techsupport]Handle SAI kv pair if present in sai common profile (#3196) (2 weeks ago) [Sudharsan Dhamal Gopalarathnam]
* 7466dc4a - Skip the validation of action in acl-loader if capability table in STATE_DB is empty (#3199) (2 weeks ago) [bingwang-ms]
* b879b658 - [Bug] Fix fw_setenv illegel character issue (#3201) (3 weeks ago) [xumia]
* 0b41a560 - [config] Add YANG alerting for override (#3188) (3 weeks ago) [jingwenxie]
* 24683b0c - [show] multi-asic show running test residue (#3198) (3 weeks ago) [jingwenxie]
* 995a797a - CLI to skip polling for periodic information for a port in DomInfoUpdateTask thread (#3187) (3 weeks ago) [mihirpat1]
* 9aa9eaa5 - [config] Add Table hard dependency check (#3159) (3 weeks ago) [jingwenxie]
* 5f0ffcca - [fast/warm-reboot] Put ERR message in syslog when a failure is seen (#3186) (4 weeks ago) [Vaibhav Hemant Dixit]
* 92220dcf - Fix for Switch Port Modes and VLAN CLI Enhancement (#3108) (4 weeks ago) [Saba Akram]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-utilities | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-utilities b/src/sonic-utilities
index bf3559604..bdc57206c 160000
--- a/src/sonic-utilities
+++ b/src/sonic-utilities
@@ -1 +1 @@
-Subproject commit bf3559604b2bcb027093e2d1afa68a8de8503c15
+Subproject commit bdc57206cdff258a63907bb43c5845fe9ac57386

From 604cae0ee05b25d5c733a84e0f3f8a5468efa16f Mon Sep 17 00:00:00 2001
From: Konstantin Vasin <126960927+k-v1@users.noreply.github.com>
Date: Fri, 29 Mar 2024 07:44:05 +0300
Subject: [PATCH 0373/1115] [build]: Fix distclean for bookworm (#18084)

make distclean is broken because FIPS support is not yet available on Bookworm
---
 rules/sonic-fips.mk | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/rules/sonic-fips.mk b/rules/sonic-fips.mk
index 3ce37224b..b6c0d1743 100644
--- a/rules/sonic-fips.mk
+++ b/rules/sonic-fips.mk
@@ -53,9 +53,10 @@ FIPS_KRB5_ALL = $(FIPS_KRB5) $(FIPS_KRB5_SUPPORT0) $(FIPS_KRB5_3) $(FIPS_KRB5_LI
 FIPS_DERIVED_TARGET = $(FIPS_OPENSSL_ALL) $(FIPS_OPENSSH_ALL) $(FIPS_GOLANG_ALL) $(FIPS_PYTHON_ALL) $(FIPS_KRB5_ALL)
 FIPS_PACKAGE_ALL = $(SYMCRYPT_OPENSSL) $(FIPS_DERIVED_TARGET)
 
-$(foreach package,$(FIPS_DERIVED_TARGET),$(eval $(call add_extra_package,$(SYMCRYPT_OPENSSL),$(package))))
 
 ifeq ($(INCLUDE_FIPS), y)
   FIPS_BASEIMAGE_INSTALLERS = $(FIPS_OPENSSL_LIBSSL) $(FIPS_OPENSSL_LIBSSL_DEV) $(FIPS_OPENSSL) $(SYMCRYPT_OPENSSL) $(FIPS_OPENSSH) $(FIPS_OPENSSH_CLIENT) $(FIPS_OPENSSH_SFTP_SERVER) $(FIPS_OPENSSH_SERVER) $(FIPS_KRB5)
   SONIC_MAKE_DEBS += $(SYMCRYPT_OPENSSL)
+
+$(foreach package,$(FIPS_DERIVED_TARGET),$(eval $(call add_extra_package,$(SYMCRYPT_OPENSSL),$(package))))
 endif

From 72eaa85e26a0505b0813807d98a3c86a9a8b5c97 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Fri, 29 Mar 2024 19:00:48 +0800
Subject: [PATCH 0374/1115] [submodule] Update submodule sonic-gnmi to the
 latest HEAD automatically (#18503)

#### Why I did it
src/sonic-gnmi
```
* feaa1df - (HEAD -> master, origin/master, origin/HEAD) Add inotify monitoring for certificates (#203) (11 hours ago) [Zain Budhwani]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-gnmi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-gnmi b/src/sonic-gnmi
index ad8850d59..feaa1df73 160000
--- a/src/sonic-gnmi
+++ b/src/sonic-gnmi
@@ -1 +1 @@
-Subproject commit ad8850d5919993e14687feb131b349c6674d3945
+Subproject commit feaa1df733f825d2718ed59a2b1e6ac50635f6b7

From 7bd83ccbdd07f322399d17d5330a162d071d4ad4 Mon Sep 17 00:00:00 2001
From: byu343 <byu@arista.com>
Date: Sat, 30 Mar 2024 00:15:31 -0700
Subject: [PATCH 0375/1115] [Arista] Update phy-credo package for bookworm
 (#18464)

For the debian bookworm, we fixed some build issue of phy-credo package and packaged it for the bookworm.
---
 rules/phy-credo.mk | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/rules/phy-credo.mk b/rules/phy-credo.mk
index 2ade08eba..cfc62e77e 100644
--- a/rules/phy-credo.mk
+++ b/rules/phy-credo.mk
@@ -1,3 +1,3 @@
 PHY_CREDO = phy-credo_1.0_amd64.deb
-$(PHY_CREDO)_URL = "https://github.com/aristanetworks/sonic-firmware/raw/446f30ccd8626f904d89d5798da7294948e090a6/phy/phy-credo_1.0_amd64.deb"
+$(PHY_CREDO)_URL = "https://github.com/aristanetworks/sonic-firmware/raw/9e34da2a2d2d1e7e972cda3064b7b73c0558b322/phy/phy-credo_1.0_amd64.deb"
 SONIC_ONLINE_DEBS += $(PHY_CREDO)

From 814badbdf141f54d56b40f35abfc75f4d9ef33a2 Mon Sep 17 00:00:00 2001
From: Mati Alfaro <mati@marvell.com>
Date: Sat, 30 Mar 2024 10:41:02 +0300
Subject: [PATCH 0376/1115] [Yang-models] Update sonic-vlan.yang to better
 constrain Vlan name (#18207)

Related to #3155
Update sonic-vlan.yang model to match requirement as described in #16975

Signed-off-by: matiAlfaro <mati@marvell.com>
---
 .../tests/yang_model_tests/test_yang_model.py               | 2 +-
 src/sonic-yang-models/yang-models/sonic-vlan.yang           | 6 +++++-
 2 files changed, 6 insertions(+), 2 deletions(-)

diff --git a/src/sonic-yang-models/tests/yang_model_tests/test_yang_model.py b/src/sonic-yang-models/tests/yang_model_tests/test_yang_model.py
index d776f479c..d46d03623 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/test_yang_model.py
+++ b/src/sonic-yang-models/tests/yang_model_tests/test_yang_model.py
@@ -235,7 +235,7 @@ def runVlanSpecialTest(self, test):
             self.logStartTest(desc)
             jInput = json.loads(self.readJsonInput(test))
             # check all Vlan from 1 to 4094
-            for i in range(4095):
+            for i in range(1,4095):
                 vlan = 'Vlan'+str(i)
                 jInput["sonic-vlan:sonic-vlan"]["sonic-vlan:VLAN"]["VLAN_LIST"]\
                       [0]["name"] = vlan
diff --git a/src/sonic-yang-models/yang-models/sonic-vlan.yang b/src/sonic-yang-models/yang-models/sonic-vlan.yang
index ad1ab8d74..1e2361ade 100644
--- a/src/sonic-yang-models/yang-models/sonic-vlan.yang
+++ b/src/sonic-yang-models/yang-models/sonic-vlan.yang
@@ -36,6 +36,10 @@ module sonic-vlan {
 
 	description "VLAN yang Module for SONiC OS";
 
+	revision 2021-04-28 {
+		description "Modify Vlan name constraint to allow only legal Vlan names";
+	}
+
 	revision 2021-04-22 {
 		description "Modify Vlan Member to include PortChannel along with Port";
 	}
@@ -178,7 +182,7 @@ module sonic-vlan {
 
 				leaf name {
 					type string {
-						pattern 'Vlan([0-9]{1,3}|[1-3][0-9]{3}|[4][0][0-8][0-9]|[4][0][9][0-4])';
+						pattern 'Vlan(409[0-5]|40[0-8][0-9]|[1-3][0-9]{3}|[1-9][0-9]{2}|[1-9][0-9]|[1-9])';
 					}
 				}
 

From 7ef22fdcb38f9317c486561db3a95ad5d075604e Mon Sep 17 00:00:00 2001
From: Christian Svensson <blue@cmd.nu>
Date: Sat, 30 Mar 2024 08:49:47 +0100
Subject: [PATCH 0377/1115] [build] verbose output in wait_for_docker.sh when
 timing out (#17869)

If there is some problem starting the internal dockerd currently the only output in the build output is 60x `errors pretty printing info`. This comes from the stderr on the `docker info` invocations and is not helpful to the user.
The final error becomes `make: *** [slave.mk:918: docker-start] Error 1`.

Instead, hide the `errors pretty printing info` messages and print the log of dockerd if we time out.

Signed-off-by: Christian Svensson <blue@cmd.nu>
---
 scripts/wait_for_docker.sh | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/scripts/wait_for_docker.sh b/scripts/wait_for_docker.sh
index 744646732..e76af076b 100755
--- a/scripts/wait_for_docker.sh
+++ b/scripts/wait_for_docker.sh
@@ -3,7 +3,7 @@
 total_time=$1
 cnt=0
 while [ $cnt -le $total_time ]; do
-    docker info 1>/dev/null
+    docker info &>/dev/null
     rv=$?
     if [ $rv -eq 0 ]; then
         exit 0
@@ -12,4 +12,9 @@ while [ $cnt -le $total_time ]; do
     cnt=$((cnt+1))
 done
 
+echo 'Timed out waiting for internal docker daemon to start' > /dev/stderr
+echo '==== START OF /var/log/docker.log ===='
+cat /var/log/docker.log
+echo '==== END OF /var/log/docker.log ===='
+
 exit 1

From 3fc87a8b04f47f5c4e2fd1dbcd66b0feb39a39a6 Mon Sep 17 00:00:00 2001
From: krismarvell <108510436+krismarvell@users.noreply.github.com>
Date: Sat, 30 Mar 2024 13:22:56 +0530
Subject: [PATCH 0378/1115] [innovium]: Add SDK dependent python packages
 (#18232)

This change adds dependent python packages required for innovium platform sdk
---
 platform/innovium/docker-syncd-invm/Dockerfile.j2 | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/platform/innovium/docker-syncd-invm/Dockerfile.j2 b/platform/innovium/docker-syncd-invm/Dockerfile.j2
index 449f0d346..514e22373 100755
--- a/platform/innovium/docker-syncd-invm/Dockerfile.j2
+++ b/platform/innovium/docker-syncd-invm/Dockerfile.j2
@@ -17,6 +17,9 @@ debs/
 RUN apt-get install -y net-tools
 RUN apt-get install -y libjansson4
 RUN apt-get install -y libyaml-dev
+RUN apt-get install -y binutils
+RUN pip3 install numpy
+RUN pip3 install yamlordereddictloader
 
 RUN dpkg -i \
 {% for deb in docker_syncd_invm_debs.split(' ') -%}

From a8878907430ea62895478b6c33a5824321bc0bd5 Mon Sep 17 00:00:00 2001
From: Christian Svensson <blue@cmd.nu>
Date: Sat, 30 Mar 2024 08:57:41 +0100
Subject: [PATCH 0379/1115] [build]: fix invalid comparison in onie-mk-demo.sh
 (#17791)

In shell the operand `-ne` only works on integers. In this case we are trying to compare two strings, which it fails doing:

```
+ [ no_sign -ne no_sign ]
./onie-mk-demo.sh: 176: [: Illegal number: no_sign
```

Instead, use the != operand which is made for this type of comparison. Reference: `man test`.

Signed-off-by: Christian Svensson <blue@cmd.nu>
---
 onie-mk-demo.sh | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/onie-mk-demo.sh b/onie-mk-demo.sh
index c197731fa..72140407f 100755
--- a/onie-mk-demo.sh
+++ b/onie-mk-demo.sh
@@ -174,7 +174,7 @@ if [ "$SECURE_UPGRADE_MODE" = "dev" -o "$SECURE_UPGRADE_MODE" = "prod" ]; then
     # append signature to binary
     cat ${CMS_SIG} >> ${output_file}
     sudo rm -rf ${CMS_SIG}
-elif [ "$SECURE_UPGRADE_MODE" -ne "no_sign" ]; then
+elif [ "$SECURE_UPGRADE_MODE" != "no_sign" ]; then
     echo "SECURE_UPGRADE_MODE not defined or defined as $SECURE_UPGRADE_MODE - build without signing"
 fi
 

From 5a2768c6983d7013d76d376798f804f568574123 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sat, 30 Mar 2024 19:01:00 +0800
Subject: [PATCH 0380/1115] [submodule] Update submodule sonic-swss-common to
 the latest HEAD automatically (#18515)

#### Why I did it
src/sonic-swss-common
```
* 5922fdc - (HEAD -> master, origin/master, origin/HEAD) [Chassis][database][sonic-db-cli] Fix the instance database# failed to start up in LC (#866) (10 hours ago) [Marty Y. Lok]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-swss-common | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-swss-common b/src/sonic-swss-common
index 6b5654366..5922fdc4c 160000
--- a/src/sonic-swss-common
+++ b/src/sonic-swss-common
@@ -1 +1 @@
-Subproject commit 6b565436645797585bd7589b17d970ef60f1f580
+Subproject commit 5922fdc4cb55c3bcbdd190e084197dffdcd74d21

From a56cf7905cdf114c2647723fec8235cfab8e9f06 Mon Sep 17 00:00:00 2001
From: "Marty Y. Lok" <76118573+mlok-nokia@users.noreply.github.com>
Date: Sat, 30 Mar 2024 16:10:09 -0400
Subject: [PATCH 0381/1115] [supervisor][sfm]Fix the issue of swss.sh shows
 backtrace when shutdown a SFM. (#18393)

On a Supervisor card of a VOQ chassis, when remove or shutdown a Fabric card, swss.sh shows Stacktrace for all related empty SFM slots in the syslog file. This PR fixes #18384

How I did it
In the asic_status.py, all empty SFM slots related swss.sh is in the waiting state to wait for the presence event of SFM -- SET operation. The subscriber event handler also includes the "DEL" operation when a SFM is shutdown/removal. When a SFM is shutdown, all empty slot's swss.sh also get the "DEL" event although it is not for them. In the "DEL" operation, the current implementation doesn't check if this "DEL" operation for them, and then they exit the wait state and proceed to docker-wait-any with wrong operation in the wrong slot. docker-wait0any raise the backtarce.

How to verify it
In a chassis which has some empty SMF slot, remove or shutdown a SFM. There should not be related stacktrace shown in syslog

Signed-off-by: mlok <marty.lok@nokia.com>
---
 files/scripts/asic_status.py | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/files/scripts/asic_status.py b/files/scripts/asic_status.py
index 81a7aabc9..a518caac8 100755
--- a/files/scripts/asic_status.py
+++ b/files/scripts/asic_status.py
@@ -69,8 +69,9 @@ def main():
                 logger.log_info('Detected asic{} is online'.format(global_asic_id))
                 sys.exit(0)
         elif asic_op == 'DEL':
-            logger.log_info('Detected asic{} is offline'.format(global_asic_id))
-            sys.exit(1)
+            if (global_asic_id == args_asic_id):
+                logger.log_info('Detected asic{} is offline'.format(global_asic_id))
+                sys.exit(1)
         else:
             continue
 

From cd09284ac8551080141d20be08e5db42477f1265 Mon Sep 17 00:00:00 2001
From: Wenda Chu <32250288+w1nda@users.noreply.github.com>
Date: Mon, 1 Apr 2024 09:20:22 -0700
Subject: [PATCH 0382/1115] fix missing parameter and add UT (#18501)

---
 .../cli-plugin-tests/test_config_dhcp_server.py | 16 ++++++++++++++++
 .../cli-plugin-tests/test_show_dhcp_server.py   | 17 +++++++++++++++++
 .../cli/config/plugins/dhcp_server.py           |  7 +++++--
 .../cli/show/plugins/show_dhcp_server.py        |  5 ++++-
 4 files changed, 42 insertions(+), 3 deletions(-)

diff --git a/dockers/docker-dhcp-server/cli-plugin-tests/test_config_dhcp_server.py b/dockers/docker-dhcp-server/cli-plugin-tests/test_config_dhcp_server.py
index bc91dfe98..2871b7c06 100644
--- a/dockers/docker-dhcp-server/cli-plugin-tests/test_config_dhcp_server.py
+++ b/dockers/docker-dhcp-server/cli-plugin-tests/test_config_dhcp_server.py
@@ -33,6 +33,22 @@ def test_plugin_registration(self):
     def test_validate_str_type(self, type, value, result):
         assert dhcp_server.validate_str_type(type, value) == result
 
+    @pytest.mark.parametrize("state", ["disabled", "enabled"])
+    def test_config_dhcp_server_feature_state_checking(self, mock_db, state):
+        runner = CliRunner()
+        db = clicommon.Db()
+        db.db = mock_db
+        mock_db.set("CONFIG_DB", "FEATURE|dhcp_server", "state", state)
+        result = runner.invoke(dhcp_server.dhcp_server, obj=db)
+        if state == "disabled":
+            assert result.exit_code == 2, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
+            assert "Feature dhcp_server is not enabled" in result.output
+        elif state == "enabled":
+            assert result.exit_code == 0, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
+            assert "Usage: dhcp_server [OPTIONS] COMMAND [ARGS]" in result.output
+        else:
+            assert False
+
     def test_config_dhcp_server_ipv4_add(self, mock_db):
         expected_value = {
             "gateway": "10.10.10.10",
diff --git a/dockers/docker-dhcp-server/cli-plugin-tests/test_show_dhcp_server.py b/dockers/docker-dhcp-server/cli-plugin-tests/test_show_dhcp_server.py
index bacf911b3..7dbcfc0e3 100644
--- a/dockers/docker-dhcp-server/cli-plugin-tests/test_show_dhcp_server.py
+++ b/dockers/docker-dhcp-server/cli-plugin-tests/test_show_dhcp_server.py
@@ -1,3 +1,4 @@
+import pytest
 import sys
 from unittest import mock
 
@@ -14,6 +15,22 @@ def test_plugin_registration(self):
         cli = mock.MagicMock()
         show_dhcp_server.register(cli)
 
+    @pytest.mark.parametrize("state", ["disabled", "enabled"])
+    def test_show_dhcp_server_feature_state_checking(self, mock_db, state):
+        runner = CliRunner()
+        db = clicommon.Db()
+        db.db = mock_db
+        mock_db.set("CONFIG_DB", "FEATURE|dhcp_server", "state", state)
+        result = runner.invoke(show_dhcp_server.dhcp_server, obj=db)
+        if state == "disabled":
+            assert result.exit_code == 2, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
+            assert "Feature dhcp_server is not enabled" in result.output
+        elif state == "enabled":
+            assert result.exit_code == 0, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
+            assert "Usage: dhcp_server [OPTIONS] COMMAND [ARGS]" in result.output
+        else:
+            assert False
+
     def test_show_dhcp_server_ipv4_lease_without_dhcpintf(self, mock_db):
         expected_stdout = """\
 +---------------------+-------------------+-------------+---------------------+---------------------+
diff --git a/dockers/docker-dhcp-server/cli/config/plugins/dhcp_server.py b/dockers/docker-dhcp-server/cli/config/plugins/dhcp_server.py
index 7f94045e6..0aabf1c29 100644
--- a/dockers/docker-dhcp-server/cli/config/plugins/dhcp_server.py
+++ b/dockers/docker-dhcp-server/cli/config/plugins/dhcp_server.py
@@ -45,14 +45,17 @@ def validate_str_type(type_, value):
     return False
 
 
-@click.group(cls=clicommon.AbbreviationGroup, name="dhcp_server")
+@click.group(cls=clicommon.AbbreviationGroup, name="dhcp_server", invoke_without_command=True)
 @clicommon.pass_db
-def dhcp_server():
+def dhcp_server(db):
     """config DHCP Server information"""
     ctx = click.get_current_context()
     dbconn = db.db
     if dbconn.get("CONFIG_DB", "FEATURE|dhcp_server", "state") != "enabled":
         ctx.fail("Feature dhcp_server is not enabled")
+    if ctx.invoked_subcommand is None:
+        click.echo(ctx.get_help())
+        ctx.exit()
 
 
 @dhcp_server.group(cls=clicommon.AliasedGroup, name="ipv4")
diff --git a/dockers/docker-dhcp-server/cli/show/plugins/show_dhcp_server.py b/dockers/docker-dhcp-server/cli/show/plugins/show_dhcp_server.py
index eb5e276c3..5388b4617 100644
--- a/dockers/docker-dhcp-server/cli/show/plugins/show_dhcp_server.py
+++ b/dockers/docker-dhcp-server/cli/show/plugins/show_dhcp_server.py
@@ -13,7 +13,7 @@ def ts_to_str(ts):
     return datetime.fromtimestamp(int(ts)).strftime("%Y-%m-%d %H:%M:%S")
 
 
-@click.group(cls=clicommon.AbbreviationGroup, name="dhcp_server")
+@click.group(cls=clicommon.AbbreviationGroup, name="dhcp_server", invoke_without_command=True)
 @clicommon.pass_db
 def dhcp_server(db):
     """Show dhcp_server related info"""
@@ -21,6 +21,9 @@ def dhcp_server(db):
     dbconn = db.db
     if dbconn.get("CONFIG_DB", "FEATURE|dhcp_server", "state") != "enabled":
         ctx.fail("Feature dhcp_server is not enabled")
+    if ctx.invoked_subcommand is None:
+        click.echo(ctx.get_help())
+        ctx.exit()
 
 
 @dhcp_server.group(cls=clicommon.AliasedGroup)

From bf592f674562e7a8345e081ba20e6f5d5b40629a Mon Sep 17 00:00:00 2001
From: Ze Gan <ganze718@gmail.com>
Date: Tue, 2 Apr 2024 12:25:53 +0800
Subject: [PATCH 0383/1115] [systemd/systemd-sonic-generator]: Systemd midplane
 network service of Smart Switch (#18178)
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

Why I did it
Add systemd network service of Smart Switch for configuring the midplane network.

How I did it

Add related systemd services and networkd configuration
According to paltform.json, the systemd-sonic-generator will install required services.
The changes are based on the HLD: sonic-net/SONiC#1534 and sonic-net/SONiC#1586

How to verify it
Check Azp that no failure to the existing testcases
Check NPU scenario:
2.1 Start a KVM and add the NPU platform.json as following
echo '{"DPUS":{"dpu0":{}, "dpu1":{}}}' | sudo tee /usr/share/sonic/device/x86_64-kvm_x86_64-r0/platform.json
2.2 You should get two specific database containers for DPU

admin@vlab-01:~$ docker ps -a
CONTAINER ID   IMAGE                                COMMAND                  CREATED          STATUS         PORTS     NAMES
4455f7ab611c   docker-database:latest               "/usr/local/bin/dock…"   5 minutes ago    Up 5 minutes             databasedpu0
8e983b5beb27   docker-database:latest               "/usr/local/bin/dock…"   5 minutes ago    Up 5 minutes             databasedpu1
2.3 Check the expected service midplane-network-npu.service is enabled but the midplane-network-dpu.service is disabled

admin@vlab-01:~$ sudo systemctl list-unit-files '*midplane*'
UNIT FILE                    STATE           PRESET
midplane-network-dpu.service disabled        enabled
midplane-network-npu.service enabled-runtime  enabled
2.4 Check the bridge-midplane has been created.

admin@vlab-01:~$ sudo brctl show
bridge name     bridge id               STP enabled     interfaces
...
bridge-midplane         8000.76c5a51a18f6       no              dummy-midplane
2.5 If we create two mock dpu interfaces, they should be added into the bridge-midplane automatically

admin@vlab-01:~$ sudo ip link add dpu0 type veth peer dpu1
admin@vlab-01:~$ sudo brctl show
bridge name     bridge id               STP enabled     interfaces
...
bridge-midplane         8000.76c5a51a18f6       no              dpu0 dpu1 dummy-midplane
Check DPU scenario:
3.1 Start a KVM and add the DPU platform.json as following
echo '{"DPU":{}}' | sudo tee /usr/share/sonic/device/x86_64-kvm_x86_64-r0/platform.json
3.2 Check the expected service midplane-network-dpu.service is enabled but the midplane-network-npu.service is disabled

admin@vlab-01:~$ sudo systemctl list-unit-files '*midplane*'
UNIT FILE                    STATE           PRESET
midplane-network-dpu.service disabled        enabled
midplane-network-npu.service enabled-runtime enabled
3.3 The database service should be started after(waiting for) midplane-network-dpu.service with a 10mins delay

admin@vlab-01:~$ uptime
 16:08:21 up 29 min,  1 user,  load average: 0.01, 0.08, 0.12
admin@vlab-01:~$ docker ps -a
CONTAINER ID   IMAGE                                COMMAND                  CREATED          STATUS          PORTS     NAMES
...
ae5195283cd6   docker-database:latest               "/usr/local/bin/dock…"   35 minutes ago   Up 18 minutes             database
29min-18min≈10mins (Because in the KVM, we don't have an exact eth0-midplane interface and its DHCP provider)


Signed-off-by: Ze Gan <ganze718@gmail.com>
---
 .../build_templates/sonic_debian_extension.j2 |  29 +
 .../midplane-network/bridge-midplane.netdev   |   5 +
 .../midplane-network/bridge-midplane.network  |   8 +
 .../midplane-network/dummy-midplane.netdev    |   5 +
 .../midplane-network/dummy-midplane.network   |   9 +
 .../midplane-network-dpu.network              |   5 +
 .../midplane-network-dpu.service              |  15 +
 .../midplane-network-npu.network              |   5 +
 .../midplane-network-npu.service              |  14 +
 src/systemd-sonic-generator/Makefile          |   4 +-
 src/systemd-sonic-generator/ssg-test.cc       | 258 +++++++-
 .../systemd-sonic-generator.c                 | 608 +++++++++++++++++-
 .../systemd-sonic-generator.h                 |   8 +-
 .../tests/testfiles/bridge-midplane.netdev    |   1 +
 .../tests/testfiles/bridge-midplane.network   |   1 +
 .../tests/testfiles/database.service          |  14 +
 .../tests/testfiles/database@.service         |  14 +
 .../tests/testfiles/dummy-midplane.netdev     |   1 +
 .../tests/testfiles/dummy-midplane.network    |   1 +
 .../testfiles/midplane-network-dpu.network    |   1 +
 .../testfiles/midplane-network-dpu.service    |   1 +
 .../testfiles/midplane-network-npu.network    |   1 +
 .../testfiles/midplane-network-npu.service    |   1 +
 23 files changed, 943 insertions(+), 66 deletions(-)
 create mode 100644 files/image_config/midplane-network/bridge-midplane.netdev
 create mode 100644 files/image_config/midplane-network/bridge-midplane.network
 create mode 100644 files/image_config/midplane-network/dummy-midplane.netdev
 create mode 100644 files/image_config/midplane-network/dummy-midplane.network
 create mode 100644 files/image_config/midplane-network/midplane-network-dpu.network
 create mode 100644 files/image_config/midplane-network/midplane-network-dpu.service
 create mode 100644 files/image_config/midplane-network/midplane-network-npu.network
 create mode 100644 files/image_config/midplane-network/midplane-network-npu.service
 create mode 120000 src/systemd-sonic-generator/tests/testfiles/bridge-midplane.netdev
 create mode 120000 src/systemd-sonic-generator/tests/testfiles/bridge-midplane.network
 create mode 100644 src/systemd-sonic-generator/tests/testfiles/database.service
 create mode 100644 src/systemd-sonic-generator/tests/testfiles/database@.service
 create mode 120000 src/systemd-sonic-generator/tests/testfiles/dummy-midplane.netdev
 create mode 120000 src/systemd-sonic-generator/tests/testfiles/dummy-midplane.network
 create mode 120000 src/systemd-sonic-generator/tests/testfiles/midplane-network-dpu.network
 create mode 120000 src/systemd-sonic-generator/tests/testfiles/midplane-network-dpu.service
 create mode 120000 src/systemd-sonic-generator/tests/testfiles/midplane-network-npu.network
 create mode 120000 src/systemd-sonic-generator/tests/testfiles/midplane-network-npu.service

diff --git a/files/build_templates/sonic_debian_extension.j2 b/files/build_templates/sonic_debian_extension.j2
index a1e102759..a730d4e9a 100644
--- a/files/build_templates/sonic_debian_extension.j2
+++ b/files/build_templates/sonic_debian_extension.j2
@@ -47,6 +47,7 @@ DOCKER_CTL_SCRIPT="$DOCKER_CTL_DIR/docker.sh"
 FILESYSTEM_ROOT_USR="$FILESYSTEM_ROOT/usr"
 FILESYSTEM_ROOT_USR_LIB="$FILESYSTEM_ROOT/usr/lib/"
 FILESYSTEM_ROOT_USR_LIB_SYSTEMD_SYSTEM="$FILESYSTEM_ROOT_USR_LIB/systemd/system"
+FILESYSTEM_ROOT_USR_LIB_SYSTEMD_NETWORK="$FILESYSTEM_ROOT_USR_LIB/systemd/network"
 FILESYSTEM_ROOT_USR_SHARE="$FILESYSTEM_ROOT_USR/share"
 FILESYSTEM_ROOT_USR_SHARE_SONIC="$FILESYSTEM_ROOT_USR_SHARE/sonic"
 FILESYSTEM_ROOT_USR_SHARE_SONIC_SCRIPTS="$FILESYSTEM_ROOT_USR_SHARE_SONIC/scripts"
@@ -637,6 +638,34 @@ sudo cp $IMAGE_CONFIGS/config-chassisdb/config-chassisdb $FILESYSTEM_ROOT/usr/bi
 echo "config-chassisdb.service" | sudo tee -a $GENERATED_SERVICE_FILE
 sudo LANG=C chroot $FILESYSTEM_ROOT systemctl enable config-chassisdb.service
 
+# Copy midplane network service file for smart switch
+sudo cp $IMAGE_CONFIGS/midplane-network/bridge-midplane.netdev $FILESYSTEM_ROOT_USR_LIB_SYSTEMD_NETWORK/bridge-midplane.netdev
+sudo cp $IMAGE_CONFIGS/midplane-network/bridge-midplane.network $FILESYSTEM_ROOT_USR_LIB_SYSTEMD_NETWORK/bridge-midplane.network
+sudo cp $IMAGE_CONFIGS/midplane-network/dummy-midplane.netdev $FILESYSTEM_ROOT_USR_LIB_SYSTEMD_NETWORK/dummy-midplane.netdev
+sudo cp $IMAGE_CONFIGS/midplane-network/dummy-midplane.network $FILESYSTEM_ROOT_USR_LIB_SYSTEMD_NETWORK/dummy-midplane.network
+sudo cp $IMAGE_CONFIGS/midplane-network/midplane-network-npu.network $FILESYSTEM_ROOT_USR_LIB_SYSTEMD_NETWORK/midplane-network-npu.network
+sudo cp $IMAGE_CONFIGS/midplane-network/midplane-network-dpu.network $FILESYSTEM_ROOT_USR_LIB_SYSTEMD_NETWORK/midplane-network-dpu.network
+sudo cp $IMAGE_CONFIGS/midplane-network/midplane-network-npu.service $FILESYSTEM_ROOT_USR_LIB_SYSTEMD_SYSTEM/midplane-network-npu.service
+sudo cp $IMAGE_CONFIGS/midplane-network/midplane-network-dpu.service $FILESYSTEM_ROOT_USR_LIB_SYSTEMD_SYSTEM/midplane-network-dpu.service
+
+# Disable smart switch unit by default, these units will be controlled by systemd-sonic-generator
+sudo ln -s /dev/null $FILESYSTEM_ROOT/etc/systemd/network/bridge-midplane.netdev
+sudo ln -s /dev/null $FILESYSTEM_ROOT/etc/systemd/network/bridge-midplane.network
+sudo ln -s /dev/null $FILESYSTEM_ROOT/etc/systemd/network/dummy-midplane.netdev
+sudo ln -s /dev/null $FILESYSTEM_ROOT/etc/systemd/network/dummy-midplane.network
+sudo ln -s /dev/null $FILESYSTEM_ROOT/etc/systemd/network/midplane-network-npu.network
+sudo ln -s /dev/null $FILESYSTEM_ROOT/etc/systemd/network/midplane-network-dpu.network
+echo "midplane-network-npu.service" | sudo tee -a $GENERATED_SERVICE_FILE
+sudo LANG=C chroot $FILESYSTEM_ROOT systemctl disable midplane-network-npu.service
+echo "midplane-network-dpu.service" | sudo tee -a $GENERATED_SERVICE_FILE
+sudo LANG=C chroot $FILESYSTEM_ROOT systemctl disable midplane-network-dpu.service
+
+# According to the issue: https://github.com/systemd/systemd/issues/19106, To disable ManageForeignRoutingPolicyRules to avoid the ip rules being deleted by systemd-networkd
+sudo sed -i 's/#ManageForeignRoutingPolicyRules=yes/ManageForeignRoutingPolicyRules=no/g' $FILESYSTEM_ROOT/etc/systemd/networkd.conf
+
+sudo LANG=C chroot $FILESYSTEM_ROOT systemctl enable systemd-networkd
+sudo LANG=C chroot $FILESYSTEM_ROOT systemctl disable systemd-networkd-wait-online.service
+
 # Copy backend-acl script and service file
 sudo cp $IMAGE_CONFIGS/backend_acl/backend-acl.service $FILESYSTEM_ROOT_USR_LIB_SYSTEMD_SYSTEM/backend-acl.service
 sudo cp $IMAGE_CONFIGS/backend_acl/backend_acl.py $FILESYSTEM_ROOT/usr/bin/backend_acl.py
diff --git a/files/image_config/midplane-network/bridge-midplane.netdev b/files/image_config/midplane-network/bridge-midplane.netdev
new file mode 100644
index 000000000..829d65989
--- /dev/null
+++ b/files/image_config/midplane-network/bridge-midplane.netdev
@@ -0,0 +1,5 @@
+# Bridge interface for midplane network
+
+[NetDev]
+Name=bridge-midplane
+Kind=bridge
diff --git a/files/image_config/midplane-network/bridge-midplane.network b/files/image_config/midplane-network/bridge-midplane.network
new file mode 100644
index 000000000..5a7cabf8f
--- /dev/null
+++ b/files/image_config/midplane-network/bridge-midplane.network
@@ -0,0 +1,8 @@
+# Network configuration for bridge midplane
+
+[Match]
+Name=bridge-midplane
+
+[Network]
+Address=169.254.200.254/24
+LinkLocalAddressing=no
diff --git a/files/image_config/midplane-network/dummy-midplane.netdev b/files/image_config/midplane-network/dummy-midplane.netdev
new file mode 100644
index 000000000..ea92c8753
--- /dev/null
+++ b/files/image_config/midplane-network/dummy-midplane.netdev
@@ -0,0 +1,5 @@
+# Dummy interface for midplane network
+
+[NetDev]
+Name=dummy-midplane
+Kind=dummy
diff --git a/files/image_config/midplane-network/dummy-midplane.network b/files/image_config/midplane-network/dummy-midplane.network
new file mode 100644
index 000000000..dd4b8d655
--- /dev/null
+++ b/files/image_config/midplane-network/dummy-midplane.network
@@ -0,0 +1,9 @@
+# The systemd-networkd requires that the bridge interface(bridge-midplane) has at least one member interface, otherwise the IP address will not be configured.
+# This dummy interface will be added into the bridge-midplane as a member to guarantee the IP address configuration correctly.
+# Refer: https://github.com/systemd/systemd/issues/9252#issuecomment-771540028
+
+[Match]
+Name=dummy-midplane
+
+[Network]
+Bridge=bridge-midplane
diff --git a/files/image_config/midplane-network/midplane-network-dpu.network b/files/image_config/midplane-network/midplane-network-dpu.network
new file mode 100644
index 000000000..bb4c58ed9
--- /dev/null
+++ b/files/image_config/midplane-network/midplane-network-dpu.network
@@ -0,0 +1,5 @@
+[Match]
+Name=eth0-midplane
+
+[Network]
+DHCP=yes
diff --git a/files/image_config/midplane-network/midplane-network-dpu.service b/files/image_config/midplane-network/midplane-network-dpu.service
new file mode 100644
index 000000000..5750850b7
--- /dev/null
+++ b/files/image_config/midplane-network/midplane-network-dpu.service
@@ -0,0 +1,15 @@
+# Oneshot midplane network service
+
+[Unit]
+Description=Midplane network service
+Requires=systemd-networkd.service
+After=systemd-networkd.service
+Before=database.service
+
+[Service]
+Type=oneshot
+User=root
+ExecStart=/usr/lib/systemd/systemd-networkd-wait-online -i eth0-midplane --timeout=600
+
+[Install]
+WantedBy=multi-user.target
diff --git a/files/image_config/midplane-network/midplane-network-npu.network b/files/image_config/midplane-network/midplane-network-npu.network
new file mode 100644
index 000000000..8cc4a2264
--- /dev/null
+++ b/files/image_config/midplane-network/midplane-network-npu.network
@@ -0,0 +1,5 @@
+[Match]
+Name=dpu*
+
+[Network]
+Bridge=bridge-midplane
diff --git a/files/image_config/midplane-network/midplane-network-npu.service b/files/image_config/midplane-network/midplane-network-npu.service
new file mode 100644
index 000000000..785f048ac
--- /dev/null
+++ b/files/image_config/midplane-network/midplane-network-npu.service
@@ -0,0 +1,14 @@
+# Oneshot midplane network service
+
+[Unit]
+Description=Midplane network service
+Requires=systemd-networkd.service
+After=systemd-networkd.service
+
+[Service]
+Type=oneshot
+User=root
+ExecStart=/usr/lib/systemd/systemd-networkd-wait-online -i bridge-midplane
+
+[Install]
+WantedBy=multi-user.target
diff --git a/src/systemd-sonic-generator/Makefile b/src/systemd-sonic-generator/Makefile
index 0e6fb9095..ecfc19e0b 100644
--- a/src/systemd-sonic-generator/Makefile
+++ b/src/systemd-sonic-generator/Makefile
@@ -3,14 +3,14 @@ CFLAGS += -std=gnu99 -D_GNU_SOURCE
 
 CXX=g++
 CXXFLAGS += -std=c++11 -D_GNU_SOURCE
-LDFLAGS += -lpthread -lboost_filesystem -lboost_system -lgtest
+LDFLAGS += -lpthread -lboost_filesystem -lboost_system -lgtest -ljson-c
 
 BINARY = systemd-sonic-generator
 
 $(BINARY): systemd-sonic-generator.c
 	rm -f ./systemd-sonic-generator
 
-	$(CC) $(CFLAGS) -o $@ $^
+	$(CC) $(CFLAGS) -o $@ $^ $(LDFLAGS)
 
 install: $(BINARY)
 	mkdir -p $(DESTDIR)
diff --git a/src/systemd-sonic-generator/ssg-test.cc b/src/systemd-sonic-generator/ssg-test.cc
index 52706358d..bcc661a9d 100644
--- a/src/systemd-sonic-generator/ssg-test.cc
+++ b/src/systemd-sonic-generator/ssg-test.cc
@@ -9,9 +9,11 @@
 #include <mutex>
 #include <string>
 #include <sys/stat.h>
+#include <linux/limits.h>
 #include <gtest/gtest.h>
 #include <boost/filesystem.hpp>
 #include <boost/format.hpp>
+#include <nlohmann/json.hpp>
 #include "systemd-sonic-generator.h"
 
 namespace fs = boost::filesystem;
@@ -19,7 +21,7 @@ namespace fs = boost::filesystem;
 namespace SSGTest {
 #define IS_MULTI_ASIC(x)  ((x) > 1)
 #define IS_SINGLE_ASIC(x) ((x) <= 1)
-#define NUM_UNIT_FILES 6
+#define NUM_UNIT_FILES 9
 
 /*
  * This test class uses following directory hierarchy for input and output
@@ -40,27 +42,36 @@ namespace SSGTest {
  */
 const std::string TEST_ROOT_DIR = "tests/ssg-test/";
 const std::string TEST_UNIT_FILE_PREFIX = TEST_ROOT_DIR + "systemd/";
+const std::string TEST_LIB_NETWORK = TEST_UNIT_FILE_PREFIX + "network/";
 const std::string TEST_ASIC_CONF_FORMAT = TEST_ROOT_DIR + "%s/asic.conf";
+const std::string TEST_PLATFORM_CONF_FORMAT = TEST_ROOT_DIR + "%s/platform.json";
 const std::string TEST_MACHINE_CONF = TEST_ROOT_DIR + "machine.conf";
 
 const std::string TEST_PLATFORM_DIR = TEST_ROOT_DIR + "test_platform/";
 const std::string TEST_ASIC_CONF = TEST_PLATFORM_DIR + "asic.conf";
+const std::string TEST_PLATFORM_CONF = TEST_PLATFORM_DIR + "platform.json";
 
 const std::string TEST_OUTPUT_DIR = TEST_ROOT_DIR + "generator/";
+const std::string TEST_ETC_NETWORK = TEST_OUTPUT_DIR + "network/"; 
 
 const std::string TEST_CONFIG_FILE = TEST_ROOT_DIR + "generated_services.conf";
 
 const std::string TEST_UNIT_FILES = "tests/testfiles/";
 
+
 /* Input data for generated_services.conf */
 const std::vector<std::string> generated_services = {
-    "multi_inst_a.service",     /* Single instance of a  multi asic service a */
-    "multi_inst_a@.service",    /* Multi-instance of a multi asic service a */
-    "multi_inst_b@.service",    /* Multi-instance of a multi asic service b */
-    "single_inst.service",      /* A single instance service */
-    "test.service",             /* A single instance test service
-                                   to test dependency creation */
-    "test.timer",               /* A timer service */
+    "multi_inst_a.service",         /* Single instance of a  multi asic service a */
+    "multi_inst_a@.service",        /* Multi-instance of a multi asic service a */
+    "multi_inst_b@.service",        /* Multi-instance of a multi asic service b */
+    "single_inst.service",          /* A single instance service */
+    "test.service",                 /* A single instance test service
+                                       to test dependency creation */
+    "test.timer",                   /* A timer service */
+    "midplane-network-npu.service", /* A midplane network service for smart switch NPU*/
+    "midplane-network-dpu.service", /* A midplane network service for smart switch DPU*/
+    "database.service",             /* A database service*/
+    "database@.service",            /* A database service for multi instances */
 };
 
 static std::mutex g_ssg_test_mutex;
@@ -120,8 +131,13 @@ class SsgFunctionTest : public SystemdSonicGeneratorFixture {
             try {
                 fs::path current(file->path());
                 if(!fs::is_directory(current)) {
+                    std::string ext = boost::filesystem::extension(current);
+                    fs::path dest_path = dest_dir;
+                    if (ext == ".netdev" || ext == ".network" || ext == ".link") {
+                        dest_path = dest_path / "network";
+                    }
                     /* Copy file */
-                    fs::copy_file( current, dest_dir / current.filename());
+                    fs::copy_file( current, dest_path / current.filename());
                 }
             }
             catch(fs::filesystem_error const & e) {
@@ -142,6 +158,10 @@ class SsgFunctionTest : public SystemdSonicGeneratorFixture {
         fs::create_directories(path);
         path = fs::path(TEST_PLATFORM_DIR.c_str());
         fs::create_directories(path);
+        path = fs::path(TEST_LIB_NETWORK.c_str());
+        fs::create_directories(path);
+        path = fs::path(TEST_ETC_NETWORK.c_str());
+        fs::create_directories(path);
         fp = fopen(TEST_MACHINE_CONF.c_str(), "w");
         ASSERT_NE(fp, nullptr);
         fputs("onie_platform=test_platform", fp);
@@ -163,6 +183,15 @@ class SsgFunctionTest : public SystemdSonicGeneratorFixture {
   private:
 };
 
+
+struct SsgMainConfig {
+    int num_asics = 0;
+    bool is_smart_switch_npu = false;
+    bool is_smart_switch_dpu = false;
+    int num_dpus = 0;
+};
+
+
 /*
  * class SsgMainTest
  * Implements functions to test ssg_main routine.
@@ -228,10 +257,10 @@ class SsgMainTest : public SsgFunctionTest {
     void validate_output_unit_files(std::vector<std::string> strs,
                               std::string target,
                               bool expected_result,
-                              int num_asics) {
+                              int num_instances) {
         for (std::string str : strs) {
             bool finished = false;
-            for (int i = 0 ; i < num_asics && !finished; ++i) {
+            for (int i = 0 ; i < num_instances && !finished; ++i) {
                 auto str_t = str;
                 if (is_multi_instance(str)) {
                     /* insert instance id in string */
@@ -241,7 +270,10 @@ class SsgMainTest : public SsgFunctionTest {
                     finished = true;
                 }
                 fs::path path{TEST_OUTPUT_DIR + target + "/" + str_t};
-                EXPECT_EQ(fs::exists(path), expected_result)
+                char resolved_path[PATH_MAX];
+                realpath(path.c_str(), resolved_path);
+                bool exist = fs::exists(path) && strcmp(resolved_path, "/dev/null") != 0;
+                EXPECT_EQ(exist, expected_result)
                     << "Failed validation: " << path;
             }
         }
@@ -250,7 +282,7 @@ class SsgMainTest : public SsgFunctionTest {
     /*
      * This function validates the generated dependencies in a Unit File.
      */
-    void validate_depedency_in_unit_file(int num_asics) {
+    void validate_depedency_in_unit_file(const SsgMainConfig &cfg) {
         std::string test_service = "test.service";
 
         /* Validate Unit file dependency creation for multi instance
@@ -258,53 +290,83 @@ class SsgMainTest : public SsgFunctionTest {
          * system but not present for single asic system.
          */
         validate_output_dependency_list(multi_asic_dependency_list,
-            test_service, IS_MULTI_ASIC(num_asics), num_asics);
+            test_service, IS_MULTI_ASIC(cfg.num_asics), cfg.num_asics);
 
-        /* Validate Unit file dependency creation for single instance
-         * services. These entries should not be present for multi asic
-         * system but present for single asic system.
+        /* This section handles a tricky scenario.
+         * When the number of DPUs (Data Processing Units) is greater than 0,
+         * the dependency list will be split. Otherwise, it remains in one line.
+         * Despite the split, the final result remains equivalent.
          */
-        validate_output_dependency_list(single_asic_dependency_list,
-            test_service, IS_SINGLE_ASIC(num_asics), num_asics);
+        if (cfg.num_dpus > 0) {
+            /* Validate Unit file dependency creation for single instance
+            * services. These entries should not be present for multi asic
+            * system but present for single asic system.
+            */
+            validate_output_dependency_list(single_asic_dependency_list_split,
+                test_service, IS_SINGLE_ASIC(cfg.num_asics), cfg.num_asics);
+            validate_output_dependency_list(npu_dependency_list,
+                "midplane-network-npu.service", true, cfg.num_dpus);
+        } else {
+            /* Validate Unit file dependency creation for single instance
+            * services. These entries should not be present for multi asic
+            * system but present for single asic system.
+            */
+            validate_output_dependency_list(single_asic_dependency_list,
+                test_service, IS_SINGLE_ASIC(cfg.num_asics), cfg.num_asics);
+        }
 
         /* Validate Unit file dependency creation for single instance
          * common services. These entries should not be present for multi
          * and single asic system.
          */
         validate_output_dependency_list(common_dependency_list,
-            test_service, true, num_asics);
+            test_service, true, cfg.num_asics);
     }
 
     /*
      * This function validates the list of generated Service Unit Files.
      */
-    void validate_service_file_generated_list(int num_asics) {
+    void validate_service_file_generated_list(const SsgMainConfig &cfg) {
         std::string test_target = "multi-user.target.wants";
         validate_output_unit_files(multi_asic_service_list,
-            test_target, IS_MULTI_ASIC(num_asics), num_asics);
+            test_target, IS_MULTI_ASIC(cfg.num_asics), cfg.num_asics);
         validate_output_unit_files(single_asic_service_list,
-            test_target, IS_SINGLE_ASIC(num_asics), num_asics);
+            test_target, IS_SINGLE_ASIC(cfg.num_asics), cfg.num_asics);
         validate_output_unit_files(common_service_list,
-            test_target, true, num_asics);
+            test_target, true, cfg.num_asics);
+        validate_output_unit_files(npu_service_list,
+            test_target, cfg.is_smart_switch_npu, cfg.num_dpus);
+        validate_output_unit_files(npu_network_service_list,
+            "network", cfg.is_smart_switch_npu, cfg.num_dpus);
+        validate_output_unit_files(dpu_service_list,
+            test_target, cfg.is_smart_switch_dpu, cfg.num_dpus);
+        validate_output_unit_files(dpu_network_service_list,
+            "network", cfg.is_smart_switch_dpu, cfg.num_dpus);
     }
 
     /* ssg_main test routine.
      * input: num_asics    number of asics
      */
-    void ssg_main_test(int num_asics) {
+    void ssg_main_test(const SsgMainConfig &cfg) {
         FILE* fp;
         std::vector<char*> argv_;
         std::vector<std::string> arguments = {
                     "ssg_main",
                     TEST_OUTPUT_DIR.c_str()
                 };
-        std::string num_asic_str = "NUM_ASIC=" + std::to_string(num_asics);
+        std::string num_asic_str = "NUM_ASIC=" + std::to_string(cfg.num_asics);
 
         std::string unit_file_path = fs::current_path().string() + "/" +TEST_UNIT_FILE_PREFIX;
         g_unit_file_prefix = unit_file_path.c_str();
         g_config_file = TEST_CONFIG_FILE.c_str();
         g_machine_config_file = TEST_MACHINE_CONF.c_str();
         g_asic_conf_format = TEST_ASIC_CONF_FORMAT.c_str();
+        g_platform_file_format = TEST_PLATFORM_CONF_FORMAT.c_str();
+        std::string lib_systemd = fs::current_path().string() + "/" + TEST_UNIT_FILE_PREFIX;
+        g_lib_systemd = lib_systemd.c_str();
+        std::string etc_systemd = fs::current_path().string() + "/" + TEST_OUTPUT_DIR;
+        g_etc_systemd = etc_systemd.c_str();
+
 
         /* Set NUM_ASIC value in asic.conf */
         fp = fopen(TEST_ASIC_CONF.c_str(), "w");
@@ -312,6 +374,29 @@ class SsgMainTest : public SsgFunctionTest {
         fputs(num_asic_str.c_str(), fp);
         fclose(fp);
 
+        /* Set platform file for smart switch */
+        if (cfg.is_smart_switch_dpu || cfg.is_smart_switch_npu) {
+            nlohmann::json platform_config;
+            if (cfg.is_smart_switch_dpu) {
+                ASSERT_EQ(cfg.num_dpus, 0);
+                ASSERT_EQ(cfg.is_smart_switch_npu, false);
+
+                platform_config["DPU"] = nlohmann::json::object();
+            }
+            else if (cfg.is_smart_switch_npu) {
+                ASSERT_EQ(cfg.is_smart_switch_dpu, false);
+                nlohmann::json dpus;
+                for (int i = 0; i < cfg.num_dpus; i++) {
+                    dpus["dpu" + std::to_string(i)] = nlohmann::json::object();
+                }
+                platform_config["DPUS"] = dpus;
+            }
+            fp = fopen(TEST_PLATFORM_CONF.c_str(), "w");
+            ASSERT_NE(fp, nullptr);
+            fputs(platform_config.dump().c_str(), fp);
+            fclose(fp);
+        }
+
         /* Create argv list for ssg_main. */
         for (const auto& arg : arguments) {
             argv_.push_back((char*)arg.data());
@@ -322,15 +407,22 @@ class SsgMainTest : public SsgFunctionTest {
         EXPECT_EQ(ssg_main(argv_.size(), argv_.data()), 0);
 
         /* Validate systemd service template creation. */
-        validate_service_file_generated_list(num_asics);
+        validate_service_file_generated_list(cfg);
 
         /* Validate Test Unit file for dependency creation. */
-        validate_depedency_in_unit_file(num_asics);
+        validate_depedency_in_unit_file(cfg);
     }
 
     /* Save global variables before running tests */
     virtual void SetUp() {
         SsgFunctionTest::SetUp();
+        // Create /dev/null symlink for simulation disabled service
+        std::vector<std::string> disabled_service;
+        disabled_service.insert(disabled_service.end(), npu_network_service_list.begin(), npu_network_service_list.end());
+        disabled_service.insert(disabled_service.end(), dpu_network_service_list.begin(), dpu_network_service_list.end());
+        for (const auto &service : disabled_service) {
+            fs::create_symlink("/dev/null", TEST_ETC_NETWORK + service);
+        }
     }
 
     /* Restore global vars */
@@ -343,8 +435,14 @@ class SsgMainTest : public SsgFunctionTest {
     static const std::vector<std::string> single_asic_service_list;
     static const std::vector<std::string> multi_asic_service_list;
     static const std::vector<std::string> common_service_list;
+    static const std::vector<std::string> npu_service_list;
+    static const std::vector<std::string> npu_network_service_list;
+    static const std::vector<std::string> dpu_service_list;
+    static const std::vector<std::string> dpu_network_service_list;
     static const std::vector<std::string> single_asic_dependency_list;
+    static const std::vector<std::string> single_asic_dependency_list_split;
     static const std::vector<std::string> multi_asic_dependency_list;
+    static const std::vector<std::string> npu_dependency_list;
     static const std::vector<std::string> common_dependency_list;
 };
 
@@ -368,6 +466,7 @@ const std::vector<std::string>
 SsgMainTest::multi_asic_service_list = {
     "multi_inst_a@%1%.service",
     "multi_inst_b@%1%.service",
+    "database@%1%.service",
 };
 
 /* Common Systemd service Unit file list for single and multi asic system. */
@@ -376,7 +475,36 @@ SsgMainTest::common_service_list = {
     "multi_inst_a.service",
     "single_inst.service",
     "test.service",
+    "database.service",
+};
 
+/* Systemd service Unit file list for Smart Switch NPU. */
+const std::vector<std::string>
+SsgMainTest::npu_service_list = {
+    "database@dpu%1%.service",
+    "midplane-network-npu.service",
+};
+
+/* Systemd service Unit file list for Smart Switch NPU. */
+const std::vector<std::string>
+SsgMainTest::npu_network_service_list = {
+    "bridge-midplane.netdev",
+    "bridge-midplane.network",
+    "dummy-midplane.netdev",
+    "dummy-midplane.network",
+    "midplane-network-npu.network",
+};
+
+/* Systemd service Unit file list for Smart Switch DPU. */
+const std::vector<std::string>
+SsgMainTest::dpu_service_list = {
+    "midplane-network-dpu.service",
+};
+
+/* Systemd service Unit file list for Smart Switch DPU. */
+const std::vector<std::string>
+SsgMainTest::dpu_network_service_list = {
+    "midplane-network-dpu.network",
 };
 
 /*
@@ -398,6 +526,13 @@ SsgMainTest::single_asic_dependency_list = {
     "After=multi_inst_a.service multi_inst_b.service",
 };
 
+/* Systemd service Unit file dependency entries for Single asic system. */
+const std::vector<std::string>
+SsgMainTest::single_asic_dependency_list_split = {
+    "After=multi_inst_a.service",
+    "After=multi_inst_b.service",
+};
+
 /* Systemd service Unit file dependency entries for multi asic system. */
 const std::vector<std::string>
 SsgMainTest::multi_asic_dependency_list = {
@@ -413,6 +548,11 @@ SsgMainTest::common_dependency_list = {
     "Before=single_inst.service",
 };
 
+const std::vector<std::string>
+SsgMainTest::npu_dependency_list = {
+    "Before=database@dpu%1%.service",
+};
+
 /* Test get functions for global vasr*/
 TEST_F(SystemdSonicGeneratorFixture, get_global_vars) {
     EXPECT_EQ(g_unit_file_prefix, nullptr);
@@ -460,7 +600,7 @@ TEST_F(SsgFunctionTest, insert_instance_number) {
     char input[] = "test@.service";
     for (int i = 0; i <= 100; ++i) {
         std::string out = "test@" + std::to_string(i) + ".service";
-        char* ret = insert_instance_number(input, i);
+        char* ret = insert_instance_number(input, i, "");
         ASSERT_NE(ret, nullptr);
         EXPECT_STREQ(ret, out.c_str());
     }
@@ -495,13 +635,30 @@ TEST_F(SsgFunctionTest, get_num_of_asic) {
 /* TEST get_unit_files()*/
 TEST_F(SsgFunctionTest, get_unit_files) {
     g_unit_file_prefix = TEST_UNIT_FILE_PREFIX.c_str();
+    g_lib_systemd = TEST_UNIT_FILE_PREFIX.c_str();
+    g_etc_systemd = TEST_OUTPUT_DIR.c_str();
     g_config_file = TEST_CONFIG_FILE.c_str();
-    char* unit_files[NUM_UNIT_FILES];
+    char* unit_files[NUM_UNIT_FILES] = { NULL };
     int num_unit_files = get_unit_files(unit_files);
-    EXPECT_EQ(num_unit_files, NUM_UNIT_FILES);
-    for (std::string service : generated_services) {
+    // Exclude the midplane-network-{npu/dpu}.service which is only used for smart switch
+    auto non_smart_switch_generated_services = generated_services;
+    non_smart_switch_generated_services.erase(
+        std::remove(non_smart_switch_generated_services.begin(),
+                    non_smart_switch_generated_services.end(),
+                    "midplane-network-npu.service"),
+        non_smart_switch_generated_services.end());
+    non_smart_switch_generated_services.erase(
+        std::remove(non_smart_switch_generated_services.begin(),
+                    non_smart_switch_generated_services.end(),
+                    "midplane-network-dpu.service"),
+        non_smart_switch_generated_services.end());
+    EXPECT_EQ(num_unit_files, non_smart_switch_generated_services.size());
+    for (std::string service : non_smart_switch_generated_services) {
         bool found = false;
         for (auto& unit_file : unit_files) {
+            if (unit_file == NULL) {
+                continue;
+            }
             if(unit_file == service) {
                 found = true;
                 break;
@@ -530,18 +687,49 @@ TEST_F(SsgMainTest, ssg_main_argv) {
 
 /* TEST ssg_main() single asic */
 TEST_F(SsgMainTest, ssg_main_single_npu) {
-    ssg_main_test(1);
+    SsgMainConfig cfg;
+    cfg.num_asics = 1;
+    ssg_main_test(cfg);
 }
 
 /* TEST ssg_main() multi(10) asic */
 TEST_F(SsgMainTest, ssg_main_10_npu) {
-    ssg_main_test(10);
+    SsgMainConfig cfg;
+    cfg.num_asics = 10;
+    ssg_main_test(cfg);
 }
 
 /* TEST ssg_main() multi(40) asic */
 TEST_F(SsgMainTest, ssg_main_40_npu) {
-    ssg_main_test(40);
+    SsgMainConfig cfg;
+    cfg.num_asics = 40;
+    ssg_main_test(cfg);
+}
+
+TEST_F(SsgMainTest, ssg_main_smart_switch_npu) {
+    SsgMainConfig cfg;
+    cfg.num_asics = 1;
+    cfg.is_smart_switch_npu = true;
+    cfg.num_dpus = 8;
+    ssg_main_test(cfg);
 }
+
+TEST_F(SsgMainTest, ssg_main_smart_switch_dpu) {
+    SsgMainConfig cfg;
+    cfg.num_asics = 1;
+    cfg.is_smart_switch_dpu = true;
+    ssg_main_test(cfg);
+}
+
+TEST_F(SsgMainTest, ssg_main_smart_switch_double_execution) {
+    SsgMainConfig cfg;
+    cfg.num_asics = 1;
+    cfg.is_smart_switch_npu = true;
+    cfg.num_dpus = 8;
+    ssg_main_test(cfg);
+    ssg_main_test(cfg);
+}
+
 }
 
 int main(int argc, char** argv) {
diff --git a/src/systemd-sonic-generator/systemd-sonic-generator.c b/src/systemd-sonic-generator/systemd-sonic-generator.c
index d9bb75fea..f5cac8e94 100644
--- a/src/systemd-sonic-generator/systemd-sonic-generator.c
+++ b/src/systemd-sonic-generator/systemd-sonic-generator.c
@@ -8,16 +8,35 @@
 #include <sys/types.h>
 #include <sys/stat.h>
 #include <linux/limits.h>
+#include <json-c/json.h>
 
 #define MAX_NUM_TARGETS 48
 #define MAX_NUM_INSTALL_LINES 48
 #define MAX_NUM_UNITS 128
 #define MAX_BUF_SIZE 512
+#define MAX_PLATFORM_NAME_LEN 64
 
+
+
+const char* LIB_SYSTEMD = "/usr/lib/systemd";
+const char* ETC_SYSTEMD = "/etc/systemd";
 const char* UNIT_FILE_PREFIX = "/usr/lib/systemd/system/";
 const char* CONFIG_FILE = "/etc/sonic/generated_services.conf";
 const char* MACHINE_CONF_FILE = "/host/machine.conf";
 const char* ASIC_CONF_FORMAT = "/usr/share/sonic/device/%s/asic.conf";
+const char* PLATFORM_FILE_FORMAT = "/usr/share/sonic/device/%s/platform.json";
+const char* DPU_PREFIX = "dpu";
+
+
+const char* g_lib_systemd = NULL;
+const char* get_lib_systemd () {
+    return (g_lib_systemd) ? g_lib_systemd : LIB_SYSTEMD;
+}
+
+const char* g_etc_systemd = NULL;
+const char* get_etc_systemd () {
+    return (g_etc_systemd) ? g_etc_systemd : ETC_SYSTEMD;
+}
 
 const char* g_unit_file_prefix = NULL;
 const char* get_unit_file_prefix() {
@@ -39,9 +58,64 @@ const char* get_asic_conf_format() {
     return (g_asic_conf_format) ? g_asic_conf_format : ASIC_CONF_FORMAT;
 }
 
+const char* g_platform_file_format = NULL;
+const char* get_platform_file_format() {
+    return (g_platform_file_format) ? g_platform_file_format : PLATFORM_FILE_FORMAT;
+}
+
 static int num_asics;
 static char** multi_instance_services;
 static int num_multi_inst;
+static bool smart_switch_npu;
+static bool smart_switch_dpu;
+static bool smart_switch;
+static size_t num_dpus;
+static char* platform = NULL;
+static struct json_object *platform_info = NULL;
+
+
+#ifdef _SSG_UNITTEST
+/**
+ * @brief Cleans up the cache by resetting cache pointers.
+ */
+void clean_up_cache() {
+    platform = NULL;
+    platform_info = NULL;
+}
+#endif
+
+/**
+ * Sets the value of a pointer to an invalid memory address.
+ *
+ * @param pointer A pointer to a pointer variable.
+ */
+void set_invalid_pointer(void **pointer) {
+    *pointer = (void *)-1;
+}
+
+
+/**
+ * @brief Checks if a pointer is valid.
+ *
+ * This function checks if a pointer is valid by verifying that it is not NULL and not equal to (void *)-1.
+ *
+ * @param pointer The pointer to be checked.
+ * @return true if the pointer is valid, false otherwise.
+ */
+bool is_valid_pointer(void *pointer) {
+    return pointer != NULL && pointer != (void *)-1;
+}
+
+
+/**
+ * Checks if a pointer is initialized.
+ *
+ * @param pointer The pointer to check.
+ * @return true if the pointer is not NULL, false otherwise.
+ */
+bool is_initialized_pointer(void *pointer) {
+    return pointer != NULL;
+}
 
 void strip_trailing_newline(char* str) {
     /***
@@ -54,6 +128,22 @@ void strip_trailing_newline(char* str) {
 }
 
 
+/**
+ * Checks if the given path is "/dev/null".
+ *
+ * @param path The path to check.
+ * @return true if the path is "/dev/null", false otherwise.
+ */
+static bool is_devnull(const char* path)
+{
+    char resolved_path[PATH_MAX];
+    if (realpath(path, resolved_path) == NULL) {
+        return false;
+    }
+    return strcmp(resolved_path, "/dev/null") == 0;
+}
+
+
 static int get_target_lines(char* unit_file, char* target_lines[]) {
     /***
     Gets installation information for a given unit file
@@ -128,6 +218,48 @@ static bool is_multi_instance_service(char *service_name){
 
 }
 
+
+/**
+ * Checks if a service is a multi-instance service for DPU.
+ *
+ * @param service_name The name of the service to check.
+ * @return true if the service is a multi-instance service for DPU, false otherwise.
+ */
+static bool is_multi_instance_service_for_dpu(const char *service_name) {
+    if (!smart_switch_npu) {
+        return false;
+    }
+
+    const static char* multi_instance_services_for_dpu[] = {"database"};
+    char *tmp_service_name = strdup(service_name);
+    if (tmp_service_name == NULL) {
+        fprintf(stderr, "Error: Failed to allocate memory for tmp_service_name\n");
+        exit(EXIT_FAILURE);
+    }
+
+    for (size_t i = 0; i < sizeof(multi_instance_services_for_dpu) /
+                               sizeof(multi_instance_services_for_dpu[0]);
+         i++) {
+        char* saveptr;
+        char* token = strtok_r(tmp_service_name, "@", &saveptr);
+        if (token) {
+            if (strstr(token, ".service") != NULL) {
+                /* If we are here, service_name did not have '@' delimiter but
+                 * contains '.service' */
+                token = strtok_r(tmp_service_name, ".", &saveptr);
+            }
+        }
+        if (strcmp(tmp_service_name, multi_instance_services_for_dpu[i]) == 0) {
+            free(tmp_service_name);
+            return true;
+        }
+    }
+
+    free(tmp_service_name);
+    return false;
+}
+
+
 static int get_install_targets_from_line(char* target_string, char* install_type, char* targets[], int existing_targets) {
     /***
     Helper fuction for get_install_targets
@@ -231,12 +363,18 @@ static void replace_multi_inst_dep(char *src) {
                     service_name = strdup(word);
                     service_name = strtok_r(service_name, ".", &save_ptr2);
                     type = strtok_r(NULL, "\n", &save_ptr2);
-                    if (is_multi_instance_service(word)) {
+                    if (num_asics > 1 &&  is_multi_instance_service(word)) {
                         for(i = 0; i < num_asics; i++) {
                             snprintf(buf, MAX_BUF_SIZE, "%s=%s@%d.%s\n",
                                     token, service_name, i, type);
                             fputs(buf,fp_tmp);
                         }
+                    } else if (smart_switch_npu && is_multi_instance_service_for_dpu(word)) {
+                        for(i = 0; i < num_dpus; i++) {
+                            snprintf(buf, MAX_BUF_SIZE, "%s=%s@%s%d.%s\n",
+                                    token, service_name, DPU_PREFIX, i, type);
+                            fputs(buf,fp_tmp);
+                        }
                     } else {
                         snprintf(buf, MAX_BUF_SIZE,"%s=%s.%s\n",token, service_name, type);
                         fputs(buf, fp_tmp);
@@ -283,7 +421,8 @@ int get_install_targets(char* unit_file, char* targets[]) {
     dot_ptr = strchr(instance_name, '.');
     *dot_ptr = '\0';
 
-    if((num_asics > 1) && (!is_multi_instance_service(instance_name))) {
+    if(((num_asics > 1) && (!is_multi_instance_service(instance_name)))
+        || ((num_dpus > 0) && (!is_multi_instance_service_for_dpu(instance_name)))) {
         replace_multi_inst_dep(file_path);
     }
     free(instance_name);
@@ -366,7 +505,14 @@ int get_unit_files(char* unit_files[]) {
         if ((strcmp(line, "topology.service") == 0) &&
                         (num_asics == 1)) {
             continue;
+        } else if ((strcmp(line, "midplane-network-dpu.service") == 0) &&
+                        !smart_switch_dpu) {
+            continue;
+        } else if ((strcmp(line, "midplane-network-npu.service") == 0) &&
+                        !smart_switch_npu) {
+            continue;
         }
+
         unit_files[num_unit_files] = strdup(line);
         num_unit_files++;
     }
@@ -379,7 +525,7 @@ int get_unit_files(char* unit_files[]) {
 }
 
 
-char* insert_instance_number(char* unit_file, int instance) {
+char* insert_instance_number(char* unit_file, int instance, const char *instance_prefix) {
     /***
     Adds an instance number to a systemd template name
 
@@ -395,12 +541,16 @@ char* insert_instance_number(char* unit_file, int instance) {
         return NULL;
     }
 
+    if (instance_prefix == NULL) {
+        instance_prefix = "";
+    }
+
     /***
     suffix is "@.service", set suffix=".service"
     prefix_len is length of "example@"
     ***/
     prefix_len = ++suffix - unit_file;
-    ret = asprintf(&instance_name, "%.*s%d%s", prefix_len, unit_file, instance, suffix);
+    ret = asprintf(&instance_name, "%.*s%s%d%s", prefix_len, unit_file, instance_prefix, instance, suffix);
     if (ret == -1) {
         fprintf(stderr, "Error creating instance %d of %s\n", instance, unit_file);
         return NULL;
@@ -410,7 +560,7 @@ char* insert_instance_number(char* unit_file, int instance) {
 }
 
 
-static int create_symlink(char* unit, char* target, char* install_dir, int instance) {
+static int create_symlink(char* unit, char* target, char* install_dir, int instance, const char *instance_prefix) {
     struct stat st;
     char src_path[PATH_MAX];
     char dest_path[PATH_MAX];
@@ -425,7 +575,7 @@ static int create_symlink(char* unit, char* target, char* install_dir, int insta
         unit_instance = strdup(unit);
     }
     else {
-        unit_instance = insert_instance_number(unit, instance);
+        unit_instance = insert_instance_number(unit, instance, instance_prefix);
     }
 
     strcpy(final_install_dir, install_dir);
@@ -467,6 +617,13 @@ static int create_symlink(char* unit, char* target, char* install_dir, int insta
         }
     }
 
+    if (is_devnull(dest_path)) {
+        if (remove(dest_path) != 0) {
+            fprintf(stderr, "Unable to remove existing symlink %s\n", dest_path);
+            return -1;
+        }
+    }
+
     r = symlink(src_path, dest_path);
 
     if (r < 0) {
@@ -506,22 +663,31 @@ static int install_unit_file(char* unit_file, char* target, char* install_dir) {
         for (int i = 0; i < num_asics; i++) {
 
             if (strstr(target, "@") != NULL) {
-                target_instance = insert_instance_number(target, i);
+                target_instance = insert_instance_number(target, i, "");
             }
             else {
                 target_instance = strdup(target);
             }
 
-            r = create_symlink(unit_file, target_instance, install_dir, i);
+            r = create_symlink(unit_file, target_instance, install_dir, i, "");
             if (r < 0)
                 fprintf(stderr, "Error installing %s for target %s\n", unit_file, target_instance);
 
             free(target_instance);
 
         }
-    }
-    else {
-        r = create_symlink(unit_file, target, install_dir, -1);
+    } else if (num_dpus > 0 && strstr(unit_file, "@") != NULL) {
+        // If multi-instance service for DPU
+        // Install each DPU units to the host main instance only,
+        // E.g. install database@dpu0.service, database@dpu1.service to multi-user.target.wants
+        // We don't have case like to install xxx@dpu0.service to swss@dpu0.service.wants
+        for (int i = 0; i < num_dpus; i++) {
+            r = create_symlink(unit_file, target, install_dir, i, DPU_PREFIX);
+            if (r < 0)
+                fprintf(stderr, "Error installing %s for target %s\n", unit_file, target);
+        }
+    } else {
+        r = create_symlink(unit_file, target, install_dir, -1, "");
         if (r < 0)
             fprintf(stderr, "Error installing %s for target %s\n", unit_file, target);
     }
@@ -530,25 +696,32 @@ static int install_unit_file(char* unit_file, char* target, char* install_dir) {
 }
 
 
-int get_num_of_asic() {
-    /***
-    Determines if the current platform is single or multi-ASIC
-    ***/
-    FILE *fp;
-    char *line = NULL;
+/**
+ * Retrieves the platform name from the machine configuration file.
+ * If the platform name is already cached, it returns the cached value.
+ * If the platform name is not found in the configuration file, it sets the platform pointer to NULL.
+ * 
+ * @return The platform name if found, otherwise NULL.
+ */
+const char* get_platform() {
+    if (is_initialized_pointer(platform)) {
+        if (is_valid_pointer(platform)) {
+            return platform;
+        } else {
+            return NULL;
+        }
+    }
+
+    FILE* fp;
+    char* line = NULL;
     char* token;
-    char* platform = NULL;
     char* saveptr;
+    char *tmp_platform = NULL;
+    static char platform_buffer[MAX_PLATFORM_NAME_LEN + 1];
     size_t len = 0;
     ssize_t nread;
-    bool ans;
-    char asic_file[512];
-    char* str_num_asic;
-    int num_asic = 1;
     const char* machine_config_file = get_machine_config_file();
-
     fp = fopen(machine_config_file, "r");
-
     if (fp == NULL) {
         fprintf(stderr, "Failed to open %s\n", machine_config_file);
         exit(EXIT_FAILURE);
@@ -558,12 +731,43 @@ int get_num_of_asic() {
         if ((strstr(line, "onie_platform") != NULL) ||
             (strstr(line, "aboot_platform") != NULL)) {
             token = strtok_r(line, "=", &saveptr);
-            platform = strtok_r(NULL, "=", &saveptr);
-            strip_trailing_newline(platform);
+            tmp_platform = strtok_r(NULL, "=", &saveptr);
+            strip_trailing_newline(tmp_platform);
             break;
         }
     }
+    if (tmp_platform == NULL) {
+        set_invalid_pointer((void **)&platform);
+        fclose(fp);
+        free(line);
+        return NULL;
+    }
+    strncpy(platform_buffer, tmp_platform, sizeof(platform_buffer) - 1);
     fclose(fp);
+    free(line);
+
+    platform = platform_buffer;
+    return platform;
+}
+
+
+int get_num_of_asic() {
+    /***
+    Determines if the current platform is single or multi-ASIC
+    ***/
+    FILE *fp;
+    char *line = NULL;
+    char* token;
+    const char* platform = NULL;
+    char* saveptr;
+    size_t len = 0;
+    ssize_t nread;
+    char asic_file[512];
+    char* str_num_asic;
+    int num_asic = 1;
+
+    platform = get_platform();
+
     if(platform != NULL) {
         snprintf(asic_file, 512, get_asic_conf_format(), platform);
         fp = fopen(asic_file, "r");
@@ -587,6 +791,331 @@ int get_num_of_asic() {
 
 }
 
+
+/**
+ * Retrieves the platform information.
+ * 
+ * This function reads the platform information from a JSON file and returns it as a JSON object.
+ * If the platform information has already been retrieved, it returns the cached value.
+ * 
+ * @return The platform information as a JSON object, or NULL if it fails to retrieve or parse the information.
+ */
+const struct json_object* get_platform_info() {
+    if (is_initialized_pointer(platform_info)) {
+        if (is_valid_pointer(platform_info)) {
+            return platform_info;
+        } else {
+            return NULL;
+        }
+    }
+
+    char platform_file_path[PATH_MAX];
+    const char* platform = get_platform();
+    if (platform == NULL) {
+        set_invalid_pointer((void **)&platform_info);
+        return NULL;
+    }
+    snprintf(platform_file_path, sizeof(platform_file_path), get_platform_file_format(), platform);
+
+    FILE *fp = fopen(platform_file_path, "r");
+    if (fp == NULL) {
+        fprintf(stdout, "Failed to open %s\n", platform_file_path);
+        set_invalid_pointer((void **)&platform_info);
+        return NULL;
+    }
+    if (fseek(fp, 0, SEEK_END) != 0) {
+        fprintf(stdout, "Failed to seek to end of %s\n", platform_file_path);
+        fclose(fp);
+        exit(EXIT_FAILURE);
+    }
+    size_t fsize = ftell(fp);
+    if (fseek(fp, 0, SEEK_SET) != 0) {
+        fprintf(stdout, "Failed to seek to beginning of %s\n", platform_file_path);
+        fclose(fp);
+        exit(EXIT_FAILURE);
+    }
+    char *platform_json = malloc(fsize + 1);
+    if (platform_json == NULL) {
+        fprintf(stdout, "Failed to allocate memory for %s\n", platform_file_path);
+        fclose(fp);
+        exit(EXIT_FAILURE);
+    }
+    if (fread(platform_json, fsize, 1, fp) != 1) {
+        fprintf(stdout, "Failed to read %s\n", platform_file_path);
+        free(platform_json);
+        fclose(fp);
+        exit(EXIT_FAILURE);
+    }
+    fclose(fp);
+    platform_json[fsize] = '\0';
+
+    platform_info = json_tokener_parse(platform_json);
+    if (platform_info == NULL) {
+        fprintf(stderr, "Failed to parse %s\n", platform_file_path);
+        free(platform_json);
+        return NULL;
+    }
+    free(platform_json);
+    return platform_info;
+}
+
+
+/**
+ * Checks if the platform is a smart switch with an NPU (Network Processing Unit).
+ * 
+ * @return true if the platform is a smart switch with an NPU, false otherwise.
+ */
+static bool is_smart_switch_npu() {
+    struct json_object *dpus;
+    const struct json_object *platform_info = get_platform_info();
+    if (platform_info == NULL) {
+        return false;
+    }
+    return json_object_object_get_ex(platform_info, "DPUS", &dpus);
+}
+
+
+/**
+ * Checks if the current platform is a smart switch with a DPU (Data Processing Unit).
+ * 
+ * @return true if the platform is a smart switch with a DPU, false otherwise.
+ */
+static bool is_smart_switch_dpu() {
+    struct json_object *dpu;
+    const struct json_object *platform_info = get_platform_info();
+    if (platform_info == NULL) {
+        return false;
+    }
+    return json_object_object_get_ex(platform_info, "DPU", &dpu);
+}
+
+
+/**
+ * @brief Retrieves the number of DPUs (Data Processing Units).
+ *
+ * This function retrieves the number of DPUs by accessing the platform information
+ * and extracting the "DPUS" array from it. If the platform information is not available
+ * or the "DPUS" array does not exist, the function returns 0.
+ *
+ * @return The number of DPUs.
+ */
+static int get_num_of_dpu() {
+    struct json_object *dpus;
+    const struct json_object *platform_info = get_platform_info();
+    if (platform_info == NULL) {
+        return 0;
+    }
+    if (!json_object_object_get_ex(platform_info, "DPUS", &dpus)) {
+        return 0;
+    }
+    size_t num_dpu = 0;
+    json_object_object_foreach(dpus, key, val) {
+        num_dpu++;
+    }
+    return num_dpu;
+}
+
+
+/**
+ * Installs the network service.
+ * 
+ * This function installs the network service by creating a symlink
+ * to the network service file in the appropriate directory.
+ * 
+ * @param unit_name The name of the network unit to install.
+ * @return 0 if the network unit is installed successfully, or -1 if an error occurs.
+ */
+static int install_network_unit(const char* unit_name) {
+    assert(unit_name);
+
+    const char* unit_type = strrchr(unit_name, '.');
+    if (unit_type == NULL) {
+        fprintf(stderr, "Invalid network unit %s\n", unit_name);
+        return -1;
+    }
+    unit_type++;
+
+    char install_path[PATH_MAX] = {0};
+    char original_path[PATH_MAX] = {0};
+    const char* subdir;
+    if (strcmp(unit_type, "netdev") == 0 || strcmp(unit_type, "network") == 0) {
+        subdir = "/network/";
+    } else {
+        fprintf(stderr, "Invalid network unit %s\n", unit_type);
+        return -1;
+    }
+
+    strcpy(install_path, get_etc_systemd());
+    strcat(install_path, subdir);
+    strcat(install_path, unit_name);
+    strcpy(original_path, get_lib_systemd());
+    strcat(original_path, subdir);
+    strcat(original_path, unit_name);
+
+    struct stat st;
+
+    if (stat((const char *)install_path, &st) == 0) {
+        // If the file already exists, remove it
+        if (S_ISDIR(st.st_mode)) {
+            fprintf(stderr, "Error: %s is a directory\n", install_path);
+            return -1;
+        }
+        if (remove(install_path) != 0) {
+            fprintf(stderr, "Error removing existing file %s\n", install_path);
+            return -1;
+        }
+    }
+
+    if (is_devnull(install_path)) {
+        if (remove(install_path) != 0) {
+            fprintf(stderr, "Unable to remove existing symlink %s\n", install_path);
+            return -1;
+        }
+    }
+
+    if (symlink(original_path, install_path) != 0) {
+        if (errno == EEXIST)
+            return 0;
+        fprintf(stderr, "Error creating symlink %s -> %s (%s)\n", install_path, original_path, strerror(errno));
+        return -1;
+    }
+
+    return 0;
+}
+
+
+static int render_network_service_for_smart_switch() {
+    if (!smart_switch_npu) {
+        return 0;
+    }
+
+    // Render Before instruction for midplane network with database service
+    if (num_dpus == 0) {
+        return 0;
+    }
+
+    char buffer_instruction[MAX_BUF_SIZE] = {0};
+    strcpy(buffer_instruction, "\nBefore=");
+    for (size_t i = 0; i < num_dpus; i++) {
+        char *unit;
+        asprintf(&unit, "database@dpu%ld.service", i);
+        strcat(buffer_instruction, unit);
+        free(unit);
+        if (i != num_dpus - 1) {
+            strcat(buffer_instruction, " ");
+        }
+    }
+
+    char unit_path[PATH_MAX] = { 0 };
+    strcpy(unit_path, get_unit_file_prefix());
+    strcat(unit_path, "/midplane-network-npu.service");
+
+    FILE *fp = fopen(unit_path, "r");
+    if (fp == NULL) {
+        fprintf(stderr, "Failed to open %s\n", unit_path);
+        return -1;
+    }
+    fseek(fp, 0, SEEK_END);
+    size_t file_size = ftell(fp);
+    fseek(fp, 0, SEEK_SET);
+    size_t len = file_size + strlen(buffer_instruction) + 1;
+    char *unit_content = malloc(len);
+    if (unit_content == NULL) {
+        fprintf(stderr, "Failed to allocate memory for %s\n", unit_path);
+        fclose(fp);
+        exit(EXIT_FAILURE);
+    }
+    if (fread(unit_content, file_size, 1, fp) != 1) {
+        fprintf(stderr, "Failed to read %s\n", unit_path);
+        free(unit_content);
+        fclose(fp);
+        exit(EXIT_FAILURE);
+    }
+    fclose(fp);
+
+    // Find insert point for Before instruction
+    char *insert_point = strstr(unit_content, "[Unit]");
+    insert_point += strlen("[Unit]");
+    // Move the rest of the file to make room for the Before instruction
+    memmove(insert_point + strlen(buffer_instruction), insert_point, file_size - (insert_point - unit_content));
+    // Insert the Before instruction
+    memcpy(insert_point, buffer_instruction, strlen(buffer_instruction));
+    // Remove original Before instruction
+    insert_point += strlen(buffer_instruction);
+    char *before_start = strstr(insert_point, "Before=");
+    while (before_start != NULL) {
+        char *before_end = strchr(before_start, '\n');
+        if (before_end == NULL) {
+            before_end = before_start + strlen(before_start);
+        } else {
+            // Include newline character
+            before_end += 1;
+        }
+        const char *target_service = strstr(before_start, "database@dpu");
+        if (target_service != NULL && target_service < before_end) {
+            memmove(before_start, before_end, strlen(before_end) + 1);
+        } else {
+            before_start = before_end;
+        }
+        before_start = strstr(before_start, "Before=");
+    }
+    // Write the modified unit file
+    fp = fopen(unit_path, "w");
+    if (fp == NULL) {
+        fprintf(stderr, "Failed to open %s\n", unit_path);
+        free(unit_content);
+        exit(EXIT_FAILURE);
+    }
+    if (fwrite(unit_content, strlen(unit_content), 1, fp) != 1) {
+        fprintf(stderr, "Failed to write %s\n", unit_path);
+        free(unit_content);
+        fclose(fp);
+        exit(EXIT_FAILURE);
+    }
+    fclose(fp);
+    free(unit_content);
+
+    return 0;
+}
+
+
+static int install_network_service_for_smart_switch() {
+    const char** network_units = NULL;
+    if (smart_switch_npu) {
+        static const char* npu_network_units[] = {
+            "bridge-midplane.netdev",
+            "bridge-midplane.network",
+            "dummy-midplane.netdev",
+            "dummy-midplane.network",
+            "midplane-network-npu.network",
+            NULL
+        };
+        network_units = npu_network_units;
+    } else if (smart_switch_dpu) {
+        static const char* dpu_network_units[] = {
+            "midplane-network-dpu.network",
+            NULL
+        };
+        network_units = dpu_network_units;
+    } else {
+        return -1;
+    }
+
+    if (network_units == NULL) {
+        return 0;
+    }
+
+    while(*network_units) {
+        if (install_network_unit(*network_units) != 0) {
+            return -1;
+        }
+        network_units++;
+    }
+
+    return 0;
+}
+
+
 int ssg_main(int argc, char **argv) {
     char* unit_files[MAX_NUM_UNITS];
     char install_dir[PATH_MAX];
@@ -599,20 +1128,41 @@ int ssg_main(int argc, char **argv) {
     int num_targets;
     int r;
 
+#ifdef _SSG_UNITTEST
+    clean_up_cache();
+#endif
+
     if (argc <= 1) {
         fputs("Installation directory required as argument\n", stderr);
         return 1;
     }
 
     num_asics = get_num_of_asic();
+    smart_switch_npu = is_smart_switch_npu();
+    smart_switch_dpu = is_smart_switch_dpu();
+    smart_switch = smart_switch_npu || smart_switch_dpu;
+    num_dpus = get_num_of_dpu();
+
     strcpy(install_dir, argv[1]);
     strcat(install_dir, "/");
     num_unit_files = get_unit_files(unit_files);
 
+    // Install and render midplane network service for smart switch
+    if (smart_switch) {
+        if (render_network_service_for_smart_switch() != 0) {
+            return -1;
+        }
+        if (install_network_service_for_smart_switch() != 0) {
+            return -1;
+        }
+    }
+
     // For each unit file, get the installation targets and install the unit
     for (int i = 0; i < num_unit_files; i++) {
         unit_instance = strdup(unit_files[i]);
-        if ((num_asics == 1) && strstr(unit_instance, "@") != NULL) {
+        if ((num_asics == 1 &&
+             !is_multi_instance_service_for_dpu(unit_instance)) &&
+            strstr(unit_instance, "@") != NULL) {
             prefix = strdup(strtok_r(unit_instance, "@", &saveptr));
             suffix = strdup(strtok_r(NULL, "@", &saveptr));
 
@@ -647,6 +1197,10 @@ int ssg_main(int argc, char **argv) {
     }
     free(multi_instance_services);
 
+    if (is_valid_pointer(platform_info)) {
+        json_object_put(platform_info);
+    }
+
     return 0;
 }
 
diff --git a/src/systemd-sonic-generator/systemd-sonic-generator.h b/src/systemd-sonic-generator/systemd-sonic-generator.h
index 25c179caa..8695951fb 100644
--- a/src/systemd-sonic-generator/systemd-sonic-generator.h
+++ b/src/systemd-sonic-generator/systemd-sonic-generator.h
@@ -15,17 +15,21 @@ extern const char* UNIT_FILE_PREFIX;
 extern const char* CONFIG_FILE;
 extern const char* MACHINE_CONF_FILE;
 extern const char* ASIC_CONF_FORMAT;
-extern const char* g_unit_file_prefix;
+extern const char* PLATFORM_FILE_FORMAT;
+extern const char* g_lib_systemd;
+extern const char* g_etc_systemd;
+extern const char* g_unit_file_prefix; 
 extern const char* g_config_file;
 extern const char* g_machine_config_file;
 extern const char* g_asic_conf_format;
+extern const char* g_platform_file_format;
 
 /* C-functions under test */
 extern const char* get_unit_file_prefix();
 extern const char* get_config_file();
 extern const char* get_machine_config_file();
 extern const char* get_asic_conf_format();
-extern char* insert_instance_number(char* unit_file, int instance);
+extern char* insert_instance_number(char* unit_file, int instance, const char *instance_prefix);
 extern int ssg_main(int argc, char** argv);
 extern int get_num_of_asic();
 extern int get_install_targets(char* unit_file, char* targets[]);
diff --git a/src/systemd-sonic-generator/tests/testfiles/bridge-midplane.netdev b/src/systemd-sonic-generator/tests/testfiles/bridge-midplane.netdev
new file mode 120000
index 000000000..a866bb529
--- /dev/null
+++ b/src/systemd-sonic-generator/tests/testfiles/bridge-midplane.netdev
@@ -0,0 +1 @@
+../../../../files/image_config/midplane-network/bridge-midplane.netdev
\ No newline at end of file
diff --git a/src/systemd-sonic-generator/tests/testfiles/bridge-midplane.network b/src/systemd-sonic-generator/tests/testfiles/bridge-midplane.network
new file mode 120000
index 000000000..cb7ad4965
--- /dev/null
+++ b/src/systemd-sonic-generator/tests/testfiles/bridge-midplane.network
@@ -0,0 +1 @@
+../../../../files/image_config/midplane-network/bridge-midplane.network
\ No newline at end of file
diff --git a/src/systemd-sonic-generator/tests/testfiles/database.service b/src/systemd-sonic-generator/tests/testfiles/database.service
new file mode 100644
index 000000000..c730d07c9
--- /dev/null
+++ b/src/systemd-sonic-generator/tests/testfiles/database.service
@@ -0,0 +1,14 @@
+[Unit]
+Description=Database container
+StartLimitIntervalSec=1200
+StartLimitBurst=3
+
+[Service]
+User=root
+ExecStartPre=/usr/local/bin/database.sh start
+ExecStart=/usr/local/bin/database.sh wait
+ExecStop=/usr/local/bin/database.sh stop
+RestartSec=30
+
+[Install]
+WantedBy=multi-user.target
diff --git a/src/systemd-sonic-generator/tests/testfiles/database@.service b/src/systemd-sonic-generator/tests/testfiles/database@.service
new file mode 100644
index 000000000..8a1719e05
--- /dev/null
+++ b/src/systemd-sonic-generator/tests/testfiles/database@.service
@@ -0,0 +1,14 @@
+[Unit]
+Description=Database container
+StartLimitIntervalSec=1200
+StartLimitBurst=3
+
+[Service]
+User=root
+ExecStartPre=/usr/local/bin/database.sh start %i
+ExecStart=/usr/local/bin/database.sh wait %i
+ExecStop=/usr/local/bin/database.sh stop %i
+RestartSec=30
+
+[Install]
+WantedBy=multi-user.target
diff --git a/src/systemd-sonic-generator/tests/testfiles/dummy-midplane.netdev b/src/systemd-sonic-generator/tests/testfiles/dummy-midplane.netdev
new file mode 120000
index 000000000..2d4fec18f
--- /dev/null
+++ b/src/systemd-sonic-generator/tests/testfiles/dummy-midplane.netdev
@@ -0,0 +1 @@
+../../../../files/image_config/midplane-network/dummy-midplane.netdev
\ No newline at end of file
diff --git a/src/systemd-sonic-generator/tests/testfiles/dummy-midplane.network b/src/systemd-sonic-generator/tests/testfiles/dummy-midplane.network
new file mode 120000
index 000000000..e8278cf8e
--- /dev/null
+++ b/src/systemd-sonic-generator/tests/testfiles/dummy-midplane.network
@@ -0,0 +1 @@
+../../../../files/image_config/midplane-network/dummy-midplane.network
\ No newline at end of file
diff --git a/src/systemd-sonic-generator/tests/testfiles/midplane-network-dpu.network b/src/systemd-sonic-generator/tests/testfiles/midplane-network-dpu.network
new file mode 120000
index 000000000..e042f502c
--- /dev/null
+++ b/src/systemd-sonic-generator/tests/testfiles/midplane-network-dpu.network
@@ -0,0 +1 @@
+../../../../files/image_config/midplane-network/midplane-network-dpu.network
\ No newline at end of file
diff --git a/src/systemd-sonic-generator/tests/testfiles/midplane-network-dpu.service b/src/systemd-sonic-generator/tests/testfiles/midplane-network-dpu.service
new file mode 120000
index 000000000..e11f6138f
--- /dev/null
+++ b/src/systemd-sonic-generator/tests/testfiles/midplane-network-dpu.service
@@ -0,0 +1 @@
+../../../../files/image_config/midplane-network/midplane-network-dpu.service
\ No newline at end of file
diff --git a/src/systemd-sonic-generator/tests/testfiles/midplane-network-npu.network b/src/systemd-sonic-generator/tests/testfiles/midplane-network-npu.network
new file mode 120000
index 000000000..669215891
--- /dev/null
+++ b/src/systemd-sonic-generator/tests/testfiles/midplane-network-npu.network
@@ -0,0 +1 @@
+../../../../files/image_config/midplane-network/midplane-network-npu.network
\ No newline at end of file
diff --git a/src/systemd-sonic-generator/tests/testfiles/midplane-network-npu.service b/src/systemd-sonic-generator/tests/testfiles/midplane-network-npu.service
new file mode 120000
index 000000000..0a8b423a4
--- /dev/null
+++ b/src/systemd-sonic-generator/tests/testfiles/midplane-network-npu.service
@@ -0,0 +1 @@
+../../../../files/image_config/midplane-network/midplane-network-npu.service
\ No newline at end of file

From c44d1a86443fc5373597c140f571114780aa8c0f Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Tue, 2 Apr 2024 19:00:48 +0800
Subject: [PATCH 0384/1115] [submodule] Update submodule sonic-utilities to the
 latest HEAD automatically (#18524)

#### Why I did it
src/sonic-utilities
```
* bd86d33b - (HEAD -> master, origin/master, origin/HEAD) [generate_dump] call hw-management-generate-dump.sh in collect_cisco_8000 (#2809) (2 hours ago) [Geert Vlaemynck]
* 52e9117c - [dualtor_neighbor_check] Fix the script not exists issue (#3244) (24 hours ago) [Longxiang Lyu]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-utilities | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-utilities b/src/sonic-utilities
index bdc57206c..bd86d33b2 160000
--- a/src/sonic-utilities
+++ b/src/sonic-utilities
@@ -1 +1 @@
-Subproject commit bdc57206cdff258a63907bb43c5845fe9ac57386
+Subproject commit bd86d33b29e1d868c975cf5d52fe95e7cb58f364

From 7fa9035c72d67f2024298e2e0d49251c43b1cb51 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Tue, 2 Apr 2024 19:00:53 +0800
Subject: [PATCH 0385/1115] [submodule] Update submodule sonic-swss-common to
 the latest HEAD automatically (#18523)

#### Why I did it
src/sonic-swss-common
```
* 7db6ccf - (HEAD -> master, origin/master, origin/HEAD) Change pubsub get_message API timeout to seconds. (#864) (17 hours ago) [Hua Liu]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-swss-common | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-swss-common b/src/sonic-swss-common
index 5922fdc4c..7db6ccf5f 160000
--- a/src/sonic-swss-common
+++ b/src/sonic-swss-common
@@ -1 +1 @@
-Subproject commit 5922fdc4cb55c3bcbdd190e084197dffdcd74d21
+Subproject commit 7db6ccf5fb427d4832d6c54ab1f485ddd87b6697

From aea7d559a516e75e312b32bfa13ce04189bf3152 Mon Sep 17 00:00:00 2001
From: Zhijian Li <zhijianli@microsoft.com>
Date: Tue, 2 Apr 2024 23:16:32 +0800
Subject: [PATCH 0386/1115] [E1031] Ensure determine-reboot-cause start after
 platform fully initialized (#18526)

1031] Ensure determine-reboot-cause start after platform fully initialized
---------

Co-authored-by: Xichen Lin <lukelin0907@gmail.com>
---
 .../haliburton/systemd/platform-modules-haliburton.service      | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/platform/broadcom/sonic-platform-modules-cel/haliburton/systemd/platform-modules-haliburton.service b/platform/broadcom/sonic-platform-modules-cel/haliburton/systemd/platform-modules-haliburton.service
index bf1295038..e2101a74a 100644
--- a/platform/broadcom/sonic-platform-modules-cel/haliburton/systemd/platform-modules-haliburton.service
+++ b/platform/broadcom/sonic-platform-modules-cel/haliburton/systemd/platform-modules-haliburton.service
@@ -2,7 +2,7 @@
 [Unit]
 Description=Celestica haliburton platform modules
 After=local-fs.target
-Before=pmon.service
+Before=process-reboot-cause.service determine-reboot-cause.service pmon.service
 
 [Service]
 Type=oneshot

From 7b04c69896794e3234da6381e6c301ea79725389 Mon Sep 17 00:00:00 2001
From: Zhijian Li <zhijianli@microsoft.com>
Date: Tue, 2 Apr 2024 23:21:04 +0800
Subject: [PATCH 0387/1115] [E1031] Update sonic_platform.sfp.Sfp class to fix
 xcvrd crash issue (#18495)

* [E1031] Update sonic_platform class Sfp

* Add implementation for get_eeprom_path
---
 .../x86_64-cel_e1031-r0/sonic_platform/sfp.py       | 13 ++++++++-----
 1 file changed, 8 insertions(+), 5 deletions(-)

diff --git a/device/celestica/x86_64-cel_e1031-r0/sonic_platform/sfp.py b/device/celestica/x86_64-cel_e1031-r0/sonic_platform/sfp.py
index 627fa8a7a..249f611ec 100644
--- a/device/celestica/x86_64-cel_e1031-r0/sonic_platform/sfp.py
+++ b/device/celestica/x86_64-cel_e1031-r0/sonic_platform/sfp.py
@@ -9,7 +9,7 @@
 try:
     import time
     from ctypes import c_char
-    from sonic_platform_base.sfp_base import SfpBase
+    from sonic_platform_base.sonic_xcvr.sfp_optoe_base import SfpOptoeBase
     from sonic_platform_base.sonic_sfp.sff8472 import sff8472InterfaceId
     from sonic_platform_base.sonic_sfp.sff8472 import sff8472Dom
     from sonic_platform_base.sonic_sfp.sff8436 import sff8436InterfaceId
@@ -157,7 +157,7 @@
 PORT_END = 55
 
 
-class Sfp(SfpBase):
+class Sfp(SfpOptoeBase):
     """Platform-specific Sfp class"""
 
     # Port I2C number
@@ -172,7 +172,7 @@ class Sfp(SfpBase):
     PRS_PATH = "/sys/devices/platform/e1031.smc/SFP/sfp_modabs"
 
     def __init__(self, sfp_index, sfp_name):
-        SfpBase.__init__(self)
+        SfpOptoeBase.__init__(self)
 
         # Init common function
         self._api_common = Common()
@@ -235,7 +235,7 @@ def _read_eeprom_specific_bytes(self, offset, num_bytes):
         for i in range(0, num_bytes):
             eeprom_raw.append("0x00")
 
-        sysfs_sfp_i2c_client_eeprom_path = self.port_to_eeprom_mapping[self.port_num]
+        sysfs_sfp_i2c_client_eeprom_path = self.get_eeprom_path()
         try:
             sysfsfile_eeprom = open(
                 sysfs_sfp_i2c_client_eeprom_path, mode="rb", buffering=0)
@@ -355,6 +355,9 @@ def _dom_capability_detect(self):
             self.dom_rx_power_supported = False
             self.dom_tx_power_supported = False
 
+    def get_eeprom_path(self):
+        return self.port_to_eeprom_mapping[self.port_num]
+
     def get_transceiver_info(self):
         """
         Retrieves transceiver info of this SFP
@@ -1176,7 +1179,7 @@ def tx_disable(self, tx_disable):
         if self.dom_tx_disable_supported:
             # SFP status/control register at address A2h, byte 110
             offset = 256
-            sysfs_sfp_i2c_client_eeprom_path = self.port_to_eeprom_mapping[self.port_num]
+            sysfs_sfp_i2c_client_eeprom_path = self.get_eeprom_path()
             status_control_raw = self._read_eeprom_specific_bytes(
                 (offset + SFP_STATUS_CONTROL_OFFSET), SFP_STATUS_CONTROL_WIDTH)
             if status_control_raw is not None:

From 2a63b615fe3759a6d38b30cf7ae164cf776085c7 Mon Sep 17 00:00:00 2001
From: Saikrishna Arcot <sarcot@microsoft.com>
Date: Wed, 3 Apr 2024 10:16:55 -0700
Subject: [PATCH 0388/1115] Upgrade the global gitignore files with some more
 files to ignore (#18317)

* Upgrade the global gitignore files with some more files to ignore

Specifically, ignore the Dockerfile.cleanup files that are autogenerated
for the docker containers, and ignore the udeb files built as part of
openssh.

There are a lot more files that should be ignored, but this is taking
care of the easy ones.

Signed-off-by: Saikrishna Arcot <sarcot@microsoft.com>
---
 .gitignore | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/.gitignore b/.gitignore
index 771f84d72..855e940c6 100644
--- a/.gitignore
+++ b/.gitignore
@@ -12,6 +12,7 @@ fsroot/
 fs.*
 target/
 *.deb
+*.udeb
 *.changes
 *.buildinfo
 *.tar
@@ -28,8 +29,13 @@ sonic-slave*/*.log
 # Autogenerated Dockerfiles
 sonic-slave*/Dockerfile
 sonic-slave*/Dockerfile.user
+sonic-slave*/Dockerfile.cleanup
 dockers/*/Dockerfile
+dockers/*/Dockerfile.cleanup
+dockers/*/Dockerfile-dbg.cleanup
 platform/*/docker-*/Dockerfile
+platform/*/docker-*/Dockerfile.cleanup
+platform/*/docker-*/Dockerfile-dbg.cleanup
 
 # Autogenerated manifest files
 dockers/*/*manifest*

From 837549184ef0656d7d07c3aa5e4873a5ebe05a3e Mon Sep 17 00:00:00 2001
From: saksarav-nokia <sakthivadivu.saravanaraj@nokia.com>
Date: Wed, 3 Apr 2024 18:07:37 -0400
Subject: [PATCH 0389/1115] [Nokia-IXR7250E][Devicedata] Update HW Lane for
 Inband and Rec ports (#18092)

HW Lane for Inband and Rec ports were conflicting with front panel ports

Signed-off-by: saksarav <sakthivadivu.saravanaraj@nokia.com>
---
 .../0/jr2cp-nokia-18x100g-4x25g-config.bcm                    | 2 +-
 .../Nokia-IXR7250E-36x100G/0/port_config.ini                  | 4 ++--
 .../1/jr2cp-nokia-18x100g-4x25g-config.bcm                    | 2 +-
 .../Nokia-IXR7250E-36x100G/1/port_config.ini                  | 4 ++--
 .../Nokia-IXR7250E-36x400G/0/jr2cp-nokia-18x400g-config.bcm   | 2 +-
 .../Nokia-IXR7250E-36x400G/0/port_config.ini                  | 4 ++--
 .../Nokia-IXR7250E-36x400G/1/jr2cp-nokia-18x400g-config.bcm   | 2 +-
 .../Nokia-IXR7250E-36x400G/1/port_config.ini                  | 4 ++--
 8 files changed, 12 insertions(+), 12 deletions(-)

diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/0/jr2cp-nokia-18x100g-4x25g-config.bcm b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/0/jr2cp-nokia-18x100g-4x25g-config.bcm
index bb0d84804..bb75db8b9 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/0/jr2cp-nokia-18x100g-4x25g-config.bcm
+++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/0/jr2cp-nokia-18x100g-4x25g-config.bcm
@@ -2084,7 +2084,7 @@ serdes_lane_config_channel_mode_447=force_nr
 
 rif_id_max=24576
 dpp_db_path=/usr/share/bcm/db
-sai_recycle_port_lane_base=96
+sai_recycle_port_lane_base=200
 appl_param_nof_ports_per_modid=64
 udh_exists=1
 modreg IPS_FORCE_LOCAL_OR_FABRIC FORCE_FABRIC=1
diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/0/port_config.ini b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/0/port_config.ini
index ea7ae717e..d9df84b6e 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/0/port_config.ini
+++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/0/port_config.ini
@@ -17,5 +17,5 @@ Ethernet112    24,25,26,27      Ethernet15/1  15     Ext   100000  Eth112
 Ethernet120    16,17,18,19      Ethernet16/1  16     Ext   100000  Eth120          0       16          8
 Ethernet128    8,9,10,11        Ethernet17/1  17     Ext   100000  Eth128          0       17          8
 Ethernet136    0,1,2,3          Ethernet18/1  18     Ext   100000  Eth136          0       18          8
-Ethernet-IB0   115              Recirc0/0     37     Inb   10000   Rcy0            0       19          8
-Ethernet-Rec0  116              Recirc0/1     39     Rec   10000   Rcy1            1       20          8
+Ethernet-IB0   219              Recirc0/0     37     Inb   10000   Rcy0            0       19          8
+Ethernet-Rec0  220              Recirc0/1     39     Rec   10000   Rcy1            1       20          8
diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/1/jr2cp-nokia-18x100g-4x25g-config.bcm b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/1/jr2cp-nokia-18x100g-4x25g-config.bcm
index 68b0e1fb6..d97725a26 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/1/jr2cp-nokia-18x100g-4x25g-config.bcm
+++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/1/jr2cp-nokia-18x100g-4x25g-config.bcm
@@ -2085,7 +2085,7 @@ serdes_lane_config_channel_mode_447=force_nr
 
 rif_id_max=24576
 dpp_db_path=/usr/share/bcm/db
-sai_recycle_port_lane_base=96
+sai_recycle_port_lane_base=200
 appl_param_nof_ports_per_modid=64
 udh_exists=1
 modreg IPS_FORCE_LOCAL_OR_FABRIC FORCE_FABRIC=1
diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/1/port_config.ini b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/1/port_config.ini
index b919d1b97..4d769b17d 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/1/port_config.ini
+++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/1/port_config.ini
@@ -17,5 +17,5 @@ Ethernet256    24,25,26,27      Ethernet33/1  33     Ext   100000  Eth112
 Ethernet264    16,17,18,19      Ethernet34/1  34     Ext   100000  Eth120          0       16          8
 Ethernet272    8,9,10,11        Ethernet35/1  35     Ext   100000  Eth128          0       17          8
 Ethernet280    0,1,2,3          Ethernet36/1  36     Ext   100000  Eth136          0       18          8
-Ethernet-IB1   115              Recirc1/0     38     Inb   10000   Rcy0            0       19          8
-Ethernet-Rec1  116              Recirc1/1     40     Rec   10000   Rcy1            1       20          8
+Ethernet-IB1   219              Recirc1/0     38     Inb   10000   Rcy0            0       19          8
+Ethernet-Rec1  220              Recirc1/1     40     Rec   10000   Rcy1            1       20          8
diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/0/jr2cp-nokia-18x400g-config.bcm b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/0/jr2cp-nokia-18x400g-config.bcm
index f1f5052f7..a14241358 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/0/jr2cp-nokia-18x400g-config.bcm
+++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/0/jr2cp-nokia-18x400g-config.bcm
@@ -2085,7 +2085,7 @@ serdes_lane_config_channel_mode_447=force_nr
 
 rif_id_max=24576
 dpp_db_path=/usr/share/bcm/db
-sai_recycle_port_lane_base=96
+sai_recycle_port_lane_base=200
 appl_param_nof_ports_per_modid=64
 udh_exists=1
 modreg IPS_FORCE_LOCAL_OR_FABRIC FORCE_FABRIC=1
diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/0/port_config.ini b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/0/port_config.ini
index 162eca454..478b5cb1c 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/0/port_config.ini
+++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/0/port_config.ini
@@ -17,5 +17,5 @@ Ethernet112    24,25,26,27,28,29,30,31          Ethernet15/1  15     Ext   40000
 Ethernet120    16,17,18,19,20,21,22,23          Ethernet16/1  16     Ext   400000  Eth120          0       16          8
 Ethernet128    8,9,10,11,12,13,14,15            Ethernet17/1  17     Ext   400000  Eth128          0       17          8
 Ethernet136    0,1,2,3,4,5,6,7                  Ethernet18/1  18     Ext   400000  Eth136          0       18          8
-Ethernet-IB0   115                              Recirc0/0     37     Inb   10000   Rcy0            0       19          8
-Ethernet-Rec0  116                              Recirc0/1     39     Rec   10000   Rcy1            1       20          8
+Ethernet-IB0   219                              Recirc0/0     37     Inb   10000   Rcy0            0       19          8
+Ethernet-Rec0  220                              Recirc0/1     39     Rec   10000   Rcy1            1       20          8
diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/1/jr2cp-nokia-18x400g-config.bcm b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/1/jr2cp-nokia-18x400g-config.bcm
index ff4e432ab..dc8f73ae6 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/1/jr2cp-nokia-18x400g-config.bcm
+++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/1/jr2cp-nokia-18x400g-config.bcm
@@ -2087,7 +2087,7 @@ serdes_lane_config_channel_mode_447=force_nr
 
 rif_id_max=24576
 dpp_db_path=/usr/share/bcm/db
-sai_recycle_port_lane_base=96
+sai_recycle_port_lane_base=200
 appl_param_nof_ports_per_modid=64
 udh_exists=1
 modreg IPS_FORCE_LOCAL_OR_FABRIC FORCE_FABRIC=1
diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/1/port_config.ini b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/1/port_config.ini
index 1531e5a14..92c0731dd 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/1/port_config.ini
+++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/1/port_config.ini
@@ -17,5 +17,5 @@ Ethernet256    24,25,26,27,28,29,30,31          Ethernet33/1  33     Ext   40000
 Ethernet264    16,17,18,19,20,21,22,23          Ethernet34/1  34     Ext   400000  Eth120          0       16          8
 Ethernet272    8,9,10,11,12,13,14,15            Ethernet35/1  35     Ext   400000  Eth128          0       17          8
 Ethernet280    0,1,2,3,4,5,6,7                  Ethernet36/1  36     Ext   400000  Eth136          0       18          8
-Ethernet-IB1   115                              Recirc1/0     38     Inb   10000   Rcy0            0       19          8
-Ethernet-Rec1  116                              Recirc1/1     40     Rec   10000   Rcy1            1       20          8
+Ethernet-IB1   219                              Recirc1/0     38     Inb   10000   Rcy0            0       19          8
+Ethernet-Rec1  220                              Recirc1/1     40     Rec   10000   Rcy1            1       20          8

From eba5dbc2024984f75963ab6a6653882db16c9914 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Thu, 4 Apr 2024 19:01:05 +0800
Subject: [PATCH 0390/1115] [submodule] Update submodule sonic-utilities to the
 latest HEAD automatically (#18563)

#### Why I did it
src/sonic-utilities
```
* c0b6632e - (HEAD -> master, origin/master, origin/HEAD) T2-VOQ-VS: Modified exception handling due to new sonic_platform package support for VS (#3250) (21 hours ago) [Deepak Singhal]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-utilities | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-utilities b/src/sonic-utilities
index bd86d33b2..c0b6632e7 160000
--- a/src/sonic-utilities
+++ b/src/sonic-utilities
@@ -1 +1 @@
-Subproject commit bd86d33b29e1d868c975cf5d52fe95e7cb58f364
+Subproject commit c0b6632e7c39d6ab2ba9cb44711df7c4e6ad3c1c

From d2d93e5054726bf6a6fcd4077501a543240f93a1 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Thu, 4 Apr 2024 19:01:10 +0800
Subject: [PATCH 0391/1115] [submodule] Update submodule sonic-sairedis to the
 latest HEAD automatically (#18562)

#### Why I did it
src/sonic-sairedis
```
* a1b89c3 - (HEAD -> master, origin/master, origin/HEAD) DASH SAI support for build chain of syncd (#1366) (14 hours ago) [Ze Gan]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-sairedis | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-sairedis b/src/sonic-sairedis
index 594944dbe..a1b89c3c3 160000
--- a/src/sonic-sairedis
+++ b/src/sonic-sairedis
@@ -1 +1 @@
-Subproject commit 594944dbe4414f135fc6366a30118afa10c135eb
+Subproject commit a1b89c3c37b2fe1568974cd76fd62ce7f29d548f

From 725f62ac7c5d04cc8709d05925aaa7e1a3f292d8 Mon Sep 17 00:00:00 2001
From: Saikrishna Arcot <sarcot@microsoft.com>
Date: Thu, 4 Apr 2024 09:27:18 -0700
Subject: [PATCH 0392/1115] Install pygobject from Debian repos (#18546)

* Install pygobject from Debian repos

sonic-host-services needs pygobject installed, which is fine for amd64
and arm64, but for armhf, there's no precompiled wheel and requires
compilation.

To get around that, just install the version from Debian.
* Reduce scope of python3-gi installation to armhf only

Signed-off-by: Saikrishna Arcot <sarcot@microsoft.com>
---
 files/build_templates/sonic_debian_extension.j2 | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/files/build_templates/sonic_debian_extension.j2 b/files/build_templates/sonic_debian_extension.j2
index a730d4e9a..32e68e950 100644
--- a/files/build_templates/sonic_debian_extension.j2
+++ b/files/build_templates/sonic_debian_extension.j2
@@ -242,6 +242,15 @@ sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-mark manu
 # Install systemd-python for SONiC host services
 sudo https_proxy=$https_proxy LANG=C chroot $FILESYSTEM_ROOT pip3 install systemd-python
 
+if [[ $CONFIGURED_ARCH == armhf ]]; then
+    # Install pygobject from apt repos, since it has armhf prebuilt. The version in Debian is
+    # a bit older than what is in pip.
+    #
+    # When doing the next Debian upgrade (to Trixie), consider installing this package for all
+    # architectures instead of just armhf.
+    sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install python3-gi
+fi
+
 # Install SONiC host services package
 SONIC_HOST_SERVICES_PY3_WHEEL_NAME=$(basename {{sonic_host_services_py3_wheel_path}})
 sudo cp {{sonic_host_services_py3_wheel_path}} $FILESYSTEM_ROOT/$SONIC_HOST_SERVICES_PY3_WHEEL_NAME

From fef173775768fc8eb5fcf2bfa65e0af85660715d Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Fri, 5 Apr 2024 19:00:56 +0800
Subject: [PATCH 0393/1115] [submodule] Update submodule sonic-mgmt-common to
 the latest HEAD automatically (#18572)

#### Why I did it
src/sonic-mgmt-common
```
* e3e0ea5 - (HEAD -> master, origin/master, origin/HEAD) Add leaf Mirror linter Check for not-supported deviation (2 hours ago) [Mohammed Faraaz]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-mgmt-common | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-mgmt-common b/src/sonic-mgmt-common
index 4f329233b..e3e0ea502 160000
--- a/src/sonic-mgmt-common
+++ b/src/sonic-mgmt-common
@@ -1 +1 @@
-Subproject commit 4f329233be35d223f01f85b02f8124ad096926ed
+Subproject commit e3e0ea502c2fba3d30ff6baec17159d80432c89e

From bed3718c6a90421d31fc410e7010a064bcd7a50f Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sat, 6 Apr 2024 00:51:22 +0800
Subject: [PATCH 0394/1115] [ci/build]: Upgrade SONiC package versions (#18037)

---
 .../versions-deb-bookworm                     |  28 ++-
 .../versions-deb-bookworm-armhf               |   2 +
 .../build-sonic-slave-bookworm/versions-py3   |  13 +-
 .../versions-py3-all-armhf                    |   5 +
 .../versions-deb-bullseye                     |  42 ++--
 .../build-sonic-slave-bullseye/versions-py3   |   9 +-
 .../build-sonic-slave-buster/versions-py2     |   2 +-
 files/build/versions/default/versions-docker  |  33 +--
 files/build/versions/default/versions-git     |  22 +-
 files/build/versions/default/versions-mirror  |  40 ++--
 files/build/versions/default/versions-web     | 195 ++++++++++--------
 .../versions-deb-bookworm                     |  80 +++++++
 .../dockers/docker-base-bookworm/versions-py3 |  13 ++
 .../versions-deb-bullseye                     |  10 +-
 .../dockers/docker-base-bullseye/versions-py3 |   6 +-
 .../docker-base-buster/versions-deb-buster    |  12 +-
 .../dockers/docker-base-buster/versions-py3   |   4 +-
 .../versions-deb-bookworm                     |  37 ++++
 .../versions-mirror                           |   2 +
 .../versions-py3                              |  16 ++
 .../versions-deb-bullseye                     |   6 +-
 .../versions-deb-buster                       |   2 +-
 .../docker-database/versions-deb-bookworm     |  31 +++
 .../docker-database/versions-deb-bullseye     |  25 ---
 .../dockers/docker-database/versions-mirror   |   2 +
 .../dockers/docker-database/versions-py3      |   1 +
 .../docker-dhcp-relay/versions-deb-bookworm   |  40 ++++
 .../docker-dhcp-relay/versions-deb-bullseye   |  40 ----
 .../dockers/docker-dhcp-relay/versions-mirror |   2 +
 .../dockers/docker-dhcp-relay/versions-py3    |   2 +-
 .../docker-eventd/versions-deb-bullseye       |   2 +-
 .../docker-fpm-frr/versions-deb-bullseye      |   2 +-
 .../versions-deb-bullseye                     |   8 +-
 .../versions-deb-bullseye                     |   2 +-
 .../docker-gbsyncd-vs/versions-deb-bullseye   |   6 +-
 .../dockers/docker-lldp/versions-deb-bullseye |   2 +-
 .../docker-macsec/versions-deb-bookworm       |  31 +++
 .../docker-macsec/versions-deb-bullseye       |  37 ----
 .../dockers/docker-macsec/versions-mirror     |   2 +
 .../dockers/docker-macsec/versions-py3        |   1 -
 .../dockers/docker-mux/versions-deb-bookworm  |  33 +++
 .../dockers/docker-mux/versions-deb-bullseye  |  30 ---
 .../dockers/docker-mux/versions-mirror        |   2 +
 .../dockers/docker-nat/versions-deb-bullseye  |   2 +-
 .../docker-orchagent/versions-deb-bookworm    |  47 +++++
 .../docker-orchagent/versions-deb-bullseye    |  41 ----
 .../dockers/docker-orchagent/versions-mirror  |   2 +
 .../versions-deb-bullseye                     |  20 +-
 .../docker-platform-monitor/versions-py3      |   6 +-
 .../dockers/docker-ptf-sai/versions-py3       |   2 +-
 .../dockers/docker-ptf/versions-deb-buster    |  62 +++---
 .../versions/dockers/docker-ptf/versions-py2  |   2 +-
 .../versions-deb-bookworm                     |  28 +++
 .../versions-deb-bookworm-arm64               |   1 +
 .../versions-deb-bookworm-armhf               |   1 +
 .../versions-deb-bullseye                     |  25 ---
 .../docker-router-advertiser/versions-mirror  |   2 +
 .../docker-sflow/versions-deb-bullseye        |   2 +-
 .../dockers/docker-snmp/versions-deb-bullseye |   6 +-
 .../docker-sonic-gnmi/versions-deb-bullseye   |   2 +-
 .../versions-deb-buster                       |   2 +-
 .../docker-sonic-vs/versions-deb-bullseye     |  34 +--
 .../dockers/docker-sonic-vs/versions-py3      |  18 +-
 .../versions-deb-bookworm                     |   9 +
 .../versions-mirror                           |   2 +
 .../versions-deb-bullseye                     |   4 +-
 .../versions-deb-bullseye                     |  10 +-
 .../versions-deb-bullseye                     |   6 +-
 .../versions-deb-bullseye                     |  10 +-
 .../docker-syncd-brcm/versions-deb-bullseye   |   5 +-
 .../versions-deb-bullseye                     |  10 +-
 .../docker-syncd-centec/versions-deb-bullseye |   2 +-
 .../versions-deb-bullseye                     |   5 +-
 .../docker-syncd-mlnx-rpc/versions-py3        |   5 +
 .../docker-syncd-mlnx/versions-deb-bullseye   |  49 ++---
 .../dockers/docker-syncd-mlnx/versions-py3    |   2 +-
 .../versions-deb-bullseye-arm64               |   2 +-
 .../versions-deb-bullseye-armhf               |   2 +-
 .../docker-syncd-vs/versions-deb-bullseye     |   6 +-
 .../docker-teamd/versions-deb-bookworm        |  31 +++
 .../docker-teamd/versions-deb-bullseye        |  28 ---
 .../dockers/docker-teamd/versions-mirror      |   2 +
 .../versions-deb-bookworm                     | 135 ++++++------
 .../versions-deb-bookworm-armhf               |   6 +-
 .../sonic-slave-bookworm/versions-mirror      |   1 +
 .../dockers/sonic-slave-bookworm/versions-py3 |   8 +-
 .../versions-deb-bullseye                     | 133 ++++++------
 .../versions-deb-bullseye-armhf               |   6 +-
 .../dockers/sonic-slave-bullseye/versions-py3 |  10 +-
 .../sonic-slave-buster/versions-deb-buster    | 144 ++++++-------
 .../dockers/sonic-slave-buster/versions-py3   |   8 +-
 .../host-base-image/versions-deb-bookworm     |  18 +-
 .../versions/host-image/versions-deb-bookworm |  73 ++++---
 .../host-image/versions-deb-bookworm-armhf    |   1 +
 files/build/versions/host-image/versions-py3  |  16 +-
 .../host-image/versions-py3-all-armhf         |   1 +
 96 files changed, 1113 insertions(+), 822 deletions(-)
 create mode 100644 files/build/versions/build/build-sonic-slave-bookworm/versions-py3-all-armhf
 create mode 100644 files/build/versions/dockers/docker-base-bookworm/versions-deb-bookworm
 create mode 100644 files/build/versions/dockers/docker-base-bookworm/versions-py3
 create mode 100644 files/build/versions/dockers/docker-config-engine-bookworm/versions-deb-bookworm
 create mode 100644 files/build/versions/dockers/docker-config-engine-bookworm/versions-mirror
 create mode 100644 files/build/versions/dockers/docker-config-engine-bookworm/versions-py3
 create mode 100644 files/build/versions/dockers/docker-database/versions-deb-bookworm
 delete mode 100644 files/build/versions/dockers/docker-database/versions-deb-bullseye
 create mode 100644 files/build/versions/dockers/docker-database/versions-mirror
 create mode 100644 files/build/versions/dockers/docker-database/versions-py3
 create mode 100644 files/build/versions/dockers/docker-dhcp-relay/versions-deb-bookworm
 delete mode 100644 files/build/versions/dockers/docker-dhcp-relay/versions-deb-bullseye
 create mode 100644 files/build/versions/dockers/docker-dhcp-relay/versions-mirror
 create mode 100644 files/build/versions/dockers/docker-macsec/versions-deb-bookworm
 delete mode 100644 files/build/versions/dockers/docker-macsec/versions-deb-bullseye
 create mode 100644 files/build/versions/dockers/docker-macsec/versions-mirror
 delete mode 100644 files/build/versions/dockers/docker-macsec/versions-py3
 create mode 100644 files/build/versions/dockers/docker-mux/versions-deb-bookworm
 delete mode 100644 files/build/versions/dockers/docker-mux/versions-deb-bullseye
 create mode 100644 files/build/versions/dockers/docker-mux/versions-mirror
 create mode 100644 files/build/versions/dockers/docker-orchagent/versions-deb-bookworm
 delete mode 100644 files/build/versions/dockers/docker-orchagent/versions-deb-bullseye
 create mode 100644 files/build/versions/dockers/docker-orchagent/versions-mirror
 create mode 100644 files/build/versions/dockers/docker-router-advertiser/versions-deb-bookworm
 create mode 100644 files/build/versions/dockers/docker-router-advertiser/versions-deb-bookworm-arm64
 create mode 100644 files/build/versions/dockers/docker-router-advertiser/versions-deb-bookworm-armhf
 delete mode 100644 files/build/versions/dockers/docker-router-advertiser/versions-deb-bullseye
 create mode 100644 files/build/versions/dockers/docker-router-advertiser/versions-mirror
 create mode 100644 files/build/versions/dockers/docker-swss-layer-bookworm/versions-deb-bookworm
 create mode 100644 files/build/versions/dockers/docker-swss-layer-bookworm/versions-mirror
 create mode 100644 files/build/versions/dockers/docker-syncd-mlnx-rpc/versions-py3
 create mode 100644 files/build/versions/dockers/docker-teamd/versions-deb-bookworm
 delete mode 100644 files/build/versions/dockers/docker-teamd/versions-deb-bullseye
 create mode 100644 files/build/versions/dockers/docker-teamd/versions-mirror
 create mode 100644 files/build/versions/dockers/sonic-slave-bookworm/versions-mirror
 create mode 100644 files/build/versions/host-image/versions-py3-all-armhf

diff --git a/files/build/versions/build/build-sonic-slave-bookworm/versions-deb-bookworm b/files/build/versions/build/build-sonic-slave-bookworm/versions-deb-bookworm
index 04542d6ef..e3e4626ea 100644
--- a/files/build/versions/build/build-sonic-slave-bookworm/versions-deb-bookworm
+++ b/files/build/versions/build/build-sonic-slave-bookworm/versions-deb-bookworm
@@ -1,6 +1,6 @@
-applibs==1.mlnx.4.6.2134
-kernel-mft-dkms==4.25.0-62
-libnl-3-200==3.5.0-1
+applibs==1.mlnx.4.6.2202
+kernel-mft-dkms==4.27.0-83
+libdashapi==1.0.0
 libnl-3-dev==3.5.0-1
 libnl-cli-3-200==3.5.0-1
 libnl-cli-3-dev==3.5.0-1
@@ -8,12 +8,20 @@ libnl-genl-3-200==3.5.0-1
 libnl-genl-3-dev==3.5.0-1
 libnl-nf-3-200==3.5.0-1
 libnl-nf-3-dev==3.5.0-1
-libnl-route-3-200==3.5.0-1
 libnl-route-3-dev==3.5.0-1
+libsaimetadata==1.0.0
+libsaimetadata-dev==1.0.0
+libsairedis==1.0.0
+libsairedis-dev==1.0.0
+libsaivs==1.0.0
 libswsscommon==1.0.0
 libswsscommon-dev==1.0.0
 libtac-dev==1.4.1-1
 libtac2==1.4.1-1
+libteam-dev==1.31-1
+libteam-utils==1.31-1
+libteam5==1.31-1
+libteamdctl0==1.31-1
 libyang==1.0.73
 libyang-cpp==1.0.73
 libyang-dev==1.0.73
@@ -25,9 +33,9 @@ python3-swsscommon==1.0.0
 python3-yang==1.0.73
 sonic-platform-pddf==1.1
 sonic-platform-pddf-sym==1.1
-sx-complib==1.mlnx.4.6.2134
-sx-complib-dev==1.mlnx.4.6.2134
-sx-gen-utils==1.mlnx.4.6.2134
-sx-gen-utils-dev==1.mlnx.4.6.2134
-sxd-libs==1.mlnx.4.6.2134
-sxd-libs-dev==1.mlnx.4.6.2134
+sx-complib==1.mlnx.4.6.2202
+sx-complib-dev==1.mlnx.4.6.2202
+sx-gen-utils==1.mlnx.4.6.2202
+sx-gen-utils-dev==1.mlnx.4.6.2202
+sxd-libs==1.mlnx.4.6.2202
+sxd-libs-dev==1.mlnx.4.6.2202
diff --git a/files/build/versions/build/build-sonic-slave-bookworm/versions-deb-bookworm-armhf b/files/build/versions/build/build-sonic-slave-bookworm/versions-deb-bookworm-armhf
index 9096b1dd6..247d032a3 100644
--- a/files/build/versions/build/build-sonic-slave-bookworm/versions-deb-bookworm-armhf
+++ b/files/build/versions/build/build-sonic-slave-bookworm/versions-deb-bookworm-armhf
@@ -1 +1,3 @@
+libnl-3-200==3.5.0-1
+libnl-route-3-200==3.5.0-1
 linux-headers-6.1.0-11-2-armmp==6.1.38-4
diff --git a/files/build/versions/build/build-sonic-slave-bookworm/versions-py3 b/files/build/versions/build/build-sonic-slave-bookworm/versions-py3
index 3278e5b87..d9fff43be 100644
--- a/files/build/versions/build/build-sonic-slave-bookworm/versions-py3
+++ b/files/build/versions/build/build-sonic-slave-bookworm/versions-py3
@@ -1,21 +1,19 @@
-bitarray==2.8.1
 blessed==1.20.0
 cffi==1.16.0
-click==7.0
 click-log==0.4.0
 colorful==0.5.6
 deepdiff==6.2.2
 docker==7.0.0
 docker-image-py==0.1.12
 enlighten==1.12.4
-filelock==3.13.1
+filelock==3.13.3
+freezegun==1.4.0
 ijson==3.2.3
 ipaddress==1.0.23
 jsondiff==2.0.0
 jsonpatch==1.33
 jsonpointer==2.4
 jsonschema==2.6.0
-lxml==4.9.1
 natsort==6.2.1
 netaddr==0.8.0
 netifaces==0.11.0
@@ -24,17 +22,16 @@ paramiko==2.11.0
 pexpect==4.9.0
 prefixed==0.7.0
 prettyprinter==0.18.0
+psutil==5.9.8
 ptyprocess==0.7.0
-pycairo==1.25.1
-pycparser==2.21
+pycairo==1.26.0
+pycparser==2.22
 pynacl==1.5.0
 pyroute2==0.5.19
-pyyaml==6.0.1
 semantic-version==2.10.0
 systemd-python==235
 tabulate==0.9.0
 toposort==1.6
-urllib3==2.1.0
 wcwidth==0.2.13
 www-authenticate==0.9.2
 xmltodict==0.12.0
diff --git a/files/build/versions/build/build-sonic-slave-bookworm/versions-py3-all-armhf b/files/build/versions/build/build-sonic-slave-bookworm/versions-py3-all-armhf
new file mode 100644
index 000000000..f766c98db
--- /dev/null
+++ b/files/build/versions/build/build-sonic-slave-bookworm/versions-py3-all-armhf
@@ -0,0 +1,5 @@
+bitarray==2.8.1
+click==7.0
+lxml==4.9.1
+pyyaml==6.0.1
+urllib3==2.2.1
diff --git a/files/build/versions/build/build-sonic-slave-bullseye/versions-deb-bullseye b/files/build/versions/build/build-sonic-slave-bullseye/versions-deb-bullseye
index fe066a23f..bc64b529a 100644
--- a/files/build/versions/build/build-sonic-slave-bullseye/versions-deb-bullseye
+++ b/files/build/versions/build/build-sonic-slave-bullseye/versions-deb-bullseye
@@ -1,5 +1,5 @@
-applibs==1.mlnx.4.6.2134
-applibs-dev==1.mlnx.4.6.2134
+applibs==1.mlnx.4.6.2202
+applibs-dev==1.mlnx.4.6.2202
 libdashapi==1.0.0
 libnl-3-200==3.5.0-1
 libnl-3-dev==3.5.0-1
@@ -25,10 +25,10 @@ libsaithrift-dev==0.9.4
 libsaivs==1.0.0
 libswsscommon==1.0.0
 libswsscommon-dev==1.0.0
-libteam-dev==1.30-1
-libteam-utils==1.30-1
-libteam5==1.30-1
-libteamdctl0==1.30-1
+libteam-dev==1.31-1
+libteam-utils==1.31-1
+libteam5==1.31-1
+libteamdctl0==1.31-1
 libthrift-0.11.0==0.11.0-4
 libthrift-dev==0.11.0-4
 libyang==1.0.73
@@ -40,19 +40,19 @@ python3-swsscommon==1.0.0
 python3-yang==1.0.73
 sonic-mgmt-common==1.0.0
 sonic-mgmt-common-codegen==1.0.0
-sx-acl-helper==1.mlnx.4.6.2134
-sx-acl-helper-dev==1.mlnx.4.6.2134
-sx-complib==1.mlnx.4.6.2134
-sx-complib-dev==1.mlnx.4.6.2134
-sx-examples==1.mlnx.4.6.2134
-sx-examples-dev==1.mlnx.4.6.2134
-sx-gen-utils==1.mlnx.4.6.2134
-sx-gen-utils-dev==1.mlnx.4.6.2134
-sx-hash-calc==1.mlnx.4.6.2134
-sx-obj-desc-lib==1.mlnx.4.6.2134
-sx-obj-desc-lib-dev==1.mlnx.4.6.2134
-sxd-libs==1.mlnx.4.6.2134
-sxd-libs-dev==1.mlnx.4.6.2134
+sx-acl-helper==1.mlnx.4.6.2202
+sx-acl-helper-dev==1.mlnx.4.6.2202
+sx-complib==1.mlnx.4.6.2202
+sx-complib-dev==1.mlnx.4.6.2202
+sx-examples==1.mlnx.4.6.2202
+sx-examples-dev==1.mlnx.4.6.2202
+sx-gen-utils==1.mlnx.4.6.2202
+sx-gen-utils-dev==1.mlnx.4.6.2202
+sx-hash-calc==1.mlnx.4.6.2202
+sx-obj-desc-lib==1.mlnx.4.6.2202
+sx-obj-desc-lib-dev==1.mlnx.4.6.2202
+sxd-libs==1.mlnx.4.6.2202
+sxd-libs-dev==1.mlnx.4.6.2202
 thrift-compiler==0.11.0-4
-wjh-libs==1.mlnx.4.6.2134
-wjh-libs-dev==1.mlnx.4.6.2134
+wjh-libs==1.mlnx.4.6.2202
+wjh-libs-dev==1.mlnx.4.6.2202
diff --git a/files/build/versions/build/build-sonic-slave-bullseye/versions-py3 b/files/build/versions/build/build-sonic-slave-bullseye/versions-py3
index 8cdab5b72..ecfaa45c5 100644
--- a/files/build/versions/build/build-sonic-slave-bullseye/versions-py3
+++ b/files/build/versions/build/build-sonic-slave-bullseye/versions-py3
@@ -9,8 +9,7 @@ colorful==0.5.6
 docker==7.0.0
 docker-image-py==0.1.12
 enlighten==1.12.4
-filelock==3.13.1
-freezegun==1.4.0
+filelock==3.13.3
 ijson==3.2.3
 ipaddress==1.0.23
 jsondiff==2.0.0
@@ -24,8 +23,8 @@ paramiko==2.11.0
 prefixed==0.7.0
 prettyprinter==0.18.0
 psutil==5.9.8
-pycairo==1.25.1
-pycparser==2.21
+pycairo==1.26.0
+pycparser==2.22
 pynacl==1.5.0
 pyroute2==0.5.19
 python-arptable==0.0.2
@@ -35,7 +34,7 @@ semantic-version==2.10.0
 systemd-python==235
 tabulate==0.9.0
 toposort==1.6
-urllib3==2.1.0
+urllib3==2.2.1
 wcwidth==0.2.13
 www-authenticate==0.9.2
 xmltodict==0.12.0
diff --git a/files/build/versions/build/build-sonic-slave-buster/versions-py2 b/files/build/versions/build/build-sonic-slave-buster/versions-py2
index fcf28ba4b..370f7127e 100644
--- a/files/build/versions/build/build-sonic-slave-buster/versions-py2
+++ b/files/build/versions/build/build-sonic-slave-buster/versions-py2
@@ -1,6 +1,6 @@
 bitarray==2.8.1
 contextlib2==0.6.0.post1
-future==0.18.3
+future==1.0.0
 importlib-resources==3.3.1
 ipaddress==1.0.23
 natsort==6.2.1
diff --git a/files/build/versions/default/versions-docker b/files/build/versions/default/versions-docker
index a1c053f5a..6a0a8332a 100644
--- a/files/build/versions/default/versions-docker
+++ b/files/build/versions/default/versions-docker
@@ -1,15 +1,18 @@
-amd64:amd64/debian:bullseye==sha256:4cb3f4198e4af2d03dffe6bfa4f3686773596494ef298f3882553d52e885634b
-amd64:amd64/debian:buster==sha256:d39357a2a8840e450e387df33a5aaf8f0c8f99e388a0e18169f3dd240fc2393d
-amd64:debian:bookworm==sha256:b16cef8cbcb20935c0f052e37fc3d38dc92bfec0bcfb894c328547f81e932d67
-amd64:debian:bullseye==sha256:71cb300d5448af821aedfe63afd55ba05f45a6a79f00dcd131b96b780bb99fe4
-amd64:debian:buster==sha256:defa5d214292f2aaf7905d3e4bcdf8f628019feb63e7c8746df563d1a941f8d7
-arm64:arm64v8/debian:bullseye==sha256:c4a762841d008c85d809f0981c47e2a490c43483e4a169e17afa2dc83d18b2b1
-arm64:arm64v8/debian:buster==sha256:7d6cb4b56f1230b8692ed0c5fa5fa838ddd7ebd436a6463a6e9b29d1aa4c6e24
-arm64:debian:bookworm==sha256:b16cef8cbcb20935c0f052e37fc3d38dc92bfec0bcfb894c328547f81e932d67
-arm64:debian:bullseye==sha256:71cb300d5448af821aedfe63afd55ba05f45a6a79f00dcd131b96b780bb99fe4
-arm64:debian:buster==sha256:defa5d214292f2aaf7905d3e4bcdf8f628019feb63e7c8746df563d1a941f8d7
-armhf:arm32v7/debian:bullseye==sha256:70dcc7f2c51acbeaff85f700d9c1ef936371e60bdec8da15729c19503ef1fb8f
-armhf:arm32v7/debian:buster==sha256:d984bf6bd66a53445e82ca3e6ae8d3c40a866c053339acfd5f3fa705a7092b90
-armhf:debian:bookworm==sha256:b16cef8cbcb20935c0f052e37fc3d38dc92bfec0bcfb894c328547f81e932d67
-armhf:debian:bullseye==sha256:71cb300d5448af821aedfe63afd55ba05f45a6a79f00dcd131b96b780bb99fe4
-armhf:debian:buster==sha256:defa5d214292f2aaf7905d3e4bcdf8f628019feb63e7c8746df563d1a941f8d7
+amd64:amd64/debian:bookworm==sha256:c2cedd7f80a4dd0f9f80d3699bd433ccf3de33ab63bfa2d4c4ba870c998222d6
+amd64:amd64/debian:bullseye==sha256:90afe482786743f51e30f5fe673b71d787d34242f9f3b68755b1eb9c7c901f8e
+amd64:amd64/debian:buster==sha256:c6296b63c2ec4c500d6386660beedb1783f162c3c1a681ae93fef28f39b8f2a4
+amd64:debian:bookworm==sha256:e97ee92bf1e11a2de654e9f3da827d8dce32b54e0490ac83bfc65c8706568116
+amd64:debian:bullseye==sha256:5a87974e73c64b3fb161d444a84bdd47c0e6b6058eacaeea64342e7cbce1f04d
+amd64:debian:buster==sha256:f6b3b7c7b049c2c7d0f19ae988b4eac64fd8e127fa891c9de1d3cf3f8c33cad4
+arm64:arm64v8/debian:bookworm==sha256:6fc9b50711023adfca7c7b4236948e120d1332ff01bf46c93e5b64ca0830a81a
+arm64:arm64v8/debian:bullseye==sha256:64f4252c791692432233602d3a3dea4453a57ea268dc397e96bdac828d08df28
+arm64:arm64v8/debian:buster==sha256:f6f84d5d8145c7b86e09bbed0ffa3486cccff7c993e91803a462245fc68c28b2
+arm64:debian:bookworm==sha256:e97ee92bf1e11a2de654e9f3da827d8dce32b54e0490ac83bfc65c8706568116
+arm64:debian:bullseye==sha256:5a87974e73c64b3fb161d444a84bdd47c0e6b6058eacaeea64342e7cbce1f04d
+arm64:debian:buster==sha256:f6b3b7c7b049c2c7d0f19ae988b4eac64fd8e127fa891c9de1d3cf3f8c33cad4
+armhf:arm32v7/debian:bookworm==sha256:1129497179f83b39970c5e03e6341e6be3d2e6997e521f57b814522920f01c73
+armhf:arm32v7/debian:bullseye==sha256:9f73ebca334a142cd23aec641d2051f3a60783eb7dc7c2037d1bd676ebd2c8f8
+armhf:arm32v7/debian:buster==sha256:1f61a6065e5ba6bb38a94607a16c219d6fbd9f97711886d42e4cdf5ae008d0e5
+armhf:debian:bookworm==sha256:e97ee92bf1e11a2de654e9f3da827d8dce32b54e0490ac83bfc65c8706568116
+armhf:debian:bullseye==sha256:5a87974e73c64b3fb161d444a84bdd47c0e6b6058eacaeea64342e7cbce1f04d
+armhf:debian:buster==sha256:f6b3b7c7b049c2c7d0f19ae988b4eac64fd8e127fa891c9de1d3cf3f8c33cad4
diff --git a/files/build/versions/default/versions-git b/files/build/versions/default/versions-git
index d1971d19c..7b7c196e5 100644
--- a/files/build/versions/default/versions-git
+++ b/files/build/versions/default/versions-git
@@ -1,24 +1,22 @@
-https://chromium.googlesource.com/chromium/tools/depot_tools.git==00ae0c065cac5c7fd0855a38249dc17f4092bc14
+https://chromium.googlesource.com/chromium/tools/depot_tools.git==90d54ff344a0e8188214058614b5bab46db5bf0e
 https://github.com/aristanetworks/swi-tools.git==b5f087e4774168bf536360d43c9c509c8f14ad9f
 https://github.com/CESNET/libyang.git==fc4dbd923e044006c93df020590a1e5a8656c09e
 https://github.com/daveolson53/audisp-tacplus.git==559c9f22edd4f2dea0ecedffb3ad9502b12a75b6
 https://github.com/daveolson53/libnss-tacplus.git==19008ab68d9d504aa58eb34d5f564755a1613b8b
 https://github.com/dyninc/OpenBFDD.git==e35f43ad8d2b3f084e96a84c392528a90d05a287
-https://github.com/flashrom/flashrom.git==a21be9153abe50ae26cd833db62d9493e7eadf54
-https://github.com/FreeRADIUS/freeradius-server.git==30951a836a404e1305fd145eed7c3587432a4a30
+https://github.com/flashrom/flashrom.git==2a5d2920d8817f1bc7e479a2ed868a6e2a46dcbe
+https://github.com/FreeRADIUS/freeradius-server.git==ddef42d8417bfcb16ab16214e6e86281e9c73feb
 https://github.com/FreeRADIUS/pam_radius.git==53c0cfff686ab48ae3bac5449d5461b6e1b83d27
-https://github.com/jeroennijhof/pam_tacplus.git==b89dba44b58ec7fdc9b5365b982aa4a316484a3c
-https://github.com/jpirko/libteam.git==8b843e93cee1dab61fb79b01791201cdad45e1d1
+https://github.com/jeroennijhof/pam_tacplus.git==b839c440e33c36eced9dcbc287fcfe6237c4c4ce
 https://github.com/lguohan/gnxi.git==3adf8b97755b49947e465b5a14645f11e79fa0cd
-https://github.com/Marvell-switching/mrvl-prestera.git==22ac73bff81451571002df88e5a39cf390a4d8cd
+https://github.com/Marvell-switching/mrvl-prestera.git==d524292106abbef63df6d0853d4557a5097546f0
 https://github.com/Mellanox/libpsample.git==62bb27d9a49424e45191eee81df7ce0d8c74e774
 https://github.com/openconfig/oc-pyang.git==4607fd1987d4f586aba03b40f222015cb3ef8161
-https://github.com/p4lang/ptf.git==252facba471842f7e88db353cffc2872c0e13909
+https://github.com/p4lang/ptf.git==e8b545f3f281fc509c7bdd6c8a4f55bc829149e7
 https://github.com/p4lang/scapy-vxlan.git==85ffe83da156568ee47a0750f638227e6e1d7479
-https://github.com/sflow/host-sflow==6f50c161d3dc2b78c66b1f8cd69fcd7957e2730f
-https://github.com/sflow/sflowtool==c1eeb55ad6bfd76283833614a8296f635627e1db
-https://github.com/thom311/libnl==8693347fe9c47d08ce5899602ab4f208c1249619
-https://salsa.debian.org/debian/libteam.git==48142125234a665ad5367b724af36a58fb484d3d
+https://github.com/sflow/host-sflow==f2cd42fae58bbf76a067ad8b12a07ca37e1f786b
+https://github.com/sflow/sflowtool==c42c49cb80b927a4c02e54fc26430417f18f4833
+https://github.com/thom311/libnl==19d48b0fe924085f28c9410fae448d385f5f9a23
 https://salsa.debian.org/kernel-team/initramfs-tools.git==cf964bfb4362019fd7fba1e839e403ff950dca8e
 https://salsa.debian.org/sk-guest/monit.git==c9da7ebb1f35dfba17b50b5969a6e75e29cbec0d
-https://salsa.debian.org/ssh-team/openssh.git==1d67ef8053a0ea5e9a57c0e6ad33604d17e95456
+https://salsa.debian.org/ssh-team/openssh.git==e4f80d7ae4c9bb1125ff1987b1a0ead33b577ec4
diff --git a/files/build/versions/default/versions-mirror b/files/build/versions/default/versions-mirror
index d53f85a4d..735e459b1 100644
--- a/files/build/versions/default/versions-mirror
+++ b/files/build/versions/default/versions-mirror
@@ -1,23 +1,23 @@
-deb.debian.org_debian-security_dists_bookworm-security==2024-01-23T21:49:41Z
-deb.debian.org_debian_dists_bookworm==2023-12-10T17:43:24Z
-deb.debian.org_debian_dists_bookworm-updates==2024-01-23T20:15:19Z
+deb.debian.org_debian-security_dists_bookworm-security==2024-04-04T18:53:21Z
+deb.debian.org_debian_dists_bookworm==2024-02-10T11:07:25Z
+deb.debian.org_debian_dists_bookworm-updates==2024-04-04T14:12:26Z
 deb.nodesource.com_node%5f14.x_dists_bookworm==2023-02-17T00:35:29Z
 deb.nodesource.com_node%5f14.x_dists_bullseye==2023-02-17T00:35:28Z
 deb.nodesource.com_node%5f14.x_dists_buster==2023-02-17T00:35:28Z
-debian==20240123T000238Z
-debian-security==20240123T000351Z
-download.docker.com_linux_debian_dists_bookworm==2024-01-19T10:37:46Z
-download.docker.com_linux_debian_dists_bullseye==2024-01-19T10:37:46Z
-download.docker.com_linux_debian_dists_buster==2024-01-19T10:37:46Z
-packages.trafficmanager.net_snapshot_debian-security_20240123T000351Z_dists_bookworm-security==2024-01-22T18:13:05Z
-packages.trafficmanager.net_snapshot_debian-security_20240123T000351Z_dists_bullseye-security==2024-01-22T18:13:06Z
-packages.trafficmanager.net_snapshot_debian-security_20240123T000351Z_dists_buster_updates==2024-01-22T18:13:05Z
-packages.trafficmanager.net_snapshot_debian_20240123T000238Z_dists_bookworm==2023-12-10T17:43:24Z
-packages.trafficmanager.net_snapshot_debian_20240123T000238Z_dists_bookworm-backports==2024-01-22T20:16:33Z
-packages.trafficmanager.net_snapshot_debian_20240123T000238Z_dists_bookworm-updates==2024-01-22T20:16:33Z
-packages.trafficmanager.net_snapshot_debian_20240123T000238Z_dists_bullseye==2023-10-07T11:07:16Z
-packages.trafficmanager.net_snapshot_debian_20240123T000238Z_dists_bullseye-backports==2024-01-22T20:16:33Z
-packages.trafficmanager.net_snapshot_debian_20240123T000238Z_dists_bullseye-updates==2024-01-22T20:16:33Z
-packages.trafficmanager.net_snapshot_debian_20240123T000238Z_dists_buster==2023-06-10T08:53:33Z
-packages.trafficmanager.net_snapshot_debian_20240123T000238Z_dists_buster-backports==2024-01-22T20:16:33Z
-packages.trafficmanager.net_snapshot_debian_20240123T000238Z_dists_buster-updates==2023-06-10T08:55:10Z
+debian==20240404T000223Z
+debian-security==20240404T000228Z
+download.docker.com_linux_debian_dists_bookworm==2024-03-22T10:38:47Z
+download.docker.com_linux_debian_dists_bullseye==2024-03-22T10:38:47Z
+download.docker.com_linux_debian_dists_buster==2024-03-20T18:01:13Z
+packages.trafficmanager.net_snapshot_debian-security_20240404T000228Z_dists_bookworm-security==2024-04-03T19:14:43Z
+packages.trafficmanager.net_snapshot_debian-security_20240404T000228Z_dists_bullseye-security==2024-04-03T19:14:43Z
+packages.trafficmanager.net_snapshot_debian-security_20240404T000228Z_dists_buster_updates==2024-04-03T19:14:43Z
+packages.trafficmanager.net_snapshot_debian_20240404T000223Z_dists_bookworm==2024-02-10T11:07:25Z
+packages.trafficmanager.net_snapshot_debian_20240404T000223Z_dists_bookworm-backports==2024-04-03T20:13:52Z
+packages.trafficmanager.net_snapshot_debian_20240404T000223Z_dists_bookworm-updates==2024-04-03T20:13:52Z
+packages.trafficmanager.net_snapshot_debian_20240404T000223Z_dists_bullseye==2024-02-10T12:40:37Z
+packages.trafficmanager.net_snapshot_debian_20240404T000223Z_dists_bullseye-backports==2024-04-03T20:13:52Z
+packages.trafficmanager.net_snapshot_debian_20240404T000223Z_dists_bullseye-updates==2024-04-03T20:13:53Z
+packages.trafficmanager.net_snapshot_debian_20240404T000223Z_dists_buster==2023-06-10T08:53:33Z
+packages.trafficmanager.net_snapshot_debian_20240404T000223Z_dists_buster-backports==2024-03-09T20:54:54Z
+packages.trafficmanager.net_snapshot_debian_20240404T000223Z_dists_buster-updates==2023-06-10T08:55:10Z
diff --git a/files/build/versions/default/versions-web b/files/build/versions/default/versions-web
index be448a72a..67cf4cd99 100644
--- a/files/build/versions/default/versions-web
+++ b/files/build/versions/default/versions-web
@@ -6,28 +6,36 @@ http://deb.debian.org/debian/pool/main/i/iproute2/iproute2_5.10.0.orig.tar.xz==f
 http://deb.debian.org/debian/pool/main/i/iptables/iptables_1.8.7-1.debian.tar.xz==bacfd4f463240af61c4a50298e5f7560
 http://deb.debian.org/debian/pool/main/i/iptables/iptables_1.8.7-1.dsc==c7b1880f0d2e7a9306007969f3b541ee
 http://deb.debian.org/debian/pool/main/i/iptables/iptables_1.8.7.orig.tar.bz2==602ba7e937c72fbb7b1c2b71c3b0004b
-http://deb.debian.org/debian/pool/main/i/isc-dhcp/isc-dhcp_4.4.1-2.3+deb11u2.debian.tar.xz==126081bf0da3c1e5ca722edeb5a3aed1
-http://deb.debian.org/debian/pool/main/i/isc-dhcp/isc-dhcp_4.4.1-2.3+deb11u2.dsc==c35e75da314bce54f53b2e0847c6bc9b
-http://deb.debian.org/debian/pool/main/i/isc-dhcp/isc-dhcp_4.4.1.orig.tar.gz==dbcba5108f659278200218ac0847ce3f
+http://deb.debian.org/debian/pool/main/i/isc-dhcp/isc-dhcp_4.4.3-P1-2.debian.tar.xz==64fbb939e9c93d14e5a9040b45e5b459
+http://deb.debian.org/debian/pool/main/i/isc-dhcp/isc-dhcp_4.4.3-P1-2.dsc==9f39c78ebbf7d66194de179dc12de49e
+http://deb.debian.org/debian/pool/main/i/isc-dhcp/isc-dhcp_4.4.3-P1.orig.tar.gz==36c6ca77212373b0cff478ae9e5d32af
+http://deb.debian.org/debian/pool/main/i/isc-dhcp/isc-dhcp_4.4.3-P1.orig.tar.gz.asc==6db320501d5766198bc2da9515c62bbb
 http://deb.debian.org/debian/pool/main/l/lm-sensors/lm-sensors_3.6.0-7.debian.tar.xz==8eab143a53c71c03695ebc78e4b5ed36
 http://deb.debian.org/debian/pool/main/l/lm-sensors/lm-sensors_3.6.0-7.dsc==983d68fb43001bb2fc94862bc4bc2e2b
 http://deb.debian.org/debian/pool/main/l/lm-sensors/lm-sensors_3.6.0.orig.tar.gz==f60e47b5eb50bbeed48a9f43bb08dd5e
 http://deb.debian.org/debian/pool/main/p/protobuf/protobuf_3.21.12-3.debian.tar.xz==f457e44218a7d4cc7b7ab0ed696096e3
 http://deb.debian.org/debian/pool/main/p/protobuf/protobuf_3.21.12-3.dsc==d8e34e7b07473c6903f9d245934524fb
 http://deb.debian.org/debian/pool/main/p/protobuf/protobuf_3.21.12.orig.tar.gz==d38562490234d8080bdbe8eb7baf937a
-http://ftp.us.debian.org/debian/pool/main/s/scapy/python-scapy_2.4.0-2_all.deb==d87d7b22de51937b1e706e4751b86251
-http://www.mellanox.com/downloads/MFT/mft-4.25.0-62-x86_64-deb.tgz==658a7f7170f6798c98ef8b8045c70f0d
+http://ftp.us.debian.org/debian/pool/main/s/scapy/python3-scapy_2.4.0-2_all.deb==b8717ca83b3b60da54bc3f72018964a7
+http://www.iana.org/assignments/enterprise-numbers.txt==6337b3342894343f8d43f229c5bca8c1
+http://www.mellanox.com/downloads/MFT/mft-4.27.0-83-x86_64-deb.tgz==e475ca87a9252ba8d0abb6b05d5d94d0
 https://archive.apache.org/dist/thrift/0.14.1/thrift-0.14.1.tar.gz==c64434548438df2cb1e53fb27c600e85
 https://bootstrap.pypa.io/pip/2.7/get-pip.py==60e8267eb1b7bc71dc4843eb7bd294d3
+https://deb.debian.org/debian/pool/main/i/ipmitool/ipmitool_1.8.19-4.debian.tar.xz==aee97d7c05ca32815652bf899a029f9d
+https://deb.debian.org/debian/pool/main/i/ipmitool/ipmitool_1.8.19-4.dsc==72f67264021488c0219de23b840d0336
+https://deb.debian.org/debian/pool/main/i/ipmitool/ipmitool_1.8.19.orig.tar.gz==0aa41c99d93ce129cf00a9b8803ed8c9
 https://deb.debian.org/debian/pool/main/k/kdump-tools/kdump-tools_1.8.1.dsc==cf20d7dc926e6efb6946622f25728074
 https://deb.debian.org/debian/pool/main/k/kdump-tools/kdump-tools_1.8.1.tar.xz==bf690b241ae1ef3ac9226ba40995575a
+https://deb.debian.org/debian/pool/main/libt/libteam/libteam_1.31-1.debian.tar.xz==26fef506b62eb28e3356781a707c2440
+https://deb.debian.org/debian/pool/main/libt/libteam/libteam_1.31-1.dsc==f27b8eee722b8595ab45344e4bd3cbe7
+https://deb.debian.org/debian/pool/main/libt/libteam/libteam_1.31.orig.tar.xz==eec2e9c38e9a4c2cdb7e4954d110a118
 https://deb.nodesource.com/gpgkey/nodesource.gpg.key==003b51a89a133b5db4cca98b2dea3117
 https://deb.nodesource.com/node_14.x/dists/bookworm/Release==249bac8daff55b81a1b40c2c283e317d
 https://deb.nodesource.com/node_14.x/dists/bullseye/Release==6b7d50c433d129d4c6fd95bdf56070fa
 https://deb.nodesource.com/node_14.x/dists/buster/Release==42875141604382f0abb4d047f645dfe1
 https://deb.nodesource.com/setup_14.x==c30873f4a513bb935afaf8f65e7de9e1
 https://download.docker.com/linux/debian/gpg==1afae06b34a13c1b3d9cb61a26285a15
-https://github.com/aristanetworks/sonic-firmware/raw/446f30ccd8626f904d89d5798da7294948e090a6/phy/phy-credo_1.0_amd64.deb==6c3d6c32477615cbe049b9161ce15bd5
+https://github.com/aristanetworks/sonic-firmware/raw/9e34da2a2d2d1e7e972cda3064b7b73c0558b322/phy/phy-credo_1.0_amd64.deb==a9c38d11ae4e34ca728d9b3b92fd89af
 https://github.com/bazelbuild/bazelisk/releases/latest/download/bazelisk-linux-amd64==44124b7ea28b7ffc38cb7a6b770b7844
 https://github.com/bazelbuild/bazelisk/releases/latest/download/bazelisk-linux-arm64==13442c16ab9043c7f351f74001c565ac
 https://github.com/CentecNetworks/sonic-binaries/raw/master/amd64/sai/libsaictc-dev_1.13.0-1_amd64.deb==b2e4b33541d4ab5de4c1b8eb4a783761
@@ -39,39 +47,39 @@ https://github.com/CentecNetworks/sonic-binaries/raw/master/arm64/sai/libsaictc_
 https://github.com/CumulusNetworks/ifupdown2/archive/3.0.0-1.tar.gz==755459b3a58fbc11625336846cea7420
 https://github.com/Marvell-switching/sonic-marvell-binaries/raw/master/arm64/sai-plugin/mrvllibsai_1.12.0-2_arm64.deb==60c59c062572deac78c25b8c52bcb76f
 https://github.com/Marvell-switching/sonic-marvell-binaries/raw/master/armhf/sai-plugin/mrvllibsai_1.13.0-1_armhf.deb==264acf1919d544ed64e53f0af2215a6b
-https://github.com/Mellanox/Spectrum-SDK-Drivers-SONiC-Bins/releases/download/fw-2012.2134/fw-SPC-rel-13_2012_2134-EVB.mfa==a50d2bcc1d3e742e583d592288594444
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diff --git a/files/build/versions/dockers/docker-base-bookworm/versions-deb-bookworm b/files/build/versions/dockers/docker-base-bookworm/versions-deb-bookworm
new file mode 100644
index 000000000..6001510d7
--- /dev/null
+++ b/files/build/versions/dockers/docker-base-bookworm/versions-deb-bookworm
@@ -0,0 +1,80 @@
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+curl==7.88.1-10+deb12u5
+iproute2==6.1.0-3
+jq==1.6-2.1
+less==590-2
+libatomic1==12.2.0-14
+libbpf1==1:1.1.0-1
+libbrotli1==1.0.9-2+b6
+libbsd0==0.11.7-2
+libc-bin==2.36-9+deb12u4
+libc6==2.36-9+deb12u4
+libcap2-bin==1:2.66-4
+libcurl4==7.88.1-10+deb12u5
+libdaemon0==0.14-7.1
+libdbus-1-3==1.14.10-1~deb12u1
+libelf1==0.188-2.1
+libestr0==0.1.11-1
+libexpat1==2.5.0-1
+libfastjson4==1.2304.0-1
+libgdbm-compat4==1.23-3
+libgdbm6==1.23-3
+libgssapi-krb5-2==1.20.1-2+deb12u1
+libjansson4==2.14-2
+libjemalloc2==5.3.0-1
+libjq1==1.6-2.1
+libk5crypto3==1.20.1-2+deb12u1
+libkeyutils1==1.6.3-2
+libkrb5-3==1.20.1-2+deb12u1
+libkrb5support0==1.20.1-2+deb12u1
+libldap-2.5-0==2.5.13+dfsg-5
+liblognorm5==2.0.6-4
+liblzf1==3.6-3
+libmnl0==1.0.4-3
+libncursesw6==6.4-4
+libnghttp2-14==1.52.0-1+deb12u1
+libnorm1==1.5.9+dfsg-2
+libnsl2==1.3.0-2
+libonig5==6.9.8-1
+libperl5.36==5.36.0-7+deb12u1
+libpgm-5.3-0==5.3.128~dfsg-2
+libproc2-0==2:4.0.2-3
+libpsl5==0.21.2-1
+libpython3-stdlib==3.11.2-1+b1
+libpython3.11-minimal==3.11.2-6
+libpython3.11-stdlib==3.11.2-6
+libreadline8==8.2-1.3
+librtmp1==2.4+20151223.gitfa8646d.1-2+b2
+libsasl2-2==2.1.28+dfsg-10
+libsasl2-modules-db==2.1.28+dfsg-10
+libsodium23==1.0.18-1
+libsqlite3-0==3.40.1-2
+libssh2-1==1.10.0-3+b1
+libssl3==3.0.11-1~deb12u2
+libtirpc-common==1.3.3+ds-1
+libtirpc3==1.3.3+ds-1
+libwrap0==7.6.q-32
+libxtables12==1.8.9-2
+libzmq5==4.3.4-6
+media-types==10.0.0
+net-tools==2.10-0.1
+openssl==3.0.11-1~deb12u2
+perl==5.36.0-7+deb12u1
+perl-modules-5.36==5.36.0-7+deb12u1
+procps==2:4.0.2-3
+python-is-python3==3.11.1-3
+python3==3.11.2-1+b1
+python3-distutils==3.11.2-3
+python3-lib2to3==3.11.2-3
+python3-minimal==3.11.2-1+b1
+python3-pkg-resources==66.1.1-1
+python3-setuptools==66.1.1-1
+python3-wheel==0.38.4-2
+python3.11==3.11.2-6
+python3.11-minimal==3.11.2-6
+readline-common==8.2-1.3
+redis-tools==5:7.0.15-1~deb12u1
+rsyslog==8.2302.0-1
+socat==1.7.4.1-3
+vim-common==2:9.0.1378-2
+vim-tiny==2:9.0.1378-2
diff --git a/files/build/versions/dockers/docker-base-bookworm/versions-py3 b/files/build/versions/dockers/docker-base-bookworm/versions-py3
new file mode 100644
index 000000000..0ef39410f
--- /dev/null
+++ b/files/build/versions/dockers/docker-base-bookworm/versions-py3
@@ -0,0 +1,13 @@
+async-timeout==4.0.3
+j2cli==0.3.10
+jinja2==3.1.3
+markupsafe==2.1.5
+pip==24.0
+python-lzf==0.2.4
+rdbtools==0.1.15
+redis==5.0.3
+setuptools==66.1.1
+supervisor==4.2.5
+supervisord-dependent-startup==1.4.0
+toposort==1.10
+wheel==0.38.4
diff --git a/files/build/versions/dockers/docker-base-bullseye/versions-deb-bullseye b/files/build/versions/dockers/docker-base-bullseye/versions-deb-bullseye
index 7ab5e0cfb..716540f65 100644
--- a/files/build/versions/dockers/docker-base-bullseye/versions-deb-bullseye
+++ b/files/build/versions/dockers/docker-base-bullseye/versions-deb-bullseye
@@ -21,7 +21,7 @@ libgdbm6==1.19-2
 libjansson4==2.13.1-1.1
 libjemalloc2==5.2.1-3
 libjq1==1.6-2.1
-libk5crypto3==1.18.3-6+deb11u1+fips
+libk5crypto3==1.18.3-6+deb11u4+fips
 libldap-2.4-2==2.4.57+dfsg-3+deb11u1
 liblognorm5==2.0.5-1.1
 liblua5.1-0==5.1.5-8.1+b3
@@ -34,7 +34,7 @@ libncursesw6==6.2+20201114-2+deb11u2
 libnghttp2-14==1.43.0-1+deb11u1
 libnorm1==1.5.9+dfsg-2
 libonig5==6.9.6-1.1
-libperl5.32==5.32.1-4+deb11u2
+libperl5.32==5.32.1-4+deb11u3
 libpgm-5.3-0==5.3.128~dfsg-2
 libprocps8==2:3.3.17-5
 libpsl5==0.21.0-1.2
@@ -52,14 +52,14 @@ libssl-dev==1.1.1n-0+deb11u5+fips
 libssl1.1==1.1.1n-0+deb11u5+fips
 libwrap0==7.6.q-31
 libxtables12==1.8.7-1
-libzmq5==4.3.4-1
+libzmq5==4.3.4-1+deb11u1
 lua-bitop==1.0.2-5
 lua-cjson==2.1.0+dfsg-2.1
 media-types==4.0.0
 net-tools==1.60+git20181103.0eebece-1
 openssl==1.1.1n-0+deb11u5+fips
-perl==5.32.1-4+deb11u2
-perl-modules-5.32==5.32.1-4+deb11u2
+perl==5.32.1-4+deb11u3
+perl-modules-5.32==5.32.1-4+deb11u3
 procps==2:3.3.17-5
 python-is-python3==3.9.2-1
 python3==3.9.2-3
diff --git a/files/build/versions/dockers/docker-base-bullseye/versions-py3 b/files/build/versions/dockers/docker-base-bullseye/versions-py3
index 5145466a0..78376cb17 100644
--- a/files/build/versions/dockers/docker-base-bullseye/versions-py3
+++ b/files/build/versions/dockers/docker-base-bullseye/versions-py3
@@ -1,11 +1,11 @@
 async-timeout==4.0.3
 j2cli==0.3.10
 jinja2==3.1.3
-markupsafe==2.1.4
-pip==23.3.2
+markupsafe==2.1.5
+pip==24.0
 python-lzf==0.2.4
 rdbtools==0.1.15
-redis==5.0.1
+redis==5.0.3
 setuptools==49.6.0
 supervisor==4.2.1
 supervisord-dependent-startup==1.4.0
diff --git a/files/build/versions/dockers/docker-base-buster/versions-deb-buster b/files/build/versions/dockers/docker-base-buster/versions-deb-buster
index ab4875803..7ecdb0a85 100644
--- a/files/build/versions/dockers/docker-base-buster/versions-deb-buster
+++ b/files/build/versions/dockers/docker-base-buster/versions-deb-buster
@@ -1,9 +1,9 @@
 ca-certificates==20200601~deb10u2
-curl==7.64.0-4+deb10u8
+curl==7.64.0-4+deb10u9
 jq==1.5+dfsg-2+b1
 less==487-0.1+b1
 libatomic1==8.3.0-6
-libcurl4==7.64.0-4+deb10u8
+libcurl4==7.64.0-4+deb10u9
 libdaemon0==0.14-7
 libdbus-1-3==1.12.28-0+deb10u1
 libestr0==0.1.10-2.1
@@ -33,8 +33,8 @@ libpgm-5.2-0==5.2.122~dfsg-3
 libprocps7==2:3.3.15-2
 libpsl5==0.20.2-2
 libpython3-stdlib==3.7.3-1
-libpython3.7-minimal==3.7.3-2+deb10u6
-libpython3.7-stdlib==3.7.3-2+deb10u6
+libpython3.7-minimal==3.7.3-2+deb10u7
+libpython3.7-stdlib==3.7.3-2+deb10u7
 libreadline7==7.0-5
 librtmp1==2.4+20151223.gitfa8646d.1-2
 libsasl2-2==2.1.27+dfsg-1+deb10u2
@@ -58,8 +58,8 @@ python3==3.7.3-1
 python3-distutils==3.7.3-1
 python3-lib2to3==3.7.3-1
 python3-minimal==3.7.3-1
-python3.7==3.7.3-2+deb10u6
-python3.7-minimal==3.7.3-2+deb10u6
+python3.7==3.7.3-2+deb10u7
+python3.7-minimal==3.7.3-2+deb10u7
 readline-common==7.0-5
 redis-tools==5:6.0.6-1~bpo10+1
 rsyslog==8.1901.0-1+deb10u2
diff --git a/files/build/versions/dockers/docker-base-buster/versions-py3 b/files/build/versions/dockers/docker-base-buster/versions-py3
index 09ce5c537..927a1686e 100644
--- a/files/build/versions/dockers/docker-base-buster/versions-py3
+++ b/files/build/versions/dockers/docker-base-buster/versions-py3
@@ -1,7 +1,7 @@
 j2cli==0.3.10
 jinja2==3.1.3
-markupsafe==2.1.4
-pip==23.3.2
+markupsafe==2.1.5
+pip==24.0
 setuptools==49.6.0
 supervisor==4.2.1
 supervisord-dependent-startup==1.4.0
diff --git a/files/build/versions/dockers/docker-config-engine-bookworm/versions-deb-bookworm b/files/build/versions/dockers/docker-config-engine-bookworm/versions-deb-bookworm
new file mode 100644
index 000000000..dd20b082d
--- /dev/null
+++ b/files/build/versions/dockers/docker-config-engine-bookworm/versions-deb-bookworm
@@ -0,0 +1,37 @@
+apt-utils==2.6.1
+binutils-common==2.40-2
+dpkg-dev==1.21.22
+icu-devtools==72.1-3
+libboost-serialization1.74.0==1.74.0+ds1-21
+libc-dev-bin==2.36-9+deb12u4
+libc6-dev==2.36-9+deb12u4
+libcrypt-dev==1:4.4.33-2
+libhiredis0.14==0.14.1-3
+libicu-dev==72.1-3
+libicu72==72.1-3
+libjs-jquery==3.6.1+dfsg+~3.5.14-1
+libnl-3-200==3.5.0-1
+libnl-cli-3-200==3.5.0-1
+libnl-genl-3-200==3.5.0-1
+libnl-nf-3-200==3.5.0-1
+libnl-route-3-200==3.5.0-1
+libnsl-dev==1.3.0-2
+libpcre3==2:8.39-15
+libpython3.11==3.11.2-6
+libswsscommon==1.0.0
+libtirpc-dev==1.3.3+ds-1
+libxml2==2.9.14+dfsg-1.3~deb12u1
+libxml2-dev==2.9.14+dfsg-1.3~deb12u1
+libxslt1-dev==1.1.35-1
+libxslt1.1==1.1.35-1
+libyaml-0-2==0.2.5-1
+libyang==1.0.73
+libyang-cpp==1.0.73
+linux-libc-dev==6.1.76-1
+python3-swsscommon==1.0.0
+python3-yaml==6.0-3+b2
+python3-yang==1.0.73
+rpcsvc-proto==1.4.3-1
+sonic-db-cli==1.0.0
+sonic-eventd==1.0.0-0
+zlib1g-dev==1:1.2.13.dfsg-1
diff --git a/files/build/versions/dockers/docker-config-engine-bookworm/versions-mirror b/files/build/versions/dockers/docker-config-engine-bookworm/versions-mirror
new file mode 100644
index 000000000..8d5ca2a61
--- /dev/null
+++ b/files/build/versions/dockers/docker-config-engine-bookworm/versions-mirror
@@ -0,0 +1,2 @@
+deb.debian.org_debian-security_dists_bookworm-security==2024-04-04T18:53:21Z
+deb.debian.org_debian_dists_bookworm-updates==2024-04-04T20:12:41Z
diff --git a/files/build/versions/dockers/docker-config-engine-bookworm/versions-py3 b/files/build/versions/dockers/docker-config-engine-bookworm/versions-py3
new file mode 100644
index 000000000..cf2c53992
--- /dev/null
+++ b/files/build/versions/dockers/docker-config-engine-bookworm/versions-py3
@@ -0,0 +1,16 @@
+bitarray==2.8.1
+ijson==3.2.3
+ipaddress==1.0.23
+jsondiff==2.0.0
+lxml==4.9.1
+natsort==6.2.1
+netaddr==0.8.0
+pyang==2.6.0
+pyangbind==0.8.2
+pyyaml==6.0.1
+redis==5.0.1
+redis-dump-load==1.1
+regex==2023.12.25
+six==1.16.0
+tabulate==0.9.0
+xmltodict==0.12.0
diff --git a/files/build/versions/dockers/docker-config-engine-bullseye/versions-deb-bullseye b/files/build/versions/dockers/docker-config-engine-bullseye/versions-deb-bullseye
index af8fc851e..0eb227fc7 100644
--- a/files/build/versions/dockers/docker-config-engine-bullseye/versions-deb-bullseye
+++ b/files/build/versions/dockers/docker-config-engine-bullseye/versions-deb-bullseye
@@ -2,8 +2,8 @@ apt-utils==2.2.4
 dpkg-dev==1.20.13
 icu-devtools==67.1-7
 libboost-serialization1.74.0==1.74.0-9
-libc-dev-bin==2.31-13+deb11u7
-libc6-dev==2.31-13+deb11u7
+libc-dev-bin==2.31-13+deb11u8
+libc6-dev==2.31-13+deb11u8
 libcrypt-dev==1:4.4.18-4
 libhiredis0.14==0.14.1-1
 libicu-dev==67.1-7
@@ -24,7 +24,7 @@ libxslt1-dev==1.1.34-4+deb11u1
 libxslt1.1==1.1.34-4+deb11u1
 libyang==1.0.73
 libyang-cpp==1.0.73
-linux-libc-dev==5.10.205-2
+linux-libc-dev==5.10.209-2
 python3-swsscommon==1.0.0
 python3-yang==1.0.73
 sonic-db-cli==1.0.0
diff --git a/files/build/versions/dockers/docker-config-engine-buster/versions-deb-buster b/files/build/versions/dockers/docker-config-engine-buster/versions-deb-buster
index 4709ef8e9..1801e2a26 100644
--- a/files/build/versions/dockers/docker-config-engine-buster/versions-deb-buster
+++ b/files/build/versions/dockers/docker-config-engine-buster/versions-deb-buster
@@ -16,7 +16,7 @@ libnl-cli-3-200==3.5.0-1
 libnl-genl-3-200==3.5.0-1
 libnl-nf-3-200==3.5.0-1
 libnl-route-3-200==3.5.0-1
-libpython3.7==3.7.3-2+deb10u6
+libpython3.7==3.7.3-2+deb10u7
 libswsscommon==1.0.0
 libxml2==2.9.4+dfsg1-7+deb10u6
 libxml2-dev==2.9.4+dfsg1-7+deb10u6
diff --git a/files/build/versions/dockers/docker-database/versions-deb-bookworm b/files/build/versions/dockers/docker-database/versions-deb-bookworm
new file mode 100644
index 000000000..dbb924121
--- /dev/null
+++ b/files/build/versions/dockers/docker-database/versions-deb-bookworm
@@ -0,0 +1,31 @@
+gdb==13.1-3
+gdbserver==13.1-3
+libbabeltrace1==1.5.11-1+b2
+libboost-regex1.74.0==1.74.0+ds1-21
+libcbor0.8==0.8.0-2+b1
+libcurl3-gnutls==7.88.1-10+deb12u5
+libdashapi==1.0.0
+libdebuginfod-common==0.188-2.1
+libdebuginfod1==0.188-2.1
+libdw1==0.188-2.1
+libedit2==3.1-20221030-2
+libfido2-1==1.12.0-2+b1
+libglib2.0-0==2.74.6-2
+libgpm2==1.20.7-10+b1
+libicu72==72.1-3
+libipt2==2.0.5-1
+libmpfr6==4.2.0-1
+libprotobuf-lite32==3.21.12-3
+libprotobuf32==3.21.12-3
+libsource-highlight-common==3.1.9-4.2
+libsource-highlight4v5==3.1.9-4.2+b3
+libswsscommon-dbgsym==1.0.0
+libunwind8==1.6.2-3
+openssh-client==1:9.2p1-2+deb12u2
+redis-server==5:7.0.15-1~deb12u1
+sensible-utils==0.0.17+nmu1
+sshpass==1.09-1+b1
+strace==6.1-0.1
+ucf==3.0043+nmu1
+vim==2:9.0.1378-2
+vim-runtime==2:9.0.1378-2
diff --git a/files/build/versions/dockers/docker-database/versions-deb-bullseye b/files/build/versions/dockers/docker-database/versions-deb-bullseye
deleted file mode 100644
index c5d9dce12..000000000
--- a/files/build/versions/dockers/docker-database/versions-deb-bullseye
+++ /dev/null
@@ -1,25 +0,0 @@
-gdb==10.1-1.7
-gdbserver==10.1-1.7
-libbabeltrace1==1.5.8-1+b3
-libboost-regex1.74.0==1.74.0-9
-libcbor0==0.5.0+dfsg-2
-libcurl3-gnutls==7.74.0-1.3+deb11u11
-libdebuginfod1==0.183-1
-libdw1==0.183-1
-libedit2==3.1-20191231-2+b1
-libfido2-1==1.6.0-2
-libglib2.0-0==2.66.8-1
-libgpm2==1.20.7-8
-libicu67==67.1-7
-libipt2==2.0.3-1
-libmpfr6==4.1.0-3
-libsource-highlight-common==3.1.9-3
-libsource-highlight4v5==3.1.9-3+b1
-libswsscommon-dbgsym==1.0.0
-libunwind8==1.3.2-2
-openssh-client==1:8.4p1-5+deb11u3
-redis-server==5:6.0.16-1+deb11u2
-sshpass==1.09-1+b1
-strace==5.10-1
-vim==2:8.2.2434-3+deb11u1
-vim-runtime==2:8.2.2434-3+deb11u1
diff --git a/files/build/versions/dockers/docker-database/versions-mirror b/files/build/versions/dockers/docker-database/versions-mirror
new file mode 100644
index 000000000..8d5ca2a61
--- /dev/null
+++ b/files/build/versions/dockers/docker-database/versions-mirror
@@ -0,0 +1,2 @@
+deb.debian.org_debian-security_dists_bookworm-security==2024-04-04T18:53:21Z
+deb.debian.org_debian_dists_bookworm-updates==2024-04-04T20:12:41Z
diff --git a/files/build/versions/dockers/docker-database/versions-py3 b/files/build/versions/dockers/docker-database/versions-py3
new file mode 100644
index 000000000..2f72dd5e1
--- /dev/null
+++ b/files/build/versions/dockers/docker-database/versions-py3
@@ -0,0 +1 @@
+click==8.1.7
diff --git a/files/build/versions/dockers/docker-dhcp-relay/versions-deb-bookworm b/files/build/versions/dockers/docker-dhcp-relay/versions-deb-bookworm
new file mode 100644
index 000000000..acd363bff
--- /dev/null
+++ b/files/build/versions/dockers/docker-dhcp-relay/versions-deb-bookworm
@@ -0,0 +1,40 @@
+gdb==13.1-3
+gdbserver==13.1-3
+isc-dhcp-relay==4.4.3-P1-2
+isc-dhcp-relay-dbgsym==4.4.3-P1-2
+libbabeltrace1==1.5.11-1+b2
+libboost-regex1.74.0==1.74.0+ds1-21
+libcbor0.8==0.8.0-2+b1
+libcurl3-gnutls==7.88.1-10+deb12u5
+libdebuginfod-common==0.188-2.1
+libdebuginfod1==0.188-2.1
+libdw1==0.188-2.1
+libedit2==3.1-20221030-2
+libevent-2.1-7==2.1.12-stable-8
+libexplain51==1.4.D001-12+b1
+libfido2-1==1.12.0-2+b1
+libglib2.0-0==2.74.6-2
+libgpm2==1.20.7-10+b1
+libicu72==72.1-3
+libipt2==2.0.5-1
+libjsoncpp-dev==1.9.5-4
+libjsoncpp25==1.9.5-4
+liblua5.1-0==5.1.5-9
+libmpfr6==4.2.0-1
+libsource-highlight-common==3.1.9-4.2
+libsource-highlight4v5==3.1.9-4.2+b3
+libswsscommon-dbgsym==1.0.0
+libunwind8==1.6.2-3
+lsof==4.95.0-1
+openssh-client==1:9.2p1-2+deb12u2
+sensible-utils==0.0.17+nmu1
+sonic-dhcp6relay==1.0.0-0
+sonic-dhcp6relay-dbgsym==1.0.0-0
+sonic-dhcpmon==1.0.0-0
+sonic-dhcpmon-dbgsym==1.0.0-0
+sonic-rsyslog-plugin==1.0.0-0
+sshpass==1.09-1+b1
+strace==6.1-0.1
+ucf==3.0043+nmu1
+vim==2:9.0.1378-2
+vim-runtime==2:9.0.1378-2
diff --git a/files/build/versions/dockers/docker-dhcp-relay/versions-deb-bullseye b/files/build/versions/dockers/docker-dhcp-relay/versions-deb-bullseye
deleted file mode 100644
index 5e65ac7c3..000000000
--- a/files/build/versions/dockers/docker-dhcp-relay/versions-deb-bullseye
+++ /dev/null
@@ -1,40 +0,0 @@
-gdb==10.1-1.7
-gdbserver==10.1-1.7
-isc-dhcp-relay==4.4.1-2.3+deb11u2
-isc-dhcp-relay-dbgsym==4.4.1-2.3+deb11u2
-libbabeltrace1==1.5.8-1+b3
-libboost-regex1.74.0==1.74.0-9
-libcbor0==0.5.0+dfsg-2
-libcurl3-gnutls==7.74.0-1.3+deb11u11
-libdebuginfod1==0.183-1
-libdns-export1110==1:9.11.19+dfsg-2.1
-libdw1==0.183-1
-libedit2==3.1-20191231-2+b1
-libevent-2.1-7==2.1.12-stable-1
-libexplain51==1.4.D001-11+deb11u1
-libfido2-1==1.6.0-2
-libglib2.0-0==2.66.8-1
-libgpm2==1.20.7-8
-libicu67==67.1-7
-libipt2==2.0.3-1
-libirs-export161==1:9.11.19+dfsg-2.1
-libisc-export1105==1:9.11.19+dfsg-2.1
-libisccfg-export163==1:9.11.19+dfsg-2.1
-libjsoncpp-dev==1.9.4-4
-libjsoncpp24==1.9.4-4
-libmpfr6==4.1.0-3
-libsource-highlight-common==3.1.9-3
-libsource-highlight4v5==3.1.9-3+b1
-libswsscommon-dbgsym==1.0.0
-libunwind8==1.3.2-2
-lsof==4.93.2+dfsg-1.1
-openssh-client==1:8.4p1-5+deb11u3
-sonic-dhcp6relay==1.0.0-0
-sonic-dhcp6relay-dbgsym==1.0.0-0
-sonic-dhcpmon==1.0.0-0
-sonic-dhcpmon-dbgsym==1.0.0-0
-sonic-rsyslog-plugin==1.0.0-0
-sshpass==1.09-1+b1
-strace==5.10-1
-vim==2:8.2.2434-3+deb11u1
-vim-runtime==2:8.2.2434-3+deb11u1
diff --git a/files/build/versions/dockers/docker-dhcp-relay/versions-mirror b/files/build/versions/dockers/docker-dhcp-relay/versions-mirror
new file mode 100644
index 000000000..8d5ca2a61
--- /dev/null
+++ b/files/build/versions/dockers/docker-dhcp-relay/versions-mirror
@@ -0,0 +1,2 @@
+deb.debian.org_debian-security_dists_bookworm-security==2024-04-04T18:53:21Z
+deb.debian.org_debian_dists_bookworm-updates==2024-04-04T20:12:41Z
diff --git a/files/build/versions/dockers/docker-dhcp-relay/versions-py3 b/files/build/versions/dockers/docker-dhcp-relay/versions-py3
index f26ca9b37..0ff1a8722 100644
--- a/files/build/versions/dockers/docker-dhcp-relay/versions-py3
+++ b/files/build/versions/dockers/docker-dhcp-relay/versions-py3
@@ -1,3 +1,3 @@
 freezegun==1.4.0
 psutil==5.9.8
-python-dateutil==2.8.2
+python-dateutil==2.9.0.post0
diff --git a/files/build/versions/dockers/docker-eventd/versions-deb-bullseye b/files/build/versions/dockers/docker-eventd/versions-deb-bullseye
index 10c7dbc37..eb7f7e9c5 100644
--- a/files/build/versions/dockers/docker-eventd/versions-deb-bullseye
+++ b/files/build/versions/dockers/docker-eventd/versions-deb-bullseye
@@ -8,7 +8,7 @@ libdebuginfod1==0.183-1
 libdw1==0.183-1
 libedit2==3.1-20191231-2+b1
 libfido2-1==1.6.0-2
-libglib2.0-0==2.66.8-1
+libglib2.0-0==2.66.8-1+deb11u1
 libgpm2==1.20.7-8
 libicu67==67.1-7
 libipt2==2.0.3-1
diff --git a/files/build/versions/dockers/docker-fpm-frr/versions-deb-bullseye b/files/build/versions/dockers/docker-fpm-frr/versions-deb-bullseye
index c122570ea..7d076b3f8 100644
--- a/files/build/versions/dockers/docker-fpm-frr/versions-deb-bullseye
+++ b/files/build/versions/dockers/docker-fpm-frr/versions-deb-bullseye
@@ -14,7 +14,7 @@ libdebuginfod1==0.183-1
 libdw1==0.183-1
 libedit2==3.1-20191231-2+b1
 libfido2-1==1.6.0-2
-libglib2.0-0==2.66.8-1
+libglib2.0-0==2.66.8-1+deb11u1
 libgpm2==1.20.7-8
 libicu67==67.1-7
 libipt2==2.0.3-1
diff --git a/files/build/versions/dockers/docker-gbsyncd-broncos/versions-deb-bullseye b/files/build/versions/dockers/docker-gbsyncd-broncos/versions-deb-bullseye
index 5dc6c1313..bf8acc56c 100644
--- a/files/build/versions/dockers/docker-gbsyncd-broncos/versions-deb-bullseye
+++ b/files/build/versions/dockers/docker-gbsyncd-broncos/versions-deb-bullseye
@@ -2,8 +2,8 @@ gdb==10.1-1.7
 gdbserver==10.1-1.7
 libbabeltrace1==1.5.8-1+b3
 libboost-regex1.74.0==1.74.0-9
-libc-dev-bin==2.31-13+deb11u7
-libc6-dev==2.31-13+deb11u7
+libc-dev-bin==2.31-13+deb11u8
+libc6-dev==2.31-13+deb11u8
 libcbor0==0.5.0+dfsg-2
 libcrypt-dev==1:4.4.18-4
 libcurl3-gnutls==7.74.0-1.3+deb11u11
@@ -11,7 +11,7 @@ libdebuginfod1==0.183-1
 libdw1==0.183-1
 libedit2==3.1-20191231-2+b1
 libfido2-1==1.6.0-2
-libglib2.0-0==2.66.8-1
+libglib2.0-0==2.66.8-1+deb11u1
 libgpm2==1.20.7-8
 libicu67==67.1-7
 libipt2==2.0.3-1
@@ -28,7 +28,7 @@ libsource-highlight4v5==3.1.9-3+b1
 libswsscommon-dbgsym==1.0.0
 libtirpc-dev==1.3.1-1+deb11u1
 libunwind8==1.3.2-2
-linux-libc-dev==5.10.205-2
+linux-libc-dev==5.10.209-2
 openssh-client==1:8.4p1-5+deb11u3
 sshpass==1.09-1+b1
 strace==5.10-1
diff --git a/files/build/versions/dockers/docker-gbsyncd-credo/versions-deb-bullseye b/files/build/versions/dockers/docker-gbsyncd-credo/versions-deb-bullseye
index b993d31f2..272f7dca3 100644
--- a/files/build/versions/dockers/docker-gbsyncd-credo/versions-deb-bullseye
+++ b/files/build/versions/dockers/docker-gbsyncd-credo/versions-deb-bullseye
@@ -8,7 +8,7 @@ libdebuginfod1==0.183-1
 libdw1==0.183-1
 libedit2==3.1-20191231-2+b1
 libfido2-1==1.6.0-2
-libglib2.0-0==2.66.8-1
+libglib2.0-0==2.66.8-1+deb11u1
 libgpm2==1.20.7-8
 libicu67==67.1-7
 libipt2==2.0.3-1
diff --git a/files/build/versions/dockers/docker-gbsyncd-vs/versions-deb-bullseye b/files/build/versions/dockers/docker-gbsyncd-vs/versions-deb-bullseye
index cdfa7d2de..c280c1bb8 100644
--- a/files/build/versions/dockers/docker-gbsyncd-vs/versions-deb-bullseye
+++ b/files/build/versions/dockers/docker-gbsyncd-vs/versions-deb-bullseye
@@ -8,7 +8,7 @@ libdebuginfod1==0.183-1
 libdw1==0.183-1
 libedit2==3.1-20191231-2+b1
 libfido2-1==1.6.0-2
-libglib2.0-0==2.66.8-1
+libglib2.0-0==2.66.8-1+deb11u1
 libgpm2==1.20.7-8
 libhiredis0.14-dbgsym==0.14.1-1
 libicu67==67.1-7
@@ -16,10 +16,13 @@ libipt2==2.0.3-1
 libmpfr6==4.1.0-3
 libsaimetadata==1.0.0
 libsaimetadata-dbg==1.0.0
+libsaimetadata-dbgsym==1.0.0
 libsairedis==1.0.0
 libsairedis-dbg==1.0.0
+libsairedis-dbgsym==1.0.0
 libsaivs==1.0.0
 libsaivs-dbg==1.0.0
+libsaivs-dbgsym==1.0.0
 libsource-highlight-common==3.1.9-3
 libsource-highlight4v5==3.1.9-3+b1
 libswsscommon-dbg==1.0.0
@@ -30,5 +33,6 @@ sshpass==1.09-1+b1
 strace==5.10-1
 syncd-vs==1.0.0
 syncd-vs-dbg==1.0.0
+syncd-vs-dbgsym==1.0.0
 vim==2:8.2.2434-3+deb11u1
 vim-runtime==2:8.2.2434-3+deb11u1
diff --git a/files/build/versions/dockers/docker-lldp/versions-deb-bullseye b/files/build/versions/dockers/docker-lldp/versions-deb-bullseye
index 5ef038468..2454215e4 100644
--- a/files/build/versions/dockers/docker-lldp/versions-deb-bullseye
+++ b/files/build/versions/dockers/docker-lldp/versions-deb-bullseye
@@ -9,7 +9,7 @@ libdw1==0.183-1
 libedit2==3.1-20191231-2+b1
 libevent-2.1-7==2.1.12-stable-1
 libfido2-1==1.6.0-2
-libglib2.0-0==2.66.8-1
+libglib2.0-0==2.66.8-1+deb11u1
 libgpm2==1.20.7-8
 libicu67==67.1-7
 libipt2==2.0.3-1
diff --git a/files/build/versions/dockers/docker-macsec/versions-deb-bookworm b/files/build/versions/dockers/docker-macsec/versions-deb-bookworm
new file mode 100644
index 000000000..24a19338a
--- /dev/null
+++ b/files/build/versions/dockers/docker-macsec/versions-deb-bookworm
@@ -0,0 +1,31 @@
+gdb==13.1-3
+gdbserver==13.1-3
+libbabeltrace1==1.5.11-1+b2
+libboost-regex1.74.0==1.74.0+ds1-21
+libcbor0.8==0.8.0-2+b1
+libcurl3-gnutls==7.88.1-10+deb12u5
+libdebuginfod-common==0.188-2.1
+libdebuginfod1==0.188-2.1
+libdw1==0.188-2.1
+libedit2==3.1-20221030-2
+libfido2-1==1.12.0-2+b1
+libglib2.0-0==2.74.6-2
+libgpm2==1.20.7-10+b1
+libicu72==72.1-3
+libipt2==2.0.5-1
+libmpfr6==4.2.0-1
+libpcsclite1==1.9.9-2
+libsource-highlight-common==3.1.9-4.2
+libsource-highlight4v5==3.1.9-4.2+b3
+libswsscommon-dbgsym==1.0.0
+libunwind8==1.6.2-3
+openssh-client==1:9.2p1-2+deb12u2
+sensible-utils==0.0.17+nmu1
+sshpass==1.09-1+b1
+strace==6.1-0.1
+swss-dbg==1.0.0
+ucf==3.0043+nmu1
+vim==2:9.0.1378-2
+vim-runtime==2:9.0.1378-2
+wpasupplicant==2:2.9.0-14
+wpasupplicant-dbgsym==2:2.9.0-14
diff --git a/files/build/versions/dockers/docker-macsec/versions-deb-bullseye b/files/build/versions/dockers/docker-macsec/versions-deb-bullseye
deleted file mode 100644
index a24cc64c4..000000000
--- a/files/build/versions/dockers/docker-macsec/versions-deb-bullseye
+++ /dev/null
@@ -1,37 +0,0 @@
-gdb==10.1-1.7
-gdbserver==10.1-1.7
-libbabeltrace1==1.5.8-1+b3
-libboost-regex1.74.0==1.74.0-9
-libcbor0==0.5.0+dfsg-2
-libcurl3-gnutls==7.74.0-1.3+deb11u11
-libdashapi==1.0.0
-libdebuginfod1==0.183-1
-libdw1==0.183-1
-libedit2==3.1-20191231-2+b1
-libfido2-1==1.6.0-2
-libglib2.0-0==2.66.8-1
-libgpm2==1.20.7-8
-libicu67==67.1-7
-libipt2==2.0.3-1
-libmpfr6==4.1.0-3
-libpcsclite1==1.9.1-1
-libprotobuf-lite32==3.21.12-3
-libprotobuf32==3.21.12-3
-libsaimetadata==1.0.0
-libsairedis==1.0.0
-libsource-highlight-common==3.1.9-3
-libsource-highlight4v5==3.1.9-3+b1
-libswsscommon-dbgsym==1.0.0
-libteam5==1.30-1
-libteamdctl0==1.30-1
-libunwind8==1.3.2-2
-openssh-client==1:8.4p1-5+deb11u3
-python3-protobuf==3.21.12-3
-sshpass==1.09-1+b1
-strace==5.10-1
-swss==1.0.0
-swss-dbg==1.0.0
-vim==2:8.2.2434-3+deb11u1
-vim-runtime==2:8.2.2434-3+deb11u1
-wpasupplicant==2:2.9.0-14
-wpasupplicant-dbgsym==2:2.9.0-14
diff --git a/files/build/versions/dockers/docker-macsec/versions-mirror b/files/build/versions/dockers/docker-macsec/versions-mirror
new file mode 100644
index 000000000..8d5ca2a61
--- /dev/null
+++ b/files/build/versions/dockers/docker-macsec/versions-mirror
@@ -0,0 +1,2 @@
+deb.debian.org_debian-security_dists_bookworm-security==2024-04-04T18:53:21Z
+deb.debian.org_debian_dists_bookworm-updates==2024-04-04T20:12:41Z
diff --git a/files/build/versions/dockers/docker-macsec/versions-py3 b/files/build/versions/dockers/docker-macsec/versions-py3
deleted file mode 100644
index 2f66c6818..000000000
--- a/files/build/versions/dockers/docker-macsec/versions-py3
+++ /dev/null
@@ -1 +0,0 @@
-protobuf==4.21.12
diff --git a/files/build/versions/dockers/docker-mux/versions-deb-bookworm b/files/build/versions/dockers/docker-mux/versions-deb-bookworm
new file mode 100644
index 000000000..e67021248
--- /dev/null
+++ b/files/build/versions/dockers/docker-mux/versions-deb-bookworm
@@ -0,0 +1,33 @@
+gdb==13.1-3
+gdbserver==13.1-3
+libbabeltrace1==1.5.11-1+b2
+libboost-filesystem1.74.0==1.74.0+ds1-21
+libboost-log1.74.0==1.74.0+ds1-21
+libboost-program-options1.74.0==1.74.0+ds1-21
+libboost-regex1.74.0==1.74.0+ds1-21
+libboost-thread1.74.0==1.74.0+ds1-21
+libcbor0.8==0.8.0-2+b1
+libcurl3-gnutls==7.88.1-10+deb12u5
+libdebuginfod-common==0.188-2.1
+libdebuginfod1==0.188-2.1
+libdw1==0.188-2.1
+libedit2==3.1-20221030-2
+libfido2-1==1.12.0-2+b1
+libglib2.0-0==2.74.6-2
+libgpm2==1.20.7-10+b1
+libicu72==72.1-3
+libipt2==2.0.5-1
+libmpfr6==4.2.0-1
+libsource-highlight-common==3.1.9-4.2
+libsource-highlight4v5==3.1.9-4.2+b3
+libswsscommon-dbgsym==1.0.0
+libunwind8==1.6.2-3
+openssh-client==1:9.2p1-2+deb12u2
+sensible-utils==0.0.17+nmu1
+sonic-linkmgrd==1.0.0-1
+sonic-linkmgrd-dbgsym==1.0.0-1
+sshpass==1.09-1+b1
+strace==6.1-0.1
+ucf==3.0043+nmu1
+vim==2:9.0.1378-2
+vim-runtime==2:9.0.1378-2
diff --git a/files/build/versions/dockers/docker-mux/versions-deb-bullseye b/files/build/versions/dockers/docker-mux/versions-deb-bullseye
deleted file mode 100644
index 04ef7009f..000000000
--- a/files/build/versions/dockers/docker-mux/versions-deb-bullseye
+++ /dev/null
@@ -1,30 +0,0 @@
-gdb==10.1-1.7
-gdbserver==10.1-1.7
-libbabeltrace1==1.5.8-1+b3
-libboost-filesystem1.74.0==1.74.0-9
-libboost-log1.74.0==1.74.0-9
-libboost-program-options1.74.0==1.74.0-9
-libboost-regex1.74.0==1.74.0-9
-libboost-thread1.74.0==1.74.0-9
-libcbor0==0.5.0+dfsg-2
-libcurl3-gnutls==7.74.0-1.3+deb11u11
-libdebuginfod1==0.183-1
-libdw1==0.183-1
-libedit2==3.1-20191231-2+b1
-libfido2-1==1.6.0-2
-libglib2.0-0==2.66.8-1
-libgpm2==1.20.7-8
-libicu67==67.1-7
-libipt2==2.0.3-1
-libmpfr6==4.1.0-3
-libsource-highlight-common==3.1.9-3
-libsource-highlight4v5==3.1.9-3+b1
-libswsscommon-dbgsym==1.0.0
-libunwind8==1.3.2-2
-openssh-client==1:8.4p1-5+deb11u3
-sonic-linkmgrd==1.0.0-1
-sonic-linkmgrd-dbgsym==1.0.0-1
-sshpass==1.09-1+b1
-strace==5.10-1
-vim==2:8.2.2434-3+deb11u1
-vim-runtime==2:8.2.2434-3+deb11u1
diff --git a/files/build/versions/dockers/docker-mux/versions-mirror b/files/build/versions/dockers/docker-mux/versions-mirror
new file mode 100644
index 000000000..8d5ca2a61
--- /dev/null
+++ b/files/build/versions/dockers/docker-mux/versions-mirror
@@ -0,0 +1,2 @@
+deb.debian.org_debian-security_dists_bookworm-security==2024-04-04T18:53:21Z
+deb.debian.org_debian_dists_bookworm-updates==2024-04-04T20:12:41Z
diff --git a/files/build/versions/dockers/docker-nat/versions-deb-bullseye b/files/build/versions/dockers/docker-nat/versions-deb-bullseye
index ae4e94d4f..fa4f16b3a 100644
--- a/files/build/versions/dockers/docker-nat/versions-deb-bullseye
+++ b/files/build/versions/dockers/docker-nat/versions-deb-bullseye
@@ -11,7 +11,7 @@ libdebuginfod1==0.183-1
 libdw1==0.183-1
 libedit2==3.1-20191231-2+b1
 libfido2-1==1.6.0-2
-libglib2.0-0==2.66.8-1
+libglib2.0-0==2.66.8-1+deb11u1
 libgpm2==1.20.7-8
 libicu67==67.1-7
 libip4tc2==1.8.7-1
diff --git a/files/build/versions/dockers/docker-orchagent/versions-deb-bookworm b/files/build/versions/dockers/docker-orchagent/versions-deb-bookworm
new file mode 100644
index 000000000..113b60aed
--- /dev/null
+++ b/files/build/versions/dockers/docker-orchagent/versions-deb-bookworm
@@ -0,0 +1,47 @@
+arping==2.23-1
+bridge-utils==1.7.1-1
+conntrack==1:1.4.7-1+b2
+gdb==13.1-3
+gdbserver==13.1-3
+ifupdown==0.8.41
+libbabeltrace1==1.5.11-1+b2
+libboost-regex1.74.0==1.74.0+ds1-21
+libcbor0.8==0.8.0-2+b1
+libcurl3-gnutls==7.88.1-10+deb12u5
+libdebuginfod-common==0.188-2.1
+libdebuginfod1==0.188-2.1
+libdw1==0.188-2.1
+libedit2==3.1-20221030-2
+libfido2-1==1.12.0-2+b1
+libglib2.0-0==2.74.6-2
+libgpm2==1.20.7-10+b1
+libicu72==72.1-3
+libipt2==2.0.5-1
+libkmod2==30+20221128-1
+liblua5.1-0==5.1.5-9
+libmpfr6==4.2.0-1
+libnet1==1.1.6+dfsg-3.2
+libnetfilter-conntrack3==1.0.9-3
+libnfnetlink0==1.0.2-2
+libpcap0.8==1.10.3-1
+libpci3==1:3.9.0-4
+libsairedis-dbgsym==1.0.0
+libsource-highlight-common==3.1.9-4.2
+libsource-highlight4v5==3.1.9-4.2+b3
+libswsscommon-dbgsym==1.0.0
+libunwind8==1.6.2-3
+ndisc6==1.0.5-1+b2
+ndppd==0.2.5-6
+openssh-client==1:9.2p1-2+deb12u2
+pci.ids==0.0~2023.04.11-1
+pciutils==1:3.9.0-4
+sensible-utils==0.0.17+nmu1
+sgml-base==1.31
+sonic-rsyslog-plugin==1.0.0-0
+sshpass==1.09-1+b1
+strace==6.1-0.1
+swss-dbg==1.0.0
+tcpdump==4.99.3-1
+ucf==3.0043+nmu1
+vim==2:9.0.1378-2
+vim-runtime==2:9.0.1378-2
diff --git a/files/build/versions/dockers/docker-orchagent/versions-deb-bullseye b/files/build/versions/dockers/docker-orchagent/versions-deb-bullseye
deleted file mode 100644
index fb351d232..000000000
--- a/files/build/versions/dockers/docker-orchagent/versions-deb-bullseye
+++ /dev/null
@@ -1,41 +0,0 @@
-arping==2.21-2
-bridge-utils==1.7-1
-conntrack==1:1.4.6-2
-gdb==10.1-1.7
-gdbserver==10.1-1.7
-ifupdown==0.8.36
-libbabeltrace1==1.5.8-1+b3
-libboost-regex1.74.0==1.74.0-9
-libcbor0==0.5.0+dfsg-2
-libcurl3-gnutls==7.74.0-1.3+deb11u11
-libdebuginfod1==0.183-1
-libdw1==0.183-1
-libedit2==3.1-20191231-2+b1
-libfido2-1==1.6.0-2
-libglib2.0-0==2.66.8-1
-libgpm2==1.20.7-8
-libicu67==67.1-7
-libipt2==2.0.3-1
-libkmod2==28-1
-libmpfr6==4.1.0-3
-libnet1==1.1.6+dfsg-3.1
-libnetfilter-conntrack3==1.0.8-3
-libnfnetlink0==1.0.1-3+b1
-libpcap0.8==1.10.0-2
-libpci3==1:3.7.0-5
-libsource-highlight-common==3.1.9-3
-libsource-highlight4v5==3.1.9-3+b1
-libswsscommon-dbgsym==1.0.0
-libunwind8==1.3.2-2
-ndisc6==1.0.4-2
-ndppd==0.2.5-6
-openssh-client==1:8.4p1-5+deb11u3
-pci.ids==0.0~2021.02.08-1
-pciutils==1:3.7.0-5
-sonic-rsyslog-plugin==1.0.0-0
-sshpass==1.09-1+b1
-strace==5.10-1
-swss-dbg==1.0.0
-tcpdump==4.99.0-2+deb11u1
-vim==2:8.2.2434-3+deb11u1
-vim-runtime==2:8.2.2434-3+deb11u1
diff --git a/files/build/versions/dockers/docker-orchagent/versions-mirror b/files/build/versions/dockers/docker-orchagent/versions-mirror
new file mode 100644
index 000000000..8d5ca2a61
--- /dev/null
+++ b/files/build/versions/dockers/docker-orchagent/versions-mirror
@@ -0,0 +1,2 @@
+deb.debian.org_debian-security_dists_bookworm-security==2024-04-04T18:53:21Z
+deb.debian.org_debian_dists_bookworm-updates==2024-04-04T20:12:41Z
diff --git a/files/build/versions/dockers/docker-platform-monitor/versions-deb-bullseye b/files/build/versions/dockers/docker-platform-monitor/versions-deb-bullseye
index eff86a1a1..5a6a51f8b 100644
--- a/files/build/versions/dockers/docker-platform-monitor/versions-deb-bullseye
+++ b/files/build/versions/dockers/docker-platform-monitor/versions-deb-bullseye
@@ -1,5 +1,5 @@
-applibs==1.mlnx.4.6.2134
-applibs-dev==1.mlnx.4.6.2134
+applibs==1.mlnx.4.6.2202
+applibs-dev==1.mlnx.4.6.2202
 dmidecode==3.3-2
 ethtool==1:5.9-1
 fancontrol==1:3.6.0-7
@@ -27,7 +27,7 @@ libfontconfig1==2.13.1-4.2
 libfreeipmi17==1.6.6-4+deb11u1
 libfreetype6==2.10.4+dfsg-1+deb11u1
 libfribidi0==1.0.8-2+deb11u1
-libglib2.0-0==2.66.8-1
+libglib2.0-0==2.66.8-1+deb11u1
 libgpm2==1.20.7-8
 libgraphite2-3==1.3.14-1
 libharfbuzz0b==2.7.4-1
@@ -69,7 +69,7 @@ openssh-client==1:8.4p1-5+deb11u3
 pci.ids==0.0~2021.02.08-1
 pciutils==1:3.7.0-5
 psmisc==23.4-2
-python-sdk-api==1.mlnx.4.6.2134
+python-sdk-api==1.mlnx.4.6.2202
 python3-attr==20.3.0-1
 python3-importlib-metadata==1.6.0-2
 python3-jsonschema==3.2.0-3
@@ -87,12 +87,12 @@ sensord-dbgsym==1:3.6.0-7
 smartmontools==7.2-1
 sshpass==1.09-1+b1
 strace==5.10-1
-sx-complib==1.mlnx.4.6.2134
-sx-complib-dev==1.mlnx.4.6.2134
-sx-gen-utils==1.mlnx.4.6.2134
-sx-gen-utils-dev==1.mlnx.4.6.2134
-sxd-libs==1.mlnx.4.6.2134
-sxd-libs-dev==1.mlnx.4.6.2134
+sx-complib==1.mlnx.4.6.2202
+sx-complib-dev==1.mlnx.4.6.2202
+sx-gen-utils==1.mlnx.4.6.2202
+sx-gen-utils-dev==1.mlnx.4.6.2202
+sxd-libs==1.mlnx.4.6.2202
+sxd-libs-dev==1.mlnx.4.6.2202
 ucf==3.0043
 udev==247.3-7+deb11u4
 vim==2:8.2.2434-3+deb11u1
diff --git a/files/build/versions/dockers/docker-platform-monitor/versions-py3 b/files/build/versions/dockers/docker-platform-monitor/versions-py3
index 2c02139a0..2c8725dc1 100644
--- a/files/build/versions/dockers/docker-platform-monitor/versions-py3
+++ b/files/build/versions/dockers/docker-platform-monitor/versions-py3
@@ -1,5 +1,5 @@
 attrs==20.3.0
-certifi==2023.11.17
+certifi==2024.2.2
 charset-normalizer==3.3.2
 grpcio==1.39.0
 grpcio-tools==1.39.0
@@ -12,8 +12,8 @@ more-itertools==4.2.0
 netifaces==0.11.0
 protobuf==3.20.3
 pyrsistent==0.15.5
-python_sdk_api==4.6.2134
+python_sdk_api==4.6.2202
 requests==2.31.0
 thrift==0.13.0
-urllib3==2.1.0
+urllib3==2.2.1
 zipp==1.0.0
diff --git a/files/build/versions/dockers/docker-ptf-sai/versions-py3 b/files/build/versions/dockers/docker-ptf-sai/versions-py3
index 9a32487b4..08550dfeb 100644
--- a/files/build/versions/dockers/docker-ptf-sai/versions-py3
+++ b/files/build/versions/dockers/docker-ptf-sai/versions-py3
@@ -2,7 +2,7 @@ crc16==0.1.1
 getmac==0.9.4
 importlib-metadata==6.7.0
 netifaces==0.11.0
-packaging==23.2
+packaging==24.0
 packet-helper==0.0.1
 psutil==5.9.8
 ptf==0.0.0
diff --git a/files/build/versions/dockers/docker-ptf/versions-deb-buster b/files/build/versions/dockers/docker-ptf/versions-deb-buster
index e3414d16c..380fa0be7 100644
--- a/files/build/versions/dockers/docker-ptf/versions-deb-buster
+++ b/files/build/versions/dockers/docker-ptf/versions-deb-buster
@@ -18,7 +18,7 @@ cmake-data==3.13.4-1
 cpp==4:8.3.0-1
 cpp-8==8.3.0-6
 cron==3.0pl1-134+deb10u1
-curl==7.64.0-4+deb10u8
+curl==7.64.0-4+deb10u9
 dbus==1.12.28-0+deb10u1
 dbus-user-session==1.12.28-0+deb10u1
 dconf-gsettings-backend==0.30.1-2
@@ -114,8 +114,8 @@ libcryptsetup12==2:2.1.0-5+deb10u2
 libcups2==2.2.10-6+deb10u9
 libcupsfilters1==1.21.6-5+deb10u1
 libcupsimage2==2.2.10-6+deb10u9
-libcurl3-gnutls==7.64.0-4+deb10u8
-libcurl4==7.64.0-4+deb10u8
+libcurl3-gnutls==7.64.0-4+deb10u9
+libcurl4==7.64.0-4+deb10u9
 libdaemon0==0.14-7
 libdata-dump-perl==1.23-1
 libdatrie1==0.2.12-2
@@ -177,7 +177,7 @@ libglib2.0-data==2.58.3-2+deb10u5
 libglvnd0==1.1.0-1
 libglx-mesa0==18.3.6-2+deb10u1
 libglx0==1.1.0-1
-libgnutls-dane0==3.6.7-4+deb10u11
+libgnutls-dane0==3.6.7-4+deb10u12
 libgnutls30==3.6.7-4+deb10u10
 libgomp1==8.3.0-6
 libgpm2==1.20.7-5
@@ -309,16 +309,16 @@ libpython-dev==2.7.16-1
 libpython-stdlib==2.7.16-1
 libpython2-dev==2.7.16-1
 libpython2-stdlib==2.7.16-1
-libpython2.7==2.7.16-2+deb10u3
-libpython2.7-dev==2.7.16-2+deb10u3
-libpython2.7-minimal==2.7.16-2+deb10u3
-libpython2.7-stdlib==2.7.16-2+deb10u3
+libpython2.7==2.7.16-2+deb10u4
+libpython2.7-dev==2.7.16-2+deb10u4
+libpython2.7-minimal==2.7.16-2+deb10u4
+libpython2.7-stdlib==2.7.16-2+deb10u4
 libpython3-dev==3.7.3-1
 libpython3-stdlib==3.7.3-1
-libpython3.7==3.7.3-2+deb10u6
-libpython3.7-dev==3.7.3-2+deb10u6
-libpython3.7-minimal==3.7.3-2+deb10u6
-libpython3.7-stdlib==3.7.3-2+deb10u6
+libpython3.7==3.7.3-2+deb10u7
+libpython3.7-dev==3.7.3-2+deb10u7
+libpython3.7-minimal==3.7.3-2+deb10u7
+libpython3.7-stdlib==3.7.3-2+deb10u7
 libqt5core5a==5.11.3+dfsg1-1+deb10u5
 libqt5dbus5==5.11.3+dfsg1-1+deb10u5
 libqt5gui5==5.11.3+dfsg1-1+deb10u5
@@ -375,17 +375,17 @@ libthai0==0.1.28-2
 libtheora0==1.1.1+dfsg.1-15
 libthrift-0.11.0==0.11.0-4
 libtie-ixhash-perl==1.23-2
-libtiff5==4.1.0+git191117-2~deb10u8
+libtiff5==4.1.0+git191117-2~deb10u9
 libtimedate-perl==2.3000-2+deb10u1
 libtk8.6==8.6.9-2
 libtry-tiny-perl==0.30-1
 libtsan0==8.3.0-6
 libubsan1==8.3.0-6
 libudev1==241-7~deb10u10
-libunbound8==1.9.0-2+deb10u3
+libunbound8==1.9.0-2+deb10u4
 liburi-perl==1.76-1
 libutempter0==1.1.6-3
-libuv1==1.24.1-1+deb10u1
+libuv1==1.24.1-1+deb10u2
 libvisual-0.4-0==0.4.0-15
 libvorbis0a==1.3.6-2
 libvorbisenc2==1.3.6-2
@@ -399,13 +399,13 @@ libwayland-server0==1.16.0-1
 libwebp6==0.6.1-2+deb10u3
 libwebpdemux2==0.6.1-2+deb10u3
 libwebpmux3==0.6.1-2+deb10u3
-libwireshark-data==2.6.20-0+deb10u7
-libwireshark11==2.6.20-0+deb10u7
-libwiretap8==2.6.20-0+deb10u7
+libwireshark-data==2.6.20-0+deb10u8
+libwireshark11==2.6.20-0+deb10u8
+libwiretap8==2.6.20-0+deb10u8
 libwoff1==1.0.2-1
 libwrap0==7.6.q-28
-libwscodecs2==2.6.20-0+deb10u7
-libwsutil9==2.6.20-0+deb10u7
+libwscodecs2==2.6.20-0+deb10u8
+libwsutil9==2.6.20-0+deb10u8
 libwww-perl==6.36-2
 libwww-robotrules-perl==6.02-1
 libx11-6==2:1.6.7-1+deb10u4
@@ -506,9 +506,9 @@ python-thrift==0.11.0-4
 python2==2.7.16-1
 python2-dev==2.7.16-1
 python2-minimal==2.7.16-1
-python2.7==2.7.16-2+deb10u3
-python2.7-dev==2.7.16-2+deb10u3
-python2.7-minimal==2.7.16-2+deb10u3
+python2.7==2.7.16-2+deb10u4
+python2.7-dev==2.7.16-2+deb10u4
+python2.7-minimal==2.7.16-2+deb10u4
 python3==3.7.3-1
 python3-asn1crypto==0.24.0-1
 python3-cffi-backend==1.12.2-1
@@ -534,7 +534,7 @@ python3-numpy==1:1.16.2-1
 python3-olefile==0.46-1
 python3-pexpect==4.6.0-1
 python3-pickleshare==0.7.5-1
-python3-pil==5.4.1-2+deb10u3
+python3-pil==5.4.1-2+deb10u5
 python3-pip==18.1-5
 python3-pkg-resources==40.8.0-1
 python3-prompt-toolkit==1.0.15-1
@@ -553,10 +553,10 @@ python3-venv==3.7.3-1
 python3-wcwidth==0.1.7+dfsg1-3
 python3-wheel==0.32.3-2
 python3-xdg==0.25-5
-python3.7==3.7.3-2+deb10u6
-python3.7-dev==3.7.3-2+deb10u6
-python3.7-minimal==3.7.3-2+deb10u6
-python3.7-venv==3.7.3-2+deb10u6
+python3.7==3.7.3-2+deb10u7
+python3.7-dev==3.7.3-2+deb10u7
+python3.7-minimal==3.7.3-2+deb10u7
+python3.7-venv==3.7.3-2+deb10u7
 qt5-gtk-platformtheme==5.11.3+dfsg1-1+deb10u5
 qttranslations5-l10n==5.11.3-2
 readline-common==7.0-5
@@ -586,9 +586,9 @@ vim==2:8.1.0875-5+deb10u6
 vim-common==2:8.1.0875-5+deb10u6
 vim-runtime==2:8.1.0875-5+deb10u6
 wget==1.20.1-1.1
-wireshark==2.6.20-0+deb10u7
-wireshark-common==2.6.20-0+deb10u7
-wireshark-qt==2.6.20-0+deb10u7
+wireshark==2.6.20-0+deb10u8
+wireshark-common==2.6.20-0+deb10u8
+wireshark-qt==2.6.20-0+deb10u8
 x11-common==1:7.7+19
 x11-utils==7.7+4
 x11-xserver-utils==7.7+8
diff --git a/files/build/versions/dockers/docker-ptf/versions-py2 b/files/build/versions/dockers/docker-ptf/versions-py2
index e3a3025a7..0ed723423 100644
--- a/files/build/versions/dockers/docker-ptf/versions-py2
+++ b/files/build/versions/dockers/docker-ptf/versions-py2
@@ -11,7 +11,7 @@ enum34==1.1.6
 exabgp==3.4.17
 flask==1.0
 flask-httpauth==2.5.0
-future==0.18.3
+future==1.0.0
 futures==3.2.0
 grpcio==1.41.1
 grpcio-tools==1.41.1
diff --git a/files/build/versions/dockers/docker-router-advertiser/versions-deb-bookworm b/files/build/versions/dockers/docker-router-advertiser/versions-deb-bookworm
new file mode 100644
index 000000000..ef6058968
--- /dev/null
+++ b/files/build/versions/dockers/docker-router-advertiser/versions-deb-bookworm
@@ -0,0 +1,28 @@
+gdb==13.1-3
+gdbserver==13.1-3
+libbabeltrace1==1.5.11-1+b2
+libboost-regex1.74.0==1.74.0+ds1-21
+libcbor0.8==0.8.0-2+b1
+libcurl3-gnutls==7.88.1-10+deb12u5
+libdebuginfod-common==0.188-2.1
+libdebuginfod1==0.188-2.1
+libdw1==0.188-2.1
+libedit2==3.1-20221030-2
+libfido2-1==1.12.0-2+b1
+libglib2.0-0==2.74.6-2
+libgpm2==1.20.7-10+b1
+libicu72==72.1-3
+libipt2==2.0.5-1
+libmpfr6==4.2.0-1
+libsource-highlight-common==3.1.9-4.2
+libsource-highlight4v5==3.1.9-4.2+b3
+libswsscommon-dbgsym==1.0.0
+libunwind8==1.6.2-3
+openssh-client==1:9.2p1-2+deb12u2
+radvd==1:2.19-1+b1
+sensible-utils==0.0.17+nmu1
+sshpass==1.09-1+b1
+strace==6.1-0.1
+ucf==3.0043+nmu1
+vim==2:9.0.1378-2
+vim-runtime==2:9.0.1378-2
diff --git a/files/build/versions/dockers/docker-router-advertiser/versions-deb-bookworm-arm64 b/files/build/versions/dockers/docker-router-advertiser/versions-deb-bookworm-arm64
new file mode 100644
index 000000000..122e75fd7
--- /dev/null
+++ b/files/build/versions/dockers/docker-router-advertiser/versions-deb-bookworm-arm64
@@ -0,0 +1 @@
+radvd==1:2.19-1
diff --git a/files/build/versions/dockers/docker-router-advertiser/versions-deb-bookworm-armhf b/files/build/versions/dockers/docker-router-advertiser/versions-deb-bookworm-armhf
new file mode 100644
index 000000000..122e75fd7
--- /dev/null
+++ b/files/build/versions/dockers/docker-router-advertiser/versions-deb-bookworm-armhf
@@ -0,0 +1 @@
+radvd==1:2.19-1
diff --git a/files/build/versions/dockers/docker-router-advertiser/versions-deb-bullseye b/files/build/versions/dockers/docker-router-advertiser/versions-deb-bullseye
deleted file mode 100644
index c96c2d625..000000000
--- a/files/build/versions/dockers/docker-router-advertiser/versions-deb-bullseye
+++ /dev/null
@@ -1,25 +0,0 @@
-gdb==10.1-1.7
-gdbserver==10.1-1.7
-libbabeltrace1==1.5.8-1+b3
-libboost-regex1.74.0==1.74.0-9
-libcbor0==0.5.0+dfsg-2
-libcurl3-gnutls==7.74.0-1.3+deb11u11
-libdebuginfod1==0.183-1
-libdw1==0.183-1
-libedit2==3.1-20191231-2+b1
-libfido2-1==1.6.0-2
-libglib2.0-0==2.66.8-1
-libgpm2==1.20.7-8
-libicu67==67.1-7
-libipt2==2.0.3-1
-libmpfr6==4.1.0-3
-libsource-highlight-common==3.1.9-3
-libsource-highlight4v5==3.1.9-3+b1
-libswsscommon-dbgsym==1.0.0
-libunwind8==1.3.2-2
-openssh-client==1:8.4p1-5+deb11u3
-radvd==1:2.18-3
-sshpass==1.09-1+b1
-strace==5.10-1
-vim==2:8.2.2434-3+deb11u1
-vim-runtime==2:8.2.2434-3+deb11u1
diff --git a/files/build/versions/dockers/docker-router-advertiser/versions-mirror b/files/build/versions/dockers/docker-router-advertiser/versions-mirror
new file mode 100644
index 000000000..8d5ca2a61
--- /dev/null
+++ b/files/build/versions/dockers/docker-router-advertiser/versions-mirror
@@ -0,0 +1,2 @@
+deb.debian.org_debian-security_dists_bookworm-security==2024-04-04T18:53:21Z
+deb.debian.org_debian_dists_bookworm-updates==2024-04-04T20:12:41Z
diff --git a/files/build/versions/dockers/docker-sflow/versions-deb-bullseye b/files/build/versions/dockers/docker-sflow/versions-deb-bullseye
index 889af0d45..9c2e1a810 100644
--- a/files/build/versions/dockers/docker-sflow/versions-deb-bullseye
+++ b/files/build/versions/dockers/docker-sflow/versions-deb-bullseye
@@ -11,7 +11,7 @@ libdebuginfod1==0.183-1
 libdw1==0.183-1
 libedit2==3.1-20191231-2+b1
 libfido2-1==1.6.0-2
-libglib2.0-0==2.66.8-1
+libglib2.0-0==2.66.8-1+deb11u1
 libgpm2==1.20.7-8
 libicu67==67.1-7
 libipt2==2.0.3-1
diff --git a/files/build/versions/dockers/docker-snmp/versions-deb-bullseye b/files/build/versions/dockers/docker-snmp/versions-deb-bullseye
index 02097494e..247f77f79 100644
--- a/files/build/versions/dockers/docker-snmp/versions-deb-bullseye
+++ b/files/build/versions/dockers/docker-snmp/versions-deb-bullseye
@@ -4,7 +4,7 @@ gdbserver==10.1-1.7
 ipmitool==1.8.18-10.1
 libbabeltrace1==1.5.8-1+b3
 libboost-regex1.74.0==1.74.0-9
-libc-l10n==2.31-13+deb11u7
+libc-l10n==2.31-13+deb11u8
 libcbor0==0.5.0+dfsg-2
 libcurl3-gnutls==7.74.0-1.3+deb11u11
 libdebuginfod1==0.183-1
@@ -12,7 +12,7 @@ libdw1==0.183-1
 libedit2==3.1-20191231-2+b1
 libfido2-1==1.6.0-2
 libfreeipmi17==1.6.6-4+deb11u1
-libglib2.0-0==2.66.8-1
+libglib2.0-0==2.66.8-1+deb11u1
 libgpm2==1.20.7-8
 libicu67==67.1-7
 libipt2==2.0.3-1
@@ -27,7 +27,7 @@ libsource-highlight-common==3.1.9-3
 libsource-highlight4v5==3.1.9-3+b1
 libswsscommon-dbgsym==1.0.0
 libunwind8==1.3.2-2
-locales==2.31-13+deb11u7
+locales==2.31-13+deb11u8
 openssh-client==1:8.4p1-5+deb11u3
 pci.ids==0.0~2021.02.08-1
 snmp==5.9+dfsg-4+deb11u1
diff --git a/files/build/versions/dockers/docker-sonic-gnmi/versions-deb-bullseye b/files/build/versions/dockers/docker-sonic-gnmi/versions-deb-bullseye
index 33c2b2450..7ae0b391e 100644
--- a/files/build/versions/dockers/docker-sonic-gnmi/versions-deb-bullseye
+++ b/files/build/versions/dockers/docker-sonic-gnmi/versions-deb-bullseye
@@ -8,7 +8,7 @@ libdebuginfod1==0.183-1
 libdw1==0.183-1
 libedit2==3.1-20191231-2+b1
 libfido2-1==1.6.0-2
-libglib2.0-0==2.66.8-1
+libglib2.0-0==2.66.8-1+deb11u1
 libgpm2==1.20.7-8
 libicu67==67.1-7
 libipt2==2.0.3-1
diff --git a/files/build/versions/dockers/docker-sonic-mgmt-framework/versions-deb-buster b/files/build/versions/dockers/docker-sonic-mgmt-framework/versions-deb-buster
index 989ddfd32..84f912677 100644
--- a/files/build/versions/dockers/docker-sonic-mgmt-framework/versions-deb-buster
+++ b/files/build/versions/dockers/docker-sonic-mgmt-framework/versions-deb-buster
@@ -4,7 +4,7 @@ libbabeltrace1==1.5.6-2+deb10u1
 libbsd0==0.9.1-2+deb10u1
 libcjson-dev==1.7.10-1.1+deb10u2
 libcjson1==1.7.10-1.1+deb10u2
-libcurl3-gnutls==7.64.0-4+deb10u8
+libcurl3-gnutls==7.64.0-4+deb10u9
 libdw1==0.176-1.1+deb10u1
 libedit2==3.1-20181209-1
 libglib2.0-0==2.58.3-2+deb10u5
diff --git a/files/build/versions/dockers/docker-sonic-vs/versions-deb-bullseye b/files/build/versions/dockers/docker-sonic-vs/versions-deb-bullseye
index 683c92343..6766a3285 100644
--- a/files/build/versions/dockers/docker-sonic-vs/versions-deb-bullseye
+++ b/files/build/versions/dockers/docker-sonic-vs/versions-deb-bullseye
@@ -31,14 +31,15 @@ icu-devtools==67.1-7
 ifupdown==0.8.36
 iproute2==5.10.0-4sonic1
 iptables==1.8.7-1
-krb5-multidev==1.18.3-6+deb11u4
+krb5-multidev==1.18.3-6+deb11u4+fips
 libapparmor1==2.13.6-10
 libassuan0==2.5.3-7.1
-libblkid-dev==2.36.1-8+deb11u1
+libblkid-dev==2.36.1-8+deb11u2
+libblkid1==2.36.1-8+deb11u2
 libbsd-dev==0.11.3-1+deb11u1
 libc-ares2==1.17.1-1+deb11u3
-libc-dev-bin==2.31-13+deb11u7
-libc6-dev==2.31-13+deb11u7
+libc-dev-bin==2.31-13+deb11u8
+libc6-dev==2.31-13+deb11u8
 libcbor0==0.5.0+dfsg-2
 libcrypt-dev==1:4.4.18-4
 libdevmapper1.02.1==2:1.02.175-2.1
@@ -51,9 +52,10 @@ libfreetype6==2.10.4+dfsg-1+deb11u1
 libfreetype6-dev==2.10.4+dfsg-1+deb11u1
 libfuse2==2.9.9-5
 libgirepository-1.0-1==1.66.1-1+b1
-libglib2.0-0==2.66.8-1
-libglib2.0-data==2.66.8-1
-libgssrpc4==1.18.3-6+deb11u4
+libglib2.0-0==2.66.8-1+deb11u1
+libglib2.0-data==2.66.8-1+deb11u1
+libgssapi-krb5-2==1.18.3-6+deb11u4+fips
+libgssrpc4==1.18.3-6+deb11u4+fips
 libicu-dev==67.1-7
 libicu67==67.1-7
 libip4tc2==1.8.7-1
@@ -63,12 +65,15 @@ libjs-underscore==1.9.1~dfsg-3
 libjson-c5==0.15-2+deb11u1
 libjudydebian1==1.0.5-5+b2
 libk5crypto3==1.18.3-6+deb11u4
-libkadm5clnt-mit12==1.18.3-6+deb11u4
-libkadm5srv-mit12==1.18.3-6+deb11u4
+libkadm5clnt-mit12==1.18.3-6+deb11u4+fips
+libkadm5srv-mit12==1.18.3-6+deb11u4+fips
 libkdb5-10==1.18.3-6+deb11u4
-libkrb5-dev==1.18.3-6+deb11u4
+libkrb5-3==1.18.3-6+deb11u4+fips
+libkrb5-dev==1.18.3-6+deb11u4+fips
+libkrb5support0==1.18.3-6+deb11u4+fips
 libksba8==1.5.0-3+deb11u2
 libmd-dev==1.0.3-3
+libmount1==2.36.1-8+deb11u2
 libnet1==1.1.6+dfsg-3.1
 libnetfilter-conntrack3==1.0.8-3
 libnfnetlink0==1.0.1-3+b1
@@ -91,14 +96,15 @@ libsaivs==1.0.0
 libsodium-dev==1.0.18-1
 libssl1.1==1.1.1w-0+deb11u1
 libsystemd0==247.3-7+deb11u2
-libteam-utils==1.30-1
+libteam-utils==1.31-1
 libtirpc-dev==1.3.1-1+deb11u1
 libunwind8==1.3.2-2
+libuuid1==2.36.1-8+deb11u2
 libxml2==2.9.10+dfsg-6.7+deb11u4
 libxml2-dev==2.9.10+dfsg-6.7+deb11u4
 libyang2==2.0.112-6
-libzmq3-dev==4.3.4-1
-linux-libc-dev==5.10.205-2
+libzmq3-dev==4.3.4-1+deb11u1
+linux-libc-dev==5.10.209-2
 logrotate==3.18.0-2+deb11u2
 lsof==4.93.2+dfsg-1.1
 mailcap==3.69
@@ -128,6 +134,6 @@ sphinx-rtd-theme-common==0.5.1+dfsg-1
 syncd-vs==1.0.0
 tcpdump==4.99.0-2+deb11u1
 ucf==3.0043
-uuid-dev==2.36.1-8+deb11u1
+uuid-dev==2.36.1-8+deb11u2
 x11-common==1:7.7+22
 xz-utils==5.2.5-2.1~deb11u1
diff --git a/files/build/versions/dockers/docker-sonic-vs/versions-py3 b/files/build/versions/dockers/docker-sonic-vs/versions-py3
index f603a7695..b61f5b32c 100644
--- a/files/build/versions/dockers/docker-sonic-vs/versions-py3
+++ b/files/build/versions/dockers/docker-sonic-vs/versions-py3
@@ -1,35 +1,35 @@
 async-timeout==4.0.2
 bcrypt==3.2.2
 blessed==1.20.0
-certifi==2023.11.17
+certifi==2024.2.2
 cffi==1.16.0
 charset-normalizer==3.3.2
 click==7.0
 click-log==0.4.0
 colorful==0.5.6
-cryptography==42.0.0
+cryptography==42.0.5
 dbus-python==1.3.2
 docker==7.0.0
 docker-image-py==0.1.12
 enlighten==1.12.4
-filelock==3.13.1
+filelock==3.13.3
 idna==3.6
 importlib-metadata==6.1.0
 jsonpatch==1.33
 jsonpointer==2.4
 lazy-object-proxy==1.10.0
-m2crypto==0.40.1
+m2crypto==0.41.0
 netifaces==0.10.9
-packaging==23.2
+packaging==24.0
 paramiko==2.11.0
 pexpect==4.9.0
 prefixed==0.7.0
 prettyprinter==0.18.0
 ptyprocess==0.7.0
-pycairo==1.25.1
-pycparser==2.21
+pycairo==1.26.0
+pycparser==2.22
 pygments==2.17.2
-pygobject==3.46.0
+pygobject==3.48.1
 pynacl==1.5.0
 pyroute2==0.5.14
 redis==4.5.2
@@ -39,7 +39,7 @@ semantic-version==2.10.0
 systemd-python==235
 toposort==1.6
 typing_extensions==4.7.1
-urllib3==2.1.0
+urllib3==2.2.1
 wcwidth==0.2.13
 websocket-client==1.6.3
 www-authenticate==0.9.2
diff --git a/files/build/versions/dockers/docker-swss-layer-bookworm/versions-deb-bookworm b/files/build/versions/dockers/docker-swss-layer-bookworm/versions-deb-bookworm
new file mode 100644
index 000000000..b28759926
--- /dev/null
+++ b/files/build/versions/dockers/docker-swss-layer-bookworm/versions-deb-bookworm
@@ -0,0 +1,9 @@
+iputils-ping==3:20221126-1
+libdashapi==1.0.0
+libprotobuf-lite32==3.21.12-3
+libprotobuf32==3.21.12-3
+libsaimetadata==1.0.0
+libsairedis==1.0.0
+libteam5==1.31-1
+libteamdctl0==1.31-1
+swss==1.0.0
diff --git a/files/build/versions/dockers/docker-swss-layer-bookworm/versions-mirror b/files/build/versions/dockers/docker-swss-layer-bookworm/versions-mirror
new file mode 100644
index 000000000..8d5ca2a61
--- /dev/null
+++ b/files/build/versions/dockers/docker-swss-layer-bookworm/versions-mirror
@@ -0,0 +1,2 @@
+deb.debian.org_debian-security_dists_bookworm-security==2024-04-04T18:53:21Z
+deb.debian.org_debian_dists_bookworm-updates==2024-04-04T20:12:41Z
diff --git a/files/build/versions/dockers/docker-swss-layer-bullseye/versions-deb-bullseye b/files/build/versions/dockers/docker-swss-layer-bullseye/versions-deb-bullseye
index 653aa8fe9..214df182b 100644
--- a/files/build/versions/dockers/docker-swss-layer-bullseye/versions-deb-bullseye
+++ b/files/build/versions/dockers/docker-swss-layer-bullseye/versions-deb-bullseye
@@ -4,7 +4,7 @@ libprotobuf-lite32==3.21.12-3
 libprotobuf32==3.21.12-3
 libsaimetadata==1.0.0
 libsairedis==1.0.0
-libteam5==1.30-1
-libteamdctl0==1.30-1
+libteam5==1.31-1
+libteamdctl0==1.31-1
 python3-protobuf==3.21.12-3
 swss==1.0.0
diff --git a/files/build/versions/dockers/docker-syncd-brcm-dnx-rpc/versions-deb-bullseye b/files/build/versions/dockers/docker-syncd-brcm-dnx-rpc/versions-deb-bullseye
index 053ffe835..5aa883cb4 100644
--- a/files/build/versions/dockers/docker-syncd-brcm-dnx-rpc/versions-deb-bullseye
+++ b/files/build/versions/dockers/docker-syncd-brcm-dnx-rpc/versions-deb-bullseye
@@ -15,8 +15,8 @@ libarchive13==3.4.3-2+deb11u1
 libasan6==10.2.1-6
 libbinutils==2.35.2-2
 libboost-atomic1.74.0==1.74.0-9
-libc-dev-bin==2.31-13+deb11u7
-libc6-dev==2.31-13+deb11u7
+libc-dev-bin==2.31-13+deb11u8
+libc6-dev==2.31-13+deb11u8
 libcc1-0==10.2.1-6
 libcrypt-dev==1:4.4.18-4
 libctf-nobfd0==2.35.2-2
@@ -26,7 +26,7 @@ libdpkg-perl==1.20.13
 libexpat1-dev==2.2.10-2+deb11u5
 libffi-dev==3.3-6
 libgcc-10-dev==10.2.1-6
-libglib2.0-0==2.66.8-1
+libglib2.0-0==2.66.8-1+deb11u1
 libgomp1==10.2.1-6
 libicu67==67.1-7
 libisl23==0.23-1
@@ -55,9 +55,9 @@ libthrift-0.11.0==0.11.0-4
 libtirpc-dev==1.3.1-1+deb11u1
 libtsan0==10.2.1-6
 libubsan1==10.2.1-6
-libuv1==1.40.0-2
+libuv1==1.40.0-2+deb11u1
 libxml2==2.9.10+dfsg-6.7+deb11u4
-linux-libc-dev==5.10.205-2
+linux-libc-dev==5.10.209-2
 mailcap==3.69
 make==4.3-4.1
 mime-support==3.66
diff --git a/files/build/versions/dockers/docker-syncd-brcm-dnx/versions-deb-bullseye b/files/build/versions/dockers/docker-syncd-brcm-dnx/versions-deb-bullseye
index 1b0765aa1..6a726d5df 100644
--- a/files/build/versions/dockers/docker-syncd-brcm-dnx/versions-deb-bullseye
+++ b/files/build/versions/dockers/docker-syncd-brcm-dnx/versions-deb-bullseye
@@ -10,21 +10,25 @@ libdebuginfod1==0.183-1
 libdw1==0.183-1
 libedit2==3.1-20191231-2+b1
 libfido2-1==1.6.0-2
-libglib2.0-0==2.66.8-1
+libglib2.0-0==2.66.8-1+deb11u1
 libgpm2==1.20.7-8
 libicu67==67.1-7
 libipt2==2.0.3-1
 libkmod2==28-1
 libmpfr6==4.1.0-3
 libsaimetadata==1.0.0
+libsaimetadata-dbgsym==1.0.0
 libsairedis==1.0.0
+libsairedis-dbgsym==1.0.0
 libsource-highlight-common==3.1.9-3
 libsource-highlight4v5==3.1.9-3+b1
 libswsscommon-dbgsym==1.0.0
 libunwind8==1.3.2-2
+lz4==1.9.3-2
 openssh-client==1:8.4p1-5+deb11u3
 sshpass==1.09-1+b1
 strace==5.10-1
 syncd==1.0.0
+syncd-dbgsym==1.0.0
 vim==2:8.2.2434-3+deb11u1
 vim-runtime==2:8.2.2434-3+deb11u1
diff --git a/files/build/versions/dockers/docker-syncd-brcm-rpc/versions-deb-bullseye b/files/build/versions/dockers/docker-syncd-brcm-rpc/versions-deb-bullseye
index 053ffe835..5aa883cb4 100644
--- a/files/build/versions/dockers/docker-syncd-brcm-rpc/versions-deb-bullseye
+++ b/files/build/versions/dockers/docker-syncd-brcm-rpc/versions-deb-bullseye
@@ -15,8 +15,8 @@ libarchive13==3.4.3-2+deb11u1
 libasan6==10.2.1-6
 libbinutils==2.35.2-2
 libboost-atomic1.74.0==1.74.0-9
-libc-dev-bin==2.31-13+deb11u7
-libc6-dev==2.31-13+deb11u7
+libc-dev-bin==2.31-13+deb11u8
+libc6-dev==2.31-13+deb11u8
 libcc1-0==10.2.1-6
 libcrypt-dev==1:4.4.18-4
 libctf-nobfd0==2.35.2-2
@@ -26,7 +26,7 @@ libdpkg-perl==1.20.13
 libexpat1-dev==2.2.10-2+deb11u5
 libffi-dev==3.3-6
 libgcc-10-dev==10.2.1-6
-libglib2.0-0==2.66.8-1
+libglib2.0-0==2.66.8-1+deb11u1
 libgomp1==10.2.1-6
 libicu67==67.1-7
 libisl23==0.23-1
@@ -55,9 +55,9 @@ libthrift-0.11.0==0.11.0-4
 libtirpc-dev==1.3.1-1+deb11u1
 libtsan0==10.2.1-6
 libubsan1==10.2.1-6
-libuv1==1.40.0-2
+libuv1==1.40.0-2+deb11u1
 libxml2==2.9.10+dfsg-6.7+deb11u4
-linux-libc-dev==5.10.205-2
+linux-libc-dev==5.10.209-2
 mailcap==3.69
 make==4.3-4.1
 mime-support==3.66
diff --git a/files/build/versions/dockers/docker-syncd-brcm/versions-deb-bullseye b/files/build/versions/dockers/docker-syncd-brcm/versions-deb-bullseye
index 1dd59320f..225a59d00 100644
--- a/files/build/versions/dockers/docker-syncd-brcm/versions-deb-bullseye
+++ b/files/build/versions/dockers/docker-syncd-brcm/versions-deb-bullseye
@@ -10,14 +10,16 @@ libdebuginfod1==0.183-1
 libdw1==0.183-1
 libedit2==3.1-20191231-2+b1
 libfido2-1==1.6.0-2
-libglib2.0-0==2.66.8-1
+libglib2.0-0==2.66.8-1+deb11u1
 libgpm2==1.20.7-8
 libicu67==67.1-7
 libipt2==2.0.3-1
 libkmod2==28-1
 libmpfr6==4.1.0-3
 libsaimetadata==1.0.0
+libsaimetadata-dbgsym==1.0.0
 libsairedis==1.0.0
+libsairedis-dbgsym==1.0.0
 libsource-highlight-common==3.1.9-3
 libsource-highlight4v5==3.1.9-3+b1
 libswsscommon-dbgsym==1.0.0
@@ -28,5 +30,6 @@ openssh-client==1:8.4p1-5+deb11u3
 sshpass==1.09-1+b1
 strace==5.10-1
 syncd==1.0.0
+syncd-dbgsym==1.0.0
 vim==2:8.2.2434-3+deb11u1
 vim-runtime==2:8.2.2434-3+deb11u1
diff --git a/files/build/versions/dockers/docker-syncd-centec-rpc/versions-deb-bullseye b/files/build/versions/dockers/docker-syncd-centec-rpc/versions-deb-bullseye
index 053ffe835..5aa883cb4 100644
--- a/files/build/versions/dockers/docker-syncd-centec-rpc/versions-deb-bullseye
+++ b/files/build/versions/dockers/docker-syncd-centec-rpc/versions-deb-bullseye
@@ -15,8 +15,8 @@ libarchive13==3.4.3-2+deb11u1
 libasan6==10.2.1-6
 libbinutils==2.35.2-2
 libboost-atomic1.74.0==1.74.0-9
-libc-dev-bin==2.31-13+deb11u7
-libc6-dev==2.31-13+deb11u7
+libc-dev-bin==2.31-13+deb11u8
+libc6-dev==2.31-13+deb11u8
 libcc1-0==10.2.1-6
 libcrypt-dev==1:4.4.18-4
 libctf-nobfd0==2.35.2-2
@@ -26,7 +26,7 @@ libdpkg-perl==1.20.13
 libexpat1-dev==2.2.10-2+deb11u5
 libffi-dev==3.3-6
 libgcc-10-dev==10.2.1-6
-libglib2.0-0==2.66.8-1
+libglib2.0-0==2.66.8-1+deb11u1
 libgomp1==10.2.1-6
 libicu67==67.1-7
 libisl23==0.23-1
@@ -55,9 +55,9 @@ libthrift-0.11.0==0.11.0-4
 libtirpc-dev==1.3.1-1+deb11u1
 libtsan0==10.2.1-6
 libubsan1==10.2.1-6
-libuv1==1.40.0-2
+libuv1==1.40.0-2+deb11u1
 libxml2==2.9.10+dfsg-6.7+deb11u4
-linux-libc-dev==5.10.205-2
+linux-libc-dev==5.10.209-2
 mailcap==3.69
 make==4.3-4.1
 mime-support==3.66
diff --git a/files/build/versions/dockers/docker-syncd-centec/versions-deb-bullseye b/files/build/versions/dockers/docker-syncd-centec/versions-deb-bullseye
index f28efa949..a3b48eb31 100644
--- a/files/build/versions/dockers/docker-syncd-centec/versions-deb-bullseye
+++ b/files/build/versions/dockers/docker-syncd-centec/versions-deb-bullseye
@@ -9,7 +9,7 @@ libdebuginfod1==0.183-1
 libdw1==0.183-1
 libedit2==3.1-20191231-2+b1
 libfido2-1==1.6.0-2
-libglib2.0-0==2.66.8-1
+libglib2.0-0==2.66.8-1+deb11u1
 libgpm2==1.20.7-8
 libhiredis0.14-dbgsym==0.14.1-1
 libicu67==67.1-7
diff --git a/files/build/versions/dockers/docker-syncd-mlnx-rpc/versions-deb-bullseye b/files/build/versions/dockers/docker-syncd-mlnx-rpc/versions-deb-bullseye
index 6bced6505..1d9e6ff2a 100644
--- a/files/build/versions/dockers/docker-syncd-mlnx-rpc/versions-deb-bullseye
+++ b/files/build/versions/dockers/docker-syncd-mlnx-rpc/versions-deb-bullseye
@@ -22,7 +22,7 @@ libdouble-conversion3==3.1.5-6.1
 libdpkg-perl==1.20.13
 libffi-dev==3.3-6
 libgcc-10-dev==10.2.1-6
-libglib2.0-0==2.66.8-1
+libglib2.0-0==2.66.8-1+deb11u1
 libgomp1==10.2.1-6
 libisl23==0.23-1
 libitm1==10.2.1-6
@@ -48,7 +48,7 @@ libstdc++-10-dev==10.2.1-6
 libthrift-0.11.0==0.11.0-4
 libtsan0==10.2.1-6
 libubsan1==10.2.1-6
-libuv1==1.40.0-2
+libuv1==1.40.0-2+deb11u1
 mailcap==3.69
 make==4.3-4.1
 mime-support==3.66
@@ -65,6 +65,7 @@ python2-minimal==2.7.18-3
 python2.7==2.7.18-8+deb11u1
 python2.7-dev==2.7.18-8+deb11u1
 python2.7-minimal==2.7.18-8+deb11u1
+python3-scapy==2.4.0-2
 shared-mime-info==2.0-1
 syncd-rpc==1.0.0
 wget==1.21-1+deb11u1
diff --git a/files/build/versions/dockers/docker-syncd-mlnx-rpc/versions-py3 b/files/build/versions/dockers/docker-syncd-mlnx-rpc/versions-py3
new file mode 100644
index 000000000..9ad41d81d
--- /dev/null
+++ b/files/build/versions/dockers/docker-syncd-mlnx-rpc/versions-py3
@@ -0,0 +1,5 @@
+cffi==1.16.0
+nnpy==1.4.2
+ptf==0.10.0
+pycparser==2.22
+scapy==2.4.0
diff --git a/files/build/versions/dockers/docker-syncd-mlnx/versions-deb-bullseye b/files/build/versions/dockers/docker-syncd-mlnx/versions-deb-bullseye
index 2c1fb9b9d..c1dd4638d 100644
--- a/files/build/versions/dockers/docker-syncd-mlnx/versions-deb-bullseye
+++ b/files/build/versions/dockers/docker-syncd-mlnx/versions-deb-bullseye
@@ -1,5 +1,5 @@
-applibs==1.mlnx.4.6.2134
-applibs-dev==1.mlnx.4.6.2134
+applibs==1.mlnx.4.6.2202
+applibs-dev==1.mlnx.4.6.2202
 gdb==10.1-1.7
 gdbserver==10.1-1.7
 iproute2==1.mlnx.4.5.4206
@@ -7,8 +7,8 @@ iproute2-dev==1.mlnx.4.5.4206
 iproute2-mlnx==5.10.0-4~bpo10+1
 libbabeltrace1==1.5.8-1+b3
 libboost-regex1.74.0==1.74.0-9
-libc-dev-bin==2.31-13+deb11u7
-libc6-dev==2.31-13+deb11u7
+libc-dev-bin==2.31-13+deb11u8
+libc6-dev==2.31-13+deb11u8
 libcbor0==0.5.0+dfsg-2
 libcrypt-dev==1:4.4.18-4
 libcurl3-gnutls==7.74.0-1.3+deb11u11
@@ -18,7 +18,7 @@ libedit2==3.1-20191231-2+b1
 libelf1==0.183-1
 libexpat1-dev==2.2.10-2+deb11u5
 libfido2-1==1.6.0-2
-libglib2.0-0==2.66.8-1
+libglib2.0-0==2.66.8-1+deb11u1
 libgpm2==1.20.7-8
 libhiredis0.14-dbgsym==0.14.1-1
 libicu67==67.1-7
@@ -31,8 +31,10 @@ libpython3-dev==3.9.2-3
 libpython3.9-dev==3.9.2-1
 libsaimetadata==1.0.0
 libsaimetadata-dbg==1.0.0
+libsaimetadata-dbgsym==1.0.0
 libsairedis==1.0.0
 libsairedis-dbg==1.0.0
+libsairedis-dbgsym==1.0.0
 libsource-highlight-common==3.1.9-3
 libsource-highlight4v5==3.1.9-3+b1
 libswsscommon-dbg==1.0.0
@@ -40,13 +42,13 @@ libswsscommon-dbgsym==1.0.0
 libtirpc-dev==1.3.1-1+deb11u1
 libunwind8==1.3.2-2
 libxml2==2.9.10+dfsg-6.7+deb11u4
-linux-libc-dev==5.10.205-2
-mft==4.25.0-62
+linux-libc-dev==5.10.209-2
+mft==4.27.0-83
 mft-fwtrace-cfg==1.0.0
 mlnx-sai==1.mlnx.SAIBuild2311.26.0.28
 openssh-client==1:8.4p1-5+deb11u3
 python-pip-whl==20.3.4-4+deb11u1
-python-sdk-api==1.mlnx.4.6.2134
+python-sdk-api==1.mlnx.4.6.2202
 python3-attr==20.3.0-1
 python3-dev==3.9.2-3
 python3-importlib-metadata==1.6.0-2
@@ -62,25 +64,26 @@ python3-zipp==1.0.0-3
 python3.9-dev==3.9.2-1
 sshpass==1.09-1+b1
 strace==5.10-1
-sx-acl-helper==1.mlnx.4.6.2134
-sx-acl-helper-dev==1.mlnx.4.6.2134
-sx-complib==1.mlnx.4.6.2134
-sx-complib-dev==1.mlnx.4.6.2134
-sx-examples==1.mlnx.4.6.2134
-sx-examples-dev==1.mlnx.4.6.2134
-sx-gen-utils==1.mlnx.4.6.2134
-sx-gen-utils-dev==1.mlnx.4.6.2134
-sx-hash-calc==1.mlnx.4.6.2134
-sx-obj-desc-lib==1.mlnx.4.6.2134
-sx-obj-desc-lib-dev==1.mlnx.4.6.2134
+sx-acl-helper==1.mlnx.4.6.2202
+sx-acl-helper-dev==1.mlnx.4.6.2202
+sx-complib==1.mlnx.4.6.2202
+sx-complib-dev==1.mlnx.4.6.2202
+sx-examples==1.mlnx.4.6.2202
+sx-examples-dev==1.mlnx.4.6.2202
+sx-gen-utils==1.mlnx.4.6.2202
+sx-gen-utils-dev==1.mlnx.4.6.2202
+sx-hash-calc==1.mlnx.4.6.2202
+sx-obj-desc-lib==1.mlnx.4.6.2202
+sx-obj-desc-lib-dev==1.mlnx.4.6.2202
 sx-scew==1.mlnx.4.5.5142
 sx-scew-dev==1.mlnx.4.5.5142
-sxd-libs==1.mlnx.4.6.2134
-sxd-libs-dev==1.mlnx.4.6.2134
+sxd-libs==1.mlnx.4.6.2202
+sxd-libs-dev==1.mlnx.4.6.2202
 syncd==1.0.0
 syncd-dbg==1.0.0
+syncd-dbgsym==1.0.0
 vim==2:8.2.2434-3+deb11u1
 vim-runtime==2:8.2.2434-3+deb11u1
-wjh-libs==1.mlnx.4.6.2134
-wjh-libs-dev==1.mlnx.4.6.2134
+wjh-libs==1.mlnx.4.6.2202
+wjh-libs-dev==1.mlnx.4.6.2202
 zlib1g-dev==1:1.2.11.dfsg-2+deb11u2
diff --git a/files/build/versions/dockers/docker-syncd-mlnx/versions-py3 b/files/build/versions/dockers/docker-syncd-mlnx/versions-py3
index 8d8f2bcb4..d49cf202c 100644
--- a/files/build/versions/dockers/docker-syncd-mlnx/versions-py3
+++ b/files/build/versions/dockers/docker-syncd-mlnx/versions-py3
@@ -3,5 +3,5 @@ importlib-metadata==1.6.0
 jsonschema==3.2.0
 more-itertools==4.2.0
 pyrsistent==0.15.5
-python_sdk_api==4.6.2134
+python_sdk_api==4.6.2202
 zipp==1.0.0
diff --git a/files/build/versions/dockers/docker-syncd-mrvl/versions-deb-bullseye-arm64 b/files/build/versions/dockers/docker-syncd-mrvl/versions-deb-bullseye-arm64
index 50830ad96..55419d341 100644
--- a/files/build/versions/dockers/docker-syncd-mrvl/versions-deb-bullseye-arm64
+++ b/files/build/versions/dockers/docker-syncd-mrvl/versions-deb-bullseye-arm64
@@ -6,7 +6,7 @@ libdevmapper1.02.1==2:1.02.175-2.1
 libdpkg-perl==1.20.13
 libevent-2.1-7==2.1.12-stable-1
 libexpat1-dev==2.2.10-2+deb11u5
-libglib2.0-0==2.66.8-1
+libglib2.0-0==2.66.8-1+deb11u1
 libnfsidmap2==0.25-6
 libpcap-dev==1.10.0-2
 libpcap0.8==1.10.0-2
diff --git a/files/build/versions/dockers/docker-syncd-mrvl/versions-deb-bullseye-armhf b/files/build/versions/dockers/docker-syncd-mrvl/versions-deb-bullseye-armhf
index bb286f115..4b3754d4e 100644
--- a/files/build/versions/dockers/docker-syncd-mrvl/versions-deb-bullseye-armhf
+++ b/files/build/versions/dockers/docker-syncd-mrvl/versions-deb-bullseye-armhf
@@ -6,7 +6,7 @@ libdevmapper1.02.1==2:1.02.175-2.1
 libdpkg-perl==1.20.13
 libevent-2.1-7==2.1.12-stable-1
 libexpat1-dev==2.2.10-2+deb11u5
-libglib2.0-0==2.66.8-1
+libglib2.0-0==2.66.8-1+deb11u1
 libnfsidmap2==0.25-6
 libpcap-dev==1.10.0-2
 libpcap0.8==1.10.0-2
diff --git a/files/build/versions/dockers/docker-syncd-vs/versions-deb-bullseye b/files/build/versions/dockers/docker-syncd-vs/versions-deb-bullseye
index 526f470f7..fcb2674a5 100644
--- a/files/build/versions/dockers/docker-syncd-vs/versions-deb-bullseye
+++ b/files/build/versions/dockers/docker-syncd-vs/versions-deb-bullseye
@@ -9,7 +9,7 @@ libdebuginfod1==0.183-1
 libdw1==0.183-1
 libedit2==3.1-20191231-2+b1
 libfido2-1==1.6.0-2
-libglib2.0-0==2.66.8-1
+libglib2.0-0==2.66.8-1+deb11u1
 libgpm2==1.20.7-8
 libhiredis0.14-dbgsym==0.14.1-1
 libicu67==67.1-7
@@ -17,10 +17,13 @@ libipt2==2.0.3-1
 libmpfr6==4.1.0-3
 libsaimetadata==1.0.0
 libsaimetadata-dbg==1.0.0
+libsaimetadata-dbgsym==1.0.0
 libsairedis==1.0.0
 libsairedis-dbg==1.0.0
+libsairedis-dbgsym==1.0.0
 libsaivs==1.0.0
 libsaivs-dbg==1.0.0
+libsaivs-dbgsym==1.0.0
 libsource-highlight-common==3.1.9-3
 libsource-highlight4v5==3.1.9-3+b1
 libswsscommon-dbgsym==1.0.0
@@ -30,5 +33,6 @@ sshpass==1.09-1+b1
 strace==5.10-1
 syncd-vs==1.0.0
 syncd-vs-dbg==1.0.0
+syncd-vs-dbgsym==1.0.0
 vim==2:8.2.2434-3+deb11u1
 vim-runtime==2:8.2.2434-3+deb11u1
diff --git a/files/build/versions/dockers/docker-teamd/versions-deb-bookworm b/files/build/versions/dockers/docker-teamd/versions-deb-bookworm
new file mode 100644
index 000000000..22d08f783
--- /dev/null
+++ b/files/build/versions/dockers/docker-teamd/versions-deb-bookworm
@@ -0,0 +1,31 @@
+gdb==13.1-3
+gdbserver==13.1-3
+libbabeltrace1==1.5.11-1+b2
+libboost-regex1.74.0==1.74.0+ds1-21
+libcbor0.8==0.8.0-2+b1
+libcurl3-gnutls==7.88.1-10+deb12u5
+libdebuginfod-common==0.188-2.1
+libdebuginfod1==0.188-2.1
+libdw1==0.188-2.1
+libedit2==3.1-20221030-2
+libfido2-1==1.12.0-2+b1
+libglib2.0-0==2.74.6-2
+libgpm2==1.20.7-10+b1
+libicu72==72.1-3
+libipt2==2.0.5-1
+libmpfr6==4.2.0-1
+libsource-highlight-common==3.1.9-4.2
+libsource-highlight4v5==3.1.9-4.2+b3
+libswsscommon-dbgsym==1.0.0
+libteam-utils==1.31-1
+libteam-utils-dbgsym==1.31-1
+libteamdctl0-dbgsym==1.31-1
+libunwind8==1.6.2-3
+openssh-client==1:9.2p1-2+deb12u2
+sensible-utils==0.0.17+nmu1
+sshpass==1.09-1+b1
+strace==6.1-0.1
+swss-dbg==1.0.0
+ucf==3.0043+nmu1
+vim==2:9.0.1378-2
+vim-runtime==2:9.0.1378-2
diff --git a/files/build/versions/dockers/docker-teamd/versions-deb-bullseye b/files/build/versions/dockers/docker-teamd/versions-deb-bullseye
deleted file mode 100644
index 7b97b1684..000000000
--- a/files/build/versions/dockers/docker-teamd/versions-deb-bullseye
+++ /dev/null
@@ -1,28 +0,0 @@
-gdb==10.1-1.7
-gdbserver==10.1-1.7
-libbabeltrace1==1.5.8-1+b3
-libboost-regex1.74.0==1.74.0-9
-libcbor0==0.5.0+dfsg-2
-libcurl3-gnutls==7.74.0-1.3+deb11u11
-libdebuginfod1==0.183-1
-libdw1==0.183-1
-libedit2==3.1-20191231-2+b1
-libfido2-1==1.6.0-2
-libglib2.0-0==2.66.8-1
-libgpm2==1.20.7-8
-libicu67==67.1-7
-libipt2==2.0.3-1
-libmpfr6==4.1.0-3
-libsource-highlight-common==3.1.9-3
-libsource-highlight4v5==3.1.9-3+b1
-libswsscommon-dbgsym==1.0.0
-libteam-utils==1.30-1
-libteam-utils-dbgsym==1.30-1
-libteamdctl0-dbgsym==1.30-1
-libunwind8==1.3.2-2
-openssh-client==1:8.4p1-5+deb11u3
-sshpass==1.09-1+b1
-strace==5.10-1
-swss-dbg==1.0.0
-vim==2:8.2.2434-3+deb11u1
-vim-runtime==2:8.2.2434-3+deb11u1
diff --git a/files/build/versions/dockers/docker-teamd/versions-mirror b/files/build/versions/dockers/docker-teamd/versions-mirror
new file mode 100644
index 000000000..8d5ca2a61
--- /dev/null
+++ b/files/build/versions/dockers/docker-teamd/versions-mirror
@@ -0,0 +1,2 @@
+deb.debian.org_debian-security_dists_bookworm-security==2024-04-04T18:53:21Z
+deb.debian.org_debian_dists_bookworm-updates==2024-04-04T20:12:41Z
diff --git a/files/build/versions/dockers/sonic-slave-bookworm/versions-deb-bookworm b/files/build/versions/dockers/sonic-slave-bookworm/versions-deb-bookworm
index 6319662ec..9cfdc36f6 100644
--- a/files/build/versions/dockers/sonic-slave-bookworm/versions-deb-bookworm
+++ b/files/build/versions/dockers/sonic-slave-bookworm/versions-deb-bookworm
@@ -26,9 +26,9 @@ autopoint==0.21-12
 autotools-dev==20220109.1
 bash-completion==1:2.11-6
 bc==1.07.1-3+b1
-bind9-dnsutils==1:9.18.19-1~deb12u1
-bind9-host==1:9.18.19-1~deb12u1
-bind9-libs==1:9.18.19-1~deb12u1
+bind9-dnsutils==1:9.18.24-1
+bind9-host==1:9.18.24-1
+bind9-libs==1:9.18.24-1
 binutils==2.40-2
 binutils-aarch64-linux-gnu==2.40-2
 binutils-arm-linux-gnueabihf==2.40-2
@@ -37,7 +37,8 @@ binutils-x86-64-linux-gnu==2.40-2
 bison==2:3.8.2+dfsg-1+b1
 blt==2.5.3+dfsg-4.1
 bsd-mailx==8.1.2-0.20220412cvs-1
-bsdextrautils==2.38.1-5+b1
+bsdextrautils==2.38.1-5+deb12u1
+bsdutils==1:2.38.1-5+deb12u1
 build-essential==12.9
 byacc==1:2.0.20221106-1
 bzip2==1.0.8-5+b1
@@ -98,7 +99,7 @@ dirmngr==2.2.40-1.1
 distro-info-data==0.58+deb12u1
 dkms==3.0.10-8+deb12u1
 dmsetup==2:1.02.185-2
-dnsutils==1:9.18.19-1~deb12u1
+dnsutils==1:9.18.24-1
 docbook==4.5-10
 docbook-dsssl==1.79-10
 docbook-to-man==1:2.0.0-45
@@ -107,7 +108,7 @@ docbook-xml==4.5-12
 docker-buildx-plugin==0.10.5-1~debian.12~bookworm
 docker-ce==5:24.0.2-1~debian.12~bookworm
 docker-ce-cli==5:24.0.2-1~debian.12~bookworm
-docker-ce-rootless-extras==5:25.0.0-1~debian.12~bookworm
+docker-ce-rootless-extras==5:26.0.0-1~debian.12~bookworm
 docker-compose-plugin==2.18.1-1~debian.12~bookworm
 docutils-common==0.19+dfsg-6
 dosfstools==4.2-1
@@ -210,9 +211,9 @@ i965-va-driver==2.4.1+dfsg1-1
 ibverbs-providers==44.0-2
 icc-profiles-free==2.0.1+dfsg-1.1
 icu-devtools==72.1-3
-imagemagick==8:6.9.11.60+dfsg-1.6
-imagemagick-6-common==8:6.9.11.60+dfsg-1.6
-imagemagick-6.q16==8:6.9.11.60+dfsg-1.6
+imagemagick==8:6.9.11.60+dfsg-1.6+deb12u1
+imagemagick-6-common==8:6.9.11.60+dfsg-1.6+deb12u1
+imagemagick-6.q16==8:6.9.11.60+dfsg-1.6+deb12u1
 inetutils-telnet==2:2.4-2+deb12u1
 install-info==6.8-6+b1
 intel-media-va-driver==23.1.1+dfsg1-1
@@ -315,7 +316,8 @@ libberkeleydb-perl==0.64-2+b1
 libbinutils==2.40-2
 libbit-vector-perl==7.4-2+b1
 libblas3==3.11.0-2
-libblkid-dev==2.38.1-5+b1
+libblkid-dev==2.38.1-5+deb12u1
+libblkid1==2.38.1-5+deb12u1
 libbluray2==1:1.3.4-1
 libboost-atomic-dev==1.74.0.3
 libboost-atomic1.74-dev==1.74.0+ds1-21
@@ -382,16 +384,16 @@ libbsh-java==2.0b4-20
 libbz2-dev==1.0.8-5+b1
 libc-ares-dev==1.18.1-3
 libc-ares2==1.18.1-3
-libc-dev-bin==2.36-9+deb12u3
-libc-devtools==2.36-9+deb12u3
-libc-l10n==2.36-9+deb12u3
+libc-dev-bin==2.36-9+deb12u4
+libc-devtools==2.36-9+deb12u4
+libc-l10n==2.36-9+deb12u4
 libc6-armhf-cross==2.36-8cross1
-libc6-dbg==2.36-9+deb12u3
-libc6-dev==2.36-9+deb12u3
-libc6-dev-i386==2.36-9+deb12u3
-libc6-dev-x32==2.36-9+deb12u3
-libc6-i386==2.36-9+deb12u3
-libc6-x32==2.36-9+deb12u3
+libc6-dbg==2.36-9+deb12u4
+libc6-dev==2.36-9+deb12u4
+libc6-dev-i386==2.36-9+deb12u4
+libc6-dev-x32==2.36-9+deb12u4
+libc6-i386==2.36-9+deb12u4
+libc6-x32==2.36-9+deb12u4
 libcaca0==0.99.beta20-3
 libcacard0==1:2.8.0-3
 libcairo-gobject2==1.16.0-7
@@ -456,7 +458,7 @@ libconvert-binhex-perl==1.125-3
 libcpanel-json-xs-perl==4.35-1
 libcrypt-dev==1:4.4.33-2
 libcrypt-rc4-perl==2.02-5
-libcryptsetup12==2:2.6.1-4~deb12u1
+libcryptsetup12==2:2.6.1-4~deb12u2
 libctf-nobfd0==2.40-2
 libctf0==2.40-2
 libcunit1==2.1-3-dfsg-2.6
@@ -491,7 +493,7 @@ libdbus-glib-1-2==0.112-3
 libdbus-glib-1-dev==0.112-3
 libdbus-glib-1-dev-bin==0.112-3
 libdconf1==0.40.0-4
-libde265-0==1.0.11-1+deb12u1
+libde265-0==1.0.11-1+deb12u2
 libdebhelper-perl==13.11.4
 libdebuginfod-common==0.188-2.1
 libdebuginfod1==0.188-2.1
@@ -568,7 +570,7 @@ libfastjson4==1.2304.0-1
 libfcgi-bin==2.4.2-2
 libfcgi-perl==0.82+ds-2
 libfcgi0ldbl==2.4.2-2
-libfdisk1==2.38.1-5+b1
+libfdisk1==2.38.1-5+deb12u1
 libfdt1==1.6.1-4+b1
 libfeature-compat-class-perl==0.05-1
 libfeature-compat-try-perl==0.05-1
@@ -662,7 +664,7 @@ libgme0==0.6.3-6
 libgmock-dev==1.12.1-0.2
 libgmp-dev==2:6.2.1+dfsg1-1.1
 libgmpxx4ldbl==2:6.2.1+dfsg1-1.1
-libgnutls-dane0==3.7.9-2+deb12u1
+libgnutls-dane0==3.7.9-2+deb12u2
 libgomp1==12.2.0-14
 libgomp1-armhf-cross==12.2.0-14cross1
 libgoogle-perftools4==2.10-1
@@ -757,7 +759,7 @@ libipc-system-simple-perl==1.30-2
 libipt2==2.0.5-1
 libiptc-dev==1.8.9-2
 libiscsi7==1.19.0-3
-libisl23==0.25-1
+libisl23==0.25-1.1
 libiterator-perl==0.03+ds1-2
 libiterator-util-perl==0.02+ds1-2
 libitext1-java==1.4-7
@@ -796,6 +798,7 @@ libjson-c5==0.16-2
 libjson-maybexs-perl==1.004004-1
 libjson-perl==4.10000-1
 libjson-xs-perl==4.030-2+b1
+libjsoncpp-dev==1.9.5-4
 libjsoncpp25==1.9.5-4
 libjsoup-java==1.15.3-1
 libjsp-api-java==2.3.4-3
@@ -854,14 +857,14 @@ liblzo2-2==2.10-2
 liblzo2-dev==2.10-2
 libmagic-mgc==1:5.44-3
 libmagic1==1:5.44-3
-libmagickcore-6.q16-6==8:6.9.11.60+dfsg-1.6
-libmagickcore-6.q16-6-extra==8:6.9.11.60+dfsg-1.6
-libmagickwand-6.q16-6==8:6.9.11.60+dfsg-1.6
+libmagickcore-6.q16-6==8:6.9.11.60+dfsg-1.6+deb12u1
+libmagickcore-6.q16-6-extra==8:6.9.11.60+dfsg-1.6+deb12u1
+libmagickwand-6.q16-6==8:6.9.11.60+dfsg-1.6+deb12u1
 libmail-sendmail-perl==0.80-3
 libmailtools-perl==2.21-2
-libmariadb-dev==1:10.11.4-1~deb12u1
-libmariadb-dev-compat==1:10.11.4-1~deb12u1
-libmariadb3==1:10.11.4-1~deb12u1
+libmariadb-dev==1:10.11.6-0+deb12u1
+libmariadb-dev-compat==1:10.11.6-0+deb12u1
+libmariadb3==1:10.11.6-0+deb12u1
 libmarkdown2==2.2.7-2
 libmath-base85-perl==0.5+dfsg-2
 libmaven-archiver-java==3.6.0-1
@@ -899,7 +902,8 @@ libmoo-perl==2.005005-1
 libmoose-perl==2.2203-1
 libmoosex-aliases-perl==0.11-2
 libmoox-aliases-perl==0.001006-2
-libmount-dev==2.38.1-5+b1
+libmount-dev==2.38.1-5+deb12u1
+libmount1==2.38.1-5+deb12u1
 libmouse-perl==2.5.10-1+b3
 libmp3lame0==3.100-6
 libmpc3==1.3.1-1
@@ -949,7 +953,7 @@ libnpth0==1.6-3
 libnsl-dev==1.3.0-2
 libnsl2==1.3.0-2
 libnspr4==2:4.35-1
-libnss-systemd==252.19-1~deb12u1
+libnss-systemd==252.22-1~deb12u1
 libnss3==2:3.87.1-1
 libnuma-dev==2.0.16-1
 libnuma1==2.0.16-1
@@ -983,7 +987,7 @@ libpackage-stash-xs-perl==0.30-1+b1
 libpackagekit-glib2-18==1.2.6-5
 libpadwalker-perl==2.5-1+b3
 libpam-cap==1:2.66-4
-libpam-systemd==252.19-1~deb12u1
+libpam-systemd==252.22-1~deb12u1
 libpam0g-dev==1.5.2-6+deb12u1
 libpango-1.0-0==1.50.12+ds-1
 libpango1.0-dev==1.50.12+ds-1
@@ -1166,6 +1170,7 @@ libslf4j-java==1.7.32-1
 libslirp0==4.7.0-1
 libsm-dev==2:1.2.3-1
 libsm6==2:1.2.3-1
+libsmartcols1==2.38.1-5+deb12u1
 libsnappy-java==1.1.8.3-1
 libsnappy-jni==1.1.8.3-1
 libsnappy1v5==1.1.9-3
@@ -1225,8 +1230,8 @@ libsynctex2==2022.20220321.62855-5.1+deb12u1
 libsyntax-keyword-try-perl==0.28-1
 libsys-cpuaffinity-perl==1.13~03-2+b1
 libsys-hostname-long-perl==1.5-3
-libsystemd-dev==252.19-1~deb12u1
-libsystemd-shared==252.19-1~deb12u1
+libsystemd-dev==252.22-1~deb12u1
+libsystemd-shared==252.22-1~deb12u1
 libtag1v5==1.13-2
 libtag1v5-vanilla==1.13-2
 libtask-weaken-perl==1.06-2
@@ -1280,9 +1285,9 @@ libubsan1==12.2.0-14
 libubsan1-armhf-cross==12.2.0-14cross1
 libuchardet0==0.0.7-1
 libucx0==1.13.1-1
-libudev-dev==252.19-1~deb12u1
+libudev-dev==252.22-1~deb12u1
 libudfread0==1.1.2-1
-libunbound8==1.17.1-2+deb12u1
+libunbound8==1.17.1-2+deb12u2
 libunicode-map-perl==0.112-13+b1
 libunicode-utf8-perl==0.62-2
 libunivocity-parsers-java==2.9.1-1
@@ -1296,7 +1301,8 @@ libusb-1.0-0-dev==2:1.0.26-1
 libusb-1.0-doc==2:1.0.26-1
 libusb-dev==2:0.1.12-32
 libusbredirparser1==0.13.0-2
-libuv1==1.44.2-1
+libuuid1==2.38.1-5+deb12u1
+libuv1==1.44.2-1+deb12u1
 libv4l-0==1.22.1-5+b2
 libv4lconvert0==1.22.1-5+b2
 libva-drm2==2.17.0-1
@@ -1473,14 +1479,14 @@ libzvbi0==0.2.41-1
 libzzip-0-13==0.13.72+dfsg.1-1.1
 licensecheck==3.3.5-1
 lintian==2.116.3
-linux-compiler-gcc-12-x86==6.1.69-1
-linux-headers-6.1.0-17-amd64==6.1.69-1
-linux-headers-6.1.0-17-arm64==6.1.69-1
-linux-headers-6.1.0-17-common==6.1.69-1
-linux-headers-amd64==6.1.69-1
-linux-headers-arm64==6.1.69-1
-linux-kbuild-6.1==6.1.69-1
-linux-libc-dev==6.1.69-1
+linux-compiler-gcc-12-x86==6.1.76-1
+linux-headers-6.1.0-18-amd64==6.1.76-1
+linux-headers-6.1.0-18-arm64==6.1.76-1
+linux-headers-6.1.0-18-common==6.1.76-1
+linux-headers-amd64==6.1.76-1
+linux-headers-arm64==6.1.76-1
+linux-kbuild-6.1==6.1.76-1
+linux-libc-dev==6.1.76-1
 linuxdoc-tools==0.9.82-1
 llvm-14==1:14.0.6-12
 llvm-14-dev==1:14.0.6-12
@@ -1488,7 +1494,7 @@ llvm-14-linker-tools==1:14.0.6-12
 llvm-14-runtime==1:14.0.6-12
 llvm-14-tools==1:14.0.6-12
 lmodern==2.005-1
-locales==2.36-9+deb12u3
+locales==2.36-9+deb12u4
 logrotate==3.21.0-1
 lsb-release==12.0-1
 lsof==4.95.0-1
@@ -1507,7 +1513,7 @@ man-db==2.11.2-2
 man2html-base==1.6g-14
 manpages==6.03-2
 manpages-dev==6.03-2
-mariadb-common==1:10.11.4-1~deb12u1
+mariadb-common==1:10.11.6-0+deb12u1
 maven==3.8.7-1
 maven-debian-helper==2.6.3
 maven-repo-helper==1.11
@@ -1517,6 +1523,7 @@ mesa-vdpau-drivers==22.3.6-1+deb12u1
 mesa-vulkan-drivers==22.3.6-1+deb12u1
 mime-support==3.66
 module-assistant==0.11.11
+mount==2.38.1-5+deb12u1
 mupdf-tools==1.21.1+ds2-1+b4
 mysql-common==5.8+1.1.0
 ncurses-term==6.4-4
@@ -1535,16 +1542,16 @@ nodejs-doc==18.19.0+dfsg-6~deb12u1
 nss-plugin-pem==1.0.8+1-1
 ocl-icd-libopencl1==2.3.1-1
 openjade==1.4devel1-22
-openjdk-17-jdk==17.0.9+9-1~deb12u1
-openjdk-17-jdk-headless==17.0.9+9-1~deb12u1
-openjdk-17-jre==17.0.9+9-1~deb12u1
-openjdk-17-jre-headless==17.0.9+9-1~deb12u1
+openjdk-17-jdk==17.0.10+7-1~deb12u1
+openjdk-17-jdk-headless==17.0.10+7-1~deb12u1
+openjdk-17-jre==17.0.10+7-1~deb12u1
+openjdk-17-jre-headless==17.0.10+7-1~deb12u1
 opensp==1.5.2-13+b2
 openssh-client==1:9.2p1-2+deb12u2
 openssh-server==1:9.2p1-2+deb12u2
 openssh-sftp-server==1:9.2p1-2+deb12u2
 openssl==3.0.11-1~deb12u2
-ovmf==2022.11-6
+ovmf==2022.11-6+deb12u1
 packagekit==1.2.6-5
 packagekit-tools==1.2.6-5
 pahole==1.24-4.1
@@ -1740,12 +1747,12 @@ python3.11-dbg==3.11.2-6
 python3.11-dev==3.11.2-6
 python3.11-minimal==3.11.2-6
 python3.11-venv==3.11.2-6
-qemu-block-extra==1:7.2+dfsg-7+deb12u3
-qemu-system-common==1:7.2+dfsg-7+deb12u3
-qemu-system-data==1:7.2+dfsg-7+deb12u3
-qemu-system-gui==1:7.2+dfsg-7+deb12u3
-qemu-system-x86==1:7.2+dfsg-7+deb12u3
-qemu-utils==1:7.2+dfsg-7+deb12u3
+qemu-block-extra==1:7.2+dfsg-7+deb12u5
+qemu-system-common==1:7.2+dfsg-7+deb12u5
+qemu-system-data==1:7.2+dfsg-7+deb12u5
+qemu-system-gui==1:7.2+dfsg-7+deb12u5
+qemu-system-x86==1:7.2+dfsg-7+deb12u5
+qemu-utils==1:7.2+dfsg-7+deb12u5
 qt5-gtk-platformtheme==5.15.8+dfsg-11
 qt5-qmake==5.15.8+dfsg-11
 qt5-qmake-bin==5.15.8+dfsg-11
@@ -1794,9 +1801,9 @@ strace==6.1-0.1
 sudo==1.9.13p3-1+deb12u1
 swig==4.1.0-0.2
 swig4.0==4.1.0-0.2
-systemd==252.19-1~deb12u1
-systemd-sysv==252.19-1~deb12u1
-systemd-timesyncd==252.19-1~deb12u1
+systemd==252.22-1~deb12u1
+systemd-sysv==252.22-1~deb12u1
+systemd-timesyncd==252.22-1~deb12u1
 t1utils==1.41-4
 tcl==8.6.13
 tcl8.6==8.6.13+dfsg-2
@@ -1823,7 +1830,9 @@ tk8.6==8.6.13-2
 tk8.6-blt2.5==2.5.3+dfsg-4.1
 ucf==3.0043+nmu1
 unzip==6.0-28
-uuid-dev==2.38.1-5+b1
+util-linux==2.38.1-5+deb12u1
+util-linux-extra==2.38.1-5+deb12u1
+uuid-dev==2.38.1-5+deb12u1
 va-driver-all==2.17.0-1
 vdpau-driver-all==1.5-2
 velocity==1.7-6
diff --git a/files/build/versions/dockers/sonic-slave-bookworm/versions-deb-bookworm-armhf b/files/build/versions/dockers/sonic-slave-bookworm/versions-deb-bookworm-armhf
index 42afef5cd..c574ebc8d 100644
--- a/files/build/versions/dockers/sonic-slave-bookworm/versions-deb-bookworm-armhf
+++ b/files/build/versions/dockers/sonic-slave-bookworm/versions-deb-bookworm-armhf
@@ -3,7 +3,7 @@ dctrl-tools==2.24-3
 dvipng==1.15-1.1
 libnanomsg-dev==1.1.5+dfsg-1.1
 libnanomsg5==1.1.5+dfsg-1.1
-linux-compiler-gcc-12-arm==6.1.69-1
-linux-headers-6.1.0-17-armmp==6.1.69-1
-linux-headers-armmp==6.1.69-1
+linux-compiler-gcc-12-arm==6.1.76-1
+linux-headers-6.1.0-18-armmp==6.1.76-1
+linux-headers-armmp==6.1.76-1
 wget==1.21.3-1+b1
diff --git a/files/build/versions/dockers/sonic-slave-bookworm/versions-mirror b/files/build/versions/dockers/sonic-slave-bookworm/versions-mirror
new file mode 100644
index 000000000..1b3c7013d
--- /dev/null
+++ b/files/build/versions/dockers/sonic-slave-bookworm/versions-mirror
@@ -0,0 +1 @@
+deb.debian.org_debian-security_dists_bookworm-security==2024-04-04T01:14:25Z
diff --git a/files/build/versions/dockers/sonic-slave-bookworm/versions-py3 b/files/build/versions/dockers/sonic-slave-bookworm/versions-py3
index 1ba64419f..f84159bb0 100644
--- a/files/build/versions/dockers/sonic-slave-bookworm/versions-py3
+++ b/files/build/versions/dockers/sonic-slave-bookworm/versions-py3
@@ -63,7 +63,7 @@ parse==1.19.0
 pep517==0.13.0
 pexpect==4.8.0
 pillow==10.0.0
-pip==23.3.2
+pip==24.0
 platformdirs==2.6.0
 pluggy==1.0.0+repack
 ptyprocess==0.7.0
@@ -72,7 +72,7 @@ pyang==2.4.0
 pyangbind==0.8.2
 pyasn1==0.4.8
 pyasn1-modules==0.2.8
-pyfakefs==5.3.4
+pyfakefs==5.3.5
 pygments==2.14.0
 pygobject==3.42.2
 pyhamcrest==2.0.3
@@ -91,13 +91,15 @@ python-magic==0.4.26
 pytz==2022.7.1
 pyxdg==0.28
 pyyaml==6.0
-redis==5.0.1
+redis==5.0.3
 regex==2023.12.25
 requests==2.28.1
 roman==3.3
 scour==0.38.2
 service-identity==18.1.0
 setuptools==66.1.1
+setuptools-scm==8.0.4
+setuptools-scm-git-archive==1.4.1
 six==1.16.0
 snowballstemmer==2.2.0
 soupsieve==2.3.2
diff --git a/files/build/versions/dockers/sonic-slave-bullseye/versions-deb-bullseye b/files/build/versions/dockers/sonic-slave-bullseye/versions-deb-bullseye
index 28a5458df..8b5a7f315 100644
--- a/files/build/versions/dockers/sonic-slave-bullseye/versions-deb-bullseye
+++ b/files/build/versions/dockers/sonic-slave-bullseye/versions-deb-bullseye
@@ -24,9 +24,9 @@ autopoint==0.21-4
 autotools-dev==20180224.1+nmu1
 bash-completion==1:2.11-2
 bc==1.07.1-2+b2
-bind9-dnsutils==1:9.16.44-1~deb11u1
-bind9-host==1:9.16.44-1~deb11u1
-bind9-libs==1:9.16.44-1~deb11u1
+bind9-dnsutils==1:9.16.48-1
+bind9-host==1:9.16.48-1
+bind9-libs==1:9.16.48-1
 binfmt-support==2.2.1-1+deb11u1
 binutils==2.35.2-2
 binutils-aarch64-linux-gnu==2.35.2-2
@@ -35,7 +35,8 @@ binutils-common==2.35.2-2
 binutils-x86-64-linux-gnu==2.35.2-2
 bison==2:3.7.5+dfsg-1
 blt==2.5.3+dfsg-4.1
-bsdextrautils==2.36.1-8+deb11u1
+bsdextrautils==2.36.1-8+deb11u2
+bsdutils==1:2.36.1-8+deb11u2
 build-essential==12.9
 byacc==20140715-1+b1
 bzip2==1.0.8-4
@@ -72,7 +73,7 @@ dconf-service==0.38.0-2
 dctrl-tools==2.24-3+b1
 debhelper==13.3.4
 debian-keyring==2021.07.26
-debootstrap==1.0.123+deb11u1
+debootstrap==1.0.123+deb11u2
 default-jdk==2:1.11-72
 default-jdk-headless==2:1.11-72
 default-jre==2:1.11-72
@@ -91,11 +92,11 @@ dh-strip-nondeterminism==1.12.0-1
 dictionaries-common==1.28.4
 diffstat==1.64-1
 dirmngr==2.2.27-2+deb11u2
-distro-info-data==0.51+deb11u4
+distro-info-data==0.51+deb11u5
 dkms==2.8.4-3
 dmeventd==2:1.02.175-2.1
 dmsetup==2:1.02.175-2.1
-dnsutils==1:9.16.44-1~deb11u1
+dnsutils==1:9.16.48-1
 docbook==4.5-6
 docbook-dsssl==1.79-9.2
 docbook-to-man==1:2.0.0-45
@@ -105,7 +106,7 @@ docbook-xsl==1.79.2+dfsg-1
 docker-buildx-plugin==0.10.5-1~debian.11~bullseye
 docker-ce==5:24.0.2-1~debian.11~bullseye
 docker-ce-cli==5:24.0.2-1~debian.11~bullseye
-docker-ce-rootless-extras==5:25.0.0-1~debian.11~bullseye
+docker-ce-rootless-extras==5:26.0.0-1~debian.11~bullseye
 docker-compose-plugin==2.18.1-1~debian.11~bullseye
 docutils-common==0.16+dfsg-4
 dosfstools==4.2-1
@@ -212,9 +213,9 @@ i965-va-driver==2.4.1+dfsg1-1
 ibverbs-providers==33.2-1
 icc-profiles-free==2.0.1+dfsg-1.1
 icu-devtools==67.1-7
-imagemagick==8:6.9.11.60+dfsg-1.3+deb11u1
-imagemagick-6-common==8:6.9.11.60+dfsg-1.3+deb11u1
-imagemagick-6.q16==8:6.9.11.60+dfsg-1.3+deb11u1
+imagemagick==8:6.9.11.60+dfsg-1.3+deb11u3
+imagemagick-6-common==8:6.9.11.60+dfsg-1.3+deb11u3
+imagemagick-6.q16==8:6.9.11.60+dfsg-1.3+deb11u3
 install-info==6.7.0.dfsg.2-6
 intel-media-va-driver==21.1.1+dfsg1-1
 intltool-debian==0.35.0+20060710.5
@@ -316,7 +317,8 @@ libbind-export-dev==1:9.11.19+dfsg-2.1
 libbinutils==2.35.2-2
 libbit-vector-perl==7.4-1+b7
 libblas3==3.9.0-3+deb11u1
-libblkid-dev==2.36.1-8+deb11u1
+libblkid-dev==2.36.1-8+deb11u2
+libblkid1==2.36.1-8+deb11u2
 libbluray2==1:1.2.1-4+deb11u2
 libboost-atomic-dev==1.74.0.3
 libboost-atomic1.74-dev==1.74.0-9
@@ -382,16 +384,16 @@ libbsh-java==2.0b4-20
 libbz2-dev==1.0.8-4
 libc-ares-dev==1.17.1-1+deb11u3
 libc-ares2==1.17.1-1+deb11u3
-libc-dev-bin==2.31-13+deb11u7
-libc-devtools==2.31-13+deb11u7
-libc-l10n==2.31-13+deb11u7
+libc-dev-bin==2.31-13+deb11u8
+libc-devtools==2.31-13+deb11u8
+libc-l10n==2.31-13+deb11u8
 libc6-armhf-cross==2.31-9cross4
-libc6-dbg==2.31-13+deb11u7
-libc6-dev==2.31-13+deb11u7
-libc6-dev-i386==2.31-13+deb11u7
-libc6-dev-x32==2.31-13+deb11u7
-libc6-i386==2.31-13+deb11u7
-libc6-x32==2.31-13+deb11u7
+libc6-dbg==2.31-13+deb11u8
+libc6-dev==2.31-13+deb11u8
+libc6-dev-i386==2.31-13+deb11u8
+libc6-dev-x32==2.31-13+deb11u8
+libc6-i386==2.31-13+deb11u8
+libc6-x32==2.31-13+deb11u8
 libcaca0==0.99.beta19-2.2
 libcacard0==1:2.8.0-3
 libcairo-gobject2==1.16.0-5
@@ -483,7 +485,7 @@ libdbus-glib-1-2==0.110-6
 libdbus-glib-1-dev==0.110-6
 libdbus-glib-1-dev-bin==0.110-6
 libdconf1==0.38.0-2
-libde265-0==1.0.11-0+deb11u1
+libde265-0==1.0.11-0+deb11u3
 libdebhelper-perl==13.3.4
 libdebian-source-perl==0.116
 libdebuginfod1==0.183-1
@@ -499,7 +501,7 @@ libdevel-stacktrace-perl==2.0400-1
 libdevmapper-event1.02.1==2:1.02.175-2.1
 libdevmapper1.02.1==2:1.02.175-2.1
 libdist-checkconflicts-perl==0.11-1.1
-libdistro-info-perl==1.0
+libdistro-info-perl==1.0+deb11u1
 libdjvulibre-text==3.5.28-2
 libdjvulibre21==3.5.28-2
 libdns-export1110==1:9.11.19+dfsg-2.1
@@ -625,11 +627,11 @@ libglapi-mesa==20.3.5-1
 libgles-dev==1.3.2-1
 libgles1==1.3.2-1
 libgles2==1.3.2-1
-libglib2.0-0==2.66.8-1
-libglib2.0-bin==2.66.8-1
-libglib2.0-data==2.66.8-1
-libglib2.0-dev==2.66.8-1
-libglib2.0-dev-bin==2.66.8-1
+libglib2.0-0==2.66.8-1+deb11u1
+libglib2.0-bin==2.66.8-1+deb11u1
+libglib2.0-data==2.66.8-1+deb11u1
+libglib2.0-dev==2.66.8-1+deb11u1
+libglib2.0-dev-bin==2.66.8-1+deb11u1
 libglu1-mesa==9.0.1-1
 libglu1-mesa-dev==9.0.1-1
 libglvnd-dev==1.3.2-1
@@ -641,7 +643,7 @@ libgme0==0.6.3-2
 libgmock-dev==1.10.0.20201025-1.1
 libgmp-dev==2:6.2.1+dfsg-1+deb11u1
 libgmpxx4ldbl==2:6.2.1+dfsg-1+deb11u1
-libgnutls-dane0==3.7.1-5+deb11u3
+libgnutls-dane0==3.7.1-5+deb11u4
 libgomp1==10.2.1-6
 libgomp1-armhf-cross==10.2.1-6cross1
 libgoogle-gson-java==2.8.6-1+deb11u1
@@ -824,15 +826,15 @@ liblzo2-2==2.10-2
 liblzo2-dev==2.10-2
 libmagic-mgc==1:5.39-3+deb11u1
 libmagic1==1:5.39-3+deb11u1
-libmagickcore-6.q16-6==8:6.9.11.60+dfsg-1.3+deb11u1
-libmagickcore-6.q16-6-extra==8:6.9.11.60+dfsg-1.3+deb11u1
-libmagickwand-6.q16-6==8:6.9.11.60+dfsg-1.3+deb11u1
+libmagickcore-6.q16-6==8:6.9.11.60+dfsg-1.3+deb11u3
+libmagickcore-6.q16-6-extra==8:6.9.11.60+dfsg-1.3+deb11u3
+libmagickwand-6.q16-6==8:6.9.11.60+dfsg-1.3+deb11u3
 libmail-sendmail-perl==0.80-1.1
 libmailtools-perl==2.21-1
 libmailutils7==1:3.10-3+b1
-libmariadb-dev==1:10.5.21-0+deb11u1
-libmariadb-dev-compat==1:10.5.21-0+deb11u1
-libmariadb3==1:10.5.21-0+deb11u1
+libmariadb-dev==1:10.5.23-0+deb11u1
+libmariadb-dev-compat==1:10.5.23-0+deb11u1
+libmariadb3==1:10.5.23-0+deb11u1
 libmarkdown2==2.2.6-1
 libmaven-archiver-java==3.2.0-2.1
 libmaven-clean-plugin-java==3.1.0-1
@@ -872,7 +874,8 @@ libmoose-perl==2.2014-2
 libmoosex-aliases-perl==0.11-1.1
 libmoox-aliases-perl==0.001006-1.1
 libmoox-struct-perl==0.020-1
-libmount-dev==2.36.1-8+deb11u1
+libmount-dev==2.36.1-8+deb11u2
+libmount1==2.36.1-8+deb11u2
 libmouse-perl==2.5.10-1+b1
 libmp3lame0==3.100-3
 libmpc3==1.2.0-1
@@ -904,7 +907,7 @@ libnewt-dev==0.52.21-4+b3
 libnewt0.52==0.52.21-4+b3
 libnfnetlink-dev==1.0.1-3+b1
 libnfnetlink0==1.0.1-3+b1
-libnftables1==0.9.8-3.1+deb11u1
+libnftables1==0.9.8-3.1+deb11u2
 libnftnl-dev==1.1.9-1
 libnftnl11==1.1.9-1
 libnghttp2-14==1.43.0-1+deb11u1
@@ -989,8 +992,8 @@ libpcsclite-dev==1.9.1-1
 libpcsclite1==1.9.1-1
 libpdfbox-java==1:1.8.16-2
 libpegdown-java==1.6.0-1.1
-libperl-dev==5.32.1-4+deb11u2
-libperl5.32==5.32.1-4+deb11u2
+libperl-dev==5.32.1-4+deb11u3
+libperl5.32==5.32.1-4+deb11u3
 libperlio-gzip-perl==0.19-1+b7
 libpfm4==4.11.1+git32-gd0b85fb-1
 libpgm-5.3-0==5.3.128~dfsg-2
@@ -1122,6 +1125,7 @@ libslf4j-java==1.7.30-1
 libslirp0==4.4.0-1+deb11u2
 libsm-dev==2:1.2.3-1
 libsm6==2:1.2.3-1
+libsmartcols1==2.36.1-8+deb11u2
 libsnappy-java==1.1.8.3-1
 libsnappy-jni==1.1.8.3-1
 libsnappy1v5==1.1.8-1
@@ -1222,7 +1226,7 @@ libuchardet0==0.0.7-1
 libucx0==1.10.1~rc1+really.1.10.0-1
 libudev-dev==247.3-7+deb11u4
 libudfread0==1.1.1-1
-libunbound8==1.13.1-1+deb11u1
+libunbound8==1.13.1-1+deb11u2
 libunicode-linebreak-perl==0.0.20190101-1+b3
 libunicode-utf8-perl==0.62-1+b2
 libunivocity-parsers-java==2.8.3-2
@@ -1236,7 +1240,8 @@ libusb-1.0-0-dev==2:1.0.24-3
 libusb-1.0-doc==2:1.0.24-3
 libusb-dev==2:0.1.12-32
 libusbredirparser1==0.8.0-1+b1
-libuv1==1.40.0-2
+libuuid1==2.36.1-8+deb11u2
+libuv1==1.40.0-2+deb11u1
 libv4l-0==1.20.0-2
 libv4lconvert0==1.20.0-2
 libva-drm2==2.10.0-1
@@ -1410,26 +1415,26 @@ libyaml-libyaml-perl==0.82+repack-1+b1
 libyaml-tiny-perl==1.73-1
 libz3-4==4.8.10-1
 libz3-dev==4.8.10-1
-libzmq3-dev==4.3.4-1
-libzmq5==4.3.4-1
+libzmq3-dev==4.3.4-1+deb11u1
+libzmq5==4.3.4-1+deb11u1
 libzvbi-common==0.2.35-18
 libzvbi0==0.2.35-18
 libzzip-0-13==0.13.62-3.3+deb11u1
 licensecheck==3.1.1-2
 lintian==2.104.0
-linux-compiler-gcc-10-x86==5.10.205-2
-linux-headers-5.10.0-27-amd64==5.10.205-2
-linux-headers-5.10.0-27-arm64==5.10.205-2
-linux-headers-5.10.0-27-common==5.10.205-2
-linux-headers-amd64==5.10.205-2
-linux-headers-arm64==5.10.205-2
-linux-kbuild-5.10==5.10.205-2
-linux-libc-dev==5.10.205-2
+linux-compiler-gcc-10-x86==5.10.209-2
+linux-headers-5.10.0-28-amd64==5.10.209-2
+linux-headers-5.10.0-28-arm64==5.10.209-2
+linux-headers-5.10.0-28-common==5.10.209-2
+linux-headers-amd64==5.10.209-2
+linux-headers-arm64==5.10.209-2
+linux-kbuild-5.10==5.10.209-2
+linux-libc-dev==5.10.209-2
 linuxdoc-tools==0.9.82-1
 llvm-11==1:11.0.1-2
 llvm-11-runtime==1:11.0.1-2
 lmodern==2.004.5-6.1
-locales==2.31-13+deb11u7
+locales==2.31-13+deb11u8
 logrotate==3.18.0-2+deb11u2
 lsb-release==11.1.0
 lsof==4.93.2+dfsg-1.1
@@ -1452,7 +1457,7 @@ man-db==2.9.4-2
 man2html-base==1.6g-14
 manpages==5.10-1
 manpages-dev==5.10-1
-mariadb-common==1:10.5.21-0+deb11u1
+mariadb-common==1:10.5.23-0+deb11u1
 maven==3.6.3-5
 maven-debian-helper==2.6
 maven-repo-helper==1.10
@@ -1462,26 +1467,27 @@ mesa-vdpau-drivers==20.3.5-1
 mesa-vulkan-drivers==20.3.5-1
 mime-support==3.66
 module-assistant==0.11.10
+mount==2.36.1-8+deb11u2
 mysql-common==5.8+1.0.7
 ncurses-term==6.2+20201114-2+deb11u2
 netbase==6.3
 netpbm==2:10.0-15.4
-nftables==0.9.8-3.1+deb11u1
+nftables==0.9.8-3.1+deb11u2
 nlohmann-json3-dev==3.9.1-1
 node-jquery==3.5.1+dfsg+~3.5.5-7
 nodejs==14.21.3-deb-1nodesource1
 ocl-icd-libopencl1==2.2.14-2
 openjade==1.4devel1-22
-openjdk-11-jdk==11.0.21+9-1~deb11u1
-openjdk-11-jdk-headless==11.0.21+9-1~deb11u1
-openjdk-11-jre==11.0.21+9-1~deb11u1
-openjdk-11-jre-headless==11.0.21+9-1~deb11u1
+openjdk-11-jdk==11.0.22+7-1~deb11u1
+openjdk-11-jdk-headless==11.0.22+7-1~deb11u1
+openjdk-11-jre==11.0.22+7-1~deb11u1
+openjdk-11-jre-headless==11.0.22+7-1~deb11u1
 opensp==1.5.2-13+b2
 openssh-client==1:8.4p1-5+deb11u3
 openssh-server==1:8.4p1-5+deb11u3
 openssh-sftp-server==1:8.4p1-5+deb11u3
 openssl==1.1.1w-0+deb11u1
-ovmf==2020.11-2+deb11u1
+ovmf==2020.11-2+deb11u2
 packagekit==1.2.2-2
 packagekit-tools==1.2.2-2
 pango1.0-tools==1.46.2-3
@@ -1490,8 +1496,8 @@ patchutils==0.4.2-1
 pbuilder==0.231
 pbzip2==1.1.13-1
 pci.ids==0.0~2021.02.08-1
-perl==5.32.1-4+deb11u2
-perl-modules-5.32==5.32.1-4+deb11u2
+perl==5.32.1-4+deb11u3
+perl-modules-5.32==5.32.1-4+deb11u3
 perl-openssl-defaults==5
 php-cli==2:7.4+76
 php-codecoverage==9.2.5+dfsg-3
@@ -1595,7 +1601,7 @@ python3-dbg==3.9.2-3
 python3-dbus==1.2.16-5
 python3-debian==0.1.39
 python3-dev==3.9.2-3
-python3-distro-info==1.0
+python3-distro-info==1.0+deb11u1
 python3-distutils==3.9.2-1
 python3-docutils==0.16+dfsg-4
 python3-gi==3.38.0-2
@@ -1766,7 +1772,8 @@ tk8.6-blt2.5==2.5.3+dfsg-4.1
 ucf==3.0043
 unattended-upgrades==2.8
 unzip==6.0-26+deb11u1
-uuid-dev==2.36.1-8+deb11u1
+util-linux==2.36.1-8+deb11u2
+uuid-dev==2.36.1-8+deb11u2
 va-driver-all==2.10.0-1
 vdpau-driver-all==1.4-3
 velocity==1.7-6
diff --git a/files/build/versions/dockers/sonic-slave-bullseye/versions-deb-bullseye-armhf b/files/build/versions/dockers/sonic-slave-bullseye/versions-deb-bullseye-armhf
index faf01b854..05c16b6c8 100644
--- a/files/build/versions/dockers/sonic-slave-bullseye/versions-deb-bullseye-armhf
+++ b/files/build/versions/dockers/sonic-slave-bullseye/versions-deb-bullseye-armhf
@@ -5,7 +5,7 @@ golang-1.15-src==1.15.15-1~deb11u4
 libjpeg-dev==1:2.0.6-4
 libjpeg62-turbo-dev==1:2.0.6-4
 libunicode-linebreak-perl==0.0.20190101-1+b2
-linux-compiler-gcc-10-arm==5.10.205-2
-linux-headers-5.10.0-27-armmp==5.10.205-2
-linux-headers-armmp==5.10.205-2
+linux-compiler-gcc-10-arm==5.10.209-2
+linux-headers-5.10.0-28-armmp==5.10.209-2
+linux-headers-armmp==5.10.209-2
 nasm==2.15.05-1
diff --git a/files/build/versions/dockers/sonic-slave-bullseye/versions-py3 b/files/build/versions/dockers/sonic-slave-bullseye/versions-py3
index 3b9b3be6d..2130d9b09 100644
--- a/files/build/versions/dockers/sonic-slave-bullseye/versions-py3
+++ b/files/build/versions/dockers/sonic-slave-bullseye/versions-py3
@@ -20,7 +20,7 @@ ctypesgen==1.0.2
 dblatex==0.3.12
 dbus-python==1.2.16
 devscripts==2.21.3+deb11u1
-distro-info==1.0
+distro-info==1.0+deb11u1
 docutils==0.16
 fastentrypoints==0.12
 gbp==0.9.22
@@ -60,9 +60,9 @@ parameterized==0.8.1
 parse==1.6.6
 pexpect==4.8.0
 pillow==9.4.0
-pip==23.3.2
+pip==24.0
 pluggy==0.13.0
-protobuf==4.25.2
+protobuf==4.25.3
 ptyprocess==0.7.0
 py==1.10.0
 pyang==2.4.0
@@ -70,7 +70,7 @@ pyangbind==0.8.1
 pyasn1==0.4.8
 pyasn1-modules==0.2.1
 pycurl==7.43.0.6
-pyfakefs==5.3.4
+pyfakefs==5.3.5
 pygments==2.7.1
 pygobject==3.38.0
 pyhamcrest==1.9.0
@@ -88,7 +88,7 @@ python-magic==0.4.20
 pytz==2021.1
 pyxdg==0.27
 pyyaml==5.4.1
-redis==5.0.1
+redis==5.0.3
 regex==2023.12.25
 requests==2.25.1
 roman==2.0.0
diff --git a/files/build/versions/dockers/sonic-slave-buster/versions-deb-buster b/files/build/versions/dockers/sonic-slave-buster/versions-deb-buster
index 84fc7427e..bd7630fea 100644
--- a/files/build/versions/dockers/sonic-slave-buster/versions-deb-buster
+++ b/files/build/versions/dockers/sonic-slave-buster/versions-deb-buster
@@ -23,7 +23,7 @@ autopoint==0.19.8.1-9
 autotools-dev==20180224.1
 bash-completion==1:2.8-6
 bc==1.07.1-2+b1
-bind9-host==1:9.11.5.P4+dfsg-5.1+deb10u9
+bind9-host==1:9.11.5.P4+dfsg-5.1+deb10u10
 binfmt-support==2.2.0-2
 binutils==2.31.1-16
 binutils-aarch64-linux-gnu==2.31.1-16
@@ -57,7 +57,7 @@ cpp==4:8.3.0-1
 cpp-8==8.3.0-6
 cppcheck==1.86-1
 cron==3.0pl1-134+deb10u1
-curl==7.64.0-4+deb10u8
+curl==7.64.0-4+deb10u9
 dbus==1.12.28-0+deb10u1
 dbus-user-session==1.12.28-0+deb10u1
 dconf-gsettings-backend==0.30.1-2
@@ -86,7 +86,7 @@ distro-info-data==0.41+deb10u8
 dkms==2.6.1-4
 dmeventd==2:1.02.155-3
 dmsetup==2:1.02.155-3
-dnsutils==1:9.11.5.P4+dfsg-5.1+deb10u9
+dnsutils==1:9.11.5.P4+dfsg-5.1+deb10u10
 docbook==4.5-6
 docbook-dsssl==1.79-9.1
 docbook-to-man==1:2.0.0-42
@@ -95,7 +95,7 @@ docbook-xml==4.5-8
 docker-buildx-plugin==0.10.5-1~debian.10~buster
 docker-ce==5:24.0.2-1~debian.10~buster
 docker-ce-cli==5:24.0.2-1~debian.10~buster
-docker-ce-rootless-extras==5:25.0.0-1~debian.10~buster
+docker-ce-rootless-extras==5:26.0.0-1~debian.10~buster
 docker-compose-plugin==2.18.1-1~debian.10~buster
 docutils-common==0.14+dfsg-4
 docutils-doc==0.14+dfsg-4
@@ -191,9 +191,9 @@ i965-va-driver==2.3.0+dfsg1-1
 ibverbs-providers==22.1-1
 icc-profiles-free==2.0.1+dfsg-1
 icu-devtools==63.1-6+deb10u3
-imagemagick==8:6.9.10.23+dfsg-2.1+deb10u5
-imagemagick-6-common==8:6.9.10.23+dfsg-2.1+deb10u5
-imagemagick-6.q16==8:6.9.10.23+dfsg-2.1+deb10u5
+imagemagick==8:6.9.10.23+dfsg-2.1+deb10u7
+imagemagick-6-common==8:6.9.10.23+dfsg-2.1+deb10u7
+imagemagick-6.q16==8:6.9.10.23+dfsg-2.1+deb10u7
 install-info==6.5.0.dfsg.1-4+b1
 intel-media-va-driver==18.4.1+dfsg1-1
 intltool-debian==0.35.0+20060710.5
@@ -287,8 +287,8 @@ libbabeltrace-dev==1.5.6-2+deb10u1
 libbabeltrace1==1.5.6-2+deb10u1
 libbatik-java==1.10-2+deb10u3
 libbdplus0==0.1.2-3
-libbind-export-dev==1:9.11.5.P4+dfsg-5.1+deb10u9
-libbind9-161==1:9.11.5.P4+dfsg-5.1+deb10u9
+libbind-export-dev==1:9.11.5.P4+dfsg-5.1+deb10u10
+libbind9-161==1:9.11.5.P4+dfsg-5.1+deb10u10
 libbinutils==2.31.1-16
 libbison-dev==2:3.3.2.dfsg-1
 libbit-vector-perl==7.4-1+b5
@@ -418,9 +418,9 @@ libcunit1-dev==2.1-3-dfsg-2+b12
 libcups2==2.2.10-6+deb10u9
 libcupsfilters1==1.21.6-5+deb10u1
 libcupsimage2==2.2.10-6+deb10u9
-libcurl3-gnutls==7.64.0-4+deb10u8
-libcurl4==7.64.0-4+deb10u8
-libcurl4-openssl-dev==7.64.0-4+deb10u8
+libcurl3-gnutls==7.64.0-4+deb10u9
+libcurl4==7.64.0-4+deb10u9
+libcurl4-openssl-dev==7.64.0-4+deb10u9
 libdaemon-dev==0.14-7
 libdaemon0==0.14-7
 libdata-dump-perl==1.23-1
@@ -452,8 +452,8 @@ libdist-checkconflicts-perl==0.11-1
 libdistro-info-perl==0.21+deb10u1
 libdjvulibre-text==3.5.27.1-10+deb10u1
 libdjvulibre21==3.5.27.1-10+deb10u1
-libdns-export1104==1:9.11.5.P4+dfsg-5.1+deb10u9
-libdns1104==1:9.11.5.P4+dfsg-5.1+deb10u9
+libdns-export1104==1:9.11.5.P4+dfsg-5.1+deb10u10
+libdns1104==1:9.11.5.P4+dfsg-5.1+deb10u10
 libdom4j-java==2.1.1-2
 libdouble-conversion1==3.1.0-3
 libdoxia-core-java==1.7-2
@@ -581,10 +581,10 @@ libgme0==0.6.2-1
 libgmock-dev==1.8.1-3
 libgmp-dev==2:6.1.2+dfsg-4+deb10u1
 libgmpxx4ldbl==2:6.1.2+dfsg-4+deb10u1
-libgnutls-dane0==3.6.7-4+deb10u11
-libgnutls-openssl27==3.6.7-4+deb10u11
-libgnutls28-dev==3.6.7-4+deb10u11
-libgnutlsxx28==3.6.7-4+deb10u11
+libgnutls-dane0==3.6.7-4+deb10u12
+libgnutls-openssl27==3.6.7-4+deb10u12
+libgnutls28-dev==3.6.7-4+deb10u12
+libgnutlsxx28==3.6.7-4+deb10u12
 libgomp1==8.3.0-6
 libgoogle-perftools4==2.7-1
 libgpgme11==1.12.0-6
@@ -675,14 +675,14 @@ libipc-system-simple-perl==1.25-4
 libipt2==2.0-2
 libiptc-dev==1.8.2-4
 libiptc0==1.8.2-4
-libirs-export161==1:9.11.5.P4+dfsg-5.1+deb10u9
-libirs161==1:9.11.5.P4+dfsg-5.1+deb10u9
-libisc-export1100==1:9.11.5.P4+dfsg-5.1+deb10u9
-libisc1100==1:9.11.5.P4+dfsg-5.1+deb10u9
-libisccc-export161==1:9.11.5.P4+dfsg-5.1+deb10u9
-libisccc161==1:9.11.5.P4+dfsg-5.1+deb10u9
-libisccfg-export163==1:9.11.5.P4+dfsg-5.1+deb10u9
-libisccfg163==1:9.11.5.P4+dfsg-5.1+deb10u9
+libirs-export161==1:9.11.5.P4+dfsg-5.1+deb10u10
+libirs161==1:9.11.5.P4+dfsg-5.1+deb10u10
+libisc-export1100==1:9.11.5.P4+dfsg-5.1+deb10u10
+libisc1100==1:9.11.5.P4+dfsg-5.1+deb10u10
+libisccc-export161==1:9.11.5.P4+dfsg-5.1+deb10u10
+libisccc161==1:9.11.5.P4+dfsg-5.1+deb10u10
+libisccfg-export163==1:9.11.5.P4+dfsg-5.1+deb10u10
+libisccfg163==1:9.11.5.P4+dfsg-5.1+deb10u10
 libisl19==0.20-2
 libitext1-java==1.4-7
 libitm1==8.3.0-6
@@ -762,20 +762,20 @@ liblua5.1-0-dev==5.1.5-8.1+b2
 liblvm2cmd2.03==2.03.02-3
 liblwp-mediatypes-perl==6.02-1
 liblwp-protocol-https-perl==6.07-2
-liblwres161==1:9.11.5.P4+dfsg-5.1+deb10u9
+liblwres161==1:9.11.5.P4+dfsg-5.1+deb10u10
 liblzma-dev==5.2.4-1+deb10u1
 liblzo2-2==2.10-0.1
 liblzo2-dev==2.10-0.1
 libmagic-mgc==1:5.35-4+deb10u2
 libmagic1==1:5.35-4+deb10u2
-libmagickcore-6.q16-6==8:6.9.10.23+dfsg-2.1+deb10u5
-libmagickcore-6.q16-6-extra==8:6.9.10.23+dfsg-2.1+deb10u5
-libmagickwand-6.q16-6==8:6.9.10.23+dfsg-2.1+deb10u5
+libmagickcore-6.q16-6==8:6.9.10.23+dfsg-2.1+deb10u7
+libmagickcore-6.q16-6-extra==8:6.9.10.23+dfsg-2.1+deb10u7
+libmagickwand-6.q16-6==8:6.9.10.23+dfsg-2.1+deb10u7
 libmail-sendmail-perl==0.80-1
 libmailtools-perl==2.18-1
-libmariadb-dev==1:10.3.39-0+deb10u1
-libmariadb-dev-compat==1:10.3.39-0+deb10u1
-libmariadb3==1:10.3.39-0+deb10u1
+libmariadb-dev==1:10.3.39-0+deb10u2
+libmariadb-dev-compat==1:10.3.39-0+deb10u2
+libmariadb3==1:10.3.39-0+deb10u2
 libmaven-archiver-java==3.2.0-2
 libmaven-clean-plugin-java==3.1.0-1
 libmaven-common-artifact-filters-java==3.0.1-3
@@ -849,7 +849,7 @@ libnorm1==1.5.8+dfsg2-1
 libnpth0==1.6-1
 libnspr4==2:4.20-1
 libnss-systemd==241-7~deb10u10
-libnss3==2:3.42.1-1+deb10u7
+libnss3==2:3.42.1-1+deb10u8
 libnuma-dev==2.0.12-1
 libnuma1==2.0.12-1
 libnumber-compare-perl==0.03-1
@@ -974,20 +974,20 @@ libpython-dev==2.7.16-1
 libpython-stdlib==2.7.16-1
 libpython2-dev==2.7.16-1
 libpython2-stdlib==2.7.16-1
-libpython2.7==2.7.16-2+deb10u3
-libpython2.7-dev==2.7.16-2+deb10u3
-libpython2.7-minimal==2.7.16-2+deb10u3
-libpython2.7-stdlib==2.7.16-2+deb10u3
+libpython2.7==2.7.16-2+deb10u4
+libpython2.7-dev==2.7.16-2+deb10u4
+libpython2.7-minimal==2.7.16-2+deb10u4
+libpython2.7-stdlib==2.7.16-2+deb10u4
 libpython3-all-dbg==3.7.3-1
 libpython3-all-dev==3.7.3-1
 libpython3-dbg==3.7.3-1
 libpython3-dev==3.7.3-1
 libpython3-stdlib==3.7.3-1
-libpython3.7==3.7.3-2+deb10u6
-libpython3.7-dbg==3.7.3-2+deb10u6
-libpython3.7-dev==3.7.3-2+deb10u6
-libpython3.7-minimal==3.7.3-2+deb10u6
-libpython3.7-stdlib==3.7.3-2+deb10u6
+libpython3.7==3.7.3-2+deb10u7
+libpython3.7-dbg==3.7.3-2+deb10u7
+libpython3.7-dev==3.7.3-2+deb10u7
+libpython3.7-minimal==3.7.3-2+deb10u7
+libpython3.7-stdlib==3.7.3-2+deb10u7
 libqdox-java==1.12.1-3
 libqdox2-java==2.0~M10-1
 libqt4-dbus==4:4.8.7+dfsg-18+deb10u2
@@ -1147,7 +1147,7 @@ libthai-data==0.1.28-2
 libthai0==0.1.28-2
 libtheora0==1.1.1+dfsg.1-15
 libtie-ixhash-perl==1.23-2
-libtiff5==4.1.0+git191117-2~deb10u8
+libtiff5==4.1.0+git191117-2~deb10u9
 libtimedate-perl==2.3000-2+deb10u1
 libtinyxml2-6a==7.0.0+dfsg-1
 libtinyxml2-dev==7.0.0+dfsg-1
@@ -1163,7 +1163,7 @@ libtypes-serialiser-perl==1.0-1
 libubsan1==8.3.0-6
 libuchardet0==0.0.6-3
 libudev-dev==241-7~deb10u10
-libunbound8==1.9.0-2+deb10u3
+libunbound8==1.9.0-2+deb10u4
 libunicode-utf8-perl==0.62-1
 libunwind-dev==1.2.1-10~deb10u1
 libunwind8==1.2.1-10~deb10u1
@@ -1175,7 +1175,7 @@ libusb-1.0-doc==2:1.0.22-2
 libusb-dev==2:0.1.12-32
 libusbredirparser1==0.8.0-1
 libutempter0==1.1.6-3
-libuv1==1.24.1-1+deb10u1
+libuv1==1.24.1-1+deb10u2
 libv4l-0==1.16.3-3
 libv4lconvert0==1.16.3-3
 libva-drm2==2.4.0-1
@@ -1188,8 +1188,8 @@ libvdpau1==1.1.1-10
 libvelocity-tools-java==2.0-7
 libvidstab1.1==1.1.0-2
 libvirglrenderer0==0.7.0-2+deb10u1
-libvirt-clients==5.0.0-4+deb10u1
-libvirt0==5.0.0-4+deb10u1
+libvirt-clients==5.0.0-4+deb10u2
+libvirt0==5.0.0-4+deb10u2
 libvisual-0.4-0==0.4.0-15
 libvorbis0a==1.3.6-2
 libvorbisenc2==1.3.6-2
@@ -1384,11 +1384,11 @@ lynx==2.8.9rel.1-3+deb10u1
 lynx-common==2.8.9rel.1-3+deb10u1
 m4==1.4.18-2
 make==4.2.1-1.2
-man-db==2.8.5-2
+man-db==2.8.5-2+deb10u1
 man2html-base==1.6g-11
 manpages==4.16-2
 manpages-dev==4.16-2
-mariadb-common==1:10.3.39-0+deb10u1
+mariadb-common==1:10.3.39-0+deb10u2
 maven==3.6.0-1
 maven-debian-helper==2.3.2
 maven-repo-helper==1.9.3
@@ -1407,10 +1407,10 @@ nlohmann-json3-dev==3.5.0-0.1
 nodejs==14.21.3-deb-1nodesource1
 ocl-icd-libopencl1==2.2.12-2
 openjade==1.4devel1-21.3+b1
-openjdk-11-jdk==11.0.21+9-1~deb10u1
-openjdk-11-jdk-headless==11.0.21+9-1~deb10u1
-openjdk-11-jre==11.0.21+9-1~deb10u1
-openjdk-11-jre-headless==11.0.21+9-1~deb10u1
+openjdk-11-jdk==11.0.22+7-1~deb10u1
+openjdk-11-jdk-headless==11.0.22+7-1~deb10u1
+openjdk-11-jre==11.0.22+7-1~deb10u1
+openjdk-11-jre-headless==11.0.22+7-1~deb10u1
 openmpi-bin==3.1.3-11
 openmpi-common==3.1.3-11
 opensp==1.5.2-13+b1
@@ -1528,7 +1528,7 @@ python-incremental==16.10.1-3
 python-ipaddr==2.2.0-2
 python-ipaddress==1.0.17-1+deb10u1
 python-isort==4.3.4+ds1-1.1
-python-jinja2==2.10-2
+python-jinja2==2.10-2+deb10u1
 python-keyring==17.1.1-1
 python-keyrings.alt==3.1.1-1
 python-lazy-object-proxy==1.3.1-1+b1
@@ -1546,7 +1546,7 @@ python-packaging==19.0-1
 python-parse==1.6.6-0.1
 python-pathlib2==2.3.3-1
 python-pbr==4.2.0-5
-python-pil==5.4.1-2+deb10u3
+python-pil==5.4.1-2+deb10u5
 python-pip-whl==18.1-5
 python-pkg-resources==40.8.0-1
 python-pluggy==0.8.0-1
@@ -1583,9 +1583,9 @@ python-zope.interface==4.3.2-1+b2
 python2==2.7.16-1
 python2-dev==2.7.16-1
 python2-minimal==2.7.16-1
-python2.7==2.7.16-2+deb10u3
-python2.7-dev==2.7.16-2+deb10u3
-python2.7-minimal==2.7.16-2+deb10u3
+python2.7==2.7.16-2+deb10u4
+python2.7-dev==2.7.16-2+deb10u4
+python2.7-minimal==2.7.16-2+deb10u4
 python3==3.7.3-1
 python3-alabaster==0.7.8-1
 python3-all==3.7.3-1
@@ -1616,7 +1616,7 @@ python3-gi==3.30.4-1
 python3-gpg==1.12.0-6
 python3-idna==2.6-1
 python3-imagesize==1.0.0-1
-python3-jinja2==2.10-2
+python3-jinja2==2.10-2+deb10u1
 python3-keyring==17.1.1-1
 python3-keyrings.alt==3.1.1-1
 python3-lib2to3==3.7.3-1
@@ -1631,7 +1631,7 @@ python3-nose2==0.8.0-1
 python3-olefile==0.46-1
 python3-packaging==19.0-1
 python3-pbr==4.2.0-5
-python3-pil==5.4.1-2+deb10u3
+python3-pil==5.4.1-2+deb10u5
 python3-pkg-resources==40.8.0-1
 python3-pluggy==0.8.0-1
 python3-py==1.7.0-2
@@ -1653,17 +1653,17 @@ python3-unidiff==0.5.4-1
 python3-urllib3==1.24.1-1+deb10u2
 python3-wheel==0.32.3-2
 python3-xdg==0.25-5
-python3.7==3.7.3-2+deb10u6
-python3.7-dbg==3.7.3-2+deb10u6
-python3.7-dev==3.7.3-2+deb10u6
-python3.7-minimal==3.7.3-2+deb10u6
+python3.7==3.7.3-2+deb10u7
+python3.7-dbg==3.7.3-2+deb10u7
+python3.7-dev==3.7.3-2+deb10u7
+python3.7-minimal==3.7.3-2+deb10u7
 qdbus==4:4.8.7+dfsg-18+deb10u2
-qemu-kvm==1:3.1+dfsg-8+deb10u11
-qemu-system-common==1:3.1+dfsg-8+deb10u11
-qemu-system-data==1:3.1+dfsg-8+deb10u11
-qemu-system-gui==1:3.1+dfsg-8+deb10u11
-qemu-system-x86==1:3.1+dfsg-8+deb10u11
-qemu-utils==1:3.1+dfsg-8+deb10u11
+qemu-kvm==1:3.1+dfsg-8+deb10u12
+qemu-system-common==1:3.1+dfsg-8+deb10u12
+qemu-system-data==1:3.1+dfsg-8+deb10u12
+qemu-system-gui==1:3.1+dfsg-8+deb10u12
+qemu-system-x86==1:3.1+dfsg-8+deb10u12
+qemu-utils==1:3.1+dfsg-8+deb10u12
 qt-at-spi==0.4.0-9
 qt4-linguist-tools==4:4.8.7+dfsg-18+deb10u2
 qt4-qmake==4:4.8.7+dfsg-18+deb10u2
@@ -1711,7 +1711,7 @@ sphinx-rtd-theme-common==0.4.3+dfsg-1
 squashfs-tools==1:4.3-12+deb10u2
 stgit==0.18-1
 strace==4.26-0.2
-sudo==1.8.27-1+deb10u5
+sudo==1.8.27-1+deb10u6
 swig==3.0.12-2
 swig3.0==3.0.12-2
 systemd==241-7~deb10u10
diff --git a/files/build/versions/dockers/sonic-slave-buster/versions-py3 b/files/build/versions/dockers/sonic-slave-buster/versions-py3
index 27cb1be11..eb0bb0009 100644
--- a/files/build/versions/dockers/sonic-slave-buster/versions-py3
+++ b/files/build/versions/dockers/sonic-slave-buster/versions-py3
@@ -25,7 +25,7 @@ jinja2==3.0.3
 keyring==17.1.1
 keyrings.alt==3.1.1
 lxml==4.9.1
-m2crypto==0.40.1
+m2crypto==0.41.0
 mako==1.0.7
 markdown==3.0.1
 markupsafe==2.0.1
@@ -41,7 +41,7 @@ parameterized==0.8.1
 pbr==4.2.0
 pexpect==4.8.0
 pillow==9.4.0
-pip==23.3.2
+pip==24.0
 pluggy==0.8.0
 ptyprocess==0.7.0
 py==1.7.0
@@ -49,7 +49,7 @@ pyang==2.4.0
 pyangbind==0.8.1
 pycrypto==2.6.1
 pycurl==7.43.0.2
-pyfakefs==5.3.4
+pyfakefs==5.3.5
 pygments==2.3.1
 pygobject==3.30.4
 pympler==0.8
@@ -64,7 +64,7 @@ python-magic==0.4.16
 pytz==2019.1
 pyxdg==0.25
 pyyaml==5.4.1
-redis==5.0.1
+redis==5.0.3
 regex==2023.12.25
 requests==2.21.0
 roman==2.0.0
diff --git a/files/build/versions/host-base-image/versions-deb-bookworm b/files/build/versions/host-base-image/versions-deb-bookworm
index 7f4b57b33..6d97d65c7 100644
--- a/files/build/versions/host-base-image/versions-deb-bookworm
+++ b/files/build/versions/host-base-image/versions-deb-bookworm
@@ -1,6 +1,6 @@
 adduser==3.134
 apt==2.6.1
-base-files==12.4+deb12u4
+base-files==12.4+deb12u5
 base-passwd==3.6.1
 bash==5.2.15-2+b2
 bsdutils==1:2.38.1-5+b1
@@ -26,8 +26,8 @@ libaudit-common==1:3.0.9-1
 libaudit1==1:3.0.9-1
 libblkid1==2.38.1-5+b1
 libbz2-1.0==1.0.8-5+b1
-libc-bin==2.36-9+deb12u3
-libc6==2.36-9+deb12u3
+libc-bin==2.36-9+deb12u4
+libc6==2.36-9+deb12u4
 libcap-ng0==0.8.3-1+b3
 libcap2==1:2.66-4
 libcom-err2==1.47.0-2
@@ -39,7 +39,7 @@ libffi8==3.4.4-1
 libgcc-s1==12.2.0-14
 libgcrypt20==1.10.1-3
 libgmp10==2:6.2.1+dfsg1-1.1
-libgnutls30==3.7.9-2+deb12u1
+libgnutls30==3.7.9-2+deb12u2
 libgpg-error0==1.46-1
 libhogweed6==3.8.1-2
 libidn2-0==2.3.3-1+b1
@@ -62,10 +62,10 @@ libsepol2==3.4-2.1
 libsmartcols1==2.38.1-5+b1
 libss2==1.47.0-2
 libstdc++6==12.2.0-14
-libsystemd0==252.19-1~deb12u1
+libsystemd0==252.22-1~deb12u1
 libtasn1-6==4.19.0-2
 libtinfo6==6.4-4
-libudev1==252.19-1~deb12u1
+libudev1==252.22-1~deb12u1
 libunistring2==1.0-2
 libuuid1==2.38.1-5+b1
 libxxhash0==0.8.1-1
@@ -80,9 +80,9 @@ passwd==1:4.13+dfsg1-1+b1
 perl-base==5.36.0-7+deb12u1
 sed==4.9-1
 sysvinit-utils==3.06-4
-tar==1.34+dfsg-1.2
-tzdata==2023c-5+deb12u1
-usr-is-merged==35
+tar==1.34+dfsg-1.2+deb12u1
+tzdata==2024a-0+deb12u1
+usr-is-merged==37~deb12u1
 util-linux==2.38.1-5+b1
 util-linux-extra==2.38.1-5+b1
 zlib1g==1:1.2.13.dfsg-1
diff --git a/files/build/versions/host-image/versions-deb-bookworm b/files/build/versions/host-image/versions-deb-bookworm
index 0ba23f1d4..000547c51 100644
--- a/files/build/versions/host-image/versions-deb-bookworm
+++ b/files/build/versions/host-image/versions-deb-bookworm
@@ -12,8 +12,9 @@ binutils-aarch64-linux-gnu==2.40-2
 binutils-common==2.40-2
 binutils-x86-64-linux-gnu==2.40-2
 bridge-utils==1.7.1-1
-bsdextrautils==2.38.1-5+b1
+bsdextrautils==2.38.1-5+deb12u1
 bsdmainutils==12.1.8
+bsdutils==1:2.38.1-5+deb12u1
 busybox==1:1.35.0-4+b3
 ca-certificates==20230311
 cgroup-tools==2.0.2-2
@@ -41,7 +42,7 @@ eatmydata==130-2
 ebtables==2.0.11-5
 efibootmgr==17-2
 efitools==1.9.2-3
-fdisk==2.38.1-5+b1
+fdisk==2.38.1-5+deb12u1
 file==1:5.44-3
 firmware-amd-graphics==20230210-5
 firmware-linux-nonfree==20230210-5
@@ -49,7 +50,6 @@ firmware-misc-nonfree==20230210-5
 flashrom==0.9.7
 fontconfig-config==2.14.1-4
 fonts-dejavu-core==2.37-6
-freeipmi-common==1.6.10-1
 gcc==4:12.2.0-3
 gcc-12==12.2.0-14
 gdisk==1.0.9-2.1
@@ -79,7 +79,7 @@ isc-dhcp-client==4.4.3-P1-2
 j2cli==0.3.12b-4
 jq==1.6-2.1
 kdump-tools==1:1.8.1
-kernel-mft-dkms-modules-6.1.0-11-2-amd64==4.25.0
+kernel-mft-dkms-modules-6.1.0-11-2-amd64==4.27.0
 kexec-tools==1:2.0.25-3+b1
 klibc-utils==2.0.12-1
 kmod==30+20221128-1
@@ -93,21 +93,22 @@ libatomic1==12.2.0-14
 libauparse0==1:3.0.9-1
 libbabeltrace1==1.5.11-1+b2
 libbinutils==2.40-2
+libblkid1==2.38.1-5+deb12u1
 libboost-serialization1.74.0==1.74.0+ds1-21
 libbpf1==1:1.1.0-1
 libbrotli1==1.0.9-2+b6
 libbsd0==0.11.7-2
 libc-ares2==1.18.1-3
-libc-dev-bin==2.36-9+deb12u3
-libc-l10n==2.36-9+deb12u3
-libc6-dev==2.36-9+deb12u3
+libc-dev-bin==2.36-9+deb12u4
+libc-l10n==2.36-9+deb12u4
+libc6-dev==2.36-9+deb12u4
 libcap2-bin==1:2.66-4
 libcbor0.8==0.8.0-2+b1
 libcc1-0==12.2.0-14
 libcgroup2==2.0.2-2
 libcrack2==2.9.6-5+b1
 libcrypt-dev==1:4.4.33-2
-libcryptsetup12==2:2.6.1-4~deb12u1
+libcryptsetup12==2:2.6.1-4~deb12u2
 libctf-nobfd0==2.40-2
 libctf0==2.40-2
 libcurl4==7.88.1-10+deb12u5
@@ -124,11 +125,10 @@ libelf1==0.188-2.1
 libestr0==0.1.11-1
 libexpat1==2.5.0-1
 libfastjson4==1.2304.0-1
-libfdisk1==2.38.1-5+b1
+libfdisk1==2.38.1-5+deb12u1
 libfdt1==1.6.1-4+b1
 libffi-dev==3.4.4-1
 libfido2-1==1.12.0-2+b1
-libfreeipmi17==1.6.10-1+b1
 libfreetype6==2.12.1+dfsg-5
 libfuse2==2.9.9-6+b1
 libgcc-12-dev==12.2.0-14
@@ -139,6 +139,7 @@ libglib2.0-0==2.74.6-2
 libgomp1==12.2.0-14
 libgpm2==1.20.7-10+b1
 libgprofng0==2.40-2
+libgrpc++1.51==1.51.1-3+b1
 libgrpc29==1.51.1-3+b1
 libgssapi-krb5-2==1.20.1-2+deb12u1
 libhavege2==1.9.14-1+b1
@@ -150,7 +151,7 @@ libicu72==72.1-3
 libiniparser1==4.1-6
 libip4tc2==1.8.9-2
 libip6tc2==1.8.9-2
-libisl23==0.25-1
+libisl23==0.25-1.1
 libitm1==12.2.0-14
 libjansson4==2.14-2
 libjq1==1.6-2.1
@@ -170,6 +171,7 @@ liblzo2-2==2.10-2
 libmagic-mgc==1:5.44-3
 libmagic1==1:5.44-3
 libmnl0==1.0.4-3
+libmount1==2.38.1-5+deb12u1
 libmpc3==1.3.1-1
 libmpfr6==4.2.0-1
 libncurses6==6.4-4
@@ -221,6 +223,7 @@ libsasl2-modules-db==2.1.28+dfsg-10
 libsensors-config==1:3.6.0-7.1
 libsensors5==1:3.6.0-7.1
 libslang2==2.3.3-3
+libsmartcols1==2.38.1-5+deb12u1
 libsodium23==1.0.18-1
 libsqlite3-0==3.40.1-2
 libssh2-1==1.10.0-3+b1
@@ -228,7 +231,7 @@ libssl-dev==3.0.11-1~deb12u2
 libssl3==3.0.11-1~deb12u2
 libswsscommon==1.0.0
 libsysfs2==2.1.1-4
-libsystemd-shared==252.19-1~deb12u1
+libsystemd-shared==252.22-1~deb12u1
 libtac2==1.4.1-1
 libtcl8.6==8.6.13+dfsg-2
 libtirpc-common==1.3.3+ds-1
@@ -241,17 +244,18 @@ libubsan1==12.2.0-14
 libunwind8==1.6.2-3
 libusb-1.0-0==2:1.0.26-1
 libutempter0==1.2.1-3
+libuuid1==2.38.1-5+deb12u1
 libwrap0==7.6.q-32
-libxencall1==4.17.2+76-ge1f9cb16e2-1~deb12u1
-libxendevicemodel1==4.17.2+76-ge1f9cb16e2-1~deb12u1
-libxenevtchn1==4.17.2+76-ge1f9cb16e2-1~deb12u1
-libxenforeignmemory1==4.17.2+76-ge1f9cb16e2-1~deb12u1
-libxengnttab1==4.17.2+76-ge1f9cb16e2-1~deb12u1
-libxenhypfs1==4.17.2+76-ge1f9cb16e2-1~deb12u1
-libxenmisc4.17==4.17.2+76-ge1f9cb16e2-1~deb12u1
-libxenstore4==4.17.2+76-ge1f9cb16e2-1~deb12u1
-libxentoolcore1==4.17.2+76-ge1f9cb16e2-1~deb12u1
-libxentoollog1==4.17.2+76-ge1f9cb16e2-1~deb12u1
+libxencall1==4.17.3+10-g091466ba55-1~deb12u1
+libxendevicemodel1==4.17.3+10-g091466ba55-1~deb12u1
+libxenevtchn1==4.17.3+10-g091466ba55-1~deb12u1
+libxenforeignmemory1==4.17.3+10-g091466ba55-1~deb12u1
+libxengnttab1==4.17.3+10-g091466ba55-1~deb12u1
+libxenhypfs1==4.17.3+10-g091466ba55-1~deb12u1
+libxenmisc4.17==4.17.3+10-g091466ba55-1~deb12u1
+libxenstore4==4.17.3+10-g091466ba55-1~deb12u1
+libxentoolcore1==4.17.3+10-g091466ba55-1~deb12u1
+libxentoollog1==4.17.3+10-g091466ba55-1~deb12u1
 libxml2==2.9.14+dfsg-1.3~deb12u1
 libxml2-dev==2.9.14+dfsg-1.3~deb12u1
 libxslt1-dev==1.1.35-1
@@ -265,19 +269,20 @@ libzmq5==4.3.4-6
 linux-base==4.9
 linux-image-6.1.0-11-2-amd64-unsigned==6.1.38-4
 linux-image-6.1.0-11-2-arm64-unsigned==6.1.38-4
-linux-libc-dev==6.1.69-1
-linux-perf==6.1.69-1
-locales==2.36-9+deb12u3
+linux-libc-dev==6.1.76-1
+linux-perf==6.1.76-1
+locales==2.36-9+deb12u4
 logrotate==3.21.0-1
 lsof==4.95.0-1
 makedev==2.3.1-97
 makedumpfile==1:1.7.2-1
 media-types==10.0.0
-mft==4.25.0-62
+mft==4.27.0-83
 mft-fwtrace-cfg==1.0.0
-mft-oem==4.25.0-62
+mft-oem==4.27.0-83
 mokutil==0.6.0-2
 monit==1:5.20.0-6
+mount==2.38.1-5+deb12u1
 mtd-utils==1:2.1.5-1
 mtr-tiny==0.95-1
 ncal==12.1.8
@@ -341,7 +346,7 @@ sbsigntool==0.9.4-3.1
 screen==4.9.0-4
 sensible-utils==0.0.17+nmu1
 sgml-base==1.31
-smartmontools==7.3-1+b1
+smartmontools==7.4-2~bpo12+1
 sonic-db-cli==1.0.0
 sonic-device-data==1.0-1
 sonic-host-services-data==1.0-1
@@ -351,21 +356,23 @@ sonic-utilities-data==1.0-1
 sqlite3==3.40.1-2
 squashfs-tools==1:4.5.1-1
 sudo==1.9.13p3-1+deb12u1
-sx-kernel==1.mlnx.4.6.2134
+sx-kernel==1.mlnx.4.6.2202
 sysfsutils==2.1.1-4
 sysstat==12.6.1-1
-systemd==252.19-1~deb12u1
+systemd==252.22-1~deb12u1
 systemd-bootchart==234-2+b1
 systemd-sonic-generator==1.0.0
-systemd-sysv==252.19-1~deb12u1
+systemd-sysv==252.22-1~deb12u1
 tcpdump==4.99.3-1
 tcptraceroute==1.5beta7+debian-4.1+b1
 traceroute==1:2.1.2-1
 u-boot-tools==2023.01+dfsg-2
 ucf==3.0043+nmu1
-udev==252.19-1~deb12u1
+udev==252.22-1~deb12u1
 unzip==6.0-28
-usbutils==1:014-1
+usbutils==1:014-1+deb12u1
+util-linux==2.38.1-5+deb12u1
+util-linux-extra==2.38.1-5+deb12u1
 vim==2:9.0.1378-2
 vim-common==2:9.0.1378-2
 vim-runtime==2:9.0.1378-2
diff --git a/files/build/versions/host-image/versions-deb-bookworm-armhf b/files/build/versions/host-image/versions-deb-bookworm-armhf
index e4f4b1983..85aa015ee 100644
--- a/files/build/versions/host-image/versions-deb-bookworm-armhf
+++ b/files/build/versions/host-image/versions-deb-bookworm-armhf
@@ -2,3 +2,4 @@ binutils-arm-linux-gnueabihf==2.40-2
 linux-image-6.1.0-11-2-armmp==6.1.38-4
 mrvlprestera==1.0
 ntpstat==0.0.0.1-2
+python3-gi==3.42.2-3+b1
diff --git a/files/build/versions/host-image/versions-py3 b/files/build/versions/host-image/versions-py3
index 68eb83d7a..eee9a3df5 100644
--- a/files/build/versions/host-image/versions-py3
+++ b/files/build/versions/host-image/versions-py3
@@ -4,7 +4,7 @@ azure-storage==0.36.0
 bcrypt==3.2.2
 bitarray==2.8.1
 blessed==1.20.0
-certifi==2023.11.17
+certifi==2024.2.2
 cffi==1.15.1
 charset-normalizer==3.3.2
 click==7.0
@@ -15,7 +15,7 @@ dbus-python==1.3.2
 docker==6.1.1
 docker-image-py==0.1.12
 enlighten==1.12.4
-filelock==3.13.1
+filelock==3.13.3
 grpcio==1.51.1
 grpcio-tools==1.51.1
 idna==3.6
@@ -36,7 +36,7 @@ natsort==6.2.1
 netaddr==0.8.0
 netifaces==0.11.0
 ntpsec==1.2.2
-packaging==23.2
+packaging==24.0
 paramiko==2.11.0
 pathtools==0.1.2
 perf==0.1
@@ -45,19 +45,19 @@ pip==23.0.1
 ply==3.11
 prefixed==0.7.0
 prettyprinter==0.18.0
-protobuf==4.25.2
+protobuf==4.25.3
 psutil==5.9.8
 ptyprocess==0.7.0
 pyang==2.6.0
 pyangbind==0.8.2
-pycairo==1.25.1
+pycairo==1.26.0
 pycparser==2.21
 pygments==2.17.2
-pygobject==3.46.0
+pygobject==3.48.1
 pynacl==1.5.0
 pyroute2==0.5.19
 python-apt==2.6.0
-python-dateutil==2.8.2
+python-dateutil==2.9.0.post0
 pyyaml==6.0.1
 redis==3.5.3
 regex==2023.12.25
@@ -69,7 +69,7 @@ six==1.16.0
 systemd-python==235
 tabulate==0.9.0
 toposort==1.6
-urllib3==2.1.0
+urllib3==2.2.1
 watchdog==0.10.3
 wcwidth==0.2.13
 websocket-client==1.7.0
diff --git a/files/build/versions/host-image/versions-py3-all-armhf b/files/build/versions/host-image/versions-py3-all-armhf
new file mode 100644
index 000000000..fe39c407f
--- /dev/null
+++ b/files/build/versions/host-image/versions-py3-all-armhf
@@ -0,0 +1 @@
+pygobject==3.42.2

From be01b37a34d574f30564d1cff678831f9763ecfc Mon Sep 17 00:00:00 2001
From: Arun Saravanan Balachandran
 <52521751+ArunSaravananBalachandran@users.noreply.github.com>
Date: Fri, 5 Apr 2024 22:21:43 +0530
Subject: [PATCH 0395/1115] Upgrade PMON container to bookworm (#18291)

* Update PMON to bookworm

- Use locally built ipmitool
- Use latest version of smartmontools from Bookworm Debian repos
- Update locally built lm-sensors to match version in Bookworm
- Update grpcio and grpcio-tools python packages to match version in
  Bookworm

* [PMON] Update smartmontool version >= 7.4
---
 dockers/docker-platform-monitor/Dockerfile.j2 | 12 ++++++------
 rules/docker-platform-monitor.mk              | 13 +++++++------
 rules/lm-sensors.mk                           |  2 +-
 sonic-slave-bookworm/Dockerfile.j2            |  4 ++++
 4 files changed, 18 insertions(+), 13 deletions(-)

diff --git a/dockers/docker-platform-monitor/Dockerfile.j2 b/dockers/docker-platform-monitor/Dockerfile.j2
index aeb201a20..ef6b2fcea 100755
--- a/dockers/docker-platform-monitor/Dockerfile.j2
+++ b/dockers/docker-platform-monitor/Dockerfile.j2
@@ -1,5 +1,5 @@
 {% from "dockers/dockerfile-macros.j2" import install_debian_packages, install_python_wheels, copy_files %}
-FROM docker-config-engine-bullseye-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}}
+FROM docker-config-engine-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}}
 
 ARG docker_container_name
 ARG image_version
@@ -15,7 +15,6 @@ RUN apt-get update &&   \
     apt-get install -y  \
         build-essential \
         python3-dev     \
-        ipmitool        \
         librrd8         \
         librrd-dev      \
         rrdtool         \
@@ -27,17 +26,18 @@ RUN apt-get update &&   \
         libpci3         \
         iputils-ping    \
         pciutils        \
+        ethtool &&	\
 # smartmontools version should match the installed smartmontools in sonic_debian_extension build template
-        smartmontools=7.2-1 \
-        ethtool
+    apt-get install -y -t bookworm-backports \
+        smartmontools
 
 # On Arista devices, the sonic_platform wheel is not installed in the container.
 # Instead, the installation directory is mounted from the host OS. However, this method
 # doesn't ensure all dependencies are installed in the container. So here we
 # install any dependencies required by the Arista sonic_platform package.
 # TODO: eliminate the need to install these explicitly.
-RUN pip3 install grpcio==1.39.0 \
-        grpcio-tools==1.39.0
+RUN pip3 install grpcio==1.51.1 \
+        grpcio-tools==1.51.1
 
 # Barefoot platform vendors' sonic_platform packages import these Python libraries
 RUN pip3 install thrift==0.13.0 netifaces
diff --git a/rules/docker-platform-monitor.mk b/rules/docker-platform-monitor.mk
index a225ec99b..99cca6f70 100644
--- a/rules/docker-platform-monitor.mk
+++ b/rules/docker-platform-monitor.mk
@@ -6,7 +6,7 @@ DOCKER_PLATFORM_MONITOR_DBG = $(DOCKER_PLATFORM_MONITOR_STEM)-$(DBG_IMAGE_MARK).
 
 $(DOCKER_PLATFORM_MONITOR)_PATH = $(DOCKERS_PATH)/$(DOCKER_PLATFORM_MONITOR_STEM)
 
-$(DOCKER_PLATFORM_MONITOR)_DEPENDS += $(LIBSENSORS) $(LM_SENSORS) $(FANCONTROL) $(SENSORD) $(LIBSWSSCOMMON) $(PYTHON3_SWSSCOMMON)
+$(DOCKER_PLATFORM_MONITOR)_DEPENDS += $(LIBSENSORS) $(LM_SENSORS) $(FANCONTROL) $(SENSORD) $(LIBSWSSCOMMON) $(PYTHON3_SWSSCOMMON) $(IPMITOOL)
 
 
 $(DOCKER_PLATFORM_MONITOR)_PYTHON_WHEELS += $(SONIC_PLATFORM_COMMON_PY3)
@@ -27,13 +27,14 @@ ifeq ($(PDDF_SUPPORT),y)
 $(DOCKER_PLATFORM_MONITOR)_PYTHON_WHEELS += $(PDDF_PLATFORM_API_BASE_PY3)
 endif
 
-$(DOCKER_PLATFORM_MONITOR)_DBG_DEPENDS = $($(DOCKER_CONFIG_ENGINE_BULLSEYE)_DBG_DEPENDS)
+$(DOCKER_PLATFORM_MONITOR)_DBG_DEPENDS = $($(DOCKER_CONFIG_ENGINE_BOOKWORM)_DBG_DEPENDS)
 $(DOCKER_PLATFORM_MONITOR)_DBG_DEPENDS += $(LIBSWSSCOMMON_DBG) $(LIBSENSORS_DBG)
 $(DOCKER_PLATFORM_MONITOR)_DBG_DEPENDS += $(LM_SENSORS_DBG) $(SENSORD_DBG)
+$(DOCKER_PLATFORM_MONITOR)_DBG_DEPENDS += $(IPMITOOL_DBG)
 
-$(DOCKER_PLATFORM_MONITOR)_DBG_IMAGE_PACKAGES = $($(DOCKER_CONFIG_ENGINE_BULLSEYE)_DBG_IMAGE_PACKAGES)
+$(DOCKER_PLATFORM_MONITOR)_DBG_IMAGE_PACKAGES = $($(DOCKER_CONFIG_ENGINE_BOOKWORM)_DBG_IMAGE_PACKAGES)
 
-$(DOCKER_PLATFORM_MONITOR)_LOAD_DOCKERS = $(DOCKER_CONFIG_ENGINE_BULLSEYE)
+$(DOCKER_PLATFORM_MONITOR)_LOAD_DOCKERS = $(DOCKER_CONFIG_ENGINE_BOOKWORM)
 
 $(DOCKER_PLATFORM_MONITOR)_VERSION = 1.0.0
 $(DOCKER_PLATFORM_MONITOR)_PACKAGE_NAME = pmon
@@ -66,5 +67,5 @@ $(DOCKER_PLATFORM_MONITOR)_BASE_IMAGE_FILES += cmd_wrapper:/usr/sbin/SmartCmd
 $(DOCKER_PLATFORM_MONITOR)_BASE_IMAGE_FILES += cmd_wrapper:/usr/bin/ethtool
 $(DOCKER_PLATFORM_MONITOR)_FILES += $(SUPERVISOR_PROC_EXIT_LISTENER_SCRIPT)
 
-SONIC_BULLSEYE_DOCKERS += $(DOCKER_PLATFORM_MONITOR)
-SONIC_BULLSEYE_DBG_DOCKERS += $(DOCKER_PLATFORM_MONITOR_DBG)
+SONIC_BOOKWORM_DOCKERS += $(DOCKER_PLATFORM_MONITOR)
+SONIC_BOOKWORM_DBG_DOCKERS += $(DOCKER_PLATFORM_MONITOR_DBG)
diff --git a/rules/lm-sensors.mk b/rules/lm-sensors.mk
index b33f7cc3a..d5a76f076 100644
--- a/rules/lm-sensors.mk
+++ b/rules/lm-sensors.mk
@@ -7,7 +7,7 @@ LM_SENSORS_PATCH_VERSION = 0
 LIBSENSORS_VERSION = 5
 
 LM_SENSORS_VERSION=$(LM_SENSORS_MAJOR_VERSION).$(LM_SENSORS_MINOR_VERSION).$(LM_SENSORS_PATCH_VERSION)
-LM_SENSORS_VERSION_FULL=$(LM_SENSORS_VERSION)-7
+LM_SENSORS_VERSION_FULL=$(LM_SENSORS_VERSION)-7.1
 
 LM_SENSORS = lm-sensors_$(LM_SENSORS_VERSION_FULL)_$(CONFIGURED_ARCH).deb
 $(LM_SENSORS)_SRC_PATH = $(SRC_PATH)/lm-sensors
diff --git a/sonic-slave-bookworm/Dockerfile.j2 b/sonic-slave-bookworm/Dockerfile.j2
index 4e855aa67..27e712236 100644
--- a/sonic-slave-bookworm/Dockerfile.j2
+++ b/sonic-slave-bookworm/Dockerfile.j2
@@ -481,6 +481,10 @@ RUN patch -p1 -i /disable-non-manylinux.patch /usr/local/lib/python3.11/dist-pac
 # For building sonic-utilities
 RUN pip3 install fastentrypoints mock
 
+# For building sonic_ycabled
+# Note: Match version in bookworm
+RUN pip3 install grpcio==1.51.1 grpcio-tools==1.51.1
+
 # For running Python unit tests
 RUN pip3 install pytest-runner==5.2
 RUN pip3 install mockredispy==2.9.3

From 1bfb2d49ee5bf85118139d10c79a1da786cd128b Mon Sep 17 00:00:00 2001
From: Mai Bui <maibui@microsoft.com>
Date: Fri, 5 Apr 2024 20:39:27 -0400
Subject: [PATCH 0396/1115] Improve Semgrep CI (#18577)

### What I did
Semgrep's default ruleset (p/default) somehow lost some important rules
#### How I did it
Keep use p/default and add another rule
#### How to verify it
Added test code to this PR and Semgrep CI failed
Failed result: https://github.com/sonic-net/sonic-buildimage/actions/runs/8574699788/job/23502068624
---
 .github/workflows/semgrep.yml | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/.github/workflows/semgrep.yml b/.github/workflows/semgrep.yml
index 975769a50..9aea98abf 100644
--- a/.github/workflows/semgrep.yml
+++ b/.github/workflows/semgrep.yml
@@ -19,4 +19,8 @@ jobs:
       - uses: actions/checkout@v3
       - run: semgrep ci
         env:
-           SEMGREP_RULES: p/default
+           SEMGREP_RULES: |
+             p/default
+             r/python.lang.security.audit.dangerous-system-call-audit.dangerous-system-call-audit
+             r/c.lang.security.insecure-use-strcat-fn.insecure-use-strcat-fn
+             r/c.lang.security.insecure-use-string-copy-fn.insecure-use-string-copy-fn

From 45bc22887f3bac2cfe08ff30e73ff20ac59deb45 Mon Sep 17 00:00:00 2001
From: Kebo Liu <kebol@nvidia.com>
Date: Sun, 7 Apr 2024 21:00:47 +0800
Subject: [PATCH 0397/1115] [Mellanox][SN2201] Fix wrong sfp number on SN2201
 platform (#18413)

- Why I did it
For the SN2201 platform, it includes both RJ45 ports and SFP ports, in the recent new chassis.get_num_sfps() implementation, it only counts the number of SFP ports, however, as per the design, on this platform, RJ45 ports should also be counted to correctly initialize the SFP objects list inside the Chassis. The RJ45 ports are treated as a special type of SFP object in the Mellanox platform API implementation.

- How I did it
count both SFP ports number and RJ45 ports number in chassis.get_num_sfps().

- How to verify it
run SFP-related sonic-mgmt tests on SN2201 and other Mellanox platforms and all the test pass.

Signed-off-by: Kebo Liu <kebol@nvidia.com>
---
 .../mlnx-platform-api/sonic_platform/chassis.py        | 10 ++++++++--
 .../mellanox/mlnx-platform-api/tests/test_chassis.py   |  9 ++++++++-
 2 files changed, 16 insertions(+), 3 deletions(-)

diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/chassis.py b/platform/mellanox/mlnx-platform-api/sonic_platform/chassis.py
index 5870d7e6b..f216f6de2 100644
--- a/platform/mellanox/mlnx-platform-api/sonic_platform/chassis.py
+++ b/platform/mellanox/mlnx-platform-api/sonic_platform/chassis.py
@@ -1,5 +1,5 @@
 #
-# Copyright (c) 2019-2023 NVIDIA CORPORATION & AFFILIATES.
+# Copyright (c) 2019-2024 NVIDIA CORPORATION & AFFILIATES.
 # Apache-2.0
 #
 # Licensed under the Apache License, Version 2.0 (the "License");
@@ -329,7 +329,13 @@ def get_num_sfps(self):
         Returns:
             An integer, the number of sfps available on this chassis
         """
-        return DeviceDataManager.get_sfp_count()
+        if not self._RJ45_port_inited:
+            self._RJ45_port_list = extract_RJ45_ports_index()
+            self._RJ45_port_inited = True
+        if self._RJ45_port_list is not None:
+            return DeviceDataManager.get_sfp_count() + len(self._RJ45_port_list)
+        else:
+            return DeviceDataManager.get_sfp_count()
 
     def get_all_sfps(self):
         """
diff --git a/platform/mellanox/mlnx-platform-api/tests/test_chassis.py b/platform/mellanox/mlnx-platform-api/tests/test_chassis.py
index ffe86aaf3..ad23cd8dd 100644
--- a/platform/mellanox/mlnx-platform-api/tests/test_chassis.py
+++ b/platform/mellanox/mlnx-platform-api/tests/test_chassis.py
@@ -1,5 +1,5 @@
 #
-# Copyright (c) 2021-2023 NVIDIA CORPORATION & AFFILIATES.
+# Copyright (c) 2021-2024 NVIDIA CORPORATION & AFFILIATES.
 # Apache-2.0
 #
 # Licensed under the Apache License, Version 2.0 (the "License");
@@ -169,6 +169,13 @@ def test_sfp(self):
         assert len(sfp_list) == 3
         assert chassis.sfp_initialized_count == 3
 
+        # Get all SFPs, with RJ45 ports
+        sonic_platform.chassis.extract_RJ45_ports_index = mock.MagicMock(return_value=[0,1,2])
+        DeviceDataManager.get_sfp_count = mock.MagicMock(return_value=3)
+        chassis = Chassis()
+        assert chassis.get_num_sfps() == 6
+        sonic_platform.chassis.extract_RJ45_ports_index = mock.MagicMock(return_value=[])
+
     def test_create_sfp_in_multi_thread(self):
         DeviceDataManager.get_sfp_count = mock.MagicMock(return_value=3)
 

From d0ca6e8c1a670d182e069ad26e93f8a3ef4e770b Mon Sep 17 00:00:00 2001
From: Sudharsan Dhamal Gopalarathnam <sudharsand@nvidia.com>
Date: Sun, 7 Apr 2024 06:47:42 -0700
Subject: [PATCH 0398/1115] [submodule][master] Update submodule sonic-swss to
 include the below commits (#18576)

* c96a2f84 - Revert "[acl] Add IN_PORTS qualifier for L3 table (#3078)" (#3092) (6 days ago) [Neetha John]
* 80e0b57d - [Copp]Refactor coppmgr tests (#3093) (8 days ago) [Sudharsan Dhamal Gopalarathnam]
* a4647299 - [portsorch] process only updated APP_DB fields when port is already   created (#3025) (10 days ago) [Stepan Blyshchak]
* 91bacca5 - [buffermgrd] Move switch-statement outside of if-statement in BufferMgr::doTask (#3055) (2 weeks ago) [Amir]
* 04912ad0 - [bulker] add support for neighbor bulking (#2768) (2 weeks ago) [Nikola Dancejic]
* 9d4a3add - [acl] Add IN_PORTS qualifier for L3 table (#3078) (2 weeks ago) [Neetha John]
* a13e081f - [Mellanox] Fix inconsistence in the shared headroom pool initialization (#3057) (3 weeks ago) [Stephen Sun]
* ff2b2b85 - Add basic fabric link monitoring counters and states handling. (#2988) (3 weeks ago) [jfeng-arista]
* 0c620910 - Add port flap count and last flap timestamp to APPL_DB (#3052) (3 weeks ago) [Prince George]
* e9931f31 - [EVPN] Skip EVPN routes with invalid VNI or router mac field (#3073) (3 weeks ago) [Lior Avramov]
* 600d5e80 - Set HOST_TX_READY_NOTIFY attribute only after query capabilities(#3070) (3 weeks ago) [noaOrMlnx]
---
 src/sonic-swss | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-swss b/src/sonic-swss
index 9c995f0c8..c96a2f84b 160000
--- a/src/sonic-swss
+++ b/src/sonic-swss
@@ -1 +1 @@
-Subproject commit 9c995f0c83892ae9a4f6657c1c4673164e803169
+Subproject commit c96a2f84b506665dca18765932cc4c0de9d0e507

From 6d0cd5519560f48cb2a7421588d100c617996eb7 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Mon, 8 Apr 2024 19:01:06 +0800
Subject: [PATCH 0399/1115] [submodule] Update submodule sonic-platform-daemons
 to the latest HEAD automatically (#18589)

#### Why I did it
src/sonic-platform-daemons
```
* d0fd1e1 - (HEAD -> master, origin/master, origin/HEAD) [warm/fast-reboot] Retain TRANSCEIVER_INFO/STATUS tables on deinit (#454) (3 days ago) [Stepan Blyshchak]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-platform-daemons | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-platform-daemons b/src/sonic-platform-daemons
index 2770fd2c7..d0fd1e1c6 160000
--- a/src/sonic-platform-daemons
+++ b/src/sonic-platform-daemons
@@ -1 +1 @@
-Subproject commit 2770fd2c7909ae031d72066530559f4b2e3ea23c
+Subproject commit d0fd1e1c6113d4a0e2e7bff1559d89e6105269c9

From 18524b5960c06cb588f143db9f30be145e7e8212 Mon Sep 17 00:00:00 2001
From: Precy Lee <precy.lee@broadcom.com>
Date: Mon, 8 Apr 2024 13:59:02 -0700
Subject: [PATCH 0400/1115] address the issue of the PDDF driver failing to
 allocate sysfs in kernel 6.1 (#18538)

---
 platform/pddf/i2c/modules/fan/driver/pddf_fan_driver.c   | 2 +-
 platform/pddf/i2c/modules/psu/driver/pddf_psu_driver.c   | 2 +-
 platform/pddf/i2c/modules/xcvr/driver/pddf_xcvr_driver.c | 2 +-
 3 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/platform/pddf/i2c/modules/fan/driver/pddf_fan_driver.c b/platform/pddf/i2c/modules/fan/driver/pddf_fan_driver.c
index e13b65e70..338b0432d 100644
--- a/platform/pddf/i2c/modules/fan/driver/pddf_fan_driver.c
+++ b/platform/pddf/i2c/modules/fan/driver/pddf_fan_driver.c
@@ -516,7 +516,7 @@ static int pddf_fan_probe(struct i2c_client *client,
         goto exit_free;
     }
 
-    data->hwmon_dev = hwmon_device_register_with_info(&client->dev, client->name, NULL, NULL, NULL);
+    data->hwmon_dev = hwmon_device_register_with_groups(&client->dev, client->name, NULL, NULL);
     if (IS_ERR(data->hwmon_dev)) {
         status = PTR_ERR(data->hwmon_dev);
         goto exit_remove;
diff --git a/platform/pddf/i2c/modules/psu/driver/pddf_psu_driver.c b/platform/pddf/i2c/modules/psu/driver/pddf_psu_driver.c
index 3af93b91a..9fbf652a0 100644
--- a/platform/pddf/i2c/modules/psu/driver/pddf_psu_driver.c
+++ b/platform/pddf/i2c/modules/psu/driver/pddf_psu_driver.c
@@ -243,7 +243,7 @@ static int psu_probe(struct i2c_client *client,
         goto exit_free;
     }
 
-	data->hwmon_dev = hwmon_device_register_with_info(&client->dev, client->name, NULL, NULL, NULL);
+	data->hwmon_dev = hwmon_device_register_with_groups(&client->dev, client->name, NULL, NULL);
 	if (IS_ERR(data->hwmon_dev)) {
 		status = PTR_ERR(data->hwmon_dev);
 		goto exit_remove;
diff --git a/platform/pddf/i2c/modules/xcvr/driver/pddf_xcvr_driver.c b/platform/pddf/i2c/modules/xcvr/driver/pddf_xcvr_driver.c
index 57b6f8b99..d611fa6ef 100644
--- a/platform/pddf/i2c/modules/xcvr/driver/pddf_xcvr_driver.c
+++ b/platform/pddf/i2c/modules/xcvr/driver/pddf_xcvr_driver.c
@@ -159,7 +159,7 @@ static int xcvr_probe(struct i2c_client *client,
         goto exit_free;
     }
 
-    data->xdev = hwmon_device_register_with_info(&client->dev, client->name, NULL, NULL, NULL);
+    data->xdev = hwmon_device_register_with_groups(&client->dev, client->name, NULL, NULL);
     if (IS_ERR(data->xdev)) {
         status = PTR_ERR(data->xdev);
         goto exit_remove;

From a83e2ed874756901cfffc415e3234a6b7860b175 Mon Sep 17 00:00:00 2001
From: Sudharsan Dhamal Gopalarathnam <sudharsand@nvidia.com>
Date: Mon, 8 Apr 2024 14:14:18 -0700
Subject: [PATCH 0401/1115] [System Ready]Handle template value for feature
 table state field (#18411)

* [System Ready]Handle template value for feature table state field
---
 .../health_checker/sysmonitor.py              | 28 ++++++++++++++++++-
 src/system-health/tests/test_system_health.py | 15 +++++++++-
 2 files changed, 41 insertions(+), 2 deletions(-)

diff --git a/src/system-health/health_checker/sysmonitor.py b/src/system-health/health_checker/sysmonitor.py
index 3a2840e11..92777b256 100755
--- a/src/system-health/health_checker/sysmonitor.py
+++ b/src/system-health/health_checker/sysmonitor.py
@@ -10,8 +10,10 @@
 from sonic_py_common.logger import Logger
 from . import utils
 from sonic_py_common.task_base import ProcessTaskBase
+from sonic_py_common import device_info
 from .config import Config
 import signal
+import jinja2
 
 SYSLOG_IDENTIFIER = "system#monitor"
 REDIS_TIMEOUT_MS = 0
@@ -159,6 +161,26 @@ def get_all_service_list(self):
         dir_list.sort()
         return dir_list
 
+    def get_render_value_for_field(self, configuration, device_config, expected_values):
+        """ Returns the target value by rendering the configuration as J2 template.
+
+        Args:
+            configuration (str): Table value from CONFIG_DB for given field
+            device_config (dict): DEVICE_METADATA section of CONFIG_DB and populated Device Running Metadata which is needed for rendering
+            expected_values (list): Expected set of values for given field
+        Returns:
+            (str): Target value for given key
+        """
+
+        if configuration is None:
+            return None
+
+        template = jinja2.Template(configuration)
+        target_value = template.render(device_config) # nosemgrep: python.flask.security.xss.audit.direct-use-of-jinja2.direct-use-of-jinja2
+        if target_value not in expected_values:
+            raise ValueError('Invalid value rendered for configuration {}: {}'.format(configuration, target_value))
+        return target_value
+
     def get_service_from_feature_table(self, dir_list):
         """Get service from CONFIG DB FEATURE table. During "config reload" command, filling FEATURE table
            is not an atomic operation, sonic-cfggen do it with two steps:
@@ -178,12 +200,16 @@ def get_service_from_feature_table(self, dir_list):
         while max_retry > 0:
             success = True
             feature_table = self.config_db.get_table("FEATURE")
+            device_config = {}
+            device_config['DEVICE_METADATA'] = self.config_db.get_table('DEVICE_METADATA')
+            device_config.update(device_info.get_device_runtime_metadata())
             for srv, fields in feature_table.items():
                 if 'state' not in fields:
                     success = False
                     logger.log_warning("FEATURE table is not fully ready: {}, retrying".format(feature_table))
                     break
-                if fields["state"] not in ["disabled", "always_disabled"]:
+                state = self.get_render_value_for_field(fields["state"], device_config, ['enabled', 'disabled', 'always_enabled', 'always_disabled'])
+                if state not in ["disabled", "always_disabled"]:
                     srvext = srv + ".service"
                     if srvext not in dir_list:
                         dir_list.append(srvext)
diff --git a/src/system-health/tests/test_system_health.py b/src/system-health/tests/test_system_health.py
index 67f819ecc..cd9a54e87 100644
--- a/src/system-health/tests/test_system_health.py
+++ b/src/system-health/tests/test_system_health.py
@@ -47,6 +47,7 @@
 """
 device_info.get_platform = MagicMock(return_value='unittest')
 
+device_runtime_metadata = {"DEVICE_RUNTIME_METADATA": {"ETHERNET_PORTS_PRESENT":True}}
 
 def setup():
     if os.path.exists(ServiceChecker.CRITICAL_PROCESS_CACHE):
@@ -583,6 +584,7 @@ def test_utils():
 @patch('docker.DockerClient')
 @patch('health_checker.utils.run_command')
 @patch('swsscommon.swsscommon.ConfigDBConnector')
+@patch('sonic_py_common.device_info.get_device_runtime_metadata', MagicMock(return_value=device_runtime_metadata))
 def test_get_all_service_list(mock_config_db, mock_run, mock_docker_client):
     mock_db_data = MagicMock()
     mock_get_table = MagicMock()
@@ -841,6 +843,7 @@ def test_system_service():
     sysmon.task_stop()
 
 
+@patch('sonic_py_common.device_info.get_device_runtime_metadata', MagicMock(return_value=device_runtime_metadata))
 def test_get_service_from_feature_table():
     sysmon = Sysmonitor()
     sysmon.config_db = MagicMock()
@@ -851,8 +854,18 @@ def test_get_service_from_feature_table():
             'swss': {}
         },
         {
-            'bgp': {'state': 'enabled'},
+            'localhost': {
+                'type': 'ToRRouter'
+            }
+        },
+        {
+            'bgp': {'state': "{% if not (DEVICE_METADATA is defined and DEVICE_METADATA['localhost'] is defined and DEVICE_METADATA['localhost']['type'] is defined and DEVICE_METADATA['localhost']['type'] is not in ['ToRRouter', 'EPMS', 'MgmtTsToR', 'MgmtToRRouter', 'BmcMgmtToRRouter']) %}enabled{% else %}disabled{% endif %}"},
             'swss': {'state': 'disabled'}
+        },
+        {
+            'localhost': {
+                'type': 'ToRRouter'
+            }
         }
     ]
     dir_list = []

From 6e6d397ad382ca110ef08d2edaa6e90c782e94fe Mon Sep 17 00:00:00 2001
From: saksarav-nokia <sakthivadivu.saravanaraj@nokia.com>
Date: Mon, 8 Apr 2024 18:05:12 -0400
Subject: [PATCH 0402/1115] [Nokia Device] Increase the syncd docker shared
 memory size for Nokia devices (#18535)

BCM SAI 9.x/10.X crashes in switch create with master. It is because the later SAI versions started using more shared memory (277M with J2C+ in 10.X) and since syncd dockers are created with 64M shared memory by default, SAI runs out of shared memory during SAI database creation and generates core file. So increased the syncd shared memory size to 512M for Nokia platforms.

Signed-off-by: saksarav <sakthivadivu.saravanaraj@nokia.com>
---
 device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/platform_env.conf | 1 +
 1 file changed, 1 insertion(+)

diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/platform_env.conf b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/platform_env.conf
index 15a060d46..4fd55b29f 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/platform_env.conf
+++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/platform_env.conf
@@ -2,3 +2,4 @@ usemsi=1
 dmasize=512M
 default_mtu=9100
 macsec_enabled=1
+SYNCD_SHM_SIZE=512m

From d56833bf0ec9d2d29128523a195838699ab539c2 Mon Sep 17 00:00:00 2001
From: jfeng-arista <98421150+jfeng-arista@users.noreply.github.com>
Date: Mon, 8 Apr 2024 15:10:46 -0700
Subject: [PATCH 0403/1115] Update fabric monitor data with forceUnisolateSt
 (#18447)

Update fabric monitoring data in config_db to have forceUnisolateStatus attribute. So users can unisolate the fabric links if needed

Also add the fabric monitoring data for 2 more sku

The updated HLD PR is at sonic-net/SONiC#1656
---
 .../Arista-7804R3-FM/fabric_port_config.ini   | 386 +++++++++---------
 .../Arista-7808R3-FM/fabric_port_config.ini   | 193 ---------
 .../Arista-7808R3A-FM/fabric_port_config.ini  | 386 +++++++++---------
 .../fabric_port_config.ini                    | 226 +++++-----
 .../fabric_port_config.ini                    | 226 +++++-----
 .../fabric_monitor_config.json                |   9 +
 .../fabric_port_config.ini                    | 193 +++++++++
 .../fabric_port_config.ini                    | 386 +++++++++---------
 .../fabric_monitor_config.json                |   9 +
 .../fabric_port_config.ini                    | 193 +++++++++
 10 files changed, 1209 insertions(+), 998 deletions(-)
 create mode 100644 device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/fabric_monitor_config.json
 create mode 100644 device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/fabric_port_config.ini
 create mode 100644 device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/fabric_monitor_config.json
 create mode 100644 device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/fabric_port_config.ini

diff --git a/device/arista/x86_64-arista_7800_sup/Arista-7804R3-FM/fabric_port_config.ini b/device/arista/x86_64-arista_7800_sup/Arista-7804R3-FM/fabric_port_config.ini
index f9a60d04e..1ffb084a1 100644
--- a/device/arista/x86_64-arista_7800_sup/Arista-7804R3-FM/fabric_port_config.ini
+++ b/device/arista/x86_64-arista_7800_sup/Arista-7804R3-FM/fabric_port_config.ini
@@ -1,193 +1,193 @@
-# name              lanes     isolateStatus
-Fabric0             0         False
-Fabric1             1         False
-Fabric2             2         False
-Fabric3             3         False
-Fabric4             4         False
-Fabric5             5         False
-Fabric6             6         False
-Fabric7             7         False
-Fabric8             8         False
-Fabric9             9         False
-Fabric10            10        False
-Fabric11            11        False
-Fabric12            12        False
-Fabric13            13        False
-Fabric14            14        False
-Fabric15            15        False
-Fabric16            16        False
-Fabric17            17        False
-Fabric18            18        False
-Fabric19            19        False
-Fabric20            20        False
-Fabric21            21        False
-Fabric22            22        False
-Fabric23            23        False
-Fabric24            24        False
-Fabric25            25        False
-Fabric26            26        False
-Fabric27            27        False
-Fabric28            28        False
-Fabric29            29        False
-Fabric30            30        False
-Fabric31            31        False
-Fabric32            32        False
-Fabric33            33        False
-Fabric34            34        False
-Fabric35            35        False
-Fabric36            36        False
-Fabric37            37        False
-Fabric38            38        False
-Fabric39            39        False
-Fabric40            40        False
-Fabric41            41        False
-Fabric42            42        False
-Fabric43            43        False
-Fabric44            44        False
-Fabric45            45        False
-Fabric46            46        False
-Fabric47            47        False
-Fabric48            48        False
-Fabric49            49        False
-Fabric50            50        False
-Fabric51            51        False
-Fabric52            52        False
-Fabric53            53        False
-Fabric54            54        False
-Fabric55            55        False
-Fabric56            56        False
-Fabric57            57        False
-Fabric58            58        False
-Fabric59            59        False
-Fabric60            60        False
-Fabric61            61        False
-Fabric62            62        False
-Fabric63            63        False
-Fabric64            64        False
-Fabric65            65        False
-Fabric66            66        False
-Fabric67            67        False
-Fabric68            68        False
-Fabric69            69        False
-Fabric70            70        False
-Fabric71            71        False
-Fabric72            72        False
-Fabric73            73        False
-Fabric74            74        False
-Fabric75            75        False
-Fabric76            76        False
-Fabric77            77        False
-Fabric78            78        False
-Fabric79            79        False
-Fabric80            80        False
-Fabric81            81        False
-Fabric82            82        False
-Fabric83            83        False
-Fabric84            84        False
-Fabric85            85        False
-Fabric86            86        False
-Fabric87            87        False
-Fabric88            88        False
-Fabric89            89        False
-Fabric90            90        False
-Fabric91            91        False
-Fabric92            92        False
-Fabric93            93        False
-Fabric94            94        False
-Fabric95            95        False
-Fabric96            96        False
-Fabric97            97        False
-Fabric98            98        False
-Fabric99            99        False
-Fabric100           100       False
-Fabric101           101       False
-Fabric102           102       False
-Fabric103           103       False
-Fabric104           104       False
-Fabric105           105       False
-Fabric106           106       False
-Fabric107           107       False
-Fabric108           108       False
-Fabric109           109       False
-Fabric110           110       False
-Fabric111           111       False
-Fabric112           112       False
-Fabric113           113       False
-Fabric114           114       False
-Fabric115           115       False
-Fabric116           116       False
-Fabric117           117       False
-Fabric118           118       False
-Fabric119           119       False
-Fabric120           120       False
-Fabric121           121       False
-Fabric122           122       False
-Fabric123           123       False
-Fabric124           124       False
-Fabric125           125       False
-Fabric126           126       False
-Fabric127           127       False
-Fabric128           128       False
-Fabric129           129       False
-Fabric130           130       False
-Fabric131           131       False
-Fabric132           132       False
-Fabric133           133       False
-Fabric134           134       False
-Fabric135           135       False
-Fabric136           136       False
-Fabric137           137       False
-Fabric138           138       False
-Fabric139           139       False
-Fabric140           140       False
-Fabric141           141       False
-Fabric142           142       False
-Fabric143           143       False
-Fabric144           144       False
-Fabric145           145       False
-Fabric146           146       False
-Fabric147           147       False
-Fabric148           148       False
-Fabric149           149       False
-Fabric150           150       False
-Fabric151           151       False
-Fabric152           152       False
-Fabric153           153       False
-Fabric154           154       False
-Fabric155           155       False
-Fabric156           156       False
-Fabric157           157       False
-Fabric158           158       False
-Fabric159           159       False
-Fabric160           160       False
-Fabric161           161       False
-Fabric162           162       False
-Fabric163           163       False
-Fabric164           164       False
-Fabric165           165       False
-Fabric166           166       False
-Fabric167           167       False
-Fabric168           168       False
-Fabric169           169       False
-Fabric170           170       False
-Fabric171           171       False
-Fabric172           172       False
-Fabric173           173       False
-Fabric174           174       False
-Fabric175           175       False
-Fabric176           176       False
-Fabric177           177       False
-Fabric178           178       False
-Fabric179           179       False
-Fabric180           180       False
-Fabric181           181       False
-Fabric182           182       False
-Fabric183           183       False
-Fabric184           184       False
-Fabric185           185       False
-Fabric186           186       False
-Fabric187           187       False
-Fabric188           188       False
-Fabric189           189       False
-Fabric190           190       False
-Fabric191           191       False
+# name              lanes     isolateStatus    forceUnisolateStatus
+Fabric0             0         False            0
+Fabric1             1         False            0
+Fabric2             2         False            0
+Fabric3             3         False            0
+Fabric4             4         False            0
+Fabric5             5         False            0
+Fabric6             6         False            0
+Fabric7             7         False            0
+Fabric8             8         False            0
+Fabric9             9         False            0
+Fabric10            10        False            0
+Fabric11            11        False            0
+Fabric12            12        False            0
+Fabric13            13        False            0
+Fabric14            14        False            0
+Fabric15            15        False            0
+Fabric16            16        False            0
+Fabric17            17        False            0
+Fabric18            18        False            0
+Fabric19            19        False            0
+Fabric20            20        False            0
+Fabric21            21        False            0
+Fabric22            22        False            0
+Fabric23            23        False            0
+Fabric24            24        False            0
+Fabric25            25        False            0
+Fabric26            26        False            0
+Fabric27            27        False            0
+Fabric28            28        False            0
+Fabric29            29        False            0
+Fabric30            30        False            0
+Fabric31            31        False            0
+Fabric32            32        False            0
+Fabric33            33        False            0
+Fabric34            34        False            0
+Fabric35            35        False            0
+Fabric36            36        False            0
+Fabric37            37        False            0
+Fabric38            38        False            0
+Fabric39            39        False            0
+Fabric40            40        False            0
+Fabric41            41        False            0
+Fabric42            42        False            0
+Fabric43            43        False            0
+Fabric44            44        False            0
+Fabric45            45        False            0
+Fabric46            46        False            0
+Fabric47            47        False            0
+Fabric48            48        False            0
+Fabric49            49        False            0
+Fabric50            50        False            0
+Fabric51            51        False            0
+Fabric52            52        False            0
+Fabric53            53        False            0
+Fabric54            54        False            0
+Fabric55            55        False            0
+Fabric56            56        False            0
+Fabric57            57        False            0
+Fabric58            58        False            0
+Fabric59            59        False            0
+Fabric60            60        False            0
+Fabric61            61        False            0
+Fabric62            62        False            0
+Fabric63            63        False            0
+Fabric64            64        False            0
+Fabric65            65        False            0
+Fabric66            66        False            0
+Fabric67            67        False            0
+Fabric68            68        False            0
+Fabric69            69        False            0
+Fabric70            70        False            0
+Fabric71            71        False            0
+Fabric72            72        False            0
+Fabric73            73        False            0
+Fabric74            74        False            0
+Fabric75            75        False            0
+Fabric76            76        False            0
+Fabric77            77        False            0
+Fabric78            78        False            0
+Fabric79            79        False            0
+Fabric80            80        False            0
+Fabric81            81        False            0
+Fabric82            82        False            0
+Fabric83            83        False            0
+Fabric84            84        False            0
+Fabric85            85        False            0
+Fabric86            86        False            0
+Fabric87            87        False            0
+Fabric88            88        False            0
+Fabric89            89        False            0
+Fabric90            90        False            0
+Fabric91            91        False            0
+Fabric92            92        False            0
+Fabric93            93        False            0
+Fabric94            94        False            0
+Fabric95            95        False            0
+Fabric96            96        False            0
+Fabric97            97        False            0
+Fabric98            98        False            0
+Fabric99            99        False            0
+Fabric100           100       False            0
+Fabric101           101       False            0
+Fabric102           102       False            0
+Fabric103           103       False            0
+Fabric104           104       False            0
+Fabric105           105       False            0
+Fabric106           106       False            0
+Fabric107           107       False            0
+Fabric108           108       False            0
+Fabric109           109       False            0
+Fabric110           110       False            0
+Fabric111           111       False            0
+Fabric112           112       False            0
+Fabric113           113       False            0
+Fabric114           114       False            0
+Fabric115           115       False            0
+Fabric116           116       False            0
+Fabric117           117       False            0
+Fabric118           118       False            0
+Fabric119           119       False            0
+Fabric120           120       False            0
+Fabric121           121       False            0
+Fabric122           122       False            0
+Fabric123           123       False            0
+Fabric124           124       False            0
+Fabric125           125       False            0
+Fabric126           126       False            0
+Fabric127           127       False            0
+Fabric128           128       False            0
+Fabric129           129       False            0
+Fabric130           130       False            0
+Fabric131           131       False            0
+Fabric132           132       False            0
+Fabric133           133       False            0
+Fabric134           134       False            0
+Fabric135           135       False            0
+Fabric136           136       False            0
+Fabric137           137       False            0
+Fabric138           138       False            0
+Fabric139           139       False            0
+Fabric140           140       False            0
+Fabric141           141       False            0
+Fabric142           142       False            0
+Fabric143           143       False            0
+Fabric144           144       False            0
+Fabric145           145       False            0
+Fabric146           146       False            0
+Fabric147           147       False            0
+Fabric148           148       False            0
+Fabric149           149       False            0
+Fabric150           150       False            0
+Fabric151           151       False            0
+Fabric152           152       False            0
+Fabric153           153       False            0
+Fabric154           154       False            0
+Fabric155           155       False            0
+Fabric156           156       False            0
+Fabric157           157       False            0
+Fabric158           158       False            0
+Fabric159           159       False            0
+Fabric160           160       False            0
+Fabric161           161       False            0
+Fabric162           162       False            0
+Fabric163           163       False            0
+Fabric164           164       False            0
+Fabric165           165       False            0
+Fabric166           166       False            0
+Fabric167           167       False            0
+Fabric168           168       False            0
+Fabric169           169       False            0
+Fabric170           170       False            0
+Fabric171           171       False            0
+Fabric172           172       False            0
+Fabric173           173       False            0
+Fabric174           174       False            0
+Fabric175           175       False            0
+Fabric176           176       False            0
+Fabric177           177       False            0
+Fabric178           178       False            0
+Fabric179           179       False            0
+Fabric180           180       False            0
+Fabric181           181       False            0
+Fabric182           182       False            0
+Fabric183           183       False            0
+Fabric184           184       False            0
+Fabric185           185       False            0
+Fabric186           186       False            0
+Fabric187           187       False            0
+Fabric188           188       False            0
+Fabric189           189       False            0
+Fabric190           190       False            0
+Fabric191           191       False            0
diff --git a/device/arista/x86_64-arista_7800_sup/Arista-7808R3-FM/fabric_port_config.ini b/device/arista/x86_64-arista_7800_sup/Arista-7808R3-FM/fabric_port_config.ini
index f9a60d04e..e69de29bb 100644
--- a/device/arista/x86_64-arista_7800_sup/Arista-7808R3-FM/fabric_port_config.ini
+++ b/device/arista/x86_64-arista_7800_sup/Arista-7808R3-FM/fabric_port_config.ini
@@ -1,193 +0,0 @@
-# name              lanes     isolateStatus
-Fabric0             0         False
-Fabric1             1         False
-Fabric2             2         False
-Fabric3             3         False
-Fabric4             4         False
-Fabric5             5         False
-Fabric6             6         False
-Fabric7             7         False
-Fabric8             8         False
-Fabric9             9         False
-Fabric10            10        False
-Fabric11            11        False
-Fabric12            12        False
-Fabric13            13        False
-Fabric14            14        False
-Fabric15            15        False
-Fabric16            16        False
-Fabric17            17        False
-Fabric18            18        False
-Fabric19            19        False
-Fabric20            20        False
-Fabric21            21        False
-Fabric22            22        False
-Fabric23            23        False
-Fabric24            24        False
-Fabric25            25        False
-Fabric26            26        False
-Fabric27            27        False
-Fabric28            28        False
-Fabric29            29        False
-Fabric30            30        False
-Fabric31            31        False
-Fabric32            32        False
-Fabric33            33        False
-Fabric34            34        False
-Fabric35            35        False
-Fabric36            36        False
-Fabric37            37        False
-Fabric38            38        False
-Fabric39            39        False
-Fabric40            40        False
-Fabric41            41        False
-Fabric42            42        False
-Fabric43            43        False
-Fabric44            44        False
-Fabric45            45        False
-Fabric46            46        False
-Fabric47            47        False
-Fabric48            48        False
-Fabric49            49        False
-Fabric50            50        False
-Fabric51            51        False
-Fabric52            52        False
-Fabric53            53        False
-Fabric54            54        False
-Fabric55            55        False
-Fabric56            56        False
-Fabric57            57        False
-Fabric58            58        False
-Fabric59            59        False
-Fabric60            60        False
-Fabric61            61        False
-Fabric62            62        False
-Fabric63            63        False
-Fabric64            64        False
-Fabric65            65        False
-Fabric66            66        False
-Fabric67            67        False
-Fabric68            68        False
-Fabric69            69        False
-Fabric70            70        False
-Fabric71            71        False
-Fabric72            72        False
-Fabric73            73        False
-Fabric74            74        False
-Fabric75            75        False
-Fabric76            76        False
-Fabric77            77        False
-Fabric78            78        False
-Fabric79            79        False
-Fabric80            80        False
-Fabric81            81        False
-Fabric82            82        False
-Fabric83            83        False
-Fabric84            84        False
-Fabric85            85        False
-Fabric86            86        False
-Fabric87            87        False
-Fabric88            88        False
-Fabric89            89        False
-Fabric90            90        False
-Fabric91            91        False
-Fabric92            92        False
-Fabric93            93        False
-Fabric94            94        False
-Fabric95            95        False
-Fabric96            96        False
-Fabric97            97        False
-Fabric98            98        False
-Fabric99            99        False
-Fabric100           100       False
-Fabric101           101       False
-Fabric102           102       False
-Fabric103           103       False
-Fabric104           104       False
-Fabric105           105       False
-Fabric106           106       False
-Fabric107           107       False
-Fabric108           108       False
-Fabric109           109       False
-Fabric110           110       False
-Fabric111           111       False
-Fabric112           112       False
-Fabric113           113       False
-Fabric114           114       False
-Fabric115           115       False
-Fabric116           116       False
-Fabric117           117       False
-Fabric118           118       False
-Fabric119           119       False
-Fabric120           120       False
-Fabric121           121       False
-Fabric122           122       False
-Fabric123           123       False
-Fabric124           124       False
-Fabric125           125       False
-Fabric126           126       False
-Fabric127           127       False
-Fabric128           128       False
-Fabric129           129       False
-Fabric130           130       False
-Fabric131           131       False
-Fabric132           132       False
-Fabric133           133       False
-Fabric134           134       False
-Fabric135           135       False
-Fabric136           136       False
-Fabric137           137       False
-Fabric138           138       False
-Fabric139           139       False
-Fabric140           140       False
-Fabric141           141       False
-Fabric142           142       False
-Fabric143           143       False
-Fabric144           144       False
-Fabric145           145       False
-Fabric146           146       False
-Fabric147           147       False
-Fabric148           148       False
-Fabric149           149       False
-Fabric150           150       False
-Fabric151           151       False
-Fabric152           152       False
-Fabric153           153       False
-Fabric154           154       False
-Fabric155           155       False
-Fabric156           156       False
-Fabric157           157       False
-Fabric158           158       False
-Fabric159           159       False
-Fabric160           160       False
-Fabric161           161       False
-Fabric162           162       False
-Fabric163           163       False
-Fabric164           164       False
-Fabric165           165       False
-Fabric166           166       False
-Fabric167           167       False
-Fabric168           168       False
-Fabric169           169       False
-Fabric170           170       False
-Fabric171           171       False
-Fabric172           172       False
-Fabric173           173       False
-Fabric174           174       False
-Fabric175           175       False
-Fabric176           176       False
-Fabric177           177       False
-Fabric178           178       False
-Fabric179           179       False
-Fabric180           180       False
-Fabric181           181       False
-Fabric182           182       False
-Fabric183           183       False
-Fabric184           184       False
-Fabric185           185       False
-Fabric186           186       False
-Fabric187           187       False
-Fabric188           188       False
-Fabric189           189       False
-Fabric190           190       False
-Fabric191           191       False
diff --git a/device/arista/x86_64-arista_7800_sup/Arista-7808R3A-FM/fabric_port_config.ini b/device/arista/x86_64-arista_7800_sup/Arista-7808R3A-FM/fabric_port_config.ini
index f9a60d04e..1ffb084a1 100644
--- a/device/arista/x86_64-arista_7800_sup/Arista-7808R3A-FM/fabric_port_config.ini
+++ b/device/arista/x86_64-arista_7800_sup/Arista-7808R3A-FM/fabric_port_config.ini
@@ -1,193 +1,193 @@
-# name              lanes     isolateStatus
-Fabric0             0         False
-Fabric1             1         False
-Fabric2             2         False
-Fabric3             3         False
-Fabric4             4         False
-Fabric5             5         False
-Fabric6             6         False
-Fabric7             7         False
-Fabric8             8         False
-Fabric9             9         False
-Fabric10            10        False
-Fabric11            11        False
-Fabric12            12        False
-Fabric13            13        False
-Fabric14            14        False
-Fabric15            15        False
-Fabric16            16        False
-Fabric17            17        False
-Fabric18            18        False
-Fabric19            19        False
-Fabric20            20        False
-Fabric21            21        False
-Fabric22            22        False
-Fabric23            23        False
-Fabric24            24        False
-Fabric25            25        False
-Fabric26            26        False
-Fabric27            27        False
-Fabric28            28        False
-Fabric29            29        False
-Fabric30            30        False
-Fabric31            31        False
-Fabric32            32        False
-Fabric33            33        False
-Fabric34            34        False
-Fabric35            35        False
-Fabric36            36        False
-Fabric37            37        False
-Fabric38            38        False
-Fabric39            39        False
-Fabric40            40        False
-Fabric41            41        False
-Fabric42            42        False
-Fabric43            43        False
-Fabric44            44        False
-Fabric45            45        False
-Fabric46            46        False
-Fabric47            47        False
-Fabric48            48        False
-Fabric49            49        False
-Fabric50            50        False
-Fabric51            51        False
-Fabric52            52        False
-Fabric53            53        False
-Fabric54            54        False
-Fabric55            55        False
-Fabric56            56        False
-Fabric57            57        False
-Fabric58            58        False
-Fabric59            59        False
-Fabric60            60        False
-Fabric61            61        False
-Fabric62            62        False
-Fabric63            63        False
-Fabric64            64        False
-Fabric65            65        False
-Fabric66            66        False
-Fabric67            67        False
-Fabric68            68        False
-Fabric69            69        False
-Fabric70            70        False
-Fabric71            71        False
-Fabric72            72        False
-Fabric73            73        False
-Fabric74            74        False
-Fabric75            75        False
-Fabric76            76        False
-Fabric77            77        False
-Fabric78            78        False
-Fabric79            79        False
-Fabric80            80        False
-Fabric81            81        False
-Fabric82            82        False
-Fabric83            83        False
-Fabric84            84        False
-Fabric85            85        False
-Fabric86            86        False
-Fabric87            87        False
-Fabric88            88        False
-Fabric89            89        False
-Fabric90            90        False
-Fabric91            91        False
-Fabric92            92        False
-Fabric93            93        False
-Fabric94            94        False
-Fabric95            95        False
-Fabric96            96        False
-Fabric97            97        False
-Fabric98            98        False
-Fabric99            99        False
-Fabric100           100       False
-Fabric101           101       False
-Fabric102           102       False
-Fabric103           103       False
-Fabric104           104       False
-Fabric105           105       False
-Fabric106           106       False
-Fabric107           107       False
-Fabric108           108       False
-Fabric109           109       False
-Fabric110           110       False
-Fabric111           111       False
-Fabric112           112       False
-Fabric113           113       False
-Fabric114           114       False
-Fabric115           115       False
-Fabric116           116       False
-Fabric117           117       False
-Fabric118           118       False
-Fabric119           119       False
-Fabric120           120       False
-Fabric121           121       False
-Fabric122           122       False
-Fabric123           123       False
-Fabric124           124       False
-Fabric125           125       False
-Fabric126           126       False
-Fabric127           127       False
-Fabric128           128       False
-Fabric129           129       False
-Fabric130           130       False
-Fabric131           131       False
-Fabric132           132       False
-Fabric133           133       False
-Fabric134           134       False
-Fabric135           135       False
-Fabric136           136       False
-Fabric137           137       False
-Fabric138           138       False
-Fabric139           139       False
-Fabric140           140       False
-Fabric141           141       False
-Fabric142           142       False
-Fabric143           143       False
-Fabric144           144       False
-Fabric145           145       False
-Fabric146           146       False
-Fabric147           147       False
-Fabric148           148       False
-Fabric149           149       False
-Fabric150           150       False
-Fabric151           151       False
-Fabric152           152       False
-Fabric153           153       False
-Fabric154           154       False
-Fabric155           155       False
-Fabric156           156       False
-Fabric157           157       False
-Fabric158           158       False
-Fabric159           159       False
-Fabric160           160       False
-Fabric161           161       False
-Fabric162           162       False
-Fabric163           163       False
-Fabric164           164       False
-Fabric165           165       False
-Fabric166           166       False
-Fabric167           167       False
-Fabric168           168       False
-Fabric169           169       False
-Fabric170           170       False
-Fabric171           171       False
-Fabric172           172       False
-Fabric173           173       False
-Fabric174           174       False
-Fabric175           175       False
-Fabric176           176       False
-Fabric177           177       False
-Fabric178           178       False
-Fabric179           179       False
-Fabric180           180       False
-Fabric181           181       False
-Fabric182           182       False
-Fabric183           183       False
-Fabric184           184       False
-Fabric185           185       False
-Fabric186           186       False
-Fabric187           187       False
-Fabric188           188       False
-Fabric189           189       False
-Fabric190           190       False
-Fabric191           191       False
+# name              lanes     isolateStatus    forceUnisolateStatus
+Fabric0             0         False            0
+Fabric1             1         False            0
+Fabric2             2         False            0
+Fabric3             3         False            0
+Fabric4             4         False            0
+Fabric5             5         False            0
+Fabric6             6         False            0
+Fabric7             7         False            0
+Fabric8             8         False            0
+Fabric9             9         False            0
+Fabric10            10        False            0
+Fabric11            11        False            0
+Fabric12            12        False            0
+Fabric13            13        False            0
+Fabric14            14        False            0
+Fabric15            15        False            0
+Fabric16            16        False            0
+Fabric17            17        False            0
+Fabric18            18        False            0
+Fabric19            19        False            0
+Fabric20            20        False            0
+Fabric21            21        False            0
+Fabric22            22        False            0
+Fabric23            23        False            0
+Fabric24            24        False            0
+Fabric25            25        False            0
+Fabric26            26        False            0
+Fabric27            27        False            0
+Fabric28            28        False            0
+Fabric29            29        False            0
+Fabric30            30        False            0
+Fabric31            31        False            0
+Fabric32            32        False            0
+Fabric33            33        False            0
+Fabric34            34        False            0
+Fabric35            35        False            0
+Fabric36            36        False            0
+Fabric37            37        False            0
+Fabric38            38        False            0
+Fabric39            39        False            0
+Fabric40            40        False            0
+Fabric41            41        False            0
+Fabric42            42        False            0
+Fabric43            43        False            0
+Fabric44            44        False            0
+Fabric45            45        False            0
+Fabric46            46        False            0
+Fabric47            47        False            0
+Fabric48            48        False            0
+Fabric49            49        False            0
+Fabric50            50        False            0
+Fabric51            51        False            0
+Fabric52            52        False            0
+Fabric53            53        False            0
+Fabric54            54        False            0
+Fabric55            55        False            0
+Fabric56            56        False            0
+Fabric57            57        False            0
+Fabric58            58        False            0
+Fabric59            59        False            0
+Fabric60            60        False            0
+Fabric61            61        False            0
+Fabric62            62        False            0
+Fabric63            63        False            0
+Fabric64            64        False            0
+Fabric65            65        False            0
+Fabric66            66        False            0
+Fabric67            67        False            0
+Fabric68            68        False            0
+Fabric69            69        False            0
+Fabric70            70        False            0
+Fabric71            71        False            0
+Fabric72            72        False            0
+Fabric73            73        False            0
+Fabric74            74        False            0
+Fabric75            75        False            0
+Fabric76            76        False            0
+Fabric77            77        False            0
+Fabric78            78        False            0
+Fabric79            79        False            0
+Fabric80            80        False            0
+Fabric81            81        False            0
+Fabric82            82        False            0
+Fabric83            83        False            0
+Fabric84            84        False            0
+Fabric85            85        False            0
+Fabric86            86        False            0
+Fabric87            87        False            0
+Fabric88            88        False            0
+Fabric89            89        False            0
+Fabric90            90        False            0
+Fabric91            91        False            0
+Fabric92            92        False            0
+Fabric93            93        False            0
+Fabric94            94        False            0
+Fabric95            95        False            0
+Fabric96            96        False            0
+Fabric97            97        False            0
+Fabric98            98        False            0
+Fabric99            99        False            0
+Fabric100           100       False            0
+Fabric101           101       False            0
+Fabric102           102       False            0
+Fabric103           103       False            0
+Fabric104           104       False            0
+Fabric105           105       False            0
+Fabric106           106       False            0
+Fabric107           107       False            0
+Fabric108           108       False            0
+Fabric109           109       False            0
+Fabric110           110       False            0
+Fabric111           111       False            0
+Fabric112           112       False            0
+Fabric113           113       False            0
+Fabric114           114       False            0
+Fabric115           115       False            0
+Fabric116           116       False            0
+Fabric117           117       False            0
+Fabric118           118       False            0
+Fabric119           119       False            0
+Fabric120           120       False            0
+Fabric121           121       False            0
+Fabric122           122       False            0
+Fabric123           123       False            0
+Fabric124           124       False            0
+Fabric125           125       False            0
+Fabric126           126       False            0
+Fabric127           127       False            0
+Fabric128           128       False            0
+Fabric129           129       False            0
+Fabric130           130       False            0
+Fabric131           131       False            0
+Fabric132           132       False            0
+Fabric133           133       False            0
+Fabric134           134       False            0
+Fabric135           135       False            0
+Fabric136           136       False            0
+Fabric137           137       False            0
+Fabric138           138       False            0
+Fabric139           139       False            0
+Fabric140           140       False            0
+Fabric141           141       False            0
+Fabric142           142       False            0
+Fabric143           143       False            0
+Fabric144           144       False            0
+Fabric145           145       False            0
+Fabric146           146       False            0
+Fabric147           147       False            0
+Fabric148           148       False            0
+Fabric149           149       False            0
+Fabric150           150       False            0
+Fabric151           151       False            0
+Fabric152           152       False            0
+Fabric153           153       False            0
+Fabric154           154       False            0
+Fabric155           155       False            0
+Fabric156           156       False            0
+Fabric157           157       False            0
+Fabric158           158       False            0
+Fabric159           159       False            0
+Fabric160           160       False            0
+Fabric161           161       False            0
+Fabric162           162       False            0
+Fabric163           163       False            0
+Fabric164           164       False            0
+Fabric165           165       False            0
+Fabric166           166       False            0
+Fabric167           167       False            0
+Fabric168           168       False            0
+Fabric169           169       False            0
+Fabric170           170       False            0
+Fabric171           171       False            0
+Fabric172           172       False            0
+Fabric173           173       False            0
+Fabric174           174       False            0
+Fabric175           175       False            0
+Fabric176           176       False            0
+Fabric177           177       False            0
+Fabric178           178       False            0
+Fabric179           179       False            0
+Fabric180           180       False            0
+Fabric181           181       False            0
+Fabric182           182       False            0
+Fabric183           183       False            0
+Fabric184           184       False            0
+Fabric185           185       False            0
+Fabric186           186       False            0
+Fabric187           187       False            0
+Fabric188           188       False            0
+Fabric189           189       False            0
+Fabric190           190       False            0
+Fabric191           191       False            0
diff --git a/device/arista/x86_64-arista_7800r3_48cq2_lc/Arista-7800R3-48CQ2-C48/fabric_port_config.ini b/device/arista/x86_64-arista_7800r3_48cq2_lc/Arista-7800R3-48CQ2-C48/fabric_port_config.ini
index e07e256dc..3aebf8a46 100644
--- a/device/arista/x86_64-arista_7800r3_48cq2_lc/Arista-7800R3-48CQ2-C48/fabric_port_config.ini
+++ b/device/arista/x86_64-arista_7800r3_48cq2_lc/Arista-7800R3-48CQ2-C48/fabric_port_config.ini
@@ -1,113 +1,113 @@
-# name              lanes     isolateStatus
-Fabric0             0         False
-Fabric1             1         False
-Fabric2             2         False
-Fabric3             3         False
-Fabric4             4         False
-Fabric5             5         False
-Fabric6             6         False
-Fabric7             7         False
-Fabric8             8         False
-Fabric9             9         False
-Fabric10            10        False
-Fabric11            11        False
-Fabric12            12        False
-Fabric13            13        False
-Fabric14            14        False
-Fabric15            15        False
-Fabric16            16        False
-Fabric17            17        False
-Fabric18            18        False
-Fabric19            19        False
-Fabric20            20        False
-Fabric21            21        False
-Fabric22            22        False
-Fabric23            23        False
-Fabric24            24        False
-Fabric25            25        False
-Fabric26            26        False
-Fabric27            27        False
-Fabric28            28        False
-Fabric29            29        False
-Fabric30            30        False
-Fabric31            31        False
-Fabric32            32        False
-Fabric33            33        False
-Fabric34            34        False
-Fabric35            35        False
-Fabric36            36        False
-Fabric37            37        False
-Fabric38            38        False
-Fabric39            39        False
-Fabric40            40        False
-Fabric41            41        False
-Fabric42            42        False
-Fabric43            43        False
-Fabric44            44        False
-Fabric45            45        False
-Fabric46            46        False
-Fabric47            47        False
-Fabric48            48        False
-Fabric49            49        False
-Fabric50            50        False
-Fabric51            51        False
-Fabric52            52        False
-Fabric53            53        False
-Fabric54            54        False
-Fabric55            55        False
-Fabric56            56        False
-Fabric57            57        False
-Fabric58            58        False
-Fabric59            59        False
-Fabric60            60        False
-Fabric61            61        False
-Fabric62            62        False
-Fabric63            63        False
-Fabric64            64        False
-Fabric65            65        False
-Fabric66            66        False
-Fabric67            67        False
-Fabric68            68        False
-Fabric69            69        False
-Fabric70            70        False
-Fabric71            71        False
-Fabric72            72        False
-Fabric73            73        False
-Fabric74            74        False
-Fabric75            75        False
-Fabric76            76        False
-Fabric77            77        False
-Fabric78            78        False
-Fabric79            79        False
-Fabric80            80        False
-Fabric81            81        False
-Fabric82            82        False
-Fabric83            83        False
-Fabric84            84        False
-Fabric85            85        False
-Fabric86            86        False
-Fabric87            87        False
-Fabric88            88        False
-Fabric89            89        False
-Fabric90            90        False
-Fabric91            91        False
-Fabric92            92        False
-Fabric93            93        False
-Fabric94            94        False
-Fabric95            95        False
-Fabric96            96        False
-Fabric97            97        False
-Fabric98            98        False
-Fabric99            99        False
-Fabric100           100       False
-Fabric101           101       False
-Fabric102           102       False
-Fabric103           103       False
-Fabric104           104       False
-Fabric105           105       False
-Fabric106           106       False
-Fabric107           107       False
-Fabric108           108       False
-Fabric109           109       False
-Fabric110           110       False
-Fabric111           111       False
+# name              lanes     isolateStatus    forceUnisolateStatus
+Fabric0             0         False            0
+Fabric1             1         False            0
+Fabric2             2         False            0
+Fabric3             3         False            0
+Fabric4             4         False            0
+Fabric5             5         False            0
+Fabric6             6         False            0
+Fabric7             7         False            0
+Fabric8             8         False            0
+Fabric9             9         False            0
+Fabric10            10        False            0
+Fabric11            11        False            0
+Fabric12            12        False            0
+Fabric13            13        False            0
+Fabric14            14        False            0
+Fabric15            15        False            0
+Fabric16            16        False            0
+Fabric17            17        False            0
+Fabric18            18        False            0
+Fabric19            19        False            0
+Fabric20            20        False            0
+Fabric21            21        False            0
+Fabric22            22        False            0
+Fabric23            23        False            0
+Fabric24            24        False            0
+Fabric25            25        False            0
+Fabric26            26        False            0
+Fabric27            27        False            0
+Fabric28            28        False            0
+Fabric29            29        False            0
+Fabric30            30        False            0
+Fabric31            31        False            0
+Fabric32            32        False            0
+Fabric33            33        False            0
+Fabric34            34        False            0
+Fabric35            35        False            0
+Fabric36            36        False            0
+Fabric37            37        False            0
+Fabric38            38        False            0
+Fabric39            39        False            0
+Fabric40            40        False            0
+Fabric41            41        False            0
+Fabric42            42        False            0
+Fabric43            43        False            0
+Fabric44            44        False            0
+Fabric45            45        False            0
+Fabric46            46        False            0
+Fabric47            47        False            0
+Fabric48            48        False            0
+Fabric49            49        False            0
+Fabric50            50        False            0
+Fabric51            51        False            0
+Fabric52            52        False            0
+Fabric53            53        False            0
+Fabric54            54        False            0
+Fabric55            55        False            0
+Fabric56            56        False            0
+Fabric57            57        False            0
+Fabric58            58        False            0
+Fabric59            59        False            0
+Fabric60            60        False            0
+Fabric61            61        False            0
+Fabric62            62        False            0
+Fabric63            63        False            0
+Fabric64            64        False            0
+Fabric65            65        False            0
+Fabric66            66        False            0
+Fabric67            67        False            0
+Fabric68            68        False            0
+Fabric69            69        False            0
+Fabric70            70        False            0
+Fabric71            71        False            0
+Fabric72            72        False            0
+Fabric73            73        False            0
+Fabric74            74        False            0
+Fabric75            75        False            0
+Fabric76            76        False            0
+Fabric77            77        False            0
+Fabric78            78        False            0
+Fabric79            79        False            0
+Fabric80            80        False            0
+Fabric81            81        False            0
+Fabric82            82        False            0
+Fabric83            83        False            0
+Fabric84            84        False            0
+Fabric85            85        False            0
+Fabric86            86        False            0
+Fabric87            87        False            0
+Fabric88            88        False            0
+Fabric89            89        False            0
+Fabric90            90        False            0
+Fabric91            91        False            0
+Fabric92            92        False            0
+Fabric93            93        False            0
+Fabric94            94        False            0
+Fabric95            95        False            0
+Fabric96            96        False            0
+Fabric97            97        False            0
+Fabric98            98        False            0
+Fabric99            99        False            0
+Fabric100           100       False            0
+Fabric101           101       False            0
+Fabric102           102       False            0
+Fabric103           103       False            0
+Fabric104           104       False            0
+Fabric105           105       False            0
+Fabric106           106       False            0
+Fabric107           107       False            0
+Fabric108           108       False            0
+Fabric109           109       False            0
+Fabric110           110       False            0
+Fabric111           111       False            0
diff --git a/device/arista/x86_64-arista_7800r3_48cqm2_lc/Arista-7800R3-48CQM2-C48/fabric_port_config.ini b/device/arista/x86_64-arista_7800r3_48cqm2_lc/Arista-7800R3-48CQM2-C48/fabric_port_config.ini
index e07e256dc..3aebf8a46 100644
--- a/device/arista/x86_64-arista_7800r3_48cqm2_lc/Arista-7800R3-48CQM2-C48/fabric_port_config.ini
+++ b/device/arista/x86_64-arista_7800r3_48cqm2_lc/Arista-7800R3-48CQM2-C48/fabric_port_config.ini
@@ -1,113 +1,113 @@
-# name              lanes     isolateStatus
-Fabric0             0         False
-Fabric1             1         False
-Fabric2             2         False
-Fabric3             3         False
-Fabric4             4         False
-Fabric5             5         False
-Fabric6             6         False
-Fabric7             7         False
-Fabric8             8         False
-Fabric9             9         False
-Fabric10            10        False
-Fabric11            11        False
-Fabric12            12        False
-Fabric13            13        False
-Fabric14            14        False
-Fabric15            15        False
-Fabric16            16        False
-Fabric17            17        False
-Fabric18            18        False
-Fabric19            19        False
-Fabric20            20        False
-Fabric21            21        False
-Fabric22            22        False
-Fabric23            23        False
-Fabric24            24        False
-Fabric25            25        False
-Fabric26            26        False
-Fabric27            27        False
-Fabric28            28        False
-Fabric29            29        False
-Fabric30            30        False
-Fabric31            31        False
-Fabric32            32        False
-Fabric33            33        False
-Fabric34            34        False
-Fabric35            35        False
-Fabric36            36        False
-Fabric37            37        False
-Fabric38            38        False
-Fabric39            39        False
-Fabric40            40        False
-Fabric41            41        False
-Fabric42            42        False
-Fabric43            43        False
-Fabric44            44        False
-Fabric45            45        False
-Fabric46            46        False
-Fabric47            47        False
-Fabric48            48        False
-Fabric49            49        False
-Fabric50            50        False
-Fabric51            51        False
-Fabric52            52        False
-Fabric53            53        False
-Fabric54            54        False
-Fabric55            55        False
-Fabric56            56        False
-Fabric57            57        False
-Fabric58            58        False
-Fabric59            59        False
-Fabric60            60        False
-Fabric61            61        False
-Fabric62            62        False
-Fabric63            63        False
-Fabric64            64        False
-Fabric65            65        False
-Fabric66            66        False
-Fabric67            67        False
-Fabric68            68        False
-Fabric69            69        False
-Fabric70            70        False
-Fabric71            71        False
-Fabric72            72        False
-Fabric73            73        False
-Fabric74            74        False
-Fabric75            75        False
-Fabric76            76        False
-Fabric77            77        False
-Fabric78            78        False
-Fabric79            79        False
-Fabric80            80        False
-Fabric81            81        False
-Fabric82            82        False
-Fabric83            83        False
-Fabric84            84        False
-Fabric85            85        False
-Fabric86            86        False
-Fabric87            87        False
-Fabric88            88        False
-Fabric89            89        False
-Fabric90            90        False
-Fabric91            91        False
-Fabric92            92        False
-Fabric93            93        False
-Fabric94            94        False
-Fabric95            95        False
-Fabric96            96        False
-Fabric97            97        False
-Fabric98            98        False
-Fabric99            99        False
-Fabric100           100       False
-Fabric101           101       False
-Fabric102           102       False
-Fabric103           103       False
-Fabric104           104       False
-Fabric105           105       False
-Fabric106           106       False
-Fabric107           107       False
-Fabric108           108       False
-Fabric109           109       False
-Fabric110           110       False
-Fabric111           111       False
+# name              lanes     isolateStatus    forceUnisolateStatus
+Fabric0             0         False            0
+Fabric1             1         False            0
+Fabric2             2         False            0
+Fabric3             3         False            0
+Fabric4             4         False            0
+Fabric5             5         False            0
+Fabric6             6         False            0
+Fabric7             7         False            0
+Fabric8             8         False            0
+Fabric9             9         False            0
+Fabric10            10        False            0
+Fabric11            11        False            0
+Fabric12            12        False            0
+Fabric13            13        False            0
+Fabric14            14        False            0
+Fabric15            15        False            0
+Fabric16            16        False            0
+Fabric17            17        False            0
+Fabric18            18        False            0
+Fabric19            19        False            0
+Fabric20            20        False            0
+Fabric21            21        False            0
+Fabric22            22        False            0
+Fabric23            23        False            0
+Fabric24            24        False            0
+Fabric25            25        False            0
+Fabric26            26        False            0
+Fabric27            27        False            0
+Fabric28            28        False            0
+Fabric29            29        False            0
+Fabric30            30        False            0
+Fabric31            31        False            0
+Fabric32            32        False            0
+Fabric33            33        False            0
+Fabric34            34        False            0
+Fabric35            35        False            0
+Fabric36            36        False            0
+Fabric37            37        False            0
+Fabric38            38        False            0
+Fabric39            39        False            0
+Fabric40            40        False            0
+Fabric41            41        False            0
+Fabric42            42        False            0
+Fabric43            43        False            0
+Fabric44            44        False            0
+Fabric45            45        False            0
+Fabric46            46        False            0
+Fabric47            47        False            0
+Fabric48            48        False            0
+Fabric49            49        False            0
+Fabric50            50        False            0
+Fabric51            51        False            0
+Fabric52            52        False            0
+Fabric53            53        False            0
+Fabric54            54        False            0
+Fabric55            55        False            0
+Fabric56            56        False            0
+Fabric57            57        False            0
+Fabric58            58        False            0
+Fabric59            59        False            0
+Fabric60            60        False            0
+Fabric61            61        False            0
+Fabric62            62        False            0
+Fabric63            63        False            0
+Fabric64            64        False            0
+Fabric65            65        False            0
+Fabric66            66        False            0
+Fabric67            67        False            0
+Fabric68            68        False            0
+Fabric69            69        False            0
+Fabric70            70        False            0
+Fabric71            71        False            0
+Fabric72            72        False            0
+Fabric73            73        False            0
+Fabric74            74        False            0
+Fabric75            75        False            0
+Fabric76            76        False            0
+Fabric77            77        False            0
+Fabric78            78        False            0
+Fabric79            79        False            0
+Fabric80            80        False            0
+Fabric81            81        False            0
+Fabric82            82        False            0
+Fabric83            83        False            0
+Fabric84            84        False            0
+Fabric85            85        False            0
+Fabric86            86        False            0
+Fabric87            87        False            0
+Fabric88            88        False            0
+Fabric89            89        False            0
+Fabric90            90        False            0
+Fabric91            91        False            0
+Fabric92            92        False            0
+Fabric93            93        False            0
+Fabric94            94        False            0
+Fabric95            95        False            0
+Fabric96            96        False            0
+Fabric97            97        False            0
+Fabric98            98        False            0
+Fabric99            99        False            0
+Fabric100           100       False            0
+Fabric101           101       False            0
+Fabric102           102       False            0
+Fabric103           103       False            0
+Fabric104           104       False            0
+Fabric105           105       False            0
+Fabric106           106       False            0
+Fabric107           107       False            0
+Fabric108           108       False            0
+Fabric109           109       False            0
+Fabric110           110       False            0
+Fabric111           111       False            0
diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/fabric_monitor_config.json b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/fabric_monitor_config.json
new file mode 100644
index 000000000..0f67504ca
--- /dev/null
+++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/fabric_monitor_config.json
@@ -0,0 +1,9 @@
+{
+   "FABRIC_MONITOR_DATA": {
+      "monErrThreshCrcCells": 1,
+      "monErrThreshRxCells": 61035156,
+      "monPollThreshRecovery": 8,
+      "monPollThreshIsolation": 1,
+      "monCapacityThreshWarn": 100
+   }
+}
diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/fabric_port_config.ini b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/fabric_port_config.ini
new file mode 100644
index 000000000..1ffb084a1
--- /dev/null
+++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/fabric_port_config.ini
@@ -0,0 +1,193 @@
+# name              lanes     isolateStatus    forceUnisolateStatus
+Fabric0             0         False            0
+Fabric1             1         False            0
+Fabric2             2         False            0
+Fabric3             3         False            0
+Fabric4             4         False            0
+Fabric5             5         False            0
+Fabric6             6         False            0
+Fabric7             7         False            0
+Fabric8             8         False            0
+Fabric9             9         False            0
+Fabric10            10        False            0
+Fabric11            11        False            0
+Fabric12            12        False            0
+Fabric13            13        False            0
+Fabric14            14        False            0
+Fabric15            15        False            0
+Fabric16            16        False            0
+Fabric17            17        False            0
+Fabric18            18        False            0
+Fabric19            19        False            0
+Fabric20            20        False            0
+Fabric21            21        False            0
+Fabric22            22        False            0
+Fabric23            23        False            0
+Fabric24            24        False            0
+Fabric25            25        False            0
+Fabric26            26        False            0
+Fabric27            27        False            0
+Fabric28            28        False            0
+Fabric29            29        False            0
+Fabric30            30        False            0
+Fabric31            31        False            0
+Fabric32            32        False            0
+Fabric33            33        False            0
+Fabric34            34        False            0
+Fabric35            35        False            0
+Fabric36            36        False            0
+Fabric37            37        False            0
+Fabric38            38        False            0
+Fabric39            39        False            0
+Fabric40            40        False            0
+Fabric41            41        False            0
+Fabric42            42        False            0
+Fabric43            43        False            0
+Fabric44            44        False            0
+Fabric45            45        False            0
+Fabric46            46        False            0
+Fabric47            47        False            0
+Fabric48            48        False            0
+Fabric49            49        False            0
+Fabric50            50        False            0
+Fabric51            51        False            0
+Fabric52            52        False            0
+Fabric53            53        False            0
+Fabric54            54        False            0
+Fabric55            55        False            0
+Fabric56            56        False            0
+Fabric57            57        False            0
+Fabric58            58        False            0
+Fabric59            59        False            0
+Fabric60            60        False            0
+Fabric61            61        False            0
+Fabric62            62        False            0
+Fabric63            63        False            0
+Fabric64            64        False            0
+Fabric65            65        False            0
+Fabric66            66        False            0
+Fabric67            67        False            0
+Fabric68            68        False            0
+Fabric69            69        False            0
+Fabric70            70        False            0
+Fabric71            71        False            0
+Fabric72            72        False            0
+Fabric73            73        False            0
+Fabric74            74        False            0
+Fabric75            75        False            0
+Fabric76            76        False            0
+Fabric77            77        False            0
+Fabric78            78        False            0
+Fabric79            79        False            0
+Fabric80            80        False            0
+Fabric81            81        False            0
+Fabric82            82        False            0
+Fabric83            83        False            0
+Fabric84            84        False            0
+Fabric85            85        False            0
+Fabric86            86        False            0
+Fabric87            87        False            0
+Fabric88            88        False            0
+Fabric89            89        False            0
+Fabric90            90        False            0
+Fabric91            91        False            0
+Fabric92            92        False            0
+Fabric93            93        False            0
+Fabric94            94        False            0
+Fabric95            95        False            0
+Fabric96            96        False            0
+Fabric97            97        False            0
+Fabric98            98        False            0
+Fabric99            99        False            0
+Fabric100           100       False            0
+Fabric101           101       False            0
+Fabric102           102       False            0
+Fabric103           103       False            0
+Fabric104           104       False            0
+Fabric105           105       False            0
+Fabric106           106       False            0
+Fabric107           107       False            0
+Fabric108           108       False            0
+Fabric109           109       False            0
+Fabric110           110       False            0
+Fabric111           111       False            0
+Fabric112           112       False            0
+Fabric113           113       False            0
+Fabric114           114       False            0
+Fabric115           115       False            0
+Fabric116           116       False            0
+Fabric117           117       False            0
+Fabric118           118       False            0
+Fabric119           119       False            0
+Fabric120           120       False            0
+Fabric121           121       False            0
+Fabric122           122       False            0
+Fabric123           123       False            0
+Fabric124           124       False            0
+Fabric125           125       False            0
+Fabric126           126       False            0
+Fabric127           127       False            0
+Fabric128           128       False            0
+Fabric129           129       False            0
+Fabric130           130       False            0
+Fabric131           131       False            0
+Fabric132           132       False            0
+Fabric133           133       False            0
+Fabric134           134       False            0
+Fabric135           135       False            0
+Fabric136           136       False            0
+Fabric137           137       False            0
+Fabric138           138       False            0
+Fabric139           139       False            0
+Fabric140           140       False            0
+Fabric141           141       False            0
+Fabric142           142       False            0
+Fabric143           143       False            0
+Fabric144           144       False            0
+Fabric145           145       False            0
+Fabric146           146       False            0
+Fabric147           147       False            0
+Fabric148           148       False            0
+Fabric149           149       False            0
+Fabric150           150       False            0
+Fabric151           151       False            0
+Fabric152           152       False            0
+Fabric153           153       False            0
+Fabric154           154       False            0
+Fabric155           155       False            0
+Fabric156           156       False            0
+Fabric157           157       False            0
+Fabric158           158       False            0
+Fabric159           159       False            0
+Fabric160           160       False            0
+Fabric161           161       False            0
+Fabric162           162       False            0
+Fabric163           163       False            0
+Fabric164           164       False            0
+Fabric165           165       False            0
+Fabric166           166       False            0
+Fabric167           167       False            0
+Fabric168           168       False            0
+Fabric169           169       False            0
+Fabric170           170       False            0
+Fabric171           171       False            0
+Fabric172           172       False            0
+Fabric173           173       False            0
+Fabric174           174       False            0
+Fabric175           175       False            0
+Fabric176           176       False            0
+Fabric177           177       False            0
+Fabric178           178       False            0
+Fabric179           179       False            0
+Fabric180           180       False            0
+Fabric181           181       False            0
+Fabric182           182       False            0
+Fabric183           183       False            0
+Fabric184           184       False            0
+Fabric185           185       False            0
+Fabric186           186       False            0
+Fabric187           187       False            0
+Fabric188           188       False            0
+Fabric189           189       False            0
+Fabric190           190       False            0
+Fabric191           191       False            0
diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/fabric_port_config.ini b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/fabric_port_config.ini
index f9a60d04e..1ffb084a1 100644
--- a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/fabric_port_config.ini
+++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/fabric_port_config.ini
@@ -1,193 +1,193 @@
-# name              lanes     isolateStatus
-Fabric0             0         False
-Fabric1             1         False
-Fabric2             2         False
-Fabric3             3         False
-Fabric4             4         False
-Fabric5             5         False
-Fabric6             6         False
-Fabric7             7         False
-Fabric8             8         False
-Fabric9             9         False
-Fabric10            10        False
-Fabric11            11        False
-Fabric12            12        False
-Fabric13            13        False
-Fabric14            14        False
-Fabric15            15        False
-Fabric16            16        False
-Fabric17            17        False
-Fabric18            18        False
-Fabric19            19        False
-Fabric20            20        False
-Fabric21            21        False
-Fabric22            22        False
-Fabric23            23        False
-Fabric24            24        False
-Fabric25            25        False
-Fabric26            26        False
-Fabric27            27        False
-Fabric28            28        False
-Fabric29            29        False
-Fabric30            30        False
-Fabric31            31        False
-Fabric32            32        False
-Fabric33            33        False
-Fabric34            34        False
-Fabric35            35        False
-Fabric36            36        False
-Fabric37            37        False
-Fabric38            38        False
-Fabric39            39        False
-Fabric40            40        False
-Fabric41            41        False
-Fabric42            42        False
-Fabric43            43        False
-Fabric44            44        False
-Fabric45            45        False
-Fabric46            46        False
-Fabric47            47        False
-Fabric48            48        False
-Fabric49            49        False
-Fabric50            50        False
-Fabric51            51        False
-Fabric52            52        False
-Fabric53            53        False
-Fabric54            54        False
-Fabric55            55        False
-Fabric56            56        False
-Fabric57            57        False
-Fabric58            58        False
-Fabric59            59        False
-Fabric60            60        False
-Fabric61            61        False
-Fabric62            62        False
-Fabric63            63        False
-Fabric64            64        False
-Fabric65            65        False
-Fabric66            66        False
-Fabric67            67        False
-Fabric68            68        False
-Fabric69            69        False
-Fabric70            70        False
-Fabric71            71        False
-Fabric72            72        False
-Fabric73            73        False
-Fabric74            74        False
-Fabric75            75        False
-Fabric76            76        False
-Fabric77            77        False
-Fabric78            78        False
-Fabric79            79        False
-Fabric80            80        False
-Fabric81            81        False
-Fabric82            82        False
-Fabric83            83        False
-Fabric84            84        False
-Fabric85            85        False
-Fabric86            86        False
-Fabric87            87        False
-Fabric88            88        False
-Fabric89            89        False
-Fabric90            90        False
-Fabric91            91        False
-Fabric92            92        False
-Fabric93            93        False
-Fabric94            94        False
-Fabric95            95        False
-Fabric96            96        False
-Fabric97            97        False
-Fabric98            98        False
-Fabric99            99        False
-Fabric100           100       False
-Fabric101           101       False
-Fabric102           102       False
-Fabric103           103       False
-Fabric104           104       False
-Fabric105           105       False
-Fabric106           106       False
-Fabric107           107       False
-Fabric108           108       False
-Fabric109           109       False
-Fabric110           110       False
-Fabric111           111       False
-Fabric112           112       False
-Fabric113           113       False
-Fabric114           114       False
-Fabric115           115       False
-Fabric116           116       False
-Fabric117           117       False
-Fabric118           118       False
-Fabric119           119       False
-Fabric120           120       False
-Fabric121           121       False
-Fabric122           122       False
-Fabric123           123       False
-Fabric124           124       False
-Fabric125           125       False
-Fabric126           126       False
-Fabric127           127       False
-Fabric128           128       False
-Fabric129           129       False
-Fabric130           130       False
-Fabric131           131       False
-Fabric132           132       False
-Fabric133           133       False
-Fabric134           134       False
-Fabric135           135       False
-Fabric136           136       False
-Fabric137           137       False
-Fabric138           138       False
-Fabric139           139       False
-Fabric140           140       False
-Fabric141           141       False
-Fabric142           142       False
-Fabric143           143       False
-Fabric144           144       False
-Fabric145           145       False
-Fabric146           146       False
-Fabric147           147       False
-Fabric148           148       False
-Fabric149           149       False
-Fabric150           150       False
-Fabric151           151       False
-Fabric152           152       False
-Fabric153           153       False
-Fabric154           154       False
-Fabric155           155       False
-Fabric156           156       False
-Fabric157           157       False
-Fabric158           158       False
-Fabric159           159       False
-Fabric160           160       False
-Fabric161           161       False
-Fabric162           162       False
-Fabric163           163       False
-Fabric164           164       False
-Fabric165           165       False
-Fabric166           166       False
-Fabric167           167       False
-Fabric168           168       False
-Fabric169           169       False
-Fabric170           170       False
-Fabric171           171       False
-Fabric172           172       False
-Fabric173           173       False
-Fabric174           174       False
-Fabric175           175       False
-Fabric176           176       False
-Fabric177           177       False
-Fabric178           178       False
-Fabric179           179       False
-Fabric180           180       False
-Fabric181           181       False
-Fabric182           182       False
-Fabric183           183       False
-Fabric184           184       False
-Fabric185           185       False
-Fabric186           186       False
-Fabric187           187       False
-Fabric188           188       False
-Fabric189           189       False
-Fabric190           190       False
-Fabric191           191       False
+# name              lanes     isolateStatus    forceUnisolateStatus
+Fabric0             0         False            0
+Fabric1             1         False            0
+Fabric2             2         False            0
+Fabric3             3         False            0
+Fabric4             4         False            0
+Fabric5             5         False            0
+Fabric6             6         False            0
+Fabric7             7         False            0
+Fabric8             8         False            0
+Fabric9             9         False            0
+Fabric10            10        False            0
+Fabric11            11        False            0
+Fabric12            12        False            0
+Fabric13            13        False            0
+Fabric14            14        False            0
+Fabric15            15        False            0
+Fabric16            16        False            0
+Fabric17            17        False            0
+Fabric18            18        False            0
+Fabric19            19        False            0
+Fabric20            20        False            0
+Fabric21            21        False            0
+Fabric22            22        False            0
+Fabric23            23        False            0
+Fabric24            24        False            0
+Fabric25            25        False            0
+Fabric26            26        False            0
+Fabric27            27        False            0
+Fabric28            28        False            0
+Fabric29            29        False            0
+Fabric30            30        False            0
+Fabric31            31        False            0
+Fabric32            32        False            0
+Fabric33            33        False            0
+Fabric34            34        False            0
+Fabric35            35        False            0
+Fabric36            36        False            0
+Fabric37            37        False            0
+Fabric38            38        False            0
+Fabric39            39        False            0
+Fabric40            40        False            0
+Fabric41            41        False            0
+Fabric42            42        False            0
+Fabric43            43        False            0
+Fabric44            44        False            0
+Fabric45            45        False            0
+Fabric46            46        False            0
+Fabric47            47        False            0
+Fabric48            48        False            0
+Fabric49            49        False            0
+Fabric50            50        False            0
+Fabric51            51        False            0
+Fabric52            52        False            0
+Fabric53            53        False            0
+Fabric54            54        False            0
+Fabric55            55        False            0
+Fabric56            56        False            0
+Fabric57            57        False            0
+Fabric58            58        False            0
+Fabric59            59        False            0
+Fabric60            60        False            0
+Fabric61            61        False            0
+Fabric62            62        False            0
+Fabric63            63        False            0
+Fabric64            64        False            0
+Fabric65            65        False            0
+Fabric66            66        False            0
+Fabric67            67        False            0
+Fabric68            68        False            0
+Fabric69            69        False            0
+Fabric70            70        False            0
+Fabric71            71        False            0
+Fabric72            72        False            0
+Fabric73            73        False            0
+Fabric74            74        False            0
+Fabric75            75        False            0
+Fabric76            76        False            0
+Fabric77            77        False            0
+Fabric78            78        False            0
+Fabric79            79        False            0
+Fabric80            80        False            0
+Fabric81            81        False            0
+Fabric82            82        False            0
+Fabric83            83        False            0
+Fabric84            84        False            0
+Fabric85            85        False            0
+Fabric86            86        False            0
+Fabric87            87        False            0
+Fabric88            88        False            0
+Fabric89            89        False            0
+Fabric90            90        False            0
+Fabric91            91        False            0
+Fabric92            92        False            0
+Fabric93            93        False            0
+Fabric94            94        False            0
+Fabric95            95        False            0
+Fabric96            96        False            0
+Fabric97            97        False            0
+Fabric98            98        False            0
+Fabric99            99        False            0
+Fabric100           100       False            0
+Fabric101           101       False            0
+Fabric102           102       False            0
+Fabric103           103       False            0
+Fabric104           104       False            0
+Fabric105           105       False            0
+Fabric106           106       False            0
+Fabric107           107       False            0
+Fabric108           108       False            0
+Fabric109           109       False            0
+Fabric110           110       False            0
+Fabric111           111       False            0
+Fabric112           112       False            0
+Fabric113           113       False            0
+Fabric114           114       False            0
+Fabric115           115       False            0
+Fabric116           116       False            0
+Fabric117           117       False            0
+Fabric118           118       False            0
+Fabric119           119       False            0
+Fabric120           120       False            0
+Fabric121           121       False            0
+Fabric122           122       False            0
+Fabric123           123       False            0
+Fabric124           124       False            0
+Fabric125           125       False            0
+Fabric126           126       False            0
+Fabric127           127       False            0
+Fabric128           128       False            0
+Fabric129           129       False            0
+Fabric130           130       False            0
+Fabric131           131       False            0
+Fabric132           132       False            0
+Fabric133           133       False            0
+Fabric134           134       False            0
+Fabric135           135       False            0
+Fabric136           136       False            0
+Fabric137           137       False            0
+Fabric138           138       False            0
+Fabric139           139       False            0
+Fabric140           140       False            0
+Fabric141           141       False            0
+Fabric142           142       False            0
+Fabric143           143       False            0
+Fabric144           144       False            0
+Fabric145           145       False            0
+Fabric146           146       False            0
+Fabric147           147       False            0
+Fabric148           148       False            0
+Fabric149           149       False            0
+Fabric150           150       False            0
+Fabric151           151       False            0
+Fabric152           152       False            0
+Fabric153           153       False            0
+Fabric154           154       False            0
+Fabric155           155       False            0
+Fabric156           156       False            0
+Fabric157           157       False            0
+Fabric158           158       False            0
+Fabric159           159       False            0
+Fabric160           160       False            0
+Fabric161           161       False            0
+Fabric162           162       False            0
+Fabric163           163       False            0
+Fabric164           164       False            0
+Fabric165           165       False            0
+Fabric166           166       False            0
+Fabric167           167       False            0
+Fabric168           168       False            0
+Fabric169           169       False            0
+Fabric170           170       False            0
+Fabric171           171       False            0
+Fabric172           172       False            0
+Fabric173           173       False            0
+Fabric174           174       False            0
+Fabric175           175       False            0
+Fabric176           176       False            0
+Fabric177           177       False            0
+Fabric178           178       False            0
+Fabric179           179       False            0
+Fabric180           180       False            0
+Fabric181           181       False            0
+Fabric182           182       False            0
+Fabric183           183       False            0
+Fabric184           184       False            0
+Fabric185           185       False            0
+Fabric186           186       False            0
+Fabric187           187       False            0
+Fabric188           188       False            0
+Fabric189           189       False            0
+Fabric190           190       False            0
+Fabric191           191       False            0
diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/fabric_monitor_config.json b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/fabric_monitor_config.json
new file mode 100644
index 000000000..0f67504ca
--- /dev/null
+++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/fabric_monitor_config.json
@@ -0,0 +1,9 @@
+{
+   "FABRIC_MONITOR_DATA": {
+      "monErrThreshCrcCells": 1,
+      "monErrThreshRxCells": 61035156,
+      "monPollThreshRecovery": 8,
+      "monPollThreshIsolation": 1,
+      "monCapacityThreshWarn": 100
+   }
+}
diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/fabric_port_config.ini b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/fabric_port_config.ini
new file mode 100644
index 000000000..1ffb084a1
--- /dev/null
+++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/fabric_port_config.ini
@@ -0,0 +1,193 @@
+# name              lanes     isolateStatus    forceUnisolateStatus
+Fabric0             0         False            0
+Fabric1             1         False            0
+Fabric2             2         False            0
+Fabric3             3         False            0
+Fabric4             4         False            0
+Fabric5             5         False            0
+Fabric6             6         False            0
+Fabric7             7         False            0
+Fabric8             8         False            0
+Fabric9             9         False            0
+Fabric10            10        False            0
+Fabric11            11        False            0
+Fabric12            12        False            0
+Fabric13            13        False            0
+Fabric14            14        False            0
+Fabric15            15        False            0
+Fabric16            16        False            0
+Fabric17            17        False            0
+Fabric18            18        False            0
+Fabric19            19        False            0
+Fabric20            20        False            0
+Fabric21            21        False            0
+Fabric22            22        False            0
+Fabric23            23        False            0
+Fabric24            24        False            0
+Fabric25            25        False            0
+Fabric26            26        False            0
+Fabric27            27        False            0
+Fabric28            28        False            0
+Fabric29            29        False            0
+Fabric30            30        False            0
+Fabric31            31        False            0
+Fabric32            32        False            0
+Fabric33            33        False            0
+Fabric34            34        False            0
+Fabric35            35        False            0
+Fabric36            36        False            0
+Fabric37            37        False            0
+Fabric38            38        False            0
+Fabric39            39        False            0
+Fabric40            40        False            0
+Fabric41            41        False            0
+Fabric42            42        False            0
+Fabric43            43        False            0
+Fabric44            44        False            0
+Fabric45            45        False            0
+Fabric46            46        False            0
+Fabric47            47        False            0
+Fabric48            48        False            0
+Fabric49            49        False            0
+Fabric50            50        False            0
+Fabric51            51        False            0
+Fabric52            52        False            0
+Fabric53            53        False            0
+Fabric54            54        False            0
+Fabric55            55        False            0
+Fabric56            56        False            0
+Fabric57            57        False            0
+Fabric58            58        False            0
+Fabric59            59        False            0
+Fabric60            60        False            0
+Fabric61            61        False            0
+Fabric62            62        False            0
+Fabric63            63        False            0
+Fabric64            64        False            0
+Fabric65            65        False            0
+Fabric66            66        False            0
+Fabric67            67        False            0
+Fabric68            68        False            0
+Fabric69            69        False            0
+Fabric70            70        False            0
+Fabric71            71        False            0
+Fabric72            72        False            0
+Fabric73            73        False            0
+Fabric74            74        False            0
+Fabric75            75        False            0
+Fabric76            76        False            0
+Fabric77            77        False            0
+Fabric78            78        False            0
+Fabric79            79        False            0
+Fabric80            80        False            0
+Fabric81            81        False            0
+Fabric82            82        False            0
+Fabric83            83        False            0
+Fabric84            84        False            0
+Fabric85            85        False            0
+Fabric86            86        False            0
+Fabric87            87        False            0
+Fabric88            88        False            0
+Fabric89            89        False            0
+Fabric90            90        False            0
+Fabric91            91        False            0
+Fabric92            92        False            0
+Fabric93            93        False            0
+Fabric94            94        False            0
+Fabric95            95        False            0
+Fabric96            96        False            0
+Fabric97            97        False            0
+Fabric98            98        False            0
+Fabric99            99        False            0
+Fabric100           100       False            0
+Fabric101           101       False            0
+Fabric102           102       False            0
+Fabric103           103       False            0
+Fabric104           104       False            0
+Fabric105           105       False            0
+Fabric106           106       False            0
+Fabric107           107       False            0
+Fabric108           108       False            0
+Fabric109           109       False            0
+Fabric110           110       False            0
+Fabric111           111       False            0
+Fabric112           112       False            0
+Fabric113           113       False            0
+Fabric114           114       False            0
+Fabric115           115       False            0
+Fabric116           116       False            0
+Fabric117           117       False            0
+Fabric118           118       False            0
+Fabric119           119       False            0
+Fabric120           120       False            0
+Fabric121           121       False            0
+Fabric122           122       False            0
+Fabric123           123       False            0
+Fabric124           124       False            0
+Fabric125           125       False            0
+Fabric126           126       False            0
+Fabric127           127       False            0
+Fabric128           128       False            0
+Fabric129           129       False            0
+Fabric130           130       False            0
+Fabric131           131       False            0
+Fabric132           132       False            0
+Fabric133           133       False            0
+Fabric134           134       False            0
+Fabric135           135       False            0
+Fabric136           136       False            0
+Fabric137           137       False            0
+Fabric138           138       False            0
+Fabric139           139       False            0
+Fabric140           140       False            0
+Fabric141           141       False            0
+Fabric142           142       False            0
+Fabric143           143       False            0
+Fabric144           144       False            0
+Fabric145           145       False            0
+Fabric146           146       False            0
+Fabric147           147       False            0
+Fabric148           148       False            0
+Fabric149           149       False            0
+Fabric150           150       False            0
+Fabric151           151       False            0
+Fabric152           152       False            0
+Fabric153           153       False            0
+Fabric154           154       False            0
+Fabric155           155       False            0
+Fabric156           156       False            0
+Fabric157           157       False            0
+Fabric158           158       False            0
+Fabric159           159       False            0
+Fabric160           160       False            0
+Fabric161           161       False            0
+Fabric162           162       False            0
+Fabric163           163       False            0
+Fabric164           164       False            0
+Fabric165           165       False            0
+Fabric166           166       False            0
+Fabric167           167       False            0
+Fabric168           168       False            0
+Fabric169           169       False            0
+Fabric170           170       False            0
+Fabric171           171       False            0
+Fabric172           172       False            0
+Fabric173           173       False            0
+Fabric174           174       False            0
+Fabric175           175       False            0
+Fabric176           176       False            0
+Fabric177           177       False            0
+Fabric178           178       False            0
+Fabric179           179       False            0
+Fabric180           180       False            0
+Fabric181           181       False            0
+Fabric182           182       False            0
+Fabric183           183       False            0
+Fabric184           184       False            0
+Fabric185           185       False            0
+Fabric186           186       False            0
+Fabric187           187       False            0
+Fabric188           188       False            0
+Fabric189           189       False            0
+Fabric190           190       False            0
+Fabric191           191       False            0

From 9d7f9ecee297585603686f354c2dd122dbfc1786 Mon Sep 17 00:00:00 2001
From: jfeng-arista <98421150+jfeng-arista@users.noreply.github.com>
Date: Mon, 8 Apr 2024 15:17:33 -0700
Subject: [PATCH 0404/1115] Add fabric capacity monitoring data (#18509)

Add fabric capacity monitoring data.
Adding default values for fabric capacity monitoring.
---
 .../Arista-7804R3-FM/fabric_monitor_config.json                | 3 ++-
 .../Arista-7808R3-FM/fabric_monitor_config.json                | 3 ++-
 .../Arista-7808R3A-FM/fabric_monitor_config.json               | 3 ++-
 .../Arista-7800R3-48CQ2-C48/fabric_monitor_config.json         | 3 ++-
 .../x86_64-arista_7800r3_48cq2_lc/fabric_monitor_config.json   | 3 ++-
 .../Arista-7800R3-48CQM2-C48/fabric_monitor_config.json        | 3 ++-
 .../x86_64-arista_7800r3_48cqm2_lc/fabric_monitor_config.json  | 3 ++-
 .../Arista-7800R3A-36D2-C72/fabric_monitor_config.json         | 3 ++-
 8 files changed, 16 insertions(+), 8 deletions(-)

diff --git a/device/arista/x86_64-arista_7800_sup/Arista-7804R3-FM/fabric_monitor_config.json b/device/arista/x86_64-arista_7800_sup/Arista-7804R3-FM/fabric_monitor_config.json
index 653b25d1e..725eb9df5 100644
--- a/device/arista/x86_64-arista_7800_sup/Arista-7804R3-FM/fabric_monitor_config.json
+++ b/device/arista/x86_64-arista_7800_sup/Arista-7804R3-FM/fabric_monitor_config.json
@@ -3,6 +3,7 @@
       "monErrThreshCrcCells": 1,
       "monErrThreshRxCells": 61035156,
       "monPollThreshRecovery": 8,
-      "monPollThreshIsolation": 1
+      "monPollThreshIsolation": 1,
+      "monCapacityThreshWarn": 10
    }
 }
diff --git a/device/arista/x86_64-arista_7800_sup/Arista-7808R3-FM/fabric_monitor_config.json b/device/arista/x86_64-arista_7800_sup/Arista-7808R3-FM/fabric_monitor_config.json
index 653b25d1e..725eb9df5 100644
--- a/device/arista/x86_64-arista_7800_sup/Arista-7808R3-FM/fabric_monitor_config.json
+++ b/device/arista/x86_64-arista_7800_sup/Arista-7808R3-FM/fabric_monitor_config.json
@@ -3,6 +3,7 @@
       "monErrThreshCrcCells": 1,
       "monErrThreshRxCells": 61035156,
       "monPollThreshRecovery": 8,
-      "monPollThreshIsolation": 1
+      "monPollThreshIsolation": 1,
+      "monCapacityThreshWarn": 10
    }
 }
diff --git a/device/arista/x86_64-arista_7800_sup/Arista-7808R3A-FM/fabric_monitor_config.json b/device/arista/x86_64-arista_7800_sup/Arista-7808R3A-FM/fabric_monitor_config.json
index 653b25d1e..725eb9df5 100644
--- a/device/arista/x86_64-arista_7800_sup/Arista-7808R3A-FM/fabric_monitor_config.json
+++ b/device/arista/x86_64-arista_7800_sup/Arista-7808R3A-FM/fabric_monitor_config.json
@@ -3,6 +3,7 @@
       "monErrThreshCrcCells": 1,
       "monErrThreshRxCells": 61035156,
       "monPollThreshRecovery": 8,
-      "monPollThreshIsolation": 1
+      "monPollThreshIsolation": 1,
+      "monCapacityThreshWarn": 10
    }
 }
diff --git a/device/arista/x86_64-arista_7800r3_48cq2_lc/Arista-7800R3-48CQ2-C48/fabric_monitor_config.json b/device/arista/x86_64-arista_7800r3_48cq2_lc/Arista-7800R3-48CQ2-C48/fabric_monitor_config.json
index 653b25d1e..94def242e 100644
--- a/device/arista/x86_64-arista_7800r3_48cq2_lc/Arista-7800R3-48CQ2-C48/fabric_monitor_config.json
+++ b/device/arista/x86_64-arista_7800r3_48cq2_lc/Arista-7800R3-48CQ2-C48/fabric_monitor_config.json
@@ -3,6 +3,7 @@
       "monErrThreshCrcCells": 1,
       "monErrThreshRxCells": 61035156,
       "monPollThreshRecovery": 8,
-      "monPollThreshIsolation": 1
+      "monPollThreshIsolation": 1,
+      "monCapacityThreshWarn": 86
    }
 }
diff --git a/device/arista/x86_64-arista_7800r3_48cq2_lc/fabric_monitor_config.json b/device/arista/x86_64-arista_7800r3_48cq2_lc/fabric_monitor_config.json
index 653b25d1e..94def242e 100644
--- a/device/arista/x86_64-arista_7800r3_48cq2_lc/fabric_monitor_config.json
+++ b/device/arista/x86_64-arista_7800r3_48cq2_lc/fabric_monitor_config.json
@@ -3,6 +3,7 @@
       "monErrThreshCrcCells": 1,
       "monErrThreshRxCells": 61035156,
       "monPollThreshRecovery": 8,
-      "monPollThreshIsolation": 1
+      "monPollThreshIsolation": 1,
+      "monCapacityThreshWarn": 86
    }
 }
diff --git a/device/arista/x86_64-arista_7800r3_48cqm2_lc/Arista-7800R3-48CQM2-C48/fabric_monitor_config.json b/device/arista/x86_64-arista_7800r3_48cqm2_lc/Arista-7800R3-48CQM2-C48/fabric_monitor_config.json
index 653b25d1e..94def242e 100644
--- a/device/arista/x86_64-arista_7800r3_48cqm2_lc/Arista-7800R3-48CQM2-C48/fabric_monitor_config.json
+++ b/device/arista/x86_64-arista_7800r3_48cqm2_lc/Arista-7800R3-48CQM2-C48/fabric_monitor_config.json
@@ -3,6 +3,7 @@
       "monErrThreshCrcCells": 1,
       "monErrThreshRxCells": 61035156,
       "monPollThreshRecovery": 8,
-      "monPollThreshIsolation": 1
+      "monPollThreshIsolation": 1,
+      "monCapacityThreshWarn": 86
    }
 }
diff --git a/device/arista/x86_64-arista_7800r3_48cqm2_lc/fabric_monitor_config.json b/device/arista/x86_64-arista_7800r3_48cqm2_lc/fabric_monitor_config.json
index 653b25d1e..94def242e 100644
--- a/device/arista/x86_64-arista_7800r3_48cqm2_lc/fabric_monitor_config.json
+++ b/device/arista/x86_64-arista_7800r3_48cqm2_lc/fabric_monitor_config.json
@@ -3,6 +3,7 @@
       "monErrThreshCrcCells": 1,
       "monErrThreshRxCells": 61035156,
       "monPollThreshRecovery": 8,
-      "monPollThreshIsolation": 1
+      "monPollThreshIsolation": 1,
+      "monCapacityThreshWarn": 86
    }
 }
diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/fabric_monitor_config.json b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/fabric_monitor_config.json
index 653b25d1e..94def242e 100644
--- a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/fabric_monitor_config.json
+++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/fabric_monitor_config.json
@@ -3,6 +3,7 @@
       "monErrThreshCrcCells": 1,
       "monErrThreshRxCells": 61035156,
       "monPollThreshRecovery": 8,
-      "monPollThreshIsolation": 1
+      "monPollThreshIsolation": 1,
+      "monCapacityThreshWarn": 86
    }
 }

From 2c1f1aae6be55fbcb75ec8d4af580fd41f6deea3 Mon Sep 17 00:00:00 2001
From: ganglv <88995770+ganglyu@users.noreply.github.com>
Date: Tue, 9 Apr 2024 07:29:10 +0800
Subject: [PATCH 0405/1115] Improve container checker for gnmi/telemetry
 container (#18529)

### Why I did it
We have used gnmi container to replace telemetry container, and telemetry is still enabled after upgrade.
container_checker script reads from features table and check if the container is running, telemetry is enabled but there's no telemetry container.
It's difficult to disable telemetry in feature table for warm reboot and cold reboot, we need to check docker image in db migrator and minigraph.py.

### How I did it
I modify container_checker script:
If there's docker-sonic-telemetry image, check telemetry container.
If there's no docker-sonic-telemetry image, check gnmi container instead.
If there's no docker-sonic-telemetry image and docker-sonic-gnmi image, do not check telemetry.

#### How to verify it
Run end to end test with cold-reboot and warm-reboot.
---
 files/image_config/monit/container_checker | 30 ++++++++++++++++++++++
 1 file changed, 30 insertions(+)

diff --git a/files/image_config/monit/container_checker b/files/image_config/monit/container_checker
index f6be2cda9..f4e499506 100755
--- a/files/image_config/monit/container_checker
+++ b/files/image_config/monit/container_checker
@@ -25,6 +25,19 @@ from swsscommon import swsscommon
 EVENTS_PUBLISHER_SOURCE = "sonic-events-host"
 EVENTS_PUBLISHER_TAG = "event-down-ctr"
 
+def check_docker_image(image_name):
+    """
+    @summary: This function will check if docker image exists.
+    @return:  True if the image exists, otherwise False.
+    """
+    try:
+        DOCKER_CLIENT = docker.DockerClient(base_url='unix://var/run/docker.sock')
+        DOCKER_CLIENT.images.get(image_name)
+        return True
+    except (docker.errors.ImageNotFound, docker.errors.APIError) as err:
+        print("Failed to get image '{}'. Error: '{}'".format(image_name, err))
+        return False
+
 def get_expected_running_containers():
     """
     @summary: This function will get the expected running & always-enabled containers by following the rule:
@@ -55,7 +68,24 @@ def get_expected_running_containers():
     # it will be removed from exception list.
     run_all_instance_list = ['database', 'bgp']
 
+    container_list = []
     for container_name in feature_table.keys():
+        # slim image does not have telemetry container and corresponding docker image
+        if container_name == "telemetry":
+            ret = check_docker_image("docker-sonic-telemetry")
+            if not ret:
+                # If telemetry container image is not present, check gnmi container image
+                # If gnmi container image is not present, ignore telemetry container check
+                # if gnmi container image is present, check gnmi container instead of telemetry
+                ret = check_docker_image("docker-sonic-gnmi")
+                if not ret:
+                    print("Ignoring telemetry container check on image which has no corresponding docker image")
+                else:
+                    container_list.append("gnmi")
+                continue
+        container_list.append(container_name)
+
+    for container_name in container_list:
         if feature_table[container_name]["state"] not in ["disabled", "always_disabled"]:
             if multi_asic.is_multi_asic():
                 if feature_table[container_name].get("has_global_scope", "True") == "True":

From 0955484cce4d3434b8b13d00b3a2f7cc12b9bf81 Mon Sep 17 00:00:00 2001
From: Vivek <vkarri@nvidia.com>
Date: Mon, 8 Apr 2024 23:35:08 -0700
Subject: [PATCH 0406/1115] Introduce a new role for DPU-NPU Interconnect
 (#18465)

- Why I did it
Platform api related to xcvr and sfp should not be called for internal ports of SmartSwitch
To avoid doing this from platform agnostic code of SONiC, a new role called 'Dpc' is added, which would mean DPU-NPU Data Port
Any new sku which is used as a smartswitch should add this argument to hwsku.json for the ports that fit this category

- How I did it
Added Dpc to the relevant SKU

---------

Signed-off-by: Vivek Reddy <vkarri@nvidia.com>
---
 .../Mellanox-SN4700-O28/hwsku.json            | 24 ++++++++----
 src/sonic-config-engine/portconfig.py         |  2 +-
 .../tests/sample_hwsku.json                   |  3 +-
 .../tests/sample_output/platform_output.json  |  3 +-
 .../tests/hwsku_json_checker                  |  2 +-
 .../sonic_py_common/multi_asic.py             | 37 +++++++++++++++----
 src/sonic-py-common/tests/interface_test.py   | 12 ++++++
 .../tests/files/sample_config_db.json         |  1 +
 .../yang_model_tests/tests_config/port.json   | 16 ++++++++
 .../yang-models/sonic-port.yang               |  4 +-
 10 files changed, 83 insertions(+), 21 deletions(-)

diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/hwsku.json b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/hwsku.json
index 86d6ec991..194730c60 100644
--- a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/hwsku.json
+++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/hwsku.json
@@ -113,20 +113,28 @@
             "subport": "1"
         },
         "Ethernet224": {
-	     "default_brkout_mode": "1x200G[400G,100G,50G,40G,25G,10G,1G]",
-            "subport": "1"
+            "default_brkout_mode": "1x200G[400G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "on",
+            "role": "Dpc"
         },
         "Ethernet232": {
-	     "default_brkout_mode": "1x200G[400G,100G,50G,40G,25G,10G,1G]",
-            "subport": "1"
+            "default_brkout_mode": "1x200G[400G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "on",
+            "role": "Dpc"
         },
         "Ethernet240": {
-	     "default_brkout_mode": "1x200G[400G,100G,50G,40G,25G,10G,1G]",
-            "subport": "1"
+            "default_brkout_mode": "1x200G[400G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "on",
+            "role": "Dpc"
         },
         "Ethernet248": {
-	     "default_brkout_mode": "1x200G[400G,100G,50G,40G,25G,10G,1G]",
-            "subport": "1"
+            "default_brkout_mode": "1x200G[400G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "on",
+            "role": "Dpc"
         }
     }
 }
diff --git a/src/sonic-config-engine/portconfig.py b/src/sonic-config-engine/portconfig.py
index 81b3dfb8f..dcc535eed 100644
--- a/src/sonic-config-engine/portconfig.py
+++ b/src/sonic-config-engine/portconfig.py
@@ -37,7 +37,7 @@
 BRKOUT_MODE = "default_brkout_mode"
 CUR_BRKOUT_MODE = "brkout_mode"
 INTF_KEY = "interfaces"
-OPTIONAL_HWSKU_ATTRIBUTES = ["fec", "autoneg", "subport"]
+OPTIONAL_HWSKU_ATTRIBUTES = ["fec", "autoneg", "subport", "role"]
 
 BRKOUT_PATTERN = r'(\d{1,6})x(\d{1,6}G?)(\[(\d{1,6}G?,?)*\])?(\((\d{1,6})\))?'
 BRKOUT_PATTERN_GROUPS = 6
diff --git a/src/sonic-config-engine/tests/sample_hwsku.json b/src/sonic-config-engine/tests/sample_hwsku.json
index 3615cda26..53754a2ea 100644
--- a/src/sonic-config-engine/tests/sample_hwsku.json
+++ b/src/sonic-config-engine/tests/sample_hwsku.json
@@ -268,7 +268,8 @@
             "default_brkout_mode": "2x25G(2)+1x50000(2)"
         },
         "Ethernet142": {
-            "default_brkout_mode": "2x25G(2)+1x50000(2)"
+            "default_brkout_mode": "2x25G(2)+1x50000(2)",
+            "role": "Dpc"
         },
         "Ethernet144": {
             "default_brkout_mode": "1x100000[50G,40000,25G,10000]"
diff --git a/src/sonic-config-engine/tests/sample_output/platform_output.json b/src/sonic-config-engine/tests/sample_output/platform_output.json
index 4c6cf197c..15bd4a29d 100644
--- a/src/sonic-config-engine/tests/sample_output/platform_output.json
+++ b/src/sonic-config-engine/tests/sample_output/platform_output.json
@@ -908,7 +908,8 @@
     "mtu": "9100",
     "alias": "Eth36/3",
     "pfc_asym": "off",
-    "speed": "50000"
+    "speed": "50000",
+    "role": "Dpc"
   },
   "Ethernet144": {
     "index": "37",
diff --git a/src/sonic-device-data/tests/hwsku_json_checker b/src/sonic-device-data/tests/hwsku_json_checker
index 4abf62c15..f2016ed6b 100755
--- a/src/sonic-device-data/tests/hwsku_json_checker
+++ b/src/sonic-device-data/tests/hwsku_json_checker
@@ -7,7 +7,7 @@ import sys
 
 # Global variable
 PORT_ATTRIBUTES = ["default_brkout_mode"]
-OPTIONAL_PORT_ATTRIBUTES = ["fec", "autoneg", "port_type", "subport"]
+OPTIONAL_PORT_ATTRIBUTES = ["fec", "autoneg", "port_type", "subport", "role"]
 PORT_REG = "Ethernet(\d+)"
 HWSKU_JSON = '*hwsku.json'
 INTF_KEY = "interfaces"
diff --git a/src/sonic-py-common/sonic_py_common/multi_asic.py b/src/sonic-py-common/sonic_py_common/multi_asic.py
index d35c39c44..8aac9bde4 100644
--- a/src/sonic-py-common/sonic_py_common/multi_asic.py
+++ b/src/sonic-py-common/sonic_py_common/multi_asic.py
@@ -7,6 +7,7 @@
 
 from .device_info import get_asic_conf_file_path
 from .device_info import is_supervisor, is_chassis
+from .interface import inband_prefix, backplane_prefix, recirc_prefix, front_panel_prefix
 
 ASIC_NAME_PREFIX = 'asic'
 NAMESPACE_PATH_GLOB = '/run/netns/*'
@@ -17,7 +18,8 @@
 EXTERNAL_PORT = 'Ext'
 INTERNAL_PORT = 'Int'
 INBAND_PORT = 'Inb'
-RECIRC_PORT ='Rec'
+RECIRC_PORT = 'Rec'
+DPU_CONNECT_PORT = 'Dpc'
 PORT_CHANNEL_MEMBER_CFG_DB_TABLE = 'PORTCHANNEL_MEMBER'
 PORT_CFG_DB_TABLE = 'PORT'
 BGP_NEIGH_CFG_DB_TABLE = 'BGP_NEIGHBOR'
@@ -323,15 +325,18 @@ def get_port_role(port_name, namespace=None):
     role = ports_config[PORT_ROLE]
     return role
 
+def is_role_internal(role=None):
+    """
+    Check if the role belongs to one of the internal variants
+    """
+    if role and role in [INTERNAL_PORT, INBAND_PORT, RECIRC_PORT, DPU_CONNECT_PORT]:
+        return True
+    return False
 
-def is_port_internal(port_name, namespace=None):
 
+def is_port_internal(port_name, namespace=None):
     role = get_port_role(port_name, namespace)
-
-    if role in [INTERNAL_PORT, INBAND_PORT, RECIRC_PORT]:
-        return True
-
-    return False
+    return is_role_internal(role)
 
 
 def get_external_ports(port_names, namespace=None):
@@ -487,3 +492,21 @@ def get_asic_presence_list():
         # This is not multi-asic, all asics should be present.
         asics_list = list(range(0, get_num_asics()))
     return asics_list
+
+
+def is_front_panel_port(port, role=None):
+    """
+    @summary: This function will check if the interface is a front-panel port
+    @return:  Boolean
+    """
+    if not port.startswith(front_panel_prefix()):
+        return False
+
+    if port.startswith((backplane_prefix(), inband_prefix(), recirc_prefix())):
+        return False
+
+    # subinterfaces
+    if '.' in port:
+        return False
+
+    return not is_role_internal(role)
diff --git a/src/sonic-py-common/tests/interface_test.py b/src/sonic-py-common/tests/interface_test.py
index 4ee6b3ed9..a6e454b93 100644
--- a/src/sonic-py-common/tests/interface_test.py
+++ b/src/sonic-py-common/tests/interface_test.py
@@ -2,6 +2,7 @@
 import sys
 
 from sonic_py_common import interface
+from sonic_py_common.multi_asic import is_front_panel_port
 
 class TestInterface(object):
     def test_get_interface_table_name(self):
@@ -39,3 +40,14 @@ def test_get_port_table_name(self):
         assert result == "VLAN_SUB_INTERFACE"
         result = interface.get_port_table_name("Po0.1001")
         assert result == "VLAN_SUB_INTERFACE"
+
+    def test_verify_front_panel_api(self):
+        assert is_front_panel_port("Ethernet0")
+        assert not is_front_panel_port("Ethernet-BP")
+        assert not is_front_panel_port("Ethernet-IB")
+        assert not is_front_panel_port("Ethernet-Rec")
+        assert not is_front_panel_port("Ethernet254", "Dpc")
+        assert not is_front_panel_port("Ethernet254", "Int")
+        assert is_front_panel_port("Ethernet254", "Ext")
+        assert not is_front_panel_port("Ethernet254.30")
+        assert not is_front_panel_port("PortConfigDone")
diff --git a/src/sonic-yang-models/tests/files/sample_config_db.json b/src/sonic-yang-models/tests/files/sample_config_db.json
index 050f4433b..9522d4247 100644
--- a/src/sonic-yang-models/tests/files/sample_config_db.json
+++ b/src/sonic-yang-models/tests/files/sample_config_db.json
@@ -601,6 +601,7 @@
                 "speed": "11100",
                 "tpid": "0x8100",
                 "admin_status": "up",
+                "role": "Dpc",
                 "autoneg": "on",
                 "adv_speeds": "all",
                 "adv_interface_types": "all",
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/port.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/port.json
index 3e8899b6e..77f70c57b 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/port.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/port.json
@@ -728,5 +728,21 @@
                 ]
             }
         }
+    },
+
+    "PORT_DPC_ROLE_TEST": {
+        "sonic-port:sonic-port": {
+            "sonic-port:PORT": {
+                "PORT_LIST": [
+                    {
+                        "name": "Ethernet0",
+                        "alias": "etp1a",
+                        "lanes": "60, 61",
+                        "speed": 100000,
+                        "role": "Dpc"
+                    }
+                ]
+            }
+        }
     }
 }
diff --git a/src/sonic-yang-models/yang-models/sonic-port.yang b/src/sonic-yang-models/yang-models/sonic-port.yang
index 2ee1d8878..ec2ea947a 100644
--- a/src/sonic-yang-models/yang-models/sonic-port.yang
+++ b/src/sonic-yang-models/yang-models/sonic-port.yang
@@ -144,9 +144,9 @@ module sonic-port{
 
 				leaf role {
 					type string {
-						pattern "Ext|Int|Inb|Rec";
+						pattern "Ext|Int|Inb|Rec|Dpc";
 					}
-					description "Internal port or External port for multi-asic platform";
+					description "Internal port or External port for multi-asic or SmartSwitch platform";
 					default "Ext";
 				}
 

From 3adf3082889dbba697cbec09846bb78ca879109e Mon Sep 17 00:00:00 2001
From: DavidZagury <32644413+DavidZagury@users.noreply.github.com>
Date: Tue, 9 Apr 2024 12:25:24 +0300
Subject: [PATCH 0407/1115] [Mellanox] enable host interface control by
 orchagent (#18592)
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

- Why I did it
To move the control of the netdevice’s operational status from SDK to SAI.
SAI will be responsible for updating the operational status on moving the netdev’s admin status from DOWN to UP.

- How I did it
Configure the SAI profile with SAI_HOSTIF_OPER_STATUS_UPDATE_BY_APP

- How to verify it
Verify links go up and down correctly.
---
 platform/mellanox/docker-syncd-mlnx/sai-common.profile | 1 +
 1 file changed, 1 insertion(+)

diff --git a/platform/mellanox/docker-syncd-mlnx/sai-common.profile b/platform/mellanox/docker-syncd-mlnx/sai-common.profile
index 3b9e6fe00..d3b91a00e 100644
--- a/platform/mellanox/docker-syncd-mlnx/sai-common.profile
+++ b/platform/mellanox/docker-syncd-mlnx/sai-common.profile
@@ -1,2 +1,3 @@
 SAI_DUMP_STORE_PATH=/var/log/mellanox/sdk-dumps
 SAI_DUMP_STORE_AMOUNT=10
+SAI_HOSTIF_OPER_STATUS_UPDATE_BY_APP=1

From a51658179f26593ec59b6422586248f5d48b63ea Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Tue, 9 Apr 2024 19:01:05 +0800
Subject: [PATCH 0408/1115] [submodule] Update submodule sonic-utilities to the
 latest HEAD automatically (#18604)

#### Why I did it
src/sonic-utilities
```
* c57bf816 - (HEAD -> master, origin/master, origin/HEAD) Improve Semgrep CI (#3259) (13 hours ago) [Mai Bui]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-utilities | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-utilities b/src/sonic-utilities
index c0b6632e7..c57bf8169 160000
--- a/src/sonic-utilities
+++ b/src/sonic-utilities
@@ -1 +1 @@
-Subproject commit c0b6632e7c39d6ab2ba9cb44711df7c4e6ad3c1c
+Subproject commit c57bf8169f6fbdab9fca6f0c7f2a067f71942cb6

From d834229684e8f214b6f9dc29ddad68355c6e33db Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Tue, 9 Apr 2024 19:01:21 +0800
Subject: [PATCH 0409/1115] [submodule] Update submodule sonic-mgmt-common to
 the latest HEAD automatically (#18601)

#### Why I did it
src/sonic-mgmt-common
```
* 23d8bc1 - (HEAD -> master, origin/master, origin/HEAD) [JIRA SONIC-88436] - Disallow duplicate dyamic field names (9 hours ago) [Mohammed Faraaz]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-mgmt-common | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-mgmt-common b/src/sonic-mgmt-common
index e3e0ea502..23d8bc1dd 160000
--- a/src/sonic-mgmt-common
+++ b/src/sonic-mgmt-common
@@ -1 +1 @@
-Subproject commit e3e0ea502c2fba3d30ff6baec17159d80432c89e
+Subproject commit 23d8bc1dd0c903f5314d70cf59604f8bf439e694

From b88f2d48385dc2074a472a38e23aa07d07f399b3 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Tue, 9 Apr 2024 19:01:32 +0800
Subject: [PATCH 0410/1115] [submodule] Update submodule sonic-linux-kernel to
 the latest HEAD automatically (#18588)

#### Why I did it
src/sonic-linux-kernel
```
* 38bb387 - (HEAD -> master, origin/master, origin/HEAD) Update reference build to be used for kconfig diff (#392) (4 days ago) [Vivek]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-linux-kernel | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-linux-kernel b/src/sonic-linux-kernel
index fdb31452b..38bb38790 160000
--- a/src/sonic-linux-kernel
+++ b/src/sonic-linux-kernel
@@ -1 +1 @@
-Subproject commit fdb31452b4a6c5d696a2cfdacfe5fa97ea48218f
+Subproject commit 38bb38790025cd338af04b0dda75e09b3fc5fb65

From 7aff2df9f212b4c70fd13de34b2f1c5bd4fab4c9 Mon Sep 17 00:00:00 2001
From: Lawrence Lee <lawlee@microsoft.com>
Date: Tue, 9 Apr 2024 10:50:39 -0700
Subject: [PATCH 0411/1115] [ssg]: Use C++ strings for text handling (#18596)

Replace char* and C string functions with C++ strings.
---
 src/systemd-sonic-generator/Makefile          |  16 +-
 src/systemd-sonic-generator/ssg-test.cc       |  11 +-
 ...enerator.c => systemd-sonic-generator.cpp} | 429 ++++++++----------
 .../systemd-sonic-generator.h                 |  18 +-
 4 files changed, 202 insertions(+), 272 deletions(-)
 rename src/systemd-sonic-generator/{systemd-sonic-generator.c => systemd-sonic-generator.cpp} (73%)

diff --git a/src/systemd-sonic-generator/Makefile b/src/systemd-sonic-generator/Makefile
index ecfc19e0b..c4c01f66f 100644
--- a/src/systemd-sonic-generator/Makefile
+++ b/src/systemd-sonic-generator/Makefile
@@ -2,15 +2,15 @@ CC=gcc
 CFLAGS += -std=gnu99 -D_GNU_SOURCE
 
 CXX=g++
-CXXFLAGS += -std=c++11 -D_GNU_SOURCE
-LDFLAGS += -lpthread -lboost_filesystem -lboost_system -lgtest -ljson-c
+CXXFLAGS += -std=c++11 -D_GNU_SOURCE -I ./
+LDFLAGS += -l stdc++ -lpthread -lboost_filesystem -lboost_system -lgtest -ljson-c
 
 BINARY = systemd-sonic-generator
 
-$(BINARY): systemd-sonic-generator.c
+$(BINARY): systemd-sonic-generator.cpp
 	rm -f ./systemd-sonic-generator
 
-	$(CC) $(CFLAGS) -o $@ $^ $(LDFLAGS)
+	$(CXX) $(CXXFLAGS) -o $@ $^ $(LDFLAGS)
 
 install: $(BINARY)
 	mkdir -p $(DESTDIR)
@@ -24,10 +24,12 @@ test: ssg_test
 	./ssg_test
 
 ssg_test: ssg-test.cc systemd-sonic-generator.o
-	$(CXX) $(CXXFLAGS) -o $@ $^ $(LDFLAGS)
+	$(CXX) $(CXXFLAGS) -ggdb -o $@ $^ $(LDFLAGS)
+
+systemd-sonic-generator.o: systemd-sonic-generator.cpp
+	$(CXX) $(CXXFLAGS) -ggdb -D_SSG_UNITTEST -o $@ -c $^
 
-systemd-sonic-generator.o: systemd-sonic-generator.c
-	$(CC) $(CFLAGS) -D_SSG_UNITTEST -o $@ -c $^
+all: $(BINARY) test
 
 clean:
 	rm -f ./systemd-sonic-generator
diff --git a/src/systemd-sonic-generator/ssg-test.cc b/src/systemd-sonic-generator/ssg-test.cc
index bcc661a9d..2462c0635 100644
--- a/src/systemd-sonic-generator/ssg-test.cc
+++ b/src/systemd-sonic-generator/ssg-test.cc
@@ -210,8 +210,7 @@ class SsgMainTest : public SsgFunctionTest {
 
     /* Find a string in a file */
     bool find_string_in_file(std::string str,
-                             std::string file_name,
-                             int num_asics) {
+                             std::string file_name) {
         bool found = false;
             std::string line;
 
@@ -243,7 +242,7 @@ class SsgMainTest : public SsgFunctionTest {
                     /* Run once for single instance */
                     finished = true;
                 }
-                EXPECT_EQ(find_string_in_file(str_t, target, num_asics),
+                EXPECT_EQ(find_string_in_file(str_t, target),
                         expected_result)
                         << "Error validating " + str_t + " in " + target;
             }
@@ -600,9 +599,8 @@ TEST_F(SsgFunctionTest, insert_instance_number) {
     char input[] = "test@.service";
     for (int i = 0; i <= 100; ++i) {
         std::string out = "test@" + std::to_string(i) + ".service";
-        char* ret = insert_instance_number(input, i, "");
-        ASSERT_NE(ret, nullptr);
-        EXPECT_STREQ(ret, out.c_str());
+        std::string ret = insert_instance_number(input, i, "");
+        EXPECT_EQ(ret, out);
     }
 }
 
@@ -670,7 +668,6 @@ TEST_F(SsgFunctionTest, get_unit_files) {
 
 /* TEST ssg_main() argv error */
 TEST_F(SsgMainTest, ssg_main_argv) {
-        FILE* fp;
         std::vector<char*> argv_;
         std::vector<std::string> arguments = {
                     "ssg_main",
diff --git a/src/systemd-sonic-generator/systemd-sonic-generator.c b/src/systemd-sonic-generator/systemd-sonic-generator.cpp
similarity index 73%
rename from src/systemd-sonic-generator/systemd-sonic-generator.c
rename to src/systemd-sonic-generator/systemd-sonic-generator.cpp
index f5cac8e94..d1b61a325 100644
--- a/src/systemd-sonic-generator/systemd-sonic-generator.c
+++ b/src/systemd-sonic-generator/systemd-sonic-generator.cpp
@@ -1,14 +1,16 @@
-#include <assert.h>
 #include <stdio.h>
 #include <unistd.h>
 #include <errno.h>
 #include <string.h>
 #include <stdlib.h>
-#include <stdbool.h>
+// #include <stdbool.h>
 #include <sys/types.h>
 #include <sys/stat.h>
 #include <linux/limits.h>
 #include <json-c/json.h>
+#include <string>
+#include <sstream>
+#include <unordered_set>
 
 #define MAX_NUM_TARGETS 48
 #define MAX_NUM_INSTALL_LINES 48
@@ -69,7 +71,7 @@ static int num_multi_inst;
 static bool smart_switch_npu;
 static bool smart_switch_dpu;
 static bool smart_switch;
-static size_t num_dpus;
+static int num_dpus;
 static char* platform = NULL;
 static struct json_object *platform_info = NULL;
 
@@ -122,11 +124,23 @@ void strip_trailing_newline(char* str) {
     Strips trailing newline from a string if it exists
     ***/
 
+    if (str == NULL) {
+        return;
+    }
     size_t l = strlen(str);
     if (l > 0 && str[l-1] == '\n')
         str[l-1] = '\0';
 }
 
+void strip_trailing_newline(std::string& str) {
+    /***
+    Strips trailing newline from a string if it exists
+    ***/
+    if (!str.empty() && str.back() == '\n') {
+        str.pop_back();
+    }
+}
+
 
 /**
  * Checks if the given path is "/dev/null".
@@ -144,7 +158,7 @@ static bool is_devnull(const char* path)
 }
 
 
-static int get_target_lines(char* unit_file, char* target_lines[]) {
+static int get_target_lines(const char* unit_file, char* target_lines[]) {
     /***
     Gets installation information for a given unit file
 
@@ -191,26 +205,32 @@ static int get_target_lines(char* unit_file, char* target_lines[]) {
     return num_target_lines;
 }
 
-static bool is_multi_instance_service(char *service_name){
-    int i;
-    for(i=0; i < num_multi_inst; i++){
-        /*
-         * The service name may contain @.service or .service. Remove these
-         * postfixes and extract service name. Compare service name for absolute
-         * match in multi_instance_services[].
-         * This is to prevent services like database-chassis and systemd-timesyncd marked
-         * as multi instance services as they contain strings 'database' and 'syncd' respectively
-         * which are multi instance services in multi_instance_services[].
-         */
-        char *saveptr;
-        char *token = strtok_r(service_name, "@", &saveptr);
-        if (token) {
-            if (strstr(token, ".service") != NULL) {
-                /* If we are here, service_name did not have '@' delimiter but contains '.service' */
-                token = strtok_r(service_name, ".", &saveptr);
+static bool is_multi_instance_service(std::string service_file, std::unordered_set<std::string> service_list=std::unordered_set<std::string>()){
+    /*
+        * The service name may contain @.service or .service. Remove these
+        * postfixes and extract service name. Compare service name for absolute
+        * match in multi_instance_services[].
+        * This is to prevent services like database-chassis and systemd-timesyncd marked
+        * as multi instance services as they contain strings 'database' and 'syncd' respectively
+        * which are multi instance services in multi_instance_services[].
+        */    
+    std::string delimiter;
+    if (service_file.find("@") != std::string::npos) {
+        delimiter = "@";
+    } else {
+        delimiter = ".";
+    }
+    std::string service_name = service_file.substr(0, service_file.find(delimiter));
+
+    if (service_list.empty()) {
+        for(int i=0; i < num_multi_inst; i++){
+
+            if (service_name == multi_instance_services[i]) {
+                return true;
             }
         }
-        if (strncmp(service_name, multi_instance_services[i], strlen(service_name)) == 0) {
+    } else {
+        if (service_list.count(service_name) > 0) {
             return true;
         }
     }
@@ -225,97 +245,59 @@ static bool is_multi_instance_service(char *service_name){
  * @param service_name The name of the service to check.
  * @return true if the service is a multi-instance service for DPU, false otherwise.
  */
-static bool is_multi_instance_service_for_dpu(const char *service_name) {
+static bool is_multi_instance_service_for_dpu(const std::string& service_name) {
     if (!smart_switch_npu) {
         return false;
     }
 
-    const static char* multi_instance_services_for_dpu[] = {"database"};
-    char *tmp_service_name = strdup(service_name);
-    if (tmp_service_name == NULL) {
-        fprintf(stderr, "Error: Failed to allocate memory for tmp_service_name\n");
-        exit(EXIT_FAILURE);
-    }
-
-    for (size_t i = 0; i < sizeof(multi_instance_services_for_dpu) /
-                               sizeof(multi_instance_services_for_dpu[0]);
-         i++) {
-        char* saveptr;
-        char* token = strtok_r(tmp_service_name, "@", &saveptr);
-        if (token) {
-            if (strstr(token, ".service") != NULL) {
-                /* If we are here, service_name did not have '@' delimiter but
-                 * contains '.service' */
-                token = strtok_r(tmp_service_name, ".", &saveptr);
-            }
-        }
-        if (strcmp(tmp_service_name, multi_instance_services_for_dpu[i]) == 0) {
-            free(tmp_service_name);
-            return true;
-        }
-    }
-
-    free(tmp_service_name);
-    return false;
+    std::unordered_set<std::string> multi_instance_services_for_dpu = {"database"};
+    return is_multi_instance_service(service_name, multi_instance_services_for_dpu);
 }
 
 
-static int get_install_targets_from_line(char* target_string, char* install_type, char* targets[], int existing_targets) {
+static int get_install_targets_from_line(std::string target_string, std::string install_type, char* targets[], int existing_targets) {
     /***
     Helper fuction for get_install_targets
 
     Given a space delimited string of target directories and a suffix,
     puts each target directory plus the suffix into the targets array
     ***/
-    char* token;
-    char* target;
-    char* saveptr;
-    char final_target[PATH_MAX];
+    std::string target;
     int num_targets = 0;
 
-    assert(target_string);
-    assert(install_type);
-
-    while ((token = strtok_r(target_string, " ", &target_string))) {
-        if (num_targets + existing_targets >= MAX_NUM_TARGETS) {
-            fputs("Number of targets found exceeds MAX_NUM_TARGETS\n", stderr);
-            fputs("Additional targets will be ignored \n", stderr);
-            return num_targets;
-        }
-
-        target = strdup(token);
-        strip_trailing_newline(target);
+    if (target_string.empty() || install_type.empty()) {
+        fprintf(stderr, "Invalid target string or install type\n");
+        exit(EXIT_FAILURE);
+    }
 
-        if (strstr(target, "%") != NULL) {
-            char* prefix = strtok_r(target, ".", &saveptr);
-            char* suffix = strtok_r(NULL, ".", &saveptr);
-            int prefix_len = strlen(prefix);
+    std::stringstream ss(target_string);
 
-            strncpy(final_target, prefix, prefix_len - 2);
-            final_target[prefix_len - 2] = '\0';
-            strcat(final_target, ".");
-            strcat(final_target, suffix);
+    while (ss >> target) {
+        if (num_targets + existing_targets >= MAX_NUM_TARGETS) {
+            fprintf(stderr, "Number of targets exceeds MAX_NUM_TARGETS\n");
+            fputs("Additional targets will be ignored\n", stderr);
+            break;
         }
-        else {
-            strcpy(final_target, target);
+        // handle install targets using the '%i' systemd specifier
+        if (target.find("%") != std::string::npos) {
+            target = target.substr(0, target.find("%")) + target.substr(target.find("."));
         }
-        strcat(final_target, install_type);
-
-        free(target);
-
-        targets[num_targets + existing_targets] = strdup(final_target);
+        strip_trailing_newline(target);
+        target += install_type;
+        targets[num_targets + existing_targets] = (char*) calloc(target.length() + 1, sizeof(char));
+        snprintf(targets[num_targets + existing_targets], PATH_MAX, "%s", target.c_str());
         num_targets++;
     }
     return num_targets;
 }
 
-static void replace_multi_inst_dep(char *src) {
+static void replace_multi_inst_dep(const char *src) {
     FILE *fp_src;
     FILE *fp_tmp;
     char buf[MAX_BUF_SIZE];
     char* line = NULL;
     int i;
-    ssize_t len;
+    size_t len;
     char *token;
     char *word;
     char *line_copy;
@@ -395,14 +377,14 @@ static void replace_multi_inst_dep(char *src) {
     rename(tmp_file_path, src);
 }
 
-int get_install_targets(char* unit_file, char* targets[]) {
+int get_install_targets(std::string unit_file, char* targets[]) {
     /***
     Returns install targets for a unit file
 
     Parses the information in the [Install] section of a given
     unit file to determine which directories to install the unit in
     ***/
-    char file_path[PATH_MAX];
+    std::string file_path;
     char *target_lines[MAX_NUM_INSTALL_LINES];
     int num_target_lines;
     int num_targets;
@@ -410,26 +392,21 @@ int get_install_targets(char* unit_file, char* targets[]) {
     char* token;
     char* line = NULL;
     bool first;
-    char* target_suffix = NULL;
-    char *instance_name;
-    char *dot_ptr;
+    std::string target_suffix;
+    std::string instance_name;
 
-    strcpy(file_path, get_unit_file_prefix());
-    strcat(file_path, unit_file);
+    file_path = get_unit_file_prefix() + unit_file;
 
-    instance_name = strdup(unit_file);
-    dot_ptr = strchr(instance_name, '.');
-    *dot_ptr = '\0';
+    instance_name = unit_file.substr(0, unit_file.find('.'));
 
     if(((num_asics > 1) && (!is_multi_instance_service(instance_name)))
         || ((num_dpus > 0) && (!is_multi_instance_service_for_dpu(instance_name)))) {
-        replace_multi_inst_dep(file_path);
+        replace_multi_inst_dep(file_path.c_str());
     }
-    free(instance_name);
 
-    num_target_lines = get_target_lines(file_path, target_lines);
+    num_target_lines = get_target_lines(file_path.c_str(), target_lines);
     if (num_target_lines < 0) {
-        fprintf(stderr, "Error parsing targets for %s\n", unit_file);
+        fprintf(stderr, "Error parsing targets for %s\n", unit_file.c_str());
         return -1;
     }
 
@@ -484,7 +461,7 @@ int get_unit_files(char* unit_files[]) {
     int num_unit_files = 0;
     num_multi_inst = 0;
 
-    multi_instance_services = calloc(MAX_NUM_UNITS, sizeof(char *));
+    multi_instance_services = (char**) calloc(MAX_NUM_UNITS, sizeof(char *));
 
     while ((read = getline(&line, &len, fp)) != -1) {
         if (num_unit_files >= MAX_NUM_UNITS) {
@@ -496,8 +473,8 @@ int get_unit_files(char* unit_files[]) {
         /* Get the multi-instance services */
         pos = strchr(line, '@');
         if (pos != NULL) {
-            multi_instance_services[num_multi_inst] = calloc(strlen(line), sizeof(char));
-            strncpy(multi_instance_services[num_multi_inst], line, pos-line);
+            multi_instance_services[num_multi_inst] = (char*) calloc(pos-line+1, sizeof(char));
+            snprintf(multi_instance_services[num_multi_inst], pos-line+1, "%s", line);
             num_multi_inst++;
         }
 
@@ -525,111 +502,87 @@ int get_unit_files(char* unit_files[]) {
 }
 
 
-char* insert_instance_number(char* unit_file, int instance, const char *instance_prefix) {
+std::string insert_instance_number(const std::string& unit_file, int instance, const std::string& instance_prefix) {
     /***
     Adds an instance number to a systemd template name
 
     E.g. given unit_file='example@.service', instance=3,
     returns a pointer to 'example@3.service'
     ***/
-    char* instance_name;
-    int   ret;
-    int   prefix_len;
-    const char *suffix = strchr(unit_file, '@');
-    if (!suffix) {
-        fprintf(stderr, "Invalid unit file %s for instance %d\n", unit_file, instance);
-        return NULL;
-    }
-
-    if (instance_prefix == NULL) {
-        instance_prefix = "";
-    }
-
-    /***
-    suffix is "@.service", set suffix=".service"
-    prefix_len is length of "example@"
-    ***/
-    prefix_len = ++suffix - unit_file;
-    ret = asprintf(&instance_name, "%.*s%s%d%s", prefix_len, unit_file, instance_prefix, instance, suffix);
-    if (ret == -1) {
-        fprintf(stderr, "Error creating instance %d of %s\n", instance, unit_file);
-        return NULL;
+    size_t at_pos = unit_file.find("@");
+    if (at_pos == std::string::npos) {
+        fprintf(stderr, "Invalid unit file %s for instance %d\n", unit_file.c_str(), instance);
+        return "";
     }
 
-    return instance_name;
+    return unit_file.substr(0, at_pos + 1) + instance_prefix + std::to_string(instance) + unit_file.substr(at_pos + 1);
 }
 
 
-static int create_symlink(char* unit, char* target, char* install_dir, int instance, const char *instance_prefix) {
+static int create_symlink(const std::string& unit, const std::string& target, const std::string& install_dir, int instance,  const std::string& instance_prefix) {
     struct stat st;
-    char src_path[PATH_MAX];
-    char dest_path[PATH_MAX];
-    char final_install_dir[PATH_MAX];
-    char* unit_instance;
+    std::string src_path;
+    std::string dest_path;
+    std::string final_install_dir;
+    std::string unit_instance;
     int r;
 
-    strcpy(src_path, get_unit_file_prefix());
-    strcat(src_path, unit);
+    src_path = get_unit_file_prefix() + unit;
 
     if (instance < 0) {
-        unit_instance = strdup(unit);
+        unit_instance = unit;
     }
     else {
         unit_instance = insert_instance_number(unit, instance, instance_prefix);
     }
 
-    strcpy(final_install_dir, install_dir);
-    strcat(final_install_dir, target);
-    strcpy(dest_path, final_install_dir);
-    strcat(dest_path, "/");
-    strcat(dest_path, unit_instance);
+    final_install_dir = install_dir + std::string(target);
+    dest_path = final_install_dir + "/" + unit_instance;
 
-    free(unit_instance);
-
-    if (stat(final_install_dir, &st) == -1) {
+    if (stat(final_install_dir.c_str(), &st) == -1) {
         // If doesn't exist, create
-        r = mkdir(final_install_dir, 0755);
+        r = mkdir(final_install_dir.c_str(), 0755);
         if (r == -1) {
-            fprintf(stderr, "Unable to create target directory %s\n", final_install_dir);
+            fprintf(stderr, "Unable to create target directory %s\n", final_install_dir.c_str());
             return -1;
         }
     }
     else if (S_ISREG(st.st_mode)) {
         // If is regular file, remove and create
-        r = remove(final_install_dir);
+        r = remove(final_install_dir.c_str());
         if (r == -1) {
-            fprintf(stderr, "Unable to remove file with same name as target directory %s\n", final_install_dir);
+            fprintf(stderr, "Unable to remove file with same name as target directory %s\n", final_install_dir.c_str());
             return -1;
         }
 
-        r = mkdir(final_install_dir, 0755);
+        r = mkdir(final_install_dir.c_str(), 0755);
         if (r == -1) {
-            fprintf(stderr, "Unable to create target directory %s\n", final_install_dir);
+            fprintf(stderr, "Unable to create target directory %s\n", final_install_dir.c_str());
             return -1;
         }
     }
     else if (S_ISDIR(st.st_mode)) {
         // If directory, verify correct permissions
-        r = chmod(final_install_dir, 0755);
+        r = chmod(final_install_dir.c_str(), 0755);
         if (r == -1) {
-            fprintf(stderr, "Unable to change permissions of existing target directory %s\n", final_install_dir);
+            fprintf(stderr, "Unable to change permissions of existing target directory %s\n", final_install_dir.c_str());
             return -1;
         }
     }
 
-    if (is_devnull(dest_path)) {
-        if (remove(dest_path) != 0) {
-            fprintf(stderr, "Unable to remove existing symlink %s\n", dest_path);
+    if (is_devnull(dest_path.c_str())) {
+        if (remove(dest_path.c_str()) != 0) {
+            fprintf(stderr, "Unable to remove existing symlink %s\n", dest_path.c_str());
             return -1;
         }
     }
 
-    r = symlink(src_path, dest_path);
+    r = symlink(src_path.c_str(), dest_path.c_str());
 
     if (r < 0) {
         if (errno == EEXIST)
             return 0;
-        fprintf(stderr, "Error creating symlink %s from source %s\n", dest_path, src_path);
+        fprintf(stderr, "Error creating symlink %s from source %s\n", dest_path.c_str(), src_path.c_str());
         return -1;
     }
 
@@ -638,7 +591,7 @@ static int create_symlink(char* unit, char* target, char* install_dir, int insta
 }
 
 
-static int install_unit_file(char* unit_file, char* target, char* install_dir) {
+static int install_unit_file(std::string unit_file, std::string target, std::string install_dir) {
     /***
     Creates a symlink for a unit file installation
 
@@ -649,34 +602,30 @@ static int install_unit_file(char* unit_file, char* target, char* install_dir) {
     If a multi ASIC platform is detected, enables multi-instance
     services as well
     ***/
-    char* target_instance;
-    char* prefix;
-    char* suffix;
+    std::string target_instance;
     int r;
 
-    assert(unit_file);
-    assert(target);
-
+    if (unit_file.empty() || target.empty() || install_dir.empty()){
+        fprintf(stderr, "Invalid unit file, target or install directory\n");
+        exit(EXIT_FAILURE);
+    }
 
-    if ((num_asics > 1) && strstr(unit_file, "@") != NULL) {
+    if ((num_asics > 1) && unit_file.find("@") != std::string::npos) {
 
         for (int i = 0; i < num_asics; i++) {
 
-            if (strstr(target, "@") != NULL) {
+            if (target.find("@") != std::string::npos) {
                 target_instance = insert_instance_number(target, i, "");
             }
             else {
-                target_instance = strdup(target);
+                target_instance = target;
             }
 
             r = create_symlink(unit_file, target_instance, install_dir, i, "");
             if (r < 0)
-                fprintf(stderr, "Error installing %s for target %s\n", unit_file, target_instance);
-
-            free(target_instance);
-
+                fprintf(stderr, "Error installing %s for target %s\n", unit_file.c_str(), target_instance.c_str());
         }
-    } else if (num_dpus > 0 && strstr(unit_file, "@") != NULL) {
+    } else if (num_dpus > 0 && unit_file.find("@") != std::string::npos) {
         // If multi-instance service for DPU
         // Install each DPU units to the host main instance only,
         // E.g. install database@dpu0.service, database@dpu1.service to multi-user.target.wants
@@ -684,12 +633,12 @@ static int install_unit_file(char* unit_file, char* target, char* install_dir) {
         for (int i = 0; i < num_dpus; i++) {
             r = create_symlink(unit_file, target, install_dir, i, DPU_PREFIX);
             if (r < 0)
-                fprintf(stderr, "Error installing %s for target %s\n", unit_file, target);
+                fprintf(stderr, "Error installing %s for target %s\n", unit_file.c_str(), target.c_str());
         }
     } else {
         r = create_symlink(unit_file, target, install_dir, -1, "");
         if (r < 0)
-            fprintf(stderr, "Error installing %s for target %s\n", unit_file, target);
+            fprintf(stderr, "Error installing %s for target %s\n", unit_file.c_str(), target.c_str());
     }
 
     return 0;
@@ -714,7 +663,6 @@ const char* get_platform() {
 
     FILE* fp;
     char* line = NULL;
-    char* token;
     char* saveptr;
     char *tmp_platform = NULL;
     static char platform_buffer[MAX_PLATFORM_NAME_LEN + 1];
@@ -730,7 +678,7 @@ const char* get_platform() {
     while ((nread = getline(&line, &len, fp)) != -1) {
         if ((strstr(line, "onie_platform") != NULL) ||
             (strstr(line, "aboot_platform") != NULL)) {
-            token = strtok_r(line, "=", &saveptr);
+            strtok_r(line, "=", &saveptr);
             tmp_platform = strtok_r(NULL, "=", &saveptr);
             strip_trailing_newline(tmp_platform);
             break;
@@ -742,7 +690,7 @@ const char* get_platform() {
         free(line);
         return NULL;
     }
-    strncpy(platform_buffer, tmp_platform, sizeof(platform_buffer) - 1);
+    snprintf(platform_buffer, sizeof(platform_buffer), "%s", tmp_platform);
     fclose(fp);
     free(line);
 
@@ -757,7 +705,6 @@ int get_num_of_asic() {
     ***/
     FILE *fp;
     char *line = NULL;
-    char* token;
     const char* platform = NULL;
     char* saveptr;
     size_t len = 0;
@@ -774,7 +721,7 @@ int get_num_of_asic() {
         if (fp != NULL) {
             while ((nread = getline(&line, &len, fp)) != -1) {
                 if (strstr(line, "NUM_ASIC") != NULL) {
-                    token = strtok_r(line, "=", &saveptr);
+                    strtok_r(line, "=", &saveptr);
                     str_num_asic = strtok_r(NULL, "=", &saveptr);
                     strip_trailing_newline(str_num_asic);
                     if (str_num_asic != NULL){
@@ -834,7 +781,7 @@ const struct json_object* get_platform_info() {
         fclose(fp);
         exit(EXIT_FAILURE);
     }
-    char *platform_json = malloc(fsize + 1);
+    char *platform_json = (char*) malloc(fsize + 1);
     if (platform_json == NULL) {
         fprintf(stdout, "Failed to allocate memory for %s\n", platform_file_path);
         fclose(fp);
@@ -925,58 +872,54 @@ static int get_num_of_dpu() {
  * @param unit_name The name of the network unit to install.
  * @return 0 if the network unit is installed successfully, or -1 if an error occurs.
  */
-static int install_network_unit(const char* unit_name) {
-    assert(unit_name);
+static int install_network_unit(std::string unit_name) {
+    if (unit_name.empty()) {
+        fprintf(stderr, "Invalid network unit\n");
+        exit(EXIT_FAILURE);
+    }
 
-    const char* unit_type = strrchr(unit_name, '.');
-    if (unit_type == NULL) {
-        fprintf(stderr, "Invalid network unit %s\n", unit_name);
+    std::string unit_type = unit_name.substr(unit_name.find(".") + 1);
+    if (unit_type.empty()) {
+        fprintf(stderr, "Invalid network unit %s\n", unit_name.c_str());
         return -1;
     }
-    unit_type++;
 
-    char install_path[PATH_MAX] = {0};
-    char original_path[PATH_MAX] = {0};
-    const char* subdir;
-    if (strcmp(unit_type, "netdev") == 0 || strcmp(unit_type, "network") == 0) {
-        subdir = "/network/";
-    } else {
-        fprintf(stderr, "Invalid network unit %s\n", unit_type);
+    std::string install_path;
+    std::string original_path;
+    std::string subdir = "/network/";
+    if (unit_type != "netdev" && unit_type != "network") {
+        fprintf(stderr, "Invalid network unit %s\n", unit_type.c_str());
         return -1;
     }
 
-    strcpy(install_path, get_etc_systemd());
-    strcat(install_path, subdir);
-    strcat(install_path, unit_name);
-    strcpy(original_path, get_lib_systemd());
-    strcat(original_path, subdir);
-    strcat(original_path, unit_name);
+    install_path = get_etc_systemd() + subdir + unit_name;
+    original_path = get_lib_systemd() + subdir + unit_name;
 
     struct stat st;
 
-    if (stat((const char *)install_path, &st) == 0) {
+    if (stat(install_path.c_str(), &st) == 0) {
         // If the file already exists, remove it
         if (S_ISDIR(st.st_mode)) {
-            fprintf(stderr, "Error: %s is a directory\n", install_path);
+            fprintf(stderr, "Error: %s is a directory\n", install_path.c_str());
             return -1;
         }
-        if (remove(install_path) != 0) {
-            fprintf(stderr, "Error removing existing file %s\n", install_path);
+        if (remove(install_path.c_str()) != 0) {
+            fprintf(stderr, "Error removing existing file %s\n", install_path.c_str());
             return -1;
         }
     }
 
-    if (is_devnull(install_path)) {
-        if (remove(install_path) != 0) {
-            fprintf(stderr, "Unable to remove existing symlink %s\n", install_path);
+    if (is_devnull(install_path.c_str())) {
+        if (remove(install_path.c_str()) != 0) {
+            fprintf(stderr, "Unable to remove existing symlink %s\n", install_path.c_str());
             return -1;
         }
     }
 
-    if (symlink(original_path, install_path) != 0) {
+    if (symlink(original_path.c_str(), install_path.c_str()) != 0) {
         if (errno == EEXIST)
             return 0;
-        fprintf(stderr, "Error creating symlink %s -> %s (%s)\n", install_path, original_path, strerror(errno));
+        fprintf(stderr, "Error creating symlink %s -> %s (%s)\n", install_path.c_str(), original_path.c_str(), strerror(errno));
         return -1;
     }
 
@@ -994,39 +937,34 @@ static int render_network_service_for_smart_switch() {
         return 0;
     }
 
-    char buffer_instruction[MAX_BUF_SIZE] = {0};
-    strcpy(buffer_instruction, "\nBefore=");
-    for (size_t i = 0; i < num_dpus; i++) {
-        char *unit;
-        asprintf(&unit, "database@dpu%ld.service", i);
-        strcat(buffer_instruction, unit);
-        free(unit);
+    std::stringstream ss;
+    ss << "\nBefore=";
+    for (int i = 0; i < num_dpus; i++) {
+        ss << "database@dpu" << i << ".service";
         if (i != num_dpus - 1) {
-            strcat(buffer_instruction, " ");
+            ss << " ";
         }
     }
+    std::string buffer_instruction = ss.str();
+    std::string unit_path = std::string(get_unit_file_prefix()) + "/midplane-network-npu.service";
 
-    char unit_path[PATH_MAX] = { 0 };
-    strcpy(unit_path, get_unit_file_prefix());
-    strcat(unit_path, "/midplane-network-npu.service");
-
-    FILE *fp = fopen(unit_path, "r");
+    FILE *fp = fopen(unit_path.c_str(), "r");
     if (fp == NULL) {
-        fprintf(stderr, "Failed to open %s\n", unit_path);
+        fprintf(stderr, "Failed to open %s\n", unit_path.c_str());
         return -1;
     }
     fseek(fp, 0, SEEK_END);
     size_t file_size = ftell(fp);
     fseek(fp, 0, SEEK_SET);
-    size_t len = file_size + strlen(buffer_instruction) + 1;
-    char *unit_content = malloc(len);
+    size_t len = file_size + buffer_instruction.length() + 1;
+    char *unit_content = (char*) malloc(len);
     if (unit_content == NULL) {
-        fprintf(stderr, "Failed to allocate memory for %s\n", unit_path);
+        fprintf(stderr, "Failed to allocate memory for %s\n", unit_path.c_str());
         fclose(fp);
         exit(EXIT_FAILURE);
     }
     if (fread(unit_content, file_size, 1, fp) != 1) {
-        fprintf(stderr, "Failed to read %s\n", unit_path);
+        fprintf(stderr, "Failed to read %s\n", unit_path.c_str());
         free(unit_content);
         fclose(fp);
         exit(EXIT_FAILURE);
@@ -1037,11 +975,11 @@ static int render_network_service_for_smart_switch() {
     char *insert_point = strstr(unit_content, "[Unit]");
     insert_point += strlen("[Unit]");
     // Move the rest of the file to make room for the Before instruction
-    memmove(insert_point + strlen(buffer_instruction), insert_point, file_size - (insert_point - unit_content));
+    memmove(insert_point + buffer_instruction.length(), insert_point, file_size - (insert_point - unit_content));
     // Insert the Before instruction
-    memcpy(insert_point, buffer_instruction, strlen(buffer_instruction));
+    memcpy(insert_point, buffer_instruction.c_str(), buffer_instruction.length());
     // Remove original Before instruction
-    insert_point += strlen(buffer_instruction);
+    insert_point += buffer_instruction.length();
     char *before_start = strstr(insert_point, "Before=");
     while (before_start != NULL) {
         char *before_end = strchr(before_start, '\n');
@@ -1060,14 +998,14 @@ static int render_network_service_for_smart_switch() {
         before_start = strstr(before_start, "Before=");
     }
     // Write the modified unit file
-    fp = fopen(unit_path, "w");
+    fp = fopen(unit_path.c_str(), "w");
     if (fp == NULL) {
-        fprintf(stderr, "Failed to open %s\n", unit_path);
+        fprintf(stderr, "Failed to open %s\n", unit_path.c_str());
         free(unit_content);
         exit(EXIT_FAILURE);
     }
     if (fwrite(unit_content, strlen(unit_content), 1, fp) != 1) {
-        fprintf(stderr, "Failed to write %s\n", unit_path);
+        fprintf(stderr, "Failed to write %s\n", unit_path.c_str());
         free(unit_content);
         fclose(fp);
         exit(EXIT_FAILURE);
@@ -1118,15 +1056,13 @@ static int install_network_service_for_smart_switch() {
 
 int ssg_main(int argc, char **argv) {
     char* unit_files[MAX_NUM_UNITS];
-    char install_dir[PATH_MAX];
+    std::string install_dir;
     char* targets[MAX_NUM_TARGETS];
-    char* unit_instance;
-    char* prefix;
-    char* suffix;
-    char* saveptr;
+    std::string unit_instance;
+    std::string prefix;
+    std::string suffix;
     int num_unit_files;
     int num_targets;
-    int r;
 
 #ifdef _SSG_UNITTEST
     clean_up_cache();
@@ -1143,8 +1079,7 @@ int ssg_main(int argc, char **argv) {
     smart_switch = smart_switch_npu || smart_switch_dpu;
     num_dpus = get_num_of_dpu();
 
-    strcpy(install_dir, argv[1]);
-    strcat(install_dir, "/");
+    install_dir = std::string(argv[1]) + "/";
     num_unit_files = get_unit_files(unit_files);
 
     // Install and render midplane network service for smart switch
@@ -1159,36 +1094,30 @@ int ssg_main(int argc, char **argv) {
 
     // For each unit file, get the installation targets and install the unit
     for (int i = 0; i < num_unit_files; i++) {
-        unit_instance = strdup(unit_files[i]);
+        unit_instance = unit_files[i];
         if ((num_asics == 1 &&
              !is_multi_instance_service_for_dpu(unit_instance)) &&
-            strstr(unit_instance, "@") != NULL) {
-            prefix = strdup(strtok_r(unit_instance, "@", &saveptr));
-            suffix = strdup(strtok_r(NULL, "@", &saveptr));
-
-            strcpy(unit_instance, prefix);
-            strcat(unit_instance, suffix);
+            unit_instance.find("@") != std::string::npos) {
+            prefix = unit_instance.substr(0, unit_instance.find("@"));
+            suffix = unit_instance.substr(unit_instance.find("@") + 1);
 
-            free(prefix);
-            free(suffix);
+            unit_instance = prefix + suffix;
         }
 
         num_targets = get_install_targets(unit_instance, targets);
         if (num_targets < 0) {
-            fprintf(stderr, "Error parsing %s\n", unit_instance);
-            free(unit_instance);
+            fprintf(stderr, "Error parsing %s\n", unit_instance.c_str());
             free(unit_files[i]);
             continue;
         }
 
         for (int j = 0; j < num_targets; j++) {
             if (install_unit_file(unit_instance, targets[j], install_dir) != 0)
-                fprintf(stderr, "Error installing %s to target directory %s\n", unit_instance, targets[j]);
+                fprintf(stderr, "Error installing %s to target directory %s\n", unit_instance.c_str(), targets[j]);
 
             free(targets[j]);
         }
 
-        free(unit_instance);
         free(unit_files[i]);
     }
 
diff --git a/src/systemd-sonic-generator/systemd-sonic-generator.h b/src/systemd-sonic-generator/systemd-sonic-generator.h
index 8695951fb..91e2d476c 100644
--- a/src/systemd-sonic-generator/systemd-sonic-generator.h
+++ b/src/systemd-sonic-generator/systemd-sonic-generator.h
@@ -6,9 +6,11 @@
  * Copyright (c) 2021 by Cisco Systems, Inc.
  *------------------------------------------------------------------
  */
-#ifdef __cplusplus
-extern "C" {
-#endif
+// #ifdef __cplusplus
+// extern "C" {
+// #endif
+#include <string>
+#include <unordered_set>
 
 /* expose global vars for testing purpose */
 extern const char* UNIT_FILE_PREFIX;
@@ -29,11 +31,11 @@ extern const char* get_unit_file_prefix();
 extern const char* get_config_file();
 extern const char* get_machine_config_file();
 extern const char* get_asic_conf_format();
-extern char* insert_instance_number(char* unit_file, int instance, const char *instance_prefix);
+extern std::string insert_instance_number(const std::string& unit_file, int instance, const std::string& instance_prefix);
 extern int ssg_main(int argc, char** argv);
 extern int get_num_of_asic();
-extern int get_install_targets(char* unit_file, char* targets[]);
+extern int get_install_targets(std::string unit_file, char* targets[]);
 extern int get_unit_files(char* unit_files[]);
-#ifdef __cplusplus
-}
-#endif
+// #ifdef __cplusplus
+// }
+// #endif

From b57088f2613af9456a7cba458d42f2bf1c4a63cd Mon Sep 17 00:00:00 2001
From: Senthil Kumar Guruswamy <75792349+sg893052@users.noreply.github.com>
Date: Wed, 10 Apr 2024 00:28:59 +0530
Subject: [PATCH 0412/1115] Fix for issue#16596 (#17459)

### Why I did it
Sysmonitor bug fix
Fix for issue#16596

### How I did it
When the system reboots, the system-health service is compelled to halt through the transmission of a SIGTERM signal. Consequently, the system_service function encounters an EOFError, leading to the observation of an exception, which is currently being bypassed.

#### How to verify it
systemctl restart system-health.service
or perform a reboot and check the syslog
---
 src/system-health/health_checker/sysmonitor.py | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/system-health/health_checker/sysmonitor.py b/src/system-health/health_checker/sysmonitor.py
index 92777b256..5312603d7 100755
--- a/src/system-health/health_checker/sysmonitor.py
+++ b/src/system-health/health_checker/sysmonitor.py
@@ -482,7 +482,7 @@ def system_service(self):
                 logger.log_debug("Main process- received event:{} from source:{} time:{}".format(event,event_src,event_time))
                 logger.log_info("check_unit_status for [ "+event+" ] ")
                 self.check_unit_status(event)
-            except Empty:
+            except (Empty, EOFError):
                 pass
             except Exception as e:
                 logger.log_error("system_service"+str(e))

From 5e217a64bf961a0318650f99de82be255fc062a0 Mon Sep 17 00:00:00 2001
From: Ze Gan <ganze718@gmail.com>
Date: Wed, 10 Apr 2024 03:05:34 +0800
Subject: [PATCH 0413/1115] [database]: Update the DPU database service
 configuration (#17562)

### Why I did it
According to the HLD: https://github.com/sonic-net/SONiC/pull/1534, update the DPU database configuration.
### How I did it
1. Add the remote redis configuration in database_config.json.j2
2. Rename the database_global.json.j2
3. Determine the remote DB port according to the midplane IP
4. Get the DPU information from platform.json

#### How to verify it
Check them locally
---
 dockers/docker-database/database_config.json.j2 | 17 +++++++++++++----
 dockers/docker-database/database_global.json.j2 |  2 +-
 dockers/docker-database/docker-database-init.sh | 12 ++++++++++++
 files/build_templates/docker_image_ctl.j2       | 15 ++++++++++++++-
 4 files changed, 40 insertions(+), 6 deletions(-)

diff --git a/dockers/docker-database/database_config.json.j2 b/dockers/docker-database/database_config.json.j2
index bacc1d356..b5c231a93 100644
--- a/dockers/docker-database/database_config.json.j2
+++ b/dockers/docker-database/database_config.json.j2
@@ -1,3 +1,4 @@
+{% set include_remote_db = (REMOTE_DB_IP is defined and REMOTE_DB_PORT is defined) %}
 {
     "INSTANCES": {
         "redis":{
@@ -15,6 +16,14 @@
             "unix_socket_path": "/var/run/redis-chassis/redis_chassis.sock",
             "persistence_for_warm_boot" : "yes"
         }
+{% if include_remote_db %}
+        ,"remote_redis":{
+            "hostname" : "{{REMOTE_DB_IP}}",
+            "port" : {{REMOTE_DB_PORT}},
+            "unix_socket_path": ""
+            "persistence_for_warm_boot" : "yes"
+        }
+{% endif %}
     },
     "DATABASES" : {
         "APPL_DB" : {
@@ -102,23 +111,23 @@
         "DPU_APPL_DB" : {
             "id" : 15,
             "separator": ":",
-            "instance" : "redis",
+            "instance" : {% if include_remote_db %} "remote_redis" {% else %} "redis" {% endif %},
             "format": "proto"
         },
         "DPU_APPL_STATE_DB" : {
             "id" : 16,
             "separator": "|",
-            "instance" : "redis"
+            "instance" : {% if include_remote_db %} "remote_redis" {% else %} "redis" {% endif %}
         },
         "DPU_STATE_DB" : {
             "id" : 17,
             "separator": "|",
-            "instance" : "redis"
+            "instance" : {% if include_remote_db %} "remote_redis" {% else %} "redis" {% endif %}
         },
         "DPU_COUNTERS_DB" : {
             "id" : 18,
             "separator": ":",
-            "instance" : "redis"
+            "instance" : {% if include_remote_db %} "remote_redis" {% else %} "redis" {% endif %}
         }
 {% endif %}
     },
diff --git a/dockers/docker-database/database_global.json.j2 b/dockers/docker-database/database_global.json.j2
index 032f5e722..1760a96f0 100644
--- a/dockers/docker-database/database_global.json.j2
+++ b/dockers/docker-database/database_global.json.j2
@@ -26,7 +26,7 @@
 {% if dpu_cnt > 0 %}
 {% for dpu in range(dpu_cnt) %}
         {
-            "database_name" : "dpu{{dpu}}",
+            "container_name" : "dpu{{dpu}}",
             "include" : "../../redisdpu{{dpu}}/sonic-db/database_config.json"
 {% if dpu == dpu_cnt-1  %}
         }
diff --git a/dockers/docker-database/docker-database-init.sh b/dockers/docker-database/docker-database-init.sh
index f3679e08a..467f33c21 100755
--- a/dockers/docker-database/docker-database-init.sh
+++ b/dockers/docker-database/docker-database-init.sh
@@ -28,6 +28,18 @@ if [[ $DATABASE_TYPE == "dpudb" ]]; then
     redis_port=`expr 6381 + $DPU_ID`
 fi
 
+if [[ $IS_DPU_DEVICE == "true" ]]
+then
+    midplane_ip=$( ip -4 -o addr show eth0-midplane | awk '{print $4}' | cut -d'/' -f1  )
+    if [[ $midplane_ip != "" ]]
+    then
+        export DATABASE_TYPE="dpudb"
+        export REMOTE_DB_IP="169.254.200.254"
+        # Determine the DB PORT from midplane IP
+        IFS=. read -r a b c d <<< $midplane_ip
+        export REMOTE_DB_PORT=$((6380 + $d))
+    fi
+fi
 
 REDIS_DIR=/var/run/redis$NAMESPACE_ID
 mkdir -p $REDIS_DIR/sonic-db
diff --git a/files/build_templates/docker_image_ctl.j2 b/files/build_templates/docker_image_ctl.j2
index 95c2e1fa5..694fdd1f8 100644
--- a/files/build_templates/docker_image_ctl.j2
+++ b/files/build_templates/docker_image_ctl.j2
@@ -341,6 +341,18 @@ start() {
         source $PLATFORM_ENV_CONF
     fi
 
+    # Parse the platform.json file to get the platform specific information
+    PLATFORM_JSON=/usr/share/sonic/device/$PLATFORM/platform.json
+    if [ -f "$PLATFORM_JSON" ]; then
+        NUM_DPU=$(jq -r '.DPUS | length' $PLATFORM_JSON 2>/dev/null)
+        jq -e '.DPU' $PLATFORM_JSON >/dev/null
+        if [[ $? -eq 0 ]]; then
+            IS_DPU_DEVICE="true"
+        else
+            IS_DPU_DEVICE="false"
+        fi
+    fi
+
     {%- if sonic_asic_platform == "broadcom" %}
     {%- if docker_container_name == "syncd" %}
     # Set the SYNCD_SHM_SIZE if this variable not defined
@@ -490,7 +502,7 @@ start() {
         redis_dir_list=`/usr/bin/python -c "import sys; import os; import json; f=open(sys.argv[1]); \
                         global_db_dir = os.path.dirname(sys.argv[1]); data=json.load(f); \
                         print(\" \".join([os.path.normpath(global_db_dir+'/'+elem['include']).partition('sonic-db')[0]\
-                        for elem in data['INCLUDES'] if 'namespace' in elem])); f.close()" $SONIC_DB_GLOBAL_JSON`
+                        for elem in data['INCLUDES'] if 'namespace' in elem or 'container_name' in elem ])); f.close()" $SONIC_DB_GLOBAL_JSON`
     fi
 
     {%- if docker_container_name == "database" %}
@@ -533,6 +545,7 @@ start() {
             DB_OPT=$DB_OPT" -v /var/run/redis$DEV:/var/run/redis:rw "
             DB_OPT=$DB_OPT" --env DATABASE_TYPE=$DATABASE_TYPE "
             DB_OPT=$DB_OPT" --env NUM_DPU=$NUM_DPU "
+            DB_OPT=$DB_OPT" --env IS_DPU_DEVICE=$IS_DPU_DEVICE "
             if [[ "$DEV" ]]; then
                 DB_OPT=$DB_OPT" -v /var/run/redis$DEV:/var/run/redis$DEV:rw "
             fi

From c7cd477dd402f9f021295fb22941c3e1d5624438 Mon Sep 17 00:00:00 2001
From: bktsim <144830673+bktsim-arista@users.noreply.github.com>
Date: Tue, 9 Apr 2024 14:46:30 -0700
Subject: [PATCH 0414/1115] add helpers for fetching entries on multi-asic
 (#17243)

---
 .../sonic_py_common/multi_asic.py             | 51 +++++++++++++++----
 1 file changed, 42 insertions(+), 9 deletions(-)

diff --git a/src/sonic-py-common/sonic_py_common/multi_asic.py b/src/sonic-py-common/sonic_py_common/multi_asic.py
index 8aac9bde4..92aa93463 100644
--- a/src/sonic-py-common/sonic_py_common/multi_asic.py
+++ b/src/sonic-py-common/sonic_py_common/multi_asic.py
@@ -273,27 +273,60 @@ def get_port_table(namespace=None):
     Returns:
         a dict of all the ports
     """
-    all_ports = {}
+    return get_table(PORT_CFG_DB_TABLE, namespace)
+
+
+def get_table(table, namespace=None):
+    """
+    Retrieves a merged table containing all entries across specified namespaces
+
+    Returns:
+        a dict of all entries of table across namespaces
+    """
+    merged_table = {}
     ns_list = get_namespace_list(namespace)
 
     for ns in ns_list:
-        ports = get_port_table_for_asic(ns)
-        all_ports.update(ports)
+        ns_table = get_table_for_asic(table, ns)
+        merged_table.update(ns_table)
+
+    return merged_table
 
-    return all_ports
 
 def get_port_entry_for_asic(port, namespace):
 
-    config_db = connect_config_db_for_ns(namespace)
-    ports = config_db.get_entry(PORT_CFG_DB_TABLE, port)
-    return ports
+    return get_table_entry_for_asic(PORT_CFG_DB_TABLE, port, namespace)
+
 
+def get_table_entry_for_asic(table, entry, namespace):
+
+    config_db = connect_config_db_for_ns(namespace)
+    return config_db.get_entry(table, entry)
 
 def get_port_table_for_asic(namespace):
 
+    return get_table_for_asic(PORT_CFG_DB_TABLE, namespace)
+
+
+def get_table_for_asic(table, namespace):
+
     config_db = connect_config_db_for_ns(namespace)
-    ports = config_db.get_table(PORT_CFG_DB_TABLE)
-    return ports
+    return config_db.get_table(table)
+
+
+def mod_entry(table, key, value, namespace=None, modIfExists=False):
+    """
+    Modifies an entry in a table with a value in a specified namespace.
+    If no namespace is specified all namespaces are modified.
+    If modIfExists is true, the entry will be modified only if the key
+    already exists in the table.
+    """
+    ns_list = get_namespace_list(namespace)
+
+    for ns in ns_list:
+        if not modIfExists or get_table_entry_for_asic(table, key, ns):
+            config_db = connect_config_db_for_ns(ns)
+            config_db.mod_entry(table, key, value)
 
 
 def get_namespace_for_port(port_name):

From 78aa4a3aaa569def254ed556ed973f2ff4be1ac6 Mon Sep 17 00:00:00 2001
From: Zain Budhwani <99770260+zbud-msft@users.noreply.github.com>
Date: Tue, 9 Apr 2024 17:27:46 -0700
Subject: [PATCH 0415/1115] Upgrade eventd to bookworm (#18557)

---
 dockers/docker-eventd/Dockerfile.j2 |  2 +-
 rules/docker-eventd.mk              | 10 +++++-----
 2 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/dockers/docker-eventd/Dockerfile.j2 b/dockers/docker-eventd/Dockerfile.j2
index 8d935dc9f..adf7fbfe6 100644
--- a/dockers/docker-eventd/Dockerfile.j2
+++ b/dockers/docker-eventd/Dockerfile.j2
@@ -1,5 +1,5 @@
 {% from "dockers/dockerfile-macros.j2" import install_debian_packages, install_python_wheels, copy_files %}
-FROM docker-config-engine-bullseye-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}}
+FROM docker-config-engine-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}}
 
 ARG docker_container_name
 ARG image_version
diff --git a/rules/docker-eventd.mk b/rules/docker-eventd.mk
index 49ac4f468..77c4fad21 100644
--- a/rules/docker-eventd.mk
+++ b/rules/docker-eventd.mk
@@ -6,12 +6,12 @@ DOCKER_EVENTD_DBG = $(DOCKER_EVENTD_STEM)-$(DBG_IMAGE_MARK).gz
 
 $(DOCKER_EVENTD)_DEPENDS += $(SONIC_EVENTD)
 
-$(DOCKER_EVENTD)_DBG_DEPENDS = $($(DOCKER_CONFIG_ENGINE_BULLSEYE)_DBG_DEPENDS)
+$(DOCKER_EVENTD)_DBG_DEPENDS = $($(DOCKER_CONFIG_ENGINE_BOOKWORM)_DBG_DEPENDS)
 $(DOCKER_EVENTD)_DBG_DEPENDS += $(SONIC_EVENTD_DBG) $(LIBSWSSCOMMON_DBG)
 
-$(DOCKER_EVENTD)_DBG_IMAGE_PACKAGES = $($(DOCKER_CONFIG_ENGINE_BULLSEYE)_DBG_IMAGE_PACKAGES)
+$(DOCKER_EVENTD)_DBG_IMAGE_PACKAGES = $($(DOCKER_CONFIG_ENGINE_BOOKWORM)_DBG_IMAGE_PACKAGES)
 
-$(DOCKER_EVENTD)_LOAD_DOCKERS = $(DOCKER_CONFIG_ENGINE_BULLSEYE)
+$(DOCKER_EVENTD)_LOAD_DOCKERS = $(DOCKER_CONFIG_ENGINE_BOOKWORM)
 
 $(DOCKER_EVENTD)_PATH = $(DOCKERS_PATH)/$(DOCKER_EVENTD_STEM)
 
@@ -37,5 +37,5 @@ $(DOCKER_EVENTD)_RUN_OPT += -t
 $(DOCKER_EVENTD)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro
 $(DOCKER_EVENTD)_RUN_OPT += -v /etc/timezone:/etc/timezone:ro 
 
-SONIC_BULLSEYE_DOCKERS += $(DOCKER_EVENTD)
-SONIC_BULLSEYE_DBG_DOCKERS += $(DOCKER_EVENTD_DBG)
+SONIC_BOOKWORM_DOCKERS += $(DOCKER_EVENTD)
+SONIC_BOOKWORM_DBG_DOCKERS += $(DOCKER_EVENTD_DBG)

From 5c3aa204155aa623e7412a545d505568a3ae6ddf Mon Sep 17 00:00:00 2001
From: Saikrishna Arcot <sarcot@microsoft.com>
Date: Tue, 9 Apr 2024 19:28:25 -0500
Subject: [PATCH 0416/1115] Add lcov to Bookworm slave container (#18544)

The gcovr package used to have lcov as a runtime dependency. However,
that was removed in Debian bug 987818. However, autoconf's code coverage
macro file expects lcov and genhtml to be present.

It's possible that lcov and genhtml are actually not needed for
generating the report, and that gcovr is enough. For now, though, just
add lcov (which includes genhtml) into the slave container.

Signed-off-by: Saikrishna Arcot <sarcot@microsoft.com>
---
 sonic-slave-bookworm/Dockerfile.j2 | 1 +
 1 file changed, 1 insertion(+)

diff --git a/sonic-slave-bookworm/Dockerfile.j2 b/sonic-slave-bookworm/Dockerfile.j2
index 27e712236..34d517556 100644
--- a/sonic-slave-bookworm/Dockerfile.j2
+++ b/sonic-slave-bookworm/Dockerfile.j2
@@ -258,6 +258,7 @@ RUN apt-get update && apt-get install -y \
         python3-nose \
         python3-venv \
         gcovr \
+        lcov \
         python3-pytest-cov \
         python3-pytest-cov \
         python3-parse \

From 2c0434db25c246f201a75889fd9d84f5b086c699 Mon Sep 17 00:00:00 2001
From: noaOrMlnx <58519608+noaOrMlnx@users.noreply.github.com>
Date: Wed, 10 Apr 2024 11:28:36 +0300
Subject: [PATCH 0417/1115] Fix Module Detection Flow in modules_mgmt thread,
 to check power_on before power_good (#18593)

- Why I did it
Old flow checked power_good before powering-on the module.
If the module is not powered, power_good will always remain 0 and flow will stop at the beginning.

- How I did it
Updated the state machine of MDF to have the right order.

- How to verify it
I added logs and made sure the right order is being executed.
---
 .../mlnx-platform-api/sonic_platform/modules_mgmt.py        | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/modules_mgmt.py b/platform/mellanox/mlnx-platform-api/sonic_platform/modules_mgmt.py
index ddc5ac599..448e0ca06 100644
--- a/platform/mellanox/mlnx-platform-api/sonic_platform/modules_mgmt.py
+++ b/platform/mellanox/mlnx-platform-api/sonic_platform/modules_mgmt.py
@@ -103,10 +103,10 @@ def __init__(self, namespaces=None, main_thread_stop_event=None, q=None):
     # SFPs state machine
     def get_sm_func(self, sm, port):
         SFP_SM_ENUM = {STATE_HW_NOT_PRESENT: self.check_if_hw_present
-            , STATE_HW_PRESENT: self.check_if_module_available
-            , STATE_MODULE_AVAILABLE: self.check_if_power_on
+            , STATE_HW_PRESENT: self.check_if_power_on
             , STATE_NOT_POWERED: self.power_on_module
-            , STATE_POWERED: self.check_module_type
+            , STATE_POWERED: self.check_if_module_available
+            , STATE_MODULE_AVAILABLE: self.check_module_type
             , STATE_FW_CONTROL: self.save_module_control_mode
             , STATE_SW_CONTROL: self.save_module_control_mode
             , STATE_ERROR_HANDLER: STATE_ERROR_HANDLER

From e35b7588a43c96c2abdc90503507674cf10d836d Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Wed, 10 Apr 2024 19:05:58 +0800
Subject: [PATCH 0418/1115] [submodule] Update submodule sonic-utilities to the
 latest HEAD automatically (#18615)

#### Why I did it
src/sonic-utilities
```
* e914198d - (HEAD -> master, origin/master, origin/HEAD) [Mellanox]Fix Syntax Warning in config mlnx command (#3254) (9 hours ago) [Sudharsan Dhamal Gopalarathnam]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-utilities | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-utilities b/src/sonic-utilities
index c57bf8169..e914198db 160000
--- a/src/sonic-utilities
+++ b/src/sonic-utilities
@@ -1 +1 @@
-Subproject commit c57bf8169f6fbdab9fca6f0c7f2a067f71942cb6
+Subproject commit e914198db543aa5ca7f4801bae46dfaef870225d

From f7de50a0ee621b908ef9186d74acd3138ee85714 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Wed, 10 Apr 2024 19:06:05 +0800
Subject: [PATCH 0419/1115] [submodule] Update submodule sonic-gnmi to the
 latest HEAD automatically (#18612)

#### Why I did it
src/sonic-gnmi
```
* 6b63a50 - (HEAD -> master, origin/master, origin/HEAD) Update DB connector to use dbkey (#214) (20 hours ago) [ganglv]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-gnmi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-gnmi b/src/sonic-gnmi
index feaa1df73..6b63a50c6 160000
--- a/src/sonic-gnmi
+++ b/src/sonic-gnmi
@@ -1 +1 @@
-Subproject commit feaa1df733f825d2718ed59a2b1e6ac50635f6b7
+Subproject commit 6b63a50c68165f26cfd930a154c77efd97d85ab1

From bb71ecf1cb6e2c8c81257bfb6a98c53f7304a977 Mon Sep 17 00:00:00 2001
From: Xincun Li <147451452+xincunli-sonic@users.noreply.github.com>
Date: Wed, 10 Apr 2024 13:29:55 -0700
Subject: [PATCH 0420/1115] [YANG]: Add Yang model support for Multi ASIC port
 and device_metadata (#18444)

### Why I did it

In Multi ASIC scenario,
1. PORT configuration table requires `coreId`, `corePortId` and `numVoq`:
```json
{
    "PORT": {
        "Ethernet0": {
            "index": "0",
            "lanes": "101,102",
            "description": "fortyGigE1/1/1",
            "mtu": "9100",
            "alias": "fortyGigE1/1/1",
            "speed": "40000",
            "link_training": "off",
            "laser_freq": "191300",
            "tx_power": "-27.3",
            "dom_polling": "enabled",
            "coreId": "1",
            "corePortId": "1",
            "numVoq": "8"
        },
        "Ethernet1": {
            "index": "1",
            "lanes": "103,104",
            "description": "fortyGigE1/1/2",
            "mtu": "9100",
            "alias": "fortyGigE1/1/2",
            "admin_status": "up",
            "speed": "40000",
            "link_training": "on",
            "laser_freq": "191300",
            "tx_power": "-27.3",
            "dom_polling": "enabled",
            "coreId": "0",
            "corePortId": "14",
            "numVoq": "8"
        },
        "Ethernet63": {
            "index": "63",
            "lanes": "87,88",
            "description": "fortyGigE1/4/16",
            "mtu": "9100",
            "alias": "fortyGigE1/4/16",
            "speed": "40000",
            "laser_freq": "191300",
            "tx_power": "-27.3",
            "dom_polling": "disabled",
            "coreId": "0",
            "corePortId": "15",
            "numVoq": "8"
        }
    }
}
```
2. DEVICE_METADATA configuration table requires `asic_id`:
```json
{
"DEVICE_METADATA": {
        "localhost": {
        "asic_id": "06:00.0",
        "asic_name": "asic0",
        "hwsku": "Force10-S6100",
        "default_bgp_status": "up",
        "docker_routing_config_mode": "unified",
        "hostname": "sonic-s6100-01",
        "platform": "x86_64-dell_s6100_c2538-r0",
        "mac": "4c:76:25:f4:70:82",
        "default_pfcwd_status": "disable",
        "bgp_asn": "65100",
        "deployment_id": "1",
        "type": "ToRRouter",
        "bgp_adv_lo_prefix_as_128" : "true",
        "buffer_model": "traditional",
        "yang_config_validation": "disable",
        "rack_mgmt_map": "dummy_value",
        "timezome": "Europe/Kiev"
    }
  }
}

```

##### Work item tracking
- Microsoft ADO **(number only)**: 27252814, 27253157

#### How I did it
1. Added `coreId`, `corePortId` and `numVoq` field to CONFIG_DB PORT table.
2. Added `asic_id` and `asic_name` field to CONFIG_DB DEVICE_METADATA table.
---
 src/sonic-yang-models/doc/Configuration.md    | 21 +++++--
 .../tests/files/sample_config_db.json         | 12 +++-
 .../tests/device_metadata.json                |  6 ++
 .../tests/yang_model_tests/tests/port.json    |  9 +++
 .../tests_config/device_metadata.json         | 28 +++++++++
 .../yang_model_tests/tests_config/port.json   | 60 +++++++++++++++++++
 .../yang-models/sonic-device_metadata.yang    |  7 +++
 .../yang-models/sonic-port.yang               | 27 ++++++++-
 8 files changed, 161 insertions(+), 9 deletions(-)

diff --git a/src/sonic-yang-models/doc/Configuration.md b/src/sonic-yang-models/doc/Configuration.md
index 886277d26..2ffbba945 100644
--- a/src/sonic-yang-models/doc/Configuration.md
+++ b/src/sonic-yang-models/doc/Configuration.md
@@ -85,7 +85,7 @@ Table of Contents
          * [LOGGER](#logger)
          * [WRED_PROFILE](#wred_profile)
          * [PASSWORD_HARDENING](#password_hardening)
-         * [SSH_SERVER](#ssh_server)  
+         * [SSH_SERVER](#ssh_server)
          * [SYSTEM_DEFAULTS table](#systemdefaults-table)
          * [RADIUS](#radius)
          * [Static DNS](#static-dns)
@@ -942,6 +942,8 @@ instance is supported in SONiC.
 {
 "DEVICE_METADATA": {
         "localhost": {
+        "asic_id": "06:00.0",
+        "asic_name": "asic0",
         "hwsku": "Force10-S6100",
         "default_bgp_status": "up",
         "docker_routing_config_mode": "unified",
@@ -1210,7 +1212,7 @@ The FG_NHG_PREFIX table provides the FG_NHG_PREFIX for which FG behavior is desi
 
 ### Hash
 
-Generic hash allows user to configure various aspects of hashing algorithm.  
+Generic hash allows user to configure various aspects of hashing algorithm.
 The configuration is applied globally for each ECMP and LAG on a switch.
 
 ***ECMP/LAG HASH***
@@ -1808,7 +1810,10 @@ optional attributes.
             "link_training": "off",
             "laser_freq": "191300",
             "tx_power": "-27.3",
-            "dom_polling": "enabled"
+            "dom_polling": "enabled",
+            "coreId": "1",
+            "corePortId": "1",
+            "numVoq": "8"
         },
         "Ethernet1": {
             "index": "1",
@@ -1821,7 +1826,10 @@ optional attributes.
             "link_training": "on",
             "laser_freq": "191300",
             "tx_power": "-27.3",
-            "dom_polling": "enabled"
+            "dom_polling": "enabled",
+            "coreId": "0",
+            "corePortId": "14",
+            "numVoq": "8"
         },
         "Ethernet63": {
             "index": "63",
@@ -1832,7 +1840,10 @@ optional attributes.
             "speed": "40000",
             "laser_freq": "191300",
             "tx_power": "-27.3",
-            "dom_polling": "disabled"
+            "dom_polling": "disabled",
+            "coreId": "0",
+            "corePortId": "15",
+            "numVoq": "8"
         }
     }
 }
diff --git a/src/sonic-yang-models/tests/files/sample_config_db.json b/src/sonic-yang-models/tests/files/sample_config_db.json
index 9522d4247..47c0e3ec9 100644
--- a/src/sonic-yang-models/tests/files/sample_config_db.json
+++ b/src/sonic-yang-models/tests/files/sample_config_db.json
@@ -351,6 +351,7 @@
         "DEVICE_METADATA": {
             "localhost": {
                 "type": "ToRRouter",
+                "asic_id": "06:00.0",
                 "mac": "00:11:22:33:dd:5a",
                 "hostname": "asw.dc",
                 "bgp_asn": "64850",
@@ -565,6 +566,9 @@
         "PORT": {
             "Ethernet0": {
                 "alias": "Eth1/1",
+                "coreId": "1",
+                "corePortId": "1",
+                "numVoq": "8",
                 "lanes": "65",
                 "description": "",
                 "speed": "11100",
@@ -581,6 +585,9 @@
             },
             "Ethernet1": {
                 "alias": "Eth1/2",
+                "coreId": "1",
+                "corePortId": "1",
+                "numVoq": "8",
                 "lanes": "66",
                 "description": "",
                 "speed": "11100",
@@ -596,6 +603,9 @@
             },
             "Ethernet2": {
                 "alias": "Eth1/3",
+                "coreId": "1",
+                "corePortId": "1",
+                "numVoq": "8",
                 "lanes": "67",
                 "description": "",
                 "speed": "11100",
@@ -1702,7 +1712,7 @@
                 "ip_range": [
                     "10.1.0.0/24"
                 ],
-                "name": "BGPSentinel", 
+                "name": "BGPSentinel",
                 "src_address": "10.1.0.32"
             },
             "BGPSentinelV6": {
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/device_metadata.json b/src/sonic-yang-models/tests/yang_model_tests/tests/device_metadata.json
index 141d8b5c8..1542407f5 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests/device_metadata.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests/device_metadata.json
@@ -2,6 +2,12 @@
     "DEV_META_DEV_NEIGH_VERSION_TABLE": {
         "desc": "DEVICE_METADATA DEVICE_NEIGHBOR VERSION TABLE."
     },
+    "DEVICE_METADATA_ASIC_ID": {
+        "desc": "DEVICE_METADATA ASIC ID."
+    },
+    "DEVICE_METADATA_ASIC_NAME": {
+        "desc": "DEVICE_METADATA ASIC NAME."
+    },
     "DEVICE_METADATA_DEFAULT_BGP_STATUS": {
         "desc": "DEVICE_METADATA DEFAULT VALUE FOR BGP_STATUS FIELD.",
         "eStrKey" : "Verify",
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/port.json b/src/sonic-yang-models/tests/yang_model_tests/tests/port.json
index a6656b832..b35f9fd22 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests/port.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests/port.json
@@ -60,6 +60,15 @@
     "PORT_VALID_TYPE_TEST": {
         "desc": "PORT_VALID_TYPE_TEST no failure."
     },
+    "PORT_COREID_TYPE_TEST": {
+        "desc": "PORT_COREID_TYPE_TEST no failure."
+    },
+    "PORT_COREPORTID_TYPE_TEST": {
+        "desc": "PORT_COREPORTID_TYPE_TEST no failure."
+    },
+    "PORT_NUMVOQ_TYPE_TEST": {
+        "desc": "PORT_NUMVOQ_TYPE_TEST no failure."
+    },
     "PORT_INVALID_TYPE_TEST": {
         "desc": "PORT_INVALID_TYPE_TEST InvalidValue condition failure.",
         "eStrKey" : "InvalidValue",
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/device_metadata.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/device_metadata.json
index 941077205..0c33f93b6 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/device_metadata.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/device_metadata.json
@@ -11,6 +11,34 @@
             }
         }
     },
+    "DEVICE_METADATA_ASIC_ID": {
+        "sonic-device_metadata:sonic-device_metadata": {
+            "sonic-device_metadata:DEVICE_METADATA": {
+                "sonic-device_metadata:localhost": {
+                    "bgp_asn": "65001",
+                    "default_bgp_status": "up",
+                    "hostname": "DUT-CSW",
+                    "asic_id": "06:00.0",
+                    "asic_name": "asic0",
+                    "platform": "Stone-DX010"
+                }
+            }
+        }
+    },
+    "DEVICE_METADATA_ASIC_NAME": {
+        "sonic-device_metadata:sonic-device_metadata": {
+            "sonic-device_metadata:DEVICE_METADATA": {
+                "sonic-device_metadata:localhost": {
+                    "bgp_asn": "65001",
+                    "default_bgp_status": "up",
+                    "hostname": "DUT-CSW",
+                    "asic_id": "06:00.0",
+                    "asic_name": "asic0",
+                    "platform": "Stone-DX010"
+                }
+            }
+        }
+    },
     "DEVICE_METADATA_DEFAULT_DOCKER_ROUTING_CONFIG_MODE": {
         "sonic-device_metadata:sonic-device_metadata": {
             "sonic-device_metadata:DEVICE_METADATA": {
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/port.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/port.json
index 77f70c57b..562aaf56c 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/port.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/port.json
@@ -278,6 +278,66 @@
         }
     },
 
+    "PORT_COREID_TYPE_TEST": {
+        "sonic-port:sonic-port": {
+            "sonic-port:PORT": {
+                "PORT_LIST": [
+                    {
+                        "name": "Ethernet8",
+                        "alias": "eth8",
+                        "coreId": "1",
+                        "corePortId": "1",
+                        "numVoq": "8",
+                        "lanes": "65",
+                        "speed": 25000,
+                        "autoneg": "on",
+                        "interface_type": "CR4"
+                    }
+                ]
+            }
+        }
+    },
+
+    "PORT_COREPORTID_TYPE_TEST": {
+        "sonic-port:sonic-port": {
+            "sonic-port:PORT": {
+                "PORT_LIST": [
+                    {
+                        "name": "Ethernet8",
+                        "alias": "eth8",
+                        "coreId": "1",
+                        "corePortId": "1",
+                        "numVoq": "8",
+                        "lanes": "65",
+                        "speed": 25000,
+                        "autoneg": "on",
+                        "interface_type": "CR4"
+                    }
+                ]
+            }
+        }
+    },
+
+    "PORT_NUMVOQ_TYPE_TEST": {
+        "sonic-port:sonic-port": {
+            "sonic-port:PORT": {
+                "PORT_LIST": [
+                    {
+                        "name": "Ethernet8",
+                        "alias": "eth8",
+                        "coreId": "1",
+                        "corePortId": "1",
+                        "numVoq": "8",
+                        "lanes": "65",
+                        "speed": 25000,
+                        "autoneg": "on",
+                        "interface_type": "CR4"
+                    }
+                ]
+            }
+        }
+    },
+
     "PORT_INVALID_TYPE_TEST": {
         "sonic-port:sonic-port": {
             "sonic-port:PORT": {
diff --git a/src/sonic-yang-models/yang-models/sonic-device_metadata.yang b/src/sonic-yang-models/yang-models/sonic-device_metadata.yang
index 7226b02e5..dce3db154 100644
--- a/src/sonic-yang-models/yang-models/sonic-device_metadata.yang
+++ b/src/sonic-yang-models/yang-models/sonic-device_metadata.yang
@@ -40,6 +40,13 @@ module sonic-device_metadata {
                     type stypes:hwsku;
                 }
 
+                leaf asic_id {
+                    type string {
+                        length 1..16;
+                    }
+                    description "asic_id is unique identifier of the asic used by SAI for initialization.";
+                }
+
                 leaf default_bgp_status {
                     type enumeration {
                         enum up;
diff --git a/src/sonic-yang-models/yang-models/sonic-port.yang b/src/sonic-yang-models/yang-models/sonic-port.yang
index ec2ea947a..2036a1f2f 100644
--- a/src/sonic-yang-models/yang-models/sonic-port.yang
+++ b/src/sonic-yang-models/yang-models/sonic-port.yang
@@ -39,6 +39,27 @@ module sonic-port{
 					}
 				}
 
+				leaf numVoq {
+					description "The number of virtual output queue supportted on this port.";
+					type string {
+						length 1..16;
+					}
+				}
+
+				leaf coreId {
+					description "The ASIC core where the port belongs to.";
+					type string {
+						length 1..16;
+					}
+				}
+
+				leaf corePortId {
+					description "The ASIC core port for this port.";
+					type string {
+						length 1..16;
+					}
+				}
+
 				leaf alias {
 					type string {
 						length 1..128;
@@ -51,7 +72,7 @@ module sonic-port{
 						length 1..128;
 					}
 				}
-                
+
 				leaf mode {
 					description "SwitchPort Modes possible values are routed|access|trunk. Default value  for mode is routed"; 
 					type stypes:switchport_mode; 
@@ -172,8 +193,8 @@ module sonic-port{
 
 				leaf tpid {
 					description "This leaf describes the possible TPID value that can be configured
-					            to the specified port if the HW supports TPID configuration. The possible
-					            values are 0x8100, 0x9100, 0x9200, 0x88a8, and 0x88A8";
+								to the specified port if the HW supports TPID configuration. The possible
+								values are 0x8100, 0x9100, 0x9200, 0x88a8, and 0x88A8";
 					type stypes:tpid_type;
 				}
 

From 736d1e5ad4f383a8bdb5c60abe029a47a294b807 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Thu, 11 Apr 2024 19:00:48 +0800
Subject: [PATCH 0421/1115] [submodule] Update submodule sonic-linux-kernel to
 the latest HEAD automatically (#18654)

#### Why I did it
src/sonic-linux-kernel
```
* b0dec2c - (HEAD -> master, origin/master, origin/HEAD) Intgerate HW-MGMT 7.0030.3008 Changes (#391) (3 hours ago) [Sudharsan Dhamal Gopalarathnam]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-linux-kernel | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-linux-kernel b/src/sonic-linux-kernel
index 38bb38790..b0dec2c92 160000
--- a/src/sonic-linux-kernel
+++ b/src/sonic-linux-kernel
@@ -1 +1 @@
-Subproject commit 38bb38790025cd338af04b0dda75e09b3fc5fb65
+Subproject commit b0dec2c92c570fa9d7d04d80aca381fd360ff52c

From 4fb784356a6d99a859b42b3d4b6709ddb5a8f4c5 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Thu, 11 Apr 2024 22:01:15 +0800
Subject: [PATCH 0422/1115] [submodule] Update submodule sonic-swss-common to
 the latest HEAD automatically (#18656)

#### Why I did it
src/sonic-swss-common
```
* dc9be6b - (HEAD -> master, origin/master, origin/HEAD) Add Bookworm build to PR checks (#870) (3 hours ago) [Saikrishna Arcot]
* fb83044 - Fix DBConnector and AsyncDBUpdater not use DBKey issue (#872) (20 hours ago) [Hua Liu]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-swss-common | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-swss-common b/src/sonic-swss-common
index 7db6ccf5f..dc9be6be9 160000
--- a/src/sonic-swss-common
+++ b/src/sonic-swss-common
@@ -1 +1 @@
-Subproject commit 7db6ccf5fb427d4832d6c54ab1f485ddd87b6697
+Subproject commit dc9be6be9387ac6fc34c5ef1bf7eb3f88d8a90a7

From 32ea9daab02578f04667bf0295357cdcf9cf6fa6 Mon Sep 17 00:00:00 2001
From: Arun Saravanan Balachandran
 <52521751+ArunSaravananBalachandran@users.noreply.github.com>
Date: Thu, 11 Apr 2024 21:10:41 +0530
Subject: [PATCH 0423/1115] [Dell] Update FPGA driver (#18323)

Update FPGA driver dell_fpga_ocores for Dell S52xx and Z9264 platforms.
(Independent of FPGA firmware version)
---
 .../common/dell_fpga_ocores.c                   | 17 ++++++++++++-----
 1 file changed, 12 insertions(+), 5 deletions(-)

diff --git a/platform/broadcom/sonic-platform-modules-dell/common/dell_fpga_ocores.c b/platform/broadcom/sonic-platform-modules-dell/common/dell_fpga_ocores.c
index c4175fd05..8c119bb7e 100644
--- a/platform/broadcom/sonic-platform-modules-dell/common/dell_fpga_ocores.c
+++ b/platform/broadcom/sonic-platform-modules-dell/common/dell_fpga_ocores.c
@@ -213,6 +213,8 @@ enum {
     STATE_READ,
     STATE_STOP,
     STATE_ERROR,
+    STATE_NACK,
+    STATE_ARBLOST,
 };
 
 #define TYPE_FPGALOGIC		0
@@ -527,7 +529,8 @@ static void fpgai2c_process(struct fpgalogic_i2c *i2c)
         return;
     }
 
-    if ((i2c->state == STATE_STOP) || (i2c->state == STATE_ERROR)) {
+    if ((i2c->state == STATE_STOP) || (i2c->state == STATE_NACK) ||
+        (i2c->state == STATE_ARBLOST)) {
         /* stop has been sent */
         PRINT("fpgai2c_process FPGAI2C_REG_CMD_IACK stat = 0x%x Set FPGAI2C_REG_CMD(0%x) FPGAI2C_REG_CMD_IACK = 0x%x\n" \
                 ,stat, FPGAI2C_REG_CMD, FPGAI2C_REG_CMD_IACK);
@@ -535,6 +538,9 @@ static void fpgai2c_process(struct fpgalogic_i2c *i2c)
         if(i2c->state == STATE_STOP) {
             i2c->state = STATE_DONE;
         }
+        if ((i2c->state == STATE_NACK) || (i2c->state == STATE_ARBLOST)) {
+            i2c->state = STATE_ERROR;
+        }
         wake_up(&i2c->wait);
         return;
     }
@@ -542,7 +548,7 @@ static void fpgai2c_process(struct fpgalogic_i2c *i2c)
 
     /* error? */
     if (stat & FPGAI2C_REG_STAT_ARBLOST) {
-        i2c->state = STATE_ERROR;
+        i2c->state = STATE_ARBLOST;
         PRINT("fpgai2c_process FPGAI2C_REG_STAT_ARBLOST FPGAI2C_REG_CMD_STOP\n");
         fpgai2c_stop(i2c);
         return;
@@ -559,7 +565,7 @@ static void fpgai2c_process(struct fpgalogic_i2c *i2c)
             (msg->flags & I2C_M_RD) ? STATE_READ : STATE_WRITE;
 
         if (stat & FPGAI2C_REG_STAT_NACK) {
-            i2c->state = STATE_ERROR;
+            i2c->state = STATE_NACK;
             fpgai2c_stop(i2c);
             return;
         }
@@ -712,7 +718,8 @@ static int fpgai2c_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
         fpgai2c_reg_set(i2c, FPGAI2C_REG_CMD, FPGAI2C_REG_CMD_START);
 
         /* Interrupt mode, wait for MSI, timeout in error conditions */
-        if (wait_event_timeout(i2c->wait, (i2c->state == STATE_DONE), HZ/4))
+        if (wait_event_timeout(i2c->wait,
+            ((i2c->state == STATE_DONE) || (i2c->state == STATE_ERROR)), HZ/2))
             ret = (i2c->state == STATE_DONE) ? num : -EIO;
         return ret;
     }
@@ -1531,4 +1538,4 @@ module_exit (fpgapci_exit);
 MODULE_LICENSE("GPL");
 MODULE_AUTHOR("joyce_yu@dell.com");
 MODULE_DESCRIPTION ("Driver for FPGA Logic I2C bus");
-MODULE_VERSION ("01.01");
+MODULE_VERSION ("02.02");

From d7a49270f434dfc0b2288989d708246b86baa66b Mon Sep 17 00:00:00 2001
From: Sudharsan Dhamal Gopalarathnam <sudharsand@nvidia.com>
Date: Thu, 11 Apr 2024 13:15:27 -0700
Subject: [PATCH 0424/1115] Integrate HW-MGMT Version 7.0030.3008, Update
 SDK/FW to 4.6.3064/2012.3064 SAI to SAIBuild2311.27.0.16 (#18571)

DEPENDS ON https://github.com/sonic-net/sonic-linux-kernel/pull/391
#### Why I did it

Intgerate HW-MGMT 7.0030.3008 Changes
Update SDK/FW to 4.6.3064/2012.3064
Update SAI to SAIBuild2311.27.0.16

#### How I did it
Run make integrate-mlnx-hw-mgmt
Update make files of SDK/FW/SAI

#### How to verify it
Build an image and run tests from "sonic-mgmt".
---
 platform/mellanox/fw.mk                       |   12 +-
 platform/mellanox/hw-management.mk            |    2 +-
 platform/mellanox/hw-management/hw-mgmt       |    2 +-
 .../hw-management/hwmgmt_nonup_patches        |   32 -
 platform/mellanox/mlnx-sai.mk                 |    2 +-
 .../external-changes.patch                    |   52 -
 ...-Add-support-for-new-flavour-of-capa.patch |   65 -
 ...support-for-new-flavour-of-capabilit.patch |   62 -
 ...reg-Remove-code-for-amber-LED-colour.patch |   47 -
 ...-support-Infineon-Digital-Multi-phas.patch |   37 -
 ...ivial-devices-Add-infineon-xdpe1a2g7.patch |   29 -
 ...support-for-MPS-Multi-phase-mp2891-c.patch |  563 ------
 ...dings-trivial-devices-Add-mps-mp2891.patch |   30 -
 ...-setting-LED-color-during-initializa.patch |   39 -
 ...x-Add-support-for-dynamic-I2C-channe.patch |  159 --
 ...x-Introduce-support-for-switches-equ.patch |  312 ---
 ...ellanox-Relocate-mlx-platform-driver.patch |   98 -
 ...ci-of-dwcmshc-Enable-host-V4-support.patch |   40 -
 ...-sdhci-of-dwcmshc-add-the-missing-de.patch |   35 -
 ...-sdhci-of-dwcmshc-Add-runtime-PM-ope.patch |  158 --
 ...bf_gige-add-ethtool-mlxbf_gige_set_r.patch |   80 -
 ...-OOB-handling-RX-packets-in-heavy-tr.patch |  108 --
 ...bf-gige-Fix-intermittent-no-ip-issue.patch |   85 -
 ...ige-add-MDIO-support-for-BlueField-3.patch |  496 -----
 ...rt-10M-100M-1G-speeds-on-BlueField-3.patch |  240 ---
 ...-set_link_ksettings-ethtool-callback.patch |   39 -
 ...bf-gige-Fix-kernel-panic-at-shutdown.patch |   48 -
 ...tform-mellanox-Updates-to-mlxbf-boot.patch | 1719 -----------------
 ...-bootctl-support-icm-carveout-eeprom.patch |  118 --
 ...bf-bootctl-support-SMC-call-for-sett.patch |   93 -
 ...bf-ptm-power-and-thermal-management-.patch |  281 ---
 ...BUNTU-SAUCE-mlxbf-ptm-update-license.patch |   60 -
 ...lxbf-ptm-use-0444-instead-of-S_IRUGO.patch |   64 -
 ...AUCE-mlxbf-ptm-add-atx-debugfs-nodes.patch |   83 -
 ...AUCE-mlxbf-ptm-update-module-version.patch |   31 -
 ...bf-bootctl-Fix-kernel-panic-due-to-b.patch |   56 -
 ...everse-dependencies-for-firmware-fla.patch |   34 -
 ...wnstream-Ignore-error-reading-SPAD-r.patch |   36 -
 platform/mellanox/sdk.mk                      |    2 +-
 39 files changed, 10 insertions(+), 5439 deletions(-)
 delete mode 100644 platform/mellanox/non-upstream-patches/patches/0042-hwmon-mlxreg-fan-Add-support-for-new-flavour-of-capa.patch
 delete mode 100644 platform/mellanox/non-upstream-patches/patches/0044-leds-mlxreg-Add-support-for-new-flavour-of-capabilit.patch
 delete mode 100644 platform/mellanox/non-upstream-patches/patches/0045-leds-mlxreg-Remove-code-for-amber-LED-colour.patch
 delete mode 100644 platform/mellanox/non-upstream-patches/patches/0046-Extend-driver-to-support-Infineon-Digital-Multi-phas.patch
 delete mode 100644 platform/mellanox/non-upstream-patches/patches/0047-dt-bindings-trivial-devices-Add-infineon-xdpe1a2g7.patch
 delete mode 100644 platform/mellanox/non-upstream-patches/patches/0048-hwmon-pmbus-Add-support-for-MPS-Multi-phase-mp2891-c.patch
 delete mode 100644 platform/mellanox/non-upstream-patches/patches/0049-dt-bindings-trivial-devices-Add-mps-mp2891.patch
 delete mode 100644 platform/mellanox/non-upstream-patches/patches/0050-leds-mlxreg-Skip-setting-LED-color-during-initializa.patch
 delete mode 100644 platform/mellanox/non-upstream-patches/patches/0053-platform-mellanox-Add-support-for-dynamic-I2C-channe.patch
 delete mode 100644 platform/mellanox/non-upstream-patches/patches/0054-platform-mellanox-Introduce-support-for-switches-equ.patch
 delete mode 100644 platform/mellanox/non-upstream-patches/patches/0055-mellanox-Relocate-mlx-platform-driver.patch
 delete mode 100644 platform/mellanox/non-upstream-patches/patches/0066-UBUNTU-SAUCE-sdhci-of-dwcmshc-Enable-host-V4-support.patch
 delete mode 100644 platform/mellanox/non-upstream-patches/patches/0067-UBUNTU-SAUCE-mmc-sdhci-of-dwcmshc-add-the-missing-de.patch
 delete mode 100644 platform/mellanox/non-upstream-patches/patches/0068-UBUNTU-SAUCE-mmc-sdhci-of-dwcmshc-Add-runtime-PM-ope.patch
 delete mode 100644 platform/mellanox/non-upstream-patches/patches/0069-UBUNTU-SAUCE-mlxbf_gige-add-ethtool-mlxbf_gige_set_r.patch
 delete mode 100644 platform/mellanox/non-upstream-patches/patches/0070-UBUNTU-SAUCE-Fix-OOB-handling-RX-packets-in-heavy-tr.patch
 delete mode 100644 platform/mellanox/non-upstream-patches/patches/0071-UBUNTU-SAUCE-mlxbf-gige-Fix-intermittent-no-ip-issue.patch
 delete mode 100644 platform/mellanox/non-upstream-patches/patches/0072-mlxbf_gige-add-MDIO-support-for-BlueField-3.patch
 delete mode 100644 platform/mellanox/non-upstream-patches/patches/0073-mlxbf_gige-support-10M-100M-1G-speeds-on-BlueField-3.patch
 delete mode 100644 platform/mellanox/non-upstream-patches/patches/0074-mlxbf_gige-add-set_link_ksettings-ethtool-callback.patch
 delete mode 100644 platform/mellanox/non-upstream-patches/patches/0075-UBUNTU-SAUCE-mlxbf-gige-Fix-kernel-panic-at-shutdown.patch
 delete mode 100644 platform/mellanox/non-upstream-patches/patches/0076-UBUNTU-SAUCE-platform-mellanox-Updates-to-mlxbf-boot.patch
 delete mode 100644 platform/mellanox/non-upstream-patches/patches/0077-UBUNTU-SAUCE-mlx-bootctl-support-icm-carveout-eeprom.patch
 delete mode 100644 platform/mellanox/non-upstream-patches/patches/0078-UBUNTU-SAUCE-mlxbf-bootctl-support-SMC-call-for-sett.patch
 delete mode 100644 platform/mellanox/non-upstream-patches/patches/0079-UBUNTU-SAUCE-mlxbf-ptm-power-and-thermal-management-.patch
 delete mode 100644 platform/mellanox/non-upstream-patches/patches/0080-UBUNTU-SAUCE-mlxbf-ptm-update-license.patch
 delete mode 100644 platform/mellanox/non-upstream-patches/patches/0081-UBUNTU-SAUCE-mlxbf-ptm-use-0444-instead-of-S_IRUGO.patch
 delete mode 100644 platform/mellanox/non-upstream-patches/patches/0082-UBUNTU-SAUCE-mlxbf-ptm-add-atx-debugfs-nodes.patch
 delete mode 100644 platform/mellanox/non-upstream-patches/patches/0083-UBUNTU-SAUCE-mlxbf-ptm-update-module-version.patch
 delete mode 100644 platform/mellanox/non-upstream-patches/patches/0084-UBUNTU-SAUCE-mlxbf-bootctl-Fix-kernel-panic-due-to-b.patch
 delete mode 100644 platform/mellanox/non-upstream-patches/patches/8000-mlxsw-Use-weak-reverse-dependencies-for-firmware-fla.patch
 delete mode 100644 platform/mellanox/non-upstream-patches/patches/8004-mlxsw-minimal-Downstream-Ignore-error-reading-SPAD-r.patch

diff --git a/platform/mellanox/fw.mk b/platform/mellanox/fw.mk
index 7bfdee402..603fee4f8 100644
--- a/platform/mellanox/fw.mk
+++ b/platform/mellanox/fw.mk
@@ -21,33 +21,33 @@ MLNX_FW_BASE_PATH = $(MLNX_SDK_BASE_PATH)
 # Place an URL here to FW if you want to download FW instead
 MLNX_FW_BASE_URL =
 
-SIMX_VERSION = 23.10-1123
+SIMX_VERSION = 24.4-1067
 
 FW_FROM_URL = y
 
-MLNX_FW_ASSETS_RELEASE_TAG = fw-2012.2202
+MLNX_FW_ASSETS_RELEASE_TAG = fw-2012.3064
 MLNX_FW_ASSETS_URL = $(MLNX_ASSETS_GITHUB_URL)/releases/download/$(MLNX_FW_ASSETS_RELEASE_TAG)
 
 ifeq ($(MLNX_FW_BASE_URL), )
 MLNX_FW_BASE_URL = $(MLNX_FW_ASSETS_URL)
 endif
 
-MLNX_SPC_FW_VERSION = 13.2012.2202
+MLNX_SPC_FW_VERSION = 13.2012.3064
 MLNX_SPC_FW_FILE = fw-SPC-rel-$(subst .,_,$(MLNX_SPC_FW_VERSION))-EVB.mfa
 $(MLNX_SPC_FW_FILE)_PATH = $(MLNX_FW_BASE_PATH)
 $(MLNX_SPC_FW_FILE)_URL = $(MLNX_FW_BASE_URL)/$(MLNX_SPC_FW_FILE)
 
-MLNX_SPC2_FW_VERSION = 29.2012.2202
+MLNX_SPC2_FW_VERSION = 29.2012.3064
 MLNX_SPC2_FW_FILE = fw-SPC2-rel-$(subst .,_,$(MLNX_SPC2_FW_VERSION))-EVB.mfa
 $(MLNX_SPC2_FW_FILE)_PATH = $(MLNX_FW_BASE_PATH)
 $(MLNX_SPC2_FW_FILE)_URL = $(MLNX_FW_BASE_URL)/$(MLNX_SPC2_FW_FILE)
 
-MLNX_SPC3_FW_VERSION = 30.2012.2202
+MLNX_SPC3_FW_VERSION = 30.2012.3064
 MLNX_SPC3_FW_FILE = fw-SPC3-rel-$(subst .,_,$(MLNX_SPC3_FW_VERSION))-EVB.mfa
 $(MLNX_SPC3_FW_FILE)_PATH = $(MLNX_FW_BASE_PATH)
 $(MLNX_SPC3_FW_FILE)_URL = $(MLNX_FW_BASE_URL)/$(MLNX_SPC3_FW_FILE)
 
-MLNX_SPC4_FW_VERSION = 34.2012.2202
+MLNX_SPC4_FW_VERSION = 34.2012.3064
 MLNX_SPC4_FW_FILE = fw-SPC4-rel-$(subst .,_,$(MLNX_SPC4_FW_VERSION))-EVB.mfa
 $(MLNX_SPC4_FW_FILE)_PATH = $(MLNX_FW_BASE_PATH)
 $(MLNX_SPC4_FW_FILE)_URL = $(MLNX_FW_BASE_URL)/$(MLNX_SPC4_FW_FILE)
diff --git a/platform/mellanox/hw-management.mk b/platform/mellanox/hw-management.mk
index b46d67307..e2de01b04 100644
--- a/platform/mellanox/hw-management.mk
+++ b/platform/mellanox/hw-management.mk
@@ -16,7 +16,7 @@
 #
 # Mellanox HW Management
 
-MLNX_HW_MANAGEMENT_VERSION = 7.0030.2008
+MLNX_HW_MANAGEMENT_VERSION = 7.0030.3008
 
 export MLNX_HW_MANAGEMENT_VERSION
 
diff --git a/platform/mellanox/hw-management/hw-mgmt b/platform/mellanox/hw-management/hw-mgmt
index f0cbd0e61..82a14a789 160000
--- a/platform/mellanox/hw-management/hw-mgmt
+++ b/platform/mellanox/hw-management/hw-mgmt
@@ -1 +1 @@
-Subproject commit f0cbd0e61f77ca0d8ca37612abc5fe8339e0f884
+Subproject commit 82a14a789e8755cfe7be863833d41817a9b07ad9
diff --git a/platform/mellanox/hw-management/hwmgmt_nonup_patches b/platform/mellanox/hw-management/hwmgmt_nonup_patches
index 35bc2c3cc..a247853ce 100644
--- a/platform/mellanox/hw-management/hwmgmt_nonup_patches
+++ b/platform/mellanox/hw-management/hwmgmt_nonup_patches
@@ -1,33 +1 @@
 # Current non-upstream patch list, should be updated by hwmgmt_kernel_patches.py script
-0042-hwmon-mlxreg-fan-Add-support-for-new-flavour-of-capa.patch
-0044-leds-mlxreg-Add-support-for-new-flavour-of-capabilit.patch
-0045-leds-mlxreg-Remove-code-for-amber-LED-colour.patch
-0046-Extend-driver-to-support-Infineon-Digital-Multi-phas.patch
-0047-dt-bindings-trivial-devices-Add-infineon-xdpe1a2g7.patch
-0048-hwmon-pmbus-Add-support-for-MPS-Multi-phase-mp2891-c.patch
-0049-dt-bindings-trivial-devices-Add-mps-mp2891.patch
-0050-leds-mlxreg-Skip-setting-LED-color-during-initializa.patch
-0053-platform-mellanox-Add-support-for-dynamic-I2C-channe.patch
-0054-platform-mellanox-Introduce-support-for-switches-equ.patch
-0055-mellanox-Relocate-mlx-platform-driver.patch
-0066-UBUNTU-SAUCE-sdhci-of-dwcmshc-Enable-host-V4-support.patch
-0067-UBUNTU-SAUCE-mmc-sdhci-of-dwcmshc-add-the-missing-de.patch
-0068-UBUNTU-SAUCE-mmc-sdhci-of-dwcmshc-Add-runtime-PM-ope.patch
-0069-UBUNTU-SAUCE-mlxbf_gige-add-ethtool-mlxbf_gige_set_r.patch
-0070-UBUNTU-SAUCE-Fix-OOB-handling-RX-packets-in-heavy-tr.patch
-0071-UBUNTU-SAUCE-mlxbf-gige-Fix-intermittent-no-ip-issue.patch
-0072-mlxbf_gige-add-MDIO-support-for-BlueField-3.patch
-0073-mlxbf_gige-support-10M-100M-1G-speeds-on-BlueField-3.patch
-0074-mlxbf_gige-add-set_link_ksettings-ethtool-callback.patch
-0075-UBUNTU-SAUCE-mlxbf-gige-Fix-kernel-panic-at-shutdown.patch
-0076-UBUNTU-SAUCE-platform-mellanox-Updates-to-mlxbf-boot.patch
-0077-UBUNTU-SAUCE-mlx-bootctl-support-icm-carveout-eeprom.patch
-0078-UBUNTU-SAUCE-mlxbf-bootctl-support-SMC-call-for-sett.patch
-0079-UBUNTU-SAUCE-mlxbf-ptm-power-and-thermal-management-.patch
-0080-UBUNTU-SAUCE-mlxbf-ptm-update-license.patch
-0081-UBUNTU-SAUCE-mlxbf-ptm-use-0444-instead-of-S_IRUGO.patch
-0082-UBUNTU-SAUCE-mlxbf-ptm-add-atx-debugfs-nodes.patch
-0083-UBUNTU-SAUCE-mlxbf-ptm-update-module-version.patch
-0084-UBUNTU-SAUCE-mlxbf-bootctl-Fix-kernel-panic-due-to-b.patch
-8000-mlxsw-Use-weak-reverse-dependencies-for-firmware-fla.patch
-8004-mlxsw-minimal-Downstream-Ignore-error-reading-SPAD-r.patch
diff --git a/platform/mellanox/mlnx-sai.mk b/platform/mellanox/mlnx-sai.mk
index 626c167d5..d9b3102b3 100644
--- a/platform/mellanox/mlnx-sai.mk
+++ b/platform/mellanox/mlnx-sai.mk
@@ -1,6 +1,6 @@
 # Mellanox SAI
 
-MLNX_SAI_VERSION = SAIBuild2311.26.0.28
+MLNX_SAI_VERSION = SAIBuild2311.27.0.16
 MLNX_SAI_ASSETS_GITHUB_URL = https://github.com/Mellanox/Spectrum-SDK-Drivers-SONiC-Bins
 MLNX_SAI_ASSETS_RELEASE_TAG = sai-$(MLNX_SAI_VERSION)-$(BLDENV)-$(CONFIGURED_ARCH)
 MLNX_SAI_ASSETS_URL = $(MLNX_SAI_ASSETS_GITHUB_URL)/releases/download/$(MLNX_SAI_ASSETS_RELEASE_TAG)
diff --git a/platform/mellanox/non-upstream-patches/external-changes.patch b/platform/mellanox/non-upstream-patches/external-changes.patch
index 76cb7240d..8b1378917 100644
--- a/platform/mellanox/non-upstream-patches/external-changes.patch
+++ b/platform/mellanox/non-upstream-patches/external-changes.patch
@@ -1,53 +1 @@
---- a/patch/series
-+++ b/patch/series
-@@ -113,17 +113,49 @@
- 0039-mlxsw-reg-Limit-MTBR-register-payload-to-a-single-da.patch
- 0040-mlxsw-core-Extend-allowed-list-of-external-cooling-d.patch
- 0041-mlxsw-i2c-Utilize-standard-macros-for-dividing-buffe.patch
-+0042-hwmon-mlxreg-fan-Add-support-for-new-flavour-of-capa.patch
- 0043-hwmon-mlxreg-fan-Extend-number-of-supporetd-fans.patch
-+0044-leds-mlxreg-Add-support-for-new-flavour-of-capabilit.patch
-+0045-leds-mlxreg-Remove-code-for-amber-LED-colour.patch
-+0046-Extend-driver-to-support-Infineon-Digital-Multi-phas.patch
-+0047-dt-bindings-trivial-devices-Add-infineon-xdpe1a2g7.patch
-+0048-hwmon-pmbus-Add-support-for-MPS-Multi-phase-mp2891-c.patch
-+0049-dt-bindings-trivial-devices-Add-mps-mp2891.patch
-+0050-leds-mlxreg-Skip-setting-LED-color-during-initializa.patch
- 0051-platform-mellanox-mlxreg-hotplug-Allow-more-flexible.patch
- 0052-i2c-mux-Add-register-map-based-mux-driver.patch
-+0053-platform-mellanox-Add-support-for-dynamic-I2C-channe.patch
-+0054-platform-mellanox-Introduce-support-for-switches-equ.patch
-+0055-mellanox-Relocate-mlx-platform-driver.patch
- 0056-Documentation-ABI-Add-new-attribute-for-mlxreg-io-sy.patch
- 0057-Documentation-ABI-Add-new-attribute-for-mlxreg-io-sy.patch
- 0061-pinctrl-Introduce-struct-pinfunction-and-PINCTRL_PIN.patch
- 0062-pinctrl-mlxbf3-Add-pinctrl-driver-support.patch
- 0063-gpio-mlxbf3-Add-gpio-driver-support.patch
- 0064-pinctrl-mlxbf3-set-varaiable-mlxbf3_pmx_funcs-storag.patch
-+0066-UBUNTU-SAUCE-sdhci-of-dwcmshc-Enable-host-V4-support.patch
-+0067-UBUNTU-SAUCE-mmc-sdhci-of-dwcmshc-add-the-missing-de.patch
-+0068-UBUNTU-SAUCE-mmc-sdhci-of-dwcmshc-Add-runtime-PM-ope.patch
-+0069-UBUNTU-SAUCE-mlxbf_gige-add-ethtool-mlxbf_gige_set_r.patch
-+0070-UBUNTU-SAUCE-Fix-OOB-handling-RX-packets-in-heavy-tr.patch
-+0071-UBUNTU-SAUCE-mlxbf-gige-Fix-intermittent-no-ip-issue.patch
-+0072-mlxbf_gige-add-MDIO-support-for-BlueField-3.patch
-+0073-mlxbf_gige-support-10M-100M-1G-speeds-on-BlueField-3.patch
-+0074-mlxbf_gige-add-set_link_ksettings-ethtool-callback.patch
-+0075-UBUNTU-SAUCE-mlxbf-gige-Fix-kernel-panic-at-shutdown.patch
-+0076-UBUNTU-SAUCE-platform-mellanox-Updates-to-mlxbf-boot.patch
-+0077-UBUNTU-SAUCE-mlx-bootctl-support-icm-carveout-eeprom.patch
-+0078-UBUNTU-SAUCE-mlxbf-bootctl-support-SMC-call-for-sett.patch
-+0079-UBUNTU-SAUCE-mlxbf-ptm-power-and-thermal-management-.patch
-+0080-UBUNTU-SAUCE-mlxbf-ptm-update-license.patch
-+0081-UBUNTU-SAUCE-mlxbf-ptm-use-0444-instead-of-S_IRUGO.patch
-+0082-UBUNTU-SAUCE-mlxbf-ptm-add-atx-debugfs-nodes.patch
-+0083-UBUNTU-SAUCE-mlxbf-ptm-update-module-version.patch
-+0084-UBUNTU-SAUCE-mlxbf-bootctl-Fix-kernel-panic-due-to-b.patch
- 0085-hwmon-mlxreg-fan-Separate-methods-of-fan-setting-com.patch
-+8000-mlxsw-Use-weak-reverse-dependencies-for-firmware-fla.patch
- 8003-mlxsw-i2c-SONIC-ISSU-Prevent-transaction-execution-f.patch
-+8004-mlxsw-minimal-Downstream-Ignore-error-reading-SPAD-r.patch
- 8005-leds-leds-mlxreg-Downstream-Send-udev-event-from-led.patch
- 8006-i2c-mlxcpld-Downstream-WA-to-avoid-error-for-SMBUS-r.patch
- 8007-hwmon-mlxreg-fan-Downstream-Allow-fan-speed-setting-.patch
 
diff --git a/platform/mellanox/non-upstream-patches/patches/0042-hwmon-mlxreg-fan-Add-support-for-new-flavour-of-capa.patch b/platform/mellanox/non-upstream-patches/patches/0042-hwmon-mlxreg-fan-Add-support-for-new-flavour-of-capa.patch
deleted file mode 100644
index df8454321..000000000
--- a/platform/mellanox/non-upstream-patches/patches/0042-hwmon-mlxreg-fan-Add-support-for-new-flavour-of-capa.patch
+++ /dev/null
@@ -1,65 +0,0 @@
-From bb46d45ce13c8faf9c2ab57b945c3a3adc587918 Mon Sep 17 00:00:00 2001
-From: Vadim Pasternak <vadimp@nvidia.com>
-Date: Sun, 23 Jul 2023 06:26:09 +0000
-Subject: [PATCH backport 6.1.42 42/85] hwmon: (mlxreg-fan) Add support for new
- flavour of capability register
-
-FAN platform data is common across the various systems, while fan
-driver should be able to apply only the fan instances relevant
-to specific system.
-
-For example, platform data might contain descriptions for fan1,
-fan2, ..., fan{n}, while some systems equipped with all 'n' fans,
-others with less.
-Also, on some systems fan drawer can be equipped with several
-tachometers and on others only with one.
-
-For detection of the real number of equipped drawers and tachometers
-special capability registers are used.
-These registers used to indicate presence of drawers and tachometers
-through the bitmap.
-
-For some new big modular systems this register will provide presence
-data by counter.
-
-Use slot parameter to distinct whether capability register contains
-bitmask or counter.
-
-Signed-off-by: Vadim Pasternak <vadimp@nvidia.com>
----
- drivers/hwmon/mlxreg-fan.c | 12 ++++++++++--
- 1 file changed, 10 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/hwmon/mlxreg-fan.c b/drivers/hwmon/mlxreg-fan.c
-index 96017cc8da7e..dad94d2892b2 100644
---- a/drivers/hwmon/mlxreg-fan.c
-+++ b/drivers/hwmon/mlxreg-fan.c
-@@ -390,7 +390,7 @@ static int mlxreg_fan_connect_verify(struct mlxreg_fan *fan,
- 		return err;
- 	}
- 
--	return !!(regval & data->bit);
-+	return data->slot ? (data->slot <= regval ? 1 : 0) : !!(regval & data->bit);
- }
- 
- static int mlxreg_pwm_connect_verify(struct mlxreg_fan *fan,
-@@ -527,7 +527,15 @@ static int mlxreg_fan_config(struct mlxreg_fan *fan,
- 			return err;
- 		}
- 
--		drwr_avail = hweight32(regval);
-+		/*
-+		 * The number of drawers could be specified in registers by counters for newer
-+		 * systems, or by bitmasks for older systems. In case the data is provided by
-+		 * counter, it is indicated through 'version' field.
-+		 */
-+		if (pdata->version)
-+			drwr_avail = regval;
-+		else
-+			drwr_avail = hweight32(regval);
- 		if (!tacho_avail || !drwr_avail || tacho_avail < drwr_avail) {
- 			dev_err(fan->dev, "Configuration is invalid: drawers num %d tachos num %d\n",
- 				drwr_avail, tacho_avail);
--- 
-2.20.1
-
diff --git a/platform/mellanox/non-upstream-patches/patches/0044-leds-mlxreg-Add-support-for-new-flavour-of-capabilit.patch b/platform/mellanox/non-upstream-patches/patches/0044-leds-mlxreg-Add-support-for-new-flavour-of-capabilit.patch
deleted file mode 100644
index 225ef9b30..000000000
--- a/platform/mellanox/non-upstream-patches/patches/0044-leds-mlxreg-Add-support-for-new-flavour-of-capabilit.patch
+++ /dev/null
@@ -1,62 +0,0 @@
-From 46c4b0cdf2a3abe321e137bcb87e5639c39fd655 Mon Sep 17 00:00:00 2001
-From: Vadim Pasternak <vadimp@nvidia.com>
-Date: Thu, 20 Jul 2023 11:01:56 +0000
-Subject: [PATCH backport 6.1.42 44/85] leds: mlxreg: Add support for new
- flavour of capability register
-
-LED platform data is common across the various systems, while LED
-driver should be able to apply only the LED instances relevant
-to specific system.
-
-For example, platform data might contain descriptions for fan1,
-fan2, ..., fan{n} LEDs, while some systems equipped with all 'n' fan
-LEDs, others with less.
-
-For detection of the real number of equipped LEDs special capability
-register is used.
-This register used to indicate presence of LED through the bitmap.
-
-For some new big modular systems this register will provide presence
-data by counter.
-
-Use slot parameter to distinct whether capability register contains
-bitmask or counter.
-
-Signed-off-by: Vadim Pasternak <vadimp@nvidia.com>
----
- drivers/leds/leds-mlxreg.c | 12 +++++++++---
- 1 file changed, 9 insertions(+), 3 deletions(-)
-
-diff --git a/drivers/leds/leds-mlxreg.c b/drivers/leds/leds-mlxreg.c
-index b7855c93bd72..063a9cb50a2b 100644
---- a/drivers/leds/leds-mlxreg.c
-+++ b/drivers/leds/leds-mlxreg.c
-@@ -206,16 +206,22 @@ static int mlxreg_led_config(struct mlxreg_led_priv_data *priv)
- 				dev_err(&priv->pdev->dev, "Failed to query capability register\n");
- 				return err;
- 			}
--			if (!(regval & data->bit))
-+			/*
-+			 * If slot is specified - validate if slot is equipped on system.
-+			 * In case slot is specified in platform data, capability register
-+			 * comtains the counter of untits.
-+			 */
-+			if (data->slot && data->slot > regval)
-+				continue;
-+			else if (!(regval & data->bit))
- 				continue;
- 			/*
- 			 * Field "bit" can contain one capability bit in 0 byte
- 			 * and offset bit in 1-3 bytes. Clear capability bit and
--			 * keep only offset bit.
-+			 * contains the counter of units.
- 			 */
- 			data->bit &= MLXREG_LED_CAPABILITY_CLEAR;
- 		}
--
- 		led_cdev = &led_data->led_cdev;
- 		led_data->data_parent = priv;
- 		if (strstr(data->label, "red") ||
--- 
-2.20.1
-
diff --git a/platform/mellanox/non-upstream-patches/patches/0045-leds-mlxreg-Remove-code-for-amber-LED-colour.patch b/platform/mellanox/non-upstream-patches/patches/0045-leds-mlxreg-Remove-code-for-amber-LED-colour.patch
deleted file mode 100644
index a20c6183b..000000000
--- a/platform/mellanox/non-upstream-patches/patches/0045-leds-mlxreg-Remove-code-for-amber-LED-colour.patch
+++ /dev/null
@@ -1,47 +0,0 @@
-From af93d2527b5af3f2e53507c7e35bcd9c9bd521cb Mon Sep 17 00:00:00 2001
-From: Vadim Pasternak <vadimp@nvidia.com>
-Date: Thu, 20 Jul 2023 11:17:31 +0000
-Subject: [PATCH backport 6.1.42 45/85] leds: mlxreg: Remove code for amber LED
- colour
-
-Remove unused code for amber LED colour.
-
-In case system LED color is "green", "orange" or "amber" same code is
-to be used for colour setting.
-
-Signed-off-by: Vadim Pasternak <vadimp@nvidia.com>
----
- drivers/leds/leds-mlxreg.c | 8 ++------
- 1 file changed, 2 insertions(+), 6 deletions(-)
-
-diff --git a/drivers/leds/leds-mlxreg.c b/drivers/leds/leds-mlxreg.c
-index 063a9cb50a2b..215132f67c07 100644
---- a/drivers/leds/leds-mlxreg.c
-+++ b/drivers/leds/leds-mlxreg.c
-@@ -19,7 +19,6 @@
- #define MLXREG_LED_IS_OFF		0x00 /* Off */
- #define MLXREG_LED_RED_SOLID		0x05 /* Solid red */
- #define MLXREG_LED_GREEN_SOLID		0x0D /* Solid green */
--#define MLXREG_LED_AMBER_SOLID		0x09 /* Solid amber */
- #define MLXREG_LED_BLINK_3HZ		167 /* ~167 msec off/on - HW support */
- #define MLXREG_LED_BLINK_6HZ		83 /* ~83 msec off/on - HW support */
- #define MLXREG_LED_CAPABILITY_CLEAR	GENMASK(31, 8) /* Clear mask */
-@@ -224,13 +223,10 @@ static int mlxreg_led_config(struct mlxreg_led_priv_data *priv)
- 		}
- 		led_cdev = &led_data->led_cdev;
- 		led_data->data_parent = priv;
--		if (strstr(data->label, "red") ||
--		    strstr(data->label, "orange")) {
-+		if (strstr(data->label, "red") || strstr(data->label, "orange") ||
-+		    strstr(data->label, "amber")) {
- 			brightness = LED_OFF;
- 			led_data->base_color = MLXREG_LED_RED_SOLID;
--		} else if (strstr(data->label, "amber")) {
--			brightness = LED_OFF;
--			led_data->base_color = MLXREG_LED_AMBER_SOLID;
- 		} else {
- 			brightness = LED_OFF;
- 			led_data->base_color = MLXREG_LED_GREEN_SOLID;
--- 
-2.20.1
-
diff --git a/platform/mellanox/non-upstream-patches/patches/0046-Extend-driver-to-support-Infineon-Digital-Multi-phas.patch b/platform/mellanox/non-upstream-patches/patches/0046-Extend-driver-to-support-Infineon-Digital-Multi-phas.patch
deleted file mode 100644
index 7d242bac5..000000000
--- a/platform/mellanox/non-upstream-patches/patches/0046-Extend-driver-to-support-Infineon-Digital-Multi-phas.patch
+++ /dev/null
@@ -1,37 +0,0 @@
-From 276c9eae3cf83bb65c575b423c785d0ff37b6da0 Mon Sep 17 00:00:00 2001
-From: Vadim Pasternak <vadimp@nvidia.com>
-Date: Mon, 17 Jul 2023 15:40:08 +0000
-Subject: [PATCH backport 6.1.42 46/85] Extend driver to support Infineon
- Digital Multi-phase XDPE1A2G7 device.
-
-From telemetry perspective device is almost the same as XDPE15284, but
-does not support READ_EIN (86h) and READ_EOUT (87h) commands.
-
-Signed-off-by: Vadim Pasternak <vadimp@nvidia.com>
----
- drivers/hwmon/pmbus/xdpe152c4.c | 2 ++
- 1 file changed, 2 insertions(+)
-
-diff --git a/drivers/hwmon/pmbus/xdpe152c4.c b/drivers/hwmon/pmbus/xdpe152c4.c
-index b8a36ef73e45..1ef1141ba537 100644
---- a/drivers/hwmon/pmbus/xdpe152c4.c
-+++ b/drivers/hwmon/pmbus/xdpe152c4.c
-@@ -44,6 +44,7 @@ static int xdpe152_probe(struct i2c_client *client)
- }
- 
- static const struct i2c_device_id xdpe152_id[] = {
-+	{"xdpe1a2g7", 0},
- 	{"xdpe152c4", 0},
- 	{"xdpe15284", 0},
- 	{}
-@@ -52,6 +53,7 @@ static const struct i2c_device_id xdpe152_id[] = {
- MODULE_DEVICE_TABLE(i2c, xdpe152_id);
- 
- static const struct of_device_id __maybe_unused xdpe152_of_match[] = {
-+	{.compatible = "infineon,xdpe1a2g7"},
- 	{.compatible = "infineon,xdpe152c4"},
- 	{.compatible = "infineon,xdpe15284"},
- 	{}
--- 
-2.20.1
-
diff --git a/platform/mellanox/non-upstream-patches/patches/0047-dt-bindings-trivial-devices-Add-infineon-xdpe1a2g7.patch b/platform/mellanox/non-upstream-patches/patches/0047-dt-bindings-trivial-devices-Add-infineon-xdpe1a2g7.patch
deleted file mode 100644
index cafc9b58d..000000000
--- a/platform/mellanox/non-upstream-patches/patches/0047-dt-bindings-trivial-devices-Add-infineon-xdpe1a2g7.patch
+++ /dev/null
@@ -1,29 +0,0 @@
-From 62520e9d0ab641b36fb770477792073e6aad4d54 Mon Sep 17 00:00:00 2001
-From: Vadim Pasternak <vadimp@nvidia.com>
-Date: Mon, 17 Jul 2023 16:24:58 +0000
-Subject: [PATCH backport 6.1.42 47/85] dt-bindings: trivial-devices: Add
- infineon,xdpe1a2g7
-
-Add new Infineon Multi-phase Digital VR Controller xdpe1a2g7
-
-Signed-off-by: Vadim Pasternak <vadimp@nvidia.com>
----
- Documentation/devicetree/bindings/trivial-devices.yaml | 2 ++
- 1 file changed, 2 insertions(+)
-
-diff --git a/Documentation/devicetree/bindings/trivial-devices.yaml b/Documentation/devicetree/bindings/trivial-devices.yaml
-index 61746755c107..7637390dfe09 100644
---- a/Documentation/devicetree/bindings/trivial-devices.yaml
-+++ b/Documentation/devicetree/bindings/trivial-devices.yaml
-@@ -145,6 +145,8 @@ properties:
-           - infineon,tlv493d-a1b6
-             # Infineon Multi-phase Digital VR Controller xdpe11280
-           - infineon,xdpe11280
-+            # Infineon Multi-phase Digital VR Controller xdpe1a2g7
-+            - infineon,xdpe1a2g7
-             # Infineon Multi-phase Digital VR Controller xdpe12254
-           - infineon,xdpe12254
-             # Infineon Multi-phase Digital VR Controller xdpe12284
--- 
-2.20.1
-
diff --git a/platform/mellanox/non-upstream-patches/patches/0048-hwmon-pmbus-Add-support-for-MPS-Multi-phase-mp2891-c.patch b/platform/mellanox/non-upstream-patches/patches/0048-hwmon-pmbus-Add-support-for-MPS-Multi-phase-mp2891-c.patch
deleted file mode 100644
index 860a7d220..000000000
--- a/platform/mellanox/non-upstream-patches/patches/0048-hwmon-pmbus-Add-support-for-MPS-Multi-phase-mp2891-c.patch
+++ /dev/null
@@ -1,563 +0,0 @@
-From c8a04a4c79a9fb99215e93884ff76b89e9947275 Mon Sep 17 00:00:00 2001
-From: Vadim Pasternak <vadimp@nvidia.com>
-Date: Thu, 13 Jul 2023 06:16:53 +0000
-Subject: [PATCH backport 6.1.42 48/85] hwmon: (pmbus) Add support for MPS
- Multi-phase mp2891 controller
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Introduce driver for dual-loop, digital, multi-phase controller MP2891 from
-Monolithic Power Systems, Inc. (MPS) vendor.
-
-The MP2891 can work with MPS’s Intelli-PhaseTM products to complete the
-multi-phase voltage regulator (VR) solution with minimal external
-components.
-
-This device supports:
-- Two power rails.
-- Programmable Multi-Phase up to 16 Phases on rail 1, and a maximum of 8
-  phases on rail 2.
-
-Signed-off-by: Vadim Pasternak <vadimp@nvidia.com>
----
- Documentation/hwmon/mp2891.rst | 128 ++++++++++++
- drivers/hwmon/pmbus/Kconfig    |   9 +
- drivers/hwmon/pmbus/Makefile   |   1 +
- drivers/hwmon/pmbus/mp2891.c   | 357 +++++++++++++++++++++++++++++++++
- 4 files changed, 495 insertions(+)
- create mode 100644 Documentation/hwmon/mp2891.rst
- create mode 100644 drivers/hwmon/pmbus/mp2891.c
-
-diff --git a/Documentation/hwmon/mp2891.rst b/Documentation/hwmon/mp2891.rst
-new file mode 100644
-index 000000000000..c4bda3d7ee8a
---- /dev/null
-+++ b/Documentation/hwmon/mp2891.rst
-@@ -0,0 +1,128 @@
-+.. SPDX-License-Identifier: GPL-2.0
-+
-+Kernel driver mp2891
-+====================
-+
-+Supported chips:
-+
-+  * MPS MP2891
-+
-+    Prefix: 'mp2891'
-+
-+Author:
-+
-+	Vadim Pasternak <vadimp@nvidia.com>
-+
-+Description
-+-----------
-+
-+This driver implements support for Monolithic Power Systems, Inc. (MPS)
-+vendor dual-loop, digital, multi-phase controller MP2891.
-+The MP2891 can work with MPS’s Intelli-PhaseTM products to complete the
-+multi-phase voltage regulator (VR) solution with minimal external components.
-+
-+MP2891 is available in a QFN-56 (7mmx7mm) package.
-+
-+This device supports:
-+
-+- Two power rails.
-+- Programmable Multi-Phase up to 16 Phases on rail 1, and a maximum of 8 phases
-+  on rail 2.
-+- PWM-VID Interface.
-+- Two pages for telemetry.
-+- Programmable pins for PMBus Address.
-+- Ability to store and restore device configurations.
-+- 200kHz to 3MHz Switching Frequency.
-+- Automatic Loop Compensation.
-+- Couple Inductor Mode.
-+- Supports Multi-Configuration for 6 Different Applications.
-+- Flexible Pulse-Width Modulation (PWM) Assignment for 2 Rails.
-+- Automatic Phase-Shedding (APS) to Improve Overall Efficiency.
-+- Phase-to-Phase Active Current Balancing with Configurable Offsets for Thermal
-+  Balance.
-+- Digital Load-Line Regulation.
-+- Overclocking Mode by Adding Offset to VOUT.
-+
-+Device complaint with:
-+
-+- PMBus rev 1.3 interface.
-+
-+Device supports direct format for reading output current, output voltage,
-+input and output power and temperature.
-+Device supports linear format for reading input voltage and input power.
-+
-+The driver provides the next attributes for the current:
-+
-+- for current out input and maximum alarm;
-+- for phase current: input and label.
-+
-+The driver exports the following attributes via the 'sysfs' files, where:
-+
-+- 'n' is number of configured phases (from 1 to 10);
-+- index 1 for "iout";
-+- indexes 2 ... 1 + n for phases.
-+
-+**curr[1-{1+n}]_input**
-+
-+**curr[1-{1+n}]_label**
-+
-+**curr1_max**
-+
-+**curr1_max_alarm**
-+
-+The driver provides the next attributes for the voltage:
-+
-+- for voltage in: input, low and high critical thresholds, low and high
-+  critical alarms;
-+- for voltage out: input and high alarm;
-+
-+The driver exports the following attributes via the 'sysfs' files, where
-+
-+**in1_crit**
-+
-+**in1_crit_alarm**
-+
-+**in1_input**
-+
-+**in1_label**
-+
-+**in1_min**
-+
-+**in1_min_alarm**
-+
-+**in2_alarm**
-+
-+**in2_input**
-+
-+**in2_label**
-+
-+The driver provides the next attributes for the power:
-+
-+- for power in alarm and input.
-+- for power out: cap, cap alarm an input.
-+
-+The driver exports the following attributes via the 'sysfs' files, where
-+- indexes 1 for "pin";
-+- indexes 2 for "pout";
-+
-+**power1_alarm**
-+
-+**power1_input**
-+
-+**power1_label**
-+
-+**power2_input**
-+
-+**power2_label**
-+
-+**power2_max**
-+
-+**power2_max_alarm**
-+
-+The driver provides the next attributes for the temperature:
-+
-+**temp1_input**
-+
-+**temp1_max**
-+
-+**temp1_max_alarm**
-diff --git a/drivers/hwmon/pmbus/Kconfig b/drivers/hwmon/pmbus/Kconfig
-index 89668af67206..77d67344cee4 100644
---- a/drivers/hwmon/pmbus/Kconfig
-+++ b/drivers/hwmon/pmbus/Kconfig
-@@ -299,6 +299,15 @@ config SENSORS_MP2888
- 	  This driver can also be built as a module. If so, the module will
- 	  be called mp2888.
- 
-+config SENSORS_MP2891
-+	tristate "MPS MP2891"
-+	help
-+	 If you say yes here you get hardware monitoring support for MPS
-+	 MP2891 Dual Loop Digital Multi-Phase Controller.
-+
-+	 This driver can also be built as a module. If so, the module will
-+	 be called mp2891.
-+
- config SENSORS_MP2975
- 	tristate "MPS MP2975"
- 	help
-diff --git a/drivers/hwmon/pmbus/Makefile b/drivers/hwmon/pmbus/Makefile
-index 0002dbe22d52..8e767d7b8c5b 100644
---- a/drivers/hwmon/pmbus/Makefile
-+++ b/drivers/hwmon/pmbus/Makefile
-@@ -32,6 +32,7 @@ obj-$(CONFIG_SENSORS_MAX31785)	+= max31785.o
- obj-$(CONFIG_SENSORS_MAX34440)	+= max34440.o
- obj-$(CONFIG_SENSORS_MAX8688)	+= max8688.o
- obj-$(CONFIG_SENSORS_MP2888)	+= mp2888.o
-+obj-$(CONFIG_SENSORS_MP2891)	+= mp2891.o
- obj-$(CONFIG_SENSORS_MP2975)	+= mp2975.o
- obj-$(CONFIG_SENSORS_MP5023)	+= mp5023.o
- obj-$(CONFIG_SENSORS_PLI1209BC)	+= pli1209bc.o
-diff --git a/drivers/hwmon/pmbus/mp2891.c b/drivers/hwmon/pmbus/mp2891.c
-new file mode 100644
-index 000000000000..e9e82844ee2a
---- /dev/null
-+++ b/drivers/hwmon/pmbus/mp2891.c
-@@ -0,0 +1,357 @@
-+// SPDX-License-Identifier: GPL-2.0-or-later
-+/*
-+ * Hardware monitoring driver for MPS Multi-phase Digital VR Controllers(MP2891)
-+ *
-+ * Copyright (C) 2023 Nvidia
-+ */
-+
-+#include <linux/err.h>
-+#include <linux/i2c.h>
-+#include <linux/init.h>
-+#include <linux/kernel.h>
-+#include <linux/module.h>
-+#include "pmbus.h"
-+
-+/* Vendor specific registers. */
-+/*
-+ * MP2891_MFR_SVI3_IOUT_PRT:
-+ *	bits 15:5 - reserved zeros;
-+ *	bits 4:3 - set SVI3 Vout digital filter
-+ *	 b00: 5kHz
-+ *	 b01: 2kHz
-+ *	 b10: 1kHz
-+ *	 b11: no filter
-+ *	bits 2:0 - define output current scaling selection of rail1.
-+ *	 b000: 1 A/LSB
-+ *	 b001: (1/32) A/LSB
-+ *	 b010: (1/16) A/LSB
-+ *	 b011: (1/8) A/LSB
-+ *	 b100: (1/4) A/LSB
-+ *	 b101: (1/2) A/LSB
-+ *	 b110: 1 A/LSB
-+ *	 b111: 2 A/LSB
-+ */
-+#define MP2891_MFR_SVI3_IOUT_PRT	0x65
-+/*
-+ * MP2891_MFR_VOUT_LOOP_CTRL:
-+ * bits 15:14 define the VID step.
-+ *  b00: 6.25mV
-+ *  b01: 5mV
-+ *  b10: 2mV
-+ *  b11: 1mV
-+ * bit 13 enable bit of 2.5mV resolution.
-+ *  b0: disable
-+ *  b1: enable
-+ * bits 12:11 reserved zeros
-+ * bit 10 defines rail  remote sense amplifier gain:
-+ *  b0: 1
-+ *  b1: 0.5
-+ * bit 9 DC reference_select
-+ * b0: Comp EA uses Vfb and Vref
-+ * b1: Comp EA uses Vdiff and Vref
-+ * bit 8 enables DC loop calibration at DCM.
-+ *  b0: disable
-+ *  b1: enable
-+ * bit 7 enables DC loop calibration both at DCM and CCM operation.
-+ * b0: disable
-+ * b1: enable
-+ * bit 6 - holds DC loop when the PWM time interval meets PWM switching period condition
-+ *	   set with PMBus command MFR_VR_CONFIG1 (B7h), bit [3:2].
-+ *  b0: disable hold DC loop when PWM switching period condition meets
-+ *  b1: hold DC loop when PWM switching period condition meets
-+ * bit 5 hold DC loop when phase count is changed.
-+ *  b0: disable hold DC loop when phase number change
-+ *  b1: hold the DC loop when phase number change.
-+ * bit 4 hold DC loop regulation when a load transient event is detected.
-+ *  b0: disable hold DC loop when meets VFB+/- window condition
-+ *  b1: hold DC loop when meets VFB+/- window condition
-+ * bits 3:0 set the DC loop minimal holding time in direct format.
-+ */
-+#define MP2891_MFR_VOUT_LOOP_CTRL	0xbd
-+
-+#define MP2891_VID_STEP_POS		14
-+#define MP2891_VID_STEP_MASK		GENMASK(MP2891_VID_STEP_POS + 1, MP2891_VID_STEP_POS)
-+#define MP2891_DAC_2P5MV_MASK		BIT(13)
-+#define MP2891_IOUT_SCALE_MASK		GENMASK(2, 0)
-+
-+#define MP2891_PAGE_NUM			2
-+#define MP2891_RAIL1_FUNC		(PMBUS_HAVE_VIN | PMBUS_HAVE_VOUT | PMBUS_HAVE_IOUT | \
-+					 PMBUS_HAVE_TEMP | PMBUS_HAVE_POUT | PMBUS_HAVE_PIN | \
-+					 PMBUS_PHASE_VIRTUAL)
-+
-+#define MP2891_RAIL2_FUNC		(PMBUS_HAVE_VOUT | PMBUS_HAVE_IOUT | PMBUS_HAVE_TEMP | \
-+					 PMBUS_HAVE_POUT | PMBUS_PHASE_VIRTUAL)
-+
-+struct mp2891_data {
-+	struct pmbus_driver_info info;
-+	int vid_step[MP2891_PAGE_NUM];
-+	int iout_scale[MP2891_PAGE_NUM];
-+};
-+
-+#define to_mp2891_data(x) container_of(x, struct mp2891_data, info)
-+
-+static int mp2891_read_vout(struct i2c_client *client, int page, int phase, int reg)
-+{
-+	int ret;
-+
-+	const struct pmbus_driver_info *info = pmbus_get_driver_info(client);
-+	struct mp2891_data *data = to_mp2891_data(info);
-+
-+	ret = pmbus_read_word_data(client, page, phase, reg);
-+
-+	return ret < 0 ? ret : ret * data->vid_step[page] / 100;
-+}
-+
-+static int mp2891_read_iout(struct i2c_client *client, int page, int phase, int reg)
-+{
-+	int ret;
-+
-+	const struct pmbus_driver_info *info = pmbus_get_driver_info(client);
-+	struct mp2891_data *data = to_mp2891_data(info);
-+
-+	ret = pmbus_read_word_data(client, page, phase, reg);
-+
-+	return ret < 0 ? ret : ret * data->iout_scale[page];
-+}
-+
-+static int mp2891_read_byte_data(struct i2c_client *client, int page, int reg)
-+{
-+	int ret;
-+
-+	switch (reg) {
-+	case PMBUS_VOUT_MODE:
-+		/*
-+		 * Enforce VOUT direct format, since device allows to set the
-+		 * different formats for the different rails. Conversion from
-+		 * VID to direct provided by driver internally, in case it is
-+		 * necessary.
-+		 */
-+		ret = PB_VOUT_MODE_DIRECT;
-+		break;
-+	default:
-+		ret = -EINVAL;
-+		break;
-+	}
-+
-+	return ret;
-+}
-+
-+static int mp2891_read_word_data(struct i2c_client *client, int page, int phase, int reg)
-+{
-+	switch (reg) {
-+	case PMBUS_READ_VOUT:
-+		return mp2891_read_vout(client, page, phase, reg);
-+	case PMBUS_READ_IOUT:
-+		return mp2891_read_iout(client, page, phase, reg);
-+	case PMBUS_OT_WARN_LIMIT:
-+	case PMBUS_OT_FAULT_LIMIT:
-+	case PMBUS_UT_WARN_LIMIT:
-+	case PMBUS_UT_FAULT_LIMIT:
-+	case PMBUS_VOUT_OV_WARN_LIMIT:
-+	case PMBUS_VIN_OV_WARN_LIMIT:
-+	case PMBUS_POUT_MAX:
-+	case PMBUS_POUT_OP_FAULT_LIMIT:
-+	case PMBUS_MFR_VIN_MIN:
-+	case PMBUS_MFR_VOUT_MIN:
-+	case PMBUS_MFR_VIN_MAX:
-+	case PMBUS_MFR_VOUT_MAX:
-+	case PMBUS_MFR_IIN_MAX:
-+	case PMBUS_MFR_IOUT_MAX:
-+	case PMBUS_MFR_PIN_MAX:
-+	case PMBUS_MFR_POUT_MAX:
-+	case PMBUS_MFR_MAX_TEMP_1:
-+		return -ENXIO;
-+	default:
-+		return -EINVAL;
-+	}
-+}
-+
-+static int mp2891_identify_vid(struct i2c_client *client, struct mp2891_data *data, u32 reg,
-+			       int page)
-+{
-+	int ret;
-+
-+	ret = i2c_smbus_write_byte_data(client, PMBUS_PAGE, page);
-+	if (ret < 0)
-+		return ret;
-+
-+	ret = i2c_smbus_read_word_data(client, reg);
-+	if (ret < 0)
-+		return ret;
-+
-+	/*
-+	 * Obtain vid_step from MP2891_MFR_VOUT_LOOP_CTRL register:
-+	 * bit 13 = 1, the vid_step is below 2.5mV/LSB;
-+	 * bit 13 = 0, the vid_step is defined by bits 15:14:
-+	 * 00b - 6.25mV/LSB, 01b - 5mV/LSB, 10b - 2mV/LSB, 11b - 1mV
-+	 */
-+	if ((ret & MP2891_DAC_2P5MV_MASK) >> MP2891_VID_STEP_POS) {
-+		data->vid_step[page] = 250;
-+		return 0;
-+	}
-+
-+	switch ((ret & MP2891_VID_STEP_MASK) >> MP2891_VID_STEP_POS) {
-+	case 0:
-+		data->vid_step[page] = 625;
-+		break;
-+	case 1:
-+		data->vid_step[page] = 500;
-+			break;
-+	case 2:
-+		data->vid_step[page] = 200;
-+		break;
-+	default:
-+		data->vid_step[page] = 100;
-+		break;
-+	}
-+
-+	return 0;
-+}
-+
-+static int mp2891_identify_rails_vid(struct i2c_client *client, struct mp2891_data *data)
-+{
-+	int ret;
-+
-+	/* Identify vid_step for rail 1. */
-+	ret = mp2891_identify_vid(client, data, MP2891_MFR_VOUT_LOOP_CTRL, 0);
-+	if (ret < 0)
-+		return ret;
-+
-+	/* Identify vid_step for rail 2. */
-+	return mp2891_identify_vid(client, data, MP2891_MFR_VOUT_LOOP_CTRL, 1);
-+}
-+
-+static int
-+mp2891_iout_scale_get(struct i2c_client *client, struct mp2891_data *data, u32 reg, int page)
-+{
-+	int ret;
-+
-+	ret = i2c_smbus_write_byte_data(client, PMBUS_PAGE, page);
-+	if (ret < 0)
-+		return ret;
-+
-+	ret = i2c_smbus_read_word_data(client, reg);
-+	if (ret < 0)
-+		return ret;
-+
-+	/*
-+	 * Obtain iout_scale from the register MP2891_MFR_SVI3_IOUT_PRT, bits 2-0.
-+	 * The value is selected as below:
-+	 * 000b - 1A/LSB, 001b - (1/32)A/LSB, 010b - (1/16)A/LSB,
-+	 * 011b - (1/8)A/LSB, 100b - (1/4)A/LSB, 101b - (1/2)A/LSB
-+	 * 110b - 1A/LSB, 111b - 2A/LSB
-+	 */
-+	switch (ret & MP2891_IOUT_SCALE_MASK) {
-+	case 0:
-+	case 6:
-+		data->iout_scale[page] = 32;
-+		return 0;
-+	case 1:
-+		data->iout_scale[page] = 1;
-+		return 0;
-+	case 2:
-+		data->iout_scale[page] = 2;
-+		return 0;
-+	case 3:
-+		data->iout_scale[page] = 4;
-+		return 0;
-+	case 4:
-+		data->iout_scale[page] = 8;
-+		return 0;
-+	case 5:
-+		data->iout_scale[page] = 16;
-+		return 0;
-+	default:
-+		data->iout_scale[page] = 64;
-+		return 0;
-+	}
-+}
-+
-+static int mp2891_rails_iout_scale_get(struct i2c_client *client, struct mp2891_data *data)
-+{
-+	int ret;
-+
-+	/* Get iout_scale for rail 1. */
-+	ret = mp2891_iout_scale_get(client, data, MP2891_MFR_SVI3_IOUT_PRT, 0);
-+	/* Get iout_scale for rail 2. */
-+	return ret < 0 ? ret : mp2891_iout_scale_get(client, data, MP2891_MFR_SVI3_IOUT_PRT, 1);
-+}
-+
-+static struct pmbus_driver_info mp2891_info = {
-+	.pages = MP2891_PAGE_NUM,
-+	.format[PSC_VOLTAGE_IN] = direct,
-+	.format[PSC_VOLTAGE_OUT] = direct,
-+	.format[PSC_CURRENT_OUT] = direct,
-+	.format[PSC_TEMPERATURE] = direct,
-+	.format[PSC_POWER] = linear,
-+	.m[PSC_VOLTAGE_IN] = 1,
-+	.m[PSC_VOLTAGE_OUT] = 1,
-+	.m[PSC_CURRENT_OUT] = 32,
-+	.m[PSC_TEMPERATURE] = 1,
-+	.R[PSC_VOLTAGE_IN] = 3,
-+	.R[PSC_VOLTAGE_OUT] = 3,
-+	.R[PSC_CURRENT_OUT] = 0,
-+	.R[PSC_TEMPERATURE] = 0,
-+	.b[PSC_VOLTAGE_IN] = 0,
-+	.b[PSC_VOLTAGE_OUT] = 0,
-+	.b[PSC_CURRENT_OUT] = 0,
-+	.b[PSC_TEMPERATURE] = 0,
-+	.func[0] = MP2891_RAIL1_FUNC,
-+	.func[1] = MP2891_RAIL2_FUNC,
-+	.read_word_data = mp2891_read_word_data,
-+	.read_byte_data = mp2891_read_byte_data,
-+};
-+
-+static int mp2891_probe(struct i2c_client *client)
-+{
-+	struct pmbus_driver_info *info;
-+	struct mp2891_data *data;
-+	int ret;
-+
-+	data = devm_kzalloc(&client->dev, sizeof(struct mp2891_data), GFP_KERNEL);
-+
-+	if (!data)
-+		return -ENOMEM;
-+
-+	memcpy(&data->info, &mp2891_info, sizeof(*info));
-+	info = &data->info;
-+
-+	/* Identify VID setting per rail - obtain the vid_step of output voltage. */
-+	ret = mp2891_identify_rails_vid(client, data);
-+	if (ret < 0)
-+		return ret;
-+
-+	/* Get iout scale per rail - obtain current scale. */
-+	ret = mp2891_rails_iout_scale_get(client, data);
-+	if (ret < 0)
-+		return ret;
-+
-+	return pmbus_do_probe(client, info);
-+}
-+
-+static const struct i2c_device_id mp2891_id[] = {
-+	{"mp2891", 0},
-+	{}
-+};
-+MODULE_DEVICE_TABLE(i2c, mp2891_id);
-+
-+static const struct of_device_id __maybe_unused mp2891_of_match[] = {
-+	{.compatible = "mps,mp2891"},
-+	{}
-+};
-+MODULE_DEVICE_TABLE(of, mp2891_of_match);
-+
-+static struct i2c_driver mp2891_driver = {
-+	.driver = {
-+		.name = "mp2891",
-+		.of_match_table = mp2891_of_match,
-+	},
-+	.probe_new = mp2891_probe,
-+	.id_table = mp2891_id,
-+};
-+
-+module_i2c_driver(mp2891_driver);
-+
-+MODULE_DESCRIPTION("PMBus driver for MPS MP2891 device");
-+MODULE_LICENSE("GPL");
-+MODULE_IMPORT_NS(PMBUS);
--- 
-2.20.1
-
diff --git a/platform/mellanox/non-upstream-patches/patches/0049-dt-bindings-trivial-devices-Add-mps-mp2891.patch b/platform/mellanox/non-upstream-patches/patches/0049-dt-bindings-trivial-devices-Add-mps-mp2891.patch
deleted file mode 100644
index 9bf39cb2b..000000000
--- a/platform/mellanox/non-upstream-patches/patches/0049-dt-bindings-trivial-devices-Add-mps-mp2891.patch
+++ /dev/null
@@ -1,30 +0,0 @@
-From 98b6b44b7b190c664f41e482de4597571e700e7f Mon Sep 17 00:00:00 2001
-From: Vadim Pasternak <vadimp@nvidia.com>
-Date: Thu, 13 Jul 2023 06:20:05 +0000
-Subject: [PATCH backport 6.1.42 49/85] dt-bindings: trivial-devices: Add
- mps,mp2891
-
-Add new dual-loop, digital, multi-phase controller MP2891 fro
-Monolithic Power Systems, Inc. (MPS) to trivial devices.
-
-Signed-off-by: Vadim Pasternak <vadimp@nvidia.com>
----
- Documentation/devicetree/bindings/trivial-devices.yaml | 2 ++
- 1 file changed, 2 insertions(+)
-
-diff --git a/Documentation/devicetree/bindings/trivial-devices.yaml b/Documentation/devicetree/bindings/trivial-devices.yaml
-index 7637390dfe09..8e6c0bc60ee3 100644
---- a/Documentation/devicetree/bindings/trivial-devices.yaml
-+++ b/Documentation/devicetree/bindings/trivial-devices.yaml
-@@ -113,6 +113,8 @@ properties:
-           - fsl,mpl3115
-             # MPR121: Proximity Capacitive Touch Sensor Controller
-           - fsl,mpr121
-+            # Monolithic Power Systems Inc. multi-phase controller mp2891
-+          - mps,mp2891
-             # Monolithic Power Systems Inc. multi-phase controller mp2888
-           - mps,mp2888
-             # Monolithic Power Systems Inc. multi-phase controller mp2975
--- 
-2.20.1
-
diff --git a/platform/mellanox/non-upstream-patches/patches/0050-leds-mlxreg-Skip-setting-LED-color-during-initializa.patch b/platform/mellanox/non-upstream-patches/patches/0050-leds-mlxreg-Skip-setting-LED-color-during-initializa.patch
deleted file mode 100644
index 3118617ea..000000000
--- a/platform/mellanox/non-upstream-patches/patches/0050-leds-mlxreg-Skip-setting-LED-color-during-initializa.patch
+++ /dev/null
@@ -1,39 +0,0 @@
-From 519742b99a6a2d6b8d5797d70608fdc954d2871a Mon Sep 17 00:00:00 2001
-From: Vadim Pasternak <vadimp@nvidia.com>
-Date: Wed, 7 Jul 2021 10:18:14 +0000
-Subject: [PATCH backport 6.1.42 55/85] leds: mlxreg: Skip setting LED color
- during initialization
-
-Hardware controls LED through CPLD device and LED control ownership
-passes to the software after it performs the first write operation for
-any LED on a system.
-For example, hardware sets "system" LED "green blink" during boot and
-might change it to "red", in case something is went wrong from hardware
-point of view.
-The motivation for not setting LED during kernel initialization is for
-keeping hardware settings visible for user, until user will not decide
-to set LEDs according to user OS specific requirements.
-
-Signed-off-by: Vadim Pasternak <vadimp@nvidia.com>
-Reviewed-by: Michael Shych <michaelsh@nvidia.com>
----
- drivers/leds/leds-mlxreg.c | 3 ---
- 1 file changed, 3 deletions(-)
-
-diff --git a/drivers/leds/leds-mlxreg.c b/drivers/leds/leds-mlxreg.c
-index 215132f67c07..c0caf810b6d0 100644
---- a/drivers/leds/leds-mlxreg.c
-+++ b/drivers/leds/leds-mlxreg.c
-@@ -246,9 +246,6 @@ static int mlxreg_led_config(struct mlxreg_led_priv_data *priv)
- 		if (err)
- 			return err;
- 
--		if (led_cdev->brightness)
--			mlxreg_led_brightness_set(led_cdev,
--						  led_cdev->brightness);
- 		dev_info(led_cdev->dev, "label: %s, mask: 0x%02x, offset:0x%02x\n",
- 			 data->label, data->mask, data->reg);
- 	}
--- 
-2.20.1
-
diff --git a/platform/mellanox/non-upstream-patches/patches/0053-platform-mellanox-Add-support-for-dynamic-I2C-channe.patch b/platform/mellanox/non-upstream-patches/patches/0053-platform-mellanox-Add-support-for-dynamic-I2C-channe.patch
deleted file mode 100644
index f396cf234..000000000
--- a/platform/mellanox/non-upstream-patches/patches/0053-platform-mellanox-Add-support-for-dynamic-I2C-channe.patch
+++ /dev/null
@@ -1,159 +0,0 @@
-From 7831c5d10460c08cb5837827784677e0286d14e7 Mon Sep 17 00:00:00 2001
-From: Vadim Pasternak <vadimp@nvidia.com>
-Date: Sun, 30 Jul 2023 21:31:54 +0000
-Subject: [PATH backport v6.1 53/54] platform/mellanox: Add support for dynamic
- I2C channels infrastructure
-
-Allow to support platform configuration for dynamically allocated I2C
-channels.
-Motivation is to support I2C channels allocated in a non-continuous
-way.
-
-Currently hotplug platform driver data structure contains static mux
-channels for I2C hotplug devices. These channels numbers can be updated
-dynamically and returned by mux driver's callback through the adapters
-array.
-Thus, hotplug mux channels will be aligned according to the dynamic
-adapters data.
-
-Signed-off-by: Vadim Pasternak <vadimp@nvidia.com>
-Reviewed-by: Michael Shych <michaelsh@nvidia.com>
----
- drivers/platform/x86/mlx-platform.c | 69 ++++++++++++++++++++++++-----
- 1 file changed, 59 insertions(+), 10 deletions(-)
-
-diff --git a/drivers/platform/x86/mlx-platform.c b/drivers/platform/x86/mlx-platform.c
-index 44f107965832..9021597b5446 100644
---- a/drivers/platform/x86/mlx-platform.c
-+++ b/drivers/platform/x86/mlx-platform.c
-@@ -15,6 +15,7 @@
- #include <linux/pci.h>
- #include <linux/platform_device.h>
- #include <linux/platform_data/i2c-mux-reg.h>
-+#include <linux/platform_data/i2c-mux-regmap.h>
- #include <linux/platform_data/mlxreg.h>
- #include <linux/reboot.h>
- #include <linux/regmap.h>
-@@ -350,6 +351,7 @@
-  * @hotplug_resources: system hotplug resources
-  * @hotplug_resources_size: size of system hotplug resources
-  * @hi2c_main_init_status: init status of I2C main bus
-+ * @mux_added: number of added mux segments
-  * @irq_fpga: FPGA IRQ number
-  */
- struct mlxplat_priv {
-@@ -364,6 +366,7 @@ struct mlxplat_priv {
- 	struct resource *hotplug_resources;
- 	unsigned int hotplug_resources_size;
- 	u8 i2c_main_init_status;
-+	int mux_added;
- 	int irq_fpga;
- };
- 
-@@ -453,7 +456,9 @@ static struct i2c_mux_reg_platform_data mlxplat_default_mux_data[] = {
- /* Platform mux configuration variables */
- static int mlxplat_max_adap_num;
- static int mlxplat_mux_num;
-+static int mlxplat_mux_hotplug_num;
- static struct i2c_mux_reg_platform_data *mlxplat_mux_data;
-+static struct i2c_mux_regmap_platform_data *mlxplat_mux_regmap_data;
- static struct notifier_block *mlxplat_reboot_nb;
- 
- /* Platform extended mux data */
-@@ -6126,12 +6131,17 @@ static int mlxplat_mlxcpld_verify_bus_topology(int *nr)
- 	/* Shift adapter ids, since expected parent adapter is not free. */
- 	*nr = i;
- 	for (i = 0; i < mlxplat_mux_num; i++) {
--		shift = *nr - mlxplat_mux_data[i].parent;
--		mlxplat_mux_data[i].parent = *nr;
--		mlxplat_mux_data[i].base_nr += shift;
-+		if (mlxplat_mux_data) {
-+			shift = *nr - mlxplat_mux_data[i].parent;
-+			mlxplat_mux_data[i].parent = *nr;
-+			mlxplat_mux_data[i].base_nr += shift;
-+		} else if (mlxplat_mux_regmap_data) {
-+			mlxplat_mux_regmap_data[i].parent = *nr;
-+		}
- 	}
- 
--	if (shift > 0)
-+	/* Shift bus only if mux provided by 'mlxplat_mux_data'. */
-+	if (shift > 0 && mlxplat_mux_data)
- 		mlxplat_hotplug->shift_nr = shift;
- 
- 	return 0;
-@@ -6428,8 +6438,31 @@ mlxplat_i2c_mux_complition_notify(void *handle, struct i2c_adapter *parent,
- 				  struct i2c_adapter *adapters[])
- {
- 	struct mlxplat_priv *priv = handle;
-+	struct mlxreg_core_item *item;
-+	int i, j;
-+
-+	/*
-+	 * Hotplug platform driver data structure contains static mux channels for I2C hotplug
-+	 * devices. These channels numbers can be updated dynamically and returned by mux callback
-+	 * through the adapters array. Update mux channels according to the dynamic adapters data.
-+	 */
-+	if (priv->mux_added == mlxplat_mux_hotplug_num) {
-+		item = mlxplat_hotplug->items;
-+		for (i = 0; i < mlxplat_hotplug->counter; i++, item++) {
-+			struct mlxreg_core_data *data = item->data;
-+
-+			for (j = 0; j < item->count; j++, data++) {
-+				if (data->hpdev.nr != MLXPLAT_CPLD_NR_NONE)
-+					data->hpdev.nr = adapters[data->hpdev.nr - 2]->nr;
-+			}
-+		}
-+	}
- 
--	return mlxplat_post_init(priv);
-+	/* Start post initialization only after last nux segment is added */
-+	if (++priv->mux_added == mlxplat_mux_num)
-+		return mlxplat_post_init(priv);
-+
-+	return 0;
- }
- 
- static int mlxplat_i2c_mux_topology_init(struct mlxplat_priv *priv)
-@@ -6443,17 +6476,33 @@ static int mlxplat_i2c_mux_topology_init(struct mlxplat_priv *priv)
- 
- 	priv->i2c_main_init_status = MLXPLAT_I2C_MAIN_BUS_HANDLE_CREATED;
- 	for (i = 0; i < mlxplat_mux_num; i++) {
--		priv->pdev_mux[i] = platform_device_register_resndata(&priv->pdev_i2c->dev,
--								      "i2c-mux-reg", i, NULL, 0,
--								      &mlxplat_mux_data[i],
--								      sizeof(mlxplat_mux_data[i]));
-+		if (mlxplat_mux_data) {
-+			priv->pdev_mux[i] =
-+				platform_device_register_resndata(&priv->pdev_i2c->dev,
-+								  "i2c-mux-reg", i, NULL, 0,
-+								  &mlxplat_mux_data[i],
-+								  sizeof(mlxplat_mux_data[i]));
-+		} else {
-+			mlxplat_mux_regmap_data[i].handle = priv;
-+			mlxplat_mux_regmap_data[i].regmap = priv->regmap;
-+			mlxplat_mux_regmap_data[i].completion_notify =
-+								mlxplat_i2c_mux_complition_notify;
-+			priv->pdev_mux[i] =
-+			platform_device_register_resndata(&priv->pdev_i2c->dev,
-+							  "i2c-mux-regmap", i, NULL, 0,
-+							   &mlxplat_mux_regmap_data[i],
-+							   sizeof(mlxplat_mux_regmap_data[i]));
-+		}
- 		if (IS_ERR(priv->pdev_mux[i])) {
- 			err = PTR_ERR(priv->pdev_mux[i]);
- 			goto fail_platform_mux_register;
- 		}
- 	}
- 
--	return mlxplat_i2c_mux_complition_notify(priv, NULL, NULL);
-+	if (mlxplat_mux_regmap_data && mlxplat_mux_regmap_data->completion_notify)
-+		return 0;
-+
-+	return mlxplat_post_init(priv);
- 
- fail_platform_mux_register:
- 	while (--i >= 0)
--- 
-2.20.1
-
diff --git a/platform/mellanox/non-upstream-patches/patches/0054-platform-mellanox-Introduce-support-for-switches-equ.patch b/platform/mellanox/non-upstream-patches/patches/0054-platform-mellanox-Introduce-support-for-switches-equ.patch
deleted file mode 100644
index f1c90d620..000000000
--- a/platform/mellanox/non-upstream-patches/patches/0054-platform-mellanox-Introduce-support-for-switches-equ.patch
+++ /dev/null
@@ -1,312 +0,0 @@
-From 3e4ff8f2195a3dc7b04bb5a1b9fd6b655f78a75e Mon Sep 17 00:00:00 2001
-From: Vadim Pasternak <vadimp@nvidia.com>
-Date: Mon, 24 Jul 2023 11:10:50 +0000
-Subject: [PATH backport v6.1 54/54] platform: mellanox: Introduce support for
- switches equipped with new FPGA device
-
-Add support for Nvidia MQM97xx and MSN47xx family switches equipped with
-new FPGA device.
-
-These switches are based on previous generation of MQM97xx and MSN47xx
-switches, but COMe module uses new FPGA device.
-
-Platform configuration for new switches is based on the new VMOD0016
-class. Configuration is extended to support new register map with
-callbacks supporting indirect addressing for PCIe-to-LPC bridge.
-This bridge provides interface between FPGA at COMe board (directly
-connected to CPU PCIe root complex) to CPLDs on switch board (which
-cannot be connected directly to PCIe root complex).
-
-Signed-off-by: Vadim Pasternak <vadimp@nvidia.com>
-Reviewed-by: Michael Shych <michaelsh@nvidia.com>
----
- drivers/platform/x86/mlx-platform.c | 196 ++++++++++++++++++++++++++++
- 1 file changed, 196 insertions(+)
-
-diff --git a/drivers/platform/x86/mlx-platform.c b/drivers/platform/x86/mlx-platform.c
-index 9021597b5446..46958810e972 100644
---- a/drivers/platform/x86/mlx-platform.c
-+++ b/drivers/platform/x86/mlx-platform.c
-@@ -183,6 +183,9 @@
- #define MLXPLAT_CPLD_LPC_REG_CONFIG1_OFFSET	0xfb
- #define MLXPLAT_CPLD_LPC_REG_CONFIG2_OFFSET	0xfc
- #define MLXPLAT_CPLD_LPC_REG_CONFIG3_OFFSET	0xfd
-+#define MLXPLAT_CPLD_LPC_REG_EXT_MIN_OFFSET	0x100
-+#define MLXPLAT_CPLD_LPC_REG_EXT_MID_OFFSET	0x195
-+#define MLXPLAT_CPLD_LPC_REG_EXT_MAX_OFFSET	0x1ff
- #define MLXPLAT_CPLD_LPC_IO_RANGE		0x100
- 
- #define MLXPLAT_CPLD_LPC_PIO_OFFSET		0x10000UL
-@@ -277,6 +280,7 @@
- /* Maximum number of possible physical buses equipped on system */
- #define MLXPLAT_CPLD_MAX_PHYS_ADAPTER_NUM	16
- #define MLXPLAT_CPLD_MAX_PHYS_EXT_ADAPTER_NUM	24
-+#define MLXPLAT_CPLD_DEFAULT_MUX_HOTPLUG_VECTOR	0
- 
- /* Number of channels in group */
- #define MLXPLAT_CPLD_GRP_CHNL_NUM		8
-@@ -338,6 +342,21 @@
- #define PCI_DEVICE_ID_LATTICE_I2C_BRIDGE	0x9c2f
- #define PCI_DEVICE_ID_LATTICE_JTAG_BRIDGE	0x9c30
- #define PCI_DEVICE_ID_LATTICE_LPC_BRIDGE	0x9c32
-+#define MLXPLAT_FPGA_PCI_BAR0_SIZE		0x4000
-+#define MLXPLAT_FPGA_PCI_BASE_OFFSET		0x00000000
-+#define MLXPLAT_FPGA_PCI_MSB_ADDR		0x25
-+#define MLXPLAT_FPGA_PCI_MSB_EXT_ADDR		0x20
-+#define MLXPLAT_FPGA_PCI_LSB_ADDR_OFFSET	MLXPLAT_FPGA_PCI_BASE_OFFSET
-+#define MLXPLAT_FPGA_PCI_MSB_ADDR_OFFSET	(MLXPLAT_FPGA_PCI_BASE_OFFSET + 0x01)
-+#define MLXPLAT_FPGA_PCI_DATA_OUT_OFFSET	(MLXPLAT_FPGA_PCI_BASE_OFFSET + 0x02)
-+#define MLXPLAT_FPGA_PCI_DATA_IN_OFFSET		(MLXPLAT_FPGA_PCI_BASE_OFFSET + 0x03)
-+#define MLXPLAT_FPGA_PCI_CTRL_OFFSET		(MLXPLAT_FPGA_PCI_BASE_OFFSET + 0x04)
-+#define MLXPLAT_FPGA_PCI_STAT_OFFSET		(MLXPLAT_FPGA_PCI_BASE_OFFSET + 0x05)
-+
-+#define MLXPLAT_FPGA_PCI_CTRL_READ	BIT(0)
-+#define MLXPLAT_FPGA_PCI_CTRL_WRITE	BIT(1)
-+#define MLXPLAT_FPGA_PCI_COMPLETED	GENMASK(1, 0)
-+#define MLXPLAT_FPGA_PCI_TO		50 /* usec */
- 
- /* mlxplat_priv - platform private data
-  * @pdev_i2c - i2c controller platform device
-@@ -453,6 +472,28 @@ static struct i2c_mux_reg_platform_data mlxplat_default_mux_data[] = {
- 
- };
- 
-+/* Default channels vector for regmap mux. */
-+static int mlxplat_default_regmap_mux_chan[] = { 1, 2, 3, 4, 5, 6, 7, 8 };
-+
-+/* Platform regmap mux data */
-+static struct i2c_mux_regmap_platform_data mlxplat_default_regmap_mux_data[] = {
-+	{
-+		.parent = 1,
-+		.chan_ids = mlxplat_default_regmap_mux_chan,
-+		.num_adaps = ARRAY_SIZE(mlxplat_default_regmap_mux_chan),
-+		.sel_reg_addr = MLXPLAT_CPLD_LPC_REG_I2C_CH1_OFFSET,
-+		.reg_size = 1,
-+	},
-+	{
-+		.parent = 1,
-+		.chan_ids = mlxplat_default_regmap_mux_chan,
-+		.num_adaps = ARRAY_SIZE(mlxplat_default_regmap_mux_chan),
-+		.sel_reg_addr = MLXPLAT_CPLD_LPC_REG_I2C_CH2_OFFSET,
-+		.reg_size = 1,
-+	},
-+
-+};
-+
- /* Platform mux configuration variables */
- static int mlxplat_max_adap_num;
- static int mlxplat_mux_num;
-@@ -3540,6 +3581,12 @@ static struct mlxreg_core_data mlxplat_mlxcpld_default_ng_regs_io_data[] = {
- 		.mask = GENMASK(7, 0) & ~BIT(2),
- 		.mode = 0200,
- 	},
-+	{
-+		.label = "kexec_activated",
-+		.reg = MLXPLAT_CPLD_LPC_REG_RESET_GP2_OFFSET,
-+		.mask = GENMASK(7, 0) & ~BIT(1),
-+		.mode = 0644,
-+	},
- 	{
- 		.label = "erot1_reset",
- 		.reg = MLXPLAT_CPLD_LPC_REG_RESET_GP2_OFFSET,
-@@ -5065,6 +5112,7 @@ static bool mlxplat_mlxcpld_writeable_reg(struct device *dev, unsigned int reg)
- 	case MLXPLAT_CPLD_LPC_REG_PWM3_OFFSET:
- 	case MLXPLAT_CPLD_LPC_REG_PWM4_OFFSET:
- 	case MLXPLAT_CPLD_LPC_REG_PWM_CONTROL_OFFSET:
-+	case MLXPLAT_CPLD_LPC_REG_EXT_MIN_OFFSET ... MLXPLAT_CPLD_LPC_REG_EXT_MAX_OFFSET:
- 		return true;
- 	}
- 	return false;
-@@ -5230,6 +5278,7 @@ static bool mlxplat_mlxcpld_readable_reg(struct device *dev, unsigned int reg)
- 	case MLXPLAT_CPLD_LPC_REG_CONFIG2_OFFSET:
- 	case MLXPLAT_CPLD_LPC_REG_CONFIG3_OFFSET:
- 	case MLXPLAT_CPLD_LPC_REG_UFM_VERSION_OFFSET:
-+	case MLXPLAT_CPLD_LPC_REG_EXT_MIN_OFFSET ... MLXPLAT_CPLD_LPC_REG_EXT_MAX_OFFSET:
- 		return true;
- 	}
- 	return false;
-@@ -5387,6 +5436,7 @@ static bool mlxplat_mlxcpld_volatile_reg(struct device *dev, unsigned int reg)
- 	case MLXPLAT_CPLD_LPC_REG_CONFIG2_OFFSET:
- 	case MLXPLAT_CPLD_LPC_REG_CONFIG3_OFFSET:
- 	case MLXPLAT_CPLD_LPC_REG_UFM_VERSION_OFFSET:
-+	case MLXPLAT_CPLD_LPC_REG_EXT_MIN_OFFSET ... MLXPLAT_CPLD_LPC_REG_EXT_MAX_OFFSET:
- 		return true;
- 	}
- 	return false;
-@@ -5417,6 +5467,14 @@ static const struct reg_default mlxplat_mlxcpld_regmap_ng400[] = {
- 	{ MLXPLAT_CPLD_LPC_REG_WD3_ACT_OFFSET, 0x00 },
- };
- 
-+static const struct reg_default mlxplat_mlxcpld_regmap_bf3[] = {
-+	{ MLXPLAT_CPLD_LPC_REG_GP2_OFFSET, 0xc1 },
-+	{ MLXPLAT_CPLD_LPC_REG_PWM_CONTROL_OFFSET, 0x00 },
-+	{ MLXPLAT_CPLD_LPC_REG_WD1_ACT_OFFSET, 0x00 },
-+	{ MLXPLAT_CPLD_LPC_REG_WD2_ACT_OFFSET, 0x00 },
-+	{ MLXPLAT_CPLD_LPC_REG_WD3_ACT_OFFSET, 0x00 },
-+};
-+
- static const struct reg_default mlxplat_mlxcpld_regmap_rack_switch[] = {
- 	{ MLXPLAT_CPLD_LPC_REG_PWM_CONTROL_OFFSET, MLXPLAT_REGMAP_NVSWITCH_PWM_DEFAULT },
- 	{ MLXPLAT_CPLD_LPC_REG_WD1_ACT_OFFSET, 0x00 },
-@@ -5545,6 +5603,114 @@ static const struct regmap_config mlxplat_mlxcpld_regmap_config_eth_modular = {
- 	.reg_write = mlxplat_mlxcpld_reg_write,
- };
- 
-+/* Wait completion routine for indirect access for register map */
-+static int mlxplat_fpga_completion_wait(struct mlxplat_mlxcpld_regmap_context *ctx)
-+{
-+	unsigned long end;
-+	u8 status;
-+
-+	end = jiffies + msecs_to_jiffies(MLXPLAT_FPGA_PCI_TO);
-+	do {
-+		status = ioread8(ctx->base + MLXPLAT_FPGA_PCI_STAT_OFFSET);
-+		if (!(status & MLXPLAT_FPGA_PCI_COMPLETED))
-+			return 0;
-+		cond_resched();
-+	} while (time_before(jiffies, end));
-+
-+	return -EIO;
-+}
-+
-+/* Read callback for indirect register map access */
-+static int mlxplat_fpga_reg_read(void *context, unsigned int reg, unsigned int *val)
-+{
-+	struct mlxplat_mlxcpld_regmap_context *ctx = context;
-+	unsigned int msb_off = MLXPLAT_FPGA_PCI_MSB_ADDR;
-+	int err;
-+
-+	if (reg >= MLXPLAT_CPLD_LPC_REG_EXT_MIN_OFFSET) {
-+		if (reg <= MLXPLAT_CPLD_LPC_REG_EXT_MID_OFFSET) {
-+			/* Access to 2-nd FPGA bank */
-+			*val = ioread8(i2c_bridge_addr + reg -
-+				       MLXPLAT_CPLD_LPC_REG_EXT_MIN_OFFSET);
-+			return 0;
-+		}
-+		/* Access to 3-rd FPGA bank */
-+		reg -= MLXPLAT_CPLD_LPC_REG_EXT_MIN_OFFSET;
-+		msb_off = MLXPLAT_FPGA_PCI_MSB_EXT_ADDR;
-+	}
-+
-+	/* Verify there is no pending transactions */
-+	err = mlxplat_fpga_completion_wait(ctx);
-+	if (err)
-+		return err;
-+
-+	/* Set address in register space */
-+	iowrite8(msb_off, ctx->base + MLXPLAT_FPGA_PCI_MSB_ADDR_OFFSET);
-+	iowrite8(reg, ctx->base + MLXPLAT_FPGA_PCI_LSB_ADDR_OFFSET);
-+	/* Activate read operation */
-+	iowrite8(MLXPLAT_FPGA_PCI_CTRL_READ, ctx->base + MLXPLAT_FPGA_PCI_CTRL_OFFSET);
-+	/* Verify transaction completion */
-+	err = mlxplat_fpga_completion_wait(ctx);
-+	if (err)
-+		return err;
-+
-+	/* Read data */
-+	*val = ioread8(ctx->base + MLXPLAT_FPGA_PCI_DATA_IN_OFFSET);
-+
-+	return 0;
-+}
-+
-+/* Write callback for indirect register map access */
-+static int mlxplat_fpga_reg_write(void *context, unsigned int reg, unsigned int val)
-+{
-+	struct mlxplat_mlxcpld_regmap_context *ctx = context;
-+	unsigned int msb_off = MLXPLAT_FPGA_PCI_MSB_ADDR;
-+	int err;
-+
-+	if (reg >= MLXPLAT_CPLD_LPC_REG_EXT_MIN_OFFSET) {
-+		if (reg <= MLXPLAT_CPLD_LPC_REG_EXT_MID_OFFSET) {
-+			/* Access to 2-nd FPGA bank */
-+			iowrite8(val, i2c_bridge_addr + reg - MLXPLAT_CPLD_LPC_REG_EXT_MIN_OFFSET);
-+			/* Flush modification */
-+			wmb();
-+			return 0;
-+		}
-+
-+		/* Access to 3-rd FPGA bank */
-+		reg -= MLXPLAT_CPLD_LPC_REG_EXT_MIN_OFFSET;
-+		msb_off = MLXPLAT_FPGA_PCI_MSB_EXT_ADDR;
-+	}
-+
-+	/* Verify there is no pending transactions */
-+	err = mlxplat_fpga_completion_wait(ctx);
-+	if (err)
-+		return err;
-+
-+	/* Set address in register space */
-+	iowrite8(msb_off, ctx->base + MLXPLAT_FPGA_PCI_MSB_ADDR_OFFSET);
-+	iowrite8(reg, ctx->base + MLXPLAT_FPGA_PCI_LSB_ADDR_OFFSET);
-+	/* Set data to be written */
-+	iowrite8(val, ctx->base + MLXPLAT_FPGA_PCI_DATA_OUT_OFFSET);
-+	/* Activate write operation */
-+	iowrite8(MLXPLAT_FPGA_PCI_CTRL_WRITE, ctx->base + MLXPLAT_FPGA_PCI_CTRL_OFFSET);
-+
-+	return mlxplat_fpga_completion_wait(ctx);
-+}
-+
-+static const struct regmap_config mlxplat_fpga_regmap_config_bf3_comex_default = {
-+	.reg_bits = 9,
-+	.val_bits = 8,
-+	.max_register = 511,
-+	.cache_type = REGCACHE_FLAT,
-+	.writeable_reg = mlxplat_mlxcpld_writeable_reg,
-+	.readable_reg = mlxplat_mlxcpld_readable_reg,
-+	.volatile_reg = mlxplat_mlxcpld_volatile_reg,
-+	.reg_defaults = mlxplat_mlxcpld_regmap_bf3,
-+	.num_reg_defaults = ARRAY_SIZE(mlxplat_mlxcpld_regmap_bf3),
-+	.reg_read = mlxplat_fpga_reg_read,
-+	.reg_write = mlxplat_fpga_reg_write,
-+};
-+
- static struct resource mlxplat_mlxcpld_resources[] = {
- 	[0] = DEFINE_RES_IRQ_NAMED(MLXPLAT_CPLD_LPC_SYSIRQ, "mlxreg-hotplug"),
- };
-@@ -5927,6 +6093,30 @@ static int __init mlxplat_dmi_l1_switch_matched(const struct dmi_system_id *dmi)
- 	return mlxplat_register_platform_device();
- }
- 
-+static int __init mlxplat_dmi_bf3_comex_default_matched(const struct dmi_system_id *dmi)
-+{
-+	int i;
-+
-+	mlxplat_max_adap_num = MLXPLAT_CPLD_MAX_PHYS_ADAPTER_NUM;
-+	mlxplat_mux_hotplug_num = MLXPLAT_CPLD_DEFAULT_MUX_HOTPLUG_VECTOR;
-+	mlxplat_mux_num = ARRAY_SIZE(mlxplat_default_regmap_mux_data);
-+	mlxplat_mux_regmap_data = mlxplat_default_regmap_mux_data;
-+	mlxplat_hotplug = &mlxplat_mlxcpld_ext_data;
-+	mlxplat_hotplug->deferred_nr =
-+		mlxplat_msn21xx_channels[MLXPLAT_CPLD_GRP_CHNL_NUM - 1];
-+	mlxplat_led = &mlxplat_default_ng_led_data;
-+	mlxplat_regs_io = &mlxplat_default_ng_regs_io_data;
-+	mlxplat_fan = &mlxplat_default_fan_data;
-+	for (i = 0; i < ARRAY_SIZE(mlxplat_mlxcpld_wd_set_type2); i++)
-+		mlxplat_wd_data[i] = &mlxplat_mlxcpld_wd_set_type2[i];
-+	mlxplat_i2c = &mlxplat_mlxcpld_i2c_ng_data;
-+	mlxplat_regmap_config = &mlxplat_fpga_regmap_config_bf3_comex_default;
-+	mlxplat_reboot_nb = &mlxplat_reboot_default_nb;
-+	pm_power_off = mlxplat_poweroff;
-+
-+	return 1;
-+}
-+
- static const struct dmi_system_id mlxplat_dmi_table[] __initconst = {
- 	{
- 		.callback = mlxplat_dmi_default_wc_matched,
-@@ -6015,6 +6205,12 @@ static const struct dmi_system_id mlxplat_dmi_table[] __initconst = {
- 			DMI_MATCH(DMI_BOARD_NAME, "VMOD0015"),
- 		},
- 	},
-+	{
-+		.callback = mlxplat_dmi_bf3_comex_default_matched,
-+		.matches = {
-+			DMI_MATCH(DMI_BOARD_NAME, "VMOD0016"),
-+		},
-+	},
- 	{
- 		.callback = mlxplat_dmi_l1_switch_matched,
- 		.matches = {
--- 
-2.20.1
-
diff --git a/platform/mellanox/non-upstream-patches/patches/0055-mellanox-Relocate-mlx-platform-driver.patch b/platform/mellanox/non-upstream-patches/patches/0055-mellanox-Relocate-mlx-platform-driver.patch
deleted file mode 100644
index 3b5f6b940..000000000
--- a/platform/mellanox/non-upstream-patches/patches/0055-mellanox-Relocate-mlx-platform-driver.patch
+++ /dev/null
@@ -1,98 +0,0 @@
-From a4eca7c60f361575fb15bcab6fdcd39c795c8244 Mon Sep 17 00:00:00 2001
-From: Vadim Pasternak <vadimp@nvidia.com>
-Date: Mon, 24 Jul 2023 11:52:56 +0000
-Subject: [PATCH backport 6.1.42 58/85] mellanox: Relocate mlx-platform driver
-
-Move 'mlx-platform' driver 'x86' to 'mellanox' folder.
-
-Motivation to allow running it on systems with ARM architecture.
-
-Signed-off-by: Vadim Pasternak <vadimp@nvidia.com>
-Reviewed-by: Michael Shych <michaelsh@nvidia.com>
----
- drivers/platform/mellanox/Kconfig                 | 12 ++++++++++++
- drivers/platform/mellanox/Makefile                |  1 +
- drivers/platform/{x86 => mellanox}/mlx-platform.c |  0
- drivers/platform/x86/Kconfig                      | 13 -------------
- drivers/platform/x86/Makefile                     |  1 -
- 5 files changed, 13 insertions(+), 14 deletions(-)
- rename drivers/platform/{x86 => mellanox}/mlx-platform.c (100%)
-
-diff --git a/drivers/platform/mellanox/Kconfig b/drivers/platform/mellanox/Kconfig
-index 382793e73a60..70b628834b4f 100644
---- a/drivers/platform/mellanox/Kconfig
-+++ b/drivers/platform/mellanox/Kconfig
-@@ -14,6 +14,18 @@ menuconfig MELLANOX_PLATFORM
- 
- if MELLANOX_PLATFORM
- 
-+config MLX_PLATFORM
-+	tristate "Mellanox Technologies platform support"
-+	depends on I2C && REGMAP
-+	help
-+	  This option enables system support for the Mellanox Technologies
-+	  platform. The Mellanox systems provide data center networking
-+	  solutions based on Virtual Protocol Interconnect (VPI) technology
-+	  enable seamless connectivity to 56/100Gb/s InfiniBand or 10/40/56GbE
-+	  connection.
-+
-+	  If you have a Mellanox system, say Y or M here.
-+
- config MLXREG_HOTPLUG
- 	tristate "Mellanox platform hotplug driver support"
- 	depends on HWMON
-diff --git a/drivers/platform/mellanox/Makefile b/drivers/platform/mellanox/Makefile
-index 04703c0416b1..ba56485cbe8c 100644
---- a/drivers/platform/mellanox/Makefile
-+++ b/drivers/platform/mellanox/Makefile
-@@ -3,6 +3,7 @@
- # Makefile for linux/drivers/platform/mellanox
- # Mellanox Platform-Specific Drivers
- #
-+obj-$(CONFIG_MLX_PLATFORM)	+= mlx-platform.o
- obj-$(CONFIG_MLXBF_BOOTCTL)	+= mlxbf-bootctl.o
- obj-$(CONFIG_MLXBF_PMC)		+= mlxbf-pmc.o
- obj-$(CONFIG_MLXBF_TMFIFO)	+= mlxbf-tmfifo.o
-diff --git a/drivers/platform/x86/mlx-platform.c b/drivers/platform/mellanox/mlx-platform.c
-similarity index 100%
-rename from drivers/platform/x86/mlx-platform.c
-rename to drivers/platform/mellanox/mlx-platform.c
-diff --git a/drivers/platform/x86/Kconfig b/drivers/platform/x86/Kconfig
-index 1396a839dd8a..f11136bbf88d 100644
---- a/drivers/platform/x86/Kconfig
-+++ b/drivers/platform/x86/Kconfig
-@@ -954,19 +954,6 @@ config SERIAL_MULTI_INSTANTIATE
- 	  To compile this driver as a module, choose M here: the module
- 	  will be called serial-multi-instantiate.
- 
--config MLX_PLATFORM
--	tristate "Mellanox Technologies platform support"
--	depends on I2C
--	select REGMAP
--	help
--	  This option enables system support for the Mellanox Technologies
--	  platform. The Mellanox systems provide data center networking
--	  solutions based on Virtual Protocol Interconnect (VPI) technology
--	  enable seamless connectivity to 56/100Gb/s InfiniBand or 10/40/56GbE
--	  connection.
--
--	  If you have a Mellanox system, say Y or M here.
--
- config TOUCHSCREEN_DMI
- 	bool "DMI based touchscreen configuration info"
- 	depends on ACPI && DMI && I2C=y && TOUCHSCREEN_SILEAD
-diff --git a/drivers/platform/x86/Makefile b/drivers/platform/x86/Makefile
-index 1d3d1b02541b..aee1bc4b0a80 100644
---- a/drivers/platform/x86/Makefile
-+++ b/drivers/platform/x86/Makefile
-@@ -109,7 +109,6 @@ obj-$(CONFIG_TOPSTAR_LAPTOP)	+= topstar-laptop.o
- # Platform drivers
- obj-$(CONFIG_FW_ATTR_CLASS)		+= firmware_attributes_class.o
- obj-$(CONFIG_SERIAL_MULTI_INSTANTIATE)	+= serial-multi-instantiate.o
--obj-$(CONFIG_MLX_PLATFORM)		+= mlx-platform.o
- obj-$(CONFIG_TOUCHSCREEN_DMI)		+= touchscreen_dmi.o
- obj-$(CONFIG_WIRELESS_HOTKEY)		+= wireless-hotkey.o
- obj-$(CONFIG_X86_ANDROID_TABLETS)	+= x86-android-tablets.o
--- 
-2.20.1
-
diff --git a/platform/mellanox/non-upstream-patches/patches/0066-UBUNTU-SAUCE-sdhci-of-dwcmshc-Enable-host-V4-support.patch b/platform/mellanox/non-upstream-patches/patches/0066-UBUNTU-SAUCE-sdhci-of-dwcmshc-Enable-host-V4-support.patch
deleted file mode 100644
index fafb84df8..000000000
--- a/platform/mellanox/non-upstream-patches/patches/0066-UBUNTU-SAUCE-sdhci-of-dwcmshc-Enable-host-V4-support.patch
+++ /dev/null
@@ -1,40 +0,0 @@
-From b7b422bbd95928b213444692d5b00ef081160c0b Mon Sep 17 00:00:00 2001
-From: Liming Sun <limings@nvidia.com>
-Date: Sat, 10 Dec 2022 13:55:54 -0500
-Subject: [PATCH backport 6.1.42 66/85] UBUNTU: SAUCE: sdhci-of-dwcmshc: Enable
- host V4 support for BlueField-3 SoC
-
-BugLink: https://bugs.launchpad.net/bugs/1999309
-
-This commit enables SDHCI Host V4 support on Bluefield-3 SoC to be
-consistent with UEFI setting.
-
-Signed-off-by: Liming Sun <limings@nvidia.com>
-Acked-by: Tim Gardner <tim.gardner@canonical.com>
-Acked-by: Bartlomiej Zolnierkiewicz <bartlomiej.zolnierkiewicz@canonical.com>
-[bzolnier: use a short URL version for BugLink]
-Signed-off-by: Bartlomiej Zolnierkiewicz <bartlomiej.zolnierkiewicz@canonical.com>
----
- drivers/mmc/host/sdhci-of-dwcmshc.c | 6 ++++++
- 1 file changed, 6 insertions(+)
-
-diff --git a/drivers/mmc/host/sdhci-of-dwcmshc.c b/drivers/mmc/host/sdhci-of-dwcmshc.c
-index a7343d4bc50e..a1188508e75d 100644
---- a/drivers/mmc/host/sdhci-of-dwcmshc.c
-+++ b/drivers/mmc/host/sdhci-of-dwcmshc.c
-@@ -528,6 +528,12 @@ static int dwcmshc_probe(struct platform_device *pdev)
- 			goto err_clk;
- 	}
- 
-+#ifdef CONFIG_ACPI
-+	if (pltfm_data == &sdhci_dwcmshc_bf3_pdata) {
-+		sdhci_enable_v4_mode(host);
-+	}
-+#endif
-+
- 	host->mmc->caps |= MMC_CAP_WAIT_WHILE_BUSY;
- 
- 	err = sdhci_setup_host(host);
--- 
-2.20.1
-
diff --git a/platform/mellanox/non-upstream-patches/patches/0067-UBUNTU-SAUCE-mmc-sdhci-of-dwcmshc-add-the-missing-de.patch b/platform/mellanox/non-upstream-patches/patches/0067-UBUNTU-SAUCE-mmc-sdhci-of-dwcmshc-add-the-missing-de.patch
deleted file mode 100644
index bfd038d7c..000000000
--- a/platform/mellanox/non-upstream-patches/patches/0067-UBUNTU-SAUCE-mmc-sdhci-of-dwcmshc-add-the-missing-de.patch
+++ /dev/null
@@ -1,35 +0,0 @@
-From 07163b7fab5b23c01195a456d92e3dc9e73b538c Mon Sep 17 00:00:00 2001
-From: Liming Sun <limings@nvidia.com>
-Date: Fri, 3 Feb 2023 07:52:18 -0500
-Subject: [PATCH backport 6.1.42 67/85] UBUNTU: SAUCE: mmc: sdhci-of-dwcmshc:
- add the missing device table IDs for acpi
-
-BugLink: https://bugs.launchpad.net/bugs/2004645
-
-This commit adds the missing MODULE_DEVICE_TABLE for acpi, or else
-it won't be loaded automatically when compiled as a kernel module.
-
-Signed-off-by: Liming Sun <limings@nvidia.com>
-Acked-by: Tim Gardner <tim.gardner@canonical.com>
-Acked-by: Bartlomiej Zolnierkiewicz <bartlomiej.zolnierkiewicz@canonical.com>
-[bzolnier: use a short URL version for BugLink]
-Signed-off-by: Bartlomiej Zolnierkiewicz <bartlomiej.zolnierkiewicz@canonical.com>
----
- drivers/mmc/host/sdhci-of-dwcmshc.c | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/drivers/mmc/host/sdhci-of-dwcmshc.c b/drivers/mmc/host/sdhci-of-dwcmshc.c
-index a1188508e75d..7d657d29af21 100644
---- a/drivers/mmc/host/sdhci-of-dwcmshc.c
-+++ b/drivers/mmc/host/sdhci-of-dwcmshc.c
-@@ -446,6 +446,7 @@ static const struct acpi_device_id sdhci_dwcmshc_acpi_ids[] = {
- 	},
- 	{}
- };
-+MODULE_DEVICE_TABLE(acpi, sdhci_dwcmshc_acpi_ids);
- #endif
- 
- static int dwcmshc_probe(struct platform_device *pdev)
--- 
-2.20.1
-
diff --git a/platform/mellanox/non-upstream-patches/patches/0068-UBUNTU-SAUCE-mmc-sdhci-of-dwcmshc-Add-runtime-PM-ope.patch b/platform/mellanox/non-upstream-patches/patches/0068-UBUNTU-SAUCE-mmc-sdhci-of-dwcmshc-Add-runtime-PM-ope.patch
deleted file mode 100644
index 88d54dc70..000000000
--- a/platform/mellanox/non-upstream-patches/patches/0068-UBUNTU-SAUCE-mmc-sdhci-of-dwcmshc-Add-runtime-PM-ope.patch
+++ /dev/null
@@ -1,158 +0,0 @@
-From be8912e006b49c4f9febcd2556030876737e1b72 Mon Sep 17 00:00:00 2001
-From: Liming Sun <limings@nvidia.com>
-Date: Tue, 4 Apr 2023 19:30:00 -0400
-Subject: [PATCH backport 6.1.42 68/85] UBUNTU: SAUCE: mmc: sdhci-of-dwcmshc:
- Add runtime PM operations for BlueField-3
-
-BugLink: https://bugs.launchpad.net/bugs/2015307
-
-This commit implements the runtime PM operations For BlueField-3 SoC
-to disable eMMC card clock when idle.
-
-Reviewed-by: Khalil Blaiech <kblaiech@nvidia.com>
-Signed-off-by: Liming Sun <limings@nvidia.com>
-Acked-by: Bartlomiej Zolnierkiewicz <bartlomiej.zolnierkiewicz@canonical.com>
-Acked-by: Andrei Gherzan <andrei.gherzan@canonical.com>
-[bzolnier: use a short URL version for BugLink]
-Signed-off-by: Bartlomiej Zolnierkiewicz <bartlomiej.zolnierkiewicz@canonical.com>
----
- drivers/mmc/host/sdhci-of-dwcmshc.c | 102 +++++++++++++++++++++++++++-
- 1 file changed, 101 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/mmc/host/sdhci-of-dwcmshc.c b/drivers/mmc/host/sdhci-of-dwcmshc.c
-index 7d657d29af21..32fd0668b427 100644
---- a/drivers/mmc/host/sdhci-of-dwcmshc.c
-+++ b/drivers/mmc/host/sdhci-of-dwcmshc.c
-@@ -17,6 +17,7 @@
- #include <linux/of_device.h>
- #include <linux/reset.h>
- #include <linux/sizes.h>
-+#include <linux/pm_runtime.h>
- 
- #include "sdhci-pltfm.h"
- 
-@@ -91,6 +92,21 @@ struct dwcmshc_priv {
- 	void *priv; /* pointer to SoC private stuff */
- };
- 
-+/* Last jiffies when entering idle state */
-+static uint64_t idle_last_jiffies;
-+
-+/* Total jiffies in idle state */
-+static uint64_t idle_total_jiffies;
-+
-+/* Total idle time */
-+static int idle_time;
-+module_param(idle_time, int, 0444);
-+MODULE_PARM_DESC(idle_time, "idle time (seconds)");
-+
-+/* The current idle state */
-+static int idle_state;
-+module_param(idle_state, int, 0444);
-+MODULE_PARM_DESC(idle_state, "idle state (0: not idle, 1: idle)");
- /*
-  * If DMA addr spans 128MB boundary, we split the DMA transfer into two
-  * so that each DMA transfer doesn't exceed the boundary.
-@@ -532,6 +548,7 @@ static int dwcmshc_probe(struct platform_device *pdev)
- #ifdef CONFIG_ACPI
- 	if (pltfm_data == &sdhci_dwcmshc_bf3_pdata) {
- 		sdhci_enable_v4_mode(host);
-+		pm_runtime_enable(dev);
- 	}
- #endif
- 
-@@ -635,7 +652,90 @@ static int dwcmshc_resume(struct device *dev)
- }
- #endif
- 
--static SIMPLE_DEV_PM_OPS(dwcmshc_pmops, dwcmshc_suspend, dwcmshc_resume);
-+#ifdef CONFIG_PM
-+
-+#ifdef CONFIG_ACPI
-+static void dwcmshc_enable_card_clk(struct sdhci_host *host)
-+{
-+	u16 ctrl;
-+
-+	ctrl = sdhci_readw(host, SDHCI_CLOCK_CONTROL);
-+	ctrl |= SDHCI_CLOCK_CARD_EN;
-+	sdhci_writew(host, ctrl, SDHCI_CLOCK_CONTROL);
-+}
-+
-+static void dwcmshc_disable_card_clk(struct sdhci_host *host)
-+{
-+	u16 ctrl;
-+
-+	ctrl = sdhci_readw(host, SDHCI_CLOCK_CONTROL);
-+	ctrl &= ~SDHCI_CLOCK_CARD_EN;
-+	sdhci_writew(host, ctrl, SDHCI_CLOCK_CONTROL);
-+}
-+#endif
-+
-+static int dwcmshc_runtime_suspend(struct device *dev)
-+{
-+	struct sdhci_host *host = dev_get_drvdata(dev);
-+	const struct sdhci_pltfm_data *pltfm_data;
-+	int ret = 0;
-+
-+	pltfm_data = device_get_match_data(dev);
-+	if (!pltfm_data)
-+		return -ENODEV;
-+
-+#ifdef CONFIG_ACPI
-+	if (pltfm_data == &sdhci_dwcmshc_bf3_pdata) {
-+		ret = sdhci_runtime_suspend_host(host);
-+		if (!ret) {
-+			dwcmshc_disable_card_clk(host);
-+
-+			if (!idle_state) {
-+				idle_state = 1;
-+				idle_last_jiffies = jiffies;
-+			}
-+		}
-+	}
-+#endif
-+
-+	return ret;
-+}
-+
-+static int dwcmshc_runtime_resume(struct device *dev)
-+{
-+	struct sdhci_host *host = dev_get_drvdata(dev);
-+	const struct sdhci_pltfm_data *pltfm_data;
-+	int ret = 0;
-+
-+	pltfm_data = device_get_match_data(dev);
-+	if (!pltfm_data)
-+		return -ENODEV;
-+
-+#ifdef CONFIG_ACPI
-+	if (pltfm_data == &sdhci_dwcmshc_bf3_pdata) {
-+		dwcmshc_enable_card_clk(host);
-+
-+		if (idle_state) {
-+			idle_state = 0;
-+			idle_total_jiffies = jiffies - idle_last_jiffies;
-+			idle_time += jiffies_to_msecs(
-+					idle_total_jiffies) / 1000;
-+		}
-+
-+		ret = sdhci_runtime_resume_host(host, 0);
-+	}
-+#endif
-+
-+	return ret;
-+}
-+
-+#endif
-+
-+static const struct dev_pm_ops dwcmshc_pmops = {
-+	SET_SYSTEM_SLEEP_PM_OPS(dwcmshc_suspend, dwcmshc_resume)
-+	SET_RUNTIME_PM_OPS(dwcmshc_runtime_suspend,
-+			dwcmshc_runtime_resume, NULL)
-+};
- 
- static struct platform_driver sdhci_dwcmshc_driver = {
- 	.driver	= {
--- 
-2.20.1
-
diff --git a/platform/mellanox/non-upstream-patches/patches/0069-UBUNTU-SAUCE-mlxbf_gige-add-ethtool-mlxbf_gige_set_r.patch b/platform/mellanox/non-upstream-patches/patches/0069-UBUNTU-SAUCE-mlxbf_gige-add-ethtool-mlxbf_gige_set_r.patch
deleted file mode 100644
index add9431ad..000000000
--- a/platform/mellanox/non-upstream-patches/patches/0069-UBUNTU-SAUCE-mlxbf_gige-add-ethtool-mlxbf_gige_set_r.patch
+++ /dev/null
@@ -1,80 +0,0 @@
-From 8c4980bc00f7be2d1172f047e148ecb07c43d955 Mon Sep 17 00:00:00 2001
-From: David Thompson <davthompson@nvidia.com>
-Date: Thu, 14 Jul 2022 17:47:18 -0400
-Subject: [PATCH backport 6.1.42 69/85] UBUNTU: SAUCE: mlxbf_gige: add ethtool
- mlxbf_gige_set_ringparam
-
-This patch adds the "set_ringparam" callback, to be used by
-ethtool when changing the size of the mlxbf_gige driver rings.
-
-BugLink: https://launchpad.net/bugs/1981766
-
-Change-Id: I0198f6fbf6b8ea13bd34ed152e13298265138c76
-Signed-off-by: David Thompson <davthompson@nvidia.com>
-Signed-off-by: Asmaa Mnebhi <asmaa@nvidia.com>
-Signed-off-by: Ike Panhc <ike.pan@canonical.com>
----
- .../mellanox/mlxbf_gige/mlxbf_gige_ethtool.c  | 40 +++++++++++++++++++
- 1 file changed, 40 insertions(+)
-
-diff --git a/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_ethtool.c b/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_ethtool.c
-index 41ebef25a930..4becb39b5664 100644
---- a/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_ethtool.c
-+++ b/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_ethtool.c
-@@ -45,6 +45,45 @@ mlxbf_gige_get_ringparam(struct net_device *netdev,
- 	ering->tx_pending = priv->tx_q_entries;
- }
- 
-+static int mlxbf_gige_set_ringparam(struct net_device *netdev,
-+				    struct ethtool_ringparam *ering,
-+				    struct kernel_ethtool_ringparam *kernel_ring,
-+				    struct netlink_ext_ack *extack)
-+{
-+	const struct net_device_ops *ops = netdev->netdev_ops;
-+	struct mlxbf_gige *priv = netdev_priv(netdev);
-+	int new_rx_q_entries, new_tx_q_entries;
-+
-+	/* Device does not have separate queues for small/large frames */
-+	if (ering->rx_mini_pending || ering->rx_jumbo_pending)
-+		return -EINVAL;
-+
-+	/* Round up to supported values */
-+	new_rx_q_entries = roundup_pow_of_two(ering->rx_pending);
-+	new_tx_q_entries = roundup_pow_of_two(ering->tx_pending);
-+
-+	/* Check against min values, core checks against max values */
-+	if (new_tx_q_entries < MLXBF_GIGE_MIN_TXQ_SZ ||
-+	    new_rx_q_entries < MLXBF_GIGE_MIN_RXQ_SZ)
-+		return -EINVAL;
-+
-+	/* If queue sizes did not change, exit now */
-+	if (new_rx_q_entries == priv->rx_q_entries &&
-+	    new_tx_q_entries == priv->tx_q_entries)
-+		return 0;
-+
-+	if (netif_running(netdev))
-+		ops->ndo_stop(netdev);
-+
-+	priv->rx_q_entries = new_rx_q_entries;
-+	priv->tx_q_entries = new_tx_q_entries;
-+
-+	if (netif_running(netdev))
-+		ops->ndo_open(netdev);
-+
-+	return 0;
-+}
-+
- static const struct {
- 	const char string[ETH_GSTRING_LEN];
- } mlxbf_gige_ethtool_stats_keys[] = {
-@@ -127,6 +166,7 @@ static void mlxbf_gige_get_pauseparam(struct net_device *netdev,
- const struct ethtool_ops mlxbf_gige_ethtool_ops = {
- 	.get_link		= ethtool_op_get_link,
- 	.get_ringparam		= mlxbf_gige_get_ringparam,
-+	.set_ringparam		= mlxbf_gige_set_ringparam,
- 	.get_regs_len           = mlxbf_gige_get_regs_len,
- 	.get_regs               = mlxbf_gige_get_regs,
- 	.get_strings            = mlxbf_gige_get_strings,
--- 
-2.20.1
-
diff --git a/platform/mellanox/non-upstream-patches/patches/0070-UBUNTU-SAUCE-Fix-OOB-handling-RX-packets-in-heavy-tr.patch b/platform/mellanox/non-upstream-patches/patches/0070-UBUNTU-SAUCE-Fix-OOB-handling-RX-packets-in-heavy-tr.patch
deleted file mode 100644
index 6550158ce..000000000
--- a/platform/mellanox/non-upstream-patches/patches/0070-UBUNTU-SAUCE-Fix-OOB-handling-RX-packets-in-heavy-tr.patch
+++ /dev/null
@@ -1,108 +0,0 @@
-From 8864f5ec2e1c0e1271a202859325900bd6727139 Mon Sep 17 00:00:00 2001
-From: David Thompson <davthompson@nvidia.com>
-Date: Wed, 20 Jul 2022 17:50:36 -0400
-Subject: [PATCH backport 6.1.42 70/85] UBUNTU: SAUCE: Fix OOB handling RX
- packets in heavy traffic
-
-BugLink: https://bugs.launchpad.net/bugs/1982424
-
-This is reproducible on systems which already have heavy background
-traffic. On top of that, the user issues one of the 2 docker pulls below:
-docker pull nvcr.io/ea-doca-hbn/hbn/hbn:latest
-OR
-docker pull gitlab-master.nvidia.com:5005/dl/dgx/tritonserver:22.02-py3-qa
-
-The second one is a very large container (17GB)
-
-When they run docker pull, the OOB interface stops being pingable,
-the docker pull is interrupted for a very long time (>3mn) or
-times out.
-
-The main reason for the above is because RX PI = RX CI. I have verified that
-by reading RX_CQE_PACKET_CI and RX_WQE_PI. This means the WQEs are full and
-HW has nowhere else to put the RX packets.
-
-I believe there is a race condition after SW receives a RX interrupt,
-and the interrupt is disabled. I believe HW still tries to add RX
-packets to the RX WQEs. So we need to stop the RX traffic by disabling
-the DMA. Also, move reading the RX CI before writing the increased value
-of RX PI to MLXBF_GIGE_RX_WQE_PI. Normally RX PI should always be > RX CI.
-I suspect that when entering mlxbf_gige_rx_packet, for example we have:
-MLXBF_GIGE_RX_WQE_PI = 128
-RX_CQE_PACKET_CI = 128
-(128 being the max size of the WQE)
-
-Then this code will make MLXBF_GIGE_RX_WQE_PI = 129:
-rx_pi++;
-/* Ensure completion of all writes before notifying HW of replenish */
-wmb();
-writeq(rx_pi, priv->base + MLXBF_GIGE_RX_WQE_PI);
-
-which means HW has one more slot to populate and in that time span, the HW
-populates that WQE and increases the RX_CQE_PACKET_CI = 129.
-
-Then this code is subject to a race condition:
-
-rx_ci = readq(priv->base + MLXBF_GIGE_RX_CQE_PACKET_CI);
-rx_ci_rem = rx_ci % priv->rx_q_entries;
-return rx_pi_rem != rx_ci_rem;
-
-because rx_pi_rem will be equal to rx_ci_rem.
-so remaining_pkts will be 0 and we will exit mlxbf_gige_poll
-
-Change-Id: I25a816b9182471643db95b05c803b9f6349bcc87
-Signed-off-by: David Thompson <davthompson@nvidia.com>
-Signed-off-by: Asmaa Mnebhi <asmaa@nvidia.com>
-Signed-off-by: Ike Panhc <ike.pan@canonical.com>
----
- .../ethernet/mellanox/mlxbf_gige/mlxbf_gige_rx.c    | 13 +++++++++++--
- 1 file changed, 11 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_rx.c b/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_rx.c
-index 0d5a41a2ae01..dc05ab5b042a 100644
---- a/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_rx.c
-+++ b/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_rx.c
-@@ -267,6 +267,9 @@ static bool mlxbf_gige_rx_packet(struct mlxbf_gige *priv, int *rx_pkts)
- 		priv->stats.rx_truncate_errors++;
- 	}
- 
-+	rx_ci = readq(priv->base + MLXBF_GIGE_RX_CQE_PACKET_CI);
-+	rx_ci_rem = rx_ci % priv->rx_q_entries;
-+
- 	/* Let hardware know we've replenished one buffer */
- 	rx_pi++;
- 
-@@ -279,8 +282,6 @@ static bool mlxbf_gige_rx_packet(struct mlxbf_gige *priv, int *rx_pkts)
- 	rx_pi_rem = rx_pi % priv->rx_q_entries;
- 	if (rx_pi_rem == 0)
- 		priv->valid_polarity ^= 1;
--	rx_ci = readq(priv->base + MLXBF_GIGE_RX_CQE_PACKET_CI);
--	rx_ci_rem = rx_ci % priv->rx_q_entries;
- 
- 	if (skb)
- 		netif_receive_skb(skb);
-@@ -300,6 +301,10 @@ int mlxbf_gige_poll(struct napi_struct *napi, int budget)
- 
- 	mlxbf_gige_handle_tx_complete(priv);
- 
-+	data = readq(priv->base + MLXBF_GIGE_RX_DMA);
-+	data &= ~MLXBF_GIGE_RX_DMA_EN;
-+	writeq(data, priv->base + MLXBF_GIGE_RX_DMA);
-+
- 	do {
- 		remaining_pkts = mlxbf_gige_rx_packet(priv, &work_done);
- 	} while (remaining_pkts && work_done < budget);
-@@ -315,6 +320,10 @@ int mlxbf_gige_poll(struct napi_struct *napi, int budget)
- 		data = readq(priv->base + MLXBF_GIGE_INT_MASK);
- 		data &= ~MLXBF_GIGE_INT_MASK_RX_RECEIVE_PACKET;
- 		writeq(data, priv->base + MLXBF_GIGE_INT_MASK);
-+
-+		data = readq(priv->base + MLXBF_GIGE_RX_DMA);
-+		data |= MLXBF_GIGE_RX_DMA_EN;
-+		writeq(data, priv->base + MLXBF_GIGE_RX_DMA);
- 	}
- 
- 	return work_done;
--- 
-2.20.1
-
diff --git a/platform/mellanox/non-upstream-patches/patches/0071-UBUNTU-SAUCE-mlxbf-gige-Fix-intermittent-no-ip-issue.patch b/platform/mellanox/non-upstream-patches/patches/0071-UBUNTU-SAUCE-mlxbf-gige-Fix-intermittent-no-ip-issue.patch
deleted file mode 100644
index f8e11a704..000000000
--- a/platform/mellanox/non-upstream-patches/patches/0071-UBUNTU-SAUCE-mlxbf-gige-Fix-intermittent-no-ip-issue.patch
+++ /dev/null
@@ -1,85 +0,0 @@
-From 7a9c30f4e3f19eb533acce3d3c63de87d18bac1d Mon Sep 17 00:00:00 2001
-From: Asmaa Mnebhi <asmaa@nvidia.com>
-Date: Tue, 28 Feb 2023 18:03:12 -0500
-Subject: [PATCH backport 6.1.42 71/85] UBUNTU: SAUCE: mlxbf-gige: Fix
- intermittent no ip issue
-
-BugLink: https://bugs.launchpad.net/bugs/2008833
-
-During the reboot test, the OOB might not get an ip assigned.
-This is due to a race condition between phy_startcall and the
-RX DMA being enabled and depends on the amount of background
-traffic received by the OOB. Enable the RX DMA after teh phy
-is started.
-
-Signed-off-by: Asmaa Mnebhi <asmaa@nvidia.com>
-Acked-by: Tim Gardner <tim.gardner@canonical.com>
-Acked-by: Bartlomiej Zolnierkiewicz <bartlomiej.zolnierkiewicz@canonical.com>
-Signed-off-by: Bartlomiej Zolnierkiewicz <bartlomiej.zolnierkiewicz@canonical.com>
----
- .../ethernet/mellanox/mlxbf_gige/mlxbf_gige_main.c | 14 +++++++-------
- .../ethernet/mellanox/mlxbf_gige/mlxbf_gige_rx.c   |  6 +++---
- 2 files changed, 10 insertions(+), 10 deletions(-)
-
-diff --git a/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_main.c b/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_main.c
-index 2292d63a279c..eafc0d3313fd 100644
---- a/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_main.c
-+++ b/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_main.c
-@@ -147,14 +147,14 @@ static int mlxbf_gige_open(struct net_device *netdev)
- 	 */
- 	priv->valid_polarity = 0;
- 
--	err = mlxbf_gige_rx_init(priv);
-+	phy_start(phydev);
-+
-+	err = mlxbf_gige_tx_init(priv);
- 	if (err)
- 		goto free_irqs;
--	err = mlxbf_gige_tx_init(priv);
-+	err = mlxbf_gige_rx_init(priv);
- 	if (err)
--		goto rx_deinit;
--
--	phy_start(phydev);
-+		goto tx_deinit;
- 
- 	netif_napi_add(netdev, &priv->napi, mlxbf_gige_poll);
- 	napi_enable(&priv->napi);
-@@ -176,8 +176,8 @@ static int mlxbf_gige_open(struct net_device *netdev)
- 
- 	return 0;
- 
--rx_deinit:
--	mlxbf_gige_rx_deinit(priv);
-+tx_deinit:
-+	mlxbf_gige_tx_deinit(priv);
- 
- free_irqs:
- 	mlxbf_gige_free_irqs(priv);
-diff --git a/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_rx.c b/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_rx.c
-index dc05ab5b042a..b9cf0a3c8b0f 100644
---- a/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_rx.c
-+++ b/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_rx.c
-@@ -142,6 +142,9 @@ int mlxbf_gige_rx_init(struct mlxbf_gige *priv)
- 	writeq(MLXBF_GIGE_RX_MAC_FILTER_COUNT_PASS_EN,
- 	       priv->base + MLXBF_GIGE_RX_MAC_FILTER_COUNT_PASS);
- 
-+	writeq(ilog2(priv->rx_q_entries),
-+	       priv->base + MLXBF_GIGE_RX_WQE_SIZE_LOG2);
-+
- 	/* Clear MLXBF_GIGE_INT_MASK 'receive pkt' bit to
- 	 * indicate readiness to receive interrupts
- 	 */
-@@ -154,9 +157,6 @@ int mlxbf_gige_rx_init(struct mlxbf_gige *priv)
- 	data |= MLXBF_GIGE_RX_DMA_EN;
- 	writeq(data, priv->base + MLXBF_GIGE_RX_DMA);
- 
--	writeq(ilog2(priv->rx_q_entries),
--	       priv->base + MLXBF_GIGE_RX_WQE_SIZE_LOG2);
--
- 	return 0;
- 
- free_wqe_and_skb:
--- 
-2.20.1
-
diff --git a/platform/mellanox/non-upstream-patches/patches/0072-mlxbf_gige-add-MDIO-support-for-BlueField-3.patch b/platform/mellanox/non-upstream-patches/patches/0072-mlxbf_gige-add-MDIO-support-for-BlueField-3.patch
deleted file mode 100644
index 9dc9c9862..000000000
--- a/platform/mellanox/non-upstream-patches/patches/0072-mlxbf_gige-add-MDIO-support-for-BlueField-3.patch
+++ /dev/null
@@ -1,496 +0,0 @@
-From 0d3a669288079d5a197b95d1a4615301e61fb039 Mon Sep 17 00:00:00 2001
-From: David Thompson <davthompson@nvidia.com>
-Date: Thu, 12 Jan 2023 15:26:06 -0500
-Subject: [PATCH backport 6.1.42 72/85] mlxbf_gige: add MDIO support for
- BlueField-3
-
-BugLink: https://bugs.launchpad.net/bugs/2012649
-
-This patch adds initial MDIO support for the BlueField-3
-SoC. Separate header files for the BlueField-2 and the
-BlueField-3 SoCs have been created.  These header files
-hold the SoC-specific MDIO macros since the register
-offsets and bit fields have changed.  Also, in BlueField-3
-there is a separate register for writing and reading the
-MDIO data.  Finally, instead of having "if" statements
-everywhere to differentiate between SoC-specific logic,
-a mlxbf_gige_mdio_gw_t struct was created for this purpose.
-
-Signed-off-by: David Thompson <davthompson@nvidia.com>
-Signed-off-by: Asmaa Mnebhi <asmaa@nvidia.com>
-Signed-off-by: Jakub Kicinski <kuba@kernel.org>
-(cherry picked from commit 2321d69f92aa7e6aa2cc98e7a8e005566943922f)
-Signed-off-by: David Thompson <davthompson@nvidia.com>
-Acked-by: Tim Gardner <tim.gardner@canonical.com>
-Acked-by: Bartlomiej Zolnierkiewicz <bartlomiej.zolnierkiewicz@canonical.com>
-Signed-off-by: Bartlomiej Zolnierkiewicz <bartlomiej.zolnierkiewicz@canonical.com>
----
- .../ethernet/mellanox/mlxbf_gige/mlxbf_gige.h |  19 ++
- .../mellanox/mlxbf_gige/mlxbf_gige_main.c     |   2 +
- .../mellanox/mlxbf_gige/mlxbf_gige_mdio.c     | 178 +++++++++++++-----
- .../mellanox/mlxbf_gige/mlxbf_gige_mdio_bf2.h |  53 ++++++
- .../mellanox/mlxbf_gige/mlxbf_gige_mdio_bf3.h |  54 ++++++
- .../mellanox/mlxbf_gige/mlxbf_gige_regs.h     |   1 +
- 6 files changed, 256 insertions(+), 51 deletions(-)
- create mode 100644 drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_mdio_bf2.h
- create mode 100644 drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_mdio_bf3.h
-
-diff --git a/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige.h b/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige.h
-index 5a1027b07215..421a0b1b766c 100644
---- a/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige.h
-+++ b/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige.h
-@@ -67,6 +67,23 @@ struct mlxbf_gige_stats {
- 	u64 rx_filter_discard_pkts;
- };
- 
-+struct mlxbf_gige_reg_param {
-+	u32 mask;
-+	u32 shift;
-+};
-+
-+struct mlxbf_gige_mdio_gw {
-+	u32 gw_address;
-+	u32 read_data_address;
-+	struct mlxbf_gige_reg_param busy;
-+	struct mlxbf_gige_reg_param write_data;
-+	struct mlxbf_gige_reg_param read_data;
-+	struct mlxbf_gige_reg_param devad;
-+	struct mlxbf_gige_reg_param partad;
-+	struct mlxbf_gige_reg_param opcode;
-+	struct mlxbf_gige_reg_param st1;
-+};
-+
- struct mlxbf_gige {
- 	void __iomem *base;
- 	void __iomem *llu_base;
-@@ -102,6 +119,8 @@ struct mlxbf_gige {
- 	u8 valid_polarity;
- 	struct napi_struct napi;
- 	struct mlxbf_gige_stats stats;
-+	u8 hw_version;
-+	struct mlxbf_gige_mdio_gw *mdio_gw;
- };
- 
- /* Rx Work Queue Element definitions */
-diff --git a/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_main.c b/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_main.c
-index eafc0d3313fd..a3bd14d5dbff 100644
---- a/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_main.c
-+++ b/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_main.c
-@@ -315,6 +315,8 @@ static int mlxbf_gige_probe(struct platform_device *pdev)
- 
- 	spin_lock_init(&priv->lock);
- 
-+	priv->hw_version = readq(base + MLXBF_GIGE_VERSION);
-+
- 	/* Attach MDIO device */
- 	err = mlxbf_gige_mdio_probe(pdev, priv);
- 	if (err)
-diff --git a/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_mdio.c b/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_mdio.c
-index aa780b1614a3..4ee3df30c402 100644
---- a/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_mdio.c
-+++ b/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_mdio.c
-@@ -23,9 +23,75 @@
- 
- #include "mlxbf_gige.h"
- #include "mlxbf_gige_regs.h"
-+#include "mlxbf_gige_mdio_bf2.h"
-+#include "mlxbf_gige_mdio_bf3.h"
- 
--#define MLXBF_GIGE_MDIO_GW_OFFSET	0x0
--#define MLXBF_GIGE_MDIO_CFG_OFFSET	0x4
-+static struct mlxbf_gige_mdio_gw mlxbf_gige_mdio_gw_t[] = {
-+	[MLXBF_GIGE_VERSION_BF2] = {
-+		.gw_address = MLXBF2_GIGE_MDIO_GW_OFFSET,
-+		.read_data_address = MLXBF2_GIGE_MDIO_GW_OFFSET,
-+		.busy = {
-+			.mask = MLXBF2_GIGE_MDIO_GW_BUSY_MASK,
-+			.shift = MLXBF2_GIGE_MDIO_GW_BUSY_SHIFT,
-+		},
-+		.read_data = {
-+			.mask = MLXBF2_GIGE_MDIO_GW_AD_MASK,
-+			.shift = MLXBF2_GIGE_MDIO_GW_AD_SHIFT,
-+		},
-+		.write_data = {
-+			.mask = MLXBF2_GIGE_MDIO_GW_AD_MASK,
-+			.shift = MLXBF2_GIGE_MDIO_GW_AD_SHIFT,
-+		},
-+		.devad = {
-+			.mask = MLXBF2_GIGE_MDIO_GW_DEVAD_MASK,
-+			.shift = MLXBF2_GIGE_MDIO_GW_DEVAD_SHIFT,
-+		},
-+		.partad = {
-+			.mask = MLXBF2_GIGE_MDIO_GW_PARTAD_MASK,
-+			.shift = MLXBF2_GIGE_MDIO_GW_PARTAD_SHIFT,
-+		},
-+		.opcode = {
-+			.mask = MLXBF2_GIGE_MDIO_GW_OPCODE_MASK,
-+			.shift = MLXBF2_GIGE_MDIO_GW_OPCODE_SHIFT,
-+		},
-+		.st1 = {
-+			.mask = MLXBF2_GIGE_MDIO_GW_ST1_MASK,
-+			.shift = MLXBF2_GIGE_MDIO_GW_ST1_SHIFT,
-+		},
-+	},
-+	[MLXBF_GIGE_VERSION_BF3] = {
-+		.gw_address = MLXBF3_GIGE_MDIO_GW_OFFSET,
-+		.read_data_address = MLXBF3_GIGE_MDIO_DATA_READ,
-+		.busy = {
-+			.mask = MLXBF3_GIGE_MDIO_GW_BUSY_MASK,
-+			.shift = MLXBF3_GIGE_MDIO_GW_BUSY_SHIFT,
-+		},
-+		.read_data = {
-+			.mask = MLXBF3_GIGE_MDIO_GW_DATA_READ_MASK,
-+			.shift = MLXBF3_GIGE_MDIO_GW_DATA_READ_SHIFT,
-+		},
-+		.write_data = {
-+			.mask = MLXBF3_GIGE_MDIO_GW_DATA_MASK,
-+			.shift = MLXBF3_GIGE_MDIO_GW_DATA_SHIFT,
-+		},
-+		.devad = {
-+			.mask = MLXBF3_GIGE_MDIO_GW_DEVAD_MASK,
-+			.shift = MLXBF3_GIGE_MDIO_GW_DEVAD_SHIFT,
-+		},
-+		.partad = {
-+			.mask = MLXBF3_GIGE_MDIO_GW_PARTAD_MASK,
-+			.shift = MLXBF3_GIGE_MDIO_GW_PARTAD_SHIFT,
-+		},
-+		.opcode = {
-+			.mask = MLXBF3_GIGE_MDIO_GW_OPCODE_MASK,
-+			.shift = MLXBF3_GIGE_MDIO_GW_OPCODE_SHIFT,
-+		},
-+		.st1 = {
-+			.mask = MLXBF3_GIGE_MDIO_GW_ST1_MASK,
-+			.shift = MLXBF3_GIGE_MDIO_GW_ST1_SHIFT,
-+		},
-+	},
-+};
- 
- #define MLXBF_GIGE_MDIO_FREQ_REFERENCE 156250000ULL
- #define MLXBF_GIGE_MDIO_COREPLL_CONST  16384ULL
-@@ -47,30 +113,10 @@
- /* Busy bit is set by software and cleared by hardware */
- #define MLXBF_GIGE_MDIO_SET_BUSY	0x1
- 
--/* MDIO GW register bits */
--#define MLXBF_GIGE_MDIO_GW_AD_MASK	GENMASK(15, 0)
--#define MLXBF_GIGE_MDIO_GW_DEVAD_MASK	GENMASK(20, 16)
--#define MLXBF_GIGE_MDIO_GW_PARTAD_MASK	GENMASK(25, 21)
--#define MLXBF_GIGE_MDIO_GW_OPCODE_MASK	GENMASK(27, 26)
--#define MLXBF_GIGE_MDIO_GW_ST1_MASK	GENMASK(28, 28)
--#define MLXBF_GIGE_MDIO_GW_BUSY_MASK	GENMASK(30, 30)
--
--/* MDIO config register bits */
--#define MLXBF_GIGE_MDIO_CFG_MDIO_MODE_MASK		GENMASK(1, 0)
--#define MLXBF_GIGE_MDIO_CFG_MDIO3_3_MASK		GENMASK(2, 2)
--#define MLXBF_GIGE_MDIO_CFG_MDIO_FULL_DRIVE_MASK	GENMASK(4, 4)
--#define MLXBF_GIGE_MDIO_CFG_MDC_PERIOD_MASK		GENMASK(15, 8)
--#define MLXBF_GIGE_MDIO_CFG_MDIO_IN_SAMP_MASK		GENMASK(23, 16)
--#define MLXBF_GIGE_MDIO_CFG_MDIO_OUT_SAMP_MASK		GENMASK(31, 24)
--
--#define MLXBF_GIGE_MDIO_CFG_VAL (FIELD_PREP(MLXBF_GIGE_MDIO_CFG_MDIO_MODE_MASK, 1) | \
--				 FIELD_PREP(MLXBF_GIGE_MDIO_CFG_MDIO3_3_MASK, 1) | \
--				 FIELD_PREP(MLXBF_GIGE_MDIO_CFG_MDIO_FULL_DRIVE_MASK, 1) | \
--				 FIELD_PREP(MLXBF_GIGE_MDIO_CFG_MDIO_IN_SAMP_MASK, 6) | \
--				 FIELD_PREP(MLXBF_GIGE_MDIO_CFG_MDIO_OUT_SAMP_MASK, 13))
--
- #define MLXBF_GIGE_BF2_COREPLL_ADDR 0x02800c30
- #define MLXBF_GIGE_BF2_COREPLL_SIZE 0x0000000c
-+#define MLXBF_GIGE_BF3_COREPLL_ADDR 0x13409824
-+#define MLXBF_GIGE_BF3_COREPLL_SIZE 0x00000010
- 
- static struct resource corepll_params[] = {
- 	[MLXBF_GIGE_VERSION_BF2] = {
-@@ -78,6 +124,11 @@ static struct resource corepll_params[] = {
- 		.end = MLXBF_GIGE_BF2_COREPLL_ADDR + MLXBF_GIGE_BF2_COREPLL_SIZE - 1,
- 		.name = "COREPLL_RES"
- 	},
-+	[MLXBF_GIGE_VERSION_BF3] = {
-+		.start = MLXBF_GIGE_BF3_COREPLL_ADDR,
-+		.end = MLXBF_GIGE_BF3_COREPLL_ADDR + MLXBF_GIGE_BF3_COREPLL_SIZE - 1,
-+		.name = "COREPLL_RES"
-+	}
- };
- 
- /* Returns core clock i1clk in Hz */
-@@ -134,19 +185,23 @@ static u8 mdio_period_map(struct mlxbf_gige *priv)
- 	return mdio_period;
- }
- 
--static u32 mlxbf_gige_mdio_create_cmd(u16 data, int phy_add,
-+static u32 mlxbf_gige_mdio_create_cmd(struct mlxbf_gige_mdio_gw *mdio_gw, u16 data, int phy_add,
- 				      int phy_reg, u32 opcode)
- {
- 	u32 gw_reg = 0;
- 
--	gw_reg |= FIELD_PREP(MLXBF_GIGE_MDIO_GW_AD_MASK, data);
--	gw_reg |= FIELD_PREP(MLXBF_GIGE_MDIO_GW_DEVAD_MASK, phy_reg);
--	gw_reg |= FIELD_PREP(MLXBF_GIGE_MDIO_GW_PARTAD_MASK, phy_add);
--	gw_reg |= FIELD_PREP(MLXBF_GIGE_MDIO_GW_OPCODE_MASK, opcode);
--	gw_reg |= FIELD_PREP(MLXBF_GIGE_MDIO_GW_ST1_MASK,
--			     MLXBF_GIGE_MDIO_CL22_ST1);
--	gw_reg |= FIELD_PREP(MLXBF_GIGE_MDIO_GW_BUSY_MASK,
--			     MLXBF_GIGE_MDIO_SET_BUSY);
-+	gw_reg |= ((data << mdio_gw->write_data.shift) &
-+		   mdio_gw->write_data.mask);
-+	gw_reg |= ((phy_reg << mdio_gw->devad.shift) &
-+		   mdio_gw->devad.mask);
-+	gw_reg |= ((phy_add << mdio_gw->partad.shift) &
-+		   mdio_gw->partad.mask);
-+	gw_reg |= ((opcode << mdio_gw->opcode.shift) &
-+		   mdio_gw->opcode.mask);
-+	gw_reg |= ((MLXBF_GIGE_MDIO_CL22_ST1 << mdio_gw->st1.shift) &
-+		   mdio_gw->st1.mask);
-+	gw_reg |= ((MLXBF_GIGE_MDIO_SET_BUSY << mdio_gw->busy.shift) &
-+		   mdio_gw->busy.mask);
- 
- 	return gw_reg;
- }
-@@ -162,25 +217,26 @@ static int mlxbf_gige_mdio_read(struct mii_bus *bus, int phy_add, int phy_reg)
- 		return -EOPNOTSUPP;
- 
- 	/* Send mdio read request */
--	cmd = mlxbf_gige_mdio_create_cmd(0, phy_add, phy_reg, MLXBF_GIGE_MDIO_CL22_READ);
-+	cmd = mlxbf_gige_mdio_create_cmd(priv->mdio_gw, 0, phy_add, phy_reg,
-+					 MLXBF_GIGE_MDIO_CL22_READ);
- 
--	writel(cmd, priv->mdio_io + MLXBF_GIGE_MDIO_GW_OFFSET);
-+	writel(cmd, priv->mdio_io + priv->mdio_gw->gw_address);
- 
--	ret = readl_poll_timeout_atomic(priv->mdio_io + MLXBF_GIGE_MDIO_GW_OFFSET,
--					val, !(val & MLXBF_GIGE_MDIO_GW_BUSY_MASK),
-+	ret = readl_poll_timeout_atomic(priv->mdio_io + priv->mdio_gw->gw_address,
-+					val, !(val & priv->mdio_gw->busy.mask),
- 					5, 1000000);
- 
- 	if (ret) {
--		writel(0, priv->mdio_io + MLXBF_GIGE_MDIO_GW_OFFSET);
-+		writel(0, priv->mdio_io + priv->mdio_gw->gw_address);
- 		return ret;
- 	}
- 
--	ret = readl(priv->mdio_io + MLXBF_GIGE_MDIO_GW_OFFSET);
-+	ret = readl(priv->mdio_io + priv->mdio_gw->read_data_address);
- 	/* Only return ad bits of the gw register */
--	ret &= MLXBF_GIGE_MDIO_GW_AD_MASK;
-+	ret &= priv->mdio_gw->read_data.mask;
- 
- 	/* The MDIO lock is set on read. To release it, clear gw register */
--	writel(0, priv->mdio_io + MLXBF_GIGE_MDIO_GW_OFFSET);
-+	writel(0, priv->mdio_io + priv->mdio_gw->gw_address);
- 
- 	return ret;
- }
-@@ -197,17 +253,17 @@ static int mlxbf_gige_mdio_write(struct mii_bus *bus, int phy_add,
- 		return -EOPNOTSUPP;
- 
- 	/* Send mdio write request */
--	cmd = mlxbf_gige_mdio_create_cmd(val, phy_add, phy_reg,
-+	cmd = mlxbf_gige_mdio_create_cmd(priv->mdio_gw, val, phy_add, phy_reg,
- 					 MLXBF_GIGE_MDIO_CL22_WRITE);
--	writel(cmd, priv->mdio_io + MLXBF_GIGE_MDIO_GW_OFFSET);
-+	writel(cmd, priv->mdio_io + priv->mdio_gw->gw_address);
- 
- 	/* If the poll timed out, drop the request */
--	ret = readl_poll_timeout_atomic(priv->mdio_io + MLXBF_GIGE_MDIO_GW_OFFSET,
--					temp, !(temp & MLXBF_GIGE_MDIO_GW_BUSY_MASK),
-+	ret = readl_poll_timeout_atomic(priv->mdio_io + priv->mdio_gw->gw_address,
-+					temp, !(temp & priv->mdio_gw->busy.mask),
- 					5, 1000000);
- 
- 	/* The MDIO lock is set on read. To release it, clear gw register */
--	writel(0, priv->mdio_io + MLXBF_GIGE_MDIO_GW_OFFSET);
-+	writel(0, priv->mdio_io + priv->mdio_gw->gw_address);
- 
- 	return ret;
- }
-@@ -219,9 +275,20 @@ static void mlxbf_gige_mdio_cfg(struct mlxbf_gige *priv)
- 
- 	mdio_period = mdio_period_map(priv);
- 
--	val = MLXBF_GIGE_MDIO_CFG_VAL;
--	val |= FIELD_PREP(MLXBF_GIGE_MDIO_CFG_MDC_PERIOD_MASK, mdio_period);
--	writel(val, priv->mdio_io + MLXBF_GIGE_MDIO_CFG_OFFSET);
-+	if (priv->hw_version == MLXBF_GIGE_VERSION_BF2) {
-+		val = MLXBF2_GIGE_MDIO_CFG_VAL;
-+		val |= FIELD_PREP(MLXBF2_GIGE_MDIO_CFG_MDC_PERIOD_MASK, mdio_period);
-+		writel(val, priv->mdio_io + MLXBF2_GIGE_MDIO_CFG_OFFSET);
-+	} else {
-+		val = FIELD_PREP(MLXBF3_GIGE_MDIO_CFG_MDIO_MODE_MASK, 1) |
-+		      FIELD_PREP(MLXBF3_GIGE_MDIO_CFG_MDIO_FULL_DRIVE_MASK, 1);
-+		writel(val, priv->mdio_io + MLXBF3_GIGE_MDIO_CFG_REG0);
-+		val = FIELD_PREP(MLXBF3_GIGE_MDIO_CFG_MDC_PERIOD_MASK, mdio_period);
-+		writel(val, priv->mdio_io + MLXBF3_GIGE_MDIO_CFG_REG1);
-+		val = FIELD_PREP(MLXBF3_GIGE_MDIO_CFG_MDIO_IN_SAMP_MASK, 6) |
-+		      FIELD_PREP(MLXBF3_GIGE_MDIO_CFG_MDIO_OUT_SAMP_MASK, 13);
-+		writel(val, priv->mdio_io + MLXBF3_GIGE_MDIO_CFG_REG2);
-+	}
- }
- 
- int mlxbf_gige_mdio_probe(struct platform_device *pdev, struct mlxbf_gige *priv)
-@@ -230,7 +297,14 @@ int mlxbf_gige_mdio_probe(struct platform_device *pdev, struct mlxbf_gige *priv)
- 	struct resource *res;
- 	int ret;
- 
--	priv->mdio_io = devm_platform_ioremap_resource(pdev, MLXBF_GIGE_RES_MDIO9);
-+	if (priv->hw_version > MLXBF_GIGE_VERSION_BF3)
-+		return -ENODEV;
-+
-+	res = platform_get_resource(pdev, IORESOURCE_MEM, MLXBF_GIGE_RES_MDIO9);
-+	if (!res)
-+		return -ENODEV;
-+
-+	priv->mdio_io = devm_ioremap_resource(dev, res);
- 	if (IS_ERR(priv->mdio_io))
- 		return PTR_ERR(priv->mdio_io);
- 
-@@ -242,13 +316,15 @@ int mlxbf_gige_mdio_probe(struct platform_device *pdev, struct mlxbf_gige *priv)
- 		/* For backward compatibility with older ACPI tables, also keep
- 		 * CLK resource internal to the driver.
- 		 */
--		res = &corepll_params[MLXBF_GIGE_VERSION_BF2];
-+		res = &corepll_params[priv->hw_version];
- 	}
- 
- 	priv->clk_io = devm_ioremap(dev, res->start, resource_size(res));
- 	if (!priv->clk_io)
- 		return -ENOMEM;
- 
-+	priv->mdio_gw = &mlxbf_gige_mdio_gw_t[priv->hw_version];
-+
- 	mlxbf_gige_mdio_cfg(priv);
- 
- 	priv->mdiobus = devm_mdiobus_alloc(dev);
-diff --git a/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_mdio_bf2.h b/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_mdio_bf2.h
-new file mode 100644
-index 000000000000..7f1ff0ac7699
---- /dev/null
-+++ b/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_mdio_bf2.h
-@@ -0,0 +1,53 @@
-+/* SPDX-License-Identifier: GPL-2.0-only OR BSD-3-Clause */
-+
-+/* MDIO support for Mellanox Gigabit Ethernet driver
-+ *
-+ * Copyright (c) 2022 NVIDIA CORPORATION & AFFILIATES, ALL RIGHTS RESERVED.
-+ *
-+ * This software product is a proprietary product of NVIDIA CORPORATION &
-+ * AFFILIATES (the "Company") and all right, title, and interest in and to the
-+ * software product, including all associated intellectual property rights, are
-+ * and shall remain exclusively with the Company.
-+ *
-+ * This software product is governed by the End User License Agreement
-+ * provided with the software product.
-+ */
-+
-+#ifndef __MLXBF_GIGE_MDIO_BF2_H__
-+#define __MLXBF_GIGE_MDIO_BF2_H__
-+
-+#include <linux/bitfield.h>
-+
-+#define MLXBF2_GIGE_MDIO_GW_OFFSET	0x0
-+#define MLXBF2_GIGE_MDIO_CFG_OFFSET	0x4
-+
-+/* MDIO GW register bits */
-+#define MLXBF2_GIGE_MDIO_GW_AD_MASK	GENMASK(15, 0)
-+#define MLXBF2_GIGE_MDIO_GW_DEVAD_MASK	GENMASK(20, 16)
-+#define MLXBF2_GIGE_MDIO_GW_PARTAD_MASK	GENMASK(25, 21)
-+#define MLXBF2_GIGE_MDIO_GW_OPCODE_MASK	GENMASK(27, 26)
-+#define MLXBF2_GIGE_MDIO_GW_ST1_MASK	GENMASK(28, 28)
-+#define MLXBF2_GIGE_MDIO_GW_BUSY_MASK	GENMASK(30, 30)
-+
-+#define MLXBF2_GIGE_MDIO_GW_AD_SHIFT     0
-+#define MLXBF2_GIGE_MDIO_GW_DEVAD_SHIFT  16
-+#define MLXBF2_GIGE_MDIO_GW_PARTAD_SHIFT 21
-+#define MLXBF2_GIGE_MDIO_GW_OPCODE_SHIFT 26
-+#define MLXBF2_GIGE_MDIO_GW_ST1_SHIFT    28
-+#define MLXBF2_GIGE_MDIO_GW_BUSY_SHIFT   30
-+
-+/* MDIO config register bits */
-+#define MLXBF2_GIGE_MDIO_CFG_MDIO_MODE_MASK		GENMASK(1, 0)
-+#define MLXBF2_GIGE_MDIO_CFG_MDIO3_3_MASK		GENMASK(2, 2)
-+#define MLXBF2_GIGE_MDIO_CFG_MDIO_FULL_DRIVE_MASK	GENMASK(4, 4)
-+#define MLXBF2_GIGE_MDIO_CFG_MDC_PERIOD_MASK		GENMASK(15, 8)
-+#define MLXBF2_GIGE_MDIO_CFG_MDIO_IN_SAMP_MASK		GENMASK(23, 16)
-+#define MLXBF2_GIGE_MDIO_CFG_MDIO_OUT_SAMP_MASK		GENMASK(31, 24)
-+
-+#define MLXBF2_GIGE_MDIO_CFG_VAL (FIELD_PREP(MLXBF2_GIGE_MDIO_CFG_MDIO_MODE_MASK, 1) | \
-+				 FIELD_PREP(MLXBF2_GIGE_MDIO_CFG_MDIO3_3_MASK, 1) | \
-+				 FIELD_PREP(MLXBF2_GIGE_MDIO_CFG_MDIO_FULL_DRIVE_MASK, 1) | \
-+				 FIELD_PREP(MLXBF2_GIGE_MDIO_CFG_MDIO_IN_SAMP_MASK, 6) | \
-+				 FIELD_PREP(MLXBF2_GIGE_MDIO_CFG_MDIO_OUT_SAMP_MASK, 13))
-+
-+#endif /* __MLXBF_GIGE_MDIO_BF2_H__ */
-diff --git a/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_mdio_bf3.h b/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_mdio_bf3.h
-new file mode 100644
-index 000000000000..9dd9144b9173
---- /dev/null
-+++ b/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_mdio_bf3.h
-@@ -0,0 +1,54 @@
-+/* SPDX-License-Identifier: GPL-2.0-only OR BSD-3-Clause */
-+
-+/* MDIO support for Mellanox Gigabit Ethernet driver
-+ *
-+ * Copyright (c) 2022 NVIDIA CORPORATION & AFFILIATES, ALL RIGHTS RESERVED.
-+ *
-+ * This software product is a proprietary product of NVIDIA CORPORATION &
-+ * AFFILIATES (the "Company") and all right, title, and interest in and to the
-+ * software product, including all associated intellectual property rights, are
-+ * and shall remain exclusively with the Company.
-+ *
-+ * This software product is governed by the End User License Agreement
-+ * provided with the software product.
-+ */
-+
-+#ifndef __MLXBF_GIGE_MDIO_BF3_H__
-+#define __MLXBF_GIGE_MDIO_BF3_H__
-+
-+#include <linux/bitfield.h>
-+
-+#define MLXBF3_GIGE_MDIO_GW_OFFSET	0x80
-+#define MLXBF3_GIGE_MDIO_DATA_READ	0x8c
-+#define MLXBF3_GIGE_MDIO_CFG_REG0	0x100
-+#define MLXBF3_GIGE_MDIO_CFG_REG1	0x104
-+#define MLXBF3_GIGE_MDIO_CFG_REG2	0x108
-+
-+/* MDIO GW register bits */
-+#define MLXBF3_GIGE_MDIO_GW_ST1_MASK	GENMASK(1, 1)
-+#define MLXBF3_GIGE_MDIO_GW_OPCODE_MASK	GENMASK(3, 2)
-+#define MLXBF3_GIGE_MDIO_GW_PARTAD_MASK	GENMASK(8, 4)
-+#define MLXBF3_GIGE_MDIO_GW_DEVAD_MASK	GENMASK(13, 9)
-+/* For BlueField-3, this field is only used for mdio write */
-+#define MLXBF3_GIGE_MDIO_GW_DATA_MASK	GENMASK(29, 14)
-+#define MLXBF3_GIGE_MDIO_GW_BUSY_MASK	GENMASK(30, 30)
-+
-+#define MLXBF3_GIGE_MDIO_GW_DATA_READ_MASK GENMASK(15, 0)
-+
-+#define MLXBF3_GIGE_MDIO_GW_ST1_SHIFT    1
-+#define MLXBF3_GIGE_MDIO_GW_OPCODE_SHIFT 2
-+#define MLXBF3_GIGE_MDIO_GW_PARTAD_SHIFT 4
-+#define MLXBF3_GIGE_MDIO_GW_DEVAD_SHIFT	 9
-+#define MLXBF3_GIGE_MDIO_GW_DATA_SHIFT   14
-+#define MLXBF3_GIGE_MDIO_GW_BUSY_SHIFT   30
-+
-+#define MLXBF3_GIGE_MDIO_GW_DATA_READ_SHIFT 0
-+
-+/* MDIO config register bits */
-+#define MLXBF3_GIGE_MDIO_CFG_MDIO_MODE_MASK		GENMASK(1, 0)
-+#define MLXBF3_GIGE_MDIO_CFG_MDIO_FULL_DRIVE_MASK	GENMASK(2, 2)
-+#define MLXBF3_GIGE_MDIO_CFG_MDC_PERIOD_MASK		GENMASK(7, 0)
-+#define MLXBF3_GIGE_MDIO_CFG_MDIO_IN_SAMP_MASK		GENMASK(7, 0)
-+#define MLXBF3_GIGE_MDIO_CFG_MDIO_OUT_SAMP_MASK		GENMASK(15, 8)
-+
-+#endif /* __MLXBF_GIGE_MDIO_BF3_H__ */
-diff --git a/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_regs.h b/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_regs.h
-index 7be3a793984d..8d52dbef4adf 100644
---- a/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_regs.h
-+++ b/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_regs.h
-@@ -10,6 +10,7 @@
- 
- #define MLXBF_GIGE_VERSION                            0x0000
- #define MLXBF_GIGE_VERSION_BF2                        0x0
-+#define MLXBF_GIGE_VERSION_BF3                        0x1
- #define MLXBF_GIGE_STATUS                             0x0010
- #define MLXBF_GIGE_STATUS_READY                       BIT(0)
- #define MLXBF_GIGE_INT_STATUS                         0x0028
--- 
-2.20.1
-
diff --git a/platform/mellanox/non-upstream-patches/patches/0073-mlxbf_gige-support-10M-100M-1G-speeds-on-BlueField-3.patch b/platform/mellanox/non-upstream-patches/patches/0073-mlxbf_gige-support-10M-100M-1G-speeds-on-BlueField-3.patch
deleted file mode 100644
index de0aab883..000000000
--- a/platform/mellanox/non-upstream-patches/patches/0073-mlxbf_gige-support-10M-100M-1G-speeds-on-BlueField-3.patch
+++ /dev/null
@@ -1,240 +0,0 @@
-From 4c1187581e9c7dc8cf354278c3257d8542209269 Mon Sep 17 00:00:00 2001
-From: David Thompson <davthompson@nvidia.com>
-Date: Thu, 12 Jan 2023 15:26:07 -0500
-Subject: [PATCH backport 6.1.42 73/85] mlxbf_gige: support 10M/100M/1G speeds
- on BlueField-3
-
-BugLink: https://bugs.launchpad.net/bugs/2012649
-
-The BlueField-3 OOB interface supports 10Mbps, 100Mbps, and 1Gbps speeds.
-The external PHY is responsible for autonegotiating the speed with the
-link partner. Once the autonegotiation is done, the BlueField PLU needs
-to be configured accordingly.
-
-This patch does two things:
-1) Initialize the advertised control flow/duplex/speed in the probe
-   based on the BlueField SoC generation (2 or 3)
-2) Adjust the PLU speed config in the PHY interrupt handler
-
-Signed-off-by: David Thompson <davthompson@nvidia.com>
-Signed-off-by: Asmaa Mnebhi <asmaa@nvidia.com>
-Reviewed-by: Andrew Lunn <andrew@lunn.ch>
-Signed-off-by: Jakub Kicinski <kuba@kernel.org>
-(cherry picked from commit 20d03d4d9437771a9b6d38d4a6027a70d78d9865)
-Signed-off-by: David Thompson <davthompson@nvidia.com>
-Acked-by: Tim Gardner <tim.gardner@canonical.com>
-Acked-by: Bartlomiej Zolnierkiewicz <bartlomiej.zolnierkiewicz@canonical.com>
-Signed-off-by: Bartlomiej Zolnierkiewicz <bartlomiej.zolnierkiewicz@canonical.com>
----
- .../ethernet/mellanox/mlxbf_gige/mlxbf_gige.h |   8 ++
- .../mellanox/mlxbf_gige/mlxbf_gige_main.c     | 105 +++++++++++++++---
- .../mellanox/mlxbf_gige/mlxbf_gige_regs.h     |  21 ++++
- 3 files changed, 119 insertions(+), 15 deletions(-)
-
-diff --git a/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige.h b/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige.h
-index 421a0b1b766c..a453b9cd9033 100644
---- a/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige.h
-+++ b/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige.h
-@@ -14,6 +14,7 @@
- #include <linux/irqreturn.h>
- #include <linux/netdevice.h>
- #include <linux/irq.h>
-+#include <linux/phy.h>
- 
- /* The silicon design supports a maximum RX ring size of
-  * 32K entries. Based on current testing this maximum size
-@@ -84,6 +85,12 @@ struct mlxbf_gige_mdio_gw {
- 	struct mlxbf_gige_reg_param st1;
- };
- 
-+struct mlxbf_gige_link_cfg {
-+	void (*set_phy_link_mode)(struct phy_device *phydev);
-+	void (*adjust_link)(struct net_device *netdev);
-+	phy_interface_t phy_mode;
-+};
-+
- struct mlxbf_gige {
- 	void __iomem *base;
- 	void __iomem *llu_base;
-@@ -121,6 +128,7 @@ struct mlxbf_gige {
- 	struct mlxbf_gige_stats stats;
- 	u8 hw_version;
- 	struct mlxbf_gige_mdio_gw *mdio_gw;
-+	int prev_speed;
- };
- 
- /* Rx Work Queue Element definitions */
-diff --git a/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_main.c b/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_main.c
-index a3bd14d5dbff..0af086703bcd 100644
---- a/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_main.c
-+++ b/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_main.c
-@@ -263,13 +263,99 @@ static const struct net_device_ops mlxbf_gige_netdev_ops = {
- 	.ndo_get_stats64        = mlxbf_gige_get_stats64,
- };
- 
--static void mlxbf_gige_adjust_link(struct net_device *netdev)
-+static void mlxbf_gige_bf2_adjust_link(struct net_device *netdev)
- {
- 	struct phy_device *phydev = netdev->phydev;
- 
- 	phy_print_status(phydev);
- }
- 
-+static void mlxbf_gige_bf3_adjust_link(struct net_device *netdev)
-+{
-+	struct mlxbf_gige *priv = netdev_priv(netdev);
-+	struct phy_device *phydev = netdev->phydev;
-+	u8 sgmii_mode;
-+	u16 ipg_size;
-+	u32 val;
-+
-+	if (phydev->link && phydev->speed != priv->prev_speed) {
-+		switch (phydev->speed) {
-+		case 1000:
-+			ipg_size = MLXBF_GIGE_1G_IPG_SIZE;
-+			sgmii_mode = MLXBF_GIGE_1G_SGMII_MODE;
-+			break;
-+		case 100:
-+			ipg_size = MLXBF_GIGE_100M_IPG_SIZE;
-+			sgmii_mode = MLXBF_GIGE_100M_SGMII_MODE;
-+			break;
-+		case 10:
-+			ipg_size = MLXBF_GIGE_10M_IPG_SIZE;
-+			sgmii_mode = MLXBF_GIGE_10M_SGMII_MODE;
-+			break;
-+		default:
-+			return;
-+		}
-+
-+		val = readl(priv->plu_base + MLXBF_GIGE_PLU_TX_REG0);
-+		val &= ~(MLXBF_GIGE_PLU_TX_IPG_SIZE_MASK | MLXBF_GIGE_PLU_TX_SGMII_MODE_MASK);
-+		val |= FIELD_PREP(MLXBF_GIGE_PLU_TX_IPG_SIZE_MASK, ipg_size);
-+		val |= FIELD_PREP(MLXBF_GIGE_PLU_TX_SGMII_MODE_MASK, sgmii_mode);
-+		writel(val, priv->plu_base + MLXBF_GIGE_PLU_TX_REG0);
-+
-+		val = readl(priv->plu_base + MLXBF_GIGE_PLU_RX_REG0);
-+		val &= ~MLXBF_GIGE_PLU_RX_SGMII_MODE_MASK;
-+		val |= FIELD_PREP(MLXBF_GIGE_PLU_RX_SGMII_MODE_MASK, sgmii_mode);
-+		writel(val, priv->plu_base + MLXBF_GIGE_PLU_RX_REG0);
-+
-+		priv->prev_speed = phydev->speed;
-+	}
-+
-+	phy_print_status(phydev);
-+}
-+
-+static void mlxbf_gige_bf2_set_phy_link_mode(struct phy_device *phydev)
-+{
-+	/* MAC only supports 1000T full duplex mode */
-+	phy_remove_link_mode(phydev, ETHTOOL_LINK_MODE_1000baseT_Half_BIT);
-+	phy_remove_link_mode(phydev, ETHTOOL_LINK_MODE_100baseT_Full_BIT);
-+	phy_remove_link_mode(phydev, ETHTOOL_LINK_MODE_100baseT_Half_BIT);
-+	phy_remove_link_mode(phydev, ETHTOOL_LINK_MODE_10baseT_Full_BIT);
-+	phy_remove_link_mode(phydev, ETHTOOL_LINK_MODE_10baseT_Half_BIT);
-+
-+	/* Only symmetric pause with flow control enabled is supported so no
-+	 * need to negotiate pause.
-+	 */
-+	linkmode_clear_bit(ETHTOOL_LINK_MODE_Pause_BIT, phydev->advertising);
-+	linkmode_clear_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, phydev->advertising);
-+}
-+
-+static void mlxbf_gige_bf3_set_phy_link_mode(struct phy_device *phydev)
-+{
-+	/* MAC only supports full duplex mode */
-+	phy_remove_link_mode(phydev, ETHTOOL_LINK_MODE_1000baseT_Half_BIT);
-+	phy_remove_link_mode(phydev, ETHTOOL_LINK_MODE_100baseT_Half_BIT);
-+	phy_remove_link_mode(phydev, ETHTOOL_LINK_MODE_10baseT_Half_BIT);
-+
-+	/* Only symmetric pause with flow control enabled is supported so no
-+	 * need to negotiate pause.
-+	 */
-+	linkmode_clear_bit(ETHTOOL_LINK_MODE_Pause_BIT, phydev->advertising);
-+	linkmode_clear_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, phydev->advertising);
-+}
-+
-+static struct mlxbf_gige_link_cfg mlxbf_gige_link_cfgs[] = {
-+	[MLXBF_GIGE_VERSION_BF2] = {
-+		.set_phy_link_mode = mlxbf_gige_bf2_set_phy_link_mode,
-+		.adjust_link = mlxbf_gige_bf2_adjust_link,
-+		.phy_mode = PHY_INTERFACE_MODE_GMII
-+	},
-+	[MLXBF_GIGE_VERSION_BF3] = {
-+		.set_phy_link_mode = mlxbf_gige_bf3_set_phy_link_mode,
-+		.adjust_link = mlxbf_gige_bf3_adjust_link,
-+		.phy_mode = PHY_INTERFACE_MODE_SGMII
-+	}
-+};
-+
- static int mlxbf_gige_probe(struct platform_device *pdev)
- {
- 	struct phy_device *phydev;
-@@ -359,25 +445,14 @@ static int mlxbf_gige_probe(struct platform_device *pdev)
- 	phydev->irq = phy_irq;
- 
- 	err = phy_connect_direct(netdev, phydev,
--				 mlxbf_gige_adjust_link,
--				 PHY_INTERFACE_MODE_GMII);
-+				 mlxbf_gige_link_cfgs[priv->hw_version].adjust_link,
-+				 mlxbf_gige_link_cfgs[priv->hw_version].phy_mode);
- 	if (err) {
- 		dev_err(&pdev->dev, "Could not attach to PHY\n");
- 		goto out;
- 	}
- 
--	/* MAC only supports 1000T full duplex mode */
--	phy_remove_link_mode(phydev, ETHTOOL_LINK_MODE_1000baseT_Half_BIT);
--	phy_remove_link_mode(phydev, ETHTOOL_LINK_MODE_100baseT_Full_BIT);
--	phy_remove_link_mode(phydev, ETHTOOL_LINK_MODE_100baseT_Half_BIT);
--	phy_remove_link_mode(phydev, ETHTOOL_LINK_MODE_10baseT_Full_BIT);
--	phy_remove_link_mode(phydev, ETHTOOL_LINK_MODE_10baseT_Half_BIT);
--
--	/* Only symmetric pause with flow control enabled is supported so no
--	 * need to negotiate pause.
--	 */
--	linkmode_clear_bit(ETHTOOL_LINK_MODE_Pause_BIT, phydev->advertising);
--	linkmode_clear_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, phydev->advertising);
-+	mlxbf_gige_link_cfgs[priv->hw_version].set_phy_link_mode(phydev);
- 
- 	/* Display information about attached PHY device */
- 	phy_attached_info(phydev);
-diff --git a/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_regs.h b/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_regs.h
-index 8d52dbef4adf..cd0973229c9b 100644
---- a/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_regs.h
-+++ b/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_regs.h
-@@ -8,6 +8,8 @@
- #ifndef __MLXBF_GIGE_REGS_H__
- #define __MLXBF_GIGE_REGS_H__
- 
-+#include <linux/bitfield.h>
-+
- #define MLXBF_GIGE_VERSION                            0x0000
- #define MLXBF_GIGE_VERSION_BF2                        0x0
- #define MLXBF_GIGE_VERSION_BF3                        0x1
-@@ -78,4 +80,23 @@
-  */
- #define MLXBF_GIGE_MMIO_REG_SZ                        (MLXBF_GIGE_MAC_CFG + 8)
- 
-+#define MLXBF_GIGE_PLU_TX_REG0                        0x80
-+#define MLXBF_GIGE_PLU_TX_IPG_SIZE_MASK               GENMASK(11, 0)
-+#define MLXBF_GIGE_PLU_TX_SGMII_MODE_MASK             GENMASK(15, 14)
-+
-+#define MLXBF_GIGE_PLU_RX_REG0                        0x10
-+#define MLXBF_GIGE_PLU_RX_SGMII_MODE_MASK             GENMASK(25, 24)
-+
-+#define MLXBF_GIGE_1G_SGMII_MODE                      0x0
-+#define MLXBF_GIGE_10M_SGMII_MODE                     0x1
-+#define MLXBF_GIGE_100M_SGMII_MODE                    0x2
-+
-+/* ipg_size default value for 1G is fixed by HW to 11 + End = 12.
-+ * So for 100M it is 12 * 10 - 1 = 119
-+ * For 10M, it is 12 * 100 - 1 = 1199
-+ */
-+#define MLXBF_GIGE_1G_IPG_SIZE                        11
-+#define MLXBF_GIGE_100M_IPG_SIZE                      119
-+#define MLXBF_GIGE_10M_IPG_SIZE                       1199
-+
- #endif /* !defined(__MLXBF_GIGE_REGS_H__) */
--- 
-2.20.1
-
diff --git a/platform/mellanox/non-upstream-patches/patches/0074-mlxbf_gige-add-set_link_ksettings-ethtool-callback.patch b/platform/mellanox/non-upstream-patches/patches/0074-mlxbf_gige-add-set_link_ksettings-ethtool-callback.patch
deleted file mode 100644
index e3dc4f7f8..000000000
--- a/platform/mellanox/non-upstream-patches/patches/0074-mlxbf_gige-add-set_link_ksettings-ethtool-callback.patch
+++ /dev/null
@@ -1,39 +0,0 @@
-From 58d63cc90771fb493f5cf735a05eb95331041be3 Mon Sep 17 00:00:00 2001
-From: David Thompson <davthompson@nvidia.com>
-Date: Thu, 12 Jan 2023 15:26:08 -0500
-Subject: [PATCH backport 6.1.42 74/85] mlxbf_gige: add "set_link_ksettings"
- ethtool callback
-
-BugLink: https://bugs.launchpad.net/bugs/2012649
-
-This patch extends the "ethtool_ops" data structure to
-include the "set_link_ksettings" callback. This change
-enables configuration of the various interface speeds
-that the BlueField-3 supports (10Mbps, 100Mbps, and 1Gbps).
-
-Signed-off-by: David Thompson <davthompson@nvidia.com>
-Signed-off-by: Asmaa Mnebhi <asmaa@nvidia.com>
-Reviewed-by: Andrew Lunn <andrew@lunn.ch>
-Signed-off-by: Jakub Kicinski <kuba@kernel.org>
-(cherry picked from commit cedd97737a1f302b3d0493d7054a35e0c5997b99)
-Signed-off-by: David Thompson <davthompson@nvidia.com>
-Acked-by: Tim Gardner <tim.gardner@canonical.com>
-Acked-by: Bartlomiej Zolnierkiewicz <bartlomiej.zolnierkiewicz@canonical.com>
-Signed-off-by: Bartlomiej Zolnierkiewicz <bartlomiej.zolnierkiewicz@canonical.com>
----
- drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_ethtool.c | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_ethtool.c b/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_ethtool.c
-index 4becb39b5664..8c5c81981ce7 100644
---- a/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_ethtool.c
-+++ b/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_ethtool.c
-@@ -175,4 +175,5 @@ const struct ethtool_ops mlxbf_gige_ethtool_ops = {
- 	.nway_reset		= phy_ethtool_nway_reset,
- 	.get_pauseparam		= mlxbf_gige_get_pauseparam,
- 	.get_link_ksettings	= phy_ethtool_get_link_ksettings,
-+	.set_link_ksettings	= phy_ethtool_set_link_ksettings,
- };
--- 
-2.20.1
-
diff --git a/platform/mellanox/non-upstream-patches/patches/0075-UBUNTU-SAUCE-mlxbf-gige-Fix-kernel-panic-at-shutdown.patch b/platform/mellanox/non-upstream-patches/patches/0075-UBUNTU-SAUCE-mlxbf-gige-Fix-kernel-panic-at-shutdown.patch
deleted file mode 100644
index a79977d3c..000000000
--- a/platform/mellanox/non-upstream-patches/patches/0075-UBUNTU-SAUCE-mlxbf-gige-Fix-kernel-panic-at-shutdown.patch
+++ /dev/null
@@ -1,48 +0,0 @@
-From 7124b7b040a0cda35c09be51ac40e8e52026ec2d Mon Sep 17 00:00:00 2001
-From: Asmaa Mnebhi <asmaa@nvidia.com>
-Date: Fri, 2 Jun 2023 13:04:25 -0400
-Subject: [PATCH backport 6.1.42 75/85] UBUNTU: SAUCE: mlxbf-gige: Fix kernel
- panic at shutdown
-
-BugLink: https://bugs.launchpad.net/bugs/2022370
-
-We occasionally see a race condition (once every 350 reboots) where napi is still
-running (mlxbf_gige_poll) while a shutdown has been initiated through "reboot".
-Since mlxbf_gige_poll is still running, it tries to access a NULL pointer and as
-a result causes a kernel panic.
-
-The fix is to explicitly disable napi and dequeue it during shutdown.
-mlxbf_gige_remove already calls:
-unregister_netdev->unregister_netdevice->unregister_netdev_queue->
-rollback_registered->rollback_registered_many->dev_close_many->
-__dev_close_many->ndo_stop->mlxbf_gige_stop which stops napi
-
-So use mlxbf_gige_remove in place of the existing shutdown logic.
-
-Signed-off-by: Asmaa Mnebhi <asmaa@nvidia.com>
-Acked-by: Bartlomiej Zolnierkiewicz <bartlomiej.zolnierkiewicz@canonical.com>
-Acked-by: Tim Gardner <tim.gardner@canonical.com>
-Signed-off-by: Bartlomiej Zolnierkiewicz <bartlomiej.zolnierkiewicz@canonical.com>
----
- drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_main.c | 5 +----
- 1 file changed, 1 insertion(+), 4 deletions(-)
-
-diff --git a/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_main.c b/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_main.c
-index 0af086703bcd..fe35b5a24219 100644
---- a/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_main.c
-+++ b/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_main.c
-@@ -485,10 +485,7 @@ static int mlxbf_gige_remove(struct platform_device *pdev)
- 
- static void mlxbf_gige_shutdown(struct platform_device *pdev)
- {
--	struct mlxbf_gige *priv = platform_get_drvdata(pdev);
--
--	writeq(0, priv->base + MLXBF_GIGE_INT_EN);
--	mlxbf_gige_clean_port(priv);
-+	mlxbf_gige_remove(pdev);
- }
- 
- static const struct acpi_device_id __maybe_unused mlxbf_gige_acpi_match[] = {
--- 
-2.20.1
-
diff --git a/platform/mellanox/non-upstream-patches/patches/0076-UBUNTU-SAUCE-platform-mellanox-Updates-to-mlxbf-boot.patch b/platform/mellanox/non-upstream-patches/patches/0076-UBUNTU-SAUCE-platform-mellanox-Updates-to-mlxbf-boot.patch
deleted file mode 100644
index d320f09fe..000000000
--- a/platform/mellanox/non-upstream-patches/patches/0076-UBUNTU-SAUCE-platform-mellanox-Updates-to-mlxbf-boot.patch
+++ /dev/null
@@ -1,1719 +0,0 @@
-From 4651b1520abcc8744493d41e1ebc1dbee3035904 Mon Sep 17 00:00:00 2001
-From: Shravan Kumar Ramani <shravankr@nvidia.com>
-Date: Wed, 6 Jul 2022 07:37:22 -0400
-Subject: [PATCH backport 6.1.42 76/85] UBUNTU: SAUCE: platform/mellanox:
- Updates to mlxbf-bootctl
-
-BugLink: https://launchpad.net/bugs/1980832
-
-The driver supports the VPD fields in the EEPROM and exposes
-sysfs files for configuring and reading the same.
-Also address buffer overflow and exclusion issues.
-
-Signed-off-by: Shravan Kumar Ramani <shravankr@nvidia.com>
-Signed-off-by: Ike Panhc <ike.pan@canonical.com>
----
- drivers/platform/mellanox/mlxbf-bootctl.c | 1410 ++++++++++++++++++---
- drivers/platform/mellanox/mlxbf-bootctl.h |   88 +-
- 2 files changed, 1268 insertions(+), 230 deletions(-)
-
-diff --git a/drivers/platform/mellanox/mlxbf-bootctl.c b/drivers/platform/mellanox/mlxbf-bootctl.c
-index 1c7a288b59a5..2302e1e09c7e 100644
---- a/drivers/platform/mellanox/mlxbf-bootctl.c
-+++ b/drivers/platform/mellanox/mlxbf-bootctl.c
-@@ -1,51 +1,129 @@
--// SPDX-License-Identifier: GPL-2.0+
-+// SPDX-License-Identifier: GPL-2.0 or BSD-3-Clause
- /*
-- * Mellanox boot control driver
-+ *  Mellanox boot control driver
-+ *  This driver provides a sysfs interface for systems management
-+ *  software to manage reset-time actions.
-  *
-- * This driver provides a sysfs interface for systems management
-- * software to manage reset-time actions.
-+ *  Copyright (C) 2020 Mellanox Technologies.  All rights reserved.
-  *
-- * Copyright (C) 2019 Mellanox Technologies
-+ *  This program is free software; you can redistribute it and/or modify
-+ *  it under the terms of the GNU General Public License v2.0 as published by
-+ *  the Free Software Foundation.
-+ *
-+ *  This program is distributed in the hope that it will be useful,
-+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-+ *  GNU General Public License for more details.
-  */
- 
- #include <linux/acpi.h>
- #include <linux/arm-smccc.h>
-+#include <linux/delay.h>
-+#include <linux/if_ether.h>
- #include <linux/module.h>
- #include <linux/platform_device.h>
--
- #include "mlxbf-bootctl.h"
- 
--#define MLXBF_BOOTCTL_SB_SECURE_MASK		0x03
--#define MLXBF_BOOTCTL_SB_TEST_MASK		0x0c
-+#define DRIVER_NAME		"mlxbf-bootctl"
-+#define DRIVER_VERSION		"1.5"
-+#define DRIVER_DESCRIPTION	"Mellanox boot control driver"
-+
-+#define SB_MODE_SECURE_MASK	0x03
-+#define SB_MODE_TEST_MASK	0x0c
-+#define SB_MODE_DEV_MASK	0x10
- 
--#define MLXBF_SB_KEY_NUM			4
-+#define SB_KEY_NUM		4
-+
-+struct boot_name {
-+	int value;
-+	const char name[12];
-+};
- 
--/* UUID used to probe ATF service. */
--static const char *mlxbf_bootctl_svc_uuid_str =
--	"89c036b4-e7d7-11e6-8797-001aca00bfc4";
-+static struct boot_name boot_names[] = {
-+	{ MLNX_BOOT_EXTERNAL,		"external"	},
-+	{ MLNX_BOOT_EMMC,		"emmc"		},
-+	{ MLNX_BOOT_SWAP_EMMC,		"swap_emmc"	},
-+	{ MLNX_BOOT_EMMC_LEGACY,	"emmc_legacy"	},
-+	{ MLNX_BOOT_NONE,		"none"		},
-+	{ -1,				""		}
-+};
- 
--struct mlxbf_bootctl_name {
--	u32 value;
--	const char *name;
-+enum {
-+	SB_LIFECYCLE_PRODUCTION = 0,
-+	SB_LIFECYCLE_GA_SECURE = 1,
-+	SB_LIFECYCLE_GA_NON_SECURE = 2,
-+	SB_LIFECYCLE_RMA = 3
- };
- 
--static struct mlxbf_bootctl_name boot_names[] = {
--	{ MLXBF_BOOTCTL_EXTERNAL, "external" },
--	{ MLXBF_BOOTCTL_EMMC, "emmc" },
--	{ MLNX_BOOTCTL_SWAP_EMMC, "swap_emmc" },
--	{ MLXBF_BOOTCTL_EMMC_LEGACY, "emmc_legacy" },
--	{ MLXBF_BOOTCTL_NONE, "none" },
-+static char lifecycle_states[][16] = {
-+	[SB_LIFECYCLE_PRODUCTION] = "Production",
-+	[SB_LIFECYCLE_GA_SECURE] = "GA Secured",
-+	[SB_LIFECYCLE_GA_NON_SECURE] = "GA Non-Secured",
-+	[SB_LIFECYCLE_RMA] = "RMA",
- };
- 
--static const char * const mlxbf_bootctl_lifecycle_states[] = {
--	[0] = "Production",
--	[1] = "GA Secured",
--	[2] = "GA Non-Secured",
--	[3] = "RMA",
-+/* ctl/data register within the resource. */
-+#define RSH_SCRATCH_BUF_CTL_OFF		0
-+#define RSH_SCRATCH_BUF_DATA_OFF	0x10
-+
-+static void __iomem *rsh_boot_data;
-+static void __iomem *rsh_boot_cnt;
-+static void __iomem *rsh_semaphore;
-+static void __iomem *rsh_scratch_buf_ctl;
-+static void __iomem *rsh_scratch_buf_data;
-+
-+static int rsh_log_clear_on_read;
-+module_param(rsh_log_clear_on_read, int, 0644);
-+MODULE_PARM_DESC(rsh_log_clear_on_read, "Clear rshim logging buffer after read.");
-+
-+/*
-+ * Objects are stored within the MFG partition per type. Type 0 is not
-+ * supported.
-+ */
-+enum {
-+	MLNX_MFG_TYPE_OOB_MAC = 1,
-+	MLNX_MFG_TYPE_OPN_0,
-+	MLNX_MFG_TYPE_OPN_1,
-+	MLNX_MFG_TYPE_OPN_2,
-+	MLNX_MFG_TYPE_SKU_0,
-+	MLNX_MFG_TYPE_SKU_1,
-+	MLNX_MFG_TYPE_SKU_2,
-+	MLNX_MFG_TYPE_MODL_0,
-+	MLNX_MFG_TYPE_MODL_1,
-+	MLNX_MFG_TYPE_MODL_2,
-+	MLNX_MFG_TYPE_SN_0,
-+	MLNX_MFG_TYPE_SN_1,
-+	MLNX_MFG_TYPE_SN_2,
-+	MLNX_MFG_TYPE_UUID_0,
-+	MLNX_MFG_TYPE_UUID_1,
-+	MLNX_MFG_TYPE_UUID_2,
-+	MLNX_MFG_TYPE_UUID_3,
-+	MLNX_MFG_TYPE_UUID_4,
-+	MLNX_MFG_TYPE_REV,
- };
- 
--/* ARM SMC call which is atomic and no need for lock. */
--static int mlxbf_bootctl_smc(unsigned int smc_op, int smc_arg)
-+/* This mutex is used to serialize MFG write and lock operations. */
-+static DEFINE_MUTEX(mfg_ops_lock);
-+
-+#define MLNX_MFG_OOB_MAC_LEN         ETH_ALEN
-+#define MLNX_MFG_OPN_VAL_LEN         24
-+#define MLNX_MFG_SKU_VAL_LEN         24
-+#define MLNX_MFG_MODL_VAL_LEN        24
-+#define MLNX_MFG_SN_VAL_LEN          24
-+#define MLNX_MFG_UUID_VAL_LEN        40
-+#define MLNX_MFG_REV_VAL_LEN         8
-+#define MLNX_MFG_VAL_QWORD_CNT(type) \
-+	(MLNX_MFG_##type##_VAL_LEN / sizeof(u64))
-+
-+/*
-+ * The MAC address consists of 6 bytes (2 digits each) separated by ':'.
-+ * The expected format is: "XX:XX:XX:XX:XX:XX"
-+ */
-+#define MLNX_MFG_OOB_MAC_FORMAT_LEN \
-+	((MLNX_MFG_OOB_MAC_LEN * 2) + (MLNX_MFG_OOB_MAC_LEN - 1))
-+
-+/* The SMC calls in question are atomic, so we don't have to lock here. */
-+static int smc_call1(unsigned int smc_op, int smc_arg)
- {
- 	struct arm_smccc_res res;
- 
-@@ -54,268 +132,1212 @@ static int mlxbf_bootctl_smc(unsigned int smc_op, int smc_arg)
- 	return res.a0;
- }
- 
--/* Return the action in integer or an error code. */
--static int mlxbf_bootctl_reset_action_to_val(const char *action)
-+/* Syntactic sugar to avoid having to specify an unused argument. */
-+#define smc_call0(smc_op) smc_call1(smc_op, 0)
-+
-+static int reset_action_to_val(const char *action, size_t len)
- {
--	int i;
-+	struct boot_name *bn;
-+
-+	/* Accept string either with or without a newline terminator */
-+	if (action[len-1] == '\n')
-+		--len;
- 
--	for (i = 0; i < ARRAY_SIZE(boot_names); i++)
--		if (sysfs_streq(boot_names[i].name, action))
--			return boot_names[i].value;
-+	for (bn = boot_names; bn->value >= 0; ++bn)
-+		if (strncmp(bn->name, action, len) == 0)
-+			break;
- 
--	return -EINVAL;
-+	return bn->value;
- }
- 
--/* Return the action in string. */
--static const char *mlxbf_bootctl_action_to_string(int action)
-+static const char *reset_action_to_string(int action)
- {
--	int i;
-+	struct boot_name *bn;
- 
--	for (i = 0; i < ARRAY_SIZE(boot_names); i++)
--		if (boot_names[i].value == action)
--			return boot_names[i].name;
-+	for (bn = boot_names; bn->value >= 0; ++bn)
-+		if (bn->value == action)
-+			break;
- 
--	return "invalid action";
-+	return bn->name;
- }
- 
--static ssize_t post_reset_wdog_show(struct device *dev,
--				    struct device_attribute *attr, char *buf)
-+static ssize_t post_reset_wdog_show(struct device_driver *drv,
-+				    char *buf)
- {
--	int ret;
-+	return snprintf(buf, PAGE_SIZE, "%d\n",
-+			smc_call0(MLNX_GET_POST_RESET_WDOG));
-+}
- 
--	ret = mlxbf_bootctl_smc(MLXBF_BOOTCTL_GET_POST_RESET_WDOG, 0);
--	if (ret < 0)
--		return ret;
-+static ssize_t post_reset_wdog_store(struct device_driver *drv,
-+				     const char *buf, size_t count)
-+{
-+	int err;
-+	unsigned long watchdog;
-+
-+	err = kstrtoul(buf, 10, &watchdog);
-+	if (err)
-+		return err;
-+
-+	if (smc_call1(MLNX_SET_POST_RESET_WDOG, watchdog) < 0)
-+		return -EINVAL;
- 
--	return sprintf(buf, "%d\n", ret);
-+	return count;
- }
- 
--static ssize_t post_reset_wdog_store(struct device *dev,
--				     struct device_attribute *attr,
--				     const char *buf, size_t count)
-+static ssize_t reset_action_show(struct device_driver *drv,
-+				 char *buf)
- {
--	unsigned long value;
--	int ret;
-+	return snprintf(buf, PAGE_SIZE, "%s\n", reset_action_to_string(
-+			smc_call0(MLNX_GET_RESET_ACTION)));
-+}
- 
--	ret = kstrtoul(buf, 10, &value);
--	if (ret)
--		return ret;
-+static ssize_t reset_action_store(struct device_driver *drv,
-+				  const char *buf, size_t count)
-+{
-+	int action = reset_action_to_val(buf, count);
- 
--	ret = mlxbf_bootctl_smc(MLXBF_BOOTCTL_SET_POST_RESET_WDOG, value);
--	if (ret < 0)
--		return ret;
-+	if (action < 0 || action == MLNX_BOOT_NONE)
-+		return -EINVAL;
-+
-+	if (smc_call1(MLNX_SET_RESET_ACTION, action) < 0)
-+		return -EINVAL;
- 
- 	return count;
- }
- 
--static ssize_t mlxbf_bootctl_show(int smc_op, char *buf)
-+static ssize_t second_reset_action_show(struct device_driver *drv,
-+					char *buf)
- {
--	int action;
-+	return snprintf(buf, PAGE_SIZE, "%s\n", reset_action_to_string(
-+			smc_call0(MLNX_GET_SECOND_RESET_ACTION)));
-+}
-+
-+static ssize_t second_reset_action_store(struct device_driver *drv,
-+					 const char *buf, size_t count)
-+{
-+	int action = reset_action_to_val(buf, count);
- 
--	action = mlxbf_bootctl_smc(smc_op, 0);
- 	if (action < 0)
--		return action;
-+		return -EINVAL;
-+
-+	if (smc_call1(MLNX_SET_SECOND_RESET_ACTION, action) < 0)
-+		return -EINVAL;
- 
--	return sprintf(buf, "%s\n", mlxbf_bootctl_action_to_string(action));
-+	return count;
- }
- 
--static int mlxbf_bootctl_store(int smc_op, const char *buf, size_t count)
-+static ssize_t lifecycle_state_show(struct device_driver *drv,
-+				    char *buf)
- {
--	int ret, action;
-+	int lc_state = smc_call1(MLNX_GET_TBB_FUSE_STATUS,
-+				 MLNX_FUSE_STATUS_LIFECYCLE);
- 
--	action = mlxbf_bootctl_reset_action_to_val(buf);
--	if (action < 0)
--		return action;
-+	if (lc_state < 0)
-+		return -EINVAL;
-+
-+	lc_state &= (SB_MODE_TEST_MASK |
-+		     SB_MODE_SECURE_MASK |
-+		     SB_MODE_DEV_MASK);
- 
--	ret = mlxbf_bootctl_smc(smc_op, action);
--	if (ret < 0)
--		return ret;
-+	/*
-+	 * If the test bits are set, we specify that the current state may be
-+	 * due to using the test bits.
-+	 */
-+	if ((lc_state & SB_MODE_TEST_MASK) != 0) {
-+
-+		lc_state &= SB_MODE_SECURE_MASK;
-+
-+		return snprintf(buf, PAGE_SIZE, "%s(test)\n",
-+				lifecycle_states[lc_state]);
-+	} else if ((lc_state & SB_MODE_SECURE_MASK) == SB_LIFECYCLE_GA_SECURE
-+		   && (lc_state & SB_MODE_DEV_MASK)) {
-+		return snprintf(buf, PAGE_SIZE, "Secured (development)\n");
-+	}
-+
-+	return snprintf(buf, PAGE_SIZE, "%s\n", lifecycle_states[lc_state]);
-+}
-+
-+static ssize_t secure_boot_fuse_state_show(struct device_driver *drv,
-+					   char *buf)
-+{
-+	int key;
-+	int buf_len = 0;
-+	int upper_key_used = 0;
-+	int sb_key_state = smc_call1(MLNX_GET_TBB_FUSE_STATUS,
-+				     MLNX_FUSE_STATUS_KEYS);
-+
-+	if (sb_key_state < 0)
-+		return -EINVAL;
-+
-+	for (key = SB_KEY_NUM - 1; key >= 0; key--) {
-+		int burnt = ((sb_key_state & (1 << key)) != 0);
-+		int valid = ((sb_key_state & (1 << (key + SB_KEY_NUM))) != 0);
-+
-+		buf_len += sprintf(buf + buf_len, "Ver%d:", key);
-+		if (upper_key_used) {
-+			if (burnt) {
-+				if (valid)
-+					buf_len += sprintf(buf + buf_len,
-+							  "Used");
-+				else
-+					buf_len += sprintf(buf + buf_len,
-+							  "Wasted");
-+			} else {
-+				if (valid)
-+					buf_len += sprintf(buf + buf_len,
-+							  "Invalid");
-+				else
-+					buf_len += sprintf(buf + buf_len,
-+							  "Skipped");
-+			}
-+		} else {
-+			if (burnt) {
-+				if (valid) {
-+					upper_key_used = 1;
-+					buf_len += sprintf(buf + buf_len,
-+							  "In use");
-+				} else
-+					buf_len += sprintf(buf + buf_len,
-+							  "Burn incomplete");
-+			} else {
-+				if (valid)
-+					buf_len += sprintf(buf + buf_len,
-+							  "Invalid");
-+				else
-+					buf_len += sprintf(buf + buf_len,
-+							  "Free");
-+			}
-+		}
-+		buf_len += sprintf(buf + buf_len, "\n");
-+	}
-+
-+	return buf_len;
-+}
-+
-+static ssize_t fw_reset_store(struct device_driver *drv,
-+			      const char *buf, size_t count)
-+{
-+	int err;
-+	unsigned long key;
-+
-+	err = kstrtoul(buf, 16, &key);
-+	if (err)
-+		return err;
-+
-+	if (smc_call1(MLNX_HANDLE_FW_RESET, key) < 0)
-+		return -EINVAL;
- 
- 	return count;
- }
- 
--static ssize_t reset_action_show(struct device *dev,
--				 struct device_attribute *attr, char *buf)
-+static ssize_t oob_mac_show(struct device_driver *drv, char *buf)
- {
--	return mlxbf_bootctl_show(MLXBF_BOOTCTL_GET_RESET_ACTION, buf);
-+	char mac_str[MLNX_MFG_OOB_MAC_FORMAT_LEN + 1] = { 0 };
-+	struct arm_smccc_res res;
-+	u8 *mac_byte_ptr;
-+
-+	mutex_lock(&mfg_ops_lock);
-+	arm_smccc_smc(MLNX_HANDLE_GET_MFG_INFO, MLNX_MFG_TYPE_OOB_MAC, 0, 0, 0,
-+		      0, 0, 0, &res);
-+	mutex_unlock(&mfg_ops_lock);
-+	if (res.a0)
-+		return -EPERM;
-+
-+	mac_byte_ptr = (u8 *)&res.a1;
-+
-+	sprintf(mac_str, "%02X:%02X:%02X:%02X:%02X:%02X",
-+		mac_byte_ptr[0], mac_byte_ptr[1], mac_byte_ptr[2],
-+		mac_byte_ptr[3], mac_byte_ptr[4], mac_byte_ptr[5]);
-+
-+	return snprintf(buf, PAGE_SIZE, "%s", mac_str);
- }
- 
--static ssize_t reset_action_store(struct device *dev,
--				  struct device_attribute *attr,
--				  const char *buf, size_t count)
-+static ssize_t oob_mac_store(struct device_driver *drv, const char *buf,
-+			     size_t count)
-+{
-+	int byte[MLNX_MFG_OOB_MAC_FORMAT_LEN] = { 0 };
-+	struct arm_smccc_res res;
-+	u64 mac_addr = 0;
-+	u8 *mac_byte_ptr;
-+	int byte_idx, len;
-+
-+	if ((count - 1) != MLNX_MFG_OOB_MAC_FORMAT_LEN)
-+		return -EINVAL;
-+
-+	len = sscanf(buf, "%02x:%02x:%02x:%02x:%02x:%02x",
-+		     &byte[0], &byte[1], &byte[2],
-+		     &byte[3], &byte[4], &byte[5]);
-+	if (len != MLNX_MFG_OOB_MAC_LEN)
-+		return -EINVAL;
-+
-+	mac_byte_ptr = (u8 *)&mac_addr;
-+
-+	for (byte_idx = 0; byte_idx < MLNX_MFG_OOB_MAC_LEN; byte_idx++)
-+		mac_byte_ptr[byte_idx] = (u8) byte[byte_idx];
-+
-+	mutex_lock(&mfg_ops_lock);
-+	arm_smccc_smc(MLNX_HANDLE_SET_MFG_INFO, MLNX_MFG_TYPE_OOB_MAC,
-+		  MLNX_MFG_OOB_MAC_LEN, mac_addr, 0, 0, 0, 0, &res);
-+	mutex_unlock(&mfg_ops_lock);
-+
-+	return res.a0 ? -EPERM : count;
-+}
-+
-+static ssize_t opn_show(struct device_driver *drv, char *buf)
- {
--	return mlxbf_bootctl_store(MLXBF_BOOTCTL_SET_RESET_ACTION, buf, count);
-+	u64 opn_data[MLNX_MFG_VAL_QWORD_CNT(OPN)] = { 0 };
-+	char opn[MLNX_MFG_OPN_VAL_LEN + 1] = { 0 };
-+	struct arm_smccc_res res;
-+	int word;
-+
-+	mutex_lock(&mfg_ops_lock);
-+	for (word = 0; word < MLNX_MFG_VAL_QWORD_CNT(OPN); word++) {
-+		arm_smccc_smc(MLNX_HANDLE_GET_MFG_INFO,
-+			      MLNX_MFG_TYPE_OPN_0 + word,
-+			      0, 0, 0, 0, 0, 0, &res);
-+		if (res.a0) {
-+			mutex_unlock(&mfg_ops_lock);
-+			return -EPERM;
-+		}
-+		opn_data[word] = res.a1;
-+	}
-+	mutex_unlock(&mfg_ops_lock);
-+	memcpy(opn, opn_data, MLNX_MFG_OPN_VAL_LEN);
-+
-+	return snprintf(buf, PAGE_SIZE, "%s", opn);
- }
- 
--static ssize_t second_reset_action_show(struct device *dev,
--					struct device_attribute *attr,
--					char *buf)
-+static ssize_t opn_store(struct device_driver *drv, const char *buf,
-+			 size_t count)
- {
--	return mlxbf_bootctl_show(MLXBF_BOOTCTL_GET_SECOND_RESET_ACTION, buf);
-+	u64 opn[MLNX_MFG_VAL_QWORD_CNT(OPN)] = { 0 };
-+	struct arm_smccc_res res;
-+	int word;
-+
-+	if (count > MLNX_MFG_OPN_VAL_LEN)
-+		return -EINVAL;
-+
-+	memcpy(opn, buf, count);
-+
-+	mutex_lock(&mfg_ops_lock);
-+	for (word = 0; word < MLNX_MFG_VAL_QWORD_CNT(OPN); word++) {
-+		arm_smccc_smc(MLNX_HANDLE_SET_MFG_INFO,
-+			      MLNX_MFG_TYPE_OPN_0 + word,
-+			      sizeof(u64), opn[word], 0, 0, 0, 0, &res);
-+		if (res.a0) {
-+			mutex_unlock(&mfg_ops_lock);
-+			return -EPERM;
-+		}
-+	}
-+	mutex_unlock(&mfg_ops_lock);
-+
-+	return count;
- }
- 
--static ssize_t second_reset_action_store(struct device *dev,
--					 struct device_attribute *attr,
--					 const char *buf, size_t count)
-+static ssize_t sku_show(struct device_driver *drv, char *buf)
- {
--	return mlxbf_bootctl_store(MLXBF_BOOTCTL_SET_SECOND_RESET_ACTION, buf,
--				   count);
-+	u64 sku_data[MLNX_MFG_VAL_QWORD_CNT(SKU)] = { 0 };
-+	char sku[MLNX_MFG_SKU_VAL_LEN + 1] = { 0 };
-+	struct arm_smccc_res res;
-+	int word;
-+
-+	mutex_lock(&mfg_ops_lock);
-+	for (word = 0; word < MLNX_MFG_VAL_QWORD_CNT(SKU); word++) {
-+		arm_smccc_smc(MLNX_HANDLE_GET_MFG_INFO,
-+			      MLNX_MFG_TYPE_SKU_0 + word,
-+			      0, 0, 0, 0, 0, 0, &res);
-+		if (res.a0) {
-+			mutex_unlock(&mfg_ops_lock);
-+			return -EPERM;
-+		}
-+		sku_data[word] = res.a1;
-+	}
-+	mutex_unlock(&mfg_ops_lock);
-+	memcpy(sku, sku_data, MLNX_MFG_SKU_VAL_LEN);
-+
-+	return snprintf(buf, PAGE_SIZE, "%s", sku);
- }
- 
--static ssize_t lifecycle_state_show(struct device *dev,
--				    struct device_attribute *attr, char *buf)
-+static ssize_t sku_store(struct device_driver *drv, const char *buf,
-+			 size_t count)
- {
--	int lc_state;
-+	u64 sku[MLNX_MFG_VAL_QWORD_CNT(SKU)] = { 0 };
-+	struct arm_smccc_res res;
-+	int word;
- 
--	lc_state = mlxbf_bootctl_smc(MLXBF_BOOTCTL_GET_TBB_FUSE_STATUS,
--				     MLXBF_BOOTCTL_FUSE_STATUS_LIFECYCLE);
--	if (lc_state < 0)
--		return lc_state;
-+	if (count > MLNX_MFG_SKU_VAL_LEN)
-+		return -EINVAL;
- 
--	lc_state &=
--		MLXBF_BOOTCTL_SB_TEST_MASK | MLXBF_BOOTCTL_SB_SECURE_MASK;
-+	memcpy(sku, buf, count);
- 
--	/*
--	 * If the test bits are set, we specify that the current state may be
--	 * due to using the test bits.
--	 */
--	if (lc_state & MLXBF_BOOTCTL_SB_TEST_MASK) {
--		lc_state &= MLXBF_BOOTCTL_SB_SECURE_MASK;
-+	mutex_lock(&mfg_ops_lock);
-+	for (word = 0; word < MLNX_MFG_VAL_QWORD_CNT(SKU); word++) {
-+		arm_smccc_smc(MLNX_HANDLE_SET_MFG_INFO,
-+			      MLNX_MFG_TYPE_SKU_0 + word,
-+			      sizeof(u64), sku[word], 0, 0, 0, 0, &res);
-+		if (res.a0) {
-+			mutex_unlock(&mfg_ops_lock);
-+			return -EPERM;
-+		}
-+	}
-+	mutex_unlock(&mfg_ops_lock);
- 
--		return sprintf(buf, "%s(test)\n",
--			       mlxbf_bootctl_lifecycle_states[lc_state]);
-+	return count;
-+}
-+
-+static ssize_t modl_show(struct device_driver *drv, char *buf)
-+{
-+	u64 modl_data[MLNX_MFG_VAL_QWORD_CNT(MODL)] = { 0 };
-+	char modl[MLNX_MFG_MODL_VAL_LEN + 1] = { 0 };
-+	struct arm_smccc_res res;
-+	int word;
-+
-+	mutex_lock(&mfg_ops_lock);
-+	for (word = 0; word < MLNX_MFG_VAL_QWORD_CNT(MODL); word++) {
-+		arm_smccc_smc(MLNX_HANDLE_GET_MFG_INFO,
-+			      MLNX_MFG_TYPE_MODL_0 + word,
-+			      0, 0, 0, 0, 0, 0, &res);
-+		if (res.a0) {
-+			mutex_unlock(&mfg_ops_lock);
-+			return -EPERM;
-+		}
-+		modl_data[word] = res.a1;
- 	}
-+	mutex_unlock(&mfg_ops_lock);
-+	memcpy(modl, modl_data, MLNX_MFG_MODL_VAL_LEN);
- 
--	return sprintf(buf, "%s\n", mlxbf_bootctl_lifecycle_states[lc_state]);
-+	return snprintf(buf, PAGE_SIZE, "%s", modl);
- }
- 
--static ssize_t secure_boot_fuse_state_show(struct device *dev,
--					   struct device_attribute *attr,
--					   char *buf)
-+static ssize_t modl_store(struct device_driver *drv, const char *buf,
-+			  size_t count)
- {
--	int burnt, valid, key, key_state, buf_len = 0, upper_key_used = 0;
--	const char *status;
-+	u64 modl[MLNX_MFG_VAL_QWORD_CNT(MODL)] = { 0 };
-+	struct arm_smccc_res res;
-+	int word;
-+
-+	if (count > MLNX_MFG_MODL_VAL_LEN)
-+		return -EINVAL;
-+
-+	memcpy(modl, buf, count);
-+
-+	mutex_lock(&mfg_ops_lock);
-+	for (word = 0; word < MLNX_MFG_VAL_QWORD_CNT(MODL); word++) {
-+		arm_smccc_smc(MLNX_HANDLE_SET_MFG_INFO,
-+			      MLNX_MFG_TYPE_MODL_0 + word,
-+			      sizeof(u64), modl[word], 0, 0, 0, 0, &res);
-+		if (res.a0) {
-+			mutex_unlock(&mfg_ops_lock);
-+			return -EPERM;
-+		}
-+	}
-+	mutex_unlock(&mfg_ops_lock);
-+
-+	return count;
-+}
-+
-+static ssize_t sn_show(struct device_driver *drv, char *buf)
-+{
-+	u64 sn_data[MLNX_MFG_VAL_QWORD_CNT(SN)] = { 0 };
-+	char sn[MLNX_MFG_SN_VAL_LEN + 1] = { 0 };
-+	struct arm_smccc_res res;
-+	int word;
-+
-+	mutex_lock(&mfg_ops_lock);
-+	for (word = 0; word < MLNX_MFG_VAL_QWORD_CNT(SN); word++) {
-+		arm_smccc_smc(MLNX_HANDLE_GET_MFG_INFO,
-+			      MLNX_MFG_TYPE_SN_0 + word,
-+			      0, 0, 0, 0, 0, 0, &res);
-+		if (res.a0) {
-+			mutex_unlock(&mfg_ops_lock);
-+			return -EPERM;
-+		}
-+		sn_data[word] = res.a1;
-+	}
-+	mutex_unlock(&mfg_ops_lock);
-+	memcpy(sn, sn_data, MLNX_MFG_SN_VAL_LEN);
-+
-+	return snprintf(buf, PAGE_SIZE, "%s", sn);
-+}
-+
-+static ssize_t sn_store(struct device_driver *drv, const char *buf,
-+			size_t count)
-+{
-+	u64 sn[MLNX_MFG_VAL_QWORD_CNT(SN)] = { 0 };
-+	struct arm_smccc_res res;
-+	int word;
-+
-+	if (count > MLNX_MFG_SN_VAL_LEN)
-+		return -EINVAL;
-+
-+	memcpy(sn, buf, count);
-+
-+	mutex_lock(&mfg_ops_lock);
-+	for (word = 0; word < MLNX_MFG_VAL_QWORD_CNT(SN); word++) {
-+		arm_smccc_smc(MLNX_HANDLE_SET_MFG_INFO,
-+			      MLNX_MFG_TYPE_SN_0 + word,
-+			      sizeof(u64), sn[word], 0, 0, 0, 0, &res);
-+		if (res.a0) {
-+			mutex_unlock(&mfg_ops_lock);
-+			return -EPERM;
-+		}
-+	}
-+	mutex_unlock(&mfg_ops_lock);
-+
-+	return count;
-+}
-+
-+static ssize_t uuid_show(struct device_driver *drv, char *buf)
-+{
-+	u64 uuid_data[MLNX_MFG_VAL_QWORD_CNT(UUID)] = { 0 };
-+	char uuid[MLNX_MFG_UUID_VAL_LEN + 1] = { 0 };
-+	struct arm_smccc_res res;
-+	int word;
-+
-+	mutex_lock(&mfg_ops_lock);
-+	for (word = 0; word < MLNX_MFG_VAL_QWORD_CNT(UUID); word++) {
-+		arm_smccc_smc(MLNX_HANDLE_GET_MFG_INFO,
-+			      MLNX_MFG_TYPE_UUID_0 + word,
-+			      0, 0, 0, 0, 0, 0, &res);
-+		if (res.a0) {
-+			mutex_unlock(&mfg_ops_lock);
-+			return -EPERM;
-+		}
-+		uuid_data[word] = res.a1;
-+	}
-+	mutex_unlock(&mfg_ops_lock);
-+	memcpy(uuid, uuid_data, MLNX_MFG_UUID_VAL_LEN);
-+
-+	return snprintf(buf, PAGE_SIZE, "%s", uuid);
-+}
-+
-+static ssize_t uuid_store(struct device_driver *drv, const char *buf,
-+			  size_t count)
-+{
-+	u64 uuid[MLNX_MFG_VAL_QWORD_CNT(UUID)] = { 0 };
-+	struct arm_smccc_res res;
-+	int word;
- 
--	key_state = mlxbf_bootctl_smc(MLXBF_BOOTCTL_GET_TBB_FUSE_STATUS,
--				      MLXBF_BOOTCTL_FUSE_STATUS_KEYS);
--	if (key_state < 0)
--		return key_state;
-+	if (count > MLNX_MFG_UUID_VAL_LEN)
-+		return -EINVAL;
-+
-+	memcpy(uuid, buf, count);
-+
-+	mutex_lock(&mfg_ops_lock);
-+	for (word = 0; word < MLNX_MFG_VAL_QWORD_CNT(UUID); word++) {
-+		arm_smccc_smc(MLNX_HANDLE_SET_MFG_INFO,
-+			      MLNX_MFG_TYPE_UUID_0 + word,
-+			      sizeof(u64), uuid[word], 0, 0, 0, 0, &res);
-+		if (res.a0) {
-+			mutex_unlock(&mfg_ops_lock);
-+			return -EPERM;
-+		}
-+	}
-+	mutex_unlock(&mfg_ops_lock);
-+
-+	return count;
-+}
-+
-+static ssize_t rev_show(struct device_driver *drv, char *buf)
-+{
-+	u64 rev_data[MLNX_MFG_VAL_QWORD_CNT(REV)] = { 0 };
-+	char rev[MLNX_MFG_REV_VAL_LEN + 1] = { 0 };
-+	struct arm_smccc_res res;
-+	int word;
-+
-+	mutex_lock(&mfg_ops_lock);
-+	for (word = 0; word < MLNX_MFG_VAL_QWORD_CNT(REV); word++) {
-+		arm_smccc_smc(MLNX_HANDLE_GET_MFG_INFO,
-+			      MLNX_MFG_TYPE_REV + word,
-+			      0, 0, 0, 0, 0, 0, &res);
-+		if (res.a0) {
-+			mutex_unlock(&mfg_ops_lock);
-+			return -EPERM;
-+		}
-+		rev_data[word] = res.a1;
-+	}
-+	mutex_unlock(&mfg_ops_lock);
-+	memcpy(rev, rev_data, MLNX_MFG_REV_VAL_LEN);
-+
-+	return snprintf(buf, PAGE_SIZE, "%s", rev);
-+}
-+
-+static ssize_t rev_store(struct device_driver *drv, const char *buf,
-+			 size_t count)
-+{
-+	u64 rev[MLNX_MFG_VAL_QWORD_CNT(REV)] = { 0 };
-+	struct arm_smccc_res res;
-+	int word;
-+
-+	if (count > MLNX_MFG_REV_VAL_LEN)
-+		return -EINVAL;
-+
-+	memcpy(rev, buf, count);
-+
-+	mutex_lock(&mfg_ops_lock);
-+	for (word = 0; word < MLNX_MFG_VAL_QWORD_CNT(REV); word++) {
-+		arm_smccc_smc(MLNX_HANDLE_SET_MFG_INFO,
-+			      MLNX_MFG_TYPE_REV + word,
-+			      sizeof(u64), rev[word], 0, 0, 0, 0, &res);
-+		if (res.a0) {
-+			mutex_unlock(&mfg_ops_lock);
-+			return -EPERM;
-+		}
-+	}
-+	mutex_unlock(&mfg_ops_lock);
-+
-+	return count;
-+}
-+
-+static ssize_t mfg_lock_store(struct device_driver *drv, const char *buf,
-+			      size_t count)
-+{
-+	unsigned long val;
-+	int err;
-+
-+	err = kstrtoul(buf, 10, &val);
-+	if (err)
-+		return err;
-+
-+	if (val != 1)
-+		return -EINVAL;
-+
-+	mutex_lock(&mfg_ops_lock);
-+	smc_call0(MLNX_HANDLE_LOCK_MFG_INFO);
-+	mutex_unlock(&mfg_ops_lock);
-+
-+	return count;
-+}
-+
-+/* Log header format. */
-+#define RSH_LOG_TYPE_SHIFT	56
-+#define RSH_LOG_LEN_SHIFT	48
-+#define RSH_LOG_LEVEL_SHIFT	0
-+
-+/* Module ID and type used here. */
-+#define BF_RSH_LOG_TYPE_UNKNOWN		0x00ULL
-+#define BF_RSH_LOG_TYPE_PANIC		0x01ULL
-+#define BF_RSH_LOG_TYPE_EXCEPTION	0x02ULL
-+#define BF_RSH_LOG_TYPE_UNUSED		0x03ULL
-+#define BF_RSH_LOG_TYPE_MSG		0x04ULL
-+
-+/* Utility macro. */
-+#define BF_RSH_LOG_MOD_MASK		0x0FULL
-+#define BF_RSH_LOG_MOD_SHIFT		60
-+#define BF_RSH_LOG_TYPE_MASK		0x0FULL
-+#define BF_RSH_LOG_TYPE_SHIFT		56
-+#define BF_RSH_LOG_LEN_MASK		0x7FULL
-+#define BF_RSH_LOG_LEN_SHIFT		48
-+#define BF_RSH_LOG_ARG_MASK		0xFFFFFFFFULL
-+#define BF_RSH_LOG_ARG_SHIFT		16
-+#define BF_RSH_LOG_HAS_ARG_MASK		0xFFULL
-+#define BF_RSH_LOG_HAS_ARG_SHIFT	8
-+#define BF_RSH_LOG_LEVEL_MASK		0xFFULL
-+#define BF_RSH_LOG_LEVEL_SHIFT		0
-+#define BF_RSH_LOG_PC_MASK		0xFFFFFFFFULL
-+#define BF_RSH_LOG_PC_SHIFT		0
-+#define BF_RSH_LOG_SYNDROME_MASK	0xFFFFFFFFULL
-+#define BF_RSH_LOG_SYNDROME_SHIFT	0
-+
-+#define BF_RSH_LOG_HEADER_GET(f, h) \
-+	(((h) >> BF_RSH_LOG_##f##_SHIFT) & BF_RSH_LOG_##f##_MASK)
-+
-+/* Log message level. */
-+enum {
-+	RSH_LOG_INFO,
-+	RSH_LOG_WARN,
-+	RSH_LOG_ERR
-+};
-+
-+/* Log module */
-+const char * const rsh_log_mod[] = {
-+	"MISC", "BL1", "BL2", "BL2R", "BL31", "UEFI"
-+};
-+
-+const char *rsh_log_level[] = {"INFO", "WARN", "ERR", "ASSERT"};
-+
-+#define AARCH64_MRS_REG_SHIFT 5
-+#define AARCH64_MRS_REG_MASK  0xffff
-+#define AARCH64_ESR_ELX_EXCEPTION_CLASS_SHIFT 26
-+
-+struct rsh_log_reg {
-+	char *name;
-+	u32 opcode;
-+} rsh_log_reg;
-+
-+static struct rsh_log_reg rsh_log_regs[] = {
-+	{"actlr_el1",		0b1100000010000001},
-+	{"actlr_el2",		0b1110000010000001},
-+	{"actlr_el3",		0b1111000010000001},
-+	{"afsr0_el1",		0b1100001010001000},
-+	{"afsr0_el2",		0b1110001010001000},
-+	{"afsr0_el3",		0b1111001010001000},
-+	{"afsr1_el1",		0b1100001010001001},
-+	{"afsr1_el2",		0b1110001010001001},
-+	{"afsr1_el3",		0b1111001010001001},
-+	{"amair_el1",		0b1100010100011000},
-+	{"amair_el2",		0b1110010100011000},
-+	{"amair_el3",		0b1111010100011000},
-+	{"ccsidr_el1",		0b1100100000000000},
-+	{"clidr_el1",		0b1100100000000001},
-+	{"cntkctl_el1",		0b1100011100001000},
-+	{"cntp_ctl_el0",	0b1101111100010001},
-+	{"cntp_cval_el0",	0b1101111100010010},
-+	{"cntv_ctl_el0",	0b1101111100011001},
-+	{"cntv_cval_el0",	0b1101111100011010},
-+	{"contextidr_el1",	0b1100011010000001},
-+	{"cpacr_el1",		0b1100000010000010},
-+	{"cptr_el2",		0b1110000010001010},
-+	{"cptr_el3",		0b1111000010001010},
-+	{"vtcr_el2",		0b1110000100001010},
-+	{"ctr_el0",		0b1101100000000001},
-+	{"currentel",		0b1100001000010010},
-+	{"dacr32_el2",		0b1110000110000000},
-+	{"daif",		0b1101101000010001},
-+	{"dczid_el0",		0b1101100000000111},
-+	{"dlr_el0",		0b1101101000101001},
-+	{"dspsr_el0",		0b1101101000101000},
-+	{"elr_el1",		0b1100001000000001},
-+	{"elr_el2",		0b1110001000000001},
-+	{"elr_el3",		0b1111001000000001},
-+	{"esr_el1",		0b1100001010010000},
-+	{"esr_el2",		0b1110001010010000},
-+	{"esr_el3",		0b1111001010010000},
-+	{"esselr_el1",		0b1101000000000000},
-+	{"far_el1",		0b1100001100000000},
-+	{"far_el2",		0b1110001100000000},
-+	{"far_el3",		0b1111001100000000},
-+	{"fpcr",		0b1101101000100000},
-+	{"fpexc32_el2",		0b1110001010011000},
-+	{"fpsr",		0b1101101000100001},
-+	{"hacr_el2",		0b1110000010001111},
-+	{"har_el2",		0b1110000010001000},
-+	{"hpfar_el2",		0b1110001100000100},
-+	{"hstr_el2",		0b1110000010001011},
-+	{"far_el1",		0b1100001100000000},
-+	{"far_el2",		0b1110001100000000},
-+	{"far_el3",		0b1111001100000000},
-+	{"hcr_el2",		0b1110000010001000},
-+	{"hpfar_el2",		0b1110001100000100},
-+	{"id_aa64afr0_el1",	0b1100000000101100},
-+	{"id_aa64afr1_el1",	0b1100000000101101},
-+	{"id_aa64dfr0_el1",	0b1100000000101100},
-+	{"id_aa64isar0_el1",	0b1100000000110000},
-+	{"id_aa64isar1_el1",	0b1100000000110001},
-+	{"id_aa64mmfr0_el1",	0b1100000000111000},
-+	{"id_aa64mmfr1_el1",	0b1100000000111001},
-+	{"id_aa64pfr0_el1",	0b1100000000100000},
-+	{"id_aa64pfr1_el1",	0b1100000000100001},
-+	{"ifsr32_el2",		0b1110001010000001},
-+	{"isr_el1",		0b1100011000001000},
-+	{"mair_el1",		0b1100010100010000},
-+	{"mair_el2",		0b1110010100010000},
-+	{"mair_el3",		0b1111010100010000},
-+	{"midr_el1",		0b1100000000000000},
-+	{"mpidr_el1",		0b1100000000000101},
-+	{"nzcv",		0b1101101000010000},
-+	{"revidr_el1",		0b1100000000000110},
-+	{"rmr_el3",		0b1111011000000010},
-+	{"par_el1",		0b1100001110100000},
-+	{"rvbar_el3",		0b1111011000000001},
-+	{"scr_el3",		0b1111000010001000},
-+	{"sctlr_el1",		0b1100000010000000},
-+	{"sctlr_el2",		0b1110000010000000},
-+	{"sctlr_el3",		0b1111000010000000},
-+	{"sp_el0",		0b1100001000001000},
-+	{"sp_el1",		0b1110001000001000},
-+	{"spsel",		0b1100001000010000},
-+	{"spsr_abt",		0b1110001000011001},
-+	{"spsr_el1",		0b1100001000000000},
-+	{"spsr_el2",		0b1110001000000000},
-+	{"spsr_el3",		0b1111001000000000},
-+	{"spsr_fiq",		0b1110001000011011},
-+	{"spsr_irq",		0b1110001000011000},
-+	{"spsr_und",		0b1110001000011010},
-+	{"tcr_el1",		0b1100000100000010},
-+	{"tcr_el2",		0b1110000100000010},
-+	{"tcr_el3",		0b1111000100000010},
-+	{"tpidr_el0",		0b1101111010000010},
-+	{"tpidr_el1",		0b1100011010000100},
-+	{"tpidr_el2",		0b1110011010000010},
-+	{"tpidr_el3",		0b1111011010000010},
-+	{"tpidpro_el0",		0b1101111010000011},
-+	{"vbar_el1",		0b1100011000000000},
-+	{"vbar_el2",		0b1110011000000000},
-+	{"vbar_el3",		0b1111011000000000},
-+	{"vmpidr_el2",		0b1110000000000101},
-+	{"vpidr_el2",		0b1110000000000000},
-+	{"ttbr0_el1",		0b1100000100000000},
-+	{"ttbr0_el2",		0b1110000100000000},
-+	{"ttbr0_el3",		0b1111000100000000},
-+	{"ttbr1_el1",		0b1100000100000001},
-+	{"vtcr_el2",		0b1110000100001010},
-+	{"vttbr_el2",		0b1110000100001000},
-+	{NULL,			0b0000000000000000},
-+};
-+
-+/* Size(8-byte words) of the log buffer. */
-+#define RSH_SCRATCH_BUF_CTL_IDX_MASK	0x7f
-+
-+static int rsh_log_sem_lock(void)
-+{
-+	unsigned long timeout;
-+
-+	/* Take the semaphore. */
-+	timeout = jiffies + msecs_to_jiffies(100);
-+	while (readq(rsh_semaphore)) {
-+		if (time_after(jiffies, timeout))
-+			return -ETIMEDOUT;
-+	}
-+
-+	return 0;
-+}
-+
-+static void rsh_log_sem_unlock(void)
-+{
-+	writeq(0, rsh_semaphore);
-+}
-+
-+static ssize_t rsh_log_store(struct device_driver *drv, const char *buf,
-+			     size_t count)
-+{
-+	int idx, num, len, size = (int)count, level = RSH_LOG_INFO, rc;
-+	u64 data;
-+
-+	if (!size)
-+		return -EINVAL;
-+
-+	if (!rsh_semaphore || !rsh_scratch_buf_ctl)
-+		return -EOPNOTSUPP;
-+
-+	/* Ignore line break at the end. */
-+	if (buf[size-1] == 0xa)
-+		size--;
-+
-+	/* Check the message prefix. */
-+	for (idx = 0; idx < ARRAY_SIZE(rsh_log_level); idx++) {
-+		len = strlen(rsh_log_level[idx]);
-+		if (len + 1 < size && !strncmp(buf, rsh_log_level[idx], len)) {
-+			buf += len + 1;
-+			size -= len + 1;
-+			level = idx;
-+			break;
-+		}
-+	}
-+
-+	/* Ignore leading spaces. */
-+	while (size > 0 && buf[0] == ' ') {
-+		size--;
-+		buf++;
-+	}
-+
-+	/* Take the semaphore. */
-+	rc = rsh_log_sem_lock();
-+	if (rc)
-+		return rc;
-+
-+	/* Calculate how many words are available. */
-+	num = (size + sizeof(u64) - 1) / sizeof(u64);
-+	idx = readq(rsh_scratch_buf_ctl);
-+	if (idx + num + 1 >= RSH_SCRATCH_BUF_CTL_IDX_MASK)
-+		num = RSH_SCRATCH_BUF_CTL_IDX_MASK - idx - 1;
-+	if (num <= 0)
-+		goto done;
-+
-+	/* Write Header. */
-+	data = (BF_RSH_LOG_TYPE_MSG << RSH_LOG_TYPE_SHIFT) |
-+		((u64)num << RSH_LOG_LEN_SHIFT) |
-+		((u64)level << RSH_LOG_LEVEL_SHIFT);
-+	writeq(data, rsh_scratch_buf_data);
-+
-+	/* Write message. */
-+	for (idx = 0, len = size; idx < num && len > 0; idx++) {
-+		if (len <= sizeof(u64)) {
-+			data = 0;
-+			memcpy(&data, buf, len);
-+			len = 0;
-+		} else {
-+			memcpy(&data, buf, sizeof(u64));
-+			len -= sizeof(u64);
-+			buf += sizeof(u64);
-+		}
-+		writeq(data, rsh_scratch_buf_data);
-+	}
-+
-+done:
-+	/* Release the semaphore. */
-+	rsh_log_sem_unlock();
-+
-+	/* Ignore the rest if no more space. */
-+	return count;
-+}
-+
-+static char *rsh_log_get_reg_name(u64 opcode)
-+{
-+	struct rsh_log_reg *reg = rsh_log_regs;
-+
-+	while (reg->name) {
-+		if (reg->opcode == opcode)
-+			return reg->name;
-+		reg++;
-+	}
-+
-+	return "unknown";
-+}
-+
-+static int rsh_log_show_crash(u64 hdr, char *buf, int size)
-+{
-+	int i, module, type, len, n = 0;
-+	u32 pc, syndrome, ec;
-+	u64 opcode, data;
-+	char *p = buf;
-+
-+	module = BF_RSH_LOG_HEADER_GET(MOD, hdr);
-+	if (module >= ARRAY_SIZE(rsh_log_mod))
-+		module = 0;
-+	type = BF_RSH_LOG_HEADER_GET(TYPE, hdr);
-+	len = BF_RSH_LOG_HEADER_GET(LEN, hdr);
-+
-+	if (type == BF_RSH_LOG_TYPE_EXCEPTION) {
-+		syndrome = BF_RSH_LOG_HEADER_GET(SYNDROME, hdr);
-+		ec = syndrome >> AARCH64_ESR_ELX_EXCEPTION_CLASS_SHIFT;
-+		n = snprintf(p, size, " Exception(%s): syndrome = 0x%x%s\n",
-+			    rsh_log_mod[module], syndrome,
-+			    (ec == 0x24 || ec == 0x25) ? "(Data Abort)" :
-+			    (ec == 0x2f) ? "(SError)" : "");
-+	} else if (type == BF_RSH_LOG_TYPE_PANIC) {
-+		pc = BF_RSH_LOG_HEADER_GET(PC, hdr);
-+		n = snprintf(p, size,
-+			     " PANIC(%s): PC = 0x%x\n", rsh_log_mod[module],
-+			     pc);
-+	}
-+	if (n > 0) {
-+		p += n;
-+		size -= n;
-+	}
- 
- 	/*
--	 * key_state contains the bits for 4 Key versions, loaded from eFuses
--	 * after a hard reset. Lower 4 bits are a thermometer code indicating
--	 * key programming has started for key n (0000 = none, 0001 = version 0,
--	 * 0011 = version 1, 0111 = version 2, 1111 = version 3). Upper 4 bits
--	 * are a thermometer code indicating key programming has completed for
--	 * key n (same encodings as the start bits). This allows for detection
--	 * of an interruption in the programming process which has left the key
--	 * partially programmed (and thus invalid). The process is to burn the
--	 * eFuse for the new key start bit, burn the key eFuses, then burn the
--	 * eFuse for the new key complete bit.
--	 *
--	 * For example 0000_0000: no key valid, 0001_0001: key version 0 valid,
--	 * 0011_0011: key 1 version valid, 0011_0111: key version 2 started
--	 * programming but did not complete, etc. The most recent key for which
--	 * both start and complete bit is set is loaded. On soft reset, this
--	 * register is not modified.
-+	 * Read the registers in a loop. 'len' is the total number of words in
-+	 * 8-bytes. Two words are read in each loop.
- 	 */
--	for (key = MLXBF_SB_KEY_NUM - 1; key >= 0; key--) {
--		burnt = key_state & BIT(key);
--		valid = key_state & BIT(key + MLXBF_SB_KEY_NUM);
-+	for (i = 0; i < len/2; i++) {
-+		opcode = readq(rsh_scratch_buf_data);
-+		data = readq(rsh_scratch_buf_data);
-+
-+		opcode = (opcode >> AARCH64_MRS_REG_SHIFT) &
-+			AARCH64_MRS_REG_MASK;
-+		n = snprintf(p, size,
-+			     "   %-16s0x%llx\n", rsh_log_get_reg_name(opcode),
-+			     (unsigned long long)data);
-+		if (n > 0) {
-+			p += n;
-+			size -= n;
-+		}
-+	}
- 
--		if (burnt && valid)
--			upper_key_used = 1;
-+	return p - buf;
-+}
- 
--		if (upper_key_used) {
--			if (burnt)
--				status = valid ? "Used" : "Wasted";
--			else
--				status = valid ? "Invalid" : "Skipped";
--		} else {
--			if (burnt)
--				status = valid ? "InUse" : "Incomplete";
--			else
--				status = valid ? "Invalid" : "Free";
-+static int rsh_log_format_msg(char *buf, int size, const char *msg, ...)
-+{
-+	va_list args;
-+	int len;
-+
-+	va_start(args, msg);
-+	len = vsnprintf(buf, size, msg, args);
-+	va_end(args);
-+
-+	return len;
-+}
-+
-+static int rsh_log_show_msg(u64 hdr, char *buf, int size)
-+{
-+	int has_arg = BF_RSH_LOG_HEADER_GET(HAS_ARG, hdr);
-+	int level = BF_RSH_LOG_HEADER_GET(LEVEL, hdr);
-+	int module = BF_RSH_LOG_HEADER_GET(MOD, hdr);
-+	int len = BF_RSH_LOG_HEADER_GET(LEN, hdr);
-+	u32 arg = BF_RSH_LOG_HEADER_GET(ARG, hdr);
-+	char *msg, *p;
-+	u64 data;
-+
-+	if (len <= 0)
-+		return -EINVAL;
-+
-+	if (module >= ARRAY_SIZE(rsh_log_mod))
-+		module = 0;
-+
-+	if (level >= ARRAY_SIZE(rsh_log_level))
-+		level = 0;
-+
-+	msg = kmalloc(len * sizeof(u64) + 1, GFP_KERNEL);
-+	if (!msg)
-+		return 0;
-+	p = msg;
-+
-+	while (len--) {
-+		data = readq(rsh_scratch_buf_data);
-+		memcpy(p, &data, sizeof(data));
-+		p += sizeof(data);
-+	}
-+	*p = '\0';
-+	if (!has_arg) {
-+		len = snprintf(buf, size, " %s[%s]: %s\n", rsh_log_level[level],
-+			       rsh_log_mod[module], msg);
-+	} else {
-+		len = snprintf(buf, size, " %s[%s]: ", rsh_log_level[level],
-+			       rsh_log_mod[module]);
-+		len += rsh_log_format_msg(buf + len, size - len, msg, arg);
-+		len += snprintf(buf + len, size - len, "\n");
-+	}
-+
-+	kfree(msg);
-+	return len;
-+}
-+
-+static ssize_t rsh_log_show(struct device_driver *drv, char *buf)
-+{
-+	u64 hdr;
-+	char *p = buf;
-+	int i, n, rc, idx, type, len, size = PAGE_SIZE;
-+
-+	if (!rsh_semaphore || !rsh_scratch_buf_ctl)
-+		return -EOPNOTSUPP;
-+
-+	/* Take the semaphore. */
-+	rc = rsh_log_sem_lock();
-+	if (rc)
-+		return rc;
-+
-+	/* Save the current index and read from 0. */
-+	idx = readq(rsh_scratch_buf_ctl) & RSH_SCRATCH_BUF_CTL_IDX_MASK;
-+	if (!idx)
-+		goto done;
-+	writeq(0, rsh_scratch_buf_ctl);
-+
-+	i = 0;
-+	while (i < idx) {
-+		hdr = readq(rsh_scratch_buf_data);
-+		type = BF_RSH_LOG_HEADER_GET(TYPE, hdr);
-+		len = BF_RSH_LOG_HEADER_GET(LEN, hdr);
-+		i += 1 + len;
-+		if (i > idx)
-+			break;
-+
-+		switch (type) {
-+		case BF_RSH_LOG_TYPE_PANIC:
-+		case BF_RSH_LOG_TYPE_EXCEPTION:
-+			n = rsh_log_show_crash(hdr, p, size);
-+			p += n;
-+			size -= n;
-+			break;
-+		case BF_RSH_LOG_TYPE_MSG:
-+			n = rsh_log_show_msg(hdr, p, size);
-+			p += n;
-+			size -= n;
-+			break;
-+		default:
-+			/* Drain this message. */
-+			while (len--)
-+				(void) readq(rsh_scratch_buf_data);
-+			break;
- 		}
--		buf_len += sprintf(buf + buf_len, "%d:%s ", key, status);
- 	}
--	buf_len += sprintf(buf + buf_len, "\n");
- 
--	return buf_len;
-+	if (rsh_log_clear_on_read)
-+		writeq(0, rsh_scratch_buf_ctl);
-+	else
-+		writeq(idx, rsh_scratch_buf_ctl);
-+
-+done:
-+	/* Release the semaphore. */
-+	rsh_log_sem_unlock();
-+
-+	return p - buf;
- }
- 
--static DEVICE_ATTR_RW(post_reset_wdog);
--static DEVICE_ATTR_RW(reset_action);
--static DEVICE_ATTR_RW(second_reset_action);
--static DEVICE_ATTR_RO(lifecycle_state);
--static DEVICE_ATTR_RO(secure_boot_fuse_state);
-+static DRIVER_ATTR_RW(post_reset_wdog);
-+static DRIVER_ATTR_RW(reset_action);
-+static DRIVER_ATTR_RW(second_reset_action);
-+static DRIVER_ATTR_RO(lifecycle_state);
-+static DRIVER_ATTR_RO(secure_boot_fuse_state);
-+static DRIVER_ATTR_WO(fw_reset);
-+static DRIVER_ATTR_RW(oob_mac);
-+static DRIVER_ATTR_RW(opn);
-+static DRIVER_ATTR_RW(sku);
-+static DRIVER_ATTR_RW(modl);
-+static DRIVER_ATTR_RW(sn);
-+static DRIVER_ATTR_RW(uuid);
-+static DRIVER_ATTR_RW(rev);
-+static DRIVER_ATTR_WO(mfg_lock);
-+static DRIVER_ATTR_RW(rsh_log);
- 
--static struct attribute *mlxbf_bootctl_attrs[] = {
--	&dev_attr_post_reset_wdog.attr,
--	&dev_attr_reset_action.attr,
--	&dev_attr_second_reset_action.attr,
--	&dev_attr_lifecycle_state.attr,
--	&dev_attr_secure_boot_fuse_state.attr,
-+static struct attribute *mbc_dev_attrs[] = {
-+	&driver_attr_post_reset_wdog.attr,
-+	&driver_attr_reset_action.attr,
-+	&driver_attr_second_reset_action.attr,
-+	&driver_attr_lifecycle_state.attr,
-+	&driver_attr_secure_boot_fuse_state.attr,
-+	&driver_attr_fw_reset.attr,
-+	&driver_attr_oob_mac.attr,
-+	&driver_attr_opn.attr,
-+	&driver_attr_sku.attr,
-+	&driver_attr_modl.attr,
-+	&driver_attr_sn.attr,
-+	&driver_attr_uuid.attr,
-+	&driver_attr_rev.attr,
-+	&driver_attr_mfg_lock.attr,
-+	&driver_attr_rsh_log.attr,
- 	NULL
- };
- 
--ATTRIBUTE_GROUPS(mlxbf_bootctl);
-+static struct attribute_group mbc_attr_group = {
-+	.attrs = mbc_dev_attrs
-+};
- 
--static const struct acpi_device_id mlxbf_bootctl_acpi_ids[] = {
-+static const struct attribute_group *mbc_attr_groups[] = {
-+	&mbc_attr_group,
-+	NULL
-+};
-+
-+static const struct of_device_id mbc_dt_ids[] = {
-+	{.compatible = "mellanox,bootctl"},
-+	{},
-+};
-+
-+MODULE_DEVICE_TABLE(of, mbc_dt_ids);
-+
-+static const struct acpi_device_id mbc_acpi_ids[] = {
- 	{"MLNXBF04", 0},
--	{}
-+	{},
- };
- 
--MODULE_DEVICE_TABLE(acpi, mlxbf_bootctl_acpi_ids);
-+MODULE_DEVICE_TABLE(acpi, mbc_acpi_ids);
- 
--static bool mlxbf_bootctl_guid_match(const guid_t *guid,
--				     const struct arm_smccc_res *res)
-+static ssize_t mbc_bootfifo_read_raw(struct file *filp, struct kobject *kobj,
-+				     struct bin_attribute *bin_attr,
-+				     char *buf, loff_t pos, size_t count)
- {
--	guid_t id = GUID_INIT(res->a0, res->a1, res->a1 >> 16,
--			      res->a2, res->a2 >> 8, res->a2 >> 16,
--			      res->a2 >> 24, res->a3, res->a3 >> 8,
--			      res->a3 >> 16, res->a3 >> 24);
-+	unsigned long timeout = jiffies + HZ / 2;
-+	char *p = buf;
-+	int cnt = 0;
-+	u64 data;
- 
--	return guid_equal(guid, &id);
-+	/* Give up reading if no more data within 500ms. */
-+	while (count >= sizeof(data)) {
-+		if (!cnt) {
-+			cnt = readq(rsh_boot_cnt);
-+			if (!cnt) {
-+				if (time_after(jiffies, timeout))
-+					break;
-+				udelay(10);
-+				continue;
-+			}
-+		}
-+
-+		data = readq(rsh_boot_data);
-+		memcpy(p, &data, sizeof(data));
-+		count -= sizeof(data);
-+		p += sizeof(data);
-+		cnt--;
-+		timeout = jiffies + HZ / 2;
-+	}
-+
-+	return p - buf;
- }
- 
--static int mlxbf_bootctl_probe(struct platform_device *pdev)
-+static struct bin_attribute mbc_bootfifo_sysfs_attr = {
-+	.attr = { .name = "bootfifo", .mode = 0400 },
-+	.read = mbc_bootfifo_read_raw,
-+};
-+
-+static int mbc_probe(struct platform_device *pdev)
- {
--	struct arm_smccc_res res = { 0 };
--	guid_t guid;
--	int ret;
-+	struct resource *resource;
-+	struct arm_smccc_res res;
-+	void __iomem *data;
-+	int err;
- 
--	/* Ensure we have the UUID we expect for this service. */
--	arm_smccc_smc(MLXBF_BOOTCTL_SIP_SVC_UID, 0, 0, 0, 0, 0, 0, 0, &res);
--	guid_parse(mlxbf_bootctl_svc_uuid_str, &guid);
--	if (!mlxbf_bootctl_guid_match(&guid, &res))
-+	resource = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-+	if (!resource)
- 		return -ENODEV;
-+	rsh_boot_data = devm_ioremap_resource(&pdev->dev, resource);
-+	if (IS_ERR(rsh_boot_data))
-+		return PTR_ERR(rsh_boot_data);
-+
-+	resource = platform_get_resource(pdev, IORESOURCE_MEM, 1);
-+	if (!resource)
-+		return -ENODEV;
-+	rsh_boot_cnt = devm_ioremap_resource(&pdev->dev, resource);
-+	if (IS_ERR(rsh_boot_cnt))
-+		return PTR_ERR(rsh_boot_cnt);
-+
-+	resource = platform_get_resource(pdev, IORESOURCE_MEM, 2);
-+	if (resource) {
-+		data = devm_ioremap_resource(&pdev->dev, resource);
-+		if (!IS_ERR(data))
-+			rsh_semaphore = data;
-+	}
-+
-+	resource = platform_get_resource(pdev, IORESOURCE_MEM, 3);
-+	if (resource) {
-+		data = devm_ioremap_resource(&pdev->dev, resource);
-+		if (!IS_ERR(data)) {
-+			rsh_scratch_buf_ctl = data + RSH_SCRATCH_BUF_CTL_OFF;
-+			rsh_scratch_buf_data = data + RSH_SCRATCH_BUF_DATA_OFF;
-+		}
-+	}
- 
- 	/*
--	 * When watchdog is used, it sets boot mode to MLXBF_BOOTCTL_SWAP_EMMC
-+	 * Ensure we have the UUID we expect for this service.
-+	 * Note that the functionality we want is present in the first
-+	 * released version of this service, so we don't check the version.
-+	 */
-+	arm_smccc_smc(MLNX_SIP_SVC_UID, 0, 0, 0, 0, 0, 0, 0, &res);
-+	if (res.a0 != 0x89c036b4 || res.a1 != 0x11e6e7d7 ||
-+	    res.a2 != 0x1a009787 || res.a3 != 0xc4bf00ca)
-+		return -ENODEV;
-+
-+	/*
-+	 * When watchdog is used, it sets the boot mode to MLNX_BOOT_SWAP_EMMC
- 	 * in case of boot failures. However it doesn't clear the state if there
- 	 * is no failure. Restore the default boot mode here to avoid any
- 	 * unnecessary boot partition swapping.
- 	 */
--	ret = mlxbf_bootctl_smc(MLXBF_BOOTCTL_SET_RESET_ACTION,
--				MLXBF_BOOTCTL_EMMC);
--	if (ret < 0)
--		dev_warn(&pdev->dev, "Unable to reset the EMMC boot mode\n");
-+	if (smc_call1(MLNX_SET_RESET_ACTION, MLNX_BOOT_EMMC) < 0)
-+		pr_err("Unable to reset the EMMC boot mode\n");
-+
-+	err = sysfs_create_bin_file(&pdev->dev.kobj, &mbc_bootfifo_sysfs_attr);
-+	if (err) {
-+		pr_err("Unable to create bootfifo sysfs file, error %d\n", err);
-+		return err;
-+	}
-+
-+	pr_info("%s (version %s)\n", DRIVER_DESCRIPTION, DRIVER_VERSION);
-+
-+	return 0;
-+}
-+
-+static int mbc_remove(struct platform_device *pdev)
-+{
-+	sysfs_remove_bin_file(&pdev->dev.kobj, &mbc_bootfifo_sysfs_attr);
- 
- 	return 0;
- }
- 
--static struct platform_driver mlxbf_bootctl_driver = {
--	.probe = mlxbf_bootctl_probe,
-+static struct platform_driver mbc_driver = {
-+	.probe = mbc_probe,
-+	.remove = mbc_remove,
- 	.driver = {
--		.name = "mlxbf-bootctl",
--		.dev_groups = mlxbf_bootctl_groups,
--		.acpi_match_table = mlxbf_bootctl_acpi_ids,
-+		.name = DRIVER_NAME,
-+		.groups = mbc_attr_groups,
-+		.of_match_table = mbc_dt_ids,
-+		.acpi_match_table = ACPI_PTR(mbc_acpi_ids),
- 	}
- };
- 
--module_platform_driver(mlxbf_bootctl_driver);
-+module_platform_driver(mbc_driver);
- 
--MODULE_DESCRIPTION("Mellanox boot control driver");
--MODULE_LICENSE("GPL v2");
--MODULE_AUTHOR("Mellanox Technologies");
-+MODULE_DESCRIPTION(DRIVER_DESCRIPTION);
-+MODULE_VERSION(DRIVER_VERSION);
-+MODULE_AUTHOR("Shravan Kumar Ramani <shravankr@nvidia.com>");
-+MODULE_LICENSE("Dual BSD/GPL");
-diff --git a/drivers/platform/mellanox/mlxbf-bootctl.h b/drivers/platform/mellanox/mlxbf-bootctl.h
-index 148fdb43b435..3e9dda829d6d 100644
---- a/drivers/platform/mellanox/mlxbf-bootctl.h
-+++ b/drivers/platform/mellanox/mlxbf-bootctl.h
-@@ -1,11 +1,22 @@
--/* SPDX-License-Identifier: GPL-2.0 */
-+// SPDX-License-Identifier: GPL-2.0 or BSD-3-Clause
- /*
-- * Copyright (c) 2019, Mellanox Technologies. All rights reserved.
-+ *  Copyright (C) 2020 Mellanox Technologies.  All rights reserved.
-+ *
-+ *  This program is free software; you can redistribute it and/or modify
-+ *  it under the terms of the GNU General Public License v2.0 as published by
-+ *  the Free Software Foundation.
-+ *
-+ *  This program is distributed in the hope that it will be useful,
-+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-+ *  GNU General Public License for more details.
-  */
- 
- #ifndef __MLXBF_BOOTCTL_H__
- #define __MLXBF_BOOTCTL_H__
- 
-+/* BlueField-specific SMC function IDs */
-+
- /*
-  * Request that the on-chip watchdog be enabled, or disabled, after
-  * the next chip soft reset. This call does not affect the current
-@@ -14,14 +25,14 @@
-  * will not be enabled after the next soft reset. Non-zero errors are
-  * returned as documented below.
-  */
--#define MLXBF_BOOTCTL_SET_POST_RESET_WDOG	0x82000000
-+#define MLNX_SET_POST_RESET_WDOG	0x82000000
- 
- /*
-  * Query the status which has been requested for the on-chip watchdog
-  * after the next chip soft reset. Returns the interval as set by
-- * MLXBF_BOOTCTL_SET_POST_RESET_WDOG.
-+ * MLNX_SET_POST_RESET_WDOG.
-  */
--#define MLXBF_BOOTCTL_GET_POST_RESET_WDOG	0x82000001
-+#define MLNX_GET_POST_RESET_WDOG	0x82000001
- 
- /*
-  * Request that a specific boot action be taken at the next soft
-@@ -32,72 +43,77 @@
-  * invoked. See below for the available MLNX_BOOT_xxx parameter
-  * values. Non-zero errors are returned as documented below.
-  */
--#define MLXBF_BOOTCTL_SET_RESET_ACTION		0x82000002
-+#define MLNX_SET_RESET_ACTION		0x82000002
- 
- /*
-  * Return the specific boot action which will be taken at the next
-  * soft reset. Returns the reset action (see below for the parameter
-- * values for MLXBF_BOOTCTL_SET_RESET_ACTION).
-+ * values for MLNX_SET_RESET_ACTION).
-  */
--#define MLXBF_BOOTCTL_GET_RESET_ACTION		0x82000003
-+#define MLNX_GET_RESET_ACTION		0x82000003
- 
- /*
-  * Request that a specific boot action be taken at the soft reset
-  * after the next soft reset. For a specified valid boot mode, the
-  * effect of this call is identical to that of invoking
-- * MLXBF_BOOTCTL_SET_RESET_ACTION after the next chip soft reset; in
-+ * MLNX_SET_RESET_ACTION after the next chip soft reset; in
-  * particular, after that reset, the action for the now next reset can
-- * be queried with MLXBF_BOOTCTL_GET_RESET_ACTION and modified with
-- * MLXBF_BOOTCTL_SET_RESET_ACTION. You may also specify the parameter as
-+ * be queried with MLNX_GET_RESET_ACTION and modified with
-+ * MLNX_SET_RESET_ACTION. You may also specify the parameter as
-  * MLNX_BOOT_NONE, which is equivalent to specifying that no call to
-- * MLXBF_BOOTCTL_SET_RESET_ACTION be taken after the next chip soft reset.
-+ * MLNX_SET_RESET_ACTION be taken after the next chip soft reset.
-  * This call does not affect the action to be taken at the next soft
-  * reset. Non-zero errors are returned as documented below.
-  */
--#define MLXBF_BOOTCTL_SET_SECOND_RESET_ACTION	0x82000004
-+#define MLNX_SET_SECOND_RESET_ACTION	0x82000004
- 
- /*
-  * Return the specific boot action which will be taken at the soft
-  * reset after the next soft reset; this will be one of the valid
-- * actions for MLXBF_BOOTCTL_SET_SECOND_RESET_ACTION.
-+ * actions for MLNX_SET_SECOND_RESET_ACTION.
-  */
--#define MLXBF_BOOTCTL_GET_SECOND_RESET_ACTION	0x82000005
-+#define MLNX_GET_SECOND_RESET_ACTION	0x82000005
- 
- /*
-  * Return the fuse status of the current chip. The caller should specify
-  * with the second argument if the state of the lifecycle fuses or the
-  * version of secure boot fuse keys left should be returned.
-  */
--#define MLXBF_BOOTCTL_GET_TBB_FUSE_STATUS	0x82000006
-+#define MLNX_GET_TBB_FUSE_STATUS	0x82000006
- 
--/* Reset eMMC by programming the RST_N register. */
--#define MLXBF_BOOTCTL_SET_EMMC_RST_N		0x82000007
-+/*
-+ * Initiate Firmware Reset via TYU. This might be invoked during the reset
-+ * flow in isolation mode.
-+ */
-+#define MLNX_HANDLE_FW_RESET            0x8200000D
- 
--#define MLXBF_BOOTCTL_GET_DIMM_INFO		0x82000008
-+/*
-+ * SMC function IDs to set, get and reset the manufacturing information
-+ * stored within the eeprom.
-+ */
-+#define MLNX_HANDLE_SET_MFG_INFO    0x8200000E
-+#define MLNX_HANDLE_GET_MFG_INFO    0x8200000F
-+#define MLNX_HANDLE_LOCK_MFG_INFO   0x82000011
- 
- /* SMC function IDs for SiP Service queries */
--#define MLXBF_BOOTCTL_SIP_SVC_CALL_COUNT	0x8200ff00
--#define MLXBF_BOOTCTL_SIP_SVC_UID		0x8200ff01
--#define MLXBF_BOOTCTL_SIP_SVC_VERSION		0x8200ff03
--
--/* ARM Standard Service Calls version numbers */
--#define MLXBF_BOOTCTL_SVC_VERSION_MAJOR		0x0
--#define MLXBF_BOOTCTL_SVC_VERSION_MINOR		0x2
-+#define MLNX_SIP_SVC_CALL_COUNT		0x8200ff00
-+#define MLNX_SIP_SVC_UID		0x8200ff01
-+#define MLNX_SIP_SVC_VERSION		0x8200ff03
- 
- /* Number of svc calls defined. */
--#define MLXBF_BOOTCTL_NUM_SVC_CALLS 12
-+#define MLNX_NUM_SVC_CALLS 16
- 
--/* Valid reset actions for MLXBF_BOOTCTL_SET_RESET_ACTION. */
--#define MLXBF_BOOTCTL_EXTERNAL	0 /* Not boot from eMMC */
--#define MLXBF_BOOTCTL_EMMC	1 /* From primary eMMC boot partition */
--#define MLNX_BOOTCTL_SWAP_EMMC	2 /* Swap eMMC boot partitions and reboot */
--#define MLXBF_BOOTCTL_EMMC_LEGACY	3 /* From primary eMMC in legacy mode */
-+/* Valid reset actions for MLNX_SET_RESET_ACTION. */
-+#define MLNX_BOOT_EXTERNAL	0 /* Do not boot from eMMC */
-+#define MLNX_BOOT_EMMC		1 /* Boot from primary eMMC boot partition */
-+#define MLNX_BOOT_SWAP_EMMC	2 /* Swap eMMC boot partitions and reboot */
-+#define MLNX_BOOT_EMMC_LEGACY	3 /* Boot from primary eMMC in legacy mode */
- 
- /* Valid arguments for requesting the fuse status. */
--#define MLXBF_BOOTCTL_FUSE_STATUS_LIFECYCLE	0 /* Return lifecycle status. */
--#define MLXBF_BOOTCTL_FUSE_STATUS_KEYS	1 /* Return secure boot key status */
-+#define MLNX_FUSE_STATUS_LIFECYCLE	0 /* Return the lifecycle status. */
-+#define MLNX_FUSE_STATUS_KEYS		1 /* Return secure boot key status */
- 
--/* Additional value to disable the MLXBF_BOOTCTL_SET_SECOND_RESET_ACTION. */
--#define MLXBF_BOOTCTL_NONE	0x7fffffff /* Don't change next boot action */
-+/* Additional parameter value to disable the MLNX_SET_SECOND_RESET_ACTION. */
-+#define MLNX_BOOT_NONE		0x7fffffff /* Don't change next boot action */
- 
- #endif /* __MLXBF_BOOTCTL_H__ */
--- 
-2.20.1
-
diff --git a/platform/mellanox/non-upstream-patches/patches/0077-UBUNTU-SAUCE-mlx-bootctl-support-icm-carveout-eeprom.patch b/platform/mellanox/non-upstream-patches/patches/0077-UBUNTU-SAUCE-mlx-bootctl-support-icm-carveout-eeprom.patch
deleted file mode 100644
index f46df5f9d..000000000
--- a/platform/mellanox/non-upstream-patches/patches/0077-UBUNTU-SAUCE-mlx-bootctl-support-icm-carveout-eeprom.patch
+++ /dev/null
@@ -1,118 +0,0 @@
-From 61618188dadb1cc9b6708916e0e7a1c2e31d469d Mon Sep 17 00:00:00 2001
-From: Asmaa Mnebhi <asmaa@nvidia.com>
-Date: Mon, 31 Oct 2022 12:18:52 -0400
-Subject: [PATCH backport 6.1.42 77/85] UBUNTU: SAUCE: mlx-bootctl: support icm
- carveout eeprom region read/write
-
-BugLink: https://bugs.launchpad.net/bugs/1995296
-
-The BlueField-3 ICM carveout feature will enable NIC FW to bypass the SMMU block
-to access DRAM memory. The amount of memory accessible by FW will be controlled by ARM.
-This patch enables setting the size of the large ICM carveout from
-userspace. The max size is 1TB, has a granularity of 128MB and will be passed
-and printed in hex. The size unit is MB.
-
-Signed-off-by: Asmaa Mnebhi <asmaa@nvidia.com>
-Acked-by: Tim Gardner <tim.gardner@canonical.com>
-Acked-by: Cory Todd <cory.todd@canonical.com>
-Signed-off-by: Bartlomiej Zolnierkiewicz <bartlomiej.zolnierkiewicz@canonical.com>
----
- drivers/platform/mellanox/mlxbf-bootctl.c | 40 +++++++++++++++++++++++
- drivers/platform/mellanox/mlxbf-bootctl.h |  9 +++++
- 2 files changed, 49 insertions(+)
-
-diff --git a/drivers/platform/mellanox/mlxbf-bootctl.c b/drivers/platform/mellanox/mlxbf-bootctl.c
-index 2302e1e09c7e..e8877a19dda9 100644
---- a/drivers/platform/mellanox/mlxbf-bootctl.c
-+++ b/drivers/platform/mellanox/mlxbf-bootctl.c
-@@ -104,6 +104,7 @@ enum {
- 
- /* This mutex is used to serialize MFG write and lock operations. */
- static DEFINE_MUTEX(mfg_ops_lock);
-+static DEFINE_MUTEX(icm_ops_lock);
- 
- #define MLNX_MFG_OOB_MAC_LEN         ETH_ALEN
- #define MLNX_MFG_OPN_VAL_LEN         24
-@@ -383,6 +384,43 @@ static ssize_t oob_mac_store(struct device_driver *drv, const char *buf,
- 	return res.a0 ? -EPERM : count;
- }
- 
-+static ssize_t large_icm_show(struct device_driver *drv, char *buf)
-+{
-+	char icm_str[MAX_ICM_BUFFER_SIZE] = { 0 };
-+	struct arm_smccc_res res;
-+
-+	arm_smccc_smc(MLNX_HANDLE_GET_ICM_INFO, 0, 0, 0, 0,
-+		      0, 0, 0, &res);
-+	if (res.a0)
-+		return -EPERM;
-+
-+	sprintf(icm_str, "0x%lx", res.a1);
-+
-+	return snprintf(buf, sizeof(icm_str), "%s", icm_str);
-+}
-+
-+static ssize_t large_icm_store(struct device_driver *drv, const char *buf,
-+			     size_t count)
-+{
-+	struct arm_smccc_res res;
-+	unsigned long icm_data;
-+	int err;
-+
-+	err = kstrtoul(buf, 16, &icm_data);
-+	if (err)
-+		return err;
-+
-+	if (((icm_data != 0) && (icm_data < 0x80)) ||
-+	    (icm_data > 0x100000) || (icm_data % 128))
-+		return -EPERM;
-+
-+	mutex_lock(&icm_ops_lock);
-+	arm_smccc_smc(MLNX_HANDLE_SET_ICM_INFO, icm_data, 0, 0, 0, 0, 0, 0, &res);
-+	mutex_unlock(&icm_ops_lock);
-+
-+	return res.a0 ? -EPERM : count;
-+}
-+
- static ssize_t opn_show(struct device_driver *drv, char *buf)
- {
- 	u64 opn_data[MLNX_MFG_VAL_QWORD_CNT(OPN)] = { 0 };
-@@ -1170,6 +1208,7 @@ static DRIVER_ATTR_RW(uuid);
- static DRIVER_ATTR_RW(rev);
- static DRIVER_ATTR_WO(mfg_lock);
- static DRIVER_ATTR_RW(rsh_log);
-+static DRIVER_ATTR_RW(large_icm);
- 
- static struct attribute *mbc_dev_attrs[] = {
- 	&driver_attr_post_reset_wdog.attr,
-@@ -1187,6 +1226,7 @@ static struct attribute *mbc_dev_attrs[] = {
- 	&driver_attr_rev.attr,
- 	&driver_attr_mfg_lock.attr,
- 	&driver_attr_rsh_log.attr,
-+	&driver_attr_large_icm.attr,
- 	NULL
- };
- 
-diff --git a/drivers/platform/mellanox/mlxbf-bootctl.h b/drivers/platform/mellanox/mlxbf-bootctl.h
-index 3e9dda829d6d..c70204770af3 100644
---- a/drivers/platform/mellanox/mlxbf-bootctl.h
-+++ b/drivers/platform/mellanox/mlxbf-bootctl.h
-@@ -95,6 +95,15 @@
- #define MLNX_HANDLE_GET_MFG_INFO    0x8200000F
- #define MLNX_HANDLE_LOCK_MFG_INFO   0x82000011
- 
-+/*
-+ * SMC function IDs to set and get the large ICM carveout size
-+ * stored in the eeprom.
-+ */
-+#define MLNX_HANDLE_SET_ICM_INFO    0x82000012
-+#define MLNX_HANDLE_GET_ICM_INFO    0x82000013
-+
-+#define MAX_ICM_BUFFER_SIZE 10
-+
- /* SMC function IDs for SiP Service queries */
- #define MLNX_SIP_SVC_CALL_COUNT		0x8200ff00
- #define MLNX_SIP_SVC_UID		0x8200ff01
--- 
-2.20.1
-
diff --git a/platform/mellanox/non-upstream-patches/patches/0078-UBUNTU-SAUCE-mlxbf-bootctl-support-SMC-call-for-sett.patch b/platform/mellanox/non-upstream-patches/patches/0078-UBUNTU-SAUCE-mlxbf-bootctl-support-SMC-call-for-sett.patch
deleted file mode 100644
index 94cc1d37b..000000000
--- a/platform/mellanox/non-upstream-patches/patches/0078-UBUNTU-SAUCE-mlxbf-bootctl-support-SMC-call-for-sett.patch
+++ /dev/null
@@ -1,93 +0,0 @@
-From 63f46d5beb56293f64ebb39f94a005acbe381f25 Mon Sep 17 00:00:00 2001
-From: Asmaa Mnebhi <asmaa@nvidia.com>
-Date: Thu, 30 Mar 2023 14:42:33 -0400
-Subject: [PATCH backport 6.1.42 78/85] UBUNTU: SAUCE: mlxbf-bootctl: support
- SMC call for setting ARM boot state
-
-BugLink: https://bugs.launchpad.net/bugs/2013383
-
-Add a new SMC call which allows setting the ARM boot progress state to "OS is up".
-
-Signed-off-by: Asmaa Mnebhi <asmaa@nvidia.com>
-Acked-by: Tim Gardner <tim.gardner@canonical.com>
-Acked-by: Bartlomiej Zolnierkiewicz <bartlomiej.zolnierkiewicz@canonical.com>
-Signed-off-by: Bartlomiej Zolnierkiewicz <bartlomiej.zolnierkiewicz@canonical.com>
----
- drivers/platform/mellanox/mlxbf-bootctl.c | 23 +++++++++++++++++++++++
- drivers/platform/mellanox/mlxbf-bootctl.h |  5 +++++
- 2 files changed, 28 insertions(+)
-
-diff --git a/drivers/platform/mellanox/mlxbf-bootctl.c b/drivers/platform/mellanox/mlxbf-bootctl.c
-index e8877a19dda9..a68bf5b27013 100644
---- a/drivers/platform/mellanox/mlxbf-bootctl.c
-+++ b/drivers/platform/mellanox/mlxbf-bootctl.c
-@@ -105,6 +105,7 @@ enum {
- /* This mutex is used to serialize MFG write and lock operations. */
- static DEFINE_MUTEX(mfg_ops_lock);
- static DEFINE_MUTEX(icm_ops_lock);
-+static DEFINE_MUTEX(os_up_lock);
- 
- #define MLNX_MFG_OOB_MAC_LEN         ETH_ALEN
- #define MLNX_MFG_OPN_VAL_LEN         24
-@@ -747,6 +748,26 @@ static ssize_t mfg_lock_store(struct device_driver *drv, const char *buf,
- 	return count;
- }
- 
-+static ssize_t os_up_store(struct device_driver *drv, const char *buf,
-+			      size_t count)
-+{
-+	unsigned long val;
-+	int err;
-+
-+	err = kstrtoul(buf, 10, &val);
-+	if (err)
-+		return err;
-+
-+	if (val != 1)
-+		return -EINVAL;
-+
-+	mutex_lock(&os_up_lock);
-+	smc_call0(MLNX_HANDLE_OS_UP);
-+	mutex_unlock(&os_up_lock);
-+
-+	return count;
-+}
-+
- /* Log header format. */
- #define RSH_LOG_TYPE_SHIFT	56
- #define RSH_LOG_LEN_SHIFT	48
-@@ -1209,6 +1230,7 @@ static DRIVER_ATTR_RW(rev);
- static DRIVER_ATTR_WO(mfg_lock);
- static DRIVER_ATTR_RW(rsh_log);
- static DRIVER_ATTR_RW(large_icm);
-+static DRIVER_ATTR_WO(os_up);
- 
- static struct attribute *mbc_dev_attrs[] = {
- 	&driver_attr_post_reset_wdog.attr,
-@@ -1227,6 +1249,7 @@ static struct attribute *mbc_dev_attrs[] = {
- 	&driver_attr_mfg_lock.attr,
- 	&driver_attr_rsh_log.attr,
- 	&driver_attr_large_icm.attr,
-+	&driver_attr_os_up.attr,
- 	NULL
- };
- 
-diff --git a/drivers/platform/mellanox/mlxbf-bootctl.h b/drivers/platform/mellanox/mlxbf-bootctl.h
-index c70204770af3..dc73f7e88914 100644
---- a/drivers/platform/mellanox/mlxbf-bootctl.h
-+++ b/drivers/platform/mellanox/mlxbf-bootctl.h
-@@ -102,6 +102,11 @@
- #define MLNX_HANDLE_SET_ICM_INFO    0x82000012
- #define MLNX_HANDLE_GET_ICM_INFO    0x82000013
- 
-+/*
-+ * SMC function ID to set the ARM boot state to up
-+ */
-+#define MLNX_HANDLE_OS_UP    0x82000014
-+
- #define MAX_ICM_BUFFER_SIZE 10
- 
- /* SMC function IDs for SiP Service queries */
--- 
-2.20.1
-
diff --git a/platform/mellanox/non-upstream-patches/patches/0079-UBUNTU-SAUCE-mlxbf-ptm-power-and-thermal-management-.patch b/platform/mellanox/non-upstream-patches/patches/0079-UBUNTU-SAUCE-mlxbf-ptm-power-and-thermal-management-.patch
deleted file mode 100644
index 1b7f14260..000000000
--- a/platform/mellanox/non-upstream-patches/patches/0079-UBUNTU-SAUCE-mlxbf-ptm-power-and-thermal-management-.patch
+++ /dev/null
@@ -1,281 +0,0 @@
-From 2734b1f7ca9acafd126706be280844d962e1b368 Mon Sep 17 00:00:00 2001
-From: Jitendra Lanka <jlanka@nvidia.com>
-Date: Mon, 16 Jan 2023 11:39:34 -0500
-Subject: [PATCH backport 6.1.42 79/85] UBUNTU: SAUCE: mlxbf-ptm: power and
- thermal management debugfs driver
-
-BugLink: https://bugs.launchpad.net/bugs/2002852
-
-mlxbf-ptm driver implements debugfs interface for Bluefield
-devices power and thermal management. It provides some parameters
-that can be monitored by system software.
-
-Signed-off-by: Jitendra Lanka <jlanka@nvidia.com>
-Acked-by: Tim Gardner <tim.gardner@canonical.com>
-Acked-by: Bartlomiej Zolnierkiewicz <bartlomiej.zolnierkiewicz@canonical.com>
-Signed-off-by: Bartlomiej Zolnierkiewicz <bartlomiej.zolnierkiewicz@canonical.com>
----
- drivers/platform/mellanox/Kconfig     |  10 ++
- drivers/platform/mellanox/Makefile    |   1 +
- drivers/platform/mellanox/mlxbf-ptm.c | 216 ++++++++++++++++++++++++++
- 3 files changed, 227 insertions(+)
- create mode 100644 drivers/platform/mellanox/mlxbf-ptm.c
-
-diff --git a/drivers/platform/mellanox/Kconfig b/drivers/platform/mellanox/Kconfig
-index 70b628834b4f..75efd345b22e 100644
---- a/drivers/platform/mellanox/Kconfig
-+++ b/drivers/platform/mellanox/Kconfig
-@@ -90,6 +90,16 @@ config MLXBF_PMC
- 	  to performance monitoring counters within various blocks in the
- 	  Mellanox BlueField SoC via a sysfs interface.
- 
-+config MLXBF_PTM
-+	tristate "BlueField Power and Thermal Management debugfs interface"
-+	depends on ARM64
-+	depends on DEBUG_FS
-+	help
-+		If you say yes to this option, support will added for the
-+		mlxbf-ptm driver.  This driver provides debugfs interface
-+		to userspace with information related to power and thermal
-+		management of the Bluefield device.
-+
- config NVSW_SN2201
- 	tristate "Nvidia SN2201 platform driver support"
- 	depends on HWMON
-diff --git a/drivers/platform/mellanox/Makefile b/drivers/platform/mellanox/Makefile
-index ba56485cbe8c..d7f4d940c505 100644
---- a/drivers/platform/mellanox/Makefile
-+++ b/drivers/platform/mellanox/Makefile
-@@ -7,6 +7,7 @@ obj-$(CONFIG_MLX_PLATFORM)	+= mlx-platform.o
- obj-$(CONFIG_MLXBF_BOOTCTL)	+= mlxbf-bootctl.o
- obj-$(CONFIG_MLXBF_PMC)		+= mlxbf-pmc.o
- obj-$(CONFIG_MLXBF_TMFIFO)	+= mlxbf-tmfifo.o
-+obj-$(CONFIG_MLXBF_PTM)	+= mlxbf-ptm.o
- obj-$(CONFIG_MLXREG_HOTPLUG)	+= mlxreg-hotplug.o
- obj-$(CONFIG_MLXREG_IO) += mlxreg-io.o
- obj-$(CONFIG_MLXREG_LC) += mlxreg-lc.o
-diff --git a/drivers/platform/mellanox/mlxbf-ptm.c b/drivers/platform/mellanox/mlxbf-ptm.c
-new file mode 100644
-index 000000000000..3692018b9d60
---- /dev/null
-+++ b/drivers/platform/mellanox/mlxbf-ptm.c
-@@ -0,0 +1,216 @@
-+// SPDX-License-Identifier: GPL-2.0 or BSD-3-Clause
-+/*
-+ *  Nvidia Bluefield power and thermal debugfs driver
-+ *  This driver provides a debugfs interface for systems management
-+ *  software to monitor power and thermal actions.
-+ *
-+ *  Copyright (C) 2023 NVIDIA Corporation.  All rights reserved.
-+ *  This Software is licensed under one of the following licenses:
-+ *
-+ * 1) under the terms of the "Common Public License 1.0" a copy of which is
-+ *    available from the Open Source Initiative, see
-+ *    http://www.opensource.org/licenses/cpl.php.
-+ *
-+ * 2) under the terms of the "The BSD License" a copy of which is
-+ *    available from the Open Source Initiative, see
-+ *    http://www.opensource.org/licenses/bsd-license.php.
-+ *
-+ * 3) under the terms of the "GNU General Public License (GPL) Version 2" a
-+ *    copy of which is available from the Open Source Initiative, see
-+ *    http://www.opensource.org/licenses/gpl-license.php.
-+ *
-+ * Licensee has the right to choose one of the above licenses.
-+ *
-+ * Redistributions of source code must retain the above copyright
-+ * notice and one of the license notices.
-+ *
-+ * Redistributions in binary form must reproduce both the above copyright
-+ * notice, one of the license notices in the documentation
-+ * and/or other materials provided with the distribution.
-+ */
-+
-+#include <linux/kernel.h>
-+#include <linux/debugfs.h>
-+#include <linux/module.h>
-+#include <linux/arm-smccc.h>
-+
-+/* SMC IDs */
-+#define MLNX_PTM_GET_VR0_POWER		0x82000101
-+#define MLNX_PTM_GET_VR1_POWER		0x82000102
-+#define MLNX_PTM_GET_THROTTLE_STATE	0x82000103
-+#define MLNX_PTM_GET_DDR_THLD		0x82000104
-+#define MLNX_PTM_GET_STATUS_REG		0x82000105
-+#define MLNX_PTM_GET_PTHROTTLE          0x82000106
-+#define MLNX_PTM_GET_TTHROTTLE          0x82000107
-+#define MLNX_PTM_GET_MAX_TEMP           0x82000108
-+#define MLNX_PTM_GET_PWR_EVT_CNT	0x82000109
-+#define MLNX_PTM_GET_TEMP_EVT_CNT	0x8200010A
-+
-+#define MLNX_POWER_ERROR		300
-+
-+struct dentry *monitors;
-+
-+static int smc_call1(unsigned int smc_op, int smc_arg)
-+{
-+	struct arm_smccc_res res;
-+
-+	arm_smccc_smc(smc_op, smc_arg, 0, 0, 0, 0, 0, 0, &res);
-+
-+	return res.a0;
-+}
-+
-+#define smc_call0(smc_op) smc_call1(smc_op, 0)
-+
-+static int throttling_state_show(void *data, u64 *val)
-+{
-+	*val = smc_call0(MLNX_PTM_GET_THROTTLE_STATE);
-+
-+	return 0;
-+}
-+DEFINE_SIMPLE_ATTRIBUTE(throttling_state_fops,
-+			throttling_state_show, NULL, "%llu\n");
-+
-+static int pthrottling_state_show(void *data, u64 *val)
-+{
-+	*val = smc_call0(MLNX_PTM_GET_PTHROTTLE);
-+
-+	return 0;
-+}
-+DEFINE_SIMPLE_ATTRIBUTE(pthrottling_state_fops,
-+			pthrottling_state_show, NULL, "%llu\n");
-+
-+static int tthrottling_state_show(void *data, u64 *val)
-+{
-+	*val = smc_call0(MLNX_PTM_GET_TTHROTTLE);
-+
-+	return 0;
-+}
-+DEFINE_SIMPLE_ATTRIBUTE(tthrottling_state_fops,
-+			tthrottling_state_show, NULL, "%llu\n");
-+
-+static int core_temp_show(void *data, u64 *val)
-+{
-+	*val = smc_call0(MLNX_PTM_GET_MAX_TEMP);
-+
-+	return 0;
-+}
-+DEFINE_SIMPLE_ATTRIBUTE(core_temp_fops,
-+			core_temp_show, NULL, "%lld\n");
-+
-+static int pwr_evt_counter_show(void *data, u64 *val)
-+{
-+	*val = smc_call0(MLNX_PTM_GET_PWR_EVT_CNT);
-+
-+	return 0;
-+}
-+DEFINE_SIMPLE_ATTRIBUTE(pwr_evt_counter_fops,
-+			pwr_evt_counter_show, NULL, "%llu\n");
-+
-+static int temp_evt_counter_show(void *data, u64 *val)
-+{
-+	*val = smc_call0(MLNX_PTM_GET_TEMP_EVT_CNT);
-+
-+	return 0;
-+}
-+DEFINE_SIMPLE_ATTRIBUTE(temp_evt_counter_fops,
-+			temp_evt_counter_show, NULL, "%llu\n");
-+
-+static int vr0_power_show(void *data, u64 *val)
-+{
-+	*val = smc_call0(MLNX_PTM_GET_VR0_POWER);
-+
-+	return 0;
-+}
-+DEFINE_SIMPLE_ATTRIBUTE(vr0_power_fops, vr0_power_show, NULL, "%llu\n");
-+
-+static int vr1_power_show(void *data, u64 *val)
-+{
-+	*val = smc_call0(MLNX_PTM_GET_VR1_POWER);
-+
-+	return 0;
-+}
-+DEFINE_SIMPLE_ATTRIBUTE(vr1_power_fops, vr1_power_show, NULL, "%llu\n");
-+
-+static int total_power_show(void *data, u64 *val)
-+{
-+	u64 v0, v1;
-+
-+	v0 = smc_call0(MLNX_PTM_GET_VR0_POWER);
-+	if (v0 > MLNX_POWER_ERROR)
-+		v0 = 0;
-+	v1 = smc_call0(MLNX_PTM_GET_VR1_POWER);
-+	if (v1 > MLNX_POWER_ERROR)
-+		v1 = 0;
-+	*val = (v0 + v1);
-+
-+	return 0;
-+}
-+DEFINE_SIMPLE_ATTRIBUTE(total_power_fops, total_power_show, NULL, "%llu\n");
-+
-+static int ddr_thld_show(void *data, u64 *val)
-+{
-+	*val = smc_call0(MLNX_PTM_GET_DDR_THLD);
-+
-+	return 0;
-+}
-+DEFINE_SIMPLE_ATTRIBUTE(ddr_thld_fops, ddr_thld_show, NULL, "%llu\n");
-+
-+static int error_status_show(void *data, u64 *val)
-+{
-+	*val = smc_call0(MLNX_PTM_GET_STATUS_REG);
-+
-+	return 0;
-+}
-+DEFINE_SIMPLE_ATTRIBUTE(error_status_fops,
-+			error_status_show, NULL, "%llu\n");
-+
-+
-+static int __init mlxbf_ptm_init(void)
-+{
-+	struct dentry *ptm_root, *status;
-+
-+	ptm_root = debugfs_lookup("mlxbf-ptm", NULL);
-+	if (!ptm_root)
-+		ptm_root = debugfs_create_dir("mlxbf-ptm", NULL);
-+
-+	monitors = debugfs_create_dir("monitors", ptm_root);
-+	status = debugfs_create_dir("status", monitors);
-+
-+	debugfs_create_file("vr0_power", S_IRUGO, status, NULL,
-+			    &vr0_power_fops);
-+	debugfs_create_file("vr1_power", S_IRUGO, status, NULL,
-+			    &vr1_power_fops);
-+	debugfs_create_file("total_power", S_IRUGO, status, NULL,
-+			    &total_power_fops);
-+	debugfs_create_file("ddr_temp", S_IRUGO, status,
-+			    NULL, &ddr_thld_fops);
-+	debugfs_create_file("core_temp", S_IRUGO, status,
-+			    NULL, &core_temp_fops);
-+	debugfs_create_file("power_throttling_event_count", S_IRUGO, status,
-+			    NULL, &pwr_evt_counter_fops);
-+	debugfs_create_file("thermal_throttling_event_count", S_IRUGO, status,
-+			    NULL, &temp_evt_counter_fops);
-+	debugfs_create_file("throttling_state", S_IRUGO, status,
-+			    NULL, &throttling_state_fops);
-+	debugfs_create_file("power_throttling_state", S_IRUGO, status,
-+			    NULL, &pthrottling_state_fops);
-+	debugfs_create_file("thermal_throttling_state", S_IRUGO, status,
-+			    NULL, &tthrottling_state_fops);
-+	debugfs_create_file("error_state", S_IRUGO, status,
-+			    NULL, &error_status_fops);
-+
-+	return 0;
-+}
-+
-+static void __exit mlxbf_ptm_exit(void)
-+{
-+	debugfs_remove_recursive(monitors);
-+}
-+
-+module_init(mlxbf_ptm_init);
-+module_exit(mlxbf_ptm_exit);
-+
-+MODULE_AUTHOR("Jitendra Lanka <jlanka@nvidia.com>");
-+MODULE_DESCRIPTION("Nvidia Bluefield power and thermal debugfs driver");
-+MODULE_LICENSE("Dual BSD/GPL");
-+MODULE_VERSION("1.0");
--- 
-2.20.1
-
diff --git a/platform/mellanox/non-upstream-patches/patches/0080-UBUNTU-SAUCE-mlxbf-ptm-update-license.patch b/platform/mellanox/non-upstream-patches/patches/0080-UBUNTU-SAUCE-mlxbf-ptm-update-license.patch
deleted file mode 100644
index d2d604bb3..000000000
--- a/platform/mellanox/non-upstream-patches/patches/0080-UBUNTU-SAUCE-mlxbf-ptm-update-license.patch
+++ /dev/null
@@ -1,60 +0,0 @@
-From d6703416953dd1c3fe6e84a76c6d85a73fcbdc4b Mon Sep 17 00:00:00 2001
-From: Jitendra Lanka <jlanka@nvidia.com>
-Date: Wed, 22 Mar 2023 11:39:54 -0400
-Subject: [PATCH backport 6.1.42 80/85] UBUNTU: SAUCE: mlxbf-ptm: update
- license
-
-BugLink: https://bugs.launchpad.net/bugs/2011738
-
-Update license
-
-Signed-off-by: Jitendra Lanka <jlanka@nvidia.com>
-Acked-by: Tim Gardner <tim.gardner@canonical.com>
-Acked-by: Bartlomiej Zolnierkiewicz <bartlomiej.zolnierkiewicz@canonical.com>
-Signed-off-by: Bartlomiej Zolnierkiewicz <bartlomiej.zolnierkiewicz@canonical.com>
----
- drivers/platform/mellanox/mlxbf-ptm.c | 26 ++------------------------
- 1 file changed, 2 insertions(+), 24 deletions(-)
-
-diff --git a/drivers/platform/mellanox/mlxbf-ptm.c b/drivers/platform/mellanox/mlxbf-ptm.c
-index 3692018b9d60..79c3e2902070 100644
---- a/drivers/platform/mellanox/mlxbf-ptm.c
-+++ b/drivers/platform/mellanox/mlxbf-ptm.c
-@@ -1,32 +1,10 @@
- // SPDX-License-Identifier: GPL-2.0 or BSD-3-Clause
- /*
-+ *  Copyright (C) 2023 NVIDIA Corporation & Affiliates.
-+ *
-  *  Nvidia Bluefield power and thermal debugfs driver
-  *  This driver provides a debugfs interface for systems management
-  *  software to monitor power and thermal actions.
-- *
-- *  Copyright (C) 2023 NVIDIA Corporation.  All rights reserved.
-- *  This Software is licensed under one of the following licenses:
-- *
-- * 1) under the terms of the "Common Public License 1.0" a copy of which is
-- *    available from the Open Source Initiative, see
-- *    http://www.opensource.org/licenses/cpl.php.
-- *
-- * 2) under the terms of the "The BSD License" a copy of which is
-- *    available from the Open Source Initiative, see
-- *    http://www.opensource.org/licenses/bsd-license.php.
-- *
-- * 3) under the terms of the "GNU General Public License (GPL) Version 2" a
-- *    copy of which is available from the Open Source Initiative, see
-- *    http://www.opensource.org/licenses/gpl-license.php.
-- *
-- * Licensee has the right to choose one of the above licenses.
-- *
-- * Redistributions of source code must retain the above copyright
-- * notice and one of the license notices.
-- *
-- * Redistributions in binary form must reproduce both the above copyright
-- * notice, one of the license notices in the documentation
-- * and/or other materials provided with the distribution.
-  */
- 
- #include <linux/kernel.h>
--- 
-2.20.1
-
diff --git a/platform/mellanox/non-upstream-patches/patches/0081-UBUNTU-SAUCE-mlxbf-ptm-use-0444-instead-of-S_IRUGO.patch b/platform/mellanox/non-upstream-patches/patches/0081-UBUNTU-SAUCE-mlxbf-ptm-use-0444-instead-of-S_IRUGO.patch
deleted file mode 100644
index c9816d481..000000000
--- a/platform/mellanox/non-upstream-patches/patches/0081-UBUNTU-SAUCE-mlxbf-ptm-use-0444-instead-of-S_IRUGO.patch
+++ /dev/null
@@ -1,64 +0,0 @@
-From c3c93684288a230ebf63ca8e07cc420db07d5f89 Mon Sep 17 00:00:00 2001
-From: Jitendra Lanka <jlanka@nvidia.com>
-Date: Wed, 22 Mar 2023 11:39:55 -0400
-Subject: [PATCH backport 6.1.42 81/85] UBUNTU: SAUCE: mlxbf-ptm: use 0444
- instead of S_IRUGO
-
-BugLink: https://bugs.launchpad.net/bugs/2011738
-
-As recommended by checkscript, change S_IRUGO to 0444
-
-Signed-off-by: Jitendra Lanka <jlanka@nvidia.com>
-Acked-by: Tim Gardner <tim.gardner@canonical.com>
-Acked-by: Bartlomiej Zolnierkiewicz <bartlomiej.zolnierkiewicz@canonical.com>
-Signed-off-by: Bartlomiej Zolnierkiewicz <bartlomiej.zolnierkiewicz@canonical.com>
----
- drivers/platform/mellanox/mlxbf-ptm.c | 22 +++++++++++-----------
- 1 file changed, 11 insertions(+), 11 deletions(-)
-
-diff --git a/drivers/platform/mellanox/mlxbf-ptm.c b/drivers/platform/mellanox/mlxbf-ptm.c
-index 79c3e2902070..aeb68dc42e32 100644
---- a/drivers/platform/mellanox/mlxbf-ptm.c
-+++ b/drivers/platform/mellanox/mlxbf-ptm.c
-@@ -154,27 +154,27 @@ static int __init mlxbf_ptm_init(void)
- 	monitors = debugfs_create_dir("monitors", ptm_root);
- 	status = debugfs_create_dir("status", monitors);
- 
--	debugfs_create_file("vr0_power", S_IRUGO, status, NULL,
-+	debugfs_create_file("vr0_power", 0444, status, NULL,
- 			    &vr0_power_fops);
--	debugfs_create_file("vr1_power", S_IRUGO, status, NULL,
-+	debugfs_create_file("vr1_power", 0444, status, NULL,
- 			    &vr1_power_fops);
--	debugfs_create_file("total_power", S_IRUGO, status, NULL,
-+	debugfs_create_file("total_power", 0444, status, NULL,
- 			    &total_power_fops);
--	debugfs_create_file("ddr_temp", S_IRUGO, status,
-+	debugfs_create_file("ddr_temp", 0444, status,
- 			    NULL, &ddr_thld_fops);
--	debugfs_create_file("core_temp", S_IRUGO, status,
-+	debugfs_create_file("core_temp", 0444, status,
- 			    NULL, &core_temp_fops);
--	debugfs_create_file("power_throttling_event_count", S_IRUGO, status,
-+	debugfs_create_file("power_throttling_event_count", 0444, status,
- 			    NULL, &pwr_evt_counter_fops);
--	debugfs_create_file("thermal_throttling_event_count", S_IRUGO, status,
-+	debugfs_create_file("thermal_throttling_event_count", 0444, status,
- 			    NULL, &temp_evt_counter_fops);
--	debugfs_create_file("throttling_state", S_IRUGO, status,
-+	debugfs_create_file("throttling_state", 0444, status,
- 			    NULL, &throttling_state_fops);
--	debugfs_create_file("power_throttling_state", S_IRUGO, status,
-+	debugfs_create_file("power_throttling_state", 0444, status,
- 			    NULL, &pthrottling_state_fops);
--	debugfs_create_file("thermal_throttling_state", S_IRUGO, status,
-+	debugfs_create_file("thermal_throttling_state", 0444, status,
- 			    NULL, &tthrottling_state_fops);
--	debugfs_create_file("error_state", S_IRUGO, status,
-+	debugfs_create_file("error_state", 0444, status,
- 			    NULL, &error_status_fops);
- 
- 	return 0;
--- 
-2.20.1
-
diff --git a/platform/mellanox/non-upstream-patches/patches/0082-UBUNTU-SAUCE-mlxbf-ptm-add-atx-debugfs-nodes.patch b/platform/mellanox/non-upstream-patches/patches/0082-UBUNTU-SAUCE-mlxbf-ptm-add-atx-debugfs-nodes.patch
deleted file mode 100644
index 2fbe1b9a8..000000000
--- a/platform/mellanox/non-upstream-patches/patches/0082-UBUNTU-SAUCE-mlxbf-ptm-add-atx-debugfs-nodes.patch
+++ /dev/null
@@ -1,83 +0,0 @@
-From 82305cf0e95a8c711cbcb9f74193c5a2fe62f6fa Mon Sep 17 00:00:00 2001
-From: Jitendra Lanka <jlanka@nvidia.com>
-Date: Wed, 22 Mar 2023 11:39:56 -0400
-Subject: [PATCH backport 6.1.42 82/85] UBUNTU: SAUCE: mlxbf-ptm: add atx
- debugfs nodes
-
-BugLink: https://bugs.launchpad.net/bugs/2011738
-
-Add additional debugfs nodes that provide ATX status and
-power profile data.
-
-Signed-off-by: Jitendra Lanka <jlanka@nvidia.com>
-Acked-by: Tim Gardner <tim.gardner@canonical.com>
-Acked-by: Bartlomiej Zolnierkiewicz <bartlomiej.zolnierkiewicz@canonical.com>
-Signed-off-by: Bartlomiej Zolnierkiewicz <bartlomiej.zolnierkiewicz@canonical.com>
----
- drivers/platform/mellanox/mlxbf-ptm.c | 36 +++++++++++++++++++++++++++
- 1 file changed, 36 insertions(+)
-
-diff --git a/drivers/platform/mellanox/mlxbf-ptm.c b/drivers/platform/mellanox/mlxbf-ptm.c
-index aeb68dc42e32..a2845aa57c5b 100644
---- a/drivers/platform/mellanox/mlxbf-ptm.c
-+++ b/drivers/platform/mellanox/mlxbf-ptm.c
-@@ -23,6 +23,9 @@
- #define MLNX_PTM_GET_MAX_TEMP           0x82000108
- #define MLNX_PTM_GET_PWR_EVT_CNT	0x82000109
- #define MLNX_PTM_GET_TEMP_EVT_CNT	0x8200010A
-+#define MLNX_PTM_GET_POWER_ENVELOPE     0x8200010B
-+#define MLNX_PTM_GET_ATX_PWR_STATE      0x8200010C
-+#define MLNX_PTM_GET_CUR_PPROFILE       0x8200010D
- 
- #define MLNX_POWER_ERROR		300
- 
-@@ -142,6 +145,33 @@ static int error_status_show(void *data, u64 *val)
- DEFINE_SIMPLE_ATTRIBUTE(error_status_fops,
- 			error_status_show, NULL, "%llu\n");
- 
-+static int power_envelope_show(void *data, u64 *val)
-+{
-+	*val = smc_call0(MLNX_PTM_GET_POWER_ENVELOPE);
-+
-+	return 0;
-+}
-+DEFINE_SIMPLE_ATTRIBUTE(power_envelope_fops,
-+			power_envelope_show, NULL, "%llu\n");
-+
-+static int atx_status_show(void *data, u64 *val)
-+{
-+	*val = smc_call0(MLNX_PTM_GET_ATX_PWR_STATE);
-+
-+	return 0;
-+}
-+DEFINE_SIMPLE_ATTRIBUTE(atx_status_fops,
-+			atx_status_show, NULL, "%lld\n");
-+
-+static int current_pprofile_show(void *data, u64 *val)
-+{
-+	*val = smc_call0(MLNX_PTM_GET_CUR_PPROFILE);
-+
-+	return 0;
-+}
-+DEFINE_SIMPLE_ATTRIBUTE(current_pprofile_fops,
-+			current_pprofile_show, NULL, "%llu\n");
-+
- 
- static int __init mlxbf_ptm_init(void)
- {
-@@ -176,6 +206,12 @@ static int __init mlxbf_ptm_init(void)
- 			    NULL, &tthrottling_state_fops);
- 	debugfs_create_file("error_state", 0444, status,
- 			    NULL, &error_status_fops);
-+	debugfs_create_file("power_envelope", 0444, status,
-+			    NULL, &power_envelope_fops);
-+	debugfs_create_file("atx_power_available", 0444, status,
-+			    NULL, &atx_status_fops);
-+	debugfs_create_file("active_power_profile", 0444, status,
-+			    NULL, &current_pprofile_fops);
- 
- 	return 0;
- }
--- 
-2.20.1
-
diff --git a/platform/mellanox/non-upstream-patches/patches/0083-UBUNTU-SAUCE-mlxbf-ptm-update-module-version.patch b/platform/mellanox/non-upstream-patches/patches/0083-UBUNTU-SAUCE-mlxbf-ptm-update-module-version.patch
deleted file mode 100644
index 4498da412..000000000
--- a/platform/mellanox/non-upstream-patches/patches/0083-UBUNTU-SAUCE-mlxbf-ptm-update-module-version.patch
+++ /dev/null
@@ -1,31 +0,0 @@
-From efaf25dc1e11de91140b9010e743182bc763124c Mon Sep 17 00:00:00 2001
-From: Jitendra Lanka <jlanka@nvidia.com>
-Date: Wed, 22 Mar 2023 11:39:57 -0400
-Subject: [PATCH backport 6.1.42 83/85] UBUNTU: SAUCE: mlxbf-ptm: update module
- version
-
-BugLink: https://bugs.launchpad.net/bugs/2011738
-
-update module version
-
-Signed-off-by: Jitendra Lanka <jlanka@nvidia.com>
-Acked-by: Tim Gardner <tim.gardner@canonical.com>
-Acked-by: Bartlomiej Zolnierkiewicz <bartlomiej.zolnierkiewicz@canonical.com>
-Signed-off-by: Bartlomiej Zolnierkiewicz <bartlomiej.zolnierkiewicz@canonical.com>
----
- drivers/platform/mellanox/mlxbf-ptm.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/platform/mellanox/mlxbf-ptm.c b/drivers/platform/mellanox/mlxbf-ptm.c
-index a2845aa57c5b..eb4460cb058b 100644
---- a/drivers/platform/mellanox/mlxbf-ptm.c
-+++ b/drivers/platform/mellanox/mlxbf-ptm.c
-@@ -227,4 +227,4 @@ module_exit(mlxbf_ptm_exit);
- MODULE_AUTHOR("Jitendra Lanka <jlanka@nvidia.com>");
- MODULE_DESCRIPTION("Nvidia Bluefield power and thermal debugfs driver");
- MODULE_LICENSE("Dual BSD/GPL");
--MODULE_VERSION("1.0");
-+MODULE_VERSION("1.1");
--- 
-2.20.1
-
diff --git a/platform/mellanox/non-upstream-patches/patches/0084-UBUNTU-SAUCE-mlxbf-bootctl-Fix-kernel-panic-due-to-b.patch b/platform/mellanox/non-upstream-patches/patches/0084-UBUNTU-SAUCE-mlxbf-bootctl-Fix-kernel-panic-due-to-b.patch
deleted file mode 100644
index 433d88f13..000000000
--- a/platform/mellanox/non-upstream-patches/patches/0084-UBUNTU-SAUCE-mlxbf-bootctl-Fix-kernel-panic-due-to-b.patch
+++ /dev/null
@@ -1,56 +0,0 @@
-From 9c9944b7c98fc61161c204b7ef397a3ac05977ba Mon Sep 17 00:00:00 2001
-From: Asmaa Mnebhi <asmaa@nvidia.com>
-Date: Thu, 20 Jul 2023 16:37:37 -0400
-Subject: [PATCH backport 6.1.42 13/20] UBUNTU: SAUCE: mlxbf-bootctl: Fix
- kernel panic due to buffer overflow
-
-BugLink: https://bugs.launchpad.net/bugs/2028309
-
-Running the following LTP (linux-test-project) script, causes
-a kernel panic and a reboot of the DPU:
-ltp/testcases/bin/read_all -d /sys -q -r 10
-
-The above test reads all directory and files under /sys.
-Reading the sysfs entry "large_icm" causes the kernel panic
-due to a garbage value returned via i2c read. That garbage
-value causes a buffer overflow in sprintf.
-
-Replace sprintf with snprintf. And also add missing lock and
-increase the buffer size to PAGE_SIZE.
-
-Signed-off-by: Asmaa Mnebhi <asmaa@nvidia.com>
-Acked-by: Bartlomiej Zolnierkiewicz <bartlomiej.zolnierkiewicz@canonical.com>
-Acked-by: Tim Gardner <tim.gardner@canonical.com>
-Signed-off-by: Bartlomiej Zolnierkiewicz <bartlomiej.zolnierkiewicz@canonical.com>
----
- drivers/platform/mellanox/mlxbf-bootctl.c | 7 +++----
- 1 file changed, 3 insertions(+), 4 deletions(-)
-
-diff --git a/drivers/platform/mellanox/mlxbf-bootctl.c b/drivers/platform/mellanox/mlxbf-bootctl.c
-index a68bf5b27013..52666ee360b2 100644
---- a/drivers/platform/mellanox/mlxbf-bootctl.c
-+++ b/drivers/platform/mellanox/mlxbf-bootctl.c
-@@ -387,17 +387,16 @@ static ssize_t oob_mac_store(struct device_driver *drv, const char *buf,
- 
- static ssize_t large_icm_show(struct device_driver *drv, char *buf)
- {
--	char icm_str[MAX_ICM_BUFFER_SIZE] = { 0 };
- 	struct arm_smccc_res res;
- 
-+	mutex_lock(&icm_ops_lock);
- 	arm_smccc_smc(MLNX_HANDLE_GET_ICM_INFO, 0, 0, 0, 0,
- 		      0, 0, 0, &res);
-+	mutex_unlock(&icm_ops_lock);
- 	if (res.a0)
- 		return -EPERM;
- 
--	sprintf(icm_str, "0x%lx", res.a1);
--
--	return snprintf(buf, sizeof(icm_str), "%s", icm_str);
-+	return snprintf(buf, PAGE_SIZE, "0x%lx", res.a1);
- }
- 
- static ssize_t large_icm_store(struct device_driver *drv, const char *buf,
--- 
-2.25.1
-
diff --git a/platform/mellanox/non-upstream-patches/patches/8000-mlxsw-Use-weak-reverse-dependencies-for-firmware-fla.patch b/platform/mellanox/non-upstream-patches/patches/8000-mlxsw-Use-weak-reverse-dependencies-for-firmware-fla.patch
deleted file mode 100644
index ba8f2fd77..000000000
--- a/platform/mellanox/non-upstream-patches/patches/8000-mlxsw-Use-weak-reverse-dependencies-for-firmware-fla.patch
+++ /dev/null
@@ -1,34 +0,0 @@
-From 646a7ca330eddb18e915380c9e8296a8cbce3c81 Mon Sep 17 00:00:00 2001
-From: Vadim Pasternak <vadimp@nvidia.com>
-Date: Wed, 20 Oct 2021 09:49:28 +0000
-Subject: [PATCH backport 6.1.42 40/85] mlxsw: Use weak reverse dependencies
- for firmware flashing selection
-
-Replace configuration options "select" by "imply". It allows to set
-'MLXFW' symbol to 'n' from a direct dependency or with a visible
-prompt.
-
-User might wish to disable this option in case only 'mlxsw_minimal' is
-configured, since it does not support firmware flashing.
-
-Signed-off-by: Vadim Pasternak <vadimp@nvidia.com>
----
- drivers/net/ethernet/mellanox/mlxsw/Kconfig | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/net/ethernet/mellanox/mlxsw/Kconfig b/drivers/net/ethernet/mellanox/mlxsw/Kconfig
-index a510bf2cff2f..efc7ec8fa33c 100644
---- a/drivers/net/ethernet/mellanox/mlxsw/Kconfig
-+++ b/drivers/net/ethernet/mellanox/mlxsw/Kconfig
-@@ -6,7 +6,7 @@
- config MLXSW_CORE
- 	tristate "Mellanox Technologies Switch ASICs support"
- 	select NET_DEVLINK
--	select MLXFW
-+	imply MLXFW
- 	select AUXILIARY_BUS
- 	help
- 	  This driver supports Mellanox Technologies Switch ASICs family.
--- 
-2.20.1
-
diff --git a/platform/mellanox/non-upstream-patches/patches/8004-mlxsw-minimal-Downstream-Ignore-error-reading-SPAD-r.patch b/platform/mellanox/non-upstream-patches/patches/8004-mlxsw-minimal-Downstream-Ignore-error-reading-SPAD-r.patch
deleted file mode 100644
index 3a220713e..000000000
--- a/platform/mellanox/non-upstream-patches/patches/8004-mlxsw-minimal-Downstream-Ignore-error-reading-SPAD-r.patch
+++ /dev/null
@@ -1,36 +0,0 @@
-From a742d55ed36a0bd3b6346563665b951dad9ad469 Mon Sep 17 00:00:00 2001
-From: root <root@fit-build-116.mtl.labs.mlnx>
-Date: Tue, 5 Apr 2022 21:35:55 +0300
-Subject: [PATH backport v6.1 2/3] mlxsw: minimal: Downstream: Ignore error
- reading SPAD register
-
-SPAD register is not supported for IB systems.
-
-Signed-off-by: Vadim Pasternak <vadimp@nvidia.com>
----
- drivers/net/ethernet/mellanox/mlxsw/minimal.c | 2 ++
- 1 file changed, 2 insertions(+)
-
-diff --git a/drivers/net/ethernet/mellanox/mlxsw/minimal.c b/drivers/net/ethernet/mellanox/mlxsw/minimal.c
-index 15116d9305f8..7396b37bc880 100644
---- a/drivers/net/ethernet/mellanox/mlxsw/minimal.c
-+++ b/drivers/net/ethernet/mellanox/mlxsw/minimal.c
-@@ -53,6 +53,7 @@ struct mlxsw_m_port {
- 
- static int mlxsw_m_base_mac_get(struct mlxsw_m *mlxsw_m)
- {
-+#if 0
- 	char spad_pl[MLXSW_REG_SPAD_LEN] = {0};
- 	int err;
- 
-@@ -60,6 +61,7 @@ static int mlxsw_m_base_mac_get(struct mlxsw_m *mlxsw_m)
- 	if (err)
- 		return err;
- 	mlxsw_reg_spad_base_mac_memcpy_from(spad_pl, mlxsw_m->base_mac);
-+#endif
- 	return 0;
- }
- 
--- 
-2.20.1
-
diff --git a/platform/mellanox/sdk.mk b/platform/mellanox/sdk.mk
index d91823d41..8554e9a03 100644
--- a/platform/mellanox/sdk.mk
+++ b/platform/mellanox/sdk.mk
@@ -14,7 +14,7 @@
 # See the License for the specific language governing permissions and
 # limitations under the License.
 #
-MLNX_SDK_VERSION = 4.6.2202
+MLNX_SDK_VERSION = 4.6.3064
 MLNX_SDK_ISSU_VERSION = 101
 
 MLNX_SDK_DRIVERS_GITHUB_URL = https://github.com/Mellanox/Spectrum-SDK-Drivers

From 404e27bdfcd76f9b3689ed5a291955196df69d66 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Fri, 12 Apr 2024 07:01:09 +0800
Subject: [PATCH 0425/1115] [submodule] Update submodule sonic-snmpagent to the
 latest HEAD automatically (#18655)

#### Why I did it
src/sonic-snmpagent
```
* f652948 - (HEAD -> master, origin/master, origin/HEAD) snmp-subagent changes for bookworm upgrade (#313) (2 hours ago) [mohan-selvaraj]
* 204d97d - Update dotnet version installed to 8.0 (#314) (2 hours ago) [Saikrishna Arcot]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-snmpagent | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-snmpagent b/src/sonic-snmpagent
index 4a6de8b93..f65294810 160000
--- a/src/sonic-snmpagent
+++ b/src/sonic-snmpagent
@@ -1 +1 @@
-Subproject commit 4a6de8b936a50fd8b3ea6a3b9931b9c6a03b4c18
+Subproject commit f6529481013dbe736246e7c0b34d4851ce515c2c

From 00b7ce2c9d049e240bd067b0e900996c927ff55a Mon Sep 17 00:00:00 2001
From: Zain Budhwani <99770260+zbud-msft@users.noreply.github.com>
Date: Thu, 11 Apr 2024 17:52:06 -0700
Subject: [PATCH 0426/1115] Export GOTRACEBACK=crash env variable (#18559)

### Why I did it

Improve visibility for telemetry crashes by allowing core to be dumped.

### How I did it

Export GOTRACEBACK=crash as an environment variable.

#### How to verify it

Manual test

1) Change telemetry binary to crash always, first line of telemetry.go main() -> panic("problem")
2) Add change to telemetry.sh
3) Restart telemetry
4) See core in /var/core
---
 dockers/docker-sonic-telemetry/telemetry.sh | 1 +
 1 file changed, 1 insertion(+)

diff --git a/dockers/docker-sonic-telemetry/telemetry.sh b/dockers/docker-sonic-telemetry/telemetry.sh
index 4e9b6574d..dadd226b8 100755
--- a/dockers/docker-sonic-telemetry/telemetry.sh
+++ b/dockers/docker-sonic-telemetry/telemetry.sh
@@ -19,6 +19,7 @@ CERTS=$(echo $TELEMETRY_VARS | jq -r '.certs')
 
 TELEMETRY_ARGS=" -logtostderr"
 export CVL_SCHEMA_PATH=/usr/sbin/schema
+export GOTRACEBACK=crash
 
 if [ -n "$CERTS" ]; then
     SERVER_CRT=$(echo $CERTS | jq -r '.server_crt')

From a445e26f59381a6d7aa30bf44bcd265c5b56d1c3 Mon Sep 17 00:00:00 2001
From: Senthil Kumar Guruswamy <75792349+sg893052@users.noreply.github.com>
Date: Fri, 12 Apr 2024 06:27:18 +0530
Subject: [PATCH 0427/1115] PDE Migration to bookworm in sonic-buildimage
 (#18506)

---
 dockers/docker-pde/Dockerfile.j2 |  2 +-
 platform/broadcom/docker-pde.mk  | 10 +++++-----
 2 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/dockers/docker-pde/Dockerfile.j2 b/dockers/docker-pde/Dockerfile.j2
index 6a0b21154..bdfe3e238 100644
--- a/dockers/docker-pde/Dockerfile.j2
+++ b/dockers/docker-pde/Dockerfile.j2
@@ -1,4 +1,4 @@
-FROM docker-config-engine-bullseye-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}}
+FROM docker-config-engine-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}}
 
 ARG docker_container_name
 ENV PYTHONPATH=/usr/share/sonic/platform
diff --git a/platform/broadcom/docker-pde.mk b/platform/broadcom/docker-pde.mk
index a16c0c1f1..476b2e09e 100644
--- a/platform/broadcom/docker-pde.mk
+++ b/platform/broadcom/docker-pde.mk
@@ -16,14 +16,14 @@ ifeq ($(PDDF_SUPPORT), y)
 $(DOCKER_PDE)_PYTHON_WHEELS += $(PDDF_PLATFORM_API_BASE_PY3)
 endif
 $(DOCKER_PDE)_PYTHON_WHEELS += $(SONIC_DAEMON_BASE_PY3)
-$(DOCKER_PDE)_DBG_DEPENDS = $($(DOCKER_CONFIG_ENGINE_BULLSEYE)_DBG_DEPENDS)
-$(DOCKER_PDE)_DBG_IMAGE_PACKAGES = $($(DOCKER_CONFIG_ENGINE_BULLSEYE)_DBG_IMAGE_PACKAGES)
-$(DOCKER_PDE)_LOAD_DOCKERS = $(DOCKER_CONFIG_ENGINE_BULLSEYE)
+$(DOCKER_PDE)_DBG_DEPENDS = $($(DOCKER_CONFIG_ENGINE_BOOKWORM)_DBG_DEPENDS)
+$(DOCKER_PDE)_DBG_IMAGE_PACKAGES = $($(DOCKER_CONFIG_ENGINE_BOOKWORM)_DBG_IMAGE_PACKAGES)
+$(DOCKER_PDE)_LOAD_DOCKERS = $(DOCKER_CONFIG_ENGINE_BOOKWORM)
 
 SONIC_DOCKER_IMAGES += $(DOCKER_PDE)
-SONIC_BULLSEYE_DOCKERS += $(DOCKER_PDE)
+SONIC_BOOKWORM_DOCKERS += $(DOCKER_PDE)
 SONIC_INSTALL_DOCKER_IMAGES += $(DOCKER_PDE)
-SONIC_BULLSEYE_DBG_DOCKERS += $(DOCKER_PDE_DBG)
+SONIC_BOOKWORM_DBG_DOCKERS += $(DOCKER_PDE_DBG)
 SONIC_DOCKER_DBG_IMAGES += $(DOCKER_PDE_DBG)
 SONIC_INSTALL_DOCKER_DBG_IMAGES += $(DOCKER_PDE_DBG)
 

From 19e3bbfb11b70a2d145e135b05df065bc765fe6f Mon Sep 17 00:00:00 2001
From: Yilan Ji <baxia.lan@gmail.com>
Date: Fri, 12 Apr 2024 07:56:33 +0000
Subject: [PATCH 0428/1115] [build][reproducible]Fix version file access for
 docker-<container>-dbg.gz build (#18485)

Why I did it
Reproducible build fails when building dbg containers make INSTALL_DEBUG_TOOLS=y target/docker-orchagent-dbg.gz

Work item tracking
How I did it
How to verify it
export SONIC_VERSION_CONTROL_COMPONENTS=all
make configure PLATFORM=broadcom
make INSTALL_DEBUG_TOOLS=y target/docker-orchagent-dbg.gz
---
 scripts/versions_manager.py | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/scripts/versions_manager.py b/scripts/versions_manager.py
index 2a6cb05bb..e34868a24 100755
--- a/scripts/versions_manager.py
+++ b/scripts/versions_manager.py
@@ -419,6 +419,8 @@ def get_module_path_by_name(cls, source_path, module_name):
             return os.path.join(source_path, 'files/build/versions', module_name)
         if module_name.startswith('build-sonic-slave-'):
             return os.path.join(source_path, 'files/build/versions/build', module_name)
+        if module_name.endswith('-dbg'):
+            return os.path.join(source_path, 'files/build/versions/dockers', module_name.removesuffix('-dbg'))
         return os.path.join(source_path, 'files/build/versions/dockers', module_name)
 
     def __repr__(self):

From ed839c65055c3cbb446ddabdc9c15b0684988139 Mon Sep 17 00:00:00 2001
From: Gagan Punathil Ellath <gpunathilell@nvidia.com>
Date: Fri, 12 Apr 2024 13:46:05 -0700
Subject: [PATCH 0429/1115] Added new package minicom in the switch image
 (#18299)

### Why I did it
Added support for `minicom` , a terminal based communication tool in the sonic image for enabling communication to other devices.

### How I did it
Added `minicom` to the list of packages to be installed in `sonic_debian_extension.j2` in the platform specific section for mellanox
---
 files/build_templates/sonic_debian_extension.j2 | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/files/build_templates/sonic_debian_extension.j2 b/files/build_templates/sonic_debian_extension.j2
index 32e68e950..87dd07324 100644
--- a/files/build_templates/sonic_debian_extension.j2
+++ b/files/build_templates/sonic_debian_extension.j2
@@ -1025,6 +1025,9 @@ sudo rm -rf $FILESYSTEM_ROOT/$MLNX_SONIC_PLATFORM_PY3_WHEEL_NAME
 # Install service that manages Nvidia specific shared storage
 sudo cp platform/mellanox/nv-syncd-shared/nv-syncd-shared.service $FILESYSTEM_ROOT_USR_LIB_SYSTEMD_SYSTEM/
 sudo LANG=C chroot $FILESYSTEM_ROOT systemctl enable nv-syncd-shared
+
+# Install minicom package
+sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install minicom
 {% endif %}
 
 {%- if SONIC_ROUTING_STACK == "frr" %}

From 39d1df7598c8189a3453b9eb05f210dbe6809e9f Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sat, 13 Apr 2024 16:01:36 +0800
Subject: [PATCH 0430/1115] [submodule] Update submodule sonic-utilities to the
 latest HEAD automatically (#18666)

#### Why I did it
src/sonic-utilities
```
* 9f962299 - (HEAD -> master, origin/master, origin/HEAD) Update intfutil and sfpshow to support DPC role (#3242) (29 hours ago) [Vivek]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-utilities | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-utilities b/src/sonic-utilities
index e914198db..9f962299f 160000
--- a/src/sonic-utilities
+++ b/src/sonic-utilities
@@ -1 +1 @@
-Subproject commit e914198db543aa5ca7f4801bae46dfaef870225d
+Subproject commit 9f962299ff9cc3319c77db24cae065e650c774e2

From 8deaf183d8d4aa60960a6c8de65e8eff7d1baee3 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sat, 13 Apr 2024 16:01:41 +0800
Subject: [PATCH 0431/1115] [submodule] Update submodule sonic-platform-pde to
 the latest HEAD automatically (#18665)
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

#### Why I did it
src/sonic-platform-pde
```
* 8b44c3c - (HEAD -> master, origin/master, origin/HEAD) Merge pull request #36 from sg893052/PL_PDE_BOOKWORM_MIGRATION (27 hours ago) [賓少鈺]
* 9f7ac0f - PDE Migration to bookworm (2 weeks ago) [sg893052]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-platform-pde | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-platform-pde b/src/sonic-platform-pde
index f2cc7484c..8b44c3c53 160000
--- a/src/sonic-platform-pde
+++ b/src/sonic-platform-pde
@@ -1 +1 @@
-Subproject commit f2cc7484cced6c3379127ff9ce1658830077c5b5
+Subproject commit 8b44c3c537b476fc14ef2f057904e4d74d27a188

From 835d517171a2531c355019b4234bf25d8836e705 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sat, 13 Apr 2024 16:01:46 +0800
Subject: [PATCH 0432/1115] [submodule] Update submodule sonic-platform-common
 to the latest HEAD automatically (#18664)

#### Why I did it
src/sonic-platform-common
```
* de130c4 - (HEAD -> master, origin/master, origin/HEAD) [sfp] Ignore processing ports that are not front-panel (#447) (29 hours ago) [Vivek]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-platform-common | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-platform-common b/src/sonic-platform-common
index 2606cd5fb..de130c4ab 160000
--- a/src/sonic-platform-common
+++ b/src/sonic-platform-common
@@ -1 +1 @@
-Subproject commit 2606cd5fb0a58fc956577602235a9f8f84a887c6
+Subproject commit de130c4ab347f31d190a2531d678a68b232ed66a

From e7efb7388640a96049c91b7c1f3f2c7f15163991 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sat, 13 Apr 2024 16:01:52 +0800
Subject: [PATCH 0433/1115] [submodule] Update submodule sonic-platform-daemons
 to the latest HEAD automatically (#18614)

#### Why I did it
src/sonic-platform-daemons
```
* b5f838d - (HEAD -> master, origin/master, origin/HEAD) Fix intermittent build failure for test_SfpStateUpdateTask_task_run_stop (#461) (3 days ago) [mihirpat1]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-platform-daemons | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-platform-daemons b/src/sonic-platform-daemons
index d0fd1e1c6..b5f838dc5 160000
--- a/src/sonic-platform-daemons
+++ b/src/sonic-platform-daemons
@@ -1 +1 @@
-Subproject commit d0fd1e1c6113d4a0e2e7bff1559d89e6105269c9
+Subproject commit b5f838dc5009cbe4f9b87b18441f47dd9283268b

From c75c82c6d2c038fbd3639f279e6501fe0be09c3d Mon Sep 17 00:00:00 2001
From: dbarashinvd <105214075+dbarashinvd@users.noreply.github.com>
Date: Sun, 14 Apr 2024 09:11:54 +0300
Subject: [PATCH 0434/1115] [Mellanox] CMIS management feature enablement 
 (#16968)

- Why I did it
CMIS management feature enablement

- How I did it
Add new variable with value 1 for CMIS management feature enablement under specific HWSKU folder. Not the default one

- How to verify it
Install image on switch with same HWSKU and check "show interfaces status" (Type column)
---
 .../x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/sai.profile     | 1 +
 .../x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/sai.profile     | 1 +
 2 files changed, 2 insertions(+)

diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/sai.profile b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/sai.profile
index 8238fae60..84bc4f66a 100644
--- a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/sai.profile
+++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/sai.profile
@@ -1,2 +1,3 @@
 SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_4700_8x400g_48x100g.xml
 SAI_DEFAULT_SWITCHING_MODE_STORE_FORWARD=1
+SAI_INDEPENDENT_MODULE_MODE=1
diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/sai.profile b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/sai.profile
index 0570470af..c38508782 100644
--- a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/sai.profile
+++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/sai.profile
@@ -1,2 +1,3 @@
 SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_4700_8x400g_48x200g.xml
 SAI_DEFAULT_SWITCHING_MODE_STORE_FORWARD=1
+SAI_INDEPENDENT_MODULE_MODE=1

From 743ef11bd53c5b7f7b4d887509c0e261b9a49006 Mon Sep 17 00:00:00 2001
From: Vivek <vkarri@nvidia.com>
Date: Sun, 14 Apr 2024 03:47:57 -0700
Subject: [PATCH 0435/1115] [Mellanox] Fix python-sdk-api makefile to only
 compile python3 bindings (#18668)

- Why I did it
python-sdk-api is failing in bookworm because it's triggering python2 bindings.

- How I did it
Fix the invocation by updating the env variable

- How to verify it
Compile python-sdk-api from source on bookworm environment and verify on sonic-mgmt tests
---
 platform/mellanox/sdk-src/python-sdk-api/Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/platform/mellanox/sdk-src/python-sdk-api/Makefile b/platform/mellanox/sdk-src/python-sdk-api/Makefile
index 2d27e367e..3b23c02b9 100644
--- a/platform/mellanox/sdk-src/python-sdk-api/Makefile
+++ b/platform/mellanox/sdk-src/python-sdk-api/Makefile
@@ -18,7 +18,7 @@ $(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% :
 		./autogen.sh
 	fi
 
-	debuild -e PYTHON_INTERPRETERS="\"python3\"" -b -us -uc -j$(SONIC_CONFIG_MAKE_JOBS)
+	debuild -e PYTHON_INTERPRETERS=python3 -b -us -uc -j$(SONIC_CONFIG_MAKE_JOBS)
 
 	popd
 

From 5b791fa85d49caaee2bd0a2cf4d0bd87d3fad175 Mon Sep 17 00:00:00 2001
From: Stephen Sun <5379172+stephenxs@users.noreply.github.com>
Date: Sun, 14 Apr 2024 21:23:58 +0800
Subject: [PATCH 0436/1115] [Mellanox] Add sensor files for MSN4700 simulation
 platform (#18531)

- Why I did it
Add sensor files for MSN4700 simulation platform

- How I did it
Add the missing files to simulate platform part.

- How to verify it
Run sonic-mgmt sensor test to verify all is working

Signed-off-by: Stephen Sun <stephens@nvidia.com>
---
 .../mellanox/x86_64-mlnx_msn4700_simx-r0/get_sensors_conf_path   | 1 +
 device/mellanox/x86_64-mlnx_msn4700_simx-r0/sensors.conf         | 1 +
 device/mellanox/x86_64-mlnx_msn4700_simx-r0/sensors.conf.a1      | 1 +
 3 files changed, 3 insertions(+)
 create mode 120000 device/mellanox/x86_64-mlnx_msn4700_simx-r0/get_sensors_conf_path
 create mode 120000 device/mellanox/x86_64-mlnx_msn4700_simx-r0/sensors.conf
 create mode 120000 device/mellanox/x86_64-mlnx_msn4700_simx-r0/sensors.conf.a1

diff --git a/device/mellanox/x86_64-mlnx_msn4700_simx-r0/get_sensors_conf_path b/device/mellanox/x86_64-mlnx_msn4700_simx-r0/get_sensors_conf_path
new file mode 120000
index 000000000..f1509a1e1
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn4700_simx-r0/get_sensors_conf_path
@@ -0,0 +1 @@
+../x86_64-mlnx_msn4700-r0/get_sensors_conf_path
\ No newline at end of file
diff --git a/device/mellanox/x86_64-mlnx_msn4700_simx-r0/sensors.conf b/device/mellanox/x86_64-mlnx_msn4700_simx-r0/sensors.conf
new file mode 120000
index 000000000..e484524c1
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn4700_simx-r0/sensors.conf
@@ -0,0 +1 @@
+../x86_64-mlnx_msn4700-r0/sensors.conf
\ No newline at end of file
diff --git a/device/mellanox/x86_64-mlnx_msn4700_simx-r0/sensors.conf.a1 b/device/mellanox/x86_64-mlnx_msn4700_simx-r0/sensors.conf.a1
new file mode 120000
index 000000000..4605d556f
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn4700_simx-r0/sensors.conf.a1
@@ -0,0 +1 @@
+../x86_64-mlnx_msn4700-r0/sensors.conf.a1
\ No newline at end of file

From 8c69aa50d2f695dfbd51f007fc37a404905f40e8 Mon Sep 17 00:00:00 2001
From: Kebo Liu <kebol@nvidia.com>
Date: Sun, 14 Apr 2024 21:35:26 +0800
Subject: [PATCH 0437/1115] Support to fetch pmon_daemon_control.json file from
 both platform and HWSKU folders (#18441)

- Why I did it
The pmon_daemon_control.json file currently has a platform-specific scope, resulting in all SKUs of the same platform sharing the same pmon daemon configuration. Consequently, this restricts the ability to have distinct pmon daemon configurations for different SKUs. The proposed change aims to enhance flexibility by allowing PMON to load this file from both the platform folder and the HWSKU folder. In case a pmon_daemon_control.json file exists in the HWSKU folder, it will take precedence over the one in the platform folder.

- How I did it
The pmon docker init script will be updated to prioritize the HWSKU folder when searching for the pmon_daemon_control.json file. If the file is present in the HWSKU folder, it will be utilized. However, if the file does not exist in the HWSKU folder, the script will then fallback to utilizing the one located in the platform folder.

- How to verify it
Build image with this change, put the file in
1. platform folder,
2. in HWSKU folder
3. in both folders
make sure the pmon daemons started according to the configuration.

Signed-off-by: Kebo Liu <kebol@nvidia.com>
---
 dockers/docker-platform-monitor/docker_init.j2 | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/dockers/docker-platform-monitor/docker_init.j2 b/dockers/docker-platform-monitor/docker_init.j2
index d8667296e..46766b5fd 100755
--- a/dockers/docker-platform-monitor/docker_init.j2
+++ b/dockers/docker-platform-monitor/docker_init.j2
@@ -8,7 +8,6 @@ FANCONTROL_CONF_FILE="/usr/share/sonic/platform/fancontrol"
 
 SUPERVISOR_CONF_TEMPLATE="/usr/share/sonic/templates/docker-pmon.supervisord.conf.j2"
 SUPERVISOR_CONF_FILE="/etc/supervisor/conf.d/supervisord.conf"
-PMON_DAEMON_CONTROL_FILE="/usr/share/sonic/platform/pmon_daemon_control.json"
 MODULAR_CHASSISDB_CONF_FILE="/usr/share/sonic/platform/chassisdb.conf"
 
 HAVE_SENSORS_CONF=0
@@ -17,6 +16,13 @@ IS_MODULAR_CHASSIS=0
 # Default use python2 version
 SONIC_PLATFORM_API_PYTHON_VERSION=2
 
+if [ -e /usr/share/sonic/hwsku/pmon_daemon_control.json ];
+then
+    PMON_DAEMON_CONTROL_FILE="/usr/share/sonic/hwsku/pmon_daemon_control.json"
+else
+    PMON_DAEMON_CONTROL_FILE="/usr/share/sonic/platform/pmon_daemon_control.json"
+fi
+
 declare -r EXIT_SUCCESS="0"
 
 if [ "${RUNTIME_OWNER}" == "" ]; then

From c076c1243155b0966c2b1ff5683927f0eac7e7c0 Mon Sep 17 00:00:00 2001
From: Stephen Sun <5379172+stephenxs@users.noreply.github.com>
Date: Sun, 14 Apr 2024 21:39:31 +0800
Subject: [PATCH 0438/1115] [Mellanox] Support SKU Mellanox-SN5600-O128
 (#18440)

- Why I did it
Align ACS-SN5600 buffer templates to reduce redundant code
Support Mellanox-SN5600-O128

- How I did it
Add relevant files to support the new SKU
Update the SN5600 device files to align with the buffer configuration required.

- How to verify it
Regression test

Signed-off-by: Stephen Sun <stephens@nvidia.com>
---
 .../ACS-SN5600/buffers_defaults_t0.j2         | 111 +---
 .../ACS-SN5600/buffers_defaults_t1.j2         | 111 +---
 .../Mellanox-SN5600-O128/buffers.json.j2      |   1 +
 .../buffers_defaults_objects.j2               |   1 +
 .../buffers_defaults_t0.j2                    |   1 +
 .../buffers_defaults_t1.j2                    |   1 +
 .../buffers_dynamic.json.j2                   |  16 +
 .../create_only_config_db_buffers.json        |   7 +
 .../Mellanox-SN5600-O128/hwsku.json           | 391 ++++++++++++++
 .../pg_profile_lookup.ini                     |   1 +
 .../Mellanox-SN5600-O128/port_config.ini      | 147 ++++++
 .../Mellanox-SN5600-O128/qos.json.j2          |   1 +
 .../Mellanox-SN5600-O128/sai.profile          |   1 +
 .../sai_sn5600_128x400g_1x25g.xml             | 495 ++++++++++++++++++
 14 files changed, 1085 insertions(+), 200 deletions(-)
 create mode 120000 device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-O128/buffers.json.j2
 create mode 120000 device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-O128/buffers_defaults_objects.j2
 create mode 120000 device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-O128/buffers_defaults_t0.j2
 create mode 120000 device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-O128/buffers_defaults_t1.j2
 create mode 100644 device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-O128/buffers_dynamic.json.j2
 create mode 100644 device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-O128/create_only_config_db_buffers.json
 create mode 100644 device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-O128/hwsku.json
 create mode 120000 device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-O128/pg_profile_lookup.ini
 create mode 100644 device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-O128/port_config.ini
 create mode 120000 device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-O128/qos.json.j2
 create mode 100644 device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-O128/sai.profile
 create mode 100644 device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-O128/sai_sn5600_128x400g_1x25g.xml

diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/ACS-SN5600/buffers_defaults_t0.j2 b/device/mellanox/x86_64-nvidia_sn5600-r0/ACS-SN5600/buffers_defaults_t0.j2
index b03bcf004..0b414500d 100644
--- a/device/mellanox/x86_64-nvidia_sn5600-r0/ACS-SN5600/buffers_defaults_t0.j2
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/ACS-SN5600/buffers_defaults_t0.j2
@@ -1,5 +1,5 @@
 {#
-    Copyright (c) 2021-2022 NVIDIA CORPORATION & AFFILIATES.
+    Copyright (c) 2021-2024 NVIDIA CORPORATION & AFFILIATES.
     Apache-2.0
 
     Licensed under the Apache License, Version 2.0 (the "License");
@@ -20,109 +20,20 @@
 {% set egress_lossless_pool_size =  '158229504' %}
 {% set egress_lossy_pool_size =  '67737959' %}
 
-{%- macro generate_port_lists(PORT_ALL) %}
-    {# Generate list of ports #}
-    {%- for port_idx in range(0, 32) %}
-        {%- if PORT_ALL.append("Ethernet%d" % (port_idx)) %}{%- endif %}
-    {%- endfor %}
-{%- endmacro %}
+{% import 'buffers_defaults_objects.j2' as defs with context %}
 
-{%- macro generate_buffer_pool_and_profiles() %}
-    "BUFFER_POOL": {
-        "ingress_lossless_pool": {
-            {%- if dynamic_mode is not defined %}
-            "size": "{{ ingress_lossless_pool_size }}",
-            {%- endif %}
-            "type": "ingress",
-            "mode": "dynamic"
-        },
-        "ingress_lossy_pool": {
-            {%- if dynamic_mode is not defined %}
-            "size": "{{ ingress_lossy_pool_size }}",
-            {%- endif %}
-            "type": "ingress",
-            "mode": "dynamic"
-        },
-        "egress_lossless_pool": {
-            "size": "{{ egress_lossless_pool_size }}",
-            "type": "egress",
-            "mode": "dynamic"
-        },
-        "egress_lossy_pool": {
-            {%- if dynamic_mode is not defined %}
-            "size": "{{ egress_lossy_pool_size }}",
-            {%- endif %}
-            "type": "egress",
-            "mode": "dynamic"
-        }
-    },
-    "BUFFER_PROFILE": {
-        "ingress_lossless_profile": {
-            "pool":"ingress_lossless_pool",
-            "size":"0",
-            "dynamic_th":"7"
-        },
-        "ingress_lossy_profile": {
-            "pool":"ingress_lossy_pool",
-            "size":"0",
-            "dynamic_th":"3"
-        },
-        "egress_lossless_profile": {
-            "pool":"egress_lossless_pool",
-            "size":"0",
-            "dynamic_th":"7"
-        },
-        "egress_lossy_profile": {
-            "pool":"egress_lossy_pool",
-            "size":"9216",
-            "dynamic_th":"7"
-        },
-        "q_lossy_profile": {
-            "pool":"egress_lossy_pool",
-            "size":"0",
-            "dynamic_th":"3"
-        }
-    },
+{%- macro generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) %}
+{{ defs.generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) }}
 {%- endmacro %}
 
-{%- macro generate_profile_lists(port_names) %}
-    "BUFFER_PORT_INGRESS_PROFILE_LIST": {
-{% for port in port_names.split(',') %}
-        "{{ port }}": {
-            "profile_list" : "ingress_lossless_profile,ingress_lossy_profile"
-        }{% if not loop.last %},{% endif %}
-
-{% endfor %}
-    },
-    "BUFFER_PORT_EGRESS_PROFILE_LIST": {
-{% for port in port_names.split(',') %}
-        "{{ port }}": {
-            "profile_list" : "egress_lossless_profile,egress_lossy_profile"
-        }{% if not loop.last %},{% endif %}
-
-{% endfor %}
-    }
+{%- macro generate_profile_lists_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_profile_lists(port_names_active, port_names_inactive) }}
 {%- endmacro %}
 
-{%- macro generate_queue_buffers(port_names) %}
-    "BUFFER_QUEUE": {
-{% for port in port_names.split(',') %}
-        "{{ port }}|3-4": {
-            "profile" : "egress_lossless_profile"
-        },
-{% endfor %}
-{% for port in port_names.split(',') %}
-        "{{ port }}|0-2": {
-            "profile" : "q_lossy_profile"
-        },
-{% endfor %}
-{% for port in port_names.split(',') %}
-        "{{ port }}|5-6": {
-            "profile" : "q_lossy_profile"
-        }{% if not loop.last %},{% endif %}
-
-{% endfor %}
-    }
+{%- macro generate_queue_buffers_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_queue_buffers(port_names_active, port_names_inactive) }}
 {%- endmacro %}
 
-
+{%- macro generate_pg_profiles_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_pg_profiles(port_names_active, port_names_inactive) }}
+{%- endmacro %}
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/ACS-SN5600/buffers_defaults_t1.j2 b/device/mellanox/x86_64-nvidia_sn5600-r0/ACS-SN5600/buffers_defaults_t1.j2
index 374c23fd8..16214dab4 100644
--- a/device/mellanox/x86_64-nvidia_sn5600-r0/ACS-SN5600/buffers_defaults_t1.j2
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/ACS-SN5600/buffers_defaults_t1.j2
@@ -1,5 +1,5 @@
 {#
-    Copyright (c) 2021-2022 NVIDIA CORPORATION & AFFILIATES.
+    Copyright (c) 2021-2024 NVIDIA CORPORATION & AFFILIATES.
     Apache-2.0
 
     Licensed under the Apache License, Version 2.0 (the "License");
@@ -20,109 +20,20 @@
 {% set egress_lossless_pool_size =  '158229504' %}
 {% set egress_lossy_pool_size =  '52161690' %}
 
-{%- macro generate_port_lists(PORT_ALL) %}
-    {# Generate list of ports #}
-    {%- for port_idx in range(0, 32) %}
-        {%- if PORT_ALL.append("Ethernet%d" % (port_idx)) %}{%- endif %}
-    {%- endfor %}
-{%- endmacro %}
+{% import 'buffers_defaults_objects.j2' as defs with context %}
 
-{%- macro generate_buffer_pool_and_profiles() %}
-    "BUFFER_POOL": {
-        "ingress_lossless_pool": {
-            {%- if dynamic_mode is not defined %}
-            "size": "{{ ingress_lossless_pool_size }}",
-            {%- endif %}
-            "type": "ingress",
-            "mode": "dynamic"
-        },
-        "ingress_lossy_pool": {
-            {%- if dynamic_mode is not defined %}
-            "size": "{{ ingress_lossy_pool_size }}",
-            {%- endif %}
-            "type": "ingress",
-            "mode": "dynamic"
-        },
-        "egress_lossless_pool": {
-            "size": "{{ egress_lossless_pool_size }}",
-            "type": "egress",
-            "mode": "dynamic"
-        },
-        "egress_lossy_pool": {
-            {%- if dynamic_mode is not defined %}
-            "size": "{{ egress_lossy_pool_size }}",
-            {%- endif %}
-            "type": "egress",
-            "mode": "dynamic"
-        }
-    },
-    "BUFFER_PROFILE": {
-        "ingress_lossless_profile": {
-            "pool":"ingress_lossless_pool",
-            "size":"0",
-            "dynamic_th":"7"
-        },
-        "ingress_lossy_profile": {
-            "pool":"ingress_lossy_pool",
-            "size":"0",
-            "dynamic_th":"3"
-        },
-        "egress_lossless_profile": {
-            "pool":"egress_lossless_pool",
-            "size":"0",
-            "dynamic_th":"7"
-        },
-        "egress_lossy_profile": {
-            "pool":"egress_lossy_pool",
-            "size":"9216",
-            "dynamic_th":"7"
-        },
-        "q_lossy_profile": {
-            "pool":"egress_lossy_pool",
-            "size":"0",
-            "dynamic_th":"3"
-        }
-    },
+{%- macro generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) %}
+{{ defs.generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) }}
 {%- endmacro %}
 
-{%- macro generate_profile_lists(port_names) %}
-    "BUFFER_PORT_INGRESS_PROFILE_LIST": {
-{% for port in port_names.split(',') %}
-        "{{ port }}": {
-            "profile_list" : "ingress_lossless_profile,ingress_lossy_profile"
-        }{% if not loop.last %},{% endif %}
-
-{% endfor %}
-    },
-    "BUFFER_PORT_EGRESS_PROFILE_LIST": {
-{% for port in port_names.split(',') %}
-        "{{ port }}": {
-            "profile_list" : "egress_lossless_profile,egress_lossy_profile"
-        }{% if not loop.last %},{% endif %}
-
-{% endfor %}
-    }
+{%- macro generate_profile_lists_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_profile_lists(port_names_active, port_names_inactive) }}
 {%- endmacro %}
 
-{%- macro generate_queue_buffers(port_names) %}
-    "BUFFER_QUEUE": {
-{% for port in port_names.split(',') %}
-        "{{ port }}|3-4": {
-            "profile" : "egress_lossless_profile"
-        },
-{% endfor %}
-{% for port in port_names.split(',') %}
-        "{{ port }}|0-2": {
-            "profile" : "q_lossy_profile"
-        },
-{% endfor %}
-{% for port in port_names.split(',') %}
-        "{{ port }}|5-6": {
-            "profile" : "q_lossy_profile"
-        }{% if not loop.last %},{% endif %}
-
-{% endfor %}
-    }
+{%- macro generate_queue_buffers_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_queue_buffers(port_names_active, port_names_inactive) }}
 {%- endmacro %}
 
-
+{%- macro generate_pg_profiles_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_pg_profiles(port_names_active, port_names_inactive) }}
+{%- endmacro %}
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-O128/buffers.json.j2 b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-O128/buffers.json.j2
new file mode 120000
index 000000000..add8bf8bb
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-O128/buffers.json.j2
@@ -0,0 +1 @@
+../../x86_64-mlnx_msn2700-r0/ACS-MSN2700/buffers.json.j2
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-O128/buffers_defaults_objects.j2 b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-O128/buffers_defaults_objects.j2
new file mode 120000
index 000000000..33b6704f9
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-O128/buffers_defaults_objects.j2
@@ -0,0 +1 @@
+../../x86_64-mlnx_msn2700-r0/ACS-MSN2700/buffers_defaults_objects.j2
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-O128/buffers_defaults_t0.j2 b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-O128/buffers_defaults_t0.j2
new file mode 120000
index 000000000..6e43fd4f6
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-O128/buffers_defaults_t0.j2
@@ -0,0 +1 @@
+../ACS-SN5600/buffers_defaults_t0.j2
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-O128/buffers_defaults_t1.j2 b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-O128/buffers_defaults_t1.j2
new file mode 120000
index 000000000..601a26214
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-O128/buffers_defaults_t1.j2
@@ -0,0 +1 @@
+../ACS-SN5600/buffers_defaults_t1.j2
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-O128/buffers_dynamic.json.j2 b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-O128/buffers_dynamic.json.j2
new file mode 100644
index 000000000..b2cc958b7
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-O128/buffers_dynamic.json.j2
@@ -0,0 +1,16 @@
+{#
+    Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+    Apache-2.0
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+    http://www.apache.org/licenses/LICENSE-2.0
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+#}
+{%- set default_topo = 't0' %}
+{%- set dynamic_mode = 'true' %}
+{%- include 'buffers_config.j2' %}
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-O128/create_only_config_db_buffers.json b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-O128/create_only_config_db_buffers.json
new file mode 100644
index 000000000..6feb15671
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-O128/create_only_config_db_buffers.json
@@ -0,0 +1,7 @@
+{
+    "DEVICE_METADATA": {
+        "localhost": {
+            "create_only_config_db_buffers": "true"
+        }
+    }
+}
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-O128/hwsku.json b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-O128/hwsku.json
new file mode 100644
index 000000000..52088a403
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-O128/hwsku.json
@@ -0,0 +1,391 @@
+{
+    "interfaces": {
+        "Ethernet0": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet4": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet8": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet12": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet16": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet20": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet24": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet28": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet32": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet36": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet40": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet44": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet48": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet52": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet56": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet60": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet64": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet68": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet72": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet76": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet80": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet84": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet88": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet92": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet96": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet100": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet104": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet108": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet112": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet116": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet120": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet124": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet128": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet132": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet136": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet140": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet144": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet148": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet152": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet156": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet160": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet164": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet168": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet172": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet176": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet180": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet184": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet188": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet192": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet196": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet200": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet204": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet208": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet212": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet216": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet220": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet224": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet228": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet232": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet236": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet240": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet244": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet248": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet252": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet256": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet260": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet264": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet268": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet272": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet276": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet280": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet284": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet288": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet292": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet296": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet300": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet304": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet308": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet312": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet316": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet320": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet324": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet328": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet332": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet336": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet340": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet344": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet348": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet352": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet356": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet360": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet364": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet368": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet372": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet376": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet380": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet384": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet388": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet392": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet396": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet400": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet404": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet408": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet412": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet416": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet420": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet424": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet428": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet432": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet436": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet440": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet444": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet448": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet452": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet456": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet460": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet464": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet468": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet472": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet476": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet480": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet484": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet488": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet492": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet496": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet500": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet504": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet508": {
+            "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet512": {
+            "default_brkout_mode": "1x25G(1)[10G]"
+        }
+    }
+}
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-O128/pg_profile_lookup.ini b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-O128/pg_profile_lookup.ini
new file mode 120000
index 000000000..36462db80
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-O128/pg_profile_lookup.ini
@@ -0,0 +1 @@
+../ACS-SN5600/pg_profile_lookup.ini
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-O128/port_config.ini b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-O128/port_config.ini
new file mode 100644
index 000000000..bf437af13
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-O128/port_config.ini
@@ -0,0 +1,147 @@
+##
+## Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+## Apache-2.0
+##
+## Licensed under the Apache License, Version 2.0 (the "License");
+## you may not use this file except in compliance with the License.
+## You may obtain a copy of the License at
+##
+## http://www.apache.org/licenses/LICENSE-2.0
+##
+## Unless required by applicable law or agreed to in writing, software
+## distributed under the License is distributed on an "AS IS" BASIS,
+## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+## See the License for the specific language governing permissions and
+## limitations under the License.
+##
+
+# name         lanes                                  alias     index    speed    fec
+Ethernet0      0,1,2,3                                etp1a     1        400000   rs
+Ethernet4      4,5,6,7                                etp1b     1        400000   rs
+Ethernet8      8,9,10,11                              etp2a     2        400000   rs
+Ethernet12     12,13,14,15                            etp2b     2        400000   rs
+Ethernet16     16,17,18,19                            etp3a     3        400000   rs
+Ethernet20     20,21,22,23                            etp3b     3        400000   rs
+Ethernet24     24,25,26,27                            etp4a     4        400000   rs
+Ethernet28     28,29,30,31                            etp4b     4        400000   rs
+Ethernet32     32,33,34,35                            etp5a     5        400000   rs
+Ethernet36     36,37,38,39                            etp5b     5        400000   rs
+Ethernet40     40,41,42,43                            etp6a     6        400000   rs
+Ethernet44     44,45,46,47                            etp6b     6        400000   rs
+Ethernet48     48,49,50,51                            etp7a     7        400000   rs
+Ethernet52     52,53,54,55                            etp7b     7        400000   rs
+Ethernet56     56,57,58,59                            etp8a     8        400000   rs
+Ethernet60     60,61,62,63                            etp8b     8        400000   rs
+Ethernet64     64,65,66,67                            etp9a     9        400000   rs
+Ethernet68     68,69,70,71                            etp9b     9        400000   rs
+Ethernet72     72,73,74,75                            etp10a    10       400000   rs
+Ethernet76     76,77,78,79                            etp10b    10       400000   rs
+Ethernet80     80,81,82,83                            etp11a    11       400000   rs
+Ethernet84     84,85,86,87                            etp11b    11       400000   rs
+Ethernet88     88,89,90,91                            etp12a    12       400000   rs
+Ethernet92     92,93,94,95                            etp12b    12       400000   rs
+Ethernet96     96,97,98,99                            etp13a    13       400000   rs
+Ethernet100    100,101,102,103                        etp13b    13       400000   rs
+Ethernet104    104,105,106,107                        etp14a    14       400000   rs
+Ethernet108    108,109,110,111                        etp14b    14       400000   rs
+Ethernet112    112,113,114,115                        etp15a    15       400000   rs
+Ethernet116    116,117,118,119                        etp15b    15       400000   rs
+Ethernet120    120,121,122,123                        etp16a    16       400000   rs
+Ethernet124    124,125,126,127                        etp16b    16       400000   rs
+Ethernet128    128,129,130,131                        etp17a    17       400000   rs
+Ethernet132    132,133,134,135                        etp17b    17       400000   rs
+Ethernet136    136,137,138,139                        etp18a    18       400000   rs
+Ethernet140    140,141,142,143                        etp18b    18       400000   rs
+Ethernet144    144,145,146,147                        etp19a    19       400000   rs
+Ethernet148    148,149,150,151                        etp19b    19       400000   rs
+Ethernet152    152,153,154,155                        etp20a    20       400000   rs
+Ethernet156    156,157,158,159                        etp20b    20       400000   rs
+Ethernet160    160,161,162,163                        etp21a    21       400000   rs
+Ethernet164    164,165,166,167                        etp21b    21       400000   rs
+Ethernet168    168,169,170,171                        etp22a    22       400000   rs
+Ethernet172    172,173,174,175                        etp22b    22       400000   rs
+Ethernet176    176,177,178,179                        etp23a    23       400000   rs
+Ethernet180    180,181,182,183                        etp23b    23       400000   rs
+Ethernet184    184,185,186,187                        etp24a    24       400000   rs
+Ethernet188    188,189,190,191                        etp24b    24       400000   rs
+Ethernet192    192,193,194,195                        etp25a    25       400000   rs
+Ethernet196    196,197,198,199                        etp25b    25       400000   rs
+Ethernet200    200,201,202,203                        etp26a    26       400000   rs
+Ethernet204    204,205,206,207                        etp26b    26       400000   rs
+Ethernet208    208,209,210,211                        etp27a    27       400000   rs
+Ethernet212    212,213,214,215                        etp27b    27       400000   rs
+Ethernet216    216,217,218,219                        etp28a    28       400000   rs
+Ethernet220    220,221,222,223                        etp28b    28       400000   rs
+Ethernet224    224,225,226,227                        etp29a    29       400000   rs
+Ethernet228    228,229,230,231                        etp29b    29       400000   rs
+Ethernet232    232,233,234,235                        etp30a    30       400000   rs
+Ethernet236    236,237,238,239                        etp30b    30       400000   rs
+Ethernet240    240,241,242,243                        etp31a    31       400000   rs
+Ethernet244    244,245,246,247                        etp31b    31       400000   rs
+Ethernet248    248,249,250,251                        etp32a    32       400000   rs
+Ethernet252    252,253,254,255                        etp32b    32       400000   rs
+Ethernet256    256,257,258,259                        etp33a    33       400000   rs
+Ethernet260    260,261,262,263                        etp33b    33       400000   rs
+Ethernet264    264,265,266,267                        etp34a    34       400000   rs
+Ethernet268    268,269,270,271                        etp34b    34       400000   rs
+Ethernet272    272,273,274,275                        etp35a    35       400000   rs
+Ethernet276    276,277,278,279                        etp35b    35       400000   rs
+Ethernet280    280,281,282,283                        etp36a    36       400000   rs
+Ethernet284    284,285,286,287                        etp36b    36       400000   rs
+Ethernet288    288,289,290,291                        etp37a    37       400000   rs
+Ethernet292    292,293,294,295                        etp37b    37       400000   rs
+Ethernet296    296,297,298,299                        etp38a    38       400000   rs
+Ethernet300    300,301,302,303                        etp38b    38       400000   rs
+Ethernet304    304,305,306,307                        etp39a    39       400000   rs
+Ethernet308    308,309,310,311                        etp39b    39       400000   rs
+Ethernet312    312,313,314,315                        etp40a    40       400000   rs
+Ethernet316    316,317,318,319                        etp40b    40       400000   rs
+Ethernet320    320,321,322,323                        etp41a    41       400000   rs
+Ethernet324    324,325,326,327                        etp41b    41       400000   rs
+Ethernet328    328,329,330,331                        etp42a    42       400000   rs
+Ethernet332    332,333,334,335                        etp42b    42       400000   rs
+Ethernet336    336,337,338,339                        etp43a    43       400000   rs
+Ethernet340    340,341,342,343                        etp43b    43       400000   rs
+Ethernet344    344,345,346,347                        etp44a    44       400000   rs
+Ethernet348    348,349,350,351                        etp44b    44       400000   rs
+Ethernet352    352,353,354,355                        etp45a    45       400000   rs
+Ethernet356    356,357,358,359                        etp45b    45       400000   rs
+Ethernet360    360,361,362,363                        etp46a    46       400000   rs
+Ethernet364    364,365,366,367                        etp46b    46       400000   rs
+Ethernet368    368,369,370,371                        etp47a    47       400000   rs
+Ethernet372    372,373,374,375                        etp47b    47       400000   rs
+Ethernet376    376,377,378,379                        etp48a    48       400000   rs
+Ethernet380    380,381,382,383                        etp48b    48       400000   rs
+Ethernet384    384,385,386,387                        etp49a    49       400000   rs
+Ethernet388    388,389,390,391                        etp49b    49       400000   rs
+Ethernet392    392,393,394,395                        etp50a    50       400000   rs
+Ethernet396    396,397,398,399                        etp50b    50       400000   rs
+Ethernet400    400,401,402,403                        etp51a    51       400000   rs
+Ethernet404    404,405,406,407                        etp51b    51       400000   rs
+Ethernet408    408,409,410,411                        etp52a    52       400000   rs
+Ethernet412    412,413,414,415                        etp52b    52       400000   rs
+Ethernet416    416,417,418,419                        etp53a    53       400000   rs
+Ethernet420    420,421,422,423                        etp53b    53       400000   rs
+Ethernet424    424,425,426,427                        etp54a    54       400000   rs
+Ethernet428    428,429,430,431                        etp54b    54       400000   rs
+Ethernet432    432,433,434,435                        etp55a    55       400000   rs
+Ethernet436    436,437,438,439                        etp55b    55       400000   rs
+Ethernet440    440,441,442,443                        etp56a    56       400000   rs
+Ethernet444    444,445,446,447                        etp56b    56       400000   rs
+Ethernet448    448,449,450,451                        etp57a    57       400000   rs
+Ethernet452    452,453,454,455                        etp57b    57       400000   rs
+Ethernet456    456,457,458,459                        etp58a    58       400000   rs
+Ethernet460    460,461,462,463                        etp58b    58       400000   rs
+Ethernet464    464,465,466,467                        etp59a    59       400000   rs
+Ethernet468    468,469,470,471                        etp59b    59       400000   rs
+Ethernet472    472,473,474,475                        etp60a    60       400000   rs
+Ethernet476    476,477,478,479                        etp60b    60       400000   rs
+Ethernet480    480,481,482,483                        etp61a    61       400000   rs
+Ethernet484    484,485,486,487                        etp61b    61       400000   rs
+Ethernet488    488,489,490,491                        etp62a    62       400000   rs
+Ethernet492    492,493,494,495                        etp62b    62       400000   rs
+Ethernet496    496,497,498,499                        etp63a    63       400000   rs
+Ethernet500    500,501,502,503                        etp63b    63       400000   rs
+Ethernet504    504,505,506,507                        etp64a    64       400000   rs
+Ethernet508    508,509,510,511                        etp64b    64       400000   rs
+Ethernet512    512                                    etp65     65       25000
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-O128/qos.json.j2 b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-O128/qos.json.j2
new file mode 120000
index 000000000..eccf286dc
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-O128/qos.json.j2
@@ -0,0 +1 @@
+../../x86_64-mlnx_msn2700-r0/ACS-MSN2700/qos.json.j2
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-O128/sai.profile b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-O128/sai.profile
new file mode 100644
index 000000000..a362513c8
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-O128/sai.profile
@@ -0,0 +1 @@
+SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_sn5600_128x400g_1x25g.xml
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-O128/sai_sn5600_128x400g_1x25g.xml b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-O128/sai_sn5600_128x400g_1x25g.xml
new file mode 100644
index 000000000..97656c1d5
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-O128/sai_sn5600_128x400g_1x25g.xml
@@ -0,0 +1,495 @@
+<!--
+  Copyright (c) 2019-2024 NVIDIA CORPORATION & AFFILIATES.
+  Apache-2.0
+
+  Licensed under the Apache License, Version 2.0 (the "License");
+  you may not use this file except in compliance with the License.
+  You may obtain a copy of the License at
+
+  http://www.apache.org/licenses/LICENSE-2.0
+
+  Unless required by applicable law or agreed to in writing, software
+  distributed under the License is distributed on an "AS IS" BASIS,
+  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+  See the License for the specific language governing permissions and
+  limitations under the License.
+-->
+<root>
+    <platform_info type="5600">
+
+        <!-- Device MAC address  -->
+        <device-mac-address>00:02:03:04:05:00</device-mac-address>
+
+        <!-- ISSU enabled -->
+        <issu-enabled>1</issu-enabled>
+
+        <!-- Number of ports in the following port list -->
+        <number-of-physical-ports>65</number-of-physical-ports>
+
+        <!-- Global port late create -->
+        <late-create-all-ports>1</late-create-all-ports>
+
+        <!-- List of ports in the device -->
+        <ports-list>
+            <port-info>
+                <local-port>1</local-port>
+                <width>8</width>
+                <module>34</module>
+
+                <!-- 0 none, 1=2, 2=4, 3=2,4 -->
+                <breakout-modes>1</breakout-modes>
+
+                <!-- (BITMASK) 2 - 1Gb , 16 - 10Gb , 32 - 40Gb , 384 - 50Gb , 4096 - 100Gb , 4096 - 200Gb, 32768 - 400G, 262144 - 800G -->
+                <port-speed>32768</port-speed>
+            <split>2</split></port-info>
+            <port-info>
+                <local-port>5</local-port>
+                <width>8</width>
+                <module>35</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>32768</port-speed>
+            <split>2</split></port-info>
+            <port-info>
+                <local-port>9</local-port>
+                <width>8</width>
+                <module>33</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>32768</port-speed>
+            <split>2</split></port-info>
+            <port-info>
+                <local-port>13</local-port>
+                <width>8</width>
+                <module>32</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>32768</port-speed>
+            <split>2</split></port-info>
+            <port-info>
+                <local-port>17</local-port>
+                <width>8</width>
+                <module>38</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>32768</port-speed>
+            <split>2</split></port-info>
+            <port-info>
+                <local-port>21</local-port>
+                <width>8</width>
+                <module>39</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>32768</port-speed>
+            <split>2</split></port-info>
+            <port-info>
+                <local-port>25</local-port>
+                <width>8</width>
+                <module>37</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>32768</port-speed>
+            <split>2</split></port-info>
+            <port-info>
+                <local-port>29</local-port>
+                <width>8</width>
+                <module>36</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>32768</port-speed>
+            <split>2</split></port-info>
+            <port-info>
+                <local-port>33</local-port>
+                <width>8</width>
+                <module>42</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>32768</port-speed>
+            <split>2</split></port-info>
+            <port-info>
+                <local-port>37</local-port>
+                <width>8</width>
+                <module>43</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>32768</port-speed>
+            <split>2</split></port-info>
+            <port-info>
+                <local-port>41</local-port>
+                <width>8</width>
+                <module>41</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>32768</port-speed>
+            <split>2</split></port-info>
+            <port-info>
+                <local-port>45</local-port>
+                <width>8</width>
+                <module>40</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>32768</port-speed>
+            <split>2</split></port-info>
+            <port-info>
+                <local-port>49</local-port>
+                <width>8</width>
+                <module>46</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>32768</port-speed>
+            <split>2</split></port-info>
+            <port-info>
+                <local-port>53</local-port>
+                <width>8</width>
+                <module>47</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>32768</port-speed>
+            <split>2</split></port-info>
+            <port-info>
+                <local-port>57</local-port>
+                <width>8</width>
+                <module>45</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>32768</port-speed>
+            <split>2</split></port-info>
+            <port-info>
+                <local-port>61</local-port>
+                <width>8</width>
+                <module>44</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>32768</port-speed>
+            <split>2</split></port-info>
+            <port-info>
+                <local-port>65</local-port>
+                <width>8</width>
+                <module>51</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>32768</port-speed>
+            <split>2</split></port-info>
+            <port-info>
+                <local-port>69</local-port>
+                <width>8</width>
+                <module>50</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>32768</port-speed>
+            <split>2</split></port-info>
+            <port-info>
+                <local-port>73</local-port>
+                <width>8</width>
+                <module>48</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>32768</port-speed>
+            <split>2</split></port-info>
+            <port-info>
+                <local-port>77</local-port>
+                <width>8</width>
+                <module>49</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>32768</port-speed>
+            <split>2</split></port-info>
+            <port-info>
+                <local-port>81</local-port>
+                <width>8</width>
+                <module>55</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>32768</port-speed>
+            <split>2</split></port-info>
+            <port-info>
+                <local-port>85</local-port>
+                <width>8</width>
+                <module>54</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>32768</port-speed>
+            <split>2</split></port-info>
+            <port-info>
+                <local-port>89</local-port>
+                <width>8</width>
+                <module>52</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>32768</port-speed>
+            <split>2</split></port-info>
+            <port-info>
+                <local-port>93</local-port>
+                <width>8</width>
+                <module>53</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>32768</port-speed>
+            <split>2</split></port-info>
+            <port-info>
+                <local-port>97</local-port>
+                <width>8</width>
+                <module>59</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>32768</port-speed>
+            <split>2</split></port-info>
+            <port-info>
+                <local-port>101</local-port>
+                <width>8</width>
+                <module>58</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>32768</port-speed>
+            <split>2</split></port-info>
+            <port-info>
+                <local-port>105</local-port>
+                <width>8</width>
+                <module>56</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>32768</port-speed>
+            <split>2</split></port-info>
+            <port-info>
+                <local-port>109</local-port>
+                <width>8</width>
+                <module>57</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>32768</port-speed>
+            <split>2</split></port-info>
+            <port-info>
+                <local-port>113</local-port>
+                <width>8</width>
+                <module>63</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>32768</port-speed>
+            <split>2</split></port-info>
+            <port-info>
+                <local-port>117</local-port>
+                <width>8</width>
+                <module>62</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>32768</port-speed>
+            <split>2</split></port-info>
+            <port-info>
+                <local-port>121</local-port>
+                <width>8</width>
+                <module>60</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>32768</port-speed>
+            <split>2</split></port-info>
+            <port-info>
+                <local-port>125</local-port>
+                <width>8</width>
+                <module>61</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>32768</port-speed>
+            <split>2</split></port-info>
+            <port-info>
+                <local-port>129</local-port>
+                <width>8</width>
+                <module>29</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>32768</port-speed>
+            <split>2</split></port-info>
+            <port-info>
+                <local-port>133</local-port>
+                <width>8</width>
+                <module>28</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>32768</port-speed>
+            <split>2</split></port-info>
+            <port-info>
+                <local-port>137</local-port>
+                <width>8</width>
+                <module>30</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>32768</port-speed>
+            <split>2</split></port-info>
+            <port-info>
+                <local-port>141</local-port>
+                <width>8</width>
+                <module>31</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>32768</port-speed>
+            <split>2</split></port-info>
+            <port-info>
+                <local-port>145</local-port>
+                <width>8</width>
+                <module>25</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>32768</port-speed>
+            <split>2</split></port-info>
+            <port-info>
+                <local-port>149</local-port>
+                <width>8</width>
+                <module>24</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>32768</port-speed>
+            <split>2</split></port-info>
+            <port-info>
+                <local-port>153</local-port>
+                <width>8</width>
+                <module>26</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>32768</port-speed>
+            <split>2</split></port-info>
+            <port-info>
+                <local-port>157</local-port>
+                <width>8</width>
+                <module>27</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>32768</port-speed>
+            <split>2</split></port-info>
+            <port-info>
+                <local-port>161</local-port>
+                <width>8</width>
+                <module>21</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>32768</port-speed>
+            <split>2</split></port-info>
+            <port-info>
+                <local-port>165</local-port>
+                <width>8</width>
+                <module>20</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>32768</port-speed>
+            <split>2</split></port-info>
+            <port-info>
+                <local-port>169</local-port>
+                <width>8</width>
+                <module>22</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>32768</port-speed>
+            <split>2</split></port-info>
+            <port-info>
+                <local-port>173</local-port>
+                <width>8</width>
+                <module>23</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>32768</port-speed>
+            <split>2</split></port-info>
+            <port-info>
+                <local-port>177</local-port>
+                <width>8</width>
+                <module>17</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>32768</port-speed>
+            <split>2</split></port-info>
+            <port-info>
+                <local-port>181</local-port>
+                <width>8</width>
+                <module>16</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>32768</port-speed>
+            <split>2</split></port-info>
+            <port-info>
+                <local-port>185</local-port>
+                <width>8</width>
+                <module>18</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>32768</port-speed>
+            <split>2</split></port-info>
+            <port-info>
+                <local-port>189</local-port>
+                <width>8</width>
+                <module>19</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>32768</port-speed>
+            <split>2</split></port-info>
+            <port-info>
+                <local-port>193</local-port>
+                <width>8</width>
+                <module>12</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>32768</port-speed>
+            <split>2</split></port-info>
+            <port-info>
+                <local-port>197</local-port>
+                <width>8</width>
+                <module>13</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>32768</port-speed>
+            <split>2</split></port-info>
+            <port-info>
+                <local-port>201</local-port>
+                <width>8</width>
+                <module>15</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>32768</port-speed>
+            <split>2</split></port-info>
+            <port-info>
+                <local-port>205</local-port>
+                <width>8</width>
+                <module>14</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>32768</port-speed>
+            <split>2</split></port-info>
+            <port-info>
+                <local-port>209</local-port>
+                <width>8</width>
+                <module>8</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>32768</port-speed>
+            <split>2</split></port-info>
+            <port-info>
+                <local-port>213</local-port>
+                <width>8</width>
+                <module>9</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>32768</port-speed>
+            <split>2</split></port-info>
+            <port-info>
+                <local-port>217</local-port>
+                <width>8</width>
+                <module>11</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>32768</port-speed>
+            <split>2</split></port-info>
+            <port-info>
+                <local-port>221</local-port>
+                <width>8</width>
+                <module>10</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>32768</port-speed>
+            <split>2</split></port-info>
+            <port-info>
+                <local-port>225</local-port>
+                <width>8</width>
+                <module>4</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>32768</port-speed>
+            <split>2</split></port-info>
+            <port-info>
+                <local-port>229</local-port>
+                <width>8</width>
+                <module>5</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>32768</port-speed>
+            <split>2</split></port-info>
+            <port-info>
+                <local-port>233</local-port>
+                <width>8</width>
+                <module>7</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>32768</port-speed>
+            <split>2</split></port-info>
+            <port-info>
+                <local-port>237</local-port>
+                <width>8</width>
+                <module>6</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>32768</port-speed>
+            <split>2</split></port-info>
+            <port-info>
+                <local-port>241</local-port>
+                <width>8</width>
+                <module>0</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>32768</port-speed>
+            <split>2</split></port-info>
+            <port-info>
+                <local-port>245</local-port>
+                <width>8</width>
+                <module>1</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>32768</port-speed>
+            <split>2</split></port-info>
+            <port-info>
+                <local-port>249</local-port>
+                <width>8</width>
+                <module>3</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>32768</port-speed>
+            <split>2</split></port-info>
+            <port-info>
+                <local-port>253</local-port>
+                <width>8</width>
+                <module>2</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>32768</port-speed>
+            <split>2</split></port-info>
+            <port-info>
+                <local-port>257</local-port>
+                <width>1</width>
+                <module>64</module>
+                <breakout-modes>0</breakout-modes>
+                <port-speed>64</port-speed>
+            </port-info>
+        </ports-list>
+    </platform_info>
+</root>

From 006f4b209c919b41a7c1ebd0afdfe07885ef4cad Mon Sep 17 00:00:00 2001
From: Pavan Naregundi <92989231+pavannaregundi@users.noreply.github.com>
Date: Mon, 15 Apr 2024 08:55:45 +0530
Subject: [PATCH 0439/1115] [Marvell] Build infrastructure enhancements 
 (#18143)

* Move mrvl-prestera and sonic-platform-marvell submodule

'mrvl-prestera' and 'sonic-platform-marvell' submodules are
moved from 'marvell-arm64'to 'marvell'.
Additionaly submodules are changed to support multi-architecture build.

Signed-off-by: Pavan Naregundi <pnaregundi@marvell.com>
---
 .azure-pipelines/azure-pipelines-build.yml    |  2 +
 .../azure-pipelines-image-template.yml        |  3 +-
 .azure-pipelines/official-build-cache.yml     |  1 +
 .gitmodules                                   |  8 +--
 README.md                                     |  6 +-
 azure-pipelines.yml                           |  2 +
 build_debian.sh                               |  2 +-
 build_image.sh                                | 12 +++-
 .../arm64-marvell_rd98DX35xx-r0/platform_asic |  2 +-
 .../platform_asic                             |  2 +-
 .../arm64-nokia_ixs7215_52xb-r0/platform_asic |  2 +-
 .../armhf-nokia_ixs7215_52x-r0/platform_asic  |  2 +-
 onie-image-armhf.conf                         |  8 +--
 onie-mk-demo.sh                               |  2 +-
 .../marvell-arm64/docker-syncd-mrvl-rpc.mk    | 27 --------
 .../docker-syncd-mrvl-rpc/99-syncd.conf       |  1 -
 .../docker-syncd-mrvl-rpc/Dockerfile.j2       | 56 ----------------
 .../docker-syncd-mrvl-rpc/ptf_nn_agent.conf   | 10 ---
 platform/marvell-arm64/docker-syncd-mrvl.mk   | 16 -----
 .../docker-syncd-mrvl/Dockerfile.j2           | 37 -----------
 .../docker-syncd-mrvl/critical_processes      |  1 -
 .../docker-syncd-mrvl/supervisord.conf        | 39 -----------
 .../marvell-arm64/docker-syncd-mrvl/syncd.sh  | 12 ----
 platform/marvell-arm64/libsaithrift-dev.mk    | 20 ------
 platform/marvell-arm64/mrvl-prestera          |  1 -
 platform/marvell-arm64/one-image.mk           | 17 -----
 platform/marvell-arm64/rules.mk               | 26 --------
 platform/marvell-arm64/sai.mk                 |  9 ---
 platform/marvell-arm64/sai/Makefile           |  9 ---
 platform/marvell-arm64/sonic-platform-marvell |  1 -
 .../debian/sonic-platform-nokia-7215.install  |  6 --
 .../marvell-armhf/docker-saiserver-mrvl.dep   |  8 ---
 .../marvell-armhf/docker-saiserver-mrvl.mk    | 15 -----
 .../marvell-armhf/docker-syncd-mrvl-rpc.dep   |  8 ---
 .../marvell-armhf/docker-syncd-mrvl-rpc.mk    | 25 --------
 .../docker-syncd-mrvl-rpc/99-syncd.conf       |  1 -
 .../docker-syncd-mrvl-rpc/Dockerfile.j2       | 56 ----------------
 .../docker-syncd-mrvl-rpc/ptf_nn_agent.conf   | 10 ---
 platform/marvell-armhf/docker-syncd-mrvl.dep  | 10 ---
 platform/marvell-armhf/docker-syncd-mrvl.mk   | 16 -----
 .../docker-syncd-mrvl/Dockerfile.j2           | 37 -----------
 .../docker-syncd-mrvl/critical_processes      |  1 -
 .../docker-syncd-mrvl/supervisord.conf        | 39 -----------
 platform/marvell-armhf/libsaithrift-dev.dep   | 11 ----
 platform/marvell-armhf/libsaithrift-dev.mk    | 20 ------
 platform/marvell-armhf/one-image.dep          |  1 -
 platform/marvell-armhf/one-image.mk           | 16 -----
 platform/marvell-armhf/platform-et6448m.dep   |  8 ---
 platform/marvell-armhf/platform-et6448m.mk    |  8 ---
 platform/marvell-armhf/platform-nokia.dep     |  8 ---
 platform/marvell-armhf/platform-nokia.mk      | 10 ---
 platform/marvell-armhf/prestera.dep           |  8 ---
 platform/marvell-armhf/prestera.mk            | 11 ----
 .../marvell-armhf/prestera/debian/changelog   |  5 --
 platform/marvell-armhf/prestera/debian/compat |  1 -
 .../marvell-armhf/prestera/debian/control     | 15 -----
 .../debian/mrvlprestera.install.template      |  2 -
 platform/marvell-armhf/prestera/debian/rules  | 56 ----------------
 platform/marvell-armhf/rules.dep              |  9 ---
 platform/marvell-armhf/rules.mk               | 28 --------
 platform/marvell-armhf/sai.dep                |  9 ---
 platform/marvell-armhf/sai.mk                 |  9 ---
 platform/marvell-armhf/sai/Makefile           |  9 ---
 .../sonic-platform-et6448m/.gitignore         | 50 ---------------
 .../sonic-platform-et6448m/debian/changelog   |  5 --
 .../sonic-platform-et6448m/debian/compat      |  1 -
 .../sonic-platform-et6448m/debian/control     | 15 -----
 .../sonic-platform-et6448m/debian/install     |  3 -
 .../sonic-platform-et6448m/debian/postinst    | 40 ------------
 .../sonic-platform-et6448m/debian/rules       | 25 --------
 .../sonic-platform-et6448m/entropy.py         | 22 -------
 .../et6448m_plt_setup.sh                      | 60 -----------------
 .../sonic-platform-et6448m/inband_mgmt.sh     | 40 ------------
 .../sonic-platform-nokia/debian/changelog     |  5 --
 .../sonic-platform-nokia/debian/compat        |  1 -
 .../sonic-platform-nokia/debian/control       | 15 -----
 .../sonic-platform-nokia/debian/rules         | 64 -------------------
 .../docker-saiserver-mrvl.dep                 |  0
 .../docker-saiserver-mrvl.mk                  |  1 +
 .../docker-syncd-mrvl-rpc.dep                 |  0
 platform/marvell/docker-syncd-mrvl-rpc.mk     |  3 +
 .../docker-syncd-mrvl-rpc/99-syncd.conf       |  1 -
 .../docker-syncd-mrvl-rpc/Dockerfile.j2       | 11 ++--
 .../docker-syncd-mrvl.dep                     |  0
 platform/marvell/docker-syncd-mrvl.mk         |  5 +-
 .../marvell/docker-syncd-mrvl/Dockerfile.j2   | 12 ++--
 .../docker-syncd-mrvl/supervisord.conf        |  2 +-
 .../libsaithrift-dev.dep                      |  0
 platform/marvell/libsaithrift-dev.mk          | 10 +--
 platform/marvell/mrvl-prestera                |  1 +
 .../mrvl-prestera.dep                         |  0
 .../mrvl-prestera.mk                          |  1 -
 .../{marvell-arm64 => marvell}/one-image.dep  |  0
 platform/marvell/one-image.mk                 | 13 ++++
 platform/marvell/onie-image-arm64.conf        | 55 ++++++++++++++++
 .../platform-marvell.dep                      |  0
 .../platform-marvell.mk                       |  4 +-
 .../platform-nokia.dep                        |  0
 .../platform-nokia.mk                         | 13 +++-
 platform/marvell/platform.conf                |  0
 .../platform_arm64.conf}                      |  0
 .../platform_armhf.conf}                      |  0
 platform/{marvell-arm64 => marvell}/rules.dep |  4 +-
 platform/marvell/rules.mk                     | 10 ++-
 platform/{marvell-arm64 => marvell}/sai.dep   |  2 -
 platform/marvell/sai.mk                       | 18 ++++--
 platform/marvell/sai/Makefile                 |  9 ---
 platform/marvell/sonic-platform-marvell       |  1 +
 .../7215-a1}/modules/Makefile                 |  0
 .../modules/cn9130_cpu_thermal_sensor.c       |  0
 .../7215-a1}/modules/nokia_7215_ixs_a1_cpld.c |  0
 .../7215-a1}/scripts/cpu_wdt.py               |  0
 .../7215-a1}/scripts/nokia-7215-init.sh       |  0
 .../7215-a1}/service/cpu_wdt.service          |  0
 .../7215-a1}/service/nokia-7215init.service   |  0
 .../sonic-platform-nokia/7215-a1}/setup.py    |  2 +-
 .../7215-a1}/sonic_platform/__init__.py       |  0
 .../7215-a1}/sonic_platform/chassis.py        |  0
 .../7215-a1}/sonic_platform/component.py      |  0
 .../7215-a1}/sonic_platform/eeprom.py         |  0
 .../7215-a1}/sonic_platform/fan.py            |  0
 .../7215-a1}/sonic_platform/fan_drawer.py     |  0
 .../7215-a1}/sonic_platform/platform.py       |  0
 .../7215-a1}/sonic_platform/psu.py            |  0
 .../7215-a1}/sonic_platform/sfp.py            |  0
 .../7215-a1}/sonic_platform/sfp_event.py      |  0
 .../7215-a1}/sonic_platform/test/README       |  0
 .../sonic_platform/test/test-chassis.py       |  0
 .../sonic_platform/test/test-component.py     |  0
 .../sonic_platform/test/test-eeprom.py        |  0
 .../7215-a1}/sonic_platform/test/test-fan.py  |  0
 .../7215-a1}/sonic_platform/test/test-psu.py  |  0
 .../7215-a1}/sonic_platform/test/test-sfp.py  |  0
 .../sonic_platform/test/test-thermal.py       |  0
 .../sonic_platform/test/test-watchdog.py      |  0
 .../7215-a1}/sonic_platform/thermal.py        |  0
 .../sonic_platform/thermal_actions.py         |  0
 .../sonic_platform/thermal_conditions.py      |  0
 .../7215-a1}/sonic_platform/thermal_infos.py  |  0
 .../sonic_platform/thermal_manager.py         |  0
 .../7215-a1}/sonic_platform/watchdog.py       |  0
 .../7215-a1}/utils/sonic_ssd.py               |  0
 .../7215/scripts/cpu_wdt.py                   |  0
 .../7215/scripts}/inband_mgmt.sh              |  0
 .../7215/scripts}/nokia-7215_plt_setup.sh     |  0
 .../7215/scripts/nokia-7215init.sh            |  0
 .../7215/service/cpu_wdt.service              |  0
 .../service/fstrim.timer/timer-override.conf  |  0
 .../7215/service/nokia-7215init.service       |  0
 .../sonic-platform-nokia/7215/setup.py        |  2 +-
 .../7215/sonic_platform/__init__.py           |  0
 .../7215/sonic_platform/chassis.py            |  0
 .../7215/sonic_platform/component.py          |  0
 .../7215/sonic_platform/eeprom.py             |  0
 .../7215/sonic_platform/fan.py                |  0
 .../7215/sonic_platform/fan_drawer.py         |  0
 .../7215/sonic_platform/platform.py           |  0
 .../7215/sonic_platform/psu.py                |  0
 .../7215/sonic_platform/sfp.py                |  0
 .../7215/sonic_platform/sfp_event.py          |  0
 .../7215/sonic_platform/test/README           |  0
 .../7215/sonic_platform/test/test-chassis.py  |  0
 .../sonic_platform/test/test-component.py     |  0
 .../7215/sonic_platform/test/test-eeprom.py   |  0
 .../7215/sonic_platform/test/test-fan.py      |  0
 .../7215/sonic_platform/test/test-psu.py      |  0
 .../7215/sonic_platform/test/test-sfp.py      |  0
 .../7215/sonic_platform/test/test-thermal.py  |  0
 .../7215/sonic_platform/test/test-watchdog.py |  0
 .../7215/sonic_platform/thermal.py            |  0
 .../7215/sonic_platform/thermal_actions.py    |  0
 .../7215/sonic_platform/thermal_conditions.py |  0
 .../7215/sonic_platform/thermal_infos.py      |  0
 .../7215/sonic_platform/thermal_manager.py    |  0
 .../7215/sonic_platform/watchdog.py           |  0
 .../sonic-platform-nokia/debian/changelog     |  2 +-
 .../sonic-platform-nokia/debian/compat        |  0
 .../sonic-platform-nokia/debian/control       | 11 +++-
 .../sonic-platform-nokia/debian/rules         | 44 +++++++++----
 .../sonic-platform-nokia-7215-a1.install      |  6 ++
 .../sonic-platform-nokia-7215-a1.postinst}    |  0
 .../debian/sonic-platform-nokia-7215.install  |  4 +-
 .../debian/sonic-platform-nokia-7215.postinst |  2 +
 .../{marvell-arm64 => marvell}/sonic_fit.its  |  0
 184 files changed, 223 insertions(+), 1184 deletions(-)
 delete mode 100644 platform/marvell-arm64/docker-syncd-mrvl-rpc.mk
 delete mode 100644 platform/marvell-arm64/docker-syncd-mrvl-rpc/99-syncd.conf
 delete mode 100644 platform/marvell-arm64/docker-syncd-mrvl-rpc/Dockerfile.j2
 delete mode 100644 platform/marvell-arm64/docker-syncd-mrvl-rpc/ptf_nn_agent.conf
 delete mode 100644 platform/marvell-arm64/docker-syncd-mrvl.mk
 delete mode 100755 platform/marvell-arm64/docker-syncd-mrvl/Dockerfile.j2
 delete mode 100644 platform/marvell-arm64/docker-syncd-mrvl/critical_processes
 delete mode 100644 platform/marvell-arm64/docker-syncd-mrvl/supervisord.conf
 delete mode 100755 platform/marvell-arm64/docker-syncd-mrvl/syncd.sh
 delete mode 100644 platform/marvell-arm64/libsaithrift-dev.mk
 delete mode 160000 platform/marvell-arm64/mrvl-prestera
 delete mode 100644 platform/marvell-arm64/one-image.mk
 delete mode 100644 platform/marvell-arm64/rules.mk
 delete mode 100644 platform/marvell-arm64/sai.mk
 delete mode 100644 platform/marvell-arm64/sai/Makefile
 delete mode 160000 platform/marvell-arm64/sonic-platform-marvell
 delete mode 100644 platform/marvell-arm64/sonic-platform-nokia/debian/sonic-platform-nokia-7215.install
 delete mode 100644 platform/marvell-armhf/docker-saiserver-mrvl.dep
 delete mode 100644 platform/marvell-armhf/docker-saiserver-mrvl.mk
 delete mode 100644 platform/marvell-armhf/docker-syncd-mrvl-rpc.dep
 delete mode 100644 platform/marvell-armhf/docker-syncd-mrvl-rpc.mk
 delete mode 100644 platform/marvell-armhf/docker-syncd-mrvl-rpc/99-syncd.conf
 delete mode 100644 platform/marvell-armhf/docker-syncd-mrvl-rpc/Dockerfile.j2
 delete mode 100644 platform/marvell-armhf/docker-syncd-mrvl-rpc/ptf_nn_agent.conf
 delete mode 100644 platform/marvell-armhf/docker-syncd-mrvl.dep
 delete mode 100644 platform/marvell-armhf/docker-syncd-mrvl.mk
 delete mode 100755 platform/marvell-armhf/docker-syncd-mrvl/Dockerfile.j2
 delete mode 100644 platform/marvell-armhf/docker-syncd-mrvl/critical_processes
 delete mode 100644 platform/marvell-armhf/docker-syncd-mrvl/supervisord.conf
 delete mode 100644 platform/marvell-armhf/libsaithrift-dev.dep
 delete mode 100644 platform/marvell-armhf/libsaithrift-dev.mk
 delete mode 100644 platform/marvell-armhf/one-image.dep
 delete mode 100644 platform/marvell-armhf/one-image.mk
 delete mode 100644 platform/marvell-armhf/platform-et6448m.dep
 delete mode 100644 platform/marvell-armhf/platform-et6448m.mk
 delete mode 100644 platform/marvell-armhf/platform-nokia.dep
 delete mode 100644 platform/marvell-armhf/platform-nokia.mk
 delete mode 100644 platform/marvell-armhf/prestera.dep
 delete mode 100644 platform/marvell-armhf/prestera.mk
 delete mode 100644 platform/marvell-armhf/prestera/debian/changelog
 delete mode 100644 platform/marvell-armhf/prestera/debian/compat
 delete mode 100755 platform/marvell-armhf/prestera/debian/control
 delete mode 100644 platform/marvell-armhf/prestera/debian/mrvlprestera.install.template
 delete mode 100755 platform/marvell-armhf/prestera/debian/rules
 delete mode 100644 platform/marvell-armhf/rules.dep
 delete mode 100644 platform/marvell-armhf/rules.mk
 delete mode 100644 platform/marvell-armhf/sai.dep
 delete mode 100644 platform/marvell-armhf/sai.mk
 delete mode 100644 platform/marvell-armhf/sai/Makefile
 delete mode 100644 platform/marvell-armhf/sonic-platform-et6448m/.gitignore
 delete mode 100755 platform/marvell-armhf/sonic-platform-et6448m/debian/changelog
 delete mode 100644 platform/marvell-armhf/sonic-platform-et6448m/debian/compat
 delete mode 100755 platform/marvell-armhf/sonic-platform-et6448m/debian/control
 delete mode 100644 platform/marvell-armhf/sonic-platform-et6448m/debian/install
 delete mode 100644 platform/marvell-armhf/sonic-platform-et6448m/debian/postinst
 delete mode 100755 platform/marvell-armhf/sonic-platform-et6448m/debian/rules
 delete mode 100644 platform/marvell-armhf/sonic-platform-et6448m/entropy.py
 delete mode 100755 platform/marvell-armhf/sonic-platform-et6448m/et6448m_plt_setup.sh
 delete mode 100644 platform/marvell-armhf/sonic-platform-et6448m/inband_mgmt.sh
 delete mode 100755 platform/marvell-armhf/sonic-platform-nokia/debian/changelog
 delete mode 100644 platform/marvell-armhf/sonic-platform-nokia/debian/compat
 delete mode 100755 platform/marvell-armhf/sonic-platform-nokia/debian/control
 delete mode 100755 platform/marvell-armhf/sonic-platform-nokia/debian/rules
 rename platform/{marvell-arm64 => marvell}/docker-saiserver-mrvl.dep (100%)
 rename platform/{marvell-arm64 => marvell}/docker-saiserver-mrvl.mk (93%)
 rename platform/{marvell-arm64 => marvell}/docker-syncd-mrvl-rpc.dep (100%)
 rename platform/{marvell-arm64 => marvell}/docker-syncd-mrvl.dep (100%)
 rename platform/{marvell-arm64 => marvell}/libsaithrift-dev.dep (100%)
 create mode 160000 platform/marvell/mrvl-prestera
 rename platform/{marvell-arm64 => marvell}/mrvl-prestera.dep (100%)
 rename platform/{marvell-arm64 => marvell}/mrvl-prestera.mk (80%)
 rename platform/{marvell-arm64 => marvell}/one-image.dep (100%)
 create mode 100644 platform/marvell/onie-image-arm64.conf
 rename platform/{marvell-arm64 => marvell}/platform-marvell.dep (100%)
 rename platform/{marvell-arm64 => marvell}/platform-marvell.mk (89%)
 rename platform/{marvell-arm64 => marvell}/platform-nokia.dep (100%)
 rename platform/{marvell-arm64 => marvell}/platform-nokia.mk (61%)
 delete mode 100644 platform/marvell/platform.conf
 rename platform/{marvell-arm64/platform.conf => marvell/platform_arm64.conf} (100%)
 rename platform/{marvell-armhf/platform.conf => marvell/platform_armhf.conf} (100%)
 rename platform/{marvell-arm64 => marvell}/rules.dep (84%)
 rename platform/{marvell-arm64 => marvell}/sai.dep (76%)
 delete mode 100644 platform/marvell/sai/Makefile
 create mode 160000 platform/marvell/sonic-platform-marvell
 rename platform/{marvell-arm64/sonic-platform-nokia/7215 => marvell/sonic-platform-nokia/7215-a1}/modules/Makefile (100%)
 rename platform/{marvell-arm64/sonic-platform-nokia/7215 => marvell/sonic-platform-nokia/7215-a1}/modules/cn9130_cpu_thermal_sensor.c (100%)
 rename platform/{marvell-arm64/sonic-platform-nokia/7215 => marvell/sonic-platform-nokia/7215-a1}/modules/nokia_7215_ixs_a1_cpld.c (100%)
 rename platform/{marvell-arm64/sonic-platform-nokia/7215 => marvell/sonic-platform-nokia/7215-a1}/scripts/cpu_wdt.py (100%)
 rename platform/{marvell-arm64/sonic-platform-nokia/7215 => marvell/sonic-platform-nokia/7215-a1}/scripts/nokia-7215-init.sh (100%)
 rename platform/{marvell-arm64/sonic-platform-nokia/7215 => marvell/sonic-platform-nokia/7215-a1}/service/cpu_wdt.service (100%)
 rename platform/{marvell-arm64/sonic-platform-nokia/7215 => marvell/sonic-platform-nokia/7215-a1}/service/nokia-7215init.service (100%)
 rename platform/{marvell-armhf/sonic-platform-nokia/7215 => marvell/sonic-platform-nokia/7215-a1}/setup.py (80%)
 rename platform/{marvell-arm64/sonic-platform-nokia/7215 => marvell/sonic-platform-nokia/7215-a1}/sonic_platform/__init__.py (100%)
 rename platform/{marvell-arm64/sonic-platform-nokia/7215 => marvell/sonic-platform-nokia/7215-a1}/sonic_platform/chassis.py (100%)
 rename platform/{marvell-arm64/sonic-platform-nokia/7215 => marvell/sonic-platform-nokia/7215-a1}/sonic_platform/component.py (100%)
 rename platform/{marvell-arm64/sonic-platform-nokia/7215 => marvell/sonic-platform-nokia/7215-a1}/sonic_platform/eeprom.py (100%)
 rename platform/{marvell-arm64/sonic-platform-nokia/7215 => marvell/sonic-platform-nokia/7215-a1}/sonic_platform/fan.py (100%)
 rename platform/{marvell-arm64/sonic-platform-nokia/7215 => marvell/sonic-platform-nokia/7215-a1}/sonic_platform/fan_drawer.py (100%)
 rename platform/{marvell-arm64/sonic-platform-nokia/7215 => marvell/sonic-platform-nokia/7215-a1}/sonic_platform/platform.py (100%)
 rename platform/{marvell-arm64/sonic-platform-nokia/7215 => marvell/sonic-platform-nokia/7215-a1}/sonic_platform/psu.py (100%)
 rename platform/{marvell-arm64/sonic-platform-nokia/7215 => marvell/sonic-platform-nokia/7215-a1}/sonic_platform/sfp.py (100%)
 rename platform/{marvell-arm64/sonic-platform-nokia/7215 => marvell/sonic-platform-nokia/7215-a1}/sonic_platform/sfp_event.py (100%)
 rename platform/{marvell-arm64/sonic-platform-nokia/7215 => marvell/sonic-platform-nokia/7215-a1}/sonic_platform/test/README (100%)
 rename platform/{marvell-arm64/sonic-platform-nokia/7215 => marvell/sonic-platform-nokia/7215-a1}/sonic_platform/test/test-chassis.py (100%)
 rename platform/{marvell-arm64/sonic-platform-nokia/7215 => marvell/sonic-platform-nokia/7215-a1}/sonic_platform/test/test-component.py (100%)
 rename platform/{marvell-arm64/sonic-platform-nokia/7215 => marvell/sonic-platform-nokia/7215-a1}/sonic_platform/test/test-eeprom.py (100%)
 rename platform/{marvell-arm64/sonic-platform-nokia/7215 => marvell/sonic-platform-nokia/7215-a1}/sonic_platform/test/test-fan.py (100%)
 rename platform/{marvell-arm64/sonic-platform-nokia/7215 => marvell/sonic-platform-nokia/7215-a1}/sonic_platform/test/test-psu.py (100%)
 rename platform/{marvell-arm64/sonic-platform-nokia/7215 => marvell/sonic-platform-nokia/7215-a1}/sonic_platform/test/test-sfp.py (100%)
 rename platform/{marvell-arm64/sonic-platform-nokia/7215 => marvell/sonic-platform-nokia/7215-a1}/sonic_platform/test/test-thermal.py (100%)
 rename platform/{marvell-arm64/sonic-platform-nokia/7215 => marvell/sonic-platform-nokia/7215-a1}/sonic_platform/test/test-watchdog.py (100%)
 rename platform/{marvell-arm64/sonic-platform-nokia/7215 => marvell/sonic-platform-nokia/7215-a1}/sonic_platform/thermal.py (100%)
 rename platform/{marvell-arm64/sonic-platform-nokia/7215 => marvell/sonic-platform-nokia/7215-a1}/sonic_platform/thermal_actions.py (100%)
 rename platform/{marvell-arm64/sonic-platform-nokia/7215 => marvell/sonic-platform-nokia/7215-a1}/sonic_platform/thermal_conditions.py (100%)
 rename platform/{marvell-arm64/sonic-platform-nokia/7215 => marvell/sonic-platform-nokia/7215-a1}/sonic_platform/thermal_infos.py (100%)
 rename platform/{marvell-arm64/sonic-platform-nokia/7215 => marvell/sonic-platform-nokia/7215-a1}/sonic_platform/thermal_manager.py (100%)
 rename platform/{marvell-arm64/sonic-platform-nokia/7215 => marvell/sonic-platform-nokia/7215-a1}/sonic_platform/watchdog.py (100%)
 rename platform/{marvell-arm64/sonic-platform-nokia/7215 => marvell/sonic-platform-nokia/7215-a1}/utils/sonic_ssd.py (100%)
 rename platform/{marvell-armhf => marvell}/sonic-platform-nokia/7215/scripts/cpu_wdt.py (100%)
 rename platform/{marvell-armhf/sonic-platform-nokia => marvell/sonic-platform-nokia/7215/scripts}/inband_mgmt.sh (100%)
 rename platform/{marvell-armhf/sonic-platform-nokia => marvell/sonic-platform-nokia/7215/scripts}/nokia-7215_plt_setup.sh (100%)
 rename platform/{marvell-armhf => marvell}/sonic-platform-nokia/7215/scripts/nokia-7215init.sh (100%)
 rename platform/{marvell-armhf => marvell}/sonic-platform-nokia/7215/service/cpu_wdt.service (100%)
 rename platform/{marvell-armhf => marvell}/sonic-platform-nokia/7215/service/fstrim.timer/timer-override.conf (100%)
 rename platform/{marvell-armhf => marvell}/sonic-platform-nokia/7215/service/nokia-7215init.service (100%)
 rename platform/{marvell-arm64 => marvell}/sonic-platform-nokia/7215/setup.py (80%)
 rename platform/{marvell-armhf => marvell}/sonic-platform-nokia/7215/sonic_platform/__init__.py (100%)
 rename platform/{marvell-armhf => marvell}/sonic-platform-nokia/7215/sonic_platform/chassis.py (100%)
 rename platform/{marvell-armhf => marvell}/sonic-platform-nokia/7215/sonic_platform/component.py (100%)
 rename platform/{marvell-armhf => marvell}/sonic-platform-nokia/7215/sonic_platform/eeprom.py (100%)
 rename platform/{marvell-armhf => marvell}/sonic-platform-nokia/7215/sonic_platform/fan.py (100%)
 rename platform/{marvell-armhf => marvell}/sonic-platform-nokia/7215/sonic_platform/fan_drawer.py (100%)
 rename platform/{marvell-armhf => marvell}/sonic-platform-nokia/7215/sonic_platform/platform.py (100%)
 rename platform/{marvell-armhf => marvell}/sonic-platform-nokia/7215/sonic_platform/psu.py (100%)
 rename platform/{marvell-armhf => marvell}/sonic-platform-nokia/7215/sonic_platform/sfp.py (100%)
 rename platform/{marvell-armhf => marvell}/sonic-platform-nokia/7215/sonic_platform/sfp_event.py (100%)
 rename platform/{marvell-armhf => marvell}/sonic-platform-nokia/7215/sonic_platform/test/README (100%)
 rename platform/{marvell-armhf => marvell}/sonic-platform-nokia/7215/sonic_platform/test/test-chassis.py (100%)
 rename platform/{marvell-armhf => marvell}/sonic-platform-nokia/7215/sonic_platform/test/test-component.py (100%)
 rename platform/{marvell-armhf => marvell}/sonic-platform-nokia/7215/sonic_platform/test/test-eeprom.py (100%)
 rename platform/{marvell-armhf => marvell}/sonic-platform-nokia/7215/sonic_platform/test/test-fan.py (100%)
 rename platform/{marvell-armhf => marvell}/sonic-platform-nokia/7215/sonic_platform/test/test-psu.py (100%)
 rename platform/{marvell-armhf => marvell}/sonic-platform-nokia/7215/sonic_platform/test/test-sfp.py (100%)
 rename platform/{marvell-armhf => marvell}/sonic-platform-nokia/7215/sonic_platform/test/test-thermal.py (100%)
 rename platform/{marvell-armhf => marvell}/sonic-platform-nokia/7215/sonic_platform/test/test-watchdog.py (100%)
 rename platform/{marvell-armhf => marvell}/sonic-platform-nokia/7215/sonic_platform/thermal.py (100%)
 rename platform/{marvell-armhf => marvell}/sonic-platform-nokia/7215/sonic_platform/thermal_actions.py (100%)
 rename platform/{marvell-armhf => marvell}/sonic-platform-nokia/7215/sonic_platform/thermal_conditions.py (100%)
 rename platform/{marvell-armhf => marvell}/sonic-platform-nokia/7215/sonic_platform/thermal_infos.py (100%)
 rename platform/{marvell-armhf => marvell}/sonic-platform-nokia/7215/sonic_platform/thermal_manager.py (100%)
 rename platform/{marvell-armhf => marvell}/sonic-platform-nokia/7215/sonic_platform/watchdog.py (100%)
 rename platform/{marvell-arm64 => marvell}/sonic-platform-nokia/debian/changelog (65%)
 rename platform/{marvell-arm64 => marvell}/sonic-platform-nokia/debian/compat (100%)
 rename platform/{marvell-arm64 => marvell}/sonic-platform-nokia/debian/control (60%)
 rename platform/{marvell-arm64 => marvell}/sonic-platform-nokia/debian/rules (51%)
 create mode 100644 platform/marvell/sonic-platform-nokia/debian/sonic-platform-nokia-7215-a1.install
 rename platform/{marvell-arm64/sonic-platform-nokia/debian/sonic-platform-nokia-7215.postinst => marvell/sonic-platform-nokia/debian/sonic-platform-nokia-7215-a1.postinst} (100%)
 rename platform/{marvell-armhf => marvell}/sonic-platform-nokia/debian/sonic-platform-nokia-7215.install (82%)
 rename platform/{marvell-armhf => marvell}/sonic-platform-nokia/debian/sonic-platform-nokia-7215.postinst (89%)
 rename platform/{marvell-arm64 => marvell}/sonic_fit.its (100%)

diff --git a/.azure-pipelines/azure-pipelines-build.yml b/.azure-pipelines/azure-pipelines-build.yml
index b5e5c7322..cf2b84041 100644
--- a/.azure-pipelines/azure-pipelines-build.yml
+++ b/.azure-pipelines/azure-pipelines-build.yml
@@ -90,6 +90,7 @@ jobs:
             pool: sonicbld-armhf
           timeoutInMinutes: 2880
           variables:
+            PLATFORM_NAME: marvell
             PLATFORM_ARCH: armhf
 
         - name: marvell-arm64
@@ -97,6 +98,7 @@ jobs:
             pool: sonicbld-arm64
           timeoutInMinutes: 2880
           variables:
+            PLATFORM_NAME: marvell
             PLATFORM_ARCH: arm64
 
         - name: marvell
diff --git a/.azure-pipelines/azure-pipelines-image-template.yml b/.azure-pipelines/azure-pipelines-image-template.yml
index c412edb42..c2e8b8856 100644
--- a/.azure-pipelines/azure-pipelines-image-template.yml
+++ b/.azure-pipelines/azure-pipelines-image-template.yml
@@ -49,7 +49,8 @@ jobs:
           sudo modprobe overlay
           sudo apt-get install -y acl
           sudo bash -c "echo 1 > /proc/sys/vm/compact_memory"
-          ENABLE_DOCKER_BASE_PULL=y make PLATFORM=$(PLATFORM_AZP) PLATFORM_ARCH=$(PLATFORM_ARCH) $(BUILD_OPTIONS) configure
+          [ -z "$PLATFORM_NAME" ] && PLATFORM_NAME=$(PLATFORM_AZP)
+          ENABLE_DOCKER_BASE_PULL=y make PLATFORM=$PLATFORM_NAME PLATFORM_ARCH=$(PLATFORM_ARCH) $(BUILD_OPTIONS) configure
         displayName: 'Make configure'
     postSteps:
       - script: |
diff --git a/.azure-pipelines/official-build-cache.yml b/.azure-pipelines/official-build-cache.yml
index c4261a720..cc398bab7 100644
--- a/.azure-pipelines/official-build-cache.yml
+++ b/.azure-pipelines/official-build-cache.yml
@@ -49,4 +49,5 @@ stages:
           pool: sonicbld-armhf
           timeoutInMinutes: 1200
           variables:
+            PLATFORM_NAME: marvell
             PLATFORM_ARCH: armhf
diff --git a/.gitmodules b/.gitmodules
index e9b57673b..71cfffa1b 100644
--- a/.gitmodules
+++ b/.gitmodules
@@ -115,9 +115,9 @@
 [submodule "src/sonic-dash-api"]
 	path = src/sonic-dash-api
 	url = https://github.com/sonic-net/sonic-dash-api.git
-[submodule "platform/marvell-arm64/mrvl-prestera"]
-	path = platform/marvell-arm64/mrvl-prestera
+[submodule "platform/marvell/mrvl-prestera"]
+	path = platform/marvell/mrvl-prestera
 	url = https://github.com/Marvell-switching/mrvl-prestera.git
-[submodule "platform/marvell-arm64/sonic-platform-marvell"]
-	path = platform/marvell-arm64/sonic-platform-marvell
+[submodule "platform/marvell/sonic-platform-marvell"]
+	path = platform/marvell/sonic-platform-marvell
 	url = https://github.com/Marvell-switching/sonic-platform-arm64.git
diff --git a/README.md b/README.md
index 534540e3e..1fbcb128c 100644
--- a/README.md
+++ b/README.md
@@ -204,7 +204,7 @@ make target/sonic-[ASIC_VENDER]-armhf.bin
 _example:_
 
 ```shell
-make configure PLATFORM=marvell-armhf PLATFORM_ARCH=armhf
+make configure PLATFORM=marvell PLATFORM_ARCH=armhf
 make target/sonic-marvell-armhf.bin
 ```
 
@@ -215,7 +215,7 @@ using cross-compilation, run the following commands:
 # Execute make configure once to configure ASIC and ARCH for cross-compilation build
 
 NOJESSIE=1 NOSTRETCH=1 BLDENV=buster CROSS_BLDENV=1 \
-make configure PLATFORM=marvell-armhf PLATFORM_ARCH=armhf
+make configure PLATFORM=marvell PLATFORM_ARCH=armhf
 
 # Execute Arm32 build using cross-compilation environment
 
@@ -234,7 +234,7 @@ make configure PLATFORM=[ASIC_VENDOR] PLATFORM_ARCH=arm64
 
 # example:
 
-make configure PLATFORM=marvell-arm64 PLATFORM_ARCH=arm64
+make configure PLATFORM=marvell PLATFORM_ARCH=arm64
 ```
 
  **NOTE**:
diff --git a/azure-pipelines.yml b/azure-pipelines.yml
index ed8632203..cafd813e5 100644
--- a/azure-pipelines.yml
+++ b/azure-pipelines.yml
@@ -79,11 +79,13 @@ stages:
       - name: marvell-arm64
         pool: sonicbld-arm64
         variables:
+           PLATFORM_NAME: marvell
            PLATFORM_ARCH: arm64
       - name: marvell-armhf
         pool: sonicbld-armhf
         timeoutInMinutes: 1200
         variables:
+          PLATFORM_NAME: marvell
           PLATFORM_ARCH: armhf
           INCLUDE_RESTAPI: y
 
diff --git a/build_debian.sh b/build_debian.sh
index 4b0504b40..508c5dffa 100755
--- a/build_debian.sh
+++ b/build_debian.sh
@@ -781,7 +781,7 @@ if [[ $TARGET_BOOTLOADER == uboot ]]; then
             ## Overwriting the initrd image with uInitrd
             sudo LANG=C chroot $FILESYSTEM_ROOT mv /boot/u${INITRD_FILE} /boot/$INITRD_FILE
         else
-            sudo cp -v $PLATFORM_DIR/${sonic_asic_platform}-${CONFIGURED_ARCH}/sonic_fit.its $FILESYSTEM_ROOT/boot/
+            sudo cp -v $PLATFORM_DIR/$CONFIGURED_PLATFORM/sonic_fit.its $FILESYSTEM_ROOT/boot/
             sudo LANG=C chroot $FILESYSTEM_ROOT mkimage -f /boot/sonic_fit.its /boot/sonic_${CONFIGURED_ARCH}.fit
         fi
     fi
diff --git a/build_image.sh b/build_image.sh
index 7fafba29e..fe75bcaf3 100755
--- a/build_image.sh
+++ b/build_image.sh
@@ -9,7 +9,11 @@ set -x -e
 CONFIGURED_ARCH=$([ -f .arch ] && cat .arch || echo amd64)
 
 if [[ $CONFIGURED_ARCH == armhf || $CONFIGURED_ARCH == arm64 ]]; then
-    . ./onie-image-${CONFIGURED_ARCH}.conf
+    if [ -r ./platform/${CONFIGURED_PLATFORM}/onie-image-${CONFIGURED_ARCH}.conf ]; then
+        . ./platform/${CONFIGURED_PLATFORM}/onie-image-${CONFIGURED_ARCH}.conf
+    else
+        . ./onie-image-${CONFIGURED_ARCH}.conf
+    fi
 else
     . ./onie-image.conf
 fi
@@ -82,10 +86,14 @@ generate_onie_installer_image()
         done
     done
 
+    platform_conf_file="platform/$TARGET_MACHINE/platform_${CONFIGURED_ARCH}.conf"
+    if [ ! -f $platform_conf_file ]; then
+        platform_conf_file="platform/$TARGET_MACHINE/platform.conf"
+    fi
     ## Generate an ONIE installer image
     ## Note: Don't leave blank between lines. It is single line command.
     ./onie-mk-demo.sh $CONFIGURED_ARCH $TARGET_MACHINE $TARGET_PLATFORM-$TARGET_MACHINE-$ONIEIMAGE_VERSION \
-          installer platform/$TARGET_MACHINE/platform.conf $output_file OS $IMAGE_VERSION $ONIE_IMAGE_PART_SIZE \
+          installer $platform_conf_file $output_file OS $IMAGE_VERSION $ONIE_IMAGE_PART_SIZE \
           $INSTALLER_PAYLOAD $SECURE_UPGRADE_SIGNING_CERT $SECURE_UPGRADE_DEV_SIGNING_KEY
 }
 
diff --git a/device/marvell/arm64-marvell_rd98DX35xx-r0/platform_asic b/device/marvell/arm64-marvell_rd98DX35xx-r0/platform_asic
index 558e01e18..a55475287 100644
--- a/device/marvell/arm64-marvell_rd98DX35xx-r0/platform_asic
+++ b/device/marvell/arm64-marvell_rd98DX35xx-r0/platform_asic
@@ -1 +1 @@
-marvell-arm64
+marvell
diff --git a/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/platform_asic b/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/platform_asic
index 558e01e18..a55475287 100644
--- a/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/platform_asic
+++ b/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/platform_asic
@@ -1 +1 @@
-marvell-arm64
+marvell
diff --git a/device/nokia/arm64-nokia_ixs7215_52xb-r0/platform_asic b/device/nokia/arm64-nokia_ixs7215_52xb-r0/platform_asic
index 558e01e18..a55475287 100644
--- a/device/nokia/arm64-nokia_ixs7215_52xb-r0/platform_asic
+++ b/device/nokia/arm64-nokia_ixs7215_52xb-r0/platform_asic
@@ -1 +1 @@
-marvell-arm64
+marvell
diff --git a/device/nokia/armhf-nokia_ixs7215_52x-r0/platform_asic b/device/nokia/armhf-nokia_ixs7215_52x-r0/platform_asic
index 64b1d7dbb..a55475287 100644
--- a/device/nokia/armhf-nokia_ixs7215_52x-r0/platform_asic
+++ b/device/nokia/armhf-nokia_ixs7215_52x-r0/platform_asic
@@ -1 +1 @@
-marvell-armhf
+marvell
diff --git a/onie-image-armhf.conf b/onie-image-armhf.conf
index 2672187d9..f3d88fc6f 100644
--- a/onie-image-armhf.conf
+++ b/onie-image-armhf.conf
@@ -31,22 +31,22 @@ DOCKERFS_DIR=docker
 DOCKER_RAMFS_SIZE=2500M
 
 ## Output file name for onie installer
-OUTPUT_ONIE_IMAGE=target/sonic-$TARGET_MACHINE.bin
+OUTPUT_ONIE_IMAGE=target/sonic-$TARGET_MACHINE-$CONFIGURED_ARCH.bin
 
 ## Output file name for raw image
-OUTPUT_RAW_IMAGE=target/sonic-$TARGET_MACHINE.raw
+OUTPUT_RAW_IMAGE=target/sonic-$TARGET_MACHINE-$CONFIGURED_ARCH.raw
 
 ## Raw image size in MB
 RAW_IMAGE_DISK_SIZE=4096
 
 ## Output file name for kvm image
-OUTPUT_KVM_IMAGE=target/sonic-$TARGET_MACHINE.img
+OUTPUT_KVM_IMAGE=target/sonic-$TARGET_MACHINE-$CONFIGURED_ARCH.img
 
 ## Kvm image size in GB
 KVM_IMAGE_DISK_SIZE=16
 
 ## Output file name for aboot installer
-OUTPUT_ABOOT_IMAGE=target/sonic-aboot-$TARGET_MACHINE.swi
+OUTPUT_ABOOT_IMAGE=target/sonic-aboot-$TARGET_MACHINE-$CONFIGURED_ARCH.swi
 
 ## Aboot boot image name
 ABOOT_BOOT_IMAGE=.sonic-boot.swi
diff --git a/onie-mk-demo.sh b/onie-mk-demo.sh
index 72140407f..713c1c440 100755
--- a/onie-mk-demo.sh
+++ b/onie-mk-demo.sh
@@ -107,7 +107,7 @@ echo -n "."
 cp -r $onie_installer_payload $tmp_installdir || clean_up 1
 echo -n "."
 [ -r "$platform_conf" ] && {
-    cp $platform_conf $tmp_installdir || clean_up 1
+    cp $platform_conf $tmp_installdir/platform.conf || clean_up 1
 }
 echo "machine=$machine" > $tmp_installdir/machine.conf
 echo "platform=$platform" >> $tmp_installdir/machine.conf
diff --git a/platform/marvell-arm64/docker-syncd-mrvl-rpc.mk b/platform/marvell-arm64/docker-syncd-mrvl-rpc.mk
deleted file mode 100644
index 587902336..000000000
--- a/platform/marvell-arm64/docker-syncd-mrvl-rpc.mk
+++ /dev/null
@@ -1,27 +0,0 @@
-# docker image for mrvl syncd with rpc
-
-DOCKER_SYNCD_MRVL_RPC = docker-syncd-mrvl-rpc.gz
-$(DOCKER_SYNCD_MRVL_RPC)_PATH = $(PLATFORM_PATH)/docker-syncd-mrvl-rpc
-$(DOCKER_SYNCD_MRVL_RPC)_DEPENDS += $(SYNCD_RPC) $(LIBTHRIFT) $(PTF)
-$(DOCKER_SYNCD_MRVL_RPC)_FILES += $(SUPERVISOR_PROC_EXIT_LISTENER_SCRIPT)
-ifeq ($(INSTALL_DEBUG_TOOLS), y)
-$(DOCKER_SYNCD_MRVL_RPC)_DEPENDS += $(SYNCD_RPC_DBG) \
-                                    $(LIBSWSSCOMMON_DBG) \
-                                    $(LIBSAIMETADATA_DBG) \
-                                    $(LIBSAIREDIS_DBG)
-endif
-$(DOCKER_SYNCD_MRVL_RPC)_LOAD_DOCKERS += $(DOCKER_SYNCD_BASE)
-SONIC_DOCKER_IMAGES += $(DOCKER_SYNCD_MRVL_RPC)
-ifeq ($(ENABLE_SYNCD_RPC),y)
-SONIC_INSTALL_DOCKER_IMAGES += $(DOCKER_SYNCD_MRVL_RPC)
-endif
-
-$(DOCKER_SYNCD_MRVL_RPC)_CONTAINER_NAME = syncd
-$(DOCKER_SYNCD_MRVL_RPC)_VERSION = 1.0.0+rpc
-$(DOCKER_SYNCD_MRVL_RPC)_PACKAGE_NAME = syncd
-$(DOCKER_SYNCD_MRVL_RPC)_RUN_OPT += --privileged -t
-$(DOCKER_SYNCD_MRVL_RPC)_RUN_OPT += -v /host/machine.conf:/etc/machine.conf
-$(DOCKER_SYNCD_MRVL_RPC)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro
-$(DOCKER_SYNCD_MRVL_RPC)_RUN_OPT += -v /host/warmboot:/var/warmboot
-
-SONIC_BULLSEYE_DOCKERS += $(DOCKER_SYNCD_MRVL_RPC)
diff --git a/platform/marvell-arm64/docker-syncd-mrvl-rpc/99-syncd.conf b/platform/marvell-arm64/docker-syncd-mrvl-rpc/99-syncd.conf
deleted file mode 100644
index 3fabe208d..000000000
--- a/platform/marvell-arm64/docker-syncd-mrvl-rpc/99-syncd.conf
+++ /dev/null
@@ -1 +0,0 @@
-sysctl -w net.core.rmem_max=509430500
diff --git a/platform/marvell-arm64/docker-syncd-mrvl-rpc/Dockerfile.j2 b/platform/marvell-arm64/docker-syncd-mrvl-rpc/Dockerfile.j2
deleted file mode 100644
index 6bd7fb9c7..000000000
--- a/platform/marvell-arm64/docker-syncd-mrvl-rpc/Dockerfile.j2
+++ /dev/null
@@ -1,56 +0,0 @@
-FROM docker-syncd-mrvl-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}}
-
-## Make apt-get non-interactive
-ENV DEBIAN_FRONTEND=noninteractive
-
-COPY \
-{% for deb in docker_syncd_mrvl_rpc_debs.split(' ') -%}
-debs/{{ deb }}{{' '}}
-{%- endfor -%}
-debs/
-
-RUN apt-get purge -y syncd
-
-## Pre-install the fundamental packages
-RUN apt-get update \
- && apt-get -y install  \
-    net-tools           \
-    python3-pip		\
-    python3-setuptools	\
-    build-essential     \
-    libssl-dev          \
-    libffi-dev          \
-    python-dev          \
-    wget                \
-    cmake               \
-    libqt5core5a        \
-    libqt5network5      \
-    libboost-atomic1.74.0
-
-RUN dpkg_apt() { [ -f $1 ] && { dpkg -i $1 || apt-get -y install -f; } || return 1; } ; \
-{% for deb in docker_syncd_mrvl_rpc_debs.split(' ') -%}
-dpkg_apt debs/{{ deb }}{{'; '}}
-{%- endfor %}
-
-RUN wget https://github.com/nanomsg/nanomsg/archive/1.0.0.tar.gz \
- && tar xvfz 1.0.0.tar.gz \
- && cd nanomsg-1.0.0    \
- && mkdir -p build      \
- && cmake .             \
- && make install        \
- && ldconfig            \
- && cd ..               \
- && rm -fr nanomsg-1.0.0 \
- && rm -f 1.0.0.tar.gz  \
- && pip3 install cffi==1.7.0    \
- && pip3 install --upgrade cffi==1.7.0 \
- && pip3 install nnpy    \
- && mkdir -p /opt       \
- && cd /opt             \
- && wget https://raw.githubusercontent.com/p4lang/ptf/master/ptf_nn/ptf_nn_agent.py \
- && apt-get clean -y; apt-get autoclean -y; apt-get autoremove -y \
- && rm -rf /root/deps
-
-COPY ["ptf_nn_agent.conf", "/etc/supervisor/conf.d/"]
-
-ENTRYPOINT ["/usr/local/bin/supervisord"]
diff --git a/platform/marvell-arm64/docker-syncd-mrvl-rpc/ptf_nn_agent.conf b/platform/marvell-arm64/docker-syncd-mrvl-rpc/ptf_nn_agent.conf
deleted file mode 100644
index fa1ed0eb1..000000000
--- a/platform/marvell-arm64/docker-syncd-mrvl-rpc/ptf_nn_agent.conf
+++ /dev/null
@@ -1,10 +0,0 @@
-[program:ptf_nn_agent]
-command=/usr/bin/python /opt/ptf_nn_agent.py --device-socket 1@tcp://0.0.0.0:10900 -i 1-3@Ethernet12 --set-iface-rcv-buffer=109430400
-process_name=ptf_nn_agent
-stdout_logfile=/tmp/ptf_nn_agent.out.log
-stderr_logfile=/tmp/ptf_nn_agent.err.log
-redirect_stderr=false
-autostart=true
-autorestart=true
-startsecs=1
-numprocs=1
diff --git a/platform/marvell-arm64/docker-syncd-mrvl.mk b/platform/marvell-arm64/docker-syncd-mrvl.mk
deleted file mode 100644
index 236f8a437..000000000
--- a/platform/marvell-arm64/docker-syncd-mrvl.mk
+++ /dev/null
@@ -1,16 +0,0 @@
-# docker image for mrvl syncd
-
-DOCKER_SYNCD_PLATFORM_CODE = mrvl
-include $(PLATFORM_PATH)/../template/docker-syncd-bullseye.mk
-
-$(DOCKER_SYNCD_BASE)_DEPENDS += $(SYNCD)
-
-$(DOCKER_SYNCD_BASE)_DBG_DEPENDS += $(SYNCD_DBG) \
-                                $(LIBSWSSCOMMON_DBG) \
-                                $(LIBSAIMETADATA_DBG) \
-                                $(LIBSAIREDIS_DBG)
-
-$(DOCKER_SYNCD_BASE)_VERSION = 1.0.0
-$(DOCKER_SYNCD_BASE)_PACKAGE_NAME = syncd
-
-#$(DOCKER_SYNCD_BASE)_RUN_OPT += -v /host/warmboot:/var/warmboot
diff --git a/platform/marvell-arm64/docker-syncd-mrvl/Dockerfile.j2 b/platform/marvell-arm64/docker-syncd-mrvl/Dockerfile.j2
deleted file mode 100755
index 84e3d5bde..000000000
--- a/platform/marvell-arm64/docker-syncd-mrvl/Dockerfile.j2
+++ /dev/null
@@ -1,37 +0,0 @@
-{% from "dockers/dockerfile-macros.j2" import install_debian_packages %}
-FROM docker-config-engine-bullseye-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}}
-
-ARG docker_container_name
-
-## Make apt-get non-interactive
-ENV DEBIAN_FRONTEND=noninteractive
-
-RUN apt-get update
-
-COPY \
-{% for deb in docker_syncd_mrvl_debs.split(' ') -%}
-debs/{{ deb }}{{' '}}
-{%- endfor -%}
-debs/
-
-RUN apt-get update \
- && apt-get -y install  \
-    net-tools           \
-    iputils-ping
-
-RUN apt-get -y install libpcap-dev libxml2-dev python-dev swig libsensors4-dev nfs-common
-
-RUN dpkg -i \
-{% for deb in docker_syncd_mrvl_debs.split(' ') -%}
-debs/{{ deb }}{{' '}}
-{%- endfor %}
-
-COPY ["supervisord.conf", "/etc/supervisor/conf.d/"]
-COPY ["files/supervisor-proc-exit-listener", "/usr/bin/"]
-COPY ["critical_processes", "/etc/supervisor/"]
-
-## Clean up
-RUN apt-get clean -y; apt-get autoclean -y; apt-get autoremove -y
-RUN rm -rf /debs
-
-ENTRYPOINT ["/usr/local/bin/supervisord"]
diff --git a/platform/marvell-arm64/docker-syncd-mrvl/critical_processes b/platform/marvell-arm64/docker-syncd-mrvl/critical_processes
deleted file mode 100644
index bdd6903c5..000000000
--- a/platform/marvell-arm64/docker-syncd-mrvl/critical_processes
+++ /dev/null
@@ -1 +0,0 @@
-program:syncd
diff --git a/platform/marvell-arm64/docker-syncd-mrvl/supervisord.conf b/platform/marvell-arm64/docker-syncd-mrvl/supervisord.conf
deleted file mode 100644
index 62a283872..000000000
--- a/platform/marvell-arm64/docker-syncd-mrvl/supervisord.conf
+++ /dev/null
@@ -1,39 +0,0 @@
-[supervisord]
-logfile_maxbytes=1MB
-logfile_backups=2
-nodaemon=true
-
-[eventlistener:dependent-startup]
-command=python3 -m supervisord_dependent_startup
-autostart=true
-autorestart=unexpected
-startretries=0
-exitcodes=0,3
-events=PROCESS_STATE
-buffer_size=1024
-
-[eventlistener:supervisor-proc-exit-listener]
-command=python3 /usr/bin/supervisor-proc-exit-listener --container-name syncd
-events=PROCESS_STATE_EXITED,PROCESS_STATE_RUNNING
-autostart=true
-autorestart=unexpected
-buffer_size=1024
-
-[program:rsyslogd]
-command=/usr/sbin/rsyslogd -n -iNONE
-priority=1
-autostart=false
-autorestart=false
-stdout_logfile=syslog
-stderr_logfile=syslog
-dependent_startup=true
-
-[program:syncd]
-command=/usr/bin/syncd_start.sh
-priority=3
-autostart=false
-autorestart=false
-stdout_logfile=syslog
-stderr_logfile=syslog
-dependent_startup=true
-dependent_startup_wait_for=rsyslogd:running
diff --git a/platform/marvell-arm64/docker-syncd-mrvl/syncd.sh b/platform/marvell-arm64/docker-syncd-mrvl/syncd.sh
deleted file mode 100755
index 993cf100f..000000000
--- a/platform/marvell-arm64/docker-syncd-mrvl/syncd.sh
+++ /dev/null
@@ -1,12 +0,0 @@
-#!/usr/bin/env bash
-
-function clean_up {
-    service syncd stop
-    exit
-}
-
-trap clean_up SIGTERM SIGKILL
-
-service syncd start
-
-read
diff --git a/platform/marvell-arm64/libsaithrift-dev.mk b/platform/marvell-arm64/libsaithrift-dev.mk
deleted file mode 100644
index e1c3da156..000000000
--- a/platform/marvell-arm64/libsaithrift-dev.mk
+++ /dev/null
@@ -1,20 +0,0 @@
-# libsaithrift-dev package
-
-SAI_VER = 0.9.4
-
-LIBSAITHRIFT_DEV = libsaithrift-dev_$(SAI_VER)_$(CONFIGURED_ARCH).deb
-$(LIBSAITHRIFT_DEV)_SRC_PATH = $(SRC_PATH)/sonic-sairedis/SAI
-$(LIBSAITHRIFT_DEV)_DEPENDS += $(LIBTHRIFT) $(LIBTHRIFT_DEV) $(PYTHON_THRIFT) $(THRIFT_COMPILER) $(MRVL_FPA) $(MRVL_SAI)
-$(LIBSAITHRIFT_DEV)_RDEPENDS += $(LIBTHRIFT) $(MRVL_SAI)
-SONIC_DPKG_DEBS += $(LIBSAITHRIFT_DEV)
-
-PYTHON_SAITHRIFT = python-saithrift_$(SAI_VER)_$(CONFIGURED_ARCH).deb
-$(eval $(call add_extra_package,$(LIBSAITHRIFT_DEV),$(PYTHON_SAITHRIFT)))
-
-SAISERVER = saiserver_$(SAI_VER)_$(CONFIGURED_ARCH).deb
-$(SAISERVER)_RDEPENDS += $(LIBTHRIFT) $(MRVL_SAI)
-$(eval $(call add_extra_package,$(LIBSAITHRIFT_DEV),$(SAISERVER)))
-
-SAISERVER_DBG = saiserver-dbg_$(SAI_VER)_$(CONFIGURED_ARCH).deb
-$(SAISERVER_DBG)_RDEPENDS += $(SAISERVER)
-$(eval $(call add_extra_package,$(LIBSAITHRIFT_DEV),$(SAISERVER_DBG)))
diff --git a/platform/marvell-arm64/mrvl-prestera b/platform/marvell-arm64/mrvl-prestera
deleted file mode 160000
index 8f9bcdaf5..000000000
--- a/platform/marvell-arm64/mrvl-prestera
+++ /dev/null
@@ -1 +0,0 @@
-Subproject commit 8f9bcdaf58406c71a9038aea834fc8255de59848
diff --git a/platform/marvell-arm64/one-image.mk b/platform/marvell-arm64/one-image.mk
deleted file mode 100644
index 1aa36f2b1..000000000
--- a/platform/marvell-arm64/one-image.mk
+++ /dev/null
@@ -1,17 +0,0 @@
-# sonic marvell one image installer
-
-SONIC_ONE_IMAGE = sonic-marvell-arm64.bin
-$(SONIC_ONE_IMAGE)_MACHINE = marvell-arm64
-$(SONIC_ONE_IMAGE)_IMAGE_TYPE = onie
-$(SONIC_ONE_IMAGE)_INSTALLS += $(SYSTEMD_SONIC_GENERATOR)
-$(SONIC_ONE_IMAGE)_INSTALLS += $(MRVL_PRESTERA_DEB)
-$(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(NOKIA_7215_PLATFORM) \
-				$(AC5X_RD98DX35xx_PLATFORM) \
-				$(AC5X_RD98DX35xxCN9131_PLATFORM)
-ifeq ($(INSTALL_DEBUG_TOOLS),y)
-$(SONIC_ONE_IMAGE)_DOCKERS += $(SONIC_INSTALL_DOCKER_DBG_IMAGES)
-$(SONIC_ONE_IMAGE)_DOCKERS += $(filter-out $(patsubst %-$(DBG_IMAGE_MARK).gz,%.gz, $(SONIC_INSTALL_DOCKER_DBG_IMAGES)), $(SONIC_INSTALL_DOCKER_IMAGES))
-else
-$(SONIC_ONE_IMAGE)_DOCKERS = $(SONIC_INSTALL_DOCKER_IMAGES)
-endif
-SONIC_INSTALLERS += $(SONIC_ONE_IMAGE)
diff --git a/platform/marvell-arm64/rules.mk b/platform/marvell-arm64/rules.mk
deleted file mode 100644
index 882a9451e..000000000
--- a/platform/marvell-arm64/rules.mk
+++ /dev/null
@@ -1,26 +0,0 @@
-#include $(PLATFORM_PATH)/sdk.mk
-include $(PLATFORM_PATH)/sai.mk
-include $(PLATFORM_PATH)/docker-syncd-mrvl.mk
-include $(PLATFORM_PATH)/docker-syncd-mrvl-rpc.mk
-include $(PLATFORM_PATH)/docker-saiserver-mrvl.mk
-include $(PLATFORM_PATH)/libsaithrift-dev.mk
-include $(PLATFORM_PATH)/one-image.mk
-include $(PLATFORM_PATH)/mrvl-prestera.mk
-include $(PLATFORM_PATH)/platform-nokia.mk
-include $(PLATFORM_PATH)/platform-marvell.mk
-
-SONIC_ALL += $(SONIC_ONE_IMAGE) \
-             $(DOCKER_FPM) 	\
-             $(DOCKER_PTF_MRVL) \
-             $(DOCKER_SYNCD_MRVL_RPC)
-
-# Inject mrvl sai into syncd
-$(SYNCD)_DEPENDS += $(MRVL_SAI)
-$(SYNCD)_UNINSTALLS += $(MRVL_SAI)
-
-ifeq ($(ENABLE_SYNCD_RPC),y)
-$(SYNCD)_DEPENDS += $(LIBSAITHRIFT_DEV)
-endif
-
-# Runtime dependency on mrvl sai is set only for syncd
-$(SYNCD)_RDEPENDS += $(MRVL_SAI)
diff --git a/platform/marvell-arm64/sai.mk b/platform/marvell-arm64/sai.mk
deleted file mode 100644
index fe4f91b83..000000000
--- a/platform/marvell-arm64/sai.mk
+++ /dev/null
@@ -1,9 +0,0 @@
-# Marvell SAI
-
-export MRVL_SAI_VERSION = 1.12.0-2
-export MRVL_SAI = mrvllibsai_$(MRVL_SAI_VERSION)_$(PLATFORM_ARCH).deb
-
-$(MRVL_SAI)_SRC_PATH = $(PLATFORM_PATH)/sai
-$(eval $(call add_conflict_package,$(MRVL_SAI),$(LIBSAIVS_DEV)))
-
-SONIC_MAKE_DEBS += $(MRVL_SAI)
diff --git a/platform/marvell-arm64/sai/Makefile b/platform/marvell-arm64/sai/Makefile
deleted file mode 100644
index 07048e014..000000000
--- a/platform/marvell-arm64/sai/Makefile
+++ /dev/null
@@ -1,9 +0,0 @@
-.ONESHELL:
-SHELL = /bin/bash
-.SHELLFLAGS += -e
-
-MRVL_SAI_URL = https://github.com/Marvell-switching/sonic-marvell-binaries/raw/master/arm64/sai-plugin/$(MRVL_SAI)
-
-$(addprefix $(DEST)/, $(MRVL_SAI)): $(DEST)/% :
-	# get deb package
-	wget -O $(DEST)/$(MRVL_SAI) $(MRVL_SAI_URL) || rm -f $(DEST)/$(MRVL_SAI)
diff --git a/platform/marvell-arm64/sonic-platform-marvell b/platform/marvell-arm64/sonic-platform-marvell
deleted file mode 160000
index f6b5e6cc8..000000000
--- a/platform/marvell-arm64/sonic-platform-marvell
+++ /dev/null
@@ -1 +0,0 @@
-Subproject commit f6b5e6cc8f382275e9d1647321ecd27e87038b90
diff --git a/platform/marvell-arm64/sonic-platform-nokia/debian/sonic-platform-nokia-7215.install b/platform/marvell-arm64/sonic-platform-nokia/debian/sonic-platform-nokia-7215.install
deleted file mode 100644
index efa3c696b..000000000
--- a/platform/marvell-arm64/sonic-platform-nokia/debian/sonic-platform-nokia-7215.install
+++ /dev/null
@@ -1,6 +0,0 @@
-7215/scripts/nokia-7215-init.sh usr/local/bin
-7215/scripts/cpu_wdt.py  usr/local/bin
-7215/service/nokia-7215init.service  etc/systemd/system
-7215/service/cpu_wdt.service  etc/systemd/system
-7215/sonic_platform-1.0-py3-none-any.whl usr/share/sonic/device/arm64-nokia_ixs7215_52xb-r0
-../mrvl-prestera/platform/arm64/ac5x/* /
diff --git a/platform/marvell-armhf/docker-saiserver-mrvl.dep b/platform/marvell-armhf/docker-saiserver-mrvl.dep
deleted file mode 100644
index 73851b9bf..000000000
--- a/platform/marvell-armhf/docker-saiserver-mrvl.dep
+++ /dev/null
@@ -1,8 +0,0 @@
-DPATH       := $($(DOCKER_SAISERVER_MRVL)_PATH)
-DEP_FILES   := $(SONIC_COMMON_FILES_LIST) platform/marvell-armhf/docker-saiserver-mrvl.mk platform/marvell-armhf/docker-saiserver-mrvl.dep
-DEP_FILES   += $(SONIC_COMMON_BASE_FILES_LIST)
-DEP_FILES   += $(shell git ls-files $(DPATH))
-
-$(DOCKER_SAISERVER_MRVL)_CACHE_MODE  := GIT_CONTENT_SHA 
-$(DOCKER_SAISERVER_MRVL)_DEP_FLAGS   := $(SONIC_COMMON_FLAGS_LIST)
-$(DOCKER_SAISERVER_MRVL)_DEP_FILES   := $(DEP_FILES)
diff --git a/platform/marvell-armhf/docker-saiserver-mrvl.mk b/platform/marvell-armhf/docker-saiserver-mrvl.mk
deleted file mode 100644
index 963335b57..000000000
--- a/platform/marvell-armhf/docker-saiserver-mrvl.mk
+++ /dev/null
@@ -1,15 +0,0 @@
-# docker image for mrvl saiserver
-
-DOCKER_SAISERVER_MRVL = docker-saiserver-mrvl.gz
-$(DOCKER_SAISERVER_MRVL)_PATH = $(PLATFORM_PATH)/docker-saiserver-mrvl
-$(DOCKER_SAISERVER_MRVL)_DEPENDS += $(SAISERVER)
-$(DOCKER_SAISERVER_MRVL)_FILES += $(DSSERVE) $(BCMCMD)
-$(DOCKER_SAISERVER_MRVL)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE_BULLSEYE)
-SONIC_DOCKER_IMAGES += $(DOCKER_SAISERVER_MRVL)
-
-$(DOCKER_SAISERVER_MRVL)_CONTAINER_NAME = saiserver
-$(DOCKER_SAISERVER_MRVL)_RUN_OPT += --privileged -t
-$(DOCKER_SAISERVER_MRVL)_RUN_OPT += -v /host/machine.conf:/etc/machine.conf
-$(DOCKER_SAISERVER_MRVL)_RUN_OPT += -v /var/run/docker-saiserver:/var/run/sswsyncd
-$(DOCKER_SAISERVER_MRVL)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro
-$(DOCKER_SAISERVER_MRVL)_RUN_OPT += -v /host/warmboot:/var/warmboot
diff --git a/platform/marvell-armhf/docker-syncd-mrvl-rpc.dep b/platform/marvell-armhf/docker-syncd-mrvl-rpc.dep
deleted file mode 100644
index 957d3f9e7..000000000
--- a/platform/marvell-armhf/docker-syncd-mrvl-rpc.dep
+++ /dev/null
@@ -1,8 +0,0 @@
-DPATH       := $($(DOCKER_SYNCD_MRVL_RPC)_PATH)
-DEP_FILES   := $(SONIC_COMMON_FILES_LIST) $(PLATFORM_PATH)/docker-syncd-mrvl-rpc.mk $(PLATFORM_PATH)/docker-syncd-mrvl-rpc.dep   
-DEP_FILES   += $(SONIC_COMMON_BASE_FILES_LIST)
-DEP_FILES   += $(shell git ls-files $(DPATH))
-
-$(DOCKER_SYNCD_MRVL_RPC)_CACHE_MODE  := GIT_CONTENT_SHA 
-$(DOCKER_SYNCD_MRVL_RPC)_DEP_FLAGS   := $(SONIC_COMMON_FLAGS_LIST)
-$(DOCKER_SYNCD_MRVL_RPC)_DEP_FILES   := $(DEP_FILES)
diff --git a/platform/marvell-armhf/docker-syncd-mrvl-rpc.mk b/platform/marvell-armhf/docker-syncd-mrvl-rpc.mk
deleted file mode 100644
index 20698efdf..000000000
--- a/platform/marvell-armhf/docker-syncd-mrvl-rpc.mk
+++ /dev/null
@@ -1,25 +0,0 @@
-# docker image for mrvl syncd with rpc
-
-DOCKER_SYNCD_MRVL_RPC = docker-syncd-mrvl-rpc.gz
-$(DOCKER_SYNCD_MRVL_RPC)_PATH = $(PLATFORM_PATH)/docker-syncd-mrvl-rpc
-$(DOCKER_SYNCD_MRVL_RPC)_DEPENDS += $(SYNCD_RPC) $(LIBTHRIFT) $(PTF)
-$(DOCKER_SYNCD_MRVL_RPC)_FILES += $(SUPERVISOR_PROC_EXIT_LISTENER_SCRIPT)
-ifeq ($(INSTALL_DEBUG_TOOLS), y)
-$(DOCKER_SYNCD_MRVL_RPC)_DEPENDS += $(SYNCD_RPC_DBG) \
-                                    $(LIBSWSSCOMMON_DBG) \
-                                    $(LIBSAIMETADATA_DBG) \
-                                    $(LIBSAIREDIS_DBG)
-endif
-$(DOCKER_SYNCD_MRVL_RPC)_LOAD_DOCKERS += $(DOCKER_SYNCD_BASE)
-SONIC_DOCKER_IMAGES += $(DOCKER_SYNCD_MRVL_RPC)
-ifeq ($(ENABLE_SYNCD_RPC),y)
-SONIC_INSTALL_DOCKER_IMAGES += $(DOCKER_SYNCD_MRVL_RPC)
-endif
-
-$(DOCKER_SYNCD_MRVL_RPC)_CONTAINER_NAME = syncd
-$(DOCKER_SYNCD_MRVL_RPC)_VERSION = 1.0.0+rpc
-$(DOCKER_SYNCD_MRVL_RPC)_PACKAGE_NAME = syncd
-$(DOCKER_SYNCD_MRVL_RPC)_RUN_OPT += --privileged -t
-$(DOCKER_SYNCD_MRVL_RPC)_RUN_OPT += -v /host/machine.conf:/etc/machine.conf
-$(DOCKER_SYNCD_MRVL_RPC)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro
-$(DOCKER_SYNCD_MRVL_RPC)_RUN_OPT += -v /host/warmboot:/var/warmboot
diff --git a/platform/marvell-armhf/docker-syncd-mrvl-rpc/99-syncd.conf b/platform/marvell-armhf/docker-syncd-mrvl-rpc/99-syncd.conf
deleted file mode 100644
index 3fabe208d..000000000
--- a/platform/marvell-armhf/docker-syncd-mrvl-rpc/99-syncd.conf
+++ /dev/null
@@ -1 +0,0 @@
-sysctl -w net.core.rmem_max=509430500
diff --git a/platform/marvell-armhf/docker-syncd-mrvl-rpc/Dockerfile.j2 b/platform/marvell-armhf/docker-syncd-mrvl-rpc/Dockerfile.j2
deleted file mode 100644
index b8bd6f64e..000000000
--- a/platform/marvell-armhf/docker-syncd-mrvl-rpc/Dockerfile.j2
+++ /dev/null
@@ -1,56 +0,0 @@
-FROM docker-syncd-mrvl-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}}
-
-## Make apt-get non-interactive
-ENV DEBIAN_FRONTEND=noninteractive
-
-COPY \
-{% for deb in docker_syncd_mrvl_rpc_debs.split(' ') -%}
-debs/{{ deb }}{{' '}}
-{%- endfor -%}
-debs/
-
-RUN apt-get purge -y syncd
-
-## Pre-install the fundamental packages
-RUN apt-get update \
- && apt-get -y install  \
-    net-tools           \
-    python3-pip         \
-    python-setuptools   \
-    build-essential     \
-    libssl-dev          \
-    libffi-dev          \
-    python-dev          \
-    wget                \
-    cmake               \
-    libqt5core5a        \
-    libqt5network5      \
-    libboost-atomic1.74.0
-
-RUN dpkg_apt() { [ -f $1 ] && { dpkg -i $1 || apt-get -y install -f; } || return 1; } ; \
-{% for deb in docker_syncd_mrvl_rpc_debs.split(' ') -%}
-dpkg_apt debs/{{ deb }}{{'; '}}
-{%- endfor %}
-
-RUN wget https://github.com/nanomsg/nanomsg/archive/1.0.0.tar.gz \
- && tar xvfz 1.0.0.tar.gz \
- && cd nanomsg-1.0.0    \
- && mkdir -p build      \
- && cmake .             \
- && make install        \
- && ldconfig            \
- && cd ..               \
- && rm -fr nanomsg-1.0.0 \
- && rm -f 1.0.0.tar.gz  \
- && pip2 install cffi==1.7.0    \
- && pip2 install --upgrade cffi==1.7.0 \
- && pip2 install nnpy    \
- && mkdir -p /opt       \
- && cd /opt             \
- && wget https://raw.githubusercontent.com/p4lang/ptf/master/ptf_nn/ptf_nn_agent.py \
- && apt-get clean -y; apt-get autoclean -y; apt-get autoremove -y \
- && rm -rf /root/deps
-
-COPY ["ptf_nn_agent.conf", "/etc/supervisor/conf.d/"]
-
-ENTRYPOINT ["/usr/local/bin/supervisord"]
diff --git a/platform/marvell-armhf/docker-syncd-mrvl-rpc/ptf_nn_agent.conf b/platform/marvell-armhf/docker-syncd-mrvl-rpc/ptf_nn_agent.conf
deleted file mode 100644
index fa1ed0eb1..000000000
--- a/platform/marvell-armhf/docker-syncd-mrvl-rpc/ptf_nn_agent.conf
+++ /dev/null
@@ -1,10 +0,0 @@
-[program:ptf_nn_agent]
-command=/usr/bin/python /opt/ptf_nn_agent.py --device-socket 1@tcp://0.0.0.0:10900 -i 1-3@Ethernet12 --set-iface-rcv-buffer=109430400
-process_name=ptf_nn_agent
-stdout_logfile=/tmp/ptf_nn_agent.out.log
-stderr_logfile=/tmp/ptf_nn_agent.err.log
-redirect_stderr=false
-autostart=true
-autorestart=true
-startsecs=1
-numprocs=1
diff --git a/platform/marvell-armhf/docker-syncd-mrvl.dep b/platform/marvell-armhf/docker-syncd-mrvl.dep
deleted file mode 100644
index 2aaef3b50..000000000
--- a/platform/marvell-armhf/docker-syncd-mrvl.dep
+++ /dev/null
@@ -1,10 +0,0 @@
-DPATH       := $($(DOCKER_SYNCD_BASE)_PATH)
-DEP_FILES   := $(SONIC_COMMON_FILES_LIST) platform/marvell-armhf/docker-syncd-mrvl.mk platform/marvell-armhf/docker-syncd-mrvl.dep platform/marvell-armhf/sai.mk
-DEP_FILES   += $(SONIC_COMMON_BASE_FILES_LIST)
-DEP_FILES   += $(shell git ls-files $(DPATH))
-
-$(DOCKER_SYNCD_BASE)_CACHE_MODE  := GIT_CONTENT_SHA 
-$(DOCKER_SYNCD_BASE)_DEP_FLAGS   := $(SONIC_COMMON_FLAGS_LIST)
-$(DOCKER_SYNCD_BASE)_DEP_FILES   := $(DEP_FILES)
-
-$(eval $(call add_dbg_docker,$(DOCKER_SYNCD_BASE),$(DOCKER_SYNCD_BASE_DBG)))
diff --git a/platform/marvell-armhf/docker-syncd-mrvl.mk b/platform/marvell-armhf/docker-syncd-mrvl.mk
deleted file mode 100644
index 236f8a437..000000000
--- a/platform/marvell-armhf/docker-syncd-mrvl.mk
+++ /dev/null
@@ -1,16 +0,0 @@
-# docker image for mrvl syncd
-
-DOCKER_SYNCD_PLATFORM_CODE = mrvl
-include $(PLATFORM_PATH)/../template/docker-syncd-bullseye.mk
-
-$(DOCKER_SYNCD_BASE)_DEPENDS += $(SYNCD)
-
-$(DOCKER_SYNCD_BASE)_DBG_DEPENDS += $(SYNCD_DBG) \
-                                $(LIBSWSSCOMMON_DBG) \
-                                $(LIBSAIMETADATA_DBG) \
-                                $(LIBSAIREDIS_DBG)
-
-$(DOCKER_SYNCD_BASE)_VERSION = 1.0.0
-$(DOCKER_SYNCD_BASE)_PACKAGE_NAME = syncd
-
-#$(DOCKER_SYNCD_BASE)_RUN_OPT += -v /host/warmboot:/var/warmboot
diff --git a/platform/marvell-armhf/docker-syncd-mrvl/Dockerfile.j2 b/platform/marvell-armhf/docker-syncd-mrvl/Dockerfile.j2
deleted file mode 100755
index 84e3d5bde..000000000
--- a/platform/marvell-armhf/docker-syncd-mrvl/Dockerfile.j2
+++ /dev/null
@@ -1,37 +0,0 @@
-{% from "dockers/dockerfile-macros.j2" import install_debian_packages %}
-FROM docker-config-engine-bullseye-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}}
-
-ARG docker_container_name
-
-## Make apt-get non-interactive
-ENV DEBIAN_FRONTEND=noninteractive
-
-RUN apt-get update
-
-COPY \
-{% for deb in docker_syncd_mrvl_debs.split(' ') -%}
-debs/{{ deb }}{{' '}}
-{%- endfor -%}
-debs/
-
-RUN apt-get update \
- && apt-get -y install  \
-    net-tools           \
-    iputils-ping
-
-RUN apt-get -y install libpcap-dev libxml2-dev python-dev swig libsensors4-dev nfs-common
-
-RUN dpkg -i \
-{% for deb in docker_syncd_mrvl_debs.split(' ') -%}
-debs/{{ deb }}{{' '}}
-{%- endfor %}
-
-COPY ["supervisord.conf", "/etc/supervisor/conf.d/"]
-COPY ["files/supervisor-proc-exit-listener", "/usr/bin/"]
-COPY ["critical_processes", "/etc/supervisor/"]
-
-## Clean up
-RUN apt-get clean -y; apt-get autoclean -y; apt-get autoremove -y
-RUN rm -rf /debs
-
-ENTRYPOINT ["/usr/local/bin/supervisord"]
diff --git a/platform/marvell-armhf/docker-syncd-mrvl/critical_processes b/platform/marvell-armhf/docker-syncd-mrvl/critical_processes
deleted file mode 100644
index bdd6903c5..000000000
--- a/platform/marvell-armhf/docker-syncd-mrvl/critical_processes
+++ /dev/null
@@ -1 +0,0 @@
-program:syncd
diff --git a/platform/marvell-armhf/docker-syncd-mrvl/supervisord.conf b/platform/marvell-armhf/docker-syncd-mrvl/supervisord.conf
deleted file mode 100644
index 55f095d2b..000000000
--- a/platform/marvell-armhf/docker-syncd-mrvl/supervisord.conf
+++ /dev/null
@@ -1,39 +0,0 @@
-[supervisord]
-logfile_maxbytes=1MB
-logfile_backups=2
-nodaemon=true
-
-[eventlistener:dependent-startup]
-command=python3 -m supervisord_dependent_startup
-autostart=true
-autorestart=unexpected
-startretries=0
-exitcodes=0,3
-events=PROCESS_STATE
-buffer_size=1024
-
-[eventlistener:supervisor-proc-exit-listener]
-command=python3 /usr/bin/supervisor-proc-exit-listener --container-name syncd
-events=PROCESS_STATE_EXITED,PROCESS_STATE_RUNNING
-autostart=true
-autorestart=unexpected
-buffer_size=1024
-
-[program:rsyslogd]
-command=/usr/sbin/rsyslogd -n -iNONE
-priority=1
-autostart=false
-autorestart=false
-stdout_logfile=syslog
-stderr_logfile=syslog
-dependent_startup=true
-
-[program:syncd]
-command=/usr/bin/syncd_start.sh
-priority=2
-autostart=false
-autorestart=false
-stdout_logfile=syslog
-stderr_logfile=syslog
-dependent_startup=true
-dependent_startup_wait_for=rsyslogd:running
diff --git a/platform/marvell-armhf/libsaithrift-dev.dep b/platform/marvell-armhf/libsaithrift-dev.dep
deleted file mode 100644
index be9da37e8..000000000
--- a/platform/marvell-armhf/libsaithrift-dev.dep
+++ /dev/null
@@ -1,11 +0,0 @@
-SPATH       := $($(LIBSAITHRIFT_DEV)_SRC_PATH)
-DEP_FILES   := $(SONIC_COMMON_FILES_LIST) platform/marvell-armhf/libsaithrift-dev.mk platform/marvell-armhf/libsaithrift-dev.dep   
-DEP_FILES   += $(SONIC_COMMON_BASE_FILES_LIST)
-SMDEP_PATHS := $(SPATH)  $(SPATH)/bm/behavioral-model  $(SPATH)/test/ptf  $(SPATH)/test/saithrift/ctypesgen
-$(foreach path, $(SMDEP_PATHS), $(eval $(path) :=$(filter-out $(SMDEP_PATHS),$(addprefix $(path)/, $(shell cd $(path) &&  git ls-files | grep -Ev " " )))))
-
-$(LIBSAITHRIFT_DEV)_CACHE_MODE  := GIT_CONTENT_SHA 
-$(LIBSAITHRIFT_DEV)_DEP_FLAGS   := $(SONIC_COMMON_FLAGS_LIST)
-$(LIBSAITHRIFT_DEV)_DEP_FILES   := $(DEP_FILES)
-$(LIBSAITHRIFT_DEV)_SMDEP_FILES := $(foreach path, $(SMDEP_PATHS), $($(path)))
-$(LIBSAITHRIFT_DEV)_SMDEP_PATHS := $(SMDEP_PATHS)
diff --git a/platform/marvell-armhf/libsaithrift-dev.mk b/platform/marvell-armhf/libsaithrift-dev.mk
deleted file mode 100644
index e1c3da156..000000000
--- a/platform/marvell-armhf/libsaithrift-dev.mk
+++ /dev/null
@@ -1,20 +0,0 @@
-# libsaithrift-dev package
-
-SAI_VER = 0.9.4
-
-LIBSAITHRIFT_DEV = libsaithrift-dev_$(SAI_VER)_$(CONFIGURED_ARCH).deb
-$(LIBSAITHRIFT_DEV)_SRC_PATH = $(SRC_PATH)/sonic-sairedis/SAI
-$(LIBSAITHRIFT_DEV)_DEPENDS += $(LIBTHRIFT) $(LIBTHRIFT_DEV) $(PYTHON_THRIFT) $(THRIFT_COMPILER) $(MRVL_FPA) $(MRVL_SAI)
-$(LIBSAITHRIFT_DEV)_RDEPENDS += $(LIBTHRIFT) $(MRVL_SAI)
-SONIC_DPKG_DEBS += $(LIBSAITHRIFT_DEV)
-
-PYTHON_SAITHRIFT = python-saithrift_$(SAI_VER)_$(CONFIGURED_ARCH).deb
-$(eval $(call add_extra_package,$(LIBSAITHRIFT_DEV),$(PYTHON_SAITHRIFT)))
-
-SAISERVER = saiserver_$(SAI_VER)_$(CONFIGURED_ARCH).deb
-$(SAISERVER)_RDEPENDS += $(LIBTHRIFT) $(MRVL_SAI)
-$(eval $(call add_extra_package,$(LIBSAITHRIFT_DEV),$(SAISERVER)))
-
-SAISERVER_DBG = saiserver-dbg_$(SAI_VER)_$(CONFIGURED_ARCH).deb
-$(SAISERVER_DBG)_RDEPENDS += $(SAISERVER)
-$(eval $(call add_extra_package,$(LIBSAITHRIFT_DEV),$(SAISERVER_DBG)))
diff --git a/platform/marvell-armhf/one-image.dep b/platform/marvell-armhf/one-image.dep
deleted file mode 100644
index 154112a82..000000000
--- a/platform/marvell-armhf/one-image.dep
+++ /dev/null
@@ -1 +0,0 @@
-$(SONIC_ONE_IMAGE)_CACHE_MODE  := none
diff --git a/platform/marvell-armhf/one-image.mk b/platform/marvell-armhf/one-image.mk
deleted file mode 100644
index b72b55348..000000000
--- a/platform/marvell-armhf/one-image.mk
+++ /dev/null
@@ -1,16 +0,0 @@
-# sonic marvell one image installer
-
-SONIC_ONE_IMAGE = sonic-marvell-armhf.bin
-$(SONIC_ONE_IMAGE)_MACHINE = marvell-armhf
-$(SONIC_ONE_IMAGE)_IMAGE_TYPE = onie
-$(SONIC_ONE_IMAGE)_INSTALLS += $(SYSTEMD_SONIC_GENERATOR)
-$(SONIC_ONE_IMAGE)_INSTALLS += $(MRVL_PRESTERA_DEB)
-$(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(ET6448M_PLATFORM) \
-				$(NOKIA_7215_PLATFORM)
-ifeq ($(INSTALL_DEBUG_TOOLS),y)
-$(SONIC_ONE_IMAGE)_DOCKERS += $(SONIC_INSTALL_DOCKER_DBG_IMAGES)
-$(SONIC_ONE_IMAGE)_DOCKERS += $(filter-out $(patsubst %-$(DBG_IMAGE_MARK).gz,%.gz, $(SONIC_INSTALL_DOCKER_DBG_IMAGES)), $(SONIC_INSTALL_DOCKER_IMAGES))
-else
-$(SONIC_ONE_IMAGE)_DOCKERS = $(SONIC_INSTALL_DOCKER_IMAGES)
-endif
-SONIC_INSTALLERS += $(SONIC_ONE_IMAGE)
diff --git a/platform/marvell-armhf/platform-et6448m.dep b/platform/marvell-armhf/platform-et6448m.dep
deleted file mode 100644
index 5f7e41d1f..000000000
--- a/platform/marvell-armhf/platform-et6448m.dep
+++ /dev/null
@@ -1,8 +0,0 @@
-MPATH       := $($(ET6448M_PLATFORM)_SRC_PATH)
-DEP_FILES   := $(SONIC_COMMON_FILES_LIST) platform/marvell-armhf/platform-et6448m.mk platform/marvell-armhf/platform-et6448m.dep
-DEP_FILES   += $(SONIC_COMMON_BASE_FILES_LIST)
-DEP_FILES   += $(shell git ls-files $(MPATH))
-
-$(ET6448M_PLATFORM)_CACHE_MODE  := GIT_CONTENT_SHA 
-$(ET6448M_PLATFORM)_DEP_FLAGS   := $(SONIC_COMMON_FLAGS_LIST)
-$(ET6448M_PLATFORM)_DEP_FILES   := $(DEP_FILES)
diff --git a/platform/marvell-armhf/platform-et6448m.mk b/platform/marvell-armhf/platform-et6448m.mk
deleted file mode 100644
index 1f0ee201c..000000000
--- a/platform/marvell-armhf/platform-et6448m.mk
+++ /dev/null
@@ -1,8 +0,0 @@
-# ET6448M Platform
-
-ET6448M_VERSION=0.1
-ET6448M_PLATFORM = sonic-platform-et6448m_$(ET6448M_VERSION)_$(CONFIGURED_ARCH).deb
-$(ET6448M_PLATFORM)_SRC_PATH = $(PLATFORM_PATH)/sonic-platform-et6448m
-$(ET6448M_PLATFORM)_PLATFORM = armhf-marvell_et6448m_52x-r0
-SONIC_DPKG_DEBS += $(ET6448M_PLATFORM)
-
diff --git a/platform/marvell-armhf/platform-nokia.dep b/platform/marvell-armhf/platform-nokia.dep
deleted file mode 100644
index 752a2016b..000000000
--- a/platform/marvell-armhf/platform-nokia.dep
+++ /dev/null
@@ -1,8 +0,0 @@
-MPATH       := $($(NOKIA_7215_PLATFORM)_SRC_PATH)
-DEP_FILES   := $(SONIC_COMMON_FILES_LIST) platform/marvell-armhf/platform-nokia.mk platform/marvell-armhf/platform-nokia.dep
-DEP_FILES   += $(SONIC_COMMON_BASE_FILES_LIST)
-DEP_FILES   += $(shell git ls-files $(MPATH))
-
-$(NOKIA_7215_PLATFORM)_CACHE_MODE  := GIT_CONTENT_SHA 
-$(NOKIA_7215_PLATFORM)_DEP_FLAGS   := $(SONIC_COMMON_FLAGS_LIST)
-$(NOKIA_7215_PLATFORM)_DEP_FILES   := $(DEP_FILES)
diff --git a/platform/marvell-armhf/platform-nokia.mk b/platform/marvell-armhf/platform-nokia.mk
deleted file mode 100644
index e8d6d106d..000000000
--- a/platform/marvell-armhf/platform-nokia.mk
+++ /dev/null
@@ -1,10 +0,0 @@
-# Nokia Platform
-
-NOKIA_7215_PLATFORM_VERSION = 1.0
-export NOKIA_7215_PLATFORM_VERSION
-
-NOKIA_7215_PLATFORM = sonic-platform-nokia-7215_$(NOKIA_7215_PLATFORM_VERSION)_$(CONFIGURED_ARCH).deb
-$(NOKIA_7215_PLATFORM)_SRC_PATH = $(PLATFORM_PATH)/sonic-platform-nokia
-$(NOKIA_7215_PLATFORM)_PLATFORM = armhf-nokia_ixs7215_52x-r0
-SONIC_DPKG_DEBS += $(NOKIA_7215_PLATFORM)
-
diff --git a/platform/marvell-armhf/prestera.dep b/platform/marvell-armhf/prestera.dep
deleted file mode 100644
index 4fd2883b1..000000000
--- a/platform/marvell-armhf/prestera.dep
+++ /dev/null
@@ -1,8 +0,0 @@
-MPATH       := $($(MRVL_PRESTERA_DEB)_SRC_PATH)
-DEP_FILES   := $(SONIC_COMMON_FILES_LIST) platform/marvell-armhf/prestera.mk platform/marvell-armhf/prestera.dep
-DEP_FILES   += $(SONIC_COMMON_BASE_FILES_LIST)
-DEP_FILES   += $(shell git ls-files $(MPATH))
-
-$(MRVL_PRESTERA_DEB)_CACHE_MODE  := GIT_CONTENT_SHA 
-$(MRVL_PRESTERA_DEB)_DEP_FLAGS   := $(SONIC_COMMON_FLAGS_LIST)
-$(MRVL_PRESTERA_DEB)_DEP_FILES   := $(DEP_FILES)
diff --git a/platform/marvell-armhf/prestera.mk b/platform/marvell-armhf/prestera.mk
deleted file mode 100644
index 50f44804f..000000000
--- a/platform/marvell-armhf/prestera.mk
+++ /dev/null
@@ -1,11 +0,0 @@
-# Marvell Prestera
-
-export MRVL_PRESTERA_VER = 1.0
-export MRVL_PRESTERA = mrvlprestera_$(MRVL_PRESTERA_VER)_$(PLATFORM_ARCH)
-export MRVL_PRESTERA_DEB = $(MRVL_PRESTERA).deb
-export MRVL_PRESTERA_SRC_URL = https://github.com/Marvell-switching/mrvl-prestera.git
-export MRVL_PRESTERA_SRC_TAG = MRVL_PRESTERA_DRIVER_1.8
-
-$(MRVL_PRESTERA_DEB)_SRC_PATH = $(PLATFORM_PATH)/prestera
-$(MRVL_PRESTERA_DEB)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON)
-SONIC_DPKG_DEBS += $(MRVL_PRESTERA_DEB)
diff --git a/platform/marvell-armhf/prestera/debian/changelog b/platform/marvell-armhf/prestera/debian/changelog
deleted file mode 100644
index ab8de1dfa..000000000
--- a/platform/marvell-armhf/prestera/debian/changelog
+++ /dev/null
@@ -1,5 +0,0 @@
-mrvlprestera (1.0) unstable; urgency=low
-
-  * Prestera switch driver
-
- -- Marvell <arheneus@marvell.com>  Fri, 19 Feb 2021 10:39:18 +0800
diff --git a/platform/marvell-armhf/prestera/debian/compat b/platform/marvell-armhf/prestera/debian/compat
deleted file mode 100644
index ec635144f..000000000
--- a/platform/marvell-armhf/prestera/debian/compat
+++ /dev/null
@@ -1 +0,0 @@
-9
diff --git a/platform/marvell-armhf/prestera/debian/control b/platform/marvell-armhf/prestera/debian/control
deleted file mode 100755
index 51cb0579a..000000000
--- a/platform/marvell-armhf/prestera/debian/control
+++ /dev/null
@@ -1,15 +0,0 @@
-Source: mrvlprestera
-Section: unknown
-Priority: optional
-Maintainer: Marvell <arheneus@marvell.com>
-Build-Depends: debhelper (>=9)
-Standards-Version: 3.9.6
-Homepage: <insert the upstream URL, if relevant>
-#Vcs-Git: git://anonscm.debian.org/collab-maint/mrvlprestera.git
-#Vcs-Browser: https://anonscm.debian.org/cgit/collab-maint/mrvlprestera.git
-
-Package: mrvlprestera
-Architecture: armhf
-Homepage: <insert the upstream URL, if relevant>
-Description: 
-	kernel modules for prestera switch driver 
diff --git a/platform/marvell-armhf/prestera/debian/mrvlprestera.install.template b/platform/marvell-armhf/prestera/debian/mrvlprestera.install.template
deleted file mode 100644
index 70a9655dd..000000000
--- a/platform/marvell-armhf/prestera/debian/mrvlprestera.install.template
+++ /dev/null
@@ -1,2 +0,0 @@
-mrvl-prestera/drivers/armhf/cpssEnabler/linuxNoKernelModule/drivers/mvcpss.ko /lib/modules/KVERSION/kernel/extra
-mrvl-prestera/platform/armhf/*	/
diff --git a/platform/marvell-armhf/prestera/debian/rules b/platform/marvell-armhf/prestera/debian/rules
deleted file mode 100755
index aab9a1bcd..000000000
--- a/platform/marvell-armhf/prestera/debian/rules
+++ /dev/null
@@ -1,56 +0,0 @@
-#!/usr/bin/make -f
-
-include /usr/share/dpkg/pkg-info.mk
-
-PACKAGE_PRE_NAME := mrvlprestera
-ifneq ($(CROSS_BUILD_ENVIRON), y)
-KVERSION   ?= $(shell uname -r)
-endif
-KERNEL_SRC :=  /lib/modules/$(KVERSION)
-MOD_SRC_DIR:= $(shell pwd)
-MODULE_DIR := mrvl-prestera/drivers/armhf/cpssEnabler/linuxNoKernelModule/drivers
-
-%:
-	dh $@ --with systemd,python3 --buildsystem=pybuild
-
-clean:
-	dh_testdir
-	dh_testroot
-	dh_clean
-
-build:
-	# get sources
-	rm -rf mrvl-prestera || true
-	git clone ${MRVL_PRESTERA_SRC_URL}
-	cd mrvl-prestera && git checkout ${MRVL_PRESTERA_SRC_TAG} && cd ..
-	sed "s/KVERSION/${KVERSION}/g" /sonic/platform/marvell-armhf/prestera/debian/mrvlprestera.install.template > /sonic/platform/marvell-armhf/prestera/debian/mrvlprestera.install
-
-	make modules -C $(KERNEL_SRC)/build M=$(MOD_SRC_DIR)/$(MODULE_DIR)/ CONFIG_KM_MVPCI=y CONFIG_KM_MVDMA=y CONFIG_KM_MVINT=y
-
-binary: binary-arch binary-indep
-	# Nothing to do
-
-binary-arch: 
-	# Nothing to do
-
-binary-indep:
-	dh_testdir
-	dh_installdirs
-
-	# Resuming debhelper scripts
-	dh_testroot
-	dh_install
-	dh_installchangelogs
-	dh_installdocs
-	dh_systemd_enable
-	dh_installinit
-	dh_systemd_start
-	dh_link
-	dh_fixperms
-	dh_compress
-	dh_strip
-	dh_installdeb
-	dh_gencontrol
-	dh_md5sums
-	dh_builddeb
-.PHONY: build binary binary-arch binary-indep clean
diff --git a/platform/marvell-armhf/rules.dep b/platform/marvell-armhf/rules.dep
deleted file mode 100644
index 427219b35..000000000
--- a/platform/marvell-armhf/rules.dep
+++ /dev/null
@@ -1,9 +0,0 @@
-include $(PLATFORM_PATH)/sai.dep
-include $(PLATFORM_PATH)/prestera.dep
-include $(PLATFORM_PATH)/docker-syncd-mrvl.dep
-include $(PLATFORM_PATH)/docker-syncd-mrvl-rpc.dep
-include $(PLATFORM_PATH)/docker-saiserver-mrvl.dep
-include $(PLATFORM_PATH)/libsaithrift-dev.dep
-include $(PLATFORM_PATH)/platform-et6448m.dep
-include $(PLATFORM_PATH)/platform-nokia.dep
-include $(PLATFORM_PATH)/one-image.dep
diff --git a/platform/marvell-armhf/rules.mk b/platform/marvell-armhf/rules.mk
deleted file mode 100644
index fd320e8ca..000000000
--- a/platform/marvell-armhf/rules.mk
+++ /dev/null
@@ -1,28 +0,0 @@
-#include $(PLATFORM_PATH)/sdk.mk
-include $(PLATFORM_PATH)/sai.mk
-include $(PLATFORM_PATH)/docker-syncd-mrvl.mk
-include $(PLATFORM_PATH)/docker-syncd-mrvl-rpc.mk
-include $(PLATFORM_PATH)/docker-saiserver-mrvl.mk
-include $(PLATFORM_PATH)/libsaithrift-dev.mk
-include $(PLATFORM_PATH)/one-image.mk
-include $(PLATFORM_PATH)/platform-et6448m.mk
-include $(PLATFORM_PATH)/platform-nokia.mk
-include $(PLATFORM_PATH)/prestera.mk
-
-ENABLE_SYNCD_RPC = ""
-INCLUDE_MGMT_FRAMEWORK = ""
-
-SONIC_ALL += $(SONIC_ONE_IMAGE) \
-             $(DOCKER_FPM)
-             #$(DOCKER_SYNCD_MRVL_RPC)
-
-# Inject mrvl sai into syncd
-$(SYNCD)_DEPENDS += $(MRVL_SAI)
-$(SYNCD)_UNINSTALLS += $(MRVL_SAI)
-
-ifeq ($(ENABLE_SYNCD_RPC),y)
-$(SYNCD)_DEPENDS += $(LIBSAITHRIFT_DEV)
-endif
-
-# Runtime dependency on mrvl sai is set only for syncd
-$(SYNCD)_RDEPENDS += $(MRVL_SAI)
diff --git a/platform/marvell-armhf/sai.dep b/platform/marvell-armhf/sai.dep
deleted file mode 100644
index d14927cdd..000000000
--- a/platform/marvell-armhf/sai.dep
+++ /dev/null
@@ -1,9 +0,0 @@
-SPATH       := $($(MRVL_SAI)_SRC_PATH)
-DEP_FILES   := $(SONIC_COMMON_FILES_LIST) platform/marvell-armhf/sai.mk platform/marvell-armhf/sai.dep
-DEP_FILES   += $(SONIC_COMMON_BASE_FILES_LIST)
-DEP_FILES	+= $(shell git ls-files $(SPATH))
-SMDEP_PATHS := $(SPATH)
-
-$(MRVL_SAI)_CACHE_MODE  := GIT_CONTENT_SHA
-$(MRVL_SAI)_DEP_FLAGS   := $(SONIC_COMMON_FLAGS_LIST)
-$(MRVL_SAI)_DEP_FILES   := $(DEP_FILES)
diff --git a/platform/marvell-armhf/sai.mk b/platform/marvell-armhf/sai.mk
deleted file mode 100644
index f7d8782ac..000000000
--- a/platform/marvell-armhf/sai.mk
+++ /dev/null
@@ -1,9 +0,0 @@
-# Marvell SAI
-
-export MRVL_SAI_VERSION = 1.13.0-1
-export MRVL_SAI = mrvllibsai_$(MRVL_SAI_VERSION)_$(PLATFORM_ARCH).deb
-
-$(MRVL_SAI)_SRC_PATH = $(PLATFORM_PATH)/sai
-$(eval $(call add_conflict_package,$(MRVL_SAI),$(LIBSAIVS_DEV)))
-
-SONIC_MAKE_DEBS += $(MRVL_SAI)
diff --git a/platform/marvell-armhf/sai/Makefile b/platform/marvell-armhf/sai/Makefile
deleted file mode 100644
index cf7850438..000000000
--- a/platform/marvell-armhf/sai/Makefile
+++ /dev/null
@@ -1,9 +0,0 @@
-.ONESHELL:
-SHELL = /bin/bash
-.SHELLFLAGS += -e
-
-MRVL_SAI_URL = https://github.com/Marvell-switching/sonic-marvell-binaries/raw/master/armhf/sai-plugin/$(MRVL_SAI)
-
-$(addprefix $(DEST)/, $(MRVL_SAI)): $(DEST)/% :
-	# get deb package
-	wget -O $(DEST)/$(MRVL_SAI) $(MRVL_SAI_URL)
diff --git a/platform/marvell-armhf/sonic-platform-et6448m/.gitignore b/platform/marvell-armhf/sonic-platform-et6448m/.gitignore
deleted file mode 100644
index 7f287d538..000000000
--- a/platform/marvell-armhf/sonic-platform-et6448m/.gitignore
+++ /dev/null
@@ -1,50 +0,0 @@
-# Object files
-*.o
-*.ko
-*.obj
-*.elf
-
-# Precompiled Headers
-*.gch
-*.pch
-
-# Libraries
-*.lib
-*.a
-*.la
-*.lo
-
-# Shared objects (inc. Windows DLLs)
-*.dll
-*.so
-*.so.*
-*.dylib
-
-# Executables
-*.exe
-*.out
-*.app
-*.i*86
-*.x86_64
-*.hex
-
-# Debug files
-*.dSYM/
-*.su
-
-# Kernel Module Compile Results
-*.mod*
-*.cmd
-*.o.d
-.tmp_versions/
-modules.order
-Module.symvers
-Mkfile.old
-dkms.conf
-
-# Debian packaging
-*.debhelper.log
-*.postinst.debhelper
-*.postrm.debhelper
-*.prerm.debhelper
-*.substvars
diff --git a/platform/marvell-armhf/sonic-platform-et6448m/debian/changelog b/platform/marvell-armhf/sonic-platform-et6448m/debian/changelog
deleted file mode 100755
index 98934823b..000000000
--- a/platform/marvell-armhf/sonic-platform-et6448m/debian/changelog
+++ /dev/null
@@ -1,5 +0,0 @@
-sonic-platform-et6448m (0.1) unstable; urgency=low
-
-  * Add support for ET6448M.
-
- -- Marvell <arheneus@marvell.com>  Mon, 11 Nov 2019 09:35:58 +0800
diff --git a/platform/marvell-armhf/sonic-platform-et6448m/debian/compat b/platform/marvell-armhf/sonic-platform-et6448m/debian/compat
deleted file mode 100644
index ec635144f..000000000
--- a/platform/marvell-armhf/sonic-platform-et6448m/debian/compat
+++ /dev/null
@@ -1 +0,0 @@
-9
diff --git a/platform/marvell-armhf/sonic-platform-et6448m/debian/control b/platform/marvell-armhf/sonic-platform-et6448m/debian/control
deleted file mode 100755
index 52c9593a1..000000000
--- a/platform/marvell-armhf/sonic-platform-et6448m/debian/control
+++ /dev/null
@@ -1,15 +0,0 @@
-Source: sonic-platform-et6448m
-Section: unknown
-Priority: optional
-Maintainer: Marvell <arheneus@marvell.com>
-Build-Depends: debhelper (>=9)
-Standards-Version: 3.9.6
-Homepage: <insert the upstream URL, if relevant>
-#Vcs-Git: git://anonscm.debian.org/collab-maint/sonic-platform-et6448m.git
-#Vcs-Browser: https://anonscm.debian.org/cgit/collab-maint/sonic-platform-et6448m.git
-
-Package: sonic-platform-et6448m
-Architecture: armhf
-Depends: ${misc:Depends}
-Description: <insert up to 60 chars description>
- <insert long description, indented with spaces>
diff --git a/platform/marvell-armhf/sonic-platform-et6448m/debian/install b/platform/marvell-armhf/sonic-platform-et6448m/debian/install
deleted file mode 100644
index ceb6090c4..000000000
--- a/platform/marvell-armhf/sonic-platform-et6448m/debian/install
+++ /dev/null
@@ -1,3 +0,0 @@
-et6448m_plt_setup.sh usr/sbin
-entropy.py etc/
-inband_mgmt.sh etc/
diff --git a/platform/marvell-armhf/sonic-platform-et6448m/debian/postinst b/platform/marvell-armhf/sonic-platform-et6448m/debian/postinst
deleted file mode 100644
index a3a727c72..000000000
--- a/platform/marvell-armhf/sonic-platform-et6448m/debian/postinst
+++ /dev/null
@@ -1,40 +0,0 @@
-#!/bin/sh
-# postinst script for sonic-platform-et6448m
-#
-# see: dh_installdeb(1)
-
-set -e
-
-# summary of how this script can be called:
-#        * <postinst> `configure' <most-recently-configured-version>
-#        * <old-postinst> `abort-upgrade' <new version>
-#        * <conflictor's-postinst> `abort-remove' `in-favour' <package>
-#          <new-version>
-#        * <postinst> `abort-remove'
-#        * <deconfigured's-postinst> `abort-deconfigure' `in-favour'
-#          <failed-install-package> <version> `removing'
-#          <conflicting-package> <version>
-# for details, see https://www.debian.org/doc/debian-policy/ or
-# the debian-policy package
-
-
-case "$1" in
-    configure)
-        sh /usr/sbin/et6448m_plt_setup.sh
-    ;;
-
-    abort-upgrade|abort-remove|abort-deconfigure)
-    ;;
-
-    *)
-        echo "postinst called with unknown argument \`$1'" >&2
-        exit 1
-    ;;
-esac
-
-# dh_installdeb will replace this with shell code automatically
-# generated by other debhelper scripts.
-
-#DEBHELPER#
-
-exit 0
diff --git a/platform/marvell-armhf/sonic-platform-et6448m/debian/rules b/platform/marvell-armhf/sonic-platform-et6448m/debian/rules
deleted file mode 100755
index 2f54c4710..000000000
--- a/platform/marvell-armhf/sonic-platform-et6448m/debian/rules
+++ /dev/null
@@ -1,25 +0,0 @@
-#!/usr/bin/make -f
-# See debhelper(7) (uncomment to enable)
-# output every command that modifies files on the build system.
-#export DH_VERBOSE = 1
-
-
-# see FEATURE AREAS in dpkg-buildflags(1)
-#export DEB_BUILD_MAINT_OPTIONS = hardening=+all
-
-# see ENVIRONMENT in dpkg-buildflags(1)
-# package maintainers to append CFLAGS
-#export DEB_CFLAGS_MAINT_APPEND  = -Wall -pedantic
-# package maintainers to append LDFLAGS
-#export DEB_LDFLAGS_MAINT_APPEND = -Wl,--as-needed
-
-
-%:
-	dh $@ 
-
-
-# dh_make generated override targets
-# This is example for Cmake (See https://bugs.debian.org/641051 )
-#override_dh_auto_configure:
-#	dh_auto_configure -- #	-DCMAKE_LIBRARY_PATH=$(DEB_HOST_MULTIARCH)
-
diff --git a/platform/marvell-armhf/sonic-platform-et6448m/entropy.py b/platform/marvell-armhf/sonic-platform-et6448m/entropy.py
deleted file mode 100644
index a2131cdc1..000000000
--- a/platform/marvell-armhf/sonic-platform-et6448m/entropy.py
+++ /dev/null
@@ -1,22 +0,0 @@
-#!/usr/bin/python
-import fcntl, struct
-import time
-from os import path
-
-RNDADDENTROPY=0x40085203
-
-def avail():
-    if path.exists("/proc/sys/kernel/random/entropy_avail"):
-        with open("/proc/sys/kernel/random/entropy_avail", mode='r') as avail:
-            return int(avail.read())
-    else:
-        return int(2048)
-
-if path.exists("/proc/sys/kernel/random/entropy_avail"):
-    while 1:
-        while avail() < 2048:
-            with open('/dev/urandom', 'rb') as urnd, open("/dev/random", mode='wb') as rnd:
-                d = urnd.read(512)
-                t = struct.pack('ii', 4 * len(d), len(d)) + d
-                fcntl.ioctl(rnd, RNDADDENTROPY, t)
-        time.sleep(30)
diff --git a/platform/marvell-armhf/sonic-platform-et6448m/et6448m_plt_setup.sh b/platform/marvell-armhf/sonic-platform-et6448m/et6448m_plt_setup.sh
deleted file mode 100755
index a587b3b17..000000000
--- a/platform/marvell-armhf/sonic-platform-et6448m/et6448m_plt_setup.sh
+++ /dev/null
@@ -1,60 +0,0 @@
-#!/bin/bash
-
-fw_uboot_env_cfg()
-{
-    echo "Setting up U-Boot environment..."
-    FW_ENV_DEFAULT='/dev/mtd0 0x00500000 0x80000 0x100000 8'
-    UBOOT_FW_DFAULT=1
-
-    DTB_HAS_ENV_BLK=$(grep uboot-env /proc/mtd | sed -e 's/:.*$//')
-    if [ -c "/dev/$DTB_HAS_ENV_BLK" ]; then
-        PROC_ENV_FILE=$(find /proc/device-tree/ -name env_size)
-        if [ -n "$PROC_ENV_FILE" ]
-        then
-            UBOOT_ENV_SIZ="0x$(hd $PROC_ENV_FILE | awk 'FNR==1 {print $2 $3 $4 $5}')"
-            UBOOT_ENV_ERASE_SIZ="0x$(grep uboot-env /proc/mtd | awk '{print $3}')"
-            if [[ -n "$UBOOT_ENV_SIZ" && -n "$UBOOT_ENV_ERASE_SIZ" ]]
-            then
-                # Env info from DTB 
-                FW_ENV_DTB="/dev/$DTB_HAS_ENV_BLK 0x00000000 $UBOOT_ENV_SIZ $UBOOT_ENV_ERASE_SIZ"
-            fi
-        fi
-    fi
-    if [ -n "$FW_ENV_DTB" ]
-    then
-                echo $FW_ENV_DTB > /etc/fw_env.config
-                echo "Found uboot env offset in device tree"
-                UBOOT_ENV_CRC=$(fw_printenv -c /etc/fw_env.config 2>&1 | grep -c 'Warning: Bad CRC')
-                if [ $UBOOT_ENV_CRC -eq 0 ]
-                then
-                    echo "Uboot env offset in device tree is valid"
-                    UBOOT_FW_DFAULT=0
-                else
-                    echo "Uboot env offset in device tree is NOT valid"
-                    UBOOT_FW_DFAULT=1
-                fi
-    fi
-    if [ $UBOOT_FW_DFAULT -eq 1 ]
-    then
-        echo $FW_ENV_DEFAULT > /etc/fw_env.config
-        echo "Using pre-configured uboot env"
-    fi
-}
-
-et6448m_profile()
-{
-    MAC_ADDR=$(fw_printenv -n ethaddr)
-    sed -i "s/switchMacAddress=.*/switchMacAddress=$MAC_ADDR/g" /usr/share/sonic/device/armhf-marvell_et6448m_52x-r0/et6448m/profile.ini
-    echo "ET6448M: Updating switch mac address ${MAC_ADDR}"
-}
-
-main()
-{
-    fw_uboot_env_cfg
-    et6448m_profile
-
-    python /etc/entropy.py &
-    /bin/sh /etc/inband_mgmt.sh
-}
-
-main $@
diff --git a/platform/marvell-armhf/sonic-platform-et6448m/inband_mgmt.sh b/platform/marvell-armhf/sonic-platform-et6448m/inband_mgmt.sh
deleted file mode 100644
index 3d3d77abe..000000000
--- a/platform/marvell-armhf/sonic-platform-et6448m/inband_mgmt.sh
+++ /dev/null
@@ -1,40 +0,0 @@
-#!/bin/sh
-
-#inband_mgmt
-
-inband_mgmt(){
-
-# The intent of this sequence is to ensure 12c bus enumeration order by
-# controlling the order in which the various i2c device drivers are
-# loaded. Hence the drivers are unloaded and then reloaded in the prescribed
-# order.
-# NOTE: In the nokia platform the following sequence is performed by the Nokia
-# platform service init script and thus should not be performed here
- if [ ! -f /host/machine.conf ]; then
-     exit 0
- fi
- grep ^onie_platform /host/machine.conf 2>/dev/null | grep nokia >/dev/null
- if [ $? != 0 ]; then
-     rmmod i2c-dev
-     rmmod i2c_mux_gpio
-     rmmod i2c_mv64xxx
-     modprobe i2c_mv64xxx
-     modprobe i2c-dev
-     modprobe i2c_mux_gpio
-     sleep 60
- fi
- while :; do
-   ip -br link show eth0 2> /dev/null
-   if [ $? -eq 0 ]; then
-       ip address show eth0 | grep -qw "inet" 2>/dev/null
-       if [ $? -ne 0 ]; then
-           ifconfig eth0 down
-           systemctl restart networking
-       fi
-       sleep 120
-   else
-     sleep 3
-   fi
- done
-}
-(inband_mgmt > /dev/null)&
diff --git a/platform/marvell-armhf/sonic-platform-nokia/debian/changelog b/platform/marvell-armhf/sonic-platform-nokia/debian/changelog
deleted file mode 100755
index f4c860fab..000000000
--- a/platform/marvell-armhf/sonic-platform-nokia/debian/changelog
+++ /dev/null
@@ -1,5 +0,0 @@
-sonic-platform-nokia-7215 (1.0) unstable; urgency=low
-
-  * Add support for nokia-7215.
-
- -- Nokia <carl.keene@nokia.com>  Wed, 15 Apr 2020 09:35:58 +0800
diff --git a/platform/marvell-armhf/sonic-platform-nokia/debian/compat b/platform/marvell-armhf/sonic-platform-nokia/debian/compat
deleted file mode 100644
index ec635144f..000000000
--- a/platform/marvell-armhf/sonic-platform-nokia/debian/compat
+++ /dev/null
@@ -1 +0,0 @@
-9
diff --git a/platform/marvell-armhf/sonic-platform-nokia/debian/control b/platform/marvell-armhf/sonic-platform-nokia/debian/control
deleted file mode 100755
index 0da04ac89..000000000
--- a/platform/marvell-armhf/sonic-platform-nokia/debian/control
+++ /dev/null
@@ -1,15 +0,0 @@
-Source: sonic-platform-nokia-7215
-Section: unknown
-Priority: optional
-Maintainer: Nokia <carl.keene@nokia.com>
-Build-Depends: debhelper (>=9)
-Standards-Version: 3.9.6
-Homepage: <insert the upstream URL, if relevant>
-#Vcs-Git: git://anonscm.debian.org/collab-maint/sonic-platform-et6448m.git
-#Vcs-Browser: https://anonscm.debian.org/cgit/collab-maint/sonic-platform-et6448m.git
-
-Package: sonic-platform-nokia-7215
-Architecture: armhf
-Depends: ${misc:Depends}
-Description: <insert up to 60 chars description>
- <insert long description, indented with spaces>
diff --git a/platform/marvell-armhf/sonic-platform-nokia/debian/rules b/platform/marvell-armhf/sonic-platform-nokia/debian/rules
deleted file mode 100755
index b7592c2b5..000000000
--- a/platform/marvell-armhf/sonic-platform-nokia/debian/rules
+++ /dev/null
@@ -1,64 +0,0 @@
-#!/usr/bin/make -f
-# See debhelper(7) (uncomment to enable)
-# output every command that modifies files on the build system.
-#export DH_VERBOSE = 1
-
-include /usr/share/dpkg/pkg-info.mk
-#--------------------------------------------------------
-
-PACKAGE_PRE_NAME := sonic-platform-nokia
-MOD_SRC_DIR:= $(shell pwd)
-MODULE_DIRS:= 7215
-UTILS_DIR := utils
-SERVICE_DIR := service
-PLATFORM_DIR := sonic_platform
-
-%:
-	dh $@ --with systemd,python3 --buildsystem=pybuild
-
-clean:
-	dh_testdir
-	dh_testroot
-	dh_clean
-
-build:
-	(for mod in $(MODULE_DIRS); do \
-		python3 $${mod}/setup.py bdist_wheel -d $(MOD_SRC_DIR)/$${mod}; \
-	done)
-
-binary: binary-arch binary-indep
-	# Nothing to do
-
-binary-arch:
-	# Nothing to do
-
-binary-indep:
-	dh_testdir
-	dh_installdirs
-
-	# Custom package commands
-	(for mod in $(MODULE_DIRS); do \
-		dh_installdirs -p$(PACKAGE_PRE_NAME)-$${mod} /usr/local/bin; \
-		cp $(MOD_SRC_DIR)/$${mod}/$(SERVICE_DIR)/*.service debian/$(PACKAGE_PRE_NAME)-$${mod}/lib/systemd/system/; \
-		cp $(MOD_SRC_DIR)/$${mod}/$(UTILS_DIR)/* debian/$(PACKAGE_PRE_NAME)-$${mod}/usr/local/bin/; \
-		python3 $${mod}/setup.py install --root=$(MOD_SRC_DIR)/debian/$(PACKAGE_PRE_NAME)-$${mod} --install-layout=deb; \
-	done)
-
-	# Resuming debhelper scripts
-	dh_testroot
-	dh_install
-	dh_installchangelogs
-	dh_installdocs
-	dh_systemd_enable
-	dh_installinit
-	dh_systemd_start
-	dh_link
-	dh_fixperms
-	dh_compress
-	dh_strip
-	dh_installdeb
-	dh_gencontrol
-	dh_md5sums
-	dh_builddeb
-
-.PHONY: build binary binary-arch binary-indep clean
diff --git a/platform/marvell-arm64/docker-saiserver-mrvl.dep b/platform/marvell/docker-saiserver-mrvl.dep
similarity index 100%
rename from platform/marvell-arm64/docker-saiserver-mrvl.dep
rename to platform/marvell/docker-saiserver-mrvl.dep
diff --git a/platform/marvell-arm64/docker-saiserver-mrvl.mk b/platform/marvell/docker-saiserver-mrvl.mk
similarity index 93%
rename from platform/marvell-arm64/docker-saiserver-mrvl.mk
rename to platform/marvell/docker-saiserver-mrvl.mk
index 498f35ffa..7e5c83ffc 100644
--- a/platform/marvell-arm64/docker-saiserver-mrvl.mk
+++ b/platform/marvell/docker-saiserver-mrvl.mk
@@ -5,6 +5,7 @@ $(DOCKER_SAISERVER_MRVL)_PATH = $(PLATFORM_PATH)/docker-saiserver-mrvl
 $(DOCKER_SAISERVER_MRVL)_DEPENDS += $(SAISERVER)
 $(DOCKER_SAISERVER_MRVL)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE_BULLSEYE)
 SONIC_DOCKER_IMAGES += $(DOCKER_SAISERVER_MRVL)
+SONIC_BULLSEYE_DOCKERS += $(DOCKER_SAISERVER_MRVL)
 
 $(DOCKER_SAISERVER_MRVL)_CONTAINER_NAME = saiserver
 $(DOCKER_SAISERVER_MRVL)_RUN_OPT += --privileged -t
diff --git a/platform/marvell-arm64/docker-syncd-mrvl-rpc.dep b/platform/marvell/docker-syncd-mrvl-rpc.dep
similarity index 100%
rename from platform/marvell-arm64/docker-syncd-mrvl-rpc.dep
rename to platform/marvell/docker-syncd-mrvl-rpc.dep
diff --git a/platform/marvell/docker-syncd-mrvl-rpc.mk b/platform/marvell/docker-syncd-mrvl-rpc.mk
index 20698efdf..d642f4da4 100644
--- a/platform/marvell/docker-syncd-mrvl-rpc.mk
+++ b/platform/marvell/docker-syncd-mrvl-rpc.mk
@@ -19,7 +19,10 @@ endif
 $(DOCKER_SYNCD_MRVL_RPC)_CONTAINER_NAME = syncd
 $(DOCKER_SYNCD_MRVL_RPC)_VERSION = 1.0.0+rpc
 $(DOCKER_SYNCD_MRVL_RPC)_PACKAGE_NAME = syncd
+$(DOCKER_SYNCD_MRVL_RPC)_MACHINE = marvell
 $(DOCKER_SYNCD_MRVL_RPC)_RUN_OPT += --privileged -t
 $(DOCKER_SYNCD_MRVL_RPC)_RUN_OPT += -v /host/machine.conf:/etc/machine.conf
 $(DOCKER_SYNCD_MRVL_RPC)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro
 $(DOCKER_SYNCD_MRVL_RPC)_RUN_OPT += -v /host/warmboot:/var/warmboot
+
+SONIC_BULLSEYE_DOCKERS += $(DOCKER_SYNCD_MRVL_RPC)
diff --git a/platform/marvell/docker-syncd-mrvl-rpc/99-syncd.conf b/platform/marvell/docker-syncd-mrvl-rpc/99-syncd.conf
index f3b57e3b1..3fabe208d 100644
--- a/platform/marvell/docker-syncd-mrvl-rpc/99-syncd.conf
+++ b/platform/marvell/docker-syncd-mrvl-rpc/99-syncd.conf
@@ -1,2 +1 @@
 sysctl -w net.core.rmem_max=509430500
-
diff --git a/platform/marvell/docker-syncd-mrvl-rpc/Dockerfile.j2 b/platform/marvell/docker-syncd-mrvl-rpc/Dockerfile.j2
index 68670343b..6bd7fb9c7 100644
--- a/platform/marvell/docker-syncd-mrvl-rpc/Dockerfile.j2
+++ b/platform/marvell/docker-syncd-mrvl-rpc/Dockerfile.j2
@@ -15,7 +15,8 @@ RUN apt-get purge -y syncd
 RUN apt-get update \
  && apt-get -y install  \
     net-tools           \
-    python-pip          \
+    python3-pip		\
+    python3-setuptools	\
     build-essential     \
     libssl-dev          \
     libffi-dev          \
@@ -24,7 +25,7 @@ RUN apt-get update \
     cmake               \
     libqt5core5a        \
     libqt5network5      \
-    libboost-atomic1.71.0
+    libboost-atomic1.74.0
 
 RUN dpkg_apt() { [ -f $1 ] && { dpkg -i $1 || apt-get -y install -f; } || return 1; } ; \
 {% for deb in docker_syncd_mrvl_rpc_debs.split(' ') -%}
@@ -41,9 +42,9 @@ RUN wget https://github.com/nanomsg/nanomsg/archive/1.0.0.tar.gz \
  && cd ..               \
  && rm -fr nanomsg-1.0.0 \
  && rm -f 1.0.0.tar.gz  \
- && pip install cffi==1.7.0    \
- && pip install --upgrade cffi==1.7.0 \
- && pip install nnpy    \
+ && pip3 install cffi==1.7.0    \
+ && pip3 install --upgrade cffi==1.7.0 \
+ && pip3 install nnpy    \
  && mkdir -p /opt       \
  && cd /opt             \
  && wget https://raw.githubusercontent.com/p4lang/ptf/master/ptf_nn/ptf_nn_agent.py \
diff --git a/platform/marvell-arm64/docker-syncd-mrvl.dep b/platform/marvell/docker-syncd-mrvl.dep
similarity index 100%
rename from platform/marvell-arm64/docker-syncd-mrvl.dep
rename to platform/marvell/docker-syncd-mrvl.dep
diff --git a/platform/marvell/docker-syncd-mrvl.mk b/platform/marvell/docker-syncd-mrvl.mk
index d8a205090..566de773b 100644
--- a/platform/marvell/docker-syncd-mrvl.mk
+++ b/platform/marvell/docker-syncd-mrvl.mk
@@ -1,9 +1,10 @@
 # docker image for mrvl syncd
 
 DOCKER_SYNCD_PLATFORM_CODE = mrvl
-include $(PLATFORM_PATH)/../template/docker-syncd-base.mk
+include $(PLATFORM_PATH)/../template/docker-syncd-bullseye.mk
 
 $(DOCKER_SYNCD_BASE)_DEPENDS += $(SYNCD)
+$(DOCKER_SYNCD_BASE)_DEPENDS += $(MRVL_SAI)
 
 $(DOCKER_SYNCD_BASE)_DBG_DEPENDS += $(SYNCD_DBG) \
                                 $(LIBSWSSCOMMON_DBG) \
@@ -12,6 +13,6 @@ $(DOCKER_SYNCD_BASE)_DBG_DEPENDS += $(SYNCD_DBG) \
 
 $(DOCKER_SYNCD_BASE)_VERSION = 1.0.0
 $(DOCKER_SYNCD_BASE)_PACKAGE_NAME = syncd
+$(DOCKER_SYNCD_BASE)_MACHINE = marvell
 
 $(DOCKER_SYNCD_BASE)_RUN_OPT += -v /host/warmboot:/var/warmboot
-$(DOCKER_SYNCD_BASE)_RUN_OPT += -v /var/run/docker-syncd:/var/run/sswsyncd
diff --git a/platform/marvell/docker-syncd-mrvl/Dockerfile.j2 b/platform/marvell/docker-syncd-mrvl/Dockerfile.j2
index 4de6df313..84e3d5bde 100755
--- a/platform/marvell/docker-syncd-mrvl/Dockerfile.j2
+++ b/platform/marvell/docker-syncd-mrvl/Dockerfile.j2
@@ -1,5 +1,5 @@
 {% from "dockers/dockerfile-macros.j2" import install_debian_packages %}
-FROM docker-config-engine-buster-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}}
+FROM docker-config-engine-bullseye-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}}
 
 ARG docker_container_name
 
@@ -14,16 +14,20 @@ debs/{{ deb }}{{' '}}
 {%- endfor -%}
 debs/
 
-RUN apt-get -y install libpcap-dev libxml2-dev python-dev swig libsensors4-dev libatomic1 liblua5.1-0 lua-bitop lua-cjson nfs-common
+RUN apt-get update \
+ && apt-get -y install  \
+    net-tools           \
+    iputils-ping
+
+RUN apt-get -y install libpcap-dev libxml2-dev python-dev swig libsensors4-dev nfs-common
 
 RUN dpkg -i \
 {% for deb in docker_syncd_mrvl_debs.split(' ') -%}
 debs/{{ deb }}{{' '}}
 {%- endfor %}
 
-COPY ["syncd.sh", "/usr/bin/"]
 COPY ["supervisord.conf", "/etc/supervisor/conf.d/"]
-COPY ["files/supervisor-proc-exit-listener", "/usr/bin"]
+COPY ["files/supervisor-proc-exit-listener", "/usr/bin/"]
 COPY ["critical_processes", "/etc/supervisor/"]
 
 ## Clean up
diff --git a/platform/marvell/docker-syncd-mrvl/supervisord.conf b/platform/marvell/docker-syncd-mrvl/supervisord.conf
index 3829f6a81..62a283872 100644
--- a/platform/marvell/docker-syncd-mrvl/supervisord.conf
+++ b/platform/marvell/docker-syncd-mrvl/supervisord.conf
@@ -23,7 +23,7 @@ buffer_size=1024
 command=/usr/sbin/rsyslogd -n -iNONE
 priority=1
 autostart=false
-autorestart=unexpected
+autorestart=false
 stdout_logfile=syslog
 stderr_logfile=syslog
 dependent_startup=true
diff --git a/platform/marvell-arm64/libsaithrift-dev.dep b/platform/marvell/libsaithrift-dev.dep
similarity index 100%
rename from platform/marvell-arm64/libsaithrift-dev.dep
rename to platform/marvell/libsaithrift-dev.dep
diff --git a/platform/marvell/libsaithrift-dev.mk b/platform/marvell/libsaithrift-dev.mk
index dd178c0b1..e1c3da156 100644
--- a/platform/marvell/libsaithrift-dev.mk
+++ b/platform/marvell/libsaithrift-dev.mk
@@ -2,19 +2,19 @@
 
 SAI_VER = 0.9.4
 
-LIBSAITHRIFT_DEV = libsaithrift-dev_$(SAI_VER)_amd64.deb
+LIBSAITHRIFT_DEV = libsaithrift-dev_$(SAI_VER)_$(CONFIGURED_ARCH).deb
 $(LIBSAITHRIFT_DEV)_SRC_PATH = $(SRC_PATH)/sonic-sairedis/SAI
 $(LIBSAITHRIFT_DEV)_DEPENDS += $(LIBTHRIFT) $(LIBTHRIFT_DEV) $(PYTHON_THRIFT) $(THRIFT_COMPILER) $(MRVL_FPA) $(MRVL_SAI)
 $(LIBSAITHRIFT_DEV)_RDEPENDS += $(LIBTHRIFT) $(MRVL_SAI)
 SONIC_DPKG_DEBS += $(LIBSAITHRIFT_DEV)
 
-PYTHON_SAITHRIFT = python-saithrift_$(SAI_VER)_amd64.deb
+PYTHON_SAITHRIFT = python-saithrift_$(SAI_VER)_$(CONFIGURED_ARCH).deb
 $(eval $(call add_extra_package,$(LIBSAITHRIFT_DEV),$(PYTHON_SAITHRIFT)))
 
-SAISERVER = saiserver_$(SAI_VER)_amd64.deb
-$(SAISERVER)_RDEPENDS += $(LIBTHRIFT) $(BRCM_XGS_SAI)
+SAISERVER = saiserver_$(SAI_VER)_$(CONFIGURED_ARCH).deb
+$(SAISERVER)_RDEPENDS += $(LIBTHRIFT) $(MRVL_SAI)
 $(eval $(call add_extra_package,$(LIBSAITHRIFT_DEV),$(SAISERVER)))
 
-SAISERVER_DBG = saiserver-dbg_$(SAI_VER)_amd64.deb
+SAISERVER_DBG = saiserver-dbg_$(SAI_VER)_$(CONFIGURED_ARCH).deb
 $(SAISERVER_DBG)_RDEPENDS += $(SAISERVER)
 $(eval $(call add_extra_package,$(LIBSAITHRIFT_DEV),$(SAISERVER_DBG)))
diff --git a/platform/marvell/mrvl-prestera b/platform/marvell/mrvl-prestera
new file mode 160000
index 000000000..b7a14a93b
--- /dev/null
+++ b/platform/marvell/mrvl-prestera
@@ -0,0 +1 @@
+Subproject commit b7a14a93b21c099fab6b53f5fc4917ca0eb9b6c9
diff --git a/platform/marvell-arm64/mrvl-prestera.dep b/platform/marvell/mrvl-prestera.dep
similarity index 100%
rename from platform/marvell-arm64/mrvl-prestera.dep
rename to platform/marvell/mrvl-prestera.dep
diff --git a/platform/marvell-arm64/mrvl-prestera.mk b/platform/marvell/mrvl-prestera.mk
similarity index 80%
rename from platform/marvell-arm64/mrvl-prestera.mk
rename to platform/marvell/mrvl-prestera.mk
index 6a3f4df2a..36207041d 100644
--- a/platform/marvell-arm64/mrvl-prestera.mk
+++ b/platform/marvell/mrvl-prestera.mk
@@ -4,5 +4,4 @@ export MRVL_PRESTERA = mrvlprestera_$(MRVL_PRESTERA_VER)_$(PLATFORM_ARCH)
 export MRVL_PRESTERA_DEB = $(MRVL_PRESTERA).deb
 
 $(MRVL_PRESTERA_DEB)_SRC_PATH = $(PLATFORM_PATH)/mrvl-prestera
-$(MRVL_PRESTERA_DEB)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON)
 SONIC_DPKG_DEBS += $(MRVL_PRESTERA_DEB)
diff --git a/platform/marvell-arm64/one-image.dep b/platform/marvell/one-image.dep
similarity index 100%
rename from platform/marvell-arm64/one-image.dep
rename to platform/marvell/one-image.dep
diff --git a/platform/marvell/one-image.mk b/platform/marvell/one-image.mk
index fcac03854..155662aa6 100644
--- a/platform/marvell/one-image.mk
+++ b/platform/marvell/one-image.mk
@@ -1,9 +1,22 @@
 # sonic marvell one image installer
 
+ifeq ($(CONFIGURED_ARCH),$(filter $(CONFIGURED_ARCH),arm64 armhf))
+SONIC_ONE_IMAGE = sonic-marvell-$(CONFIGURED_ARCH).bin
+else
 SONIC_ONE_IMAGE = sonic-marvell.bin
+endif
 $(SONIC_ONE_IMAGE)_MACHINE = marvell
 $(SONIC_ONE_IMAGE)_IMAGE_TYPE = onie
 $(SONIC_ONE_IMAGE)_INSTALLS += $(SYSTEMD_SONIC_GENERATOR)
+ifeq ($(CONFIGURED_ARCH),arm64)
+$(SONIC_ONE_IMAGE)_INSTALLS += $(MRVL_PRESTERA_DEB)
+$(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(NOKIA_7215_PLATFORM) \
+				$(AC5X_RD98DX35xx_PLATFORM) \
+				$(AC5X_RD98DX35xxCN9131_PLATFORM)
+else ifeq ($(CONFIGURED_ARCH),armhf)
+$(SONIC_ONE_IMAGE)_INSTALLS += $(MRVL_PRESTERA_DEB)
+$(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(NOKIA_7215_PLATFORM)
+endif
 ifeq ($(INSTALL_DEBUG_TOOLS),y)
 $(SONIC_ONE_IMAGE)_DOCKERS += $(SONIC_INSTALL_DOCKER_DBG_IMAGES)
 $(SONIC_ONE_IMAGE)_DOCKERS += $(filter-out $(patsubst %-$(DBG_IMAGE_MARK).gz,%.gz, $(SONIC_INSTALL_DOCKER_DBG_IMAGES)), $(SONIC_INSTALL_DOCKER_IMAGES))
diff --git a/platform/marvell/onie-image-arm64.conf b/platform/marvell/onie-image-arm64.conf
new file mode 100644
index 000000000..69d93d722
--- /dev/null
+++ b/platform/marvell/onie-image-arm64.conf
@@ -0,0 +1,55 @@
+## DESCRIPTION:
+##   config for ONIE image
+##
+
+## Partition size in MB
+## The default size is 32GB
+: ${ONIE_IMAGE_PART_SIZE:=32768}
+
+## Target hardware information
+: ${TARGET_PLATFORM:=arm64}
+: ${TARGET_MACHINE:=generic}
+
+ONIEIMAGE_VERSION=r0
+
+## Filesystem root
+FILESYSTEM_ROOT=./fsroot-${TARGET_MACHINE}
+
+## Filename for squashfs file system
+FILESYSTEM_SQUASHFS=fs.squashfs
+
+## Filename for onie installer payload, will be the main part of onie installer
+INSTALLER_PAYLOAD=fs.zip
+
+## Filename for docker file system
+FILESYSTEM_DOCKERFS=dockerfs.tar.gz
+
+## docker directory on the root filesystem
+DOCKERFS_DIR=docker
+
+## docker ramfs disk space
+DOCKER_RAMFS_SIZE=2500M
+
+## Output file name for onie installer
+OUTPUT_ONIE_IMAGE=target/sonic-$TARGET_MACHINE-$CONFIGURED_ARCH.bin
+
+## Output file name for raw image
+OUTPUT_RAW_IMAGE=target/sonic-$TARGET_MACHINE-$CONFIGURED_ARCH.raw
+
+## Raw image size in MB
+RAW_IMAGE_DISK_SIZE=4096
+
+## Output file name for kvm image
+OUTPUT_KVM_IMAGE=target/sonic-$TARGET_MACHINE-$CONFIGURED_ARCH.img
+
+## Kvm image size in GB
+KVM_IMAGE_DISK_SIZE=16
+
+## Output file name for aboot installer
+OUTPUT_ABOOT_IMAGE=target/sonic-aboot-$TARGET_MACHINE-$CONFIGURED_ARCH.swi
+
+## Aboot boot image name
+ABOOT_BOOT_IMAGE=.sonic-boot.swi
+
+## Output file name for dsc installer
+OUTPUT_DSC_IMAGE=target/sonic-$TARGET_MACHINE-$CONFIGURED_ARCH.tar
diff --git a/platform/marvell-arm64/platform-marvell.dep b/platform/marvell/platform-marvell.dep
similarity index 100%
rename from platform/marvell-arm64/platform-marvell.dep
rename to platform/marvell/platform-marvell.dep
diff --git a/platform/marvell-arm64/platform-marvell.mk b/platform/marvell/platform-marvell.mk
similarity index 89%
rename from platform/marvell-arm64/platform-marvell.mk
rename to platform/marvell/platform-marvell.mk
index 3f2ba3df0..9dffbf5e5 100644
--- a/platform/marvell-arm64/platform-marvell.mk
+++ b/platform/marvell/platform-marvell.mk
@@ -3,8 +3,7 @@
 AC5X_RD98DX35xx_PLATFORM_MODULE_VERSION = 1.0
 AC5X_RD98DX35xxCN9131_PLATFORM_MODULE_VERSION = 1.0
 
-export AC5X_RD98DX35xx_PLATFORM_MODULE_VERSION
-export AC5X_RD98DX35xxCN9131_PLATFORM_MODULE_VERSION
+ifeq ($(CONFIGURED_ARCH),arm64)
 
 AC5X_RD98DX35xx_PLATFORM = sonic-platform-rd98dx35xx_$(AC5X_RD98DX35xx_PLATFORM_MODULE_VERSION)_$(CONFIGURED_ARCH).deb
 $(AC5X_RD98DX35xx_PLATFORM)_SRC_PATH = $(PLATFORM_PATH)/sonic-platform-marvell
@@ -16,3 +15,4 @@ AC5X_RD98DX35xxCN9131_PLATFORM = sonic-platform-rd98dx35xx-cn9131_$(AC5X_RD98DX3
 $(AC5X_RD98DX35xxCN9131_PLATFORM)_PLATFORM = arm64-marvell_rd98DX35xx_cn9131-r0
 $(eval $(call add_extra_package,$(AC5X_RD98DX35xx_PLATFORM),$(AC5X_RD98DX35xxCN9131_PLATFORM)))
 
+endif
diff --git a/platform/marvell-arm64/platform-nokia.dep b/platform/marvell/platform-nokia.dep
similarity index 100%
rename from platform/marvell-arm64/platform-nokia.dep
rename to platform/marvell/platform-nokia.dep
diff --git a/platform/marvell-arm64/platform-nokia.mk b/platform/marvell/platform-nokia.mk
similarity index 61%
rename from platform/marvell-arm64/platform-nokia.mk
rename to platform/marvell/platform-nokia.mk
index 7d89c1190..f81360708 100644
--- a/platform/marvell-arm64/platform-nokia.mk
+++ b/platform/marvell/platform-nokia.mk
@@ -5,19 +5,26 @@ export NOKIA_7215_PLATFORM_VERSION
 SONIC_KERNEL_DEB_PKG = $(LINUX_KERNEL)
 export SONIC_KERNEL_DEB_PKG
 
-NOKIA_7215_PLATFORM = sonic-platform-nokia-7215_$(NOKIA_7215_PLATFORM_VERSION)_$(CONFIGURED_ARCH).deb
+ifeq ($(CONFIGURED_ARCH),arm64)
+NOKIA_7215_PLATFORM = sonic-platform-nokia-7215-a1_$(NOKIA_7215_PLATFORM_VERSION)_$(CONFIGURED_ARCH).deb
 $(NOKIA_7215_PLATFORM)_SRC_PATH = $(PLATFORM_PATH)/sonic-platform-nokia
 $(NOKIA_7215_PLATFORM)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON)
 $(NOKIA_7215_PLATFORM)_PLATFORM = arm64-nokia_ixs7215_52xb-r0
 
 MPATH       := $($(NOKIA_7215_PLATFORM)_SRC_PATH)
-DEP_FILES   := $(SONIC_COMMON_FILES_LIST) platform/marvell-arm64/platform-nokia.mk
+DEP_FILES   := $(SONIC_COMMON_FILES_LIST) platform/marvell/platform-nokia.mk
 DEP_FILES   += $(SONIC_COMMON_BASE_FILES_LIST)
 DEP_FILES   += $(shell git ls-files $(MPATH))
 
 $(NOKIA_7215_PLATFORM)_CACHE_MODE  := GIT_CONTENT_SHA
 $(NOKIA_7215_PLATFORM)_DEP_FLAGS   := $(SONIC_COMMON_FLAGS_LIST)
 $(NOKIA_7215_PLATFORM)_DEP_FILES   := $(DEP_FILES)
-
 SONIC_DPKG_DEBS += $(NOKIA_7215_PLATFORM)
 
+else ifeq ($(CONFIGURED_ARCH),armhf)
+NOKIA_7215_PLATFORM = sonic-platform-nokia-7215_$(NOKIA_7215_PLATFORM_VERSION)_$(CONFIGURED_ARCH).deb
+$(NOKIA_7215_PLATFORM)_SRC_PATH = $(PLATFORM_PATH)/sonic-platform-nokia
+$(NOKIA_7215_PLATFORM)_PLATFORM = armhf-nokia_ixs7215_52x-r0
+$(NOKIA_7215_PLATFORM)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON)
+SONIC_DPKG_DEBS += $(NOKIA_7215_PLATFORM)
+endif
diff --git a/platform/marvell/platform.conf b/platform/marvell/platform.conf
deleted file mode 100644
index e69de29bb..000000000
diff --git a/platform/marvell-arm64/platform.conf b/platform/marvell/platform_arm64.conf
similarity index 100%
rename from platform/marvell-arm64/platform.conf
rename to platform/marvell/platform_arm64.conf
diff --git a/platform/marvell-armhf/platform.conf b/platform/marvell/platform_armhf.conf
similarity index 100%
rename from platform/marvell-armhf/platform.conf
rename to platform/marvell/platform_armhf.conf
diff --git a/platform/marvell-arm64/rules.dep b/platform/marvell/rules.dep
similarity index 84%
rename from platform/marvell-arm64/rules.dep
rename to platform/marvell/rules.dep
index b14b76ef0..a5bdbf59d 100644
--- a/platform/marvell-arm64/rules.dep
+++ b/platform/marvell/rules.dep
@@ -2,8 +2,10 @@ include $(PLATFORM_PATH)/docker-saiserver-mrvl.dep
 include $(PLATFORM_PATH)/docker-syncd-mrvl-rpc.dep
 include $(PLATFORM_PATH)/docker-syncd-mrvl.dep
 include $(PLATFORM_PATH)/libsaithrift-dev.dep
-include $(PLATFORM_PATH)/mrvl-prestera.dep
 include $(PLATFORM_PATH)/one-image.dep
 include $(PLATFORM_PATH)/platform-marvell.dep
+ifeq ($(CONFIGURED_ARCH),$(filter $(CONFIGURED_ARCH),arm64 armhf))
+include $(PLATFORM_PATH)/mrvl-prestera.dep
 include $(PLATFORM_PATH)/platform-nokia.dep
+endif
 include $(PLATFORM_PATH)/sai.dep
diff --git a/platform/marvell/rules.mk b/platform/marvell/rules.mk
index da23e53f2..0b78cd088 100644
--- a/platform/marvell/rules.mk
+++ b/platform/marvell/rules.mk
@@ -1,15 +1,21 @@
 include $(PLATFORM_PATH)/sai.mk
 include $(PLATFORM_PATH)/docker-syncd-mrvl.mk
 include $(PLATFORM_PATH)/docker-syncd-mrvl-rpc.mk
+include $(PLATFORM_PATH)/docker-saiserver-mrvl.mk
 include $(PLATFORM_PATH)/libsaithrift-dev.mk
 include $(PLATFORM_PATH)/one-image.mk
+include $(PLATFORM_PATH)/platform-marvell.mk
+ifeq ($(CONFIGURED_ARCH),$(filter $(CONFIGURED_ARCH),arm64 armhf))
+include $(PLATFORM_PATH)/mrvl-prestera.mk
+include $(PLATFORM_PATH)/platform-nokia.mk
+endif
 
 SONIC_ALL += $(SONIC_ONE_IMAGE) \
-             $(DOCKER_FPM) \
+             $(DOCKER_FPM) 	\
              $(DOCKER_SYNCD_MRVL_RPC)
 
 # Inject mrvl sai into syncd
-$(SYNCD)_DEPENDS += $(MRVL_FPA) $(MRVL_SAI)
+$(SYNCD)_DEPENDS += $(MRVL_SAI)
 $(SYNCD)_UNINSTALLS += $(MRVL_SAI)
 
 ifeq ($(ENABLE_SYNCD_RPC),y)
diff --git a/platform/marvell-arm64/sai.dep b/platform/marvell/sai.dep
similarity index 76%
rename from platform/marvell-arm64/sai.dep
rename to platform/marvell/sai.dep
index 618babe65..fee88c0fa 100644
--- a/platform/marvell-arm64/sai.dep
+++ b/platform/marvell/sai.dep
@@ -1,7 +1,5 @@
-SPATH       := $($(MRVL_SAI)_SRC_PATH)
 DEP_FILES   := $(SONIC_COMMON_FILES_LIST) $(PLATFORM_PATH)/sai.mk $(PLATFORM_PATH)/sai.dep
 DEP_FILES   += $(SONIC_COMMON_BASE_FILES_LIST)
-DEP_FILES   += $(shell git ls-files $(SPATH))
 
 $(MRVL_SAI)_CACHE_MODE  := GIT_CONTENT_SHA
 $(MRVL_SAI)_DEP_FLAGS   := $(SONIC_COMMON_FLAGS_LIST)
diff --git a/platform/marvell/sai.mk b/platform/marvell/sai.mk
index 231bdfc81..4fd89bf6c 100644
--- a/platform/marvell/sai.mk
+++ b/platform/marvell/sai.mk
@@ -1,9 +1,19 @@
 # Marvell SAI
 
-export MRVL_SAI_VERSION = 1.13.0-1
-export MRVL_SAI = mrvllibsai_amd64_$(MRVL_SAI_VERSION).deb
+BRANCH = master
+ifeq ($(CONFIGURED_ARCH),arm64)
+MRVL_SAI_VERSION = 1.13.0-1
+else ifeq ($(CONFIGURED_ARCH),armhf)
+MRVL_SAI_VERSION = 1.13.0-2
+else
+MRVL_SAI_VERSION = 1.13.0-1
+endif
 
-$(MRVL_SAI)_SRC_PATH = $(PLATFORM_PATH)/sai
+MRVL_SAI_URL_PREFIX = https://github.com/Marvell-switching/sonic-marvell-binaries/raw/master/$(CONFIGURED_ARCH)/sai-plugin/$(BRANCH)/
+MRVL_SAI = mrvllibsai_$(MRVL_SAI_VERSION)_$(PLATFORM_ARCH).deb
+$(MRVL_SAI)_URL = $(MRVL_SAI_URL_PREFIX)/$(MRVL_SAI)
+
+SONIC_ONLINE_DEBS += $(MRVL_SAI)
+$(MRVL_SAI)_SKIP_VERSION=y
 $(eval $(call add_conflict_package,$(MRVL_SAI),$(LIBSAIVS_DEV)))
 
-SONIC_MAKE_DEBS += $(MRVL_SAI)
diff --git a/platform/marvell/sai/Makefile b/platform/marvell/sai/Makefile
deleted file mode 100644
index 1cd6d0267..000000000
--- a/platform/marvell/sai/Makefile
+++ /dev/null
@@ -1,9 +0,0 @@
-.ONESHELL:
-SHELL = /bin/bash
-.SHELLFLAGS += -e
-
-MRVL_SAI_URL = https://github.com/Marvell-switching/sonic-marvell-binaries/raw/master/amd64/sai-plugin/$(MRVL_SAI)
-
-$(addprefix $(DEST)/, $(MRVL_SAI)): $(DEST)/% :
-	# get deb package
-	wget -O $(DEST)/$(MRVL_SAI) $(MRVL_SAI_URL)
diff --git a/platform/marvell/sonic-platform-marvell b/platform/marvell/sonic-platform-marvell
new file mode 160000
index 000000000..078a6fff3
--- /dev/null
+++ b/platform/marvell/sonic-platform-marvell
@@ -0,0 +1 @@
+Subproject commit 078a6fff30f3af786aae1208588030a3fcfe0876
diff --git a/platform/marvell-arm64/sonic-platform-nokia/7215/modules/Makefile b/platform/marvell/sonic-platform-nokia/7215-a1/modules/Makefile
similarity index 100%
rename from platform/marvell-arm64/sonic-platform-nokia/7215/modules/Makefile
rename to platform/marvell/sonic-platform-nokia/7215-a1/modules/Makefile
diff --git a/platform/marvell-arm64/sonic-platform-nokia/7215/modules/cn9130_cpu_thermal_sensor.c b/platform/marvell/sonic-platform-nokia/7215-a1/modules/cn9130_cpu_thermal_sensor.c
similarity index 100%
rename from platform/marvell-arm64/sonic-platform-nokia/7215/modules/cn9130_cpu_thermal_sensor.c
rename to platform/marvell/sonic-platform-nokia/7215-a1/modules/cn9130_cpu_thermal_sensor.c
diff --git a/platform/marvell-arm64/sonic-platform-nokia/7215/modules/nokia_7215_ixs_a1_cpld.c b/platform/marvell/sonic-platform-nokia/7215-a1/modules/nokia_7215_ixs_a1_cpld.c
similarity index 100%
rename from platform/marvell-arm64/sonic-platform-nokia/7215/modules/nokia_7215_ixs_a1_cpld.c
rename to platform/marvell/sonic-platform-nokia/7215-a1/modules/nokia_7215_ixs_a1_cpld.c
diff --git a/platform/marvell-arm64/sonic-platform-nokia/7215/scripts/cpu_wdt.py b/platform/marvell/sonic-platform-nokia/7215-a1/scripts/cpu_wdt.py
similarity index 100%
rename from platform/marvell-arm64/sonic-platform-nokia/7215/scripts/cpu_wdt.py
rename to platform/marvell/sonic-platform-nokia/7215-a1/scripts/cpu_wdt.py
diff --git a/platform/marvell-arm64/sonic-platform-nokia/7215/scripts/nokia-7215-init.sh b/platform/marvell/sonic-platform-nokia/7215-a1/scripts/nokia-7215-init.sh
similarity index 100%
rename from platform/marvell-arm64/sonic-platform-nokia/7215/scripts/nokia-7215-init.sh
rename to platform/marvell/sonic-platform-nokia/7215-a1/scripts/nokia-7215-init.sh
diff --git a/platform/marvell-arm64/sonic-platform-nokia/7215/service/cpu_wdt.service b/platform/marvell/sonic-platform-nokia/7215-a1/service/cpu_wdt.service
similarity index 100%
rename from platform/marvell-arm64/sonic-platform-nokia/7215/service/cpu_wdt.service
rename to platform/marvell/sonic-platform-nokia/7215-a1/service/cpu_wdt.service
diff --git a/platform/marvell-arm64/sonic-platform-nokia/7215/service/nokia-7215init.service b/platform/marvell/sonic-platform-nokia/7215-a1/service/nokia-7215init.service
similarity index 100%
rename from platform/marvell-arm64/sonic-platform-nokia/7215/service/nokia-7215init.service
rename to platform/marvell/sonic-platform-nokia/7215-a1/service/nokia-7215init.service
diff --git a/platform/marvell-armhf/sonic-platform-nokia/7215/setup.py b/platform/marvell/sonic-platform-nokia/7215-a1/setup.py
similarity index 80%
rename from platform/marvell-armhf/sonic-platform-nokia/7215/setup.py
rename to platform/marvell/sonic-platform-nokia/7215-a1/setup.py
index 65f4853be..67663d356 100755
--- a/platform/marvell-armhf/sonic-platform-nokia/7215/setup.py
+++ b/platform/marvell/sonic-platform-nokia/7215-a1/setup.py
@@ -10,6 +10,6 @@
    description='Module to initialize Nokia IXS 7215 platforms',
 
    packages=['sonic_platform','sonic_platform.test'],
-   package_dir={'sonic_platform': '7215/sonic_platform'},
+   package_dir={'sonic_platform': 'sonic_platform'},
 )
 
diff --git a/platform/marvell-arm64/sonic-platform-nokia/7215/sonic_platform/__init__.py b/platform/marvell/sonic-platform-nokia/7215-a1/sonic_platform/__init__.py
similarity index 100%
rename from platform/marvell-arm64/sonic-platform-nokia/7215/sonic_platform/__init__.py
rename to platform/marvell/sonic-platform-nokia/7215-a1/sonic_platform/__init__.py
diff --git a/platform/marvell-arm64/sonic-platform-nokia/7215/sonic_platform/chassis.py b/platform/marvell/sonic-platform-nokia/7215-a1/sonic_platform/chassis.py
similarity index 100%
rename from platform/marvell-arm64/sonic-platform-nokia/7215/sonic_platform/chassis.py
rename to platform/marvell/sonic-platform-nokia/7215-a1/sonic_platform/chassis.py
diff --git a/platform/marvell-arm64/sonic-platform-nokia/7215/sonic_platform/component.py b/platform/marvell/sonic-platform-nokia/7215-a1/sonic_platform/component.py
similarity index 100%
rename from platform/marvell-arm64/sonic-platform-nokia/7215/sonic_platform/component.py
rename to platform/marvell/sonic-platform-nokia/7215-a1/sonic_platform/component.py
diff --git a/platform/marvell-arm64/sonic-platform-nokia/7215/sonic_platform/eeprom.py b/platform/marvell/sonic-platform-nokia/7215-a1/sonic_platform/eeprom.py
similarity index 100%
rename from platform/marvell-arm64/sonic-platform-nokia/7215/sonic_platform/eeprom.py
rename to platform/marvell/sonic-platform-nokia/7215-a1/sonic_platform/eeprom.py
diff --git a/platform/marvell-arm64/sonic-platform-nokia/7215/sonic_platform/fan.py b/platform/marvell/sonic-platform-nokia/7215-a1/sonic_platform/fan.py
similarity index 100%
rename from platform/marvell-arm64/sonic-platform-nokia/7215/sonic_platform/fan.py
rename to platform/marvell/sonic-platform-nokia/7215-a1/sonic_platform/fan.py
diff --git a/platform/marvell-arm64/sonic-platform-nokia/7215/sonic_platform/fan_drawer.py b/platform/marvell/sonic-platform-nokia/7215-a1/sonic_platform/fan_drawer.py
similarity index 100%
rename from platform/marvell-arm64/sonic-platform-nokia/7215/sonic_platform/fan_drawer.py
rename to platform/marvell/sonic-platform-nokia/7215-a1/sonic_platform/fan_drawer.py
diff --git a/platform/marvell-arm64/sonic-platform-nokia/7215/sonic_platform/platform.py b/platform/marvell/sonic-platform-nokia/7215-a1/sonic_platform/platform.py
similarity index 100%
rename from platform/marvell-arm64/sonic-platform-nokia/7215/sonic_platform/platform.py
rename to platform/marvell/sonic-platform-nokia/7215-a1/sonic_platform/platform.py
diff --git a/platform/marvell-arm64/sonic-platform-nokia/7215/sonic_platform/psu.py b/platform/marvell/sonic-platform-nokia/7215-a1/sonic_platform/psu.py
similarity index 100%
rename from platform/marvell-arm64/sonic-platform-nokia/7215/sonic_platform/psu.py
rename to platform/marvell/sonic-platform-nokia/7215-a1/sonic_platform/psu.py
diff --git a/platform/marvell-arm64/sonic-platform-nokia/7215/sonic_platform/sfp.py b/platform/marvell/sonic-platform-nokia/7215-a1/sonic_platform/sfp.py
similarity index 100%
rename from platform/marvell-arm64/sonic-platform-nokia/7215/sonic_platform/sfp.py
rename to platform/marvell/sonic-platform-nokia/7215-a1/sonic_platform/sfp.py
diff --git a/platform/marvell-arm64/sonic-platform-nokia/7215/sonic_platform/sfp_event.py b/platform/marvell/sonic-platform-nokia/7215-a1/sonic_platform/sfp_event.py
similarity index 100%
rename from platform/marvell-arm64/sonic-platform-nokia/7215/sonic_platform/sfp_event.py
rename to platform/marvell/sonic-platform-nokia/7215-a1/sonic_platform/sfp_event.py
diff --git a/platform/marvell-arm64/sonic-platform-nokia/7215/sonic_platform/test/README b/platform/marvell/sonic-platform-nokia/7215-a1/sonic_platform/test/README
similarity index 100%
rename from platform/marvell-arm64/sonic-platform-nokia/7215/sonic_platform/test/README
rename to platform/marvell/sonic-platform-nokia/7215-a1/sonic_platform/test/README
diff --git a/platform/marvell-arm64/sonic-platform-nokia/7215/sonic_platform/test/test-chassis.py b/platform/marvell/sonic-platform-nokia/7215-a1/sonic_platform/test/test-chassis.py
similarity index 100%
rename from platform/marvell-arm64/sonic-platform-nokia/7215/sonic_platform/test/test-chassis.py
rename to platform/marvell/sonic-platform-nokia/7215-a1/sonic_platform/test/test-chassis.py
diff --git a/platform/marvell-arm64/sonic-platform-nokia/7215/sonic_platform/test/test-component.py b/platform/marvell/sonic-platform-nokia/7215-a1/sonic_platform/test/test-component.py
similarity index 100%
rename from platform/marvell-arm64/sonic-platform-nokia/7215/sonic_platform/test/test-component.py
rename to platform/marvell/sonic-platform-nokia/7215-a1/sonic_platform/test/test-component.py
diff --git a/platform/marvell-arm64/sonic-platform-nokia/7215/sonic_platform/test/test-eeprom.py b/platform/marvell/sonic-platform-nokia/7215-a1/sonic_platform/test/test-eeprom.py
similarity index 100%
rename from platform/marvell-arm64/sonic-platform-nokia/7215/sonic_platform/test/test-eeprom.py
rename to platform/marvell/sonic-platform-nokia/7215-a1/sonic_platform/test/test-eeprom.py
diff --git a/platform/marvell-arm64/sonic-platform-nokia/7215/sonic_platform/test/test-fan.py b/platform/marvell/sonic-platform-nokia/7215-a1/sonic_platform/test/test-fan.py
similarity index 100%
rename from platform/marvell-arm64/sonic-platform-nokia/7215/sonic_platform/test/test-fan.py
rename to platform/marvell/sonic-platform-nokia/7215-a1/sonic_platform/test/test-fan.py
diff --git a/platform/marvell-arm64/sonic-platform-nokia/7215/sonic_platform/test/test-psu.py b/platform/marvell/sonic-platform-nokia/7215-a1/sonic_platform/test/test-psu.py
similarity index 100%
rename from platform/marvell-arm64/sonic-platform-nokia/7215/sonic_platform/test/test-psu.py
rename to platform/marvell/sonic-platform-nokia/7215-a1/sonic_platform/test/test-psu.py
diff --git a/platform/marvell-arm64/sonic-platform-nokia/7215/sonic_platform/test/test-sfp.py b/platform/marvell/sonic-platform-nokia/7215-a1/sonic_platform/test/test-sfp.py
similarity index 100%
rename from platform/marvell-arm64/sonic-platform-nokia/7215/sonic_platform/test/test-sfp.py
rename to platform/marvell/sonic-platform-nokia/7215-a1/sonic_platform/test/test-sfp.py
diff --git a/platform/marvell-arm64/sonic-platform-nokia/7215/sonic_platform/test/test-thermal.py b/platform/marvell/sonic-platform-nokia/7215-a1/sonic_platform/test/test-thermal.py
similarity index 100%
rename from platform/marvell-arm64/sonic-platform-nokia/7215/sonic_platform/test/test-thermal.py
rename to platform/marvell/sonic-platform-nokia/7215-a1/sonic_platform/test/test-thermal.py
diff --git a/platform/marvell-arm64/sonic-platform-nokia/7215/sonic_platform/test/test-watchdog.py b/platform/marvell/sonic-platform-nokia/7215-a1/sonic_platform/test/test-watchdog.py
similarity index 100%
rename from platform/marvell-arm64/sonic-platform-nokia/7215/sonic_platform/test/test-watchdog.py
rename to platform/marvell/sonic-platform-nokia/7215-a1/sonic_platform/test/test-watchdog.py
diff --git a/platform/marvell-arm64/sonic-platform-nokia/7215/sonic_platform/thermal.py b/platform/marvell/sonic-platform-nokia/7215-a1/sonic_platform/thermal.py
similarity index 100%
rename from platform/marvell-arm64/sonic-platform-nokia/7215/sonic_platform/thermal.py
rename to platform/marvell/sonic-platform-nokia/7215-a1/sonic_platform/thermal.py
diff --git a/platform/marvell-arm64/sonic-platform-nokia/7215/sonic_platform/thermal_actions.py b/platform/marvell/sonic-platform-nokia/7215-a1/sonic_platform/thermal_actions.py
similarity index 100%
rename from platform/marvell-arm64/sonic-platform-nokia/7215/sonic_platform/thermal_actions.py
rename to platform/marvell/sonic-platform-nokia/7215-a1/sonic_platform/thermal_actions.py
diff --git a/platform/marvell-arm64/sonic-platform-nokia/7215/sonic_platform/thermal_conditions.py b/platform/marvell/sonic-platform-nokia/7215-a1/sonic_platform/thermal_conditions.py
similarity index 100%
rename from platform/marvell-arm64/sonic-platform-nokia/7215/sonic_platform/thermal_conditions.py
rename to platform/marvell/sonic-platform-nokia/7215-a1/sonic_platform/thermal_conditions.py
diff --git a/platform/marvell-arm64/sonic-platform-nokia/7215/sonic_platform/thermal_infos.py b/platform/marvell/sonic-platform-nokia/7215-a1/sonic_platform/thermal_infos.py
similarity index 100%
rename from platform/marvell-arm64/sonic-platform-nokia/7215/sonic_platform/thermal_infos.py
rename to platform/marvell/sonic-platform-nokia/7215-a1/sonic_platform/thermal_infos.py
diff --git a/platform/marvell-arm64/sonic-platform-nokia/7215/sonic_platform/thermal_manager.py b/platform/marvell/sonic-platform-nokia/7215-a1/sonic_platform/thermal_manager.py
similarity index 100%
rename from platform/marvell-arm64/sonic-platform-nokia/7215/sonic_platform/thermal_manager.py
rename to platform/marvell/sonic-platform-nokia/7215-a1/sonic_platform/thermal_manager.py
diff --git a/platform/marvell-arm64/sonic-platform-nokia/7215/sonic_platform/watchdog.py b/platform/marvell/sonic-platform-nokia/7215-a1/sonic_platform/watchdog.py
similarity index 100%
rename from platform/marvell-arm64/sonic-platform-nokia/7215/sonic_platform/watchdog.py
rename to platform/marvell/sonic-platform-nokia/7215-a1/sonic_platform/watchdog.py
diff --git a/platform/marvell-arm64/sonic-platform-nokia/7215/utils/sonic_ssd.py b/platform/marvell/sonic-platform-nokia/7215-a1/utils/sonic_ssd.py
similarity index 100%
rename from platform/marvell-arm64/sonic-platform-nokia/7215/utils/sonic_ssd.py
rename to platform/marvell/sonic-platform-nokia/7215-a1/utils/sonic_ssd.py
diff --git a/platform/marvell-armhf/sonic-platform-nokia/7215/scripts/cpu_wdt.py b/platform/marvell/sonic-platform-nokia/7215/scripts/cpu_wdt.py
similarity index 100%
rename from platform/marvell-armhf/sonic-platform-nokia/7215/scripts/cpu_wdt.py
rename to platform/marvell/sonic-platform-nokia/7215/scripts/cpu_wdt.py
diff --git a/platform/marvell-armhf/sonic-platform-nokia/inband_mgmt.sh b/platform/marvell/sonic-platform-nokia/7215/scripts/inband_mgmt.sh
similarity index 100%
rename from platform/marvell-armhf/sonic-platform-nokia/inband_mgmt.sh
rename to platform/marvell/sonic-platform-nokia/7215/scripts/inband_mgmt.sh
diff --git a/platform/marvell-armhf/sonic-platform-nokia/nokia-7215_plt_setup.sh b/platform/marvell/sonic-platform-nokia/7215/scripts/nokia-7215_plt_setup.sh
similarity index 100%
rename from platform/marvell-armhf/sonic-platform-nokia/nokia-7215_plt_setup.sh
rename to platform/marvell/sonic-platform-nokia/7215/scripts/nokia-7215_plt_setup.sh
diff --git a/platform/marvell-armhf/sonic-platform-nokia/7215/scripts/nokia-7215init.sh b/platform/marvell/sonic-platform-nokia/7215/scripts/nokia-7215init.sh
similarity index 100%
rename from platform/marvell-armhf/sonic-platform-nokia/7215/scripts/nokia-7215init.sh
rename to platform/marvell/sonic-platform-nokia/7215/scripts/nokia-7215init.sh
diff --git a/platform/marvell-armhf/sonic-platform-nokia/7215/service/cpu_wdt.service b/platform/marvell/sonic-platform-nokia/7215/service/cpu_wdt.service
similarity index 100%
rename from platform/marvell-armhf/sonic-platform-nokia/7215/service/cpu_wdt.service
rename to platform/marvell/sonic-platform-nokia/7215/service/cpu_wdt.service
diff --git a/platform/marvell-armhf/sonic-platform-nokia/7215/service/fstrim.timer/timer-override.conf b/platform/marvell/sonic-platform-nokia/7215/service/fstrim.timer/timer-override.conf
similarity index 100%
rename from platform/marvell-armhf/sonic-platform-nokia/7215/service/fstrim.timer/timer-override.conf
rename to platform/marvell/sonic-platform-nokia/7215/service/fstrim.timer/timer-override.conf
diff --git a/platform/marvell-armhf/sonic-platform-nokia/7215/service/nokia-7215init.service b/platform/marvell/sonic-platform-nokia/7215/service/nokia-7215init.service
similarity index 100%
rename from platform/marvell-armhf/sonic-platform-nokia/7215/service/nokia-7215init.service
rename to platform/marvell/sonic-platform-nokia/7215/service/nokia-7215init.service
diff --git a/platform/marvell-arm64/sonic-platform-nokia/7215/setup.py b/platform/marvell/sonic-platform-nokia/7215/setup.py
similarity index 80%
rename from platform/marvell-arm64/sonic-platform-nokia/7215/setup.py
rename to platform/marvell/sonic-platform-nokia/7215/setup.py
index 65f4853be..67663d356 100755
--- a/platform/marvell-arm64/sonic-platform-nokia/7215/setup.py
+++ b/platform/marvell/sonic-platform-nokia/7215/setup.py
@@ -10,6 +10,6 @@
    description='Module to initialize Nokia IXS 7215 platforms',
 
    packages=['sonic_platform','sonic_platform.test'],
-   package_dir={'sonic_platform': '7215/sonic_platform'},
+   package_dir={'sonic_platform': 'sonic_platform'},
 )
 
diff --git a/platform/marvell-armhf/sonic-platform-nokia/7215/sonic_platform/__init__.py b/platform/marvell/sonic-platform-nokia/7215/sonic_platform/__init__.py
similarity index 100%
rename from platform/marvell-armhf/sonic-platform-nokia/7215/sonic_platform/__init__.py
rename to platform/marvell/sonic-platform-nokia/7215/sonic_platform/__init__.py
diff --git a/platform/marvell-armhf/sonic-platform-nokia/7215/sonic_platform/chassis.py b/platform/marvell/sonic-platform-nokia/7215/sonic_platform/chassis.py
similarity index 100%
rename from platform/marvell-armhf/sonic-platform-nokia/7215/sonic_platform/chassis.py
rename to platform/marvell/sonic-platform-nokia/7215/sonic_platform/chassis.py
diff --git a/platform/marvell-armhf/sonic-platform-nokia/7215/sonic_platform/component.py b/platform/marvell/sonic-platform-nokia/7215/sonic_platform/component.py
similarity index 100%
rename from platform/marvell-armhf/sonic-platform-nokia/7215/sonic_platform/component.py
rename to platform/marvell/sonic-platform-nokia/7215/sonic_platform/component.py
diff --git a/platform/marvell-armhf/sonic-platform-nokia/7215/sonic_platform/eeprom.py b/platform/marvell/sonic-platform-nokia/7215/sonic_platform/eeprom.py
similarity index 100%
rename from platform/marvell-armhf/sonic-platform-nokia/7215/sonic_platform/eeprom.py
rename to platform/marvell/sonic-platform-nokia/7215/sonic_platform/eeprom.py
diff --git a/platform/marvell-armhf/sonic-platform-nokia/7215/sonic_platform/fan.py b/platform/marvell/sonic-platform-nokia/7215/sonic_platform/fan.py
similarity index 100%
rename from platform/marvell-armhf/sonic-platform-nokia/7215/sonic_platform/fan.py
rename to platform/marvell/sonic-platform-nokia/7215/sonic_platform/fan.py
diff --git a/platform/marvell-armhf/sonic-platform-nokia/7215/sonic_platform/fan_drawer.py b/platform/marvell/sonic-platform-nokia/7215/sonic_platform/fan_drawer.py
similarity index 100%
rename from platform/marvell-armhf/sonic-platform-nokia/7215/sonic_platform/fan_drawer.py
rename to platform/marvell/sonic-platform-nokia/7215/sonic_platform/fan_drawer.py
diff --git a/platform/marvell-armhf/sonic-platform-nokia/7215/sonic_platform/platform.py b/platform/marvell/sonic-platform-nokia/7215/sonic_platform/platform.py
similarity index 100%
rename from platform/marvell-armhf/sonic-platform-nokia/7215/sonic_platform/platform.py
rename to platform/marvell/sonic-platform-nokia/7215/sonic_platform/platform.py
diff --git a/platform/marvell-armhf/sonic-platform-nokia/7215/sonic_platform/psu.py b/platform/marvell/sonic-platform-nokia/7215/sonic_platform/psu.py
similarity index 100%
rename from platform/marvell-armhf/sonic-platform-nokia/7215/sonic_platform/psu.py
rename to platform/marvell/sonic-platform-nokia/7215/sonic_platform/psu.py
diff --git a/platform/marvell-armhf/sonic-platform-nokia/7215/sonic_platform/sfp.py b/platform/marvell/sonic-platform-nokia/7215/sonic_platform/sfp.py
similarity index 100%
rename from platform/marvell-armhf/sonic-platform-nokia/7215/sonic_platform/sfp.py
rename to platform/marvell/sonic-platform-nokia/7215/sonic_platform/sfp.py
diff --git a/platform/marvell-armhf/sonic-platform-nokia/7215/sonic_platform/sfp_event.py b/platform/marvell/sonic-platform-nokia/7215/sonic_platform/sfp_event.py
similarity index 100%
rename from platform/marvell-armhf/sonic-platform-nokia/7215/sonic_platform/sfp_event.py
rename to platform/marvell/sonic-platform-nokia/7215/sonic_platform/sfp_event.py
diff --git a/platform/marvell-armhf/sonic-platform-nokia/7215/sonic_platform/test/README b/platform/marvell/sonic-platform-nokia/7215/sonic_platform/test/README
similarity index 100%
rename from platform/marvell-armhf/sonic-platform-nokia/7215/sonic_platform/test/README
rename to platform/marvell/sonic-platform-nokia/7215/sonic_platform/test/README
diff --git a/platform/marvell-armhf/sonic-platform-nokia/7215/sonic_platform/test/test-chassis.py b/platform/marvell/sonic-platform-nokia/7215/sonic_platform/test/test-chassis.py
similarity index 100%
rename from platform/marvell-armhf/sonic-platform-nokia/7215/sonic_platform/test/test-chassis.py
rename to platform/marvell/sonic-platform-nokia/7215/sonic_platform/test/test-chassis.py
diff --git a/platform/marvell-armhf/sonic-platform-nokia/7215/sonic_platform/test/test-component.py b/platform/marvell/sonic-platform-nokia/7215/sonic_platform/test/test-component.py
similarity index 100%
rename from platform/marvell-armhf/sonic-platform-nokia/7215/sonic_platform/test/test-component.py
rename to platform/marvell/sonic-platform-nokia/7215/sonic_platform/test/test-component.py
diff --git a/platform/marvell-armhf/sonic-platform-nokia/7215/sonic_platform/test/test-eeprom.py b/platform/marvell/sonic-platform-nokia/7215/sonic_platform/test/test-eeprom.py
similarity index 100%
rename from platform/marvell-armhf/sonic-platform-nokia/7215/sonic_platform/test/test-eeprom.py
rename to platform/marvell/sonic-platform-nokia/7215/sonic_platform/test/test-eeprom.py
diff --git a/platform/marvell-armhf/sonic-platform-nokia/7215/sonic_platform/test/test-fan.py b/platform/marvell/sonic-platform-nokia/7215/sonic_platform/test/test-fan.py
similarity index 100%
rename from platform/marvell-armhf/sonic-platform-nokia/7215/sonic_platform/test/test-fan.py
rename to platform/marvell/sonic-platform-nokia/7215/sonic_platform/test/test-fan.py
diff --git a/platform/marvell-armhf/sonic-platform-nokia/7215/sonic_platform/test/test-psu.py b/platform/marvell/sonic-platform-nokia/7215/sonic_platform/test/test-psu.py
similarity index 100%
rename from platform/marvell-armhf/sonic-platform-nokia/7215/sonic_platform/test/test-psu.py
rename to platform/marvell/sonic-platform-nokia/7215/sonic_platform/test/test-psu.py
diff --git a/platform/marvell-armhf/sonic-platform-nokia/7215/sonic_platform/test/test-sfp.py b/platform/marvell/sonic-platform-nokia/7215/sonic_platform/test/test-sfp.py
similarity index 100%
rename from platform/marvell-armhf/sonic-platform-nokia/7215/sonic_platform/test/test-sfp.py
rename to platform/marvell/sonic-platform-nokia/7215/sonic_platform/test/test-sfp.py
diff --git a/platform/marvell-armhf/sonic-platform-nokia/7215/sonic_platform/test/test-thermal.py b/platform/marvell/sonic-platform-nokia/7215/sonic_platform/test/test-thermal.py
similarity index 100%
rename from platform/marvell-armhf/sonic-platform-nokia/7215/sonic_platform/test/test-thermal.py
rename to platform/marvell/sonic-platform-nokia/7215/sonic_platform/test/test-thermal.py
diff --git a/platform/marvell-armhf/sonic-platform-nokia/7215/sonic_platform/test/test-watchdog.py b/platform/marvell/sonic-platform-nokia/7215/sonic_platform/test/test-watchdog.py
similarity index 100%
rename from platform/marvell-armhf/sonic-platform-nokia/7215/sonic_platform/test/test-watchdog.py
rename to platform/marvell/sonic-platform-nokia/7215/sonic_platform/test/test-watchdog.py
diff --git a/platform/marvell-armhf/sonic-platform-nokia/7215/sonic_platform/thermal.py b/platform/marvell/sonic-platform-nokia/7215/sonic_platform/thermal.py
similarity index 100%
rename from platform/marvell-armhf/sonic-platform-nokia/7215/sonic_platform/thermal.py
rename to platform/marvell/sonic-platform-nokia/7215/sonic_platform/thermal.py
diff --git a/platform/marvell-armhf/sonic-platform-nokia/7215/sonic_platform/thermal_actions.py b/platform/marvell/sonic-platform-nokia/7215/sonic_platform/thermal_actions.py
similarity index 100%
rename from platform/marvell-armhf/sonic-platform-nokia/7215/sonic_platform/thermal_actions.py
rename to platform/marvell/sonic-platform-nokia/7215/sonic_platform/thermal_actions.py
diff --git a/platform/marvell-armhf/sonic-platform-nokia/7215/sonic_platform/thermal_conditions.py b/platform/marvell/sonic-platform-nokia/7215/sonic_platform/thermal_conditions.py
similarity index 100%
rename from platform/marvell-armhf/sonic-platform-nokia/7215/sonic_platform/thermal_conditions.py
rename to platform/marvell/sonic-platform-nokia/7215/sonic_platform/thermal_conditions.py
diff --git a/platform/marvell-armhf/sonic-platform-nokia/7215/sonic_platform/thermal_infos.py b/platform/marvell/sonic-platform-nokia/7215/sonic_platform/thermal_infos.py
similarity index 100%
rename from platform/marvell-armhf/sonic-platform-nokia/7215/sonic_platform/thermal_infos.py
rename to platform/marvell/sonic-platform-nokia/7215/sonic_platform/thermal_infos.py
diff --git a/platform/marvell-armhf/sonic-platform-nokia/7215/sonic_platform/thermal_manager.py b/platform/marvell/sonic-platform-nokia/7215/sonic_platform/thermal_manager.py
similarity index 100%
rename from platform/marvell-armhf/sonic-platform-nokia/7215/sonic_platform/thermal_manager.py
rename to platform/marvell/sonic-platform-nokia/7215/sonic_platform/thermal_manager.py
diff --git a/platform/marvell-armhf/sonic-platform-nokia/7215/sonic_platform/watchdog.py b/platform/marvell/sonic-platform-nokia/7215/sonic_platform/watchdog.py
similarity index 100%
rename from platform/marvell-armhf/sonic-platform-nokia/7215/sonic_platform/watchdog.py
rename to platform/marvell/sonic-platform-nokia/7215/sonic_platform/watchdog.py
diff --git a/platform/marvell-arm64/sonic-platform-nokia/debian/changelog b/platform/marvell/sonic-platform-nokia/debian/changelog
similarity index 65%
rename from platform/marvell-arm64/sonic-platform-nokia/debian/changelog
rename to platform/marvell/sonic-platform-nokia/debian/changelog
index f6573c957..a369a030e 100755
--- a/platform/marvell-arm64/sonic-platform-nokia/debian/changelog
+++ b/platform/marvell/sonic-platform-nokia/debian/changelog
@@ -1,4 +1,4 @@
-sonic-platform-nokia-7215 (1.0) unstable; urgency=low
+sonic-platform-nokia (1.0) unstable; urgency=low
 
   * Add support for nokia-7215.
 
diff --git a/platform/marvell-arm64/sonic-platform-nokia/debian/compat b/platform/marvell/sonic-platform-nokia/debian/compat
similarity index 100%
rename from platform/marvell-arm64/sonic-platform-nokia/debian/compat
rename to platform/marvell/sonic-platform-nokia/debian/compat
diff --git a/platform/marvell-arm64/sonic-platform-nokia/debian/control b/platform/marvell/sonic-platform-nokia/debian/control
similarity index 60%
rename from platform/marvell-arm64/sonic-platform-nokia/debian/control
rename to platform/marvell/sonic-platform-nokia/debian/control
index acab75a48..3bdaa1973 100755
--- a/platform/marvell-arm64/sonic-platform-nokia/debian/control
+++ b/platform/marvell/sonic-platform-nokia/debian/control
@@ -1,4 +1,4 @@
-Source: sonic-platform-nokia-7215
+Source: sonic-platform-nokia
 Section: unknown
 Priority: optional
 Maintainer: Nokia <pavan.prakash@nokia.com>
@@ -6,8 +6,15 @@ Build-Depends: debhelper (>=9)
 Standards-Version: 3.9.6
 Homepage: <insert the upstream URL, if relevant>
 
+Package: sonic-platform-nokia-7215-a1
+Architecture: any
+Depends: ${misc:Depends}
+Description: <insert up to 60 chars description>
+ <insert long description, indented with spaces>
+
 Package: sonic-platform-nokia-7215
-Architecture: arm64
+Architecture: any
 Depends: ${misc:Depends}
 Description: <insert up to 60 chars description>
  <insert long description, indented with spaces>
+
diff --git a/platform/marvell-arm64/sonic-platform-nokia/debian/rules b/platform/marvell/sonic-platform-nokia/debian/rules
similarity index 51%
rename from platform/marvell-arm64/sonic-platform-nokia/debian/rules
rename to platform/marvell/sonic-platform-nokia/debian/rules
index de6ed670d..f3fe01d1b 100755
--- a/platform/marvell-arm64/sonic-platform-nokia/debian/rules
+++ b/platform/marvell/sonic-platform-nokia/debian/rules
@@ -13,11 +13,13 @@ endif
 KERNEL_SRC :=  /lib/modules/$(KVERSION)
 INSTALL_MOD_DIR := kernel/extra/
 MOD_SRC_DIR:= $(shell pwd)
-MODULE_DIRS:= 7215
+MODULE_DIRS:= 7215 7215-a1
 UTILS_DIR := utils
 MODULE_DIR:= modules
 MRVL_MODULE_DIR:= mrvl-modules
-PRESTERA_MODULE_SRC := mrvl-prestera/drivers/generic/cpssEnabler/linuxNoKernelModule/drivers
+PRESTERA_MODULE_PREFIX := mrvl-prestera/drivers/generic/
+PRESTERA_MODULE_PREFIX_ARMHF := mrvl-prestera/drivers/armhf/
+PRESTERA_MODULE_SRC := /cpssEnabler/linuxNoKernelModule/drivers/
 SERVICE_DIR := service
 PLATFORM_DIR := sonic_platform
 
@@ -28,17 +30,35 @@ clean:
 	dh_testdir
 	dh_testroot
 	dh_clean
+	(for mod in $(MODULE_DIRS); do \
+		cd $(MOD_SRC_DIR)/$${mod}; \
+		rm -rf build/; \
+		rm -rf $(MRVL_MODULE_DIR)/; \
+		rm -rf *.egg-info/; \
+		rm -f *.whl; \
+		cd $(MOD_SRC_DIR)/; \
+	done)
 
 build:
 	(for mod in $(MODULE_DIRS); do \
-		cd $(MOD_SRC_DIR)/../$(PRESTERA_MODULE_SRC)/; \
-		make clean; \
-		make modules -C $(KERNEL_SRC)/build M=`pwd` CONFIG_KM_MVPCI=y CONFIG_KM_MVINT=y || exit 1; \
-		mkdir $(MOD_SRC_DIR)/$${mod}/$(MRVL_MODULE_DIR); \
-		cp *.ko $(MOD_SRC_DIR)/$${mod}/$(MRVL_MODULE_DIR)/; \
+		mkdir -p $(MOD_SRC_DIR)/$${mod}/$(MRVL_MODULE_DIR); \
+		if [ $$mod = "7215-a1" ] && [ $(CONFIGURED_ARCH) = "arm64" ]; then \
+			cp -r $(MOD_SRC_DIR)/../$(PRESTERA_MODULE_PREFIX)/* $(MOD_SRC_DIR)/$${mod}/$(MRVL_MODULE_DIR)/; \
+			cd $(MOD_SRC_DIR)/$${mod}/$(MRVL_MODULE_DIR)/$(PRESTERA_MODULE_SRC); \
+			make clean; \
+			make modules -C $(KERNEL_SRC)/build M=`pwd` CONFIG_KM_MVPCI=y CONFIG_KM_MVINT=y || exit 1; \
+			cd $(MOD_SRC_DIR); \
+			make modules -C $(KERNEL_SRC)/build M=$(MOD_SRC_DIR)/$${mod}/modules || exit 1; \
+		elif [ $$mod = "7215" ] && [ $(CONFIGURED_ARCH) = "armhf" ]; then \
+			cp -r $(MOD_SRC_DIR)/../$(PRESTERA_MODULE_PREFIX_ARMHF)/* $(MOD_SRC_DIR)/$${mod}/$(MRVL_MODULE_DIR)/; \
+			cd $(MOD_SRC_DIR)/$${mod}/$(MRVL_MODULE_DIR)/$(PRESTERA_MODULE_SRC); \
+			make clean; \
+			make modules -C $(KERNEL_SRC)/build M=`pwd` CONFIG_KM_MVPCI=y CONFIG_KM_MVDMA=y CONFIG_KM_MVINT=y || exit 1; \
+		fi; \
+		cd $(MOD_SRC_DIR)/$${mod}; \
+		python3 setup.py build; \
+		python3 setup.py bdist_wheel -d $(MOD_SRC_DIR)/$${mod}; \
 		cd $(MOD_SRC_DIR); \
-		make modules -C $(KERNEL_SRC)/build M=$(MOD_SRC_DIR)/$${mod}/modules || exit 1; \
-		python3 $${mod}/setup.py bdist_wheel -d $(MOD_SRC_DIR)/$${mod}; \
 	done)
 
 binary: binary-arch binary-indep
@@ -59,9 +79,11 @@ binary-indep:
 		dh_installdirs -p$(PACKAGE_PRE_NAME)-$${mod} /lib/systemd/system; \
 		cp $(MOD_SRC_DIR)/$${mod}/$(SERVICE_DIR)/*.service debian/$(PACKAGE_PRE_NAME)-$${mod}/lib/systemd/system/; \
 		cp $(MOD_SRC_DIR)/$${mod}/$(UTILS_DIR)/* debian/$(PACKAGE_PRE_NAME)-$${mod}/usr/local/bin/; \
-		cp $(MOD_SRC_DIR)/$${mod}/$(MRVL_MODULE_DIR)/mvcpss.ko debian/$(PACKAGE_PRE_NAME)-$${mod}/$(KERNEL_SRC)/$(INSTALL_MOD_DIR); \
+		cp $(MOD_SRC_DIR)/$${mod}/$(MRVL_MODULE_DIR)/$(PRESTERA_MODULE_SRC)/mvcpss.ko debian/$(PACKAGE_PRE_NAME)-$${mod}/$(KERNEL_SRC)/$(INSTALL_MOD_DIR); \
 		cp $(MOD_SRC_DIR)/$${mod}/$(MODULE_DIR)/*.ko debian/$(PACKAGE_PRE_NAME)-$${mod}/$(KERNEL_SRC)/$(INSTALL_MOD_DIR); \
-		python3 $${mod}/setup.py install --root=$(MOD_SRC_DIR)/debian/$(PACKAGE_PRE_NAME)-$${mod} --install-layout=deb; \
+		cd $(MOD_SRC_DIR)/$${mod}; \
+		python3 setup.py install --root=$(MOD_SRC_DIR)/debian/$(PACKAGE_PRE_NAME)-$${mod} --install-layout=deb; \
+		cd $(MOD_SRC_DIR); \
 	done)
 
 	# Resuming debhelper scripts
diff --git a/platform/marvell/sonic-platform-nokia/debian/sonic-platform-nokia-7215-a1.install b/platform/marvell/sonic-platform-nokia/debian/sonic-platform-nokia-7215-a1.install
new file mode 100644
index 000000000..dc35c1385
--- /dev/null
+++ b/platform/marvell/sonic-platform-nokia/debian/sonic-platform-nokia-7215-a1.install
@@ -0,0 +1,6 @@
+7215-a1/scripts/nokia-7215-init.sh usr/local/bin
+7215-a1/scripts/cpu_wdt.py  usr/local/bin
+7215-a1/service/nokia-7215init.service  etc/systemd/system
+7215-a1/service/cpu_wdt.service  etc/systemd/system
+7215-a1/sonic_platform-1.0-py3-none-any.whl usr/share/sonic/device/arm64-nokia_ixs7215_52xb-r0
+../mrvl-prestera/platform/arm64/ac5x/* /
diff --git a/platform/marvell-arm64/sonic-platform-nokia/debian/sonic-platform-nokia-7215.postinst b/platform/marvell/sonic-platform-nokia/debian/sonic-platform-nokia-7215-a1.postinst
similarity index 100%
rename from platform/marvell-arm64/sonic-platform-nokia/debian/sonic-platform-nokia-7215.postinst
rename to platform/marvell/sonic-platform-nokia/debian/sonic-platform-nokia-7215-a1.postinst
diff --git a/platform/marvell-armhf/sonic-platform-nokia/debian/sonic-platform-nokia-7215.install b/platform/marvell/sonic-platform-nokia/debian/sonic-platform-nokia-7215.install
similarity index 82%
rename from platform/marvell-armhf/sonic-platform-nokia/debian/sonic-platform-nokia-7215.install
rename to platform/marvell/sonic-platform-nokia/debian/sonic-platform-nokia-7215.install
index bca328306..187c1ee4d 100644
--- a/platform/marvell-armhf/sonic-platform-nokia/debian/sonic-platform-nokia-7215.install
+++ b/platform/marvell/sonic-platform-nokia/debian/sonic-platform-nokia-7215.install
@@ -1,8 +1,8 @@
-nokia-7215_plt_setup.sh usr/sbin
+7215/scripts/nokia-7215_plt_setup.sh usr/sbin
 7215/scripts/nokia-7215init.sh  usr/local/bin
 7215/scripts/cpu_wdt.py  usr/local/bin
 7215/service/nokia-7215init.service  etc/systemd/system
 7215/service/cpu_wdt.service  etc/systemd/system
 7215/service/fstrim.timer/timer-override.conf  /lib/systemd/system/fstrim.timer.d
 7215/sonic_platform-1.0-py3-none-any.whl usr/share/sonic/device/armhf-nokia_ixs7215_52x-r0
-inband_mgmt.sh etc/
+7215/scripts/inband_mgmt.sh etc/
diff --git a/platform/marvell-armhf/sonic-platform-nokia/debian/sonic-platform-nokia-7215.postinst b/platform/marvell/sonic-platform-nokia/debian/sonic-platform-nokia-7215.postinst
similarity index 89%
rename from platform/marvell-armhf/sonic-platform-nokia/debian/sonic-platform-nokia-7215.postinst
rename to platform/marvell/sonic-platform-nokia/debian/sonic-platform-nokia-7215.postinst
index 76d40865a..9dfcc91de 100644
--- a/platform/marvell-armhf/sonic-platform-nokia/debian/sonic-platform-nokia-7215.postinst
+++ b/platform/marvell/sonic-platform-nokia/debian/sonic-platform-nokia-7215.postinst
@@ -4,6 +4,8 @@
 # see: dh_installdeb(1)
 
 sh /usr/sbin/nokia-7215_plt_setup.sh
+depmod -a
+systemctl restart kmod
 systemctl enable nokia-7215init.service
 systemctl start nokia-7215init.service
 
diff --git a/platform/marvell-arm64/sonic_fit.its b/platform/marvell/sonic_fit.its
similarity index 100%
rename from platform/marvell-arm64/sonic_fit.its
rename to platform/marvell/sonic_fit.its

From b63ea6cc866c687168e9b9e69edb47e4c8411159 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Mon, 15 Apr 2024 16:02:34 +0800
Subject: [PATCH 0440/1115] [submodule] Update submodule sonic-platform-common
 to the latest HEAD automatically (#18675)

#### Why I did it
src/sonic-platform-common
```
* dff8d48 - (HEAD -> master, origin/master, origin/HEAD) Separate common code for remote target FW upgrade supported optics (#453) (20 hours ago) [mihirpat1]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-platform-common | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-platform-common b/src/sonic-platform-common
index de130c4ab..dff8d4867 160000
--- a/src/sonic-platform-common
+++ b/src/sonic-platform-common
@@ -1 +1 @@
-Subproject commit de130c4ab347f31d190a2531d678a68b232ed66a
+Subproject commit dff8d48677836b95e788c410de404d48637bb1c1

From 7a483a797158b03a33fbd18be92073ce0021822d Mon Sep 17 00:00:00 2001
From: Junchao-Mellanox <57339448+Junchao-Mellanox@users.noreply.github.com>
Date: Mon, 15 Apr 2024 16:41:37 +0800
Subject: [PATCH 0441/1115] Add a function to get container name by asic ID
 (#18459)

- Why I did it
Get the container name for a service according to the ASIC ID

- How I did it
Add new function to get the requested data

- How to verify it
Add unit test to cover the new added function
---
 src/sonic-py-common/sonic_py_common/multi_asic.py | 13 +++++++++++++
 src/sonic-py-common/tests/multi_asic_test.py      |  6 ++++++
 2 files changed, 19 insertions(+)
 create mode 100644 src/sonic-py-common/tests/multi_asic_test.py

diff --git a/src/sonic-py-common/sonic_py_common/multi_asic.py b/src/sonic-py-common/sonic_py_common/multi_asic.py
index 92aa93463..e9d5a6555 100644
--- a/src/sonic-py-common/sonic_py_common/multi_asic.py
+++ b/src/sonic-py-common/sonic_py_common/multi_asic.py
@@ -527,6 +527,19 @@ def get_asic_presence_list():
     return asics_list
 
 
+def get_container_name_from_asic_id(service_name, asic_id):
+    """Get the container name for a service according to the ASIC ID
+
+    Args:
+        service_name (str): feature/service name
+        asic_id (int): ASIC ID
+
+    Returns:
+        str: container name of the service in the given ASIC namespace
+    """
+    return '{}{}'.format(service_name, asic_id)
+
+  
 def is_front_panel_port(port, role=None):
     """
     @summary: This function will check if the interface is a front-panel port
diff --git a/src/sonic-py-common/tests/multi_asic_test.py b/src/sonic-py-common/tests/multi_asic_test.py
new file mode 100644
index 000000000..e67c8f03c
--- /dev/null
+++ b/src/sonic-py-common/tests/multi_asic_test.py
@@ -0,0 +1,6 @@
+from sonic_py_common import multi_asic
+
+
+class TestMultiAsic:
+    def test_get_container_name_from_asic_id(self):
+        assert multi_asic.get_container_name_from_asic_id('database', 0) == 'database0'

From dd1e161ff8e7d887f7c419ef59219e4928540b65 Mon Sep 17 00:00:00 2001
From: Junchao-Mellanox <57339448+Junchao-Mellanox@users.noreply.github.com>
Date: Mon, 15 Apr 2024 16:42:39 +0800
Subject: [PATCH 0442/1115] [containercfgd] Add multi ASIC support for syslog
 rate limit feature (#18438)

- Why I did it
For multi asic platform, the container name is not the same as service name. For example, service name swss, the container in namespace asic0 will have container name swss0. This PR is to support multi ASIC platform.

- How I did it
Add a global variable service_name and use it to match DB key.

- How to verify it
Manual test
Unit test
---
 .../containercfgd/containercfgd.py                | 15 +++++++++++----
 .../tests/test_syslog_config.py                   |  1 +
 2 files changed, 12 insertions(+), 4 deletions(-)

diff --git a/src/sonic-containercfgd/containercfgd/containercfgd.py b/src/sonic-containercfgd/containercfgd/containercfgd.py
index f604034fc..9569e4b8f 100644
--- a/src/sonic-containercfgd/containercfgd/containercfgd.py
+++ b/src/sonic-containercfgd/containercfgd/containercfgd.py
@@ -23,6 +23,7 @@
 
 # Container name
 container_name = None
+service_name = None
 
 
 def run_command(command):
@@ -117,7 +118,7 @@ def handle_config(self, table, key, data):
             data (dict): Data of the entry: {<field_name>: <field_value>}
         """
         try:
-            if key != container_name:
+            if key != service_name:
                 return
             self.update_syslog_config(data)
         except Exception as e:
@@ -130,8 +131,8 @@ def handle_init_data(self, init_data):
             init_data (dict): Initial data when first time connecting to CONFIG DB. {<table_name>: {<field_name>: <field_value>}}
         """
         if SYSLOG_CONFIG_FEATURE_TABLE in init_data:
-            if container_name in init_data[SYSLOG_CONFIG_FEATURE_TABLE]:
-                self.update_syslog_config(init_data[SYSLOG_CONFIG_FEATURE_TABLE][container_name])
+            if service_name in init_data[SYSLOG_CONFIG_FEATURE_TABLE]:
+                self.update_syslog_config(init_data[SYSLOG_CONFIG_FEATURE_TABLE][service_name])
 
     def update_syslog_config(self, data):
         """Parse existing syslog conf and apply new syslog conf.
@@ -151,7 +152,7 @@ def update_syslog_config(self, data):
         if os.path.exists(self.TMP_SYSLOG_CONF_PATH):
             os.remove(self.TMP_SYSLOG_CONF_PATH)
         with open(self.TMP_SYSLOG_CONF_PATH, 'w+') as f:
-            json_args = f'{{"container_name": "{container_name}" }}'
+            json_args = f'{{"container_name": "{service_name}" }}'
             output = run_command(['sonic-cfggen', '-d', '-t', '/usr/share/sonic/templates/rsyslog-container.conf.j2', '-a', json_args])
             f.write(output)
         run_command(['cp', self.TMP_SYSLOG_CONF_PATH, self.SYSLOG_CONF_PATH])
@@ -185,7 +186,13 @@ def parse_syslog_conf(self):
 
 def main():
     global container_name
+    global service_name
+    namespace_id = os.environ['NAMESPACE_ID']
     container_name = os.environ['CONTAINER_NAME']
+    if not namespace_id:
+        service_name = container_name
+    else:
+        service_name = container_name.rstrip(namespace_id)
     daemon = ContainerConfigDaemon()
     daemon.run()
 
diff --git a/src/sonic-containercfgd/tests/test_syslog_config.py b/src/sonic-containercfgd/tests/test_syslog_config.py
index a823d9f9a..38d68270d 100644
--- a/src/sonic-containercfgd/tests/test_syslog_config.py
+++ b/src/sonic-containercfgd/tests/test_syslog_config.py
@@ -12,6 +12,7 @@
 from containercfgd import containercfgd
 
 containercfgd.container_name = 'swss'
+containercfgd.service_name = 'swss'
 
 
 def test_handle_config():

From 81d0b168539034111bdee25262dbe94f83a15c52 Mon Sep 17 00:00:00 2001
From: Neetha John <nejo@microsoft.com>
Date: Mon, 15 Apr 2024 08:52:30 -0700
Subject: [PATCH 0443/1115] Update backend acl template and unit tests (#18659)

Signed-off-by: Neetha John <nejo@microsoft.com>
---
 files/build_templates/backend_acl.j2          | 19 -------------------
 .../data/backend_acl/acl_multi_vlan.json      | 14 --------------
 .../data/backend_acl/acl_single_vlan.json     |  7 -------
 3 files changed, 40 deletions(-)

diff --git a/files/build_templates/backend_acl.j2 b/files/build_templates/backend_acl.j2
index f5468e6c1..7d4bf7cc1 100644
--- a/files/build_templates/backend_acl.j2
+++ b/files/build_templates/backend_acl.j2
@@ -1,15 +1,3 @@
-{%- set vlan2ports = {} %}
-{%- for vlan in VLAN %}
-    {% set portlist = [] %}
-    {%- for vlan_name, port in VLAN_MEMBER %}
-        {%- if vlan_name == vlan %}
-            {%- if portlist.append(port) %}{%- endif %}
-        {%- endif %}
-    {%- endfor %}
-    {%- set _ = vlan2ports.update({vlan: portlist| sort | join(',')}) %}
-{%- endfor %}
-
-
 {
         "acl": {
                 "acl-sets": {
@@ -31,13 +19,6 @@
                                                                      "config": {
                                                                              "vlan_id": "{{ vlan_entries['vlanid'] }}"
                                                                      }
-                                                             },
-                                                             "input_interface": {
-                                                                     "interface_ref": {
-                                                                             "config": {
-                                                                                     "interface": "{{ vlan2ports[vlan] }}"
-                                                                             }
-                                                                      }
                                                              }
 
                                                      }{% if not loop.last %},{% endif %} 
diff --git a/src/sonic-config-engine/tests/data/backend_acl/acl_multi_vlan.json b/src/sonic-config-engine/tests/data/backend_acl/acl_multi_vlan.json
index 53cd50d0f..32bd561b9 100644
--- a/src/sonic-config-engine/tests/data/backend_acl/acl_multi_vlan.json
+++ b/src/sonic-config-engine/tests/data/backend_acl/acl_multi_vlan.json
@@ -19,13 +19,6 @@
                                                                      "config": {
                                                                              "vlan_id": "1000"
                                                                      }
-                                                             },
-                                                             "input_interface": {
-                                                                     "interface_ref": {
-                                                                             "config": {
-                                                                                     "interface": "Ethernet12,Ethernet16,Ethernet20,Ethernet24,Ethernet28,Ethernet32,Ethernet36,Ethernet40,Ethernet44,Ethernet48,Ethernet52,Ethernet56,Ethernet60,Ethernet64,Ethernet68,Ethernet72,Ethernet76"
-                                                                             }
-                                                                      }
                                                              }
 
                                                      },                                                     "2": {
@@ -41,13 +34,6 @@
                                                                      "config": {
                                                                              "vlan_id": "2000"
                                                                      }
-                                                             },
-                                                             "input_interface": {
-                                                                     "interface_ref": {
-                                                                             "config": {
-                                                                                     "interface": "Ethernet4,Ethernet8"
-                                                                             }
-                                                                      }
                                                              }
 
                                                      }                                                 }
diff --git a/src/sonic-config-engine/tests/data/backend_acl/acl_single_vlan.json b/src/sonic-config-engine/tests/data/backend_acl/acl_single_vlan.json
index 86dcc80d0..fa132f65d 100644
--- a/src/sonic-config-engine/tests/data/backend_acl/acl_single_vlan.json
+++ b/src/sonic-config-engine/tests/data/backend_acl/acl_single_vlan.json
@@ -19,13 +19,6 @@
                                                                      "config": {
                                                                              "vlan_id": "1000"
                                                                      }
-                                                             },
-                                                             "input_interface": {
-                                                                     "interface_ref": {
-                                                                             "config": {
-                                                                                     "interface": "Ethernet12,Ethernet16,Ethernet20,Ethernet24,Ethernet28,Ethernet32,Ethernet36,Ethernet4,Ethernet40,Ethernet44,Ethernet48,Ethernet52,Ethernet56,Ethernet60,Ethernet64,Ethernet68,Ethernet72,Ethernet76,Ethernet8"
-                                                                             }
-                                                                      }
                                                              }
 
                                                      }

From 8d54b0d3af257a3a51284cb458d1ae81e4e6e1a9 Mon Sep 17 00:00:00 2001
From: Wenda Chu <32250288+w1nda@users.noreply.github.com>
Date: Mon, 15 Apr 2024 20:47:22 -0700
Subject: [PATCH 0444/1115] [dhcp_server] Adjust the dhcp_server cli data
 format to align with dhcp_cfggen (#18519)

---
 .../cli-plugin-tests/mock_config_db.json      | 23 ++++++------
 .../test_config_dhcp_server.py                | 36 +++++++++----------
 .../cli/config/plugins/dhcp_server.py         | 26 +++++++-------
 .../cli/show/plugins/show_dhcp_server.py      | 12 +++----
 4 files changed, 47 insertions(+), 50 deletions(-)

diff --git a/dockers/docker-dhcp-server/cli-plugin-tests/mock_config_db.json b/dockers/docker-dhcp-server/cli-plugin-tests/mock_config_db.json
index cf108db8b..db5516a54 100644
--- a/dockers/docker-dhcp-server/cli-plugin-tests/mock_config_db.json
+++ b/dockers/docker-dhcp-server/cli-plugin-tests/mock_config_db.json
@@ -25,7 +25,7 @@
         "lease_time": "3600",
         "mode": "PORT",
         "netmask": "255.255.255.0",
-        "customized_options": "option60",
+        "customized_options@": "option60",
         "state": "enabled"
     },
     "DHCP_SERVER_IPV4|Vlan300": {
@@ -46,33 +46,30 @@
         "value": "dummy_value"
     },
     "DHCP_SERVER_IPV4_RANGE|range1": {
-        "range": "100.1.1.3,100.1.1.5"
+        "range@": "100.1.1.3,100.1.1.5"
     },
     "DHCP_SERVER_IPV4_RANGE|range2": {
-        "range": "100.1.1.9,100.1.1.8"
+        "range@": "100.1.1.9,100.1.1.8"
     },
     "DHCP_SERVER_IPV4_RANGE|range3": {
-        "range": "100.1.1.10"
+        "range@": "100.1.1.10"
     },
     "DHCP_SERVER_IPV4_RANGE|range5": {
-        "range": "100.1.2.10"
+        "range@": "100.1.2.10"
     },
     "DHCP_SERVER_IPV4_RANGE|range6": {
-        "range": "100.1.2.11"
-    },
-    "DHCP_SERVER_IPV4_IP|eth0": {
-        "ip": "240.127.1.2"
+        "range@": "100.1.2.11"
     },
     "DHCP_SERVER_IPV4_PORT|Vlan100|Ethernet4": {
-        "ips": "100.1.1.10,100.1.1.11"
+        "ips@": "100.1.1.10,100.1.1.11"
     },
     "DHCP_SERVER_IPV4_PORT|Vlan100|Ethernet7": {
-        "ranges": "range1,range3"
+        "ranges@": "range1,range3"
     },
     "DHCP_SERVER_IPV4_PORT|Vlan200|Ethernet8": {
-        "ranges": "range5,range6"
+        "ranges@": "range5,range6"
     },
     "DHCP_SERVER_IPV4_PORT|Ethernet9": {
-        "ranges": "range5,range6"
+        "ranges@": "range5,range6"
     }
 }
diff --git a/dockers/docker-dhcp-server/cli-plugin-tests/test_config_dhcp_server.py b/dockers/docker-dhcp-server/cli-plugin-tests/test_config_dhcp_server.py
index 2871b7c06..232b435a0 100644
--- a/dockers/docker-dhcp-server/cli-plugin-tests/test_config_dhcp_server.py
+++ b/dockers/docker-dhcp-server/cli-plugin-tests/test_config_dhcp_server.py
@@ -258,7 +258,7 @@ def test_config_dhcp_server_ipv4_update_wrong_netmask(self, mock_db):
 
     def test_config_dhcp_server_ipv4_range_add(self, mock_db):
         expected_value = {
-            "range": "10.10.10.10,10.10.10.11"
+            "range@": "10.10.10.10,10.10.10.11"
         }
         runner = CliRunner()
         db = clicommon.Db()
@@ -278,7 +278,7 @@ def test_config_dhcp_server_ipv4_range_add_existing(self, mock_db):
 
     def test_config_dhcp_server_ipv4_range_add_single_ip(self, mock_db):
         expected_value = {
-            "range": "10.10.10.10,10.10.10.10"
+            "range@": "10.10.10.10,10.10.10.10"
         }
         runner = CliRunner()
         db = clicommon.Db()
@@ -306,7 +306,7 @@ def test_config_dhcp_server_ipv4_range_add_wrong_order(self, mock_db):
 
     def test_config_dhcp_server_ipv4_range_update(self, mock_db):
         expected_value = {
-            "range": "10.10.10.10,10.10.10.11"
+            "range@": "10.10.10.10,10.10.10.11"
         }
         runner = CliRunner()
         db = clicommon.Db()
@@ -326,7 +326,7 @@ def test_config_dhcp_server_ipv4_range_update_nonexisting(self, mock_db):
 
     def test_config_dhcp_server_ipv4_range_update_single_ip(self, mock_db):
         expected_value = {
-            "range": "10.10.10.10,10.10.10.10"
+            "range@": "10.10.10.10,10.10.10.10"
         }
         runner = CliRunner()
         db = clicommon.Db()
@@ -394,7 +394,7 @@ def test_config_dhcp_server_ipv4_bind_range_nonexisting(self, mock_db):
         result = runner.invoke(dhcp_server.dhcp_server.commands["ipv4"].commands["bind"], \
                 ["Vlan100", "Ethernet2", "--range", "range2,range3"], obj=db)
         assert result.exit_code == 0, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
-        result = mock_db.get("CONFIG_DB", "DHCP_SERVER_IPV4_PORT|Vlan100|Ethernet2", "ranges")
+        result = mock_db.get("CONFIG_DB", "DHCP_SERVER_IPV4_PORT|Vlan100|Ethernet2", "ranges@")
         assert result and set(result.split(",")) == set(expected_value.split(","))
 
     def test_config_dhcp_server_ipv4_bind_ip_nonexisting(self, mock_db):
@@ -405,7 +405,7 @@ def test_config_dhcp_server_ipv4_bind_ip_nonexisting(self, mock_db):
         result = runner.invoke(dhcp_server.dhcp_server.commands["ipv4"].commands["bind"], \
                 ["Vlan100", "Ethernet2", "100.1.1.1,100.1.1.2"], obj=db)
         assert result.exit_code == 0, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
-        result = mock_db.get("CONFIG_DB", "DHCP_SERVER_IPV4_PORT|Vlan100|Ethernet2", "ips")
+        result = mock_db.get("CONFIG_DB", "DHCP_SERVER_IPV4_PORT|Vlan100|Ethernet2", "ips@")
         assert result and set(result.split(",")) == set(expected_value.split(","))
 
     def test_config_dhcp_server_ipv4_bind_range_existing_no_duplicate(self, mock_db):
@@ -416,7 +416,7 @@ def test_config_dhcp_server_ipv4_bind_range_existing_no_duplicate(self, mock_db)
         result = runner.invoke(dhcp_server.dhcp_server.commands["ipv4"].commands["bind"], \
                 ["Vlan100", "Ethernet7", "--range", "range2"], obj=db)
         assert result.exit_code == 0, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
-        result = mock_db.get("CONFIG_DB", "DHCP_SERVER_IPV4_PORT|Vlan100|Ethernet7", "ranges")
+        result = mock_db.get("CONFIG_DB", "DHCP_SERVER_IPV4_PORT|Vlan100|Ethernet7", "ranges@")
         assert result and set(result.split(",")) == set(expected_value.split(","))
 
     def test_config_dhcp_server_ipv4_bind_range_existing_duplicate(self, mock_db):
@@ -427,7 +427,7 @@ def test_config_dhcp_server_ipv4_bind_range_existing_duplicate(self, mock_db):
         result = runner.invoke(dhcp_server.dhcp_server.commands["ipv4"].commands["bind"], \
                 ["Vlan100", "Ethernet7", "--range", "range2,range3"], obj=db)
         assert result.exit_code == 0, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
-        result = mock_db.get("CONFIG_DB", "DHCP_SERVER_IPV4_PORT|Vlan100|Ethernet7", "ranges")
+        result = mock_db.get("CONFIG_DB", "DHCP_SERVER_IPV4_PORT|Vlan100|Ethernet7", "ranges@")
         assert result and set(result.split(",")) == set(expected_value.split(","))
 
     def test_config_dhcp_server_ipv4_bind_ip_existing_no_duplicate(self, mock_db):
@@ -438,7 +438,7 @@ def test_config_dhcp_server_ipv4_bind_ip_existing_no_duplicate(self, mock_db):
         result = runner.invoke(dhcp_server.dhcp_server.commands["ipv4"].commands["bind"], \
                 ["Vlan100", "Ethernet4", "100.1.1.12,100.1.1.13"], obj=db)
         assert result.exit_code == 0, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
-        result = mock_db.get("CONFIG_DB", "DHCP_SERVER_IPV4_PORT|Vlan100|Ethernet4", "ips")
+        result = mock_db.get("CONFIG_DB", "DHCP_SERVER_IPV4_PORT|Vlan100|Ethernet4", "ips@")
         assert result and set(result.split(",")) == set(expected_value.split(","))
 
     def test_config_dhcp_server_ipv4_bind_ip_existing_duplicate(self, mock_db):
@@ -449,7 +449,7 @@ def test_config_dhcp_server_ipv4_bind_ip_existing_duplicate(self, mock_db):
         result = runner.invoke(dhcp_server.dhcp_server.commands["ipv4"].commands["bind"], \
                 ["Vlan100", "Ethernet4", "100.1.1.11,100.1.1.12"], obj=db)
         assert result.exit_code == 0, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
-        result = mock_db.get("CONFIG_DB", "DHCP_SERVER_IPV4_PORT|Vlan100|Ethernet4", "ips")
+        result = mock_db.get("CONFIG_DB", "DHCP_SERVER_IPV4_PORT|Vlan100|Ethernet4", "ips@")
         assert result and set(result.split(",")) == set(expected_value.split(","))
 
     def test_config_dhcp_server_ipv4_bind_nonexisting_range(self, mock_db):
@@ -524,7 +524,7 @@ def test_config_dhcp_server_ipv4_unbind_range_with_remain(self, mock_db):
         result = runner.invoke(dhcp_server.dhcp_server.commands["ipv4"].commands["unbind"], \
                 ["Vlan100", "Ethernet7", "--range", "range3"], obj=db)
         assert result.exit_code == 0, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
-        result = mock_db.get("CONFIG_DB", "DHCP_SERVER_IPV4_PORT|Vlan100|Ethernet7", "ranges")
+        result = mock_db.get("CONFIG_DB", "DHCP_SERVER_IPV4_PORT|Vlan100|Ethernet7", "ranges@")
         assert result and set(result.split(",")) == set(expected_value.split(","))
 
     def test_config_dhcp_server_ipv4_unbind_range_with_no_remain(self, mock_db):
@@ -553,7 +553,7 @@ def test_config_dhcp_server_ipv4_unbind_ip_with_remain(self, mock_db):
         result = runner.invoke(dhcp_server.dhcp_server.commands["ipv4"].commands["unbind"], \
                 ["Vlan100", "Ethernet4", "100.1.1.11"], obj=db)
         assert result.exit_code == 0, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
-        result = mock_db.get("CONFIG_DB", "DHCP_SERVER_IPV4_PORT|Vlan100|Ethernet4", "ips")
+        result = mock_db.get("CONFIG_DB", "DHCP_SERVER_IPV4_PORT|Vlan100|Ethernet4", "ips@")
         assert result and set(result.split(",")) == set(expected_value.split(","))
 
     def test_config_dhcp_server_ipv4_unbind_ip_with_no_remain(self, mock_db):
@@ -624,7 +624,7 @@ def test_config_dhcp_server_ipv4_unbind_unbind_ip(self, mock_db):
 
     def test_config_dhcp_server_ipv4_option_add(self, mock_db):
         expected_value = {
-            "option_id": "165",
+            "id": "165",
             "type": "string",
             "value": "dummy_value"
         }
@@ -700,7 +700,7 @@ def test_config_dhcp_server_ipv4_option_bind(self, mock_db):
         result = runner.invoke(dhcp_server.dhcp_server.commands["ipv4"].commands["option"].commands["bind"], \
                 ["Vlan300", "option60"], obj=db)
         assert result.exit_code == 0, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
-        assert mock_db.get("CONFIG_DB", "DHCP_SERVER_IPV4|Vlan300", "customized_options") == "option60"
+        assert mock_db.get("CONFIG_DB", "DHCP_SERVER_IPV4|Vlan300", "customized_options@") == "option60"
 
     def test_config_dhcp_server_ipv4_option_bind_multiple_options(self, mock_db):
         runner = CliRunner()
@@ -709,7 +709,7 @@ def test_config_dhcp_server_ipv4_option_bind_multiple_options(self, mock_db):
         result = runner.invoke(dhcp_server.dhcp_server.commands["ipv4"].commands["option"].commands["bind"], \
                 ["Vlan300", "option60,option61"], obj=db)
         assert result.exit_code == 0, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
-        result = mock_db.get("CONFIG_DB", "DHCP_SERVER_IPV4|Vlan300", "customized_options")
+        result = mock_db.get("CONFIG_DB", "DHCP_SERVER_IPV4|Vlan300", "customized_options@")
         assert result and set(result.split(",")) == set("option60,option61".split(","))
 
     def test_config_dhcp_server_ipv4_option_bind_to_existing(self, mock_db):
@@ -719,7 +719,7 @@ def test_config_dhcp_server_ipv4_option_bind_to_existing(self, mock_db):
         result = runner.invoke(dhcp_server.dhcp_server.commands["ipv4"].commands["option"].commands["bind"], \
                 ["Vlan100", "option61"], obj=db)
         assert result.exit_code == 0, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
-        result = mock_db.get("CONFIG_DB", "DHCP_SERVER_IPV4|Vlan100", "customized_options")
+        result = mock_db.get("CONFIG_DB", "DHCP_SERVER_IPV4|Vlan100", "customized_options@")
         assert result and set(result.split(",")) == set("option60,option61".split(","))
 
     def test_config_dhcp_server_ipv4_option_bind_same_option_to_existing(self, mock_db):
@@ -729,7 +729,7 @@ def test_config_dhcp_server_ipv4_option_bind_same_option_to_existing(self, mock_
         result = runner.invoke(dhcp_server.dhcp_server.commands["ipv4"].commands["option"].commands["bind"], \
                 ["Vlan100", "option60"], obj=db)
         assert result.exit_code == 0, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
-        assert mock_db.get("CONFIG_DB", "DHCP_SERVER_IPV4|Vlan100", "customized_options") == "option60"
+        assert mock_db.get("CONFIG_DB", "DHCP_SERVER_IPV4|Vlan100", "customized_options@") == "option60"
 
     def test_config_dhcp_server_ipv4_option_bind_to_nonexisting_intf(self, mock_db):
         runner = CliRunner()
@@ -754,7 +754,7 @@ def test_config_dhcp_server_ipv4_option_unbind(self, mock_db):
         result = runner.invoke(dhcp_server.dhcp_server.commands["ipv4"].commands["option"].commands["unbind"], \
                 ["Vlan100", "option60"], obj=db)
         assert result.exit_code == 0, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
-        result = mock_db.get("CONFIG_DB", "DHCP_SERVER_IPV4|Vlan100", "customized_options")
+        result = mock_db.get("CONFIG_DB", "DHCP_SERVER_IPV4|Vlan100", "customized_options@")
         assert result == None or result == ""
 
     def test_config_dhcp_server_ipv4_option_unbind_nonexisting_intf(self, mock_db):
diff --git a/dockers/docker-dhcp-server/cli/config/plugins/dhcp_server.py b/dockers/docker-dhcp-server/cli/config/plugins/dhcp_server.py
index 0aabf1c29..7cf149fa0 100644
--- a/dockers/docker-dhcp-server/cli/config/plugins/dhcp_server.py
+++ b/dockers/docker-dhcp-server/cli/config/plugins/dhcp_server.py
@@ -219,7 +219,7 @@ def dhcp_server_ipv4_range_add(db, range_name, ip_start, ip_end):
     if dbconn.exists("CONFIG_DB", key):
         ctx.fail("Range {} already exist".format(range_name))
     else:
-        dbconn.hmset("CONFIG_DB", key, {"range": ip_start + "," + ip_end})
+        dbconn.hmset("CONFIG_DB", key, {"range@": ip_start + "," + ip_end})
 
 
 @dhcp_server_ipv4_range.command(name="update")
@@ -238,7 +238,7 @@ def dhcp_server_ipv4_range_update(db, range_name, ip_start, ip_end):
     dbconn = db.db
     key = "DHCP_SERVER_IPV4_RANGE|" + range_name
     if dbconn.exists("CONFIG_DB", key):
-        dbconn.set("CONFIG_DB", key, "range", ip_start + "," + ip_end)
+        dbconn.set("CONFIG_DB", key, "range@", ip_start + "," + ip_end)
     else:
         ctx.fail("Range {} does not exist, cannot update".format(range_name))
 
@@ -254,7 +254,7 @@ def dhcp_sever_ipv4_range_del(db, range_name, force):
     if dbconn.exists("CONFIG_DB", key):
         if not force:
             for port in dbconn.keys("CONFIG_DB", "DHCP_SERVER_IPV4_PORT*"):
-                ranges = dbconn.get("CONFIG_DB", port, "ranges")
+                ranges = dbconn.get("CONFIG_DB", port, "ranges@")
                 if ranges and range_name in ranges.split(","):
                     ctx.fail("Range {} is referenced in {}, cannot delete, add --force to bypass or range unbind to unbind range first".format(range_name, port))
         dbconn.delete("CONFIG_DB", key)
@@ -280,7 +280,7 @@ def dhcp_server_ipv4_ip_bind(db, dhcp_interface, member_interface, range_, ip_li
         for r in range_:
             if not dbconn.exists("CONFIG_DB", "DHCP_SERVER_IPV4_RANGE|" + r):
                 ctx.fail("Cannot bind nonexistent range {} to interface".format(r))
-            ip_range = dbconn.get("CONFIG_DB", "DHCP_SERVER_IPV4_RANGE|" + r, "range").split(",")
+            ip_range = dbconn.get("CONFIG_DB", "DHCP_SERVER_IPV4_RANGE|" + r, "range@").split(",")
             if len(ip_range) == 1:
                 ip_start = ip_range[0]
                 ip_end = ip_range[0]
@@ -300,7 +300,7 @@ def dhcp_server_ipv4_ip_bind(db, dhcp_interface, member_interface, range_, ip_li
         ctx.fail("Only one of range and ip list need to be provided")
     key = "DHCP_SERVER_IPV4_PORT|" + dhcp_interface + "|" + member_interface
     key_exist = dbconn.exists("CONFIG_DB", key)
-    for bind_value_name, bind_value in [["ips", ip_list], ["ranges", range_]]:
+    for bind_value_name, bind_value in [["ips@", ip_list], ["ranges@", range_]]:
         if key_exist:
             existing_value = dbconn.get("CONFIG_DB", key, bind_value_name)
             if (not not existing_value) == (not bind_value):
@@ -330,7 +330,7 @@ def dhcp_server_ipv4_ip_unbind(db, dhcp_interface, member_interface, range_, ip_
         ctx.fail("Only one of range and ip list need to be provided")
     if not dbconn.exists("CONFIG_DB", key):
         ctx.fail("The specified dhcp_interface and member interface is not bind to ip or range")
-    for unbind_value_name, unbind_value in [["ips", ip_list], ["ranges", range_]]:
+    for unbind_value_name, unbind_value in [["ips@", ip_list], ["ranges@", range_]]:
         if unbind_value:
             unbind_value = set(unbind_value.split(","))
             existing_value = dbconn.get("CONFIG_DB", key, unbind_value_name)
@@ -372,7 +372,7 @@ def dhcp_server_ipv4_option_add(db, option_name, option_id, type_, value):
     if dbconn.exists("CONFIG_DB", key):
         ctx.fail("Option {} already exist".format(option_name))
     dbconn.hmset("CONFIG_DB", key, {
-        "option_id": option_id,
+        "id": option_id,
         "type": type_,
         "value": value,
         })
@@ -388,7 +388,7 @@ def dhcp_server_ipv4_option_del(db, option_name):
     if not dbconn.exists("CONFIG_DB", option_key):
         ctx.fail("Option {} does not exist, cannot delete".format(option_name))
     for key in dbconn.keys("CONFIG_DB", "DHCP_SERVER_IPV4|*"):
-        existing_options = dbconn.get("CONFIG_DB", key, "customized_options")
+        existing_options = dbconn.get("CONFIG_DB", key, "customized_options@")
         if existing_options and option_name in existing_options.split(","):
             ctx.fail("Option {} is referenced in {}, cannot delete".format(option_name, key[len("DHCP_SERVER_IPV4|"):]))
     dbconn.delete("CONFIG_DB", option_key)
@@ -409,10 +409,10 @@ def dhcp_server_ipv4_option_bind(db, dhcp_interface, option_list):
         option_key = "DHCP_SERVER_IPV4_CUSTOMIZED_OPTIONS|" + option_name
         if not dbconn.exists("CONFIG_DB", option_key):
             ctx.fail("Option {} does not exist, cannot bind".format(option_name))
-    existing_value = dbconn.get("CONFIG_DB", key, "customized_options")
+    existing_value = dbconn.get("CONFIG_DB", key, "customized_options@")
     value_set = set(existing_value.split(",")) if existing_value else set()
     new_value_set = value_set.union(option_list)
-    dbconn.set("CONFIG_DB", key, "customized_options", ",".join(new_value_set))
+    dbconn.set("CONFIG_DB", key, "customized_options@", ",".join(new_value_set))
 
 
 @dhcp_server_ipv4_option.command(name="unbind")
@@ -427,14 +427,14 @@ def dhcp_server_ipv4_option_unbind(db, dhcp_interface, option_list, all_):
     if not dbconn.exists("CONFIG_DB", key):
         ctx.fail("Interface {} is not valid dhcp interface".format(dhcp_interface))
     if all_:
-        dbconn.set("CONFIG_DB", key, "customized_options", "")
+        dbconn.set("CONFIG_DB", key, "customized_options@", "")
     else:
         unbind_value = set(option_list.split(","))
-        existing_value = dbconn.get("CONFIG_DB", key, "customized_options")
+        existing_value = dbconn.get("CONFIG_DB", key, "customized_options@")
         value_set = set(existing_value.split(",")) if existing_value else set()
         if value_set.issuperset(unbind_value):
             new_value_set = value_set.difference(unbind_value)
-            dbconn.set("CONFIG_DB", key, "customized_options", ",".join(new_value_set))
+            dbconn.set("CONFIG_DB", key, "customized_options@", ",".join(new_value_set))
         else:
             ctx.fail("Attempting to unbind option that is not binded")
 
diff --git a/dockers/docker-dhcp-server/cli/show/plugins/show_dhcp_server.py b/dockers/docker-dhcp-server/cli/show/plugins/show_dhcp_server.py
index 5388b4617..60bb64baf 100644
--- a/dockers/docker-dhcp-server/cli/show/plugins/show_dhcp_server.py
+++ b/dockers/docker-dhcp-server/cli/show/plugins/show_dhcp_server.py
@@ -65,7 +65,7 @@ def range(db, range_name):
     for key in dbconn.keys("CONFIG_DB", "DHCP_SERVER_IPV4_RANGE|" + range_name):
         name = key.split("|")[1]
         entry = dbconn.get_all("CONFIG_DB", key)
-        range_ = entry["range"].split(",")
+        range_ = entry["range@"].split(",")
         if len(range_) == 1:
             start, end = range_[0], range_[0]
         elif len(range_) == 2:
@@ -106,7 +106,7 @@ def info(db, dhcp_interface, with_customized_options):
         interface = key.split("|")[1]
         table.append([interface, entry["mode"], entry["gateway"], entry["netmask"], entry["lease_time"], entry["state"]])
         if with_customized_options:
-            table[-1].append(entry["customized_options"])
+            table[-1].append(entry["customized_options@"])
     click.echo(tabulate(table, headers=headers, tablefmt="grid"))
 
 
@@ -135,10 +135,10 @@ def port(db, interface):
         intf = key[len("DHCP_SERVER_IPV4_PORT|"):]
         if dhcp_interface_is_match(interface, intf):
             entry = dbconn.get_all("CONFIG_DB", key)
-            if "ranges" in entry:
-                table.append([intf, entry["ranges"].replace(",", "\n")])
-            if "ips" in entry:
-                table.append([intf, entry["ips"].replace(",", "\n")])
+            if "ranges@" in entry:
+                table.append([intf, entry["ranges@"].replace(",", "\n")])
+            if "ips@" in entry:
+                table.append([intf, entry["ips@"].replace(",", "\n")])
     click.echo(tabulate(table, headers=headers, tablefmt="grid"))
 
 

From 9c6724a1959f96cc09ee0ca4514b57e89e476d22 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Tue, 16 Apr 2024 16:05:31 +0800
Subject: [PATCH 0445/1115] [submodule] Update submodule sonic-swss-common to
 the latest HEAD automatically (#18689)

#### Why I did it
src/sonic-swss-common
```
* 5a73792 - (HEAD -> master, origin/master, origin/HEAD) [subnet_decap] Introduce subnet decap tables (#861) (33 minutes ago) [Longxiang Lyu]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-swss-common | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-swss-common b/src/sonic-swss-common
index dc9be6be9..5a737927d 160000
--- a/src/sonic-swss-common
+++ b/src/sonic-swss-common
@@ -1 +1 @@
-Subproject commit dc9be6be9387ac6fc34c5ef1bf7eb3f88d8a90a7
+Subproject commit 5a737927d3fb5763eba2f8b4cdcb89d43590c8df

From 9a3731caa7ce0440e73f33695e6cd7d5cf7037fd Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Tue, 16 Apr 2024 16:05:36 +0800
Subject: [PATCH 0446/1115] [submodule] Update submodule sonic-mgmt-common to
 the latest HEAD automatically (#18688)

#### Why I did it
src/sonic-mgmt-common
```
* 72e0df9 - (HEAD -> master, origin/master, origin/HEAD) CVL Sort issue in target TABLE with multi-list (10 hours ago) [Mohammed Faraaz]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-mgmt-common | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-mgmt-common b/src/sonic-mgmt-common
index 23d8bc1dd..72e0df920 160000
--- a/src/sonic-mgmt-common
+++ b/src/sonic-mgmt-common
@@ -1 +1 @@
-Subproject commit 23d8bc1dd0c903f5314d70cf59604f8bf439e694
+Subproject commit 72e0df92061c794eae170f299fc8f1bba3881a94

From e7cf8cf73806a3ab4e3a4cc2d707fc09db458be7 Mon Sep 17 00:00:00 2001
From: Oleksandr Ivantsiv <oivantsiv@nvidia.com>
Date: Tue, 16 Apr 2024 01:41:12 -0700
Subject: [PATCH 0447/1115] [Mellanox] Add support for new "nvidia-bluefield"
 platform. (#18466)

- Why I did it
Add support for new Nvidia-bluefield BF-3 DPU.

- How I did it
Define a new nvidia-bluefield platform with a set of makefiles to compile an image with all dependencies. Impleme PMON platform API

- How to verify it
The added changes don't affect the compilation of the existing platforms.

Signed-off-by: Oleksandr Ivantsiv <oivantsiv@nvidia.com>
---
 .../nvidia-bluefield/bfscripts/.gitignore     |   4 +
 platform/nvidia-bluefield/bfscripts/Makefile  |  41 +++
 .../bluefield-platform-modules/Makefile       |  46 +++
 .../bluefield-platform-modules/bin/bfnet.sh   |  67 ++++
 .../bin/platform-dump.sh                      |  53 +++
 .../debian/bluefield-platform-modules.install |   5 +
 .../debian/changelog                          |   5 +
 .../bluefield-platform-modules/debian/compat  |   1 +
 .../bluefield-platform-modules/debian/control |  11 +
 .../bluefield-platform-modules/debian/rules   |  19 +
 .../modprobe.d/mlx5_core.conf                 |   1 +
 .../systemd/dpu.service                       |  12 +
 .../templates/bluefield-modules.conf.j2       |  10 +
 .../bluefield-platform-modules.postinst.j2    |  18 +
 .../udev/82-net-setup-link.rules              |   2 +
 .../udev/91-tmfifo_net.rules                  |   1 +
 .../udev/92-oob_net.rules                     |   1 +
 .../docker-syncd-bluefield/Dockerfile.j2      |  59 ++++
 .../docker-syncd-bluefield/critical_processes |   0
 .../docker-syncd-bluefield/supervisord.conf   |  39 +++
 platform/nvidia-bluefield/dpu-sai/.gitignore  |   5 +
 platform/nvidia-bluefield/dpu-sai/Makefile    |  38 ++
 .../nvidia-bluefield/gpio-mlxbf3/.gitignore   |   5 +
 .../nvidia-bluefield/gpio-mlxbf3/Makefile     |  39 +++
 platform/nvidia-bluefield/mft/.gitignore      |   5 +
 platform/nvidia-bluefield/mft/Makefile        |  80 +++++
 .../nvidia-bluefield/mft/templates/control.j2 |   9 +
 .../mft/templates/postinst.j2                 |   3 +
 .../nvidia-bluefield/mft/templates/postrm.j2  |   3 +
 .../nvidia-bluefield/mlx-bootctl/.gitignore   |   5 +
 .../nvidia-bluefield/mlx-bootctl/Makefile     |  39 +++
 .../nvidia-bluefield/mlxbf-bootctl/.gitignore |   5 +
 .../nvidia-bluefield/mlxbf-bootctl/Makefile   |  39 +++
 .../nvidia-bluefield/mlxbf-gige/.gitignore    |   5 +
 platform/nvidia-bluefield/mlxbf-gige/Makefile |  39 +++
 .../nvidia-bluefield/mlxbf-pka/.gitignore     |   5 +
 platform/nvidia-bluefield/mlxbf-pka/Makefile  |  39 +++
 platform/nvidia-bluefield/mlxbf-ptm/Makefile  |  39 +++
 platform/nvidia-bluefield/modules             |   6 +
 .../pinctrl-mlxbf3/.gitignore                 |   5 +
 .../nvidia-bluefield/pinctrl-mlxbf3/Makefile  |  41 +++
 .../nvidia-bluefield/platform-api/.gitignore  |   5 +
 .../nvidia-bluefield/platform-api/pytest.ini  |  20 ++
 .../nvidia-bluefield/platform-api/setup.cfg   |   2 +
 .../nvidia-bluefield/platform-api/setup.py    |  55 +++
 .../platform-api/sonic_platform/__init__.py   |  18 +
 .../platform-api/sonic_platform/chassis.py    | 274 +++++++++++++++
 .../sonic_platform/device_data.py             |  72 ++++
 .../platform-api/sonic_platform/eeprom.py     | 314 +++++++++++++++++
 .../platform-api/sonic_platform/pcie.py       |  25 ++
 .../platform-api/sonic_platform/platform.py   |  29 ++
 .../platform-api/sonic_platform/sfp.py        | 217 ++++++++++++
 .../platform-api/sonic_platform/sfp_event.py  |  70 ++++
 .../platform-api/sonic_platform/thermal.py    |  32 ++
 .../sonic_platform/thermal_bf3.py             | 146 ++++++++
 .../throttling_checks/__init__.py             |   1 +
 .../throttling_checks/cpu_check.py            | 112 ++++++
 .../throttling_checks/ddr_check.py            |  49 +++
 .../sonic_platform/throttling_checks/utils.py |  29 ++
 .../platform-api/sonic_platform/utils.py      |  73 ++++
 .../platform-api/sonic_platform/watchdog.py   |  71 ++++
 .../platform-api/tests/__init__.py            |  16 +
 .../platform-api/tests/test_chassis.py        |  85 +++++
 .../platform-api/tests/test_eeprom.py         | 171 +++++++++
 .../platform-api/tests/test_sfp.py            |  55 +++
 .../platform-api/tests/test_sfp_event.py      | 109 ++++++
 .../platform-api/tests/test_thermal_bf3.py    |  91 +++++
 .../platform-api/tests/test_throttling.py     | 114 ++++++
 .../platform-api/tests/utils.py               | 133 +++++++
 .../nvidia-bluefield/pwr-mlxbf/.gitignore     |   5 +
 platform/nvidia-bluefield/pwr-mlxbf/Makefile  |  39 +++
 .../recipes/bluefield-soc.dep                 | 117 +++++++
 .../nvidia-bluefield/recipes/bluefield-soc.mk | 174 +++++++++
 .../recipes/docker-syncd-bluefield.dep        |  11 +
 .../recipes/docker-syncd-bluefield.mk         |  36 ++
 platform/nvidia-bluefield/recipes/dpu-sai.dep |  21 ++
 platform/nvidia-bluefield/recipes/dpu-sai.mk  |  47 +++
 platform/nvidia-bluefield/recipes/fw.dep      |  24 ++
 platform/nvidia-bluefield/recipes/fw.mk       |  42 +++
 .../recipes/get-soc-package.sh                |   9 +
 .../recipes/get_package_gh_asset_id.sh        |  32 ++
 .../recipes/get_sdk_package_version.sh        |  45 +++
 .../recipes/installer-image.dep               |   5 +
 .../recipes/installer-image.mk                |  92 +++++
 platform/nvidia-bluefield/recipes/mft.dep     |  18 +
 platform/nvidia-bluefield/recipes/mft.mk      |  44 +++
 .../nvidia-bluefield/recipes/platform-api.dep |   9 +
 .../nvidia-bluefield/recipes/platform-api.mk  |  27 ++
 platform/nvidia-bluefield/recipes/sdk.dep     | 190 ++++++++++
 platform/nvidia-bluefield/recipes/sdk.mk      | 331 ++++++++++++++++++
 platform/nvidia-bluefield/rules.dep           |  28 ++
 platform/nvidia-bluefield/rules.mk            |  39 +++
 .../sdhci-of-dwcmshc/.gitignore               |   5 +
 .../sdhci-of-dwcmshc/Makefile                 |  44 +++
 .../nvidia-bluefield/sdk-src/doca/.gitignore  |   5 +
 ...0001-Allow-compilation-with-warnings.patch |  13 +
 .../nvidia-bluefield/sdk-src/doca/Makefile    |  49 +++
 .../nvidia-bluefield/sdk-src/dpdk/.gitignore  |   5 +
 .../nvidia-bluefield/sdk-src/dpdk/Makefile    |  45 +++
 .../sdk-src/flexio/.gitignore                 |   5 +
 .../nvidia-bluefield/sdk-src/flexio/Makefile  |  48 +++
 .../nvidia-bluefield/sdk-src/grpc/.gitignore  |   5 +
 .../nvidia-bluefield/sdk-src/grpc/Makefile    |  45 +++
 .../sdk-src/mlnx-iproute2/.gitignore          |   5 +
 .../sdk-src/mlnx-iproute2/Makefile            |  46 +++
 .../nvidia-bluefield/sdk-src/ofed/.gitignore  |   5 +
 .../nvidia-bluefield/sdk-src/ofed/Makefile    |  87 +++++
 .../nvidia-bluefield/sdk-src/rdma/.gitignore  |   5 +
 .../nvidia-bluefield/sdk-src/rdma/Makefile    |  50 +++
 .../sdk-src/rxp-compiler/.gitignore           |   5 +
 .../sdk-src/rxp-compiler/Makefile             |  44 +++
 .../nvidia-bluefield/sdk-src/sdn/.gitignore   |   5 +
 .../nvidia-bluefield/sdk-src/sdn/Makefile     |  48 +++
 .../nvidia-bluefield/sdk-src/ucx/.gitignore   |   5 +
 .../nvidia-bluefield/sdk-src/ucx/Makefile     |  48 +++
 .../ucx/disable-go-bindings-generation.patch  |  11 +
 platform/nvidia-bluefield/tmfifo/.gitignore   |   5 +
 platform/nvidia-bluefield/tmfifo/Makefile     |  39 +++
 slave.mk                                      |   3 +
 119 files changed, 5302 insertions(+)
 create mode 100644 platform/nvidia-bluefield/bfscripts/.gitignore
 create mode 100644 platform/nvidia-bluefield/bfscripts/Makefile
 create mode 100644 platform/nvidia-bluefield/bluefield-platform-modules/Makefile
 create mode 100755 platform/nvidia-bluefield/bluefield-platform-modules/bin/bfnet.sh
 create mode 100755 platform/nvidia-bluefield/bluefield-platform-modules/bin/platform-dump.sh
 create mode 100644 platform/nvidia-bluefield/bluefield-platform-modules/debian/bluefield-platform-modules.install
 create mode 100644 platform/nvidia-bluefield/bluefield-platform-modules/debian/changelog
 create mode 100644 platform/nvidia-bluefield/bluefield-platform-modules/debian/compat
 create mode 100644 platform/nvidia-bluefield/bluefield-platform-modules/debian/control
 create mode 100755 platform/nvidia-bluefield/bluefield-platform-modules/debian/rules
 create mode 100644 platform/nvidia-bluefield/bluefield-platform-modules/modprobe.d/mlx5_core.conf
 create mode 100644 platform/nvidia-bluefield/bluefield-platform-modules/systemd/dpu.service
 create mode 100644 platform/nvidia-bluefield/bluefield-platform-modules/templates/bluefield-modules.conf.j2
 create mode 100644 platform/nvidia-bluefield/bluefield-platform-modules/templates/bluefield-platform-modules.postinst.j2
 create mode 100644 platform/nvidia-bluefield/bluefield-platform-modules/udev/82-net-setup-link.rules
 create mode 100644 platform/nvidia-bluefield/bluefield-platform-modules/udev/91-tmfifo_net.rules
 create mode 100644 platform/nvidia-bluefield/bluefield-platform-modules/udev/92-oob_net.rules
 create mode 100644 platform/nvidia-bluefield/docker-syncd-bluefield/Dockerfile.j2
 create mode 100644 platform/nvidia-bluefield/docker-syncd-bluefield/critical_processes
 create mode 100644 platform/nvidia-bluefield/docker-syncd-bluefield/supervisord.conf
 create mode 100644 platform/nvidia-bluefield/dpu-sai/.gitignore
 create mode 100644 platform/nvidia-bluefield/dpu-sai/Makefile
 create mode 100644 platform/nvidia-bluefield/gpio-mlxbf3/.gitignore
 create mode 100644 platform/nvidia-bluefield/gpio-mlxbf3/Makefile
 create mode 100644 platform/nvidia-bluefield/mft/.gitignore
 create mode 100644 platform/nvidia-bluefield/mft/Makefile
 create mode 100644 platform/nvidia-bluefield/mft/templates/control.j2
 create mode 100644 platform/nvidia-bluefield/mft/templates/postinst.j2
 create mode 100644 platform/nvidia-bluefield/mft/templates/postrm.j2
 create mode 100644 platform/nvidia-bluefield/mlx-bootctl/.gitignore
 create mode 100644 platform/nvidia-bluefield/mlx-bootctl/Makefile
 create mode 100644 platform/nvidia-bluefield/mlxbf-bootctl/.gitignore
 create mode 100644 platform/nvidia-bluefield/mlxbf-bootctl/Makefile
 create mode 100644 platform/nvidia-bluefield/mlxbf-gige/.gitignore
 create mode 100644 platform/nvidia-bluefield/mlxbf-gige/Makefile
 create mode 100644 platform/nvidia-bluefield/mlxbf-pka/.gitignore
 create mode 100644 platform/nvidia-bluefield/mlxbf-pka/Makefile
 create mode 100644 platform/nvidia-bluefield/mlxbf-ptm/Makefile
 create mode 100644 platform/nvidia-bluefield/modules
 create mode 100644 platform/nvidia-bluefield/pinctrl-mlxbf3/.gitignore
 create mode 100644 platform/nvidia-bluefield/pinctrl-mlxbf3/Makefile
 create mode 100644 platform/nvidia-bluefield/platform-api/.gitignore
 create mode 100644 platform/nvidia-bluefield/platform-api/pytest.ini
 create mode 100644 platform/nvidia-bluefield/platform-api/setup.cfg
 create mode 100644 platform/nvidia-bluefield/platform-api/setup.py
 create mode 100644 platform/nvidia-bluefield/platform-api/sonic_platform/__init__.py
 create mode 100644 platform/nvidia-bluefield/platform-api/sonic_platform/chassis.py
 create mode 100644 platform/nvidia-bluefield/platform-api/sonic_platform/device_data.py
 create mode 100644 platform/nvidia-bluefield/platform-api/sonic_platform/eeprom.py
 create mode 100644 platform/nvidia-bluefield/platform-api/sonic_platform/pcie.py
 create mode 100644 platform/nvidia-bluefield/platform-api/sonic_platform/platform.py
 create mode 100644 platform/nvidia-bluefield/platform-api/sonic_platform/sfp.py
 create mode 100644 platform/nvidia-bluefield/platform-api/sonic_platform/sfp_event.py
 create mode 100644 platform/nvidia-bluefield/platform-api/sonic_platform/thermal.py
 create mode 100644 platform/nvidia-bluefield/platform-api/sonic_platform/thermal_bf3.py
 create mode 100644 platform/nvidia-bluefield/platform-api/sonic_platform/throttling_checks/__init__.py
 create mode 100644 platform/nvidia-bluefield/platform-api/sonic_platform/throttling_checks/cpu_check.py
 create mode 100644 platform/nvidia-bluefield/platform-api/sonic_platform/throttling_checks/ddr_check.py
 create mode 100644 platform/nvidia-bluefield/platform-api/sonic_platform/throttling_checks/utils.py
 create mode 100644 platform/nvidia-bluefield/platform-api/sonic_platform/utils.py
 create mode 100644 platform/nvidia-bluefield/platform-api/sonic_platform/watchdog.py
 create mode 100644 platform/nvidia-bluefield/platform-api/tests/__init__.py
 create mode 100644 platform/nvidia-bluefield/platform-api/tests/test_chassis.py
 create mode 100644 platform/nvidia-bluefield/platform-api/tests/test_eeprom.py
 create mode 100644 platform/nvidia-bluefield/platform-api/tests/test_sfp.py
 create mode 100644 platform/nvidia-bluefield/platform-api/tests/test_sfp_event.py
 create mode 100644 platform/nvidia-bluefield/platform-api/tests/test_thermal_bf3.py
 create mode 100644 platform/nvidia-bluefield/platform-api/tests/test_throttling.py
 create mode 100644 platform/nvidia-bluefield/platform-api/tests/utils.py
 create mode 100644 platform/nvidia-bluefield/pwr-mlxbf/.gitignore
 create mode 100644 platform/nvidia-bluefield/pwr-mlxbf/Makefile
 create mode 100644 platform/nvidia-bluefield/recipes/bluefield-soc.dep
 create mode 100644 platform/nvidia-bluefield/recipes/bluefield-soc.mk
 create mode 100644 platform/nvidia-bluefield/recipes/docker-syncd-bluefield.dep
 create mode 100644 platform/nvidia-bluefield/recipes/docker-syncd-bluefield.mk
 create mode 100644 platform/nvidia-bluefield/recipes/dpu-sai.dep
 create mode 100644 platform/nvidia-bluefield/recipes/dpu-sai.mk
 create mode 100644 platform/nvidia-bluefield/recipes/fw.dep
 create mode 100644 platform/nvidia-bluefield/recipes/fw.mk
 create mode 100755 platform/nvidia-bluefield/recipes/get-soc-package.sh
 create mode 100755 platform/nvidia-bluefield/recipes/get_package_gh_asset_id.sh
 create mode 100755 platform/nvidia-bluefield/recipes/get_sdk_package_version.sh
 create mode 100644 platform/nvidia-bluefield/recipes/installer-image.dep
 create mode 100644 platform/nvidia-bluefield/recipes/installer-image.mk
 create mode 100644 platform/nvidia-bluefield/recipes/mft.dep
 create mode 100644 platform/nvidia-bluefield/recipes/mft.mk
 create mode 100644 platform/nvidia-bluefield/recipes/platform-api.dep
 create mode 100644 platform/nvidia-bluefield/recipes/platform-api.mk
 create mode 100644 platform/nvidia-bluefield/recipes/sdk.dep
 create mode 100644 platform/nvidia-bluefield/recipes/sdk.mk
 create mode 100644 platform/nvidia-bluefield/rules.dep
 create mode 100644 platform/nvidia-bluefield/rules.mk
 create mode 100644 platform/nvidia-bluefield/sdhci-of-dwcmshc/.gitignore
 create mode 100644 platform/nvidia-bluefield/sdhci-of-dwcmshc/Makefile
 create mode 100644 platform/nvidia-bluefield/sdk-src/doca/.gitignore
 create mode 100644 platform/nvidia-bluefield/sdk-src/doca/0001-Allow-compilation-with-warnings.patch
 create mode 100644 platform/nvidia-bluefield/sdk-src/doca/Makefile
 create mode 100644 platform/nvidia-bluefield/sdk-src/dpdk/.gitignore
 create mode 100644 platform/nvidia-bluefield/sdk-src/dpdk/Makefile
 create mode 100644 platform/nvidia-bluefield/sdk-src/flexio/.gitignore
 create mode 100644 platform/nvidia-bluefield/sdk-src/flexio/Makefile
 create mode 100644 platform/nvidia-bluefield/sdk-src/grpc/.gitignore
 create mode 100644 platform/nvidia-bluefield/sdk-src/grpc/Makefile
 create mode 100644 platform/nvidia-bluefield/sdk-src/mlnx-iproute2/.gitignore
 create mode 100644 platform/nvidia-bluefield/sdk-src/mlnx-iproute2/Makefile
 create mode 100644 platform/nvidia-bluefield/sdk-src/ofed/.gitignore
 create mode 100644 platform/nvidia-bluefield/sdk-src/ofed/Makefile
 create mode 100644 platform/nvidia-bluefield/sdk-src/rdma/.gitignore
 create mode 100644 platform/nvidia-bluefield/sdk-src/rdma/Makefile
 create mode 100644 platform/nvidia-bluefield/sdk-src/rxp-compiler/.gitignore
 create mode 100644 platform/nvidia-bluefield/sdk-src/rxp-compiler/Makefile
 create mode 100644 platform/nvidia-bluefield/sdk-src/sdn/.gitignore
 create mode 100644 platform/nvidia-bluefield/sdk-src/sdn/Makefile
 create mode 100644 platform/nvidia-bluefield/sdk-src/ucx/.gitignore
 create mode 100644 platform/nvidia-bluefield/sdk-src/ucx/Makefile
 create mode 100644 platform/nvidia-bluefield/sdk-src/ucx/disable-go-bindings-generation.patch
 create mode 100644 platform/nvidia-bluefield/tmfifo/.gitignore
 create mode 100644 platform/nvidia-bluefield/tmfifo/Makefile

diff --git a/platform/nvidia-bluefield/bfscripts/.gitignore b/platform/nvidia-bluefield/bfscripts/.gitignore
new file mode 100644
index 000000000..4ccfa41db
--- /dev/null
+++ b/platform/nvidia-bluefield/bfscripts/.gitignore
@@ -0,0 +1,4 @@
+
+*
+!.gitignore
+!Makefile
diff --git a/platform/nvidia-bluefield/bfscripts/Makefile b/platform/nvidia-bluefield/bfscripts/Makefile
new file mode 100644
index 000000000..f3c92a7b1
--- /dev/null
+++ b/platform/nvidia-bluefield/bfscripts/Makefile
@@ -0,0 +1,41 @@
+#
+# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+.ONESHELL:
+SHELL = /bin/bash
+.SHELLFLAGS += -ex
+
+$(addprefix $(DEST)/, $(MLNX_BLUEFIELD_BUILD_SCRIPTS)): $(DEST)/% :
+	rm -rf ./tmp/
+	mkdir ./tmp/
+	pushd ./tmp/
+
+	wget -O ${MLNX_BLUEFIELD_BUILD_SCRIPTS} "${BSD_BASE_URL}/build/install/distro/DEBS/${MLNX_BLUEFIELD_BUILD_SCRIPTS}"
+
+	mkdir -p bfscripts/DEBIAN
+	dpkg -e ${MLNX_BLUEFIELD_BUILD_SCRIPTS} bfscripts/DEBIAN
+	dpkg -x ${MLNX_BLUEFIELD_BUILD_SCRIPTS} bfscripts
+	rm -f ${MLNX_BLUEFIELD_BUILD_SCRIPTS}
+
+	# Remove postinst script as we don't want to enable systemd services from the package. 
+	# We are interested only in a couple of scripts that package has.
+	rm -f bfscripts/DEBIAN/postinst
+
+	dpkg -b bfscripts ./
+
+	mv ${MLNX_BLUEFIELD_BUILD_SCRIPTS} $(DEST)/
+	popd
diff --git a/platform/nvidia-bluefield/bluefield-platform-modules/Makefile b/platform/nvidia-bluefield/bluefield-platform-modules/Makefile
new file mode 100644
index 000000000..7c31ad171
--- /dev/null
+++ b/platform/nvidia-bluefield/bluefield-platform-modules/Makefile
@@ -0,0 +1,46 @@
+#
+# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+.ONESHELL:
+SHELL = /bin/bash
+.SHELLFLAGS += -e
+
+$(addprefix $(DEST)/, $(BF_PLATFORM_MODULE)): $(DEST)/% :
+
+	# Clean up
+	rm -rf drivers/* \
+		   cfg/bluefield-modules.conf \
+		   debian/bluefield-platform-modules.postinst
+
+	mkdir -p drivers/
+	mkdir -p cfg/
+
+	$(foreach kernel_module, $(BF_PLATFORM_DRIVERS), \
+		cp $(PROJECT_ROOT)/$(FILES_PATH)/$(kernel_module) drivers/
+	)
+
+	export driver_targets="$(BF_PLATFORM_DRIVERS)"
+	export kversion="$(KVERSION)"
+	j2 templates/bluefield-platform-modules.postinst.j2 > debian/bluefield-platform-modules.postinst
+	j2 templates/bluefield-modules.conf.j2 > cfg/bluefield-modules.conf
+
+	chmod +x debian/bluefield-platform-modules.postinst
+	chmod 0644 cfg/bluefield-modules.conf
+
+	DEB_BUILD_OPTIONS=nocheck dpkg-buildpackage -rfakeroot -us -uc -b -j$(SONIC_CONFIG_MAKE_JOBS)
+
+	mv ../$(BF_PLATFORM_MODULE) $(DEST)/
diff --git a/platform/nvidia-bluefield/bluefield-platform-modules/bin/bfnet.sh b/platform/nvidia-bluefield/bluefield-platform-modules/bin/bfnet.sh
new file mode 100755
index 000000000..0c74cfbe5
--- /dev/null
+++ b/platform/nvidia-bluefield/bluefield-platform-modules/bin/bfnet.sh
@@ -0,0 +1,67 @@
+#!/bin/bash
+#
+# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+cp_iface=Ethernet0
+pidfile=/run/dhcl-internal.$cp_iface.pid
+leasefile=/var/lib/dhcp/dhcl-internal.$cp_iface.leases
+
+stop_cp_dhclient()
+{
+    if [[ -f $pidfile ]]; then
+        kill $(cat $pidfile)
+	rm -f $pidfile
+    fi
+    rm -f $leasefile
+}
+
+start_cp_dhclient()
+{
+    stop_cp_dhclient
+
+    /sbin/dhclient -pf $pidfile -lf $leasefile $cp_iface -nw
+}
+
+start()
+{
+    modprobe mlx5_core
+    /usr/bin/mst start
+
+    hwsku=$(sonic-cfggen -d -v 'DEVICE_METADATA["localhost"]["hwsku"]')
+    if [[ $hwsku == *"-C1" ]]; then
+        start_cp_dhclient
+    fi
+}
+
+stop()
+{
+    stop_cp_dhclient
+
+    /usr/bin/mst stop
+    rmmod mlx5_ib mlx5_core
+}
+
+case "$1" in
+    start|stop)
+        $1
+        ;;
+    *)
+        echo "Usage: $0 {start|stop}"
+        exit 1
+        ;;
+esac
+
diff --git a/platform/nvidia-bluefield/bluefield-platform-modules/bin/platform-dump.sh b/platform/nvidia-bluefield/bluefield-platform-modules/bin/platform-dump.sh
new file mode 100755
index 000000000..80dd4e059
--- /dev/null
+++ b/platform/nvidia-bluefield/bluefield-platform-modules/bin/platform-dump.sh
@@ -0,0 +1,53 @@
+#!/bin/bash
+#
+# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+DUMP_FOLDER="/tmp/platform-dump"
+
+dump_cmd () {
+	cmd=$1
+	output_fname=$2
+	timeout=$3
+	cmd_name=${cmd%% *}
+
+	if [ -x "$(command -v $cmd_name)" ];
+	then
+		# ignore shellcheck message SC2016. Arguments should be single-quoted (')
+		run_cmd="$cmd > $DUMP_FOLDER/$output_fname"
+		timeout "$timeout" bash -c "$run_cmd"
+	fi
+}
+
+rm -rf $DUMP_FOLDER
+mkdir $DUMP_FOLDER
+
+ls -Rla /sys/ > $DUMP_FOLDER/sysfs_tree
+uname -a > $DUMP_FOLDER/sys_version
+mkdir $DUMP_FOLDER/bin/
+cp /usr/bin/platform-dump.sh $DUMP_FOLDER/bin/
+cat /etc/os-release >> $DUMP_FOLDER/sys_version
+cat /proc/interrupts > $DUMP_FOLDER/interrupts
+
+dump_cmd "dmesg" "dmesg" "10"
+dump_cmd "dmidecode -t1 -t2 -t 11" "dmidecode" "3"
+dump_cmd "lsmod" "lsmod" "3"
+dump_cmd "lspci -vvv" "lspci" "5"
+dump_cmd "top -SHb -n 1 | tail -n +8 | sort -nrk 11" "top" "5"
+dump_cmd "tail /sys/kernel/debug/mlxbf-ptm/monitors/status/*" "mlxbf-ptm-dump" "3"
+
+tar czf /tmp/platform-dump.tar.gz -C $DUMP_FOLDER .
+rm -rf $DUMP_FOLDER
diff --git a/platform/nvidia-bluefield/bluefield-platform-modules/debian/bluefield-platform-modules.install b/platform/nvidia-bluefield/bluefield-platform-modules/debian/bluefield-platform-modules.install
new file mode 100644
index 000000000..04aca12dc
--- /dev/null
+++ b/platform/nvidia-bluefield/bluefield-platform-modules/debian/bluefield-platform-modules.install
@@ -0,0 +1,5 @@
+cfg/bluefield-modules.conf etc/modules-load.d/
+udev/* etc/udev/rules.d/
+modprobe.d/* etc/modprobe.d/
+bin/* usr/bin/
+systemd/* /lib/systemd/system/
diff --git a/platform/nvidia-bluefield/bluefield-platform-modules/debian/changelog b/platform/nvidia-bluefield/bluefield-platform-modules/debian/changelog
new file mode 100644
index 000000000..2fbfbadd6
--- /dev/null
+++ b/platform/nvidia-bluefield/bluefield-platform-modules/debian/changelog
@@ -0,0 +1,5 @@
+bluefield-platform-modules (1.0) unstable; urgency=low
+
+  * Initial Release
+
+ -- Oleksandr Ivantsiv <oivantsiv@nvidia.com>  Fri, 23 Feb 2024 15:57:40 -0800
diff --git a/platform/nvidia-bluefield/bluefield-platform-modules/debian/compat b/platform/nvidia-bluefield/bluefield-platform-modules/debian/compat
new file mode 100644
index 000000000..f599e28b8
--- /dev/null
+++ b/platform/nvidia-bluefield/bluefield-platform-modules/debian/compat
@@ -0,0 +1 @@
+10
diff --git a/platform/nvidia-bluefield/bluefield-platform-modules/debian/control b/platform/nvidia-bluefield/bluefield-platform-modules/debian/control
new file mode 100644
index 000000000..74f0b1304
--- /dev/null
+++ b/platform/nvidia-bluefield/bluefield-platform-modules/debian/control
@@ -0,0 +1,11 @@
+Source: bluefield-platform-modules
+Section: main
+Priority: extra
+Maintainer: Vivek Reddy Karri <vkarri@nvidia.com>
+Build-Depends: debhelper (>= 8.0.0)
+Standards-Version: 3.9.3
+
+Package: bluefield-platform-modules
+Version: 1.0
+Architecture: arm64
+Description: Kernel modules, udev rules, and system configuration files for the Nvidia Bluefield platform.
diff --git a/platform/nvidia-bluefield/bluefield-platform-modules/debian/rules b/platform/nvidia-bluefield/bluefield-platform-modules/debian/rules
new file mode 100755
index 000000000..a48a0c1df
--- /dev/null
+++ b/platform/nvidia-bluefield/bluefield-platform-modules/debian/rules
@@ -0,0 +1,19 @@
+#!/usr/bin/make -f
+
+export INSTALL_MOD_DIR:=extra
+
+KVERSION   ?= $(shell uname -r)
+KERNEL_SRC := /lib/modules/$(KVERSION)
+MOD_SRC_DIR:= $(shell pwd)/drivers
+
+%:
+	dh $@
+
+override_dh_auto_build:
+
+override_dh_auto_install:
+	dh_installdirs -pbluefield-platform-modules $(KERNEL_SRC)/$(INSTALL_MOD_DIR);
+	cp $(MOD_SRC_DIR)/*.ko debian/bluefield-platform-modules/$(KERNEL_SRC)/$(INSTALL_MOD_DIR); 
+
+override_dh_clean:
+	dh_clean
diff --git a/platform/nvidia-bluefield/bluefield-platform-modules/modprobe.d/mlx5_core.conf b/platform/nvidia-bluefield/bluefield-platform-modules/modprobe.d/mlx5_core.conf
new file mode 100644
index 000000000..0839ec467
--- /dev/null
+++ b/platform/nvidia-bluefield/bluefield-platform-modules/modprobe.d/mlx5_core.conf
@@ -0,0 +1 @@
+blacklist mlx5_core
diff --git a/platform/nvidia-bluefield/bluefield-platform-modules/systemd/dpu.service b/platform/nvidia-bluefield/bluefield-platform-modules/systemd/dpu.service
new file mode 100644
index 000000000..e713ca18e
--- /dev/null
+++ b/platform/nvidia-bluefield/bluefield-platform-modules/systemd/dpu.service
@@ -0,0 +1,12 @@
+[Unit]
+Description=DPU initialization routine
+After=getty.target
+
+[Service]
+Type=oneshot
+ExecStartPre=/usr/bin/bfrshlog "Linux up"
+ExecStart=/usr/bin/bfrshlog "DPU is ready"
+StandardOutput=journal+console
+
+[Install]
+WantedBy=multi-user.target
diff --git a/platform/nvidia-bluefield/bluefield-platform-modules/templates/bluefield-modules.conf.j2 b/platform/nvidia-bluefield/bluefield-platform-modules/templates/bluefield-modules.conf.j2
new file mode 100644
index 000000000..cf2c95c73
--- /dev/null
+++ b/platform/nvidia-bluefield/bluefield-platform-modules/templates/bluefield-modules.conf.j2
@@ -0,0 +1,10 @@
+# /etc/modules: kernel modules to load at boot time.
+#
+# This file contains the names of kernel modules that should be loaded
+# at boot time, one per line. Lines beginning with "#" are ignored.
+
+{% if driver_targets.strip() %}
+{%- for k_module in driver_targets.strip().split() -%}
+{{ k_module.split(".")[0] }}
+{% endfor %}
+{% endif -%}
diff --git a/platform/nvidia-bluefield/bluefield-platform-modules/templates/bluefield-platform-modules.postinst.j2 b/platform/nvidia-bluefield/bluefield-platform-modules/templates/bluefield-platform-modules.postinst.j2
new file mode 100644
index 000000000..a11a4449c
--- /dev/null
+++ b/platform/nvidia-bluefield/bluefield-platform-modules/templates/bluefield-platform-modules.postinst.j2
@@ -0,0 +1,18 @@
+# postinst script for sonic-platform-modules-bluefield2
+
+set +e
+
+depmod -a
+{% if driver_targets.strip() %}
+{%- for k_module in driver_targets.strip().split() -%}
+modprobe {{ k_module.split(".")[0] }}
+{% endfor %}
+{% endif -%}
+
+sync
+
+systemctl enable serial-getty@hvc0.service
+systemctl enable serial-getty@ttyAMA0.service
+systemctl enable serial-getty@ttyAMA1.service
+
+#DEBHELPER#
diff --git a/platform/nvidia-bluefield/bluefield-platform-modules/udev/82-net-setup-link.rules b/platform/nvidia-bluefield/bluefield-platform-modules/udev/82-net-setup-link.rules
new file mode 100644
index 000000000..0a99b4044
--- /dev/null
+++ b/platform/nvidia-bluefield/bluefield-platform-modules/udev/82-net-setup-link.rules
@@ -0,0 +1,2 @@
+SUBSYSTEM=="net", ACTION=="add", DEVPATH=="/devices/pci0000:00/0000:00:00.0/0000:01:00.0/0000:02:00.0/0000:03:00.0/net/e*", ATTR{phys_port_name}=="p0", NAME="Ethernet0"
+SUBSYSTEM=="net", ACTION=="add", DEVPATH=="/devices/pci0000:00/0000:00:00.0/0000:01:00.0/0000:02:00.0/0000:03:00.1/net/e*", ATTR{phys_port_name}=="p1", NAME="Ethernet4"
diff --git a/platform/nvidia-bluefield/bluefield-platform-modules/udev/91-tmfifo_net.rules b/platform/nvidia-bluefield/bluefield-platform-modules/udev/91-tmfifo_net.rules
new file mode 100644
index 000000000..540908d69
--- /dev/null
+++ b/platform/nvidia-bluefield/bluefield-platform-modules/udev/91-tmfifo_net.rules
@@ -0,0 +1 @@
+SUBSYSTEM=="net", ACTION=="add", DEVPATH=="/devices/platform/MLNXBF01:00/virtio1/net/eth*", NAME="tmfifo_net0"
\ No newline at end of file
diff --git a/platform/nvidia-bluefield/bluefield-platform-modules/udev/92-oob_net.rules b/platform/nvidia-bluefield/bluefield-platform-modules/udev/92-oob_net.rules
new file mode 100644
index 000000000..dd0c47a4f
--- /dev/null
+++ b/platform/nvidia-bluefield/bluefield-platform-modules/udev/92-oob_net.rules
@@ -0,0 +1 @@
+SUBSYSTEM=="net", ACTION=="add", DEVPATH=="/devices/platform/MLNXBF17:00/net/e*", NAME="eth0"
diff --git a/platform/nvidia-bluefield/docker-syncd-bluefield/Dockerfile.j2 b/platform/nvidia-bluefield/docker-syncd-bluefield/Dockerfile.j2
new file mode 100644
index 000000000..e11ea978c
--- /dev/null
+++ b/platform/nvidia-bluefield/docker-syncd-bluefield/Dockerfile.j2
@@ -0,0 +1,59 @@
+##
+## Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+## Apache-2.0
+##
+## Licensed under the Apache License, Version 2.0 (the "License");
+## you may not use this file except in compliance with the License.
+## You may obtain a copy of the License at
+##
+## http://www.apache.org/licenses/LICENSE-2.0
+##
+## Unless required by applicable law or agreed to in writing, software
+## distributed under the License is distributed on an "AS IS" BASIS,
+## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+## See the License for the specific language governing permissions and
+## limitations under the License.
+##
+
+{% from "dockers/dockerfile-macros.j2" import install_debian_packages, install_python_wheels, copy_files %}
+FROM docker-config-engine-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}}
+
+ARG docker_container_name
+
+RUN [ -f /etc/rsyslog.conf ] && sed -ri "s/%syslogtag%/$docker_container_name#%syslogtag%/;" /etc/rsyslog.conf
+
+## Make apt-get non-interactive
+ENV DEBIAN_FRONTEND=noninteractive
+
+RUN apt-get update && \
+    apt-get install -y \
+        udev \
+        hwdata \
+        pciutils \
+        libpcap0.8 \
+        libxml2     \
+        python3-pip  \
+        python3-dev \
+        python3-setuptools \
+        binutils-dev \
+        ethtool
+
+{% if docker_syncd_bluefield_debs.strip() -%}
+# Copy locally-built Debian package dependencies
+{{ copy_files("debs/", docker_syncd_bluefield_debs.split(' '), "/debs/") }}
+
+# Install locally-built Debian packages and implicitly install their dependencies
+{{ install_debian_packages(docker_syncd_bluefield_debs.split(' ')) }}
+{% endif %}
+
+## Clean up
+RUN apt-get clean -y && \
+    apt-get autoclean -y && \
+    apt-get autoremove -y && \
+    rm -rf /debs
+
+COPY ["supervisord.conf", "/etc/supervisor/conf.d/"]
+COPY ["files/supervisor-proc-exit-listener", "/usr/bin"]
+COPY ["critical_processes", "/etc/supervisor/"]
+
+ENTRYPOINT ["/usr/local/bin/supervisord"]
diff --git a/platform/nvidia-bluefield/docker-syncd-bluefield/critical_processes b/platform/nvidia-bluefield/docker-syncd-bluefield/critical_processes
new file mode 100644
index 000000000..e69de29bb
diff --git a/platform/nvidia-bluefield/docker-syncd-bluefield/supervisord.conf b/platform/nvidia-bluefield/docker-syncd-bluefield/supervisord.conf
new file mode 100644
index 000000000..6fd596060
--- /dev/null
+++ b/platform/nvidia-bluefield/docker-syncd-bluefield/supervisord.conf
@@ -0,0 +1,39 @@
+[supervisord]
+logfile_maxbytes=1MB
+logfile_backups=2
+nodaemon=true
+
+[eventlistener:dependent-startup]
+command=python3 -m supervisord_dependent_startup
+autostart=true
+autorestart=unexpected
+startretries=0
+exitcodes=0,3
+events=PROCESS_STATE
+buffer_size=1024
+
+[eventlistener:supervisor-proc-exit-listener]
+command=/usr/bin/supervisor-proc-exit-listener --container-name syncd
+events=PROCESS_STATE_EXITED,PROCESS_STATE_RUNNING
+autostart=true
+autorestart=unexpected
+buffer_size=1024
+
+[program:rsyslogd]
+command=/usr/sbin/rsyslogd -n -iNONE
+priority=1
+autostart=false
+autorestart=unexpected
+stdout_logfile=syslog
+stderr_logfile=syslog
+dependent_startup=true
+
+[program:syncd]
+command=/usr/bin/syncd_start.sh
+priority=2
+autostart=false
+autorestart=false
+stdout_logfile=syslog
+stderr_logfile=syslog
+dependent_startup=true
+dependent_startup_wait_for=rsyslogd:running
diff --git a/platform/nvidia-bluefield/dpu-sai/.gitignore b/platform/nvidia-bluefield/dpu-sai/.gitignore
new file mode 100644
index 000000000..6dbdff457
--- /dev/null
+++ b/platform/nvidia-bluefield/dpu-sai/.gitignore
@@ -0,0 +1,5 @@
+# Ignore everything in this directory
+*
+# Except these files
+!.gitignore
+!Makefile
diff --git a/platform/nvidia-bluefield/dpu-sai/Makefile b/platform/nvidia-bluefield/dpu-sai/Makefile
new file mode 100644
index 000000000..c773bee1a
--- /dev/null
+++ b/platform/nvidia-bluefield/dpu-sai/Makefile
@@ -0,0 +1,38 @@
+#
+# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+.ONESHELL:
+SHELL = /bin/bash
+.SHELLFLAGS += -ex
+
+MAIN_TARGET = $(DPU_SAI)
+DERIVED_TARGETS = $(DPU_SAI_DBGSYM)
+
+$(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% :
+
+	rm -rf mlnx_sai_src
+	wget -c $(DPU_SAI_SOURCE_BASE_URL)/$(DPU_SAI_VERSION).tar.gz -O - | tar -xz --one-top-level=mlnx_sai_src
+	pushd mlnx_sai_src
+	pushd mlnx_sai
+
+	# Build the package 
+	debuild -e 'make_extra_flags="DEFS=-DACS_OS -DCONFIG_SYSLOG"' -us -uc -b -j$(SONIC_CONFIG_MAKE_JOBS) --admindir $(SONIC_DPKG_ADMINDIR)
+
+	popd
+
+	mv $* $(DERIVED_TARGETS) $(DEST)/
+	popd
diff --git a/platform/nvidia-bluefield/gpio-mlxbf3/.gitignore b/platform/nvidia-bluefield/gpio-mlxbf3/.gitignore
new file mode 100644
index 000000000..6dbdff457
--- /dev/null
+++ b/platform/nvidia-bluefield/gpio-mlxbf3/.gitignore
@@ -0,0 +1,5 @@
+# Ignore everything in this directory
+*
+# Except these files
+!.gitignore
+!Makefile
diff --git a/platform/nvidia-bluefield/gpio-mlxbf3/Makefile b/platform/nvidia-bluefield/gpio-mlxbf3/Makefile
new file mode 100644
index 000000000..1a8f580ca
--- /dev/null
+++ b/platform/nvidia-bluefield/gpio-mlxbf3/Makefile
@@ -0,0 +1,39 @@
+#
+# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+.ONESHELL:
+SHELL = /bin/bash
+.SHELLFLAGS += -ex
+
+MLXBF3_GPIO = gpio-mlxbf3-${MLXBF3_GPIO_DRIVER_VERSION}
+MODULE_DIR := $(shell pwd)/tmp/${MLXBF3_GPIO}
+GET_PACKAGE := $(shell pwd)/../recipes/get-soc-package.sh
+
+$(addprefix $(DEST)/, $(MLXBF3_GPIO_DRIVER)): $(DEST)/% :
+	rm -rf ./tmp/
+	mkdir ./tmp/
+	pushd ./tmp/
+
+	${GET_PACKAGE} ${BSD_BASE_SOURCE_URL} ${MLXBF3_GPIO}
+
+	pushd ${MLXBF3_GPIO}
+
+	# Build the package
+	make -C /lib/modules/$(KVERSION)/build M=$(MODULE_DIR)
+
+	mv ${MLXBF3_GPIO_DRIVER} $(DEST)/
+	popd
diff --git a/platform/nvidia-bluefield/mft/.gitignore b/platform/nvidia-bluefield/mft/.gitignore
new file mode 100644
index 000000000..6dbdff457
--- /dev/null
+++ b/platform/nvidia-bluefield/mft/.gitignore
@@ -0,0 +1,5 @@
+# Ignore everything in this directory
+*
+# Except these files
+!.gitignore
+!Makefile
diff --git a/platform/nvidia-bluefield/mft/Makefile b/platform/nvidia-bluefield/mft/Makefile
new file mode 100644
index 000000000..649bb99b7
--- /dev/null
+++ b/platform/nvidia-bluefield/mft/Makefile
@@ -0,0 +1,80 @@
+#
+# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+.ONESHELL:
+SHELL = /bin/bash
+.SHELLFLAGS += -e
+
+MFT_NAME = mft-$(MFT_VERSION)-$(MFT_REVISION)-arm64-deb
+MFT_TGZ = $(MFT_NAME).tgz
+
+ifeq ($(MFT_FROM_INTERNAL),y)
+MFT_TGZ_URL = $(MFT_INTERNAL_SOURCE_BASE_URL)/$(MFT_TGZ)
+else
+MFT_TGZ_URL = http://www.mellanox.com/downloads/MFT/$(MFT_TGZ)
+endif
+
+BUILD_ARCH = $(shell dpkg-architecture -qDEB_BUILD_ARCH)
+KERNEL_MFT_TARGET = kernel-mft-dkms-modules-$(KVERSION)_$(MFT_VERSION)_$(BUILD_ARCH).deb
+
+MAIN_TARGET = mft_$(MFT_VERSION)-$(MFT_REVISION)_arm64.deb
+DERIVED_TARGETS = mft-oem_$(MFT_VERSION)-$(MFT_REVISION)_arm64.deb
+
+DKMS_CTRL = /var/lib/dkms/kernel-mft-dkms/
+DKMS_TMP := $(shell mktemp -u -d -t dkms.XXXXXXXXXX)
+
+MFT_TMP = /tmp/mft_build/
+
+$(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% :
+	mkdir -p $(MFT_TMP)
+	pushd $(MFT_TMP)
+	rm -rf $(MFT_NAME)
+	wget -O $(MFT_TGZ) $(MFT_TGZ_URL)
+	tar xzf $(MFT_TGZ)
+
+	# fix timestamp because we do not actually build tools, only kernel
+	touch $(MFT_NAME)/DEBS/*.deb
+	touch $(MFT_NAME)/SDEBS/*.deb
+	mv $(MFT_NAME)/DEBS/*.deb $(DEST)
+	mv $(MFT_NAME)/SDEBS/*.deb $(DEST)
+	popd
+	rm -rf $(MFT_TMP)
+
+$(addprefix $(DEST)/, $(DERIVED_TARGETS)): $(DEST)/% : $(DEST)/$(MAIN_TARGET)
+
+$(addprefix $(DEST)/, $(KERNEL_MFT_TARGET)): $(DEST)/% :
+	# Prepare the directory to build kernel-mft-dkms-modules debian package
+	mkdir -p $(DKMS_TMP)/DEBIAN
+	mkdir -p $(DKMS_TMP)/lib/modules/$(KVERSION)/updates/dkms/
+	export kversion="$(KVERSION)"
+	export mft_version="$(MFT_VERSION)"
+	j2 templates/control.j2 > $(DKMS_TMP)/DEBIAN/control
+	j2 templates/postinst.j2 > $(DKMS_TMP)/DEBIAN/postinst
+	j2 templates/postrm.j2 > $(DKMS_TMP)/DEBIAN/postrm
+	chmod +x $(DKMS_TMP)/DEBIAN/postinst
+	chmod +x $(DKMS_TMP)/DEBIAN/postrm
+
+	sudo dkms build kernel-mft-dkms/$(MFT_VERSION) -k $(KVERSION) -a arm64
+
+	# copy the built modules
+	cp -r $(DKMS_CTRL)/kernel-$(KVERSION)*/module/*.ko \
+			$(DKMS_TMP)/lib/modules/$(KVERSION)/updates/dkms/
+
+	dpkg -b $(DKMS_TMP) .
+
+	rm -rf $(DKMS_TMP)
+
+	mv $(KERNEL_MFT_TARGET) $(DEST)
diff --git a/platform/nvidia-bluefield/mft/templates/control.j2 b/platform/nvidia-bluefield/mft/templates/control.j2
new file mode 100644
index 000000000..91334bf50
--- /dev/null
+++ b/platform/nvidia-bluefield/mft/templates/control.j2
@@ -0,0 +1,9 @@
+Package: kernel-mft-dkms-modules-{{kversion}}
+Source: kernel-mft-dkms-dkms-bin
+Version: {{mft_version}}
+Architecture: arm64
+Maintainer: Vivek Reddy <vkarri@nvidia.com>
+Provides: kernel-mft-dkms-modules
+Section: misc
+Priority: optional
+Description: kernel-mft-dkms binary drivers for linux-image-{{kversion}} Kernel
diff --git a/platform/nvidia-bluefield/mft/templates/postinst.j2 b/platform/nvidia-bluefield/mft/templates/postinst.j2
new file mode 100644
index 000000000..b0dc57909
--- /dev/null
+++ b/platform/nvidia-bluefield/mft/templates/postinst.j2
@@ -0,0 +1,3 @@
+#!/bin/sh
+set -e
+depmod -a {{kversion}}
diff --git a/platform/nvidia-bluefield/mft/templates/postrm.j2 b/platform/nvidia-bluefield/mft/templates/postrm.j2
new file mode 100644
index 000000000..b0dc57909
--- /dev/null
+++ b/platform/nvidia-bluefield/mft/templates/postrm.j2
@@ -0,0 +1,3 @@
+#!/bin/sh
+set -e
+depmod -a {{kversion}}
diff --git a/platform/nvidia-bluefield/mlx-bootctl/.gitignore b/platform/nvidia-bluefield/mlx-bootctl/.gitignore
new file mode 100644
index 000000000..6dbdff457
--- /dev/null
+++ b/platform/nvidia-bluefield/mlx-bootctl/.gitignore
@@ -0,0 +1,5 @@
+# Ignore everything in this directory
+*
+# Except these files
+!.gitignore
+!Makefile
diff --git a/platform/nvidia-bluefield/mlx-bootctl/Makefile b/platform/nvidia-bluefield/mlx-bootctl/Makefile
new file mode 100644
index 000000000..915d5cb3b
--- /dev/null
+++ b/platform/nvidia-bluefield/mlx-bootctl/Makefile
@@ -0,0 +1,39 @@
+#
+# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+.ONESHELL:
+SHELL = /bin/bash
+.SHELLFLAGS += -ex
+
+MLX_BOOTCTL = mlx-bootctl-$(MLX_BOOTCTL_DRIVER_VERSION)
+GET_PACKAGE := $(shell pwd)/../recipes/get-soc-package.sh
+
+$(addprefix $(DEST)/, $(MLX_BOOTCTL_DRIVER)): $(DEST)/% :
+	rm -rf ./tmp/
+	mkdir ./tmp/
+	pushd ./tmp/
+
+	${GET_PACKAGE} ${BSD_BASE_SOURCE_URL} ${MLX_BOOTCTL}
+
+	pushd ${MLX_BOOTCTL}  
+
+	# Build the package
+	KVER=$(KVERSION) WITH_DKMS=0 dpkg-buildpackage -rfakeroot -us -uc -b -j$(SONIC_CONFIG_MAKE_JOBS) --admindir $(SONIC_DPKG_ADMINDIR)
+	
+	mv mlxbf-bootctl.ko $(DEST)/mlx-bootctl.ko
+
+	popd
diff --git a/platform/nvidia-bluefield/mlxbf-bootctl/.gitignore b/platform/nvidia-bluefield/mlxbf-bootctl/.gitignore
new file mode 100644
index 000000000..6dbdff457
--- /dev/null
+++ b/platform/nvidia-bluefield/mlxbf-bootctl/.gitignore
@@ -0,0 +1,5 @@
+# Ignore everything in this directory
+*
+# Except these files
+!.gitignore
+!Makefile
diff --git a/platform/nvidia-bluefield/mlxbf-bootctl/Makefile b/platform/nvidia-bluefield/mlxbf-bootctl/Makefile
new file mode 100644
index 000000000..e967ffe17
--- /dev/null
+++ b/platform/nvidia-bluefield/mlxbf-bootctl/Makefile
@@ -0,0 +1,39 @@
+#
+# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+.ONESHELL:
+SHELL = /bin/bash
+.SHELLFLAGS += -ex
+
+MLXBF_BOOTCTL = mlxbf-bootctl-${MLXBF_BOOTCTL_DEB_VERSION}
+GET_PACKAGE := $(shell pwd)/../recipes/get-soc-package.sh
+
+$(addprefix $(DEST)/, $(MLXBF_BOOTCTL_DEB)): $(DEST)/% :
+	rm -rf ./tmp/
+	mkdir ./tmp/
+	pushd ./tmp/
+
+	${GET_PACKAGE} ${BSD_BASE_SOURCE_URL} ${MLXBF_BOOTCTL}
+
+	pushd ${MLXBF_BOOTCTL}
+
+	# Build the package
+	DEB_BUILD_OPTIONS=nocheck dpkg-buildpackage -rfakeroot -us -uc -b -j$(SONIC_CONFIG_MAKE_JOBS) --admindir $(SONIC_DPKG_ADMINDIR)
+
+	popd
+
+	mv $* $(DEST)/
diff --git a/platform/nvidia-bluefield/mlxbf-gige/.gitignore b/platform/nvidia-bluefield/mlxbf-gige/.gitignore
new file mode 100644
index 000000000..6dbdff457
--- /dev/null
+++ b/platform/nvidia-bluefield/mlxbf-gige/.gitignore
@@ -0,0 +1,5 @@
+# Ignore everything in this directory
+*
+# Except these files
+!.gitignore
+!Makefile
diff --git a/platform/nvidia-bluefield/mlxbf-gige/Makefile b/platform/nvidia-bluefield/mlxbf-gige/Makefile
new file mode 100644
index 000000000..d9bddb113
--- /dev/null
+++ b/platform/nvidia-bluefield/mlxbf-gige/Makefile
@@ -0,0 +1,39 @@
+#
+# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+.ONESHELL:
+SHELL = /bin/bash
+.SHELLFLAGS += -ex
+
+MLXBF_GIGE = mlxbf-gige-${MLXBF_GIGE_DRIVER_VERSION}
+MODULE_DIR := $(shell pwd)/tmp/${MLXBF_GIGE}
+GET_PACKAGE := $(shell pwd)/../recipes/get-soc-package.sh
+
+$(addprefix $(DEST)/, $(MLXBF_GIGE_DRIVER)): $(DEST)/% :
+	rm -rf ./tmp/
+	mkdir ./tmp/
+	pushd ./tmp/
+
+	${GET_PACKAGE} ${BSD_BASE_SOURCE_URL} ${MLXBF_GIGE}
+
+	pushd ${MLXBF_GIGE}
+
+	# Build the package
+	make -C /lib/modules/$(KVERSION)/build M=$(MODULE_DIR)
+
+	mv ${MLXBF_GIGE_DRIVER} $(DEST)/
+	popd
diff --git a/platform/nvidia-bluefield/mlxbf-pka/.gitignore b/platform/nvidia-bluefield/mlxbf-pka/.gitignore
new file mode 100644
index 000000000..6dbdff457
--- /dev/null
+++ b/platform/nvidia-bluefield/mlxbf-pka/.gitignore
@@ -0,0 +1,5 @@
+# Ignore everything in this directory
+*
+# Except these files
+!.gitignore
+!Makefile
diff --git a/platform/nvidia-bluefield/mlxbf-pka/Makefile b/platform/nvidia-bluefield/mlxbf-pka/Makefile
new file mode 100644
index 000000000..28a44c990
--- /dev/null
+++ b/platform/nvidia-bluefield/mlxbf-pka/Makefile
@@ -0,0 +1,39 @@
+#
+# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+.ONESHELL:
+SHELL = /bin/bash
+.SHELLFLAGS += -ex
+
+MLXBF_PKA = mlxbf-pka-${MLXBF_PKA_DRIVER_VERSION}
+MODULE_DIR := $(shell pwd)/tmp/${MLXBF_PKA}
+GET_PACKAGE := $(shell pwd)/../recipes/get-soc-package.sh
+
+$(addprefix $(DEST)/, $(MLXBF_PKA_DRIVER)): $(DEST)/% :
+	rm -rf ./tmp/
+	mkdir ./tmp/
+	pushd ./tmp/
+
+	${GET_PACKAGE} ${BSD_BASE_SOURCE_URL} ${MLXBF_PKA}
+
+	pushd ${MLXBF_PKA}
+
+	# Build the package
+	make -C /lib/modules/$(KVERSION)/build M=$(MODULE_DIR)
+
+	mv ${MLXBF_PKA_DRIVER} $(DEST)/
+	popd
diff --git a/platform/nvidia-bluefield/mlxbf-ptm/Makefile b/platform/nvidia-bluefield/mlxbf-ptm/Makefile
new file mode 100644
index 000000000..d7c779510
--- /dev/null
+++ b/platform/nvidia-bluefield/mlxbf-ptm/Makefile
@@ -0,0 +1,39 @@
+#
+# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+.ONESHELL:
+SHELL = /bin/bash
+.SHELLFLAGS += -ex
+
+MLXBF_PTM = mlxbf-ptm-${MLXBF_PTM_DRIVER_VERSION}
+MODULE_DIR := $(shell pwd)/tmp/${MLXBF_PTM}
+GET_PACKAGE := $(shell pwd)/../recipes/get-soc-package.sh
+
+$(addprefix $(DEST)/, $(MLXBF_PTM_DRIVER)): $(DEST)/% :
+	rm -rf ./tmp/
+	mkdir ./tmp/
+	pushd ./tmp/
+
+	${GET_PACKAGE} ${BSD_BASE_SOURCE_URL} ${MLXBF_PTM}
+
+	pushd ${MLXBF_PTM}
+
+	# Build the package
+	make -C /lib/modules/$(KVERSION)/build M=$(MODULE_DIR)
+
+	mv ${MLXBF_PTM_DRIVER} $(DEST)/
+	popd
diff --git a/platform/nvidia-bluefield/modules b/platform/nvidia-bluefield/modules
new file mode 100644
index 000000000..7166662dc
--- /dev/null
+++ b/platform/nvidia-bluefield/modules
@@ -0,0 +1,6 @@
+crc16
+deflate
+zlib_deflate
+ubifs
+squashfs
+sdhci-of-dwcmshc
diff --git a/platform/nvidia-bluefield/pinctrl-mlxbf3/.gitignore b/platform/nvidia-bluefield/pinctrl-mlxbf3/.gitignore
new file mode 100644
index 000000000..6dbdff457
--- /dev/null
+++ b/platform/nvidia-bluefield/pinctrl-mlxbf3/.gitignore
@@ -0,0 +1,5 @@
+# Ignore everything in this directory
+*
+# Except these files
+!.gitignore
+!Makefile
diff --git a/platform/nvidia-bluefield/pinctrl-mlxbf3/Makefile b/platform/nvidia-bluefield/pinctrl-mlxbf3/Makefile
new file mode 100644
index 000000000..ca56f30f8
--- /dev/null
+++ b/platform/nvidia-bluefield/pinctrl-mlxbf3/Makefile
@@ -0,0 +1,41 @@
+#
+# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+.ONESHELL:
+SHELL = /bin/bash
+.SHELLFLAGS += -ex
+
+MLXBF3_PINCTRL = pinctrl-mlxbf3-${MLXBF3_PINCTRL_DRIVER_VERSION}
+MODULE_DIR := $(shell pwd)/tmp/${MLXBF3_PINCTRL}
+GET_PACKAGE := $(shell pwd)/../recipes/get-soc-package.sh
+
+$(addprefix $(DEST)/, $(MLXBF3_PINCTRL_DRIVER)): $(DEST)/% :
+	rm -rf ./tmp/
+	mkdir ./tmp/
+	pushd ./tmp/
+
+	${GET_PACKAGE} ${BSD_BASE_SOURCE_URL} ${MLXBF3_PINCTRL}
+
+	pushd ${MLXBF3_PINCTRL}
+
+	patch -p1 < ../../pinctrl-mlxbf3.c.patch
+
+	# Build the package
+	make -C /lib/modules/$(KVERSION)/build M=$(MODULE_DIR)
+
+	mv ${MLXBF3_PINCTRL_DRIVER} $(DEST)/
+	popd
diff --git a/platform/nvidia-bluefield/platform-api/.gitignore b/platform/nvidia-bluefield/platform-api/.gitignore
new file mode 100644
index 000000000..6dbdff457
--- /dev/null
+++ b/platform/nvidia-bluefield/platform-api/.gitignore
@@ -0,0 +1,5 @@
+# Ignore everything in this directory
+*
+# Except these files
+!.gitignore
+!Makefile
diff --git a/platform/nvidia-bluefield/platform-api/pytest.ini b/platform/nvidia-bluefield/platform-api/pytest.ini
new file mode 100644
index 000000000..778e2b10c
--- /dev/null
+++ b/platform/nvidia-bluefield/platform-api/pytest.ini
@@ -0,0 +1,20 @@
+##
+## Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+## Apache-2.0
+##
+## Licensed under the Apache License, Version 2.0 (the "License");
+## you may not use this file except in compliance with the License.
+## You may obtain a copy of the License at
+##
+## http://www.apache.org/licenses/LICENSE-2.0
+##
+## Unless required by applicable law or agreed to in writing, software
+## distributed under the License is distributed on an "AS IS" BASIS,
+## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+## See the License for the specific language governing permissions and
+## limitations under the License.
+##
+[pytest]
+addopts = --cov=sonic_platform --cov-report html --cov-report term --cov-report xml --junitxml=test-results.xml -vv
+filterwarnings =
+    ignore::DeprecationWarning
diff --git a/platform/nvidia-bluefield/platform-api/setup.cfg b/platform/nvidia-bluefield/platform-api/setup.cfg
new file mode 100644
index 000000000..b7e478982
--- /dev/null
+++ b/platform/nvidia-bluefield/platform-api/setup.cfg
@@ -0,0 +1,2 @@
+[aliases]
+test=pytest
diff --git a/platform/nvidia-bluefield/platform-api/setup.py b/platform/nvidia-bluefield/platform-api/setup.py
new file mode 100644
index 000000000..7ef3bfd47
--- /dev/null
+++ b/platform/nvidia-bluefield/platform-api/setup.py
@@ -0,0 +1,55 @@
+#
+# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+from setuptools import setup
+
+setup(
+    name='platform-api',
+    version='1.0',
+    description='SONiC platform API implementation on NVIDIA BlueField platform',
+    license='Apache 2.0',
+    author='NVIDIA SONiC Team',
+    author_email='oivantsiv@nvidia.com',
+    url='https://github.com/Azure/sonic-buildimage',
+    maintainer='Oleksandr Ivantsiv',
+    maintainer_email='oivantsiv@nvidia.com',
+    packages=[
+        'sonic_platform',
+        'sonic_platform/throttling_checks',
+        'tests'
+    ],
+    setup_requires= [
+        'pytest-runner'
+    ],
+    tests_require = [
+        'pytest',
+        'mock>=2.0.0'
+    ],
+    classifiers=[
+        'Development Status :: 3 - Alpha',
+        'Environment :: Plugins',
+        'Intended Audience :: Developers',
+        'Intended Audience :: Information Technology',
+        'Intended Audience :: System Administrators',
+        'License :: OSI Approved :: Apache Software License',
+        'Natural Language :: English',
+        'Operating System :: POSIX :: Linux',
+        'Programming Language :: Python :: 3.7',
+        'Topic :: Utilities',
+    ],
+    keywords='sonic SONiC platform PLATFORM',
+    test_suite='setup.get_test_suite'
+)
diff --git a/platform/nvidia-bluefield/platform-api/sonic_platform/__init__.py b/platform/nvidia-bluefield/platform-api/sonic_platform/__init__.py
new file mode 100644
index 000000000..660a999a4
--- /dev/null
+++ b/platform/nvidia-bluefield/platform-api/sonic_platform/__init__.py
@@ -0,0 +1,18 @@
+#
+# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+__all__ = ["platform", "chassis"]
+from sonic_platform import *
diff --git a/platform/nvidia-bluefield/platform-api/sonic_platform/chassis.py b/platform/nvidia-bluefield/platform-api/sonic_platform/chassis.py
new file mode 100644
index 000000000..0d92a16a0
--- /dev/null
+++ b/platform/nvidia-bluefield/platform-api/sonic_platform/chassis.py
@@ -0,0 +1,274 @@
+#
+# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+try:
+    from sonic_platform_base.chassis_base import ChassisBase
+    from sonic_platform_base.watchdog_base import WatchdogBase
+    from sonic_py_common.logger import Logger
+    import os
+    from functools import reduce
+    from time import sleep
+
+    from . import utils
+    from .device_data import DeviceDataManager
+    from .sfp import Sfp
+    from .sfp_event import SfpEvent
+    from .eeprom import Eeprom
+    from .watchdog import Watchdog
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+MAX_SELECT_DELAY = 3600
+
+
+# Global logger class instance
+logger = Logger()
+
+
+class Chassis(ChassisBase):
+    """Platform-specific Chassis class"""
+
+    def __init__(self):
+        super(Chassis, self).__init__()
+
+        # Initialize DMI data
+        self.dmi_data = None
+
+        self.device_data = DeviceDataManager()
+        self._initialize_sfp()
+        self.sfp_event = None
+        self._eeprom = Eeprom()
+        self._watchdog = Watchdog()
+        logger.log_info("Chassis loaded successfully")
+
+    def _initialize_sfp(self):
+        self._sfp_list = []
+
+        sfp_count = self.get_num_sfps()
+        for index in range(sfp_count):
+            sfp_module = Sfp(index, self.device_data.get_sfp_data(index))
+            self._sfp_list.append(sfp_module)
+        self._sfp_event = SfpEvent(self._sfp_list)
+
+    def get_sfp(self, index):
+        return super(Chassis, self).get_sfp(index - 1)
+
+    def get_num_sfps(self):
+        """
+        Retrieves the number of sfps available on this chassis
+
+        Returns:
+            An integer, the number of sfps available on this chassis
+        """
+        return self.device_data.get_sfp_count()
+
+    def get_change_event(self, timeout=0):
+        """
+        Returns a nested dictionary containing all devices which have
+        experienced a change at chassis level
+
+        Args:
+            timeout: Timeout in milliseconds (optional). If timeout == 0,
+                this method will block until a change is detected.
+
+        Returns:
+            (bool, dict):
+                - True if call successful, False if not;
+                - A nested dictionary where key is a device type,
+                  value is a dictionary with key:value pairs in the format of
+                  {'device_id':'device_event'},
+                  where device_id is the device ID for this device and
+                        device_event,
+                             status='1' represents device inserted,
+                             status='0' represents device removed.
+                  Ex. {'fan':{'0':'0', '2':'1'}, 'sfp':{'11':'0'}}
+                      indicates that fan 0 has been removed, fan 2
+                      has been inserted and sfp 11 has been removed.
+        """
+
+        return self._sfp_event.get_sfp_event(timeout)
+
+    def get_eeprom(self):
+        """
+        Retrieves eeprom device on this chassis
+
+        Returns:
+            An object derived from WatchdogBase representing the hardware
+            eeprom device
+        """
+        return self._eeprom
+
+    def get_name(self):
+        """
+        Retrieves the name of the device
+
+        Returns:
+            string: The name of the device
+        """
+        return self._eeprom.get_product_name()
+
+    def get_model(self):
+        """
+        Retrieves the model number (or part number) of the device
+
+        Returns:
+            string: Model/part number of device
+        """
+        return self._eeprom.get_part_number()
+
+    def get_base_mac(self):
+        """
+        Retrieves the base MAC address for the chassis
+
+        Returns:
+            A string containing the MAC address in the format
+            'XX:XX:XX:XX:XX:XX'
+        """
+        return self._eeprom.get_base_mac()
+
+    def get_serial(self):
+        """
+        Retrieves the hardware serial number for the chassis
+
+        Returns:
+            A string containing the hardware serial number for this chassis.
+        """
+        return self._eeprom.get_serial_number()
+
+    def get_system_eeprom_info(self):
+        """
+        Retrieves the full content of system EEPROM information for the chassis
+
+        Returns:
+            A dictionary where keys are the type code defined in
+            OCP ONIE TlvInfo EEPROM format and values are their corresponding
+            values.
+        """
+        return self._eeprom.get_system_eeprom_info()
+
+    def get_revision(self):
+        """
+        Retrieves the hardware revision of the device
+
+        Returns:
+            string: Revision value of device
+        """
+        return self._eeprom.get_revision()
+
+    def get_position_in_parent(self):
+        """
+        Retrieves 1-based relative physical position in parent device. If the agent cannot determine the parent-relative position
+        for some reason, or if the associated value of entPhysicalContainedIn is '0', then the value '-1' is returned
+        Returns:
+            integer: The 1-based relative physical position in parent device or -1 if cannot determine the position
+        """
+        return -1
+
+    def is_replaceable(self):
+        """
+        Indicate whether this device is replaceable.
+        Returns:
+            bool: True if it is replaceable.
+        """
+        return False
+
+    ##############################################
+    # THERMAL methods
+    ##############################################
+
+    def initialize_thermals(self):
+        if not self._thermal_list:
+            from .thermal import initialize_chassis_thermals
+            # Initialize thermals
+            self._thermal_list = initialize_chassis_thermals()
+
+    def get_num_thermals(self):
+        """
+        Retrieves the number of thermals available on this chassis
+
+        Returns:
+            An integer, the number of thermals available on this chassis
+        """
+        self.initialize_thermals()
+        return len(self._thermal_list)
+
+    def get_all_thermals(self):
+        """
+        Retrieves all thermals available on this chassis
+
+        Returns:
+            A list of objects derived from ThermalBase representing all thermals
+            available on this chassis
+        """
+        self.initialize_thermals()
+        return self._thermal_list
+
+    def get_thermal(self, index):
+        """
+        Retrieves thermal unit represented by (0-based) index <index>
+
+        Args:
+            index: An integer, the index (0-based) of the thermal to
+            retrieve
+
+        Returns:
+            An object derived from ThermalBase representing the specified thermal
+        """
+        self.initialize_thermals()
+        return super(Chassis, self).get_thermal(index)
+
+    ##############################################
+    # System LED methods
+    ##############################################
+
+    def initizalize_system_led(self):
+        pass
+
+    def set_status_led(self, color):
+        """
+        Sets the state of the system LED
+
+        Args:
+            color: A string representing the color with which to set the
+                   system LED
+
+        Returns:
+            bool: True if system LED state is set successfully, False if not
+        """
+        return False
+
+    def get_status_led(self):
+        """
+        Gets the state of the system LED
+
+        Returns:
+            A string, one of the valid LED color strings which could be vendor
+            specified.
+        """
+        return 'N/A'
+
+    def get_reboot_cause(self):
+        """
+        Retrieves the cause of the previous reboot
+        Returns:
+            A tuple (string, string) where the first element is a string
+            containing the cause of the previous reboot. This string must be
+            one of the predefined strings in this class. If the first string
+            is "REBOOT_CAUSE_HARDWARE_OTHER", the second string can be used
+            to pass a description of the reboot cause.
+        """
+        return "N/A", "N/A"
diff --git a/platform/nvidia-bluefield/platform-api/sonic_platform/device_data.py b/platform/nvidia-bluefield/platform-api/sonic_platform/device_data.py
new file mode 100644
index 000000000..c4d3e902f
--- /dev/null
+++ b/platform/nvidia-bluefield/platform-api/sonic_platform/device_data.py
@@ -0,0 +1,72 @@
+#
+# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+import glob
+import os
+import json
+from enum import Enum
+from sonic_py_common import device_info
+
+from . import utils
+
+
+class SfpData:
+
+    def __init__(self, name, thermals=None):
+        self.name = name
+        self.thermals = thermals
+
+
+class DeviceDataManager:
+
+    def __init__(self):
+        self._platform = device_info.get_platform()
+        self._platform_dir = device_info.get_path_to_platform_dir()
+
+        platform_json = os.path.join(self._platform_dir, device_info.PLATFORM_JSON_FILE)
+        if not os.path.isfile(platform_json):
+            raise RuntimeError("{} file does not exists".format(platform_json))
+
+        platform_data = json.loads(open(platform_json).read())
+        self._chassis = platform_data.get('chassis')
+        if not self._chassis:
+            raise RuntimeError("Chassis data is not found in {} file".format(device_info.PLATFORM_JSON_FILE))
+
+        self._interfaces = platform_data.get('interfaces')
+        if not self._interfaces:
+            raise RuntimeError("Interfaces data is not found in {} file".format(device_info.PLATFORM_JSON_FILE))
+
+    def get_platform_name(self):
+        return self._chassis['name']
+
+    def get_fan_drawer_count(self):
+        return len(self._chassis['fan_drawers'])
+
+    def get_fan_count(self):
+        return len(self._chassis['fans'])
+
+    def get_psu_count(self):
+        return len(self._chassis['psus'])
+
+    def get_sfp_count(self):
+        return len(self._chassis['sfps'])
+
+    def get_sfp_data(self, sfp_index):
+        if sfp_index >= len(self._chassis['sfps']):
+            raise RuntimeError("Wrong SFP index: {}".format(sfp_index))
+        sfp_data = self._chassis['sfps'][sfp_index]
+        return SfpData(**sfp_data)
diff --git a/platform/nvidia-bluefield/platform-api/sonic_platform/eeprom.py b/platform/nvidia-bluefield/platform-api/sonic_platform/eeprom.py
new file mode 100644
index 000000000..1d924b917
--- /dev/null
+++ b/platform/nvidia-bluefield/platform-api/sonic_platform/eeprom.py
@@ -0,0 +1,314 @@
+#
+# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+from functools import reduce
+import re
+import enum
+import subprocess
+
+from sonic_py_common.logger import Logger
+try:
+    from sonic_platform_base.sonic_eeprom.eeprom_tlvinfo import TlvInfoDecoder
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+from .utils import default_return
+
+logger = Logger()
+
+
+class Vpd:
+
+    class VpdAttrs(enum.Enum):
+        product_name_id = 0
+        part_number_id = 1
+        revision = 2
+        serian_number = 3
+        connectx_fw_ver = 4
+        board_id = 5
+        node_guid = 6
+        sys_image_guid = 7
+
+    vpd_attrs_map = {
+        ('IDTAG', 'Board Id'): VpdAttrs.product_name_id,
+        ('PN', 'Part Number'): VpdAttrs.part_number_id,
+        ('EC', 'Revision'): VpdAttrs.revision,
+        ('SN', 'Serial Number'): VpdAttrs.serian_number,
+    }
+
+    def __init__(self, fwmngr):
+        self.fwmngr = fwmngr
+        self.vpd_attrs = {}
+
+    def _read_raw(self):
+        p = subprocess.Popen(
+            ["mlxvpd", "-d", self.fwmngr.get_pci_dev_name()],
+                stdout=subprocess.PIPE, stderr=subprocess.PIPE)
+        raw_data, err = p.communicate()
+
+        if err:
+            raise RuntimeError(err.decode())
+
+        return raw_data.decode().split('\n')
+
+    def _read(self):
+        vpd_attrs = {}
+
+        for line in self._read_raw():
+            line = line.strip()
+            if not line:
+                continue
+
+            for (vpd, descr), idx in self.vpd_attrs_map.items():
+                match = re.search(f'{vpd}\s+{descr}', line)
+                if not match:
+                    continue
+                vpd_attrs[idx] = line.replace(match.group(), '').strip()
+
+        return vpd_attrs
+
+    def _get_vpd_attrs(self):
+        if not self.vpd_attrs:
+            self.vpd_attrs = self._read()
+
+        return self.vpd_attrs
+
+    def get_serial_number(self):
+        self._get_vpd_attrs()
+        return self.vpd_attrs[self.VpdAttrs.serian_number]
+
+    def get_product_name(self):
+        self._get_vpd_attrs()
+        return self.vpd_attrs[self.VpdAttrs.product_name_id]
+
+    def get_part_number(self):
+        self._get_vpd_attrs()
+        return self.vpd_attrs[self.VpdAttrs.part_number_id]
+
+    def get_revision(self):
+        self._get_vpd_attrs()
+        return self.vpd_attrs[self.VpdAttrs.revision]
+
+
+class FwManager:
+
+    class FwInfo(enum.Enum):
+        base_mac = 0
+        pci_dev_name = 1
+
+    fw_info_fields_map = {
+        'Base MAC': FwInfo.base_mac,
+        'PCI Device Name': FwInfo.pci_dev_name
+    }
+
+    def __init__(self):
+        self._fw_info = {}
+
+    def _read_fw_info_raw(self):
+        p = subprocess.Popen(
+            "mlxfwmanager", shell=True, stdout=subprocess.PIPE, stderr=subprocess.PIPE)
+        raw_data, err = p.communicate()
+
+        if err:
+            raise RuntimeError(err.decode())
+
+        return raw_data.decode().split('\n')
+
+    def _read_fw_info(self):
+        fw_info = {}
+
+        for line in self._read_fw_info_raw():
+            line = line.strip()
+            if not line:
+                continue
+
+            line = line.split(': ')
+            if len(line) != 2 or line[0] not in self.fw_info_fields_map:
+                continue
+
+            fw_info[self.fw_info_fields_map[line[0]]] = line[1].strip()
+
+        return fw_info
+
+    def _get_fw_info(self):
+        if not self._fw_info:
+            self._fw_info = self._read_fw_info()
+
+        return self._fw_info
+
+    def get_base_mac(self):
+        self._get_fw_info()
+        mac = self._fw_info[self.FwInfo.base_mac]
+        return ":".join([mac[i] + mac[i + 1] for i in range(0, len(mac), 2)])
+
+    def get_pci_dev_name(self):
+        self._get_fw_info()
+        return self._fw_info[self.FwInfo.pci_dev_name]
+
+
+class Eeprom(TlvInfoDecoder):
+
+    def __init__(self):
+        self._fwmngr = FwManager()
+        self._vpd = Vpd(self._fwmngr)
+        self._eeprom_info_dict = None
+        self._eeprom_raw = None
+        super(Eeprom, self).__init__('', 0, '', True)
+
+    @default_return(return_value='Undefined.')
+    def get_base_mac(self):
+        """
+        Retrieves the base MAC address for the chassis
+
+        Returns:
+            A string containing the MAC address in the format
+            'XX:XX:XX:XX:XX:XX'
+        """
+        return self._get_eeprom_value(self._TLV_CODE_MAC_BASE)
+
+    @default_return(return_value='Undefined.')
+    def get_serial_number(self):
+        """
+        Retrieves the hardware serial number for the chassis
+
+        Returns:
+            A string containing the hardware serial number for this chassis.
+        """
+        return self._get_eeprom_value(self._TLV_CODE_SERIAL_NUMBER)
+
+    @default_return(return_value='Undefined.')
+    def get_product_name(self):
+        """
+        Retrieves the hardware product name for the chassis
+
+        Returns:
+            A string containing the hardware product name for this chassis.
+        """
+        return self._get_eeprom_value(self._TLV_CODE_PRODUCT_NAME)
+
+    @default_return(return_value='Undefined.')
+    def get_part_number(self):
+        """
+        Retrieves the hardware part number for the chassis
+
+        Returns:
+            A string containing the hardware part number for this chassis.
+        """
+        return self._get_eeprom_value(self._TLV_CODE_PART_NUMBER)
+
+    @default_return(return_value='Undefined.')
+    def get_revision(self):
+        """
+        Retrieves the hardware revision of the device
+
+        Returns:
+            string: Revision value of device
+        """
+        return self._get_eeprom_value(self._TLV_CODE_LABEL_REVISION)
+
+    @default_return({})
+    def get_system_eeprom_info(self):
+        """
+        Retrieves the full content of system EEPROM information for the chassis
+
+        Returns:
+            A dictionary where keys are the type code defined in
+            OCP ONIE TlvInfo EEPROM format and values are their corresponding
+            values.
+        """
+        if not self._eeprom_info_dict:
+            self._eeprom_init()
+        return self._eeprom_info_dict
+
+    def _get_eeprom_value(self, code):
+        """Helper function to help get EEPROM data by code
+
+        Args:
+            code (int): EEPROM TLV code
+
+        Returns:
+            str: value of EEPROM TLV
+        """
+        eeprom_info_dict = self.get_system_eeprom_info()
+        return eeprom_info_dict[hex(code)]
+
+    def _eeprom_init_raw(self, tlvs_info):
+        """Initializes the _eeprom_raw by encoding tlvs_info's values via TlvInfoDecoder.encoder
+
+        Args:
+            tlvs_info (dict): EEPROM TLV types and values
+
+        Returns:
+            int: EEPROM CRC
+        """
+        encoded = [self.encoder((k,), tlvs_info[k]) for k in sorted(tlvs_info.keys())]
+        tlvs = reduce(lambda x,y: x+y, encoded)
+
+        # adding TLV_CODE_CRC_32 [type, len] for checksum calculation
+        tlvs += bytearray([self._TLV_CODE_CRC_32]) + bytearray([4])
+
+        # 4 extra bytes for checksum value that is calculated and added later
+        tlvs_len = len(tlvs) + 4
+
+        tlvs_len_header = bytearray([(tlvs_len >> 8) & 0xFF]) + bytearray([tlvs_len & 0xFF])
+        header = self._TLV_INFO_ID_STRING + bytearray([self._TLV_INFO_VERSION]) + tlvs_len_header
+        raw = header + tlvs
+        checksum = self.calculate_checksum(raw)
+        raw += self.encode_checksum(checksum)
+        self._eeprom_raw = raw
+        return checksum
+
+    def _epprom_data_get(self):
+        data = {}
+        db_initialized = self._redis_hget('EEPROM_INFO|State', 'Initialized')
+        if db_initialized == '1':
+            tlvs = [self._TLV_CODE_PRODUCT_NAME,
+                    self._TLV_CODE_PART_NUMBER,
+                    self._TLV_CODE_SERIAL_NUMBER,
+                    self._TLV_CODE_MAC_BASE,
+                    self._TLV_CODE_LABEL_REVISION]
+            for code in tlvs:
+                value = self._redis_hget('EEPROM_INFO|{}'.format(hex(code)), 'Value')
+                if value:
+                    data[code] = value
+        else:
+            data = {
+                self._TLV_CODE_PRODUCT_NAME: self._vpd.get_product_name(),
+                self._TLV_CODE_PART_NUMBER: self._vpd.get_part_number(),
+                self._TLV_CODE_SERIAL_NUMBER: self._vpd.get_serial_number(),
+                self._TLV_CODE_MAC_BASE: self._fwmngr.get_base_mac(),
+                self._TLV_CODE_LABEL_REVISION: self._vpd.get_revision(),
+            }
+        return data
+
+    def _eeprom_init(self):
+        """Initializes the _eeprom_raw and _eeprom_info_dict via data retrieved from Vpd and FwManager
+
+        """
+        eeprom_data = self._epprom_data_get()
+        checksum = self._eeprom_init_raw(eeprom_data)
+
+        self._eeprom_info_dict = dict([(hex(k), v) for k,v in eeprom_data.items()])
+        self._eeprom_info_dict[hex(self._TLV_CODE_CRC_32)] = checksum
+
+    def read_eeprom(self):
+        """Overrides the TlvInfoDecoder.read_eeprom so the EPPROM is read from _eeprom_raw instead of a file
+
+        """
+        if not self._eeprom_raw:
+            self._eeprom_init()
+        return self._eeprom_raw
diff --git a/platform/nvidia-bluefield/platform-api/sonic_platform/pcie.py b/platform/nvidia-bluefield/platform-api/sonic_platform/pcie.py
new file mode 100644
index 000000000..f98ffa60e
--- /dev/null
+++ b/platform/nvidia-bluefield/platform-api/sonic_platform/pcie.py
@@ -0,0 +1,25 @@
+#
+# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+try:
+    from sonic_platform_base.sonic_pcie.pcie_common import PcieUtil
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+class Pcie(PcieUtil):
+    def __init__(self, path):
+        super().__init__(path)
diff --git a/platform/nvidia-bluefield/platform-api/sonic_platform/platform.py b/platform/nvidia-bluefield/platform-api/sonic_platform/platform.py
new file mode 100644
index 000000000..bf38d6dd0
--- /dev/null
+++ b/platform/nvidia-bluefield/platform-api/sonic_platform/platform.py
@@ -0,0 +1,29 @@
+#
+# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+try:
+    from sonic_platform_base.platform_base import PlatformBase
+    from .chassis import Chassis
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+
+class Platform(PlatformBase):
+
+    def __init__(self):
+        PlatformBase.__init__(self)
+        self._chassis = Chassis()
diff --git a/platform/nvidia-bluefield/platform-api/sonic_platform/sfp.py b/platform/nvidia-bluefield/platform-api/sonic_platform/sfp.py
new file mode 100644
index 000000000..c0e881db1
--- /dev/null
+++ b/platform/nvidia-bluefield/platform-api/sonic_platform/sfp.py
@@ -0,0 +1,217 @@
+#
+# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+try:
+    import os
+    import time
+    import subprocess
+    import mmap
+    from sonic_platform_base.sonic_xcvr.sfp_optoe_base import SfpOptoeBase
+
+except ImportError as err:
+    raise ImportError(str(err) + "- required module not found")
+
+SFP_TYPE_LIST = [
+    '0x3'  # SFP/SFP+/SFP28 and later
+]
+QSFP_TYPE_LIST = [
+    '0xc',  # QSFP
+    '0xd',  # QSFP+ or later
+    '0x11'  # QSFP28 or later
+]
+QSFP_DD_TYPE_LIST = [
+    '0x18'  # QSFP_DD Type
+]
+
+EEPROM_ETHTOOL_READ_RETRIES = 5
+
+
+def check_ethtool_link_detected(name):
+    ethtool_cmd = ["ethtool", name]
+
+    try:
+        output = subprocess.check_output(ethtool_cmd,
+                                         stderr=subprocess.DEVNULL,
+                                         universal_newlines=True)
+        output_lines = output.splitlines()
+        link_detected_info = next(filter(lambda x: x.strip().startswith('Link detected:'), output_lines), None)
+        if not link_detected_info:
+            return False
+
+        link_detected_val = link_detected_info.strip().split(':')[1].strip()
+        return link_detected_val == 'yes'
+
+    except subprocess.CalledProcessError as e:
+        return False
+
+
+def read_eeprom_ethtool(name, offset, num_bytes):
+    eeprom_raw = []
+    ethtool_cmd = ["ethtool", "-m", name, "hex", "on", "offset", str(offset), "length", str(num_bytes)]
+    try:
+        output = subprocess.check_output(ethtool_cmd,
+                                         stderr=subprocess.DEVNULL,
+                                         universal_newlines=True)
+        output_lines = output.splitlines()
+        first_line_raw = output_lines[0]
+        if "Offset" in first_line_raw:
+            for line in output_lines[2:]:
+                line_split = line.split()
+                eeprom_raw = eeprom_raw + line_split[1:]
+    except subprocess.CalledProcessError as e:
+        return None
+    eeprom_raw = map(lambda h: int(h, base=16), eeprom_raw)
+    return bytearray(eeprom_raw)
+
+
+class Sfp(SfpOptoeBase):
+
+    def __init__(self, index, sfp_data):
+        """
+        SFP init
+        """
+        SfpOptoeBase.__init__(self)
+        self.index = index
+        self.data = sfp_data
+
+    def get_name(self):
+        """
+        Returns native transceiver type
+        """
+        raise NotImplementedError()
+
+    def read_eeprom(self, offset, num_bytes):
+        """
+        read eeprom specific bytes beginning from a random offset with size as num_bytes
+
+        Args:
+             offset :
+                     Integer, the offset from which the read transaction will start
+             num_bytes:
+                     Integer, the number of bytes to be read
+
+        Returns:
+            bytearray, if raw sequence of bytes are read correctly from the offset of size num_bytes
+            None, if the read_eeprom fails
+        """
+        if not check_ethtool_link_detected(self.data.name):
+            return None
+
+        # Temporary workaround to address instability
+        for _ in range(EEPROM_ETHTOOL_READ_RETRIES):
+            eeprom = read_eeprom_ethtool(self.data.name, offset, num_bytes)
+            if eeprom:
+                return eeprom
+        return None
+
+    def write_eeprom(self, offset, num_bytes, write_buffer):
+        """
+        write eeprom specific bytes beginning from a random offset with size as num_bytes
+        and write_buffer as the required bytes
+
+        Args:
+             offset :
+                     Integer, the offset from which the read transaction will start
+             num_bytes:
+                     Integer, the number of bytes to be written
+             write_buffer:
+                     bytearray, raw bytes buffer which is to be written beginning at the offset
+
+        Returns:
+            a Boolean, true if the write succeeded and false if it did not succeed.
+        """
+        raise NotImplementedError()
+
+    def get_presence(self):
+        """
+        Retrieves the presence of the sfp
+
+        Returns:
+            True if sfp is present and false if it is absent
+        """
+        eeprom_raw = self.read_eeprom(0, 1)
+
+        return eeprom_raw is not None
+
+    def get_reset_status(self):
+        """
+        Retrieves the reset status of SFP
+
+        Returns:
+            A Boolean, True if reset enabled, False if disabled
+        """
+        raise NotImplementedError()
+
+    def get_lpmode(self):
+        """
+        Retrieves the lpmode (low power mode) status of this SFP
+
+        Returns:
+            A Boolean, True if lpmode is enabled, False if disabled
+        """
+        raise NotImplementedError()
+
+    def reset(self):
+        """
+        Reset SFP and return all user module settings to their default rate.
+
+        Returns:
+            A boolean, True if successful, False if not
+        """
+        raise NotImplementedError()
+
+    def set_lpmode(self, lpmode):
+        """
+        Sets the lpmode (low power mode) of SFP
+
+        Args:
+            lpmode: A Boolean, True to enable lpmode, False to disable it
+            Note  : lpmode can be overridden by set_power_override
+
+        Returns:
+            A boolean, True if lpmode is set successfully, False if not
+        """
+        raise NotImplementedError()
+
+    def get_position_in_parent(self):
+        """
+        Retrieves 1-based relative physical position in parent device.
+        Returns:
+            integer: The 1-based relative physical position in parent
+            device or -1 if cannot determine the position
+        """
+        return self.index
+
+    @staticmethod
+    def is_replaceable():
+        """
+        Indicate whether this device is replaceable.
+        Returns:
+            bool: True if it is replaceable.
+        """
+        return True
+
+    def get_error_description(self):
+        """
+        Retrieves the error descriptions of the SFP module
+
+        Returns:
+            String that represents the current error descriptions of vendor specific errors
+            In case there are multiple errors, they should be joined by '|',
+            like: "Bad EEPROM|Unsupported cable"
+        """
+        raise NotImplementedError()
diff --git a/platform/nvidia-bluefield/platform-api/sonic_platform/sfp_event.py b/platform/nvidia-bluefield/platform-api/sonic_platform/sfp_event.py
new file mode 100644
index 000000000..2fe970991
--- /dev/null
+++ b/platform/nvidia-bluefield/platform-api/sonic_platform/sfp_event.py
@@ -0,0 +1,70 @@
+#
+# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+import time
+
+
+POLL_INTERVAL_IN_SEC = 1
+
+
+class SfpEvent:
+    ''' Listen to insert/remove sfp events '''
+
+    def __init__(self, sfp_list):
+        self._sfp_list = sfp_list
+        self._present_ports = 0
+
+    def get_presence_bitmap(self):
+        bitmap = 0
+        for sfp in self._sfp_list:
+            modpres = sfp.get_presence()
+            if modpres:
+                bitmap = bitmap | (1 << sfp.index)
+        return bitmap
+
+    def get_sfp_event(self, timeout=2000):
+        port_dict = {}
+        change_dict = {'sfp': port_dict}
+
+        if timeout < 1000:
+            cd_ms = 1000
+        else:
+            cd_ms = timeout
+
+        while cd_ms > 0:
+            bitmap = self.get_presence_bitmap()
+            changed_ports = self._present_ports ^ bitmap
+            if changed_ports != 0:
+                break
+            time.sleep(POLL_INTERVAL_IN_SEC)
+            # timeout=0 means wait for event forever
+            if timeout != 0:
+                cd_ms = cd_ms - POLL_INTERVAL_IN_SEC * 1000
+
+        if not changed_ports:
+            return True, change_dict
+
+        for sfp in self._sfp_list:
+            if (changed_ports & (1 << sfp.index)):
+                if (bitmap & (1 << sfp.index)) == 0:
+                    port_dict[sfp.index + 1] = '0'
+                else:
+                    port_dict[sfp.index + 1] = '1'
+
+        # Update the cache dict
+        self._present_ports = bitmap
+        return True, change_dict
diff --git a/platform/nvidia-bluefield/platform-api/sonic_platform/thermal.py b/platform/nvidia-bluefield/platform-api/sonic_platform/thermal.py
new file mode 100644
index 000000000..8fdbfd38f
--- /dev/null
+++ b/platform/nvidia-bluefield/platform-api/sonic_platform/thermal.py
@@ -0,0 +1,32 @@
+#
+# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+#############################################################################
+# Mellanox
+#
+# Module contains an implementation of SONiC Platform Base API and
+# provides the thermals data which are available in the platform
+#
+#############################################################################
+
+try:
+    from .thermal_bf3 import initialize_chassis_thermals as bf3_init
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+
+def initialize_chassis_thermals():
+    return bf3_init()
diff --git a/platform/nvidia-bluefield/platform-api/sonic_platform/thermal_bf3.py b/platform/nvidia-bluefield/platform-api/sonic_platform/thermal_bf3.py
new file mode 100644
index 000000000..c769a5e37
--- /dev/null
+++ b/platform/nvidia-bluefield/platform-api/sonic_platform/thermal_bf3.py
@@ -0,0 +1,146 @@
+#
+# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+try:
+    from sonic_platform_base.thermal_base import ThermalBase
+    from sonic_py_common.logger import Logger
+    import os
+except ImportError as e:
+    raise ImportError (str(e) + "- required module not found")
+
+# Global logger class instance
+logger = Logger()
+
+MLXBF_BASE_PATH = '/sys/kernel/debug/mlxbf-ptm/monitors/status'
+
+SENSORS = [
+    {'name': 'CPU', 'mlxbf_sensor_name': 'core_temp', 'ht': 95, 'cht': 100},
+    {'name': 'DDR', 'mlxbf_sensor_name': 'ddr_temp', 'ht': 95, 'cht': 100},
+    {'name': 'SFP0', 'iface': 'Ethernet0', 'hwmon_path': None},
+    {'name': 'SFP1', 'iface': 'Ethernet4', 'hwmon_path': None},
+]
+
+def set_hwmon_path(sensor):
+    base = f'/sys/class/net/{sensor["iface"]}/device/hwmon'
+    dirs = os.listdir(base)
+    if len(dirs) != 1 or not dirs[0].startswith('hwmon'):
+        logger.log_error(f'Failed to find hwmon path for {sensor["iface"]}')
+        return
+    sensor['hwmon_path'] = f'{base}/{dirs[0]}'
+
+def initialize_chassis_thermals():
+    thermal_list = []
+    for s in SENSORS:
+        if 'hwmon_path' in s:
+            set_hwmon_path(s)
+        thermal_list.append(Thermal(**s))
+    return thermal_list
+
+def read_fs(path, name):
+    try:
+        with open(path) as f:
+            return float(f.readline().strip())
+    except Exception as e:
+        logger.log_error(f'Failed to read {name} - {str(e)}')
+        return 'N/A'
+
+def read_temp_mlxbf(sensor_name):
+    path = f'{MLXBF_BASE_PATH}/{sensor_name}'
+    return read_fs(path, sensor_name)
+
+def read_temp_hwmon(hwmon_path, sensor):
+    if not hwmon_path:
+        return 'N/A'
+    path = f'{hwmon_path}/{sensor}'
+    v = read_fs(path, sensor)
+    if v == 'N/A':
+        return v
+    return v / 1000
+
+class Thermal(ThermalBase):
+    def __init__(self, name, mlxbf_sensor_name=None, iface=None, hwmon_path=None, ht='N/A', cht='N/A'):
+        super(Thermal, self).__init__()
+        self.name = name
+        self.mlxbf_sensor_name = mlxbf_sensor_name
+        self.hwmon_path = hwmon_path
+        self.ht = ht
+        self.cht = cht
+
+    def get_name(self):
+        """
+        Retrieves the name of the device
+
+        Returns:
+            string: The name of the device
+        """
+        return self.name
+
+    def get_temperature(self):
+        """
+        Retrieves current temperature reading from thermal
+
+        Returns:
+            A float number of current temperature in Celsius up to nearest thousandth
+            of one degree Celsius, e.g. 30.125
+        """
+        if self.mlxbf_sensor_name:
+            return read_temp_mlxbf(self.mlxbf_sensor_name)
+        else:
+            return read_temp_hwmon(self.hwmon_path, 'temp1_input')
+
+    def get_high_threshold(self):
+        """
+        Retrieves the high threshold temperature of thermal
+
+        Returns:
+            A float number, the high threshold temperature of thermal in Celsius
+            up to nearest thousandth of one degree Celsius, e.g. 30.125
+        """
+        return self.ht
+
+    def get_high_critical_threshold(self):
+        """
+        Retrieves the high critical threshold temperature of thermal
+
+        Returns:
+            A float number, the high critical threshold temperature of thermal in Celsius
+            up to nearest thousandth of one degree Celsius, e.g. 30.125
+        """
+        if self.hwmon_path:
+            return read_temp_hwmon(self.hwmon_path, 'temp1_crit')
+        else:
+            return self.cht
+
+    def get_low_threshold(self):
+        """
+        Retrieves the low threshold temperature of thermal
+
+        Returns:
+            A float number, the low threshold temperature of thermal in Celsius
+            up to nearest thousandth of one degree Celsius, e.g. 30.125
+        """
+        return 'N/A'
+
+    def get_low_critical_threshold(self):
+        """
+        Retrieves the low critical threshold temperature of thermal
+
+        Returns:
+            A float number, the low critical threshold temperature of thermal in Celsius
+            up to nearest thousandth of one degree Celsius, e.g. 30.125
+        """
+        return 'N/A'
diff --git a/platform/nvidia-bluefield/platform-api/sonic_platform/throttling_checks/__init__.py b/platform/nvidia-bluefield/platform-api/sonic_platform/throttling_checks/__init__.py
new file mode 100644
index 000000000..3e5937ef9
--- /dev/null
+++ b/platform/nvidia-bluefield/platform-api/sonic_platform/throttling_checks/__init__.py
@@ -0,0 +1 @@
+__all__ = ['cpu_check', 'ddr_check']
diff --git a/platform/nvidia-bluefield/platform-api/sonic_platform/throttling_checks/cpu_check.py b/platform/nvidia-bluefield/platform-api/sonic_platform/throttling_checks/cpu_check.py
new file mode 100644
index 000000000..279b4e7e7
--- /dev/null
+++ b/platform/nvidia-bluefield/platform-api/sonic_platform/throttling_checks/cpu_check.py
@@ -0,0 +1,112 @@
+#
+# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+import os
+from sonic_py_common.logger import Logger
+from pathlib import Path
+from enum import Enum, auto
+from .utils import MLXBF_SENSOR_PATH, LAST_VALUES_STORAGE_PATH, read_sensor
+
+SYSLOG_IDENTIFIER = os.path.basename(__file__)
+logger = Logger(SYSLOG_IDENTIFIER)
+
+
+class CheckResult(Enum):
+    OK = auto()
+    THROTTLED_NOW = auto()
+    THROTTLED_BETWEEN_CHECKS = auto()
+    RECOVERED = auto()
+
+
+class CPUThrottlingChecker:
+    fs_read_max_attempts = 3
+
+    def __init__(self, sensor_path = MLXBF_SENSOR_PATH, storage_path = LAST_VALUES_STORAGE_PATH):
+        self._sensor_path = sensor_path
+        self._storage_path = storage_path
+
+    def _read_count_and_state_fs(self, path, ttype, ok_if_not_found = False):
+        count_path = f'{path}/{ttype}_throttling_event_count'
+        state_path = f'{path}/{ttype}_throttling_state'
+
+        # read count/state/count to avoid race condition
+        for _ in range(CPUThrottlingChecker.fs_read_max_attempts):
+            count = read_sensor(count_path, ok_if_not_found)
+            state = read_sensor(state_path, ok_if_not_found)
+            count_again = read_sensor(count_path, ok_if_not_found)
+            if count == count_again:
+                return count, state
+
+        raise Exception(f'Failed to read {ttype} state - inconsistent  state during read attempt')
+
+    def _read_count_and_state(self, ttype):
+        return self._read_count_and_state_fs(self._sensor_path, ttype)
+
+    def _read_last_count_and_state(self, ttype):
+        return self._read_count_and_state_fs(self._storage_path, ttype, ok_if_not_found=True)
+
+    def _save_count_and_state(self, ttype, count, state):
+        count_path = f'{self._storage_path}/{ttype}_throttling_event_count'
+        state_path = f'{self._storage_path}/{ttype}_throttling_state'
+
+        Path(self._storage_path).mkdir(exist_ok=True)
+
+        with open(count_path, 'w+') as f:
+            f.write(str(count))
+
+        with open(state_path, 'w+') as f:
+            f.write(str(state))
+
+    def _check_throttling_type(self, ttype) -> CheckResult:
+        count, state = self._read_count_and_state(ttype)
+        last_count, last_state = self._read_last_count_and_state(ttype)
+        self._save_count_and_state(ttype, count, state)
+
+        if state > 1:
+            return CheckResult.THROTTLED_NOW
+
+        # no previous state saved (first run)
+        if last_state is None:
+            return CheckResult.OK
+
+        if last_state == 1:
+            if count != last_count:
+                logger.log_warning(f'CPU was {ttype} throttled')
+                return CheckResult.THROTTLED_BETWEEN_CHECKS
+        else:
+            logger.log_warning(f'CPU has recovered from {ttype} throttling')
+            return CheckResult.RECOVERED
+
+    def check(self):
+        status = 'OK'
+        try:
+            thermal_check = self._check_throttling_type('thermal')
+            power_check = self._check_throttling_type('power')
+            if thermal_check == CheckResult.THROTTLED_NOW or power_check == CheckResult.THROTTLED_NOW:
+                status = 'Throttled'
+        except Exception as e:
+            logger.log_error(f'Failed to check CPU throttling: {e}')
+        return f'Throttling\nCPU:{status}'
+
+
+def main():
+    checker = CPUThrottlingChecker()
+    print(checker.check())
+
+
+if __name__ == '__main__':
+    main()
diff --git a/platform/nvidia-bluefield/platform-api/sonic_platform/throttling_checks/ddr_check.py b/platform/nvidia-bluefield/platform-api/sonic_platform/throttling_checks/ddr_check.py
new file mode 100644
index 000000000..c3dd65c0e
--- /dev/null
+++ b/platform/nvidia-bluefield/platform-api/sonic_platform/throttling_checks/ddr_check.py
@@ -0,0 +1,49 @@
+#
+# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+import os
+from sonic_py_common.logger import Logger
+from .utils import MLXBF_SENSOR_PATH, DDR_THROTTLING_THRESHOLD, read_sensor
+
+SYSLOG_IDENTIFIER = os.path.basename(__file__)
+logger = Logger(SYSLOG_IDENTIFIER)
+
+
+class DDRThrottlingChecker:
+
+    def __init__(self, sensor_path = MLXBF_SENSOR_PATH):
+        self._sensor_path = sensor_path
+
+    def check(self):
+        status = 'OK'
+        try:
+            temp = read_sensor(f'{self._sensor_path}/ddr_temp')
+            if temp >= DDR_THROTTLING_THRESHOLD:
+                status = 'Throttled'
+        except Exception as e:
+            logger.log_error(f'Failed to check DDR throttling: {e}')
+        return f'Throttling\nDDR:{status}'
+
+
+def main():
+    checker = DDRThrottlingChecker()
+    print(checker.check())
+
+
+if __name__ == '__main__':
+    main()
+
diff --git a/platform/nvidia-bluefield/platform-api/sonic_platform/throttling_checks/utils.py b/platform/nvidia-bluefield/platform-api/sonic_platform/throttling_checks/utils.py
new file mode 100644
index 000000000..05025d610
--- /dev/null
+++ b/platform/nvidia-bluefield/platform-api/sonic_platform/throttling_checks/utils.py
@@ -0,0 +1,29 @@
+#
+# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+MLXBF_SENSOR_PATH = '/sys/kernel/debug/mlxbf-ptm/monitors/status'
+LAST_VALUES_STORAGE_PATH = '/var/run/mlxbf-last-read/'
+DDR_THROTTLING_THRESHOLD = 95
+
+def read_sensor(path, ok_if_not_found = False):
+    try:
+        with open(path) as f:
+            return int(f.readline().strip())
+    except OSError:
+        if ok_if_not_found:
+            return None
+        raise Exception(f'Could not read the {path}')
diff --git a/platform/nvidia-bluefield/platform-api/sonic_platform/utils.py b/platform/nvidia-bluefield/platform-api/sonic_platform/utils.py
new file mode 100644
index 000000000..d6bf6809f
--- /dev/null
+++ b/platform/nvidia-bluefield/platform-api/sonic_platform/utils.py
@@ -0,0 +1,73 @@
+#
+# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+import functools
+import subprocess
+from sonic_py_common.logger import Logger
+
+logger = Logger()
+
+
+def read_only_cache():
+    """Decorator to cache return value for a method/function once.
+       This decorator should be used for method/function when:
+       1. Executing the method/function takes time. e.g. reading sysfs.
+       2. The return value of this method/function never changes.
+    """
+    def decorator(method):
+        method.return_value = None
+
+        @functools.wraps(method)
+        def _impl(*args, **kwargs):
+            if not method.return_value:
+                method.return_value = method(*args, **kwargs)
+            return method.return_value
+        return _impl
+    return decorator
+
+
+@read_only_cache()
+def is_host():
+    """
+    Test whether current process is running on the host or an docker
+    return True for host and False for docker
+    """
+    try:
+        proc = subprocess.Popen("docker --version 2>/dev/null",
+                                stdout=subprocess.PIPE,
+                                shell=True,
+                                stderr=subprocess.STDOUT,
+                                universal_newlines=True)
+        stdout = proc.communicate()[0]
+        proc.wait()
+        result = stdout.rstrip('\n')
+        return result != ''
+    except OSError as e:
+        return False
+
+
+def default_return(return_value, log_func=logger.log_debug):
+    def wrapper(method):
+        @functools.wraps(method)
+        def _impl(*args, **kwargs):
+            try:
+                return method(*args, **kwargs)
+            except Exception as e:
+                if log_func:
+                    log_func('Faield to execute method {} - {}'.format(method.__name__, repr(e)))
+                return return_value
+        return _impl
+    return wrapper
diff --git a/platform/nvidia-bluefield/platform-api/sonic_platform/watchdog.py b/platform/nvidia-bluefield/platform-api/sonic_platform/watchdog.py
new file mode 100644
index 000000000..ca8b95745
--- /dev/null
+++ b/platform/nvidia-bluefield/platform-api/sonic_platform/watchdog.py
@@ -0,0 +1,71 @@
+#
+# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+
+try:
+    from sonic_platform_base.watchdog_base import WatchdogBase
+    from sonic_py_common.logger import Logger
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+
+class Watchdog(WatchdogBase):
+    """Placeholder for watchdog implementation"""
+
+    def arm(self, seconds):
+        """
+        Arm the hardware watchdog with a timeout of <seconds> seconds.
+        If the watchdog is currently armed, calling this function will
+        simply reset the timer to the provided value. If the underlying
+        hardware does not support the value provided in <seconds>, this
+        method should arm the watchdog with the *next greater* available
+        value.
+
+        Returns:
+            An integer specifying the *actual* number of seconds the watchdog
+            was armed with. On failure returns -1.
+        """
+        return -1
+
+    def disarm(self):
+        """
+        Disarm the hardware watchdog
+
+        Returns:
+            A boolean, True if watchdog is disarmed successfully, False if not
+        """
+        return False
+
+    def is_armed(self):
+        """
+        Retrieves the armed state of the hardware watchdog.
+
+        Returns:
+            A boolean, True if watchdog is armed, False if not
+        """
+        return False
+
+    def get_remaining_time(self):
+        """
+        If the watchdog is armed, retrieve the number of seconds remaining on
+        the watchdog timer
+
+        Returns:
+            An integer specifying the number of seconds remaining on thei
+            watchdog timer. If the watchdog is not armed, returns -1.
+        """
+        return -1
diff --git a/platform/nvidia-bluefield/platform-api/tests/__init__.py b/platform/nvidia-bluefield/platform-api/tests/__init__.py
new file mode 100644
index 000000000..b373cff14
--- /dev/null
+++ b/platform/nvidia-bluefield/platform-api/tests/__init__.py
@@ -0,0 +1,16 @@
+#
+# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
diff --git a/platform/nvidia-bluefield/platform-api/tests/test_chassis.py b/platform/nvidia-bluefield/platform-api/tests/test_chassis.py
new file mode 100644
index 000000000..e4a8826c4
--- /dev/null
+++ b/platform/nvidia-bluefield/platform-api/tests/test_chassis.py
@@ -0,0 +1,85 @@
+#
+# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+import os
+import sys
+
+from unittest.mock import patch
+from unittest.mock import mock_open
+from unittest.mock import MagicMock
+
+test_path = os.path.dirname(os.path.abspath(__file__))
+modules_path = os.path.dirname(test_path)
+sys.path.insert(0, modules_path)
+
+from sonic_platform.chassis import Chassis
+from sonic_platform.device_data import DeviceDataManager
+from .utils import platform_sample
+
+@patch('sonic_py_common.device_info.get_platform', MagicMock(return_value=""))
+@patch('sonic_py_common.device_info.get_path_to_platform_dir', MagicMock(return_value=""))
+@patch('builtins.open', new_callable=mock_open, read_data=platform_sample)
+@patch('os.path.isfile', MagicMock(return_value=True))
+class TestChassis:
+    """
+    Test class to test chassis.py. The test cases covers:
+        - SFP related API
+    """
+
+    def test_psu(self, *args):
+        chassis = Chassis()
+
+        assert chassis.get_num_psus() == 0
+        assert chassis.get_all_psus() == []
+
+    def test_fan(self, *args):
+        chassis = Chassis()
+
+        assert chassis.get_num_fans() == 0
+        assert chassis.get_all_fans() == []
+        assert chassis.get_num_fan_drawers() == 0
+        assert chassis.get_all_fan_drawers() == []
+
+    def test_sfp(self, *args):
+        # Test get_num_sfps, it should not create any SFP objects
+        DeviceDataManager.get_sfp_count = MagicMock(return_value=2)
+
+        chassis = Chassis()
+        assert chassis.get_num_sfps() == 2
+        assert len(chassis.get_all_sfps()) == 2
+
+        # Index out of bound, return None
+        sfp = chassis.get_sfp(4)
+        assert sfp is None
+
+        # Get one SFP, other SFP list should be initialized to None
+        sfp = chassis.get_sfp(1)
+        assert sfp is not None
+
+        # Get the SFP again, no new SFP created
+        sfp1 = chassis.get_sfp(1)
+        assert id(sfp) == id(sfp1)
+
+        # Get another SFP, sfp_initialized_count increase
+        sfp2 = chassis.get_sfp(2)
+        assert sfp2 is not None
+
+        # Get all SFPs, but there are SFP already created, only None SFP created
+        sfp_list = chassis.get_all_sfps()
+        assert len(sfp_list) == 2
+        assert id(sfp1) == id(sfp_list[0])
+        assert id(sfp2) == id(sfp_list[1])
diff --git a/platform/nvidia-bluefield/platform-api/tests/test_eeprom.py b/platform/nvidia-bluefield/platform-api/tests/test_eeprom.py
new file mode 100644
index 000000000..d4ab81fce
--- /dev/null
+++ b/platform/nvidia-bluefield/platform-api/tests/test_eeprom.py
@@ -0,0 +1,171 @@
+#
+# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+import os
+import sys
+
+from unittest.mock import patch
+from unittest.mock import mock_open
+from unittest.mock import MagicMock
+
+test_path = os.path.dirname(os.path.abspath(__file__))
+modules_path = os.path.dirname(test_path)
+sys.path.insert(0, modules_path)
+
+from sonic_platform.chassis import Chassis
+from sonic_platform.eeprom import Eeprom
+
+from .utils import platform_sample
+
+
+vpd_sample = """
+
+  VPD-KEYWORD    DESCRIPTION             VALUE
+  -----------    -----------             -----
+Read Only Section:
+
+  PN             Part Number             MBF2H536C-CESOT
+  EC             Revision                A5
+  V2             N/A                     MBF2H536C-CESOT
+  SN             Serial Number           MT2152X03653
+  V3             N/A                     144d28a86368ec11800008c0ebe14b94
+  VA             N/A                     MLX:MN=MLNX:CSKU=V2:UUID=V3:PCI=V0:MODL=BF2H536C
+  V0             Misc Info               PCIeGen4 x16
+  RV             Checksum Complement     0x7a
+  IDTAG          Board Id                BlueField-2 DPU 100GbE Dual-Port QSFP56, integrated BMC, Secure Boot Enabled, Crypto Disabled, 32GB on-board DDR, 1GbE OOB management, FHHL
+"""
+
+
+fwinfo_sample = """
+Querying Mellanox devices firmware ...
+
+Device #1:
+----------
+
+  Device Type:      BlueField2
+  Part Number:      MBF2H536C-CESO_Ax
+  Description:      BlueField-2 P-Series DPU 100GbE Dual-Port QSFP56; integrated BMC; PCIe Gen4 x16; Secure Boot Enabled; Crypto Disabled; 32GB on-board DDR; 1GbE OOB management; FHHL
+  PSID:             MT_0000000767
+  PCI Device Name:  /dev/mst/mt41686_pciconf0
+  Base GUID:        08c0eb0300e14b94
+  Base MAC:         08c0ebe14b94
+  Versions:         Current        Available
+     FW             24.99.0932     N/A
+
+  Status:           No matching image found
+
+"""
+
+
+eeprom_info_dict = {
+            hex(Eeprom._TLV_CODE_SERIAL_NUMBER): 'MT2152X03653',
+            hex(Eeprom._TLV_CODE_PRODUCT_NAME): 'BlueField-2 DPU 100GbE Dual-Port QSFP56, integrated BMC, Secure Boot Enabled, Crypto Disabled, 32GB on-board DDR, 1GbE OOB management, FHHL',
+            hex(Eeprom._TLV_CODE_PART_NUMBER): 'MBF2H536C-CESOT',
+            hex(Eeprom._TLV_CODE_LABEL_REVISION): 'A5',
+            hex(Eeprom._TLV_CODE_MAC_BASE): '08:c0:eb:e1:4b:94',
+            hex(Eeprom._TLV_CODE_CRC_32): '0x64761f84'
+        }
+
+eeprom_redis_data = dict([((f'EEPROM_INFO|{k}', 'Value'), v) for k,v in eeprom_info_dict.items()])
+eeprom_redis_data[('EEPROM_INFO|State', 'Initialized')] = '1'
+
+redis_empty = {('EEPROM_INFO|State', 'Initialized'): '0'}
+
+mock_redis_uninitialized = MagicMock(side_effect = lambda k,v : redis_empty.get((k,v)))
+mock_redis_initialized = MagicMock(side_effect = lambda k,v : eeprom_redis_data.get((k,v)))
+
+
+@patch('sonic_py_common.device_info.get_platform', MagicMock(return_value=""))
+@patch('sonic_py_common.device_info.get_path_to_platform_dir', MagicMock(return_value=""))
+@patch('builtins.open', new_callable=mock_open, read_data=platform_sample)
+@patch('os.path.isfile', MagicMock(return_value=True))
+class TestEeprom:
+    @patch('sonic_platform.eeprom.FwManager._read_fw_info_raw', MagicMock(return_value=fwinfo_sample.split('\n')))
+    @patch('sonic_platform.eeprom.Vpd._read_raw', MagicMock(return_value=vpd_sample.split('\n')))
+    def test_read_vdp_fw_raw(self, *args):
+        eeprom = Eeprom()
+        eeprom._redis_hget = mock_redis_uninitialized
+        assert eeprom.get_serial_number() == 'MT2152X03653'
+        assert eeprom.get_product_name() == 'BlueField-2 DPU 100GbE Dual-Port QSFP56, integrated BMC, Secure Boot Enabled, Crypto Disabled, 32GB on-board DDR, 1GbE OOB management, FHHL'
+        assert eeprom.get_part_number() == 'MBF2H536C-CESOT'
+        assert eeprom.get_revision() == 'A5'
+        assert eeprom.get_base_mac() == '08:c0:eb:e1:4b:94'
+
+        chassis = Chassis()
+        chassis._eeprom = eeprom
+        assert chassis.get_serial() == 'MT2152X03653'
+        assert chassis.get_name() == 'BlueField-2 DPU 100GbE Dual-Port QSFP56, integrated BMC, Secure Boot Enabled, Crypto Disabled, 32GB on-board DDR, 1GbE OOB management, FHHL'
+        assert chassis.get_model() == 'MBF2H536C-CESOT'
+        assert chassis.get_revision() == 'A5'
+        assert chassis.get_base_mac() == '08:c0:eb:e1:4b:94'
+
+    @patch('sonic_platform.eeprom.Eeprom.get_system_eeprom_info', MagicMock(return_value=eeprom_info_dict))
+    def test_get_system_eeprom_info(self, *args):
+        chassis = Chassis()
+        assert chassis.get_serial() == 'MT2152X03653'
+        assert chassis.get_name() == 'BlueField-2 DPU 100GbE Dual-Port QSFP56, integrated BMC, Secure Boot Enabled, Crypto Disabled, 32GB on-board DDR, 1GbE OOB management, FHHL'
+        assert chassis.get_model() == 'MBF2H536C-CESOT'
+        assert chassis.get_revision() == 'A5'
+        assert chassis.get_base_mac() == '08:c0:eb:e1:4b:94'
+        assert chassis.get_system_eeprom_info() == eeprom_info_dict
+
+    def test_get_system_eeprom_info_from_db(self, *args):
+        eeprom = Eeprom()
+        eeprom._redis_hget = mock_redis_initialized
+        assert eeprom.get_serial_number() == "MT2152X03653"
+        assert eeprom.get_product_name() == "BlueField-2 DPU 100GbE Dual-Port QSFP56, integrated BMC, Secure Boot Enabled, Crypto Disabled, 32GB on-board DDR, 1GbE OOB management, FHHL"
+        assert eeprom.get_part_number() == "MBF2H536C-CESOT"
+        assert eeprom.get_revision() == "A5"
+        assert eeprom.get_base_mac() == '08:c0:eb:e1:4b:94'
+
+
+    @patch('sonic_platform.eeprom.FwManager._read_fw_info_raw', MagicMock(return_value=fwinfo_sample.split('\n')))
+    @patch('sonic_platform.eeprom.Vpd._read_raw', MagicMock(return_value=vpd_sample.split('\n')))
+    def test_read_eeprom(self, *args):
+        types = [
+            Eeprom._TLV_CODE_MAC_BASE,
+            Eeprom._TLV_CODE_SERIAL_NUMBER,
+            Eeprom._TLV_CODE_PRODUCT_NAME,
+            Eeprom._TLV_CODE_PART_NUMBER,
+            Eeprom._TLV_CODE_LABEL_REVISION,
+            Eeprom._TLV_CODE_LABEL_REVISION,
+            Eeprom._TLV_CODE_CRC_32
+        ]
+        eeprom = Eeprom()
+        eeprom._redis_hget = mock_redis_uninitialized
+
+        eeprom_data = eeprom.read_eeprom()
+        for t in types:
+            assert hex(t) in eeprom.get_system_eeprom_info()
+            exists, _ = eeprom.get_tlv_field(eeprom_data, t)
+            assert exists
+
+    @patch('sonic_platform.eeprom.FwManager._read_fw_info_raw', MagicMock(return_value=fwinfo_sample.split('\n')))
+    @patch('sonic_platform.eeprom.Vpd._read_raw', MagicMock(return_value=vpd_sample.split('\n')))
+    def test_read_eeprom_crc(self, *args):
+        eeprom = Eeprom()
+        eeprom._redis_hget = mock_redis_uninitialized
+
+        eeprom_data = eeprom.read_eeprom()
+        exists, crc = eeprom.get_tlv_field(eeprom_data, Eeprom._TLV_CODE_CRC_32)
+
+        eeprom = Eeprom()
+        eeprom._redis_hget = mock_redis_initialized
+        eeprom_data = eeprom.read_eeprom()
+        exists, crc_redis = eeprom.get_tlv_field(eeprom_data, Eeprom._TLV_CODE_CRC_32)
+        assert exists
+        assert crc_redis == crc
diff --git a/platform/nvidia-bluefield/platform-api/tests/test_sfp.py b/platform/nvidia-bluefield/platform-api/tests/test_sfp.py
new file mode 100644
index 000000000..d019911ab
--- /dev/null
+++ b/platform/nvidia-bluefield/platform-api/tests/test_sfp.py
@@ -0,0 +1,55 @@
+#
+# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+import os
+import sys
+
+from unittest.mock import patch
+from unittest.mock import mock_open
+from unittest.mock import MagicMock
+
+test_path = os.path.dirname(os.path.abspath(__file__))
+modules_path = os.path.dirname(test_path)
+sys.path.insert(0, modules_path)
+
+from sonic_platform.sfp import Sfp
+from sonic_platform.chassis import Chassis
+
+from .utils import platform_sample
+
+@patch('sonic_py_common.device_info.get_platform', MagicMock(return_value=""))
+@patch('sonic_py_common.device_info.get_path_to_platform_dir', MagicMock(return_value=""))
+@patch('builtins.open', new_callable=mock_open, read_data=platform_sample)
+@patch('os.path.isfile', MagicMock(return_value=True))
+class TestSfp:
+
+    @patch('sonic_platform.sfp.Sfp.read_eeprom', MagicMock(return_value=bytearray([0x11])))
+    @patch('sonic_platform.chassis.Chassis.get_num_sfps', MagicMock(return_value=2))
+    def test_get_presence(self, *args):
+        chassis = Chassis()
+
+        sfp = chassis.get_sfp(1)
+
+        assert sfp.get_presence() == True
+
+    @patch('sonic_platform.sfp.check_ethtool_link_detected', MagicMock(return_value=False))
+    @patch('sonic_platform.chassis.Chassis.get_num_sfps', MagicMock(return_value=2))
+    def test_sfp_unpluged(self, *args):
+        chassis = Chassis()
+
+        sfp = chassis.get_sfp(1)
+
+        assert sfp.get_presence() == False
diff --git a/platform/nvidia-bluefield/platform-api/tests/test_sfp_event.py b/platform/nvidia-bluefield/platform-api/tests/test_sfp_event.py
new file mode 100644
index 000000000..ddec52bdb
--- /dev/null
+++ b/platform/nvidia-bluefield/platform-api/tests/test_sfp_event.py
@@ -0,0 +1,109 @@
+#
+# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+import os
+import sys
+
+from unittest.mock import patch
+from unittest.mock import mock_open
+from unittest.mock import MagicMock
+
+test_path = os.path.dirname(os.path.abspath(__file__))
+modules_path = os.path.dirname(test_path)
+sys.path.insert(0, modules_path)
+
+from sonic_platform.sfp import Sfp
+from sonic_platform.chassis import Chassis
+
+from .utils import platform_sample
+
+@patch('sonic_py_common.device_info.get_platform', MagicMock(return_value=""))
+@patch('sonic_py_common.device_info.get_path_to_platform_dir', MagicMock(return_value=""))
+@patch('builtins.open', new_callable=mock_open, read_data=platform_sample)
+@patch('os.path.isfile', MagicMock(return_value=True))
+@patch('sonic_platform.chassis.Chassis.get_num_sfps', MagicMock(return_value=2))
+class TestSfpEvent:
+
+    def test_sfp_event_full_flow(self, *args):
+        chassis = Chassis()
+
+        # Verify that no events are generated if SFPs are not present
+        with patch('sonic_platform.sfp.Sfp.read_eeprom', MagicMock(return_value=None)) as p:
+            rc, event = chassis.get_change_event(1000)
+
+            assert rc == True
+            assert 'sfp' in event
+            assert event['sfp'] == {}
+
+        # Verify that events for both ports are generated
+        with patch('sonic_platform.sfp.Sfp.read_eeprom', MagicMock(return_value=bytearray([0x11]))) as p:
+            rc, event = chassis.get_change_event(1000)
+
+            assert rc == True
+            assert 'sfp' in event
+            assert event['sfp'] == {1: '1', 2: '1'}
+
+        # Verify that events are not generated if port presence didn't change
+        with patch('sonic_platform.sfp.Sfp.read_eeprom', MagicMock(return_value=bytearray([0x11]))) as p:
+            rc, event = chassis.get_change_event(1000)
+
+            assert rc == True
+            assert 'sfp' in event
+            assert event['sfp'] == {}
+
+        # Verify that events are generated for both ports when SFPs are removed
+        with patch('sonic_platform.sfp.Sfp.read_eeprom', MagicMock(return_value=None)) as p:
+            rc, event = chassis.get_change_event(1000)
+
+            assert rc == True
+            assert 'sfp' in event
+            assert event['sfp'] == {1: '0', 2: '0'}
+
+    def test_sfp_event(self, *args):
+        chassis = Chassis()
+
+        # Verify that no events are generated if SFPs are not present
+        with patch('sonic_platform.sfp_event.SfpEvent.get_presence_bitmap', MagicMock(return_value=0)) as p:
+            rc, event = chassis.get_change_event(1000)
+
+            assert rc == True
+            assert 'sfp' in event
+            assert event['sfp'] == {}
+
+        # Insert SFP for port 1. Verify that event for only port 1 is generated
+        with patch('sonic_platform.sfp_event.SfpEvent.get_presence_bitmap', MagicMock(return_value=0x1)) as p:
+            rc, event = chassis.get_change_event(1000)
+
+            assert rc == True
+            assert 'sfp' in event
+            assert event['sfp'] == {1: '1'}
+
+        # Insert SFP for port 2, remove SFP for port 1. Verify that correct events are generated
+        with patch('sonic_platform.sfp_event.SfpEvent.get_presence_bitmap', MagicMock(return_value=0x2)) as p:
+            rc, event = chassis.get_change_event(1000)
+
+            assert rc == True
+            assert 'sfp' in event
+            assert event['sfp'] == {1: '0', 2: '1'}
+
+        # Remove SFP for port 2. Verify that event only for port
+        with patch('sonic_platform.sfp_event.SfpEvent.get_presence_bitmap', MagicMock(return_value=0x0)) as p:
+            rc, event = chassis.get_change_event(1000)
+
+            assert rc == True
+            assert 'sfp' in event
+            assert event['sfp'] == {2: '0'}
diff --git a/platform/nvidia-bluefield/platform-api/tests/test_thermal_bf3.py b/platform/nvidia-bluefield/platform-api/tests/test_thermal_bf3.py
new file mode 100644
index 000000000..1ceac45d8
--- /dev/null
+++ b/platform/nvidia-bluefield/platform-api/tests/test_thermal_bf3.py
@@ -0,0 +1,91 @@
+#
+# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+import os
+import sys
+
+from unittest.mock import patch
+from unittest.mock import mock_open
+from unittest.mock import MagicMock
+
+test_path = os.path.dirname(os.path.abspath(__file__))
+modules_path = os.path.dirname(test_path)
+sys.path.insert(0, modules_path)
+
+from sonic_platform.chassis import Chassis
+from .utils import platform_sample_bf3
+
+
+@patch('sonic_py_common.device_info.get_platform', MagicMock(return_value=""))
+@patch('sonic_py_common.device_info.get_path_to_platform_dir', MagicMock(return_value=""))
+@patch('builtins.open', new_callable=mock_open, read_data=platform_sample_bf3)
+@patch('os.path.isfile', MagicMock(return_value=True))
+@patch('os.listdir', MagicMock(return_value=['mt41692_pciconf0.1'])) 
+class TestThermal:
+
+    def test_chassis_thermal(self, *args):
+        from sonic_platform.thermal_bf3 import SENSORS
+        chassis = Chassis()
+        thermal_list = chassis.get_all_thermals()
+        assert thermal_list
+
+        for s in SENSORS:
+            assert 'name' in s
+            assert 'mlxbf_sensor_name' in s or 'hwmon_path' in s
+
+        sensor_names = list(map(lambda x: x.get('name'), SENSORS))
+        thermal_names = list(map(lambda x: x.get_name(), thermal_list))
+        for sn in sensor_names:
+            assert sn in thermal_names
+
+
+    def test_hwmon_read(self, *args):
+        from sonic_platform import thermal_bf3 as thermal
+        from sonic_platform.thermal_bf3 import Thermal
+
+        thermal.read_fs = MagicMock(return_value=83123)
+        sensor = {'name': 'test', 'hwmon_path': '/tmp/', 'ht': 95, 'cht': 100}
+        t = Thermal(**sensor)
+        assert t.get_temperature() == 83.123
+        assert t.get_high_critical_threshold() == 83.123
+
+
+    def test_thermal_get(self, *args):
+        from sonic_platform import thermal_bf3 as thermal
+        from sonic_platform.thermal_bf3 import Thermal
+
+        temp_test_mocked_vals = [123, 10.5, -1, None]
+
+        for tv in temp_test_mocked_vals:
+            thermal.read_temp_mlxbf = MagicMock(return_value=tv)
+            sensor = {'name': 'test', 'mlxbf_sensor_name': 'test', 'ht': 95, 'cht': 100}
+            t = Thermal(**sensor)
+            assert t.get_temperature() == tv
+            assert t.get_high_threshold() == sensor['ht']
+            assert t.get_high_critical_threshold() == sensor['cht']
+            assert t.get_low_threshold() == 'N/A'
+            assert t.get_low_critical_threshold() == 'N/A'
+
+        for tv in temp_test_mocked_vals:
+            thermal.read_temp_hwmon = MagicMock(return_value=tv)
+            sensor = {'name': 'test', 'hwmon_path': '/tmp/', 'ht': 95, 'cht': 100}
+            t = Thermal(**sensor)
+            assert t.get_temperature() == tv
+            assert t.get_high_threshold() == sensor['ht']
+            assert t.get_high_critical_threshold() == tv
+            assert t.get_low_threshold() == 'N/A'
+            assert t.get_low_critical_threshold() == 'N/A'
diff --git a/platform/nvidia-bluefield/platform-api/tests/test_throttling.py b/platform/nvidia-bluefield/platform-api/tests/test_throttling.py
new file mode 100644
index 000000000..fb0ef538d
--- /dev/null
+++ b/platform/nvidia-bluefield/platform-api/tests/test_throttling.py
@@ -0,0 +1,114 @@
+#
+# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+import os
+import sys
+
+import tempfile
+import pytest
+
+from .utils import TTestData, TTestFSState, LogRecorderMock
+from sonic_platform.throttling_checks.cpu_check import CPUThrottlingChecker
+from sonic_platform.throttling_checks.ddr_check import DDRThrottlingChecker
+
+test_path = os.path.dirname(os.path.abspath(__file__))
+modules_path = os.path.dirname(test_path)
+sys.path.insert(0, modules_path)
+
+test_first_run_ok = TTestData('First Run all OK', TTestFSState([1, 0, 1, 0], []), 'OK', [])
+test_first_run_powert = TTestData('First Run power throttled', TTestFSState([2, 0, 1, 0], []), 'Throttled', [])
+test_first_run_thermalt = TTestData('First Run thermal throttled', TTestFSState([1, 0, 2, 0], []), 'Throttled', [])
+test_recovered_powert = TTestData('Power throttled recovery', TTestFSState([1, 1, 1, 0], [2, 0, 1, 0]), 'OK', 
+                                  [('warning', 'CPU has recovered from power throttling')])
+test_recovered_thermalt = TTestData('Thermal throttled recovery', TTestFSState([1, 0, 1, 1], [1, 0, 2, 0]), 'OK',
+                                   [('warning', 'CPU has recovered from thermal throttling')])
+test_in_between_powert = TTestData('Power throttled between checks', TTestFSState([1, 2, 1, 0], [1, 0, 1, 0]), 'OK',
+                                  [('warning', 'CPU was power throttled')])
+test_in_between_thermalt = TTestData('Power throttled between checks', TTestFSState([1, 0, 1, 2], [1, 0, 1, 0]), 'OK',
+                                  [('warning', 'CPU was thermal throttled')])
+test_no_sensors = TTestData('No sensors', TTestFSState([], []), 'OK',
+                                   [('error', 'Failed to check CPU throttling: Could not read the')])
+
+test_ddr_ok = TTestData('DDR OK', TTestFSState([0, 0, 0, 0, 60], []), 'OK', [])
+test_ddr_throttled = TTestData('DDR throttled', TTestFSState([0, 0, 0, 0, 100], []), 'Throttled', [])
+test_ddr_no_sensors = TTestData('DDR no sensor', TTestFSState([], []), 'OK',
+                                   [('error', 'Failed to check DDR throttling: Could not read the')])
+
+all_cpu_tests = [test_first_run_ok,
+                 test_first_run_powert,
+                 test_recovered_powert,
+                 test_recovered_thermalt,
+                 test_in_between_powert,
+                 test_in_between_thermalt,
+                 test_no_sensors]
+first_run_tests = [test_first_run_ok, test_first_run_powert]
+ddr_tests = [test_ddr_ok, test_ddr_throttled, test_ddr_no_sensors]
+
+class Test:
+
+    def prepare_fs(self, sensors_path, storage_path, fs_state: TTestFSState):
+        sensors_data, storage_data = fs_state.get_dicts()
+        if sensors_data:
+            for sensor,value in sensors_data.items():
+                with open(f'{sensors_path}/{sensor}', 'w') as f:
+                    f.write(str(value))
+        if storage_data:
+            for sensor,value in storage_data.items():
+                with open(f'{storage_path}/{sensor}', 'w') as f:
+                    f.write(str(value))
+
+    def verify_storage(self, storage_path, fs_state: TTestFSState):
+        expected, _ = fs_state.get_dicts()
+        for name, ev in expected.items():
+            with open(f'{storage_path}/{name}') as f:
+                v = int(f.readline().strip())
+                assert v == ev
+
+    def setup_and_run(self, cpu_ddr, checker, test_data: TTestData, sensors_path, storage_path=None):
+        log_recorder = LogRecorderMock()
+        from sonic_platform.throttling_checks import cpu_check
+        from sonic_platform.throttling_checks import ddr_check
+        cpu_check.logger = log_recorder
+        ddr_check.logger = log_recorder
+
+        self.prepare_fs(sensors_path, storage_path, test_data.fs_state)
+
+        result = checker.check()
+        test_data.validate(result, log_recorder, cpu_ddr)
+
+        if storage_path:
+            self.verify_storage(storage_path, test_data.fs_state)
+
+    @pytest.mark.parametrize("test_data", all_cpu_tests, ids=list(map(lambda x: x.title, all_cpu_tests)))
+    def test_cpu(self, test_data: TTestData):
+        with tempfile.TemporaryDirectory() as sensors_path, tempfile.TemporaryDirectory() as storage_path:
+            checker = CPUThrottlingChecker(sensors_path, storage_path)
+            self.setup_and_run('CPU', checker, test_data, sensors_path, storage_path)
+
+    @pytest.mark.parametrize("test_data", first_run_tests, ids=list(map(lambda x: x.title, first_run_tests)))
+    def test_cpu_storage_subdir(self, test_data: TTestData):
+        with tempfile.TemporaryDirectory() as sensors_path, tempfile.TemporaryDirectory() as storage_path:
+            # test that CPUThrottlingChecker will work correctly if subdirectory for storage should be created
+            storage_path = f'{storage_path}/storage'
+            checker = CPUThrottlingChecker(sensors_path, storage_path)
+            self.setup_and_run('CPU', checker, test_data, sensors_path, storage_path)
+
+    @pytest.mark.parametrize("test_data", ddr_tests, ids=list(map(lambda x: x.title, ddr_tests)))
+    def test_ddr(self, test_data: TTestData):
+        with tempfile.TemporaryDirectory() as sensors_path:
+            checker = DDRThrottlingChecker(sensors_path)
+            self.setup_and_run('DDR', checker, test_data, sensors_path)
diff --git a/platform/nvidia-bluefield/platform-api/tests/utils.py b/platform/nvidia-bluefield/platform-api/tests/utils.py
new file mode 100644
index 000000000..8c9878e0c
--- /dev/null
+++ b/platform/nvidia-bluefield/platform-api/tests/utils.py
@@ -0,0 +1,133 @@
+#
+# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+from dataclasses import dataclass
+from typing import List, ClassVar
+
+platform_sample = """
+{
+    "chassis": {
+        "name": "Nvidia-MBF2H536C",
+        "components": [],
+        "fans": [],
+        "fan_drawers": [],
+        "psus": [],
+        "thermals": [],
+        "sfps": [
+            {
+                "name": "p0"
+            },
+            {
+                "name": "p1"
+            }
+        ]
+    },
+    "interfaces": {
+        "Ethernet0": {
+            "index": "1,1,1,1",
+            "lanes": "0,1,2,3",
+            "breakout_modes": {
+                "1x100G": ["etp1"]
+            }
+        },
+        "Ethernet4": {
+            "index": "2,2,2,2",
+            "lanes": "4,5,6,7",
+            "breakout_modes": {
+                "1x100G": ["etp2"]
+            }
+        }
+    }
+}
+"""
+
+platform_sample_bf3 = """
+{
+    "chassis": {
+        "name": "arm64-nvda_bf-9009d3b600cvaa",
+        "components": [],
+        "fans": [],
+        "fan_drawers": [],
+        "psus": [],
+        "thermals": [],
+        "sfps": [
+            {
+                "name": "p0"
+            },
+            {
+                "name": "p1"
+            }
+        ]
+    },
+    "interfaces": {
+        "Ethernet0": {
+            "index": "1,1,1,1",
+            "lanes": "0,1,2,3",
+            "breakout_modes": {
+                "1x100G": ["etp1"]
+            }
+        },
+        "Ethernet4": {
+            "index": "2,2,2,2",
+            "lanes": "4,5,6,7",
+            "breakout_modes": {
+                "1x100G": ["etp2"]
+            }
+        }
+    }
+}
+"""
+
+# Utilities for throttling tests
+class LogRecorderMock(object):
+    def __init__(self):
+        self.msgs = []
+
+    def log_warning(self, msg):
+        self.msgs.append(('warning', msg))
+
+    def log_error(self, msg):
+        self.msgs.append(('error', msg))
+
+    def get_messages(self):
+        return self.msgs
+
+@dataclass
+class TTestFSState:
+    sensors: List[int]
+    storage: List[int]
+    sensor_names: ClassVar = ['power_throttling_state', 'power_throttling_event_count',
+                              'thermal_throttling_state', 'thermal_throttling_event_count', 'ddr_temp']
+    def get_dicts(self):
+        return dict(zip(self.sensor_names, self.sensors)), dict(zip(self.sensor_names, self.storage))
+
+
+@dataclass
+class TTestData:
+    title: str
+    fs_state: TTestFSState
+    result: str
+    log_msgs: List[str]
+
+    def validate(self, result: str, log_recording: LogRecorderMock, t):
+        assert f'Throttling\n{t}:{self.result}' == result
+        assert len(self.log_msgs) == len(log_recording.get_messages()), log_recording.get_messages()
+        for expected, actual in zip(self.log_msgs, log_recording.get_messages()):
+            esev, emsg = expected
+            asev, amsg = actual
+            assert esev == asev
+            assert amsg.startswith(emsg), f'{amsg} != {emsg}'
diff --git a/platform/nvidia-bluefield/pwr-mlxbf/.gitignore b/platform/nvidia-bluefield/pwr-mlxbf/.gitignore
new file mode 100644
index 000000000..6dbdff457
--- /dev/null
+++ b/platform/nvidia-bluefield/pwr-mlxbf/.gitignore
@@ -0,0 +1,5 @@
+# Ignore everything in this directory
+*
+# Except these files
+!.gitignore
+!Makefile
diff --git a/platform/nvidia-bluefield/pwr-mlxbf/Makefile b/platform/nvidia-bluefield/pwr-mlxbf/Makefile
new file mode 100644
index 000000000..856dc410d
--- /dev/null
+++ b/platform/nvidia-bluefield/pwr-mlxbf/Makefile
@@ -0,0 +1,39 @@
+#
+# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+.ONESHELL:
+SHELL = /bin/bash
+.SHELLFLAGS += -ex
+
+PWR_MLXBF = pwr-mlxbf-$(PWR_MLXBF_DRIVER_VERSION)
+MODULE_DIR := $(shell pwd)/tmp/${PWR_MLXBF}
+GET_PACKAGE := $(shell pwd)/../recipes/get-soc-package.sh
+
+$(addprefix $(DEST)/, $(PWR_MLXBF_DRIVER)): $(DEST)/% :
+	rm -rf ./tmp/
+	mkdir ./tmp/
+	pushd ./tmp/
+
+	${GET_PACKAGE} ${BSD_BASE_SOURCE_URL} ${PWR_MLXBF}
+
+	pushd $(PWR_MLXBF)
+
+	# Build the package
+	make -C /lib/modules/$(KVERSION)/build M=$(MODULE_DIR)
+
+	mv $(PWR_MLXBF_DRIVER) $(DEST)/
+	popd
diff --git a/platform/nvidia-bluefield/recipes/bluefield-soc.dep b/platform/nvidia-bluefield/recipes/bluefield-soc.dep
new file mode 100644
index 000000000..d30ba91dc
--- /dev/null
+++ b/platform/nvidia-bluefield/recipes/bluefield-soc.dep
@@ -0,0 +1,117 @@
+#
+# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+BSD_COMMON_FLAGS_LIST = $(SONIC_COMMON_FLAGS_LIST) $(BFSOC_VERSION) $(BFSOC_REVISION) $(BSD_BASE_SOURCE_URL) $(BOOTIMAGES_BASE_URL) $(KVERSION)
+BSD_COMMON_FILES_LIST = $(SONIC_COMMON_BASE_FILES_LIST) \
+	$(SONIC_COMMON_FILES_LIST) \
+	$(PLATFORM_PATH)/recipes/bluefield-soc.mk \
+	$(PLATFORM_PATH)/recipes/bluefield-soc.dep
+
+SPATH       := $($(TMFIFO_DRIVER)_SRC_PATH)
+DEP_FILES   := $(BSD_COMMON_FILES_LIST)
+DEP_FILES   += $(shell git ls-files $(SPATH))
+
+$(TMFIFO_DRIVER)_CACHE_MODE  := GIT_CONTENT_SHA
+$(TMFIFO_DRIVER)_DEP_FLAGS   := $(BSD_COMMON_FLAGS_LIST)
+$(TMFIFO_DRIVER)_DEP_FILES   := $(DEP_FILES)
+
+SPATH       := $($(MLXBF_GIGE_DRIVER)_SRC_PATH)
+DEP_FILES   := $(BSD_COMMON_FILES_LIST)
+DEP_FILES   += $(shell git ls-files $(SPATH))
+
+$(MLXBF_GIGE_DRIVER)_CACHE_MODE  := GIT_CONTENT_SHA
+$(MLXBF_GIGE_DRIVER)_DEP_FLAGS   := $(BSD_COMMON_FLAGS_LIST)
+$(MLXBF_GIGE_DRIVER)_DEP_FILES   := $(DEP_FILES)
+
+SPATH       := $($(MLXBF3_GPIO_DRIVER)_SRC_PATH)
+DEP_FILES   := $(BSD_COMMON_FILES_LIST)
+DEP_FILES   += $(shell git ls-files $(SPATH))
+
+$(MLXBF3_GPIO_DRIVER)_CACHE_MODE  := GIT_CONTENT_SHA
+$(MLXBF3_GPIO_DRIVER)_DEP_FLAGS   := $(BSD_COMMON_FLAGS_LIST)
+$(MLXBF3_GPIO_DRIVER)_DEP_FILES   := $(DEP_FILES)
+
+SPATH       := $($(MLXBF3_PINCTRL_DRIVER)_SRC_PATH)
+DEP_FILES   := $(BSD_COMMON_FILES_LIST)
+DEP_FILES   += $(shell git ls-files $(SPATH))
+
+$(MLXBF3_PINCTRL_DRIVER)_CACHE_MODE  := GIT_CONTENT_SHA
+$(MLXBF3_PINCTRL_DRIVER)_DEP_FLAGS   := $(BSD_COMMON_FLAGS_LIST)
+$(MLXBF3_PINCTRL_DRIVER)_DEP_FILES   := $(DEP_FILES)
+
+SPATH       := $($(MLX_BOOTCTL_DRIVER)_SRC_PATH)
+DEP_FILES   := $(BSD_COMMON_FILES_LIST)
+DEP_FILES   += $(shell git ls-files $(SPATH))
+
+$(MLX_BOOTCTL_DRIVER)_CACHE_MODE  := GIT_CONTENT_SHA
+$(MLX_BOOTCTL_DRIVER)_DEP_FLAGS   := $(BSD_COMMON_FLAGS_LIST)
+$(MLX_BOOTCTL_DRIVER)_DEP_FILES   := $(DEP_FILES)
+
+SPATH       := $($(MLXBF_BOOTCTL_DEB)_SRC_PATH)
+DEP_FILES   := $(BSD_COMMON_FILES_LIST)
+DEP_FILES   += $(shell git ls-files $(SPATH))
+
+$(MLXBF_BOOTCTL_DEB)_CACHE_MODE  := GIT_CONTENT_SHA
+$(MLXBF_BOOTCTL_DEB)_DEP_FLAGS   := $(BSD_COMMON_FLAGS_LIST)
+$(MLXBF_BOOTCTL_DEB)_DEP_FILES   := $(DEP_FILES)
+
+SPATH       := $($(MLXBF_PKA_DRIVER)_SRC_PATH)
+DEP_FILES   := $(BSD_COMMON_FILES_LIST)
+DEP_FILES   += $(shell git ls-files $(SPATH))
+
+$(MLXBF_PKA_DRIVER)_CACHE_MODE  := GIT_CONTENT_SHA
+$(MLXBF_PKA_DRIVER)_DEP_FLAGS   := $(BSD_COMMON_FLAGS_LIST)
+$(MLXBF_PKA_DRIVER)_DEP_FILES   := $(DEP_FILES)
+
+SPATH       := $($(PWR_MLXBF_DRIVER)_SRC_PATH)
+DEP_FILES   := $(BSD_COMMON_FILES_LIST)
+DEP_FILES   += $(shell git ls-files $(SPATH))
+
+$(PWR_MLXBF_DRIVER)_CACHE_MODE  := GIT_CONTENT_SHA
+$(PWR_MLXBF_DRIVER)_DEP_FLAGS   := $(BSD_COMMON_FLAGS_LIST)
+$(PWR_MLXBF_DRIVER)_DEP_FILES   := $(DEP_FILES)
+
+SPATH       := $($(MLXBF_PTM_DRIVER)_SRC_PATH)
+DEP_FILES   := $(BSD_COMMON_FILES_LIST)
+DEP_FILES   += $(shell git ls-files $(SPATH))
+
+$(MLXBF_PTM_DRIVER)_CACHE_MODE  := GIT_CONTENT_SHA
+$(MLXBF_PTM_DRIVER)_DEP_FLAGS   := $(BSD_COMMON_FLAGS_LIST)
+$(MLXBF_PTM_DRIVER)_DEP_FILES   := $(DEP_FILES)
+
+DEP_FILES := $(BSD_COMMON_FILES_LIST)
+
+$(BOOTIMAGES)_CACHE_MODE := GIT_CONTENT_SHA
+$(BOOTIMAGES)_DEP_FLAGS := $(BSD_COMMON_FLAGS_LIST)
+$(BOOTIMAGES)_DEP_FILES := $(DEP_FILES)
+
+SPATH       := $($(MLNX_BLUEFIELD_BUILD_SCRIPTS)_SRC_PATH)
+DEP_FILES   := $(BSD_COMMON_FILES_LIST)
+DEP_FILES   += $(shell git ls-files $(SPATH))
+
+$(MLNX_BLUEFIELD_BUILD_SCRIPTS)_CACHE_MODE  := GIT_CONTENT_SHA
+$(MLNX_BLUEFIELD_BUILD_SCRIPTS)_DEP_FLAGS   := $(BSD_COMMON_FLAGS_LIST)
+$(MLNX_BLUEFIELD_BUILD_SCRIPTS)_DEP_FILES   := $(DEP_FILES)
+
+SPATH       := $($(BF_PLATFORM_MODULE)_SRC_PATH)
+DEP_FILES   := $(BSD_COMMON_FILES_LIST)
+DEP_FILES   += $(shell git ls-files $(SPATH))
+
+$(BF_PLATFORM_MODULE)_CACHE_MODE  := GIT_CONTENT_SHA
+$(BF_PLATFORM_MODULE)_DEP_FLAGS   := $(BSD_COMMON_FLAGS_LIST)
+$(BF_PLATFORM_MODULE)_DEP_FILES   := $(DEP_FILES)
+
diff --git a/platform/nvidia-bluefield/recipes/bluefield-soc.mk b/platform/nvidia-bluefield/recipes/bluefield-soc.mk
new file mode 100644
index 000000000..3ff258936
--- /dev/null
+++ b/platform/nvidia-bluefield/recipes/bluefield-soc.mk
@@ -0,0 +1,174 @@
+#
+# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+# Bluefied Software Distribution Version
+BFSOC_VERSION = 4.6.0
+BFSOC_REVISION = 13035
+BFB_IMG_TYPE = prod
+BFSOC_BUILD_DATE =
+
+BSD_INTERNAL_BASE_URL = 
+BSD_BASE_URL = 
+BSD_BASE_SOURCE_URL = 
+BFSOC_FROM_INTERNAL = n
+
+ifneq ($(BSD_INTERNAL_BASE_URL), )
+BFSOC_FROM_INTERNAL = y
+BSD_BASE_URL = $(BSD_INTERNAL_BASE_URL)
+ifneq ($(BFSOC_BUILD_DATE), )
+BSD_BASE_URL = $(BSD_INTERNAL_BASE_URL)/$(BFSOC_BUILD_DATE)
+endif
+
+BSD_BASE_SOURCE_URL = $(BSD_BASE_URL)/build/install/distro/SRPMS/
+DEV_BOOTIMAGES_BASE_URL = $(BSD_BASE_URL)/build/install/distro/dev-release/DEBS/
+PROD_BOOTIMAGES_BASE_URL = $(BSD_BASE_URL)/build/install/distro/ga-release/DEBS/
+endif
+
+export BFSOC_VERSION BFSOC_REVISION BSD_BASE_URL BSD_BASE_SOURCE_URL BFB_IMG_TYPE BFSOC_FROM_INTERNAL PLATFORM_PATH
+
+define make_url_bfsoc
+	$(1)_URL="https://github.com/Mellanox/sonic-bluefield-packages/releases/download/dpu-bfsoc-$(BFSOC_VERSION)-$(BFSOC_REVISION)-$(BLDENV)/$(1)"
+
+endef
+
+BF_PLATFORM_DRIVERS =
+BFSOC_MAKE_DEBS =
+BFSOC_MAKE_DEBS_DERIVED =
+BFSOC_ONLINE_DEBS =
+
+MLXBF3_PINCTRL_DRIVER_VERSION = 1.0
+MLXBF3_PINCTRL_DRIVER = pinctrl-mlxbf3.ko
+$(MLXBF3_PINCTRL_DRIVER)_SRC_PATH = $(PLATFORM_PATH)/pinctrl-mlxbf3
+$(MLXBF3_PINCTRL_DRIVER)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON)
+
+BF_PLATFORM_DRIVERS += $(MLXBF3_PINCTRL_DRIVER)
+export MLXBF3_PINCTRL_DRIVER_VERSION MLXBF3_PINCTRL_DRIVER
+
+TMFIFO_DRIVER_VERSION = 1.7
+TMFIFO_DRIVER = mlxbf-tmfifo.ko
+$(TMFIFO_DRIVER)_SRC_PATH = $(PLATFORM_PATH)/tmfifo
+$(TMFIFO_DRIVER)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON)
+
+BF_PLATFORM_DRIVERS += $(TMFIFO_DRIVER)
+export TMFIFO_DRIVER_VERSION TMFIFO_DRIVER
+
+MLXBF_GIGE_DRIVER_VERSION = 1.1
+MLXBF_GIGE_DRIVER = mlxbf-gige.ko
+$(MLXBF_GIGE_DRIVER)_SRC_PATH = $(PLATFORM_PATH)/mlxbf-gige
+$(MLXBF_GIGE_DRIVER)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON)
+
+BF_PLATFORM_DRIVERS += $(MLXBF_GIGE_DRIVER)
+export MLXBF_GIGE_DRIVER_VERSION MLXBF_GIGE_DRIVER
+
+MLXBF3_GPIO_DRIVER_VERSION = 1.0
+MLXBF3_GPIO_DRIVER = gpio-mlxbf3.ko
+$(MLXBF3_GPIO_DRIVER)_SRC_PATH = $(PLATFORM_PATH)/gpio-mlxbf3
+$(MLXBF3_GPIO_DRIVER)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON)
+
+BF_PLATFORM_DRIVERS += $(MLXBF3_GPIO_DRIVER)
+export MLXBF3_GPIO_DRIVER_VERSION MLXBF3_GPIO_DRIVER
+
+ifeq ($(BFSOC_VERSION), 4.2.0)
+MLX_BOOTCTL_DRIVER_VERSION = 1.6
+else
+MLX_BOOTCTL_DRIVER_VERSION = 1.7
+endif
+MLX_BOOTCTL_DRIVER = mlx-bootctl.ko
+$(MLX_BOOTCTL_DRIVER)_SRC_PATH = $(PLATFORM_PATH)/mlx-bootctl
+$(MLX_BOOTCTL_DRIVER)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON)
+
+BF_PLATFORM_DRIVERS += $(MLX_BOOTCTL_DRIVER)
+export MLX_BOOTCTL_DRIVER_VERSION MLX_BOOTCTL_DRIVER
+
+SDHCI_OF_DWCMSHC_DRIVER_VERSION = 1.0
+SDHCI_OF_DWCMSHC_DRIVER = sdhci-of-dwcmshc.ko
+$(SDHCI_OF_DWCMSHC_DRIVER)_SRC_PATH = $(PLATFORM_PATH)/sdhci-of-dwcmshc
+$(SDHCI_OF_DWCMSHC_DRIVER)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON)
+
+BF_PLATFORM_DRIVERS += $(SDHCI_OF_DWCMSHC_DRIVER)
+export SDHCI_OF_DWCMSHC_DRIVER_VERSION SDHCI_OF_DWCMSHC_DRIVER
+
+MLXBF_BOOTCTL_DEB_VERSION = 2.1
+MLXBF_BOOTCTL_DEB = mlxbf-bootctl_${MLXBF_BOOTCTL_DEB_VERSION}_${CONFIGURED_ARCH}.deb
+$(MLXBF_BOOTCTL_DEB)_SRC_PATH = $(PLATFORM_PATH)/mlxbf-bootctl
+
+BFSOC_MAKE_DEBS += $(MLXBF_BOOTCTL_DEB)
+export MLXBF_BOOTCTL_DEB_VERSION MLXBF_BOOTCTL_DEB
+
+MLXBF_PKA_DRIVER_VERSION = 1.0
+MLXBF_PKA_DRIVER = mlxbf-pka.ko
+$(MLXBF_PKA_DRIVER)_SRC_PATH = $(PLATFORM_PATH)/mlxbf-pka
+$(MLXBF_PKA_DRIVER)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON)
+
+BF_PLATFORM_DRIVERS += $(MLXBF_PKA_DRIVER)
+export MLXBF_PKA_DRIVER_VERSION MLXBF_PKA_DRIVER
+
+PWR_MLXBF_DRIVER_VERSION = 1.0
+PWR_MLXBF_DRIVER = pwr-mlxbf.ko
+$(PWR_MLXBF_DRIVER)_SRC_PATH = $(PLATFORM_PATH)/pwr-mlxbf
+$(PWR_MLXBF_DRIVER)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON)
+
+BF_PLATFORM_DRIVERS += $(PWR_MLXBF_DRIVER)
+export PWR_MLXBF_DRIVER_VERSION PWR_MLXBF_DRIVER
+
+MLXBF_PTM_DRIVER_VERSION = 1.1
+MLXBF_PTM_DRIVER = mlxbf-ptm.ko
+$(MLXBF_PTM_DRIVER)_SRC_PATH = $(PLATFORM_PATH)/mlxbf-ptm
+$(MLXBF_PTM_DRIVER)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON)
+
+BF_PLATFORM_DRIVERS += $(MLXBF_PTM_DRIVER)
+export MLXBF_PTM_DRIVER_VERSION MLXBF_PTM_DRIVER
+
+ifeq ($(BFB_IMG_TYPE), prod)
+BOOTIMAGES_BASE_URL = $(PROD_BOOTIMAGES_BASE_URL)
+BOOTIMAGES = mlxbf-bootimages-signed_$(BFSOC_VERSION)-$(BFSOC_REVISION)_arm64.deb
+else
+BOOTIMAGES_BASE_URL = $(DEV_BOOTIMAGES_BASE_URL)
+BOOTIMAGES = mlxbf-bootimages-devsigned_$(BFSOC_VERSION)-$(BFSOC_REVISION)_arm64.deb
+endif
+
+$(BOOTIMAGES)_URL = $(BOOTIMAGES_BASE_URL)/$(BOOTIMAGES)
+
+BFSOC_ONLINE_DEBS += $(BOOTIMAGES)
+export BOOTIMAGES BOOTIMAGES_BASE_URL
+
+MLNX_BLUEFIELD_BUILD_SCRIPTS =  bfscripts_$(BFSOC_VERSION)-$(BFSOC_REVISION)_all.deb
+$(MLNX_BLUEFIELD_BUILD_SCRIPTS)_SRC_PATH = $(PLATFORM_PATH)/bfscripts
+$(MLNX_BLUEFIELD_BUILD_SCRIPTS)_DEPENDS += $(MLXBF_BOOTCTL_DEB) $(BOOTIMAGES)
+$(MLNX_BLUEFIELD_BUILD_SCRIPTS)_RDEPENDS += $(MLXBF_BOOTCTL_DEB) $(BOOTIMAGES)
+
+BFSOC_MAKE_DEBS += $(MLNX_BLUEFIELD_BUILD_SCRIPTS)
+export MLNX_BLUEFIELD_BUILD_SCRIPTS
+
+BF_PLATFORM_MODULE_VERSION = 1.0
+BF_PLATFORM_MODULE = bluefield-platform-modules_$(BF_PLATFORM_MODULE_VERSION)_arm64.deb
+$(BF_PLATFORM_MODULE)_SRC_PATH = $(PLATFORM_PATH)/bluefield-platform-modules
+
+$(BF_PLATFORM_MODULE)_FILES = $(BF_PLATFORM_DRIVERS)
+
+SONIC_MAKE_DEBS += $(BF_PLATFORM_MODULE)
+export BF_PLATFORM_MODULE_VERSION BF_PLATFORM_MODULE BF_PLATFORM_DRIVERS
+
+ifeq ($(BFSOC_FROM_INTERNAL), y)
+SONIC_MAKE_FILES += $(BF_PLATFORM_DRIVERS)
+SONIC_MAKE_DEBS += $(BFSOC_MAKE_DEBS)
+SONIC_ONLINE_DEBS += $(BFSOC_ONLINE_DEBS)
+else
+$(eval $(foreach file,$(BF_PLATFORM_DRIVERS) $(BFSOC_MAKE_DEBS) $(BFSOC_MAKE_DEBS_DERIVED) $(BFSOC_ONLINE_DEBS), $(call make_url_bfsoc,$(file))))
+SONIC_ONLINE_FILES += $(BF_PLATFORM_DRIVERS)
+SONIC_ONLINE_DEBS += $(BFSOC_MAKE_DEBS) $(BFSOC_MAKE_DEBS_DERIVED) $(BFSOC_ONLINE_DEBS)
+endif
diff --git a/platform/nvidia-bluefield/recipes/docker-syncd-bluefield.dep b/platform/nvidia-bluefield/recipes/docker-syncd-bluefield.dep
new file mode 100644
index 000000000..5cb508354
--- /dev/null
+++ b/platform/nvidia-bluefield/recipes/docker-syncd-bluefield.dep
@@ -0,0 +1,11 @@
+
+DPATH := $($(DOCKER_SYNCD_BASE)_PATH)
+DEP_FILES := $(SONIC_COMMON_FILES_LIST) $(PLATFORM_PATH)/$(RECIPE_DIR)/docker-syncd-bluefield.mk $(PLATFORM_PATH)/$(RECIPE_DIR)/docker-syncd-bluefield.dep
+DEP_FILES += $(SONIC_COMMON_BASE_FILES_LIST)
+DEP_FILES += $(shell git ls-files -- $(DPATH))
+
+$(DOCKER_SYNCD_BASE)_CACHE_MODE := GIT_CONTENT_SHA
+$(DOCKER_SYNCD_BASE)_DEP_FLAGS := $(SONIC_COMMON_FLAGS_LIST)
+$(DOCKER_SYNCD_BASE)_DEP_FILES := $(DEP_FILES)
+
+$(eval $(call add_dbg_docker,$(DOCKER_SYNCD_BASE),$(DOCKER_SYNCD_BASE_DBG)))
diff --git a/platform/nvidia-bluefield/recipes/docker-syncd-bluefield.mk b/platform/nvidia-bluefield/recipes/docker-syncd-bluefield.mk
new file mode 100644
index 000000000..dcc7244d4
--- /dev/null
+++ b/platform/nvidia-bluefield/recipes/docker-syncd-bluefield.mk
@@ -0,0 +1,36 @@
+#
+# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+DOCKER_SYNCD_PLATFORM_CODE = bluefield
+include $(PLATFORM_PATH)/../template/docker-syncd-bookworm.mk
+
+$(DOCKER_SYNCD_BASE)_DEPENDS += $(SYNCD) $(MFT) $(SDN_APPL) $(DPU_SAI) $(MLNX_IPROUTE2)
+
+$(DOCKER_SYNCD_BASE)_DBG_DEPENDS += $(SYNCD_DBG) \
+                                $(LIBSWSSCOMMON_DBG) \
+                                $(LIBSAIMETADATA_DBG) \
+                                $(LIBSAIREDIS_DBG)
+
+ifeq ($(SDK_FROM_SRC), y)
+$(DOCKER_SYNCD_BASE)_DBG_DEPENDS += $(DPU_SAI_DBGSYM)
+endif
+
+$(DOCKER_SYNCD_BASE)_VERSION = 1.0.0
+$(DOCKER_SYNCD_BASE)_PACKAGE_NAME = syncd
+
+$(DOCKER_SYNCD_BASE)_RUN_OPT += -v /host/warmboot:/var/warmboot
+$(DOCKER_SYNCD_BASE)_RUN_OPT += -v /var/log/bluefield/sdk-dumps:/var/log/bluefield/sdk-dumps
diff --git a/platform/nvidia-bluefield/recipes/dpu-sai.dep b/platform/nvidia-bluefield/recipes/dpu-sai.dep
new file mode 100644
index 000000000..92cdae399
--- /dev/null
+++ b/platform/nvidia-bluefield/recipes/dpu-sai.dep
@@ -0,0 +1,21 @@
+# DPKG FRK
+
+SPATH := $($(DPU_SAI)_SRC_PATH)
+SLINKS := $(shell find $(SPATH) -type l -exec echo {} \; | grep -Ev ' ')
+SMDEP_PATHS := $(shell git submodule status --recursive -- $(SPATH) | awk '{print $$2}' | grep -Ev ' ')
+SMDEP_FILES := $(foreach path,$(SMDEP_PATHS),$(filter-out $(SMDEP_PATHS),$(addprefix $(path)/,$(shell cd $(path) && git ls-files | grep -Ev ' '))))
+DEP_FILES := $(SONIC_COMMON_FILES_LIST) $(PLATFORM_PATH)/$(RECIPE_DIR)/dpu-sai.mk $(PLATFORM_PATH)/$(RECIPE_DIR)/dpu-sai.dep
+DEP_FILES += $(SONIC_COMMON_BASE_FILES_LIST)
+DEP_FILES += $(filter-out $(SMDEP_PATHS),$(shell git ls-files -- $(SPATH) | grep -Ev ' '))
+
+$(DPU_SAI)_CACHE_MODE := GIT_CONTENT_SHA
+$(DPU_SAI)_DEP_FLAGS := $(SONIC_COMMON_FLAGS_LIST)
+$(DPU_SAI)_DEP_FILES := $(filter-out $(SLINKS),$(DEP_FILES))
+$(DPU_SAI)_SMDEP_FILES := $(filter-out $(SLINKS),$(SMDEP_FILES))
+$(DPU_SAI)_SMDEP_PATHS := $(SMDEP_PATHS)
+
+$(DPU_SAI_DBGSYM)_CACHE_MODE := GIT_CONTENT_SHA
+$(DPU_SAI_DBGSYM)_DEP_FLAGS := $(SONIC_COMMON_FLAGS_LIST)
+$(DPU_SAI_DBGSYM)_DEP_FILES := $(filter-out $(SLINKS),$(DEP_FILES))
+$(DPU_SAI_DBGSYM)_SMDEP_FILES := $(filter-out $(SLINKS),$(SMDEP_FILES))
+$(DPU_SAI_DBGSYM)_SMDEP_PATHS := $(SMDEP_PATHS)
diff --git a/platform/nvidia-bluefield/recipes/dpu-sai.mk b/platform/nvidia-bluefield/recipes/dpu-sai.mk
new file mode 100644
index 000000000..40b3f6e50
--- /dev/null
+++ b/platform/nvidia-bluefield/recipes/dpu-sai.mk
@@ -0,0 +1,47 @@
+#
+# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+DPU_SAI_VERSION = SAIBuild0.0.29.0
+
+# Place here URL where SAI sources exist
+DPU_SAI_SOURCE_BASE_URL=
+
+export DPU_SAI_VERSION DPU_SAI_SOURCE_BASE_URL
+
+define make_url_sai
+	$(1)_URL="https://github.com/Mellanox/sonic-bluefield-packages/releases/download/dpu-sai-$(DPU_SAI_VERSION)-$(BLDENV)/$(1)"
+
+endef
+
+DPU_SAI = mlnx-sai_1.mlnx.$(DPU_SAI_VERSION)_arm64.deb
+$(DPU_SAI)_SRC_PATH = $(PLATFORM_PATH)/dpu-sai
+$(DPU_SAI)_DEPENDS = $(SDN_APPL)
+$(DPU_SAI)_RDEPENDS = $(SDN_APPL)
+$(eval $(call add_conflict_package,$(DPU_SAI),$(LIBSAIVS_DEV)))
+DPU_SAI_DBGSYM = mlnx-sai-dbgsym_1.mlnx.$(DPU_SAI_VERSION)_arm64.deb
+$(eval $(call add_derived_package,$(DPU_SAI),$(DPU_SAI_DBGSYM)))
+
+ifneq ($(DPU_SAI_SOURCE_BASE_URL), )
+SONIC_MAKE_DEBS += $(DPU_SAI)
+else
+$(eval $(foreach deb,$(DPU_SAI) $(DPU_SAI_DBGSYM),$(call make_url_sai,$(deb))))
+SONIC_ONLINE_DEBS += $(DPU_SAI)
+endif
+
+
+export DPU_SAI
+export DPU_SAI_DBGSYM
diff --git a/platform/nvidia-bluefield/recipes/fw.dep b/platform/nvidia-bluefield/recipes/fw.dep
new file mode 100644
index 000000000..60cd2995e
--- /dev/null
+++ b/platform/nvidia-bluefield/recipes/fw.dep
@@ -0,0 +1,24 @@
+#
+# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+DEP_FILES := $(SONIC_COMMON_FILES_LIST) $(PLATFORM_PATH)/$(RECIPE_DIR)/fw.mk $(PLATFORM_PATH)/$(RECIPE_DIR)/fw.dep
+DEP_FILES += $(SONIC_COMMON_BASE_FILES_LIST)
+
+$(BF_FW_FILES)_CACHE_MODE := GIT_CONTENT_SHA
+$(BF_FW_FILES)_DEP_FLAGS := $(SONIC_COMMON_FLAGS_LIST) $(FW_BASE_PATH) $(BF3_FW_VERSION)
+$(BF_FW_FILES)_DEP_FILES := $(DEP_FILES)
+
diff --git a/platform/nvidia-bluefield/recipes/fw.mk b/platform/nvidia-bluefield/recipes/fw.mk
new file mode 100644
index 000000000..94b0486e9
--- /dev/null
+++ b/platform/nvidia-bluefield/recipes/fw.mk
@@ -0,0 +1,42 @@
+#
+# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+BF3_FW_BASE_URL =
+
+BF3_FW_VERSION = 32.39.1002
+
+BF3_FW_FILE = fw-BlueField-3-rel-$(subst .,_,$(BF3_FW_VERSION)).mfa
+
+define make_url_fw
+	$(1)_URL="https://github.com/Mellanox/sonic-bluefield-packages/releases/download/dpu-fw-$(BF3_FW_VERSION)/$(1)"
+
+endef
+
+
+ifeq ($(BF3_FW_BASE_URL),)
+$(eval $(foreach fw,$(BF3_FW_FILE),$(call make_url_fw,$(fw))))
+else
+$(BF3_FW_FILE)_URL = $(BF3_FW_BASE_URL)/$(BF3_FW_FILE)
+endif
+
+BF_FW_FILES = $(BF3_FW_FILE)
+
+export BF3_FW_FILE
+export BF_FW_FILES
+
+SONIC_ONLINE_FILES += $(BF_FW_FILES)
+
diff --git a/platform/nvidia-bluefield/recipes/get-soc-package.sh b/platform/nvidia-bluefield/recipes/get-soc-package.sh
new file mode 100755
index 000000000..a3d5fc441
--- /dev/null
+++ b/platform/nvidia-bluefield/recipes/get-soc-package.sh
@@ -0,0 +1,9 @@
+#!/bin/bash
+
+base_url=${1}
+package_name=${2}
+
+full_url=$(lynx --listonly --nonumbers -dump ${base_url} | grep ${package_name})
+wget ${full_url}
+rpm2cpio ${package_name}*.src.rpm | cpio -idmv
+tar xf *.tar.gz
diff --git a/platform/nvidia-bluefield/recipes/get_package_gh_asset_id.sh b/platform/nvidia-bluefield/recipes/get_package_gh_asset_id.sh
new file mode 100755
index 000000000..af0671233
--- /dev/null
+++ b/platform/nvidia-bluefield/recipes/get_package_gh_asset_id.sh
@@ -0,0 +1,32 @@
+#!/bin/bash
+#
+# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+tag=$1
+package=$2
+gh_token=$3
+
+repo=nvidia-sonic/sonic-bluefield-packages
+assetsfile='/tmp/dpu-sdk-fw-assets-'$tag
+lockfile='/tmp/dpu-sdk-fw-assets-lock-'$tag
+
+if [ ! -f $assetsfile ]; then
+  cmd="/usr/bin/curl -s -L -f -H 'Authorization: token $gh_token' 'https://api.github.com/repos/$repo/releases/tags/dpu-$tag' | jq -r '.assets[] | (.name) + \" \" + (.id | tostring)'"
+  eval "flock -w 5 $lockfile $cmd > $assetsfile"
+fi
+
+echo $(grep $package $assetsfile | awk '{print $2}')
diff --git a/platform/nvidia-bluefield/recipes/get_sdk_package_version.sh b/platform/nvidia-bluefield/recipes/get_sdk_package_version.sh
new file mode 100755
index 000000000..571103597
--- /dev/null
+++ b/platform/nvidia-bluefield/recipes/get_sdk_package_version.sh
@@ -0,0 +1,45 @@
+#!/bin/bash
+#
+# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+for i in "$@"; do
+  case $i in
+    -s)
+      short=true
+      shift
+      ;;
+    *)
+      ;;
+  esac
+done
+
+path=$1
+package=$2
+
+if [[ $path == "http"* ]]; then
+  cmd="curl -s"
+else
+  cmd="cat"
+fi
+
+version=$($cmd $path 2>/dev/null | grep ^$package | sed -e "s/$package -//g")
+
+if [[ $short == true ]]; then
+  echo $(echo $version | tr "-" " " | awk '{print $1}')
+else
+  echo $version
+fi
diff --git a/platform/nvidia-bluefield/recipes/installer-image.dep b/platform/nvidia-bluefield/recipes/installer-image.dep
new file mode 100644
index 000000000..74214c648
--- /dev/null
+++ b/platform/nvidia-bluefield/recipes/installer-image.dep
@@ -0,0 +1,5 @@
+# DPKG FRK
+
+(SONIC_BF_IMAGE_PXE)_CACHE_MODE := none
+(SONIC_BF_IMAGE_BIN)_CACHE_MODE := none
+(SONIC_BF_IMAGE_BFB)_CACHE_MODE := none
diff --git a/platform/nvidia-bluefield/recipes/installer-image.mk b/platform/nvidia-bluefield/recipes/installer-image.mk
new file mode 100644
index 000000000..e3831a54d
--- /dev/null
+++ b/platform/nvidia-bluefield/recipes/installer-image.mk
@@ -0,0 +1,92 @@
+#
+# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+# sonic nvidia-bluefield installer image
+
+SONIC_BF_IMAGE_BASE = sonic-nvidia-bluefield
+$(SONIC_BF_IMAGE_BASE)_MACHINE = nvidia-bluefield
+
+$(SONIC_BF_IMAGE_BASE)_DEPENDS += $(MLXBF_BOOTCTL_DEB) \
+                                   $(BOOTIMAGES) \
+                                   $(MLNX_BLUEFIELD_BUILD_SCRIPTS) \
+                                   $(MLNX_TOOLS) \
+                                   $(OFED_KERNEL_UTILS) \
+                                   $(KERNEL_MFT) \
+                                   $(MLNX_IPROUTE2)
+
+# Install the packages during the build_debian phase
+$(SONIC_BF_IMAGE_BASE)_INSTALLS += $(SYSTEMD_SONIC_GENERATOR) \
+                                    $(KERNEL_MFT) \
+                                    $(MFT_OEM) \
+                                    $(MFT) \
+                                    $(BOOTIMAGES) \
+                                    $(MLXBF_BOOTCTL_DEB) \
+                                    $(MLNX_BLUEFIELD_BUILD_SCRIPTS) \
+                                    $(MLX_OPENIPMI_DEB) \
+                                    $(MLX_OPENIPMI_SERVER_DEB) \
+                                    $(BF_PLATFORM_MODULE) \
+                                    $(OFED_KERNEL) \
+                                    $(MLNX_TOOLS) \
+                                    $(OFED_KERNEL_UTILS) \
+                                    $(MLNX_IPROUTE2)
+
+DISABLED_DOCKERS = $(DOCKER_SFLOW) $(DOCKER_MGMT_FRAMEWORK) $(DOCKER_NAT) $(DOCKER_TEAMD) $(DOCKER_ROUTER_ADVERTISER) $(DOCKER_MUX)
+DISABLED_PACKAGES_LOCAL = $(DOCKER_DHCP_RELAY) $(DOCKER_MACSEC)
+DISABLED_FEATURE_FLAGS = INCLUDE_SFLOW INCLUDE_MGMT_FRAMEWORK INCLUDE_NAT INCLUDE_MACSEC INCLUDE_TEAMD INCLUDE_ROUTER_ADVERTISER INCLUDE_MUX
+$(info Disabling the following docker images: $(DISABLED_DOCKERS))
+$(info Disabling the following packages:  $(DISABLED_PACKAGES_LOCAL))
+$(info Disabling the following feauture flags:  $(DISABLED_FEATURE_FLAGS))
+
+SONIC_PACKAGES_LOCAL := $(filter-out $(DISABLED_PACKAGES_LOCAL), $(SONIC_PACKAGES_LOCAL))
+
+$(foreach feature, $(DISABLED_FEATURE_FLAGS), $(eval override $(feature)=n ))
+
+$(SONIC_BF_IMAGE_BASE)_DOCKERS = $(filter-out $(DISABLED_DOCKERS), $(SONIC_INSTALL_DOCKER_IMAGES))
+$(SONIC_BF_IMAGE_BASE)_FILES = $(BF_FW_FILES)
+
+# A compressed archive which contains individual files required for PXE boot
+# A BFB image is also generated as a by-product of PXE image generation
+SONIC_BF_IMAGE_PXE = $(SONIC_BF_IMAGE_BASE).tar.gz
+$(SONIC_BF_IMAGE_PXE)_IMAGE_TYPE = pxe
+$(SONIC_BF_IMAGE_PXE)_MACHINE = $($(SONIC_BF_IMAGE_BASE)_MACHINE)
+$(SONIC_BF_IMAGE_PXE)_INSTALLS += $($(SONIC_BF_IMAGE_BASE)_INSTALLS)
+$(SONIC_BF_IMAGE_PXE)_DEPENDS += $($(SONIC_BF_IMAGE_BASE)_DEPENDS)
+$(SONIC_BF_IMAGE_PXE)_DOCKERS += $($(SONIC_BF_IMAGE_BASE)_DOCKERS)
+$(SONIC_BF_IMAGE_PXE)_LAZY_INSTALLS += $($(SONIC_BF_IMAGE_BASE)_LAZY_INSTALLS)
+$(SONIC_BF_IMAGE_PXE)_FILES += $($(SONIC_BF_IMAGE_BASE)_FILES) $(MLX_BOOTCTL_DRIVER)
+
+# The traditional *.bin image. Works for sonic-sonic upgrade.
+SONIC_BF_IMAGE_BIN = $(SONIC_BF_IMAGE_BASE).bin
+$(SONIC_BF_IMAGE_BIN)_IMAGE_TYPE = onie
+$(SONIC_BF_IMAGE_BIN)_MACHINE = $($(SONIC_BF_IMAGE_BASE)_MACHINE)
+$(SONIC_BF_IMAGE_BIN)_INSTALLS += $($(SONIC_BF_IMAGE_BASE)_INSTALLS)
+$(SONIC_BF_IMAGE_BIN)_DEPENDS += $($(SONIC_BF_IMAGE_BASE)_DEPENDS)
+$(SONIC_BF_IMAGE_BIN)_DOCKERS += $($(SONIC_BF_IMAGE_BASE)_DOCKERS)
+$(SONIC_BF_IMAGE_BIN)_LAZY_INSTALLS += $($(SONIC_BF_IMAGE_BASE)_LAZY_INSTALLS)
+$(SONIC_BF_IMAGE_BIN)_FILES += $($(SONIC_BF_IMAGE_BASE)_FILES)
+
+# BFB (Bluefield BootStream) style image
+SONIC_BF_IMAGE_BFB = $(SONIC_BF_IMAGE_BASE).bfb
+$(SONIC_BF_IMAGE_BFB)_IMAGE_TYPE = bfb
+$(SONIC_BF_IMAGE_BFB)_MACHINE = $($(SONIC_BF_IMAGE_BASE)_MACHINE)
+$(SONIC_BF_IMAGE_BFB)_INSTALLS += $($(SONIC_BF_IMAGE_BASE)_INSTALLS)
+$(SONIC_BF_IMAGE_BFB)_DEPENDS += $($(SONIC_BF_IMAGE_BASE)_DEPENDS)
+$(SONIC_BF_IMAGE_BFB)_DOCKERS += $($(SONIC_BF_IMAGE_BASE)_DOCKERS)
+$(SONIC_BF_IMAGE_BFB)_LAZY_INSTALLS += $($(SONIC_BF_IMAGE_BASE)_LAZY_INSTALLS)
+$(SONIC_BF_IMAGE_BFB)_FILES += $($(SONIC_BF_IMAGE_BASE)_FILES) $(MLX_BOOTCTL_DRIVER)
+
+SONIC_INSTALLERS += $(SONIC_BF_IMAGE_PXE) $(SONIC_BF_IMAGE_BIN) $(SONIC_BF_IMAGE_BFB)
diff --git a/platform/nvidia-bluefield/recipes/mft.dep b/platform/nvidia-bluefield/recipes/mft.dep
new file mode 100644
index 000000000..861adc492
--- /dev/null
+++ b/platform/nvidia-bluefield/recipes/mft.dep
@@ -0,0 +1,18 @@
+# DPKG FRK
+
+SPATH := $($(MFT)_SRC_PATH)
+DEP_FILES := $(SONIC_COMMON_FILES_LIST) $(PLATFORM_PATH)/$(RECIPE_DIR)/mft.mk $(PLATFORM_PATH)/$(RECIPE_DIR)/mft.dep
+DEP_FILES += $(SONIC_COMMON_BASE_FILES_LIST)
+DEP_FILES += $(shell git ls-files -- $(SPATH))
+
+$(MFT)_CACHE_MODE := GIT_CONTENT_SHA
+$(MFT)_DEP_FLAGS := $(SONIC_COMMON_FLAGS_LIST)
+$(MFT)_DEP_FILES := $(DEP_FILES)
+
+$(KERNEL_MFT)_CACHE_MODE := GIT_CONTENT_SHA
+$(KERNEL_MFT)_DEP_FLAGS := $(SONIC_COMMON_FLAGS_LIST)
+$(KERNEL_MFT)_DEP_FILES := $(DEP_FILES)
+
+$(MFT_OEM)_CACHE_MODE := GIT_CONTENT_SHA
+$(MFT_OEM)_DEP_FLAGS := $(SONIC_COMMON_FLAGS_LIST)
+$(MFT_OEM)_DEP_FILES := $(DEP_FILES)
diff --git a/platform/nvidia-bluefield/recipes/mft.mk b/platform/nvidia-bluefield/recipes/mft.mk
new file mode 100644
index 000000000..7f5615865
--- /dev/null
+++ b/platform/nvidia-bluefield/recipes/mft.mk
@@ -0,0 +1,44 @@
+#
+# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+MFT_VERSION = 4.26.1
+MFT_REVISION = 3
+
+MFT_INTERNAL_SOURCE_BASE_URL =
+
+ifneq ($(MFT_INTERNAL_SOURCE_BASE_URL), )
+MFT_FROM_INTERNAL = y
+else
+MFT_FROM_INTERNAL = n
+endif
+
+export MFT_VERSION MFT_REVISION MFT_FROM_INTERNAL MFT_INTERNAL_SOURCE_BASE_URL
+
+MFT = mft_$(MFT_VERSION)-$(MFT_REVISION)_arm64.deb
+$(MFT)_SRC_PATH = $(PLATFORM_PATH)/mft
+
+MFT_OEM = mft-oem_$(MFT_VERSION)-$(MFT_REVISION)_arm64.deb
+$(eval $(call add_derived_package,$(MFT),$(MFT_OEM)))
+
+KERNEL_MFT_DKMS = kernel-mft-dkms_$(MFT_VERSION)-$(MFT_REVISION)_all.deb
+$(eval $(call add_derived_package,$(MFT),$(KERNEL_MFT_DKMS)))
+
+BUILD_ARCH = $(shell dpkg-architecture -qDEB_BUILD_ARCH)
+KERNEL_MFT = kernel-mft-dkms-modules-$(KVERSION)_$(MFT_VERSION)_$(BUILD_ARCH).deb
+$(KERNEL_MFT)_SRC_PATH = $(PLATFORM_PATH)/mft
+$(KERNEL_MFT)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON) $(KERNEL_MFT_DKMS)
+
+SONIC_MAKE_DEBS += $(MFT) $(KERNEL_MFT)
diff --git a/platform/nvidia-bluefield/recipes/platform-api.dep b/platform/nvidia-bluefield/recipes/platform-api.dep
new file mode 100644
index 000000000..c2f3b7acd
--- /dev/null
+++ b/platform/nvidia-bluefield/recipes/platform-api.dep
@@ -0,0 +1,9 @@
+SPATH := $($(SONIC_PLATFORM_API_PY3)_SRC_PATH)
+SLINKS := $(shell find $(SPATH) -type l -exec echo {} \; | grep -Ev ' ')
+DEP_FILES := $(SONIC_COMMON_FILES_LIST) $(PLATFORM_PATH)/$(RECIPE_DIR)/platform-api.mk $(PLATFORM_PATH)/$(RECIPE_DIR)/platform-api.dep
+DEP_FILES += $(SONIC_COMMON_BASE_FILES_LIST)
+DEP_FILES += $(shell git ls-files -- $(SPATH) | grep -Ev ' ')
+
+$(SONIC_PLATFORM_API_PY3)_CACHE_MODE := GIT_CONTENT_SHA
+$(SONIC_PLATFORM_API_PY3)_DEP_FLAGS := $(SONIC_COMMON_FLAGS_LIST)
+$(SONIC_PLATFORM_API_PY3)_DEP_FILES := $(filter-out $(SLINKS),$(DEP_FILES))
diff --git a/platform/nvidia-bluefield/recipes/platform-api.mk b/platform/nvidia-bluefield/recipes/platform-api.mk
new file mode 100644
index 000000000..c9b670d9c
--- /dev/null
+++ b/platform/nvidia-bluefield/recipes/platform-api.mk
@@ -0,0 +1,27 @@
+#
+# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+# SONIC_PLATFORM_API_PY3 package
+
+SONIC_PLATFORM_API_PY3 = platform_api-1.0-py3-none-any.whl
+$(SONIC_PLATFORM_API_PY3)_SRC_PATH = $(PLATFORM_PATH)/platform-api
+$(SONIC_PLATFORM_API_PY3)_PYTHON_VERSION = 3
+$(SONIC_PLATFORM_API_PY3)_DEPENDS = $(SONIC_PY_COMMON_PY3) $(SONIC_PLATFORM_COMMON_PY3) $(SONIC_CONFIG_ENGINE_PY3) $(SONIC_PLATFORM_API_PY2)
+$(SONIC_PLATFORM_API_PY3)_DEBS_DEPENDS = $(PYTHON3_SWSSCOMMON)
+SONIC_PYTHON_WHEELS += $(SONIC_PLATFORM_API_PY3)
+
+export platform_api_py3_wheel_path="$(addprefix $(PYTHON_WHEELS_PATH)/,$(SONIC_PLATFORM_API_PY3))"
diff --git a/platform/nvidia-bluefield/recipes/sdk.dep b/platform/nvidia-bluefield/recipes/sdk.dep
new file mode 100644
index 000000000..ced96a512
--- /dev/null
+++ b/platform/nvidia-bluefield/recipes/sdk.dep
@@ -0,0 +1,190 @@
+#
+# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+SDK_COMMON_FLAGS_LIST = $(SONIC_COMMON_FLAGS_LIST) $(SDK_VERSION)
+SDK_COMMON_FILES_LIST = $(SONIC_COMMON_BASE_FILES_LIST) \
+	$(SONIC_COMMON_FILES_LIST) \
+	$(PLATFORM_PATH)/recipes/sdk.mk \
+	$(PLATFORM_PATH)/recipes/sdk.dep \
+	$(PLATFORM_PATH)/recipes/get_sdk_package_version.sh
+
+# OFED
+
+SPATH := $($(OFED_KERNEL)_SRC_PATH)
+DEP_FILES := $(SDK_COMMON_FILES_LIST)
+DEP_FILES += $(shell git ls-files -- $(SPATH))
+
+$(OFED_KERNEL)_CACHE_MODE := GIT_CONTENT_SHA
+$(OFED_KERNEL)_DEP_FLAGS := $(SDK_COMMON_FLAGS_LIST)
+$(OFED_KERNEL)_DEP_FILES := $(DEP_FILES)
+
+$(MLNX_TOOLS)_CACHE_MODE := GIT_CONTENT_SHA
+$(MLNX_TOOLS)_DEP_FLAGS := $(SDK_COMMON_FLAGS_LIST)
+$(MLNX_TOOLS)_DEP_FILES := $(DEP_FILES)
+
+$(OFED_KERNEL_UTILS)_CACHE_MODE := GIT_CONTENT_SHA
+$(OFED_KERNEL_UTILS)_DEP_FLAGS := $(SDK_COMMON_FLAGS_LIST)
+$(OFED_KERNEL_UTILS)_DEP_FILES := $(DEP_FILES)
+
+# mlnx-iproute2
+
+SPATH := $($(MLNX_IPROUTE2)_SRC_PATH)
+DEP_FILES := $(SDK_COMMON_FILES_LIST)
+DEP_FILES += $(shell git ls-files -- $(SPATH))
+
+$(MLNX_IPROUTE2)_CACHE_MODE := GIT_CONTENT_SHA
+$(MLNX_IPROUTE2)_DEP_FLAGS := $(SDK_COMMON_FLAGS_LIST)
+$(MLNX_IPROUTE2)_DEP_FILES := $(DEP_FILES)
+
+# RDMA core and derived packages
+
+SPATH := $($(RDMA_CORE)_SRC_PATH)
+DEP_FILES := $(SDK_COMMON_FILES_LIST)
+DEP_FILES += $(shell git ls-files -- $(SPATH))
+
+$(RDMA_CORE)_CACHE_MODE := GIT_CONTENT_SHA
+$(RDMA_CORE)_DEP_FLAGS := $(SDK_COMMON_FLAGS_LIST)
+$(RDMA_CORE)_DEP_FILES := $(DEP_FILES)
+
+$(IB_VERBS_PROV)_CACHE_MODE := GIT_CONTENT_SHA
+$(IB_VERBS_PROV)_DEP_FLAGS := $(SDK_COMMON_FLAGS_LIST)
+$(IB_VERBS_PROV)_DEP_FILES := $(DEP_FILES)
+
+$(IB_VERBS)_CACHE_MODE := GIT_CONTENT_SHA
+$(IB_VERBS)_DEP_FLAGS := $(SDK_COMMON_FLAGS_LIST)
+$(IB_VERBS)_DEP_FILES := $(DEP_FILES)
+
+$(IB_VERBS_DEV)_CACHE_MODE := GIT_CONTENT_SHA
+$(IB_VERBS_DEV)_DEP_FLAGS := $(SDK_COMMON_FLAGS_LIST)
+$(IB_VERBS_DEV)_DEP_FILES := $(DEP_FILES)
+
+$(IB_UMAD)_CACHE_MODE := GIT_CONTENT_SHA
+$(IB_UMAD)_DEP_FLAGS := $(SDK_COMMON_FLAGS_LIST)
+$(IB_UMAD)_DEP_FILES := $(DEP_FILES)
+
+$(IB_UMAD_DEV)_CACHE_MODE := GIT_CONTENT_SHA
+$(IB_UMAD_DEV)_DEP_FLAGS := $(SDK_COMMON_FLAGS_LIST)
+$(IB_UMAD_DEV)_DEP_FILES := $(DEP_FILES)
+
+ifeq ($(SDK_FROM_SRC),y)
+$(RDMA_CORE_DBGSYM)_CACHE_MODE := GIT_CONTENT_SHA
+$(RDMA_CORE_DBGSYM)_DEP_FLAGS := $(SDK_COMMON_FLAGS_LIST)
+$(RDMA_CORE_DBGSYM)_DEP_FILES := $(DEP_FILES)
+
+$(IB_VERBS_PROV_DBGSYM)_CACHE_MODE := GIT_CONTENT_SHA
+$(IB_VERBS_PROV_DBGSYM)_DEP_FLAGS := $(SDK_COMMON_FLAGS_LIST)
+$(IB_VERBS_PROV_DBGSYM)_DEP_FILES := $(DEP_FILES)
+
+$(IB_VERBS_DBGSYM)_CACHE_MODE := GIT_CONTENT_SHA
+$(IB_VERBS_DBGSYM)_DEP_FLAGS := $(SDK_COMMON_FLAGS_LIST)
+$(IB_VERBS_DBGSYM)_DEP_FILES := $(DEP_FILES)
+
+$(IB_UMAD_DBGSYM)_CACHE_MODE := GIT_CONTENT_SHA
+$(IB_UMAD_DBGSYM)_DEP_FLAGS := $(SDK_COMMON_FLAGS_LIST)
+$(IB_UMAD_DBGSYM)_DEP_FILES := $(DEP_FILES)
+endif
+
+# DPDK packages
+
+SPATH := $($(DPDK)_SRC_PATH)
+DEP_FILES := $(SDK_COMMON_FILES_LIST)
+DEP_FILES += $(shell git ls-files -- $(SPATH))
+
+$(DPDK)_CACHE_MODE := GIT_CONTENT_SHA
+$(DPDK)_DEP_FLAGS := $(SDK_COMMON_FLAGS_LIST)
+$(DPDK)_DEP_FILES := $(DEP_FILES)
+
+$(DPDK_DEV)_CACHE_MODE := GIT_CONTENT_SHA
+$(DPDK_DEV)_DEP_FLAGS := $(SDK_COMMON_FLAGS_LIST)
+$(DPDK_DEV)_DEP_FILES := $(DEP_FILES)
+
+# Collectx CLXAPI
+
+FLAGS := $($(COLLECTX_CLXAPI)_URL)
+DEP_FILES := $(SDK_COMMON_FILES_LIST)
+
+$(COLLECTX_CLXAPI)_CACHE_MODE := GIT_CONTENT_SHA
+$(COLLECTX_CLXAPI)_DEP_FLAGS := $(SONIC_COMMON_FLAGS_LIST) $(FLAGS)
+$(COLLECTX_CLXAPI)_DEP_FILES := $(DEP_FILES)
+
+# RXP compiler
+
+SPATH := $($(RXPCOMPILER)_SRC_PATH)
+DEP_FILES := $(SDK_COMMON_FILES_LIST)
+DEP_FILES += $(shell git ls-files -- $(SPATH))
+
+$(RXPCOMPILER)_CACHE_MODE := GIT_CONTENT_SHA
+$(RXPCOMPILER)_DEP_FLAGS := $(SDK_COMMON_FLAGS_LIST)
+$(RXPCOMPILER)_DEP_FILES := $(DEP_FILES)
+
+$(LIBRXPCOMPILER_DEV)_CACHE_MODE := GIT_CONTENT_SHA
+$(LIBRXPCOMPILER_DEV)_DEP_FLAGS := $(SDK_COMMON_FLAGS_LIST)
+$(LIBRXPCOMPILER_DEV)_DEP_FILES := $(DEP_FILES)
+
+# UCX
+
+SPATH := $($(UCX)_SRC_PATH)
+DEP_FILES := $(SDK_COMMON_FILES_LIST)
+DEP_FILES += $(shell git ls-files -- $(SPATH))
+
+$(UCX)_CACHE_MODE := GIT_CONTENT_SHA
+$(UCX)_DEP_FLAGS := $(SDK_COMMON_FLAGS_LIST)
+$(UCX)_DEP_FILES := $(DEP_FILES)
+
+# GRPC
+
+SPATH := $($(LIBGRPC_DEV)_SRC_PATH)
+DEP_FILES := $(SDK_COMMON_FILES_LIST)
+DEP_FILES += $(shell git ls-files -- $(SPATH))
+
+$(LIBGRPC_DEV)_CACHE_MODE := GIT_CONTENT_SHA
+$(LIBGRPC_DEV)_DEP_FLAGS := $(SDK_COMMON_FLAGS_LIST)
+$(LIBGRPC_DEV)_DEP_FILES := $(DEP_FILES)
+
+$(LIBGRPC_DBG)_CACHE_MODE := GIT_CONTENT_SHA
+$(LIBGRPC_DBG)_DEP_FLAGS := $(SDK_COMMON_FLAGS_LIST)
+$(LIBGRPC_DBG)_DEP_FILES := $(DEP_FILES)
+
+# DOCA
+
+SPATH := $($(DOCA_LIBS)_SRC_PATH)
+DEP_FILES := $(SDK_COMMON_FILES_LIST)
+DEP_FILES += $(shell git ls-files -- $(SPATH))
+
+$(DOCA_LIBS)_CACHE_MODE := GIT_CONTENT_SHA
+$(DOCA_LIBS)_DEP_FLAGS := $(SDK_COMMON_FLAGS_LIST)
+$(DOCA_LIBS)_DEP_FILES := $(DEP_FILES)
+
+$(DOCA_LIBS_DEV)_CACHE_MODE := GIT_CONTENT_SHA
+$(DOCA_LIBS_DEV)_DEP_FLAGS := $(SDK_COMMON_FLAGS_LIST)
+$(DOCA_LIBS_DEV)_DEP_FILES := $(DEP_FILES)
+
+ifeq ($(SDK_FROM_SRC),y)
+$(DOCA_LIBS_DBG)_CACHE_MODE := GIT_CONTENT_SHA
+$(DOCA_LIBS_DBG)_DEP_FLAGS := $(SDK_COMMON_FLAGS_LIST)
+$(DOCA_LIBS_DBG)_DEP_FILES := $(DEP_FILES)
+endif
+
+# SDN appliance
+
+SPATH := $($(SDN_APPL)_SRC_PATH)
+DEP_FILES := $(SDK_COMMON_FILES_LIST)
+DEP_FILES += $(shell git ls-files -- $(SPATH))
+
+$(SDN_APPL)_CACHE_MODE := GIT_CONTENT_SHA
+$(SDN_APPL)_DEP_FLAGS := $(SDK_COMMON_FLAGS_LIST)
+$(SDN_APPL)_DEP_FILES := $(DEP_FILES)
diff --git a/platform/nvidia-bluefield/recipes/sdk.mk b/platform/nvidia-bluefield/recipes/sdk.mk
new file mode 100644
index 000000000..d2a35a30f
--- /dev/null
+++ b/platform/nvidia-bluefield/recipes/sdk.mk
@@ -0,0 +1,331 @@
+#
+# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+SDK_BASE_PATH = $(PLATFORM_PATH)/sdk-src/sonic-bluefield-packages/bin
+
+# Place here URL where SDK sources exist
+SDK_SOURCE_BASE_URL =
+SDK_VERSION = 24.1-RC3
+
+SDK_COLLECTX_URL = https://linux.mellanox.com/public/repo/doca/1.5.2/debian12/aarch64/
+
+SDK_GH_BASE_URL = https://github.com/Mellanox/sonic-bluefield-packages/releases/download/dpu-sdk-$(SDK_VERSION)-$(BLDENV)/
+
+define make_url_sdk
+	$(1)_URL="$(SDK_GH_BASE_URL)/$(1)"
+
+endef
+
+define get_sdk_version_file_gh
+	$(shell wget --quiet $(1) -O $(2))
+
+endef
+
+ifneq ($(SDK_SOURCE_BASE_URL), )
+SDK_FROM_SRC = y
+SDK_SOURCE_URL = $(SDK_SOURCE_BASE_URL)/$(subst -,/,$(SDK_VERSION))
+SDK_VERSIONS_FILE = $(PLATFORM_PATH)/sdk-src/VERSIONS
+$(eval $(call get_sdk_version_file_gh, "$(SDK_SOURCE_URL)/VERSIONS_FOR_SONIC_BUILD", $(SDK_VERSIONS_FILE)))
+else
+SDK_FROM_SRC = n
+SDK_VERSIONS_FILE = $(PLATFORM_PATH)/sdk-src/VERSIONS
+$(eval $(call get_sdk_version_file_gh, "$(SDK_GH_BASE_URL)/VERSIONS_FOR_SONIC_BUILD", $(SDK_VERSIONS_FILE)))
+endif
+
+export SDK_VERSION SDK_SOURCE_URL
+
+define get_sdk_package_version_short
+$(shell $(PLATFORM_PATH)/recipes/get_sdk_package_version.sh -s $(SDK_VERSIONS_FILE) $(1))
+endef
+
+define get_sdk_package_version_full
+$(shell $(PLATFORM_PATH)/recipes/get_sdk_package_version.sh $(SDK_VERSIONS_FILE) $(1))
+endef
+
+SDK_DEBS =
+SDK_SRC_TARGETS =
+SDK_ONLINE_TARGETS =
+
+# OFED and derived packages
+
+OFED_VER_SHORT = $(call get_sdk_package_version_short,"ofed")
+OFED_VER_FULL = $(call get_sdk_package_version_full,"ofed")
+OFED_KERNEL_VER_SHORT = $(call get_sdk_package_version_short,"mlnx-ofed-kernel")
+OFED_KERNEL_VER_FULL = $(call get_sdk_package_version_full,"mlnx-ofed-kernel")
+MLNX_TOOLS_VER = $(call get_sdk_package_version_full,"mlnx-tools")
+
+MLNX_TOOLS = mlnx-tools_$(MLNX_TOOLS_VER)_arm64.deb
+$(MLNX_TOOLS)_SRC_PATH = $(PLATFORM_PATH)/sdk-src/ofed
+
+OFED_KERNEL_UTILS = mlnx-ofed-kernel-utils_$(OFED_KERNEL_VER_FULL)-1_arm64.deb
+
+$(eval $(call add_derived_package,$(MLNX_TOOLS),$(OFED_KERNEL_UTILS)))
+
+OFED_KERNEL_DKMS = mlnx-ofed-kernel-dkms_$(OFED_KERNEL_VER_SHORT)-1_all.deb
+$(OFED_KERNEL_DKMS)_DEPENDS = $(OFED_KERNEL_UTILS)
+
+$(eval $(call add_derived_package,$(MLNX_TOOLS),$(OFED_KERNEL_DKMS)))
+
+OFED_KERNEL = mlnx-ofed-kernel-modules-$(KVERSION)_$(OFED_KERNEL_VER_SHORT)_$(BUILD_ARCH).deb
+$(OFED_KERNEL)_SRC_PATH = $(PLATFORM_PATH)/sdk-src/ofed
+$(OFED_KERNEL)_DEPENDS = $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON)
+
+ifeq ($(SDK_FROM_SRC), y)
+$(OFED_KERNEL)_DEPENDS += $(OFED_KERNEL_DKMS)
+endif
+
+export OFED_VER_SHORT OFED_VER_FULL OFED_KERNEL OFED_KERNEL_UTILS OFED_KERNEL_VER_FULL MLNX_TOOLS OFED_KERNEL_DKMS
+
+SDK_DEBS += $(OFED_KERNEL) $(MLNX_TOOLS) $(OFED_KERNEL_UTILS)
+SDK_SRC_TARGETS += $(OFED_KERNEL) $(MLNX_TOOLS)
+
+# MLNX iproute2
+MLNX_IPROUTE2_VER = $(call get_sdk_package_version_full,"mlnx-iproute2")
+
+MLNX_IPROUTE2 = mlnx-iproute2_$(MLNX_IPROUTE2_VER)_arm64.deb
+$(MLNX_IPROUTE2)_SRC_PATH = $(PLATFORM_PATH)/sdk-src/mlnx-iproute2
+
+export MLNX_IPROUTE2_VER MLNX_IPROUTE2
+
+MLNX_IPROUTE2_DERIVED_DEBS = 
+
+export MLNX_IPROUTE2_DERIVED_DEBS
+
+SDK_DEBS += $(MLNX_IPROUTE2) $(MLNX_IPROUTE2_DERIVED_DEBS)
+SDK_SRC_TARGETS += $(MLNX_IPROUTE2)
+
+# RDMA and derived packages
+
+RDMA_CORE_VER = $(call get_sdk_package_version_full,"rdma-core")
+RDMA_CORE = rdma-core_${RDMA_CORE_VER}_${CONFIGURED_ARCH}.deb
+$(RDMA_CORE)_SRC_PATH = $(PLATFORM_PATH)/sdk-src/rdma
+$(RDMA_CORE)_RDEPENDS = $(LIBNL3)
+$(RDMA_CORE)_DEPENDS = $(LIBNL3_DEV) $(LIBNL_ROUTE3_DEV)
+RDMA_CORE_DBGSYM = rdma-core-dbgsym_${RDMA_CORE_VER}_${CONFIGURED_ARCH}.deb
+
+IB_VERBS_PROV = ibverbs-providers_${RDMA_CORE_VER}_${CONFIGURED_ARCH}.deb
+$(IB_VERBS_PROV)_DEPENDS = $(LIBNL3_DEV) $(LIBNL_ROUTE3_DEV)
+IB_VERBS_PROV_DBGSYM = ibverbs-providers-dbgsym_${RDMA_CORE_VER}_${CONFIGURED_ARCH}.deb
+
+IB_VERBS = libibverbs1_${RDMA_CORE_VER}_${CONFIGURED_ARCH}.deb
+$(IB_VERBS)_DEPENDS = $(LIBNL3_DEV) $(LIBNL_ROUTE3_DEV)
+IB_VERBS_DEV = libibverbs-dev_${RDMA_CORE_VER}_${CONFIGURED_ARCH}.deb
+$(IB_VERBS_DEV)_DEPENDS = $(IB_VERBS) $(IB_VERBS_PROV)
+IB_VERBS_DBGSYM = libibverbs1-dbg_${RDMA_CORE_VER}_${CONFIGURED_ARCH}.deb
+
+IB_UMAD = libibumad3_${RDMA_CORE_VER}_${CONFIGURED_ARCH}.deb
+IB_UMAD_DEV = libibumad-dev_${RDMA_CORE_VER}_${CONFIGURED_ARCH}.deb
+IB_UMAD_DBGSYM = libibumad3-dbg_${RDMA_CORE_VER}_${CONFIGURED_ARCH}.deb
+
+RDMACM = librdmacm1_${RDMA_CORE_VER}_${CONFIGURED_ARCH}.deb
+RDMACM_DEV = librdmacm-dev_${RDMA_CORE_VER}_${CONFIGURED_ARCH}.deb
+$(RDMACM_DEV)_DEPENDS = $(RDMACM) $(IB_VERBS_DEV)
+RDMACM_DBGSYM = librdmacm1-dbg_${RDMA_CORE_VER}_${CONFIGURED_ARCH}.deb
+
+$(eval $(call add_derived_package,$(RDMA_CORE),$(IB_VERBS_PROV)))
+$(eval $(call add_derived_package,$(RDMA_CORE),$(IB_VERBS)))
+$(eval $(call add_derived_package,$(RDMA_CORE),$(IB_VERBS_DEV)))
+$(eval $(call add_derived_package,$(RDMA_CORE),$(IB_UMAD)))
+$(eval $(call add_derived_package,$(RDMA_CORE),$(IB_UMAD_DEV)))
+$(eval $(call add_derived_package,$(RDMA_CORE),$(RDMACM)))
+$(eval $(call add_derived_package,$(RDMA_CORE),$(RDMACM_DEV)))
+
+ifeq ($(SDK_FROM_SRC),y)
+$(eval $(call add_derived_package,$(RDMA_CORE),$(RDMA_CORE_DBGSYM)))
+$(eval $(call add_derived_package,$(RDMA_CORE),$(IB_VERBS_PROV_DBGSYM)))
+$(eval $(call add_derived_package,$(RDMA_CORE),$(IB_VERBS_DBGSYM)))
+$(eval $(call add_derived_package,$(RDMA_CORE),$(IB_UMAD_DBGSYM)))
+$(eval $(call add_derived_package,$(RDMA_CORE),$(RDMACM_DBGSYM)))
+endif
+
+export RDMA_CORE RDMA_CORE_DBGSYM
+export IB_VERBS IB_VERBS_DEV IB_VERBS_DBGSYM
+export IB_VERBS_PROV IB_VERBS_PROV_DBGSYM
+export IB_UMAD IB_UMAD_DEV IB_UMAD_DBGSYM
+export RDMACM RDMACM_DEV RDMACM_DBGSYM
+
+RDMA_CORE_DERIVED_DEBS = $(RDMA_CORE_DBGSYM) \
+		$(IB_VERBS) \
+		$(IB_VERBS_DEV) \
+		$(IB_VERBS_DBGSYM) \
+		$(IB_VERBS_PROV) \
+		$(IB_VERBS_PROV_DBGSYM) \
+		$(IB_UMAD) \
+		$(IB_UMAD_DEV) \
+		$(IB_UMAD_DBGSYM) \
+		$(RDMACM) \
+		$(RDMACM_DEV) \
+		$(RDMACM_DBGSYM)
+
+export RDMA_CORE_DERIVED_DEBS
+
+SDK_DEBS += $(RDMA_CORE) $(RDMA_CORE_DERIVED_DEBS)
+SDK_SRC_TARGETS += $(RDMA_CORE)
+
+# FlexIO
+
+#FLEXIO_VER = $(call get_sdk_package_version_full,"flexio")
+#
+#FLEXIO = flexio_$(FLEXIO_VER)_arm64.deb
+#$(FLEXIO)_SRC_PATH = $(PLATFORM_PATH)/sdk-src/flexio
+#$(FLEXIO)_DEPENDS = $(IB_VERBS_PROV) $(IB_VERBS) $(IB_VERBS_DEV)
+#$(FLEXIO)_RDEPENDS = $(IB_VERBS_PROV) $(IB_VERBS) $(IB_VERBS_DEV)
+#
+#export FLEXIO_VER FLEXIO
+
+SDK_DEBS += $(FLEXIO)
+SDK_SRC_TARGETS += $(FLEXIO)
+
+# DPDK and derived packages
+
+DPDK_VER = $(call get_sdk_package_version_full,"dpdk")
+
+DPDK = mlnx-dpdk_${DPDK_VER}_${CONFIGURED_ARCH}.deb
+$(DPDK)_SRC_PATH = $(PLATFORM_PATH)/sdk-src/dpdk
+$(DPDK)_DEPENDS = $(FLEXIO)
+$(DPDK)_RDEPENDS = $(FLEXIO) $(IB_VERBS_PROV) $(IB_VERBS) $(IB_VERBS_DEV)
+
+DPDK_DEV = mlnx-dpdk-dev_${DPDK_VER}_${CONFIGURED_ARCH}.deb
+$(DPDK)_DEPENDS = $(RDMA_CORE) $(IB_VERBS_PROV) $(IB_VERBS) $(IB_VERBS_DEV) $(FLEXIO)
+$(DPDK_DEV)_RDEPENDS = $(DPDK) $(FLEXIO)
+
+$(eval $(call add_derived_package,$(DPDK),$(DPDK_DEV)))
+
+export DPDK DPDK_DEV
+
+DPDK_DERIVED_DEBS = $(DPDK_DEV)
+export DPDK_DERIVED_DEBS
+
+SDK_DEBS += $(DPDK) $(DPDK_DERIVED_DEBS)
+SDK_SRC_TARGETS += $(DPDK)
+
+# Collectx
+
+COLLECTX_CLXAPI = collectx_1.14.3-9642347-debian12.1-aarch64-clxapi.deb
+$(COLLECTX_CLXAPI)_URL = $(SDK_COLLECTX_URL)/collectx_1.14.3-9642347-debian12.1-aarch64-clxapi.deb
+$(COLLECTX_CLXAPI)_RDEPENDS = $(IB_UMAD)
+
+COLLECTX_CLXAPI_DEV = collectx_1.14.3-9642347-debian12.1-aarch64-clxapidev.deb
+$(COLLECTX_CLXAPI_DEV)_URL = $(SDK_COLLECTX_URL)/collectx_1.14.3-9642347-debian12.1-aarch64-clxapidev.deb
+$(COLLECTX_CLXAPI_DEV)_DEPENDS = $(COLLECTX_CLXAPI)
+$(COLLECTX_CLXAPI_DEV)_RDEPENDS = $(IB_UMAD)
+
+SDK_DEBS += $(COLLECTX_CLXAPI) $(COLLECTX_CLXAPI_DEV)
+SDK_ONLINE_TARGETS += $(COLLECTX_CLXAPI) $(COLLECTX_CLXAPI_DEV)
+
+# RXP compiler and derived packages
+
+RXPCOMPILER_VER = $(call get_sdk_package_version_full,"rxp-tools")
+
+RXPCOMPILER = rxp-compiler_$(RXPCOMPILER_VER)_arm64.deb
+$(RXPCOMPILER)_SRC_PATH = $(PLATFORM_PATH)/sdk-src/rxp-compiler
+LIBRXPCOMPILER_DEV = librxpcompiler-dev_$(RXPCOMPILER_VER)_arm64.deb
+
+$(eval $(call add_derived_package,$(RXPCOMPILER),$(LIBRXPCOMPILER_DEV)))
+
+export RXPCOMPILER LIBRXPCOMPILER_DEV
+
+RXPCOMPILER_DERIVED_DEBS = $(LIBRXPCOMPILER_DEV)
+export RXPCOMPILER_DERIVED_DEBS
+
+SDK_DEBS += $(RXPCOMPILER) $(RXPCOMPILER_DERIVED_DEBS)
+SDK_SRC_TARGETS += $(RXPCOMPILER)
+
+# UCX and derived packages
+
+UCX_VER = $(call get_sdk_package_version_full,"ucx")
+
+UCX = ucx_$(UCX_VER)_arm64.deb
+$(UCX)_DEPENDS = $(IB_VERBS_PROV) $(IB_VERBS) $(IB_VERBS_DEV) $(RDMACM) $(RDMACM_DEV)
+$(UCX)_RDEPENDS = $(IB_VERBS_PROV) $(IB_VERBS)
+$(UCX)_SRC_PATH = $(PLATFORM_PATH)/sdk-src/ucx
+
+export UCX_VER UCX
+
+SDK_DEBS += $(UCX)
+SDK_SRC_TARGETS += $(UCX)
+
+# GRPC and derived packages
+
+LIBGRPC_VER = $(call get_sdk_package_version_full,"grpc")
+
+LIBGRPC_DEV = libgrpc-dev_$(LIBGRPC_VER)_arm64.deb
+$(LIBGRPC_DEV)_SRC_PATH = $(PLATFORM_PATH)/sdk-src/grpc
+LIBGRPC_DBG = libgrpc-dev-dbgsym_$(LIBGRPC_VER)_arm64.deb
+
+$(eval $(call add_derived_package,$(LIBGRPC_DEV),$(LIBGRPC_DBG)))
+
+export LIBGRPC_DEV LIBGRPC_DBG LIBGRPC_VER
+
+LIBGRPC_DERIVED_DEBS = $(LIBGRPC_DBG)
+export LIBGRPC_DERIVED_DEBS
+
+SDK_DEBS += $(LIBGRPC_DEV) $(LIBGRPC_DERIVED_DEBS)
+SDK_SRC_TARGETS += $(LIBGRPC_DEV)
+
+# DOCA and derived packages
+
+DOCA_VERSION = $(call get_sdk_package_version_full,"doca")
+DOCA_DEB_VERSION = $(DOCA_VERSION)-1
+
+DOCA_LIBS = doca-libs_${DOCA_DEB_VERSION}_${CONFIGURED_ARCH}.deb
+$(DOCA_LIBS)_SRC_PATH = $(PLATFORM_PATH)/sdk-src/doca
+$(DOCA_LIBS)_RDEPENDS = $(DPDK) $(COLLECTX_CLXAPI) $(RXPCOMPILER) $(LIBRXPCOMPILER_DEV) $(UCX) $(LIBGRPC_DEV) $(FLEXIO)
+$(DOCA_LIBS)_DEPENDS = $(COLLECTX_CLXAPI) $(COLLECTX_CLXAPI_DEV) $(RXPCOMPILER) $(LIBRXPCOMPILER_DEV) $(UCX) $(DPDK_DEV) $(LIBGRPC_DEV) $(FLEXIO)
+DOCA_LIBS_DEV = libdoca-libs-dev_${DOCA_DEB_VERSION}_${CONFIGURED_ARCH}.deb
+DOCA_LIBS_DBG = doca-libs-dbgsym_${DOCA_DEB_VERSION}_${CONFIGURED_ARCH}.deb
+
+$(eval $(call add_derived_package,$(DOCA_LIBS),$(DOCA_LIBS_DEV)))
+$(eval $(call add_derived_package,$(DOCA_LIBS),$(DOCA_LIBS_DBG)))
+
+export DOCA_LIBS DOCA_LIBS_DEV DOCA_LIBS_DBG
+
+DOCA_LIBS_DERIVED_DEBS = $(DOCA_LIBS_DEV) $(DOCA_LIBS_DBG)
+export DOCA_LIBS_DERIVED_DEBS
+
+SDK_DEBS += $(DOCA_LIBS) $(DOCA_LIBS_DERIVED_DEBS)
+SDK_SRC_TARGETS += $(DOCA_LIBS)
+
+# SDN Appliance
+
+SDN_APPL_VER=$(call get_sdk_package_version_full,"nasa")
+SDN_APPL = sdn-appliance_${SDN_APPL_VER}_${CONFIGURED_ARCH}.deb
+$(SDN_APPL)_SRC_PATH = $(PLATFORM_PATH)/sdk-src/sdn
+$(SDN_APPL)_RDEPENDS = $(DOCA_LIBS) $(FLEXIO) $(MLNX_TOOLS) $(OFED_KERNEL_UTILS) $(MLNX_IPROUTE2)
+$(SDN_APPL)_DEPENDS = $(DOCA_LIBS_DEV) $(DOCA_LIBS) $(DPDK_DEV) $(FLEXIO) $(MLNX_TOOLS) $(OFED_KERNEL_UTILS)
+
+export SDN_APPL
+
+SDN_APPL_DERIVED_DEBS =
+export SDN_APPL_DERIVED_DEBS
+
+SDK_DEBS += $(SDN_APPL) $(SDN_APPL_DERIVED_DEBS)
+SDK_SRC_TARGETS += $(SDN_APPL)
+
+ifeq ($(SDK_FROM_SRC), y)
+SONIC_MAKE_DEBS += $(SDK_SRC_TARGETS)
+SONIC_ONLINE_DEBS += $(SDK_ONLINE_TARGETS)
+else
+$(eval $(foreach deb,$(SDK_SRC_TARGETS) $(SDK_ONLINE_TARGETS) $(SDK_DEBS),$(call make_url_sdk,$(deb))))
+SONIC_ONLINE_DEBS += $(SDK_SRC_TARGETS) $(SDK_ONLINE_TARGETS)
+endif
+
+SDK_PACKAGES = $(OFED_KERNEL) $(OFED_KERNEL_UTILS) $(MLNX_IPROUTE2) $(SDK_ONLINE_TARGETS) $(SDK_SRC_TARGETS)
+
+sdk-packages: $(addprefix $(DEBS_PATH)/, $(SDK_PACKAGES))
+
+SONIC_PHONY_TARGETS += sdk-packages
diff --git a/platform/nvidia-bluefield/rules.dep b/platform/nvidia-bluefield/rules.dep
new file mode 100644
index 000000000..d9238a576
--- /dev/null
+++ b/platform/nvidia-bluefield/rules.dep
@@ -0,0 +1,28 @@
+#
+# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+RECIPE_DIR = recipes
+
+export RECIPE_DIR
+
+include $(PLATFORM_PATH)/$(RECIPE_DIR)/bluefield-soc.dep
+include $(PLATFORM_PATH)/$(RECIPE_DIR)/mft.dep
+include $(PLATFORM_PATH)/$(RECIPE_DIR)/fw.dep
+include $(PLATFORM_PATH)/$(RECIPE_DIR)/dpu-sai.dep
+include $(PLATFORM_PATH)/$(RECIPE_DIR)/platform-api.dep
+include $(PLATFORM_PATH)/$(RECIPE_DIR)/installer-image.dep
+include $(PLATFORM_PATH)/$(RECIPE_DIR)/sdk.dep
diff --git a/platform/nvidia-bluefield/rules.mk b/platform/nvidia-bluefield/rules.mk
new file mode 100644
index 000000000..e4cedfa28
--- /dev/null
+++ b/platform/nvidia-bluefield/rules.mk
@@ -0,0 +1,39 @@
+#
+# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+RECIPE_DIR = recipes
+
+override TARGET_BOOTLOADER=grub
+
+include $(PLATFORM_PATH)/$(RECIPE_DIR)/bluefield-soc.mk
+include $(PLATFORM_PATH)/$(RECIPE_DIR)/mft.mk
+include $(PLATFORM_PATH)/$(RECIPE_DIR)/fw.mk
+include $(PLATFORM_PATH)/$(RECIPE_DIR)/dpu-sai.mk
+include $(PLATFORM_PATH)/$(RECIPE_DIR)/sdk.mk
+include $(PLATFORM_PATH)/$(RECIPE_DIR)/platform-api.mk
+include $(PLATFORM_PATH)/$(RECIPE_DIR)/docker-syncd-bluefield.mk
+include $(PLATFORM_PATH)/$(RECIPE_DIR)/installer-image.mk
+
+# Inject DPU sai into syncd
+$(SYNCD)_DEPENDS += $(DPU_SAI)
+$(SYNCD)_UNINSTALLS += $(DPU_SAI)
+
+# Runtime dependency on DPU sai is set only for syncd
+$(SYNCD)_RDEPENDS += $(DPU_SAI)
+
+# Inject mft into platform monitor
+$(DOCKER_PLATFORM_MONITOR)_DEPENDS += $(MFT)
diff --git a/platform/nvidia-bluefield/sdhci-of-dwcmshc/.gitignore b/platform/nvidia-bluefield/sdhci-of-dwcmshc/.gitignore
new file mode 100644
index 000000000..6dbdff457
--- /dev/null
+++ b/platform/nvidia-bluefield/sdhci-of-dwcmshc/.gitignore
@@ -0,0 +1,5 @@
+# Ignore everything in this directory
+*
+# Except these files
+!.gitignore
+!Makefile
diff --git a/platform/nvidia-bluefield/sdhci-of-dwcmshc/Makefile b/platform/nvidia-bluefield/sdhci-of-dwcmshc/Makefile
new file mode 100644
index 000000000..f5fe67ffd
--- /dev/null
+++ b/platform/nvidia-bluefield/sdhci-of-dwcmshc/Makefile
@@ -0,0 +1,44 @@
+#
+# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+.ONESHELL:
+SHELL = /bin/bash
+.SHELLFLAGS += -ex
+
+SDHCI_OF_DWCMSHC = sdhci-of-dwcmshc-${SDHCI_OF_DWCMSHC_DRIVER_VERSION}
+
+MAIN_TARGET = $(SDHCI_OF_DWCMSHC_DRIVER)
+DERIVED_TARGETS =
+GET_PACKAGE := $(shell pwd)/../recipes/get-soc-package.sh
+
+$(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% :
+	rm -rf ./tmp/
+	mkdir ./tmp/
+	pushd ./tmp/
+
+	${GET_PACKAGE} ${BSD_BASE_SOURCE_URL} ${SDHCI_OF_DWCMSHC}
+	
+	pushd ${SDHCI_OF_DWCMSHC}
+	find . -type f -exec touch {} +
+
+	# Build the Debs
+	KVER=$(KVERSION) WITH_DKMS=0 dpkg-buildpackage -rfakeroot -us -uc -b -j$(SONIC_CONFIG_MAKE_JOBS) --admindir $(SONIC_DPKG_ADMINDIR)
+
+	mv $(DERIVED_TARGETS) $* $(DEST)/
+	popd
+
+$(addprefix $(DEST)/, $(DERIVED_TARGETS)): $(DEST)/% : $(DEST)/$(MAIN_TARGET)
diff --git a/platform/nvidia-bluefield/sdk-src/doca/.gitignore b/platform/nvidia-bluefield/sdk-src/doca/.gitignore
new file mode 100644
index 000000000..6dbdff457
--- /dev/null
+++ b/platform/nvidia-bluefield/sdk-src/doca/.gitignore
@@ -0,0 +1,5 @@
+# Ignore everything in this directory
+*
+# Except these files
+!.gitignore
+!Makefile
diff --git a/platform/nvidia-bluefield/sdk-src/doca/0001-Allow-compilation-with-warnings.patch b/platform/nvidia-bluefield/sdk-src/doca/0001-Allow-compilation-with-warnings.patch
new file mode 100644
index 000000000..59893a07a
--- /dev/null
+++ b/platform/nvidia-bluefield/sdk-src/doca/0001-Allow-compilation-with-warnings.patch
@@ -0,0 +1,13 @@
+diff --git a/meson.build b/meson.build
+index 06e71ab..c674944 100644
+--- a/meson.build
++++ b/meson.build
+@@ -16,7 +16,7 @@ project('DOCA', 'C', 'CPP',
+ 	version: run_command(find_program('cat', 'more'), files('VERSION'), check: true).stdout().strip(),
+ 	default_options: [
+ 		'buildtype=debug',
+-		'werror=true',
++		'werror=false',
+ 		'warning_level=2',
+ 		'b_staticpic=true',
+ 		'prefix=/opt/mellanox/doca',
diff --git a/platform/nvidia-bluefield/sdk-src/doca/Makefile b/platform/nvidia-bluefield/sdk-src/doca/Makefile
new file mode 100644
index 000000000..e3bc80c06
--- /dev/null
+++ b/platform/nvidia-bluefield/sdk-src/doca/Makefile
@@ -0,0 +1,49 @@
+#
+# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+.ONESHELL:
+SHELL = /bin/bash
+
+MAIN_TARGET = $(DOCA_LIBS)
+DERIVED_TARGETS = $(DOCA_LIBS_DEV) $(DOCA_LIBS_DBG)
+
+$(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% :
+	# Make sure errors will be reported
+	set -e
+
+	# get sources
+	rm -rf doca/ doca.zip
+
+	# get sources
+	wget $(SDK_SOURCE_URL)/doca.zip
+	unzip doca.zip
+
+	pushd doca/
+	find . -type f -exec touch {} +
+
+	patch -p1 < ../0001-Allow-compilation-with-warnings.patch
+	patch -p1 < ../0001-Remove-meson-from-dependencies.patch
+	source /etc/profile.d/libgrpc.sh
+	source /etc/profile.d/mlnx-dpdk-aarch64-linux-gnu.sh
+
+	# Build the Debs
+	PATH=/opt/mellanox/grpc/bin:/usr/bin/:$(PATH) dpkg-buildpackage -us -uc -b -j$(SONIC_CONFIG_MAKE_JOBS) --admindir $(SONIC_DPKG_ADMINDIR)
+
+	popd
+	mv $(DERIVED_TARGETS) $* $(DEST)/
+
+$(addprefix $(DEST)/, $(DERIVED_TARGETS)): $(DEST)/% : $(DEST)/$(MAIN_TARGET)
diff --git a/platform/nvidia-bluefield/sdk-src/dpdk/.gitignore b/platform/nvidia-bluefield/sdk-src/dpdk/.gitignore
new file mode 100644
index 000000000..6dbdff457
--- /dev/null
+++ b/platform/nvidia-bluefield/sdk-src/dpdk/.gitignore
@@ -0,0 +1,5 @@
+# Ignore everything in this directory
+*
+# Except these files
+!.gitignore
+!Makefile
diff --git a/platform/nvidia-bluefield/sdk-src/dpdk/Makefile b/platform/nvidia-bluefield/sdk-src/dpdk/Makefile
new file mode 100644
index 000000000..68a48b37f
--- /dev/null
+++ b/platform/nvidia-bluefield/sdk-src/dpdk/Makefile
@@ -0,0 +1,45 @@
+#
+# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+.ONESHELL:
+SHELL = /bin/bash
+
+MAIN_TARGET = $(DPDK)
+DERIVED_TARGETS = $(DPDK_DEV)
+
+$(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% :
+	# Make sure errors will be reported
+	set -e
+
+	rm -rf dpdk.org/ dpdk.org.zip
+
+	# get sources
+	wget $(SDK_SOURCE_URL)/dpdk.org.zip
+	unzip dpdk.org.zip
+	pushd dpdk.org/
+	find . -type f -exec touch {} +
+
+	patch -p1 < ../0001-Remove-meson-from-dependencies.patch
+
+	# Build the package
+	# PATH variable is required for ninja to find the right version
+	DPDK_CONFIG_OPTIONS='--cross-file ../config/arm/arm64_bluefield_linux_gcc' DEB_BUILD_OPTIONS='dpdk_config_options=-Dmachine=0xd08' dpkg-buildpackage -us -uc -b -j$(SONIC_CONFIG_MAKE_JOBS) --admindir $(SONIC_DPKG_ADMINDIR)
+
+	popd
+	mv $(DERIVED_TARGETS) $* $(DEST)/
+
+$(addprefix $(DEST)/, $(DERIVED_TARGETS)): $(DEST)/% : $(DEST)/$(MAIN_TARGET)
diff --git a/platform/nvidia-bluefield/sdk-src/flexio/.gitignore b/platform/nvidia-bluefield/sdk-src/flexio/.gitignore
new file mode 100644
index 000000000..6dbdff457
--- /dev/null
+++ b/platform/nvidia-bluefield/sdk-src/flexio/.gitignore
@@ -0,0 +1,5 @@
+# Ignore everything in this directory
+*
+# Except these files
+!.gitignore
+!Makefile
diff --git a/platform/nvidia-bluefield/sdk-src/flexio/Makefile b/platform/nvidia-bluefield/sdk-src/flexio/Makefile
new file mode 100644
index 000000000..019b1df87
--- /dev/null
+++ b/platform/nvidia-bluefield/sdk-src/flexio/Makefile
@@ -0,0 +1,48 @@
+#
+# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+.ONESHELL:
+SHELL = /bin/bash
+
+MAIN_TARGET = $(FLEXIO)
+DERIVED_TARGETS =
+
+$(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% :
+	# Make sure errors will be reported
+	set -e
+
+	# get sources
+	rm -rf flexio-sdk/ flexio-sdk.zip
+
+	# get sources
+	wget $(SDK_SOURCE_URL)/flexio-sdk.zip
+	unzip flexio-sdk.zip
+
+	pushd flexio-sdk/
+	find . -type f -exec touch {} +
+
+	patch -p1 < ../0001-Allow-warning-during-package-compilation.patch
+	patch -p1 < ../0001-Install-LD-configuration.patch
+	patch -p1 < ../0001-Remove-meson-from-dependencies.patch
+
+	# Build the Debs
+	dpkg-buildpackage -us -uc -b -j$(SONIC_CONFIG_MAKE_JOBS) --admindir $(SONIC_DPKG_ADMINDIR)
+
+	popd
+	mv $(DERIVED_TARGETS) $* $(DEST)/
+
+$(addprefix $(DEST)/, $(DERIVED_TARGETS)): $(DEST)/% : $(DEST)/$(MAIN_TARGET)
diff --git a/platform/nvidia-bluefield/sdk-src/grpc/.gitignore b/platform/nvidia-bluefield/sdk-src/grpc/.gitignore
new file mode 100644
index 000000000..6dbdff457
--- /dev/null
+++ b/platform/nvidia-bluefield/sdk-src/grpc/.gitignore
@@ -0,0 +1,5 @@
+# Ignore everything in this directory
+*
+# Except these files
+!.gitignore
+!Makefile
diff --git a/platform/nvidia-bluefield/sdk-src/grpc/Makefile b/platform/nvidia-bluefield/sdk-src/grpc/Makefile
new file mode 100644
index 000000000..6fc434e38
--- /dev/null
+++ b/platform/nvidia-bluefield/sdk-src/grpc/Makefile
@@ -0,0 +1,45 @@
+#
+# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+.ONESHELL:
+SHELL = /bin/bash
+
+MAIN_TARGET = $(LIBGRPC_DEV)
+DERIVED_TARGETS = $(LIBGRPC_DERIVED_DEBS)
+LIBGRPC_TAR = libgrpc-dev_$(LIBGRPC_VER).tar.gz
+
+$(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% :
+	# Make sure errors will be reported
+	set -e
+
+	# get sources
+	rm -rf grpc/ $(LIBGRPC_TAR)
+
+	# get sources
+	wget $(SDK_SOURCE_URL)/$(LIBGRPC_TAR)
+	tar xf $(LIBGRPC_TAR)
+
+	pushd grpc/
+	find . -type f -exec touch {} +
+
+	# Build the Debs
+	dpkg-buildpackage -us -uc -b -j$(SONIC_CONFIG_MAKE_JOBS) --admindir $(SONIC_DPKG_ADMINDIR)
+
+	popd
+	mv $(DERIVED_TARGETS) $* $(DEST)/
+
+$(addprefix $(DEST)/, $(DERIVED_TARGETS)): $(DEST)/% : $(DEST)/$(MAIN_TARGET)
diff --git a/platform/nvidia-bluefield/sdk-src/mlnx-iproute2/.gitignore b/platform/nvidia-bluefield/sdk-src/mlnx-iproute2/.gitignore
new file mode 100644
index 000000000..6dbdff457
--- /dev/null
+++ b/platform/nvidia-bluefield/sdk-src/mlnx-iproute2/.gitignore
@@ -0,0 +1,5 @@
+# Ignore everything in this directory
+*
+# Except these files
+!.gitignore
+!Makefile
diff --git a/platform/nvidia-bluefield/sdk-src/mlnx-iproute2/Makefile b/platform/nvidia-bluefield/sdk-src/mlnx-iproute2/Makefile
new file mode 100644
index 000000000..525e75b09
--- /dev/null
+++ b/platform/nvidia-bluefield/sdk-src/mlnx-iproute2/Makefile
@@ -0,0 +1,46 @@
+#
+# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+.ONESHELL:
+SHELL = /bin/bash
+
+MAIN_TARGET = $(MLNX_IPROUTE2)
+DERIVED_TARGETS = $(MLNX_IPROUTE2_DERIVED_DEBS)
+
+OFED_TAR = MLNX_OFED_SRC-debian-$(OFED_VER_FULL).tgz
+OFED_SRC = MLNX_OFED_SRC-$(OFED_VER_FULL)
+MLNX_IPROUTE2_TAR = mlnx-iproute2_*.orig.tar.gz
+
+$(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% :
+	# Make sure errors will be reported
+	set -e
+
+	sudo rm -rf MLNX_OFED_SRC*
+	wget $(SDK_SOURCE_URL)/$(OFED_TAR)
+	tar xf $(OFED_TAR)
+	pushd $(OFED_SRC)/SOURCES
+	tar xf $(MLNX_IPROUTE2_TAR)
+	pushd mlnx-iproute2-*/
+	find . -type f -exec touch {} +
+
+	# Build the Debs
+	dpkg-buildpackage -us -uc -b -j$(SONIC_CONFIG_MAKE_JOBS) --admindir $(SONIC_DPKG_ADMINDIR)
+
+	popd
+	mv $(DERIVED_TARGETS) $* $(DEST)/
+
+$(addprefix $(DEST)/, $(DERIVED_TARGETS)): $(DEST)/% : $(DEST)/$(MAIN_TARGET)
diff --git a/platform/nvidia-bluefield/sdk-src/ofed/.gitignore b/platform/nvidia-bluefield/sdk-src/ofed/.gitignore
new file mode 100644
index 000000000..6dbdff457
--- /dev/null
+++ b/platform/nvidia-bluefield/sdk-src/ofed/.gitignore
@@ -0,0 +1,5 @@
+# Ignore everything in this directory
+*
+# Except these files
+!.gitignore
+!Makefile
diff --git a/platform/nvidia-bluefield/sdk-src/ofed/Makefile b/platform/nvidia-bluefield/sdk-src/ofed/Makefile
new file mode 100644
index 000000000..b9485f4d4
--- /dev/null
+++ b/platform/nvidia-bluefield/sdk-src/ofed/Makefile
@@ -0,0 +1,87 @@
+#
+# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+.ONESHELL:
+SHELL = /bin/bash
+BUILD_ARCH = $(shell dpkg-architecture -qDEB_BUILD_ARCH)
+
+OFED_TAR = MLNX_OFED_SRC-debian-$(OFED_VER_FULL).tgz
+OFED_SRC = MLNX_OFED_SRC-$(OFED_VER_FULL)
+
+DKMS_CTRL = /var/lib/dkms/mlnx-ofed-kernel/
+DKMS_TMP := $(shell mktemp -u -d -t dkms.XXXXXXXXXX)
+UNAME_TMP := $(shell mktemp -u -d -t uname.XXXXXXXXXX)
+
+MLNX_TOOLS_TMP = /tmp/mlnx_tools_build/
+
+$(addprefix $(DEST)/, $(MLNX_TOOLS)): $(DEST)/% :
+	# Make sure errors will be reported
+	set -e
+	mkdir -p $(MLNX_TOOLS_TMP) && pushd $(MLNX_TOOLS_TMP)
+	sudo rm -rf MLNX_OFED_SRC*
+	wget $(SDK_SOURCE_URL)/$(OFED_TAR)
+	tar xf $(OFED_TAR)
+
+	pushd $(OFED_SRC)/
+	find . -type f -exec touch {} +
+
+	# Build the Debs
+	sudo ./install.pl --kernel-only --build-only --without-depcheck --force  \
+						--with-mlnx-tools --without-knem --without-knem-dkms \
+						--without-kernel-mft-dkms
+
+	sudo chown -R ${USER} ./*
+
+	pushd DEBS/*/aarch64/
+	chown ${USER} $(MLNX_TOOLS) $(OFED_KERNEL_UTILS) $(OFED_KERNEL_DKMS) 
+	mv $(MLNX_TOOLS) $(OFED_KERNEL_UTILS) $(OFED_KERNEL_DKMS) $(DEST)/
+	popd
+
+	popd
+	popd
+	rm -rf $(MLNX_TOOLS_TMP)
+
+$(addprefix $(DEST)/, $(OFED_KERNEL_UTILS)): $(DEST)/% : $(DEST)/$(MLNX_TOOLS)
+$(addprefix $(DEST)/, $(OFED_KERNEL_DKMS)): $(DEST)/% : $(DEST)/$(MLNX_TOOLS)
+
+$(addprefix $(DEST)/, $(OFED_KERNEL)): $(DEST)/% :
+	# Make sure errors will be reported
+	set -e
+
+	# Prepare the directory to build mlnx-ofed-kernel-modules debian package
+	mkdir -p $(DKMS_TMP)/DEBIAN
+	mkdir -p $(DKMS_TMP)/lib/modules/$(KVERSION)/updates/dkms/
+	export kversion="$(KVERSION)"
+	export mft_version="$(OFED_KERNEL_VER_FULL)"
+	j2 templates/control.j2 > $(DKMS_TMP)/DEBIAN/control
+	j2 templates/postinst.j2 > $(DKMS_TMP)/DEBIAN/postinst
+	j2 templates/postrm.j2 > $(DKMS_TMP)/DEBIAN/postrm
+	chmod +x $(DKMS_TMP)/DEBIAN/postinst
+	chmod +x $(DKMS_TMP)/DEBIAN/postrm
+
+	sudo dkms build mlnx-ofed-kernel/$(OFED_KERNEL_VER_FULL) -k $(KVERSION) -a $(BUILD_ARCH)
+
+	# copy the built modules
+	cp -r $(DKMS_CTRL)/kernel-$(KVERSION)-aarch64/module/*.ko \
+			$(DKMS_TMP)/lib/modules/$(KVERSION)/updates/dkms/
+
+	dpkg -b $(DKMS_TMP) .
+
+	chown ${USER} $(OFED_KERNEL)
+	mv $(OFED_KERNEL) $(DEST)/
+
+	rm -rf $(DKMS_TMP)
diff --git a/platform/nvidia-bluefield/sdk-src/rdma/.gitignore b/platform/nvidia-bluefield/sdk-src/rdma/.gitignore
new file mode 100644
index 000000000..6dbdff457
--- /dev/null
+++ b/platform/nvidia-bluefield/sdk-src/rdma/.gitignore
@@ -0,0 +1,5 @@
+# Ignore everything in this directory
+*
+# Except these files
+!.gitignore
+!Makefile
diff --git a/platform/nvidia-bluefield/sdk-src/rdma/Makefile b/platform/nvidia-bluefield/sdk-src/rdma/Makefile
new file mode 100644
index 000000000..006c930b2
--- /dev/null
+++ b/platform/nvidia-bluefield/sdk-src/rdma/Makefile
@@ -0,0 +1,50 @@
+#
+# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+.ONESHELL:
+SHELL = /bin/bash
+
+OFED_TAR = MLNX_OFED_SRC-debian-$(OFED_VER_FULL).tgz
+OFED_SRC = MLNX_OFED_SRC-$(OFED_VER_FULL)
+RDMA_TAR = rdma-core*.orig.tar.gz
+
+MAIN_TARGET = $(RDMA_CORE)
+DERIVED_TARGETS = $(RDMA_CORE_DERIVED_DEBS)
+
+$(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% :
+	# Make sure errors will be reported
+	set -e
+
+	sudo rm -rf MLNX_OFED_SRC*
+	wget $(SDK_SOURCE_URL)/$(OFED_TAR)
+	tar xf $(OFED_TAR)
+	pushd $(OFED_SRC)/SOURCES
+	tar xf $(RDMA_TAR)
+	pushd rdma-core-*/
+	find . -type f -exec touch {} +
+
+	patch -p1 < ../../../disable-ibverb-dependencies.patch
+
+	find . -type f -exec touch {} +
+
+	# Build the Debs
+	dpkg-buildpackage -us -uc -b -j$(SONIC_CONFIG_MAKE_JOBS) --admindir $(SONIC_DPKG_ADMINDIR)
+
+	popd
+	mv $(DERIVED_TARGETS) $* $(DEST)/
+
+$(addprefix $(DEST)/, $(DERIVED_TARGETS)): $(DEST)/% : $(DEST)/$(MAIN_TARGET)
diff --git a/platform/nvidia-bluefield/sdk-src/rxp-compiler/.gitignore b/platform/nvidia-bluefield/sdk-src/rxp-compiler/.gitignore
new file mode 100644
index 000000000..6dbdff457
--- /dev/null
+++ b/platform/nvidia-bluefield/sdk-src/rxp-compiler/.gitignore
@@ -0,0 +1,5 @@
+# Ignore everything in this directory
+*
+# Except these files
+!.gitignore
+!Makefile
diff --git a/platform/nvidia-bluefield/sdk-src/rxp-compiler/Makefile b/platform/nvidia-bluefield/sdk-src/rxp-compiler/Makefile
new file mode 100644
index 000000000..727f736d9
--- /dev/null
+++ b/platform/nvidia-bluefield/sdk-src/rxp-compiler/Makefile
@@ -0,0 +1,44 @@
+#
+# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+.ONESHELL:
+SHELL = /bin/bash
+
+MAIN_TARGET = $(RXPCOMPILER)
+DERIVED_TARGETS = $(LIBRXPCOMPILER_DEV)
+
+$(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% :
+	# Make sure errors will be reported
+	set -e
+
+	# get sources
+	rm -rf rxp-tools/ rxp-tools.zip
+	
+	# get sources
+	wget $(SDK_SOURCE_URL)/rxp-tools.zip
+	unzip rxp-tools.zip
+
+	pushd rxp-tools/
+	find . -type f -exec touch {} +
+
+	# Build the Debs
+	dpkg-buildpackage -us -uc -b -j$(SONIC_CONFIG_MAKE_JOBS) --admindir $(SONIC_DPKG_ADMINDIR)
+
+	popd
+	mv $(DERIVED_TARGETS) $* $(DEST)/
+
+$(addprefix $(DEST)/, $(DERIVED_TARGETS)): $(DEST)/% : $(DEST)/$(MAIN_TARGET)
diff --git a/platform/nvidia-bluefield/sdk-src/sdn/.gitignore b/platform/nvidia-bluefield/sdk-src/sdn/.gitignore
new file mode 100644
index 000000000..6dbdff457
--- /dev/null
+++ b/platform/nvidia-bluefield/sdk-src/sdn/.gitignore
@@ -0,0 +1,5 @@
+# Ignore everything in this directory
+*
+# Except these files
+!.gitignore
+!Makefile
diff --git a/platform/nvidia-bluefield/sdk-src/sdn/Makefile b/platform/nvidia-bluefield/sdk-src/sdn/Makefile
new file mode 100644
index 000000000..f0852be15
--- /dev/null
+++ b/platform/nvidia-bluefield/sdk-src/sdn/Makefile
@@ -0,0 +1,48 @@
+#
+# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+.ONESHELL:
+SHELL = /bin/bash
+
+MAIN_TARGET = $(SDN_APPL)
+DERIVED_TARGETS = $(SDN_APPL_DERIVED_DEBS)
+
+$(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% :
+	# Make sure errors will be reported
+	set -e
+
+	# get sources
+	rm -rf SDN_appliance/ SDN_appliance.zip
+
+	# get sources
+	wget $(SDK_SOURCE_URL)/SDN_appliance.zip
+	unzip SDN_appliance.zip
+
+	pushd SDN_appliance/
+
+	find . -type f -exec touch {} +
+
+	source /etc/profile.d/mlnx-dpdk-aarch64-linux-gnu.sh
+	source /etc/profile.d/doca-sdk-aarch64-linux-gnu.sh
+
+	# Build the Debs
+	PATH=/usr/bin/:$(PATH) dpkg-buildpackage -us -uc -b -j1 --admindir $(SONIC_DPKG_ADMINDIR)
+
+	popd
+	mv $(DERIVED_TARGETS) $* $(DEST)/
+
+$(addprefix $(DEST)/, $(DERIVED_TARGETS)): $(DEST)/% : $(DEST)/$(MAIN_TARGET)
diff --git a/platform/nvidia-bluefield/sdk-src/ucx/.gitignore b/platform/nvidia-bluefield/sdk-src/ucx/.gitignore
new file mode 100644
index 000000000..6dbdff457
--- /dev/null
+++ b/platform/nvidia-bluefield/sdk-src/ucx/.gitignore
@@ -0,0 +1,5 @@
+# Ignore everything in this directory
+*
+# Except these files
+!.gitignore
+!Makefile
diff --git a/platform/nvidia-bluefield/sdk-src/ucx/Makefile b/platform/nvidia-bluefield/sdk-src/ucx/Makefile
new file mode 100644
index 000000000..b3319c28b
--- /dev/null
+++ b/platform/nvidia-bluefield/sdk-src/ucx/Makefile
@@ -0,0 +1,48 @@
+#
+# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+.ONESHELL:
+SHELL = /bin/bash
+
+MAIN_TARGET = $(UCX)
+
+OFED_TAR = MLNX_OFED_SRC-debian-$(OFED_VER_FULL).tgz
+OFED_SRC = MLNX_OFED_SRC-$(OFED_VER_FULL)
+UCX_TAR = ucx_*.orig.tar.gz
+
+$(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% :
+	# Make sure errors will be reported
+	set -e
+
+	sudo rm -rf MLNX_OFED_SRC*
+	wget $(SDK_SOURCE_URL)/$(OFED_TAR)
+	tar xf $(OFED_TAR)
+	pushd $(OFED_SRC)/SOURCES
+	tar xf $(UCX_TAR)
+	pushd ucx-*/
+	find . -type f -exec touch {} +
+
+	patch -p0 < ../../../disable-libucx0-conflict.patch
+	patch -p1 < ../../../disable-go-bindings-generation.patch
+
+	# Build the Debs
+	dpkg-buildpackage -us -uc -b -j$(SONIC_CONFIG_MAKE_JOBS) --admindir $(SONIC_DPKG_ADMINDIR)
+
+	popd
+	mv $(DERIVED_TARGETS) $* $(DEST)/
+
+$(addprefix $(DEST)/, $(DERIVED_TARGETS)): $(DEST)/% : $(DEST)/$(MAIN_TARGET)
diff --git a/platform/nvidia-bluefield/sdk-src/ucx/disable-go-bindings-generation.patch b/platform/nvidia-bluefield/sdk-src/ucx/disable-go-bindings-generation.patch
new file mode 100644
index 000000000..04b9188a4
--- /dev/null
+++ b/platform/nvidia-bluefield/sdk-src/ucx/disable-go-bindings-generation.patch
@@ -0,0 +1,11 @@
+--- a/debian/rules
++++ b/debian/rules
+@@ -19,7 +19,7 @@ XPMEM_OPT = $(shell echo ${DEB_BUILD_PROFILES} | grep -qw xpmem \
+ 	dh $@ 
+ 
+ override_dh_auto_configure:
+-	./contrib/configure-release-mt --prefix=/usr \
++	./contrib/configure-release-mt --prefix=/usr --with-go=no \
+ 		--enable-examples --with-java=no \
+ 		$(CUDA_OPT) $(XPMEM_OPT)
+ 	chmod +x debian/rules
diff --git a/platform/nvidia-bluefield/tmfifo/.gitignore b/platform/nvidia-bluefield/tmfifo/.gitignore
new file mode 100644
index 000000000..6dbdff457
--- /dev/null
+++ b/platform/nvidia-bluefield/tmfifo/.gitignore
@@ -0,0 +1,5 @@
+# Ignore everything in this directory
+*
+# Except these files
+!.gitignore
+!Makefile
diff --git a/platform/nvidia-bluefield/tmfifo/Makefile b/platform/nvidia-bluefield/tmfifo/Makefile
new file mode 100644
index 000000000..0aaea9c33
--- /dev/null
+++ b/platform/nvidia-bluefield/tmfifo/Makefile
@@ -0,0 +1,39 @@
+#
+# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+.ONESHELL:
+SHELL = /bin/bash
+.SHELLFLAGS += -ex
+
+TMFIFO = tmfifo-${TMFIFO_DRIVER_VERSION}
+MODULE_DIR := $(shell pwd)/tmp/${TMFIFO}
+GET_PACKAGE := $(shell pwd)/../recipes/get-soc-package.sh
+
+$(addprefix $(DEST)/, $(TMFIFO_DRIVER)): $(DEST)/% :
+	rm -rf ./tmp/
+	mkdir ./tmp/
+	pushd ./tmp/
+
+	${GET_PACKAGE} ${BSD_BASE_SOURCE_URL} ${TMFIFO}
+
+	pushd ${TMFIFO}
+
+	make -C /lib/modules/$(KVERSION)/build M=$(MODULE_DIR)
+	
+	mv ${TMFIFO_DRIVER} $(DEST)/
+	popd
+
diff --git a/slave.mk b/slave.mk
index 73088e945..68ed31cd5 100644
--- a/slave.mk
+++ b/slave.mk
@@ -92,6 +92,8 @@ export BUILD_WORKDIR
 export GZ_COMPRESS_PROGRAM
 export MIRROR_SNAPSHOT
 export SONIC_OS_VERSION
+export FILES_PATH
+export PROJECT_ROOT
 
 ###############################################################################
 ## Utility rules
@@ -726,6 +728,7 @@ SONIC_TARGET_LIST += $(addprefix $(FILES_PATH)/, $(SONIC_MAKE_FILES))
 $(addprefix $(DEBS_PATH)/, $(SONIC_MAKE_DEBS)) : $(DEBS_PATH)/% : .platform $$(addsuffix -install,$$(addprefix $(DEBS_PATH)/,$$($$*_DEPENDS))) \
 			$$(addsuffix -install,$$(addprefix $(PYTHON_WHEELS_PATH)/,$$($$*_WHEEL_DEPENDS))) \
 			$$(addprefix $(DEBS_PATH)/,$$($$*_AFTER)) \
+			$$(addprefix $(FILES_PATH)/,$$($$*_FILES)) \
 			$(call dpkg_depend,$(DEBS_PATH)/%.dep)
 	$(HEADER)
 

From b0f53988488a2454f446623894e5ebee5c8e9f18 Mon Sep 17 00:00:00 2001
From: Junchao-Mellanox <57339448+Junchao-Mellanox@users.noreply.github.com>
Date: Tue, 16 Apr 2024 16:43:43 +0800
Subject: [PATCH 0448/1115] [Mellanox] Adjust log content for module host
 management feature (#18414)

- Why I did it
Adjust nvidia platform API log content for module host management feature

- How I did it
Add log content for EEPROM read/write
Add log content for module detection thread
Adjust existing log level/content for module detection thread

- How to verify it
Manual test
---
 .../sonic_platform/modules_mgmt.py            | 206 ++++++++++--------
 .../mlnx-platform-api/sonic_platform/sfp.py   |   4 +
 2 files changed, 114 insertions(+), 96 deletions(-)

diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/modules_mgmt.py b/platform/mellanox/mlnx-platform-api/sonic_platform/modules_mgmt.py
index 448e0ca06..b8d99ca1f 100644
--- a/platform/mellanox/mlnx-platform-api/sonic_platform/modules_mgmt.py
+++ b/platform/mellanox/mlnx-platform-api/sonic_platform/modules_mgmt.py
@@ -113,10 +113,10 @@ def get_sm_func(self, sm, port):
             , STATE_POWER_LIMIT_ERROR: STATE_POWER_LIMIT_ERROR
             , STATE_SYSFS_ERROR: STATE_SYSFS_ERROR
         }
-        logger.log_info("getting func for state {} for port {}".format(sm, port))
+        logger.log_debug("getting state machine func for state {} for port {}".format(sm, port))
         try:
             func = SFP_SM_ENUM[sm]
-            logger.log_info("got func {} for state {} for port {}".format(func, sm, port))
+            logger.log_debug("got state machine func {} for state {} for port {}".format(func, sm, port))
             return func
         except KeyError as e:
             logger.log_error("exception {} for port {} sm {}".format(e, port, sm))
@@ -140,11 +140,11 @@ def run(self):
                         independent_file_splitted = independent_file_content.split(SAI_INDEP_MODULE_MODE_DELIMITER)
                         if (len(independent_file_splitted) > 1):
                             self.is_supported_indep_mods_system = int(independent_file_splitted[1]) == int(SAI_INDEP_MODULE_MODE_TRUE_STR)
-                            logger.log_info("file {} found, system will work in independent mode".format(independent_file))
-                            logger.log_info("value of indep mode var: {} found in file".format(independent_file_splitted[1]))
+                            logger.log_notice(f"{SAI_INDEP_MODULE_MODE}={SAI_INDEP_MODULE_MODE_TRUE_STR} in file {independent_file}, \
+                                module host management mode is enabled")
                             found = True
         else:
-            logger.log_info("file {} not found, system stays in legacy mode".format(independent_file))
+            logger.log_notice("module host management mode is disabled".format(independent_file))
 
         # static init - at first go over all ports and check each one if it's independent module or legacy
         self.sfp_changes_dict = {}
@@ -194,7 +194,7 @@ def run(self):
             # add lock to use with timer task updating next state per module object
             self.modules_lock_list.append(threading.Lock())
             # start SM for this independent module
-            logger.log_info("adding temp_module_sm {} to sfp_port_dict".format(temp_module_sm))
+            logger.log_debug("adding temp_module_sm {} to sfp_port_dict".format(temp_module_sm))
             self.sfp_port_dict_initial[port] = temp_module_sm
             self.sfp_port_dict[port] = temp_module_sm
 
@@ -202,36 +202,36 @@ def run(self):
         # need at least 1 module in final state until it makes sense to send changes dict
         is_final_state_module = False
         all_static_detection_done = False
-        logger.log_info(f"sfp_port_dict before starting static detection: {self.sfp_port_dict} main_thread_stop_event: "
+        logger.log_debug(f"sfp_port_dict before starting static detection: {self.sfp_port_dict} main_thread_stop_event: "
                     f"{self.main_thread_stop_event.is_set()} all_static_detection_done: {all_static_detection_done}")
         # static detection - loop on different state for all ports until all done
         while not self.main_thread_stop_event.is_set() and not all_static_detection_done:
-            logger.log_info("static detection running iteration {}".format(i))
+            logger.log_debug("static detection running iteration {}".format(i))
             waiting_list_len = len(self.waiting_modules_list)
             sfp_port_dict_keys_len = len(self.sfp_port_dict.keys())
             if waiting_list_len == sfp_port_dict_keys_len:
-                logger.log_info("static detection length of waiting list {}: {} and sfp port dict keys {}:{} is the same, sleeping 1 second..."
+                logger.log_debug("static detection length of waiting list {}: {} and sfp port dict keys {}:{} is the same, sleeping 1 second..."
                               .format(waiting_list_len, self.waiting_modules_list, sfp_port_dict_keys_len, self.sfp_port_dict.keys()))
                 time.sleep(1)
             else:
-                logger.log_info("static detectionlength of waiting list {}: {} and sfp port dict keys {}: {} is different, NOT sleeping 1 second"
+                logger.log_debug("static detection length of waiting list {}: {} and sfp port dict keys {}: {} is different, NOT sleeping 1 second"
                               .format(waiting_list_len, self.waiting_modules_list, sfp_port_dict_keys_len, self.sfp_port_dict.keys()))
             for port_num, module_sm_obj in self.sfp_port_dict.items():
                 curr_state = module_sm_obj.get_current_state()
-                logger.log_info(f'static detection STATE_LOG {port_num}: curr_state is {curr_state}')
+                logger.log_debug(f'static detection STATE_LOG {port_num}: curr_state is {curr_state}')
                 func = self.get_sm_func(curr_state, port_num)
-                logger.log_info("static detection got returned func {} for state {}".format(func, curr_state))
+                logger.log_debug("static detection got returned func {} for state {}".format(func, curr_state))
                 try:
                     if not isinstance(func, str):
                         if func is not None:
                             next_state = func(port_num, module_sm_obj)
                 except TypeError as e:
-                    logger.log_info("static detection exception {} for port {} traceback:\n{}".format(e, port_num, traceback.format_exc()))
+                    logger.log_error("static detection exception {} for port {} traceback:\n{}".format(e, port_num, traceback.format_exc()))
                     module_sm_obj.set_final_state(STATE_ERROR_HANDLER)
                     continue
-                logger.log_info(f'static detection STATE_LOG {port_num}: next_state is {next_state}')
+                logger.log_debug(f'static detection STATE_LOG {port_num}: next_state is {next_state}')
                 if self.timer.is_alive():
-                    logger.log_info("static detection timer threads is alive, acquiring lock")
+                    logger.log_debug("static detection timer threads is alive, acquiring lock")
                     self.modules_lock_list[port_num].acquire()
                 # for STATE_NOT_POWERED we dont advance to next state, timerTask is doing it into STATE_POWERED
                 if curr_state != STATE_NOT_POWERED or not module_sm_obj.wait_for_power_on:
@@ -243,20 +243,20 @@ def run(self):
                 if self.timer.is_alive():
                     self.modules_lock_list[port_num].release()
                 is_timer_alive = self.timer.is_alive()
-                logger.log_info("static detection timer thread is_alive {} port {}".format(is_timer_alive, port_num))
+                logger.log_debug("static detection timer thread is_alive {} port {}".format(is_timer_alive, port_num))
                 if STATE_NOT_POWERED == curr_state:
                     if not is_timer_alive:
-                        logger.log_info ("static detection curr_state is {} and timer thread is_alive {}, running timer task thread"
+                        logger.log_debug ("static detection curr_state is {} and timer thread is_alive {}, running timer task thread"
                                .format(curr_state, is_timer_alive))
                         # call timer task
                         self.timer = threading.Timer(1.0, self.timerTask)
                         self.timer.start()
                     if self.timer.is_alive():
-                        logger.log_info("timer thread is_alive {}, locking module obj".format(self.timer.is_alive()))
+                        logger.log_debug("timer thread is_alive {}, locking module obj".format(self.timer.is_alive()))
                         self.modules_lock_list[port_num].acquire()
                     module_sm_obj.set_next_state(next_state)
                     if self.timer.is_alive():
-                        logger.log_info("timer thread is_alive {}, releasing module obj".format(self.timer.is_alive()))
+                        logger.log_debug("timer thread is_alive {}, releasing module obj".format(self.timer.is_alive()))
                         self.modules_lock_list[port_num].release()
 
             if is_final_state_module:
@@ -266,20 +266,19 @@ def run(self):
                 self.register_presece_closed_ports(False, self.register_hw_present_fds)
             i += 1
             self.register_hw_present_fds = []
-            logger.log_info("sfp_port_dict: {}".format(self.sfp_port_dict))
+            logger.log_debug("sfp_port_dict: {}".format(self.sfp_port_dict))
             for port_num, module_sm_obj in self.sfp_port_dict.items():
-                logger.log_info("static detection port_num: {} initial state: {} current_state: {} next_state: {}"
+                logger.log_debug("static detection port_num: {} initial state: {} current_state: {} next_state: {}"
                        .format(port_num, module_sm_obj.initial_state, module_sm_obj.get_current_state()
                                , module_sm_obj.get_next_state()))
             sfp_port_dict_keys_len = len(self.sfp_port_dict.keys())
             if sfp_port_dict_keys_len == 0:
-                logger.log_info("static detection len of keys of sfp_port_dict is 0: {}".format(sfp_port_dict_keys_len))
+                logger.log_notice('All ports have been initialized, static detection is done')
                 all_static_detection_done = True
             else:
-                logger.log_info("static detection len of keys of sfp_port_dict is not 0: {}".format(sfp_port_dict_keys_len))
-            logger.log_info("static detection all_static_detection_done: {}".format(all_static_detection_done))
+                logger.log_info("Continue static detection, pending ports number: {}".format(sfp_port_dict_keys_len))
 
-        logger.log_info(f"sfp_port_dict before dynamic detection: {self.sfp_port_dict} "
+        logger.log_debug(f"sfp_port_dict before dynamic detection: {self.sfp_port_dict} "
                         f"main_thread_stop_event.is_set(): {self.main_thread_stop_event.is_set()}")
         # dynamic detection - loop on polling changes, run state machine for them and put them into shared queue
         i = 0
@@ -291,10 +290,10 @@ def run(self):
             # for debug purposes
             self.fds_events_count_dict[module_obj.port_num] = { 'presence' : 0 , 'power_good' : 0 }
         while not self.main_thread_stop_event.is_set():
-            logger.log_info("dynamic detection running iteration {}".format(i))
+            logger.log_debug("dynamic detection running iteration {}".format(i))
             # poll for changes with 1 second timeout
             fds_events = self.poll_obj.poll(1000)
-            logger.log_info("dynamic detection polled obj checking fds_events iteration {}".format(i))
+            logger.log_debug("dynamic detection polled obj checking fds_events iteration {}".format(i))
             for fd, event in fds_events:
                 # get modules object from fd according to saved key-value of fd-module obj saved earlier
                 logger.log_info("dynamic detection working on fd {} event {}".format(fd, event))
@@ -332,18 +331,18 @@ def run(self):
             self.delete_ports_and_reset_states_dict = {}
             for port_num, module_sm_obj in self.sfp_port_dict.items():
                 curr_state = module_sm_obj.get_current_state()
-                logger.log_info(f'dynamic detection STATE_LOG {port_num}: curr_state is {curr_state}')
+                logger.log_debug(f'dynamic detection STATE_LOG {port_num}: curr_state is {curr_state}')
                 func = self.get_sm_func(curr_state, port)
-                logger.log_info("dynamic detection got returned func {} for state {}".format(func, curr_state))
+                logger.log_debug("dynamic detection got returned func {} for state {}".format(func, curr_state))
                 try:
                     if func is not None:
                         next_state = func(port_num, module_sm_obj, dynamic=True)
                 except TypeError as e:
-                    logger.log_info("exception {} for port {}".format(e, port_num))
+                    logger.log_error("exception {} for port {}".format(e, port_num))
                     continue
-                logger.log_info(f'dynamic detection STATE_LOG {port_num}: next_state is {next_state}')
+                logger.log_debug(f'dynamic detection STATE_LOG {port_num}: next_state is {next_state}')
                 if self.timer.is_alive():
-                    logger.log_info("dynamic detection timer threads is alive, acquiring lock")
+                    logger.log_debug("dynamic detection timer threads is alive, acquiring lock")
                     self.modules_lock_list[port_num].acquire()
                 if curr_state != STATE_NOT_POWERED or not module_sm_obj.wait_for_power_on:
                     module_sm_obj.set_next_state(next_state)
@@ -354,20 +353,20 @@ def run(self):
                 if self.timer.is_alive():
                     self.modules_lock_list[port_num].release()
                 is_timer_alive = self.timer.is_alive()
-                logger.log_info("dynamic detection timer thread is_alive {} port {}".format(is_timer_alive, port_num))
+                logger.log_debug("dynamic detection timer thread is_alive {} port {}".format(is_timer_alive, port_num))
                 if STATE_NOT_POWERED == curr_state:
                     if not is_timer_alive:
-                        logger.log_info("dynamic detection curr_state is {} and timer thread is_alive {}, running timer task thread"
+                        logger.log_debug("dynamic detection curr_state is {} and timer thread is_alive {}, running timer task thread"
                                       .format(curr_state, is_timer_alive))
                         # call timer task
                         self.timer = threading.Timer(1.0, self.timerTask)
                         self.timer.start()
                     if self.timer.is_alive():
-                        logger.log_info("dynamic detection timer thread is_alive {}, locking module obj".format(self.timer.is_alive()))
+                        logger.log_debug("dynamic detection timer thread is_alive {}, locking module obj".format(self.timer.is_alive()))
                         self.modules_lock_list[port_num].acquire()
                     module_sm_obj.set_next_state(next_state)
                     if self.timer.is_alive():
-                        logger.log_info(
+                        logger.log_debug(
                             "dynamic detection timer thread is_alive {}, releasing module obj".format(self.timer.is_alive()))
                         self.modules_lock_list[port_num].release()
 
@@ -378,12 +377,12 @@ def run(self):
                 self.register_presece_closed_ports(True, self.register_hw_present_fds)
             if not self.sfp_port_dict and is_final_state_module:
                 is_final_state_module = False
-                logger.log_info(f"sft_port_dict is empty {self.sfp_port_dict}, set is_final_state_module to {is_final_state_module}")
+                logger.log_debug(f"sft_port_dict is empty {self.sfp_port_dict}, set is_final_state_module to {is_final_state_module}")
             self.register_hw_present_fds = []
             i += 1
-            logger.log_info("sfp_port_dict: {}".format(self.sfp_port_dict))
+            logger.log_debug("sfp_port_dict: {}".format(self.sfp_port_dict))
             for port_num, module_sm_obj in self.sfp_port_dict.items():
-                logger.log_info("port_num: {} module_sm_obj initial state: {} current_state: {} next_state: {}"
+                logger.log_debug("port_num: {} module_sm_obj initial state: {} current_state: {} next_state: {}"
                        .format(port_num, module_sm_obj.initial_state, module_sm_obj.get_current_state(), module_sm_obj.get_next_state()))
 
     def is_dummy_event(self, val, module_sm_obj):
@@ -395,32 +394,36 @@ def is_dummy_event(self, val, module_sm_obj):
 
     def check_if_hw_present(self, port, module_sm_obj, dynamic=False):
         detection_method = 'dynamic' if dynamic else 'static'
-        logger.log_info(f"{detection_method} detection enter check_if_hw_present port {port} module_sm_obj {module_sm_obj}")
+        logger.log_debug(f"{detection_method} detection enter check_if_hw_present port {port} module_sm_obj {module_sm_obj}")
         module_fd_indep_path = module_sm_obj.module_fd_path
         if os.path.isfile(module_fd_indep_path):
             try:
                 val_int = utils.read_int_from_file(module_fd_indep_path)
+                logger.log_info(f'reading sysfs {module_fd_indep_path} got value {val_int}')
                 if 0 == val_int:
-                    logger.log_info("returning {} for val {}".format(STATE_HW_NOT_PRESENT, val_int))
                     retval_state = STATE_HW_NOT_PRESENT
                     module_sm_obj.set_final_state(retval_state, detection_method)
                     return retval_state
                 elif 1 == val_int:
-                    logger.log_info("returning {} for val {}".format(STATE_HW_PRESENT, val_int))
                     retval_state = STATE_HW_PRESENT
                     if not self.is_supported_indep_mods_system or (self.is_warm_reboot and 0 == self.port_control_dict[port] and not dynamic):
                         module_sm_obj.set_final_state(retval_state, detection_method)
                         self.register_fd_for_polling(module_sm_obj, module_sm_obj.module_fd, 'presence')
                     return retval_state
+                else:
+                    logger.log_error(f'unexpected value {val_int} from file {module_fd_indep_path}')
+                    module_sm_obj.set_final_state(STATE_HW_NOT_PRESENT, detection_method)
+                    return STATE_HW_NOT_PRESENT
             except Exception as e:
-                logger.log_info("exception {} for port {} setting final state STATE_ERROR_HANDLER".format(e, port))
+                logger.log_error("exception {} in check_if_hw_present for port {}, setting final state STATE_ERROR_HANDLER".format(e, port))
                 module_sm_obj.set_final_state(STATE_ERROR_HANDLER)
                 return STATE_ERROR_HANDLER
+        logger.log_error(f'{module_fd_indep_path} does not exists, treat this port as not present')
         module_sm_obj.set_final_state(STATE_HW_NOT_PRESENT, detection_method)
         return STATE_HW_NOT_PRESENT
 
     def check_if_module_available(self, port, module_sm_obj, dynamic=False):
-        logger.log_info("enter check_if_module_available port {} module_sm_obj {}".format(port, module_sm_obj))
+        logger.log_debug("enter check_if_module_available port {} module_sm_obj {}".format(port, module_sm_obj))
         module_fd_indep_path = SYSFS_INDEPENDENT_FD_POWER_GOOD.format(port)
         if os.path.isfile(module_fd_indep_path):
             try:
@@ -431,68 +434,77 @@ def check_if_module_available(self, port, module_sm_obj, dynamic=False):
                 val_int = int(val)
                 module_sm_obj.module_power_good_fd_path = module_fd_indep_path
                 module_sm_obj.module_power_good_fd = module_power_good_fd
-
+                logger.log_info(f'reading sysfs {module_fd_indep_path} got value {val_int}')
                 if 0 == val_int:
-                    logger.log_info(f'port {port} power is not good')
                     module_sm_obj.set_final_state(STATE_HW_NOT_PRESENT)
                     return STATE_HW_NOT_PRESENT
                 elif 1 == val_int:
-                    logger.log_info(f'port {port} power is good')
                     return STATE_MODULE_AVAILABLE
+                else:
+                    logger.log_error(f'unexpected value {val_int} from file {module_fd_indep_path}')
+                    module_sm_obj.set_final_state(STATE_HW_NOT_PRESENT)
+                    return STATE_HW_NOT_PRESENT
             except Exception as e:
-                logger.log_info("exception {} for port {}".format(e, port))
+                logger.log_error("exception {} for port {}".format(e, port))
                 return STATE_HW_NOT_PRESENT
-        logger.log_info(f'port {port} has no power good file {module_fd_indep_path}')
+        logger.log_error(f'port {port} has no power good file {module_fd_indep_path}')
         module_sm_obj.set_final_state(STATE_HW_NOT_PRESENT)
         return STATE_HW_NOT_PRESENT
 
     def check_if_power_on(self, port, module_sm_obj, dynamic=False):
-        logger.log_info(f'enter check_if_power_on for port {port}')
+        logger.log_debug(f'enter check_if_power_on for port {port}')
         module_fd_indep_path = SYSFS_INDEPENDENT_FD_POWER_ON.format(port)
         if os.path.isfile(module_fd_indep_path):
             try:
                 val_int = utils.read_int_from_file(module_fd_indep_path)
+                logger.log_info(f'reading sysfs {module_fd_indep_path} got value {val_int}')
                 if 0 == val_int:
-                    logger.log_info(f'check_if_power_on port {port} is not powered')
                     return STATE_NOT_POWERED
                 elif 1 == val_int:
-                    logger.log_info(f'check_if_power_on port {port} is powered')
                     return STATE_POWERED
+                else:
+                    logger.log_error(f'unexpected value {val_int} from file {module_fd_indep_path}')
+                    module_sm_obj.set_final_state(STATE_HW_NOT_PRESENT)
+                    return STATE_HW_NOT_PRESENT
             except Exception as e:
-                logger.log_info(f'check_if_power_on got exception {e}')
+                logger.log_error(f'check_if_power_on got exception {e}')
                 module_sm_obj.set_final_state(STATE_HW_NOT_PRESENT)
                 return STATE_HW_NOT_PRESENT
+        logger.log_error(f'port {port} has no power on file {module_fd_indep_path}')
+        module_sm_obj.set_final_state(STATE_HW_NOT_PRESENT)
+        return STATE_HW_NOT_PRESENT
+
 
     def power_on_module(self, port, module_sm_obj, dynamic=False):
-        logger.log_info(f'enter power_on_module for port {port}')
+        logger.log_debug(f'enter power_on_module for port {port}')
         if not module_sm_obj.wait_for_power_on:
             module_fd_indep_path_po = SYSFS_INDEPENDENT_FD_POWER_ON.format(port)
             module_fd_indep_path_r = SYSFS_INDEPENDENT_FD_HW_RESET.format(port)
             try:
                 if os.path.isfile(module_fd_indep_path_po):
-                    logger.log_info("powerOnModule powering on via {} for port {}".format(module_fd_indep_path_po, port))
                     # echo 1 > /sys/module/sx_core/$asic/$module/power_on
                     utils.write_file(module_fd_indep_path_po, "1")
+                    logger.log_info(f'write sysfs {module_fd_indep_path_po} with value 1')
                 if os.path.isfile(module_fd_indep_path_r):
-                    logger.log_info("powerOnModule resetting via {} for port {}".format(module_fd_indep_path_r, port))
                     # de-assert hw_reset - low polarity. 1 for de-assert 0 for assert
                     # echo 1 > /sys/module/sx_core/$asic/$module/hw_reset
                     utils.write_file(module_fd_indep_path_r, "1")
+                    logger.log_info(f'write sysfs {module_fd_indep_path_r} with value 1')
                 self.add_port_to_wait_reset(module_sm_obj)
             except Exception as e:
-                logger.log_info("exception in powerOnModule {} for port {}".format(e, port))
+                logger.log_error("exception in power_on_module {} for port {}".format(e, port))
                 return STATE_HW_NOT_PRESENT
         return STATE_NOT_POWERED
 
     def check_module_type(self, port, module_sm_obj, dynamic=False):
-        logger.log_info("enter check_module_type port {} module_sm_obj {}".format(port, module_sm_obj))
+        logger.log_debug("enter check_module_type port {} module_sm_obj {}".format(port, module_sm_obj))
         sfp = sfp_module.SFP(port)
         xcvr_api = sfp.get_xcvr_api()
         if not xcvr_api:
-            logger.log_info("check_module_type calling sfp reinit for port {} module_sm_obj {}"
+            logger.log_debug("check_module_type calling sfp reinit for port {} module_sm_obj {}"
                             .format(port, module_sm_obj))
             sfp.reinit()
-            logger.log_info("check_module_type setting as FW control as xcvr_api is empty for port {} module_sm_obj {}"
+            logger.log_info("check_module_type setting as FW control as xcvr_api is None for port {} module_sm_obj {}"
                             .format(port, module_sm_obj))
             return STATE_FW_CONTROL
         # QSFP-DD ID is 24, OSFP ID is 25 - only these 2 are supported currently as independent module - SW controlled
@@ -505,44 +517,48 @@ def check_module_type(self, port, module_sm_obj, dynamic=False):
                 logger.log_info("check_module_type port {} setting STATE_FW_CONTROL module ID {} due to flat_mem device"
                               .format(xcvr_api, port))
                 return STATE_FW_CONTROL
-            logger.log_info("check_module_type checking power cap for {} in check_module_type port {} module_sm_obj {}"
+            logger.log_debug("check_module_type checking power cap for {} in check_module_type port {} module_sm_obj {}"
                                .format(xcvr_api, port, module_sm_obj))
             power_cap = self.check_power_cap(port, module_sm_obj)
             if power_cap is STATE_POWER_LIMIT_ERROR:
+                logger.log_info(f"check_module_type port {port} setting STATE_POWER_LIMIT_ERROR")
                 module_sm_obj.set_final_state(STATE_POWER_LIMIT_ERROR)
                 return STATE_POWER_LIMIT_ERROR
             else:
                 # first read the frequency support - if it's 1 then continue, if it's 0 no need to do anything
                 module_fd_freq_support_path = SYSFS_INDEPENDENT_FD_FREQ_SUPPORT.format(port)
                 val_int = utils.read_int_from_file(module_fd_freq_support_path)
+                logger.log_info(f'reading sysfs {module_fd_freq_support_path} got value {val_int}')
                 if 1 == val_int:
                     # read the module maximum supported clock of Management Comm Interface (MCI) from module EEPROM.
                     # from byte 2 bits 3-2:
                     # 00b means module supports up to 400KHz
                     # 01b means module supports up to 1MHz
-                    logger.log_info(f"check_module_type reading mci max frequency for port {port}")
+                    logger.log_debug(f"check_module_type reading mci max frequency for port {port}")
                     read_mci = xcvr_api.xcvr_eeprom.read_raw(2, 1)
-                    logger.log_info(f"check_module_type read mci max frequency {read_mci} for port {port}")
+                    logger.log_debug(f"check_module_type read mci max frequency {read_mci} for port {port}")
                     mci_bits = read_mci & 0b00001100
-                    logger.log_info(f"check_module_type read mci max frequency bits {mci_bits} for port {port}")
+                    logger.log_debug(f"check_module_type read mci max frequency bits {mci_bits} for port {port}")
                     # Then, set it to frequency Sysfs using:
                     # echo <val> > /sys/module/sx_core/$asic/$module/frequency //  val: 0 - up to 400KHz, 1 - up to 1MHz
                     indep_fd_freq = SYSFS_INDEPENDENT_FD_FREQ.format(port)
                     utils.write_file(indep_fd_freq, mci_bits)
+                    logger.log_info(f'write sysfs {indep_fd_freq} with value {mci_bits}')
+                logger.log_info(f"check_module_type port {port} setting STATE_SW_CONTROL")
                 return STATE_SW_CONTROL
 
     def check_power_cap(self, port, module_sm_obj, dynamic=False):
-        logger.log_info("enter check_power_cap port {} module_sm_obj {}".format(port, module_sm_obj))
+        logger.log_debug("enter check_power_cap port {} module_sm_obj {}".format(port, module_sm_obj))
         sfp = sfp_module.SFP(port)
         xcvr_api = sfp.get_xcvr_api()
         field = xcvr_api.xcvr_eeprom.mem_map.get_field(consts.MAX_POWER_FIELD)
         powercap_ba = xcvr_api.xcvr_eeprom.reader(field.get_offset(), field.get_size())
-        logger.log_info("check_power_cap got powercap bytearray {} for port {} module_sm_obj {}".format(powercap_ba, port, module_sm_obj))
+        logger.log_debug("check_power_cap got powercap bytearray {} for port {} module_sm_obj {}".format(powercap_ba, port, module_sm_obj))
         powercap = int.from_bytes(powercap_ba, "big")
-        logger.log_info("check_power_cap got powercap {} for port {} module_sm_obj {}".format(powercap, port, module_sm_obj))
+        logger.log_debug("check_power_cap got powercap {} for port {} module_sm_obj {}".format(powercap, port, module_sm_obj))
         indep_fd_power_limit = self.get_sysfs_ethernet_port_fd(SYSFS_INDEPENDENT_FD_POWER_LIMIT, port)
         cage_power_limit = utils.read_int_from_file(indep_fd_power_limit)
-        logger.log_info("check_power_cap got cage_power_limit {} for port {} module_sm_obj {}".format(cage_power_limit, port, module_sm_obj))
+        logger.log_info(f'reading sysfs {indep_fd_power_limit} got value {cage_power_limit}, power capability from EEPROM is {powercap}')
         if powercap > int(cage_power_limit):
             logger.log_info("check_power_cap powercap {} != cage_power_limit {} for port {} module_sm_obj {}".format(powercap, cage_power_limit, port, module_sm_obj))
             module_sm_obj.set_final_state(STATE_POWER_LIMIT_ERROR)
@@ -550,7 +566,7 @@ def check_power_cap(self, port, module_sm_obj, dynamic=False):
 
     def save_module_control_mode(self, port, module_sm_obj, dynamic=False):
         detection_method = 'dynamic' if dynamic else 'static'
-        logger.log_info("{} detection save_module_control_mode setting current state {} for port {} as final state"
+        logger.log_debug("{} detection save_module_control_mode setting current state {} for port {} as final state"
                         .format(detection_method, module_sm_obj.get_current_state(), port))
         state = module_sm_obj.get_current_state()
         module_sm_obj.set_final_state(state)
@@ -559,19 +575,19 @@ def save_module_control_mode(self, port, module_sm_obj, dynamic=False):
                 # echo 0 > /sys/module/sx_core/$asic/$module/control
                 indep_fd_fw_control = SYSFS_INDEPENDENT_FD_FW_CONTROL.format(port)
                 utils.write_file(indep_fd_fw_control, "0")
-                logger.log_info("save_module_control_mode set FW control for state {} port {}".format(state, port))
+                logger.log_info(f'write sysfs {indep_fd_fw_control} with value 0')
                 # update the presence sysfs fd to legacy FD presence, first close the previous fd
                 module_sm_obj.module_fd.close()
                 module_fd_legacy_path = SYSFS_LEGACY_FD_PRESENCE.format(port)
                 module_sm_obj.set_module_fd_path(module_fd_legacy_path)
                 module_fd = open(module_fd_legacy_path, "r")
                 module_sm_obj.set_module_fd(module_fd)
-                logger.log_info("save_module_control_mode changed module fd to legacy present for port {}".format(port))
+                logger.log_debug("save_module_control_mode changed module fd to legacy present for port {}".format(port))
             else:
                 # registering power good sysfs even if not good, so we can get an event from poller upon changes
                 self.register_fd_for_polling(module_sm_obj, module_sm_obj.module_power_good_fd, 'power_good')
             # register the module's sysfs fd to poller with ERR and PRI attrs
-            logger.log_info("save_module_control_mode registering sysfs fd {} number {} path {} for port {}"
+            logger.log_debug("save_module_control_mode registering sysfs fd {} number {} path {} for port {}"
                           .format(module_sm_obj.module_fd, module_sm_obj.module_fd.fileno(), module_sm_obj.set_module_fd_path, port))
         except Exception as e:
             logger.log_error("{} detection exception on read presence {} for port {} fd name {} traceback:\n{}"
@@ -599,39 +615,39 @@ def deregister_fd_from_polling(self, port):
             self.port_to_fds.pop(port)
 
     def timerTask(self): # wakes up every 1 second
-        logger.log_info("timerTask entered run state")
+        logger.log_debug("timerTask entered run state")
         empty = False
         i = 0
         while not empty:
-            logger.log_info("timerTask while loop itartion {}".format(i))
+            logger.log_debug("timerTask while loop iteration {}".format(i))
             empty = True
             port_list_to_delete = []
             for port in self.waiting_modules_list:
-                logger.log_info("timerTask working on port {}".format(port))
+                logger.log_debug("timerTask working on port {}".format(port))
                 empty = False
                 module = self.sfp_port_dict[port]
-                logger.log_info("timerTask got module with port_num {} from port {}".format(module.port_num, port))
+                logger.log_debug("timerTask got module with port_num {} from port {}".format(module.port_num, port))
                 state = module.get_current_state()
                 if module and state == STATE_NOT_POWERED:
-                    logger.log_info("timerTask module {} current_state {} counting seconds since reset_start_time"
+                    logger.log_debug("timerTask module {} current_state {} counting seconds since reset_start_time"
                                   .format(module, module.get_current_state()))
                     if time.time() - module.reset_start_time >= 3:
                         # set next state as STATE_POWERED state to trigger the function of check module type
-                        logger.log_info("timerTask module port {} locking lock of port {}".format(module.port_num, module.port_num))
+                        logger.log_debug("timerTask module port {} locking lock of port {}".format(module.port_num, module.port_num))
                         self.modules_lock_list[module.port_num].acquire()
                         logger.log_info("timerTask module port {} setting next state to STATE_POWERED".format(module.port_num))
                         module.set_next_state(STATE_POWERED)
-                        logger.log_info("timerTask module port {} advancing next state".format(module.port_num))
+                        logger.log_debug("timerTask module port {} advancing next state".format(module.port_num))
                         module.advance_state()
-                        logger.log_info("timerTask module port {} releasing lock of port {}".format(port, module.port_num))
+                        logger.log_debug("timerTask module port {} releasing lock of port {}".format(port, module.port_num))
                         self.modules_lock_list[module.port_num].release()
-                        logger.log_info("timerTask module port {} adding to delete list to remove from waiting_modules_list".format(module.port_num))
+                        logger.log_debug("timerTask module port {} adding to delete list to remove from waiting_modules_list".format(module.port_num))
                         port_list_to_delete.append(module.port_num)
-            logger.log_info("timerTask deleting ports {} from waiting_modules_list...".format(port_list_to_delete))
+            logger.log_debug("timerTask deleting ports {} from waiting_modules_list...".format(port_list_to_delete))
             for port in port_list_to_delete:
-                logger.log_info("timerTask deleting port {} from waiting_modules_list".format(port))
+                logger.log_debug("timerTask deleting port {} from waiting_modules_list".format(port))
                 self.waiting_modules_list.remove(port)
-            logger.log_info("timerTask waiting_modules_list after deletion: {}".format(self.waiting_modules_list))
+            logger.log_debug("timerTask waiting_modules_list after deletion: {}".format(self.waiting_modules_list))
             time.sleep(1)
             i += 1
 
@@ -641,15 +657,13 @@ def get_sysfs_ethernet_port_fd(self, sysfs_fd, port):
 
     def add_port_to_wait_reset(self, module_sm_obj):
         module_sm_obj.reset_start_time = time.time()
-        logger.log_info("add_port_to_wait_reset reset_start_time {}".format(module_sm_obj.reset_start_time))
         module_sm_obj.wait_for_power_on = True
-        logger.log_info("add_port_to_wait_reset wait_for_power_on {}".format(module_sm_obj.wait_for_power_on))
         self.waiting_modules_list.add(module_sm_obj.port_num)
-        logger.log_info("add_port_to_wait_reset waiting_list after adding: {}".format(self.waiting_modules_list))
+        logger.log_info(f'added port {module_sm_obj.port_num} to wait list with timestamp {module_sm_obj.reset_start_time}')
 
     def map_ports_final_state(self, dynamic=False):
         detection_method = 'dynamic' if dynamic else 'static'
-        logger.log_info(f"{detection_method} detection enter map_ports_final_state")
+        logger.log_debug(f"{detection_method} detection enter map_ports_final_state")
         for port, module_obj in self.sfp_port_dict.items():
             final_state = module_obj.get_final_state()
             if final_state:
@@ -657,7 +671,7 @@ def map_ports_final_state(self, dynamic=False):
                 self.sfp_delete_list_from_port_dict.append(port)
                 if final_state in [STATE_HW_NOT_PRESENT, STATE_POWER_LIMIT_ERROR, STATE_ERROR_HANDLER]:
                     port_status = '0'
-                    logger.log_info(f"{detection_method} detection adding port {port} to register_hw_present_fds")
+                    logger.log_debug(f"{detection_method} detection adding port {port} to register_hw_present_fds")
                     self.register_hw_present_fds.append(module_obj)
                 else:
                     port_status = '1'
@@ -665,11 +679,11 @@ def map_ports_final_state(self, dynamic=False):
 
     def delete_ports_from_dict(self, dynamic=False):
         detection_method = 'dynamic' if dynamic else 'static'
-        logger.log_info(f"{detection_method} detection sfp_port_dict before deletion: {self.sfp_port_dict}")
+        logger.log_debug(f"{detection_method} detection sfp_port_dict before deletion: {self.sfp_port_dict}")
         for port in self.sfp_delete_list_from_port_dict:
             del self.sfp_port_dict[port]
         self.sfp_delete_list_from_port_dict = []
-        logger.log_info("{} detection sfp_port_dict after deletion: {}".format(detection_method, self.sfp_port_dict))
+        logger.log_debug("{} detection sfp_port_dict after deletion: {}".format(detection_method, self.sfp_port_dict))
 
     def send_changes_to_shared_queue(self, dynamic=False):
         detection_method = 'dynamic' if dynamic else 'static'
@@ -679,15 +693,15 @@ def send_changes_to_shared_queue(self, dynamic=False):
             try:
                 self.modules_changes_queue.put(self.sfp_changes_dict, timeout=1)
                 self.sfp_changes_dict = {}
-                logger.log_info(f"{detection_method} sfp_changes_dict after put changes: {self.sfp_changes_dict}")
+                logger.log_debug(f"{detection_method} sfp_changes_dict after put changes: {self.sfp_changes_dict}")
             except queue.Full:
-                logger.log_info(f"{detection_method} failed to put item from modules changes queue, queue is full")
+                logger.log_error(f"{detection_method} failed to put item from modules changes queue, queue is full")
         else:
-            logger.log_info(f"{detection_method} sfp_changes_dict {self.sfp_changes_dict} is empty...")
+            logger.log_debug(f"{detection_method} sfp_changes_dict {self.sfp_changes_dict} is empty...")
 
     def register_presece_closed_ports(self, dynamic=False, module_obj_list=[]):
         detection_method = 'dynamic' if dynamic else 'static'
-        logger.log_info(f"{detection_method} detection enter register_presence_closed_ports")
+        logger.log_debug(f"{detection_method} detection enter register_presence_closed_ports")
         for module_obj in module_obj_list:
             port = module_obj.port_num
             if self.is_supported_indep_mods_system:
@@ -697,7 +711,7 @@ def register_presece_closed_ports(self, dynamic=False, module_obj_list=[]):
             module_obj.set_module_fd_path(module_fd_indep_path)
             module_fd = open(module_fd_indep_path, "r")
             module_obj.set_module_fd(module_fd)
-            logger.log_info(f"{detection_method} registering fd {module_fd} fd name {module_fd.name} for port {port}")
+            logger.log_debug(f"{detection_method} registering fd {module_fd} fd name {module_fd.name} for port {port}")
             self.register_fd_for_polling(module_obj, module_fd, 'presence')
 
 class ModuleStateMachine(object):
diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py b/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py
index 90462e9ed..d07de2233 100644
--- a/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py
+++ b/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py
@@ -365,6 +365,8 @@ def _read_eeprom(self, offset, num_bytes, log_on_error=True):
                 content = f.read(num_bytes)
                 if ctypes.get_errno() != 0:
                     raise IOError(f'errno = {os.strerror(ctypes.get_errno())}')
+            logger.log_debug(f'read EEPROM sfp={self.sdk_index}, page={page}, page_offset={page_offset}, \
+                    size={num_bytes}, data={content}')
         except (OSError, IOError) as e:
             if log_on_error:
                 logger.log_warning(f'Failed to read sfp={self.sdk_index} EEPROM page={page}, page_offset={page_offset}, \
@@ -403,6 +405,8 @@ def write_eeprom(self, offset, num_bytes, write_buffer):
                     raise IOError(f'write return code = {ret}')
                 if ctypes.get_errno() != 0:
                     raise IOError(f'errno = {os.strerror(ctypes.get_errno())}')
+            logger.log_debug(f'write EEPROM sfp={self.sdk_index}, page={page}, page_offset={page_offset}, \
+                    size={num_bytes}, data={write_buffer}')
         except (OSError, IOError) as e:
             data = ''.join('{:02x}'.format(x) for x in write_buffer)
             logger.log_error(f'Failed to write EEPROM data sfp={self.sdk_index} EEPROM page={page}, page_offset={page_offset}, size={num_bytes}, \

From 0b8b503ca4bec75c8c3fdde87cf0858c300c5c98 Mon Sep 17 00:00:00 2001
From: SviatoslavBoichuk <boichuk.sv@gmail.com>
Date: Tue, 16 Apr 2024 11:49:30 +0300
Subject: [PATCH 0449/1115] [Banner] Add new feature including config, yang and
 tests (#16957)

- Why I did it
Added Banner feature related services according to HLD: sonic-net/SONiC#1361

- How I did it
Added banner-config systemd service, YANG model for new ConfDB table and YANG model tests

- How to verify it
Manual test

Co-authored-by: Sviatoslav Boichuk <sviatoslavb@nvidia.com>
---
 files/build_templates/init_cfg.json.j2        |  8 +++
 .../build_templates/sonic_debian_extension.j2 |  7 +++
 .../bannerconfig/banner-config.service        | 17 +++++++
 .../bannerconfig/banner-config.sh             | 17 +++++++
 files/image_config/bash/bash.bash_logout      | 12 +++++
 files/image_config/environment/logout_message |  0
 src/sonic-yang-models/setup.py                |  2 +
 .../tests/files/sample_config_db.json         |  8 +++
 .../yang_model_tests/tests/sonic-banner.json  | 14 +++++
 .../tests_config/sonic-banner.json            | 50 ++++++++++++++++++
 .../yang-models/sonic-banner.yang             | 51 +++++++++++++++++++
 11 files changed, 186 insertions(+)
 create mode 100644 files/image_config/bannerconfig/banner-config.service
 create mode 100755 files/image_config/bannerconfig/banner-config.sh
 create mode 100644 files/image_config/bash/bash.bash_logout
 create mode 100644 files/image_config/environment/logout_message
 create mode 100644 src/sonic-yang-models/tests/yang_model_tests/tests/sonic-banner.json
 create mode 100644 src/sonic-yang-models/tests/yang_model_tests/tests_config/sonic-banner.json
 create mode 100644 src/sonic-yang-models/yang-models/sonic-banner.yang

diff --git a/files/build_templates/init_cfg.json.j2 b/files/build_templates/init_cfg.json.j2
index 9c02de602..ae382263b 100644
--- a/files/build_templates/init_cfg.json.j2
+++ b/files/build_templates/init_cfg.json.j2
@@ -144,6 +144,14 @@
             "special_class": "true"
         }
     },
+    "BANNER_MESSAGE": {
+        "global": {
+            "state": "disabled",
+            "login": "Debian GNU/Linux 11",
+            "motd": "You are on\n  ____   ___  _   _ _  ____\n / ___| / _ \\| \\ | (_)/ ___|\n \\___ \\| | | |  \\| | | |\n  ___) | |_| | |\\  | | |___\n |____/ \\___/|_| \\_|_|\\____|\n\n-- Software for Open Networking in the Cloud --\n\nUnauthorized access and/or use are prohibited.\nAll access and/or use are subject to monitoring.\n\nHelp:    https://sonic-net.github.io/SONiC/\n\n",
+            "logout": ""
+        }
+    },
     "SYSTEM_DEFAULTS" : {
 {%- if include_mux == "y" %}
         "mux_tunnel_egress_acl": {
diff --git a/files/build_templates/sonic_debian_extension.j2 b/files/build_templates/sonic_debian_extension.j2
index 87dd07324..9e841e72c 100644
--- a/files/build_templates/sonic_debian_extension.j2
+++ b/files/build_templates/sonic_debian_extension.j2
@@ -87,6 +87,7 @@ sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y in
 # Apply environtment configuration files
 sudo cp $IMAGE_CONFIGS/environment/environment $FILESYSTEM_ROOT/etc/
 sudo cp $IMAGE_CONFIGS/environment/motd $FILESYSTEM_ROOT/etc/
+sudo cp $IMAGE_CONFIGS/environment/logout_message $FILESYSTEM_ROOT/etc/
 
 # Create all needed directories
 sudo mkdir -p $FILESYSTEM_ROOT/etc/sonic/
@@ -228,6 +229,7 @@ sudo dpkg --root=$FILESYSTEM_ROOT -i $debs_path/bash_*.deb || \
 # sonic-utilities-data installs bash-completion as a dependency. However, it is disabled by default
 # in bash.bashrc, so we copy a version of the file with it enabled here.
 sudo cp -f $IMAGE_CONFIGS/bash/bash.bashrc $FILESYSTEM_ROOT/etc/
+sudo cp -f $IMAGE_CONFIGS/bash/bash.bash_logout $FILESYSTEM_ROOT/etc/
 
 # Install readline's initialization file
 sudo cp -f $IMAGE_CONFIGS/readline/inputrc $FILESYSTEM_ROOT/etc/
@@ -605,6 +607,11 @@ sudo cp $IMAGE_CONFIGS/hostname/hostname-config.service $FILESYSTEM_ROOT_USR_LIB
 echo "hostname-config.service" | sudo tee -a $GENERATED_SERVICE_FILE
 sudo cp $IMAGE_CONFIGS/hostname/hostname-config.sh $FILESYSTEM_ROOT/usr/bin/
 
+# Copy banner configuration scripts
+sudo cp $IMAGE_CONFIGS/bannerconfig/banner-config.service $FILESYSTEM_ROOT_USR_LIB_SYSTEMD_SYSTEM
+echo "banner-config.service" | sudo tee -a $GENERATED_SERVICE_FILE
+sudo cp $IMAGE_CONFIGS/bannerconfig/banner-config.sh $FILESYSTEM_ROOT/usr/bin/
+
 # Copy miscellaneous scripts
 sudo cp $IMAGE_CONFIGS/misc/docker-wait-any $FILESYSTEM_ROOT/usr/bin/
 
diff --git a/files/image_config/bannerconfig/banner-config.service b/files/image_config/bannerconfig/banner-config.service
new file mode 100644
index 000000000..738b549ba
--- /dev/null
+++ b/files/image_config/bannerconfig/banner-config.service
@@ -0,0 +1,17 @@
+[Unit]
+Description=Update banner config based on configdb
+Requires=config-setup.service
+After=config-setup.service
+Before=systemd-logind.service sshd.service
+BindsTo=database.service
+BindsTo=sonic.target
+
+[Service]
+Type=oneshot
+RemainAfterExit=no
+ExecStart=/usr/bin/banner-config.sh
+
+[Install]
+WantedBy=sonic.target
+
+
diff --git a/files/image_config/bannerconfig/banner-config.sh b/files/image_config/bannerconfig/banner-config.sh
new file mode 100755
index 000000000..b81b342bf
--- /dev/null
+++ b/files/image_config/bannerconfig/banner-config.sh
@@ -0,0 +1,17 @@
+#!/bin/bash -e
+
+STATE=$(sonic-cfggen -d -v 'BANNER_MESSAGE["global"]["state"]')
+LOGIN=
+MOTD=
+LOGOUT=
+
+if [[ $STATE == "enabled" ]]; then
+    LOGIN=$(sonic-cfggen -d -v 'BANNER_MESSAGE["global"]["login"]')
+    MOTD=$(sonic-cfggen -d -v 'BANNER_MESSAGE["global"]["motd"]')
+    LOGOUT=$(sonic-cfggen -d -v 'BANNER_MESSAGE["global"]["logout"]')
+
+    echo -e "$LOGIN" > /etc/issue.net
+    echo -e "$LOGIN" > /etc/issue
+    echo -e "$MOTD" > /etc/motd
+    echo -e "$LOGOUT" > /etc/logout_message
+fi
diff --git a/files/image_config/bash/bash.bash_logout b/files/image_config/bash/bash.bash_logout
new file mode 100644
index 000000000..06f2e9062
--- /dev/null
+++ b/files/image_config/bash/bash.bash_logout
@@ -0,0 +1,12 @@
+LOGOUT_MESSAGE_PATH="/etc/logout_message"
+LOGOUT_MESSAGE=
+
+if [[ -f "$LOGOUT_MESSAGE_PATH" ]]; then
+    LOGOUT_MESSAGE=$(cat $LOGOUT_MESSAGE_PATH)
+fi
+
+if [[ -n "$LOGOUT_MESSAGE" ]]; then
+    # Print logout message
+    echo $LOGOUT_MESSAGE
+fi
+
diff --git a/files/image_config/environment/logout_message b/files/image_config/environment/logout_message
new file mode 100644
index 000000000..e69de29bb
diff --git a/src/sonic-yang-models/setup.py b/src/sonic-yang-models/setup.py
index 95f98bd53..ada13c288 100644
--- a/src/sonic-yang-models/setup.py
+++ b/src/sonic-yang-models/setup.py
@@ -86,6 +86,7 @@ def run(self):
         ('yang-models', ['./yang-models/sonic-acl.yang',
                          './yang-models/sonic-auto_techsupport.yang',
                          './yang-models/sonic-bgp-bbr.yang',
+                         './yang-models/sonic-banner.yang',
                          './yang-models/sonic-bgp-common.yang',
                          './yang-models/sonic-bgp-device-global.yang',
                          './yang-models/sonic-bgp-global.yang',
@@ -201,6 +202,7 @@ def run(self):
                          './yang-models/sonic-bgp-sentinel.yang',
                          './yang-models/sonic-smart-switch.yang',]),
         ('cvlyang-models', ['./cvlyang-models/sonic-acl.yang',
+                         './cvlyang-models/sonic-banner.yang',
                          './cvlyang-models/sonic-bgp-common.yang',
                          './cvlyang-models/sonic-bgp-global.yang',
                          './cvlyang-models/sonic-bgp-monitor.yang',
diff --git a/src/sonic-yang-models/tests/files/sample_config_db.json b/src/sonic-yang-models/tests/files/sample_config_db.json
index 47c0e3ec9..50ffc18b7 100644
--- a/src/sonic-yang-models/tests/files/sample_config_db.json
+++ b/src/sonic-yang-models/tests/files/sample_config_db.json
@@ -2636,6 +2636,14 @@
             "dpu1": {
                 "midplane_interface": "dpu1"
             }
+        },
+        "BANNER_MESSAGE": {
+            "global": {
+                "state": "enabled",
+                "login": "Some login message",
+                "motd": "Some message of the day",
+                "logout": "Some logout message"
+            }
         }
     },
     "SAMPLE_CONFIG_DB_UNKNOWN": {
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/sonic-banner.json b/src/sonic-yang-models/tests/yang_model_tests/tests/sonic-banner.json
new file mode 100644
index 000000000..1da77e05d
--- /dev/null
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests/sonic-banner.json
@@ -0,0 +1,14 @@
+{
+    "BANNER_MESSAGE_TEST_STATE": {
+        "desc": "Configure Banner feature state."
+    },
+    "BANNER_MESSAGE_TEST_LOGIN" : {
+        "desc": "Banner login messages configuration in BANNER_MESSAGE table."
+    },
+    "BANNER_MESSAGE_TEST_MOTD" : {
+        "desc": "Banner MOTD messages configuration in BANNER_MESSAGE table."
+    },
+    "BANNER_MESSAGE_TEST_LOGOUT" : {
+        "desc": "Banner logout messages configuration in BANNER_MESSAGE table."
+    }
+}
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/sonic-banner.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/sonic-banner.json
new file mode 100644
index 000000000..daf5dda4e
--- /dev/null
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/sonic-banner.json
@@ -0,0 +1,50 @@
+{
+    "BANNER_MESSAGE_TEST_STATE": {
+        "sonic-banner:sonic-banner": {
+            "sonic-banner:BANNER_MESSAGE": {
+                "global": {
+                    "state": "enabled",
+                    "login": "Some login message",
+                    "motd": "Some message of the day",
+                    "logout": "Some logout message"
+                }
+            }
+        }
+    },
+    "BANNER_MESSAGE_TEST_LOGIN": {
+        "sonic-banner:sonic-banner": {
+            "sonic-banner:BANNER_MESSAGE": {
+                "global": {
+                    "state": "enabled",
+                    "login": "Some login message",
+                    "motd": "Some message of the day",
+                    "logout": "Some logout message"
+                }
+            }
+        }
+    },
+    "BANNER_MESSAGE_TEST_MOTD": {
+        "sonic-banner:sonic-banner": {
+            "sonic-banner:BANNER_MESSAGE": {
+                "global": {
+                    "state": "enabled",
+                    "login": "Some login message",
+                    "motd": "Some message of the day",
+                    "logout": "Some logout message"
+                }
+            }
+        }
+    },
+    "BANNER_MESSAGE_TEST_LOGOUT": {
+        "sonic-banner:sonic-banner": {
+            "sonic-banner:BANNER_MESSAGE": {
+                "global": {
+                    "state": "enabled",
+                    "login": "Some login message",
+                    "motd": "Some message of the day",
+                    "logout": "Some logout message"
+                }
+            }
+        }
+    }
+}
diff --git a/src/sonic-yang-models/yang-models/sonic-banner.yang b/src/sonic-yang-models/yang-models/sonic-banner.yang
new file mode 100644
index 000000000..938f15ac5
--- /dev/null
+++ b/src/sonic-yang-models/yang-models/sonic-banner.yang
@@ -0,0 +1,51 @@
+module sonic-banner {
+    yang-version 1.1;
+    namespace "http://github.com/sonic-net/sonic-banner";
+    prefix banner_message;
+
+    import sonic-types {
+        prefix stypes;
+    }
+
+    description "BANNER_MESSAGE YANG Module for SONiC-based OS";
+    revision 2023-05-18 {
+        description "First Revision";
+    }
+    container sonic-banner {
+        container BANNER_MESSAGE {
+            description "BANNER_MESSAGE part of config_db.json";
+            container global {
+                leaf state {
+                    type stypes:admin_mode;
+                    description "Banner feature state";
+                    default disabled;
+                }
+                leaf login {
+                    type string;
+                    description "Banner message displayed to user before login prompt";
+                    default "Debian GNU/Linux 11";
+                }
+                leaf motd {
+                    type string;
+                    description "Banner message displayed to user after login prompt";
+                    default "You are on
+                              ____   ___  _   _ _  ____
+                             / ___| / _ \\| \\ | (_)/ ___|
+                             \\___ \\| | | |  \\| | | |
+                              ___) | |_| | |\\  | | |___
+                             |____/ \\___/|_| \\_|_|\\____|
+                             -- Software for Open Networking in the Cloud --
+                             Unauthorized access and/or use are prohibited.
+                             All access and/or use are subject to monitoring.
+                             Help:    https://sonic-net.github.io/SONiC/
+                             ";
+                }
+                leaf logout {
+                    type string;
+                    description "Banner message dispalyed to the users on logout";
+                    default "";
+                }
+            } /* end of container MESSAGE */
+        } /* end of container BANNER_MESSAGE */
+    } /* end of top level container */
+}

From f14420972546e8fb99f8d758c0dbca197ea2bac8 Mon Sep 17 00:00:00 2001
From: Sudharsan Dhamal Gopalarathnam <sudharsand@nvidia.com>
Date: Tue, 16 Apr 2024 08:21:42 -0700
Subject: [PATCH 0450/1115] [Mellanox]Enable forwarding of packets with link
 local SIP/DIP on specific platforms (#18487)

- Why I did it
Enable forwarding of packets with link local SIP/DIP on specific platforms and SKUs.

- How I did it
Setting SAI key value pair SAI_NOT_DROP_SIP_DIP_LINK_LOCAL=1

- How to verify it
Manual test to verify that packets with link local SIP/DIP are not dropped
---
 .../x86_64-mlnx_msn2700-r0/Mellanox-SN2700-C28D8/sai.profile     | 1 +
 .../x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D40C8S8/sai.profile   | 1 +
 .../x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D44C10/sai.profile    | 1 +
 .../x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D48C8/sai.profile     | 1 +
 .../mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700/sai.profile  | 1 +
 .../x86_64-mlnx_msn3800-r0/Mellanox-SN3800-C64/sai.profile       | 1 +
 .../x86_64-mlnx_msn3800-r0/Mellanox-SN3800-D100C12S2/sai.profile | 1 +
 .../x86_64-mlnx_msn3800-r0/Mellanox-SN3800-D112C8/sai.profile    | 1 +
 .../x86_64-mlnx_msn3800-r0/Mellanox-SN3800-D24C52/sai.profile    | 1 +
 .../x86_64-mlnx_msn3800-r0/Mellanox-SN3800-D28C49S1/sai.profile  | 1 +
 .../x86_64-mlnx_msn3800-r0/Mellanox-SN3800-D28C50/sai.profile    | 1 +
 .../x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-C64/sai.profile     | 1 +
 .../Mellanox-SN4600C-D100C12S2/sai.profile                       | 1 +
 .../x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D112C8/sai.profile  | 1 +
 .../x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D48C40/sai.profile  | 1 +
 .../x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/sai.profile       | 1 +
 .../x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/sai.profile     | 1 +
 .../x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/sai.profile     | 1 +
 18 files changed, 18 insertions(+)

diff --git a/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-C28D8/sai.profile b/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-C28D8/sai.profile
index 5ee219f34..d46666d4f 100644
--- a/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-C28D8/sai.profile
+++ b/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-C28D8/sai.profile
@@ -1,2 +1,3 @@
 SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_2700_8x50g_28x100g.xml
 SAI_DEFAULT_SWITCHING_MODE_STORE_FORWARD=1
+SAI_NOT_DROP_SIP_DIP_LINK_LOCAL=1
diff --git a/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D40C8S8/sai.profile b/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D40C8S8/sai.profile
index 8498641f5..a5048444f 100644
--- a/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D40C8S8/sai.profile
+++ b/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D40C8S8/sai.profile
@@ -1,2 +1,3 @@
 SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_2700_8x100g_40x50g_8x10g.xml
 SAI_DEFAULT_SWITCHING_MODE_STORE_FORWARD=1
+SAI_NOT_DROP_SIP_DIP_LINK_LOCAL=1
diff --git a/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D44C10/sai.profile b/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D44C10/sai.profile
index 7a2add983..fa53ebdff 100644
--- a/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D44C10/sai.profile
+++ b/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D44C10/sai.profile
@@ -1,2 +1,3 @@
 SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_2700_44x50g_10x100g.xml
 SAI_DEFAULT_SWITCHING_MODE_STORE_FORWARD=1
+SAI_NOT_DROP_SIP_DIP_LINK_LOCAL=1
diff --git a/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D48C8/sai.profile b/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D48C8/sai.profile
index 1d1563cd6..d57fccbf9 100644
--- a/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D48C8/sai.profile
+++ b/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D48C8/sai.profile
@@ -1,2 +1,3 @@
 SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_2700_48x50g_8x100g.xml
 SAI_DEFAULT_SWITCHING_MODE_STORE_FORWARD=1
+SAI_NOT_DROP_SIP_DIP_LINK_LOCAL=1
diff --git a/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700/sai.profile b/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700/sai.profile
index f1c554fa5..6b1de1004 100644
--- a/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700/sai.profile
+++ b/device/mellanox/x86_64-mlnx_msn2700-r0/Mellanox-SN2700/sai.profile
@@ -1,2 +1,3 @@
 SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_2700.xml
 SAI_DEFAULT_SWITCHING_MODE_STORE_FORWARD=1
+SAI_NOT_DROP_SIP_DIP_LINK_LOCAL=1
diff --git a/device/mellanox/x86_64-mlnx_msn3800-r0/Mellanox-SN3800-C64/sai.profile b/device/mellanox/x86_64-mlnx_msn3800-r0/Mellanox-SN3800-C64/sai.profile
index 011612d97..496a9f7e5 100644
--- a/device/mellanox/x86_64-mlnx_msn3800-r0/Mellanox-SN3800-C64/sai.profile
+++ b/device/mellanox/x86_64-mlnx_msn3800-r0/Mellanox-SN3800-C64/sai.profile
@@ -1,2 +1,3 @@
 SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_3800.xml
 SAI_DEFAULT_SWITCHING_MODE_STORE_FORWARD=1
+SAI_NOT_DROP_SIP_DIP_LINK_LOCAL=1
diff --git a/device/mellanox/x86_64-mlnx_msn3800-r0/Mellanox-SN3800-D100C12S2/sai.profile b/device/mellanox/x86_64-mlnx_msn3800-r0/Mellanox-SN3800-D100C12S2/sai.profile
index a0d219afc..c0e8d6c99 100644
--- a/device/mellanox/x86_64-mlnx_msn3800-r0/Mellanox-SN3800-D100C12S2/sai.profile
+++ b/device/mellanox/x86_64-mlnx_msn3800-r0/Mellanox-SN3800-D100C12S2/sai.profile
@@ -1,2 +1,3 @@
 SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_3800_2x10g_100x50g_12x100g.xml
 SAI_DEFAULT_SWITCHING_MODE_STORE_FORWARD=1
+SAI_NOT_DROP_SIP_DIP_LINK_LOCAL=1
diff --git a/device/mellanox/x86_64-mlnx_msn3800-r0/Mellanox-SN3800-D112C8/sai.profile b/device/mellanox/x86_64-mlnx_msn3800-r0/Mellanox-SN3800-D112C8/sai.profile
index eba550e54..2f7cd86f9 100644
--- a/device/mellanox/x86_64-mlnx_msn3800-r0/Mellanox-SN3800-D112C8/sai.profile
+++ b/device/mellanox/x86_64-mlnx_msn3800-r0/Mellanox-SN3800-D112C8/sai.profile
@@ -1,2 +1,3 @@
 SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_3800_112x50g_8x100g.xml
 SAI_DEFAULT_SWITCHING_MODE_STORE_FORWARD=1
+SAI_NOT_DROP_SIP_DIP_LINK_LOCAL=1
diff --git a/device/mellanox/x86_64-mlnx_msn3800-r0/Mellanox-SN3800-D24C52/sai.profile b/device/mellanox/x86_64-mlnx_msn3800-r0/Mellanox-SN3800-D24C52/sai.profile
index f7d985529..a1a8a5e9c 100644
--- a/device/mellanox/x86_64-mlnx_msn3800-r0/Mellanox-SN3800-D24C52/sai.profile
+++ b/device/mellanox/x86_64-mlnx_msn3800-r0/Mellanox-SN3800-D24C52/sai.profile
@@ -1,2 +1,3 @@
 SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_3800_24x50g_52x100g.xml
 SAI_DEFAULT_SWITCHING_MODE_STORE_FORWARD=1
+SAI_NOT_DROP_SIP_DIP_LINK_LOCAL=1
diff --git a/device/mellanox/x86_64-mlnx_msn3800-r0/Mellanox-SN3800-D28C49S1/sai.profile b/device/mellanox/x86_64-mlnx_msn3800-r0/Mellanox-SN3800-D28C49S1/sai.profile
index 1ad374639..8c0a39c92 100644
--- a/device/mellanox/x86_64-mlnx_msn3800-r0/Mellanox-SN3800-D28C49S1/sai.profile
+++ b/device/mellanox/x86_64-mlnx_msn3800-r0/Mellanox-SN3800-D28C49S1/sai.profile
@@ -1,2 +1,3 @@
 SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_3800_1x10g_28x50g_49x100g.xml
 SAI_DEFAULT_SWITCHING_MODE_STORE_FORWARD=1
+SAI_NOT_DROP_SIP_DIP_LINK_LOCAL=1
diff --git a/device/mellanox/x86_64-mlnx_msn3800-r0/Mellanox-SN3800-D28C50/sai.profile b/device/mellanox/x86_64-mlnx_msn3800-r0/Mellanox-SN3800-D28C50/sai.profile
index 0e989e17c..797fcf20d 100644
--- a/device/mellanox/x86_64-mlnx_msn3800-r0/Mellanox-SN3800-D28C50/sai.profile
+++ b/device/mellanox/x86_64-mlnx_msn3800-r0/Mellanox-SN3800-D28C50/sai.profile
@@ -1,2 +1,3 @@
 SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_3800_28x50g_52x100g.xml
 SAI_DEFAULT_SWITCHING_MODE_STORE_FORWARD=1
+SAI_NOT_DROP_SIP_DIP_LINK_LOCAL=1
diff --git a/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-C64/sai.profile b/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-C64/sai.profile
index 3324d5b4b..ed8a39a54 100644
--- a/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-C64/sai.profile
+++ b/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-C64/sai.profile
@@ -1,2 +1,3 @@
 SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_4600C.xml
 SAI_DEFAULT_SWITCHING_MODE_STORE_FORWARD=1
+SAI_NOT_DROP_SIP_DIP_LINK_LOCAL=1
diff --git a/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D100C12S2/sai.profile b/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D100C12S2/sai.profile
index acf46cd35..f6b3dd881 100644
--- a/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D100C12S2/sai.profile
+++ b/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D100C12S2/sai.profile
@@ -1,2 +1,3 @@
 SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_4600c_100x50g_12x100g_2x10g.xml
 SAI_DEFAULT_SWITCHING_MODE_STORE_FORWARD=1
+SAI_NOT_DROP_SIP_DIP_LINK_LOCAL=1
diff --git a/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D112C8/sai.profile b/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D112C8/sai.profile
index cbe1b241b..5ad44c25f 100644
--- a/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D112C8/sai.profile
+++ b/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D112C8/sai.profile
@@ -1,2 +1,3 @@
 SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_4600c_112x50g_8x100g.xml
 SAI_DEFAULT_SWITCHING_MODE_STORE_FORWARD=1
+SAI_NOT_DROP_SIP_DIP_LINK_LOCAL=1
diff --git a/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D48C40/sai.profile b/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D48C40/sai.profile
index 5d63094db..0a21cefc0 100644
--- a/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D48C40/sai.profile
+++ b/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D48C40/sai.profile
@@ -1,2 +1,3 @@
 SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_4600c_48x50g_40x100g.xml
 SAI_DEFAULT_SWITCHING_MODE_STORE_FORWARD=1
+SAI_NOT_DROP_SIP_DIP_LINK_LOCAL=1
diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/sai.profile b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/sai.profile
index e246cad50..ce681d79b 100644
--- a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/sai.profile
+++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/sai.profile
@@ -1,2 +1,3 @@
 SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_4700.xml
 SAI_DEFAULT_SWITCHING_MODE_STORE_FORWARD=1
+SAI_NOT_DROP_SIP_DIP_LINK_LOCAL=1
diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/sai.profile b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/sai.profile
index 84bc4f66a..60242532c 100644
--- a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/sai.profile
+++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/sai.profile
@@ -1,3 +1,4 @@
 SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_4700_8x400g_48x100g.xml
 SAI_DEFAULT_SWITCHING_MODE_STORE_FORWARD=1
 SAI_INDEPENDENT_MODULE_MODE=1
+SAI_NOT_DROP_SIP_DIP_LINK_LOCAL=1
diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/sai.profile b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/sai.profile
index c38508782..413fdb8b4 100644
--- a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/sai.profile
+++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/sai.profile
@@ -1,3 +1,4 @@
 SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_4700_8x400g_48x200g.xml
 SAI_DEFAULT_SWITCHING_MODE_STORE_FORWARD=1
 SAI_INDEPENDENT_MODULE_MODE=1
+SAI_NOT_DROP_SIP_DIP_LINK_LOCAL=1
\ No newline at end of file

From 5d00f6e0fde27ab5c395490c211f9b1ad39ffc54 Mon Sep 17 00:00:00 2001
From: Oleksandr Ivantsiv <oivantsiv@nvidia.com>
Date: Tue, 16 Apr 2024 10:34:47 -0700
Subject: [PATCH 0451/1115] [nvidia-bluefield] Add support for
 Nvidia-9009d3b600CVAA and Nvidia-9009d3b600SVAA BF-3 DPUs. (#18467)

-Why I did it
Add support for new Nvidia-9009d3b600CVAA and Nvidia-9009d3b600SVAA BF-3 DPU devices.

- How I did it
Define new platforms with the basic configuration and SKUs.

- How to verify it
The changes don't affect the SONiC compilation process or run-time.

Signed-off-by: Oleksandr Ivantsiv <oivantsiv@nvidia.com>
Co-authored-by: Vivek Reddy <vkarri@nvidia.com>
Co-authored-by: Yakiv Huryk <yhuryk@nvidia.com>
---
 .../Nvidia-9009d3b600CVAA-C1/hwsku.json       | 10 ++++
 .../Nvidia-9009d3b600CVAA-C1/port_config.ini  | 19 +++++++
 .../Nvidia-9009d3b600CVAA-C1/sai.profile      |  4 ++
 .../Nvidia-9009d3b600CVAA-C2/hwsku.json       | 10 ++++
 .../Nvidia-9009d3b600CVAA-C2/port_config.ini  | 19 +++++++
 .../Nvidia-9009d3b600CVAA-C2/sai.profile      |  4 ++
 .../Nvidia-9009d3b600CVAA/hwsku.json          | 10 ++++
 .../Nvidia-9009d3b600CVAA/port_config.ini     | 19 +++++++
 .../Nvidia-9009d3b600CVAA/sai.profile         |  5 ++
 .../arm64-nvda_bf-9009d3b600cvaa/default_sku  |  1 +
 .../installer.conf                            |  2 +
 .../arm64-nvda_bf-9009d3b600cvaa/pcie.yaml    | 53 +++++++++++++++++++
 .../platform.json                             | 36 +++++++++++++
 .../platform_asic                             |  1 +
 .../plugins/ssd_util.py                       | 10 ++++
 .../pmon_daemon_control.json                  |  7 +++
 .../system_health_monitoring_config.json      |  6 +++
 .../Nvidia-9009d3b600SVAA                     |  1 +
 .../Nvidia-9009d3b600SVAA-C1                  |  1 +
 .../Nvidia-9009d3b600SVAA-C2                  |  1 +
 .../arm64-nvda_bf-9009d3b600svaa/default_sku  |  1 +
 .../installer.conf                            |  1 +
 .../arm64-nvda_bf-9009d3b600svaa/pcie.yaml    |  1 +
 .../platform.json                             | 36 +++++++++++++
 .../platform_asic                             |  1 +
 .../arm64-nvda_bf-9009d3b600svaa/plugins      |  1 +
 .../pmon_daemon_control.json                  |  1 +
 .../system_health_monitoring_config.json      |  1 +
 28 files changed, 262 insertions(+)
 create mode 100644 device/nvidia-bluefield/arm64-nvda_bf-9009d3b600cvaa/Nvidia-9009d3b600CVAA-C1/hwsku.json
 create mode 100644 device/nvidia-bluefield/arm64-nvda_bf-9009d3b600cvaa/Nvidia-9009d3b600CVAA-C1/port_config.ini
 create mode 100644 device/nvidia-bluefield/arm64-nvda_bf-9009d3b600cvaa/Nvidia-9009d3b600CVAA-C1/sai.profile
 create mode 100644 device/nvidia-bluefield/arm64-nvda_bf-9009d3b600cvaa/Nvidia-9009d3b600CVAA-C2/hwsku.json
 create mode 100644 device/nvidia-bluefield/arm64-nvda_bf-9009d3b600cvaa/Nvidia-9009d3b600CVAA-C2/port_config.ini
 create mode 100644 device/nvidia-bluefield/arm64-nvda_bf-9009d3b600cvaa/Nvidia-9009d3b600CVAA-C2/sai.profile
 create mode 100644 device/nvidia-bluefield/arm64-nvda_bf-9009d3b600cvaa/Nvidia-9009d3b600CVAA/hwsku.json
 create mode 100644 device/nvidia-bluefield/arm64-nvda_bf-9009d3b600cvaa/Nvidia-9009d3b600CVAA/port_config.ini
 create mode 100644 device/nvidia-bluefield/arm64-nvda_bf-9009d3b600cvaa/Nvidia-9009d3b600CVAA/sai.profile
 create mode 100644 device/nvidia-bluefield/arm64-nvda_bf-9009d3b600cvaa/default_sku
 create mode 100644 device/nvidia-bluefield/arm64-nvda_bf-9009d3b600cvaa/installer.conf
 create mode 100644 device/nvidia-bluefield/arm64-nvda_bf-9009d3b600cvaa/pcie.yaml
 create mode 100644 device/nvidia-bluefield/arm64-nvda_bf-9009d3b600cvaa/platform.json
 create mode 100644 device/nvidia-bluefield/arm64-nvda_bf-9009d3b600cvaa/platform_asic
 create mode 100644 device/nvidia-bluefield/arm64-nvda_bf-9009d3b600cvaa/plugins/ssd_util.py
 create mode 100644 device/nvidia-bluefield/arm64-nvda_bf-9009d3b600cvaa/pmon_daemon_control.json
 create mode 100644 device/nvidia-bluefield/arm64-nvda_bf-9009d3b600cvaa/system_health_monitoring_config.json
 create mode 120000 device/nvidia-bluefield/arm64-nvda_bf-9009d3b600svaa/Nvidia-9009d3b600SVAA
 create mode 120000 device/nvidia-bluefield/arm64-nvda_bf-9009d3b600svaa/Nvidia-9009d3b600SVAA-C1
 create mode 120000 device/nvidia-bluefield/arm64-nvda_bf-9009d3b600svaa/Nvidia-9009d3b600SVAA-C2
 create mode 100644 device/nvidia-bluefield/arm64-nvda_bf-9009d3b600svaa/default_sku
 create mode 120000 device/nvidia-bluefield/arm64-nvda_bf-9009d3b600svaa/installer.conf
 create mode 120000 device/nvidia-bluefield/arm64-nvda_bf-9009d3b600svaa/pcie.yaml
 create mode 100644 device/nvidia-bluefield/arm64-nvda_bf-9009d3b600svaa/platform.json
 create mode 120000 device/nvidia-bluefield/arm64-nvda_bf-9009d3b600svaa/platform_asic
 create mode 120000 device/nvidia-bluefield/arm64-nvda_bf-9009d3b600svaa/plugins
 create mode 120000 device/nvidia-bluefield/arm64-nvda_bf-9009d3b600svaa/pmon_daemon_control.json
 create mode 120000 device/nvidia-bluefield/arm64-nvda_bf-9009d3b600svaa/system_health_monitoring_config.json

diff --git a/device/nvidia-bluefield/arm64-nvda_bf-9009d3b600cvaa/Nvidia-9009d3b600CVAA-C1/hwsku.json b/device/nvidia-bluefield/arm64-nvda_bf-9009d3b600cvaa/Nvidia-9009d3b600CVAA-C1/hwsku.json
new file mode 100644
index 000000000..ac8c3632d
--- /dev/null
+++ b/device/nvidia-bluefield/arm64-nvda_bf-9009d3b600cvaa/Nvidia-9009d3b600CVAA-C1/hwsku.json
@@ -0,0 +1,10 @@
+{
+    "interfaces": {
+        "Ethernet0": {
+            "default_brkout_mode": "1x200G"
+        },
+        "Ethernet4": {
+            "default_brkout_mode": "1x200G"
+        }
+    }
+}
diff --git a/device/nvidia-bluefield/arm64-nvda_bf-9009d3b600cvaa/Nvidia-9009d3b600CVAA-C1/port_config.ini b/device/nvidia-bluefield/arm64-nvda_bf-9009d3b600cvaa/Nvidia-9009d3b600CVAA-C1/port_config.ini
new file mode 100644
index 000000000..c588b2238
--- /dev/null
+++ b/device/nvidia-bluefield/arm64-nvda_bf-9009d3b600cvaa/Nvidia-9009d3b600CVAA-C1/port_config.ini
@@ -0,0 +1,19 @@
+##
+## Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+## Apache-2.0
+##
+## Licensed under the Apache License, Version 2.0 (the "License");
+## you may not use this file except in compliance with the License.
+## You may obtain a copy of the License at
+##
+## http://www.apache.org/licenses/LICENSE-2.0
+##
+## Unless required by applicable law or agreed to in writing, software
+## distributed under the License is distributed on an "AS IS" BASIS,
+## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+## See the License for the specific language governing permissions and
+## limitations under the License.
+##
+# name          lanes               alias     index
+Ethernet0       0,1,2,3             etp1      1
+Ethernet4       4,5,6,7             etp2      2
diff --git a/device/nvidia-bluefield/arm64-nvda_bf-9009d3b600cvaa/Nvidia-9009d3b600CVAA-C1/sai.profile b/device/nvidia-bluefield/arm64-nvda_bf-9009d3b600cvaa/Nvidia-9009d3b600CVAA-C1/sai.profile
new file mode 100644
index 000000000..547db9ee0
--- /dev/null
+++ b/device/nvidia-bluefield/arm64-nvda_bf-9009d3b600cvaa/Nvidia-9009d3b600CVAA-C1/sai.profile
@@ -0,0 +1,4 @@
+SAI_DUMP_STORE_PATH=/var/log/bluefield/sdk-dumps
+SAI_DUMP_STORE_AMOUNT=10
+PORT_LAYOUT=2x200G
+HAIRPIN=true
diff --git a/device/nvidia-bluefield/arm64-nvda_bf-9009d3b600cvaa/Nvidia-9009d3b600CVAA-C2/hwsku.json b/device/nvidia-bluefield/arm64-nvda_bf-9009d3b600cvaa/Nvidia-9009d3b600CVAA-C2/hwsku.json
new file mode 100644
index 000000000..caf6d7ed3
--- /dev/null
+++ b/device/nvidia-bluefield/arm64-nvda_bf-9009d3b600cvaa/Nvidia-9009d3b600CVAA-C2/hwsku.json
@@ -0,0 +1,10 @@
+{
+    "interfaces": {
+        "Ethernet0": {
+            "default_brkout_mode": "1x100G"
+        },
+        "Ethernet4": {
+            "default_brkout_mode": "1x100G"
+        }
+    }
+}
diff --git a/device/nvidia-bluefield/arm64-nvda_bf-9009d3b600cvaa/Nvidia-9009d3b600CVAA-C2/port_config.ini b/device/nvidia-bluefield/arm64-nvda_bf-9009d3b600cvaa/Nvidia-9009d3b600CVAA-C2/port_config.ini
new file mode 100644
index 000000000..c588b2238
--- /dev/null
+++ b/device/nvidia-bluefield/arm64-nvda_bf-9009d3b600cvaa/Nvidia-9009d3b600CVAA-C2/port_config.ini
@@ -0,0 +1,19 @@
+##
+## Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+## Apache-2.0
+##
+## Licensed under the Apache License, Version 2.0 (the "License");
+## you may not use this file except in compliance with the License.
+## You may obtain a copy of the License at
+##
+## http://www.apache.org/licenses/LICENSE-2.0
+##
+## Unless required by applicable law or agreed to in writing, software
+## distributed under the License is distributed on an "AS IS" BASIS,
+## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+## See the License for the specific language governing permissions and
+## limitations under the License.
+##
+# name          lanes               alias     index
+Ethernet0       0,1,2,3             etp1      1
+Ethernet4       4,5,6,7             etp2      2
diff --git a/device/nvidia-bluefield/arm64-nvda_bf-9009d3b600cvaa/Nvidia-9009d3b600CVAA-C2/sai.profile b/device/nvidia-bluefield/arm64-nvda_bf-9009d3b600cvaa/Nvidia-9009d3b600CVAA-C2/sai.profile
new file mode 100644
index 000000000..16c736ab2
--- /dev/null
+++ b/device/nvidia-bluefield/arm64-nvda_bf-9009d3b600cvaa/Nvidia-9009d3b600CVAA-C2/sai.profile
@@ -0,0 +1,4 @@
+SAI_DUMP_STORE_PATH=/var/log/bluefield/sdk-dumps
+SAI_DUMP_STORE_AMOUNT=10
+PORT_LAYOUT=2x100G
+HAIRPIN=false
diff --git a/device/nvidia-bluefield/arm64-nvda_bf-9009d3b600cvaa/Nvidia-9009d3b600CVAA/hwsku.json b/device/nvidia-bluefield/arm64-nvda_bf-9009d3b600cvaa/Nvidia-9009d3b600CVAA/hwsku.json
new file mode 100644
index 000000000..caf6d7ed3
--- /dev/null
+++ b/device/nvidia-bluefield/arm64-nvda_bf-9009d3b600cvaa/Nvidia-9009d3b600CVAA/hwsku.json
@@ -0,0 +1,10 @@
+{
+    "interfaces": {
+        "Ethernet0": {
+            "default_brkout_mode": "1x100G"
+        },
+        "Ethernet4": {
+            "default_brkout_mode": "1x100G"
+        }
+    }
+}
diff --git a/device/nvidia-bluefield/arm64-nvda_bf-9009d3b600cvaa/Nvidia-9009d3b600CVAA/port_config.ini b/device/nvidia-bluefield/arm64-nvda_bf-9009d3b600cvaa/Nvidia-9009d3b600CVAA/port_config.ini
new file mode 100644
index 000000000..c588b2238
--- /dev/null
+++ b/device/nvidia-bluefield/arm64-nvda_bf-9009d3b600cvaa/Nvidia-9009d3b600CVAA/port_config.ini
@@ -0,0 +1,19 @@
+##
+## Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+## Apache-2.0
+##
+## Licensed under the Apache License, Version 2.0 (the "License");
+## you may not use this file except in compliance with the License.
+## You may obtain a copy of the License at
+##
+## http://www.apache.org/licenses/LICENSE-2.0
+##
+## Unless required by applicable law or agreed to in writing, software
+## distributed under the License is distributed on an "AS IS" BASIS,
+## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+## See the License for the specific language governing permissions and
+## limitations under the License.
+##
+# name          lanes               alias     index
+Ethernet0       0,1,2,3             etp1      1
+Ethernet4       4,5,6,7             etp2      2
diff --git a/device/nvidia-bluefield/arm64-nvda_bf-9009d3b600cvaa/Nvidia-9009d3b600CVAA/sai.profile b/device/nvidia-bluefield/arm64-nvda_bf-9009d3b600cvaa/Nvidia-9009d3b600CVAA/sai.profile
new file mode 100644
index 000000000..00014723a
--- /dev/null
+++ b/device/nvidia-bluefield/arm64-nvda_bf-9009d3b600cvaa/Nvidia-9009d3b600CVAA/sai.profile
@@ -0,0 +1,5 @@
+SAI_DUMP_STORE_PATH=/var/log/bluefield/sdk-dumps
+SAI_DUMP_STORE_AMOUNT=10
+DASH_ACL_DEFAULT_RULE_ACTION=permit
+PORT_LAYOUT=2x100G
+HAIRPIN=false
diff --git a/device/nvidia-bluefield/arm64-nvda_bf-9009d3b600cvaa/default_sku b/device/nvidia-bluefield/arm64-nvda_bf-9009d3b600cvaa/default_sku
new file mode 100644
index 000000000..faa7d7281
--- /dev/null
+++ b/device/nvidia-bluefield/arm64-nvda_bf-9009d3b600cvaa/default_sku
@@ -0,0 +1 @@
+Nvidia-9009d3b600CVAA appliance
diff --git a/device/nvidia-bluefield/arm64-nvda_bf-9009d3b600cvaa/installer.conf b/device/nvidia-bluefield/arm64-nvda_bf-9009d3b600cvaa/installer.conf
new file mode 100644
index 000000000..66c2a99a3
--- /dev/null
+++ b/device/nvidia-bluefield/arm64-nvda_bf-9009d3b600cvaa/installer.conf
@@ -0,0 +1,2 @@
+GRUB_CMDLINE_LINUX="console=ttyAMA1 console=hvc0 console=ttyAMA0 earlycon=pl011,0x13010000 quiet"
+ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="isolcpus=1-13 nohz_full=1-13 rcu_nocbs=1-13"
diff --git a/device/nvidia-bluefield/arm64-nvda_bf-9009d3b600cvaa/pcie.yaml b/device/nvidia-bluefield/arm64-nvda_bf-9009d3b600cvaa/pcie.yaml
new file mode 100644
index 000000000..9dea7d670
--- /dev/null
+++ b/device/nvidia-bluefield/arm64-nvda_bf-9009d3b600cvaa/pcie.yaml
@@ -0,0 +1,53 @@
+- bus: '00'
+  dev: '00'
+  fn: '0'
+  id: a2db
+  name: 'PCI bridge: Mellanox Technologies MT43244 BlueField-3 SoC Crypto disabled
+    (rev 01)'
+- bus: '01'
+  dev: '00'
+  fn: '0'
+  id: 197b
+  name: 'PCI bridge: Mellanox Technologies MT43244 Family [BlueField-3 SoC PCIe Bridge]
+    (rev 01)'
+- bus: '02'
+  dev: '00'
+  fn: '0'
+  id: 197b
+  name: 'PCI bridge: Mellanox Technologies MT43244 Family [BlueField-3 SoC PCIe Bridge]
+    (rev 01)'
+- bus: '02'
+  dev: '03'
+  fn: '0'
+  id: 197b
+  name: 'PCI bridge: Mellanox Technologies MT43244 Family [BlueField-3 SoC PCIe Bridge]
+    (rev 01)'
+- bus: '03'
+  dev: '00'
+  fn: '0'
+  id: a2dc
+  name: 'Ethernet controller: Mellanox Technologies MT43244 BlueField-3 integrated
+    ConnectX-7 network controller (rev 01)'
+- bus: '03'
+  dev: '00'
+  fn: '1'
+  id: a2dc
+  name: 'Ethernet controller: Mellanox Technologies MT43244 BlueField-3 integrated
+    ConnectX-7 network controller (rev 01)'
+- bus: '04'
+  dev: '00'
+  fn: '0'
+  id: 197b
+  name: 'PCI bridge: Mellanox Technologies MT43244 Family [BlueField-3 SoC PCIe Bridge]
+    (rev 01)'
+- bus: '05'
+  dev: '00'
+  fn: '0'
+  id: 197b
+  name: 'PCI bridge: Mellanox Technologies MT43244 Family [BlueField-3 SoC PCIe Bridge]
+    (rev 01)'
+- bus: '06'
+  dev: '00'
+  fn: '0'
+  id: '0001'
+  name: 'Non-Volatile memory controller: KIOXIA Corporation Device 0001'
diff --git a/device/nvidia-bluefield/arm64-nvda_bf-9009d3b600cvaa/platform.json b/device/nvidia-bluefield/arm64-nvda_bf-9009d3b600cvaa/platform.json
new file mode 100644
index 000000000..4ecd49fcb
--- /dev/null
+++ b/device/nvidia-bluefield/arm64-nvda_bf-9009d3b600cvaa/platform.json
@@ -0,0 +1,36 @@
+{
+    "chassis": {
+        "name": "Nvidia-9009d3b600CVAA",
+        "components": [],
+        "fans": [],
+        "fan_drawers": [],
+        "psus": [],
+        "thermals": [],
+        "sfps": [
+            {
+                "name": "Ethernet0"
+            },
+            {
+                "name": "Ethernet4"
+            }
+        ]
+    },
+    "interfaces": {
+        "Ethernet0": {
+            "index": "1,1,1,1",
+            "lanes": "0,1,2,3",
+            "breakout_modes": {
+                "1x100G": ["etp1"],
+                "1x200G": ["etp1"]
+            }
+        },
+        "Ethernet4": {
+            "index": "2,2,2,2",
+            "lanes": "4,5,6,7",
+            "breakout_modes": {
+                "1x100G": ["etp2"],
+                "1x200G": ["etp2"]
+            }
+        }
+    }
+}
diff --git a/device/nvidia-bluefield/arm64-nvda_bf-9009d3b600cvaa/platform_asic b/device/nvidia-bluefield/arm64-nvda_bf-9009d3b600cvaa/platform_asic
new file mode 100644
index 000000000..ce453ec80
--- /dev/null
+++ b/device/nvidia-bluefield/arm64-nvda_bf-9009d3b600cvaa/platform_asic
@@ -0,0 +1 @@
+nvidia-bluefield
diff --git a/device/nvidia-bluefield/arm64-nvda_bf-9009d3b600cvaa/plugins/ssd_util.py b/device/nvidia-bluefield/arm64-nvda_bf-9009d3b600cvaa/plugins/ssd_util.py
new file mode 100644
index 000000000..de570f00f
--- /dev/null
+++ b/device/nvidia-bluefield/arm64-nvda_bf-9009d3b600cvaa/plugins/ssd_util.py
@@ -0,0 +1,10 @@
+
+import os
+
+from sonic_platform_base.sonic_ssd.ssd_emmc import EmmcUtil
+from sonic_platform_base.sonic_ssd.ssd_generic import SsdUtil as SsdUtilDefault
+
+def SsdUtil(diskdev):
+   if os.path.basename(diskdev).startswith('mmcblk'):
+      return EmmcUtil(diskdev)
+   return SsdUtilDefault(diskdev)
diff --git a/device/nvidia-bluefield/arm64-nvda_bf-9009d3b600cvaa/pmon_daemon_control.json b/device/nvidia-bluefield/arm64-nvda_bf-9009d3b600cvaa/pmon_daemon_control.json
new file mode 100644
index 000000000..86f807221
--- /dev/null
+++ b/device/nvidia-bluefield/arm64-nvda_bf-9009d3b600cvaa/pmon_daemon_control.json
@@ -0,0 +1,7 @@
+{
+    "skip_ledd": true,
+    "skip_psud": true,
+    "skip_fancontrol": true,
+    "skip_chassisd": true,
+    "skip_ycabled": true
+}
diff --git a/device/nvidia-bluefield/arm64-nvda_bf-9009d3b600cvaa/system_health_monitoring_config.json b/device/nvidia-bluefield/arm64-nvda_bf-9009d3b600cvaa/system_health_monitoring_config.json
new file mode 100644
index 000000000..2f6ac924c
--- /dev/null
+++ b/device/nvidia-bluefield/arm64-nvda_bf-9009d3b600cvaa/system_health_monitoring_config.json
@@ -0,0 +1,6 @@
+{
+    "services_to_ignore": [],
+    "devices_to_ignore": ["psu", "fan"],
+    "user_defined_checkers": ["python3 -m sonic_platform.throttling_checks.cpu_check", "python3 -m sonic_platform.throttling_checks.ddr_check"],
+    "polling_interval": 60
+}
diff --git a/device/nvidia-bluefield/arm64-nvda_bf-9009d3b600svaa/Nvidia-9009d3b600SVAA b/device/nvidia-bluefield/arm64-nvda_bf-9009d3b600svaa/Nvidia-9009d3b600SVAA
new file mode 120000
index 000000000..35e3fea29
--- /dev/null
+++ b/device/nvidia-bluefield/arm64-nvda_bf-9009d3b600svaa/Nvidia-9009d3b600SVAA
@@ -0,0 +1 @@
+../arm64-nvda_bf-9009d3b600cvaa/Nvidia-9009d3b600CVAA
\ No newline at end of file
diff --git a/device/nvidia-bluefield/arm64-nvda_bf-9009d3b600svaa/Nvidia-9009d3b600SVAA-C1 b/device/nvidia-bluefield/arm64-nvda_bf-9009d3b600svaa/Nvidia-9009d3b600SVAA-C1
new file mode 120000
index 000000000..269cb0bcd
--- /dev/null
+++ b/device/nvidia-bluefield/arm64-nvda_bf-9009d3b600svaa/Nvidia-9009d3b600SVAA-C1
@@ -0,0 +1 @@
+../arm64-nvda_bf-9009d3b600cvaa/Nvidia-9009d3b600CVAA-C1
\ No newline at end of file
diff --git a/device/nvidia-bluefield/arm64-nvda_bf-9009d3b600svaa/Nvidia-9009d3b600SVAA-C2 b/device/nvidia-bluefield/arm64-nvda_bf-9009d3b600svaa/Nvidia-9009d3b600SVAA-C2
new file mode 120000
index 000000000..b3cc593da
--- /dev/null
+++ b/device/nvidia-bluefield/arm64-nvda_bf-9009d3b600svaa/Nvidia-9009d3b600SVAA-C2
@@ -0,0 +1 @@
+../arm64-nvda_bf-9009d3b600cvaa/Nvidia-9009d3b600CVAA-C2
\ No newline at end of file
diff --git a/device/nvidia-bluefield/arm64-nvda_bf-9009d3b600svaa/default_sku b/device/nvidia-bluefield/arm64-nvda_bf-9009d3b600svaa/default_sku
new file mode 100644
index 000000000..d9a4893bd
--- /dev/null
+++ b/device/nvidia-bluefield/arm64-nvda_bf-9009d3b600svaa/default_sku
@@ -0,0 +1 @@
+Nvidia-9009d3b600SVAA appliance
diff --git a/device/nvidia-bluefield/arm64-nvda_bf-9009d3b600svaa/installer.conf b/device/nvidia-bluefield/arm64-nvda_bf-9009d3b600svaa/installer.conf
new file mode 120000
index 000000000..62c74b63e
--- /dev/null
+++ b/device/nvidia-bluefield/arm64-nvda_bf-9009d3b600svaa/installer.conf
@@ -0,0 +1 @@
+../arm64-nvda_bf-9009d3b600cvaa/installer.conf
\ No newline at end of file
diff --git a/device/nvidia-bluefield/arm64-nvda_bf-9009d3b600svaa/pcie.yaml b/device/nvidia-bluefield/arm64-nvda_bf-9009d3b600svaa/pcie.yaml
new file mode 120000
index 000000000..5527d49cf
--- /dev/null
+++ b/device/nvidia-bluefield/arm64-nvda_bf-9009d3b600svaa/pcie.yaml
@@ -0,0 +1 @@
+../arm64-nvda_bf-9009d3b600cvaa/pcie.yaml
\ No newline at end of file
diff --git a/device/nvidia-bluefield/arm64-nvda_bf-9009d3b600svaa/platform.json b/device/nvidia-bluefield/arm64-nvda_bf-9009d3b600svaa/platform.json
new file mode 100644
index 000000000..814462f07
--- /dev/null
+++ b/device/nvidia-bluefield/arm64-nvda_bf-9009d3b600svaa/platform.json
@@ -0,0 +1,36 @@
+{
+    "chassis": {
+        "name": "Nvidia-9009d3b600SVAA",
+        "components": [],
+        "fans": [],
+        "fan_drawers": [],
+        "psus": [],
+        "thermals": [],
+        "sfps": [
+            {
+                "name": "Ethernet0"
+            },
+            {
+                "name": "Ethernet4"
+            }
+        ]
+    },
+    "interfaces": {
+        "Ethernet0": {
+            "index": "1,1,1,1",
+            "lanes": "0,1,2,3",
+            "breakout_modes": {
+                "1x100G": ["etp1"],
+                "1x200G": ["etp1"]
+            }
+        },
+        "Ethernet4": {
+            "index": "2,2,2,2",
+            "lanes": "4,5,6,7",
+            "breakout_modes": {
+                "1x100G": ["etp2"],
+                "1x200G": ["etp2"]
+            }
+        }
+    }
+}
diff --git a/device/nvidia-bluefield/arm64-nvda_bf-9009d3b600svaa/platform_asic b/device/nvidia-bluefield/arm64-nvda_bf-9009d3b600svaa/platform_asic
new file mode 120000
index 000000000..7b8718811
--- /dev/null
+++ b/device/nvidia-bluefield/arm64-nvda_bf-9009d3b600svaa/platform_asic
@@ -0,0 +1 @@
+../arm64-nvda_bf-9009d3b600cvaa/platform_asic
\ No newline at end of file
diff --git a/device/nvidia-bluefield/arm64-nvda_bf-9009d3b600svaa/plugins b/device/nvidia-bluefield/arm64-nvda_bf-9009d3b600svaa/plugins
new file mode 120000
index 000000000..4f883901c
--- /dev/null
+++ b/device/nvidia-bluefield/arm64-nvda_bf-9009d3b600svaa/plugins
@@ -0,0 +1 @@
+../arm64-nvda_bf-9009d3b600cvaa/plugins/
\ No newline at end of file
diff --git a/device/nvidia-bluefield/arm64-nvda_bf-9009d3b600svaa/pmon_daemon_control.json b/device/nvidia-bluefield/arm64-nvda_bf-9009d3b600svaa/pmon_daemon_control.json
new file mode 120000
index 000000000..1f13b46ee
--- /dev/null
+++ b/device/nvidia-bluefield/arm64-nvda_bf-9009d3b600svaa/pmon_daemon_control.json
@@ -0,0 +1 @@
+../arm64-nvda_bf-9009d3b600cvaa/pmon_daemon_control.json
\ No newline at end of file
diff --git a/device/nvidia-bluefield/arm64-nvda_bf-9009d3b600svaa/system_health_monitoring_config.json b/device/nvidia-bluefield/arm64-nvda_bf-9009d3b600svaa/system_health_monitoring_config.json
new file mode 120000
index 000000000..3300a88b7
--- /dev/null
+++ b/device/nvidia-bluefield/arm64-nvda_bf-9009d3b600svaa/system_health_monitoring_config.json
@@ -0,0 +1 @@
+../arm64-nvda_bf-9009d3b600cvaa/system_health_monitoring_config.json
\ No newline at end of file

From 38502a8d0811d4c3c4630ca13f9e2f929ad48170 Mon Sep 17 00:00:00 2001
From: Tejaswini Chadaga <85581939+tjchadaga@users.noreply.github.com>
Date: Tue, 16 Apr 2024 21:08:28 -0700
Subject: [PATCH 0452/1115] Add dependency for tsa_enabled flag before
 populating peer config and bringing up BGP (#18556)

Why I did it
Ensure BGP peer bring-up and route advertisements are done only after checking TSA status during reload

Work item tracking
Microsoft ADO (number only): 27171112
How I did it
Add dependency on tsa_enabled flag before peer configuration

How to verify it
Validate that the BGP session bring up is not complete until tsa_enabled flag is populated.
Ensure no traffic is drawn to the device when in TSA and reboot with BGP unshut.
---
 src/sonic-bgpcfgd/bgpcfgd/managers_bgp.py | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/sonic-bgpcfgd/bgpcfgd/managers_bgp.py b/src/sonic-bgpcfgd/bgpcfgd/managers_bgp.py
index e88dc60b8..f0f23d3c4 100644
--- a/src/sonic-bgpcfgd/bgpcfgd/managers_bgp.py
+++ b/src/sonic-bgpcfgd/bgpcfgd/managers_bgp.py
@@ -107,6 +107,7 @@ def __init__(self, common_objs, db_name, table_name, peer_type, check_neig_meta)
         deps = [
             ("CONFIG_DB", swsscommon.CFG_DEVICE_METADATA_TABLE_NAME, "localhost/bgp_asn"),
             ("CONFIG_DB", swsscommon.CFG_LOOPBACK_INTERFACE_TABLE_NAME, "Loopback0"),
+            ("CONFIG_DB", swsscommon.CFG_BGP_DEVICE_GLOBAL_TABLE_NAME, "tsa_enabled"),
             ("LOCAL", "local_addresses", ""),
             ("LOCAL", "interfaces", ""),
         ]

From ed10a9f62ec0af57f50b91d7657a5fc8f3888b88 Mon Sep 17 00:00:00 2001
From: Oleksandr Ivantsiv <oivantsiv@nvidia.com>
Date: Tue, 16 Apr 2024 22:52:50 -0700
Subject: [PATCH 0453/1115] [nvidia-bluefield] Add dependencies required for
 Nvidia-bluefield image compilation. (#18649)

- Why I did it
Add dependencies required for Nvidia-bluefield image compilation.

- How I did it
Extend a list of the DEB packages installed in the Bookworm slave docker container.

- How to verify it
Compile Bookworm slave docker container.
---
 sonic-slave-bookworm/Dockerfile.j2 | 24 +++++++++++++++++++++++-
 1 file changed, 23 insertions(+), 1 deletion(-)

diff --git a/sonic-slave-bookworm/Dockerfile.j2 b/sonic-slave-bookworm/Dockerfile.j2
index 34d517556..fd88a9a07 100644
--- a/sonic-slave-bookworm/Dockerfile.j2
+++ b/sonic-slave-bookworm/Dockerfile.j2
@@ -421,7 +421,29 @@ RUN apt-get update && apt-get install -y \
         protobuf-compiler \
         libprotobuf-dev \
 # For sonic-dhcp6relay build
-        libjsoncpp-dev
+        libjsoncpp-dev \
+#for nvidia-blufield driver compilation
+        pciutils \
+        dh-dkms \
+        rpm2cpio \
+        libsnmp-dev \
+        libpopt-dev \
+{%- if CONFIGURED_ARCH == "arm64" %}
+        grub-efi-arm64-bin \
+{%- endif %}
+        efibootmgr \
+        watchdog \
+        dmidecode \
+# For nvidia-blufield sdk compilation
+        cython3 \
+        pandoc \
+        valgrind \
+        udev \
+        inkscape \
+        meson \
+        python3-pyelftools \
+        hwdata \
+        libzip-dev
 
 {%- if CROSS_BUILD_ENVIRON == "y" %}
 # Arm vs. amd64 versions conflict - remove amd64 packages

From 82a222cc09477679aa725824f3a64b311fd78303 Mon Sep 17 00:00:00 2001
From: sophiek <sophiekravitz592@gmail.com>
Date: Wed, 17 Apr 2024 09:44:06 +0300
Subject: [PATCH 0454/1115] [Mellanox] Implementation for component version
 listing (#18591)

- Why I did it
Added ability to show summary of all the component versions on the switch and a comparison between compiled versions and actual versions.
The user will be able to run the 'get_component_versions.py' script which outputs the versions table.
The versions table will also be saved in techsupport.

- How I did it
Added Make files that add a new file to the system that contains all the versions of the components available at compilation (the versions are taken from corresponding .mk files).
Added a script that outputs a table that summarizes all the component versions (compilation and actual)
---
 .../build_templates/sonic_debian_extension.j2 |   3 +
 platform/mellanox/component-versions.dep      |  10 ++
 platform/mellanox/component-versions.mk       |  26 ++++
 platform/mellanox/component-versions/Makefile |  26 ++++
 .../create_component_versions.sh              |  23 ++++
 platform/mellanox/fw.mk                       |   3 +-
 .../get_component_versions.py                 | 130 ++++++++++++++++++
 platform/mellanox/rules.dep                   |   1 +
 platform/mellanox/rules.mk                    |   3 +-
 9 files changed, 223 insertions(+), 2 deletions(-)
 create mode 100644 platform/mellanox/component-versions.dep
 create mode 100644 platform/mellanox/component-versions.mk
 create mode 100644 platform/mellanox/component-versions/Makefile
 create mode 100755 platform/mellanox/component-versions/create_component_versions.sh
 create mode 100644 platform/mellanox/get_component_versions/get_component_versions.py

diff --git a/files/build_templates/sonic_debian_extension.j2 b/files/build_templates/sonic_debian_extension.j2
index 9e841e72c..cd22584c9 100644
--- a/files/build_templates/sonic_debian_extension.j2
+++ b/files/build_templates/sonic_debian_extension.j2
@@ -1012,6 +1012,7 @@ for fw_file_name in ${!FW_FILE_MAP[@]}; do
 done
 sudo cp $files_path/$ISSU_VERSION_FILE $FILESYSTEM_ROOT/$PLATFORM_DIR/fw/asic/issu-version
 sudo ln -s /host/image-$SONIC_IMAGE_VERSION/$PLATFORM_DIR/fw/asic/issu-version $FILESYSTEM_ROOT/etc/mlnx/issu-version
+sudo cp $files_path/$COMPONENT_VERSIONS_FILE $FILESYSTEM_ROOT/etc/mlnx/component-versions
 sudo cp $files_path/$MLNX_FFB_SCRIPT $FILESYSTEM_ROOT/usr/bin/mlnx-ffb.sh
 sudo cp $files_path/$MLNX_ONIE_FW_UPDATE $FILESYSTEM_ROOT/usr/bin/$MLNX_ONIE_FW_UPDATE
 sudo cp $files_path/$MLNX_SSD_FW_UPDATE $FILESYSTEM_ROOT/usr/bin/$MLNX_SSD_FW_UPDATE
@@ -1020,6 +1021,8 @@ sudo mkdir -p $FILESYSTEM_ROOT/etc/mlnx/cpld/
 for MLNX_CPLD_ARCHIVE in $MLNX_CPLD_ARCHIVES; do
     sudo cp $files_path/$MLNX_CPLD_ARCHIVE $FILESYSTEM_ROOT/etc/mlnx/cpld/
 done
+sudo cp platform/mellanox/get_component_versions/get_component_versions.py $FILESYSTEM_ROOT/usr/bin/get_component_versions.py
+sudo chmod 755 $FILESYSTEM_ROOT/usr/bin/get_component_versions.py
 j2 platform/mellanox/mlnx-fw-upgrade.j2 | sudo tee $FILESYSTEM_ROOT/usr/bin/mlnx-fw-upgrade.sh
 sudo chmod 755 $FILESYSTEM_ROOT/usr/bin/mlnx-fw-upgrade.sh
 
diff --git a/platform/mellanox/component-versions.dep b/platform/mellanox/component-versions.dep
new file mode 100644
index 000000000..5457ab3d4
--- /dev/null
+++ b/platform/mellanox/component-versions.dep
@@ -0,0 +1,10 @@
+# DPKG FRK
+
+SPATH := $($(COMPONENT_VERSIONS_FILE)_SRC_PATH)
+DEP_FILES := $(SONIC_COMMON_FILES_LIST) $(PLATFORM_PATH)/component-versions.mk $(PLATFORM_PATH)/component-versions.dep
+DEP_FILES += $(SONIC_COMMON_BASE_FILES_LIST)
+DEP_FILES += $(shell git ls-files -- $(SPATH))
+
+$(COMPONENT_VERSIONS_FILE)_CACHE_MODE := GIT_CONTENT_SHA
+$(COMPONENT_VERSIONS_FILE)_DEP_FLAGS := $(SONIC_COMMON_FLAGS_LIST)
+$(COMPONENT_VERSIONS_FILE)_DEP_FILES := $(DEP_FILES)
diff --git a/platform/mellanox/component-versions.mk b/platform/mellanox/component-versions.mk
new file mode 100644
index 000000000..ea0633c29
--- /dev/null
+++ b/platform/mellanox/component-versions.mk
@@ -0,0 +1,26 @@
+#
+# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+# Firmware pending update checker and installer
+
+COMPONENT_VERSIONS_FILE = component-versions
+$(COMPONENT_VERSIONS_FILE)_SRC_PATH = $(PLATFORM_PATH)/component-versions
+
+SONIC_MAKE_FILES += $(COMPONENT_VERSIONS_FILE)
+
+MLNX_FILES += $(COMPONENT_VERSIONS_FILE)
+
+export COMPONENT_VERSIONS_FILE
diff --git a/platform/mellanox/component-versions/Makefile b/platform/mellanox/component-versions/Makefile
new file mode 100644
index 000000000..6a240bd02
--- /dev/null
+++ b/platform/mellanox/component-versions/Makefile
@@ -0,0 +1,26 @@
+#
+# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+.ONESHELL:
+SHELL = /bin/bash
+.SHELLFLAGS += -e
+
+MAIN_TARGET = component-versions
+
+$(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% :
+	./create_component_versions.sh $(MLNX_SDK_VERSION) $(MLNX_SPC_FW_VERSION) $(MLNX_SAI_VERSION) $(MLNX_HW_MANAGEMENT_VERSION) $(MFT_VERSION) $(MFT_REVISION) $(KVERSION_SHORT)
+	mv temp_versions_file $(DEST)/$(MAIN_TARGET)
diff --git a/platform/mellanox/component-versions/create_component_versions.sh b/platform/mellanox/component-versions/create_component_versions.sh
new file mode 100755
index 000000000..109242de9
--- /dev/null
+++ b/platform/mellanox/component-versions/create_component_versions.sh
@@ -0,0 +1,23 @@
+#
+# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+echo "SDK $1" > temp_versions_file
+echo $2 | sed -r 's/([0-9]*)\.([0-9]*)\.([0-9]*)/FW \2\.\3/g' >> temp_versions_file
+echo "SAI $3" >> temp_versions_file
+echo "HW-MGMT $4" >> temp_versions_file
+echo "MFT $5-$6" >> temp_versions_file
+echo "Kernel $7" >> temp_versions_file
diff --git a/platform/mellanox/fw.mk b/platform/mellanox/fw.mk
index 603fee4f8..8409f6086 100644
--- a/platform/mellanox/fw.mk
+++ b/platform/mellanox/fw.mk
@@ -1,5 +1,5 @@
 #
-# Copyright (c) 2016-2023 NVIDIA CORPORATION & AFFILIATES.
+# Copyright (c) 2016-2024 NVIDIA CORPORATION & AFFILIATES.
 # Apache-2.0
 #
 # Licensed under the Apache License, Version 2.0 (the "License");
@@ -62,6 +62,7 @@ endif
 
 MLNX_FILES += $(MLNX_FW_FILES)
 
+export MLNX_SPC_FW_VERSION MLNX_SPC2_FW_VERSION MLNX_SPC3_FW_VERSION MLNX_SPC4_FW_VERSION
 export MLNX_SPC_FW_FILE
 export MLNX_SPC2_FW_FILE
 export MLNX_SPC3_FW_FILE
diff --git a/platform/mellanox/get_component_versions/get_component_versions.py b/platform/mellanox/get_component_versions/get_component_versions.py
new file mode 100644
index 000000000..8e900eb0c
--- /dev/null
+++ b/platform/mellanox/get_component_versions/get_component_versions.py
@@ -0,0 +1,130 @@
+#!/usr/bin/env python3
+#
+# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+import os
+import subprocess
+import re
+
+from fwutil.lib import PlatformDataProvider
+from sonic_py_common.general import check_output_pipe
+from tabulate import tabulate
+
+COMPONENT_VERSIONS_FILE = "/etc/mlnx/component-versions"
+HEADERS = ["COMPONENT", "COMPILATION", "ACTUAL"]
+COMMANDS_FOR_ACTUAL = {
+    "MFT": [["dpkg", "-l"], ["grep", "mft "], "mft *([0-9.-]*)"],
+    "HW-MGMT": [["dpkg", "-l"], ["grep", "hw"], ".*1\\.mlnx\\.([0-9.]*)"],
+    "SDK": [["docker", "exec", "-it", "syncd", "bash", "-c", 'dpkg -l | grep sdk'], ".*1\\.mlnx\\.([0-9.]*)"],
+    "SAI": [["docker", "exec", "-it", "syncd", "bash", "-c", 'dpkg -l | grep mlnx-sai'], ".*1\\.mlnx\\.([A-Za-z0-9.]*)"],
+    "FW": [["mlxfwmanager", "--query"], "FW * [0-9]{2}\\.([0-9.]*)"],
+    "Kernel": [["uname", "-r"], "([0-9][0-9.-]*)-.*"]
+}
+
+UNAVAILABLE_PLATFORM_VERSIONS = {
+    "SSD": "N/A",
+    "BIOS": "N/A",
+    "CPLD": "N/A"
+}
+
+UNAVAILABLE_COMPILED_VERSIONS = {
+    "SDK": "N/A",
+    "FW": "N/A",
+    "SAI": "N/A",
+    "HW-MGMT": "N/A",
+    "MFT": "N/A",
+    "Kernel": "N/A"
+}
+
+
+def parse_compiled_components_file():
+    compiled_versions = UNAVAILABLE_COMPILED_VERSIONS
+
+    if not os.path.exists(COMPONENT_VERSIONS_FILE):
+        return UNAVAILABLE_COMPILED_VERSIONS
+
+    with open(COMPONENT_VERSIONS_FILE, 'r') as component_versions:
+        for line in component_versions.readlines():
+            comp, version = line.split()
+            compiled_versions[comp] = version
+
+    return compiled_versions
+
+
+def get_platform_component_versions():
+    pdp = PlatformDataProvider()
+    ccm = pdp.chassis_component_map
+
+    if not ccm:
+        return UNAVAILABLE_PLATFORM_VERSIONS
+
+    versions_map = None
+
+    # The first layer of the map only has one item
+    for key, value in ccm.items():
+        versions_map = value
+        break
+
+    if not versions_map or len(versions_map) == 0:
+        return UNAVAILABLE_PLATFORM_VERSIONS
+
+    platform_versions = {}
+    for component_name, component in versions_map.items():
+        platform_versions[component_name] = component.get_firmware_version()
+
+    return platform_versions
+
+
+def get_current_version(comp):
+    version = ""
+    # If there's only one command
+    if len(COMMANDS_FOR_ACTUAL[comp]) == 2:
+        version = subprocess.run(COMMANDS_FOR_ACTUAL[comp][0], shell=False, stdout=subprocess.PIPE, text=True)
+        version = str(version.stdout)
+    #If there are two commands and we need a pipe
+    elif len(COMMANDS_FOR_ACTUAL[comp]) == 3:
+        version = check_output_pipe(COMMANDS_FOR_ACTUAL[comp][0], COMMANDS_FOR_ACTUAL[comp][1])
+    parsed_version = re.search(COMMANDS_FOR_ACTUAL[comp][-1], version)
+    return parsed_version.group(1) if parsed_version else "N/A"
+
+
+def format_output_table(table):
+    return tabulate(table, HEADERS)
+
+
+def main():
+
+    if os.getuid() != 0:
+        print("Error: Root privileges are required")
+        return
+
+    compiled_versions = parse_compiled_components_file()
+    platform_versions = get_platform_component_versions()
+
+    output_table = []
+    for comp in compiled_versions.keys():
+        actual = get_current_version(comp)
+        output_table.append([comp, compiled_versions[comp], actual])
+
+    for comp in platform_versions.keys():
+        output_table.append([comp, "-", platform_versions[comp]])
+
+    print(format_output_table(output_table))
+
+
+if __name__ == "__main__":
+    main()
diff --git a/platform/mellanox/rules.dep b/platform/mellanox/rules.dep
index 5dce51d83..fcf50e54d 100644
--- a/platform/mellanox/rules.dep
+++ b/platform/mellanox/rules.dep
@@ -16,3 +16,4 @@ include $(PLATFORM_PATH)/issu-version.dep
 include $(PLATFORM_PATH)/mlnx-onie-fw-update.dep
 include $(PLATFORM_PATH)/mlnx-ssd-fw-update.dep
 include $(PLATFORM_PATH)/install-pending-fw.dep
+include $(PLATFORM_PATH)/component-versions.dep
diff --git a/platform/mellanox/rules.mk b/platform/mellanox/rules.mk
index e81a1af20..2c598ab7d 100644
--- a/platform/mellanox/rules.mk
+++ b/platform/mellanox/rules.mk
@@ -1,5 +1,5 @@
 #
-# Copyright (c) 2016-2023 NVIDIA CORPORATION & AFFILIATES.
+# Copyright (c) 2016-2024 NVIDIA CORPORATION & AFFILIATES.
 # Apache-2.0
 #
 # Licensed under the Apache License, Version 2.0 (the "License");
@@ -34,6 +34,7 @@ include $(PLATFORM_PATH)/mlnx-ssd-fw-update.mk
 include $(PLATFORM_PATH)/iproute2.mk
 include $(PLATFORM_PATH)/install-pending-fw.mk
 include $(PLATFORM_PATH)/integration-scripts.mk
+include $(PLATFORM_PATH)/component-versions.mk
 
 SONIC_ALL += $(SONIC_ONE_IMAGE) \
              $(DOCKER_FPM)

From 88d9651c564d54a508d24e4617f5890c2eeba0e9 Mon Sep 17 00:00:00 2001
From: DavidZagury <32644413+DavidZagury@users.noreply.github.com>
Date: Wed, 17 Apr 2024 11:52:43 +0300
Subject: [PATCH 0455/1115] [Mellanox] Add support for platform SN5400 (#18595)

- Why I did it
Add support for new platform x86_64-nvidia_sn5400-r0

- How I did it
Added all config files that are needed to support SN5400.

- How to verify it
Run Platform tests

Signed-off-by: Kebo Liu <kebol@nvidia.com>
---
 .../ACS-SN5400/buffers.json.j2                |    1 +
 .../ACS-SN5400/buffers_defaults_objects.j2    |    1 +
 .../ACS-SN5400/buffers_defaults_t0.j2         |    1 +
 .../ACS-SN5400/buffers_defaults_t1.j2         |    1 +
 .../ACS-SN5400/buffers_dynamic.json.j2        |    1 +
 .../ACS-SN5400/hwsku.json                     |  202 +++
 .../ACS-SN5400/pg_profile_lookup.ini          |    1 +
 .../ACS-SN5400/port_config.ini                |   84 ++
 .../ACS-SN5400/qos.json.j2                    |    1 +
 .../ACS-SN5400/sai.profile                    |    1 +
 .../ACS-SN5400/sai_5400.xml                   |  503 +++++++
 .../x86_64-nvidia_sn5400-r0/default_sku       |    1 +
 .../x86_64-nvidia_sn5400-r0/pcie.yaml         |  145 ++
 .../x86_64-nvidia_sn5400-r0/platform.json     | 1333 ++++++++++++++++
 .../x86_64-nvidia_sn5400-r0/platform_asic     |    1 +
 .../platform_components.json                  |   16 +
 .../x86_64-nvidia_sn5400-r0/platform_wait     |    1 +
 .../x86_64-nvidia_sn5400-r0/plugins/eeprom.py |    1 +
 .../plugins/psuutil.py                        |    1 +
 .../plugins/sfplpmget.py                      |    1 +
 .../plugins/sfplpmset.py                      |    1 +
 .../plugins/sfpreset.py                       |    1 +
 .../plugins/sfputil.py                        |    1 +
 .../pmon_daemon_control.json                  |    1 +
 .../x86_64-nvidia_sn5400-r0/pre_reboot_hook   |    1 +
 .../x86_64-nvidia_sn5400-r0/sensors.conf      |  379 +++++
 .../system_health_monitoring_config.json      |    1 +
 .../thermal_policy.json                       |    1 +
 .../x86_64-nvidia_sn5400_simx-r0/ACS-SN5400   |    1 +
 .../x86_64-nvidia_sn5400_simx-r0/default_sku  |    1 +
 .../platform.json                             | 1336 +++++++++++++++++
 .../platform_asic                             |    1 +
 .../plugins/eeprom.py                         |    1 +
 .../plugins/psuutil.py                        |    1 +
 .../plugins/sfplpmget.py                      |    1 +
 .../plugins/sfplpmset.py                      |    1 +
 .../plugins/sfpreset.py                       |    1 +
 .../plugins/sfputil.py                        |    1 +
 .../pmon_daemon_control.json                  |    1 +
 .../syseeprom.hex                             |  256 ++++
 .../system_health_monitoring_config.json      |    1 +
 platform/mellanox/asic_table.j2               |    4 +-
 .../sonic_platform/device_data.py             |   10 +-
 43 files changed, 4298 insertions(+), 2 deletions(-)
 create mode 120000 device/mellanox/x86_64-nvidia_sn5400-r0/ACS-SN5400/buffers.json.j2
 create mode 120000 device/mellanox/x86_64-nvidia_sn5400-r0/ACS-SN5400/buffers_defaults_objects.j2
 create mode 120000 device/mellanox/x86_64-nvidia_sn5400-r0/ACS-SN5400/buffers_defaults_t0.j2
 create mode 120000 device/mellanox/x86_64-nvidia_sn5400-r0/ACS-SN5400/buffers_defaults_t1.j2
 create mode 120000 device/mellanox/x86_64-nvidia_sn5400-r0/ACS-SN5400/buffers_dynamic.json.j2
 create mode 100644 device/mellanox/x86_64-nvidia_sn5400-r0/ACS-SN5400/hwsku.json
 create mode 120000 device/mellanox/x86_64-nvidia_sn5400-r0/ACS-SN5400/pg_profile_lookup.ini
 create mode 100644 device/mellanox/x86_64-nvidia_sn5400-r0/ACS-SN5400/port_config.ini
 create mode 120000 device/mellanox/x86_64-nvidia_sn5400-r0/ACS-SN5400/qos.json.j2
 create mode 100644 device/mellanox/x86_64-nvidia_sn5400-r0/ACS-SN5400/sai.profile
 create mode 100644 device/mellanox/x86_64-nvidia_sn5400-r0/ACS-SN5400/sai_5400.xml
 create mode 100644 device/mellanox/x86_64-nvidia_sn5400-r0/default_sku
 create mode 100644 device/mellanox/x86_64-nvidia_sn5400-r0/pcie.yaml
 create mode 100644 device/mellanox/x86_64-nvidia_sn5400-r0/platform.json
 create mode 100644 device/mellanox/x86_64-nvidia_sn5400-r0/platform_asic
 create mode 100644 device/mellanox/x86_64-nvidia_sn5400-r0/platform_components.json
 create mode 120000 device/mellanox/x86_64-nvidia_sn5400-r0/platform_wait
 create mode 120000 device/mellanox/x86_64-nvidia_sn5400-r0/plugins/eeprom.py
 create mode 120000 device/mellanox/x86_64-nvidia_sn5400-r0/plugins/psuutil.py
 create mode 120000 device/mellanox/x86_64-nvidia_sn5400-r0/plugins/sfplpmget.py
 create mode 120000 device/mellanox/x86_64-nvidia_sn5400-r0/plugins/sfplpmset.py
 create mode 120000 device/mellanox/x86_64-nvidia_sn5400-r0/plugins/sfpreset.py
 create mode 120000 device/mellanox/x86_64-nvidia_sn5400-r0/plugins/sfputil.py
 create mode 120000 device/mellanox/x86_64-nvidia_sn5400-r0/pmon_daemon_control.json
 create mode 120000 device/mellanox/x86_64-nvidia_sn5400-r0/pre_reboot_hook
 create mode 100644 device/mellanox/x86_64-nvidia_sn5400-r0/sensors.conf
 create mode 120000 device/mellanox/x86_64-nvidia_sn5400-r0/system_health_monitoring_config.json
 create mode 120000 device/mellanox/x86_64-nvidia_sn5400-r0/thermal_policy.json
 create mode 120000 device/mellanox/x86_64-nvidia_sn5400_simx-r0/ACS-SN5400
 create mode 120000 device/mellanox/x86_64-nvidia_sn5400_simx-r0/default_sku
 create mode 100644 device/mellanox/x86_64-nvidia_sn5400_simx-r0/platform.json
 create mode 100644 device/mellanox/x86_64-nvidia_sn5400_simx-r0/platform_asic
 create mode 120000 device/mellanox/x86_64-nvidia_sn5400_simx-r0/plugins/eeprom.py
 create mode 120000 device/mellanox/x86_64-nvidia_sn5400_simx-r0/plugins/psuutil.py
 create mode 120000 device/mellanox/x86_64-nvidia_sn5400_simx-r0/plugins/sfplpmget.py
 create mode 120000 device/mellanox/x86_64-nvidia_sn5400_simx-r0/plugins/sfplpmset.py
 create mode 120000 device/mellanox/x86_64-nvidia_sn5400_simx-r0/plugins/sfpreset.py
 create mode 120000 device/mellanox/x86_64-nvidia_sn5400_simx-r0/plugins/sfputil.py
 create mode 120000 device/mellanox/x86_64-nvidia_sn5400_simx-r0/pmon_daemon_control.json
 create mode 100644 device/mellanox/x86_64-nvidia_sn5400_simx-r0/syseeprom.hex
 create mode 120000 device/mellanox/x86_64-nvidia_sn5400_simx-r0/system_health_monitoring_config.json

diff --git a/device/mellanox/x86_64-nvidia_sn5400-r0/ACS-SN5400/buffers.json.j2 b/device/mellanox/x86_64-nvidia_sn5400-r0/ACS-SN5400/buffers.json.j2
new file mode 120000
index 000000000..add8bf8bb
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5400-r0/ACS-SN5400/buffers.json.j2
@@ -0,0 +1 @@
+../../x86_64-mlnx_msn2700-r0/ACS-MSN2700/buffers.json.j2
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn5400-r0/ACS-SN5400/buffers_defaults_objects.j2 b/device/mellanox/x86_64-nvidia_sn5400-r0/ACS-SN5400/buffers_defaults_objects.j2
new file mode 120000
index 000000000..33b6704f9
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5400-r0/ACS-SN5400/buffers_defaults_objects.j2
@@ -0,0 +1 @@
+../../x86_64-mlnx_msn2700-r0/ACS-MSN2700/buffers_defaults_objects.j2
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn5400-r0/ACS-SN5400/buffers_defaults_t0.j2 b/device/mellanox/x86_64-nvidia_sn5400-r0/ACS-SN5400/buffers_defaults_t0.j2
new file mode 120000
index 000000000..febae7236
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5400-r0/ACS-SN5400/buffers_defaults_t0.j2
@@ -0,0 +1 @@
+../../x86_64-nvidia_sn5600-r0/ACS-SN5600/buffers_defaults_t0.j2
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn5400-r0/ACS-SN5400/buffers_defaults_t1.j2 b/device/mellanox/x86_64-nvidia_sn5400-r0/ACS-SN5400/buffers_defaults_t1.j2
new file mode 120000
index 000000000..25908aded
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5400-r0/ACS-SN5400/buffers_defaults_t1.j2
@@ -0,0 +1 @@
+../../x86_64-nvidia_sn5600-r0/ACS-SN5600/buffers_defaults_t1.j2
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn5400-r0/ACS-SN5400/buffers_dynamic.json.j2 b/device/mellanox/x86_64-nvidia_sn5400-r0/ACS-SN5400/buffers_dynamic.json.j2
new file mode 120000
index 000000000..8c4117c66
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5400-r0/ACS-SN5400/buffers_dynamic.json.j2
@@ -0,0 +1 @@
+../../x86_64-mlnx_msn2700-r0/ACS-MSN2700/buffers_dynamic.json.j2
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn5400-r0/ACS-SN5400/hwsku.json b/device/mellanox/x86_64-nvidia_sn5400-r0/ACS-SN5400/hwsku.json
new file mode 100644
index 000000000..abe6649e7
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5400-r0/ACS-SN5400/hwsku.json
@@ -0,0 +1,202 @@
+{
+    "interfaces": {
+        "Ethernet0": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet8": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet16": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet24": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet32": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet40": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet48": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet56": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet64": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet72": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet80": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet88": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet96": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet104": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet112": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet120": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet128": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet136": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet144": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet152": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet160": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet168": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet176": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet184": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet192": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet200": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet208": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet216": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet224": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet232": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet240": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet248": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet256": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet264": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet272": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet280": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet288": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet296": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet304": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet312": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet320": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet328": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet336": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet344": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet352": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet360": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet368": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet376": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet384": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet392": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet400": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet408": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet416": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet424": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet432": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet440": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet448": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet456": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet464": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet472": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet480": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet488": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet496": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet504": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet512": {
+            "default_brkout_mode": "1x25G[10G]"
+        },
+        "Ethernet513": {
+            "default_brkout_mode": "1x25G[10G]"
+        }
+    }
+}
diff --git a/device/mellanox/x86_64-nvidia_sn5400-r0/ACS-SN5400/pg_profile_lookup.ini b/device/mellanox/x86_64-nvidia_sn5400-r0/ACS-SN5400/pg_profile_lookup.ini
new file mode 120000
index 000000000..402daee2b
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5400-r0/ACS-SN5400/pg_profile_lookup.ini
@@ -0,0 +1 @@
+../../x86_64-nvidia_sn5600-r0/ACS-SN5600/pg_profile_lookup.ini
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn5400-r0/ACS-SN5400/port_config.ini b/device/mellanox/x86_64-nvidia_sn5400-r0/ACS-SN5400/port_config.ini
new file mode 100644
index 000000000..4b62d3abf
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5400-r0/ACS-SN5400/port_config.ini
@@ -0,0 +1,84 @@
+##
+## Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+## Apache-2.0
+##
+## Licensed under the Apache License, Version 2.0 (the "License");
+## you may not use this file except in compliance with the License.
+## You may obtain a copy of the License at
+##
+## http://www.apache.org/licenses/LICENSE-2.0
+##
+## Unless required by applicable law or agreed to in writing, software
+## distributed under the License is distributed on an "AS IS" BASIS,
+## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+## See the License for the specific language governing permissions and
+## limitations under the License.
+##
+
+# name          lanes                               alias     index
+Ethernet0       0,1,2,3,4,5,6,7                     etp1      1
+Ethernet8       8,9,10,11,12,13,14,15               etp2      2
+Ethernet16      16,17,18,19,20,21,22,23             etp3      3
+Ethernet24      24,25,26,27,28,29,30,31             etp4      4
+Ethernet32      32,33,34,35,36,37,38,39             etp5      5
+Ethernet40      40,41,42,43,44,45,46,47             etp6      6
+Ethernet48      48,49,50,51,52,53,54,55             etp7      7
+Ethernet56      56,57,58,59,60,61,62,63             etp8      8
+Ethernet64      64,65,66,67,68,69,70,71             etp9      9
+Ethernet72      72,73,74,75,76,77,78,79             etp10     10
+Ethernet80      80,81,82,83,84,85,86,87             etp11     11
+Ethernet88      88,89,90,91,92,93,94,95             etp12     12
+Ethernet96      96,97,98,99,100,101,102,103         etp13     13
+Ethernet104     104,105,106,107,108,109,110,111     etp14     14
+Ethernet112     112,113,114,115,116,117,118,119     etp15     15
+Ethernet120     120,121,122,123,124,125,126,127     etp16     16
+Ethernet128     128,129,130,131,132,133,134,135     etp17     17
+Ethernet136     136,137,138,139,140,141,142,143     etp18     18
+Ethernet144     144,145,146,147,148,149,150,151     etp19     19
+Ethernet152     152,153,154,155,156,157,158,159     etp20     20
+Ethernet160     160,161,162,163,164,165,166,167     etp21     21
+Ethernet168     168,169,170,171,172,173,174,175     etp22     22
+Ethernet176     176,177,178,179,180,181,182,183     etp23     23
+Ethernet184     184,185,186,187,188,189,190,191     etp24     24
+Ethernet192     192,193,194,195,196,197,198,199     etp25     25
+Ethernet200     200,201,202,203,204,205,206,207     etp26     26
+Ethernet208     208,209,210,211,212,213,214,215     etp27     27
+Ethernet216     216,217,218,219,220,221,222,223     etp28     28
+Ethernet224     224,225,226,227,228,229,230,231     etp29     29
+Ethernet232     232,233,234,235,236,237,238,239     etp30     30
+Ethernet240     240,241,242,243,244,245,246,247     etp31     31
+Ethernet248     248,249,250,251,252,253,254,255     etp32     32
+Ethernet256     256,257,258,259,260,261,262,263     etp33     33
+Ethernet264     264,265,266,267,268,269,270,271     etp34     34
+Ethernet272     272,273,274,275,276,277,278,279     etp35     35
+Ethernet280     280,281,282,283,284,285,286,287     etp36     36
+Ethernet288     288,289,290,291,292,293,294,295     etp37     37
+Ethernet296     296,297,298,299,300,301,302,303     etp38     38
+Ethernet304     304,305,306,307,308,309,310,311     etp39     39
+Ethernet312     312,313,314,315,316,317,318,319     etp40     40
+Ethernet320     320,321,322,323,324,325,326,327     etp41     41
+Ethernet328     328,329,330,331,332,333,334,335     etp42     42
+Ethernet336     336,337,338,339,340,341,342,343     etp43     43
+Ethernet344     344,345,346,347,348,349,350,351     etp44     44
+Ethernet352     352,353,354,355,356,357,358,359     etp45     45
+Ethernet360     360,361,362,363,364,365,366,367     etp46     46
+Ethernet368     368,369,370,371,372,373,374,375     etp47     47
+Ethernet376     376,377,378,379,380,381,382,383     etp48     48
+Ethernet384     384,385,386,387,388,389,390,391     etp49     49
+Ethernet392     392,393,394,395,396,397,398,399     etp50     50
+Ethernet400     400,401,402,403,404,405,406,407     etp51     51
+Ethernet408     408,409,410,411,412,413,414,415     etp52     52
+Ethernet416     416,417,418,419,420,421,422,423     etp53     53
+Ethernet424     424,425,426,427,428,429,430,431     etp54     54
+Ethernet432     432,433,434,435,436,437,438,439     etp55     55
+Ethernet440     440,441,442,443,444,445,446,447     etp56     56
+Ethernet448     448,449,450,451,452,453,454,455     etp57     57
+Ethernet456     456,457,458,459,460,461,462,463     etp58     58
+Ethernet464     464,465,466,467,468,469,470,471     etp59     59
+Ethernet472     472,473,474,475,476,477,478,479     etp60     60
+Ethernet480     480,481,482,483,484,485,486,487     etp61     61
+Ethernet488     488,489,490,491,492,493,494,495     etp62     62
+Ethernet496     496,497,498,499,500,501,502,503     etp63     63
+Ethernet504     504,505,506,507,508,509,510,511     etp64     64
+Ethernet512     512                                 etp65     65
+Ethernet513     513                                 etp66     66
diff --git a/device/mellanox/x86_64-nvidia_sn5400-r0/ACS-SN5400/qos.json.j2 b/device/mellanox/x86_64-nvidia_sn5400-r0/ACS-SN5400/qos.json.j2
new file mode 120000
index 000000000..eccf286dc
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5400-r0/ACS-SN5400/qos.json.j2
@@ -0,0 +1 @@
+../../x86_64-mlnx_msn2700-r0/ACS-MSN2700/qos.json.j2
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn5400-r0/ACS-SN5400/sai.profile b/device/mellanox/x86_64-nvidia_sn5400-r0/ACS-SN5400/sai.profile
new file mode 100644
index 000000000..e9809c749
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5400-r0/ACS-SN5400/sai.profile
@@ -0,0 +1 @@
+SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_5400.xml
diff --git a/device/mellanox/x86_64-nvidia_sn5400-r0/ACS-SN5400/sai_5400.xml b/device/mellanox/x86_64-nvidia_sn5400-r0/ACS-SN5400/sai_5400.xml
new file mode 100644
index 000000000..6f9b54171
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5400-r0/ACS-SN5400/sai_5400.xml
@@ -0,0 +1,503 @@
+<?xml version="1.0"?>
+<!--
+  Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+  Apache-2.0
+
+  Licensed under the Apache License, Version 2.0 (the "License");
+  you may not use this file except in compliance with the License.
+  You may obtain a copy of the License at
+
+  http://www.apache.org/licenses/LICENSE-2.0
+
+  Unless required by applicable law or agreed to in writing, software
+  distributed under the License is distributed on an "AS IS" BASIS,
+  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+  See the License for the specific language governing permissions and
+  limitations under the License.
+-->
+<root>
+    <platform_info type="5400">
+
+        <!-- Device MAC address  -->
+        <device-mac-address>00:02:03:04:05:00</device-mac-address>
+
+        <!-- ISSU enabled -->
+        <issu-enabled>1</issu-enabled>
+
+        <!-- Number of ports in the following port list -->
+        <number-of-physical-ports>66</number-of-physical-ports>
+
+        <!-- Global port late create -->
+        <late-create-all-ports>1</late-create-all-ports>
+
+        <!-- List of ports in the device -->
+        <ports-list>
+            <port-info>
+                <local-port>1</local-port>
+                <width>8</width>
+                <module>34</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>32768</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>5</local-port>
+                <width>8</width>
+                <module>35</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>32768</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>9</local-port>
+                <width>8</width>
+                <module>33</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>32768</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>13</local-port>
+                <width>8</width>
+                <module>32</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>32768</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>17</local-port>
+                <width>8</width>
+                <module>38</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>32768</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>21</local-port>
+                <width>8</width>
+                <module>39</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>32768</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>25</local-port>
+                <width>8</width>
+                <module>37</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>32768</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>29</local-port>
+                <width>8</width>
+                <module>36</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>32768</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>33</local-port>
+                <width>8</width>
+                <module>43</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>32768</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>37</local-port>
+                <width>8</width>
+                <module>42</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>32768</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>41</local-port>
+                <width>8</width>
+                <module>41</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>32768</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>45</local-port>
+                <width>8</width>
+                <module>40</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>32768</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>49</local-port>
+                <width>8</width>
+                <module>46</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>32768</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>53</local-port>
+                <width>8</width>
+                <module>47</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>32768</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>57</local-port>
+                <width>8</width>
+                <module>45</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>32768</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>61</local-port>
+                <width>8</width>
+                <module>44</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>32768</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>65</local-port>
+                <width>8</width>
+                <module>51</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>32768</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>69</local-port>
+                <width>8</width>
+                <module>50</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>32768</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>73</local-port>
+                <width>8</width>
+                <module>48</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>32768</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>77</local-port>
+                <width>8</width>
+                <module>49</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>32768</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>81</local-port>
+                <width>8</width>
+                <module>55</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>32768</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>85</local-port>
+                <width>8</width>
+                <module>54</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>32768</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>89</local-port>
+                <width>8</width>
+                <module>53</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>32768</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>93</local-port>
+                <width>8</width>
+                <module>52</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>32768</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>97</local-port>
+                <width>8</width>
+                <module>59</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>32768</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>101</local-port>
+                <width>8</width>
+                <module>58</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>32768</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>105</local-port>
+                <width>8</width>
+                <module>56</module>
+                <!-- 0 none, 1=2, 2=4, 3=2,4, 4=8, 7=2,4,8 -->
+                <breakout-modes>3</breakout-modes>
+                <!-- (BITMASK) 2 - 1Gb , 16 - 10Gb , 32 - 40Gb , 384 - 50Gb , 1536 - 100Gb , 4096 - 200Gb, 32768 - 400G, 262144 - 800G -->
+                <port-speed>32768</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>109</local-port>
+                <width>8</width>
+                <module>57</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>32768</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>113</local-port>
+                <width>8</width>
+                <module>63</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>32768</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>117</local-port>
+                <width>8</width>
+                <module>62</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>32768</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>121</local-port>
+                <width>8</width>
+                <module>60</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>32768</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>125</local-port>
+                <width>8</width>
+                <module>61</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>32768</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>129</local-port>
+                <width>8</width>
+                <module>29</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>32768</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>133</local-port>
+                <width>8</width>
+                <module>28</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>32768</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>137</local-port>
+                <width>8</width>
+                <module>30</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>32768</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>141</local-port>
+                <width>8</width>
+                <module>31</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>32768</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>145</local-port>
+                <width>8</width>
+                <module>25</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>32768</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>149</local-port>
+                <width>8</width>
+                <module>24</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>32768</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>153</local-port>
+                <width>8</width>
+                <module>26</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>32768</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>157</local-port>
+                <width>8</width>
+                <module>27</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>32768</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>161</local-port>
+                <width>8</width>
+                <module>20</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>32768</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>165</local-port>
+                <width>8</width>
+                <module>21</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>32768</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>169</local-port>
+                <width>8</width>
+                <module>22</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>32768</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>173</local-port>
+                <width>8</width>
+                <module>23</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>32768</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>177</local-port>
+                <width>8</width>
+                <module>17</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>32768</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>181</local-port>
+                <width>8</width>
+                <module>16</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>32768</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>185</local-port>
+                <width>8</width>
+                <module>18</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>32768</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>189</local-port>
+                <width>8</width>
+                <module>19</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>32768</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>193</local-port>
+                <width>8</width>
+                <module>12</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>32768</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>197</local-port>
+                <width>8</width>
+                <module>13</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>32768</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>201</local-port>
+                <width>8</width>
+                <module>15</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>32768</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>205</local-port>
+                <width>8</width>
+                <module>14</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>32768</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>209</local-port>
+                <width>8</width>
+                <module>8</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>32768</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>213</local-port>
+                <width>8</width>
+                <module>9</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>32768</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>217</local-port>
+                <width>8</width>
+                <module>10</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>32768</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>221</local-port>
+                <width>8</width>
+                <module>11</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>32768</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>225</local-port>
+                <width>8</width>
+                <module>4</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>32768</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>229</local-port>
+                <width>8</width>
+                <module>5</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>32768</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>233</local-port>
+                <width>8</width>
+                <module>7</module>
+                <!-- 0 none, 1=2, 2=4, 3=2,4, 4=8, 7=2,4,8 -->
+                <breakout-modes>3</breakout-modes>
+                <!-- (BITMASK) 2 - 1Gb , 16 - 10Gb , 32 - 40Gb , 384 - 50Gb , 1536 - 100Gb , 4096 - 200Gb -->
+                <port-speed>32768</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>237</local-port>
+                <width>8</width>
+                <module>6</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>32768</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>241</local-port>
+                <width>8</width>
+                <module>0</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>32768</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>245</local-port>
+                <width>8</width>
+                <module>1</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>32768</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>249</local-port>
+                <width>8</width>
+                <module>3</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>32768</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>253</local-port>
+                <width>8</width>
+                <module>2</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>32768</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>257</local-port>
+                <width>1</width>
+                <module>64</module>
+                <breakout-modes>0</breakout-modes>
+                <port-speed>64</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>258</local-port>
+                <width>1</width>
+                <module>65</module>
+                <breakout-modes>0</breakout-modes>
+                <port-speed>64</port-speed>
+            </port-info>
+        </ports-list>
+    </platform_info>
+</root>
diff --git a/device/mellanox/x86_64-nvidia_sn5400-r0/default_sku b/device/mellanox/x86_64-nvidia_sn5400-r0/default_sku
new file mode 100644
index 000000000..d4c02b674
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5400-r0/default_sku
@@ -0,0 +1 @@
+ACS-SN5400 t1
diff --git a/device/mellanox/x86_64-nvidia_sn5400-r0/pcie.yaml b/device/mellanox/x86_64-nvidia_sn5400-r0/pcie.yaml
new file mode 100644
index 000000000..7c08d0aa1
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5400-r0/pcie.yaml
@@ -0,0 +1,145 @@
+##
+## Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+## Apache-2.0
+##
+## Licensed under the Apache License, Version 2.0 (the "License");
+## you may not use this file except in compliance with the License.
+## You may obtain a copy of the License at
+##
+## http://www.apache.org/licenses/LICENSE-2.0
+##
+## Unless required by applicable law or agreed to in writing, software
+## distributed under the License is distributed on an "AS IS" BASIS,
+## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+## See the License for the specific language governing permissions and
+## limitations under the License.
+##
+
+- bus: '00'
+  dev: '00'
+  fn: '0'
+  id: 3ec4
+  name: 'Host bridge: Intel Corporation 8th Gen Core Processor Host Bridge/DRAM Registers
+    (rev 07)'
+- bus: '00'
+  dev: '01'
+  fn: '0'
+  id: '1901'
+  name: 'PCI bridge: Intel Corporation 6th-10th Gen Core Processor PCIe Controller
+    (x16) (rev 07)'
+- bus: '00'
+  dev: '01'
+  fn: '1'
+  id: '1905'
+  name: 'PCI bridge: Intel Corporation Xeon E3-1200 v5/E3-1500 v5/6th Gen Core Processor
+    PCIe Controller (x8) (rev 07)'
+- bus: '00'
+  dev: 08
+  fn: '0'
+  id: '1911'
+  name: 'System peripheral: Intel Corporation Xeon E3-1200 v5/v6 / E3-1500 v5 / 6th/7th/8th
+    Gen Core Processor Gaussian Mixture Model'
+- bus: '00'
+  dev: '12'
+  fn: '0'
+  id: a379
+  name: 'Signal processing controller: Intel Corporation Cannon Lake PCH Thermal Controller
+    (rev 10)'
+- bus: '00'
+  dev: '14'
+  fn: '0'
+  id: a36d
+  name: 'USB controller: Intel Corporation Cannon Lake PCH USB 3.1 xHCI Host Controller
+    (rev 10)'
+- bus: '00'
+  dev: '14'
+  fn: '2'
+  id: a36f
+  name: 'RAM memory: Intel Corporation Cannon Lake PCH Shared SRAM (rev 10)'
+- bus: '00'
+  dev: '15'
+  fn: '0'
+  id: a368
+  name: 'Serial bus controller [0c80]: Intel Corporation Cannon Lake PCH Serial IO
+    I2C Controller #0 (rev 10)'
+- bus: '00'
+  dev: '16'
+  fn: '0'
+  id: a360
+  name: 'Communication controller: Intel Corporation Cannon Lake PCH HECI Controller
+    (rev 10)'
+- bus: '00'
+  dev: '17'
+  fn: '0'
+  id: a353
+  name: 'SATA controller: Intel Corporation Cannon Lake Mobile PCH SATA AHCI Controller
+    (rev 10)'
+- bus: '00'
+  dev: 1b
+  fn: '0'
+  id: a340
+  name: 'PCI bridge: Intel Corporation Cannon Lake PCH PCI Express Root Port #17 (rev
+    f0)'
+- bus: '00'
+  dev: 1b
+  fn: '4'
+  id: a32c
+  name: 'PCI bridge: Intel Corporation Cannon Lake PCH PCI Express Root Port #21 (rev
+    f0)'
+- bus: '00'
+  dev: 1c
+  fn: '0'
+  id: a33d
+  name: 'PCI bridge: Intel Corporation Cannon Lake PCH PCI Express Root Port #6 (rev
+    f0)'
+- bus: '00'
+  dev: 1c
+  fn: '6'
+  id: a33e
+  name: 'PCI bridge: Intel Corporation Cannon Lake PCH PCI Express Root Port #7 (rev
+    f0)'
+- bus: '00'
+  dev: 1c
+  fn: '7'
+  id: a33f
+  name: 'PCI bridge: Intel Corporation Cannon Lake PCH PCI Express Root Port #8 (rev
+    f0)'
+- bus: '00'
+  dev: 1d
+  fn: '0'
+  id: a334
+  name: 'PCI bridge: Intel Corporation Cannon Lake PCH PCI Express Root Port #13 (rev
+    f0)'
+- bus: '00'
+  dev: 1e
+  fn: '0'
+  id: a328
+  name: 'Communication controller: Intel Corporation Cannon Lake PCH Serial IO UART
+    Host Controller (rev 10)'
+- bus: '00'
+  dev: 1f
+  fn: '0'
+  id: a30e
+  name: 'ISA bridge: Intel Corporation Cannon Lake LPC Controller (rev 10)'
+- bus: '00'
+  dev: 1f
+  fn: '4'
+  id: a323
+  name: 'SMBus: Intel Corporation Cannon Lake PCH SMBus Controller (rev 10)'
+- bus: '00'
+  dev: 1f
+  fn: '5'
+  id: a324
+  name: 'Serial bus controller [0c80]: Intel Corporation Cannon Lake PCH SPI Controller
+    (rev 10)'
+- bus: '00'
+  dev: 1f
+  fn: '6'
+  id: 15bb
+  name: 'Ethernet controller: Intel Corporation Ethernet Connection (7) I219-LM (rev
+    10)'
+- bus: '01'
+  dev: '00'
+  fn: '0'
+  id: cf80
+  name: 'Ethernet controller: Mellanox Technologies Spectrum-4'
diff --git a/device/mellanox/x86_64-nvidia_sn5400-r0/platform.json b/device/mellanox/x86_64-nvidia_sn5400-r0/platform.json
new file mode 100644
index 000000000..274a12d0c
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5400-r0/platform.json
@@ -0,0 +1,1333 @@
+{
+    "chassis": {
+        "name": "SN5400",
+        "components": [
+            {
+                "name": "ONIE"
+            },
+            {
+                "name": "SSD"
+            },
+            {
+                "name": "BIOS"
+            },
+            {
+                "name": "CPLD1"
+            },
+            {
+                "name": "CPLD2"
+            },
+            {
+                "name": "CPLD3"
+            },
+            {
+                "name": "CPLD4"
+            },
+            {
+                "name": "CPLD5"
+            }
+        ],
+        "fans": [],
+        "fan_drawers": [
+            {
+                "name": "drawer1",
+                "fans": [
+                    {
+                        "name": "fan1"
+                    },
+                    {
+                        "name": "fan2"
+                    }
+                ]
+            },
+            {
+                "name": "drawer2",
+                "fans": [
+                    {
+                        "name": "fan3"
+                    },
+                    {
+                        "name": "fan4"
+                    }
+                ]
+            },
+            {
+                "name": "drawer3",
+                "fans": [
+                    {
+                        "name": "fan5"
+                    },
+                    {
+                        "name": "fan6"
+                    }
+                ]
+            },
+            {
+                "name": "drawer4",
+                "fans": [
+                    {
+                        "name": "fan7"
+                    },
+                    {
+                        "name": "fan8"
+                    }
+                ]
+            }
+        ],
+        "psus": [
+            {
+                "name": "PSU 1",
+                "fans": [
+                    {
+                        "name": "psu1_fan1"
+                    }
+                ],
+                "thermals": [
+                    {
+                        "name": "PSU-1 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "PSU 2",
+                "fans": [
+                    {
+                        "name": "psu2_fan1"
+                    }
+                ],
+                "thermals": [
+                    {
+                        "name": "PSU-2 Temp"
+                    }
+                ]
+            }
+        ],
+        "thermals": [
+            {
+                "name": "ASIC"
+            },
+            {
+                "name": "Ambient Fan Side Temp"
+            },
+            {
+                "name": "Ambient Port Side Temp"
+            },
+            {
+                "name": "CPU Core 0 Temp"
+            },
+            {
+                "name": "CPU Core 1 Temp"
+            },
+            {
+                "name": "CPU Core 2 Temp"
+            },
+            {
+                "name": "CPU Core 3 Temp"
+            },
+            {
+                "name": "CPU Core 4 Temp"
+            },
+            {
+                "name": "CPU Core 5 Temp"
+            },
+            {
+                "name": "CPU Pack Temp"
+            },
+            {
+                "name": "SODIMM 1 Temp"
+            },
+            {
+                "name": "SODIMM 2 Temp"
+            },
+            {
+                "name": "PCH Temp"
+            }
+        ],
+        "sfps": [
+            {
+                "name": "sfp1",
+                "thermals": [
+                    {
+                        "name": "xSFP module 1 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp2",
+                "thermals": [
+                    {
+                        "name": "xSFP module 2 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp3",
+                "thermals": [
+                    {
+                        "name": "xSFP module 3 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp4",
+                "thermals": [
+                    {
+                        "name": "xSFP module 4 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp5",
+                "thermals": [
+                    {
+                        "name": "xSFP module 5 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp6",
+                "thermals": [
+                    {
+                        "name": "xSFP module 6 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp7",
+                "thermals": [
+                    {
+                        "name": "xSFP module 7 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp8",
+                "thermals": [
+                    {
+                        "name": "xSFP module 8 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp9",
+                "thermals": [
+                    {
+                        "name": "xSFP module 9 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp10",
+                "thermals": [
+                    {
+                        "name": "xSFP module 10 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp11",
+                "thermals": [
+                    {
+                        "name": "xSFP module 11 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp12",
+                "thermals": [
+                    {
+                        "name": "xSFP module 12 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp13",
+                "thermals": [
+                    {
+                        "name": "xSFP module 13 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp14",
+                "thermals": [
+                    {
+                        "name": "xSFP module 14 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp15",
+                "thermals": [
+                    {
+                        "name": "xSFP module 15 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp16",
+                "thermals": [
+                    {
+                        "name": "xSFP module 16 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp17",
+                "thermals": [
+                    {
+                        "name": "xSFP module 17 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp18",
+                "thermals": [
+                    {
+                        "name": "xSFP module 18 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp19",
+                "thermals": [
+                    {
+                        "name": "xSFP module 19 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp20",
+                "thermals": [
+                    {
+                        "name": "xSFP module 20 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp21",
+                "thermals": [
+                    {
+                        "name": "xSFP module 21 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp22",
+                "thermals": [
+                    {
+                        "name": "xSFP module 22 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp23",
+                "thermals": [
+                    {
+                        "name": "xSFP module 23 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp24",
+                "thermals": [
+                    {
+                        "name": "xSFP module 24 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp25",
+                "thermals": [
+                    {
+                        "name": "xSFP module 25 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp26",
+                "thermals": [
+                    {
+                        "name": "xSFP module 26 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp27",
+                "thermals": [
+                    {
+                        "name": "xSFP module 27 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp28",
+                "thermals": [
+                    {
+                        "name": "xSFP module 28 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp29",
+                "thermals": [
+                    {
+                        "name": "xSFP module 29 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp30",
+                "thermals": [
+                    {
+                        "name": "xSFP module 30 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp31",
+                "thermals": [
+                    {
+                        "name": "xSFP module 31 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp32",
+                "thermals": [
+                    {
+                        "name": "xSFP module 32 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp33",
+                "thermals": [
+                    {
+                        "name": "xSFP module 33 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp34",
+                "thermals": [
+                    {
+                        "name": "xSFP module 34 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp35",
+                "thermals": [
+                    {
+                        "name": "xSFP module 35 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp36",
+                "thermals": [
+                    {
+                        "name": "xSFP module 36 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp37",
+                "thermals": [
+                    {
+                        "name": "xSFP module 37 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp38",
+                "thermals": [
+                    {
+                        "name": "xSFP module 38 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp39",
+                "thermals": [
+                    {
+                        "name": "xSFP module 39 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp40",
+                "thermals": [
+                    {
+                        "name": "xSFP module 40 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp41",
+                "thermals": [
+                    {
+                        "name": "xSFP module 41 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp42",
+                "thermals": [
+                    {
+                        "name": "xSFP module 42 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp43",
+                "thermals": [
+                    {
+                        "name": "xSFP module 43 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp44",
+                "thermals": [
+                    {
+                        "name": "xSFP module 44 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp45",
+                "thermals": [
+                    {
+                        "name": "xSFP module 45 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp46",
+                "thermals": [
+                    {
+                        "name": "xSFP module 46 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp47",
+                "thermals": [
+                    {
+                        "name": "xSFP module 47 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp48",
+                "thermals": [
+                    {
+                        "name": "xSFP module 48 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp49",
+                "thermals": [
+                    {
+                        "name": "xSFP module 49 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp50",
+                "thermals": [
+                    {
+                        "name": "xSFP module 50 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp51",
+                "thermals": [
+                    {
+                        "name": "xSFP module 51 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp52",
+                "thermals": [
+                    {
+                        "name": "xSFP module 52 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp53",
+                "thermals": [
+                    {
+                        "name": "xSFP module 53 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp54",
+                "thermals": [
+                    {
+                        "name": "xSFP module 54 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp55",
+                "thermals": [
+                    {
+                        "name": "xSFP module 55 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp56",
+                "thermals": [
+                    {
+                        "name": "xSFP module 56 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp57",
+                "thermals": [
+                    {
+                        "name": "xSFP module 57 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp58",
+                "thermals": [
+                    {
+                        "name": "xSFP module 58 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp59",
+                "thermals": [
+                    {
+                        "name": "xSFP module 59 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp60",
+                "thermals": [
+                    {
+                        "name": "xSFP module 60 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp61",
+                "thermals": [
+                    {
+                        "name": "xSFP module 61 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp62",
+                "thermals": [
+                    {
+                        "name": "xSFP module 62 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp63",
+                "thermals": [
+                    {
+                        "name": "xSFP module 63 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp64",
+                "thermals": [
+                    {
+                        "name": "xSFP module 64 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp65",
+                "thermals": [
+                    {
+                        "name": "xSFP module 65 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp66",
+                "thermals": [
+                    {
+                        "name": "xSFP module 66 Temp"
+                    }
+                ]
+            }
+        ]
+    },
+    "interfaces": {
+        "Ethernet0": {
+            "index": "1,1,1,1,1,1,1,1",
+            "lanes": "0,1,2,3,4,5,6,7",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp1"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp1a", "etp1b"],
+                "4x100G[50G,25G,10G]": ["etp1a", "etp1b", "etp1c", "etp1d"],
+                "8x50G[25G,10G]": ["etp1a", "etp1b", "etp1c", "etp1d", "etp1e", "etp1f", "etp1g", "etp1h"]
+            }
+        },
+        "Ethernet8": {
+            "index": "2,2,2,2,2,2,2,2",
+            "lanes": "8,9,10,11,12,13,14,15",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp2"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp2a", "etp2b"],
+                "4x100G[50G,25G,10G]": ["etp2a", "etp2b", "etp2c", "etp2d"],
+                "8x50G[25G,10G]": ["etp2a", "etp2b", "etp2c", "etp2d", "etp2e", "etp2f", "etp2g", "etp2h"]
+            }
+        },
+        "Ethernet16": {
+            "index": "3,3,3,3,3,3,3,3",
+            "lanes": "16,17,18,19,20,21,22,23",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp3"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp3a", "etp3b"],
+                "4x100G[50G,25G,10G]": ["etp3a", "etp3b", "etp3c", "etp3d"],
+                "8x50G[25G,10G]": ["etp3a", "etp3b", "etp3c", "etp3d", "etp3e", "etp3f", "etp3g", "etp3h"]
+            }
+        },
+        "Ethernet24": {
+            "index": "4,4,4,4,4,4,4,4",
+            "lanes": "24,25,26,27,28,29,30,31",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp4"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp4a", "etp4b"],
+                "4x100G[50G,25G,10G]": ["etp4a", "etp4b", "etp4c", "etp4d"],
+                "8x50G[25G,10G]": ["etp4a", "etp4b", "etp4c", "etp4d", "etp4e", "etp4f", "etp4g", "etp4h"]
+            }
+        },
+        "Ethernet32": {
+            "index": "5,5,5,5,5,5,5,5",
+            "lanes": "32,33,34,35,36,37,38,39",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp5"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp5a", "etp5b"],
+                "4x100G[50G,25G,10G]": ["etp5a", "etp5b", "etp5c", "etp5d"],
+                "8x50G[25G,10G]": ["etp5a", "etp5b", "etp5c", "etp5d", "etp5e", "etp5f", "etp5g", "etp5h"]
+            }
+        },
+        "Ethernet40": {
+            "index": "6,6,6,6,6,6,6,6",
+            "lanes": "40,41,42,43,44,45,46,47",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp6"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp6a", "etp6b"],
+                "4x100G[50G,25G,10G]": ["etp6a", "etp6b", "etp6c", "etp6d"],
+                "8x50G[25G,10G]": ["etp6a", "etp6b", "etp6c", "etp6d", "etp6e", "etp6f", "etp6g", "etp6h"]
+            }
+        },
+        "Ethernet48": {
+            "index": "7,7,7,7,7,7,7,7",
+            "lanes": "48,49,50,51,52,53,54,55",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp7"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp7a", "etp7b"],
+                "4x100G[50G,25G,10G]": ["etp7a", "etp7b", "etp7c", "etp7d"],
+                "8x50G[25G,10G]": ["etp7a", "etp7b", "etp7c", "etp7d", "etp7e", "etp7f", "etp7g", "etp7h"]
+            }
+        },
+        "Ethernet56": {
+            "index": "8,8,8,8,8,8,8,8",
+            "lanes": "56,57,58,59,60,61,62,63",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp8"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp8a", "etp8b"],
+                "4x100G[50G,25G,10G]": ["etp8a", "etp8b", "etp8c", "etp8d"],
+                "8x50G[25G,10G]": ["etp8a", "etp8b", "etp8c", "etp8d", "etp8e", "etp8f", "etp8g", "etp8h"]
+            }
+        },
+        "Ethernet64": {
+            "index": "9,9,9,9,9,9,9,9",
+            "lanes": "64,65,66,67,68,69,70,71",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp9"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp9a", "etp9b"],
+                "4x100G[50G,25G,10G]": ["etp9a", "etp9b", "etp9c", "etp9d"],
+                "8x50G[25G,10G]": ["etp9a", "etp9b", "etp9c", "etp9d", "etp9e", "etp9f", "etp9g", "etp9h"]
+            }
+        },
+        "Ethernet72": {
+            "index": "10,10,10,10,10,10,10,10",
+            "lanes": "72,73,74,75,76,77,78,79",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp10"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp10a", "etp10b"],
+                "4x100G[50G,25G,10G]": ["etp10a", "etp10b", "etp10c", "etp10d"],
+                "8x50G[25G,10G]": ["etp10a", "etp10b", "etp10c", "etp10d", "etp10e", "etp10f", "etp10g", "etp10h"]
+            }
+        },
+        "Ethernet80": {
+            "index": "11,11,11,11,11,11,11,11",
+            "lanes": "80,81,82,83,84,85,86,87",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp11"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp11a", "etp11b"],
+                "4x100G[50G,25G,10G]": ["etp11a", "etp11b", "etp11c", "etp11d"],
+                "8x50G[25G,10G]": ["etp11a", "etp11b", "etp11c", "etp11d", "etp11e", "etp11f", "etp11g", "etp11h"]
+            }
+        },
+        "Ethernet88": {
+            "index": "12,12,12,12,12,12,12,12",
+            "lanes": "88,89,90,91,92,93,94,95",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp12"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp12a", "etp12b"],
+                "4x100G[50G,25G,10G]": ["etp12a", "etp12b", "etp12c", "etp12d"],
+                "8x50G[25G,10G]": ["etp12a", "etp12b", "etp12c", "etp12d", "etp12e", "etp12f", "etp12g", "etp12h"]
+            }
+        },
+        "Ethernet96": {
+            "index": "13,13,13,13,13,13,13,13",
+            "lanes": "96,97,98,99,100,101,102,103",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp13"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp13a", "etp13b"],
+                "4x100G[50G,25G,10G]": ["etp13a", "etp13b", "etp13c", "etp13d"],
+                "8x50G[25G,10G]": ["etp13a", "etp13b", "etp13c", "etp13d", "etp13e", "etp13f", "etp13g", "etp13h"]
+            }
+        },
+        "Ethernet104": {
+            "index": "14,14,14,14,14,14,14,14",
+            "lanes": "104,105,106,107,108,109,110,111",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp14"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp14a", "etp14b"],
+                "4x100G[50G,25G,10G]": ["etp14a", "etp14b", "etp14c", "etp14d"],
+                "8x50G[25G,10G]": ["etp14a", "etp14b", "etp14c", "etp14d", "etp14e", "etp14f", "etp14g", "etp14h"]
+            }
+        },
+        "Ethernet112": {
+            "index": "15,15,15,15,15,15,15,15",
+            "lanes": "112,113,114,115,116,117,118,119",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp15"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp15a", "etp15b"],
+                "4x100G[50G,25G,10G]": ["etp15a", "etp15b", "etp15c", "etp15d"],
+                "8x50G[25G,10G]": ["etp15a", "etp15b", "etp15c", "etp15d", "etp15e", "etp15f", "etp15g", "etp15h"]
+            }
+        },
+        "Ethernet120": {
+            "index": "16,16,16,16,16,16,16,16",
+            "lanes": "120,121,122,123,124,125,126,127",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp16"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp16a", "etp16b"],
+                "4x100G[50G,25G,10G]": ["etp16a", "etp16b", "etp16c", "etp16d"],
+                "8x50G[25G,10G]": ["etp16a", "etp16b", "etp16c", "etp16d", "etp16e", "etp16f", "etp16g", "etp16h"]
+            }
+        },
+        "Ethernet128": {
+            "index": "17,17,17,17,17,17,17,17",
+            "lanes": "128,129,130,131,132,133,134,135",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp17"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp17a", "etp17b"],
+                "4x100G[50G,25G,10G]": ["etp17a", "etp17b", "etp17c", "etp17d"],
+                "8x50G[25G,10G]": ["etp17a", "etp17b", "etp17c", "etp17d", "etp17e", "etp17f", "etp17g", "etp17h"]
+            }
+        },
+        "Ethernet136": {
+            "index": "18,18,18,18,18,18,18,18",
+            "lanes": "136,137,138,139,140,141,142,143",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp18"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp18a", "etp18b"],
+                "4x100G[50G,25G,10G]": ["etp18a", "etp18b", "etp18c", "etp18d"],
+                "8x50G[25G,10G]": ["etp18a", "etp18b", "etp18c", "etp18d", "etp18e", "etp18f", "etp18g", "etp18h"]
+            }
+        },
+        "Ethernet144": {
+            "index": "19,19,19,19,19,19,19,19",
+            "lanes": "144,145,146,147,148,149,150,151",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp19"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp19a", "etp19b"],
+                "4x100G[50G,25G,10G]": ["etp19a", "etp19b", "etp19c", "etp19d"],
+                "8x50G[25G,10G]": ["etp19a", "etp19b", "etp19c", "etp19d", "etp19e", "etp19f", "etp19g", "etp19h"]
+            }
+        },
+        "Ethernet152": {
+            "index": "20,20,20,20,20,20,20,20",
+            "lanes": "152,153,154,155,156,157,158,159",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp20"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp20a", "etp20b"],
+                "4x100G[50G,25G,10G]": ["etp20a", "etp20b", "etp20c", "etp20d"],
+                "8x50G[25G,10G]": ["etp20a", "etp20b", "etp20c", "etp20d", "etp20e", "etp20f", "etp20g", "etp20h"]
+            }
+        },
+        "Ethernet160": {
+            "index": "21,21,21,21,21,21,21,21",
+            "lanes": "160,161,162,163,164,165,166,167",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp21"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp21a", "etp21b"],
+                "4x100G[50G,25G,10G]": ["etp21a", "etp21b", "etp21c", "etp21d"],
+                "8x50G[25G,10G]": ["etp21a", "etp21b", "etp21c", "etp21d", "etp21e", "etp21f", "etp21g", "etp21h"]
+            }
+        },
+        "Ethernet168": {
+            "index": "22,22,22,22,22,22,22,22",
+            "lanes": "168,169,170,171,172,173,174,175",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp22"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp22a", "etp22b"],
+                "4x100G[50G,25G,10G]": ["etp22a", "etp22b", "etp22c", "etp22d"],
+                "8x50G[25G,10G]": ["etp22a", "etp22b", "etp22c", "etp22d", "etp22e", "etp22f", "etp22g", "etp22h"]
+            }
+        },
+        "Ethernet176": {
+            "index": "23,23,23,23,23,23,23,23",
+            "lanes": "176,177,178,179,180,181,182,183",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp23"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp23a", "etp23b"],
+                "4x100G[50G,25G,10G]": ["etp23a", "etp23b", "etp23c", "etp23d"],
+                "8x50G[25G,10G]": ["etp23a", "etp23b", "etp23c", "etp23d", "etp23e", "etp23f", "etp23g", "etp23h"]
+            }
+        },
+        "Ethernet184": {
+            "index": "24,24,24,24,24,24,24,24",
+            "lanes": "184,185,186,187,188,189,190,191",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp24"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp24a", "etp24b"],
+                "4x100G[50G,25G,10G]": ["etp24a", "etp24b", "etp24c", "etp24d"],
+                "8x50G[25G,10G]": ["etp24a", "etp24b", "etp24c", "etp24d", "etp24e", "etp24f", "etp24g", "etp24h"]
+            }
+        },
+        "Ethernet192": {
+            "index": "25,25,25,25,25,25,25,25",
+            "lanes": "192,193,194,195,196,197,198,199",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp25"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp25a", "etp25b"],
+                "4x100G[50G,25G,10G]": ["etp25a", "etp25b", "etp25c", "etp25d"],
+                "8x50G[25G,10G]": ["etp25a", "etp25b", "etp25c", "etp25d", "etp25e", "etp25f", "etp25g", "etp25h"]
+            }
+        },
+        "Ethernet200": {
+            "index": "26,26,26,26,26,26,26,26",
+            "lanes": "200,201,202,203,204,205,206,207",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp26"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp26a", "etp26b"],
+                "4x100G[50G,25G,10G]": ["etp26a", "etp26b", "etp26c", "etp26d"],
+                "8x50G[25G,10G]": ["etp26a", "etp26b", "etp26c", "etp26d", "etp26e", "etp26f", "etp26g", "etp26h"]
+            }
+        },
+        "Ethernet208": {
+            "index": "27,27,27,27,27,27,27,27",
+            "lanes": "208,209,210,211,212,213,214,215",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp27"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp27a", "etp27b"],
+                "4x100G[50G,25G,10G]": ["etp27a", "etp27b", "etp27c", "etp27d"],
+                "8x50G[25G,10G]": ["etp27a", "etp27b", "etp27c", "etp27d", "etp27e", "etp27f", "etp27g", "etp27h"]
+            }
+        },
+        "Ethernet216": {
+            "index": "28,28,28,28,28,28,28,28",
+            "lanes": "216,217,218,219,220,221,222,223",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp28"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp28a", "etp28b"],
+                "4x100G[50G,25G,10G]": ["etp28a", "etp28b", "etp28c", "etp28d"],
+                "8x50G[25G,10G]": ["etp28a", "etp28b", "etp28c", "etp28d", "etp28e", "etp28f", "etp28g", "etp28h"]
+            }
+        },
+        "Ethernet224": {
+            "index": "29,29,29,29,29,29,29,29",
+            "lanes": "224,225,226,227,228,229,230,231",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp29"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp29a", "etp29b"],
+                "4x100G[50G,25G,10G]": ["etp29a", "etp29b", "etp29c", "etp29d"],
+                "8x50G[25G,10G]": ["etp29a", "etp29b", "etp29c", "etp29d", "etp29e", "etp29f", "etp29g", "etp29h"]
+            }
+        },
+        "Ethernet232": {
+            "index": "30,30,30,30,30,30,30,30",
+            "lanes": "232,233,234,235,236,237,238,239",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp30"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp30a", "etp30b"],
+                "4x100G[50G,25G,10G]": ["etp30a", "etp30b", "etp30c", "etp30d"],
+                "8x50G[25G,10G]": ["etp30a", "etp30b", "etp30c", "etp30d", "etp30e", "etp30f", "etp30g", "etp30h"]
+            }
+        },
+        "Ethernet240": {
+            "index": "31,31,31,31,31,31,31,31",
+            "lanes": "240,241,242,243,244,245,246,247",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp31"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp31a", "etp31b"],
+                "4x100G[50G,25G,10G]": ["etp31a", "etp31b", "etp31c", "etp31d"],
+                "8x50G[25G,10G]": ["etp31a", "etp31b", "etp31c", "etp31d", "etp31e", "etp31f", "etp31g", "etp31h"]
+            }
+        },
+        "Ethernet248": {
+            "index": "32,32,32,32,32,32,32,32",
+            "lanes": "248,249,250,251,252,253,254,255",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp32"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp32a", "etp32b"],
+                "4x100G[50G,25G,10G]": ["etp32a", "etp32b", "etp32c", "etp32d"],
+                "8x50G[25G,10G]": ["etp32a", "etp32b", "etp32c", "etp32d", "etp32e", "etp32f", "etp32g", "etp32h"]
+            }
+        },
+        "Ethernet256": {
+            "index": "33,33,33,33,33,33,33,33",
+            "lanes": "256,257,258,259,260,261,262,263",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp33"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp33a", "etp33b"],
+                "4x100G[50G,25G,10G]": ["etp33a", "etp33b", "etp33c", "etp33d"],
+                "8x50G[25G,10G]": ["etp33a", "etp33b", "etp33c", "etp33d", "etp33e", "etp33f", "etp33g", "etp33h"]
+            }
+        },
+        "Ethernet264": {
+            "index": "34,34,34,34,34,34,34,34",
+            "lanes": "264,265,266,267,268,269,270,271",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp34"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp34a", "etp34b"],
+                "4x100G[50G,25G,10G]": ["etp34a", "etp34b", "etp34c", "etp34d"],
+                "8x50G[25G,10G]": ["etp34a", "etp34b", "etp34c", "etp34d", "etp34e", "etp34f", "etp34g", "etp34h"]
+            }
+        },
+        "Ethernet272": {
+            "index": "35,35,35,35,35,35,35,35",
+            "lanes": "272,273,274,275,276,277,278,279",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp35"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp35a", "etp35b"],
+                "4x100G[50G,25G,10G]": ["etp35a", "etp35b", "etp35c", "etp35d"],
+                "8x50G[25G,10G]": ["etp35a", "etp35b", "etp35c", "etp35d", "etp35e", "etp35f", "etp35g", "etp35h"]
+            }
+        },
+        "Ethernet280": {
+            "index": "36,36,36,36,36,36,36,36",
+            "lanes": "280,281,282,283,284,285,286,287",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp36"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp36a", "etp36b"],
+                "4x100G[50G,25G,10G]": ["etp36a", "etp36b", "etp36c", "etp36d"],
+                "8x50G[25G,10G]": ["etp36a", "etp36b", "etp36c", "etp36d", "etp36e", "etp36f", "etp36g", "etp36h"]
+            }
+        },
+        "Ethernet288": {
+            "index": "37,37,37,37,37,37,37,37",
+            "lanes": "288,289,290,291,292,293,294,295",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp37"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp37a", "etp37b"],
+                "4x100G[50G,25G,10G]": ["etp37a", "etp37b", "etp37c", "etp37d"],
+                "8x50G[25G,10G]": ["etp37a", "etp37b", "etp37c", "etp37d", "etp37e", "etp37f", "etp37g", "etp37h"]
+            }
+        },
+        "Ethernet296": {
+            "index": "38,38,38,38,38,38,38,38",
+            "lanes": "296,297,298,299,300,301,302,303",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp38"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp38a", "etp38b"],
+                "4x100G[50G,25G,10G]": ["etp38a", "etp38b", "etp38c", "etp38d"],
+                "8x50G[25G,10G]": ["etp38a", "etp38b", "etp38c", "etp38d", "etp38e", "etp38f", "etp38g", "etp38h"]
+            }
+        },
+        "Ethernet304": {
+            "index": "39,39,39,39,39,39,39,39",
+            "lanes": "304,305,306,307,308,309,310,311",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp39"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp39a", "etp39b"],
+                "4x100G[50G,25G,10G]": ["etp39a", "etp39b", "etp39c", "etp39d"],
+                "8x50G[25G,10G]": ["etp39a", "etp39b", "etp39c", "etp39d", "etp39e", "etp39f", "etp39g", "etp39h"]
+            }
+        },
+        "Ethernet312": {
+            "index": "40,40,40,40,40,40,40,40",
+            "lanes": "312,313,314,315,316,317,318,319",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp40"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp40a", "etp40b"],
+                "4x100G[50G,25G,10G]": ["etp40a", "etp40b", "etp40c", "etp40d"],
+                "8x50G[25G,10G]": ["etp40a", "etp40b", "etp40c", "etp40d", "etp40e", "etp40f", "etp40g", "etp40h"]
+            }
+        },
+        "Ethernet320": {
+            "index": "41,41,41,41,41,41,41,41",
+            "lanes": "320,321,322,323,324,325,326,327",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp41"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp41a", "etp41b"],
+                "4x100G[50G,25G,10G]": ["etp41a", "etp41b", "etp41c", "etp41d"],
+                "8x50G[25G,10G]": ["etp41a", "etp41b", "etp41c", "etp41d", "etp41e", "etp41f", "etp41g", "etp41h"]
+            }
+        },
+        "Ethernet328": {
+            "index": "42,42,42,42,42,42,42,42",
+            "lanes": "328,329,330,331,332,333,334,335",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp42"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp42a", "etp42b"],
+                "4x100G[50G,25G,10G]": ["etp42a", "etp42b", "etp42c", "etp42d"],
+                "8x50G[25G,10G]": ["etp42a", "etp42b", "etp42c", "etp42d", "etp42e", "etp42f", "etp42g", "etp42h"]
+            }
+        },
+        "Ethernet336": {
+            "index": "43,43,43,43,43,43,43,43",
+            "lanes": "336,337,338,339,340,341,342,343",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp43"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp43a", "etp43b"],
+                "4x100G[50G,25G,10G]": ["etp43a", "etp43b", "etp43c", "etp43d"],
+                "8x50G[25G,10G]": ["etp43a", "etp43b", "etp43c", "etp43d", "etp43e", "etp43f", "etp43g", "etp43h"]
+            }
+        },
+        "Ethernet344": {
+            "index": "44,44,44,44,44,44,44,44",
+            "lanes": "344,345,346,347,348,349,350,351",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp44"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp44a", "etp44b"],
+                "4x100G[50G,25G,10G]": ["etp44a", "etp44b", "etp44c", "etp44d"],
+                "8x50G[25G,10G]": ["etp44a", "etp44b", "etp44c", "etp44d", "etp44e", "etp44f", "etp44g", "etp44h"]
+            }
+        },
+        "Ethernet352": {
+            "index": "45,45,45,45,45,45,45,45",
+            "lanes": "352,353,354,355,356,357,358,359",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp45"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp45a", "etp45b"],
+                "4x100G[50G,25G,10G]": ["etp45a", "etp45b", "etp45c", "etp45d"],
+                "8x50G[25G,10G]": ["etp45a", "etp45b", "etp45c", "etp45d", "etp45e", "etp45f", "etp45g", "etp45h"]
+            }
+        },
+        "Ethernet360": {
+            "index": "46,46,46,46,46,46,46,46",
+            "lanes": "360,361,362,363,364,365,366,367",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp46"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp46a", "etp46b"],
+                "4x100G[50G,25G,10G]": ["etp46a", "etp46b", "etp46c", "etp46d"],
+                "8x50G[25G,10G]": ["etp46a", "etp46b", "etp46c", "etp46d", "etp46e", "etp46f", "etp46g", "etp46h"]
+            }
+        },
+        "Ethernet368": {
+            "index": "47,47,47,47,47,47,47,47",
+            "lanes": "368,369,370,371,372,373,374,375",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp47"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp47a", "etp47b"],
+                "4x100G[50G,25G,10G]": ["etp47a", "etp47b", "etp47c", "etp47d"],
+                "8x50G[25G,10G]": ["etp47a", "etp47b", "etp47c", "etp47d", "etp47e", "etp47f", "etp47g", "etp47h"]
+            }
+        },
+        "Ethernet376": {
+            "index": "48,48,48,48,48,48,48,48",
+            "lanes": "376,377,378,379,380,381,382,383",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp48"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp48a", "etp48b"],
+                "4x100G[50G,25G,10G]": ["etp48a", "etp48b", "etp48c", "etp48d"],
+                "8x50G[25G,10G]": ["etp48a", "etp48b", "etp48c", "etp48d", "etp48e", "etp48f", "etp48g", "etp48h"]
+            }
+        },
+        "Ethernet384": {
+            "index": "49,49,49,49,49,49,49,49",
+            "lanes": "384,385,386,387,388,389,390,391",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp49"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp49a", "etp49b"],
+                "4x100G[50G,25G,10G]": ["etp49a", "etp49b", "etp49c", "etp49d"],
+                "8x50G[25G,10G]": ["etp49a", "etp49b", "etp49c", "etp49d", "etp49e", "etp49f", "etp49g", "etp49h"]
+            }
+        },
+        "Ethernet392": {
+            "index": "50,50,50,50,50,50,50,50",
+            "lanes": "392,393,394,395,396,397,398,399",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp50"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp50a", "etp50b"],
+                "4x100G[50G,25G,10G]": ["etp50a", "etp50b", "etp50c", "etp50d"],
+                "8x50G[25G,10G]": ["etp50a", "etp50b", "etp50c", "etp50d", "etp50e", "etp50f", "etp50g", "etp50h"]
+            }
+        },
+        "Ethernet400": {
+            "index": "51,51,51,51,51,51,51,51",
+            "lanes": "400,401,402,403,404,405,406,407",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp51"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp51a", "etp51b"],
+                "4x100G[50G,25G,10G]": ["etp51a", "etp51b", "etp51c", "etp51d"],
+                "8x50G[25G,10G]": ["etp51a", "etp51b", "etp51c", "etp51d", "etp51e", "etp51f", "etp51g", "etp51h"]
+            }
+        },
+        "Ethernet408": {
+            "index": "52,52,52,52,52,52,52,52",
+            "lanes": "408,409,410,411,412,413,414,415",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp52"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp52a", "etp52b"],
+                "4x100G[50G,25G,10G]": ["etp52a", "etp52b", "etp52c", "etp52d"],
+                "8x50G[25G,10G]": ["etp52a", "etp52b", "etp52c", "etp52d", "etp52e", "etp52f", "etp52g", "etp52h"]
+            }
+        },
+        "Ethernet416": {
+            "index": "53,53,53,53,53,53,53,53",
+            "lanes": "416,417,418,419,420,421,422,423",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp53"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp53a", "etp53b"],
+                "4x100G[50G,25G,10G]": ["etp53a", "etp53b", "etp53c", "etp53d"],
+                "8x50G[25G,10G]": ["etp53a", "etp53b", "etp53c", "etp53d", "etp53e", "etp53f", "etp53g", "etp53h"]
+            }
+        },
+        "Ethernet424": {
+            "index": "54,54,54,54,54,54,54,54",
+            "lanes": "424,425,426,427,428,429,430,431",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp54"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp54a", "etp54b"],
+                "4x100G[50G,25G,10G]": ["etp54a", "etp54b", "etp54c", "etp54d"],
+                "8x50G[25G,10G]": ["etp54a", "etp54b", "etp54c", "etp54d", "etp54e", "etp54f", "etp54g", "etp54h"]
+            }
+        },
+        "Ethernet432": {
+            "index": "55,55,55,55,55,55,55,55",
+            "lanes": "432,433,434,435,436,437,438,439",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp55"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp55a", "etp55b"],
+                "4x100G[50G,25G,10G]": ["etp55a", "etp55b", "etp55c", "etp55d"],
+                "8x50G[25G,10G]": ["etp55a", "etp55b", "etp55c", "etp55d", "etp55e", "etp55f", "etp55g", "etp55h"]
+            }
+        },
+        "Ethernet440": {
+            "index": "56,56,56,56,56,56,56,56",
+            "lanes": "440,441,442,443,444,445,446,447",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp56"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp56a", "etp56b"],
+                "4x100G[50G,25G,10G]": ["etp56a", "etp56b", "etp56c", "etp56d"],
+                "8x50G[25G,10G]": ["etp56a", "etp56b", "etp56c", "etp56d", "etp56e", "etp56f", "etp56g", "etp56h"]
+            }
+        },
+        "Ethernet448": {
+            "index": "57,57,57,57,57,57,57,57",
+            "lanes": "448,449,450,451,452,453,454,455",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp57"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp57a", "etp57b"],
+                "4x100G[50G,25G,10G]": ["etp57a", "etp57b", "etp57c", "etp57d"],
+                "8x50G[25G,10G]": ["etp57a", "etp57b", "etp57c", "etp57d", "etp57e", "etp57f", "etp57g", "etp57h"]
+            }
+        },
+        "Ethernet456": {
+            "index": "58,58,58,58,58,58,58,58",
+            "lanes": "456,457,458,459,460,461,462,463",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp58"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp58a", "etp58b"],
+                "4x100G[50G,25G,10G]": ["etp58a", "etp58b", "etp58c", "etp58d"],
+                "8x50G[25G,10G]": ["etp58a", "etp58b", "etp58c", "etp58d", "etp58e", "etp58f", "etp58g", "etp58h"]
+            }
+        },
+        "Ethernet464": {
+            "index": "59,59,59,59,59,59,59,59",
+            "lanes": "464,465,466,467,468,469,470,471",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp59"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp59a", "etp59b"],
+                "4x100G[50G,25G,10G]": ["etp59a", "etp59b", "etp59c", "etp59d"],
+                "8x50G[25G,10G]": ["etp59a", "etp59b", "etp59c", "etp59d", "etp59e", "etp59f", "etp59g", "etp59h"]
+            }
+        },
+        "Ethernet472": {
+            "index": "60,60,60,60,60,60,60,60",
+            "lanes": "472,473,474,475,476,477,478,479",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp60"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp60a", "etp60b"],
+                "4x100G[50G,25G,10G]": ["etp60a", "etp60b", "etp60c", "etp60d"],
+                "8x50G[25G,10G]": ["etp60a", "etp60b", "etp60c", "etp60d", "etp60e", "etp60f", "etp60g", "etp60h"]
+            }
+        },
+        "Ethernet480": {
+            "index": "61,61,61,61,61,61,61,61",
+            "lanes": "480,481,482,483,484,485,486,487",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp61"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp61a", "etp61b"],
+                "4x100G[50G,25G,10G]": ["etp61a", "etp61b", "etp61c", "etp61d"],
+                "8x50G[25G,10G]": ["etp61a", "etp61b", "etp61c", "etp61d", "etp61e", "etp61f", "etp61g", "etp61h"]
+            }
+        },
+        "Ethernet488": {
+            "index": "62,62,62,62,62,62,62,62",
+            "lanes": "488,489,490,491,492,493,494,495",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp62"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp62a", "etp62b"],
+                "4x100G[50G,25G,10G]": ["etp62a", "etp62b", "etp62c", "etp62d"],
+                "8x50G[25G,10G]": ["etp62a", "etp62b", "etp62c", "etp62d", "etp62e", "etp62f", "etp62g", "etp62h"]
+            }
+        },
+        "Ethernet496": {
+            "index": "63,63,63,63,63,63,63,63",
+            "lanes": "496,497,498,499,500,501,502,503",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp63"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp63a", "etp63b"],
+                "4x100G[50G,25G,10G]": ["etp63a", "etp63b", "etp63c", "etp63d"],
+                "8x50G[25G,10G]": ["etp63a", "etp63b", "etp63c", "etp63d", "etp63e", "etp63f", "etp63g", "etp63h"]
+            }
+        },
+        "Ethernet504": {
+            "index": "64,64,64,64,64,64,64,64",
+            "lanes": "504,505,506,507,508,509,510,511",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp64"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp64a", "etp64b"],
+                "4x100G[50G,25G,10G]": ["etp64a", "etp64b", "etp64c", "etp64d"],
+                "8x50G[25G,10G]": ["etp64a", "etp64b", "etp64c", "etp64d", "etp64e", "etp64f", "etp64g", "etp64h"]
+            }
+        },
+        "Ethernet512": {
+            "index": "65",
+            "lanes": "512",
+            "breakout_modes": {
+                "1x25G[10G]": ["etp65"]
+            }
+        },
+        "Ethernet513": {
+            "index": "66",
+            "lanes": "513",
+            "breakout_modes": {
+                "1x25G[10G]": ["etp66"]
+            }
+        }
+    }
+}
diff --git a/device/mellanox/x86_64-nvidia_sn5400-r0/platform_asic b/device/mellanox/x86_64-nvidia_sn5400-r0/platform_asic
new file mode 100644
index 000000000..70c074885
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5400-r0/platform_asic
@@ -0,0 +1 @@
+mellanox
diff --git a/device/mellanox/x86_64-nvidia_sn5400-r0/platform_components.json b/device/mellanox/x86_64-nvidia_sn5400-r0/platform_components.json
new file mode 100644
index 000000000..e9760aafe
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5400-r0/platform_components.json
@@ -0,0 +1,16 @@
+{
+    "chassis": {
+        "SN5400": {
+            "component": {
+                "ONIE": { },
+                "SSD": { },
+                "BIOS": { },
+                "CPLD1": { },
+                "CPLD2": { },
+                "CPLD3": { },
+                "CPLD4": { },
+                "CPLD5": { }
+            }
+        }
+    }
+}
diff --git a/device/mellanox/x86_64-nvidia_sn5400-r0/platform_wait b/device/mellanox/x86_64-nvidia_sn5400-r0/platform_wait
new file mode 120000
index 000000000..4b30bd429
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5400-r0/platform_wait
@@ -0,0 +1 @@
+../x86_64-mlnx_msn2700-r0/platform_wait
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn5400-r0/plugins/eeprom.py b/device/mellanox/x86_64-nvidia_sn5400-r0/plugins/eeprom.py
new file mode 120000
index 000000000..b4e2a6a61
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5400-r0/plugins/eeprom.py
@@ -0,0 +1 @@
+../../x86_64-mlnx_msn2700-r0/plugins/eeprom.py
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn5400-r0/plugins/psuutil.py b/device/mellanox/x86_64-nvidia_sn5400-r0/plugins/psuutil.py
new file mode 120000
index 000000000..9f724238a
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5400-r0/plugins/psuutil.py
@@ -0,0 +1 @@
+../../x86_64-mlnx_msn2700-r0/plugins/psuutil.py
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn5400-r0/plugins/sfplpmget.py b/device/mellanox/x86_64-nvidia_sn5400-r0/plugins/sfplpmget.py
new file mode 120000
index 000000000..2e84f435a
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5400-r0/plugins/sfplpmget.py
@@ -0,0 +1 @@
+../../x86_64-mlnx_msn2700-r0/plugins/sfplpmget.py
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn5400-r0/plugins/sfplpmset.py b/device/mellanox/x86_64-nvidia_sn5400-r0/plugins/sfplpmset.py
new file mode 120000
index 000000000..6a88bac30
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5400-r0/plugins/sfplpmset.py
@@ -0,0 +1 @@
+../../x86_64-mlnx_msn2700-r0/plugins/sfplpmset.py
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn5400-r0/plugins/sfpreset.py b/device/mellanox/x86_64-nvidia_sn5400-r0/plugins/sfpreset.py
new file mode 120000
index 000000000..fef2063e3
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5400-r0/plugins/sfpreset.py
@@ -0,0 +1 @@
+../../x86_64-mlnx_msn2700-r0/plugins/sfpreset.py
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn5400-r0/plugins/sfputil.py b/device/mellanox/x86_64-nvidia_sn5400-r0/plugins/sfputil.py
new file mode 120000
index 000000000..45909b880
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5400-r0/plugins/sfputil.py
@@ -0,0 +1 @@
+../../x86_64-mlnx_msn2700-r0/plugins/sfputil.py
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn5400-r0/pmon_daemon_control.json b/device/mellanox/x86_64-nvidia_sn5400-r0/pmon_daemon_control.json
new file mode 120000
index 000000000..435a2ce7c
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5400-r0/pmon_daemon_control.json
@@ -0,0 +1 @@
+../x86_64-mlnx_msn2700-r0/pmon_daemon_control.json
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn5400-r0/pre_reboot_hook b/device/mellanox/x86_64-nvidia_sn5400-r0/pre_reboot_hook
new file mode 120000
index 000000000..6fc31078e
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5400-r0/pre_reboot_hook
@@ -0,0 +1 @@
+../x86_64-mlnx_msn2700-r0/pre_reboot_hook
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn5400-r0/sensors.conf b/device/mellanox/x86_64-nvidia_sn5400-r0/sensors.conf
new file mode 100644
index 000000000..e858a0311
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5400-r0/sensors.conf
@@ -0,0 +1,379 @@
+##
+## Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+## Apache-2.0
+##
+## Licensed under the Apache License, Version 2.0 (the "License");
+## you may not use this file except in compliance with the License.
+## You may obtain a copy of the License at
+##
+## http://www.apache.org/licenses/LICENSE-2.0
+##
+## Unless required by applicable law or agreed to in writing, software
+## distributed under the License is distributed on an "AS IS" BASIS,
+## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+## See the License for the specific language governing permissions and
+## limitations under the License.
+##
+
+# Bus names
+bus "i2c-39" "i2c-1-mux (chan_id 6)"
+
+# Temperature sensors
+chip "mlxsw-i2c-*-48"
+    label temp1 "Ambient ASIC Temp"
+        ignore temp2
+        ignore temp3
+        ignore temp4
+        ignore temp5
+        ignore temp6
+        ignore temp7
+        ignore temp8
+        ignore temp9
+        ignore temp10
+        ignore temp11
+        ignore temp12
+        ignore temp13
+        ignore temp14
+        ignore temp15
+        ignore temp16
+        ignore temp17
+        ignore temp18
+        ignore temp19
+        ignore temp20
+        ignore temp21
+        ignore temp22
+        ignore temp23
+        ignore temp24
+        ignore temp25
+        ignore temp26
+        ignore temp27
+        ignore temp28
+        ignore temp29
+        ignore temp30
+        ignore temp31
+        ignore temp32
+        ignore temp33
+        ignore temp34
+        ignore temp35
+        ignore temp36
+        ignore temp37
+        ignore temp38
+        ignore temp39
+        ignore temp40
+        ignore temp41
+        ignore temp42
+        ignore temp43
+        ignore temp44
+        ignore temp45
+        ignore temp46
+        ignore temp47
+        ignore temp48
+        ignore temp49
+        ignore temp50
+        ignore temp51
+        ignore temp52
+        ignore temp53
+        ignore temp54
+        ignore temp55
+        ignore temp56
+        ignore temp57
+        ignore temp58
+        ignore temp59
+        ignore temp60
+        ignore temp61
+        ignore temp62
+        ignore temp63
+        ignore temp64
+        ignore temp65
+        ignore temp66
+        ignore temp67
+
+chip "tmp102-i2c-*-49"
+    label temp1 "Ambient Fan Side Temp (air intake)"
+chip "adt75-i2c-*-49"
+    label temp1 "Ambient Fan Side Temp (air intake)"
+chip "tmp102-i2c-*-4a"
+    label temp1 "Ambient Port Side Temp (air exhaust)"
+chip "adt75-i2c-*-4a"
+    label temp1 "Ambient Port Side Temp (air exhaust)"
+
+# Power controllers
+chip "mp2975-i2c-*-62"
+    label in1      "PMIC-1 PSU 13V5 Rail (in1)"
+    label in2      "PMIC-1 VDD_M ADJ Rail (out1)"
+    ignore in3
+    label temp1    "PMIC-1 VDD_M ADJ Temp 1"
+    ignore temp2
+    label power1   "PMIC-1 13V5 VDD_M (in)"
+    label power2   "PMIC-1 VDD_M Rail Pwr (out1)"
+    ignore power3
+    label curr1    "PMIC-1 13V5 VDD_M Rail Curr (in1)"
+    label curr2    "PMIC-1 VDD_M Rail Curr (out1)"
+    ignore curr3
+    ignore curr4
+    ignore curr5
+    ignore curr6
+    ignore curr7
+    ignore curr8
+    ignore curr9
+    ignore curr10
+chip "mp2975-i2c-*-63"
+    label in1      "PMIC-2 PSU 13V5 Rail (in1)"
+    label in2      "PMIC-2 VDD_T0 ADJ Rail (out1)"
+    label in3      "PMIC-2 VDD_T1 ADJ Rail (out2)"
+    label temp1    "PMIC-2 VDD_T0 ADJ Temp 1"
+    label temp2    "PMIC-2 VDD_T1 ADJ Temp 2"
+    label power1   "PMIC-2 13V5 VDD_T0 VDD_T1 (in)"
+    label power2   "PMIC-2 VDD_T0 Rail Pwr (out1)"
+    label power3   "PMIC-2 VDD_T1 Rail Pwr (out2)"
+    label curr1    "PMIC-2 13V5 VDD_T0 VDD_T1 Rail Curr (in1)"
+    label curr2    "PMIC-2 VDD_T0 Rail Curr (out1)"
+    label curr3    "PMIC-2 VDD_T1 Rail Curr (out2)"
+    ignore curr4
+    ignore curr5
+    ignore curr6
+chip "mp2975-i2c-*-64"
+    label in1      "PMIC-3 PSU 13V5 Rail (in1)"
+    label in2      "PMIC-3 VDD_T2 ADJ Rail (out1)"
+    label in3      "PMIC-3 VDD_T3 ADJ Rail (out2)"
+    label temp1    "PMIC-3 VDD_T2 ADJ Temp 1"
+    label temp2    "PMIC-3 VDD_T3 ADJ Temp 2"
+    label power1   "PMIC-3 13V5 VDD_T2 VDD_T3 (in)"
+    label power2   "PMIC-3 VDD_T2 Rail Pwr (out1)"
+    label power3   "PMIC-3 VDD_T3 Rail Pwr (out2)"
+    label curr1    "PMIC-3 13V5 VDD_T2 VDD_T3 Rail Curr (in1)"
+    label curr2    "PMIC-3 VDD_T2 Rail Curr (out1)"
+    label curr3    "PMIC-3 VDD_T3 Rail Curr (out2)"
+    ignore curr4
+    ignore curr5
+    ignore curr6
+chip "mp2975-i2c-*-65"
+    label in1      "PMIC-4 PSU 13V5 Rail (in1)"
+    label in2      "PMIC-4 VDD_T4 ADJ Rail (out1)"
+    label in3      "PMIC-4 VDD_T5 ADJ Rail (out2)"
+    label temp1    "PMIC-4 VDD_T4 ADJ Temp 1"
+    label temp2    "PMIC-4 VDD_T5 ADJ Temp 2"
+    label power1   "PMIC-4 13V5 VDD_T4 VDD_T5 (in)"
+    label power2   "PMIC-4 VDD_T4 Rail Pwr (out1)"
+    label power3   "PMIC-4 VDD_T5 Rail Pwr (out2)"
+    label curr1    "PMIC-4 13V5 VDD_T4 VDD_T5 Rail Curr (in1)"
+    label curr2    "PMIC-4 VDD_T4 Rail Curr (out1)"
+    label curr3    "PMIC-4 VDD_T5 Rail Curr (out2)"
+    ignore curr4
+    ignore curr5
+    ignore curr6
+chip "mp2975-i2c-*-66"
+    label in1      "PMIC-5 PSU 13V5 Rail (in1)"
+    label in2      "PMIC-5 VDD_T6 ADJ Rail (out1)"
+    label in3      "PMIC-5 VDD_T7 ADJ Rail (out2)"
+    label temp1    "PMIC-5 VDD_T6 ADJ Temp 1"
+    label temp2    "PMIC-5 VDD_T7 ADJ Temp 2"
+    label power1   "PMIC-5 13V5 VDD_T6 VDD_T7 (in)"
+    label power2   "PMIC-5 VDD_T6 Rail Pwr (out1)"
+    label power3   "PMIC-5 VDD_T7 Rail Pwr (out2)"
+    label curr1    "PMIC-5 13V5 VDD_T6 VDD_T7 Rail Curr (in1)"
+    label curr2    "PMIC-5 VDD_T6 Rail Curr (out1)"
+    label curr3    "PMIC-5 VDD_T7 Rail Curr (out2)"
+    ignore curr4
+    ignore curr5
+    ignore curr6
+chip "mp2975-i2c-*-67"
+    label in1      "PMIC-6 PSU 13V5 Rail (in1)"
+    label in2      "PMIC-6 DVDD_T0 ADJ Rail (out1)"
+    label in3      "PMIC-6 DVDD_T1 ADJ Rail (out2)"
+    label temp1    "PMIC-6 DVDD_T0 ADJ Temp 1"
+    label temp2    "PMIC-6 DVDD_T1 ADJ Temp 2"
+    label power1   "PMIC-6 13V5 DVDD_T0 DVDD_T1 (in)"
+    label power2   "PMIC-6 DVDD_T0 Rail Pwr (out1)"
+    label power3   "PMIC-6 DVDD_T1 Rail Pwr (out2)"
+    label curr1    "PMIC-6 13V5 DVDD_T0 DVDD_T1 Rail Curr (in1)"
+    label curr2    "PMIC-6 DVDD_T0 Rail Curr (out1)"
+    label curr3    "PMIC-6 DVDD_T1 Rail Curr (out2)"
+    ignore curr4
+    ignore curr5
+    ignore curr6
+chip "mp2975-i2c-*-68"
+    label in1      "PMIC-7 PSU 13V5 Rail (in1)"
+    label in2      "PMIC-7 DVDD_T2 ADJ Rail (out1)"
+    label in3      "PMIC-7 DVDD_T3 ADJ Rail (out2)"
+    label temp1    "PMIC-7 DVDD_T2 ADJ Temp 1"
+    label temp2    "PMIC-7 DVDD_T3 ADJ Temp 2"
+    label power1   "PMIC-7 13V5 DVDD_T2 DVDD_T3 (in)"
+    label power2   "PMIC-7 DVDD_T2 Rail Pwr (out1)"
+    label power3   "PMIC-7 DVDD_T3 Rail Pwr (out2)"
+    label curr1    "PMIC-7 13V5 DVDD_T2 DVDD_T3 Rail Curr (in1)"
+    label curr2    "PMIC-7 DVDD_T2 Rail Curr (out1)"
+    label curr3    "PMIC-7 DVDD_T3 Rail Curr (out2)"
+    ignore curr4
+    ignore curr5
+    ignore curr6
+chip "mp2975-i2c-*-69"
+    label in1      "PMIC-8 PSU 13V5 Rail (in1)"
+    label in2      "PMIC-8 DVDD_T4 ADJ Rail (out1)"
+    label in3      "PMIC-8 DVDD_T5 ADJ Rail (out2)"
+    label temp1    "PMIC-8 DVDD_T4 ADJ Temp 1"
+    label temp2    "PMIC-8 DVDD_T5 ADJ Temp 2"
+    label power1   "PMIC-8 13V5 DVDD_T4 DVDD_T5 (in)"
+    label power2   "PMIC-8 DVDD_T4 Rail Pwr (out1)"
+    label power3   "PMIC-8 DVDD_T5 Rail Pwr (out2)"
+    label curr1    "PMIC-8 13V5 DVDD_T4 DVDD_T5 Rail Curr (in1)"
+    label curr2    "PMIC-8 DVDD_T4 Rail Curr (out1)"
+    label curr3    "PMIC-8 DVDD_T5 Rail Curr (out2)"
+    ignore curr4
+    ignore curr5
+    ignore curr6
+chip "mp2975-i2c-*-6a"
+    label in1      "PMIC-9 PSU 13V5 Rail (in1)"
+    label in2      "PMIC-9 DVDD_T6 ADJ Rail (out1)"
+    label in3      "PMIC-9 DVDD_T7 ADJ Rail (out2)"
+    label temp1    "PMIC-9 DVDD_T6 ADJ Temp 1"
+    label temp2    "PMIC-9 DVDD_T7 ADJ Temp 2"
+    label power1   "PMIC-9 13V5 DVDD_T6 DVDD_T7 (in)"
+    label power2   "PMIC-9 DVDD_T6 Rail Pwr (out1)"
+    label power3   "PMIC-9 DVDD_T7 Rail Pwr (out2)"
+    label curr1    "PMIC-9 13V5 DVDD_T6 DVDD_T7 Rail Curr (in1)"
+    label curr2    "PMIC-9 DVDD_T6 Rail Curr (out1)"
+    label curr3    "PMIC-9 DVDD_T7 Rail Curr (out2)"
+    ignore curr4
+    ignore curr5
+    ignore curr6
+chip "mp2975-i2c-*-6c"
+    label in1      "PMIC-10 PSU 13V5 Rail (in1)"
+    label in2      "PMIC-10 HVDD_T03 1V2 Rail (out1)"
+    label in3      "PMIC-10 HVDD_T47 1V2 Rail (out2)"
+    label temp1    "PMIC-10 HVDD_T03 1V2 Temp 1"
+    label temp2    "PMIC-10 HVDD_T47 1V2 Temp 2"
+    label power1   "PMIC-10 13V5 HVDD_T03 HVDD_T47 (in)"
+    label power2   "PMIC-10 HVDD_T03 Rail Pwr (out1)"
+    label power3   "PMIC-10 HVDD_T47 Rail Pwr (out2)"
+    label curr1    "PMIC-10 13V5 HVDD_T03 HVDD_T47 Rail Curr (in1)"
+    label curr2    "PMIC-10 HVDD_T03 Rail Curr (out1)"
+    label curr3    "PMIC-10 HVDD_T47 Rail Curr (out2)"
+    ignore curr4
+    ignore curr5
+    ignore curr6
+    ignore curr7
+    ignore curr8
+    ignore curr9
+    ignore curr10
+    ignore curr11
+chip "mp2975-i2c-*-6e"
+    label in1      "PMIC-11 PSU 13V5 Rail (in1)"
+    label in2      "PMIC-11 VDDSCC 0V75 Rail (out1)"
+    label in3      "PMIC-11 DVDD_M ADJ Rail (out2)"
+    label temp1    "PMIC-11 VDDSCC 1V2 Temp 1"
+    label temp2    "PMIC-11 DVDD_M 1V2 Temp 2"
+    label power1   "PMIC-11 13V5 VDDSCC DVDD_M (in)"
+    label power2   "PMIC-11 VDDSCC Rail Pwr (out1)"
+    label power3   "PMIC-11 DVDD_M Rail Pwr (out2)"
+    label curr1    "PMIC-11 13V5 VDDSCC DVDD_M Rail Curr (in1)"
+    label curr2    "PMIC-11 VDDSCC Rail Curr (out1)"
+    label curr3    "PMIC-11 DVDD_M Rail Curr (out2)"
+    ignore curr4
+    ignore curr5
+    ignore curr6
+
+# Power supplies
+
+chip "dps460-i2c-*-59"
+    label in1 "PSU-1(L) 220V Rail (in)"
+    ignore in2
+    label in3 "PSU-1(L) 12V Rail (out)"
+    label fan1 "PSU-1(L) Fan 1"
+    label temp1 "PSU-1(L) Temp 1"
+    label temp2 "PSU-1(L) Temp 2"
+    label temp3 "PSU-1(L) Temp 3"
+    label power1 "PSU-1(L) 220V Rail Pwr (in)"
+    label power2 "PSU-1(L) 12V Rail Pwr (out)"
+    label curr1 "PSU-1(L) 220V Rail Curr (in)"
+    label curr2 "PSU-1(L) 12V Rail Curr (out)"
+    set power2_cap 0
+chip "dps460-i2c-*-5a"
+    label in1 "PSU-2(R) 220V Rail (in)"
+    ignore in2
+    label in3 "PSU-2(R) 12V Rail (out)"
+    label fan1 "PSU-2(R) Fan 1"
+    label temp1 "PSU-2(R) Temp 1"
+    label temp2 "PSU-2(R) Temp 2"
+    label temp3 "PSU-2(R) Temp 3"
+    label power1 "PSU-2(R) 220V Rail Pwr (in)"
+    label power2 "PSU-2(R) 12V Rail Pwr (out)"
+    label curr1 "PSU-2(R) 220V Rail Curr (in)"
+    label curr2 "PSU-2(R) 12V Rail Curr (out)"
+
+# Power converters
+chip "pmbus-i2c-*-10"
+    label in1      	"IBC-1 PWR CONV 54V Rail (in1)"
+    ignore in2
+    ignore in3
+    label temp1    	"IBC-1 Temp 1"
+    ignore curr1
+    label curr2 	"IBC-1 13V5 Rail Curr (out)"
+chip "pmbus-i2c-*-11"
+    label in1      	"IBC-2 PWR CONV 54V Rail (in1)"
+    ignore in2
+    ignore in3
+    label temp1    	"IBC-2 Temp 1"
+    label curr1 	"IBC-2 13V5 Rail Curr (out)"
+    ignore curr2
+chip "pmbus-i2c-*-13"
+    label in1      	"IBC-3 PWR CONV 54V Rail (in1)"
+    ignore in2
+    ignore in3
+    label temp1    	"IBC-3 Temp 1"
+    label curr1 	"IBC-3 13V5 Rail Curr (out)"
+    ignore curr2
+chip "pmbus-i2c-*-15"
+    label in1      	"IBC-4 PWR CONV 54V Rail (in1)"
+    ignore in2
+    ignore in3
+    label temp1    	"IBC-4 Temp 1"
+    label curr1 	"IBC-4 13V5 Rail Curr (out)"
+    ignore curr2
+
+#COMEX CFL
+chip "mp2975-i2c-39-6b"
+    label in1 "PMIC-6 PSU 12V Rail (vin)"
+    label in2 "PMIC-6 COMEX VCORE (out1)"
+    label in3 "PMIC-6 COMEX VCCSA (out2)"
+    label temp1 "PMIC-6 Temp"
+    label power1 "PMIC-6 COMEX Pwr (pin)"
+    label power2 "PMIC-6 COMEX VCORE Pwr (pout1)"
+    label power3 "PMIC-6 COMEX VCCSA Pwr (pout2)"
+    label curr1 "PMIC-6 COMEX Curr (iin)"
+    label curr2 "PMIC-6 COMEX VCORE Rail Curr (out1)"
+    ignore curr3
+    ignore curr4
+    ignore curr5
+    label curr6 "PMIC-6 COMEX VCCSA Rail Curr (out2)"
+    ignore curr7
+
+# Chassis fans
+chip "mlxreg_fan-isa-*"
+    label fan1 "Chassis Fan Drawer-1 Tach 1"
+    label fan2 "Chassis Fan Drawer-1 Tach 2"
+    label fan3 "Chassis Fan Drawer-2 Tach 1"
+    label fan4 "Chassis Fan Drawer-2 Tach 2"
+    label fan5 "Chassis Fan Drawer-3 Tach 1"
+    label fan6 "Chassis Fan Drawer-3 Tach 2"
+    label fan7 "Chassis Fan Drawer-4 Tach 1"
+    label fan8 "Chassis Fan Drawer-4 Tach 2"
+
+# Memory sensors
+bus "i2c-0" "SMBus I801 adapter at efa0"
+chip "jc42-i2c-0-1c"
+    label temp1 "SODIMM Temp"
+
+chip "jc42-i2c-0-1a"
+    label temp1 "SODIMM Temp"
+
+# PCH
+chip "pch_cannonlake-virtual-*"
+    label temp1 "PCH Temp"
+
+# SSD
+chip "drivetemp-*"
+    label temp1 "SSD Temp"
+
+chip "*-acpi-*"
+    label temp1 "CPU ACPI temp"
diff --git a/device/mellanox/x86_64-nvidia_sn5400-r0/system_health_monitoring_config.json b/device/mellanox/x86_64-nvidia_sn5400-r0/system_health_monitoring_config.json
new file mode 120000
index 000000000..98df66c27
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5400-r0/system_health_monitoring_config.json
@@ -0,0 +1 @@
+../x86_64-mlnx_msn2700-r0/system_health_monitoring_config.json
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn5400-r0/thermal_policy.json b/device/mellanox/x86_64-nvidia_sn5400-r0/thermal_policy.json
new file mode 120000
index 000000000..5a25cd87f
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5400-r0/thermal_policy.json
@@ -0,0 +1 @@
+../x86_64-mlnx_msn2700-r0/thermal_policy.json
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn5400_simx-r0/ACS-SN5400 b/device/mellanox/x86_64-nvidia_sn5400_simx-r0/ACS-SN5400
new file mode 120000
index 000000000..d68ed0a1b
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5400_simx-r0/ACS-SN5400
@@ -0,0 +1 @@
+../x86_64-nvidia_sn5400-r0/ACS-SN5400/
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn5400_simx-r0/default_sku b/device/mellanox/x86_64-nvidia_sn5400_simx-r0/default_sku
new file mode 120000
index 000000000..6358d0a77
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5400_simx-r0/default_sku
@@ -0,0 +1 @@
+../x86_64-nvidia_sn5400-r0/default_sku
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn5400_simx-r0/platform.json b/device/mellanox/x86_64-nvidia_sn5400_simx-r0/platform.json
new file mode 100644
index 000000000..213822ce5
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5400_simx-r0/platform.json
@@ -0,0 +1,1336 @@
+{
+    "chassis": {
+        "name": "SN5400",
+        "components": [
+            {
+                "name": "ONIE"
+            },
+            {
+                "name": "SSD"
+            },
+            {
+                "name": "BIOS"
+            },
+            {
+                "name": "CPLD1"
+            },
+            {
+                "name": "CPLD2"
+            },
+            {
+                "name": "CPLD3"
+            },
+            {
+                "name": "CPLD4"
+            },
+            {
+                "name": "CPLD5"
+            },
+            {
+                "name": "CPLD6"
+            }
+        ],
+        "fans": [],
+        "fan_drawers": [
+            {
+                "name": "drawer1",
+                "fans": [
+                    {
+                        "name": "fan1"
+                    },
+                    {
+                        "name": "fan2"
+                    }
+                ]
+            },
+            {
+                "name": "drawer2",
+                "fans": [
+                    {
+                        "name": "fan3"
+                    },
+                    {
+                        "name": "fan4"
+                    }
+                ]
+            },
+            {
+                "name": "drawer3",
+                "fans": [
+                    {
+                        "name": "fan5"
+                    },
+                    {
+                        "name": "fan6"
+                    }
+                ]
+            },
+            {
+                "name": "drawer4",
+                "fans": [
+                    {
+                        "name": "fan7"
+                    },
+                    {
+                        "name": "fan8"
+                    }
+                ]
+            }
+        ],
+        "psus": [
+            {
+                "name": "PSU 1",
+                "fans": [
+                    {
+                        "name": "psu1_fan1"
+                    }
+                ],
+                "thermals": [
+                    {
+                        "name": "PSU-1 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "PSU 2",
+                "fans": [
+                    {
+                        "name": "psu2_fan1"
+                    }
+                ],
+                "thermals": [
+                    {
+                        "name": "PSU-2 Temp"
+                    }
+                ]
+            }
+        ],
+        "thermals": [
+            {
+                "name": "ASIC"
+            },
+            {
+                "name": "Ambient Fan Side Temp"
+            },
+            {
+                "name": "Ambient Port Side Temp"
+            },
+            {
+                "name": "CPU Core 0 Temp"
+            },
+            {
+                "name": "CPU Core 1 Temp"
+            },
+            {
+                "name": "CPU Core 2 Temp"
+            },
+            {
+                "name": "CPU Core 3 Temp"
+            },
+            {
+                "name": "CPU Core 4 Temp"
+            },
+            {
+                "name": "CPU Core 5 Temp"
+            },
+            {
+                "name": "CPU Pack Temp"
+            },
+            {
+                "name": "SODIMM 1 Temp"
+            },
+            {
+                "name": "SODIMM 2 Temp"
+            },
+            {
+                "name": "PCH Temp"
+            }
+        ],
+        "sfps": [
+            {
+                "name": "sfp1",
+                "thermals": [
+                    {
+                        "name": "xSFP module 1 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp2",
+                "thermals": [
+                    {
+                        "name": "xSFP module 2 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp3",
+                "thermals": [
+                    {
+                        "name": "xSFP module 3 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp4",
+                "thermals": [
+                    {
+                        "name": "xSFP module 4 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp5",
+                "thermals": [
+                    {
+                        "name": "xSFP module 5 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp6",
+                "thermals": [
+                    {
+                        "name": "xSFP module 6 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp7",
+                "thermals": [
+                    {
+                        "name": "xSFP module 7 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp8",
+                "thermals": [
+                    {
+                        "name": "xSFP module 8 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp9",
+                "thermals": [
+                    {
+                        "name": "xSFP module 9 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp10",
+                "thermals": [
+                    {
+                        "name": "xSFP module 10 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp11",
+                "thermals": [
+                    {
+                        "name": "xSFP module 11 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp12",
+                "thermals": [
+                    {
+                        "name": "xSFP module 12 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp13",
+                "thermals": [
+                    {
+                        "name": "xSFP module 13 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp14",
+                "thermals": [
+                    {
+                        "name": "xSFP module 14 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp15",
+                "thermals": [
+                    {
+                        "name": "xSFP module 15 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp16",
+                "thermals": [
+                    {
+                        "name": "xSFP module 16 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp17",
+                "thermals": [
+                    {
+                        "name": "xSFP module 17 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp18",
+                "thermals": [
+                    {
+                        "name": "xSFP module 18 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp19",
+                "thermals": [
+                    {
+                        "name": "xSFP module 19 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp20",
+                "thermals": [
+                    {
+                        "name": "xSFP module 20 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp21",
+                "thermals": [
+                    {
+                        "name": "xSFP module 21 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp22",
+                "thermals": [
+                    {
+                        "name": "xSFP module 22 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp23",
+                "thermals": [
+                    {
+                        "name": "xSFP module 23 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp24",
+                "thermals": [
+                    {
+                        "name": "xSFP module 24 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp25",
+                "thermals": [
+                    {
+                        "name": "xSFP module 25 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp26",
+                "thermals": [
+                    {
+                        "name": "xSFP module 26 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp27",
+                "thermals": [
+                    {
+                        "name": "xSFP module 27 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp28",
+                "thermals": [
+                    {
+                        "name": "xSFP module 28 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp29",
+                "thermals": [
+                    {
+                        "name": "xSFP module 29 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp30",
+                "thermals": [
+                    {
+                        "name": "xSFP module 30 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp31",
+                "thermals": [
+                    {
+                        "name": "xSFP module 31 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp32",
+                "thermals": [
+                    {
+                        "name": "xSFP module 32 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp33",
+                "thermals": [
+                    {
+                        "name": "xSFP module 33 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp34",
+                "thermals": [
+                    {
+                        "name": "xSFP module 34 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp35",
+                "thermals": [
+                    {
+                        "name": "xSFP module 35 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp36",
+                "thermals": [
+                    {
+                        "name": "xSFP module 36 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp37",
+                "thermals": [
+                    {
+                        "name": "xSFP module 37 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp38",
+                "thermals": [
+                    {
+                        "name": "xSFP module 38 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp39",
+                "thermals": [
+                    {
+                        "name": "xSFP module 39 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp40",
+                "thermals": [
+                    {
+                        "name": "xSFP module 40 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp41",
+                "thermals": [
+                    {
+                        "name": "xSFP module 41 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp42",
+                "thermals": [
+                    {
+                        "name": "xSFP module 42 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp43",
+                "thermals": [
+                    {
+                        "name": "xSFP module 43 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp44",
+                "thermals": [
+                    {
+                        "name": "xSFP module 44 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp45",
+                "thermals": [
+                    {
+                        "name": "xSFP module 45 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp46",
+                "thermals": [
+                    {
+                        "name": "xSFP module 46 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp47",
+                "thermals": [
+                    {
+                        "name": "xSFP module 47 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp48",
+                "thermals": [
+                    {
+                        "name": "xSFP module 48 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp49",
+                "thermals": [
+                    {
+                        "name": "xSFP module 49 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp50",
+                "thermals": [
+                    {
+                        "name": "xSFP module 50 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp51",
+                "thermals": [
+                    {
+                        "name": "xSFP module 51 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp52",
+                "thermals": [
+                    {
+                        "name": "xSFP module 52 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp53",
+                "thermals": [
+                    {
+                        "name": "xSFP module 53 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp54",
+                "thermals": [
+                    {
+                        "name": "xSFP module 54 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp55",
+                "thermals": [
+                    {
+                        "name": "xSFP module 55 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp56",
+                "thermals": [
+                    {
+                        "name": "xSFP module 56 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp57",
+                "thermals": [
+                    {
+                        "name": "xSFP module 57 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp58",
+                "thermals": [
+                    {
+                        "name": "xSFP module 58 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp59",
+                "thermals": [
+                    {
+                        "name": "xSFP module 59 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp60",
+                "thermals": [
+                    {
+                        "name": "xSFP module 60 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp61",
+                "thermals": [
+                    {
+                        "name": "xSFP module 61 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp62",
+                "thermals": [
+                    {
+                        "name": "xSFP module 62 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp63",
+                "thermals": [
+                    {
+                        "name": "xSFP module 63 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp64",
+                "thermals": [
+                    {
+                        "name": "xSFP module 64 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp65",
+                "thermals": [
+                    {
+                        "name": "xSFP module 65 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp66",
+                "thermals": [
+                    {
+                        "name": "xSFP module 66 Temp"
+                    }
+                ]
+            }
+        ]
+    },
+    "interfaces": {
+        "Ethernet0": {
+            "index": "1,1,1,1,1,1,1,1",
+            "lanes": "0,1,2,3,4,5,6,7",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp1"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp1a", "etp1b"],
+                "4x100G[50G,25G,10G]": ["etp1a", "etp1b", "etp1c", "etp1d"],
+                "8x50G[25G,10G]": ["etp1a", "etp1b", "etp1c", "etp1d", "etp1e", "etp1f", "etp1g", "etp1h"]
+            }
+        },
+        "Ethernet8": {
+            "index": "2,2,2,2,2,2,2,2",
+            "lanes": "8,9,10,11,12,13,14,15",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp2"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp2a", "etp2b"],
+                "4x100G[50G,25G,10G]": ["etp2a", "etp2b", "etp2c", "etp2d"],
+                "8x50G[25G,10G]": ["etp2a", "etp2b", "etp2c", "etp2d", "etp2e", "etp2f", "etp2g", "etp2h"]
+            }
+        },
+        "Ethernet16": {
+            "index": "3,3,3,3,3,3,3,3",
+            "lanes": "16,17,18,19,20,21,22,23",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp3"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp3a", "etp3b"],
+                "4x100G[50G,25G,10G]": ["etp3a", "etp3b", "etp3c", "etp3d"],
+                "8x50G[25G,10G]": ["etp3a", "etp3b", "etp3c", "etp3d", "etp3e", "etp3f", "etp3g", "etp3h"]
+            }
+        },
+        "Ethernet24": {
+            "index": "4,4,4,4,4,4,4,4",
+            "lanes": "24,25,26,27,28,29,30,31",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp4"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp4a", "etp4b"],
+                "4x100G[50G,25G,10G]": ["etp4a", "etp4b", "etp4c", "etp4d"],
+                "8x50G[25G,10G]": ["etp4a", "etp4b", "etp4c", "etp4d", "etp4e", "etp4f", "etp4g", "etp4h"]
+            }
+        },
+        "Ethernet32": {
+            "index": "5,5,5,5,5,5,5,5",
+            "lanes": "32,33,34,35,36,37,38,39",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp5"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp5a", "etp5b"],
+                "4x100G[50G,25G,10G]": ["etp5a", "etp5b", "etp5c", "etp5d"],
+                "8x50G[25G,10G]": ["etp5a", "etp5b", "etp5c", "etp5d", "etp5e", "etp5f", "etp5g", "etp5h"]
+            }
+        },
+        "Ethernet40": {
+            "index": "6,6,6,6,6,6,6,6",
+            "lanes": "40,41,42,43,44,45,46,47",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp6"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp6a", "etp6b"],
+                "4x100G[50G,25G,10G]": ["etp6a", "etp6b", "etp6c", "etp6d"],
+                "8x50G[25G,10G]": ["etp6a", "etp6b", "etp6c", "etp6d", "etp6e", "etp6f", "etp6g", "etp6h"]
+            }
+        },
+        "Ethernet48": {
+            "index": "7,7,7,7,7,7,7,7",
+            "lanes": "48,49,50,51,52,53,54,55",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp7"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp7a", "etp7b"],
+                "4x100G[50G,25G,10G]": ["etp7a", "etp7b", "etp7c", "etp7d"],
+                "8x50G[25G,10G]": ["etp7a", "etp7b", "etp7c", "etp7d", "etp7e", "etp7f", "etp7g", "etp7h"]
+            }
+        },
+        "Ethernet56": {
+            "index": "8,8,8,8,8,8,8,8",
+            "lanes": "56,57,58,59,60,61,62,63",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp8"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp8a", "etp8b"],
+                "4x100G[50G,25G,10G]": ["etp8a", "etp8b", "etp8c", "etp8d"],
+                "8x50G[25G,10G]": ["etp8a", "etp8b", "etp8c", "etp8d", "etp8e", "etp8f", "etp8g", "etp8h"]
+            }
+        },
+        "Ethernet64": {
+            "index": "9,9,9,9,9,9,9,9",
+            "lanes": "64,65,66,67,68,69,70,71",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp9"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp9a", "etp9b"],
+                "4x100G[50G,25G,10G]": ["etp9a", "etp9b", "etp9c", "etp9d"],
+                "8x50G[25G,10G]": ["etp9a", "etp9b", "etp9c", "etp9d", "etp9e", "etp9f", "etp9g", "etp9h"]
+            }
+        },
+        "Ethernet72": {
+            "index": "10,10,10,10,10,10,10,10",
+            "lanes": "72,73,74,75,76,77,78,79",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp10"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp10a", "etp10b"],
+                "4x100G[50G,25G,10G]": ["etp10a", "etp10b", "etp10c", "etp10d"],
+                "8x50G[25G,10G]": ["etp10a", "etp10b", "etp10c", "etp10d", "etp10e", "etp10f", "etp10g", "etp10h"]
+            }
+        },
+        "Ethernet80": {
+            "index": "11,11,11,11,11,11,11,11",
+            "lanes": "80,81,82,83,84,85,86,87",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp11"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp11a", "etp11b"],
+                "4x100G[50G,25G,10G]": ["etp11a", "etp11b", "etp11c", "etp11d"],
+                "8x50G[25G,10G]": ["etp11a", "etp11b", "etp11c", "etp11d", "etp11e", "etp11f", "etp11g", "etp11h"]
+            }
+        },
+        "Ethernet88": {
+            "index": "12,12,12,12,12,12,12,12",
+            "lanes": "88,89,90,91,92,93,94,95",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp12"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp12a", "etp12b"],
+                "4x100G[50G,25G,10G]": ["etp12a", "etp12b", "etp12c", "etp12d"],
+                "8x50G[25G,10G]": ["etp12a", "etp12b", "etp12c", "etp12d", "etp12e", "etp12f", "etp12g", "etp12h"]
+            }
+        },
+        "Ethernet96": {
+            "index": "13,13,13,13,13,13,13,13",
+            "lanes": "96,97,98,99,100,101,102,103",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp13"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp13a", "etp13b"],
+                "4x100G[50G,25G,10G]": ["etp13a", "etp13b", "etp13c", "etp13d"],
+                "8x50G[25G,10G]": ["etp13a", "etp13b", "etp13c", "etp13d", "etp13e", "etp13f", "etp13g", "etp13h"]
+            }
+        },
+        "Ethernet104": {
+            "index": "14,14,14,14,14,14,14,14",
+            "lanes": "104,105,106,107,108,109,110,111",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp14"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp14a", "etp14b"],
+                "4x100G[50G,25G,10G]": ["etp14a", "etp14b", "etp14c", "etp14d"],
+                "8x50G[25G,10G]": ["etp14a", "etp14b", "etp14c", "etp14d", "etp14e", "etp14f", "etp14g", "etp14h"]
+            }
+        },
+        "Ethernet112": {
+            "index": "15,15,15,15,15,15,15,15",
+            "lanes": "112,113,114,115,116,117,118,119",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp15"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp15a", "etp15b"],
+                "4x100G[50G,25G,10G]": ["etp15a", "etp15b", "etp15c", "etp15d"],
+                "8x50G[25G,10G]": ["etp15a", "etp15b", "etp15c", "etp15d", "etp15e", "etp15f", "etp15g", "etp15h"]
+            }
+        },
+        "Ethernet120": {
+            "index": "16,16,16,16,16,16,16,16",
+            "lanes": "120,121,122,123,124,125,126,127",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp16"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp16a", "etp16b"],
+                "4x100G[50G,25G,10G]": ["etp16a", "etp16b", "etp16c", "etp16d"],
+                "8x50G[25G,10G]": ["etp16a", "etp16b", "etp16c", "etp16d", "etp16e", "etp16f", "etp16g", "etp16h"]
+            }
+        },
+        "Ethernet128": {
+            "index": "17,17,17,17,17,17,17,17",
+            "lanes": "128,129,130,131,132,133,134,135",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp17"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp17a", "etp17b"],
+                "4x100G[50G,25G,10G]": ["etp17a", "etp17b", "etp17c", "etp17d"],
+                "8x50G[25G,10G]": ["etp17a", "etp17b", "etp17c", "etp17d", "etp17e", "etp17f", "etp17g", "etp17h"]
+            }
+        },
+        "Ethernet136": {
+            "index": "18,18,18,18,18,18,18,18",
+            "lanes": "136,137,138,139,140,141,142,143",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp18"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp18a", "etp18b"],
+                "4x100G[50G,25G,10G]": ["etp18a", "etp18b", "etp18c", "etp18d"],
+                "8x50G[25G,10G]": ["etp18a", "etp18b", "etp18c", "etp18d", "etp18e", "etp18f", "etp18g", "etp18h"]
+            }
+        },
+        "Ethernet144": {
+            "index": "19,19,19,19,19,19,19,19",
+            "lanes": "144,145,146,147,148,149,150,151",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp19"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp19a", "etp19b"],
+                "4x100G[50G,25G,10G]": ["etp19a", "etp19b", "etp19c", "etp19d"],
+                "8x50G[25G,10G]": ["etp19a", "etp19b", "etp19c", "etp19d", "etp19e", "etp19f", "etp19g", "etp19h"]
+            }
+        },
+        "Ethernet152": {
+            "index": "20,20,20,20,20,20,20,20",
+            "lanes": "152,153,154,155,156,157,158,159",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp20"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp20a", "etp20b"],
+                "4x100G[50G,25G,10G]": ["etp20a", "etp20b", "etp20c", "etp20d"],
+                "8x50G[25G,10G]": ["etp20a", "etp20b", "etp20c", "etp20d", "etp20e", "etp20f", "etp20g", "etp20h"]
+            }
+        },
+        "Ethernet160": {
+            "index": "21,21,21,21,21,21,21,21",
+            "lanes": "160,161,162,163,164,165,166,167",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp21"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp21a", "etp21b"],
+                "4x100G[50G,25G,10G]": ["etp21a", "etp21b", "etp21c", "etp21d"],
+                "8x50G[25G,10G]": ["etp21a", "etp21b", "etp21c", "etp21d", "etp21e", "etp21f", "etp21g", "etp21h"]
+            }
+        },
+        "Ethernet168": {
+            "index": "22,22,22,22,22,22,22,22",
+            "lanes": "168,169,170,171,172,173,174,175",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp22"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp22a", "etp22b"],
+                "4x100G[50G,25G,10G]": ["etp22a", "etp22b", "etp22c", "etp22d"],
+                "8x50G[25G,10G]": ["etp22a", "etp22b", "etp22c", "etp22d", "etp22e", "etp22f", "etp22g", "etp22h"]
+            }
+        },
+        "Ethernet176": {
+            "index": "23,23,23,23,23,23,23,23",
+            "lanes": "176,177,178,179,180,181,182,183",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp23"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp23a", "etp23b"],
+                "4x100G[50G,25G,10G]": ["etp23a", "etp23b", "etp23c", "etp23d"],
+                "8x50G[25G,10G]": ["etp23a", "etp23b", "etp23c", "etp23d", "etp23e", "etp23f", "etp23g", "etp23h"]
+            }
+        },
+        "Ethernet184": {
+            "index": "24,24,24,24,24,24,24,24",
+            "lanes": "184,185,186,187,188,189,190,191",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp24"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp24a", "etp24b"],
+                "4x100G[50G,25G,10G]": ["etp24a", "etp24b", "etp24c", "etp24d"],
+                "8x50G[25G,10G]": ["etp24a", "etp24b", "etp24c", "etp24d", "etp24e", "etp24f", "etp24g", "etp24h"]
+            }
+        },
+        "Ethernet192": {
+            "index": "25,25,25,25,25,25,25,25",
+            "lanes": "192,193,194,195,196,197,198,199",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp25"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp25a", "etp25b"],
+                "4x100G[50G,25G,10G]": ["etp25a", "etp25b", "etp25c", "etp25d"],
+                "8x50G[25G,10G]": ["etp25a", "etp25b", "etp25c", "etp25d", "etp25e", "etp25f", "etp25g", "etp25h"]
+            }
+        },
+        "Ethernet200": {
+            "index": "26,26,26,26,26,26,26,26",
+            "lanes": "200,201,202,203,204,205,206,207",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp26"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp26a", "etp26b"],
+                "4x100G[50G,25G,10G]": ["etp26a", "etp26b", "etp26c", "etp26d"],
+                "8x50G[25G,10G]": ["etp26a", "etp26b", "etp26c", "etp26d", "etp26e", "etp26f", "etp26g", "etp26h"]
+            }
+        },
+        "Ethernet208": {
+            "index": "27,27,27,27,27,27,27,27",
+            "lanes": "208,209,210,211,212,213,214,215",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp27"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp27a", "etp27b"],
+                "4x100G[50G,25G,10G]": ["etp27a", "etp27b", "etp27c", "etp27d"],
+                "8x50G[25G,10G]": ["etp27a", "etp27b", "etp27c", "etp27d", "etp27e", "etp27f", "etp27g", "etp27h"]
+            }
+        },
+        "Ethernet216": {
+            "index": "28,28,28,28,28,28,28,28",
+            "lanes": "216,217,218,219,220,221,222,223",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp28"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp28a", "etp28b"],
+                "4x100G[50G,25G,10G]": ["etp28a", "etp28b", "etp28c", "etp28d"],
+                "8x50G[25G,10G]": ["etp28a", "etp28b", "etp28c", "etp28d", "etp28e", "etp28f", "etp28g", "etp28h"]
+            }
+        },
+        "Ethernet224": {
+            "index": "29,29,29,29,29,29,29,29",
+            "lanes": "224,225,226,227,228,229,230,231",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp29"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp29a", "etp29b"],
+                "4x100G[50G,25G,10G]": ["etp29a", "etp29b", "etp29c", "etp29d"],
+                "8x50G[25G,10G]": ["etp29a", "etp29b", "etp29c", "etp29d", "etp29e", "etp29f", "etp29g", "etp29h"]
+            }
+        },
+        "Ethernet232": {
+            "index": "30,30,30,30,30,30,30,30",
+            "lanes": "232,233,234,235,236,237,238,239",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp30"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp30a", "etp30b"],
+                "4x100G[50G,25G,10G]": ["etp30a", "etp30b", "etp30c", "etp30d"],
+                "8x50G[25G,10G]": ["etp30a", "etp30b", "etp30c", "etp30d", "etp30e", "etp30f", "etp30g", "etp30h"]
+            }
+        },
+        "Ethernet240": {
+            "index": "31,31,31,31,31,31,31,31",
+            "lanes": "240,241,242,243,244,245,246,247",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp31"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp31a", "etp31b"],
+                "4x100G[50G,25G,10G]": ["etp31a", "etp31b", "etp31c", "etp31d"],
+                "8x50G[25G,10G]": ["etp31a", "etp31b", "etp31c", "etp31d", "etp31e", "etp31f", "etp31g", "etp31h"]
+            }
+        },
+        "Ethernet248": {
+            "index": "32,32,32,32,32,32,32,32",
+            "lanes": "248,249,250,251,252,253,254,255",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp32"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp32a", "etp32b"],
+                "4x100G[50G,25G,10G]": ["etp32a", "etp32b", "etp32c", "etp32d"],
+                "8x50G[25G,10G]": ["etp32a", "etp32b", "etp32c", "etp32d", "etp32e", "etp32f", "etp32g", "etp32h"]
+            }
+        },
+        "Ethernet256": {
+            "index": "33,33,33,33,33,33,33,33",
+            "lanes": "256,257,258,259,260,261,262,263",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp33"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp33a", "etp33b"],
+                "4x100G[50G,25G,10G]": ["etp33a", "etp33b", "etp33c", "etp33d"],
+                "8x50G[25G,10G]": ["etp33a", "etp33b", "etp33c", "etp33d", "etp33e", "etp33f", "etp33g", "etp33h"]
+            }
+        },
+        "Ethernet264": {
+            "index": "34,34,34,34,34,34,34,34",
+            "lanes": "264,265,266,267,268,269,270,271",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp34"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp34a", "etp34b"],
+                "4x100G[50G,25G,10G]": ["etp34a", "etp34b", "etp34c", "etp34d"],
+                "8x50G[25G,10G]": ["etp34a", "etp34b", "etp34c", "etp34d", "etp34e", "etp34f", "etp34g", "etp34h"]
+            }
+        },
+        "Ethernet272": {
+            "index": "35,35,35,35,35,35,35,35",
+            "lanes": "272,273,274,275,276,277,278,279",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp35"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp35a", "etp35b"],
+                "4x100G[50G,25G,10G]": ["etp35a", "etp35b", "etp35c", "etp35d"],
+                "8x50G[25G,10G]": ["etp35a", "etp35b", "etp35c", "etp35d", "etp35e", "etp35f", "etp35g", "etp35h"]
+            }
+        },
+        "Ethernet280": {
+            "index": "36,36,36,36,36,36,36,36",
+            "lanes": "280,281,282,283,284,285,286,287",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp36"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp36a", "etp36b"],
+                "4x100G[50G,25G,10G]": ["etp36a", "etp36b", "etp36c", "etp36d"],
+                "8x50G[25G,10G]": ["etp36a", "etp36b", "etp36c", "etp36d", "etp36e", "etp36f", "etp36g", "etp36h"]
+            }
+        },
+        "Ethernet288": {
+            "index": "37,37,37,37,37,37,37,37",
+            "lanes": "288,289,290,291,292,293,294,295",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp37"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp37a", "etp37b"],
+                "4x100G[50G,25G,10G]": ["etp37a", "etp37b", "etp37c", "etp37d"],
+                "8x50G[25G,10G]": ["etp37a", "etp37b", "etp37c", "etp37d", "etp37e", "etp37f", "etp37g", "etp37h"]
+            }
+        },
+        "Ethernet296": {
+            "index": "38,38,38,38,38,38,38,38",
+            "lanes": "296,297,298,299,300,301,302,303",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp38"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp38a", "etp38b"],
+                "4x100G[50G,25G,10G]": ["etp38a", "etp38b", "etp38c", "etp38d"],
+                "8x50G[25G,10G]": ["etp38a", "etp38b", "etp38c", "etp38d", "etp38e", "etp38f", "etp38g", "etp38h"]
+            }
+        },
+        "Ethernet304": {
+            "index": "39,39,39,39,39,39,39,39",
+            "lanes": "304,305,306,307,308,309,310,311",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp39"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp39a", "etp39b"],
+                "4x100G[50G,25G,10G]": ["etp39a", "etp39b", "etp39c", "etp39d"],
+                "8x50G[25G,10G]": ["etp39a", "etp39b", "etp39c", "etp39d", "etp39e", "etp39f", "etp39g", "etp39h"]
+            }
+        },
+        "Ethernet312": {
+            "index": "40,40,40,40,40,40,40,40",
+            "lanes": "312,313,314,315,316,317,318,319",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp40"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp40a", "etp40b"],
+                "4x100G[50G,25G,10G]": ["etp40a", "etp40b", "etp40c", "etp40d"],
+                "8x50G[25G,10G]": ["etp40a", "etp40b", "etp40c", "etp40d", "etp40e", "etp40f", "etp40g", "etp40h"]
+            }
+        },
+        "Ethernet320": {
+            "index": "41,41,41,41,41,41,41,41",
+            "lanes": "320,321,322,323,324,325,326,327",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp41"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp41a", "etp41b"],
+                "4x100G[50G,25G,10G]": ["etp41a", "etp41b", "etp41c", "etp41d"],
+                "8x50G[25G,10G]": ["etp41a", "etp41b", "etp41c", "etp41d", "etp41e", "etp41f", "etp41g", "etp41h"]
+            }
+        },
+        "Ethernet328": {
+            "index": "42,42,42,42,42,42,42,42",
+            "lanes": "328,329,330,331,332,333,334,335",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp42"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp42a", "etp42b"],
+                "4x100G[50G,25G,10G]": ["etp42a", "etp42b", "etp42c", "etp42d"],
+                "8x50G[25G,10G]": ["etp42a", "etp42b", "etp42c", "etp42d", "etp42e", "etp42f", "etp42g", "etp42h"]
+            }
+        },
+        "Ethernet336": {
+            "index": "43,43,43,43,43,43,43,43",
+            "lanes": "336,337,338,339,340,341,342,343",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp43"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp43a", "etp43b"],
+                "4x100G[50G,25G,10G]": ["etp43a", "etp43b", "etp43c", "etp43d"],
+                "8x50G[25G,10G]": ["etp43a", "etp43b", "etp43c", "etp43d", "etp43e", "etp43f", "etp43g", "etp43h"]
+            }
+        },
+        "Ethernet344": {
+            "index": "44,44,44,44,44,44,44,44",
+            "lanes": "344,345,346,347,348,349,350,351",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp44"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp44a", "etp44b"],
+                "4x100G[50G,25G,10G]": ["etp44a", "etp44b", "etp44c", "etp44d"],
+                "8x50G[25G,10G]": ["etp44a", "etp44b", "etp44c", "etp44d", "etp44e", "etp44f", "etp44g", "etp44h"]
+            }
+        },
+        "Ethernet352": {
+            "index": "45,45,45,45,45,45,45,45",
+            "lanes": "352,353,354,355,356,357,358,359",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp45"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp45a", "etp45b"],
+                "4x100G[50G,25G,10G]": ["etp45a", "etp45b", "etp45c", "etp45d"],
+                "8x50G[25G,10G]": ["etp45a", "etp45b", "etp45c", "etp45d", "etp45e", "etp45f", "etp45g", "etp45h"]
+            }
+        },
+        "Ethernet360": {
+            "index": "46,46,46,46,46,46,46,46",
+            "lanes": "360,361,362,363,364,365,366,367",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp46"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp46a", "etp46b"],
+                "4x100G[50G,25G,10G]": ["etp46a", "etp46b", "etp46c", "etp46d"],
+                "8x50G[25G,10G]": ["etp46a", "etp46b", "etp46c", "etp46d", "etp46e", "etp46f", "etp46g", "etp46h"]
+            }
+        },
+        "Ethernet368": {
+            "index": "47,47,47,47,47,47,47,47",
+            "lanes": "368,369,370,371,372,373,374,375",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp47"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp47a", "etp47b"],
+                "4x100G[50G,25G,10G]": ["etp47a", "etp47b", "etp47c", "etp47d"],
+                "8x50G[25G,10G]": ["etp47a", "etp47b", "etp47c", "etp47d", "etp47e", "etp47f", "etp47g", "etp47h"]
+            }
+        },
+        "Ethernet376": {
+            "index": "48,48,48,48,48,48,48,48",
+            "lanes": "376,377,378,379,380,381,382,383",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp48"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp48a", "etp48b"],
+                "4x100G[50G,25G,10G]": ["etp48a", "etp48b", "etp48c", "etp48d"],
+                "8x50G[25G,10G]": ["etp48a", "etp48b", "etp48c", "etp48d", "etp48e", "etp48f", "etp48g", "etp48h"]
+            }
+        },
+        "Ethernet384": {
+            "index": "49,49,49,49,49,49,49,49",
+            "lanes": "384,385,386,387,388,389,390,391",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp49"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp49a", "etp49b"],
+                "4x100G[50G,25G,10G]": ["etp49a", "etp49b", "etp49c", "etp49d"],
+                "8x50G[25G,10G]": ["etp49a", "etp49b", "etp49c", "etp49d", "etp49e", "etp49f", "etp49g", "etp49h"]
+            }
+        },
+        "Ethernet392": {
+            "index": "50,50,50,50,50,50,50,50",
+            "lanes": "392,393,394,395,396,397,398,399",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp50"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp50a", "etp50b"],
+                "4x100G[50G,25G,10G]": ["etp50a", "etp50b", "etp50c", "etp50d"],
+                "8x50G[25G,10G]": ["etp50a", "etp50b", "etp50c", "etp50d", "etp50e", "etp50f", "etp50g", "etp50h"]
+            }
+        },
+        "Ethernet400": {
+            "index": "51,51,51,51,51,51,51,51",
+            "lanes": "400,401,402,403,404,405,406,407",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp51"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp51a", "etp51b"],
+                "4x100G[50G,25G,10G]": ["etp51a", "etp51b", "etp51c", "etp51d"],
+                "8x50G[25G,10G]": ["etp51a", "etp51b", "etp51c", "etp51d", "etp51e", "etp51f", "etp51g", "etp51h"]
+            }
+        },
+        "Ethernet408": {
+            "index": "52,52,52,52,52,52,52,52",
+            "lanes": "408,409,410,411,412,413,414,415",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp52"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp52a", "etp52b"],
+                "4x100G[50G,25G,10G]": ["etp52a", "etp52b", "etp52c", "etp52d"],
+                "8x50G[25G,10G]": ["etp52a", "etp52b", "etp52c", "etp52d", "etp52e", "etp52f", "etp52g", "etp52h"]
+            }
+        },
+        "Ethernet416": {
+            "index": "53,53,53,53,53,53,53,53",
+            "lanes": "416,417,418,419,420,421,422,423",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp53"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp53a", "etp53b"],
+                "4x100G[50G,25G,10G]": ["etp53a", "etp53b", "etp53c", "etp53d"],
+                "8x50G[25G,10G]": ["etp53a", "etp53b", "etp53c", "etp53d", "etp53e", "etp53f", "etp53g", "etp53h"]
+            }
+        },
+        "Ethernet424": {
+            "index": "54,54,54,54,54,54,54,54",
+            "lanes": "424,425,426,427,428,429,430,431",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp54"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp54a", "etp54b"],
+                "4x100G[50G,25G,10G]": ["etp54a", "etp54b", "etp54c", "etp54d"],
+                "8x50G[25G,10G]": ["etp54a", "etp54b", "etp54c", "etp54d", "etp54e", "etp54f", "etp54g", "etp54h"]
+            }
+        },
+        "Ethernet432": {
+            "index": "55,55,55,55,55,55,55,55",
+            "lanes": "432,433,434,435,436,437,438,439",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp55"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp55a", "etp55b"],
+                "4x100G[50G,25G,10G]": ["etp55a", "etp55b", "etp55c", "etp55d"],
+                "8x50G[25G,10G]": ["etp55a", "etp55b", "etp55c", "etp55d", "etp55e", "etp55f", "etp55g", "etp55h"]
+            }
+        },
+        "Ethernet440": {
+            "index": "56,56,56,56,56,56,56,56",
+            "lanes": "440,441,442,443,444,445,446,447",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp56"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp56a", "etp56b"],
+                "4x100G[50G,25G,10G]": ["etp56a", "etp56b", "etp56c", "etp56d"],
+                "8x50G[25G,10G]": ["etp56a", "etp56b", "etp56c", "etp56d", "etp56e", "etp56f", "etp56g", "etp56h"]
+            }
+        },
+        "Ethernet448": {
+            "index": "57,57,57,57,57,57,57,57",
+            "lanes": "448,449,450,451,452,453,454,455",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp57"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp57a", "etp57b"],
+                "4x100G[50G,25G,10G]": ["etp57a", "etp57b", "etp57c", "etp57d"],
+                "8x50G[25G,10G]": ["etp57a", "etp57b", "etp57c", "etp57d", "etp57e", "etp57f", "etp57g", "etp57h"]
+            }
+        },
+        "Ethernet456": {
+            "index": "58,58,58,58,58,58,58,58",
+            "lanes": "456,457,458,459,460,461,462,463",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp58"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp58a", "etp58b"],
+                "4x100G[50G,25G,10G]": ["etp58a", "etp58b", "etp58c", "etp58d"],
+                "8x50G[25G,10G]": ["etp58a", "etp58b", "etp58c", "etp58d", "etp58e", "etp58f", "etp58g", "etp58h"]
+            }
+        },
+        "Ethernet464": {
+            "index": "59,59,59,59,59,59,59,59",
+            "lanes": "464,465,466,467,468,469,470,471",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp59"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp59a", "etp59b"],
+                "4x100G[50G,25G,10G]": ["etp59a", "etp59b", "etp59c", "etp59d"],
+                "8x50G[25G,10G]": ["etp59a", "etp59b", "etp59c", "etp59d", "etp59e", "etp59f", "etp59g", "etp59h"]
+            }
+        },
+        "Ethernet472": {
+            "index": "60,60,60,60,60,60,60,60",
+            "lanes": "472,473,474,475,476,477,478,479",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp60"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp60a", "etp60b"],
+                "4x100G[50G,25G,10G]": ["etp60a", "etp60b", "etp60c", "etp60d"],
+                "8x50G[25G,10G]": ["etp60a", "etp60b", "etp60c", "etp60d", "etp60e", "etp60f", "etp60g", "etp60h"]
+            }
+        },
+        "Ethernet480": {
+            "index": "61,61,61,61,61,61,61,61",
+            "lanes": "480,481,482,483,484,485,486,487",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp61"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp61a", "etp61b"],
+                "4x100G[50G,25G,10G]": ["etp61a", "etp61b", "etp61c", "etp61d"],
+                "8x50G[25G,10G]": ["etp61a", "etp61b", "etp61c", "etp61d", "etp61e", "etp61f", "etp61g", "etp61h"]
+            }
+        },
+        "Ethernet488": {
+            "index": "62,62,62,62,62,62,62,62",
+            "lanes": "488,489,490,491,492,493,494,495",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp62"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp62a", "etp62b"],
+                "4x100G[50G,25G,10G]": ["etp62a", "etp62b", "etp62c", "etp62d"],
+                "8x50G[25G,10G]": ["etp62a", "etp62b", "etp62c", "etp62d", "etp62e", "etp62f", "etp62g", "etp62h"]
+            }
+        },
+        "Ethernet496": {
+            "index": "63,63,63,63,63,63,63,63",
+            "lanes": "496,497,498,499,500,501,502,503",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp63"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp63a", "etp63b"],
+                "4x100G[50G,25G,10G]": ["etp63a", "etp63b", "etp63c", "etp63d"],
+                "8x50G[25G,10G]": ["etp63a", "etp63b", "etp63c", "etp63d", "etp63e", "etp63f", "etp63g", "etp63h"]
+            }
+        },
+        "Ethernet504": {
+            "index": "64,64,64,64,64,64,64,64",
+            "lanes": "504,505,506,507,508,509,510,511",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G]": ["etp64"],
+                "2x200G[100G,50G,40G,25G,10G]": ["etp64a", "etp64b"],
+                "4x100G[50G,25G,10G]": ["etp64a", "etp64b", "etp64c", "etp64d"],
+                "8x50G[25G,10G]": ["etp64a", "etp64b", "etp64c", "etp64d", "etp64e", "etp64f", "etp64g", "etp64h"]
+            }
+        },
+        "Ethernet512": {
+            "index": "65",
+            "lanes": "512",
+            "breakout_modes": {
+                "1x25G[10G]": ["etp65"]
+            }
+        },
+        "Ethernet513": {
+            "index": "66",
+            "lanes": "513",
+            "breakout_modes": {
+                "1x25G[10G]": ["etp66"]
+            }
+        }
+    }
+}
diff --git a/device/mellanox/x86_64-nvidia_sn5400_simx-r0/platform_asic b/device/mellanox/x86_64-nvidia_sn5400_simx-r0/platform_asic
new file mode 100644
index 000000000..70c074885
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5400_simx-r0/platform_asic
@@ -0,0 +1 @@
+mellanox
diff --git a/device/mellanox/x86_64-nvidia_sn5400_simx-r0/plugins/eeprom.py b/device/mellanox/x86_64-nvidia_sn5400_simx-r0/plugins/eeprom.py
new file mode 120000
index 000000000..b4e2a6a61
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5400_simx-r0/plugins/eeprom.py
@@ -0,0 +1 @@
+../../x86_64-mlnx_msn2700-r0/plugins/eeprom.py
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn5400_simx-r0/plugins/psuutil.py b/device/mellanox/x86_64-nvidia_sn5400_simx-r0/plugins/psuutil.py
new file mode 120000
index 000000000..9f724238a
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5400_simx-r0/plugins/psuutil.py
@@ -0,0 +1 @@
+../../x86_64-mlnx_msn2700-r0/plugins/psuutil.py
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn5400_simx-r0/plugins/sfplpmget.py b/device/mellanox/x86_64-nvidia_sn5400_simx-r0/plugins/sfplpmget.py
new file mode 120000
index 000000000..2e84f435a
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5400_simx-r0/plugins/sfplpmget.py
@@ -0,0 +1 @@
+../../x86_64-mlnx_msn2700-r0/plugins/sfplpmget.py
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn5400_simx-r0/plugins/sfplpmset.py b/device/mellanox/x86_64-nvidia_sn5400_simx-r0/plugins/sfplpmset.py
new file mode 120000
index 000000000..6a88bac30
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5400_simx-r0/plugins/sfplpmset.py
@@ -0,0 +1 @@
+../../x86_64-mlnx_msn2700-r0/plugins/sfplpmset.py
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn5400_simx-r0/plugins/sfpreset.py b/device/mellanox/x86_64-nvidia_sn5400_simx-r0/plugins/sfpreset.py
new file mode 120000
index 000000000..fef2063e3
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5400_simx-r0/plugins/sfpreset.py
@@ -0,0 +1 @@
+../../x86_64-mlnx_msn2700-r0/plugins/sfpreset.py
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn5400_simx-r0/plugins/sfputil.py b/device/mellanox/x86_64-nvidia_sn5400_simx-r0/plugins/sfputil.py
new file mode 120000
index 000000000..45909b880
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5400_simx-r0/plugins/sfputil.py
@@ -0,0 +1 @@
+../../x86_64-mlnx_msn2700-r0/plugins/sfputil.py
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn5400_simx-r0/pmon_daemon_control.json b/device/mellanox/x86_64-nvidia_sn5400_simx-r0/pmon_daemon_control.json
new file mode 120000
index 000000000..435a2ce7c
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5400_simx-r0/pmon_daemon_control.json
@@ -0,0 +1 @@
+../x86_64-mlnx_msn2700-r0/pmon_daemon_control.json
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn5400_simx-r0/syseeprom.hex b/device/mellanox/x86_64-nvidia_sn5400_simx-r0/syseeprom.hex
new file mode 100644
index 000000000..cfd9f9619
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5400_simx-r0/syseeprom.hex
@@ -0,0 +1,256 @@
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+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
diff --git a/device/mellanox/x86_64-nvidia_sn5400_simx-r0/system_health_monitoring_config.json b/device/mellanox/x86_64-nvidia_sn5400_simx-r0/system_health_monitoring_config.json
new file mode 120000
index 000000000..98df66c27
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5400_simx-r0/system_health_monitoring_config.json
@@ -0,0 +1 @@
+../x86_64-mlnx_msn2700-r0/system_health_monitoring_config.json
\ No newline at end of file
diff --git a/platform/mellanox/asic_table.j2 b/platform/mellanox/asic_table.j2
index 894b06128..76db12267 100644
--- a/platform/mellanox/asic_table.j2
+++ b/platform/mellanox/asic_table.j2
@@ -1,5 +1,5 @@
 {#
-    Copyright (c) 2020-2023 NVIDIA CORPORATION & AFFILIATES.
+    Copyright (c) 2020-2024 NVIDIA CORPORATION & AFFILIATES.
     Apache-2.0
 
     Licensed under the Apache License, Version 2.0 (the "License");
@@ -44,7 +44,9 @@
 	'x86_64-nvidia_sn4800-r0':'MELLANOX-SPECTRUM-3',
 	'x86_64-nvidia_sn4800_simx-r0':'MELLANOX-SPECTRUM-3',
         'x86_64-nvidia_sn2201-r0':'MELLANOX-SPECTRUM',
+        'x86_64-nvidia_sn5400-r0':'MELLANOX-SPECTRUM-4',
         'x86_64-nvidia_sn5600-r0':'MELLANOX-SPECTRUM-4',
+        'x86_64-nvidia_sn5400_simx-r0':'MELLANOX-SPECTRUM-4',
         'x86_64-nvidia_sn5600_simx-r0':'MELLANOX-SPECTRUM-4',
         'vs-platform':'vs'
     }
diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/device_data.py b/platform/mellanox/mlnx-platform-api/sonic_platform/device_data.py
index aeceb15d1..9c0550252 100644
--- a/platform/mellanox/mlnx-platform-api/sonic_platform/device_data.py
+++ b/platform/mellanox/mlnx-platform-api/sonic_platform/device_data.py
@@ -1,5 +1,5 @@
 #
-# Copyright (c) 2020-2023 NVIDIA CORPORATION & AFFILIATES.
+# Copyright (c) 2020-2024 NVIDIA CORPORATION & AFFILIATES.
 # Apache-2.0
 #
 # Licensed under the Apache License, Version 2.0 (the "License");
@@ -112,6 +112,14 @@
             }
         }
     },
+    'x86_64-nvidia_sn5400-r0': {
+        'thermal': {
+            "capability": {
+                "comex_amb": False,
+                "pch_temp": True
+            }
+        }
+    },
     'x86_64-nvidia_sn5600-r0': {
         'thermal': {
             "capability": {

From e6c73f4121aa4aedb0664ce523c9c88bfa95ad23 Mon Sep 17 00:00:00 2001
From: Saikrishna Arcot <sarcot@microsoft.com>
Date: Wed, 17 Apr 2024 09:03:17 -0500
Subject: [PATCH 0456/1115] Use the archive repo for Buster (#18678)

Why I did it
Buster is EOL, and the backports section has been removed from the main Debian repos. This also means that our default mirror (for non-snapshot builds) is also affected.

Work item tracking
Microsoft ADO (number only): 27691460
How I did it
Change to using archive.debian.org directly for Buster.

How to verify it
---
 scripts/build_mirror_config.sh | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/scripts/build_mirror_config.sh b/scripts/build_mirror_config.sh
index d6042da13..971390d00 100755
--- a/scripts/build_mirror_config.sh
+++ b/scripts/build_mirror_config.sh
@@ -25,6 +25,10 @@ if [ "$ARCHITECTURE" == "armhf" ]; then
     DEFAULT_MIRROR_SECURITY_URLS=http://deb.debian.org/debian-security/
 fi
 
+if [ "$DISTRIBUTION" == "buster" ]; then
+    DEFAULT_MIRROR_URLS=http://archive.debian.org/debian/
+fi
+
 if [ "$MIRROR_SNAPSHOT" == y ]; then
     if [ -f "$MIRROR_VERSION_FILE" ]; then
         DEBIAN_TIMESTAMP=$(grep "^debian==" $MIRROR_VERSION_FILE | tail -n 1 | sed 's/.*==//')

From 569e70af8fc704f4bef4bb1187824e0823b8e355 Mon Sep 17 00:00:00 2001
From: arista-nwolfe <94405414+arista-nwolfe@users.noreply.github.com>
Date: Wed, 17 Apr 2024 13:52:45 -0400
Subject: [PATCH 0457/1115] Prevent alias of recirc ports from colliding on
 multi-asic (#18610)

---
 .../Arista-7800R3A-36D2-C36/1/port_config.ini                 | 4 ++--
 .../Arista-7800R3A-36D2-C72/1/port_config.ini                 | 4 ++--
 .../Arista-7800R3A-36D2-D36/1/port_config.ini                 | 4 ++--
 3 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/1/port_config.ini b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/1/port_config.ini
index 4af1dc77b..e8fd3d790 100644
--- a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/1/port_config.ini
+++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/1/port_config.ini
@@ -17,5 +17,5 @@ Ethernet256    24,25,26,27       Ethernet33/1 33     Ext        100000      Eth1
 Ethernet264    16,17,18,19       Ethernet34/1 34     Ext        100000      Eth120             0           16              8
 Ethernet272    8,9,10,11         Ethernet35/1 35     Ext        100000      Eth128             0           17              8
 Ethernet280    0,1,2,3           Ethernet36/1 36     Ext        100000      Eth136             0           18              8
-Ethernet-Rec1  249               Recirc0/0    39     Rec        400000      Rcy0               0           49              8
-Ethernet-IB1   250               Recirc0/1    40     Inb        400000      Rcy1               1           50              8
+Ethernet-Rec1  249               Recirc1/0    39     Rec        400000      Rcy0               0           49              8
+Ethernet-IB1   250               Recirc1/1    40     Inb        400000      Rcy1               1           50              8
diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/1/port_config.ini b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/1/port_config.ini
index 53988f0b7..136661287 100644
--- a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/1/port_config.ini
+++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/1/port_config.ini
@@ -35,5 +35,5 @@ Ethernet272    8,9,10,11         Ethernet35/1 35     Ext        100000      Eth2
 Ethernet276    12,13,14,15       Ethernet35/5 35     Ext        100000      Eth276             0           34              8
 Ethernet280    0,1,2,3           Ethernet36/1 36     Ext        100000      Eth280             0           35              8
 Ethernet284    4,5,6,7           Ethernet36/5 36     Ext        100000      Eth284             0           36              8
-Ethernet-Rec1  221               Recirc0/0    39     Rec        400000      Rcy0               0           221             8
-Ethernet-IB1   222               Recirc0/1    40     Inb        400000      Rcy1               1           222             8
+Ethernet-Rec1  221               Recirc1/0    39     Rec        400000      Rcy0               0           221             8
+Ethernet-IB1   222               Recirc1/1    40     Inb        400000      Rcy1               1           222             8
diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/1/port_config.ini b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/1/port_config.ini
index 6e6b7765b..7416fc328 100644
--- a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/1/port_config.ini
+++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/1/port_config.ini
@@ -17,5 +17,5 @@ Ethernet256    24,25,26,27,28,29,30,31           Ethernet33/1 33     Ext
 Ethernet264    16,17,18,19,20,21,22,23           Ethernet34/1 34     Ext        400000      Eth120             0           16              8
 Ethernet272    8,9,10,11,12,13,14,15             Ethernet35/1 35     Ext        400000      Eth128             0           17              8
 Ethernet280    0,1,2,3,4,5,6,7                   Ethernet36/1 36     Ext        400000      Eth136             0           18              8
-Ethernet-Rec1  249                               Recirc0/0    39     Rec        400000      Rcy0               0           49              8
-Ethernet-IB1   250                               Recirc0/1    40     Inb        400000      Rcy1               1           50              8
+Ethernet-Rec1  249                               Recirc1/0    39     Rec        400000      Rcy0               0           49              8
+Ethernet-IB1   250                               Recirc1/1    40     Inb        400000      Rcy1               1           50              8

From 9deea7b96f097fff7972ead2d0200887c5456853 Mon Sep 17 00:00:00 2001
From: "Marty Y. Lok" <76118573+mlok-nokia@users.noreply.github.com>
Date: Wed, 17 Apr 2024 17:15:12 -0400
Subject: [PATCH 0458/1115] [Nokia-IXR7250E][bookworm] Enable bookworm build
 for Nokia-IXR7250E platform (#18243)

Enable the bookworm image build for platform Nokia-IXR7250E

Signed-off-by: mlok <marty.lok@nokia.com>
---
 platform/broadcom/rules.mk | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/platform/broadcom/rules.mk b/platform/broadcom/rules.mk
index ddf04c37c..3f1d35c89 100755
--- a/platform/broadcom/rules.mk
+++ b/platform/broadcom/rules.mk
@@ -5,7 +5,7 @@ include $(PLATFORM_PATH)/sai.mk
 # * Juniper
 # * Ragile
 # * Ufispace
-#include $(PLATFORM_PATH)/platform-modules-nokia.mk
+include $(PLATFORM_PATH)/platform-modules-nokia.mk
 include $(PLATFORM_PATH)/platform-modules-dell.mk
 include $(PLATFORM_PATH)/platform-modules-arista.mk
 #include $(PLATFORM_PATH)/platform-modules-ingrasys.mk

From f2c692c200e6b072749d096909918f6be24e6366 Mon Sep 17 00:00:00 2001
From: Hua Liu <58683130+liuh-80@users.noreply.github.com>
Date: Thu, 18 Apr 2024 09:35:53 +0800
Subject: [PATCH 0459/1115] Fix smart switch check command in gnmi and
 orchagent start script. (#18663)

Fix smart switch check command in gnmi and orchagent start script.

#### Why I did it
Smart switch check command in gnmi and orchagent start script check wrong Redis table.

#### How I did it
Change smart switch check command check "DEVICE_METADATA|localhost" table.

#### How to verify it
Pass all UT & E2E test
---
 dockers/docker-orchagent/orchagent.sh    | 14 ++++++++++++--
 dockers/docker-sonic-gnmi/gnmi-native.sh |  4 ++--
 2 files changed, 14 insertions(+), 4 deletions(-)

diff --git a/dockers/docker-orchagent/orchagent.sh b/dockers/docker-orchagent/orchagent.sh
index 883864dbd..79434668d 100755
--- a/dockers/docker-orchagent/orchagent.sh
+++ b/dockers/docker-orchagent/orchagent.sh
@@ -73,9 +73,19 @@ else
 fi
 
 # Enable ZMQ for SmartSwitch
-LOCALHOST_SUBTYPE=`sonic-db-cli CONFIG_DB hget localhost "subtype"`
+LOCALHOST_SUBTYPE=`sonic-db-cli CONFIG_DB hget "DEVICE_METADATA|localhost" "subtype"`
 if [[ x"${LOCALHOST_SUBTYPE}" == x"SmartSwitch" ]]; then
-    ORCHAGENT_ARGS+=" -q tcp://127.0.0.1:8100"
+    midplane_mgmt_ip=$( ip -json -4 addr show eth0-midplane | jq -r ".[0].addr_info[0].local" )
+    mgmt_ip=$( ip -json -4 addr show eth0 | jq -r ".[0].addr_info[0].local" )
+    if [[ $midplane_ip != "" ]]; then
+        # Enable ZMQ with eth0-midplane address
+        ORCHAGENT_ARGS+=" -q tcp://${midplane_mgmt_ip}:8100"
+    elif [[ $mgmt_ip != "" ]]; then
+        # If eth0-midplane interface does not exist, enable ZMQ with eth0 address
+        ORCHAGENT_ARGS+=" -q tcp://${mgmt_ip}:8100"
+    else
+        ORCHAGENT_ARGS+=" -q tcp://127.0.0.1:8100"
+    fi
 fi
 
 exec /usr/bin/orchagent ${ORCHAGENT_ARGS}
diff --git a/dockers/docker-sonic-gnmi/gnmi-native.sh b/dockers/docker-sonic-gnmi/gnmi-native.sh
index ea5b88f44..d9bab2700 100755
--- a/dockers/docker-sonic-gnmi/gnmi-native.sh
+++ b/dockers/docker-sonic-gnmi/gnmi-native.sh
@@ -71,9 +71,9 @@ else
 fi
 
 # Enable ZMQ for SmartSwitch
-LOCALHOST_SUBTYPE=`sonic-db-cli CONFIG_DB hget localhost "subtype"`
+LOCALHOST_SUBTYPE=`sonic-db-cli CONFIG_DB hget "DEVICE_METADATA|localhost" "subtype"`
 if [[ x"${LOCALHOST_SUBTYPE}" == x"SmartSwitch" ]]; then
-    TELEMETRY_ARGS+=" -zmq_address=tcp://127.0.0.1:8100"
+    TELEMETRY_ARGS+=" -zmq_port=8100"
 fi
 
 # Server will handle threshold connections consecutively

From d87ff4690402a38bb4209ee113da8de0f62275c8 Mon Sep 17 00:00:00 2001
From: saksarav-nokia <sakthivadivu.saravanaraj@nokia.com>
Date: Thu, 18 Apr 2024 01:19:49 -0400
Subject: [PATCH 0460/1115] Wait till CHASIS_APP_DB PING is successful, 
 host_name and asic_name are valid in CONIFG_DB before starting
 chassis-db-cleanup (#17962)

This PR fixes the issue reported in Issu #17945
We noticed that chassis db clean up is skipped sometimes when the CHASSIS_APP_DB PING fails. Also if host_name and asic_name are not written to CONIG_DB, it could pass the empty strings to CHASSIS_APP_DB EVAL commands.
The service hostname-config.service is restarted whenever the config-reload or load-minigraph is done and this services renames the file /etc/hosts to updates it with the new file. This interferes with swss@.service and when swss.sh script CHASSIS_APP_DPP when the /etc/hosts file is renamed, the error "Unable to connect to redis: Cannot assign requested address" is seen and the CHASSIS_APP_DB EVAL command fails. This causes the chassis db entries not getting cleaned up and causes orchagent crash in remote LC's.

---------

Signed-off-by: saksarav <sakthivadivu.saravanaraj@nokia.com>
---
 files/image_config/hostname/hostname-config.sh |  8 +++++++-
 files/scripts/swss.sh                          | 17 ++++++++++++++---
 2 files changed, 21 insertions(+), 4 deletions(-)

diff --git a/files/image_config/hostname/hostname-config.sh b/files/image_config/hostname/hostname-config.sh
index c2a4f1e54..5f4bfede2 100755
--- a/files/image_config/hostname/hostname-config.sh
+++ b/files/image_config/hostname/hostname-config.sh
@@ -11,10 +11,16 @@ fi
 echo $HOSTNAME > /etc/hostname
 hostname -F /etc/hostname
 
+#Don't update the /etc/hosts if hostname is not changed
+#This is to prevent intermittent redis_chassis.server reachability issue
+if [ $CURRENT_HOSTNAME == $HOSTNAME ] ;  then
+    exit 0
+fi
+
 # Remove the old hostname entry from hosts file.
 # But, 'localhost' entry is used by multiple applications. Don't remove it altogether.
 # Edit contents of /etc/hosts and put in /etc/hosts.new
-if [ $CURRENT_HOSTNAME  != "localhost" ] || [ $CURRENT_HOSTNAME == $HOSTNAME ] ;  then
+if [ $CURRENT_HOSTNAME  != "localhost" ] ;  then
     sed "/\s$CURRENT_HOSTNAME$/d" /etc/hosts > /etc/hosts.new
 else
     cp -f /etc/hosts /etc/hosts.new
diff --git a/files/scripts/swss.sh b/files/scripts/swss.sh
index 728f36f4b..0d73663b7 100755
--- a/files/scripts/swss.sh
+++ b/files/scripts/swss.sh
@@ -132,12 +132,23 @@ function clean_up_chassis_db_tables()
         return
     fi
 
-    if [[ !($($SONIC_DB_CLI CHASSIS_APP_DB PING | grep -c True) -gt 0) ]]; then
-        return
-    fi
+    until [[ $($SONIC_DB_CLI CHASSIS_APP_DB PING | grep -c True) -gt 0 ]]; do
+        sleep 1
+    done
 
     lc=`$SONIC_DB_CLI CONFIG_DB  hget 'DEVICE_METADATA|localhost' 'hostname'`
+    until [[ -n "${lc}" ]]; do
+        lc=`$SONIC_DB_CLI CONFIG_DB  hget 'DEVICE_METADATA|localhost' 'hostname'`
+        sleep 1
+    done
+    debug "Chassis db clean up for ${SERVICE}$DEV. hostname=$lc"
+
     asic=`$SONIC_DB_CLI CONFIG_DB  hget 'DEVICE_METADATA|localhost' 'asic_name'`
+    until [[ -n "${asic}" ]]; do
+        asic=`$SONIC_DB_CLI CONFIG_DB  hget 'DEVICE_METADATA|localhost' 'asic_name'`
+        sleep 1
+    done
+    debug "Chassis db clean up for ${SERVICE}$DEV. asic=$asic"
 
     # First, delete SYSTEM_NEIGH entries
     num_neigh=`$SONIC_DB_CLI CHASSIS_APP_DB EVAL "

From a5281fbc31efbce52f12fe6e64a36ce75278a1e7 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Thu, 18 Apr 2024 19:01:03 +0800
Subject: [PATCH 0461/1115] [submodule] Update submodule sonic-platform-daemons
 to the latest HEAD automatically (#18707)

#### Why I did it
src/sonic-platform-daemons
```
* 0f61e15 - (HEAD -> master, origin/master, origin/HEAD) [chassis][linecard] Fix Module LINECARD<> went off-line message for empty slot issue (#462) (8 hours ago) [Marty Y. Lok]
* 25e22cd - Support to get MEDIA_SETTING and OPTICS_SI from both platform folder and HWSKU folder (#456) (21 hours ago) [Kebo Liu]
* 805c76a - [xcvrd] Ignore processing ports that are not front-panel (#455) (21 hours ago) [Vivek]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-platform-daemons | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-platform-daemons b/src/sonic-platform-daemons
index b5f838dc5..0f61e1522 160000
--- a/src/sonic-platform-daemons
+++ b/src/sonic-platform-daemons
@@ -1 +1 @@
-Subproject commit b5f838dc5009cbe4f9b87b18441f47dd9283268b
+Subproject commit 0f61e15220113b4f5df13d0eb2bdb9a92833baf4

From 6ce4a694358f1ede1d1a9af1e960dfa1ebdfaa39 Mon Sep 17 00:00:00 2001
From: Neetha John <nejo@microsoft.com>
Date: Thu, 18 Apr 2024 13:15:45 -0700
Subject: [PATCH 0462/1115] Restructure Arista-7260CX3-D92C16 hwsku to use
 common Th2 profile (#18687)

* Restructure Arista-7260CX3-D92C16 hwsku to use common Th2 profile

Signed-off-by: Neetha John <nejo@microsoft.com>
---
 .../Arista-7260CX3-D92C16                     |    1 -
 .../Arista-7260CX3-D92C16/BALANCED            |    1 +
 .../Arista-7260CX3-D92C16/RDMA-CENTRIC        |    1 +
 .../Arista-7260CX3-D92C16/TCP-CENTRIC         |    1 +
 .../Arista-7260CX3-D92C16/buffer_ports_t0.j2  |   21 +
 .../Arista-7260CX3-D92C16/buffers.json.j2     |    3 +
 .../buffers_defaults_t0.j2                    |    1 +
 .../buffers_extra_queues.j2                   |   38 +
 .../buffers_pool_sizes_t0.j2                  |    8 +
 .../pg_profile_lookup.ini                     |    1 +
 .../Arista-7260CX3-D92C16/port_config.ini     |  115 +
 .../Arista-7260CX3-D92C16/qos.json.j2         |    1 +
 .../Arista-7260CX3-D92C16/sai.profile         |    1 +
 .../th2-a7260cx3-64-96x50G+16x100G.config.bcm |  925 ++++++++
 .../tests/sample-arista-7260-t0-minigraph.xml | 1857 +++++++++++++++++
 .../py2/buffer-arista7260-t0.json             |  426 ++++
 .../sample_output/py2/qos-arista7260-t0.json  |  822 ++++++++
 .../py3/buffer-arista7260-t0.json             |  426 ++++
 .../sample_output/py3/qos-arista7260-t0.json  |  822 ++++++++
 src/sonic-config-engine/tests/test_j2files.py |    6 +
 20 files changed, 5476 insertions(+), 1 deletion(-)
 delete mode 120000 device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D92C16
 create mode 120000 device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D92C16/BALANCED
 create mode 120000 device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D92C16/RDMA-CENTRIC
 create mode 120000 device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D92C16/TCP-CENTRIC
 create mode 100644 device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D92C16/buffer_ports_t0.j2
 create mode 100644 device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D92C16/buffers.json.j2
 create mode 120000 device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D92C16/buffers_defaults_t0.j2
 create mode 100644 device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D92C16/buffers_extra_queues.j2
 create mode 100644 device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D92C16/buffers_pool_sizes_t0.j2
 create mode 120000 device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D92C16/pg_profile_lookup.ini
 create mode 100644 device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D92C16/port_config.ini
 create mode 120000 device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D92C16/qos.json.j2
 create mode 100644 device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D92C16/sai.profile
 create mode 100644 device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D92C16/th2-a7260cx3-64-96x50G+16x100G.config.bcm
 create mode 100644 src/sonic-config-engine/tests/sample-arista-7260-t0-minigraph.xml
 create mode 100644 src/sonic-config-engine/tests/sample_output/py2/buffer-arista7260-t0.json
 create mode 100644 src/sonic-config-engine/tests/sample_output/py2/qos-arista7260-t0.json
 create mode 100644 src/sonic-config-engine/tests/sample_output/py3/buffer-arista7260-t0.json
 create mode 100644 src/sonic-config-engine/tests/sample_output/py3/qos-arista7260-t0.json

diff --git a/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D92C16 b/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D92C16
deleted file mode 120000
index fd5bbe75f..000000000
--- a/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D92C16
+++ /dev/null
@@ -1 +0,0 @@
-Arista-7260CX3-D96C16
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D92C16/BALANCED b/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D92C16/BALANCED
new file mode 120000
index 000000000..a270c70ff
--- /dev/null
+++ b/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D92C16/BALANCED
@@ -0,0 +1 @@
+../../../common/profiles/th2/7260/BALANCED
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D92C16/RDMA-CENTRIC b/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D92C16/RDMA-CENTRIC
new file mode 120000
index 000000000..8d1ec6d27
--- /dev/null
+++ b/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D92C16/RDMA-CENTRIC
@@ -0,0 +1 @@
+../../../common/profiles/th2/7260/RDMA-CENTRIC
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D92C16/TCP-CENTRIC b/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D92C16/TCP-CENTRIC
new file mode 120000
index 000000000..7ee783aac
--- /dev/null
+++ b/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D92C16/TCP-CENTRIC
@@ -0,0 +1 @@
+../../../common/profiles/th2/7260/TCP-CENTRIC
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D92C16/buffer_ports_t0.j2 b/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D92C16/buffer_ports_t0.j2
new file mode 100644
index 000000000..7e4518bae
--- /dev/null
+++ b/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D92C16/buffer_ports_t0.j2
@@ -0,0 +1,21 @@
+{%- macro generate_port_lists(PORT_ALL) %}
+    {# Generate list of ports #}
+    {%- for port_idx in range(0,12) %}
+        {%- if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{%- endif %}
+        {%- if PORT_ALL.append("Ethernet%d" % (port_idx * 4 + 2)) %}{%- endif %}
+    {%- endfor %}
+    {%- for port_idx in range(12,20) %}
+        {%- if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{%- endif %}
+    {%- endfor %}
+    {%- for port_idx in range(20,44) %}
+        {%- if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{%- endif %}
+        {%- if PORT_ALL.append("Ethernet%d" % (port_idx * 4 + 2)) %}{%- endif %}
+    {%- endfor %}
+    {%- for port_idx in range(44,52) %}
+        {%- if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{%- endif %}
+    {%- endfor %}
+    {%- for port_idx in range(52,64) %}
+        {%- if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{%- endif %}
+        {%- if PORT_ALL.append("Ethernet%d" % (port_idx * 4 + 2)) %}{%- endif %}
+    {%- endfor %}
+{%- endmacro %}
diff --git a/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D92C16/buffers.json.j2 b/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D92C16/buffers.json.j2
new file mode 100644
index 000000000..e6e9e8444
--- /dev/null
+++ b/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D92C16/buffers.json.j2
@@ -0,0 +1,3 @@
+{%- set default_topo = 't0' %}
+{%- include 'buffers_config.j2' %}
+
diff --git a/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D92C16/buffers_defaults_t0.j2 b/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D92C16/buffers_defaults_t0.j2
new file mode 120000
index 000000000..9524e6a47
--- /dev/null
+++ b/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D92C16/buffers_defaults_t0.j2
@@ -0,0 +1 @@
+BALANCED/buffers_defaults_t0.j2
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D92C16/buffers_extra_queues.j2 b/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D92C16/buffers_extra_queues.j2
new file mode 100644
index 000000000..3ad6c5b9b
--- /dev/null
+++ b/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D92C16/buffers_extra_queues.j2
@@ -0,0 +1,38 @@
+{% if DEVICE_METADATA is defined and 'type' in DEVICE_METADATA['localhost'] and 
+(DEVICE_METADATA['localhost']['type'] == 'LeafRouter' or DEVICE_METADATA['localhost']['subtype'] == 'DualToR') %}
+{%- macro generate_queue_buffers_with_extra_lossless_queues(port_names, port_names_require_extra_buffer) %}
+    "BUFFER_QUEUE": {
+{% for port in port_names.split(',') %}
+{% if port in port_names_require_extra_buffer.split(',') %}
+        "{{ port }}|0-1": {
+            "profile" : "egress_lossy_profile"
+        },
+        "{{ port }}|2-4": {
+            "profile" : "egress_lossless_profile"
+        },
+        "{{ port }}|5": {
+            "profile" : "egress_lossy_profile"
+        },
+        "{{ port }}|6": {
+            "profile" : "egress_lossless_profile"
+        },
+        "{{ port }}|7": {
+            "profile" : "egress_lossy_profile"
+        }{% if not loop.last %},{% endif %}
+
+{% else %}
+        "{{ port }}|0-2": {
+            "profile" : "egress_lossy_profile"
+        },
+        "{{ port }}|3-4": {
+            "profile" : "egress_lossless_profile"
+        },
+        "{{ port }}|5-7": {
+            "profile" : "egress_lossy_profile"
+        }{% if not loop.last %},{% endif %}
+
+{% endif %}
+{% endfor %}
+    }
+{% endmacro %}
+{% endif %}
diff --git a/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D92C16/buffers_pool_sizes_t0.j2 b/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D92C16/buffers_pool_sizes_t0.j2
new file mode 100644
index 000000000..bd82c947e
--- /dev/null
+++ b/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D92C16/buffers_pool_sizes_t0.j2
@@ -0,0 +1,8 @@
+{%- set ingress_lossless_pool_size = '33329088' %}
+{%- set egress_lossy_pool_size = '26663272' %}
+
+{%- if ((SYSTEM_DEFAULTS is defined) and ('tunnel_qos_remap' in SYSTEM_DEFAULTS) and (SYSTEM_DEFAULTS['tunnel_qos_remap']['status'] == 'enabled')) and
+((DEVICE_METADATA is defined) and ('localhost' in DEVICE_METADATA) and ('subtype' in DEVICE_METADATA['localhost']) and (DEVICE_METADATA['localhost']['subtype'] == 'DualToR')) %}
+    {%- set ingress_lossless_pool_size = '33169344' %}
+    {%- set egress_lossy_pool_size = '26535808' %}
+{%- endif %}
diff --git a/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D92C16/pg_profile_lookup.ini b/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D92C16/pg_profile_lookup.ini
new file mode 120000
index 000000000..297cddb2d
--- /dev/null
+++ b/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D92C16/pg_profile_lookup.ini
@@ -0,0 +1 @@
+BALANCED/pg_profile_lookup.ini
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D92C16/port_config.ini b/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D92C16/port_config.ini
new file mode 100644
index 000000000..49bd6fd68
--- /dev/null
+++ b/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D92C16/port_config.ini
@@ -0,0 +1,115 @@
+# name          lanes             alias        index  speed
+Ethernet0       77,78             Ethernet1/1  1      50000
+Ethernet2       79,80             Ethernet1/3  1      50000
+Ethernet4       65,66             Ethernet2/1  2      50000
+Ethernet6       67,68             Ethernet2/3  2      50000
+Ethernet8       85,86             Ethernet3/1  3      50000
+Ethernet10      87,88             Ethernet3/3  3      50000
+Ethernet12      89,90             Ethernet4/1  4      50000
+Ethernet14      91,92             Ethernet4/3  4      50000
+Ethernet16      109,110           Ethernet5/1  5      50000
+Ethernet18      111,112           Ethernet5/3  5      50000
+Ethernet20      97,98             Ethernet6/1  6      50000
+Ethernet22      99,100            Ethernet6/3  6      50000
+Ethernet24      5,6               Ethernet7/1  7      50000
+Ethernet26      7,8               Ethernet7/3  7      50000
+Ethernet28      13,14             Ethernet8/1  8      50000
+Ethernet30      15,16             Ethernet8/3  8      50000
+Ethernet32      25,26             Ethernet9/1  9      50000
+Ethernet34      27,28             Ethernet9/3  9      50000
+Ethernet36      21,22             Ethernet10/1 10     50000
+Ethernet38      23,24             Ethernet10/3 10     50000
+Ethernet40      37,38             Ethernet11/1 11     50000
+Ethernet42      39,40             Ethernet11/3 11     50000
+Ethernet44      45,46             Ethernet12/1 12     50000
+Ethernet46      47,48             Ethernet12/3 12     50000
+Ethernet48      57,58,59,60       Ethernet13/1 13     100000
+Ethernet52      53,54,55,56       Ethernet14/1 14     100000
+Ethernet56      117,118,119,120   Ethernet15/1 15     100000
+Ethernet60      121,122,123,124   Ethernet16/1 16     100000
+Ethernet64      141,142,143,144   Ethernet17/1 17     100000
+Ethernet68      133,134,135,136   Ethernet18/1 18     100000
+Ethernet72      197,198,199,200   Ethernet19/1 19     100000
+Ethernet76      205,206,207,208   Ethernet20/1 20     100000
+Ethernet80      217,218           Ethernet21/1 21     50000
+Ethernet82      219,220           Ethernet21/3 21     50000
+Ethernet84      213,214           Ethernet22/1 22     50000
+Ethernet86      215,216           Ethernet22/3 22     50000
+Ethernet88      229,230           Ethernet23/1 23     50000
+Ethernet90      231,232           Ethernet23/3 23     50000
+Ethernet92      237,238           Ethernet24/1 24     50000
+Ethernet94      239,240           Ethernet24/3 24     50000
+Ethernet96      249,250           Ethernet25/1 25     50000
+Ethernet98      251,252           Ethernet25/3 25     50000
+Ethernet100     245,246           Ethernet26/1 26     50000
+Ethernet102     247,248           Ethernet26/3 26     50000
+Ethernet104     149,150           Ethernet27/1 27     50000
+Ethernet106     151,152           Ethernet27/3 27     50000
+Ethernet108     153,154           Ethernet28/1 28     50000
+Ethernet110     155,156           Ethernet28/3 28     50000
+Ethernet112     173,174           Ethernet29/1 29     50000
+Ethernet114     175,176           Ethernet29/3 29     50000
+Ethernet116     161,162           Ethernet30/1 30     50000
+Ethernet118     163,164           Ethernet30/3 30     50000
+Ethernet120     181,182           Ethernet31/1 31     50000
+Ethernet122     183,184           Ethernet31/3 31     50000
+Ethernet124     185,186           Ethernet32/1 32     50000
+Ethernet126     187,188           Ethernet32/3 32     50000
+Ethernet128     69,70             Ethernet33/1 33     50000
+Ethernet130     71,72             Ethernet33/3 33     50000
+Ethernet132     73,74             Ethernet34/1 34     50000
+Ethernet134     75,76             Ethernet34/3 34     50000
+Ethernet136     93,94             Ethernet35/1 35     50000
+Ethernet138     95,96             Ethernet35/3 35     50000
+Ethernet140     81,82             Ethernet36/1 36     50000
+Ethernet142     83,84             Ethernet36/3 36     50000
+Ethernet144     101,102           Ethernet37/1 37     50000
+Ethernet146     103,104           Ethernet37/3 37     50000
+Ethernet148     105,106           Ethernet38/1 38     50000
+Ethernet150     107,108           Ethernet38/3 38     50000
+Ethernet152     9,10              Ethernet39/1 39     50000
+Ethernet154     11,12             Ethernet39/3 39     50000
+Ethernet156     1,2               Ethernet40/1 40     50000
+Ethernet158     3,4               Ethernet40/3 40     50000
+Ethernet160     17,18             Ethernet41/1 41     50000
+Ethernet162     19,20             Ethernet41/3 41     50000
+Ethernet164     29,30             Ethernet42/1 42     50000
+Ethernet166     31,32             Ethernet42/3 42     50000
+Ethernet168     41,42             Ethernet43/1 43     50000
+Ethernet170     43,44             Ethernet43/3 43     50000
+Ethernet172     33,34             Ethernet44/1 44     50000
+Ethernet174     35,36             Ethernet44/3 44     50000
+Ethernet176     49,50,51,52       Ethernet45/1 45     100000
+Ethernet180     61,62,63,64       Ethernet46/1 46     100000
+Ethernet184     125,126,127,128   Ethernet47/1 47     100000
+Ethernet188     113,114,115,116   Ethernet48/1 48     100000
+Ethernet192     129,130,131,132   Ethernet49/1 49     100000
+Ethernet196     137,138,139,140   Ethernet50/1 50     100000
+Ethernet200     201,202,203,204   Ethernet51/1 51     100000
+Ethernet204     193,194,195,196   Ethernet52/1 52     100000
+Ethernet208     209,210           Ethernet53/1 53     50000
+Ethernet210     211,212           Ethernet53/3 53     50000
+Ethernet212     221,222           Ethernet54/1 54     50000
+Ethernet214     223,224           Ethernet54/3 54     50000
+Ethernet216     233,234           Ethernet55/1 55     50000
+Ethernet218     235,236           Ethernet55/3 55     50000
+Ethernet220     225,226           Ethernet56/1 56     50000
+Ethernet222     227,228           Ethernet56/3 56     50000
+Ethernet224     241,242           Ethernet57/1 57     50000
+Ethernet226     243,244           Ethernet57/3 57     50000
+Ethernet228     253,254           Ethernet58/1 58     50000
+Ethernet230     255,256           Ethernet58/3 58     50000
+Ethernet232     157,158           Ethernet59/1 59     50000
+Ethernet234     159,160           Ethernet59/3 59     50000
+Ethernet236     145,146           Ethernet60/1 60     50000
+Ethernet238     147,148           Ethernet60/3 60     50000
+Ethernet240     165,166           Ethernet61/1 61     50000
+Ethernet242     167,168           Ethernet61/3 61     50000
+Ethernet244     169,170           Ethernet62/1 62     50000
+Ethernet246     171,172           Ethernet62/3 62     50000
+Ethernet248     189,190           Ethernet63/1 63     50000
+Ethernet250     191,192           Ethernet63/3 63     50000
+Ethernet252     177,178           Ethernet64/1 64     50000
+Ethernet254     179,180           Ethernet64/3 64     50000
+Ethernet256     257               Ethernet65   65     10000
+Ethernet260     259               Ethernet66   66     10000
diff --git a/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D92C16/qos.json.j2 b/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D92C16/qos.json.j2
new file mode 120000
index 000000000..aef6b6765
--- /dev/null
+++ b/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D92C16/qos.json.j2
@@ -0,0 +1 @@
+BALANCED/qos.json.j2
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D92C16/sai.profile b/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D92C16/sai.profile
new file mode 100644
index 000000000..d18e31d2c
--- /dev/null
+++ b/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D92C16/sai.profile
@@ -0,0 +1 @@
+SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th2-a7260cx3-64-96x50G+16x100G.config.bcm
diff --git a/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D92C16/th2-a7260cx3-64-96x50G+16x100G.config.bcm b/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D92C16/th2-a7260cx3-64-96x50G+16x100G.config.bcm
new file mode 100644
index 000000000..5a298ed9b
--- /dev/null
+++ b/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D92C16/th2-a7260cx3-64-96x50G+16x100G.config.bcm
@@ -0,0 +1,925 @@
+sai_tunnel_support=1
+l3_alpm_hit_skip=1
+sai_adjust_acl_drop_in_rx_drop=1
+PHY_AN_ALLOW_PLL_CHANGE=1
+arl_clean_timeout_usec=15000000
+asf_mem_profile=2
+bcm_num_cos=10
+bcm_stat_flags=1
+bcm_stat_jumbo=9236
+cdma_timeout_usec=15000000
+core_clock_frequency=1700
+dma_desc_timeout_usec=15000000
+dpp_clock_ratio=2:3
+higig2_hdr_mode=1
+ipv6_lpm_128b_enable=1
+l3_alpm_enable=2
+lpm_scaling_enable=0
+l2xmsg_mode=1
+max_vp_lags=0
+mem_scan_enable=1
+miim_intr_enable=0
+module_64ports=1
+os=unix
+oversubscribe_mode=1
+pbmp_xport_xe=0xfffffffd3fffffff4fffffffc7ffffffe
+#pbmp_xport_xe=0x47fffffff1fffffffcfffffffe7ffffffe
+phy_an_allow_pll_change_hg=0
+phy_an_c73=1
+phy_chain_rx_lane_map_physical{1.0}=0x3210
+phy_chain_rx_lane_map_physical{101.0}=0x0123
+phy_chain_rx_lane_map_physical{105.0}=0x0123
+phy_chain_rx_lane_map_physical{109.0}=0x0123
+phy_chain_rx_lane_map_physical{113.0}=0x2301
+phy_chain_rx_lane_map_physical{117.0}=0x3210
+phy_chain_rx_lane_map_physical{121.0}=0x3210
+phy_chain_rx_lane_map_physical{125.0}=0x1203
+phy_chain_rx_lane_map_physical{129.0}=0x3210
+phy_chain_rx_lane_map_physical{13.0}=0x0321
+phy_chain_rx_lane_map_physical{133.0}=0x1032
+phy_chain_rx_lane_map_physical{137.0}=0x3210
+phy_chain_rx_lane_map_physical{141.0}=0x0123
+phy_chain_rx_lane_map_physical{145.0}=0x3210
+phy_chain_rx_lane_map_physical{149.0}=0x2310
+phy_chain_rx_lane_map_physical{153.0}=0x0132
+phy_chain_rx_lane_map_physical{157.0}=0x1302
+phy_chain_rx_lane_map_physical{161.0}=0x3021
+phy_chain_rx_lane_map_physical{165.0}=0x2031
+phy_chain_rx_lane_map_physical{169.0}=0x2031
+phy_chain_rx_lane_map_physical{17.0}=0x3210
+phy_chain_rx_lane_map_physical{173.0}=0x1302
+phy_chain_rx_lane_map_physical{177.0}=0x2031
+phy_chain_rx_lane_map_physical{181.0}=0x0213
+phy_chain_rx_lane_map_physical{185.0}=0x0213
+phy_chain_rx_lane_map_physical{189.0}=0x1302
+phy_chain_rx_lane_map_physical{193.0}=0x3120
+phy_chain_rx_lane_map_physical{197.0}=0x0231
+phy_chain_rx_lane_map_physical{201.0}=0x2031
+phy_chain_rx_lane_map_physical{205.0}=0x0213
+phy_chain_rx_lane_map_physical{209.0}=0x2013
+phy_chain_rx_lane_map_physical{21.0}=0x3021
+phy_chain_rx_lane_map_physical{213.0}=0x3021
+phy_chain_rx_lane_map_physical{217.0}=0x0231
+phy_chain_rx_lane_map_physical{221.0}=0x2031
+phy_chain_rx_lane_map_physical{225.0}=0x1203
+phy_chain_rx_lane_map_physical{229.0}=0x1230
+phy_chain_rx_lane_map_physical{233.0}=0x3021
+phy_chain_rx_lane_map_physical{237.0}=0x1032
+phy_chain_rx_lane_map_physical{241.0}=0x2301
+phy_chain_rx_lane_map_physical{245.0}=0x0321
+phy_chain_rx_lane_map_physical{249.0}=0x2301
+phy_chain_rx_lane_map_physical{25.0}=0x2301
+phy_chain_rx_lane_map_physical{253.0}=0x2301
+phy_chain_rx_lane_map_physical{257.0}=0x3210
+phy_chain_rx_lane_map_physical{29.0}=0x3021
+phy_chain_rx_lane_map_physical{33.0}=0x1302
+phy_chain_rx_lane_map_physical{37.0}=0x2031
+phy_chain_rx_lane_map_physical{41.0}=0x3021
+phy_chain_rx_lane_map_physical{45.0}=0x1023
+phy_chain_rx_lane_map_physical{49.0}=0x0213
+phy_chain_rx_lane_map_physical{5.0}=0x3201
+phy_chain_rx_lane_map_physical{53.0}=0x3201
+phy_chain_rx_lane_map_physical{57.0}=0x2013
+phy_chain_rx_lane_map_physical{61.0}=0x0213
+phy_chain_rx_lane_map_physical{65.0}=0x1203
+phy_chain_rx_lane_map_physical{69.0}=0x0213
+phy_chain_rx_lane_map_physical{73.0}=0x0213
+phy_chain_rx_lane_map_physical{77.0}=0x3120
+phy_chain_rx_lane_map_physical{81.0}=0x0213
+phy_chain_rx_lane_map_physical{85.0}=0x2031
+phy_chain_rx_lane_map_physical{89.0}=0x2031
+phy_chain_rx_lane_map_physical{9.0}=0x0321
+phy_chain_rx_lane_map_physical{93.0}=0x3120
+phy_chain_rx_lane_map_physical{97.0}=0x1203
+phy_chain_rx_polarity_flip_physical{1.0}=0x1
+phy_chain_rx_polarity_flip_physical{10.0}=0x0
+phy_chain_rx_polarity_flip_physical{100.0}=0x1
+phy_chain_rx_polarity_flip_physical{101.0}=0x1
+phy_chain_rx_polarity_flip_physical{102.0}=0x0
+phy_chain_rx_polarity_flip_physical{103.0}=0x1
+phy_chain_rx_polarity_flip_physical{104.0}=0x0
+phy_chain_rx_polarity_flip_physical{105.0}=0x1
+phy_chain_rx_polarity_flip_physical{106.0}=0x0
+phy_chain_rx_polarity_flip_physical{107.0}=0x1
+phy_chain_rx_polarity_flip_physical{108.0}=0x0
+phy_chain_rx_polarity_flip_physical{109.0}=0x0
+phy_chain_rx_polarity_flip_physical{11.0}=0x1
+phy_chain_rx_polarity_flip_physical{110.0}=0x1
+phy_chain_rx_polarity_flip_physical{111.0}=0x0
+phy_chain_rx_polarity_flip_physical{112.0}=0x1
+phy_chain_rx_polarity_flip_physical{113.0}=0x1
+phy_chain_rx_polarity_flip_physical{114.0}=0x0
+phy_chain_rx_polarity_flip_physical{115.0}=0x1
+phy_chain_rx_polarity_flip_physical{116.0}=0x0
+phy_chain_rx_polarity_flip_physical{117.0}=0x0
+phy_chain_rx_polarity_flip_physical{118.0}=0x0
+phy_chain_rx_polarity_flip_physical{119.0}=0x1
+phy_chain_rx_polarity_flip_physical{12.0}=0x1
+phy_chain_rx_polarity_flip_physical{120.0}=0x0
+phy_chain_rx_polarity_flip_physical{121.0}=0x1
+phy_chain_rx_polarity_flip_physical{122.0}=0x0
+phy_chain_rx_polarity_flip_physical{123.0}=0x1
+phy_chain_rx_polarity_flip_physical{124.0}=0x0
+phy_chain_rx_polarity_flip_physical{125.0}=0x0
+phy_chain_rx_polarity_flip_physical{126.0}=0x1
+phy_chain_rx_polarity_flip_physical{127.0}=0x1
+phy_chain_rx_polarity_flip_physical{128.0}=0x1
+phy_chain_rx_polarity_flip_physical{129.0}=0x0
+phy_chain_rx_polarity_flip_physical{13.0}=0x1
+phy_chain_rx_polarity_flip_physical{130.0}=0x1
+phy_chain_rx_polarity_flip_physical{131.0}=0x1
+phy_chain_rx_polarity_flip_physical{132.0}=0x0
+phy_chain_rx_polarity_flip_physical{133.0}=0x1
+phy_chain_rx_polarity_flip_physical{134.0}=0x1
+phy_chain_rx_polarity_flip_physical{135.0}=0x1
+phy_chain_rx_polarity_flip_physical{136.0}=0x0
+phy_chain_rx_polarity_flip_physical{137.0}=0x0
+phy_chain_rx_polarity_flip_physical{138.0}=0x0
+phy_chain_rx_polarity_flip_physical{139.0}=0x1
+phy_chain_rx_polarity_flip_physical{14.0}=0x0
+phy_chain_rx_polarity_flip_physical{140.0}=0x0
+phy_chain_rx_polarity_flip_physical{141.0}=0x1
+phy_chain_rx_polarity_flip_physical{142.0}=0x0
+phy_chain_rx_polarity_flip_physical{143.0}=0x1
+phy_chain_rx_polarity_flip_physical{144.0}=0x0
+phy_chain_rx_polarity_flip_physical{145.0}=0x1
+phy_chain_rx_polarity_flip_physical{146.0}=0x0
+phy_chain_rx_polarity_flip_physical{147.0}=0x1
+phy_chain_rx_polarity_flip_physical{148.0}=0x0
+phy_chain_rx_polarity_flip_physical{149.0}=0x0
+phy_chain_rx_polarity_flip_physical{15.0}=0x1
+phy_chain_rx_polarity_flip_physical{150.0}=0x1
+phy_chain_rx_polarity_flip_physical{151.0}=0x1
+phy_chain_rx_polarity_flip_physical{152.0}=0x0
+phy_chain_rx_polarity_flip_physical{153.0}=0x0
+phy_chain_rx_polarity_flip_physical{154.0}=0x1
+phy_chain_rx_polarity_flip_physical{155.0}=0x1
+phy_chain_rx_polarity_flip_physical{156.0}=0x0
+phy_chain_rx_polarity_flip_physical{157.0}=0x0
+phy_chain_rx_polarity_flip_physical{158.0}=0x0
+phy_chain_rx_polarity_flip_physical{159.0}=0x1
+phy_chain_rx_polarity_flip_physical{16.0}=0x0
+phy_chain_rx_polarity_flip_physical{160.0}=0x0
+phy_chain_rx_polarity_flip_physical{161.0}=0x1
+phy_chain_rx_polarity_flip_physical{162.0}=0x1
+phy_chain_rx_polarity_flip_physical{163.0}=0x0
+phy_chain_rx_polarity_flip_physical{164.0}=0x1
+phy_chain_rx_polarity_flip_physical{165.0}=0x0
+phy_chain_rx_polarity_flip_physical{166.0}=0x0
+phy_chain_rx_polarity_flip_physical{167.0}=0x1
+phy_chain_rx_polarity_flip_physical{168.0}=0x1
+phy_chain_rx_polarity_flip_physical{169.0}=0x1
+phy_chain_rx_polarity_flip_physical{17.0}=0x1
+phy_chain_rx_polarity_flip_physical{170.0}=0x1
+phy_chain_rx_polarity_flip_physical{171.0}=0x0
+phy_chain_rx_polarity_flip_physical{172.0}=0x0
+phy_chain_rx_polarity_flip_physical{173.0}=0x0
+phy_chain_rx_polarity_flip_physical{174.0}=0x0
+phy_chain_rx_polarity_flip_physical{175.0}=0x1
+phy_chain_rx_polarity_flip_physical{176.0}=0x1
+phy_chain_rx_polarity_flip_physical{177.0}=0x1
+phy_chain_rx_polarity_flip_physical{178.0}=0x1
+phy_chain_rx_polarity_flip_physical{179.0}=0x0
+phy_chain_rx_polarity_flip_physical{18.0}=0x0
+phy_chain_rx_polarity_flip_physical{180.0}=0x0
+phy_chain_rx_polarity_flip_physical{181.0}=0x1
+phy_chain_rx_polarity_flip_physical{182.0}=0x1
+phy_chain_rx_polarity_flip_physical{183.0}=0x0
+phy_chain_rx_polarity_flip_physical{184.0}=0x0
+phy_chain_rx_polarity_flip_physical{185.0}=0x0
+phy_chain_rx_polarity_flip_physical{186.0}=0x0
+phy_chain_rx_polarity_flip_physical{187.0}=0x1
+phy_chain_rx_polarity_flip_physical{188.0}=0x1
+phy_chain_rx_polarity_flip_physical{189.0}=0x0
+phy_chain_rx_polarity_flip_physical{19.0}=0x1
+phy_chain_rx_polarity_flip_physical{190.0}=0x0
+phy_chain_rx_polarity_flip_physical{191.0}=0x1
+phy_chain_rx_polarity_flip_physical{192.0}=0x0
+phy_chain_rx_polarity_flip_physical{193.0}=0x0
+phy_chain_rx_polarity_flip_physical{194.0}=0x0
+phy_chain_rx_polarity_flip_physical{195.0}=0x1
+phy_chain_rx_polarity_flip_physical{196.0}=0x1
+phy_chain_rx_polarity_flip_physical{197.0}=0x1
+phy_chain_rx_polarity_flip_physical{198.0}=0x1
+phy_chain_rx_polarity_flip_physical{199.0}=0x0
+phy_chain_rx_polarity_flip_physical{2.0}=0x0
+phy_chain_rx_polarity_flip_physical{20.0}=0x0
+phy_chain_rx_polarity_flip_physical{200.0}=0x0
+phy_chain_rx_polarity_flip_physical{201.0}=0x0
+phy_chain_rx_polarity_flip_physical{202.0}=0x0
+phy_chain_rx_polarity_flip_physical{203.0}=0x1
+phy_chain_rx_polarity_flip_physical{204.0}=0x0
+phy_chain_rx_polarity_flip_physical{205.0}=0x1
+phy_chain_rx_polarity_flip_physical{206.0}=0x1
+phy_chain_rx_polarity_flip_physical{207.0}=0x0
+phy_chain_rx_polarity_flip_physical{208.0}=0x0
+phy_chain_rx_polarity_flip_physical{209.0}=0x1
+phy_chain_rx_polarity_flip_physical{21.0}=0x0
+phy_chain_rx_polarity_flip_physical{210.0}=0x1
+phy_chain_rx_polarity_flip_physical{211.0}=0x0
+phy_chain_rx_polarity_flip_physical{212.0}=0x0
+phy_chain_rx_polarity_flip_physical{213.0}=0x0
+phy_chain_rx_polarity_flip_physical{214.0}=0x0
+phy_chain_rx_polarity_flip_physical{215.0}=0x1
+phy_chain_rx_polarity_flip_physical{216.0}=0x0
+phy_chain_rx_polarity_flip_physical{217.0}=0x0
+phy_chain_rx_polarity_flip_physical{218.0}=0x0
+phy_chain_rx_polarity_flip_physical{219.0}=0x1
+phy_chain_rx_polarity_flip_physical{22.0}=0x0
+phy_chain_rx_polarity_flip_physical{220.0}=0x1
+phy_chain_rx_polarity_flip_physical{221.0}=0x0
+phy_chain_rx_polarity_flip_physical{222.0}=0x0
+phy_chain_rx_polarity_flip_physical{223.0}=0x1
+phy_chain_rx_polarity_flip_physical{224.0}=0x1
+phy_chain_rx_polarity_flip_physical{225.0}=0x1
+phy_chain_rx_polarity_flip_physical{226.0}=0x0
+phy_chain_rx_polarity_flip_physical{227.0}=0x0
+phy_chain_rx_polarity_flip_physical{228.0}=0x1
+phy_chain_rx_polarity_flip_physical{229.0}=0x0
+phy_chain_rx_polarity_flip_physical{23.0}=0x1
+phy_chain_rx_polarity_flip_physical{230.0}=0x0
+phy_chain_rx_polarity_flip_physical{231.0}=0x1
+phy_chain_rx_polarity_flip_physical{232.0}=0x1
+phy_chain_rx_polarity_flip_physical{233.0}=0x1
+phy_chain_rx_polarity_flip_physical{234.0}=0x0
+phy_chain_rx_polarity_flip_physical{235.0}=0x0
+phy_chain_rx_polarity_flip_physical{236.0}=0x0
+phy_chain_rx_polarity_flip_physical{237.0}=0x1
+phy_chain_rx_polarity_flip_physical{238.0}=0x0
+phy_chain_rx_polarity_flip_physical{239.0}=0x1
+phy_chain_rx_polarity_flip_physical{24.0}=0x0
+phy_chain_rx_polarity_flip_physical{240.0}=0x0
+phy_chain_rx_polarity_flip_physical{241.0}=0x1
+phy_chain_rx_polarity_flip_physical{242.0}=0x0
+phy_chain_rx_polarity_flip_physical{243.0}=0x1
+phy_chain_rx_polarity_flip_physical{244.0}=0x0
+phy_chain_rx_polarity_flip_physical{245.0}=0x1
+phy_chain_rx_polarity_flip_physical{246.0}=0x1
+phy_chain_rx_polarity_flip_physical{247.0}=0x1
+phy_chain_rx_polarity_flip_physical{248.0}=0x0
+phy_chain_rx_polarity_flip_physical{249.0}=0x0
+phy_chain_rx_polarity_flip_physical{25.0}=0x1
+phy_chain_rx_polarity_flip_physical{250.0}=0x1
+phy_chain_rx_polarity_flip_physical{251.0}=0x0
+phy_chain_rx_polarity_flip_physical{252.0}=0x1
+phy_chain_rx_polarity_flip_physical{253.0}=0x1
+phy_chain_rx_polarity_flip_physical{254.0}=0x0
+phy_chain_rx_polarity_flip_physical{255.0}=0x1
+phy_chain_rx_polarity_flip_physical{256.0}=0x0
+phy_chain_rx_polarity_flip_physical{257.0}=0x0
+phy_chain_rx_polarity_flip_physical{259.0}=0x0
+phy_chain_rx_polarity_flip_physical{26.0}=0x0
+phy_chain_rx_polarity_flip_physical{27.0}=0x1
+phy_chain_rx_polarity_flip_physical{28.0}=0x0
+phy_chain_rx_polarity_flip_physical{29.0}=0x0
+phy_chain_rx_polarity_flip_physical{3.0}=0x1
+phy_chain_rx_polarity_flip_physical{30.0}=0x0
+phy_chain_rx_polarity_flip_physical{31.0}=0x0
+phy_chain_rx_polarity_flip_physical{32.0}=0x1
+phy_chain_rx_polarity_flip_physical{33.0}=0x0
+phy_chain_rx_polarity_flip_physical{34.0}=0x0
+phy_chain_rx_polarity_flip_physical{35.0}=0x1
+phy_chain_rx_polarity_flip_physical{36.0}=0x1
+phy_chain_rx_polarity_flip_physical{37.0}=0x1
+phy_chain_rx_polarity_flip_physical{38.0}=0x1
+phy_chain_rx_polarity_flip_physical{39.0}=0x0
+phy_chain_rx_polarity_flip_physical{4.0}=0x0
+phy_chain_rx_polarity_flip_physical{40.0}=0x0
+phy_chain_rx_polarity_flip_physical{41.0}=0x0
+phy_chain_rx_polarity_flip_physical{42.0}=0x1
+phy_chain_rx_polarity_flip_physical{43.0}=0x1
+phy_chain_rx_polarity_flip_physical{44.0}=0x1
+phy_chain_rx_polarity_flip_physical{45.0}=0x1
+phy_chain_rx_polarity_flip_physical{46.0}=0x0
+phy_chain_rx_polarity_flip_physical{47.0}=0x0
+phy_chain_rx_polarity_flip_physical{48.0}=0x1
+phy_chain_rx_polarity_flip_physical{49.0}=0x1
+phy_chain_rx_polarity_flip_physical{5.0}=0x1
+phy_chain_rx_polarity_flip_physical{50.0}=0x1
+phy_chain_rx_polarity_flip_physical{51.0}=0x0
+phy_chain_rx_polarity_flip_physical{52.0}=0x0
+phy_chain_rx_polarity_flip_physical{53.0}=0x0
+phy_chain_rx_polarity_flip_physical{54.0}=0x0
+phy_chain_rx_polarity_flip_physical{55.0}=0x1
+phy_chain_rx_polarity_flip_physical{56.0}=0x0
+phy_chain_rx_polarity_flip_physical{57.0}=0x0
+phy_chain_rx_polarity_flip_physical{58.0}=0x0
+phy_chain_rx_polarity_flip_physical{59.0}=0x1
+phy_chain_rx_polarity_flip_physical{6.0}=0x0
+phy_chain_rx_polarity_flip_physical{60.0}=0x1
+phy_chain_rx_polarity_flip_physical{61.0}=0x0
+phy_chain_rx_polarity_flip_physical{62.0}=0x0
+phy_chain_rx_polarity_flip_physical{63.0}=0x1
+phy_chain_rx_polarity_flip_physical{64.0}=0x1
+phy_chain_rx_polarity_flip_physical{65.0}=0x1
+phy_chain_rx_polarity_flip_physical{66.0}=0x1
+phy_chain_rx_polarity_flip_physical{67.0}=0x0
+phy_chain_rx_polarity_flip_physical{68.0}=0x1
+phy_chain_rx_polarity_flip_physical{69.0}=0x0
+phy_chain_rx_polarity_flip_physical{7.0}=0x0
+phy_chain_rx_polarity_flip_physical{70.0}=0x0
+phy_chain_rx_polarity_flip_physical{71.0}=0x1
+phy_chain_rx_polarity_flip_physical{72.0}=0x1
+phy_chain_rx_polarity_flip_physical{73.0}=0x1
+phy_chain_rx_polarity_flip_physical{74.0}=0x1
+phy_chain_rx_polarity_flip_physical{75.0}=0x0
+phy_chain_rx_polarity_flip_physical{76.0}=0x0
+phy_chain_rx_polarity_flip_physical{77.0}=0x0
+phy_chain_rx_polarity_flip_physical{78.0}=0x0
+phy_chain_rx_polarity_flip_physical{79.0}=0x1
+phy_chain_rx_polarity_flip_physical{8.0}=0x1
+phy_chain_rx_polarity_flip_physical{80.0}=0x1
+phy_chain_rx_polarity_flip_physical{81.0}=0x1
+phy_chain_rx_polarity_flip_physical{82.0}=0x1
+phy_chain_rx_polarity_flip_physical{83.0}=0x0
+phy_chain_rx_polarity_flip_physical{84.0}=0x0
+phy_chain_rx_polarity_flip_physical{85.0}=0x1
+phy_chain_rx_polarity_flip_physical{86.0}=0x1
+phy_chain_rx_polarity_flip_physical{87.0}=0x0
+phy_chain_rx_polarity_flip_physical{88.0}=0x0
+phy_chain_rx_polarity_flip_physical{89.0}=0x0
+phy_chain_rx_polarity_flip_physical{9.0}=0x1
+phy_chain_rx_polarity_flip_physical{90.0}=0x0
+phy_chain_rx_polarity_flip_physical{91.0}=0x1
+phy_chain_rx_polarity_flip_physical{92.0}=0x1
+phy_chain_rx_polarity_flip_physical{93.0}=0x0
+phy_chain_rx_polarity_flip_physical{94.0}=0x0
+phy_chain_rx_polarity_flip_physical{95.0}=0x1
+phy_chain_rx_polarity_flip_physical{96.0}=0x0
+phy_chain_rx_polarity_flip_physical{97.0}=0x1
+phy_chain_rx_polarity_flip_physical{98.0}=0x1
+phy_chain_rx_polarity_flip_physical{99.0}=0x0
+phy_chain_tx_lane_map_physical{1.0}=0x2031
+phy_chain_tx_lane_map_physical{101.0}=0x1023
+phy_chain_tx_lane_map_physical{105.0}=0x1302
+phy_chain_tx_lane_map_physical{109.0}=0x0321
+phy_chain_tx_lane_map_physical{113.0}=0x2301
+phy_chain_tx_lane_map_physical{117.0}=0x3120
+phy_chain_tx_lane_map_physical{121.0}=0x3102
+phy_chain_tx_lane_map_physical{125.0}=0x3210
+phy_chain_tx_lane_map_physical{129.0}=0x1023
+phy_chain_tx_lane_map_physical{13.0}=0x3021
+phy_chain_tx_lane_map_physical{133.0}=0x3210
+phy_chain_tx_lane_map_physical{137.0}=0x2031
+phy_chain_tx_lane_map_physical{141.0}=0x1302
+phy_chain_tx_lane_map_physical{145.0}=0x3210
+phy_chain_tx_lane_map_physical{149.0}=0x0213
+phy_chain_tx_lane_map_physical{153.0}=0x3210
+phy_chain_tx_lane_map_physical{157.0}=0x1320
+phy_chain_tx_lane_map_physical{161.0}=0x3210
+phy_chain_tx_lane_map_physical{165.0}=0x0231
+phy_chain_tx_lane_map_physical{169.0}=0x3120
+phy_chain_tx_lane_map_physical{17.0}=0x1032
+phy_chain_tx_lane_map_physical{173.0}=0x0312
+phy_chain_tx_lane_map_physical{177.0}=0x0231
+phy_chain_tx_lane_map_physical{181.0}=0x3210
+phy_chain_tx_lane_map_physical{185.0}=0x3210
+phy_chain_tx_lane_map_physical{189.0}=0x1320
+phy_chain_tx_lane_map_physical{193.0}=0x0321
+phy_chain_tx_lane_map_physical{197.0}=0x3120
+phy_chain_tx_lane_map_physical{201.0}=0x3120
+phy_chain_tx_lane_map_physical{205.0}=0x0123
+phy_chain_tx_lane_map_physical{209.0}=0x3120
+phy_chain_tx_lane_map_physical{21.0}=0x0213
+phy_chain_tx_lane_map_physical{213.0}=0x3021
+phy_chain_tx_lane_map_physical{217.0}=0x0312
+phy_chain_tx_lane_map_physical{221.0}=0x2301
+phy_chain_tx_lane_map_physical{225.0}=0x0123
+phy_chain_tx_lane_map_physical{229.0}=0x2031
+phy_chain_tx_lane_map_physical{233.0}=0x0231
+phy_chain_tx_lane_map_physical{237.0}=0x0213
+phy_chain_tx_lane_map_physical{241.0}=0x1320
+phy_chain_tx_lane_map_physical{245.0}=0x2031
+phy_chain_tx_lane_map_physical{249.0}=0x3120
+phy_chain_tx_lane_map_physical{25.0}=0x0231
+phy_chain_tx_lane_map_physical{253.0}=0x0321
+phy_chain_tx_lane_map_physical{257.0}=0x3210
+phy_chain_tx_lane_map_physical{29.0}=0x1230
+phy_chain_tx_lane_map_physical{33.0}=0x1032
+phy_chain_tx_lane_map_physical{37.0}=0x0123
+phy_chain_tx_lane_map_physical{41.0}=0x0213
+phy_chain_tx_lane_map_physical{45.0}=0x0132
+phy_chain_tx_lane_map_physical{49.0}=0x2031
+phy_chain_tx_lane_map_physical{5.0}=0x2301
+phy_chain_tx_lane_map_physical{53.0}=0x2301
+phy_chain_tx_lane_map_physical{57.0}=0x2031
+phy_chain_tx_lane_map_physical{61.0}=0x2031
+phy_chain_tx_lane_map_physical{65.0}=0x1230
+phy_chain_tx_lane_map_physical{69.0}=0x2013
+phy_chain_tx_lane_map_physical{73.0}=0x0213
+phy_chain_tx_lane_map_physical{77.0}=0x2310
+phy_chain_tx_lane_map_physical{81.0}=0x0321
+phy_chain_tx_lane_map_physical{85.0}=0x2013
+phy_chain_tx_lane_map_physical{89.0}=0x0213
+phy_chain_tx_lane_map_physical{9.0}=0x3012
+phy_chain_tx_lane_map_physical{93.0}=0x3102
+phy_chain_tx_lane_map_physical{97.0}=0x3210
+phy_chain_tx_polarity_flip_physical{1.0}=0x0
+phy_chain_tx_polarity_flip_physical{10.0}=0x1
+phy_chain_tx_polarity_flip_physical{100.0}=0x0
+phy_chain_tx_polarity_flip_physical{101.0}=0x0
+phy_chain_tx_polarity_flip_physical{102.0}=0x1
+phy_chain_tx_polarity_flip_physical{103.0}=0x0
+phy_chain_tx_polarity_flip_physical{104.0}=0x0
+phy_chain_tx_polarity_flip_physical{105.0}=0x0
+phy_chain_tx_polarity_flip_physical{106.0}=0x1
+phy_chain_tx_polarity_flip_physical{107.0}=0x1
+phy_chain_tx_polarity_flip_physical{108.0}=0x1
+phy_chain_tx_polarity_flip_physical{109.0}=0x0
+phy_chain_tx_polarity_flip_physical{11.0}=0x1
+phy_chain_tx_polarity_flip_physical{110.0}=0x0
+phy_chain_tx_polarity_flip_physical{111.0}=0x0
+phy_chain_tx_polarity_flip_physical{112.0}=0x1
+phy_chain_tx_polarity_flip_physical{113.0}=0x1
+phy_chain_tx_polarity_flip_physical{114.0}=0x1
+phy_chain_tx_polarity_flip_physical{115.0}=0x1
+phy_chain_tx_polarity_flip_physical{116.0}=0x0
+phy_chain_tx_polarity_flip_physical{117.0}=0x1
+phy_chain_tx_polarity_flip_physical{118.0}=0x0
+phy_chain_tx_polarity_flip_physical{119.0}=0x0
+phy_chain_tx_polarity_flip_physical{12.0}=0x0
+phy_chain_tx_polarity_flip_physical{120.0}=0x0
+phy_chain_tx_polarity_flip_physical{121.0}=0x0
+phy_chain_tx_polarity_flip_physical{122.0}=0x0
+phy_chain_tx_polarity_flip_physical{123.0}=0x0
+phy_chain_tx_polarity_flip_physical{124.0}=0x1
+phy_chain_tx_polarity_flip_physical{125.0}=0x0
+phy_chain_tx_polarity_flip_physical{126.0}=0x1
+phy_chain_tx_polarity_flip_physical{127.0}=0x1
+phy_chain_tx_polarity_flip_physical{128.0}=0x1
+phy_chain_tx_polarity_flip_physical{129.0}=0x1
+phy_chain_tx_polarity_flip_physical{13.0}=0x0
+phy_chain_tx_polarity_flip_physical{130.0}=0x0
+phy_chain_tx_polarity_flip_physical{131.0}=0x1
+phy_chain_tx_polarity_flip_physical{132.0}=0x0
+phy_chain_tx_polarity_flip_physical{133.0}=0x1
+phy_chain_tx_polarity_flip_physical{134.0}=0x1
+phy_chain_tx_polarity_flip_physical{135.0}=0x1
+phy_chain_tx_polarity_flip_physical{136.0}=0x1
+phy_chain_tx_polarity_flip_physical{137.0}=0x1
+phy_chain_tx_polarity_flip_physical{138.0}=0x1
+phy_chain_tx_polarity_flip_physical{139.0}=0x1
+phy_chain_tx_polarity_flip_physical{14.0}=0x1
+phy_chain_tx_polarity_flip_physical{140.0}=0x1
+phy_chain_tx_polarity_flip_physical{141.0}=0x0
+phy_chain_tx_polarity_flip_physical{142.0}=0x1
+phy_chain_tx_polarity_flip_physical{143.0}=0x1
+phy_chain_tx_polarity_flip_physical{144.0}=0x1
+phy_chain_tx_polarity_flip_physical{145.0}=0x1
+phy_chain_tx_polarity_flip_physical{146.0}=0x1
+phy_chain_tx_polarity_flip_physical{147.0}=0x1
+phy_chain_tx_polarity_flip_physical{148.0}=0x0
+phy_chain_tx_polarity_flip_physical{149.0}=0x1
+phy_chain_tx_polarity_flip_physical{15.0}=0x0
+phy_chain_tx_polarity_flip_physical{150.0}=0x0
+phy_chain_tx_polarity_flip_physical{151.0}=0x0
+phy_chain_tx_polarity_flip_physical{152.0}=0x0
+phy_chain_tx_polarity_flip_physical{153.0}=0x1
+phy_chain_tx_polarity_flip_physical{154.0}=0x0
+phy_chain_tx_polarity_flip_physical{155.0}=0x0
+phy_chain_tx_polarity_flip_physical{156.0}=0x0
+phy_chain_tx_polarity_flip_physical{157.0}=0x0
+phy_chain_tx_polarity_flip_physical{158.0}=0x0
+phy_chain_tx_polarity_flip_physical{159.0}=0x0
+phy_chain_tx_polarity_flip_physical{16.0}=0x0
+phy_chain_tx_polarity_flip_physical{160.0}=0x0
+phy_chain_tx_polarity_flip_physical{161.0}=0x0
+phy_chain_tx_polarity_flip_physical{162.0}=0x1
+phy_chain_tx_polarity_flip_physical{163.0}=0x1
+phy_chain_tx_polarity_flip_physical{164.0}=0x0
+phy_chain_tx_polarity_flip_physical{165.0}=0x1
+phy_chain_tx_polarity_flip_physical{166.0}=0x1
+phy_chain_tx_polarity_flip_physical{167.0}=0x1
+phy_chain_tx_polarity_flip_physical{168.0}=0x0
+phy_chain_tx_polarity_flip_physical{169.0}=0x0
+phy_chain_tx_polarity_flip_physical{17.0}=0x0
+phy_chain_tx_polarity_flip_physical{170.0}=0x1
+phy_chain_tx_polarity_flip_physical{171.0}=0x1
+phy_chain_tx_polarity_flip_physical{172.0}=0x1
+phy_chain_tx_polarity_flip_physical{173.0}=0x0
+phy_chain_tx_polarity_flip_physical{174.0}=0x0
+phy_chain_tx_polarity_flip_physical{175.0}=0x1
+phy_chain_tx_polarity_flip_physical{176.0}=0x0
+phy_chain_tx_polarity_flip_physical{177.0}=0x1
+phy_chain_tx_polarity_flip_physical{178.0}=0x0
+phy_chain_tx_polarity_flip_physical{179.0}=0x0
+phy_chain_tx_polarity_flip_physical{18.0}=0x1
+phy_chain_tx_polarity_flip_physical{180.0}=0x0
+phy_chain_tx_polarity_flip_physical{181.0}=0x0
+phy_chain_tx_polarity_flip_physical{182.0}=0x0
+phy_chain_tx_polarity_flip_physical{183.0}=0x0
+phy_chain_tx_polarity_flip_physical{184.0}=0x1
+phy_chain_tx_polarity_flip_physical{185.0}=0x0
+phy_chain_tx_polarity_flip_physical{186.0}=0x1
+phy_chain_tx_polarity_flip_physical{187.0}=0x1
+phy_chain_tx_polarity_flip_physical{188.0}=0x1
+phy_chain_tx_polarity_flip_physical{189.0}=0x0
+phy_chain_tx_polarity_flip_physical{19.0}=0x1
+phy_chain_tx_polarity_flip_physical{190.0}=0x0
+phy_chain_tx_polarity_flip_physical{191.0}=0x0
+phy_chain_tx_polarity_flip_physical{192.0}=0x0
+phy_chain_tx_polarity_flip_physical{193.0}=0x1
+phy_chain_tx_polarity_flip_physical{194.0}=0x1
+phy_chain_tx_polarity_flip_physical{195.0}=0x1
+phy_chain_tx_polarity_flip_physical{196.0}=0x0
+phy_chain_tx_polarity_flip_physical{197.0}=0x0
+phy_chain_tx_polarity_flip_physical{198.0}=0x1
+phy_chain_tx_polarity_flip_physical{199.0}=0x1
+phy_chain_tx_polarity_flip_physical{2.0}=0x1
+phy_chain_tx_polarity_flip_physical{20.0}=0x1
+phy_chain_tx_polarity_flip_physical{200.0}=0x1
+phy_chain_tx_polarity_flip_physical{201.0}=0x1
+phy_chain_tx_polarity_flip_physical{202.0}=0x1
+phy_chain_tx_polarity_flip_physical{203.0}=0x1
+phy_chain_tx_polarity_flip_physical{204.0}=0x1
+phy_chain_tx_polarity_flip_physical{205.0}=0x0
+phy_chain_tx_polarity_flip_physical{206.0}=0x1
+phy_chain_tx_polarity_flip_physical{207.0}=0x1
+phy_chain_tx_polarity_flip_physical{208.0}=0x1
+phy_chain_tx_polarity_flip_physical{209.0}=0x1
+phy_chain_tx_polarity_flip_physical{21.0}=0x0
+phy_chain_tx_polarity_flip_physical{210.0}=0x1
+phy_chain_tx_polarity_flip_physical{211.0}=0x1
+phy_chain_tx_polarity_flip_physical{212.0}=0x0
+phy_chain_tx_polarity_flip_physical{213.0}=0x0
+phy_chain_tx_polarity_flip_physical{214.0}=0x1
+phy_chain_tx_polarity_flip_physical{215.0}=0x0
+phy_chain_tx_polarity_flip_physical{216.0}=0x1
+phy_chain_tx_polarity_flip_physical{217.0}=0x1
+phy_chain_tx_polarity_flip_physical{218.0}=0x1
+phy_chain_tx_polarity_flip_physical{219.0}=0x0
+phy_chain_tx_polarity_flip_physical{22.0}=0x0
+phy_chain_tx_polarity_flip_physical{220.0}=0x1
+phy_chain_tx_polarity_flip_physical{221.0}=0x0
+phy_chain_tx_polarity_flip_physical{222.0}=0x0
+phy_chain_tx_polarity_flip_physical{223.0}=0x0
+phy_chain_tx_polarity_flip_physical{224.0}=0x1
+phy_chain_tx_polarity_flip_physical{225.0}=0x1
+phy_chain_tx_polarity_flip_physical{226.0}=0x1
+phy_chain_tx_polarity_flip_physical{227.0}=0x1
+phy_chain_tx_polarity_flip_physical{228.0}=0x0
+phy_chain_tx_polarity_flip_physical{229.0}=0x0
+phy_chain_tx_polarity_flip_physical{23.0}=0x0
+phy_chain_tx_polarity_flip_physical{230.0}=0x1
+phy_chain_tx_polarity_flip_physical{231.0}=0x1
+phy_chain_tx_polarity_flip_physical{232.0}=0x1
+phy_chain_tx_polarity_flip_physical{233.0}=0x0
+phy_chain_tx_polarity_flip_physical{234.0}=0x0
+phy_chain_tx_polarity_flip_physical{235.0}=0x0
+phy_chain_tx_polarity_flip_physical{236.0}=0x0
+phy_chain_tx_polarity_flip_physical{237.0}=0x1
+phy_chain_tx_polarity_flip_physical{238.0}=0x1
+phy_chain_tx_polarity_flip_physical{239.0}=0x1
+phy_chain_tx_polarity_flip_physical{24.0}=0x0
+phy_chain_tx_polarity_flip_physical{240.0}=0x0
+phy_chain_tx_polarity_flip_physical{241.0}=0x1
+phy_chain_tx_polarity_flip_physical{242.0}=0x1
+phy_chain_tx_polarity_flip_physical{243.0}=0x1
+phy_chain_tx_polarity_flip_physical{244.0}=0x0
+phy_chain_tx_polarity_flip_physical{245.0}=0x1
+phy_chain_tx_polarity_flip_physical{246.0}=0x1
+phy_chain_tx_polarity_flip_physical{247.0}=0x1
+phy_chain_tx_polarity_flip_physical{248.0}=0x1
+phy_chain_tx_polarity_flip_physical{249.0}=0x1
+phy_chain_tx_polarity_flip_physical{25.0}=0x1
+phy_chain_tx_polarity_flip_physical{250.0}=0x0
+phy_chain_tx_polarity_flip_physical{251.0}=0x0
+phy_chain_tx_polarity_flip_physical{252.0}=0x0
+phy_chain_tx_polarity_flip_physical{253.0}=0x1
+phy_chain_tx_polarity_flip_physical{254.0}=0x1
+phy_chain_tx_polarity_flip_physical{255.0}=0x1
+phy_chain_tx_polarity_flip_physical{256.0}=0x0
+phy_chain_tx_polarity_flip_physical{257.0}=0x0
+phy_chain_tx_polarity_flip_physical{259.0}=0x0
+phy_chain_tx_polarity_flip_physical{26.0}=0x0
+phy_chain_tx_polarity_flip_physical{27.0}=0x0
+phy_chain_tx_polarity_flip_physical{28.0}=0x0
+phy_chain_tx_polarity_flip_physical{29.0}=0x1
+phy_chain_tx_polarity_flip_physical{3.0}=0x1
+phy_chain_tx_polarity_flip_physical{30.0}=0x1
+phy_chain_tx_polarity_flip_physical{31.0}=0x1
+phy_chain_tx_polarity_flip_physical{32.0}=0x0
+phy_chain_tx_polarity_flip_physical{33.0}=0x0
+phy_chain_tx_polarity_flip_physical{34.0}=0x0
+phy_chain_tx_polarity_flip_physical{35.0}=0x0
+phy_chain_tx_polarity_flip_physical{36.0}=0x1
+phy_chain_tx_polarity_flip_physical{37.0}=0x1
+phy_chain_tx_polarity_flip_physical{38.0}=0x1
+phy_chain_tx_polarity_flip_physical{39.0}=0x1
+phy_chain_tx_polarity_flip_physical{4.0}=0x1
+phy_chain_tx_polarity_flip_physical{40.0}=0x0
+phy_chain_tx_polarity_flip_physical{41.0}=0x0
+phy_chain_tx_polarity_flip_physical{42.0}=0x0
+phy_chain_tx_polarity_flip_physical{43.0}=0x0
+phy_chain_tx_polarity_flip_physical{44.0}=0x0
+phy_chain_tx_polarity_flip_physical{45.0}=0x1
+phy_chain_tx_polarity_flip_physical{46.0}=0x0
+phy_chain_tx_polarity_flip_physical{47.0}=0x1
+phy_chain_tx_polarity_flip_physical{48.0}=0x1
+phy_chain_tx_polarity_flip_physical{49.0}=0x0
+phy_chain_tx_polarity_flip_physical{5.0}=0x1
+phy_chain_tx_polarity_flip_physical{50.0}=0x0
+phy_chain_tx_polarity_flip_physical{51.0}=0x0
+phy_chain_tx_polarity_flip_physical{52.0}=0x1
+phy_chain_tx_polarity_flip_physical{53.0}=0x0
+phy_chain_tx_polarity_flip_physical{54.0}=0x1
+phy_chain_tx_polarity_flip_physical{55.0}=0x1
+phy_chain_tx_polarity_flip_physical{56.0}=0x0
+phy_chain_tx_polarity_flip_physical{57.0}=0x0
+phy_chain_tx_polarity_flip_physical{58.0}=0x1
+phy_chain_tx_polarity_flip_physical{59.0}=0x1
+phy_chain_tx_polarity_flip_physical{6.0}=0x1
+phy_chain_tx_polarity_flip_physical{60.0}=0x1
+phy_chain_tx_polarity_flip_physical{61.0}=0x0
+phy_chain_tx_polarity_flip_physical{62.0}=0x1
+phy_chain_tx_polarity_flip_physical{63.0}=0x1
+phy_chain_tx_polarity_flip_physical{64.0}=0x1
+phy_chain_tx_polarity_flip_physical{65.0}=0x0
+phy_chain_tx_polarity_flip_physical{66.0}=0x1
+phy_chain_tx_polarity_flip_physical{67.0}=0x1
+phy_chain_tx_polarity_flip_physical{68.0}=0x0
+phy_chain_tx_polarity_flip_physical{69.0}=0x1
+phy_chain_tx_polarity_flip_physical{7.0}=0x1
+phy_chain_tx_polarity_flip_physical{70.0}=0x1
+phy_chain_tx_polarity_flip_physical{71.0}=0x1
+phy_chain_tx_polarity_flip_physical{72.0}=0x0
+phy_chain_tx_polarity_flip_physical{73.0}=0x1
+phy_chain_tx_polarity_flip_physical{74.0}=0x0
+phy_chain_tx_polarity_flip_physical{75.0}=0x0
+phy_chain_tx_polarity_flip_physical{76.0}=0x0
+phy_chain_tx_polarity_flip_physical{77.0}=0x0
+phy_chain_tx_polarity_flip_physical{78.0}=0x0
+phy_chain_tx_polarity_flip_physical{79.0}=0x1
+phy_chain_tx_polarity_flip_physical{8.0}=0x0
+phy_chain_tx_polarity_flip_physical{80.0}=0x0
+phy_chain_tx_polarity_flip_physical{81.0}=0x1
+phy_chain_tx_polarity_flip_physical{82.0}=0x1
+phy_chain_tx_polarity_flip_physical{83.0}=0x1
+phy_chain_tx_polarity_flip_physical{84.0}=0x0
+phy_chain_tx_polarity_flip_physical{85.0}=0x1
+phy_chain_tx_polarity_flip_physical{86.0}=0x0
+phy_chain_tx_polarity_flip_physical{87.0}=0x0
+phy_chain_tx_polarity_flip_physical{88.0}=0x0
+phy_chain_tx_polarity_flip_physical{89.0}=0x1
+phy_chain_tx_polarity_flip_physical{9.0}=0x0
+phy_chain_tx_polarity_flip_physical{90.0}=0x1
+phy_chain_tx_polarity_flip_physical{91.0}=0x1
+phy_chain_tx_polarity_flip_physical{92.0}=0x0
+phy_chain_tx_polarity_flip_physical{93.0}=0x0
+phy_chain_tx_polarity_flip_physical{94.0}=0x0
+phy_chain_tx_polarity_flip_physical{95.0}=0x0
+phy_chain_tx_polarity_flip_physical{96.0}=0x0
+phy_chain_tx_polarity_flip_physical{97.0}=0x0
+phy_chain_tx_polarity_flip_physical{98.0}=0x1
+phy_chain_tx_polarity_flip_physical{99.0}=0x1
+
+port_init_cl72_hg=1
+
+
+
+
+
+
+
+robust_hash_disable_egress_vlan=1
+robust_hash_disable_mpls=1
+robust_hash_disable_vlan=1
+stable_size=0x5500000
+stable_size=0x5500000
+tdma_timeout_usec=15000000
+tslam_timeout_usec=15000000
+dport_map_direct=1
+portmap_1=5:50
+portmap_2=7:50
+portmap_3=13:50
+portmap_4=15:50
+portmap_5=25:50
+portmap_6=27:50
+portmap_7=21:50
+portmap_8=23:50
+portmap_9=37:50
+portmap_10=39:50
+portmap_11=45:50
+portmap_12=47:50
+portmap_13=57:100
+portmap_14=53:100
+portmap_15=9:50
+portmap_16=11:50
+portmap_17=1:50
+portmap_18=3:50
+portmap_19=17:50
+portmap_20=19:50
+portmap_21=29:50
+portmap_22=31:50
+portmap_23=41:50
+portmap_24=43:50
+portmap_25=33:50
+portmap_26=35:50
+portmap_27=49:100
+portmap_28=61:100
+portmap_34=77:50
+portmap_35=79:50
+portmap_36=65:50
+portmap_37=67:50
+portmap_38=85:50
+portmap_39=87:50
+portmap_40=89:50
+portmap_41=91:50
+portmap_42=109:50
+portmap_43=111:50
+portmap_44=97:50
+portmap_45=99:50
+portmap_46=117:100
+portmap_47=121:100
+portmap_48=69:50
+portmap_49=71:50
+portmap_50=73:50
+portmap_51=75:50
+portmap_52=93:50
+portmap_53=95:50
+portmap_54=81:50
+portmap_55=83:50
+portmap_56=101:50
+portmap_57=103:50
+portmap_58=105:50
+portmap_59=107:50
+portmap_60=125:100
+portmap_61=113:100
+portmap_66=257:10
+portmap_68=141:100
+portmap_69=133:100
+portmap_70=149:50
+portmap_71=151:50
+portmap_72=153:50
+portmap_73=155:50
+portmap_74=173:50
+portmap_75=175:50
+portmap_76=161:50
+portmap_77=163:50
+portmap_78=181:50
+portmap_79=183:50
+portmap_80=185:50
+portmap_81=187:50
+portmap_82=129:100
+portmap_83=137:100
+portmap_84=157:50
+portmap_85=159:50
+portmap_86=145:50
+portmap_87=147:50
+portmap_88=165:50
+portmap_89=167:50
+portmap_90=169:50
+portmap_91=171:50
+portmap_92=189:50
+portmap_93=191:50
+portmap_94=177:50
+portmap_95=179:50
+portmap_100=259:10
+portmap_102=197:100
+portmap_103=205:100
+portmap_104=217:50
+portmap_105=219:50
+portmap_106=213:50
+portmap_107=215:50
+portmap_108=229:50
+portmap_109=231:50
+portmap_110=237:50
+portmap_111=239:50
+portmap_112=249:50
+portmap_113=251:50
+portmap_114=245:50
+portmap_115=247:50
+portmap_116=201:100
+portmap_117=193:100
+portmap_118=209:50
+portmap_119=211:50
+portmap_120=221:50
+portmap_121=223:50
+portmap_122=233:50
+portmap_123=235:50
+portmap_124=225:50
+portmap_125=227:50
+portmap_126=241:50
+portmap_127=243:50
+portmap_128=253:50
+portmap_129=255:50
+
+# tuning parameters
+serdes_preemphasis_1=0x580c
+serdes_preemphasis_2=0x580c
+serdes_preemphasis_3=0x580c
+serdes_preemphasis_4=0x580c
+serdes_preemphasis_5=0x580c
+serdes_preemphasis_6=0x580c
+serdes_preemphasis_7=0x580c
+serdes_preemphasis_8=0x580c
+serdes_preemphasis_9=0x580c
+serdes_preemphasis_10=0x580c
+serdes_preemphasis_11=0x580c
+serdes_preemphasis_12=0x580c
+serdes_preemphasis_13=0x83404
+serdes_preemphasis_14=0x83404
+serdes_preemphasis_15=0x580c
+serdes_preemphasis_16=0x580c
+serdes_preemphasis_17=0x580c
+serdes_preemphasis_18=0x580c
+serdes_preemphasis_19=0x580c
+serdes_preemphasis_20=0x580c
+serdes_preemphasis_21=0x580c
+serdes_preemphasis_22=0x580c
+serdes_preemphasis_23=0x580c
+serdes_preemphasis_24=0x580c
+serdes_preemphasis_25=0x580c
+serdes_preemphasis_26=0x580c
+serdes_preemphasis_27=0xf3c05
+serdes_preemphasis_28=0xf3d05
+serdes_preemphasis_34=0x580c
+serdes_preemphasis_35=0x580c
+serdes_preemphasis_36=0x580c
+serdes_preemphasis_37=0x580c
+serdes_preemphasis_38=0x580c
+serdes_preemphasis_39=0x580c
+serdes_preemphasis_40=0x580c
+serdes_preemphasis_41=0x580c
+serdes_preemphasis_42=0x580c
+serdes_preemphasis_43=0x580c
+serdes_preemphasis_44=0x580c
+serdes_preemphasis_45=0x580c
+serdes_preemphasis_46=0xb3604
+serdes_preemphasis_47=0x72b03
+serdes_preemphasis_48=0x580c
+serdes_preemphasis_49=0x580c
+serdes_preemphasis_50=0x580c
+serdes_preemphasis_51=0x580c
+serdes_preemphasis_52=0x580c
+serdes_preemphasis_53=0x580c
+serdes_preemphasis_54=0x580c
+serdes_preemphasis_55=0x580c
+serdes_preemphasis_56=0x580c
+serdes_preemphasis_57=0x580c
+serdes_preemphasis_58=0x580c
+serdes_preemphasis_59=0x580c
+serdes_preemphasis_60=0xf3c05
+serdes_preemphasis_61=0x103f06
+serdes_preemphasis_66=0x43004
+serdes_preemphasis_68=0xf4006
+serdes_preemphasis_69=0xf4006
+serdes_preemphasis_70=0x580c
+serdes_preemphasis_71=0x580c
+serdes_preemphasis_72=0x580c
+serdes_preemphasis_73=0x580c
+serdes_preemphasis_74=0x580c
+serdes_preemphasis_75=0x580c
+serdes_preemphasis_76=0x580c
+serdes_preemphasis_77=0x580c
+serdes_preemphasis_78=0x580c
+serdes_preemphasis_79=0x580c
+serdes_preemphasis_80=0x580c
+serdes_preemphasis_81=0x580c
+serdes_preemphasis_82=0x73103
+serdes_preemphasis_83=0x73103
+serdes_preemphasis_84=0x580c
+serdes_preemphasis_85=0x580c
+serdes_preemphasis_86=0x580c
+serdes_preemphasis_87=0x580c
+serdes_preemphasis_88=0x580c
+serdes_preemphasis_89=0x580c
+serdes_preemphasis_90=0x580c
+serdes_preemphasis_91=0x580c
+serdes_preemphasis_92=0x580c
+serdes_preemphasis_93=0x580c
+serdes_preemphasis_94=0x580c
+serdes_preemphasis_95=0x580c
+serdes_preemphasis_100=0x43004
+serdes_preemphasis_102=0xf3c05
+serdes_preemphasis_103=0xf3c05
+serdes_preemphasis_104=0x580c
+serdes_preemphasis_105=0x580c
+serdes_preemphasis_106=0x580c
+serdes_preemphasis_107=0x580c
+serdes_preemphasis_108=0x580c
+serdes_preemphasis_109=0x580c
+serdes_preemphasis_110=0x580c
+serdes_preemphasis_111=0x580c
+serdes_preemphasis_112=0x580c
+serdes_preemphasis_113=0x580c
+serdes_preemphasis_114=0x580c
+serdes_preemphasis_115=0x580c
+serdes_preemphasis_116=0x83404
+serdes_preemphasis_117=0x83404
+serdes_preemphasis_118=0x580c
+serdes_preemphasis_119=0x580c
+serdes_preemphasis_120=0x580c
+serdes_preemphasis_121=0x580c
+serdes_preemphasis_122=0x580c
+serdes_preemphasis_123=0x580c
+serdes_preemphasis_124=0x580c
+serdes_preemphasis_125=0x580c
+serdes_preemphasis_126=0x580c
+serdes_preemphasis_127=0x580c
+serdes_preemphasis_128=0x580c
+serdes_preemphasis_129=0x580c
+
+mmu_init_config="MSFT-TH2-Tier0"
+
+phy_an_lt_msft=1
diff --git a/src/sonic-config-engine/tests/sample-arista-7260-t0-minigraph.xml b/src/sonic-config-engine/tests/sample-arista-7260-t0-minigraph.xml
new file mode 100644
index 000000000..c20675626
--- /dev/null
+++ b/src/sonic-config-engine/tests/sample-arista-7260-t0-minigraph.xml
@@ -0,0 +1,1857 @@
+<DeviceMiniGraph xmlns="Microsoft.Search.Autopilot.Evolution" xmlns:i="http://www.w3.org/2001/XMLSchema-instance">
+  <CpgDec>
+    <IsisRouters xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+    <PeeringSessions>
+      <BGPSession>
+        <ElementType>BGPSession</ElementType>
+        <MacSec>false</MacSec>
+        <StartRouter>str-7260cx3-1</StartRouter>
+        <StartPeer>10.0.0.56</StartPeer>
+        <EndRouter>ARISTA01T1</EndRouter>
+        <EndPeer>10.0.0.57</EndPeer>
+        <Multihop>1</Multihop>
+        <HoldTime>10</HoldTime>
+        <KeepAliveTime>3</KeepAliveTime>
+      </BGPSession>
+      <BGPSession>
+        <ElementType>BGPSession</ElementType>
+        <MacSec>false</MacSec>
+        <StartRouter>str-7260cx3-1</StartRouter>
+        <StartPeer>10.0.0.58</StartPeer>
+        <EndRouter>ARISTA02T1</EndRouter>
+        <EndPeer>10.0.0.59</EndPeer>
+        <Multihop>1</Multihop>
+        <HoldTime>10</HoldTime>
+        <KeepAliveTime>3</KeepAliveTime>
+      </BGPSession>
+      <BGPSession>
+        <ElementType>BGPSession</ElementType>
+        <MacSec>false</MacSec>
+        <StartRouter>str-7260cx3-1</StartRouter>
+        <StartPeer>10.0.0.60</StartPeer>
+        <EndRouter>ARISTA03T1</EndRouter>
+        <EndPeer>10.0.0.61</EndPeer>
+        <Multihop>1</Multihop>
+        <HoldTime>10</HoldTime>
+        <KeepAliveTime>3</KeepAliveTime>
+      </BGPSession>
+      <BGPSession>
+        <ElementType>BGPSession</ElementType>
+        <MacSec>false</MacSec>
+        <StartRouter>str-7260cx3-1</StartRouter>
+        <StartPeer>10.0.0.62</StartPeer>
+        <EndRouter>ARISTA04T1</EndRouter>
+        <EndPeer>10.0.0.63</EndPeer>
+        <Multihop>1</Multihop>
+        <HoldTime>10</HoldTime>
+        <KeepAliveTime>3</KeepAliveTime>
+      </BGPSession>
+      <BGPSession>
+        <ElementType>BGPSession</ElementType>
+        <MacSec>false</MacSec>
+        <StartRouter>str-7260cx3-1</StartRouter>
+        <StartPeer>FC00::71</StartPeer>
+        <EndRouter>ARISTA01T1</EndRouter>
+        <EndPeer>FC00::72</EndPeer>
+        <Multihop>1</Multihop>
+        <HoldTime>10</HoldTime>
+        <KeepAliveTime>3</KeepAliveTime>
+      </BGPSession>
+      <BGPSession>
+        <ElementType>BGPSession</ElementType>
+        <MacSec>false</MacSec>
+        <StartRouter>str-7260cx3-1</StartRouter>
+        <StartPeer>FC00::75</StartPeer>
+        <EndRouter>ARISTA02T1</EndRouter>
+        <EndPeer>FC00::76</EndPeer>
+        <Multihop>1</Multihop>
+        <HoldTime>10</HoldTime>
+        <KeepAliveTime>3</KeepAliveTime>
+      </BGPSession>
+      <BGPSession>
+        <ElementType>BGPSession</ElementType>
+        <MacSec>false</MacSec>
+        <StartRouter>str-7260cx3-1</StartRouter>
+        <StartPeer>FC00::79</StartPeer>
+        <EndRouter>ARISTA03T1</EndRouter>
+        <EndPeer>FC00::7A</EndPeer>
+        <Multihop>1</Multihop>
+        <HoldTime>10</HoldTime>
+        <KeepAliveTime>3</KeepAliveTime>
+      </BGPSession>
+      <BGPSession>
+        <ElementType>BGPSession</ElementType>
+        <MacSec>false</MacSec>
+        <StartRouter>str-7260cx3-1</StartRouter>
+        <StartPeer>FC00::7D</StartPeer>
+        <EndRouter>ARISTA04T1</EndRouter>
+        <EndPeer>FC00::7E</EndPeer>
+        <Multihop>1</Multihop>
+        <HoldTime>10</HoldTime>
+        <KeepAliveTime>3</KeepAliveTime>
+      </BGPSession>
+    </PeeringSessions>
+    <Routers xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution">
+      <a:BGPRouterDeclaration>
+        <a:ASN>65100</a:ASN>
+        <a:Hostname>str-7260cx3-1</a:Hostname>
+        <a:Peers>
+          <BGPPeer>
+            <ElementType>BGPPeer</ElementType>
+            <Address>10.0.0.57</Address>
+            <RouteMapIn i:nil="true"/>
+            <RouteMapOut i:nil="true"/>
+            <Vrf i:nil="true"/>
+          </BGPPeer>
+          <BGPPeer>
+            <ElementType>BGPPeer</ElementType>
+            <Address>10.0.0.59</Address>
+            <RouteMapIn i:nil="true"/>
+            <RouteMapOut i:nil="true"/>
+            <Vrf i:nil="true"/>
+          </BGPPeer>
+          <BGPPeer>
+            <ElementType>BGPPeer</ElementType>
+            <Address>10.0.0.61</Address>
+            <RouteMapIn i:nil="true"/>
+            <RouteMapOut i:nil="true"/>
+            <Vrf i:nil="true"/>
+          </BGPPeer>
+          <BGPPeer>
+            <ElementType>BGPPeer</ElementType>
+            <Address>10.0.0.63</Address>
+            <RouteMapIn i:nil="true"/>
+            <RouteMapOut i:nil="true"/>
+            <Vrf i:nil="true"/>
+          </BGPPeer>
+          <BGPPeer i:type="a:BGPPeerPassive">
+            <ElementType>BGPPeer</ElementType>
+            <Address>10.1.0.32</Address>
+            <RouteMapIn i:nil="true"/>
+            <RouteMapOut i:nil="true"/>
+            <Vrf i:nil="true"/>
+            <a:Name>BGPSLBPassive</a:Name>
+	    <a:PeersRange>10.255.0.0/25</a:PeersRange>
+          </BGPPeer>
+          <BGPPeer i:type="a:BGPPeerPassive">
+            <ElementType>BGPPeer</ElementType>
+            <Address>10.1.0.32</Address>
+            <RouteMapIn i:nil="true"/>
+            <RouteMapOut i:nil="true"/>
+            <Vrf i:nil="true"/>
+            <a:Name>BGPVac</a:Name>
+	    <a:PeersRange>192.168.0.0/21</a:PeersRange>
+          </BGPPeer>
+        </a:Peers>
+        <a:RouteMaps/>
+      </a:BGPRouterDeclaration>
+      <a:BGPRouterDeclaration>
+	<a:ASN>64600</a:ASN>
+        <a:Hostname>ARISTA01T1</a:Hostname>
+        <a:RouteMaps/>
+      </a:BGPRouterDeclaration>
+      <a:BGPRouterDeclaration>
+        <a:ASN>64600</a:ASN>
+        <a:Hostname>ARISTA02T1</a:Hostname>
+        <a:RouteMaps/>
+      </a:BGPRouterDeclaration>
+      <a:BGPRouterDeclaration>
+        <a:ASN>64600</a:ASN>
+        <a:Hostname>ARISTA03T1</a:Hostname>
+        <a:RouteMaps/>
+      </a:BGPRouterDeclaration>
+      <a:BGPRouterDeclaration>
+        <a:ASN>64600</a:ASN>
+        <a:Hostname>ARISTA04T1</a:Hostname>
+        <a:RouteMaps/>
+      </a:BGPRouterDeclaration>
+    </Routers>
+  </CpgDec>
+  <DeviceInfos>
+    <DeviceInfo>
+      <EthernetInterfaces xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution">
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>Ethernet1/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>1/1</PortName>
+          <SonicName>Ethernet0</SonicName>
+          <Speed>50000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>2</Index>
+          <InterfaceName>Ethernet1/3</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>1/3</PortName>
+          <SonicName>Ethernet2</SonicName>
+          <Speed>50000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>3</Index>
+          <InterfaceName>Ethernet2/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>2/1</PortName>
+          <SonicName>Ethernet4</SonicName>
+          <Speed>50000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>4</Index>
+          <InterfaceName>Ethernet2/3</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>2/3</PortName>
+          <SonicName>Ethernet6</SonicName>
+          <Speed>50000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>5</Index>
+          <InterfaceName>Ethernet3/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>3/1</PortName>
+          <SonicName>Ethernet8</SonicName>
+          <Speed>50000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>6</Index>
+          <InterfaceName>Ethernet3/3</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>3/3</PortName>
+          <SonicName>Ethernet10</SonicName>
+          <Speed>50000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>7</Index>
+          <InterfaceName>Ethernet4/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>4/1</PortName>
+          <SonicName>Ethernet12</SonicName>
+          <Speed>50000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>8</Index>
+          <InterfaceName>Ethernet4/3</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>4/3</PortName>
+          <SonicName>Ethernet14</SonicName>
+          <Speed>50000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>9</Index>
+          <InterfaceName>Ethernet5/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>5/1</PortName>
+          <SonicName>Ethernet16</SonicName>
+          <Speed>50000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>10</Index>
+          <InterfaceName>Ethernet5/3</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>5/3</PortName>
+          <SonicName>Ethernet18</SonicName>
+          <Speed>50000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>11</Index>
+          <InterfaceName>Ethernet6/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>6/1</PortName>
+          <SonicName>Ethernet20</SonicName>
+          <Speed>50000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>12</Index>
+          <InterfaceName>Ethernet6/3</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>6/3</PortName>
+          <SonicName>Ethernet22</SonicName>
+          <Speed>50000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>13</Index>
+          <InterfaceName>Ethernet7/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>7/1</PortName>
+          <SonicName>Ethernet24</SonicName>
+          <Speed>50000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>14</Index>
+          <InterfaceName>Ethernet7/3</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>7/3</PortName>
+          <SonicName>Ethernet26</SonicName>
+          <Speed>50000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>15</Index>
+          <InterfaceName>Ethernet8/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>8/1</PortName>
+          <SonicName>Ethernet28</SonicName>
+          <Speed>50000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>16</Index>
+          <InterfaceName>Ethernet8/3</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>8/3</PortName>
+          <SonicName>Ethernet30</SonicName>
+          <Speed>50000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>17</Index>
+          <InterfaceName>Ethernet9/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>9/1</PortName>
+          <SonicName>Ethernet32</SonicName>
+          <Speed>50000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>18</Index>
+          <InterfaceName>Ethernet9/3</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>9/3</PortName>
+          <SonicName>Ethernet34</SonicName>
+          <Speed>50000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>19</Index>
+          <InterfaceName>Ethernet10/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>10/1</PortName>
+          <SonicName>Ethernet36</SonicName>
+          <Speed>50000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>20</Index>
+          <InterfaceName>Ethernet10/3</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>10/3</PortName>
+          <SonicName>Ethernet38</SonicName>
+          <Speed>50000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>21</Index>
+          <InterfaceName>Ethernet11/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>11/1</PortName>
+          <SonicName>Ethernet40</SonicName>
+          <Speed>50000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>22</Index>
+          <InterfaceName>Ethernet11/3</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>11/3</PortName>
+          <SonicName>Ethernet42</SonicName>
+          <Speed>50000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>23</Index>
+          <InterfaceName>Ethernet12/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>12/1</PortName>
+          <SonicName>Ethernet44</SonicName>
+          <Speed>50000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>24</Index>
+          <InterfaceName>Ethernet12/3</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>12/3</PortName>
+          <SonicName>Ethernet46</SonicName>
+          <Speed>50000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>25</Index>
+          <InterfaceName>Ethernet13/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>13/1</PortName>
+          <SonicName>Ethernet48</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>26</Index>
+          <InterfaceName>Ethernet14/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>14/1</PortName>
+          <SonicName>Ethernet52</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>27</Index>
+          <InterfaceName>Ethernet15/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>15/1</PortName>
+          <SonicName>Ethernet56</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>28</Index>
+          <InterfaceName>Ethernet16/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>16/1</PortName>
+          <SonicName>Ethernet60</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>29</Index>
+          <InterfaceName>Ethernet17/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>17/1</PortName>
+          <SonicName>Ethernet64</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>30</Index>
+          <InterfaceName>Ethernet18/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>18/1</PortName>
+          <SonicName>Ethernet68</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>31</Index>
+          <InterfaceName>Ethernet19/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>19/1</PortName>
+          <SonicName>Ethernet72</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>32</Index>
+          <InterfaceName>Ethernet20/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>20/1</PortName>
+          <SonicName>Ethernet76</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>33</Index>
+          <InterfaceName>Ethernet21/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>21/1</PortName>
+          <SonicName>Ethernet80</SonicName>
+          <Speed>50000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>34</Index>
+          <InterfaceName>Ethernet21/3</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>21/3</PortName>
+          <SonicName>Ethernet82</SonicName>
+          <Speed>50000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>35</Index>
+          <InterfaceName>Ethernet22/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>22/1</PortName>
+          <SonicName>Ethernet84</SonicName>
+          <Speed>50000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>36</Index>
+          <InterfaceName>Ethernet22/3</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>22/3</PortName>
+          <SonicName>Ethernet86</SonicName>
+          <Speed>50000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>37</Index>
+          <InterfaceName>Ethernet23/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>23/1</PortName>
+          <SonicName>Ethernet88</SonicName>
+          <Speed>50000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>38</Index>
+          <InterfaceName>Ethernet23/3</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>23/3</PortName>
+          <SonicName>Ethernet90</SonicName>
+          <Speed>50000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>39</Index>
+          <InterfaceName>Ethernet24/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>24/1</PortName>
+          <SonicName>Ethernet92</SonicName>
+          <Speed>50000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>40</Index>
+          <InterfaceName>Ethernet24/3</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>24/3</PortName>
+          <SonicName>Ethernet94</SonicName>
+          <Speed>50000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>41</Index>
+          <InterfaceName>Ethernet25/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>25/1</PortName>
+          <SonicName>Ethernet96</SonicName>
+          <Speed>50000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>42</Index>
+          <InterfaceName>Ethernet25/3</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>25/3</PortName>
+          <SonicName>Ethernet98</SonicName>
+          <Speed>50000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>43</Index>
+          <InterfaceName>Ethernet26/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>26/1</PortName>
+          <SonicName>Ethernet100</SonicName>
+          <Speed>50000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>44</Index>
+          <InterfaceName>Ethernet26/3</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>26/3</PortName>
+          <SonicName>Ethernet102</SonicName>
+          <Speed>50000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>45</Index>
+          <InterfaceName>Ethernet27/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>27/1</PortName>
+          <SonicName>Ethernet104</SonicName>
+          <Speed>50000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>46</Index>
+          <InterfaceName>Ethernet27/3</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>27/3</PortName>
+          <SonicName>Ethernet106</SonicName>
+          <Speed>50000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>47</Index>
+          <InterfaceName>Ethernet28/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>28/1</PortName>
+          <SonicName>Ethernet108</SonicName>
+          <Speed>50000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>48</Index>
+          <InterfaceName>Ethernet28/3</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>28/3</PortName>
+          <SonicName>Ethernet110</SonicName>
+          <Speed>50000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>49</Index>
+          <InterfaceName>Ethernet29/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>29/1</PortName>
+          <SonicName>Ethernet112</SonicName>
+          <Speed>50000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>50</Index>
+          <InterfaceName>Ethernet29/3</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>29/3</PortName>
+          <SonicName>Ethernet114</SonicName>
+          <Speed>50000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>51</Index>
+          <InterfaceName>Ethernet30/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>30/1</PortName>
+          <SonicName>Ethernet116</SonicName>
+          <Speed>50000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>52</Index>
+          <InterfaceName>Ethernet30/3</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>30/3</PortName>
+          <SonicName>Ethernet118</SonicName>
+          <Speed>50000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>53</Index>
+          <InterfaceName>Ethernet31/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>31/1</PortName>
+          <SonicName>Ethernet120</SonicName>
+          <Speed>50000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>54</Index>
+          <InterfaceName>Ethernet31/3</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>31/3</PortName>
+          <SonicName>Ethernet122</SonicName>
+          <Speed>50000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>55</Index>
+          <InterfaceName>Ethernet32/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>32/1</PortName>
+          <SonicName>Ethernet124</SonicName>
+          <Speed>50000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>56</Index>
+          <InterfaceName>Ethernet32/3</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>32/3</PortName>
+          <SonicName>Ethernet126</SonicName>
+          <Speed>50000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>57</Index>
+          <InterfaceName>Ethernet33/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>33/1</PortName>
+          <SonicName>Ethernet128</SonicName>
+          <Speed>50000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>58</Index>
+          <InterfaceName>Ethernet33/3</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>33/3</PortName>
+          <SonicName>Ethernet130</SonicName>
+          <Speed>50000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>59</Index>
+          <InterfaceName>Ethernet34/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>34/1</PortName>
+          <SonicName>Ethernet132</SonicName>
+          <Speed>50000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>60</Index>
+          <InterfaceName>Ethernet34/3</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>34/3</PortName>
+          <SonicName>Ethernet134</SonicName>
+          <Speed>50000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>61</Index>
+          <InterfaceName>Ethernet35/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>35/1</PortName>
+          <SonicName>Ethernet136</SonicName>
+          <Speed>50000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>62</Index>
+          <InterfaceName>Ethernet35/3</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>35/3</PortName>
+          <SonicName>Ethernet138</SonicName>
+          <Speed>50000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>63</Index>
+          <InterfaceName>Ethernet36/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>36/1</PortName>
+          <SonicName>Ethernet140</SonicName>
+          <Speed>50000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>64</Index>
+          <InterfaceName>Ethernet36/3</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>36/3</PortName>
+          <SonicName>Ethernet142</SonicName>
+          <Speed>50000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>65</Index>
+          <InterfaceName>Ethernet37/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>37/1</PortName>
+          <SonicName>Ethernet144</SonicName>
+          <Speed>50000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>66</Index>
+          <InterfaceName>Ethernet37/3</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>37/3</PortName>
+          <SonicName>Ethernet146</SonicName>
+          <Speed>50000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>67</Index>
+          <InterfaceName>Ethernet38/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>38/1</PortName>
+          <SonicName>Ethernet148</SonicName>
+          <Speed>50000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>68</Index>
+          <InterfaceName>Ethernet38/3</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>38/3</PortName>
+          <SonicName>Ethernet150</SonicName>
+          <Speed>50000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>69</Index>
+          <InterfaceName>Ethernet39/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>39/1</PortName>
+          <SonicName>Ethernet152</SonicName>
+          <Speed>50000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>70</Index>
+          <InterfaceName>Ethernet39/3</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>39/3</PortName>
+          <SonicName>Ethernet154</SonicName>
+          <Speed>50000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>71</Index>
+          <InterfaceName>Ethernet40/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>40/1</PortName>
+          <SonicName>Ethernet156</SonicName>
+          <Speed>50000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>72</Index>
+          <InterfaceName>Ethernet40/3</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>40/3</PortName>
+          <SonicName>Ethernet158</SonicName>
+          <Speed>50000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>73</Index>
+          <InterfaceName>Ethernet41/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>41/1</PortName>
+          <SonicName>Ethernet160</SonicName>
+          <Speed>50000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>74</Index>
+          <InterfaceName>Ethernet41/3</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>41/3</PortName>
+          <SonicName>Ethernet162</SonicName>
+          <Speed>50000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>75</Index>
+          <InterfaceName>Ethernet42/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>42/1</PortName>
+          <SonicName>Ethernet164</SonicName>
+          <Speed>50000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>76</Index>
+          <InterfaceName>Ethernet42/3</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>42/3</PortName>
+          <SonicName>Ethernet166</SonicName>
+          <Speed>50000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>77</Index>
+          <InterfaceName>Ethernet43/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>43/1</PortName>
+          <SonicName>Ethernet168</SonicName>
+          <Speed>50000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>78</Index>
+          <InterfaceName>Ethernet43/3</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>43/3</PortName>
+          <SonicName>Ethernet170</SonicName>
+          <Speed>50000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>79</Index>
+          <InterfaceName>Ethernet44/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>44/1</PortName>
+          <SonicName>Ethernet172</SonicName>
+          <Speed>50000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>80</Index>
+          <InterfaceName>Ethernet44/3</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>44/3</PortName>
+          <SonicName>Ethernet174</SonicName>
+          <Speed>50000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>81</Index>
+          <InterfaceName>Ethernet45/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>45/1</PortName>
+          <SonicName>Ethernet176</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>82</Index>
+          <InterfaceName>Ethernet46/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>46/1</PortName>
+          <SonicName>Ethernet180</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>83</Index>
+          <InterfaceName>Ethernet47/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>47/1</PortName>
+          <SonicName>Ethernet184</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>84</Index>
+          <InterfaceName>Ethernet48/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>48/1</PortName>
+          <SonicName>Ethernet188</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>85</Index>
+          <InterfaceName>Ethernet49/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>49/1</PortName>
+          <SonicName>Ethernet192</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>86</Index>
+          <InterfaceName>Ethernet50/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>50/1</PortName>
+          <SonicName>Ethernet196</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>87</Index>
+          <InterfaceName>Ethernet51/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>51/1</PortName>
+          <SonicName>Ethernet200</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>88</Index>
+          <InterfaceName>Ethernet52/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>52/1</PortName>
+          <SonicName>Ethernet204</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>89</Index>
+          <InterfaceName>Ethernet53/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>53/1</PortName>
+          <SonicName>Ethernet208</SonicName>
+          <Speed>50000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>90</Index>
+          <InterfaceName>Ethernet53/3</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>53/3</PortName>
+          <SonicName>Ethernet210</SonicName>
+          <Speed>50000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>91</Index>
+          <InterfaceName>Ethernet54/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>54/1</PortName>
+          <SonicName>Ethernet212</SonicName>
+          <Speed>50000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>92</Index>
+          <InterfaceName>Ethernet54/3</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>54/3</PortName>
+          <SonicName>Ethernet214</SonicName>
+          <Speed>50000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>93</Index>
+          <InterfaceName>Ethernet55/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>55/1</PortName>
+          <SonicName>Ethernet216</SonicName>
+          <Speed>50000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>94</Index>
+          <InterfaceName>Ethernet55/3</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>55/3</PortName>
+          <SonicName>Ethernet218</SonicName>
+          <Speed>50000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>95</Index>
+          <InterfaceName>Ethernet56/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>56/1</PortName>
+          <SonicName>Ethernet220</SonicName>
+          <Speed>50000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>96</Index>
+          <InterfaceName>Ethernet56/3</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>56/3</PortName>
+          <SonicName>Ethernet222</SonicName>
+          <Speed>50000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>97</Index>
+          <InterfaceName>Ethernet57/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>57/1</PortName>
+          <SonicName>Ethernet224</SonicName>
+          <Speed>50000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>98</Index>
+          <InterfaceName>Ethernet57/3</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>57/3</PortName>
+          <SonicName>Ethernet226</SonicName>
+          <Speed>50000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>99</Index>
+          <InterfaceName>Ethernet58/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>58/1</PortName>
+          <SonicName>Ethernet228</SonicName>
+          <Speed>50000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>100</Index>
+          <InterfaceName>Ethernet58/3</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>58/3</PortName>
+          <SonicName>Ethernet230</SonicName>
+          <Speed>50000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>101</Index>
+          <InterfaceName>Ethernet59/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>59/1</PortName>
+          <SonicName>Ethernet232</SonicName>
+          <Speed>50000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>102</Index>
+          <InterfaceName>Ethernet59/3</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>59/3</PortName>
+          <SonicName>Ethernet234</SonicName>
+          <Speed>50000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>103</Index>
+          <InterfaceName>Ethernet60/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>60/1</PortName>
+          <SonicName>Ethernet236</SonicName>
+          <Speed>50000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>104</Index>
+          <InterfaceName>Ethernet60/3</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>60/3</PortName>
+          <SonicName>Ethernet238</SonicName>
+          <Speed>50000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>105</Index>
+          <InterfaceName>Ethernet61/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>61/1</PortName>
+          <SonicName>Ethernet240</SonicName>
+          <Speed>50000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>106</Index>
+          <InterfaceName>Ethernet61/3</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>61/3</PortName>
+          <SonicName>Ethernet242</SonicName>
+          <Speed>50000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>107</Index>
+          <InterfaceName>Ethernet62/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>62/1</PortName>
+          <SonicName>Ethernet244</SonicName>
+          <Speed>50000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>108</Index>
+          <InterfaceName>Ethernet62/3</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>62/3</PortName>
+          <SonicName>Ethernet246</SonicName>
+          <Speed>50000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>109</Index>
+          <InterfaceName>Ethernet63/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>63/1</PortName>
+          <SonicName>Ethernet248</SonicName>
+          <Speed>50000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>110</Index>
+          <InterfaceName>Ethernet63/3</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>63/3</PortName>
+          <SonicName>Ethernet250</SonicName>
+          <Speed>50000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>111</Index>
+          <InterfaceName>Ethernet64/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>64/1</PortName>
+          <SonicName>Ethernet252</SonicName>
+          <Speed>50000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>112</Index>
+          <InterfaceName>Ethernet64/3</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>64/3</PortName>
+          <SonicName>Ethernet254</SonicName>
+          <Speed>50000</Speed>
+        </a:EthernetInterface>
+      </EthernetInterfaces>
+      <FlowControl>true</FlowControl>
+      <Height>0</Height>
+      <HwSku>Arista-7260CX3-D92C16</HwSku>
+      <ManagementInterfaces/>
+    </DeviceInfo>
+  </DeviceInfos>
+  <DpgDec>
+    <DeviceDataPlaneInfo>
+      <IPSecTunnels/>
+      <LoopbackIPInterfaces xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution">
+        <a:LoopbackIPInterface>
+          <ElementType>LoopbackInterface</ElementType>
+          <Name>HostIP</Name>
+          <AttachTo>Loopback0</AttachTo>
+          <a:Prefix xmlns:b="Microsoft.Search.Autopilot.NetMux">
+            <b:IPPrefix>10.1.0.32/32</b:IPPrefix>
+          </a:Prefix>
+          <a:PrefixStr>10.1.0.32/32</a:PrefixStr>
+        </a:LoopbackIPInterface>
+        <a:LoopbackIPInterface>
+          <ElementType>LoopbackInterface</ElementType>
+          <Name>HostIP1</Name>
+          <AttachTo>Loopback0</AttachTo>
+          <a:Prefix xmlns:b="Microsoft.Search.Autopilot.NetMux">
+            <b:IPPrefix>FC00:1::32/128</b:IPPrefix>
+          </a:Prefix>
+	  <a:PrefixStr>FC00:1::32/128</a:PrefixStr>
+        </a:LoopbackIPInterface>
+      </LoopbackIPInterfaces>
+      <ManagementIPInterfaces xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution">
+        <a:ManagementIPInterface>
+          <ElementType>ManagementInterface</ElementType>
+          <Name>ManagementIP</Name>
+          <AttachTo>eth0</AttachTo>
+          <a:Prefix xmlns:b="Microsoft.Search.Autopilot.NetMux">
+	    <b:IPPrefix>10.3.146.57/23</b:IPPrefix>
+          </a:Prefix>
+	  <a:PrefixStr>10.3.146.57/23</a:PrefixStr>
+        </a:ManagementIPInterface>
+        <a:ManagementIPInterface>
+          <ElementType>ManagementInterface</ElementType>
+          <Name>v6ManagementIP</Name>
+          <AttachTo>eth0</AttachTo>
+          <a:Prefix xmlns:b="Microsoft.Search.Autopilot.NetMux">
+            <b:IPPrefix>FC00:2::32/64</b:IPPrefix>
+          </a:Prefix>
+	  <a:PrefixStr>FC00:2::32/64</a:PrefixStr>
+          <a:ReuseScopeStr i:nil="true"/>
+        </a:ManagementIPInterface>
+      </ManagementIPInterfaces>
+      <ManagementVIPInterfaces xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+      <MplsInterfaces/>
+      <MplsTeInterfaces/>
+      <RsvpInterfaces/>
+      <Hostname>str-7260cx3-1</Hostname>
+      <PortChannelInterfaces>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel1</Name>
+          <AttachTo>Ethernet13/1;Ethernet14/1</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel2</Name>
+          <AttachTo>Ethernet15/1;Ethernet16/1</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel3</Name>
+          <AttachTo>Ethernet17/1;Ethernet18/1</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel4</Name>
+          <AttachTo>Ethernet19/1;Ethernet20/1</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+      </PortChannelInterfaces>
+      <VlanInterfaces>
+        <VlanInterface>
+          <ElementType>VlanInterface</ElementType>
+          <Name>Vlan1000</Name>
+	  <AttachTo>Ethernet11/1;Ethernet21/1;Ethernet44/1;Ethernet54/1;Ethernet23/1;Ethernet25/1;Ethernet27/1;Ethernet29/1;Ethernet31/1;Ethernet34/1;Ethernet36/1;Ethernet38/1;Ethernet40/1;Ethernet42/1</AttachTo>
+          <DhcpRelays>192.0.0.1;192.0.0.2;192.0.0.3;192.0.0.4;192.0.0.5;192.0.0.6;192.0.0.7;192.0.0.8;192.0.0.9;192.0.0.10;192.0.0.11;192.0.0.12;192.0.0.13;192.0.0.14;192.0.0.15;192.0.0.16;192.0.0.17;192.0.0.18;192.0.0.19;192.0.0.20;192.0.0.21;192.0.0.22;192.0.0.23;192.0.0.24;192.0.0.25;192.0.0.26;192.0.0.27;192.0.0.28;192.0.0.29;192.0.0.30;192.0.0.31;192.0.0.32;192.0.0.33;192.0.0.34;192.0.0.35;192.0.0.36;192.0.0.37;192.0.0.38;192.0.0.39;192.0.0.40;192.0.0.41;192.0.0.42;192.0.0.43;192.0.0.44;192.0.0.45;192.0.0.46;192.0.0.47;192.0.0.48</DhcpRelays>
+          <Dhcpv6Relays>fc02:2000::1;fc02:2000::2;fc02:2000::3;fc02:2000::4</Dhcpv6Relays>
+          <VlanID>1000</VlanID>
+          <Tag>1000</Tag>
+	  <Subnets>192.168.0.0/21</Subnets>
+        </VlanInterface>
+      </VlanInterfaces>
+      <IPInterfaces>
+        <IPInterface>
+          <ElementType>IPInterface</ElementType>
+          <Name i:nil="true"/>
+          <AttachTo>PortChannel1</AttachTo>
+          <Prefix>10.0.0.56/31</Prefix>
+        </IPInterface>
+        <IPInterface>
+          <ElementType>IPInterface</ElementType>
+          <Name i:nil="true"/>
+          <AttachTo>PortChannel1</AttachTo>
+          <Prefix>FC00::71/126</Prefix>
+        </IPInterface>
+        <IPInterface>
+          <ElementType>IPInterface</ElementType>
+          <Name i:nil="true"/>
+          <AttachTo>PortChannel2</AttachTo>
+          <Prefix>10.0.0.58/31</Prefix>
+        </IPInterface>
+        <IPInterface>
+          <ElementType>IPInterface</ElementType>
+          <Name i:nil="true"/>
+          <AttachTo>PortChannel2</AttachTo>
+          <Prefix>FC00::75/126</Prefix>
+        </IPInterface>
+        <IPInterface>
+          <ElementType>IPInterface</ElementType>
+          <Name i:nil="true"/>
+          <AttachTo>PortChannel3</AttachTo>
+          <Prefix>10.0.0.60/31</Prefix>
+        </IPInterface>
+        <IPInterface>
+          <ElementType>IPInterface</ElementType>
+          <Name i:nil="true"/>
+          <AttachTo>PortChannel3</AttachTo>
+          <Prefix>FC00::79/126</Prefix>
+        </IPInterface>
+        <IPInterface>
+          <ElementType>IPInterface</ElementType>
+          <Name i:nil="true"/>
+          <AttachTo>PortChannel4</AttachTo>
+          <Prefix>10.0.0.62/31</Prefix>
+        </IPInterface>
+        <IPInterface>
+          <ElementType>IPInterface</ElementType>
+          <Name i:nil="true"/>
+          <AttachTo>PortChannel4</AttachTo>
+          <Prefix>FC00::7D/126</Prefix>
+        </IPInterface>
+        <IPInterface>
+          <ElementType>IPInterface</ElementType>
+          <Name i:nil="true"/>
+          <AttachTo>Vlan1000</AttachTo>
+	  <Prefix>192.168.0.1/21</Prefix>
+        </IPInterface>
+        <IPInterface>
+          <ElementType>IPInterface</ElementType>
+          <Name i:nil="true"/>
+          <AttachTo>Vlan1000</AttachTo>
+	  <Prefix>fc02:1000::1/64</Prefix>
+        </IPInterface>
+      </IPInterfaces>
+      <DataAcls/>
+      <AclInterfaces>
+        <AclInterface>
+          <AttachTo>ERSPAN</AttachTo>
+          <InAcl>everflow</InAcl>
+          <Type>Everflow</Type>
+        </AclInterface>
+        <AclInterface>
+          <AttachTo>ERSPANv6</AttachTo>
+          <InAcl>everflowV6</InAcl>
+          <Type>Everflow</Type>
+        </AclInterface>
+        <AclInterface>
+          <AttachTo>VTY_LINE</AttachTo>
+          <InAcl>ssh-only</InAcl>
+          <Type>SSH</Type>
+        </AclInterface>
+      </AclInterfaces>
+    </DeviceDataPlaneInfo>
+  </DpgDec>
+  <MetadataDeclaration>
+    <Devices xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution">
+      <a:DeviceMetadata>
+        <a:Name>str-7260cx3-1</a:Name>
+        <a:Properties>
+          <a:DeviceProperty>
+            <a:Name>DeploymentId</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>2</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>FirmwareProfile</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>SONiC-Arista-7260CX364-D92C16-ToRRouter-Storage</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>NtpResources</a:Name>
+            <a:Reference>Public.Ntp</a:Reference>
+            <a:Value>10.20.8.129;10.20.8.130</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>SnmpResources</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>10.20.6.16</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>SonicQosProfile</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Balanced</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>SyslogResources</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>10.64.246.95</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>TacacsGroup</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Starlab</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>TacacsServer</a:Name>
+	    <a:Value>100.127.20.21</a:Value>
+          </a:DeviceProperty>
+        </a:Properties>
+      </a:DeviceMetadata>
+    </Devices>
+    <Properties xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+  </MetadataDeclaration>
+  <PngDec>
+    <DeviceInterfaceLinks>
+      <DeviceLinkBase i:type="DeviceInterfaceLink">
+        <ElementType>DeviceInterfaceLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <EndDevice>ARISTA01T1</EndDevice>
+        <EndPort>Ethernet27/1</EndPort>
+        <StartDevice>str-7260cx3-1</StartDevice>
+        <StartPort>Ethernet13/1</StartPort>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="DeviceInterfaceLink">
+        <ElementType>DeviceInterfaceLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <EndDevice>ARISTA01T1</EndDevice>
+        <EndPort>Ethernet28/1</EndPort>
+        <StartDevice>str-7260cx3-1</StartDevice>
+        <StartPort>Ethernet14/1</StartPort>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="DeviceInterfaceLink">
+        <ElementType>DeviceInterfaceLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <EndDevice>ARISTA02T1</EndDevice>
+        <EndPort>Ethernet27/1</EndPort>
+        <StartDevice>str-7260cx3-1</StartDevice>
+        <StartPort>Ethernet15/1</StartPort>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="DeviceInterfaceLink">
+        <ElementType>DeviceInterfaceLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <EndDevice>ARISTA02T1</EndDevice>
+        <EndPort>Ethernet28/1</EndPort>
+        <StartDevice>str-7260cx3-1</StartDevice>
+        <StartPort>Ethernet16/1</StartPort>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="DeviceInterfaceLink">
+        <ElementType>DeviceInterfaceLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <EndDevice>ARISTA03T1</EndDevice>
+        <EndPort>Ethernet27/1</EndPort>
+        <StartDevice>str-7260cx3-1</StartDevice>
+        <StartPort>Ethernet17/1</StartPort>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="DeviceInterfaceLink">
+        <ElementType>DeviceInterfaceLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <EndDevice>ARISTA03T1</EndDevice>
+        <EndPort>Ethernet28/1</EndPort>
+        <StartDevice>str-7260cx3-1</StartDevice>
+        <StartPort>Ethernet18/1</StartPort>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="DeviceInterfaceLink">
+        <ElementType>DeviceInterfaceLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <EndDevice>ARISTA04T1</EndDevice>
+        <EndPort>Ethernet27/1</EndPort>
+        <StartDevice>str-7260cx3-1</StartDevice>
+        <StartPort>Ethernet19/1</StartPort>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="DeviceInterfaceLink">
+        <ElementType>DeviceInterfaceLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <EndDevice>ARISTA04T1</EndDevice>
+        <EndPort>Ethernet28/1</EndPort>
+        <StartDevice>str-7260cx3-1</StartDevice>
+        <StartPort>Ethernet20/1</StartPort>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="DeviceInterfaceLink">
+        <ElementType>DeviceInterfaceLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <EndDevice>str-7260cx3-1</EndDevice>
+        <EndPort>Ethernet11/1</EndPort>
+        <StartDevice>Server0</StartDevice>
+        <StartPort>eth0</StartPort>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="DeviceInterfaceLink">
+        <ElementType>DeviceInterfaceLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <EndDevice>str-7260cx3-1</EndDevice>
+        <EndPort>Ethernet21/1</EndPort>
+        <StartDevice>Server1</StartDevice>
+        <StartPort>eth0</StartPort>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="DeviceInterfaceLink">
+        <ElementType>DeviceInterfaceLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <EndDevice>str-7260cx3-1</EndDevice>
+        <EndPort>Ethernet23/1</EndPort>
+        <StartDevice>Server2</StartDevice>
+        <StartPort>eth0</StartPort>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="DeviceInterfaceLink">
+        <ElementType>DeviceInterfaceLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <EndDevice>str-7260cx3-1</EndDevice>
+        <EndPort>Ethernet25/1</EndPort>
+        <StartDevice>Server3</StartDevice>
+        <StartPort>eth0</StartPort>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="DeviceInterfaceLink">
+        <ElementType>DeviceInterfaceLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <EndDevice>str-7260cx3-1</EndDevice>
+        <EndPort>Ethernet27/1</EndPort>
+        <StartDevice>Server4</StartDevice>
+        <StartPort>eth0</StartPort>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="DeviceInterfaceLink">
+        <ElementType>DeviceInterfaceLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <EndDevice>str-7260cx3-1</EndDevice>
+        <EndPort>Ethernet29/1</EndPort>
+        <StartDevice>Server5</StartDevice>
+        <StartPort>eth0</StartPort>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="DeviceInterfaceLink">
+        <ElementType>DeviceInterfaceLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <EndDevice>str-7260cx3-1</EndDevice>
+        <EndPort>Ethernet31/1</EndPort>
+        <StartDevice>Server6</StartDevice>
+        <StartPort>eth0</StartPort>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="DeviceInterfaceLink">
+        <ElementType>DeviceInterfaceLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <EndDevice>str-7260cx3-1</EndDevice>
+        <EndPort>Ethernet34/1</EndPort>
+        <StartDevice>Server7</StartDevice>
+        <StartPort>eth0</StartPort>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="DeviceInterfaceLink">
+        <ElementType>DeviceInterfaceLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <EndDevice>str-7260cx3-1</EndDevice>
+        <EndPort>Ethernet36/1</EndPort>
+        <StartDevice>Server8</StartDevice>
+        <StartPort>eth0</StartPort>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="DeviceInterfaceLink">
+        <ElementType>DeviceInterfaceLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <EndDevice>str-7260cx3-1</EndDevice>
+        <EndPort>Ethernet38/1</EndPort>
+        <StartDevice>Server9</StartDevice>
+        <StartPort>eth0</StartPort>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="DeviceInterfaceLink">
+        <ElementType>DeviceInterfaceLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <EndDevice>str-7260cx3-1</EndDevice>
+        <EndPort>Ethernet40/1</EndPort>
+        <StartDevice>Server10</StartDevice>
+        <StartPort>eth0</StartPort>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="DeviceInterfaceLink">
+        <ElementType>DeviceInterfaceLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <EndDevice>str-7260cx3-1</EndDevice>
+        <EndPort>Ethernet42/1</EndPort>
+        <StartDevice>Server11</StartDevice>
+        <StartPort>eth0</StartPort>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="DeviceInterfaceLink">
+        <ElementType>DeviceInterfaceLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <EndDevice>str-7260cx3-1</EndDevice>
+        <EndPort>Ethernet44/1</EndPort>
+        <StartDevice>Server12</StartDevice>
+        <StartPort>eth0</StartPort>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="DeviceInterfaceLink">
+        <ElementType>DeviceInterfaceLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <EndDevice>str-7260cx3-1</EndDevice>
+        <EndPort>Ethernet54/1</EndPort>
+        <StartDevice>Server13</StartDevice>
+        <StartPort>eth0</StartPort>
+      </DeviceLinkBase>
+    </DeviceInterfaceLinks>
+    <Devices>
+      <Device i:type="ToRRouter">
+        <ElementType>ToRRouter</ElementType>
+        <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>10.3.146.57</a:IPPrefix>
+        </Address>
+        <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+		<a:IPPrefix>10.3.146.57/23</a:IPPrefix>
+        </ManagementAddress>
+        <Hostname>str-7260cx3-1</Hostname>
+        <HwSku>Arista-7260CX3-D92C16</HwSku>
+      </Device>
+      <Device i:type="LeafRouter">
+        <ElementType>LeafRouter</ElementType>
+        <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+		<a:IPPrefix>172.16.137.124/23</a:IPPrefix>
+        </ManagementAddress>
+        <Hostname>ARISTA01T1</Hostname>
+        <HwSku>Arista-VM</HwSku>
+      </Device>
+      <Device i:type="LeafRouter">
+        <ElementType>LeafRouter</ElementType>
+        <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+		<a:IPPrefix>172.16.137.125/23</a:IPPrefix>
+        </ManagementAddress>
+        <Hostname>ARISTA02T1</Hostname>
+        <HwSku>Arista-VM</HwSku>
+      </Device>
+      <Device i:type="LeafRouter">
+        <ElementType>LeafRouter</ElementType>
+        <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+		<a:IPPrefix>172.16.137.126/23</a:IPPrefix>
+        </ManagementAddress>
+        <Hostname>ARISTA03T1</Hostname>
+        <HwSku>Arista-VM</HwSku>
+      </Device>
+      <Device i:type="LeafRouter">
+        <ElementType>LeafRouter</ElementType>
+        <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>172.16.137.127/23</a:IPPrefix>
+        </ManagementAddress>
+        <Hostname>ARISTA04T1</Hostname>
+        <HwSku>Arista-VM</HwSku>
+      </Device>
+    </Devices>
+  </PngDec>
+  <Hostname>str-7260cx3-1</Hostname>
+  <HwSku>Arista-7260CX3-D92C16</HwSku>
+</DeviceMiniGraph>
diff --git a/src/sonic-config-engine/tests/sample_output/py2/buffer-arista7260-t0.json b/src/sonic-config-engine/tests/sample_output/py2/buffer-arista7260-t0.json
new file mode 100644
index 000000000..cdb18cfa7
--- /dev/null
+++ b/src/sonic-config-engine/tests/sample_output/py2/buffer-arista7260-t0.json
@@ -0,0 +1,426 @@
+{
+    "CABLE_LENGTH": {
+        "AZURE": {
+            "Ethernet0": "5m",
+            "Ethernet2": "5m",
+            "Ethernet4": "5m",
+            "Ethernet6": "5m",
+            "Ethernet8": "5m",
+            "Ethernet10": "5m",
+            "Ethernet12": "5m",
+            "Ethernet14": "5m",
+            "Ethernet16": "5m",
+            "Ethernet18": "5m",
+            "Ethernet20": "5m",
+            "Ethernet22": "5m",
+            "Ethernet24": "5m",
+            "Ethernet26": "5m",
+            "Ethernet28": "5m",
+            "Ethernet30": "5m",
+            "Ethernet32": "5m",
+            "Ethernet34": "5m",
+            "Ethernet36": "5m",
+            "Ethernet38": "5m",
+            "Ethernet40": "5m",
+            "Ethernet42": "5m",
+            "Ethernet44": "5m",
+            "Ethernet46": "5m",
+            "Ethernet48": "40m",
+            "Ethernet52": "40m",
+            "Ethernet56": "40m",
+            "Ethernet60": "40m",
+            "Ethernet64": "40m",
+            "Ethernet68": "40m",
+            "Ethernet72": "40m",
+            "Ethernet76": "40m",
+            "Ethernet80": "5m",
+            "Ethernet82": "5m",
+            "Ethernet84": "5m",
+            "Ethernet86": "5m",
+            "Ethernet88": "5m",
+            "Ethernet90": "5m",
+            "Ethernet92": "5m",
+            "Ethernet94": "5m",
+            "Ethernet96": "5m",
+            "Ethernet98": "5m",
+            "Ethernet100": "5m",
+            "Ethernet102": "5m",
+            "Ethernet104": "5m",
+            "Ethernet106": "5m",
+            "Ethernet108": "5m",
+            "Ethernet110": "5m",
+            "Ethernet112": "5m",
+            "Ethernet114": "5m",
+            "Ethernet116": "5m",
+            "Ethernet118": "5m",
+            "Ethernet120": "5m",
+            "Ethernet122": "5m",
+            "Ethernet124": "5m",
+            "Ethernet126": "5m",
+            "Ethernet128": "5m",
+            "Ethernet130": "5m",
+            "Ethernet132": "5m",
+            "Ethernet134": "5m",
+            "Ethernet136": "5m",
+            "Ethernet138": "5m",
+            "Ethernet140": "5m",
+            "Ethernet142": "5m",
+            "Ethernet144": "5m",
+            "Ethernet146": "5m",
+            "Ethernet148": "5m",
+            "Ethernet150": "5m",
+            "Ethernet152": "5m",
+            "Ethernet154": "5m",
+            "Ethernet156": "5m",
+            "Ethernet158": "5m",
+            "Ethernet160": "5m",
+            "Ethernet162": "5m",
+            "Ethernet164": "5m",
+            "Ethernet166": "5m",
+            "Ethernet168": "5m",
+            "Ethernet170": "5m",
+            "Ethernet172": "5m",
+            "Ethernet174": "5m",
+            "Ethernet176": "5m",
+            "Ethernet180": "5m",
+            "Ethernet184": "5m",
+            "Ethernet188": "5m",
+            "Ethernet192": "5m",
+            "Ethernet196": "5m",
+            "Ethernet200": "5m",
+            "Ethernet204": "5m",
+            "Ethernet208": "5m",
+            "Ethernet210": "5m",
+            "Ethernet212": "5m",
+            "Ethernet214": "5m",
+            "Ethernet216": "5m",
+            "Ethernet218": "5m",
+            "Ethernet220": "5m",
+            "Ethernet222": "5m",
+            "Ethernet224": "5m",
+            "Ethernet226": "5m",
+            "Ethernet228": "5m",
+            "Ethernet230": "5m",
+            "Ethernet232": "5m",
+            "Ethernet234": "5m",
+            "Ethernet236": "5m",
+            "Ethernet238": "5m",
+            "Ethernet240": "5m",
+            "Ethernet242": "5m",
+            "Ethernet244": "5m",
+            "Ethernet246": "5m",
+            "Ethernet248": "5m",
+            "Ethernet250": "5m",
+            "Ethernet252": "5m",
+            "Ethernet254": "5m",
+            "Ethernet256": "5m",
+            "Ethernet260": "5m"
+        }
+    },
+
+    "BUFFER_POOL": {
+        "ingress_lossless_pool": {
+            "size": "33329088",
+            "type": "ingress",
+            "mode": "dynamic",
+            "xoff": "7827456"
+        },
+        "egress_lossy_pool": {
+            "size": "26663272",
+            "type": "egress",
+            "mode": "dynamic"
+        },
+        "egress_lossless_pool": {
+            "size": "42349632",
+            "type": "egress",
+            "mode": "static"
+        }
+    },
+    "BUFFER_PROFILE": {
+        "ingress_lossy_profile": {
+            "pool":"ingress_lossless_pool",
+            "size":"0",
+            "static_th":"44302336"
+        },
+        "egress_lossless_profile": {
+            "pool":"egress_lossless_pool",
+            "size":"0",
+            "static_th":"42349632"
+        },
+        "egress_lossy_profile": {
+            "pool":"egress_lossy_pool",
+            "size":"1664",
+            "dynamic_th":"-1"
+        }
+    },
+
+    "BUFFER_PG": {
+        "Ethernet48|0": {
+            "profile" : "ingress_lossy_profile"
+        },
+        "Ethernet52|0": {
+            "profile" : "ingress_lossy_profile"
+        },
+        "Ethernet56|0": {
+            "profile" : "ingress_lossy_profile"
+        },
+        "Ethernet60|0": {
+            "profile" : "ingress_lossy_profile"
+        },
+        "Ethernet64|0": {
+            "profile" : "ingress_lossy_profile"
+        },
+        "Ethernet68|0": {
+            "profile" : "ingress_lossy_profile"
+        },
+        "Ethernet72|0": {
+            "profile" : "ingress_lossy_profile"
+        },
+        "Ethernet76|0": {
+            "profile" : "ingress_lossy_profile"
+        },
+        "Ethernet40|0": {
+            "profile" : "ingress_lossy_profile"
+        },
+        "Ethernet80|0": {
+            "profile" : "ingress_lossy_profile"
+        },
+        "Ethernet88|0": {
+            "profile" : "ingress_lossy_profile"
+        },
+        "Ethernet96|0": {
+            "profile" : "ingress_lossy_profile"
+        },
+        "Ethernet104|0": {
+            "profile" : "ingress_lossy_profile"
+        },
+        "Ethernet112|0": {
+            "profile" : "ingress_lossy_profile"
+        },
+        "Ethernet120|0": {
+            "profile" : "ingress_lossy_profile"
+        },
+        "Ethernet132|0": {
+            "profile" : "ingress_lossy_profile"
+        },
+        "Ethernet140|0": {
+            "profile" : "ingress_lossy_profile"
+        },
+        "Ethernet148|0": {
+            "profile" : "ingress_lossy_profile"
+        },
+        "Ethernet156|0": {
+            "profile" : "ingress_lossy_profile"
+        },
+        "Ethernet164|0": {
+            "profile" : "ingress_lossy_profile"
+        },
+        "Ethernet172|0": {
+            "profile" : "ingress_lossy_profile"
+        },
+        "Ethernet212|0": {
+            "profile" : "ingress_lossy_profile"
+        }
+    },
+
+    "BUFFER_QUEUE": {
+        "Ethernet48|3-4": {
+            "profile" : "egress_lossless_profile"
+        },
+        "Ethernet52|3-4": {
+            "profile" : "egress_lossless_profile"
+        },
+        "Ethernet56|3-4": {
+            "profile" : "egress_lossless_profile"
+        },
+        "Ethernet60|3-4": {
+            "profile" : "egress_lossless_profile"
+        },
+        "Ethernet64|3-4": {
+            "profile" : "egress_lossless_profile"
+        },
+        "Ethernet68|3-4": {
+            "profile" : "egress_lossless_profile"
+        },
+        "Ethernet72|3-4": {
+            "profile" : "egress_lossless_profile"
+        },
+        "Ethernet76|3-4": {
+            "profile" : "egress_lossless_profile"
+        },
+        "Ethernet40|3-4": {
+            "profile" : "egress_lossless_profile"
+        },
+        "Ethernet80|3-4": {
+            "profile" : "egress_lossless_profile"
+        },
+        "Ethernet88|3-4": {
+            "profile" : "egress_lossless_profile"
+        },
+        "Ethernet96|3-4": {
+            "profile" : "egress_lossless_profile"
+        },
+        "Ethernet104|3-4": {
+            "profile" : "egress_lossless_profile"
+        },
+        "Ethernet112|3-4": {
+            "profile" : "egress_lossless_profile"
+        },
+        "Ethernet120|3-4": {
+            "profile" : "egress_lossless_profile"
+        },
+        "Ethernet132|3-4": {
+            "profile" : "egress_lossless_profile"
+        },
+        "Ethernet140|3-4": {
+            "profile" : "egress_lossless_profile"
+        },
+        "Ethernet148|3-4": {
+            "profile" : "egress_lossless_profile"
+        },
+        "Ethernet156|3-4": {
+            "profile" : "egress_lossless_profile"
+        },
+        "Ethernet164|3-4": {
+            "profile" : "egress_lossless_profile"
+        },
+        "Ethernet172|3-4": {
+            "profile" : "egress_lossless_profile"
+        },
+        "Ethernet212|3-4": {
+            "profile" : "egress_lossless_profile"
+        },
+        "Ethernet48|0-2": {
+            "profile" : "egress_lossy_profile"
+        },
+        "Ethernet52|0-2": {
+            "profile" : "egress_lossy_profile"
+        },
+        "Ethernet56|0-2": {
+            "profile" : "egress_lossy_profile"
+        },
+        "Ethernet60|0-2": {
+            "profile" : "egress_lossy_profile"
+        },
+        "Ethernet64|0-2": {
+            "profile" : "egress_lossy_profile"
+        },
+        "Ethernet68|0-2": {
+            "profile" : "egress_lossy_profile"
+        },
+        "Ethernet72|0-2": {
+            "profile" : "egress_lossy_profile"
+        },
+        "Ethernet76|0-2": {
+            "profile" : "egress_lossy_profile"
+        },
+        "Ethernet40|0-2": {
+            "profile" : "egress_lossy_profile"
+        },
+        "Ethernet80|0-2": {
+            "profile" : "egress_lossy_profile"
+        },
+        "Ethernet88|0-2": {
+            "profile" : "egress_lossy_profile"
+        },
+        "Ethernet96|0-2": {
+            "profile" : "egress_lossy_profile"
+        },
+        "Ethernet104|0-2": {
+            "profile" : "egress_lossy_profile"
+        },
+        "Ethernet112|0-2": {
+            "profile" : "egress_lossy_profile"
+        },
+        "Ethernet120|0-2": {
+            "profile" : "egress_lossy_profile"
+        },
+        "Ethernet132|0-2": {
+            "profile" : "egress_lossy_profile"
+        },
+        "Ethernet140|0-2": {
+            "profile" : "egress_lossy_profile"
+        },
+        "Ethernet148|0-2": {
+            "profile" : "egress_lossy_profile"
+        },
+        "Ethernet156|0-2": {
+            "profile" : "egress_lossy_profile"
+        },
+        "Ethernet164|0-2": {
+            "profile" : "egress_lossy_profile"
+        },
+        "Ethernet172|0-2": {
+            "profile" : "egress_lossy_profile"
+        },
+        "Ethernet212|0-2": {
+            "profile" : "egress_lossy_profile"
+        },
+        "Ethernet48|5-6": {
+            "profile" : "egress_lossy_profile"
+        },
+        "Ethernet52|5-6": {
+            "profile" : "egress_lossy_profile"
+        },
+        "Ethernet56|5-6": {
+            "profile" : "egress_lossy_profile"
+        },
+        "Ethernet60|5-6": {
+            "profile" : "egress_lossy_profile"
+        },
+        "Ethernet64|5-6": {
+            "profile" : "egress_lossy_profile"
+        },
+        "Ethernet68|5-6": {
+            "profile" : "egress_lossy_profile"
+        },
+        "Ethernet72|5-6": {
+            "profile" : "egress_lossy_profile"
+        },
+        "Ethernet76|5-6": {
+            "profile" : "egress_lossy_profile"
+        },
+        "Ethernet40|5-6": {
+            "profile" : "egress_lossy_profile"
+        },
+        "Ethernet80|5-6": {
+            "profile" : "egress_lossy_profile"
+        },
+        "Ethernet88|5-6": {
+            "profile" : "egress_lossy_profile"
+        },
+        "Ethernet96|5-6": {
+            "profile" : "egress_lossy_profile"
+        },
+        "Ethernet104|5-6": {
+            "profile" : "egress_lossy_profile"
+        },
+        "Ethernet112|5-6": {
+            "profile" : "egress_lossy_profile"
+        },
+        "Ethernet120|5-6": {
+            "profile" : "egress_lossy_profile"
+        },
+        "Ethernet132|5-6": {
+            "profile" : "egress_lossy_profile"
+        },
+        "Ethernet140|5-6": {
+            "profile" : "egress_lossy_profile"
+        },
+        "Ethernet148|5-6": {
+            "profile" : "egress_lossy_profile"
+        },
+        "Ethernet156|5-6": {
+            "profile" : "egress_lossy_profile"
+        },
+        "Ethernet164|5-6": {
+            "profile" : "egress_lossy_profile"
+        },
+        "Ethernet172|5-6": {
+            "profile" : "egress_lossy_profile"
+        },
+        "Ethernet212|5-6": {
+            "profile" : "egress_lossy_profile"
+        }
+    }
+}
diff --git a/src/sonic-config-engine/tests/sample_output/py2/qos-arista7260-t0.json b/src/sonic-config-engine/tests/sample_output/py2/qos-arista7260-t0.json
new file mode 100644
index 000000000..a65953672
--- /dev/null
+++ b/src/sonic-config-engine/tests/sample_output/py2/qos-arista7260-t0.json
@@ -0,0 +1,822 @@
+{
+    "TC_TO_PRIORITY_GROUP_MAP": {
+        "AZURE": {
+            "0": "0",
+            "1": "0",
+            "2": "0",
+            "3": "3",
+            "4": "4",
+            "5": "0",
+            "6": "0",
+            "7": "7"
+        }
+    },
+    "MAP_PFC_PRIORITY_TO_QUEUE": {
+        "AZURE": {
+            "0": "0",
+            "1": "1",
+            "2": "2",
+            "3": "3",
+            "4": "4",
+            "5": "5",
+            "6": "6",
+            "7": "7"
+        }
+    },
+    "TC_TO_QUEUE_MAP": {
+        "AZURE": {
+            "0": "0",
+            "1": "1",
+            "2": "2",
+            "3": "3",
+            "4": "4",
+            "5": "5",
+            "6": "6",
+            "7": "7"
+        }
+    },
+    "DSCP_TO_TC_MAP": {
+        "AZURE": {
+            "0" : "1",
+            "1" : "1",
+            "2" : "1",
+            "3" : "3",
+            "4" : "4",
+            "5" : "2",
+            "6" : "1",
+            "7" : "1",
+            "8" : "0",
+            "9" : "1",
+            "10": "1",
+            "11": "1",
+            "12": "1",
+            "13": "1",
+            "14": "1",
+            "15": "1",
+            "16": "1",
+            "17": "1",
+            "18": "1",
+            "19": "1",
+            "20": "1",
+            "21": "1",
+            "22": "1",
+            "23": "1",
+            "24": "1",
+            "25": "1",
+            "26": "1",
+            "27": "1",
+            "28": "1",
+            "29": "1",
+            "30": "1",
+            "31": "1",
+            "32": "1",
+            "33": "1",
+            "34": "1",
+            "35": "1",
+            "36": "1",
+            "37": "1",
+            "38": "1",
+            "39": "1",
+            "40": "1",
+            "41": "1",
+            "42": "1",
+            "43": "1",
+            "44": "1",
+            "45": "1",
+            "46": "5",
+            "47": "1",
+            "48": "6",
+            "49": "1",
+            "50": "1",
+            "51": "1",
+            "52": "1",
+            "53": "1",
+            "54": "1",
+            "55": "1",
+            "56": "1",
+            "57": "1",
+            "58": "1",
+            "59": "1",
+            "60": "1",
+            "61": "1",
+            "62": "1",
+            "63": "1"
+        }
+    },
+    "SCHEDULER": {
+        "scheduler.0": {
+            "type"  : "DWRR",
+            "weight": "14"
+        },
+        "scheduler.1": {
+            "type"  : "DWRR",
+            "weight": "15"
+        }
+    },
+    "PORT_QOS_MAP": {
+        "global": {
+            "dscp_to_tc_map"  : "AZURE"
+        },
+        "Ethernet40": {
+            "dscp_to_tc_map"  : "AZURE",
+            "tc_to_queue_map" : "AZURE",
+            "tc_to_pg_map"    : "AZURE",
+            "pfc_to_queue_map": "AZURE",
+            "pfc_enable"      : "3,4",
+            "pfcwd_sw_enable" : "3,4"
+        },
+        "Ethernet48": {
+            "dscp_to_tc_map"  : "AZURE",
+            "tc_to_queue_map" : "AZURE",
+            "tc_to_pg_map"    : "AZURE",
+            "pfc_to_queue_map": "AZURE",
+            "pfc_enable"      : "3,4",
+            "pfcwd_sw_enable" : "3,4"
+        },
+        "Ethernet52": {
+            "dscp_to_tc_map"  : "AZURE",
+            "tc_to_queue_map" : "AZURE",
+            "tc_to_pg_map"    : "AZURE",
+            "pfc_to_queue_map": "AZURE",
+            "pfc_enable"      : "3,4",
+            "pfcwd_sw_enable" : "3,4"
+        },
+        "Ethernet56": {
+            "dscp_to_tc_map"  : "AZURE",
+            "tc_to_queue_map" : "AZURE",
+            "tc_to_pg_map"    : "AZURE",
+            "pfc_to_queue_map": "AZURE",
+            "pfc_enable"      : "3,4",
+            "pfcwd_sw_enable" : "3,4"
+        },
+        "Ethernet60": {
+            "dscp_to_tc_map"  : "AZURE",
+            "tc_to_queue_map" : "AZURE",
+            "tc_to_pg_map"    : "AZURE",
+            "pfc_to_queue_map": "AZURE",
+            "pfc_enable"      : "3,4",
+            "pfcwd_sw_enable" : "3,4"
+        },
+        "Ethernet64": {
+            "dscp_to_tc_map"  : "AZURE",
+            "tc_to_queue_map" : "AZURE",
+            "tc_to_pg_map"    : "AZURE",
+            "pfc_to_queue_map": "AZURE",
+            "pfc_enable"      : "3,4",
+            "pfcwd_sw_enable" : "3,4"
+        },
+        "Ethernet68": {
+            "dscp_to_tc_map"  : "AZURE",
+            "tc_to_queue_map" : "AZURE",
+            "tc_to_pg_map"    : "AZURE",
+            "pfc_to_queue_map": "AZURE",
+            "pfc_enable"      : "3,4",
+            "pfcwd_sw_enable" : "3,4"
+        },
+        "Ethernet72": {
+            "dscp_to_tc_map"  : "AZURE",
+            "tc_to_queue_map" : "AZURE",
+            "tc_to_pg_map"    : "AZURE",
+            "pfc_to_queue_map": "AZURE",
+            "pfc_enable"      : "3,4",
+            "pfcwd_sw_enable" : "3,4"
+        },
+        "Ethernet76": {
+            "dscp_to_tc_map"  : "AZURE",
+            "tc_to_queue_map" : "AZURE",
+            "tc_to_pg_map"    : "AZURE",
+            "pfc_to_queue_map": "AZURE",
+            "pfc_enable"      : "3,4",
+            "pfcwd_sw_enable" : "3,4"
+        },
+        "Ethernet80": {
+            "dscp_to_tc_map"  : "AZURE",
+            "tc_to_queue_map" : "AZURE",
+            "tc_to_pg_map"    : "AZURE",
+            "pfc_to_queue_map": "AZURE",
+            "pfc_enable"      : "3,4",
+            "pfcwd_sw_enable" : "3,4"
+        },
+        "Ethernet88": {
+            "dscp_to_tc_map"  : "AZURE",
+            "tc_to_queue_map" : "AZURE",
+            "tc_to_pg_map"    : "AZURE",
+            "pfc_to_queue_map": "AZURE",
+            "pfc_enable"      : "3,4",
+            "pfcwd_sw_enable" : "3,4"
+        },
+        "Ethernet96": {
+            "dscp_to_tc_map"  : "AZURE",
+            "tc_to_queue_map" : "AZURE",
+            "tc_to_pg_map"    : "AZURE",
+            "pfc_to_queue_map": "AZURE",
+            "pfc_enable"      : "3,4",
+            "pfcwd_sw_enable" : "3,4"
+        },
+        "Ethernet104": {
+            "dscp_to_tc_map"  : "AZURE",
+            "tc_to_queue_map" : "AZURE",
+            "tc_to_pg_map"    : "AZURE",
+            "pfc_to_queue_map": "AZURE",
+            "pfc_enable"      : "3,4",
+            "pfcwd_sw_enable" : "3,4"
+        },
+        "Ethernet112": {
+            "dscp_to_tc_map"  : "AZURE",
+            "tc_to_queue_map" : "AZURE",
+            "tc_to_pg_map"    : "AZURE",
+            "pfc_to_queue_map": "AZURE",
+            "pfc_enable"      : "3,4",
+            "pfcwd_sw_enable" : "3,4"
+        },
+        "Ethernet120": {
+            "dscp_to_tc_map"  : "AZURE",
+            "tc_to_queue_map" : "AZURE",
+            "tc_to_pg_map"    : "AZURE",
+            "pfc_to_queue_map": "AZURE",
+            "pfc_enable"      : "3,4",
+            "pfcwd_sw_enable" : "3,4"
+        },
+        "Ethernet132": {
+            "dscp_to_tc_map"  : "AZURE",
+            "tc_to_queue_map" : "AZURE",
+            "tc_to_pg_map"    : "AZURE",
+            "pfc_to_queue_map": "AZURE",
+            "pfc_enable"      : "3,4",
+            "pfcwd_sw_enable" : "3,4"
+        },
+        "Ethernet140": {
+            "dscp_to_tc_map"  : "AZURE",
+            "tc_to_queue_map" : "AZURE",
+            "tc_to_pg_map"    : "AZURE",
+            "pfc_to_queue_map": "AZURE",
+            "pfc_enable"      : "3,4",
+            "pfcwd_sw_enable" : "3,4"
+        },
+        "Ethernet148": {
+            "dscp_to_tc_map"  : "AZURE",
+            "tc_to_queue_map" : "AZURE",
+            "tc_to_pg_map"    : "AZURE",
+            "pfc_to_queue_map": "AZURE",
+            "pfc_enable"      : "3,4",
+            "pfcwd_sw_enable" : "3,4"
+        },
+        "Ethernet156": {
+            "dscp_to_tc_map"  : "AZURE",
+            "tc_to_queue_map" : "AZURE",
+            "tc_to_pg_map"    : "AZURE",
+            "pfc_to_queue_map": "AZURE",
+            "pfc_enable"      : "3,4",
+            "pfcwd_sw_enable" : "3,4"
+        },
+        "Ethernet164": {
+            "dscp_to_tc_map"  : "AZURE",
+            "tc_to_queue_map" : "AZURE",
+            "tc_to_pg_map"    : "AZURE",
+            "pfc_to_queue_map": "AZURE",
+            "pfc_enable"      : "3,4",
+            "pfcwd_sw_enable" : "3,4"
+        },
+        "Ethernet172": {
+            "dscp_to_tc_map"  : "AZURE",
+            "tc_to_queue_map" : "AZURE",
+            "tc_to_pg_map"    : "AZURE",
+            "pfc_to_queue_map": "AZURE",
+            "pfc_enable"      : "3,4",
+            "pfcwd_sw_enable" : "3,4"
+        },
+        "Ethernet212": {
+            "dscp_to_tc_map"  : "AZURE",
+            "tc_to_queue_map" : "AZURE",
+            "tc_to_pg_map"    : "AZURE",
+            "pfc_to_queue_map": "AZURE",
+            "pfc_enable"      : "3,4",
+            "pfcwd_sw_enable" : "3,4"
+        }
+    },
+    "WRED_PROFILE": {
+        "AZURE_LOSSLESS" : {
+            "wred_green_enable"      : "true",
+            "wred_yellow_enable"     : "true",
+            "wred_red_enable"        : "true",
+            "ecn"                    : "ecn_all",
+            "green_max_threshold"    : "10000000",
+            "green_min_threshold"    : "2000000",
+            "yellow_max_threshold"   : "2097152",
+            "yellow_min_threshold"   : "1048576",
+            "red_max_threshold"      : "2097152",
+            "red_min_threshold"      : "1048576",
+            "green_drop_probability" : "5",
+            "yellow_drop_probability": "5",
+            "red_drop_probability"   : "5"
+        }
+    },
+    "QUEUE": {
+        "Ethernet40|3": {
+            "scheduler"   : "scheduler.1",
+            "wred_profile": "AZURE_LOSSLESS"
+        },
+        "Ethernet48|3": {
+            "scheduler"   : "scheduler.1",
+            "wred_profile": "AZURE_LOSSLESS"
+        },
+        "Ethernet52|3": {
+            "scheduler"   : "scheduler.1",
+            "wred_profile": "AZURE_LOSSLESS"
+        },
+        "Ethernet56|3": {
+            "scheduler"   : "scheduler.1",
+            "wred_profile": "AZURE_LOSSLESS"
+        },
+        "Ethernet60|3": {
+            "scheduler"   : "scheduler.1",
+            "wred_profile": "AZURE_LOSSLESS"
+        },
+        "Ethernet64|3": {
+            "scheduler"   : "scheduler.1",
+            "wred_profile": "AZURE_LOSSLESS"
+        },
+        "Ethernet68|3": {
+            "scheduler"   : "scheduler.1",
+            "wred_profile": "AZURE_LOSSLESS"
+        },
+        "Ethernet72|3": {
+            "scheduler"   : "scheduler.1",
+            "wred_profile": "AZURE_LOSSLESS"
+        },
+        "Ethernet76|3": {
+            "scheduler"   : "scheduler.1",
+            "wred_profile": "AZURE_LOSSLESS"
+        },
+        "Ethernet80|3": {
+            "scheduler"   : "scheduler.1",
+            "wred_profile": "AZURE_LOSSLESS"
+        },
+        "Ethernet88|3": {
+            "scheduler"   : "scheduler.1",
+            "wred_profile": "AZURE_LOSSLESS"
+        },
+        "Ethernet96|3": {
+            "scheduler"   : "scheduler.1",
+            "wred_profile": "AZURE_LOSSLESS"
+        },
+        "Ethernet104|3": {
+            "scheduler"   : "scheduler.1",
+            "wred_profile": "AZURE_LOSSLESS"
+        },
+        "Ethernet112|3": {
+            "scheduler"   : "scheduler.1",
+            "wred_profile": "AZURE_LOSSLESS"
+        },
+        "Ethernet120|3": {
+            "scheduler"   : "scheduler.1",
+            "wred_profile": "AZURE_LOSSLESS"
+        },
+        "Ethernet132|3": {
+            "scheduler"   : "scheduler.1",
+            "wred_profile": "AZURE_LOSSLESS"
+        },
+        "Ethernet140|3": {
+            "scheduler"   : "scheduler.1",
+            "wred_profile": "AZURE_LOSSLESS"
+        },
+        "Ethernet148|3": {
+            "scheduler"   : "scheduler.1",
+            "wred_profile": "AZURE_LOSSLESS"
+        },
+        "Ethernet156|3": {
+            "scheduler"   : "scheduler.1",
+            "wred_profile": "AZURE_LOSSLESS"
+        },
+        "Ethernet164|3": {
+            "scheduler"   : "scheduler.1",
+            "wred_profile": "AZURE_LOSSLESS"
+        },
+        "Ethernet172|3": {
+            "scheduler"   : "scheduler.1",
+            "wred_profile": "AZURE_LOSSLESS"
+        },
+        "Ethernet212|3": {
+            "scheduler"   : "scheduler.1",
+            "wred_profile": "AZURE_LOSSLESS"
+        },
+        "Ethernet40|4": {
+            "scheduler"   : "scheduler.1",
+            "wred_profile": "AZURE_LOSSLESS"
+        },
+        "Ethernet48|4": {
+            "scheduler"   : "scheduler.1",
+            "wred_profile": "AZURE_LOSSLESS"
+        },
+        "Ethernet52|4": {
+            "scheduler"   : "scheduler.1",
+            "wred_profile": "AZURE_LOSSLESS"
+        },
+        "Ethernet56|4": {
+            "scheduler"   : "scheduler.1",
+            "wred_profile": "AZURE_LOSSLESS"
+        },
+        "Ethernet60|4": {
+            "scheduler"   : "scheduler.1",
+            "wred_profile": "AZURE_LOSSLESS"
+        },
+        "Ethernet64|4": {
+            "scheduler"   : "scheduler.1",
+            "wred_profile": "AZURE_LOSSLESS"
+        },
+        "Ethernet68|4": {
+            "scheduler"   : "scheduler.1",
+            "wred_profile": "AZURE_LOSSLESS"
+        },
+        "Ethernet72|4": {
+            "scheduler"   : "scheduler.1",
+            "wred_profile": "AZURE_LOSSLESS"
+        },
+        "Ethernet76|4": {
+            "scheduler"   : "scheduler.1",
+            "wred_profile": "AZURE_LOSSLESS"
+        },
+        "Ethernet80|4": {
+            "scheduler"   : "scheduler.1",
+            "wred_profile": "AZURE_LOSSLESS"
+        },
+        "Ethernet88|4": {
+            "scheduler"   : "scheduler.1",
+            "wred_profile": "AZURE_LOSSLESS"
+        },
+        "Ethernet96|4": {
+            "scheduler"   : "scheduler.1",
+            "wred_profile": "AZURE_LOSSLESS"
+        },
+        "Ethernet104|4": {
+            "scheduler"   : "scheduler.1",
+            "wred_profile": "AZURE_LOSSLESS"
+        },
+        "Ethernet112|4": {
+            "scheduler"   : "scheduler.1",
+            "wred_profile": "AZURE_LOSSLESS"
+        },
+        "Ethernet120|4": {
+            "scheduler"   : "scheduler.1",
+            "wred_profile": "AZURE_LOSSLESS"
+        },
+        "Ethernet132|4": {
+            "scheduler"   : "scheduler.1",
+            "wred_profile": "AZURE_LOSSLESS"
+        },
+        "Ethernet140|4": {
+            "scheduler"   : "scheduler.1",
+            "wred_profile": "AZURE_LOSSLESS"
+        },
+        "Ethernet148|4": {
+            "scheduler"   : "scheduler.1",
+            "wred_profile": "AZURE_LOSSLESS"
+        },
+        "Ethernet156|4": {
+            "scheduler"   : "scheduler.1",
+            "wred_profile": "AZURE_LOSSLESS"
+        },
+        "Ethernet164|4": {
+            "scheduler"   : "scheduler.1",
+            "wred_profile": "AZURE_LOSSLESS"
+        },
+        "Ethernet172|4": {
+            "scheduler"   : "scheduler.1",
+            "wred_profile": "AZURE_LOSSLESS"
+        },
+        "Ethernet212|4": {
+            "scheduler"   : "scheduler.1",
+            "wred_profile": "AZURE_LOSSLESS"
+        },
+        "Ethernet40|0": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet48|0": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet52|0": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet56|0": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet60|0": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet64|0": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet68|0": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet72|0": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet76|0": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet80|0": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet88|0": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet96|0": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet104|0": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet112|0": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet120|0": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet132|0": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet140|0": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet148|0": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet156|0": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet164|0": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet172|0": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet212|0": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet40|1": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet48|1": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet52|1": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet56|1": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet60|1": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet64|1": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet68|1": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet72|1": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet76|1": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet80|1": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet88|1": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet96|1": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet104|1": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet112|1": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet120|1": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet132|1": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet140|1": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet148|1": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet156|1": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet164|1": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet172|1": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet212|1": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet40|2": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet48|2": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet52|2": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet56|2": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet60|2": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet64|2": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet68|2": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet72|2": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet76|2": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet80|2": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet88|2": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet96|2": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet104|2": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet112|2": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet120|2": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet132|2": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet140|2": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet148|2": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet156|2": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet164|2": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet172|2": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet212|2": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet40|5": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet48|5": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet52|5": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet56|5": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet60|5": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet64|5": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet68|5": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet72|5": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet76|5": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet80|5": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet88|5": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet96|5": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet104|5": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet112|5": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet120|5": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet132|5": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet140|5": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet148|5": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet156|5": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet164|5": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet172|5": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet212|5": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet40|6": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet48|6": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet52|6": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet56|6": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet60|6": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet64|6": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet68|6": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet72|6": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet76|6": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet80|6": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet88|6": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet96|6": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet104|6": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet112|6": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet120|6": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet132|6": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet140|6": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet148|6": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet156|6": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet164|6": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet172|6": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet212|6": {
+            "scheduler": "scheduler.0"
+        }
+    }
+}
diff --git a/src/sonic-config-engine/tests/sample_output/py3/buffer-arista7260-t0.json b/src/sonic-config-engine/tests/sample_output/py3/buffer-arista7260-t0.json
new file mode 100644
index 000000000..cdb18cfa7
--- /dev/null
+++ b/src/sonic-config-engine/tests/sample_output/py3/buffer-arista7260-t0.json
@@ -0,0 +1,426 @@
+{
+    "CABLE_LENGTH": {
+        "AZURE": {
+            "Ethernet0": "5m",
+            "Ethernet2": "5m",
+            "Ethernet4": "5m",
+            "Ethernet6": "5m",
+            "Ethernet8": "5m",
+            "Ethernet10": "5m",
+            "Ethernet12": "5m",
+            "Ethernet14": "5m",
+            "Ethernet16": "5m",
+            "Ethernet18": "5m",
+            "Ethernet20": "5m",
+            "Ethernet22": "5m",
+            "Ethernet24": "5m",
+            "Ethernet26": "5m",
+            "Ethernet28": "5m",
+            "Ethernet30": "5m",
+            "Ethernet32": "5m",
+            "Ethernet34": "5m",
+            "Ethernet36": "5m",
+            "Ethernet38": "5m",
+            "Ethernet40": "5m",
+            "Ethernet42": "5m",
+            "Ethernet44": "5m",
+            "Ethernet46": "5m",
+            "Ethernet48": "40m",
+            "Ethernet52": "40m",
+            "Ethernet56": "40m",
+            "Ethernet60": "40m",
+            "Ethernet64": "40m",
+            "Ethernet68": "40m",
+            "Ethernet72": "40m",
+            "Ethernet76": "40m",
+            "Ethernet80": "5m",
+            "Ethernet82": "5m",
+            "Ethernet84": "5m",
+            "Ethernet86": "5m",
+            "Ethernet88": "5m",
+            "Ethernet90": "5m",
+            "Ethernet92": "5m",
+            "Ethernet94": "5m",
+            "Ethernet96": "5m",
+            "Ethernet98": "5m",
+            "Ethernet100": "5m",
+            "Ethernet102": "5m",
+            "Ethernet104": "5m",
+            "Ethernet106": "5m",
+            "Ethernet108": "5m",
+            "Ethernet110": "5m",
+            "Ethernet112": "5m",
+            "Ethernet114": "5m",
+            "Ethernet116": "5m",
+            "Ethernet118": "5m",
+            "Ethernet120": "5m",
+            "Ethernet122": "5m",
+            "Ethernet124": "5m",
+            "Ethernet126": "5m",
+            "Ethernet128": "5m",
+            "Ethernet130": "5m",
+            "Ethernet132": "5m",
+            "Ethernet134": "5m",
+            "Ethernet136": "5m",
+            "Ethernet138": "5m",
+            "Ethernet140": "5m",
+            "Ethernet142": "5m",
+            "Ethernet144": "5m",
+            "Ethernet146": "5m",
+            "Ethernet148": "5m",
+            "Ethernet150": "5m",
+            "Ethernet152": "5m",
+            "Ethernet154": "5m",
+            "Ethernet156": "5m",
+            "Ethernet158": "5m",
+            "Ethernet160": "5m",
+            "Ethernet162": "5m",
+            "Ethernet164": "5m",
+            "Ethernet166": "5m",
+            "Ethernet168": "5m",
+            "Ethernet170": "5m",
+            "Ethernet172": "5m",
+            "Ethernet174": "5m",
+            "Ethernet176": "5m",
+            "Ethernet180": "5m",
+            "Ethernet184": "5m",
+            "Ethernet188": "5m",
+            "Ethernet192": "5m",
+            "Ethernet196": "5m",
+            "Ethernet200": "5m",
+            "Ethernet204": "5m",
+            "Ethernet208": "5m",
+            "Ethernet210": "5m",
+            "Ethernet212": "5m",
+            "Ethernet214": "5m",
+            "Ethernet216": "5m",
+            "Ethernet218": "5m",
+            "Ethernet220": "5m",
+            "Ethernet222": "5m",
+            "Ethernet224": "5m",
+            "Ethernet226": "5m",
+            "Ethernet228": "5m",
+            "Ethernet230": "5m",
+            "Ethernet232": "5m",
+            "Ethernet234": "5m",
+            "Ethernet236": "5m",
+            "Ethernet238": "5m",
+            "Ethernet240": "5m",
+            "Ethernet242": "5m",
+            "Ethernet244": "5m",
+            "Ethernet246": "5m",
+            "Ethernet248": "5m",
+            "Ethernet250": "5m",
+            "Ethernet252": "5m",
+            "Ethernet254": "5m",
+            "Ethernet256": "5m",
+            "Ethernet260": "5m"
+        }
+    },
+
+    "BUFFER_POOL": {
+        "ingress_lossless_pool": {
+            "size": "33329088",
+            "type": "ingress",
+            "mode": "dynamic",
+            "xoff": "7827456"
+        },
+        "egress_lossy_pool": {
+            "size": "26663272",
+            "type": "egress",
+            "mode": "dynamic"
+        },
+        "egress_lossless_pool": {
+            "size": "42349632",
+            "type": "egress",
+            "mode": "static"
+        }
+    },
+    "BUFFER_PROFILE": {
+        "ingress_lossy_profile": {
+            "pool":"ingress_lossless_pool",
+            "size":"0",
+            "static_th":"44302336"
+        },
+        "egress_lossless_profile": {
+            "pool":"egress_lossless_pool",
+            "size":"0",
+            "static_th":"42349632"
+        },
+        "egress_lossy_profile": {
+            "pool":"egress_lossy_pool",
+            "size":"1664",
+            "dynamic_th":"-1"
+        }
+    },
+
+    "BUFFER_PG": {
+        "Ethernet48|0": {
+            "profile" : "ingress_lossy_profile"
+        },
+        "Ethernet52|0": {
+            "profile" : "ingress_lossy_profile"
+        },
+        "Ethernet56|0": {
+            "profile" : "ingress_lossy_profile"
+        },
+        "Ethernet60|0": {
+            "profile" : "ingress_lossy_profile"
+        },
+        "Ethernet64|0": {
+            "profile" : "ingress_lossy_profile"
+        },
+        "Ethernet68|0": {
+            "profile" : "ingress_lossy_profile"
+        },
+        "Ethernet72|0": {
+            "profile" : "ingress_lossy_profile"
+        },
+        "Ethernet76|0": {
+            "profile" : "ingress_lossy_profile"
+        },
+        "Ethernet40|0": {
+            "profile" : "ingress_lossy_profile"
+        },
+        "Ethernet80|0": {
+            "profile" : "ingress_lossy_profile"
+        },
+        "Ethernet88|0": {
+            "profile" : "ingress_lossy_profile"
+        },
+        "Ethernet96|0": {
+            "profile" : "ingress_lossy_profile"
+        },
+        "Ethernet104|0": {
+            "profile" : "ingress_lossy_profile"
+        },
+        "Ethernet112|0": {
+            "profile" : "ingress_lossy_profile"
+        },
+        "Ethernet120|0": {
+            "profile" : "ingress_lossy_profile"
+        },
+        "Ethernet132|0": {
+            "profile" : "ingress_lossy_profile"
+        },
+        "Ethernet140|0": {
+            "profile" : "ingress_lossy_profile"
+        },
+        "Ethernet148|0": {
+            "profile" : "ingress_lossy_profile"
+        },
+        "Ethernet156|0": {
+            "profile" : "ingress_lossy_profile"
+        },
+        "Ethernet164|0": {
+            "profile" : "ingress_lossy_profile"
+        },
+        "Ethernet172|0": {
+            "profile" : "ingress_lossy_profile"
+        },
+        "Ethernet212|0": {
+            "profile" : "ingress_lossy_profile"
+        }
+    },
+
+    "BUFFER_QUEUE": {
+        "Ethernet48|3-4": {
+            "profile" : "egress_lossless_profile"
+        },
+        "Ethernet52|3-4": {
+            "profile" : "egress_lossless_profile"
+        },
+        "Ethernet56|3-4": {
+            "profile" : "egress_lossless_profile"
+        },
+        "Ethernet60|3-4": {
+            "profile" : "egress_lossless_profile"
+        },
+        "Ethernet64|3-4": {
+            "profile" : "egress_lossless_profile"
+        },
+        "Ethernet68|3-4": {
+            "profile" : "egress_lossless_profile"
+        },
+        "Ethernet72|3-4": {
+            "profile" : "egress_lossless_profile"
+        },
+        "Ethernet76|3-4": {
+            "profile" : "egress_lossless_profile"
+        },
+        "Ethernet40|3-4": {
+            "profile" : "egress_lossless_profile"
+        },
+        "Ethernet80|3-4": {
+            "profile" : "egress_lossless_profile"
+        },
+        "Ethernet88|3-4": {
+            "profile" : "egress_lossless_profile"
+        },
+        "Ethernet96|3-4": {
+            "profile" : "egress_lossless_profile"
+        },
+        "Ethernet104|3-4": {
+            "profile" : "egress_lossless_profile"
+        },
+        "Ethernet112|3-4": {
+            "profile" : "egress_lossless_profile"
+        },
+        "Ethernet120|3-4": {
+            "profile" : "egress_lossless_profile"
+        },
+        "Ethernet132|3-4": {
+            "profile" : "egress_lossless_profile"
+        },
+        "Ethernet140|3-4": {
+            "profile" : "egress_lossless_profile"
+        },
+        "Ethernet148|3-4": {
+            "profile" : "egress_lossless_profile"
+        },
+        "Ethernet156|3-4": {
+            "profile" : "egress_lossless_profile"
+        },
+        "Ethernet164|3-4": {
+            "profile" : "egress_lossless_profile"
+        },
+        "Ethernet172|3-4": {
+            "profile" : "egress_lossless_profile"
+        },
+        "Ethernet212|3-4": {
+            "profile" : "egress_lossless_profile"
+        },
+        "Ethernet48|0-2": {
+            "profile" : "egress_lossy_profile"
+        },
+        "Ethernet52|0-2": {
+            "profile" : "egress_lossy_profile"
+        },
+        "Ethernet56|0-2": {
+            "profile" : "egress_lossy_profile"
+        },
+        "Ethernet60|0-2": {
+            "profile" : "egress_lossy_profile"
+        },
+        "Ethernet64|0-2": {
+            "profile" : "egress_lossy_profile"
+        },
+        "Ethernet68|0-2": {
+            "profile" : "egress_lossy_profile"
+        },
+        "Ethernet72|0-2": {
+            "profile" : "egress_lossy_profile"
+        },
+        "Ethernet76|0-2": {
+            "profile" : "egress_lossy_profile"
+        },
+        "Ethernet40|0-2": {
+            "profile" : "egress_lossy_profile"
+        },
+        "Ethernet80|0-2": {
+            "profile" : "egress_lossy_profile"
+        },
+        "Ethernet88|0-2": {
+            "profile" : "egress_lossy_profile"
+        },
+        "Ethernet96|0-2": {
+            "profile" : "egress_lossy_profile"
+        },
+        "Ethernet104|0-2": {
+            "profile" : "egress_lossy_profile"
+        },
+        "Ethernet112|0-2": {
+            "profile" : "egress_lossy_profile"
+        },
+        "Ethernet120|0-2": {
+            "profile" : "egress_lossy_profile"
+        },
+        "Ethernet132|0-2": {
+            "profile" : "egress_lossy_profile"
+        },
+        "Ethernet140|0-2": {
+            "profile" : "egress_lossy_profile"
+        },
+        "Ethernet148|0-2": {
+            "profile" : "egress_lossy_profile"
+        },
+        "Ethernet156|0-2": {
+            "profile" : "egress_lossy_profile"
+        },
+        "Ethernet164|0-2": {
+            "profile" : "egress_lossy_profile"
+        },
+        "Ethernet172|0-2": {
+            "profile" : "egress_lossy_profile"
+        },
+        "Ethernet212|0-2": {
+            "profile" : "egress_lossy_profile"
+        },
+        "Ethernet48|5-6": {
+            "profile" : "egress_lossy_profile"
+        },
+        "Ethernet52|5-6": {
+            "profile" : "egress_lossy_profile"
+        },
+        "Ethernet56|5-6": {
+            "profile" : "egress_lossy_profile"
+        },
+        "Ethernet60|5-6": {
+            "profile" : "egress_lossy_profile"
+        },
+        "Ethernet64|5-6": {
+            "profile" : "egress_lossy_profile"
+        },
+        "Ethernet68|5-6": {
+            "profile" : "egress_lossy_profile"
+        },
+        "Ethernet72|5-6": {
+            "profile" : "egress_lossy_profile"
+        },
+        "Ethernet76|5-6": {
+            "profile" : "egress_lossy_profile"
+        },
+        "Ethernet40|5-6": {
+            "profile" : "egress_lossy_profile"
+        },
+        "Ethernet80|5-6": {
+            "profile" : "egress_lossy_profile"
+        },
+        "Ethernet88|5-6": {
+            "profile" : "egress_lossy_profile"
+        },
+        "Ethernet96|5-6": {
+            "profile" : "egress_lossy_profile"
+        },
+        "Ethernet104|5-6": {
+            "profile" : "egress_lossy_profile"
+        },
+        "Ethernet112|5-6": {
+            "profile" : "egress_lossy_profile"
+        },
+        "Ethernet120|5-6": {
+            "profile" : "egress_lossy_profile"
+        },
+        "Ethernet132|5-6": {
+            "profile" : "egress_lossy_profile"
+        },
+        "Ethernet140|5-6": {
+            "profile" : "egress_lossy_profile"
+        },
+        "Ethernet148|5-6": {
+            "profile" : "egress_lossy_profile"
+        },
+        "Ethernet156|5-6": {
+            "profile" : "egress_lossy_profile"
+        },
+        "Ethernet164|5-6": {
+            "profile" : "egress_lossy_profile"
+        },
+        "Ethernet172|5-6": {
+            "profile" : "egress_lossy_profile"
+        },
+        "Ethernet212|5-6": {
+            "profile" : "egress_lossy_profile"
+        }
+    }
+}
diff --git a/src/sonic-config-engine/tests/sample_output/py3/qos-arista7260-t0.json b/src/sonic-config-engine/tests/sample_output/py3/qos-arista7260-t0.json
new file mode 100644
index 000000000..a65953672
--- /dev/null
+++ b/src/sonic-config-engine/tests/sample_output/py3/qos-arista7260-t0.json
@@ -0,0 +1,822 @@
+{
+    "TC_TO_PRIORITY_GROUP_MAP": {
+        "AZURE": {
+            "0": "0",
+            "1": "0",
+            "2": "0",
+            "3": "3",
+            "4": "4",
+            "5": "0",
+            "6": "0",
+            "7": "7"
+        }
+    },
+    "MAP_PFC_PRIORITY_TO_QUEUE": {
+        "AZURE": {
+            "0": "0",
+            "1": "1",
+            "2": "2",
+            "3": "3",
+            "4": "4",
+            "5": "5",
+            "6": "6",
+            "7": "7"
+        }
+    },
+    "TC_TO_QUEUE_MAP": {
+        "AZURE": {
+            "0": "0",
+            "1": "1",
+            "2": "2",
+            "3": "3",
+            "4": "4",
+            "5": "5",
+            "6": "6",
+            "7": "7"
+        }
+    },
+    "DSCP_TO_TC_MAP": {
+        "AZURE": {
+            "0" : "1",
+            "1" : "1",
+            "2" : "1",
+            "3" : "3",
+            "4" : "4",
+            "5" : "2",
+            "6" : "1",
+            "7" : "1",
+            "8" : "0",
+            "9" : "1",
+            "10": "1",
+            "11": "1",
+            "12": "1",
+            "13": "1",
+            "14": "1",
+            "15": "1",
+            "16": "1",
+            "17": "1",
+            "18": "1",
+            "19": "1",
+            "20": "1",
+            "21": "1",
+            "22": "1",
+            "23": "1",
+            "24": "1",
+            "25": "1",
+            "26": "1",
+            "27": "1",
+            "28": "1",
+            "29": "1",
+            "30": "1",
+            "31": "1",
+            "32": "1",
+            "33": "1",
+            "34": "1",
+            "35": "1",
+            "36": "1",
+            "37": "1",
+            "38": "1",
+            "39": "1",
+            "40": "1",
+            "41": "1",
+            "42": "1",
+            "43": "1",
+            "44": "1",
+            "45": "1",
+            "46": "5",
+            "47": "1",
+            "48": "6",
+            "49": "1",
+            "50": "1",
+            "51": "1",
+            "52": "1",
+            "53": "1",
+            "54": "1",
+            "55": "1",
+            "56": "1",
+            "57": "1",
+            "58": "1",
+            "59": "1",
+            "60": "1",
+            "61": "1",
+            "62": "1",
+            "63": "1"
+        }
+    },
+    "SCHEDULER": {
+        "scheduler.0": {
+            "type"  : "DWRR",
+            "weight": "14"
+        },
+        "scheduler.1": {
+            "type"  : "DWRR",
+            "weight": "15"
+        }
+    },
+    "PORT_QOS_MAP": {
+        "global": {
+            "dscp_to_tc_map"  : "AZURE"
+        },
+        "Ethernet40": {
+            "dscp_to_tc_map"  : "AZURE",
+            "tc_to_queue_map" : "AZURE",
+            "tc_to_pg_map"    : "AZURE",
+            "pfc_to_queue_map": "AZURE",
+            "pfc_enable"      : "3,4",
+            "pfcwd_sw_enable" : "3,4"
+        },
+        "Ethernet48": {
+            "dscp_to_tc_map"  : "AZURE",
+            "tc_to_queue_map" : "AZURE",
+            "tc_to_pg_map"    : "AZURE",
+            "pfc_to_queue_map": "AZURE",
+            "pfc_enable"      : "3,4",
+            "pfcwd_sw_enable" : "3,4"
+        },
+        "Ethernet52": {
+            "dscp_to_tc_map"  : "AZURE",
+            "tc_to_queue_map" : "AZURE",
+            "tc_to_pg_map"    : "AZURE",
+            "pfc_to_queue_map": "AZURE",
+            "pfc_enable"      : "3,4",
+            "pfcwd_sw_enable" : "3,4"
+        },
+        "Ethernet56": {
+            "dscp_to_tc_map"  : "AZURE",
+            "tc_to_queue_map" : "AZURE",
+            "tc_to_pg_map"    : "AZURE",
+            "pfc_to_queue_map": "AZURE",
+            "pfc_enable"      : "3,4",
+            "pfcwd_sw_enable" : "3,4"
+        },
+        "Ethernet60": {
+            "dscp_to_tc_map"  : "AZURE",
+            "tc_to_queue_map" : "AZURE",
+            "tc_to_pg_map"    : "AZURE",
+            "pfc_to_queue_map": "AZURE",
+            "pfc_enable"      : "3,4",
+            "pfcwd_sw_enable" : "3,4"
+        },
+        "Ethernet64": {
+            "dscp_to_tc_map"  : "AZURE",
+            "tc_to_queue_map" : "AZURE",
+            "tc_to_pg_map"    : "AZURE",
+            "pfc_to_queue_map": "AZURE",
+            "pfc_enable"      : "3,4",
+            "pfcwd_sw_enable" : "3,4"
+        },
+        "Ethernet68": {
+            "dscp_to_tc_map"  : "AZURE",
+            "tc_to_queue_map" : "AZURE",
+            "tc_to_pg_map"    : "AZURE",
+            "pfc_to_queue_map": "AZURE",
+            "pfc_enable"      : "3,4",
+            "pfcwd_sw_enable" : "3,4"
+        },
+        "Ethernet72": {
+            "dscp_to_tc_map"  : "AZURE",
+            "tc_to_queue_map" : "AZURE",
+            "tc_to_pg_map"    : "AZURE",
+            "pfc_to_queue_map": "AZURE",
+            "pfc_enable"      : "3,4",
+            "pfcwd_sw_enable" : "3,4"
+        },
+        "Ethernet76": {
+            "dscp_to_tc_map"  : "AZURE",
+            "tc_to_queue_map" : "AZURE",
+            "tc_to_pg_map"    : "AZURE",
+            "pfc_to_queue_map": "AZURE",
+            "pfc_enable"      : "3,4",
+            "pfcwd_sw_enable" : "3,4"
+        },
+        "Ethernet80": {
+            "dscp_to_tc_map"  : "AZURE",
+            "tc_to_queue_map" : "AZURE",
+            "tc_to_pg_map"    : "AZURE",
+            "pfc_to_queue_map": "AZURE",
+            "pfc_enable"      : "3,4",
+            "pfcwd_sw_enable" : "3,4"
+        },
+        "Ethernet88": {
+            "dscp_to_tc_map"  : "AZURE",
+            "tc_to_queue_map" : "AZURE",
+            "tc_to_pg_map"    : "AZURE",
+            "pfc_to_queue_map": "AZURE",
+            "pfc_enable"      : "3,4",
+            "pfcwd_sw_enable" : "3,4"
+        },
+        "Ethernet96": {
+            "dscp_to_tc_map"  : "AZURE",
+            "tc_to_queue_map" : "AZURE",
+            "tc_to_pg_map"    : "AZURE",
+            "pfc_to_queue_map": "AZURE",
+            "pfc_enable"      : "3,4",
+            "pfcwd_sw_enable" : "3,4"
+        },
+        "Ethernet104": {
+            "dscp_to_tc_map"  : "AZURE",
+            "tc_to_queue_map" : "AZURE",
+            "tc_to_pg_map"    : "AZURE",
+            "pfc_to_queue_map": "AZURE",
+            "pfc_enable"      : "3,4",
+            "pfcwd_sw_enable" : "3,4"
+        },
+        "Ethernet112": {
+            "dscp_to_tc_map"  : "AZURE",
+            "tc_to_queue_map" : "AZURE",
+            "tc_to_pg_map"    : "AZURE",
+            "pfc_to_queue_map": "AZURE",
+            "pfc_enable"      : "3,4",
+            "pfcwd_sw_enable" : "3,4"
+        },
+        "Ethernet120": {
+            "dscp_to_tc_map"  : "AZURE",
+            "tc_to_queue_map" : "AZURE",
+            "tc_to_pg_map"    : "AZURE",
+            "pfc_to_queue_map": "AZURE",
+            "pfc_enable"      : "3,4",
+            "pfcwd_sw_enable" : "3,4"
+        },
+        "Ethernet132": {
+            "dscp_to_tc_map"  : "AZURE",
+            "tc_to_queue_map" : "AZURE",
+            "tc_to_pg_map"    : "AZURE",
+            "pfc_to_queue_map": "AZURE",
+            "pfc_enable"      : "3,4",
+            "pfcwd_sw_enable" : "3,4"
+        },
+        "Ethernet140": {
+            "dscp_to_tc_map"  : "AZURE",
+            "tc_to_queue_map" : "AZURE",
+            "tc_to_pg_map"    : "AZURE",
+            "pfc_to_queue_map": "AZURE",
+            "pfc_enable"      : "3,4",
+            "pfcwd_sw_enable" : "3,4"
+        },
+        "Ethernet148": {
+            "dscp_to_tc_map"  : "AZURE",
+            "tc_to_queue_map" : "AZURE",
+            "tc_to_pg_map"    : "AZURE",
+            "pfc_to_queue_map": "AZURE",
+            "pfc_enable"      : "3,4",
+            "pfcwd_sw_enable" : "3,4"
+        },
+        "Ethernet156": {
+            "dscp_to_tc_map"  : "AZURE",
+            "tc_to_queue_map" : "AZURE",
+            "tc_to_pg_map"    : "AZURE",
+            "pfc_to_queue_map": "AZURE",
+            "pfc_enable"      : "3,4",
+            "pfcwd_sw_enable" : "3,4"
+        },
+        "Ethernet164": {
+            "dscp_to_tc_map"  : "AZURE",
+            "tc_to_queue_map" : "AZURE",
+            "tc_to_pg_map"    : "AZURE",
+            "pfc_to_queue_map": "AZURE",
+            "pfc_enable"      : "3,4",
+            "pfcwd_sw_enable" : "3,4"
+        },
+        "Ethernet172": {
+            "dscp_to_tc_map"  : "AZURE",
+            "tc_to_queue_map" : "AZURE",
+            "tc_to_pg_map"    : "AZURE",
+            "pfc_to_queue_map": "AZURE",
+            "pfc_enable"      : "3,4",
+            "pfcwd_sw_enable" : "3,4"
+        },
+        "Ethernet212": {
+            "dscp_to_tc_map"  : "AZURE",
+            "tc_to_queue_map" : "AZURE",
+            "tc_to_pg_map"    : "AZURE",
+            "pfc_to_queue_map": "AZURE",
+            "pfc_enable"      : "3,4",
+            "pfcwd_sw_enable" : "3,4"
+        }
+    },
+    "WRED_PROFILE": {
+        "AZURE_LOSSLESS" : {
+            "wred_green_enable"      : "true",
+            "wred_yellow_enable"     : "true",
+            "wred_red_enable"        : "true",
+            "ecn"                    : "ecn_all",
+            "green_max_threshold"    : "10000000",
+            "green_min_threshold"    : "2000000",
+            "yellow_max_threshold"   : "2097152",
+            "yellow_min_threshold"   : "1048576",
+            "red_max_threshold"      : "2097152",
+            "red_min_threshold"      : "1048576",
+            "green_drop_probability" : "5",
+            "yellow_drop_probability": "5",
+            "red_drop_probability"   : "5"
+        }
+    },
+    "QUEUE": {
+        "Ethernet40|3": {
+            "scheduler"   : "scheduler.1",
+            "wred_profile": "AZURE_LOSSLESS"
+        },
+        "Ethernet48|3": {
+            "scheduler"   : "scheduler.1",
+            "wred_profile": "AZURE_LOSSLESS"
+        },
+        "Ethernet52|3": {
+            "scheduler"   : "scheduler.1",
+            "wred_profile": "AZURE_LOSSLESS"
+        },
+        "Ethernet56|3": {
+            "scheduler"   : "scheduler.1",
+            "wred_profile": "AZURE_LOSSLESS"
+        },
+        "Ethernet60|3": {
+            "scheduler"   : "scheduler.1",
+            "wred_profile": "AZURE_LOSSLESS"
+        },
+        "Ethernet64|3": {
+            "scheduler"   : "scheduler.1",
+            "wred_profile": "AZURE_LOSSLESS"
+        },
+        "Ethernet68|3": {
+            "scheduler"   : "scheduler.1",
+            "wred_profile": "AZURE_LOSSLESS"
+        },
+        "Ethernet72|3": {
+            "scheduler"   : "scheduler.1",
+            "wred_profile": "AZURE_LOSSLESS"
+        },
+        "Ethernet76|3": {
+            "scheduler"   : "scheduler.1",
+            "wred_profile": "AZURE_LOSSLESS"
+        },
+        "Ethernet80|3": {
+            "scheduler"   : "scheduler.1",
+            "wred_profile": "AZURE_LOSSLESS"
+        },
+        "Ethernet88|3": {
+            "scheduler"   : "scheduler.1",
+            "wred_profile": "AZURE_LOSSLESS"
+        },
+        "Ethernet96|3": {
+            "scheduler"   : "scheduler.1",
+            "wred_profile": "AZURE_LOSSLESS"
+        },
+        "Ethernet104|3": {
+            "scheduler"   : "scheduler.1",
+            "wred_profile": "AZURE_LOSSLESS"
+        },
+        "Ethernet112|3": {
+            "scheduler"   : "scheduler.1",
+            "wred_profile": "AZURE_LOSSLESS"
+        },
+        "Ethernet120|3": {
+            "scheduler"   : "scheduler.1",
+            "wred_profile": "AZURE_LOSSLESS"
+        },
+        "Ethernet132|3": {
+            "scheduler"   : "scheduler.1",
+            "wred_profile": "AZURE_LOSSLESS"
+        },
+        "Ethernet140|3": {
+            "scheduler"   : "scheduler.1",
+            "wred_profile": "AZURE_LOSSLESS"
+        },
+        "Ethernet148|3": {
+            "scheduler"   : "scheduler.1",
+            "wred_profile": "AZURE_LOSSLESS"
+        },
+        "Ethernet156|3": {
+            "scheduler"   : "scheduler.1",
+            "wred_profile": "AZURE_LOSSLESS"
+        },
+        "Ethernet164|3": {
+            "scheduler"   : "scheduler.1",
+            "wred_profile": "AZURE_LOSSLESS"
+        },
+        "Ethernet172|3": {
+            "scheduler"   : "scheduler.1",
+            "wred_profile": "AZURE_LOSSLESS"
+        },
+        "Ethernet212|3": {
+            "scheduler"   : "scheduler.1",
+            "wred_profile": "AZURE_LOSSLESS"
+        },
+        "Ethernet40|4": {
+            "scheduler"   : "scheduler.1",
+            "wred_profile": "AZURE_LOSSLESS"
+        },
+        "Ethernet48|4": {
+            "scheduler"   : "scheduler.1",
+            "wred_profile": "AZURE_LOSSLESS"
+        },
+        "Ethernet52|4": {
+            "scheduler"   : "scheduler.1",
+            "wred_profile": "AZURE_LOSSLESS"
+        },
+        "Ethernet56|4": {
+            "scheduler"   : "scheduler.1",
+            "wred_profile": "AZURE_LOSSLESS"
+        },
+        "Ethernet60|4": {
+            "scheduler"   : "scheduler.1",
+            "wred_profile": "AZURE_LOSSLESS"
+        },
+        "Ethernet64|4": {
+            "scheduler"   : "scheduler.1",
+            "wred_profile": "AZURE_LOSSLESS"
+        },
+        "Ethernet68|4": {
+            "scheduler"   : "scheduler.1",
+            "wred_profile": "AZURE_LOSSLESS"
+        },
+        "Ethernet72|4": {
+            "scheduler"   : "scheduler.1",
+            "wred_profile": "AZURE_LOSSLESS"
+        },
+        "Ethernet76|4": {
+            "scheduler"   : "scheduler.1",
+            "wred_profile": "AZURE_LOSSLESS"
+        },
+        "Ethernet80|4": {
+            "scheduler"   : "scheduler.1",
+            "wred_profile": "AZURE_LOSSLESS"
+        },
+        "Ethernet88|4": {
+            "scheduler"   : "scheduler.1",
+            "wred_profile": "AZURE_LOSSLESS"
+        },
+        "Ethernet96|4": {
+            "scheduler"   : "scheduler.1",
+            "wred_profile": "AZURE_LOSSLESS"
+        },
+        "Ethernet104|4": {
+            "scheduler"   : "scheduler.1",
+            "wred_profile": "AZURE_LOSSLESS"
+        },
+        "Ethernet112|4": {
+            "scheduler"   : "scheduler.1",
+            "wred_profile": "AZURE_LOSSLESS"
+        },
+        "Ethernet120|4": {
+            "scheduler"   : "scheduler.1",
+            "wred_profile": "AZURE_LOSSLESS"
+        },
+        "Ethernet132|4": {
+            "scheduler"   : "scheduler.1",
+            "wred_profile": "AZURE_LOSSLESS"
+        },
+        "Ethernet140|4": {
+            "scheduler"   : "scheduler.1",
+            "wred_profile": "AZURE_LOSSLESS"
+        },
+        "Ethernet148|4": {
+            "scheduler"   : "scheduler.1",
+            "wred_profile": "AZURE_LOSSLESS"
+        },
+        "Ethernet156|4": {
+            "scheduler"   : "scheduler.1",
+            "wred_profile": "AZURE_LOSSLESS"
+        },
+        "Ethernet164|4": {
+            "scheduler"   : "scheduler.1",
+            "wred_profile": "AZURE_LOSSLESS"
+        },
+        "Ethernet172|4": {
+            "scheduler"   : "scheduler.1",
+            "wred_profile": "AZURE_LOSSLESS"
+        },
+        "Ethernet212|4": {
+            "scheduler"   : "scheduler.1",
+            "wred_profile": "AZURE_LOSSLESS"
+        },
+        "Ethernet40|0": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet48|0": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet52|0": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet56|0": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet60|0": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet64|0": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet68|0": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet72|0": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet76|0": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet80|0": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet88|0": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet96|0": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet104|0": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet112|0": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet120|0": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet132|0": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet140|0": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet148|0": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet156|0": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet164|0": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet172|0": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet212|0": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet40|1": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet48|1": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet52|1": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet56|1": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet60|1": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet64|1": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet68|1": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet72|1": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet76|1": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet80|1": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet88|1": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet96|1": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet104|1": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet112|1": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet120|1": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet132|1": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet140|1": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet148|1": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet156|1": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet164|1": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet172|1": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet212|1": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet40|2": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet48|2": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet52|2": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet56|2": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet60|2": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet64|2": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet68|2": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet72|2": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet76|2": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet80|2": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet88|2": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet96|2": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet104|2": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet112|2": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet120|2": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet132|2": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet140|2": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet148|2": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet156|2": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet164|2": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet172|2": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet212|2": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet40|5": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet48|5": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet52|5": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet56|5": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet60|5": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet64|5": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet68|5": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet72|5": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet76|5": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet80|5": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet88|5": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet96|5": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet104|5": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet112|5": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet120|5": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet132|5": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet140|5": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet148|5": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet156|5": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet164|5": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet172|5": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet212|5": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet40|6": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet48|6": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet52|6": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet56|6": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet60|6": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet64|6": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet68|6": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet72|6": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet76|6": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet80|6": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet88|6": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet96|6": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet104|6": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet112|6": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet120|6": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet132|6": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet140|6": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet148|6": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet156|6": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet164|6": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet172|6": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet212|6": {
+            "scheduler": "scheduler.0"
+        }
+    }
+}
diff --git a/src/sonic-config-engine/tests/test_j2files.py b/src/sonic-config-engine/tests/test_j2files.py
index 5e0a052f2..49b4a1d00 100644
--- a/src/sonic-config-engine/tests/test_j2files.py
+++ b/src/sonic-config-engine/tests/test_j2files.py
@@ -384,6 +384,9 @@ def test_qos_dell6100_render_template(self):
     def test_qos_arista7260_render_template(self):
         self._test_qos_render_template('arista', 'x86_64-arista_7260cx3_64', 'Arista-7260CX3-D96C16', 'sample-arista-7260-t1-minigraph-remap-disabled.xml', 'qos-arista7260.json')
 
+    def test_qos_arista7260t0_render_template(self):
+        self._test_qos_render_template('arista', 'x86_64-arista_7260cx3_64', 'Arista-7260CX3-D92C16', 'sample-arista-7260-t0-minigraph.xml', 'qos-arista7260-t0.json')
+
     def _test_qos_render_template(self, vendor, platform, sku, minigraph, expected, copy_files=False):
         file_exist, dir_exist = self.create_machine_conf(platform, vendor)
         dir_path = os.path.join(self.test_dir, '..', '..', '..', 'device', vendor, platform, sku)
@@ -572,6 +575,9 @@ def test_buffers_dell6100_render_template(self):
     def test_buffers_mellanox2410_render_template(self):
         self._test_buffers_render_template('mellanox', 'x86_64-mlnx_msn2410-r0', 'ACS-MSN2410', 'sample-mellanox-2410-t1-minigraph.xml', 'buffers.json.j2', 'buffers-mellanox2410.json')
 
+    def test_buffers_arista7260_render_template(self):
+        self._test_buffers_render_template('arista', 'x86_64-arista_7260cx3_64', 'Arista-7260CX3-D92C16', 'sample-arista-7260-t0-minigraph.xml', 'buffers.json.j2', 'buffer-arista7260-t0.json')
+
     def test_buffers_mellanox2410_dynamic_render_template(self):
         self._test_buffers_render_template('mellanox', 'x86_64-mlnx_msn2410-r0', 'ACS-MSN2410', 'sample-mellanox-2410-t1-minigraph.xml', 'buffers_dynamic.json.j2', 'buffers-mellanox2410-dynamic.json')
 

From 406d0e41c83136fa5a7bf349e9c93b15669df8c5 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Fri, 19 Apr 2024 16:01:18 +0800
Subject: [PATCH 0463/1115] [submodule] Update submodule sonic-mgmt-framework
 to the latest HEAD automatically (#18694)

#### Why I did it
src/sonic-mgmt-framework
```
* 1cd7947 - (HEAD -> master, origin/master, origin/HEAD) Use pkg-config for Python linking and use OpenSSL (#133) (2 days ago) [Christian Svensson]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-mgmt-framework | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-mgmt-framework b/src/sonic-mgmt-framework
index 796eb5915..1cd794798 160000
--- a/src/sonic-mgmt-framework
+++ b/src/sonic-mgmt-framework
@@ -1 +1 @@
-Subproject commit 796eb591554b243da51933bb516b32da155e12f0
+Subproject commit 1cd79479882174c14f06c73fa0613fb093a6f421

From e3d9fbe6b2613ecb920a2a56945328b7b4f16116 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Fri, 19 Apr 2024 19:01:20 +0800
Subject: [PATCH 0464/1115] [submodule] Update submodule sonic-swss to the
 latest HEAD automatically (#18334)

#### Why I did it
src/sonic-swss
```
* 9e183a65 - (HEAD -> master, origin/master, origin/HEAD) Add bookworm build to the PR checkers (#3114) (2 days ago) [Saikrishna Arcot]
* ec463953 - [twamporch] Explicitly initialize local variable (#3115) (2 days ago) [xiaodong hu]
* 19410232 - Add force option for fabric port unisolate command (#3089) (7 days ago) [jfeng-arista]
* 774973d9 - [dash] fix ENI admin state update (#3081) (8 days ago) [Yakiv Huryk]
* 56ba6de3 - [p4orch] Clang format change. (#3096) (10 days ago) [mint570]
* f6dd9caa - Introduce a new role for DPU-NPU Interconnect (10 days ago) [Vivek]
* 0f707757 - [portsorch] Handle TRANSCEIVER_INFO table on warm boot (#3087) (10 days ago) [Stepan Blyshchak]
* cbc263a1 - [EVPN]Fix fpmsyncd crash when EVPN type5 is received with bgp fib suppression enabled (#3101) (13 days ago) [Sudharsan Dhamal Gopalarathnam]
* 4af61167 - Fix oper FEC retrieval after warmboot (#3100) (13 days ago) [Sudharsan Dhamal Gopalarathnam]
* 2a586154 - [Fdbsyncd] Adding extern_learn flag with fdb entry so Kernel doesn't age out (#2985) (2 weeks ago) [KISHORE KUNAL]
* 465399e9 - T2-VOQ-VS: Fix iBGP bringup issue (#3053) (2 weeks ago) [Deepak Singhal]
* dc9eae87 - Clang format change. (#3080) (2 weeks ago) [mint570]
* 95a74750 - [orchagent] TWAMP Light orchagent implementation (#2927) (2 weeks ago) [xiaodong hu]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-swss | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-swss b/src/sonic-swss
index c96a2f84b..9e183a650 160000
--- a/src/sonic-swss
+++ b/src/sonic-swss
@@ -1 +1 @@
-Subproject commit c96a2f84b506665dca18765932cc4c0de9d0e507
+Subproject commit 9e183a650cf38e0d5af46adc1342dcde85ecb84d

From 5587a01662b94d138d5caeb6babb55c13873a979 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Fri, 19 Apr 2024 22:01:32 +0800
Subject: [PATCH 0465/1115] [submodule] Update submodule sonic-utilities to the
 latest HEAD automatically (#18708)

#### Why I did it
src/sonic-utilities
```
* ad464a9f - (HEAD -> master, origin/master, origin/HEAD) [Mellanox] Support new platform SN5400 in generic configuration update (#3272) (19 hours ago) [DavidZagury]
* 29d4e88f - Add multi ASIC support for syslog rate limit feature (#3235) (21 hours ago) [Junchao-Mellanox]
* f81317c3 - [Mellanox] added component versions to techsupport (#3264) (2 days ago) [sophiek]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-utilities | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-utilities b/src/sonic-utilities
index 9f962299f..ad464a9f0 160000
--- a/src/sonic-utilities
+++ b/src/sonic-utilities
@@ -1 +1 @@
-Subproject commit 9f962299ff9cc3319c77db24cae065e650c774e2
+Subproject commit ad464a9f0e7003fe12adafad28b61c0df0bf29fc

From f9a08a075bdd10929b83e3864dfe85d9aa2f8551 Mon Sep 17 00:00:00 2001
From: Wenda Chu <32250288+w1nda@users.noreply.github.com>
Date: Fri, 19 Apr 2024 10:10:28 -0700
Subject: [PATCH 0466/1115] fix dhcp_server config cli didnt delete customized
 options when empty (#18726)

---
 .../cli-plugin-tests/conftest.py               | 18 ++++++++++++++++++
 .../test_config_dhcp_server.py                 |  2 +-
 .../cli/config/plugins/dhcp_server.py          |  9 +++++++--
 3 files changed, 26 insertions(+), 3 deletions(-)

diff --git a/dockers/docker-dhcp-server/cli-plugin-tests/conftest.py b/dockers/docker-dhcp-server/cli-plugin-tests/conftest.py
index ece7d576d..98a7a6411 100644
--- a/dockers/docker-dhcp-server/cli-plugin-tests/conftest.py
+++ b/dockers/docker-dhcp-server/cli-plugin-tests/conftest.py
@@ -12,6 +12,8 @@
 @pytest.fixture()
 def mock_db():
     db = mock.Mock()
+    redis_client_config_db = mock.Mock()
+    redis_client_state_db = mock.Mock()
 
     with open(os.path.join(TEST_DATA_PATH, "mock_config_db.json")) as f:
         s = f.read()
@@ -55,6 +57,12 @@ def hmset(table, key, value):
         if table == "STATE_DB":
             mock_state_db[key] = value
 
+    def config_db_hdel(key, field):
+        del mock_config_db[key][field]
+
+    def state_db_hdel(key, field):
+        del mock_state_db[key][field]
+
     def exists(table, key):
         assert table == "CONFIG_DB" or table == "STATE_DB"
         if table == "CONFIG_DB":
@@ -76,6 +84,13 @@ def set_(table, key, k, v):
         if table == "STATE_DB":
             mock_state_db[key][k] = v
 
+    def get_redis_client(table):
+        assert table == "CONFIG_DB" or table == "STATE_DB"
+        if table == "CONFIG_DB":
+            return redis_client_config_db
+        if table == "STATE_DB":
+            return redis_client_state_db
+
     db.keys = mock.Mock(side_effect=keys)
     db.get_all = mock.Mock(side_effect=get_all)
     db.get = mock.Mock(side_effect=get)
@@ -83,5 +98,8 @@ def set_(table, key, k, v):
     db.exists = mock.Mock(side_effect=exists)
     db.delete = mock.Mock(side_effect=delete)
     db.set = mock.Mock(side_effect=set_)
+    db.get_redis_client = mock.Mock(side_effect=get_redis_client)
+    redis_client_config_db.hdel = mock.Mock(side_effect=config_db_hdel)
+    redis_client_state_db.hdel = mock.Mock(side_effect=state_db_hdel)
 
     yield db
diff --git a/dockers/docker-dhcp-server/cli-plugin-tests/test_config_dhcp_server.py b/dockers/docker-dhcp-server/cli-plugin-tests/test_config_dhcp_server.py
index 232b435a0..236d67e56 100644
--- a/dockers/docker-dhcp-server/cli-plugin-tests/test_config_dhcp_server.py
+++ b/dockers/docker-dhcp-server/cli-plugin-tests/test_config_dhcp_server.py
@@ -755,7 +755,7 @@ def test_config_dhcp_server_ipv4_option_unbind(self, mock_db):
                 ["Vlan100", "option60"], obj=db)
         assert result.exit_code == 0, "exit code: {}, Exception: {}, Traceback: {}".format(result.exit_code, result.exception, result.exc_info)
         result = mock_db.get("CONFIG_DB", "DHCP_SERVER_IPV4|Vlan100", "customized_options@")
-        assert result == None or result == ""
+        assert result == None
 
     def test_config_dhcp_server_ipv4_option_unbind_nonexisting_intf(self, mock_db):
         runner = CliRunner()
diff --git a/dockers/docker-dhcp-server/cli/config/plugins/dhcp_server.py b/dockers/docker-dhcp-server/cli/config/plugins/dhcp_server.py
index 7cf149fa0..bceaf51c9 100644
--- a/dockers/docker-dhcp-server/cli/config/plugins/dhcp_server.py
+++ b/dockers/docker-dhcp-server/cli/config/plugins/dhcp_server.py
@@ -427,14 +427,19 @@ def dhcp_server_ipv4_option_unbind(db, dhcp_interface, option_list, all_):
     if not dbconn.exists("CONFIG_DB", key):
         ctx.fail("Interface {} is not valid dhcp interface".format(dhcp_interface))
     if all_:
-        dbconn.set("CONFIG_DB", key, "customized_options@", "")
+        redis_client = dbconn.get_redis_client("CONFIG_DB")
+        redis_client.hdel(key, "customized_options@")
     else:
         unbind_value = set(option_list.split(","))
         existing_value = dbconn.get("CONFIG_DB", key, "customized_options@")
         value_set = set(existing_value.split(",")) if existing_value else set()
         if value_set.issuperset(unbind_value):
             new_value_set = value_set.difference(unbind_value)
-            dbconn.set("CONFIG_DB", key, "customized_options@", ",".join(new_value_set))
+            if new_value_set:
+                dbconn.set("CONFIG_DB", key, "customized_options@", ",".join(new_value_set))
+            else:
+                redis_client = dbconn.get_redis_client("CONFIG_DB")
+                redis_client.hdel(key, "customized_options@")
         else:
             ctx.fail("Attempting to unbind option that is not binded")
 

From f60ef62c7a6d65282e8421747c73de5a66b97749 Mon Sep 17 00:00:00 2001
From: Deepak Singhal <115033986+deepak-singhal0408@users.noreply.github.com>
Date: Fri, 19 Apr 2024 12:05:59 -0700
Subject: [PATCH 0467/1115] T2-VOQ-Chassis: VS support (#18512)

Changes to ensure sonic_vs.img has everything required for it to be emulated as T2-VOQ-Chassis: Supervisor/Linecard..
With this change,
The image could be used to emulate Supervisor or Linecard
the image could be used to emulate different Linecard HWSKus.
---
 files/build_templates/docker_image_ctl.j2     | 39 ++++----
 files/image_config/topology/topology.service  |  3 +-
 files/image_config/topology/topology.sh       | 93 ++++++++++++++++++-
 platform/vs/kvm-image.mk                      |  1 +
 platform/vs/one-image.mk                      |  1 +
 platform/vs/platform-modules-vs.mk            | 11 +++
 platform/vs/rules.mk                          |  1 +
 .../debian/changelog                          | 10 ++
 .../sonic-platform-modules-vs/debian/compat   |  1 +
 .../sonic-platform-modules-vs/debian/control  | 10 ++
 .../vs/sonic-platform-modules-vs/debian/rules | 58 ++++++++++++
 .../vs/sonic-platform-modules-vs/setup.py     | 15 +++
 .../sonic_platform/__init__.py                |  2 +
 .../sonic_platform/chassis.py                 | 57 ++++++++++++
 .../sonic_platform/platform.py                | 40 ++++++++
 src/sonic-config-engine/minigraph.py          | 13 +++
 src/sonic-config-engine/sonic-cfggen          | 15 ++-
 src/sonic-device-data/Makefile                | 83 ++++++++++++++++-
 .../src/fabriclanemap_vs.ini                  | 16 ++++
 .../sonic_py_common/device_info.py            | 45 +++++++--
 20 files changed, 476 insertions(+), 38 deletions(-)
 create mode 100644 platform/vs/platform-modules-vs.mk
 create mode 100755 platform/vs/sonic-platform-modules-vs/debian/changelog
 create mode 100644 platform/vs/sonic-platform-modules-vs/debian/compat
 create mode 100755 platform/vs/sonic-platform-modules-vs/debian/control
 create mode 100755 platform/vs/sonic-platform-modules-vs/debian/rules
 create mode 100755 platform/vs/sonic-platform-modules-vs/setup.py
 create mode 100644 platform/vs/sonic-platform-modules-vs/sonic_platform/__init__.py
 create mode 100644 platform/vs/sonic-platform-modules-vs/sonic_platform/chassis.py
 create mode 100644 platform/vs/sonic-platform-modules-vs/sonic_platform/platform.py
 create mode 100644 src/sonic-device-data/src/fabriclanemap_vs.ini

diff --git a/files/build_templates/docker_image_ctl.j2 b/files/build_templates/docker_image_ctl.j2
index 694fdd1f8..21676ca59 100644
--- a/files/build_templates/docker_image_ctl.j2
+++ b/files/build_templates/docker_image_ctl.j2
@@ -416,28 +416,33 @@ start() {
 
     DOCKERCHECK=`docker inspect --type container ${DOCKERNAME} 2>/dev/null`
     if [ "$?" -eq "0" ]; then
-        {%- if docker_container_name == "database" %}
-        DOCKERMOUNT=""
+        {%- if docker_container_name == "database" and sonic_asic_platform == "vs" %}
+        echo "Removing existing ${DOCKERNAME} container"
+        docker rm -f ${DOCKERNAME}
         {%- else %}
-        DOCKERMOUNT=`getMountPoint "$DOCKERCHECK"`
-        {%- endif %}
-        if [ x"$DOCKERMOUNT" == x"$MOUNTPATH" ]; then
-            CONTAINER_EXISTS="yes"
-            preStartAction
             {%- if docker_container_name == "database" %}
-            echo "Starting existing ${DOCKERNAME} container"
-            docker start ${DOCKERNAME}
+            DOCKERMOUNT=""
             {%- else %}
-            echo "Starting existing ${DOCKERNAME} container with HWSKU $HWSKU"
-            /usr/local/bin/container start ${DOCKERNAME}
+            DOCKERMOUNT=`getMountPoint "$DOCKERCHECK"`
             {%- endif %}
-            postStartAction
-            exit $?
-        fi
+            if [ x"$DOCKERMOUNT" == x"$MOUNTPATH" ]; then
+                CONTAINER_EXISTS="yes"
+                preStartAction
+                {%- if docker_container_name == "database" %}
+                echo "Starting existing ${DOCKERNAME} container"
+                docker start ${DOCKERNAME}
+                {%- else %}
+                echo "Starting existing ${DOCKERNAME} container with HWSKU $HWSKU"
+                /usr/local/bin/container start ${DOCKERNAME}
+                {%- endif %}
+                postStartAction
+                exit $?
+            fi
 
-        # docker created with a different HWSKU, remove and recreate
-        echo "Removing obsolete ${DOCKERNAME} container with HWSKU $DOCKERMOUNT"
-        docker rm -f ${DOCKERNAME}
+            # docker created with a different HWSKU, remove and recreate
+            echo "Removing obsolete ${DOCKERNAME} container with HWSKU $DOCKERMOUNT"
+            docker rm -f ${DOCKERNAME}
+        {%- endif %}
     fi
 
     {%- if docker_container_name == "database" %}
diff --git a/files/image_config/topology/topology.service b/files/image_config/topology/topology.service
index eea4bf652..73fa4d2d0 100644
--- a/files/image_config/topology/topology.service
+++ b/files/image_config/topology/topology.service
@@ -12,5 +12,4 @@ ExecStart=/usr/bin/topology.sh start
 ExecStop=/usr/bin/topology.sh stop
 
 [Install]
-WantedBy=multi-user.target
-
+WantedBy=sonic.target
diff --git a/files/image_config/topology/topology.sh b/files/image_config/topology/topology.sh
index 2f038095b..995cb8804 100755
--- a/files/image_config/topology/topology.sh
+++ b/files/image_config/topology/topology.sh
@@ -22,12 +22,99 @@ get_hwsku() {
     echo "${HWSKU}"
 }
 
+bind_ports_to_ns() {
+    PLATFORM="$1"
+    HWSKU="$2"
+    BIND="$3"
+
+    # Check if the directory exists
+    if [[ ! -d "/usr/share/sonic/device/$PLATFORM/$HWSKU" ]]; then
+        echo "Directory /usr/share/sonic/device/$PLATFORM/$HWSKU does not exist"
+        exit 1
+    fi
+
+    # Read NUM_ASIC from asic.conf file
+    asic_conf="/usr/share/sonic/device/$PLATFORM/asic.conf"
+    if [[ ! -f "$asic_conf" ]]; then
+        echo "Error: $asic_conf file not found"
+        exit 1
+    fi
+
+    # Read NUM_ASIC from asic.conf file
+    num_asic=$(awk -F "=" '/^NUM_ASIC=/ {print $2}' "$asic_conf")
+    if [[ -z $num_asic ]]; then
+        echo "NUM_ASIC not found in $asic_conf"
+        exit 1
+    fi
+
+    for ((asic_num = 0; asic_num < num_asic; asic_num++)); do
+        echo "Processing $PLATFORM/$HWSKU/$asic_num"
+        asic_dir="/usr/share/sonic/device/$PLATFORM/$HWSKU/$asic_num"
+
+        # Check if the directory exists for the ASIC number
+        if [[ ! -d "$asic_dir" ]]; then
+            echo "Directory $asic_dir does not exist"
+            exit 1
+        fi
+
+        lanemap_ini="$asic_dir/lanemap.ini"
+
+        if [[ ! -f "$lanemap_ini" ]]; then
+            echo "lanemap.ini not found in $asic_dir"
+            exit 1
+        fi
+
+        # Loop through each line of lanemap.ini
+        while IFS= read -r line; do
+            # Extract interface before ":"
+            intf=$(echo "$line" | cut -d ":" -f 1)
+            if [[ $BIND == true ]]; then
+                echo "Moving interface $intf to asic$asic_num"
+                if [[ $intf == "Cpu0" ]]; then
+                    # Extract the numeric part of the interface name
+                    num="${prev#eth}"
+                    # Increment the numeric part
+                    ((num++))
+                    # Construct the new interface name
+                    cur="eth$num"
+                    echo "Renaming $cur to $intf"
+                    ip link sev dev $cur down
+                    ip link set dev $cur name $intf
+                fi
+                ip link set dev $intf netns asic$asic_num
+                sudo ip netns exec asic$asic_num ip link set dev $intf mtu 9100
+                sudo ip netns exec asic$asic_num ip link set $intf up
+            else
+                echo "Moving interface $intf back to default ns"
+                sudo ip netns exec asic$asic_num ip link set dev $intf netns 1
+                if [[ $intf == "Cpu0" ]]; then
+                    # Extract the numeric part of the interface name
+                    num="${prev#eth}"
+                    # Increment the numeric part
+                    ((num++))
+                    # Construct the new interface name
+                    cur="eth$num"
+                    echo "Renaming $intf to $cur"
+                    ip link set dev $intf down
+                    ip link set dev $intf name $cur
+                    ip link set dev $cur up
+                fi
+            fi
+            prev=$intf
+            done < "$lanemap_ini"
+    done
+    exit 0  # Exit script with success
+}
+
+
 start() {
     TOPOLOGY_SCRIPT="topology.sh"
     PLATFORM=`sonic-cfggen -H -v DEVICE_METADATA.localhost.platform`
     HWSKU=`get_hwsku`
-    if [[ $HWSKU != "" ]]; then
+    if [[ $HWSKU == "msft_"* ]]; then
         /usr/share/sonic/device/$PLATFORM/$HWSKU/$TOPOLOGY_SCRIPT start
+    elif [[ $HWSKU != "" ]]; then
+        bind_ports_to_ns "$PLATFORM" "$HWSKU" true
     else
         echo "Failed to get HWSKU"
         exit 1
@@ -38,8 +125,10 @@ stop() {
     TOPOLOGY_SCRIPT="topology.sh"
     PLATFORM=`sonic-cfggen -H -v DEVICE_METADATA.localhost.platform`
     HWSKU=`get_hwsku`
-    if [[ $HWSKU != "" ]]; then
+    if [[ $HWSKU == "msft_"* ]]; then
         /usr/share/sonic/device/$PLATFORM/$HWSKU/$TOPOLOGY_SCRIPT stop
+    elif [[ $HWSKU != "" ]]; then
+        bind_ports_to_ns "$PLATFORM" "$HWSKU" false
     else
         echo "Failed to get HWSKU"
         exit 1
diff --git a/platform/vs/kvm-image.mk b/platform/vs/kvm-image.mk
index 911b7e9a8..08d013a66 100644
--- a/platform/vs/kvm-image.mk
+++ b/platform/vs/kvm-image.mk
@@ -2,6 +2,7 @@
 
 SONIC_KVM_IMAGE = sonic-vs.img.gz
 $(SONIC_KVM_IMAGE)_INSTALLS += $(SYSTEMD_SONIC_GENERATOR)
+$(SONIC_KVM_IMAGE)_LAZY_INSTALLS += $(VS_PLATFORM_MODULE)
 $(SONIC_KVM_IMAGE)_MACHINE = vs
 $(SONIC_KVM_IMAGE)_IMAGE_TYPE = kvm
 ifeq ($(INSTALL_DEBUG_TOOLS),y)
diff --git a/platform/vs/one-image.mk b/platform/vs/one-image.mk
index a0e176df1..0f344a101 100644
--- a/platform/vs/one-image.mk
+++ b/platform/vs/one-image.mk
@@ -4,6 +4,7 @@ SONIC_ONE_IMAGE = sonic-vs.bin
 $(SONIC_ONE_IMAGE)_MACHINE = vs
 $(SONIC_ONE_IMAGE)_IMAGE_TYPE = onie
 $(SONIC_ONE_IMAGE)_INSTALLS += $(SYSTEMD_SONIC_GENERATOR)
+$(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(VS_PLATFORM_MODULE)
 ifeq ($(INSTALL_DEBUG_TOOLS),y)
 $(SONIC_ONE_IMAGE)_DOCKERS += $(SONIC_INSTALL_DOCKER_DBG_IMAGES)
 $(SONIC_ONE_IMAGE)_DOCKERS += $(filter-out $(patsubst %-$(DBG_IMAGE_MARK).gz,%.gz, $(SONIC_INSTALL_DOCKER_DBG_IMAGES)), $(SONIC_INSTALL_DOCKER_IMAGES))
diff --git a/platform/vs/platform-modules-vs.mk b/platform/vs/platform-modules-vs.mk
new file mode 100644
index 000000000..20a5edb94
--- /dev/null
+++ b/platform/vs/platform-modules-vs.mk
@@ -0,0 +1,11 @@
+# VS Platform modules
+
+VS_PLATFORM_MODULE_VERSION = 1.0
+
+export VS_PLATFORM_MODULE_VERSION
+
+VS_PLATFORM_MODULE = sonic-platform-vs_$(VS_PLATFORM_MODULE_VERSION)_amd64.deb
+$(VS_PLATFORM_MODULE)_SRC_PATH = $(PLATFORM_PATH)/sonic-platform-modules-vs
+$(VS_PLATFORM_MODULE)_DEPENDS =
+$(VS_PLATFORM_MODULE)_PLATFORM = x86_64-kvm_x86_64-r0
+SONIC_DPKG_DEBS += $(VS_PLATFORM_MODULE)
diff --git a/platform/vs/rules.mk b/platform/vs/rules.mk
index 461c3f84d..6f67778ea 100644
--- a/platform/vs/rules.mk
+++ b/platform/vs/rules.mk
@@ -6,6 +6,7 @@ include $(PLATFORM_PATH)/docker-gbsyncd-vs.mk
 include $(PLATFORM_PATH)/docker-ptf.mk
 include $(PLATFORM_PATH)/docker-ptf-sai.mk
 include $(PLATFORM_PATH)/libsaithrift-dev.mk
+include $(PLATFORM_PATH)/platform-modules-vs.mk
 include $(PLATFORM_PATH)/one-image.mk
 include $(PLATFORM_PATH)/onie.mk
 include $(PLATFORM_PATH)/kvm-image.mk
diff --git a/platform/vs/sonic-platform-modules-vs/debian/changelog b/platform/vs/sonic-platform-modules-vs/debian/changelog
new file mode 100755
index 000000000..600264d51
--- /dev/null
+++ b/platform/vs/sonic-platform-modules-vs/debian/changelog
@@ -0,0 +1,10 @@
+sonic-platform-vs (1.0) UNRELEASED; urgency=low
+
+  * Initial release of the sonic-platform-vs package.
+  * This package provides platform-specific modules for SONiC on virtualized VS platforms.
+  * Included modules:
+    - Chassis module
+  * This package is part of the initial release of SONiC for VS platforms.
+
+ -- Deepak Singhal <deepsinghal@microsoft.com>  Fri, 26 Feb 2024 12:00:00 +0000
+
diff --git a/platform/vs/sonic-platform-modules-vs/debian/compat b/platform/vs/sonic-platform-modules-vs/debian/compat
new file mode 100644
index 000000000..f599e28b8
--- /dev/null
+++ b/platform/vs/sonic-platform-modules-vs/debian/compat
@@ -0,0 +1 @@
+10
diff --git a/platform/vs/sonic-platform-modules-vs/debian/control b/platform/vs/sonic-platform-modules-vs/debian/control
new file mode 100755
index 000000000..6f416e0d8
--- /dev/null
+++ b/platform/vs/sonic-platform-modules-vs/debian/control
@@ -0,0 +1,10 @@
+Source: sonic-platform-vs
+Section: main
+Priority: extra
+Maintainer: Deepak Singhal <deepsinghal@microsoft.com>
+Build-Depends: debhelper (>= 9), bzip2
+Standards-Version: 3.9.3
+
+Package: sonic-platform-vs
+Architecture: amd64
+Description: Sonic VS platform Module
diff --git a/platform/vs/sonic-platform-modules-vs/debian/rules b/platform/vs/sonic-platform-modules-vs/debian/rules
new file mode 100755
index 000000000..ab27fce12
--- /dev/null
+++ b/platform/vs/sonic-platform-modules-vs/debian/rules
@@ -0,0 +1,58 @@
+#!/usr/bin/make -f
+# -*- makefile -*-
+# Sample debian/rules that uses debhelper.
+# As a special exception, when this file is copied by dh-make into a
+# dh-make output file, you may use that output file without restriction.
+
+include /usr/share/dpkg/pkg-info.mk
+
+# Uncomment this to turn on verbose mode.
+export DH_VERBOSE=1
+
+PYTHON        ?= python3
+PACKAGE_PRE_NAME := sonic-platform-vs
+SRC_DIR:= $(shell pwd)
+
+%:
+	dh $@ --with python3 --buildsystem=pybuild
+
+clean:
+	dh_testdir
+	dh_testroot
+	dh_clean
+
+build:
+	# Nothing to do
+
+
+binary: binary-arch binary-indep
+	# Nothing to do
+
+binary-arch:
+	# Nothing to do
+
+binary-indep:
+# temporary commented out
+#	dh_testdir
+	dh_installdirs
+
+	# Custom package commands
+	$(PYTHON) setup.py install --root=$(SRC_DIR)/debian/$(PACKAGE_PRE_NAME) --install-layout=deb;
+
+	# Resuming debhelper scripts
+	dh_testroot
+	dh_install
+	dh_installchangelogs
+	dh_installdocs
+	dh_systemd_enable
+	dh_installinit
+	dh_systemd_start
+	dh_link
+	dh_fixperms
+	dh_compress
+	dh_strip
+	dh_installdeb
+	dh_gencontrol
+	dh_md5sums
+	dh_builddeb
+.PHONY: build binary binary-arch binary-indep clean
diff --git a/platform/vs/sonic-platform-modules-vs/setup.py b/platform/vs/sonic-platform-modules-vs/setup.py
new file mode 100755
index 000000000..803081689
--- /dev/null
+++ b/platform/vs/sonic-platform-modules-vs/setup.py
@@ -0,0 +1,15 @@
+#!/usr/bin/env python
+
+import os
+import sys
+from setuptools import setup
+os.listdir
+
+setup(
+    name='sonic_platform',
+    version='1.0',
+    description='Module to initialize VS platforms',
+
+    packages=['sonic_platform'],
+    package_dir={'sonic_platform': 'sonic_platform'}
+)
diff --git a/platform/vs/sonic-platform-modules-vs/sonic_platform/__init__.py b/platform/vs/sonic-platform-modules-vs/sonic_platform/__init__.py
new file mode 100644
index 000000000..290d8cd1a
--- /dev/null
+++ b/platform/vs/sonic-platform-modules-vs/sonic_platform/__init__.py
@@ -0,0 +1,2 @@
+__all__ = ["platform"]
+from sonic_platform import *
diff --git a/platform/vs/sonic-platform-modules-vs/sonic_platform/chassis.py b/platform/vs/sonic-platform-modules-vs/sonic_platform/chassis.py
new file mode 100644
index 000000000..1e9bd1f2c
--- /dev/null
+++ b/platform/vs/sonic-platform-modules-vs/sonic_platform/chassis.py
@@ -0,0 +1,57 @@
+# Description: Module contains the definitions of SONiC platform APIs
+# which provide the chassis specific details
+#
+# Copyright (c) 2019, Nokia
+# All rights reserved.
+#
+
+try:
+    from sonic_platform_base.chassis_base import ChassisBase
+    from sonic_platform_base.module_base import ModuleBase
+    import os
+    import json
+    import threading
+
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+
+class Chassis(ChassisBase):
+    """
+    VS Platform-specific Chassis class
+    """
+    def __init__(self):
+        ChassisBase.__init__(self)
+        self.metadata_file = '/etc/sonic/vs_chassis_metadata.json'
+        self.metadata = self._read_metadata()
+
+    def _read_metadata(self):
+        metadata = {}
+        if os.path.exists(self.metadata_file):
+            with open(self.metadata_file, 'r') as f:
+                metadata = json.load(f)
+        else:
+            raise FileNotFoundError("Metadata file {} not found".format(self.metadata_file))
+        return metadata
+
+    def get_supervisor_slot(self):
+        if 'sup_slot_num' not in self.metadata:
+            raise KeyError("sup_slot_num not found in Metadata file {}".format(self.metadata_file))
+        return self.metadata['sup_slot_num']
+
+    def get_linecard_slot(self):
+        if 'lc_slot_num' not in self.metadata:
+            raise KeyError("lc_slot_num not found in Metadata file {}".format(self.metadata_file))
+        return self.metadata['lc_slot_num']
+
+    def get_my_slot(self):
+        if 'is_supervisor' not in self.metadata or 'is_linecard' not in self.metadata:
+            raise KeyError("is_supervisor or is_linecard not found in metadata file {}".format(self.metadata_file))
+
+        if self.metadata['is_supervisor']:
+            return self.get_supervisor_slot()
+        elif self.metadata['is_linecard']:
+            return self.get_linecard_slot()
+        else:
+            raise ValueError("Invalid configuration: Neither supervisor nor line card")
+
diff --git a/platform/vs/sonic-platform-modules-vs/sonic_platform/platform.py b/platform/vs/sonic-platform-modules-vs/sonic_platform/platform.py
new file mode 100644
index 000000000..0e6a571aa
--- /dev/null
+++ b/platform/vs/sonic-platform-modules-vs/sonic_platform/platform.py
@@ -0,0 +1,40 @@
+# Name: platform.py, version: 1.0
+#
+# Description: Module contains the definitions of SONiC platform APIs
+# which provide the platform specific details
+#
+# Copyright (c) 2019, Nokia
+# All rights reserved.
+#
+
+try:
+    from sonic_platform_base.platform_base import PlatformBase
+except ImportError as e:
+    raise ImportError("%s - required module not found" % e)
+
+platformDict = {'platform': 'vs'}
+
+
+class Platform(PlatformBase):
+    def __init__(self):
+        self.platform = self.getPlatform()
+        try:
+            from sonic_platform.chassis import Chassis
+        except ImportError as e:
+            raise ImportError("%s - required module not found" % e)
+        self.chassis = Chassis()
+
+    def getPlatformDict(self):
+        global platformDict
+        if platformDict:
+            return platformDict
+
+    def readPlatformName(self):
+        return self.getPlatformDict().get('platform')
+
+    def getPlatform(self):
+        platformCls = self.readPlatformName()
+        return platformCls
+
+    def get_chassis(self):
+        return self.chassis
diff --git a/src/sonic-config-engine/minigraph.py b/src/sonic-config-engine/minigraph.py
index cbfa4caba..dab011bc5 100644
--- a/src/sonic-config-engine/minigraph.py
+++ b/src/sonic-config-engine/minigraph.py
@@ -2315,6 +2315,19 @@ def parse_device_desc_xml(filename):
 
     return results
 
+def parse_hostname(filename):
+    hostName = None
+    if not os.path.isfile(filename):
+        return None
+    root = ET.parse(filename).getroot()
+    hostname_qn = QName(ns, "Hostname")
+    for child in root:
+        if child.tag == str(hostname_qn):
+            hostName = child.text
+            break
+
+    return hostName
+
 def parse_asic_sub_role(filename, asic_name):
     if not os.path.isfile(filename):
         return None
diff --git a/src/sonic-config-engine/sonic-cfggen b/src/sonic-config-engine/sonic-cfggen
index 215ca3ba5..87a1dbb17 100755
--- a/src/sonic-config-engine/sonic-cfggen
+++ b/src/sonic-config-engine/sonic-cfggen
@@ -31,7 +31,7 @@ import base64
 from collections import OrderedDict
 from config_samples import generate_sample_config, get_available_config
 from functools import partial
-from minigraph import minigraph_encoder, parse_xml, parse_device_desc_xml, parse_asic_sub_role, parse_asic_switch_type
+from minigraph import minigraph_encoder, parse_xml, parse_device_desc_xml, parse_asic_sub_role, parse_asic_switch_type, parse_hostname
 from portconfig import get_port_config, get_breakout_mode
 from smartswitch_config import get_smartswitch_config
 from sonic_py_common.multi_asic import get_asic_id_from_name, get_asic_device_id, is_multi_asic
@@ -431,18 +431,23 @@ def main():
     if args.platform_info:
         asic_role = None
         switch_type = None
+        hostname = None
+
+        if args.minigraph is not None:
+            hostname = parse_hostname(args.minigraph)
+
         if asic_name is not None:
             if args.minigraph is not None:
                 asic_role = parse_asic_sub_role(args.minigraph, asic_name)
                 switch_type = parse_asic_switch_type(args.minigraph, asic_name)
-
             if ((switch_type is not None and switch_type.lower() == "chassis-packet") or
-                (asic_role is not None and asic_role.lower() == "backend")):
-                mac = device_info.get_system_mac(namespace=asic_name)
+                (asic_role is not None and asic_role.lower() == "backend") or
+                (platform == device_info.VS_PLATFORM)) :
+                mac = device_info.get_system_mac(namespace=asic_name, hostname=hostname)
             else:
                 mac = device_info.get_system_mac()
         else:
-            mac = device_info.get_system_mac()
+            mac = device_info.get_system_mac(hostname=hostname)
 
         hardware_data = {'DEVICE_METADATA': {'localhost': {
             'platform': platform,
diff --git a/src/sonic-device-data/Makefile b/src/sonic-device-data/Makefile
index 7993564ea..5473650e7 100644
--- a/src/sonic-device-data/Makefile
+++ b/src/sonic-device-data/Makefile
@@ -15,14 +15,89 @@ $(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% :
 	cp -r -L ../../../device/*/* ./device/
 
 	# Create hwsku for virtual switch
-	for d in `find -L ../../../device -maxdepth 3 -mindepth 3 -type d | grep -vE "(plugins|led-code)"`; do \
+	for d in `find -L ../../../device -maxdepth 3 -mindepth 3 -type d | grep -vE "(plugins|led-code|sonic_platform)"`; do \
+		# check if hwsku dir exists, if yes, then continue
+		if [ -d device/x86_64-kvm_x86_64-r0/$$(basename $$d) ]; then \
+			continue; \
+		fi; \
 		cp -Lr $$d device/x86_64-kvm_x86_64-r0/ ; \
+		if [ -f $$(dirname $$d)/asic.conf ]; then \
+			cp $$(dirname $$d)/asic.conf device/x86_64-kvm_x86_64-r0/$$(basename $$d)/asic.conf; \
+		fi; \
 		cp ./sai.vs_profile device/x86_64-kvm_x86_64-r0/$$(basename $$d)/sai.profile; \
 		cp ./sai_mlnx.vs_profile device/x86_64-kvm_x86_64-r0/$$(basename $$d)/sai_mlnx.profile; \
-		grep -v ^# device/x86_64-kvm_x86_64-r0/$$(basename $$d)/port_config.ini | awk '{i=i+1;print "eth"i":"$$2}' > device/x86_64-kvm_x86_64-r0/$$(basename $$d)/lanemap.ini
 		cp ./pai.vs_profile device/x86_64-kvm_x86_64-r0/$$(basename $$d)/pai.profile; \
-		grep -v ^# device/x86_64-kvm_x86_64-r0/$$(basename $$d)/port_config.ini | awk '{i=i+1;print "eth"i":"$$2}' > device/x86_64-kvm_x86_64-r0/$$(basename $$d)/lanemap.ini
-
+		cp ./fabriclanemap_vs.ini device/x86_64-kvm_x86_64-r0/$$(basename $$d)/fabriclanemap.ini; \
+		if [ -f device/x86_64-kvm_x86_64-r0/$$(basename $$d)/port_config.ini ]; then \
+			last_line=$$(tail -n 1 device/x86_64-kvm_x86_64-r0/$$(basename $$d)/port_config.ini); \
+			num_columns=$$(echo $$last_line | awk '{print NF}'); \
+			i=0; \
+			if [ -f $$(dirname $$d)/chassisdb.conf ]; then \
+				i=$$(($$i+1)); \
+			fi; \
+			while IFS= read -r line; do \
+				if ! grep -q "^#" <<< "$$line"; then \
+					i=$$(($$i+1)); \
+					lanes=$$(echo "$$line" | awk '{print $$2}'); \
+					echo "eth$$i:$$lanes" >> device/x86_64-kvm_x86_64-r0/$$(basename $$d)/lanemap.ini; \
+					if [ $$num_columns -ge 9 ]; then \
+						core=$$(echo "$$line" | awk '{print $$8}'); \
+						core_port=$$(echo "$$line" | awk '{print $$9}'); \
+						echo "eth$$i:$$core,$$core_port" >> device/x86_64-kvm_x86_64-r0/$$(basename $$d)/coreportindexmap.ini; \
+					fi; \
+				fi; \
+			done < device/x86_64-kvm_x86_64-r0/$$(basename $$d)/port_config.ini; \
+		fi; \
+		if [ -f device/x86_64-kvm_x86_64-r0/$$(basename $$d)/context_config.json ]; then \
+			rm device/x86_64-kvm_x86_64-r0/$$(basename $$d)/context_config.json; \
+		fi; \
+		i=0; \
+		if [ -f $$(dirname $$d)/chassisdb.conf ]; then \
+			# Append Cpu0 Port in lanemap.ini
+			if [ -f device/x86_64-kvm_x86_64-r0/$$(basename $$d)/lanemap.ini ]; then \
+				echo "Cpu0:999" >> device/x86_64-kvm_x86_64-r0/$$(basename $$d)/lanemap.ini; \
+			fi; \
+			if [ -f device/x86_64-kvm_x86_64-r0/$$(basename $$d)/coreportindexmap.ini ]; then \
+				echo "Cpu0:0,0" >> device/x86_64-kvm_x86_64-r0/$$(basename $$d)/coreportindexmap.ini; \
+			fi; \
+			i=$$(($$i+1)); \
+		fi; \
+		subdirs="0 1 2"; \
+		for subdir_idx in $$subdirs; do \
+			subdir="device/x86_64-kvm_x86_64-r0/$$(basename $$d)/$$subdir_idx"; \
+			if [ -d "$$subdir" ]; then \
+				cp ./sai.vs_profile device/x86_64-kvm_x86_64-r0/$$(basename $$d)/$$(basename $$subdir)/sai.profile; \
+				cp ./fabriclanemap_vs.ini device/x86_64-kvm_x86_64-r0/$$(basename $$d)/$$(basename $$subdir)/fabriclanemap.ini; \
+				if [ -f device/x86_64-kvm_x86_64-r0/$$(basename $$d)/$$(basename $$subdir)/context_config.json ]; then \
+					rm device/x86_64-kvm_x86_64-r0/$$(basename $$d)/$$(basename $$subdir)/context_config.json; \
+				fi; \
+				if [ -f device/x86_64-kvm_x86_64-r0/$$(basename $$d)/$$(basename $$subdir)/port_config.ini ]; then \
+					last_line=$$(tail -n 1 device/x86_64-kvm_x86_64-r0/$$(basename $$d)/$$(basename $$subdir)/port_config.ini); \
+					num_columns=$$(echo $$last_line | awk '{print NF}'); \
+					while IFS= read -r line; do \
+						if ! grep -q "^#" <<< "$$line"; then \
+							i=$$(($$i+1)); \
+							lanes=$$(echo "$$line" | awk '{print $$2}'); \
+							echo "eth$$i:$$lanes" >> device/x86_64-kvm_x86_64-r0/$$(basename $$d)/$$(basename $$subdir)/lanemap.ini; \
+							if [ $$num_columns -ge 9 ]; then \
+								core=$$(echo "$$line" | awk '{print $$8}'); \
+								core_port=$$(echo "$$line" | awk '{print $$9}'); \
+								echo "eth$$i:$$core,$$core_port" >> device/x86_64-kvm_x86_64-r0/$$(basename $$d)/$$(basename $$subdir)/coreportindexmap.ini; \
+							fi; \
+						fi; \
+					done < device/x86_64-kvm_x86_64-r0/$$(basename $$d)/$$(basename $$subdir)/port_config.ini; \
+				fi; \
+				if [ -f $$(dirname $$d)/chassisdb.conf ]; then \
+					if [ -f device/x86_64-kvm_x86_64-r0/$$(basename $$d)/$$(basename $$subdir)/lanemap.ini ]; then \
+						echo "Cpu0:999" >> device/x86_64-kvm_x86_64-r0/$$(basename $$d)/$$(basename $$subdir)/lanemap.ini; \
+						i=$$(($$i+1)); \
+					fi; \
+					if [ -f device/x86_64-kvm_x86_64-r0/$$(basename $$d)/$$(basename $$subdir)/coreportindexmap.ini ]; then \
+						echo "Cpu0:0,0" >> device/x86_64-kvm_x86_64-r0/$$(basename $$d)/$$(basename $$subdir)/coreportindexmap.ini; \
+					fi; \
+				fi; \
+			fi; \
+		done; \
 	done;
 
 	# Build the package
diff --git a/src/sonic-device-data/src/fabriclanemap_vs.ini b/src/sonic-device-data/src/fabriclanemap_vs.ini
new file mode 100644
index 000000000..20ea8fe3a
--- /dev/null
+++ b/src/sonic-device-data/src/fabriclanemap_vs.ini
@@ -0,0 +1,16 @@
+fabric1:1
+fabric2:2
+fabric3:3
+fabric4:4
+fabric5:5
+fabric6:6
+fabric7:7
+fabric8:8
+fabric9:9
+fabric10:10
+fabric11:11
+fabric12:12
+fabric13:13
+fabric14:14
+fabric15:15
+fabric16:16
diff --git a/src/sonic-py-common/sonic_py_common/device_info.py b/src/sonic-py-common/sonic_py_common/device_info.py
index 733625d4a..15d5aec65 100644
--- a/src/sonic-py-common/sonic_py_common/device_info.py
+++ b/src/sonic-py-common/sonic_py_common/device_info.py
@@ -1,14 +1,16 @@
 import glob
+import hashlib
 import json
 import os
+import random
 import re
 import subprocess
-
 import yaml
 from natsort import natsorted
 from sonic_py_common.general import getstatusoutput_noshell_pipe
 from swsscommon.swsscommon import ConfigDBConnector, SonicV2Connector
 
+
 USR_SHARE_SONIC_PATH = "/usr/share/sonic"
 HOST_DEVICE_PATH = USR_SHARE_SONIC_PATH + "/device"
 CONTAINER_PLATFORM_PATH = USR_SHARE_SONIC_PATH + "/platform"
@@ -37,6 +39,7 @@
 PLATFORM_ENV_CONF_FILENAME = "platform_env.conf"
 FRONTEND_ASIC_SUB_ROLE = "FrontEnd"
 BACKEND_ASIC_SUB_ROLE = "BackEnd"
+VS_PLATFORM = "x86_64-kvm_x86_64-r0"
 
 # Chassis STATE_DB keys
 CHASSIS_INFO_TABLE = 'CHASSIS_INFO|chassis {}'
@@ -687,16 +690,45 @@ def run_command_pipe(cmd0, cmd1, cmd2):
         err = out
     return (out, err)
 
+def _modify_mac_for_asic(mac, namespace=None):
+    if namespace is None:
+        return mac
+    if namespace in get_namespaces():
+        asic_id = namespace[-1]
+        mac = mac[:-1] + asic_id
+    return mac
+
+def generate_mac_for_vs(hostname, namespace):
+    mac = None
+    if hostname is None:
+        # return random mac address randomize each byte of mac address b/w 0-255
+        mac = "22:%02x:%02x:%02x:%02x:%02x" % (random.randint(0, 255), random.randint(0, 255), random.randint(0, 255), random.randint(0, 255), random.randint(0, 255))
+    else:
+        # Calculate the SHA-256 hash of the UTF-8 encoded hostname
+        hash_value = hashlib.sha256(hostname.encode('utf-8')).digest()
+
+        # Extract the last 6 bytes (48 bits) from the hash value
+        mac_bytes = hash_value[-6:]
+        # Set the first octet to 02 to indicate a locally administered MAC address
+        mac_bytes = bytearray([0x22, mac_bytes[1], mac_bytes[2], mac_bytes[3], mac_bytes[4], mac_bytes[5]])
+        # Format the MAC address with colons
+        mac = ':'.join('{:02x}'.format(byte) for byte in mac_bytes)
 
-def get_system_mac(namespace=None):
+    return _modify_mac_for_asic(mac, namespace)
+
+def get_system_mac(namespace=None, hostname=None):
     hw_mac_entry_outputs = []
     syseeprom_cmd = ["sudo", "decode-syseeprom", "-m"]
     iplink_cmd0 = ["ip", 'link', 'show', 'eth0']
     iplink_cmd1 = ['grep', 'ether']
     iplink_cmd2 = ['awk', '{print $2}']
     version_info = get_sonic_version_info()
+    platform = get_platform()
+
+    if platform == VS_PLATFORM:
+        return generate_mac_for_vs(hostname, namespace)
 
-    if (version_info['asic_type'] == 'mellanox'):
+    elif (version_info['asic_type'] == 'mellanox'):
         # With Mellanox ONIE release(2019.05-5.2.0012) and above
         # "onie_base_mac" was added to /host/machine.conf:
         # onie_base_mac=e4:1d:2d:44:5e:80
@@ -714,7 +746,6 @@ def get_system_mac(namespace=None):
         hw_mac_entry_outputs.append((mac, err))
     elif (version_info['asic_type'] == 'marvell'):
         # Try valid mac in eeprom, else fetch it from eth0
-        platform = get_platform()
         machine_key = "onie_machine"
         machine_vars = get_machine_info()
         (mac, err) = run_command(syseeprom_cmd)
@@ -736,7 +767,6 @@ def get_system_mac(namespace=None):
         hw_mac_entry_outputs.append((mac, err))
     elif (version_info['asic_type'] == 'cisco-8000'):
         # Try to get valid MAC from profile.ini first, else fetch it from syseeprom or eth0
-        platform = get_platform()
         if namespace is not None:
             profile_cmd0 = ['cat', HOST_DEVICE_PATH + '/' + platform + '/profile.ini']
             profile_cmd1 = ['grep', str(namespace)+'switchMacAddress']
@@ -865,14 +895,14 @@ def get_num_dpus():
 
     if os.path.isfile(os.path.join(platform_path, PLATFORM_JSON_FILE)):
         json_file = os.path.join(platform_path, PLATFORM_JSON_FILE)
-        
+
         try:
             with open(json_file, 'r') as file:
                 platform_data = json.load(file)
         except (json.JSONDecodeError, IOError, TypeError, ValueError):
             # Handle any file reading and JSON parsing errors
             return 0
-        
+
         # Convert to lower case avoid case sensitive.
         data = {k.lower(): v for k, v in platform_data.items()}
         DPUs = data.get('dpus', None)
@@ -880,4 +910,3 @@ def get_num_dpus():
             return len(DPUs)
 
     return 0
-

From e95994f7567e58fce2bafe1f77a7acf135a634b7 Mon Sep 17 00:00:00 2001
From: RogerX87 <Roger_Chang@wistron.com>
Date: Tue, 23 Apr 2024 00:37:25 +0800
Subject: [PATCH 0468/1115] Correct wistron platform driver (#17697)

* Correct wistron platform driver
* Correct Wistron platform driver and python
* correct the sfp.py of sw-to3200k
---
 .../6512-32r/modules/Makefile                 |    2 +-
 .../6512-32r/modules/i2c-imc.c                |    2 +-
 .../6512-32r/modules/oldjc42.c                |  600 ++++++
 .../6512-32r/modules/wistron_6512_32r_cpld.c  |    4 +-
 .../6512-32r/modules/wistron_6512_32r_fan.c   |    6 +-
 .../6512-32r/modules/wistron_6512_32r_oom.c   |    6 +-
 .../6512-32r/modules/wistron_6512_32r_psu.c   |    6 +-
 .../modules/wistron_6512_32r_syseeprom.c      |    6 +-
 .../modules/wistron_6512_32r_thermal.c        |    6 +-
 .../6512-32r/sonic_platform/sfp.py            | 1787 ++---------------
 .../6512-32r/sonic_platform/watchdog.py       |    2 +-
 .../sw-to3200k/modules/wistron_i2c_psu.c      |    5 +-
 .../modules/wistron_sw_to3200k_cpld.c         |    3 +-
 .../modules/wistron_sw_to3200k_fan.c          |    5 +-
 .../modules/wistron_sw_to3200k_oom.c          |    6 +-
 .../modules/wistron_sw_to3200k_psu.c          |    6 +-
 .../modules/wistron_sw_to3200k_thermal.c      |    5 +-
 .../sw-to3200k/sonic_platform/sfp.py          | 1582 ++-------------
 18 files changed, 1054 insertions(+), 2985 deletions(-)
 create mode 100644 platform/innovium/sonic-platform-modules-wistron/6512-32r/modules/oldjc42.c

diff --git a/platform/innovium/sonic-platform-modules-wistron/6512-32r/modules/Makefile b/platform/innovium/sonic-platform-modules-wistron/6512-32r/modules/Makefile
index 4e7a7e819..08f9e173d 100644
--- a/platform/innovium/sonic-platform-modules-wistron/6512-32r/modules/Makefile
+++ b/platform/innovium/sonic-platform-modules-wistron/6512-32r/modules/Makefile
@@ -1,7 +1,7 @@
 ifneq ($(KERNELRELEASE),)
 obj-m:= wistron_6512_32r_cpld.o wistron_6512_32r_fan.o \
 		wistron_6512_32r_oom.o wistron_6512_32r_psu.o \
-		wistron_6512_32r_thermal.o i2c-imc.o \
+		wistron_6512_32r_thermal.o i2c-imc.o oldjc42.o \
 		wistron_6512_32r_leds.o wistron_6512_32r_syseeprom.o
 else
 ifeq (,$(KERNEL_SRC))
diff --git a/platform/innovium/sonic-platform-modules-wistron/6512-32r/modules/i2c-imc.c b/platform/innovium/sonic-platform-modules-wistron/6512-32r/modules/i2c-imc.c
index a650f3cf1..44cd8d001 100644
--- a/platform/innovium/sonic-platform-modules-wistron/6512-32r/modules/i2c-imc.c
+++ b/platform/innovium/sonic-platform-modules-wistron/6512-32r/modules/i2c-imc.c
@@ -69,7 +69,7 @@
 
 
 /* DIMMs hold jc42 thermal sensors starting at i2c address 0x18 */
-#define DIMM_SENSOR_DRV            "jc42"
+#define DIMM_SENSOR_DRV            "oldjc42"
 #define DIMM_SENSOR_BASE_ADR       0x18
 
 
diff --git a/platform/innovium/sonic-platform-modules-wistron/6512-32r/modules/oldjc42.c b/platform/innovium/sonic-platform-modules-wistron/6512-32r/modules/oldjc42.c
new file mode 100644
index 000000000..0907e8fe1
--- /dev/null
+++ b/platform/innovium/sonic-platform-modules-wistron/6512-32r/modules/oldjc42.c
@@ -0,0 +1,600 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * jc42.c - driver for Jedec JC42.4 compliant temperature sensors
+ *
+ * Copyright (c) 2010  Ericsson AB.
+ *
+ * Derived from lm77.c by Andras BALI <drewie@freemail.hu>.
+ *
+ * JC42.4 compliant temperature sensors are typically used on memory modules.
+ */
+
+#include <linux/bitops.h>
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/slab.h>
+#include <linux/jiffies.h>
+#include <linux/i2c.h>
+#include <linux/hwmon.h>
+#include <linux/err.h>
+#include <linux/mutex.h>
+#include <linux/of.h>
+
+/* Addresses to scan */
+static const unsigned short normal_i2c[] = {
+	0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f, I2C_CLIENT_END };
+
+/* JC42 registers. All registers are 16 bit. */
+#define JC42_REG_CAP		0x00
+#define JC42_REG_CONFIG		0x01
+#define JC42_REG_TEMP_UPPER	0x02
+#define JC42_REG_TEMP_LOWER	0x03
+#define JC42_REG_TEMP_CRITICAL	0x04
+#define JC42_REG_TEMP		0x05
+#define JC42_REG_MANID		0x06
+#define JC42_REG_DEVICEID	0x07
+#define JC42_REG_SMBUS		0x22 /* NXP and Atmel, possibly others? */
+
+/* Status bits in temperature register */
+#define JC42_ALARM_CRIT_BIT	15
+#define JC42_ALARM_MAX_BIT	14
+#define JC42_ALARM_MIN_BIT	13
+
+/* Configuration register defines */
+#define JC42_CFG_CRIT_ONLY	(1 << 2)
+#define JC42_CFG_TCRIT_LOCK	(1 << 6)
+#define JC42_CFG_EVENT_LOCK	(1 << 7)
+#define JC42_CFG_SHUTDOWN	(1 << 8)
+#define JC42_CFG_HYST_SHIFT	9
+#define JC42_CFG_HYST_MASK	(0x03 << 9)
+
+/* Capabilities */
+#define JC42_CAP_RANGE		(1 << 2)
+
+/* Manufacturer IDs */
+#define ADT_MANID		0x11d4  /* Analog Devices */
+#define ATMEL_MANID		0x001f  /* Atmel */
+#define ATMEL_MANID2		0x1114	/* Atmel */
+#define MAX_MANID		0x004d  /* Maxim */
+#define IDT_MANID		0x00b3  /* IDT */
+#define MCP_MANID		0x0054  /* Microchip */
+#define NXP_MANID		0x1131  /* NXP Semiconductors */
+#define ONS_MANID		0x1b09  /* ON Semiconductor */
+#define STM_MANID		0x104a  /* ST Microelectronics */
+#define GT_MANID		0x1c68	/* Giantec */
+#define GT_MANID2		0x132d	/* Giantec, 2nd mfg ID */
+#define SI_MANID		0x1c85	/* Seiko Instruments */
+
+/* SMBUS register */
+#define SMBUS_STMOUT		BIT(7)  /* SMBus time-out, active low */
+
+/* Supported chips */
+
+/* Analog Devices */
+#define ADT7408_DEVID		0x0801
+#define ADT7408_DEVID_MASK	0xffff
+
+/* Atmel */
+#define AT30TS00_DEVID		0x8201
+#define AT30TS00_DEVID_MASK	0xffff
+
+#define AT30TSE004_DEVID	0x2200
+#define AT30TSE004_DEVID_MASK	0xffff
+
+/* Giantec */
+#define GT30TS00_DEVID		0x2200
+#define GT30TS00_DEVID_MASK	0xff00
+
+#define GT34TS02_DEVID		0x3300
+#define GT34TS02_DEVID_MASK	0xff00
+
+/* IDT */
+#define TSE2004_DEVID		0x2200
+#define TSE2004_DEVID_MASK	0xff00
+
+#define TS3000_DEVID		0x2900  /* Also matches TSE2002 */
+#define TS3000_DEVID_MASK	0xff00
+
+#define TS3001_DEVID		0x3000
+#define TS3001_DEVID_MASK	0xff00
+
+/* Maxim */
+#define MAX6604_DEVID		0x3e00
+#define MAX6604_DEVID_MASK	0xffff
+
+/* Microchip */
+#define MCP9804_DEVID		0x0200
+#define MCP9804_DEVID_MASK	0xfffc
+
+#define MCP9808_DEVID		0x0400
+#define MCP9808_DEVID_MASK	0xfffc
+
+#define MCP98242_DEVID		0x2000
+#define MCP98242_DEVID_MASK	0xfffc
+
+#define MCP98243_DEVID		0x2100
+#define MCP98243_DEVID_MASK	0xfffc
+
+#define MCP98244_DEVID		0x2200
+#define MCP98244_DEVID_MASK	0xfffc
+
+#define MCP9843_DEVID		0x0000	/* Also matches mcp9805 */
+#define MCP9843_DEVID_MASK	0xfffe
+
+/* NXP */
+#define SE97_DEVID		0xa200
+#define SE97_DEVID_MASK		0xfffc
+
+#define SE98_DEVID		0xa100
+#define SE98_DEVID_MASK		0xfffc
+
+/* ON Semiconductor */
+#define CAT6095_DEVID		0x0800	/* Also matches CAT34TS02 */
+#define CAT6095_DEVID_MASK	0xffe0
+
+#define CAT34TS02C_DEVID	0x0a00
+#define CAT34TS02C_DEVID_MASK	0xfff0
+
+#define CAT34TS04_DEVID		0x2200
+#define CAT34TS04_DEVID_MASK	0xfff0
+
+/* ST Microelectronics */
+#define STTS424_DEVID		0x0101
+#define STTS424_DEVID_MASK	0xffff
+
+#define STTS424E_DEVID		0x0000
+#define STTS424E_DEVID_MASK	0xfffe
+
+#define STTS2002_DEVID		0x0300
+#define STTS2002_DEVID_MASK	0xffff
+
+#define STTS2004_DEVID		0x2201
+#define STTS2004_DEVID_MASK	0xffff
+
+#define STTS3000_DEVID		0x0200
+#define STTS3000_DEVID_MASK	0xffff
+
+/* Seiko Instruments */
+#define S34TS04A_DEVID		0x2221
+#define S34TS04A_DEVID_MASK	0xffff
+
+static u16 jc42_hysteresis[] = { 0, 1500, 3000, 6000 };
+
+struct jc42_chips {
+	u16 manid;
+	u16 devid;
+	u16 devid_mask;
+};
+
+static struct jc42_chips jc42_chips[] = {
+	{ ADT_MANID, ADT7408_DEVID, ADT7408_DEVID_MASK },
+	{ ATMEL_MANID, AT30TS00_DEVID, AT30TS00_DEVID_MASK },
+	{ ATMEL_MANID2, AT30TSE004_DEVID, AT30TSE004_DEVID_MASK },
+	{ GT_MANID, GT30TS00_DEVID, GT30TS00_DEVID_MASK },
+	{ GT_MANID2, GT34TS02_DEVID, GT34TS02_DEVID_MASK },
+	{ IDT_MANID, TSE2004_DEVID, TSE2004_DEVID_MASK },
+	{ IDT_MANID, TS3000_DEVID, TS3000_DEVID_MASK },
+	{ IDT_MANID, TS3001_DEVID, TS3001_DEVID_MASK },
+	{ MAX_MANID, MAX6604_DEVID, MAX6604_DEVID_MASK },
+	{ MCP_MANID, MCP9804_DEVID, MCP9804_DEVID_MASK },
+	{ MCP_MANID, MCP9808_DEVID, MCP9808_DEVID_MASK },
+	{ MCP_MANID, MCP98242_DEVID, MCP98242_DEVID_MASK },
+	{ MCP_MANID, MCP98243_DEVID, MCP98243_DEVID_MASK },
+	{ MCP_MANID, MCP98244_DEVID, MCP98244_DEVID_MASK },
+	{ MCP_MANID, MCP9843_DEVID, MCP9843_DEVID_MASK },
+	{ NXP_MANID, SE97_DEVID, SE97_DEVID_MASK },
+	{ ONS_MANID, CAT6095_DEVID, CAT6095_DEVID_MASK },
+	{ ONS_MANID, CAT34TS02C_DEVID, CAT34TS02C_DEVID_MASK },
+	{ ONS_MANID, CAT34TS04_DEVID, CAT34TS04_DEVID_MASK },
+	{ NXP_MANID, SE98_DEVID, SE98_DEVID_MASK },
+	{ SI_MANID, S34TS04A_DEVID, S34TS04A_DEVID_MASK },
+	{ STM_MANID, STTS424_DEVID, STTS424_DEVID_MASK },
+	{ STM_MANID, STTS424E_DEVID, STTS424E_DEVID_MASK },
+	{ STM_MANID, STTS2002_DEVID, STTS2002_DEVID_MASK },
+	{ STM_MANID, STTS2004_DEVID, STTS2004_DEVID_MASK },
+	{ STM_MANID, STTS3000_DEVID, STTS3000_DEVID_MASK },
+};
+
+enum temp_index {
+	t_input = 0,
+	t_crit,
+	t_min,
+	t_max,
+	t_num_temp
+};
+
+static const u8 temp_regs[t_num_temp] = {
+	[t_input] = JC42_REG_TEMP,
+	[t_crit] = JC42_REG_TEMP_CRITICAL,
+	[t_min] = JC42_REG_TEMP_LOWER,
+	[t_max] = JC42_REG_TEMP_UPPER,
+};
+
+/* Each client has this additional data */
+struct jc42_data {
+	struct i2c_client *client;
+	struct mutex	update_lock;	/* protect register access */
+	bool		extended;	/* true if extended range supported */
+	bool		valid;
+	unsigned long	last_updated;	/* In jiffies */
+	u16		orig_config;	/* original configuration */
+	u16		config;		/* current configuration */
+	u16		temp[t_num_temp];/* Temperatures */
+};
+
+#define JC42_TEMP_MIN_EXTENDED	(-40000)
+#define JC42_TEMP_MIN		0
+#define JC42_TEMP_MAX		125000
+
+static u16 jc42_temp_to_reg(long temp, bool extended)
+{
+	int ntemp = clamp_val(temp,
+			      extended ? JC42_TEMP_MIN_EXTENDED :
+			      JC42_TEMP_MIN, JC42_TEMP_MAX);
+
+	/* convert from 0.001 to 0.0625 resolution */
+	return (ntemp * 2 / 125) & 0x1fff;
+}
+
+static int jc42_temp_from_reg(s16 reg)
+{
+	reg = sign_extend32(reg, 12);
+
+	/* convert from 0.0625 to 0.001 resolution */
+	return reg * 125 / 2;
+}
+
+static struct jc42_data *jc42_update_device(struct device *dev)
+{
+	struct jc42_data *data = dev_get_drvdata(dev);
+	struct i2c_client *client = data->client;
+	struct jc42_data *ret = data;
+	int i, val;
+
+	mutex_lock(&data->update_lock);
+
+	if (time_after(jiffies, data->last_updated + HZ) || !data->valid) {
+		for (i = 0; i < t_num_temp; i++) {
+			val = i2c_smbus_read_word_swapped(client, temp_regs[i]);
+			if (val < 0) {
+				ret = ERR_PTR(val);
+				goto abort;
+			}
+			data->temp[i] = val;
+		}
+		data->last_updated = jiffies;
+		data->valid = true;
+	}
+abort:
+	mutex_unlock(&data->update_lock);
+	return ret;
+}
+
+static int jc42_read(struct device *dev, enum hwmon_sensor_types type,
+		     u32 attr, int channel, long *val)
+{
+	struct jc42_data *data = jc42_update_device(dev);
+	int temp, hyst;
+
+	if (IS_ERR(data))
+		return PTR_ERR(data);
+
+	switch (attr) {
+	case hwmon_temp_input:
+		*val = jc42_temp_from_reg(data->temp[t_input]);
+		return 0;
+	case hwmon_temp_min:
+		*val = jc42_temp_from_reg(data->temp[t_min]);
+		return 0;
+	case hwmon_temp_max:
+		*val = jc42_temp_from_reg(data->temp[t_max]);
+		return 0;
+	case hwmon_temp_crit:
+		*val = jc42_temp_from_reg(data->temp[t_crit]);
+		return 0;
+	case hwmon_temp_max_hyst:
+		temp = jc42_temp_from_reg(data->temp[t_max]);
+		hyst = jc42_hysteresis[(data->config & JC42_CFG_HYST_MASK)
+						>> JC42_CFG_HYST_SHIFT];
+		*val = temp - hyst;
+		return 0;
+	case hwmon_temp_crit_hyst:
+		temp = jc42_temp_from_reg(data->temp[t_crit]);
+		hyst = jc42_hysteresis[(data->config & JC42_CFG_HYST_MASK)
+						>> JC42_CFG_HYST_SHIFT];
+		*val = temp - hyst;
+		return 0;
+	case hwmon_temp_min_alarm:
+		*val = (data->temp[t_input] >> JC42_ALARM_MIN_BIT) & 1;
+		return 0;
+	case hwmon_temp_max_alarm:
+		*val = (data->temp[t_input] >> JC42_ALARM_MAX_BIT) & 1;
+		return 0;
+	case hwmon_temp_crit_alarm:
+		*val = (data->temp[t_input] >> JC42_ALARM_CRIT_BIT) & 1;
+		return 0;
+	default:
+		return -EOPNOTSUPP;
+	}
+}
+
+static int jc42_write(struct device *dev, enum hwmon_sensor_types type,
+		      u32 attr, int channel, long val)
+{
+	struct jc42_data *data = dev_get_drvdata(dev);
+	struct i2c_client *client = data->client;
+	int diff, hyst;
+	int ret;
+
+	mutex_lock(&data->update_lock);
+
+	switch (attr) {
+	case hwmon_temp_min:
+		data->temp[t_min] = jc42_temp_to_reg(val, data->extended);
+		ret = i2c_smbus_write_word_swapped(client, temp_regs[t_min],
+						   data->temp[t_min]);
+		break;
+	case hwmon_temp_max:
+		data->temp[t_max] = jc42_temp_to_reg(val, data->extended);
+		ret = i2c_smbus_write_word_swapped(client, temp_regs[t_max],
+						   data->temp[t_max]);
+		break;
+	case hwmon_temp_crit:
+		data->temp[t_crit] = jc42_temp_to_reg(val, data->extended);
+		ret = i2c_smbus_write_word_swapped(client, temp_regs[t_crit],
+						   data->temp[t_crit]);
+		break;
+	case hwmon_temp_crit_hyst:
+		/*
+		 * JC42.4 compliant chips only support four hysteresis values.
+		 * Pick best choice and go from there.
+		 */
+		val = clamp_val(val, (data->extended ? JC42_TEMP_MIN_EXTENDED
+						     : JC42_TEMP_MIN) - 6000,
+				JC42_TEMP_MAX);
+		diff = jc42_temp_from_reg(data->temp[t_crit]) - val;
+		hyst = 0;
+		if (diff > 0) {
+			if (diff < 2250)
+				hyst = 1;	/* 1.5 degrees C */
+			else if (diff < 4500)
+				hyst = 2;	/* 3.0 degrees C */
+			else
+				hyst = 3;	/* 6.0 degrees C */
+		}
+		data->config = (data->config & ~JC42_CFG_HYST_MASK) |
+				(hyst << JC42_CFG_HYST_SHIFT);
+		ret = i2c_smbus_write_word_swapped(data->client,
+						   JC42_REG_CONFIG,
+						   data->config);
+		break;
+	default:
+		ret = -EOPNOTSUPP;
+		break;
+	}
+
+	mutex_unlock(&data->update_lock);
+
+	return ret;
+}
+
+static umode_t jc42_is_visible(const void *_data, enum hwmon_sensor_types type,
+			       u32 attr, int channel)
+{
+	const struct jc42_data *data = _data;
+	unsigned int config = data->config;
+	umode_t mode = 0444;
+
+	switch (attr) {
+	case hwmon_temp_min:
+	case hwmon_temp_max:
+		if (!(config & JC42_CFG_EVENT_LOCK))
+			mode |= 0200;
+		break;
+	case hwmon_temp_crit:
+		if (!(config & JC42_CFG_TCRIT_LOCK))
+			mode |= 0200;
+		break;
+	case hwmon_temp_crit_hyst:
+		if (!(config & (JC42_CFG_EVENT_LOCK | JC42_CFG_TCRIT_LOCK)))
+			mode |= 0200;
+		break;
+	case hwmon_temp_input:
+	case hwmon_temp_max_hyst:
+	case hwmon_temp_min_alarm:
+	case hwmon_temp_max_alarm:
+	case hwmon_temp_crit_alarm:
+		break;
+	default:
+		mode = 0;
+		break;
+	}
+	return mode;
+}
+
+/* Return 0 if detection is successful, -ENODEV otherwise */
+static int jc42_detect(struct i2c_client *client, struct i2c_board_info *info)
+{
+	struct i2c_adapter *adapter = client->adapter;
+	int i, config, cap, manid, devid;
+
+	if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA |
+				     I2C_FUNC_SMBUS_WORD_DATA))
+		return -ENODEV;
+
+	cap = i2c_smbus_read_word_swapped(client, JC42_REG_CAP);
+	config = i2c_smbus_read_word_swapped(client, JC42_REG_CONFIG);
+	manid = i2c_smbus_read_word_swapped(client, JC42_REG_MANID);
+	devid = i2c_smbus_read_word_swapped(client, JC42_REG_DEVICEID);
+
+	if (cap < 0 || config < 0 || manid < 0 || devid < 0)
+		return -ENODEV;
+
+	if ((cap & 0xff00) || (config & 0xf800))
+		return -ENODEV;
+
+	for (i = 0; i < ARRAY_SIZE(jc42_chips); i++) {
+		struct jc42_chips *chip = &jc42_chips[i];
+		if (manid == chip->manid &&
+		    (devid & chip->devid_mask) == chip->devid) {
+			strlcpy(info->type, "jc42", I2C_NAME_SIZE);
+			return 0;
+		}
+	}
+	return -ENODEV;
+}
+
+static const struct hwmon_channel_info *jc42_info[] = {
+	HWMON_CHANNEL_INFO(temp,
+			   HWMON_T_INPUT | HWMON_T_MIN | HWMON_T_MAX |
+			   HWMON_T_CRIT | HWMON_T_MAX_HYST |
+			   HWMON_T_CRIT_HYST | HWMON_T_MIN_ALARM |
+			   HWMON_T_MAX_ALARM | HWMON_T_CRIT_ALARM),
+	NULL
+};
+
+static const struct hwmon_ops jc42_hwmon_ops = {
+	.is_visible = jc42_is_visible,
+	.read = jc42_read,
+	.write = jc42_write,
+};
+
+static const struct hwmon_chip_info jc42_chip_info = {
+	.ops = &jc42_hwmon_ops,
+	.info = jc42_info,
+};
+
+static int jc42_probe(struct i2c_client *client)
+{
+	struct device *dev = &client->dev;
+	struct device *hwmon_dev;
+	struct jc42_data *data;
+	int config, cap;
+
+	data = devm_kzalloc(dev, sizeof(struct jc42_data), GFP_KERNEL);
+	if (!data)
+		return -ENOMEM;
+
+	data->client = client;
+	i2c_set_clientdata(client, data);
+	mutex_init(&data->update_lock);
+
+	cap = i2c_smbus_read_word_swapped(client, JC42_REG_CAP);
+	if (cap < 0)
+		return cap;
+
+	data->extended = !!(cap & JC42_CAP_RANGE);
+
+	if (device_property_read_bool(dev, "smbus-timeout-disable")) {
+		int smbus;
+
+		/*
+		 * Not all chips support this register, but from a
+		 * quick read of various datasheets no chip appears
+		 * incompatible with the below attempt to disable
+		 * the timeout. And the whole thing is opt-in...
+		 */
+		smbus = i2c_smbus_read_word_swapped(client, JC42_REG_SMBUS);
+		if (smbus < 0)
+			return smbus;
+		i2c_smbus_write_word_swapped(client, JC42_REG_SMBUS,
+					     smbus | SMBUS_STMOUT);
+	}
+
+	config = i2c_smbus_read_word_swapped(client, JC42_REG_CONFIG);
+	if (config < 0)
+		return config;
+
+	data->orig_config = config;
+	if (config & JC42_CFG_SHUTDOWN) {
+		config &= ~JC42_CFG_SHUTDOWN;
+		i2c_smbus_write_word_swapped(client, JC42_REG_CONFIG, config);
+	}
+	data->config = config;
+
+	hwmon_dev = devm_hwmon_device_register_with_info(dev, "jc42",
+							 data, &jc42_chip_info,
+							 NULL);
+	return PTR_ERR_OR_ZERO(hwmon_dev);
+}
+
+static void jc42_remove(struct i2c_client *client)
+{
+	struct jc42_data *data = i2c_get_clientdata(client);
+
+	/* Restore original configuration except hysteresis */
+	if ((data->config & ~JC42_CFG_HYST_MASK) !=
+	    (data->orig_config & ~JC42_CFG_HYST_MASK)) {
+		int config;
+
+		config = (data->orig_config & ~JC42_CFG_HYST_MASK)
+		  | (data->config & JC42_CFG_HYST_MASK);
+		i2c_smbus_write_word_swapped(client, JC42_REG_CONFIG, config);
+	}
+}
+
+#ifdef CONFIG_PM
+
+static int jc42_suspend(struct device *dev)
+{
+	struct jc42_data *data = dev_get_drvdata(dev);
+
+	data->config |= JC42_CFG_SHUTDOWN;
+	i2c_smbus_write_word_swapped(data->client, JC42_REG_CONFIG,
+				     data->config);
+	return 0;
+}
+
+static int jc42_resume(struct device *dev)
+{
+	struct jc42_data *data = dev_get_drvdata(dev);
+
+	data->config &= ~JC42_CFG_SHUTDOWN;
+	i2c_smbus_write_word_swapped(data->client, JC42_REG_CONFIG,
+				     data->config);
+	return 0;
+}
+
+static const struct dev_pm_ops jc42_dev_pm_ops = {
+	.suspend = jc42_suspend,
+	.resume = jc42_resume,
+};
+
+#define JC42_DEV_PM_OPS (&jc42_dev_pm_ops)
+#else
+#define JC42_DEV_PM_OPS NULL
+#endif /* CONFIG_PM */
+
+static const struct i2c_device_id jc42_id[] = {
+	{ "oldjc42", 0 },
+	{ }
+};
+MODULE_DEVICE_TABLE(i2c, jc42_id);
+
+#ifdef CONFIG_OF
+static const struct of_device_id jc42_of_ids[] = {
+	{ .compatible = "jedec,jc-42.4-temp", },
+	{ }
+};
+MODULE_DEVICE_TABLE(of, jc42_of_ids);
+#endif
+
+static struct i2c_driver jc42_driver = {
+	.class		= I2C_CLASS_SPD | I2C_CLASS_HWMON,
+	.driver = {
+		.name	= "oldjc42",
+		.pm = JC42_DEV_PM_OPS,
+		.of_match_table = of_match_ptr(jc42_of_ids),
+	},
+	.probe_new	= jc42_probe,
+	.remove		= jc42_remove,
+	.id_table	= jc42_id,
+	.detect		= jc42_detect,
+	.address_list	= normal_i2c,
+};
+
+module_i2c_driver(jc42_driver);
+
+MODULE_AUTHOR("Guenter Roeck <linux@roeck-us.net>");
+MODULE_DESCRIPTION("JC42 driver");
+MODULE_LICENSE("GPL");
diff --git a/platform/innovium/sonic-platform-modules-wistron/6512-32r/modules/wistron_6512_32r_cpld.c b/platform/innovium/sonic-platform-modules-wistron/6512-32r/modules/wistron_6512_32r_cpld.c
index e66d95a52..e10456997 100644
--- a/platform/innovium/sonic-platform-modules-wistron/6512-32r/modules/wistron_6512_32r_cpld.c
+++ b/platform/innovium/sonic-platform-modules-wistron/6512-32r/modules/wistron_6512_32r_cpld.c
@@ -988,7 +988,7 @@ static int wistron_cpld_probe(struct i2c_client *client, const struct i2c_device
 	return ret;
 }
 
-static int wistron_cpld_remove(struct i2c_client *client)
+static void wistron_cpld_remove(struct i2c_client *client)
 {
 	struct wistron_cpld_data *data = i2c_get_clientdata(client);
 	const struct attribute_group *group = NULL;
@@ -1015,8 +1015,6 @@ static int wistron_cpld_remove(struct i2c_client *client)
 		sysfs_remove_group(&client->dev.kobj, group);
 
 	kfree(data);
-
-	return 0;
 }
 
 int wistron_fpga_sysled_get(int led_type)
diff --git a/platform/innovium/sonic-platform-modules-wistron/6512-32r/modules/wistron_6512_32r_fan.c b/platform/innovium/sonic-platform-modules-wistron/6512-32r/modules/wistron_6512_32r_fan.c
index 4d57ba729..68e2baab0 100644
--- a/platform/innovium/sonic-platform-modules-wistron/6512-32r/modules/wistron_6512_32r_fan.c
+++ b/platform/innovium/sonic-platform-modules-wistron/6512-32r/modules/wistron_6512_32r_fan.c
@@ -200,7 +200,7 @@ static int wistron_fan_probe(struct i2c_client *client, const struct i2c_device_
 	if (status)
 		goto exit_free;
 
-	data->hwmon_dev = hwmon_device_register_with_info(&client->dev, "wistron_fan", NULL, NULL, NULL);
+	data->hwmon_dev = hwmon_device_register_with_groups(&client->dev, "wistron_fan", NULL, NULL);
 	if (IS_ERR(data->hwmon_dev)) {
 		status = PTR_ERR(data->hwmon_dev);
 		goto exit_remove;
@@ -218,14 +218,12 @@ static int wistron_fan_probe(struct i2c_client *client, const struct i2c_device_
 	return status;
 }
 
-static int wistron_fan_remove(struct i2c_client *client)
+static void wistron_fan_remove(struct i2c_client *client)
 {
 	struct wistron_fan_data *data = i2c_get_clientdata(client);
 
 	hwmon_device_unregister(data->hwmon_dev);
 	sysfs_remove_group(&client->dev.kobj, &wistron_fan_group);
-
-	return 0;
 }
 
 /* Addresses to scan */
diff --git a/platform/innovium/sonic-platform-modules-wistron/6512-32r/modules/wistron_6512_32r_oom.c b/platform/innovium/sonic-platform-modules-wistron/6512-32r/modules/wistron_6512_32r_oom.c
index 0ad2e2ca1..2c9176507 100644
--- a/platform/innovium/sonic-platform-modules-wistron/6512-32r/modules/wistron_6512_32r_oom.c
+++ b/platform/innovium/sonic-platform-modules-wistron/6512-32r/modules/wistron_6512_32r_oom.c
@@ -596,7 +596,7 @@ static int wistron_oom_probe(struct i2c_client *client, const struct i2c_device_
 	if (status)
 		goto exit_free;
 
-	data->hwmon_dev = hwmon_device_register_with_info(&client->dev, "wistron_oom", NULL, NULL, NULL);
+	data->hwmon_dev = hwmon_device_register_with_groups(&client->dev, "wistron_oom", NULL, NULL);
 	if (IS_ERR(data->hwmon_dev)) {
 		status = PTR_ERR(data->hwmon_dev);
 		goto exit_remove;
@@ -614,15 +614,13 @@ static int wistron_oom_probe(struct i2c_client *client, const struct i2c_device_
 	return status;
 }
 
-static int wistron_oom_remove(struct i2c_client *client)
+static void wistron_oom_remove(struct i2c_client *client)
 {
 	struct wistron_oom_data *data = i2c_get_clientdata(client);
 
 	hwmon_device_unregister(data->hwmon_dev);
 	sysfs_remove_group(&client->dev.kobj, &wistron_oom_group);
 	kfree(data);
-
-	return 0;
 }
 
 static const struct i2c_device_id wistron_oom_id[] = {
diff --git a/platform/innovium/sonic-platform-modules-wistron/6512-32r/modules/wistron_6512_32r_psu.c b/platform/innovium/sonic-platform-modules-wistron/6512-32r/modules/wistron_6512_32r_psu.c
index fa48e9ce5..a5bbff3bd 100644
--- a/platform/innovium/sonic-platform-modules-wistron/6512-32r/modules/wistron_6512_32r_psu.c
+++ b/platform/innovium/sonic-platform-modules-wistron/6512-32r/modules/wistron_6512_32r_psu.c
@@ -317,7 +317,7 @@ static int wistron_psu_probe(struct i2c_client *client,
 	if (status)
 		goto exit_free;
 
-	data->hwmon_dev = hwmon_device_register_with_info(&client->dev, "wistron_psu", NULL, NULL, NULL);
+	data->hwmon_dev = hwmon_device_register_with_groups(&client->dev, "wistron_psu", NULL, NULL);
 	if (IS_ERR(data->hwmon_dev)) {
 		status = PTR_ERR(data->hwmon_dev);
 		goto exit_remove;
@@ -335,15 +335,13 @@ static int wistron_psu_probe(struct i2c_client *client,
 	return status;
 }
 
-static int wistron_psu_remove(struct i2c_client *client)
+static void wistron_psu_remove(struct i2c_client *client)
 {
 	struct wistron_psu_data *data = i2c_get_clientdata(client);
 
 	hwmon_device_unregister(data->hwmon_dev);
 	sysfs_remove_group(&client->dev.kobj, &wistron_psu_group);
 	kfree(data);
-
-	return 0;
 }
 
 static const struct i2c_device_id wistron_psu_id[] = {
diff --git a/platform/innovium/sonic-platform-modules-wistron/6512-32r/modules/wistron_6512_32r_syseeprom.c b/platform/innovium/sonic-platform-modules-wistron/6512-32r/modules/wistron_6512_32r_syseeprom.c
index 578aa3c1d..50ab6a1a5 100644
--- a/platform/innovium/sonic-platform-modules-wistron/6512-32r/modules/wistron_6512_32r_syseeprom.c
+++ b/platform/innovium/sonic-platform-modules-wistron/6512-32r/modules/wistron_6512_32r_syseeprom.c
@@ -97,7 +97,7 @@ static int wistron_syseeprom_probe(struct i2c_client *client, const struct i2c_d
 	if (status)
 		goto exit_free;
 
-	data->hwmon_dev = hwmon_device_register_with_info(&client->dev, "wistron_syseeprom", NULL, NULL, NULL);
+	data->hwmon_dev = hwmon_device_register_with_groups(&client->dev, "wistron_syseeprom", NULL, NULL);
 	if (IS_ERR(data->hwmon_dev)) {
 		status = PTR_ERR(data->hwmon_dev);
 		goto exit_remove;
@@ -115,15 +115,13 @@ static int wistron_syseeprom_probe(struct i2c_client *client, const struct i2c_d
 	return status;
 }
 
-static int wistron_syseeprom_remove(struct i2c_client *client)
+static void wistron_syseeprom_remove(struct i2c_client *client)
 {
 	struct wistron_syseeprom_data *data = i2c_get_clientdata(client);
 
 	hwmon_device_unregister(data->hwmon_dev);
 	sysfs_remove_group(&client->dev.kobj, &wistron_syseeprom_group);
 	kfree(data);
-
-	return 0;
 }
 
 static const struct i2c_device_id wistron_syseeprom_id[] = {
diff --git a/platform/innovium/sonic-platform-modules-wistron/6512-32r/modules/wistron_6512_32r_thermal.c b/platform/innovium/sonic-platform-modules-wistron/6512-32r/modules/wistron_6512_32r_thermal.c
index 7d841046d..df8232d5a 100644
--- a/platform/innovium/sonic-platform-modules-wistron/6512-32r/modules/wistron_6512_32r_thermal.c
+++ b/platform/innovium/sonic-platform-modules-wistron/6512-32r/modules/wistron_6512_32r_thermal.c
@@ -135,7 +135,7 @@ static int wistron_thermal_probe(struct i2c_client *client, const struct i2c_dev
 	if (status)
 		goto exit_free;
 
-	data->hwmon_dev = hwmon_device_register_with_info(&client->dev, "wistron_thermal", NULL, NULL, NULL);
+	data->hwmon_dev = hwmon_device_register_with_groups(&client->dev, "wistron_thermal", NULL, NULL);
 	if (IS_ERR(data->hwmon_dev)) {
 		status = PTR_ERR(data->hwmon_dev);
 		goto exit_remove;
@@ -153,15 +153,13 @@ static int wistron_thermal_probe(struct i2c_client *client, const struct i2c_dev
 	return status;
 }
 
-static int wistron_thermal_remove(struct i2c_client *client)
+static void wistron_thermal_remove(struct i2c_client *client)
 {
 	struct wistron_thermal_data *data = i2c_get_clientdata(client);
 
 	hwmon_device_unregister(data->hwmon_dev);
 	sysfs_remove_group(&client->dev.kobj, &wistron_thermal_group);
 	kfree(data);
-
-	return 0;
 }
 
 
diff --git a/platform/innovium/sonic-platform-modules-wistron/6512-32r/sonic_platform/sfp.py b/platform/innovium/sonic-platform-modules-wistron/6512-32r/sonic_platform/sfp.py
index 53ca1e970..226cf6eab 100755
--- a/platform/innovium/sonic-platform-modules-wistron/6512-32r/sonic_platform/sfp.py
+++ b/platform/innovium/sonic-platform-modules-wistron/6512-32r/sonic_platform/sfp.py
@@ -5,252 +5,33 @@
 # provides the sfp device status which are available in the platform
 #############################################################################
 try:
-    from sonic_platform_base.sfp_base import SfpBase
-    from sonic_platform_base.sonic_sfp.sff8436 import sff8436InterfaceId
-    from sonic_platform_base.sonic_sfp.sff8436 import sff8436Dom
-    from sonic_platform_base.sonic_sfp.qsfp_dd import qsfp_dd_InterfaceId
-    from sonic_platform_base.sonic_sfp.qsfp_dd import qsfp_dd_Dom
-    from sonic_platform_base.sonic_sfp.sffbase import sffbase
-    from sonic_platform_base.sonic_sfp.sff8024 import type_abbrv_name
-    from sonic_platform_base.sonic_sfp.sff8024 import type_of_media_interface
+    from sonic_platform_base.sonic_xcvr.sfp_optoe_base import SfpOptoeBase
     from sonic_py_common.logger import Logger
     import sys
     import time
-    import subprocess
-    import os
-except ImportError as e:
-    raise ImportError(str(e) + "- required module not found")
+except ImportError as err:
+    raise ImportError(str(err) + "- required module not found")
 
-# definitions of the offset and width for values in XCVR info eeprom
-XCVR_INTFACE_BULK_OFFSET = 0
-XCVR_INTFACE_BULK_WIDTH_QSFP = 20
-XCVR_INTFACE_BULK_WIDTH_SFP = 21
-XCVR_TYPE_OFFSET = 0
-XCVR_TYPE_WIDTH = 1
-XCVR_EXT_TYPE_OFFSET = 1
-XCVR_EXT_TYPE_WIDTH = 1
-XCVR_CONNECTOR_OFFSET = 2
-XCVR_CONNECTOR_WIDTH = 1
-XCVR_COMPLIANCE_CODE_OFFSET = 3
-XCVR_COMPLIANCE_CODE_WIDTH = 8
-XCVR_ENCODING_OFFSET = 11
-XCVR_ENCODING_WIDTH = 1
-XCVR_NBR_OFFSET = 12
-XCVR_NBR_WIDTH = 1
-XCVR_EXT_RATE_SEL_OFFSET = 13
-XCVR_EXT_RATE_SEL_WIDTH = 1
-XCVR_CABLE_LENGTH_OFFSET = 14
-XCVR_CABLE_LENGTH_WIDTH_QSFP = 5
-XCVR_CABLE_LENGTH_WIDTH_SFP = 6
-XCVR_VENDOR_NAME_OFFSET = 20
-XCVR_VENDOR_NAME_WIDTH = 16
-XCVR_VENDOR_OUI_OFFSET = 37
-XCVR_VENDOR_OUI_WIDTH = 3
-XCVR_VENDOR_PN_OFFSET = 40
-XCVR_VENDOR_PN_WIDTH = 16
-XCVR_HW_REV_OFFSET = 56
-XCVR_HW_REV_WIDTH_OSFP = 2
-XCVR_HW_REV_WIDTH_QSFP = 2
-XCVR_HW_REV_WIDTH_SFP = 4
-XCVR_EXT_SPECIFICATION_COMPLIANCE_OFFSET = 64
-XCVR_EXT_SPECIFICATION_COMPLIANCE_WIDTH = 1
-XCVR_VENDOR_SN_OFFSET = 68
-XCVR_VENDOR_SN_WIDTH = 16
-XCVR_VENDOR_DATE_OFFSET = 84
-XCVR_VENDOR_DATE_WIDTH = 8
-XCVR_DOM_CAPABILITY_OFFSET = 92
-XCVR_DOM_CAPABILITY_WIDTH = 2
-
-# definitions of the offset and width for values in XCVR_QSFP_DD info eeprom
-XCVR_EXT_TYPE_OFFSET_QSFP_DD = 72
-XCVR_EXT_TYPE_WIDTH_QSFP_DD = 2
-XCVR_CONNECTOR_OFFSET_QSFP_DD = 75
-XCVR_CONNECTOR_WIDTH_QSFP_DD = 1
-XCVR_CABLE_LENGTH_OFFSET_QSFP_DD = 74
-XCVR_CABLE_LENGTH_WIDTH_QSFP_DD = 1
-XCVR_HW_REV_OFFSET_QSFP_DD = 36
-XCVR_HW_REV_WIDTH_QSFP_DD = 2
-XCVR_VENDOR_DATE_OFFSET_QSFP_DD = 54
-XCVR_VENDOR_DATE_WIDTH_QSFP_DD = 8
-XCVR_DOM_CAPABILITY_OFFSET_QSFP_DD = 2
-XCVR_DOM_CAPABILITY_WIDTH_QSFP_DD = 1
-XCVR_MEDIA_TYPE_OFFSET_QSFP_DD = 85
-XCVR_MEDIA_TYPE_WIDTH_QSFP_DD = 1
-XCVR_FIRST_APPLICATION_LIST_OFFSET_QSFP_DD = 86
-XCVR_FIRST_APPLICATION_LIST_WIDTH_QSFP_DD = 32
-XCVR_SECOND_APPLICATION_LIST_OFFSET_QSFP_DD = 351
-XCVR_SECOND_APPLICATION_LIST_WIDTH_QSFP_DD = 28
-
-XCVR_INTERFACE_DATA_START = 0
-XCVR_INTERFACE_DATA_SIZE = 92
-SFP_MODULE_ADDRA2_OFFSET = 256
-SFP_MODULE_THRESHOLD_OFFSET = 0
-SFP_MODULE_THRESHOLD_WIDTH = 56
-
-QSFP_DOM_BULK_DATA_START = 22
-QSFP_DOM_BULK_DATA_SIZE = 36
-SFP_DOM_BULK_DATA_START = 96
-SFP_DOM_BULK_DATA_SIZE = 10
-
-QSFP_DD_DOM_BULK_DATA_START = 14
-QSFP_DD_DOM_BULK_DATA_SIZE = 4
-
-# definitions of the offset for values in OSFP info eeprom
-OSFP_TYPE_OFFSET = 0
-OSFP_VENDOR_NAME_OFFSET = 129
-OSFP_VENDOR_PN_OFFSET = 148
-OSFP_HW_REV_OFFSET = 164
-OSFP_VENDOR_SN_OFFSET = 166
-
-# definitions of the offset for values in QSFP_DD info eeprom
-QSFP_DD_TYPE_OFFSET = 0
-QSFP_DD_VENDOR_NAME_OFFSET = 1
-QSFP_DD_VENDOR_PN_OFFSET = 20
-QSFP_DD_VENDOR_SN_OFFSET = 38
-QSFP_DD_VENDOR_OUI_OFFSET = 17
-
-#definitions of the offset and width for values in DOM info eeprom
-QSFP_DOM_REV_OFFSET = 1
-QSFP_DOM_REV_WIDTH = 1
-QSFP_TEMPE_OFFSET = 22
-QSFP_TEMPE_WIDTH = 2
-QSFP_VOLT_OFFSET = 26
-QSFP_VOLT_WIDTH = 2
-QSFP_VERSION_COMPLIANCE_OFFSET = 1
-QSFP_VERSION_COMPLIANCE_WIDTH = 2
-QSFP_CHANNL_MON_OFFSET = 34
-QSFP_CHANNL_MON_WIDTH = 16
-QSFP_CHANNL_MON_WITH_TX_POWER_WIDTH = 24
-QSFP_CHANNL_DISABLE_STATUS_OFFSET = 86
-QSFP_CHANNL_DISABLE_STATUS_WIDTH = 1
-QSFP_CHANNL_RX_LOS_STATUS_OFFSET = 3
-QSFP_CHANNL_RX_LOS_STATUS_WIDTH = 1
-QSFP_CHANNL_TX_FAULT_STATUS_OFFSET = 4
-QSFP_CHANNL_TX_FAULT_STATUS_WIDTH = 1
-QSFP_CONTROL_OFFSET = 86
-QSFP_CONTROL_WIDTH = 8
-QSFP_MODULE_MONITOR_OFFSET = 0
-QSFP_MODULE_MONITOR_WIDTH = 9
-QSFP_POWEROVERRIDE_OFFSET = 93
-QSFP_POWEROVERRIDE_WIDTH = 1
-QSFP_POWEROVERRIDE_BIT = 0
-QSFP_POWERSET_BIT = 1
-QSFP_OPTION_VALUE_OFFSET = 192
-QSFP_OPTION_VALUE_WIDTH = 4
-
-QSFP_MODULE_UPPER_PAGE3_START = 384
-QSFP_MODULE_THRESHOLD_OFFSET = 0
-QSFP_MODULE_THRESHOLD_WIDTH = 24
-QSFP_CHANNL_THRESHOLD_OFFSET = 48
-QSFP_CHANNL_THRESHOLD_WIDTH = 24
-
-#definitions of the offset and width for values in DOM info eeprom
-QSFP_DD_TEMPE_OFFSET = 14
-QSFP_DD_TEMPE_WIDTH = 2
-QSFP_DD_VOLT_OFFSET = 16
-QSFP_DD_VOLT_WIDTH = 2
-QSFP_DD_TX_BIAS_OFFSET = 42
-QSFP_DD_TX_BIAS_WIDTH = 16
-QSFP_DD_RX_POWER_OFFSET = 58
-QSFP_DD_RX_POWER_WIDTH = 16
-QSFP_DD_TX_POWER_OFFSET = 26
-QSFP_DD_TX_POWER_WIDTH = 16
-QSFP_DD_CHANNL_FLAGS_SUPPORT_OFFSET = 29
-QSFP_DD_CHANNL_FLAGS_SUPPORT_WIDTH = 2
-QSFP_DD_CHANNL_MON_SUPPORT_OFFSET = 31
-QSFP_DD_CHANNL_MON_SUPPORT_WIDTH = 2
-QSFP_DD_CHANNL_MON_OFFSET = 154
-QSFP_DD_CHANNL_MON_WIDTH = 48
-QSFP_DD_CHANNL_DISABLE_STATUS_OFFSET = 2
-QSFP_DD_CHANNL_DISABLE_STATUS_WIDTH = 1
-QSFP_DD_CHANNL_RX_LOS_STATUS_OFFSET = 19
-QSFP_DD_CHANNL_RX_LOS_STATUS_WIDTH = 1
-QSFP_DD_CHANNL_TX_FAULT_STATUS_OFFSET = 7
-QSFP_DD_CHANNL_TX_FAULT_STATUS_WIDTH = 1
-QSFP_DD_MODULE_THRESHOLD_OFFSET = 0
-QSFP_DD_MODULE_THRESHOLD_WIDTH = 72
-QSFP_DD_CHANNL_STATUS_OFFSET = 26
-QSFP_DD_CHANNL_STATUS_WIDTH = 1
 
 QSFP_TYPE_CODE_LIST = [
-    '0d', # QSFP+ or later
-    '11' # QSFP28 or later
+    '0x0d', # QSFP+ or later
+    '0x11'  # QSFP28 or later
 ]
 
 QSFP_DD_TYPE_CODE_LIST = [
-    '18' # QSFP-DD Double Density 8X Pluggable Transceiver
+    '0x18' # QSFP-DD Double Density 8X Pluggable Transceiver
 ]
 
-qsfp_cable_length_tup = ('Length(km)', 'Length OM3(2m)',
-                         'Length OM2(m)', 'Length OM1(m)',
-                         'Length Cable Assembly(m)')
-
-sfp_cable_length_tup = ('LengthSMFkm-UnitsOfKm', 'LengthSMF(UnitsOf100m)',
-                        'Length50um(UnitsOf10m)', 'Length62.5um(UnitsOfm)',
-                        'LengthCable(UnitsOfm)', 'LengthOM3(UnitsOf10m)')
-
-sfp_compliance_code_tup = ('10GEthernetComplianceCode', 'InfinibandComplianceCode',
-                            'ESCONComplianceCodes', 'SONETComplianceCodes',
-                            'EthernetComplianceCodes','FibreChannelLinkLength',
-                            'FibreChannelTechnology', 'SFP+CableTechnology',
-                            'FibreChannelTransmissionMedia','FibreChannelSpeed')
-
-qsfp_compliance_code_tup = ('10/40G Ethernet Compliance Code', 'SONET Compliance codes',
-                            'SAS/SATA compliance codes', 'Gigabit Ethernet Compliant codes',
-                            'Fibre Channel link length/Transmitter Technology',
-                            'Fibre Channel transmission media', 'Fibre Channel Speed')
 
 QSFP_TYPE = "QSFP"
 QSFP_DD_TYPE = "QSFP_DD"
 
-PAUSE_EEPROM_SERVICE_STAMP='/tmp/pause_eeprom_polling'
 
 # Global logger class instance
 logger = Logger()
-class ext_qsfp_dd(sffbase):
-    version = '1.0'
-
-    qsfp_dd_mon_capability = {
-        'Tx_bias_support':
-            {'offset': 1,
-             'bit': 0,
-             'type': 'bitvalue'},
-        'Tx_power_support':
-            {'offset': 1,
-             'bit': 1,
-             'type': 'bitvalue'},
-        'Rx_power_support':
-            {'offset': 1,
-             'bit': 2,
-             'type': 'bitvalue'},
-        'Voltage_support':
-            {'offset': 0,
-             'bit': 1,
-             'type': 'bitvalue'},
-        'Temp_support':
-            {'offset': 0,
-             'bit': 0,
-             'type': 'bitvalue'}
-    }
-
-    qsfp_dd_flags_capability = {
-        'tx_fault':
-            {'offset': 0,
-             'bit': 0,
-             'type': 'bitvalue'},
-        'rx_los':
-            {'offset': 1,
-             'bit': 1,
-             'type': 'bitvalue'}
-    }
 
-    def parse_mon_capability(self, sn_raw_data, start_pos):
-        return sffbase.parse(self, self.qsfp_dd_mon_capability, sn_raw_data, start_pos)
 
-    def parse_flags_capability(self, sn_raw_data, start_pos):
-        return sffbase.parse(self, self.qsfp_dd_flags_capability, sn_raw_data, start_pos)
-
-class Sfp(SfpBase):
+class Sfp(SfpOptoeBase):
     """Platform-specific Sfp class"""
 
     # Port number
@@ -289,10 +70,9 @@ class Sfp(SfpBase):
         28: '2c',
         29: '2d',
         30: '2e',
-        31: '2f',
+        31: '2f'
     }
 
-    _sfp_port = range(32, PORT_END + 1)
     RESET_1_16_PATH = "/sys/bus/i2c/devices/0-0006/port{}_reset"
     RESET_17_32_PATH = "/sys/bus/i2c/devices/0-0007/port{}_reset"
     PRS_1_16_PATH = "/sys/bus/i2c/devices/0-0006/port{}_present"
@@ -302,27 +82,54 @@ class Sfp(SfpBase):
 
     def __init__(self, sfp_index, sfp_type):
         # Init index
+        SfpOptoeBase.__init__(self)
         self.index = sfp_index
+        self.sfp_type = sfp_type
+
         self.port_num = self.index + 1
-        self.abbrv = None
+        self.port_type = self.sfp_type
 
         # Init eeprom path
         eeprom_path_prefix = '/sys/bus/i2c/devices/0-00'
         self.port_to_eeprom1_mapping = {}
         self.port_to_eeprom2_mapping = {}
         self.port_to_eeprom3_mapping = {}
+        self.port_to_eeprom4_mapping = {}
+        self.port_to_eeprom12_mapping = {}
+        self.port_to_power_mode_mapping = {}
+        self.port_to_grid_mapping = {}
+        self.port_to_freq_mapping = {}
+        self.port_to_outp_mapping = {}
         for x in range(self.PORT_START, self.PORT_END + 1):
             self.port_to_eeprom1_mapping[x] = eeprom_path_prefix + self.port_to_i2c_mapping[x] + '/eeprom1'
             self.port_to_eeprom2_mapping[x] = eeprom_path_prefix + self.port_to_i2c_mapping[x] + '/eeprom2'
             self.port_to_eeprom3_mapping[x] = eeprom_path_prefix + self.port_to_i2c_mapping[x] + '/eeprom3'
+            self.port_to_eeprom4_mapping[x] = eeprom_path_prefix + self.port_to_i2c_mapping[x] + '/eeprom_pg4'
+            self.port_to_eeprom12_mapping[x] = eeprom_path_prefix + self.port_to_i2c_mapping[x] + '/eeprom_pg12'
+            self.port_to_power_mode_mapping[x] = eeprom_path_prefix + self.port_to_i2c_mapping[x] + '/power_mode'
+            self.port_to_grid_mapping[x] = eeprom_path_prefix + self.port_to_i2c_mapping[x] + '/grid'
+            self.port_to_freq_mapping[x] = eeprom_path_prefix + self.port_to_i2c_mapping[x] + '/freq'
+            self.port_to_outp_mapping[x] = eeprom_path_prefix + self.port_to_i2c_mapping[x] + '/output_power'
 
-        self._detect_sfp_type(sfp_type)
-        self._dom_capability_detect()
-        SfpBase.__init__(self)
+        self.reinit()
 
     def reinit(self):
         self._detect_sfp_type(self.sfp_type)
-        self._dom_capability_detect()
+
+    def _detect_sfp_type(self, sfp_type):
+        eeprom_raw = []
+        eeprom_raw = self._xcvr_api_factory._get_id()
+        if eeprom_raw is not None:
+            eeprom_raw = hex(eeprom_raw)
+            if eeprom_raw in QSFP_TYPE_CODE_LIST:
+                self.sfp_type = QSFP_TYPE
+            elif eeprom_raw in QSFP_DD_TYPE_CODE_LIST:
+                self.sfp_type = QSFP_DD_TYPE
+            else:
+                # Set native port type if EEPROM type is not recognized/readable
+                self.sfp_type = self.port_type
+        else:
+            self.sfp_type = self.port_type
 
     def get_presence(self):
         """
@@ -333,873 +140,15 @@ def get_presence(self):
         presence = False
         try:
             if self.index < 16:
-                pres_path=self.PRS_1_16_PATH.format(self.port_num)
+                pres_path = self.PRS_1_16_PATH.format(self.port_num)
             else:
-                pres_path=self.PRS_17_32_PATH.format(self.port_num)
+                pres_path = self.PRS_17_32_PATH.format(self.port_num)
             with open(pres_path, 'r') as sfp_presence:
                 presence = int(sfp_presence.read(), 16)
         except IOError:
             return False
         logger.log_info("debug:port_ %s sfp presence is %s" % (str(self.index), str(presence)))
-        return presence == 1
-
-    def _get_eeprom_by_bmc(self):
-        eeprom_path_prefix = '/sys/bus/i2c/devices/0-00'
-        mux = int((0x70 + self.index / 8) * 2)
-        chan = 1 << (self.index % 8)
-        sel_ch_cmd = 'ipmitool raw 0x30 0x25 0x1 {} 0x0 {} 2>/dev/null'.format(mux, chan)
-        desel_ch_cmd = 'ipmitool raw 0x30 0x25 0x1 {} 0x0 0x0 2>/dev/null'.format(mux)
-        desel_all_ch_cmd = 'ipmitool raw 0x30 0x25 0x1 0xe0 0x0 0x0 2>/dev/null; ipmitool raw 0x30 0x25 0x1 0xe2 0x0 0x0 2>/dev/null; ipmitool raw 0x30 0x25 0x1 0xe4 0x0 0x0 2>/dev/null; ipmitool raw 0x30 0x25 0x1 0xe6 0x0 0x0 2>/dev/null'
-        sel_page_cmd = 'ipmitool raw 0x30 0x25 0x1 0xa0 0x0 0x7f {} 2>/dev/null'
-        read_lower_cmd = 'ipmitool raw 0x30 0x25 0x1 0xa0 0x80 0x0 2>/dev/null'
-        read_upper_cmd = 'ipmitool raw 0x30 0x25 0x1 0xa0 0x80 0x80 2>/dev/null'
-
-        try:
-            subprocess.Popen(sel_ch_cmd, stdout=subprocess.PIPE)
-            subprocess.Popen(sel_page_cmd.format(0), stdout=subprocess.PIPE)
-            time.sleep(0.05)
-            p = subprocess.Popen(read_lower_cmd, stdout=subprocess.PIPE)
-            out, err = p.communicate()
-            # retry if error occurred
-            i = 0
-            while out == b'' and i < 3:
-                subprocess.Popen(desel_all_ch_cmd, stdout=subprocess.PIPE)
-                time.sleep(0.05)
-                subprocess.Popen(sel_ch_cmd, stdout=subprocess.PIPE)
-                subprocess.Popen(sel_page_cmd.format(0), stdout=subprocess.PIPE)
-                time.sleep(0.05)
-                p = subprocess.Popen(read_lower_cmd, stdout=subprocess.PIPE)
-                out, err = p.communicate()
-                i = i + 1
-            if out == b'':
-                return False
-
-            data_lower = out.decode().strip().replace("\n", "")
-
-            i = 0
-            p = subprocess.Popen(read_upper_cmd, stdout=subprocess.PIPE)
-            out, err = p.communicate()
-            while out == b'' and i < 3:
-                time.sleep(0.05)
-                p = subprocess.Popen(read_upper_cmd, stdout=subprocess.PIPE)
-                out, err = p.communicate()
-                i = i + 1
-            if out == b'':
-                return False
-
-            data_upper_page_0 = out.decode().strip().replace("\n", "")
-
-            subprocess.Popen(sel_page_cmd.format(0x1), stdout=subprocess.PIPE)
-            p = subprocess.Popen(read_upper_cmd, stdout=subprocess.PIPE)
-            out, err = p.communicate()
-            data_upper_page_1 = out.decode().strip().replace("\n", "")
-
-            subprocess.Popen(sel_page_cmd.format(0x2), stdout=subprocess.PIPE)
-            p = subprocess.Popen(read_upper_cmd, stdout=subprocess.PIPE)
-            out, err = p.communicate()
-            data_upper_page_2 = out.decode().strip().replace("\n", "")
-
-            subprocess.Popen(sel_page_cmd.format(0x3), stdout=subprocess.PIPE)
-            p = subprocess.Popen(read_upper_cmd, stdout=subprocess.PIPE)
-            out, err = p.communicate()
-            data_upper_page_3 = out.decode().strip().replace("\n", "")
-
-            subprocess.Popen(sel_page_cmd.format(0x10), stdout=subprocess.PIPE)
-            p = subprocess.Popen(read_upper_cmd, stdout=subprocess.PIPE)
-            out, err = p.communicate()
-            data_upper_page_10 = out.decode().strip().replace("\n", "")
-
-            subprocess.Popen(sel_page_cmd.format(0x11), stdout=subprocess.PIPE)
-            p = subprocess.Popen(read_upper_cmd, stdout=subprocess.PIPE)
-            out, err = p.communicate()
-            data_upper_page_11 = out.decode().strip().replace("\n", "")
-
-            subprocess.Popen(sel_page_cmd.format(0), stdout=subprocess.PIPE)
-            subprocess.Popen(desel_ch_cmd, stdout=subprocess.PIPE)
-
-            eeprom1 = data_lower + " " + data_upper_page_0
-            eeprom2 = data_upper_page_1 + " " + data_upper_page_2
-            eeprom3 = data_upper_page_3 + " " + data_upper_page_10 + " " + data_upper_page_11
-
-            os.remove(PAUSE_EEPROM_SERVICE_STAMP)
-
-            eeprom_raw_lower = [int(x, 16) for x in data_lower.split()]
-            if eeprom_raw_lower[0] in QSFP_TYPE_CODE_LIST:
-                temp = eeprom_raw_lower[22]
-                if temp > 128:
-                    return False
-            elif eeprom_raw_lower[0] in QSFP_DD_TYPE_CODE_LIST:
-                temp = eeprom_raw_lower[14]
-                if temp > 128:
-                    return False
-
-            eeprom1 = eeprom1.replace(" ","")
-            eeprom2 = eeprom2.replace(" ","")
-            eeprom3 = eeprom3.replace(" ","")
-
-            for i in range(0, 3):
-                sysfs_sfp_i2c_client_temp_path = eeprom_path_prefix + self.port_to_i2c_mapping[self.index] + '/temp'
-                if i == 0:
-                    sysfs_sfp_i2c_client_eeprom_path = self.port_to_eeprom1_mapping[self.index]
-                    eeprom = eeprom1
-                elif i == 1:
-                    sysfs_sfp_i2c_client_eeprom_path = self.port_to_eeprom2_mapping[self.index]
-                    eeprom = eeprom2
-                else:
-                    sysfs_sfp_i2c_client_eeprom_path = self.port_to_eeprom3_mapping[self.index]
-                    eeprom = eeprom3
-
-                try:
-                    with open(sysfs_sfp_i2c_client_eeprom_path, 'w') as fd:
-                        fd.write(eeprom)
-                        fd.close()
-                    if i == 0:
-                        with open(sysfs_sfp_i2c_client_temp_path, 'w') as fd:
-                            fd.write(temp)
-                            fd.close()
-                except IOError:
-                    fd.close()
-            return True
-        except Exception:
-            return False
-
-    def read_eeprom_buffer(self):
-        with open(PAUSE_EEPROM_SERVICE_STAMP, 'w') as f:
-            f.write("")
-        f.close()
-
-        time.sleep(0.2)
-        rc = self._get_eeprom_by_bmc()
-
-
-        return rc
-
-    def clear_eeprom_buffer(self):
-        for i in range(0, 3):
-            if i == 0:
-                sysfs_sfp_i2c_client_eeprom_path = self.port_to_eeprom1_mapping[self.index]
-            elif i == 1:
-                sysfs_sfp_i2c_client_eeprom_path = self.port_to_eeprom2_mapping[self.index]
-            else:
-                sysfs_sfp_i2c_client_eeprom_path = self.port_to_eeprom3_mapping[self.index]
-            try:
-                with open(sysfs_sfp_i2c_client_eeprom_path, 'w') as fd:
-                    fd.write(" ")
-                    fd.close()
-            except IOError:
-                fd.close()
-
-    def _read_eeprom_specific_bytes(self, offset, num_bytes):
-        sysfsfile_eeprom = None
-        eeprom_raw = []
-        for i in range(0, num_bytes):
-            eeprom_raw.append("0x00")
-
-        if offset < 256:
-            sysfs_sfp_i2c_client_eeprom_path = self.port_to_eeprom1_mapping[self.index]
-        elif offset < 512:
-            sysfs_sfp_i2c_client_eeprom_path = self.port_to_eeprom2_mapping[self.index]
-            offset = offset - 256
-        else:
-            sysfs_sfp_i2c_client_eeprom_path = self.port_to_eeprom3_mapping[self.index]
-            offset = offset - 512
-
-        try:
-            sysfsfile_eeprom = open(sysfs_sfp_i2c_client_eeprom_path, mode="rb", buffering=0)
-            sysfsfile_eeprom.seek(offset)
-            raw = sysfsfile_eeprom.read(num_bytes)
-            if sys.version_info[0] >= 3:
-                for n in range(0, num_bytes):
-                    eeprom_raw[n] = hex(raw[n])[2:].zfill(2)
-            else:
-                for n in range(0, num_bytes):
-                    eeprom_raw[n] = hex(ord(raw[n]))[2:].zfill(2)
-
-        except BaseException:
-            pass
-        finally:
-            if sysfsfile_eeprom:
-                sysfsfile_eeprom.close()
-
-        return eeprom_raw
-
-    def _detect_sfp_type(self, sfp_type):
-        eeprom_raw = []
-        eeprom_raw = self._read_eeprom_specific_bytes(XCVR_TYPE_OFFSET, XCVR_TYPE_WIDTH)
-        if eeprom_raw:
-            if eeprom_raw[0] in QSFP_TYPE_CODE_LIST:
-                self.sfp_type = QSFP_TYPE
-                self.abbrv = type_abbrv_name[eeprom_raw[0]]
-            elif eeprom_raw[0] in QSFP_DD_TYPE_CODE_LIST:
-                self.sfp_type = QSFP_DD_TYPE
-                self.abbrv = type_abbrv_name[eeprom_raw[0]]
-            else:
-                # we don't regonize this identifier value, treat the xSFP module as the default type
-                self.sfp_type = sfp_type
-                logger.log_info("Identifier value of {} module {} is {} which isn't regonized and will be treated as default type ({})".format(
-                    sfp_type, self.index, eeprom_raw[0], sfp_type
-                ))
-        else:
-            # eeprom_raw being None indicates the module is not present.
-            # in this case we treat it as the default type according to the SKU
-            self.sfp_type = sfp_type
-            self.abbrv = type_abbrv_name['18']
-
-    def _dom_capability_detect(self):
-        if not self.get_presence():
-            self.dom_supported = False
-            self.dom_temp_supported = False
-            self.dom_volt_supported = False
-            self.dom_rx_power_supported = False
-            self.dom_tx_bias_power_supported = False
-            self.dom_tx_power_supported = False
-            self.dom_module_monitor_supported = False
-            self.calibration = 0
-            return
-
-        self.dom_channel_monitor_supported = True
-        self.dom_module_monitor_supported = True
-        self.dom_channel_threshold_supported = True
-        self.dom_module_threshold_supported = True
-
-
-        self.dom_supported = False
-        self.dom_temp_supported = False
-        self.dom_volt_supported = False
-        self.dom_rx_power_supported = False
-        self.dom_tx_bias_supported = False
-        self.dom_tx_power_supported = False
-        self.dom_thresholds_supported = False
-
-        if self.sfp_type == QSFP_TYPE:
-            self.calibration = 1
-            sfpi_obj = sff8436InterfaceId()
-            if sfpi_obj is None:
-                self.dom_supported = False
-            offset = 128
-
-            # QSFP capability byte parse, through this byte can know whether it support tx_power or not.
-            # TODO: in the future when decided to migrate to support SFF-8636 instead of SFF-8436,
-            # need to add more code for determining the capability and version compliance
-            # in SFF-8636 dom capability definitions evolving with the versions.
-            qsfp_dom_capability_raw = self._read_eeprom_specific_bytes((offset + XCVR_DOM_CAPABILITY_OFFSET), XCVR_DOM_CAPABILITY_WIDTH)
-            if qsfp_dom_capability_raw is not None:
-                qsfp_version_compliance_raw = self._read_eeprom_specific_bytes(QSFP_VERSION_COMPLIANCE_OFFSET, QSFP_VERSION_COMPLIANCE_WIDTH)
-                qsfp_version_compliance = int(qsfp_version_compliance_raw[0], 16)
-                dom_capability = sfpi_obj.parse_dom_capability(qsfp_dom_capability_raw, 0)
-                if qsfp_version_compliance >= 0x08:
-                    self.dom_temp_supported = dom_capability['data']['Temp_support']['value'] == 'On'
-                    self.dom_volt_supported = dom_capability['data']['Voltage_support']['value'] == 'On'
-                    self.dom_rx_power_supported = dom_capability['data']['Rx_power_support']['value'] == 'On'
-                    self.dom_tx_power_supported = dom_capability['data']['Tx_power_support']['value'] == 'On'
-                else:
-                    self.dom_temp_supported = True
-                    self.dom_volt_supported = True
-                    self.dom_rx_power_supported = dom_capability['data']['Rx_power_support']['value'] == 'On'
-                    self.dom_tx_power_supported = True
-                self.dom_supported = True
-                self.calibration = 1
-                sfpd_obj = sff8436Dom()
-                if sfpd_obj is None:
-                    return None
-                qsfp_option_value_raw = self._read_eeprom_specific_bytes(QSFP_OPTION_VALUE_OFFSET, QSFP_OPTION_VALUE_WIDTH)
-                if qsfp_option_value_raw is not None:
-                    optional_capability = sfpd_obj.parse_option_params(qsfp_option_value_raw, 0)
-                    self.dom_tx_disable_supported = optional_capability['data']['TxDisable']['value'] == 'On'
-                dom_status_indicator = sfpd_obj.parse_dom_status_indicator(qsfp_version_compliance_raw, 1)
-                self.qsfp_page3_available = dom_status_indicator['data']['FlatMem']['value'] == 'Off'
-            else:
-                self.dom_supported = False
-                self.dom_temp_supported = False
-                self.dom_volt_supported = False
-                self.dom_rx_power_supported = False
-                self.dom_tx_power_supported = False
-                self.calibration = 0
-                self.qsfp_page3_available = False
-
-        elif self.sfp_type == QSFP_DD_TYPE:
-            sfpi_obj = qsfp_dd_InterfaceId()
-            if sfpi_obj is None:
-                self.dom_supported = False
-
-            self.dom_temp_supported = True
-            self.dom_volt_supported = True
-            self.dom_tx_fault_supported = False
-            self.dom_rx_los_supported = False
-
-            offset = 0;
-
-            # two types of QSFP-DD cable types supported: Copper and Optical.
-            qsfp_dom_capability_raw = self._read_eeprom_specific_bytes((offset + XCVR_DOM_CAPABILITY_OFFSET_QSFP_DD), XCVR_DOM_CAPABILITY_WIDTH_QSFP_DD)
-
-            if qsfp_dom_capability_raw is not None:
-                dom_capability = sfpi_obj.parse_dom_capability(qsfp_dom_capability_raw, 0)
-                if dom_capability['data']['Flat_MEM']['value'] == 'Off':
-
-                    ext_dd = ext_qsfp_dd()
-                    offset = 256
-                    mon_sup_raw = self._read_eeprom_specific_bytes(offset + QSFP_DD_CHANNL_MON_SUPPORT_OFFSET, QSFP_DD_CHANNL_MON_SUPPORT_WIDTH)
-                    mon_sup_data = ext_dd.parse_mon_capability(mon_sup_raw, 0)
-
-                    self.dom_thresholds_supported = mon_sup_data['data']['Tx_power_support']['value'] == 'On'
-                    self.dom_rx_power_supported = mon_sup_data['data']['Tx_power_support']['value'] == 'On'
-                    self.dom_tx_power_supported = mon_sup_data['data']['Rx_power_support']['value'] == 'On'
-                    self.dom_tx_bias_supported = mon_sup_data['data']['Tx_bias_support']['value'] == 'On'
-                    self.dom_supported = True
-
-                    flags_sup_raw = self._read_eeprom_specific_bytes(offset + QSFP_DD_CHANNL_FLAGS_SUPPORT_OFFSET, QSFP_DD_CHANNL_FLAGS_SUPPORT_WIDTH)
-                    flags_sup_data = ext_dd.parse_flags_capability(flags_sup_raw, 0)
-
-                    self.dom_tx_fault_supported = flags_sup_data['data']['tx_fault']['value'] == 'On'
-                    self.dom_rx_los_supported = flags_sup_data['data']['rx_los']['value'] == 'On'
-
-        else:
-            self.dom_supported = False
-            self.dom_temp_supported = False
-            self.dom_volt_supported = False
-            self.dom_rx_power_supported = False
-            self.dom_tx_power_supported = False
-
-    def _convert_string_to_num(self, value_str):
-        if "-inf" in value_str:
-            return 'N/A'
-        elif "Unknown" in value_str:
-            return 'N/A'
-        elif 'dBm' in value_str:
-            t_str = value_str.rstrip('dBm')
-            return float(t_str)
-        elif 'mA' in value_str:
-            t_str = value_str.rstrip('mA')
-            return float(t_str)
-        elif 'C' in value_str:
-            t_str = value_str.rstrip('C')
-            return float(t_str)
-        elif 'Volts' in value_str:
-            t_str = value_str.rstrip('Volts')
-            return float(t_str)
-        else:
-            return 'N/A'
-
-    def get_transceiver_info(self):
-        """
-        Retrieves transceiver info of this SFP
-
-        Returns:
-            A dict which contains following keys/values :
-        ================================================================================
-        keys                       |Value Format   |Information
-        ---------------------------|---------------|----------------------------
-        type                       |1*255VCHAR     |type of SFP
-        hardware_rev               |1*255VCHAR     |hardware version of SFP
-        serial                     |1*255VCHAR     |serial number of the SFP
-        manufacturer               |1*255VCHAR     |SFP vendor name
-        model                      |1*255VCHAR     |SFP model name
-        connector                  |1*255VCHAR     |connector information
-        encoding                   |1*255VCHAR     |encoding information
-        ext_identifier             |1*255VCHAR     |extend identifier
-        ext_rateselect_compliance  |1*255VCHAR     |extended rateSelect compliance
-        cable_length               |INT            |cable length in m
-        mominal_bit_rate           |INT            |nominal bit rate by 100Mbs
-        specification_compliance   |1*255VCHAR     |specification compliance
-        vendor_date                |1*255VCHAR     |vendor date
-        vendor_oui                 |1*255VCHAR     |vendor OUI
-        application_advertisement  |1*255VCHAR     |supported applications advertisement
-        ================================================================================
-        """
-        self.reinit()
-        info_dict_keys = [
-        'type', 'hardware_rev', 'serial', 'manufacturer',
-        'model', 'connector', 'encoding', 'ext_identifier',
-        'ext_rateselect_compliance', 'cable_type', 'cable_length',
-        'nominal_bit_rate', 'specification_compliance', 'vendor_date',
-        'vendor_oui', 'application_advertisement', 'type_abbrv_name']
-
-        transceiver_info_dict = {}
-        compliance_code_dict = {}
-        transceiver_info_dict = dict.fromkeys(info_dict_keys, "NA")
-        transceiver_info_dict["specification_compliance"] = '{}'
-        transceiver_info_dict['type_abbrv_name'] = self.abbrv
-
-        #QSFP
-        if self.sfp_type == QSFP_TYPE:
-            offset = 128
-            vendor_rev_width = XCVR_HW_REV_WIDTH_QSFP
-            interface_info_bulk_width = XCVR_INTFACE_BULK_WIDTH_QSFP
-
-            sfpi_obj = sff8436InterfaceId()
-            if sfpi_obj is None:
-                print("Error: sfp_object open failed")
-                return None
-
-            sfp_interface_bulk_raw = self._read_eeprom_specific_bytes(offset + XCVR_INTERFACE_DATA_START, XCVR_INTERFACE_DATA_SIZE)
-            if sfp_interface_bulk_raw is None:
-                return None
-
-            start = XCVR_INTFACE_BULK_OFFSET - XCVR_INTERFACE_DATA_START
-            end = start + interface_info_bulk_width
-            sfp_interface_bulk_data = sfpi_obj.parse_sfp_info_bulk(sfp_interface_bulk_raw[start : end], 0)
-
-            start = XCVR_VENDOR_NAME_OFFSET - XCVR_INTERFACE_DATA_START
-            end = start + XCVR_VENDOR_NAME_WIDTH
-            sfp_vendor_name_data = sfpi_obj.parse_vendor_name(sfp_interface_bulk_raw[start : end], 0)
-
-            start = XCVR_VENDOR_PN_OFFSET - XCVR_INTERFACE_DATA_START
-            end = start + XCVR_VENDOR_PN_WIDTH
-            sfp_vendor_pn_data = sfpi_obj.parse_vendor_pn(sfp_interface_bulk_raw[start : end], 0)
-
-            start = XCVR_HW_REV_OFFSET - XCVR_INTERFACE_DATA_START
-            end = start + vendor_rev_width
-            sfp_vendor_rev_data = sfpi_obj.parse_vendor_rev(sfp_interface_bulk_raw[start : end], 0)
-
-            start = XCVR_VENDOR_SN_OFFSET - XCVR_INTERFACE_DATA_START
-            end = start + XCVR_VENDOR_SN_WIDTH
-            sfp_vendor_sn_data = sfpi_obj.parse_vendor_sn(sfp_interface_bulk_raw[start : end], 0)
-
-            start = XCVR_VENDOR_OUI_OFFSET - XCVR_INTERFACE_DATA_START
-            end = start + XCVR_VENDOR_OUI_WIDTH
-            sfp_vendor_oui_data = sfpi_obj.parse_vendor_oui(sfp_interface_bulk_raw[start : end], 0)
-
-            start = XCVR_VENDOR_DATE_OFFSET - XCVR_INTERFACE_DATA_START
-            end = start + XCVR_VENDOR_DATE_WIDTH
-            sfp_vendor_date_data = sfpi_obj.parse_vendor_date(sfp_interface_bulk_raw[start : end], 0)
-
-            transceiver_info_dict['type'] = sfp_interface_bulk_data['data']['type']['value']
-            transceiver_info_dict['manufacturer'] = sfp_vendor_name_data['data']['Vendor Name']['value']
-            transceiver_info_dict['model'] = sfp_vendor_pn_data['data']['Vendor PN']['value']
-            transceiver_info_dict['hardware_rev'] = sfp_vendor_rev_data['data']['Vendor Rev']['value']
-            transceiver_info_dict['serial'] = sfp_vendor_sn_data['data']['Vendor SN']['value']
-            transceiver_info_dict['vendor_oui'] = sfp_vendor_oui_data['data']['Vendor OUI']['value']
-            transceiver_info_dict['vendor_date'] = sfp_vendor_date_data['data']['VendorDataCode(YYYY-MM-DD Lot)']['value']
-            transceiver_info_dict['connector'] = sfp_interface_bulk_data['data']['Connector']['value']
-            transceiver_info_dict['encoding'] = sfp_interface_bulk_data['data']['EncodingCodes']['value']
-            transceiver_info_dict['ext_identifier'] = sfp_interface_bulk_data['data']['Extended Identifier']['value']
-            transceiver_info_dict['ext_rateselect_compliance'] = sfp_interface_bulk_data['data']['RateIdentifier']['value']
-            transceiver_info_dict['application_advertisement'] = 'N/A'
-
-            for key in qsfp_cable_length_tup:
-                if key in sfp_interface_bulk_data['data']:
-                    transceiver_info_dict['cable_type'] = key
-                    transceiver_info_dict['cable_length'] = str(sfp_interface_bulk_data['data'][key]['value'])
-
-            for key in qsfp_compliance_code_tup:
-                if key in sfp_interface_bulk_data['data']['Specification compliance']['value']:
-                    compliance_code_dict[key] = sfp_interface_bulk_data['data']['Specification compliance']['value'][key]['value']
-            sfp_ext_specification_compliance_raw = self._read_eeprom_specific_bytes(offset + XCVR_EXT_SPECIFICATION_COMPLIANCE_OFFSET, XCVR_EXT_SPECIFICATION_COMPLIANCE_WIDTH)
-            if sfp_ext_specification_compliance_raw is not None:
-                sfp_ext_specification_compliance_data = sfpi_obj.parse_ext_specification_compliance(sfp_ext_specification_compliance_raw[0 : 1], 0)
-                if sfp_ext_specification_compliance_data['data']['Extended Specification compliance']['value'] != "Unspecified":
-                    compliance_code_dict['Extended Specification compliance'] = sfp_ext_specification_compliance_data['data']['Extended Specification compliance']['value']
-            transceiver_info_dict['specification_compliance'] = str(compliance_code_dict)
-            transceiver_info_dict['nominal_bit_rate'] = str(sfp_interface_bulk_data['data']['Nominal Bit Rate(100Mbs)']['value'])
-
-        #QSFP-DD
-        else:
-            offset = 128
-
-            sfpi_obj = qsfp_dd_InterfaceId()
-            if sfpi_obj is None:
-                print("Error: sfp_object open failed")
-                return None
-
-            sfp_type_raw = self._read_eeprom_specific_bytes((offset + QSFP_DD_TYPE_OFFSET), XCVR_TYPE_WIDTH)
-            if sfp_type_raw is not None:
-                sfp_type_data = sfpi_obj.parse_sfp_type(sfp_type_raw, 0)
-            else:
-                return None
-
-            sfp_vendor_name_raw = self._read_eeprom_specific_bytes((offset + QSFP_DD_VENDOR_NAME_OFFSET), XCVR_VENDOR_NAME_WIDTH)
-            if sfp_vendor_name_raw is not None:
-                sfp_vendor_name_data = sfpi_obj.parse_vendor_name(sfp_vendor_name_raw, 0)
-            else:
-                return None
-
-            sfp_vendor_pn_raw = self._read_eeprom_specific_bytes((offset + QSFP_DD_VENDOR_PN_OFFSET), XCVR_VENDOR_PN_WIDTH)
-            if sfp_vendor_pn_raw is not None:
-                sfp_vendor_pn_data = sfpi_obj.parse_vendor_pn(sfp_vendor_pn_raw, 0)
-            else:
-                return None
-
-            sfp_vendor_rev_raw = self._read_eeprom_specific_bytes((offset + XCVR_HW_REV_OFFSET_QSFP_DD), XCVR_HW_REV_WIDTH_QSFP_DD)
-            if sfp_vendor_rev_raw is not None:
-                sfp_vendor_rev_data = sfpi_obj.parse_vendor_rev(sfp_vendor_rev_raw, 0)
-            else:
-                return None
-
-            sfp_vendor_sn_raw = self._read_eeprom_specific_bytes((offset + QSFP_DD_VENDOR_SN_OFFSET), XCVR_VENDOR_SN_WIDTH)
-            if sfp_vendor_sn_raw is not None:
-                sfp_vendor_sn_data = sfpi_obj.parse_vendor_sn(sfp_vendor_sn_raw, 0)
-            else:
-                return None
-
-            sfp_vendor_oui_raw = self._read_eeprom_specific_bytes((offset + QSFP_DD_VENDOR_OUI_OFFSET), XCVR_VENDOR_OUI_WIDTH)
-            if sfp_vendor_oui_raw is not None:
-                sfp_vendor_oui_data = sfpi_obj.parse_vendor_oui(sfp_vendor_oui_raw, 0)
-            else:
-                return None
-
-            sfp_vendor_date_raw = self._read_eeprom_specific_bytes((offset + XCVR_VENDOR_DATE_OFFSET_QSFP_DD), XCVR_VENDOR_DATE_WIDTH_QSFP_DD)
-            if sfp_vendor_date_raw is not None:
-                sfp_vendor_date_data = sfpi_obj.parse_vendor_date(sfp_vendor_date_raw, 0)
-            else:
-                return None
-
-            sfp_connector_raw = self._read_eeprom_specific_bytes((offset + XCVR_CONNECTOR_OFFSET_QSFP_DD), XCVR_CONNECTOR_WIDTH_QSFP_DD)
-            if sfp_connector_raw is not None:
-                sfp_connector_data = sfpi_obj.parse_connector(sfp_connector_raw, 0)
-            else:
-                return None
-
-            sfp_ext_identifier_raw = self._read_eeprom_specific_bytes((offset + XCVR_EXT_TYPE_OFFSET_QSFP_DD), XCVR_EXT_TYPE_WIDTH_QSFP_DD)
-            if sfp_ext_identifier_raw is not None:
-                sfp_ext_identifier_data = sfpi_obj.parse_ext_iden(sfp_ext_identifier_raw, 0)
-            else:
-                return None
-
-            sfp_cable_len_raw = self._read_eeprom_specific_bytes((offset + XCVR_CABLE_LENGTH_OFFSET_QSFP_DD), XCVR_CABLE_LENGTH_WIDTH_QSFP_DD)
-            if sfp_cable_len_raw is not None:
-                sfp_cable_len_data = sfpi_obj.parse_cable_len(sfp_cable_len_raw, 0)
-            else:
-                return None
-
-            sfp_media_type_raw = self._read_eeprom_specific_bytes(XCVR_MEDIA_TYPE_OFFSET_QSFP_DD, XCVR_MEDIA_TYPE_WIDTH_QSFP_DD)
-            if sfp_media_type_raw is not None:
-                sfp_media_type_dict = sfpi_obj.parse_media_type(sfp_media_type_raw, 0)
-                if sfp_media_type_dict is None:
-                    return None
-
-                transceiver_info_dict['specification_compliance'] = type_of_media_interface[sfp_media_type_raw[0]]
-                host_media_list = ""
-                sfp_application_type_first_list = self._read_eeprom_specific_bytes((XCVR_FIRST_APPLICATION_LIST_OFFSET_QSFP_DD), XCVR_FIRST_APPLICATION_LIST_WIDTH_QSFP_DD)
-                possible_application_count = 8
-                if sfp_application_type_first_list is not None:
-                    sfp_application_type_list = sfp_application_type_first_list
-                else:
-                    return None
-
-                for i in range(0, possible_application_count):
-                    if sfp_application_type_list[i * 4] == 'ff':
-                        break
-                    host_electrical, media_interface = sfpi_obj.parse_application(sfp_media_type_dict, sfp_application_type_list[i * 4], sfp_application_type_list[i * 4 + 1])
-                    host_media_list = host_media_list + host_electrical + ' - ' + media_interface + '\n\t\t\t\t   '
-            else:
-                return None
-
-            transceiver_info_dict['type'] = str(sfp_type_data['data']['type']['value'])
-            transceiver_info_dict['manufacturer'] = str(sfp_vendor_name_data['data']['Vendor Name']['value'])
-            transceiver_info_dict['model'] = str(sfp_vendor_pn_data['data']['Vendor PN']['value'])
-            transceiver_info_dict['hardware_rev'] = str(sfp_vendor_rev_data['data']['Vendor Rev']['value'])
-            transceiver_info_dict['serial'] = str(sfp_vendor_sn_data['data']['Vendor SN']['value'])
-            transceiver_info_dict['vendor_oui'] = str(sfp_vendor_oui_data['data']['Vendor OUI']['value'])
-            transceiver_info_dict['vendor_date'] = str(sfp_vendor_date_data['data']['VendorDataCode(YYYY-MM-DD Lot)']['value'])
-            transceiver_info_dict['connector'] = str(sfp_connector_data['data']['Connector']['value'])
-            transceiver_info_dict['encoding'] = "Not supported for CMIS cables"
-            transceiver_info_dict['ext_identifier'] = str(sfp_ext_identifier_data['data']['Extended Identifier']['value'])
-            transceiver_info_dict['ext_rateselect_compliance'] = "Not supported for CMIS cables"
-            transceiver_info_dict['cable_type'] = "Length Cable Assembly(m)"
-            transceiver_info_dict['cable_length'] = str(sfp_cable_len_data['data']['Length Cable Assembly(m)']['value'])
-            transceiver_info_dict['nominal_bit_rate'] = "Not supported for CMIS cables"
-            transceiver_info_dict['application_advertisement'] = host_media_list
-
-        return transceiver_info_dict
-
-    def get_transceiver_bulk_status(self):
-        """
-        Retrieves transceiver bulk status of this SFP
-
-        Returns:
-            A dict which contains following keys/values :
-        ========================================================================
-        keys                       |Value Format   |Information
-        ---------------------------|---------------|----------------------------
-        RX LOS                     |BOOLEAN        |RX lost-of-signal status,
-                                   |               |True if has RX los, False if not.
-        TX FAULT                   |BOOLEAN        |TX fault status,
-                                   |               |True if has TX fault, False if not.
-        Reset status               |BOOLEAN        |reset status,
-                                   |               |True if SFP in reset, False if not.
-        LP mode                    |BOOLEAN        |low power mode status,
-                                   |               |True in lp mode, False if not.
-        TX disable                 |BOOLEAN        |TX disable status,
-                                   |               |True TX disabled, False if not.
-        TX disabled channel        |HEX            |disabled TX channles in hex,
-                                   |               |bits 0 to 3 represent channel 0
-                                   |               |to channel 3.
-        Temperature                |INT            |module temperature in Celsius
-        Voltage                    |INT            |supply voltage in mV
-        TX bias                    |INT            |TX Bias Current in mA
-        RX power                   |INT            |received optical power in mW
-        TX power                   |INT            |TX output power in mW
-        ========================================================================
-        """
-        self.reinit()
-        transceiver_dom_info_dict = {}
-
-        dom_info_dict_keys = ['temperature',    'voltage',
-                              'rx1power',       'rx2power',
-                              'rx3power',       'rx4power',
-                              'rx5power',       'rx6power',
-                              'rx7power',       'rx8power',
-                              'tx1bias',        'tx2bias',
-                              'tx3bias',        'tx4bias',
-                              'tx5bias',        'tx6bias',
-                              'tx7bias',        'tx8bias',
-                              'tx1power',       'tx2power',
-                              'tx3power',       'tx4power',
-                              'tx5power',       'tx6power',
-                              'tx7power',       'tx8power'
-                             ]
-        transceiver_dom_info_dict = dict.fromkeys(dom_info_dict_keys, 'N/A')
-
-        #QSFP
-        if self.sfp_type == QSFP_TYPE:
-            if not self.dom_supported:
-                return transceiver_dom_info_dict
-
-            offset = 0
-            sfpd_obj = sff8436Dom()
-            if sfpd_obj is None:
-                return transceiver_dom_info_dict
-
-            dom_data_raw = self._read_eeprom_specific_bytes((offset + QSFP_DOM_BULK_DATA_START), QSFP_DOM_BULK_DATA_SIZE)
-            if dom_data_raw is None:
-                return transceiver_dom_info_dict
-
-            if self.dom_module_monitor_supported:
-                if self.dom_temp_supported:
-                    start = QSFP_TEMPE_OFFSET - QSFP_DOM_BULK_DATA_START
-                    end = start + QSFP_TEMPE_WIDTH
-                    dom_temperature_data = sfpd_obj.parse_temperature(dom_data_raw[start : end], 0)
-                    temp = self._convert_string_to_num(dom_temperature_data['data']['Temperature']['value'])
-                    if temp is not None:
-                        transceiver_dom_info_dict['temperature'] = temp
-
-                if self.dom_volt_supported:
-                    start = QSFP_VOLT_OFFSET - QSFP_DOM_BULK_DATA_START
-                    end = start + QSFP_VOLT_WIDTH
-                    dom_voltage_data = sfpd_obj.parse_voltage(dom_data_raw[start : end], 0)
-                    volt = self._convert_string_to_num(dom_voltage_data['data']['Vcc']['value'])
-                    if volt is not None:
-                        transceiver_dom_info_dict['voltage'] = volt
-            if self.dom_channel_monitor_supported:
-                start = QSFP_CHANNL_MON_OFFSET - QSFP_DOM_BULK_DATA_START
-                end = start + QSFP_CHANNL_MON_WITH_TX_POWER_WIDTH
-                dom_channel_monitor_data = sfpd_obj.parse_channel_monitor_params_with_tx_power(dom_data_raw[start : end], 0)
-
-                if self.dom_tx_power_supported:
-                    transceiver_dom_info_dict['tx1bias'] = dom_channel_monitor_data['data']['TX1Bias']['value']
-                    transceiver_dom_info_dict['tx2bias'] = dom_channel_monitor_data['data']['TX2Bias']['value']
-                    transceiver_dom_info_dict['tx3bias'] = dom_channel_monitor_data['data']['TX3Bias']['value']
-                    transceiver_dom_info_dict['tx4bias'] = dom_channel_monitor_data['data']['TX4Bias']['value']
-                    transceiver_dom_info_dict['tx1power'] = self._convert_string_to_num(dom_channel_monitor_data['data']['TX1Power']['value'])
-                    transceiver_dom_info_dict['tx2power'] = self._convert_string_to_num(dom_channel_monitor_data['data']['TX2Power']['value'])
-                    transceiver_dom_info_dict['tx3power'] = self._convert_string_to_num(dom_channel_monitor_data['data']['TX3Power']['value'])
-                    transceiver_dom_info_dict['tx4power'] = self._convert_string_to_num(dom_channel_monitor_data['data']['TX4Power']['value'])
-
-                if self.dom_rx_power_supported:
-                    transceiver_dom_info_dict['rx1power'] = self._convert_string_to_num(dom_channel_monitor_data['data']['RX1Power']['value'])
-                    transceiver_dom_info_dict['rx2power'] = self._convert_string_to_num(dom_channel_monitor_data['data']['RX2Power']['value'])
-                    transceiver_dom_info_dict['rx3power'] = self._convert_string_to_num(dom_channel_monitor_data['data']['RX3Power']['value'])
-                    transceiver_dom_info_dict['rx4power'] = self._convert_string_to_num(dom_channel_monitor_data['data']['RX4Power']['value'])
-
-
-        #QSFP-DD
-        else:
-            sfpd_obj = qsfp_dd_Dom()
-            if sfpd_obj is None:
-                return transceiver_dom_info_dict
-
-            if self.dom_module_monitor_supported:
-
-                if self.dom_temp_supported:
-                    offset = 0
-                    dom_data_raw = self._read_eeprom_specific_bytes((offset + QSFP_DD_TEMPE_OFFSET), QSFP_DD_TEMPE_WIDTH)
-                    dom_temperature_data = sfpd_obj.parse_temperature(dom_data_raw, 0)
-                    temp = self._convert_string_to_num(dom_temperature_data['data']['Temperature']['value'])
-                    if temp is not None:
-                        transceiver_dom_info_dict['temperature'] = temp
-
-                if self.dom_volt_supported:
-                    offset = 0
-                    dom_data_raw = self._read_eeprom_specific_bytes((offset + QSFP_DD_VOLT_OFFSET), QSFP_DD_VOLT_WIDTH)
-                    dom_voltage_data = sfpd_obj.parse_voltage(dom_data_raw, 0)
-                    volt = self._convert_string_to_num(dom_voltage_data['data']['Vcc']['value'])
-                    if volt is not None:
-                        transceiver_dom_info_dict['voltage'] = volt
-            if self.dom_channel_monitor_supported:
-
-                offset = 768
-                dom_data_raw = self._read_eeprom_specific_bytes(offset + (QSFP_DD_CHANNL_MON_OFFSET - 128), QSFP_DD_CHANNL_MON_WIDTH)
-                dom_channel_monitor_data =  sfpd_obj.parse_channel_monitor_params(dom_data_raw, 0)
-                if self.dom_tx_power_supported:
-                    transceiver_dom_info_dict['tx1power'] = dom_channel_monitor_data['data']['TX1Power']['value']
-                    transceiver_dom_info_dict['tx2power'] = dom_channel_monitor_data['data']['TX2Power']['value']
-                    transceiver_dom_info_dict['tx3power'] = dom_channel_monitor_data['data']['TX3Power']['value']
-                    transceiver_dom_info_dict['tx4power'] = dom_channel_monitor_data['data']['TX4Power']['value']
-                    transceiver_dom_info_dict['tx5power'] = dom_channel_monitor_data['data']['TX5Power']['value']
-                    transceiver_dom_info_dict['tx6power'] = dom_channel_monitor_data['data']['TX6Power']['value']
-                    transceiver_dom_info_dict['tx7power'] = dom_channel_monitor_data['data']['TX7Power']['value']
-                    transceiver_dom_info_dict['tx8power'] = dom_channel_monitor_data['data']['TX8Power']['value']
-
-                if self.dom_rx_power_supported:
-                    transceiver_dom_info_dict['rx1power'] = dom_channel_monitor_data['data']['RX1Power']['value']
-                    transceiver_dom_info_dict['rx2power'] = dom_channel_monitor_data['data']['RX2Power']['value']
-                    transceiver_dom_info_dict['rx3power'] = dom_channel_monitor_data['data']['RX3Power']['value']
-                    transceiver_dom_info_dict['rx4power'] = dom_channel_monitor_data['data']['RX4Power']['value']
-                    transceiver_dom_info_dict['rx5power'] = dom_channel_monitor_data['data']['RX5Power']['value']
-                    transceiver_dom_info_dict['rx6power'] = dom_channel_monitor_data['data']['RX6Power']['value']
-                    transceiver_dom_info_dict['rx7power'] = dom_channel_monitor_data['data']['RX7Power']['value']
-                    transceiver_dom_info_dict['rx8power'] = dom_channel_monitor_data['data']['RX8Power']['value']
-
-                if self.dom_tx_bias_supported:
-                    transceiver_dom_info_dict['tx1bias'] = dom_channel_monitor_data['data']['TX1Bias']['value']
-                    transceiver_dom_info_dict['tx2bias'] = dom_channel_monitor_data['data']['TX2Bias']['value']
-                    transceiver_dom_info_dict['tx3bias'] = dom_channel_monitor_data['data']['TX3Bias']['value']
-                    transceiver_dom_info_dict['tx4bias'] = dom_channel_monitor_data['data']['TX4Bias']['value']
-                    transceiver_dom_info_dict['tx5bias'] = dom_channel_monitor_data['data']['TX5Bias']['value']
-                    transceiver_dom_info_dict['tx6bias'] = dom_channel_monitor_data['data']['TX6Bias']['value']
-                    transceiver_dom_info_dict['tx7bias'] = dom_channel_monitor_data['data']['TX7Bias']['value']
-                    transceiver_dom_info_dict['tx8bias'] = dom_channel_monitor_data['data']['TX8Bias']['value']
-
-        return transceiver_dom_info_dict
-
-    def get_transceiver_threshold_info(self):
-        """
-        Retrieves transceiver threshold info of this SFP
-
-        Returns:
-            A dict which contains following keys/values :
-        ========================================================================
-        keys                       |Value Format   |Information
-        ---------------------------|---------------|----------------------------
-        temphighalarm              |FLOAT          |High Alarm Threshold value of temperature in Celsius.
-        templowalarm               |FLOAT          |Low Alarm Threshold value of temperature in Celsius.
-        temphighwarning            |FLOAT          |High Warning Threshold value of temperature in Celsius.
-        templowwarning             |FLOAT          |Low Warning Threshold value of temperature in Celsius.
-        vcchighalarm               |FLOAT          |High Alarm Threshold value of supply voltage in mV.
-        vcclowalarm                |FLOAT          |Low Alarm Threshold value of supply voltage in mV.
-        vcchighwarning             |FLOAT          |High Warning Threshold value of supply voltage in mV.
-        vcclowwarning              |FLOAT          |Low Warning Threshold value of supply voltage in mV.
-        rxpowerhighalarm           |FLOAT          |High Alarm Threshold value of received power in dBm.
-        rxpowerlowalarm            |FLOAT          |Low Alarm Threshold value of received power in dBm.
-        rxpowerhighwarning         |FLOAT          |High Warning Threshold value of received power in dBm.
-        rxpowerlowwarning          |FLOAT          |Low Warning Threshold value of received power in dBm.
-        txpowerhighalarm           |FLOAT          |High Alarm Threshold value of transmit power in dBm.
-        txpowerlowalarm            |FLOAT          |Low Alarm Threshold value of transmit power in dBm.
-        txpowerhighwarning         |FLOAT          |High Warning Threshold value of transmit power in dBm.
-        txpowerlowwarning          |FLOAT          |Low Warning Threshold value of transmit power in dBm.
-        txbiashighalarm            |FLOAT          |High Alarm Threshold value of tx Bias Current in mA.
-        txbiaslowalarm             |FLOAT          |Low Alarm Threshold value of tx Bias Current in mA.
-        txbiashighwarning          |FLOAT          |High Warning Threshold value of tx Bias Current in mA.
-        txbiaslowwarning           |FLOAT          |Low Warning Threshold value of tx Bias Current in mA.
-        ========================================================================
-        """
-        self.reinit()
-        transceiver_dom_threshold_info_dict = {}
-
-        dom_info_dict_keys = ['temphighalarm',    'temphighwarning',
-                              'templowalarm',     'templowwarning',
-                              'vcchighalarm',     'vcchighwarning',
-                              'vcclowalarm',      'vcclowwarning',
-                              'rxpowerhighalarm', 'rxpowerhighwarning',
-                              'rxpowerlowalarm',  'rxpowerlowwarning',
-                              'txpowerhighalarm', 'txpowerhighwarning',
-                              'txpowerlowalarm',  'txpowerlowwarning',
-                              'txbiashighalarm',  'txbiashighwarning',
-                              'txbiaslowalarm',   'txbiaslowwarning'
-                             ]
-        transceiver_dom_threshold_info_dict = dict.fromkeys(dom_info_dict_keys, 'N/A')
-
-        #QSFP
-        if self.sfp_type == QSFP_TYPE:
-            if not self.dom_supported or not self.qsfp_page3_available:
-                return transceiver_dom_threshold_info_dict
-
-            offset = 512
-            sfpd_obj = sff8436Dom()
-            if sfpd_obj is None:
-                return transceiver_dom_threshold_info_dict
-
-            dom_module_threshold_raw = self._read_eeprom_specific_bytes((offset + QSFP_MODULE_THRESHOLD_OFFSET), QSFP_MODULE_THRESHOLD_WIDTH)
-            if dom_module_threshold_raw is None:
-                return transceiver_dom_threshold_info_dict
-
-            dom_module_threshold_data = sfpd_obj.parse_module_threshold_values(dom_module_threshold_raw, 0)
-
-            dom_channel_threshold_raw = self._read_eeprom_specific_bytes((offset + QSFP_CHANNL_THRESHOLD_OFFSET),
-                                      QSFP_CHANNL_THRESHOLD_WIDTH)
-            if dom_channel_threshold_raw is None:
-                return transceiver_dom_threshold_info_dict
-            dom_channel_threshold_data = sfpd_obj.parse_channel_threshold_values(dom_channel_threshold_raw, 0)
-
-            # Threshold Data
-            if self.dom_module_threshold_supported:
-                transceiver_dom_threshold_info_dict['temphighalarm'] = dom_module_threshold_data['data']['TempHighAlarm']['value']
-                transceiver_dom_threshold_info_dict['temphighwarning'] = dom_module_threshold_data['data']['TempHighWarning']['value']
-                transceiver_dom_threshold_info_dict['templowalarm'] = dom_module_threshold_data['data']['TempLowAlarm']['value']
-                transceiver_dom_threshold_info_dict['templowwarning'] = dom_module_threshold_data['data']['TempLowWarning']['value']
-                transceiver_dom_threshold_info_dict['vcchighalarm'] = dom_module_threshold_data['data']['VccHighAlarm']['value']
-                transceiver_dom_threshold_info_dict['vcchighwarning'] = dom_module_threshold_data['data']['VccHighWarning']['value']
-                transceiver_dom_threshold_info_dict['vcclowalarm'] = dom_module_threshold_data['data']['VccLowAlarm']['value']
-                transceiver_dom_threshold_info_dict['vcclowwarning'] = dom_module_threshold_data['data']['VccLowWarning']['value']
-            if self.dom_channel_threshold_supported:
-                transceiver_dom_threshold_info_dict['rxpowerhighalarm'] = dom_channel_threshold_data['data']['RxPowerHighAlarm']['value']
-                transceiver_dom_threshold_info_dict['rxpowerhighwarning'] = dom_channel_threshold_data['data']['RxPowerHighWarning']['value']
-                transceiver_dom_threshold_info_dict['rxpowerlowalarm'] = dom_channel_threshold_data['data']['RxPowerLowAlarm']['value']
-                transceiver_dom_threshold_info_dict['rxpowerlowwarning'] = dom_channel_threshold_data['data']['RxPowerLowWarning']['value']
-                transceiver_dom_threshold_info_dict['txbiashighalarm'] = dom_channel_threshold_data['data']['TxBiasHighAlarm']['value']
-                transceiver_dom_threshold_info_dict['txbiashighwarning'] = dom_channel_threshold_data['data']['TxBiasHighWarning']['value']
-                transceiver_dom_threshold_info_dict['txbiaslowalarm'] = dom_channel_threshold_data['data']['TxBiasLowAlarm']['value']
-                transceiver_dom_threshold_info_dict['txbiaslowwarning'] = dom_channel_threshold_data['data']['TxBiasLowWarning']['value']
-                transceiver_dom_threshold_info_dict['txpowerhighalarm'] = dom_channel_threshold_data['data']['TxPowerHighAlarm']['value']
-                transceiver_dom_threshold_info_dict['txpowerhighwarning'] = dom_channel_threshold_data['data']['TxPowerHighWarning']['value']
-                transceiver_dom_threshold_info_dict['txpowerlowalarm'] = dom_channel_threshold_data['data']['TxPowerLowAlarm']['value']
-                transceiver_dom_threshold_info_dict['txpowerlowwarning'] = dom_channel_threshold_data['data']['TxPowerLowWarning']['value']
-
-        #QSFP-DD
-        else:
-            if not self.dom_supported:
-                return transceiver_dom_threshold_info_dict
-
-            if not self.dom_thresholds_supported:
-                return transceiver_dom_threshold_info_dict
-
-            sfpd_obj = qsfp_dd_Dom()
-            if sfpd_obj is None:
-                return transceiver_dom_threshold_info_dict
-
-            # page 02 (we put page 2 to byte 384~511)
-            offset = 384
-            dom_module_threshold_raw = self._read_eeprom_specific_bytes((offset + QSFP_DD_MODULE_THRESHOLD_OFFSET), QSFP_DD_MODULE_THRESHOLD_WIDTH)
-            if dom_module_threshold_raw is None:
-                return transceiver_dom_threshold_info_dict
-
-            dom_module_threshold_data = sfpd_obj.parse_module_threshold_values(dom_module_threshold_raw, 0)
-
-            # Threshold Data
-            if self.dom_module_threshold_supported:
-                transceiver_dom_threshold_info_dict['temphighalarm'] = dom_module_threshold_data['data']['TempHighAlarm']['value']
-                transceiver_dom_threshold_info_dict['temphighwarning'] = dom_module_threshold_data['data']['TempHighWarning']['value']
-                transceiver_dom_threshold_info_dict['templowalarm'] = dom_module_threshold_data['data']['TempLowAlarm']['value']
-                transceiver_dom_threshold_info_dict['templowwarning'] = dom_module_threshold_data['data']['TempLowWarning']['value']
-                transceiver_dom_threshold_info_dict['vcchighalarm'] = dom_module_threshold_data['data']['VccHighAlarm']['value']
-                transceiver_dom_threshold_info_dict['vcchighwarning'] = dom_module_threshold_data['data']['VccHighWarning']['value']
-                transceiver_dom_threshold_info_dict['vcclowalarm'] = dom_module_threshold_data['data']['VccLowAlarm']['value']
-                transceiver_dom_threshold_info_dict['vcclowwarning'] = dom_module_threshold_data['data']['VccLowWarning']['value']
-            if self.dom_channel_threshold_supported:
-                transceiver_dom_threshold_info_dict['rxpowerhighalarm'] = dom_module_threshold_data['data']['RxPowerHighAlarm']['value']
-                transceiver_dom_threshold_info_dict['rxpowerhighwarning'] = dom_module_threshold_data['data']['RxPowerHighWarning']['value']
-                transceiver_dom_threshold_info_dict['rxpowerlowalarm'] = dom_module_threshold_data['data']['RxPowerLowAlarm']['value']
-                transceiver_dom_threshold_info_dict['rxpowerlowwarning'] = dom_module_threshold_data['data']['RxPowerLowWarning']['value']
-                transceiver_dom_threshold_info_dict['txbiashighalarm'] = dom_module_threshold_data['data']['TxBiasHighAlarm']['value']
-                transceiver_dom_threshold_info_dict['txbiashighwarning'] = dom_module_threshold_data['data']['TxBiasHighWarning']['value']
-                transceiver_dom_threshold_info_dict['txbiaslowalarm'] = dom_module_threshold_data['data']['TxBiasLowAlarm']['value']
-                transceiver_dom_threshold_info_dict['txbiaslowwarning'] = dom_module_threshold_data['data']['TxBiasLowWarning']['value']
-                transceiver_dom_threshold_info_dict['txpowerhighalarm'] = dom_module_threshold_data['data']['TxPowerHighAlarm']['value']
-                transceiver_dom_threshold_info_dict['txpowerhighwarning'] = dom_module_threshold_data['data']['TxPowerHighWarning']['value']
-                transceiver_dom_threshold_info_dict['txpowerlowalarm'] = dom_module_threshold_data['data']['TxPowerLowAlarm']['value']
-                transceiver_dom_threshold_info_dict['txpowerlowwarning'] = dom_module_threshold_data['data']['TxPowerLowWarning']['value']
-
-        return transceiver_dom_threshold_info_dict
+        return presence == True
 
     def get_reset_status(self):
         """
@@ -1210,428 +159,6 @@ def get_reset_status(self):
         # SFP doesn't support this feature
         return False
 
-    def get_rx_los(self):
-        """
-        Retrieves the RX LOS (lost-of-signal) status of SFP
-
-        Returns:
-            A Boolean, True if SFP has RX LOS, False if not.
-            Note : RX LOS status is latched until a call to get_rx_los or a reset.
-        """
-        if not self.dom_supported:
-            return None
-
-        rx_los_list = []
-        #QSFP
-        if self.sfp_type == QSFP_TYPE:
-            offset = 0
-            dom_channel_monitor_raw = self._read_eeprom_specific_bytes((offset + QSFP_CHANNL_RX_LOS_STATUS_OFFSET), QSFP_CHANNL_RX_LOS_STATUS_WIDTH)
-            if dom_channel_monitor_raw is not None:
-                rx_los_data = int(dom_channel_monitor_raw[0], 16)
-                rx_los_list.append(rx_los_data & 0x01 != 0)
-                rx_los_list.append(rx_los_data & 0x02 != 0)
-                rx_los_list.append(rx_los_data & 0x04 != 0)
-                rx_los_list.append(rx_los_data & 0x08 != 0)
-
-        #QSFP-DD
-        else:
-            # page 11h (we put page 11 to byte 768~895)
-            if self.dom_rx_los_supported:
-                offset = 768
-                dom_channel_monitor_raw = self._read_eeprom_specific_bytes((offset + QSFP_DD_CHANNL_RX_LOS_STATUS_OFFSET), QSFP_DD_CHANNL_RX_LOS_STATUS_WIDTH)
-                if dom_channel_monitor_raw is not None:
-                    rx_los_data = int(dom_channel_monitor_raw[0], 16)
-                    rx_los_list.append(rx_los_data & 0x01 != 0)
-                    rx_los_list.append(rx_los_data & 0x02 != 0)
-                    rx_los_list.append(rx_los_data & 0x04 != 0)
-                    rx_los_list.append(rx_los_data & 0x08 != 0)
-                    rx_los_list.append(rx_los_data & 0x10 != 0)
-                    rx_los_list.append(rx_los_data & 0x20 != 0)
-                    rx_los_list.append(rx_los_data & 0x40 != 0)
-                    rx_los_list.append(rx_los_data & 0x80 != 0)
-
-        return rx_los_list
-
-    def get_tx_fault(self):
-        """
-        Retrieves the TX fault status of SFP
-
-        Returns:
-            A Boolean, True if SFP has TX fault, False if not
-            Note : TX fault status is lached until a call to get_tx_fault or a reset.
-        """
-        self.reinit()
-        if not self.dom_supported:
-            return None
-
-        tx_fault_list = []
-        #QSFP
-        if self.sfp_type == QSFP_TYPE:
-            offset = 0
-            dom_channel_monitor_raw = self._read_eeprom_specific_bytes((offset + QSFP_CHANNL_TX_FAULT_STATUS_OFFSET), QSFP_CHANNL_TX_FAULT_STATUS_WIDTH)
-            if dom_channel_monitor_raw is not None:
-                tx_fault_data = int(dom_channel_monitor_raw[0], 16)
-                tx_fault_list.append(tx_fault_data & 0x01 != 0)
-                tx_fault_list.append(tx_fault_data & 0x02 != 0)
-                tx_fault_list.append(tx_fault_data & 0x04 != 0)
-                tx_fault_list.append(tx_fault_data & 0x08 != 0)
-
-        #QSFP-DD
-        else:
-            # page 11h (we put page 11 to byte 768~895)
-            if self.dom_tx_fault_supported:
-                offset = 768
-                dom_channel_monitor_raw = self._read_eeprom_specific_bytes((offset + QSFP_DD_CHANNL_TX_FAULT_STATUS_OFFSET), QSFP_DD_CHANNL_TX_FAULT_STATUS_WIDTH)
-                if dom_channel_monitor_raw is not None:
-                    tx_fault_data = int(dom_channel_monitor_raw[0], 16)
-                    tx_fault_list.append(tx_fault_data & 0x01 != 0)
-                    tx_fault_list.append(tx_fault_data & 0x02 != 0)
-                    tx_fault_list.append(tx_fault_data & 0x04 != 0)
-                    tx_fault_list.append(tx_fault_data & 0x08 != 0)
-                    tx_fault_list.append(tx_fault_data & 0x10 != 0)
-                    tx_fault_list.append(tx_fault_data & 0x20 != 0)
-                    tx_fault_list.append(tx_fault_data & 0x40 != 0)
-                    tx_fault_list.append(tx_fault_data & 0x80 != 0)
-
-        return tx_fault_list
-
-    def get_tx_disable(self):
-        """
-        Retrieves the tx_disable status of this SFP
-
-        Returns:
-            A Boolean, True if tx_disable is enabled, False if disabled
-
-        for QSFP, the disable states of each channel which are the lower 4 bits in byte 85 page a0
-        for SFP, the TX Disable State and Soft TX Disable Select is ORed as the tx_disable status returned
-                 These two bits are bit 7 & 6 in byte 110 page a2 respectively
-        """
-        self.reinit()
-        if not self.dom_supported:
-            return None
-
-        tx_disable_list = []
-        #QSFP
-        if self.sfp_type == QSFP_TYPE:
-            offset = 0
-            dom_channel_monitor_raw = self._read_eeprom_specific_bytes((offset + QSFP_CHANNL_DISABLE_STATUS_OFFSET), QSFP_CHANNL_DISABLE_STATUS_WIDTH)
-            if dom_channel_monitor_raw is not None:
-                tx_disable_data = int(dom_channel_monitor_raw[0], 16)
-                tx_disable_list.append(tx_disable_data & 0x01 != 0)
-                tx_disable_list.append(tx_disable_data & 0x02 != 0)
-                tx_disable_list.append(tx_disable_data & 0x04 != 0)
-                tx_disable_list.append(tx_disable_data & 0x08 != 0)
-
-        #QSFP-DD
-        else:
-            # page 10h (we put page 10 to byte 640~767)
-            offset = 640
-            dom_channel_monitor_raw = self._read_eeprom_specific_bytes((offset + QSFP_DD_CHANNL_DISABLE_STATUS_OFFSET), QSFP_DD_CHANNL_DISABLE_STATUS_WIDTH)
-            if dom_channel_monitor_raw is not None:
-                tx_disable_data = int(dom_channel_monitor_raw[0], 16)
-                tx_disable_list.append(tx_disable_data & 0x01 != 0)
-                tx_disable_list.append(tx_disable_data & 0x02 != 0)
-                tx_disable_list.append(tx_disable_data & 0x04 != 0)
-                tx_disable_list.append(tx_disable_data & 0x08 != 0)
-                tx_disable_list.append(tx_disable_data & 0x10 != 0)
-                tx_disable_list.append(tx_disable_data & 0x20 != 0)
-                tx_disable_list.append(tx_disable_data & 0x40 != 0)
-                tx_disable_list.append(tx_disable_data & 0x80 != 0)
-
-        return tx_disable_list
-
-    def get_tx_disable_channel(self):
-        """
-        Retrieves the TX disabled channels in this SFP
-        Returns:
-            A hex of 4 bits (bit 0 to bit 3 as channel 0 to channel 3) to represent
-            TX channels which have been disabled in this SFP.
-            As an example, a returned value of 0x5 indicates that channel 0
-            and channel 2 have been disabled.
-        """
-        # SFP doesn't support this feature
-        return 0
-
-    def get_lpmode(self):
-        """
-        Retrieves the lpmode (low power mode) status of this SFP
-        Returns:
-            A Boolean, True if lpmode is enabled, False if disabled
-        """
-        lpmode = False
-        try:
-            if self.index < 16:
-                lpmode_path=self.LPMODE_1_16_PATH.format(self.port_num)
-            else:
-                lpmode_path=self.LPMODE_17_32_PATH.format(self.port_num)
-            with open(lpmode_path, 'r') as sfp_lpmode:
-                lpmode = int(sfp_lpmode.read(), 16)
-        except IOError:
-            return False
-        return lpmode == 1
-
-    def get_power_override(self):
-        """
-        Retrieves the power-override status of this SFP
-        Returns:
-            A Boolean, True if power-override is enabled, False if disabled
-        """
-        # SFP doesn't support this feature
-        return False
-
-    def get_temperature(self):
-        """
-        Retrieves the temperature of this SFP
-
-        Returns:
-            An integer number of current temperature in Celsius
-        """
-        self.reinit()
-        if not self.dom_supported:
-            return None
-        #QSFP
-        if self.sfp_type == QSFP_TYPE:
-            offset = 0
-
-            sfpd_obj = sff8436Dom()
-            if sfpd_obj is None:
-                return None
-
-            if self.dom_temp_supported:
-                dom_temperature_raw = self._read_eeprom_specific_bytes((offset + QSFP_TEMPE_OFFSET), QSFP_TEMPE_WIDTH)
-                if dom_temperature_raw is not None:
-                    dom_temperature_data = sfpd_obj.parse_temperature(dom_temperature_raw, 0)
-                    temp = self._convert_string_to_num(dom_temperature_data['data']['Temperature']['value'])
-                    return temp
-                else:
-                    return None
-            else:
-                return None
-
-        #QSFP-DD
-        else:
-            offset = 0
-
-            sfpd_obj = qsfp_dd_Dom()
-            if sfpd_obj is None:
-                return None
-
-            if self.dom_temp_supported:
-                dom_temperature_raw = self._read_eeprom_specific_bytes((offset + QSFP_DD_TEMPE_OFFSET), QSFP_DD_TEMPE_WIDTH)
-                if dom_temperature_raw is not None:
-                    dom_temperature_data = sfpd_obj.parse_temperature(dom_temperature_raw, 0)
-                    temp = self._convert_string_to_num(dom_temperature_data['data']['Temperature']['value'])
-                    return temp
-            return None
-
-    def get_voltage(self):
-        """
-        Retrieves the supply voltage of this SFP
-
-        Returns:
-            An integer number of supply voltage in mV
-        """
-        self.reinit()
-        if not self.dom_supported:
-            return None
-
-        #QSFP
-        if self.sfp_type == QSFP_TYPE:
-            offset = 0
-
-            sfpd_obj = sff8436Dom()
-            if sfpd_obj is None:
-                return None
-
-            if self.dom_volt_supported:
-                dom_voltage_raw = self._read_eeprom_specific_bytes((offset + QSFP_VOLT_OFFSET), QSFP_VOLT_WIDTH)
-                if dom_voltage_raw is not None:
-                    dom_voltage_data = sfpd_obj.parse_voltage(dom_voltage_raw, 0)
-                    voltage = self._convert_string_to_num(dom_voltage_data['data']['Vcc']['value'])
-                    return voltage
-                else:
-                    return None
-            return None
-
-        #QSFP-DD
-        else:
-            offset = 0
-
-            sfpd_obj = qsfp_dd_Dom()
-            if sfpd_obj is None:
-                return None
-
-            if self.dom_volt_supported:
-                dom_voltage_raw = self._read_eeprom_specific_bytes((offset + QSFP_DD_VOLT_OFFSET), QSFP_DD_VOLT_WIDTH)
-                if dom_voltage_raw is not None:
-                    dom_voltage_data = sfpd_obj.parse_voltage(dom_voltage_raw, 0)
-                    voltage = self._convert_string_to_num(dom_voltage_data['data']['Vcc']['value'])
-                    return voltage
-            return None
-
-    def get_tx_bias(self):
-        """
-        Retrieves the TX bias current of this SFP
-
-        Returns:
-            A list of four integer numbers, representing TX bias in mA
-            for channel 0 to channel 4.
-            Ex. ['110.09', '111.12', '108.21', '112.09']
-        """
-        self.reinit()
-        tx_bias_list = []
-
-        #QSFP
-        if self.sfp_type == QSFP_TYPE:
-            offset = 0
-
-            sfpd_obj = sff8436Dom()
-            if sfpd_obj is None:
-                return None
-
-            dom_channel_monitor_raw = self._read_eeprom_specific_bytes((offset + QSFP_CHANNL_MON_OFFSET), QSFP_CHANNL_MON_WITH_TX_POWER_WIDTH)
-            if dom_channel_monitor_raw is not None:
-                dom_channel_monitor_data = sfpd_obj.parse_channel_monitor_params_with_tx_power(dom_channel_monitor_raw, 0)
-                tx_bias_list.append(self._convert_string_to_num(dom_channel_monitor_data['data']['TX1Bias']['value']))
-                tx_bias_list.append(self._convert_string_to_num(dom_channel_monitor_data['data']['TX2Bias']['value']))
-                tx_bias_list.append(self._convert_string_to_num(dom_channel_monitor_data['data']['TX3Bias']['value']))
-                tx_bias_list.append(self._convert_string_to_num(dom_channel_monitor_data['data']['TX4Bias']['value']))
-
-        #QSFP-DD
-        else:
-            # page 11h (we put page 1 to byte 768~895)
-            if dom_tx_bias_power_supported:
-                offset = 768
-                sfpd_obj = qsfp_dd_Dom()
-                if sfpd_obj is None:
-                    return None
-
-                dom_tx_bias_raw = self._read_eeprom_specific_bytes((offset + QSFP_DD_TX_BIAS_OFFSET), QSFP_DD_TX_BIAS_WIDTH)
-                if dom_tx_bias_raw is not None:
-                    dom_tx_bias_data = sfpd_obj.parse_dom_tx_bias(dom_tx_bias_raw, 0)
-                    tx_bias_list.append(self._convert_string_to_num(dom_tx_bias_data['data']['TX1Bias']['value']))
-                    tx_bias_list.append(self._convert_string_to_num(dom_tx_bias_data['data']['TX2Bias']['value']))
-                    tx_bias_list.append(self._convert_string_to_num(dom_tx_bias_data['data']['TX3Bias']['value']))
-                    tx_bias_list.append(self._convert_string_to_num(dom_tx_bias_data['data']['TX4Bias']['value']))
-                    tx_bias_list.append(self._convert_string_to_num(dom_tx_bias_data['data']['TX5Bias']['value']))
-                    tx_bias_list.append(self._convert_string_to_num(dom_tx_bias_data['data']['TX6Bias']['value']))
-                    tx_bias_list.append(self._convert_string_to_num(dom_tx_bias_data['data']['TX7Bias']['value']))
-                    tx_bias_list.append(self._convert_string_to_num(dom_tx_bias_data['data']['TX8Bias']['value']))
-
-        return tx_bias_list
-
-    def get_rx_power(self):
-        """
-        Retrieves the received optical power for this SFP
-
-        Returns:
-            A list of four integer numbers, representing received optical
-            power in mW for channel 0 to channel 4.
-            Ex. ['1.77', '1.71', '1.68', '1.70']
-        """
-        self.reinit()
-        rx_power_list = []
-
-        #QSFP
-        if self.sfp_type == QSFP_TYPE:
-            offset = 0
-
-            sfpd_obj = sff8436Dom()
-            if sfpd_obj is None:
-                return None
-
-            if self.dom_rx_power_supported:
-                dom_channel_monitor_raw = self._read_eeprom_specific_bytes((offset + QSFP_CHANNL_MON_OFFSET), QSFP_CHANNL_MON_WITH_TX_POWER_WIDTH)
-                if dom_channel_monitor_raw is not None:
-                    dom_channel_monitor_data = sfpd_obj.parse_channel_monitor_params_with_tx_power(dom_channel_monitor_raw, 0)
-                    rx_power_list.append(self._convert_string_to_num(dom_channel_monitor_data['data']['RX1Power']['value']))
-                    rx_power_list.append(self._convert_string_to_num(dom_channel_monitor_data['data']['RX2Power']['value']))
-                    rx_power_list.append(self._convert_string_to_num(dom_channel_monitor_data['data']['RX3Power']['value']))
-                    rx_power_list.append(self._convert_string_to_num(dom_channel_monitor_data['data']['RX4Power']['value']))
-                else:
-                    return None
-            else:
-                return None
-
-        #QSFP-DD
-        elif self.sfp_type == QSFP_DD_TYPE:
-            # page 11h (we put page 11 to byte 768~895)
-            if self.dom_rx_power_supported:
-                offset = 768
-                sfpd_obj = qsfp_dd_Dom()
-                if sfpd_obj is None:
-                    return None
-
-                dom_rx_power_raw = self._read_eeprom_specific_bytes((offset + QSFP_DD_RX_POWER_OFFSET), QSFP_DD_RX_POWER_WIDTH)
-                if dom_rx_power_raw is not None:
-                    dom_rx_power_data = sfpd_obj.parse_dom_rx_power(dom_rx_power_raw, 0)
-                    rx_power_list.append(self._convert_string_to_num(dom_rx_power_data['data']['RX1Power']['value']))
-                    rx_power_list.append(self._convert_string_to_num(dom_rx_power_data['data']['RX2Power']['value']))
-                    rx_power_list.append(self._convert_string_to_num(dom_rx_power_data['data']['RX3Power']['value']))
-                    rx_power_list.append(self._convert_string_to_num(dom_rx_power_data['data']['RX4Power']['value']))
-                    rx_power_list.append(self._convert_string_to_num(dom_rx_power_data['data']['RX5Power']['value']))
-                    rx_power_list.append(self._convert_string_to_num(dom_rx_power_data['data']['RX6Power']['value']))
-                    rx_power_list.append(self._convert_string_to_num(dom_rx_power_data['data']['RX7Power']['value']))
-                    rx_power_list.append(self._convert_string_to_num(dom_rx_power_data['data']['RX8Power']['value']))
-
-        return rx_power_list
-
-    def get_tx_power(self):
-        """
-        Retrieves the TX power of this SFP
-
-        Returns:
-            A list of four integer numbers, representing TX power in mW
-            for channel 0 to channel 4.
-            Ex. ['1.86', '1.86', '1.86', '1.86']
-        """
-        self.reinit()
-        tx_power_list = []
-
-        #QSFP
-        if self.sfp_type == QSFP_TYPE:
-            offset = 0
-
-            sfpd_obj = sff8436Dom()
-            if sfpd_obj is None:
-                return None
-
-            if self.dom_tx_power_supported:
-                dom_channel_monitor_raw = self._read_eeprom_specific_bytes((offset + QSFP_CHANNL_MON_OFFSET), QSFP_CHANNL_MON_WITH_TX_POWER_WIDTH)
-                if dom_channel_monitor_raw is not None:
-                    dom_channel_monitor_data = sfpd_obj.parse_channel_monitor_params_with_tx_power(dom_channel_monitor_raw, 0)
-                    tx_power_list.append(self._convert_string_to_num(dom_channel_monitor_data['data']['TX1Power']['value']))
-                    tx_power_list.append(self._convert_string_to_num(dom_channel_monitor_data['data']['TX2Power']['value']))
-                    tx_power_list.append(self._convert_string_to_num(dom_channel_monitor_data['data']['TX3Power']['value']))
-                    tx_power_list.append(self._convert_string_to_num(dom_channel_monitor_data['data']['TX4Power']['value']))
-                else:
-                    return None
-            else:
-                return None
-
-        #QSFP-DD
-        else:
-            # page 11h (we put page 11 to byte 768~895)
-            if self.dom_tx_power_supported:
-                offset = 768
-                sfpd_obj = qsfp_dd_Dom()
-                if sfpd_obj is None:
-                    return None
-
-                dom_tx_power_raw = self._read_eeprom_specific_bytes((offset + QSFP_DD_TX_POWER_OFFSET), QSFP_DD_TX_POWER_WIDTH)
-                if dom_tx_power_raw is not None:
-                    dom_tx_power_data = sfpd_obj.parse_dom_tx_power(dom_tx_power_raw, 0)
-                    tx_power_list.append(self._convert_string_to_num(dom_tx_power_data['data']['TX1Power']['value']))
-                    tx_power_list.append(self._convert_string_to_num(dom_tx_power_data['data']['TX2Power']['value']))
-                    tx_power_list.append(self._convert_string_to_num(dom_tx_power_data['data']['TX3Power']['value']))
-                    tx_power_list.append(self._convert_string_to_num(dom_tx_power_data['data']['TX4Power']['value']))
-                    tx_power_list.append(self._convert_string_to_num(dom_tx_power_data['data']['TX5Power']['value']))
-                    tx_power_list.append(self._convert_string_to_num(dom_tx_power_data['data']['TX6Power']['value']))
-                    tx_power_list.append(self._convert_string_to_num(dom_tx_power_data['data']['TX7Power']['value']))
-                    tx_power_list.append(self._convert_string_to_num(dom_tx_power_data['data']['TX8Power']['value']))
-
-        return tx_power_list
-
     def reset(self):
         """
         Reset SFP and return all user module settings to their default srate.
@@ -1640,9 +167,9 @@ def reset(self):
         """
         try:
             if self.index < 16:
-                file_path=self.RESET_1_16_PATH.format(self.port_num)
+                file_path = self.RESET_1_16_PATH.format(self.port_num)
             else:
-                file_path=self.RESET_17_32_PATH.format(self.port_num)
+                file_path = self.RESET_17_32_PATH.format(self.port_num)
 
             with open(file_path, 'w') as fd:
                 fd.write(str(1))
@@ -1655,54 +182,56 @@ def reset(self):
 
         return True
 
-    def tx_disable(self, tx_disable):
-        """
-        Disable SFP TX for all channels
-        Args:
-            tx_disable : A Boolean, True to enable tx_disable mode, False to disable
-                         tx_disable mode.
-        Returns:
-            A boolean, True if tx_disable is set successfully, False if not
-        """
-        # SFP doesn't support this feature
-        return False
-
-    def tx_disable_channel(self, channel, disable):
+    def get_lpmode(self):
         """
-        Sets the tx_disable for specified SFP channels
-        Args:
-            channel : A hex of 4 bits (bit 0 to bit 3) which represent channel 0 to 3,
-                      e.g. 0x5 for channel 0 and channel 2.
-            disable : A boolean, True to disable TX channels specified in channel,
-                      False to enable
+        Retrieves the lpmode (low power mode) status of this SFP
         Returns:
-            A boolean, True if successful, False if not
+            A Boolean, True if lpmode is enabled, False if disabled
         """
-        # SFP doesn't support this feature
-        return False
+        lpmode = False
+        try:
+            if self.index < 16:
+                lpmode_path = self.LPMODE_1_16_PATH.format(self.port_num)
+            else:
+                lpmode_path = self.LPMODE_17_32_PATH.format(self.port_num)
+            with open(lpmode_path, 'r') as sfp_lpmode:
+                lpmode = int(sfp_lpmode.read(), 16)
+        except IOError:
+            return False
+        return lpmode == 1
 
     def set_lpmode(self, lpmode):
         """
         Sets the lpmode (low power mode) of SFP
         Args:
             lpmode: A Boolean, True to enable lpmode, False to disable it
-            Note  : lpmode can be overridden by set_power_override
+            Note: lpmode can be overridden by set_power_override
         Returns:
             A boolean, True if lpmode is set successfully, False if not
         """
         try:
             if self.index < 16:
-                lpmode_path=self.LPMODE_1_16_PATH.format(self.port_num)
+                lpmode_path = self.LPMODE_1_16_PATH.format(self.port_num)
             else:
-                lpmode_path=self.LPMODE_17_32_PATH.format(self.port_num)
+                lpmode_path = self.LPMODE_17_32_PATH.format(self.port_num)
             val_file = open(lpmode_path, 'w')
             val_file.write('1' if lpmode else '0')
             val_file.close()
+            self.set_power_override(True, True if lpmode is True else False)
             return True
         except IOError:
             val_file.close()
             return False
 
+    def get_power_override(self):
+        """
+        Retrieves the power-override status of this SFP
+        Returns:
+            A Boolean, True if power-override is enabled, False if disabled
+        """
+        # SFP doesn't support this feature
+        return False
+
     def set_power_override(self, power_override, power_set):
         """
         Sets SFP power level using power_override and power_set
@@ -1720,8 +249,38 @@ def set_power_override(self, power_override, power_set):
             A boolean, True if power-override and power_set are set successfully,
             False if not
         """
-        # SFP doesn't support this feature
-        return False
+        if not self.get_presence():
+            return False
+        if self.sfp_type == QSFP_TYPE:
+            try:
+                power_override_bit = (1 << 0) if power_override else 0
+                power_set_bit = (1 << 1) if power_set else (1 << 3)
+
+                # Write to eeprom
+                with open(self.port_to_power_mode_mapping[self.index], "w") as fd:
+                    fd.write(str((power_override_bit | power_set_bit)))
+                    time.sleep(0.01)
+                    fd.close()
+            except Exception as e:
+                print('Error: unable to open file: ', str(e))
+                fd.close()
+                return False
+            return True
+        elif self.sfp_type == QSFP_DD_TYPE:
+            try:
+                power_override_bit = (1 << 6)
+                power_set_bit = (1 << 4) if power_set else (0 << 4)
+
+                # Write to eeprom
+                with open(self.port_to_power_mode_mapping[self.index], "w") as fd:
+                    fd.write(str((power_override_bit | power_set_bit)))
+                    time.sleep(0.01)
+                    fd.close()
+            except Exception as e:
+                print('Error: unable to open file: ', str(e))
+                fd.close()
+                return False
+            return True
 
     def get_name(self):
         """
@@ -1730,27 +289,9 @@ def get_name(self):
             string: The name of the device
         """
 
-        name='port'+str(self.index + 1)
+        name = 'port'+str(self.index + 1)
         return name
 
-    def get_model(self):
-        """
-        Retrieves the model number (or part number) of the device
-        Returns:
-            string: Model/part number of device
-        """
-        transceiver_dom_info_dict = self.get_transceiver_info()
-        return transceiver_dom_info_dict.get("model", "N/A")
-
-    def get_serial(self):
-        """
-        Retrieves the serial number of the device
-        Returns:
-            string: Serial number of device
-        """
-        transceiver_dom_info_dict = self.get_transceiver_info()
-        return transceiver_dom_info_dict.get("serial", "N/A")
-
     def get_status(self):
         """
         Retrieves the operational status of the device
@@ -1788,3 +329,121 @@ def get_error_description(self):
             return self.SFP_STATUS_OK
         else:
             return self.SFP_STATUS_UNPLUGGED
+
+    def read_eeprom(self, offset, num_bytes):
+        """
+        read eeprom specfic bytes beginning from a random offset with size as num_bytes
+
+        Args:
+             offset :
+                     Integer, the offset from which the read transaction will start
+             num_bytes:
+                     Integer, the number of bytes to be read
+
+        Returns:
+            bytearray, if raw sequence of bytes are read correctly from the offset of size num_bytes
+            None, if the read_eeprom fails
+        """
+        if not self.get_presence():
+            return None
+        if self.sfp_type == None:
+            return None
+
+        return bytearray([int(x, 16) for x in self._read_eeprom_specific_bytes(offset, num_bytes)])
+
+    def write_eeprom(self, offset, num_bytes, write_buffer):
+        """
+        write eeprom specfic bytes beginning from a random offset with size as num_bytes
+        and write_buffer as the required bytes
+
+        Args:
+             offset :
+                     Integer, the offset from which the read transaction will start
+             num_bytes:
+                     Integer, the number of bytes to be written
+             write_buffer:
+                     bytearray, raw bytes buffer which is to be written beginning at the offset
+
+        Returns:
+            a Boolean, true if the write succeeded and false if it did not succeed.
+        """
+        if not self.get_presence():
+            return False
+        if self.sfp_type == QSFP_DD_TYPE:
+            # offset check
+            if offset == (0x12 * 128 + 128):
+                # Write to eeprom
+                with open(self.port_to_grid_mapping[self.index], "w") as fd:
+                    fd.write(str((int(str(write_buffer.hex()), 16))))
+                    time.sleep(0.01)
+                    fd.close()
+            elif offset == (0x12 * 128 + 136):
+                # Write to eeprom
+                with open(self.port_to_freq_mapping[self.index], "w") as fd:
+                    fd.write(str((int(str(write_buffer.hex()), 16))))
+                    time.sleep(0.01)
+                    fd.close()
+            elif offset == (0x12 * 128 + 200):
+                # Write to eeprom
+                with open(self.port_to_outp_mapping[self.index], "w") as fd:
+                    fd.write(str((int(str(write_buffer.hex()), 16))))
+                    time.sleep(0.01)
+                    fd.close()
+            else:
+                return False
+        else:
+            return False
+
+    def _read_eeprom_specific_bytes(self, offset, num_bytes, page = 0):
+        sysfsfile_eeprom = None
+        eeprom_raw = []
+        for i in range(0, num_bytes):
+            eeprom_raw.append("0x00")
+
+        if offset < 256:
+            pg = 0
+        else:
+            pg = (offset // 128) - 1
+            offset = (offset % 128)
+
+        if pg == 0x0:
+            sysfs_sfp_i2c_client_eeprom_path = self.port_to_eeprom1_mapping[self.index]
+        elif pg == 0x1:
+            sysfs_sfp_i2c_client_eeprom_path = self.port_to_eeprom2_mapping[self.index]
+        elif pg == 0x2:
+            sysfs_sfp_i2c_client_eeprom_path = self.port_to_eeprom2_mapping[self.index]
+            offset = offset + 128
+        elif pg == 0x3:
+            sysfs_sfp_i2c_client_eeprom_path = self.port_to_eeprom3_mapping[self.index]
+        elif pg == 0x10:
+            sysfs_sfp_i2c_client_eeprom_path = self.port_to_eeprom3_mapping[self.index]
+            offset = offset + 128
+        elif pg == 0x11:
+            sysfs_sfp_i2c_client_eeprom_path = self.port_to_eeprom3_mapping[self.index]
+            offset = offset + 256
+        elif pg == 0x4:
+            sysfs_sfp_i2c_client_eeprom_path = self.port_to_eeprom4_mapping[self.index]
+        elif pg == 0x12:
+            sysfs_sfp_i2c_client_eeprom_path = self.port_to_eeprom12_mapping[self.index]
+        else:
+            return eeprom_raw
+
+        try:
+            sysfsfile_eeprom = open(sysfs_sfp_i2c_client_eeprom_path, mode="rb", buffering=0)
+            sysfsfile_eeprom.seek(offset)
+            raw = sysfsfile_eeprom.read(num_bytes)
+            if sys.version_info[0] >= 3:
+                for n in range(0, num_bytes):
+                    eeprom_raw[n] = hex(raw[n])[2:].zfill(2)
+            else:
+                for n in range(0, num_bytes):
+                    eeprom_raw[n] = hex(ord(raw[n]))[2:].zfill(2)
+
+        except BaseException:
+            pass
+        finally:
+            if sysfsfile_eeprom:
+                sysfsfile_eeprom.close()
+
+        return eeprom_raw
+
diff --git a/platform/innovium/sonic-platform-modules-wistron/6512-32r/sonic_platform/watchdog.py b/platform/innovium/sonic-platform-modules-wistron/6512-32r/sonic_platform/watchdog.py
index fb7987bdd..c3cc4fd9c 100755
--- a/platform/innovium/sonic-platform-modules-wistron/6512-32r/sonic_platform/watchdog.py
+++ b/platform/innovium/sonic-platform-modules-wistron/6512-32r/sonic_platform/watchdog.py
@@ -110,7 +110,7 @@ def _settimeout(self, seconds):
     def _gettimeout(self):
         #IPMI_WDT_GET_TIMEOUT_CMD
         out, err = self.pipeline("ipmitool mc watchdog get", "grep Present", "awk '{print $3}'")
-        return int(out.decode().rstrip('\n'), 10)
+        return int(float(out.decode().rstrip('\n')))
 
     def arm(self, seconds):
         """
diff --git a/platform/innovium/sonic-platform-modules-wistron/sw-to3200k/modules/wistron_i2c_psu.c b/platform/innovium/sonic-platform-modules-wistron/sw-to3200k/modules/wistron_i2c_psu.c
index 5024ecdd7..6b531f69e 100644
--- a/platform/innovium/sonic-platform-modules-wistron/sw-to3200k/modules/wistron_i2c_psu.c
+++ b/platform/innovium/sonic-platform-modules-wistron/sw-to3200k/modules/wistron_i2c_psu.c
@@ -403,7 +403,7 @@ static int wistron_i2c_psu_probe(struct i2c_client *client, const struct i2c_dev
         goto exit_free;
     }
 
-	data->hwmon_dev = hwmon_device_register_with_info(&client->dev, "wistron_i2c_psu", NULL, NULL, NULL);
+	data->hwmon_dev = hwmon_device_register_with_groups(&client->dev, "wistron_i2c_psu", NULL, NULL);
     if (IS_ERR(data->hwmon_dev))
     {
         status = PTR_ERR(data->hwmon_dev);
@@ -422,14 +422,13 @@ static int wistron_i2c_psu_probe(struct i2c_client *client, const struct i2c_dev
     return status;
 }
 
-static int wistron_i2c_psu_remove(struct i2c_client *client)
+static void wistron_i2c_psu_remove(struct i2c_client *client)
 {
     struct wistron_i2c_psu_data *data = i2c_get_clientdata(client);
 
     hwmon_device_unregister(data->hwmon_dev);
     sysfs_remove_group(&client->dev.kobj, &wistron_i2c_psu_group);
     kfree(data);
-    return 0;
 }
 
 /* Support psu moduel
diff --git a/platform/innovium/sonic-platform-modules-wistron/sw-to3200k/modules/wistron_sw_to3200k_cpld.c b/platform/innovium/sonic-platform-modules-wistron/sw-to3200k/modules/wistron_sw_to3200k_cpld.c
index 52f659eae..ba1bd6dc4 100644
--- a/platform/innovium/sonic-platform-modules-wistron/sw-to3200k/modules/wistron_sw_to3200k_cpld.c
+++ b/platform/innovium/sonic-platform-modules-wistron/sw-to3200k/modules/wistron_sw_to3200k_cpld.c
@@ -591,7 +591,7 @@ static int sw_to3200k_cpld_probe(struct i2c_client *client, const struct i2c_dev
     return ret;
 }
 
-static int sw_to3200k_cpld_remove(struct i2c_client *client)
+static void sw_to3200k_cpld_remove(struct i2c_client *client)
 {
     struct sw_to3200k_cpld_data *data = i2c_get_clientdata(client);
     const struct attribute_group *group = NULL;
@@ -620,7 +620,6 @@ static int sw_to3200k_cpld_remove(struct i2c_client *client)
     }
 
     kfree(data);
-    return 0;
 }
 
 int sw_to3200k_fpga_sysled_get(int led_type)
diff --git a/platform/innovium/sonic-platform-modules-wistron/sw-to3200k/modules/wistron_sw_to3200k_fan.c b/platform/innovium/sonic-platform-modules-wistron/sw-to3200k/modules/wistron_sw_to3200k_fan.c
index 0f7e856e8..51ec5e2d0 100644
--- a/platform/innovium/sonic-platform-modules-wistron/sw-to3200k/modules/wistron_sw_to3200k_fan.c
+++ b/platform/innovium/sonic-platform-modules-wistron/sw-to3200k/modules/wistron_sw_to3200k_fan.c
@@ -283,7 +283,7 @@ static int sw_to3200k_fan_probe
         goto exit_free;
     }
 
-	data->hwmon_dev = hwmon_device_register_with_info(&client->dev, "wistron_fan", NULL, NULL, NULL);
+	data->hwmon_dev = hwmon_device_register_with_groups(&client->dev, "wistron_fan", NULL, NULL);
     if (IS_ERR(data->hwmon_dev))
     {
         status = PTR_ERR(data->hwmon_dev);
@@ -302,12 +302,11 @@ static int sw_to3200k_fan_probe
     return status;
 }
 
-static int sw_to3200k_fan_remove(struct i2c_client *client)
+static void sw_to3200k_fan_remove(struct i2c_client *client)
 {
     struct sw_to3200k_fan_data *data = i2c_get_clientdata(client);
     hwmon_device_unregister(data->hwmon_dev);
     sysfs_remove_group(&client->dev.kobj, &sw_to3200k_fan_group);
-    return 0;
 }
 
 /* Addresses to scan */
diff --git a/platform/innovium/sonic-platform-modules-wistron/sw-to3200k/modules/wistron_sw_to3200k_oom.c b/platform/innovium/sonic-platform-modules-wistron/sw-to3200k/modules/wistron_sw_to3200k_oom.c
index 3e26edff0..6d1577acf 100644
--- a/platform/innovium/sonic-platform-modules-wistron/sw-to3200k/modules/wistron_sw_to3200k_oom.c
+++ b/platform/innovium/sonic-platform-modules-wistron/sw-to3200k/modules/wistron_sw_to3200k_oom.c
@@ -332,7 +332,7 @@ static int sw_to3200k_oom_probe(struct i2c_client *client, const struct i2c_devi
         goto exit_free;
     }
 
-	data->hwmon_dev = hwmon_device_register_with_info(&client->dev, "wistron_oom", NULL, NULL, NULL);
+	data->hwmon_dev = hwmon_device_register_with_groups(&client->dev, "wistron_oom", NULL, NULL);
     if (IS_ERR(data->hwmon_dev))
     {
         status = PTR_ERR(data->hwmon_dev);
@@ -351,15 +351,13 @@ static int sw_to3200k_oom_probe(struct i2c_client *client, const struct i2c_devi
     return status;
 }
 
-static int sw_to3200k_oom_remove(struct i2c_client *client)
+static void sw_to3200k_oom_remove(struct i2c_client *client)
 {
     struct sw_to3200k_oom_data *data = i2c_get_clientdata(client);
 
     hwmon_device_unregister(data->hwmon_dev);
     sysfs_remove_group(&client->dev.kobj, &sw_to3200k_oom_group);
     kfree(data);
-
-    return 0;
 }
 
 static const struct i2c_device_id sw_to3200k_oom_id[] = {
diff --git a/platform/innovium/sonic-platform-modules-wistron/sw-to3200k/modules/wistron_sw_to3200k_psu.c b/platform/innovium/sonic-platform-modules-wistron/sw-to3200k/modules/wistron_sw_to3200k_psu.c
index 418e22240..60b142c0d 100644
--- a/platform/innovium/sonic-platform-modules-wistron/sw-to3200k/modules/wistron_sw_to3200k_psu.c
+++ b/platform/innovium/sonic-platform-modules-wistron/sw-to3200k/modules/wistron_sw_to3200k_psu.c
@@ -205,7 +205,7 @@ static int sw_to3200k_psu_probe(struct i2c_client *client,
         goto exit_free;
     }
 
-	data->hwmon_dev = hwmon_device_register_with_info(&client->dev, "wistron_psu", NULL, NULL, NULL);
+	data->hwmon_dev = hwmon_device_register_with_groups(&client->dev, "wistron_psu", NULL, NULL);
     if (IS_ERR(data->hwmon_dev))
     {
         status = PTR_ERR(data->hwmon_dev);
@@ -224,15 +224,13 @@ static int sw_to3200k_psu_probe(struct i2c_client *client,
     return status;
 }
 
-static int sw_to3200k_psu_remove(struct i2c_client *client)
+static void sw_to3200k_psu_remove(struct i2c_client *client)
 {
     struct sw_to3200k_psu_data *data = i2c_get_clientdata(client);
 
     hwmon_device_unregister(data->hwmon_dev);
     sysfs_remove_group(&client->dev.kobj, &sw_to3200k_psu_group);
     kfree(data);
-
-    return 0;
 }
 
 enum psu_index
diff --git a/platform/innovium/sonic-platform-modules-wistron/sw-to3200k/modules/wistron_sw_to3200k_thermal.c b/platform/innovium/sonic-platform-modules-wistron/sw-to3200k/modules/wistron_sw_to3200k_thermal.c
index a86d53a94..a500fa0fc 100644
--- a/platform/innovium/sonic-platform-modules-wistron/sw-to3200k/modules/wistron_sw_to3200k_thermal.c
+++ b/platform/innovium/sonic-platform-modules-wistron/sw-to3200k/modules/wistron_sw_to3200k_thermal.c
@@ -140,7 +140,7 @@ static int sw_to3200k_thermal_probe(struct i2c_client *client, const struct i2c_
         goto exit_free;
     }
 
-	data->hwmon_dev = hwmon_device_register_with_info(&client->dev, "wistron_thermal", NULL, NULL, NULL);
+	data->hwmon_dev = hwmon_device_register_with_groups(&client->dev, "wistron_thermal", NULL, NULL);
     if (IS_ERR(data->hwmon_dev))
     {
         status = PTR_ERR(data->hwmon_dev);
@@ -159,14 +159,13 @@ static int sw_to3200k_thermal_probe(struct i2c_client *client, const struct i2c_
     return status;
 }
 
-static int sw_to3200k_thermal_remove(struct i2c_client *client)
+static void sw_to3200k_thermal_remove(struct i2c_client *client)
 {
     struct sw_to3200k_thermal_data *data = i2c_get_clientdata(client);
 
     hwmon_device_unregister(data->hwmon_dev);
     sysfs_remove_group(&client->dev.kobj, &sw_to3200k_thermal_group);
     kfree(data);
-    return 0;
 }
 
 
diff --git a/platform/innovium/sonic-platform-modules-wistron/sw-to3200k/sonic_platform/sfp.py b/platform/innovium/sonic-platform-modules-wistron/sw-to3200k/sonic_platform/sfp.py
index 63225a040..c14357d8a 100644
--- a/platform/innovium/sonic-platform-modules-wistron/sw-to3200k/sonic_platform/sfp.py
+++ b/platform/innovium/sonic-platform-modules-wistron/sw-to3200k/sonic_platform/sfp.py
@@ -5,229 +5,33 @@
 # provides the sfp device status which are available in the platform
 #############################################################################
 try:
-    from sonic_platform_base.sfp_base import SfpBase
-    from sonic_platform_base.sonic_sfp.sff8436 import sff8436InterfaceId
-    from sonic_platform_base.sonic_sfp.sff8436 import sff8436Dom
-    from sonic_platform_base.sonic_sfp.qsfp_dd import qsfp_dd_InterfaceId
-    from sonic_platform_base.sonic_sfp.qsfp_dd import qsfp_dd_Dom
-    from sonic_platform_base.sonic_sfp.sffbase import sffbase
-    from sonic_platform_base.sonic_sfp.sff8024 import type_abbrv_name
-    from sonic_platform_base.sonic_sfp.sff8024 import type_of_media_interface
+    from sonic_platform_base.sonic_xcvr.sfp_optoe_base import SfpOptoeBase
     from sonic_py_common.logger import Logger
     import sys
-except ImportError as e:
-    raise ImportError(str(e) + "- required module not found")
+    import time
+except ImportError as err:
+    raise ImportError(str(err) + "- required module not found")
 
-# definitions of the offset and width for values in XCVR info eeprom
-XCVR_INTFACE_BULK_OFFSET = 0
-XCVR_INTFACE_BULK_WIDTH_QSFP = 20
-XCVR_INTFACE_BULK_WIDTH_SFP = 21
-XCVR_TYPE_OFFSET = 0
-XCVR_TYPE_WIDTH = 1
-XCVR_EXT_TYPE_OFFSET = 1
-XCVR_EXT_TYPE_WIDTH = 1
-XCVR_CONNECTOR_OFFSET = 2
-XCVR_CONNECTOR_WIDTH = 1
-XCVR_COMPLIANCE_CODE_OFFSET = 3
-XCVR_COMPLIANCE_CODE_WIDTH = 8
-XCVR_ENCODING_OFFSET = 11
-XCVR_ENCODING_WIDTH = 1
-XCVR_NBR_OFFSET = 12
-XCVR_NBR_WIDTH = 1
-XCVR_EXT_RATE_SEL_OFFSET = 13
-XCVR_EXT_RATE_SEL_WIDTH = 1
-XCVR_CABLE_LENGTH_OFFSET = 14
-XCVR_CABLE_LENGTH_WIDTH_QSFP = 5
-XCVR_CABLE_LENGTH_WIDTH_SFP = 6
-XCVR_VENDOR_NAME_OFFSET = 20
-XCVR_VENDOR_NAME_WIDTH = 16
-XCVR_VENDOR_OUI_OFFSET = 37
-XCVR_VENDOR_OUI_WIDTH = 3
-XCVR_VENDOR_PN_OFFSET = 40
-XCVR_VENDOR_PN_WIDTH = 16
-XCVR_HW_REV_OFFSET = 56
-XCVR_HW_REV_WIDTH_OSFP = 2
-XCVR_HW_REV_WIDTH_QSFP = 2
-XCVR_HW_REV_WIDTH_SFP = 4
-XCVR_EXT_SPECIFICATION_COMPLIANCE_OFFSET = 64
-XCVR_EXT_SPECIFICATION_COMPLIANCE_WIDTH = 1
-XCVR_VENDOR_SN_OFFSET = 68
-XCVR_VENDOR_SN_WIDTH = 16
-XCVR_VENDOR_DATE_OFFSET = 84
-XCVR_VENDOR_DATE_WIDTH = 8
-XCVR_DOM_CAPABILITY_OFFSET = 92
-XCVR_DOM_CAPABILITY_WIDTH = 2
-
-# definitions of the offset and width for values in XCVR_QSFP_DD info eeprom
-XCVR_EXT_TYPE_OFFSET_QSFP_DD = 72
-XCVR_EXT_TYPE_WIDTH_QSFP_DD = 2
-XCVR_CONNECTOR_OFFSET_QSFP_DD = 75
-XCVR_CONNECTOR_WIDTH_QSFP_DD = 1
-XCVR_CABLE_LENGTH_OFFSET_QSFP_DD = 74
-XCVR_CABLE_LENGTH_WIDTH_QSFP_DD = 1
-XCVR_HW_REV_OFFSET_QSFP_DD = 36
-XCVR_HW_REV_WIDTH_QSFP_DD = 2
-XCVR_VENDOR_DATE_OFFSET_QSFP_DD = 54
-XCVR_VENDOR_DATE_WIDTH_QSFP_DD = 8
-XCVR_DOM_CAPABILITY_OFFSET_QSFP_DD = 2
-XCVR_DOM_CAPABILITY_WIDTH_QSFP_DD = 1
-XCVR_MEDIA_TYPE_OFFSET_QSFP_DD = 85
-XCVR_MEDIA_TYPE_WIDTH_QSFP_DD = 1
-XCVR_FIRST_APPLICATION_LIST_OFFSET_QSFP_DD = 86
-XCVR_FIRST_APPLICATION_LIST_WIDTH_QSFP_DD = 32
-XCVR_SECOND_APPLICATION_LIST_OFFSET_QSFP_DD = 351
-XCVR_SECOND_APPLICATION_LIST_WIDTH_QSFP_DD = 28
-
-XCVR_INTERFACE_DATA_START = 0
-XCVR_INTERFACE_DATA_SIZE = 92
-SFP_MODULE_ADDRA2_OFFSET = 256
-SFP_MODULE_THRESHOLD_OFFSET = 0
-SFP_MODULE_THRESHOLD_WIDTH = 56
-
-QSFP_DOM_BULK_DATA_START = 22
-QSFP_DOM_BULK_DATA_SIZE = 36
-SFP_DOM_BULK_DATA_START = 96
-SFP_DOM_BULK_DATA_SIZE = 10
-
-QSFP_DD_DOM_BULK_DATA_START = 14
-QSFP_DD_DOM_BULK_DATA_SIZE = 4
-
-# definitions of the offset for values in OSFP info eeprom
-OSFP_TYPE_OFFSET = 0
-OSFP_VENDOR_NAME_OFFSET = 129
-OSFP_VENDOR_PN_OFFSET = 148
-OSFP_HW_REV_OFFSET = 164
-OSFP_VENDOR_SN_OFFSET = 166
-
-# definitions of the offset for values in QSFP_DD info eeprom
-QSFP_DD_TYPE_OFFSET = 0
-QSFP_DD_VENDOR_NAME_OFFSET = 1
-QSFP_DD_VENDOR_PN_OFFSET = 20
-QSFP_DD_VENDOR_SN_OFFSET = 38
-QSFP_DD_VENDOR_OUI_OFFSET = 17
-
-#definitions of the offset and width for values in DOM info eeprom
-QSFP_DOM_REV_OFFSET = 1
-QSFP_DOM_REV_WIDTH = 1
-QSFP_TEMPE_OFFSET = 22
-QSFP_TEMPE_WIDTH = 2
-QSFP_VOLT_OFFSET = 26
-QSFP_VOLT_WIDTH = 2
-QSFP_VERSION_COMPLIANCE_OFFSET = 1
-QSFP_VERSION_COMPLIANCE_WIDTH = 2
-QSFP_CHANNL_MON_OFFSET = 34
-QSFP_CHANNL_MON_WIDTH = 16
-QSFP_CHANNL_MON_WITH_TX_POWER_WIDTH = 24
-QSFP_CHANNL_DISABLE_STATUS_OFFSET = 86
-QSFP_CHANNL_DISABLE_STATUS_WIDTH = 1
-QSFP_CHANNL_RX_LOS_STATUS_OFFSET = 3
-QSFP_CHANNL_RX_LOS_STATUS_WIDTH = 1
-QSFP_CHANNL_TX_FAULT_STATUS_OFFSET = 4
-QSFP_CHANNL_TX_FAULT_STATUS_WIDTH = 1
-QSFP_CONTROL_OFFSET = 86
-QSFP_CONTROL_WIDTH = 8
-QSFP_MODULE_MONITOR_OFFSET = 0
-QSFP_MODULE_MONITOR_WIDTH = 9
-QSFP_POWEROVERRIDE_OFFSET = 93
-QSFP_POWEROVERRIDE_WIDTH = 1
-QSFP_POWEROVERRIDE_BIT = 0
-QSFP_POWERSET_BIT = 1
-QSFP_OPTION_VALUE_OFFSET = 192
-QSFP_OPTION_VALUE_WIDTH = 4
-
-QSFP_MODULE_UPPER_PAGE3_START = 384
-QSFP_MODULE_THRESHOLD_OFFSET = 128
-QSFP_MODULE_THRESHOLD_WIDTH = 24
-QSFP_CHANNL_THRESHOLD_OFFSET = 176
-QSFP_CHANNL_THRESHOLD_WIDTH = 24
-
-#definitions of the offset and width for values in DOM info eeprom
-QSFP_DD_CHANNL_STATUS_OFFSET = 26
-QSFP_DD_CHANNL_STATUS_WIDTH = 1
-
-QSFP_DD_FLAT_MEM =   {'offset': 2, 'width': 1, 'page': 'low'}
-
-QSFP_DD_MODULE_MON = {'offset': 14, 'width': 4, 'page': 'low'}
-QSFP_DD_TEMPE_MON =  {'offset': 14, 'width': 2, 'page': 'low'}
-QSFP_DD_VOLT_MON =   {'offset': 16, 'width': 2, 'page': 'low'}
-
-QSFP_DD_MON_SUPPORT = {'offset': 159, 'width': 2, 'page': 1 }
-
-QSFP_DD_CHANNL_MON = {'offset': 154, 'width': 48, 'page': 11 }
-QSFP_DD_TX_POWER =   {'offset': 154, 'width': 16, 'page': 11 }
-QSFP_DD_TX_BIAS =    {'offset': 170, 'width': 16, 'page': 11 }
-QSFP_DD_RX_POWER =   {'offset': 186, 'width': 16, 'page': 11 }
-
-QSFP_DD_MODULE_THRESHOLD = {'offset': 128, 'width': 72, 'page': 2 }
-
-QSFP_DD_CHANNL_DISABLE_STATUS = {'offset': 130, 'width': 1, 'page': 10 }
-QSFP_DD_CHANNL_RX_LOS_STATUS =   {'offset': 147, 'width': 1, 'page': 11 }
-QSFP_DD_CHANNL_TX_FAULT_STATUS = {'offset': 135, 'width': 1, 'page': 11 }
 
 QSFP_TYPE_CODE_LIST = [
-    '0d', # QSFP+ or later
-    '11' # QSFP28 or later
+    '0x0d', # QSFP+ or later
+    '0x11'  # QSFP28 or later
 ]
 
 QSFP_DD_TYPE_CODE_LIST = [
-    '18' # QSFP-DD Double Density 8X Pluggable Transceiver
+    '0x18' # QSFP-DD Double Density 8X Pluggable Transceiver
 ]
 
-qsfp_cable_length_tup = ('Length(km)', 'Length OM3(2m)',
-                         'Length OM2(m)', 'Length OM1(m)',
-                         'Length Cable Assembly(m)')
-
-sfp_cable_length_tup = ('LengthSMFkm-UnitsOfKm', 'LengthSMF(UnitsOf100m)',
-                        'Length50um(UnitsOf10m)', 'Length62.5um(UnitsOfm)',
-                        'LengthCable(UnitsOfm)', 'LengthOM3(UnitsOf10m)')
-
-sfp_compliance_code_tup = ('10GEthernetComplianceCode', 'InfinibandComplianceCode',
-                            'ESCONComplianceCodes', 'SONETComplianceCodes',
-                            'EthernetComplianceCodes','FibreChannelLinkLength',
-                            'FibreChannelTechnology', 'SFP+CableTechnology',
-                            'FibreChannelTransmissionMedia','FibreChannelSpeed')
-
-qsfp_compliance_code_tup = ('10/40G Ethernet Compliance Code', 'SONET Compliance codes',
-                            'SAS/SATA compliance codes', 'Gigabit Ethernet Compliant codes',
-                            'Fibre Channel link length/Transmitter Technology',
-                            'Fibre Channel transmission media', 'Fibre Channel Speed')
 
 QSFP_TYPE = "QSFP"
 QSFP_DD_TYPE = "QSFP_DD"
 
+
 # Global logger class instance
 logger = Logger()
-class ext_qsfp_dd(sffbase):
-    version = '1.0'
-
-    qsfp_dd_mon_capability = {
-        'Tx_bias_support':
-            {'offset': 1,
-             'bit': 0,
-             'type': 'bitvalue'},
-        'Tx_power_support':
-            {'offset': 1,
-             'bit': 1,
-             'type': 'bitvalue'},
-        'Rx_power_support':
-            {'offset': 1,
-             'bit': 2,
-             'type': 'bitvalue'},
-        'Voltage_support':
-            {'offset': 0,
-             'bit': 1,
-             'type': 'bitvalue'},
-        'Temp_support':
-            {'offset': 0,
-             'bit': 0,
-             'type': 'bitvalue'}
-    }
 
-    def parse_mon_capability(self, sn_raw_data, start_pos):
-        return sffbase.parse(self, self.qsfp_dd_mon_capability, sn_raw_data, start_pos)
 
-
-class Sfp(SfpBase):
+class Sfp(SfpOptoeBase):
     """Platform-specific Sfp class"""
 
     # Port number
@@ -277,42 +81,48 @@ class Sfp(SfpBase):
 
     def __init__(self, sfp_index, sfp_type):
         # Init index
+        SfpOptoeBase.__init__(self)
         self.index = sfp_index
+        self.sfp_type = sfp_type
+
         self.port_num = self.index + 1
-        self.abbrv = None
+        self.port_type = self.sfp_type
 
         # Init eeprom path
-        eeprom_low_path = '/sys/bus/i2c/devices/0-00{}/eeprom_low'
-        eeprom_0_path = '/sys/bus/i2c/devices/0-00{}/eeprom_pg0'
-        eeprom_1_path = '/sys/bus/i2c/devices/0-00{}/eeprom_pg1'
-        eeprom_2_path = '/sys/bus/i2c/devices/0-00{}/eeprom_pg2'
-        eeprom_3_path = '/sys/bus/i2c/devices/0-00{}/eeprom_pg3'
-        eeprom_11_path = '/sys/bus/i2c/devices/0-00{}/eeprom_pg11'
-        name_path = '/sys/bus/i2c/devices/0-00{}/port_name'
+        eeprom_path_prefix = '/sys/bus/i2c/devices/0-00'
         self.port_to_eeprom_low_mapping = {}
         self.port_to_eeprom_0_mapping = {}
         self.port_to_eeprom_1_mapping = {}
         self.port_to_eeprom_2_mapping = {}
         self.port_to_eeprom_3_mapping = {}
         self.port_to_eeprom_11_mapping = {}
-        self.port_to_name_mapping = {}
         for x in range(self.PORT_START, self.PORT_END + 1):
-            p_num = x - 1 if self.PORT_START == 1 else x
-            self.port_to_eeprom_low_mapping[p_num] = eeprom_low_path.format(self.port_to_i2c_mapping[p_num])
-            self.port_to_eeprom_0_mapping[p_num] = eeprom_0_path.format(self.port_to_i2c_mapping[p_num])
-            self.port_to_eeprom_1_mapping[p_num] = eeprom_1_path.format(self.port_to_i2c_mapping[p_num])
-            self.port_to_eeprom_2_mapping[p_num] = eeprom_2_path.format(self.port_to_i2c_mapping[p_num])
-            self.port_to_eeprom_3_mapping[p_num] = eeprom_3_path.format(self.port_to_i2c_mapping[p_num])
-            self.port_to_eeprom_11_mapping[p_num] = eeprom_11_path.format(self.port_to_i2c_mapping[p_num])
-            self.port_to_name_mapping[p_num] = name_path.format(self.port_to_i2c_mapping[p_num])
+            self.port_to_eeprom_low_mapping[x] = eeprom_path_prefix + str(self.port_to_i2c_mapping[x]) + '/eeprom_low'
+            self.port_to_eeprom_0_mapping[x] = eeprom_path_prefix + str(self.port_to_i2c_mapping[x]) + '/eeprom_pg0'
+            self.port_to_eeprom_1_mapping[x] = eeprom_path_prefix + str(self.port_to_i2c_mapping[x]) + '/eeprom_pg1'
+            self.port_to_eeprom_2_mapping[x] = eeprom_path_prefix + str(self.port_to_i2c_mapping[x]) + '/eeprom_pg2'
+            self.port_to_eeprom_3_mapping[x] = eeprom_path_prefix + str(self.port_to_i2c_mapping[x]) + '/eeprom_pg3'
+            self.port_to_eeprom_11_mapping[x] = eeprom_path_prefix + str(self.port_to_i2c_mapping[x]) + '/eeprom_pg11'
 
-        self._detect_sfp_type(sfp_type)
-        self._dom_capability_detect()
-        SfpBase.__init__(self)
+        self.reinit()
 
     def reinit(self):
         self._detect_sfp_type(self.sfp_type)
-        self._dom_capability_detect()
+
+    def _detect_sfp_type(self, sfp_type):
+        eeprom_raw = []
+        eeprom_raw = self._xcvr_api_factory._get_id()
+        if eeprom_raw is not None:
+            eeprom_raw = hex(eeprom_raw)
+            if eeprom_raw in QSFP_TYPE_CODE_LIST:
+                self.sfp_type = QSFP_TYPE
+            elif eeprom_raw in QSFP_DD_TYPE_CODE_LIST:
+                self.sfp_type = QSFP_DD_TYPE
+            else:
+                # Set native port type if EEPROM type is not recognized/readable
+                self.sfp_type = self.port_type
+        else:
+            self.sfp_type = self.port_type
 
     def get_presence(self):
         """
@@ -323,717 +133,15 @@ def get_presence(self):
         presence = False
         try:
             if self.index < 16:
-                pres_path=self.PRS_1_16_PATH.format(self.port_num)
+                pres_path = self.PRS_1_16_PATH.format(self.port_num)
             else:
-                pres_path=self.PRS_17_32_PATH.format(self.port_num)
+                pres_path = self.PRS_17_32_PATH.format(self.port_num)
             with open(pres_path, 'r') as sfp_presence:
                 presence = int(sfp_presence.read(), 16)
         except IOError:
             return False
         logger.log_info("debug:port_ %s sfp presence is %s" % (str(self.index), str(presence)))
-        return True if presence == 1 else False
-
-    def _read_eeprom_specific_bytes(self, offset, num_bytes, page = 0):
-        sysfsfile_eeprom = None
-        eeprom_raw = []
-        for i in range(0, num_bytes):
-            eeprom_raw.append("0x00")
-
-        if offset < 128:
-            sysfs_sfp_i2c_client_eeprom_path = self.port_to_eeprom_low_mapping[self.index]
-        elif page == 0 :
-            sysfs_sfp_i2c_client_eeprom_path = self.port_to_eeprom_0_mapping[self.index]
-            offset = offset - 128
-        elif page == 1 :
-            sysfs_sfp_i2c_client_eeprom_path = self.port_to_eeprom_1_mapping[self.index]
-            offset = offset - 128
-        elif page == 2 :
-            sysfs_sfp_i2c_client_eeprom_path = self.port_to_eeprom_2_mapping[self.index]
-            offset = offset - 128
-        elif page == 3 :
-            sysfs_sfp_i2c_client_eeprom_path = self.port_to_eeprom_3_mapping[self.index]
-            offset = offset - 128
-
-        elif page == 11 :
-            sysfs_sfp_i2c_client_eeprom_path = self.port_to_eeprom_11_mapping[self.index]
-            offset = offset - 128
-        else:
-            sysfs_sfp_i2c_client_eeprom_path = self.port_to_eeprom_low_mapping[self.index]
-            offset = offset - 128
-
-        try:
-            sysfsfile_eeprom = open(sysfs_sfp_i2c_client_eeprom_path, mode="rb", buffering=0)
-            sysfsfile_eeprom.seek(offset)
-            raw = sysfsfile_eeprom.read(num_bytes)
-            if sys.version_info[0] >= 3:
-                for n in range(0, num_bytes):
-                    eeprom_raw[n] = hex(raw[n])[2:].zfill(2)
-            else:
-                for n in range(0, num_bytes):
-                    eeprom_raw[n] = hex(ord(raw[n]))[2:].zfill(2)
-
-        except BaseException:
-            pass
-        finally:
-            if sysfsfile_eeprom:
-                sysfsfile_eeprom.close()
-
-        return eeprom_raw
-
-    def _detect_sfp_type(self, sfp_type):
-        eeprom_raw = []
-        eeprom_raw = self._read_eeprom_specific_bytes(XCVR_TYPE_OFFSET, XCVR_TYPE_WIDTH)
-        if eeprom_raw:
-            if eeprom_raw[0] in QSFP_TYPE_CODE_LIST:
-                self.sfp_type = QSFP_TYPE
-                self.abbrv = type_abbrv_name[eeprom_raw[0]]
-            elif eeprom_raw[0] in QSFP_DD_TYPE_CODE_LIST:
-                self.sfp_type = QSFP_DD_TYPE
-                self.abbrv = type_abbrv_name[eeprom_raw[0]]
-            else:
-                # we don't regonize this identifier value, treat the xSFP module as the default type
-                self.sfp_type = sfp_type
-                logger.log_info("Identifier value of {} module {} is {} which isn't regonized and will be treated as default type ({})".format(
-                    sfp_type, self.index, eeprom_raw[0], sfp_type
-                ))
-        else:
-            # eeprom_raw being None indicates the module is not present.
-            # in this case we treat it as the default type according to the SKU
-            self.sfp_type = sfp_type
-            self.abbrv = type_abbrv_name['18']
-
-    def _dom_capability_detect(self):
-
-        self.dom_channel_monitor_supported = True
-        self.dom_module_monitor_supported = True
-        self.dom_channel_treshold_supported = True
-        self.dom_module_treshold_supported = True
-
-        self.dom_supported = False
-        self.dom_temp_supported = False
-        self.dom_volt_supported = False
-        self.dom_rx_power_supported = False
-        self.dom_tx_bias_supported = False
-        self.dom_tx_power_supported = False
-        self.dom_thresholds_supported =False
-
-
-        if self.sfp_type == QSFP_TYPE:
-            sfpi_obj = sff8436InterfaceId()
-            if sfpi_obj is None:
-                self.dom_supported = False
-            offset = 128
-
-            # QSFP capability byte parse, through this byte can know whether it support tx_power or not.
-            # TODO: in the future when decided to migrate to support SFF-8636 instead of SFF-8436,
-            # need to add more code for determining the capability and version compliance
-            # in SFF-8636 dom capability definitions evolving with the versions.
-            qsfp_dom_capability_raw = self._read_eeprom_specific_bytes((offset + XCVR_DOM_CAPABILITY_OFFSET), XCVR_DOM_CAPABILITY_WIDTH)
-            if qsfp_dom_capability_raw is not None:
-                qsfp_version_compliance_raw = self._read_eeprom_specific_bytes(QSFP_VERSION_COMPLIANCE_OFFSET, QSFP_VERSION_COMPLIANCE_WIDTH)
-                qsfp_version_compliance = int(qsfp_version_compliance_raw[0], 16)
-                dom_capability = sfpi_obj.parse_dom_capability(qsfp_dom_capability_raw, 0)
-                if qsfp_version_compliance >= 0x08:
-                    self.dom_temp_supported = dom_capability['data']['Temp_support']['value'] == 'On'
-                    self.dom_volt_supported = dom_capability['data']['Voltage_support']['value'] == 'On'
-                    self.dom_rx_power_supported = dom_capability['data']['Rx_power_support']['value'] == 'On'
-                    self.dom_tx_power_supported = dom_capability['data']['Tx_power_support']['value'] == 'On'
-                else:
-                    self.dom_temp_supported = True
-                    self.dom_volt_supported = True
-                    self.dom_rx_power_supported = dom_capability['data']['Rx_power_support']['value'] == 'On'
-                    self.dom_tx_power_supported = True
-                self.dom_supported = True
-                sfpd_obj = sff8436Dom()
-                if sfpd_obj is None:
-                    return None
-                qsfp_option_value_raw = self._read_eeprom_specific_bytes(QSFP_OPTION_VALUE_OFFSET, QSFP_OPTION_VALUE_WIDTH)
-                if qsfp_option_value_raw is not None:
-                    optional_capability = sfpd_obj.parse_option_params(qsfp_option_value_raw, 0)
-                    self.dom_tx_disable_supported = optional_capability['data']['TxDisable']['value'] == 'On'
-                dom_status_indicator = sfpd_obj.parse_dom_status_indicator(qsfp_version_compliance_raw, 1)
-                self.qsfp_page3_available = dom_status_indicator['data']['FlatMem']['value'] == 'Off'
-            else:
-                self.dom_supported = False
-                self.dom_temp_supported = False
-                self.dom_volt_supported = False
-                self.dom_rx_power_supported = False
-                self.dom_tx_power_supported = False
-                self.qsfp_page3_available = False
-
-        elif self.sfp_type == QSFP_DD_TYPE:
-            sfpi_obj = qsfp_dd_InterfaceId()
-            if sfpi_obj is None:
-                self.dom_supported = False
-
-            self.dom_temp_supported = True
-            self.dom_volt_supported = True
-            self.dom_rx_tx_power_bias_supported = False
-            self.dom_tx_bias_power_supported = True
-
-            # two types of QSFP-DD cable types supported: Copper and Optical.
-            qsfp_dom_capability_raw = self._read_eeprom_specific_bytes(QSFP_DD_FLAT_MEM['offset'], QSFP_DD_FLAT_MEM['width'], QSFP_DD_FLAT_MEM['page'])
-            if qsfp_dom_capability_raw is not None:
-                dom_capability = sfpi_obj.parse_dom_capability(qsfp_dom_capability_raw, 0)
-                if dom_capability['data']['Flat_MEM']['value'] == 'Off':
-
-                    ext_dd = ext_qsfp_dd()
-                    mon_sup_raw = self._read_eeprom_specific_bytes(QSFP_DD_MON_SUPPORT['offset'], QSFP_DD_MON_SUPPORT['width'], QSFP_DD_MON_SUPPORT['page'])
-                    mon_sup_data = ext_dd.parse_mon_capability(mon_sup_raw, 0)
-
-                    self.dom_thresholds_supported = mon_sup_data['data']['Tx_power_support']['value'] == 'On'
-                    self.dom_rx_power_supported = mon_sup_data['data']['Rx_power_support']['value'] == 'On'
-                    self.dom_tx_power_supported = mon_sup_data['data']['Tx_power_support']['value'] == 'On'
-                    self.dom_tx_bias_supported = mon_sup_data['data']['Tx_bias_support']['value'] == 'On'
-                    #self.dom_temp_supported = mon_sup_data['data']['Temp_support']['value'] == 'On'
-                    #self.dom_volt_supported = mon_sup_data['data']['Voltage_support']['value'] == 'On'
-                    self.dom_supported = True
-
-        else:
-            self.dom_supported = False
-            self.dom_temp_supported = False
-            self.dom_volt_supported = False
-            self.dom_rx_power_supported = False
-            self.dom_tx_power_supported = False
-
-    def _convert_string_to_num(self, value_str):
-        if "-inf" in value_str:
-            return '-inf'
-        elif "Unknown" in value_str:
-            return 'N/A'
-        elif 'dBm' in value_str:
-            t_str = value_str.rstrip('dBm')
-            return float(t_str)
-        elif 'mA' in value_str:
-            t_str = value_str.rstrip('mA')
-            return float(t_str)
-        elif 'C' in value_str:
-            t_str = value_str.rstrip('C')
-            return float(t_str)
-        elif 'Volts' in value_str:
-            t_str = value_str.rstrip('Volts')
-            return float(t_str)
-        else:
-            return 'N/A'
-
-    def get_transceiver_info(self):
-        """
-        Retrieves transceiver info of this SFP
-
-        Returns:
-            A dict which contains following keys/values :
-        ================================================================================
-        keys                       |Value Format   |Information
-        ---------------------------|---------------|----------------------------
-        type                       |1*255VCHAR     |type of SFP
-        hardware_rev               |1*255VCHAR     |hardware version of SFP
-        serial                     |1*255VCHAR     |serial number of the SFP
-        manufacturer               |1*255VCHAR     |SFP vendor name
-        model                      |1*255VCHAR     |SFP model name
-        connector                  |1*255VCHAR     |connector information
-        encoding                   |1*255VCHAR     |encoding information
-        ext_identifier             |1*255VCHAR     |extend identifier
-        ext_rateselect_compliance  |1*255VCHAR     |extended rateSelect compliance
-        cable_length               |INT            |cable length in m
-        mominal_bit_rate           |INT            |nominal bit rate by 100Mbs
-        specification_compliance   |1*255VCHAR     |specification compliance
-        vendor_date                |1*255VCHAR     |vendor date
-        vendor_oui                 |1*255VCHAR     |vendor OUI
-        application_advertisement  |1*255VCHAR     |supported applications advertisement
-        ================================================================================
-        """
-        self.reinit()
-        info_dict_keys = [
-        'type', 'hardware_rev', 'serial', 'manufacturer',
-        'model', 'connector', 'encoding', 'ext_identifier',
-        'ext_rateselect_compliance', 'cable_type', 'cable_length',
-        'nominal_bit_rate', 'specification_compliance', 'vendor_date',
-        'vendor_oui', 'application_advertisement', 'type_abbrv_name']
-
-        transceiver_info_dict = {}
-        compliance_code_dict = {}
-        transceiver_info_dict = dict.fromkeys(info_dict_keys, "NA")
-        transceiver_info_dict["specification_compliance"] = '{}'
-        transceiver_info_dict['type_abbrv_name'] = self.abbrv
-
-        #QSFP
-        if self.sfp_type == QSFP_TYPE:
-            offset = 128
-            vendor_rev_width = XCVR_HW_REV_WIDTH_QSFP
-            interface_info_bulk_width = XCVR_INTFACE_BULK_WIDTH_QSFP
-
-            sfpi_obj = sff8436InterfaceId()
-            if sfpi_obj is None:
-                print("Error: sfp_object open failed")
-                return None
-
-            sfp_interface_bulk_raw = self._read_eeprom_specific_bytes(offset + XCVR_INTERFACE_DATA_START, XCVR_INTERFACE_DATA_SIZE)
-            if sfp_interface_bulk_raw is None:
-                return None
-
-            start = XCVR_INTFACE_BULK_OFFSET - XCVR_INTERFACE_DATA_START
-            end = start + interface_info_bulk_width
-            sfp_interface_bulk_data = sfpi_obj.parse_sfp_info_bulk(sfp_interface_bulk_raw[start : end], 0)
-
-            start = XCVR_VENDOR_NAME_OFFSET - XCVR_INTERFACE_DATA_START
-            end = start + XCVR_VENDOR_NAME_WIDTH
-            sfp_vendor_name_data = sfpi_obj.parse_vendor_name(sfp_interface_bulk_raw[start : end], 0)
-
-            start = XCVR_VENDOR_PN_OFFSET - XCVR_INTERFACE_DATA_START
-            end = start + XCVR_VENDOR_PN_WIDTH
-            sfp_vendor_pn_data = sfpi_obj.parse_vendor_pn(sfp_interface_bulk_raw[start : end], 0)
-
-            start = XCVR_HW_REV_OFFSET - XCVR_INTERFACE_DATA_START
-            end = start + vendor_rev_width
-            sfp_vendor_rev_data = sfpi_obj.parse_vendor_rev(sfp_interface_bulk_raw[start : end], 0)
-
-            start = XCVR_VENDOR_SN_OFFSET - XCVR_INTERFACE_DATA_START
-            end = start + XCVR_VENDOR_SN_WIDTH
-            sfp_vendor_sn_data = sfpi_obj.parse_vendor_sn(sfp_interface_bulk_raw[start : end], 0)
-
-            start = XCVR_VENDOR_OUI_OFFSET - XCVR_INTERFACE_DATA_START
-            end = start + XCVR_VENDOR_OUI_WIDTH
-            sfp_vendor_oui_data = sfpi_obj.parse_vendor_oui(sfp_interface_bulk_raw[start : end], 0)
-
-            start = XCVR_VENDOR_DATE_OFFSET - XCVR_INTERFACE_DATA_START
-            end = start + XCVR_VENDOR_DATE_WIDTH
-            sfp_vendor_date_data = sfpi_obj.parse_vendor_date(sfp_interface_bulk_raw[start : end], 0)
-
-            transceiver_info_dict['type'] = sfp_interface_bulk_data['data']['type']['value']
-            transceiver_info_dict['manufacturer'] = sfp_vendor_name_data['data']['Vendor Name']['value']
-            transceiver_info_dict['model'] = sfp_vendor_pn_data['data']['Vendor PN']['value']
-            transceiver_info_dict['hardware_rev'] = sfp_vendor_rev_data['data']['Vendor Rev']['value']
-            transceiver_info_dict['serial'] = sfp_vendor_sn_data['data']['Vendor SN']['value']
-            transceiver_info_dict['vendor_oui'] = sfp_vendor_oui_data['data']['Vendor OUI']['value']
-            transceiver_info_dict['vendor_date'] = sfp_vendor_date_data['data']['VendorDataCode(YYYY-MM-DD Lot)']['value']
-            transceiver_info_dict['connector'] = sfp_interface_bulk_data['data']['Connector']['value']
-            transceiver_info_dict['encoding'] = sfp_interface_bulk_data['data']['EncodingCodes']['value']
-            transceiver_info_dict['ext_identifier'] = sfp_interface_bulk_data['data']['Extended Identifier']['value']
-            transceiver_info_dict['ext_rateselect_compliance'] = sfp_interface_bulk_data['data']['RateIdentifier']['value']
-            transceiver_info_dict['application_advertisement'] = 'N/A'
-
-            for key in qsfp_cable_length_tup:
-                if key in sfp_interface_bulk_data['data']:
-                    transceiver_info_dict['cable_type'] = key
-                    transceiver_info_dict['cable_length'] = str(sfp_interface_bulk_data['data'][key]['value'])
-
-            for key in qsfp_compliance_code_tup:
-                if key in sfp_interface_bulk_data['data']['Specification compliance']['value']:
-                    compliance_code_dict[key] = sfp_interface_bulk_data['data']['Specification compliance']['value'][key]['value']
-            sfp_ext_specification_compliance_raw = self._read_eeprom_specific_bytes(offset + XCVR_EXT_SPECIFICATION_COMPLIANCE_OFFSET, XCVR_EXT_SPECIFICATION_COMPLIANCE_WIDTH)
-            if sfp_ext_specification_compliance_raw is not None:
-                sfp_ext_specification_compliance_data = sfpi_obj.parse_ext_specification_compliance(sfp_ext_specification_compliance_raw[0 : 1], 0)
-                if sfp_ext_specification_compliance_data['data']['Extended Specification compliance']['value'] != "Unspecified":
-                    compliance_code_dict['Extended Specification compliance'] = sfp_ext_specification_compliance_data['data']['Extended Specification compliance']['value']
-            transceiver_info_dict['specification_compliance'] = str(compliance_code_dict)
-            transceiver_info_dict['nominal_bit_rate'] = str(sfp_interface_bulk_data['data']['Nominal Bit Rate(100Mbs)']['value'])
-
-        #QSFP-DD
-        else:
-            offset = 128
-
-            sfpi_obj = qsfp_dd_InterfaceId()
-            if sfpi_obj is None:
-                print("Error: sfp_object open failed")
-                return None
-
-            sfp_type_raw = self._read_eeprom_specific_bytes((offset + QSFP_DD_TYPE_OFFSET), XCVR_TYPE_WIDTH)
-            if sfp_type_raw is not None:
-                sfp_type_data = sfpi_obj.parse_sfp_type(sfp_type_raw, 0)
-            else:
-                return None
-
-            sfp_vendor_name_raw = self._read_eeprom_specific_bytes((offset + QSFP_DD_VENDOR_NAME_OFFSET), XCVR_VENDOR_NAME_WIDTH)
-            if sfp_vendor_name_raw is not None:
-                sfp_vendor_name_data = sfpi_obj.parse_vendor_name(sfp_vendor_name_raw, 0)
-            else:
-                return None
-
-            sfp_vendor_pn_raw = self._read_eeprom_specific_bytes((offset + QSFP_DD_VENDOR_PN_OFFSET), XCVR_VENDOR_PN_WIDTH)
-            if sfp_vendor_pn_raw is not None:
-                sfp_vendor_pn_data = sfpi_obj.parse_vendor_pn(sfp_vendor_pn_raw, 0)
-            else:
-                return None
-
-            sfp_vendor_rev_raw = self._read_eeprom_specific_bytes((offset + XCVR_HW_REV_OFFSET_QSFP_DD), XCVR_HW_REV_WIDTH_QSFP_DD)
-            if sfp_vendor_rev_raw is not None:
-                sfp_vendor_rev_data = sfpi_obj.parse_vendor_rev(sfp_vendor_rev_raw, 0)
-            else:
-                return None
-
-            sfp_vendor_sn_raw = self._read_eeprom_specific_bytes((offset + QSFP_DD_VENDOR_SN_OFFSET), XCVR_VENDOR_SN_WIDTH)
-            if sfp_vendor_sn_raw is not None:
-                sfp_vendor_sn_data = sfpi_obj.parse_vendor_sn(sfp_vendor_sn_raw, 0)
-            else:
-                return None
-
-            sfp_vendor_oui_raw = self._read_eeprom_specific_bytes((offset + QSFP_DD_VENDOR_OUI_OFFSET), XCVR_VENDOR_OUI_WIDTH)
-            if sfp_vendor_oui_raw is not None:
-                sfp_vendor_oui_data = sfpi_obj.parse_vendor_oui(sfp_vendor_oui_raw, 0)
-            else:
-                return None
-
-            sfp_vendor_date_raw = self._read_eeprom_specific_bytes((offset + XCVR_VENDOR_DATE_OFFSET_QSFP_DD), XCVR_VENDOR_DATE_WIDTH_QSFP_DD)
-            if sfp_vendor_date_raw is not None:
-                sfp_vendor_date_data = sfpi_obj.parse_vendor_date(sfp_vendor_date_raw, 0)
-            else:
-                return None
-
-            sfp_connector_raw = self._read_eeprom_specific_bytes((offset + XCVR_CONNECTOR_OFFSET_QSFP_DD), XCVR_CONNECTOR_WIDTH_QSFP_DD)
-            if sfp_connector_raw is not None:
-                sfp_connector_data = sfpi_obj.parse_connector(sfp_connector_raw, 0)
-            else:
-                return None
-
-            sfp_ext_identifier_raw = self._read_eeprom_specific_bytes((offset + XCVR_EXT_TYPE_OFFSET_QSFP_DD), XCVR_EXT_TYPE_WIDTH_QSFP_DD)
-            if sfp_ext_identifier_raw is not None:
-                sfp_ext_identifier_data = sfpi_obj.parse_ext_iden(sfp_ext_identifier_raw, 0)
-            else:
-                return None
-
-            sfp_cable_len_raw = self._read_eeprom_specific_bytes((offset + XCVR_CABLE_LENGTH_OFFSET_QSFP_DD), XCVR_CABLE_LENGTH_WIDTH_QSFP_DD)
-            if sfp_cable_len_raw is not None:
-                sfp_cable_len_data = sfpi_obj.parse_cable_len(sfp_cable_len_raw, 0)
-            else:
-                return None
-
-            sfp_media_type_raw = self._read_eeprom_specific_bytes(XCVR_MEDIA_TYPE_OFFSET_QSFP_DD, XCVR_MEDIA_TYPE_WIDTH_QSFP_DD)
-            if sfp_media_type_raw is not None:
-                sfp_media_type_dict = sfpi_obj.parse_media_type(sfp_media_type_raw, 0)
-                if sfp_media_type_dict is None:
-                    return None
-
-                transceiver_info_dict['specification_compliance'] = type_of_media_interface[sfp_media_type_raw[0]]
-                host_media_list = ""
-                sfp_application_type_first_list = self._read_eeprom_specific_bytes((XCVR_FIRST_APPLICATION_LIST_OFFSET_QSFP_DD), XCVR_FIRST_APPLICATION_LIST_WIDTH_QSFP_DD)
-                possible_application_count = 8
-                if sfp_application_type_first_list is not None:
-                    sfp_application_type_list = sfp_application_type_first_list
-                else:
-                    return None
-
-                for i in range(0, possible_application_count):
-                    if sfp_application_type_list[i * 4] == 'ff':
-                        break
-                    host_electrical, media_interface = sfpi_obj.parse_application(sfp_media_type_dict, sfp_application_type_list[i * 4], sfp_application_type_list[i * 4 + 1])
-                    host_media_list = host_media_list + host_electrical + ' - ' + media_interface + '\n\t\t\t\t   '
-            else:
-                return None
-
-            transceiver_info_dict['type'] = str(sfp_type_data['data']['type']['value'])
-            transceiver_info_dict['manufacturer'] = str(sfp_vendor_name_data['data']['Vendor Name']['value'])
-            transceiver_info_dict['model'] = str(sfp_vendor_pn_data['data']['Vendor PN']['value'])
-            transceiver_info_dict['hardware_rev'] = str(sfp_vendor_rev_data['data']['Vendor Rev']['value'])
-            transceiver_info_dict['serial'] = str(sfp_vendor_sn_data['data']['Vendor SN']['value'])
-            transceiver_info_dict['vendor_oui'] = str(sfp_vendor_oui_data['data']['Vendor OUI']['value'])
-            transceiver_info_dict['vendor_date'] = str(sfp_vendor_date_data['data']['VendorDataCode(YYYY-MM-DD Lot)']['value'])
-            transceiver_info_dict['connector'] = str(sfp_connector_data['data']['Connector']['value'])
-            transceiver_info_dict['encoding'] = "Not supported for CMIS cables"
-            transceiver_info_dict['ext_identifier'] = str(sfp_ext_identifier_data['data']['Extended Identifier']['value'])
-            transceiver_info_dict['ext_rateselect_compliance'] = "Not supported for CMIS cables"
-            transceiver_info_dict['cable_type'] = "Length Cable Assembly(m)"
-            transceiver_info_dict['cable_length'] = str(sfp_cable_len_data['data']['Length Cable Assembly(m)']['value'])
-            transceiver_info_dict['nominal_bit_rate'] = "Not supported for CMIS cables"
-            transceiver_info_dict['application_advertisement'] = host_media_list
-
-        return transceiver_info_dict
-
-    def get_transceiver_bulk_status(self):
-        """
-        Retrieves transceiver bulk status of this SFP
-
-        Returns:
-            A dict which contains following keys/values :
-        ========================================================================
-        keys                       |Value Format   |Information
-        ---------------------------|---------------|----------------------------
-        RX LOS                     |BOOLEAN        |RX lost-of-signal status,
-                                   |               |True if has RX los, False if not.
-        TX FAULT                   |BOOLEAN        |TX fault status,
-                                   |               |True if has TX fault, False if not.
-        Reset status               |BOOLEAN        |reset status,
-                                   |               |True if SFP in reset, False if not.
-        LP mode                    |BOOLEAN        |low power mode status,
-                                   |               |True in lp mode, False if not.
-        TX disable                 |BOOLEAN        |TX disable status,
-                                   |               |True TX disabled, False if not.
-        TX disabled channel        |HEX            |disabled TX channles in hex,
-                                   |               |bits 0 to 3 represent channel 0
-                                   |               |to channel 3.
-        Temperature                |INT            |module temperature in Celsius
-        Voltage                    |INT            |supply voltage in mV
-        TX bias                    |INT            |TX Bias Current in mA
-        RX power                   |INT            |received optical power in mW
-        TX power                   |INT            |TX output power in mW
-        ========================================================================
-        """
-        self.reinit()
-        transceiver_dom_info_dict = {}
-
-        dom_info_dict_keys = ['temperature',    'voltage',
-                              'rx1power',       'rx2power',
-                              'rx3power',       'rx4power',
-                              'rx5power',       'rx6power',
-                              'rx7power',       'rx8power',
-                              'tx1bias',        'tx2bias',
-                              'tx3bias',        'tx4bias',
-                              'tx5bias',        'tx6bias',
-                              'tx7bias',        'tx8bias',
-                              'tx1power',       'tx2power',
-                              'tx3power',       'tx4power',
-                              'tx5power',       'tx6power',
-                              'tx7power',       'tx8power'
-                             ]
-        transceiver_dom_info_dict = dict.fromkeys(dom_info_dict_keys, 'N/A')
-
-        #QSFP
-        if self.sfp_type == QSFP_TYPE:
-            if not self.dom_supported:
-                return transceiver_dom_info_dict
-
-            offset = 0
-            sfpd_obj = sff8436Dom()
-            if sfpd_obj is None:
-                return transceiver_dom_info_dict
-
-            dom_data_raw = self._read_eeprom_specific_bytes((offset + QSFP_DOM_BULK_DATA_START), QSFP_DOM_BULK_DATA_SIZE)
-            if dom_data_raw is None:
-                return transceiver_dom_info_dict
-
-            if self.dom_module_monitor_supported:
-                if self.dom_temp_supported:
-                    start = QSFP_TEMPE_OFFSET - QSFP_DOM_BULK_DATA_START
-                    end = start + QSFP_TEMPE_WIDTH
-                    dom_temperature_data = sfpd_obj.parse_temperature(dom_data_raw[start : end], 0)
-                    temp = self._convert_string_to_num(dom_temperature_data['data']['Temperature']['value'])
-                    if temp is not None:
-                        transceiver_dom_info_dict['temperature'] = temp
-
-                if self.dom_volt_supported:
-                    start = QSFP_VOLT_OFFSET - QSFP_DOM_BULK_DATA_START
-                    end = start + QSFP_VOLT_WIDTH
-                    dom_voltage_data = sfpd_obj.parse_voltage(dom_data_raw[start : end], 0)
-                    volt = self._convert_string_to_num(dom_voltage_data['data']['Vcc']['value'])
-                    if volt is not None:
-                        transceiver_dom_info_dict['voltage'] = volt
-            if self.dom_channel_monitor_supported:
-                start = QSFP_CHANNL_MON_OFFSET - QSFP_DOM_BULK_DATA_START
-                end = start + QSFP_CHANNL_MON_WITH_TX_POWER_WIDTH
-                dom_channel_monitor_data = sfpd_obj.parse_channel_monitor_params_with_tx_power(dom_data_raw[start : end], 0)
-
-                if self.dom_tx_power_supported:
-                    transceiver_dom_info_dict['tx1bias'] = dom_channel_monitor_data['data']['TX1Bias']['value']
-                    transceiver_dom_info_dict['tx2bias'] = dom_channel_monitor_data['data']['TX2Bias']['value']
-                    transceiver_dom_info_dict['tx3bias'] = dom_channel_monitor_data['data']['TX3Bias']['value']
-                    transceiver_dom_info_dict['tx4bias'] = dom_channel_monitor_data['data']['TX4Bias']['value']
-                    transceiver_dom_info_dict['tx1power'] = self._convert_string_to_num(dom_channel_monitor_data['data']['TX1Power']['value'])
-                    transceiver_dom_info_dict['tx2power'] = self._convert_string_to_num(dom_channel_monitor_data['data']['TX2Power']['value'])
-                    transceiver_dom_info_dict['tx3power'] = self._convert_string_to_num(dom_channel_monitor_data['data']['TX3Power']['value'])
-                    transceiver_dom_info_dict['tx4power'] = self._convert_string_to_num(dom_channel_monitor_data['data']['TX4Power']['value'])
-
-                if self.dom_rx_power_supported:
-                    transceiver_dom_info_dict['rx1power'] = self._convert_string_to_num(dom_channel_monitor_data['data']['RX1Power']['value'])
-                    transceiver_dom_info_dict['rx2power'] = self._convert_string_to_num(dom_channel_monitor_data['data']['RX2Power']['value'])
-                    transceiver_dom_info_dict['rx3power'] = self._convert_string_to_num(dom_channel_monitor_data['data']['RX3Power']['value'])
-                    transceiver_dom_info_dict['rx4power'] = self._convert_string_to_num(dom_channel_monitor_data['data']['RX4Power']['value'])
-
-
-        #QSFP-DD
-        else:
-
-            sfpd_obj = qsfp_dd_Dom()
-            if sfpd_obj is None:
-                return transceiver_dom_info_dict
-
-            if self.dom_module_monitor_supported:
-
-                if self.dom_temp_supported:
-                    dom_data_raw = self._read_eeprom_specific_bytes(QSFP_DD_TEMPE_MON['offset'], QSFP_DD_TEMPE_MON['width'], QSFP_DD_TEMPE_MON['page'])
-                    dom_temperature_data = sfpd_obj.parse_temperature(dom_data_raw, 0)
-                    temp = self._convert_string_to_num(dom_temperature_data['data']['Temperature']['value'])
-                    if temp is not None:
-                        transceiver_dom_info_dict['temperature'] = temp
-
-                if self.dom_volt_supported:
-                    dom_data_raw = self._read_eeprom_specific_bytes(QSFP_DD_VOLT_MON['offset'], QSFP_DD_VOLT_MON['width'], QSFP_DD_VOLT_MON['page'])
-                    dom_voltage_data = sfpd_obj.parse_voltage(dom_data_raw, 0)
-                    volt = self._convert_string_to_num(dom_voltage_data['data']['Vcc']['value'])
-                    if volt is not None:
-                        transceiver_dom_info_dict['voltage'] = volt
-            if self.dom_channel_monitor_supported:
-
-                dom_data_raw = self._read_eeprom_specific_bytes(QSFP_DD_CHANNL_MON['offset'], QSFP_DD_CHANNL_MON['width'], QSFP_DD_CHANNL_MON['page'])
-                dom_channel_monitor_data =  sfpd_obj.parse_channel_monitor_params(dom_data_raw, 0)
-                if self.dom_tx_power_supported:
-                    transceiver_dom_info_dict['tx1power'] = dom_channel_monitor_data['data']['TX1Power']['value']
-                    transceiver_dom_info_dict['tx2power'] = dom_channel_monitor_data['data']['TX2Power']['value']
-                    transceiver_dom_info_dict['tx3power'] = dom_channel_monitor_data['data']['TX3Power']['value']
-                    transceiver_dom_info_dict['tx4power'] = dom_channel_monitor_data['data']['TX4Power']['value']
-                    transceiver_dom_info_dict['tx5power'] = dom_channel_monitor_data['data']['TX5Power']['value']
-                    transceiver_dom_info_dict['tx6power'] = dom_channel_monitor_data['data']['TX6Power']['value']
-                    transceiver_dom_info_dict['tx7power'] = dom_channel_monitor_data['data']['TX7Power']['value']
-                    transceiver_dom_info_dict['tx8power'] = dom_channel_monitor_data['data']['TX8Power']['value']
-
-                if self.dom_rx_power_supported:
-                    transceiver_dom_info_dict['rx1power'] = dom_channel_monitor_data['data']['RX1Power']['value']
-                    transceiver_dom_info_dict['rx2power'] = dom_channel_monitor_data['data']['RX2Power']['value']
-                    transceiver_dom_info_dict['rx3power'] = dom_channel_monitor_data['data']['RX3Power']['value']
-                    transceiver_dom_info_dict['rx4power'] = dom_channel_monitor_data['data']['RX4Power']['value']
-                    transceiver_dom_info_dict['rx5power'] = dom_channel_monitor_data['data']['RX5Power']['value']
-                    transceiver_dom_info_dict['rx6power'] = dom_channel_monitor_data['data']['RX6Power']['value']
-                    transceiver_dom_info_dict['rx7power'] = dom_channel_monitor_data['data']['RX7Power']['value']
-                    transceiver_dom_info_dict['rx8power'] = dom_channel_monitor_data['data']['RX8Power']['value']
-
-                if self.dom_tx_bias_supported:
-                    transceiver_dom_info_dict['tx1bias'] = dom_channel_monitor_data['data']['TX1Bias']['value']
-                    transceiver_dom_info_dict['tx2bias'] = dom_channel_monitor_data['data']['TX2Bias']['value']
-                    transceiver_dom_info_dict['tx3bias'] = dom_channel_monitor_data['data']['TX3Bias']['value']
-                    transceiver_dom_info_dict['tx4bias'] = dom_channel_monitor_data['data']['TX4Bias']['value']
-                    transceiver_dom_info_dict['tx5bias'] = dom_channel_monitor_data['data']['TX5Bias']['value']
-                    transceiver_dom_info_dict['tx6bias'] = dom_channel_monitor_data['data']['TX6Bias']['value']
-                    transceiver_dom_info_dict['tx7bias'] = dom_channel_monitor_data['data']['TX7Bias']['value']
-                    transceiver_dom_info_dict['tx8bias'] = dom_channel_monitor_data['data']['TX8Bias']['value']
-
-        return transceiver_dom_info_dict
-
-    def get_transceiver_threshold_info(self):
-        """
-        Retrieves transceiver threshold info of this SFP
-
-        Returns:
-            A dict which contains following keys/values :
-        ========================================================================
-        keys                       |Value Format   |Information
-        ---------------------------|---------------|----------------------------
-        temphighalarm              |FLOAT          |High Alarm Threshold value of temperature in Celsius.
-        templowalarm               |FLOAT          |Low Alarm Threshold value of temperature in Celsius.
-        temphighwarning            |FLOAT          |High Warning Threshold value of temperature in Celsius.
-        templowwarning             |FLOAT          |Low Warning Threshold value of temperature in Celsius.
-        vcchighalarm               |FLOAT          |High Alarm Threshold value of supply voltage in mV.
-        vcclowalarm                |FLOAT          |Low Alarm Threshold value of supply voltage in mV.
-        vcchighwarning             |FLOAT          |High Warning Threshold value of supply voltage in mV.
-        vcclowwarning              |FLOAT          |Low Warning Threshold value of supply voltage in mV.
-        rxpowerhighalarm           |FLOAT          |High Alarm Threshold value of received power in dBm.
-        rxpowerlowalarm            |FLOAT          |Low Alarm Threshold value of received power in dBm.
-        rxpowerhighwarning         |FLOAT          |High Warning Threshold value of received power in dBm.
-        rxpowerlowwarning          |FLOAT          |Low Warning Threshold value of received power in dBm.
-        txpowerhighalarm           |FLOAT          |High Alarm Threshold value of transmit power in dBm.
-        txpowerlowalarm            |FLOAT          |Low Alarm Threshold value of transmit power in dBm.
-        txpowerhighwarning         |FLOAT          |High Warning Threshold value of transmit power in dBm.
-        txpowerlowwarning          |FLOAT          |Low Warning Threshold value of transmit power in dBm.
-        txbiashighalarm            |FLOAT          |High Alarm Threshold value of tx Bias Current in mA.
-        txbiaslowalarm             |FLOAT          |Low Alarm Threshold value of tx Bias Current in mA.
-        txbiashighwarning          |FLOAT          |High Warning Threshold value of tx Bias Current in mA.
-        txbiaslowwarning           |FLOAT          |Low Warning Threshold value of tx Bias Current in mA.
-        ========================================================================
-        """
-        self.reinit()
-        transceiver_dom_threshold_info_dict = {}
-
-        dom_info_dict_keys = ['temphighalarm',    'temphighwarning',
-                              'templowalarm',     'templowwarning',
-                              'vcchighalarm',     'vcchighwarning',
-                              'vcclowalarm',      'vcclowwarning',
-                              'rxpowerhighalarm', 'rxpowerhighwarning',
-                              'rxpowerlowalarm',  'rxpowerlowwarning',
-                              'txpowerhighalarm', 'txpowerhighwarning',
-                              'txpowerlowalarm',  'txpowerlowwarning',
-                              'txbiashighalarm',  'txbiashighwarning',
-                              'txbiaslowalarm',   'txbiaslowwarning'
-                             ]
-        transceiver_dom_threshold_info_dict = dict.fromkeys(dom_info_dict_keys, 'N/A')
-
-        #QSFP
-        if self.sfp_type == QSFP_TYPE:
-            if not self.dom_supported or not self.qsfp_page3_available:
-                return transceiver_dom_threshold_info_dict
-
-            # Dom Threshold data starts from offset 384
-            # Revert offset back to 0 once data is retrieved
-            offset = 0
-            sfpd_obj = sff8436Dom()
-            if sfpd_obj is None:
-                return transceiver_dom_threshold_info_dict
-
-            dom_module_threshold_raw = self._read_eeprom_specific_bytes((offset + QSFP_MODULE_THRESHOLD_OFFSET), QSFP_MODULE_THRESHOLD_WIDTH, 3)
-            if dom_module_threshold_raw is None:
-                return transceiver_dom_threshold_info_dict
-
-            dom_module_threshold_data = sfpd_obj.parse_module_threshold_values(dom_module_threshold_raw, 0)
-
-            dom_channel_threshold_raw = self._read_eeprom_specific_bytes((offset + QSFP_CHANNL_THRESHOLD_OFFSET), QSFP_CHANNL_THRESHOLD_WIDTH, 3)
-            if dom_channel_threshold_raw is None:
-                return transceiver_dom_threshold_info_dict
-            dom_channel_threshold_data = sfpd_obj.parse_channel_threshold_values(dom_channel_threshold_raw, 0)
-
-            # Threshold Data
-            if self.dom_module_treshold_supported:
-                transceiver_dom_threshold_info_dict['temphighalarm'] = dom_module_threshold_data['data']['TempHighAlarm']['value']
-                transceiver_dom_threshold_info_dict['temphighwarning'] = dom_module_threshold_data['data']['TempHighWarning']['value']
-                transceiver_dom_threshold_info_dict['templowalarm'] = dom_module_threshold_data['data']['TempLowAlarm']['value']
-                transceiver_dom_threshold_info_dict['templowwarning'] = dom_module_threshold_data['data']['TempLowWarning']['value']
-                transceiver_dom_threshold_info_dict['vcchighalarm'] = dom_module_threshold_data['data']['VccHighAlarm']['value']
-                transceiver_dom_threshold_info_dict['vcchighwarning'] = dom_module_threshold_data['data']['VccHighWarning']['value']
-                transceiver_dom_threshold_info_dict['vcclowalarm'] = dom_module_threshold_data['data']['VccLowAlarm']['value']
-                transceiver_dom_threshold_info_dict['vcclowwarning'] = dom_module_threshold_data['data']['VccLowWarning']['value']
-            if self.dom_channel_treshold_supported:
-                transceiver_dom_threshold_info_dict['rxpowerhighalarm'] = dom_channel_threshold_data['data']['RxPowerHighAlarm']['value']
-                transceiver_dom_threshold_info_dict['rxpowerhighwarning'] = dom_channel_threshold_data['data']['RxPowerHighWarning']['value']
-                transceiver_dom_threshold_info_dict['rxpowerlowalarm'] = dom_channel_threshold_data['data']['RxPowerLowAlarm']['value']
-                transceiver_dom_threshold_info_dict['rxpowerlowwarning'] = dom_channel_threshold_data['data']['RxPowerLowWarning']['value']
-                transceiver_dom_threshold_info_dict['txbiashighalarm'] = dom_channel_threshold_data['data']['TxBiasHighAlarm']['value']
-                transceiver_dom_threshold_info_dict['txbiashighwarning'] = dom_channel_threshold_data['data']['TxBiasHighWarning']['value']
-                transceiver_dom_threshold_info_dict['txbiaslowalarm'] = dom_channel_threshold_data['data']['TxBiasLowAlarm']['value']
-                transceiver_dom_threshold_info_dict['txbiaslowwarning'] = dom_channel_threshold_data['data']['TxBiasLowWarning']['value']
-                transceiver_dom_threshold_info_dict['txpowerhighalarm'] = dom_channel_threshold_data['data']['TxPowerHighAlarm']['value']
-                transceiver_dom_threshold_info_dict['txpowerhighwarning'] = dom_channel_threshold_data['data']['TxPowerHighWarning']['value']
-                transceiver_dom_threshold_info_dict['txpowerlowalarm'] = dom_channel_threshold_data['data']['TxPowerLowAlarm']['value']
-                transceiver_dom_threshold_info_dict['txpowerlowwarning'] = dom_channel_threshold_data['data']['TxPowerLowWarning']['value']
-
-        #QSFP-DD
-        else:
-            if not self.dom_supported:
-                return transceiver_dom_threshold_info_dict
-
-            if not self.dom_thresholds_supported:
-                return transceiver_dom_threshold_info_dict
-
-            sfpd_obj = qsfp_dd_Dom()
-            if sfpd_obj is None:
-                return transceiver_dom_threshold_info_dict
-
-            # page 02 (we put page 2 to byte 256~384)
-            dom_module_threshold_raw = self._read_eeprom_specific_bytes(QSFP_DD_MODULE_THRESHOLD['offset'], QSFP_DD_MODULE_THRESHOLD['width'], QSFP_DD_MODULE_THRESHOLD['page'])
-            if dom_module_threshold_raw is None:
-                return transceiver_dom_threshold_info_dict
-
-            dom_module_threshold_data = sfpd_obj.parse_module_threshold_values(dom_module_threshold_raw, 0)
-
-            # Threshold Data
-            if self.dom_module_treshold_supported:
-                transceiver_dom_threshold_info_dict['temphighalarm'] = dom_module_threshold_data['data']['TempHighAlarm']['value']
-                transceiver_dom_threshold_info_dict['temphighwarning'] = dom_module_threshold_data['data']['TempHighWarning']['value']
-                transceiver_dom_threshold_info_dict['templowalarm'] = dom_module_threshold_data['data']['TempLowAlarm']['value']
-                transceiver_dom_threshold_info_dict['templowwarning'] = dom_module_threshold_data['data']['TempLowWarning']['value']
-                transceiver_dom_threshold_info_dict['vcchighalarm'] = dom_module_threshold_data['data']['VccHighAlarm']['value']
-                transceiver_dom_threshold_info_dict['vcchighwarning'] = dom_module_threshold_data['data']['VccHighWarning']['value']
-                transceiver_dom_threshold_info_dict['vcclowalarm'] = dom_module_threshold_data['data']['VccLowAlarm']['value']
-                transceiver_dom_threshold_info_dict['vcclowwarning'] = dom_module_threshold_data['data']['VccLowWarning']['value']
-            if self.dom_channel_treshold_supported:
-                transceiver_dom_threshold_info_dict['rxpowerhighalarm'] = dom_module_threshold_data['data']['RxPowerHighAlarm']['value']
-                transceiver_dom_threshold_info_dict['rxpowerhighwarning'] = dom_module_threshold_data['data']['RxPowerHighWarning']['value']
-                transceiver_dom_threshold_info_dict['rxpowerlowalarm'] = dom_module_threshold_data['data']['RxPowerLowAlarm']['value']
-                transceiver_dom_threshold_info_dict['rxpowerlowwarning'] = dom_module_threshold_data['data']['RxPowerLowWarning']['value']
-                transceiver_dom_threshold_info_dict['txbiashighalarm'] = dom_module_threshold_data['data']['TxBiasHighAlarm']['value']
-                transceiver_dom_threshold_info_dict['txbiashighwarning'] = dom_module_threshold_data['data']['TxBiasHighWarning']['value']
-                transceiver_dom_threshold_info_dict['txbiaslowalarm'] = dom_module_threshold_data['data']['TxBiasLowAlarm']['value']
-                transceiver_dom_threshold_info_dict['txbiaslowwarning'] = dom_module_threshold_data['data']['TxBiasLowWarning']['value']
-                transceiver_dom_threshold_info_dict['txpowerhighalarm'] = dom_module_threshold_data['data']['TxPowerHighAlarm']['value']
-                transceiver_dom_threshold_info_dict['txpowerhighwarning'] = dom_module_threshold_data['data']['TxPowerHighWarning']['value']
-                transceiver_dom_threshold_info_dict['txpowerlowalarm'] = dom_module_threshold_data['data']['TxPowerLowAlarm']['value']
-                transceiver_dom_threshold_info_dict['txpowerlowwarning'] = dom_module_threshold_data['data']['TxPowerLowWarning']['value']
-
-        return transceiver_dom_threshold_info_dict
+        return presence == True
 
     def get_reset_status(self):
         """
@@ -1044,134 +152,28 @@ def get_reset_status(self):
         # SFP doesn't support this feature
         return False
 
-    def get_rx_los(self):
-        """
-        Retrieves the RX LOS (lost-of-signal) status of SFP
-
-        Returns:
-            A Boolean, True if SFP has RX LOS, False if not.
-            Note : RX LOS status is latched until a call to get_rx_los or a reset.
-        """
-        self.reinit()
-        if not self.dom_supported:
-            return None
-
-        rx_los_list = []
-        #QSFP
-        if self.sfp_type == QSFP_TYPE:
-            offset = 0
-            dom_channel_monitor_raw = self._read_eeprom_specific_bytes((offset + QSFP_CHANNL_RX_LOS_STATUS_OFFSET), QSFP_CHANNL_RX_LOS_STATUS_WIDTH)
-            if dom_channel_monitor_raw is not None:
-                rx_los_data = int(dom_channel_monitor_raw[0], 16)
-                rx_los_list.append(rx_los_data & 0x01 != 0)
-                rx_los_list.append(rx_los_data & 0x02 != 0)
-                rx_los_list.append(rx_los_data & 0x04 != 0)
-                rx_los_list.append(rx_los_data & 0x08 != 0)
-
-        #QSFP-DD
-        else:
-            # page 11h (we put page 2 to byte 384~512)
-            if self.dom_rx_tx_power_bias_supported: #not implement
-                dom_channel_monitor_raw = self._read_eeprom_specific_bytes(QSFP_DD_CHANNL_RX_LOS_STATUS['offset'], QSFP_DD_CHANNL_RX_LOS_STATUS['width'], QSFP_DD_CHANNL_RX_LOS_STATUS['page'])
-                if dom_channel_monitor_raw is not None:
-                    rx_los_data = int(dom_channel_monitor_raw[0], 16)
-                    rx_los_list.append(rx_los_data & 0x01 != 0)
-                    rx_los_list.append(rx_los_data & 0x02 != 0)
-                    rx_los_list.append(rx_los_data & 0x04 != 0)
-                    rx_los_list.append(rx_los_data & 0x08 != 0)
-                    rx_los_list.append(rx_los_data & 0x10 != 0)
-                    rx_los_list.append(rx_los_data & 0x20 != 0)
-                    rx_los_list.append(rx_los_data & 0x40 != 0)
-                    rx_los_list.append(rx_los_data & 0x80 != 0)
-
-        return rx_los_list
-
-    def get_tx_fault(self):
-        """
-        Retrieves the TX fault status of SFP
-
-        Returns:
-            A Boolean, True if SFP has TX fault, False if not
-            Note : TX fault status is lached until a call to get_tx_fault or a reset.
-        """
-        self.reinit()
-        if not self.dom_supported:
-            return None
-
-        tx_fault_list = []
-        #QSFP
-        if self.sfp_type == QSFP_TYPE:
-            offset = 0
-            dom_channel_monitor_raw = self._read_eeprom_specific_bytes((offset + QSFP_CHANNL_TX_FAULT_STATUS_OFFSET), QSFP_CHANNL_TX_FAULT_STATUS_WIDTH)
-            if dom_channel_monitor_raw is not None:
-                tx_fault_data = int(dom_channel_monitor_raw[0], 16)
-                tx_fault_list.append(tx_fault_data & 0x01 != 0)
-                tx_fault_list.append(tx_fault_data & 0x02 != 0)
-                tx_fault_list.append(tx_fault_data & 0x04 != 0)
-                tx_fault_list.append(tx_fault_data & 0x08 != 0)
-
-        #QSFP-DD
-        else:
-            return None
-
-        return tx_fault_list
-
-    def get_tx_disable(self):
+    def reset(self):
         """
-        Retrieves the tx_disable status of this SFP
-
+        Reset SFP and return all user module settings to their default srate.
         Returns:
-            A Boolean, True if tx_disable is enabled, False if disabled
-
-        for QSFP, the disable states of each channel which are the lower 4 bits in byte 85 page a0
-        for SFP, the TX Disable State and Soft TX Disable Select is ORed as the tx_disable status returned
-                 These two bits are bit 7 & 6 in byte 110 page a2 respectively
+            A boolean, True if successful, False if not
         """
-        self.reinit()
-        if not self.dom_supported:
-            return None
-
-        tx_disable_list = []
-        #QSFP
-        if self.sfp_type == QSFP_TYPE:
-            offset = 0
-            dom_channel_monitor_raw = self._read_eeprom_specific_bytes((offset + QSFP_CHANNL_DISABLE_STATUS_OFFSET), QSFP_CHANNL_DISABLE_STATUS_WIDTH)
-            if dom_channel_monitor_raw is not None:
-                tx_disable_data = int(dom_channel_monitor_raw[0], 16)
-                tx_disable_list.append(tx_disable_data & 0x01 != 0)
-                tx_disable_list.append(tx_disable_data & 0x02 != 0)
-                tx_disable_list.append(tx_disable_data & 0x04 != 0)
-                tx_disable_list.append(tx_disable_data & 0x08 != 0)
+        try:
+            if self.index < 16:
+                file_path = self.RESET_1_16_PATH.format(self.port_num)
+            else:
+                file_path = self.RESET_17_32_PATH.format(self.port_num)
 
-        #QSFP-DD
-        else:
-            if self.dom_rx_tx_power_bias_supported: #not implement
-                # page 11h (we put page 1 to byte 384~512)
-                dom_channel_monitor_raw = self._read_eeprom_specific_bytes(QSFP_DD_CHANNL_DISABLE_STATUS['offset'], QSFP_DD_CHANNL_DISABLE_STATUS['width'], QSFP_DD_CHANNL_DISABLE_STATUS['page'])
-                if dom_channel_monitor_raw is not None:
-                    tx_disable_data = int(dom_channel_monitor_raw[0], 16)
-                    tx_disable_list.append(tx_disable_data & 0x01 != 0)
-                    tx_disable_list.append(tx_disable_data & 0x02 != 0)
-                    tx_disable_list.append(tx_disable_data & 0x04 != 0)
-                    tx_disable_list.append(tx_disable_data & 0x08 != 0)
-                    tx_disable_list.append(tx_disable_data & 0x10 != 0)
-                    tx_disable_list.append(tx_disable_data & 0x20 != 0)
-                    tx_disable_list.append(tx_disable_data & 0x40 != 0)
-                    tx_disable_list.append(tx_disable_data & 0x80 != 0)
+            with open(file_path, 'w') as fd:
+                fd.write(str(1))
+                time.sleep(1)
+                fd.write(str(0))
+                time.sleep(1)
 
-        return tx_disable_list
+        except IOError:
+            return False
 
-    def get_tx_disable_channel(self):
-        """
-        Retrieves the TX disabled channels in this SFP
-        Returns:
-            A hex of 4 bits (bit 0 to bit 3 as channel 0 to channel 3) to represent
-            TX channels which have been disabled in this SFP.
-            As an example, a returned value of 0x5 indicates that channel 0
-            and channel 2 have been disabled.
-        """
-        # SFP doesn't support this feature
-        return 0
+        return True
 
     def get_lpmode(self):
         """
@@ -1179,314 +181,47 @@ def get_lpmode(self):
         Returns:
             A Boolean, True if lpmode is enabled, False if disabled
         """
-        # SFP doesn't support this feature
-        return False
-
-    def get_power_override(self):
-        """
-        Retrieves the power-override status of this SFP
-        Returns:
-            A Boolean, True if power-override is enabled, False if disabled
-        """
-        # SFP doesn't support this feature
-        return False
-
-    def get_temperature(self):
-        """
-        Retrieves the temperature of this SFP
-
-        Returns:
-            An integer number of current temperature in Celsius
-        """
-        self.reinit()
-        if not self.dom_supported:
-            return None
-        #QSFP
-        if self.sfp_type == QSFP_TYPE:
-            offset = 0
-
-            sfpd_obj = sff8436Dom()
-            if sfpd_obj is None:
-                return None
-
-            if self.dom_temp_supported:
-                dom_temperature_raw = self._read_eeprom_specific_bytes((offset + QSFP_TEMPE_OFFSET), QSFP_TEMPE_WIDTH)
-                if dom_temperature_raw is not None:
-                    dom_temperature_data = sfpd_obj.parse_temperature(dom_temperature_raw, 0)
-                    temp = self._convert_string_to_num(dom_temperature_data['data']['Temperature']['value'])
-                    return temp
-                else:
-                    return None
-            else:
-                return None
-
-        #QSFP-DD
-        else:
-
-
-            sfpd_obj = qsfp_dd_Dom()
-            if sfpd_obj is None:
-                return None
-
-            if self.dom_temp_supported:
-                dom_temperature_raw = self._read_eeprom_specific_bytes(QSFP_DD_TEMPE_MON['offset'], QSFP_DD_TEMPE_MON['width'], QSFP_DD_TEMPE_MON['page'])
-                if dom_temperature_raw is not None:
-                    dom_temperature_data = sfpd_obj.parse_temperature(dom_temperature_raw, 0)
-                    temp = self._convert_string_to_num(dom_temperature_data['data']['Temperature']['value'])
-                    return temp
-            return None
-
-    def get_voltage(self):
-        """
-        Retrieves the supply voltage of this SFP
-
-        Returns:
-            An integer number of supply voltage in mV
-        """
-        self.reinit()
-        if not self.dom_supported:
-            return None
-
-        #QSFP
-        if self.sfp_type == QSFP_TYPE:
-            offset = 0
-
-            sfpd_obj = sff8436Dom()
-            if sfpd_obj is None:
-                return None
-
-            if self.dom_volt_supported:
-                dom_voltage_raw = self._read_eeprom_specific_bytes((offset + QSFP_VOLT_OFFSET), QSFP_VOLT_WIDTH)
-                if dom_voltage_raw is not None:
-                    dom_voltage_data = sfpd_obj.parse_voltage(dom_voltage_raw, 0)
-                    voltage = self._convert_string_to_num(dom_voltage_data['data']['Vcc']['value'])
-                    return voltage
-                else:
-                    return None
-            return None
-
-        #QSFP-DD
-        else:
-
-            sfpd_obj = qsfp_dd_Dom()
-            if sfpd_obj is None:
-                return None
-
-            if self.dom_volt_supported:
-                dom_voltage_raw = self._read_eeprom_specific_bytes(QSFP_DD_VOLT_MON['offset'], QSFP_DD_VOLT_MON['width'], QSFP_DD_VOLT_MON['page'])
-                if dom_voltage_raw is not None:
-                    dom_voltage_data = sfpd_obj.parse_voltage(dom_voltage_raw, 0)
-                    voltage = self._convert_string_to_num(dom_voltage_data['data']['Vcc']['value'])
-                    return voltage
-            return None
-
-    def get_tx_bias(self):
-        """
-        Retrieves the TX bias current of this SFP
-
-        Returns:
-            A list of four integer numbers, representing TX bias in mA
-            for channel 0 to channel 4.
-            Ex. ['110.09', '111.12', '108.21', '112.09']
-        """
-        self.reinit()
-        tx_bias_list = []
-
-        #QSFP
-        if self.sfp_type == QSFP_TYPE:
-            offset = 0
-
-            sfpd_obj = sff8436Dom()
-            if sfpd_obj is None:
-                return None
-
-            dom_channel_monitor_raw = self._read_eeprom_specific_bytes((offset + QSFP_CHANNL_MON_OFFSET), QSFP_CHANNL_MON_WITH_TX_POWER_WIDTH)
-            if dom_channel_monitor_raw is not None:
-                dom_channel_monitor_data = sfpd_obj.parse_channel_monitor_params_with_tx_power(dom_channel_monitor_raw, 0)
-                tx_bias_list.append(self._convert_string_to_num(dom_channel_monitor_data['data']['TX1Bias']['value']))
-                tx_bias_list.append(self._convert_string_to_num(dom_channel_monitor_data['data']['TX2Bias']['value']))
-                tx_bias_list.append(self._convert_string_to_num(dom_channel_monitor_data['data']['TX3Bias']['value']))
-                tx_bias_list.append(self._convert_string_to_num(dom_channel_monitor_data['data']['TX4Bias']['value']))
-
-        #QSFP-DD
-        else:
-            # page 11h (we put page 1 to byte 384~512)
-            if self.dom_rx_tx_power_bias_supported:
-                sfpd_obj = qsfp_dd_Dom()
-                if sfpd_obj is None:
-                    return None
-
-                if self.dom_tx_bias_power_supported:
-                    dom_tx_bias_raw = self._read_eeprom_specific_bytes(QSFP_DD_TX_BIAS['offset'], QSFP_DD_TX_BIAS['width'], QSFP_DD_TX_BIAS['page'])
-                    if dom_tx_bias_raw is not None:
-                        dom_tx_bias_data = sfpd_obj.parse_dom_tx_bias(dom_tx_bias_raw, 0)
-                        tx_bias_list.append(self._convert_string_to_num(dom_tx_bias_data['data']['TX1Bias']['value']))
-                        tx_bias_list.append(self._convert_string_to_num(dom_tx_bias_data['data']['TX2Bias']['value']))
-                        tx_bias_list.append(self._convert_string_to_num(dom_tx_bias_data['data']['TX3Bias']['value']))
-                        tx_bias_list.append(self._convert_string_to_num(dom_tx_bias_data['data']['TX4Bias']['value']))
-                        tx_bias_list.append(self._convert_string_to_num(dom_tx_bias_data['data']['TX5Bias']['value']))
-                        tx_bias_list.append(self._convert_string_to_num(dom_tx_bias_data['data']['TX6Bias']['value']))
-                        tx_bias_list.append(self._convert_string_to_num(dom_tx_bias_data['data']['TX7Bias']['value']))
-                        tx_bias_list.append(self._convert_string_to_num(dom_tx_bias_data['data']['TX8Bias']['value']))
-
-        return tx_bias_list
-
-    def get_rx_power(self):
-        """
-        Retrieves the received optical power for this SFP
-
-        Returns:
-            A list of four integer numbers, representing received optical
-            power in mW for channel 0 to channel 4.
-            Ex. ['1.77', '1.71', '1.68', '1.70']
-        """
-        self.reinit()
-        rx_power_list = []
-
-        #QSFP
-        if self.sfp_type == QSFP_TYPE:
-            offset = 0
-
-            sfpd_obj = sff8436Dom()
-            if sfpd_obj is None:
-                return None
-
-            if self.dom_rx_power_supported:
-                dom_channel_monitor_raw = self._read_eeprom_specific_bytes((offset + QSFP_CHANNL_MON_OFFSET), QSFP_CHANNL_MON_WITH_TX_POWER_WIDTH)
-                if dom_channel_monitor_raw is not None:
-                    dom_channel_monitor_data = sfpd_obj.parse_channel_monitor_params_with_tx_power(dom_channel_monitor_raw, 0)
-                    rx_power_list.append(self._convert_string_to_num(dom_channel_monitor_data['data']['RX1Power']['value']))
-                    rx_power_list.append(self._convert_string_to_num(dom_channel_monitor_data['data']['RX2Power']['value']))
-                    rx_power_list.append(self._convert_string_to_num(dom_channel_monitor_data['data']['RX3Power']['value']))
-                    rx_power_list.append(self._convert_string_to_num(dom_channel_monitor_data['data']['RX4Power']['value']))
-                else:
-                    return None
-            else:
-                return None
-
-        #QSFP-DD
-        elif self.sfp_type == QSFP_DD_TYPE:
-            # page 11h (we put page 1 to byte 384~512)
-            if self.dom_rx_tx_power_bias_supported:
-                sfpd_obj = qsfp_dd_Dom()
-                if sfpd_obj is None:
-                    return None
-
-                if self.dom_rx_power_supported:
-                    dom_rx_power_raw = self._read_eeprom_specific_bytes(QSFP_DD_RX_POWER['offset'], QSFP_DD_RX_POWER['width'], QSFP_DD_RX_POWER['page'])
-                    if dom_rx_power_raw is not None:
-                        dom_rx_power_data = sfpd_obj.parse_dom_rx_power(dom_rx_power_raw, 0)
-                        rx_power_list.append(self._convert_string_to_num(dom_rx_power_data['data']['RX1Power']['value']))
-                        rx_power_list.append(self._convert_string_to_num(dom_rx_power_data['data']['RX2Power']['value']))
-                        rx_power_list.append(self._convert_string_to_num(dom_rx_power_data['data']['RX3Power']['value']))
-                        rx_power_list.append(self._convert_string_to_num(dom_rx_power_data['data']['RX4Power']['value']))
-                        rx_power_list.append(self._convert_string_to_num(dom_rx_power_data['data']['RX5Power']['value']))
-                        rx_power_list.append(self._convert_string_to_num(dom_rx_power_data['data']['RX6Power']['value']))
-                        rx_power_list.append(self._convert_string_to_num(dom_rx_power_data['data']['RX7Power']['value']))
-                        rx_power_list.append(self._convert_string_to_num(dom_rx_power_data['data']['RX8Power']['value']))
-
-        return rx_power_list
-
-    def get_tx_power(self):
-        """
-        Retrieves the TX power of this SFP
-
-        Returns:
-            A list of four integer numbers, representing TX power in mW
-            for channel 0 to channel 4.
-            Ex. ['1.86', '1.86', '1.86', '1.86']
-        """
-        self.reinit()
-        tx_power_list = []
-
-        #QSFP
-        if self.sfp_type == QSFP_TYPE:
-            offset = 0
-
-            sfpd_obj = sff8436Dom()
-            if sfpd_obj is None:
-                return None
-
-            if self.dom_tx_power_supported:
-                dom_channel_monitor_raw = self._read_eeprom_specific_bytes((offset + QSFP_CHANNL_MON_OFFSET), QSFP_CHANNL_MON_WITH_TX_POWER_WIDTH)
-                if dom_channel_monitor_raw is not None:
-                    dom_channel_monitor_data = sfpd_obj.parse_channel_monitor_params_with_tx_power(dom_channel_monitor_raw, 0)
-                    tx_power_list.append(self._convert_string_to_num(dom_channel_monitor_data['data']['TX1Power']['value']))
-                    tx_power_list.append(self._convert_string_to_num(dom_channel_monitor_data['data']['TX2Power']['value']))
-                    tx_power_list.append(self._convert_string_to_num(dom_channel_monitor_data['data']['TX3Power']['value']))
-                    tx_power_list.append(self._convert_string_to_num(dom_channel_monitor_data['data']['TX4Power']['value']))
-                else:
-                    return None
+        lpmode = False
+        try:
+            if self.index < 16:
+                lpmode_path = self.LPMODE_1_16_PATH.format(self.port_num)
             else:
-                return None
-
-        #QSFP-DD
-        else:
-            # page 11h (we put page 1 to byte 384~512)
-            if self.dom_rx_tx_power_bias_supported:
-                sfpd_obj = qsfp_dd_Dom()
-                if sfpd_obj is None:
-                    return None
-
-                if self.dom_tx_power_supported:
-                    dom_tx_power_raw = self._read_eeprom_specific_bytes(QSFP_DD_TX_POWER['offset'], QSFP_DD_TX_POWER['width'], QSFP_DD_TX_POWER['page'])
-                    if dom_tx_power_raw is not None:
-                        dom_tx_power_data = sfpd_obj.parse_dom_tx_power(dom_tx_power_raw, 0)
-                        tx_power_list.append(self._convert_string_to_num(dom_tx_power_data['data']['TX1Power']['value']))
-                        tx_power_list.append(self._convert_string_to_num(dom_tx_power_data['data']['TX2Power']['value']))
-                        tx_power_list.append(self._convert_string_to_num(dom_tx_power_data['data']['TX3Power']['value']))
-                        tx_power_list.append(self._convert_string_to_num(dom_tx_power_data['data']['TX4Power']['value']))
-                        tx_power_list.append(self._convert_string_to_num(dom_tx_power_data['data']['TX5Power']['value']))
-                        tx_power_list.append(self._convert_string_to_num(dom_tx_power_data['data']['TX6Power']['value']))
-                        tx_power_list.append(self._convert_string_to_num(dom_tx_power_data['data']['TX7Power']['value']))
-                        tx_power_list.append(self._convert_string_to_num(dom_tx_power_data['data']['TX8Power']['value']))
-
-        return tx_power_list
-
-    def reset(self):
-        """
-        Reset SFP and return all user module settings to their default srate.
-        Returns:
-            A boolean, True if successful, False if not
-        """
-        # SFP doesn't support this feature
-        return False
-
-    def tx_disable(self, tx_disable):
-        """
-        Disable SFP TX for all channels
-        Args:
-            tx_disable : A Boolean, True to enable tx_disable mode, False to disable
-                         tx_disable mode.
-        Returns:
-            A boolean, True if tx_disable is set successfully, False if not
-        """
-        # SFP doesn't support this feature
-        return False
-
-    def tx_disable_channel(self, channel, disable):
-        """
-        Sets the tx_disable for specified SFP channels
-        Args:
-            channel : A hex of 4 bits (bit 0 to bit 3) which represent channel 0 to 3,
-                      e.g. 0x5 for channel 0 and channel 2.
-            disable : A boolean, True to disable TX channels specified in channel,
-                      False to enable
-        Returns:
-            A boolean, True if successful, False if not
-        """
-        # SFP doesn't support this feature
-        return False
+                lpmode_path = self.LPMODE_17_32_PATH.format(self.port_num)
+            with open(lpmode_path, 'r') as sfp_lpmode:
+                lpmode = int(sfp_lpmode.read(), 16)
+        except IOError:
+            return False
+        return lpmode == 1
 
     def set_lpmode(self, lpmode):
         """
         Sets the lpmode (low power mode) of SFP
         Args:
             lpmode: A Boolean, True to enable lpmode, False to disable it
-            Note  : lpmode can be overridden by set_power_override
+            Note: lpmode can be overridden by set_power_override
         Returns:
             A boolean, True if lpmode is set successfully, False if not
         """
+        try:
+            if self.index < 16:
+                lpmode_path = self.LPMODE_1_16_PATH.format(self.port_num)
+            else:
+                lpmode_path = self.LPMODE_17_32_PATH.format(self.port_num)
+            val_file = open(lpmode_path, 'w')
+            val_file.write('1' if lpmode else '0')
+            val_file.close()
+            self.set_power_override(True, True if lpmode is True else False)
+            return True
+        except IOError:
+            val_file.close()
+            return False
+
+    def get_power_override(self):
+        """
+        Retrieves the power-override status of this SFP
+        Returns:
+            A Boolean, True if power-override is enabled, False if disabled
+        """
         # SFP doesn't support this feature
         return False
 
@@ -1507,8 +242,38 @@ def set_power_override(self, power_override, power_set):
             A boolean, True if power-override and power_set are set successfully,
             False if not
         """
-        # SFP doesn't support this feature
-        return False
+        if not self.get_presence():
+            return False
+        if self.sfp_type == QSFP_TYPE:
+            try:
+                power_override_bit = (1 << 0) if power_override else 0
+                power_set_bit = (1 << 1) if power_set else (1 << 3)
+
+                # Write to eeprom
+                with open(self.port_to_power_mode_mapping[self.index], "w") as fd:
+                    fd.write(str((power_override_bit | power_set_bit)))
+                    time.sleep(0.01)
+                    fd.close()
+            except Exception as e:
+                print('Error: unable to open file: ', str(e))
+                fd.close()
+                return False
+            return True
+        elif self.sfp_type == QSFP_DD_TYPE:
+            try:
+                power_override_bit = (1 << 6)
+                power_set_bit = (1 << 4) if power_set else (0 << 4)
+
+                # Write to eeprom
+                with open(self.port_to_power_mode_mapping[self.index], "w") as fd:
+                    fd.write(str((power_override_bit | power_set_bit)))
+                    time.sleep(0.01)
+                    fd.close()
+            except Exception as e:
+                print('Error: unable to open file: ', str(e))
+                fd.close()
+                return False
+            return True
 
     def get_name(self):
         """
@@ -1516,32 +281,10 @@ def get_name(self):
             Returns:
             string: The name of the device
         """
-        try:
-            with open(self.port_to_name_mapping[self.index], 'r') as sfp_name:
-                name=sfp_name.read()
-        except IOError:
-            name="Unknown"
 
+        name = 'port'+str(self.index + 1)
         return name
 
-    def get_model(self):
-        """
-        Retrieves the model number (or part number) of the device
-        Returns:
-            string: Model/part number of device
-        """
-        transceiver_dom_info_dict = self.get_transceiver_info()
-        return transceiver_dom_info_dict.get("model", "N/A")
-
-    def get_serial(self):
-        """
-        Retrieves the serial number of the device
-        Returns:
-            string: Serial number of device
-        """
-        transceiver_dom_info_dict = self.get_transceiver_info()
-        return transceiver_dom_info_dict.get("serial", "N/A")
-
     def get_status(self):
         """
         Retrieves the operational status of the device
@@ -1579,3 +322,90 @@ def get_error_description(self):
             return self.SFP_STATUS_OK
         else:
             return self.SFP_STATUS_UNPLUGGED
+
+    def read_eeprom(self, offset, num_bytes):
+        """
+        read eeprom specfic bytes beginning from a random offset with size as num_bytes
+
+        Args:
+             offset :
+                     Integer, the offset from which the read transaction will start
+             num_bytes:
+                     Integer, the number of bytes to be read
+
+        Returns:
+            bytearray, if raw sequence of bytes are read correctly from the offset of size num_bytes
+            None, if the read_eeprom fails
+        """
+        if not self.get_presence():
+            return None
+        if self.sfp_type == None:
+            return None
+
+        return bytearray([int(x, 16) for x in self._read_eeprom_specific_bytes(offset, num_bytes)])
+
+    def write_eeprom(self, offset, num_bytes, write_buffer):
+        """
+        write eeprom specfic bytes beginning from a random offset with size as num_bytes
+        and write_buffer as the required bytes
+
+        Args:
+             offset :
+                     Integer, the offset from which the read transaction will start
+             num_bytes:
+                     Integer, the number of bytes to be written
+             write_buffer:
+                     bytearray, raw bytes buffer which is to be written beginning at the offset
+
+        Returns:
+            a Boolean, true if the write succeeded and false if it did not succeed.
+        """
+        return False
+
+    def _read_eeprom_specific_bytes(self, offset, num_bytes, page = 0):
+        sysfsfile_eeprom = None
+        eeprom_raw = []
+        for i in range(0, num_bytes):
+            eeprom_raw.append("0x00")
+
+        page = (offset // 128) - 1
+
+        if offset < 128:
+            sysfs_sfp_i2c_client_eeprom_path = self.port_to_eeprom_low_mapping[self.index]
+        elif page == 0 :
+            sysfs_sfp_i2c_client_eeprom_path = self.port_to_eeprom_0_mapping[self.index]
+            offset = offset % 128
+        elif page == 1 :
+            sysfs_sfp_i2c_client_eeprom_path = self.port_to_eeprom_1_mapping[self.index]
+            offset = offset % 128
+        elif page == 2 :
+            sysfs_sfp_i2c_client_eeprom_path = self.port_to_eeprom_2_mapping[self.index]
+            offset = offset % 128
+        elif page == 3 :
+            sysfs_sfp_i2c_client_eeprom_path = self.port_to_eeprom_3_mapping[self.index]
+            offset = offset % 128
+        elif page == 11 :
+            sysfs_sfp_i2c_client_eeprom_path = self.port_to_eeprom_11_mapping[self.index]
+            offset = offset % 128
+        else:
+            return eeprom_raw
+
+        try:
+            sysfsfile_eeprom = open(sysfs_sfp_i2c_client_eeprom_path, mode="rb", buffering=0)
+            sysfsfile_eeprom.seek(offset)
+            raw = sysfsfile_eeprom.read(num_bytes)
+            if sys.version_info[0] >= 3:
+                for n in range(0, num_bytes):
+                    eeprom_raw[n] = hex(raw[n])[2:].zfill(2)
+            else:
+                for n in range(0, num_bytes):
+                    eeprom_raw[n] = hex(ord(raw[n]))[2:].zfill(2)
+
+        except BaseException:
+            pass
+        finally:
+            if sysfsfile_eeprom:
+                sysfsfile_eeprom.close()
+
+        return eeprom_raw
+

From df499b6529f6733c24964d9d41b8c6cc29ad16d0 Mon Sep 17 00:00:00 2001
From: mohan-selvaraj <54177569+mohan-selvaraj@users.noreply.github.com>
Date: Mon, 22 Apr 2024 22:08:27 +0530
Subject: [PATCH 0469/1115] bookworm container upgrade for lldp, net-snmp
 (#18150)

* bookworm container upgrade for lldp, net-snmp
* Add patch 0001-SNMP-Stop-spamming-logs-with-statfs-permission-denie.patch

Co-authored-by: Kalimuthu Velappan <kalimuthu.velappan@broadcom.com>
---
 dockers/docker-lldp/Dockerfile.j2             |  2 +-
 dockers/docker-snmp/Dockerfile.j2             |  2 +-
 dockers/docker-snmp/supervisord.conf          | 16 +++++-----
 rules/docker-lldp.mk                          | 10 +++----
 rules/docker-snmp.mk                          | 10 +++----
 rules/snmpd.mk                                | 13 ++++++--
 ...ng-logs-with-statfs-permission-denie.patch | 25 ++++++++++++++++
 ..._BUILD_ARCH_OS-in-order-to-build-ipv.patch | 25 ++++++++++++++++
 ...n-Unbreak-the-enable-minimalist-buil.patch | 30 +++++++++++++++++++
 ...3-enable-parallel-build-for-net-snmp.patch | 18 +++++++++++
 .../cross-compile-changes.patch               | 20 +++++++++++++
 src/snmpd/patch-5.9.3+dfsg/series             |  5 ++++
 12 files changed, 153 insertions(+), 23 deletions(-)
 create mode 100644 src/snmpd/patch-5.9.3+dfsg/0001-SNMP-Stop-spamming-logs-with-statfs-permission-denie.patch
 create mode 100644 src/snmpd/patch-5.9.3+dfsg/0008-Enable-macro-DEB_BUILD_ARCH_OS-in-order-to-build-ipv.patch
 create mode 100644 src/snmpd/patch-5.9.3+dfsg/0012-agent-Makefile.in-Unbreak-the-enable-minimalist-buil.patch
 create mode 100644 src/snmpd/patch-5.9.3+dfsg/0013-enable-parallel-build-for-net-snmp.patch
 create mode 100644 src/snmpd/patch-5.9.3+dfsg/cross-compile-changes.patch
 create mode 100644 src/snmpd/patch-5.9.3+dfsg/series

diff --git a/dockers/docker-lldp/Dockerfile.j2 b/dockers/docker-lldp/Dockerfile.j2
index 9bc641852..e1b8f1a32 100644
--- a/dockers/docker-lldp/Dockerfile.j2
+++ b/dockers/docker-lldp/Dockerfile.j2
@@ -1,5 +1,5 @@
 {% from "dockers/dockerfile-macros.j2" import install_debian_packages, install_python_wheels, copy_files %}
-FROM docker-config-engine-bullseye-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}}
+FROM docker-config-engine-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}}
 
 ARG docker_container_name
 ARG image_version
diff --git a/dockers/docker-snmp/Dockerfile.j2 b/dockers/docker-snmp/Dockerfile.j2
index 8465e4fb9..174f1ae44 100644
--- a/dockers/docker-snmp/Dockerfile.j2
+++ b/dockers/docker-snmp/Dockerfile.j2
@@ -1,5 +1,5 @@
 {% from "dockers/dockerfile-macros.j2" import install_debian_packages, install_python3_wheels, copy_files %}
-FROM docker-config-engine-bullseye-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}}
+FROM docker-config-engine-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}}
 
 ARG docker_container_name
 ARG image_version
diff --git a/dockers/docker-snmp/supervisord.conf b/dockers/docker-snmp/supervisord.conf
index 3d11cc48e..1f01a7c21 100644
--- a/dockers/docker-snmp/supervisord.conf
+++ b/dockers/docker-snmp/supervisord.conf
@@ -24,8 +24,8 @@ command=/usr/sbin/rsyslogd -n -iNONE
 priority=1
 autostart=false
 autorestart=unexpected
-stdout_logfile=syslog
-stderr_logfile=syslog
+stdout_syslog=true
+stderr_syslog=true
 dependent_startup=true
 
 [program:start]
@@ -34,8 +34,8 @@ priority=1
 autostart=true
 autorestart=false
 startsecs=0
-stdout_logfile=syslog
-stderr_logfile=syslog
+stdout_syslog=true
+stderr_syslog=true
 dependent_startup=true
 dependent_startup_wait_for=rsyslogd:running
 
@@ -44,8 +44,8 @@ command=/usr/sbin/snmpd -f -LS0-2d -u Debian-snmp -g Debian-snmp -I -smux,mteTri
 priority=3
 autostart=false
 autorestart=false
-stdout_logfile=syslog
-stderr_logfile=syslog
+stdout_syslog=true
+stderr_syslog=true
 dependent_startup=true
 dependent_startup_wait_for=start:exited
 
@@ -54,7 +54,7 @@ command=/usr/bin/env python3 -m sonic_ax_impl
 priority=4
 autostart=false
 autorestart=false
-stdout_logfile=syslog
-stderr_logfile=syslog
+stdout_syslog=true
+stderr_syslog=true
 dependent_startup=true
 dependent_startup_wait_for=snmpd:running
diff --git a/rules/docker-lldp.mk b/rules/docker-lldp.mk
index ddd079c4d..81cc582a3 100644
--- a/rules/docker-lldp.mk
+++ b/rules/docker-lldp.mk
@@ -8,13 +8,13 @@ $(DOCKER_LLDP)_PATH = $(DOCKERS_PATH)/docker-lldp
 
 $(DOCKER_LLDP)_DEPENDS += $(LLDPD) $(LIBSWSSCOMMON) $(PYTHON3_SWSSCOMMON)
 
-$(DOCKER_LLDP)_DBG_DEPENDS = $($(DOCKER_CONFIG_ENGINE_BULLSEYE)_DBG_DEPENDS)
+$(DOCKER_LLDP)_DBG_DEPENDS = $($(DOCKER_CONFIG_ENGINE_BOOKWORM)_DBG_DEPENDS)
 $(DOCKER_LLDP)_DBG_DEPENDS += $(LLDPD_DBG) $(LIBSWSSCOMMON_DBG)
 
-$(DOCKER_LLDP)_DBG_IMAGE_PACKAGES = $($(DOCKER_CONFIG_ENGINE_BULLSEYE)_DBG_IMAGE_PACKAGES)
+$(DOCKER_LLDP)_DBG_IMAGE_PACKAGES = $($(DOCKER_CONFIG_ENGINE_BOOKWORM)_DBG_IMAGE_PACKAGES)
 
 $(DOCKER_LLDP)_PYTHON_WHEELS += $(DBSYNCD_PY3)
-$(DOCKER_LLDP)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE_BULLSEYE)
+$(DOCKER_LLDP)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE_BOOKWORM)
 
 $(DOCKER_LLDP)_VERSION = 1.0.0
 $(DOCKER_LLDP)_PACKAGE_NAME = lldp
@@ -36,5 +36,5 @@ $(DOCKER_LLDP)_BASE_IMAGE_FILES += lldpctl:/usr/bin/lldpctl
 $(DOCKER_LLDP)_BASE_IMAGE_FILES += lldpcli:/usr/bin/lldpcli
 $(DOCKER_LLDP)_FILES += $(SUPERVISOR_PROC_EXIT_LISTENER_SCRIPT)
 
-SONIC_BULLSEYE_DOCKERS += $(DOCKER_LLDP)
-SONIC_BULLSEYE_DBG_DOCKERS += $(DOCKER_LLDP_DBG)
+SONIC_BOOKWORM_DOCKERS += $(DOCKER_LLDP)
+SONIC_BOOKWORM_DBG_DOCKERS += $(DOCKER_LLDP_DBG)
diff --git a/rules/docker-snmp.mk b/rules/docker-snmp.mk
index 00c20ab6c..3546d4778 100644
--- a/rules/docker-snmp.mk
+++ b/rules/docker-snmp.mk
@@ -9,14 +9,14 @@ $(DOCKER_SNMP)_PATH = $(DOCKERS_PATH)/docker-snmp
 ## TODO: remove LIBPY3_DEV if we can get pip3 directly
 $(DOCKER_SNMP)_DEPENDS += $(SNMP) $(SNMPD)
 
-$(DOCKER_SNMP)_DBG_DEPENDS = $($(DOCKER_CONFIG_ENGINE_BULLSEYE)_DBG_DEPENDS)
+$(DOCKER_SNMP)_DBG_DEPENDS = $($(DOCKER_CONFIG_ENGINE_BOOKWORM)_DBG_DEPENDS)
 $(DOCKER_SNMP)_DBG_DEPENDS += $(SNMP_DBG) $(SNMPD_DBG) $(LIBSNMP_DBG)
 $(DOCKER_SNMP)_DBG_DEPENDS += $(LIBSWSSCOMMON) $(PYTHON3_SWSSCOMMON)
 
-$(DOCKER_SNMP)_DBG_IMAGE_PACKAGES = $($(DOCKER_CONFIG_ENGINE_BULLSEYE)_DBG_IMAGE_PACKAGES)
+$(DOCKER_SNMP)_DBG_IMAGE_PACKAGES = $($(DOCKER_CONFIG_ENGINE_BOOKWORM)_DBG_IMAGE_PACKAGES)
 
 $(DOCKER_SNMP)_PYTHON_WHEELS += $(SONIC_PY_COMMON_PY3) $(SONIC_PLATFORM_COMMON_PY3) $(ASYNCSNMP_PY3)
-$(DOCKER_SNMP)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE_BULLSEYE)
+$(DOCKER_SNMP)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE_BOOKWORM)
 
 $(DOCKER_SNMP)_VERSION = 1.0.0
 $(DOCKER_SNMP)_PACKAGE_NAME = snmp
@@ -34,5 +34,5 @@ $(DOCKER_SNMP)_RUN_OPT += -v /etc/timezone:/etc/timezone:ro
 $(DOCKER_SNMP)_FILES += $(SUPERVISOR_PROC_EXIT_LISTENER_SCRIPT)
 $(DOCKER_SNMP)_BASE_IMAGE_FILES += monit_snmp:/etc/monit/conf.d
 
-SONIC_BULLSEYE_DOCKERS += $(DOCKER_SNMP)
-SONIC_BULLSEYE_DBG_DOCKERS += $(DOCKER_SNMP_DBG)
+SONIC_BOOKWORM_DOCKERS += $(DOCKER_SNMP)
+SONIC_BOOKWORM_DBG_DOCKERS += $(DOCKER_SNMP_DBG)
diff --git a/rules/snmpd.mk b/rules/snmpd.mk
index e9e498556..c70f30a4c 100644
--- a/rules/snmpd.mk
+++ b/rules/snmpd.mk
@@ -1,6 +1,9 @@
 # snmpd package
 
-ifeq ($(BLDENV),bullseye)
+ifeq ($(BLDENV),bookworm)
+SNMPD_VERSION = 5.9.3+dfsg
+SNMPD_VERSION_FULL = $(SNMPD_VERSION)-2
+else ifeq ($(BLDENV),bullseye)
 SNMPD_VERSION = 5.9+dfsg
 SNMPD_VERSION_FULL = $(SNMPD_VERSION)-4+deb11u1
 else
@@ -37,7 +40,9 @@ $(eval $(call add_derived_package,$(LIBSNMP_BASE),$(SNMP_DBG)))
 SNMPD_DBG = snmpd-dbgsym_$(SNMPD_VERSION_FULL)_$(CONFIGURED_ARCH).deb
 $(eval $(call add_derived_package,$(LIBSNMP_BASE),$(SNMPD_DBG)))
 
-ifeq ($(BLDENV),bullseye)
+ifeq ($(BLDENV),bookworm)
+LIBSNMP = libsnmp40_$(SNMPD_VERSION_FULL)_$(CONFIGURED_ARCH).deb
+else ifeq ($(BLDENV),bullseye)
 LIBSNMP = libsnmp40_$(SNMPD_VERSION_FULL)_$(CONFIGURED_ARCH).deb
 else
 LIBSNMP = libsnmp30_$(SNMPD_VERSION_FULL)_$(CONFIGURED_ARCH).deb
@@ -45,7 +50,9 @@ endif
 $(LIBSNMP)_RDEPENDS += $(LIBSNMP_BASE)
 $(eval $(call add_derived_package,$(LIBSNMP_BASE),$(LIBSNMP)))
 
-ifeq ($(BLDENV),bullseye)
+ifeq ($(BLDENV),bookworm)
+LIBSNMP_DBG = libsnmp40-dbgsym_$(SNMPD_VERSION_FULL)_$(CONFIGURED_ARCH).deb
+else ifeq ($(BLDENV),bullseye)
 LIBSNMP_DBG = libsnmp40-dbgsym_$(SNMPD_VERSION_FULL)_$(CONFIGURED_ARCH).deb
 else
 LIBSNMP_DBG = libsnmp30-dbg_$(SNMPD_VERSION_FULL)_$(CONFIGURED_ARCH).deb
diff --git a/src/snmpd/patch-5.9.3+dfsg/0001-SNMP-Stop-spamming-logs-with-statfs-permission-denie.patch b/src/snmpd/patch-5.9.3+dfsg/0001-SNMP-Stop-spamming-logs-with-statfs-permission-denie.patch
new file mode 100644
index 000000000..7aec7904c
--- /dev/null
+++ b/src/snmpd/patch-5.9.3+dfsg/0001-SNMP-Stop-spamming-logs-with-statfs-permission-denie.patch
@@ -0,0 +1,25 @@
+From 8bb8849524aba2124be3279a5197ad5fbfe166b2 Mon Sep 17 00:00:00 2001
+From: pavel-shirshov <pavelsh@microsoft.com>
+Date: Mon, 27 Aug 2018 16:50:16 +0800
+Subject: [PATCH] [SNMP] Stop spamming logs with statfs permission denied log
+
+---
+ agent/mibgroup/hardware/fsys/fsys_mntctl.c | 2 --
+ 1 file changed, 2 deletions(-)
+
+diff --git a/agent/mibgroup/hardware/fsys/fsys_mntctl.c b/agent/mibgroup/hardware/fsys/fsys_mntctl.c
+index 782c8ed..7819fe4 100644
+--- a/agent/mibgroup/hardware/fsys/fsys_mntctl.c
++++ b/agent/mibgroup/hardware/fsys/fsys_mntctl.c
+@@ -167,8 +167,6 @@ netsnmp_fsys_arch_load( void )
+             continue;
+ 
+         if ( statfs( entry->path, &stat_buf ) < 0 ) {
+-            snprintf( tmpbuf, sizeof(tmpbuf), "Cannot statfs %s", entry->path );
+-            snmp_log_perror( tmpbuf );
+             continue;
+         }
+         entry->units =  stat_buf.f_bsize;
+-- 
+2.18.0
+
diff --git a/src/snmpd/patch-5.9.3+dfsg/0008-Enable-macro-DEB_BUILD_ARCH_OS-in-order-to-build-ipv.patch b/src/snmpd/patch-5.9.3+dfsg/0008-Enable-macro-DEB_BUILD_ARCH_OS-in-order-to-build-ipv.patch
new file mode 100644
index 000000000..5a277bb9a
--- /dev/null
+++ b/src/snmpd/patch-5.9.3+dfsg/0008-Enable-macro-DEB_BUILD_ARCH_OS-in-order-to-build-ipv.patch
@@ -0,0 +1,25 @@
+From bd7d6d79217da6b5a2eb3a3ee1d409c175a61e41 Mon Sep 17 00:00:00 2001
+From: Qi Luo <qiluo-msft@users.noreply.github.com>
+Date: Fri, 20 Sep 2019 00:42:19 +0000
+Subject: [PATCH] Enable macro DEB_BUILD_ARCH_OS in order to build ipv6 feature
+
+---
+ debian/rules | 2 ++
+ 1 file changed, 2 insertions(+)
+
+diff --git a/debian/rules b/debian/rules
+index 34d8509..496be59 100755
+--- a/debian/rules
++++ b/debian/rules
+@@ -4,6 +4,8 @@
+ export DEB_BUILD_MAINT_OPTIONS := hardening=+all
+ include /usr/share/dpkg/architecture.mk
+ include /usr/share/dpkg/buildtools.mk
++DEB_HOST_MULTIARCH ?= $(shell dpkg-architecture -qDEB_HOST_MULTIARCH)
++DEB_BUILD_ARCH_OS  ?= $(shell dpkg-architecture -qDEB_BUILD_ARCH_OS)
+ 
+ LIB_VERSION = 40
+ 
+-- 
+2.18.0
+
diff --git a/src/snmpd/patch-5.9.3+dfsg/0012-agent-Makefile.in-Unbreak-the-enable-minimalist-buil.patch b/src/snmpd/patch-5.9.3+dfsg/0012-agent-Makefile.in-Unbreak-the-enable-minimalist-buil.patch
new file mode 100644
index 000000000..ba2283cc5
--- /dev/null
+++ b/src/snmpd/patch-5.9.3+dfsg/0012-agent-Makefile.in-Unbreak-the-enable-minimalist-buil.patch
@@ -0,0 +1,30 @@
+From 0d3e33ff197d1d15c0036b69cca5198e54781efe Mon Sep 17 00:00:00 2001
+From: Bart Van Assche <bvanassche@acm.org>
+Date: Sun, 24 Jul 2022 16:45:05 -0700
+Subject: [PATCH] agent/Makefile.in: Unbreak the --enable-minimalist build
+
+Build the features rules in the mibgroup directory before building the
+features rules in the helpers directory.
+
+Fixes: 51128ad09507 ("agent/Makefile.in: Build the MIB module code once")
+Fixes: https://github.com/net-snmp/net-snmp/issues/438
+---
+ agent/Makefile.in | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/agent/Makefile.in b/agent/Makefile.in
+index 047d880..44f8818 100644
+--- a/agent/Makefile.in
++++ b/agent/Makefile.in
+@@ -16,7 +16,7 @@ mysubdir=agent
+ # what to install
+ #
+ SUBDIRS=helpers
+-FTSUBDIRS=helpers
++FTSUBDIRS=mibgroup helpers
+ 
+ INSTALLSBINPROGS= @SNMPD@
+ INSTALLLIBS	= libnetsnmpagent.$(LIB_EXTENSION)$(LIB_VERSION)
+-- 
+2.18.0
+
diff --git a/src/snmpd/patch-5.9.3+dfsg/0013-enable-parallel-build-for-net-snmp.patch b/src/snmpd/patch-5.9.3+dfsg/0013-enable-parallel-build-for-net-snmp.patch
new file mode 100644
index 000000000..aec800c03
--- /dev/null
+++ b/src/snmpd/patch-5.9.3+dfsg/0013-enable-parallel-build-for-net-snmp.patch
@@ -0,0 +1,18 @@
+diff --git a/debian/rules b/debian/rules
+index 496be59..939e1a4 100755
+--- a/debian/rules
++++ b/debian/rules
+@@ -37,10 +37,6 @@ endif
+ %:
+ 	dh $@
+ 
+-# The net-snmp Makefiles cannot handle parallel builds
+-override_dh_auto_build:
+-	dh_auto_build --no-parallel
+-
+ override_dh_auto_configure:
+ 	dh_auto_configure -- --prefix=/usr --sysconfdir=/etc --mandir=/usr/share/man \
+ 	  --with-persistent-directory=/var/lib/snmp \
+-- 
+2.18.0
+
diff --git a/src/snmpd/patch-5.9.3+dfsg/cross-compile-changes.patch b/src/snmpd/patch-5.9.3+dfsg/cross-compile-changes.patch
new file mode 100644
index 000000000..f6fc80e9c
--- /dev/null
+++ b/src/snmpd/patch-5.9.3+dfsg/cross-compile-changes.patch
@@ -0,0 +1,20 @@
+diff --git a/debian/rules b/debian/rules
+index 939e1a4..efd323e 100755
+--- a/debian/rules
++++ b/debian/rules
+@@ -7,6 +7,12 @@ include /usr/share/dpkg/buildtools.mk
+ DEB_HOST_MULTIARCH ?= $(shell dpkg-architecture -qDEB_HOST_MULTIARCH)
+ DEB_BUILD_ARCH_OS  ?= $(shell dpkg-architecture -qDEB_BUILD_ARCH_OS)
+ 
++DEB_BUILD_MULTIARCH  ?= $(shell dpkg-architecture -qDEB_BUILD_MULTIARCH)
++
++ifneq ($(DEB_BUILD_MULTIARCH),$(DEB_HOST_MULTIARCH))
++export PERL5OPT := -I/usr/lib/$(DEB_HOST_MULTIARCH)/perl/cross-config
++endif
++
+ LIB_VERSION = 40
+ 
+ MIB_MODULES = smux ucd-snmp/dlmod mibII/mta_sendmail disman/event-mib
+-- 
+2.18.0
+
diff --git a/src/snmpd/patch-5.9.3+dfsg/series b/src/snmpd/patch-5.9.3+dfsg/series
new file mode 100644
index 000000000..77d1b0898
--- /dev/null
+++ b/src/snmpd/patch-5.9.3+dfsg/series
@@ -0,0 +1,5 @@
+0001-SNMP-Stop-spamming-logs-with-statfs-permission-denie.patch
+0008-Enable-macro-DEB_BUILD_ARCH_OS-in-order-to-build-ipv.patch  
+0012-agent-Makefile.in-Unbreak-the-enable-minimalist-buil.patch  
+0013-enable-parallel-build-for-net-snmp.patch  
+cross-compile-changes.patch 

From e15a1aa8f823864adca2980c1bed5010b67c8819 Mon Sep 17 00:00:00 2001
From: Saikrishna Arcot <sarcot@microsoft.com>
Date: Mon, 22 Apr 2024 11:39:39 -0500
Subject: [PATCH 0470/1115] Upgrade VS syncd to Bookworm (#18347)

* Upgrade VS syncd to Bookworm

As part of this, iproute2 is no longer compiled here, since the
macsec patch is now in version 6.1. In addition, for docker-sonic-vs,
version 6.1 of iproute2 is pulled from the bullseye-backports repo.

* Update sonic-sairedis submodule

This submodule update needs to go as part of this change because it
would break compatibility with Bullseye for MACsec, but adds
compatibility for Bookworm, which is what is needed here.

This brings in the following commits:

```
73ada8d5 Fix SSCI parameter when creating MACsec tunnels on Bookworm (sonic-net/sonic-sairedis#1372)
c41a0cb9 SAI submodule update to bring saithrift changes for syncd bookworm (sonic-net/sonic-sairedis#1370)
be47489f Add Bookworm build to PR checks (sonic-net/sonic-sairedis#1371)
d9ba01b5 Update ip commands for MACsec for Bookworm (sonic-net/sonic-sairedis#1368)
```

Signed-off-by: Saikrishna Arcot <sarcot@microsoft.com>
---
 platform/template/docker-gbsyncd-bookworm.mk  |  30 +++
 platform/template/docker-syncd-bookworm.mk    |  33 +++
 platform/vs/docker-gbsyncd-vs.mk              |   2 +-
 platform/vs/docker-gbsyncd-vs/Dockerfile.j2   |   2 +-
 platform/vs/docker-sonic-vs.mk                |   3 +-
 platform/vs/docker-sonic-vs/Dockerfile.j2     |  33 ++-
 platform/vs/docker-syncd-vs.mk                |   5 +-
 platform/vs/docker-syncd-vs/Dockerfile.j2     |  20 +-
 rules/iproute2.dep                            |  10 -
 rules/iproute2.mk                             |  13 -
 src/iproute2/.gitignore                       |   4 -
 src/iproute2/Makefile                         |  28 --
 .../patch/0001-patch-macsec-xpn-support.patch | 242 ------------------
 .../patch/cross-compile-changes.patch         |  12 -
 src/sonic-sairedis                            |   2 +-
 15 files changed, 94 insertions(+), 345 deletions(-)
 create mode 100644 platform/template/docker-gbsyncd-bookworm.mk
 create mode 100644 platform/template/docker-syncd-bookworm.mk
 delete mode 100644 rules/iproute2.dep
 delete mode 100644 rules/iproute2.mk
 delete mode 100644 src/iproute2/.gitignore
 delete mode 100644 src/iproute2/Makefile
 delete mode 100644 src/iproute2/patch/0001-patch-macsec-xpn-support.patch
 delete mode 100644 src/iproute2/patch/cross-compile-changes.patch

diff --git a/platform/template/docker-gbsyncd-bookworm.mk b/platform/template/docker-gbsyncd-bookworm.mk
new file mode 100644
index 000000000..4516f6739
--- /dev/null
+++ b/platform/template/docker-gbsyncd-bookworm.mk
@@ -0,0 +1,30 @@
+# docker image for gbsyncd
+
+
+DOCKER_GBSYNCD_BASE_STEM = docker-gbsyncd-$(DOCKER_GBSYNCD_PLATFORM_CODE)
+DOCKER_GBSYNCD_BASE = $(DOCKER_GBSYNCD_BASE_STEM).gz
+DOCKER_GBSYNCD_BASE_DBG = $(DOCKER_GBSYNCD_BASE_STEM)-$(DBG_IMAGE_MARK).gz
+
+$(DOCKER_GBSYNCD_BASE)_PATH = $(PLATFORM_PATH)/docker-gbsyncd-$(DOCKER_GBSYNCD_PLATFORM_CODE)
+
+$(DOCKER_GBSYNCD_BASE)_FILES += $(SUPERVISOR_PROC_EXIT_LISTENER_SCRIPT)
+
+$(DOCKER_GBSYNCD_BASE)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE_BOOKWORM)
+
+$(DOCKER_GBSYNCD_BASE)_DBG_DEPENDS += $($(DOCKER_CONFIG_ENGINE_BOOKWORM)_DBG_DEPENDS)
+
+$(DOCKER_GBSYNCD_BASE)_DBG_IMAGE_PACKAGES = $($(DOCKER_CONFIG_ENGINE_BOOKWORM)_DBG_IMAGE_PACKAGES)
+
+SONIC_DOCKER_IMAGES += $(DOCKER_GBSYNCD_BASE)
+SONIC_BOOKWORM_DOCKERS += $(DOCKER_GBSYNCD_BASE)
+SONIC_INSTALL_DOCKER_IMAGES += $(DOCKER_GBSYNCD_BASE)
+
+SONIC_DOCKER_DBG_IMAGES += $(DOCKER_GBSYNCD_BASE_DBG)
+SONIC_BOOKWORM_DBG_DOCKERS += $(DOCKER_GBSYNCD_BASE_DBG)
+SONIC_INSTALL_DOCKER_DBG_IMAGES += $(DOCKER_GBSYNCD_BASE_DBG)
+
+$(DOCKER_GBSYNCD_BASE)_CONTAINER_NAME = gbsyncd
+$(DOCKER_GBSYNCD_BASE)_RUN_OPT += --privileged -t
+$(DOCKER_GBSYNCD_BASE)_RUN_OPT += -v /host/machine.conf:/etc/machine.conf
+$(DOCKER_GBSYNCD_BASE)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro
+$(DOCKER_GBSYNCD_BASE)_RUN_OPT += -v /host/warmboot:/var/warmboot
diff --git a/platform/template/docker-syncd-bookworm.mk b/platform/template/docker-syncd-bookworm.mk
new file mode 100644
index 000000000..2a9e82845
--- /dev/null
+++ b/platform/template/docker-syncd-bookworm.mk
@@ -0,0 +1,33 @@
+# docker image for syncd
+
+
+DOCKER_SYNCD_BASE_STEM = docker-syncd-$(DOCKER_SYNCD_PLATFORM_CODE)
+DOCKER_SYNCD_BASE = $(DOCKER_SYNCD_BASE_STEM).gz
+DOCKER_SYNCD_BASE_DBG = $(DOCKER_SYNCD_BASE_STEM)-$(DBG_IMAGE_MARK).gz
+
+$(DOCKER_SYNCD_BASE)_PATH = $(PLATFORM_PATH)/docker-syncd-$(DOCKER_SYNCD_PLATFORM_CODE)
+
+$(DOCKER_SYNCD_BASE)_FILES += $(SUPERVISOR_PROC_EXIT_LISTENER_SCRIPT)
+
+$(DOCKER_SYNCD_BASE)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE_BOOKWORM)
+$(DOCKER_SYNCD_BASE)_DBG_DEPENDS += $($(DOCKER_CONFIG_ENGINE_BOOKWORM)_DBG_DEPENDS)
+$(DOCKER_SYNCD_BASE)_DBG_IMAGE_PACKAGES = $($(DOCKER_CONFIG_ENGINE_BOOKWORM)_DBG_IMAGE_PACKAGES)
+
+SONIC_DOCKER_IMAGES += $(DOCKER_SYNCD_BASE)
+ifneq ($(ENABLE_SYNCD_RPC),y)
+SONIC_INSTALL_DOCKER_IMAGES += $(DOCKER_SYNCD_BASE)
+endif
+
+SONIC_DOCKER_DBG_IMAGES += $(DOCKER_SYNCD_BASE_DBG)
+ifneq ($(ENABLE_SYNCD_RPC),y)
+SONIC_INSTALL_DOCKER_DBG_IMAGES += $(DOCKER_SYNCD_BASE_DBG)
+endif
+
+$(DOCKER_SYNCD_BASE)_CONTAINER_NAME = syncd
+$(DOCKER_SYNCD_BASE)_RUN_OPT += --privileged -t
+$(DOCKER_SYNCD_BASE)_RUN_OPT += -v /host/machine.conf:/etc/machine.conf
+$(DOCKER_SYNCD_BASE)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro
+
+SONIC_BOOKWORM_DOCKERS += $(DOCKER_SYNCD_BASE)
+SONIC_BOOKWORM_DBG_DOCKERS += $(DOCKER_SYNCD_BASE_DBG)
+
diff --git a/platform/vs/docker-gbsyncd-vs.mk b/platform/vs/docker-gbsyncd-vs.mk
index 50bb8e86b..f3cd8a139 100644
--- a/platform/vs/docker-gbsyncd-vs.mk
+++ b/platform/vs/docker-gbsyncd-vs.mk
@@ -1,7 +1,7 @@
 # docker image for vs gbsyncd
 
 DOCKER_GBSYNCD_PLATFORM_CODE = vs
-include $(PLATFORM_PATH)/../template/docker-gbsyncd-base.mk
+include $(PLATFORM_PATH)/../template/docker-gbsyncd-bookworm.mk
 
 $(DOCKER_GBSYNCD_BASE)_DEPENDS += $(SYNCD_VS)
 
diff --git a/platform/vs/docker-gbsyncd-vs/Dockerfile.j2 b/platform/vs/docker-gbsyncd-vs/Dockerfile.j2
index 7e5219f55..e5491fd1b 100644
--- a/platform/vs/docker-gbsyncd-vs/Dockerfile.j2
+++ b/platform/vs/docker-gbsyncd-vs/Dockerfile.j2
@@ -1,4 +1,4 @@
-FROM docker-config-engine-bullseye-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}}
+FROM docker-config-engine-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}}
 
 ARG docker_container_name
 
diff --git a/platform/vs/docker-sonic-vs.mk b/platform/vs/docker-sonic-vs.mk
index dfcff23a5..53735eb98 100644
--- a/platform/vs/docker-sonic-vs.mk
+++ b/platform/vs/docker-sonic-vs.mk
@@ -11,8 +11,7 @@ $(DOCKER_SONIC_VS)_DEPENDS += $(SYNCD_VS) \
                               $(LIBYANG_CPP) \
                               $(LIBYANG_PY3) \
                               $(SONIC_UTILITIES_DATA) \
-                              $(SONIC_HOST_SERVICES_DATA) \
-                              $(IPROUTE2)
+                              $(SONIC_HOST_SERVICES_DATA)
 
 $(DOCKER_SONIC_VS)_PYTHON_WHEELS += $(SONIC_PY_COMMON_PY3) \
                                     $(SONIC_PLATFORM_COMMON_PY3) \
diff --git a/platform/vs/docker-sonic-vs/Dockerfile.j2 b/platform/vs/docker-sonic-vs/Dockerfile.j2
index 6ffef790f..6caa69b30 100644
--- a/platform/vs/docker-sonic-vs/Dockerfile.j2
+++ b/platform/vs/docker-sonic-vs/Dockerfile.j2
@@ -1,3 +1,4 @@
+{% from "dockers/dockerfile-macros.j2" import install_debian_packages, install_python_wheels, copy_files %}
 FROM docker-swss-layer-bullseye-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}}
 
 ARG docker_container_name
@@ -25,7 +26,6 @@ RUN apt-get install -y net-tools \
                        openssh-client \
                        openssh-server \
                        libc-ares2 \
-                       iproute2 \
                        grub2-common \
                        bash-completion \
                        libelf1 \
@@ -69,6 +69,8 @@ RUN apt-get install -y net-tools \
                        libgssrpc4 \
                        libkdb5-10
 
+RUN apt-get install -y -t bullseye-backports iproute2
+
 # For sonic-config-engine Python 3 package
 # Install pyangbind here, outside sonic-config-engine dependencies, as pyangbind causes enum34 to be installed.
 # Then immediately uninstall enum34, as enum34 should not be installed for Python >= 3.4, as it causes a
@@ -84,32 +86,29 @@ RUN pip3 install \
          netifaces==0.10.9
 
 {% if docker_sonic_vs_debs.strip() -%}
-# Copy locally-built Debian package dependencies
-COPY {%- for deb in docker_sonic_vs_debs.split(' ') %} debs/{{ deb }}{%- endfor %} /debs/
+# Copy built Debian packages
+{{ copy_files("debs/", docker_sonic_vs_debs.split(' '), "/debs/") }}
 
-# Install locally-built Debian packages and implicitly install their dependencies
-RUN dpkg_apt() { [ -f $1 ] && { dpkg -i $1 || apt-get -y install -f; } || return 1; }; {%- for deb in docker_sonic_vs_debs.split(' ') %} dpkg_apt /debs/{{ deb }};{%- endfor %}
+# Install built Debian packages and implicitly install their dependencies
+{{ install_debian_packages(docker_sonic_vs_debs.split(' ')) }}
 {%- endif %}
 
 RUN apt-get install -y libzmq3-dev
 
 {% if docker_sonic_vs_pydebs.strip() -%}
-# Copy locally-built Debian package dependencies
-COPY {%- for deb in docker_sonic_vs_pydebs.split(' ') %} python-debs/{{ deb }}{%- endfor %} /debs/
+# Copy built Debian packages
+{{ copy_files("python-debs/", docker_sonic_vs_pydebs.split(' '), "/debs/") }}
 
-# Install locally-built Debian packages and implicitly install their dependencies
-RUN dpkg_apt() { [ -f $1 ] && { dpkg -i $1 || apt-get -y install -f; } || return 1; }; {%- for deb in docker_sonic_vs_pydebs.split(' ') %} dpkg_apt /debs/{{ deb }};{%- endfor %}
+# Install built Debian packages and implicitly install their dependencies
+{{ install_debian_packages(docker_sonic_vs_pydebs.split(' ')) }}
 {%- endif %}
 
 {% if docker_sonic_vs_whls.strip() %}
-# copy all whl PKGs first,
-copy {%- for whl in docker_sonic_vs_whls.split(' ') %} python-wheels/{{ whl }}{%- endfor %} python-wheels/
-
-# install PKGs after copying all PKGs to avoid dependency failure
-# use py3 to find python3 package, which is forced by wheel as of now
-{%- for whl in docker_sonic_vs_whls.split(' ') %}
-RUN pip{% if 'py3' in whl %}3{% else %}2{% endif %} install python-wheels/{{ whl }}
-{%- endfor %}
+# Copy locally-built Python wheel dependencies
+{{ copy_files("python-wheels/", docker_sonic_vs_whls.split(' '), "/python-wheels/") }}
+
+# Install locally-built Python wheel dependencies
+{{ install_python_wheels(docker_sonic_vs_whls.split(' ')) }}
 {% endif %}
 
 # Clean up
diff --git a/platform/vs/docker-syncd-vs.mk b/platform/vs/docker-syncd-vs.mk
index 4a062e350..a9656f291 100644
--- a/platform/vs/docker-syncd-vs.mk
+++ b/platform/vs/docker-syncd-vs.mk
@@ -1,10 +1,9 @@
 # docker image for vs syncd
 
 DOCKER_SYNCD_PLATFORM_CODE = vs
-include $(PLATFORM_PATH)/../template/docker-syncd-bullseye.mk
+include $(PLATFORM_PATH)/../template/docker-syncd-bookworm.mk
 
-$(DOCKER_SYNCD_BASE)_DEPENDS += $(SYNCD_VS) \
-                                $(IPROUTE2)
+$(DOCKER_SYNCD_BASE)_DEPENDS += $(SYNCD_VS)
 
 $(DOCKER_SYNCD_BASE)_DBG_DEPENDS += $(SYNCD_VS_DBG) \
                                 $(LIBSWSSCOMMON_DBG) \
diff --git a/platform/vs/docker-syncd-vs/Dockerfile.j2 b/platform/vs/docker-syncd-vs/Dockerfile.j2
index adc26682c..a29b5e6b6 100644
--- a/platform/vs/docker-syncd-vs/Dockerfile.j2
+++ b/platform/vs/docker-syncd-vs/Dockerfile.j2
@@ -1,4 +1,5 @@
-FROM docker-config-engine-bullseye-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}}
+{% from "dockers/dockerfile-macros.j2" import install_debian_packages, install_python_wheels, copy_files %}
+FROM docker-config-engine-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}}
 
 ARG docker_container_name
 
@@ -7,18 +8,15 @@ ENV DEBIAN_FRONTEND=noninteractive
 
 RUN apt-get update
 
-RUN apt-get install -f -y libcap2-bin
+RUN apt-get install -y libcap2-bin
 
-COPY \
-{% for deb in docker_syncd_vs_debs.split(' ') -%}
-debs/{{ deb }}{{' '}}
-{%- endfor -%}
-debs/
+{% if docker_syncd_vs_debs.strip() -%}
+# Copy built Debian packages
+{{ copy_files("debs/", docker_syncd_vs_debs.split(' '), "/debs/") }}
 
-RUN dpkg -i \
-{% for deb in docker_syncd_vs_debs.split(' ') -%}
-debs/{{ deb }}{{' '}}
-{%- endfor %} || apt-get install -f -y
+# Install built Debian packages and implicitly install their dependencies
+{{ install_debian_packages(docker_syncd_vs_debs.split(' ')) }}
+{%- endif %}
 
 COPY ["start.sh", "/usr/bin/"]
 
diff --git a/rules/iproute2.dep b/rules/iproute2.dep
deleted file mode 100644
index 9e445d9c2..000000000
--- a/rules/iproute2.dep
+++ /dev/null
@@ -1,10 +0,0 @@
-
-SPATH       := $($(IPROUTE2)_SRC_PATH)
-DEP_FILES   := $(SONIC_COMMON_FILES_LIST) rules/iproute2.mk rules/iproute2.dep   
-DEP_FILES   += $(SONIC_COMMON_BASE_FILES_LIST)
-DEP_FILES   += $(shell git ls-files $(SPATH))
-
-$(IPROUTE2)_CACHE_MODE  := GIT_CONTENT_SHA 
-$(IPROUTE2)_DEP_FLAGS   := $(SONIC_COMMON_FLAGS_LIST)
-$(IPROUTE2)_DEP_FILES   := $(DEP_FILES)
-
diff --git a/rules/iproute2.mk b/rules/iproute2.mk
deleted file mode 100644
index ac0b2d576..000000000
--- a/rules/iproute2.mk
+++ /dev/null
@@ -1,13 +0,0 @@
-# iproute2 package
-
-IPROUTE2_VERSION = 5.10.0
-IPROUTE2_VERSION_FULL = $(IPROUTE2_VERSION)-4
-IPROUTE2_VERSION_SONIC = $(IPROUTE2_VERSION)-4sonic1
-
-export IPROUTE2_VERSION
-export IPROUTE2_VERSION_FULL
-export IPROUTE2_VERSION_SONIC
-
-IPROUTE2 = iproute2_$(IPROUTE2_VERSION_SONIC)_$(CONFIGURED_ARCH).deb
-$(IPROUTE2)_SRC_PATH = $(SRC_PATH)/iproute2
-SONIC_MAKE_DEBS += $(IPROUTE2)
diff --git a/src/iproute2/.gitignore b/src/iproute2/.gitignore
deleted file mode 100644
index dfa47d483..000000000
--- a/src/iproute2/.gitignore
+++ /dev/null
@@ -1,4 +0,0 @@
-*
-!.gitignore
-!Makefile
-!patch/*
diff --git a/src/iproute2/Makefile b/src/iproute2/Makefile
deleted file mode 100644
index ecf849182..000000000
--- a/src/iproute2/Makefile
+++ /dev/null
@@ -1,28 +0,0 @@
-SHELL = /bin/bash
-.ONESHELL:
-.SHELLFLAGS += -e
-
-MAIN_TARGET = iproute2_$(IPROUTE2_VERSION_SONIC)_$(CONFIGURED_ARCH).deb
-
-$(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% :
-	# Remove any stale files
-	rm -rf iproute2-$(IPROUTE2_VERSION)
-
-	wget -O iproute2_$(IPROUTE2_VERSION).orig.tar.xz http://deb.debian.org/debian/pool/main/i/iproute2/iproute2_$(IPROUTE2_VERSION).orig.tar.xz
-	wget -O iproute2_$(IPROUTE2_VERSION_FULL).dsc http://deb.debian.org/debian/pool/main/i/iproute2/iproute2_$(IPROUTE2_VERSION_FULL).dsc
-	wget -O iproute2_$(IPROUTE2_VERSION_FULL).debian.tar.xz http://deb.debian.org/debian/pool/main/i/iproute2/iproute2_$(IPROUTE2_VERSION_FULL).debian.tar.xz
-	dpkg-source -x iproute2_$(IPROUTE2_VERSION_FULL).dsc
-
-	pushd iproute2-$(IPROUTE2_VERSION)
-
-	patch -p1 < ../patch/0001-patch-macsec-xpn-support.patch
-
-ifeq ($(CROSS_BUILD_ENVIRON), y)
-	patch -p1 < ../patch/cross-compile-changes.patch
-	dpkg-buildpackage -us -uc -b -a$(CONFIGURED_ARCH) -Pcross,nocheck -j$(SONIC_CONFIG_MAKE_JOBS) --admindir $(SONIC_DPKG_ADMINDIR)
-else
-	dpkg-buildpackage -us -uc -b -j$(SONIC_CONFIG_MAKE_JOBS) --admindir $(SONIC_DPKG_ADMINDIR)
-endif
-	popd
-
-	mv $* $(DEST)/
diff --git a/src/iproute2/patch/0001-patch-macsec-xpn-support.patch b/src/iproute2/patch/0001-patch-macsec-xpn-support.patch
deleted file mode 100644
index db477fbd3..000000000
--- a/src/iproute2/patch/0001-patch-macsec-xpn-support.patch
+++ /dev/null
@@ -1,242 +0,0 @@
-From 129613207b2f1616507814fbe060a2ce317d0bbb Mon Sep 17 00:00:00 2001
-From: Ze Gan <ganze718@gmail.com>
-Date: Mon, 18 Jul 2022 15:07:15 +0000
-Subject: [PATCH] MACsec XPN support
-
-Signed-off-by: Ze Gan <ganze718@gmail.com>
----
- ip/ipmacsec.c | 97 +++++++++++++++++++++++++++++++++++++++++++--------
- 1 file changed, 83 insertions(+), 14 deletions(-)
-
-diff --git a/debian/changelog b/debian/changelog
-index 2b114c1..bf3c253 100644
---- a/debian/changelog
-+++ b/debian/changelog
-@@ -1,3 +1,9 @@
-+iproute2 (5.10.0-4sonic1) unstable; urgency=medium
-+
-+  * Enhance iproute2 to update PN for XPN
-+
-+ -- Ze Gan <ganze718@gmail.com>  Wed, 25 Jan 2023 11:25:50 -0800
-+
- iproute2 (5.10.0-4) unstable; urgency=medium
- 
-   * Backport 0012-iproute-force-rtm_dst_len-to-32-128.patch to fix ip
-diff --git a/ip/ipmacsec.c b/ip/ipmacsec.c
-index 18289ec..fffe94a 100644
---- a/ip/ipmacsec.c
-+++ b/ip/ipmacsec.c
-@@ -10,6 +10,7 @@
-  */
- 
- #include <stdio.h>
-+#include <inttypes.h>
- #include <stdlib.h>
- #include <string.h>
- #include <errno.h>
-@@ -23,6 +24,8 @@
- #include "ll_map.h"
- #include "libgenl.h"
- 
-+#define MACSEC_SALT_LEN 12
-+
- static const char * const values_on_off[] = { "off", "on" };
- 
- static const char * const validate_str[] = {
-@@ -45,11 +48,13 @@ struct sci {
- 
- struct sa_desc {
- 	__u8 an;
--	__u32 pn;
-+	__u64 pn;
- 	__u8 key_id[MACSEC_KEYID_LEN];
- 	__u32 key_len;
- 	__u8 key[MACSEC_MAX_KEY_LEN];
- 	__u8 active;
-+	__u32 ssci;
-+	__u8 salt[MACSEC_SALT_LEN];
- };
- 
- struct cipher_args {
-@@ -88,7 +93,7 @@ static int genl_family = -1;
- static void ipmacsec_usage(void)
- {
- 	fprintf(stderr,
--		"Usage: ip macsec add DEV tx sa { 0..3 } [ OPTS ] key ID KEY\n"
-+		"Usage: ip macsec add DEV tx sa { 0..3 } [ OPTS ] [ ssci SSCI salt SALT] key ID KEY\n"
- 		"       ip macsec set DEV tx sa { 0..3 } [ OPTS ]\n"
- 		"       ip macsec del DEV tx sa { 0..3 }\n"
- 		"       ip macsec add DEV rx SCI [ on | off ]\n"
-@@ -100,10 +105,12 @@ static void ipmacsec_usage(void)
- 		"       ip macsec show\n"
- 		"       ip macsec show DEV\n"
- 		"       ip macsec offload DEV [ off | phy | mac ]\n"
--		"where  OPTS := [ pn <u32> ] [ on | off ]\n"
-+		"where  OPTS := [ pn <u64> ] [ on | off ]\n"
- 		"       ID   := 128-bit hex string\n"
- 		"       KEY  := 128-bit or 256-bit hex string\n"
--		"       SCI  := { sci <u64> | port { 1..2^16-1 } address <lladdr> }\n");
-+		"       SCI  := { sci <u64> | port { 1..2^16-1 } address <lladdr> }\n"
-+		"       SSCI := <u32>\n"
-+		"       SALT := 96-bit hex string\n");
- 
- 	exit(-1);
- }
-@@ -198,7 +205,7 @@ static int parse_sa_args(int *argcp, char ***argvp, struct sa_desc *sa)
- 			if (sa->pn != 0)
- 				duparg2("pn", "pn");
- 			NEXT_ARG();
--			ret = get_u32(&sa->pn, *argv, 0);
-+			ret = get_u64(&sa->pn, *argv, 0);
- 			if (ret)
- 				invarg("expected pn", *argv);
- 			if (sa->pn == 0)
-@@ -224,6 +231,22 @@ static int parse_sa_args(int *argcp, char ***argvp, struct sa_desc *sa)
- 				duparg2("on/off", "off");
- 			sa->active = false;
- 			active_set = true;
-+		} else if (strcmp(*argv, "ssci") == 0) {
-+			if (sa->ssci != 0)
-+				duparg2("ssci", "ssci");
-+			NEXT_ARG();
-+			ret = get_u32(&sa->ssci, *argv, 0);
-+			if (ret)
-+				invarg("expected ssci", *argv);
-+			if (sa->ssci == 0)
-+				invarg("expected ssci != 0", *argv);
-+		} else if (strcmp(*argv, "salt") == 0) {
-+			unsigned int len;
-+
-+			NEXT_ARG();
-+			if (!hexstring_a2n(*argv, sa->salt, MACSEC_SALT_LEN,
-+					   &len))
-+				invarg("expected salt", *argv);
- 		} else {
- 			fprintf(stderr, "macsec: unknown command \"%s\"?\n",
- 				*argv);
-@@ -413,9 +436,15 @@ static int do_modify_nl(enum cmd c, enum macsec_nl_commands cmd, int ifindex,
- 	addattr8(&req.n, MACSEC_BUFLEN, MACSEC_SA_ATTR_AN, sa->an);
- 
- 	if (c != CMD_DEL) {
--		if (sa->pn)
--			addattr32(&req.n, MACSEC_BUFLEN, MACSEC_SA_ATTR_PN,
--				  sa->pn);
-+		if (sa->pn) {
-+			if (sa->ssci == 0) {
-+				addattr32(&req.n, MACSEC_BUFLEN, MACSEC_SA_ATTR_PN,
-+					sa->pn);
-+			} else {
-+				addattr64(&req.n, MACSEC_BUFLEN, MACSEC_SA_ATTR_PN,
-+					sa->pn);
-+			}
-+		}
- 
- 		if (sa->key_len) {
- 			addattr_l(&req.n, MACSEC_BUFLEN, MACSEC_SA_ATTR_KEYID,
-@@ -428,6 +457,15 @@ static int do_modify_nl(enum cmd c, enum macsec_nl_commands cmd, int ifindex,
- 			addattr8(&req.n, MACSEC_BUFLEN,
- 				 MACSEC_SA_ATTR_ACTIVE, sa->active);
- 		}
-+
-+        if (c == CMD_ADD) {
-+            if (sa->ssci != 0) {
-+                addattr32(&req.n, MACSEC_BUFLEN, MACSEC_SA_ATTR_SSCI,
-+                      sa->ssci);
-+                addattr_l(&req.n, MACSEC_BUFLEN, MACSEC_SA_ATTR_SALT,
-+                      sa->salt, MACSEC_SALT_LEN);
-+            }
-+        }
- 	}
- 
- 	addattr_nest_end(&req.n, attr_sa);
-@@ -637,6 +675,8 @@ static void print_key(struct rtattr *key)
- 
- #define CIPHER_NAME_GCM_AES_128 "GCM-AES-128"
- #define CIPHER_NAME_GCM_AES_256 "GCM-AES-256"
-+#define CIPHER_NAME_GCM_AES_XPN_128 "GCM-AES-XPN-128"
-+#define CIPHER_NAME_GCM_AES_XPN_256 "GCM-AES-XPN-256"
- #define DEFAULT_CIPHER_NAME CIPHER_NAME_GCM_AES_128
- 
- static const char *cs_id_to_name(__u64 cid)
-@@ -649,6 +689,10 @@ static const char *cs_id_to_name(__u64 cid)
- 		return CIPHER_NAME_GCM_AES_128;
- 	case MACSEC_CIPHER_ID_GCM_AES_256:
- 		return CIPHER_NAME_GCM_AES_256;
-+	case MACSEC_CIPHER_ID_GCM_AES_XPN_128:
-+		return CIPHER_NAME_GCM_AES_XPN_128;
-+	case MACSEC_CIPHER_ID_GCM_AES_XPN_256:
-+		return CIPHER_NAME_GCM_AES_XPN_256;
- 	default:
- 		return "(unknown)";
- 	}
-@@ -897,12 +941,21 @@ static void print_tx_sc(const char *prefix, __u64 sci, __u8 encoding_sa,
- 		print_string(PRINT_FP, NULL, "%s", prefix);
- 		print_uint(PRINT_ANY, "an", "%d:",
- 			   rta_getattr_u8(sa_attr[MACSEC_SA_ATTR_AN]));
--		print_uint(PRINT_ANY, "pn", " PN %u,",
--			   rta_getattr_u32(sa_attr[MACSEC_SA_ATTR_PN]));
-+		if (!sa_attr[MACSEC_SA_ATTR_SSCI]) {
-+			print_uint(PRINT_ANY, "pn", " PN %u,",
-+				rta_getattr_u32(sa_attr[MACSEC_SA_ATTR_PN]));
-+		} else {
-+			print_u64(PRINT_ANY, "pn", " PN %" PRIu64 ",",
-+				rta_getattr_u64(sa_attr[MACSEC_SA_ATTR_PN]));
-+		}
- 
- 		print_bool(PRINT_JSON, "active", NULL, state);
- 		print_string(PRINT_FP, NULL,
- 			     " state %s,", state ? "on" : "off");
-+		if (sa_attr[MACSEC_SA_ATTR_SSCI]) {
-+			print_uint(PRINT_ANY, "ssci", " SSCI %u,",
-+				ntohl(rta_getattr_u32(sa_attr[MACSEC_SA_ATTR_SSCI])));
-+		}
- 		print_key(sa_attr[MACSEC_SA_ATTR_KEYID]);
- 
- 		print_txsa_stats(prefix, sa_attr[MACSEC_SA_ATTR_STATS]);
-@@ -965,13 +1018,23 @@ static void print_rx_sc(const char *prefix, __be64 sci, __u8 active,
- 		print_string(PRINT_FP, NULL, "%s", prefix);
- 		print_uint(PRINT_ANY, "an", "%u:",
- 			   rta_getattr_u8(sa_attr[MACSEC_SA_ATTR_AN]));
--		print_uint(PRINT_ANY, "pn", " PN %u,",
--			   rta_getattr_u32(sa_attr[MACSEC_SA_ATTR_PN]));
-+		if (!sa_attr[MACSEC_SA_ATTR_SSCI]) {
-+			print_uint(PRINT_ANY, "pn", " PN %u,",
-+				rta_getattr_u32(sa_attr[MACSEC_SA_ATTR_PN]));
-+		} else {
-+			print_u64(PRINT_ANY, "pn", " PN %" PRIu64 ",",
-+				rta_getattr_u64(sa_attr[MACSEC_SA_ATTR_PN]));
-+		}
- 
- 		print_bool(PRINT_JSON, "active", NULL, state);
- 		print_string(PRINT_FP, NULL, " state %s,",
- 			     state ? "on" : "off");
- 
-+		if (sa_attr[MACSEC_SA_ATTR_SSCI]) {
-+			print_uint(PRINT_ANY, "ssci", " SSCI %u,",
-+				ntohl(rta_getattr_u32(sa_attr[MACSEC_SA_ATTR_SSCI])));
-+		}
-+
- 		print_key(sa_attr[MACSEC_SA_ATTR_KEYID]);
- 
- 		print_rxsa_stats(prefix, sa_attr[MACSEC_SA_ATTR_STATS]);
-@@ -1322,9 +1385,15 @@ static int macsec_parse_opt(struct link_util *lu, int argc, char **argv,
- 			else if (strcmp(*argv, "gcm-aes-256") == 0 ||
- 			         strcmp(*argv, "GCM-AES-256") == 0)
- 				cipher.id = MACSEC_CIPHER_ID_GCM_AES_256;
-+			else if (strcmp(*argv, "gcm-aes-xpn-128") == 0 ||
-+			         strcmp(*argv, "GCM-AES-XPN-128") == 0)
-+				cipher.id = MACSEC_CIPHER_ID_GCM_AES_XPN_128;
-+			else if (strcmp(*argv, "gcm-aes-xpn-256") == 0 ||
-+			         strcmp(*argv, "GCM-AES-XPN-256") == 0)
-+				cipher.id = MACSEC_CIPHER_ID_GCM_AES_XPN_256;
- 			else
--				invarg("expected: default, gcm-aes-128 or"
--				       " gcm-aes-256", *argv);
-+				invarg("expected: default, gcm-aes-128"
-+				       " gcm-aes-256 gcm-aes-xpn-128 gcm-aes-xpn-256", *argv);
- 		} else if (strcmp(*argv, "icvlen") == 0) {
- 			NEXT_ARG();
- 			if (cipher.icv_len)
--- 
-2.25.1
-
diff --git a/src/iproute2/patch/cross-compile-changes.patch b/src/iproute2/patch/cross-compile-changes.patch
deleted file mode 100644
index a38df0630..000000000
--- a/src/iproute2/patch/cross-compile-changes.patch
+++ /dev/null
@@ -1,12 +0,0 @@
-Index: iproute2-5.10.0/tc/tc_core.c
-===================================================================
---- iproute2-5.10.0.orig/tc/tc_core.c
-+++ iproute2-5.10.0/tc/tc_core.c
-@@ -20,6 +20,7 @@
- #include <netinet/in.h>
- #include <arpa/inet.h>
- #include <string.h>
-+#include <stdint.h>
- 
- #include "utils.h"
- #include "tc_core.h"
diff --git a/src/sonic-sairedis b/src/sonic-sairedis
index a1b89c3c3..73ada8d57 160000
--- a/src/sonic-sairedis
+++ b/src/sonic-sairedis
@@ -1 +1 @@
-Subproject commit a1b89c3c37b2fe1568974cd76fd62ce7f29d548f
+Subproject commit 73ada8d57281e700336ce70fb893cec005466fcd

From d3b18c40de9c1c472edfc9052d0b1de0679a31bc Mon Sep 17 00:00:00 2001
From: Pavan Naregundi <92989231+pavannaregundi@users.noreply.github.com>
Date: Tue, 23 Apr 2024 09:24:30 +0530
Subject: [PATCH 0471/1115] [Marvell-arm64]: Fix sonic-installer (#18683)

* Fix illegal character error

Signed-off-by: Pavan Naregundi <pnaregundi@marvell.com>

* Set second image based on current image

Signed-off-by: Pavan Naregundi <pnaregundi@marvell.com>

* Fix boot_once

boot_once needs to be cleared during the boot of boot_once.

Signed-off-by: Pavan Naregundi <pnaregundi@marvell.com>

* Fix print boot menu

Signed-off-by: Pavan Naregundi <pnaregundi@marvell.com>

---------

Signed-off-by: Pavan Naregundi <pnaregundi@marvell.com>
---
 platform/marvell/platform_arm64.conf | 60 +++++++++++++++-------------
 1 file changed, 33 insertions(+), 27 deletions(-)

diff --git a/platform/marvell/platform_arm64.conf b/platform/marvell/platform_arm64.conf
index 6332c9178..51af700c4 100644
--- a/platform/marvell/platform_arm64.conf
+++ b/platform/marvell/platform_arm64.conf
@@ -180,19 +180,32 @@ prepare_boot_menu() {
 
     if [ "$install_env" = "onie" ]; then
         FW_ARG="-f"
-        image_dir_old=""
-        image_name_old=""
-        initrd_name_old=""
-        fdt_name_old=""
-        fit_name_old=""
-        sonic_version_2="None"
+        fw_setenv ${FW_ARG} image_dir_old "" > /dev/null
+        fw_setenv ${FW_ARG} image_name_old "" > /dev/null
+        fw_setenv ${FW_ARG} initrd_name_old "" > /dev/null
+        fw_setenv ${FW_ARG} fdt_name_old "" > /dev/null
+        fw_setenv ${FW_ARG} fit_name_old "" > /dev/null
+        fw_setenv ${FW_ARG} sonic_version_2 "None" > /dev/null
+        fw_setenv ${FW_ARG} linuxargs_old "" > /dev/null
     else
-        image_dir_old=$(fw_printenv -n image_dir || true)
-        image_name_old=$(fw_printenv -n image_name || true)
-        initrd_name_old=$(fw_printenv -n initrd_name || true)
-        fdt_name_old=$(fw_printenv -n fdt_name || true)
-        fit_name_old=$(fw_printenv -n fit_name || true)
-        sonic_version_2=$(fw_printenv -n sonic_version_1 || true)
+        CURR_SONIC_IMAGE="$(sonic-installer list | grep "Current: " | cut -f2 -d' ')"
+        FIRST_SONIC_IMAGE="$(fw_printenv sonic_version_1 | cut -f2 -d'=')"
+        if [ "$CURR_SONIC_IMAGE" = "$FIRST_SONIC_IMAGE" ]; then
+            image_dir_old=$(fw_printenv -n image_dir || true)
+            image_name_old=$(fw_printenv -n image_name || true)
+            initrd_name_old=$(fw_printenv -n initrd_name || true)
+            fdt_name_old=$(fw_printenv -n fdt_name || true)
+            fit_name_old=$(fw_printenv -n fit_name || true)
+            sonic_version_2=$(fw_printenv -n sonic_version_1 || true)
+            linuxargs_old=$(fw_printenv -n linuxargs || true)
+            fw_setenv ${FW_ARG} image_dir_old "$image_dir_old" > /dev/null
+            fw_setenv ${FW_ARG} image_name_old "$image_name_old" > /dev/null
+            fw_setenv ${FW_ARG} initrd_name_old "$initrd_name_old" > /dev/null
+            fw_setenv ${FW_ARG} fdt_name_old "$fdt_name_old" > /dev/null
+            fw_setenv ${FW_ARG} fit_name_old "$fit_name_old" > /dev/null
+            fw_setenv ${FW_ARG} sonic_version_2 "$sonic_version_2" > /dev/null
+            fw_setenv ${FW_ARG} linuxargs_old "$linuxargs_old" > /dev/null
+        fi
     fi
 
     # Set boot variables
@@ -202,22 +215,15 @@ prepare_boot_menu() {
     fw_setenv ${FW_ARG} fdt_name $fdt_name > /dev/null
     fw_setenv ${FW_ARG} fit_name $fit_name > /dev/null
     fw_setenv ${FW_ARG} sonic_version_1 $demo_volume_revision_label > /dev/null
-    fw_setenv ${FW_ARG} image_dir_old $image_dir_old > /dev/null
-    fw_setenv ${FW_ARG} image_name_old $image_name_old > /dev/null
-    fw_setenv ${FW_ARG} initrd_name_old $initrd_name_old > /dev/null
-    fw_setenv ${FW_ARG} fdt_name_old $fdt_name_old > /dev/null
-    fw_setenv ${FW_ARG} fit_name_old $fit_name_old > /dev/null
-    fw_setenv ${FW_ARG} sonic_version_2 $sonic_version_2 > /dev/null
     BOOT1='echo " > Boot1: $sonic_version_1 - run sonic_image_1";echo;'
     BOOT2='echo " > Boot2: $sonic_version_2 - run sonic_image_2";echo;'
     BOOT3='echo " > Boot3: ONIE - run onie_boot";echo;'
     BORDER='echo "---------------------------------------------------";echo;'
-    fw_setenv ${FW_ARG} print_menu $BORDER $BOOT1 $BOOT2 $BOOT3 $BORDER > /dev/null
+    fw_setenv ${FW_ARG} print_menu "$BORDER $BOOT1 $BOOT2 $BOOT3 $BORDER" > /dev/null
 
     fw_setenv ${FW_ARG} linuxargs "net.ifnames=0 loopfstype=squashfs loop=$image_dir/$FILESYSTEM_SQUASHFS systemd.unified_cgroup_hierarchy=0 varlog_size=$VAR_LOG ${ONIE_PLATFORM_EXTRA_CMDLINE_LINUX}" > /dev/null
-    fw_setenv ${FW_ARG} linuxargs_old "net.ifnames=0 loopfstype=squashfs loop=$image_dir_old/$FILESYSTEM_SQUASHFS systemd.unified_cgroup_hierarchy=0 varlog_size=$VAR_LOG ${ONIE_PLATFORM_EXTRA_CMDLINE_LINUX}" > /dev/null
-    sonic_bootargs_old='setenv bootargs root='$demo_dev' rw rootwait rootfstype=ext4 panic=1 console=ttyS0,${baudrate} ${othbootargs} ${mtdparts} ${linuxargs_old}'
-    fw_setenv ${FW_ARG} sonic_bootargs_old $sonic_bootargs_old > /dev/null || true
+    sonic_bootargs_old='setenv bootargs root='$demo_dev' rw rootwait panic=1 console=ttyS0,${baudrate} ${othbootargs} ${mtdparts} ${linuxargs_old}'
+    fw_setenv ${FW_ARG} sonic_bootargs_old "$sonic_bootargs_old" > /dev/null || true
     sonic_boot_load_old=$(fw_printenv -n sonic_boot_load || true)
     old_str="_old"
     fw_setenv ${FW_ARG} sonic_boot_load_old "$sonic_boot_load_old$old_str" > /dev/null || true
@@ -231,14 +237,14 @@ prepare_boot_menu() {
     fw_setenv ${FW_ARG} sonic_boot_load "$MMC_LOAD" > /dev/null
     SONIC_BOOT_CMD='run sonic_bootargs; run sonic_boot_load; bootm $fit_addr${fit_conf_name}'
     SONIC_BOOT_CMD_OLD='run sonic_bootargs_old; run sonic_boot_load_old; bootm $fit_addr${fit_conf_name}'
-    BOOTARGS='setenv bootargs root='$demo_dev' rw rootwait rootfstype=ext4 panic=1 console=ttyS0,${baudrate} ${othbootargs} ${mtdparts} ${linuxargs}'
-    fw_setenv ${FW_ARG} sonic_bootargs $BOOTARGS > /dev/null
-    fw_setenv ${FW_ARG} sonic_bootcmd $SONIC_BOOT_CMD > /dev/null
-    fw_setenv ${FW_ARG} sonic_image_2 $SONIC_BOOT_CMD_OLD > /dev/null
+    BOOTARGS='setenv bootargs root='$demo_dev' rw rootwait panic=1 console=ttyS0,${baudrate} ${othbootargs} ${mtdparts} ${linuxargs}'
+    fw_setenv ${FW_ARG} sonic_bootargs "$BOOTARGS" > /dev/null
+    fw_setenv ${FW_ARG} sonic_image_2 "$SONIC_BOOT_CMD_OLD" > /dev/null
     fw_setenv ${FW_ARG} sonic_image_1 "$SONIC_BOOT_CMD" > /dev/null
     fw_setenv ${FW_ARG} boot_next  'run sonic_image_1'> /dev/null
-    fw_setenv ${FW_ARG} bootcmd 'run print_menu; usb start; test -n "$boot_once" && run boot_once; run boot_next' > /dev/null
+    fw_setenv ${FW_ARG} bootcmd 'run print_menu; usb start; test -n "$boot_once" && setenv do_boot_once "$boot_once" && setenv boot_once "" && saveenv && run do_boot_once; run boot_next' > /dev/null
 
+    echo "Installed SONiC base image SONiC-OS successfully"
 }
 
 bootloader_menu_config() {

From 0a372986bdea3baf480cf34dafdd6b872aa51df9 Mon Sep 17 00:00:00 2001
From: Nazarii Hnydyn <nazariig@nvidia.com>
Date: Wed, 24 Apr 2024 00:27:12 +0300
Subject: [PATCH 0472/1115] [buildsystem]: Fix config layout. (#18714)

Signed-off-by: Nazarii Hnydyn <nazariig@nvidia.com>
---
 slave.mk | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/slave.mk b/slave.mk
index 68ed31cd5..eb537e740 100644
--- a/slave.mk
+++ b/slave.mk
@@ -395,7 +395,7 @@ $(info "PASSWORD"                        : "$(PASSWORD)")
 $(info "CHANGE_DEFAULT_PASSWORD"         : "$(CHANGE_DEFAULT_PASSWORD)")
 $(info "SECURE_UPGRADE_MODE"             : "$(SECURE_UPGRADE_MODE)")
 $(info "SECURE_UPGRADE_DEV_SIGNING_KEY"  : "$(SECURE_UPGRADE_DEV_SIGNING_KEY)")
-$(info "SECURE_UPGRADE_SIGNING_CERT" : "$(SECURE_UPGRADE_SIGNING_CERT)")
+$(info "SECURE_UPGRADE_SIGNING_CERT"     : "$(SECURE_UPGRADE_SIGNING_CERT)")
 $(info "SECURE_UPGRADE_PROD_SIGNING_TOOL": "$(SECURE_UPGRADE_PROD_SIGNING_TOOL)")
 $(info "SECURE_UPGRADE_PROD_TOOL_ARGS"   : "$(SECURE_UPGRADE_PROD_TOOL_ARGS)")
 $(info "ONIE_IMAGE_PART_SIZE"            : "$(ONIE_IMAGE_PART_SIZE)")
@@ -444,7 +444,7 @@ $(info "INCLUDE_TEAMD"                   : "$(INCLUDE_TEAMD)")
 $(info "INCLUDE_ROUTER_ADVERTISER"       : "$(INCLUDE_ROUTER_ADVERTISER)")
 $(info "INCLUDE_BOOTCHART                : "$(INCLUDE_BOOTCHART)")
 $(info "ENABLE_BOOTCHART                 : "$(ENABLE_BOOTCHART)")
-$(info "INCLUDE_FIPS"             : "$(INCLUDE_FIPS)")
+$(info "INCLUDE_FIPS"                    : "$(INCLUDE_FIPS)")
 $(info "ENABLE_TRANSLIB_WRITE"           : "$(ENABLE_TRANSLIB_WRITE)")
 $(info "ENABLE_NATIVE_WRITE"             : "$(ENABLE_NATIVE_WRITE)")
 $(info "ENABLE_DIALOUT"                  : "$(ENABLE_DIALOUT)")

From d6f1893011aaa8488d964a11614e82d1f943baea Mon Sep 17 00:00:00 2001
From: Yakiv Huryk <62013282+Yakiv-Huryk@users.noreply.github.com>
Date: Wed, 24 Apr 2024 02:14:23 +0300
Subject: [PATCH 0473/1115] [Mellanox] add x86_64-nvidia_sn4280_simx-r0
 platform (#18575)

Signed-off-by: Yakiv Huryk <yhuryk@nvidia.com>
---
 .../ACS-SN4280/buffers.json.j2                |   1 +
 .../ACS-SN4280/buffers_defaults_objects.j2    |   1 +
 .../ACS-SN4280/buffers_defaults_t0.j2         |   1 +
 .../ACS-SN4280/buffers_defaults_t1.j2         |   1 +
 .../ACS-SN4280/buffers_dynamic.json.j2        |   1 +
 .../create_only_config_db_buffers.json        |   7 +
 .../ACS-SN4280/hwsku.json                     | 100 +++
 .../ACS-SN4280/pg_profile_lookup.ini          |  39 +
 .../ACS-SN4280/port_config.ini                |  51 ++
 .../ACS-SN4280/qos.json.j2                    |   1 +
 .../ACS-SN4280/sai.profile                    |   2 +
 .../ACS-SN4280/sai_4280.xml                   | 265 +++++++
 .../x86_64-nvidia_sn4280_simx-r0/default_sku  |   1 +
 .../x86_64-nvidia_sn4280_simx-r0/pcie.yaml    |  90 +++
 .../platform.json                             | 679 ++++++++++++++++++
 .../platform_asic                             |   1 +
 .../pmon_daemon_control.json                  |   5 +
 .../system_health_monitoring_config.json      |   1 +
 .../thermal_policy.json                       |   1 +
 platform/mellanox/asic_table.j2               |   1 +
 .../sonic_platform/device_data.py             |   8 +
 .../sonic_platform/eeprom.py                  |   3 +-
 22 files changed, 1259 insertions(+), 1 deletion(-)
 create mode 120000 device/mellanox/x86_64-nvidia_sn4280_simx-r0/ACS-SN4280/buffers.json.j2
 create mode 120000 device/mellanox/x86_64-nvidia_sn4280_simx-r0/ACS-SN4280/buffers_defaults_objects.j2
 create mode 120000 device/mellanox/x86_64-nvidia_sn4280_simx-r0/ACS-SN4280/buffers_defaults_t0.j2
 create mode 120000 device/mellanox/x86_64-nvidia_sn4280_simx-r0/ACS-SN4280/buffers_defaults_t1.j2
 create mode 120000 device/mellanox/x86_64-nvidia_sn4280_simx-r0/ACS-SN4280/buffers_dynamic.json.j2
 create mode 100644 device/mellanox/x86_64-nvidia_sn4280_simx-r0/ACS-SN4280/create_only_config_db_buffers.json
 create mode 100644 device/mellanox/x86_64-nvidia_sn4280_simx-r0/ACS-SN4280/hwsku.json
 create mode 100644 device/mellanox/x86_64-nvidia_sn4280_simx-r0/ACS-SN4280/pg_profile_lookup.ini
 create mode 100644 device/mellanox/x86_64-nvidia_sn4280_simx-r0/ACS-SN4280/port_config.ini
 create mode 120000 device/mellanox/x86_64-nvidia_sn4280_simx-r0/ACS-SN4280/qos.json.j2
 create mode 100644 device/mellanox/x86_64-nvidia_sn4280_simx-r0/ACS-SN4280/sai.profile
 create mode 100644 device/mellanox/x86_64-nvidia_sn4280_simx-r0/ACS-SN4280/sai_4280.xml
 create mode 100644 device/mellanox/x86_64-nvidia_sn4280_simx-r0/default_sku
 create mode 100644 device/mellanox/x86_64-nvidia_sn4280_simx-r0/pcie.yaml
 create mode 100644 device/mellanox/x86_64-nvidia_sn4280_simx-r0/platform.json
 create mode 100644 device/mellanox/x86_64-nvidia_sn4280_simx-r0/platform_asic
 create mode 100644 device/mellanox/x86_64-nvidia_sn4280_simx-r0/pmon_daemon_control.json
 create mode 120000 device/mellanox/x86_64-nvidia_sn4280_simx-r0/system_health_monitoring_config.json
 create mode 120000 device/mellanox/x86_64-nvidia_sn4280_simx-r0/thermal_policy.json

diff --git a/device/mellanox/x86_64-nvidia_sn4280_simx-r0/ACS-SN4280/buffers.json.j2 b/device/mellanox/x86_64-nvidia_sn4280_simx-r0/ACS-SN4280/buffers.json.j2
new file mode 120000
index 000000000..add8bf8bb
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280_simx-r0/ACS-SN4280/buffers.json.j2
@@ -0,0 +1 @@
+../../x86_64-mlnx_msn2700-r0/ACS-MSN2700/buffers.json.j2
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn4280_simx-r0/ACS-SN4280/buffers_defaults_objects.j2 b/device/mellanox/x86_64-nvidia_sn4280_simx-r0/ACS-SN4280/buffers_defaults_objects.j2
new file mode 120000
index 000000000..33b6704f9
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280_simx-r0/ACS-SN4280/buffers_defaults_objects.j2
@@ -0,0 +1 @@
+../../x86_64-mlnx_msn2700-r0/ACS-MSN2700/buffers_defaults_objects.j2
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn4280_simx-r0/ACS-SN4280/buffers_defaults_t0.j2 b/device/mellanox/x86_64-nvidia_sn4280_simx-r0/ACS-SN4280/buffers_defaults_t0.j2
new file mode 120000
index 000000000..ddb883a1d
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280_simx-r0/ACS-SN4280/buffers_defaults_t0.j2
@@ -0,0 +1 @@
+../../x86_64-mlnx_msn4700-r0/ACS-MSN4700/buffers_defaults_t0.j2
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn4280_simx-r0/ACS-SN4280/buffers_defaults_t1.j2 b/device/mellanox/x86_64-nvidia_sn4280_simx-r0/ACS-SN4280/buffers_defaults_t1.j2
new file mode 120000
index 000000000..f8bbb6e63
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280_simx-r0/ACS-SN4280/buffers_defaults_t1.j2
@@ -0,0 +1 @@
+../../x86_64-mlnx_msn4700-r0/ACS-MSN4700/buffers_defaults_t1.j2
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn4280_simx-r0/ACS-SN4280/buffers_dynamic.json.j2 b/device/mellanox/x86_64-nvidia_sn4280_simx-r0/ACS-SN4280/buffers_dynamic.json.j2
new file mode 120000
index 000000000..8c4117c66
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280_simx-r0/ACS-SN4280/buffers_dynamic.json.j2
@@ -0,0 +1 @@
+../../x86_64-mlnx_msn2700-r0/ACS-MSN2700/buffers_dynamic.json.j2
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn4280_simx-r0/ACS-SN4280/create_only_config_db_buffers.json b/device/mellanox/x86_64-nvidia_sn4280_simx-r0/ACS-SN4280/create_only_config_db_buffers.json
new file mode 100644
index 000000000..6feb15671
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280_simx-r0/ACS-SN4280/create_only_config_db_buffers.json
@@ -0,0 +1,7 @@
+{
+    "DEVICE_METADATA": {
+        "localhost": {
+            "create_only_config_db_buffers": "true"
+        }
+    }
+}
diff --git a/device/mellanox/x86_64-nvidia_sn4280_simx-r0/ACS-SN4280/hwsku.json b/device/mellanox/x86_64-nvidia_sn4280_simx-r0/ACS-SN4280/hwsku.json
new file mode 100644
index 000000000..c226252e5
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280_simx-r0/ACS-SN4280/hwsku.json
@@ -0,0 +1,100 @@
+{
+    "interfaces": {
+        "Ethernet0": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]"
+        },
+        "Ethernet8": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]"
+        },
+        "Ethernet16": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]"
+        },
+        "Ethernet24": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]"
+        },
+        "Ethernet32": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]"
+        },
+        "Ethernet40": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]"
+        },
+        "Ethernet48": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]"
+        },
+        "Ethernet56": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]"
+        },
+        "Ethernet64": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]"
+        },
+        "Ethernet72": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]"
+        },
+        "Ethernet80": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]"
+        },
+        "Ethernet88": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]"
+        },
+        "Ethernet96": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]"
+        },
+        "Ethernet104": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]"
+        },
+        "Ethernet112": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]"
+        },
+        "Ethernet120": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]"
+        },
+        "Ethernet128": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]"
+        },
+        "Ethernet136": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]"
+        },
+        "Ethernet144": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]"
+        },
+        "Ethernet152": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]"
+        },
+        "Ethernet160": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]"
+        },
+        "Ethernet168": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]"
+        },
+        "Ethernet176": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]"
+        },
+        "Ethernet184": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]"
+        },
+        "Ethernet192": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]"
+        },
+        "Ethernet200": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]"
+        },
+        "Ethernet208": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]"
+        },
+        "Ethernet216": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]"
+        },
+        "Ethernet224": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]"
+        },
+        "Ethernet232": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]"
+        },
+        "Ethernet240": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]"
+        },
+        "Ethernet248": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]"
+        }
+    }
+}
diff --git a/device/mellanox/x86_64-nvidia_sn4280_simx-r0/ACS-SN4280/pg_profile_lookup.ini b/device/mellanox/x86_64-nvidia_sn4280_simx-r0/ACS-SN4280/pg_profile_lookup.ini
new file mode 100644
index 000000000..f77fc19d1
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280_simx-r0/ACS-SN4280/pg_profile_lookup.ini
@@ -0,0 +1,39 @@
+##
+## Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+## Apache-2.0
+##
+## Licensed under the Apache License, Version 2.0 (the "License");
+## you may not use this file except in compliance with the License.
+## You may obtain a copy of the License at
+##
+## http://www.apache.org/licenses/LICENSE-2.0
+##
+## Unless required by applicable law or agreed to in writing, software
+## distributed under the License is distributed on an "AS IS" BASIS,
+## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+## See the License for the specific language governing permissions and
+## limitations under the License.
+##
+#  PG lossless profiles.
+# speed cable  size   xon    xoff   threshold
+  10000    5m 52224  19456  32768          0
+  25000    5m 52224  19456  32768          0
+  40000    5m 53248  19456  33792          0
+  50000    5m 53248  19456  33792          0
+ 100000    5m 53248  19456  33792          0
+ 200000    5m 55296  19456  35840          0
+ 400000    5m 86016  37888  38912          0
+  10000   40m 53248  19456  33792          0
+  25000   40m 55296  19456  35840          0
+  40000   40m 57344  19456  37888          0
+  50000   40m 58368  19456  38912          0
+ 100000   40m 63488  19456  44032          0
+ 200000   40m 74752  19456  55296          0
+ 400000   40m 124928 37888  77824          0
+  10000  300m 60416  19456  40960          0
+  25000  300m 73728  19456  54272          0
+  40000  300m 86016  19456  66560          0
+  50000  300m 95232  19456  75776          0
+ 100000  300m 137216 19456  117760         0
+ 200000  300m 223232 19456  203776         0
+ 400000  300m 420864 37888  373760         0
diff --git a/device/mellanox/x86_64-nvidia_sn4280_simx-r0/ACS-SN4280/port_config.ini b/device/mellanox/x86_64-nvidia_sn4280_simx-r0/ACS-SN4280/port_config.ini
new file mode 100644
index 000000000..5a5faf7b9
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280_simx-r0/ACS-SN4280/port_config.ini
@@ -0,0 +1,51 @@
+##
+## Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+## Apache-2.0
+##
+## Licensed under the Apache License, Version 2.0 (the "License");
+## you may not use this file except in compliance with the License.
+## You may obtain a copy of the License at
+##
+## http://www.apache.org/licenses/LICENSE-2.0
+##
+## Unless required by applicable law or agreed to in writing, software
+## distributed under the License is distributed on an "AS IS" BASIS,
+## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+## See the License for the specific language governing permissions and
+## limitations under the License.
+##
+
+
+# name          lanes                               alias     index
+Ethernet0       0,1,2,3,4,5,6,7                     etp1      1
+Ethernet8       8,9,10,11,12,13,14,15               etp2      2
+Ethernet16      16,17,18,19,20,21,22,23             etp3      3
+Ethernet24      24,25,26,27,28,29,30,31             etp4      4
+Ethernet32      32,33,34,35,36,37,38,39             etp5      5
+Ethernet40      40,41,42,43,44,45,46,47             etp6      6
+Ethernet48      48,49,50,51,52,53,54,55             etp7      7
+Ethernet56      56,57,58,59,60,61,62,63             etp8      8
+Ethernet64      64,65,66,67,68,69,70,71             etp9      9
+Ethernet72      72,73,74,75,76,77,78,79             etp10     10
+Ethernet80      80,81,82,83,84,85,86,87             etp11     11
+Ethernet88      88,89,90,91,92,93,94,95             etp12     12
+Ethernet96      96,97,98,99,100,101,102,103         etp13     13
+Ethernet104     104,105,106,107,108,109,110,111     etp14     14
+Ethernet112     112,113,114,115,116,117,118,119     etp15     15
+Ethernet120     120,121,122,123,124,125,126,127     etp16     16
+Ethernet128     128,129,130,131,132,133,134,135     etp17     17
+Ethernet136     136,137,138,139,140,141,142,143     etp18     18
+Ethernet144     144,145,146,147,148,149,150,151     etp19     19
+Ethernet152     152,153,154,155,156,157,158,159     etp20     20
+Ethernet160     160,161,162,163,164,165,166,167     etp21     21
+Ethernet168     168,169,170,171,172,173,174,175     etp22     22
+Ethernet176     176,177,178,179,180,181,182,183     etp23     23
+Ethernet184     184,185,186,187,188,189,190,191     etp24     24
+Ethernet192     192,193,194,195,196,197,198,199     etp25     25
+Ethernet200     200,201,202,203,204,205,206,207     etp26     26
+Ethernet208     208,209,210,211,212,213,214,215     etp27     27
+Ethernet216     216,217,218,219,220,221,222,223     etp28     28
+Ethernet224     224,225,226,227,228,229,230,231     etp29     29
+Ethernet232     232,233,234,235,236,237,238,239     etp30     30
+Ethernet240     240,241,242,243,244,245,246,247     etp31     31
+Ethernet248     248,249,250,251,252,253,254,255     etp32     32
diff --git a/device/mellanox/x86_64-nvidia_sn4280_simx-r0/ACS-SN4280/qos.json.j2 b/device/mellanox/x86_64-nvidia_sn4280_simx-r0/ACS-SN4280/qos.json.j2
new file mode 120000
index 000000000..eccf286dc
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280_simx-r0/ACS-SN4280/qos.json.j2
@@ -0,0 +1 @@
+../../x86_64-mlnx_msn2700-r0/ACS-MSN2700/qos.json.j2
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn4280_simx-r0/ACS-SN4280/sai.profile b/device/mellanox/x86_64-nvidia_sn4280_simx-r0/ACS-SN4280/sai.profile
new file mode 100644
index 000000000..ba85679dc
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280_simx-r0/ACS-SN4280/sai.profile
@@ -0,0 +1,2 @@
+SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_4280.xml
+SAI_DUMP_MFT_CFG_PATH=/etc/mft/fwtrace_cfg
diff --git a/device/mellanox/x86_64-nvidia_sn4280_simx-r0/ACS-SN4280/sai_4280.xml b/device/mellanox/x86_64-nvidia_sn4280_simx-r0/ACS-SN4280/sai_4280.xml
new file mode 100644
index 000000000..b02a1d8aa
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280_simx-r0/ACS-SN4280/sai_4280.xml
@@ -0,0 +1,265 @@
+<?xml version="1.0"?>
+<!--
+  Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+  Apache-2.0
+
+  Licensed under the Apache License, Version 2.0 (the "License");
+  you may not use this file except in compliance with the License.
+  You may obtain a copy of the License at
+
+  http://www.apache.org/licenses/LICENSE-2.0
+
+  Unless required by applicable law or agreed to in writing, software
+  distributed under the License is distributed on an "AS IS" BASIS,
+  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+  See the License for the specific language governing permissions and
+  limitations under the License.
+-->
+<root>
+    <platform_info type="4280">
+
+        <!-- Device MAC address  -->
+        <device-mac-address>00:02:03:04:05:00</device-mac-address>
+
+        <!-- ISSU enabled -->
+        <issu-enabled>1</issu-enabled>
+
+        <!-- Number of ports in the following port list -->
+        <number-of-physical-ports>32</number-of-physical-ports>
+
+        <!-- Global port late create -->
+        <late-create-all-ports>1</late-create-all-ports>
+
+        <!-- List of ports in the device -->
+        <ports-list>
+            <port-info>
+                <local-port>1</local-port>
+                <width>8</width>
+                <module>17</module>
+
+                <!-- 0 none, 1=2, 2=4, 3=2,4 -->
+                <breakout-modes>3</breakout-modes>
+
+                <!-- (BITMASK) 2 - 1Gb , 16 - 10Gb , 32 - 40Gb , 384 - 50Gb , 1536 - 100Gb , 4096 - 200Gb -->
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>5</local-port>
+                <width>8</width>
+                <module>16</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>9</local-port>
+                <width>8</width>
+                <module>19</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>13</local-port>
+                <width>8</width>
+                <module>18</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>17</local-port>
+                <width>8</width>
+                <module>21</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>21</local-port>
+                <width>8</width>
+                <module>20</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>25</local-port>
+                <width>8</width>
+                <module>23</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>29</local-port>
+                <width>8</width>
+                <module>22</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>33</local-port>
+                <width>8</width>
+                <module>29</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>37</local-port>
+                <width>8</width>
+                <module>28</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>41</local-port>
+                <width>8</width>
+                <module>31</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>45</local-port>
+                <width>8</width>
+                <module>30</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>49</local-port>
+                <width>8</width>
+                <module>25</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>53</local-port>
+                <width>8</width>
+                <module>24</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>57</local-port>
+                <width>8</width>
+                <module>27</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>61</local-port>
+                <width>8</width>
+                <module>26</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>65</local-port>
+                <width>8</width>
+                <module>14</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>69</local-port>
+                <width>8</width>
+                <module>15</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>73</local-port>
+                <width>8</width>
+                <module>12</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>77</local-port>
+                <width>8</width>
+                <module>13</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>81</local-port>
+                <width>8</width>
+                <module>10</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>85</local-port>
+                <width>8</width>
+                <module>11</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>89</local-port>
+                <width>8</width>
+                <module>8</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>93</local-port>
+                <width>8</width>
+                <module>9</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>97</local-port>
+                <width>8</width>
+                <module>2</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>101</local-port>
+                <width>8</width>
+                <module>3</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>105</local-port>
+                <width>8</width>
+                <module>0</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>109</local-port>
+                <width>8</width>
+                <module>1</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>113</local-port>
+                <width>8</width>
+                <module>6</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>117</local-port>
+                <width>8</width>
+                <module>7</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>121</local-port>
+                <width>8</width>
+                <module>4</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>125</local-port>
+                <width>8</width>
+                <module>5</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+        </ports-list>
+    </platform_info>
+</root>
diff --git a/device/mellanox/x86_64-nvidia_sn4280_simx-r0/default_sku b/device/mellanox/x86_64-nvidia_sn4280_simx-r0/default_sku
new file mode 100644
index 000000000..e74f1904d
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280_simx-r0/default_sku
@@ -0,0 +1 @@
+ACS-SN4280 t1
diff --git a/device/mellanox/x86_64-nvidia_sn4280_simx-r0/pcie.yaml b/device/mellanox/x86_64-nvidia_sn4280_simx-r0/pcie.yaml
new file mode 100644
index 000000000..8d558ab12
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280_simx-r0/pcie.yaml
@@ -0,0 +1,90 @@
+#
+# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+- bus: '00'
+  dev: '00'
+  fn: '0'
+  id: '1237'
+  name: 'Host bridge: Intel Corporation 440FX - 82441FX PMC [Natoma] (rev 02)'
+- bus: '00'
+  dev: '01'
+  fn: '0'
+  id: '7000'
+  name: 'ISA bridge: Intel Corporation 82371SB PIIX3 ISA [Natoma/Triton II]'
+- bus: '00'
+  dev: '01'
+  fn: '1'
+  id: '7010'
+  name: 'IDE interface: Intel Corporation 82371SB PIIX3 IDE [Natoma/Triton II]'
+- bus: '00'
+  dev: '01'
+  fn: '2'
+  id: '7020'
+  name: 'USB controller: Intel Corporation 82371SB PIIX3 USB [Natoma/Triton II] (rev
+    01)'
+- bus: '00'
+  dev: '01'
+  fn: '3'
+  id: '7113'
+  name: 'Bridge: Intel Corporation 82371AB/EB/MB PIIX4 ACPI (rev 03)'
+- bus: '00'
+  dev: '02'
+  fn: '0'
+  id: 00b8
+  name: 'VGA compatible controller: Cirrus Logic GD 5446'
+- bus: '00'
+  dev: '03'
+  fn: '0'
+  id: 100e
+  name: 'Ethernet controller: Intel Corporation 82540EM Gigabit Ethernet Controller
+    (rev 03)'
+- bus: '00'
+  dev: '04'
+  fn: '0'
+  id: '1002'
+  name: 'Unclassified device [00ff]: Red Hat, Inc. Virtio memory balloon'
+- bus: '00'
+  dev: '05'
+  fn: '0'
+  id: '1009'
+  name: 'Unclassified device [0002]: Red Hat, Inc. Virtio filesystem'
+- bus: '00'
+  dev: '06'
+  fn: '0'
+  id: '2922'
+  name: 'SATA controller: Intel Corporation 82801IR/IO/IH (ICH9R/DO/DH) 6 port SATA
+    Controller [AHCI mode] (rev 02)'
+- bus: '00'
+  dev: '07'
+  fn: '0'
+  id: '0001'
+  name: 'PCI bridge: Red Hat, Inc. QEMU PCI-PCI bridge'
+- bus: '00'
+  dev: 0c
+  fn: '0'
+  id: '1009'
+  name: 'Unclassified device [0002]: Red Hat, Inc. Virtio filesystem'
+- bus: '00'
+  dev: 0e
+  fn: '0'
+  id: '1001'
+  name: 'System peripheral: NVIDIA Corporation GK110B [GeForce GTX TITAN Z] (rev 01)'
+- bus: '01'
+  dev: '10'
+  fn: '0'
+  id: cf70
+  name: 'Ethernet controller: Mellanox Technologies Spectrum-3'
diff --git a/device/mellanox/x86_64-nvidia_sn4280_simx-r0/platform.json b/device/mellanox/x86_64-nvidia_sn4280_simx-r0/platform.json
new file mode 100644
index 000000000..599d9269a
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280_simx-r0/platform.json
@@ -0,0 +1,679 @@
+{
+    "chassis": {
+        "name": "SN4280",
+        "components": [
+            {
+                "name": "ONIE"
+            },
+            {
+                "name": "SSD"
+            },
+            {
+                "name": "BIOS"
+            },
+            {
+                "name": "CPLD1"
+            },
+            {
+                "name": "CPLD2"
+            },
+            {
+                "name": "CPLD3"
+            }
+        ],
+        "fans": [],
+        "fan_drawers": [
+            {
+                "name": "drawer1",
+                "fans": [
+                    {
+                        "name": "fan1"
+                    }
+                ]
+            },
+            {
+                "name": "drawer2",
+                "fans": [
+                    {
+                        "name": "fan2"
+                    }
+                ]
+            },
+            {
+                "name": "drawer3",
+                "fans": [
+                    {
+                        "name": "fan3"
+                    }
+                ]
+            },
+            {
+                "name": "drawer4",
+                "fans": [
+                    {
+                        "name": "fan4"
+                    }
+                ]
+            }
+        ],
+        "psus": [
+            {
+                "name": "PSU 1",
+                "fans": [
+                    {
+                        "name": "psu1_fan1"
+                    }
+                ],
+                "thermals": [
+                    {
+                        "name": "PSU-1 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "PSU 2",
+                "fans": [
+                    {
+                        "name": "psu2_fan1"
+                    }
+                ],
+                "thermals": [
+                    {
+                        "name": "PSU-2 Temp"
+                    }
+                ]
+            }
+        ],
+        "thermals": [
+            {
+                "name": "ASIC"
+            },
+            {
+                "name": "Ambient Fan Side Temp"
+            },
+            {
+                "name": "Ambient Port Side Temp"
+            }
+        ],
+        "sfps": [
+            {
+                "name": "sfp1",
+                "thermals": [
+                    {
+                        "name": "xSFP module 1 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp2",
+                "thermals": [
+                    {
+                        "name": "xSFP module 2 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp3",
+                "thermals": [
+                    {
+                        "name": "xSFP module 3 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp4",
+                "thermals": [
+                    {
+                        "name": "xSFP module 4 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp5",
+                "thermals": [
+                    {
+                        "name": "xSFP module 5 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp6",
+                "thermals": [
+                    {
+                        "name": "xSFP module 6 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp7",
+                "thermals": [
+                    {
+                        "name": "xSFP module 7 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp8",
+                "thermals": [
+                    {
+                        "name": "xSFP module 8 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp9",
+                "thermals": [
+                    {
+                        "name": "xSFP module 9 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp10",
+                "thermals": [
+                    {
+                        "name": "xSFP module 10 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp11",
+                "thermals": [
+                    {
+                        "name": "xSFP module 11 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp12",
+                "thermals": [
+                    {
+                        "name": "xSFP module 12 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp13",
+                "thermals": [
+                    {
+                        "name": "xSFP module 13 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp14",
+                "thermals": [
+                    {
+                        "name": "xSFP module 14 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp15",
+                "thermals": [
+                    {
+                        "name": "xSFP module 15 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp16",
+                "thermals": [
+                    {
+                        "name": "xSFP module 16 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp17",
+                "thermals": [
+                    {
+                        "name": "xSFP module 17 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp18",
+                "thermals": [
+                    {
+                        "name": "xSFP module 18 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp19",
+                "thermals": [
+                    {
+                        "name": "xSFP module 19 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp20",
+                "thermals": [
+                    {
+                        "name": "xSFP module 20 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp21",
+                "thermals": [
+                    {
+                        "name": "xSFP module 21 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp22",
+                "thermals": [
+                    {
+                        "name": "xSFP module 22 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp23",
+                "thermals": [
+                    {
+                        "name": "xSFP module 23 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp24",
+                "thermals": [
+                    {
+                        "name": "xSFP module 24 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp25",
+                "thermals": [
+                    {
+                        "name": "xSFP module 25 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp26",
+                "thermals": [
+                    {
+                        "name": "xSFP module 26 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp27",
+                "thermals": [
+                    {
+                        "name": "xSFP module 27 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp28",
+                "thermals": [
+                    {
+                        "name": "xSFP module 28 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp29",
+                "thermals": [
+                    {
+                        "name": "xSFP module 29 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp30",
+                "thermals": [
+                    {
+                        "name": "xSFP module 30 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp31",
+                "thermals": [
+                    {
+                        "name": "xSFP module 31 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp32",
+                "thermals": [
+                    {
+                        "name": "xSFP module 32 Temp"
+                    }
+                ]
+            }
+        ]
+    },
+    "interfaces": {
+        "Ethernet0": {
+            "index": "1,1,1,1,1,1,1,1", 
+            "lanes": "0,1,2,3,4,5,6,7",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G,1G]": ["etp1"],
+                "2x200G[100G,50G,40G,25G,10G,1G]": ["etp1a", "etp1b"],
+                "4x100G[50G,25G,10G,1G]": ["etp1a", "etp1b", "etp1c", "etp1d"],
+                "4x25G(4)[10G,1G]": ["etp1a", "etp1b", "etp1c", "etp1d"]
+            }
+        }, 
+        "Ethernet8": {
+            "index": "2,2,2,2,2,2,2,2", 
+            "lanes": "8,9,10,11,12,13,14,15", 
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G,1G]": ["etp2"],
+                "2x200G[100G,50G,40G,25G,10G,1G]": ["etp2a", "etp2b"],
+                "4x100G[50G,25G,10G,1G]": ["etp2a", "etp2b", "etp2c", "etp2d"],
+                "4x25G(4)[10G,1G]": ["etp2a", "etp2b", "etp2c", "etp2d"]
+            }
+        }, 
+        "Ethernet16": {
+            "index": "3,3,3,3,3,3,3,3", 
+            "lanes": "16,17,18,19,20,21,22,23", 
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G,1G]": ["etp3"],
+                "2x200G[100G,50G,40G,25G,10G,1G]": ["etp3a", "etp3b"],
+                "4x100G[50G,25G,10G,1G]": ["etp3a", "etp3b", "etp3c", "etp3d"],
+                "4x25G(4)[10G,1G]": ["etp3a", "etp3b", "etp3c", "etp3d"]
+            }
+        }, 
+        "Ethernet24": {
+            "index": "4,4,4,4,4,4,4,4", 
+            "lanes": "24,25,26,27,28,29,30,31", 
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G,1G]": ["etp4"],
+                "2x200G[100G,50G,40G,25G,10G,1G]": ["etp4a", "etp4b"],
+                "4x100G[50G,25G,10G,1G]": ["etp4a", "etp4b", "etp4c", "etp4d"],
+                "4x25G(4)[10G,1G]": ["etp4a", "etp4b", "etp4c", "etp4d"]
+            }
+        }, 
+        "Ethernet32": {
+            "index": "5,5,5,5,5,5,5,5", 
+            "lanes": "32,33,34,35,36,37,38,39", 
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G,1G]": ["etp5"],
+                "2x200G[100G,50G,40G,25G,10G,1G]": ["etp5a", "etp5b"],
+                "4x100G[50G,25G,10G,1G]": ["etp5a", "etp5b", "etp5c", "etp5d"],
+                "4x25G(4)[10G,1G]": ["etp5a", "etp5b", "etp5c", "etp5d"]
+            }
+        }, 
+        "Ethernet40": {
+            "index": "6,6,6,6,6,6,6,6", 
+            "lanes": "40,41,42,43,44,45,46,47", 
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G,1G]": ["etp6"],
+                "2x200G[100G,50G,40G,25G,10G,1G]": ["etp6a", "etp6b"],
+                "4x100G[50G,25G,10G,1G]": ["etp6a", "etp6b", "etp6c", "etp6d"],
+                "4x25G(4)[10G,1G]": ["etp6a", "etp6b", "etp6c", "etp6d"]
+            }
+        }, 
+        "Ethernet48": {
+            "index": "7,7,7,7,7,7,7,7", 
+            "lanes": "48,49,50,51,52,53,54,55", 
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G,1G]": ["etp7"],
+                "2x200G[100G,50G,40G,25G,10G,1G]": ["etp7a", "etp7b"],
+                "4x100G[50G,25G,10G,1G]": ["etp7a", "etp7b", "etp7c", "etp7d"],
+                "4x25G(4)[10G,1G]": ["etp7a", "etp7b", "etp7c", "etp7d"]
+            }
+        }, 
+        "Ethernet56": {
+            "index": "8,8,8,8,8,8,8,8", 
+            "lanes": "56,57,58,59,60,61,62,63", 
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G,1G]": ["etp8"],
+                "2x200G[100G,50G,40G,25G,10G,1G]": ["etp8a", "etp8b"],
+                "4x100G[50G,25G,10G,1G]": ["etp8a", "etp8b", "etp8c", "etp8d"],
+                "4x25G(4)[10G,1G]": ["etp8a", "etp8b", "etp8c", "etp8d"]
+            }
+        }, 
+        "Ethernet64": {
+            "index": "9,9,9,9,9,9,9,9", 
+            "lanes": "64,65,66,67,68,69,70,71", 
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G,1G]": ["etp9"],
+                "2x200G[100G,50G,40G,25G,10G,1G]": ["etp9a", "etp9b"],
+                "4x100G[50G,25G,10G,1G]": ["etp9a", "etp9b", "etp9c", "etp9d"],
+                "4x25G(4)[10G,1G]": ["etp9a", "etp9b", "etp9c", "etp9d"]
+            }
+        }, 
+        "Ethernet72": {
+            "index": "10,10,10,10,10,10,10,10", 
+            "lanes": "72,73,74,75,76,77,78,79", 
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G,1G]": ["etp10"],
+                "2x200G[100G,50G,40G,25G,10G,1G]": ["etp10a", "etp10b"],
+                "4x100G[50G,25G,10G,1G]": ["etp10a", "etp10b", "etp10c", "etp10d"],
+                "4x25G(4)[10G,1G]": ["etp10a", "etp10b", "etp10c", "etp10d"]
+            }
+        },
+        "Ethernet80": {
+            "index": "11,11,11,11,11,11,11,11", 
+            "lanes": "80,81,82,83,84,85,86,87", 
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G,1G]": ["etp11"],
+                "2x200G[100G,50G,40G,25G,10G,1G]": ["etp11a", "etp11b"],
+                "4x100G[50G,25G,10G,1G]": ["etp11a", "etp11b", "etp11c", "etp11d"],
+                "4x25G(4)[10G,1G]": ["etp11a", "etp11b", "etp11c", "etp11d"]
+            }
+        }, 
+        "Ethernet88": {
+            "index": "12,12,12,12,12,12,12,12", 
+            "lanes": "88,89,90,91,92,93,94,95", 
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G,1G]": ["etp12"],
+                "2x200G[100G,50G,40G,25G,10G,1G]": ["etp12a", "etp12b"],
+                "4x100G[50G,25G,10G,1G]": ["etp12a", "etp12b", "etp12c", "etp12d"],
+                "4x25G(4)[10G,1G]": ["etp12a", "etp12b", "etp12c", "etp12d"]
+            }
+        }, 
+        "Ethernet96": {
+            "index": "13,13,13,13,13,13,13,13", 
+            "lanes": "96,97,98,99,100,101,102,103", 
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G,1G]": ["etp13"],
+                "2x200G[100G,50G,40G,25G,10G,1G]": ["etp13a", "etp13b"],
+                "4x100G[50G,25G,10G,1G]": ["etp13a", "etp13b", "etp13c", "etp13d"],
+                "4x25G(4)[10G,1G]": ["etp13a", "etp13b", "etp13c", "etp13d"]
+            }
+        }, 
+        "Ethernet104": {
+            "index": "14,14,14,14,14,14,14,14", 
+            "lanes": "104,105,106,107,108,109,110,111", 
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G,1G]": ["etp14"],
+                "2x200G[100G,50G,40G,25G,10G,1G]": ["etp14a", "etp14b"],
+                "4x100G[50G,25G,10G,1G]": ["etp14a", "etp14b", "etp14c", "etp14d"],
+                "4x25G(4)[10G,1G]": ["etp14a", "etp14b", "etp14c", "etp14d"]
+            }
+        }, 
+        "Ethernet112": {
+            "index": "15,15,15,15,15,15,15,15", 
+            "lanes": "112,113,114,115,116,117,118,119", 
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G,1G]": ["etp15"],
+                "2x200G[100G,50G,40G,25G,10G,1G]": ["etp15a", "etp15b"],
+                "4x100G[50G,25G,10G,1G]": ["etp15a", "etp15b", "etp15c", "etp15d"],
+                "4x25G(4)[10G,1G]": ["etp15a", "etp15b", "etp15c", "etp15d"]
+            }
+        }, 
+        "Ethernet120": {
+            "index": "16,16,16,16,16,16,16,16", 
+            "lanes": "120,121,122,123,124,125,126,127", 
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G,1G]": ["etp16"],
+                "2x200G[100G,50G,40G,25G,10G,1G]": ["etp16a", "etp16b"],
+                "4x100G[50G,25G,10G,1G]": ["etp16a", "etp16b", "etp16c", "etp16d"],
+                "4x25G(4)[10G,1G]": ["etp16a", "etp16b", "etp16c", "etp16d"]
+            }
+        }, 
+        "Ethernet128": {
+            "index": "17,17,17,17,17,17,17,17", 
+            "lanes": "128,129,130,131,132,133,134,135", 
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G,1G]": ["etp17"],
+                "2x200G[100G,50G,40G,25G,10G,1G]": ["etp17a", "etp17b"],
+                "4x100G[50G,25G,10G,1G]": ["etp17a", "etp17b", "etp17c", "etp17d"],
+                "4x25G(4)[10G,1G]": ["etp17a", "etp17b", "etp17c", "etp17d"]
+            }
+        }, 
+        "Ethernet136": {
+            "index": "18,18,18,18,18,18,18,18", 
+            "lanes": "136,137,138,139,140,141,142,143", 
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G,1G]": ["etp18"],
+                "2x200G[100G,50G,40G,25G,10G,1G]": ["etp18a", "etp18b"],
+                "4x100G[50G,25G,10G,1G]": ["etp18a", "etp18b", "etp18c", "etp18d"],
+                "4x25G(4)[10G,1G]": ["etp18a", "etp18b", "etp18c", "etp18d"]
+            }
+        }, 
+        "Ethernet144": {
+            "index": "19,19,19,19,19,19,19,19", 
+            "lanes": "144,145,146,147,148,149,150,151", 
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G,1G]": ["etp19"],
+                "2x200G[100G,50G,40G,25G,10G,1G]": ["etp19a", "etp19b"],
+                "4x100G[50G,25G,10G,1G]": ["etp19a", "etp19b", "etp19c", "etp19d"],
+                "4x25G(4)[10G,1G]": ["etp19a", "etp19b", "etp19c", "etp19d"]
+            }
+        }, 
+        "Ethernet152": {
+            "index": "20,20,20,20,20,20,20,20", 
+            "lanes": "152,153,154,155,156,157,158,159", 
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G,1G]": ["etp20"],
+                "2x200G[100G,50G,40G,25G,10G,1G]": ["etp20a", "etp20b"],
+                "4x100G[50G,25G,10G,1G]": ["etp20a", "etp20b", "etp20c", "etp20d"],
+                "4x25G(4)[10G,1G]": ["etp20a", "etp20b", "etp20c", "etp20d"]
+            }
+        }, 
+        "Ethernet160": {
+            "index": "21,21,21,21,21,21,21,21", 
+            "lanes": "160,161,162,163,164,165,166,167", 
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G,1G]": ["etp21"],
+                "2x200G[100G,50G,40G,25G,10G,1G]": ["etp21a", "etp21b"],
+                "4x100G[50G,25G,10G,1G]": ["etp21a", "etp21b", "etp21c", "etp21d"],
+                "4x25G(4)[10G,1G]": ["etp21a", "etp21b", "etp21c", "etp21d"]
+            }
+        }, 
+        "Ethernet168": {
+            "index": "22,22,22,22,22,22,22,22", 
+            "lanes": "168,169,170,171,172,173,174,175", 
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G,1G]": ["etp22"],
+                "2x200G[100G,50G,40G,25G,10G,1G]": ["etp22a", "etp22b"],
+                "4x100G[50G,25G,10G,1G]": ["etp22a", "etp22b", "etp22c", "etp22d"],
+                "4x25G(4)[10G,1G]": ["etp22a", "etp22b", "etp22c", "etp22d"]
+            }
+        }, 
+        "Ethernet176": {
+            "index": "23,23,23,23,23,23,23,23", 
+            "lanes": "176,177,178,179,180,181,182,183", 
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G,1G]": ["etp23"],
+                "2x200G[100G,50G,40G,25G,10G,1G]": ["etp23a", "etp23b"],
+                "4x100G[50G,25G,10G,1G]": ["etp23a", "etp23b", "etp23c", "etp23d"],
+                "4x25G(4)[10G,1G]": ["etp23a", "etp23b", "etp23c", "etp23d"]
+            }
+        }, 
+        "Ethernet184": {
+            "index": "24,24,24,24,24,24,24,24", 
+            "lanes": "184,185,186,187,188,189,190,191", 
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G,1G]": ["etp24"],
+                "2x200G[100G,50G,40G,25G,10G,1G]": ["etp24a", "etp24b"],
+                "4x100G[50G,25G,10G,1G]": ["etp24a", "etp24b", "etp24c", "etp24d"],
+                "4x25G(4)[10G,1G]": ["etp24a", "etp24b", "etp24c", "etp24d"]
+            }
+        }, 
+        "Ethernet192": {
+            "index": "25,25,25,25,25,25,25,25", 
+            "lanes": "192,193,194,195,196,197,198,199", 
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G,1G]": ["etp25"],
+                "2x200G[100G,50G,40G,25G,10G,1G]": ["etp25a", "etp25b"],
+                "4x100G[50G,25G,10G,1G]": ["etp25a", "etp25b", "etp25c", "etp25d"],
+                "4x25G(4)[10G,1G]": ["etp25a", "etp25b", "etp25c", "etp25d"]
+            }
+        }, 
+        "Ethernet200": {
+            "index": "26,26,26,26,26,26,26,26", 
+            "lanes": "200,201,202,203,204,205,206,207", 
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G,1G]": ["etp26"],
+                "2x200G[100G,50G,40G,25G,10G,1G]": ["etp26a", "etp26b"],
+                "4x100G[50G,25G,10G,1G]": ["etp26a", "etp26b", "etp26c", "etp26d"],
+                "4x25G(4)[10G,1G]": ["etp26a", "etp26b", "etp26c", "etp26d"]
+            }
+        }, 
+        "Ethernet208": {
+            "index": "27,27,27,27,27,27,27,27", 
+            "lanes": "208,209,210,211,212,213,214,215", 
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G,1G]": ["etp27"],
+                "2x200G[100G,50G,40G,25G,10G,1G]": ["etp27a", "etp27b"],
+                "4x100G[50G,25G,10G,1G]": ["etp27a", "etp27b", "etp27c", "etp27d"],
+                "4x25G(4)[10G,1G]": ["etp27a", "etp27b", "etp27c", "etp27d"]
+            }
+        }, 
+        "Ethernet216": {
+            "index": "28,28,28,28,28,28,28,28", 
+            "lanes": "216,217,218,219,220,221,222,223", 
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G,1G]": ["etp28"],
+                "2x200G[100G,50G,40G,25G,10G,1G]": ["etp28a", "etp28b"],
+                "4x100G[50G,25G,10G,1G]": ["etp28a", "etp28b", "etp28c", "etp28d"],
+                "4x25G(4)[10G,1G]": ["etp28a", "etp28b", "etp28c", "etp28d"]
+            }
+        }, 
+        "Ethernet224": {
+            "index": "29,29,29,29,29,29,29,29", 
+            "lanes": "224,225,226,227,228,229,230,231", 
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G,1G]": ["etp29"],
+                "2x200G[100G,50G,40G,25G,10G,1G]": ["etp29a", "etp29b"],
+                "4x100G[50G,25G,10G,1G]": ["etp29a", "etp29b", "etp29c", "etp29d"],
+                "4x25G(4)[10G,1G]": ["etp29a", "etp29b", "etp29c", "etp29d"]
+            }
+        }, 
+        "Ethernet232": {
+            "index": "30,30,30,30,30,30,30,30", 
+            "lanes": "232,233,234,235,236,237,238,239", 
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G,1G]": ["etp30"],
+                "2x200G[100G,50G,40G,25G,10G,1G]": ["etp30a", "etp30b"],
+                "4x100G[50G,25G,10G,1G]": ["etp30a", "etp30b", "etp30c", "etp30d"],
+                "4x25G(4)[10G,1G]": ["etp30a", "etp30b", "etp30c", "etp30d"]
+            }
+        }, 
+        "Ethernet240": {
+            "index": "31,31,31,31,31,31,31,31", 
+            "lanes": "240,241,242,243,244,245,246,247", 
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G,1G]": ["etp31"],
+                "2x200G[100G,50G,40G,25G,10G,1G]": ["etp31a", "etp31b"],
+                "4x100G[50G,25G,10G,1G]": ["etp31a", "etp31b", "etp31c", "etp31d"],
+                "4x25G(4)[10G,1G]": ["etp31a", "etp31b", "etp31c", "etp31d"]
+            }
+        }, 
+        "Ethernet248": {
+            "index": "32,32,32,32,32,32,32,32", 
+            "lanes": "248,249,250,251,252,253,254,255", 
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G,1G]": ["etp32"],
+                "2x200G[100G,50G,40G,25G,10G,1G]": ["etp32a", "etp32b"],
+                "4x100G[50G,25G,10G,1G]": ["etp32a", "etp32b", "etp32c", "etp32d"],
+                "4x25G(4)[10G,1G]": ["etp32a", "etp32b", "etp32c", "etp32d"]
+            }
+        }
+    }
+}
diff --git a/device/mellanox/x86_64-nvidia_sn4280_simx-r0/platform_asic b/device/mellanox/x86_64-nvidia_sn4280_simx-r0/platform_asic
new file mode 100644
index 000000000..70c074885
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280_simx-r0/platform_asic
@@ -0,0 +1 @@
+mellanox
diff --git a/device/mellanox/x86_64-nvidia_sn4280_simx-r0/pmon_daemon_control.json b/device/mellanox/x86_64-nvidia_sn4280_simx-r0/pmon_daemon_control.json
new file mode 100644
index 000000000..b2c37062f
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280_simx-r0/pmon_daemon_control.json
@@ -0,0 +1,5 @@
+{
+        "skip_ledd": true,
+        "skip_xcvrd": true,
+        "skip_fancontrol": true
+}
diff --git a/device/mellanox/x86_64-nvidia_sn4280_simx-r0/system_health_monitoring_config.json b/device/mellanox/x86_64-nvidia_sn4280_simx-r0/system_health_monitoring_config.json
new file mode 120000
index 000000000..42fe94534
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280_simx-r0/system_health_monitoring_config.json
@@ -0,0 +1 @@
+../x86_64-mlnx_msn2700_simx-r0/system_health_monitoring_config.json
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn4280_simx-r0/thermal_policy.json b/device/mellanox/x86_64-nvidia_sn4280_simx-r0/thermal_policy.json
new file mode 120000
index 000000000..5a25cd87f
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280_simx-r0/thermal_policy.json
@@ -0,0 +1 @@
+../x86_64-mlnx_msn2700-r0/thermal_policy.json
\ No newline at end of file
diff --git a/platform/mellanox/asic_table.j2 b/platform/mellanox/asic_table.j2
index 76db12267..9fa36035a 100644
--- a/platform/mellanox/asic_table.j2
+++ b/platform/mellanox/asic_table.j2
@@ -41,6 +41,7 @@
         'x86_64-mlnx_msn4700-r0':'MELLANOX-SPECTRUM-3',
         'x86_64-mlnx_msn4600c-r0':'MELLANOX-SPECTRUM-3',
         'x86_64-mlnx_msn4600-r0':'MELLANOX-SPECTRUM-3',
+        'x86_64-nvidia_sn4280_simx-r0':'MELLANOX-SPECTRUM-3',
 	'x86_64-nvidia_sn4800-r0':'MELLANOX-SPECTRUM-3',
 	'x86_64-nvidia_sn4800_simx-r0':'MELLANOX-SPECTRUM-3',
         'x86_64-nvidia_sn2201-r0':'MELLANOX-SPECTRUM',
diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/device_data.py b/platform/mellanox/mlnx-platform-api/sonic_platform/device_data.py
index 9c0550252..b3b076573 100644
--- a/platform/mellanox/mlnx-platform-api/sonic_platform/device_data.py
+++ b/platform/mellanox/mlnx-platform-api/sonic_platform/device_data.py
@@ -127,6 +127,14 @@
                 "pch_temp": True
             }
         }
+    },
+    'x86_64-nvidia_sn4280_simx-r0': {
+        'thermal': {
+            "capability": {
+                "cpu_pack": False,
+                "comex_amb": False
+            }
+        }
     }
 }
 
diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/eeprom.py b/platform/mellanox/mlnx-platform-api/sonic_platform/eeprom.py
index 8a2aa058c..b273afb9c 100644
--- a/platform/mellanox/mlnx-platform-api/sonic_platform/eeprom.py
+++ b/platform/mellanox/mlnx-platform-api/sonic_platform/eeprom.py
@@ -41,7 +41,8 @@
 #
 EEPROM_SYMLINK = "/var/run/hw-management/eeprom/vpd_info"
 platform_name = DeviceDataManager.get_platform_name()
-if platform_name and 'simx' in platform_name and '4700' not in platform_name:
+platform_supporting_simx = ['x86_64-nvidia_sn4280_simx-r0', 'x86_64-mlnx_msn4700_simx-r0']
+if platform_name and 'simx' in platform_name and not platform_name in platform_supporting_simx:
     if not os.path.exists(EEPROM_SYMLINK):
         if is_host():
             platform_path = os.path.join('/usr/share/sonic/device', platform_name)

From b37c26ff6a27b6aebf32963ab7603f628cf2a127 Mon Sep 17 00:00:00 2001
From: Feng-msft <fenpan@microsoft.com>
Date: Wed, 24 Apr 2024 07:19:18 +0800
Subject: [PATCH 0474/1115] [yang]: Add yang models for bmp service. (#18530)

Why I did it
Add yang model support for feature sonic-net/SONiC#1621

Microsoft ADO (number only):27332639
---
 src/sonic-yang-models/doc/Configuration.md    | 16 ++++++
 src/sonic-yang-models/setup.py                |  2 +
 .../tests/files/sample_config_db.json         |  7 +++
 .../tests/yang_model_tests/tests/bmp.json     |  9 +++
 .../yang_model_tests/tests_config/bmp.json    | 24 ++++++++
 .../yang-models/sonic-bmp.yang                | 56 +++++++++++++++++++
 6 files changed, 114 insertions(+)
 create mode 100644 src/sonic-yang-models/tests/yang_model_tests/tests/bmp.json
 create mode 100644 src/sonic-yang-models/tests/yang_model_tests/tests_config/bmp.json
 create mode 100644 src/sonic-yang-models/yang-models/sonic-bmp.yang

diff --git a/src/sonic-yang-models/doc/Configuration.md b/src/sonic-yang-models/doc/Configuration.md
index 2ffbba945..8558142e6 100644
--- a/src/sonic-yang-models/doc/Configuration.md
+++ b/src/sonic-yang-models/doc/Configuration.md
@@ -33,6 +33,7 @@ Table of Contents
          * [Device neighbor metada](#device-neighbor-metada)
          * [DHCP_RELAY](#dhcp_relay)
          * [DHCP Server IPV4](#dhcp_server_ipv4)
+         * [BMP](#bmp)
          * [DSCP_TO_TC_MAP](#dscp_to_tc_map)
          * [FG_NHG](#fg_nhg)
          * [FG_NHG_MEMBER](#fg_nhg_member)
@@ -1007,6 +1008,21 @@ instance is supported in SONiC.
 
 ```
 
+### BMP
+BMP related configuration are defined in **bgp_neighbor_table**,**bgp_rib_in_table**, **bgp_rib_out_table** tables.
+
+```
+{
+    "BMP": {
+        "table": {
+            "bgp_neighbor_table": "true",
+            "bgp_rib_in_table": "false",
+            "bgp_rib_out_table": "false"
+        }
+    }
+}
+```
+
 ### DHCP_SERVER_IPV4
 IPV4 DHPC Server related configuration are defined in **DHCP_SERVER_IPV4**, **DHCP_SERVER_IPV4_CUSTOMIZED_OPTIONS**, **DHCP_SERVER_IPV4_RANGE**, **DHCP_SERVER_IPV4_PORT** tables.
 ```
diff --git a/src/sonic-yang-models/setup.py b/src/sonic-yang-models/setup.py
index ada13c288..bf0372b8f 100644
--- a/src/sonic-yang-models/setup.py
+++ b/src/sonic-yang-models/setup.py
@@ -200,6 +200,7 @@ def run(self):
                          './yang-models/sonic-system-port.yang',
                          './yang-models/sonic-macsec.yang',
                          './yang-models/sonic-bgp-sentinel.yang',
+                         './yang-models/sonic-bmp.yang',
                          './yang-models/sonic-smart-switch.yang',]),
         ('cvlyang-models', ['./cvlyang-models/sonic-acl.yang',
                          './cvlyang-models/sonic-banner.yang',
@@ -276,6 +277,7 @@ def run(self):
                          './cvlyang-models/sonic-static-route.yang',
                          './cvlyang-models/sonic-system-port.yang',
                          './cvlyang-models/sonic-macsec.yang',
+                         './cvlyang-models/sonic-bmp.yang',
                          './cvlyang-models/sonic-bgp-sentinel.yang']),
     ],
     zip_safe=False,
diff --git a/src/sonic-yang-models/tests/files/sample_config_db.json b/src/sonic-yang-models/tests/files/sample_config_db.json
index 50ffc18b7..eaf110d88 100644
--- a/src/sonic-yang-models/tests/files/sample_config_db.json
+++ b/src/sonic-yang-models/tests/files/sample_config_db.json
@@ -1304,6 +1304,13 @@
                 "report_type": "periodic"
             }
         },
+        "BMP": {
+            "table": {
+                "bgp_neighbor_table": "true",
+                "bgp_rib_in_table": "false",
+                "bgp_rib_out_table": "false"
+            }
+        },
         "GNMI": {
             "certs": {
                 "ca_crt": "/etc/sonic/credentials/dsmsroot.cer",
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/bmp.json b/src/sonic-yang-models/tests/yang_model_tests/tests/bmp.json
new file mode 100644
index 000000000..09883d417
--- /dev/null
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests/bmp.json
@@ -0,0 +1,9 @@
+{
+    "BMP_TABLE_WITH_VALID_CONFIG": {
+        "desc": "BMP TABLE WITH VALID CONFIG."
+    },
+    "BMP_TABLE_WITH_INVALID_CONFIG": {
+        "desc": "BMP TABLE WITH INVALID CONFIG.",
+        "eStrKey": "Pattern"
+    }
+}
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/bmp.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/bmp.json
new file mode 100644
index 000000000..cbc8dceea
--- /dev/null
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/bmp.json
@@ -0,0 +1,24 @@
+{
+    "BMP_TABLE_WITH_VALID_CONFIG": {
+        "sonic-bmp:sonic-bmp": {
+            "sonic-bmp:BMP": {
+                "table": {
+                    "bgp_neighbor_table": "true",
+                    "bgp_rib_in_table": "false",
+                    "bgp_rib_out_table": "false"
+                }
+            }
+        }
+    },
+    "BMP_TABLE_WITH_INVALID_CONFIG": {
+        "sonic-bmp:sonic-bmp": {
+            "sonic-bmp:BMP": {
+                "table": {
+                    "bgp_neighbor_table": "up",
+                    "bgp_rib_in_table": "false",
+                    "bgp_rib_out_table": "false"
+                }
+            }
+        }
+    }
+}
diff --git a/src/sonic-yang-models/yang-models/sonic-bmp.yang b/src/sonic-yang-models/yang-models/sonic-bmp.yang
new file mode 100644
index 000000000..70157f6c8
--- /dev/null
+++ b/src/sonic-yang-models/yang-models/sonic-bmp.yang
@@ -0,0 +1,56 @@
+module sonic-bmp {
+
+    yang-version 1.1;
+
+    namespace "http://github.com/sonic-net/sonic-bmp";
+    prefix bmp;
+
+    import sonic-types {
+        prefix stypes;
+    }
+
+    organization
+        "SONiC";
+
+    contact
+        "SONiC";
+
+    description "BMP YANG Module for SONiC OS";
+
+    revision 2024-03-20 {
+        description "First Revision";
+    }
+
+    container sonic-bmp {
+
+        container BMP {
+
+            description "BMP TABLE control part of config_db.json";
+
+            container table {
+
+                leaf bgp_neighbor_table {
+                    type stypes:boolean_type;
+                    default "true";
+                    description "Flag for enabling/disabling bgp_neighbor_table dump.";
+                }
+
+                leaf bgp_rib_in_table {
+                    type stypes:boolean_type;
+                    default "false";
+                    description "Flag for enabling/disabling bgp_rib_in_table dump.";
+                }
+
+                leaf bgp_rib_out_table {
+                    type stypes:boolean_type;
+                    default "false";
+                    description "Flag for enabling/disabling bgp_rib_out_table dump.";
+                }
+
+            }
+
+        }
+
+    }
+
+}

From 7aee6f23221e7c7f2bac703b247da95d8811a014 Mon Sep 17 00:00:00 2001
From: Samuel Angebault <staphylo@arista.com>
Date: Wed, 24 Apr 2024 01:43:38 +0200
Subject: [PATCH 0475/1115] [Arista] Add support for Quicksilver platform
 (#18362)

Add support for the new Quicksilver product

Work item tracking
Microsoft ADO (number only):
How I did it
register the product in boot0
add device configuration files
add a 800G hwsku
add a 400G hwsku

---------

Co-authored-by: Rick Robbins <rick@arista.com>
Co-authored-by: Boyang Yu <byu@arista.com>
---
 .../Arista-7060X6-64DE-64x400G/hwsku.json     |  196 +++
 .../port_config.ini                           |   65 +
 .../Arista-7060X6-64DE-64x400G/sai.profile    |    1 +
 .../th5-a7060x6-64de.config.bcm               |    1 +
 .../Arista-7060X6-64DE/hwsku.json             |  196 +++
 .../Arista-7060X6-64DE/port_config.ini        |   65 +
 .../Arista-7060X6-64DE/sai.profile            |    1 +
 .../th5-a7060x6-64de.config.bcm               | 1145 ++++++++++++++
 .../x86_64-arista_7060x6_64de/default_sku     |    1 +
 .../x86_64-arista_7060x6_64de/pcie.yaml       |    1 +
 .../x86_64-arista_7060x6_64de/platform.json   | 1340 +++++++++++++++++
 .../x86_64-arista_7060x6_64de/platform_asic   |    1 +
 .../platform_components.json                  |   12 +
 .../platform_env.conf                         |    2 +
 .../x86_64-arista_7060x6_64de/platform_reboot |    1 +
 .../arista/x86_64-arista_7060x6_64de/plugins  |    1 +
 .../pmon_daemon_control.json                  |    1 +
 .../x86_64-arista_7060x6_64de/sensors.conf    |   14 +
 .../system_health_monitoring_config.json      |    1 +
 .../thermal_policy.json                       |    1 +
 files/Aboot/boot0.j2                          |   24 +-
 21 files changed, 3067 insertions(+), 3 deletions(-)
 create mode 100644 device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-64x400G/hwsku.json
 create mode 100644 device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-64x400G/port_config.ini
 create mode 120000 device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-64x400G/sai.profile
 create mode 120000 device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-64x400G/th5-a7060x6-64de.config.bcm
 create mode 100644 device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE/hwsku.json
 create mode 100644 device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE/port_config.ini
 create mode 100644 device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE/sai.profile
 create mode 100644 device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE/th5-a7060x6-64de.config.bcm
 create mode 100644 device/arista/x86_64-arista_7060x6_64de/default_sku
 create mode 120000 device/arista/x86_64-arista_7060x6_64de/pcie.yaml
 create mode 100644 device/arista/x86_64-arista_7060x6_64de/platform.json
 create mode 100644 device/arista/x86_64-arista_7060x6_64de/platform_asic
 create mode 100644 device/arista/x86_64-arista_7060x6_64de/platform_components.json
 create mode 100644 device/arista/x86_64-arista_7060x6_64de/platform_env.conf
 create mode 120000 device/arista/x86_64-arista_7060x6_64de/platform_reboot
 create mode 120000 device/arista/x86_64-arista_7060x6_64de/plugins
 create mode 120000 device/arista/x86_64-arista_7060x6_64de/pmon_daemon_control.json
 create mode 100644 device/arista/x86_64-arista_7060x6_64de/sensors.conf
 create mode 120000 device/arista/x86_64-arista_7060x6_64de/system_health_monitoring_config.json
 create mode 120000 device/arista/x86_64-arista_7060x6_64de/thermal_policy.json

diff --git a/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-64x400G/hwsku.json b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-64x400G/hwsku.json
new file mode 100644
index 000000000..84e39004f
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-64x400G/hwsku.json
@@ -0,0 +1,196 @@
+{
+    "interfaces": {
+        "Ethernet0": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet8": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet16": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet24": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet32": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet40": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet48": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet56": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet64": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet72": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet80": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet88": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet96": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet104": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet112": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet120": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet128": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet136": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet144": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet152": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet160": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet168": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet176": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet184": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet192": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet200": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet208": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet216": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet224": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet232": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet240": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet248": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet256": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet264": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet272": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet280": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet288": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet296": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet304": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet312": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet320": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet328": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet336": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet344": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet352": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet360": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet368": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet376": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet384": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet392": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet400": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet408": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet416": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet424": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet432": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet440": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet448": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet456": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet464": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet472": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet480": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet488": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet496": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet504": {
+            "default_brkout_mode": "1x400G"
+        }
+    }
+}
diff --git a/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-64x400G/port_config.ini b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-64x400G/port_config.ini
new file mode 100644
index 000000000..dfb191ace
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-64x400G/port_config.ini
@@ -0,0 +1,65 @@
+# name       lanes                            alias         index  speed   fec
+Ethernet0    17,18,19,20,21,22,23,24          Ethernet1/1   1      400000  rs
+Ethernet8    1,2,3,4,5,6,7,8                  Ethernet2/1   2      400000  rs
+Ethernet16   9,10,11,12,13,14,15,16           Ethernet3/1   3      400000  rs
+Ethernet24   25,26,27,28,29,30,31,32          Ethernet4/1   4      400000  rs
+Ethernet32   57,58,59,60,61,62,63,64          Ethernet5/1   5      400000  rs
+Ethernet40   41,42,43,44,45,46,47,48          Ethernet6/1   6      400000  rs
+Ethernet48   33,34,35,36,37,38,39,40          Ethernet7/1   7      400000  rs
+Ethernet56   49,50,51,52,53,54,55,56          Ethernet8/1   8      400000  rs
+Ethernet64   89,90,91,92,93,94,95,96          Ethernet9/1   9      400000  rs
+Ethernet72   73,74,75,76,77,78,79,80          Ethernet10/1  10     400000  rs
+Ethernet80   65,66,67,68,69,70,71,72          Ethernet11/1  11     400000  rs
+Ethernet88   81,82,83,84,85,86,87,88          Ethernet12/1  12     400000  rs
+Ethernet96   121,122,123,124,125,126,127,128  Ethernet13/1  13     400000  rs
+Ethernet104  105,106,107,108,109,110,111,112  Ethernet14/1  14     400000  rs
+Ethernet112  97,98,99,100,101,102,103,104     Ethernet15/1  15     400000  rs
+Ethernet120  113,114,115,116,117,118,119,120  Ethernet16/1  16     400000  rs
+Ethernet128  153,154,155,156,157,158,159,160  Ethernet17/1  17     400000  rs
+Ethernet136  137,138,139,140,141,142,143,144  Ethernet18/1  18     400000  rs
+Ethernet144  129,130,131,132,133,134,135,136  Ethernet19/1  19     400000  rs
+Ethernet152  145,146,147,148,149,150,151,152  Ethernet20/1  20     400000  rs
+Ethernet160  185,186,187,188,189,190,191,192  Ethernet21/1  21     400000  rs
+Ethernet168  169,170,171,172,173,174,175,176  Ethernet22/1  22     400000  rs
+Ethernet176  161,162,163,164,165,166,167,168  Ethernet23/1  23     400000  rs
+Ethernet184  177,178,179,180,181,182,183,184  Ethernet24/1  24     400000  rs
+Ethernet192  217,218,219,220,221,222,223,224  Ethernet25/1  25     400000  rs
+Ethernet200  201,202,203,204,205,206,207,208  Ethernet26/1  26     400000  rs
+Ethernet208  193,194,195,196,197,198,199,200  Ethernet27/1  27     400000  rs
+Ethernet216  209,210,211,212,213,214,215,216  Ethernet28/1  28     400000  rs
+Ethernet224  249,250,251,252,253,254,255,256  Ethernet29/1  29     400000  rs
+Ethernet232  233,234,235,236,237,238,239,240  Ethernet30/1  30     400000  rs
+Ethernet240  225,226,227,228,229,230,231,232  Ethernet31/1  31     400000  rs
+Ethernet248  241,242,243,244,245,246,247,248  Ethernet32/1  32     400000  rs
+Ethernet256  273,274,275,276,277,278,279,280  Ethernet33/1  33     400000  rs
+Ethernet264  257,258,259,260,261,262,263,264  Ethernet34/1  34     400000  rs
+Ethernet272  265,266,267,268,269,270,271,272  Ethernet35/1  35     400000  rs
+Ethernet280  281,282,283,284,285,286,287,288  Ethernet36/1  36     400000  rs
+Ethernet288  313,314,315,316,317,318,319,320  Ethernet37/1  37     400000  rs
+Ethernet296  297,298,299,300,301,302,303,304  Ethernet38/1  38     400000  rs
+Ethernet304  289,290,291,292,293,294,295,296  Ethernet39/1  39     400000  rs
+Ethernet312  305,306,307,308,309,310,311,312  Ethernet40/1  40     400000  rs
+Ethernet320  345,346,347,348,349,350,351,352  Ethernet41/1  41     400000  rs
+Ethernet328  329,330,331,332,333,334,335,336  Ethernet42/1  42     400000  rs
+Ethernet336  321,322,323,324,325,326,327,328  Ethernet43/1  43     400000  rs
+Ethernet344  337,338,339,340,341,342,343,344  Ethernet44/1  44     400000  rs
+Ethernet352  377,378,379,380,381,382,383,384  Ethernet45/1  45     400000  rs
+Ethernet360  361,362,363,364,365,366,367,368  Ethernet46/1  46     400000  rs
+Ethernet368  353,354,355,356,357,358,359,360  Ethernet47/1  47     400000  rs
+Ethernet376  369,370,371,372,373,374,375,376  Ethernet48/1  48     400000  rs
+Ethernet384  409,410,411,412,413,414,415,416  Ethernet49/1  49     400000  rs
+Ethernet392  393,394,395,396,397,398,399,400  Ethernet50/1  50     400000  rs
+Ethernet400  385,386,387,388,389,390,391,392  Ethernet51/1  51     400000  rs
+Ethernet408  401,402,403,404,405,406,407,408  Ethernet52/1  52     400000  rs
+Ethernet416  441,442,443,444,445,446,447,448  Ethernet53/1  53     400000  rs
+Ethernet424  425,426,427,428,429,430,431,432  Ethernet54/1  54     400000  rs
+Ethernet432  417,418,419,420,421,422,423,424  Ethernet55/1  55     400000  rs
+Ethernet440  433,434,435,436,437,438,439,440  Ethernet56/1  56     400000  rs
+Ethernet448  473,474,475,476,477,478,479,480  Ethernet57/1  57     400000  rs
+Ethernet456  457,458,459,460,461,462,463,464  Ethernet58/1  58     400000  rs
+Ethernet464  449,450,451,452,453,454,455,456  Ethernet59/1  59     400000  rs
+Ethernet472  465,466,467,468,469,470,471,472  Ethernet60/1  60     400000  rs
+Ethernet480  505,506,507,508,509,510,511,512  Ethernet61/1  61     400000  rs
+Ethernet488  489,490,491,492,493,494,495,496  Ethernet62/1  62     400000  rs
+Ethernet496  481,482,483,484,485,486,487,488  Ethernet63/1  63     400000  rs
+Ethernet504  497,498,499,500,501,502,503,504  Ethernet64/1  64     400000  rs
diff --git a/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-64x400G/sai.profile b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-64x400G/sai.profile
new file mode 120000
index 000000000..1ce4748f7
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-64x400G/sai.profile
@@ -0,0 +1 @@
+../Arista-7060X6-64DE/sai.profile
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-64x400G/th5-a7060x6-64de.config.bcm b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-64x400G/th5-a7060x6-64de.config.bcm
new file mode 120000
index 000000000..efb75325d
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-64x400G/th5-a7060x6-64de.config.bcm
@@ -0,0 +1 @@
+../Arista-7060X6-64DE/th5-a7060x6-64de.config.bcm
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE/hwsku.json b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE/hwsku.json
new file mode 100644
index 000000000..74df31482
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE/hwsku.json
@@ -0,0 +1,196 @@
+{
+    "interfaces": {
+        "Ethernet0": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet8": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet16": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet24": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet32": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet40": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet48": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet56": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet64": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet72": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet80": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet88": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet96": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet104": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet112": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet120": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet128": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet136": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet144": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet152": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet160": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet168": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet176": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet184": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet192": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet200": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet208": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet216": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet224": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet232": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet240": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet248": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet256": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet264": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet272": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet280": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet288": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet296": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet304": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet312": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet320": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet328": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet336": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet344": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet352": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet360": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet368": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet376": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet384": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet392": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet400": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet408": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet416": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet424": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet432": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet440": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet448": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet456": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet464": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet472": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet480": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet488": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet496": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet504": {
+            "default_brkout_mode": "1x800G[400G]"
+        }
+    }
+}
diff --git a/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE/port_config.ini b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE/port_config.ini
new file mode 100644
index 000000000..48d2519c0
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE/port_config.ini
@@ -0,0 +1,65 @@
+# name       lanes                            alias         index  speed   fec
+Ethernet0    17,18,19,20,21,22,23,24          Ethernet1/1   1      800000  rs
+Ethernet8    1,2,3,4,5,6,7,8                  Ethernet2/1   2      800000  rs
+Ethernet16   9,10,11,12,13,14,15,16           Ethernet3/1   3      800000  rs
+Ethernet24   25,26,27,28,29,30,31,32          Ethernet4/1   4      800000  rs
+Ethernet32   57,58,59,60,61,62,63,64          Ethernet5/1   5      800000  rs
+Ethernet40   41,42,43,44,45,46,47,48          Ethernet6/1   6      800000  rs
+Ethernet48   33,34,35,36,37,38,39,40          Ethernet7/1   7      800000  rs
+Ethernet56   49,50,51,52,53,54,55,56          Ethernet8/1   8      800000  rs
+Ethernet64   89,90,91,92,93,94,95,96          Ethernet9/1   9      800000  rs
+Ethernet72   73,74,75,76,77,78,79,80          Ethernet10/1  10     800000  rs
+Ethernet80   65,66,67,68,69,70,71,72          Ethernet11/1  11     800000  rs
+Ethernet88   81,82,83,84,85,86,87,88          Ethernet12/1  12     800000  rs
+Ethernet96   121,122,123,124,125,126,127,128  Ethernet13/1  13     800000  rs
+Ethernet104  105,106,107,108,109,110,111,112  Ethernet14/1  14     800000  rs
+Ethernet112  97,98,99,100,101,102,103,104     Ethernet15/1  15     800000  rs
+Ethernet120  113,114,115,116,117,118,119,120  Ethernet16/1  16     800000  rs
+Ethernet128  153,154,155,156,157,158,159,160  Ethernet17/1  17     800000  rs
+Ethernet136  137,138,139,140,141,142,143,144  Ethernet18/1  18     800000  rs
+Ethernet144  129,130,131,132,133,134,135,136  Ethernet19/1  19     800000  rs
+Ethernet152  145,146,147,148,149,150,151,152  Ethernet20/1  20     800000  rs
+Ethernet160  185,186,187,188,189,190,191,192  Ethernet21/1  21     800000  rs
+Ethernet168  169,170,171,172,173,174,175,176  Ethernet22/1  22     800000  rs
+Ethernet176  161,162,163,164,165,166,167,168  Ethernet23/1  23     800000  rs
+Ethernet184  177,178,179,180,181,182,183,184  Ethernet24/1  24     800000  rs
+Ethernet192  217,218,219,220,221,222,223,224  Ethernet25/1  25     800000  rs
+Ethernet200  201,202,203,204,205,206,207,208  Ethernet26/1  26     800000  rs
+Ethernet208  193,194,195,196,197,198,199,200  Ethernet27/1  27     800000  rs
+Ethernet216  209,210,211,212,213,214,215,216  Ethernet28/1  28     800000  rs
+Ethernet224  249,250,251,252,253,254,255,256  Ethernet29/1  29     800000  rs
+Ethernet232  233,234,235,236,237,238,239,240  Ethernet30/1  30     800000  rs
+Ethernet240  225,226,227,228,229,230,231,232  Ethernet31/1  31     800000  rs
+Ethernet248  241,242,243,244,245,246,247,248  Ethernet32/1  32     800000  rs
+Ethernet256  273,274,275,276,277,278,279,280  Ethernet33/1  33     800000  rs
+Ethernet264  257,258,259,260,261,262,263,264  Ethernet34/1  34     800000  rs
+Ethernet272  265,266,267,268,269,270,271,272  Ethernet35/1  35     800000  rs
+Ethernet280  281,282,283,284,285,286,287,288  Ethernet36/1  36     800000  rs
+Ethernet288  313,314,315,316,317,318,319,320  Ethernet37/1  37     800000  rs
+Ethernet296  297,298,299,300,301,302,303,304  Ethernet38/1  38     800000  rs
+Ethernet304  289,290,291,292,293,294,295,296  Ethernet39/1  39     800000  rs
+Ethernet312  305,306,307,308,309,310,311,312  Ethernet40/1  40     800000  rs
+Ethernet320  345,346,347,348,349,350,351,352  Ethernet41/1  41     800000  rs
+Ethernet328  329,330,331,332,333,334,335,336  Ethernet42/1  42     800000  rs
+Ethernet336  321,322,323,324,325,326,327,328  Ethernet43/1  43     800000  rs
+Ethernet344  337,338,339,340,341,342,343,344  Ethernet44/1  44     800000  rs
+Ethernet352  377,378,379,380,381,382,383,384  Ethernet45/1  45     800000  rs
+Ethernet360  361,362,363,364,365,366,367,368  Ethernet46/1  46     800000  rs
+Ethernet368  353,354,355,356,357,358,359,360  Ethernet47/1  47     800000  rs
+Ethernet376  369,370,371,372,373,374,375,376  Ethernet48/1  48     800000  rs
+Ethernet384  409,410,411,412,413,414,415,416  Ethernet49/1  49     800000  rs
+Ethernet392  393,394,395,396,397,398,399,400  Ethernet50/1  50     800000  rs
+Ethernet400  385,386,387,388,389,390,391,392  Ethernet51/1  51     800000  rs
+Ethernet408  401,402,403,404,405,406,407,408  Ethernet52/1  52     800000  rs
+Ethernet416  441,442,443,444,445,446,447,448  Ethernet53/1  53     800000  rs
+Ethernet424  425,426,427,428,429,430,431,432  Ethernet54/1  54     800000  rs
+Ethernet432  417,418,419,420,421,422,423,424  Ethernet55/1  55     800000  rs
+Ethernet440  433,434,435,436,437,438,439,440  Ethernet56/1  56     800000  rs
+Ethernet448  473,474,475,476,477,478,479,480  Ethernet57/1  57     800000  rs
+Ethernet456  457,458,459,460,461,462,463,464  Ethernet58/1  58     800000  rs
+Ethernet464  449,450,451,452,453,454,455,456  Ethernet59/1  59     800000  rs
+Ethernet472  465,466,467,468,469,470,471,472  Ethernet60/1  60     800000  rs
+Ethernet480  505,506,507,508,509,510,511,512  Ethernet61/1  61     800000  rs
+Ethernet488  489,490,491,492,493,494,495,496  Ethernet62/1  62     800000  rs
+Ethernet496  481,482,483,484,485,486,487,488  Ethernet63/1  63     800000  rs
+Ethernet504  497,498,499,500,501,502,503,504  Ethernet64/1  64     800000  rs
diff --git a/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE/sai.profile b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE/sai.profile
new file mode 100644
index 000000000..89cfbc9f1
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE/sai.profile
@@ -0,0 +1 @@
+SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th5-a7060x6-64de.config.bcm
diff --git a/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE/th5-a7060x6-64de.config.bcm b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE/th5-a7060x6-64de.config.bcm
new file mode 100644
index 000000000..33fa541ca
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE/th5-a7060x6-64de.config.bcm
@@ -0,0 +1,1145 @@
+#
+# $Copyright: (c) 2022 Broadcom.
+# Broadcom Proprietary and Confidential. All rights reserved.$
+#
+# BCM78900 64x800g port configuration.
+#
+# configuration yaml file
+#   device:
+#       <unit>:
+#           <table>:
+#               ?
+#                   <key_fld_1>: <value>
+#                   <key_fld_2>: <value>
+#                   ...
+#                   <key_fld_n>: <value>
+#               :
+#                   <data_fld_1>: <value>
+#                   <data_fld_2>: <value>
+#                   ...
+#                   <data_fld_n>: <value>
+#
+
+---
+bcm_device:
+    0:
+        global:
+            pktio_mode: 1
+            default_cpu_tx_queue: 7
+            vlan_flooding_l2mc_num_reserved: 0
+            ipv6_lpm_128b_enable: 1
+            shared_block_mask_section: uc_bc
+            skip_protocol_default_entries: 1
+            # LTSW uses value 1 for ALPM combined mode
+            l3_alpm_template: 1
+            l3_alpm_hit_skip: 1
+            sai_feat_tail_timestamp : 1
+            sai_port_phy_time_sync_en : 1
+            sai_field_group_auto_prioritize: 1
+            #l3_intf_vlan_split_egress for MTU at L3IF
+            l3_intf_vlan_split_egress : 1
+            pfc_deadlock_seq_control : 1
+            sai_tunnel_support: 2
+            bcm_tunnel_term_compatible_mode: 1
+            l3_ecmp_member_first_lkup_mem_size: 12288
+---
+device:
+    0:
+        PC_PM_CORE:
+            ?
+                PC_PM_ID: 3
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x15047362
+                TX_LANE_MAP: 0x4152637
+                RX_POLARITY_FLIP: 0xc3
+                TX_POLARITY_FLIP: 0xcc
+            ?
+                PC_PM_ID: 1
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x17063524
+                TX_LANE_MAP: 0x60714253
+                RX_POLARITY_FLIP: 0x97
+                TX_POLARITY_FLIP: 0xcc
+            ?
+                PC_PM_ID: 2
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x6172435
+                TX_LANE_MAP: 0x71605342
+                RX_POLARITY_FLIP: 0x33
+                TX_POLARITY_FLIP: 0x69
+            ?
+                PC_PM_ID: 4
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x40516273
+                TX_LANE_MAP: 0x51403726
+                RX_POLARITY_FLIP: 0x33
+                TX_POLARITY_FLIP: 0xc3
+            ?
+                PC_PM_ID: 8
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x71630524
+                TX_LANE_MAP: 0x4371625
+                RX_POLARITY_FLIP: 0x47
+                TX_POLARITY_FLIP: 0xc9
+            ?
+                PC_PM_ID: 6
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x70625143
+                TX_LANE_MAP: 0x60534172
+                RX_POLARITY_FLIP: 0x1e
+                TX_POLARITY_FLIP: 0x2c
+            ?
+                PC_PM_ID: 5
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x17063524
+                TX_LANE_MAP: 0x60715243
+                RX_POLARITY_FLIP: 0x38
+                TX_POLARITY_FLIP: 0x4e
+            ?
+                PC_PM_ID: 7
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x36172405
+                TX_LANE_MAP: 0x73402516
+                RX_POLARITY_FLIP: 0xd2
+                TX_POLARITY_FLIP: 0xc9
+            ?
+                PC_PM_ID: 12
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x71630524
+                TX_LANE_MAP: 0x4371625
+                RX_POLARITY_FLIP: 0x47
+                TX_POLARITY_FLIP: 0xc9
+            ?
+                PC_PM_ID: 10
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x70625143
+                TX_LANE_MAP: 0x60534172
+                RX_POLARITY_FLIP: 0x1e
+                TX_POLARITY_FLIP: 0x6c
+            ?
+                PC_PM_ID: 9
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x62704351
+                TX_LANE_MAP: 0x53607241
+                RX_POLARITY_FLIP: 0xb4
+                TX_POLARITY_FLIP: 0x6c
+            ?
+                PC_PM_ID: 11
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x36172405
+                TX_LANE_MAP: 0x73402516
+                RX_POLARITY_FLIP: 0xd2
+                TX_POLARITY_FLIP: 0xc9
+            ?
+                PC_PM_ID: 16
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x71630524
+                TX_LANE_MAP: 0x4371625
+                RX_POLARITY_FLIP: 0x47
+                TX_POLARITY_FLIP: 0xc9
+            ?
+                PC_PM_ID: 14
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x70625143
+                TX_LANE_MAP: 0x60534172
+                RX_POLARITY_FLIP: 0x1e
+                TX_POLARITY_FLIP: 0x6c
+            ?
+                PC_PM_ID: 13
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x62704351
+                TX_LANE_MAP: 0x53607241
+                RX_POLARITY_FLIP: 0xb4
+                TX_POLARITY_FLIP: 0x6c
+            ?
+                PC_PM_ID: 15
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x36172405
+                TX_LANE_MAP: 0x73402516
+                RX_POLARITY_FLIP: 0xd2
+                TX_POLARITY_FLIP: 0xc9
+            ?
+                PC_PM_ID: 20
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x15347062
+                TX_LANE_MAP: 0x60734152
+                RX_POLARITY_FLIP: 0x3f
+                TX_POLARITY_FLIP: 0x76
+            ?
+                PC_PM_ID: 18
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x17360524
+                TX_LANE_MAP: 0x16270435
+                RX_POLARITY_FLIP: 0x7b
+                TX_POLARITY_FLIP: 0x9b
+            ?
+                PC_PM_ID: 17
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x36172405
+                TX_LANE_MAP: 0x27163504
+                RX_POLARITY_FLIP: 0x21
+                TX_POLARITY_FLIP: 0x91
+            ?
+                PC_PM_ID: 19
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x43516270
+                TX_LANE_MAP: 0x37065241
+                RX_POLARITY_FLIP: 0x30
+                TX_POLARITY_FLIP: 0x16
+            ?
+                PC_PM_ID: 24
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x15347062
+                TX_LANE_MAP: 0x60734152
+                RX_POLARITY_FLIP: 0x3f
+                TX_POLARITY_FLIP: 0x76
+            ?
+                PC_PM_ID: 22
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x17360524
+                TX_LANE_MAP: 0x16270435
+                RX_POLARITY_FLIP: 0x7b
+                TX_POLARITY_FLIP: 0x9b
+            ?
+                PC_PM_ID: 21
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x36172405
+                TX_LANE_MAP: 0x27163504
+                RX_POLARITY_FLIP: 0x21
+                TX_POLARITY_FLIP: 0x91
+            ?
+                PC_PM_ID: 23
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x43516270
+                TX_LANE_MAP: 0x37065241
+                RX_POLARITY_FLIP: 0x30
+                TX_POLARITY_FLIP: 0x16
+            ?
+                PC_PM_ID: 28
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x43612705
+                TX_LANE_MAP: 0x63507241
+                RX_POLARITY_FLIP: 0xfc
+                TX_POLARITY_FLIP: 0x8e
+            ?
+                PC_PM_ID: 26
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x17360524
+                TX_LANE_MAP: 0x16270435
+                RX_POLARITY_FLIP: 0x7b
+                TX_POLARITY_FLIP: 0x9b
+            ?
+                PC_PM_ID: 25
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x36172405
+                TX_LANE_MAP: 0x27163504
+                RX_POLARITY_FLIP: 0x21
+                TX_POLARITY_FLIP: 0x91
+            ?
+                PC_PM_ID: 27
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x43516270
+                TX_LANE_MAP: 0x37065241
+                RX_POLARITY_FLIP: 0x30
+                TX_POLARITY_FLIP: 0x36
+            ?
+                PC_PM_ID: 32
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x73621504
+                TX_LANE_MAP: 0x62734051
+                RX_POLARITY_FLIP: 0xf0
+                TX_POLARITY_FLIP: 0x00
+            ?
+                PC_PM_ID: 30
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x71605342
+                TX_LANE_MAP: 0x6172435
+                RX_POLARITY_FLIP: 0xa5
+                TX_POLARITY_FLIP: 0x00
+            ?
+                PC_PM_ID: 29
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x60714253
+                TX_LANE_MAP: 0x17063524
+                RX_POLARITY_FLIP: 0x21
+                TX_POLARITY_FLIP: 0x69
+            ?
+                PC_PM_ID: 31
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x26370415
+                TX_LANE_MAP: 0x37265140
+                RX_POLARITY_FLIP: 0x30
+                TX_POLARITY_FLIP: 0xc3
+            ?
+                PC_PM_ID: 35
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x15047362
+                TX_LANE_MAP: 0x4152637
+                RX_POLARITY_FLIP: 0xf0
+                TX_POLARITY_FLIP: 0xff
+            ?
+                PC_PM_ID: 33
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x17063524
+                TX_LANE_MAP: 0x60714253
+                RX_POLARITY_FLIP: 0xa5
+                TX_POLARITY_FLIP: 0xff
+            ?
+                PC_PM_ID: 34
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x6172435
+                TX_LANE_MAP: 0x71605342
+                RX_POLARITY_FLIP: 0xed
+                TX_POLARITY_FLIP: 0x69
+            ?
+                PC_PM_ID: 36
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x40516273
+                TX_LANE_MAP: 0x51403726
+                RX_POLARITY_FLIP: 0xfc
+                TX_POLARITY_FLIP: 0xc3
+            ?
+                PC_PM_ID: 40
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x70621534
+                TX_LANE_MAP: 0x14250637
+                RX_POLARITY_FLIP: 0x0c
+                TX_POLARITY_FLIP: 0x64
+            ?
+                PC_PM_ID: 38
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x71635042
+                TX_LANE_MAP: 0x61724053
+                RX_POLARITY_FLIP: 0x48
+                TX_POLARITY_FLIP: 0x9c
+            ?
+                PC_PM_ID: 37
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x6241537
+                TX_LANE_MAP: 0x51624073
+                RX_POLARITY_FLIP: 0x7b
+                TX_POLARITY_FLIP: 0x3a
+            ?
+                PC_PM_ID: 39
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x26073415
+                TX_LANE_MAP: 0x52413706
+                RX_POLARITY_FLIP: 0xfc
+                TX_POLARITY_FLIP: 0x9e
+            ?
+                PC_PM_ID: 44
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x70621534
+                TX_LANE_MAP: 0x14250637
+                RX_POLARITY_FLIP: 0x0c
+                TX_POLARITY_FLIP: 0x64
+            ?
+                PC_PM_ID: 42
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x71635042
+                TX_LANE_MAP: 0x61724053
+                RX_POLARITY_FLIP: 0x48
+                TX_POLARITY_FLIP: 0x98
+            ?
+                PC_PM_ID: 41
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x63714250
+                TX_LANE_MAP: 0x72615340
+                RX_POLARITY_FLIP: 0xed
+                TX_POLARITY_FLIP: 0x9d
+            ?
+                PC_PM_ID: 43
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x26073415
+                TX_LANE_MAP: 0x52413706
+                RX_POLARITY_FLIP: 0xfc
+                TX_POLARITY_FLIP: 0x9e
+            ?
+                PC_PM_ID: 48
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x70621534
+                TX_LANE_MAP: 0x14250637
+                RX_POLARITY_FLIP: 0x0c
+                TX_POLARITY_FLIP: 0x64
+            ?
+                PC_PM_ID: 46
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x71635042
+                TX_LANE_MAP: 0x61724053
+                RX_POLARITY_FLIP: 0x48
+                TX_POLARITY_FLIP: 0x98
+            ?
+                PC_PM_ID: 45
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x63714250
+                TX_LANE_MAP: 0x72615340
+                RX_POLARITY_FLIP: 0xed
+                TX_POLARITY_FLIP: 0x9d
+            ?
+                PC_PM_ID: 47
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x26073415
+                TX_LANE_MAP: 0x52413706
+                RX_POLARITY_FLIP: 0xfc
+                TX_POLARITY_FLIP: 0x9e
+            ?
+                PC_PM_ID: 52
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x5247163
+                TX_LANE_MAP: 0x61524073
+                RX_POLARITY_FLIP: 0x8b
+                TX_POLARITY_FLIP: 0x93
+            ?
+                PC_PM_ID: 50
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x7261534
+                TX_LANE_MAP: 0x6351427
+                RX_POLARITY_FLIP: 0xd2
+                TX_POLARITY_FLIP: 0x63
+            ?
+                PC_PM_ID: 49
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x26073415
+                TX_LANE_MAP: 0x35062714
+                RX_POLARITY_FLIP: 0x87
+                TX_POLARITY_FLIP: 0x63
+            ?
+                PC_PM_ID: 51
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x42506371
+                TX_LANE_MAP: 0x25167340
+                RX_POLARITY_FLIP: 0xe1
+                TX_POLARITY_FLIP: 0x63
+            ?
+                PC_PM_ID: 56
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x5247163
+                TX_LANE_MAP: 0x61524073
+                RX_POLARITY_FLIP: 0x8b
+                TX_POLARITY_FLIP: 0x93
+            ?
+                PC_PM_ID: 54
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x7261534
+                TX_LANE_MAP: 0x6351427
+                RX_POLARITY_FLIP: 0xd2
+                TX_POLARITY_FLIP: 0x63
+            ?
+                PC_PM_ID: 53
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x26073415
+                TX_LANE_MAP: 0x35062714
+                RX_POLARITY_FLIP: 0x87
+                TX_POLARITY_FLIP: 0x63
+            ?
+                PC_PM_ID: 55
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x42506371
+                TX_LANE_MAP: 0x25167340
+                RX_POLARITY_FLIP: 0xe1
+                TX_POLARITY_FLIP: 0x63
+            ?
+                PC_PM_ID: 60
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x62730415
+                TX_LANE_MAP: 0x73624150
+                RX_POLARITY_FLIP: 0x98
+                TX_POLARITY_FLIP: 0x1b
+            ?
+                PC_PM_ID: 58
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x7261534
+                TX_LANE_MAP: 0x6351427
+                RX_POLARITY_FLIP: 0xd2
+                TX_POLARITY_FLIP: 0x63
+            ?
+                PC_PM_ID: 57
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x26073415
+                TX_LANE_MAP: 0x35062714
+                RX_POLARITY_FLIP: 0x87
+                TX_POLARITY_FLIP: 0x63
+            ?
+                PC_PM_ID: 59
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x42506371
+                TX_LANE_MAP: 0x25167340
+                RX_POLARITY_FLIP: 0xe1
+                TX_POLARITY_FLIP: 0x62
+            ?
+                PC_PM_ID: 64
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x73621504
+                TX_LANE_MAP: 0x62734051
+                RX_POLARITY_FLIP: 0xc2
+                TX_POLARITY_FLIP: 0x33
+            ?
+                PC_PM_ID: 62
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x71605342
+                TX_LANE_MAP: 0x6172435
+                RX_POLARITY_FLIP: 0x96
+                TX_POLARITY_FLIP: 0x33
+            ?
+                PC_PM_ID: 61
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x60714253
+                TX_LANE_MAP: 0x17063524
+                RX_POLARITY_FLIP: 0xcc
+                TX_POLARITY_FLIP: 0x69
+            ?
+                PC_PM_ID: 63
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x26370415
+                TX_LANE_MAP: 0x37265140
+                RX_POLARITY_FLIP: 0xcc
+                TX_POLARITY_FLIP: 0xc3
+---
+device:
+    0:
+        PC_PORT_PHYS_MAP:
+            ?
+                PORT_ID: 1
+            :
+                PC_PHYS_PORT_ID: 1
+            ?
+                PORT_ID: 2
+            :
+                PC_PHYS_PORT_ID: 9
+            ?
+                PORT_ID: 11
+            :
+                PC_PHYS_PORT_ID: 17
+            ?
+                PORT_ID: 12
+            :
+                PC_PHYS_PORT_ID: 25
+            ?
+                PORT_ID: 22
+            :
+                PC_PHYS_PORT_ID: 33
+            ?
+                PORT_ID: 23
+            :
+                PC_PHYS_PORT_ID: 41
+            ?
+                PORT_ID: 33
+            :
+                PC_PHYS_PORT_ID: 49
+            ?
+                PORT_ID: 34
+            :
+                PC_PHYS_PORT_ID: 57
+            ?
+                PORT_ID: 44
+            :
+                PC_PHYS_PORT_ID: 65
+            ?
+                PORT_ID: 45
+            :
+                PC_PHYS_PORT_ID: 73
+            ?
+                PORT_ID: 55
+            :
+                PC_PHYS_PORT_ID: 81
+            ?
+                PORT_ID: 56
+            :
+                PC_PHYS_PORT_ID: 89
+            ?
+                PORT_ID: 66
+            :
+                PC_PHYS_PORT_ID: 97
+            ?
+                PORT_ID: 67
+            :
+                PC_PHYS_PORT_ID: 105
+            ?
+                PORT_ID: 77
+            :
+                PC_PHYS_PORT_ID: 113
+            ?
+                PORT_ID: 78
+            :
+                PC_PHYS_PORT_ID: 121
+            ?
+                PORT_ID: 88
+            :
+                PC_PHYS_PORT_ID: 129
+            ?
+                PORT_ID: 89
+            :
+                PC_PHYS_PORT_ID: 137
+            ?
+                PORT_ID: 99
+            :
+                PC_PHYS_PORT_ID: 145
+            ?
+                PORT_ID: 100
+            :
+                PC_PHYS_PORT_ID: 153
+            ?
+                PORT_ID: 110
+            :
+                PC_PHYS_PORT_ID: 161
+            ?
+                PORT_ID: 111
+            :
+                PC_PHYS_PORT_ID: 169
+            ?
+                PORT_ID: 121
+            :
+                PC_PHYS_PORT_ID: 177
+            ?
+                PORT_ID: 122
+            :
+                PC_PHYS_PORT_ID: 185
+            ?
+                PORT_ID: 132
+            :
+                PC_PHYS_PORT_ID: 193
+            ?
+                PORT_ID: 133
+            :
+                PC_PHYS_PORT_ID: 201
+            ?
+                PORT_ID: 143
+            :
+                PC_PHYS_PORT_ID: 209
+            ?
+                PORT_ID: 144
+            :
+                PC_PHYS_PORT_ID: 217
+            ?
+                PORT_ID: 154
+            :
+                PC_PHYS_PORT_ID: 225
+            ?
+                PORT_ID: 155
+            :
+                PC_PHYS_PORT_ID: 233
+            ?
+                PORT_ID: 165
+            :
+                PC_PHYS_PORT_ID: 241
+            ?
+                PORT_ID: 166
+            :
+                PC_PHYS_PORT_ID: 249
+            ?
+                PORT_ID: 176
+            :
+                PC_PHYS_PORT_ID: 257
+            ?
+                PORT_ID: 177
+            :
+                PC_PHYS_PORT_ID: 265
+            ?
+                PORT_ID: 187
+            :
+                PC_PHYS_PORT_ID: 273
+            ?
+                PORT_ID: 188
+            :
+                PC_PHYS_PORT_ID: 281
+            ?
+                PORT_ID: 198
+            :
+                PC_PHYS_PORT_ID: 289
+            ?
+                PORT_ID: 199
+            :
+                PC_PHYS_PORT_ID: 297
+            ?
+                PORT_ID: 209
+            :
+                PC_PHYS_PORT_ID: 305
+            ?
+                PORT_ID: 210
+            :
+                PC_PHYS_PORT_ID: 313
+            ?
+                PORT_ID: 220
+            :
+                PC_PHYS_PORT_ID: 321
+            ?
+                PORT_ID: 221
+            :
+                PC_PHYS_PORT_ID: 329
+            ?
+                PORT_ID: 231
+            :
+                PC_PHYS_PORT_ID: 337
+            ?
+                PORT_ID: 232
+            :
+                PC_PHYS_PORT_ID: 345
+            ?
+                PORT_ID: 242
+            :
+                PC_PHYS_PORT_ID: 353
+            ?
+                PORT_ID: 243
+            :
+                PC_PHYS_PORT_ID: 361
+            ?
+                PORT_ID: 253
+            :
+                PC_PHYS_PORT_ID: 369
+            ?
+                PORT_ID: 254
+            :
+                PC_PHYS_PORT_ID: 377
+            ?
+                PORT_ID: 264
+            :
+                PC_PHYS_PORT_ID: 385
+            ?
+                PORT_ID: 265
+            :
+                PC_PHYS_PORT_ID: 393
+            ?
+                PORT_ID: 275
+            :
+                PC_PHYS_PORT_ID: 401
+            ?
+                PORT_ID: 276
+            :
+                PC_PHYS_PORT_ID: 409
+            ?
+                PORT_ID: 286
+            :
+                PC_PHYS_PORT_ID: 417
+            ?
+                PORT_ID: 287
+            :
+                PC_PHYS_PORT_ID: 425
+            ?
+                PORT_ID: 297
+            :
+                PC_PHYS_PORT_ID: 433
+            ?
+                PORT_ID: 298
+            :
+                PC_PHYS_PORT_ID: 441
+            ?
+                PORT_ID: 308
+            :
+                PC_PHYS_PORT_ID: 449
+            ?
+                PORT_ID: 309
+            :
+                PC_PHYS_PORT_ID: 457
+            ?
+                PORT_ID: 319
+            :
+                PC_PHYS_PORT_ID: 465
+            ?
+                PORT_ID: 320
+            :
+                PC_PHYS_PORT_ID: 473
+            ?
+                PORT_ID: 330
+            :
+                PC_PHYS_PORT_ID: 481
+            ?
+                PORT_ID: 331
+            :
+                PC_PHYS_PORT_ID: 489
+            ?
+                PORT_ID: 341
+            :
+                PC_PHYS_PORT_ID: 497
+            ?
+                PORT_ID: 342
+            :
+                PC_PHYS_PORT_ID: 505
+...
+---
+device:
+    0:
+        PC_PORT:
+            ?
+                PORT_ID: [[1, 2],
+                          [11, 12],
+                          [22, 23],
+                          [33, 34],
+                          [44, 45],
+                          [55, 56],
+                          [66, 67],
+                          [77, 78],
+                          [88, 89],
+                          [99, 100],
+                          [110, 111],
+                          [121, 122],
+                          [132, 133],
+                          [143, 144],
+                          [154, 155],
+                          [165, 166],
+                          [176, 177],
+                          [187, 188],
+                          [198, 199],
+                          [209, 210],
+                          [220, 221],
+                          [231, 232],
+                          [242, 243],
+                          [253, 254],
+                          [264, 265],
+                          [275, 276],
+                          [286, 287],
+                          [297, 298],
+                          [308, 309],
+                          [319, 320],
+                          [330, 331],
+                          [341, 342]]
+            :
+                ENABLE: 1
+                SPEED: 800000
+                NUM_LANES: 8
+                FEC_MODE: PC_FEC_RS544_2XN
+                MAX_FRAME_SIZE: 9416
+...
+---
+bcm_device:
+    0:
+        global:
+            ftem_mem_entries: 65536
+...
+---
+device:
+    0:
+        # Per pipe flex counter configuration
+        CTR_EFLEX_CONFIG:
+            CTR_ING_EFLEX_OPERMODE_PIPEUNIQUE: 0
+            CTR_EGR_EFLEX_OPERMODE_PIPEUNIQUE: 0
+
+        # IFP mode
+        FP_CONFIG:
+            FP_ING_OPERMODE: GLOBAL_PIPE_AWARE
+...
+---
+device:
+    0:
+        DEVICE_CONFIG:
+            AUTOLOAD_BOARD_SETTINGS: 0
+...
diff --git a/device/arista/x86_64-arista_7060x6_64de/default_sku b/device/arista/x86_64-arista_7060x6_64de/default_sku
new file mode 100644
index 000000000..1fd33cc6b
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64de/default_sku
@@ -0,0 +1 @@
+Arista-7060X6-64DE t1
diff --git a/device/arista/x86_64-arista_7060x6_64de/pcie.yaml b/device/arista/x86_64-arista_7060x6_64de/pcie.yaml
new file mode 120000
index 000000000..df18a601d
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64de/pcie.yaml
@@ -0,0 +1 @@
+../x86_64-arista_common/pcie.yaml
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_64de/platform.json b/device/arista/x86_64-arista_7060x6_64de/platform.json
new file mode 100644
index 000000000..9f58b40e4
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64de/platform.json
@@ -0,0 +1,1340 @@
+{
+    "chassis": {
+        "name": "DCS-7060X6-64DE",
+        "components": [
+            {
+                "name": "Aboot()"
+            },
+            {
+                "name": "Scd(addr=0000:00:18.7)"
+            },
+            {
+                "name": "Scd(addr=0000:03:00.0)"
+            },
+            {
+                "name": "ShearwaterSysCpld(addr=13-0023)"
+            }
+        ],
+        "fans": [],
+        "fan_drawers": [
+            {
+                "name": "slot1",
+                "fans": [
+                    {
+                        "name": "fan1"
+                    }
+                ]
+            },
+            {
+                "name": "slot2",
+                "fans": [
+                    {
+                        "name": "fan2"
+                    }
+                ]
+            },
+            {
+                "name": "slot3",
+                "fans": [
+                    {
+                        "name": "fan3"
+                    }
+                ]
+            },
+            {
+                "name": "slot4",
+                "fans": [
+                    {
+                        "name": "fan4"
+                    }
+                ]
+            }
+        ],
+        "psus": [
+            {
+                "name": "psu1",
+                "voltage_high_threshold": false,
+                "voltage_low_threshold": false,
+                "fans": [
+                    {
+                        "name": "psu1/1",
+                        "speed": {
+                            "controllable": false
+                        }
+                    }
+                ]
+            },
+            {
+                "name": "psu2",
+                "voltage_high_threshold": false,
+                "voltage_low_threshold": false,
+                "fans": [
+                    {
+                        "name": "psu2/1",
+                        "speed": {
+                            "controllable": false
+                        }
+                    }
+                ]
+            }
+        ],
+        "thermals": [
+            {
+                "name": "Cpu temp sensor",
+                "controllable": false
+            },
+            {
+                "name": "Ambient",
+                "controllable": false
+            },
+            {
+                "name": "Outlet",
+                "controllable": false
+            },
+            {
+                "name": "Switch Card temp sensor",
+                "controllable": false
+            },
+            {
+                "name": "Air Exit Behind TH5",
+                "controllable": false
+            },
+            {
+                "name": "Left Edge PCB Near Rear of Switch",
+                "controllable": false
+            },
+            {
+                "name": "Air Inlet",
+                "controllable": false
+            },
+            {
+                "name": "TH5 Diode 1",
+                "controllable": false
+            },
+            {
+                "name": "TH5 Diode 2",
+                "controllable": false
+            }
+        ],
+        "sfps": [
+            {
+                "name": "osfp1"
+            },
+            {
+                "name": "osfp2"
+            },
+            {
+                "name": "osfp3"
+            },
+            {
+                "name": "osfp4"
+            },
+            {
+                "name": "osfp5"
+            },
+            {
+                "name": "osfp6"
+            },
+            {
+                "name": "osfp7"
+            },
+            {
+                "name": "osfp8"
+            },
+            {
+                "name": "osfp9"
+            },
+            {
+                "name": "osfp10"
+            },
+            {
+                "name": "osfp11"
+            },
+            {
+                "name": "osfp12"
+            },
+            {
+                "name": "osfp13"
+            },
+            {
+                "name": "osfp14"
+            },
+            {
+                "name": "osfp15"
+            },
+            {
+                "name": "osfp16"
+            },
+            {
+                "name": "osfp17"
+            },
+            {
+                "name": "osfp18"
+            },
+            {
+                "name": "osfp19"
+            },
+            {
+                "name": "osfp20"
+            },
+            {
+                "name": "osfp21"
+            },
+            {
+                "name": "osfp22"
+            },
+            {
+                "name": "osfp23"
+            },
+            {
+                "name": "osfp24"
+            },
+            {
+                "name": "osfp25"
+            },
+            {
+                "name": "osfp26"
+            },
+            {
+                "name": "osfp27"
+            },
+            {
+                "name": "osfp28"
+            },
+            {
+                "name": "osfp29"
+            },
+            {
+                "name": "osfp30"
+            },
+            {
+                "name": "osfp31"
+            },
+            {
+                "name": "osfp32"
+            },
+            {
+                "name": "osfp33"
+            },
+            {
+                "name": "osfp34"
+            },
+            {
+                "name": "osfp35"
+            },
+            {
+                "name": "osfp36"
+            },
+            {
+                "name": "osfp37"
+            },
+            {
+                "name": "osfp38"
+            },
+            {
+                "name": "osfp39"
+            },
+            {
+                "name": "osfp40"
+            },
+            {
+                "name": "osfp41"
+            },
+            {
+                "name": "osfp42"
+            },
+            {
+                "name": "osfp43"
+            },
+            {
+                "name": "osfp44"
+            },
+            {
+                "name": "osfp45"
+            },
+            {
+                "name": "osfp46"
+            },
+            {
+                "name": "osfp47"
+            },
+            {
+                "name": "osfp48"
+            },
+            {
+                "name": "osfp49"
+            },
+            {
+                "name": "osfp50"
+            },
+            {
+                "name": "osfp51"
+            },
+            {
+                "name": "osfp52"
+            },
+            {
+                "name": "osfp53"
+            },
+            {
+                "name": "osfp54"
+            },
+            {
+                "name": "osfp55"
+            },
+            {
+                "name": "osfp56"
+            },
+            {
+                "name": "osfp57"
+            },
+            {
+                "name": "osfp58"
+            },
+            {
+                "name": "osfp59"
+            },
+            {
+                "name": "osfp60"
+            },
+            {
+                "name": "osfp61"
+            },
+            {
+                "name": "osfp62"
+            },
+            {
+                "name": "osfp63"
+            },
+            {
+                "name": "osfp64"
+            }
+        ]
+    },
+    "interfaces": {
+        "Ethernet0": {
+            "index": "1,1,1,1,1,1,1,1",
+            "lanes": "17,18,19,20,21,22,23,24",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet1/1"
+                ],
+                "1x400G": [
+                    "Ethernet1/1"
+                ],
+                "2x400G": [
+                    "Ethernet1/1",
+                    "Ethernet1/5"
+                ]
+            }
+        },
+        "Ethernet8": {
+            "index": "2,2,2,2,2,2,2,2",
+            "lanes": "1,2,3,4,5,6,7,8",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet2/1"
+                ],
+                "1x400G": [
+                    "Ethernet2/1"
+                ],
+                "2x400G": [
+                    "Ethernet2/1",
+                    "Ethernet2/5"
+                ]
+            }
+        },
+        "Ethernet16": {
+            "index": "3,3,3,3,3,3,3,3",
+            "lanes": "9,10,11,12,13,14,15,16",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet3/1"
+                ],
+                "1x400G": [
+                    "Ethernet3/1"
+                ],
+                "2x400G": [
+                    "Ethernet3/1",
+                    "Ethernet3/5"
+                ]
+            }
+        },
+        "Ethernet24": {
+            "index": "4,4,4,4,4,4,4,4",
+            "lanes": "25,26,27,28,29,30,31,32",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet4/1"
+                ],
+                "1x400G": [
+                    "Ethernet4/1"
+                ],
+                "2x400G": [
+                    "Ethernet4/1",
+                    "Ethernet4/5"
+                ]
+            }
+        },
+        "Ethernet32": {
+            "index": "5,5,5,5,5,5,5,5",
+            "lanes": "57,58,59,60,61,62,63,64",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet5/1"
+                ],
+                "1x400G": [
+                    "Ethernet5/1"
+                ],
+                "2x400G": [
+                    "Ethernet5/1",
+                    "Ethernet5/5"
+                ]
+            }
+        },
+        "Ethernet40": {
+            "index": "6,6,6,6,6,6,6,6",
+            "lanes": "41,42,43,44,45,46,47,48",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet6/1"
+                ],
+                "1x400G": [
+                    "Ethernet6/1"
+                ],
+                "2x400G": [
+                    "Ethernet6/1",
+                    "Ethernet6/5"
+                ]
+            }
+        },
+        "Ethernet48": {
+            "index": "7,7,7,7,7,7,7,7",
+            "lanes": "33,34,35,36,37,38,39,40",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet7/1"
+                ],
+                "1x400G": [
+                    "Ethernet7/1"
+                ],
+                "2x400G": [
+                    "Ethernet7/1",
+                    "Ethernet7/5"
+                ]
+            }
+        },
+        "Ethernet56": {
+            "index": "8,8,8,8,8,8,8,8",
+            "lanes": "49,50,51,52,53,54,55,56",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet8/1"
+                ],
+                "1x400G": [
+                    "Ethernet8/1"
+                ],
+                "2x400G": [
+                    "Ethernet8/1",
+                    "Ethernet8/5"
+                ]
+            }
+        },
+        "Ethernet64": {
+            "index": "9,9,9,9,9,9,9,9",
+            "lanes": "89,90,91,92,93,94,95,96",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet9/1"
+                ],
+                "1x400G": [
+                    "Ethernet9/1"
+                ],
+                "2x400G": [
+                    "Ethernet9/1",
+                    "Ethernet9/5"
+                ]
+            }
+        },
+        "Ethernet72": {
+            "index": "10,10,10,10,10,10,10,10",
+            "lanes": "73,74,75,76,77,78,79,80",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet10/1"
+                ],
+                "1x400G": [
+                    "Ethernet10/1"
+                ],
+                "2x400G": [
+                    "Ethernet10/1",
+                    "Ethernet10/5"
+                ]
+            }
+        },
+        "Ethernet80": {
+            "index": "11,11,11,11,11,11,11,11",
+            "lanes": "65,66,67,68,69,70,71,72",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet11/1"
+                ],
+                "1x400G": [
+                    "Ethernet11/1"
+                ],
+                "2x400G": [
+                    "Ethernet11/1",
+                    "Ethernet11/5"
+                ]
+            }
+        },
+        "Ethernet88": {
+            "index": "12,12,12,12,12,12,12,12",
+            "lanes": "81,82,83,84,85,86,87,88",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet12/1"
+                ],
+                "1x400G": [
+                    "Ethernet12/1"
+                ],
+                "2x400G": [
+                    "Ethernet12/1",
+                    "Ethernet12/5"
+                ]
+            }
+        },
+        "Ethernet96": {
+            "index": "13,13,13,13,13,13,13,13",
+            "lanes": "121,122,123,124,125,126,127,128",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet13/1"
+                ],
+                "1x400G": [
+                    "Ethernet13/1"
+                ],
+                "2x400G": [
+                    "Ethernet13/1",
+                    "Ethernet13/5"
+                ]
+            }
+        },
+        "Ethernet104": {
+            "index": "14,14,14,14,14,14,14,14",
+            "lanes": "105,106,107,108,109,110,111,112",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet14/1"
+                ],
+                "1x400G": [
+                    "Ethernet14/1"
+                ],
+                "2x400G": [
+                    "Ethernet14/1",
+                    "Ethernet14/5"
+                ]
+            }
+        },
+        "Ethernet112": {
+            "index": "15,15,15,15,15,15,15,15",
+            "lanes": "97,98,99,100,101,102,103,104",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet15/1"
+                ],
+                "1x400G": [
+                    "Ethernet15/1"
+                ],
+                "2x400G": [
+                    "Ethernet15/1",
+                    "Ethernet15/5"
+                ]
+            }
+        },
+        "Ethernet120": {
+            "index": "16,16,16,16,16,16,16,16",
+            "lanes": "113,114,115,116,117,118,119,120",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet16/1"
+                ],
+                "1x400G": [
+                    "Ethernet16/1"
+                ],
+                "2x400G": [
+                    "Ethernet16/1",
+                    "Ethernet16/5"
+                ]
+            }
+        },
+        "Ethernet128": {
+            "index": "17,17,17,17,17,17,17,17",
+            "lanes": "153,154,155,156,157,158,159,160",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet17/1"
+                ],
+                "1x400G": [
+                    "Ethernet17/1"
+                ],
+                "2x400G": [
+                    "Ethernet17/1",
+                    "Ethernet17/5"
+                ]
+            }
+        },
+        "Ethernet136": {
+            "index": "18,18,18,18,18,18,18,18",
+            "lanes": "137,138,139,140,141,142,143,144",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet18/1"
+                ],
+                "1x400G": [
+                    "Ethernet18/1"
+                ],
+                "2x400G": [
+                    "Ethernet18/1",
+                    "Ethernet18/5"
+                ]
+            }
+        },
+        "Ethernet144": {
+            "index": "19,19,19,19,19,19,19,19",
+            "lanes": "129,130,131,132,133,134,135,136",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet19/1"
+                ],
+                "1x400G": [
+                    "Ethernet19/1"
+                ],
+                "2x400G": [
+                    "Ethernet19/1",
+                    "Ethernet19/5"
+                ]
+            }
+        },
+        "Ethernet152": {
+            "index": "20,20,20,20,20,20,20,20",
+            "lanes": "145,146,147,148,149,150,151,152",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet20/1"
+                ],
+                "1x400G": [
+                    "Ethernet20/1"
+                ],
+                "2x400G": [
+                    "Ethernet20/1",
+                    "Ethernet20/5"
+                ]
+            }
+        },
+        "Ethernet160": {
+            "index": "21,21,21,21,21,21,21,21",
+            "lanes": "185,186,187,188,189,190,191,192",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet21/1"
+                ],
+                "1x400G": [
+                    "Ethernet21/1"
+                ],
+                "2x400G": [
+                    "Ethernet21/1",
+                    "Ethernet21/5"
+                ]
+            }
+        },
+        "Ethernet168": {
+            "index": "22,22,22,22,22,22,22,22",
+            "lanes": "169,170,171,172,173,174,175,176",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet22/1"
+                ],
+                "1x400G": [
+                    "Ethernet22/1"
+                ],
+                "2x400G": [
+                    "Ethernet22/1",
+                    "Ethernet22/5"
+                ]
+            }
+        },
+        "Ethernet176": {
+            "index": "23,23,23,23,23,23,23,23",
+            "lanes": "161,162,163,164,165,166,167,168",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet23/1"
+                ],
+                "1x400G": [
+                    "Ethernet23/1"
+                ],
+                "2x400G": [
+                    "Ethernet23/1",
+                    "Ethernet23/5"
+                ]
+            }
+        },
+        "Ethernet184": {
+            "index": "24,24,24,24,24,24,24,24",
+            "lanes": "177,178,179,180,181,182,183,184",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet24/1"
+                ],
+                "1x400G": [
+                    "Ethernet24/1"
+                ],
+                "2x400G": [
+                    "Ethernet24/1",
+                    "Ethernet24/5"
+                ]
+            }
+        },
+        "Ethernet192": {
+            "index": "25,25,25,25,25,25,25,25",
+            "lanes": "217,218,219,220,221,222,223,224",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet25/1"
+                ],
+                "1x400G": [
+                    "Ethernet25/1"
+                ],
+                "2x400G": [
+                    "Ethernet25/1",
+                    "Ethernet25/5"
+                ]
+            }
+        },
+        "Ethernet200": {
+            "index": "26,26,26,26,26,26,26,26",
+            "lanes": "201,202,203,204,205,206,207,208",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet26/1"
+                ],
+                "1x400G": [
+                    "Ethernet26/1"
+                ],
+                "2x400G": [
+                    "Ethernet26/1",
+                    "Ethernet26/5"
+                ]
+            }
+        },
+        "Ethernet208": {
+            "index": "27,27,27,27,27,27,27,27",
+            "lanes": "193,194,195,196,197,198,199,200",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet27/1"
+                ],
+                "1x400G": [
+                    "Ethernet27/1"
+                ],
+                "2x400G": [
+                    "Ethernet27/1",
+                    "Ethernet27/5"
+                ]
+            }
+        },
+        "Ethernet216": {
+            "index": "28,28,28,28,28,28,28,28",
+            "lanes": "209,210,211,212,213,214,215,216",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet28/1"
+                ],
+                "1x400G": [
+                    "Ethernet28/1"
+                ],
+                "2x400G": [
+                    "Ethernet28/1",
+                    "Ethernet28/5"
+                ]
+            }
+        },
+        "Ethernet224": {
+            "index": "29,29,29,29,29,29,29,29",
+            "lanes": "249,250,251,252,253,254,255,256",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet29/1"
+                ],
+                "1x400G": [
+                    "Ethernet29/1"
+                ],
+                "2x400G": [
+                    "Ethernet29/1",
+                    "Ethernet29/5"
+                ]
+            }
+        },
+        "Ethernet232": {
+            "index": "30,30,30,30,30,30,30,30",
+            "lanes": "233,234,235,236,237,238,239,240",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet30/1"
+                ],
+                "1x400G": [
+                    "Ethernet30/1"
+                ],
+                "2x400G": [
+                    "Ethernet30/1",
+                    "Ethernet30/5"
+                ]
+            }
+        },
+        "Ethernet240": {
+            "index": "31,31,31,31,31,31,31,31",
+            "lanes": "225,226,227,228,229,230,231,232",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet31/1"
+                ],
+                "1x400G": [
+                    "Ethernet31/1"
+                ],
+                "2x400G": [
+                    "Ethernet31/1",
+                    "Ethernet31/5"
+                ]
+            }
+        },
+        "Ethernet248": {
+            "index": "32,32,32,32,32,32,32,32",
+            "lanes": "241,242,243,244,245,246,247,248",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet32/1"
+                ],
+                "1x400G": [
+                    "Ethernet32/1"
+                ],
+                "2x400G": [
+                    "Ethernet32/1",
+                    "Ethernet32/5"
+                ]
+            }
+        },
+        "Ethernet256": {
+            "index": "33,33,33,33,33,33,33,33",
+            "lanes": "273,274,275,276,277,278,279,280",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet33/1"
+                ],
+                "1x400G": [
+                    "Ethernet33/1"
+                ],
+                "2x400G": [
+                    "Ethernet33/1",
+                    "Ethernet33/5"
+                ]
+            }
+        },
+        "Ethernet264": {
+            "index": "34,34,34,34,34,34,34,34",
+            "lanes": "257,258,259,260,261,262,263,264",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet34/1"
+                ],
+                "1x400G": [
+                    "Ethernet34/1"
+                ],
+                "2x400G": [
+                    "Ethernet34/1",
+                    "Ethernet34/5"
+                ]
+            }
+        },
+        "Ethernet272": {
+            "index": "35,35,35,35,35,35,35,35",
+            "lanes": "265,266,267,268,269,270,271,272",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet35/1"
+                ],
+                "1x400G": [
+                    "Ethernet35/1"
+                ],
+                "2x400G": [
+                    "Ethernet35/1",
+                    "Ethernet35/5"
+                ]
+            }
+        },
+        "Ethernet280": {
+            "index": "36,36,36,36,36,36,36,36",
+            "lanes": "281,282,283,284,285,286,287,288",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet36/1"
+                ],
+                "1x400G": [
+                    "Ethernet36/1"
+                ],
+                "2x400G": [
+                    "Ethernet36/1",
+                    "Ethernet36/5"
+                ]
+            }
+        },
+        "Ethernet288": {
+            "index": "37,37,37,37,37,37,37,37",
+            "lanes": "313,314,315,316,317,318,319,320",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet37/1"
+                ],
+                "1x400G": [
+                    "Ethernet37/1"
+                ],
+                "2x400G": [
+                    "Ethernet37/1",
+                    "Ethernet37/5"
+                ]
+            }
+        },
+        "Ethernet296": {
+            "index": "38,38,38,38,38,38,38,38",
+            "lanes": "297,298,299,300,301,302,303,304",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet38/1"
+                ],
+                "1x400G": [
+                    "Ethernet38/1"
+                ],
+                "2x400G": [
+                    "Ethernet38/1",
+                    "Ethernet38/5"
+                ]
+            }
+        },
+        "Ethernet304": {
+            "index": "39,39,39,39,39,39,39,39",
+            "lanes": "289,290,291,292,293,294,295,296",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet39/1"
+                ],
+                "1x400G": [
+                    "Ethernet39/1"
+                ],
+                "2x400G": [
+                    "Ethernet39/1",
+                    "Ethernet39/5"
+                ]
+            }
+        },
+        "Ethernet312": {
+            "index": "40,40,40,40,40,40,40,40",
+            "lanes": "305,306,307,308,309,310,311,312",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet40/1"
+                ],
+                "1x400G": [
+                    "Ethernet40/1"
+                ],
+                "2x400G": [
+                    "Ethernet40/1",
+                    "Ethernet40/5"
+                ]
+            }
+        },
+        "Ethernet320": {
+            "index": "41,41,41,41,41,41,41,41",
+            "lanes": "345,346,347,348,349,350,351,352",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet41/1"
+                ],
+                "1x400G": [
+                    "Ethernet41/1"
+                ],
+                "2x400G": [
+                    "Ethernet41/1",
+                    "Ethernet41/5"
+                ]
+            }
+        },
+        "Ethernet328": {
+            "index": "42,42,42,42,42,42,42,42",
+            "lanes": "329,330,331,332,333,334,335,336",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet42/1"
+                ],
+                "1x400G": [
+                    "Ethernet42/1"
+                ],
+                "2x400G": [
+                    "Ethernet42/1",
+                    "Ethernet42/5"
+                ]
+            }
+        },
+        "Ethernet336": {
+            "index": "43,43,43,43,43,43,43,43",
+            "lanes": "321,322,323,324,325,326,327,328",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet43/1"
+                ],
+                "1x400G": [
+                    "Ethernet43/1"
+                ],
+                "2x400G": [
+                    "Ethernet43/1",
+                    "Ethernet43/5"
+                ]
+            }
+        },
+        "Ethernet344": {
+            "index": "44,44,44,44,44,44,44,44",
+            "lanes": "337,338,339,340,341,342,343,344",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet44/1"
+                ],
+                "1x400G": [
+                    "Ethernet44/1"
+                ],
+                "2x400G": [
+                    "Ethernet44/1",
+                    "Ethernet44/5"
+                ]
+            }
+        },
+        "Ethernet352": {
+            "index": "45,45,45,45,45,45,45,45",
+            "lanes": "377,378,379,380,381,382,383,384",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet45/1"
+                ],
+                "1x400G": [
+                    "Ethernet45/1"
+                ],
+                "2x400G": [
+                    "Ethernet45/1",
+                    "Ethernet45/5"
+                ]
+            }
+        },
+        "Ethernet360": {
+            "index": "46,46,46,46,46,46,46,46",
+            "lanes": "361,362,363,364,365,366,367,368",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet46/1"
+                ],
+                "1x400G": [
+                    "Ethernet46/1"
+                ],
+                "2x400G": [
+                    "Ethernet46/1",
+                    "Ethernet46/5"
+                ]
+            }
+        },
+        "Ethernet368": {
+            "index": "47,47,47,47,47,47,47,47",
+            "lanes": "353,354,355,356,357,358,359,360",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet47/1"
+                ],
+                "1x400G": [
+                    "Ethernet47/1"
+                ],
+                "2x400G": [
+                    "Ethernet47/1",
+                    "Ethernet47/5"
+                ]
+            }
+        },
+        "Ethernet376": {
+            "index": "48,48,48,48,48,48,48,48",
+            "lanes": "369,370,371,372,373,374,375,376",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet48/1"
+                ],
+                "1x400G": [
+                    "Ethernet48/1"
+                ],
+                "2x400G": [
+                    "Ethernet48/1",
+                    "Ethernet48/5"
+                ]
+            }
+        },
+        "Ethernet384": {
+            "index": "49,49,49,49,49,49,49,49",
+            "lanes": "409,410,411,412,413,414,415,416",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet49/1"
+                ],
+                "1x400G": [
+                    "Ethernet49/1"
+                ],
+                "2x400G": [
+                    "Ethernet49/1",
+                    "Ethernet49/5"
+                ]
+            }
+        },
+        "Ethernet392": {
+            "index": "50,50,50,50,50,50,50,50",
+            "lanes": "393,394,395,396,397,398,399,400",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet50/1"
+                ],
+                "1x400G": [
+                    "Ethernet50/1"
+                ],
+                "2x400G": [
+                    "Ethernet50/1",
+                    "Ethernet50/5"
+                ]
+            }
+        },
+        "Ethernet400": {
+            "index": "51,51,51,51,51,51,51,51",
+            "lanes": "385,386,387,388,389,390,391,392",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet51/1"
+                ],
+                "1x400G": [
+                    "Ethernet51/1"
+                ],
+                "2x400G": [
+                    "Ethernet51/1",
+                    "Ethernet51/5"
+                ]
+            }
+        },
+        "Ethernet408": {
+            "index": "52,52,52,52,52,52,52,52",
+            "lanes": "401,402,403,404,405,406,407,408",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet52/1"
+                ],
+                "1x400G": [
+                    "Ethernet52/1"
+                ],
+                "2x400G": [
+                    "Ethernet52/1",
+                    "Ethernet52/5"
+                ]
+            }
+        },
+        "Ethernet416": {
+            "index": "53,53,53,53,53,53,53,53",
+            "lanes": "441,442,443,444,445,446,447,448",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet53/1"
+                ],
+                "1x400G": [
+                    "Ethernet53/1"
+                ],
+                "2x400G": [
+                    "Ethernet53/1",
+                    "Ethernet53/5"
+                ]
+            }
+        },
+        "Ethernet424": {
+            "index": "54,54,54,54,54,54,54,54",
+            "lanes": "425,426,427,428,429,430,431,432",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet54/1"
+                ],
+                "1x400G": [
+                    "Ethernet54/1"
+                ],
+                "2x400G": [
+                    "Ethernet54/1",
+                    "Ethernet54/5"
+                ]
+            }
+        },
+        "Ethernet432": {
+            "index": "55,55,55,55,55,55,55,55",
+            "lanes": "417,418,419,420,421,422,423,424",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet55/1"
+                ],
+                "1x400G": [
+                    "Ethernet55/1"
+                ],
+                "2x400G": [
+                    "Ethernet55/1",
+                    "Ethernet55/5"
+                ]
+            }
+        },
+        "Ethernet440": {
+            "index": "56,56,56,56,56,56,56,56",
+            "lanes": "433,434,435,436,437,438,439,440",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet56/1"
+                ],
+                "1x400G": [
+                    "Ethernet56/1"
+                ],
+                "2x400G": [
+                    "Ethernet56/1",
+                    "Ethernet56/5"
+                ]
+            }
+        },
+        "Ethernet448": {
+            "index": "57,57,57,57,57,57,57,57",
+            "lanes": "473,474,475,476,477,478,479,480",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet57/1"
+                ],
+                "1x400G": [
+                    "Ethernet57/1"
+                ],
+                "2x400G": [
+                    "Ethernet57/1",
+                    "Ethernet57/5"
+                ]
+            }
+        },
+        "Ethernet456": {
+            "index": "58,58,58,58,58,58,58,58",
+            "lanes": "457,458,459,460,461,462,463,464",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet58/1"
+                ],
+                "1x400G": [
+                    "Ethernet58/1"
+                ],
+                "2x400G": [
+                    "Ethernet58/1",
+                    "Ethernet58/5"
+                ]
+            }
+        },
+        "Ethernet464": {
+            "index": "59,59,59,59,59,59,59,59",
+            "lanes": "449,450,451,452,453,454,455,456",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet59/1"
+                ],
+                "1x400G": [
+                    "Ethernet59/1"
+                ],
+                "2x400G": [
+                    "Ethernet59/1",
+                    "Ethernet59/5"
+                ]
+            }
+        },
+        "Ethernet472": {
+            "index": "60,60,60,60,60,60,60,60",
+            "lanes": "465,466,467,468,469,470,471,472",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet60/1"
+                ],
+                "1x400G": [
+                    "Ethernet60/1"
+                ],
+                "2x400G": [
+                    "Ethernet60/1",
+                    "Ethernet60/5"
+                ]
+            }
+        },
+        "Ethernet480": {
+            "index": "61,61,61,61,61,61,61,61",
+            "lanes": "505,506,507,508,509,510,511,512",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet61/1"
+                ],
+                "1x400G": [
+                    "Ethernet61/1"
+                ],
+                "2x400G": [
+                    "Ethernet61/1",
+                    "Ethernet61/5"
+                ]
+            }
+        },
+        "Ethernet488": {
+            "index": "62,62,62,62,62,62,62,62",
+            "lanes": "489,490,491,492,493,494,495,496",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet62/1"
+                ],
+                "1x400G": [
+                    "Ethernet62/1"
+                ],
+                "2x400G": [
+                    "Ethernet62/1",
+                    "Ethernet62/5"
+                ]
+            }
+        },
+        "Ethernet496": {
+            "index": "63,63,63,63,63,63,63,63",
+            "lanes": "481,482,483,484,485,486,487,488",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet63/1"
+                ],
+                "1x400G": [
+                    "Ethernet63/1"
+                ],
+                "2x400G": [
+                    "Ethernet63/1",
+                    "Ethernet63/5"
+                ]
+            }
+        },
+        "Ethernet504": {
+            "index": "64,64,64,64,64,64,64,64",
+            "lanes": "497,498,499,500,501,502,503,504",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet64/1"
+                ],
+                "1x400G": [
+                    "Ethernet64/1"
+                ],
+                "2x400G": [
+                    "Ethernet64/1",
+                    "Ethernet64/5"
+                ]
+            }
+        }
+    }
+}
diff --git a/device/arista/x86_64-arista_7060x6_64de/platform_asic b/device/arista/x86_64-arista_7060x6_64de/platform_asic
new file mode 100644
index 000000000..960467652
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64de/platform_asic
@@ -0,0 +1 @@
+broadcom
diff --git a/device/arista/x86_64-arista_7060x6_64de/platform_components.json b/device/arista/x86_64-arista_7060x6_64de/platform_components.json
new file mode 100644
index 000000000..0c90359cb
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64de/platform_components.json
@@ -0,0 +1,12 @@
+{
+   "chassis": {
+      "DCS-7060X6-64DE": {
+         "component": {
+            "Aboot()": {},
+            "Scd(addr=0000:00:18.7)": {},
+            "Scd(addr=0000:03:00.0)": {},
+            "ShearwaterSysCpld(addr=13-0023)": {}
+         }
+      }
+   }
+}
diff --git a/device/arista/x86_64-arista_7060x6_64de/platform_env.conf b/device/arista/x86_64-arista_7060x6_64de/platform_env.conf
new file mode 100644
index 000000000..dd7cf4fe0
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64de/platform_env.conf
@@ -0,0 +1,2 @@
+SYNCD_SHM_SIZE=512m
+is_ltsw_chip=1
diff --git a/device/arista/x86_64-arista_7060x6_64de/platform_reboot b/device/arista/x86_64-arista_7060x6_64de/platform_reboot
new file mode 120000
index 000000000..7f94a49e3
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64de/platform_reboot
@@ -0,0 +1 @@
+../x86_64-arista_common/platform_reboot
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_64de/plugins b/device/arista/x86_64-arista_7060x6_64de/plugins
new file mode 120000
index 000000000..789a45fca
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64de/plugins
@@ -0,0 +1 @@
+../x86_64-arista_common/plugins
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_64de/pmon_daemon_control.json b/device/arista/x86_64-arista_7060x6_64de/pmon_daemon_control.json
new file mode 120000
index 000000000..51d5ab7b0
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64de/pmon_daemon_control.json
@@ -0,0 +1 @@
+../x86_64-arista_common/pmon_daemon_control.json
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_64de/sensors.conf b/device/arista/x86_64-arista_7060x6_64de/sensors.conf
new file mode 100644
index 000000000..d424c8708
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64de/sensors.conf
@@ -0,0 +1,14 @@
+bus "i2c-25" "SCD 0000:03:00.0 SMBus master 1 bus 0"
+
+chip "max6581-i2c-25-4d"
+    ignore temp5
+    ignore temp6
+
+chip "nvme-pci-0400"
+    # TODO: sensors complaining about tempX_min and tempX_max
+    ignore temp2
+    ignore temp3
+    ignore temp4
+    ignore temp5
+    ignore temp6
+    ignore temp7
diff --git a/device/arista/x86_64-arista_7060x6_64de/system_health_monitoring_config.json b/device/arista/x86_64-arista_7060x6_64de/system_health_monitoring_config.json
new file mode 120000
index 000000000..1185f771f
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64de/system_health_monitoring_config.json
@@ -0,0 +1 @@
+../x86_64-arista_common/system_health_monitoring_config.json
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_64de/thermal_policy.json b/device/arista/x86_64-arista_7060x6_64de/thermal_policy.json
new file mode 120000
index 000000000..0991dc7f3
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64de/thermal_policy.json
@@ -0,0 +1 @@
+../x86_64-arista_common/thermal_policy.json
\ No newline at end of file
diff --git a/files/Aboot/boot0.j2 b/files/Aboot/boot0.j2
index 143e869e5..43f3fcae1 100644
--- a/files/Aboot/boot0.j2
+++ b/files/Aboot/boot0.j2
@@ -457,15 +457,23 @@ EOF
     chmod a+r "${target_path}/machine.conf"
 }
 
-read_system_eeprom() {
-    if [ -x /bin/readprefdl ] && [ -f /tmp/.system-prefdl ]; then
-        readprefdl -f /tmp/.system-prefdl -d > $target_path/.system-prefdl
+read_eeprom() {
+    if [ -x /bin/readprefdl ] && [ -f "$1" ]; then
+        readprefdl -f "$1" -d > $target_path/.system-prefdl
     elif [ -f /etc/prefdl ]; then
         cp /etc/prefdl $target_path/.system-prefdl
         chmod a+r $target_path/.system-prefdl
     fi
 }
 
+read_switch_eeprom() {
+    read_eeprom /tmp/.switch-prefdl
+}
+
+read_system_eeprom() {
+    read_eeprom /tmp/.system-prefdl
+}
+
 write_platform_specific_cmdline() {
     local platform="$(cmdline_get platform)"
     local sid="$(cmdline_get sid | sed 's/Ssd$//')"
@@ -615,6 +623,9 @@ write_platform_specific_cmdline() {
         aboot_machine=arista_7280cr3mk_32p4
         flash_size=7382
     fi
+    if in_array "$sid" "Shearwater4Mk2" "Shearwater4Mk2N" "Shearwater4Mk2QuicksilverDD" "Shearwater4Mk2NQuicksilverDD"; then
+        aboot_machine=arista_7060x6_64de
+    fi
 
     # disable cpu c-state other than C1
     local cpuvendor="$(sed -nr 's/vendor_id[\t ]*: (.*)/\1/p' /proc/cpuinfo | head -n 1)"
@@ -656,6 +667,13 @@ write_platform_specific_cmdline() {
     if in_array "$platform" "prairieisland"; then
         read_system_eeprom
     fi
+    if in_array "$platform" "shearwater"; then
+        if [ -f /tmp/.switch-prefdl ]; then
+            read_switch_eeprom
+        else
+            read_system_eeprom
+        fi
+    fi
 
     if [ $varlog_size -eq 0 ]; then
        if [ $flash_size -ge 28000 ]; then

From 5628883467381afd95298199c44c63aa93d53bf2 Mon Sep 17 00:00:00 2001
From: Samuel Angebault <staphylo@arista.com>
Date: Wed, 24 Apr 2024 01:44:26 +0200
Subject: [PATCH 0476/1115] [Arista] Update platform library submodules
 (#18359)

Add QuicksilverDD product
Fix issue with linecard rpc powercycle
Fix pcie switch race condition on chassis
Fix powercycle on SEU behavior for Lodoga
Improve out of spec xcvr support
Refactor some of the platform detection code
Fix reboot cause time issue on some products
Fix some bookworm related issues
Fix some issue with linecard reboot cause determination
Fix some some corner case in fabric card asic initialization
---
 platform/barefoot/sonic-platform-modules-arista | 2 +-
 platform/broadcom/sonic-platform-modules-arista | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/platform/barefoot/sonic-platform-modules-arista b/platform/barefoot/sonic-platform-modules-arista
index c2b98f6a9..9038696de 160000
--- a/platform/barefoot/sonic-platform-modules-arista
+++ b/platform/barefoot/sonic-platform-modules-arista
@@ -1 +1 @@
-Subproject commit c2b98f6a9efce536a228028bb81e760bade2015d
+Subproject commit 9038696debe74bd99b0b6e35552531e38cd1aa51
diff --git a/platform/broadcom/sonic-platform-modules-arista b/platform/broadcom/sonic-platform-modules-arista
index c2b98f6a9..9038696de 160000
--- a/platform/broadcom/sonic-platform-modules-arista
+++ b/platform/broadcom/sonic-platform-modules-arista
@@ -1 +1 @@
-Subproject commit c2b98f6a9efce536a228028bb81e760bade2015d
+Subproject commit 9038696debe74bd99b0b6e35552531e38cd1aa51

From e6d638668abcf525d0ea86a9f53d02a8809baec4 Mon Sep 17 00:00:00 2001
From: bingwang-ms <66248323+bingwang-ms@users.noreply.github.com>
Date: Tue, 23 Apr 2024 22:01:57 -0700
Subject: [PATCH 0477/1115] Fix YANG model for ACL (#18693)

* Fix YANG model for ACL
---
 src/sonic-yang-mgmt/tests/test_cfghelp.py     |  12 +-
 .../tests/yang_model_tests/tests/acl.json     |  12 +
 .../yang_model_tests/tests_config/acl.json    | 220 ++++++++++++++++++
 .../yang-templates/sonic-acl.yang.j2          |  14 +-
 .../yang-templates/sonic-types.yang.j2        |   2 +
 5 files changed, 247 insertions(+), 13 deletions(-)

diff --git a/src/sonic-yang-mgmt/tests/test_cfghelp.py b/src/sonic-yang-mgmt/tests/test_cfghelp.py
index c7d3fe526..4f1f6ee58 100644
--- a/src/sonic-yang-mgmt/tests/test_cfghelp.py
+++ b/src/sonic-yang-mgmt/tests/test_cfghelp.py
@@ -105,12 +105,12 @@
 Description: ACL_RULE part of config_db.json
 
 key - ACL_TABLE_NAME:RULE_NAME
-+-----------+-----------------------------------------+-------------+-----------+-------------+
-| Field     | Description                             | Mandatory   | Default   | Reference   |
-+===========+=========================================+=============+===========+=============+
-| ICMP_TYPE | Mutually exclusive in group icmp        |             |           |             |
-|           | when IP_TYPE in ANY,IP,IPV4,IPv4ANY,ARP |             |           |             |
-+-----------+-----------------------------------------+-------------+-----------+-------------+
++-----------+-------------------------------------------------+-------------+-----------+-------------+
+| Field     | Description                                     | Mandatory   | Default   | Reference   |
++===========+=================================================+=============+===========+=============+
+| ICMP_TYPE | Mutually exclusive in group icmp                |             |           |             |
+|           | when IP_TYPE in ANY,IP,IPV4,IPv4ANY,IPV4ANY,ARP |             |           |             |
++-----------+-------------------------------------------------+-------------+-----------+-------------+
 
 """
 
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/acl.json b/src/sonic-yang-models/tests/yang_model_tests/tests/acl.json
index 18f053e2a..309b64bb0 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests/acl.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests/acl.json
@@ -38,6 +38,12 @@
         "desc": "Configure non-existing ACL_TABLE in ACL_RULE.",
         "eStrKey" : "LeafRef"
     },
+    "ACL_RULE_IP_TYPE_SRC_IPV6ANY": {
+        "desc": "Configure IP_TYPE as ipv6any and SRC_IPV6 in ACL_RULE."
+    },
+    "ACL_RULE_IP_TYPE_DST_IPV4ANY": {
+        "desc": "Configure IP_TYPE as ipv4any and DST_IP in ACL_RULE."
+    },
     "ACL_RULE_IP_TYPE_SRC_IPV6_MISMATCH": {
         "desc": "Configure IP_TYPE as ipv4any and SRC_IPV6 in ACL_RULE.",
         "eStrKey" : "When",
@@ -51,6 +57,12 @@
         "eStrKey" : "When",
         "eStr": ["IP_TYPE"]
     },
+    "ACL_RULE_VALID_L4_SRC_PORT_RANGE": {
+        "desc": "Configure l4_src_port_range as 1024-65535 in ACL_RULE"
+    },
+    "ACL_RULE_VALID_L4_DST_PORT_RANGE": {
+        "desc": "Configure l4_src_port_range as 0-65535 in ACL_RULE"
+    },
     "ACL_RULE_WRONG_L4_SRC_PORT_RANGE": {
         "desc": "Configure l4_src_port_range as 99999-99999 in ACL_RULE",
         "eStrKey" : "Pattern"
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/acl.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/acl.json
index 6f39ab6e4..c50fd8c71 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/acl.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/acl.json
@@ -106,6 +106,114 @@
             }
         }
     },
+    "ACL_RULE_IP_TYPE_SRC_IPV6ANY": {
+        "sonic-acl:sonic-acl": {
+            "sonic-acl:ACL_RULE": {
+                "ACL_RULE_LIST": [
+                    {
+                        "ACL_TABLE_NAME": "NO-NSW-PACL-V6",
+                        "IP_TYPE": "IPV6ANY",
+                        "PACKET_ACTION": "FORWARD",
+                        "PRIORITY": 999980,
+                        "RULE_NAME": "Rule_20",
+                        "SRC_IPV6": "2001::1/64"
+                    }
+                ]
+            },
+            "sonic-acl:ACL_TABLE": {
+                "ACL_TABLE_LIST": [
+                    {
+                        "ACL_TABLE_NAME": "NO-NSW-PACL-V6",
+                        "policy_desc": "Filter IPv6",
+                        "ports": [
+                            "Ethernet0",
+                            "Ethernet1"
+                        ],
+                        "stage": "EGRESS",
+                        "type": "L3V6"
+                    }
+                ]
+            }
+        },
+        "sonic-port:sonic-port": {
+            "sonic-port:PORT": {
+                "PORT_LIST": [
+                    {
+                        "admin_status": "up",
+                        "alias": "eth0",
+                        "lanes": "0,1,2,3",
+                        "description": "Ethernet0",
+                        "mtu": 9000,
+                        "name": "Ethernet0",
+                        "speed": 25000
+                    },
+                    {
+                        "admin_status": "up",
+                        "alias": "eth1",
+                        "lanes": "0,1,2,3",
+                        "description": "Ethernet1",
+                        "mtu": 9000,
+                        "name": "Ethernet1",
+                        "speed": 25000
+                    }
+                ]
+            }
+        }
+    },
+    "ACL_RULE_IP_TYPE_DST_IPV4ANY": {
+        "sonic-acl:sonic-acl": {
+            "sonic-acl:ACL_RULE": {
+                "ACL_RULE_LIST": [
+                    {
+                        "ACL_TABLE_NAME": "NO-NSW-PACL-V4",
+                        "IP_TYPE": "IPV4ANY",
+                        "PACKET_ACTION": "FORWARD",
+                        "PRIORITY": 999980,
+                        "RULE_NAME": "Rule_20",
+                        "DST_IP": "192.168.0.1/21"
+                    }
+                ]
+            },
+            "sonic-acl:ACL_TABLE": {
+                "ACL_TABLE_LIST": [
+                    {
+                        "ACL_TABLE_NAME": "NO-NSW-PACL-V4",
+                        "policy_desc": "Filter IPv4",
+                        "ports": [
+                            "Ethernet0",
+                            "Ethernet1"
+                        ],
+                        "stage": "EGRESS",
+                        "type": "L3"
+                    }
+                ]
+            }
+        },
+        "sonic-port:sonic-port": {
+            "sonic-port:PORT": {
+                "PORT_LIST": [
+                    {
+                        "admin_status": "up",
+                        "alias": "eth0",
+                        "lanes": "0,1,2,3",
+                        "description": "Ethernet0",
+                        "mtu": 9000,
+                        "name": "Ethernet0",
+                        "speed": 25000
+                    },
+                    {
+                        "admin_status": "up",
+                        "alias": "eth1",
+                        "lanes": "0,1,2,3",
+                        "description": "Ethernet1",
+                        "mtu": 9000,
+                        "name": "Ethernet1",
+                        "speed": 25000
+                    }
+                ]
+            }
+        }
+    },
     "ACL_RULE_IP_TYPE_SRC_IPV6_MISMATCH": {
         "sonic-acl:sonic-acl": {
             "sonic-acl:ACL_RULE": {
@@ -428,6 +536,118 @@
             }
         }
     },
+    "ACL_RULE_VALID_L4_SRC_PORT_RANGE": {
+        "sonic-acl:sonic-acl": {
+            "sonic-acl:ACL_RULE": {
+                "ACL_RULE_LIST": [
+                    {
+                        "ACL_TABLE_NAME": "NO-NSW-PACL-V6",
+                        "DST_IPV6": "2a04:f547:43:320::/64",
+                        "IP_TYPE": "IP",
+                        "L4_SRC_PORT_RANGE": "1024-65535",
+                        "PACKET_ACTION": "FORWARD",
+                        "PRIORITY": 999980,
+                        "RULE_NAME": "Rule_20",
+                        "SRC_IPV6": "2a04:f547:41::/48"
+                    }
+                ]
+            },
+            "sonic-acl:ACL_TABLE": {
+                "ACL_TABLE_LIST": [
+                    {
+                        "ACL_TABLE_NAME": "NO-NSW-PACL-V6",
+                        "policy_desc": "Filter IPv6",
+                        "ports": [
+                            "Ethernet0",
+                            "Ethernet1"
+                        ],
+                        "stage": "EGRESS",
+                        "type": "L3V6"
+                    }
+                ]
+            }
+        },
+        "sonic-port:sonic-port": {
+            "sonic-port:PORT": {
+                "PORT_LIST": [
+                    {
+                        "admin_status": "up",
+                        "alias": "eth0",
+                        "lanes": "0,1,2,3",
+                        "description": "Ethernet0",
+                        "mtu": 9000,
+                        "name": "Ethernet0",
+                        "speed": 25000
+                    },
+                    {
+                        "admin_status": "up",
+                        "alias": "eth1",
+                        "lanes": "0,1,2,3",
+                        "description": "Ethernet1",
+                        "mtu": 9000,
+                        "name": "Ethernet1",
+                        "speed": 25000
+                    }
+                ]
+            }
+        }
+    },
+    "ACL_RULE_VALID_L4_DST_PORT_RANGE": {
+        "sonic-acl:sonic-acl": {
+            "sonic-acl:ACL_RULE": {
+                "ACL_RULE_LIST": [
+                    {
+                        "ACL_TABLE_NAME": "NO-NSW-PACL-V6",
+                        "DST_IPV6": "2a04:f547:43:320::/64",
+                        "IP_TYPE": "IP",
+                        "L4_DST_PORT_RANGE": "1024-65535",
+                        "PACKET_ACTION": "FORWARD",
+                        "PRIORITY": 999980,
+                        "RULE_NAME": "Rule_20",
+                        "SRC_IPV6": "2a04:f547:41::/48"
+                    }
+                ]
+            },
+            "sonic-acl:ACL_TABLE": {
+                "ACL_TABLE_LIST": [
+                    {
+                        "ACL_TABLE_NAME": "NO-NSW-PACL-V6",
+                        "policy_desc": "Filter IPv6",
+                        "ports": [
+                            "Ethernet0",
+                            "Ethernet1"
+                        ],
+                        "stage": "EGRESS",
+                        "type": "L3V6"
+                    }
+                ]
+            }
+        },
+        "sonic-port:sonic-port": {
+            "sonic-port:PORT": {
+                "PORT_LIST": [
+                    {
+                        "admin_status": "up",
+                        "alias": "eth0",
+                        "lanes": "0,1,2,3",
+                        "description": "Ethernet0",
+                        "mtu": 9000,
+                        "name": "Ethernet0",
+                        "speed": 25000
+                    },
+                    {
+                        "admin_status": "up",
+                        "alias": "eth1",
+                        "lanes": "0,1,2,3",
+                        "description": "Ethernet1",
+                        "mtu": 9000,
+                        "name": "Ethernet1",
+                        "speed": 25000
+                    }
+                ]
+            }
+        }
+    },
     "ACL_RULE_WRONG_L4_SRC_PORT_RANGE": {
         "sonic-acl:sonic-acl": {
             "sonic-acl:ACL_RULE": {
diff --git a/src/sonic-yang-models/yang-templates/sonic-acl.yang.j2 b/src/sonic-yang-models/yang-templates/sonic-acl.yang.j2
index 882dbf8ef..ebaffe96e 100644
--- a/src/sonic-yang-models/yang-templates/sonic-acl.yang.j2
+++ b/src/sonic-yang-models/yang-templates/sonic-acl.yang.j2
@@ -106,7 +106,7 @@ module sonic-acl {
 						}
 					}
 					case ip4_prefix {
-						when "not(IP_TYPE) or boolean(IP_TYPE[.='ANY' or .='IP' or .='IPV4' or .='IPv4ANY' or .='ARP'])";
+						when "not(IP_TYPE) or boolean(IP_TYPE[.='ANY' or .='IP' or .='IPV4' or .='IPv4ANY' or .='IPV4ANY' or .='ARP'])";
 						leaf SRC_IP {
 							type inet:ipv4-prefix;
 						}
@@ -117,7 +117,7 @@ module sonic-acl {
 					}
 
 					case ip6_prefix {
-						when "not(IP_TYPE) or boolean(IP_TYPE[.='ANY' or .='IP' or .='IPV6' or .='IPv6ANY'])";
+						when "not(IP_TYPE) or boolean(IP_TYPE[.='ANY' or .='IP' or .='IPV6' or .='IPv6ANY' or .='IPV6ANY'])";
 						leaf SRC_IPV6 {
 							type inet:ipv6-prefix;
 						}
@@ -148,7 +148,7 @@ module sonic-acl {
 					case l4_src_port_range {
 						leaf L4_SRC_PORT_RANGE {
 							type string {
-								pattern '([0-9]{1,4}|[0-5][0-9]{4}|[6][0-4][0-9]{3}|[6][5][0-2][0-9]{2}|[6][5][3][0-5]{2}|[6][5][3][6][0-5])-([0-9]{1,4}|[0-5][0-9]{4}|[6][0-4][0-9]{3}|[6][5][0-2][0-9]{2}|[6][5][3][0-5]{2}|[6][5][3][6][0-5])';
+								pattern '([1-9][0-9]{0,3}|[1-5][0-9]{4}|6[0-4][0-9]{3}|65[0-4][0-9]{2}|655[0-2][0-9]|6553[0-5])-([1-9][0-9]{0,3}|[1-5][0-9]{4}|6[0-4][0-9]{3}|65[0-4][0-9]{2}|655[0-2][0-9]|6553[0-5])';
 							}
 						}
 					}
@@ -164,7 +164,7 @@ module sonic-acl {
 					case l4_dst_port_range {
 						leaf L4_DST_PORT_RANGE {
 							type string {
-								pattern '([0-9]{1,4}|[0-5][0-9]{4}|[6][0-4][0-9]{3}|[6][5][0-2][0-9]{2}|[6][5][3][0-5]{2}|[6][5][3][6][0-5])-([0-9]{1,4}|[0-5][0-9]{4}|[6][0-4][0-9]{3}|[6][5][0-2][0-9]{2}|[6][5][3][0-5]{2}|[6][5][3][6][0-5])';
+								pattern '([1-9][0-9]{0,3}|[1-5][0-9]{4}|6[0-4][0-9]{3}|65[0-4][0-9]{2}|655[0-2][0-9]|6553[0-5])-([1-9][0-9]{0,3}|[1-5][0-9]{4}|6[0-4][0-9]{3}|65[0-4][0-9]{2}|655[0-2][0-9]|6553[0-5])';
 							}
 						}
 					}
@@ -172,7 +172,7 @@ module sonic-acl {
 
 				leaf ETHER_TYPE {
 					type string {
-                                            pattern "0x0[6-9a-fA-F][0-9a-fA-F]{2}|0x[1-9a-fA-F][0-9a-fA-F]{3}|153[6-9]|15[4-9][0-9]|1[6-9][0-9][0-9]|[2-9][0-9]{3}|[1-5][0-9]{4}|6553[0-5]|655[0-2][0-9]|65[0-4][0-9]{2}|6[0-4][0-9]{3}";
+						pattern "0x0[6-9a-fA-F][0-9a-fA-F]{2}|0x[1-9a-fA-F][0-9a-fA-F]{3}|153[6-9]|15[4-9][0-9]|1[6-9][0-9][0-9]|[2-9][0-9]{3}|[1-5][0-9]{4}|6553[0-5]|655[0-2][0-9]|65[0-4][0-9]{2}|6[0-4][0-9]{3}";
 					}
 				}
 
@@ -199,7 +199,7 @@ module sonic-acl {
 				choice icmp {
 
 					case icmp4 {
-						when "not(IP_TYPE) or boolean(IP_TYPE[.='ANY' or .='IP' or .='IPV4' or .='IPv4ANY' or .='ARP'])";
+						when "not(IP_TYPE) or boolean(IP_TYPE[.='ANY' or .='IP' or .='IPV4' or .='IPv4ANY' or .='IPV4ANY' or .='ARP'])";
 						leaf ICMP_TYPE {
 							type uint8 {
 								range 0..255;
@@ -214,7 +214,7 @@ module sonic-acl {
 					}
 
 					case icmp6 {
-						when "not(IP_TYPE) or boolean(IP_TYPE[.='ANY' or .='IP' or .='IPV6' or .='IPv6ANY'])";
+						when "not(IP_TYPE) or boolean(IP_TYPE[.='ANY' or .='IP' or .='IPV6' or .='IPv6ANY' or .='IPV6ANY'])";
 						leaf ICMPV6_TYPE {
 							type uint8 {
 								range 0..255;
diff --git a/src/sonic-yang-models/yang-templates/sonic-types.yang.j2 b/src/sonic-yang-models/yang-templates/sonic-types.yang.j2
index a5de49f77..6d3d3db00 100644
--- a/src/sonic-yang-models/yang-templates/sonic-types.yang.j2
+++ b/src/sonic-yang-models/yang-templates/sonic-types.yang.j2
@@ -76,8 +76,10 @@ module sonic-types {
             enum IPV4;
             enum IPV6;
             enum IPv4ANY;
+            enum IPV4ANY;
             enum NON_IP4;
             enum IPv6ANY;
+            enum IPV6ANY;
             enum NON_IPv6;
             enum ARP;
         }

From d25c9432401e14cce498671a9fd8b7c4b9166dbe Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Wed, 24 Apr 2024 13:55:44 +0800
Subject: [PATCH 0478/1115] [ci/build]: Upgrade SONiC package versions (#18590)

[master] Upgrade SONiC package Versions
The PR is submit by automation task
---
 .../versions-deb-bookworm                     |  16 +--
 .../versions-deb-bookworm-armhf               |   2 -
 .../build-sonic-slave-bookworm/versions-py3   |   9 +-
 .../versions-py3-all-armhf                    |   5 -
 .../versions-deb-bullseye                     |  34 +++---
 .../versions-deb-bullseye-arm64               |   1 +
 .../build-sonic-slave-bullseye/versions-py3   |   9 +-
 files/build/versions/default/versions-docker  |  36 +++---
 files/build/versions/default/versions-git     |  15 ++-
 files/build/versions/default/versions-mirror  |  38 +++---
 files/build/versions/default/versions-web     |  77 ++++++------
 .../versions-deb-bookworm                     |   2 -
 .../docker-base-buster/versions-deb-buster    |   2 +-
 .../versions-deb-bookworm                     |   2 +-
 .../versions-mirror                           |   3 +-
 .../versions-py3                              |   2 +-
 .../versions-py3                              |   2 +-
 .../docker-config-engine-buster/versions-py3  |   2 +-
 .../dockers/docker-database/versions-mirror   |   3 +-
 .../dockers/docker-dhcp-relay/versions-mirror |   3 +-
 .../docker-eventd/versions-deb-bookworm       |  28 +++++
 .../docker-eventd/versions-deb-bullseye       |  25 ----
 .../dockers/docker-eventd/versions-mirror     |   1 +
 .../dockers/docker-macsec/versions-mirror     |   3 +-
 .../dockers/docker-mux/versions-mirror        |   3 +-
 .../dockers/docker-orchagent/versions-mirror  |   3 +-
 .../versions-deb-bookworm                     |  93 +++++++++++++++
 .../versions-deb-bullseye                     |  99 ----------------
 .../docker-platform-monitor/versions-mirror   |   1 +
 .../docker-platform-monitor/versions-py3      |  17 ++-
 .../dockers/docker-ptf/versions-deb-buster    |  10 +-
 .../docker-router-advertiser/versions-mirror  |   3 +-
 .../docker-sonic-mgmt-framework/versions-py3  |   2 +-
 .../dockers/docker-sonic-vs/versions-py3      |   8 +-
 .../versions-mirror                           |   3 +-
 .../docker-syncd-mlnx/versions-deb-bullseye   |  38 +++---
 .../dockers/docker-syncd-mlnx/versions-py3    |   2 +-
 .../versions-deb-bullseye-arm64               |   2 +-
 .../versions-deb-bullseye-armhf               |   2 +-
 .../dockers/docker-teamd/versions-mirror      |   3 +-
 .../versions-deb-bookworm                     | 110 ++++++++++++++----
 .../versions-deb-bookworm-arm64               |   1 +
 .../versions-deb-bookworm-armhf               |   7 +-
 .../sonic-slave-bookworm/versions-mirror      |   2 +-
 .../dockers/sonic-slave-bookworm/versions-py3 |  12 +-
 .../versions-deb-bullseye                     |  25 ++--
 .../dockers/sonic-slave-bullseye/versions-py3 |   4 +-
 .../sonic-slave-buster/versions-deb-buster    |  24 ++--
 .../dockers/sonic-slave-buster/versions-py3   |   4 +-
 .../versions/host-image/versions-deb-bookworm |  15 +--
 .../host-image/versions-deb-bookworm-arm64    |   3 +
 .../host-image/versions-deb-bookworm-armhf    |   3 +
 files/build/versions/host-image/versions-py3  |  12 +-
 .../host-image/versions-py3-all-arm64         |   1 +
 .../host-image/versions-py3-all-armhf         |   1 +
 55 files changed, 443 insertions(+), 390 deletions(-)
 delete mode 100644 files/build/versions/build/build-sonic-slave-bookworm/versions-py3-all-armhf
 create mode 100644 files/build/versions/build/build-sonic-slave-bullseye/versions-deb-bullseye-arm64
 create mode 100644 files/build/versions/dockers/docker-eventd/versions-deb-bookworm
 delete mode 100644 files/build/versions/dockers/docker-eventd/versions-deb-bullseye
 create mode 100644 files/build/versions/dockers/docker-eventd/versions-mirror
 create mode 100644 files/build/versions/dockers/docker-platform-monitor/versions-deb-bookworm
 delete mode 100644 files/build/versions/dockers/docker-platform-monitor/versions-deb-bullseye
 create mode 100644 files/build/versions/dockers/docker-platform-monitor/versions-mirror
 create mode 100644 files/build/versions/host-image/versions-py3-all-arm64

diff --git a/files/build/versions/build/build-sonic-slave-bookworm/versions-deb-bookworm b/files/build/versions/build/build-sonic-slave-bookworm/versions-deb-bookworm
index e3e4626ea..36978b689 100644
--- a/files/build/versions/build/build-sonic-slave-bookworm/versions-deb-bookworm
+++ b/files/build/versions/build/build-sonic-slave-bookworm/versions-deb-bookworm
@@ -1,6 +1,7 @@
-applibs==1.mlnx.4.6.2202
+applibs==1.mlnx.4.6.3064
 kernel-mft-dkms==4.27.0-83
 libdashapi==1.0.0
+libnl-3-200==3.5.0-1
 libnl-3-dev==3.5.0-1
 libnl-cli-3-200==3.5.0-1
 libnl-cli-3-dev==3.5.0-1
@@ -8,6 +9,7 @@ libnl-genl-3-200==3.5.0-1
 libnl-genl-3-dev==3.5.0-1
 libnl-nf-3-200==3.5.0-1
 libnl-nf-3-dev==3.5.0-1
+libnl-route-3-200==3.5.0-1
 libnl-route-3-dev==3.5.0-1
 libsaimetadata==1.0.0
 libsaimetadata-dev==1.0.0
@@ -33,9 +35,9 @@ python3-swsscommon==1.0.0
 python3-yang==1.0.73
 sonic-platform-pddf==1.1
 sonic-platform-pddf-sym==1.1
-sx-complib==1.mlnx.4.6.2202
-sx-complib-dev==1.mlnx.4.6.2202
-sx-gen-utils==1.mlnx.4.6.2202
-sx-gen-utils-dev==1.mlnx.4.6.2202
-sxd-libs==1.mlnx.4.6.2202
-sxd-libs-dev==1.mlnx.4.6.2202
+sx-complib==1.mlnx.4.6.3064
+sx-complib-dev==1.mlnx.4.6.3064
+sx-gen-utils==1.mlnx.4.6.3064
+sx-gen-utils-dev==1.mlnx.4.6.3064
+sxd-libs==1.mlnx.4.6.3064
+sxd-libs-dev==1.mlnx.4.6.3064
diff --git a/files/build/versions/build/build-sonic-slave-bookworm/versions-deb-bookworm-armhf b/files/build/versions/build/build-sonic-slave-bookworm/versions-deb-bookworm-armhf
index 247d032a3..9096b1dd6 100644
--- a/files/build/versions/build/build-sonic-slave-bookworm/versions-deb-bookworm-armhf
+++ b/files/build/versions/build/build-sonic-slave-bookworm/versions-deb-bookworm-armhf
@@ -1,3 +1 @@
-libnl-3-200==3.5.0-1
-libnl-route-3-200==3.5.0-1
 linux-headers-6.1.0-11-2-armmp==6.1.38-4
diff --git a/files/build/versions/build/build-sonic-slave-bookworm/versions-py3 b/files/build/versions/build/build-sonic-slave-bookworm/versions-py3
index d9fff43be..31d944ddd 100644
--- a/files/build/versions/build/build-sonic-slave-bookworm/versions-py3
+++ b/files/build/versions/build/build-sonic-slave-bookworm/versions-py3
@@ -1,12 +1,14 @@
+bitarray==2.8.1
 blessed==1.20.0
 cffi==1.16.0
+click==7.0
 click-log==0.4.0
 colorful==0.5.6
 deepdiff==6.2.2
 docker==7.0.0
 docker-image-py==0.1.12
 enlighten==1.12.4
-filelock==3.13.3
+filelock==3.13.4
 freezegun==1.4.0
 ijson==3.2.3
 ipaddress==1.0.23
@@ -14,13 +16,14 @@ jsondiff==2.0.0
 jsonpatch==1.33
 jsonpointer==2.4
 jsonschema==2.6.0
+lxml==4.9.1
 natsort==6.2.1
 netaddr==0.8.0
 netifaces==0.11.0
 ordered-set==4.1.0
 paramiko==2.11.0
 pexpect==4.9.0
-prefixed==0.7.0
+prefixed==0.7.1
 prettyprinter==0.18.0
 psutil==5.9.8
 ptyprocess==0.7.0
@@ -28,10 +31,12 @@ pycairo==1.26.0
 pycparser==2.22
 pynacl==1.5.0
 pyroute2==0.5.19
+pyyaml==6.0.1
 semantic-version==2.10.0
 systemd-python==235
 tabulate==0.9.0
 toposort==1.6
+urllib3==2.2.1
 wcwidth==0.2.13
 www-authenticate==0.9.2
 xmltodict==0.12.0
diff --git a/files/build/versions/build/build-sonic-slave-bookworm/versions-py3-all-armhf b/files/build/versions/build/build-sonic-slave-bookworm/versions-py3-all-armhf
deleted file mode 100644
index f766c98db..000000000
--- a/files/build/versions/build/build-sonic-slave-bookworm/versions-py3-all-armhf
+++ /dev/null
@@ -1,5 +0,0 @@
-bitarray==2.8.1
-click==7.0
-lxml==4.9.1
-pyyaml==6.0.1
-urllib3==2.2.1
diff --git a/files/build/versions/build/build-sonic-slave-bullseye/versions-deb-bullseye b/files/build/versions/build/build-sonic-slave-bullseye/versions-deb-bullseye
index bc64b529a..50350dd3e 100644
--- a/files/build/versions/build/build-sonic-slave-bullseye/versions-deb-bullseye
+++ b/files/build/versions/build/build-sonic-slave-bullseye/versions-deb-bullseye
@@ -1,5 +1,5 @@
-applibs==1.mlnx.4.6.2202
-applibs-dev==1.mlnx.4.6.2202
+applibs==1.mlnx.4.6.3064
+applibs-dev==1.mlnx.4.6.3064
 libdashapi==1.0.0
 libnl-3-200==3.5.0-1
 libnl-3-dev==3.5.0-1
@@ -40,19 +40,19 @@ python3-swsscommon==1.0.0
 python3-yang==1.0.73
 sonic-mgmt-common==1.0.0
 sonic-mgmt-common-codegen==1.0.0
-sx-acl-helper==1.mlnx.4.6.2202
-sx-acl-helper-dev==1.mlnx.4.6.2202
-sx-complib==1.mlnx.4.6.2202
-sx-complib-dev==1.mlnx.4.6.2202
-sx-examples==1.mlnx.4.6.2202
-sx-examples-dev==1.mlnx.4.6.2202
-sx-gen-utils==1.mlnx.4.6.2202
-sx-gen-utils-dev==1.mlnx.4.6.2202
-sx-hash-calc==1.mlnx.4.6.2202
-sx-obj-desc-lib==1.mlnx.4.6.2202
-sx-obj-desc-lib-dev==1.mlnx.4.6.2202
-sxd-libs==1.mlnx.4.6.2202
-sxd-libs-dev==1.mlnx.4.6.2202
+sx-acl-helper==1.mlnx.4.6.3064
+sx-acl-helper-dev==1.mlnx.4.6.3064
+sx-complib==1.mlnx.4.6.3064
+sx-complib-dev==1.mlnx.4.6.3064
+sx-examples==1.mlnx.4.6.3064
+sx-examples-dev==1.mlnx.4.6.3064
+sx-gen-utils==1.mlnx.4.6.3064
+sx-gen-utils-dev==1.mlnx.4.6.3064
+sx-hash-calc==1.mlnx.4.6.3064
+sx-obj-desc-lib==1.mlnx.4.6.3064
+sx-obj-desc-lib-dev==1.mlnx.4.6.3064
+sxd-libs==1.mlnx.4.6.3064
+sxd-libs-dev==1.mlnx.4.6.3064
 thrift-compiler==0.11.0-4
-wjh-libs==1.mlnx.4.6.2202
-wjh-libs-dev==1.mlnx.4.6.2202
+wjh-libs==1.mlnx.4.6.3064
+wjh-libs-dev==1.mlnx.4.6.3064
diff --git a/files/build/versions/build/build-sonic-slave-bullseye/versions-deb-bullseye-arm64 b/files/build/versions/build/build-sonic-slave-bullseye/versions-deb-bullseye-arm64
new file mode 100644
index 000000000..f49254536
--- /dev/null
+++ b/files/build/versions/build/build-sonic-slave-bullseye/versions-deb-bullseye-arm64
@@ -0,0 +1 @@
+libsaivs-dev==1.0.0
diff --git a/files/build/versions/build/build-sonic-slave-bullseye/versions-py3 b/files/build/versions/build/build-sonic-slave-bullseye/versions-py3
index ecfaa45c5..5f7fde14a 100644
--- a/files/build/versions/build/build-sonic-slave-bullseye/versions-py3
+++ b/files/build/versions/build/build-sonic-slave-bullseye/versions-py3
@@ -1,26 +1,23 @@
-bcrypt==3.2.2
 bitarray==2.8.1
 blessed==1.20.0
 cffi==1.16.0
 charset-normalizer==3.3.2
-click==7.0
 click-log==0.4.0
 colorful==0.5.6
 docker==7.0.0
 docker-image-py==0.1.12
 enlighten==1.12.4
-filelock==3.13.3
+filelock==3.13.4
 ijson==3.2.3
 ipaddress==1.0.23
 jsondiff==2.0.0
 jsonpatch==1.33
 jsonpointer==2.4
-jsonschema==2.6.0
 natsort==6.2.1
 netaddr==0.8.0
 netifaces==0.11.0
 paramiko==2.11.0
-prefixed==0.7.0
+prefixed==0.7.1
 prettyprinter==0.18.0
 psutil==5.9.8
 pycairo==1.26.0
@@ -29,12 +26,10 @@ pynacl==1.5.0
 pyroute2==0.5.19
 python-arptable==0.0.2
 pyyaml==6.0.1
-requests==2.31.0
 semantic-version==2.10.0
 systemd-python==235
 tabulate==0.9.0
 toposort==1.6
-urllib3==2.2.1
 wcwidth==0.2.13
 www-authenticate==0.9.2
 xmltodict==0.12.0
diff --git a/files/build/versions/default/versions-docker b/files/build/versions/default/versions-docker
index 6a0a8332a..d13a537ee 100644
--- a/files/build/versions/default/versions-docker
+++ b/files/build/versions/default/versions-docker
@@ -1,18 +1,18 @@
-amd64:amd64/debian:bookworm==sha256:c2cedd7f80a4dd0f9f80d3699bd433ccf3de33ab63bfa2d4c4ba870c998222d6
-amd64:amd64/debian:bullseye==sha256:90afe482786743f51e30f5fe673b71d787d34242f9f3b68755b1eb9c7c901f8e
-amd64:amd64/debian:buster==sha256:c6296b63c2ec4c500d6386660beedb1783f162c3c1a681ae93fef28f39b8f2a4
-amd64:debian:bookworm==sha256:e97ee92bf1e11a2de654e9f3da827d8dce32b54e0490ac83bfc65c8706568116
-amd64:debian:bullseye==sha256:5a87974e73c64b3fb161d444a84bdd47c0e6b6058eacaeea64342e7cbce1f04d
-amd64:debian:buster==sha256:f6b3b7c7b049c2c7d0f19ae988b4eac64fd8e127fa891c9de1d3cf3f8c33cad4
-arm64:arm64v8/debian:bookworm==sha256:6fc9b50711023adfca7c7b4236948e120d1332ff01bf46c93e5b64ca0830a81a
-arm64:arm64v8/debian:bullseye==sha256:64f4252c791692432233602d3a3dea4453a57ea268dc397e96bdac828d08df28
-arm64:arm64v8/debian:buster==sha256:f6f84d5d8145c7b86e09bbed0ffa3486cccff7c993e91803a462245fc68c28b2
-arm64:debian:bookworm==sha256:e97ee92bf1e11a2de654e9f3da827d8dce32b54e0490ac83bfc65c8706568116
-arm64:debian:bullseye==sha256:5a87974e73c64b3fb161d444a84bdd47c0e6b6058eacaeea64342e7cbce1f04d
-arm64:debian:buster==sha256:f6b3b7c7b049c2c7d0f19ae988b4eac64fd8e127fa891c9de1d3cf3f8c33cad4
-armhf:arm32v7/debian:bookworm==sha256:1129497179f83b39970c5e03e6341e6be3d2e6997e521f57b814522920f01c73
-armhf:arm32v7/debian:bullseye==sha256:9f73ebca334a142cd23aec641d2051f3a60783eb7dc7c2037d1bd676ebd2c8f8
-armhf:arm32v7/debian:buster==sha256:1f61a6065e5ba6bb38a94607a16c219d6fbd9f97711886d42e4cdf5ae008d0e5
-armhf:debian:bookworm==sha256:e97ee92bf1e11a2de654e9f3da827d8dce32b54e0490ac83bfc65c8706568116
-armhf:debian:bullseye==sha256:5a87974e73c64b3fb161d444a84bdd47c0e6b6058eacaeea64342e7cbce1f04d
-armhf:debian:buster==sha256:f6b3b7c7b049c2c7d0f19ae988b4eac64fd8e127fa891c9de1d3cf3f8c33cad4
+amd64:amd64/debian:bookworm==sha256:ada577e24663e2f16bd2aa706bd11d4594f52b9ae08fd3a2156eeefdb8dff1a2
+amd64:amd64/debian:bullseye==sha256:ad47d883924a75f704037e49c71c20ef209fb3ba05be7070322cb45d2e089261
+amd64:amd64/debian:buster==sha256:354013bcb050b68661b9d6038faa63a6bb9f52f559058e31fa6121f6b24e0be1
+amd64:debian:bookworm==sha256:b37bc259c67238d814516548c17ad912f26c3eed48dd9bb54893eafec8739c89
+amd64:debian:bullseye==sha256:26d72b71f88865377988af6f54da9aaa5bed201f39bcee13eb55737016660df2
+amd64:debian:buster==sha256:873743c4eec09ddea0dcac0cda31fce2ff348ed41cd1d5c33ecee7d42f03052f
+arm64:arm64v8/debian:bookworm==sha256:e27b218f4fbed3b1b2769805708bf8c4cb7992287e801c8a38821d8765d02880
+arm64:arm64v8/debian:bullseye==sha256:2e5a4906b6d9aaea56dc705dff91d16b092f3b0d504869f8c66cb5223dfff7c7
+arm64:arm64v8/debian:buster==sha256:5e790baa2535371cf5309af22f2b721bde93bdfa22d9d2121e3ab0ac949a702f
+arm64:debian:bookworm==sha256:b37bc259c67238d814516548c17ad912f26c3eed48dd9bb54893eafec8739c89
+arm64:debian:bullseye==sha256:26d72b71f88865377988af6f54da9aaa5bed201f39bcee13eb55737016660df2
+arm64:debian:buster==sha256:873743c4eec09ddea0dcac0cda31fce2ff348ed41cd1d5c33ecee7d42f03052f
+armhf:arm32v7/debian:bookworm==sha256:72f95924eb348f8dcd1f01a5888ac50a126aa63009dc7705abaeeda2e18f04ea
+armhf:arm32v7/debian:bullseye==sha256:55034733fd35fc50c600430a0e6e59f7fe7c46b2b6630274befe3c631e015968
+armhf:arm32v7/debian:buster==sha256:25da76aea696384d64882d7cb3762ab38e427e868aab9e2efdef25321b923101
+armhf:debian:bookworm==sha256:b37bc259c67238d814516548c17ad912f26c3eed48dd9bb54893eafec8739c89
+armhf:debian:bullseye==sha256:26d72b71f88865377988af6f54da9aaa5bed201f39bcee13eb55737016660df2
+armhf:debian:buster==sha256:873743c4eec09ddea0dcac0cda31fce2ff348ed41cd1d5c33ecee7d42f03052f
diff --git a/files/build/versions/default/versions-git b/files/build/versions/default/versions-git
index 7b7c196e5..6be317c50 100644
--- a/files/build/versions/default/versions-git
+++ b/files/build/versions/default/versions-git
@@ -1,20 +1,19 @@
-https://chromium.googlesource.com/chromium/tools/depot_tools.git==90d54ff344a0e8188214058614b5bab46db5bf0e
+https://chromium.googlesource.com/chromium/tools/depot_tools.git==6ba67afd6fb7718743af91b847ddf1907f3ee9a6
 https://github.com/aristanetworks/swi-tools.git==b5f087e4774168bf536360d43c9c509c8f14ad9f
-https://github.com/CESNET/libyang.git==fc4dbd923e044006c93df020590a1e5a8656c09e
+https://github.com/CESNET/libyang.git==4c733412e7173219166be7053940326a92699765
 https://github.com/daveolson53/audisp-tacplus.git==559c9f22edd4f2dea0ecedffb3ad9502b12a75b6
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-https://github.com/FreeRADIUS/pam_radius.git==53c0cfff686ab48ae3bac5449d5461b6e1b83d27
+https://github.com/flashrom/flashrom.git==e5ed0c6340961594dcf1a22f9907d91d576b4885
+https://github.com/FreeRADIUS/freeradius-server.git==a3d5f7f5173f562b53b6da564806fadb97fb3cef
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 https://github.com/jeroennijhof/pam_tacplus.git==b839c440e33c36eced9dcbc287fcfe6237c4c4ce
 https://github.com/lguohan/gnxi.git==3adf8b97755b49947e465b5a14645f11e79fa0cd
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-https://github.com/p4lang/ptf.git==e8b545f3f281fc509c7bdd6c8a4f55bc829149e7
+https://github.com/p4lang/ptf.git==c554f83685186be4cfa9387eb5d6d700d2bbd7c0
 https://github.com/p4lang/scapy-vxlan.git==85ffe83da156568ee47a0750f638227e6e1d7479
-https://github.com/sflow/host-sflow==f2cd42fae58bbf76a067ad8b12a07ca37e1f786b
+https://github.com/sflow/host-sflow==0224201ebb6dd47e1dd9ab1f68f8cf2950ea4591
 https://github.com/sflow/sflowtool==c42c49cb80b927a4c02e54fc26430417f18f4833
 https://github.com/thom311/libnl==19d48b0fe924085f28c9410fae448d385f5f9a23
 https://salsa.debian.org/kernel-team/initramfs-tools.git==cf964bfb4362019fd7fba1e839e403ff950dca8e
diff --git a/files/build/versions/default/versions-mirror b/files/build/versions/default/versions-mirror
index 735e459b1..279756087 100644
--- a/files/build/versions/default/versions-mirror
+++ b/files/build/versions/default/versions-mirror
@@ -1,23 +1,23 @@
-deb.debian.org_debian-security_dists_bookworm-security==2024-04-04T18:53:21Z
+deb.debian.org_debian-security_dists_bookworm-security==2024-04-19T19:43:00Z
 deb.debian.org_debian_dists_bookworm==2024-02-10T11:07:25Z
-deb.debian.org_debian_dists_bookworm-updates==2024-04-04T14:12:26Z
+deb.debian.org_debian_dists_bookworm-updates==2024-04-19T20:17:02Z
 deb.nodesource.com_node%5f14.x_dists_bookworm==2023-02-17T00:35:29Z
 deb.nodesource.com_node%5f14.x_dists_bullseye==2023-02-17T00:35:28Z
 deb.nodesource.com_node%5f14.x_dists_buster==2023-02-17T00:35:28Z
-debian==20240404T000223Z
-debian-security==20240404T000228Z
-download.docker.com_linux_debian_dists_bookworm==2024-03-22T10:38:47Z
-download.docker.com_linux_debian_dists_bullseye==2024-03-22T10:38:47Z
-download.docker.com_linux_debian_dists_buster==2024-03-20T18:01:13Z
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-packages.trafficmanager.net_snapshot_debian-security_20240404T000228Z_dists_bullseye-security==2024-04-03T19:14:43Z
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-packages.trafficmanager.net_snapshot_debian_20240404T000223Z_dists_bookworm-backports==2024-04-03T20:13:52Z
-packages.trafficmanager.net_snapshot_debian_20240404T000223Z_dists_bookworm-updates==2024-04-03T20:13:52Z
-packages.trafficmanager.net_snapshot_debian_20240404T000223Z_dists_bullseye==2024-02-10T12:40:37Z
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-packages.trafficmanager.net_snapshot_debian_20240404T000223Z_dists_bullseye-updates==2024-04-03T20:13:53Z
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-packages.trafficmanager.net_snapshot_debian_20240404T000223Z_dists_buster-updates==2023-06-10T08:55:10Z
+debian==20240419T000606Z
+debian-security==20240419T000427Z
+download.docker.com_linux_debian_dists_bookworm==2024-04-18T19:25:14Z
+download.docker.com_linux_debian_dists_bullseye==2024-04-18T19:25:15Z
+download.docker.com_linux_debian_dists_buster==2024-04-18T19:25:15Z
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+packages.trafficmanager.net_snapshot_debian-security_20240419T000427Z_dists_bullseye-security==2024-04-17T21:43:25Z
+packages.trafficmanager.net_snapshot_debian-security_20240419T000427Z_dists_buster_updates==2024-04-17T21:43:25Z
+packages.trafficmanager.net_snapshot_debian_20240419T000606Z_dists_bookworm==2024-02-10T11:07:25Z
+packages.trafficmanager.net_snapshot_debian_20240419T000606Z_dists_bookworm-backports==2024-04-18T20:13:31Z
+packages.trafficmanager.net_snapshot_debian_20240419T000606Z_dists_bookworm-updates==2024-04-18T20:13:31Z
+packages.trafficmanager.net_snapshot_debian_20240419T000606Z_dists_bullseye==2024-02-10T12:40:37Z
+packages.trafficmanager.net_snapshot_debian_20240419T000606Z_dists_bullseye-backports==2024-04-18T20:13:31Z
+packages.trafficmanager.net_snapshot_debian_20240419T000606Z_dists_bullseye-updates==2024-04-18T20:13:31Z
+packages.trafficmanager.net_snapshot_debian_20240419T000606Z_dists_buster==2023-06-10T08:53:33Z
+packages.trafficmanager.net_snapshot_debian_20240419T000606Z_dists_buster-backports==2024-03-09T20:54:54Z
+packages.trafficmanager.net_snapshot_debian_20240419T000606Z_dists_buster-updates==2023-06-10T08:55:10Z
diff --git a/files/build/versions/default/versions-web b/files/build/versions/default/versions-web
index 67cf4cd99..87e523f2b 100644
--- a/files/build/versions/default/versions-web
+++ b/files/build/versions/default/versions-web
@@ -10,14 +10,14 @@ http://deb.debian.org/debian/pool/main/i/isc-dhcp/isc-dhcp_4.4.3-P1-2.debian.tar
 http://deb.debian.org/debian/pool/main/i/isc-dhcp/isc-dhcp_4.4.3-P1-2.dsc==9f39c78ebbf7d66194de179dc12de49e
 http://deb.debian.org/debian/pool/main/i/isc-dhcp/isc-dhcp_4.4.3-P1.orig.tar.gz==36c6ca77212373b0cff478ae9e5d32af
 http://deb.debian.org/debian/pool/main/i/isc-dhcp/isc-dhcp_4.4.3-P1.orig.tar.gz.asc==6db320501d5766198bc2da9515c62bbb
-http://deb.debian.org/debian/pool/main/l/lm-sensors/lm-sensors_3.6.0-7.debian.tar.xz==8eab143a53c71c03695ebc78e4b5ed36
-http://deb.debian.org/debian/pool/main/l/lm-sensors/lm-sensors_3.6.0-7.dsc==983d68fb43001bb2fc94862bc4bc2e2b
+http://deb.debian.org/debian/pool/main/l/lm-sensors/lm-sensors_3.6.0-7.1.debian.tar.xz==2dfa6e22972d0af32fd7afe99734a304
+http://deb.debian.org/debian/pool/main/l/lm-sensors/lm-sensors_3.6.0-7.1.dsc==efbde3517ddc5ac129532871651444af
 http://deb.debian.org/debian/pool/main/l/lm-sensors/lm-sensors_3.6.0.orig.tar.gz==f60e47b5eb50bbeed48a9f43bb08dd5e
 http://deb.debian.org/debian/pool/main/p/protobuf/protobuf_3.21.12-3.debian.tar.xz==f457e44218a7d4cc7b7ab0ed696096e3
 http://deb.debian.org/debian/pool/main/p/protobuf/protobuf_3.21.12-3.dsc==d8e34e7b07473c6903f9d245934524fb
 http://deb.debian.org/debian/pool/main/p/protobuf/protobuf_3.21.12.orig.tar.gz==d38562490234d8080bdbe8eb7baf937a
 http://ftp.us.debian.org/debian/pool/main/s/scapy/python3-scapy_2.4.0-2_all.deb==b8717ca83b3b60da54bc3f72018964a7
-http://www.iana.org/assignments/enterprise-numbers.txt==6337b3342894343f8d43f229c5bca8c1
+http://www.iana.org/assignments/enterprise-numbers.txt==76c0dcc9f445729894dd54827a91ad38
 http://www.mellanox.com/downloads/MFT/mft-4.27.0-83-x86_64-deb.tgz==e475ca87a9252ba8d0abb6b05d5d94d0
 https://archive.apache.org/dist/thrift/0.14.1/thrift-0.14.1.tar.gz==c64434548438df2cb1e53fb27c600e85
 https://bootstrap.pypa.io/pip/2.7/get-pip.py==60e8267eb1b7bc71dc4843eb7bd294d3
@@ -45,48 +45,47 @@ https://github.com/CentecNetworks/sonic-binaries/raw/master/amd64/third_party/ad
 https://github.com/CentecNetworks/sonic-binaries/raw/master/arm64/sai/libsaictc-dev_1.13.0-1_arm64.deb==1162131e154bba573bf7502d743f1d81
 https://github.com/CentecNetworks/sonic-binaries/raw/master/arm64/sai/libsaictc_1.13.0-1_arm64.deb==b8b25694a1dc9b4d8dffc2f2c04ddaed
 https://github.com/CumulusNetworks/ifupdown2/archive/3.0.0-1.tar.gz==755459b3a58fbc11625336846cea7420
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-https://github.com/Marvell-switching/sonic-marvell-binaries/raw/master/armhf/sai-plugin/mrvllibsai_1.13.0-1_armhf.deb==264acf1919d544ed64e53f0af2215a6b
-https://github.com/Mellanox/Spectrum-SDK-Drivers-SONiC-Bins/releases/download/fw-2012.2202/fw-SPC-rel-13_2012_2202-EVB.mfa==a77569575da124cdcee7d9b4f09dc5f2
-https://github.com/Mellanox/Spectrum-SDK-Drivers-SONiC-Bins/releases/download/fw-2012.2202/fw-SPC2-rel-29_2012_2202-EVB.mfa==5b1138d4f422eebfdabb17ef15dd9d4b
-https://github.com/Mellanox/Spectrum-SDK-Drivers-SONiC-Bins/releases/download/fw-2012.2202/fw-SPC3-rel-30_2012_2202-EVB.mfa==006291d10adf09b230ee20317b984379
-https://github.com/Mellanox/Spectrum-SDK-Drivers-SONiC-Bins/releases/download/fw-2012.2202/fw-SPC4-rel-34_2012_2202-EVB.mfa==99205ae3ecd7f7bab2fd2e5657abd974
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-https://github.com/Mellanox/Spectrum-SDK-Drivers-SONiC-Bins/releases/download/sdk-4.6.2202-bullseye-amd64/sx-hash-calc_1.mlnx.4.6.2202_amd64.deb==d997b3a9adfa0fa5aef34414d4bc94c9
-https://github.com/Mellanox/Spectrum-SDK-Drivers-SONiC-Bins/releases/download/sdk-4.6.2202-bullseye-amd64/sx-obj-desc-lib-dev_1.mlnx.4.6.2202_amd64.deb==c61007a50d203f0d08cd905909255ef7
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-https://raw.githubusercontent.com/p4lang/ptf/master/ptf_nn/ptf_nn_agent.py==963c345c75fe5c5bdedc05ed98a5fd1f
+https://raw.githubusercontent.com/p4lang/ptf/master/ptf_nn/ptf_nn_agent.py==b16e05ede6aed78f7abadae1185f487d
 https://repo1.maven.org/maven2/org/openapitools/openapi-generator-cli/4.2.3/openapi-generator-cli-4.2.3.jar==cda48eb414c8b4585e280c3fb2656e24
 https://sonicstorage.blob.core.windows.net/debian-security/pool/updates/main/l/linux/linux_6.1.38-4.debian.tar.xz==c8f198a6081fd0986cfb4e602991d8e6
 https://sonicstorage.blob.core.windows.net/debian-security/pool/updates/main/l/linux/linux_6.1.38-4.dsc==963b0628e1019bcdefaac537de9c3505
diff --git a/files/build/versions/dockers/docker-base-bookworm/versions-deb-bookworm b/files/build/versions/dockers/docker-base-bookworm/versions-deb-bookworm
index 6001510d7..d0c554ae9 100644
--- a/files/build/versions/dockers/docker-base-bookworm/versions-deb-bookworm
+++ b/files/build/versions/dockers/docker-base-bookworm/versions-deb-bookworm
@@ -7,8 +7,6 @@ libatomic1==12.2.0-14
 libbpf1==1:1.1.0-1
 libbrotli1==1.0.9-2+b6
 libbsd0==0.11.7-2
-libc-bin==2.36-9+deb12u4
-libc6==2.36-9+deb12u4
 libcap2-bin==1:2.66-4
 libcurl4==7.88.1-10+deb12u5
 libdaemon0==0.14-7.1
diff --git a/files/build/versions/dockers/docker-base-buster/versions-deb-buster b/files/build/versions/dockers/docker-base-buster/versions-deb-buster
index 7ecdb0a85..0f0a68887 100644
--- a/files/build/versions/dockers/docker-base-buster/versions-deb-buster
+++ b/files/build/versions/dockers/docker-base-buster/versions-deb-buster
@@ -7,7 +7,7 @@ libcurl4==7.64.0-4+deb10u9
 libdaemon0==0.14-7
 libdbus-1-3==1.12.28-0+deb10u1
 libestr0==0.1.10-2.1
-libexpat1==2.2.6-2+deb10u6
+libexpat1==2.2.6-2+deb10u7
 libfastjson4==0.99.8-2+deb10u1
 libgdbm-compat4==1.18.1-4
 libgdbm6==1.18.1-4
diff --git a/files/build/versions/dockers/docker-config-engine-bookworm/versions-deb-bookworm b/files/build/versions/dockers/docker-config-engine-bookworm/versions-deb-bookworm
index dd20b082d..6e642a04e 100644
--- a/files/build/versions/dockers/docker-config-engine-bookworm/versions-deb-bookworm
+++ b/files/build/versions/dockers/docker-config-engine-bookworm/versions-deb-bookworm
@@ -27,7 +27,7 @@ libxslt1.1==1.1.35-1
 libyaml-0-2==0.2.5-1
 libyang==1.0.73
 libyang-cpp==1.0.73
-linux-libc-dev==6.1.76-1
+linux-libc-dev==6.1.85-1
 python3-swsscommon==1.0.0
 python3-yaml==6.0-3+b2
 python3-yang==1.0.73
diff --git a/files/build/versions/dockers/docker-config-engine-bookworm/versions-mirror b/files/build/versions/dockers/docker-config-engine-bookworm/versions-mirror
index 8d5ca2a61..18bbd1153 100644
--- a/files/build/versions/dockers/docker-config-engine-bookworm/versions-mirror
+++ b/files/build/versions/dockers/docker-config-engine-bookworm/versions-mirror
@@ -1,2 +1 @@
-deb.debian.org_debian-security_dists_bookworm-security==2024-04-04T18:53:21Z
-deb.debian.org_debian_dists_bookworm-updates==2024-04-04T20:12:41Z
+deb.debian.org_debian_dists_bookworm-updates==2024-04-20T02:13:22Z
diff --git a/files/build/versions/dockers/docker-config-engine-bookworm/versions-py3 b/files/build/versions/dockers/docker-config-engine-bookworm/versions-py3
index cf2c53992..becec22b4 100644
--- a/files/build/versions/dockers/docker-config-engine-bookworm/versions-py3
+++ b/files/build/versions/dockers/docker-config-engine-bookworm/versions-py3
@@ -10,7 +10,7 @@ pyangbind==0.8.2
 pyyaml==6.0.1
 redis==5.0.1
 redis-dump-load==1.1
-regex==2023.12.25
+regex==2024.4.16
 six==1.16.0
 tabulate==0.9.0
 xmltodict==0.12.0
diff --git a/files/build/versions/dockers/docker-config-engine-bullseye/versions-py3 b/files/build/versions/dockers/docker-config-engine-bullseye/versions-py3
index 57643d054..e468cb043 100644
--- a/files/build/versions/dockers/docker-config-engine-bullseye/versions-py3
+++ b/files/build/versions/dockers/docker-config-engine-bullseye/versions-py3
@@ -10,7 +10,7 @@ pyangbind==0.8.1
 pyyaml==6.0.1
 redis==4.5.4
 redis-dump-load==1.1
-regex==2023.12.25
+regex==2024.4.16
 six==1.16.0
 tabulate==0.9.0
 xmltodict==0.12.0
diff --git a/files/build/versions/dockers/docker-config-engine-buster/versions-py3 b/files/build/versions/dockers/docker-config-engine-buster/versions-py3
index bef6bce2d..ea84e6e1f 100644
--- a/files/build/versions/dockers/docker-config-engine-buster/versions-py3
+++ b/files/build/versions/dockers/docker-config-engine-buster/versions-py3
@@ -12,7 +12,7 @@ pyangbind==0.8.1
 pyyaml==6.0.1
 redis==4.5.4
 redis-dump-load==1.1
-regex==2023.12.25
+regex==2024.4.16
 six==1.16.0
 tabulate==0.9.0
 typing_extensions==4.7.1
diff --git a/files/build/versions/dockers/docker-database/versions-mirror b/files/build/versions/dockers/docker-database/versions-mirror
index 8d5ca2a61..18bbd1153 100644
--- a/files/build/versions/dockers/docker-database/versions-mirror
+++ b/files/build/versions/dockers/docker-database/versions-mirror
@@ -1,2 +1 @@
-deb.debian.org_debian-security_dists_bookworm-security==2024-04-04T18:53:21Z
-deb.debian.org_debian_dists_bookworm-updates==2024-04-04T20:12:41Z
+deb.debian.org_debian_dists_bookworm-updates==2024-04-20T02:13:22Z
diff --git a/files/build/versions/dockers/docker-dhcp-relay/versions-mirror b/files/build/versions/dockers/docker-dhcp-relay/versions-mirror
index 8d5ca2a61..18bbd1153 100644
--- a/files/build/versions/dockers/docker-dhcp-relay/versions-mirror
+++ b/files/build/versions/dockers/docker-dhcp-relay/versions-mirror
@@ -1,2 +1 @@
-deb.debian.org_debian-security_dists_bookworm-security==2024-04-04T18:53:21Z
-deb.debian.org_debian_dists_bookworm-updates==2024-04-04T20:12:41Z
+deb.debian.org_debian_dists_bookworm-updates==2024-04-20T02:13:22Z
diff --git a/files/build/versions/dockers/docker-eventd/versions-deb-bookworm b/files/build/versions/dockers/docker-eventd/versions-deb-bookworm
new file mode 100644
index 000000000..bb687701b
--- /dev/null
+++ b/files/build/versions/dockers/docker-eventd/versions-deb-bookworm
@@ -0,0 +1,28 @@
+gdb==13.1-3
+gdbserver==13.1-3
+libbabeltrace1==1.5.11-1+b2
+libboost-regex1.74.0==1.74.0+ds1-21
+libcbor0.8==0.8.0-2+b1
+libcurl3-gnutls==7.88.1-10+deb12u5
+libdebuginfod-common==0.188-2.1
+libdebuginfod1==0.188-2.1
+libdw1==0.188-2.1
+libedit2==3.1-20221030-2
+libfido2-1==1.12.0-2+b1
+libglib2.0-0==2.74.6-2
+libgpm2==1.20.7-10+b1
+libicu72==72.1-3
+libipt2==2.0.5-1
+libmpfr6==4.2.0-1
+libsource-highlight-common==3.1.9-4.2
+libsource-highlight4v5==3.1.9-4.2+b3
+libswsscommon-dbgsym==1.0.0
+libunwind8==1.6.2-3
+openssh-client==1:9.2p1-2+deb12u2
+sensible-utils==0.0.17+nmu1
+sonic-eventd-dbgsym==1.0.0-0
+sshpass==1.09-1+b1
+strace==6.1-0.1
+ucf==3.0043+nmu1
+vim==2:9.0.1378-2
+vim-runtime==2:9.0.1378-2
diff --git a/files/build/versions/dockers/docker-eventd/versions-deb-bullseye b/files/build/versions/dockers/docker-eventd/versions-deb-bullseye
deleted file mode 100644
index eb7f7e9c5..000000000
--- a/files/build/versions/dockers/docker-eventd/versions-deb-bullseye
+++ /dev/null
@@ -1,25 +0,0 @@
-gdb==10.1-1.7
-gdbserver==10.1-1.7
-libbabeltrace1==1.5.8-1+b3
-libboost-regex1.74.0==1.74.0-9
-libcbor0==0.5.0+dfsg-2
-libcurl3-gnutls==7.74.0-1.3+deb11u11
-libdebuginfod1==0.183-1
-libdw1==0.183-1
-libedit2==3.1-20191231-2+b1
-libfido2-1==1.6.0-2
-libglib2.0-0==2.66.8-1+deb11u1
-libgpm2==1.20.7-8
-libicu67==67.1-7
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-libmpfr6==4.1.0-3
-libsource-highlight-common==3.1.9-3
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-libswsscommon-dbgsym==1.0.0
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-openssh-client==1:8.4p1-5+deb11u3
-sonic-eventd-dbgsym==1.0.0-0
-sshpass==1.09-1+b1
-strace==5.10-1
-vim==2:8.2.2434-3+deb11u1
-vim-runtime==2:8.2.2434-3+deb11u1
diff --git a/files/build/versions/dockers/docker-eventd/versions-mirror b/files/build/versions/dockers/docker-eventd/versions-mirror
new file mode 100644
index 000000000..18bbd1153
--- /dev/null
+++ b/files/build/versions/dockers/docker-eventd/versions-mirror
@@ -0,0 +1 @@
+deb.debian.org_debian_dists_bookworm-updates==2024-04-20T02:13:22Z
diff --git a/files/build/versions/dockers/docker-macsec/versions-mirror b/files/build/versions/dockers/docker-macsec/versions-mirror
index 8d5ca2a61..18bbd1153 100644
--- a/files/build/versions/dockers/docker-macsec/versions-mirror
+++ b/files/build/versions/dockers/docker-macsec/versions-mirror
@@ -1,2 +1 @@
-deb.debian.org_debian-security_dists_bookworm-security==2024-04-04T18:53:21Z
-deb.debian.org_debian_dists_bookworm-updates==2024-04-04T20:12:41Z
+deb.debian.org_debian_dists_bookworm-updates==2024-04-20T02:13:22Z
diff --git a/files/build/versions/dockers/docker-mux/versions-mirror b/files/build/versions/dockers/docker-mux/versions-mirror
index 8d5ca2a61..18bbd1153 100644
--- a/files/build/versions/dockers/docker-mux/versions-mirror
+++ b/files/build/versions/dockers/docker-mux/versions-mirror
@@ -1,2 +1 @@
-deb.debian.org_debian-security_dists_bookworm-security==2024-04-04T18:53:21Z
-deb.debian.org_debian_dists_bookworm-updates==2024-04-04T20:12:41Z
+deb.debian.org_debian_dists_bookworm-updates==2024-04-20T02:13:22Z
diff --git a/files/build/versions/dockers/docker-orchagent/versions-mirror b/files/build/versions/dockers/docker-orchagent/versions-mirror
index 8d5ca2a61..18bbd1153 100644
--- a/files/build/versions/dockers/docker-orchagent/versions-mirror
+++ b/files/build/versions/dockers/docker-orchagent/versions-mirror
@@ -1,2 +1 @@
-deb.debian.org_debian-security_dists_bookworm-security==2024-04-04T18:53:21Z
-deb.debian.org_debian_dists_bookworm-updates==2024-04-04T20:12:41Z
+deb.debian.org_debian_dists_bookworm-updates==2024-04-20T02:13:22Z
diff --git a/files/build/versions/dockers/docker-platform-monitor/versions-deb-bookworm b/files/build/versions/dockers/docker-platform-monitor/versions-deb-bookworm
new file mode 100644
index 000000000..fd6d7b8a2
--- /dev/null
+++ b/files/build/versions/dockers/docker-platform-monitor/versions-deb-bookworm
@@ -0,0 +1,93 @@
+applibs==1.mlnx.4.6.3064
+applibs-dev==1.mlnx.4.6.3064
+dmidecode==3.4-1
+ethtool==1:6.1-1
+fancontrol==1:3.6.0-7.1
+fontconfig==2.14.1-4
+fontconfig-config==2.14.1-4
+fonts-dejavu-core==2.37-6
+gdb==13.1-3
+gdbserver==13.1-3
+i2c-tools==4.3-2+b3
+ipmitool==1.8.19-4
+ipmitool-dbgsym==1.8.19-4
+iputils-ping==3:20221126-1
+libbabeltrace1==1.5.11-1+b2
+libboost-regex1.74.0==1.74.0+ds1-21
+libcairo2==1.16.0-7
+libcbor0.8==0.8.0-2+b1
+libcurl3-gnutls==7.88.1-10+deb12u5
+libdatrie1==0.2.13-2+b1
+libdbi1==0.9.0-6
+libdebuginfod-common==0.188-2.1
+libdebuginfod1==0.188-2.1
+libdw1==0.188-2.1
+libedit2==3.1-20221030-2
+libfido2-1==1.12.0-2+b1
+libfontconfig1==2.14.1-4
+libfreetype6==2.12.1+dfsg-5
+libfribidi0==1.0.8-2.1
+libglib2.0-0==2.74.6-2
+libgpm2==1.20.7-10+b1
+libgraphite2-3==1.3.14-1
+libharfbuzz0b==6.0.0+dfsg-3
+libi2c0==4.3-2+b3
+libicu72==72.1-3
+libipt2==2.0.5-1
+libkmod2==30+20221128-1
+libmpfr6==4.2.0-1
+libpango-1.0-0==1.50.12+ds-1
+libpangocairo-1.0-0==1.50.12+ds-1
+libpangoft2-1.0-0==1.50.12+ds-1
+libpci3==1:3.9.0-4
+libpixman-1-0==0.42.2-1
+libpng16-16==1.6.39-2
+librrd-dev==1.7.2-4+b8
+librrd8==1.7.2-4+b8
+libsensors-config==1:3.6.0-7.1
+libsensors5==1:3.6.0-7.1
+libsensors5-dbgsym==1:3.6.0-7.1
+libsource-highlight-common==3.1.9-4.2
+libsource-highlight4v5==3.1.9-4.2+b3
+libswsscommon-dbgsym==1.0.0
+libthai-data==0.1.29-1
+libthai0==0.1.29-1
+libunwind8==1.6.2-3
+libx11-6==2:1.8.4-2+deb12u2
+libx11-data==2:1.8.4-2+deb12u2
+libxau6==1:1.0.9-1
+libxcb-render0==1.15-1
+libxcb-shm0==1.15-1
+libxcb1==1.15-1
+libxdmcp6==1:1.1.2-3
+libxext6==2:1.3.4-1+b1
+libxml2==2.9.14+dfsg-1.3~deb12u1
+libxrender1==1:0.9.10-1.1
+lm-sensors==1:3.6.0-7.1
+lm-sensors-dbgsym==1:3.6.0-7.1
+openssh-client==1:9.2p1-2+deb12u2
+pci.ids==0.0~2023.04.11-1
+pciutils==1:3.9.0-4
+psmisc==23.6-1
+python-sdk-api==1.mlnx.4.6.3064
+python3-attr==22.2.0-1
+python3-jsonschema==4.10.3-1
+python3-pyrsistent==0.18.1-1+b3
+python3-smbus==4.3-2+b3
+rrdtool==1.7.2-4+b8
+sensible-utils==0.0.17+nmu1
+sensord==1:3.6.0-7.1
+sensord-dbgsym==1:3.6.0-7.1
+smartmontools==7.4-2~bpo12+1
+sshpass==1.09-1+b1
+strace==6.1-0.1
+sx-complib==1.mlnx.4.6.3064
+sx-complib-dev==1.mlnx.4.6.3064
+sx-gen-utils==1.mlnx.4.6.3064
+sx-gen-utils-dev==1.mlnx.4.6.3064
+sxd-libs==1.mlnx.4.6.3064
+sxd-libs-dev==1.mlnx.4.6.3064
+ucf==3.0043+nmu1
+udev==252.22-1~deb12u1
+vim==2:9.0.1378-2
+vim-runtime==2:9.0.1378-2
diff --git a/files/build/versions/dockers/docker-platform-monitor/versions-deb-bullseye b/files/build/versions/dockers/docker-platform-monitor/versions-deb-bullseye
deleted file mode 100644
index 5a6a51f8b..000000000
--- a/files/build/versions/dockers/docker-platform-monitor/versions-deb-bullseye
+++ /dev/null
@@ -1,99 +0,0 @@
-applibs==1.mlnx.4.6.2202
-applibs-dev==1.mlnx.4.6.2202
-dmidecode==3.3-2
-ethtool==1:5.9-1
-fancontrol==1:3.6.0-7
-fontconfig==2.13.1-4.2
-fontconfig-config==2.13.1-4.2
-fonts-dejavu-core==2.37-2
-freeipmi-common==1.6.6-4+deb11u1
-gdb==10.1-1.7
-gdbserver==10.1-1.7
-i2c-tools==4.2-1+b1
-ipmitool==1.8.18-10.1
-iputils-ping==3:20210202-1
-libbabeltrace1==1.5.8-1+b3
-libboost-regex1.74.0==1.74.0-9
-libcairo2==1.16.0-5
-libcbor0==0.5.0+dfsg-2
-libcurl3-gnutls==7.74.0-1.3+deb11u11
-libdatrie1==0.2.13-1
-libdbi1==0.9.0-6
-libdebuginfod1==0.183-1
-libdw1==0.183-1
-libedit2==3.1-20191231-2+b1
-libfido2-1==1.6.0-2
-libfontconfig1==2.13.1-4.2
-libfreeipmi17==1.6.6-4+deb11u1
-libfreetype6==2.10.4+dfsg-1+deb11u1
-libfribidi0==1.0.8-2+deb11u1
-libglib2.0-0==2.66.8-1+deb11u1
-libgpm2==1.20.7-8
-libgraphite2-3==1.3.14-1
-libharfbuzz0b==2.7.4-1
-libi2c0==4.2-1+b1
-libicu67==67.1-7
-libipt2==2.0.3-1
-libkmod2==28-1
-libmpfr6==4.1.0-3
-libpango-1.0-0==1.46.2-3
-libpangocairo-1.0-0==1.46.2-3
-libpangoft2-1.0-0==1.46.2-3
-libpci3==1:3.7.0-5
-libpixman-1-0==0.40.0-1.1~deb11u1
-libpng16-16==1.6.37-3
-librrd-dev==1.7.2-3+b7
-librrd8==1.7.2-3+b7
-libsensors-config==1:3.6.0-7
-libsensors5==1:3.6.0-7
-libsensors5-dbgsym==1:3.6.0-7
-libsource-highlight-common==3.1.9-3
-libsource-highlight4v5==3.1.9-3+b1
-libswsscommon-dbgsym==1.0.0
-libthai-data==0.1.28-3
-libthai0==0.1.28-3
-libunwind8==1.3.2-2
-libx11-6==2:1.7.2-1+deb11u2
-libx11-data==2:1.7.2-1+deb11u2
-libxau6==1:1.0.9-1
-libxcb-render0==1.14-3
-libxcb-shm0==1.14-3
-libxcb1==1.14-3
-libxdmcp6==1:1.1.2-3
-libxext6==2:1.3.3-1.1
-libxml2==2.9.10+dfsg-6.7+deb11u4
-libxrender1==1:0.9.10-1
-lm-sensors==1:3.6.0-7
-lm-sensors-dbgsym==1:3.6.0-7
-openssh-client==1:8.4p1-5+deb11u3
-pci.ids==0.0~2021.02.08-1
-pciutils==1:3.7.0-5
-psmisc==23.4-2
-python-sdk-api==1.mlnx.4.6.2202
-python3-attr==20.3.0-1
-python3-importlib-metadata==1.6.0-2
-python3-jsonschema==3.2.0-3
-python3-more-itertools==4.2.0-3
-python3-pkg-resources==52.0.0-4
-python3-pyrsistent==0.15.5-1+b3
-python3-setuptools==52.0.0-4
-python3-six==1.16.0-2
-python3-smbus==4.2-1+b1
-python3-zipp==1.0.0-3
-rrdtool==1.7.2-3+b7
-sensible-utils==0.0.14
-sensord==1:3.6.0-7
-sensord-dbgsym==1:3.6.0-7
-smartmontools==7.2-1
-sshpass==1.09-1+b1
-strace==5.10-1
-sx-complib==1.mlnx.4.6.2202
-sx-complib-dev==1.mlnx.4.6.2202
-sx-gen-utils==1.mlnx.4.6.2202
-sx-gen-utils-dev==1.mlnx.4.6.2202
-sxd-libs==1.mlnx.4.6.2202
-sxd-libs-dev==1.mlnx.4.6.2202
-ucf==3.0043
-udev==247.3-7+deb11u4
-vim==2:8.2.2434-3+deb11u1
-vim-runtime==2:8.2.2434-3+deb11u1
diff --git a/files/build/versions/dockers/docker-platform-monitor/versions-mirror b/files/build/versions/dockers/docker-platform-monitor/versions-mirror
new file mode 100644
index 000000000..18bbd1153
--- /dev/null
+++ b/files/build/versions/dockers/docker-platform-monitor/versions-mirror
@@ -0,0 +1 @@
+deb.debian.org_debian_dists_bookworm-updates==2024-04-20T02:13:22Z
diff --git a/files/build/versions/dockers/docker-platform-monitor/versions-py3 b/files/build/versions/dockers/docker-platform-monitor/versions-py3
index 2c8725dc1..88a9dfbe9 100644
--- a/files/build/versions/dockers/docker-platform-monitor/versions-py3
+++ b/files/build/versions/dockers/docker-platform-monitor/versions-py3
@@ -1,19 +1,16 @@
-attrs==20.3.0
+attrs==22.2.0
 certifi==2024.2.2
 charset-normalizer==3.3.2
-grpcio==1.39.0
-grpcio-tools==1.39.0
+grpcio==1.51.1
+grpcio-tools==1.51.1
 guacamole==0.9.2
-idna==3.6
-importlib-metadata==1.6.0
+idna==3.7
 jsonschema==2.6.0
 libpci==0.2
-more-itertools==4.2.0
 netifaces==0.11.0
-protobuf==3.20.3
-pyrsistent==0.15.5
-python_sdk_api==4.6.2202
+protobuf==4.25.3
+pyrsistent==0.18.1
+python-sdk-api==4.6.3064
 requests==2.31.0
 thrift==0.13.0
 urllib3==2.2.1
-zipp==1.0.0
diff --git a/files/build/versions/dockers/docker-ptf/versions-deb-buster b/files/build/versions/dockers/docker-ptf/versions-deb-buster
index 380fa0be7..02c90922c 100644
--- a/files/build/versions/dockers/docker-ptf/versions-deb-buster
+++ b/files/build/versions/dockers/docker-ptf/versions-deb-buster
@@ -143,8 +143,8 @@ libevdev2==1.6.0+dfsg-1
 libevent-2.1-6==2.1.8-stable-4
 libevent-core-2.1-6==2.1.8-stable-4
 libevent-pthreads-2.1-6==2.1.8-stable-4
-libexpat1==2.2.6-2+deb10u6
-libexpat1-dev==2.2.6-2+deb10u6
+libexpat1==2.2.6-2+deb10u7
+libexpat1-dev==2.2.6-2+deb10u7
 libfakeroot==1.23-1
 libfastjson4==0.99.8-2+deb10u1
 libffi-dev==3.2.1-9
@@ -161,7 +161,7 @@ libfreetype6==2.9.1-3+deb10u3
 libfribidi0==1.0.5-3.1+deb10u2
 libgbm1==18.3.6-2+deb10u1
 libgcc-8-dev==8.3.0-6
-libgd3==2.2.5-5.2
+libgd3==2.2.5-5.2+deb10u1
 libgdbm-compat4==1.18.1-4
 libgdbm6==1.18.1-4
 libgdk-pixbuf2.0-0==2.38.1+dfsg-1
@@ -534,7 +534,7 @@ python3-numpy==1:1.16.2-1
 python3-olefile==0.46-1
 python3-pexpect==4.6.0-1
 python3-pickleshare==0.7.5-1
-python3-pil==5.4.1-2+deb10u5
+python3-pil==5.4.1-2+deb10u6
 python3-pip==18.1-5
 python3-pkg-resources==40.8.0-1
 python3-prompt-toolkit==1.0.15-1
@@ -579,7 +579,7 @@ tk8.6-blt2.5==2.5.3+dfsg-4
 tmux==2.8-3+deb10u1
 traceroute==1:2.1.0-2
 ttf-bitstream-vera==1.10-8
-tzdata==2021a-0+deb10u11
+tzdata==2024a-0+deb10u1
 ucf==3.0038+nmu1
 unzip==6.0-23+deb10u3
 vim==2:8.1.0875-5+deb10u6
diff --git a/files/build/versions/dockers/docker-router-advertiser/versions-mirror b/files/build/versions/dockers/docker-router-advertiser/versions-mirror
index 8d5ca2a61..18bbd1153 100644
--- a/files/build/versions/dockers/docker-router-advertiser/versions-mirror
+++ b/files/build/versions/dockers/docker-router-advertiser/versions-mirror
@@ -1,2 +1 @@
-deb.debian.org_debian-security_dists_bookworm-security==2024-04-04T18:53:21Z
-deb.debian.org_debian_dists_bookworm-updates==2024-04-04T20:12:41Z
+deb.debian.org_debian_dists_bookworm-updates==2024-04-20T02:13:22Z
diff --git a/files/build/versions/dockers/docker-sonic-mgmt-framework/versions-py3 b/files/build/versions/dockers/docker-sonic-mgmt-framework/versions-py3
index 6459004bb..6bcdc5559 100644
--- a/files/build/versions/dockers/docker-sonic-mgmt-framework/versions-py3
+++ b/files/build/versions/dockers/docker-sonic-mgmt-framework/versions-py3
@@ -7,7 +7,7 @@ connexion==2.7.0
 flask==2.2.5
 grpcio==1.58.0
 grpcio-tools==1.20.0
-idna==3.6
+idna==3.7
 importlib-resources==5.12.0
 inflection==0.5.1
 itsdangerous==2.1.2
diff --git a/files/build/versions/dockers/docker-sonic-vs/versions-py3 b/files/build/versions/dockers/docker-sonic-vs/versions-py3
index b61f5b32c..9830e0374 100644
--- a/files/build/versions/dockers/docker-sonic-vs/versions-py3
+++ b/files/build/versions/dockers/docker-sonic-vs/versions-py3
@@ -12,8 +12,8 @@ dbus-python==1.3.2
 docker==7.0.0
 docker-image-py==0.1.12
 enlighten==1.12.4
-filelock==3.13.3
-idna==3.6
+filelock==3.13.4
+idna==3.7
 importlib-metadata==6.1.0
 jsonpatch==1.33
 jsonpointer==2.4
@@ -23,13 +23,13 @@ netifaces==0.10.9
 packaging==24.0
 paramiko==2.11.0
 pexpect==4.9.0
-prefixed==0.7.0
+prefixed==0.7.1
 prettyprinter==0.18.0
 ptyprocess==0.7.0
 pycairo==1.26.0
 pycparser==2.22
 pygments==2.17.2
-pygobject==3.48.1
+pygobject==3.48.2
 pynacl==1.5.0
 pyroute2==0.5.14
 redis==4.5.2
diff --git a/files/build/versions/dockers/docker-swss-layer-bookworm/versions-mirror b/files/build/versions/dockers/docker-swss-layer-bookworm/versions-mirror
index 8d5ca2a61..18bbd1153 100644
--- a/files/build/versions/dockers/docker-swss-layer-bookworm/versions-mirror
+++ b/files/build/versions/dockers/docker-swss-layer-bookworm/versions-mirror
@@ -1,2 +1 @@
-deb.debian.org_debian-security_dists_bookworm-security==2024-04-04T18:53:21Z
-deb.debian.org_debian_dists_bookworm-updates==2024-04-04T20:12:41Z
+deb.debian.org_debian_dists_bookworm-updates==2024-04-20T02:13:22Z
diff --git a/files/build/versions/dockers/docker-syncd-mlnx/versions-deb-bullseye b/files/build/versions/dockers/docker-syncd-mlnx/versions-deb-bullseye
index c1dd4638d..6bb514b39 100644
--- a/files/build/versions/dockers/docker-syncd-mlnx/versions-deb-bullseye
+++ b/files/build/versions/dockers/docker-syncd-mlnx/versions-deb-bullseye
@@ -1,5 +1,5 @@
-applibs==1.mlnx.4.6.2202
-applibs-dev==1.mlnx.4.6.2202
+applibs==1.mlnx.4.6.3064
+applibs-dev==1.mlnx.4.6.3064
 gdb==10.1-1.7
 gdbserver==10.1-1.7
 iproute2==1.mlnx.4.5.4206
@@ -45,10 +45,10 @@ libxml2==2.9.10+dfsg-6.7+deb11u4
 linux-libc-dev==5.10.209-2
 mft==4.27.0-83
 mft-fwtrace-cfg==1.0.0
-mlnx-sai==1.mlnx.SAIBuild2311.26.0.28
+mlnx-sai==1.mlnx.SAIBuild2311.27.0.16
 openssh-client==1:8.4p1-5+deb11u3
 python-pip-whl==20.3.4-4+deb11u1
-python-sdk-api==1.mlnx.4.6.2202
+python-sdk-api==1.mlnx.4.6.3064
 python3-attr==20.3.0-1
 python3-dev==3.9.2-3
 python3-importlib-metadata==1.6.0-2
@@ -64,26 +64,26 @@ python3-zipp==1.0.0-3
 python3.9-dev==3.9.2-1
 sshpass==1.09-1+b1
 strace==5.10-1
-sx-acl-helper==1.mlnx.4.6.2202
-sx-acl-helper-dev==1.mlnx.4.6.2202
-sx-complib==1.mlnx.4.6.2202
-sx-complib-dev==1.mlnx.4.6.2202
-sx-examples==1.mlnx.4.6.2202
-sx-examples-dev==1.mlnx.4.6.2202
-sx-gen-utils==1.mlnx.4.6.2202
-sx-gen-utils-dev==1.mlnx.4.6.2202
-sx-hash-calc==1.mlnx.4.6.2202
-sx-obj-desc-lib==1.mlnx.4.6.2202
-sx-obj-desc-lib-dev==1.mlnx.4.6.2202
+sx-acl-helper==1.mlnx.4.6.3064
+sx-acl-helper-dev==1.mlnx.4.6.3064
+sx-complib==1.mlnx.4.6.3064
+sx-complib-dev==1.mlnx.4.6.3064
+sx-examples==1.mlnx.4.6.3064
+sx-examples-dev==1.mlnx.4.6.3064
+sx-gen-utils==1.mlnx.4.6.3064
+sx-gen-utils-dev==1.mlnx.4.6.3064
+sx-hash-calc==1.mlnx.4.6.3064
+sx-obj-desc-lib==1.mlnx.4.6.3064
+sx-obj-desc-lib-dev==1.mlnx.4.6.3064
 sx-scew==1.mlnx.4.5.5142
 sx-scew-dev==1.mlnx.4.5.5142
-sxd-libs==1.mlnx.4.6.2202
-sxd-libs-dev==1.mlnx.4.6.2202
+sxd-libs==1.mlnx.4.6.3064
+sxd-libs-dev==1.mlnx.4.6.3064
 syncd==1.0.0
 syncd-dbg==1.0.0
 syncd-dbgsym==1.0.0
 vim==2:8.2.2434-3+deb11u1
 vim-runtime==2:8.2.2434-3+deb11u1
-wjh-libs==1.mlnx.4.6.2202
-wjh-libs-dev==1.mlnx.4.6.2202
+wjh-libs==1.mlnx.4.6.3064
+wjh-libs-dev==1.mlnx.4.6.3064
 zlib1g-dev==1:1.2.11.dfsg-2+deb11u2
diff --git a/files/build/versions/dockers/docker-syncd-mlnx/versions-py3 b/files/build/versions/dockers/docker-syncd-mlnx/versions-py3
index d49cf202c..908739d95 100644
--- a/files/build/versions/dockers/docker-syncd-mlnx/versions-py3
+++ b/files/build/versions/dockers/docker-syncd-mlnx/versions-py3
@@ -3,5 +3,5 @@ importlib-metadata==1.6.0
 jsonschema==3.2.0
 more-itertools==4.2.0
 pyrsistent==0.15.5
-python_sdk_api==4.6.2202
+python_sdk_api==4.6.3064
 zipp==1.0.0
diff --git a/files/build/versions/dockers/docker-syncd-mrvl/versions-deb-bullseye-arm64 b/files/build/versions/dockers/docker-syncd-mrvl/versions-deb-bullseye-arm64
index 55419d341..4b3754d4e 100644
--- a/files/build/versions/dockers/docker-syncd-mrvl/versions-deb-bullseye-arm64
+++ b/files/build/versions/dockers/docker-syncd-mrvl/versions-deb-bullseye-arm64
@@ -25,7 +25,7 @@ libsensors4-dev==1:3.6.0-7
 libsensors5==1:3.6.0-7
 mailcap==3.69
 mime-support==3.66
-mrvllibsai==1.12.0-2
+mrvllibsai==1.13.0-1
 nfs-common==1:1.3.4-6
 pkg-config==0.29.2-1
 python-dev-is-python2==2.7.18-9
diff --git a/files/build/versions/dockers/docker-syncd-mrvl/versions-deb-bullseye-armhf b/files/build/versions/dockers/docker-syncd-mrvl/versions-deb-bullseye-armhf
index 4b3754d4e..ca6686d0c 100644
--- a/files/build/versions/dockers/docker-syncd-mrvl/versions-deb-bullseye-armhf
+++ b/files/build/versions/dockers/docker-syncd-mrvl/versions-deb-bullseye-armhf
@@ -25,7 +25,7 @@ libsensors4-dev==1:3.6.0-7
 libsensors5==1:3.6.0-7
 mailcap==3.69
 mime-support==3.66
-mrvllibsai==1.13.0-1
+mrvllibsai==1.13.0-2
 nfs-common==1:1.3.4-6
 pkg-config==0.29.2-1
 python-dev-is-python2==2.7.18-9
diff --git a/files/build/versions/dockers/docker-teamd/versions-mirror b/files/build/versions/dockers/docker-teamd/versions-mirror
index 8d5ca2a61..18bbd1153 100644
--- a/files/build/versions/dockers/docker-teamd/versions-mirror
+++ b/files/build/versions/dockers/docker-teamd/versions-mirror
@@ -1,2 +1 @@
-deb.debian.org_debian-security_dists_bookworm-security==2024-04-04T18:53:21Z
-deb.debian.org_debian_dists_bookworm-updates==2024-04-04T20:12:41Z
+deb.debian.org_debian_dists_bookworm-updates==2024-04-20T02:13:22Z
diff --git a/files/build/versions/dockers/sonic-slave-bookworm/versions-deb-bookworm b/files/build/versions/dockers/sonic-slave-bookworm/versions-deb-bookworm
index 9cfdc36f6..2e0c8d12e 100644
--- a/files/build/versions/dockers/sonic-slave-bookworm/versions-deb-bookworm
+++ b/files/build/versions/dockers/sonic-slave-bookworm/versions-deb-bookworm
@@ -38,7 +38,6 @@ bison==2:3.8.2+dfsg-1+b1
 blt==2.5.3+dfsg-4.1
 bsd-mailx==8.1.2-0.20220412cvs-1
 bsdextrautils==2.38.1-5+deb12u1
-bsdutils==1:2.38.1-5+deb12u1
 build-essential==12.9
 byacc==1:2.0.20221106-1
 bzip2==1.0.8-5+b1
@@ -68,6 +67,7 @@ cppzmq-dev==4.9.0-1
 cron==3.0pl1-162
 cron-daemon-common==3.0pl1-162
 curl==7.88.1-10+deb12u5
+cython3==0.29.32-2+b1
 dbus==1.14.10-1~deb12u1
 dbus-bin==1.14.10-1~deb12u1
 dbus-daemon==1.14.10-1~deb12u1
@@ -88,6 +88,7 @@ device-tree-compiler==1.6.1-4+b1
 devscripts==2.23.4+deb12u1
 dh-apparmor==3.0.8-3
 dh-autoreconf==20
+dh-dkms==3.0.10-8+deb12u1
 dh-exec==0.27
 dh-make==2.202301
 dh-python==5.20230130+deb12u1
@@ -98,6 +99,7 @@ diffstat==1.65-1
 dirmngr==2.2.40-1.1
 distro-info-data==0.58+deb12u1
 dkms==3.0.10-8+deb12u1
+dmidecode==3.4-1
 dmsetup==2:1.02.185-2
 dnsutils==1:9.18.24-1
 docbook==4.5-10
@@ -108,7 +110,7 @@ docbook-xml==4.5-12
 docker-buildx-plugin==0.10.5-1~debian.12~bookworm
 docker-ce==5:24.0.2-1~debian.12~bookworm
 docker-ce-cli==5:24.0.2-1~debian.12~bookworm
-docker-ce-rootless-extras==5:26.0.0-1~debian.12~bookworm
+docker-ce-rootless-extras==5:26.0.2-1~debian.12~bookworm
 docker-compose-plugin==2.18.1-1~debian.12~bookworm
 docutils-common==0.19+dfsg-6
 dosfstools==4.2-1
@@ -120,13 +122,16 @@ dvisvgm==3.0.3-1
 dwz==0.15-1
 eatmydata==130-2
 ed==1.19-1
+efibootmgr==17-2
 emacsen-common==3.0.5
+enchant-2==2.3.3-2
 equivs==2.3.1
 exim4-base==4.96-15+deb12u4
 exim4-config==4.96-15+deb12u4
 exim4-daemon-light==4.96-15+deb12u4
 expat==2.5.0-1
 fakeroot==1.31-1.2
+fig2dev==1:3.2.8b-3
 file==1:5.44-3
 flex==2.6.4-8.2
 fontconfig==2.14.1-4
@@ -198,6 +203,10 @@ gpgsm==2.2.40-1.1
 graphviz==2.42.2-7+b3
 groff==1.22.4-10
 groff-base==1.22.4-10
+grub-common==2.06-13+deb12u1
+grub-efi-arm64-bin==2.06-13+deb12u1
+grub-efi-arm64-signed==1+2.06+13+deb12u1
+grub2-common==2.06-13+deb12u1
 gsettings-desktop-schemas==43.0-1
 gsfonts==2:20200910-7
 gstreamer1.0-libav==1.22.0-2
@@ -207,6 +216,8 @@ gstreamer1.0-x==1.22.0-3+deb12u1
 gtk-update-icon-cache==3.24.38-2~deb12u1
 guile-3.0-libs==3.0.8-2
 hicolor-icon-theme==0.17-2
+hunspell-en-us==1:2020.12.07-2
+hwdata==0.368-1
 i965-va-driver==2.4.1+dfsg1-1
 ibverbs-providers==44.0-2
 icc-profiles-free==2.0.1+dfsg-1.1
@@ -215,6 +226,7 @@ imagemagick==8:6.9.11.60+dfsg-1.6+deb12u1
 imagemagick-6-common==8:6.9.11.60+dfsg-1.6+deb12u1
 imagemagick-6.q16==8:6.9.11.60+dfsg-1.6+deb12u1
 inetutils-telnet==2:2.4-2+deb12u1
+inkscape==1.2.2-2+b1
 install-info==6.8-6+b1
 intel-media-va-driver==23.1.1+dfsg1-1
 intltool-debian==0.35.0+20060710.6
@@ -234,7 +246,9 @@ kernel-wedge==2.104
 kmod==30+20221128-1
 krb5-locales==1.20.1-2+deb12u1
 krb5-multidev==1.20.1-2+deb12u1
+lcov==1.16-1
 less==590-2
+lib2geom1.2.0==1.2.2-3
 lib32asan8==12.2.0-14
 lib32atomic1==12.2.0-14
 lib32gcc-12-dev==12.2.0-14
@@ -285,6 +299,7 @@ libatk-wrapper-java==0.40.0-3
 libatk-wrapper-java-jni==0.40.0-3
 libatk1.0-0==2.46.0-5
 libatk1.0-dev==2.46.0-5
+libatkmm-1.6-1v5==2.28.3-1
 libatm1==1:2.5.1-4+b2
 libatm1-dev==1:2.5.1-4+b2
 libatomic1==12.2.0-14
@@ -317,7 +332,6 @@ libbinutils==2.40-2
 libbit-vector-perl==7.4-2+b1
 libblas3==3.11.0-2
 libblkid-dev==2.38.1-5+deb12u1
-libblkid1==2.38.1-5+deb12u1
 libbluray2==1:1.3.4-1
 libboost-atomic-dev==1.74.0.3
 libboost-atomic1.74-dev==1.74.0+ds1-21
@@ -400,6 +414,7 @@ libcairo-gobject2==1.16.0-7
 libcairo-script-interpreter2==1.16.0-7
 libcairo2==1.16.0-7
 libcairo2-dev==1.16.0-7
+libcairomm-1.0-1v5==1.14.4-2
 libcap-dev==1:2.66-4
 libcap-ng-dev==0.8.3-1+b3
 libcap2-bin==1:2.66-4
@@ -410,6 +425,7 @@ libcbor0.8==0.8.0-2+b1
 libcc1-0==12.2.0-14
 libcdi-api-java==1.2-3
 libcdparanoia0==3.10.2+debian-14
+libcdr-0.1-1==0.1.6-2+b2
 libcdt5==2.42.2-7+b3
 libcgi-fast-perl==1:2.15-1
 libcgi-pm-perl==4.55-1
@@ -535,6 +551,8 @@ libdynaloader-functions-perl==0.003-3
 libeatmydata1==130-2+b1
 libedit-dev==3.1-20221030-2
 libedit2==3.1-20221030-2
+libefiboot1==37-6
+libefivar1==37-6
 libegl-dev==1.6.0-1
 libegl-mesa0==22.3.6-1+deb12u1
 libegl1==1.6.0-1
@@ -543,6 +561,7 @@ libel-api-java==3.0.0-3
 libelf-dev==0.188-2.1
 libelf1==0.188-2.1
 libemail-address-xs-perl==1.05-1+b1
+libenchant-2-2==2.3.3-2
 libencode-locale-perl==1.05-3
 libepoxy-dev==1.5.10-1
 libepoxy0==1.5.10-1
@@ -611,6 +630,7 @@ libfreezethaw-perl==0.5001-3
 libfribidi-dev==1.0.8-2.1
 libfribidi0==1.0.8-2.1
 libfstrm0==0.6.1-1
+libfuse2==2.9.9-6+b1
 libfuse3-3==3.14.0-4
 libgail-common==2.24.33-2
 libgail18==2.24.33-2
@@ -620,6 +640,7 @@ libgc1==1:8.2.2-3
 libgcc-12-dev==12.2.0-14
 libgcc-12-dev-armhf-cross==12.2.0-14cross1
 libgcc-s1-armhf-cross==12.2.0-14cross1
+libgd-perl==2.76-4+b1
 libgd3==2.3.3-9
 libgdbm-compat4==1.23-3
 libgdbm6==1.23-3
@@ -651,6 +672,7 @@ libglib2.0-bin==2.74.6-2
 libglib2.0-data==2.74.6-2
 libglib2.0-dev==2.74.6-2
 libglib2.0-dev-bin==2.74.6-2
+libglibmm-2.4-1v5==2.66.5-2
 libglu1-mesa==9.0.2-1.1
 libglu1-mesa-dev==9.0.2-1.1
 libglusterfs0==10.3-5
@@ -676,7 +698,11 @@ libgraphite2-dev==1.3.14-1
 libgs-common==10.0.0~dfsg-11+deb12u3
 libgs10==10.0.0~dfsg-11+deb12u3
 libgs10-common==10.0.0~dfsg-11+deb12u3
+libgsl27==2.7.1+dfsg-5
+libgslcblas0==2.7.1+dfsg-5
 libgsm1==1.0.22-1
+libgspell-1-2==1.12.0-1+b2
+libgspell-1-common==1.12.0-1
 libgssapi-krb5-2==1.20.1-2+deb12u1
 libgssrpc4==1.20.1-2+deb12u1
 libgstreamer-plugins-base1.0-0==1.22.0-3+deb12u1
@@ -689,6 +715,7 @@ libgtk-3-dev==3.24.38-2~deb12u1
 libgtk2.0-0==2.24.33-2
 libgtk2.0-bin==2.24.33-2
 libgtk2.0-common==2.24.33-2
+libgtkmm-3.0-1v5==3.24.7-1
 libgts-0.7-5==0.7.6+darcs121130-5+b1
 libgts-bin==0.7.6+darcs121130-5+b1
 libguava-java==31.1-1
@@ -721,6 +748,7 @@ libhttp-negotiate-perl==6.01-2
 libhttp-tiny-multipart-perl==0.08-2
 libhttpclient-java==4.5.14-1
 libhttpcore-java==4.4.16-1
+libhunspell-1.7-0==1.7.1-1
 libhwasan0==12.2.0-14
 libhwloc-plugins==2.9.0-1
 libhwloc15==2.9.0-1
@@ -735,6 +763,8 @@ libidn12==1.41-1
 libiec61883-0==1.2.0-6+b1
 libigdgmm12==22.3.3+ds1-1
 libijs-0.35==0.35-15
+libimage-magick-perl==8:6.9.11.60+dfsg-1.6+deb12u1
+libimage-magick-q16-perl==8:6.9.11.60+dfsg-1.6+deb12u1
 libimagequant0==2.17.0-1
 libimath-3-1-29==3.1.6-1
 libimport-into-perl==1.002005-2
@@ -776,7 +806,7 @@ libjbig2dec0==0.19-3
 libjcode-pm-perl==2.06-1.1
 libjemalloc-dev==5.3.0-1
 libjemalloc2==5.3.0-1
-libjetty9-java==9.4.50-4+deb12u2
+libjetty9-java==9.4.50-4+deb12u3
 libjpeg-dev==1:2.1.5-2
 libjpeg62-turbo==1:2.1.5-2
 libjpeg62-turbo-dev==1:2.1.5-2
@@ -849,6 +879,7 @@ libltdl-dev==2.4.7-5
 libltdl7==2.4.7-5
 liblua5.1-0==5.1.5-9
 liblua5.1-0-dev==5.1.5-9
+liblua5.3-0==5.3.6-2
 liblwp-mediatypes-perl==6.04-2
 liblwp-protocol-https-perl==6.10-1
 liblz1==1.13-5
@@ -857,6 +888,7 @@ liblzo2-2==2.10-2
 liblzo2-dev==2.10-2
 libmagic-mgc==1:5.44-3
 libmagic1==1:5.44-3
+libmagick++-6.q16-8==8:6.9.11.60+dfsg-1.6+deb12u1
 libmagickcore-6.q16-6==8:6.9.11.60+dfsg-1.6+deb12u1
 libmagickcore-6.q16-6-extra==8:6.9.11.60+dfsg-1.6+deb12u1
 libmagickwand-6.q16-6==8:6.9.11.60+dfsg-1.6+deb12u1
@@ -903,7 +935,6 @@ libmoose-perl==2.2203-1
 libmoosex-aliases-perl==0.11-2
 libmoox-aliases-perl==0.001006-2
 libmount-dev==2.38.1-5+deb12u1
-libmount1==2.38.1-5+deb12u1
 libmouse-perl==2.5.10-1+b3
 libmp3lame0==3.100-6
 libmpc3==1.3.1-1
@@ -993,6 +1024,7 @@ libpango-1.0-0==1.50.12+ds-1
 libpango1.0-dev==1.50.12+ds-1
 libpangocairo-1.0-0==1.50.12+ds-1
 libpangoft2-1.0-0==1.50.12+ds-1
+libpangomm-1.4-1v5==2.46.3-1
 libpangoxft-1.0-0==1.50.12+ds-1
 libpaper-utils==1.1.29
 libpaper1==1.1.29
@@ -1061,6 +1093,9 @@ libpod-constants-perl==0.19-2
 libpod-parser-perl==1.65-1
 libpolkit-agent-1-0==122-3
 libpolkit-gobject-1-0==122-3
+libpoppler-glib8==22.12.0-2+b1
+libpoppler126==22.12.0-2+b1
+libpopt-dev==1.19+dfsg-1
 libpopt0==1.19+dfsg-1
 libpostproc56==7:5.1.4-0+deb12u1
 libpotrace0==1.16-2
@@ -1129,9 +1164,12 @@ libregexp-ipv6-perl==0.03-3
 libregexp-pattern-license-perl==3.9.4-3
 libregexp-pattern-perl==0.2.14-2
 libregexp-wildcards-perl==1.05-3
+librevenge-0.0-0==0.0.5-3
 librhash0==1.4.3-3
 librist4==0.2.7+dfsg-1
 librole-tiny-perl==2.002004-1
+librpm9==4.18.0+dfsg-1+deb12u1
+librpmio9==4.18.0+dfsg-1+deb12u1
 librrd-dev==1.7.2-4+b8
 librrd8==1.7.2-4+b8
 librsvg2-2==2.54.7+dfsg-1~deb12u1
@@ -1161,6 +1199,7 @@ libset-intspan-perl==1.19-3
 libsgmls-perl==1.03ii-38
 libshine3==3.1.1-2
 libshout3==2.4.6-1+b1
+libsigc++-2.0-0v5==2.12.0-1
 libsigsegv2==2.14-1
 libsisu-inject-java==0.3.4-2
 libsisu-plexus-java==0.3.4-3
@@ -1170,7 +1209,6 @@ libslf4j-java==1.7.32-1
 libslirp0==4.7.0-1
 libsm-dev==2:1.2.3-1
 libsm6==2:1.2.3-1
-libsmartcols1==2.38.1-5+deb12u1
 libsnappy-java==1.1.8.3-1
 libsnappy-jni==1.1.8.3-1
 libsnappy1v5==1.1.9-3
@@ -1301,7 +1339,6 @@ libusb-1.0-0-dev==2:1.0.26-1
 libusb-1.0-doc==2:1.0.26-1
 libusb-dev==2:0.1.12-32
 libusbredirparser1==0.13.0-2
-libuuid1==2.38.1-5+deb12u1
 libuv1==1.44.2-1+deb12u1
 libv4l-0==1.22.1-5+b2
 libv4lconvert0==1.22.1-5+b2
@@ -1318,6 +1355,7 @@ libvirglrenderer1==0.10.4-1
 libvirt-clients==9.0.0-4
 libvirt-l10n==9.0.0-4
 libvirt0==9.0.0-4
+libvisio-0.1-1==0.1.7-1+b3
 libvisual-0.4-0==0.4.0-19
 libvorbis0a==1.3.7-1
 libvorbisenc2==1.3.7-1
@@ -1345,8 +1383,12 @@ libwebp7==1.2.4-0.2+deb12u1
 libwebpdemux2==1.2.4-0.2+deb12u1
 libwebpmux3==1.2.4-0.2+deb12u1
 libwebsocket-api-java==1.1-2
+libwmf-0.2-7==0.2.12-5.1
+libwmf-bin==0.2.12-5.1
 libwmflite-0.2-7==0.2.12-5.1
 libwoff1==1.0.2-2
+libwpd-0.10-10==0.10.3-2+b1
+libwpg-0.3-3==0.3.3-1
 libwrap0==7.6.q-32
 libwrap0-dev==7.6.q-32
 libwww-mechanize-perl==2.16-1
@@ -1471,6 +1513,8 @@ libyuv0==0.0~git20230123.b2528b0-1
 libz3-4==4.8.12-3.1
 libz3-dev==4.8.12-3.1
 libzimg2==3.0.4+ds1-1
+libzip-dev==1.7.3-1+b1
+libzip4==1.7.3-1+b1
 libzmq3-dev==4.3.4-6
 libzmq5==4.3.4-6
 libzstd-dev==1.5.4+dfsg2-5
@@ -1479,14 +1523,14 @@ libzvbi0==0.2.41-1
 libzzip-0-13==0.13.72+dfsg.1-1.1
 licensecheck==3.3.5-1
 lintian==2.116.3
-linux-compiler-gcc-12-x86==6.1.76-1
-linux-headers-6.1.0-18-amd64==6.1.76-1
-linux-headers-6.1.0-18-arm64==6.1.76-1
-linux-headers-6.1.0-18-common==6.1.76-1
-linux-headers-amd64==6.1.76-1
-linux-headers-arm64==6.1.76-1
-linux-kbuild-6.1==6.1.76-1
-linux-libc-dev==6.1.76-1
+linux-compiler-gcc-12-x86==6.1.85-1
+linux-headers-6.1.0-20-amd64==6.1.85-1
+linux-headers-6.1.0-20-arm64==6.1.85-1
+linux-headers-6.1.0-20-common==6.1.85-1
+linux-headers-amd64==6.1.85-1
+linux-headers-arm64==6.1.85-1
+linux-kbuild-6.1==6.1.85-1
+linux-libc-dev==6.1.85-1
 linuxdoc-tools==0.9.82-1
 llvm-14==1:14.0.6-12
 llvm-14-dev==1:14.0.6-12
@@ -1521,15 +1565,17 @@ media-types==10.0.0
 mesa-va-drivers==22.3.6-1+deb12u1
 mesa-vdpau-drivers==22.3.6-1+deb12u1
 mesa-vulkan-drivers==22.3.6-1+deb12u1
+meson==1.0.1-5
 mime-support==3.66
 module-assistant==0.11.11
-mount==2.38.1-5+deb12u1
+mokutil==0.6.0-2
 mupdf-tools==1.21.1+ds2-1+b4
 mysql-common==5.8+1.1.0
 ncurses-term==6.4-4
 netbase==6.4
 netpbm==2:11.01.00-2
 nftables==1.0.6-2+deb12u2
+ninja-build==1.11.1-1
 nlohmann-json3-dev==3.11.2-2
 node-acorn==8.8.1+ds+~cs25.17.7-2
 node-busboy==1.6.0+~cs2.6.0-2
@@ -1551,16 +1597,20 @@ openssh-client==1:9.2p1-2+deb12u2
 openssh-server==1:9.2p1-2+deb12u2
 openssh-sftp-server==1:9.2p1-2+deb12u2
 openssl==3.0.11-1~deb12u2
+os-prober==1.81
 ovmf==2022.11-6+deb12u1
 packagekit==1.2.6-5
 packagekit-tools==1.2.6-5
 pahole==1.24-4.1
+pandoc==2.17.1.1-2~deb12u1
+pandoc-data==2.17.1.1-2~deb12u1
 pango1.0-tools==1.50.12+ds-1
 patch==2.7.6-7
 patchutils==0.4.2-1
 pbuilder==0.231
 pbzip2==1.1.13-1
 pci.ids==0.0~2023.04.11-1
+pciutils==1:3.9.0-4
 perl==5.36.0-7+deb12u1
 perl-modules-5.36==5.36.0-7+deb12u1
 perl-openssl-defaults==7+b1
@@ -1580,12 +1630,12 @@ php-text-template==2.0.4-2
 php-timer==5.0.3-3
 php-tokenizer==1.2.1-1
 php-xml==2:8.2+93
-php8.2-cli==8.2.7-1~deb12u1
-php8.2-common==8.2.7-1~deb12u1
-php8.2-mbstring==8.2.7-1~deb12u1
-php8.2-opcache==8.2.7-1~deb12u1
-php8.2-readline==8.2.7-1~deb12u1
-php8.2-xml==8.2.7-1~deb12u1
+php8.2-cli==8.2.18-1~deb12u1
+php8.2-common==8.2.18-1~deb12u1
+php8.2-mbstring==8.2.18-1~deb12u1
+php8.2-opcache==8.2.18-1~deb12u1
+php8.2-readline==8.2.18-1~deb12u1
+php8.2-xml==8.2.18-1~deb12u1
 phpunit==9.6.7-1
 phpunit-cli-parser==1.0.1-3
 phpunit-code-unit==1.0.8-3
@@ -1651,6 +1701,7 @@ python3-colorama==0.4.6-2
 python3-constantly==15.1.0-4
 python3-coverage==6.5.0+dfsg1-2+b1
 python3-cryptography==38.0.4-3
+python3-cssselect==1.2.0-2
 python3-dateutil==2.8.2-2
 python3-dbg==3.11.2-1+b1
 python3-dbus==1.3.2-4+b1
@@ -1690,6 +1741,7 @@ python3-minimal==3.11.2-1+b1
 python3-more-itertools==8.10.0-2
 python3-mypy-extensions==0.4.3-4
 python3-nose==1.3.7-9
+python3-numpy==1:1.24.2-1
 python3-oauthlib==3.2.2-1
 python3-olefile==0.46-3
 python3-openssl==23.0.0-1
@@ -1707,6 +1759,7 @@ python3-ptyprocess==0.7.0-5
 python3-py==1.11.0-1
 python3-pyasn1==0.4.8-3
 python3-pyasn1-modules==0.2.8-1
+python3-pyelftools==0.29-1
 python3-pygments==2.14.0+dfsg-1
 python3-pyparsing==3.0.9-1
 python3-pytest==7.2.1-2
@@ -1765,6 +1818,8 @@ quilt==0.67+really0.66-1
 rake==13.0.6-3
 readline-common==8.2-1.3
 rpcsvc-proto==1.4.3-1
+rpm-common==4.18.0+dfsg-1+deb12u1
+rpm2cpio==4.18.0+dfsg-1+deb12u1
 rrdtool==1.7.2-4+b8
 rsync==3.2.7-1
 rsyslog==8.2302.0-1
@@ -1791,6 +1846,10 @@ sgmlspl==1.03ii-38
 shared-mime-info==2.2-1
 sharutils==1:4.15.2-9
 shellcheck==0.9.0-1
+shim-helpers-arm64-signed==1+15.7+1
+shim-signed==1.39+15.7-1
+shim-signed-common==1.39+15.7-1
+shim-unsigned==15.7-1
 slirp4netns==1.2.0-1
 software-properties-common==0.99.30-4
 sphinx-common==5.3.0-4
@@ -1829,16 +1888,19 @@ tk==8.6.13
 tk8.6==8.6.13-2
 tk8.6-blt2.5==2.5.3+dfsg-4.1
 ucf==3.0043+nmu1
+udev==252.22-1~deb12u1
 unzip==6.0-28
-util-linux==2.38.1-5+deb12u1
-util-linux-extra==2.38.1-5+deb12u1
+usb.ids==2024.01.20-0+deb12u1
 uuid-dev==2.38.1-5+deb12u1
 va-driver-all==2.17.0-1
+valgrind==1:3.19.0-1
+valgrind-dbg==1:3.19.0-1
 vdpau-driver-all==1.5-2
 velocity==1.7-6
 vim==2:9.0.1378-2
 vim-common==2:9.0.1378-2
 vim-runtime==2:9.0.1378-2
+watchdog==5.16-1+b2
 wayland-protocols==1.31-1
 wdiff==1.2.2-5
 wget==1.21.3-1+b2
diff --git a/files/build/versions/dockers/sonic-slave-bookworm/versions-deb-bookworm-arm64 b/files/build/versions/dockers/sonic-slave-bookworm/versions-deb-bookworm-arm64
index 1f4f94d11..3b6c4c092 100644
--- a/files/build/versions/dockers/sonic-slave-bookworm/versions-deb-bookworm-arm64
+++ b/files/build/versions/dockers/sonic-slave-bookworm/versions-deb-bookworm-arm64
@@ -3,4 +3,5 @@ dctrl-tools==2.24-3
 dvipng==1.15-1.1
 libnanomsg-dev==1.1.5+dfsg-1.1
 libnanomsg5==1.1.5+dfsg-1.1
+watchdog==5.16-1+b1
 wget==1.21.3-1+b1
diff --git a/files/build/versions/dockers/sonic-slave-bookworm/versions-deb-bookworm-armhf b/files/build/versions/dockers/sonic-slave-bookworm/versions-deb-bookworm-armhf
index c574ebc8d..aa5cf7c82 100644
--- a/files/build/versions/dockers/sonic-slave-bookworm/versions-deb-bookworm-armhf
+++ b/files/build/versions/dockers/sonic-slave-bookworm/versions-deb-bookworm-armhf
@@ -3,7 +3,8 @@ dctrl-tools==2.24-3
 dvipng==1.15-1.1
 libnanomsg-dev==1.1.5+dfsg-1.1
 libnanomsg5==1.1.5+dfsg-1.1
-linux-compiler-gcc-12-arm==6.1.76-1
-linux-headers-6.1.0-18-armmp==6.1.76-1
-linux-headers-armmp==6.1.76-1
+linux-compiler-gcc-12-arm==6.1.85-1
+linux-headers-6.1.0-20-armmp==6.1.85-1
+linux-headers-armmp==6.1.85-1
+watchdog==5.16-1+b1
 wget==1.21.3-1+b1
diff --git a/files/build/versions/dockers/sonic-slave-bookworm/versions-mirror b/files/build/versions/dockers/sonic-slave-bookworm/versions-mirror
index 1b3c7013d..f393a67e9 100644
--- a/files/build/versions/dockers/sonic-slave-bookworm/versions-mirror
+++ b/files/build/versions/dockers/sonic-slave-bookworm/versions-mirror
@@ -1 +1 @@
-deb.debian.org_debian-security_dists_bookworm-security==2024-04-04T01:14:25Z
+deb.debian.org_debian_dists_bookworm-updates==2024-04-19T20:17:02Z
diff --git a/files/build/versions/dockers/sonic-slave-bookworm/versions-py3 b/files/build/versions/dockers/sonic-slave-bookworm/versions-py3
index f84159bb0..f4259abbb 100644
--- a/files/build/versions/dockers/sonic-slave-bookworm/versions-py3
+++ b/files/build/versions/dockers/sonic-slave-bookworm/versions-py3
@@ -18,7 +18,9 @@ constantly==15.1.0
 coverage==6.5.0
 crc16==0.1.1
 cryptography==38.0.4
+cssselect==1.2.0
 ctypesgen==1.0.2
+cython==0.29.32
 dbus-python==1.3.2
 devscripts==2.23.4+deb12u1
 dill==0.3.6
@@ -28,6 +30,8 @@ fastentrypoints==0.12
 gbp==0.9.30
 gcovr==5.2
 gpg==1.18.0
+grpcio==1.51.1
+grpcio-tools==1.51.1
 html5lib==1.1
 httplib2==0.20.4
 hyperlink==21.0.0
@@ -49,12 +53,14 @@ mako==1.2.4.dev0
 markdown==3.4.1
 markupsafe==2.1.2
 mccabe==0.7.0
+meson==1.0.1
 mmh3==2.5.1
 mock==5.1.0
 mockredispy==2.9.3
 more-itertools==8.10.0
 mypy-extensions==0.4.3
 nose==1.3.7
+numpy==1.24.2
 oauthlib==3.2.2
 olefile==0.46
 packaging==23.0
@@ -66,13 +72,15 @@ pillow==10.0.0
 pip==24.0
 platformdirs==2.6.0
 pluggy==1.0.0+repack
+protobuf==4.25.3
 ptyprocess==0.7.0
 py==1.11.0
 pyang==2.4.0
 pyangbind==0.8.2
 pyasn1==0.4.8
 pyasn1-modules==0.2.8
-pyfakefs==5.3.5
+pyelftools==0.29
+pyfakefs==5.4.1
 pygments==2.14.0
 pygobject==3.42.2
 pyhamcrest==2.0.3
@@ -92,7 +100,7 @@ pytz==2022.7.1
 pyxdg==0.28
 pyyaml==6.0
 redis==5.0.3
-regex==2023.12.25
+regex==2024.4.16
 requests==2.28.1
 roman==3.3
 scour==0.38.2
diff --git a/files/build/versions/dockers/sonic-slave-bullseye/versions-deb-bullseye b/files/build/versions/dockers/sonic-slave-bullseye/versions-deb-bullseye
index 8b5a7f315..739eb3c63 100644
--- a/files/build/versions/dockers/sonic-slave-bullseye/versions-deb-bullseye
+++ b/files/build/versions/dockers/sonic-slave-bullseye/versions-deb-bullseye
@@ -36,7 +36,6 @@ binutils-x86-64-linux-gnu==2.35.2-2
 bison==2:3.7.5+dfsg-1
 blt==2.5.3+dfsg-4.1
 bsdextrautils==2.36.1-8+deb11u2
-bsdutils==1:2.36.1-8+deb11u2
 build-essential==12.9
 byacc==20140715-1+b1
 bzip2==1.0.8-4
@@ -106,7 +105,7 @@ docbook-xsl==1.79.2+dfsg-1
 docker-buildx-plugin==0.10.5-1~debian.11~bullseye
 docker-ce==5:24.0.2-1~debian.11~bullseye
 docker-ce-cli==5:24.0.2-1~debian.11~bullseye
-docker-ce-rootless-extras==5:26.0.0-1~debian.11~bullseye
+docker-ce-rootless-extras==5:26.0.2-1~debian.11~bullseye
 docker-compose-plugin==2.18.1-1~debian.11~bullseye
 docutils-common==0.16+dfsg-4
 dosfstools==4.2-1
@@ -318,7 +317,6 @@ libbinutils==2.35.2-2
 libbit-vector-perl==7.4-1+b7
 libblas3==3.9.0-3+deb11u1
 libblkid-dev==2.36.1-8+deb11u2
-libblkid1==2.36.1-8+deb11u2
 libbluray2==1:1.2.1-4+deb11u2
 libboost-atomic-dev==1.74.0.3
 libboost-atomic1.74-dev==1.74.0-9
@@ -751,7 +749,7 @@ libjbig0==2.1-3.1+b2
 libjbig2dec0==0.19-2
 libjemalloc-dev==5.2.1-3
 libjemalloc2==5.2.1-3
-libjetty9-java==9.4.50-4+deb11u1
+libjetty9-java==9.4.50-4+deb11u2
 libjpeg62-turbo==1:2.0.6-4
 libjq1==1.6-2.1
 libjs-bootstrap4==4.5.2+dfsg1-8~deb11u1
@@ -875,7 +873,6 @@ libmoosex-aliases-perl==0.11-1.1
 libmoox-aliases-perl==0.001006-1.1
 libmoox-struct-perl==0.020-1
 libmount-dev==2.36.1-8+deb11u2
-libmount1==2.36.1-8+deb11u2
 libmouse-perl==2.5.10-1+b1
 libmp3lame0==3.100-3
 libmpc3==1.2.0-1
@@ -1125,7 +1122,6 @@ libslf4j-java==1.7.30-1
 libslirp0==4.4.0-1+deb11u2
 libsm-dev==2:1.2.3-1
 libsm6==2:1.2.3-1
-libsmartcols1==2.36.1-8+deb11u2
 libsnappy-java==1.1.8.3-1
 libsnappy-jni==1.1.8.3-1
 libsnappy1v5==1.1.8-1
@@ -1240,7 +1236,6 @@ libusb-1.0-0-dev==2:1.0.24-3
 libusb-1.0-doc==2:1.0.24-3
 libusb-dev==2:0.1.12-32
 libusbredirparser1==0.8.0-1+b1
-libuuid1==2.36.1-8+deb11u2
 libuv1==1.40.0-2+deb11u1
 libv4l-0==1.20.0-2
 libv4lconvert0==1.20.0-2
@@ -1467,7 +1462,6 @@ mesa-vdpau-drivers==20.3.5-1
 mesa-vulkan-drivers==20.3.5-1
 mime-support==3.66
 module-assistant==0.11.10
-mount==2.36.1-8+deb11u2
 mysql-common==5.8+1.0.7
 ncurses-term==6.2+20201114-2+deb11u2
 netbase==6.3
@@ -1520,13 +1514,13 @@ php-timer==5.0.3-2
 php-tokenizer==1.2.0-1
 php-webmozart-assert==1.9.1-2
 php-xml==2:7.4+76
-php7.4-cli==7.4.33-1+deb11u4
-php7.4-common==7.4.33-1+deb11u4
-php7.4-json==7.4.33-1+deb11u4
-php7.4-mbstring==7.4.33-1+deb11u4
-php7.4-opcache==7.4.33-1+deb11u4
-php7.4-readline==7.4.33-1+deb11u4
-php7.4-xml==7.4.33-1+deb11u4
+php7.4-cli==7.4.33-1+deb11u5
+php7.4-common==7.4.33-1+deb11u5
+php7.4-json==7.4.33-1+deb11u5
+php7.4-mbstring==7.4.33-1+deb11u5
+php7.4-opcache==7.4.33-1+deb11u5
+php7.4-readline==7.4.33-1+deb11u5
+php7.4-xml==7.4.33-1+deb11u5
 phpunit==9.5.2-1
 phpunit-cli-parser==1.0.1-1
 phpunit-code-unit==1.0.8-1
@@ -1772,7 +1766,6 @@ tk8.6-blt2.5==2.5.3+dfsg-4.1
 ucf==3.0043
 unattended-upgrades==2.8
 unzip==6.0-26+deb11u1
-util-linux==2.36.1-8+deb11u2
 uuid-dev==2.36.1-8+deb11u2
 va-driver-all==2.10.0-1
 vdpau-driver-all==1.4-3
diff --git a/files/build/versions/dockers/sonic-slave-bullseye/versions-py3 b/files/build/versions/dockers/sonic-slave-bullseye/versions-py3
index 2130d9b09..210a4c94a 100644
--- a/files/build/versions/dockers/sonic-slave-bullseye/versions-py3
+++ b/files/build/versions/dockers/sonic-slave-bullseye/versions-py3
@@ -70,7 +70,7 @@ pyangbind==0.8.1
 pyasn1==0.4.8
 pyasn1-modules==0.2.1
 pycurl==7.43.0.6
-pyfakefs==5.3.5
+pyfakefs==5.4.1
 pygments==2.7.1
 pygobject==3.38.0
 pyhamcrest==1.9.0
@@ -89,7 +89,7 @@ pytz==2021.1
 pyxdg==0.27
 pyyaml==5.4.1
 redis==5.0.3
-regex==2023.12.25
+regex==2024.4.16
 requests==2.25.1
 roman==2.0.0
 service-identity==18.1.0
diff --git a/files/build/versions/dockers/sonic-slave-buster/versions-deb-buster b/files/build/versions/dockers/sonic-slave-buster/versions-deb-buster
index bd7630fea..86e292b81 100644
--- a/files/build/versions/dockers/sonic-slave-buster/versions-deb-buster
+++ b/files/build/versions/dockers/sonic-slave-buster/versions-deb-buster
@@ -95,7 +95,7 @@ docbook-xml==4.5-8
 docker-buildx-plugin==0.10.5-1~debian.10~buster
 docker-ce==5:24.0.2-1~debian.10~buster
 docker-ce-cli==5:24.0.2-1~debian.10~buster
-docker-ce-rootless-extras==5:26.0.0-1~debian.10~buster
+docker-ce-rootless-extras==5:26.0.2-1~debian.10~buster
 docker-compose-plugin==2.18.1-1~debian.10~buster
 docutils-common==0.14+dfsg-4
 docutils-doc==0.14+dfsg-4
@@ -112,7 +112,7 @@ equivs==2.2.0
 exim4-base==4.92-8+deb10u9
 exim4-config==4.92-8+deb10u9
 exim4-daemon-light==4.92-8+deb10u9
-expat==2.2.6-2+deb10u6
+expat==2.2.6-2+deb10u7
 exuberant-ctags==1:5.9~svn20110310-12+deb10u1
 fakeroot==1.23-1
 file==1:5.35-4+deb10u2
@@ -292,7 +292,7 @@ libbind9-161==1:9.11.5.P4+dfsg-5.1+deb10u10
 libbinutils==2.31.1-16
 libbison-dev==2:3.3.2.dfsg-1
 libbit-vector-perl==7.4-1+b5
-libblkid-dev==2.33.1-0.1
+libblkid-dev==2.33.1-0.1+deb10u1
 libbluetooth3==5.50-1.2~deb10u4
 libbluray2==1:1.1.0-1+deb10u1
 libboost-atomic1.71-dev==1.71.0-6~bpo10+1
@@ -350,7 +350,7 @@ libc6-dev-i386==2.28-10+deb10u2
 libc6-dev-x32==2.28-10+deb10u2
 libc6-i386==2.28-10+deb10u2
 libc6-x32==2.28-10+deb10u2
-libcaca0==0.99.beta19-2.1
+libcaca0==0.99.beta19-2.1+deb10u1
 libcacard0==1:2.6.1-1
 libcaf-openmpi-3==2.4.0-2
 libcairo-gobject2==1.16.0-4+deb10u1
@@ -498,8 +498,8 @@ libevent-dev==2.1.8-stable-4
 libevent-extra-2.1-6==2.1.8-stable-4
 libevent-openssl-2.1-6==2.1.8-stable-4
 libevent-pthreads-2.1-6==2.1.8-stable-4
-libexpat1==2.2.6-2+deb10u6
-libexpat1-dev==2.2.6-2+deb10u6
+libexpat1==2.2.6-2+deb10u7
+libexpat1-dev==2.2.6-2+deb10u7
 libexplain-dev==1.4.D001-8
 libexplain51==1.4.D001-8
 libexporter-tiny-perl==1.002001-1
@@ -541,7 +541,7 @@ libgbm1==18.3.6-2+deb10u1
 libgc1c2==1:7.6.4-0.4
 libgcc-8-dev==8.3.0-6
 libgd-perl==2.71-2
-libgd3==2.2.5-5.2
+libgd3==2.2.5-5.2+deb10u1
 libgdbm-compat4==1.18.1-4
 libgdbm6==1.18.1-4
 libgdk-pixbuf2.0-0==2.38.1+dfsg-1
@@ -697,7 +697,7 @@ libjbig0==2.1-3.1+b2
 libjbig2dec0==0.16-1+deb10u1
 libjemalloc-dev==5.1.0-3
 libjemalloc2==5.1.0-3
-libjetty9-java==9.4.50-4+deb10u1
+libjetty9-java==9.4.50-4+deb10u2
 libjpeg62-turbo==1:1.5.2-2+deb10u1
 libjq1==1.5+dfsg-2+b1
 libjs-bootstrap==3.4.1+dfsg-1
@@ -802,7 +802,7 @@ libmodule-runtime-perl==0.016-1
 libmoo-perl==2.003004-2
 libmoose-perl==2.2011-1+b1
 libmoosex-aliases-perl==0.11-1
-libmount-dev==2.33.1-0.1
+libmount-dev==2.33.1-0.1+deb10u1
 libmp3lame0==3.100-2+b1
 libmpc3==1.1.0-1
 libmpdec2==2.4.2-2
@@ -1546,7 +1546,7 @@ python-packaging==19.0-1
 python-parse==1.6.6-0.1
 python-pathlib2==2.3.3-1
 python-pbr==4.2.0-5
-python-pil==5.4.1-2+deb10u5
+python-pil==5.4.1-2+deb10u6
 python-pip-whl==18.1-5
 python-pkg-resources==40.8.0-1
 python-pluggy==0.8.0-1
@@ -1631,7 +1631,7 @@ python3-nose2==0.8.0-1
 python3-olefile==0.46-1
 python3-packaging==19.0-1
 python3-pbr==4.2.0-5
-python3-pil==5.4.1-2+deb10u5
+python3-pil==5.4.1-2+deb10u6
 python3-pkg-resources==40.8.0-1
 python3-pluggy==0.8.0-1
 python3-py==1.7.0-2
@@ -1745,7 +1745,7 @@ tk8.6-blt2.5==2.5.3+dfsg-4
 ucf==3.0038+nmu1
 unattended-upgrades==1.11.2
 unzip==6.0-23+deb10u3
-uuid-dev==2.33.1-0.1
+uuid-dev==2.33.1-0.1+deb10u1
 va-driver-all==2.4.0-1
 vdpau-driver-all==1.1.1-10
 velocity==1.7-5+deb10u1
diff --git a/files/build/versions/dockers/sonic-slave-buster/versions-py3 b/files/build/versions/dockers/sonic-slave-buster/versions-py3
index eb0bb0009..5e1ba2343 100644
--- a/files/build/versions/dockers/sonic-slave-buster/versions-py3
+++ b/files/build/versions/dockers/sonic-slave-buster/versions-py3
@@ -49,7 +49,7 @@ pyang==2.4.0
 pyangbind==0.8.1
 pycrypto==2.6.1
 pycurl==7.43.0.2
-pyfakefs==5.3.5
+pyfakefs==5.4.1
 pygments==2.3.1
 pygobject==3.30.4
 pympler==0.8
@@ -65,7 +65,7 @@ pytz==2019.1
 pyxdg==0.25
 pyyaml==5.4.1
 redis==5.0.3
-regex==2023.12.25
+regex==2024.4.16
 requests==2.21.0
 roman==2.0.0
 secretstorage==2.3.1
diff --git a/files/build/versions/host-image/versions-deb-bookworm b/files/build/versions/host-image/versions-deb-bookworm
index 000547c51..3675e4426 100644
--- a/files/build/versions/host-image/versions-deb-bookworm
+++ b/files/build/versions/host-image/versions-deb-bookworm
@@ -62,7 +62,7 @@ grub2-common==2.06-13+deb12u1
 haveged==1.9.14-1+b1
 hdparm==9.65+ds-1
 hping3==3.a2.ds2-10
-hw-management==1.mlnx.7.0030.2008
+hw-management==1.mlnx.7.0030.3008
 i2c-tools==4.3-2+b3
 icu-devtools==72.1-3
 ifmetric==0.3-5
@@ -269,8 +269,8 @@ libzmq5==4.3.4-6
 linux-base==4.9
 linux-image-6.1.0-11-2-amd64-unsigned==6.1.38-4
 linux-image-6.1.0-11-2-arm64-unsigned==6.1.38-4
-linux-libc-dev==6.1.76-1
-linux-perf==6.1.76-1
+linux-libc-dev==6.1.85-1
+linux-perf==6.1.85-1
 locales==2.36-9+deb12u4
 logrotate==3.21.0-1
 lsof==4.95.0-1
@@ -280,6 +280,7 @@ media-types==10.0.0
 mft==4.27.0-83
 mft-fwtrace-cfg==1.0.0
 mft-oem==4.27.0-83
+minicom==2.8-2
 mokutil==0.6.0-2
 monit==1:5.20.0-6
 mount==2.38.1-5+deb12u1
@@ -297,9 +298,9 @@ ntpsec-ntpdate==1.2.2+dfsg1-1+deb12u1
 ntpsec-ntpdig==1.2.2+dfsg1-1+deb12u1
 ntpstat==0.0.0.1-2+b1
 opennsl-modules==7.1.0.0
-openssh-client==1:9.2p1-2+deb12u1
-openssh-server==1:9.2p1-2+deb12u1
-openssh-sftp-server==1:9.2p1-2+deb12u1
+openssh-client==1:9.2p1-2+deb12u2
+openssh-server==1:9.2p1-2+deb12u2
+openssh-sftp-server==1:9.2p1-2+deb12u2
 openssl==3.0.11-1~deb12u2
 pci.ids==0.0~2023.04.11-1
 pciutils==1:3.9.0-4
@@ -356,7 +357,7 @@ sonic-utilities-data==1.0-1
 sqlite3==3.40.1-2
 squashfs-tools==1:4.5.1-1
 sudo==1.9.13p3-1+deb12u1
-sx-kernel==1.mlnx.4.6.2202
+sx-kernel==1.mlnx.4.6.3064
 sysfsutils==2.1.1-4
 sysstat==12.6.1-1
 systemd==252.22-1~deb12u1
diff --git a/files/build/versions/host-image/versions-deb-bookworm-arm64 b/files/build/versions/host-image/versions-deb-bookworm-arm64
index d82ad8838..dcb0fd7d8 100644
--- a/files/build/versions/host-image/versions-deb-bookworm-arm64
+++ b/files/build/versions/host-image/versions-deb-bookworm-arm64
@@ -1,3 +1,6 @@
 mrvlprestera==1.0
 ntpstat==0.0.0.1-2
+openssh-client==1:9.2p1-2+deb12u1
+openssh-server==1:9.2p1-2+deb12u1
+openssh-sftp-server==1:9.2p1-2+deb12u1
 tsingma-bsp==1.0
diff --git a/files/build/versions/host-image/versions-deb-bookworm-armhf b/files/build/versions/host-image/versions-deb-bookworm-armhf
index 85aa015ee..4ad526a0d 100644
--- a/files/build/versions/host-image/versions-deb-bookworm-armhf
+++ b/files/build/versions/host-image/versions-deb-bookworm-armhf
@@ -2,4 +2,7 @@ binutils-arm-linux-gnueabihf==2.40-2
 linux-image-6.1.0-11-2-armmp==6.1.38-4
 mrvlprestera==1.0
 ntpstat==0.0.0.1-2
+openssh-client==1:9.2p1-2+deb12u1
+openssh-server==1:9.2p1-2+deb12u1
+openssh-sftp-server==1:9.2p1-2+deb12u1
 python3-gi==3.42.2-3+b1
diff --git a/files/build/versions/host-image/versions-py3 b/files/build/versions/host-image/versions-py3
index eee9a3df5..b5cc83b7e 100644
--- a/files/build/versions/host-image/versions-py3
+++ b/files/build/versions/host-image/versions-py3
@@ -15,10 +15,10 @@ dbus-python==1.3.2
 docker==6.1.1
 docker-image-py==0.1.12
 enlighten==1.12.4
-filelock==3.13.3
+filelock==3.13.4
 grpcio==1.51.1
 grpcio-tools==1.51.1
-idna==3.6
+idna==3.7
 ijson==3.2.3
 ipaddr==2.2.0
 ipaddress==1.0.23
@@ -43,7 +43,7 @@ perf==0.1
 pexpect==4.9.0
 pip==23.0.1
 ply==3.11
-prefixed==0.7.0
+prefixed==0.7.1
 prettyprinter==0.18.0
 protobuf==4.25.3
 psutil==5.9.8
@@ -53,14 +53,14 @@ pyangbind==0.8.2
 pycairo==1.26.0
 pycparser==2.21
 pygments==2.17.2
-pygobject==3.48.1
+pygobject==3.48.2
 pynacl==1.5.0
 pyroute2==0.5.19
 python-apt==2.6.0
 python-dateutil==2.9.0.post0
-pyyaml==6.0.1
+pyyaml==5.4.1
 redis==3.5.3
-regex==2023.12.25
+regex==2024.4.16
 requests==2.31.0
 scapy==2.4.4
 semantic-version==2.10.0
diff --git a/files/build/versions/host-image/versions-py3-all-arm64 b/files/build/versions/host-image/versions-py3-all-arm64
new file mode 100644
index 000000000..cf39afa6b
--- /dev/null
+++ b/files/build/versions/host-image/versions-py3-all-arm64
@@ -0,0 +1 @@
+pyyaml==6.0.1
diff --git a/files/build/versions/host-image/versions-py3-all-armhf b/files/build/versions/host-image/versions-py3-all-armhf
index fe39c407f..947ac1b16 100644
--- a/files/build/versions/host-image/versions-py3-all-armhf
+++ b/files/build/versions/host-image/versions-py3-all-armhf
@@ -1 +1,2 @@
 pygobject==3.42.2
+pyyaml==6.0.1

From c3899ef2eadaddf8929b60787739c91287b937e7 Mon Sep 17 00:00:00 2001
From: Liu Shilong <shilongliu@microsoft.com>
Date: Thu, 25 Apr 2024 10:49:06 +0800
Subject: [PATCH 0479/1115] [build] Fix bookworm reproducible build issue.
 (#18789)

Why I did it
Bookworm involved new file /etc/apt/sources.list.d/debian.sources to setup debian mirror repo.
Reproducible build need to support this scenario.

Work item tracking
Microsoft ADO (number only): 27792318
How I did it
How to verify it
---
 src/sonic-build-hooks/scripts/buildinfo_base.sh | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/src/sonic-build-hooks/scripts/buildinfo_base.sh b/src/sonic-build-hooks/scripts/buildinfo_base.sh
index 37a84a0c6..bb64a2466 100755
--- a/src/sonic-build-hooks/scripts/buildinfo_base.sh
+++ b/src/sonic-build-hooks/scripts/buildinfo_base.sh
@@ -123,6 +123,12 @@ set_reproducible_mirrors()
         expression2="/^#*deb.*$REPR_MIRROR_URL_PATTERN/! s/^#\s*(#*deb)/\1/"
         expression3="/#SET_REPR_MIRRORS/d"
     fi
+    if [[ "$1" != "-d" ]] && [ -f /etc/apt/sources.list.d/debian.sources ]; then
+        mv /etc/apt/sources.list.d/debian.sources /etc/apt/sources.list.d/debian.sources.back
+    fi
+    if [[ "$1" == "-d" ]] && [ -f /etc/apt/sources.list.d/debian.sources.back ]; then
+        mv /etc/apt/sources.list.d/debian.sources.back /etc/apt/sources.list.d/debian.sources
+    fi
 
     local mirrors="/etc/apt/sources.list $(find /etc/apt/sources.list.d/ -type f)"
     for mirror in $mirrors; do

From bca7cbe009b081a7adc3598a5185e64bd0d65e82 Mon Sep 17 00:00:00 2001
From: Vivek <vivekreddykarri98@gmail.com>
Date: Wed, 24 Apr 2024 22:47:37 -0700
Subject: [PATCH 0480/1115] [Mellanox] Upgrade syncd, syncd-rpc and saiserver
 to bookworm (#18651)

- Why I did it
Upgrade Mellanox (syncd/syncd-rpc/saiserver) containers to Bookworm

- How to verify it
Compile successfully and run sonic-mgmt tests
Manual Verification and Regression tests

Signed-off-by: Vivek Reddy Karri <vkarri@nvidia.com>
---
 platform/mellanox/docker-saiserver-mlnx.mk    |  4 +-
 .../docker-saiserver-mlnx/Dockerfile.j2       |  4 +-
 platform/mellanox/docker-syncd-mlnx-rpc.mk    |  5 ++-
 .../docker-syncd-mlnx-rpc/Dockerfile.j2       | 40 ++++++++++---------
 platform/mellanox/docker-syncd-mlnx.mk        |  2 +-
 .../mellanox/docker-syncd-mlnx/Dockerfile.j2  |  2 +-
 platform/mellanox/iproute2.mk                 |  4 +-
 ...01-Remove-arpd-from-iproute2-package.patch | 17 ++++----
 .../0002-Rename-iproute2-debian-package.patch | 23 ++++++-----
 .../patch/0003-Fix-version-identifier.patch   | 19 ---------
 platform/mellanox/iproute2/patch/series       |  1 -
 platform/mellanox/libsaithrift-dev.mk         |  3 --
 platform/mellanox/rules.mk                    |  2 +
 sonic-slave-bookworm/Dockerfile.j2            |  6 +++
 14 files changed, 62 insertions(+), 70 deletions(-)
 delete mode 100644 platform/mellanox/iproute2/patch/0003-Fix-version-identifier.patch

diff --git a/platform/mellanox/docker-saiserver-mlnx.mk b/platform/mellanox/docker-saiserver-mlnx.mk
index 74fb96f91..f0ebfe225 100644
--- a/platform/mellanox/docker-saiserver-mlnx.mk
+++ b/platform/mellanox/docker-saiserver-mlnx.mk
@@ -20,10 +20,10 @@ DOCKER_SAISERVER_MLNX = docker-saiserver$(SAITHRIFT_VER)-mlnx.gz
 $(DOCKER_SAISERVER_MLNX)_PATH = $(PLATFORM_PATH)/docker-saiserver-mlnx
 $(DOCKER_SAISERVER_MLNX)_DEPENDS += $(SAISERVER) $(PYTHON_SDK_API)
 $(DOCKER_SAISERVER_MLNX)_PYTHON_DEBS += $(MLNX_SFPD)
-$(DOCKER_SAISERVER_MLNX)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE_BULLSEYE)
+$(DOCKER_SAISERVER_MLNX)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE_BOOKWORM)
 SONIC_DOCKER_IMAGES += $(DOCKER_SAISERVER_MLNX)
 $(DOCKER_SAISERVER_MLNX)_CONTAINER_NAME = saiserver$(SAITHRIFT_VER)
-SONIC_BULLSEYE_DOCKERS += $(DOCKER_SAISERVER_MLNX)
+SONIC_BOOKWORM_DOCKERS += $(DOCKER_SAISERVER_MLNX)
 
 $(DOCKER_SAISERVER_MLNX)_RUN_OPT += --privileged -t
 $(DOCKER_SAISERVER_MLNX)_RUN_OPT += -v /host/machine.conf:/etc/machine.conf
diff --git a/platform/mellanox/docker-saiserver-mlnx/Dockerfile.j2 b/platform/mellanox/docker-saiserver-mlnx/Dockerfile.j2
index 40cf0634b..a57f6bfb9 100644
--- a/platform/mellanox/docker-saiserver-mlnx/Dockerfile.j2
+++ b/platform/mellanox/docker-saiserver-mlnx/Dockerfile.j2
@@ -15,7 +15,7 @@
 ## limitations under the License.
 ##
 {% from "dockers/dockerfile-macros.j2" import install_debian_packages %}
-FROM docker-config-engine-bullseye-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}}
+FROM docker-config-engine-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}}
 
 ARG docker_container_name
 
@@ -40,7 +40,7 @@ python-debs/{{ deb }}{{' '}}
 {%- endfor -%}
 debs/
 
-RUN apt-get install -y --no-install-recommends libxml2 iptables libbsd0 protobuf-c-compiler protobuf-compiler python3-protobuf libprotobuf-c1 python3-future python3-ipaddr libnet1 pkg-config asciidoc xmlto
+RUN apt-get install -y --no-install-recommends libxml2 iptables libbsd0 protobuf-c-compiler protobuf-compiler python3-protobuf libprotobuf-c1 python3-future libnet1 pkg-config asciidoc xmlto
 
 {{ install_debian_packages(docker_saiserver_mlnx_debs.split(' ')) }}
 
diff --git a/platform/mellanox/docker-syncd-mlnx-rpc.mk b/platform/mellanox/docker-syncd-mlnx-rpc.mk
index 9d6ce4bc6..d3f66702f 100644
--- a/platform/mellanox/docker-syncd-mlnx-rpc.mk
+++ b/platform/mellanox/docker-syncd-mlnx-rpc.mk
@@ -18,7 +18,8 @@
 
 DOCKER_SYNCD_MLNX_RPC = docker-syncd-mlnx-rpc.gz
 $(DOCKER_SYNCD_MLNX_RPC)_PATH = $(PLATFORM_PATH)/docker-syncd-mlnx-rpc
-$(DOCKER_SYNCD_MLNX_RPC)_DEPENDS += $(SYNCD_RPC) $(LIBTHRIFT) $(PTF)
+$(DOCKER_SYNCD_MLNX_RPC)_PYTHON_WHEELS += $(PTF_PY3)
+$(DOCKER_SYNCD_MLNX_RPC)_DEPENDS += $(SYNCD_RPC)
 $(DOCKER_SYNCD_MLNX_RPC)_FILES += $(SUPERVISOR_PROC_EXIT_LISTENER_SCRIPT)
 ifeq ($(INSTALL_DEBUG_TOOLS), y)
 $(DOCKER_SYNCD_MLNX_RPC)_DEPENDS += $(SYNCD_RPC_DBG) \
@@ -30,7 +31,7 @@ endif
 $(DOCKER_SYNCD_MLNX_RPC)_PYTHON_DEBS += $(MLNX_SFPD)
 $(DOCKER_SYNCD_MLNX_RPC)_LOAD_DOCKERS += $(DOCKER_SYNCD_BASE)
 SONIC_DOCKER_IMAGES += $(DOCKER_SYNCD_MLNX_RPC)
-SONIC_BULLSEYE_DOCKERS += $(DOCKER_SYNCD_MLNX_RPC)
+SONIC_BOOKWORM_DOCKERS += $(DOCKER_SYNCD_MLNX_RPC)
 ifeq ($(ENABLE_SYNCD_RPC),y)
 SONIC_INSTALL_DOCKER_IMAGES += $(DOCKER_SYNCD_MLNX_RPC)
 endif
diff --git a/platform/mellanox/docker-syncd-mlnx-rpc/Dockerfile.j2 b/platform/mellanox/docker-syncd-mlnx-rpc/Dockerfile.j2
index 511e360cb..a73879487 100644
--- a/platform/mellanox/docker-syncd-mlnx-rpc/Dockerfile.j2
+++ b/platform/mellanox/docker-syncd-mlnx-rpc/Dockerfile.j2
@@ -39,15 +39,15 @@ RUN apt-get update        \
     python3-pip           \
     python3-dev           \
     python-is-python3     \
-    python3-setuptools
+    python3-scapy         \
+    libnanomsg5           \
+    libnanomsg-dev        \
+    libthrift-0.17.0      \
+    thrift-compiler       \
+    python3-thrift
 
 RUN pip3 install --upgrade pip
 
-# Build and install python-scapy
-RUN curl http://ftp.us.debian.org/debian/pool/main/s/scapy/python3-scapy_2.4.0-2_all.deb --output python3-scapy_2.4.0-2_all.deb \
- && dpkg -i python3-scapy_2.4.0-2_all.deb \
- && apt install -f
-
 {% if docker_syncd_mlnx_rpc_debs.strip() -%}
 # Copy locally-built Debian package dependencies
 {{ copy_files("debs/", docker_syncd_mlnx_rpc_debs.split(' '), "/debs/") }}
@@ -68,29 +68,33 @@ RUN curl http://ftp.us.debian.org/debian/pool/main/s/scapy/python3-scapy_2.4.0-2
 {{ install_debian_packages(docker_syncd_mlnx_rpc_pydebs.split(' ')) }}
 {% endif %}
 
-RUN wget https://github.com/nanomsg/nanomsg/archive/1.0.0.tar.gz \
- && tar xvfz 1.0.0.tar.gz \
- && cd nanomsg-1.0.0    \
- && mkdir -p build      \
- && cmake .             \
- && make install        \
- && ldconfig            \
- && cd ..               \
- && rm -fr nanomsg-1.0.0 \
- && rm -f 1.0.0.tar.gz  \
- && pip3 install cffi==1.16.0    \
+RUN pip3 install cffi==1.16.0    \
  && pip3 install wheel  \
  && pip3 install nnpy   \
- && pip3 install ptf    \
  && mkdir -p /opt       \
  && cd /opt             \
  && wget https://raw.githubusercontent.com/p4lang/ptf/master/ptf_nn/ptf_nn_agent.py \
  && apt-get clean -y; apt-get autoclean -y; apt-get autoremove -y \
  && rm -rf /root/deps
 
+{% if docker_syncd_mlnx_rpc_whls.strip() -%}
+# Copy locally-built Python wheel dependencies
+{{ copy_files("python-wheels/", docker_syncd_mlnx_rpc_whls.split(' '), "/python-wheels/") }}
+# Install locally-built Python wheel dependencies
+{{ install_python_wheels(docker_syncd_mlnx_rpc_whls.split(' ')) }}
+{% endif %}
+
 COPY ["ptf_nn_agent.conf", "/etc/supervisor/conf.d/"]
 
 ## Clean up
+RUN apt-get -y purge \
+    cmake            \
+    libssl-dev       \
+    libffi-dev       \
+    python3-dev      \
+    libthrift-dev    \
+    build-essential
+
 RUN apt-get clean -y && \
     apt-get autoclean -y && \
     apt-get autoremove -y && \
diff --git a/platform/mellanox/docker-syncd-mlnx.mk b/platform/mellanox/docker-syncd-mlnx.mk
index 678a45fa8..7dd1c7766 100644
--- a/platform/mellanox/docker-syncd-mlnx.mk
+++ b/platform/mellanox/docker-syncd-mlnx.mk
@@ -17,7 +17,7 @@
 # docker image for mlnx syncd
 
 DOCKER_SYNCD_PLATFORM_CODE = mlnx
-include $(PLATFORM_PATH)/../template/docker-syncd-bullseye.mk
+include $(PLATFORM_PATH)/../template/docker-syncd-bookworm.mk
 
 $(DOCKER_SYNCD_BASE)_DEPENDS += $(SYNCD) $(PYTHON_SDK_API) $(MFT) $(MFT_FWTRACE_CFG) $(IPROUTE2_MLNX)
 
diff --git a/platform/mellanox/docker-syncd-mlnx/Dockerfile.j2 b/platform/mellanox/docker-syncd-mlnx/Dockerfile.j2
index bdc51abca..adb74ee41 100755
--- a/platform/mellanox/docker-syncd-mlnx/Dockerfile.j2
+++ b/platform/mellanox/docker-syncd-mlnx/Dockerfile.j2
@@ -15,7 +15,7 @@
 ## limitations under the License.
 ##
 {% from "dockers/dockerfile-macros.j2" import install_debian_packages, install_python_wheels, copy_files %}
-FROM docker-config-engine-bullseye-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}}
+FROM docker-config-engine-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}}
 
 ARG docker_container_name
 
diff --git a/platform/mellanox/iproute2.mk b/platform/mellanox/iproute2.mk
index 98866c464..2b71476ea 100644
--- a/platform/mellanox/iproute2.mk
+++ b/platform/mellanox/iproute2.mk
@@ -15,8 +15,8 @@
 # limitations under the License.
 #
 
-IPROUTE2_MLNX_VERSION = 5.10.0
-IPROUTE2_MLNX_VERSION_FULL = $(IPROUTE2_MLNX_VERSION)-4~bpo10+1
+IPROUTE2_MLNX_VERSION = 6.1.0
+IPROUTE2_MLNX_VERSION_FULL = $(IPROUTE2_MLNX_VERSION)-3
 
 export IPROUTE2_MLNX_VERSION
 export IPROUTE2_MLNX_VERSION_FULL
diff --git a/platform/mellanox/iproute2/patch/0001-Remove-arpd-from-iproute2-package.patch b/platform/mellanox/iproute2/patch/0001-Remove-arpd-from-iproute2-package.patch
index 7f9e8981c..8444c50f8 100644
--- a/platform/mellanox/iproute2/patch/0001-Remove-arpd-from-iproute2-package.patch
+++ b/platform/mellanox/iproute2/patch/0001-Remove-arpd-from-iproute2-package.patch
@@ -1,8 +1,9 @@
-From 28e58b34f1168de182c37eff640180b6064a800d Mon Sep 17 00:00:00 2001
-From: liora <liora@nvidia.com>
-Date: Tue, 18 Apr 2023 13:01:16 +0000
-Subject: [PATCH 1/1] Remove arpd from iproute2 package
+From 9b10f163354059a6b6cc2029ded5275f871f23e8 Mon Sep 17 00:00:00 2001
+From: Vivek Reddy <vkarri@nvidia.com>
+Date: Fri, 26 Jan 2024 06:54:14 +0000
+Subject: [PATCH 1/2] Remove arpd from iproute2 package
 
+Signed-off-by: Vivek Reddy <vkarri@nvidia.com>
 ---
  debian/control          | 3 +--
  debian/iproute2.install | 1 -
@@ -10,7 +11,7 @@ Subject: [PATCH 1/1] Remove arpd from iproute2 package
  3 files changed, 1 insertion(+), 7 deletions(-)
 
 diff --git a/debian/control b/debian/control
-index b5e8b0a..e735c26 100644
+index f3a49a8..adc66c4 100644
 --- a/debian/control
 +++ b/debian/control
 @@ -28,8 +28,7 @@ Build-Depends: bison,
@@ -24,7 +25,7 @@ index b5e8b0a..e735c26 100644
  Depends: ${misc:Depends}, ${shlibs:Depends}, libcap2-bin,
  Recommends: ${ipmods:Recommends}
 diff --git a/debian/iproute2.install b/debian/iproute2.install
-index f9e8c26..fba201d 100644
+index f93b273..b017b44 100644
 --- a/debian/iproute2.install
 +++ b/debian/iproute2.install
 @@ -1,6 +1,5 @@
@@ -32,8 +33,8 @@ index f9e8c26..fba201d 100644
  usr/include/iproute2/
 -sbin/arpd /usr/sbin
  sbin/bridge
+ sbin/dcb
  sbin/devlink
- sbin/genl /usr/sbin
 diff --git a/misc/Makefile b/misc/Makefile
 index 50dae79..1f3898f 100644
 --- a/misc/Makefile
@@ -50,5 +51,5 @@ index 50dae79..1f3898f 100644
  
  ss: $(SSOBJ)
 -- 
-2.30.2
+2.17.1
 
diff --git a/platform/mellanox/iproute2/patch/0002-Rename-iproute2-debian-package.patch b/platform/mellanox/iproute2/patch/0002-Rename-iproute2-debian-package.patch
index 7ff1aec6f..950fc776e 100644
--- a/platform/mellanox/iproute2/patch/0002-Rename-iproute2-debian-package.patch
+++ b/platform/mellanox/iproute2/patch/0002-Rename-iproute2-debian-package.patch
@@ -1,8 +1,9 @@
-From 6676c4a200df54a06c96faa9a30baaefc61a91b5 Mon Sep 17 00:00:00 2001
-From: liora <liora@nvidia.com>
-Date: Thu, 27 Apr 2023 03:34:10 +0000
-Subject: [PATCH 1/1] Rename iproute2 debian package
+From e21c49764de5efc4b53685815837a74de37538f3 Mon Sep 17 00:00:00 2001
+From: Vivek Reddy <vkarri@nvidia.com>
+Date: Fri, 26 Jan 2024 06:59:51 +0000
+Subject: [PATCH 2/2] Rename iproute2 debian package
 
+Signed-off-by: Vivek Reddy <vkarri@nvidia.com>
 ---
  debian/control                                     | 4 ++--
  debian/{iproute2.install => iproute2-mlnx.install} | 0
@@ -11,7 +12,7 @@ Subject: [PATCH 1/1] Rename iproute2 debian package
  rename debian/{iproute2.install => iproute2-mlnx.install} (100%)
 
 diff --git a/debian/control b/debian/control
-index e735c26..4b03a6f 100644
+index adc66c4..0eb5988 100644
 --- a/debian/control
 +++ b/debian/control
 @@ -25,11 +25,11 @@ Build-Depends: bison,
@@ -27,24 +28,24 @@ index e735c26..4b03a6f 100644
 +Replaces: iproute, iproute2
  Depends: ${misc:Depends}, ${shlibs:Depends}, libcap2-bin,
  Recommends: ${ipmods:Recommends}
- Suggests: iproute2-doc
+ Suggests: iproute2-doc, python3:any
 diff --git a/debian/iproute2.install b/debian/iproute2-mlnx.install
 similarity index 100%
 rename from debian/iproute2.install
 rename to debian/iproute2-mlnx.install
 diff --git a/debian/rules b/debian/rules
-index d940d3c..8bd4f84 100755
+index 4c93c86..4489d2c 100755
 --- a/debian/rules
 +++ b/debian/rules
-@@ -34,7 +34,7 @@ override_dh_clean:
+@@ -33,7 +33,7 @@ execute_after_dh_clean:
  
  override_dh_shlibdeps:
  	dh_shlibdeps -a -Xq_atm.so -Xm_xt.so -Xm_ipt.so
--	dh_shlibdeps -a -- -pipmods -dRecommends -e debian/iproute2/usr/lib/tc/m_xt.so -e debian/iproute2/usr/lib/tc/q_atm.so -xlibc6
-+	dh_shlibdeps -a -- -pipmods -dRecommends -e debian/iproute2-mlnx/usr/lib/tc/m_xt.so -e debian/iproute2-mlnx/usr/lib/tc/q_atm.so -xlibc6
+-	dh_shlibdeps -a -- -pipmods -dRecommends -e debian/iproute2/usr/lib/$(DEB_HOST_MULTIARCH)/tc/m_xt.so -e debian/iproute2/usr/lib/$(DEB_HOST_MULTIARCH)/tc/q_atm.so -xlibc6
++	dh_shlibdeps -a -- -pipmods -dRecommends -e debian/iproute2-mlnx/usr/lib/$(DEB_HOST_MULTIARCH)/tc/m_xt.so -e debian/iproute2-mlnx/usr/lib/$(DEB_HOST_MULTIARCH)/tc/q_atm.so -xlibc6
  
  override_dh_auto_test:
  	# upstream test suite needs root and leaves machine unclean, skip it
 -- 
-2.30.2
+2.17.1
 
diff --git a/platform/mellanox/iproute2/patch/0003-Fix-version-identifier.patch b/platform/mellanox/iproute2/patch/0003-Fix-version-identifier.patch
deleted file mode 100644
index 6fe738a6a..000000000
--- a/platform/mellanox/iproute2/patch/0003-Fix-version-identifier.patch
+++ /dev/null
@@ -1,19 +0,0 @@
-From e10409ea82c16c0e48316a0b4d71a0f649f92a54 Mon Sep 17 00:00:00 2001
-From: liora <liora@nvidia.com>
-Date: Mon, 17 Apr 2023 05:17:27 +0000
-Subject: [PATCH 1/1] Fix version identifier
-
----
- include/version.h | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/include/version.h b/include/version.h
-index 89d0597..cf7afbb 100644
---- a/include/version.h
-+++ b/include/version.h
-@@ -1 +1 @@
--static const char version[] = "5.9.0";
-+static const char version[] = "5.10.0";
--- 
-2.30.2
-
diff --git a/platform/mellanox/iproute2/patch/series b/platform/mellanox/iproute2/patch/series
index cc49aa3df..47f3f80d2 100644
--- a/platform/mellanox/iproute2/patch/series
+++ b/platform/mellanox/iproute2/patch/series
@@ -1,4 +1,3 @@
 0001-Remove-arpd-from-iproute2-package.patch
 0002-Rename-iproute2-debian-package.patch
-0003-Fix-version-identifier.patch
 
diff --git a/platform/mellanox/libsaithrift-dev.mk b/platform/mellanox/libsaithrift-dev.mk
index 1ae8453d4..2bbff075f 100644
--- a/platform/mellanox/libsaithrift-dev.mk
+++ b/platform/mellanox/libsaithrift-dev.mk
@@ -20,9 +20,6 @@ SAI_VER = 0.9.4
 
 LIBSAITHRIFT_DEV = libsaithrift$(SAITHRIFT_VER)-dev_$(SAI_VER)_$(CONFIGURED_ARCH).deb
 $(LIBSAITHRIFT_DEV)_SRC_PATH = $(SRC_PATH)/sonic-sairedis/SAI
-$(LIBSAITHRIFT_DEV)_DEPENDS += $(LIBTHRIFT) $(LIBTHRIFT_DEV) $(PYTHON_THRIFT) $(THRIFT_COMPILER)
-$(LIBSAITHRIFT_DEV)_RDEPENDS += $(LIBTHRIFT)
-$(LIBSAITHRIFT_DEV)_BUILD_ENV = SAITHRIFT_VER=v2 # Workaround to use python3 in build
 $(LIBSAITHRIFT_DEV)_DEPENDS += $(MLNX_SAI) $(MLNX_SAI_DEV)
 $(LIBSAITHRIFT_DEV)_RDEPENDS += $(MLNX_SAI)
 
diff --git a/platform/mellanox/rules.mk b/platform/mellanox/rules.mk
index 2c598ab7d..69bad6725 100644
--- a/platform/mellanox/rules.mk
+++ b/platform/mellanox/rules.mk
@@ -44,6 +44,8 @@ $(SYNCD)_DEPENDS += $(MLNX_SAI)
 $(SYNCD)_UNINSTALLS += $(MLNX_SAI)
 
 ifeq ($(ENABLE_SYNCD_RPC),y)
+# Remove the libthrift_0.11.0 dependency injected by rules/syncd.mk
+$(SYNCD)_DEPENDS := $(filter-out $(LIBTHRIFT_DEV),$($(SYNCD)_DEPENDS))
 $(SYNCD)_DEPENDS += $(LIBSAITHRIFT_DEV)
 endif
 
diff --git a/sonic-slave-bookworm/Dockerfile.j2 b/sonic-slave-bookworm/Dockerfile.j2
index fd88a9a07..18a64a620 100644
--- a/sonic-slave-bookworm/Dockerfile.j2
+++ b/sonic-slave-bookworm/Dockerfile.j2
@@ -590,6 +590,12 @@ RUN update-alternatives --set iptables /usr/sbin/iptables-legacy
 # Install m2crypto package, needed by SWI tools
 RUN apt-get install python3-m2crypto
 
+# Install libthrift package needed by saithrift
+RUN apt-get install  libthrift-0.17 \
+        libthrift-dev \
+        thrift-compiler\
+        python3-thrift
+
 # Install swi tools
 RUN pip3 install git+https://github.com/aristanetworks/swi-tools.git@bead66bf261770237f7dd21ace3774ba04a017e9
 

From 6f86bc2098bca115ab0e7b2760d414dc435d0298 Mon Sep 17 00:00:00 2001
From: Yaqiang Zhu <zyq1512099831@gmail.com>
Date: Thu, 25 Apr 2024 23:55:26 +0800
Subject: [PATCH 0481/1115] [bgp] Add bgp_router_id in DEVICE_METADATA (#18534)

---
 src/sonic-yang-models/doc/Configuration.md     |  3 ++-
 .../tests/files/sample_config_db.json          |  3 ++-
 .../tests/device_metadata.json                 |  7 +++++++
 .../tests_config/device_metadata.json          | 18 ++++++++++++++++++
 .../yang-models/sonic-device_metadata.yang     |  5 +++++
 5 files changed, 34 insertions(+), 2 deletions(-)

diff --git a/src/sonic-yang-models/doc/Configuration.md b/src/sonic-yang-models/doc/Configuration.md
index 8558142e6..9980773a7 100644
--- a/src/sonic-yang-models/doc/Configuration.md
+++ b/src/sonic-yang-models/doc/Configuration.md
@@ -959,7 +959,8 @@ instance is supported in SONiC.
         "buffer_model": "traditional",
         "yang_config_validation": "disable",
         "rack_mgmt_map": "dummy_value",
-        "timezome": "Europe/Kiev"
+        "timezome": "Europe/Kiev",
+        "bgp_router_id": "8.8.8.8"
     }
   }
 }
diff --git a/src/sonic-yang-models/tests/files/sample_config_db.json b/src/sonic-yang-models/tests/files/sample_config_db.json
index eaf110d88..1e9ed06c2 100644
--- a/src/sonic-yang-models/tests/files/sample_config_db.json
+++ b/src/sonic-yang-models/tests/files/sample_config_db.json
@@ -368,7 +368,8 @@
                 "bgp_adv_lo_prefix_as_128": "true",
                 "yang_config_validation": "disable",
                 "rack_mgmt_map": "dummy_value",
-                "timezone": "Europe/Kiev"
+                "timezone": "Europe/Kiev",
+                "bgp_router_id": "8.8.8.8"
             }
         },
         "VLAN": {
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/device_metadata.json b/src/sonic-yang-models/tests/yang_model_tests/tests/device_metadata.json
index 1542407f5..226107109 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests/device_metadata.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests/device_metadata.json
@@ -162,5 +162,12 @@
     "DEVICE_METADATA_INVALID_CREATE_ONLY_CONFIG_DB_BUFFERS": {
         "desc": "Verifying invalid create_only_config_db_buffers value",
         "eStrKey": "InvalidValue"
+    },
+    "DEVICE_METADATA_VALID_BGP_ROUTER_ID": {
+        "desc": "Verifying bgp_router_id configuration."
+    },
+    "DEVICE_METADATA_INVALID_BGP_ROUTER_ID": {
+        "desc": "Verifying invalid bgp_router_id configuration.",
+        "eStrKey": "Pattern"
     }
 }
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/device_metadata.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/device_metadata.json
index 0c33f93b6..cda0eef26 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/device_metadata.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/device_metadata.json
@@ -444,5 +444,23 @@
                 }
             }
         }
+    },
+    "DEVICE_METADATA_VALID_BGP_ROUTER_ID": {
+        "sonic-device_metadata:sonic-device_metadata": {
+            "sonic-device_metadata:DEVICE_METADATA": {
+                "sonic-device_metadata:localhost": {
+                    "bgp_router_id": "8.8.8.8"
+                }
+            }
+        }
+    },
+    "DEVICE_METADATA_INVALID_BGP_ROUTER_ID": {
+        "sonic-device_metadata:sonic-device_metadata": {
+            "sonic-device_metadata:DEVICE_METADATA": {
+                "sonic-device_metadata:localhost": {
+                    "bgp_router_id": "8.8.8.300"
+                }
+            }
+        }
     }
 }
diff --git a/src/sonic-yang-models/yang-models/sonic-device_metadata.yang b/src/sonic-yang-models/yang-models/sonic-device_metadata.yang
index dce3db154..02f81283c 100644
--- a/src/sonic-yang-models/yang-models/sonic-device_metadata.yang
+++ b/src/sonic-yang-models/yang-models/sonic-device_metadata.yang
@@ -249,6 +249,11 @@ module sonic-device_metadata {
                                  otherwise the maximum available buffers (which are read from SAI) will be
                                  created, regardless of the CONFIG_DB buffers configuration.";
                 }
+
+                leaf bgp_router_id {
+                    type inet:ipv4-address;
+                    description "BGP Router identifier";
+                }
             }
             /* end of container localhost */
         }

From 018b3f00c412fe7fadff927115487a221037dab6 Mon Sep 17 00:00:00 2001
From: Deepak Singhal <115033986+deepak-singhal0408@users.noreply.github.com>
Date: Thu, 25 Apr 2024 17:29:17 -0700
Subject: [PATCH 0482/1115] Copy .profile files to already existing hw_sku
 directories under device/virtual (#18803)

Fix regression in sonic-swss dvs tests

Microsoft ADO (number only): 27817304

How I did it
Restore the .profile files back to already existing hw_sku directories under platform/virtual
copy lanemap.ini file in DPU_2P hwsku
---
 device/virtual/x86_64-kvm_x86_64-r0/DPU-2P/lanemap.ini | 2 ++
 src/sonic-device-data/Makefile                         | 4 ++++
 2 files changed, 6 insertions(+)
 create mode 100644 device/virtual/x86_64-kvm_x86_64-r0/DPU-2P/lanemap.ini

diff --git a/device/virtual/x86_64-kvm_x86_64-r0/DPU-2P/lanemap.ini b/device/virtual/x86_64-kvm_x86_64-r0/DPU-2P/lanemap.ini
new file mode 100644
index 000000000..0967d7eb6
--- /dev/null
+++ b/device/virtual/x86_64-kvm_x86_64-r0/DPU-2P/lanemap.ini
@@ -0,0 +1,2 @@
+eth1:0,1,2,3
+eth2:4,5,6,7
diff --git a/src/sonic-device-data/Makefile b/src/sonic-device-data/Makefile
index 5473650e7..298f8f630 100644
--- a/src/sonic-device-data/Makefile
+++ b/src/sonic-device-data/Makefile
@@ -18,6 +18,10 @@ $(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% :
 	for d in `find -L ../../../device -maxdepth 3 -mindepth 3 -type d | grep -vE "(plugins|led-code|sonic_platform)"`; do \
 		# check if hwsku dir exists, if yes, then continue
 		if [ -d device/x86_64-kvm_x86_64-r0/$$(basename $$d) ]; then \
+			cp ./sai.vs_profile device/x86_64-kvm_x86_64-r0/$$(basename $$d)/sai.profile; \
+			cp ./sai_mlnx.vs_profile device/x86_64-kvm_x86_64-r0/$$(basename $$d)/sai_mlnx.profile; \
+			cp ./pai.vs_profile device/x86_64-kvm_x86_64-r0/$$(basename $$d)/pai.profile; \
+			cp ./fabriclanemap_vs.ini device/x86_64-kvm_x86_64-r0/$$(basename $$d)/fabriclanemap.ini; \
 			continue; \
 		fi; \
 		cp -Lr $$d device/x86_64-kvm_x86_64-r0/ ; \

From bcc020b35ab54aeb30842de2cc3e8a0841c3db59 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Fri, 26 Apr 2024 16:01:18 +0800
Subject: [PATCH 0483/1115] [submodule] Update submodule sonic-platform-common
 to the latest HEAD automatically (#18780)

#### Why I did it
src/sonic-platform-common
```
* 4163365 - (HEAD -> master, origin/master, origin/HEAD) Fetch firmware versions for Cmis Target FW upgrade supported cables (#455) (10 hours ago) [mihirpat1]
* df6b6c6 - parse the output from the beginning of the line (#451) (2 days ago) [Kebo Liu]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-platform-common | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-platform-common b/src/sonic-platform-common
index dff8d4867..4163365b9 160000
--- a/src/sonic-platform-common
+++ b/src/sonic-platform-common
@@ -1 +1 @@
-Subproject commit dff8d48677836b95e788c410de404d48637bb1c1
+Subproject commit 4163365b97a8a2cb80dc895dcada1a51b5347fd3

From bd35da1e983bf3808ee0e69d74a462e2855bb8a7 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Fri, 26 Apr 2024 16:01:51 +0800
Subject: [PATCH 0484/1115] [submodule] Update submodule sonic-swss to the
 latest HEAD automatically (#18747)

#### Why I did it
src/sonic-swss
```
* 5ef73708 - (HEAD -> master, origin/master, origin/HEAD) [ACL] Remove flex counter when updating ACL rule (#3118) (3 days ago) [bingwang-ms]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-swss | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-swss b/src/sonic-swss
index 9e183a650..5ef737087 160000
--- a/src/sonic-swss
+++ b/src/sonic-swss
@@ -1 +1 @@
-Subproject commit 9e183a650cf38e0d5af46adc1342dcde85ecb84d
+Subproject commit 5ef737087a15f23d2038ca840e935f402ad92f31

From 75f0011ed895c5a975560a71a44a91974624decb Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Fri, 26 Apr 2024 16:01:56 +0800
Subject: [PATCH 0485/1115] [submodule] Update submodule sonic-mgmt-framework
 to the latest HEAD automatically (#18746)

#### Why I did it
src/sonic-mgmt-framework
```
* 0a5962d - (HEAD -> master, origin/master, origin/HEAD) Bookworm migration for all dependency packages in azurepipeline for sonic-mgmt-framework (#132) (3 days ago) [amrutasali]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-mgmt-framework | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-mgmt-framework b/src/sonic-mgmt-framework
index 1cd794798..0a5962da2 160000
--- a/src/sonic-mgmt-framework
+++ b/src/sonic-mgmt-framework
@@ -1 +1 @@
-Subproject commit 1cd79479882174c14f06c73fa0613fb093a6f421
+Subproject commit 0a5962da21cdf0cf541a9198149c31e90cde5f4c

From e66185ef3073de494c2dbb1fb6ec18e9eb490a6a Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Fri, 26 Apr 2024 16:02:02 +0800
Subject: [PATCH 0486/1115] [submodule] Update submodule sonic-mgmt-common to
 the latest HEAD automatically (#18745)

#### Why I did it
src/sonic-mgmt-common
```
* 5f1191e - (HEAD -> master, origin/master, origin/HEAD) Transformer Infra support for sonic yang structure deviations from flattened structure - sibling list to singleton container and nested list (#129) (33 hours ago) [amrutasali]
* 8719034 - Bookworm migration for all dependency packages in azurepipeline for sonic-mgmt-common repo (#133) (3 days ago) [amrutasali]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-mgmt-common | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-mgmt-common b/src/sonic-mgmt-common
index 72e0df920..5f1191e61 160000
--- a/src/sonic-mgmt-common
+++ b/src/sonic-mgmt-common
@@ -1 +1 @@
-Subproject commit 72e0df92061c794eae170f299fc8f1bba3881a94
+Subproject commit 5f1191e61bef38b66655fbeac8e94bfe2c4710b8

From ef3273861c39fb8b4300147cbdf182e889ae721d Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Fri, 26 Apr 2024 16:02:08 +0800
Subject: [PATCH 0487/1115] [submodule] Update submodule sonic-platform-daemons
 to the latest HEAD automatically (#18738)

#### Why I did it
src/sonic-platform-daemons
```
* 759862e - (HEAD -> master, origin/master, origin/HEAD) [Xcvrd] Skip to get dom/threshold/pm for flat memory (#458) (4 days ago) [ChiouRung Haung]
* 4533780 - [PSUd]Update predefined position_in_parent and parent_name of PSU only once (#452) (4 days ago) [PJHsieh]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-platform-daemons | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-platform-daemons b/src/sonic-platform-daemons
index 0f61e1522..759862e6d 160000
--- a/src/sonic-platform-daemons
+++ b/src/sonic-platform-daemons
@@ -1 +1 @@
-Subproject commit 0f61e15220113b4f5df13d0eb2bdb9a92833baf4
+Subproject commit 759862e6db350db27e772bd65c36211f9b5f246f

From ffe06fbddb3e6766918be20fa380ea0db37c8a7b Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Fri, 26 Apr 2024 16:02:14 +0800
Subject: [PATCH 0488/1115] [submodule] Update submodule sonic-gnmi to the
 latest HEAD automatically (#18724)

#### Why I did it
src/sonic-gnmi
```
* d0ec8b0 - (HEAD -> master, origin/master, origin/HEAD) Merge pull request #216 from ranjinidn/sonic-gnmi_bookworm_migration (30 hours ago) [Saikrishna Arcot]
|\
| failure_prs.log 8e3f408 - Merge branch 'master' into sonic-gnmi_bookworm_migration (6 days ago) [ranjinidn]
| |\
| |/
|/|
* | 3363587 - Support control character in config (#217) (8 days ago) [ganglv]
 /
* 505bfc2 - bookworm migration of sonic-gnmi azure pipeline and go version updation for sonic-gnmi repo (10 days ago) [ranjinidn]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-gnmi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-gnmi b/src/sonic-gnmi
index 6b63a50c6..d0ec8b0dc 160000
--- a/src/sonic-gnmi
+++ b/src/sonic-gnmi
@@ -1 +1 @@
-Subproject commit 6b63a50c68165f26cfd930a154c77efd97d85ab1
+Subproject commit d0ec8b0dcb1a546b07cda70a10ee6537ff5096fd

From d9c2f9a74245bca19d0b6636d92163e83efe2d68 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Fri, 26 Apr 2024 16:02:21 +0800
Subject: [PATCH 0489/1115] [submodule] Update submodule sonic-sairedis to the
 latest HEAD automatically (#18573)

#### Why I did it
src/sonic-sairedis
```
* c3395e5 - (HEAD -> master, origin/master, origin/HEAD) Add support for AMD-Pensando elba DSS (#1367) (19 hours ago) [Shantanu Shrivastava]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-sairedis | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-sairedis b/src/sonic-sairedis
index 73ada8d57..c3395e5d7 160000
--- a/src/sonic-sairedis
+++ b/src/sonic-sairedis
@@ -1 +1 @@
-Subproject commit 73ada8d57281e700336ce70fb893cec005466fcd
+Subproject commit c3395e5d75933d961d6aaafb695753ae7ca3fe07

From 98b1574fbd49af8bb35503ad19ccecebedab3d09 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Fri, 26 Apr 2024 16:02:27 +0800
Subject: [PATCH 0490/1115] [submodule] Update submodule sonic-host-services to
 the latest HEAD automatically (#18475)

#### Why I did it
src/sonic-host-services
```
* e93494c - (HEAD -> master, origin/master, origin/HEAD) Update sonic-host-services-data.determine-reboot-cause.service (#119) (2 days ago) [Xincun Li]
* 15762a5 - Fix UT test data due to timestamp break. (#117) (4 days ago) [Feng-msft]
* d53f431 - [caclmgrd]Fix bfd and vxlan acl rules programming in acl table update scenario (#114) (13 days ago) [Sudharsan Dhamal Gopalarathnam]
* f2dbf25 - Add unittest for caclmgrd default deny rule (#113) (2 weeks ago) [Zhijian Li]
* bfa06c7 - Change dependency option to fix buildimage issue. (#110) (3 weeks ago) [Feng-msft]
* ba78bdb - Fix hostcfgd crash when delete entire config table. (#106) (4 weeks ago) [Hua Liu]
* 6130886 - Update ProcessStats query by using API instead of parsing ps command. (#103) (4 weeks ago) [Feng-msft]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-host-services | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-host-services b/src/sonic-host-services
index 6fce4781d..e93494c9c 160000
--- a/src/sonic-host-services
+++ b/src/sonic-host-services
@@ -1 +1 @@
-Subproject commit 6fce4781da508709f11be595e3c7048ffd3138cb
+Subproject commit e93494c9c3b1fc49f998fcdc1daf7b02af8c9aba

From dfd5a6b2e9552f46a45b2a5ca10ff26540b7cef8 Mon Sep 17 00:00:00 2001
From: wenyiz2021 <91497961+wenyiz2021@users.noreply.github.com>
Date: Fri, 26 Apr 2024 10:00:54 -0700
Subject: [PATCH 0491/1115] [DNX SAI update] [master] bump DNX SAI version to
 SAI 10.1.13.1 (#18770)

BRCM SAI ver: [10.1.13.0], OCP SAI ver: [1.13.2], SDK ver: [sdk-6.5.29]

Microsoft ADO (number only): 27535691

How to verify it

SAI bumped up:
chassis-linecard$bcmcmd "bcmsai ver"
BRCM SAI ver: [10.1.13.0], OCP SAI ver: [1.13.2], SDK ver: [sdk-6.5.29]
---
 platform/broadcom/sai-modules.mk     | 2 +-
 platform/broadcom/sai.mk             | 6 +++---
 platform/broadcom/saibcm-modules-dnx | 2 +-
 3 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/platform/broadcom/sai-modules.mk b/platform/broadcom/sai-modules.mk
index 1666b9590..6271942cc 100644
--- a/platform/broadcom/sai-modules.mk
+++ b/platform/broadcom/sai-modules.mk
@@ -10,7 +10,7 @@ $(BRCM_OPENNSL_KERNEL)_MACHINE = broadcom
 SONIC_DPKG_DEBS += $(BRCM_OPENNSL_KERNEL)
 
 # SAI bcm modules for DNX family ASIC
-BRCM_DNX_OPENNSL_KERNEL_VERSION = 9.2.0.0
+BRCM_DNX_OPENNSL_KERNEL_VERSION = 10.1.13.0
 
 BRCM_DNX_OPENNSL_KERNEL = opennsl-modules-dnx_$(BRCM_DNX_OPENNSL_KERNEL_VERSION)_amd64.deb
 $(BRCM_DNX_OPENNSL_KERNEL)_SRC_PATH = $(PLATFORM_PATH)/saibcm-modules-dnx
diff --git a/platform/broadcom/sai.mk b/platform/broadcom/sai.mk
index 44022326e..2512caad2 100644
--- a/platform/broadcom/sai.mk
+++ b/platform/broadcom/sai.mk
@@ -1,7 +1,7 @@
 LIBSAIBCM_XGS_VERSION = 10.1.7.0
-LIBSAIBCM_DNX_VERSION = 9.2.12.1
+LIBSAIBCM_DNX_VERSION = 10.1.13.0
 LIBSAIBCM_XGS_BRANCH_NAME = SAI_10.1.0_GA
-LIBSAIBCM_DNX_BRANCH_NAME = SAI_9.2.0.3
+LIBSAIBCM_DNX_BRANCH_NAME = SAI_10.1.0_GA
 LIBSAIBCM_XGS_URL_PREFIX = "https://sonicstorage.blob.core.windows.net/public/sai/sai-broadcom/$(LIBSAIBCM_XGS_BRANCH_NAME)/$(LIBSAIBCM_XGS_VERSION)/xgs"
 LIBSAIBCM_DNX_URL_PREFIX = "https://sonicstorage.blob.core.windows.net/public/sai/sai-broadcom/$(LIBSAIBCM_DNX_BRANCH_NAME)/$(LIBSAIBCM_DNX_VERSION)/dnx"
 
@@ -12,7 +12,7 @@ $(eval $(call add_derived_package,$(BRCM_XGS_SAI),$(BRCM_XGS_SAI_DEV)))
 $(BRCM_XGS_SAI_DEV)_URL = "$(LIBSAIBCM_XGS_URL_PREFIX)/$(BRCM_XGS_SAI_DEV)"
 
 # SAI module for DNX Asic family
-BRCM_DNX_SAI = libsaibcm_dnx_$(LIBSAIBCM_DNX_VERSION)_amd64.deb
+BRCM_DNX_SAI = libsaibcm_$(LIBSAIBCM_DNX_VERSION)_amd64.deb
 $(BRCM_DNX_SAI)_URL = "$(LIBSAIBCM_DNX_URL_PREFIX)/$(BRCM_DNX_SAI)"
 
 SONIC_ONLINE_DEBS += $(BRCM_XGS_SAI)
diff --git a/platform/broadcom/saibcm-modules-dnx b/platform/broadcom/saibcm-modules-dnx
index 21cceea21..231e96831 160000
--- a/platform/broadcom/saibcm-modules-dnx
+++ b/platform/broadcom/saibcm-modules-dnx
@@ -1 +1 @@
-Subproject commit 21cceea219c117fed4dac7af834b403c6ebc827e
+Subproject commit 231e9683199fec974cf71311b9ba47b3f48b6e7a

From 7a26fd741d362f6a6341ad9f149e5dc6d3b0eebc Mon Sep 17 00:00:00 2001
From: Xincun Li <147451452+xincunli-sonic@users.noreply.github.com>
Date: Fri, 26 Apr 2024 13:15:20 -0700
Subject: [PATCH 0492/1115] Rename the leaf nodes to lower case. (#18704)

### Why I did it
Consolidate the `numvoq`, `coreid`, `coreportid` to be lower case which matches other leaf node convention.

### How I did it

Rename to lower case.

#### How to verify it
No need to verify.
---
 .../Arista-7800R3-48CQ2-C48/port_config.ini   |  2 +-
 .../Arista-7800R3A-36D2-C36/0/port_config.ini |  2 +-
 .../Arista-7800R3A-36D2-C36/1/port_config.ini |  2 +-
 .../Arista-7800R3A-36D2-C72/0/port_config.ini |  2 +-
 .../Arista-7800R3A-36D2-C72/1/port_config.ini |  2 +-
 .../Arista-7800R3A-36D2-D36/0/port_config.ini |  2 +-
 .../Arista-7800R3A-36D2-D36/1/port_config.ini |  2 +-
 .../Nokia-IXR7250E-36x100G/0/port_config.ini  |  2 +-
 .../Nokia-IXR7250E-36x100G/1/port_config.ini  |  2 +-
 .../Nokia-IXR7250E-36x400G/0/port_config.ini  |  2 +-
 .../Nokia-IXR7250E-36x400G/1/port_config.ini  |  2 +-
 .../cli-plugin-tests/config_db.json           | 24 +++++++++----------
 src/sonic-yang-models/doc/Configuration.md    | 18 +++++++-------
 .../tests/files/sample_config_db.json         | 18 +++++++-------
 .../yang_model_tests/tests_config/port.json   | 18 +++++++-------
 .../yang-models/sonic-port.yang               | 12 +++++-----
 16 files changed, 56 insertions(+), 56 deletions(-)

diff --git a/device/arista/x86_64-arista_7800r3_48cq2_lc/Arista-7800R3-48CQ2-C48/port_config.ini b/device/arista/x86_64-arista_7800r3_48cq2_lc/Arista-7800R3-48CQ2-C48/port_config.ini
index 07a78421d..3f5543738 100644
--- a/device/arista/x86_64-arista_7800r3_48cq2_lc/Arista-7800R3-48CQ2-C48/port_config.ini
+++ b/device/arista/x86_64-arista_7800r3_48cq2_lc/Arista-7800R3-48CQ2-C48/port_config.ini
@@ -1,4 +1,4 @@
-# name              lanes     alias               index  role   speed    asic_port_name     coreId     corePortId     numVoq
+# name              lanes     alias               index  role   speed    asic_port_name     core_id     core_port_id     num_voq
 Ethernet0           6,7       Ethernet1/1         1      Ext   100000    Eth0               0          1              8
 Ethernet4           2,3       Ethernet2/1         2      Ext   100000    Eth4               0          2              8
 Ethernet8           4,5       Ethernet3/1         3      Ext   100000    Eth8               0          3              8
diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/0/port_config.ini b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/0/port_config.ini
index a67c9b3f7..c199d4af0 100644
--- a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/0/port_config.ini
+++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/0/port_config.ini
@@ -1,4 +1,4 @@
-# name         lanes             alias        index  role       speed       asic_port_name     coreId      corePortId      numVoq
+# name         lanes             alias        index  role       speed       asic_port_name     core_id      core_port_id      num_voq
 Ethernet0      72,73,74,75       Ethernet1/1  1      Ext        100000      Eth0               1           1               8
 Ethernet8      80,81,82,83       Ethernet2/1  2      Ext        100000      Eth8               1           2               8
 Ethernet16     88,89,90,91       Ethernet3/1  3      Ext        100000      Eth16              1           3               8
diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/1/port_config.ini b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/1/port_config.ini
index e8fd3d790..3cd1cc0d1 100644
--- a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/1/port_config.ini
+++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/1/port_config.ini
@@ -1,4 +1,4 @@
-# name         lanes             alias        index  role       speed       asic_port_name     coreId      corePortId      numVoq
+# name         lanes             alias        index  role       speed       asic_port_name     core_id      core_port_id      num_voq
 Ethernet144    72,73,74,75       Ethernet19/1 19     Ext        100000      Eth0               1           1               8
 Ethernet152    80,81,82,83       Ethernet20/1 20     Ext        100000      Eth8               1           2               8
 Ethernet160    88,89,90,91       Ethernet21/1 21     Ext        100000      Eth16              1           3               8
diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/0/port_config.ini b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/0/port_config.ini
index f9f02ffb8..e38d580c7 100644
--- a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/0/port_config.ini
+++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/0/port_config.ini
@@ -1,4 +1,4 @@
-# name         lanes             alias        index  role       speed       asic_port_name     coreId      corePortId      numVoq
+# name         lanes             alias        index  role       speed       asic_port_name     core_id      core_port_id      num_voq
 Ethernet0      72,73,74,75       Ethernet1/1  1      Ext        100000      Eth0               1           1               8
 Ethernet4      76,77,78,79       Ethernet1/5  1      Ext        100000      Eth4               1           2               8
 Ethernet8      80,81,82,83       Ethernet2/1  2      Ext        100000      Eth8               1           3               8
diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/1/port_config.ini b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/1/port_config.ini
index 136661287..ce3155c52 100644
--- a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/1/port_config.ini
+++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/1/port_config.ini
@@ -1,4 +1,4 @@
-# name         lanes             alias        index  role       speed       asic_port_name     coreId      corePortId      numVoq
+# name         lanes             alias        index  role       speed       asic_port_name     core_id      core_port_id      num_voq
 Ethernet144    72,73,74,75       Ethernet19/1 19     Ext        100000      Eth144             1           1               8
 Ethernet148    76,77,78,79       Ethernet19/5 19     Ext        100000      Eth148             1           2               8
 Ethernet152    80,81,82,83       Ethernet20/1 20     Ext        100000      Eth152             1           3               8
diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/0/port_config.ini b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/0/port_config.ini
index d6b5da840..3ba9272d4 100644
--- a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/0/port_config.ini
+++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/0/port_config.ini
@@ -1,4 +1,4 @@
-# name         lanes                             alias        index  role       speed       asic_port_name     coreId      corePortId      numVoq
+# name         lanes                             alias        index  role       speed       asic_port_name     core_id      core_port_id      num_voq
 Ethernet0      72,73,74,75,76,77,78,79           Ethernet1/1  1      Ext        400000      Eth0               1           1               8
 Ethernet8      80,81,82,83,84,85,86,87           Ethernet2/1  2      Ext        400000      Eth8               1           2               8
 Ethernet16     88,89,90,91,92,93,94,95           Ethernet3/1  3      Ext        400000      Eth16              1           3               8
diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/1/port_config.ini b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/1/port_config.ini
index 7416fc328..873c1713a 100644
--- a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/1/port_config.ini
+++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/1/port_config.ini
@@ -1,4 +1,4 @@
-# name         lanes                             alias        index  role       speed       asic_port_name     coreId      corePortId      numVoq
+# name         lanes                             alias        index  role       speed       asic_port_name     core_id      core_port_id      num_voq
 Ethernet144    72,73,74,75,76,77,78,79           Ethernet19/1 19     Ext        400000      Eth0               1           1               8
 Ethernet152    80,81,82,83,84,85,86,87           Ethernet20/1 20     Ext        400000      Eth8               1           2               8
 Ethernet160    88,89,90,91,92,93,94,95           Ethernet21/1 21     Ext        400000      Eth16              1           3               8
diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/0/port_config.ini b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/0/port_config.ini
index d9df84b6e..8b4e625ec 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/0/port_config.ini
+++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/0/port_config.ini
@@ -1,4 +1,4 @@
-# name         lanes            alias         index  role  speed   asic_port_name  coreid  coreportid  numvoq
+# name         lanes            alias         index  role  speed   asic_port_name  core_id  core_port_id  num_voq
 Ethernet0      72,73,74,75      Ethernet1/1   1      Ext   100000  Eth0            1       1           8
 Ethernet8      80,81,82,83      Ethernet2/1   2      Ext   100000  Eth8            1       2           8
 Ethernet16     88,89,90,91      Ethernet3/1   3      Ext   100000  Eth16           1       3           8
diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/1/port_config.ini b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/1/port_config.ini
index 4d769b17d..630e5109d 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/1/port_config.ini
+++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/1/port_config.ini
@@ -1,4 +1,4 @@
-# name         lanes            alias         index  role  speed   asic_port_name  coreid  coreportid  numvoq
+# name         lanes            alias         index  role  speed   asic_port_name  core_id  core_port_id  num_voq
 Ethernet144    72,73,74,75      Ethernet19/1  19     Ext   100000  Eth0            1       1           8
 Ethernet152    80,81,82,83      Ethernet20/1  20     Ext   100000  Eth8            1       2           8
 Ethernet160    88,89,90,91      Ethernet21/1  21     Ext   100000  Eth16           1       3           8
diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/0/port_config.ini b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/0/port_config.ini
index 478b5cb1c..18449e8cb 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/0/port_config.ini
+++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/0/port_config.ini
@@ -1,4 +1,4 @@
-# name         lanes                            alias         index  role  speed   asic_port_name  coreid  coreportid  numvoq
+# name         lanes                            alias         index  role  speed   asic_port_name  core_id  core_port_id  num_voq
 Ethernet0      72,73,74,75,76,77,78,79          Ethernet1/1   1      Ext   400000  Eth0            1       1           8
 Ethernet8      80,81,82,83,84,85,86,87          Ethernet2/1   2      Ext   400000  Eth8            1       2           8
 Ethernet16     88,89,90,91,92,93,94,95          Ethernet3/1   3      Ext   400000  Eth16           1       3           8
diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/1/port_config.ini b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/1/port_config.ini
index 92c0731dd..faccc8e39 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/1/port_config.ini
+++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/1/port_config.ini
@@ -1,4 +1,4 @@
-# name         lanes                            alias         index  role  speed   asic_port_name  coreid  coreportid  numvoq
+# name         lanes                            alias         index  role  speed   asic_port_name  core_id  core_port_id  num_voq
 Ethernet144    72,73,74,75,76,77,78,79          Ethernet19/1  19     Ext   400000  Eth0            1       1           8
 Ethernet152    80,81,82,83,84,85,86,87          Ethernet20/1  20     Ext   400000  Eth8            1       2           8
 Ethernet160    88,89,90,91,92,93,94,95          Ethernet21/1  21     Ext   400000  Eth16           1       3           8
diff --git a/dockers/docker-macsec/cli-plugin-tests/config_db.json b/dockers/docker-macsec/cli-plugin-tests/config_db.json
index 9f4c266d4..d145fb7c7 100644
--- a/dockers/docker-macsec/cli-plugin-tests/config_db.json
+++ b/dockers/docker-macsec/cli-plugin-tests/config_db.json
@@ -11,14 +11,14 @@
     "PORT|Ethernet0": {
             "alias": "Ethernet1/1",
             "asic_port_name": "Eth0-ASIC0",
-            "coreid": "1",
-            "coreportid": "1",
+            "core_id": "1",
+            "core_port_id": "1",
             "description": "Ethernet1/1",
             "index": "1",
             "lanes": "72,73,74,75,76,77,78,79",
             "macsec": "macsec_profile",
             "mtu": "9100",
-            "numvoq": "8",
+            "num_voq": "8",
             "pfc_asym": "off",
             "role": "Ext",
             "speed": "400000",
@@ -27,14 +27,14 @@
     "PORT|Ethernet1": {
             "alias": "Ethernet2/1",
             "asic_port_name": "Eth0-ASIC0",
-            "coreid": "1",
-            "coreportid": "1",
+            "core_id": "1",
+            "core_port_id": "1",
             "description": "Ethernet2/1",
             "index": "1",
             "lanes": "72,73,74,75,76,77,78,79",
             "macsec": "macsec_profile",
             "mtu": "9100",
-            "numvoq": "8",
+            "num_voq": "8",
             "pfc_asym": "off",
             "role": "Ext",
             "speed": "400000",
@@ -43,14 +43,14 @@
     "PORT|Ethernet4": {
             "alias": "Ethernet5/1",
             "asic_port_name": "Eth0-ASIC0",
-            "coreid": "1",
-            "coreportid": "1",
+            "core_id": "1",
+            "core_port_id": "1",
             "description": "Ethernet5/1",
             "index": "1",
             "lanes": "72,73,74,75,76,77,78,79",
             "macsec": "macsec_profile",
             "mtu": "9100",
-            "numvoq": "8",
+            "num_voq": "8",
             "pfc_asym": "off",
             "role": "Ext",
             "speed": "400000",
@@ -59,14 +59,14 @@
     "PORT|Ethernet5": {
             "alias": "Ethernet6/1",
             "asic_port_name": "Eth0-ASIC0",
-            "coreid": "1",
-            "coreportid": "1",
+            "core_id": "1",
+            "core_port_id": "1",
             "description": "Ethernet6/1",
             "index": "1",
             "lanes": "72,73,74,75,76,77,78,79",
             "macsec": "macsec_profile",
             "mtu": "9100",
-            "numvoq": "8",
+            "num_voq": "8",
             "pfc_asym": "off",
             "role": "Ext",
             "speed": "400000",
diff --git a/src/sonic-yang-models/doc/Configuration.md b/src/sonic-yang-models/doc/Configuration.md
index 9980773a7..bb0b2f87c 100644
--- a/src/sonic-yang-models/doc/Configuration.md
+++ b/src/sonic-yang-models/doc/Configuration.md
@@ -1828,9 +1828,9 @@ optional attributes.
             "laser_freq": "191300",
             "tx_power": "-27.3",
             "dom_polling": "enabled",
-            "coreId": "1",
-            "corePortId": "1",
-            "numVoq": "8"
+            "core_id": "1",
+            "core_port_id": "1",
+            "num_voq": "8"
         },
         "Ethernet1": {
             "index": "1",
@@ -1844,9 +1844,9 @@ optional attributes.
             "laser_freq": "191300",
             "tx_power": "-27.3",
             "dom_polling": "enabled",
-            "coreId": "0",
-            "corePortId": "14",
-            "numVoq": "8"
+            "core_id": "0",
+            "core_port_id": "14",
+            "num_voq": "8"
         },
         "Ethernet63": {
             "index": "63",
@@ -1858,9 +1858,9 @@ optional attributes.
             "laser_freq": "191300",
             "tx_power": "-27.3",
             "dom_polling": "disabled",
-            "coreId": "0",
-            "corePortId": "15",
-            "numVoq": "8"
+            "core_id": "0",
+            "core_port_id": "15",
+            "num_voq": "8"
         }
     }
 }
diff --git a/src/sonic-yang-models/tests/files/sample_config_db.json b/src/sonic-yang-models/tests/files/sample_config_db.json
index 1e9ed06c2..4cf42f535 100644
--- a/src/sonic-yang-models/tests/files/sample_config_db.json
+++ b/src/sonic-yang-models/tests/files/sample_config_db.json
@@ -567,9 +567,9 @@
         "PORT": {
             "Ethernet0": {
                 "alias": "Eth1/1",
-                "coreId": "1",
-                "corePortId": "1",
-                "numVoq": "8",
+                "core_id": "1",
+                "core_port_id": "1",
+                "num_voq": "8",
                 "lanes": "65",
                 "description": "",
                 "speed": "11100",
@@ -586,9 +586,9 @@
             },
             "Ethernet1": {
                 "alias": "Eth1/2",
-                "coreId": "1",
-                "corePortId": "1",
-                "numVoq": "8",
+                "core_id": "1",
+                "core_port_id": "1",
+                "num_voq": "8",
                 "lanes": "66",
                 "description": "",
                 "speed": "11100",
@@ -604,9 +604,9 @@
             },
             "Ethernet2": {
                 "alias": "Eth1/3",
-                "coreId": "1",
-                "corePortId": "1",
-                "numVoq": "8",
+                "core_id": "1",
+                "core_port_id": "1",
+                "num_voq": "8",
                 "lanes": "67",
                 "description": "",
                 "speed": "11100",
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/port.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/port.json
index 562aaf56c..37c5606c1 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/port.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/port.json
@@ -285,9 +285,9 @@
                     {
                         "name": "Ethernet8",
                         "alias": "eth8",
-                        "coreId": "1",
-                        "corePortId": "1",
-                        "numVoq": "8",
+                        "core_id": "1",
+                        "core_port_id": "1",
+                        "num_voq": "8",
                         "lanes": "65",
                         "speed": 25000,
                         "autoneg": "on",
@@ -305,9 +305,9 @@
                     {
                         "name": "Ethernet8",
                         "alias": "eth8",
-                        "coreId": "1",
-                        "corePortId": "1",
-                        "numVoq": "8",
+                        "core_id": "2",
+                        "core_port_id": "2",
+                        "num_voq": "8",
                         "lanes": "65",
                         "speed": 25000,
                         "autoneg": "on",
@@ -325,9 +325,9 @@
                     {
                         "name": "Ethernet8",
                         "alias": "eth8",
-                        "coreId": "1",
-                        "corePortId": "1",
-                        "numVoq": "8",
+                        "core_id": "3",
+                        "core_port_id": "3",
+                        "num_voq": "8",
                         "lanes": "65",
                         "speed": 25000,
                         "autoneg": "on",
diff --git a/src/sonic-yang-models/yang-models/sonic-port.yang b/src/sonic-yang-models/yang-models/sonic-port.yang
index 2036a1f2f..163e19fc8 100644
--- a/src/sonic-yang-models/yang-models/sonic-port.yang
+++ b/src/sonic-yang-models/yang-models/sonic-port.yang
@@ -39,22 +39,22 @@ module sonic-port{
 					}
 				}
 
-				leaf numVoq {
-					description "The number of virtual output queue supportted on this port.";
+				leaf core_id {
+					description "The ASIC core where the port belongs to.";
 					type string {
 						length 1..16;
 					}
 				}
 
-				leaf coreId {
-					description "The ASIC core where the port belongs to.";
+				leaf core_port_id {
+					description "The ASIC core port for this port.";
 					type string {
 						length 1..16;
 					}
 				}
 
-				leaf corePortId {
-					description "The ASIC core port for this port.";
+				leaf num_voq {
+					description "The number of virtual output queue supportted on this port.";
 					type string {
 						length 1..16;
 					}

From 489a1efddfb39e17a7bc6feb10019a000d00a999 Mon Sep 17 00:00:00 2001
From: abdosi <58047199+abdosi@users.noreply.github.com>
Date: Fri, 26 Apr 2024 14:44:56 -0700
Subject: [PATCH 0493/1115] Updated LLDP startup configuration for multi-asic
 (#15440)

What I did:
Changes in LLDP Configuration to handle this:

Enable LLDP only on front panel interfaces.
Why I did:
This is done to free up CPU cycle as we don't see use for that in multi-asic and also for Chassis we have disable lldp docker on supervisor so there is no lldp peering even if send LLDP BPDU on backplane ports

For multi-asic do not generate lldpd.conf with eth0 related configuration
Why I did:
In namespace lldp docker there is no need to generate eth0 configuration. It gives not needed errror message as seen here https://github.com/sonic-net/sonic-buildimage/issues/15382

How I did it:
Instead of relying on DEVICE_METADTA sub_role we are using NAMESPACE_ID environmental variable (passed to all docker instance) which will be > 0 for multiasic docker instance and not define for global/host docker instance.

---------

Signed-off-by: Abhishek Dosi <abdosi@microsoft.com>
---
 dockers/docker-lldp/docker-lldp-init.sh | 2 +-
 dockers/docker-lldp/lldpd.conf.j2       | 2 ++
 dockers/docker-lldp/lldpmgrd            | 8 +++-----
 dockers/docker-lldp/start.sh            | 1 +
 dockers/docker-lldp/supervisord.conf.j2 | 6 +++---
 5 files changed, 10 insertions(+), 9 deletions(-)

diff --git a/dockers/docker-lldp/docker-lldp-init.sh b/dockers/docker-lldp/docker-lldp-init.sh
index 135ff4825..d9a725316 100755
--- a/dockers/docker-lldp/docker-lldp-init.sh
+++ b/dockers/docker-lldp/docker-lldp-init.sh
@@ -1,5 +1,5 @@
 #!/usr/bin/env bash
 #Generate supervisord.conf based on device metadata
 mkdir -p /etc/supervisor/conf.d/
-sonic-cfggen -d -t /usr/share/sonic/templates/supervisord.conf.j2 > /etc/supervisor/conf.d/supervisord.conf
+sonic-cfggen -d -a "{\"namespace_id\":\"$NAMESPACE_ID\"}" -t /usr/share/sonic/templates/supervisord.conf.j2 > /etc/supervisor/conf.d/supervisord.conf
 exec /usr/local/bin/supervisord
diff --git a/dockers/docker-lldp/lldpd.conf.j2 b/dockers/docker-lldp/lldpd.conf.j2
index 904784ef6..59d20f477 100644
--- a/dockers/docker-lldp/lldpd.conf.j2
+++ b/dockers/docker-lldp/lldpd.conf.j2
@@ -8,12 +8,14 @@
 {% endfor %}
 {% endif %}
 {% if mgmt_if %}
+{% if not (namespace_id is defined and namespace_id|length) %}
 {# If MGMT port alias is available, use it for port ID subtype, otherwise use port name #}
 {% if MGMT_PORT and MGMT_PORT[mgmt_if.port_name] and MGMT_PORT[mgmt_if.port_name].alias %}
 configure ports eth0 lldp portidsubtype local {{ MGMT_PORT[mgmt_if.port_name].alias }}
 {% else %}
 configure ports eth0 lldp portidsubtype local {{ mgmt_if.port_name }}
 {% endif %}
+{% endif %}
 configure system ip management pattern {{ mgmt_if.ipv4 }}
 {% endif %}
 configure system hostname {{ DEVICE_METADATA['localhost']['hostname'] }}
diff --git a/dockers/docker-lldp/lldpmgrd b/dockers/docker-lldp/lldpmgrd
index 2dad02f87..2ee9c897c 100755
--- a/dockers/docker-lldp/lldpmgrd
+++ b/dockers/docker-lldp/lldpmgrd
@@ -22,9 +22,8 @@ try:
 
     from sonic_py_common import daemon_base
     from swsscommon import swsscommon
-    from sonic_py_common.interface import inband_prefix, recirc_prefix
+    from sonic_py_common.interface import inband_prefix, recirc_prefix, backplane_prefix
     from sonic_py_common import device_info
-
 except ImportError as err:
     raise ImportError("%s - required module not found" % str(err))
 
@@ -138,9 +137,8 @@ class LldpManager(daemon_base.DaemonBase):
         """
         port_desc = None
 
-        # Skip recirc and inband interface prefixes. These are recycle ports exposed in PORT_TABLE for
-        # asic-to-asic communication in VOQ based chassis system. We do not configure LLDP on these.
-        if port_name.startswith(inband_prefix()) or port_name.startswith(recirc_prefix()):
+        # Skip special (recirc/inband) and backplane interfaces as we don't enable lldp on those interfaaces.
+        if any([port_name.startswith(inband_prefix()),port_name.startswith(recirc_prefix()),port_name.startswith(backplane_prefix())]):
             return
  
         # Get the port alias. If None or empty string, use port name instead
diff --git a/dockers/docker-lldp/start.sh b/dockers/docker-lldp/start.sh
index 51057ae4e..5295daed8 100755
--- a/dockers/docker-lldp/start.sh
+++ b/dockers/docker-lldp/start.sh
@@ -1,6 +1,7 @@
 #!/usr/bin/env bash
 CFGGEN_PARAMS=" \
     -d \
+    -a "{\"namespace_id\":\"$NAMESPACE_ID\"}" \
     -t /usr/share/sonic/templates/lldpd.conf.j2 \
     -y /etc/sonic/sonic_version.yml \
     -t /usr/share/sonic/templates/lldpdSysDescr.conf.j2 \
diff --git a/dockers/docker-lldp/supervisord.conf.j2 b/dockers/docker-lldp/supervisord.conf.j2
index 48f0a6c91..b2efe00bb 100644
--- a/dockers/docker-lldp/supervisord.conf.j2
+++ b/dockers/docker-lldp/supervisord.conf.j2
@@ -45,10 +45,10 @@ dependent_startup_wait_for=rsyslogd:running
 # - `-dd` means to stay in foreground, log warnings to console
 # - `-ddd` means to stay in foreground, log warnings and info to console
 # - `-dddd` means to stay in foreground, log all to console
-{% if DEVICE_METADATA['localhost']['sub_role'] is defined and DEVICE_METADATA['localhost']['sub_role']|length %}
-command=/usr/sbin/lldpd -d -I Ethernet* -C Ethernet*
+{% if namespace_id is defined and namespace_id|length %}
+command=/usr/sbin/lldpd -d -I Ethernet[0-9]* -C Ethernet[0-9]*
 {% else %}
-command=/usr/sbin/lldpd -d -I Ethernet*,eth0 -C eth0
+command=/usr/sbin/lldpd -d -I Ethernet[0-9]*,eth0 -C eth0
 {% endif %}
 priority=3
 autostart=false

From a61254d0f8b5d13f0de8feb82c74e8bc3d0f7aad Mon Sep 17 00:00:00 2001
From: Yaqiang Zhu <yaqiangzhu@microsoft.com>
Date: Sat, 27 Apr 2024 06:44:44 +0800
Subject: [PATCH 0494/1115] [dhcp_server] Add support for customize string
 option include comma (#18796)

* [dhcp_server] Add support for customize comma-sperated string option
---
 .../dhcp_utilities/dhcpservd/dhcp_cfggen.py   |   2 +-
 .../tests/test_data/test_kea_config.conf      |   3 +
 .../tests/test_dhcp_cfggen.py                 | 111 ++++++++----------
 .../tests/test_dhcpservd.py                   |  15 ++-
 4 files changed, 68 insertions(+), 63 deletions(-)
 create mode 100644 src/sonic-dhcp-utilities/tests/test_data/test_kea_config.conf

diff --git a/src/sonic-dhcp-utilities/dhcp_utilities/dhcpservd/dhcp_cfggen.py b/src/sonic-dhcp-utilities/dhcp_utilities/dhcpservd/dhcp_cfggen.py
index cc5bf0dba..af7ef8248 100755
--- a/src/sonic-dhcp-utilities/dhcp_utilities/dhcpservd/dhcp_cfggen.py
+++ b/src/sonic-dhcp-utilities/dhcp_utilities/dhcpservd/dhcp_cfggen.py
@@ -140,7 +140,7 @@ def _parse_customized_options(self, customized_options_ipv4):
             always_send = config["always_send"] if "always_send" in config else "true"
             customized_options[option_name] = {
                 "id": config["id"],
-                "value": config["value"],
+                "value": config["value"].replace(",", "\\\\,") if option_type == "string" else config["value"],
                 "type": option_type,
                 "always_send": always_send
             }
diff --git a/src/sonic-dhcp-utilities/tests/test_data/test_kea_config.conf b/src/sonic-dhcp-utilities/tests/test_data/test_kea_config.conf
new file mode 100644
index 000000000..adacd4602
--- /dev/null
+++ b/src/sonic-dhcp-utilities/tests/test_data/test_kea_config.conf
@@ -0,0 +1,3 @@
+{
+    "key": "dummy_value\\,dummy_value"
+}
diff --git a/src/sonic-dhcp-utilities/tests/test_dhcp_cfggen.py b/src/sonic-dhcp-utilities/tests/test_dhcp_cfggen.py
index 2b60a66dc..4817c6cba 100644
--- a/src/sonic-dhcp-utilities/tests/test_dhcp_cfggen.py
+++ b/src/sonic-dhcp-utilities/tests/test_dhcp_cfggen.py
@@ -211,61 +211,53 @@
     },
     "hook_lib_path": "/usr/local/lib/kea/hooks/libdhcp_run_script.so"
 }
-tested_options_data = [
-    {
-        "data": {
-            "option223": {
-                "id": "223",
-                "type": "string",
-                "value": "dummy_value"
-            }
+tested_options_data = {
+    "data": {
+        "option223": {
+            "id": "223",
+            "type": "string",
+            "value": "dummy_value"
         },
-        "res": True
-    },
-    {
-        "data": {
-            "option60": {
-                "id": "60",
-                "type": "string",
-                "value": "dummy_value"
-            }
+        "option60": {
+            "id": "60",
+            "type": "string",
+            "value": "dummy_value"
         },
-        "res": False
-    },
-    {
-        "data": {
-            "option222": {
-                "id": "222",
-                "type": "text",
-                "value": "dummy_value"
-            }
+        "option222": {
+            "id": "222",
+            "type": "text",
+            "value": "dummy_value"
         },
-        "res": False
-    },
-    {
-        "data": {
-            "option219": {
-                "id": "219",
-                "type": "uint8",
-                "value": "259"
-            }
+        "option219": {
+            "id": "219",
+            "type": "uint8",
+            "value": "259"
         },
-        "res": False
-    },
-    {
-        "data": {
-            "option223": {
-                "id": "223",
-                "type": "string",
-                "value": "long_valuelong_valuelong_valuelong_valuelong_valuelong_valuelong_valuelong_valuelong_value" +
-                         "long_valuelong_valuelong_valuelong_valuelong_valuelong_valuelong_valuelong_valuelong_value" +
-                         "long_valuelong_valuelong_valuelong_valuelong_valuelong_valuelong_valuelong_valuelong_value" +
-                         "long_valuelong_valuelong_valuelong_valuelong_value"
-            }
+        "option218": {
+            "id": "218",
+            "type": "string",
+            "value": "long_valuelong_valuelong_valuelong_valuelong_valuelong_valuelong_valuelong_valuelong_value" +
+                        "long_valuelong_valuelong_valuelong_valuelong_valuelong_valuelong_valuelong_valuelong_value" +
+                        "long_valuelong_valuelong_valuelong_valuelong_valuelong_valuelong_valuelong_valuelong_value" +
+                        "long_valuelong_valuelong_valuelong_valuelong_value"
+        },
+        "option217": {
+            "id": "217",
+            "type": "string",
+            "value": "dummy_value,dummy_value"
         },
-        "res": False
+        "option216": {
+            "id": "216",
+            "type": "uint8",
+            "value": "8"
+        }
+    },
+    "res": {
+        "option223": "dummy_value",
+        "option217": "dummy_value\\\\,dummy_value",
+        "option216": "8"
     }
-]
+}
 
 
 def test_parse_port_alias(mock_swsscommon_dbconnector_init, mock_get_render_template):
@@ -402,24 +394,21 @@ def test_render_config(mock_swsscommon_dbconnector_init, mock_parse_port_map_ali
     assert json.loads(config) == expected_config if with_port_config else expected_config
 
 
-@pytest.mark.parametrize("tested_options_data", tested_options_data)
 def test_parse_customized_options(mock_swsscommon_dbconnector_init, mock_get_render_template,
-                                  mock_parse_port_map_alias, tested_options_data):
+                                  mock_parse_port_map_alias):
     dhcp_db_connector = DhcpDbConnector()
     dhcp_cfg_generator = DhcpServCfgGenerator(dhcp_db_connector, "/usr/local/lib/kea/hooks/libdhcp_run_script.so")
     customized_options_ipv4 = tested_options_data["data"]
     customized_options = dhcp_cfg_generator._parse_customized_options(customized_options_ipv4)
-    if tested_options_data["res"]:
-        assert customized_options == {
-            "option223": {
-                "id": "223",
-                "value": "dummy_value",
-                "type": "string",
-                "always_send": "true"
-            }
+    expected_res = {}
+    for key, value in tested_options_data["res"].items():
+        expected_res[key] = {
+            "id": customized_options_ipv4[key]["id"],
+            "value": value,
+            "type": customized_options_ipv4[key]["type"],
+            "always_send": "true"
         }
-    else:
-        assert customized_options == {}
+    assert customized_options == expected_res
 
 
 def test_parse_dpus(mock_swsscommon_dbconnector_init, mock_get_render_template, mock_parse_port_map_alias):
diff --git a/src/sonic-dhcp-utilities/tests/test_dhcpservd.py b/src/sonic-dhcp-utilities/tests/test_dhcpservd.py
index 17239a734..f11ffdbba 100644
--- a/src/sonic-dhcp-utilities/tests/test_dhcpservd.py
+++ b/src/sonic-dhcp-utilities/tests/test_dhcpservd.py
@@ -1,4 +1,5 @@
 import pytest
+import json
 import psutil
 import signal
 import sys
@@ -18,11 +19,18 @@
                      "VlanMemberTableEventChecker"]
 
 
+tested_config = """
+{
+    "key": "dummy_value\\\\,dummy_value"
+}
+"""
+
+
 @pytest.mark.parametrize("enabled_checker", [None, set(PORT_MODE_CHECKER)])
 def test_dump_dhcp4_config(mock_swsscommon_dbconnector_init, enabled_checker):
     new_enabled_checker = set(["VlanTableEventChecker"])
     with patch("dhcp_utilities.dhcpservd.dhcp_cfggen.DhcpServCfgGenerator.generate",
-               return_value=("dummy_config", set(), set(), set(), new_enabled_checker)) as mock_generate, \
+               return_value=(tested_config, set(), set(), set(), new_enabled_checker)) as mock_generate, \
          patch("dhcp_utilities.dhcpservd.dhcpservd.DhcpServd._notify_kea_dhcp4_proc",
                MagicMock()) as mock_notify_kea_dhcp4_proc, \
          patch.object(DhcpServd, "dhcp_servd_monitor", return_value=DhcpServdDbMonitor,
@@ -39,6 +47,11 @@ def test_dump_dhcp4_config(mock_swsscommon_dbconnector_init, enabled_checker):
         dhcpservd.dump_dhcp4_config()
         # Verfiy whether generate() func of dhcp_cfggen is called
         mock_generate.assert_called_once_with()
+        with open("tests/test_data/test_kea_config.conf", "r") as file, \
+             open("/tmp/kea-dhcp4.conf", "r") as output:
+            expected_content = file.read()
+            actual_content = output.read()
+            assert json.loads(expected_content) == json.loads(actual_content)
         # Verify whether notify func of dhcpservd is called, which is expected to call after new config generated
         mock_notify_kea_dhcp4_proc.assert_called_once_with()
         if enabled_checker is None:

From 039f39e5c596cd125ab26c86bd1c177f94c76455 Mon Sep 17 00:00:00 2001
From: Wenda Chu <32250288+w1nda@users.noreply.github.com>
Date: Sat, 27 Apr 2024 06:46:12 +0800
Subject: [PATCH 0495/1115] [dhcp_server] Append subnet_id to server config and
 read the id from lease file for STATE_DB updating (#18739)

---
 dockers/docker-dhcp-server/kea-dhcp4.conf.j2  |  1 +
 .../dhcp_utilities/dhcpservd/dhcp_cfggen.py   |  1 +
 .../dhcp_utilities/dhcpservd/dhcp_lease.py    | 23 +----------
 .../tests/test_data/kea-lease.csv             | 18 ++++-----
 .../tests/test_dhcp_cfggen.py                 |  2 +-
 .../tests/test_dhcp_lease.py                  | 38 +++++--------------
 6 files changed, 24 insertions(+), 59 deletions(-)

diff --git a/dockers/docker-dhcp-server/kea-dhcp4.conf.j2 b/dockers/docker-dhcp-server/kea-dhcp4.conf.j2
index 082cbca14..f5f7a9b05 100644
--- a/dockers/docker-dhcp-server/kea-dhcp4.conf.j2
+++ b/dockers/docker-dhcp-server/kea-dhcp4.conf.j2
@@ -42,6 +42,7 @@
     {%- if add_subnet_preceding_comma.flag -%},{%- endif -%}
     {%- set _dummy = add_subnet_preceding_comma.update({'flag': True}) %}
             {
+                "id": {{ subnet_info["id"] }},
                 "subnet": "{{ subnet_info["subnet"] }}",
                 "pools": [
     {%- set add_pool_preceding_comma = { 'flag': False } %}
diff --git a/src/sonic-dhcp-utilities/dhcp_utilities/dhcpservd/dhcp_cfggen.py b/src/sonic-dhcp-utilities/dhcp_utilities/dhcpservd/dhcp_cfggen.py
index af7ef8248..5bc9e6cb9 100755
--- a/src/sonic-dhcp-utilities/dhcp_utilities/dhcpservd/dhcp_cfggen.py
+++ b/src/sonic-dhcp-utilities/dhcp_utilities/dhcpservd/dhcp_cfggen.py
@@ -223,6 +223,7 @@ def _construct_obj_for_template(self, dhcp_server_ipv4, port_ips, hostname, cust
                                                                                                 client_class)
                             })
                     subnet_obj = {
+                        "id": dhcp_interface_name.replace("Vlan", ""),
                         "subnet": str(ipaddress.ip_network(dhcp_interface_ip, strict=False)),
                         "pools": pools,
                         "gateway": dhcp_config["gateway"],
diff --git a/src/sonic-dhcp-utilities/dhcp_utilities/dhcpservd/dhcp_lease.py b/src/sonic-dhcp-utilities/dhcp_utilities/dhcpservd/dhcp_lease.py
index 10ff46da8..6dda76728 100644
--- a/src/sonic-dhcp-utilities/dhcp_utilities/dhcpservd/dhcp_lease.py
+++ b/src/sonic-dhcp-utilities/dhcp_utilities/dhcpservd/dhcp_lease.py
@@ -106,7 +106,6 @@ def _read(self):
             syslog.syslog(syslog.LOG_ERR, "Cannot find lease file: {}".format(self.lease_file))
             raise err
 
-        fdb_info = self._get_fdb_info()
         new_lease = {}
         # Get newest lease information of each client
         while dq:
@@ -119,11 +118,9 @@ def _read(self):
             mac_address = splits[1]
             valid_lifetime = splits[3]
             lease_end = splits[4]
+            subnet_id = splits[5]
 
-            if mac_address not in fdb_info:
-                syslog.syslog(syslog.LOG_WARNING, "Cannot not find {} in fdb table".format(mac_address))
-                continue
-            new_key = "{}|{}".format(fdb_info[mac_address], mac_address)
+            new_key = "{}|{}".format("Vlan" + subnet_id, mac_address)
             if new_key in new_lease:
                 continue
             new_lease[new_key] = {
@@ -133,21 +130,5 @@ def _read(self):
             }
         return new_lease
 
-    def _get_fdb_info(self):
-        """
-        Get fdb information, indicate that mac address comes from which dhcp interface.
-        Returns:
-            Dict of fdb information, sample:
-            {
-                "aa:bb:cc:dd:ee:ff": "Vlan1000"
-            }
-        """
-        fdb_table = self.db_connector.get_state_db_table("FDB_TABLE")
-        ret = {}
-        for key in fdb_table.keys():
-            splits = key.split(":", 1)
-            ret[splits[1]] = splits[0]
-        return ret
-
     def _update_lease(self, signum, frame):
         self.update_lease()
diff --git a/src/sonic-dhcp-utilities/tests/test_data/kea-lease.csv b/src/sonic-dhcp-utilities/tests/test_data/kea-lease.csv
index 645b07b22..c8ebe4390 100644
--- a/src/sonic-dhcp-utilities/tests/test_data/kea-lease.csv
+++ b/src/sonic-dhcp-utilities/tests/test_data/kea-lease.csv
@@ -1,10 +1,10 @@
 address,hwaddr,client_id,valid_lifetime,expire,subnet_id,fqdn_fwd,fqdn_rev,hostname,state,user_context,pool_id
-192.168.0.2,10:70:fd:b6:13:00,,3600,1694000905,1,0,0,7626dced293e,0,,0
-192.168.0.131,10:70:fd:b6:13:17,,3600,1694000909,1,0,0,7626dced293e,0,,1
-192.168.0.131,10:70:fd:b6:13:17,,0,1693997309,1,0,0,7626dced293e,0,,1
-192.168.0.131,10:70:fd:b6:13:17,,0,1693997309,1,0,0,,2,,1
-192.168.0.131,10:70:fd:b6:13:17,,3600,1694000915,1,0,0,7626dced293e,0,,1
-192.168.0.2,10:70:fd:b6:13:00,,0,1693997305,1,0,0,7626dced293e,0,,0
-193.168.2.2,10:70:fd:b6:13:15,,3600,1693999305,1,0,0,7626dced293e,0,,0
-193.168.2.3,10:70:fd:b6:13:20,,3600,1693999305,1,0,0,7626dced293e,0,,0
-193.168.0.132,10:70:fd:b6:13:18,,3600,1697610805,1,0,0,7626dced293e,0,,0
\ No newline at end of file
+192.168.0.2,10:70:fd:b6:13:00,,3600,1694000905,1000,0,0,7626dced293e,0,,0
+192.168.0.131,10:70:fd:b6:13:17,,3600,1694000909,1000,0,0,7626dced293e,0,,1
+192.168.0.131,10:70:fd:b6:13:17,,0,1693997309,1000,0,0,7626dced293e,0,,1
+192.168.0.131,10:70:fd:b6:13:17,,0,1693997309,1000,0,0,,2,,1
+192.168.0.131,10:70:fd:b6:13:17,,3600,1694000915,1000,0,0,7626dced293e,0,,1
+192.168.0.2,10:70:fd:b6:13:00,,0,1693997305,1000,0,0,7626dced293e,0,,0
+193.168.2.2,10:70:fd:b6:13:15,,3600,1693999305,2000,0,0,7626dced293e,0,,0
+193.168.2.3,10:70:fd:b6:13:20,,3600,1693999305,2000,0,0,7626dced293e,0,,0
+193.168.0.132,10:70:fd:b6:13:18,,3600,1697610805,1000,0,0,7626dced293e,0,,0
\ No newline at end of file
diff --git a/src/sonic-dhcp-utilities/tests/test_dhcp_cfggen.py b/src/sonic-dhcp-utilities/tests/test_dhcp_cfggen.py
index 4817c6cba..0d5edf03c 100644
--- a/src/sonic-dhcp-utilities/tests/test_dhcp_cfggen.py
+++ b/src/sonic-dhcp-utilities/tests/test_dhcp_cfggen.py
@@ -182,7 +182,7 @@
 expected_render_obj = {
     "subnets": [
         {
-            "subnet": "192.168.0.0/21",
+            "subnet": "192.168.0.0/21", 'id': '1000',
             "pools": [{"range": "192.168.0.2 - 192.168.0.6", "client_class": "sonic-host:etp8"},
                       {"range": "192.168.0.10 - 192.168.0.10", "client_class": "sonic-host:etp8"},
                       {"range": "192.168.0.7 - 192.168.0.7", "client_class": "sonic-host:etp7"}],
diff --git a/src/sonic-dhcp-utilities/tests/test_dhcp_lease.py b/src/sonic-dhcp-utilities/tests/test_dhcp_lease.py
index 892c5f9bc..a831b2ad5 100644
--- a/src/sonic-dhcp-utilities/tests/test_dhcp_lease.py
+++ b/src/sonic-dhcp-utilities/tests/test_dhcp_lease.py
@@ -24,14 +24,13 @@
         "lease_start": "1693995705",
         "lease_end": "1693999305",
         "ip": "193.168.2.2"
+    },
+    "Vlan2000|10:70:fd:b6:13:20": {
+        "lease_start": "1693995705",
+        "lease_end": "1693999305",
+        "ip": "193.168.2.3"
     }
 }
-expected_fdb_info = {
-    "10:70:fd:b6:13:00": "Vlan1000",
-    "10:70:fd:b6:13:15": "Vlan2000",
-    "10:70:fd:b6:13:17": "Vlan1000",
-    "10:70:fd:b6:13:18": "Vlan1000"
-}
 
 
 def test_read_kea_lease_with_file_not_found(mock_swsscommon_dbconnector_init):
@@ -44,28 +43,11 @@ def test_read_kea_lease_with_file_not_found(mock_swsscommon_dbconnector_init):
 
 
 def test_read_kea_lease(mock_swsscommon_dbconnector_init):
-    tested_fdb_info = expected_fdb_info
-    with patch.object(KeaDhcp4LeaseHandler, "_get_fdb_info", return_value=tested_fdb_info):
-        db_connector = DhcpDbConnector()
-        kea_lease_handler = KeaDhcp4LeaseHandler(db_connector, lease_file="tests/test_data/kea-lease.csv")
-        # Verify whether lease information read is as expected
-        lease = kea_lease_handler._read()
-        assert lease == expected_lease
-
-
-def test_get_fdb_info(mock_swsscommon_dbconnector_init):
-    mock_fdb_table = {
-        "Vlan2000:10:70:fd:b6:13:15": {"port": "Ethernet31", "type": "dynamic"},
-        "Vlan1000:10:70:fd:b6:13:00": {"port": "Ethernet32", "type": "dynamic"},
-        "Vlan1000:10:70:fd:b6:13:17": {"port": "Ethernet33", "type": "dynamic"},
-        "Vlan1000:10:70:fd:b6:13:18": {"port": "Ethernet34", "type": "dynamic"}
-    }
-    with patch("dhcp_utilities.common.utils.DhcpDbConnector.get_state_db_table", return_value=mock_fdb_table):
-        db_connector = DhcpDbConnector()
-        kea_lease_handler = KeaDhcp4LeaseHandler(db_connector, lease_file="tests/test_data/kea-lease.csv")
-        # Verify whether lease information read is as expected
-        fdb_info = kea_lease_handler._get_fdb_info()
-        assert fdb_info == expected_fdb_info
+    db_connector = DhcpDbConnector()
+    kea_lease_handler = KeaDhcp4LeaseHandler(db_connector, lease_file="tests/test_data/kea-lease.csv")
+    # Verify whether lease information read is as expected
+    lease = kea_lease_handler._read()
+    assert lease == expected_lease
 
 
 # Cannot mock built-in/extension type function(datetime.datetime.timestamp), need to free time

From 0ff9b2fa72aa10f3802bd79302c558b42bd6deee Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sat, 27 Apr 2024 16:01:09 +0800
Subject: [PATCH 0496/1115] [submodule] Update submodule sonic-utilities to the
 latest HEAD automatically (#18735)

#### Why I did it
src/sonic-utilities
```
* 9b463ca5 - (HEAD -> master, origin/master, origin/HEAD) [chassis][voq] Add fabric capacity monitoring cmds (#3255) (8 hours ago) [jfeng-arista]
* df94636b - Display target firmware version through CLI (#3274) (34 hours ago) [mihirpat1]
* cd5c0580 - Fix db_migrate.py show error and back trace while loading configuration on Linecard (#3257) (2 days ago) [Hua Liu]
* d48a8308 - Add Multi ASIC support for apply-patch (#3249) (3 days ago) [Xincun Li]
* b143ea6d - [chassis][voq]Add fabric monitoring commands. (#3239) (4 days ago) [jfeng-arista]
* 07d6d277 - [fast/warm-reboot] Retain TRANSCEIVER_INFO tables on fast/warm-reboot (#3240) (7 days ago) [Stepan Blyshchak]
* 8e5ff74f - Revert "Revert "route_check: Skip route checks if bgp feature is not enabled"" (#3270) (7 days ago) [anamehra]
* eb165f36 - Fix double hex to decimal conversion (#3267) (7 days ago) [Yuanzhe]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-utilities | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-utilities b/src/sonic-utilities
index ad464a9f0..9b463ca54 160000
--- a/src/sonic-utilities
+++ b/src/sonic-utilities
@@ -1 +1 @@
-Subproject commit ad464a9f0e7003fe12adafad28b61c0df0bf29fc
+Subproject commit 9b463ca54b4d65cb77aa733224e2bed2ec4cd22a

From c2a9a0a35ca1ba8768389bc2c788e9f3ec58f335 Mon Sep 17 00:00:00 2001
From: Liu Shilong <shilongliu@microsoft.com>
Date: Sun, 28 Apr 2024 18:15:29 +0800
Subject: [PATCH 0497/1115] [build] archive.debian.org in buster slave
 container. (#18812)

Why I did it
ftp.debian.org don't have buster-backports now. It is migrated to archive.debian.org.
Fix buster-slave container to support submodule pipelines.

Work item tracking
Microsoft ADO (number only): 27822848
How I did it
How to verify it
---
 sonic-slave-buster/Dockerfile.j2 | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/sonic-slave-buster/Dockerfile.j2 b/sonic-slave-buster/Dockerfile.j2
index 2d582f659..5b2146eed 100644
--- a/sonic-slave-buster/Dockerfile.j2
+++ b/sonic-slave-buster/Dockerfile.j2
@@ -37,7 +37,7 @@ ARG gcc_arch=aarch64-linux-gnu
 ARG PYTHON_CROSS_PLATFORM=linux_aarch64
 {%- endif %}
 
-RUN echo "deb http://ftp.debian.org/debian buster-backports main" >> /etc/apt/sources.list
+RUN echo "deb http://archive.debian.org/debian/ buster-backports main" >> /etc/apt/sources.list
 
 RUN dpkg --add-architecture $arch
 RUN apt-get update && apt-get install -y eatmydata

From f1bc937db0e8d06a70268d831743c1c9bbc45bca Mon Sep 17 00:00:00 2001
From: Sudharsan Dhamal Gopalarathnam <sudharsand@nvidia.com>
Date: Sun, 28 Apr 2024 18:19:45 -0700
Subject: [PATCH 0498/1115] [FRR]Upgrade FRR to 8.5.4 (#18669)

Why I did it
Upgrading FRR 8.5.4 to include latest fixes.

Work item tracking
Microsoft ADO (number only):
How I did it
New patches that were added:

Patch	FRR Pull request	Issue fixed
0024-lib-use-snmp-s-large-fd-sets-for-agentx.patch	FRRouting/frr#13396	FRRouting/frr#14143
0025-bgp-community-memory-leak-fix.patch	FRRouting/frr#15466	FRRouting/frr#15459
0026-bgp-fib-suppress-announce-fix.patch	FRRouting/frr#15634	FRRouting/frr#15626
0027-lib-Do-not-convert-EVPN-prefixes-into-IPv4-IPv6-if-n.patch	FRRouting/frr#15418	FRRouting/frr#14419
Removed patches:

Patch	Upstream FRR commit that is present in 8.5.4
0019-zebra-Abstract-dplane_ctx_route_init-to-init-route-w.patch	FRRouting/frr@3f01977
0020-zebra-Fix-crash-when-dplane_fpm_nl-fails-to-process-.patch	FRRouting/frr@fe5f624
0022-bgpd-Don-t-read-the-first-byte-of-ORF-header-if-we-a.patch	FRRouting/frr@3515178
0023-bgpd-Make-sure-we-have-enough-data-to-read-two-bytes.patch	FRRouting/frr@460ee93
0024-bgpd-Do-not-process-NLRIs-if-the-attribute-length-is.patch	FRRouting/frr@f291f1e
0025-bgpd-Use-treat-as-withdraw-for-tunnel-encapsulation-.patch	FRRouting/frr@8a4a88c
0026-zebra-Add-encap-type-when-building-packet-for-FPM.patch	FRRouting/frr@f0f7b28
0028-bgpd-Check-mandatory-attributes-more-carefully-for-U.patch	FRRouting/frr@21418d6
0029-bgpd-Handle-MP_REACH_NLRI-malformed-packets-with-ses.patch	FRRouting/frr@30b5c2a
0030-bgpd-Treat-EOR-as-withdrawn-to-avoid-unwanted-handli.patch	FRRouting/frr@01f232c
0031-bgpd-Ignore-handling-NLRIs-if-we-received-MP_UNREACH.patch	FRRouting/frr@a0c4ec2
0032-zebra-Fix-fpm-multipath-encap-addition.patch	FRRouting/frr@10a9a5f
Realigned patches:

Old Patch	New patch
0005-Add-support-of-bgp-l3vni-evpn.patch	0005-Add-support-of-bgp-l3vni-evpn.patch
0021-zebra-remove-duplicated-nexthops-when-sending-fpm-msg.patch	0019-zebra-remove-duplicated-nexthops-when-sending-fpm-msg.patch
0027-zebra-Fix-non-notification-of-better-admin-won.patch	0020-zebra-Fix-non-notification-of-better-admin-won.patch
Disable-ipv6-src-address-test-in-pceplib.patch	0021-Disable-ipv6-src-address-test-in-pceplib.patch
cross-compile-changes.patch	0022-cross-compile-changes.patch
0033-zebra-The-dplane_fpm_nl-return-path-leaks-memory.patch	0023-zebra-The-dplane_fpm_nl-return-path-leaks-memory.patch
How to verify it
Running sonic-mgmt test suite.
---
 rules/frr.mk                                  |   4 +-
 src/sonic-frr/frr                             |   2 +-
 .../0005-Add-support-of-bgp-l3vni-evpn.patch  |  49 +--
 ...plane_ctx_route_init-to-init-route-w.patch |  74 ----
 ...cated-nexthops-when-sending-fpm-msg.patch} |   0
 ...when-dplane_fpm_nl-fails-to-process-.patch |  50 ---
 ...on-notification-of-better-admin-won.patch} |  42 +-
 ...le-ipv6-src-address-test-in-pceplib.patch} |   0
 ...the-first-byte-of-ORF-header-if-we-a.patch |  27 --
 ...patch => 0022-cross-compile-changes.patch} |   0
 ...e-have-enough-data-to-read-two-bytes.patch |  51 ---
 ...ane_fpm_nl-return-path-leaks-memory.patch} |   9 +-
 ...ess-NLRIs-if-the-attribute-length-is.patch |  97 -----
 ...-use-snmp-s-large-fd-sets-for-agentx.patch | 143 +++++++
 .../0025-bgp-community-memory-leak-fix.patch  | 395 ++++++++++++++++++
 ...s-withdraw-for-tunnel-encapsulation-.patch | 129 ------
 .../0026-bgp-fib-suppress-announce-fix.patch  | 122 ++++++
 ...ap-type-when-building-packet-for-FPM.patch |  50 ---
 ...rt-EVPN-prefixes-into-IPv4-IPv6-if-n.patch |  77 ++++
 ...tory-attributes-more-carefully-for-U.patch | 112 -----
 ...EACH_NLRI-malformed-packets-with-ses.patch | 118 ------
 ...s-withdrawn-to-avoid-unwanted-handli.patch | 106 -----
 ...ling-NLRIs-if-we-received-MP_UNREACH.patch |  88 ----
 ...bra-Fix-fpm-multipath-encap-addition.patch |  58 ---
 src/sonic-frr/patch/series                    |  26 +-
 25 files changed, 803 insertions(+), 1026 deletions(-)
 delete mode 100644 src/sonic-frr/patch/0019-zebra-Abstract-dplane_ctx_route_init-to-init-route-w.patch
 rename src/sonic-frr/patch/{0021-zebra-remove-duplicated-nexthops-when-sending-fpm-msg.patch => 0019-zebra-remove-duplicated-nexthops-when-sending-fpm-msg.patch} (100%)
 delete mode 100644 src/sonic-frr/patch/0020-zebra-Fix-crash-when-dplane_fpm_nl-fails-to-process-.patch
 rename src/sonic-frr/patch/{0027-zebra-Fix-non-notification-of-better-admin-won.patch => 0020-zebra-Fix-non-notification-of-better-admin-won.patch} (60%)
 rename src/sonic-frr/patch/{Disable-ipv6-src-address-test-in-pceplib.patch => 0021-Disable-ipv6-src-address-test-in-pceplib.patch} (100%)
 delete mode 100644 src/sonic-frr/patch/0022-bgpd-Don-t-read-the-first-byte-of-ORF-header-if-we-a.patch
 rename src/sonic-frr/patch/{cross-compile-changes.patch => 0022-cross-compile-changes.patch} (100%)
 delete mode 100644 src/sonic-frr/patch/0023-bgpd-Make-sure-we-have-enough-data-to-read-two-bytes.patch
 rename src/sonic-frr/patch/{0033-zebra-The-dplane_fpm_nl-return-path-leaks-memory.patch => 0023-zebra-The-dplane_fpm_nl-return-path-leaks-memory.patch} (86%)
 delete mode 100644 src/sonic-frr/patch/0024-bgpd-Do-not-process-NLRIs-if-the-attribute-length-is.patch
 create mode 100644 src/sonic-frr/patch/0024-lib-use-snmp-s-large-fd-sets-for-agentx.patch
 create mode 100644 src/sonic-frr/patch/0025-bgp-community-memory-leak-fix.patch
 delete mode 100644 src/sonic-frr/patch/0025-bgpd-Use-treat-as-withdraw-for-tunnel-encapsulation-.patch
 create mode 100644 src/sonic-frr/patch/0026-bgp-fib-suppress-announce-fix.patch
 delete mode 100644 src/sonic-frr/patch/0026-zebra-Add-encap-type-when-building-packet-for-FPM.patch
 create mode 100644 src/sonic-frr/patch/0027-lib-Do-not-convert-EVPN-prefixes-into-IPv4-IPv6-if-n.patch
 delete mode 100644 src/sonic-frr/patch/0028-bgpd-Check-mandatory-attributes-more-carefully-for-U.patch
 delete mode 100644 src/sonic-frr/patch/0029-bgpd-Handle-MP_REACH_NLRI-malformed-packets-with-ses.patch
 delete mode 100644 src/sonic-frr/patch/0030-bgpd-Treat-EOR-as-withdrawn-to-avoid-unwanted-handli.patch
 delete mode 100644 src/sonic-frr/patch/0031-bgpd-Ignore-handling-NLRIs-if-we-received-MP_UNREACH.patch
 delete mode 100644 src/sonic-frr/patch/0032-zebra-Fix-fpm-multipath-encap-addition.patch

diff --git a/rules/frr.mk b/rules/frr.mk
index b062016fb..da42179a0 100644
--- a/rules/frr.mk
+++ b/rules/frr.mk
@@ -1,9 +1,9 @@
 # FRRouting (frr) package
 
-FRR_VERSION = 8.5.1
+FRR_VERSION = 8.5.4
 FRR_SUBVERSION = 0
 FRR_BRANCH = frr/8.5
-FRR_TAG = frr-8.5.1
+FRR_TAG = frr-8.5.4
 export FRR_VERSION FRR_SUBVERSION FRR_BRANCH FRR_TAG
 
 
diff --git a/src/sonic-frr/frr b/src/sonic-frr/frr
index 7a2b85ae5..de0e358b8 160000
--- a/src/sonic-frr/frr
+++ b/src/sonic-frr/frr
@@ -1 +1 @@
-Subproject commit 7a2b85ae52b354248fa9da04100efba0ec6c70c9
+Subproject commit de0e358b877ac9b595e7fb387a302c960a4c02d1
diff --git a/src/sonic-frr/patch/0005-Add-support-of-bgp-l3vni-evpn.patch b/src/sonic-frr/patch/0005-Add-support-of-bgp-l3vni-evpn.patch
index fe2636c2e..c2c04f0ff 100644
--- a/src/sonic-frr/patch/0005-Add-support-of-bgp-l3vni-evpn.patch
+++ b/src/sonic-frr/patch/0005-Add-support-of-bgp-l3vni-evpn.patch
@@ -1,8 +1,9 @@
-From f5f0018266c98ad96cdbe69ae60d501de21e5600 Mon Sep 17 00:00:00 2001
+From a0846dcf6f496bcfb51dd11c03d1a6c666d4020a Mon Sep 17 00:00:00 2001
 From: Stepan Blyschak <stepanb@nvidia.com>
 Date: Thu, 20 Oct 2022 13:19:31 +0000
-Subject: [PATCH] From 369bbb4d62aa47d5a6d5157ca6ea819c4cb80f15 Mon Sep 17
- 00:00:00 2001 Subject: [PATCH 07/13] Added support of L3VNI EVPN
+Subject: [PATCH] From f5f0018266c98ad96cdbe69ae60d501de21e5600 Mon Sep 17
+ 00:00:00 2001 Subject: [PATCH] From 369bbb4d62aa47d5a6d5157ca6ea819c4cb80f15
+ Mon Sep 17  00:00:00 2001 Subject: [PATCH 07/13] Added support of L3VNI EVPN
 
 This is temp patch till Prefix to ARP indirection is add in neighorch
 
@@ -10,19 +11,19 @@ Signed-off-by: Kishore Kunal <kishore.kunal@broadcom.com>
 Signed-off-by: Stepan Blyschak <stepanb@nvidia.com>
 
 diff --git a/lib/nexthop.c b/lib/nexthop.c
-index 7ebc4fefb..2f7bb0e7b 100644
+index c03d37487a..52679388fd 100644
 --- a/lib/nexthop.c
 +++ b/lib/nexthop.c
-@@ -813,6 +813,7 @@ void nexthop_copy_no_recurse(struct nexthop *copy,
- 	memcpy(&copy->src, &nexthop->src, sizeof(nexthop->src));
+@@ -814,6 +814,7 @@ void nexthop_copy_no_recurse(struct nexthop *copy,
  	memcpy(&copy->rmap_src, &nexthop->rmap_src, sizeof(nexthop->rmap_src));
+ 	memcpy(&copy->rmac, &nexthop->rmac, sizeof(nexthop->rmac));
  	copy->rparent = rparent;
 +	memcpy(&copy->nh_encap.encap_data.rmac, &nexthop->nh_encap.encap_data.rmac, ETH_ALEN);
  	if (nexthop->nh_label)
  		nexthop_add_labels(copy, nexthop->nh_label_type,
  				   nexthop->nh_label->num_labels,
 diff --git a/lib/nexthop.h b/lib/nexthop.h
-index f1309aa52..7b4bbbafd 100644
+index f35cc5e4e2..f6fb6ec2b7 100644
 --- a/lib/nexthop.h
 +++ b/lib/nexthop.h
 @@ -66,6 +66,11 @@ enum nh_encap_type {
@@ -45,9 +46,9 @@ index f1309aa52..7b4bbbafd 100644
 +		struct vxlan_nh_encap encap_data;
  	} nh_encap;
  
- 	/* SR-TE color used for matching SR-TE policies */
+ 	/* EVPN router's MAC.
 diff --git a/zebra/rt_netlink.c b/zebra/rt_netlink.c
-index 79d79d74b..325199eff 100644
+index 79d79d74be..325199eff9 100644
 --- a/zebra/rt_netlink.c
 +++ b/zebra/rt_netlink.c
 @@ -1969,6 +1969,7 @@ static int netlink_route_nexthop_encap(struct nlmsghdr *n, size_t nlen,
@@ -82,32 +83,32 @@ index 79d79d74b..325199eff 100644
  		break;
  	}
 diff --git a/zebra/zapi_msg.c b/zebra/zapi_msg.c
-index c0945eae2..157c33ced 100644
+index 68bb9783f8..c478f83795 100644
 --- a/zebra/zapi_msg.c
 +++ b/zebra/zapi_msg.c
-@@ -1605,6 +1605,8 @@ static struct nexthop *nexthop_from_zapi(const struct zapi_nexthop *api_nh,
- 			vtep_ip.ipa_type = IPADDR_V4;
- 			memcpy(&(vtep_ip.ipaddr_v4), &(api_nh->gate.ipv4),
- 			       sizeof(struct in_addr));
+@@ -1606,6 +1606,8 @@ static struct nexthop *nexthop_from_zapi(const struct zapi_nexthop *api_nh,
+ 		 * the nexthop and associated MAC need to be installed.
+ 		 */
+ 		if (CHECK_FLAG(api_nh->flags, ZAPI_NEXTHOP_FLAG_EVPN)) {
 +			memcpy(&(nexthop->nh_encap.encap_data.rmac),
 +				   &api_nh->rmac, ETH_ALEN);
- 			zebra_rib_queue_evpn_route_add(
- 				api_nh->vrf_id, &api_nh->rmac, &vtep_ip, p);
  			SET_FLAG(nexthop->flags, NEXTHOP_FLAG_EVPN);
-@@ -1639,6 +1641,8 @@ static struct nexthop *nexthop_from_zapi(const struct zapi_nexthop *api_nh,
- 			vtep_ip.ipa_type = IPADDR_V6;
- 			memcpy(&vtep_ip.ipaddr_v6, &(api_nh->gate.ipv6),
- 			       sizeof(struct in6_addr));
+ 			nexthop->rmac = api_nh->rmac;
+ 		}
+@@ -1635,6 +1637,8 @@ static struct nexthop *nexthop_from_zapi(const struct zapi_nexthop *api_nh,
+ 		 * the nexthop and associated MAC need to be installed.
+ 		 */
+ 		if (CHECK_FLAG(api_nh->flags, ZAPI_NEXTHOP_FLAG_EVPN)) {
 +			memcpy(&(nexthop->nh_encap.encap_data.rmac),
 +				   &api_nh->rmac, ETH_ALEN);
- 			zebra_rib_queue_evpn_route_add(
- 				api_nh->vrf_id, &api_nh->rmac, &vtep_ip, p);
  			SET_FLAG(nexthop->flags, NEXTHOP_FLAG_EVPN);
+ 			nexthop->rmac = api_nh->rmac;
+ 		}
 diff --git a/zebra/zebra_dplane.c b/zebra/zebra_dplane.c
-index f6f436f39..c8511bd28 100644
+index 639f3cd918..6f8d37e701 100644
 --- a/zebra/zebra_dplane.c
 +++ b/zebra/zebra_dplane.c
-@@ -2917,7 +2917,7 @@ int dplane_ctx_route_init(struct zebra_dplane_ctx *ctx, enum dplane_op_e op,
+@@ -2934,7 +2934,7 @@ int dplane_ctx_route_init(struct zebra_dplane_ctx *ctx, enum dplane_op_e op,
  		zl3vni = zl3vni_from_vrf(nexthop->vrf_id);
  		if (zl3vni && is_l3vni_oper_up(zl3vni)) {
  			nexthop->nh_encap_type = NET_VXLAN;
diff --git a/src/sonic-frr/patch/0019-zebra-Abstract-dplane_ctx_route_init-to-init-route-w.patch b/src/sonic-frr/patch/0019-zebra-Abstract-dplane_ctx_route_init-to-init-route-w.patch
deleted file mode 100644
index 583609209..000000000
--- a/src/sonic-frr/patch/0019-zebra-Abstract-dplane_ctx_route_init-to-init-route-w.patch
+++ /dev/null
@@ -1,74 +0,0 @@
-From 6fe32f784f57b4f10b96c9cdb938bf5ebf097fa2 Mon Sep 17 00:00:00 2001
-From: Carmine Scarpitta <carmine.scarpitta@uniroma2.it>
-Date: Fri, 7 Jul 2023 02:55:18 +0200
-Subject: [PATCH 1/2] zebra: Abstract `dplane_ctx_route_init` to init route
- without copying
-
-The function `dplane_ctx_route_init` initializes a dplane route context
-from the route object passed as an argument. Let's abstract this
-function to allow initializing the dplane route context without actually
-copying a route object.
-
-This allows us to use this function for initializing a dplane route
-context when we don't have any route to copy in it.
-
-Signed-off-by: Carmine Scarpitta <carmine.scarpitta@uniroma2.it>
-
-diff --git a/zebra/zebra_dplane.c b/zebra/zebra_dplane.c
-index 83a38c2199..ae87e4f8b6 100644
---- a/zebra/zebra_dplane.c
-+++ b/zebra/zebra_dplane.c
-@@ -3257,7 +3257,7 @@ int dplane_ctx_route_init_basic(struct zebra_dplane_ctx *ctx,
- {
- 	int ret = EINVAL;
- 
--	if (!ctx || !re)
-+	if (!ctx)
- 		return ret;
- 
- 	dplane_intf_extra_list_init(&ctx->u.rinfo.intf_extra_list);
-@@ -3265,6 +3265,13 @@ int dplane_ctx_route_init_basic(struct zebra_dplane_ctx *ctx,
- 	ctx->zd_op = op;
- 	ctx->zd_status = ZEBRA_DPLANE_REQUEST_SUCCESS;
- 
-+	/* This function may be called to create/init a dplane context, not
-+	 * necessarily to copy a route object. Let's return if there is no route
-+	 * object to copy.
-+	 */
-+	if (!re)
-+		return AOK;
-+
- 	ctx->u.rinfo.zd_type = re->type;
- 	ctx->u.rinfo.zd_old_type = re->type;
- 
-@@ -3296,6 +3303,8 @@ int dplane_ctx_route_init_basic(struct zebra_dplane_ctx *ctx,
- 
- /*
-  * Initialize a context block for a route update from zebra data structs.
-+ * If the `rn` or `re` parameters are NULL, this function only initializes the
-+ * dplane context without copying a route object into it.
-  */
- int dplane_ctx_route_init(struct zebra_dplane_ctx *ctx, enum dplane_op_e op,
- 			  struct route_node *rn, struct route_entry *re)
-@@ -3312,9 +3321,17 @@ int dplane_ctx_route_init(struct zebra_dplane_ctx *ctx, enum dplane_op_e op,
- 	const struct interface *ifp;
- 	struct dplane_intf_extra *if_extra;
- 
--	if (!ctx || !rn || !re)
-+	if (!ctx)
- 		return ret;
- 
-+	/*
-+	 * Initialize the dplane context and return, if there is no route
-+	 * object to copy
-+	 */
-+	if (!re || !rn)
-+		return dplane_ctx_route_init_basic(ctx, op, NULL, NULL, NULL,
-+						   AFI_UNSPEC, SAFI_UNSPEC);
-+
- 	/*
- 	 * Let's grab the data from the route_node
- 	 * so that we can call a helper function
--- 
-2.17.1
-
diff --git a/src/sonic-frr/patch/0021-zebra-remove-duplicated-nexthops-when-sending-fpm-msg.patch b/src/sonic-frr/patch/0019-zebra-remove-duplicated-nexthops-when-sending-fpm-msg.patch
similarity index 100%
rename from src/sonic-frr/patch/0021-zebra-remove-duplicated-nexthops-when-sending-fpm-msg.patch
rename to src/sonic-frr/patch/0019-zebra-remove-duplicated-nexthops-when-sending-fpm-msg.patch
diff --git a/src/sonic-frr/patch/0020-zebra-Fix-crash-when-dplane_fpm_nl-fails-to-process-.patch b/src/sonic-frr/patch/0020-zebra-Fix-crash-when-dplane_fpm_nl-fails-to-process-.patch
deleted file mode 100644
index f1bbf1306..000000000
--- a/src/sonic-frr/patch/0020-zebra-Fix-crash-when-dplane_fpm_nl-fails-to-process-.patch
+++ /dev/null
@@ -1,50 +0,0 @@
-From 6d7a251e5075a6fbced11e43fcdaa9e324c3871f Mon Sep 17 00:00:00 2001
-From: Carmine Scarpitta <carmine.scarpitta@uniroma2.it>
-Date: Fri, 7 Jul 2023 02:57:07 +0200
-Subject: [PATCH 2/2] zebra: Fix crash when `dplane_fpm_nl` fails to process
- received routes
-
-When `dplane_fpm_nl` receives a route, it allocates memory for a dplane
-context and calls `netlink_route_change_read_unicast_internal` without
-initializing the `intf_extra_list` contained in the dplane context. If
-`netlink_route_change_read_unicast_internal` is not able to process the
-route, we call `dplane_ctx_fini` to free the dplane context. This causes
-a crash because `dplane_ctx_fini` attempts to access the intf_extra_list
-which is not initialized.
-
-To solve this issue, we can call `dplane_ctx_route_init`to initialize
-the dplane route context properly, just after the dplane context
-allocation.
-
-(gdb) bt
-#0 0x0000555dd5ceae80 in dplane_intf_extra_list_pop (h=0x7fae1c007e68) at ../zebra/zebra_dplane.c:427
-#1 dplane_ctx_free_internal (ctx=0x7fae1c0074b0) at ../zebra/zebra_dplane.c:724
-#2 0x0000555dd5cebc99 in dplane_ctx_free (pctx=0x7fae2aa88c98) at ../zebra/zebra_dplane.c:869
-#3 dplane_ctx_free (pctx=0x7fae2aa88c98, pctx@entry=0x7fae2aa78c28) at ../zebra/zebra_dplane.c:855
-#4 dplane_ctx_fini (pctx=pctx@entry=0x7fae2aa88c98) at ../zebra/zebra_dplane.c:890
-#5 0x00007fae31e93f29 in fpm_read (t=) at ../zebra/dplane_fpm_nl.c:605
-#6 0x00007fae325191dd in thread_call (thread=thread@entry=0x7fae2aa98da0) at ../lib/thread.c:2006
-#7 0x00007fae324c42b8 in fpt_run (arg=0x555dd74777c0) at ../lib/frr_pthread.c:309
-#8 0x00007fae32405ea7 in start_thread () from /lib/x86_64-linux-gnu/libpthread.so.0
-#9 0x00007fae32325a2f in clone () from /lib/x86_64-linux-gnu/libc.so.6
-
-Fixes: #13754
-Signed-off-by: Carmine Scarpitta <carmine.scarpitta@uniroma2.it>
-
-diff --git a/zebra/dplane_fpm_nl.c b/zebra/dplane_fpm_nl.c
-index 9f38401618..caa2f988e2 100644
---- a/zebra/dplane_fpm_nl.c
-+++ b/zebra/dplane_fpm_nl.c
-@@ -599,7 +599,8 @@ static void fpm_read(struct thread *t)
- 		switch (hdr->nlmsg_type) {
- 		case RTM_NEWROUTE:
- 			ctx = dplane_ctx_alloc();
--			dplane_ctx_set_op(ctx, DPLANE_OP_ROUTE_NOTIFY);
-+			dplane_ctx_route_init(ctx, DPLANE_OP_ROUTE_NOTIFY, NULL,
-+					      NULL);
- 			if (netlink_route_change_read_unicast_internal(
- 				    hdr, 0, false, ctx) != 1) {
- 				dplane_ctx_fini(&ctx);
--- 
-2.17.1
-
diff --git a/src/sonic-frr/patch/0027-zebra-Fix-non-notification-of-better-admin-won.patch b/src/sonic-frr/patch/0020-zebra-Fix-non-notification-of-better-admin-won.patch
similarity index 60%
rename from src/sonic-frr/patch/0027-zebra-Fix-non-notification-of-better-admin-won.patch
rename to src/sonic-frr/patch/0020-zebra-Fix-non-notification-of-better-admin-won.patch
index a1e06a7f5..324242a48 100644
--- a/src/sonic-frr/patch/0027-zebra-Fix-non-notification-of-better-admin-won.patch
+++ b/src/sonic-frr/patch/0020-zebra-Fix-non-notification-of-better-admin-won.patch
@@ -1,23 +1,29 @@
-From 41b759505afb261211f40e386a30f6cf3870a094 Mon Sep 17 00:00:00 2001
-From: dgsudharsan <sudharsand@nvidia.com>
-Date: Tue, 21 Nov 2023 17:55:24 +0000
-Subject: [PATCH] zebra: Fix non-notification of better admin won If there
- happens to be a entry in the zebra rib that has a lower admin distance then a
- newly received re, zebra would not notify the upper level protocol about this
- happening.  Imagine a case where there is a connected route for say a /32 and
- bgp receives a route from a peer that is the same route as the connected. 
- Since BGP has no network statement and perceives the route as being `good`
- bgp will install the route into zebra.  Zebra will look at the new bgp re and
- correctly identify that the re is not something that it will use and do
- nothing.  This change notices this and sends up a BETTER_ADMIN_WON route
- notification.
+From 9513d3a158e493623a6bc1e5e3e44b6ed277ac28 Mon Sep 17 00:00:00 2001
+From: Donald Sharp <sharpd@nvidia.com>
+Date: Tue, 14 Nov 2023 10:15:42 -0500
+Subject: [PATCH] zebra: Fix non-notification of better admin won
 
+If there happens to be a entry in the zebra rib
+that has a lower admin distance then a newly received
+re, zebra would not notify the upper level protocol
+about this happening.  Imagine a case where there
+is a connected route for say a /32 and bgp receives
+a route from a peer that is the same route as the
+connected.  Since BGP has no network statement and
+perceives the route as being `good` bgp will install
+the route into zebra.  Zebra will look at the new
+bgp re and correctly identify that the re is not
+something that it will use and do nothing.  This
+change notices this and sends up a BETTER_ADMIN_WON
+route notification.
+
+Signed-off-by: Donald Sharp <sharpd@nvidia.com>
 
 diff --git a/zebra/zebra_rib.c b/zebra/zebra_rib.c
-index 039c44cc09..f2f20bcf7b 100644
+index 2c3bb28d6..d37fe98f8 100644
 --- a/zebra/zebra_rib.c
 +++ b/zebra/zebra_rib.c
-@@ -1209,6 +1209,7 @@ static void rib_process(struct route_node *rn)
+@@ -1227,6 +1227,7 @@ static void rib_process(struct route_node *rn)
  	rib_dest_t *dest;
  	struct zebra_vrf *zvrf = NULL;
  	struct vrf *vrf;
@@ -25,7 +31,7 @@ index 039c44cc09..f2f20bcf7b 100644
  
  	vrf_id_t vrf_id = VRF_UNKNOWN;
  
-@@ -1278,6 +1279,7 @@ static void rib_process(struct route_node *rn)
+@@ -1296,6 +1297,7 @@ static void rib_process(struct route_node *rn)
  		 * skip it.
  		 */
  		if (CHECK_FLAG(re->status, ROUTE_ENTRY_CHANGED)) {
@@ -33,7 +39,7 @@ index 039c44cc09..f2f20bcf7b 100644
  			if (!nexthop_active_update(rn, re)) {
  				const struct prefix *p;
  				struct rib_table_info *info;
-@@ -1363,6 +1365,8 @@ static void rib_process(struct route_node *rn)
+@@ -1381,6 +1383,8 @@ static void rib_process(struct route_node *rn)
  	 * new_selected --- RE entry that is newly SELECTED
  	 * old_fib      --- RE entry currently in kernel FIB
  	 * new_fib      --- RE entry that is newly to be in kernel FIB
@@ -42,7 +48,7 @@ index 039c44cc09..f2f20bcf7b 100644
  	 *
  	 * new_selected will get SELECTED flag, and is going to be redistributed
  	 * the zclients. new_fib (which can be new_selected) will be installed
-@@ -1417,6 +1421,22 @@ static void rib_process(struct route_node *rn)
+@@ -1435,6 +1439,22 @@ static void rib_process(struct route_node *rn)
  		}
  	}
  
diff --git a/src/sonic-frr/patch/Disable-ipv6-src-address-test-in-pceplib.patch b/src/sonic-frr/patch/0021-Disable-ipv6-src-address-test-in-pceplib.patch
similarity index 100%
rename from src/sonic-frr/patch/Disable-ipv6-src-address-test-in-pceplib.patch
rename to src/sonic-frr/patch/0021-Disable-ipv6-src-address-test-in-pceplib.patch
diff --git a/src/sonic-frr/patch/0022-bgpd-Don-t-read-the-first-byte-of-ORF-header-if-we-a.patch b/src/sonic-frr/patch/0022-bgpd-Don-t-read-the-first-byte-of-ORF-header-if-we-a.patch
deleted file mode 100644
index 1ee76a180..000000000
--- a/src/sonic-frr/patch/0022-bgpd-Don-t-read-the-first-byte-of-ORF-header-if-we-a.patch
+++ /dev/null
@@ -1,27 +0,0 @@
-From 4fcb9d0764b14463f797f2819905ab819dd770f5 Mon Sep 17 00:00:00 2001
-From: Donatas Abraitis <donatas@opensourcerouting.org>
-Date: Sun, 20 Aug 2023 22:15:27 +0300
-Subject: [PATCH] bgpd: Don't read the first byte of ORF header if we are ahead
- of stream
-
-Reported-by: Iggy Frankovic iggyfran@amazon.com
-Signed-off-by: Donatas Abraitis <donatas@opensourcerouting.org>
-(cherry picked from commit 9b855a692e68e0d16467e190b466b4ecb6853702)
-
-diff --git a/bgpd/bgp_packet.c b/bgpd/bgp_packet.c
-index a2959ef6e..60f1dcbcd 100644
---- a/bgpd/bgp_packet.c
-+++ b/bgpd/bgp_packet.c
-@@ -2408,7 +2408,8 @@ static int bgp_route_refresh_receive(struct peer *peer, bgp_size_t size)
- 				 * and 7 bytes of ORF Address-filter entry from
- 				 * the stream
- 				 */
--				if (*p_pnt & ORF_COMMON_PART_REMOVE_ALL) {
-+				if (p_pnt < p_end &&
-+				    *p_pnt & ORF_COMMON_PART_REMOVE_ALL) {
- 					if (bgp_debug_neighbor_events(peer))
- 						zlog_debug(
- 							"%pBP rcvd Remove-All pfxlist ORF request",
--- 
-2.17.1
-
diff --git a/src/sonic-frr/patch/cross-compile-changes.patch b/src/sonic-frr/patch/0022-cross-compile-changes.patch
similarity index 100%
rename from src/sonic-frr/patch/cross-compile-changes.patch
rename to src/sonic-frr/patch/0022-cross-compile-changes.patch
diff --git a/src/sonic-frr/patch/0023-bgpd-Make-sure-we-have-enough-data-to-read-two-bytes.patch b/src/sonic-frr/patch/0023-bgpd-Make-sure-we-have-enough-data-to-read-two-bytes.patch
deleted file mode 100644
index cde176c58..000000000
--- a/src/sonic-frr/patch/0023-bgpd-Make-sure-we-have-enough-data-to-read-two-bytes.patch
+++ /dev/null
@@ -1,51 +0,0 @@
-From da62ad75f69f2e0e4ec51c7dd5e79bd810f636b6 Mon Sep 17 00:00:00 2001
-From: Donatas Abraitis <donatas@opensourcerouting.org>
-Date: Fri, 18 Aug 2023 11:28:03 +0300
-Subject: [PATCH] bgpd: Make sure we have enough data to read two bytes when
- validating AIGP
-
-Found when fuzzing:
-
-```
-==3470861==ERROR: AddressSanitizer: heap-buffer-overflow on address 0xffff77801ef7 at pc 0xaaaaba7b3dbc bp 0xffffcff0e760 sp 0xffffcff0df50
-READ of size 2 at 0xffff77801ef7 thread T0
-    0 0xaaaaba7b3db8 in __asan_memcpy (/home/ubuntu/frr_8_5_2/frr_8_5_2_fuzz_clang/bgpd/bgpd+0x363db8) (BuildId: cc710a2356e31c7f4e4a17595b54de82145a6e21)
-    1 0xaaaaba81a8ac in ptr_get_be16 /home/ubuntu/frr_8_5_2/frr_8_5_2_fuzz_clang/./lib/stream.h:399:2
-    2 0xaaaaba819f2c in bgp_attr_aigp_valid /home/ubuntu/frr_8_5_2/frr_8_5_2_fuzz_clang/bgpd/bgp_attr.c:504:3
-    3 0xaaaaba808c20 in bgp_attr_aigp /home/ubuntu/frr_8_5_2/frr_8_5_2_fuzz_clang/bgpd/bgp_attr.c:3275:7
-    4 0xaaaaba7ff4e0 in bgp_attr_parse /home/ubuntu/frr_8_5_2/frr_8_5_2_fuzz_clang/bgpd/bgp_attr.c:3678:10
-```
-
-Reported-by: Iggy Frankovic <iggyfran@amazon.com>
-Signed-off-by: Donatas Abraitis <donatas@opensourcerouting.org>
-(cherry picked from commit f96201e104892e18493f24cf67bb713678e8237b)
-
-diff --git a/bgpd/bgp_attr.c b/bgpd/bgp_attr.c
-index 8e66a229c..2ef50ffe5 100644
---- a/bgpd/bgp_attr.c
-+++ b/bgpd/bgp_attr.c
-@@ -513,6 +513,7 @@ static bool bgp_attr_aigp_valid(uint8_t *pnt, int length)
- 	uint8_t *data = pnt;
- 	uint8_t tlv_type;
- 	uint16_t tlv_length;
-+	uint8_t *end = data + length;
- 
- 	if (length < 3) {
- 		zlog_err("Bad AIGP attribute length (MUST be minimum 3): %u",
-@@ -521,7 +522,13 @@ static bool bgp_attr_aigp_valid(uint8_t *pnt, int length)
- 	}
- 
- 	while (length) {
-+		size_t data_len = end - data;
-+
- 		tlv_type = *data;
-+
-+		if (data_len - 1 < 2)
-+			return false;
-+
- 		ptr_get_be16(data + 1, &tlv_length);
- 		(void)data;
- 
--- 
-2.17.1
-
diff --git a/src/sonic-frr/patch/0033-zebra-The-dplane_fpm_nl-return-path-leaks-memory.patch b/src/sonic-frr/patch/0023-zebra-The-dplane_fpm_nl-return-path-leaks-memory.patch
similarity index 86%
rename from src/sonic-frr/patch/0033-zebra-The-dplane_fpm_nl-return-path-leaks-memory.patch
rename to src/sonic-frr/patch/0023-zebra-The-dplane_fpm_nl-return-path-leaks-memory.patch
index 00e8cc006..980f1d87c 100644
--- a/src/sonic-frr/patch/0033-zebra-The-dplane_fpm_nl-return-path-leaks-memory.patch
+++ b/src/sonic-frr/patch/0023-zebra-The-dplane_fpm_nl-return-path-leaks-memory.patch
@@ -1,4 +1,4 @@
-From c13964525dae96299dc54daf635609971576a09e Mon Sep 17 00:00:00 2001
+From bcb608d988b3de282ff832fd398e95080be8ad86 Mon Sep 17 00:00:00 2001
 From: Donald Sharp <sharpd@nvidia.com>
 Date: Mon, 11 Dec 2023 13:41:36 -0500
 Subject: [PATCH] zebra: The dplane_fpm_nl return path leaks memory
@@ -8,9 +8,10 @@ entry data backup to the master pthread in zebra is
 being leaked.  Prevent this from happening.
 
 Signed-off-by: Donald Sharp <sharpd@nvidia.com>
+(cherry picked from commit 7f9c5c7fa2d927033549a806fd9025a9459f22bc)
 
 diff --git a/zebra/rib.h b/zebra/rib.h
-index 016106312..e99eee67c 100644
+index a02a461e8..2e62148ea 100644
 --- a/zebra/rib.h
 +++ b/zebra/rib.h
 @@ -352,6 +352,8 @@ extern void _route_entry_dump(const char *func, union prefixconstptr pp,
@@ -36,10 +37,10 @@ index 6bdc15592..fc9e8c457 100644
  			/*
  			 * I really don't see how this is possible
 diff --git a/zebra/zebra_rib.c b/zebra/zebra_rib.c
-index f2f20bcf7..1cefdfae7 100644
+index 2b47e229a..1ff3d9854 100644
 --- a/zebra/zebra_rib.c
 +++ b/zebra/zebra_rib.c
-@@ -4136,6 +4136,12 @@ struct route_entry *zebra_rib_route_entry_new(vrf_id_t vrf_id, int type,
+@@ -4178,6 +4178,12 @@ struct route_entry *zebra_rib_route_entry_new(vrf_id_t vrf_id, int type,
  
  	return re;
  }
diff --git a/src/sonic-frr/patch/0024-bgpd-Do-not-process-NLRIs-if-the-attribute-length-is.patch b/src/sonic-frr/patch/0024-bgpd-Do-not-process-NLRIs-if-the-attribute-length-is.patch
deleted file mode 100644
index ceac479b4..000000000
--- a/src/sonic-frr/patch/0024-bgpd-Do-not-process-NLRIs-if-the-attribute-length-is.patch
+++ /dev/null
@@ -1,97 +0,0 @@
-From fc5cb12121cb1858c162f9ed8f6206fc61439455 Mon Sep 17 00:00:00 2001
-From: Donatas Abraitis <donatas@opensourcerouting.org>
-Date: Tue, 22 Aug 2023 22:52:04 +0300
-Subject: [PATCH] bgpd: Do not process NLRIs if the attribute length is zero
-
-```
-3  0x00007f423aa42476 in __GI_raise (sig=sig@entry=11) at ../sysdeps/posix/raise.c:26
-4  0x00007f423aef9740 in core_handler (signo=11, siginfo=0x7fffc414deb0, context=<optimized out>) at lib/sigevent.c:246
-5  <signal handler called>
-6  0x0000564dea2fc71e in route_set_aspath_prepend (rule=0x564debd66d50, prefix=0x7fffc414ea30, object=0x7fffc414e400)
-    at bgpd/bgp_routemap.c:2258
-7  0x00007f423aeec7e0 in route_map_apply_ext (map=<optimized out>, prefix=prefix@entry=0x7fffc414ea30,
-    match_object=match_object@entry=0x7fffc414e400, set_object=set_object@entry=0x7fffc414e400, pref=pref@entry=0x0) at lib/routemap.c:2690
-8  0x0000564dea2d277e in bgp_input_modifier (peer=peer@entry=0x7f4238f59010, p=p@entry=0x7fffc414ea30, attr=attr@entry=0x7fffc414e770,
-    afi=afi@entry=AFI_IP, safi=safi@entry=SAFI_UNICAST, rmap_name=rmap_name@entry=0x0, label=0x0, num_labels=0, dest=0x564debdd5130)
-    at bgpd/bgp_route.c:1772
-9  0x0000564dea2df762 in bgp_update (peer=peer@entry=0x7f4238f59010, p=p@entry=0x7fffc414ea30, addpath_id=addpath_id@entry=0,
-    attr=0x7fffc414eb50, afi=afi@entry=AFI_IP, safi=<optimized out>, safi@entry=SAFI_UNICAST, type=9, sub_type=0, prd=0x0, label=0x0,
-    num_labels=0, soft_reconfig=0, evpn=0x0) at bgpd/bgp_route.c:4374
-10 0x0000564dea2e2047 in bgp_nlri_parse_ip (peer=0x7f4238f59010, attr=attr@entry=0x7fffc414eb50, packet=0x7fffc414eaf0)
-    at bgpd/bgp_route.c:6249
-11 0x0000564dea2c5a58 in bgp_nlri_parse (peer=peer@entry=0x7f4238f59010, attr=attr@entry=0x7fffc414eb50,
-    packet=packet@entry=0x7fffc414eaf0, mp_withdraw=mp_withdraw@entry=false) at bgpd/bgp_packet.c:339
-12 0x0000564dea2c5d66 in bgp_update_receive (peer=peer@entry=0x7f4238f59010, size=size@entry=109) at bgpd/bgp_packet.c:2024
-13 0x0000564dea2c901d in bgp_process_packet (thread=<optimized out>) at bgpd/bgp_packet.c:2933
-14 0x00007f423af0bf71 in event_call (thread=thread@entry=0x7fffc414ee40) at lib/event.c:1995
-15 0x00007f423aebb198 in frr_run (master=0x564deb73c670) at lib/libfrr.c:1213
-16 0x0000564dea261b83 in main (argc=<optimized out>, argv=<optimized out>) at bgpd/bgp_main.c:505
-```
-
-With the configuration:
-
-```
-frr version 9.1-dev-MyOwnFRRVersion
-frr defaults traditional
-hostname ip-172-31-13-140
-log file /tmp/debug.log
-log syslog
-service integrated-vtysh-config
-!
-debug bgp keepalives
-debug bgp neighbor-events
-debug bgp updates in
-debug bgp updates out
-!
-router bgp 100
- bgp router-id 9.9.9.9
- no bgp ebgp-requires-policy
- bgp bestpath aigp
- neighbor 172.31.2.47 remote-as 200
- !
- address-family ipv4 unicast
-  neighbor 172.31.2.47 default-originate
-  neighbor 172.31.2.47 route-map RM_IN in
- exit-address-family
-exit
-!
-route-map RM_IN permit 10
- set as-path prepend 200
-exit
-!
-```
-
-The issue is that we try to process NLRIs even if the attribute length is 0.
-
-Later bgp_update() will handle route-maps and a crash occurs because all the
-attributes are NULL, including aspath, where we dereference.
-
-According to the RFC 4271:
-
-A value of 0 indicates that neither the Network Layer
-         Reachability Information field nor the Path Attribute field is
-         present in this UPDATE message.
-
-But with a fuzzed UPDATE message this can be faked. I think it's reasonable
-to skip processing NLRIs if both update_len and attribute_len are 0.
-
-Reported-by: Iggy Frankovic <iggyfran@amazon.com>
-Signed-off-by: Donatas Abraitis <donatas@opensourcerouting.org>
-(cherry picked from commit 28ccc24d38df1d51ed8a563507e5d6f6171fdd38)
-
-diff --git a/bgpd/bgp_packet.c b/bgpd/bgp_packet.c
-index 60f1dcbcd..a02d54894 100644
---- a/bgpd/bgp_packet.c
-+++ b/bgpd/bgp_packet.c
-@@ -1983,7 +1983,7 @@ static int bgp_update_receive(struct peer *peer, bgp_size_t size)
- 	/* Network Layer Reachability Information. */
- 	update_len = end - stream_pnt(s);
- 
--	if (update_len) {
-+	if (update_len && attribute_len) {
- 		/* Set NLRI portion to structure. */
- 		nlris[NLRI_UPDATE].afi = AFI_IP;
- 		nlris[NLRI_UPDATE].safi = SAFI_UNICAST;
--- 
-2.17.1
-
diff --git a/src/sonic-frr/patch/0024-lib-use-snmp-s-large-fd-sets-for-agentx.patch b/src/sonic-frr/patch/0024-lib-use-snmp-s-large-fd-sets-for-agentx.patch
new file mode 100644
index 000000000..ad3da2a0a
--- /dev/null
+++ b/src/sonic-frr/patch/0024-lib-use-snmp-s-large-fd-sets-for-agentx.patch
@@ -0,0 +1,143 @@
+From 7e1857bf4315ae01e065fc8bc881338977c1ef87 Mon Sep 17 00:00:00 2001
+From: Edwin Brossette <edwin.brossette@6wind.com>
+Date: Fri, 8 Dec 2023 16:02:11 +0100
+Subject: [PATCH] lib: use snmp's large fd sets for agentx
+
+The maximum number of file descriptors in an fd set is limited by
+FD_SETSIZE. This limitation is important because the libc macros
+FD_SET(), FD_CLR() and FD_ISSET() will invoke a sigabort if the size of
+the fd set given to them is above FD_SETSIZE.
+
+We ran into such a sigabort with bgpd because snmp can return an fd set
+of size higher than FD_SETSIZE when calling snmp_select_info(). An
+unfortunate FD_ISSET() call later causes the following abort:
+
+Received signal 6 at 1701115534 (si_addr 0xb94, PC 0x7ff289a16a7c); aborting...
+/lib/x86_64-linux-gnu/libfrr.so.0(zlog_backtrace_sigsafe+0xb3) [0x7ff289d62bba]
+/lib/x86_64-linux-gnu/libfrr.so.0(zlog_signal+0x1b4) [0x7ff289d62a1f]
+/lib/x86_64-linux-gnu/libfrr.so.0(+0x102860) [0x7ff289da4860]
+/lib/x86_64-linux-gnu/libc.so.6(+0x42520) [0x7ff2899c2520]
+/lib/x86_64-linux-gnu/libc.so.6(pthread_kill+0x12c) [0x7ff289a16a7c]
+/lib/x86_64-linux-gnu/libc.so.6(raise+0x16) [0x7ff2899c2476]
+/lib/x86_64-linux-gnu/libc.so.6(abort+0xd3) [0x7ff2899a87f3]
+/lib/x86_64-linux-gnu/libc.so.6(+0x896f6) [0x7ff289a096f6]
+/lib/x86_64-linux-gnu/libc.so.6(__fortify_fail+0x2a) [0x7ff289ab676a]
+/lib/x86_64-linux-gnu/libc.so.6(+0x1350c6) [0x7ff289ab50c6]
+/lib/x86_64-linux-gnu/libc.so.6(+0x1366ab) [0x7ff289ab66ab]
+/lib/x86_64-linux-gnu/libfrrsnmp.so.0(+0x36f5) [0x7ff2897736f5]
+/lib/x86_64-linux-gnu/libfrrsnmp.so.0(+0x3c27) [0x7ff289773c27]
+/lib/x86_64-linux-gnu/libfrr.so.0(thread_call+0x1c2) [0x7ff289dbe105]
+/lib/x86_64-linux-gnu/libfrr.so.0(frr_run+0x257) [0x7ff289d56e69]
+/usr/bin/bgpd(main+0x4f4) [0x560965c40488]
+/lib/x86_64-linux-gnu/libc.so.6(+0x29d90) [0x7ff2899a9d90]
+/lib/x86_64-linux-gnu/libc.so.6(__libc_start_main+0x80) [0x7ff2899a9e40]
+/usr/bin/bgpd(_start+0x25) [0x560965c3e965]
+in thread agentx_timeout scheduled from /build/make-pkg/output/_packages/cp-routing/src/lib/agentx.c:122 agentx_events_update()
+
+Also, the following error is logged by snmp just before the abort:
+snmp[err]: Use snmp_sess_select_info2() for processing large file descriptors
+
+snmp uses a custom struct netsnmp_large_fd_set to work above the limit
+imposed by FD_SETSIZE. It is noteworthy that, when calling
+snmp_select_info() instead of snmp_select_info2(), snmp uses the same
+code working with its custom, large structs, and copy/paste the result
+to a regular, libc compatible fd_set. So there should be no downside
+working with snmp_select_info2() instead of snmp_select_info().
+
+Replace every use of the libc file descriptors sets by snmp's extended
+file descriptors sets in agentx to acommodate for the high number of
+file descriptors that can come out of snmp. This should prevent the
+abort seen above.
+
+Signed-off-by: Edwin Brossette <edwin.brossette@6wind.com>
+
+diff --git a/lib/agentx.c b/lib/agentx.c
+index 5f6245980..be8277c53 100644
+--- a/lib/agentx.c
++++ b/lib/agentx.c
+@@ -25,6 +25,7 @@
+ #include <net-snmp/net-snmp-includes.h>
+ #include <net-snmp/agent/net-snmp-agent-includes.h>
+ #include <net-snmp/agent/snmp_vars.h>
++#include <net-snmp/library/large_fd_set.h>
+ 
+ #include "command.h"
+ #include "smux.h"
+@@ -58,7 +59,7 @@ static void agentx_timeout(struct thread *t)
+ 
+ static void agentx_read(struct thread *t)
+ {
+-	fd_set fds;
++	netsnmp_large_fd_set lfds;
+ 	int flags, new_flags = 0;
+ 	int nonblock = false;
+ 	struct listnode *ln = THREAD_ARG(t);
+@@ -83,9 +84,9 @@ static void agentx_read(struct thread *t)
+ 		flog_err(EC_LIB_SYSTEM_CALL, "Failed to set snmp fd non blocking: %s(%d)",
+ 			 strerror(errno), errno);
+ 
+-	FD_ZERO(&fds);
+-	FD_SET(THREAD_FD(t), &fds);
+-	snmp_read(&fds);
++	netsnmp_large_fd_set_init(&lfds, FD_SETSIZE);
++	netsnmp_large_fd_setfd(t->u.fd, &lfds);
++	snmp_read2(&lfds);
+ 
+ 	/* Reset the flag */
+ 	if (!nonblock) {
+@@ -100,6 +101,7 @@ static void agentx_read(struct thread *t)
+ 
+ 	netsnmp_check_outstanding_agent_requests();
+ 	agentx_events_update();
++	netsnmp_large_fd_set_cleanup(&lfds);
+ }
+ 
+ static void agentx_events_update(void)
+@@ -107,15 +109,15 @@ static void agentx_events_update(void)
+ 	int maxfd = 0;
+ 	int block = 1;
+ 	struct timeval timeout = {.tv_sec = 0, .tv_usec = 0};
+-	fd_set fds;
++	netsnmp_large_fd_set lfds;
+ 	struct listnode *ln;
+ 	struct thread **thr;
+ 	int fd, thr_fd;
+ 
+ 	thread_cancel(&timeout_thr);
+ 
+-	FD_ZERO(&fds);
+-	snmp_select_info(&maxfd, &fds, &timeout, &block);
++	netsnmp_large_fd_set_init(&lfds, FD_SETSIZE);
++	snmp_select_info2(&maxfd, &lfds, &timeout, &block);
+ 
+ 	if (!block) {
+ 		thread_add_timer_tv(agentx_tm, agentx_timeout, NULL, &timeout,
+@@ -133,7 +135,7 @@ static void agentx_events_update(void)
+ 		/* caught up */
+ 		if (thr_fd == fd) {
+ 			struct listnode *nextln = listnextnode(ln);
+-			if (!FD_ISSET(fd, &fds)) {
++			if (!netsnmp_large_fd_is_set(fd, &lfds)) {
+ 				thread_cancel(thr);
+ 				XFREE(MTYPE_TMP, thr);
+ 				list_delete_node(events, ln);
+@@ -143,7 +145,7 @@ static void agentx_events_update(void)
+ 			thr_fd = thr ? THREAD_FD(*thr) : -1;
+ 		}
+ 		/* need listener, but haven't hit one where it would be */
+-		else if (FD_ISSET(fd, &fds)) {
++		else if (netsnmp_large_fd_is_set(fd, &lfds)) {
+ 			struct listnode *newln;
+ 			thr = XCALLOC(MTYPE_TMP, sizeof(struct thread *));
+ 
+@@ -162,6 +164,7 @@ static void agentx_events_update(void)
+ 		list_delete_node(events, ln);
+ 		ln = nextln;
+ 	}
++	netsnmp_large_fd_set_cleanup(&lfds);
+ }
+ 
+ /* AgentX node. */
+-- 
+2.17.1
+
diff --git a/src/sonic-frr/patch/0025-bgp-community-memory-leak-fix.patch b/src/sonic-frr/patch/0025-bgp-community-memory-leak-fix.patch
new file mode 100644
index 000000000..f8215e07f
--- /dev/null
+++ b/src/sonic-frr/patch/0025-bgp-community-memory-leak-fix.patch
@@ -0,0 +1,395 @@
+From 92323cf4b506c40376be74e955836da30980ae54 Mon Sep 17 00:00:00 2001
+From: Donald Sharp <sharpd@nvidia.com>
+Date: Wed, 13 Mar 2024 10:26:58 -0400
+Subject: [PATCH 1/3] bgpd: Ensure that the correct aspath is free'd
+
+Currently in subgroup_default_originate the attr.aspath
+is set in bgp_attr_default_set, which hashs the aspath
+and creates a refcount for it.  If this is a withdraw
+the subgroup_announce_check and bgp_adj_out_set_subgroup
+is called which will intern the attribute.  This will
+cause the the attr.aspath to be set to a new value
+finally at the bottom of the function it intentionally
+uninterns the aspath which is not the one that was
+created for this function.  This reduces the other
+aspath's refcount by 1 and if a clear bgp * is issued
+fast enough the aspath for that will be removed
+and the system will crash.
+
+Signed-off-by: Donald Sharp <sharpd@nvidia.com>
+---
+ bgpd/bgp_updgrp_adv.c | 4 +++-
+ 1 file changed, 3 insertions(+), 1 deletion(-)
+
+diff --git a/bgpd/bgp_updgrp_adv.c b/bgpd/bgp_updgrp_adv.c
+index de2b3206b7..dcde4263da 100644
+--- a/bgpd/bgp_updgrp_adv.c
++++ b/bgpd/bgp_updgrp_adv.c
+@@ -813,6 +813,7 @@ void subgroup_default_originate(struct update_subgroup *subgrp, int withdraw)
+ 	struct bgp *bgp;
+ 	struct attr attr;
+ 	struct attr *new_attr = &attr;
++	struct aspath *aspath;
+ 	struct prefix p;
+ 	struct peer *from;
+ 	struct bgp_dest *dest;
+@@ -850,6 +851,7 @@ void subgroup_default_originate(struct update_subgroup *subgrp, int withdraw)
+ 	/* make coverity happy */
+ 	assert(attr.aspath);
+ 
++	aspath = attr.aspath;
+ 	attr.med = 0;
+ 	attr.flag |= ATTR_FLAG_BIT(BGP_ATTR_MULTI_EXIT_DISC);
+ 
+@@ -1005,7 +1007,7 @@ void subgroup_default_originate(struct update_subgroup *subgrp, int withdraw)
+ 		}
+ 	}
+ 
+-	aspath_unintern(&attr.aspath);
++	aspath_unintern(&aspath);
+ }
+ 
+ /*
+-- 
+2.14.1
+
+
+From 07545c1879775f155f228c81393eed9697b699de Mon Sep 17 00:00:00 2001
+From: Donald Sharp <sharpd@nvidia.com>
+Date: Sat, 2 Mar 2024 09:42:30 -0500
+Subject: [PATCH 2/3] bgpd: Include unsuppress-map as a valid outgoing policy
+
+If unsuppress-map is setup for outgoing peers, consider that
+policy is being applied as for RFC 8212.
+
+Signed-off-by: Donald Sharp <sharpd@nvidia.com>
+---
+ bgpd/bgp_route.c | 8 ++++----
+ 1 file changed, 4 insertions(+), 4 deletions(-)
+
+diff --git a/bgpd/bgp_route.c b/bgpd/bgp_route.c
+index 473168d9be..fb14fc7f20 100644
+--- a/bgpd/bgp_route.c
++++ b/bgpd/bgp_route.c
+@@ -5816,10 +5816,10 @@ bool bgp_outbound_policy_exists(struct peer *peer, struct bgp_filter *filter)
+ 	if (peer->sort == BGP_PEER_IBGP)
+ 		return true;
+ 
+-	if (peer->sort == BGP_PEER_EBGP
+-	    && (ROUTE_MAP_OUT_NAME(filter) || PREFIX_LIST_OUT_NAME(filter)
+-		|| FILTER_LIST_OUT_NAME(filter)
+-		|| DISTRIBUTE_OUT_NAME(filter)))
++	if (peer->sort == BGP_PEER_EBGP &&
++	    (ROUTE_MAP_OUT_NAME(filter) || PREFIX_LIST_OUT_NAME(filter) ||
++	     FILTER_LIST_OUT_NAME(filter) || DISTRIBUTE_OUT_NAME(filter) ||
++	     UNSUPPRESS_MAP_NAME(filter)))
+ 		return true;
+ 	return false;
+ }
+-- 
+2.14.1
+
+
+From e3493d5be0156fa9c8c522b818ae6448dbe371f2 Mon Sep 17 00:00:00 2001
+From: Donald Sharp <sharpd@nvidia.com>
+Date: Sat, 2 Mar 2024 09:50:38 -0500
+Subject: [PATCH 3/3] bgpd: Ensure community data is freed in some cases.
+
+Customer has this valgrind trace:
+
+Direct leak of 2829120 byte(s) in 70728 object(s) allocated from:
+  0 in community_new ../bgpd/bgp_community.c:39
+  1 in community_uniq_sort ../bgpd/bgp_community.c:170
+  2 in route_set_community ../bgpd/bgp_routemap.c:2342
+  3 in route_map_apply_ext ../lib/routemap.c:2673
+  4 in subgroup_announce_check ../bgpd/bgp_route.c:2367
+  5 in subgroup_process_announce_selected ../bgpd/bgp_route.c:2914
+  6 in group_announce_route_walkcb ../bgpd/bgp_updgrp_adv.c:199
+  7 in hash_walk ../lib/hash.c:285
+  8 in update_group_af_walk ../bgpd/bgp_updgrp.c:2061
+  9 in group_announce_route ../bgpd/bgp_updgrp_adv.c:1059
+ 10 in bgp_process_main_one ../bgpd/bgp_route.c:3221
+ 11 in bgp_process_wq ../bgpd/bgp_route.c:3221
+ 12 in work_queue_run ../lib/workqueue.c:282
+
+The above leak detected by valgrind was from a screenshot so I copied it
+by hand.  Any mistakes in line numbers are purely from my transcription.
+Additionally this is against a slightly modified 8.5.1 version of FRR.
+Code inspection of 8.5.1 -vs- latest master shows the same problem
+exists.  Code should be able to be followed from there to here.
+
+What is happening:
+
+There is a route-map being applied that modifes the outgoing community
+to a peer.  This is saved in the attr copy created in
+subgroup_process_announce_selected.  This community pointer is not
+interned.  So the community->refcount is still 0.  Normally when
+a prefix is announced, the attr and the prefix are placed on a
+adjency out structure where the attribute is interned.  This will
+cause the community to be saved in the community hash list as well.
+In a non-normal operation when the decision to send is aborted after
+the route-map application, the attribute is just dropped and the
+pointer to the community is just dropped too, leading to situations
+where the memory is leaked.  The usage of bgp suppress-fib would
+would be a case where the community is caused to be leaked.
+Additionally the previous commit where an unsuppress-map is used
+to modify the outgoing attribute but since unsuppress-map was
+not considered part of outgoing policy the attribute would be dropped as
+well.  This pointer drop also extends to any dynamically allocated
+memory saved by the attribute pointer that was not interned yet as well.
+
+So let's modify the return case where the decision is made to
+not send the prefix to the peer to always just flush the attribute
+to ensure memory is not leaked.
+
+Fixes: #15459
+Signed-off-by: Donald Sharp <sharpd@nvidia.com>
+---
+ bgpd/bgp_conditional_adv.c |  5 ++--
+ bgpd/bgp_route.c           | 30 +++++++++++++-----------
+ bgpd/bgp_updgrp.h          |  2 +-
+ bgpd/bgp_updgrp_adv.c      | 58 +++++++++++++++++++++++++---------------------
+ 4 files changed, 51 insertions(+), 44 deletions(-)
+
+diff --git a/bgpd/bgp_conditional_adv.c b/bgpd/bgp_conditional_adv.c
+index 24d822a745..edb9bc8bb7 100644
+--- a/bgpd/bgp_conditional_adv.c
++++ b/bgpd/bgp_conditional_adv.c
+@@ -135,8 +135,9 @@ static void bgp_conditional_adv_routes(struct peer *peer, afi_t afi,
+ 			if (update_type == UPDATE_TYPE_ADVERTISE &&
+ 			    subgroup_announce_check(dest, pi, subgrp, dest_p,
+ 						    &attr, &advmap_attr)) {
+-				bgp_adj_out_set_subgroup(dest, subgrp, &attr,
+-							 pi);
++				if (!bgp_adj_out_set_subgroup(dest, subgrp,
++							      &attr, pi))
++					bgp_attr_flush(&attr);
+ 			} else {
+ 				/* If default originate is enabled for
+ 				 * the peer, do not send explicit
+diff --git a/bgpd/bgp_route.c b/bgpd/bgp_route.c
+index fb14fc7f20..2976042dda 100644
+--- a/bgpd/bgp_route.c
++++ b/bgpd/bgp_route.c
+@@ -2879,7 +2879,7 @@ void subgroup_process_announce_selected(struct update_subgroup *subgrp,
+ {
+ 	const struct prefix *p;
+ 	struct peer *onlypeer;
+-	struct attr attr;
++	struct attr attr = {0}, *pattr = &attr;
+ 	afi_t afi;
+ 	safi_t safi;
+ 	struct bgp *bgp;
+@@ -2900,7 +2900,7 @@ void subgroup_process_announce_selected(struct update_subgroup *subgrp,
+ 				   PEER_STATUS_ORF_WAIT_REFRESH))
+ 		return;
+ 
+-	memset(&attr, 0, sizeof(attr));
++	memset(pattr, 0, sizeof(*pattr));
+ 	/* It's initialized in bgp_announce_check() */
+ 
+ 	/* Announcement to the subgroup. If the route is filtered withdraw it.
+@@ -2911,32 +2911,34 @@ void subgroup_process_announce_selected(struct update_subgroup *subgrp,
+ 	advertise = bgp_check_advertise(bgp, dest);
+ 
+ 	if (selected) {
+-		if (subgroup_announce_check(dest, selected, subgrp, p, &attr,
++		if (subgroup_announce_check(dest, selected, subgrp, p, pattr,
+ 					    NULL)) {
+ 			/* Route is selected, if the route is already installed
+ 			 * in FIB, then it is advertised
+ 			 */
+ 			if (advertise) {
+ 				if (!bgp_check_withdrawal(bgp, dest)) {
+-					struct attr *adv_attr =
+-						bgp_attr_intern(&attr);
+-
+-					bgp_adj_out_set_subgroup(dest, subgrp,
+-								 adv_attr,
+-								 selected);
+-				} else
++					if (!bgp_adj_out_set_subgroup(
++						    dest, subgrp, pattr,
++						    selected))
++						bgp_attr_flush(pattr);
++				} else {
+ 					bgp_adj_out_unset_subgroup(
+ 						dest, subgrp, 1, addpath_tx_id);
+-			}
+-		} else
++					bgp_attr_flush(pattr);
++				}
++			} else
++				bgp_attr_flush(pattr);
++		} else {
+ 			bgp_adj_out_unset_subgroup(dest, subgrp, 1,
+ 						   addpath_tx_id);
++			bgp_attr_flush(pattr);
++		}
+ 	}
+ 
+ 	/* If selected is NULL we must withdraw the path using addpath_tx_id */
+-	else {
++	else
+ 		bgp_adj_out_unset_subgroup(dest, subgrp, 1, addpath_tx_id);
+-	}
+ }
+ 
+ /*
+diff --git a/bgpd/bgp_updgrp.h b/bgpd/bgp_updgrp.h
+index e27c1e7b67..b7b6aa07e9 100644
+--- a/bgpd/bgp_updgrp.h
++++ b/bgpd/bgp_updgrp.h
+@@ -458,7 +458,7 @@ extern struct bgp_adj_out *bgp_adj_out_alloc(struct update_subgroup *subgrp,
+ extern void bgp_adj_out_remove_subgroup(struct bgp_dest *dest,
+ 					struct bgp_adj_out *adj,
+ 					struct update_subgroup *subgrp);
+-extern void bgp_adj_out_set_subgroup(struct bgp_dest *dest,
++extern bool bgp_adj_out_set_subgroup(struct bgp_dest *dest,
+ 				     struct update_subgroup *subgrp,
+ 				     struct attr *attr,
+ 				     struct bgp_path_info *path);
+diff --git a/bgpd/bgp_updgrp_adv.c b/bgpd/bgp_updgrp_adv.c
+index dcde4263da..7902d40bd9 100644
+--- a/bgpd/bgp_updgrp_adv.c
++++ b/bgpd/bgp_updgrp_adv.c
+@@ -454,7 +454,7 @@ bgp_advertise_clean_subgroup(struct update_subgroup *subgrp,
+ 	return next;
+ }
+ 
+-void bgp_adj_out_set_subgroup(struct bgp_dest *dest,
++bool bgp_adj_out_set_subgroup(struct bgp_dest *dest,
+ 			      struct update_subgroup *subgrp, struct attr *attr,
+ 			      struct bgp_path_info *path)
+ {
+@@ -474,7 +474,7 @@ void bgp_adj_out_set_subgroup(struct bgp_dest *dest,
+ 	bgp = SUBGRP_INST(subgrp);
+ 
+ 	if (DISABLE_BGP_ANNOUNCE)
+-		return;
++		return false;
+ 
+ 	/* Look for adjacency information. */
+ 	adj = adj_lookup(
+@@ -490,7 +490,7 @@ void bgp_adj_out_set_subgroup(struct bgp_dest *dest,
+ 			bgp_addpath_id_for_peer(peer, afi, safi,
+ 						&path->tx_addpath));
+ 		if (!adj)
+-			return;
++			return false;
+ 
+ 		subgrp->pscount++;
+ 	}
+@@ -529,7 +529,7 @@ void bgp_adj_out_set_subgroup(struct bgp_dest *dest,
+ 		 * will never be able to coalesce the 3rd peer down
+ 		 */
+ 		subgrp->version = MAX(subgrp->version, dest->version);
+-		return;
++		return false;
+ 	}
+ 
+ 	if (adj->adv)
+@@ -576,6 +576,8 @@ void bgp_adj_out_set_subgroup(struct bgp_dest *dest,
+ 	bgp_adv_fifo_add_tail(&subgrp->sync->update, adv);
+ 
+ 	subgrp->version = MAX(subgrp->version, dest->version);
++
++	return true;
+ }
+ 
+ /* The only time 'withdraw' will be false is if we are sending
+@@ -668,7 +670,7 @@ void subgroup_announce_table(struct update_subgroup *subgrp,
+ {
+ 	struct bgp_dest *dest;
+ 	struct bgp_path_info *ri;
+-	struct attr attr;
++	struct attr attr = {0}, *pattr = &attr;
+ 	struct peer *peer;
+ 	afi_t afi;
+ 	safi_t safi;
+@@ -712,24 +714,25 @@ void subgroup_announce_table(struct update_subgroup *subgrp,
+ 				continue;
+ 
+ 			if (subgroup_announce_check(dest, ri, subgrp, dest_p,
+-						    &attr, NULL)) {
++						    pattr, NULL)) {
+ 				/* Check if route can be advertised */
+ 				if (advertise) {
+ 					if (!bgp_check_withdrawal(bgp, dest)) {
+-						struct attr *adv_attr =
+-							bgp_attr_intern(&attr);
+-
+-						bgp_adj_out_set_subgroup(
+-							dest, subgrp, adv_attr,
+-							ri);
+-					} else
++						if (!bgp_adj_out_set_subgroup(
++							    dest, subgrp, pattr,
++							    ri))
++							bgp_attr_flush(pattr);
++					} else {
+ 						bgp_adj_out_unset_subgroup(
+ 							dest, subgrp, 1,
+ 							bgp_addpath_id_for_peer(
+ 								peer, afi,
+ 								safi_rib,
+ 								&ri->tx_addpath));
+-				}
++						bgp_attr_flush(pattr);
++					}
++				} else
++					bgp_attr_flush(pattr);
+ 			} else {
+ 				/* If default originate is enabled for
+ 				 * the peer, do not send explicit
+@@ -748,6 +751,7 @@ void subgroup_announce_table(struct update_subgroup *subgrp,
+ 					bgp_addpath_id_for_peer(
+ 						peer, afi, safi_rib,
+ 						&ri->tx_addpath));
++				bgp_attr_flush(pattr);
+ 			}
+ 		}
+ 	}
+@@ -811,7 +815,7 @@ void subgroup_announce_route(struct update_subgroup *subgrp)
+ void subgroup_default_originate(struct update_subgroup *subgrp, int withdraw)
+ {
+ 	struct bgp *bgp;
+-	struct attr attr;
++	struct attr attr = {0};
+ 	struct attr *new_attr = &attr;
+ 	struct aspath *aspath;
+ 	struct prefix p;
+@@ -952,18 +956,18 @@ void subgroup_default_originate(struct update_subgroup *subgrp, int withdraw)
+ 		if (dest) {
+ 			for (pi = bgp_dest_get_bgp_path_info(dest); pi;
+ 			     pi = pi->next) {
+-				if (CHECK_FLAG(pi->flags, BGP_PATH_SELECTED))
+-					if (subgroup_announce_check(
+-						    dest, pi, subgrp,
+-						    bgp_dest_get_prefix(dest),
+-						    &attr, NULL)) {
+-						struct attr *default_attr =
+-							bgp_attr_intern(&attr);
+-
+-						bgp_adj_out_set_subgroup(
+-							dest, subgrp,
+-							default_attr, pi);
+-					}
++				if (!CHECK_FLAG(pi->flags, BGP_PATH_SELECTED))
++					continue;
++
++				if (subgroup_announce_check(
++					    dest, pi, subgrp,
++					    bgp_dest_get_prefix(dest), &attr,
++					    NULL)) {
++					if (!bgp_adj_out_set_subgroup(
++						    dest, subgrp, &attr, pi))
++						bgp_attr_flush(&attr);
++				} else
++					bgp_attr_flush(&attr);
+ 			}
+ 			bgp_dest_unlock_node(dest);
+ 		}
+-- 
+2.14.1
+
diff --git a/src/sonic-frr/patch/0025-bgpd-Use-treat-as-withdraw-for-tunnel-encapsulation-.patch b/src/sonic-frr/patch/0025-bgpd-Use-treat-as-withdraw-for-tunnel-encapsulation-.patch
deleted file mode 100644
index 6a7aae3c6..000000000
--- a/src/sonic-frr/patch/0025-bgpd-Use-treat-as-withdraw-for-tunnel-encapsulation-.patch
+++ /dev/null
@@ -1,129 +0,0 @@
-From 35b98f89f6a2ca5a79ed8893b4df612c0c6b4a37 Mon Sep 17 00:00:00 2001
-From: Donatas Abraitis <donatas@opensourcerouting.org>
-Date: Thu, 13 Jul 2023 22:32:03 +0300
-Subject: [PATCH] bgpd: Use treat-as-withdraw for tunnel encapsulation
- attribute
-
-Before this path we used session reset method, which is discouraged by rfc7606.
-
-Handle this as rfc requires.
-
-Signed-off-by: Donatas Abraitis <donatas@opensourcerouting.org>
-(cherry picked from commit bcb6b58d9530173df41d3a3cbc4c600ee0b4b186)
-
-diff --git a/bgpd/bgp_attr.c b/bgpd/bgp_attr.c
-index 2ef50ffe5..ee20da332 100644
---- a/bgpd/bgp_attr.c
-+++ b/bgpd/bgp_attr.c
-@@ -1416,6 +1416,7 @@ bgp_attr_malformed(struct bgp_attr_parser_args *args, uint8_t subcode,
- 	case BGP_ATTR_LARGE_COMMUNITIES:
- 	case BGP_ATTR_ORIGINATOR_ID:
- 	case BGP_ATTR_CLUSTER_LIST:
-+	case BGP_ATTR_ENCAP:
- 	case BGP_ATTR_OTC:
- 		return BGP_ATTR_PARSE_WITHDRAW;
- 	case BGP_ATTR_MP_REACH_NLRI:
-@@ -2644,26 +2645,21 @@ ipv6_ext_community_ignore:
- }
- 
- /* Parse Tunnel Encap attribute in an UPDATE */
--static int bgp_attr_encap(uint8_t type, struct peer *peer, /* IN */
--			  bgp_size_t length, /* IN: attr's length field */
--			  struct attr *attr, /* IN: caller already allocated */
--			  uint8_t flag,      /* IN: attr's flags field */
--			  uint8_t *startp)
-+static int bgp_attr_encap(struct bgp_attr_parser_args *args)
- {
--	bgp_size_t total;
- 	uint16_t tunneltype = 0;
--
--	total = length + (CHECK_FLAG(flag, BGP_ATTR_FLAG_EXTLEN) ? 4 : 3);
-+	struct peer *const peer = args->peer;
-+	struct attr *const attr = args->attr;
-+	bgp_size_t length = args->length;
-+	uint8_t type = args->type;
-+	uint8_t flag = args->flags;
- 
- 	if (!CHECK_FLAG(flag, BGP_ATTR_FLAG_TRANS)
- 	    || !CHECK_FLAG(flag, BGP_ATTR_FLAG_OPTIONAL)) {
--		zlog_info(
--			"Tunnel Encap attribute flag isn't optional and transitive %d",
--			flag);
--		bgp_notify_send_with_data(peer, BGP_NOTIFY_UPDATE_ERR,
--					  BGP_NOTIFY_UPDATE_ATTR_FLAG_ERR,
--					  startp, total);
--		return -1;
-+		zlog_err("Tunnel Encap attribute flag isn't optional and transitive %d",
-+			 flag);
-+		return bgp_attr_malformed(args, BGP_NOTIFY_UPDATE_OPT_ATTR_ERR,
-+					  args->total);
- 	}
- 
- 	if (BGP_ATTR_ENCAP == type) {
-@@ -2671,12 +2667,11 @@ static int bgp_attr_encap(uint8_t type, struct peer *peer, /* IN */
- 		uint16_t tlv_length;
- 
- 		if (length < 4) {
--			zlog_info(
-+			zlog_err(
- 				"Tunnel Encap attribute not long enough to contain outer T,L");
--			bgp_notify_send_with_data(
--				peer, BGP_NOTIFY_UPDATE_ERR,
--				BGP_NOTIFY_UPDATE_OPT_ATTR_ERR, startp, total);
--			return -1;
-+			return bgp_attr_malformed(args,
-+						  BGP_NOTIFY_UPDATE_OPT_ATTR_ERR,
-+						  args->total);
- 		}
- 		tunneltype = stream_getw(BGP_INPUT(peer));
- 		tlv_length = stream_getw(BGP_INPUT(peer));
-@@ -2706,13 +2701,11 @@ static int bgp_attr_encap(uint8_t type, struct peer *peer, /* IN */
- 		}
- 
- 		if (sublength > length) {
--			zlog_info(
--				"Tunnel Encap attribute sub-tlv length %d exceeds remaining length %d",
--				sublength, length);
--			bgp_notify_send_with_data(
--				peer, BGP_NOTIFY_UPDATE_ERR,
--				BGP_NOTIFY_UPDATE_OPT_ATTR_ERR, startp, total);
--			return -1;
-+			zlog_err("Tunnel Encap attribute sub-tlv length %d exceeds remaining length %d",
-+				 sublength, length);
-+			return bgp_attr_malformed(args,
-+						  BGP_NOTIFY_UPDATE_OPT_ATTR_ERR,
-+						  args->total);
- 		}
- 
- 		/* alloc and copy sub-tlv */
-@@ -2760,13 +2753,10 @@ static int bgp_attr_encap(uint8_t type, struct peer *peer, /* IN */
- 
- 	if (length) {
- 		/* spurious leftover data */
--		zlog_info(
--			"Tunnel Encap attribute length is bad: %d leftover octets",
--			length);
--		bgp_notify_send_with_data(peer, BGP_NOTIFY_UPDATE_ERR,
--					  BGP_NOTIFY_UPDATE_OPT_ATTR_ERR,
--					  startp, total);
--		return -1;
-+		zlog_err("Tunnel Encap attribute length is bad: %d leftover octets",
-+			 length);
-+		return bgp_attr_malformed(args, BGP_NOTIFY_UPDATE_OPT_ATTR_ERR,
-+					  args->total);
- 	}
- 
- 	return 0;
-@@ -3718,8 +3708,7 @@ enum bgp_attr_parse_ret bgp_attr_parse(struct peer *peer, struct attr *attr,
- 		case BGP_ATTR_VNC:
- #endif
- 		case BGP_ATTR_ENCAP:
--			ret = bgp_attr_encap(type, peer, length, attr, flag,
--					     startp);
-+			ret = bgp_attr_encap(&attr_args);
- 			break;
- 		case BGP_ATTR_PREFIX_SID:
- 			ret = bgp_attr_prefix_sid(&attr_args);
--- 
-2.17.1
-
diff --git a/src/sonic-frr/patch/0026-bgp-fib-suppress-announce-fix.patch b/src/sonic-frr/patch/0026-bgp-fib-suppress-announce-fix.patch
new file mode 100644
index 000000000..a6e9d4d46
--- /dev/null
+++ b/src/sonic-frr/patch/0026-bgp-fib-suppress-announce-fix.patch
@@ -0,0 +1,122 @@
+From bf292bfd8b4e2d7ba181ce6efde4e43e066d1a88 Mon Sep 17 00:00:00 2001
+From: Donald Sharp <sharpd@nvidia.com>
+Date: Thu, 28 Mar 2024 12:25:05 -0400
+Subject: [PATCH 1/2] bgpd: Note when receiving but not understanding a route
+ notification
+
+When BGP has been asked to wait for FIB installation, on route
+removal a return call is likely to not have the dest since BGP
+will have cleaned up the node, entirely.  Let's just note that
+the prefix cannot be found if debugs are turned on and move on.
+
+Signed-off-by: Donald Sharp <sharpd@nvidia.com>
+---
+ bgpd/bgp_zebra.c | 6 +++++-
+ 1 file changed, 5 insertions(+), 1 deletion(-)
+
+diff --git a/bgpd/bgp_zebra.c b/bgpd/bgp_zebra.c
+index efcf497850..ff79746b4c 100644
+--- a/bgpd/bgp_zebra.c
++++ b/bgpd/bgp_zebra.c
+@@ -2610,8 +2610,12 @@ static int bgp_zebra_route_notify_owner(int command, struct zclient *zclient,
+ 	/* Find the bgp route node */
+ 	dest = bgp_afi_node_lookup(bgp->rib[afi][safi], afi, safi, &p,
+ 				   &bgp->vrf_prd);
+-	if (!dest)
++	if (!dest) {
++		if (BGP_DEBUG(zebra, ZEBRA))
++			zlog_debug("%s: %pFX does not exist in the BGP table, nothing to do for %u",
++				   __func__, &p, note);
+ 		return -1;
++	}
+ 
+ 	switch (note) {
+ 	case ZAPI_ROUTE_INSTALLED:
+-- 
+2.17.1
+
+
+From ada2e1099373e69e0eb29f4b1f3ba79c0cacf75a Mon Sep 17 00:00:00 2001
+From: Donald Sharp <sharpd@nvidia.com>
+Date: Thu, 28 Mar 2024 12:27:38 -0400
+Subject: [PATCH 2/2] bgpd: Arrange peer notification to after zebra announce
+
+Currently BGP attempts to send route change information
+to it's peers *before* the route is installed into zebra.
+This creates a bug in suppress-fib-pending in the following
+scenario:
+
+a) bgp suppress-fib-pending and bgp has a route with
+2 way ecmp.
+b) bgp receives a route withdraw from peer 1.  BGP
+will send the route to zebra and mark the route as
+FIB_INSTALL_PENDING.
+c) bgp receives a route withdraw from peer 2.  BGP
+will see the route has the FIB_INSTALL_PENDING and
+not send the withdrawal of the route to the peer.
+bgp will then send the route deletion to zebra and
+clean up the bgp_path_info's.
+
+At this point BGP is stuck where it has not sent
+a route withdrawal to downstream peers.
+
+Let's modify the code in bgp_process_main_one to
+send the route notification to zebra first before
+attempting to announce the route.  The route withdrawal
+will remove the FIB_INSTALL_PENDING flag from the dest
+and this will allow group_announce_route to believe
+it can send the route withdrawal.
+
+For the master branch this is ok because the recent
+backpressure commits are in place and nothing is going
+to change from an ordering perspective in that regards.
+Ostensibly this fix is also for operators of Sonic and
+will be backported to the 8.5 branch as well.  This will
+change the order of the send to peers to be after the
+zebra installation but sonic users are using suppress-fib-pending
+anyways so updates won't go out until rib ack has been
+received anyways.
+
+Signed-off-by: Donald Sharp <sharpd@nvidia.com>
+---
+ bgpd/bgp_route.c | 17 +++++++++--------
+ 1 file changed, 9 insertions(+), 8 deletions(-)
+
+diff --git a/bgpd/bgp_route.c b/bgpd/bgp_route.c
+index 2976042dda..fbff57634a 100644
+--- a/bgpd/bgp_route.c
++++ b/bgpd/bgp_route.c
+@@ -3297,14 +3297,6 @@ static void bgp_process_main_one(struct bgp *bgp, struct bgp_dest *dest,
+ 	}
+ #endif
+ 
+-	group_announce_route(bgp, afi, safi, dest, new_select);
+-
+-	/* unicast routes must also be annouced to labeled-unicast update-groups
+-	 */
+-	if (safi == SAFI_UNICAST)
+-		group_announce_route(bgp, afi, SAFI_LABELED_UNICAST, dest,
+-				     new_select);
+-
+ 	/* FIB update. */
+ 	if (bgp_fibupd_safi(safi) && (bgp->inst_type != BGP_INSTANCE_TYPE_VIEW)
+ 	    && !bgp_option_check(BGP_OPT_NO_FIB)) {
+@@ -3334,6 +3326,15 @@ static void bgp_process_main_one(struct bgp *bgp, struct bgp_dest *dest,
+ 		}
+ 	}
+ 
++	group_announce_route(bgp, afi, safi, dest, new_select);
++
++	/* unicast routes must also be annouced to labeled-unicast update-groups
++	 */
++	if (safi == SAFI_UNICAST)
++		group_announce_route(bgp, afi, SAFI_LABELED_UNICAST, dest,
++				     new_select);
++
++
+ 	bgp_process_evpn_route_injection(bgp, afi, safi, dest, new_select,
+ 					 old_select);
+ 
+-- 
+2.17.1
+
diff --git a/src/sonic-frr/patch/0026-zebra-Add-encap-type-when-building-packet-for-FPM.patch b/src/sonic-frr/patch/0026-zebra-Add-encap-type-when-building-packet-for-FPM.patch
deleted file mode 100644
index 8d7cdc34f..000000000
--- a/src/sonic-frr/patch/0026-zebra-Add-encap-type-when-building-packet-for-FPM.patch
+++ /dev/null
@@ -1,50 +0,0 @@
-From b914b0ad506649b5d341b549a37d3cb73e72b494 Mon Sep 17 00:00:00 2001
-From: Stepan Blyschak <stepanb@nvidia.com>
-Date: Mon, 30 Oct 2023 14:31:45 +0200
-Subject: [PATCH] zebra: Add encap type when building packet for FPM
-
-Signed-off-by: Donald Sharp <sharpd@nvidia.com>
-Signed-off-by: Stepan Blyschak <stepanb@nvidia.com>
----
- zebra/rt_netlink.c | 22 ++++++++++++----------
- 1 file changed, 12 insertions(+), 10 deletions(-)
-
-diff --git a/zebra/rt_netlink.c b/zebra/rt_netlink.c
-index 6b9b04785..71505e037 100644
---- a/zebra/rt_netlink.c
-+++ b/zebra/rt_netlink.c
-@@ -2269,19 +2269,21 @@ ssize_t netlink_route_multipath_msg_encode(int cmd,
- 					    p, routedesc, bytelen, nexthop,
- 					    &req->n, &req->r, datalen, cmd))
- 					return 0;
-+
-+				/*
-+				 * Add encapsulation information when
-+				 * installing via FPM.
-+				 */
-+				if (fpm) {
-+					if (!netlink_route_nexthop_encap(&req->n,
-+									 datalen,
-+									 nexthop))
-+						return 0;
-+				}
-+
- 				nexthop_num++;
- 				break;
- 			}
--
--			/*
--			 * Add encapsulation information when installing via
--			 * FPM.
--			 */
--			if (fpm) {
--				if (!netlink_route_nexthop_encap(
--					    &req->n, datalen, nexthop))
--					return 0;
--			}
- 		}
- 
- 		if (setsrc) {
--- 
-2.17.1
-
diff --git a/src/sonic-frr/patch/0027-lib-Do-not-convert-EVPN-prefixes-into-IPv4-IPv6-if-n.patch b/src/sonic-frr/patch/0027-lib-Do-not-convert-EVPN-prefixes-into-IPv4-IPv6-if-n.patch
new file mode 100644
index 000000000..fd9ec4608
--- /dev/null
+++ b/src/sonic-frr/patch/0027-lib-Do-not-convert-EVPN-prefixes-into-IPv4-IPv6-if-n.patch
@@ -0,0 +1,77 @@
+From 37204cdc64999f8215deb99d4a5aa1a4222389af Mon Sep 17 00:00:00 2001
+From: Donatas Abraitis <donatas@opensourcerouting.org>
+Date: Thu, 15 Feb 2024 12:07:43 +0200
+Subject: [PATCH] lib: Do not convert EVPN prefixes into IPv4/IPv6 if not
+ needed
+
+Convert only when this is really needed, e.g. `match ip address prefix-list ...`.
+
+Otherwise, we can't have mixed match clauses, like:
+
+```
+match ip address prefix-list p1
+match evpn route-type prefix
+```
+
+This won't work, because the prefix is already converted, and we can't extract
+route type, vni, etc. from the original EVPN prefix.
+
+Signed-off-by: Donatas Abraitis <donatas@opensourcerouting.org>
+(cherry picked from commit 439b739495e86912c8b9ec36b84e55311c549ba0)
+
+diff --git a/lib/routemap.c b/lib/routemap.c
+index 683943eb6d..ed7c4ed72c 100644
+--- a/lib/routemap.c
++++ b/lib/routemap.c
+@@ -2553,7 +2553,6 @@ route_map_result_t route_map_apply_ext(struct route_map *map,
+ 	struct route_map_index *index = NULL;
+ 	struct route_map_rule *set = NULL;
+ 	bool skip_match_clause = false;
+-	struct prefix conv;
+ 
+ 	if (recursion > RMAP_RECURSION_LIMIT) {
+ 		flog_warn(
+@@ -2571,27 +2570,14 @@ route_map_result_t route_map_apply_ext(struct route_map *map,
+ 
+ 	map->applied++;
+ 
+-	/*
+-	 * Handling for matching evpn_routes in the prefix table.
+-	 *
+-	 * We convert type2/5 prefix to ipv4/6 prefix to do longest
+-	 * prefix matching on.
+-	 */
+ 	if (prefix->family == AF_EVPN) {
+-		if (evpn_prefix2prefix(prefix, &conv) != 0) {
+-			zlog_debug(
+-				"Unable to convert EVPN prefix %pFX into IPv4/IPv6 prefix. Falling back to non-optimized route-map lookup",
+-				prefix);
+-		} else {
+-			zlog_debug(
+-				"Converted EVPN prefix %pFX into %pFX for optimized route-map lookup",
+-				prefix, &conv);
+-
+-			prefix = &conv;
+-		}
++		index = map->head;
++	} else {
++		skip_match_clause = true;
++		index = route_map_get_index(map, prefix, match_object,
++					    &match_ret);
+ 	}
+ 
+-	index = route_map_get_index(map, prefix, match_object, &match_ret);
+ 	if (index) {
+ 		index->applied++;
+ 		if (rmap_debug)
+@@ -2615,7 +2601,6 @@ route_map_result_t route_map_apply_ext(struct route_map *map,
+ 			ret = RMAP_DENYMATCH;
+ 		goto route_map_apply_end;
+ 	}
+-	skip_match_clause = true;
+ 
+ 	for (; index; index = index->next) {
+ 		if (!skip_match_clause) {
+-- 
+2.17.1
+
diff --git a/src/sonic-frr/patch/0028-bgpd-Check-mandatory-attributes-more-carefully-for-U.patch b/src/sonic-frr/patch/0028-bgpd-Check-mandatory-attributes-more-carefully-for-U.patch
deleted file mode 100644
index 7dbf3a85e..000000000
--- a/src/sonic-frr/patch/0028-bgpd-Check-mandatory-attributes-more-carefully-for-U.patch
+++ /dev/null
@@ -1,112 +0,0 @@
-From fcc818160be57a1304481402c08962454e1dee5b Mon Sep 17 00:00:00 2001
-From: Donatas Abraitis <donatas@opensourcerouting.org>
-Date: Mon, 23 Oct 2023 23:34:10 +0300
-Subject: [PATCH 1/4] bgpd: Check mandatory attributes more carefully for
- UPDATE message
-
-If we send a crafted BGP UPDATE message without mandatory attributes, we do
-not check if the length of the path attributes is zero or not. We only check
-if attr->flag is at least set or not. Imagine we send only unknown transit
-attribute, then attr->flag is always 0. Also, this is true only if graceful-restart
-capability is received.
-
-A crash:
-
-```
-bgpd[7834]: [TJ23Y-GY0RH] 127.0.0.1 Unknown attribute is received (type 31, length 16)
-bgpd[7834]: [PCFFM-WMARW] 127.0.0.1(donatas-pc) rcvd UPDATE wlen 0 attrlen 20 alen 17
-BGP[7834]: Received signal 11 at 1698089639 (si_addr 0x0, PC 0x55eefd375b4a); aborting...
-BGP[7834]: /usr/local/lib/libfrr.so.0(zlog_backtrace_sigsafe+0x6d) [0x7f3205ca939d]
-BGP[7834]: /usr/local/lib/libfrr.so.0(zlog_signal+0xf3) [0x7f3205ca9593]
-BGP[7834]: /usr/local/lib/libfrr.so.0(+0xf5181) [0x7f3205cdd181]
-BGP[7834]: /lib/x86_64-linux-gnu/libpthread.so.0(+0x12980) [0x7f3204ff3980]
-BGP[7834]: /usr/lib/frr/bgpd(+0x18ab4a) [0x55eefd375b4a]
-BGP[7834]: /usr/local/lib/libfrr.so.0(route_map_apply_ext+0x310) [0x7f3205cd1290]
-BGP[7834]: /usr/lib/frr/bgpd(+0x163610) [0x55eefd34e610]
-BGP[7834]: /usr/lib/frr/bgpd(bgp_update+0x9a5) [0x55eefd35c1d5]
-BGP[7834]: /usr/lib/frr/bgpd(bgp_nlri_parse_ip+0xb7) [0x55eefd35e867]
-BGP[7834]: /usr/lib/frr/bgpd(+0x1555e6) [0x55eefd3405e6]
-BGP[7834]: /usr/lib/frr/bgpd(bgp_process_packet+0x747) [0x55eefd345597]
-BGP[7834]: /usr/local/lib/libfrr.so.0(event_call+0x83) [0x7f3205cef4a3]
-BGP[7834]: /usr/local/lib/libfrr.so.0(frr_run+0xc0) [0x7f3205ca10a0]
-BGP[7834]: /usr/lib/frr/bgpd(main+0x409) [0x55eefd2dc979]
-```
-
-Sending:
-
-```
-import socket
-import time
-
-OPEN = (b"\xff\xff\xff\xff\xff\xff\xff\xff\xff\xff\xff\xff\xff\xff"
-b"\xff\xff\x00\x62\x01\x04\xfd\xea\x00\x5a\x0a\x00\x00\x01\x45\x02"
-b"\x06\x01\x04\x00\x01\x00\x01\x02\x02\x02\x00\x02\x02\x46\x00\x02"
-b"\x06\x41\x04\x00\x00\xfd\xea\x02\x02\x06\x00\x02\x06\x45\x04\x00"
-b"\x01\x01\x03\x02\x0e\x49\x0c\x0a\x64\x6f\x6e\x61\x74\x61\x73\x2d"
-b"\x70\x63\x00\x02\x04\x40\x02\x00\x78\x02\x09\x47\x07\x00\x01\x01"
-b"\x80\x00\x00\x00")
-
-KEEPALIVE = (b"\xff\xff\xff\xff\xff\xff\xff\xff\xff\xff"
-b"\xff\xff\xff\xff\xff\xff\x00\x13\x04")
-
-UPDATE = bytearray.fromhex("ffffffffffffffffffffffffffffffff003c0200000014ff1f001000040146464646460004464646464646664646f50d05800100010200ffff000000")
-
-s = socket.socket(socket.AF_INET, socket.SOCK_STREAM)
-s.connect(('127.0.0.2', 179))
-s.send(OPEN)
-data = s.recv(1024)
-s.send(KEEPALIVE)
-data = s.recv(1024)
-s.send(UPDATE)
-data = s.recv(1024)
-time.sleep(1000)
-s.close()
-```
-
-Reported-by: Iggy Frankovic <iggyfran@amazon.com>
-Signed-off-by: Donatas Abraitis <donatas@opensourcerouting.org>
-(cherry picked from commit d8482bf011cb2b173e85b65b4bf3d5061250cdb9)
-
-diff --git a/bgpd/bgp_attr.c b/bgpd/bgp_attr.c
-index ee20da3326..3a2d93ccd9 100644
---- a/bgpd/bgp_attr.c
-+++ b/bgpd/bgp_attr.c
-@@ -3429,13 +3429,15 @@ bgp_attr_unknown(struct bgp_attr_parser_args *args)
- }
- 
- /* Well-known attribute check. */
--static int bgp_attr_check(struct peer *peer, struct attr *attr)
-+static int bgp_attr_check(struct peer *peer, struct attr *attr,
-+			  bgp_size_t length)
- {
- 	uint8_t type = 0;
- 
- 	/* BGP Graceful-Restart End-of-RIB for IPv4 unicast is signaled as an
- 	 * empty UPDATE.  */
--	if (CHECK_FLAG(peer->cap, PEER_CAP_RESTART_RCV) && !attr->flag)
-+	if (CHECK_FLAG(peer->cap, PEER_CAP_RESTART_RCV) && !attr->flag &&
-+	    !length)
- 		return BGP_ATTR_PARSE_PROCEED;
- 
- 	/* "An UPDATE message that contains the MP_UNREACH_NLRI is not required
-@@ -3487,7 +3489,7 @@ enum bgp_attr_parse_ret bgp_attr_parse(struct peer *peer, struct attr *attr,
- 	enum bgp_attr_parse_ret ret;
- 	uint8_t flag = 0;
- 	uint8_t type = 0;
--	bgp_size_t length;
-+	bgp_size_t length = 0;
- 	uint8_t *startp, *endp;
- 	uint8_t *attr_endp;
- 	uint8_t seen[BGP_ATTR_BITMAP_SIZE];
-@@ -3812,7 +3814,7 @@ enum bgp_attr_parse_ret bgp_attr_parse(struct peer *peer, struct attr *attr,
- 	}
- 
- 	/* Check all mandatory well-known attributes are present */
--	ret = bgp_attr_check(peer, attr);
-+	ret = bgp_attr_check(peer, attr, length);
- 	if (ret < 0)
- 		goto done;
- 
--- 
-2.17.1
-
diff --git a/src/sonic-frr/patch/0029-bgpd-Handle-MP_REACH_NLRI-malformed-packets-with-ses.patch b/src/sonic-frr/patch/0029-bgpd-Handle-MP_REACH_NLRI-malformed-packets-with-ses.patch
deleted file mode 100644
index a1f848f12..000000000
--- a/src/sonic-frr/patch/0029-bgpd-Handle-MP_REACH_NLRI-malformed-packets-with-ses.patch
+++ /dev/null
@@ -1,118 +0,0 @@
-From 971f8684efceb2453accc5dcb5cbd8e4266c906d Mon Sep 17 00:00:00 2001
-From: Donatas Abraitis <donatas@opensourcerouting.org>
-Date: Fri, 20 Oct 2023 17:49:18 +0300
-Subject: [PATCH 2/4] bgpd: Handle MP_REACH_NLRI malformed packets with session
- reset
-
-Avoid crashing bgpd.
-
-```
-(gdb)
-bgp_mp_reach_parse (args=<optimized out>, mp_update=0x7fffffffe140) at bgpd/bgp_attr.c:2341
-2341			stream_get(&attr->mp_nexthop_global, s, IPV6_MAX_BYTELEN);
-(gdb)
-stream_get (dst=0x7fffffffe1ac, s=0x7ffff0006e80, size=16) at lib/stream.c:320
-320	{
-(gdb)
-321		STREAM_VERIFY_SANE(s);
-(gdb)
-323		if (STREAM_READABLE(s) < size) {
-(gdb)
-34	  return __builtin___memcpy_chk (__dest, __src, __len, __bos0 (__dest));
-(gdb)
-
-Thread 1 "bgpd" received signal SIGSEGV, Segmentation fault.
-0x00005555556e37be in route_set_aspath_prepend (rule=0x555555aac0d0, prefix=0x7fffffffe050,
-    object=0x7fffffffdb00) at bgpd/bgp_routemap.c:2282
-2282		if (path->attr->aspath->refcnt)
-(gdb)
-```
-
-With the configuration:
-
-```
- neighbor 127.0.0.1 remote-as external
- neighbor 127.0.0.1 passive
- neighbor 127.0.0.1 ebgp-multihop
- neighbor 127.0.0.1 disable-connected-check
- neighbor 127.0.0.1 update-source 127.0.0.2
- neighbor 127.0.0.1 timers 3 90
- neighbor 127.0.0.1 timers connect 1
- address-family ipv4 unicast
-  redistribute connected
-  neighbor 127.0.0.1 default-originate
-  neighbor 127.0.0.1 route-map RM_IN in
- exit-address-family
-!
-route-map RM_IN permit 10
- set as-path prepend 200
-exit
-```
-
-Reported-by: Iggy Frankovic <iggyfran@amazon.com>
-Signed-off-by: Donatas Abraitis <donatas@opensourcerouting.org>
-(cherry picked from commit b08afc81c60607a4f736f418f2e3eb06087f1a35)
-
-diff --git a/bgpd/bgp_attr.c b/bgpd/bgp_attr.c
-index 3a2d93ccd9..a3fee07058 100644
---- a/bgpd/bgp_attr.c
-+++ b/bgpd/bgp_attr.c
-@@ -2418,7 +2418,7 @@ int bgp_mp_reach_parse(struct bgp_attr_parser_args *args,
- 
- 		mp_update->afi = afi;
- 		mp_update->safi = safi;
--		return BGP_ATTR_PARSE_EOR;
-+		return bgp_attr_malformed(args, BGP_NOTIFY_UPDATE_MAL_ATTR, 0);
- 	}
- 
- 	mp_update->afi = afi;
-@@ -3739,10 +3739,6 @@ enum bgp_attr_parse_ret bgp_attr_parse(struct peer *peer, struct attr *attr,
- 			goto done;
- 		}
- 
--		if (ret == BGP_ATTR_PARSE_EOR) {
--			goto done;
--		}
--
- 		if (ret == BGP_ATTR_PARSE_ERROR) {
- 			flog_warn(EC_BGP_ATTRIBUTE_PARSE_ERROR,
- 				  "%s: Attribute %s, parse error", peer->host,
-diff --git a/bgpd/bgp_attr.h b/bgpd/bgp_attr.h
-index 33283f4bf6..ba8d4fc735 100644
---- a/bgpd/bgp_attr.h
-+++ b/bgpd/bgp_attr.h
-@@ -379,7 +379,6 @@ enum bgp_attr_parse_ret {
- 	/* only used internally, send notify + convert to BGP_ATTR_PARSE_ERROR
- 	 */
- 	BGP_ATTR_PARSE_ERROR_NOTIFYPLS = -3,
--	BGP_ATTR_PARSE_EOR = -4,
- };
- 
- struct bpacket_attr_vec_arr;
-diff --git a/bgpd/bgp_packet.c b/bgpd/bgp_packet.c
-index a02d548941..5e0312a72d 100644
---- a/bgpd/bgp_packet.c
-+++ b/bgpd/bgp_packet.c
-@@ -2060,8 +2060,7 @@ static int bgp_update_receive(struct peer *peer, bgp_size_t size)
- 	 * Non-MP IPv4/Unicast EoR is a completely empty UPDATE
- 	 * and MP EoR should have only an empty MP_UNREACH
- 	 */
--	if ((!update_len && !withdraw_len && nlris[NLRI_MP_UPDATE].length == 0)
--	    || (attr_parse_ret == BGP_ATTR_PARSE_EOR)) {
-+	if (!update_len && !withdraw_len && nlris[NLRI_MP_UPDATE].length == 0) {
- 		afi_t afi = 0;
- 		safi_t safi;
- 		struct graceful_restart_info *gr_info;
-@@ -2082,9 +2081,6 @@ static int bgp_update_receive(struct peer *peer, bgp_size_t size)
- 			   && nlris[NLRI_MP_WITHDRAW].length == 0) {
- 			afi = nlris[NLRI_MP_WITHDRAW].afi;
- 			safi = nlris[NLRI_MP_WITHDRAW].safi;
--		} else if (attr_parse_ret == BGP_ATTR_PARSE_EOR) {
--			afi = nlris[NLRI_MP_UPDATE].afi;
--			safi = nlris[NLRI_MP_UPDATE].safi;
- 		}
- 
- 		if (afi && peer->afc[afi][safi]) {
--- 
-2.17.1
-
diff --git a/src/sonic-frr/patch/0030-bgpd-Treat-EOR-as-withdrawn-to-avoid-unwanted-handli.patch b/src/sonic-frr/patch/0030-bgpd-Treat-EOR-as-withdrawn-to-avoid-unwanted-handli.patch
deleted file mode 100644
index 4639e8c87..000000000
--- a/src/sonic-frr/patch/0030-bgpd-Treat-EOR-as-withdrawn-to-avoid-unwanted-handli.patch
+++ /dev/null
@@ -1,106 +0,0 @@
-From 621f2efd64b305e96bb2941110e93bfbe5f9eda2 Mon Sep 17 00:00:00 2001
-From: Donatas Abraitis <donatas@opensourcerouting.org>
-Date: Fri, 27 Oct 2023 11:56:45 +0300
-Subject: [PATCH 3/4] bgpd: Treat EOR as withdrawn to avoid unwanted handling
- of malformed attrs
-
-Treat-as-withdraw, otherwise if we just ignore it, we will pass it to be
-processed as a normal UPDATE without mandatory attributes, that could lead
-to harmful behavior. In this case, a crash for route-maps with the configuration
-such as:
-
-```
-router bgp 65001
- no bgp ebgp-requires-policy
- neighbor 127.0.0.1 remote-as external
- neighbor 127.0.0.1 passive
- neighbor 127.0.0.1 ebgp-multihop
- neighbor 127.0.0.1 disable-connected-check
- neighbor 127.0.0.1 update-source 127.0.0.2
- neighbor 127.0.0.1 timers 3 90
- neighbor 127.0.0.1 timers connect 1
- !
- address-family ipv4 unicast
-  neighbor 127.0.0.1 addpath-tx-all-paths
-  neighbor 127.0.0.1 default-originate
-  neighbor 127.0.0.1 route-map RM_IN in
- exit-address-family
-exit
-!
-route-map RM_IN permit 10
- set as-path prepend 200
-exit
-```
-
-Send a malformed optional transitive attribute:
-
-```
-import socket
-import time
-
-OPEN = (b"\xff\xff\xff\xff\xff\xff\xff\xff\xff\xff\xff\xff\xff\xff"
-b"\xff\xff\x00\x62\x01\x04\xfd\xea\x00\x5a\x0a\x00\x00\x01\x45\x02"
-b"\x06\x01\x04\x00\x01\x00\x01\x02\x02\x02\x00\x02\x02\x46\x00\x02"
-b"\x06\x41\x04\x00\x00\xfd\xea\x02\x02\x06\x00\x02\x06\x45\x04\x00"
-b"\x01\x01\x03\x02\x0e\x49\x0c\x0a\x64\x6f\x6e\x61\x74\x61\x73\x2d"
-b"\x70\x63\x00\x02\x04\x40\x02\x00\x78\x02\x09\x47\x07\x00\x01\x01"
-b"\x80\x00\x00\x00")
-
-KEEPALIVE = (b"\xff\xff\xff\xff\xff\xff\xff\xff\xff\xff"
-b"\xff\xff\xff\xff\xff\xff\x00\x13\x04")
-
-UPDATE = bytearray.fromhex("ffffffffffffffffffffffffffffffff002b0200000003c0ff00010100eb00ac100b0b001ad908ac100b0b")
-
-s = socket.socket(socket.AF_INET, socket.SOCK_STREAM)
-s.connect(('127.0.0.2', 179))
-s.send(OPEN)
-data = s.recv(1024)
-s.send(KEEPALIVE)
-data = s.recv(1024)
-s.send(UPDATE)
-data = s.recv(1024)
-time.sleep(100)
-s.close()
-```
-
-Reported-by: Iggy Frankovic <iggyfran@amazon.com>
-Signed-off-by: Donatas Abraitis <donatas@opensourcerouting.org>
-
-diff --git a/bgpd/bgp_attr.c b/bgpd/bgp_attr.c
-index a3fee07058..bdf078e7c8 100644
---- a/bgpd/bgp_attr.c
-+++ b/bgpd/bgp_attr.c
-@@ -3435,10 +3435,13 @@ static int bgp_attr_check(struct peer *peer, struct attr *attr,
- 	uint8_t type = 0;
- 
- 	/* BGP Graceful-Restart End-of-RIB for IPv4 unicast is signaled as an
--	 * empty UPDATE.  */
-+	 * empty UPDATE. Treat-as-withdraw, otherwise if we just ignore it,
-+	 * we will pass it to be processed as a normal UPDATE without mandatory
-+	 * attributes, that could lead to harmful behavior.
-+	 */
- 	if (CHECK_FLAG(peer->cap, PEER_CAP_RESTART_RCV) && !attr->flag &&
- 	    !length)
--		return BGP_ATTR_PARSE_PROCEED;
-+		return BGP_ATTR_PARSE_WITHDRAW;
- 
- 	/* "An UPDATE message that contains the MP_UNREACH_NLRI is not required
- 	   to carry any other path attributes.", though if MP_REACH_NLRI or NLRI
-@@ -3866,7 +3869,13 @@ done:
- 	aspath_unintern(&as4_path);
- 
- 	transit = bgp_attr_get_transit(attr);
--	if (ret != BGP_ATTR_PARSE_ERROR) {
-+	/* If we received an UPDATE with mandatory attributes, then
-+	 * the unrecognized transitive optional attribute of that
-+	 * path MUST be passed. Otherwise, it's an error, and from
-+	 * security perspective it might be very harmful if we continue
-+	 * here with the unrecognized attributes.
-+	 */
-+	if (ret == BGP_ATTR_PARSE_PROCEED) {
- 		/* Finally intern unknown attribute. */
- 		if (transit)
- 			bgp_attr_set_transit(attr, transit_intern(transit));
--- 
-2.17.1
-
diff --git a/src/sonic-frr/patch/0031-bgpd-Ignore-handling-NLRIs-if-we-received-MP_UNREACH.patch b/src/sonic-frr/patch/0031-bgpd-Ignore-handling-NLRIs-if-we-received-MP_UNREACH.patch
deleted file mode 100644
index 12f1d9095..000000000
--- a/src/sonic-frr/patch/0031-bgpd-Ignore-handling-NLRIs-if-we-received-MP_UNREACH.patch
+++ /dev/null
@@ -1,88 +0,0 @@
-From 4f75184ed110ffb002b0125797e0395cfa6e9ce8 Mon Sep 17 00:00:00 2001
-From: Donatas Abraitis <donatas@opensourcerouting.org>
-Date: Sun, 29 Oct 2023 22:44:45 +0200
-Subject: [PATCH 4/4] bgpd: Ignore handling NLRIs if we received
- MP_UNREACH_NLRI
-
-If we receive MP_UNREACH_NLRI, we should stop handling remaining NLRIs if
-no mandatory path attributes received.
-
-In other words, if MP_UNREACH_NLRI received, the remaining NLRIs should be handled
-as a new data, but without mandatory attributes, it's a malformed packet.
-
-In normal case, this MUST not happen at all, but to avoid crashing bgpd, we MUST
-handle that.
-
-Reported-by: Iggy Frankovic <iggyfran@amazon.com>
-Signed-off-by: Donatas Abraitis <donatas@opensourcerouting.org>
-
-diff --git a/bgpd/bgp_attr.c b/bgpd/bgp_attr.c
-index bdf078e7c8..43a3cc91af 100644
---- a/bgpd/bgp_attr.c
-+++ b/bgpd/bgp_attr.c
-@@ -3443,15 +3443,6 @@ static int bgp_attr_check(struct peer *peer, struct attr *attr,
- 	    !length)
- 		return BGP_ATTR_PARSE_WITHDRAW;
- 
--	/* "An UPDATE message that contains the MP_UNREACH_NLRI is not required
--	   to carry any other path attributes.", though if MP_REACH_NLRI or NLRI
--	   are present, it should.  Check for any other attribute being present
--	   instead.
--	 */
--	if ((!CHECK_FLAG(attr->flag, ATTR_FLAG_BIT(BGP_ATTR_MP_REACH_NLRI)) &&
--	     CHECK_FLAG(attr->flag, ATTR_FLAG_BIT(BGP_ATTR_MP_UNREACH_NLRI))))
--		return BGP_ATTR_PARSE_PROCEED;
--
- 	if (!CHECK_FLAG(attr->flag, ATTR_FLAG_BIT(BGP_ATTR_ORIGIN)))
- 		type = BGP_ATTR_ORIGIN;
- 
-@@ -3470,6 +3461,16 @@ static int bgp_attr_check(struct peer *peer, struct attr *attr,
- 	    && !CHECK_FLAG(attr->flag, ATTR_FLAG_BIT(BGP_ATTR_LOCAL_PREF)))
- 		type = BGP_ATTR_LOCAL_PREF;
- 
-+	/* An UPDATE message that contains the MP_UNREACH_NLRI is not required
-+	 * to carry any other path attributes. Though if MP_REACH_NLRI or NLRI
-+	 * are present, it should. Check for any other attribute being present
-+	 * instead.
-+	 */
-+	if (!CHECK_FLAG(attr->flag, ATTR_FLAG_BIT(BGP_ATTR_MP_REACH_NLRI)) &&
-+	    CHECK_FLAG(attr->flag, ATTR_FLAG_BIT(BGP_ATTR_MP_UNREACH_NLRI)))
-+		return type ? BGP_ATTR_PARSE_MISSING_MANDATORY
-+			    : BGP_ATTR_PARSE_PROCEED;
-+
- 	/* If any of the well-known mandatory attributes are not present
- 	 * in an UPDATE message, then "treat-as-withdraw" MUST be used.
- 	 */
-diff --git a/bgpd/bgp_attr.h b/bgpd/bgp_attr.h
-index ba8d4fc735..275965fe62 100644
---- a/bgpd/bgp_attr.h
-+++ b/bgpd/bgp_attr.h
-@@ -379,6 +379,7 @@ enum bgp_attr_parse_ret {
- 	/* only used internally, send notify + convert to BGP_ATTR_PARSE_ERROR
- 	 */
- 	BGP_ATTR_PARSE_ERROR_NOTIFYPLS = -3,
-+	BGP_ATTR_PARSE_MISSING_MANDATORY = -4,
- };
- 
- struct bpacket_attr_vec_arr;
-diff --git a/bgpd/bgp_packet.c b/bgpd/bgp_packet.c
-index 5e0312a72d..59f895ac58 100644
---- a/bgpd/bgp_packet.c
-+++ b/bgpd/bgp_packet.c
-@@ -1983,7 +1983,12 @@ static int bgp_update_receive(struct peer *peer, bgp_size_t size)
- 	/* Network Layer Reachability Information. */
- 	update_len = end - stream_pnt(s);
- 
--	if (update_len && attribute_len) {
-+	/* If we received MP_UNREACH_NLRI attribute, but also NLRIs, then
-+	 * NLRIs should be handled as a new data. Though, if we received
-+	 * NLRIs without mandatory attributes, they should be ignored.
-+	 */
-+	if (update_len && attribute_len &&
-+	    attr_parse_ret != BGP_ATTR_PARSE_MISSING_MANDATORY) {
- 		/* Set NLRI portion to structure. */
- 		nlris[NLRI_UPDATE].afi = AFI_IP;
- 		nlris[NLRI_UPDATE].safi = SAFI_UNICAST;
--- 
-2.17.1
-
diff --git a/src/sonic-frr/patch/0032-zebra-Fix-fpm-multipath-encap-addition.patch b/src/sonic-frr/patch/0032-zebra-Fix-fpm-multipath-encap-addition.patch
deleted file mode 100644
index 5e3ce1441..000000000
--- a/src/sonic-frr/patch/0032-zebra-Fix-fpm-multipath-encap-addition.patch
+++ /dev/null
@@ -1,58 +0,0 @@
-From b7ac2397103fe7d347d0766bd9966ff2302403c5 Mon Sep 17 00:00:00 2001
-From: dgsudharsan <sudharsand@nvidia.com>
-Date: Tue, 21 Nov 2023 01:17:24 +0000
-Subject: [PATCH] zebra: Fix fpm multipath encap addition The fpm code path in
- building a ecmp route for evpn has a bug that caused it to not add the encap
- attribute to the netlink message.  See
- #f0f7b285b99dbd971400d33feea007232c0bd4a9 for the single path case being
- fixed.
-
-
-diff --git a/zebra/rt_netlink.c b/zebra/rt_netlink.c
-index 71505e037a..6bdc15592c 100644
---- a/zebra/rt_netlink.c
-+++ b/zebra/rt_netlink.c
-@@ -2330,6 +2330,16 @@ ssize_t netlink_route_multipath_msg_encode(int cmd,
- 					    tag))
- 					return 0;
- 
-+				/*
-+				 * Add encapsulation information when installing via
-+				 * FPM.
-+				 */
-+				if (fpm) {
-+					if (!netlink_route_nexthop_encap(
-+						    &req->n, datalen, nexthop))
-+						return 0;
-+				}
-+
- 				if (!setsrc && src1) {
- 					if (p->family == AF_INET)
- 						src.ipv4 = src1->ipv4;
-@@ -2343,23 +2353,6 @@ ssize_t netlink_route_multipath_msg_encode(int cmd,
- 
- 		nl_attr_nest_end(&req->n, nest);
- 
--		/*
--		 * Add encapsulation information when installing via
--		 * FPM.
--		 */
--		if (fpm) {
--			for (ALL_NEXTHOPS_PTR(dplane_ctx_get_ng(ctx),
--					      nexthop)) {
--				if (CHECK_FLAG(nexthop->flags,
--					       NEXTHOP_FLAG_RECURSIVE))
--					continue;
--				if (!netlink_route_nexthop_encap(
--					    &req->n, datalen, nexthop))
--					return 0;
--			}
--		}
--
--
- 		if (setsrc) {
- 			if (p->family == AF_INET) {
- 				if (!nl_attr_put(&req->n, datalen, RTA_PREFSRC,
--- 
-2.17.1
-
diff --git a/src/sonic-frr/patch/series b/src/sonic-frr/patch/series
index bcb290088..9874e27ae 100644
--- a/src/sonic-frr/patch/series
+++ b/src/sonic-frr/patch/series
@@ -4,8 +4,6 @@
 0004-frr-remove-frr-log-outchannel-to-var-log-frr.log.patch
 0005-Add-support-of-bgp-l3vni-evpn.patch
 0006-Link-local-scope-was-not-set-while-binding-socket-for-bgp-ipv6-link-local-neighbors.patch
-Disable-ipv6-src-address-test-in-pceplib.patch
-cross-compile-changes.patch
 0007-ignore-route-from-default-table.patch
 0008-Use-vrf_id-for-vrf-not-tabled_id.patch
 0009-bgpd-Ensure-suppress-fib-pending-works-with-network-.patch
@@ -18,18 +16,12 @@ cross-compile-changes.patch
 0016-zebra-Remove-duplicate-function-for-netlink-interfac.patch
 0017-zebra-Add-code-to-get-set-interface-to-pass-up-from-.patch
 0018-zebra-Use-zebra-dplane-for-RTM-link-and-addr.patch
-0019-zebra-Abstract-dplane_ctx_route_init-to-init-route-w.patch
-0020-zebra-Fix-crash-when-dplane_fpm_nl-fails-to-process-.patch
-0021-zebra-remove-duplicated-nexthops-when-sending-fpm-msg.patch
-0022-bgpd-Don-t-read-the-first-byte-of-ORF-header-if-we-a.patch
-0023-bgpd-Make-sure-we-have-enough-data-to-read-two-bytes.patch
-0024-bgpd-Do-not-process-NLRIs-if-the-attribute-length-is.patch
-0025-bgpd-Use-treat-as-withdraw-for-tunnel-encapsulation-.patch
-0026-zebra-Add-encap-type-when-building-packet-for-FPM.patch
-0027-zebra-Fix-non-notification-of-better-admin-won.patch
-0028-bgpd-Check-mandatory-attributes-more-carefully-for-U.patch
-0029-bgpd-Handle-MP_REACH_NLRI-malformed-packets-with-ses.patch
-0030-bgpd-Treat-EOR-as-withdrawn-to-avoid-unwanted-handli.patch
-0031-bgpd-Ignore-handling-NLRIs-if-we-received-MP_UNREACH.patch
-0032-zebra-Fix-fpm-multipath-encap-addition.patch
-0033-zebra-The-dplane_fpm_nl-return-path-leaks-memory.patch
+0019-zebra-remove-duplicated-nexthops-when-sending-fpm-msg.patch
+0020-zebra-Fix-non-notification-of-better-admin-won.patch
+0021-Disable-ipv6-src-address-test-in-pceplib.patch
+0022-cross-compile-changes.patch
+0023-zebra-The-dplane_fpm_nl-return-path-leaks-memory.patch
+0024-lib-use-snmp-s-large-fd-sets-for-agentx.patch
+0025-bgp-community-memory-leak-fix.patch
+0026-bgp-fib-suppress-announce-fix.patch
+0027-lib-Do-not-convert-EVPN-prefixes-into-IPv4-IPv6-if-n.patch

From 26e8b63bf189ddbfc583025d8683ea2d49e23e73 Mon Sep 17 00:00:00 2001
From: krismarvell <108510436+krismarvell@users.noreply.github.com>
Date: Tue, 30 Apr 2024 02:05:04 +0530
Subject: [PATCH 0499/1115] [devices]: Add Marvell platform support for
 dbmvt9180 (#18089)

This change adds new platform support for marvell dbmvt9180 board.
---
 .gitmodules                                   |   3 +
 .../dbmvtx9180_64x100G/buffers.json.j2        | 162 ++++
 .../buffers_defaults_def_lossy.j2             |  42 +
 .../dbmvtx9180_64x100G/buffers_defaults_t1.j2 | 162 ++++
 .../config_teralynx_MVTX9180_64x100G.yaml     | 773 ++++++++++++++++++
 .../dbmvtx9180_64x100G/ivm.sai.config.yaml    |   8 +
 .../ivm.sai.datapath.config.yaml              |  11 +
 .../dbmvtx9180_64x100G/pg_profile_lookup.ini  |  26 +
 .../dbmvtx9180_64x100G/port_config.ini        |  65 ++
 .../dbmvtx9180_64x100G/qos.json.j2            | 192 +++++
 .../qos_defaults_def_lossy.j2                 | 121 +++
 .../dbmvtx9180_64x100G/qos_defaults_t1.j2     | 192 +++++
 .../dbmvtx9180_64x100G/sai.profile            |   1 +
 .../dbmvtx9180_64x100G/teralynx.MVTX9180      | 170 ++++
 .../x86_64-marvell_dbmvtx9180-r0/default_sku  |   1 +
 .../installer.conf                            |   4 +
 .../platform_asic                             |   1 +
 .../plugins/eeprom.py                         |  26 +
 .../plugins/psuutil.py                        |  59 ++
 .../plugins/sfputil.py                        | 186 +++++
 .../pmon_daemon_control.json                  |   6 +
 .../x86_64-marvell_dbmvtx9180-r0/topo.conf    |   1 +
 platform/innovium/one-image.mk                |   1 +
 platform/innovium/platform-modules-marvell.mk |  13 +
 platform/innovium/rules.mk                    |   3 +-
 platform/innovium/sonic-platform-marvell      |   1 +
 26 files changed, 2228 insertions(+), 2 deletions(-)
 create mode 100644 device/marvell/x86_64-marvell_dbmvtx9180-r0/dbmvtx9180_64x100G/buffers.json.j2
 create mode 100644 device/marvell/x86_64-marvell_dbmvtx9180-r0/dbmvtx9180_64x100G/buffers_defaults_def_lossy.j2
 create mode 100644 device/marvell/x86_64-marvell_dbmvtx9180-r0/dbmvtx9180_64x100G/buffers_defaults_t1.j2
 create mode 100644 device/marvell/x86_64-marvell_dbmvtx9180-r0/dbmvtx9180_64x100G/config_teralynx_MVTX9180_64x100G.yaml
 create mode 100755 device/marvell/x86_64-marvell_dbmvtx9180-r0/dbmvtx9180_64x100G/ivm.sai.config.yaml
 create mode 100644 device/marvell/x86_64-marvell_dbmvtx9180-r0/dbmvtx9180_64x100G/ivm.sai.datapath.config.yaml
 create mode 100644 device/marvell/x86_64-marvell_dbmvtx9180-r0/dbmvtx9180_64x100G/pg_profile_lookup.ini
 create mode 100644 device/marvell/x86_64-marvell_dbmvtx9180-r0/dbmvtx9180_64x100G/port_config.ini
 create mode 100755 device/marvell/x86_64-marvell_dbmvtx9180-r0/dbmvtx9180_64x100G/qos.json.j2
 create mode 100755 device/marvell/x86_64-marvell_dbmvtx9180-r0/dbmvtx9180_64x100G/qos_defaults_def_lossy.j2
 create mode 100755 device/marvell/x86_64-marvell_dbmvtx9180-r0/dbmvtx9180_64x100G/qos_defaults_t1.j2
 create mode 100644 device/marvell/x86_64-marvell_dbmvtx9180-r0/dbmvtx9180_64x100G/sai.profile
 create mode 100644 device/marvell/x86_64-marvell_dbmvtx9180-r0/dbmvtx9180_64x100G/teralynx.MVTX9180
 create mode 100644 device/marvell/x86_64-marvell_dbmvtx9180-r0/default_sku
 create mode 100644 device/marvell/x86_64-marvell_dbmvtx9180-r0/installer.conf
 create mode 100644 device/marvell/x86_64-marvell_dbmvtx9180-r0/platform_asic
 create mode 100644 device/marvell/x86_64-marvell_dbmvtx9180-r0/plugins/eeprom.py
 create mode 100644 device/marvell/x86_64-marvell_dbmvtx9180-r0/plugins/psuutil.py
 create mode 100644 device/marvell/x86_64-marvell_dbmvtx9180-r0/plugins/sfputil.py
 create mode 100644 device/marvell/x86_64-marvell_dbmvtx9180-r0/pmon_daemon_control.json
 create mode 100644 device/marvell/x86_64-marvell_dbmvtx9180-r0/topo.conf
 create mode 100644 platform/innovium/platform-modules-marvell.mk
 create mode 160000 platform/innovium/sonic-platform-marvell

diff --git a/.gitmodules b/.gitmodules
index 71cfffa1b..9013bdb67 100644
--- a/.gitmodules
+++ b/.gitmodules
@@ -121,3 +121,6 @@
 [submodule "platform/marvell/sonic-platform-marvell"]
 	path = platform/marvell/sonic-platform-marvell
 	url = https://github.com/Marvell-switching/sonic-platform-arm64.git
+[submodule "platform/innovium/sonic-platform-marvell"]
+	path = platform/innovium/sonic-platform-marvell
+	url = https://github.com/Marvell-switching/sonic-platform-marvell
diff --git a/device/marvell/x86_64-marvell_dbmvtx9180-r0/dbmvtx9180_64x100G/buffers.json.j2 b/device/marvell/x86_64-marvell_dbmvtx9180-r0/dbmvtx9180_64x100G/buffers.json.j2
new file mode 100644
index 000000000..4a2d7a65c
--- /dev/null
+++ b/device/marvell/x86_64-marvell_dbmvtx9180-r0/dbmvtx9180_64x100G/buffers.json.j2
@@ -0,0 +1,162 @@
+{# Default values which will be used if no actual configuration available #}
+{% set default_cable = '40m' %}
+
+{# Port configuration to cable length look-up table #}
+{# Each record describes mapping of DUT (DUT port) role and neighbor role to cable length #}
+{# Roles described in the minigraph #}
+{% set ports2cable = {
+        'torrouter_server'       : '5m',
+        'leafrouter_torrouter'   : '40m',
+        'spinerouter_leafrouter' : '300m'
+        }
+%}
+
+{%- macro cable_length(port_name) %}
+    {%- set cable_len = [] %}
+    {%- for local_port in DEVICE_NEIGHBOR %}
+        {%- if local_port == port_name %}
+            {%- if DEVICE_NEIGHBOR_METADATA is defined and DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[local_port].name] %}
+                {%- set neighbor = DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[local_port].name] %}
+                {%- set neighbor_role = neighbor.type %}
+                {%- set roles1 = switch_role + '_' + neighbor_role %}
+                {%- set roles2 = neighbor_role + '_' + switch_role %}
+                {%- set roles1 = roles1 | lower %}
+                {%- set roles2 = roles2 | lower %}
+                {%- if roles1 in ports2cable %}
+                    {%- if cable_len.append(ports2cable[roles1]) %}{% endif %}
+                {%- elif roles2 in ports2cable %}
+                    {%- if cable_len.append(ports2cable[roles2]) %}{% endif %}
+                {%- endif %}
+            {%- endif %}
+        {%- endif %}
+    {%- endfor %}
+    {%- if cable_len -%}
+        {{ cable_len.0 }}
+    {%- else %}
+        {%- if switch_role.lower() == 'torrouter' %}
+            {%- for local_port in VLAN_MEMBER %}
+                {%- if local_port[1] == port_name %}
+                    {%- set roles3 = switch_role + '_' + 'server' %}
+                    {%- set roles3 = roles3 | lower %}
+                    {%- if roles3 in ports2cable %}
+                        {%- if cable_len.append(ports2cable[roles3]) %}{% endif %}
+                    {%- endif %}
+                {%- endif %}
+            {%- endfor %}
+            {%- if cable_len -%}
+                {{ cable_len.0 }}
+            {%- else -%}
+                {{ default_cable }}
+            {%- endif %}
+        {%- else -%}
+            {{ default_cable }}
+        {%- endif %}
+    {%- endif %}
+{%- endmacro %}
+
+{%- if DEVICE_METADATA is defined %}
+{%- set switch_role = DEVICE_METADATA['localhost']['type'] %}
+{%- endif -%}
+
+{% set port_names_list = [] %}
+{% for port in PORT %}
+    {%- if port_names_list.append(port) %}{% endif %}
+{% endfor %}
+{% set port_names = port_names_list | join(',') -%}
+
+{
+    "CABLE_LENGTH": {
+        "AZURE": {
+    {% for port in PORT %}
+        {% set cable = cable_length(port) -%}
+        "{{ port }}": "{{ cable }}"{%- if not loop.last -%},{% endif %}
+
+    {% endfor %}
+    }
+    },
+    "BUFFER_POOL": {
+        "ingress_lossless_pool": {
+            "size": "158630302",
+            "type": "ingress",
+            "mode": "dynamic",
+            "xoff": "71577600"
+        },
+        "lossy_pool": {
+            "size": "56012386",
+            "type": "egress",
+            "mode": "dynamic",
+            "xoff": "0"
+        },
+        "egress_lossless_pool": {
+            "size": "214642688",
+            "type": "egress",
+            "mode": "static"
+        }
+    },
+    "BUFFER_PROFILE": {
+        "ingress_lossless_profile": {
+            "pool":"ingress_lossless_pool",
+            "xoff":"135520",
+            "size":"1518",
+            "dynamic_th":"1",
+            "xon_offset":"9408"
+        },
+        "egress_lossless_profile": {
+            "pool":"ingress_lossless_pool",
+            "size":"0",
+            "static_th":"22798336"
+        },
+        "ingress_lossy_profile": {
+            "pool":"lossy_pool",
+            "size":"0",
+            "static_th":"22798336"
+        },
+        "egress_lossy_profile": {
+            "pool":"lossy_pool",
+            "size":"1518",
+            "dynamic_th":"2"
+        }
+    },
+    "BUFFER_PG": {
+{% for port in port_names_list %}
+                "{{ port }}|3-4": {
+                     "profile" : "ingress_lossless_profile"
+                },
+{% endfor %}
+{% for port in port_names_list %}
+                "{{ port }}|0": {
+                    "profile" : "ingress_lossy_profile"
+                },
+{% endfor %}
+{% for port in port_names_list %}
+                "{{ port }}|1-2": {
+                    "profile" : "ingress_lossy_profile"
+                },
+{% endfor %}
+{% for port in port_names_list %}
+                "{{ port }}|5-7": {
+                    "profile" : "ingress_lossy_profile"
+                }{% if not loop.last %},{% endif %}
+
+{% endfor %}
+    },
+
+    "BUFFER_QUEUE": {
+{% for port in port_names_list %}
+        "{{ port }}|3-4": {
+             "profile" : "egress_lossless_profile"
+        },
+{% endfor %}
+{% for port in port_names_list %}
+        "{{ port }}|0-2": {
+            "profile" : "egress_lossy_profile"
+        },
+{% endfor %}
+{% for port in port_names_list %}
+        "{{ port }}|5-7": {
+            "profile" : "egress_lossy_profile"
+        }{% if not loop.last %},{% endif %}
+
+{% endfor %}
+    }
+}
diff --git a/device/marvell/x86_64-marvell_dbmvtx9180-r0/dbmvtx9180_64x100G/buffers_defaults_def_lossy.j2 b/device/marvell/x86_64-marvell_dbmvtx9180-r0/dbmvtx9180_64x100G/buffers_defaults_def_lossy.j2
new file mode 100644
index 000000000..336cb86a9
--- /dev/null
+++ b/device/marvell/x86_64-marvell_dbmvtx9180-r0/dbmvtx9180_64x100G/buffers_defaults_def_lossy.j2
@@ -0,0 +1,42 @@
+{% set port_names_list = [] %}
+{% for port in PORT %}
+    {%- if port_names_list.append(port) %}{% endif %}
+{% endfor %}
+{% set port_names = port_names_list | join(',') -%}
+
+{
+    "BUFFER_POOL": {
+        "lossy_pool": {
+            "size": "182386688",
+            "type": "egress",
+            "mode": "dynamic",
+            "xoff": "0"
+        }
+    },
+    "BUFFER_PROFILE": {
+        "ingress_lossy_profile": {
+            "pool":"lossy_pool",
+            "size":"0",
+            "static_th":"22798336"
+        },
+        "egress_lossy_profile": {
+            "pool":"lossy_pool",
+            "size":"1518",
+            "dynamic_th":"2"
+        }
+    },
+    "BUFFER_PG": {
+{% for port in port_names_list %}
+        "{{ port }}|0-7": {
+            "profile" : "ingress_lossy_profile"
+        }{% if not loop.last %},{% endif %}
+{% endfor %}
+    },
+    "BUFFER_QUEUE": {
+{% for port in port_names_list %}
+        "{{ port }}|0-7": {
+            "profile" : "egress_lossy_profile"
+        }{% if not loop.last %},{% endif %}
+{% endfor %}
+    }
+}
diff --git a/device/marvell/x86_64-marvell_dbmvtx9180-r0/dbmvtx9180_64x100G/buffers_defaults_t1.j2 b/device/marvell/x86_64-marvell_dbmvtx9180-r0/dbmvtx9180_64x100G/buffers_defaults_t1.j2
new file mode 100644
index 000000000..34e182d40
--- /dev/null
+++ b/device/marvell/x86_64-marvell_dbmvtx9180-r0/dbmvtx9180_64x100G/buffers_defaults_t1.j2
@@ -0,0 +1,162 @@
+{# Default values which will be used if no actual configuration available  #} 
+{% set default_cable = '40m' %}
+
+{# Port configuration to cable length look-up table #}
+{# Each record describes mapping of DUT (DUT port) role and neighbor role to cable length #}
+{# Roles described in the minigraph #}
+{% set ports2cable = {
+        'torrouter_server'       : '5m',
+        'leafrouter_torrouter'   : '40m',
+        'spinerouter_leafrouter' : '300m'
+        }
+%}
+
+{%- macro cable_length(port_name) %}
+    {%- set cable_len = [] %}
+    {%- for local_port in DEVICE_NEIGHBOR %}
+        {%- if local_port == port_name %}
+            {%- if DEVICE_NEIGHBOR_METADATA is defined and DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[local_port].name] %}
+                {%- set neighbor = DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[local_port].name] %}
+                {%- set neighbor_role = neighbor.type %}
+                {%- set roles1 = switch_role + '_' + neighbor_role %}
+                {%- set roles2 = neighbor_role + '_' + switch_role %}
+                {%- set roles1 = roles1 | lower %}
+                {%- set roles2 = roles2 | lower %}
+                {%- if roles1 in ports2cable %}
+                    {%- if cable_len.append(ports2cable[roles1]) %}{% endif %}
+                {%- elif roles2 in ports2cable %}
+                    {%- if cable_len.append(ports2cable[roles2]) %}{% endif %}
+                {%- endif %}
+            {%- endif %}
+        {%- endif %}
+    {%- endfor %}
+    {%- if cable_len -%}
+        {{ cable_len.0 }}
+    {%- else %}
+        {%- if switch_role.lower() == 'torrouter' %}
+            {%- for local_port in VLAN_MEMBER %}
+                {%- if local_port[1] == port_name %}
+                    {%- set roles3 = switch_role + '_' + 'server' %}
+                    {%- set roles3 = roles3 | lower %}
+                    {%- if roles3 in ports2cable %}
+                        {%- if cable_len.append(ports2cable[roles3]) %}{% endif %}
+                    {%- endif %}
+                {%- endif %}
+            {%- endfor %}
+            {%- if cable_len -%}
+                {{ cable_len.0 }}
+            {%- else -%}
+                {{ default_cable }}
+            {%- endif %}
+        {%- else -%}
+            {{ default_cable }}
+        {%- endif %}
+    {%- endif %}
+{%- endmacro %}
+
+{%- if DEVICE_METADATA is defined %}
+{%- set switch_role = DEVICE_METADATA['localhost']['type'] %}
+{%- endif -%}
+
+{% set port_names_list = [] %}
+{% for port in PORT %}
+    {%- if port_names_list.append(port) %}{% endif %}
+{% endfor %}
+{% set port_names = port_names_list | join(',') -%}
+
+{
+    "CABLE_LENGTH": {
+        "AZURE": {
+    {% for port in PORT %}
+        {% set cable = cable_length(port) -%}
+        "{{ port }}": "{{ cable }}"{%- if not loop.last -%},{% endif %}
+
+    {% endfor %}
+    }
+    },
+    "BUFFER_POOL": {
+        "ingress_lossless_pool": {
+            "size": "158630302",
+            "type": "ingress",
+            "mode": "dynamic",
+            "xoff": "71577600"
+        },
+        "lossy_pool": {
+            "size": "56012386",
+            "type": "egress",
+            "mode": "dynamic",
+            "xoff": "0"
+        },
+        "egress_lossless_pool": {
+            "size": "214642688",
+            "type": "egress",
+            "mode": "static"
+        }
+    },
+    "BUFFER_PROFILE": {
+        "ingress_lossless_profile": {
+            "pool":"ingress_lossless_pool",
+            "xoff":"135520",
+            "size":"1518",
+            "dynamic_th":"1",
+            "xon_offset":"9408"
+        },
+        "egress_lossless_profile": {
+            "pool":"ingress_lossless_pool",
+            "size":"0",
+            "static_th":"22798336"
+        },
+        "ingress_lossy_profile": {
+            "pool":"lossy_pool",
+            "size":"0",
+            "static_th":"22798336"
+        },
+        "egress_lossy_profile": {
+            "pool":"lossy_pool",
+            "size":"1518",
+            "dynamic_th":"2"
+        }
+    },
+    "BUFFER_PG": {
+{% for port in port_names_list %}
+                "{{ port }}|3-4": {
+                     "profile" : "ingress_lossless_profile"
+                },
+{% endfor %}
+{% for port in port_names_list %}
+                "{{ port }}|0": {
+                    "profile" : "ingress_lossy_profile"
+                },
+{% endfor %}
+{% for port in port_names_list %}
+                "{{ port }}|1-2": {
+                    "profile" : "ingress_lossy_profile"
+                },
+{% endfor %}
+{% for port in port_names_list %}
+                "{{ port }}|5-7": {
+                    "profile" : "ingress_lossy_profile"
+                }{% if not loop.last %},{% endif %}
+
+{% endfor %}
+    },
+
+    "BUFFER_QUEUE": {
+{% for port in port_names_list %}
+        "{{ port }}|3-4": {
+             "profile" : "egress_lossless_profile"
+        },
+{% endfor %}
+{% for port in port_names_list %}
+        "{{ port }}|0-2": {
+            "profile" : "egress_lossy_profile"
+        },
+{% endfor %}
+{% for port in port_names_list %}
+        "{{ port }}|5-7": {
+            "profile" : "egress_lossy_profile"
+        }{% if not loop.last %},{% endif %}
+
+{% endfor %}
+    }
+}
diff --git a/device/marvell/x86_64-marvell_dbmvtx9180-r0/dbmvtx9180_64x100G/config_teralynx_MVTX9180_64x100G.yaml b/device/marvell/x86_64-marvell_dbmvtx9180-r0/dbmvtx9180_64x100G/config_teralynx_MVTX9180_64x100G.yaml
new file mode 100644
index 000000000..1abf66695
--- /dev/null
+++ b/device/marvell/x86_64-marvell_dbmvtx9180-r0/dbmvtx9180_64x100G/config_teralynx_MVTX9180_64x100G.yaml
@@ -0,0 +1,773 @@
+ifcs:
+  options:
+    log_level: "error"
+nodes:
+- node_id: "0"
+  options:
+    sku: "configs/sku/teralynx.MVTX9180"
+    netdev:
+    - auto_create: "no"
+      multi_interface: "yes"
+    buffer_management_mode: "api_driven"
+    pt01: "256"
+    wred_cr_ip_proto_list: "17"
+    cr_assignment_mode: "1"
+    max_lossless_tc: "2"
+    ilpm_enable: "1"
+    forward_profile: "IFCS_FORWARD_PROFILE_ID_PROFILE_E"
+    led_cfg_sck_rate: "0x5"
+    led_refresh_precliff_timer: "0x18eec2"
+    led_refresh_cliff_timer: "0x15e"
+    led_cfg_pic_stream_mode: "1"
+    led_refresh_tmr_ctl_enable: "1"
+    skip_pll_check: "false"
+    sys_clk: "1800"
+    ifc_clk: "1800"
+    mac_clk: "1600"
+    txring:
+    - txring_id: "0"
+      desc_count: "1024"
+      prio: "1"
+      netdev: "true"
+    - txring_id: "1"
+      desc_count: "1024"
+      prio: "1"
+      netdev: "true"
+    - txring_id: "2"
+      desc_count: "1024"
+      prio: "1"
+      netdev: "true"
+    - txring_id: "3"
+      desc_count: "1024"
+      prio: "1"
+      netdev: "true"
+    rxring:
+    - rxring_id: "0"
+      desc_count: "1024"
+      prio: "1"
+      netdev: "true"
+      queues: "0, 4, 8, 12, 16, 20, 24, 28, 32, 36, 40, 44"
+    - rxring_id: "1"
+      desc_count: "1024"
+      prio: "1"
+      netdev: "true"
+      queues: "1, 5, 9, 13, 17, 21, 25, 29, 33, 37, 41, 45"
+    - rxring_id: "2"
+      desc_count: "1024"
+      prio: "1"
+      netdev: "true"
+      queues: "2, 6, 10, 14, 18, 22, 26, 30, 34, 38, 42, 46"
+    - rxring_id: "3"
+      desc_count: "1024"
+      prio: "1"
+      netdev: "true"
+      queues: "3, 7, 11, 15, 19, 23, 27, 31, 35, 39, 43, 47"
+  devports:
+  - id: "0"
+    sysport: "1000"
+    type: "cpu"
+  - fec: "KPFEC"
+    id: "489"
+    lanes: "0:4"
+    serdes_group: "61"
+    speed: "100G"
+    sysport: "489"
+    type: "eth"
+  - fec: "KPFEC"
+    id: "505"
+    lanes: "0:4"
+    serdes_group: "63"
+    speed: "100G"
+    sysport: "505"
+    type: "eth"
+  - fec: "KPFEC"
+    id: "441"
+    lanes: "0:4"
+    serdes_group: "55"
+    speed: "100G"
+    sysport: "441"
+    type: "eth"
+  - fec: "KPFEC"
+    id: "425"
+    lanes: "0:4"
+    serdes_group: "53"
+    speed: "100G"
+    sysport: "425"
+    type: "eth"
+  - fec: "KPFEC"
+    id: "41"
+    lanes: "0:4"
+    serdes_group: "5"
+    speed: "100G"
+    sysport: "41"
+    type: "eth"
+  - fec: "KPFEC"
+    id: "49"
+    lanes: "0:4"
+    serdes_group: "6"
+    speed: "100G"
+    sysport: "49"
+    type: "eth"
+  - fec: "KPFEC"
+    id: "153"
+    lanes: "0:4"
+    serdes_group: "19"
+    speed: "100G"
+    sysport: "153"
+    type: "eth"
+  - fec: "KPFEC"
+    id: "137"
+    lanes: "0:4"
+    serdes_group: "17"
+    speed: "100G"
+    sysport: "137"
+    type: "eth"
+  - fec: "KPFEC"
+    id: "1"
+    lanes: "0:4"
+    serdes_group: "0"
+    speed: "100G"
+    sysport: "1"
+    type: "eth"
+  - fec: "KPFEC"
+    id: "17"
+    lanes: "0:4"
+    serdes_group: "2"
+    speed: "100G"
+    sysport: "17"
+    type: "eth"
+  - fec: "KPFEC"
+    id: "81"
+    lanes: "0:4"
+    serdes_group: "10"
+    speed: "100G"
+    sysport: "81"
+    type: "eth"
+  - fec: "KPFEC"
+    id: "65"
+    lanes: "0:4"
+    serdes_group: "8"
+    speed: "100G"
+    sysport: "65"
+    type: "eth"
+  - fec: "KPFEC"
+    id: "97"
+    lanes: "0:4"
+    serdes_group: "12"
+    speed: "100G"
+    sysport: "97"
+    type: "eth"
+  - fec: "KPFEC"
+    id: "113"
+    lanes: "0:4"
+    serdes_group: "14"
+    speed: "100G"
+    sysport: "113"
+    type: "eth"
+  - fec: "KPFEC"
+    id: "193"
+    lanes: "0:4"
+    serdes_group: "24"
+    speed: "100G"
+    sysport: "193"
+    type: "eth"
+  - fec: "KPFEC"
+    id: "177"
+    lanes: "0:4"
+    serdes_group: "22"
+    speed: "100G"
+    sysport: "177"
+    type: "eth"
+  - fec: "KPFEC"
+    id: "33"
+    lanes: "0:4"
+    serdes_group: "4"
+    speed: "100G"
+    sysport: "33"
+    type: "eth"
+  - fec: "KPFEC"
+    id: "57"
+    lanes: "0:4"
+    serdes_group: "7"
+    speed: "100G"
+    sysport: "57"
+    type: "eth"
+  - fec: "KPFEC"
+    id: "161"
+    lanes: "0:4"
+    serdes_group: "20"
+    speed: "100G"
+    sysport: "161"
+    type: "eth"
+  - fec: "KPFEC"
+    id: "129"
+    lanes: "0:4"
+    serdes_group: "16"
+    speed: "100G"
+    sysport: "129"
+    type: "eth"
+  - fec: "KPFEC"
+    id: "217"
+    lanes: "0:4"
+    serdes_group: "27"
+    speed: "100G"
+    sysport: "217"
+    type: "eth"
+  - fec: "KPFEC"
+    id: "241"
+    lanes: "0:4"
+    serdes_group: "30"
+    speed: "100G"
+    sysport: "241"
+    type: "eth"
+  - fec: "KPFEC"
+    id: "233"
+    lanes: "0:4"
+    serdes_group: "29"
+    speed: "100G"
+    sysport: "233"
+    type: "eth"
+  - fec: "KPFEC"
+    id: "209"
+    lanes: "0:4"
+    serdes_group: "26"
+    speed: "100G"
+    sysport: "209"
+    type: "eth"
+  - fec: "KPFEC"
+    id: "105"
+    lanes: "0:4"
+    serdes_group: "13"
+    speed: "100G"
+    sysport: "105"
+    type: "eth"
+  - fec: "KPFEC"
+    id: "121"
+    lanes: "0:4"
+    serdes_group: "15"
+    speed: "100G"
+    sysport: "121"
+    type: "eth"
+  - fec: "KPFEC"
+    id: "169"
+    lanes: "0:4"
+    serdes_group: "21"
+    speed: "100G"
+    sysport: "169"
+    type: "eth"
+  - fec: "KPFEC"
+    id: "145"
+    lanes: "0:4"
+    serdes_group: "18"
+    speed: "100G"
+    sysport: "145"
+    type: "eth"
+  - fec: "KPFEC"
+    id: "265"
+    lanes: "0:4"
+    serdes_group: "33"
+    speed: "100G"
+    sysport: "265"
+    type: "eth"
+  - fec: "KPFEC"
+    id: "289"
+    lanes: "0:4"
+    serdes_group: "36"
+    speed: "100G"
+    sysport: "289"
+    type: "eth"
+  - fec: "KPFEC"
+    id: "297"
+    lanes: "0:4"
+    serdes_group: "37"
+    speed: "100G"
+    sysport: "297"
+    type: "eth"
+  - fec: "KPFEC"
+    id: "273"
+    lanes: "0:4"
+    serdes_group: "34"
+    speed: "100G"
+    sysport: "273"
+    type: "eth"
+  - fec: "KPFEC"
+    id: "225"
+    lanes: "0:4"
+    serdes_group: "28"
+    speed: "100G"
+    sysport: "225"
+    type: "eth"
+  - fec: "KPFEC"
+    id: "249"
+    lanes: "0:4"
+    serdes_group: "31"
+    speed: "100G"
+    sysport: "249"
+    type: "eth"
+  - fec: "KPFEC"
+    id: "201"
+    lanes: "0:4"
+    serdes_group: "25"
+    speed: "100G"
+    sysport: "201"
+    type: "eth"
+  - fec: "KPFEC"
+    id: "185"
+    lanes: "0:4"
+    serdes_group: "23"
+    speed: "100G"
+    sysport: "185"
+    type: "eth"
+  - fec: "KPFEC"
+    id: "393"
+    lanes: "0:4"
+    serdes_group: "49"
+    speed: "100G"
+    sysport: "393"
+    type: "eth"
+  - fec: "KPFEC"
+    id: "409"
+    lanes: "0:4"
+    serdes_group: "51"
+    speed: "100G"
+    sysport: "409"
+    type: "eth"
+  - fec: "KPFEC"
+    id: "329"
+    lanes: "0:4"
+    serdes_group: "41"
+    speed: "100G"
+    sysport: "329"
+    type: "eth"
+  - fec: "KPFEC"
+    id: "313"
+    lanes: "0:4"
+    serdes_group: "39"
+    speed: "100G"
+    sysport: "313"
+    type: "eth"
+  - fec: "KPFEC"
+    id: "257"
+    lanes: "0:4"
+    serdes_group: "32"
+    speed: "100G"
+    sysport: "257"
+    type: "eth"
+  - fec: "KPFEC"
+    id: "281"
+    lanes: "0:4"
+    serdes_group: "35"
+    speed: "100G"
+    sysport: "281"
+    type: "eth"
+  - fec: "KPFEC"
+    id: "321"
+    lanes: "0:4"
+    serdes_group: "40"
+    speed: "100G"
+    sysport: "321"
+    type: "eth"
+  - fec: "KPFEC"
+    id: "305"
+    lanes: "0:4"
+    serdes_group: "38"
+    speed: "100G"
+    sysport: "305"
+    type: "eth"
+  - fec: "KPFEC"
+    id: "457"
+    lanes: "0:4"
+    serdes_group: "57"
+    speed: "100G"
+    sysport: "457"
+    type: "eth"
+  - fec: "KPFEC"
+    id: "465"
+    lanes: "0:4"
+    serdes_group: "58"
+    speed: "100G"
+    sysport: "465"
+    type: "eth"
+  - fec: "KPFEC"
+    id: "369"
+    lanes: "0:4"
+    serdes_group: "46"
+    speed: "100G"
+    sysport: "369"
+    type: "eth"
+  - fec: "KPFEC"
+    id: "353"
+    lanes: "0:4"
+    serdes_group: "44"
+    speed: "100G"
+    sysport: "353"
+    type: "eth"
+  - fec: "KPFEC"
+    id: "385"
+    lanes: "0:4"
+    serdes_group: "48"
+    speed: "100G"
+    sysport: "385"
+    type: "eth"
+  - fec: "KPFEC"
+    id: "401"
+    lanes: "0:4"
+    serdes_group: "50"
+    speed: "100G"
+    sysport: "401"
+    type: "eth"
+  - fec: "KPFEC"
+    id: "361"
+    lanes: "0:4"
+    serdes_group: "45"
+    speed: "100G"
+    sysport: "361"
+    type: "eth"
+  - fec: "KPFEC"
+    id: "337"
+    lanes: "0:4"
+    serdes_group: "42"
+    speed: "100G"
+    sysport: "337"
+    type: "eth"
+  - fec: "KPFEC"
+    id: "481"
+    lanes: "0:4"
+    serdes_group: "60"
+    speed: "100G"
+    sysport: "481"
+    type: "eth"
+  - fec: "KPFEC"
+    id: "497"
+    lanes: "0:4"
+    serdes_group: "62"
+    speed: "100G"
+    sysport: "497"
+    type: "eth"
+  - fec: "KPFEC"
+    id: "433"
+    lanes: "0:4"
+    serdes_group: "54"
+    speed: "100G"
+    sysport: "433"
+    type: "eth"
+  - fec: "KPFEC"
+    id: "417"
+    lanes: "0:4"
+    serdes_group: "52"
+    speed: "100G"
+    sysport: "417"
+    type: "eth"
+  - fec: "KPFEC"
+    id: "449"
+    lanes: "0:4"
+    serdes_group: "56"
+    speed: "100G"
+    sysport: "449"
+    type: "eth"
+  - fec: "KPFEC"
+    id: "473"
+    lanes: "0:4"
+    serdes_group: "59"
+    speed: "100G"
+    sysport: "473"
+    type: "eth"
+  - fec: "KPFEC"
+    id: "377"
+    lanes: "0:4"
+    serdes_group: "47"
+    speed: "100G"
+    sysport: "377"
+    type: "eth"
+  - fec: "KPFEC"
+    id: "345"
+    lanes: "0:4"
+    serdes_group: "43"
+    speed: "100G"
+    sysport: "345"
+    type: "eth"
+  - fec: "KPFEC"
+    id: "9"
+    lanes: "0:4"
+    serdes_group: "1"
+    speed: "100G"
+    sysport: "9"
+    type: "eth"
+  - fec: "KPFEC"
+    id: "25"
+    lanes: "0:4"
+    serdes_group: "3"
+    speed: "100G"
+    sysport: "25"
+    type: "eth"
+  - fec: "KPFEC"
+    id: "89"
+    lanes: "0:4"
+    serdes_group: "11"
+    speed: "100G"
+    sysport: "89"
+    type: "eth"
+  - fec: "KPFEC"
+    id: "73"
+    lanes: "0:4"
+    serdes_group: "9"
+    speed: "100G"
+    sysport: "73"
+    type: "eth"
+  isg:
+  - id: "0"
+    lane_swap: "74563102"
+    rx_polarity: "11000001"
+    tx_polarity: "00011100"
+  - id: "1"
+    lane_swap: "74563102"
+    rx_polarity: "01110111"
+    tx_polarity: "01111100"
+  - id: "2"
+    lane_swap: "20136547"
+    rx_polarity: "10001110"
+    tx_polarity: "01110011"
+  - id: "3"
+    lane_swap: "20136547"
+    rx_polarity: "10001100"
+    tx_polarity: "00101011"
+  - id: "4"
+    lane_swap: "74563102"
+    rx_polarity: "11000001"
+    tx_polarity: "00011100"
+  - id: "5"
+    lane_swap: "47563102"
+    rx_polarity: "00010111"
+    tx_polarity: "00111101"
+  - id: "6"
+    lane_swap: "02134567"
+    rx_polarity: "00101110"
+    tx_polarity: "01000000"
+  - id: "7"
+    lane_swap: "02134567"
+    rx_polarity: "00101110"
+    tx_polarity: "10010010"
+  - id: "8"
+    lane_swap: "67451302"
+    rx_polarity: "10100010"
+    tx_polarity: "10011110"
+  - id: "9"
+    lane_swap: "67453102"
+    rx_polarity: "10100010"
+    tx_polarity: "10111010"
+  - id: "10"
+    lane_swap: "20315476"
+    rx_polarity: "01101101"
+    tx_polarity: "10010001"
+  - id: "11"
+    lane_swap: "20315476"
+    rx_polarity: "10111111"
+    tx_polarity: "11010001"
+  - id: "12"
+    lane_swap: "76543120"
+    rx_polarity: "10100101"
+    tx_polarity: "11101000"
+  - id: "13"
+    lane_swap: "76543120"
+    rx_polarity: "10011110"
+    tx_polarity: "10100010"
+  - id: "14"
+    lane_swap: "02134567"
+    rx_polarity: "10011110"
+    tx_polarity: "11110101"
+  - id: "15"
+    lane_swap: "02134567"
+    rx_polarity: "11010001"
+    tx_polarity: "01101101"
+  - id: "16"
+    lane_swap: "67451302"
+    rx_polarity: "00101010"
+    tx_polarity: "01100011"
+  - id: "17"
+    lane_swap: "54760132"
+    rx_polarity: "01010100"
+    tx_polarity: "10010101"
+  - id: "18"
+    lane_swap: "54761032"
+    rx_polarity: "10101011"
+    tx_polarity: "01011000"
+  - id: "19"
+    lane_swap: "23016745"
+    rx_polarity: "00100000"
+    tx_polarity: "11111000"
+  - id: "20"
+    lane_swap: "20315476"
+    rx_polarity: "10000101"
+    tx_polarity: "11011111"
+  - id: "21"
+    lane_swap: "23016745"
+    rx_polarity: "11110100"
+    tx_polarity: "00010111"
+  - id: "22"
+    lane_swap: "54760132"
+    rx_polarity: "10001011"
+    tx_polarity: "11010101"
+  - id: "23"
+    lane_swap: "54761032"
+    rx_polarity: "11110100"
+    tx_polarity: "01011000"
+  - id: "24"
+    lane_swap: "23016745"
+    rx_polarity: "01110000"
+    tx_polarity: "10111000"
+  - id: "25"
+    lane_swap: "23016745"
+    rx_polarity: "10111011"
+    tx_polarity: "00000111"
+  - id: "26"
+    lane_swap: "02134567"
+    rx_polarity: "00010101"
+    tx_polarity: "11001001"
+  - id: "27"
+    lane_swap: "20314576"
+    rx_polarity: "11010110"
+    tx_polarity: "10110001"
+  - id: "28"
+    lane_swap: "20314576"
+    rx_polarity: "11110011"
+    tx_polarity: "10110001"
+  - id: "29"
+    lane_swap: "76453120"
+    rx_polarity: "01101101"
+    tx_polarity: "01001000"
+  - id: "30"
+    lane_swap: "67541302"
+    rx_polarity: "00110111"
+    tx_polarity: "11110101"
+  - id: "31"
+    lane_swap: "67541302"
+    rx_polarity: "01100111"
+    tx_polarity: "01000111"
+  - id: "32"
+    lane_swap: "67543120"
+    rx_polarity: "00011110"
+    tx_polarity: "11111000"
+  - id: "33"
+    lane_swap: "67543120"
+    rx_polarity: "10011010"
+    tx_polarity: "10011000"
+  - id: "34"
+    lane_swap: "67453102"
+    rx_polarity: "11011001"
+    tx_polarity: "10100001"
+  - id: "35"
+    lane_swap: "02134576"
+    rx_polarity: "01010101"
+    tx_polarity: "00110111"
+  - id: "36"
+    lane_swap: "02134576"
+    rx_polarity: "10100001"
+    tx_polarity: "11100110"
+  - id: "37"
+    lane_swap: "20315476"
+    rx_polarity: "11000100"
+    tx_polarity: "10001010"
+  - id: "38"
+    lane_swap: "23016745"
+    rx_polarity: "01100101"
+    tx_polarity: "11101111"
+  - id: "39"
+    lane_swap: "23017645"
+    rx_polarity: "10000101"
+    tx_polarity: "11111110"
+  - id: "40"
+    lane_swap: "54761032"
+    rx_polarity: "11011111"
+    tx_polarity: "00001101"
+  - id: "41"
+    lane_swap: "54761032"
+    rx_polarity: "00100100"
+    tx_polarity: "01001000"
+  - id: "42"
+    lane_swap: "23016745"
+    rx_polarity: "11010101"
+    tx_polarity: "01000000"
+  - id: "43"
+    lane_swap: "20315476"
+    rx_polarity: "10101101"
+    tx_polarity: "00010001"
+  - id: "44"
+    lane_swap: "23017645"
+    rx_polarity: "11010101"
+    tx_polarity: "11101011"
+  - id: "45"
+    lane_swap: "54761032"
+    rx_polarity: "00101111"
+    tx_polarity: "10110010"
+  - id: "46"
+    lane_swap: "54761032"
+    rx_polarity: "11111011"
+    tx_polarity: "01011101"
+  - id: "47"
+    lane_swap: "67451302"
+    rx_polarity: "00111000"
+    tx_polarity: "00010110"
+  - id: "48"
+    lane_swap: "02134567"
+    rx_polarity: "00011111"
+    tx_polarity: "01000101"
+  - id: "49"
+    lane_swap: "02134567"
+    rx_polarity: "00011110"
+    tx_polarity: "00001111"
+  - id: "50"
+    lane_swap: "76543120"
+    rx_polarity: "11101011"
+    tx_polarity: "10110000"
+  - id: "51"
+    lane_swap: "76543120"
+    rx_polarity: "10100100"
+    tx_polarity: "11010111"
+  - id: "52"
+    lane_swap: "20314576"
+    rx_polarity: "01000101"
+    tx_polarity: "01011101"
+  - id: "53"
+    lane_swap: "20315476"
+    rx_polarity: "01000101"
+    tx_polarity: "01011111"
+  - id: "54"
+    lane_swap: "67451302"
+    rx_polarity: "10011101"
+    tx_polarity: "11101011"
+  - id: "55"
+    lane_swap: "67451302"
+    rx_polarity: "10110000"
+    tx_polarity: "11101011"
+  - id: "56"
+    lane_swap: "02134567"
+    rx_polarity: "11100000"
+    tx_polarity: "10111010"
+  - id: "57"
+    lane_swap: "02134567"
+    rx_polarity: "10101110"
+    tx_polarity: "10111010"
+  - id: "58"
+    lane_swap: "47651320"
+    rx_polarity: "00110110"
+    tx_polarity: "10101000"
+  - id: "59"
+    lane_swap: "47651320"
+    rx_polarity: "00110110"
+    tx_polarity: "10101100"
+  - id: "60"
+    lane_swap: "02315674"
+    rx_polarity: "11010101"
+    tx_polarity: "01111110"
+  - id: "61"
+    lane_swap: "02315674"
+    rx_polarity: "11000100"
+    tx_polarity: "01011110"
+  - id: "62"
+    lane_swap: "47651320"
+    rx_polarity: "10010000"
+    tx_polarity: "11101110"
+  - id: "63"
+    lane_swap: "47651320"
+    rx_polarity: "10010110"
+    tx_polarity: "10100100"
diff --git a/device/marvell/x86_64-marvell_dbmvtx9180-r0/dbmvtx9180_64x100G/ivm.sai.config.yaml b/device/marvell/x86_64-marvell_dbmvtx9180-r0/dbmvtx9180_64x100G/ivm.sai.config.yaml
new file mode 100755
index 000000000..36ab56f18
--- /dev/null
+++ b/device/marvell/x86_64-marvell_dbmvtx9180-r0/dbmvtx9180_64x100G/ivm.sai.config.yaml
@@ -0,0 +1,8 @@
+IFCS_INIT_FILE : "/usr/share/sonic/hwsku/config_teralynx_MVTX9180_64x100G.yaml"
+IFCS_SKU_FILE : "/usr/share/sonic/hwsku/teralynx.MVTX9180"
+IFCS_INNO_CLI_PORT : "9999"
+IFCS_TARGET : "device"
+INNOVIUM_DIR : "/innovium"
+PYTHONPATH : "$INNOVIUM_DIR:$INNOVIUM_DIR/cmds:$INNOVIUM_DIR/scripts:$INNOVIUM_DIR/test/:$INNOVIUM_DIR/test/utils:$INNOVIUM_DIR/utils:$INNOVIUM_DIR/pyctypes:$INNOVIUM_DIR/ifcs_cmds:$INNOVIUM_DIR/testutil"
+IVM_SAI_DATAPATH_CONFIG_FILE: "/usr/share/sonic/hwsku/ivm.sai.datapath.config.yaml"
+IVM_SAI_PARAM_A0008: "32"
diff --git a/device/marvell/x86_64-marvell_dbmvtx9180-r0/dbmvtx9180_64x100G/ivm.sai.datapath.config.yaml b/device/marvell/x86_64-marvell_dbmvtx9180-r0/dbmvtx9180_64x100G/ivm.sai.datapath.config.yaml
new file mode 100644
index 000000000..05ea6396c
--- /dev/null
+++ b/device/marvell/x86_64-marvell_dbmvtx9180-r0/dbmvtx9180_64x100G/ivm.sai.datapath.config.yaml
@@ -0,0 +1,11 @@
+#Queue Type
+ISAI_PARAM_A000 : "0"
+ISAI_PARAM_P0_0_LS : "2304 2304 2304 2304 2304 2304 2304 2304"
+ISAI_PARAM_P0_1_LS : "1728 1608 1608 1584 1584 1584 1584 1584"
+ISAI_PARAM_P0_1_ALS : "192 72 72 48 48 48 48 48"
+ISAI_PARAM_P1_0_LS : "768 768 768 768 768 768 768 768"
+ISAI_PARAM_P1_0_LL : "1536 1536 1536 1536 1536 1536 1536 1536"
+ISAI_PARAM_P1_1_LS : "1344 1224 1224 1200 1200 1200 1200 1200"
+ISAI_PARAM_P1_1_LL : "3138 3138 3138 3138 3138 3138 3138 3138"
+ISAI_PARAM_P1_1_ALS : "192 72 72 48 48 48 48 48"
+ISAI_PARAM_P1_1_ALL : "86 86 86 86 86 86 86 86"
diff --git a/device/marvell/x86_64-marvell_dbmvtx9180-r0/dbmvtx9180_64x100G/pg_profile_lookup.ini b/device/marvell/x86_64-marvell_dbmvtx9180-r0/dbmvtx9180_64x100G/pg_profile_lookup.ini
new file mode 100644
index 000000000..c09264d70
--- /dev/null
+++ b/device/marvell/x86_64-marvell_dbmvtx9180-r0/dbmvtx9180_64x100G/pg_profile_lookup.ini
@@ -0,0 +1,26 @@
+# PG lossless profiles.
+# speed   cable size  xon  xoff  threshold xon_offset
+  25000   5m    1518  0    15680   1       9408
+  50000   5m    1518  0    21248   1       9408
+  100000  5m    1518  0    34624   1       9408
+  200000  5m    1518  0    62368   1       9408
+  400000  5m    1518  0    117536  1       9408
+  800000  5m    1518  0    197536  1       9408
+  25000   40m   1518  0    16928   1       9408
+  50000   40m   1518  0    23392   1       9408
+  100000  40m   1518  0    38816   1       9408
+  200000  40m   1518  0    71904   1       9408
+  400000  40m   1518  0    135520  1       9408
+  800000  40m   1518  0    205520  1       9408
+  25000   100m  1518  0    18848   1       9408
+  50000   100m  1518  0    27264   1       9408
+  100000  100m  1518  0    46496   1       9408
+  200000  100m  1518  0    87168   1       9408
+  400000  100m  1518  0    166688  1       9408
+  800000  100m  1518  0    236688  1       9408
+  25000   300m  1518  0    25184   1       9408
+  50000   300m  1518  0    40128   1       9408
+  100000  300m  1518  0    72384   1       9408
+  200000  300m  1518  0    138112  1       9408
+  400000  300m  1518  0    268640  1       9408
+  800000  300m  1518  0    468640  1       9408
diff --git a/device/marvell/x86_64-marvell_dbmvtx9180-r0/dbmvtx9180_64x100G/port_config.ini b/device/marvell/x86_64-marvell_dbmvtx9180-r0/dbmvtx9180_64x100G/port_config.ini
new file mode 100644
index 000000000..b260f06fe
--- /dev/null
+++ b/device/marvell/x86_64-marvell_dbmvtx9180-r0/dbmvtx9180_64x100G/port_config.ini
@@ -0,0 +1,65 @@
+# name       lanes               		alias   fec    index   speed
+Ethernet0    489,490,491,492     Eth1    rs     1       100000
+Ethernet8    505,506,507,508     Eth2    rs     2       100000
+Ethernet16   441,442,443,444     Eth3    rs     3       100000
+Ethernet24   425,426,427,428     Eth4    rs     4       100000
+Ethernet32   41,42,43,44         Eth5    rs     5       100000
+Ethernet40   49,50,51,52         Eth6    rs     6       100000
+Ethernet48   153,154,155,156     Eth7    rs     7       100000
+Ethernet56   137,138,139,140     Eth8    rs     8       100000
+Ethernet64   1,2,3,4             Eth9    rs     9       100000
+Ethernet72   17,18,19,20         Eth10   rs     10      100000
+Ethernet80   81,82,83,84         Eth11   rs     11      100000
+Ethernet88   65,66,67,68         Eth12   rs     12      100000
+Ethernet96   97,98,99,100        Eth13   rs     13      100000
+Ethernet104  113,114,115,116     Eth14   rs     14      100000
+Ethernet112  193,194,195,196     Eth15   rs     15      100000
+Ethernet120  177,178,179,180     Eth16   rs     16      100000
+Ethernet128  33,34,35,36         Eth17   rs     17      100000
+Ethernet136  57,58,59,60         Eth18   rs     18      100000
+Ethernet144  161,162,163,164     Eth19   rs     19      100000
+Ethernet152  129,130,131,132     Eth20   rs     20      100000
+Ethernet160  217,218,219,220     Eth21   rs     21      100000
+Ethernet168  241,242,243,244     Eth22   rs     22      100000
+Ethernet176  233,234,235,236     Eth23   rs     23      100000
+Ethernet184  209,210,211,212     Eth24   rs     24      100000
+Ethernet192  105,106,107,108     Eth25   rs     25      100000
+Ethernet200  121,122,123,124     Eth26   rs     26      100000
+Ethernet208  169,170,171,172     Eth27   rs     27      100000
+Ethernet216  145,146,147,148     Eth28   rs     28      100000
+Ethernet224  265,266,267,268     Eth29   rs     29      100000
+Ethernet232  289,290,291,292     Eth30   rs     30      100000
+Ethernet240  297,298,299,300     Eth31   rs     31      100000
+Ethernet248  273,274,275,276     Eth32   rs     32      100000
+Ethernet256  225,226,227,228     Eth33   rs     33      100000
+Ethernet264  249,250,251,252     Eth34   rs     34      100000
+Ethernet272  201,202,203,204     Eth35   rs     35      100000
+Ethernet280  185,186,187,188     Eth36   rs     36      100000
+Ethernet288  393,394,395,396     Eth37   rs     37      100000
+Ethernet296  409,410,411,412     Eth38   rs     38      100000
+Ethernet304  329,330,331,332     Eth39   rs     39      100000
+Ethernet312  313,314,315,316     Eth40   rs     40      100000
+Ethernet320  257,258,259,260     Eth41   rs     41      100000
+Ethernet328  281,282,283,284     Eth42   rs     42      100000
+Ethernet336  321,322,323,324     Eth43   rs     43      100000
+Ethernet344  305,306,307,308     Eth44   rs     44      100000
+Ethernet352  457,458,459,460     Eth45   rs     45      100000
+Ethernet360  465,466,467,468     Eth46   rs     46      100000
+Ethernet368  369,370,371,372     Eth47   rs     47      100000
+Ethernet376  353,354,355,356     Eth48   rs     48      100000
+Ethernet384  385,386,387,388     Eth49   rs     49      100000
+Ethernet392  401,402,403,404     Eth50   rs     50      100000
+Ethernet400  361,362,363,364     Eth51   rs     51      100000
+Ethernet408  337,338,339,340     Eth52   rs     52      100000
+Ethernet416  481,482,483,484     Eth53   rs     53      100000
+Ethernet424  497,498,499,500     Eth54   rs     54      100000
+Ethernet432  433,434,435,436     Eth55   rs     55      100000
+Ethernet440  417,418,419,420     Eth56   rs     56      100000
+Ethernet448  449,450,451,452     Eth57   rs     57      100000
+Ethernet456  473,474,475,476     Eth58   rs     58      100000
+Ethernet464  377,378,379,380     Eth59   rs     59      100000
+Ethernet472  345,346,347,348     Eth60   rs     60      100000
+Ethernet480  9,10,11,12          Eth61   rs     61      100000
+Ethernet488  25,26,27,28         Eth62   rs     62      100000
+Ethernet496  89,90,91,92         Eth63   rs     63      100000
+Ethernet504  73,74,75,76         Eth64   rs     64      100000
diff --git a/device/marvell/x86_64-marvell_dbmvtx9180-r0/dbmvtx9180_64x100G/qos.json.j2 b/device/marvell/x86_64-marvell_dbmvtx9180-r0/dbmvtx9180_64x100G/qos.json.j2
new file mode 100755
index 000000000..0f1ecd110
--- /dev/null
+++ b/device/marvell/x86_64-marvell_dbmvtx9180-r0/dbmvtx9180_64x100G/qos.json.j2
@@ -0,0 +1,192 @@
+{% set port_names_list = [] %}
+{% for port in PORT %}
+    {%- if port_names_list.append(port) %}{% endif %}
+{% endfor %}
+{% set port_names = port_names_list | join(',') -%}
+
+
+{
+   "TC_TO_QUEUE_MAP":{
+        "AZURE":{
+            "0":"0",
+            "1":"1",
+            "2":"2",
+            "3":"3",
+            "4":"4",
+            "5":"5",
+            "6":"6",
+            "7":"7"
+        }
+    },
+    "MAP_PFC_PRIORITY_TO_QUEUE": {
+        "AZURE": {
+            "0": "0",
+            "1": "1",
+            "2": "2",
+            "3": "3",
+            "4": "4",
+            "5": "5",
+            "6": "6",
+            "7": "7"
+        }
+    },
+    "TC_TO_PRIORITY_GROUP_MAP": {
+    "AZURE": {
+        "0": "0",
+        "1": "0",
+        "2": "0",
+        "3": "3",
+        "4": "4",
+        "5": "0",
+        "6": "0",
+        "7": "0"
+    }
+    },
+       "DSCP_TO_TC_MAP": {
+        "AZURE": {
+            "0" : "1",
+            "1" : "1",
+            "2" : "1",
+            "3" : "3",
+            "4" : "4",
+            "5" : "2",
+            "6" : "1",
+            "7" : "1",
+            "8" : "0",
+            "9" : "1",
+            "10": "1",
+            "11": "1",
+            "12": "1",
+            "13": "1",
+            "14": "1",
+            "15": "1",
+            "16": "1",
+            "17": "1",
+            "18": "1",
+            "19": "1",
+            "20": "1",
+            "21": "1",
+            "22": "1",
+            "23": "1",
+            "24": "1",
+            "25": "1",
+            "26": "1",
+            "27": "1",
+            "28": "1",
+            "29": "1",
+            "30": "1",
+            "31": "1",
+            "32": "1",
+            "33": "1",
+            "34": "1",
+            "35": "1",
+            "36": "1",
+            "37": "1",
+            "38": "1",
+            "39": "1",
+            "40": "1",
+            "41": "1",
+            "42": "1",
+            "43": "1",
+            "44": "1",
+            "45": "1",
+            "46": "5",
+            "47": "1",
+            "48": "6",
+            "49": "1",
+            "50": "1",
+            "51": "1",
+            "52": "1",
+            "53": "1",
+            "54": "1",
+            "55": "1",
+            "56": "1",
+            "57": "1",
+            "58": "1",
+            "59": "1",
+            "60": "1",
+            "61": "1",
+            "62": "1",
+            "63": "1"
+        }
+    },
+    "SCHEDULER": {
+        "scheduler.0": {
+            "type"  : "DWRR",
+            "weight": "1"
+        },
+        "scheduler.1": {
+            "type"  : "DWRR",
+            "weight": "1"
+        }
+    },
+    "QUEUE": {
+{% for port in port_names_list %}
+        "{{ port }}|3": {
+            "scheduler"   : "scheduler.1",
+            "wred_profile"  : "AZURE_LOSSLESS"
+        },
+{% endfor %}
+{% for port in port_names_list %}
+        "{{ port }}|4": {
+            "scheduler"   : "scheduler.1",
+            "wred_profile"  : "AZURE_LOSSLESS"
+        },
+{% endfor %}
+{% for port in port_names_list %}
+        "{{ port }}|0": {
+            "scheduler": "scheduler.0"
+        },
+{% endfor %}
+{% for port in port_names_list %}
+        "{{ port }}|1": {
+            "scheduler": "scheduler.0"
+        },
+{% endfor %}
+{% for port in port_names_list %}
+        "{{ port }}|2": {
+            "scheduler": "scheduler.0"
+        },
+{% endfor %}
+{% for port in port_names_list %}
+        "{{ port }}|5": {
+            "scheduler": "scheduler.0"
+        },
+{% endfor %}
+{% for port in port_names_list %}
+        "{{ port }}|6": {
+            "scheduler": "scheduler.0"
+        }{% if not loop.last %},{% endif %}
+
+{% endfor %}
+    },
+    "PORT_QOS_MAP": {
+{% for port in port_names_list %}
+       "{{ port }}": {
+            "tc_to_pg_map": "AZURE",
+            "tc_to_queue_map": "AZURE",
+            "dscp_to_tc_map": "AZURE",
+            "pfc_to_queue_map": "AZURE",
+            "pfc_enable": "3,4"
+        }{% if not loop.last %},{% endif %}
+
+{% endfor %}
+    },
+    "WRED_PROFILE": {
+        "AZURE_LOSSLESS" : {
+            "wred_green_enable"      : "true",
+            "wred_yellow_enable"     : "true",
+            "wred_red_enable"        : "true",
+            "ecn"                    : "ecn_all",
+            "green_max_threshold"    : "2097152",
+            "green_min_threshold"    : "1048576",
+            "yellow_max_threshold"   : "2097152",
+            "yellow_min_threshold"   : "1048576",
+            "red_max_threshold"      : "2097152",
+            "red_min_threshold"      : "1048576",
+            "green_drop_probability" : "5",
+            "yellow_drop_probability": "5",
+            "red_drop_probability"   : "5"
+        }
+    }
+}
diff --git a/device/marvell/x86_64-marvell_dbmvtx9180-r0/dbmvtx9180_64x100G/qos_defaults_def_lossy.j2 b/device/marvell/x86_64-marvell_dbmvtx9180-r0/dbmvtx9180_64x100G/qos_defaults_def_lossy.j2
new file mode 100755
index 000000000..c1170619b
--- /dev/null
+++ b/device/marvell/x86_64-marvell_dbmvtx9180-r0/dbmvtx9180_64x100G/qos_defaults_def_lossy.j2
@@ -0,0 +1,121 @@
+{% set port_names_list = [] %}
+{% for port in PORT %}
+    {%- if port_names_list.append(port) %}{% endif %}
+{% endfor %}
+{% set port_names = port_names_list | join(',') -%}
+
+
+{
+   "TC_TO_QUEUE_MAP":{
+        "AZURE":{
+            "0":"0",
+            "1":"1",
+            "2":"2",
+            "3":"3",
+            "4":"4",
+            "5":"5",
+            "6":"6",
+            "7":"7"
+        }
+    },
+    "TC_TO_PRIORITY_GROUP_MAP": {
+    "AZURE": {
+        "0": "0",
+        "1": "0",
+        "2": "0",
+        "3": "1",
+        "4": "2",
+        "5": "0",
+        "6": "0",
+        "7": "0"
+    }
+    },
+       "DSCP_TO_TC_MAP": {
+        "AZURE": {
+            "0":"0",
+            "1":"0",
+            "2":"0",
+            "3":"0",
+            "4":"0",
+            "5":"0",
+            "6":"0",
+            "7":"0",
+            "8":"0",
+            "9":"0",
+            "10":"0",
+            "11":"0",
+            "12":"0",
+            "13":"0",
+            "14":"0",
+            "15":"0",
+            "16":"0",
+            "17":"0",
+            "18":"0",
+            "19":"0",
+            "20":"0",
+            "21":"0",
+            "22":"0",
+            "23":"0",
+            "24":"0",
+            "25":"0",
+            "26":"0",
+            "27":"0",
+            "28":"0",
+            "29":"0",
+            "30":"0",
+            "31":"0",
+            "32":"0",
+            "33":"0",
+            "34":"0",
+            "35":"0",
+            "36":"0",
+            "37":"0",
+            "38":"0",
+            "39":"0",
+            "40":"0",
+            "41":"0",
+            "42":"0",
+            "43":"0",
+            "44":"0",
+            "45":"0",
+            "46":"0",
+            "47":"0",
+            "48":"0",
+            "49":"0",
+            "50":"0",
+            "51":"0",
+            "52":"0",
+            "53":"0",
+            "54":"0",
+            "55":"0",
+            "56":"0",
+            "57":"0",
+            "58":"0",
+            "59":"0",
+            "60":"0",
+            "61":"0",
+            "62":"0",
+            "63":"0"
+        }
+    },
+    "PORT_QOS_MAP": {
+{% for port in port_names_list %}
+       "{{ port }}": {
+            "tc_to_pg_map": "AZURE",
+            "tc_to_queue_map": "AZURE",
+            "dscp_to_tc_map": "AZURE"
+        }{% if not loop.last %},{% endif %}
+
+{% endfor %}
+    },
+    "SCHEDULER": {
+        "scheduler.7": {
+            "type": "STRICT"
+        }
+    },
+    "QUEUE": {
+        "{{ port_names }}|7": {
+            "scheduler": "[SCHEDULER|scheduler.7]"
+        }
+    }
+}
diff --git a/device/marvell/x86_64-marvell_dbmvtx9180-r0/dbmvtx9180_64x100G/qos_defaults_t1.j2 b/device/marvell/x86_64-marvell_dbmvtx9180-r0/dbmvtx9180_64x100G/qos_defaults_t1.j2
new file mode 100755
index 000000000..0f1ecd110
--- /dev/null
+++ b/device/marvell/x86_64-marvell_dbmvtx9180-r0/dbmvtx9180_64x100G/qos_defaults_t1.j2
@@ -0,0 +1,192 @@
+{% set port_names_list = [] %}
+{% for port in PORT %}
+    {%- if port_names_list.append(port) %}{% endif %}
+{% endfor %}
+{% set port_names = port_names_list | join(',') -%}
+
+
+{
+   "TC_TO_QUEUE_MAP":{
+        "AZURE":{
+            "0":"0",
+            "1":"1",
+            "2":"2",
+            "3":"3",
+            "4":"4",
+            "5":"5",
+            "6":"6",
+            "7":"7"
+        }
+    },
+    "MAP_PFC_PRIORITY_TO_QUEUE": {
+        "AZURE": {
+            "0": "0",
+            "1": "1",
+            "2": "2",
+            "3": "3",
+            "4": "4",
+            "5": "5",
+            "6": "6",
+            "7": "7"
+        }
+    },
+    "TC_TO_PRIORITY_GROUP_MAP": {
+    "AZURE": {
+        "0": "0",
+        "1": "0",
+        "2": "0",
+        "3": "3",
+        "4": "4",
+        "5": "0",
+        "6": "0",
+        "7": "0"
+    }
+    },
+       "DSCP_TO_TC_MAP": {
+        "AZURE": {
+            "0" : "1",
+            "1" : "1",
+            "2" : "1",
+            "3" : "3",
+            "4" : "4",
+            "5" : "2",
+            "6" : "1",
+            "7" : "1",
+            "8" : "0",
+            "9" : "1",
+            "10": "1",
+            "11": "1",
+            "12": "1",
+            "13": "1",
+            "14": "1",
+            "15": "1",
+            "16": "1",
+            "17": "1",
+            "18": "1",
+            "19": "1",
+            "20": "1",
+            "21": "1",
+            "22": "1",
+            "23": "1",
+            "24": "1",
+            "25": "1",
+            "26": "1",
+            "27": "1",
+            "28": "1",
+            "29": "1",
+            "30": "1",
+            "31": "1",
+            "32": "1",
+            "33": "1",
+            "34": "1",
+            "35": "1",
+            "36": "1",
+            "37": "1",
+            "38": "1",
+            "39": "1",
+            "40": "1",
+            "41": "1",
+            "42": "1",
+            "43": "1",
+            "44": "1",
+            "45": "1",
+            "46": "5",
+            "47": "1",
+            "48": "6",
+            "49": "1",
+            "50": "1",
+            "51": "1",
+            "52": "1",
+            "53": "1",
+            "54": "1",
+            "55": "1",
+            "56": "1",
+            "57": "1",
+            "58": "1",
+            "59": "1",
+            "60": "1",
+            "61": "1",
+            "62": "1",
+            "63": "1"
+        }
+    },
+    "SCHEDULER": {
+        "scheduler.0": {
+            "type"  : "DWRR",
+            "weight": "1"
+        },
+        "scheduler.1": {
+            "type"  : "DWRR",
+            "weight": "1"
+        }
+    },
+    "QUEUE": {
+{% for port in port_names_list %}
+        "{{ port }}|3": {
+            "scheduler"   : "scheduler.1",
+            "wred_profile"  : "AZURE_LOSSLESS"
+        },
+{% endfor %}
+{% for port in port_names_list %}
+        "{{ port }}|4": {
+            "scheduler"   : "scheduler.1",
+            "wred_profile"  : "AZURE_LOSSLESS"
+        },
+{% endfor %}
+{% for port in port_names_list %}
+        "{{ port }}|0": {
+            "scheduler": "scheduler.0"
+        },
+{% endfor %}
+{% for port in port_names_list %}
+        "{{ port }}|1": {
+            "scheduler": "scheduler.0"
+        },
+{% endfor %}
+{% for port in port_names_list %}
+        "{{ port }}|2": {
+            "scheduler": "scheduler.0"
+        },
+{% endfor %}
+{% for port in port_names_list %}
+        "{{ port }}|5": {
+            "scheduler": "scheduler.0"
+        },
+{% endfor %}
+{% for port in port_names_list %}
+        "{{ port }}|6": {
+            "scheduler": "scheduler.0"
+        }{% if not loop.last %},{% endif %}
+
+{% endfor %}
+    },
+    "PORT_QOS_MAP": {
+{% for port in port_names_list %}
+       "{{ port }}": {
+            "tc_to_pg_map": "AZURE",
+            "tc_to_queue_map": "AZURE",
+            "dscp_to_tc_map": "AZURE",
+            "pfc_to_queue_map": "AZURE",
+            "pfc_enable": "3,4"
+        }{% if not loop.last %},{% endif %}
+
+{% endfor %}
+    },
+    "WRED_PROFILE": {
+        "AZURE_LOSSLESS" : {
+            "wred_green_enable"      : "true",
+            "wred_yellow_enable"     : "true",
+            "wred_red_enable"        : "true",
+            "ecn"                    : "ecn_all",
+            "green_max_threshold"    : "2097152",
+            "green_min_threshold"    : "1048576",
+            "yellow_max_threshold"   : "2097152",
+            "yellow_min_threshold"   : "1048576",
+            "red_max_threshold"      : "2097152",
+            "red_min_threshold"      : "1048576",
+            "green_drop_probability" : "5",
+            "yellow_drop_probability": "5",
+            "red_drop_probability"   : "5"
+        }
+    }
+}
diff --git a/device/marvell/x86_64-marvell_dbmvtx9180-r0/dbmvtx9180_64x100G/sai.profile b/device/marvell/x86_64-marvell_dbmvtx9180-r0/dbmvtx9180_64x100G/sai.profile
new file mode 100644
index 000000000..aba4fc81f
--- /dev/null
+++ b/device/marvell/x86_64-marvell_dbmvtx9180-r0/dbmvtx9180_64x100G/sai.profile
@@ -0,0 +1 @@
+SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/ivm.sai.config.yaml
diff --git a/device/marvell/x86_64-marvell_dbmvtx9180-r0/dbmvtx9180_64x100G/teralynx.MVTX9180 b/device/marvell/x86_64-marvell_dbmvtx9180-r0/dbmvtx9180_64x100G/teralynx.MVTX9180
new file mode 100644
index 000000000..e310d0be0
--- /dev/null
+++ b/device/marvell/x86_64-marvell_dbmvtx9180-r0/dbmvtx9180_64x100G/teralynx.MVTX9180
@@ -0,0 +1,170 @@
+sku:               teralynx.MVTX9180
+
+device_id:         0x6000
+
+# Hardware constraint information
+hardware:
+        num_ibs:           8
+        ib_active:         0,1,2,3,4,5,6,7
+
+        ports_per_ib:      66, 66, 66, 66, 66, 66, 66, 66
+        recirc_port_num:   64, 64, 64, 64, 64, 64, 64, 64
+        cpu_port_num:      65
+        cpu_port_ib:       0
+        mgmt_port_num:     65, 65
+        mgmt_port_ibs:     1,2
+
+        pics_per_ib:       8, 9, 9, 8, 8, 8, 8, 8
+        pic_ports_per_pic: 8
+        max_serdes_speed:  100
+
+        num_shared_pics:   0
+
+        isg [0-7]:
+            ib: 0
+            pic_id: [0-7]
+
+        isg [8-15]:
+            ib: 4
+            pic_id: [0-7]
+
+        isg 16:
+            ib: 6
+            pic_id: 7
+
+        isg 17:
+            ib: 6
+            pic_id: 6
+
+        isg 18:
+            ib: 6
+            pic_id: 5
+
+        isg 19:
+            ib: 6
+            pic_id: 4
+
+        isg 20:
+            ib: 6
+            pic_id: 3
+
+        isg 21:
+            ib: 6
+            pic_id: 2
+
+        isg 22:
+            ib: 6
+            pic_id: 1
+
+        isg 23:
+            ib: 6
+            pic_id: 0
+
+        isg 24:
+            ib: 2
+            pic_id: 7
+
+        isg 25:
+            ib: 2
+            pic_id: 6
+
+        isg 26:
+            ib: 2
+            pic_id: 5
+
+        isg 27:
+            ib: 2
+            pic_id: 4
+
+        isg 28:
+            ib: 2
+            pic_id: 3
+
+        isg 29:
+            ib: 2
+            pic_id: 2
+
+        isg 30:
+            ib: 2
+            pic_id: 1
+
+        isg 31:
+            ib: 2
+            pic_id: 0
+
+        isg [32-39]:
+            ib: 3
+            pic_id: [0-7]
+
+        isg [40-47]:
+            ib: 7
+            pic_id: [0-7]
+
+        isg 48:
+            ib: 5
+            pic_id: 7
+
+        isg 49:
+            ib: 5
+            pic_id: 6
+
+        isg 50:
+            ib: 5
+            pic_id: 5
+
+        isg 51:
+            ib: 5
+            pic_id: 4
+
+        isg 52:
+            ib: 5
+            pic_id: 3
+
+        isg 53:
+            ib: 5
+            pic_id: 2
+
+        isg 54:
+            ib: 5
+            pic_id: 1
+
+        isg 55:
+            ib: 5
+            pic_id: 0
+
+        isg 56:
+            ib: 1
+            pic_id: 7
+
+        isg 57:
+            ib: 1
+            pic_id: 6
+
+        isg 58:
+            ib: 1
+            pic_id: 5
+
+        isg 59:
+            ib: 1
+            pic_id: 4
+
+        isg 60:
+            ib: 1
+            pic_id: 3
+
+        isg 61:
+            ib: 1
+            pic_id: 2
+
+        isg 62:
+            ib: 1
+            pic_id: 1
+
+        isg 63:
+            ib: 1
+            pic_id: 0
+
+        isg 64:
+            mode: 1:1
+            ib: 1, 2
+            pic_id: 8
diff --git a/device/marvell/x86_64-marvell_dbmvtx9180-r0/default_sku b/device/marvell/x86_64-marvell_dbmvtx9180-r0/default_sku
new file mode 100644
index 000000000..5be826c15
--- /dev/null
+++ b/device/marvell/x86_64-marvell_dbmvtx9180-r0/default_sku
@@ -0,0 +1 @@
+dbmvtx9180_64x100G t1
diff --git a/device/marvell/x86_64-marvell_dbmvtx9180-r0/installer.conf b/device/marvell/x86_64-marvell_dbmvtx9180-r0/installer.conf
new file mode 100644
index 000000000..d7d410dae
--- /dev/null
+++ b/device/marvell/x86_64-marvell_dbmvtx9180-r0/installer.conf
@@ -0,0 +1,4 @@
+CONSOLE_PORT=0x3f8
+CONSOLE_DEV=4
+CONSOLE_SPEED=115200
+ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="pcie_aspm=off intel_iommu=off"
diff --git a/device/marvell/x86_64-marvell_dbmvtx9180-r0/platform_asic b/device/marvell/x86_64-marvell_dbmvtx9180-r0/platform_asic
new file mode 100644
index 000000000..84083a741
--- /dev/null
+++ b/device/marvell/x86_64-marvell_dbmvtx9180-r0/platform_asic
@@ -0,0 +1 @@
+innovium
diff --git a/device/marvell/x86_64-marvell_dbmvtx9180-r0/plugins/eeprom.py b/device/marvell/x86_64-marvell_dbmvtx9180-r0/plugins/eeprom.py
new file mode 100644
index 000000000..b7724886e
--- /dev/null
+++ b/device/marvell/x86_64-marvell_dbmvtx9180-r0/plugins/eeprom.py
@@ -0,0 +1,26 @@
+#!/usr/bin/env python
+
+try:
+    import os
+    from sonic_eeprom import eeprom_tlvinfo
+except ImportError as e:
+    raise ImportError (str(e) + "- required module not found")
+
+def eeprom_check():
+    filepath="/sys/bus/i2c/devices/0-0056/eeprom"
+    if os.path.isfile(filepath):
+        return 1 #now board, 0x56
+    else:
+        return 0 #now board, 0x57
+
+class board(eeprom_tlvinfo.TlvInfoDecoder):
+    _TLV_INFO_MAX_LEN = 256
+    def __init__(self, name, path, cpld_root, ro):
+        ret=eeprom_check()
+        if ret==1:
+            self.eeprom_path = "/sys/bus/i2c/devices/0-0056/eeprom"
+        else:
+            self.eeprom_path = "/sys/bus/i2c/devices/47-0057/eeprom"
+
+        super(board, self).__init__(self.eeprom_path, 0, '', True)
+
diff --git a/device/marvell/x86_64-marvell_dbmvtx9180-r0/plugins/psuutil.py b/device/marvell/x86_64-marvell_dbmvtx9180-r0/plugins/psuutil.py
new file mode 100644
index 000000000..a8dbcd229
--- /dev/null
+++ b/device/marvell/x86_64-marvell_dbmvtx9180-r0/plugins/psuutil.py
@@ -0,0 +1,59 @@
+#!/usr/bin/env python
+
+#############################################################################
+# teralynx
+#
+# Module contains an implementation of SONiC PSU Base API and
+# provides the PSUs status which are available in the platform
+#
+#############################################################################
+
+try:
+    from sonic_psu.psu_base import PsuBase
+except ImportError as e:
+    raise ImportError (str(e) + "- required module not found")
+
+class PsuUtil(PsuBase):
+    """Platform-specific PSUutil class"""
+
+    def __init__(self):
+        PsuBase.__init__(self)
+
+        self.psu_path = "/sys/bus/i2c/devices/"
+        self.psu_presence = "/psu_present"
+        self.psu_oper_status = "/psu_power_good"
+        self.psu_mapping = {
+            2: "0-0051",
+            1: "0-0052",
+        }
+
+    def get_num_psus(self):
+        return len(self.psu_mapping)
+
+    def get_psu_status(self, index):
+        if index is None:
+            return False
+
+        status = 0
+        node = self.psu_path + self.psu_mapping[index]+self.psu_oper_status
+        try:
+            with open(node, 'r') as power_status:
+                status = int(power_status.read())
+        except IOError:
+            return False
+
+        return status == 1
+
+    def get_psu_presence(self, index):
+        if index is None:
+            return False
+
+        status = 0
+        node = self.psu_path + self.psu_mapping[index] + self.psu_presence
+        try:
+            with open(node, 'r') as presence_status:
+                status = int(presence_status.read())
+        except IOError:
+            return False
+
+        return status == 1
diff --git a/device/marvell/x86_64-marvell_dbmvtx9180-r0/plugins/sfputil.py b/device/marvell/x86_64-marvell_dbmvtx9180-r0/plugins/sfputil.py
new file mode 100644
index 000000000..898357901
--- /dev/null
+++ b/device/marvell/x86_64-marvell_dbmvtx9180-r0/plugins/sfputil.py
@@ -0,0 +1,186 @@
+# sfputil.py
+#
+# Platform-specific SFP transceiver interface for SONiC
+#
+
+try:
+    import time
+    from sonic_sfp.sfputilbase import SfpUtilBase
+except ImportError as e:
+    raise ImportError("%s - required module not found" % str(e))
+
+
+class SfpUtil(SfpUtilBase):
+    """Platform-specific SfpUtil class"""
+    SONIC_PORT_NAME_PREFIX = "Ethernet"
+    PORT_START = 0
+    PORT_END = 31
+    PORTS_IN_BLOCK = 32
+
+    BASE_OOM_PATH = "/sys/bus/i2c/devices/0-00{0}/"
+    BASE_CPLD1_PATH = "/sys/bus/i2c/devices/0-0061/"
+    BASE_CPLD2_PATH = "/sys/bus/i2c/devices/0-0062/"
+
+    _port_to_is_present = {}
+    _port_to_lp_mode = {}
+
+    _port_to_eeprom_mapping = {}
+    _port_to_i2c_mapping = {
+           0: [1, 10],
+           1: [2, 11],
+           2: [3, 12],
+           3: [4, 13],
+           4: [5, 14],
+           5: [6, 15],
+           6: [7, 16],
+           7: [8, 17],
+           8: [9, 18],
+           9: [10, 19],
+           10: [11, 20],
+           11: [12, 21],
+           12: [13, 22],
+           13: [14, 23],
+           14: [15, 24],
+           15: [16, 25],
+           16: [17, 26],
+           17: [18, 27],
+           18: [19, 28],
+           19: [20, 29],
+           20: [21, 30],
+           21: [22, 31],
+           22: [23, 32],
+           23: [24, 33],
+           24: [25, 34],
+           25: [26, 35],
+           26: [27, 36],
+           27: [28, 37],
+           28: [29, 38],
+           29: [30, 39],
+           30: [31, 40],
+           31: [32, 41],
+           }
+
+    @property
+    def port_start(self):
+        return self.PORT_START
+
+    @property
+    def port_end(self):
+        return self.PORT_END
+
+    @property
+    def qsfp_ports(self):
+        return range(self.PORT_START, self.PORTS_IN_BLOCK + 1)
+
+    @property
+    def port_to_eeprom_mapping(self):
+        return self._port_to_eeprom_mapping
+
+    def is_logical_port(self, port_name):
+        return True
+
+    def get_logical_to_physical(self, port_name):
+        if not port_name.startswith(self.SONIC_PORT_NAME_PREFIX):
+            return None
+
+        port_idx = int(port_name[len(self.SONIC_PORT_NAME_PREFIX):])
+        port_idx = port_idx // 8
+        return [port_idx]
+
+    def __init__(self):
+        eeprom_path = self.BASE_OOM_PATH + "eeprom1"
+
+        for x in range(0, self.port_end+1):
+            self.port_to_eeprom_mapping[x] = eeprom_path.format(self._port_to_i2c_mapping[x][1])
+
+        self._transceiver_presence = self._get_sfp_presence()
+        SfpUtilBase.__init__(self)
+
+    def get_presence(self, port_num):
+        # Check for invalid port_num
+        if port_num < self.port_start or port_num > self.port_end:
+            return False
+        if port_num < 16 :
+            present_path = self.BASE_CPLD1_PATH + "module_present_" + str(port_num+1)
+        else:
+            present_path = self.BASE_CPLD2_PATH + "module_present_" + str(port_num+1)
+        self.__port_to_is_present = present_path
+
+        try:
+            val_file = open(self.__port_to_is_present)
+            content = val_file.readline().rstrip()
+            val_file.close()
+        except IOError as e:
+            print("Error: unable to access file: %s" % str(e))
+            return False
+
+        if content == "1":
+            return True
+
+        return False
+
+    def get_low_power_mode(self, port_num):
+        raise NotImplementedError
+
+    def set_low_power_mode(self, port_num, lpmode):
+        raise NotImplementedError
+
+    def reset(self, port_num):
+        raise NotImplementedError
+
+    def _get_sfp_presence(self):
+        port_pres = {}
+        for port in range(0, self.port_end+1):
+            port_pres[port] = self.get_presence(port)
+
+        return port_pres
+
+    def get_transceiver_change_event(self, timeout=0):
+        start_time = time.time()
+        port_dict = {}
+        forever = False
+
+        if timeout == 0:
+            forever = True
+        elif timeout > 0:
+            timeout = timeout / float(1000) # Convert to secs
+        else:
+            print("get_transceiver_change_event:Invalid timeout value", timeout)
+            return False, {}
+
+        end_time = start_time + timeout
+        if start_time > end_time:
+            print('get_transceiver_change_event:' \
+                       'time wrap / invalid timeout value', timeout)
+
+            return False, {} # Time wrap or possibly incorrect timeout
+
+        while timeout >= 0:
+            change_status = False
+
+            cur_presence = self._get_sfp_presence()
+            for port in range(0, self.port_end+1):
+                if cur_presence[port] == 1:
+                    port_dict[port]='1'
+                else:
+                    port_dict[port]='0'
+
+                if cur_presence[port] != self._transceiver_presence[port]:
+                    change_status = True
+
+            self._transceiver_presence = cur_presence
+            if change_status:
+                return True, port_dict
+
+            if forever:
+                time.sleep(1)
+            else:
+                timeout = end_time - time.time()
+                if timeout >= 1:
+                    time.sleep(1) # We poll at 1 second granularity
+                else:
+                    if timeout > 0:
+                        time.sleep(timeout)
+                    return True, {}
+        print("get_evt_change_event: Should not reach here.")
+        return False, {}
diff --git a/device/marvell/x86_64-marvell_dbmvtx9180-r0/pmon_daemon_control.json b/device/marvell/x86_64-marvell_dbmvtx9180-r0/pmon_daemon_control.json
new file mode 100644
index 000000000..f5fdc945d
--- /dev/null
+++ b/device/marvell/x86_64-marvell_dbmvtx9180-r0/pmon_daemon_control.json
@@ -0,0 +1,6 @@
+{
+    "skip_ledd": true,
+    "skip_pcied": true,
+    "skip_thermalctld": true,
+    "skip_psud": true
+}
diff --git a/device/marvell/x86_64-marvell_dbmvtx9180-r0/topo.conf b/device/marvell/x86_64-marvell_dbmvtx9180-r0/topo.conf
new file mode 100644
index 000000000..795ea4314
--- /dev/null
+++ b/device/marvell/x86_64-marvell_dbmvtx9180-r0/topo.conf
@@ -0,0 +1 @@
+t1
diff --git a/platform/innovium/one-image.mk b/platform/innovium/one-image.mk
index bd63990f5..b1abcf613 100755
--- a/platform/innovium/one-image.mk
+++ b/platform/innovium/one-image.mk
@@ -9,6 +9,7 @@ $(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(DELTA_PLATFORM_MODULE)
 $(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(NETBERG_AURORA_715_PLATFORM_MODULE)
 $(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(SMCI_SSE_T7132S_PLATFORM_MODULE)
 $(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(WISTRON_PLATFORM_MODULE)
+$(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(TL10_DBMVTX9180_PLATFORM)
 $(SONIC_ONE_IMAGE)_INSTALLS += $(INVM_DRV)
 $(SONIC_ONE_IMAGE)_DOCKERS  += $(SONIC_INSTALL_DOCKER_IMAGES)
 SONIC_INSTALLERS += $(SONIC_ONE_IMAGE)
diff --git a/platform/innovium/platform-modules-marvell.mk b/platform/innovium/platform-modules-marvell.mk
new file mode 100644
index 000000000..b3d720e64
--- /dev/null
+++ b/platform/innovium/platform-modules-marvell.mk
@@ -0,0 +1,13 @@
+# Teralynx 10 Platform
+
+TL10_DBMVTX9180_VERSION = 1.0
+
+export TL10_DBMVTX9180_VERSION
+
+TL10_DBMVTX9180_PLATFORM = sonic-platform-marvell-dbmvtx9180_$(TL10_DBMVTX9180_VERSION)_$(CONFIGURED_ARCH).deb
+$(TL10_DBMVTX9180_PLATFORM)_SRC_PATH = $(PLATFORM_PATH)/sonic-platform-marvell
+$(TL10_DBMVTX9180_PLATFORM)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON)
+$(TL10_DBMVTX9180_PLATFORM)_PLATFORM = x86_64-marvell_dbmvtx9180-r0
+
+SONIC_DPKG_DEBS += $(TL10_DBMVTX9180_PLATFORM)
+
diff --git a/platform/innovium/rules.mk b/platform/innovium/rules.mk
index 03efa70b0..4733f5452 100755
--- a/platform/innovium/rules.mk
+++ b/platform/innovium/rules.mk
@@ -1,9 +1,8 @@
 include $(PLATFORM_PATH)/invm-sai.mk
 include $(PLATFORM_PATH)/platform-modules-cel.mk
 include $(PLATFORM_PATH)/platform-modules-supermicro.mk
-#include $(PLATFORM_PATH)/platform-modules-delta.mk
 include $(PLATFORM_PATH)/platform-modules-wistron.mk
-#include $(PLATFORM_PATH)/platform-modules-netberg.mk
+include $(PLATFORM_PATH)/platform-modules-marvell.mk
 include $(PLATFORM_PATH)/docker-syncd-invm.mk
 include $(PLATFORM_PATH)/docker-syncd-invm-rpc.mk
 include $(PLATFORM_PATH)/one-image.mk
diff --git a/platform/innovium/sonic-platform-marvell b/platform/innovium/sonic-platform-marvell
new file mode 160000
index 000000000..a6e250959
--- /dev/null
+++ b/platform/innovium/sonic-platform-marvell
@@ -0,0 +1 @@
+Subproject commit a6e250959b4e98f443e759179ac25f93cc891c9a

From 0d1131f8297308bf2cf9b454905430bbcad89844 Mon Sep 17 00:00:00 2001
From: Keshav Gupta <keshavg@marvell.com>
Date: Tue, 30 Apr 2024 02:07:04 +0530
Subject: [PATCH 0500/1115] Innovium syncd bookworm migration (#18339)

* Innovium syncd bookworm migration

Signed-off-by: Keshav Gupta <keshavg@marvell.com>
---
 platform/innovium/docker-syncd-invm-rpc.mk    |  5 +-
 .../docker-syncd-invm-rpc/Dockerfile.j2       | 46 +++++++++++--------
 platform/innovium/docker-syncd-invm.mk        |  5 +-
 .../innovium/docker-syncd-invm/Dockerfile.j2  |  3 +-
 platform/innovium/libsaithrift-dev.mk         | 23 ++++++++--
 platform/innovium/rules.mk                    |  7 ++-
 6 files changed, 56 insertions(+), 33 deletions(-)

diff --git a/platform/innovium/docker-syncd-invm-rpc.mk b/platform/innovium/docker-syncd-invm-rpc.mk
index 9bb60ad42..c4e1c8762 100755
--- a/platform/innovium/docker-syncd-invm-rpc.mk
+++ b/platform/innovium/docker-syncd-invm-rpc.mk
@@ -2,11 +2,12 @@
 
 DOCKER_SYNCD_INVM_RPC = docker-syncd-invm-rpc.gz
 $(DOCKER_SYNCD_INVM_RPC)_PATH = $(PLATFORM_PATH)/docker-syncd-invm-rpc
-$(DOCKER_SYNCD_INVM_RPC)_DEPENDS += $(SYNCD_RPC) $(LIBTHRIFT) $(INVM_LIBSAI) $(PTF) $(INVM_SHELL)
+$(DOCKER_SYNCD_INVM_RPC)_DEPENDS += $(SYNCD_RPC) $(INVM_LIBSAI) $(INVM_SHELL)
+$(DOCKER_SYNCD_INVM_RPC)_PYTHON_WHEELS += $(PTF_PY3)
 $(DOCKER_SYNCD_INVM_RPC)_FILES += $(SUPERVISOR_PROC_EXIT_LISTENER_SCRIPT)
 $(DOCKER_SYNCD_INVM_RPC)_LOAD_DOCKERS += $(DOCKER_SYNCD_BASE)
 SONIC_DOCKER_IMAGES += $(DOCKER_SYNCD_INVM_RPC)
-SONIC_BUSTER_DOCKERS += $(DOCKER_SYNCD_INVM_RPC)
+SONIC_BOOKWORM_DOCKERS += $(DOCKER_SYNCD_INVM_RPC)
 ifeq ($(ENABLE_SYNCD_RPC),y)
 SONIC_INSTALL_DOCKER_IMAGES += $(DOCKER_SYNCD_INVM_RPC)
 endif
diff --git a/platform/innovium/docker-syncd-invm-rpc/Dockerfile.j2 b/platform/innovium/docker-syncd-invm-rpc/Dockerfile.j2
index 7ddccc3ab..b5e00c0a8 100755
--- a/platform/innovium/docker-syncd-invm-rpc/Dockerfile.j2
+++ b/platform/innovium/docker-syncd-invm-rpc/Dockerfile.j2
@@ -1,4 +1,5 @@
 FROM docker-syncd-invm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}}
+{% from "dockers/dockerfile-macros.j2" import install_python_wheels, copy_files %}
 
 ## Make apt-get non-interactive
 ENV DEBIAN_FRONTEND=noninteractive
@@ -15,44 +16,49 @@ RUN apt-get purge -y syncd
 RUN apt-get update \
  && apt-get -y install  \
     net-tools           \
-    python-pip          \
-    python-setuptools   \
+    python3-pip          \
+    python3-setuptools   \
     build-essential     \
     libssl-dev          \
     libffi-dev          \
-    python-dev          \
+    python3-dev          \
     libjansson4         \
     libyaml-dev         \
     wget                \
     cmake               \
     libqt5core5a        \
     libqt5network5      \
-    libboost-atomic1.71.0
+    libboost-atomic1.74.0 \
+    libthrift-0.17.0      \
+    libnanomsg5           \
+    libnanomsg-dev
 
 RUN dpkg_apt() { [ -f $1 ] && { dpkg -i $1 || apt-get -y install -f; } || return 1; } ; \
 {% for deb in docker_syncd_invm_rpc_debs.split(' ') -%}
 dpkg_apt debs/{{ deb }}{{'; '}}
 {%- endfor %}
 
-RUN wget https://github.com/nanomsg/nanomsg/archive/1.0.0.tar.gz \
- && tar xvfz 1.0.0.tar.gz \
- && cd nanomsg-1.0.0    \
- && mkdir -p build      \
- && cmake .             \
- && make install        \
- && ldconfig            \
- && cd ..               \
- && rm -fr nanomsg-1.0.0 \
- && rm -f 1.0.0.tar.gz  \
- && pip install numpy   \
- && pip install scipy   \
- && pip install setuptools   \
+RUN pip3 install cffi \
+ && pip3 install nnpy   \
  && mkdir -p /opt       \
  && cd /opt             \
- && wget https://raw.githubusercontent.com/p4lang/ptf/master/ptf_nn/ptf_nn_agent.py \
- && apt-get clean -y; apt-get autoclean -y; apt-get autoremove -y \
- && rm -rf /root/deps
+ && wget https://raw.githubusercontent.com/p4lang/ptf/master/ptf_nn/ptf_nn_agent.py
 
 COPY ["ptf_nn_agent.conf", "/etc/supervisor/conf.d/"]
 
+{% if docker_syncd_invm_rpc_whls.strip() -%}
+# Copy locally-built Python wheel dependencies
+{{ copy_files("python-wheels/", docker_syncd_invm_rpc_whls.split(' '), "/python-wheels/") }}
+
+# Install locally-built Python wheel dependencies
+{{ install_python_wheels(docker_syncd_invm_rpc_whls.split(' ')) }}
+{% endif %}
+
+
+## Clean up
+RUN apt-get purge -y libyaml-dev python3-dev libffi-dev libssl-dev wget cmake \
+    build-essential
+RUN apt-get clean -y; apt-get autoclean -y; apt-get autoremove -y
+RUN rm -rf /root/deps
+
 ENTRYPOINT ["/usr/local/bin/supervisord"]
diff --git a/platform/innovium/docker-syncd-invm.mk b/platform/innovium/docker-syncd-invm.mk
index 0f748e3e8..572680721 100755
--- a/platform/innovium/docker-syncd-invm.mk
+++ b/platform/innovium/docker-syncd-invm.mk
@@ -1,7 +1,7 @@
 # docker image for innovium syncd
 
 DOCKER_SYNCD_PLATFORM_CODE = invm
-include $(PLATFORM_PATH)/../template/docker-syncd-base.mk
+include $(PLATFORM_PATH)/../template/docker-syncd-bookworm.mk
 
 $(DOCKER_SYNCD_BASE)_DEPENDS += $(SYNCD) $(PYTHON_SDK_API) $(INVM_LIBSAI) $(INVM_SHELL)
 
@@ -10,9 +10,6 @@ $(DOCKER_SYNCD_BASE)_DBG_DEPENDS += $(SYNCD_DBG) \
                                 $(LIBSAIMETADATA_DBG) \
                                 $(LIBSAIREDIS_DBG)
 
-SONIC_BUSTER_DOCKERS += $(DOCKER_SYNCD_BASE)
-SONIC_BUSTER_DBG_DOCKERS += $(DOCKER_SYNCD_BASE_DBG)
-
 $(DOCKER_SYNCD_BASE)_VERSION = 1.0.0
 $(DOCKER_SYNCD_BASE)_PACKAGE_NAME = syncd
 $(DOCKER_SYNCD_BASE)_MACHINE = innovium
diff --git a/platform/innovium/docker-syncd-invm/Dockerfile.j2 b/platform/innovium/docker-syncd-invm/Dockerfile.j2
index 514e22373..3abe009d0 100755
--- a/platform/innovium/docker-syncd-invm/Dockerfile.j2
+++ b/platform/innovium/docker-syncd-invm/Dockerfile.j2
@@ -1,4 +1,5 @@
-FROM docker-config-engine-buster-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}}
+{% from "dockers/dockerfile-macros.j2" import install_debian_packages %}
+FROM docker-config-engine-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}}
 
 ARG docker_container_name
 
diff --git a/platform/innovium/libsaithrift-dev.mk b/platform/innovium/libsaithrift-dev.mk
index 5357705ba..ebc573e50 100755
--- a/platform/innovium/libsaithrift-dev.mk
+++ b/platform/innovium/libsaithrift-dev.mk
@@ -1,7 +1,20 @@
 # libsaithrift-dev package
+SAI_VER = 0.9.4
 
-LIBSAITHRIFT_DEV_INVM = libsaithrift-dev_0.9.4_$(CONFIGURED_ARCH).deb
-$(LIBSAITHRIFT_DEV_INVM)_SRC_PATH = $(SRC_PATH)/sonic-sairedis/SAI
-$(LIBSAITHRIFT_DEV_INVM)_DEPENDS += $(LIBTHRIFT) $(LIBTHRIFT_DEV) $(THRIFT_COMPILER) $(INVM_LIBSAI) $(INVM_HSAI)
-$(LIBSAITHRIFT_DEV_INVM)_RDEPENDS += $(LIBTHRIFT) $(INVM_HSAI)
-SONIC_DPKG_DEBS += $(LIBSAITHRIFT_DEV_INVM)
+LIBSAITHRIFT_DEV = libsaithrift$(SAITHRIFT_VER)-dev_$(SAI_VER)_$(CONFIGURED_ARCH).deb
+$(LIBSAITHRIFT_DEV)_SRC_PATH = $(SRC_PATH)/sonic-sairedis/SAI
+ifeq ($(SAITHRIFT_V2),y)
+$(LIBSAITHRIFT_DEV)_DEPENDS += $(INVM_LIBSAI) $(INVM_HSAI) $(LIBSAIMETADATA) $(LIBSAIMETADATA_DEV)
+$(LIBSAITHRIFT_DEV)_RDEPENDS += $(INVM_HSAI) $(LIBSAIMETADATA)
+$(LIBSAITHRIFT_DEV)_BUILD_ENV = SAITHRIFTV2=true SAITHRIFT_VER=v2
+else
+$(LIBSAITHRIFT_DEV)_DEPENDS += $(INVM_LIBSAI) $(INVM_HSAI)
+$(LIBSAITHRIFT_DEV)_RDEPENDS += $(INVM_HSAI)
+endif
+$(LIBSAITHRIFT_DEV)_DEPENDS += $(LIBSAIMETADATA) $(LIBSAIMETADATA_DEV)
+$(LIBSAITHRIFT_DEV)_RDEPENDS += $(LIBSAIMETADATA) $(INVM_LIBSAI) $(INVM_SHELL)
+
+PYTHON_SAITHRIFT = python-saithrift$(SAITHRIFT_VER)_$(SAI_VER)_$(CONFIGURED_ARCH).deb
+$(eval $(call add_extra_package,$(LIBSAITHRIFT_DEV),$(PYTHON_SAITHRIFT)))
+
+SONIC_DPKG_DEBS += $(LIBSAITHRIFT_DEV)
diff --git a/platform/innovium/rules.mk b/platform/innovium/rules.mk
index 4733f5452..dcf7f079f 100755
--- a/platform/innovium/rules.mk
+++ b/platform/innovium/rules.mk
@@ -15,8 +15,13 @@ SONIC_ALL += $(SONIC_INVM_ONE_IMAGE) \
              $(DOCKER_SYNCD_INVM_RPC)
 
 # Inject invm sai into syncd
-$(SYNCD)_DEPENDS += $(INVM_HSAI) $(INVM_LIBSAI) $(LIBSAITHRIFT_DEV_INVM) $(INVM_SHELL)
+$(SYNCD)_DEPENDS += $(INVM_HSAI) $(INVM_LIBSAI) $(INVM_SHELL)
 $(SYNCD)_UNINSTALLS += $(INVM_HSAI)
 
+ifeq ($(ENABLE_SYNCD_RPC),y)
+$(SYNCD)_DEPENDS := $(filter-out $(LIBTHRIFT_DEV),$($(SYNCD)_DEPENDS))
+$(SYNCD)_DEPENDS += $(LIBSAITHRIFT_DEV)
+endif
+
 # Runtime dependency on invm sai is set only for syncd
 $(SYNCD)_RDEPENDS += $(INVM_HSAI)

From 1cb12ba96ea47bcd0bb904baa5d74286f3621215 Mon Sep 17 00:00:00 2001
From: Adam Yeung <47261130+adyeung@users.noreply.github.com>
Date: Mon, 29 Apr 2024 13:38:08 -0700
Subject: [PATCH 0501/1115] ICCPD bookworm migration  (#18542)

ICCPD bookworm migration

* Update Dockerfile.j2
* Update docker-iccpd.mk
---
 dockers/docker-iccpd/Dockerfile.j2 |  2 +-
 rules/docker-iccpd.mk              | 14 +++++++-------
 2 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/dockers/docker-iccpd/Dockerfile.j2 b/dockers/docker-iccpd/Dockerfile.j2
index 42a73b4cd..72d2d3d20 100644
--- a/dockers/docker-iccpd/Dockerfile.j2
+++ b/dockers/docker-iccpd/Dockerfile.j2
@@ -1,5 +1,5 @@
 {% from "dockers/dockerfile-macros.j2" import install_debian_packages, install_python_wheels, copy_files %}
-FROM docker-config-engine-bullseye-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}}
+FROM docker-swss-layer-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}}
 
 ARG docker_container_name
 
diff --git a/rules/docker-iccpd.mk b/rules/docker-iccpd.mk
index 3b94dec42..39be9f5a5 100644
--- a/rules/docker-iccpd.mk
+++ b/rules/docker-iccpd.mk
@@ -4,11 +4,11 @@ DOCKER_ICCPD_STEM = docker-iccpd
 DOCKER_ICCPD = $(DOCKER_ICCPD_STEM).gz
 DOCKER_ICCPD_DBG = $(DOCKER_ICCPD_STEM)-$(DBG_IMAGE_MARK).gz
 $(DOCKER_ICCPD)_PATH = $(DOCKERS_PATH)/$(DOCKER_ICCPD_STEM)
-$(DOCKER_ICCPD)_DEPENDS += $(SWSS) $(ICCPD)
-$(DOCKER_ICCPD)_DBG_DEPENDS = $($(DOCKER_CONFIG_ENGINE_BULLSEYE)_DBG_DEPENDS)
-$(DOCKER_ICCPD)_DBG_DEPENDS += $(SWSS_DBG) $(LIBSWSSCOMMON_DBG) $(ICCPD_DBG)
-$(DOCKER_ICCPD)_DBG_IMAGE_PACKAGES = $($(DOCKER_CONFIG_ENGINE_BULLSEYE)_DBG_IMAGE_PACKAGES)
-$(DOCKER_ICCPD)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE_BULLSEYE)
+$(DOCKER_ICCPD)_DEPENDS += $(ICCPD)
+$(DOCKER_ICCPD)_DBG_DEPENDS = $($(DOCKER_SWSS_LAYER_BOOKWORM)_DBG_DEPENDS)
+$(DOCKER_ICCPD)_DBG_DEPENDS += $(ICCPD_DBG)
+$(DOCKER_ICCPD)_DBG_IMAGE_PACKAGES = $($(DOCKER_SWSS_LAYER_BOOKWORM)_DBG_IMAGE_PACKAGES)
+$(DOCKER_ICCPD)_LOAD_DOCKERS += $(DOCKER_SWSS_LAYER_BOOKWORM)
 
 $(DOCKER_ICCPD)_VERSION = 1.0.0
 $(DOCKER_ICCPD)_ICCPD = iccpd
@@ -27,5 +27,5 @@ $(DOCKER_ICCPD)_RUN_OPT += -v /etc/timezone:/etc/timezone:ro
 
 $(DOCKER_ICCPD)_BASE_IMAGE_FILES += mclagdctl:/usr/bin/mclagdctl
 
-SONIC_BULLSEYE_DOCKERS += $(DOCKER_ICCPD)
-SONIC_BULLSEYE_DBG_DOCKERS += $(DOCKER_ICCPD_DBG)
+SONIC_BOOKWORM_DOCKERS += $(DOCKER_ICCPD)
+SONIC_BOOKWORM_DBG_DOCKERS += $(DOCKER_ICCPD_DBG)

From 65b07cefb44c0f365acee33a829f14cf04b7de1a Mon Sep 17 00:00:00 2001
From: Julian Chang <puffc@users.noreply.github.com>
Date: Tue, 30 Apr 2024 05:47:50 +0800
Subject: [PATCH 0502/1115] [platform/supermicro] Fix compiling error in the
 kernel module of T7132. (#17755)

Signed-off-by: Julian Chang - TW (HW3) <julianc@supermicro.com.tw>
---
 .../sse-t7132s/modules/t7132s.c                                  | 1 -
 1 file changed, 1 deletion(-)

diff --git a/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/modules/t7132s.c b/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/modules/t7132s.c
index 2bc83f5b3..c1fc33d32 100755
--- a/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/modules/t7132s.c
+++ b/platform/innovium/sonic-platform-modules-supermicro/sse-t7132s/modules/t7132s.c
@@ -1702,5 +1702,4 @@ module_exit(t7132s_exit);
 
 MODULE_DEVICE_TABLE(pci, t7132s_pci_tbl);
 MODULE_DESCRIPTION("SuperMicro T7132S CPLD Module");
-MODULE_SUPPORTED_DEVICE("T7132S");
 MODULE_LICENSE("GPL");

From 7172d856158693988b4586f8a6f84222fb172c2f Mon Sep 17 00:00:00 2001
From: Oleksandr Ivantsiv <oivantsiv@nvidia.com>
Date: Tue, 30 Apr 2024 08:30:12 -0700
Subject: [PATCH 0503/1115] [Nvidia] [DPU] Update SAI to SAIBuild0.0.30.0, SDK
 to v24.4-RC2 (#18769)

- Why I did it
Update SAI to SAIBuild0.0.30.0, SDK to v24.4-RC2.

- How I did it
Align SDK compilation makefiles to be compatible with the latest version.

- How to verify it
Build sonic-nvidia-bluefield.bin image.
---
 .../pinctrl-mlxbf3/pinctrl-mlxbf3.c.patch     | 13 ++++++
 platform/nvidia-bluefield/recipes/dpu-sai.mk  |  2 +-
 platform/nvidia-bluefield/recipes/sdk.dep     | 17 --------
 platform/nvidia-bluefield/recipes/sdk.mk      | 40 +++----------------
 ...ove-meson-from-connectx-dependencies.patch | 28 +++++++++++++
 .../nvidia-bluefield/sdk-src/doca/Makefile    |  5 ++-
 .../0001-Remove-meson-from-dependencies.patch | 24 +++++++++++
 ...w-warning-during-package-compilation.patch | 32 +++++++++++++++
 .../0001-Install-LD-configuration.patch       | 30 ++++++++++++++
 .../0001-Remove-meson-from-dependencies.patch | 24 +++++++++++
 .../sdk-src/ofed/templates/control.j2         | 23 +++++++++++
 .../sdk-src/ofed/templates/postinst.j2        | 17 ++++++++
 .../sdk-src/ofed/templates/postrm.j2          | 17 ++++++++
 .../rdma/disable-ibverb-dependencies.patch    | 22 ++++++++++
 14 files changed, 240 insertions(+), 54 deletions(-)
 create mode 100644 platform/nvidia-bluefield/pinctrl-mlxbf3/pinctrl-mlxbf3.c.patch
 create mode 100644 platform/nvidia-bluefield/sdk-src/doca/0001-Remove-meson-from-connectx-dependencies.patch
 create mode 100644 platform/nvidia-bluefield/sdk-src/dpdk/0001-Remove-meson-from-dependencies.patch
 create mode 100644 platform/nvidia-bluefield/sdk-src/flexio/0001-Allow-warning-during-package-compilation.patch
 create mode 100644 platform/nvidia-bluefield/sdk-src/flexio/0001-Install-LD-configuration.patch
 create mode 100644 platform/nvidia-bluefield/sdk-src/flexio/0001-Remove-meson-from-dependencies.patch
 create mode 100644 platform/nvidia-bluefield/sdk-src/ofed/templates/control.j2
 create mode 100644 platform/nvidia-bluefield/sdk-src/ofed/templates/postinst.j2
 create mode 100644 platform/nvidia-bluefield/sdk-src/ofed/templates/postrm.j2
 create mode 100644 platform/nvidia-bluefield/sdk-src/rdma/disable-ibverb-dependencies.patch

diff --git a/platform/nvidia-bluefield/pinctrl-mlxbf3/pinctrl-mlxbf3.c.patch b/platform/nvidia-bluefield/pinctrl-mlxbf3/pinctrl-mlxbf3.c.patch
new file mode 100644
index 000000000..c78afc4b2
--- /dev/null
+++ b/platform/nvidia-bluefield/pinctrl-mlxbf3/pinctrl-mlxbf3.c.patch
@@ -0,0 +1,13 @@
+diff --git a/pinctrl-mlxbf3.c b/pinctrl-mlxbf3.c
+index 8371d83..d3746f6 100644
+--- a/pinctrl-mlxbf3.c
++++ b/pinctrl-mlxbf3.c
+@@ -18,7 +18,7 @@
+ 
+ #define DRV_VERSION "1.0"
+ 
+-#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0)
++#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 0, 0)
+ struct pinfunction {
+ 	const char *name;
+ 	const char * const *groups;
diff --git a/platform/nvidia-bluefield/recipes/dpu-sai.mk b/platform/nvidia-bluefield/recipes/dpu-sai.mk
index 40b3f6e50..6cac410ec 100644
--- a/platform/nvidia-bluefield/recipes/dpu-sai.mk
+++ b/platform/nvidia-bluefield/recipes/dpu-sai.mk
@@ -15,7 +15,7 @@
 # limitations under the License.
 #
 
-DPU_SAI_VERSION = SAIBuild0.0.29.0
+DPU_SAI_VERSION = SAIBuild0.0.30.0
 
 # Place here URL where SAI sources exist
 DPU_SAI_SOURCE_BASE_URL=
diff --git a/platform/nvidia-bluefield/recipes/sdk.dep b/platform/nvidia-bluefield/recipes/sdk.dep
index ced96a512..7e32ba119 100644
--- a/platform/nvidia-bluefield/recipes/sdk.dep
+++ b/platform/nvidia-bluefield/recipes/sdk.dep
@@ -112,14 +112,6 @@ $(DPDK_DEV)_CACHE_MODE := GIT_CONTENT_SHA
 $(DPDK_DEV)_DEP_FLAGS := $(SDK_COMMON_FLAGS_LIST)
 $(DPDK_DEV)_DEP_FILES := $(DEP_FILES)
 
-# Collectx CLXAPI
-
-FLAGS := $($(COLLECTX_CLXAPI)_URL)
-DEP_FILES := $(SDK_COMMON_FILES_LIST)
-
-$(COLLECTX_CLXAPI)_CACHE_MODE := GIT_CONTENT_SHA
-$(COLLECTX_CLXAPI)_DEP_FLAGS := $(SONIC_COMMON_FLAGS_LIST) $(FLAGS)
-$(COLLECTX_CLXAPI)_DEP_FILES := $(DEP_FILES)
 
 # RXP compiler
 
@@ -135,15 +127,6 @@ $(LIBRXPCOMPILER_DEV)_CACHE_MODE := GIT_CONTENT_SHA
 $(LIBRXPCOMPILER_DEV)_DEP_FLAGS := $(SDK_COMMON_FLAGS_LIST)
 $(LIBRXPCOMPILER_DEV)_DEP_FILES := $(DEP_FILES)
 
-# UCX
-
-SPATH := $($(UCX)_SRC_PATH)
-DEP_FILES := $(SDK_COMMON_FILES_LIST)
-DEP_FILES += $(shell git ls-files -- $(SPATH))
-
-$(UCX)_CACHE_MODE := GIT_CONTENT_SHA
-$(UCX)_DEP_FLAGS := $(SDK_COMMON_FLAGS_LIST)
-$(UCX)_DEP_FILES := $(DEP_FILES)
 
 # GRPC
 
diff --git a/platform/nvidia-bluefield/recipes/sdk.mk b/platform/nvidia-bluefield/recipes/sdk.mk
index d2a35a30f..0e0a048ae 100644
--- a/platform/nvidia-bluefield/recipes/sdk.mk
+++ b/platform/nvidia-bluefield/recipes/sdk.mk
@@ -19,7 +19,7 @@ SDK_BASE_PATH = $(PLATFORM_PATH)/sdk-src/sonic-bluefield-packages/bin
 
 # Place here URL where SDK sources exist
 SDK_SOURCE_BASE_URL =
-SDK_VERSION = 24.1-RC3
+SDK_VERSION = 24.4-RC2
 
 SDK_COLLECTX_URL = https://linux.mellanox.com/public/repo/doca/1.5.2/debian12/aarch64/
 
@@ -213,20 +213,6 @@ export DPDK_DERIVED_DEBS
 SDK_DEBS += $(DPDK) $(DPDK_DERIVED_DEBS)
 SDK_SRC_TARGETS += $(DPDK)
 
-# Collectx
-
-COLLECTX_CLXAPI = collectx_1.14.3-9642347-debian12.1-aarch64-clxapi.deb
-$(COLLECTX_CLXAPI)_URL = $(SDK_COLLECTX_URL)/collectx_1.14.3-9642347-debian12.1-aarch64-clxapi.deb
-$(COLLECTX_CLXAPI)_RDEPENDS = $(IB_UMAD)
-
-COLLECTX_CLXAPI_DEV = collectx_1.14.3-9642347-debian12.1-aarch64-clxapidev.deb
-$(COLLECTX_CLXAPI_DEV)_URL = $(SDK_COLLECTX_URL)/collectx_1.14.3-9642347-debian12.1-aarch64-clxapidev.deb
-$(COLLECTX_CLXAPI_DEV)_DEPENDS = $(COLLECTX_CLXAPI)
-$(COLLECTX_CLXAPI_DEV)_RDEPENDS = $(IB_UMAD)
-
-SDK_DEBS += $(COLLECTX_CLXAPI) $(COLLECTX_CLXAPI_DEV)
-SDK_ONLINE_TARGETS += $(COLLECTX_CLXAPI) $(COLLECTX_CLXAPI_DEV)
-
 # RXP compiler and derived packages
 
 RXPCOMPILER_VER = $(call get_sdk_package_version_full,"rxp-tools")
@@ -245,20 +231,6 @@ export RXPCOMPILER_DERIVED_DEBS
 SDK_DEBS += $(RXPCOMPILER) $(RXPCOMPILER_DERIVED_DEBS)
 SDK_SRC_TARGETS += $(RXPCOMPILER)
 
-# UCX and derived packages
-
-UCX_VER = $(call get_sdk_package_version_full,"ucx")
-
-UCX = ucx_$(UCX_VER)_arm64.deb
-$(UCX)_DEPENDS = $(IB_VERBS_PROV) $(IB_VERBS) $(IB_VERBS_DEV) $(RDMACM) $(RDMACM_DEV)
-$(UCX)_RDEPENDS = $(IB_VERBS_PROV) $(IB_VERBS)
-$(UCX)_SRC_PATH = $(PLATFORM_PATH)/sdk-src/ucx
-
-export UCX_VER UCX
-
-SDK_DEBS += $(UCX)
-SDK_SRC_TARGETS += $(UCX)
-
 # GRPC and derived packages
 
 LIBGRPC_VER = $(call get_sdk_package_version_full,"grpc")
@@ -282,12 +254,12 @@ SDK_SRC_TARGETS += $(LIBGRPC_DEV)
 DOCA_VERSION = $(call get_sdk_package_version_full,"doca")
 DOCA_DEB_VERSION = $(DOCA_VERSION)-1
 
-DOCA_LIBS = doca-libs_${DOCA_DEB_VERSION}_${CONFIGURED_ARCH}.deb
+DOCA_LIBS = doca-cx-libs_${DOCA_DEB_VERSION}_${CONFIGURED_ARCH}.deb
 $(DOCA_LIBS)_SRC_PATH = $(PLATFORM_PATH)/sdk-src/doca
-$(DOCA_LIBS)_RDEPENDS = $(DPDK) $(COLLECTX_CLXAPI) $(RXPCOMPILER) $(LIBRXPCOMPILER_DEV) $(UCX) $(LIBGRPC_DEV) $(FLEXIO)
-$(DOCA_LIBS)_DEPENDS = $(COLLECTX_CLXAPI) $(COLLECTX_CLXAPI_DEV) $(RXPCOMPILER) $(LIBRXPCOMPILER_DEV) $(UCX) $(DPDK_DEV) $(LIBGRPC_DEV) $(FLEXIO)
-DOCA_LIBS_DEV = libdoca-libs-dev_${DOCA_DEB_VERSION}_${CONFIGURED_ARCH}.deb
-DOCA_LIBS_DBG = doca-libs-dbgsym_${DOCA_DEB_VERSION}_${CONFIGURED_ARCH}.deb
+$(DOCA_LIBS)_RDEPENDS = $(DPDK) $(RXPCOMPILER) $(LIBRXPCOMPILER_DEV) $(LIBGRPC_DEV) $(FLEXIO)
+$(DOCA_LIBS)_DEPENDS = $(RXPCOMPILER) $(LIBRXPCOMPILER_DEV) $(DPDK_DEV) $(LIBGRPC_DEV) $(FLEXIO)
+DOCA_LIBS_DEV = libdoca-cx-libs-dev_${DOCA_DEB_VERSION}_${CONFIGURED_ARCH}.deb
+DOCA_LIBS_DBG = doca-cx-libs-dbgsym_${DOCA_DEB_VERSION}_${CONFIGURED_ARCH}.deb
 
 $(eval $(call add_derived_package,$(DOCA_LIBS),$(DOCA_LIBS_DEV)))
 $(eval $(call add_derived_package,$(DOCA_LIBS),$(DOCA_LIBS_DBG)))
diff --git a/platform/nvidia-bluefield/sdk-src/doca/0001-Remove-meson-from-connectx-dependencies.patch b/platform/nvidia-bluefield/sdk-src/doca/0001-Remove-meson-from-connectx-dependencies.patch
new file mode 100644
index 000000000..4823ce1ae
--- /dev/null
+++ b/platform/nvidia-bluefield/sdk-src/doca/0001-Remove-meson-from-connectx-dependencies.patch
@@ -0,0 +1,28 @@
+diff --git a/configs/profiles/connectx/debian/control b/configs/profiles/connectx/debian/control
+index 62f9403..fea0155 100644
+--- a/configs/profiles/connectx/debian/control
++++ b/configs/profiles/connectx/debian/control
+@@ -4,7 +4,6 @@ Maintainer: <networking-support@nvidia.com>
+ Build-Depends: debhelper (>= 10~),
+ 	       gcc,
+ 	       g++,
+-	       meson,
+ 	       pkg-config,
+ 	       libibverbs-dev,
+ 	       mlnx-dpdk-dev,
+@@ -55,7 +54,6 @@ Architecture: amd64 arm64 armhf i386 ppc64el
+ Depends: ${misc:Depends},
+ 	 libdoca-cx-libs-dev,
+ 	 gcc,
+-	 meson,
+ 	 pkg-config,
+ 	 mlnx-dpdk-dev,
+ 	 libjson-c-dev,
+@@ -71,7 +69,6 @@ Architecture: amd64 arm64 armhf i386 ppc64el
+ Depends: ${misc:Depends},
+ 	 libdoca-cx-libs-dev,
+ 	 gcc,
+-	 meson,
+ 	 pkg-config,
+ 	 mlnx-dpdk-dev,
+ 	 libjson-c-dev
diff --git a/platform/nvidia-bluefield/sdk-src/doca/Makefile b/platform/nvidia-bluefield/sdk-src/doca/Makefile
index e3bc80c06..47d9b00d9 100644
--- a/platform/nvidia-bluefield/sdk-src/doca/Makefile
+++ b/platform/nvidia-bluefield/sdk-src/doca/Makefile
@@ -36,12 +36,13 @@ $(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% :
 	find . -type f -exec touch {} +
 
 	patch -p1 < ../0001-Allow-compilation-with-warnings.patch
-	patch -p1 < ../0001-Remove-meson-from-dependencies.patch
+	patch -p1 < ../0001-Remove-meson-from-connectx-dependencies.patch
+
 	source /etc/profile.d/libgrpc.sh
 	source /etc/profile.d/mlnx-dpdk-aarch64-linux-gnu.sh
 
 	# Build the Debs
-	PATH=/opt/mellanox/grpc/bin:/usr/bin/:$(PATH) dpkg-buildpackage -us -uc -b -j$(SONIC_CONFIG_MAKE_JOBS) --admindir $(SONIC_DPKG_ADMINDIR)
+	PATH=/opt/mellanox/grpc/bin:/usr/bin/:$(PATH) ./devtools/doca_package_build.sh connectx
 
 	popd
 	mv $(DERIVED_TARGETS) $* $(DEST)/
diff --git a/platform/nvidia-bluefield/sdk-src/dpdk/0001-Remove-meson-from-dependencies.patch b/platform/nvidia-bluefield/sdk-src/dpdk/0001-Remove-meson-from-dependencies.patch
new file mode 100644
index 000000000..c1f663de9
--- /dev/null
+++ b/platform/nvidia-bluefield/sdk-src/dpdk/0001-Remove-meson-from-dependencies.patch
@@ -0,0 +1,24 @@
+From 178c90074d62fc6d8dfcef500cde1de8b4928eee Mon Sep 17 00:00:00 2001
+From: Oleksandr Ivantsiv <oivantsiv@nvidia.com>
+Date: Fri, 18 Nov 2022 20:09:52 +0200
+Subject: [PATCH] Remove meson from dependencies.
+
+---
+ debian/control | 1 -
+ 1 file changed, 1 deletion(-)
+
+diff --git a/debian/control b/debian/control
+index a737765..b99b3e9 100644
+--- a/debian/control
++++ b/debian/control
+@@ -21,7 +21,6 @@ Build-Depends: debhelper (>= 10.3~),
+                linux-headers-arm64 [arm64] | linux-headers-generic [arm64],
+                linux-headers-armmp [armhf] | linux-headers-generic [armhf],
+                linux-headers-powerpc64le [ppc64el] | linux-headers-generic [ppc64el],
+-               meson (>= 0.41~),
+                pkg-config,
+                python3,
+                python3-sphinx <!nodoc>,
+-- 
+2.25.1
+
diff --git a/platform/nvidia-bluefield/sdk-src/flexio/0001-Allow-warning-during-package-compilation.patch b/platform/nvidia-bluefield/sdk-src/flexio/0001-Allow-warning-during-package-compilation.patch
new file mode 100644
index 000000000..99b4b710d
--- /dev/null
+++ b/platform/nvidia-bluefield/sdk-src/flexio/0001-Allow-warning-during-package-compilation.patch
@@ -0,0 +1,32 @@
+From 6ce6a644e561f22021d031bc99f7b54a8d1142ad Mon Sep 17 00:00:00 2001
+From: Oleksandr Ivantsiv <oivantsiv@nvidia.com>
+Date: Mon, 10 Oct 2022 15:46:31 +0300
+Subject: [PATCH] Allow warning during package compilation.
+
+---
+ debian/rules | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/debian/rules b/debian/rules
+index 01e76c4..f4460af 100755
+--- a/debian/rules
++++ b/debian/rules
+@@ -8,13 +8,13 @@ export DEB_BUILD_OPTIONS=nostrip
+ 	dh $@  
+ 
+ override_dh_auto_build:
+-	./build.sh
++	./build.sh --allow_warnings
+ 	./scripts/cp_pkg_content.sh deb ./debian/tmp
+ 
+ clean:
+ 	rm -f ./debian/debhelper-build-stamp ./debian/files ./debian/flexio.debhelper.log
+ 	rm -rf ./debian/flexio.substvars ./debian/tmp ./debian/flexio
+-	./build.sh --clean
++	./build.sh --clean --allow_warnings
+ 
+ override_dh_prep:
+ 	@ echo DH PREP
+-- 
+2.25.1
+
diff --git a/platform/nvidia-bluefield/sdk-src/flexio/0001-Install-LD-configuration.patch b/platform/nvidia-bluefield/sdk-src/flexio/0001-Install-LD-configuration.patch
new file mode 100644
index 000000000..abb61369b
--- /dev/null
+++ b/platform/nvidia-bluefield/sdk-src/flexio/0001-Install-LD-configuration.patch
@@ -0,0 +1,30 @@
+From a009c7ed8fb199aaf456d91471937d1cc80871bc Mon Sep 17 00:00:00 2001
+From: Oleksandr Ivantsiv <oivantsiv@nvidia.com>
+Date: Mon, 17 Oct 2022 17:02:43 +0300
+Subject: [PATCH] Install LD configuration.
+
+---
+ debian/flexio-aarch64-linux-gnu.conf | 1 +
+ debian/flexio.install                | 3 ++-
+ 2 files changed, 3 insertions(+), 1 deletion(-)
+ create mode 100644 debian/flexio-aarch64-linux-gnu.conf
+
+diff --git a/debian/flexio-aarch64-linux-gnu.conf b/debian/flexio-aarch64-linux-gnu.conf
+new file mode 100644
+index 0000000..abfff31
+--- /dev/null
++++ b/debian/flexio-aarch64-linux-gnu.conf
+@@ -0,0 +1 @@
++/opt/mellanox/flexio/lib/
+diff --git a/debian/flexio.install b/debian/flexio.install
+index c54c604..93238ad 100644
+--- a/debian/flexio.install
++++ b/debian/flexio.install
+@@ -1 +1,2 @@
+-debian/tmp/* /
+\ No newline at end of file
++debian/tmp/* /
++debian/flexio-aarch64-linux-gnu.conf /etc/ld.so.conf.d/
+-- 
+2.25.1
+
diff --git a/platform/nvidia-bluefield/sdk-src/flexio/0001-Remove-meson-from-dependencies.patch b/platform/nvidia-bluefield/sdk-src/flexio/0001-Remove-meson-from-dependencies.patch
new file mode 100644
index 000000000..d191e446d
--- /dev/null
+++ b/platform/nvidia-bluefield/sdk-src/flexio/0001-Remove-meson-from-dependencies.patch
@@ -0,0 +1,24 @@
+From d2168682c00d3738d458a4f2bce23595e0e0729c Mon Sep 17 00:00:00 2001
+From: Oleksandr Ivantsiv <oivantsiv@nvidia.com>
+Date: Fri, 18 Nov 2022 17:29:38 +0200
+Subject: [PATCH] Remove meson from dependencies.
+
+---
+ debian/control | 1 -
+ 1 file changed, 1 deletion(-)
+
+diff --git a/debian/control b/debian/control
+index b8a9ca1..d2367e3 100644
+--- a/debian/control
++++ b/debian/control
+@@ -6,7 +6,6 @@ Build-Depends: autotools-dev,
+ 	debhelper (>= 10), 
+ 	clang, 
+ 	lld, 
+-	meson, 
+ 	patchelf
+ #Standards-Version: 4.1.2
+ Homepage: www.nvidia.com
+-- 
+2.25.1
+
diff --git a/platform/nvidia-bluefield/sdk-src/ofed/templates/control.j2 b/platform/nvidia-bluefield/sdk-src/ofed/templates/control.j2
new file mode 100644
index 000000000..029c41495
--- /dev/null
+++ b/platform/nvidia-bluefield/sdk-src/ofed/templates/control.j2
@@ -0,0 +1,23 @@
+{#-
+    Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+    Apache-2.0
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+    http://www.apache.org/licenses/LICENSE-2.0
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+-#}
+Package: mlnx-ofed-kernel-modules-{{kversion}}
+Source: mlnx-ofed-kernel-modules-bin
+Version: {{mft_version}}
+Architecture: arm64
+Maintainer: Vivek Reddy <vkarri@nvidia.com>
+Provides: mlnx-ofed-kernel-modules
+Depends: linux-image-{{ kversion }}-unsigned
+Section: misc
+Priority: optional
+Description: mlnx-ofed-kernel-modules binary drivers for linux-image-{{kversion}} Kernel
diff --git a/platform/nvidia-bluefield/sdk-src/ofed/templates/postinst.j2 b/platform/nvidia-bluefield/sdk-src/ofed/templates/postinst.j2
new file mode 100644
index 000000000..a94c53f4e
--- /dev/null
+++ b/platform/nvidia-bluefield/sdk-src/ofed/templates/postinst.j2
@@ -0,0 +1,17 @@
+{#-
+    Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+    Apache-2.0
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+    http://www.apache.org/licenses/LICENSE-2.0
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+-#}
+
+#!/bin/sh
+set -e
+depmod -a {{kversion}}
diff --git a/platform/nvidia-bluefield/sdk-src/ofed/templates/postrm.j2 b/platform/nvidia-bluefield/sdk-src/ofed/templates/postrm.j2
new file mode 100644
index 000000000..a94c53f4e
--- /dev/null
+++ b/platform/nvidia-bluefield/sdk-src/ofed/templates/postrm.j2
@@ -0,0 +1,17 @@
+{#-
+    Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+    Apache-2.0
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+    http://www.apache.org/licenses/LICENSE-2.0
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+-#}
+
+#!/bin/sh
+set -e
+depmod -a {{kversion}}
diff --git a/platform/nvidia-bluefield/sdk-src/rdma/disable-ibverb-dependencies.patch b/platform/nvidia-bluefield/sdk-src/rdma/disable-ibverb-dependencies.patch
new file mode 100644
index 000000000..b551b9e48
--- /dev/null
+++ b/platform/nvidia-bluefield/sdk-src/rdma/disable-ibverb-dependencies.patch
@@ -0,0 +1,22 @@
+diff --git a/debian/control b/debian/control
+index 0ef86f4..3e8dfb1 100644
+--- a/debian/control
++++ b/debian/control
+@@ -65,7 +65,7 @@ Description: InfiniBand Communication Manager Assistant (ACM)
+ Package: ibverbs-providers
+ Architecture: linux-any
+ Multi-Arch: same
+-Depends: ${misc:Depends}, ${shlibs:Depends}
++#Depends: ${misc:Depends}, ${shlibs:Depends}
+ Provides: libefa1, libipathverbs1, libmana1, libmlx5-1, libmthca1
+ Replaces: libipathverbs1,
+           libmlx5-1,
+@@ -138,7 +138,7 @@ Section: libs
+ Pre-Depends: ${misc:Pre-Depends}
+ Depends: adduser, ${misc:Depends}, ${shlibs:Depends}
+ Recommends: ibverbs-providers
+-Breaks: ibverbs-providers (<< 34~)
++#Breaks: ibverbs-providers (<< 34~)
+ Description: Library for direct userspace use of RDMA (InfiniBand/iWARP)
+  libibverbs is a library that allows userspace processes to use RDMA
+  "verbs" as described in the InfiniBand Architecture Specification and

From d7ae4cb61270d5263d20ba13c8ef5762ecdb63a1 Mon Sep 17 00:00:00 2001
From: Oleksandr Ivantsiv <oivantsiv@nvidia.com>
Date: Tue, 30 Apr 2024 15:34:35 -0700
Subject: [PATCH 0504/1115] [nvidia-bluefield] Add support Nvidia BF-3 platform
 to swss and syncd containers (#18806)

- Add platform-specific extension to include NIC FW into the SONiC image.
---
 dockers/docker-orchagent/orchagent.sh           |  2 ++
 files/build_templates/sonic_debian_extension.j2 | 17 +++++++++++++++++
 files/scripts/syncd.sh                          |  6 ++++++
 3 files changed, 25 insertions(+)

diff --git a/dockers/docker-orchagent/orchagent.sh b/dockers/docker-orchagent/orchagent.sh
index 79434668d..1b2a1b88a 100755
--- a/dockers/docker-orchagent/orchagent.sh
+++ b/dockers/docker-orchagent/orchagent.sh
@@ -64,6 +64,8 @@ elif [ "$platform" == "mellanox" ]; then
     ORCHAGENT_ARGS+=""
 elif [ "$platform" == "innovium" ]; then
     ORCHAGENT_ARGS+="-m $MAC_ADDRESS"
+elif [ "$platform" == "nvidia-bluefield" ]; then
+    ORCHAGENT_ARGS+="-m $MAC_ADDRESS"
 elif [ "$platform" == "pensando" ]; then
     MAC_ADDRESS=$(ip link property add dev oob_mnic0 altname eth0; ip link show oob_mnic0 | grep ether | awk '{print $2}')
     ORCHAGENT_ARGS+="-m $MAC_ADDRESS"
diff --git a/files/build_templates/sonic_debian_extension.j2 b/files/build_templates/sonic_debian_extension.j2
index cd22584c9..77ecf9509 100644
--- a/files/build_templates/sonic_debian_extension.j2
+++ b/files/build_templates/sonic_debian_extension.j2
@@ -1040,6 +1040,23 @@ sudo LANG=C chroot $FILESYSTEM_ROOT systemctl enable nv-syncd-shared
 sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install minicom
 {% endif %}
 
+{% if sonic_asic_platform == "nvidia-bluefield" %}
+declare -rA FW_FILE_MAP=( \
+    [$BF3_FW_FILE]="fw-BF3.mfa" \
+)
+sudo mkdir -p $FILESYSTEM_ROOT/$PLATFORM_DIR/fw/dpu/
+sudo mkdir -p $FILESYSTEM_ROOT/etc/bluefield/
+for fw_file_name in ${!FW_FILE_MAP[@]}; do
+    sudo cp $files_path/$fw_file_name $FILESYSTEM_ROOT/$PLATFORM_DIR/fw/dpu/${FW_FILE_MAP[$fw_file_name]}
+    sudo ln -s /host/image-$SONIC_IMAGE_VERSION/$PLATFORM_DIR/fw/dpu/${FW_FILE_MAP[$fw_file_name]} $FILESYSTEM_ROOT/etc/bluefield/${FW_FILE_MAP[$fw_file_name]}
+done
+
+SONIC_PLATFORM_PY3_WHEEL_NAME=$(basename {{platform_api_py3_wheel_path}})
+sudo cp {{platform_api_py3_wheel_path}} $FILESYSTEM_ROOT/$SONIC_PLATFORM_PY3_WHEEL_NAME
+sudo https_proxy=$https_proxy LANG=C chroot $FILESYSTEM_ROOT pip3 install $SONIC_PLATFORM_PY3_WHEEL_NAME
+sudo rm -rf $FILESYSTEM_ROOT/$SONIC_PLATFORM_PY3_WHEEL_NAME
+{% endif %}
+
 {%- if SONIC_ROUTING_STACK == "frr" %}
 sudo mkdir $FILESYSTEM_ROOT/etc/sonic/frr
 sudo touch $FILESYSTEM_ROOT/etc/sonic/frr/frr.conf
diff --git a/files/scripts/syncd.sh b/files/scripts/syncd.sh
index e9c2cfd49..c6fbf008c 100755
--- a/files/scripts/syncd.sh
+++ b/files/scripts/syncd.sh
@@ -86,6 +86,10 @@ function startplatform() {
             /etc/init.d/xpnet.sh start
         fi
     fi
+
+    if [[ x"$sonic_asic_platform" == x"nvidia-bluefield" ]]; then
+        /usr/bin/bfnet.sh start
+    fi
 }
 
 function waitplatform() {
@@ -155,6 +159,8 @@ function stopplatform2() {
         elif [ x$sonic_asic_platform == x'cavium' ]; then
             /etc/init.d/xpnet.sh stop
             /etc/init.d/xpnet.sh start
+        elif [ x"$sonic_asic_platform" == x"nvidia-bluefield" ]; then
+            /usr/bin/bfnet.sh stop
         fi
     fi
 }

From 4bdccbdb88d6c5e6429156dda02f002eca3269ca Mon Sep 17 00:00:00 2001
From: Pavan Naregundi <92989231+pavannaregundi@users.noreply.github.com>
Date: Wed, 1 May 2024 04:54:12 +0530
Subject: [PATCH 0505/1115] [Marvell]: Upgrade syncd, syncd-rpc and saiserver
 to bookworm (#18740)

* [Marvell] syncd migration to bookworm

Signed-off-by: Pavan Naregundi <pnaregundi@marvell.com>

* Add docker-saiserver-mrvl

Signed-off-by: Pavan Naregundi <pnaregundi@marvell.com>

* [Marvell-armhf] Update SAI SDK version to 1.13.0-3

Signed-off-by: Pavan Naregundi <pnaregundi@marvell.com>

---------

Signed-off-by: Pavan Naregundi <pnaregundi@marvell.com>
---
 platform/marvell/docker-saiserver-mrvl.mk     |  8 ++--
 .../docker-saiserver-mrvl/Dockerfile.j2       | 35 +++++++++++++++++
 .../marvell/docker-saiserver-mrvl/start.sh    |  7 ++++
 .../docker-saiserver-mrvl/supervisord.conf    | 28 +++++++++++++
 platform/marvell/docker-syncd-mrvl-rpc.mk     |  5 ++-
 .../docker-syncd-mrvl-rpc/Dockerfile.j2       | 39 ++++++++++---------
 platform/marvell/docker-syncd-mrvl.mk         |  2 +-
 .../marvell/docker-syncd-mrvl/Dockerfile.j2   |  4 +-
 platform/marvell/libsaithrift-dev.mk          | 19 +++++----
 platform/marvell/rules.mk                     |  1 +
 platform/marvell/sai.mk                       |  2 +-
 11 files changed, 115 insertions(+), 35 deletions(-)
 create mode 100644 platform/marvell/docker-saiserver-mrvl/Dockerfile.j2
 create mode 100755 platform/marvell/docker-saiserver-mrvl/start.sh
 create mode 100644 platform/marvell/docker-saiserver-mrvl/supervisord.conf

diff --git a/platform/marvell/docker-saiserver-mrvl.mk b/platform/marvell/docker-saiserver-mrvl.mk
index 7e5c83ffc..c6bd3e2ca 100644
--- a/platform/marvell/docker-saiserver-mrvl.mk
+++ b/platform/marvell/docker-saiserver-mrvl.mk
@@ -1,13 +1,13 @@
 # docker image for mrvl saiserver
 
-DOCKER_SAISERVER_MRVL = docker-saiserver-mrvl.gz
+DOCKER_SAISERVER_MRVL = docker-saiserver$(SAITHRIFT_VER)-mrvl.gz
 $(DOCKER_SAISERVER_MRVL)_PATH = $(PLATFORM_PATH)/docker-saiserver-mrvl
 $(DOCKER_SAISERVER_MRVL)_DEPENDS += $(SAISERVER)
-$(DOCKER_SAISERVER_MRVL)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE_BULLSEYE)
+$(DOCKER_SAISERVER_MRVL)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE_BOOKWORM)
 SONIC_DOCKER_IMAGES += $(DOCKER_SAISERVER_MRVL)
-SONIC_BULLSEYE_DOCKERS += $(DOCKER_SAISERVER_MRVL)
+SONIC_BOOKWORM_DOCKERS += $(DOCKER_SAISERVER_MRVL)
 
-$(DOCKER_SAISERVER_MRVL)_CONTAINER_NAME = saiserver
+$(DOCKER_SAISERVER_MRVL)_CONTAINER_NAME = saiserver$(SAITHRIFT_VER)
 $(DOCKER_SAISERVER_MRVL)_RUN_OPT += --privileged -t
 $(DOCKER_SAISERVER_MRVL)_RUN_OPT += -v /host/machine.conf:/etc/machine.conf
 $(DOCKER_SAISERVER_MRVL)_RUN_OPT += -v /var/run/docker-saiserver:/var/run/sswsyncd
diff --git a/platform/marvell/docker-saiserver-mrvl/Dockerfile.j2 b/platform/marvell/docker-saiserver-mrvl/Dockerfile.j2
new file mode 100644
index 000000000..1760fb872
--- /dev/null
+++ b/platform/marvell/docker-saiserver-mrvl/Dockerfile.j2
@@ -0,0 +1,35 @@
+{% from "dockers/dockerfile-macros.j2" import install_debian_packages %}
+FROM docker-config-engine-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}}
+
+ARG docker_container_name
+
+## Make apt-get non-interactive
+ENV DEBIAN_FRONTEND=noninteractive
+
+RUN apt-get update              \
+ && apt-get -y install          \
+      libboost-atomic1.74.0     \
+      libqt5core5a              \
+      libqt5network5            \
+      gdb                       \
+      libthrift-0.17.0
+
+COPY \
+{% for deb in docker_saiserver_mrvl_debs.split(' ') -%}
+debs/{{ deb }}{{' '}}
+{%- endfor -%}
+debs/
+
+RUN dpkg_apt() { [ -f $1 ] && { dpkg -i $1 || apt-get -y install -f; } || return 1; } ; \
+{% for deb in docker_saiserver_mrvl_debs.split(' ') -%}
+dpkg_apt debs/{{ deb }}{{'; '}}
+{%- endfor %}
+
+COPY ["start.sh", "/usr/bin/"]
+COPY ["supervisord.conf", "/etc/supervisor/conf.d/"]
+
+## Clean up
+RUN apt-get clean -y; apt-get autoclean -y; apt-get autoremove -y
+RUN rm -rf /debs
+
+ENTRYPOINT ["/usr/local/bin/supervisord"]
diff --git a/platform/marvell/docker-saiserver-mrvl/start.sh b/platform/marvell/docker-saiserver-mrvl/start.sh
new file mode 100755
index 000000000..09cc0ddb5
--- /dev/null
+++ b/platform/marvell/docker-saiserver-mrvl/start.sh
@@ -0,0 +1,7 @@
+#!/usr/bin/env bash
+
+rm -f /var/run/rsyslogd.pid
+
+supervisorctl start rsyslogd
+
+supervisorctl start saiserver
diff --git a/platform/marvell/docker-saiserver-mrvl/supervisord.conf b/platform/marvell/docker-saiserver-mrvl/supervisord.conf
new file mode 100644
index 000000000..ccb107b3d
--- /dev/null
+++ b/platform/marvell/docker-saiserver-mrvl/supervisord.conf
@@ -0,0 +1,28 @@
+[supervisord]
+logfile_maxbytes=1MB
+logfile_backups=2
+nodaemon=true
+
+[program:start.sh]
+command=/usr/bin/start.sh
+priority=1
+autostart=true
+autorestart=false
+stdout_logfile=syslog
+stderr_logfile=syslog
+
+[program:rsyslogd]
+command=/usr/sbin/rsyslogd -n
+priority=2
+autostart=false
+autorestart=false
+stdout_logfile=syslog
+stderr_logfile=syslog
+
+[program:saiserver]
+command=/usr/sbin/saiserver -p /usr/share/sonic/hwsku/sai.profile -f /usr/share/sonic/hwsku/port_config.ini
+priority=3
+autostart=false
+autorestart=false
+stdout_logfile=syslog
+stderr_logfile=syslog
diff --git a/platform/marvell/docker-syncd-mrvl-rpc.mk b/platform/marvell/docker-syncd-mrvl-rpc.mk
index d642f4da4..bf4bb1036 100644
--- a/platform/marvell/docker-syncd-mrvl-rpc.mk
+++ b/platform/marvell/docker-syncd-mrvl-rpc.mk
@@ -2,7 +2,8 @@
 
 DOCKER_SYNCD_MRVL_RPC = docker-syncd-mrvl-rpc.gz
 $(DOCKER_SYNCD_MRVL_RPC)_PATH = $(PLATFORM_PATH)/docker-syncd-mrvl-rpc
-$(DOCKER_SYNCD_MRVL_RPC)_DEPENDS += $(SYNCD_RPC) $(LIBTHRIFT) $(PTF)
+$(DOCKER_SYNCD_MRVL_RPC)_DEPENDS += $(SYNCD_RPC)
+$(DOCKER_SYNCD_MRVL_RPC)_PYTHON_WHEELS += $(PTF_PY3)
 $(DOCKER_SYNCD_MRVL_RPC)_FILES += $(SUPERVISOR_PROC_EXIT_LISTENER_SCRIPT)
 ifeq ($(INSTALL_DEBUG_TOOLS), y)
 $(DOCKER_SYNCD_MRVL_RPC)_DEPENDS += $(SYNCD_RPC_DBG) \
@@ -25,4 +26,4 @@ $(DOCKER_SYNCD_MRVL_RPC)_RUN_OPT += -v /host/machine.conf:/etc/machine.conf
 $(DOCKER_SYNCD_MRVL_RPC)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro
 $(DOCKER_SYNCD_MRVL_RPC)_RUN_OPT += -v /host/warmboot:/var/warmboot
 
-SONIC_BULLSEYE_DOCKERS += $(DOCKER_SYNCD_MRVL_RPC)
+SONIC_BOOKWORM_DOCKERS += $(DOCKER_SYNCD_MRVL_RPC)
diff --git a/platform/marvell/docker-syncd-mrvl-rpc/Dockerfile.j2 b/platform/marvell/docker-syncd-mrvl-rpc/Dockerfile.j2
index 6bd7fb9c7..02d962d19 100644
--- a/platform/marvell/docker-syncd-mrvl-rpc/Dockerfile.j2
+++ b/platform/marvell/docker-syncd-mrvl-rpc/Dockerfile.j2
@@ -1,4 +1,5 @@
 FROM docker-syncd-mrvl-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}}
+{% from "dockers/dockerfile-macros.j2" import install_python_wheels, copy_files %}
 
 ## Make apt-get non-interactive
 ENV DEBIAN_FRONTEND=noninteractive
@@ -20,37 +21,39 @@ RUN apt-get update \
     build-essential     \
     libssl-dev          \
     libffi-dev          \
-    python-dev          \
+    python3-dev          \
     wget                \
-    cmake               \
     libqt5core5a        \
     libqt5network5      \
-    libboost-atomic1.74.0
+    libboost-atomic1.74.0 \
+    libthrift-0.17.0      \
+    libnanomsg5           \
+    libnanomsg-dev
 
 RUN dpkg_apt() { [ -f $1 ] && { dpkg -i $1 || apt-get -y install -f; } || return 1; } ; \
 {% for deb in docker_syncd_mrvl_rpc_debs.split(' ') -%}
 dpkg_apt debs/{{ deb }}{{'; '}}
 {%- endfor %}
 
-RUN wget https://github.com/nanomsg/nanomsg/archive/1.0.0.tar.gz \
- && tar xvfz 1.0.0.tar.gz \
- && cd nanomsg-1.0.0    \
- && mkdir -p build      \
- && cmake .             \
- && make install        \
- && ldconfig            \
- && cd ..               \
- && rm -fr nanomsg-1.0.0 \
- && rm -f 1.0.0.tar.gz  \
- && pip3 install cffi==1.7.0    \
- && pip3 install --upgrade cffi==1.7.0 \
+RUN pip3 install cffi    \
  && pip3 install nnpy    \
  && mkdir -p /opt       \
  && cd /opt             \
- && wget https://raw.githubusercontent.com/p4lang/ptf/master/ptf_nn/ptf_nn_agent.py \
- && apt-get clean -y; apt-get autoclean -y; apt-get autoremove -y \
- && rm -rf /root/deps
+ && wget https://raw.githubusercontent.com/p4lang/ptf/master/ptf_nn/ptf_nn_agent.py
 
 COPY ["ptf_nn_agent.conf", "/etc/supervisor/conf.d/"]
 
+{% if docker_syncd_mrvl_rpc_whls.strip() -%}
+# Copy locally-built Python wheel dependencies
+{{ copy_files("python-wheels/", docker_syncd_mrvl_rpc_whls.split(' '), "/python-wheels/") }}
+
+# Install locally-built Python wheel dependencies
+{{ install_python_wheels(docker_syncd_mrvl_rpc_whls.split(' ')) }}
+{% endif %}
+
+## Clean up
+RUN apt-get purge -y libyaml-dev python3-dev libffi-dev libssl-dev wget build-essential
+RUN apt-get clean -y; apt-get autoclean -y; apt-get autoremove -y
+RUN rm -rf /root/deps
+
 ENTRYPOINT ["/usr/local/bin/supervisord"]
diff --git a/platform/marvell/docker-syncd-mrvl.mk b/platform/marvell/docker-syncd-mrvl.mk
index 566de773b..d4c990cfe 100644
--- a/platform/marvell/docker-syncd-mrvl.mk
+++ b/platform/marvell/docker-syncd-mrvl.mk
@@ -1,7 +1,7 @@
 # docker image for mrvl syncd
 
 DOCKER_SYNCD_PLATFORM_CODE = mrvl
-include $(PLATFORM_PATH)/../template/docker-syncd-bullseye.mk
+include $(PLATFORM_PATH)/../template/docker-syncd-bookworm.mk
 
 $(DOCKER_SYNCD_BASE)_DEPENDS += $(SYNCD)
 $(DOCKER_SYNCD_BASE)_DEPENDS += $(MRVL_SAI)
diff --git a/platform/marvell/docker-syncd-mrvl/Dockerfile.j2 b/platform/marvell/docker-syncd-mrvl/Dockerfile.j2
index 84e3d5bde..a721a8642 100755
--- a/platform/marvell/docker-syncd-mrvl/Dockerfile.j2
+++ b/platform/marvell/docker-syncd-mrvl/Dockerfile.j2
@@ -1,5 +1,5 @@
 {% from "dockers/dockerfile-macros.j2" import install_debian_packages %}
-FROM docker-config-engine-bullseye-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}}
+FROM docker-config-engine-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}}
 
 ARG docker_container_name
 
@@ -19,7 +19,7 @@ RUN apt-get update \
     net-tools           \
     iputils-ping
 
-RUN apt-get -y install libpcap-dev libxml2-dev python-dev swig libsensors4-dev nfs-common
+RUN apt-get -y install libpcap-dev libxml2-dev python3-dev swig
 
 RUN dpkg -i \
 {% for deb in docker_syncd_mrvl_debs.split(' ') -%}
diff --git a/platform/marvell/libsaithrift-dev.mk b/platform/marvell/libsaithrift-dev.mk
index e1c3da156..eb13006f7 100644
--- a/platform/marvell/libsaithrift-dev.mk
+++ b/platform/marvell/libsaithrift-dev.mk
@@ -2,19 +2,24 @@
 
 SAI_VER = 0.9.4
 
-LIBSAITHRIFT_DEV = libsaithrift-dev_$(SAI_VER)_$(CONFIGURED_ARCH).deb
+LIBSAITHRIFT_DEV = libsaithrift$(SAITHRIFT_VER)-dev_$(SAI_VER)_$(CONFIGURED_ARCH).deb
 $(LIBSAITHRIFT_DEV)_SRC_PATH = $(SRC_PATH)/sonic-sairedis/SAI
-$(LIBSAITHRIFT_DEV)_DEPENDS += $(LIBTHRIFT) $(LIBTHRIFT_DEV) $(PYTHON_THRIFT) $(THRIFT_COMPILER) $(MRVL_FPA) $(MRVL_SAI)
-$(LIBSAITHRIFT_DEV)_RDEPENDS += $(LIBTHRIFT) $(MRVL_SAI)
+
+ifeq ($(SAITHRIFT_V2),y)
+$(LIBSAITHRIFT_DEV)_BUILD_ENV = SAITHRIFTV2=true SAITHRIFT_VER=v2
+endif
+
+$(LIBSAITHRIFT_DEV)_DEPENDS += $(MRVL_SAI) $(LIBSAIMETADATA) $(LIBSAIMETADATA_DEV)
+$(LIBSAITHRIFT_DEV)_RDEPENDS += $(MRVL_SAI) $(LIBSAIMETADATA)
 SONIC_DPKG_DEBS += $(LIBSAITHRIFT_DEV)
 
-PYTHON_SAITHRIFT = python-saithrift_$(SAI_VER)_$(CONFIGURED_ARCH).deb
+PYTHON_SAITHRIFT = python-saithrift$(SAITHRIFT_VER)_$(SAI_VER)_$(CONFIGURED_ARCH).deb
 $(eval $(call add_extra_package,$(LIBSAITHRIFT_DEV),$(PYTHON_SAITHRIFT)))
 
-SAISERVER = saiserver_$(SAI_VER)_$(CONFIGURED_ARCH).deb
-$(SAISERVER)_RDEPENDS += $(LIBTHRIFT) $(MRVL_SAI)
+SAISERVER = saiserver$(SAITHRIFT_VER)_$(SAI_VER)_$(CONFIGURED_ARCH).deb
+$(SAISERVER)_RDEPENDS += $(LIBSAITHRIFT_DEV)
 $(eval $(call add_extra_package,$(LIBSAITHRIFT_DEV),$(SAISERVER)))
 
-SAISERVER_DBG = saiserver-dbg_$(SAI_VER)_$(CONFIGURED_ARCH).deb
+SAISERVER_DBG = saiserver$(SAITHRIFT_VER)-dbg_$(SAI_VER)_$(CONFIGURED_ARCH).deb
 $(SAISERVER_DBG)_RDEPENDS += $(SAISERVER)
 $(eval $(call add_extra_package,$(LIBSAITHRIFT_DEV),$(SAISERVER_DBG)))
diff --git a/platform/marvell/rules.mk b/platform/marvell/rules.mk
index 0b78cd088..825d8d331 100644
--- a/platform/marvell/rules.mk
+++ b/platform/marvell/rules.mk
@@ -19,6 +19,7 @@ $(SYNCD)_DEPENDS += $(MRVL_SAI)
 $(SYNCD)_UNINSTALLS += $(MRVL_SAI)
 
 ifeq ($(ENABLE_SYNCD_RPC),y)
+$(SYNCD)_DEPENDS := $(filter-out $(LIBTHRIFT_DEV),$($(SYNCD)_DEPENDS))
 $(SYNCD)_DEPENDS += $(LIBSAITHRIFT_DEV)
 endif
 
diff --git a/platform/marvell/sai.mk b/platform/marvell/sai.mk
index 4fd89bf6c..3a50da904 100644
--- a/platform/marvell/sai.mk
+++ b/platform/marvell/sai.mk
@@ -4,7 +4,7 @@ BRANCH = master
 ifeq ($(CONFIGURED_ARCH),arm64)
 MRVL_SAI_VERSION = 1.13.0-1
 else ifeq ($(CONFIGURED_ARCH),armhf)
-MRVL_SAI_VERSION = 1.13.0-2
+MRVL_SAI_VERSION = 1.13.0-3
 else
 MRVL_SAI_VERSION = 1.13.0-1
 endif

From 24a40c5c8a54a961990328e3bdec7291c56224f2 Mon Sep 17 00:00:00 2001
From: Akhilesh Samineni <47657796+AkhileshSamineni@users.noreply.github.com>
Date: Wed, 1 May 2024 04:54:28 +0530
Subject: [PATCH 0506/1115] Upgrade the NAT docker to bookworm (#18799)

* Upgrade the NAT docker to bookworm

Signed-off-by: Akhilesh Samineni <akhilesh.samineni@broadcom.com>

* Corrected the iptables Makefile

Signed-off-by: Akhilesh Samineni <akhilesh.samineni@broadcom.com>

* Updated the fullcone patch for iptables 1.8.9 version

Signed-off-by: Akhilesh Samineni <akhilesh.samineni@broadcom.com>

---------

Signed-off-by: Akhilesh Samineni <akhilesh.samineni@broadcom.com>
---
 dockers/docker-nat/Dockerfile.j2              |   2 +-
 rules/docker-nat.mk                           |  10 +-
 rules/iptables.mk                             |   4 +-
 src/iptables/Makefile                         |   2 +-
 ...ng-fullcone-option-for-SNAT-and-DNAT.patch | 346 ++++--------------
 5 files changed, 86 insertions(+), 278 deletions(-)

diff --git a/dockers/docker-nat/Dockerfile.j2 b/dockers/docker-nat/Dockerfile.j2
index 23adcf3af..821c194a4 100644
--- a/dockers/docker-nat/Dockerfile.j2
+++ b/dockers/docker-nat/Dockerfile.j2
@@ -1,5 +1,5 @@
 {% from "dockers/dockerfile-macros.j2" import install_debian_packages, copy_files %}
-FROM docker-swss-layer-bullseye-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}}
+FROM docker-swss-layer-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}}
 
 ARG docker_container_name
 
diff --git a/rules/docker-nat.mk b/rules/docker-nat.mk
index 0298ace83..d15c43622 100644
--- a/rules/docker-nat.mk
+++ b/rules/docker-nat.mk
@@ -7,11 +7,11 @@ DOCKER_NAT_DBG = $(DOCKER_NAT_STEM)-$(DBG_IMAGE_MARK).gz
 $(DOCKER_NAT)_PATH = $(DOCKERS_PATH)/$(DOCKER_NAT_STEM)
 
 $(DOCKER_NAT)_DEPENDS += $(SWSS) $(IPTABLESIP4TC) $(IPTABLESIP6TC) $(IPTABLESIPTC) $(IPXTABLES12) $(IPTABLES)
-$(DOCKER_NAT)_DBG_DEPENDS = $($(DOCKER_SWSS_LAYER_BULLSEYE)_DBG_DEPENDS)
+$(DOCKER_NAT)_DBG_DEPENDS = $($(DOCKER_SWSS_LAYER_BOOKWORM)_DBG_DEPENDS)
 $(DOCKER_NAT)_DBG_DEPENDS += $(SWSS_DBG) $(LIBSWSSCOMMON_DBG)
-$(DOCKER_NAT)_DBG_IMAGE_PACKAGES = $($(DOCKER_SWSS_LAYER_BULLSEYE)_DBG_IMAGE_PACKAGES)
+$(DOCKER_NAT)_DBG_IMAGE_PACKAGES = $($(DOCKER_SWSS_LAYER_BOOKWORM)_DBG_IMAGE_PACKAGES)
 
-$(DOCKER_NAT)_LOAD_DOCKERS += $(DOCKER_SWSS_LAYER_BULLSEYE)
+$(DOCKER_NAT)_LOAD_DOCKERS += $(DOCKER_SWSS_LAYER_BOOKWORM)
 
 $(DOCKER_NAT)_VERSION = 1.0.0
 $(DOCKER_NAT)_PACKAGE_NAME = nat
@@ -38,5 +38,5 @@ $(DOCKER_NAT)_FILES += $(SUPERVISOR_PROC_EXIT_LISTENER_SCRIPT)
 
 $(DOCKER_NAT)_BASE_IMAGE_FILES += natctl:/usr/bin/natctl
 
-SONIC_BULLSEYE_DOCKERS += $(DOCKER_NAT)
-SONIC_BULLSEYE_DBG_DOCKERS += $(DOCKER_NAT_DBG)
+SONIC_BOOKWORM_DOCKERS += $(DOCKER_NAT)
+SONIC_BOOKWORM_DBG_DOCKERS += $(DOCKER_NAT_DBG)
diff --git a/rules/iptables.mk b/rules/iptables.mk
index f8515f894..c721d0919 100644
--- a/rules/iptables.mk
+++ b/rules/iptables.mk
@@ -1,7 +1,7 @@
 # iptables package
 
-IPTABLES_VERSION = 1.8.7
-IPTABLES_VERSION_SUFFIX = 1
+IPTABLES_VERSION = 1.8.9
+IPTABLES_VERSION_SUFFIX = 2
 IPTABLES_VERSION_FULL = $(IPTABLES_VERSION)-$(IPTABLES_VERSION_SUFFIX)
 
 IPTABLES = iptables_$(IPTABLES_VERSION_FULL)_$(CONFIGURED_ARCH).deb
diff --git a/src/iptables/Makefile b/src/iptables/Makefile
index a048ea5a9..3efa01dfd 100644
--- a/src/iptables/Makefile
+++ b/src/iptables/Makefile
@@ -11,7 +11,7 @@ DERIVED_TARGETS = libip4tc2_$(IPTABLES_VERSION_FULL)_$(CONFIGURED_ARCH).deb \
 IPTABLES_URL = http://deb.debian.org/debian/pool/main/i/iptables
 
 DSC_FILE = iptables_$(IPTABLES_VERSION_FULL).dsc
-ORIG_FILE = iptables_$(IPTABLES_VERSION).orig.tar.bz2
+ORIG_FILE = iptables_$(IPTABLES_VERSION).orig.tar.xz
 DEBIAN_FILE = iptables_$(IPTABLES_VERSION_FULL).debian.tar.xz
 
 DSC_FILE_URL = $(IPTABLES_URL)/$(DSC_FILE)
diff --git a/src/iptables/patch/0001-Passing-fullcone-option-for-SNAT-and-DNAT.patch b/src/iptables/patch/0001-Passing-fullcone-option-for-SNAT-and-DNAT.patch
index 4e06adf9d..e07730aa4 100644
--- a/src/iptables/patch/0001-Passing-fullcone-option-for-SNAT-and-DNAT.patch
+++ b/src/iptables/patch/0001-Passing-fullcone-option-for-SNAT-and-DNAT.patch
@@ -1,41 +1,54 @@
-From 386bb8378bc67b7dfc3db5d5f28a01620b4231cf Mon Sep 17 00:00:00 2001
-From: Kiran Kella <kiran.kella@broadcom.com>
-Date: Wed, 7 Aug 2019 07:22:42 -0700
-Subject: [PATCH] From 92f5aee7372748845f11b7a10d880f968769e860 Mon Sep 17
- 00:00:00 2001 Subject: [PATCH] Passing fullcone option for SNAT and DNAT
+From 1cb735fdb3d3fa165fe5d02b55aad98037de42a6 Mon Sep 17 00:00:00 2001
+From: Akhilesh Samineni <akhilesh.samineni@broadcom.com>
+Date: Sat, 27 Apr 2024 10:43:10 -0700
+Subject: [PATCH] Passing fullcone option for SNAT and DNAT
 
 ---
- extensions/libipt_DNAT.c       | 37 ++++++++++++++++++++++++++++++++--
- extensions/libipt_MASQUERADE.c | 22 +++++++++++++++++++-
- extensions/libipt_SNAT.c       | 22 +++++++++++++++++++-
- 3 files changed, 77 insertions(+), 4 deletions(-)
+ extensions/libxt_NAT.c | 26 ++++++++++++++++++++++----
+ 1 file changed, 22 insertions(+), 4 deletions(-)
 
-diff --git a/extensions/libipt_DNAT.c b/extensions/libipt_DNAT.c
-index 4907a2e..95e3446 100644
---- a/extensions/libipt_DNAT.c
-+++ b/extensions/libipt_DNAT.c
-@@ -8,14 +8,20 @@
- #include <linux/netfilter_ipv4/ip_tables.h>
+diff --git a/extensions/libxt_NAT.c b/extensions/libxt_NAT.c
+index da9f220..cfcc1ff 100644
+--- a/extensions/libxt_NAT.c
++++ b/extensions/libxt_NAT.c
+@@ -17,6 +17,8 @@
+ #include <linux/netfilter_ipv6/ip6_tables.h>
  #include <linux/netfilter/nf_nat.h>
  
-+/* Temporarily defining here, need to be picked up from the
-+ * new kernel header linux/netfilter/nf_nat.h */
 +#define NF_NAT_RANGE_FULLCONE  (1 << 10)
 +
- enum {
- 	O_TO_DEST = 0,
+ #define TO_IPV4_MRC(ptr) ((const struct nf_nat_ipv4_multi_range_compat *)(ptr))
+ #define RANGE2_INIT_FROM_IPV4_MRC(ptr) {			\
+ 	.flags		= TO_IPV4_MRC(ptr)->range[0].flags,	\
+@@ -41,6 +43,7 @@ enum {
  	O_RANDOM,
+ 	O_RANDOM_FULLY,
  	O_PERSISTENT,
- 	O_X_TO_DEST, /* hidden flag */
 +	O_FULLCONE,
- 	F_TO_DEST   = 1 << O_TO_DEST,
- 	F_RANDOM    = 1 << O_RANDOM,
- 	F_X_TO_DEST = 1 << O_X_TO_DEST,
-+	F_FULLCONE  = 1 << O_FULLCONE
  };
  
- /* Dest NAT data consists of a multi-range, indicating where to map
-@@ -32,7 +38,7 @@ static void DNAT_help(void)
+ static void SNAT_help(void)
+@@ -49,7 +52,7 @@ static void SNAT_help(void)
+ "SNAT target options:\n"
+ " --to-source [<ipaddr>[-<ipaddr>]][:port[-port]]\n"
+ "				Address to map source to.\n"
+-"[--random] [--random-fully] [--persistent]\n");
++"[--random] [--random-fully] [--persistent] [--fullcone]\n");
+ }
+ 
+ static void MASQUERADE_help(void)
+@@ -61,7 +64,9 @@ static void MASQUERADE_help(void)
+ " --random\n"
+ "				Randomize source port.\n"
+ " --random-fully\n"
+-"				Fully randomize source port.\n");
++"                              Fully randomize source port.\n"
++" --fullcone\n"
++"                              Do fullcone NAT mapping.\n");
+ }
+ 
+ static void DNAT_help(void)
+@@ -70,7 +75,7 @@ static void DNAT_help(void)
  "DNAT target options:\n"
  " --to-destination [<ipaddr>[-<ipaddr>]][:port[-port]]\n"
  "				Address to map destination to.\n"
@@ -44,7 +57,7 @@ index 4907a2e..95e3446 100644
  }
  
  static void DNAT_help_v2(void)
-@@ -41,7 +47,7 @@ static void DNAT_help_v2(void)
+@@ -79,7 +84,7 @@ static void DNAT_help_v2(void)
  "DNAT target options:\n"
  " --to-destination [<ipaddr>[-<ipaddr>]][:port[-port[/port]]]\n"
  "				Address to map destination to.\n"
@@ -52,136 +65,16 @@ index 4907a2e..95e3446 100644
 +"[--random] [--persistent] [--fullcone]\n");
  }
  
- static const struct xt_option_entry DNAT_opts[] = {
-@@ -49,6 +55,7 @@ static const struct xt_option_entry DNAT_opts[] = {
- 	 .flags = XTOPT_MAND | XTOPT_MULTI},
+ static void REDIRECT_help(void)
+@@ -97,6 +102,7 @@ static const struct xt_option_entry SNAT_opts[] = {
  	{.name = "random", .id = O_RANDOM, .type = XTTYPE_NONE},
+ 	{.name = "random-fully", .id = O_RANDOM_FULLY, .type = XTTYPE_NONE},
  	{.name = "persistent", .id = O_PERSISTENT, .type = XTTYPE_NONE},
 +	{.name = "fullcone", .id = O_FULLCONE, .type = XTTYPE_NONE},
  	XTOPT_TABLEEND,
  };
  
-@@ -194,10 +201,14 @@ static void DNAT_parse(struct xt_option_call *cb)
- static void DNAT_fcheck(struct xt_fcheck_call *cb)
- {
- 	static const unsigned int f = F_TO_DEST | F_RANDOM;
-+	static const unsigned int c = F_FULLCONE;
- 	struct nf_nat_ipv4_multi_range_compat *mr = cb->data;
- 
- 	if ((cb->xflags & f) == f)
- 		mr->range[0].flags |= NF_NAT_RANGE_PROTO_RANDOM;
-+
-+	if ((cb->xflags & c) == c)
-+		mr->range[0].flags |= NF_NAT_RANGE_FULLCONE;
- }
- 
- static void print_range(const struct nf_nat_ipv4_range *r)
-@@ -233,6 +244,8 @@ static void DNAT_print(const void *ip, const struct xt_entry_target *target,
- 			printf(" random");
- 		if (info->mr.range[i].flags & NF_NAT_RANGE_PERSISTENT)
- 			printf(" persistent");
-+		if (info->mr.range[i].flags & NF_NAT_RANGE_FULLCONE)
-+			printf(" fullcone");
- 	}
- }
- 
-@@ -248,6 +261,8 @@ static void DNAT_save(const void *ip, const struct xt_entry_target *target)
- 			printf(" --random");
- 		if (info->mr.range[i].flags & NF_NAT_RANGE_PERSISTENT)
- 			printf(" --persistent");
-+		if (info->mr.range[i].flags & NF_NAT_RANGE_FULLCONE)
-+			printf(" --fullcone");
- 	}
- }
- 
-@@ -291,6 +306,11 @@ static int DNAT_xlate(struct xt_xlate *xl,
- 				sep = ",";
- 			xt_xlate_add(xl, "%spersistent", sep);
- 		}
-+		if (info->mr.range[i].flags & NF_NAT_RANGE_FULLCONE) {
-+			if (sep_need)
-+				sep = ",";
-+			xt_xlate_add(xl, "%sfullcone", sep);
-+		}
- 	}
- 
- 	return 1;
-@@ -426,10 +446,14 @@ static void DNAT_parse_v2(struct xt_option_call *cb)
- static void DNAT_fcheck_v2(struct xt_fcheck_call *cb)
- {
- 	static const unsigned int f = F_TO_DEST | F_RANDOM;
-+	static const unsigned int c = F_FULLCONE;
- 	struct nf_nat_range2 *range = cb->data;
- 
- 	if ((cb->xflags & f) == f)
- 		range->flags |= NF_NAT_RANGE_PROTO_RANDOM;
-+
-+	if ((cb->xflags & c) == c)
-+		range->flags |= NF_NAT_RANGE_FULLCONE;
- }
- 
- static void print_range_v2(const struct nf_nat_range2 *range)
-@@ -461,6 +485,8 @@ static void DNAT_print_v2(const void *ip, const struct xt_entry_target *target,
- 		printf(" random");
- 	if (range->flags & NF_NAT_RANGE_PERSISTENT)
- 		printf(" persistent");
-+	if (range->flags & NF_NAT_RANGE_FULLCONE)
-+		printf(" fullcone");
- }
- 
- static void DNAT_save_v2(const void *ip, const struct xt_entry_target *target)
-@@ -473,6 +499,8 @@ static void DNAT_save_v2(const void *ip, const struct xt_entry_target *target)
- 		printf(" --random");
- 	if (range->flags & NF_NAT_RANGE_PERSISTENT)
- 		printf(" --persistent");
-+	if (range->flags & NF_NAT_RANGE_FULLCONE)
-+		printf(" --fullcone");
- }
- 
- static void print_range_xlate_v2(const struct nf_nat_range2 *range,
-@@ -512,6 +540,11 @@ static int DNAT_xlate_v2(struct xt_xlate *xl,
- 			sep = ",";
- 		xt_xlate_add(xl, "%spersistent", sep);
- 	}
-+	if (range->flags & NF_NAT_RANGE_FULLCONE) {
-+		if (sep_need)
-+			sep = ",";
-+		xt_xlate_add(xl, "%sfullcone", sep);
-+	}
- 
- 	return 1;
- }
-diff --git a/extensions/libipt_MASQUERADE.c b/extensions/libipt_MASQUERADE.c
-index 90bf606..b3ed1e6 100644
---- a/extensions/libipt_MASQUERADE.c
-+++ b/extensions/libipt_MASQUERADE.c
-@@ -8,10 +8,15 @@
- #include <linux/netfilter_ipv4/ip_tables.h>
- #include <linux/netfilter/nf_nat.h>
- 
-+/* Temporarily defining here, need to be picked up from the
-+ * new kernel header linux/netfilter/nf_nat.h */
-+#define NF_NAT_RANGE_FULLCONE  (1 << 10)
-+
- enum {
- 	O_TO_PORTS = 0,
- 	O_RANDOM,
- 	O_RANDOM_FULLY,
-+	O_FULLCONE
- };
- 
- static void MASQUERADE_help(void)
-@@ -23,13 +28,16 @@ static void MASQUERADE_help(void)
- " --random\n"
- "				Randomize source port.\n"
- " --random-fully\n"
--"				Fully randomize source port.\n");
-+"				Fully randomize source port.\n"
-+" --fullcone\n"
-+"				Do fullcone NAT mapping.\n");
- }
- 
- static const struct xt_option_entry MASQUERADE_opts[] = {
+@@ -104,6 +110,7 @@ static const struct xt_option_entry MASQUERADE_opts[] = {
  	{.name = "to-ports", .id = O_TO_PORTS, .type = XTTYPE_STRING},
  	{.name = "random", .id = O_RANDOM, .type = XTTYPE_NONE},
  	{.name = "random-fully", .id = O_RANDOM_FULLY, .type = XTTYPE_NONE},
@@ -189,137 +82,52 @@ index 90bf606..b3ed1e6 100644
  	XTOPT_TABLEEND,
  };
  
-@@ -104,6 +112,9 @@ static void MASQUERADE_parse(struct xt_option_call *cb)
- 	case O_RANDOM_FULLY:
- 		mr->range[0].flags |=  NF_NAT_RANGE_PROTO_RANDOM_FULLY;
- 		break;
-+	case O_FULLCONE:
-+		mr->range[0].flags |=  NF_NAT_RANGE_FULLCONE;
-+		break;
- 	}
- }
- 
-@@ -126,6 +137,9 @@ MASQUERADE_print(const void *ip, const struct xt_entry_target *target,
- 
- 	if (r->flags & NF_NAT_RANGE_PROTO_RANDOM_FULLY)
- 		printf(" random-fully");
-+
-+	if (r->flags & NF_NAT_RANGE_FULLCONE)
-+		printf(" fullcone");
- }
- 
- static void
-@@ -145,6 +159,9 @@ MASQUERADE_save(const void *ip, const struct xt_entry_target *target)
- 
- 	if (r->flags & NF_NAT_RANGE_PROTO_RANDOM_FULLY)
- 		printf(" --random-fully");
-+
-+	if (r->flags & NF_NAT_RANGE_FULLCONE)
-+		printf(" --fullcone");
- }
- 
- static int MASQUERADE_xlate(struct xt_xlate *xl,
-@@ -166,6 +183,9 @@ static int MASQUERADE_xlate(struct xt_xlate *xl,
- 	if (r->flags & NF_NAT_RANGE_PROTO_RANDOM)
- 		xt_xlate_add(xl, "random ");
- 
-+	if (r->flags & NF_NAT_RANGE_FULLCONE)
-+		xt_xlate_add(xl, "fullcone ");
-+
- 	return 1;
- }
- 
-diff --git a/extensions/libipt_SNAT.c b/extensions/libipt_SNAT.c
-index e92d811..8704004 100644
---- a/extensions/libipt_SNAT.c
-+++ b/extensions/libipt_SNAT.c
-@@ -8,16 +8,22 @@
- #include <linux/netfilter_ipv4/ip_tables.h>
- #include <linux/netfilter/nf_nat.h>
- 
-+/* Temporarily defining here, need to be picked up from the
-+ * new kernel header linux/netfilter/nf_nat.h */
-+#define NF_NAT_RANGE_FULLCONE  (1 << 10)
-+
- enum {
- 	O_TO_SRC = 0,
- 	O_RANDOM,
- 	O_RANDOM_FULLY,
- 	O_PERSISTENT,
- 	O_X_TO_SRC,
-+	O_FULLCONE,
- 	F_TO_SRC       = 1 << O_TO_SRC,
- 	F_RANDOM       = 1 << O_RANDOM,
- 	F_RANDOM_FULLY = 1 << O_RANDOM_FULLY,
- 	F_X_TO_SRC     = 1 << O_X_TO_SRC,
-+	F_FULLCONE     = 1 << O_FULLCONE
- };
- 
- /* Source NAT data consists of a multi-range, indicating where to map
-@@ -34,7 +40,7 @@ static void SNAT_help(void)
- "SNAT target options:\n"
- " --to-source [<ipaddr>[-<ipaddr>]][:port[-port]]\n"
- "				Address to map source to.\n"
--"[--random] [--random-fully] [--persistent]\n");
-+"[--random] [--random-fully] [--persistent] [--fullcone]\n");
- }
- 
- static const struct xt_option_entry SNAT_opts[] = {
-@@ -43,6 +49,7 @@ static const struct xt_option_entry SNAT_opts[] = {
+@@ -112,6 +119,7 @@ static const struct xt_option_entry DNAT_opts[] = {
+ 	 .flags = XTOPT_MAND},
  	{.name = "random", .id = O_RANDOM, .type = XTTYPE_NONE},
- 	{.name = "random-fully", .id = O_RANDOM_FULLY, .type = XTTYPE_NONE},
  	{.name = "persistent", .id = O_PERSISTENT, .type = XTTYPE_NONE},
 +	{.name = "fullcone", .id = O_FULLCONE, .type = XTTYPE_NONE},
  	XTOPT_TABLEEND,
  };
  
-@@ -189,12 +196,15 @@ static void SNAT_fcheck(struct xt_fcheck_call *cb)
- {
- 	static const unsigned int f = F_TO_SRC | F_RANDOM;
- 	static const unsigned int r = F_TO_SRC | F_RANDOM_FULLY;
-+	static const unsigned int c = F_TO_SRC | F_FULLCONE;
- 	struct nf_nat_ipv4_multi_range_compat *mr = cb->data;
- 
- 	if ((cb->xflags & f) == f)
- 		mr->range[0].flags |= NF_NAT_RANGE_PROTO_RANDOM;
- 	if ((cb->xflags & r) == r)
- 		mr->range[0].flags |= NF_NAT_RANGE_PROTO_RANDOM_FULLY;
-+	if ((cb->xflags & c) == c)
-+		mr->range[0].flags |= NF_NAT_RANGE_FULLCONE;
- }
- 
- static void print_range(const struct nf_nat_ipv4_range *r)
-@@ -232,6 +242,8 @@ static void SNAT_print(const void *ip, const struct xt_entry_target *target,
- 			printf(" random-fully");
- 		if (info->mr.range[i].flags & NF_NAT_RANGE_PERSISTENT)
- 			printf(" persistent");
-+		if (info->mr.range[i].flags & NF_NAT_RANGE_FULLCONE)
-+			printf(" fullcone");
+@@ -280,6 +288,9 @@ static void __NAT_parse(struct xt_option_call *cb, __u16 proto,
+ 	case O_RANDOM_FULLY:
+ 		range->flags |= NF_NAT_RANGE_PROTO_RANDOM_FULLY;
+ 		break;
++	case O_FULLCONE:
++		range->flags |= NF_NAT_RANGE_FULLCONE;
++		break;
  	}
  }
  
-@@ -249,6 +261,8 @@ static void SNAT_save(const void *ip, const struct xt_entry_target *target)
- 			printf(" --random-fully");
- 		if (info->mr.range[i].flags & NF_NAT_RANGE_PERSISTENT)
- 			printf(" --persistent");
-+		if (info->mr.range[i].flags & NF_NAT_RANGE_FULLCONE)
-+			printf(" --fullcone");
+@@ -304,6 +315,7 @@ static void NAT_parse(struct xt_option_call *cb)
+ 	case O_PERSISTENT:
+ 	case O_RANDOM:
+ 	case O_RANDOM_FULLY:
++	case O_FULLCONE:
+ 		mr->range->flags |= range.flags;
+ 		break;
  	}
+@@ -411,6 +423,8 @@ static void __NAT_print(const struct nf_nat_range2 *r, int family,
+ 		printf(" %srandom-fully", flag_pfx);
+ 	if (r->flags & NF_NAT_RANGE_PERSISTENT)
+ 		printf(" %spersistent", flag_pfx);
++	if (r->flags & NF_NAT_RANGE_FULLCONE)
++		printf(" %sfullcone", flag_pfx);
  }
  
-@@ -299,6 +313,12 @@ static int SNAT_xlate(struct xt_xlate *xl,
- 				sep = ",";
- 			xt_xlate_add(xl, "%spersistent", sep);
- 		}
-+		if (info->mr.range[i].flags & NF_NAT_RANGE_FULLCONE) {
-+			if (sep_need)
-+				sep = ",";
-+			xt_xlate_add(xl, "%sfullcone", sep);
-+			sep_need = true;
-+		}
+ static int
+@@ -439,6 +453,10 @@ __NAT_xlate(struct xt_xlate *xl, const struct nf_nat_range2 *r,
+ 		xt_xlate_add(xl, "%spersistent", sep);
+ 		sep = ",";
  	}
- 
++	if (r->flags & NF_NAT_RANGE_FULLCONE) {
++		xt_xlate_add(xl, "%sfullcone", sep);
++		sep = ",";
++	}
  	return 1;
+ }
+ 
 -- 
-2.27.0
+2.18.0
 

From 35d07e3f0b91aab067982663846ffd28e9609868 Mon Sep 17 00:00:00 2001
From: Vivek <vivekreddykarri98@gmail.com>
Date: Tue, 30 Apr 2024 16:24:50 -0700
Subject: [PATCH 0507/1115] Add python3-protobuf package to SwSS Container
 (#18802)

---
 dockers/docker-orchagent/Dockerfile.j2 | 1 +
 1 file changed, 1 insertion(+)

diff --git a/dockers/docker-orchagent/Dockerfile.j2 b/dockers/docker-orchagent/Dockerfile.j2
index 5148cddeb..3bc02a9d8 100755
--- a/dockers/docker-orchagent/Dockerfile.j2
+++ b/dockers/docker-orchagent/Dockerfile.j2
@@ -18,6 +18,7 @@ RUN apt-get update &&       \
         bridge-utils        \
         conntrack           \
         ndppd               \
+        python3-protobuf    \
         pciutils            \
         # Needed for installing netifaces Python package
         build-essential     \

From 6f80681d3036c289b865e532a37dcda85f1e87f2 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Wed, 1 May 2024 16:01:34 +0800
Subject: [PATCH 0508/1115] [submodule] Update submodule sonic-mgmt-common to
 the latest HEAD automatically (#18825)

#### Why I did it
src/sonic-mgmt-common
```
* 85119e8 - (HEAD -> master, origin/master, origin/HEAD) Adding support for OC YANG interfaces (#125) (30 hours ago) [Nikita Agarwal]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-mgmt-common | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-mgmt-common b/src/sonic-mgmt-common
index 5f1191e61..85119e8f9 160000
--- a/src/sonic-mgmt-common
+++ b/src/sonic-mgmt-common
@@ -1 +1 @@
-Subproject commit 5f1191e61bef38b66655fbeac8e94bfe2c4710b8
+Subproject commit 85119e8f920399ad91eae06a33661707eeb7cd04

From 41c1e31412f7e3d54fadefccabae61679296be71 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Wed, 1 May 2024 16:01:43 +0800
Subject: [PATCH 0509/1115] [submodule] Update submodule sonic-gnmi to the
 latest HEAD automatically (#18823)

#### Why I did it
src/sonic-gnmi
```
* eea5d7d - (HEAD -> master, origin/master, origin/HEAD) Fix memory leak (#223) (2 days ago) [ganglv]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-gnmi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-gnmi b/src/sonic-gnmi
index d0ec8b0dc..eea5d7dd6 160000
--- a/src/sonic-gnmi
+++ b/src/sonic-gnmi
@@ -1 +1 @@
-Subproject commit d0ec8b0dcb1a546b07cda70a10ee6537ff5096fd
+Subproject commit eea5d7dd6297b7c31e15d22c12c1c9b6350596cd

From 8047998a1d3d016477cd2b8515cb5a236292a097 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Wed, 1 May 2024 19:01:15 +0800
Subject: [PATCH 0510/1115] [submodule] Update submodule sonic-swss to the
 latest HEAD automatically (#18827)

#### Why I did it
src/sonic-swss
```
* 67e03128 - (HEAD -> master, origin/master, origin/HEAD) change log level from ERR to WARN for pfc asym sai attribute not supported (#3125) (11 hours ago) [Zhixin Zhu]
* c79fd932 - Add fabric capacity monitoring code. (#3097) (11 hours ago) [jfeng-arista]
* 7612326c - Do not apply zero buffer profile list until all buffer pools are ready (#3112) (11 hours ago) [Stephen Sun]
* 054ed34b - Support ASIC/SDK health event (#3020) (29 hours ago) [Stephen Sun]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-swss | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-swss b/src/sonic-swss
index 5ef737087..67e03128d 160000
--- a/src/sonic-swss
+++ b/src/sonic-swss
@@ -1 +1 @@
-Subproject commit 5ef737087a15f23d2038ca840e935f402ad92f31
+Subproject commit 67e03128dedc061c51da7ccd7fd716f00d974bb3

From 80fc33122c42fb260554cbd3f9aae4cfa396e405 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Thu, 2 May 2024 16:01:31 +0800
Subject: [PATCH 0511/1115] [submodule] Update submodule sonic-swss to the
 latest HEAD automatically (#18847)

#### Why I did it
src/sonic-swss
```
* 2e6c5b20 - (HEAD -> master, origin/master, origin/HEAD) [DropCounter]Fix the ordering issue with dropcounter (#3128) (4 hours ago) [Sudharsan Dhamal Gopalarathnam]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-swss | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-swss b/src/sonic-swss
index 67e03128d..2e6c5b209 160000
--- a/src/sonic-swss
+++ b/src/sonic-swss
@@ -1 +1 @@
-Subproject commit 67e03128dedc061c51da7ccd7fd716f00d974bb3
+Subproject commit 2e6c5b209d575f73b867de9f3e56b3be4066acec

From ca25b3b7b5aab7602a7cce2c5d7d279590a7febe Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Thu, 2 May 2024 16:01:43 +0800
Subject: [PATCH 0512/1115] [submodule] Update submodule sonic-platform-daemons
 to the latest HEAD automatically (#18826)

#### Why I did it
src/sonic-platform-daemons
```
* 9d0c550 - (HEAD -> master, origin/master, origin/HEAD) [ycabled] [active-standby] add changes for correcting telemetry values for 'active-standby' when the cable is present but vendor name and part number is not recognized (#478) (8 hours ago) [vdahiya12]
* 7e18648 - [xcvrd] Fix issue: logical_port_name is not defined (#482) (26 hours ago) [Junchao-Mellanox]
* eb91cb7 - Handling exceptions in CMIS SM to prevent xcvrd crash (#483) (26 hours ago) [mihirpat1]
* 6655396 - Adding frequency grid validation for ZR optics (#466) (2 days ago) [balram-csco]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-platform-daemons | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-platform-daemons b/src/sonic-platform-daemons
index 759862e6d..9d0c55002 160000
--- a/src/sonic-platform-daemons
+++ b/src/sonic-platform-daemons
@@ -1 +1 @@
-Subproject commit 759862e6db350db27e772bd65c36211f9b5f246f
+Subproject commit 9d0c55002129dac4fecddc45edfd6cfa8bc510d8

From 987d060a9483d1818183390911300aaebe457297 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sat, 4 May 2024 16:01:36 +0800
Subject: [PATCH 0513/1115] [submodule] Update submodule sonic-sairedis to the
 latest HEAD automatically (#18859)

#### Why I did it
src/sonic-sairedis
```
* 8a0cc25 - (HEAD -> master, origin/master, origin/HEAD) Support ASIC/SDK health event (#1340) (28 hours ago) [Stephen Sun]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-sairedis | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-sairedis b/src/sonic-sairedis
index c3395e5d7..8a0cc2598 160000
--- a/src/sonic-sairedis
+++ b/src/sonic-sairedis
@@ -1 +1 @@
-Subproject commit c3395e5d75933d961d6aaafb695753ae7ca3fe07
+Subproject commit 8a0cc25989fb5bd005bde493190faac6bc84a86d

From 97bdc414ed26a60723f406eee8a6ee35fe227f27 Mon Sep 17 00:00:00 2001
From: Oleksandr Ivantsiv <oivantsiv@nvidia.com>
Date: Sat, 4 May 2024 12:56:25 -0700
Subject: [PATCH 0514/1115] [Mellanox] Query base MAC address from the
 syseepromfor Bluefield DPU (#18853)

- Why I did it
Query base MAC address from the syseeprom or machine.conf for nvidia-bluefield platform

- How I did it
Use the same flow as Mellanox platform uses.

- How to verify it
Run the image and verify the base MAC address in the config DB.
---
 src/sonic-py-common/sonic_py_common/device_info.py | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-py-common/sonic_py_common/device_info.py b/src/sonic-py-common/sonic_py_common/device_info.py
index 15d5aec65..a5f982130 100644
--- a/src/sonic-py-common/sonic_py_common/device_info.py
+++ b/src/sonic-py-common/sonic_py_common/device_info.py
@@ -728,7 +728,7 @@ def get_system_mac(namespace=None, hostname=None):
     if platform == VS_PLATFORM:
         return generate_mac_for_vs(hostname, namespace)
 
-    elif (version_info['asic_type'] == 'mellanox'):
+    if (version_info['asic_type'] in ['mellanox', 'nvidia-bluefield']):
         # With Mellanox ONIE release(2019.05-5.2.0012) and above
         # "onie_base_mac" was added to /host/machine.conf:
         # onie_base_mac=e4:1d:2d:44:5e:80

From 99ec0f3e74dd9fa72664c4dece05292db98f7491 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sun, 5 May 2024 19:00:56 +0800
Subject: [PATCH 0515/1115] [submodule] Update submodule sonic-mgmt-framework
 to the latest HEAD automatically (#18856)

#### Why I did it
src/sonic-mgmt-framework
```
* 2248203 - (HEAD -> master, origin/master, origin/HEAD) Adding go.mod and go.sum files to resolve build issues. (#141) (2 days ago) [Nikita Agarwal]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-mgmt-framework | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-mgmt-framework b/src/sonic-mgmt-framework
index 0a5962da2..2248203a4 160000
--- a/src/sonic-mgmt-framework
+++ b/src/sonic-mgmt-framework
@@ -1 +1 @@
-Subproject commit 0a5962da21cdf0cf541a9198149c31e90cde5f4c
+Subproject commit 2248203a47698c7598b6d745f6a1ca27813b4327

From 5fb0ee9ad0c1b3bf321ad35c4717dafec440d15e Mon Sep 17 00:00:00 2001
From: Sudharsan Dhamal Gopalarathnam <sudharsand@nvidia.com>
Date: Mon, 6 May 2024 09:06:00 -0700
Subject: [PATCH 0516/1115] [sflow]Changing the verbosity of ERR log when
 interface is unavailable (#18821)

---
 ...emoved-just-as-we-discover-it-log-wi.patch | 33 +++++++++++++++++++
 src/sflow/hsflowd/patch/series                |  1 +
 2 files changed, 34 insertions(+)
 create mode 100644 src/sflow/hsflowd/patch/0004-When-interface-removed-just-as-we-discover-it-log-wi.patch

diff --git a/src/sflow/hsflowd/patch/0004-When-interface-removed-just-as-we-discover-it-log-wi.patch b/src/sflow/hsflowd/patch/0004-When-interface-removed-just-as-we-discover-it-log-wi.patch
new file mode 100644
index 000000000..337e3ffc5
--- /dev/null
+++ b/src/sflow/hsflowd/patch/0004-When-interface-removed-just-as-we-discover-it-log-wi.patch
@@ -0,0 +1,33 @@
+From 3d6a3a02d12bcd742e9bcd701cb77da5f265adee Mon Sep 17 00:00:00 2001
+From: Neil McKee <neil.mckee@inmon.com>
+Date: Fri, 26 Apr 2024 11:05:19 -0700
+Subject: [PATCH] When interface removed just as we discover it, log with
+ LOG_INFO, not LOG_ERR.
+
+
+diff --git a/src/Linux/readInterfaces.c b/src/Linux/readInterfaces.c
+index 438d8ed..06427eb 100644
+--- a/src/Linux/readInterfaces.c
++++ b/src/Linux/readInterfaces.c
+@@ -758,7 +758,8 @@ extern "C" {
+ 
+       // Get the flags for this interface
+       if(ioctl(fd,SIOCGIFFLAGS, &ifr) < 0) {
+-	myLog(LOG_ERR, "device %s Get SIOCGIFFLAGS failed : %s",
++	// Can get here if the interface was just removed under our feet.
++	myLog(LOG_INFO, "device %s Get SIOCGIFFLAGS failed : %s",
+ 	      devName,
+ 	      strerror(errno));
+ 	continue;
+@@ -781,7 +782,7 @@ extern "C" {
+       u_char macBytes[6];
+       int gotMac = NO;
+       if(ioctl(fd,SIOCGIFHWADDR, &ifr) < 0) {
+-	myLog(LOG_ERR, "device %s Get SIOCGIFHWADDR failed : %s",
++	myLog(LOG_INFO, "device %s Get SIOCGIFHWADDR failed : %s",
+ 	      devName,
+ 	      strerror(errno));
+       }
+-- 
+2.30.2
+
diff --git a/src/sflow/hsflowd/patch/series b/src/sflow/hsflowd/patch/series
index f6def262d..727e9b4fe 100644
--- a/src/sflow/hsflowd/patch/series
+++ b/src/sflow/hsflowd/patch/series
@@ -1,3 +1,4 @@
 0001-host_sflow_psample.patch
 0002-host_sflow_debian.patch
 0003-sflow-enabled-drop-monitor-support-for-SONiC.patch
+0004-When-interface-removed-just-as-we-discover-it-log-wi.patch

From 33990d88e1273a59893c89e4d2a770a86aa50042 Mon Sep 17 00:00:00 2001
From: vidhya-rajan <121014183+vidhya-rajan@users.noreply.github.com>
Date: Mon, 6 May 2024 21:40:01 +0530
Subject: [PATCH 0517/1115] Platform driver change for Bookworm (#17702)

---
 .../midstone-200i/modules/mc24lc64t.c                         | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/platform/innovium/sonic-platform-modules-cel/midstone-200i/modules/mc24lc64t.c b/platform/innovium/sonic-platform-modules-cel/midstone-200i/modules/mc24lc64t.c
index 002172f58..b66a70006 100755
--- a/platform/innovium/sonic-platform-modules-cel/midstone-200i/modules/mc24lc64t.c
+++ b/platform/innovium/sonic-platform-modules-cel/midstone-200i/modules/mc24lc64t.c
@@ -108,7 +108,7 @@ static int mc24lc64t_probe(struct i2c_client *client,
         return err;
 }
 
-static int mc24lc64t_remove(struct i2c_client *client)
+static void mc24lc64t_remove(struct i2c_client *client)
 {
         struct mc24lc64t_data *drvdata = i2c_get_clientdata(client);
 
@@ -116,7 +116,7 @@ static int mc24lc64t_remove(struct i2c_client *client)
 
         sysfs_remove_bin_file(&client->dev.kobj, &mc24lc64t_bit_attr);
 
-        return 0;
+        return ;
 }
 
 static const struct i2c_device_id mc24lc64t_id[] = {

From aa5a2141c8c02d55fe88b1adca91fcd98301b81b Mon Sep 17 00:00:00 2001
From: Samuel Angebault <staphylo@arista.com>
Date: Wed, 17 Apr 2024 01:32:16 -0700
Subject: [PATCH 0518/1115] Platform configurations for QuicksilverP

---
 .../Arista-7060X6-64PE/port_config.ini        |   65 +
 .../Arista-7060X6-64PE/sai.profile            |    1 +
 .../th5-a7060x6-64pe.config.bcm               | 1145 ++++++++++++++
 .../x86_64-arista_7060x6_64pe/default_sku     |    1 +
 .../x86_64-arista_7060x6_64pe/pcie.yaml       |    1 +
 .../x86_64-arista_7060x6_64pe/platform.json   | 1336 +++++++++++++++++
 .../x86_64-arista_7060x6_64pe/platform_asic   |    1 +
 .../platform_components.json                  |   12 +
 .../platform_env.conf                         |    2 +
 .../x86_64-arista_7060x6_64pe/platform_reboot |    1 +
 .../arista/x86_64-arista_7060x6_64pe/plugins  |    1 +
 .../pmon_daemon_control.json                  |    1 +
 .../x86_64-arista_7060x6_64pe/sensors.conf    |   26 +
 .../system_health_monitoring_config.json      |    1 +
 .../thermal_policy.json                       |    1 +
 files/Aboot/boot0.j2                          |    4 +
 16 files changed, 2599 insertions(+)
 create mode 100644 device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE/port_config.ini
 create mode 100644 device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE/sai.profile
 create mode 100644 device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE/th5-a7060x6-64pe.config.bcm
 create mode 100644 device/arista/x86_64-arista_7060x6_64pe/default_sku
 create mode 120000 device/arista/x86_64-arista_7060x6_64pe/pcie.yaml
 create mode 100644 device/arista/x86_64-arista_7060x6_64pe/platform.json
 create mode 100644 device/arista/x86_64-arista_7060x6_64pe/platform_asic
 create mode 100644 device/arista/x86_64-arista_7060x6_64pe/platform_components.json
 create mode 100644 device/arista/x86_64-arista_7060x6_64pe/platform_env.conf
 create mode 120000 device/arista/x86_64-arista_7060x6_64pe/platform_reboot
 create mode 120000 device/arista/x86_64-arista_7060x6_64pe/plugins
 create mode 120000 device/arista/x86_64-arista_7060x6_64pe/pmon_daemon_control.json
 create mode 100644 device/arista/x86_64-arista_7060x6_64pe/sensors.conf
 create mode 120000 device/arista/x86_64-arista_7060x6_64pe/system_health_monitoring_config.json
 create mode 120000 device/arista/x86_64-arista_7060x6_64pe/thermal_policy.json

diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE/port_config.ini b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE/port_config.ini
new file mode 100644
index 000000000..48d2519c0
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE/port_config.ini
@@ -0,0 +1,65 @@
+# name       lanes                            alias         index  speed   fec
+Ethernet0    17,18,19,20,21,22,23,24          Ethernet1/1   1      800000  rs
+Ethernet8    1,2,3,4,5,6,7,8                  Ethernet2/1   2      800000  rs
+Ethernet16   9,10,11,12,13,14,15,16           Ethernet3/1   3      800000  rs
+Ethernet24   25,26,27,28,29,30,31,32          Ethernet4/1   4      800000  rs
+Ethernet32   57,58,59,60,61,62,63,64          Ethernet5/1   5      800000  rs
+Ethernet40   41,42,43,44,45,46,47,48          Ethernet6/1   6      800000  rs
+Ethernet48   33,34,35,36,37,38,39,40          Ethernet7/1   7      800000  rs
+Ethernet56   49,50,51,52,53,54,55,56          Ethernet8/1   8      800000  rs
+Ethernet64   89,90,91,92,93,94,95,96          Ethernet9/1   9      800000  rs
+Ethernet72   73,74,75,76,77,78,79,80          Ethernet10/1  10     800000  rs
+Ethernet80   65,66,67,68,69,70,71,72          Ethernet11/1  11     800000  rs
+Ethernet88   81,82,83,84,85,86,87,88          Ethernet12/1  12     800000  rs
+Ethernet96   121,122,123,124,125,126,127,128  Ethernet13/1  13     800000  rs
+Ethernet104  105,106,107,108,109,110,111,112  Ethernet14/1  14     800000  rs
+Ethernet112  97,98,99,100,101,102,103,104     Ethernet15/1  15     800000  rs
+Ethernet120  113,114,115,116,117,118,119,120  Ethernet16/1  16     800000  rs
+Ethernet128  153,154,155,156,157,158,159,160  Ethernet17/1  17     800000  rs
+Ethernet136  137,138,139,140,141,142,143,144  Ethernet18/1  18     800000  rs
+Ethernet144  129,130,131,132,133,134,135,136  Ethernet19/1  19     800000  rs
+Ethernet152  145,146,147,148,149,150,151,152  Ethernet20/1  20     800000  rs
+Ethernet160  185,186,187,188,189,190,191,192  Ethernet21/1  21     800000  rs
+Ethernet168  169,170,171,172,173,174,175,176  Ethernet22/1  22     800000  rs
+Ethernet176  161,162,163,164,165,166,167,168  Ethernet23/1  23     800000  rs
+Ethernet184  177,178,179,180,181,182,183,184  Ethernet24/1  24     800000  rs
+Ethernet192  217,218,219,220,221,222,223,224  Ethernet25/1  25     800000  rs
+Ethernet200  201,202,203,204,205,206,207,208  Ethernet26/1  26     800000  rs
+Ethernet208  193,194,195,196,197,198,199,200  Ethernet27/1  27     800000  rs
+Ethernet216  209,210,211,212,213,214,215,216  Ethernet28/1  28     800000  rs
+Ethernet224  249,250,251,252,253,254,255,256  Ethernet29/1  29     800000  rs
+Ethernet232  233,234,235,236,237,238,239,240  Ethernet30/1  30     800000  rs
+Ethernet240  225,226,227,228,229,230,231,232  Ethernet31/1  31     800000  rs
+Ethernet248  241,242,243,244,245,246,247,248  Ethernet32/1  32     800000  rs
+Ethernet256  273,274,275,276,277,278,279,280  Ethernet33/1  33     800000  rs
+Ethernet264  257,258,259,260,261,262,263,264  Ethernet34/1  34     800000  rs
+Ethernet272  265,266,267,268,269,270,271,272  Ethernet35/1  35     800000  rs
+Ethernet280  281,282,283,284,285,286,287,288  Ethernet36/1  36     800000  rs
+Ethernet288  313,314,315,316,317,318,319,320  Ethernet37/1  37     800000  rs
+Ethernet296  297,298,299,300,301,302,303,304  Ethernet38/1  38     800000  rs
+Ethernet304  289,290,291,292,293,294,295,296  Ethernet39/1  39     800000  rs
+Ethernet312  305,306,307,308,309,310,311,312  Ethernet40/1  40     800000  rs
+Ethernet320  345,346,347,348,349,350,351,352  Ethernet41/1  41     800000  rs
+Ethernet328  329,330,331,332,333,334,335,336  Ethernet42/1  42     800000  rs
+Ethernet336  321,322,323,324,325,326,327,328  Ethernet43/1  43     800000  rs
+Ethernet344  337,338,339,340,341,342,343,344  Ethernet44/1  44     800000  rs
+Ethernet352  377,378,379,380,381,382,383,384  Ethernet45/1  45     800000  rs
+Ethernet360  361,362,363,364,365,366,367,368  Ethernet46/1  46     800000  rs
+Ethernet368  353,354,355,356,357,358,359,360  Ethernet47/1  47     800000  rs
+Ethernet376  369,370,371,372,373,374,375,376  Ethernet48/1  48     800000  rs
+Ethernet384  409,410,411,412,413,414,415,416  Ethernet49/1  49     800000  rs
+Ethernet392  393,394,395,396,397,398,399,400  Ethernet50/1  50     800000  rs
+Ethernet400  385,386,387,388,389,390,391,392  Ethernet51/1  51     800000  rs
+Ethernet408  401,402,403,404,405,406,407,408  Ethernet52/1  52     800000  rs
+Ethernet416  441,442,443,444,445,446,447,448  Ethernet53/1  53     800000  rs
+Ethernet424  425,426,427,428,429,430,431,432  Ethernet54/1  54     800000  rs
+Ethernet432  417,418,419,420,421,422,423,424  Ethernet55/1  55     800000  rs
+Ethernet440  433,434,435,436,437,438,439,440  Ethernet56/1  56     800000  rs
+Ethernet448  473,474,475,476,477,478,479,480  Ethernet57/1  57     800000  rs
+Ethernet456  457,458,459,460,461,462,463,464  Ethernet58/1  58     800000  rs
+Ethernet464  449,450,451,452,453,454,455,456  Ethernet59/1  59     800000  rs
+Ethernet472  465,466,467,468,469,470,471,472  Ethernet60/1  60     800000  rs
+Ethernet480  505,506,507,508,509,510,511,512  Ethernet61/1  61     800000  rs
+Ethernet488  489,490,491,492,493,494,495,496  Ethernet62/1  62     800000  rs
+Ethernet496  481,482,483,484,485,486,487,488  Ethernet63/1  63     800000  rs
+Ethernet504  497,498,499,500,501,502,503,504  Ethernet64/1  64     800000  rs
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE/sai.profile b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE/sai.profile
new file mode 100644
index 000000000..50c136d97
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE/sai.profile
@@ -0,0 +1 @@
+SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th5-a7060x6-64pe.config.bcm
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE/th5-a7060x6-64pe.config.bcm b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE/th5-a7060x6-64pe.config.bcm
new file mode 100644
index 000000000..015f79440
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE/th5-a7060x6-64pe.config.bcm
@@ -0,0 +1,1145 @@
+#
+# $Copyright: (c) 2022 Broadcom.
+# Broadcom Proprietary and Confidential. All rights reserved.$
+#
+# BCM78900 64x800g port configuration.
+#
+# configuration yaml file
+#   device:
+#       <unit>:
+#           <table>:
+#               ?
+#                   <key_fld_1>: <value>
+#                   <key_fld_2>: <value>
+#                   ...
+#                   <key_fld_n>: <value>
+#               :
+#                   <data_fld_1>: <value>
+#                   <data_fld_2>: <value>
+#                   ...
+#                   <data_fld_n>: <value>
+#
+
+---
+bcm_device:
+    0:
+        global:
+            pktio_mode: 1
+            default_cpu_tx_queue: 7
+            vlan_flooding_l2mc_num_reserved: 0
+            ipv6_lpm_128b_enable: 1
+            shared_block_mask_section: uc_bc
+            skip_protocol_default_entries: 1
+            # LTSW uses value 1 for ALPM combined mode
+            l3_alpm_template: 1
+            l3_alpm_hit_skip: 1
+            sai_feat_tail_timestamp : 1
+            sai_port_phy_time_sync_en : 1
+            sai_field_group_auto_prioritize: 1
+            #l3_intf_vlan_split_egress for MTU at L3IF
+            l3_intf_vlan_split_egress : 1
+            pfc_deadlock_seq_control : 1
+            sai_tunnel_support: 2
+            bcm_tunnel_term_compatible_mode: 1
+            l3_ecmp_member_first_lkup_mem_size: 12288
+---
+device:
+    0:
+        PC_PM_CORE:
+            ?
+                PC_PM_ID: 3
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0x66
+                TX_POLARITY_FLIP: 0xaa
+            ?
+                PC_PM_ID: 1
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0x26
+                TX_POLARITY_FLIP: 0xaa
+            ?
+                PC_PM_ID: 2
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x55
+                TX_POLARITY_FLIP: 0x66
+            ?
+                PC_PM_ID: 4
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x55
+                TX_POLARITY_FLIP: 0x66
+            ?
+                PC_PM_ID: 8
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 6
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xb6
+            ?
+                PC_PM_ID: 5
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x23016745
+                TX_LANE_MAP: 0x54670123
+                RX_POLARITY_FLIP: 0x97
+                TX_POLARITY_FLIP: 0x35
+            ?
+                PC_PM_ID: 7
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 12
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 10
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 9
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 11
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 16
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 14
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 13
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 15
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 20
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 18
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 17
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 19
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 24
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 22
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 21
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 23
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 28
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x31204675
+                TX_LANE_MAP: 0x47561203
+                RX_POLARITY_FLIP: 0x11
+                TX_POLARITY_FLIP: 0x2b
+            ?
+                PC_PM_ID: 26
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 25
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 27
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0x9a
+            ?
+                PC_PM_ID: 32
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x33
+                TX_POLARITY_FLIP: 0xff
+            ?
+                PC_PM_ID: 30
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x33
+                TX_POLARITY_FLIP: 0xff
+            ?
+                PC_PM_ID: 29
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0x66
+            ?
+                PC_PM_ID: 31
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0x66
+            ?
+                PC_PM_ID: 35
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0x33
+                TX_POLARITY_FLIP: 0x00
+            ?
+                PC_PM_ID: 33
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0x33
+                TX_POLARITY_FLIP: 0x00
+            ?
+                PC_PM_ID: 34
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x66
+            ?
+                PC_PM_ID: 36
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x66
+            ?
+                PC_PM_ID: 40
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 38
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0x9a
+            ?
+                PC_PM_ID: 37
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x31204675
+                TX_LANE_MAP: 0x47561203
+                RX_POLARITY_FLIP: 0x11
+                TX_POLARITY_FLIP: 0x2b
+            ?
+                PC_PM_ID: 39
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 44
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 42
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 41
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 43
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 48
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 46
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 45
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 47
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 52
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 50
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 49
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 51
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 56
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 54
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 53
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 55
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 60
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x23016745
+                TX_LANE_MAP: 0x54670123
+                RX_POLARITY_FLIP: 0x97
+                TX_POLARITY_FLIP: 0x35
+            ?
+                PC_PM_ID: 58
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 57
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 59
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xb6
+            ?
+                PC_PM_ID: 64
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x67
+                TX_POLARITY_FLIP: 0x55
+            ?
+                PC_PM_ID: 62
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x66
+                TX_POLARITY_FLIP: 0x55
+            ?
+                PC_PM_ID: 61
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0xaa
+                TX_POLARITY_FLIP: 0x66
+            ?
+                PC_PM_ID: 63
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0xaa
+                TX_POLARITY_FLIP: 0x66
+---
+device:
+    0:
+        PC_PORT_PHYS_MAP:
+            ?
+                PORT_ID: 1
+            :
+                PC_PHYS_PORT_ID: 1
+            ?
+                PORT_ID: 2
+            :
+                PC_PHYS_PORT_ID: 9
+            ?
+                PORT_ID: 11
+            :
+                PC_PHYS_PORT_ID: 17
+            ?
+                PORT_ID: 12
+            :
+                PC_PHYS_PORT_ID: 25
+            ?
+                PORT_ID: 22
+            :
+                PC_PHYS_PORT_ID: 33
+            ?
+                PORT_ID: 23
+            :
+                PC_PHYS_PORT_ID: 41
+            ?
+                PORT_ID: 33
+            :
+                PC_PHYS_PORT_ID: 49
+            ?
+                PORT_ID: 34
+            :
+                PC_PHYS_PORT_ID: 57
+            ?
+                PORT_ID: 44
+            :
+                PC_PHYS_PORT_ID: 65
+            ?
+                PORT_ID: 45
+            :
+                PC_PHYS_PORT_ID: 73
+            ?
+                PORT_ID: 55
+            :
+                PC_PHYS_PORT_ID: 81
+            ?
+                PORT_ID: 56
+            :
+                PC_PHYS_PORT_ID: 89
+            ?
+                PORT_ID: 66
+            :
+                PC_PHYS_PORT_ID: 97
+            ?
+                PORT_ID: 67
+            :
+                PC_PHYS_PORT_ID: 105
+            ?
+                PORT_ID: 77
+            :
+                PC_PHYS_PORT_ID: 113
+            ?
+                PORT_ID: 78
+            :
+                PC_PHYS_PORT_ID: 121
+            ?
+                PORT_ID: 88
+            :
+                PC_PHYS_PORT_ID: 129
+            ?
+                PORT_ID: 89
+            :
+                PC_PHYS_PORT_ID: 137
+            ?
+                PORT_ID: 99
+            :
+                PC_PHYS_PORT_ID: 145
+            ?
+                PORT_ID: 100
+            :
+                PC_PHYS_PORT_ID: 153
+            ?
+                PORT_ID: 110
+            :
+                PC_PHYS_PORT_ID: 161
+            ?
+                PORT_ID: 111
+            :
+                PC_PHYS_PORT_ID: 169
+            ?
+                PORT_ID: 121
+            :
+                PC_PHYS_PORT_ID: 177
+            ?
+                PORT_ID: 122
+            :
+                PC_PHYS_PORT_ID: 185
+            ?
+                PORT_ID: 132
+            :
+                PC_PHYS_PORT_ID: 193
+            ?
+                PORT_ID: 133
+            :
+                PC_PHYS_PORT_ID: 201
+            ?
+                PORT_ID: 143
+            :
+                PC_PHYS_PORT_ID: 209
+            ?
+                PORT_ID: 144
+            :
+                PC_PHYS_PORT_ID: 217
+            ?
+                PORT_ID: 154
+            :
+                PC_PHYS_PORT_ID: 225
+            ?
+                PORT_ID: 155
+            :
+                PC_PHYS_PORT_ID: 233
+            ?
+                PORT_ID: 165
+            :
+                PC_PHYS_PORT_ID: 241
+            ?
+                PORT_ID: 166
+            :
+                PC_PHYS_PORT_ID: 249
+            ?
+                PORT_ID: 176
+            :
+                PC_PHYS_PORT_ID: 257
+            ?
+                PORT_ID: 177
+            :
+                PC_PHYS_PORT_ID: 265
+            ?
+                PORT_ID: 187
+            :
+                PC_PHYS_PORT_ID: 273
+            ?
+                PORT_ID: 188
+            :
+                PC_PHYS_PORT_ID: 281
+            ?
+                PORT_ID: 198
+            :
+                PC_PHYS_PORT_ID: 289
+            ?
+                PORT_ID: 199
+            :
+                PC_PHYS_PORT_ID: 297
+            ?
+                PORT_ID: 209
+            :
+                PC_PHYS_PORT_ID: 305
+            ?
+                PORT_ID: 210
+            :
+                PC_PHYS_PORT_ID: 313
+            ?
+                PORT_ID: 220
+            :
+                PC_PHYS_PORT_ID: 321
+            ?
+                PORT_ID: 221
+            :
+                PC_PHYS_PORT_ID: 329
+            ?
+                PORT_ID: 231
+            :
+                PC_PHYS_PORT_ID: 337
+            ?
+                PORT_ID: 232
+            :
+                PC_PHYS_PORT_ID: 345
+            ?
+                PORT_ID: 242
+            :
+                PC_PHYS_PORT_ID: 353
+            ?
+                PORT_ID: 243
+            :
+                PC_PHYS_PORT_ID: 361
+            ?
+                PORT_ID: 253
+            :
+                PC_PHYS_PORT_ID: 369
+            ?
+                PORT_ID: 254
+            :
+                PC_PHYS_PORT_ID: 377
+            ?
+                PORT_ID: 264
+            :
+                PC_PHYS_PORT_ID: 385
+            ?
+                PORT_ID: 265
+            :
+                PC_PHYS_PORT_ID: 393
+            ?
+                PORT_ID: 275
+            :
+                PC_PHYS_PORT_ID: 401
+            ?
+                PORT_ID: 276
+            :
+                PC_PHYS_PORT_ID: 409
+            ?
+                PORT_ID: 286
+            :
+                PC_PHYS_PORT_ID: 417
+            ?
+                PORT_ID: 287
+            :
+                PC_PHYS_PORT_ID: 425
+            ?
+                PORT_ID: 297
+            :
+                PC_PHYS_PORT_ID: 433
+            ?
+                PORT_ID: 298
+            :
+                PC_PHYS_PORT_ID: 441
+            ?
+                PORT_ID: 308
+            :
+                PC_PHYS_PORT_ID: 449
+            ?
+                PORT_ID: 309
+            :
+                PC_PHYS_PORT_ID: 457
+            ?
+                PORT_ID: 319
+            :
+                PC_PHYS_PORT_ID: 465
+            ?
+                PORT_ID: 320
+            :
+                PC_PHYS_PORT_ID: 473
+            ?
+                PORT_ID: 330
+            :
+                PC_PHYS_PORT_ID: 481
+            ?
+                PORT_ID: 331
+            :
+                PC_PHYS_PORT_ID: 489
+            ?
+                PORT_ID: 341
+            :
+                PC_PHYS_PORT_ID: 497
+            ?
+                PORT_ID: 342
+            :
+                PC_PHYS_PORT_ID: 505
+...
+---
+device:
+    0:
+        PC_PORT:
+            ?
+                PORT_ID: [[1, 2],
+                          [11, 12],
+                          [22, 23],
+                          [33, 34],
+                          [44, 45],
+                          [55, 56],
+                          [66, 67],
+                          [77, 78],
+                          [88, 89],
+                          [99, 100],
+                          [110, 111],
+                          [121, 122],
+                          [132, 133],
+                          [143, 144],
+                          [154, 155],
+                          [165, 166],
+                          [176, 177],
+                          [187, 188],
+                          [198, 199],
+                          [209, 210],
+                          [220, 221],
+                          [231, 232],
+                          [242, 243],
+                          [253, 254],
+                          [264, 265],
+                          [275, 276],
+                          [286, 287],
+                          [297, 298],
+                          [308, 309],
+                          [319, 320],
+                          [330, 331],
+                          [341, 342]]
+            :
+                ENABLE: 1
+                SPEED: 800000
+                NUM_LANES: 8
+                FEC_MODE: PC_FEC_RS544_2XN
+                MAX_FRAME_SIZE: 9416
+...
+---
+bcm_device:
+    0:
+        global:
+            ftem_mem_entries: 65536
+...
+---
+device:
+    0:
+        # Per pipe flex counter configuration
+        CTR_EFLEX_CONFIG:
+            CTR_ING_EFLEX_OPERMODE_PIPEUNIQUE: 0
+            CTR_EGR_EFLEX_OPERMODE_PIPEUNIQUE: 0
+
+        # IFP mode
+        FP_CONFIG:
+            FP_ING_OPERMODE: GLOBAL_PIPE_AWARE
+...
+---
+device:
+    0:
+        DEVICE_CONFIG:
+            AUTOLOAD_BOARD_SETTINGS: 0
+...
diff --git a/device/arista/x86_64-arista_7060x6_64pe/default_sku b/device/arista/x86_64-arista_7060x6_64pe/default_sku
new file mode 100644
index 000000000..a2770760b
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe/default_sku
@@ -0,0 +1 @@
+Arista-7060X6-64PE t1
diff --git a/device/arista/x86_64-arista_7060x6_64pe/pcie.yaml b/device/arista/x86_64-arista_7060x6_64pe/pcie.yaml
new file mode 120000
index 000000000..df18a601d
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe/pcie.yaml
@@ -0,0 +1 @@
+../x86_64-arista_common/pcie.yaml
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_64pe/platform.json b/device/arista/x86_64-arista_7060x6_64pe/platform.json
new file mode 100644
index 000000000..a249a56b4
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe/platform.json
@@ -0,0 +1,1336 @@
+{
+    "chassis": {
+        "name": "DCS-7060X6-64PE",
+        "components": [
+            {
+                "name": "Aboot()"
+            },
+            {
+                "name": "Scd(addr=0000:00:18.7)"
+            },
+            {
+                "name": "Scd(addr=0000:03:00.0)"
+            },
+            {
+                "name": "ShearwaterSysCpld(addr=13-0023)"
+            }
+        ],
+        "fans": [],
+        "fan_drawers": [
+            {
+                "name": "slot1",
+                "fans": [
+                    {
+                        "name": "fan1"
+                    }
+                ]
+            },
+            {
+                "name": "slot2",
+                "fans": [
+                    {
+                        "name": "fan2"
+                    }
+                ]
+            },
+            {
+                "name": "slot3",
+                "fans": [
+                    {
+                        "name": "fan3"
+                    }
+                ]
+            },
+            {
+                "name": "slot4",
+                "fans": [
+                    {
+                        "name": "fan4"
+                    }
+                ]
+            }
+        ],
+        "psus": [
+            {
+                "name": "psu1",
+                "voltage_high_threshold": false,
+                "voltage_low_threshold": false,
+                "fans": [
+                    {
+                        "name": "psu1/1",
+                        "speed": {
+                            "controllable": false
+                        }
+                    }
+                ]
+            },
+            {
+                "name": "psu2",
+                "voltage_high_threshold": false,
+                "voltage_low_threshold": false,
+                "fans": [
+                    {
+                        "name": "psu2/1",
+                        "speed": {
+                            "controllable": false
+                        }
+                    }
+                ]
+            }
+        ],
+        "thermals": [
+            {
+                "name": "Cpu temp sensor",
+                "controllable": false
+            },
+            {
+                "name": "Ambient",
+                "controllable": false
+            },
+            {
+                "name": "Outlet",
+                "controllable": false
+            },
+            {
+                "name": "Switch Card temp sensor",
+                "controllable": false
+            },
+            {
+                "name": "Air Exit Behind TH5",
+                "controllable": false
+            },
+            {
+                "name": "Left Edge PCB Near Rear of Switch",
+                "controllable": false
+            },
+            {
+                "name": "Air Inlet",
+                "controllable": false
+            },
+            {
+                "name": "Management Card Inlet",
+                "controllable": false
+            }
+        ],
+        "sfps": [
+            {
+                "name": "osfp1"
+            },
+            {
+                "name": "osfp2"
+            },
+            {
+                "name": "osfp3"
+            },
+            {
+                "name": "osfp4"
+            },
+            {
+                "name": "osfp5"
+            },
+            {
+                "name": "osfp6"
+            },
+            {
+                "name": "osfp7"
+            },
+            {
+                "name": "osfp8"
+            },
+            {
+                "name": "osfp9"
+            },
+            {
+                "name": "osfp10"
+            },
+            {
+                "name": "osfp11"
+            },
+            {
+                "name": "osfp12"
+            },
+            {
+                "name": "osfp13"
+            },
+            {
+                "name": "osfp14"
+            },
+            {
+                "name": "osfp15"
+            },
+            {
+                "name": "osfp16"
+            },
+            {
+                "name": "osfp17"
+            },
+            {
+                "name": "osfp18"
+            },
+            {
+                "name": "osfp19"
+            },
+            {
+                "name": "osfp20"
+            },
+            {
+                "name": "osfp21"
+            },
+            {
+                "name": "osfp22"
+            },
+            {
+                "name": "osfp23"
+            },
+            {
+                "name": "osfp24"
+            },
+            {
+                "name": "osfp25"
+            },
+            {
+                "name": "osfp26"
+            },
+            {
+                "name": "osfp27"
+            },
+            {
+                "name": "osfp28"
+            },
+            {
+                "name": "osfp29"
+            },
+            {
+                "name": "osfp30"
+            },
+            {
+                "name": "osfp31"
+            },
+            {
+                "name": "osfp32"
+            },
+            {
+                "name": "osfp33"
+            },
+            {
+                "name": "osfp34"
+            },
+            {
+                "name": "osfp35"
+            },
+            {
+                "name": "osfp36"
+            },
+            {
+                "name": "osfp37"
+            },
+            {
+                "name": "osfp38"
+            },
+            {
+                "name": "osfp39"
+            },
+            {
+                "name": "osfp40"
+            },
+            {
+                "name": "osfp41"
+            },
+            {
+                "name": "osfp42"
+            },
+            {
+                "name": "osfp43"
+            },
+            {
+                "name": "osfp44"
+            },
+            {
+                "name": "osfp45"
+            },
+            {
+                "name": "osfp46"
+            },
+            {
+                "name": "osfp47"
+            },
+            {
+                "name": "osfp48"
+            },
+            {
+                "name": "osfp49"
+            },
+            {
+                "name": "osfp50"
+            },
+            {
+                "name": "osfp51"
+            },
+            {
+                "name": "osfp52"
+            },
+            {
+                "name": "osfp53"
+            },
+            {
+                "name": "osfp54"
+            },
+            {
+                "name": "osfp55"
+            },
+            {
+                "name": "osfp56"
+            },
+            {
+                "name": "osfp57"
+            },
+            {
+                "name": "osfp58"
+            },
+            {
+                "name": "osfp59"
+            },
+            {
+                "name": "osfp60"
+            },
+            {
+                "name": "osfp61"
+            },
+            {
+                "name": "osfp62"
+            },
+            {
+                "name": "osfp63"
+            },
+            {
+                "name": "osfp64"
+            }
+        ]
+    },
+    "interfaces": {
+        "Ethernet0": {
+            "index": "1,1,1,1,1,1,1,1",
+            "lanes": "17,18,19,20,21,22,23,24",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet1/1"
+                ],
+                "1x400G": [
+                    "Ethernet1/1"
+                ],
+                "2x400G": [
+                    "Ethernet1/1",
+                    "Ethernet1/5"
+                ]
+            }
+        },
+        "Ethernet8": {
+            "index": "2,2,2,2,2,2,2,2",
+            "lanes": "1,2,3,4,5,6,7,8",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet2/1"
+                ],
+                "1x400G": [
+                    "Ethernet2/1"
+                ],
+                "2x400G": [
+                    "Ethernet2/1",
+                    "Ethernet2/5"
+                ]
+            }
+        },
+        "Ethernet16": {
+            "index": "3,3,3,3,3,3,3,3",
+            "lanes": "9,10,11,12,13,14,15,16",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet3/1"
+                ],
+                "1x400G": [
+                    "Ethernet3/1"
+                ],
+                "2x400G": [
+                    "Ethernet3/1",
+                    "Ethernet3/5"
+                ]
+            }
+        },
+        "Ethernet24": {
+            "index": "4,4,4,4,4,4,4,4",
+            "lanes": "25,26,27,28,29,30,31,32",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet4/1"
+                ],
+                "1x400G": [
+                    "Ethernet4/1"
+                ],
+                "2x400G": [
+                    "Ethernet4/1",
+                    "Ethernet4/5"
+                ]
+            }
+        },
+        "Ethernet32": {
+            "index": "5,5,5,5,5,5,5,5",
+            "lanes": "57,58,59,60,61,62,63,64",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet5/1"
+                ],
+                "1x400G": [
+                    "Ethernet5/1"
+                ],
+                "2x400G": [
+                    "Ethernet5/1",
+                    "Ethernet5/5"
+                ]
+            }
+        },
+        "Ethernet40": {
+            "index": "6,6,6,6,6,6,6,6",
+            "lanes": "41,42,43,44,45,46,47,48",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet6/1"
+                ],
+                "1x400G": [
+                    "Ethernet6/1"
+                ],
+                "2x400G": [
+                    "Ethernet6/1",
+                    "Ethernet6/5"
+                ]
+            }
+        },
+        "Ethernet48": {
+            "index": "7,7,7,7,7,7,7,7",
+            "lanes": "33,34,35,36,37,38,39,40",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet7/1"
+                ],
+                "1x400G": [
+                    "Ethernet7/1"
+                ],
+                "2x400G": [
+                    "Ethernet7/1",
+                    "Ethernet7/5"
+                ]
+            }
+        },
+        "Ethernet56": {
+            "index": "8,8,8,8,8,8,8,8",
+            "lanes": "49,50,51,52,53,54,55,56",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet8/1"
+                ],
+                "1x400G": [
+                    "Ethernet8/1"
+                ],
+                "2x400G": [
+                    "Ethernet8/1",
+                    "Ethernet8/5"
+                ]
+            }
+        },
+        "Ethernet64": {
+            "index": "9,9,9,9,9,9,9,9",
+            "lanes": "89,90,91,92,93,94,95,96",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet9/1"
+                ],
+                "1x400G": [
+                    "Ethernet9/1"
+                ],
+                "2x400G": [
+                    "Ethernet9/1",
+                    "Ethernet9/5"
+                ]
+            }
+        },
+        "Ethernet72": {
+            "index": "10,10,10,10,10,10,10,10",
+            "lanes": "73,74,75,76,77,78,79,80",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet10/1"
+                ],
+                "1x400G": [
+                    "Ethernet10/1"
+                ],
+                "2x400G": [
+                    "Ethernet10/1",
+                    "Ethernet10/5"
+                ]
+            }
+        },
+        "Ethernet80": {
+            "index": "11,11,11,11,11,11,11,11",
+            "lanes": "65,66,67,68,69,70,71,72",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet11/1"
+                ],
+                "1x400G": [
+                    "Ethernet11/1"
+                ],
+                "2x400G": [
+                    "Ethernet11/1",
+                    "Ethernet11/5"
+                ]
+            }
+        },
+        "Ethernet88": {
+            "index": "12,12,12,12,12,12,12,12",
+            "lanes": "81,82,83,84,85,86,87,88",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet12/1"
+                ],
+                "1x400G": [
+                    "Ethernet12/1"
+                ],
+                "2x400G": [
+                    "Ethernet12/1",
+                    "Ethernet12/5"
+                ]
+            }
+        },
+        "Ethernet96": {
+            "index": "13,13,13,13,13,13,13,13",
+            "lanes": "121,122,123,124,125,126,127,128",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet13/1"
+                ],
+                "1x400G": [
+                    "Ethernet13/1"
+                ],
+                "2x400G": [
+                    "Ethernet13/1",
+                    "Ethernet13/5"
+                ]
+            }
+        },
+        "Ethernet104": {
+            "index": "14,14,14,14,14,14,14,14",
+            "lanes": "105,106,107,108,109,110,111,112",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet14/1"
+                ],
+                "1x400G": [
+                    "Ethernet14/1"
+                ],
+                "2x400G": [
+                    "Ethernet14/1",
+                    "Ethernet14/5"
+                ]
+            }
+        },
+        "Ethernet112": {
+            "index": "15,15,15,15,15,15,15,15",
+            "lanes": "97,98,99,100,101,102,103,104",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet15/1"
+                ],
+                "1x400G": [
+                    "Ethernet15/1"
+                ],
+                "2x400G": [
+                    "Ethernet15/1",
+                    "Ethernet15/5"
+                ]
+            }
+        },
+        "Ethernet120": {
+            "index": "16,16,16,16,16,16,16,16",
+            "lanes": "113,114,115,116,117,118,119,120",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet16/1"
+                ],
+                "1x400G": [
+                    "Ethernet16/1"
+                ],
+                "2x400G": [
+                    "Ethernet16/1",
+                    "Ethernet16/5"
+                ]
+            }
+        },
+        "Ethernet128": {
+            "index": "17,17,17,17,17,17,17,17",
+            "lanes": "153,154,155,156,157,158,159,160",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet17/1"
+                ],
+                "1x400G": [
+                    "Ethernet17/1"
+                ],
+                "2x400G": [
+                    "Ethernet17/1",
+                    "Ethernet17/5"
+                ]
+            }
+        },
+        "Ethernet136": {
+            "index": "18,18,18,18,18,18,18,18",
+            "lanes": "137,138,139,140,141,142,143,144",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet18/1"
+                ],
+                "1x400G": [
+                    "Ethernet18/1"
+                ],
+                "2x400G": [
+                    "Ethernet18/1",
+                    "Ethernet18/5"
+                ]
+            }
+        },
+        "Ethernet144": {
+            "index": "19,19,19,19,19,19,19,19",
+            "lanes": "129,130,131,132,133,134,135,136",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet19/1"
+                ],
+                "1x400G": [
+                    "Ethernet19/1"
+                ],
+                "2x400G": [
+                    "Ethernet19/1",
+                    "Ethernet19/5"
+                ]
+            }
+        },
+        "Ethernet152": {
+            "index": "20,20,20,20,20,20,20,20",
+            "lanes": "145,146,147,148,149,150,151,152",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet20/1"
+                ],
+                "1x400G": [
+                    "Ethernet20/1"
+                ],
+                "2x400G": [
+                    "Ethernet20/1",
+                    "Ethernet20/5"
+                ]
+            }
+        },
+        "Ethernet160": {
+            "index": "21,21,21,21,21,21,21,21",
+            "lanes": "185,186,187,188,189,190,191,192",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet21/1"
+                ],
+                "1x400G": [
+                    "Ethernet21/1"
+                ],
+                "2x400G": [
+                    "Ethernet21/1",
+                    "Ethernet21/5"
+                ]
+            }
+        },
+        "Ethernet168": {
+            "index": "22,22,22,22,22,22,22,22",
+            "lanes": "169,170,171,172,173,174,175,176",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet22/1"
+                ],
+                "1x400G": [
+                    "Ethernet22/1"
+                ],
+                "2x400G": [
+                    "Ethernet22/1",
+                    "Ethernet22/5"
+                ]
+            }
+        },
+        "Ethernet176": {
+            "index": "23,23,23,23,23,23,23,23",
+            "lanes": "161,162,163,164,165,166,167,168",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet23/1"
+                ],
+                "1x400G": [
+                    "Ethernet23/1"
+                ],
+                "2x400G": [
+                    "Ethernet23/1",
+                    "Ethernet23/5"
+                ]
+            }
+        },
+        "Ethernet184": {
+            "index": "24,24,24,24,24,24,24,24",
+            "lanes": "177,178,179,180,181,182,183,184",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet24/1"
+                ],
+                "1x400G": [
+                    "Ethernet24/1"
+                ],
+                "2x400G": [
+                    "Ethernet24/1",
+                    "Ethernet24/5"
+                ]
+            }
+        },
+        "Ethernet192": {
+            "index": "25,25,25,25,25,25,25,25",
+            "lanes": "217,218,219,220,221,222,223,224",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet25/1"
+                ],
+                "1x400G": [
+                    "Ethernet25/1"
+                ],
+                "2x400G": [
+                    "Ethernet25/1",
+                    "Ethernet25/5"
+                ]
+            }
+        },
+        "Ethernet200": {
+            "index": "26,26,26,26,26,26,26,26",
+            "lanes": "201,202,203,204,205,206,207,208",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet26/1"
+                ],
+                "1x400G": [
+                    "Ethernet26/1"
+                ],
+                "2x400G": [
+                    "Ethernet26/1",
+                    "Ethernet26/5"
+                ]
+            }
+        },
+        "Ethernet208": {
+            "index": "27,27,27,27,27,27,27,27",
+            "lanes": "193,194,195,196,197,198,199,200",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet27/1"
+                ],
+                "1x400G": [
+                    "Ethernet27/1"
+                ],
+                "2x400G": [
+                    "Ethernet27/1",
+                    "Ethernet27/5"
+                ]
+            }
+        },
+        "Ethernet216": {
+            "index": "28,28,28,28,28,28,28,28",
+            "lanes": "209,210,211,212,213,214,215,216",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet28/1"
+                ],
+                "1x400G": [
+                    "Ethernet28/1"
+                ],
+                "2x400G": [
+                    "Ethernet28/1",
+                    "Ethernet28/5"
+                ]
+            }
+        },
+        "Ethernet224": {
+            "index": "29,29,29,29,29,29,29,29",
+            "lanes": "249,250,251,252,253,254,255,256",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet29/1"
+                ],
+                "1x400G": [
+                    "Ethernet29/1"
+                ],
+                "2x400G": [
+                    "Ethernet29/1",
+                    "Ethernet29/5"
+                ]
+            }
+        },
+        "Ethernet232": {
+            "index": "30,30,30,30,30,30,30,30",
+            "lanes": "233,234,235,236,237,238,239,240",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet30/1"
+                ],
+                "1x400G": [
+                    "Ethernet30/1"
+                ],
+                "2x400G": [
+                    "Ethernet30/1",
+                    "Ethernet30/5"
+                ]
+            }
+        },
+        "Ethernet240": {
+            "index": "31,31,31,31,31,31,31,31",
+            "lanes": "225,226,227,228,229,230,231,232",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet31/1"
+                ],
+                "1x400G": [
+                    "Ethernet31/1"
+                ],
+                "2x400G": [
+                    "Ethernet31/1",
+                    "Ethernet31/5"
+                ]
+            }
+        },
+        "Ethernet248": {
+            "index": "32,32,32,32,32,32,32,32",
+            "lanes": "241,242,243,244,245,246,247,248",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet32/1"
+                ],
+                "1x400G": [
+                    "Ethernet32/1"
+                ],
+                "2x400G": [
+                    "Ethernet32/1",
+                    "Ethernet32/5"
+                ]
+            }
+        },
+        "Ethernet256": {
+            "index": "33,33,33,33,33,33,33,33",
+            "lanes": "273,274,275,276,277,278,279,280",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet33/1"
+                ],
+                "1x400G": [
+                    "Ethernet33/1"
+                ],
+                "2x400G": [
+                    "Ethernet33/1",
+                    "Ethernet33/5"
+                ]
+            }
+        },
+        "Ethernet264": {
+            "index": "34,34,34,34,34,34,34,34",
+            "lanes": "257,258,259,260,261,262,263,264",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet34/1"
+                ],
+                "1x400G": [
+                    "Ethernet34/1"
+                ],
+                "2x400G": [
+                    "Ethernet34/1",
+                    "Ethernet34/5"
+                ]
+            }
+        },
+        "Ethernet272": {
+            "index": "35,35,35,35,35,35,35,35",
+            "lanes": "265,266,267,268,269,270,271,272",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet35/1"
+                ],
+                "1x400G": [
+                    "Ethernet35/1"
+                ],
+                "2x400G": [
+                    "Ethernet35/1",
+                    "Ethernet35/5"
+                ]
+            }
+        },
+        "Ethernet280": {
+            "index": "36,36,36,36,36,36,36,36",
+            "lanes": "281,282,283,284,285,286,287,288",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet36/1"
+                ],
+                "1x400G": [
+                    "Ethernet36/1"
+                ],
+                "2x400G": [
+                    "Ethernet36/1",
+                    "Ethernet36/5"
+                ]
+            }
+        },
+        "Ethernet288": {
+            "index": "37,37,37,37,37,37,37,37",
+            "lanes": "313,314,315,316,317,318,319,320",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet37/1"
+                ],
+                "1x400G": [
+                    "Ethernet37/1"
+                ],
+                "2x400G": [
+                    "Ethernet37/1",
+                    "Ethernet37/5"
+                ]
+            }
+        },
+        "Ethernet296": {
+            "index": "38,38,38,38,38,38,38,38",
+            "lanes": "297,298,299,300,301,302,303,304",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet38/1"
+                ],
+                "1x400G": [
+                    "Ethernet38/1"
+                ],
+                "2x400G": [
+                    "Ethernet38/1",
+                    "Ethernet38/5"
+                ]
+            }
+        },
+        "Ethernet304": {
+            "index": "39,39,39,39,39,39,39,39",
+            "lanes": "289,290,291,292,293,294,295,296",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet39/1"
+                ],
+                "1x400G": [
+                    "Ethernet39/1"
+                ],
+                "2x400G": [
+                    "Ethernet39/1",
+                    "Ethernet39/5"
+                ]
+            }
+        },
+        "Ethernet312": {
+            "index": "40,40,40,40,40,40,40,40",
+            "lanes": "305,306,307,308,309,310,311,312",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet40/1"
+                ],
+                "1x400G": [
+                    "Ethernet40/1"
+                ],
+                "2x400G": [
+                    "Ethernet40/1",
+                    "Ethernet40/5"
+                ]
+            }
+        },
+        "Ethernet320": {
+            "index": "41,41,41,41,41,41,41,41",
+            "lanes": "345,346,347,348,349,350,351,352",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet41/1"
+                ],
+                "1x400G": [
+                    "Ethernet41/1"
+                ],
+                "2x400G": [
+                    "Ethernet41/1",
+                    "Ethernet41/5"
+                ]
+            }
+        },
+        "Ethernet328": {
+            "index": "42,42,42,42,42,42,42,42",
+            "lanes": "329,330,331,332,333,334,335,336",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet42/1"
+                ],
+                "1x400G": [
+                    "Ethernet42/1"
+                ],
+                "2x400G": [
+                    "Ethernet42/1",
+                    "Ethernet42/5"
+                ]
+            }
+        },
+        "Ethernet336": {
+            "index": "43,43,43,43,43,43,43,43",
+            "lanes": "321,322,323,324,325,326,327,328",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet43/1"
+                ],
+                "1x400G": [
+                    "Ethernet43/1"
+                ],
+                "2x400G": [
+                    "Ethernet43/1",
+                    "Ethernet43/5"
+                ]
+            }
+        },
+        "Ethernet344": {
+            "index": "44,44,44,44,44,44,44,44",
+            "lanes": "337,338,339,340,341,342,343,344",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet44/1"
+                ],
+                "1x400G": [
+                    "Ethernet44/1"
+                ],
+                "2x400G": [
+                    "Ethernet44/1",
+                    "Ethernet44/5"
+                ]
+            }
+        },
+        "Ethernet352": {
+            "index": "45,45,45,45,45,45,45,45",
+            "lanes": "377,378,379,380,381,382,383,384",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet45/1"
+                ],
+                "1x400G": [
+                    "Ethernet45/1"
+                ],
+                "2x400G": [
+                    "Ethernet45/1",
+                    "Ethernet45/5"
+                ]
+            }
+        },
+        "Ethernet360": {
+            "index": "46,46,46,46,46,46,46,46",
+            "lanes": "361,362,363,364,365,366,367,368",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet46/1"
+                ],
+                "1x400G": [
+                    "Ethernet46/1"
+                ],
+                "2x400G": [
+                    "Ethernet46/1",
+                    "Ethernet46/5"
+                ]
+            }
+        },
+        "Ethernet368": {
+            "index": "47,47,47,47,47,47,47,47",
+            "lanes": "353,354,355,356,357,358,359,360",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet47/1"
+                ],
+                "1x400G": [
+                    "Ethernet47/1"
+                ],
+                "2x400G": [
+                    "Ethernet47/1",
+                    "Ethernet47/5"
+                ]
+            }
+        },
+        "Ethernet376": {
+            "index": "48,48,48,48,48,48,48,48",
+            "lanes": "369,370,371,372,373,374,375,376",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet48/1"
+                ],
+                "1x400G": [
+                    "Ethernet48/1"
+                ],
+                "2x400G": [
+                    "Ethernet48/1",
+                    "Ethernet48/5"
+                ]
+            }
+        },
+        "Ethernet384": {
+            "index": "49,49,49,49,49,49,49,49",
+            "lanes": "409,410,411,412,413,414,415,416",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet49/1"
+                ],
+                "1x400G": [
+                    "Ethernet49/1"
+                ],
+                "2x400G": [
+                    "Ethernet49/1",
+                    "Ethernet49/5"
+                ]
+            }
+        },
+        "Ethernet392": {
+            "index": "50,50,50,50,50,50,50,50",
+            "lanes": "393,394,395,396,397,398,399,400",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet50/1"
+                ],
+                "1x400G": [
+                    "Ethernet50/1"
+                ],
+                "2x400G": [
+                    "Ethernet50/1",
+                    "Ethernet50/5"
+                ]
+            }
+        },
+        "Ethernet400": {
+            "index": "51,51,51,51,51,51,51,51",
+            "lanes": "385,386,387,388,389,390,391,392",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet51/1"
+                ],
+                "1x400G": [
+                    "Ethernet51/1"
+                ],
+                "2x400G": [
+                    "Ethernet51/1",
+                    "Ethernet51/5"
+                ]
+            }
+        },
+        "Ethernet408": {
+            "index": "52,52,52,52,52,52,52,52",
+            "lanes": "401,402,403,404,405,406,407,408",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet52/1"
+                ],
+                "1x400G": [
+                    "Ethernet52/1"
+                ],
+                "2x400G": [
+                    "Ethernet52/1",
+                    "Ethernet52/5"
+                ]
+            }
+        },
+        "Ethernet416": {
+            "index": "53,53,53,53,53,53,53,53",
+            "lanes": "441,442,443,444,445,446,447,448",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet53/1"
+                ],
+                "1x400G": [
+                    "Ethernet53/1"
+                ],
+                "2x400G": [
+                    "Ethernet53/1",
+                    "Ethernet53/5"
+                ]
+            }
+        },
+        "Ethernet424": {
+            "index": "54,54,54,54,54,54,54,54",
+            "lanes": "425,426,427,428,429,430,431,432",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet54/1"
+                ],
+                "1x400G": [
+                    "Ethernet54/1"
+                ],
+                "2x400G": [
+                    "Ethernet54/1",
+                    "Ethernet54/5"
+                ]
+            }
+        },
+        "Ethernet432": {
+            "index": "55,55,55,55,55,55,55,55",
+            "lanes": "417,418,419,420,421,422,423,424",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet55/1"
+                ],
+                "1x400G": [
+                    "Ethernet55/1"
+                ],
+                "2x400G": [
+                    "Ethernet55/1",
+                    "Ethernet55/5"
+                ]
+            }
+        },
+        "Ethernet440": {
+            "index": "56,56,56,56,56,56,56,56",
+            "lanes": "433,434,435,436,437,438,439,440",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet56/1"
+                ],
+                "1x400G": [
+                    "Ethernet56/1"
+                ],
+                "2x400G": [
+                    "Ethernet56/1",
+                    "Ethernet56/5"
+                ]
+            }
+        },
+        "Ethernet448": {
+            "index": "57,57,57,57,57,57,57,57",
+            "lanes": "473,474,475,476,477,478,479,480",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet57/1"
+                ],
+                "1x400G": [
+                    "Ethernet57/1"
+                ],
+                "2x400G": [
+                    "Ethernet57/1",
+                    "Ethernet57/5"
+                ]
+            }
+        },
+        "Ethernet456": {
+            "index": "58,58,58,58,58,58,58,58",
+            "lanes": "457,458,459,460,461,462,463,464",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet58/1"
+                ],
+                "1x400G": [
+                    "Ethernet58/1"
+                ],
+                "2x400G": [
+                    "Ethernet58/1",
+                    "Ethernet58/5"
+                ]
+            }
+        },
+        "Ethernet464": {
+            "index": "59,59,59,59,59,59,59,59",
+            "lanes": "449,450,451,452,453,454,455,456",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet59/1"
+                ],
+                "1x400G": [
+                    "Ethernet59/1"
+                ],
+                "2x400G": [
+                    "Ethernet59/1",
+                    "Ethernet59/5"
+                ]
+            }
+        },
+        "Ethernet472": {
+            "index": "60,60,60,60,60,60,60,60",
+            "lanes": "465,466,467,468,469,470,471,472",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet60/1"
+                ],
+                "1x400G": [
+                    "Ethernet60/1"
+                ],
+                "2x400G": [
+                    "Ethernet60/1",
+                    "Ethernet60/5"
+                ]
+            }
+        },
+        "Ethernet480": {
+            "index": "61,61,61,61,61,61,61,61",
+            "lanes": "505,506,507,508,509,510,511,512",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet61/1"
+                ],
+                "1x400G": [
+                    "Ethernet61/1"
+                ],
+                "2x400G": [
+                    "Ethernet61/1",
+                    "Ethernet61/5"
+                ]
+            }
+        },
+        "Ethernet488": {
+            "index": "62,62,62,62,62,62,62,62",
+            "lanes": "489,490,491,492,493,494,495,496",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet62/1"
+                ],
+                "1x400G": [
+                    "Ethernet62/1"
+                ],
+                "2x400G": [
+                    "Ethernet62/1",
+                    "Ethernet62/5"
+                ]
+            }
+        },
+        "Ethernet496": {
+            "index": "63,63,63,63,63,63,63,63",
+            "lanes": "481,482,483,484,485,486,487,488",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet63/1"
+                ],
+                "1x400G": [
+                    "Ethernet63/1"
+                ],
+                "2x400G": [
+                    "Ethernet63/1",
+                    "Ethernet63/5"
+                ]
+            }
+        },
+        "Ethernet504": {
+            "index": "64,64,64,64,64,64,64,64",
+            "lanes": "497,498,499,500,501,502,503,504",
+            "breakout_modes": {
+                "1x800G[400G]": [
+                    "Ethernet64/1"
+                ],
+                "1x400G": [
+                    "Ethernet64/1"
+                ],
+                "2x400G": [
+                    "Ethernet64/1",
+                    "Ethernet64/5"
+                ]
+            }
+        }
+    }
+}
diff --git a/device/arista/x86_64-arista_7060x6_64pe/platform_asic b/device/arista/x86_64-arista_7060x6_64pe/platform_asic
new file mode 100644
index 000000000..960467652
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe/platform_asic
@@ -0,0 +1 @@
+broadcom
diff --git a/device/arista/x86_64-arista_7060x6_64pe/platform_components.json b/device/arista/x86_64-arista_7060x6_64pe/platform_components.json
new file mode 100644
index 000000000..2295cd3a9
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe/platform_components.json
@@ -0,0 +1,12 @@
+{
+   "chassis": {
+      "DCS-7060X6-64PE": {
+         "component": {
+            "Aboot()": {},
+            "Scd(addr=0000:00:18.7)": {},
+            "Scd(addr=0000:03:00.0)": {},
+            "ShearwaterSysCpld(addr=13-0023)": {}
+         }
+      }
+   }
+}
diff --git a/device/arista/x86_64-arista_7060x6_64pe/platform_env.conf b/device/arista/x86_64-arista_7060x6_64pe/platform_env.conf
new file mode 100644
index 000000000..dd7cf4fe0
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe/platform_env.conf
@@ -0,0 +1,2 @@
+SYNCD_SHM_SIZE=512m
+is_ltsw_chip=1
diff --git a/device/arista/x86_64-arista_7060x6_64pe/platform_reboot b/device/arista/x86_64-arista_7060x6_64pe/platform_reboot
new file mode 120000
index 000000000..7f94a49e3
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe/platform_reboot
@@ -0,0 +1 @@
+../x86_64-arista_common/platform_reboot
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_64pe/plugins b/device/arista/x86_64-arista_7060x6_64pe/plugins
new file mode 120000
index 000000000..789a45fca
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe/plugins
@@ -0,0 +1 @@
+../x86_64-arista_common/plugins
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_64pe/pmon_daemon_control.json b/device/arista/x86_64-arista_7060x6_64pe/pmon_daemon_control.json
new file mode 120000
index 000000000..51d5ab7b0
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe/pmon_daemon_control.json
@@ -0,0 +1 @@
+../x86_64-arista_common/pmon_daemon_control.json
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_64pe/sensors.conf b/device/arista/x86_64-arista_7060x6_64pe/sensors.conf
new file mode 100644
index 000000000..a3f85d5ae
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe/sensors.conf
@@ -0,0 +1,26 @@
+bus "i2c-25" "SCD 0000:03:00.0 SMBus master 1 bus 0"
+bus "i2c-28" "SCD 0000:03:00.0 SMBus master 1 bus 3"
+bus "i2c-29" "SCD 0000:03:00.0 SMBus master 1 bus 4"
+
+chip "max6581-i2c-25-4d"
+    ignore temp5
+    ignore temp6
+    ignore temp7
+    ignore temp8
+
+chip "nvme-pci-0400"
+    # TODO: sensors complaining about tempX_min and tempX_max
+    ignore temp2
+    ignore temp3
+    ignore temp4
+    ignore temp5
+    ignore temp6
+    ignore temp7
+
+chip "pmbus-i2c-28-58"
+    ignore fan3
+    ignore fan4
+
+chip "pmbus-i2c-29-58"
+    ignore fan3
+    ignore fan4
diff --git a/device/arista/x86_64-arista_7060x6_64pe/system_health_monitoring_config.json b/device/arista/x86_64-arista_7060x6_64pe/system_health_monitoring_config.json
new file mode 120000
index 000000000..1185f771f
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe/system_health_monitoring_config.json
@@ -0,0 +1 @@
+../x86_64-arista_common/system_health_monitoring_config.json
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_64pe/thermal_policy.json b/device/arista/x86_64-arista_7060x6_64pe/thermal_policy.json
new file mode 120000
index 000000000..0991dc7f3
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe/thermal_policy.json
@@ -0,0 +1 @@
+../x86_64-arista_common/thermal_policy.json
\ No newline at end of file
diff --git a/files/Aboot/boot0.j2 b/files/Aboot/boot0.j2
index 43f3fcae1..439debc74 100644
--- a/files/Aboot/boot0.j2
+++ b/files/Aboot/boot0.j2
@@ -626,6 +626,9 @@ write_platform_specific_cmdline() {
     if in_array "$sid" "Shearwater4Mk2" "Shearwater4Mk2N" "Shearwater4Mk2QuicksilverDD" "Shearwater4Mk2NQuicksilverDD"; then
         aboot_machine=arista_7060x6_64de
     fi
+    if in_array "$sid" "Shearwater4Mk2QuicksilverP" "Shearwater4Mk2NQuicksilverP"; then
+        aboot_machine=arista_7060x6_64pe
+    fi
 
     # disable cpu c-state other than C1
     local cpuvendor="$(sed -nr 's/vendor_id[\t ]*: (.*)/\1/p' /proc/cpuinfo | head -n 1)"
@@ -668,6 +671,7 @@ write_platform_specific_cmdline() {
         read_system_eeprom
     fi
     if in_array "$platform" "shearwater"; then
+        cmdline_add modprobe.blacklist=snd_hda_intel,hdaudio
         if [ -f /tmp/.switch-prefdl ]; then
             read_switch_eeprom
         else

From 7f011017cb23741a878c39819fcf058f41975681 Mon Sep 17 00:00:00 2001
From: Samuel Angebault <staphylo@arista.com>
Date: Mon, 6 May 2024 06:22:48 -0700
Subject: [PATCH 0519/1115] Add 256x200G hwsku for QuicksilverP

---
 .../port_config.ini                           |  257 +++
 .../Arista-7060X6-64PE-256x200G/sai.profile   |    1 +
 .../th5-a7060x6-64pe.config.bcm               | 1913 +++++++++++++++++
 3 files changed, 2171 insertions(+)
 create mode 100644 device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/port_config.ini
 create mode 100644 device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/sai.profile
 create mode 100644 device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/th5-a7060x6-64pe.config.bcm

diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/port_config.ini b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/port_config.ini
new file mode 100644
index 000000000..323b8e261
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/port_config.ini
@@ -0,0 +1,257 @@
+# name       lanes                            alias         index  speed   fec
+Ethernet0    17,18                            Ethernet1/1   1      200000  rs
+Ethernet2    19,20                            Ethernet1/3   1      200000  rs
+Ethernet4    21,22                            Ethernet1/5   1      200000  rs
+Ethernet6    23,24                            Ethernet1/7   1      200000  rs
+Ethernet8    1,2                              Ethernet2/1   2      200000  rs
+Ethernet10   3,4                              Ethernet2/3   2      200000  rs
+Ethernet12   5,6                              Ethernet2/5   2      200000  rs
+Ethernet14   7,8                              Ethernet2/7   2      200000  rs
+Ethernet16   9,10                             Ethernet3/1   3      200000  rs
+Ethernet18   11,12                            Ethernet3/3   3      200000  rs
+Ethernet20   13,14                            Ethernet3/5   3      200000  rs
+Ethernet22   15,16                            Ethernet3/7   3      200000  rs
+Ethernet24   25,26                            Ethernet4/1   4      200000  rs
+Ethernet26   27,28                            Ethernet4/3   4      200000  rs
+Ethernet28   29,30                            Ethernet4/5   4      200000  rs
+Ethernet30   31,32                            Ethernet4/7   4      200000  rs
+Ethernet32   57,58                            Ethernet5/1   5      200000  rs
+Ethernet34   59,60                            Ethernet5/3   5      200000  rs
+Ethernet36   61,62                            Ethernet5/5   5      200000  rs
+Ethernet38   63,64                            Ethernet5/7   5      200000  rs
+Ethernet40   41,42                            Ethernet6/1   6      200000  rs
+Ethernet42   43,44                            Ethernet6/3   6      200000  rs
+Ethernet44   45,46                            Ethernet6/5   6      200000  rs
+Ethernet46   47,48                            Ethernet6/7   6      200000  rs
+Ethernet48   33,34                            Ethernet7/1   7      200000  rs
+Ethernet50   35,36                            Ethernet7/3   7      200000  rs
+Ethernet52   37,38                            Ethernet7/5   7      200000  rs
+Ethernet54   39,40                            Ethernet7/7   7      200000  rs
+Ethernet56   49,50                            Ethernet8/1   8      200000  rs
+Ethernet58   51,52                            Ethernet8/3   8      200000  rs
+Ethernet60   53,54                            Ethernet8/5   8      200000  rs
+Ethernet62   55,56                            Ethernet8/7   8      200000  rs
+Ethernet64   89,90                            Ethernet9/1   9      200000  rs
+Ethernet66   91,92                            Ethernet9/3   9      200000  rs
+Ethernet68   93,94                            Ethernet9/5   9      200000  rs
+Ethernet70   95,96                            Ethernet9/7   9      200000  rs
+Ethernet72   73,74                            Ethernet10/1  10     200000  rs
+Ethernet74   75,76                            Ethernet10/3  10     200000  rs
+Ethernet76   77,78                            Ethernet10/5  10     200000  rs
+Ethernet78   79,80                            Ethernet10/7  10     200000  rs
+Ethernet80   65,66                            Ethernet11/1  11     200000  rs
+Ethernet82   67,68                            Ethernet11/3  11     200000  rs
+Ethernet84   69,70                            Ethernet11/5  11     200000  rs
+Ethernet86   71,72                            Ethernet11/7  11     200000  rs
+Ethernet88   81,82                            Ethernet12/1  12     200000  rs
+Ethernet90   83,84                            Ethernet12/3  12     200000  rs
+Ethernet92   85,86                            Ethernet12/5  12     200000  rs
+Ethernet94   87,88                            Ethernet12/7  12     200000  rs
+Ethernet96   121,122                          Ethernet13/1  13     200000  rs
+Ethernet98   123,124                          Ethernet13/3  13     200000  rs
+Ethernet100  125,126                          Ethernet13/5  13     200000  rs
+Ethernet102  127,128                          Ethernet13/7  13     200000  rs
+Ethernet104  105,106                          Ethernet14/1  14     200000  rs
+Ethernet106  107,108                          Ethernet14/3  14     200000  rs
+Ethernet108  109,110                          Ethernet14/5  14     200000  rs
+Ethernet110  111,112                          Ethernet14/7  14     200000  rs
+Ethernet112  97,98                            Ethernet15/1  15     200000  rs
+Ethernet114  99,100                           Ethernet15/3  15     200000  rs
+Ethernet116  101,102                          Ethernet15/5  15     200000  rs
+Ethernet118  103,104                          Ethernet15/7  15     200000  rs
+Ethernet120  113,114                          Ethernet16/1  16     200000  rs
+Ethernet122  115,116                          Ethernet16/3  16     200000  rs
+Ethernet124  117,118                          Ethernet16/5  16     200000  rs
+Ethernet126  119,120                          Ethernet16/7  16     200000  rs
+Ethernet128  153,154                          Ethernet17/1  17     200000  rs
+Ethernet130  155,156                          Ethernet17/3  17     200000  rs
+Ethernet132  157,158                          Ethernet17/5  17     200000  rs
+Ethernet134  159,160                          Ethernet17/7  17     200000  rs
+Ethernet136  137,138                          Ethernet18/1  18     200000  rs
+Ethernet138  139,140                          Ethernet18/3  18     200000  rs
+Ethernet140  141,142                          Ethernet18/5  18     200000  rs
+Ethernet142  143,144                          Ethernet18/7  18     200000  rs
+Ethernet144  129,130                          Ethernet19/1  19     200000  rs
+Ethernet146  131,132                          Ethernet19/3  19     200000  rs
+Ethernet148  133,134                          Ethernet19/5  19     200000  rs
+Ethernet150  135,136                          Ethernet19/7  19     200000  rs
+Ethernet152  145,146                          Ethernet20/1  20     200000  rs
+Ethernet154  147,148                          Ethernet20/3  20     200000  rs
+Ethernet156  149,150                          Ethernet20/5  20     200000  rs
+Ethernet158  151,152                          Ethernet20/7  20     200000  rs
+Ethernet160  185,186                          Ethernet21/1  21     200000  rs
+Ethernet162  187,188                          Ethernet21/3  21     200000  rs
+Ethernet164  189,190                          Ethernet21/5  21     200000  rs
+Ethernet166  191,192                          Ethernet21/7  21     200000  rs
+Ethernet168  169,170                          Ethernet22/1  22     200000  rs
+Ethernet170  171,172                          Ethernet22/3  22     200000  rs
+Ethernet172  173,174                          Ethernet22/5  22     200000  rs
+Ethernet174  175,176                          Ethernet22/7  22     200000  rs
+Ethernet176  161,162                          Ethernet23/1  23     200000  rs
+Ethernet178  163,164                          Ethernet23/3  23     200000  rs
+Ethernet180  165,166                          Ethernet23/5  23     200000  rs
+Ethernet182  167,168                          Ethernet23/7  23     200000  rs
+Ethernet184  177,178                          Ethernet24/1  24     200000  rs
+Ethernet186  179,180                          Ethernet24/3  24     200000  rs
+Ethernet188  181,182                          Ethernet24/5  24     200000  rs
+Ethernet190  183,184                          Ethernet24/7  24     200000  rs
+Ethernet192  217,218                          Ethernet25/1  25     200000  rs
+Ethernet194  219,220                          Ethernet25/3  25     200000  rs
+Ethernet196  221,222                          Ethernet25/5  25     200000  rs
+Ethernet198  223,224                          Ethernet25/7  25     200000  rs
+Ethernet200  201,202                          Ethernet26/1  26     200000  rs
+Ethernet202  203,204                          Ethernet26/3  26     200000  rs
+Ethernet204  205,206                          Ethernet26/5  26     200000  rs
+Ethernet206  207,208                          Ethernet26/7  26     200000  rs
+Ethernet208  193,194                          Ethernet27/1  27     200000  rs
+Ethernet210  195,196                          Ethernet27/3  27     200000  rs
+Ethernet212  197,198                          Ethernet27/5  27     200000  rs
+Ethernet214  199,200                          Ethernet27/7  27     200000  rs
+Ethernet216  209,210                          Ethernet28/1  28     200000  rs
+Ethernet218  211,212                          Ethernet28/3  28     200000  rs
+Ethernet220  213,214                          Ethernet28/5  28     200000  rs
+Ethernet222  215,216                          Ethernet28/7  28     200000  rs
+Ethernet224  249,250                          Ethernet29/1  29     200000  rs
+Ethernet226  251,252                          Ethernet29/3  29     200000  rs
+Ethernet228  253,254                          Ethernet29/5  29     200000  rs
+Ethernet230  255,256                          Ethernet29/7  29     200000  rs
+Ethernet232  233,234                          Ethernet30/1  30     200000  rs
+Ethernet234  235,236                          Ethernet30/3  30     200000  rs
+Ethernet236  237,238                          Ethernet30/5  30     200000  rs
+Ethernet238  239,240                          Ethernet30/7  30     200000  rs
+Ethernet240  225,226                          Ethernet31/1  31     200000  rs
+Ethernet242  227,228                          Ethernet31/3  31     200000  rs
+Ethernet244  229,230                          Ethernet31/5  31     200000  rs
+Ethernet246  231,232                          Ethernet31/7  31     200000  rs
+Ethernet248  241,242                          Ethernet32/1  32     200000  rs
+Ethernet250  243,244                          Ethernet32/3  32     200000  rs
+Ethernet252  245,246                          Ethernet32/5  32     200000  rs
+Ethernet254  247,248                          Ethernet32/7  32     200000  rs
+Ethernet256  273,274                          Ethernet33/1  33     200000  rs
+Ethernet258  275,276                          Ethernet33/3  33     200000  rs
+Ethernet260  277,278                          Ethernet33/5  33     200000  rs
+Ethernet262  279,280                          Ethernet33/7  33     200000  rs
+Ethernet264  257,258                          Ethernet34/1  34     200000  rs
+Ethernet266  259,260                          Ethernet34/3  34     200000  rs
+Ethernet268  261,262                          Ethernet34/5  34     200000  rs
+Ethernet270  263,264                          Ethernet34/7  34     200000  rs
+Ethernet272  265,266                          Ethernet35/1  35     200000  rs
+Ethernet274  267,268                          Ethernet35/3  35     200000  rs
+Ethernet276  269,270                          Ethernet35/5  35     200000  rs
+Ethernet278  271,272                          Ethernet35/7  35     200000  rs
+Ethernet280  281,282                          Ethernet36/1  36     200000  rs
+Ethernet282  283,284                          Ethernet36/3  36     200000  rs
+Ethernet284  285,286                          Ethernet36/5  36     200000  rs
+Ethernet286  287,288                          Ethernet36/7  36     200000  rs
+Ethernet288  313,314                          Ethernet37/1  37     200000  rs
+Ethernet290  315,316                          Ethernet37/3  37     200000  rs
+Ethernet292  317,318                          Ethernet37/5  37     200000  rs
+Ethernet294  319,320                          Ethernet37/7  37     200000  rs
+Ethernet296  297,298                          Ethernet38/1  38     200000  rs
+Ethernet298  299,300                          Ethernet38/3  38     200000  rs
+Ethernet300  301,302                          Ethernet38/5  38     200000  rs
+Ethernet302  303,304                          Ethernet38/7  38     200000  rs
+Ethernet304  289,290                          Ethernet39/1  39     200000  rs
+Ethernet306  291,292                          Ethernet39/3  39     200000  rs
+Ethernet308  293,294                          Ethernet39/5  39     200000  rs
+Ethernet310  295,296                          Ethernet39/7  39     200000  rs
+Ethernet312  305,306                          Ethernet40/1  40     200000  rs
+Ethernet314  307,308                          Ethernet40/3  40     200000  rs
+Ethernet316  309,310                          Ethernet40/5  40     200000  rs
+Ethernet318  311,312                          Ethernet40/7  40     200000  rs
+Ethernet320  345,346                          Ethernet41/1  41     200000  rs
+Ethernet322  347,348                          Ethernet41/3  41     200000  rs
+Ethernet324  349,350                          Ethernet41/5  41     200000  rs
+Ethernet326  351,352                          Ethernet41/7  41     200000  rs
+Ethernet328  329,330                          Ethernet42/1  42     200000  rs
+Ethernet330  331,332                          Ethernet42/3  42     200000  rs
+Ethernet332  333,334                          Ethernet42/5  42     200000  rs
+Ethernet334  335,336                          Ethernet42/7  42     200000  rs
+Ethernet336  321,322                          Ethernet43/1  43     200000  rs
+Ethernet338  323,324                          Ethernet43/3  43     200000  rs
+Ethernet340  325,326                          Ethernet43/5  43     200000  rs
+Ethernet342  327,328                          Ethernet43/7  43     200000  rs
+Ethernet344  337,338                          Ethernet44/1  44     200000  rs
+Ethernet346  339,340                          Ethernet44/3  44     200000  rs
+Ethernet348  341,342                          Ethernet44/5  44     200000  rs
+Ethernet350  343,344                          Ethernet44/7  44     200000  rs
+Ethernet352  377,378                          Ethernet45/1  45     200000  rs
+Ethernet354  379,380                          Ethernet45/3  45     200000  rs
+Ethernet356  381,382                          Ethernet45/5  45     200000  rs
+Ethernet358  383,384                          Ethernet45/7  45     200000  rs
+Ethernet360  361,362                          Ethernet46/1  46     200000  rs
+Ethernet362  363,364                          Ethernet46/3  46     200000  rs
+Ethernet364  365,366                          Ethernet46/5  46     200000  rs
+Ethernet366  367,368                          Ethernet46/7  46     200000  rs
+Ethernet368  353,354                          Ethernet47/1  47     200000  rs
+Ethernet370  355,356                          Ethernet47/3  47     200000  rs
+Ethernet372  357,358                          Ethernet47/5  47     200000  rs
+Ethernet374  359,360                          Ethernet47/7  47     200000  rs
+Ethernet376  369,370                          Ethernet48/1  48     200000  rs
+Ethernet378  371,372                          Ethernet48/3  48     200000  rs
+Ethernet380  373,374                          Ethernet48/5  48     200000  rs
+Ethernet382  375,376                          Ethernet48/7  48     200000  rs
+Ethernet384  409,410                          Ethernet49/1  49     200000  rs
+Ethernet386  411,412                          Ethernet49/3  49     200000  rs
+Ethernet388  413,414                          Ethernet49/5  49     200000  rs
+Ethernet390  415,416                          Ethernet49/7  49     200000  rs
+Ethernet392  393,394                          Ethernet50/1  50     200000  rs
+Ethernet394  395,396                          Ethernet50/3  50     200000  rs
+Ethernet396  397,398                          Ethernet50/5  50     200000  rs
+Ethernet398  399,400                          Ethernet50/7  50     200000  rs
+Ethernet400  385,386                          Ethernet51/1  51     200000  rs
+Ethernet402  387,388                          Ethernet51/3  51     200000  rs
+Ethernet404  389,390                          Ethernet51/5  51     200000  rs
+Ethernet406  391,392                          Ethernet51/7  51     200000  rs
+Ethernet408  401,402                          Ethernet52/1  52     200000  rs
+Ethernet410  403,404                          Ethernet52/3  52     200000  rs
+Ethernet412  405,406                          Ethernet52/5  52     200000  rs
+Ethernet414  407,408                          Ethernet52/7  52     200000  rs
+Ethernet416  441,442                          Ethernet53/1  53     200000  rs
+Ethernet418  443,444                          Ethernet53/3  53     200000  rs
+Ethernet420  445,446                          Ethernet53/5  53     200000  rs
+Ethernet422  447,448                          Ethernet53/7  53     200000  rs
+Ethernet424  425,426                          Ethernet54/1  54     200000  rs
+Ethernet426  427,428                          Ethernet54/3  54     200000  rs
+Ethernet428  429,430                          Ethernet54/5  54     200000  rs
+Ethernet430  431,432                          Ethernet54/7  54     200000  rs
+Ethernet432  417,418                          Ethernet55/1  55     200000  rs
+Ethernet434  419,420                          Ethernet55/3  55     200000  rs
+Ethernet436  421,422                          Ethernet55/5  55     200000  rs
+Ethernet438  423,424                          Ethernet55/7  55     200000  rs
+Ethernet440  433,434                          Ethernet56/1  56     200000  rs
+Ethernet442  435,436                          Ethernet56/3  56     200000  rs
+Ethernet444  437,438                          Ethernet56/5  56     200000  rs
+Ethernet446  439,440                          Ethernet56/7  56     200000  rs
+Ethernet448  473,474                          Ethernet57/1  57     200000  rs
+Ethernet450  475,476                          Ethernet57/3  57     200000  rs
+Ethernet452  477,478                          Ethernet57/5  57     200000  rs
+Ethernet454  479,480                          Ethernet57/7  57     200000  rs
+Ethernet456  457,458                          Ethernet58/1  58     200000  rs
+Ethernet458  459,460                          Ethernet58/3  58     200000  rs
+Ethernet460  461,462                          Ethernet58/5  58     200000  rs
+Ethernet462  463,464                          Ethernet58/7  58     200000  rs
+Ethernet464  449,450                          Ethernet59/1  59     200000  rs
+Ethernet466  451,452                          Ethernet59/3  59     200000  rs
+Ethernet468  453,454                          Ethernet59/5  59     200000  rs
+Ethernet470  455,456                          Ethernet59/7  59     200000  rs
+Ethernet472  465,466                          Ethernet60/1  60     200000  rs
+Ethernet474  467,468                          Ethernet60/3  60     200000  rs
+Ethernet476  469,470                          Ethernet60/5  60     200000  rs
+Ethernet478  471,472                          Ethernet60/7  60     200000  rs
+Ethernet480  505,506                          Ethernet61/1  61     200000  rs
+Ethernet482  507,508                          Ethernet61/3  61     200000  rs
+Ethernet484  509,510                          Ethernet61/5  61     200000  rs
+Ethernet486  511,512                          Ethernet61/7  61     200000  rs
+Ethernet488  489,490                          Ethernet62/1  62     200000  rs
+Ethernet490  491,492                          Ethernet62/3  62     200000  rs
+Ethernet492  493,494                          Ethernet62/5  62     200000  rs
+Ethernet494  495,496                          Ethernet62/7  62     200000  rs
+Ethernet496  481,482                          Ethernet63/1  63     200000  rs
+Ethernet498  483,484                          Ethernet63/3  63     200000  rs
+Ethernet500  485,486                          Ethernet63/5  63     200000  rs
+Ethernet502  487,488                          Ethernet63/7  63     200000  rs
+Ethernet504  497,498                          Ethernet64/1  64     200000  rs
+Ethernet506  499,500                          Ethernet64/3  64     200000  rs
+Ethernet508  501,502                          Ethernet64/5  64     200000  rs
+Ethernet510  503,504                          Ethernet64/7  64     200000  rs
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/sai.profile b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/sai.profile
new file mode 100644
index 000000000..50c136d97
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/sai.profile
@@ -0,0 +1 @@
+SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th5-a7060x6-64pe.config.bcm
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/th5-a7060x6-64pe.config.bcm b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/th5-a7060x6-64pe.config.bcm
new file mode 100644
index 000000000..997636fdc
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/th5-a7060x6-64pe.config.bcm
@@ -0,0 +1,1913 @@
+#
+# $Copyright: (c) 2022 Broadcom.
+# Broadcom Proprietary and Confidential. All rights reserved.$
+#
+# BCM78900 64x800g port configuration.
+#
+# configuration yaml file
+#   device:
+#       <unit>:
+#           <table>:
+#               ?
+#                   <key_fld_1>: <value>
+#                   <key_fld_2>: <value>
+#                   ...
+#                   <key_fld_n>: <value>
+#               :
+#                   <data_fld_1>: <value>
+#                   <data_fld_2>: <value>
+#                   ...
+#                   <data_fld_n>: <value>
+#
+
+---
+bcm_device:
+    0:
+        global:
+            pktio_mode: 1
+            default_cpu_tx_queue: 7
+            vlan_flooding_l2mc_num_reserved: 0
+            ipv6_lpm_128b_enable: 1
+            shared_block_mask_section: uc_bc
+            skip_protocol_default_entries: 1
+            # LTSW uses value 1 for ALPM combined mode
+            l3_alpm_template: 1
+            l3_alpm_hit_skip: 1
+            sai_feat_tail_timestamp : 1
+            sai_port_phy_time_sync_en : 1
+            sai_field_group_auto_prioritize: 1
+            #l3_intf_vlan_split_egress for MTU at L3IF
+            l3_intf_vlan_split_egress : 1
+            pfc_deadlock_seq_control : 1
+            sai_tunnel_support: 2
+            bcm_tunnel_term_compatible_mode: 1
+            l3_ecmp_member_first_lkup_mem_size: 12288
+---
+device:
+    0:
+        PC_PM_CORE:
+            ?
+                PC_PM_ID: 3
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0x66
+                TX_POLARITY_FLIP: 0xaa
+            ?
+                PC_PM_ID: 1
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0x26
+                TX_POLARITY_FLIP: 0xaa
+            ?
+                PC_PM_ID: 2
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x55
+                TX_POLARITY_FLIP: 0x66
+            ?
+                PC_PM_ID: 4
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x55
+                TX_POLARITY_FLIP: 0x66
+            ?
+                PC_PM_ID: 8
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 6
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xb6
+            ?
+                PC_PM_ID: 5
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x23016745
+                TX_LANE_MAP: 0x54670123
+                RX_POLARITY_FLIP: 0x97
+                TX_POLARITY_FLIP: 0x35
+            ?
+                PC_PM_ID: 7
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 12
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 10
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 9
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 11
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 16
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 14
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 13
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 15
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 20
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 18
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 17
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 19
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 24
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 22
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 21
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 23
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 28
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x31204675
+                TX_LANE_MAP: 0x47561203
+                RX_POLARITY_FLIP: 0x11
+                TX_POLARITY_FLIP: 0x2b
+            ?
+                PC_PM_ID: 26
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 25
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 27
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0x9a
+            ?
+                PC_PM_ID: 32
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x33
+                TX_POLARITY_FLIP: 0xff
+            ?
+                PC_PM_ID: 30
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x33
+                TX_POLARITY_FLIP: 0xff
+            ?
+                PC_PM_ID: 29
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0x66
+            ?
+                PC_PM_ID: 31
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0x66
+            ?
+                PC_PM_ID: 35
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0x33
+                TX_POLARITY_FLIP: 0x00
+            ?
+                PC_PM_ID: 33
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0x33
+                TX_POLARITY_FLIP: 0x00
+            ?
+                PC_PM_ID: 34
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x66
+            ?
+                PC_PM_ID: 36
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x66
+            ?
+                PC_PM_ID: 40
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 38
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0x9a
+            ?
+                PC_PM_ID: 37
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x31204675
+                TX_LANE_MAP: 0x47561203
+                RX_POLARITY_FLIP: 0x11
+                TX_POLARITY_FLIP: 0x2b
+            ?
+                PC_PM_ID: 39
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 44
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 42
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 41
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 43
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 48
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 46
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 45
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 47
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 52
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 50
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 49
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 51
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 56
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 54
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 53
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 55
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 60
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x23016745
+                TX_LANE_MAP: 0x54670123
+                RX_POLARITY_FLIP: 0x97
+                TX_POLARITY_FLIP: 0x35
+            ?
+                PC_PM_ID: 58
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 57
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 59
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xb6
+            ?
+                PC_PM_ID: 64
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x67
+                TX_POLARITY_FLIP: 0x55
+            ?
+                PC_PM_ID: 62
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x66
+                TX_POLARITY_FLIP: 0x55
+            ?
+                PC_PM_ID: 61
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0xaa
+                TX_POLARITY_FLIP: 0x66
+            ?
+                PC_PM_ID: 63
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0xaa
+                TX_POLARITY_FLIP: 0x66
+---
+device:
+    0:
+        PC_PORT_PHYS_MAP:
+            ?
+                PORT_ID: 1
+            :
+                PC_PHYS_PORT_ID: 1
+            ?
+                PORT_ID: 2
+            :
+                PC_PHYS_PORT_ID: 3
+            ?
+                PORT_ID: 3
+            :
+                PC_PHYS_PORT_ID: 5
+            ?
+                PORT_ID: 4
+            :
+                PC_PHYS_PORT_ID: 7
+            ?
+                PORT_ID: 5
+            :
+                PC_PHYS_PORT_ID: 9
+            ?
+                PORT_ID: 6
+            :
+                PC_PHYS_PORT_ID: 11
+            ?
+                PORT_ID: 7
+            :
+                PC_PHYS_PORT_ID: 13
+            ?
+                PORT_ID: 8
+            :
+                PC_PHYS_PORT_ID: 15
+            ?
+                PORT_ID: 11
+            :
+                PC_PHYS_PORT_ID: 17
+            ?
+                PORT_ID: 12
+            :
+                PC_PHYS_PORT_ID: 19
+            ?
+                PORT_ID: 13
+            :
+                PC_PHYS_PORT_ID: 21
+            ?
+                PORT_ID: 14
+            :
+                PC_PHYS_PORT_ID: 23
+            ?
+                PORT_ID: 15
+            :
+                PC_PHYS_PORT_ID: 25
+            ?
+                PORT_ID: 16
+            :
+                PC_PHYS_PORT_ID: 27
+            ?
+                PORT_ID: 17
+            :
+                PC_PHYS_PORT_ID: 29
+            ?
+                PORT_ID: 18
+            :
+                PC_PHYS_PORT_ID: 31
+            ?
+                PORT_ID: 22
+            :
+                PC_PHYS_PORT_ID: 33
+            ?
+                PORT_ID: 23
+            :
+                PC_PHYS_PORT_ID: 35
+            ?
+                PORT_ID: 24
+            :
+                PC_PHYS_PORT_ID: 37
+            ?
+                PORT_ID: 25
+            :
+                PC_PHYS_PORT_ID: 39
+            ?
+                PORT_ID: 26
+            :
+                PC_PHYS_PORT_ID: 41
+            ?
+                PORT_ID: 27
+            :
+                PC_PHYS_PORT_ID: 43
+            ?
+                PORT_ID: 28
+            :
+                PC_PHYS_PORT_ID: 45
+            ?
+                PORT_ID: 29
+            :
+                PC_PHYS_PORT_ID: 47
+            ?
+                PORT_ID: 33
+            :
+                PC_PHYS_PORT_ID: 49
+            ?
+                PORT_ID: 34
+            :
+                PC_PHYS_PORT_ID: 51
+            ?
+                PORT_ID: 35
+            :
+                PC_PHYS_PORT_ID: 53
+            ?
+                PORT_ID: 36
+            :
+                PC_PHYS_PORT_ID: 55
+            ?
+                PORT_ID: 37
+            :
+                PC_PHYS_PORT_ID: 57
+            ?
+                PORT_ID: 38
+            :
+                PC_PHYS_PORT_ID: 59
+            ?
+                PORT_ID: 39
+            :
+                PC_PHYS_PORT_ID: 61
+            ?
+                PORT_ID: 40
+            :
+                PC_PHYS_PORT_ID: 63
+            ?
+                PORT_ID: 44
+            :
+                PC_PHYS_PORT_ID: 65
+            ?
+                PORT_ID: 45
+            :
+                PC_PHYS_PORT_ID: 67
+            ?
+                PORT_ID: 46
+            :
+                PC_PHYS_PORT_ID: 69
+            ?
+                PORT_ID: 47
+            :
+                PC_PHYS_PORT_ID: 71
+            ?
+                PORT_ID: 48
+            :
+                PC_PHYS_PORT_ID: 73
+            ?
+                PORT_ID: 49
+            :
+                PC_PHYS_PORT_ID: 75
+            ?
+                PORT_ID: 50
+            :
+                PC_PHYS_PORT_ID: 77
+            ?
+                PORT_ID: 51
+            :
+                PC_PHYS_PORT_ID: 79
+            ?
+                PORT_ID: 55
+            :
+                PC_PHYS_PORT_ID: 81
+            ?
+                PORT_ID: 56
+            :
+                PC_PHYS_PORT_ID: 83
+            ?
+                PORT_ID: 57
+            :
+                PC_PHYS_PORT_ID: 85
+            ?
+                PORT_ID: 58
+            :
+                PC_PHYS_PORT_ID: 87
+            ?
+                PORT_ID: 59
+            :
+                PC_PHYS_PORT_ID: 89
+            ?
+                PORT_ID: 60
+            :
+                PC_PHYS_PORT_ID: 91
+            ?
+                PORT_ID: 61
+            :
+                PC_PHYS_PORT_ID: 93
+            ?
+                PORT_ID: 62
+            :
+                PC_PHYS_PORT_ID: 95
+            ?
+                PORT_ID: 66
+            :
+                PC_PHYS_PORT_ID: 97
+            ?
+                PORT_ID: 67
+            :
+                PC_PHYS_PORT_ID: 99
+            ?
+                PORT_ID: 68
+            :
+                PC_PHYS_PORT_ID: 101
+            ?
+                PORT_ID: 69
+            :
+                PC_PHYS_PORT_ID: 103
+            ?
+                PORT_ID: 70
+            :
+                PC_PHYS_PORT_ID: 105
+            ?
+                PORT_ID: 71
+            :
+                PC_PHYS_PORT_ID: 107
+            ?
+                PORT_ID: 72
+            :
+                PC_PHYS_PORT_ID: 109
+            ?
+                PORT_ID: 73
+            :
+                PC_PHYS_PORT_ID: 111
+            ?
+                PORT_ID: 77
+            :
+                PC_PHYS_PORT_ID: 113
+            ?
+                PORT_ID: 78
+            :
+                PC_PHYS_PORT_ID: 115
+            ?
+                PORT_ID: 79
+            :
+                PC_PHYS_PORT_ID: 117
+            ?
+                PORT_ID: 80
+            :
+                PC_PHYS_PORT_ID: 119
+            ?
+                PORT_ID: 81
+            :
+                PC_PHYS_PORT_ID: 121
+            ?
+                PORT_ID: 82
+            :
+                PC_PHYS_PORT_ID: 123
+            ?
+                PORT_ID: 83
+            :
+                PC_PHYS_PORT_ID: 125
+            ?
+                PORT_ID: 84
+            :
+                PC_PHYS_PORT_ID: 127
+            ?
+                PORT_ID: 88
+            :
+                PC_PHYS_PORT_ID: 129
+            ?
+                PORT_ID: 89
+            :
+                PC_PHYS_PORT_ID: 131
+            ?
+                PORT_ID: 90
+            :
+                PC_PHYS_PORT_ID: 133
+            ?
+                PORT_ID: 91
+            :
+                PC_PHYS_PORT_ID: 135
+            ?
+                PORT_ID: 92
+            :
+                PC_PHYS_PORT_ID: 137
+            ?
+                PORT_ID: 93
+            :
+                PC_PHYS_PORT_ID: 139
+            ?
+                PORT_ID: 94
+            :
+                PC_PHYS_PORT_ID: 141
+            ?
+                PORT_ID: 95
+            :
+                PC_PHYS_PORT_ID: 143
+            ?
+                PORT_ID: 99
+            :
+                PC_PHYS_PORT_ID: 145
+            ?
+                PORT_ID: 100
+            :
+                PC_PHYS_PORT_ID: 147
+            ?
+                PORT_ID: 101
+            :
+                PC_PHYS_PORT_ID: 149
+            ?
+                PORT_ID: 102
+            :
+                PC_PHYS_PORT_ID: 151
+            ?
+                PORT_ID: 103
+            :
+                PC_PHYS_PORT_ID: 153
+            ?
+                PORT_ID: 104
+            :
+                PC_PHYS_PORT_ID: 155
+            ?
+                PORT_ID: 105
+            :
+                PC_PHYS_PORT_ID: 157
+            ?
+                PORT_ID: 106
+            :
+                PC_PHYS_PORT_ID: 159
+            ?
+                PORT_ID: 110
+            :
+                PC_PHYS_PORT_ID: 161
+            ?
+                PORT_ID: 111
+            :
+                PC_PHYS_PORT_ID: 163
+            ?
+                PORT_ID: 112
+            :
+                PC_PHYS_PORT_ID: 165
+            ?
+                PORT_ID: 113
+            :
+                PC_PHYS_PORT_ID: 167
+            ?
+                PORT_ID: 114
+            :
+                PC_PHYS_PORT_ID: 169
+            ?
+                PORT_ID: 115
+            :
+                PC_PHYS_PORT_ID: 171
+            ?
+                PORT_ID: 116
+            :
+                PC_PHYS_PORT_ID: 173
+            ?
+                PORT_ID: 117
+            :
+                PC_PHYS_PORT_ID: 175
+            ?
+                PORT_ID: 121
+            :
+                PC_PHYS_PORT_ID: 177
+            ?
+                PORT_ID: 122
+            :
+                PC_PHYS_PORT_ID: 179
+            ?
+                PORT_ID: 123
+            :
+                PC_PHYS_PORT_ID: 181
+            ?
+                PORT_ID: 124
+            :
+                PC_PHYS_PORT_ID: 183
+            ?
+                PORT_ID: 125
+            :
+                PC_PHYS_PORT_ID: 185
+            ?
+                PORT_ID: 126
+            :
+                PC_PHYS_PORT_ID: 187
+            ?
+                PORT_ID: 127
+            :
+                PC_PHYS_PORT_ID: 189
+            ?
+                PORT_ID: 128
+            :
+                PC_PHYS_PORT_ID: 191
+            ?
+                PORT_ID: 132
+            :
+                PC_PHYS_PORT_ID: 193
+            ?
+                PORT_ID: 133
+            :
+                PC_PHYS_PORT_ID: 195
+            ?
+                PORT_ID: 134
+            :
+                PC_PHYS_PORT_ID: 197
+            ?
+                PORT_ID: 135
+            :
+                PC_PHYS_PORT_ID: 199
+            ?
+                PORT_ID: 136
+            :
+                PC_PHYS_PORT_ID: 201
+            ?
+                PORT_ID: 137
+            :
+                PC_PHYS_PORT_ID: 203
+            ?
+                PORT_ID: 138
+            :
+                PC_PHYS_PORT_ID: 205
+            ?
+                PORT_ID: 139
+            :
+                PC_PHYS_PORT_ID: 207
+            ?
+                PORT_ID: 143
+            :
+                PC_PHYS_PORT_ID: 209
+            ?
+                PORT_ID: 144
+            :
+                PC_PHYS_PORT_ID: 211
+            ?
+                PORT_ID: 145
+            :
+                PC_PHYS_PORT_ID: 213
+            ?
+                PORT_ID: 146
+            :
+                PC_PHYS_PORT_ID: 215
+            ?
+                PORT_ID: 147
+            :
+                PC_PHYS_PORT_ID: 217
+            ?
+                PORT_ID: 148
+            :
+                PC_PHYS_PORT_ID: 219
+            ?
+                PORT_ID: 149
+            :
+                PC_PHYS_PORT_ID: 221
+            ?
+                PORT_ID: 150
+            :
+                PC_PHYS_PORT_ID: 223
+            ?
+                PORT_ID: 154
+            :
+                PC_PHYS_PORT_ID: 225
+            ?
+                PORT_ID: 155
+            :
+                PC_PHYS_PORT_ID: 227
+            ?
+                PORT_ID: 156
+            :
+                PC_PHYS_PORT_ID: 229
+            ?
+                PORT_ID: 157
+            :
+                PC_PHYS_PORT_ID: 231
+            ?
+                PORT_ID: 158
+            :
+                PC_PHYS_PORT_ID: 233
+            ?
+                PORT_ID: 159
+            :
+                PC_PHYS_PORT_ID: 235
+            ?
+                PORT_ID: 160
+            :
+                PC_PHYS_PORT_ID: 237
+            ?
+                PORT_ID: 161
+            :
+                PC_PHYS_PORT_ID: 239
+            ?
+                PORT_ID: 165
+            :
+                PC_PHYS_PORT_ID: 241
+            ?
+                PORT_ID: 166
+            :
+                PC_PHYS_PORT_ID: 243
+            ?
+                PORT_ID: 167
+            :
+                PC_PHYS_PORT_ID: 245
+            ?
+                PORT_ID: 168
+            :
+                PC_PHYS_PORT_ID: 247
+            ?
+                PORT_ID: 169
+            :
+                PC_PHYS_PORT_ID: 249
+            ?
+                PORT_ID: 170
+            :
+                PC_PHYS_PORT_ID: 251
+            ?
+                PORT_ID: 171
+            :
+                PC_PHYS_PORT_ID: 253
+            ?
+                PORT_ID: 172
+            :
+                PC_PHYS_PORT_ID: 255
+            ?
+                PORT_ID: 176
+            :
+                PC_PHYS_PORT_ID: 257
+            ?
+                PORT_ID: 177
+            :
+                PC_PHYS_PORT_ID: 259
+            ?
+                PORT_ID: 178
+            :
+                PC_PHYS_PORT_ID: 261
+            ?
+                PORT_ID: 179
+            :
+                PC_PHYS_PORT_ID: 263
+            ?
+                PORT_ID: 180
+            :
+                PC_PHYS_PORT_ID: 265
+            ?
+                PORT_ID: 181
+            :
+                PC_PHYS_PORT_ID: 267
+            ?
+                PORT_ID: 182
+            :
+                PC_PHYS_PORT_ID: 269
+            ?
+                PORT_ID: 183
+            :
+                PC_PHYS_PORT_ID: 271
+            ?
+                PORT_ID: 187
+            :
+                PC_PHYS_PORT_ID: 273
+            ?
+                PORT_ID: 188
+            :
+                PC_PHYS_PORT_ID: 275
+            ?
+                PORT_ID: 189
+            :
+                PC_PHYS_PORT_ID: 277
+            ?
+                PORT_ID: 190
+            :
+                PC_PHYS_PORT_ID: 279
+            ?
+                PORT_ID: 191
+            :
+                PC_PHYS_PORT_ID: 281
+            ?
+                PORT_ID: 192
+            :
+                PC_PHYS_PORT_ID: 283
+            ?
+                PORT_ID: 193
+            :
+                PC_PHYS_PORT_ID: 285
+            ?
+                PORT_ID: 194
+            :
+                PC_PHYS_PORT_ID: 287
+            ?
+                PORT_ID: 198
+            :
+                PC_PHYS_PORT_ID: 289
+            ?
+                PORT_ID: 199
+            :
+                PC_PHYS_PORT_ID: 291
+            ?
+                PORT_ID: 200
+            :
+                PC_PHYS_PORT_ID: 293
+            ?
+                PORT_ID: 201
+            :
+                PC_PHYS_PORT_ID: 295
+            ?
+                PORT_ID: 202
+            :
+                PC_PHYS_PORT_ID: 297
+            ?
+                PORT_ID: 203
+            :
+                PC_PHYS_PORT_ID: 299
+            ?
+                PORT_ID: 204
+            :
+                PC_PHYS_PORT_ID: 301
+            ?
+                PORT_ID: 205
+            :
+                PC_PHYS_PORT_ID: 303
+            ?
+                PORT_ID: 209
+            :
+                PC_PHYS_PORT_ID: 305
+            ?
+                PORT_ID: 210
+            :
+                PC_PHYS_PORT_ID: 307
+            ?
+                PORT_ID: 211
+            :
+                PC_PHYS_PORT_ID: 309
+            ?
+                PORT_ID: 212
+            :
+                PC_PHYS_PORT_ID: 311
+            ?
+                PORT_ID: 213
+            :
+                PC_PHYS_PORT_ID: 313
+            ?
+                PORT_ID: 214
+            :
+                PC_PHYS_PORT_ID: 315
+            ?
+                PORT_ID: 215
+            :
+                PC_PHYS_PORT_ID: 317
+            ?
+                PORT_ID: 216
+            :
+                PC_PHYS_PORT_ID: 319
+            ?
+                PORT_ID: 220
+            :
+                PC_PHYS_PORT_ID: 321
+            ?
+                PORT_ID: 221
+            :
+                PC_PHYS_PORT_ID: 323
+            ?
+                PORT_ID: 222
+            :
+                PC_PHYS_PORT_ID: 325
+            ?
+                PORT_ID: 223
+            :
+                PC_PHYS_PORT_ID: 327
+            ?
+                PORT_ID: 224
+            :
+                PC_PHYS_PORT_ID: 329
+            ?
+                PORT_ID: 225
+            :
+                PC_PHYS_PORT_ID: 331
+            ?
+                PORT_ID: 226
+            :
+                PC_PHYS_PORT_ID: 333
+            ?
+                PORT_ID: 227
+            :
+                PC_PHYS_PORT_ID: 335
+            ?
+                PORT_ID: 231
+            :
+                PC_PHYS_PORT_ID: 337
+            ?
+                PORT_ID: 232
+            :
+                PC_PHYS_PORT_ID: 339
+            ?
+                PORT_ID: 233
+            :
+                PC_PHYS_PORT_ID: 341
+            ?
+                PORT_ID: 234
+            :
+                PC_PHYS_PORT_ID: 343
+            ?
+                PORT_ID: 235
+            :
+                PC_PHYS_PORT_ID: 345
+            ?
+                PORT_ID: 236
+            :
+                PC_PHYS_PORT_ID: 347
+            ?
+                PORT_ID: 237
+            :
+                PC_PHYS_PORT_ID: 349
+            ?
+                PORT_ID: 238
+            :
+                PC_PHYS_PORT_ID: 351
+            ?
+                PORT_ID: 242
+            :
+                PC_PHYS_PORT_ID: 353
+            ?
+                PORT_ID: 243
+            :
+                PC_PHYS_PORT_ID: 355
+            ?
+                PORT_ID: 244
+            :
+                PC_PHYS_PORT_ID: 357
+            ?
+                PORT_ID: 245
+            :
+                PC_PHYS_PORT_ID: 359
+            ?
+                PORT_ID: 246
+            :
+                PC_PHYS_PORT_ID: 361
+            ?
+                PORT_ID: 247
+            :
+                PC_PHYS_PORT_ID: 363
+            ?
+                PORT_ID: 248
+            :
+                PC_PHYS_PORT_ID: 365
+            ?
+                PORT_ID: 249
+            :
+                PC_PHYS_PORT_ID: 367
+            ?
+                PORT_ID: 253
+            :
+                PC_PHYS_PORT_ID: 369
+            ?
+                PORT_ID: 254
+            :
+                PC_PHYS_PORT_ID: 371
+            ?
+                PORT_ID: 255
+            :
+                PC_PHYS_PORT_ID: 373
+            ?
+                PORT_ID: 256
+            :
+                PC_PHYS_PORT_ID: 375
+            ?
+                PORT_ID: 257
+            :
+                PC_PHYS_PORT_ID: 377
+            ?
+                PORT_ID: 258
+            :
+                PC_PHYS_PORT_ID: 379
+            ?
+                PORT_ID: 259
+            :
+                PC_PHYS_PORT_ID: 381
+            ?
+                PORT_ID: 260
+            :
+                PC_PHYS_PORT_ID: 383
+            ?
+                PORT_ID: 264
+            :
+                PC_PHYS_PORT_ID: 385
+            ?
+                PORT_ID: 265
+            :
+                PC_PHYS_PORT_ID: 387
+            ?
+                PORT_ID: 266
+            :
+                PC_PHYS_PORT_ID: 389
+            ?
+                PORT_ID: 267
+            :
+                PC_PHYS_PORT_ID: 391
+            ?
+                PORT_ID: 268
+            :
+                PC_PHYS_PORT_ID: 393
+            ?
+                PORT_ID: 269
+            :
+                PC_PHYS_PORT_ID: 395
+            ?
+                PORT_ID: 270
+            :
+                PC_PHYS_PORT_ID: 397
+            ?
+                PORT_ID: 271
+            :
+                PC_PHYS_PORT_ID: 399
+            ?
+                PORT_ID: 275
+            :
+                PC_PHYS_PORT_ID: 401
+            ?
+                PORT_ID: 276
+            :
+                PC_PHYS_PORT_ID: 403
+            ?
+                PORT_ID: 277
+            :
+                PC_PHYS_PORT_ID: 405
+            ?
+                PORT_ID: 278
+            :
+                PC_PHYS_PORT_ID: 407
+            ?
+                PORT_ID: 279
+            :
+                PC_PHYS_PORT_ID: 409
+            ?
+                PORT_ID: 280
+            :
+                PC_PHYS_PORT_ID: 411
+            ?
+                PORT_ID: 281
+            :
+                PC_PHYS_PORT_ID: 413
+            ?
+                PORT_ID: 282
+            :
+                PC_PHYS_PORT_ID: 415
+            ?
+                PORT_ID: 286
+            :
+                PC_PHYS_PORT_ID: 417
+            ?
+                PORT_ID: 287
+            :
+                PC_PHYS_PORT_ID: 419
+            ?
+                PORT_ID: 288
+            :
+                PC_PHYS_PORT_ID: 421
+            ?
+                PORT_ID: 289
+            :
+                PC_PHYS_PORT_ID: 423
+            ?
+                PORT_ID: 290
+            :
+                PC_PHYS_PORT_ID: 425
+            ?
+                PORT_ID: 291
+            :
+                PC_PHYS_PORT_ID: 427
+            ?
+                PORT_ID: 292
+            :
+                PC_PHYS_PORT_ID: 429
+            ?
+                PORT_ID: 293
+            :
+                PC_PHYS_PORT_ID: 431
+            ?
+                PORT_ID: 297
+            :
+                PC_PHYS_PORT_ID: 433
+            ?
+                PORT_ID: 298
+            :
+                PC_PHYS_PORT_ID: 435
+            ?
+                PORT_ID: 299
+            :
+                PC_PHYS_PORT_ID: 437
+            ?
+                PORT_ID: 300
+            :
+                PC_PHYS_PORT_ID: 439
+            ?
+                PORT_ID: 301
+            :
+                PC_PHYS_PORT_ID: 441
+            ?
+                PORT_ID: 302
+            :
+                PC_PHYS_PORT_ID: 443
+            ?
+                PORT_ID: 303
+            :
+                PC_PHYS_PORT_ID: 445
+            ?
+                PORT_ID: 304
+            :
+                PC_PHYS_PORT_ID: 447
+            ?
+                PORT_ID: 308
+            :
+                PC_PHYS_PORT_ID: 449
+            ?
+                PORT_ID: 309
+            :
+                PC_PHYS_PORT_ID: 451
+            ?
+                PORT_ID: 310
+            :
+                PC_PHYS_PORT_ID: 453
+            ?
+                PORT_ID: 311
+            :
+                PC_PHYS_PORT_ID: 455
+            ?
+                PORT_ID: 312
+            :
+                PC_PHYS_PORT_ID: 457
+            ?
+                PORT_ID: 313
+            :
+                PC_PHYS_PORT_ID: 459
+            ?
+                PORT_ID: 314
+            :
+                PC_PHYS_PORT_ID: 461
+            ?
+                PORT_ID: 315
+            :
+                PC_PHYS_PORT_ID: 463
+            ?
+                PORT_ID: 319
+            :
+                PC_PHYS_PORT_ID: 465
+            ?
+                PORT_ID: 320
+            :
+                PC_PHYS_PORT_ID: 467
+            ?
+                PORT_ID: 321
+            :
+                PC_PHYS_PORT_ID: 469
+            ?
+                PORT_ID: 322
+            :
+                PC_PHYS_PORT_ID: 471
+            ?
+                PORT_ID: 323
+            :
+                PC_PHYS_PORT_ID: 473
+            ?
+                PORT_ID: 324
+            :
+                PC_PHYS_PORT_ID: 475
+            ?
+                PORT_ID: 325
+            :
+                PC_PHYS_PORT_ID: 477
+            ?
+                PORT_ID: 326
+            :
+                PC_PHYS_PORT_ID: 479
+            ?
+                PORT_ID: 330
+            :
+                PC_PHYS_PORT_ID: 481
+            ?
+                PORT_ID: 331
+            :
+                PC_PHYS_PORT_ID: 483
+            ?
+                PORT_ID: 332
+            :
+                PC_PHYS_PORT_ID: 485
+            ?
+                PORT_ID: 333
+            :
+                PC_PHYS_PORT_ID: 487
+            ?
+                PORT_ID: 334
+            :
+                PC_PHYS_PORT_ID: 489
+            ?
+                PORT_ID: 335
+            :
+                PC_PHYS_PORT_ID: 491
+            ?
+                PORT_ID: 336
+            :
+                PC_PHYS_PORT_ID: 493
+            ?
+                PORT_ID: 337
+            :
+                PC_PHYS_PORT_ID: 495
+            ?
+                PORT_ID: 341
+            :
+                PC_PHYS_PORT_ID: 497
+            ?
+                PORT_ID: 342
+            :
+                PC_PHYS_PORT_ID: 499
+            ?
+                PORT_ID: 343
+            :
+                PC_PHYS_PORT_ID: 501
+            ?
+                PORT_ID: 344
+            :
+                PC_PHYS_PORT_ID: 503
+            ?
+                PORT_ID: 345
+            :
+                PC_PHYS_PORT_ID: 505
+            ?
+                PORT_ID: 346
+            :
+                PC_PHYS_PORT_ID: 507
+            ?
+                PORT_ID: 347
+            :
+                PC_PHYS_PORT_ID: 509
+            ?
+                PORT_ID: 348
+            :
+                PC_PHYS_PORT_ID: 511
+...
+---
+device:
+    0:
+        PC_PORT:
+            ?
+                PORT_ID: [[1, 8],
+                          [11, 18],
+                          [22, 29],
+                          [33, 40],
+                          [44, 51],
+                          [55, 62],
+                          [66, 73],
+                          [77, 84],
+                          [88, 95],
+                          [99, 106],
+                          [110, 117],
+                          [121, 128],
+                          [132, 139],
+                          [143, 150],
+                          [154, 161],
+                          [165, 172],
+                          [176, 183],
+                          [187, 194],
+                          [198, 205],
+                          [209, 216],
+                          [220, 227],
+                          [231, 238],
+                          [242, 249],
+                          [253, 260],
+                          [264, 271],
+                          [275, 282],
+                          [286, 293],
+                          [297, 304],
+                          [308, 315],
+                          [319, 326],
+                          [330, 337],
+                          [341, 348]]
+            :
+                ENABLE: 0
+                SPEED: 200000
+                NUM_LANES: 2
+                FEC_MODE: PC_FEC_RS544_2XN
+                MAX_FRAME_SIZE: 9416
+...
+---
+bcm_device:
+    0:
+        global:
+            ftem_mem_entries: 65536
+...
+---
+device:
+    0:
+        # Per pipe flex counter configuration
+        CTR_EFLEX_CONFIG:
+            CTR_ING_EFLEX_OPERMODE_PIPEUNIQUE: 0
+            CTR_EGR_EFLEX_OPERMODE_PIPEUNIQUE: 0
+
+        # IFP mode
+        FP_CONFIG:
+            FP_ING_OPERMODE: GLOBAL_PIPE_AWARE
+...
+---
+device:
+    0:
+        DEVICE_CONFIG:
+            AUTOLOAD_BOARD_SETTINGS: 0
+...

From 00c70707d8d07d537474ef8d5f4b655074a4efa8 Mon Sep 17 00:00:00 2001
From: Samuel Angebault <staphylo@arista.com>
Date: Mon, 6 May 2024 08:54:52 -0700
Subject: [PATCH 0520/1115] Add 4x200G breakout in platform.json

---
 .../x86_64-arista_7060x6_64pe/platform.json   | 386 +++++++++++++++++-
 1 file changed, 385 insertions(+), 1 deletion(-)

diff --git a/device/arista/x86_64-arista_7060x6_64pe/platform.json b/device/arista/x86_64-arista_7060x6_64pe/platform.json
index a249a56b4..45c564a12 100644
--- a/device/arista/x86_64-arista_7060x6_64pe/platform.json
+++ b/device/arista/x86_64-arista_7060x6_64pe/platform.json
@@ -321,6 +321,12 @@
                 "2x400G": [
                     "Ethernet1/1",
                     "Ethernet1/5"
+                ],
+                "4x200G": [
+                    "Ethernet1/1",
+                    "Ethernet1/3",
+                    "Ethernet1/5",
+                    "Ethernet1/7"
                 ]
             }
         },
@@ -337,6 +343,12 @@
                 "2x400G": [
                     "Ethernet2/1",
                     "Ethernet2/5"
+                ],
+                "4x200G": [
+                    "Ethernet2/1",
+                    "Ethernet2/3",
+                    "Ethernet2/5",
+                    "Ethernet2/7"
                 ]
             }
         },
@@ -353,6 +365,12 @@
                 "2x400G": [
                     "Ethernet3/1",
                     "Ethernet3/5"
+                ],
+                "4x200G": [
+                    "Ethernet3/1",
+                    "Ethernet3/3",
+                    "Ethernet3/5",
+                    "Ethernet3/7"
                 ]
             }
         },
@@ -369,6 +387,12 @@
                 "2x400G": [
                     "Ethernet4/1",
                     "Ethernet4/5"
+                ],
+                "4x200G": [
+                    "Ethernet4/1",
+                    "Ethernet4/3",
+                    "Ethernet4/5",
+                    "Ethernet4/7"
                 ]
             }
         },
@@ -385,6 +409,12 @@
                 "2x400G": [
                     "Ethernet5/1",
                     "Ethernet5/5"
+                ],
+                "4x200G": [
+                    "Ethernet5/1",
+                    "Ethernet5/3",
+                    "Ethernet5/5",
+                    "Ethernet5/7"
                 ]
             }
         },
@@ -401,6 +431,12 @@
                 "2x400G": [
                     "Ethernet6/1",
                     "Ethernet6/5"
+                ],
+                "4x200G": [
+                    "Ethernet6/1",
+                    "Ethernet6/3",
+                    "Ethernet6/5",
+                    "Ethernet6/7"
                 ]
             }
         },
@@ -417,6 +453,12 @@
                 "2x400G": [
                     "Ethernet7/1",
                     "Ethernet7/5"
+                ],
+                "4x200G": [
+                    "Ethernet7/1",
+                    "Ethernet7/3",
+                    "Ethernet7/5",
+                    "Ethernet7/7"
                 ]
             }
         },
@@ -433,6 +475,12 @@
                 "2x400G": [
                     "Ethernet8/1",
                     "Ethernet8/5"
+                ],
+                "4x200G": [
+                    "Ethernet8/1",
+                    "Ethernet8/3",
+                    "Ethernet8/5",
+                    "Ethernet8/7"
                 ]
             }
         },
@@ -449,6 +497,12 @@
                 "2x400G": [
                     "Ethernet9/1",
                     "Ethernet9/5"
+                ],
+                "4x200G": [
+                    "Ethernet9/1",
+                    "Ethernet9/3",
+                    "Ethernet9/5",
+                    "Ethernet9/7"
                 ]
             }
         },
@@ -465,6 +519,12 @@
                 "2x400G": [
                     "Ethernet10/1",
                     "Ethernet10/5"
+                ],
+                "4x200G": [
+                    "Ethernet10/1",
+                    "Ethernet10/3",
+                    "Ethernet10/5",
+                    "Ethernet10/7"
                 ]
             }
         },
@@ -481,6 +541,12 @@
                 "2x400G": [
                     "Ethernet11/1",
                     "Ethernet11/5"
+                ],
+                "4x200G": [
+                    "Ethernet11/1",
+                    "Ethernet11/3",
+                    "Ethernet11/5",
+                    "Ethernet11/7"
                 ]
             }
         },
@@ -497,6 +563,12 @@
                 "2x400G": [
                     "Ethernet12/1",
                     "Ethernet12/5"
+                ],
+                "4x200G": [
+                    "Ethernet12/1",
+                    "Ethernet12/3",
+                    "Ethernet12/5",
+                    "Ethernet12/7"
                 ]
             }
         },
@@ -513,6 +585,12 @@
                 "2x400G": [
                     "Ethernet13/1",
                     "Ethernet13/5"
+                ],
+                "4x200G": [
+                    "Ethernet13/1",
+                    "Ethernet13/3",
+                    "Ethernet13/5",
+                    "Ethernet13/7"
                 ]
             }
         },
@@ -529,6 +607,12 @@
                 "2x400G": [
                     "Ethernet14/1",
                     "Ethernet14/5"
+                ],
+                "4x200G": [
+                    "Ethernet14/1",
+                    "Ethernet14/3",
+                    "Ethernet14/5",
+                    "Ethernet14/7"
                 ]
             }
         },
@@ -545,6 +629,12 @@
                 "2x400G": [
                     "Ethernet15/1",
                     "Ethernet15/5"
+                ],
+                "4x200G": [
+                    "Ethernet15/1",
+                    "Ethernet15/3",
+                    "Ethernet15/5",
+                    "Ethernet15/7"
                 ]
             }
         },
@@ -561,6 +651,12 @@
                 "2x400G": [
                     "Ethernet16/1",
                     "Ethernet16/5"
+                ],
+                "4x200G": [
+                    "Ethernet16/1",
+                    "Ethernet16/3",
+                    "Ethernet16/5",
+                    "Ethernet16/7"
                 ]
             }
         },
@@ -577,6 +673,12 @@
                 "2x400G": [
                     "Ethernet17/1",
                     "Ethernet17/5"
+                ],
+                "4x200G": [
+                    "Ethernet17/1",
+                    "Ethernet17/3",
+                    "Ethernet17/5",
+                    "Ethernet17/7"
                 ]
             }
         },
@@ -593,6 +695,12 @@
                 "2x400G": [
                     "Ethernet18/1",
                     "Ethernet18/5"
+                ],
+                "4x200G": [
+                    "Ethernet18/1",
+                    "Ethernet18/3",
+                    "Ethernet18/5",
+                    "Ethernet18/7"
                 ]
             }
         },
@@ -609,6 +717,12 @@
                 "2x400G": [
                     "Ethernet19/1",
                     "Ethernet19/5"
+                ],
+                "4x200G": [
+                    "Ethernet19/1",
+                    "Ethernet19/3",
+                    "Ethernet19/5",
+                    "Ethernet19/7"
                 ]
             }
         },
@@ -625,6 +739,12 @@
                 "2x400G": [
                     "Ethernet20/1",
                     "Ethernet20/5"
+                ],
+                "4x200G": [
+                    "Ethernet20/1",
+                    "Ethernet20/3",
+                    "Ethernet20/5",
+                    "Ethernet20/7"
                 ]
             }
         },
@@ -641,6 +761,12 @@
                 "2x400G": [
                     "Ethernet21/1",
                     "Ethernet21/5"
+                ],
+                "4x200G": [
+                    "Ethernet21/1",
+                    "Ethernet21/3",
+                    "Ethernet21/5",
+                    "Ethernet21/7"
                 ]
             }
         },
@@ -657,6 +783,12 @@
                 "2x400G": [
                     "Ethernet22/1",
                     "Ethernet22/5"
+                ],
+                "4x200G": [
+                    "Ethernet22/1",
+                    "Ethernet22/3",
+                    "Ethernet22/5",
+                    "Ethernet22/7"
                 ]
             }
         },
@@ -673,6 +805,12 @@
                 "2x400G": [
                     "Ethernet23/1",
                     "Ethernet23/5"
+                ],
+                "4x200G": [
+                    "Ethernet23/1",
+                    "Ethernet23/3",
+                    "Ethernet23/5",
+                    "Ethernet23/7"
                 ]
             }
         },
@@ -689,6 +827,12 @@
                 "2x400G": [
                     "Ethernet24/1",
                     "Ethernet24/5"
+                ],
+                "4x200G": [
+                    "Ethernet24/1",
+                    "Ethernet24/3",
+                    "Ethernet24/5",
+                    "Ethernet24/7"
                 ]
             }
         },
@@ -705,6 +849,12 @@
                 "2x400G": [
                     "Ethernet25/1",
                     "Ethernet25/5"
+                ],
+                "4x200G": [
+                    "Ethernet25/1",
+                    "Ethernet25/3",
+                    "Ethernet25/5",
+                    "Ethernet25/7"
                 ]
             }
         },
@@ -721,6 +871,12 @@
                 "2x400G": [
                     "Ethernet26/1",
                     "Ethernet26/5"
+                ],
+                "4x200G": [
+                    "Ethernet26/1",
+                    "Ethernet26/3",
+                    "Ethernet26/5",
+                    "Ethernet26/7"
                 ]
             }
         },
@@ -737,6 +893,12 @@
                 "2x400G": [
                     "Ethernet27/1",
                     "Ethernet27/5"
+                ],
+                "4x200G": [
+                    "Ethernet27/1",
+                    "Ethernet27/3",
+                    "Ethernet27/5",
+                    "Ethernet27/7"
                 ]
             }
         },
@@ -753,6 +915,12 @@
                 "2x400G": [
                     "Ethernet28/1",
                     "Ethernet28/5"
+                ],
+                "4x200G": [
+                    "Ethernet28/1",
+                    "Ethernet28/3",
+                    "Ethernet28/5",
+                    "Ethernet28/7"
                 ]
             }
         },
@@ -769,6 +937,12 @@
                 "2x400G": [
                     "Ethernet29/1",
                     "Ethernet29/5"
+                ],
+                "4x200G": [
+                    "Ethernet29/1",
+                    "Ethernet29/3",
+                    "Ethernet29/5",
+                    "Ethernet29/7"
                 ]
             }
         },
@@ -785,6 +959,12 @@
                 "2x400G": [
                     "Ethernet30/1",
                     "Ethernet30/5"
+                ],
+                "4x200G": [
+                    "Ethernet30/1",
+                    "Ethernet30/3",
+                    "Ethernet30/5",
+                    "Ethernet30/7"
                 ]
             }
         },
@@ -801,6 +981,12 @@
                 "2x400G": [
                     "Ethernet31/1",
                     "Ethernet31/5"
+                ],
+                "4x200G": [
+                    "Ethernet31/1",
+                    "Ethernet31/3",
+                    "Ethernet31/5",
+                    "Ethernet31/7"
                 ]
             }
         },
@@ -817,6 +1003,12 @@
                 "2x400G": [
                     "Ethernet32/1",
                     "Ethernet32/5"
+                ],
+                "4x200G": [
+                    "Ethernet32/1",
+                    "Ethernet32/3",
+                    "Ethernet32/5",
+                    "Ethernet32/7"
                 ]
             }
         },
@@ -833,6 +1025,12 @@
                 "2x400G": [
                     "Ethernet33/1",
                     "Ethernet33/5"
+                ],
+                "4x200G": [
+                    "Ethernet33/1",
+                    "Ethernet33/3",
+                    "Ethernet33/5",
+                    "Ethernet33/7"
                 ]
             }
         },
@@ -849,6 +1047,12 @@
                 "2x400G": [
                     "Ethernet34/1",
                     "Ethernet34/5"
+                ],
+                "4x200G": [
+                    "Ethernet34/1",
+                    "Ethernet34/3",
+                    "Ethernet34/5",
+                    "Ethernet34/7"
                 ]
             }
         },
@@ -865,6 +1069,12 @@
                 "2x400G": [
                     "Ethernet35/1",
                     "Ethernet35/5"
+                ],
+                "4x200G": [
+                    "Ethernet35/1",
+                    "Ethernet35/3",
+                    "Ethernet35/5",
+                    "Ethernet35/7"
                 ]
             }
         },
@@ -881,6 +1091,12 @@
                 "2x400G": [
                     "Ethernet36/1",
                     "Ethernet36/5"
+                ],
+                "4x200G": [
+                    "Ethernet36/1",
+                    "Ethernet36/3",
+                    "Ethernet36/5",
+                    "Ethernet36/7"
                 ]
             }
         },
@@ -897,6 +1113,12 @@
                 "2x400G": [
                     "Ethernet37/1",
                     "Ethernet37/5"
+                ],
+                "4x200G": [
+                    "Ethernet37/1",
+                    "Ethernet37/3",
+                    "Ethernet37/5",
+                    "Ethernet37/7"
                 ]
             }
         },
@@ -913,6 +1135,12 @@
                 "2x400G": [
                     "Ethernet38/1",
                     "Ethernet38/5"
+                ],
+                "4x200G": [
+                    "Ethernet38/1",
+                    "Ethernet38/3",
+                    "Ethernet38/5",
+                    "Ethernet38/7"
                 ]
             }
         },
@@ -929,6 +1157,12 @@
                 "2x400G": [
                     "Ethernet39/1",
                     "Ethernet39/5"
+                ],
+                "4x200G": [
+                    "Ethernet39/1",
+                    "Ethernet39/3",
+                    "Ethernet39/5",
+                    "Ethernet39/7"
                 ]
             }
         },
@@ -945,6 +1179,12 @@
                 "2x400G": [
                     "Ethernet40/1",
                     "Ethernet40/5"
+                ],
+                "4x200G": [
+                    "Ethernet40/1",
+                    "Ethernet40/3",
+                    "Ethernet40/5",
+                    "Ethernet40/7"
                 ]
             }
         },
@@ -961,6 +1201,12 @@
                 "2x400G": [
                     "Ethernet41/1",
                     "Ethernet41/5"
+                ],
+                "4x200G": [
+                    "Ethernet41/1",
+                    "Ethernet41/3",
+                    "Ethernet41/5",
+                    "Ethernet41/7"
                 ]
             }
         },
@@ -977,6 +1223,12 @@
                 "2x400G": [
                     "Ethernet42/1",
                     "Ethernet42/5"
+                ],
+                "4x200G": [
+                    "Ethernet42/1",
+                    "Ethernet42/3",
+                    "Ethernet42/5",
+                    "Ethernet42/7"
                 ]
             }
         },
@@ -993,6 +1245,12 @@
                 "2x400G": [
                     "Ethernet43/1",
                     "Ethernet43/5"
+                ],
+                "4x200G": [
+                    "Ethernet43/1",
+                    "Ethernet43/3",
+                    "Ethernet43/5",
+                    "Ethernet43/7"
                 ]
             }
         },
@@ -1009,6 +1267,12 @@
                 "2x400G": [
                     "Ethernet44/1",
                     "Ethernet44/5"
+                ],
+                "4x200G": [
+                    "Ethernet44/1",
+                    "Ethernet44/3",
+                    "Ethernet44/5",
+                    "Ethernet44/7"
                 ]
             }
         },
@@ -1025,6 +1289,12 @@
                 "2x400G": [
                     "Ethernet45/1",
                     "Ethernet45/5"
+                ],
+                "4x200G": [
+                    "Ethernet45/1",
+                    "Ethernet45/3",
+                    "Ethernet45/5",
+                    "Ethernet45/7"
                 ]
             }
         },
@@ -1041,6 +1311,12 @@
                 "2x400G": [
                     "Ethernet46/1",
                     "Ethernet46/5"
+                ],
+                "4x200G": [
+                    "Ethernet46/1",
+                    "Ethernet46/3",
+                    "Ethernet46/5",
+                    "Ethernet46/7"
                 ]
             }
         },
@@ -1057,6 +1333,12 @@
                 "2x400G": [
                     "Ethernet47/1",
                     "Ethernet47/5"
+                ],
+                "4x200G": [
+                    "Ethernet47/1",
+                    "Ethernet47/3",
+                    "Ethernet47/5",
+                    "Ethernet47/7"
                 ]
             }
         },
@@ -1073,6 +1355,12 @@
                 "2x400G": [
                     "Ethernet48/1",
                     "Ethernet48/5"
+                ],
+                "4x200G": [
+                    "Ethernet48/1",
+                    "Ethernet48/3",
+                    "Ethernet48/5",
+                    "Ethernet48/7"
                 ]
             }
         },
@@ -1089,6 +1377,12 @@
                 "2x400G": [
                     "Ethernet49/1",
                     "Ethernet49/5"
+                ],
+                "4x200G": [
+                    "Ethernet49/1",
+                    "Ethernet49/3",
+                    "Ethernet49/5",
+                    "Ethernet49/7"
                 ]
             }
         },
@@ -1105,6 +1399,12 @@
                 "2x400G": [
                     "Ethernet50/1",
                     "Ethernet50/5"
+                ],
+                "4x200G": [
+                    "Ethernet50/1",
+                    "Ethernet50/3",
+                    "Ethernet50/5",
+                    "Ethernet50/7"
                 ]
             }
         },
@@ -1121,6 +1421,12 @@
                 "2x400G": [
                     "Ethernet51/1",
                     "Ethernet51/5"
+                ],
+                "4x200G": [
+                    "Ethernet51/1",
+                    "Ethernet51/3",
+                    "Ethernet51/5",
+                    "Ethernet51/7"
                 ]
             }
         },
@@ -1137,6 +1443,12 @@
                 "2x400G": [
                     "Ethernet52/1",
                     "Ethernet52/5"
+                ],
+                "4x200G": [
+                    "Ethernet52/1",
+                    "Ethernet52/3",
+                    "Ethernet52/5",
+                    "Ethernet52/7"
                 ]
             }
         },
@@ -1153,6 +1465,12 @@
                 "2x400G": [
                     "Ethernet53/1",
                     "Ethernet53/5"
+                ],
+                "4x200G": [
+                    "Ethernet53/1",
+                    "Ethernet53/3",
+                    "Ethernet53/5",
+                    "Ethernet53/7"
                 ]
             }
         },
@@ -1169,6 +1487,12 @@
                 "2x400G": [
                     "Ethernet54/1",
                     "Ethernet54/5"
+                ],
+                "4x200G": [
+                    "Ethernet54/1",
+                    "Ethernet54/3",
+                    "Ethernet54/5",
+                    "Ethernet54/7"
                 ]
             }
         },
@@ -1185,6 +1509,12 @@
                 "2x400G": [
                     "Ethernet55/1",
                     "Ethernet55/5"
+                ],
+                "4x200G": [
+                    "Ethernet55/1",
+                    "Ethernet55/3",
+                    "Ethernet55/5",
+                    "Ethernet55/7"
                 ]
             }
         },
@@ -1201,6 +1531,12 @@
                 "2x400G": [
                     "Ethernet56/1",
                     "Ethernet56/5"
+                ],
+                "4x200G": [
+                    "Ethernet56/1",
+                    "Ethernet56/3",
+                    "Ethernet56/5",
+                    "Ethernet56/7"
                 ]
             }
         },
@@ -1217,6 +1553,12 @@
                 "2x400G": [
                     "Ethernet57/1",
                     "Ethernet57/5"
+                ],
+                "4x200G": [
+                    "Ethernet57/1",
+                    "Ethernet57/3",
+                    "Ethernet57/5",
+                    "Ethernet57/7"
                 ]
             }
         },
@@ -1233,6 +1575,12 @@
                 "2x400G": [
                     "Ethernet58/1",
                     "Ethernet58/5"
+                ],
+                "4x200G": [
+                    "Ethernet58/1",
+                    "Ethernet58/3",
+                    "Ethernet58/5",
+                    "Ethernet58/7"
                 ]
             }
         },
@@ -1249,6 +1597,12 @@
                 "2x400G": [
                     "Ethernet59/1",
                     "Ethernet59/5"
+                ],
+                "4x200G": [
+                    "Ethernet59/1",
+                    "Ethernet59/3",
+                    "Ethernet59/5",
+                    "Ethernet59/7"
                 ]
             }
         },
@@ -1265,6 +1619,12 @@
                 "2x400G": [
                     "Ethernet60/1",
                     "Ethernet60/5"
+                ],
+                "4x200G": [
+                    "Ethernet60/1",
+                    "Ethernet60/3",
+                    "Ethernet60/5",
+                    "Ethernet60/7"
                 ]
             }
         },
@@ -1281,6 +1641,12 @@
                 "2x400G": [
                     "Ethernet61/1",
                     "Ethernet61/5"
+                ],
+                "4x200G": [
+                    "Ethernet61/1",
+                    "Ethernet61/3",
+                    "Ethernet61/5",
+                    "Ethernet61/7"
                 ]
             }
         },
@@ -1297,6 +1663,12 @@
                 "2x400G": [
                     "Ethernet62/1",
                     "Ethernet62/5"
+                ],
+                "4x200G": [
+                    "Ethernet62/1",
+                    "Ethernet62/3",
+                    "Ethernet62/5",
+                    "Ethernet62/7"
                 ]
             }
         },
@@ -1313,6 +1685,12 @@
                 "2x400G": [
                     "Ethernet63/1",
                     "Ethernet63/5"
+                ],
+                "4x200G": [
+                    "Ethernet63/1",
+                    "Ethernet63/3",
+                    "Ethernet63/5",
+                    "Ethernet63/7"
                 ]
             }
         },
@@ -1329,8 +1707,14 @@
                 "2x400G": [
                     "Ethernet64/1",
                     "Ethernet64/5"
+                ],
+                "4x200G": [
+                    "Ethernet64/1",
+                    "Ethernet64/3",
+                    "Ethernet64/5",
+                    "Ethernet64/7"
                 ]
             }
         }
     }
-}
+}
\ No newline at end of file

From a268da38c9d88f056042db06345741557731e726 Mon Sep 17 00:00:00 2001
From: Samuel Angebault <staphylo@arista.com>
Date: Mon, 6 May 2024 22:59:41 +0200
Subject: [PATCH 0521/1115] [Arista] Update platform library submodules
 (#18877)

Add platform driver support for the DCS-7060X6-64PE product
---
 platform/barefoot/sonic-platform-modules-arista | 2 +-
 platform/broadcom/sonic-platform-modules-arista | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/platform/barefoot/sonic-platform-modules-arista b/platform/barefoot/sonic-platform-modules-arista
index 9038696de..c8924f32a 160000
--- a/platform/barefoot/sonic-platform-modules-arista
+++ b/platform/barefoot/sonic-platform-modules-arista
@@ -1 +1 @@
-Subproject commit 9038696debe74bd99b0b6e35552531e38cd1aa51
+Subproject commit c8924f32a3cff45e35dcdfd9f0b7dd9d37cecf60
diff --git a/platform/broadcom/sonic-platform-modules-arista b/platform/broadcom/sonic-platform-modules-arista
index 9038696de..c8924f32a 160000
--- a/platform/broadcom/sonic-platform-modules-arista
+++ b/platform/broadcom/sonic-platform-modules-arista
@@ -1 +1 @@
-Subproject commit 9038696debe74bd99b0b6e35552531e38cd1aa51
+Subproject commit c8924f32a3cff45e35dcdfd9f0b7dd9d37cecf60

From 0fcdfee663a55a80d286f9b01b1b82c68b98a801 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Tue, 7 May 2024 16:01:31 +0800
Subject: [PATCH 0522/1115] [submodule] Update submodule sonic-mgmt-common to
 the latest HEAD automatically (#18889)

#### Why I did it
src/sonic-mgmt-common
```
* 328d806 - (HEAD -> master, origin/master, origin/HEAD) Release CString memory to fix memory leak (#138) (11 hours ago) [ganglv]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-mgmt-common | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-mgmt-common b/src/sonic-mgmt-common
index 85119e8f9..328d8063c 160000
--- a/src/sonic-mgmt-common
+++ b/src/sonic-mgmt-common
@@ -1 +1 @@
-Subproject commit 85119e8f920399ad91eae06a33661707eeb7cd04
+Subproject commit 328d8063c1692ef402a15b5228b2a3c71b9dc53c

From 8dde75f9d479be42d55ab7ef458ed714a30b18ac Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Tue, 7 May 2024 16:01:36 +0800
Subject: [PATCH 0523/1115] [submodule] Update submodule sonic-gnmi to the
 latest HEAD automatically (#18888)

#### Why I did it
src/sonic-gnmi
```
* c2bfe3d - (HEAD -> master, origin/master, origin/HEAD) Fix memory leak in unit test (#230) (44 minutes ago) [ganglv]
* 16c2975 - Disable translib unit test (#229) (71 minutes ago) [ganglv]
* 4c86853 - Merge pull request #224 from ganglyu/fix_build (10 hours ago) [Saikrishna Arcot]
* db2d896 - Disable dialout unit test (3 days ago) [ganglyu]
* 0e4ac4d - Disable translib test (4 days ago) [ganglyu]
* 8494e90 - Fix unit test (4 days ago) [ganglyu]
* 036979d - Fix unit test (4 days ago) [ganglyu]
* bd74b09 - Disable failed unit test (4 days ago) [ganglyu]
* a4bc960 - Update go.mod (7 days ago) [ganglyu]
* c15d45f - Fix build error (7 days ago) [ganglyu]
* 775a41e - Fix go.sum (7 days ago) [ganglyu]
* b39742e - Fix build error from sonic-mgmt-common (7 days ago) [ganglyu]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-gnmi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-gnmi b/src/sonic-gnmi
index eea5d7dd6..c2bfe3d27 160000
--- a/src/sonic-gnmi
+++ b/src/sonic-gnmi
@@ -1 +1 @@
-Subproject commit eea5d7dd6297b7c31e15d22c12c1c9b6350596cd
+Subproject commit c2bfe3d2735421b3cb84d10e84014ed8019f986b

From 4a421c89acb09e665031b8389bc13b82cb353711 Mon Sep 17 00:00:00 2001
From: Yakiv Huryk <62013282+Yakiv-Huryk@users.noreply.github.com>
Date: Tue, 7 May 2024 13:31:46 +0300
Subject: [PATCH 0524/1115] [Mellanox] update platform name for simx platforms
 (#18861)

- Why I did it
To update Mellanox simx platforms chassis name

- How I did it
Updated relevant platform.json files

Signed-off-by: Yakiv Huryk <yhuryk@nvidia.com>
---
 device/mellanox/x86_64-mlnx_msn4700_simx-r0/platform.json  | 2 +-
 device/mellanox/x86_64-nvidia_sn4280_simx-r0/platform.json | 2 +-
 device/mellanox/x86_64-nvidia_sn5400_simx-r0/platform.json | 2 +-
 device/mellanox/x86_64-nvidia_sn5600_simx-r0/platform.json | 2 +-
 4 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/device/mellanox/x86_64-mlnx_msn4700_simx-r0/platform.json b/device/mellanox/x86_64-mlnx_msn4700_simx-r0/platform.json
index 86fcbf5b9..480edaa95 100644
--- a/device/mellanox/x86_64-mlnx_msn4700_simx-r0/platform.json
+++ b/device/mellanox/x86_64-mlnx_msn4700_simx-r0/platform.json
@@ -1,6 +1,6 @@
 {
     "chassis": {
-        "name": "MSN4700",
+        "name": "MSN4700_SIMX",
         "components": [
             {
                 "name": "ONIE"
diff --git a/device/mellanox/x86_64-nvidia_sn4280_simx-r0/platform.json b/device/mellanox/x86_64-nvidia_sn4280_simx-r0/platform.json
index 599d9269a..e0640c0ce 100644
--- a/device/mellanox/x86_64-nvidia_sn4280_simx-r0/platform.json
+++ b/device/mellanox/x86_64-nvidia_sn4280_simx-r0/platform.json
@@ -1,6 +1,6 @@
 {
     "chassis": {
-        "name": "SN4280",
+        "name": "SN4280_SIMX",
         "components": [
             {
                 "name": "ONIE"
diff --git a/device/mellanox/x86_64-nvidia_sn5400_simx-r0/platform.json b/device/mellanox/x86_64-nvidia_sn5400_simx-r0/platform.json
index 213822ce5..a2a9ad437 100644
--- a/device/mellanox/x86_64-nvidia_sn5400_simx-r0/platform.json
+++ b/device/mellanox/x86_64-nvidia_sn5400_simx-r0/platform.json
@@ -1,6 +1,6 @@
 {
     "chassis": {
-        "name": "SN5400",
+        "name": "SN5400_SIMX",
         "components": [
             {
                 "name": "ONIE"
diff --git a/device/mellanox/x86_64-nvidia_sn5600_simx-r0/platform.json b/device/mellanox/x86_64-nvidia_sn5600_simx-r0/platform.json
index 2843b8318..a10a478c4 100644
--- a/device/mellanox/x86_64-nvidia_sn5600_simx-r0/platform.json
+++ b/device/mellanox/x86_64-nvidia_sn5600_simx-r0/platform.json
@@ -1,6 +1,6 @@
 {
     "chassis": {
-        "name": "SN5600",
+        "name": "SN5600_SIMX",
         "components": [
             {
                 "name": "ONIE"

From baebd255e1c3bba6a0ae26f23a8356e5bfdeff14 Mon Sep 17 00:00:00 2001
From: Vivek <vkarri@nvidia.com>
Date: Tue, 7 May 2024 03:37:12 -0700
Subject: [PATCH 0525/1115] [Mellanox] Remove external-changes patch if no
 downstream changes are found (#18795)

- Why I did it
Bug Fix: when the external-changes.patch is empty, sonic-linux-kernel build fails when called with INCLUDE_EXTERNAL_PATCHES=y flag

How I did it

- How to verify it
Verified by integrating a hw-mgmt version without downstream patches and building linux kernel with EXTERNAL_PATCHES flag

Signed-off-by: Vivek Reddy <vkarri@nvidia.com>
---
 platform/mellanox/integration-scripts.mk      |  7 ++--
 .../hwmgmt_kernel_patches.py                  | 33 +++++++++++++++----
 .../tests/test_hwmgmtaction.py                |  8 ++---
 3 files changed, 33 insertions(+), 15 deletions(-)

diff --git a/platform/mellanox/integration-scripts.mk b/platform/mellanox/integration-scripts.mk
index 10282555b..faca4c602 100644
--- a/platform/mellanox/integration-scripts.mk
+++ b/platform/mellanox/integration-scripts.mk
@@ -163,11 +163,8 @@ endif
 	git add -- $(PLATFORM_PATH)/non-upstream-patches/
 	git add -- $(PLATFORM_PATH)/hw-management.mk
 
-	echo -en '\n###-> Non Upstream external-changes.patch changes <-###\n' >> ${HWMGMT_USER_OUTFILE}
-	git diff --no-color --staged -- $(PLATFORM_PATH)/non-upstream-patches/external-changes.patch >> ${HWMGMT_USER_OUTFILE}
-
-	echo -en '\n###-> Non Upstream kconfig-inclusions.patch changes <-###\n' >> ${HWMGMT_USER_OUTFILE}
-	git diff --no-color --staged -- $(PLATFORM_PATH)/non-upstream-patches/kconfig-inclusions.patch >> ${HWMGMT_USER_OUTFILE}
+	echo -en '\n###-> Non Upstream changes <-###\n' >> ${HWMGMT_USER_OUTFILE}
+	git diff --no-color --staged -- $(PLATFORM_PATH)/non-upstream-patches/ >> ${HWMGMT_USER_OUTFILE}
 
 	echo -en '\n###-> Non Upstream patch list file <-###\n' >> ${HWMGMT_USER_OUTFILE}
 	git diff --no-color --staged -- $($(MLNX_HW_MANAGEMENT)_SRC_PATH)/hwmgmt_nonup_patches >> ${HWMGMT_USER_OUTFILE}
diff --git a/platform/mellanox/integration-scripts/hwmgmt_kernel_patches.py b/platform/mellanox/integration-scripts/hwmgmt_kernel_patches.py
index 8db9babb8..58de83743 100755
--- a/platform/mellanox/integration-scripts/hwmgmt_kernel_patches.py
+++ b/platform/mellanox/integration-scripts/hwmgmt_kernel_patches.py
@@ -1,6 +1,6 @@
 #!/usr/bin/env python
 #
-# Copyright (c) 2023 NVIDIA CORPORATION & AFFILIATES.
+# Copyright (c) 2023-2024 NVIDIA CORPORATION & AFFILIATES.
 # Apache-2.0
 #
 # Licensed under the Apache License, Version 2.0 (the "License");
@@ -18,7 +18,7 @@
 
 from hwmgmt_helper import *
 
-COMMIT_TITLE = "Intgerate HW-MGMT {} Changes"
+COMMIT_TITLE = "Integrate HW-MGMT {} Changes"
 
 PATCH_TABLE_LOC = "platform/mellanox/hw-management/hw-mgmt/recipes-kernel/linux/"
 PATCHWORK_LOC = "linux-{}/patchwork"
@@ -270,9 +270,15 @@ def rm_old_non_up_mlnx(self):
             sys.exit(1)
         
     def mv_new_non_up_mlnx(self):
+        dest_fpath = os.path.join(self.args.build_root, NON_UP_PATCH_LOC)
+        if not Data.new_non_up and os.path.exists(dest_fpath):
+            os.rmdir(dest_fpath)
+            return
+
         for patch in Data.new_non_up:
             src_path = os.path.join(self.args.non_up_patches, patch)
-            shutil.copy(src_path, os.path.join(self.args.build_root, NON_UP_PATCH_LOC))
+            os.makedirs(dest_fpath, exist_ok=True)
+            shutil.copy(src_path, dest_fpath)
     
     def construct_series_with_non_up(self):
         Data.agg_slk_series = copy.deepcopy(Data.up_slk_series) 
@@ -309,7 +315,23 @@ def get_series_diff(self):
         return lines
     
     def get_merged_diff(self, series_diff: list, kcfg_diff: list) -> list:
-        return series_diff + ["\n"] + kcfg_diff
+        if series_diff or kcfg_diff:
+            return series_diff + ["\n"] + kcfg_diff
+        else:
+            return []
+
+    def write_non_up_diff(self, series_diff, kcfg_diff):
+        final_diff = self.get_merged_diff(series_diff, kcfg_diff)
+        non_up_diff_path = os.path.join(self.args.build_root, NON_UP_DIFF)
+        if "".join(final_diff).strip():
+            # don't write anything if the diff just contains whitespaces
+            FileHandler.write_lines(non_up_diff_path, final_diff, True)
+        else:
+            # if nothing to write, delete the patch file
+            try:
+                os.remove(non_up_diff_path)
+            except OSError as error:
+                print("-> NOTICE File {} remove failed with error {}".format(non_up_diff_path, error))
 
     def list_patches(self):
         old_up_patches = []
@@ -388,8 +410,7 @@ def perform(self):
         series_diff = self.get_series_diff()
         # handle kconfig and get any diff
         kcfg_diff = self.kcfg_handler.perform()
-        final_diff = self.get_merged_diff(series_diff, kcfg_diff)
-        FileHandler.write_lines(os.path.join(self.args.build_root, NON_UP_DIFF), final_diff, True)
+        self.write_non_up_diff(series_diff, kcfg_diff)
 
         path = os.path.join(self.args.build_root, PATCH_TABLE_LOC)
         patch_table = load_patch_table(path, Data.k_ver)
diff --git a/platform/mellanox/integration-scripts/tests/test_hwmgmtaction.py b/platform/mellanox/integration-scripts/tests/test_hwmgmtaction.py
index f3ec546a2..84831e21e 100644
--- a/platform/mellanox/integration-scripts/tests/test_hwmgmtaction.py
+++ b/platform/mellanox/integration-scripts/tests/test_hwmgmtaction.py
@@ -1,5 +1,5 @@
 #
-# Copyright (c) 2023 NVIDIA CORPORATION & AFFILIATES.
+# Copyright (c) 2023-2024 NVIDIA CORPORATION & AFFILIATES.
 # Apache-2.0
 #
 # Licensed under the Apache License, Version 2.0 (the "License");
@@ -56,7 +56,7 @@
 """
 
 TEST_SLK_COMMIT = """\
-Intgerate HW-MGMT 7.0030.0937 Changes
+Integrate HW-MGMT 7.0030.0937 Changes
  ## Patch List
 * 0002-i2c-mlxcpld-Decrease-polling-time-for-performance-im.patch : https://github.com/torvalds/linux/commit/cb9744178f33
 * 0003-i2c-mlxcpld-Add-support-for-I2C-bus-frequency-settin.patch : https://github.com/torvalds/linux/commit/66b0c2846ba8
@@ -71,7 +71,7 @@
 """
 
 TEST_SB_COMMIT = """\
-Intgerate HW-MGMT 7.0030.0937 Changes
+Integrate HW-MGMT 7.0030.0937 Changes
 
 """
 
@@ -165,8 +165,8 @@ def test_write_final_diff(self, mock_write_lines):
         series_diff = self.action.get_series_diff()
         kcfg_diff = self._get_kcfg_incl_diff()
         final_diff = self.action.get_merged_diff(series_diff, kcfg_diff)
+        self.action.write_non_up_diff(series_diff, kcfg_diff)
         print("".join(final_diff))
-        FileHandler.write_lines(os.path.join(self.action.args.build_root, NON_UP_DIFF), final_diff, True)
         assert check_file_content(MOCK_INPUTS_DIR+"expected_data/external-changes.patch")
 
     def test_commit_msg(self):

From 4839a7b08b6535eb107da24ff54b5f9b29abe506 Mon Sep 17 00:00:00 2001
From: Andriy Yurkiv <70649192+ayurkiv-nvda@users.noreply.github.com>
Date: Tue, 7 May 2024 13:38:19 +0300
Subject: [PATCH 0526/1115] [Mellanox][SN4410] Add missing interfaces to hwsku
 (#18791)

- Why I did it
Logic of config generation changed recently
Command : sonic-cfggen -H -k ACS-MSN4410 --preset t1  will fail after ONIE installation.
There are missing interfaces for 4410 HWSKU. Need to add them.

- How I did it
Update file device/mellanox/x86_64-mlnx_msn4410-r0/ACS-MSN4410/hwsku.json

- How to verify it
sonic-cfggen -H -k ACS-MSN4410 --preset t1 will pass successfully on 4410 platform after ONIE installation.

Signed-off-by: Andriy Yurkiv <ayurkiv@nvidia.com>
---
 .../ACS-MSN4410/hwsku.json                    | 72 +++++++++++++++++++
 1 file changed, 72 insertions(+)

diff --git a/device/mellanox/x86_64-mlnx_msn4410-r0/ACS-MSN4410/hwsku.json b/device/mellanox/x86_64-mlnx_msn4410-r0/ACS-MSN4410/hwsku.json
index 6e1c31705..52d9c481a 100644
--- a/device/mellanox/x86_64-mlnx_msn4410-r0/ACS-MSN4410/hwsku.json
+++ b/device/mellanox/x86_64-mlnx_msn4410-r0/ACS-MSN4410/hwsku.json
@@ -3,75 +3,147 @@
         "Ethernet0": {
             "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]"
         },
+        "Ethernet4": {
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]"
+        },
         "Ethernet8": {
             "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]"
         },
+        "Ethernet12": {
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]"
+        },
         "Ethernet16": {
             "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]"
         },
+        "Ethernet20": {
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]"
+        },
         "Ethernet24": {
             "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]"
         },
+        "Ethernet28": {
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]"
+        },
         "Ethernet32": {
             "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]"
         },
+        "Ethernet36": {
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]"
+        },
         "Ethernet40": {
             "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]"
         },
+        "Ethernet44": {
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]"
+        },
         "Ethernet48": {
             "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]"
         },
+        "Ethernet52": {
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]"
+        },
         "Ethernet56": {
             "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]"
         },
+        "Ethernet60": {
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]"
+        },
         "Ethernet64": {
             "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]"
         },
+        "Ethernet68": {
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]"
+        },
         "Ethernet72": {
             "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]"
         },
+        "Ethernet76": {
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]"
+        },
         "Ethernet80": {
             "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]"
         },
+        "Ethernet84": {
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]"
+        },
         "Ethernet88": {
             "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]"
         },
+        "Ethernet92": {
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]"
+        },
         "Ethernet96": {
             "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]"
         },
+        "Ethernet100": {
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]"
+        },
         "Ethernet104": {
             "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]"
         },
+        "Ethernet108": {
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]"
+        },
         "Ethernet112": {
             "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]"
         },
+        "Ethernet116": {
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]"
+        },
         "Ethernet120": {
             "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]"
         },
+        "Ethernet124": {
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]"
+        },
         "Ethernet128": {
             "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]"
         },
+        "Ethernet132": {
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]"
+        },
         "Ethernet136": {
             "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]"
         },
+        "Ethernet140": {
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]"
+        },
         "Ethernet144": {
             "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]"
         },
+        "Ethernet148": {
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]"
+        },
         "Ethernet152": {
             "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]"
         },
+        "Ethernet156": {
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]"
+        },
         "Ethernet160": {
             "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]"
         },
+        "Ethernet164": {
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]"
+        },
         "Ethernet168": {
             "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]"
         },
+        "Ethernet172": {
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]"
+        },
         "Ethernet176": {
             "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]"
         },
+        "Ethernet180": {
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]"
+        },
         "Ethernet184": {
             "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]"
         },
+        "Ethernet188": {
+            "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]"
+        },
         "Ethernet192": {
             "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]"
         },

From 1bd734bdfc19165e0e100f150b3a6dd6a68b6edf Mon Sep 17 00:00:00 2001
From: Yakiv Huryk <62013282+Yakiv-Huryk@users.noreply.github.com>
Date: Tue, 7 May 2024 13:42:40 +0300
Subject: [PATCH 0527/1115] [systemd-generator] add support for platform config
 file  (#18730)

In addition to /etc/sonic/generated_services.conf, the generator now processes the platform config in /usr/share/sonic/device/%platform/services.conf

- Why I did it
This is to support platform-specific systemd-sonic-generator config file. It allows loading additional services based on platform (/etc/machine.conf) information on boot.

- How I did it
Added /usr/share/sonic/device/%platform/services.conf processing (if such file exists).
The %platform is already available in systemd-sonic-generator (read from /etc/machine.conf)
The unit test is updated to cover new functionality.

- How to verify it
Run the systemd-sonic-generator unit tests

Signed-off-by: Yakiv Huryk <yhuryk@nvidia.com>
---
 src/systemd-sonic-generator/ssg-test.cc       | 33 +++++++++++--
 .../systemd-sonic-generator.cpp               | 46 +++++++++++++++----
 .../systemd-sonic-generator.h                 |  6 ++-
 3 files changed, 73 insertions(+), 12 deletions(-)

diff --git a/src/systemd-sonic-generator/ssg-test.cc b/src/systemd-sonic-generator/ssg-test.cc
index 2462c0635..99b71b9ba 100644
--- a/src/systemd-sonic-generator/ssg-test.cc
+++ b/src/systemd-sonic-generator/ssg-test.cc
@@ -44,8 +44,9 @@ const std::string TEST_ROOT_DIR = "tests/ssg-test/";
 const std::string TEST_UNIT_FILE_PREFIX = TEST_ROOT_DIR + "systemd/";
 const std::string TEST_LIB_NETWORK = TEST_UNIT_FILE_PREFIX + "network/";
 const std::string TEST_ASIC_CONF_FORMAT = TEST_ROOT_DIR + "%s/asic.conf";
-const std::string TEST_PLATFORM_CONF_FORMAT = TEST_ROOT_DIR + "%s/platform.json";
+const std::string TEST_PLATFORM_FILE_FORMAT = TEST_ROOT_DIR + "%s/platform.json";
 const std::string TEST_MACHINE_CONF = TEST_ROOT_DIR + "machine.conf";
+const std::string TEST_PLATFORM_CONF_FORMAT = TEST_ROOT_DIR + "%s/services.conf";
 
 const std::string TEST_PLATFORM_DIR = TEST_ROOT_DIR + "test_platform/";
 const std::string TEST_ASIC_CONF = TEST_PLATFORM_DIR + "asic.conf";
@@ -58,6 +59,7 @@ const std::string TEST_CONFIG_FILE = TEST_ROOT_DIR + "generated_services.conf";
 
 const std::string TEST_UNIT_FILES = "tests/testfiles/";
 
+const std::string TEST_PLATFORM_CONFIG = TEST_PLATFORM_DIR + "services.conf";
 
 /* Input data for generated_services.conf */
 const std::vector<std::string> generated_services = {
@@ -87,6 +89,7 @@ class SystemdSonicGeneratorFixture : public testing::Test {
         config_file_ = g_config_file;
         machine_config_file_ = g_machine_config_file;
         asic_conf_format_ = g_asic_conf_format;
+        platform_conf_format_ = g_platform_conf_format;
     }
 
     /* Restore global vars */
@@ -95,6 +98,7 @@ class SystemdSonicGeneratorFixture : public testing::Test {
         g_config_file = config_file_;
         g_machine_config_file = machine_config_file_;
         g_asic_conf_format = asic_conf_format_;
+        g_platform_conf_format = platform_conf_format_;
 
         g_ssg_test_mutex.unlock();
     }
@@ -104,6 +108,7 @@ class SystemdSonicGeneratorFixture : public testing::Test {
     const char* config_file_;
     const char* machine_config_file_;
     const char* asic_conf_format_;
+    const char* platform_conf_format_;
 };
 
 /*
@@ -166,6 +171,11 @@ class SsgFunctionTest : public SystemdSonicGeneratorFixture {
         ASSERT_NE(fp, nullptr);
         fputs("onie_platform=test_platform", fp);
         fclose(fp);
+
+        fp = fopen(TEST_PLATFORM_CONFIG.c_str(), "w");
+        ASSERT_NE(fp, nullptr);
+        fputs("platform_specific.service\n", fp);
+        fclose(fp);
         generate_generated_services_conf();
         copyfiles(TEST_UNIT_FILES.c_str(), TEST_UNIT_FILE_PREFIX.c_str());
     }
@@ -360,7 +370,7 @@ class SsgMainTest : public SsgFunctionTest {
         g_config_file = TEST_CONFIG_FILE.c_str();
         g_machine_config_file = TEST_MACHINE_CONF.c_str();
         g_asic_conf_format = TEST_ASIC_CONF_FORMAT.c_str();
-        g_platform_file_format = TEST_PLATFORM_CONF_FORMAT.c_str();
+        g_platform_file_format = TEST_PLATFORM_FILE_FORMAT.c_str();
         std::string lib_systemd = fs::current_path().string() + "/" + TEST_UNIT_FILE_PREFIX;
         g_lib_systemd = lib_systemd.c_str();
         std::string etc_systemd = fs::current_path().string() + "/" + TEST_OUTPUT_DIR;
@@ -573,6 +583,11 @@ TEST_F(SystemdSonicGeneratorFixture, get_global_vars) {
     EXPECT_STREQ(get_asic_conf_format(), ASIC_CONF_FORMAT);
     g_asic_conf_format = TEST_ASIC_CONF_FORMAT.c_str();
     EXPECT_STREQ(get_asic_conf_format(), TEST_ASIC_CONF_FORMAT.c_str());
+
+    EXPECT_EQ(g_platform_conf_format, nullptr);
+    EXPECT_STREQ(get_platform_conf_format(), PLATFORM_CONF_FORMAT);
+    g_platform_conf_format = TEST_PLATFORM_CONF_FORMAT.c_str();
+    EXPECT_STREQ(get_platform_conf_format(), TEST_PLATFORM_CONF_FORMAT.c_str());
 }
 
 TEST_F(SystemdSonicGeneratorFixture, global_vars) {
@@ -592,6 +607,7 @@ TEST_F(SsgFunctionTest, missing_file) {
     EXPECT_TRUE(fs::exists(TEST_UNIT_FILE_PREFIX.c_str()));
     EXPECT_TRUE(fs::exists(TEST_OUTPUT_DIR.c_str()));
     EXPECT_TRUE(fs::exists(TEST_PLATFORM_DIR.c_str()));
+    EXPECT_TRUE(fs::exists(TEST_PLATFORM_CONFIG.c_str()));
 }
 
 /* TEST insert_instance_number() */
@@ -637,7 +653,7 @@ TEST_F(SsgFunctionTest, get_unit_files) {
     g_etc_systemd = TEST_OUTPUT_DIR.c_str();
     g_config_file = TEST_CONFIG_FILE.c_str();
     char* unit_files[NUM_UNIT_FILES] = { NULL };
-    int num_unit_files = get_unit_files(unit_files);
+    int num_unit_files = get_unit_files(g_config_file, unit_files, NUM_UNIT_FILES);
     // Exclude the midplane-network-{npu/dpu}.service which is only used for smart switch
     auto non_smart_switch_generated_services = generated_services;
     non_smart_switch_generated_services.erase(
@@ -666,6 +682,17 @@ TEST_F(SsgFunctionTest, get_unit_files) {
     }
 }
 
+/* TEST get_platform_unit_files()*/
+TEST_F(SsgFunctionTest, get_platform_unit_files) {
+    g_unit_file_prefix = TEST_UNIT_FILE_PREFIX.c_str();
+    g_config_file = TEST_CONFIG_FILE.c_str();
+    g_platform_conf_format = TEST_PLATFORM_CONF_FORMAT.c_str();
+    char* unit_files[NUM_UNIT_FILES];
+    int num_unit_files = get_platform_unit_files(unit_files, NUM_UNIT_FILES);
+    EXPECT_EQ(num_unit_files, 1);
+    EXPECT_EQ(std::string(unit_files[0]), "platform_specific.service");
+}
+
 /* TEST ssg_main() argv error */
 TEST_F(SsgMainTest, ssg_main_argv) {
         std::vector<char*> argv_;
diff --git a/src/systemd-sonic-generator/systemd-sonic-generator.cpp b/src/systemd-sonic-generator/systemd-sonic-generator.cpp
index d1b61a325..0569f4dd6 100644
--- a/src/systemd-sonic-generator/systemd-sonic-generator.cpp
+++ b/src/systemd-sonic-generator/systemd-sonic-generator.cpp
@@ -27,6 +27,7 @@ const char* CONFIG_FILE = "/etc/sonic/generated_services.conf";
 const char* MACHINE_CONF_FILE = "/host/machine.conf";
 const char* ASIC_CONF_FORMAT = "/usr/share/sonic/device/%s/asic.conf";
 const char* PLATFORM_FILE_FORMAT = "/usr/share/sonic/device/%s/platform.json";
+const char* PLATFORM_CONF_FORMAT = "/usr/share/sonic/device/%s/services.conf";
 const char* DPU_PREFIX = "dpu";
 
 
@@ -65,6 +66,13 @@ const char* get_platform_file_format() {
     return (g_platform_file_format) ? g_platform_file_format : PLATFORM_FILE_FORMAT;
 }
 
+const char* g_platform_conf_format = NULL;
+const char* get_platform_conf_format() {
+    return (g_platform_conf_format) ? g_platform_conf_format : PLATFORM_CONF_FORMAT;
+}
+
+const char* get_platform();
+
 static int num_asics;
 static char** multi_instance_services;
 static int num_multi_inst;
@@ -440,16 +448,15 @@ int get_install_targets(std::string unit_file, char* targets[]) {
 }
 
 
-int get_unit_files(char* unit_files[]) {
+int get_unit_files(const char* config_file, char* unit_files[], int unit_files_size) {
     /***
-    Reads a list of unit files to be installed from /etc/sonic/generated_services.conf
+    Reads a list of unit files to be installed from config_file
     ***/
     FILE *fp;
     char *line = NULL;
     size_t len = 0;
     ssize_t read;
     char *pos;
-    const char* config_file = get_config_file();
 
     fp = fopen(config_file, "r");
 
@@ -459,12 +466,14 @@ int get_unit_files(char* unit_files[]) {
     }
 
     int num_unit_files = 0;
-    num_multi_inst = 0;
 
-    multi_instance_services = (char**) calloc(MAX_NUM_UNITS, sizeof(char *));
+    if (!multi_instance_services) {
+        num_multi_inst = 0;
+        multi_instance_services = (char**) calloc(MAX_NUM_UNITS, sizeof(char *));
+    }
 
     while ((read = getline(&line, &len, fp)) != -1) {
-        if (num_unit_files >= MAX_NUM_UNITS) {
+        if (num_unit_files >= unit_files_size) {
             fprintf(stderr, "Maximum number of units exceeded, ignoring extras\n");
             break;
         }
@@ -501,6 +510,23 @@ int get_unit_files(char* unit_files[]) {
     return num_unit_files;
 }
 
+int get_platform_unit_files(char* unit_files[], int unit_files_size)
+{
+    const char* platform = get_platform();
+    if (!platform) {
+        return 0;
+    }
+
+    char config_file[PATH_MAX];
+    snprintf(config_file, PATH_MAX, get_platform_conf_format(), platform);
+
+    if (access(config_file, R_OK) != 0) {
+        return 0;
+    }
+
+    return get_unit_files(config_file, unit_files, unit_files_size);
+}
+
 
 std::string insert_instance_number(const std::string& unit_file, int instance, const std::string& instance_prefix) {
     /***
@@ -957,7 +983,7 @@ static int render_network_service_for_smart_switch() {
     size_t file_size = ftell(fp);
     fseek(fp, 0, SEEK_SET);
     size_t len = file_size + buffer_instruction.length() + 1;
-    char *unit_content = (char*) malloc(len);
+    char *unit_content = (char*) calloc(len, sizeof(unit_content));
     if (unit_content == NULL) {
         fprintf(stderr, "Failed to allocate memory for %s\n", unit_path.c_str());
         fclose(fp);
@@ -1080,7 +1106,9 @@ int ssg_main(int argc, char **argv) {
     num_dpus = get_num_of_dpu();
 
     install_dir = std::string(argv[1]) + "/";
-    num_unit_files = get_unit_files(unit_files);
+    const char* config_file = get_config_file();
+    num_unit_files = get_unit_files(config_file, unit_files, MAX_NUM_UNITS);
+    num_unit_files += get_platform_unit_files(&unit_files[num_unit_files], MAX_NUM_UNITS - num_unit_files);
 
     // Install and render midplane network service for smart switch
     if (smart_switch) {
@@ -1125,6 +1153,8 @@ int ssg_main(int argc, char **argv) {
         free(multi_instance_services[i]);
     }
     free(multi_instance_services);
+    multi_instance_services = NULL;
+    num_multi_inst = 0;
 
     if (is_valid_pointer(platform_info)) {
         json_object_put(platform_info);
diff --git a/src/systemd-sonic-generator/systemd-sonic-generator.h b/src/systemd-sonic-generator/systemd-sonic-generator.h
index 91e2d476c..e3e4d2e03 100644
--- a/src/systemd-sonic-generator/systemd-sonic-generator.h
+++ b/src/systemd-sonic-generator/systemd-sonic-generator.h
@@ -18,6 +18,7 @@ extern const char* CONFIG_FILE;
 extern const char* MACHINE_CONF_FILE;
 extern const char* ASIC_CONF_FORMAT;
 extern const char* PLATFORM_FILE_FORMAT;
+extern const char* PLATFORM_CONF_FORMAT;
 extern const char* g_lib_systemd;
 extern const char* g_etc_systemd;
 extern const char* g_unit_file_prefix; 
@@ -25,17 +26,20 @@ extern const char* g_config_file;
 extern const char* g_machine_config_file;
 extern const char* g_asic_conf_format;
 extern const char* g_platform_file_format;
+extern const char* g_platform_conf_format;
 
 /* C-functions under test */
 extern const char* get_unit_file_prefix();
 extern const char* get_config_file();
 extern const char* get_machine_config_file();
 extern const char* get_asic_conf_format();
+extern const char* get_platform_conf_format();
 extern std::string insert_instance_number(const std::string& unit_file, int instance, const std::string& instance_prefix);
 extern int ssg_main(int argc, char** argv);
 extern int get_num_of_asic();
 extern int get_install_targets(std::string unit_file, char* targets[]);
-extern int get_unit_files(char* unit_files[]);
+extern int get_unit_files(const char* config_file, char* unit_files[], int unit_files_size);
+extern int get_platform_unit_files(char* unit_files[], int unit_files_size);
 // #ifdef __cplusplus
 // }
 // #endif

From 7129232147c791e8649211a0ce730aa08ff0d7c5 Mon Sep 17 00:00:00 2001
From: Yakiv Huryk <62013282+Yakiv-Huryk@users.noreply.github.com>
Date: Tue, 7 May 2024 13:49:34 +0300
Subject: [PATCH 0528/1115] [Mellanox] add rshim package to mellanox image
 (#18684)

- Why I did it
To add rshim (BlueField Rshim Host Driver) package to the mellanox image.

- How I did it
Added rshim.mk to the Mellanox platform.
Disabled rshim.service in sonic_debian_extension.j2

- How to verify it
Build sonic-mellanox.bin

Signed-off-by: Yakiv Huryk <yhuryk@nvidia.com>
---
 .../build_templates/sonic_debian_extension.j2 |  2 +
 platform/mellanox/one-image.mk                |  4 +-
 platform/mellanox/rshim.dep                   |  8 ++++
 platform/mellanox/rshim.mk                    | 36 +++++++++++++++++
 platform/mellanox/rshim/.gitignore            |  5 +++
 platform/mellanox/rshim/Makefile              | 40 +++++++++++++++++++
 platform/mellanox/rules.dep                   |  1 +
 platform/mellanox/rules.mk                    |  1 +
 sonic-slave-bookworm/Dockerfile.j2            |  1 +
 9 files changed, 96 insertions(+), 2 deletions(-)
 create mode 100644 platform/mellanox/rshim.dep
 create mode 100644 platform/mellanox/rshim.mk
 create mode 100644 platform/mellanox/rshim/.gitignore
 create mode 100644 platform/mellanox/rshim/Makefile

diff --git a/files/build_templates/sonic_debian_extension.j2 b/files/build_templates/sonic_debian_extension.j2
index 77ecf9509..07ea75dd7 100644
--- a/files/build_templates/sonic_debian_extension.j2
+++ b/files/build_templates/sonic_debian_extension.j2
@@ -1038,6 +1038,8 @@ sudo LANG=C chroot $FILESYSTEM_ROOT systemctl enable nv-syncd-shared
 
 # Install minicom package
 sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install minicom
+
+sudo LANG=C chroot $FILESYSTEM_ROOT systemctl disable rshim.service
 {% endif %}
 
 {% if sonic_asic_platform == "nvidia-bluefield" %}
diff --git a/platform/mellanox/one-image.mk b/platform/mellanox/one-image.mk
index 9db68f1c5..aeda2e187 100644
--- a/platform/mellanox/one-image.mk
+++ b/platform/mellanox/one-image.mk
@@ -1,5 +1,5 @@
 #
-# Copyright (c) 2017-2023 NVIDIA CORPORATION & AFFILIATES.
+# Copyright (c) 2017-2024 NVIDIA CORPORATION & AFFILIATES.
 # Apache-2.0
 #
 # Licensed under the Apache License, Version 2.0 (the "License");
@@ -19,7 +19,7 @@
 SONIC_ONE_IMAGE = sonic-mellanox.bin
 $(SONIC_ONE_IMAGE)_MACHINE = mellanox
 $(SONIC_ONE_IMAGE)_IMAGE_TYPE = onie
-$(SONIC_ONE_IMAGE)_INSTALLS += $(SX_KERNEL) $(KERNEL_MFT) $(MFT_OEM) $(MFT) $(MFT_FWTRACE_CFG) $(MLNX_HW_MANAGEMENT)
+$(SONIC_ONE_IMAGE)_INSTALLS += $(SX_KERNEL) $(KERNEL_MFT) $(MFT_OEM) $(MFT) $(MFT_FWTRACE_CFG) $(MLNX_HW_MANAGEMENT) $(MLNX_RSHIM)
 $(SONIC_ONE_IMAGE)_INSTALLS += $(SYSTEMD_SONIC_GENERATOR)
 ifeq ($(INSTALL_DEBUG_TOOLS),y)
 $(SONIC_ONE_IMAGE)_DOCKERS += $(SONIC_INSTALL_DOCKER_DBG_IMAGES)
diff --git a/platform/mellanox/rshim.dep b/platform/mellanox/rshim.dep
new file mode 100644
index 000000000..cd493b35f
--- /dev/null
+++ b/platform/mellanox/rshim.dep
@@ -0,0 +1,8 @@
+SPATH := $(MLNX_RSHIM)_SRC_PATH
+DEP_FILES := $(SONIC_COMMON_FILES_LIST) $(PLATFORM_PATH)/rshim.mk $(PLATFORM_PATH)/rshim.dep
+DEP_FILES += $(SONIC_COMMON_BASE_FILES_LIST)
+DEP_FILES += $(shell git ls-files -- $(SPATH))
+
+$(MLNX_RSHIM)_CACHE_MODE := GIT_CONTENT_SHA
+$(MLNX_RSHIM)_DEP_FLAGS := $(SONIC_COMMON_FLAGS_LIST) $(MLNX_RSHIM_DRIVER_VERSION)
+$(MLNX_RSHIM)_DEP_FILES := $(DEP_FILES)
diff --git a/platform/mellanox/rshim.mk b/platform/mellanox/rshim.mk
new file mode 100644
index 000000000..9a375aec8
--- /dev/null
+++ b/platform/mellanox/rshim.mk
@@ -0,0 +1,36 @@
+#
+# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+MLNX_RSHIM_DRIVER_VERSION = 2.0.19
+MLNX_RSHIM_ASSETS_GITHUB_URL = https://github.com/Mellanox/sonic-bluefield-packages
+MLNX_RSHIM_ASSETS_RELEASE_TAG = rshim-$(MLNX_RSHIM_DRIVER_VERSION)-$(BLDENV)-$(CONFIGURED_ARCH)
+MLNX_RSHIM_ASSETS_URL = $(MLNX_RSHIM_ASSETS_GITHUB_URL)/releases/download/$(MLNX_RSHIM_ASSETS_RELEASE_TAG)
+
+MLNX_RSHIM = rshim_${MLNX_RSHIM_DRIVER_VERSION}_${CONFIGURED_ARCH}.deb
+$(MLNX_RSHIM)_SRC_PATH = $(PLATFORM_PATH)/rshim
+$(MLNX_RSHIM)_URL = $(MLNX_RSHIM_ASSETS_URL)/$(MLNX_RSHIM)
+$(MLNX_RSHIM)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON)
+
+MLNX_BSD_RSHIM_SRC_BASE_URL =
+
+export MLNX_RSHIM MLNX_BSD_RSHIM_SRC_BASE_URL MLNX_RSHIM_DRIVER_VERSION
+
+ifneq ($(MLNX_BSD_RSHIM_SRC_BASE_URL), )
+SONIC_MAKE_DEBS += $(MLNX_RSHIM)
+else
+SONIC_ONLINE_DEBS += $(MLNX_RSHIM)
+endif
diff --git a/platform/mellanox/rshim/.gitignore b/platform/mellanox/rshim/.gitignore
new file mode 100644
index 000000000..6dbdff457
--- /dev/null
+++ b/platform/mellanox/rshim/.gitignore
@@ -0,0 +1,5 @@
+# Ignore everything in this directory
+*
+# Except these files
+!.gitignore
+!Makefile
diff --git a/platform/mellanox/rshim/Makefile b/platform/mellanox/rshim/Makefile
new file mode 100644
index 000000000..fee2e6ec7
--- /dev/null
+++ b/platform/mellanox/rshim/Makefile
@@ -0,0 +1,40 @@
+#
+# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+.ONESHELL:
+SHELL = /bin/bash
+.SHELLFLAGS += -ex
+
+SRPMS_URL = $(MLNX_BSD_RSHIM_SRC_BASE_URL)/build/install/distro/SRPMS/
+RSHIM_URL = $(shell lynx --listonly --nonumbers -dump $(SRPMS_URL) | grep rshim)
+
+$(addprefix $(DEST)/, $(MLNX_RSHIM)): $(DEST)/% :
+	rm -rf ./rshim*
+	mkdir ./rshim_src
+
+	wget ${RSHIM_URL}
+	rpm2cpio rshim-${MLNX_RSHIM_DRIVER_VERSION}*.src.rpm | cpio -idmv
+	tar xf rshim-${MLNX_RSHIM_DRIVER_VERSION}.tar.gz -C rshim_src --strip-components=1
+
+	pushd rshim_src
+
+	# Build the package
+	DEB_BUILD_OPTIONS=nocheck dpkg-buildpackage -rfakeroot -us -uc -b -j$(SONIC_CONFIG_MAKE_JOBS) --admindir $(SONIC_DPKG_ADMINDIR)
+
+	popd
+
+	mv $* $(DEST)/
diff --git a/platform/mellanox/rules.dep b/platform/mellanox/rules.dep
index fcf50e54d..725331b0f 100644
--- a/platform/mellanox/rules.dep
+++ b/platform/mellanox/rules.dep
@@ -17,3 +17,4 @@ include $(PLATFORM_PATH)/mlnx-onie-fw-update.dep
 include $(PLATFORM_PATH)/mlnx-ssd-fw-update.dep
 include $(PLATFORM_PATH)/install-pending-fw.dep
 include $(PLATFORM_PATH)/component-versions.dep
+include $(PLATFORM_PATH)/rshim.dep
diff --git a/platform/mellanox/rules.mk b/platform/mellanox/rules.mk
index 69bad6725..f7a10bc82 100644
--- a/platform/mellanox/rules.mk
+++ b/platform/mellanox/rules.mk
@@ -35,6 +35,7 @@ include $(PLATFORM_PATH)/iproute2.mk
 include $(PLATFORM_PATH)/install-pending-fw.mk
 include $(PLATFORM_PATH)/integration-scripts.mk
 include $(PLATFORM_PATH)/component-versions.mk
+include $(PLATFORM_PATH)/rshim.mk
 
 SONIC_ALL += $(SONIC_ONE_IMAGE) \
              $(DOCKER_FPM)
diff --git a/sonic-slave-bookworm/Dockerfile.j2 b/sonic-slave-bookworm/Dockerfile.j2
index 18a64a620..9706510cb 100644
--- a/sonic-slave-bookworm/Dockerfile.j2
+++ b/sonic-slave-bookworm/Dockerfile.j2
@@ -428,6 +428,7 @@ RUN apt-get update && apt-get install -y \
         rpm2cpio \
         libsnmp-dev \
         libpopt-dev \
+        libfuse-dev \
 {%- if CONFIGURED_ARCH == "arm64" %}
         grub-efi-arm64-bin \
 {%- endif %}

From afdc5d02aa1297cf761f35e07a1d889bfdecfb95 Mon Sep 17 00:00:00 2001
From: davidpil2002 <91657985+davidpil2002@users.noreply.github.com>
Date: Tue, 7 May 2024 13:55:58 +0300
Subject: [PATCH 0529/1115] Add LDAP feature support (#16969)

Why I did it
To support LDAP feature

- How I did it
Similar to Radius/Tacacs authentication methods, the SONiC device is the LDAP client.
Installed the Debian LDAP packages related to making SONiC able to function as an LDAP client.

More description in the following HLD: sonic-net/SONiC#1487

- How to verify it
Do LDAP configuration according to the HLD, then connect to the SONiC switch by using a user that exists in your LDAP server.
---
 .../build_templates/sonic_debian_extension.j2 |  17 ++-
 src/sonic-yang-models/setup.py                |   1 +
 .../tests/files/sample_config_db.json         |  16 +++
 .../tests/yang_model_tests/tests/ldap.json    |  16 +++
 .../yang_model_tests/tests_config/ldap.json   |  61 ++++++++++
 .../yang-models/sonic-system-aaa.yang         |   4 +-
 .../yang-models/sonic-system-ldap.yang        | 108 ++++++++++++++++++
 7 files changed, 219 insertions(+), 4 deletions(-)
 create mode 100644 src/sonic-yang-models/tests/yang_model_tests/tests/ldap.json
 create mode 100644 src/sonic-yang-models/tests/yang_model_tests/tests_config/ldap.json
 create mode 100644 src/sonic-yang-models/yang-models/sonic-system-ldap.yang

diff --git a/files/build_templates/sonic_debian_extension.j2 b/files/build_templates/sonic_debian_extension.j2
index 07ea75dd7..2889b2469 100644
--- a/files/build_templates/sonic_debian_extension.j2
+++ b/files/build_templates/sonic_debian_extension.j2
@@ -284,6 +284,19 @@ sudo dpkg --root=$FILESYSTEM_ROOT -i $debs_path/sonic-device-data_*.deb || \
 # package for supporting password hardening
 sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install libpam-pwquality
 
+# Install pam-ldap, nss-ldap, ldap-utils
+sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install      \
+    libnss-ldapd \
+    libpam-ldapd \
+    ldap-utils
+
+# add networking.service dependancy to nslcd
+sudo LANG=C chroot $FILESYSTEM_ROOT sed -i '/# Required-Start:/ s/$/ networking.service/' /etc/init.d/nslcd
+
+# nslcd disable default
+sudo LANG=C chroot $FILESYSTEM_ROOT systemctl stop nslcd.service
+sudo LANG=C chroot $FILESYSTEM_ROOT systemctl mask nslcd.service
+
 # Install pam-tacplus and nss-tacplus
 sudo dpkg --root=$FILESYSTEM_ROOT -i $debs_path/libtac2_*.deb || \
     sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install -f
@@ -297,14 +310,14 @@ sudo dpkg --root=$FILESYSTEM_ROOT -i $debs_path/bash-tacplus_*.deb || \
 # Install audisp-tacplus
 sudo dpkg --root=$FILESYSTEM_ROOT -i $debs_path/audisp-tacplus_*.deb || \
     sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install -f
-# Disable tacplus by default
+# Disable tacplus and LDAP by default
 ## NOTE: this syntax of pam-auth-update is meant to be used when the package gets removed, not for specifying
 ## some local configuration of a PAM module. Currently, there's no clean way of noninteractively specifying
 ## whether some PAM module needs to be enabled or disabled on a system (there are hacky ways, though).
 ##
 ## If there is some PAM module that's installed/removed after this point, then this setting will end up having
 ## no impact, and there may be errors/test failures related to authentication.
-sudo LANG=C chroot $FILESYSTEM_ROOT pam-auth-update --remove tacplus
+sudo LANG=C chroot $FILESYSTEM_ROOT pam-auth-update --remove tacplus ldap
 sudo sed -i -e '/^passwd/s/ tacplus//' $FILESYSTEM_ROOT/etc/nsswitch.conf
 
 # Install pam-radius-auth and nss-radius
diff --git a/src/sonic-yang-models/setup.py b/src/sonic-yang-models/setup.py
index bf0372b8f..b1257f6ea 100644
--- a/src/sonic-yang-models/setup.py
+++ b/src/sonic-yang-models/setup.py
@@ -164,6 +164,7 @@ def run(self):
                          './yang-models/sonic-system-aaa.yang',
                          './yang-models/sonic-system-tacacs.yang',
                          './yang-models/sonic-system-radius.yang',
+                         './yang-models/sonic-system-ldap.yang',
                          './yang-models/sonic-telemetry.yang',
                          './yang-models/sonic-telemetry_client.yang',
                          './yang-models/sonic-gnmi.yang',
diff --git a/src/sonic-yang-models/tests/files/sample_config_db.json b/src/sonic-yang-models/tests/files/sample_config_db.json
index 4cf42f535..33c9c265a 100644
--- a/src/sonic-yang-models/tests/files/sample_config_db.json
+++ b/src/sonic-yang-models/tests/files/sample_config_db.json
@@ -1631,6 +1631,22 @@
                 "timeout": "5"
             }
         },
+        "LDAP": {
+            "global": {
+                "bind_dn": "test_bind",
+                "bind_password": "secret",
+                "bind_timeout": "5",
+                "version": "3",
+                "base_dn": "test_base",
+                "port": "389",
+                "timeout": "5"
+            }
+        },
+        "LDAP_SERVER": {
+            "192.168.1.1": {
+                "priority": "5"
+            }
+        },
         "NAT_BINDINGS": {
             "bind1": {
                 "nat_pool": "pool1",
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/ldap.json b/src/sonic-yang-models/tests/yang_model_tests/tests/ldap.json
new file mode 100644
index 000000000..93a6032bc
--- /dev/null
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests/ldap.json
@@ -0,0 +1,16 @@
+{
+    "LDAP_TABLE": {
+        "desc": "Configure LDAP global fields."
+    },
+    "LDAP_INVALID_TIMEOUT_TEST": {
+        "desc": "LDAP global configuration with invalid timeout value in LDAP table.",
+        "eStr": "LDAP timeout must be 1..60"
+    },
+    "LDAP_SERVER_TEST" : {
+        "desc": "LDAP server configuration in LDAP_SERVER table."
+    },
+    "LDAP_SERVER_INVALID_PRIORITY_TEST": {
+        "desc": "LDAP server configuration with invalid priority value in LDAP_SERVER table.",
+        "eStr": "LDAP server priority must be 1..8"
+    }
+}
\ No newline at end of file
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/ldap.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/ldap.json
new file mode 100644
index 000000000..39ff556cb
--- /dev/null
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/ldap.json
@@ -0,0 +1,61 @@
+{
+    "LDAP_TABLE": {
+        "sonic-system-ldap:sonic-system-ldap": {
+            "sonic-system-ldap:LDAP": {
+                "global":{
+                    "bind_dn": "test_bind",
+                    "bind_password": "secret",
+                    "bind_timeout": "5",
+                    "version": "3",
+                    "base_dn": "test_base",
+                    "port": "389",
+                    "timeout": "5"
+                }
+            }
+        }
+    },
+    "LDAP_INVALID_TIMEOUT_TEST": {
+        "sonic-system-ldap:sonic-system-ldap": {
+            "sonic-system-ldap:LDAP": {
+                "global": {
+                    "bind_dn": "test_bind",
+                    "bind_password": "secret",
+                    "bind_timeout": "5",
+                    "version": "3",
+                    "base_dn": "test_base",
+                    "port": "389",
+                    "timeout": 150
+                }
+            }
+        }
+    },
+    "LDAP_SERVER_TEST": {
+        "sonic-system-ldap:sonic-system-ldap": {
+            "sonic-system-ldap:LDAP_SERVER": {
+                "LDAP_SERVER_LIST": [
+                {
+                        "hostname": "192.168.1.1",
+                        "priority": 1
+                },
+                {
+                        "hostname": "ldap_server_1",
+                        "priority": 2
+                }
+                ]
+            }
+        }
+    },
+
+    "LDAP_SERVER_INVALID_PRIORITY_TEST": {
+        "sonic-system-ldap:sonic-system-ldap": {
+            "sonic-system-ldap:LDAP_SERVER": {
+                "LDAP_SERVER_LIST": [
+                {
+                    "hostname": "192.168.1.1",
+                    "priority": 70
+                }
+                ]
+            }
+        }
+    }
+}
\ No newline at end of file
diff --git a/src/sonic-yang-models/yang-models/sonic-system-aaa.yang b/src/sonic-yang-models/yang-models/sonic-system-aaa.yang
index 1b1a8c493..61fc9ab61 100644
--- a/src/sonic-yang-models/yang-models/sonic-system-aaa.yang
+++ b/src/sonic-yang-models/yang-models/sonic-system-aaa.yang
@@ -35,11 +35,11 @@ module sonic-system-aaa {
 
                 leaf login {
                     type string {
-                        pattern '((tacacs\+|local|radius|default),)*(tacacs\+|local|radius|default)' {
+                        pattern '((ldap|tacacs\+|local|radius|default),)*(ldap|tacacs\+|local|radius|default)' {
                             error-message "Invalid login choice";
                         }
                     }
-                    description "AAA authentication/authorization/accounting methods - radius/tacacs+/local/default";
+                    description "AAA authentication/authorization/accounting methods - radius/tacacs+/ldap|local/default";
                     default "local";
                 }
 
diff --git a/src/sonic-yang-models/yang-models/sonic-system-ldap.yang b/src/sonic-yang-models/yang-models/sonic-system-ldap.yang
new file mode 100644
index 000000000..82fe46240
--- /dev/null
+++ b/src/sonic-yang-models/yang-models/sonic-system-ldap.yang
@@ -0,0 +1,108 @@
+module sonic-system-ldap {
+    yang-version 1.1;
+    namespace "http://github.com/Azure/sonic-system-ldap";
+    prefix ssys-ldap;
+
+    import ietf-inet-types {
+        prefix inet;
+    }
+
+    description "LDAP YANG Module for SONiC OS";
+
+    revision 2023-10-01 {
+        description "First Revision";
+    }
+
+    container sonic-system-ldap {
+
+        container LDAP_SERVER {
+            list LDAP_SERVER_LIST {
+                max-elements 8;
+                key "hostname";
+
+                leaf hostname {
+                    type inet:host;
+                    description
+                        "LDAP server's Domain name or IP address (IPv4 or IPv6)";
+                }
+
+                leaf priority {
+                    default 1;
+                    type uint8 {
+                        range "1..8" {
+                            error-message "LDAP server priority must be 1..8";
+                        }
+                    }
+                    description "Server priority";
+                }
+            }
+        }
+
+        container LDAP {
+
+            container global {
+
+
+                leaf bind_dn {
+                    type string {
+                        length "1..65";
+                    }
+                    description
+                            'LDAP global bind dn';
+                }
+
+                leaf bind_password {
+                    type string {
+                        length "1..65";
+                        pattern "[^ #,]*" {
+                            error-message 'LDAP shared secret (Valid chars are ASCII printable except SPACE, "#", and ",")';
+                        }
+                    }
+                    description "Shared secret used for encrypting the communication";
+                }
+
+                leaf bind_timeout {
+                    default 5;
+                    type uint16 {
+                        range "1..120" {
+                            error-message "Ldap bind timeout must be 1..120";
+                        }
+                    }
+                    description "Ldap bind timeout";
+                }
+
+                leaf version {
+                    default 3;
+                    type uint16 {
+                        range "1..3" {
+                            error-message "Ldap version must be 1..3";
+                        }
+                    }
+                    description "Ldap version";
+                }
+
+                leaf base_dn {
+                    type string {
+                        length "1..65";
+                    }
+                    description "Ldap user base dn";
+                }
+
+                leaf port {
+                    type inet:port-number;
+                    default 389;
+                    description "TCP port to communicate with LDAP server";
+                }
+
+                leaf timeout {
+                    description "Ldap timeout duration in sec";
+                    type uint16 {
+                        range "1..60" {
+                            error-message "LDAP timeout must be 1..60";
+                        }
+                    }
+                }
+            } /* container global */
+        } /* container LDAP  */
+    }/* container sonic-system-ldap */
+}/* end of module sonic-system-ldap */

From 5c6fd3029814ce528c134d46043451e3ece5a3b6 Mon Sep 17 00:00:00 2001
From: Stepan Blyshchak <38952541+stepanblyschak@users.noreply.github.com>
Date: Tue, 7 May 2024 15:03:09 +0300
Subject: [PATCH 0530/1115] [Mellanox] Fix reboot script usage in
 mlnx-onie-fw-update (#18863)

/usr/local/bin/reboot could return execution back to the invoking script in case of using graceful reboot. So, exit the script with reboot return code instead of proceeding with execution.

- Why I did it
Fix BIOS fw update procedure.

- How I did it
Return exit code from reboot script in mlnx-onie-fw-update.sh

- How to verify it
Tested with successful reboot
Tested with unsuccessful reboot

Signed-off-by: Stepan Blyschak <stepanb@nvidia.com>
---
 platform/mellanox/mlnx-onie-fw-update.sh | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/platform/mellanox/mlnx-onie-fw-update.sh b/platform/mellanox/mlnx-onie-fw-update.sh
index 4d441c5ce..35fdb55df 100755
--- a/platform/mellanox/mlnx-onie-fw-update.sh
+++ b/platform/mellanox/mlnx-onie-fw-update.sh
@@ -1,6 +1,6 @@
 #!/bin/bash
 #
-# Copyright (c) 2020-2022 NVIDIA CORPORATION & AFFILIATES.
+# Copyright (c) 2020-2024 NVIDIA CORPORATION & AFFILIATES.
 # Apache-2.0
 #
 # Licensed under the Apache License, Version 2.0 (the "License");
@@ -107,6 +107,7 @@ system_reboot() {
 
     # Use SONiC reboot scenario
     /usr/local/bin/reboot
+    exit $?
 }
 
 terminate_handler() {

From 7822c97e5a93effeb25069b16196cdc65bfd7524 Mon Sep 17 00:00:00 2001
From: Samuel Angebault <staphylo@arista.com>
Date: Tue, 7 May 2024 17:36:21 +0200
Subject: [PATCH 0531/1115] [Arista]: Add new 256x200G profile for
 QuicksilverDd (#18894)

Add new HwSku to support 256x200G breakouts on QuicksilverDD
---
 .../Arista-7060X6-64DE-256x200G/hwsku.json    |  196 ++
 .../port_config.ini                           |  257 +++
 .../Arista-7060X6-64DE-256x200G/sai.profile   |    1 +
 .../th5-a7060x6-64de.config.bcm               | 1913 +++++++++++++++++
 .../x86_64-arista_7060x6_64de/platform.json   |  386 +++-
 5 files changed, 2752 insertions(+), 1 deletion(-)
 create mode 100644 device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-256x200G/hwsku.json
 create mode 100644 device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-256x200G/port_config.ini
 create mode 100644 device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-256x200G/sai.profile
 create mode 100644 device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-256x200G/th5-a7060x6-64de.config.bcm

diff --git a/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-256x200G/hwsku.json b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-256x200G/hwsku.json
new file mode 100644
index 000000000..f30bfc4a0
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-256x200G/hwsku.json
@@ -0,0 +1,196 @@
+{
+    "interfaces": {
+        "Ethernet0": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet8": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet16": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet24": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet32": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet40": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet48": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet56": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet64": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet72": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet80": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet88": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet96": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet104": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet112": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet120": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet128": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet136": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet144": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet152": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet160": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet168": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet176": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet184": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet192": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet200": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet208": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet216": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet224": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet232": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet240": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet248": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet256": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet264": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet272": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet280": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet288": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet296": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet304": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet312": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet320": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet328": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet336": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet344": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet352": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet360": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet368": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet376": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet384": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet392": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet400": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet408": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet416": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet424": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet432": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet440": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet448": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet456": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet464": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet472": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet480": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet488": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet496": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet504": {
+            "default_brkout_mode": "4x200G"
+        }
+    }
+}
diff --git a/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-256x200G/port_config.ini b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-256x200G/port_config.ini
new file mode 100644
index 000000000..323b8e261
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-256x200G/port_config.ini
@@ -0,0 +1,257 @@
+# name       lanes                            alias         index  speed   fec
+Ethernet0    17,18                            Ethernet1/1   1      200000  rs
+Ethernet2    19,20                            Ethernet1/3   1      200000  rs
+Ethernet4    21,22                            Ethernet1/5   1      200000  rs
+Ethernet6    23,24                            Ethernet1/7   1      200000  rs
+Ethernet8    1,2                              Ethernet2/1   2      200000  rs
+Ethernet10   3,4                              Ethernet2/3   2      200000  rs
+Ethernet12   5,6                              Ethernet2/5   2      200000  rs
+Ethernet14   7,8                              Ethernet2/7   2      200000  rs
+Ethernet16   9,10                             Ethernet3/1   3      200000  rs
+Ethernet18   11,12                            Ethernet3/3   3      200000  rs
+Ethernet20   13,14                            Ethernet3/5   3      200000  rs
+Ethernet22   15,16                            Ethernet3/7   3      200000  rs
+Ethernet24   25,26                            Ethernet4/1   4      200000  rs
+Ethernet26   27,28                            Ethernet4/3   4      200000  rs
+Ethernet28   29,30                            Ethernet4/5   4      200000  rs
+Ethernet30   31,32                            Ethernet4/7   4      200000  rs
+Ethernet32   57,58                            Ethernet5/1   5      200000  rs
+Ethernet34   59,60                            Ethernet5/3   5      200000  rs
+Ethernet36   61,62                            Ethernet5/5   5      200000  rs
+Ethernet38   63,64                            Ethernet5/7   5      200000  rs
+Ethernet40   41,42                            Ethernet6/1   6      200000  rs
+Ethernet42   43,44                            Ethernet6/3   6      200000  rs
+Ethernet44   45,46                            Ethernet6/5   6      200000  rs
+Ethernet46   47,48                            Ethernet6/7   6      200000  rs
+Ethernet48   33,34                            Ethernet7/1   7      200000  rs
+Ethernet50   35,36                            Ethernet7/3   7      200000  rs
+Ethernet52   37,38                            Ethernet7/5   7      200000  rs
+Ethernet54   39,40                            Ethernet7/7   7      200000  rs
+Ethernet56   49,50                            Ethernet8/1   8      200000  rs
+Ethernet58   51,52                            Ethernet8/3   8      200000  rs
+Ethernet60   53,54                            Ethernet8/5   8      200000  rs
+Ethernet62   55,56                            Ethernet8/7   8      200000  rs
+Ethernet64   89,90                            Ethernet9/1   9      200000  rs
+Ethernet66   91,92                            Ethernet9/3   9      200000  rs
+Ethernet68   93,94                            Ethernet9/5   9      200000  rs
+Ethernet70   95,96                            Ethernet9/7   9      200000  rs
+Ethernet72   73,74                            Ethernet10/1  10     200000  rs
+Ethernet74   75,76                            Ethernet10/3  10     200000  rs
+Ethernet76   77,78                            Ethernet10/5  10     200000  rs
+Ethernet78   79,80                            Ethernet10/7  10     200000  rs
+Ethernet80   65,66                            Ethernet11/1  11     200000  rs
+Ethernet82   67,68                            Ethernet11/3  11     200000  rs
+Ethernet84   69,70                            Ethernet11/5  11     200000  rs
+Ethernet86   71,72                            Ethernet11/7  11     200000  rs
+Ethernet88   81,82                            Ethernet12/1  12     200000  rs
+Ethernet90   83,84                            Ethernet12/3  12     200000  rs
+Ethernet92   85,86                            Ethernet12/5  12     200000  rs
+Ethernet94   87,88                            Ethernet12/7  12     200000  rs
+Ethernet96   121,122                          Ethernet13/1  13     200000  rs
+Ethernet98   123,124                          Ethernet13/3  13     200000  rs
+Ethernet100  125,126                          Ethernet13/5  13     200000  rs
+Ethernet102  127,128                          Ethernet13/7  13     200000  rs
+Ethernet104  105,106                          Ethernet14/1  14     200000  rs
+Ethernet106  107,108                          Ethernet14/3  14     200000  rs
+Ethernet108  109,110                          Ethernet14/5  14     200000  rs
+Ethernet110  111,112                          Ethernet14/7  14     200000  rs
+Ethernet112  97,98                            Ethernet15/1  15     200000  rs
+Ethernet114  99,100                           Ethernet15/3  15     200000  rs
+Ethernet116  101,102                          Ethernet15/5  15     200000  rs
+Ethernet118  103,104                          Ethernet15/7  15     200000  rs
+Ethernet120  113,114                          Ethernet16/1  16     200000  rs
+Ethernet122  115,116                          Ethernet16/3  16     200000  rs
+Ethernet124  117,118                          Ethernet16/5  16     200000  rs
+Ethernet126  119,120                          Ethernet16/7  16     200000  rs
+Ethernet128  153,154                          Ethernet17/1  17     200000  rs
+Ethernet130  155,156                          Ethernet17/3  17     200000  rs
+Ethernet132  157,158                          Ethernet17/5  17     200000  rs
+Ethernet134  159,160                          Ethernet17/7  17     200000  rs
+Ethernet136  137,138                          Ethernet18/1  18     200000  rs
+Ethernet138  139,140                          Ethernet18/3  18     200000  rs
+Ethernet140  141,142                          Ethernet18/5  18     200000  rs
+Ethernet142  143,144                          Ethernet18/7  18     200000  rs
+Ethernet144  129,130                          Ethernet19/1  19     200000  rs
+Ethernet146  131,132                          Ethernet19/3  19     200000  rs
+Ethernet148  133,134                          Ethernet19/5  19     200000  rs
+Ethernet150  135,136                          Ethernet19/7  19     200000  rs
+Ethernet152  145,146                          Ethernet20/1  20     200000  rs
+Ethernet154  147,148                          Ethernet20/3  20     200000  rs
+Ethernet156  149,150                          Ethernet20/5  20     200000  rs
+Ethernet158  151,152                          Ethernet20/7  20     200000  rs
+Ethernet160  185,186                          Ethernet21/1  21     200000  rs
+Ethernet162  187,188                          Ethernet21/3  21     200000  rs
+Ethernet164  189,190                          Ethernet21/5  21     200000  rs
+Ethernet166  191,192                          Ethernet21/7  21     200000  rs
+Ethernet168  169,170                          Ethernet22/1  22     200000  rs
+Ethernet170  171,172                          Ethernet22/3  22     200000  rs
+Ethernet172  173,174                          Ethernet22/5  22     200000  rs
+Ethernet174  175,176                          Ethernet22/7  22     200000  rs
+Ethernet176  161,162                          Ethernet23/1  23     200000  rs
+Ethernet178  163,164                          Ethernet23/3  23     200000  rs
+Ethernet180  165,166                          Ethernet23/5  23     200000  rs
+Ethernet182  167,168                          Ethernet23/7  23     200000  rs
+Ethernet184  177,178                          Ethernet24/1  24     200000  rs
+Ethernet186  179,180                          Ethernet24/3  24     200000  rs
+Ethernet188  181,182                          Ethernet24/5  24     200000  rs
+Ethernet190  183,184                          Ethernet24/7  24     200000  rs
+Ethernet192  217,218                          Ethernet25/1  25     200000  rs
+Ethernet194  219,220                          Ethernet25/3  25     200000  rs
+Ethernet196  221,222                          Ethernet25/5  25     200000  rs
+Ethernet198  223,224                          Ethernet25/7  25     200000  rs
+Ethernet200  201,202                          Ethernet26/1  26     200000  rs
+Ethernet202  203,204                          Ethernet26/3  26     200000  rs
+Ethernet204  205,206                          Ethernet26/5  26     200000  rs
+Ethernet206  207,208                          Ethernet26/7  26     200000  rs
+Ethernet208  193,194                          Ethernet27/1  27     200000  rs
+Ethernet210  195,196                          Ethernet27/3  27     200000  rs
+Ethernet212  197,198                          Ethernet27/5  27     200000  rs
+Ethernet214  199,200                          Ethernet27/7  27     200000  rs
+Ethernet216  209,210                          Ethernet28/1  28     200000  rs
+Ethernet218  211,212                          Ethernet28/3  28     200000  rs
+Ethernet220  213,214                          Ethernet28/5  28     200000  rs
+Ethernet222  215,216                          Ethernet28/7  28     200000  rs
+Ethernet224  249,250                          Ethernet29/1  29     200000  rs
+Ethernet226  251,252                          Ethernet29/3  29     200000  rs
+Ethernet228  253,254                          Ethernet29/5  29     200000  rs
+Ethernet230  255,256                          Ethernet29/7  29     200000  rs
+Ethernet232  233,234                          Ethernet30/1  30     200000  rs
+Ethernet234  235,236                          Ethernet30/3  30     200000  rs
+Ethernet236  237,238                          Ethernet30/5  30     200000  rs
+Ethernet238  239,240                          Ethernet30/7  30     200000  rs
+Ethernet240  225,226                          Ethernet31/1  31     200000  rs
+Ethernet242  227,228                          Ethernet31/3  31     200000  rs
+Ethernet244  229,230                          Ethernet31/5  31     200000  rs
+Ethernet246  231,232                          Ethernet31/7  31     200000  rs
+Ethernet248  241,242                          Ethernet32/1  32     200000  rs
+Ethernet250  243,244                          Ethernet32/3  32     200000  rs
+Ethernet252  245,246                          Ethernet32/5  32     200000  rs
+Ethernet254  247,248                          Ethernet32/7  32     200000  rs
+Ethernet256  273,274                          Ethernet33/1  33     200000  rs
+Ethernet258  275,276                          Ethernet33/3  33     200000  rs
+Ethernet260  277,278                          Ethernet33/5  33     200000  rs
+Ethernet262  279,280                          Ethernet33/7  33     200000  rs
+Ethernet264  257,258                          Ethernet34/1  34     200000  rs
+Ethernet266  259,260                          Ethernet34/3  34     200000  rs
+Ethernet268  261,262                          Ethernet34/5  34     200000  rs
+Ethernet270  263,264                          Ethernet34/7  34     200000  rs
+Ethernet272  265,266                          Ethernet35/1  35     200000  rs
+Ethernet274  267,268                          Ethernet35/3  35     200000  rs
+Ethernet276  269,270                          Ethernet35/5  35     200000  rs
+Ethernet278  271,272                          Ethernet35/7  35     200000  rs
+Ethernet280  281,282                          Ethernet36/1  36     200000  rs
+Ethernet282  283,284                          Ethernet36/3  36     200000  rs
+Ethernet284  285,286                          Ethernet36/5  36     200000  rs
+Ethernet286  287,288                          Ethernet36/7  36     200000  rs
+Ethernet288  313,314                          Ethernet37/1  37     200000  rs
+Ethernet290  315,316                          Ethernet37/3  37     200000  rs
+Ethernet292  317,318                          Ethernet37/5  37     200000  rs
+Ethernet294  319,320                          Ethernet37/7  37     200000  rs
+Ethernet296  297,298                          Ethernet38/1  38     200000  rs
+Ethernet298  299,300                          Ethernet38/3  38     200000  rs
+Ethernet300  301,302                          Ethernet38/5  38     200000  rs
+Ethernet302  303,304                          Ethernet38/7  38     200000  rs
+Ethernet304  289,290                          Ethernet39/1  39     200000  rs
+Ethernet306  291,292                          Ethernet39/3  39     200000  rs
+Ethernet308  293,294                          Ethernet39/5  39     200000  rs
+Ethernet310  295,296                          Ethernet39/7  39     200000  rs
+Ethernet312  305,306                          Ethernet40/1  40     200000  rs
+Ethernet314  307,308                          Ethernet40/3  40     200000  rs
+Ethernet316  309,310                          Ethernet40/5  40     200000  rs
+Ethernet318  311,312                          Ethernet40/7  40     200000  rs
+Ethernet320  345,346                          Ethernet41/1  41     200000  rs
+Ethernet322  347,348                          Ethernet41/3  41     200000  rs
+Ethernet324  349,350                          Ethernet41/5  41     200000  rs
+Ethernet326  351,352                          Ethernet41/7  41     200000  rs
+Ethernet328  329,330                          Ethernet42/1  42     200000  rs
+Ethernet330  331,332                          Ethernet42/3  42     200000  rs
+Ethernet332  333,334                          Ethernet42/5  42     200000  rs
+Ethernet334  335,336                          Ethernet42/7  42     200000  rs
+Ethernet336  321,322                          Ethernet43/1  43     200000  rs
+Ethernet338  323,324                          Ethernet43/3  43     200000  rs
+Ethernet340  325,326                          Ethernet43/5  43     200000  rs
+Ethernet342  327,328                          Ethernet43/7  43     200000  rs
+Ethernet344  337,338                          Ethernet44/1  44     200000  rs
+Ethernet346  339,340                          Ethernet44/3  44     200000  rs
+Ethernet348  341,342                          Ethernet44/5  44     200000  rs
+Ethernet350  343,344                          Ethernet44/7  44     200000  rs
+Ethernet352  377,378                          Ethernet45/1  45     200000  rs
+Ethernet354  379,380                          Ethernet45/3  45     200000  rs
+Ethernet356  381,382                          Ethernet45/5  45     200000  rs
+Ethernet358  383,384                          Ethernet45/7  45     200000  rs
+Ethernet360  361,362                          Ethernet46/1  46     200000  rs
+Ethernet362  363,364                          Ethernet46/3  46     200000  rs
+Ethernet364  365,366                          Ethernet46/5  46     200000  rs
+Ethernet366  367,368                          Ethernet46/7  46     200000  rs
+Ethernet368  353,354                          Ethernet47/1  47     200000  rs
+Ethernet370  355,356                          Ethernet47/3  47     200000  rs
+Ethernet372  357,358                          Ethernet47/5  47     200000  rs
+Ethernet374  359,360                          Ethernet47/7  47     200000  rs
+Ethernet376  369,370                          Ethernet48/1  48     200000  rs
+Ethernet378  371,372                          Ethernet48/3  48     200000  rs
+Ethernet380  373,374                          Ethernet48/5  48     200000  rs
+Ethernet382  375,376                          Ethernet48/7  48     200000  rs
+Ethernet384  409,410                          Ethernet49/1  49     200000  rs
+Ethernet386  411,412                          Ethernet49/3  49     200000  rs
+Ethernet388  413,414                          Ethernet49/5  49     200000  rs
+Ethernet390  415,416                          Ethernet49/7  49     200000  rs
+Ethernet392  393,394                          Ethernet50/1  50     200000  rs
+Ethernet394  395,396                          Ethernet50/3  50     200000  rs
+Ethernet396  397,398                          Ethernet50/5  50     200000  rs
+Ethernet398  399,400                          Ethernet50/7  50     200000  rs
+Ethernet400  385,386                          Ethernet51/1  51     200000  rs
+Ethernet402  387,388                          Ethernet51/3  51     200000  rs
+Ethernet404  389,390                          Ethernet51/5  51     200000  rs
+Ethernet406  391,392                          Ethernet51/7  51     200000  rs
+Ethernet408  401,402                          Ethernet52/1  52     200000  rs
+Ethernet410  403,404                          Ethernet52/3  52     200000  rs
+Ethernet412  405,406                          Ethernet52/5  52     200000  rs
+Ethernet414  407,408                          Ethernet52/7  52     200000  rs
+Ethernet416  441,442                          Ethernet53/1  53     200000  rs
+Ethernet418  443,444                          Ethernet53/3  53     200000  rs
+Ethernet420  445,446                          Ethernet53/5  53     200000  rs
+Ethernet422  447,448                          Ethernet53/7  53     200000  rs
+Ethernet424  425,426                          Ethernet54/1  54     200000  rs
+Ethernet426  427,428                          Ethernet54/3  54     200000  rs
+Ethernet428  429,430                          Ethernet54/5  54     200000  rs
+Ethernet430  431,432                          Ethernet54/7  54     200000  rs
+Ethernet432  417,418                          Ethernet55/1  55     200000  rs
+Ethernet434  419,420                          Ethernet55/3  55     200000  rs
+Ethernet436  421,422                          Ethernet55/5  55     200000  rs
+Ethernet438  423,424                          Ethernet55/7  55     200000  rs
+Ethernet440  433,434                          Ethernet56/1  56     200000  rs
+Ethernet442  435,436                          Ethernet56/3  56     200000  rs
+Ethernet444  437,438                          Ethernet56/5  56     200000  rs
+Ethernet446  439,440                          Ethernet56/7  56     200000  rs
+Ethernet448  473,474                          Ethernet57/1  57     200000  rs
+Ethernet450  475,476                          Ethernet57/3  57     200000  rs
+Ethernet452  477,478                          Ethernet57/5  57     200000  rs
+Ethernet454  479,480                          Ethernet57/7  57     200000  rs
+Ethernet456  457,458                          Ethernet58/1  58     200000  rs
+Ethernet458  459,460                          Ethernet58/3  58     200000  rs
+Ethernet460  461,462                          Ethernet58/5  58     200000  rs
+Ethernet462  463,464                          Ethernet58/7  58     200000  rs
+Ethernet464  449,450                          Ethernet59/1  59     200000  rs
+Ethernet466  451,452                          Ethernet59/3  59     200000  rs
+Ethernet468  453,454                          Ethernet59/5  59     200000  rs
+Ethernet470  455,456                          Ethernet59/7  59     200000  rs
+Ethernet472  465,466                          Ethernet60/1  60     200000  rs
+Ethernet474  467,468                          Ethernet60/3  60     200000  rs
+Ethernet476  469,470                          Ethernet60/5  60     200000  rs
+Ethernet478  471,472                          Ethernet60/7  60     200000  rs
+Ethernet480  505,506                          Ethernet61/1  61     200000  rs
+Ethernet482  507,508                          Ethernet61/3  61     200000  rs
+Ethernet484  509,510                          Ethernet61/5  61     200000  rs
+Ethernet486  511,512                          Ethernet61/7  61     200000  rs
+Ethernet488  489,490                          Ethernet62/1  62     200000  rs
+Ethernet490  491,492                          Ethernet62/3  62     200000  rs
+Ethernet492  493,494                          Ethernet62/5  62     200000  rs
+Ethernet494  495,496                          Ethernet62/7  62     200000  rs
+Ethernet496  481,482                          Ethernet63/1  63     200000  rs
+Ethernet498  483,484                          Ethernet63/3  63     200000  rs
+Ethernet500  485,486                          Ethernet63/5  63     200000  rs
+Ethernet502  487,488                          Ethernet63/7  63     200000  rs
+Ethernet504  497,498                          Ethernet64/1  64     200000  rs
+Ethernet506  499,500                          Ethernet64/3  64     200000  rs
+Ethernet508  501,502                          Ethernet64/5  64     200000  rs
+Ethernet510  503,504                          Ethernet64/7  64     200000  rs
diff --git a/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-256x200G/sai.profile b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-256x200G/sai.profile
new file mode 100644
index 000000000..89cfbc9f1
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-256x200G/sai.profile
@@ -0,0 +1 @@
+SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th5-a7060x6-64de.config.bcm
diff --git a/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-256x200G/th5-a7060x6-64de.config.bcm b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-256x200G/th5-a7060x6-64de.config.bcm
new file mode 100644
index 000000000..b418d4965
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-256x200G/th5-a7060x6-64de.config.bcm
@@ -0,0 +1,1913 @@
+#
+# $Copyright: (c) 2022 Broadcom.
+# Broadcom Proprietary and Confidential. All rights reserved.$
+#
+# BCM78900 64x800g port configuration.
+#
+# configuration yaml file
+#   device:
+#       <unit>:
+#           <table>:
+#               ?
+#                   <key_fld_1>: <value>
+#                   <key_fld_2>: <value>
+#                   ...
+#                   <key_fld_n>: <value>
+#               :
+#                   <data_fld_1>: <value>
+#                   <data_fld_2>: <value>
+#                   ...
+#                   <data_fld_n>: <value>
+#
+
+---
+bcm_device:
+    0:
+        global:
+            pktio_mode: 1
+            default_cpu_tx_queue: 7
+            vlan_flooding_l2mc_num_reserved: 0
+            ipv6_lpm_128b_enable: 1
+            shared_block_mask_section: uc_bc
+            skip_protocol_default_entries: 1
+            # LTSW uses value 1 for ALPM combined mode
+            l3_alpm_template: 1
+            l3_alpm_hit_skip: 1
+            sai_feat_tail_timestamp : 1
+            sai_port_phy_time_sync_en : 1
+            sai_field_group_auto_prioritize: 1
+            #l3_intf_vlan_split_egress for MTU at L3IF
+            l3_intf_vlan_split_egress : 1
+            pfc_deadlock_seq_control : 1
+            sai_tunnel_support: 2
+            bcm_tunnel_term_compatible_mode: 1
+            l3_ecmp_member_first_lkup_mem_size: 12288
+---
+device:
+    0:
+        PC_PM_CORE:
+            ?
+                PC_PM_ID: 3
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x15047362
+                TX_LANE_MAP: 0x4152637
+                RX_POLARITY_FLIP: 0xc3
+                TX_POLARITY_FLIP: 0xcc
+            ?
+                PC_PM_ID: 1
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x17063524
+                TX_LANE_MAP: 0x60714253
+                RX_POLARITY_FLIP: 0x97
+                TX_POLARITY_FLIP: 0xcc
+            ?
+                PC_PM_ID: 2
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x6172435
+                TX_LANE_MAP: 0x71605342
+                RX_POLARITY_FLIP: 0x33
+                TX_POLARITY_FLIP: 0x69
+            ?
+                PC_PM_ID: 4
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x40516273
+                TX_LANE_MAP: 0x51403726
+                RX_POLARITY_FLIP: 0x33
+                TX_POLARITY_FLIP: 0xc3
+            ?
+                PC_PM_ID: 8
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x71630524
+                TX_LANE_MAP: 0x4371625
+                RX_POLARITY_FLIP: 0x47
+                TX_POLARITY_FLIP: 0xc9
+            ?
+                PC_PM_ID: 6
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x70625143
+                TX_LANE_MAP: 0x60534172
+                RX_POLARITY_FLIP: 0x1e
+                TX_POLARITY_FLIP: 0x2c
+            ?
+                PC_PM_ID: 5
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x17063524
+                TX_LANE_MAP: 0x60715243
+                RX_POLARITY_FLIP: 0x38
+                TX_POLARITY_FLIP: 0x4e
+            ?
+                PC_PM_ID: 7
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x36172405
+                TX_LANE_MAP: 0x73402516
+                RX_POLARITY_FLIP: 0xd2
+                TX_POLARITY_FLIP: 0xc9
+            ?
+                PC_PM_ID: 12
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x71630524
+                TX_LANE_MAP: 0x4371625
+                RX_POLARITY_FLIP: 0x47
+                TX_POLARITY_FLIP: 0xc9
+            ?
+                PC_PM_ID: 10
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x70625143
+                TX_LANE_MAP: 0x60534172
+                RX_POLARITY_FLIP: 0x1e
+                TX_POLARITY_FLIP: 0x6c
+            ?
+                PC_PM_ID: 9
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x62704351
+                TX_LANE_MAP: 0x53607241
+                RX_POLARITY_FLIP: 0xb4
+                TX_POLARITY_FLIP: 0x6c
+            ?
+                PC_PM_ID: 11
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x36172405
+                TX_LANE_MAP: 0x73402516
+                RX_POLARITY_FLIP: 0xd2
+                TX_POLARITY_FLIP: 0xc9
+            ?
+                PC_PM_ID: 16
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x71630524
+                TX_LANE_MAP: 0x4371625
+                RX_POLARITY_FLIP: 0x47
+                TX_POLARITY_FLIP: 0xc9
+            ?
+                PC_PM_ID: 14
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x70625143
+                TX_LANE_MAP: 0x60534172
+                RX_POLARITY_FLIP: 0x1e
+                TX_POLARITY_FLIP: 0x6c
+            ?
+                PC_PM_ID: 13
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x62704351
+                TX_LANE_MAP: 0x53607241
+                RX_POLARITY_FLIP: 0xb4
+                TX_POLARITY_FLIP: 0x6c
+            ?
+                PC_PM_ID: 15
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x36172405
+                TX_LANE_MAP: 0x73402516
+                RX_POLARITY_FLIP: 0xd2
+                TX_POLARITY_FLIP: 0xc9
+            ?
+                PC_PM_ID: 20
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x15347062
+                TX_LANE_MAP: 0x60734152
+                RX_POLARITY_FLIP: 0x3f
+                TX_POLARITY_FLIP: 0x76
+            ?
+                PC_PM_ID: 18
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x17360524
+                TX_LANE_MAP: 0x16270435
+                RX_POLARITY_FLIP: 0x7b
+                TX_POLARITY_FLIP: 0x9b
+            ?
+                PC_PM_ID: 17
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x36172405
+                TX_LANE_MAP: 0x27163504
+                RX_POLARITY_FLIP: 0x21
+                TX_POLARITY_FLIP: 0x91
+            ?
+                PC_PM_ID: 19
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x43516270
+                TX_LANE_MAP: 0x37065241
+                RX_POLARITY_FLIP: 0x30
+                TX_POLARITY_FLIP: 0x16
+            ?
+                PC_PM_ID: 24
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x15347062
+                TX_LANE_MAP: 0x60734152
+                RX_POLARITY_FLIP: 0x3f
+                TX_POLARITY_FLIP: 0x76
+            ?
+                PC_PM_ID: 22
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x17360524
+                TX_LANE_MAP: 0x16270435
+                RX_POLARITY_FLIP: 0x7b
+                TX_POLARITY_FLIP: 0x9b
+            ?
+                PC_PM_ID: 21
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x36172405
+                TX_LANE_MAP: 0x27163504
+                RX_POLARITY_FLIP: 0x21
+                TX_POLARITY_FLIP: 0x91
+            ?
+                PC_PM_ID: 23
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x43516270
+                TX_LANE_MAP: 0x37065241
+                RX_POLARITY_FLIP: 0x30
+                TX_POLARITY_FLIP: 0x16
+            ?
+                PC_PM_ID: 28
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x43612705
+                TX_LANE_MAP: 0x63507241
+                RX_POLARITY_FLIP: 0xfc
+                TX_POLARITY_FLIP: 0x8e
+            ?
+                PC_PM_ID: 26
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x17360524
+                TX_LANE_MAP: 0x16270435
+                RX_POLARITY_FLIP: 0x7b
+                TX_POLARITY_FLIP: 0x9b
+            ?
+                PC_PM_ID: 25
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x36172405
+                TX_LANE_MAP: 0x27163504
+                RX_POLARITY_FLIP: 0x21
+                TX_POLARITY_FLIP: 0x91
+            ?
+                PC_PM_ID: 27
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x43516270
+                TX_LANE_MAP: 0x37065241
+                RX_POLARITY_FLIP: 0x30
+                TX_POLARITY_FLIP: 0x36
+            ?
+                PC_PM_ID: 32
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x73621504
+                TX_LANE_MAP: 0x62734051
+                RX_POLARITY_FLIP: 0xf0
+                TX_POLARITY_FLIP: 0x00
+            ?
+                PC_PM_ID: 30
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x71605342
+                TX_LANE_MAP: 0x6172435
+                RX_POLARITY_FLIP: 0xa5
+                TX_POLARITY_FLIP: 0x00
+            ?
+                PC_PM_ID: 29
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x60714253
+                TX_LANE_MAP: 0x17063524
+                RX_POLARITY_FLIP: 0x21
+                TX_POLARITY_FLIP: 0x69
+            ?
+                PC_PM_ID: 31
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x26370415
+                TX_LANE_MAP: 0x37265140
+                RX_POLARITY_FLIP: 0x30
+                TX_POLARITY_FLIP: 0xc3
+            ?
+                PC_PM_ID: 35
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x15047362
+                TX_LANE_MAP: 0x4152637
+                RX_POLARITY_FLIP: 0xf0
+                TX_POLARITY_FLIP: 0xff
+            ?
+                PC_PM_ID: 33
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x17063524
+                TX_LANE_MAP: 0x60714253
+                RX_POLARITY_FLIP: 0xa5
+                TX_POLARITY_FLIP: 0xff
+            ?
+                PC_PM_ID: 34
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x6172435
+                TX_LANE_MAP: 0x71605342
+                RX_POLARITY_FLIP: 0xed
+                TX_POLARITY_FLIP: 0x69
+            ?
+                PC_PM_ID: 36
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x40516273
+                TX_LANE_MAP: 0x51403726
+                RX_POLARITY_FLIP: 0xfc
+                TX_POLARITY_FLIP: 0xc3
+            ?
+                PC_PM_ID: 40
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x70621534
+                TX_LANE_MAP: 0x14250637
+                RX_POLARITY_FLIP: 0x0c
+                TX_POLARITY_FLIP: 0x64
+            ?
+                PC_PM_ID: 38
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x71635042
+                TX_LANE_MAP: 0x61724053
+                RX_POLARITY_FLIP: 0x48
+                TX_POLARITY_FLIP: 0x9c
+            ?
+                PC_PM_ID: 37
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x6241537
+                TX_LANE_MAP: 0x51624073
+                RX_POLARITY_FLIP: 0x7b
+                TX_POLARITY_FLIP: 0x3a
+            ?
+                PC_PM_ID: 39
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x26073415
+                TX_LANE_MAP: 0x52413706
+                RX_POLARITY_FLIP: 0xfc
+                TX_POLARITY_FLIP: 0x9e
+            ?
+                PC_PM_ID: 44
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x70621534
+                TX_LANE_MAP: 0x14250637
+                RX_POLARITY_FLIP: 0x0c
+                TX_POLARITY_FLIP: 0x64
+            ?
+                PC_PM_ID: 42
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x71635042
+                TX_LANE_MAP: 0x61724053
+                RX_POLARITY_FLIP: 0x48
+                TX_POLARITY_FLIP: 0x98
+            ?
+                PC_PM_ID: 41
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x63714250
+                TX_LANE_MAP: 0x72615340
+                RX_POLARITY_FLIP: 0xed
+                TX_POLARITY_FLIP: 0x9d
+            ?
+                PC_PM_ID: 43
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x26073415
+                TX_LANE_MAP: 0x52413706
+                RX_POLARITY_FLIP: 0xfc
+                TX_POLARITY_FLIP: 0x9e
+            ?
+                PC_PM_ID: 48
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x70621534
+                TX_LANE_MAP: 0x14250637
+                RX_POLARITY_FLIP: 0x0c
+                TX_POLARITY_FLIP: 0x64
+            ?
+                PC_PM_ID: 46
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x71635042
+                TX_LANE_MAP: 0x61724053
+                RX_POLARITY_FLIP: 0x48
+                TX_POLARITY_FLIP: 0x98
+            ?
+                PC_PM_ID: 45
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x63714250
+                TX_LANE_MAP: 0x72615340
+                RX_POLARITY_FLIP: 0xed
+                TX_POLARITY_FLIP: 0x9d
+            ?
+                PC_PM_ID: 47
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x26073415
+                TX_LANE_MAP: 0x52413706
+                RX_POLARITY_FLIP: 0xfc
+                TX_POLARITY_FLIP: 0x9e
+            ?
+                PC_PM_ID: 52
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x5247163
+                TX_LANE_MAP: 0x61524073
+                RX_POLARITY_FLIP: 0x8b
+                TX_POLARITY_FLIP: 0x93
+            ?
+                PC_PM_ID: 50
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x7261534
+                TX_LANE_MAP: 0x6351427
+                RX_POLARITY_FLIP: 0xd2
+                TX_POLARITY_FLIP: 0x63
+            ?
+                PC_PM_ID: 49
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x26073415
+                TX_LANE_MAP: 0x35062714
+                RX_POLARITY_FLIP: 0x87
+                TX_POLARITY_FLIP: 0x63
+            ?
+                PC_PM_ID: 51
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x42506371
+                TX_LANE_MAP: 0x25167340
+                RX_POLARITY_FLIP: 0xe1
+                TX_POLARITY_FLIP: 0x63
+            ?
+                PC_PM_ID: 56
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x5247163
+                TX_LANE_MAP: 0x61524073
+                RX_POLARITY_FLIP: 0x8b
+                TX_POLARITY_FLIP: 0x93
+            ?
+                PC_PM_ID: 54
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x7261534
+                TX_LANE_MAP: 0x6351427
+                RX_POLARITY_FLIP: 0xd2
+                TX_POLARITY_FLIP: 0x63
+            ?
+                PC_PM_ID: 53
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x26073415
+                TX_LANE_MAP: 0x35062714
+                RX_POLARITY_FLIP: 0x87
+                TX_POLARITY_FLIP: 0x63
+            ?
+                PC_PM_ID: 55
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x42506371
+                TX_LANE_MAP: 0x25167340
+                RX_POLARITY_FLIP: 0xe1
+                TX_POLARITY_FLIP: 0x63
+            ?
+                PC_PM_ID: 60
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x62730415
+                TX_LANE_MAP: 0x73624150
+                RX_POLARITY_FLIP: 0x98
+                TX_POLARITY_FLIP: 0x1b
+            ?
+                PC_PM_ID: 58
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x7261534
+                TX_LANE_MAP: 0x6351427
+                RX_POLARITY_FLIP: 0xd2
+                TX_POLARITY_FLIP: 0x63
+            ?
+                PC_PM_ID: 57
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x26073415
+                TX_LANE_MAP: 0x35062714
+                RX_POLARITY_FLIP: 0x87
+                TX_POLARITY_FLIP: 0x63
+            ?
+                PC_PM_ID: 59
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x42506371
+                TX_LANE_MAP: 0x25167340
+                RX_POLARITY_FLIP: 0xe1
+                TX_POLARITY_FLIP: 0x62
+            ?
+                PC_PM_ID: 64
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x73621504
+                TX_LANE_MAP: 0x62734051
+                RX_POLARITY_FLIP: 0xc2
+                TX_POLARITY_FLIP: 0x33
+            ?
+                PC_PM_ID: 62
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x71605342
+                TX_LANE_MAP: 0x6172435
+                RX_POLARITY_FLIP: 0x96
+                TX_POLARITY_FLIP: 0x33
+            ?
+                PC_PM_ID: 61
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x60714253
+                TX_LANE_MAP: 0x17063524
+                RX_POLARITY_FLIP: 0xcc
+                TX_POLARITY_FLIP: 0x69
+            ?
+                PC_PM_ID: 63
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x26370415
+                TX_LANE_MAP: 0x37265140
+                RX_POLARITY_FLIP: 0xcc
+                TX_POLARITY_FLIP: 0xc3
+---
+device:
+    0:
+        PC_PORT_PHYS_MAP:
+            ?
+                PORT_ID: 1
+            :
+                PC_PHYS_PORT_ID: 1
+            ?
+                PORT_ID: 2
+            :
+                PC_PHYS_PORT_ID: 3
+            ?
+                PORT_ID: 3
+            :
+                PC_PHYS_PORT_ID: 5
+            ?
+                PORT_ID: 4
+            :
+                PC_PHYS_PORT_ID: 7
+            ?
+                PORT_ID: 5
+            :
+                PC_PHYS_PORT_ID: 9
+            ?
+                PORT_ID: 6
+            :
+                PC_PHYS_PORT_ID: 11
+            ?
+                PORT_ID: 7
+            :
+                PC_PHYS_PORT_ID: 13
+            ?
+                PORT_ID: 8
+            :
+                PC_PHYS_PORT_ID: 15
+            ?
+                PORT_ID: 11
+            :
+                PC_PHYS_PORT_ID: 17
+            ?
+                PORT_ID: 12
+            :
+                PC_PHYS_PORT_ID: 19
+            ?
+                PORT_ID: 13
+            :
+                PC_PHYS_PORT_ID: 21
+            ?
+                PORT_ID: 14
+            :
+                PC_PHYS_PORT_ID: 23
+            ?
+                PORT_ID: 15
+            :
+                PC_PHYS_PORT_ID: 25
+            ?
+                PORT_ID: 16
+            :
+                PC_PHYS_PORT_ID: 27
+            ?
+                PORT_ID: 17
+            :
+                PC_PHYS_PORT_ID: 29
+            ?
+                PORT_ID: 18
+            :
+                PC_PHYS_PORT_ID: 31
+            ?
+                PORT_ID: 22
+            :
+                PC_PHYS_PORT_ID: 33
+            ?
+                PORT_ID: 23
+            :
+                PC_PHYS_PORT_ID: 35
+            ?
+                PORT_ID: 24
+            :
+                PC_PHYS_PORT_ID: 37
+            ?
+                PORT_ID: 25
+            :
+                PC_PHYS_PORT_ID: 39
+            ?
+                PORT_ID: 26
+            :
+                PC_PHYS_PORT_ID: 41
+            ?
+                PORT_ID: 27
+            :
+                PC_PHYS_PORT_ID: 43
+            ?
+                PORT_ID: 28
+            :
+                PC_PHYS_PORT_ID: 45
+            ?
+                PORT_ID: 29
+            :
+                PC_PHYS_PORT_ID: 47
+            ?
+                PORT_ID: 33
+            :
+                PC_PHYS_PORT_ID: 49
+            ?
+                PORT_ID: 34
+            :
+                PC_PHYS_PORT_ID: 51
+            ?
+                PORT_ID: 35
+            :
+                PC_PHYS_PORT_ID: 53
+            ?
+                PORT_ID: 36
+            :
+                PC_PHYS_PORT_ID: 55
+            ?
+                PORT_ID: 37
+            :
+                PC_PHYS_PORT_ID: 57
+            ?
+                PORT_ID: 38
+            :
+                PC_PHYS_PORT_ID: 59
+            ?
+                PORT_ID: 39
+            :
+                PC_PHYS_PORT_ID: 61
+            ?
+                PORT_ID: 40
+            :
+                PC_PHYS_PORT_ID: 63
+            ?
+                PORT_ID: 44
+            :
+                PC_PHYS_PORT_ID: 65
+            ?
+                PORT_ID: 45
+            :
+                PC_PHYS_PORT_ID: 67
+            ?
+                PORT_ID: 46
+            :
+                PC_PHYS_PORT_ID: 69
+            ?
+                PORT_ID: 47
+            :
+                PC_PHYS_PORT_ID: 71
+            ?
+                PORT_ID: 48
+            :
+                PC_PHYS_PORT_ID: 73
+            ?
+                PORT_ID: 49
+            :
+                PC_PHYS_PORT_ID: 75
+            ?
+                PORT_ID: 50
+            :
+                PC_PHYS_PORT_ID: 77
+            ?
+                PORT_ID: 51
+            :
+                PC_PHYS_PORT_ID: 79
+            ?
+                PORT_ID: 55
+            :
+                PC_PHYS_PORT_ID: 81
+            ?
+                PORT_ID: 56
+            :
+                PC_PHYS_PORT_ID: 83
+            ?
+                PORT_ID: 57
+            :
+                PC_PHYS_PORT_ID: 85
+            ?
+                PORT_ID: 58
+            :
+                PC_PHYS_PORT_ID: 87
+            ?
+                PORT_ID: 59
+            :
+                PC_PHYS_PORT_ID: 89
+            ?
+                PORT_ID: 60
+            :
+                PC_PHYS_PORT_ID: 91
+            ?
+                PORT_ID: 61
+            :
+                PC_PHYS_PORT_ID: 93
+            ?
+                PORT_ID: 62
+            :
+                PC_PHYS_PORT_ID: 95
+            ?
+                PORT_ID: 66
+            :
+                PC_PHYS_PORT_ID: 97
+            ?
+                PORT_ID: 67
+            :
+                PC_PHYS_PORT_ID: 99
+            ?
+                PORT_ID: 68
+            :
+                PC_PHYS_PORT_ID: 101
+            ?
+                PORT_ID: 69
+            :
+                PC_PHYS_PORT_ID: 103
+            ?
+                PORT_ID: 70
+            :
+                PC_PHYS_PORT_ID: 105
+            ?
+                PORT_ID: 71
+            :
+                PC_PHYS_PORT_ID: 107
+            ?
+                PORT_ID: 72
+            :
+                PC_PHYS_PORT_ID: 109
+            ?
+                PORT_ID: 73
+            :
+                PC_PHYS_PORT_ID: 111
+            ?
+                PORT_ID: 77
+            :
+                PC_PHYS_PORT_ID: 113
+            ?
+                PORT_ID: 78
+            :
+                PC_PHYS_PORT_ID: 115
+            ?
+                PORT_ID: 79
+            :
+                PC_PHYS_PORT_ID: 117
+            ?
+                PORT_ID: 80
+            :
+                PC_PHYS_PORT_ID: 119
+            ?
+                PORT_ID: 81
+            :
+                PC_PHYS_PORT_ID: 121
+            ?
+                PORT_ID: 82
+            :
+                PC_PHYS_PORT_ID: 123
+            ?
+                PORT_ID: 83
+            :
+                PC_PHYS_PORT_ID: 125
+            ?
+                PORT_ID: 84
+            :
+                PC_PHYS_PORT_ID: 127
+            ?
+                PORT_ID: 88
+            :
+                PC_PHYS_PORT_ID: 129
+            ?
+                PORT_ID: 89
+            :
+                PC_PHYS_PORT_ID: 131
+            ?
+                PORT_ID: 90
+            :
+                PC_PHYS_PORT_ID: 133
+            ?
+                PORT_ID: 91
+            :
+                PC_PHYS_PORT_ID: 135
+            ?
+                PORT_ID: 92
+            :
+                PC_PHYS_PORT_ID: 137
+            ?
+                PORT_ID: 93
+            :
+                PC_PHYS_PORT_ID: 139
+            ?
+                PORT_ID: 94
+            :
+                PC_PHYS_PORT_ID: 141
+            ?
+                PORT_ID: 95
+            :
+                PC_PHYS_PORT_ID: 143
+            ?
+                PORT_ID: 99
+            :
+                PC_PHYS_PORT_ID: 145
+            ?
+                PORT_ID: 100
+            :
+                PC_PHYS_PORT_ID: 147
+            ?
+                PORT_ID: 101
+            :
+                PC_PHYS_PORT_ID: 149
+            ?
+                PORT_ID: 102
+            :
+                PC_PHYS_PORT_ID: 151
+            ?
+                PORT_ID: 103
+            :
+                PC_PHYS_PORT_ID: 153
+            ?
+                PORT_ID: 104
+            :
+                PC_PHYS_PORT_ID: 155
+            ?
+                PORT_ID: 105
+            :
+                PC_PHYS_PORT_ID: 157
+            ?
+                PORT_ID: 106
+            :
+                PC_PHYS_PORT_ID: 159
+            ?
+                PORT_ID: 110
+            :
+                PC_PHYS_PORT_ID: 161
+            ?
+                PORT_ID: 111
+            :
+                PC_PHYS_PORT_ID: 163
+            ?
+                PORT_ID: 112
+            :
+                PC_PHYS_PORT_ID: 165
+            ?
+                PORT_ID: 113
+            :
+                PC_PHYS_PORT_ID: 167
+            ?
+                PORT_ID: 114
+            :
+                PC_PHYS_PORT_ID: 169
+            ?
+                PORT_ID: 115
+            :
+                PC_PHYS_PORT_ID: 171
+            ?
+                PORT_ID: 116
+            :
+                PC_PHYS_PORT_ID: 173
+            ?
+                PORT_ID: 117
+            :
+                PC_PHYS_PORT_ID: 175
+            ?
+                PORT_ID: 121
+            :
+                PC_PHYS_PORT_ID: 177
+            ?
+                PORT_ID: 122
+            :
+                PC_PHYS_PORT_ID: 179
+            ?
+                PORT_ID: 123
+            :
+                PC_PHYS_PORT_ID: 181
+            ?
+                PORT_ID: 124
+            :
+                PC_PHYS_PORT_ID: 183
+            ?
+                PORT_ID: 125
+            :
+                PC_PHYS_PORT_ID: 185
+            ?
+                PORT_ID: 126
+            :
+                PC_PHYS_PORT_ID: 187
+            ?
+                PORT_ID: 127
+            :
+                PC_PHYS_PORT_ID: 189
+            ?
+                PORT_ID: 128
+            :
+                PC_PHYS_PORT_ID: 191
+            ?
+                PORT_ID: 132
+            :
+                PC_PHYS_PORT_ID: 193
+            ?
+                PORT_ID: 133
+            :
+                PC_PHYS_PORT_ID: 195
+            ?
+                PORT_ID: 134
+            :
+                PC_PHYS_PORT_ID: 197
+            ?
+                PORT_ID: 135
+            :
+                PC_PHYS_PORT_ID: 199
+            ?
+                PORT_ID: 136
+            :
+                PC_PHYS_PORT_ID: 201
+            ?
+                PORT_ID: 137
+            :
+                PC_PHYS_PORT_ID: 203
+            ?
+                PORT_ID: 138
+            :
+                PC_PHYS_PORT_ID: 205
+            ?
+                PORT_ID: 139
+            :
+                PC_PHYS_PORT_ID: 207
+            ?
+                PORT_ID: 143
+            :
+                PC_PHYS_PORT_ID: 209
+            ?
+                PORT_ID: 144
+            :
+                PC_PHYS_PORT_ID: 211
+            ?
+                PORT_ID: 145
+            :
+                PC_PHYS_PORT_ID: 213
+            ?
+                PORT_ID: 146
+            :
+                PC_PHYS_PORT_ID: 215
+            ?
+                PORT_ID: 147
+            :
+                PC_PHYS_PORT_ID: 217
+            ?
+                PORT_ID: 148
+            :
+                PC_PHYS_PORT_ID: 219
+            ?
+                PORT_ID: 149
+            :
+                PC_PHYS_PORT_ID: 221
+            ?
+                PORT_ID: 150
+            :
+                PC_PHYS_PORT_ID: 223
+            ?
+                PORT_ID: 154
+            :
+                PC_PHYS_PORT_ID: 225
+            ?
+                PORT_ID: 155
+            :
+                PC_PHYS_PORT_ID: 227
+            ?
+                PORT_ID: 156
+            :
+                PC_PHYS_PORT_ID: 229
+            ?
+                PORT_ID: 157
+            :
+                PC_PHYS_PORT_ID: 231
+            ?
+                PORT_ID: 158
+            :
+                PC_PHYS_PORT_ID: 233
+            ?
+                PORT_ID: 159
+            :
+                PC_PHYS_PORT_ID: 235
+            ?
+                PORT_ID: 160
+            :
+                PC_PHYS_PORT_ID: 237
+            ?
+                PORT_ID: 161
+            :
+                PC_PHYS_PORT_ID: 239
+            ?
+                PORT_ID: 165
+            :
+                PC_PHYS_PORT_ID: 241
+            ?
+                PORT_ID: 166
+            :
+                PC_PHYS_PORT_ID: 243
+            ?
+                PORT_ID: 167
+            :
+                PC_PHYS_PORT_ID: 245
+            ?
+                PORT_ID: 168
+            :
+                PC_PHYS_PORT_ID: 247
+            ?
+                PORT_ID: 169
+            :
+                PC_PHYS_PORT_ID: 249
+            ?
+                PORT_ID: 170
+            :
+                PC_PHYS_PORT_ID: 251
+            ?
+                PORT_ID: 171
+            :
+                PC_PHYS_PORT_ID: 253
+            ?
+                PORT_ID: 172
+            :
+                PC_PHYS_PORT_ID: 255
+            ?
+                PORT_ID: 176
+            :
+                PC_PHYS_PORT_ID: 257
+            ?
+                PORT_ID: 177
+            :
+                PC_PHYS_PORT_ID: 259
+            ?
+                PORT_ID: 178
+            :
+                PC_PHYS_PORT_ID: 261
+            ?
+                PORT_ID: 179
+            :
+                PC_PHYS_PORT_ID: 263
+            ?
+                PORT_ID: 180
+            :
+                PC_PHYS_PORT_ID: 265
+            ?
+                PORT_ID: 181
+            :
+                PC_PHYS_PORT_ID: 267
+            ?
+                PORT_ID: 182
+            :
+                PC_PHYS_PORT_ID: 269
+            ?
+                PORT_ID: 183
+            :
+                PC_PHYS_PORT_ID: 271
+            ?
+                PORT_ID: 187
+            :
+                PC_PHYS_PORT_ID: 273
+            ?
+                PORT_ID: 188
+            :
+                PC_PHYS_PORT_ID: 275
+            ?
+                PORT_ID: 189
+            :
+                PC_PHYS_PORT_ID: 277
+            ?
+                PORT_ID: 190
+            :
+                PC_PHYS_PORT_ID: 279
+            ?
+                PORT_ID: 191
+            :
+                PC_PHYS_PORT_ID: 281
+            ?
+                PORT_ID: 192
+            :
+                PC_PHYS_PORT_ID: 283
+            ?
+                PORT_ID: 193
+            :
+                PC_PHYS_PORT_ID: 285
+            ?
+                PORT_ID: 194
+            :
+                PC_PHYS_PORT_ID: 287
+            ?
+                PORT_ID: 198
+            :
+                PC_PHYS_PORT_ID: 289
+            ?
+                PORT_ID: 199
+            :
+                PC_PHYS_PORT_ID: 291
+            ?
+                PORT_ID: 200
+            :
+                PC_PHYS_PORT_ID: 293
+            ?
+                PORT_ID: 201
+            :
+                PC_PHYS_PORT_ID: 295
+            ?
+                PORT_ID: 202
+            :
+                PC_PHYS_PORT_ID: 297
+            ?
+                PORT_ID: 203
+            :
+                PC_PHYS_PORT_ID: 299
+            ?
+                PORT_ID: 204
+            :
+                PC_PHYS_PORT_ID: 301
+            ?
+                PORT_ID: 205
+            :
+                PC_PHYS_PORT_ID: 303
+            ?
+                PORT_ID: 209
+            :
+                PC_PHYS_PORT_ID: 305
+            ?
+                PORT_ID: 210
+            :
+                PC_PHYS_PORT_ID: 307
+            ?
+                PORT_ID: 211
+            :
+                PC_PHYS_PORT_ID: 309
+            ?
+                PORT_ID: 212
+            :
+                PC_PHYS_PORT_ID: 311
+            ?
+                PORT_ID: 213
+            :
+                PC_PHYS_PORT_ID: 313
+            ?
+                PORT_ID: 214
+            :
+                PC_PHYS_PORT_ID: 315
+            ?
+                PORT_ID: 215
+            :
+                PC_PHYS_PORT_ID: 317
+            ?
+                PORT_ID: 216
+            :
+                PC_PHYS_PORT_ID: 319
+            ?
+                PORT_ID: 220
+            :
+                PC_PHYS_PORT_ID: 321
+            ?
+                PORT_ID: 221
+            :
+                PC_PHYS_PORT_ID: 323
+            ?
+                PORT_ID: 222
+            :
+                PC_PHYS_PORT_ID: 325
+            ?
+                PORT_ID: 223
+            :
+                PC_PHYS_PORT_ID: 327
+            ?
+                PORT_ID: 224
+            :
+                PC_PHYS_PORT_ID: 329
+            ?
+                PORT_ID: 225
+            :
+                PC_PHYS_PORT_ID: 331
+            ?
+                PORT_ID: 226
+            :
+                PC_PHYS_PORT_ID: 333
+            ?
+                PORT_ID: 227
+            :
+                PC_PHYS_PORT_ID: 335
+            ?
+                PORT_ID: 231
+            :
+                PC_PHYS_PORT_ID: 337
+            ?
+                PORT_ID: 232
+            :
+                PC_PHYS_PORT_ID: 339
+            ?
+                PORT_ID: 233
+            :
+                PC_PHYS_PORT_ID: 341
+            ?
+                PORT_ID: 234
+            :
+                PC_PHYS_PORT_ID: 343
+            ?
+                PORT_ID: 235
+            :
+                PC_PHYS_PORT_ID: 345
+            ?
+                PORT_ID: 236
+            :
+                PC_PHYS_PORT_ID: 347
+            ?
+                PORT_ID: 237
+            :
+                PC_PHYS_PORT_ID: 349
+            ?
+                PORT_ID: 238
+            :
+                PC_PHYS_PORT_ID: 351
+            ?
+                PORT_ID: 242
+            :
+                PC_PHYS_PORT_ID: 353
+            ?
+                PORT_ID: 243
+            :
+                PC_PHYS_PORT_ID: 355
+            ?
+                PORT_ID: 244
+            :
+                PC_PHYS_PORT_ID: 357
+            ?
+                PORT_ID: 245
+            :
+                PC_PHYS_PORT_ID: 359
+            ?
+                PORT_ID: 246
+            :
+                PC_PHYS_PORT_ID: 361
+            ?
+                PORT_ID: 247
+            :
+                PC_PHYS_PORT_ID: 363
+            ?
+                PORT_ID: 248
+            :
+                PC_PHYS_PORT_ID: 365
+            ?
+                PORT_ID: 249
+            :
+                PC_PHYS_PORT_ID: 367
+            ?
+                PORT_ID: 253
+            :
+                PC_PHYS_PORT_ID: 369
+            ?
+                PORT_ID: 254
+            :
+                PC_PHYS_PORT_ID: 371
+            ?
+                PORT_ID: 255
+            :
+                PC_PHYS_PORT_ID: 373
+            ?
+                PORT_ID: 256
+            :
+                PC_PHYS_PORT_ID: 375
+            ?
+                PORT_ID: 257
+            :
+                PC_PHYS_PORT_ID: 377
+            ?
+                PORT_ID: 258
+            :
+                PC_PHYS_PORT_ID: 379
+            ?
+                PORT_ID: 259
+            :
+                PC_PHYS_PORT_ID: 381
+            ?
+                PORT_ID: 260
+            :
+                PC_PHYS_PORT_ID: 383
+            ?
+                PORT_ID: 264
+            :
+                PC_PHYS_PORT_ID: 385
+            ?
+                PORT_ID: 265
+            :
+                PC_PHYS_PORT_ID: 387
+            ?
+                PORT_ID: 266
+            :
+                PC_PHYS_PORT_ID: 389
+            ?
+                PORT_ID: 267
+            :
+                PC_PHYS_PORT_ID: 391
+            ?
+                PORT_ID: 268
+            :
+                PC_PHYS_PORT_ID: 393
+            ?
+                PORT_ID: 269
+            :
+                PC_PHYS_PORT_ID: 395
+            ?
+                PORT_ID: 270
+            :
+                PC_PHYS_PORT_ID: 397
+            ?
+                PORT_ID: 271
+            :
+                PC_PHYS_PORT_ID: 399
+            ?
+                PORT_ID: 275
+            :
+                PC_PHYS_PORT_ID: 401
+            ?
+                PORT_ID: 276
+            :
+                PC_PHYS_PORT_ID: 403
+            ?
+                PORT_ID: 277
+            :
+                PC_PHYS_PORT_ID: 405
+            ?
+                PORT_ID: 278
+            :
+                PC_PHYS_PORT_ID: 407
+            ?
+                PORT_ID: 279
+            :
+                PC_PHYS_PORT_ID: 409
+            ?
+                PORT_ID: 280
+            :
+                PC_PHYS_PORT_ID: 411
+            ?
+                PORT_ID: 281
+            :
+                PC_PHYS_PORT_ID: 413
+            ?
+                PORT_ID: 282
+            :
+                PC_PHYS_PORT_ID: 415
+            ?
+                PORT_ID: 286
+            :
+                PC_PHYS_PORT_ID: 417
+            ?
+                PORT_ID: 287
+            :
+                PC_PHYS_PORT_ID: 419
+            ?
+                PORT_ID: 288
+            :
+                PC_PHYS_PORT_ID: 421
+            ?
+                PORT_ID: 289
+            :
+                PC_PHYS_PORT_ID: 423
+            ?
+                PORT_ID: 290
+            :
+                PC_PHYS_PORT_ID: 425
+            ?
+                PORT_ID: 291
+            :
+                PC_PHYS_PORT_ID: 427
+            ?
+                PORT_ID: 292
+            :
+                PC_PHYS_PORT_ID: 429
+            ?
+                PORT_ID: 293
+            :
+                PC_PHYS_PORT_ID: 431
+            ?
+                PORT_ID: 297
+            :
+                PC_PHYS_PORT_ID: 433
+            ?
+                PORT_ID: 298
+            :
+                PC_PHYS_PORT_ID: 435
+            ?
+                PORT_ID: 299
+            :
+                PC_PHYS_PORT_ID: 437
+            ?
+                PORT_ID: 300
+            :
+                PC_PHYS_PORT_ID: 439
+            ?
+                PORT_ID: 301
+            :
+                PC_PHYS_PORT_ID: 441
+            ?
+                PORT_ID: 302
+            :
+                PC_PHYS_PORT_ID: 443
+            ?
+                PORT_ID: 303
+            :
+                PC_PHYS_PORT_ID: 445
+            ?
+                PORT_ID: 304
+            :
+                PC_PHYS_PORT_ID: 447
+            ?
+                PORT_ID: 308
+            :
+                PC_PHYS_PORT_ID: 449
+            ?
+                PORT_ID: 309
+            :
+                PC_PHYS_PORT_ID: 451
+            ?
+                PORT_ID: 310
+            :
+                PC_PHYS_PORT_ID: 453
+            ?
+                PORT_ID: 311
+            :
+                PC_PHYS_PORT_ID: 455
+            ?
+                PORT_ID: 312
+            :
+                PC_PHYS_PORT_ID: 457
+            ?
+                PORT_ID: 313
+            :
+                PC_PHYS_PORT_ID: 459
+            ?
+                PORT_ID: 314
+            :
+                PC_PHYS_PORT_ID: 461
+            ?
+                PORT_ID: 315
+            :
+                PC_PHYS_PORT_ID: 463
+            ?
+                PORT_ID: 319
+            :
+                PC_PHYS_PORT_ID: 465
+            ?
+                PORT_ID: 320
+            :
+                PC_PHYS_PORT_ID: 467
+            ?
+                PORT_ID: 321
+            :
+                PC_PHYS_PORT_ID: 469
+            ?
+                PORT_ID: 322
+            :
+                PC_PHYS_PORT_ID: 471
+            ?
+                PORT_ID: 323
+            :
+                PC_PHYS_PORT_ID: 473
+            ?
+                PORT_ID: 324
+            :
+                PC_PHYS_PORT_ID: 475
+            ?
+                PORT_ID: 325
+            :
+                PC_PHYS_PORT_ID: 477
+            ?
+                PORT_ID: 326
+            :
+                PC_PHYS_PORT_ID: 479
+            ?
+                PORT_ID: 330
+            :
+                PC_PHYS_PORT_ID: 481
+            ?
+                PORT_ID: 331
+            :
+                PC_PHYS_PORT_ID: 483
+            ?
+                PORT_ID: 332
+            :
+                PC_PHYS_PORT_ID: 485
+            ?
+                PORT_ID: 333
+            :
+                PC_PHYS_PORT_ID: 487
+            ?
+                PORT_ID: 334
+            :
+                PC_PHYS_PORT_ID: 489
+            ?
+                PORT_ID: 335
+            :
+                PC_PHYS_PORT_ID: 491
+            ?
+                PORT_ID: 336
+            :
+                PC_PHYS_PORT_ID: 493
+            ?
+                PORT_ID: 337
+            :
+                PC_PHYS_PORT_ID: 495
+            ?
+                PORT_ID: 341
+            :
+                PC_PHYS_PORT_ID: 497
+            ?
+                PORT_ID: 342
+            :
+                PC_PHYS_PORT_ID: 499
+            ?
+                PORT_ID: 343
+            :
+                PC_PHYS_PORT_ID: 501
+            ?
+                PORT_ID: 344
+            :
+                PC_PHYS_PORT_ID: 503
+            ?
+                PORT_ID: 345
+            :
+                PC_PHYS_PORT_ID: 505
+            ?
+                PORT_ID: 346
+            :
+                PC_PHYS_PORT_ID: 507
+            ?
+                PORT_ID: 347
+            :
+                PC_PHYS_PORT_ID: 509
+            ?
+                PORT_ID: 348
+            :
+                PC_PHYS_PORT_ID: 511
+...
+---
+device:
+    0:
+        PC_PORT:
+            ?
+                PORT_ID: [[1, 8],
+                          [11, 18],
+                          [22, 29],
+                          [33, 40],
+                          [44, 51],
+                          [55, 62],
+                          [66, 73],
+                          [77, 84],
+                          [88, 95],
+                          [99, 106],
+                          [110, 117],
+                          [121, 128],
+                          [132, 139],
+                          [143, 150],
+                          [154, 161],
+                          [165, 172],
+                          [176, 183],
+                          [187, 194],
+                          [198, 205],
+                          [209, 216],
+                          [220, 227],
+                          [231, 238],
+                          [242, 249],
+                          [253, 260],
+                          [264, 271],
+                          [275, 282],
+                          [286, 293],
+                          [297, 304],
+                          [308, 315],
+                          [319, 326],
+                          [330, 337],
+                          [341, 348]]
+            :
+                ENABLE: 0
+                SPEED: 200000
+                NUM_LANES: 2
+                FEC_MODE: PC_FEC_RS544_2XN
+                MAX_FRAME_SIZE: 9416
+...
+---
+bcm_device:
+    0:
+        global:
+            ftem_mem_entries: 65536
+...
+---
+device:
+    0:
+        # Per pipe flex counter configuration
+        CTR_EFLEX_CONFIG:
+            CTR_ING_EFLEX_OPERMODE_PIPEUNIQUE: 0
+            CTR_EGR_EFLEX_OPERMODE_PIPEUNIQUE: 0
+
+        # IFP mode
+        FP_CONFIG:
+            FP_ING_OPERMODE: GLOBAL_PIPE_AWARE
+...
+---
+device:
+    0:
+        DEVICE_CONFIG:
+            AUTOLOAD_BOARD_SETTINGS: 0
+...
diff --git a/device/arista/x86_64-arista_7060x6_64de/platform.json b/device/arista/x86_64-arista_7060x6_64de/platform.json
index 9f58b40e4..6af55dd4f 100644
--- a/device/arista/x86_64-arista_7060x6_64de/platform.json
+++ b/device/arista/x86_64-arista_7060x6_64de/platform.json
@@ -325,6 +325,12 @@
                 "2x400G": [
                     "Ethernet1/1",
                     "Ethernet1/5"
+                ],
+                "4x200G": [
+                    "Ethernet1/1",
+                    "Ethernet1/3",
+                    "Ethernet1/5",
+                    "Ethernet1/7"
                 ]
             }
         },
@@ -341,6 +347,12 @@
                 "2x400G": [
                     "Ethernet2/1",
                     "Ethernet2/5"
+                ],
+                "4x200G": [
+                    "Ethernet2/1",
+                    "Ethernet2/3",
+                    "Ethernet2/5",
+                    "Ethernet2/7"
                 ]
             }
         },
@@ -357,6 +369,12 @@
                 "2x400G": [
                     "Ethernet3/1",
                     "Ethernet3/5"
+                ],
+                "4x200G": [
+                    "Ethernet3/1",
+                    "Ethernet3/3",
+                    "Ethernet3/5",
+                    "Ethernet3/7"
                 ]
             }
         },
@@ -373,6 +391,12 @@
                 "2x400G": [
                     "Ethernet4/1",
                     "Ethernet4/5"
+                ],
+                "4x200G": [
+                    "Ethernet4/1",
+                    "Ethernet4/3",
+                    "Ethernet4/5",
+                    "Ethernet4/7"
                 ]
             }
         },
@@ -389,6 +413,12 @@
                 "2x400G": [
                     "Ethernet5/1",
                     "Ethernet5/5"
+                ],
+                "4x200G": [
+                    "Ethernet5/1",
+                    "Ethernet5/3",
+                    "Ethernet5/5",
+                    "Ethernet5/7"
                 ]
             }
         },
@@ -405,6 +435,12 @@
                 "2x400G": [
                     "Ethernet6/1",
                     "Ethernet6/5"
+                ],
+                "4x200G": [
+                    "Ethernet6/1",
+                    "Ethernet6/3",
+                    "Ethernet6/5",
+                    "Ethernet6/7"
                 ]
             }
         },
@@ -421,6 +457,12 @@
                 "2x400G": [
                     "Ethernet7/1",
                     "Ethernet7/5"
+                ],
+                "4x200G": [
+                    "Ethernet7/1",
+                    "Ethernet7/3",
+                    "Ethernet7/5",
+                    "Ethernet7/7"
                 ]
             }
         },
@@ -437,6 +479,12 @@
                 "2x400G": [
                     "Ethernet8/1",
                     "Ethernet8/5"
+                ],
+                "4x200G": [
+                    "Ethernet8/1",
+                    "Ethernet8/3",
+                    "Ethernet8/5",
+                    "Ethernet8/7"
                 ]
             }
         },
@@ -453,6 +501,12 @@
                 "2x400G": [
                     "Ethernet9/1",
                     "Ethernet9/5"
+                ],
+                "4x200G": [
+                    "Ethernet9/1",
+                    "Ethernet9/3",
+                    "Ethernet9/5",
+                    "Ethernet9/7"
                 ]
             }
         },
@@ -469,6 +523,12 @@
                 "2x400G": [
                     "Ethernet10/1",
                     "Ethernet10/5"
+                ],
+                "4x200G": [
+                    "Ethernet10/1",
+                    "Ethernet10/3",
+                    "Ethernet10/5",
+                    "Ethernet10/7"
                 ]
             }
         },
@@ -485,6 +545,12 @@
                 "2x400G": [
                     "Ethernet11/1",
                     "Ethernet11/5"
+                ],
+                "4x200G": [
+                    "Ethernet11/1",
+                    "Ethernet11/3",
+                    "Ethernet11/5",
+                    "Ethernet11/7"
                 ]
             }
         },
@@ -501,6 +567,12 @@
                 "2x400G": [
                     "Ethernet12/1",
                     "Ethernet12/5"
+                ],
+                "4x200G": [
+                    "Ethernet12/1",
+                    "Ethernet12/3",
+                    "Ethernet12/5",
+                    "Ethernet12/7"
                 ]
             }
         },
@@ -517,6 +589,12 @@
                 "2x400G": [
                     "Ethernet13/1",
                     "Ethernet13/5"
+                ],
+                "4x200G": [
+                    "Ethernet13/1",
+                    "Ethernet13/3",
+                    "Ethernet13/5",
+                    "Ethernet13/7"
                 ]
             }
         },
@@ -533,6 +611,12 @@
                 "2x400G": [
                     "Ethernet14/1",
                     "Ethernet14/5"
+                ],
+                "4x200G": [
+                    "Ethernet14/1",
+                    "Ethernet14/3",
+                    "Ethernet14/5",
+                    "Ethernet14/7"
                 ]
             }
         },
@@ -549,6 +633,12 @@
                 "2x400G": [
                     "Ethernet15/1",
                     "Ethernet15/5"
+                ],
+                "4x200G": [
+                    "Ethernet15/1",
+                    "Ethernet15/3",
+                    "Ethernet15/5",
+                    "Ethernet15/7"
                 ]
             }
         },
@@ -565,6 +655,12 @@
                 "2x400G": [
                     "Ethernet16/1",
                     "Ethernet16/5"
+                ],
+                "4x200G": [
+                    "Ethernet16/1",
+                    "Ethernet16/3",
+                    "Ethernet16/5",
+                    "Ethernet16/7"
                 ]
             }
         },
@@ -581,6 +677,12 @@
                 "2x400G": [
                     "Ethernet17/1",
                     "Ethernet17/5"
+                ],
+                "4x200G": [
+                    "Ethernet17/1",
+                    "Ethernet17/3",
+                    "Ethernet17/5",
+                    "Ethernet17/7"
                 ]
             }
         },
@@ -597,6 +699,12 @@
                 "2x400G": [
                     "Ethernet18/1",
                     "Ethernet18/5"
+                ],
+                "4x200G": [
+                    "Ethernet18/1",
+                    "Ethernet18/3",
+                    "Ethernet18/5",
+                    "Ethernet18/7"
                 ]
             }
         },
@@ -613,6 +721,12 @@
                 "2x400G": [
                     "Ethernet19/1",
                     "Ethernet19/5"
+                ],
+                "4x200G": [
+                    "Ethernet19/1",
+                    "Ethernet19/3",
+                    "Ethernet19/5",
+                    "Ethernet19/7"
                 ]
             }
         },
@@ -629,6 +743,12 @@
                 "2x400G": [
                     "Ethernet20/1",
                     "Ethernet20/5"
+                ],
+                "4x200G": [
+                    "Ethernet20/1",
+                    "Ethernet20/3",
+                    "Ethernet20/5",
+                    "Ethernet20/7"
                 ]
             }
         },
@@ -645,6 +765,12 @@
                 "2x400G": [
                     "Ethernet21/1",
                     "Ethernet21/5"
+                ],
+                "4x200G": [
+                    "Ethernet21/1",
+                    "Ethernet21/3",
+                    "Ethernet21/5",
+                    "Ethernet21/7"
                 ]
             }
         },
@@ -661,6 +787,12 @@
                 "2x400G": [
                     "Ethernet22/1",
                     "Ethernet22/5"
+                ],
+                "4x200G": [
+                    "Ethernet22/1",
+                    "Ethernet22/3",
+                    "Ethernet22/5",
+                    "Ethernet22/7"
                 ]
             }
         },
@@ -677,6 +809,12 @@
                 "2x400G": [
                     "Ethernet23/1",
                     "Ethernet23/5"
+                ],
+                "4x200G": [
+                    "Ethernet23/1",
+                    "Ethernet23/3",
+                    "Ethernet23/5",
+                    "Ethernet23/7"
                 ]
             }
         },
@@ -693,6 +831,12 @@
                 "2x400G": [
                     "Ethernet24/1",
                     "Ethernet24/5"
+                ],
+                "4x200G": [
+                    "Ethernet24/1",
+                    "Ethernet24/3",
+                    "Ethernet24/5",
+                    "Ethernet24/7"
                 ]
             }
         },
@@ -709,6 +853,12 @@
                 "2x400G": [
                     "Ethernet25/1",
                     "Ethernet25/5"
+                ],
+                "4x200G": [
+                    "Ethernet25/1",
+                    "Ethernet25/3",
+                    "Ethernet25/5",
+                    "Ethernet25/7"
                 ]
             }
         },
@@ -725,6 +875,12 @@
                 "2x400G": [
                     "Ethernet26/1",
                     "Ethernet26/5"
+                ],
+                "4x200G": [
+                    "Ethernet26/1",
+                    "Ethernet26/3",
+                    "Ethernet26/5",
+                    "Ethernet26/7"
                 ]
             }
         },
@@ -741,6 +897,12 @@
                 "2x400G": [
                     "Ethernet27/1",
                     "Ethernet27/5"
+                ],
+                "4x200G": [
+                    "Ethernet27/1",
+                    "Ethernet27/3",
+                    "Ethernet27/5",
+                    "Ethernet27/7"
                 ]
             }
         },
@@ -757,6 +919,12 @@
                 "2x400G": [
                     "Ethernet28/1",
                     "Ethernet28/5"
+                ],
+                "4x200G": [
+                    "Ethernet28/1",
+                    "Ethernet28/3",
+                    "Ethernet28/5",
+                    "Ethernet28/7"
                 ]
             }
         },
@@ -773,6 +941,12 @@
                 "2x400G": [
                     "Ethernet29/1",
                     "Ethernet29/5"
+                ],
+                "4x200G": [
+                    "Ethernet29/1",
+                    "Ethernet29/3",
+                    "Ethernet29/5",
+                    "Ethernet29/7"
                 ]
             }
         },
@@ -789,6 +963,12 @@
                 "2x400G": [
                     "Ethernet30/1",
                     "Ethernet30/5"
+                ],
+                "4x200G": [
+                    "Ethernet30/1",
+                    "Ethernet30/3",
+                    "Ethernet30/5",
+                    "Ethernet30/7"
                 ]
             }
         },
@@ -805,6 +985,12 @@
                 "2x400G": [
                     "Ethernet31/1",
                     "Ethernet31/5"
+                ],
+                "4x200G": [
+                    "Ethernet31/1",
+                    "Ethernet31/3",
+                    "Ethernet31/5",
+                    "Ethernet31/7"
                 ]
             }
         },
@@ -821,6 +1007,12 @@
                 "2x400G": [
                     "Ethernet32/1",
                     "Ethernet32/5"
+                ],
+                "4x200G": [
+                    "Ethernet32/1",
+                    "Ethernet32/3",
+                    "Ethernet32/5",
+                    "Ethernet32/7"
                 ]
             }
         },
@@ -837,6 +1029,12 @@
                 "2x400G": [
                     "Ethernet33/1",
                     "Ethernet33/5"
+                ],
+                "4x200G": [
+                    "Ethernet33/1",
+                    "Ethernet33/3",
+                    "Ethernet33/5",
+                    "Ethernet33/7"
                 ]
             }
         },
@@ -853,6 +1051,12 @@
                 "2x400G": [
                     "Ethernet34/1",
                     "Ethernet34/5"
+                ],
+                "4x200G": [
+                    "Ethernet34/1",
+                    "Ethernet34/3",
+                    "Ethernet34/5",
+                    "Ethernet34/7"
                 ]
             }
         },
@@ -869,6 +1073,12 @@
                 "2x400G": [
                     "Ethernet35/1",
                     "Ethernet35/5"
+                ],
+                "4x200G": [
+                    "Ethernet35/1",
+                    "Ethernet35/3",
+                    "Ethernet35/5",
+                    "Ethernet35/7"
                 ]
             }
         },
@@ -885,6 +1095,12 @@
                 "2x400G": [
                     "Ethernet36/1",
                     "Ethernet36/5"
+                ],
+                "4x200G": [
+                    "Ethernet36/1",
+                    "Ethernet36/3",
+                    "Ethernet36/5",
+                    "Ethernet36/7"
                 ]
             }
         },
@@ -901,6 +1117,12 @@
                 "2x400G": [
                     "Ethernet37/1",
                     "Ethernet37/5"
+                ],
+                "4x200G": [
+                    "Ethernet37/1",
+                    "Ethernet37/3",
+                    "Ethernet37/5",
+                    "Ethernet37/7"
                 ]
             }
         },
@@ -917,6 +1139,12 @@
                 "2x400G": [
                     "Ethernet38/1",
                     "Ethernet38/5"
+                ],
+                "4x200G": [
+                    "Ethernet38/1",
+                    "Ethernet38/3",
+                    "Ethernet38/5",
+                    "Ethernet38/7"
                 ]
             }
         },
@@ -933,6 +1161,12 @@
                 "2x400G": [
                     "Ethernet39/1",
                     "Ethernet39/5"
+                ],
+                "4x200G": [
+                    "Ethernet39/1",
+                    "Ethernet39/3",
+                    "Ethernet39/5",
+                    "Ethernet39/7"
                 ]
             }
         },
@@ -949,6 +1183,12 @@
                 "2x400G": [
                     "Ethernet40/1",
                     "Ethernet40/5"
+                ],
+                "4x200G": [
+                    "Ethernet40/1",
+                    "Ethernet40/3",
+                    "Ethernet40/5",
+                    "Ethernet40/7"
                 ]
             }
         },
@@ -965,6 +1205,12 @@
                 "2x400G": [
                     "Ethernet41/1",
                     "Ethernet41/5"
+                ],
+                "4x200G": [
+                    "Ethernet41/1",
+                    "Ethernet41/3",
+                    "Ethernet41/5",
+                    "Ethernet41/7"
                 ]
             }
         },
@@ -981,6 +1227,12 @@
                 "2x400G": [
                     "Ethernet42/1",
                     "Ethernet42/5"
+                ],
+                "4x200G": [
+                    "Ethernet42/1",
+                    "Ethernet42/3",
+                    "Ethernet42/5",
+                    "Ethernet42/7"
                 ]
             }
         },
@@ -997,6 +1249,12 @@
                 "2x400G": [
                     "Ethernet43/1",
                     "Ethernet43/5"
+                ],
+                "4x200G": [
+                    "Ethernet43/1",
+                    "Ethernet43/3",
+                    "Ethernet43/5",
+                    "Ethernet43/7"
                 ]
             }
         },
@@ -1013,6 +1271,12 @@
                 "2x400G": [
                     "Ethernet44/1",
                     "Ethernet44/5"
+                ],
+                "4x200G": [
+                    "Ethernet44/1",
+                    "Ethernet44/3",
+                    "Ethernet44/5",
+                    "Ethernet44/7"
                 ]
             }
         },
@@ -1029,6 +1293,12 @@
                 "2x400G": [
                     "Ethernet45/1",
                     "Ethernet45/5"
+                ],
+                "4x200G": [
+                    "Ethernet45/1",
+                    "Ethernet45/3",
+                    "Ethernet45/5",
+                    "Ethernet45/7"
                 ]
             }
         },
@@ -1045,6 +1315,12 @@
                 "2x400G": [
                     "Ethernet46/1",
                     "Ethernet46/5"
+                ],
+                "4x200G": [
+                    "Ethernet46/1",
+                    "Ethernet46/3",
+                    "Ethernet46/5",
+                    "Ethernet46/7"
                 ]
             }
         },
@@ -1061,6 +1337,12 @@
                 "2x400G": [
                     "Ethernet47/1",
                     "Ethernet47/5"
+                ],
+                "4x200G": [
+                    "Ethernet47/1",
+                    "Ethernet47/3",
+                    "Ethernet47/5",
+                    "Ethernet47/7"
                 ]
             }
         },
@@ -1077,6 +1359,12 @@
                 "2x400G": [
                     "Ethernet48/1",
                     "Ethernet48/5"
+                ],
+                "4x200G": [
+                    "Ethernet48/1",
+                    "Ethernet48/3",
+                    "Ethernet48/5",
+                    "Ethernet48/7"
                 ]
             }
         },
@@ -1093,6 +1381,12 @@
                 "2x400G": [
                     "Ethernet49/1",
                     "Ethernet49/5"
+                ],
+                "4x200G": [
+                    "Ethernet49/1",
+                    "Ethernet49/3",
+                    "Ethernet49/5",
+                    "Ethernet49/7"
                 ]
             }
         },
@@ -1109,6 +1403,12 @@
                 "2x400G": [
                     "Ethernet50/1",
                     "Ethernet50/5"
+                ],
+                "4x200G": [
+                    "Ethernet50/1",
+                    "Ethernet50/3",
+                    "Ethernet50/5",
+                    "Ethernet50/7"
                 ]
             }
         },
@@ -1125,6 +1425,12 @@
                 "2x400G": [
                     "Ethernet51/1",
                     "Ethernet51/5"
+                ],
+                "4x200G": [
+                    "Ethernet51/1",
+                    "Ethernet51/3",
+                    "Ethernet51/5",
+                    "Ethernet51/7"
                 ]
             }
         },
@@ -1141,6 +1447,12 @@
                 "2x400G": [
                     "Ethernet52/1",
                     "Ethernet52/5"
+                ],
+                "4x200G": [
+                    "Ethernet52/1",
+                    "Ethernet52/3",
+                    "Ethernet52/5",
+                    "Ethernet52/7"
                 ]
             }
         },
@@ -1157,6 +1469,12 @@
                 "2x400G": [
                     "Ethernet53/1",
                     "Ethernet53/5"
+                ],
+                "4x200G": [
+                    "Ethernet53/1",
+                    "Ethernet53/3",
+                    "Ethernet53/5",
+                    "Ethernet53/7"
                 ]
             }
         },
@@ -1173,6 +1491,12 @@
                 "2x400G": [
                     "Ethernet54/1",
                     "Ethernet54/5"
+                ],
+                "4x200G": [
+                    "Ethernet54/1",
+                    "Ethernet54/3",
+                    "Ethernet54/5",
+                    "Ethernet54/7"
                 ]
             }
         },
@@ -1189,6 +1513,12 @@
                 "2x400G": [
                     "Ethernet55/1",
                     "Ethernet55/5"
+                ],
+                "4x200G": [
+                    "Ethernet55/1",
+                    "Ethernet55/3",
+                    "Ethernet55/5",
+                    "Ethernet55/7"
                 ]
             }
         },
@@ -1205,6 +1535,12 @@
                 "2x400G": [
                     "Ethernet56/1",
                     "Ethernet56/5"
+                ],
+                "4x200G": [
+                    "Ethernet56/1",
+                    "Ethernet56/3",
+                    "Ethernet56/5",
+                    "Ethernet56/7"
                 ]
             }
         },
@@ -1221,6 +1557,12 @@
                 "2x400G": [
                     "Ethernet57/1",
                     "Ethernet57/5"
+                ],
+                "4x200G": [
+                    "Ethernet57/1",
+                    "Ethernet57/3",
+                    "Ethernet57/5",
+                    "Ethernet57/7"
                 ]
             }
         },
@@ -1237,6 +1579,12 @@
                 "2x400G": [
                     "Ethernet58/1",
                     "Ethernet58/5"
+                ],
+                "4x200G": [
+                    "Ethernet58/1",
+                    "Ethernet58/3",
+                    "Ethernet58/5",
+                    "Ethernet58/7"
                 ]
             }
         },
@@ -1253,6 +1601,12 @@
                 "2x400G": [
                     "Ethernet59/1",
                     "Ethernet59/5"
+                ],
+                "4x200G": [
+                    "Ethernet59/1",
+                    "Ethernet59/3",
+                    "Ethernet59/5",
+                    "Ethernet59/7"
                 ]
             }
         },
@@ -1269,6 +1623,12 @@
                 "2x400G": [
                     "Ethernet60/1",
                     "Ethernet60/5"
+                ],
+                "4x200G": [
+                    "Ethernet60/1",
+                    "Ethernet60/3",
+                    "Ethernet60/5",
+                    "Ethernet60/7"
                 ]
             }
         },
@@ -1285,6 +1645,12 @@
                 "2x400G": [
                     "Ethernet61/1",
                     "Ethernet61/5"
+                ],
+                "4x200G": [
+                    "Ethernet61/1",
+                    "Ethernet61/3",
+                    "Ethernet61/5",
+                    "Ethernet61/7"
                 ]
             }
         },
@@ -1301,6 +1667,12 @@
                 "2x400G": [
                     "Ethernet62/1",
                     "Ethernet62/5"
+                ],
+                "4x200G": [
+                    "Ethernet62/1",
+                    "Ethernet62/3",
+                    "Ethernet62/5",
+                    "Ethernet62/7"
                 ]
             }
         },
@@ -1317,6 +1689,12 @@
                 "2x400G": [
                     "Ethernet63/1",
                     "Ethernet63/5"
+                ],
+                "4x200G": [
+                    "Ethernet63/1",
+                    "Ethernet63/3",
+                    "Ethernet63/5",
+                    "Ethernet63/7"
                 ]
             }
         },
@@ -1333,8 +1711,14 @@
                 "2x400G": [
                     "Ethernet64/1",
                     "Ethernet64/5"
+                ],
+                "4x200G": [
+                    "Ethernet64/1",
+                    "Ethernet64/3",
+                    "Ethernet64/5",
+                    "Ethernet64/7"
                 ]
             }
         }
     }
-}
+}
\ No newline at end of file

From 4f5cb874ad9c9a74f0f6fa6a187eac12ca48f2ad Mon Sep 17 00:00:00 2001
From: Stephen Sun <5379172+stephenxs@users.noreply.github.com>
Date: Wed, 8 May 2024 00:50:59 +0800
Subject: [PATCH 0532/1115] [Mellanox] Support read/write more than 1 page in a
 single platform API call (#18881)

- Why I did it
Support read/write more than 1 page in a single platform API call.

- How to verify it
Manual and mock test

Signed-off-by: Stephen Sun <stephens@nvidia.com>
---
 .../mlnx-platform-api/sonic_platform/sfp.py   | 101 +++++++++++-------
 .../mlnx-platform-api/tests/test_sfp.py       |  18 ++++
 2 files changed, 80 insertions(+), 39 deletions(-)

diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py b/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py
index d07de2233..cea8034bb 100644
--- a/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py
+++ b/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py
@@ -355,25 +355,40 @@ def _read_eeprom(self, offset, num_bytes, log_on_error=True):
         Returns:
             bytearray: the content of EEPROM
         """
-        _, page, page_offset = self._get_page_and_page_offset(offset)
-        if not page:
-            return None
+        result = None
+        while num_bytes > 0:
+            _, page, page_offset = self._get_page_and_page_offset(offset)
+            if not page:
+                return None
 
-        try:
-            with open(page, mode='rb', buffering=0) as f:
-                f.seek(page_offset)
-                content = f.read(num_bytes)
-                if ctypes.get_errno() != 0:
-                    raise IOError(f'errno = {os.strerror(ctypes.get_errno())}')
-            logger.log_debug(f'read EEPROM sfp={self.sdk_index}, page={page}, page_offset={page_offset}, \
-                    size={num_bytes}, data={content}')
-        except (OSError, IOError) as e:
-            if log_on_error:
-                logger.log_warning(f'Failed to read sfp={self.sdk_index} EEPROM page={page}, page_offset={page_offset}, \
-                    size={num_bytes}, offset={offset}, error = {e}')
-            return None
+            try:
+                with open(page, mode='rb', buffering=0) as f:
+                    f.seek(page_offset)
+                    content = f.read(num_bytes)
+                    if not result:
+                        result = content
+                    else:
+                        result += content
+                    read_length = len(content)
+                    num_bytes -= read_length
+                    if num_bytes > 0:
+                        page_size = f.seek(0, os.SEEK_END)
+                        if page_offset + read_length == page_size:
+                            offset += read_length
+                        else:
+                            # Indicate read finished
+                            num_bytes = 0
+                    if ctypes.get_errno() != 0:
+                        raise IOError(f'errno = {os.strerror(ctypes.get_errno())}')
+                    logger.log_debug(f'read EEPROM sfp={self.sdk_index}, page={page}, page_offset={page_offset}, '\
+                        f'size={read_length}, data={content}')
+            except (OSError, IOError) as e:
+                if log_on_error:
+                    logger.log_warning(f'Failed to read sfp={self.sdk_index} EEPROM page={page}, page_offset={page_offset}, '\
+                        f'size={num_bytes}, offset={offset}, error = {e}')
+                return None
 
-        return bytearray(content)
+        return bytearray(result)
 
     # write eeprom specfic bytes beginning from offset with size as num_bytes
     def write_eeprom(self, offset, num_bytes, write_buffer):
@@ -389,29 +404,37 @@ def write_eeprom(self, offset, num_bytes, write_buffer):
             logger.log_error("Error mismatch between buffer length and number of bytes to be written")
             return False
 
-        page_num, page, page_offset = self._get_page_and_page_offset(offset)
-        if not page:
-            return False
+        while num_bytes > 0:
+            page_num, page, page_offset = self._get_page_and_page_offset(offset)
+            if not page:
+                return False
 
-        try:
-            if self._is_write_protected(page_num, page_offset, num_bytes):
-                # write limited eeprom is not supported
-                raise IOError('write limited bytes')
-
-            with open(page, mode='r+b', buffering=0) as f:
-                f.seek(page_offset)
-                ret = f.write(write_buffer[0:num_bytes])
-                if ret != num_bytes:
-                    raise IOError(f'write return code = {ret}')
-                if ctypes.get_errno() != 0:
-                    raise IOError(f'errno = {os.strerror(ctypes.get_errno())}')
-            logger.log_debug(f'write EEPROM sfp={self.sdk_index}, page={page}, page_offset={page_offset}, \
-                    size={num_bytes}, data={write_buffer}')
-        except (OSError, IOError) as e:
-            data = ''.join('{:02x}'.format(x) for x in write_buffer)
-            logger.log_error(f'Failed to write EEPROM data sfp={self.sdk_index} EEPROM page={page}, page_offset={page_offset}, size={num_bytes}, \
-                offset={offset}, data = {data}, error = {e}')
-            return False
+            try:
+                if self._is_write_protected(page_num, page_offset, num_bytes):
+                    # write limited eeprom is not supported
+                    raise IOError('write limited bytes')
+                with open(page, mode='r+b', buffering=0) as f:
+                    f.seek(page_offset)
+                    ret = f.write(write_buffer[0:num_bytes])
+                    written_buffer = write_buffer[0:ret]
+                    if ret != num_bytes:
+                        page_size = f.seek(0, os.SEEK_END)
+                        if page_offset + ret == page_size:
+                            # Move to next page
+                            write_buffer = write_buffer[ret:num_bytes]
+                            offset += ret
+                        else:
+                            raise IOError(f'write return code = {ret}')
+                    num_bytes -= ret
+                    if ctypes.get_errno() != 0:
+                        raise IOError(f'errno = {os.strerror(ctypes.get_errno())}')
+                    logger.log_debug(f'write EEPROM sfp={self.sdk_index}, page={page}, page_offset={page_offset}, '\
+                        f'size={ret}, left={num_bytes}, data={written_buffer}')
+            except (OSError, IOError) as e:
+                data = ''.join('{:02x}'.format(x) for x in write_buffer)
+                logger.log_error(f'Failed to write EEPROM data sfp={self.sdk_index} EEPROM page={page}, page_offset={page_offset}, size={num_bytes}, '\
+                    f'offset={offset}, data = {data}, error = {e}')
+                return False
         return True
 
     @classmethod
diff --git a/platform/mellanox/mlnx-platform-api/tests/test_sfp.py b/platform/mellanox/mlnx-platform-api/tests/test_sfp.py
index 499983a01..748a9c714 100644
--- a/platform/mellanox/mlnx-platform-api/tests/test_sfp.py
+++ b/platform/mellanox/mlnx-platform-api/tests/test_sfp.py
@@ -131,6 +131,17 @@ def test_sfp_write_eeprom(self, mock_limited_eeprom, mock_get_page):
             handle.write.side_effect = OSError('')
             assert not sfp.write_eeprom(0, 1, bytearray([1]))
 
+        mo = mock.mock_open()
+        print('after mock open')
+        with mock.patch('sonic_platform.sfp.open', mo):
+            handle = mo()
+            handle.write.side_effect = [128, 128, 64]
+            handle.seek.side_effect = [0, 128, 0, 128, 0]
+            bytes_to_write = bytearray([0]*128 + [1]*128 + [2]*64)
+            assert sfp.write_eeprom(0, 320, bytes_to_write)
+            expected_calls = [mock.call(bytes_to_write), mock.call(bytes_to_write[128:]), mock.call(bytes_to_write[256:])]
+            handle.write.assert_has_calls(expected_calls)
+
     @mock.patch('sonic_platform.sfp.SFP._get_page_and_page_offset')
     def test_sfp_read_eeprom(self, mock_get_page):
         sfp = SFP(0)
@@ -152,6 +163,13 @@ def test_sfp_read_eeprom(self, mock_get_page):
             handle.read.side_effect = OSError('')
             assert sfp.read_eeprom(0, 1) is None
 
+        mo = mock.mock_open()
+        with mock.patch('sonic_platform.sfp.open', mo):
+            handle = mo()
+            handle.read.side_effect = [b'\x00'*128, b'\x01'*128, b'\x02'*64]
+            handle.seek.side_effect = [0, 128, 0, 128, 0]
+            assert sfp.read_eeprom(0, 320) == bytearray([0]*128 + [1]*128 + [2]*64)
+
     @mock.patch('sonic_platform.sfp.SFP._fetch_port_status')
     def test_is_port_admin_status_up(self, mock_port_status):
         mock_port_status.return_value = (0, True)

From bbf4b86e67dd73cfdb249c3a539f23652246d94d Mon Sep 17 00:00:00 2001
From: Stephen Sun <5379172+stephenxs@users.noreply.github.com>
Date: Wed, 8 May 2024 01:41:51 +0800
Subject: [PATCH 0533/1115] [yang] Support ASIC/SDK health event (#17879)

Support ASIC/SDK health event

- Suppress ASIC/SDK health event configuration
- New event

Signed-off-by: Stephen Sun <stephens@nvidia.com>
---
 src/sonic-yang-models/doc/Configuration.md    | 22 +++++
 src/sonic-yang-models/setup.py                |  1 +
 .../tests/files/sample_config_db.json         |  6 ++
 .../tests/sonic-events-swss.json              | 14 +++
 .../tests/suppress_asic_sdk_health_event.json | 23 +++++
 .../tests_config/sonic-events-swss.json       | 45 ++++++++-
 .../suppress_asic_sdk_health_event.json       | 93 +++++++++++++++++++
 .../yang-models/sonic-events-swss.yang        | 36 +++++++
 .../sonic-suppress-asic-sdk-health-event.yang | 59 ++++++++++++
 9 files changed, 298 insertions(+), 1 deletion(-)
 create mode 100644 src/sonic-yang-models/tests/yang_model_tests/tests/suppress_asic_sdk_health_event.json
 create mode 100644 src/sonic-yang-models/tests/yang_model_tests/tests_config/suppress_asic_sdk_health_event.json
 create mode 100644 src/sonic-yang-models/yang-models/sonic-suppress-asic-sdk-health-event.yang

diff --git a/src/sonic-yang-models/doc/Configuration.md b/src/sonic-yang-models/doc/Configuration.md
index bb0b2f87c..37f193e1c 100644
--- a/src/sonic-yang-models/doc/Configuration.md
+++ b/src/sonic-yang-models/doc/Configuration.md
@@ -13,6 +13,7 @@ Table of Contents
 
          * [ACL and Mirroring](#acl-and-mirroring)
          * [BGP BBR](#bgp-bbr)
+         * [ASIC SDK health event](#asic-sdk-health-event)
          * [BGP Device Global](#bgp-device-global)
          * [BGP Sessions](#bgp-sessions)
          * [BUFFER_PG](#buffer_pg)
@@ -383,6 +384,27 @@ The **BGP_BBR** table contains device-level BBR state.
         }
 }
 ```
+### ASIC SDK health event
+
+ASIC/SDK health event related configuration is defined in **SUPPRESS_ASIC_SDK_HEALTH_EVENT** table.
+
+```
+"SUPPRESS_ASIC_SDK_HEALTH_EVENT": {
+    "notice": {
+        "categories": [
+            "asic_hw"
+        ],
+        "max_events": "1000"
+    },
+    "warning": {
+        "categories": [
+            "software",
+            "cpu_hw"
+        ]
+    }
+}
+```
+
 ### BGP Device Global
 
 The **BGP_DEVICE_GLOBAL** table contains device-level BGP global state.
diff --git a/src/sonic-yang-models/setup.py b/src/sonic-yang-models/setup.py
index b1257f6ea..6748bb137 100644
--- a/src/sonic-yang-models/setup.py
+++ b/src/sonic-yang-models/setup.py
@@ -160,6 +160,7 @@ def run(self):
                          './yang-models/sonic-routing-policy-sets.yang',
                          './yang-models/sonic-sflow.yang',
                          './yang-models/sonic-snmp.yang',
+                         './yang-models/sonic-suppress-asic-sdk-health-event.yang',
                          './yang-models/sonic-syslog.yang',
                          './yang-models/sonic-system-aaa.yang',
                          './yang-models/sonic-system-tacacs.yang',
diff --git a/src/sonic-yang-models/tests/files/sample_config_db.json b/src/sonic-yang-models/tests/files/sample_config_db.json
index 33c9c265a..71c957a54 100644
--- a/src/sonic-yang-models/tests/files/sample_config_db.json
+++ b/src/sonic-yang-models/tests/files/sample_config_db.json
@@ -2539,6 +2539,12 @@
             }
 
         },
+        "SUPPRESS_ASIC_SDK_HEALTH_EVENT": {
+            "notice": {
+                "categories": ["firmware", "asic_hw"],
+                "max_events": "1024"
+            }
+        },
         "SYSTEM_DEFAULTS": {
             "tunnel_qos_remap": {
                 "status": "enabled"
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/sonic-events-swss.json b/src/sonic-yang-models/tests/yang_model_tests/tests/sonic-events-swss.json
index 56a05d173..a6c3d9332 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests/sonic-events-swss.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests/sonic-events-swss.json
@@ -92,5 +92,19 @@
 	},
 	"SONIC_EVENTS_SWSS_SELECT_OPERATION_FAILURE_VALID": {
 		"desc": "VALID SELECT_OPERATION_FAILURE EVENT."
+	},
+	"SONIC_EVENTS_SWSS_ASIC_SDK_HEALTH_VALID": {
+		"desc": "VALID ASIC_SDK_HEALTH EVENT."
+	},
+	"SONIC_EVENTS_SWSS_ASIC_SDK_HEALTH_VALID_MASIC": {
+		"desc": "VALID ASIC_SDK_HEALTH EVENT."
+	},
+	"SONIC_EVENTS_SWSS_ASIC_SDK_HEALTH_INVALID_SEVERITY": {
+	    "desc": "ASIC_SDK_HEALTH_INVALID_SEVERITY failure.",
+            "eStrKey": "InvalidValue"
+	},
+	"SONIC_EVENTS_SWSS_ASIC_SDK_HEALTH_INVALID_CATEGORY": {
+	    "desc": "ASIC_SDK_HEALTH_INVALID_CATEGORY failure.",
+            "eStrKey": "InvalidValue"
 	}
 }
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/suppress_asic_sdk_health_event.json b/src/sonic-yang-models/tests/yang_model_tests/tests/suppress_asic_sdk_health_event.json
new file mode 100644
index 000000000..a96a95deb
--- /dev/null
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests/suppress_asic_sdk_health_event.json
@@ -0,0 +1,23 @@
+{
+    "SUPPRESS_ASIC_SDK_HEALTH_EVENT_LIST_VALID_FATAL": {
+        "desc": "Load suppress ASIC/SDK health event list for fatal."
+    },
+    "SUPPRESS_ASIC_SDK_HEALTH_EVENT_LIST_VALID_WARNING": {
+        "desc": "Load suppress ASIC/SDK health event list for warning."
+    },
+    "SUPPRESS_ASIC_SDK_HEALTH_EVENT_LIST_VALID_NOTICE": {
+        "desc": "Load suppress ASIC/SDK health event list for notice."
+    },
+    "SUPPRESS_ASIC_SDK_HEALTH_EVENT_LIST_INVALID_SEVERITY": {
+        "desc": "Load suppress ASIC/SDK health event list for notice.",
+        "eStrKey": "InvalidValue"
+    },
+    "SUPPRESS_ASIC_SDK_HEALTH_EVENT_LIST_NEGATIVE_MAX_EVENTS": {
+        "desc": "Load suppress ASIC/SDK health event list missing name.",
+        "eStrKey": "InvalidValue"
+    },
+    "SUPPRESS_ASIC_SDK_HEALTH_EVENT_LIST_INVALID_MAX_EVENTS": {
+        "desc": "Load suppress ASIC/SDK health event list missing name.",
+        "eStrKey": "InvalidValue"
+    }
+}
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/sonic-events-swss.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/sonic-events-swss.json
index 919468dcb..1c2dcaa4c 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/sonic-events-swss.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/sonic-events-swss.json
@@ -244,7 +244,7 @@
             }
         }
     },
-   "SONIC_EVENTS_SWSS_SELECT_OPERATION_FAILURE_VALID": {
+    "SONIC_EVENTS_SWSS_SELECT_OPERATION_FAILURE_VALID": {
         "sonic-events-swss:sonic-events-swss": {
             "sonic-events-swss:select-operation-failure": {
                 "operation_result": "operation_result",
@@ -252,5 +252,48 @@
                 "timestamp": "1985-04-12T23:20:50.52Z"
             }
         }
+    },
+    "SONIC_EVENTS_SWSS_ASIC_SDK_HEALTH_VALID": {
+        "sonic-events-swss:sonic-events-swss": {
+            "sonic-events-swss:asic-sdk-health-event": {
+                "severity": "fatal",
+                "category": "asic_hw",
+                "description": "\ndescription\n",
+                "timestamp": "1985-04-12T23:20:50.52Z",
+                "sai_timestamp": "1985-04-12 23:20:50"
+            }
+        }
+    },
+    "SONIC_EVENTS_SWSS_ASIC_SDK_HEALTH_VALID_MASIC": {
+        "sonic-events-swss:sonic-events-swss": {
+            "sonic-events-swss:asic-sdk-health-event": {
+                "severity": "fatal",
+                "category": "asic_hw",
+                "asic_name": "asic0",
+                "description": "\ndescription\n",
+                "timestamp": "1985-04-12T23:20:50.52Z",
+                "sai_timestamp": "1985-04-12 23:20:50"
+            }
+        }
+    },
+    "SONIC_EVENTS_SWSS_ASIC_SDK_HEALTH_INVALID_SEVERITY": {
+        "sonic-events-swss:sonic-events-swss": {
+            "sonic-events-swss:asic-sdk-health-event": {
+                "severity": "unknown",
+                "category": "asic_hw",
+                "description": "\ndescription\n",
+                "timestamp": "1985-04-12T23:20:50.52Z"
+            }
+        }
+    },
+    "SONIC_EVENTS_SWSS_ASIC_SDK_HEALTH_INVALID_CATEGORY": {
+        "sonic-events-swss:sonic-events-swss": {
+            "sonic-events-swss:asic-sdk-health-event": {
+                "severity": "fatal",
+                "category": "unknown",
+                "description": "\ndescription\n",
+                "timestamp": "1985-04-12T23:20:50.52Z"
+            }
+        }
     }
 }
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/suppress_asic_sdk_health_event.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/suppress_asic_sdk_health_event.json
new file mode 100644
index 000000000..452d12f10
--- /dev/null
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/suppress_asic_sdk_health_event.json
@@ -0,0 +1,93 @@
+{
+    "SUPPRESS_ASIC_SDK_HEALTH_EVENT_LIST_VALID_FATAL": {
+        "sonic-suppress-asic-sdk-health-event:sonic-suppress-asic-sdk-health-event": {
+            "sonic-suppress-asic-sdk-health-event:SUPPRESS_ASIC_SDK_HEALTH_EVENT": {
+                "SUPPRESS_ASIC_SDK_HEALTH_EVENT_LIST": [
+                    {
+                        "severity": "fatal",
+                        "categories": ["software","firmware"]
+                    }
+                ]
+            }
+        }
+    },
+
+    "SUPPRESS_ASIC_SDK_HEALTH_EVENT_LIST_VALID_WARNING": {
+        "sonic-suppress-asic-sdk-health-event:sonic-suppress-asic-sdk-health-event": {
+            "sonic-suppress-asic-sdk-health-event:SUPPRESS_ASIC_SDK_HEALTH_EVENT": {
+                "SUPPRESS_ASIC_SDK_HEALTH_EVENT_LIST": [
+                    {
+                        "severity": "warning",
+                        "categories": ["asic_hw","cpu_hw"]
+                    }
+                ]
+            }
+        }
+    },
+
+    "SUPPRESS_ASIC_SDK_HEALTH_EVENT_LIST_VALID_NOTICE": {
+        "sonic-suppress-asic-sdk-health-event:sonic-suppress-asic-sdk-health-event": {
+            "sonic-suppress-asic-sdk-health-event:SUPPRESS_ASIC_SDK_HEALTH_EVENT": {
+                "SUPPRESS_ASIC_SDK_HEALTH_EVENT_LIST": [
+                    {
+                        "severity": "notice",
+                        "categories": ["software","firmware","cpu_hw","asic_hw"],
+                        "max_events": "100"
+                    }
+                ]
+            }
+        }
+    },
+
+    "SUPPRESS_ASIC_SDK_HEALTH_EVENT_LIST_INVALID_SEVERITY": {
+        "sonic-suppress-asic-sdk-health-event:sonic-suppress-asic-sdk-health-event": {
+            "sonic-suppress-asic-sdk-health-event:SUPPRESS_ASIC_SDK_HEALTH_EVENT": {
+                "SUPPRESS_ASIC_SDK_HEALTH_EVENT_LIST": [
+                    {
+                        "severity": "unknown",
+                        "categories": ["software","firmware","cpu_hw","asic_hw"]
+                    }
+                ]
+            }
+        }
+    },
+
+    "SUPPRESS_ASIC_SDK_HEALTH_EVENT_LIST_INVALID_CATEGORY": {
+        "sonic-suppress-asic-sdk-health-event:sonic-suppress-asic-sdk-health-event": {
+            "sonic-suppress-asic-sdk-health-event:SUPPRESS_ASIC_SDK_HEALTH_EVENT": {
+                "SUPPRESS_ASIC_SDK_HEALTH_EVENT_LIST": [
+                    {
+                        "severity": "notice",
+                        "categories": ["software","unknown","cpu_hw","asic_hw"]
+                    }
+                ]
+            }
+        }
+    },
+
+    "SUPPRESS_ASIC_SDK_HEALTH_EVENT_LIST_NEGATIVE_MAX_EVENTS": {
+        "sonic-suppress-asic-sdk-health-event:sonic-suppress-asic-sdk-health-event": {
+            "sonic-suppress-asic-sdk-health-event:SUPPRESS_ASIC_SDK_HEALTH_EVENT": {
+                "SUPPRESS_ASIC_SDK_HEALTH_EVENT_LIST": [
+                    {
+                        "severity": "notice",
+                        "max_events": "-1"
+                    }
+                ]
+            }
+        }
+    },
+
+    "SUPPRESS_ASIC_SDK_HEALTH_EVENT_LIST_INVALID_MAX_EVENTS": {
+        "sonic-suppress-asic-sdk-health-event:sonic-suppress-asic-sdk-health-event": {
+            "sonic-suppress-asic-sdk-health-event:SUPPRESS_ASIC_SDK_HEALTH_EVENT": {
+                "SUPPRESS_ASIC_SDK_HEALTH_EVENT_LIST": [
+                    {
+                        "severity": "notice",
+                        "max_events": "NaN"
+                    }
+                ]
+            }
+        }
+    }
+}
diff --git a/src/sonic-yang-models/yang-models/sonic-events-swss.yang b/src/sonic-yang-models/yang-models/sonic-events-swss.yang
index 4092fe42d..66242d2ec 100644
--- a/src/sonic-yang-models/yang-models/sonic-events-swss.yang
+++ b/src/sonic-yang-models/yang-models/sonic-events-swss.yang
@@ -148,5 +148,41 @@ module sonic-events-swss {
 
             uses evtcmn:sonic-events-cmn;
         }
+
+        container asic-sdk-health-event {
+            evtcmn:ALARM_SEVERITY_MAJOR;
+            description
+                "Declares an event for ASIC/SDK health event.";
+            leaf asic_name {
+                type string {
+                    pattern 'asic[0-9]{1,2}';
+                }
+            }
+            leaf severity {
+                type enumeration {
+                    enum fatal;
+                    enum warning;
+                    enum notice;
+                }
+            }
+            leaf category {
+                type enumeration {
+                    enum software;
+                    enum firmware;
+                    enum cpu_hw;
+                    enum asic_hw;
+                }
+            }
+            leaf description {
+                type string;
+            }
+            leaf sai_timestamp {
+                type string {
+                    pattern '[0-9]{4}-[0-9]{2}-[0-9]{2} [0-9]{2}:[0-9]{2}:[0-9]{2}';
+                }
+            }
+
+            uses evtcmn:sonic-events-cmn;
+        }
     }
 }
diff --git a/src/sonic-yang-models/yang-models/sonic-suppress-asic-sdk-health-event.yang b/src/sonic-yang-models/yang-models/sonic-suppress-asic-sdk-health-event.yang
new file mode 100644
index 000000000..650911cc8
--- /dev/null
+++ b/src/sonic-yang-models/yang-models/sonic-suppress-asic-sdk-health-event.yang
@@ -0,0 +1,59 @@
+module sonic-suppress-asic-sdk-health-event {
+
+    yang-version 1.1;
+
+    namespace "http://github.com/sonic-net/sonic-suppress-asic-sdk-health-event";
+
+    prefix sch;
+
+    organization
+        "SONiC";
+
+    contact
+        "SONiC";
+
+    description
+        "Suppress ASIC/SDK health event yang Module for SONiC OS";
+
+    revision 2023-11-29 {
+        description
+            "Initial revision";
+    }
+
+    container sonic-suppress-asic-sdk-health-event {
+
+        container SUPPRESS_ASIC_SDK_HEALTH_EVENT {
+
+            description "SUPPRESS_ASIC_SDK_HEALTH_EVENT part of config_db.json";
+
+            list SUPPRESS_ASIC_SDK_HEALTH_EVENT_LIST {
+
+                key "severity";
+
+                leaf severity {
+                    type enumeration {
+                        enum fatal;
+                        enum warning;
+                        enum notice;
+                    }
+                    description "Severity of the ASIC/SDK health event to suppress";
+                }
+
+                leaf max_events {
+                    type uint32;
+                    description "Maximum of events that can be stored in the database";
+                }
+
+                leaf-list categories {
+                    type enumeration {
+                        enum software;
+                        enum firmware;
+                        enum cpu_hw;
+                        enum asic_hw;
+                    }
+                    description "Category of the ASIC/SDK health event to suppress";
+                }
+            }
+        }
+    }
+}

From 9e2da6d6a8937e6ae497d49b25fd99dd9cafcad0 Mon Sep 17 00:00:00 2001
From: Sai Kiran <110003254+opcoder0@users.noreply.github.com>
Date: Wed, 8 May 2024 11:47:01 +1000
Subject: [PATCH 0534/1115] [sonic-slave]: Add remake to debug makefiles
 (#18891)

Remake supports GDB style debugging for makefiles making it easier
to traverse complicated makefiles and stepping through builds


Running remake from inside the slave container. For instance, running remake with the -X option starts the debugger.

remake -X -f slave.mk PLATFORM=vs ... EXTRA_DOCKER_TARGETS=docker-ptf.gz buster
---
 sonic-slave-bookworm/Dockerfile.j2 | 1 +
 sonic-slave-bullseye/Dockerfile.j2 | 1 +
 sonic-slave-buster/Dockerfile.j2   | 1 +
 3 files changed, 3 insertions(+)

diff --git a/sonic-slave-bookworm/Dockerfile.j2 b/sonic-slave-bookworm/Dockerfile.j2
index 9706510cb..b0efe041e 100644
--- a/sonic-slave-bookworm/Dockerfile.j2
+++ b/sonic-slave-bookworm/Dockerfile.j2
@@ -91,6 +91,7 @@ RUN apt-get update && apt-get install -y \
         {{ GZ_COMPRESS_PROGRAM }} \
         git \
         build-essential \
+        remake \
         libtool \
         lintian \
         sudo \
diff --git a/sonic-slave-bullseye/Dockerfile.j2 b/sonic-slave-bullseye/Dockerfile.j2
index 7bcf438cc..4ff550aca 100644
--- a/sonic-slave-bullseye/Dockerfile.j2
+++ b/sonic-slave-bullseye/Dockerfile.j2
@@ -97,6 +97,7 @@ RUN apt-get update && apt-get install -y eatmydata && eatmydata apt-get install
         {{ GZ_COMPRESS_PROGRAM }} \
         git \
         build-essential \
+        remake \
         libtool \
         lintian \
         sudo \
diff --git a/sonic-slave-buster/Dockerfile.j2 b/sonic-slave-buster/Dockerfile.j2
index 5b2146eed..ac4108fac 100644
--- a/sonic-slave-buster/Dockerfile.j2
+++ b/sonic-slave-buster/Dockerfile.j2
@@ -93,6 +93,7 @@ RUN apt-get update && apt-get install -y eatmydata && eatmydata apt-get install
         {{ GZ_COMPRESS_PROGRAM }} \
         git \
         build-essential \
+        remake \
         libtool \
         lintian \
         sudo \

From 50b4fb615ade819cf476722651b8c83b430050a4 Mon Sep 17 00:00:00 2001
From: Jon Goldberg <63672455+jon-nokia@users.noreply.github.com>
Date: Tue, 7 May 2024 21:49:06 -0400
Subject: [PATCH 0535/1115] [Nokia-IXR7250E] disable pcie aer (#18864)

In Linux kernel v6.0, commit, f26e58bf6f5470 "PCI/AER: Enable error reporting when AER is native" changed the default behavior of Advanced Error Reporting (AER). Reporting is now enabled by default, which was not the case prior. There are custom FPGA devices on our PCI bus that are not yet configured nor enabled across reboot until the Sonic platform is initialized. Therefore this is impacting AER adversely. Since AER was not enabled in 202205, this is not a regression.
---
 device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/installer.conf | 2 +-
 device/nokia/x86_64-nokia_ixr7250e_sup-r0/installer.conf     | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/installer.conf b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/installer.conf
index 7580ad94c..e0202983d 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/installer.conf
+++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/installer.conf
@@ -1,4 +1,4 @@
 CONSOLE_PORT=0x3f8
 CONSOLE_DEV=0
 CONSOLE_SPEED=115200
-ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="amd_iommu=off pci=resource_alignment=48@00:03.1"
+ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="amd_iommu=off pci=resource_alignment=48@00:03.1 pci=noaer"
diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/installer.conf b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/installer.conf
index 6b58d6663..2578a7d28 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/installer.conf
+++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/installer.conf
@@ -1,4 +1,4 @@
 CONSOLE_PORT=0x2f8
 CONSOLE_DEV=0
 CONSOLE_SPEED=115200
-ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="amd_iommu=off pci=resource_alignment=26@00:01.4"
+ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="amd_iommu=off pci=resource_alignment=26@00:01.4 pci=noaer"

From d07a83e4be072577f027c7884209081f28cc9e6a Mon Sep 17 00:00:00 2001
From: jingwenxie <jingwenxie@microsoft.com>
Date: Wed, 8 May 2024 12:02:08 +0800
Subject: [PATCH 0536/1115] [YANG] Add valid v6 address to
 sonic-dhcp-sever.yang (#18690)

#### Why I did it
The PR is to allow v6 address in DHCP_SERVER table which was generated from PROD minigraph. This is to pass the YANG validation.

#### How I did it
Replace ipv4-address with ip-address which is a union of ipv4-address nad ipv6-address
#### How to verify it
Unit test
---
 src/sonic-yang-models/tests/files/sample_config_db.json     | 3 ++-
 .../tests/yang_model_tests/tests_config/dhcp_server.json    | 6 ++++++
 src/sonic-yang-models/yang-models/sonic-dhcp-server.yang    | 2 +-
 3 files changed, 9 insertions(+), 2 deletions(-)

diff --git a/src/sonic-yang-models/tests/files/sample_config_db.json b/src/sonic-yang-models/tests/files/sample_config_db.json
index 71c957a54..9dc0b75e0 100644
--- a/src/sonic-yang-models/tests/files/sample_config_db.json
+++ b/src/sonic-yang-models/tests/files/sample_config_db.json
@@ -7,7 +7,8 @@
         },
         "DHCP_SERVER": {
             "192.0.0.8": {},
-            "192.0.0.8": {}
+            "192.0.0.8": {},
+            "2603:10e1:0:6f4::1": {}
         },
         "DNS_NAMESERVER": {
             "1.1.1.1": {},
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/dhcp_server.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/dhcp_server.json
index 9fb7ccce9..36bf89af1 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/dhcp_server.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/dhcp_server.json
@@ -8,6 +8,12 @@
                     },
                     {
                         "ip": "10.1.9.2"
+                    },
+                    {
+                        "ip": "2603:10e1:0:6f4::1"
+                    },
+                    {
+                        "ip": "2603:10e1:0:6f5::1"
                     }
                 ]
             }
diff --git a/src/sonic-yang-models/yang-models/sonic-dhcp-server.yang b/src/sonic-yang-models/yang-models/sonic-dhcp-server.yang
index 0ca5e8636..5f5039ae2 100644
--- a/src/sonic-yang-models/yang-models/sonic-dhcp-server.yang
+++ b/src/sonic-yang-models/yang-models/sonic-dhcp-server.yang
@@ -40,7 +40,7 @@ module sonic-dhcp-server {
 
                 leaf ip {
                     description "IP as DHCP_SERVER";
-                    type inet:ipv4-address;
+                    type inet:ip-address;
                 }
 
             } /* end of list IPS_LIST */

From 1e6b1b57a40aac0e1a1e160e4e7392f28656589f Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Wed, 8 May 2024 19:01:04 +0800
Subject: [PATCH 0537/1115] [submodule] Update submodule sonic-swss-common to
 the latest HEAD automatically (#18903)

#### Why I did it
src/sonic-swss-common
```
* 4b23970 - (HEAD -> master, origin/master, origin/HEAD) [Banner] Added BANNER_MESSAGE table to ConfigDB (#826) (16 hours ago) [SviatoslavBoichuk]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-swss-common | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-swss-common b/src/sonic-swss-common
index 5a737927d..4b23970a0 160000
--- a/src/sonic-swss-common
+++ b/src/sonic-swss-common
@@ -1 +1 @@
-Subproject commit 5a737927d3fb5763eba2f8b4cdcb89d43590c8df
+Subproject commit 4b23970a0bc30ef66ff6825182a29886d9b253a6

From 485d9e9c0a39af96e29f6391dc6f480b17b1b4fa Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Wed, 8 May 2024 19:01:09 +0800
Subject: [PATCH 0538/1115] [submodule] Update submodule sonic-swss to the
 latest HEAD automatically (#18901)

#### Why I did it
src/sonic-swss
```
* 837e4675 - (HEAD -> master, origin/master, origin/HEAD) Remove unwanted newline character at end of timestamp (#3111) (10 hours ago) [arista-nwolfe]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-swss | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-swss b/src/sonic-swss
index 2e6c5b209..837e46757 160000
--- a/src/sonic-swss
+++ b/src/sonic-swss
@@ -1 +1 @@
-Subproject commit 2e6c5b209d575f73b867de9f3e56b3be4066acec
+Subproject commit 837e46757756dc07fd5840678fa73e8c27abaf20

From aeaa17da0bcec6c6ffe5a62ac1cf77a46a8f8906 Mon Sep 17 00:00:00 2001
From: jingwenxie <jingwenxie@microsoft.com>
Date: Thu, 9 May 2024 12:19:52 +0800
Subject: [PATCH 0539/1115] [rsyslog] Include high-precision rfc3339 timestamps
 in messages from rsyslog (#18699)

#### Why I did it
Include high-precision rfc3339 timestamps in forwarded messages from rsyslog
#### How I did it
Create new template for rsyslog that better for kusto to parse with millisec.
Before:
`<13>Sep 14 22:24:43 PHX70-0101-1019-04T0 pmon#CCmisApi: forwarding state RPC received response port = Ethernet16 portids [0, 1] read_side 1`
After:
`<12>2023-09-14T22:25:03.853194+00:00 PHX70-0101-1019-04T0 WARNING pmon#CCmisApi: Could not retreive fieldvalue pairs for Ethernet24, inside config_db table MUX_CABLE`
#### How to verify it
Add unit test.

Manual test: create syslog server using CLI/adding to Redis-DB
verify server is added to file /etc/rsyslog.conf and server is functional.
---
 files/image_config/rsyslog/rsyslog.conf.j2    |   6 +-
 .../tests/data/rsyslog/config_db.json         | 914 ++++++++++++++++++
 src/sonic-config-engine/tests/test_j2files.py |  16 +
 3 files changed, 934 insertions(+), 2 deletions(-)
 create mode 100644 src/sonic-config-engine/tests/data/rsyslog/config_db.json

diff --git a/files/image_config/rsyslog/rsyslog.conf.j2 b/files/image_config/rsyslog/rsyslog.conf.j2
index f6d480494..52096784c 100644
--- a/files/image_config/rsyslog/rsyslog.conf.j2
+++ b/files/image_config/rsyslog/rsyslog.conf.j2
@@ -53,6 +53,8 @@ $UDPServerRun 514
 # Define a custom template
 $template SONiCFileFormat,"%timegenerated%.%timegenerated:::date-subseconds% %HOSTNAME% %syslogseverity-text:::uppercase% %syslogtag%%msg:::sp-if-no-1st-sp%%msg:::drop-last-lf%\n"
 $ActionFileDefaultTemplate SONiCFileFormat
+$template SONiCForwardFormat,"<%PRI%>%TIMESTAMP:::date-rfc3339% %HOSTNAME% %syslogseverity-text:::uppercase% %syslogtag%%msg:::sp-if-no-1st-sp%%msg:::drop-last-lf%\n"
+$ActionForwardDefaultTemplate SONiCForwardFormat
 
 template(name="WelfRemoteFormat" type="string" string="%TIMESTAMP% id=firewall time=\"%timereported\
 :::date-year%-%timereported:::date-month%-%timereported:::date-day% %timereported:::date-hour%:%timereported:::date-minute%:%timereported\
@@ -102,13 +104,13 @@ $RepeatedMsgReduction on
 {% set port = conf.get('port', 514) -%}
 {% set proto = conf.get('protocol', 'udp') -%}
 {% set vrf = conf.get('vrf', 'default') -%}
-{% set severity = conf.get('severity', gconf.get('severity', 'notice')) -%}
+{% set severity = conf.get('severity', gconf.get('severity', '*')) -%}
 {% set filter = conf.get('filter') -%}
 {% set regex = conf.get('filter_regex') -%}
 
 {% set fmodifier = '!' if filter == 'exclude' else '' %}
 {% set device = vrf if vrf != '' and vrf != 'default' -%}
-{% set template = 'WelfRemoteFormat' if format == 'welf' else 'SONiCFileFormat' -%}
+{% set template = 'WelfRemoteFormat' if format == 'welf' else 'SONiCForwardFormat' -%}
 
 {# Server extra options -#}
 {% set options = '' -%}
diff --git a/src/sonic-config-engine/tests/data/rsyslog/config_db.json b/src/sonic-config-engine/tests/data/rsyslog/config_db.json
new file mode 100644
index 000000000..74f7f8ecb
--- /dev/null
+++ b/src/sonic-config-engine/tests/data/rsyslog/config_db.json
@@ -0,0 +1,914 @@
+{
+    "AUTO_TECHSUPPORT_FEATURE": {
+        "acms": {
+            "available_mem_threshold": "10.0",
+            "rate_limit_interval": "600",
+            "state": "enabled"
+        },
+        "bgp": {
+            "available_mem_threshold": "10.0",
+            "rate_limit_interval": "600",
+            "state": "enabled"
+        },
+        "database": {
+            "available_mem_threshold": "10.0",
+            "rate_limit_interval": "600",
+            "state": "enabled"
+        },
+        "dhcp_relay": {
+            "available_mem_threshold": "10.0",
+            "rate_limit_interval": "600",
+            "state": "enabled"
+        },
+        "lldp": {
+            "available_mem_threshold": "10.0",
+            "rate_limit_interval": "600",
+            "state": "enabled"
+        },
+        "macsec": {
+            "available_mem_threshold": "10.0",
+            "rate_limit_interval": "600",
+            "state": "enabled"
+        },
+        "mux": {
+            "available_mem_threshold": "10.0",
+            "rate_limit_interval": "600",
+            "state": "enabled"
+        },
+        "pmon": {
+            "available_mem_threshold": "10.0",
+            "rate_limit_interval": "600",
+            "state": "enabled"
+        },
+        "radv": {
+            "available_mem_threshold": "10.0",
+            "rate_limit_interval": "600",
+            "state": "enabled"
+        },
+        "restapi": {
+            "available_mem_threshold": "10.0",
+            "rate_limit_interval": "600",
+            "state": "enabled"
+        },
+        "snmp": {
+            "available_mem_threshold": "10.0",
+            "rate_limit_interval": "600",
+            "state": "enabled"
+        },
+        "swss": {
+            "available_mem_threshold": "10.0",
+            "rate_limit_interval": "600",
+            "state": "enabled"
+        },
+        "syncd": {
+            "available_mem_threshold": "10.0",
+            "rate_limit_interval": "600",
+            "state": "enabled"
+        },
+        "teamd": {
+            "available_mem_threshold": "10.0",
+            "rate_limit_interval": "600",
+            "state": "enabled"
+        },
+        "telemetry": {
+            "available_mem_threshold": "10.0",
+            "rate_limit_interval": "600",
+            "state": "enabled"
+        },
+        "vnet-monitor": {
+            "available_mem_threshold": "10.0",
+            "rate_limit_interval": "600",
+            "state": "enabled"
+        }
+    },
+    "BGP_NEIGHBOR": {
+        "10.0.0.57": {
+            "admin_status": "up",
+            "asn": "64600",
+            "holdtime": "10",
+            "keepalive": "3",
+            "local_addr": "10.0.0.56",
+            "name": "ARISTA01T1",
+            "nhopself": "0",
+            "rrclient": "0"
+        },
+        "10.0.0.59": {
+            "admin_status": "up",
+            "asn": "64600",
+            "holdtime": "10",
+            "keepalive": "3",
+            "local_addr": "10.0.0.58",
+            "name": "ARISTA02T1",
+            "nhopself": "0",
+            "rrclient": "0"
+        },
+        "10.0.0.61": {
+            "admin_status": "up",
+            "asn": "64600",
+            "holdtime": "10",
+            "keepalive": "3",
+            "local_addr": "10.0.0.60",
+            "name": "ARISTA03T1",
+            "nhopself": "0",
+            "rrclient": "0"
+        },
+        "10.0.0.63": {
+            "admin_status": "up",
+            "asn": "64600",
+            "holdtime": "10",
+            "keepalive": "3",
+            "local_addr": "10.0.0.62",
+            "name": "ARISTA04T1",
+            "nhopself": "0",
+            "rrclient": "0"
+        },
+        "fc00::7a": {
+            "admin_status": "up",
+            "asn": "64600",
+            "holdtime": "10",
+            "keepalive": "3",
+            "local_addr": "fc00::79",
+            "name": "ARISTA03T1",
+            "nhopself": "0",
+            "rrclient": "0"
+        },
+        "fc00::7e": {
+            "admin_status": "up",
+            "asn": "64600",
+            "holdtime": "10",
+            "keepalive": "3",
+            "local_addr": "fc00::7d",
+            "name": "ARISTA04T1",
+            "nhopself": "0",
+            "rrclient": "0"
+        },
+        "fc00::72": {
+            "admin_status": "up",
+            "asn": "64600",
+            "holdtime": "10",
+            "keepalive": "3",
+            "local_addr": "fc00::71",
+            "name": "ARISTA01T1",
+            "nhopself": "0",
+            "rrclient": "0"
+        },
+        "fc00::76": {
+            "admin_status": "up",
+            "asn": "64600",
+            "holdtime": "10",
+            "keepalive": "3",
+            "local_addr": "fc00::75",
+            "name": "ARISTA02T1",
+            "nhopself": "0",
+            "rrclient": "0"
+        }
+    },
+    "CONSOLE_SWITCH": {
+        "console_mgmt": {
+            "enabled": "no"
+        }
+    },
+    "DEVICE_METADATA": {
+        "localhost": {
+            "bgp_asn": "65100",
+            "buffer_model": "traditional",
+            "cloudtype": "Public",
+            "default_bgp_status": "down",
+            "default_pfcwd_status": "enable",
+            "deployment_id": "1",
+            "docker_routing_config_mode": "separated",
+            "hostname": "kvm-host",
+            "hwsku": "Mellanox-SN2700",
+            "mac": "98:03:9B:F6:02:80",
+            "platform": "x86_64-mlnx_msn2700-r0",
+            "region": "None",
+            "synchronous_mode": "enable",
+            "type": "ToRRouter"
+        }
+    },
+    "DEVICE_NEIGHBOR": {
+        "Ethernet112": {
+            "name": "ARISTA01T1",
+            "port": "Ethernet1"
+        },
+        "Ethernet116": {
+            "name": "ARISTA02T1",
+            "port": "Ethernet1"
+        },
+        "Ethernet120": {
+            "name": "ARISTA03T1",
+            "port": "Ethernet1"
+        },
+        "Ethernet124": {
+            "name": "ARISTA04T1",
+            "port": "Ethernet1"
+        }
+    },
+    "DEVICE_NEIGHBOR_METADATA": {
+        "ARISTA01T1": {
+            "hwsku": "Arista-VM",
+            "mgmt_addr": "172.16.190.114",
+            "type": "LeafRouter"
+        },
+        "ARISTA02T1": {
+            "hwsku": "Arista-VM",
+            "mgmt_addr": "172.16.190.115",
+            "type": "LeafRouter"
+        },
+        "ARISTA03T1": {
+            "hwsku": "Arista-VM",
+            "mgmt_addr": "172.16.190.116",
+            "type": "LeafRouter"
+        },
+        "ARISTA04T1": {
+            "hwsku": "Arista-VM",
+            "mgmt_addr": "172.16.190.117",
+            "type": "LeafRouter"
+        }
+    },
+    "DHCP_RELAY": {
+        "Vlan1000": {
+            "dhcpv6_servers": [
+                "fc02:2000::1",
+                "fc02:2000::2",
+                "fc02:2000::3",
+                "fc02:2000::4"
+            ]
+        }
+    },
+    "DHCP_SERVER": {
+        "192.0.0.1": {},
+        "192.0.0.2": {},
+        "192.0.0.3": {},
+        "192.0.0.4": {}
+    },
+    "FEATURE": {
+        "acms": {
+            "auto_restart": "enabled",
+            "has_global_scope": "True",
+            "has_per_asic_scope": "False",
+            "delayed": "False",
+            "high_mem_alert": "disabled",
+            "set_owner": "local",
+            "state": "enabled"
+        },
+        "bgp": {
+            "auto_restart": "enabled",
+            "check_up_status": "false",
+            "has_global_scope": "False",
+            "has_per_asic_scope": "True",
+            "delayed": "False",
+            "high_mem_alert": "disabled",
+            "set_owner": "local",
+            "state": "enabled"
+        },
+        "database": {
+            "auto_restart": "always_enabled",
+            "has_global_scope": "True",
+            "has_per_asic_scope": "True",
+            "delayed": "False",
+            "high_mem_alert": "disabled",
+            "set_owner": "local",
+            "state": "always_enabled"
+        },
+        "dhcp_relay": {
+            "auto_restart": "enabled",
+            "has_global_scope": "True",
+            "has_per_asic_scope": "False",
+            "delayed": "False",
+            "high_mem_alert": "disabled",
+            "set_owner": "local",
+            "state": "enabled"
+        },
+        "lldp": {
+            "auto_restart": "enabled",
+            "has_global_scope": "True",
+            "has_per_asic_scope": "True",
+            "delayed": "True",
+            "high_mem_alert": "disabled",
+            "set_owner": "kube",
+            "state": "enabled"
+        },
+        "macsec": {
+            "auto_restart": "enabled",
+            "has_global_scope": "False",
+            "has_per_asic_scope": "True",
+            "delayed": "False",
+            "high_mem_alert": "disabled",
+            "set_owner": "local",
+            "state": "disabled"
+        },
+        "mux": {
+            "auto_restart": "enabled",
+            "has_global_scope": "True",
+            "has_per_asic_scope": "False",
+            "delayed": "False",
+            "high_mem_alert": "disabled",
+            "set_owner": "local",
+            "state": "always_disabled"
+        },
+        "pmon": {
+            "auto_restart": "enabled",
+            "check_up_status": "false",
+            "has_global_scope": "True",
+            "has_per_asic_scope": "False",
+            "delayed": "True",
+            "high_mem_alert": "disabled",
+            "set_owner": "kube",
+            "state": "enabled"
+        },
+        "radv": {
+            "auto_restart": "enabled",
+            "has_global_scope": "True",
+            "has_per_asic_scope": "False",
+            "delayed": "False",
+            "high_mem_alert": "disabled",
+            "set_owner": "kube",
+            "state": "enabled"
+        },
+        "restapi": {
+            "auto_restart": "enabled",
+            "has_global_scope": "True",
+            "has_per_asic_scope": "False",
+            "delayed": "False",
+            "high_mem_alert": "disabled",
+            "set_owner": "local",
+            "state": "enabled"
+        },
+        "snmp": {
+            "auto_restart": "enabled",
+            "has_global_scope": "True",
+            "has_per_asic_scope": "False",
+            "delayed": "True",
+            "high_mem_alert": "disabled",
+            "set_owner": "kube",
+            "state": "enabled"
+        },
+        "swss": {
+            "auto_restart": "enabled",
+            "check_up_status": "false",
+            "has_global_scope": "False",
+            "has_per_asic_scope": "True",
+            "delayed": "False",
+            "high_mem_alert": "disabled",
+            "set_owner": "local",
+            "state": "enabled"
+        },
+        "syncd": {
+            "auto_restart": "enabled",
+            "has_global_scope": "False",
+            "has_per_asic_scope": "True",
+            "delayed": "False",
+            "high_mem_alert": "disabled",
+            "set_owner": "local",
+            "state": "enabled"
+        },
+        "teamd": {
+            "auto_restart": "enabled",
+            "has_global_scope": "False",
+            "has_per_asic_scope": "True",
+            "delayed": "False",
+            "high_mem_alert": "disabled",
+            "set_owner": "local",
+            "state": "enabled"
+        },
+        "telemetry": {
+            "auto_restart": "enabled",
+            "has_global_scope": "True",
+            "has_per_asic_scope": "False",
+            "delayed": "True",
+            "high_mem_alert": "disabled",
+            "set_owner": "kube",
+            "state": "enabled"
+        },
+        "vnet-monitor": {
+            "auto_restart": "enabled",
+            "has_global_scope": "True",
+            "has_per_asic_scope": "False",
+            "delayed": "False",
+            "high_mem_alert": "disabled",
+            "set_owner": "local",
+            "state": "disabled"
+        }
+    },
+    "FLEX_COUNTER_TABLE": {
+        "ACL": {
+            "FLEX_COUNTER_DELAY_STATUS": "false",
+            "FLEX_COUNTER_STATUS": "enable",
+            "POLL_INTERVAL": "10000"
+        }
+    },
+    "KDUMP": {
+        "config": {
+            "enabled": "false",
+            "memory": "0M-2G:256M,2G-4G:320M,4G-8G:384M,8G-:448M",
+            "num_dumps": "3"
+        }
+    },
+    "LOOPBACK_INTERFACE": {
+        "Loopback0": {},
+        "Loopback0|10.1.0.32/32": {},
+        "Loopback0|FC00:1::32/128": {}
+    },
+    "MGMT_INTERFACE": {
+        "eth0|10.150.22.115/23": {
+            "gwaddr": "10.150.22.1"
+        },
+        "eth0|2404:f801:10:2200::a96:1673/64": {
+            "gwaddr": "2404:f801:10:2200::1"
+        }
+    },
+    "MGMT_PORT": {
+        "eth0": {
+            "admin_status": "up",
+            "alias": "eth0"
+        }
+    },
+    "PORT": {
+        "Ethernet0": {
+            "alias": "etp1",
+            "description": "etp1",
+            "fec": "rs",
+            "index": "1",
+            "lanes": "0,1,2,3",
+            "mtu": "9100",
+            "pfc_asym": "off",
+            "speed": "100000",
+            "tpid": "0x8100"
+        },
+        "Ethernet4": {
+            "admin_status": "up",
+            "alias": "etp2",
+            "description": "Servers0:eth0",
+            "fec": "rs",
+            "index": "2",
+            "lanes": "4,5,6,7",
+            "mtu": "9100",
+            "pfc_asym": "off",
+            "speed": "100000",
+            "tpid": "0x8100"
+        },
+        "Ethernet8": {
+            "admin_status": "up",
+            "alias": "etp3",
+            "description": "Servers1:eth0",
+            "fec": "rs",
+            "index": "3",
+            "lanes": "8,9,10,11",
+            "mtu": "9100",
+            "pfc_asym": "off",
+            "speed": "100000",
+            "tpid": "0x8100"
+        },
+        "Ethernet12": {
+            "admin_status": "up",
+            "alias": "etp4",
+            "description": "Servers2:eth0",
+            "fec": "rs",
+            "index": "4",
+            "lanes": "12,13,14,15",
+            "mtu": "9100",
+            "pfc_asym": "off",
+            "speed": "100000",
+            "tpid": "0x8100"
+        },
+        "Ethernet16": {
+            "admin_status": "up",
+            "alias": "etp5",
+            "description": "Servers3:eth0",
+            "fec": "rs",
+            "index": "5",
+            "lanes": "16,17,18,19",
+            "mtu": "9100",
+            "pfc_asym": "off",
+            "speed": "100000",
+            "tpid": "0x8100"
+        },
+        "Ethernet20": {
+            "admin_status": "up",
+            "alias": "etp6",
+            "description": "Servers4:eth0",
+            "fec": "rs",
+            "index": "6",
+            "lanes": "20,21,22,23",
+            "mtu": "9100",
+            "pfc_asym": "off",
+            "speed": "100000",
+            "tpid": "0x8100"
+        },
+        "Ethernet24": {
+            "admin_status": "up",
+            "alias": "etp7",
+            "description": "Servers5:eth0",
+            "fec": "rs",
+            "index": "7",
+            "lanes": "24,25,26,27",
+            "mtu": "9100",
+            "pfc_asym": "off",
+            "speed": "100000",
+            "tpid": "0x8100"
+        },
+        "Ethernet28": {
+            "admin_status": "up",
+            "alias": "etp8",
+            "description": "Servers6:eth0",
+            "fec": "rs",
+            "index": "8",
+            "lanes": "28,29,30,31",
+            "mtu": "9100",
+            "pfc_asym": "off",
+            "speed": "100000",
+            "tpid": "0x8100"
+        },
+        "Ethernet32": {
+            "admin_status": "up",
+            "alias": "etp9",
+            "description": "Servers7:eth0",
+            "fec": "rs",
+            "index": "9",
+            "lanes": "32,33,34,35",
+            "mtu": "9100",
+            "pfc_asym": "off",
+            "speed": "100000",
+            "tpid": "0x8100"
+        },
+        "Ethernet36": {
+            "admin_status": "up",
+            "alias": "etp10",
+            "description": "Servers8:eth0",
+            "fec": "rs",
+            "index": "10",
+            "lanes": "36,37,38,39",
+            "mtu": "9100",
+            "pfc_asym": "off",
+            "speed": "100000",
+            "tpid": "0x8100"
+        },
+        "Ethernet40": {
+            "admin_status": "up",
+            "alias": "etp11",
+            "description": "Servers9:eth0",
+            "fec": "rs",
+            "index": "11",
+            "lanes": "40,41,42,43",
+            "mtu": "9100",
+            "pfc_asym": "off",
+            "speed": "100000",
+            "tpid": "0x8100"
+        },
+        "Ethernet44": {
+            "admin_status": "up",
+            "alias": "etp12",
+            "description": "Servers10:eth0",
+            "fec": "rs",
+            "index": "12",
+            "lanes": "44,45,46,47",
+            "mtu": "9100",
+            "pfc_asym": "off",
+            "speed": "100000",
+            "tpid": "0x8100"
+        },
+        "Ethernet48": {
+            "admin_status": "up",
+            "alias": "etp13",
+            "description": "Servers11:eth0",
+            "fec": "rs",
+            "index": "13",
+            "lanes": "48,49,50,51",
+            "mtu": "9100",
+            "pfc_asym": "off",
+            "speed": "100000",
+            "tpid": "0x8100"
+        },
+        "Ethernet52": {
+            "admin_status": "up",
+            "alias": "etp14",
+            "description": "Servers12:eth0",
+            "fec": "rs",
+            "index": "14",
+            "lanes": "52,53,54,55",
+            "mtu": "9100",
+            "pfc_asym": "off",
+            "speed": "100000",
+            "tpid": "0x8100"
+        },
+        "Ethernet56": {
+            "admin_status": "up",
+            "alias": "etp15",
+            "description": "Servers13:eth0",
+            "fec": "rs",
+            "index": "15",
+            "lanes": "56,57,58,59",
+            "mtu": "9100",
+            "pfc_asym": "off",
+            "speed": "100000",
+            "tpid": "0x8100"
+        },
+        "Ethernet60": {
+            "admin_status": "up",
+            "alias": "etp16",
+            "description": "Servers14:eth0",
+            "fec": "rs",
+            "index": "16",
+            "lanes": "60,61,62,63",
+            "mtu": "9100",
+            "pfc_asym": "off",
+            "speed": "100000",
+            "tpid": "0x8100"
+        },
+        "Ethernet64": {
+            "admin_status": "up",
+            "alias": "etp17",
+            "description": "Servers15:eth0",
+            "fec": "rs",
+            "index": "17",
+            "lanes": "64,65,66,67",
+            "mtu": "9100",
+            "pfc_asym": "off",
+            "speed": "100000",
+            "tpid": "0x8100"
+        },
+        "Ethernet68": {
+            "admin_status": "up",
+            "alias": "etp18",
+            "description": "Servers16:eth0",
+            "fec": "rs",
+            "index": "18",
+            "lanes": "68,69,70,71",
+            "mtu": "9100",
+            "pfc_asym": "off",
+            "speed": "100000",
+            "tpid": "0x8100"
+        },
+        "Ethernet72": {
+            "admin_status": "up",
+            "alias": "etp19",
+            "description": "Servers17:eth0",
+            "fec": "rs",
+            "index": "19",
+            "lanes": "72,73,74,75",
+            "mtu": "9100",
+            "pfc_asym": "off",
+            "speed": "100000",
+            "tpid": "0x8100"
+        },
+        "Ethernet76": {
+            "admin_status": "up",
+            "alias": "etp20",
+            "description": "Servers18:eth0",
+            "fec": "rs",
+            "index": "20",
+            "lanes": "76,77,78,79",
+            "mtu": "9100",
+            "pfc_asym": "off",
+            "speed": "100000",
+            "tpid": "0x8100"
+        },
+        "Ethernet80": {
+            "admin_status": "up",
+            "alias": "etp21",
+            "description": "Servers19:eth0",
+            "fec": "rs",
+            "index": "21",
+            "lanes": "80,81,82,83",
+            "mtu": "9100",
+            "pfc_asym": "off",
+            "speed": "100000",
+            "tpid": "0x8100"
+        },
+        "Ethernet84": {
+            "admin_status": "up",
+            "alias": "etp22",
+            "description": "Servers20:eth0",
+            "fec": "rs",
+            "index": "22",
+            "lanes": "84,85,86,87",
+            "mtu": "9100",
+            "pfc_asym": "off",
+            "speed": "100000",
+            "tpid": "0x8100"
+        },
+        "Ethernet88": {
+            "admin_status": "up",
+            "alias": "etp23",
+            "description": "Servers21:eth0",
+            "fec": "rs",
+            "index": "23",
+            "lanes": "88,89,90,91",
+            "mtu": "9100",
+            "pfc_asym": "off",
+            "speed": "100000",
+            "tpid": "0x8100"
+        },
+        "Ethernet92": {
+            "admin_status": "up",
+            "alias": "etp24",
+            "description": "Servers22:eth0",
+            "fec": "rs",
+            "index": "24",
+            "lanes": "92,93,94,95",
+            "mtu": "9100",
+            "pfc_asym": "off",
+            "speed": "100000",
+            "tpid": "0x8100"
+        },
+        "Ethernet96": {
+            "admin_status": "up",
+            "alias": "etp25",
+            "description": "Servers23:eth0",
+            "fec": "rs",
+            "index": "25",
+            "lanes": "96,97,98,99",
+            "mtu": "9100",
+            "pfc_asym": "off",
+            "speed": "100000",
+            "tpid": "0x8100"
+        },
+        "Ethernet100": {
+            "alias": "etp26",
+            "description": "etp26",
+            "fec": "rs",
+            "index": "26",
+            "lanes": "100,101,102,103",
+            "mtu": "9100",
+            "pfc_asym": "off",
+            "speed": "100000",
+            "tpid": "0x8100"
+        },
+        "Ethernet104": {
+            "alias": "etp27",
+            "description": "etp27",
+            "fec": "rs",
+            "index": "27",
+            "lanes": "104,105,106,107",
+            "mtu": "9100",
+            "pfc_asym": "off",
+            "speed": "100000",
+            "tpid": "0x8100"
+        },
+        "Ethernet108": {
+            "alias": "etp28",
+            "description": "etp28",
+            "fec": "rs",
+            "index": "28",
+            "lanes": "108,109,110,111",
+            "mtu": "9100",
+            "pfc_asym": "off",
+            "speed": "100000",
+            "tpid": "0x8100"
+        },
+        "Ethernet112": {
+            "admin_status": "up",
+            "alias": "etp29",
+            "description": "ARISTA01T1:Ethernet1",
+            "fec": "rs",
+            "index": "29",
+            "lanes": "112,113,114,115",
+            "mtu": "9100",
+            "pfc_asym": "off",
+            "speed": "100000",
+            "tpid": "0x8100"
+        },
+        "Ethernet116": {
+            "admin_status": "up",
+            "alias": "etp30",
+            "description": "ARISTA02T1:Ethernet1",
+            "fec": "rs",
+            "index": "30",
+            "lanes": "116,117,118,119",
+            "mtu": "9100",
+            "pfc_asym": "off",
+            "speed": "100000",
+            "tpid": "0x8100"
+        },
+        "Ethernet120": {
+            "admin_status": "up",
+            "alias": "etp31",
+            "description": "ARISTA03T1:Ethernet1",
+            "fec": "rs",
+            "index": "31",
+            "lanes": "120,121,122,123",
+            "mtu": "9100",
+            "pfc_asym": "off",
+            "speed": "100000",
+            "tpid": "0x8100"
+        },
+        "Ethernet124": {
+            "admin_status": "up",
+            "alias": "etp32",
+            "description": "ARISTA04T1:Ethernet1",
+            "fec": "rs",
+            "index": "32",
+            "lanes": "124,125,126,127",
+            "mtu": "9100",
+            "pfc_asym": "off",
+            "speed": "100000",
+            "tpid": "0x8100"
+        }
+    },
+    "PORTCHANNEL": {
+        "PortChannel101": {
+            "admin_status": "up",
+            "lacp_key": "auto",
+            "min_links": "1",
+            "mtu": "9100",
+            "tpid": "0x8100"
+        },
+        "PortChannel102": {
+            "admin_status": "up",
+            "lacp_key": "auto",
+            "min_links": "1",
+            "mtu": "9100",
+            "tpid": "0x8100"
+        },
+        "PortChannel103": {
+            "admin_status": "up",
+            "lacp_key": "auto",
+            "min_links": "1",
+            "mtu": "9100",
+            "tpid": "0x8100"
+        },
+        "PortChannel104": {
+            "admin_status": "up",
+            "lacp_key": "auto",
+            "min_links": "1",
+            "mtu": "9100",
+            "tpid": "0x8100"
+        }
+    },
+    "PORTCHANNEL_INTERFACE": {
+        "PortChannel101": {},
+        "PortChannel101|10.0.0.56/31": {},
+        "PortChannel101|FC00::71/126": {},
+        "PortChannel102": {},
+        "PortChannel102|10.0.0.58/31": {},
+        "PortChannel102|FC00::75/126": {},
+        "PortChannel103": {},
+        "PortChannel103|10.0.0.60/31": {},
+        "PortChannel103|FC00::79/126": {},
+        "PortChannel104": {},
+        "PortChannel104|10.0.0.62/31": {},
+        "PortChannel104|FC00::7D/126": {}
+    },
+    "PORTCHANNEL_MEMBER": {
+        "PortChannel101|Ethernet112": {},
+        "PortChannel102|Ethernet116": {},
+        "PortChannel103|Ethernet120": {},
+        "PortChannel104|Ethernet124": {}
+    },
+    "SNMP": {
+        "LOCATION": {
+            "Location": "public"
+        }
+    },
+    "SNMP_COMMUNITY": {
+        "public": {
+            "TYPE": "RO"
+        }
+    },
+    "SYSLOG_SERVER": {
+        "10.150.22.222": {}
+    },
+    "VERSIONS": {
+        "DATABASE": {
+            "VERSION": "version_3_0_7"
+        }
+    },
+    "VLAN": {
+        "Vlan1000": {
+            "dhcp_servers": [
+                "192.0.0.1",
+                "192.0.0.2",
+                "192.0.0.3",
+                "192.0.0.4"
+            ],
+            "dhcpv6_servers": [
+                "fc02:2000::1",
+                "fc02:2000::2",
+                "fc02:2000::3",
+                "fc02:2000::4"
+            ],
+            "vlanid": "1000"
+        }
+    },
+    "VLAN_INTERFACE": {
+        "Vlan1000": {},
+        "Vlan1000|192.168.0.1/21": {},
+        "Vlan1000|fc02:1000::1/64": {}
+    },
+    "VLAN_MEMBER": {
+        "Vlan1000|Ethernet4": {
+            "tagging_mode": "untagged"
+        },
+        "Vlan1000|Ethernet8": {
+            "tagging_mode": "untagged"
+        },
+        "Vlan1000|Ethernet12": {
+            "tagging_mode": "untagged"
+        },
+        "Vlan1000|Ethernet16": {
+            "tagging_mode": "untagged"
+        }
+    }
+}
+
diff --git a/src/sonic-config-engine/tests/test_j2files.py b/src/sonic-config-engine/tests/test_j2files.py
index 49b4a1d00..b83926d4c 100644
--- a/src/sonic-config-engine/tests/test_j2files.py
+++ b/src/sonic-config-engine/tests/test_j2files.py
@@ -2,6 +2,7 @@
 import os
 import shutil
 import subprocess
+import re
 
 from unittest import TestCase
 import tests.common_utils as utils
@@ -744,6 +745,21 @@ def test_dns_template_render(self):
     def test_buffers_edgezone_aggregator_render_template(self):
         self._test_buffers_render_template('arista', 'x86_64-arista_7060_cx32s', 'Arista-7060CX-32S-D48C8', 'sample-arista-7060-t0-minigraph.xml', 'buffers.json.j2', 'buffer-arista7060-t0.json')
 
+    def test_rsyslog_conf(self):
+        if utils.PYvX_DIR != 'py3':
+            # Skip on python2 as the change will not be backported to previous version
+            return
+
+        conf_template = os.path.join(self.test_dir, '..', '..', '..', 'files', 'image_config', 'rsyslog', 'rsyslog.conf.j2')
+        config_db_json = os.path.join(self.test_dir, "data", "rsyslog", "config_db.json")
+        additional_data = "{\"udp_server_ip\": \"10.150.22.222\", \"hostname\": \"kvm-host\"}"
+
+        argument = ['-j', config_db_json, '-t', conf_template, '-a', additional_data]
+        self.run_script(argument, output_file=self.output_file)
+        with open(self.output_file) as file:
+            pattern = r'^action.*Device="eth0".*'
+            for line in file:
+                assert not bool(re.match(pattern, line.strip())), "eth0 is not allowed in Mgfx device"
 
     def tearDown(self):
         os.environ["CFGGEN_UNIT_TESTING"] = ""

From ed27daffa8add00895f44749b6e4c373535cd437 Mon Sep 17 00:00:00 2001
From: Pavan Naregundi <pnaregundi@marvell.com>
Date: Mon, 18 Mar 2024 11:04:34 +0000
Subject: [PATCH 0540/1115] Add support for rd98DX35xx platform

Add following variant of rd98DX35xx board to marvell platform build.

Board with external x86_64 CPU connected over PCI to 98DX35xx switching chip:
 Platform: x86_64-marvell_rd98DX35xx-r0
 HwSKU: rd98DX35xx
 ASIC: marvell
 Port Config: 32x1G + 16x2.5G + 6x25G

Signed-off-by: Pavan Naregundi <pnaregundi@marvell.com>
---
 platform/marvell/mrvl-prestera          | 2 +-
 platform/marvell/one-image.mk           | 2 ++
 platform/marvell/platform-marvell.mk    | 8 ++++++++
 platform/marvell/sonic-platform-marvell | 2 +-
 4 files changed, 12 insertions(+), 2 deletions(-)

diff --git a/platform/marvell/mrvl-prestera b/platform/marvell/mrvl-prestera
index b7a14a93b..5834b7338 160000
--- a/platform/marvell/mrvl-prestera
+++ b/platform/marvell/mrvl-prestera
@@ -1 +1 @@
-Subproject commit b7a14a93b21c099fab6b53f5fc4917ca0eb9b6c9
+Subproject commit 5834b7338ff9ac6f03d45ab85568048be1f62199
diff --git a/platform/marvell/one-image.mk b/platform/marvell/one-image.mk
index 155662aa6..d7faa90c2 100644
--- a/platform/marvell/one-image.mk
+++ b/platform/marvell/one-image.mk
@@ -16,6 +16,8 @@ $(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(NOKIA_7215_PLATFORM) \
 else ifeq ($(CONFIGURED_ARCH),armhf)
 $(SONIC_ONE_IMAGE)_INSTALLS += $(MRVL_PRESTERA_DEB)
 $(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(NOKIA_7215_PLATFORM)
+else ifeq ($(CONFIGURED_ARCH),amd64)
+$(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(AC5X_RD98DX35xx_PLATFORM)
 endif
 ifeq ($(INSTALL_DEBUG_TOOLS),y)
 $(SONIC_ONE_IMAGE)_DOCKERS += $(SONIC_INSTALL_DOCKER_DBG_IMAGES)
diff --git a/platform/marvell/platform-marvell.mk b/platform/marvell/platform-marvell.mk
index 9dffbf5e5..b58814f48 100644
--- a/platform/marvell/platform-marvell.mk
+++ b/platform/marvell/platform-marvell.mk
@@ -15,4 +15,12 @@ AC5X_RD98DX35xxCN9131_PLATFORM = sonic-platform-rd98dx35xx-cn9131_$(AC5X_RD98DX3
 $(AC5X_RD98DX35xxCN9131_PLATFORM)_PLATFORM = arm64-marvell_rd98DX35xx_cn9131-r0
 $(eval $(call add_extra_package,$(AC5X_RD98DX35xx_PLATFORM),$(AC5X_RD98DX35xxCN9131_PLATFORM)))
 
+else ifeq ($(CONFIGURED_ARCH),amd64)
+
+AC5X_RD98DX35xx_PLATFORM = sonic-platform-rd98dx35xx-x86_$(AC5X_RD98DX35xx_PLATFORM_MODULE_VERSION)_$(CONFIGURED_ARCH).deb
+$(AC5X_RD98DX35xx_PLATFORM)_SRC_PATH = $(PLATFORM_PATH)/sonic-platform-marvell
+$(AC5X_RD98DX35xx_PLATFORM)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON)
+$(AC5X_RD98DX35xx_PLATFORM)_PLATFORM = x86_64-marvell_rd98DX35xx-r0
+SONIC_DPKG_DEBS += $(AC5X_RD98DX35xx_PLATFORM)
+
 endif
diff --git a/platform/marvell/sonic-platform-marvell b/platform/marvell/sonic-platform-marvell
index 078a6fff3..be63e9c4b 160000
--- a/platform/marvell/sonic-platform-marvell
+++ b/platform/marvell/sonic-platform-marvell
@@ -1 +1 @@
-Subproject commit 078a6fff30f3af786aae1208588030a3fcfe0876
+Subproject commit be63e9c4b330fd5eabfc5c694fe0231cf25b4425

From 8ef597a4656ea0c648e1d33b21f06021539faca4 Mon Sep 17 00:00:00 2001
From: Pavan Naregundi <pnaregundi@marvell.com>
Date: Mon, 22 Apr 2024 03:52:08 +0000
Subject: [PATCH 0541/1115] Add support for falcon platforms

Add following three variant of Falcon DB board to marvell platform build.

Board with external x86_64 CPU connected over PCI to 98CX8580 switching chip:
 Platform: x86_64-marvell_db98cx8580_32cd-r0
 HwSKU: db98cx8580_32cd
 ASIC: marvell
 Port Config: 32x400G

Board with external x86_64 CPU connected over PCI to 98CX8540 switching chip:
 Platform: x86_64-marvell_db98cx8540_16cd-r0
 HwSKU: db98cx8540_16cd
 ASIC: marvell
 Port Config: 16x400G

Board with external x86_64 CPU connected over PCI to 98CX8514 switching chip:
 Platform: x86_64-marvell_db98cx8514_10cc-r0
 HwSKU: db98cx8514_10cc
 ASIC: marvell
 Port Config: 48x25G + 8x100G

Signed-off-by: Pavan Naregundi <pnaregundi@marvell.com>
---
 platform/marvell/one-image.mk        |  3 +++
 platform/marvell/platform-marvell.mk | 13 +++++++++++++
 2 files changed, 16 insertions(+)

diff --git a/platform/marvell/one-image.mk b/platform/marvell/one-image.mk
index d7faa90c2..b58a6179c 100644
--- a/platform/marvell/one-image.mk
+++ b/platform/marvell/one-image.mk
@@ -18,6 +18,9 @@ $(SONIC_ONE_IMAGE)_INSTALLS += $(MRVL_PRESTERA_DEB)
 $(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(NOKIA_7215_PLATFORM)
 else ifeq ($(CONFIGURED_ARCH),amd64)
 $(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(AC5X_RD98DX35xx_PLATFORM)
+$(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(FALCON_DB98CX8580_32CD_PLATFORM)
+$(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(FALCON_DB98CX8540_16CD_PLATFORM)
+$(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(FALCON_DB98CX8514_10CC_PLATFORM)
 endif
 ifeq ($(INSTALL_DEBUG_TOOLS),y)
 $(SONIC_ONE_IMAGE)_DOCKERS += $(SONIC_INSTALL_DOCKER_DBG_IMAGES)
diff --git a/platform/marvell/platform-marvell.mk b/platform/marvell/platform-marvell.mk
index b58814f48..c4f237757 100644
--- a/platform/marvell/platform-marvell.mk
+++ b/platform/marvell/platform-marvell.mk
@@ -2,6 +2,7 @@
 
 AC5X_RD98DX35xx_PLATFORM_MODULE_VERSION = 1.0
 AC5X_RD98DX35xxCN9131_PLATFORM_MODULE_VERSION = 1.0
+FALCON_PLATFORM_MODULE_VERSION = 1.0
 
 ifeq ($(CONFIGURED_ARCH),arm64)
 
@@ -23,4 +24,16 @@ $(AC5X_RD98DX35xx_PLATFORM)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON)
 $(AC5X_RD98DX35xx_PLATFORM)_PLATFORM = x86_64-marvell_rd98DX35xx-r0
 SONIC_DPKG_DEBS += $(AC5X_RD98DX35xx_PLATFORM)
 
+FALCON_DB98CX8580_32CD_PLATFORM = sonic-platform-db98cx8580-32cd_$(FALCON_PLATFORM_MODULE_VERSION)_$(CONFIGURED_ARCH).deb
+$(FALCON_DB98CX8580_32CD_PLATFORM)_PLATFORM = x86_64-marvell_db98cx8580_32cd-r0
+$(eval $(call add_extra_package,$(AC5X_RD98DX35xx_PLATFORM),$(FALCON_DB98CX8580_32CD_PLATFORM)))
+
+FALCON_DB98CX8540_16CD_PLATFORM = sonic-platform-db98cx8540-16cd_$(FALCON_PLATFORM_MODULE_VERSION)_$(CONFIGURED_ARCH).deb
+$(FALCON_DB98CX8540_16CD_PLATFORM)_PLATFORM = x86_64-marvell_db98cx8540_16cd-r0
+$(eval $(call add_extra_package,$(AC5X_RD98DX35xx_PLATFORM),$(FALCON_DB98CX8540_16CD_PLATFORM)))
+
+FALCON_DB98CX8514_10CC_PLATFORM = sonic-platform-db98cx8514-10cc_$(FALCON_PLATFORM_MODULE_VERSION)_$(CONFIGURED_ARCH).deb
+$(FALCON_DB98CX8514_10CC_PLATFORM)_PLATFORM = x86_64-marvell_db98cx8514_10cc-r0
+$(eval $(call add_extra_package,$(AC5X_RD98DX35xx_PLATFORM),$(FALCON_DB98CX8514_10CC_PLATFORM)))
+
 endif

From 74cb9a9a02249f968dfadc804a9948de876a6fb4 Mon Sep 17 00:00:00 2001
From: Pavan Naregundi <pnaregundi@marvell.com>
Date: Mon, 22 Apr 2024 04:28:05 +0000
Subject: [PATCH 0542/1115] HWSKU for x86_64-marvell_rd98DX35xx-r0

Signed-off-by: Pavan Naregundi <pnaregundi@marvell.com>
---
 .../x86_64-marvell_rd98DX35xx-r0/default_sku        |  1 +
 .../x86_64-marvell_rd98DX35xx-r0/installer.conf     |  1 +
 .../x86_64-marvell_rd98DX35xx-r0/platform_asic      |  1 +
 .../x86_64-marvell_rd98DX35xx-r0/plugins/eeprom.py  | 13 +++++++++++++
 .../pmon_daemon_control.json                        |  8 ++++++++
 .../marvell/x86_64-marvell_rd98DX35xx-r0/rd98DX35xx |  1 +
 .../system_health_monitoring_config.json            | 10 ++++++++++
 7 files changed, 35 insertions(+)
 create mode 100644 device/marvell/x86_64-marvell_rd98DX35xx-r0/default_sku
 create mode 100644 device/marvell/x86_64-marvell_rd98DX35xx-r0/installer.conf
 create mode 100644 device/marvell/x86_64-marvell_rd98DX35xx-r0/platform_asic
 create mode 100644 device/marvell/x86_64-marvell_rd98DX35xx-r0/plugins/eeprom.py
 create mode 100644 device/marvell/x86_64-marvell_rd98DX35xx-r0/pmon_daemon_control.json
 create mode 120000 device/marvell/x86_64-marvell_rd98DX35xx-r0/rd98DX35xx
 create mode 100644 device/marvell/x86_64-marvell_rd98DX35xx-r0/system_health_monitoring_config.json

diff --git a/device/marvell/x86_64-marvell_rd98DX35xx-r0/default_sku b/device/marvell/x86_64-marvell_rd98DX35xx-r0/default_sku
new file mode 100644
index 000000000..ce1567b48
--- /dev/null
+++ b/device/marvell/x86_64-marvell_rd98DX35xx-r0/default_sku
@@ -0,0 +1 @@
+rd98DX35xx t1
diff --git a/device/marvell/x86_64-marvell_rd98DX35xx-r0/installer.conf b/device/marvell/x86_64-marvell_rd98DX35xx-r0/installer.conf
new file mode 100644
index 000000000..c3c465bb9
--- /dev/null
+++ b/device/marvell/x86_64-marvell_rd98DX35xx-r0/installer.conf
@@ -0,0 +1 @@
+ONIE_PLATFORM_EXTRA_CMDLINE_LINUX=""
diff --git a/device/marvell/x86_64-marvell_rd98DX35xx-r0/platform_asic b/device/marvell/x86_64-marvell_rd98DX35xx-r0/platform_asic
new file mode 100644
index 000000000..a55475287
--- /dev/null
+++ b/device/marvell/x86_64-marvell_rd98DX35xx-r0/platform_asic
@@ -0,0 +1 @@
+marvell
diff --git a/device/marvell/x86_64-marvell_rd98DX35xx-r0/plugins/eeprom.py b/device/marvell/x86_64-marvell_rd98DX35xx-r0/plugins/eeprom.py
new file mode 100644
index 000000000..c99cf62da
--- /dev/null
+++ b/device/marvell/x86_64-marvell_rd98DX35xx-r0/plugins/eeprom.py
@@ -0,0 +1,13 @@
+#!/usr/bin/env python
+
+try:
+    from sonic_eeprom import eeprom_tlvinfo
+except ImportError as e:
+    raise ImportError (str(e) + "- required module not found")
+
+
+class board(eeprom_tlvinfo.TlvInfoDecoder):
+
+    def __init__(self, name, path, cpld_root, ro):
+        self.eeprom_path = "/sys/bus/i2c/devices/2-0050/eeprom"
+        super(board, self).__init__(self.eeprom_path, 0, '', True)
diff --git a/device/marvell/x86_64-marvell_rd98DX35xx-r0/pmon_daemon_control.json b/device/marvell/x86_64-marvell_rd98DX35xx-r0/pmon_daemon_control.json
new file mode 100644
index 000000000..39deb88be
--- /dev/null
+++ b/device/marvell/x86_64-marvell_rd98DX35xx-r0/pmon_daemon_control.json
@@ -0,0 +1,8 @@
+{
+    "skip_ledd": true,
+    "skip_pcied": true,
+    "skip_thermalctld": true,
+    "skip_psud": true,
+    "skip_xcvrd": true,
+    "skip_syseepromd": true
+}
diff --git a/device/marvell/x86_64-marvell_rd98DX35xx-r0/rd98DX35xx b/device/marvell/x86_64-marvell_rd98DX35xx-r0/rd98DX35xx
new file mode 120000
index 000000000..d241dbe47
--- /dev/null
+++ b/device/marvell/x86_64-marvell_rd98DX35xx-r0/rd98DX35xx
@@ -0,0 +1 @@
+../arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_rd98DX35xx-r0/system_health_monitoring_config.json b/device/marvell/x86_64-marvell_rd98DX35xx-r0/system_health_monitoring_config.json
new file mode 100644
index 000000000..79c17103b
--- /dev/null
+++ b/device/marvell/x86_64-marvell_rd98DX35xx-r0/system_health_monitoring_config.json
@@ -0,0 +1,10 @@
+{
+    "services_to_ignore": [],
+    "devices_to_ignore": [
+        "asic",
+        "psu.temperature",
+        "fan",
+        "psu"
+    ],
+    "user_defined_checkers": []
+}

From cbdebcf1556a40e5fa820c6ce8ae80610ab918ef Mon Sep 17 00:00:00 2001
From: Pavan Naregundi <pnaregundi@marvell.com>
Date: Mon, 22 Apr 2024 04:36:11 +0000
Subject: [PATCH 0543/1115] HWSKU for x86_64-marvell_db98cx8580_32cd-r0

Signed-off-by: Pavan Naregundi <pnaregundi@marvell.com>
---
 .../FALCON32X25G/ASK-Board-F12_8T_32x25G.md5  |    1 +
 .../FALCON32X25G/ASK-Board-F12_8T_32x25G.xml  | 3002 ++++++++++
 .../FALCON32X25G/ASK-L1-F12_8T_32x25G.md5     |    1 +
 .../FALCON32X25G/ASK-L1-F12_8T_32x25G.xml     | 1072 ++++
 .../FALCON32X25G/ASK-PP-F12_8T_32x25G.md5     |    1 +
 .../FALCON32X25G/ASK-PP-F12_8T_32x25G.xml     | 1180 ++++
 .../FALCON32X25G/SAI-F12_8T_32x25G.md5        |    1 +
 .../FALCON32X25G/SAI-F12_8T_32x25G.xml        |  401 ++
 .../FALCON32X25G/port_config.ini              |   68 +-
 .../FALCON32X25G/profile.ini                  |    1 -
 .../FALCON32X25G/sai.profile                  |    1 +
 .../FALCON32x400G/port_config.ini             |   34 -
 .../FALCON32x400G/profile.ini                 |    2 -
 .../FALCON32x400G/sai.profile                 |    3 -
 .../FALCON_DB/ASK-Board-F12_8T-DB.md5         |    1 +
 .../FALCON_DB/ASK-Board-F12_8T-DB.xml         | 4978 +++++++++++++++++
 .../FALCON_DB/ASK-L1-F12_8T-DB.md5            |    1 +
 .../FALCON_DB/ASK-L1-F12_8T-DB.xml            | 1962 +++++++
 .../FALCON_DB/ASK-PP-F12_8T-DB.md5            |    1 +
 .../FALCON_DB/ASK-PP-F12_8T-DB.xml            | 1180 ++++
 .../FALCON_DB/SAI-F12_8T-DB.md5               |    1 +
 .../FALCON_DB/SAI-F12_8T-DB.xml               |  918 +++
 .../FALCON_DB/buffers_defaults_t0.j2          |   36 +
 .../FALCON_DB/buffers_defaults_t1.j2          |   36 +
 .../FALCON_DB/port_config.ini                 |  138 +
 .../FALCON_DB/profile.ini                     |    1 +
 .../FALCON_DB/sai.profile                     |    4 +
 .../ASK-Board-F12_8T-48x25G-8x100G.md5        |    1 +
 .../ASK-Board-F12_8T-48x25G-8x100G.xml        | 3458 ++++++++++++
 .../ASK-L1-F12_8T-48x25G-8x100G.md5           |    1 +
 .../ASK-L1-F12_8T-48x25G-8x100G.xml           | 1246 +++++
 .../ASK-PP-F12_8T-48x25G-8x100G.md5           |    1 +
 .../ASK-PP-F12_8T-48x25G-8x100G.xml           | 1180 ++++
 .../SAI-F12_8T-48x25G-8x100G.md5              |    1 +
 .../SAI-F12_8T-48x25G-8x100G.xml              |  518 ++
 .../buffers_defaults_t0.j2                    |    0
 .../buffers_defaults_t1.j2                    |    0
 .../FC48x25G8x100GR4/port_config.ini          |   58 +
 .../FC48x25G8x100GR4/profile.ini              |    1 +
 .../FC48x25G8x100GR4/sai.profile              |    4 +
 .../ASK-Board-F12_8T-48x25G-8x100G.md5        |    1 +
 .../ASK-Board-F12_8T-48x25G-8x100G.xml        | 3458 ++++++++++++
 .../ASK-L1-F12_8T-48x25G-8x100G.md5           |    1 +
 .../ASK-L1-F12_8T-48x25G-8x100G.xml           | 1246 +++++
 .../ASK-PP-F12_8T-48x25G-8x100G.md5           |    1 +
 .../ASK-PP-F12_8T-48x25G-8x100G.xml           | 1180 ++++
 .../SAI-F12_8T-48x25G-8x100G.md5              |    1 +
 .../SAI-F12_8T-48x25G-8x100G.xml              |  518 ++
 .../db98cx8580_32cd/buffers_config.j2         |   14 +-
 .../db98cx8580_32cd/port_config.ini           |   92 +-
 .../db98cx8580_32cd/profile.ini               |    1 -
 .../db98cx8580_32cd/sai.profile               |    3 +-
 .../plugins/eeprom.py                         |   11 -
 .../plugins/sfputil.py                        |  254 -
 .../pmon_daemon_control.json                  |    7 +-
 .../system_health_monitoring_config.json      |   10 +
 56 files changed, 27909 insertions(+), 383 deletions(-)
 create mode 100644 device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON32X25G/ASK-Board-F12_8T_32x25G.md5
 create mode 100644 device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON32X25G/ASK-Board-F12_8T_32x25G.xml
 create mode 100644 device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON32X25G/ASK-L1-F12_8T_32x25G.md5
 create mode 100644 device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON32X25G/ASK-L1-F12_8T_32x25G.xml
 create mode 100644 device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON32X25G/ASK-PP-F12_8T_32x25G.md5
 create mode 100644 device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON32X25G/ASK-PP-F12_8T_32x25G.xml
 create mode 100644 device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON32X25G/SAI-F12_8T_32x25G.md5
 create mode 100644 device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON32X25G/SAI-F12_8T_32x25G.xml
 delete mode 100644 device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON32x400G/port_config.ini
 delete mode 100644 device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON32x400G/profile.ini
 delete mode 100644 device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON32x400G/sai.profile
 create mode 100644 device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON_DB/ASK-Board-F12_8T-DB.md5
 create mode 100644 device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON_DB/ASK-Board-F12_8T-DB.xml
 create mode 100644 device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON_DB/ASK-L1-F12_8T-DB.md5
 create mode 100644 device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON_DB/ASK-L1-F12_8T-DB.xml
 create mode 100644 device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON_DB/ASK-PP-F12_8T-DB.md5
 create mode 100644 device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON_DB/ASK-PP-F12_8T-DB.xml
 create mode 100644 device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON_DB/SAI-F12_8T-DB.md5
 create mode 100644 device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON_DB/SAI-F12_8T-DB.xml
 create mode 100644 device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON_DB/buffers_defaults_t0.j2
 create mode 100644 device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON_DB/buffers_defaults_t1.j2
 create mode 100644 device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON_DB/port_config.ini
 create mode 100644 device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON_DB/profile.ini
 create mode 100644 device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON_DB/sai.profile
 create mode 100644 device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FC48x25G8x100GR4/ASK-Board-F12_8T-48x25G-8x100G.md5
 create mode 100644 device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FC48x25G8x100GR4/ASK-Board-F12_8T-48x25G-8x100G.xml
 create mode 100644 device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FC48x25G8x100GR4/ASK-L1-F12_8T-48x25G-8x100G.md5
 create mode 100644 device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FC48x25G8x100GR4/ASK-L1-F12_8T-48x25G-8x100G.xml
 create mode 100644 device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FC48x25G8x100GR4/ASK-PP-F12_8T-48x25G-8x100G.md5
 create mode 100644 device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FC48x25G8x100GR4/ASK-PP-F12_8T-48x25G-8x100G.xml
 create mode 100644 device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FC48x25G8x100GR4/SAI-F12_8T-48x25G-8x100G.md5
 create mode 100644 device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FC48x25G8x100GR4/SAI-F12_8T-48x25G-8x100G.xml
 rename device/marvell/x86_64-marvell_db98cx8580_32cd-r0/{FALCON32x400G => FC48x25G8x100GR4}/buffers_defaults_t0.j2 (100%)
 rename device/marvell/x86_64-marvell_db98cx8580_32cd-r0/{FALCON32x400G => FC48x25G8x100GR4}/buffers_defaults_t1.j2 (100%)
 create mode 100644 device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FC48x25G8x100GR4/port_config.ini
 create mode 100644 device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FC48x25G8x100GR4/profile.ini
 create mode 100644 device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FC48x25G8x100GR4/sai.profile
 create mode 100644 device/marvell/x86_64-marvell_db98cx8580_32cd-r0/db98cx8580_32cd/ASK-Board-F12_8T-48x25G-8x100G.md5
 create mode 100644 device/marvell/x86_64-marvell_db98cx8580_32cd-r0/db98cx8580_32cd/ASK-Board-F12_8T-48x25G-8x100G.xml
 create mode 100644 device/marvell/x86_64-marvell_db98cx8580_32cd-r0/db98cx8580_32cd/ASK-L1-F12_8T-48x25G-8x100G.md5
 create mode 100644 device/marvell/x86_64-marvell_db98cx8580_32cd-r0/db98cx8580_32cd/ASK-L1-F12_8T-48x25G-8x100G.xml
 create mode 100644 device/marvell/x86_64-marvell_db98cx8580_32cd-r0/db98cx8580_32cd/ASK-PP-F12_8T-48x25G-8x100G.md5
 create mode 100644 device/marvell/x86_64-marvell_db98cx8580_32cd-r0/db98cx8580_32cd/ASK-PP-F12_8T-48x25G-8x100G.xml
 create mode 100644 device/marvell/x86_64-marvell_db98cx8580_32cd-r0/db98cx8580_32cd/SAI-F12_8T-48x25G-8x100G.md5
 create mode 100644 device/marvell/x86_64-marvell_db98cx8580_32cd-r0/db98cx8580_32cd/SAI-F12_8T-48x25G-8x100G.xml
 delete mode 100644 device/marvell/x86_64-marvell_db98cx8580_32cd-r0/plugins/eeprom.py
 delete mode 100644 device/marvell/x86_64-marvell_db98cx8580_32cd-r0/plugins/sfputil.py
 create mode 100644 device/marvell/x86_64-marvell_db98cx8580_32cd-r0/system_health_monitoring_config.json

diff --git a/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON32X25G/ASK-Board-F12_8T_32x25G.md5 b/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON32X25G/ASK-Board-F12_8T_32x25G.md5
new file mode 100644
index 000000000..a50a5c4cc
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON32X25G/ASK-Board-F12_8T_32x25G.md5
@@ -0,0 +1 @@
+84a2cb54120192cfade31a5ae174b96e
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON32X25G/ASK-Board-F12_8T_32x25G.xml b/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON32X25G/ASK-Board-F12_8T_32x25G.xml
new file mode 100644
index 000000000..00ff5d183
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON32X25G/ASK-Board-F12_8T_32x25G.xml
@@ -0,0 +1,3002 @@
+<?xml version="1.0" encoding="utf-8"?>
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-02-19-1.06" profile="Askboard" sid="eb53f80b-5892-4f8b-9197-a6f626effaba">
+  <askboardplt:ASK-Board xmlns:askboardplt="urn:marvell:askboard:yang">
+    <askboardplt:typedefs>
+      <askboardplt:typedef>
+        <askboardplt:name>std-string</askboardplt:name>
+        <askboardplt:type>string</askboardplt:type>
+        <askboardplt:description>standard string.</askboardplt:description>
+        <askboardplt:min>1</askboardplt:min>
+        <askboardplt:max>100</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>board-callback-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies os/ext drv callback types.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>linux-static</askboardplt:name>
+          <askboardplt:description>Linux Static</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>linux-shared</askboardplt:name>
+          <askboardplt:description>Linux Shared Lib mode</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>external</askboardplt:name>
+          <askboardplt:description>External Os</askboardplt:description>
+          <askboardplt:value>3</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>freeBsd</askboardplt:name>
+          <askboardplt:description>Free BSD</askboardplt:description>
+          <askboardplt:value>4</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>board-pp-map-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies pci info types.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>fixed</askboardplt:name>
+          <askboardplt:description>Fixed</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>autoscan</askboardplt:name>
+          <askboardplt:description>Auto scan</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>board-pp-interface-channel-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies channel interface type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>pci</askboardplt:name>
+          <askboardplt:description>PCI</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>smi</askboardplt:name>
+          <askboardplt:description>SMI</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>twsi</askboardplt:name>
+          <askboardplt:description>TWSI</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>board-pp-as-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies Address space type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>4_regions</askboardplt:name>
+          <askboardplt:description>address-space 4 regions</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>8_regions</askboardplt:name>
+          <askboardplt:description>address-space 8 regions</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>atu</askboardplt:name>
+          <askboardplt:description>address translation unit</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>device-id-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Device ID 0..1</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>1</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>port-mapping-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies port map type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>ethernet_mac</askboardplt:name>
+          <askboardplt:description>ETHERNET_MAC</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>cpu_sdma</askboardplt:name>
+          <askboardplt:description>CPU_SDMA</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>interface-num-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Interface number</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>1023</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>txq-port-number-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>TXq port number </askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>99</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>phy-smi-interface-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Phy SMI interface type.</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>3</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>phy-xsmi-interface-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Phy XSMI interface type.</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>15</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>phy-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the PHY Part Identifier.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>NA</askboardplt:name>
+          <askboardplt:description>No Phy</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E1543</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E1543, used for Combo ports.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E1545</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E1545, used for Copper GE with MAC on PHY support.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E1680</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E1680, used for Copper with speeds of 10M/100M/1G.</askboardplt:description>
+          <askboardplt:value>3</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E151X</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E151X, used for Copper (HW supports combo and fiber).</askboardplt:description>
+          <askboardplt:value>4</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E3140</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E3140, used for Copper with speeds of 100M/1G/10G.
+Uses with FW SolarFlare next generation.</askboardplt:description>
+          <askboardplt:value>5</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E3240</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E3240, used for Copper with speeds of 100M/1G/10G.
+Uses with FW, SolarFlare next generation.</askboardplt:description>
+          <askboardplt:value>6</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E3680</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E3680, used for Octal Copper 100M.</askboardplt:description>
+          <askboardplt:value>7</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E3220</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E3220, used for Combo port with speeds of 100M/1G/10G.
+Uses FW, SolarFlare next generation.</askboardplt:description>
+          <askboardplt:value>8</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E1680L</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E1680L, used for Copper with speeds of 10M/100M/1G.</askboardplt:description>
+          <askboardplt:value>9</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E33X0</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E33X0, used for MGIG Combo.</askboardplt:description>
+          <askboardplt:value>10</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E1548</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E1548, used for Fiber GE.</askboardplt:description>
+          <askboardplt:value>11</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E20X0</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E20X0, used for Copper with speeds of 10M/100M/1G/2.5G/5G.</askboardplt:description>
+          <askboardplt:value>12</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E1512</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E1512, used for Copper with speeds of 10M/100M/1G.</askboardplt:description>
+          <askboardplt:value>13</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E2180</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E2180, used for Copper with speeds of 10M/100M/1G/2.5G/5G.</askboardplt:description>
+          <askboardplt:value>14</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E1780</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E1780, Integrated Octal 10/100/1000 Mbps Energy
+Efficient Ethernet Transceiver</askboardplt:description>
+          <askboardplt:value>15</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E2540</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E2540, 4 ports 10/100/1000/2.5G/5GBASE-T Ethernet
+Transceiver with IEEE 1588v2 PTP Support</askboardplt:description>
+          <askboardplt:value>16</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E2580</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E12580, Octal 10/100/1000/2.5G/5GBASE-T Ethernet Transceiver
+with IEEE 1588v2 PTP Support</askboardplt:description>
+          <askboardplt:value>17</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>physical-port-num-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>PHYSICAL PORT NUM</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>1023</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-port-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the ledstream port type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>PORT_TYPE_TRI_SPEED</askboardplt:name>
+          <askboardplt:description>tri-speed port.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>PORT_TYPE_XG</askboardplt:name>
+          <askboardplt:description>XG port.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-blink-select-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the LED stream blink select type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_SELECT_0</askboardplt:name>
+          <askboardplt:description>Blink 0 signal.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_SELECT_1</askboardplt:name>
+          <askboardplt:description>Blink 1 signal</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-order-mode-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the LED stream ordering mode.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>ORDER_MODE_BY_PORT</askboardplt:name>
+          <askboardplt:description>the indication order is arranged by port.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>ORDER_MODE_BY_CLASS</askboardplt:name>
+          <askboardplt:description>the indication order is arranged by class.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-blink-duty-cycle-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the LED stream blink cycle duty cycle type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DUTY_CYCLE_0</askboardplt:name>
+          <askboardplt:description>25% on, 75% off.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DUTY_CYCLE_1</askboardplt:name>
+          <askboardplt:description>50% on, 50% off.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DUTY_CYCLE_2</askboardplt:name>
+          <askboardplt:description>50% on, 50% off.</askboardplt:description>
+          <askboardplt:value>3</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DUTY_CYCLE_3</askboardplt:name>
+          <askboardplt:description>75% on, 25% off.</askboardplt:description>
+          <askboardplt:value>4</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-blink-duration-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the LED stream blink period type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DURATION_0</askboardplt:name>
+          <askboardplt:description>BLINK_DURATION_0.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DURATION_1</askboardplt:name>
+          <askboardplt:description>BLINK_DURATION_1.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DURATION_2</askboardplt:name>
+          <askboardplt:description>BLINK_DURATION_2.</askboardplt:description>
+          <askboardplt:value>3</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DURATION_3</askboardplt:name>
+          <askboardplt:description>BLINK_DURATION_3.</askboardplt:description>
+          <askboardplt:value>4</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DURATION_4</askboardplt:name>
+          <askboardplt:description>BLINK_DURATION_4.</askboardplt:description>
+          <askboardplt:value>5</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DURATION_5</askboardplt:name>
+          <askboardplt:description>BLINK_DURATION_5.</askboardplt:description>
+          <askboardplt:value>6</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DURATION_6</askboardplt:name>
+          <askboardplt:description>(APPLICABLE DEVICES: xCat3; AC5; Lion2; Bobcat2; Caelum; Aldrin; AC3X; Bobcat3; Aldrin2; Pipe) .</askboardplt:description>
+          <askboardplt:value>7</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DURATION_7</askboardplt:name>
+          <askboardplt:description>APPLICABLE DEVICES: Bobcat2; Caelum; Aldrin; AC3X; Bobcat3; Aldrin2; Pipe).</askboardplt:description>
+          <askboardplt:value>8</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-pulse-stretch-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the LED stream length of stretching for dynamic signals.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>PULSE_STRETCH_0_NO</askboardplt:name>
+          <askboardplt:description>PULSE_STRETCH_0_NO.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>PULSE_STRETCH_1</askboardplt:name>
+          <askboardplt:description>PULSE_STRETCH_1.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>PULSE_STRETCH_2</askboardplt:name>
+          <askboardplt:description>PULSE_STRETCH_2.</askboardplt:description>
+          <askboardplt:value>3</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>PULSE_STRETCH_3</askboardplt:name>
+          <askboardplt:description>PULSE_STRETCH_3.</askboardplt:description>
+          <askboardplt:value>4</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>PULSE_STRETCH_4</askboardplt:name>
+          <askboardplt:description>PULSE_STRETCH_4.</askboardplt:description>
+          <askboardplt:value>5</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>PULSE_STRETCH_5</askboardplt:name>
+          <askboardplt:description>PULSE_STRETCH_5.</askboardplt:description>
+          <askboardplt:value>6</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>PULSE_STRETCH_6</askboardplt:name>
+          <askboardplt:description>(APPLICABLE DEVICES: Bobcat2; Caelum; Aldrin; AC3X; Bobcat3; Aldrin2; Falcon; AC5P; Pipe).</askboardplt:description>
+          <askboardplt:value>7</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>PULSE_STRETCH_7</askboardplt:name>
+          <askboardplt:description>(APPLICABLE DEVICES: Bobcat2; Caelum; Aldrin; AC3X; Bobcat3; Aldrin2; Falcon; AC5P; Pipe).</askboardplt:description>
+          <askboardplt:value>8</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-clock-out-frequency-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the LED stream blink cycle duty cycle type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>_CLOCK_OUT_FREQUENCY_500</askboardplt:name>
+          <askboardplt:description>500 KHz LED clock frequency.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>CLOCK_OUT_FREQUENCY_1000</askboardplt:name>
+          <askboardplt:description>1 MHz LED clock frequency.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>CLOCK_OUT_FREQUENCY_2000</askboardplt:name>
+          <askboardplt:description>2 MHz LED clock frequency.</askboardplt:description>
+          <askboardplt:value>3</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>CLOCK_OUT_FREQUENCY_3000</askboardplt:name>
+          <askboardplt:description>3 MHz LED clock frequency.</askboardplt:description>
+          <askboardplt:value>4</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-class5-select-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the LED stream indication displayed on class5 (for dual-media port/phy).</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>CLASS_5_SELECT_HALF_DUPLEX</askboardplt:name>
+          <askboardplt:description>Half Duplex is displayed on class5.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>CLASS_5_SELECT_FIBER_LINK_UP</askboardplt:name>
+          <askboardplt:description>If port is a dual media port, Fiber Link Up is displayed on class5.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-class13-select-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the LED stream indication displayed on class13 (for dual-media port/phy).</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>CLASS_13_SELECT_LINK_DOWN</askboardplt:name>
+          <askboardplt:description>Link Down is displayed on class13.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>CLASS_13_SELECT_COPPER_LINK_UP</askboardplt:name>
+          <askboardplt:description>If port is a dual media port, Copper Link Up is displayed on class13.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-class-num-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Led Class number</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>11</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>boolean-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Boolean 32 bits , due to bing endian</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>false</askboardplt:name>
+          <askboardplt:description>False</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>true</askboardplt:name>
+          <askboardplt:description>True</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>bus-id-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Bus Id Type, PCI/SMI</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>255</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>function-id-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Function Id Type, PCI/SMI</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>255</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>domain-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Domain, PCI/SMI</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>255</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-interface-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Led interface</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>255</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-position-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Led position</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>63</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>serdes-lane-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>serdes lane</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>7</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>cpu-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>The CPU Internal/External</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>external</askboardplt:name>
+          <askboardplt:description>Extrenal connected CPU</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>internal</askboardplt:name>
+          <askboardplt:description>Internal CPU</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-clock-frequency-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Led Clock Frequency Sip6</askboardplt:description>
+        <askboardplt:min>500</askboardplt:min>
+        <askboardplt:max>80000</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-unit-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Led units</askboardplt:description>
+        <askboardplt:min>1</askboardplt:min>
+        <askboardplt:max>16</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-unit-or-no-unit-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Led units, 0 for no Unit</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>16</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-group-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Led Group</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>1</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-force-data-type</askboardplt:name>
+        <askboardplt:type>string</askboardplt:type>
+        <askboardplt:description>A hexadecimal string with octets represented as hex digits
+separated by colons.  The canonical representation uses
+lowercase characters.</askboardplt:description>
+        <askboardplt:min>3</askboardplt:min>
+        <askboardplt:max>11</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>bit-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Bit range 0..31</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>31</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>bit-size-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Bit leng 1..32</askboardplt:description>
+        <askboardplt:min>1</askboardplt:min>
+        <askboardplt:max>32</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-sip-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>The LED scehme</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>na</askboardplt:name>
+          <askboardplt:description>NA</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>sip5</askboardplt:name>
+          <askboardplt:description>SIP5: AC3x</askboardplt:description>
+          <askboardplt:value>5</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>sip6</askboardplt:name>
+          <askboardplt:description>SIP6: Falcon, AC5x</askboardplt:description>
+          <askboardplt:value>6</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>port-cscd-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the cascade port type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>DSA_1_WORD</askboardplt:name>
+          <askboardplt:description>DSA Regular</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>DSA_2_WORDS</askboardplt:name>
+          <askboardplt:description>DSA Extended</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>NETWORK</askboardplt:name>
+          <askboardplt:description>Network.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>DSA_3_WORDS</askboardplt:name>
+          <askboardplt:description>DSA 3 Words</askboardplt:description>
+          <askboardplt:value>3</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>DSA_4_WORD</askboardplt:name>
+          <askboardplt:description>DSA 4 Words</askboardplt:description>
+          <askboardplt:value>4</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>trunk-cscd-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Specifies the Cascade Trunk id.</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>127</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>port-trunk-cscd-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the cascade port type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>cscdPort</askboardplt:name>
+          <askboardplt:description>Cascade port</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>cscdTrunk</askboardplt:name>
+          <askboardplt:description>Csacde trunk</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>hash-cscd-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the hash used by cascade trunk.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>pkt</askboardplt:name>
+          <askboardplt:description>Hash based on packet</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>srcPort</askboardplt:name>
+          <askboardplt:description>Hash based on source port</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>asic-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>ASIC Type</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>ASIC_AC3X</askboardplt:name>
+          <askboardplt:description>AC3X</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>ASIC_AC5X</askboardplt:name>
+          <askboardplt:description>AC5X</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>ASIC_Falcon</askboardplt:name>
+          <askboardplt:description>FALCON</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+    </askboardplt:typedefs>
+    <askboardplt:ASIC_Type askboardplt:type="asic-type">ASIC_Falcon</askboardplt:ASIC_Type>
+    <askboardplt:boardName askboardplt:type="std-string">Falcon-12.8T_32x25G</askboardplt:boardName>
+    <askboardplt:osCallType askboardplt:type="board-callback-type">linux-static</askboardplt:osCallType>
+    <askboardplt:extDrvCallType askboardplt:type="board-callback-type">linux-static</askboardplt:extDrvCallType>
+    <askboardplt:mapType askboardplt:type="board-pp-map-type">autoscan</askboardplt:mapType>
+    <askboardplt:cpuType askboardplt:type="cpu-type">external</askboardplt:cpuType>
+    <askboardplt:mngInterfaceType askboardplt:type="board-pp-interface-channel-type">pci</askboardplt:mngInterfaceType>
+    <askboardplt:adressSpaceType askboardplt:type="board-pp-as-type">atu</askboardplt:adressSpaceType>
+    <askboardplt:device-list>
+      <askboardplt:devNum askboardplt:type="device-id-type">0</askboardplt:devNum>
+      <askboardplt:deviceId askboardplt:type="device-id-type">0</askboardplt:deviceId>
+      <askboardplt:pp-profile-name askboardplt:type="std-string">ASK-PP-F12_8T_32x25G.xml</askboardplt:pp-profile-name>
+      <askboardplt:L1-profile-name askboardplt:type="std-string">ASK-L1-F12_8T_32x25G.xml</askboardplt:L1-profile-name>
+      <askboardplt:ledStreamType askboardplt:type="led-sip-type">sip6</askboardplt:ledStreamType>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">0</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">32</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP4</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">1</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">40</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP5</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">2</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">48</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP6</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">3</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">56</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP7</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">4</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">64</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP0</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">5</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">72</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP1</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">6</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">80</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP2</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">7</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">88</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP3</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">8</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">96</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP4</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">9</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">104</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP5</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">10</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">112</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP6</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">11</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">120</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP7</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">12</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">128</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP0</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">13</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">136</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP1</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">14</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">144</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP2</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">15</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">152</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP3</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">16</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">160</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP4</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">17</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">168</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP5</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">18</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">176</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP6</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">19</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">184</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP7</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">20</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">192</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP0</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">21</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">200</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP1</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">22</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">208</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP2</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">23</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">216</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP3</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">24</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">224</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP4</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">25</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">232</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP5</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">26</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">240</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP6</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">27</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">248</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP7</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">28</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">0</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP0</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">29</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">8</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP1</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">30</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">16</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP2</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">31</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">24</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP3</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">32</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">258</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">63</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">cpu_sdma</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">273</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">33</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">cpu_sdma</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">274</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">34</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">cpu_sdma</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">275</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">35</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">cpu_sdma</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">276</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+      </askboardplt:portMap-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">32</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">38</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">34</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">39</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">33</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">37</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">36</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">35</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">40</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">45</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">41</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">46</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">42</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">47</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">44</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">43</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">50</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">54</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">49</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">51</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">48</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">52</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">53</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">55</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">57</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">62</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">58</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">63</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">56</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">60</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">59</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">61</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">64</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">71</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">66</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">68</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">65</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">69</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">67</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">70</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">72</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">77</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">73</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">79</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">75</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">74</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">76</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">78</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">81</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">85</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">80</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">87</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">84</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">82</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">83</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">86</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">88</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">94</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">89</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">95</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">90</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">91</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">92</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">93</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">96</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">102</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">98</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">103</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">97</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">101</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">100</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">99</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">104</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">109</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">105</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">110</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">106</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">111</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">108</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">107</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">114</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">118</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">113</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">115</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">112</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">116</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">117</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">119</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">121</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">126</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">122</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">127</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">120</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">124</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">123</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">125</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">128</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">135</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">130</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">132</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">129</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">133</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">131</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">134</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">136</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">141</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">137</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">143</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">139</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">138</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">140</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">142</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">145</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">149</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">144</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">151</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">148</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">146</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">147</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">150</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">152</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">158</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">153</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">159</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">154</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">155</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">156</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">157</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">160</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">166</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">162</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">167</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">161</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">165</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">164</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">163</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">168</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">173</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">169</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">174</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">170</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">175</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">176</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">172</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">171</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">178</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">182</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">177</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">179</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">180</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">181</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">183</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">185</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">190</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">186</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">191</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">184</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">188</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">187</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">189</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">192</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">199</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">194</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">196</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">193</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">197</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">195</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">198</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">200</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">205</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">201</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">207</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">203</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">202</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">204</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">206</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">209</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">213</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">208</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">215</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">212</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">210</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">211</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">214</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">216</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">222</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">217</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">223</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">218</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">219</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">220</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">221</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">224</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">230</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">226</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">231</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">225</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">229</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">228</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">227</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">232</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">237</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">233</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">238</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">234</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">239</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">236</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">235</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">242</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">246</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">241</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">243</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">240</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">244</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">245</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">247</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">249</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">254</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">250</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">255</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">248</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">252</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">251</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">253</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">0</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">7</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">2</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">4</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">1</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">5</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">3</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">6</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">8</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">13</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">9</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">15</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">11</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">10</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">12</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">14</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">17</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">21</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">16</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">23</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">20</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">18</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">19</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">22</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">24</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">30</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">25</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">31</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">26</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">27</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">28</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">29</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:Ledstream-interface-list>
+        <askboardplt:ledstream-interface-number askboardplt:type="led-interface-type">0</askboardplt:ledstream-interface-number>
+        <askboardplt:ledstream-configSet>
+          <askboardplt:ledOrganize askboardplt:type="led-stream-order-mode-type">ORDER_MODE_BY_CLASS</askboardplt:ledOrganize>
+          <askboardplt:blink0DutyCycle askboardplt:type="led-stream-blink-duty-cycle-type">BLINK_DUTY_CYCLE_0</askboardplt:blink0DutyCycle>
+          <askboardplt:blink0Duration askboardplt:type="led-stream-blink-duration-type">BLINK_DURATION_0</askboardplt:blink0Duration>
+          <askboardplt:blink1DutyCycle askboardplt:type="led-stream-blink-duty-cycle-type">BLINK_DUTY_CYCLE_0</askboardplt:blink1DutyCycle>
+          <askboardplt:blink1Duration askboardplt:type="led-stream-blink-duration-type">BLINK_DURATION_1</askboardplt:blink1Duration>
+          <askboardplt:pulseStretch askboardplt:type="led-stream-pulse-stretch-type">PULSE_STRETCH_1</askboardplt:pulseStretch>
+          <askboardplt:invertEnable askboardplt:type="boolean-type">false</askboardplt:invertEnable>
+          <askboardplt:SIP6ledClockFrequency askboardplt:type="led-stream-clock-frequency-type">1627</askboardplt:SIP6ledClockFrequency>
+          <askboardplt:ledClockPosEdgeModeEnable askboardplt:type="boolean-type">false</askboardplt:ledClockPosEdgeModeEnable>
+          <askboardplt:ledUnit-List>
+            <askboardplt:ledUnit askboardplt:type="led-unit-type">1</askboardplt:ledUnit>
+            <askboardplt:ledStart askboardplt:type="uint32">64</askboardplt:ledStart>
+            <askboardplt:ledEnd askboardplt:type="uint32">66</askboardplt:ledEnd>
+            <askboardplt:ledChainBypass askboardplt:type="boolean-type">false</askboardplt:ledChainBypass>
+          </askboardplt:ledUnit-List>
+          <askboardplt:ledUnit-List>
+            <askboardplt:ledUnit askboardplt:type="led-unit-type">2</askboardplt:ledUnit>
+            <askboardplt:ledStart askboardplt:type="uint32">64</askboardplt:ledStart>
+            <askboardplt:ledEnd askboardplt:type="uint32">65</askboardplt:ledEnd>
+            <askboardplt:ledChainBypass askboardplt:type="boolean-type">false</askboardplt:ledChainBypass>
+          </askboardplt:ledUnit-List>
+          <askboardplt:ledUnit-List>
+            <askboardplt:ledUnit askboardplt:type="led-unit-type">3</askboardplt:ledUnit>
+            <askboardplt:ledStart askboardplt:type="uint32">64</askboardplt:ledStart>
+            <askboardplt:ledEnd askboardplt:type="uint32">65</askboardplt:ledEnd>
+            <askboardplt:ledChainBypass askboardplt:type="boolean-type">false</askboardplt:ledChainBypass>
+          </askboardplt:ledUnit-List>
+          <askboardplt:ledUnit-List>
+            <askboardplt:ledUnit askboardplt:type="led-unit-type">4</askboardplt:ledUnit>
+            <askboardplt:ledStart askboardplt:type="uint32">64</askboardplt:ledStart>
+            <askboardplt:ledEnd askboardplt:type="uint32">66</askboardplt:ledEnd>
+            <askboardplt:ledChainBypass askboardplt:type="boolean-type">false</askboardplt:ledChainBypass>
+          </askboardplt:ledUnit-List>
+          <askboardplt:ledUnit-List>
+            <askboardplt:ledUnit askboardplt:type="led-unit-type">5</askboardplt:ledUnit>
+            <askboardplt:ledStart askboardplt:type="uint32">64</askboardplt:ledStart>
+            <askboardplt:ledEnd askboardplt:type="uint32">66</askboardplt:ledEnd>
+            <askboardplt:ledChainBypass askboardplt:type="boolean-type">false</askboardplt:ledChainBypass>
+          </askboardplt:ledUnit-List>
+          <askboardplt:ledUnit-List>
+            <askboardplt:ledUnit askboardplt:type="led-unit-type">6</askboardplt:ledUnit>
+            <askboardplt:ledStart askboardplt:type="uint32">64</askboardplt:ledStart>
+            <askboardplt:ledEnd askboardplt:type="uint32">65</askboardplt:ledEnd>
+            <askboardplt:ledChainBypass askboardplt:type="boolean-type">false</askboardplt:ledChainBypass>
+          </askboardplt:ledUnit-List>
+          <askboardplt:ledUnit-List>
+            <askboardplt:ledUnit askboardplt:type="led-unit-type">7</askboardplt:ledUnit>
+            <askboardplt:ledStart askboardplt:type="uint32">64</askboardplt:ledStart>
+            <askboardplt:ledEnd askboardplt:type="uint32">65</askboardplt:ledEnd>
+            <askboardplt:ledChainBypass askboardplt:type="boolean-type">false</askboardplt:ledChainBypass>
+          </askboardplt:ledUnit-List>
+          <askboardplt:ledUnit-List>
+            <askboardplt:ledUnit askboardplt:type="led-unit-type">8</askboardplt:ledUnit>
+            <askboardplt:ledStart askboardplt:type="uint32">64</askboardplt:ledStart>
+            <askboardplt:ledEnd askboardplt:type="uint32">66</askboardplt:ledEnd>
+            <askboardplt:ledChainBypass askboardplt:type="boolean-type">false</askboardplt:ledChainBypass>
+          </askboardplt:ledUnit-List>
+        </askboardplt:ledstream-configSet>
+        <askboardplt:ledstream-class-manipulation-list>
+          <askboardplt:classNum askboardplt:type="led-class-num-type">0</askboardplt:classNum>
+          <askboardplt:portType askboardplt:type="led-stream-port-type">PORT_TYPE_XG</askboardplt:portType>
+          <askboardplt:blinkEnable askboardplt:type="boolean-type">false</askboardplt:blinkEnable>
+          <askboardplt:blinkSelect askboardplt:type="led-stream-blink-select-type">BLINK_SELECT_0</askboardplt:blinkSelect>
+          <askboardplt:forceEnable askboardplt:type="boolean-type">false</askboardplt:forceEnable>
+          <askboardplt:pulseStretchEnable askboardplt:type="boolean-type">true</askboardplt:pulseStretchEnable>
+          <askboardplt:disableOnLinkDown askboardplt:type="boolean-type">false</askboardplt:disableOnLinkDown>
+        </askboardplt:ledstream-class-manipulation-list>
+        <askboardplt:ledstream-class-manipulation-list>
+          <askboardplt:classNum askboardplt:type="led-class-num-type">1</askboardplt:classNum>
+          <askboardplt:portType askboardplt:type="led-stream-port-type">PORT_TYPE_XG</askboardplt:portType>
+          <askboardplt:blinkEnable askboardplt:type="boolean-type">false</askboardplt:blinkEnable>
+          <askboardplt:blinkSelect askboardplt:type="led-stream-blink-select-type">BLINK_SELECT_0</askboardplt:blinkSelect>
+          <askboardplt:forceEnable askboardplt:type="boolean-type">false</askboardplt:forceEnable>
+          <askboardplt:pulseStretchEnable askboardplt:type="boolean-type">true</askboardplt:pulseStretchEnable>
+          <askboardplt:disableOnLinkDown askboardplt:type="boolean-type">false</askboardplt:disableOnLinkDown>
+        </askboardplt:ledstream-class-manipulation-list>
+        <askboardplt:ledstream-class-manipulation-list>
+          <askboardplt:classNum askboardplt:type="led-class-num-type">2</askboardplt:classNum>
+          <askboardplt:portType askboardplt:type="led-stream-port-type">PORT_TYPE_XG</askboardplt:portType>
+          <askboardplt:blinkEnable askboardplt:type="boolean-type">true</askboardplt:blinkEnable>
+          <askboardplt:blinkSelect askboardplt:type="led-stream-blink-select-type">BLINK_SELECT_0</askboardplt:blinkSelect>
+          <askboardplt:forceEnable askboardplt:type="boolean-type">false</askboardplt:forceEnable>
+          <askboardplt:pulseStretchEnable askboardplt:type="boolean-type">true</askboardplt:pulseStretchEnable>
+          <askboardplt:disableOnLinkDown askboardplt:type="boolean-type">true</askboardplt:disableOnLinkDown>
+        </askboardplt:ledstream-class-manipulation-list>
+        <askboardplt:ledstream-class-manipulation-list>
+          <askboardplt:classNum askboardplt:type="led-class-num-type">3</askboardplt:classNum>
+          <askboardplt:portType askboardplt:type="led-stream-port-type">PORT_TYPE_XG</askboardplt:portType>
+          <askboardplt:blinkEnable askboardplt:type="boolean-type">false</askboardplt:blinkEnable>
+          <askboardplt:blinkSelect askboardplt:type="led-stream-blink-select-type">BLINK_SELECT_0</askboardplt:blinkSelect>
+          <askboardplt:forceEnable askboardplt:type="boolean-type">false</askboardplt:forceEnable>
+          <askboardplt:pulseStretchEnable askboardplt:type="boolean-type">true</askboardplt:pulseStretchEnable>
+          <askboardplt:disableOnLinkDown askboardplt:type="boolean-type">false</askboardplt:disableOnLinkDown>
+        </askboardplt:ledstream-class-manipulation-list>
+        <askboardplt:ledstream-class-manipulation-list>
+          <askboardplt:classNum askboardplt:type="led-class-num-type">4</askboardplt:classNum>
+          <askboardplt:portType askboardplt:type="led-stream-port-type">PORT_TYPE_XG</askboardplt:portType>
+          <askboardplt:blinkEnable askboardplt:type="boolean-type">false</askboardplt:blinkEnable>
+          <askboardplt:blinkSelect askboardplt:type="led-stream-blink-select-type">BLINK_SELECT_0</askboardplt:blinkSelect>
+          <askboardplt:forceEnable askboardplt:type="boolean-type">false</askboardplt:forceEnable>
+          <askboardplt:pulseStretchEnable askboardplt:type="boolean-type">true</askboardplt:pulseStretchEnable>
+          <askboardplt:disableOnLinkDown askboardplt:type="boolean-type">false</askboardplt:disableOnLinkDown>
+        </askboardplt:ledstream-class-manipulation-list>
+        <askboardplt:ledstream-class-manipulation-list>
+          <askboardplt:classNum askboardplt:type="led-class-num-type">5</askboardplt:classNum>
+          <askboardplt:portType askboardplt:type="led-stream-port-type">PORT_TYPE_XG</askboardplt:portType>
+          <askboardplt:blinkEnable askboardplt:type="boolean-type">false</askboardplt:blinkEnable>
+          <askboardplt:blinkSelect askboardplt:type="led-stream-blink-select-type">BLINK_SELECT_0</askboardplt:blinkSelect>
+          <askboardplt:forceEnable askboardplt:type="boolean-type">false</askboardplt:forceEnable>
+          <askboardplt:pulseStretchEnable askboardplt:type="boolean-type">true</askboardplt:pulseStretchEnable>
+          <askboardplt:disableOnLinkDown askboardplt:type="boolean-type">false</askboardplt:disableOnLinkDown>
+        </askboardplt:ledstream-class-manipulation-list>
+      </askboardplt:Ledstream-interface-list>
+    </askboardplt:device-list>
+    <askboardplt:UDSFilePath askboardplt:type="std-string">/tmp/cpss_uds</askboardplt:UDSFilePath>
+    <askboardplt:serdesMux>
+      <askboardplt:serdesMuxSchemePortMod askboardplt:type="uint32">8</askboardplt:serdesMuxSchemePortMod>
+      <askboardplt:serdesMuxSchemeList>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP0</askboardplt:serdesMuxScheme>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">0</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">7</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">2</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">4</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">1</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">5</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">3</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">6</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+      </askboardplt:serdesMuxSchemeList>
+      <askboardplt:serdesMuxSchemeList>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP1</askboardplt:serdesMuxScheme>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">0</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">5</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">1</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">7</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">3</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">2</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">4</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">6</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+      </askboardplt:serdesMuxSchemeList>
+      <askboardplt:serdesMuxSchemeList>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP2</askboardplt:serdesMuxScheme>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">1</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">5</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">0</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">7</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">4</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">2</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">3</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">6</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+      </askboardplt:serdesMuxSchemeList>
+      <askboardplt:serdesMuxSchemeList>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP3</askboardplt:serdesMuxScheme>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">0</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">6</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">1</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">7</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">2</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">3</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">4</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">5</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+      </askboardplt:serdesMuxSchemeList>
+      <askboardplt:serdesMuxSchemeList>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP4</askboardplt:serdesMuxScheme>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">0</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">6</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">2</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">7</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">1</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">5</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">4</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">3</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+      </askboardplt:serdesMuxSchemeList>
+      <askboardplt:serdesMuxSchemeList>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP5</askboardplt:serdesMuxScheme>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">0</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">5</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">1</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">6</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">2</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">7</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">4</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">3</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+      </askboardplt:serdesMuxSchemeList>
+      <askboardplt:serdesMuxSchemeList>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP6</askboardplt:serdesMuxScheme>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">2</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">6</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">1</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">3</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">0</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">4</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">5</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">7</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+      </askboardplt:serdesMuxSchemeList>
+      <askboardplt:serdesMuxSchemeList>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP7</askboardplt:serdesMuxScheme>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">1</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">6</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">2</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">7</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">0</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">4</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">3</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">5</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+      </askboardplt:serdesMuxSchemeList>
+    </askboardplt:serdesMux>
+  </askboardplt:ASK-Board>
+</data>
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON32X25G/ASK-L1-F12_8T_32x25G.md5 b/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON32X25G/ASK-L1-F12_8T_32x25G.md5
new file mode 100644
index 000000000..85848f340
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON32X25G/ASK-L1-F12_8T_32x25G.md5
@@ -0,0 +1 @@
+88c203cabdf73a053d2ff8802e0dbf30
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON32X25G/ASK-L1-F12_8T_32x25G.xml b/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON32X25G/ASK-L1-F12_8T_32x25G.xml
new file mode 100644
index 000000000..386e692e6
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON32X25G/ASK-L1-F12_8T_32x25G.xml
@@ -0,0 +1,1072 @@
+<?xml version="1.0" encoding="utf-8"?>
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-02-19-1.06" profile="Askl1" sid="71d3ab0f-3ac2-452a-a5c9-2dfdc969734a">
+  <ASKL1plt:ASK-L1 xmlns:ASKL1plt="urn:marvell:ASKL1:yang">
+    <ASKL1plt:typedefs>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>interface-mode-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Specifies supported Interface modes</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>1000BASE_X</ASKL1plt:name>
+          <ASKL1plt:description>1G</ASKL1plt:description>
+          <ASKL1plt:value>6</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>SGMII</ASKL1plt:name>
+          <ASKL1plt:description>1G , 2.5G</ASKL1plt:description>
+          <ASKL1plt:value>3</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>QSGMII</ASKL1plt:name>
+          <ASKL1plt:description>1G</ASKL1plt:description>
+          <ASKL1plt:value>13</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>KR</ASKL1plt:name>
+          <ASKL1plt:description>10G, 12G, 20G, 40G, 100G</ASKL1plt:description>
+          <ASKL1plt:value>16</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>SR_LR</ASKL1plt:name>
+          <ASKL1plt:description>5G, 10G, 12G, 20G, 40G</ASKL1plt:description>
+          <ASKL1plt:value>20</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>KR2</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>27</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>KR4</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>28</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>SR_LR2</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>29</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>SR_LR4</ASKL1plt:name>
+          <ASKL1plt:description>100G</ASKL1plt:description>
+          <ASKL1plt:value>30</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>KR_C</ASKL1plt:name>
+          <ASKL1plt:description>CONSORTIUM - 25G</ASKL1plt:description>
+          <ASKL1plt:value>32</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>CR_C</ASKL1plt:name>
+          <ASKL1plt:description>CONSORTIUM - 25G</ASKL1plt:description>
+          <ASKL1plt:value>33</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>KR2_C</ASKL1plt:name>
+          <ASKL1plt:description>CONSORTIUM - 50G</ASKL1plt:description>
+          <ASKL1plt:value>34</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>CR2_C</ASKL1plt:name>
+          <ASKL1plt:description>CONSORTIUM - 50G</ASKL1plt:description>
+          <ASKL1plt:value>35</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>CR</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>36</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>CR2</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>37</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>CR4</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>38</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>KR_S</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>39</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>CR_S</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>40</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>KR8</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>41</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>CR8</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>42</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>SR_LR8</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>43</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>USX_10G_QXGMII</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>51</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>USX_20G_QXGMII</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>52</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>USX_OUSGMII</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>53</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>USX_20G_OXGMII</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>54</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>NA</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>57</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>port-speed-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Specifies supported speeds</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>1G</ASKL1plt:name>
+          <ASKL1plt:description>1G</ASKL1plt:description>
+          <ASKL1plt:value>2</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>10G</ASKL1plt:name>
+          <ASKL1plt:description>10G</ASKL1plt:description>
+          <ASKL1plt:value>3</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>2500M</ASKL1plt:name>
+          <ASKL1plt:description>2.5G</ASKL1plt:description>
+          <ASKL1plt:value>5</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>5G</ASKL1plt:name>
+          <ASKL1plt:description>5G</ASKL1plt:description>
+          <ASKL1plt:value>6</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>25G</ASKL1plt:name>
+          <ASKL1plt:description>25G, used in combination with CPSS_PORT_INTERFACE_MODE_KR_E, CPSS_PORT_INTERFACE_MODE_KR2_E</ASKL1plt:description>
+          <ASKL1plt:value>21</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>40G</ASKL1plt:name>
+          <ASKL1plt:description>40G</ASKL1plt:description>
+          <ASKL1plt:value>9</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>50G</ASKL1plt:name>
+          <ASKL1plt:description>50G</ASKL1plt:description>
+          <ASKL1plt:value>14</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>100G</ASKL1plt:name>
+          <ASKL1plt:description>100G</ASKL1plt:description>
+          <ASKL1plt:value>13</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>200G</ASKL1plt:name>
+          <ASKL1plt:description>200G</ASKL1plt:description>
+          <ASKL1plt:value>24</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>400G</ASKL1plt:name>
+          <ASKL1plt:description>400G</ASKL1plt:description>
+          <ASKL1plt:value>25</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>NA</ASKL1plt:name>
+          <ASKL1plt:description>NA</ASKL1plt:description>
+          <ASKL1plt:value>35</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>fec-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Rx parameter type</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>enabled</ASKL1plt:name>
+          <ASKL1plt:description>Enabled</ASKL1plt:description>
+          <ASKL1plt:value>0</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>disabled</ASKL1plt:name>
+          <ASKL1plt:description>Disabled</ASKL1plt:description>
+          <ASKL1plt:value>1</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rs_enabled</ASKL1plt:name>
+          <ASKL1plt:description>RS FEC enabled</ASKL1plt:description>
+          <ASKL1plt:value>2</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>both_enabled</ASKL1plt:name>
+          <ASKL1plt:description>Both enabled</ASKL1plt:description>
+          <ASKL1plt:value>3</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rs_544_514_enabled</ASKL1plt:name>
+          <ASKL1plt:description>RS FEC 544 and 514</ASKL1plt:description>
+          <ASKL1plt:value>4</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>physical-port-num-type</ASKL1plt:name>
+        <ASKL1plt:type>uint32</ASKL1plt:type>
+        <ASKL1plt:description>PHYSICAL PORT NUM</ASKL1plt:description>
+        <ASKL1plt:min>0</ASKL1plt:min>
+        <ASKL1plt:max>1023</ASKL1plt:max>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>tx-param-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Tx parameter type</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>atten</ASKL1plt:name>
+          <ASKL1plt:description>atten</ASKL1plt:description>
+          <ASKL1plt:value>0</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>post</ASKL1plt:name>
+          <ASKL1plt:description>post</ASKL1plt:description>
+          <ASKL1plt:value>1</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>pre</ASKL1plt:name>
+          <ASKL1plt:description>pre</ASKL1plt:description>
+          <ASKL1plt:value>2</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>pre2</ASKL1plt:name>
+          <ASKL1plt:description>pre2</ASKL1plt:description>
+          <ASKL1plt:value>3</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>pre3</ASKL1plt:name>
+          <ASKL1plt:description>pre3</ASKL1plt:description>
+          <ASKL1plt:value>4</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>peak</ASKL1plt:name>
+          <ASKL1plt:description>peak</ASKL1plt:description>
+          <ASKL1plt:value>5</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>main</ASKL1plt:name>
+          <ASKL1plt:description>main</ASKL1plt:description>
+          <ASKL1plt:value>6</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>txAmpAdjEn</ASKL1plt:name>
+          <ASKL1plt:description>txAmpAdjEn</ASKL1plt:description>
+          <ASKL1plt:value>7</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>emph0</ASKL1plt:name>
+          <ASKL1plt:description>emph0</ASKL1plt:description>
+          <ASKL1plt:value>8</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>emph1</ASKL1plt:name>
+          <ASKL1plt:description>emph1</ASKL1plt:description>
+          <ASKL1plt:value>9</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>txAmpShft</ASKL1plt:name>
+          <ASKL1plt:description>txAmpShft</ASKL1plt:description>
+          <ASKL1plt:value>10</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>txEmphEn</ASKL1plt:name>
+          <ASKL1plt:description>txEmphEn</ASKL1plt:description>
+          <ASKL1plt:value>11</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>txEmphEn1</ASKL1plt:name>
+          <ASKL1plt:description>txEmphEn1</ASKL1plt:description>
+          <ASKL1plt:value>12</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>txAmpAdj</ASKL1plt:name>
+          <ASKL1plt:description>txAmpAdj</ASKL1plt:description>
+          <ASKL1plt:value>13</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>slewCtrlEn</ASKL1plt:name>
+          <ASKL1plt:description>slewCtrlEn</ASKL1plt:description>
+          <ASKL1plt:value>14</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>slewRate</ASKL1plt:name>
+          <ASKL1plt:description>slewRate</ASKL1plt:description>
+          <ASKL1plt:value>15</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>rx-param-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Rx parameter type</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>sqlch</ASKL1plt:name>
+          <ASKL1plt:description>sqlch</ASKL1plt:description>
+          <ASKL1plt:value>0</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>DC</ASKL1plt:name>
+          <ASKL1plt:description>DC</ASKL1plt:description>
+          <ASKL1plt:value>1</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>LF</ASKL1plt:name>
+          <ASKL1plt:description>LF</ASKL1plt:description>
+          <ASKL1plt:value>2</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>HF</ASKL1plt:name>
+          <ASKL1plt:description>HF</ASKL1plt:description>
+          <ASKL1plt:value>3</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>gainShape1</ASKL1plt:name>
+          <ASKL1plt:description>gainShape1</ASKL1plt:description>
+          <ASKL1plt:value>4</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>gainShape2</ASKL1plt:name>
+          <ASKL1plt:description>gainShape2</ASKL1plt:description>
+          <ASKL1plt:value>5</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>shortChannelEn</ASKL1plt:name>
+          <ASKL1plt:description>shortChannelEn</ASKL1plt:description>
+          <ASKL1plt:value>7</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>bfLf</ASKL1plt:name>
+          <ASKL1plt:description>bfLf</ASKL1plt:description>
+          <ASKL1plt:value>8</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>bfHf</ASKL1plt:name>
+          <ASKL1plt:description>bfHf</ASKL1plt:description>
+          <ASKL1plt:value>9</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>minLf</ASKL1plt:name>
+          <ASKL1plt:description>minLf</ASKL1plt:description>
+          <ASKL1plt:value>10</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>maxLf</ASKL1plt:name>
+          <ASKL1plt:description>maxLf</ASKL1plt:description>
+          <ASKL1plt:value>11</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>minHf</ASKL1plt:name>
+          <ASKL1plt:description>minHf</ASKL1plt:description>
+          <ASKL1plt:value>12</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>maxHf</ASKL1plt:name>
+          <ASKL1plt:description>maxHf</ASKL1plt:description>
+          <ASKL1plt:value>13</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>minPre1</ASKL1plt:name>
+          <ASKL1plt:description>minPre1</ASKL1plt:description>
+          <ASKL1plt:value>14</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>maxPre1</ASKL1plt:name>
+          <ASKL1plt:description>maxPre1</ASKL1plt:description>
+          <ASKL1plt:value>15</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>minPre2</ASKL1plt:name>
+          <ASKL1plt:description>minPre2</ASKL1plt:description>
+          <ASKL1plt:value>16</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>maxPre2</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>17</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>minPost</ASKL1plt:name>
+          <ASKL1plt:description>minPost</ASKL1plt:description>
+          <ASKL1plt:value>18</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>maxPost</ASKL1plt:name>
+          <ASKL1plt:description>maxPost</ASKL1plt:description>
+          <ASKL1plt:value>19</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>squelch</ASKL1plt:name>
+          <ASKL1plt:description>squelch</ASKL1plt:description>
+          <ASKL1plt:value>20</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>termination</ASKL1plt:name>
+          <ASKL1plt:description>termination</ASKL1plt:description>
+          <ASKL1plt:value>27</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>coldEnvelope</ASKL1plt:name>
+          <ASKL1plt:description>coldEnvelope</ASKL1plt:description>
+          <ASKL1plt:value>35</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>hotEnvelope</ASKL1plt:name>
+          <ASKL1plt:description>hotEnvelope</ASKL1plt:description>
+          <ASKL1plt:value>36</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>dcGain</ASKL1plt:name>
+          <ASKL1plt:description>dcGain</ASKL1plt:description>
+          <ASKL1plt:value>37</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>bandWidth</ASKL1plt:name>
+          <ASKL1plt:description>bandWidth</ASKL1plt:description>
+          <ASKL1plt:value>38</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>dfe</ASKL1plt:name>
+          <ASKL1plt:description>dfe</ASKL1plt:description>
+          <ASKL1plt:value>39</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>ffeR</ASKL1plt:name>
+          <ASKL1plt:description>ffeR</ASKL1plt:description>
+          <ASKL1plt:value>40</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>ffeC</ASKL1plt:name>
+          <ASKL1plt:description>ffeC</ASKL1plt:description>
+          <ASKL1plt:value>41</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>sampler</ASKL1plt:name>
+          <ASKL1plt:description>sampler</ASKL1plt:description>
+          <ASKL1plt:value>42</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>align90</ASKL1plt:name>
+          <ASKL1plt:description>align90</ASKL1plt:description>
+          <ASKL1plt:value>43</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>ffeS</ASKL1plt:name>
+          <ASKL1plt:description>ffeS</ASKL1plt:description>
+          <ASKL1plt:value>44</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>resSel</ASKL1plt:name>
+          <ASKL1plt:description>resSel</ASKL1plt:description>
+          <ASKL1plt:value>45</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>resShift</ASKL1plt:name>
+          <ASKL1plt:description>resShift</ASKL1plt:description>
+          <ASKL1plt:value>46</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>capSel</ASKL1plt:name>
+          <ASKL1plt:description>capSel</ASKL1plt:description>
+          <ASKL1plt:value>47</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>ffeSettingForce</ASKL1plt:name>
+          <ASKL1plt:description>ffeSettingForce</ASKL1plt:description>
+          <ASKL1plt:value>48</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>adaptedResSel</ASKL1plt:name>
+          <ASKL1plt:description>adaptedResSel</ASKL1plt:description>
+          <ASKL1plt:value>49</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>adaptedCapSel</ASKL1plt:name>
+          <ASKL1plt:description>adaptedCapSel</ASKL1plt:description>
+          <ASKL1plt:value>50</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>selmufi</ASKL1plt:name>
+          <ASKL1plt:description>selmufi</ASKL1plt:description>
+          <ASKL1plt:value>51</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>selmuff</ASKL1plt:name>
+          <ASKL1plt:description>selmuff</ASKL1plt:description>
+          <ASKL1plt:value>52</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>selmupi</ASKL1plt:name>
+          <ASKL1plt:description>selmupi</ASKL1plt:description>
+          <ASKL1plt:value>53</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>selmupf</ASKL1plt:name>
+          <ASKL1plt:description>selmupf</ASKL1plt:description>
+          <ASKL1plt:value>54</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>slewRateCtrl0</ASKL1plt:name>
+          <ASKL1plt:description>slewRateCtrl0</ASKL1plt:description>
+          <ASKL1plt:value>55</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>slewRateCtrl1</ASKL1plt:name>
+          <ASKL1plt:description>slewRateCtrl1</ASKL1plt:description>
+          <ASKL1plt:value>56</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>EO</ASKL1plt:name>
+          <ASKL1plt:description>EO</ASKL1plt:description>
+          <ASKL1plt:value>57</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>dataRate</ASKL1plt:name>
+          <ASKL1plt:description>dataRate</ASKL1plt:description>
+          <ASKL1plt:value>58</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>res1Sel</ASKL1plt:name>
+          <ASKL1plt:description>res1Sel</ASKL1plt:description>
+          <ASKL1plt:value>59</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>res2Sel</ASKL1plt:name>
+          <ASKL1plt:description>res2Sel</ASKL1plt:description>
+          <ASKL1plt:value>60</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>cap1Sel</ASKL1plt:name>
+          <ASKL1plt:description>cap1Sel</ASKL1plt:description>
+          <ASKL1plt:value>61</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>cap2Sel</ASKL1plt:name>
+          <ASKL1plt:description>cap2Sel</ASKL1plt:description>
+          <ASKL1plt:value>62</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>midpointLargeThresKLane</ASKL1plt:name>
+          <ASKL1plt:description>midpointLargeThresKLane</ASKL1plt:description>
+          <ASKL1plt:value>63</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>midpointSmallThresKLane</ASKL1plt:name>
+          <ASKL1plt:description>midpointSmallThresKLane</ASKL1plt:description>
+          <ASKL1plt:value>64</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>midpointLargeThresCLane</ASKL1plt:name>
+          <ASKL1plt:description>midpointLargeThresCLane</ASKL1plt:description>
+          <ASKL1plt:value>65</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>midpointSmallThresCLane</ASKL1plt:name>
+          <ASKL1plt:description>midpointSmallThresCLane</ASKL1plt:description>
+          <ASKL1plt:value>66</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>dfeResF0aHighThresInitLane</ASKL1plt:name>
+          <ASKL1plt:description>dfeResF0aHighThresInitLane</ASKL1plt:description>
+          <ASKL1plt:value>67</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>dfeResF0aHighThresEndLane</ASKL1plt:name>
+          <ASKL1plt:description>dfeResF0aHighThresEndLane</ASKL1plt:description>
+          <ASKL1plt:value>68</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>current1Sel</ASKL1plt:name>
+          <ASKL1plt:description>current1Sel</ASKL1plt:description>
+          <ASKL1plt:value>69</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rl1Sel</ASKL1plt:name>
+          <ASKL1plt:description>rl1Sel</ASKL1plt:description>
+          <ASKL1plt:value>70</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rl1Extra</ASKL1plt:name>
+          <ASKL1plt:description>rl1Extra</ASKL1plt:description>
+          <ASKL1plt:value>71</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>cl1Ctrl</ASKL1plt:name>
+          <ASKL1plt:description>cl1Ctrl</ASKL1plt:description>
+          <ASKL1plt:value>72</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>enMidFreq</ASKL1plt:name>
+          <ASKL1plt:description>enMidFreq</ASKL1plt:description>
+          <ASKL1plt:value>73</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>cs1Mid</ASKL1plt:name>
+          <ASKL1plt:description>cs1Mid</ASKL1plt:description>
+          <ASKL1plt:value>74</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rs1Mid</ASKL1plt:name>
+          <ASKL1plt:description>rs1Mid</ASKL1plt:description>
+          <ASKL1plt:value>75</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rfCtrl</ASKL1plt:name>
+          <ASKL1plt:description>rfCtrl</ASKL1plt:description>
+          <ASKL1plt:value>76</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rl1TiaSel</ASKL1plt:name>
+          <ASKL1plt:description>rl1TiaSel</ASKL1plt:description>
+          <ASKL1plt:value>77</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rl1TiaExtra</ASKL1plt:name>
+          <ASKL1plt:description>rl1TiaExtra</ASKL1plt:description>
+          <ASKL1plt:value>78</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>hpfRSel1st</ASKL1plt:name>
+          <ASKL1plt:description>hpfRSel1st</ASKL1plt:description>
+          <ASKL1plt:value>79</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>current1TiaSel</ASKL1plt:name>
+          <ASKL1plt:description>current1TiaSel</ASKL1plt:description>
+          <ASKL1plt:value>80</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rl2Tune</ASKL1plt:name>
+          <ASKL1plt:description>rl2Tune</ASKL1plt:description>
+          <ASKL1plt:value>81</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rl2Sel</ASKL1plt:name>
+          <ASKL1plt:description>rl2Sel</ASKL1plt:description>
+          <ASKL1plt:value>82</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rs2Sel</ASKL1plt:name>
+          <ASKL1plt:description>rs2Sel</ASKL1plt:description>
+          <ASKL1plt:value>83</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>current2Sel</ASKL1plt:name>
+          <ASKL1plt:description>current2Sel</ASKL1plt:description>
+          <ASKL1plt:value>84</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>hpfRsel2nd</ASKL1plt:name>
+          <ASKL1plt:description>hpfRsel2nd</ASKL1plt:description>
+          <ASKL1plt:value>85</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>BW</ASKL1plt:name>
+          <ASKL1plt:description>BW</ASKL1plt:description>
+          <ASKL1plt:value>86</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>dfeGAIN</ASKL1plt:name>
+          <ASKL1plt:description>dfeGAIN</ASKL1plt:description>
+          <ASKL1plt:value>87</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>dfeGAIN2</ASKL1plt:name>
+          <ASKL1plt:description>dfeGAIN2</ASKL1plt:description>
+          <ASKL1plt:value>88</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>pre1</ASKL1plt:name>
+          <ASKL1plt:description>pre1</ASKL1plt:description>
+          <ASKL1plt:value>89</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>pre2</ASKL1plt:name>
+          <ASKL1plt:description>pre2</ASKL1plt:description>
+          <ASKL1plt:value>90</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>post1</ASKL1plt:name>
+          <ASKL1plt:description>post1</ASKL1plt:description>
+          <ASKL1plt:value>91</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>boolean-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Boolean 32 bits , due to bing endian</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>false</ASKL1plt:name>
+          <ASKL1plt:description>False</ASKL1plt:description>
+          <ASKL1plt:value>0</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>true</ASKL1plt:name>
+          <ASKL1plt:description>True</ASKL1plt:description>
+          <ASKL1plt:value>1</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>serdes-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Serdes Type</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>NA</ASKL1plt:name>
+          <ASKL1plt:description>No serdes</ASKL1plt:description>
+          <ASKL1plt:value>0</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>AVAGO</ASKL1plt:name>
+          <ASKL1plt:description>AVAGO</ASKL1plt:description>
+          <ASKL1plt:value>1</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>COMPHY</ASKL1plt:name>
+          <ASKL1plt:description>COMPHY</ASKL1plt:description>
+          <ASKL1plt:value>2</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>COMPHY_C12G</ASKL1plt:name>
+          <ASKL1plt:description>COMPHY_C12G</ASKL1plt:description>
+          <ASKL1plt:value>3</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>COMPHY_C28G</ASKL1plt:name>
+          <ASKL1plt:description>COMPHY_C28G</ASKL1plt:description>
+          <ASKL1plt:value>4</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>COMPHY_C112G</ASKL1plt:name>
+          <ASKL1plt:description>COMPHY_C112G</ASKL1plt:description>
+          <ASKL1plt:value>5</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>uint8-type</ASKL1plt:name>
+        <ASKL1plt:type>uint32</ASKL1plt:type>
+        <ASKL1plt:description>Uint8 32 bits , due to bing endian</ASKL1plt:description>
+        <ASKL1plt:min>0</ASKL1plt:min>
+        <ASKL1plt:max>255</ASKL1plt:max>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>serdes-termination-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>RX termination mode</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>GND</ASKL1plt:name>
+          <ASKL1plt:description>Enabled</ASKL1plt:description>
+          <ASKL1plt:value>0</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>VDD</ASKL1plt:name>
+          <ASKL1plt:description>Disabled</ASKL1plt:description>
+          <ASKL1plt:value>1</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>FLOATING</ASKL1plt:name>
+          <ASKL1plt:description>RS FEC enabled</ASKL1plt:description>
+          <ASKL1plt:value>2</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>port-interconnect-profile-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Enumerator of interconnect profile.</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>profile_default</ASKL1plt:name>
+          <ASKL1plt:description>Profile Default</ASKL1plt:description>
+          <ASKL1plt:value>0</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>profile_1</ASKL1plt:name>
+          <ASKL1plt:description>Profile 1</ASKL1plt:description>
+          <ASKL1plt:value>1</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>profile_2</ASKL1plt:name>
+          <ASKL1plt:description>Profile 2</ASKL1plt:description>
+          <ASKL1plt:value>2</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+    </ASKL1plt:typedefs>
+    <ASKL1plt:IfModeName>
+      <ASKL1plt:ifModeNameList>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">10GR1Fix</ASKL1plt:ifModeName>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">KR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">10G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">disabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+      </ASKL1plt:ifModeNameList>
+      <ASKL1plt:ifModeNameList>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">CR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">25G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">KR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">25G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">KR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">10G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">SR_LR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">25G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">SR_LR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">10G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">CR</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">25G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">KR</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">25G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">KR</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">10G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+      </ASKL1plt:ifModeNameList>
+    </ASKL1plt:IfModeName>
+    <ASKL1plt:Port>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">0</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">1</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">2</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">3</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">4</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">5</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">6</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">7</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">8</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">9</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">10</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">11</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">12</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">13</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">14</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">15</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">16</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">17</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">18</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">19</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">20</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">21</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">22</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">23</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">24</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">25</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">26</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">27</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">28</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">29</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">30</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">31</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">32</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">10GR1Fix</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+    </ASKL1plt:Port>
+  </ASKL1plt:ASK-L1>
+</data>
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON32X25G/ASK-PP-F12_8T_32x25G.md5 b/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON32X25G/ASK-PP-F12_8T_32x25G.md5
new file mode 100644
index 000000000..3c2807997
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON32X25G/ASK-PP-F12_8T_32x25G.md5
@@ -0,0 +1 @@
+1ed6046358d99524cdf9cd9e136a0efa
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON32X25G/ASK-PP-F12_8T_32x25G.xml b/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON32X25G/ASK-PP-F12_8T_32x25G.xml
new file mode 100644
index 000000000..e3239589f
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON32X25G/ASK-PP-F12_8T_32x25G.xml
@@ -0,0 +1,1180 @@
+<?xml version="1.0" encoding="utf-8"?>
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-02-19-1.06" profile="Askpp" sid="34f1c14a-b581-422d-bd10-426dfac013dd">
+  <askppplt:ASK-PP xmlns:askppplt="urn:marvell:askpp:yang">
+    <askppplt:typedefs>
+      <askppplt:typedef>
+        <askppplt:name>std-string</askppplt:name>
+        <askppplt:type>string</askppplt:type>
+        <askppplt:description>standard string.</askppplt:description>
+        <askppplt:min>1</askppplt:min>
+        <askppplt:max>100</askppplt:max>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>queue-id-type</askppplt:name>
+        <askppplt:type>uint32</askppplt:type>
+        <askppplt:description>Queue id</askppplt:description>
+        <askppplt:min>0</askppplt:min>
+        <askppplt:max>7</askppplt:max>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>precent-type</askppplt:name>
+        <askppplt:type>uint32</askppplt:type>
+        <askppplt:description>Precent</askppplt:description>
+        <askppplt:min>0</askppplt:min>
+        <askppplt:max>100</askppplt:max>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>phaThreadId-type</askppplt:name>
+        <askppplt:type>uint32</askppplt:type>
+        <askppplt:description>Thread id</askppplt:description>
+        <askppplt:min>1</askppplt:min>
+        <askppplt:max>255</askppplt:max>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>routing-mode-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies routing mode.</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>POLICY_BASED_ROUTING_ONLY</askppplt:name>
+          <askppplt:description>PBR only</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>TCAM_ROUTER_BASED</askppplt:name>
+          <askppplt:description>Router engine or PBR</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>shared-table-mode-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies table sharing modes for L3 (LPM), L2 (FDB), EM (Exact Match)</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>MID_L3_MID_L2_NO_EM</askppplt:name>
+          <askppplt:description>MID_L3_MID_L2_NO_EM</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>MID_L3_MID_L2_MIN_EM</askppplt:name>
+          <askppplt:description>MID_L3_MID_L2_MIN_EM</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>LOW_MAX_L3_MID_LOW_L2_NO_EM</askppplt:name>
+          <askppplt:description>LOW_MAX_L3_MID_LOW_L2_NO_EM</askppplt:description>
+          <askppplt:value>2</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>MAX_L3_MIN_L2_NO_EM</askppplt:name>
+          <askppplt:description>MAX_L3_MIN_L2_NO_EM</askppplt:description>
+          <askppplt:value>3</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>pha-firmware-image-id-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies supported Pha image id</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>DEFAULT</askppplt:name>
+          <askppplt:description>Default PHA firmware image ID</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>01</askppplt:name>
+          <askppplt:description>01 firmware image ID</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>02</askppplt:name>
+          <askppplt:description>02 PHA firmware image ID</askppplt:description>
+          <askppplt:value>2</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>pha-firmware-thread-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies supported Pha thread type</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>IOAM_INGRESS_SWITCH_IPV4</askppplt:name>
+          <askppplt:description>IOAM_INGRESS_SWITCH_IPV4</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>IOAM_INGRESS_SWITCH_IPV6</askppplt:name>
+          <askppplt:description>IOAM_INGRESS_SWITCH_IPV6</askppplt:description>
+          <askppplt:value>2</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>IOAM_TRANSIT_SWITCH_IPV4</askppplt:name>
+          <askppplt:description>IOAM_TRANSIT_SWITCH_IPV4</askppplt:description>
+          <askppplt:value>3</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>IOAM_TRANSIT_SWITCH_IPV6</askppplt:name>
+          <askppplt:description>IOAM_TRANSIT_SWITCH_IPV6</askppplt:description>
+          <askppplt:value>4</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>INT_IOAM_MIRRORING</askppplt:name>
+          <askppplt:description>INT_IOAM_MIRRORING</askppplt:description>
+          <askppplt:value>5</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>INT_IOAM_EGRESS_SWITCH</askppplt:name>
+          <askppplt:description>INT_IOAM_EGRESS_SWITCH</askppplt:description>
+          <askppplt:value>6</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>MPLS_SR_NO_EL</askppplt:name>
+          <askppplt:description>MPLS_SR_NO_EL</askppplt:description>
+          <askppplt:value>7</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>MPLS_SR_ONE_EL</askppplt:name>
+          <askppplt:description>MPLS_SR_ONE_EL</askppplt:description>
+          <askppplt:value>8</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>MPLS_SR_TWO_EL</askppplt:name>
+          <askppplt:description>MPLS_SR_TWO_EL</askppplt:description>
+          <askppplt:value>9</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>MPLS_SR_THREE_EL</askppplt:name>
+          <askppplt:description>MPLS_SR_THREE_EL</askppplt:description>
+          <askppplt:value>10</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>UNIFIED_SR</askppplt:name>
+          <askppplt:description>UNIFIED_SR</askppplt:description>
+          <askppplt:value>11</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>CLASSIFIER_NSH_OVER_ETHERNET</askppplt:name>
+          <askppplt:description>CLASSIFIER_NSH_OVER_ETHERNET</askppplt:description>
+          <askppplt:value>12</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>CLASSIFIER_NSH_OVER_VXLAN_GPE</askppplt:name>
+          <askppplt:description>CLASSIFIER_NSH_OVER_VXLAN_GPE</askppplt:description>
+          <askppplt:value>13</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SFF_NSH_VXLAN_GPE_TO_ETHERNET</askppplt:name>
+          <askppplt:description>SFF_NSH_VXLAN_GPE_TO_ETHERNET</askppplt:description>
+          <askppplt:value>14</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SFF_NSH_ETHERNET_TO_VXLAN_GPE</askppplt:name>
+          <askppplt:description>SFF_NSH_ETHERNET_TO_VXLAN_GPE</askppplt:description>
+          <askppplt:value>15</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>IOAM_EGRESS_SWITCH_IPV6</askppplt:name>
+          <askppplt:description>IOAM_EGRESS_SWITCH_IPV6</askppplt:description>
+          <askppplt:value>16</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_END_NODE</askppplt:name>
+          <askppplt:description>SRV6_END_NODE</askppplt:description>
+          <askppplt:value>17</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_PENULTIMATE_END_NODE</askppplt:name>
+          <askppplt:description>SRV6_PENULTIMATE_END_NODE</askppplt:description>
+          <askppplt:value>18</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_SRC_NODE_1_SEGMENT</askppplt:name>
+          <askppplt:description>SRV6_SRC_NODE_1_SEGMENT</askppplt:description>
+          <askppplt:value>19</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_SRC_NODE_FIRST_PASS_2_3_SEGMENTS</askppplt:name>
+          <askppplt:description>SRV6_SRC_NODE_FIRST_PASS_2_3_SEGMENTS</askppplt:description>
+          <askppplt:value>20</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_SRC_NODE_SECOND_PASS_3_SEGMENTS</askppplt:name>
+          <askppplt:description>SRV6_SRC_NODE_SECOND_PASS_3_SEGMENTS</askppplt:description>
+          <askppplt:value>21</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_SRC_NODE_SECOND_PASS_2_SEGMENTS</askppplt:name>
+          <askppplt:description>SRV6_SRC_NODE_SECOND_PASS_2_SEGMENTS</askppplt:description>
+          <askppplt:value>22</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_NETWORK_ADD_MSB</askppplt:name>
+          <askppplt:description>SGT_NETWORK_ADD_MSB</askppplt:description>
+          <askppplt:value>23</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_NETWORK_FIX</askppplt:name>
+          <askppplt:description>SGT_NETWORK_FIX</askppplt:description>
+          <askppplt:value>24</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_NETWORK_REMOVE</askppplt:name>
+          <askppplt:description>SGT_NETWORK_REMOVE</askppplt:description>
+          <askppplt:value>25</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_EDSA_FIX</askppplt:name>
+          <askppplt:description>SGT_EDSA_FIX</askppplt:description>
+          <askppplt:value>26</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_EDSA_REMOVE</askppplt:name>
+          <askppplt:description>SGT_EDSA_REMOVE</askppplt:description>
+          <askppplt:value>27</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_GBP_FIX_IPV4</askppplt:name>
+          <askppplt:description>SGT_GBP_FIX_IPV4</askppplt:description>
+          <askppplt:value>28</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_GBP_FIX_IPV6</askppplt:name>
+          <askppplt:description>SGT_GBP_FIX_IPV6</askppplt:description>
+          <askppplt:value>29</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_GBP_REMOVE_IPV4</askppplt:name>
+          <askppplt:description>SGT_GBP_REMOVE_IPV4</askppplt:description>
+          <askppplt:value>30</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_GBP_REMOVE_IPV6</askppplt:name>
+          <askppplt:description>SGT_GBP_REMOVE_IPV6</askppplt:description>
+          <askppplt:value>31</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>PTP_PHY_1_STEP</askppplt:name>
+          <askppplt:description>PTP_PHY_1_STEP</askppplt:description>
+          <askppplt:value>32</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>EGRESS_MIRRORING_METADATA</askppplt:name>
+          <askppplt:description>EGRESS_MIRRORING_METADATA</askppplt:description>
+          <askppplt:value>33</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>CC_ERSPAN_TYPE_II_TRG_DEV_LC_IPV4</askppplt:name>
+          <askppplt:description>CC_ERSPAN_TYPE_II_TRG_DEV_LC_IPV4</askppplt:description>
+          <askppplt:value>34</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>CC_ERSPAN_TYPE_II_TRG_DEV_LC_IPV6</askppplt:name>
+          <askppplt:description>CC_ERSPAN_TYPE_II_TRG_DEV_LC_IPV6</askppplt:description>
+          <askppplt:value>35</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>CC_ERSPAN_TYPE_II_TRG_DEV_DIRECT_IPV4</askppplt:name>
+          <askppplt:description>CC_ERSPAN_TYPE_II_TRG_DEV_DIRECT_IPV4</askppplt:description>
+          <askppplt:value>36</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>CC_ERSPAN_TYPE_II_TRG_DEV_DIRECT_IPV6</askppplt:name>
+          <askppplt:description>CC_ERSPAN_TYPE_II_TRG_DEV_DIRECT_IPV6</askppplt:description>
+          <askppplt:value>37</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>CC_ERSPAN_TYPE_II_SRC_DEV</askppplt:name>
+          <askppplt:description>CC_ERSPAN_TYPE_II_SRC_DEV</askppplt:description>
+          <askppplt:value>38</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>VXLAN_GBP_SOURCE_GROUP_POLICY_ID</askppplt:name>
+          <askppplt:description>VXLAN_GBP_SOURCE_GROUP_POLICY_ID</askppplt:description>
+          <askppplt:value>39</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_BEST_EFFORT</askppplt:name>
+          <askppplt:description>SRV6_BEST_EFFORT</askppplt:description>
+          <askppplt:value>40</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_SRC_NODE_1_CONTAINER</askppplt:name>
+          <askppplt:description>SRV6_SRC_NODE_1_CONTAINER</askppplt:description>
+          <askppplt:value>41</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_SRC_NODE_FIRST_PASS_2_3_CONTAINERS</askppplt:name>
+          <askppplt:description>SRV6_SRC_NODE_FIRST_PASS_2_3_CONTAINERS</askppplt:description>
+          <askppplt:value>42</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_SRC_NODE_SECOND_PASS_2_CONTAINERS</askppplt:name>
+          <askppplt:description>SRV6_SRC_NODE_SECOND_PASS_2_CONTAINERS</askppplt:description>
+          <askppplt:value>43</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_SRC_NODE_SECOND_PASS_3_CONTAINERS</askppplt:name>
+          <askppplt:description>SRV6_SRC_NODE_SECOND_PASS_3_CONTAINERS</askppplt:description>
+          <askppplt:value>44</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_END_NODE_COC32_GSID</askppplt:name>
+          <askppplt:description>SRV6_END_NODE_COC32_GSID</askppplt:description>
+          <askppplt:value>45</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>IPV4_TTL_INCREMENT</askppplt:name>
+          <askppplt:description>IPV4_TTL_INCREMENT</askppplt:description>
+          <askppplt:value>46</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>IPV6_HOP_LIMIT_INCREMENT</askppplt:name>
+          <askppplt:description>IPV6_HOP_LIMIT_INCREMENT</askppplt:description>
+          <askppplt:value>47</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>CLEAR_OUTGOING_MTAG_COMMAND</askppplt:name>
+          <askppplt:description>CLEAR_OUTGOING_MTAG_COMMAND</askppplt:description>
+          <askppplt:value>48</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SFLOW_V5_IPV4</askppplt:name>
+          <askppplt:description>SFLOW_V5_IPV4</askppplt:description>
+          <askppplt:value>49</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SFLOW_V5_IPV6</askppplt:name>
+          <askppplt:description>SFLOW_V5_IPV6</askppplt:description>
+          <askppplt:value>50</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SLS</askppplt:name>
+          <askppplt:description>SLS</askppplt:description>
+          <askppplt:value>51</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>trunk-member-mode-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies supported Pha image id</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>NATIVE</askppplt:name>
+          <askppplt:description>NATIVE
+*  the trunk members are filled
+*  according to the order given by application.
+*  Regular trunk may hold max of 8 members.
+*  Cascade trunk may hold :
+*  max of 64 members</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>FLEX</askppplt:name>
+          <askppplt:description>FLEX
+*  A mode to allows flexibility for
+*  each Regular trunk to state it's max number of members (before starting to add members).
+*  (this mode not effect 'cascade trunk' members)
+*  Regular trunk may hold : max of 4K members. (each trunk set it's own limit)
+*  Cascade trunk may hold : max of 64 members.</askppplt:description>
+          <askppplt:value>2</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>number-physical-port-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>AC3X/AC5X 128, falcon 64, 128, 256, 512, 1024</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>no-ports</askppplt:name>
+          <askppplt:description>no-ports</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>64-ports</askppplt:name>
+          <askppplt:description>64-ports</askppplt:description>
+          <askppplt:value>64</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>128-ports</askppplt:name>
+          <askppplt:description>128-ports</askppplt:description>
+          <askppplt:value>128</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>256-ports</askppplt:name>
+          <askppplt:description>256-ports</askppplt:description>
+          <askppplt:value>256</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>512-ports</askppplt:name>
+          <askppplt:description>512-ports</askppplt:description>
+          <askppplt:value>512</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>1024-ports</askppplt:name>
+          <askppplt:description>1024-ports</askppplt:description>
+          <askppplt:value>1024</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>serdes-ref-clock-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies serdes refernce clock.</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>external_25_single_ended</askppplt:name>
+          <askppplt:description>EXTERNAL_25_SINGLE_ENDED</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>external_125_single_ended</askppplt:name>
+          <askppplt:description>EXTERNAL_125_SINGLE_ENDED</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>external_125_diff</askppplt:name>
+          <askppplt:description>EXTERNAL_125_DIFF</askppplt:description>
+          <askppplt:value>2</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>external_156_25_single_ended</askppplt:name>
+          <askppplt:description>EXTERNAL_156_25_SINGLE_ENDED</askppplt:description>
+          <askppplt:value>3</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>external_156_25_diff</askppplt:name>
+          <askppplt:description>EXTERNAL_156_25_DIFF</askppplt:description>
+          <askppplt:value>4</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>internal_125</askppplt:name>
+          <askppplt:description>INTERNAL_125</askppplt:description>
+          <askppplt:value>5</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>cpu-port-id-type</askppplt:name>
+        <askppplt:type>uint32</askppplt:type>
+        <askppplt:description>CPU port id</askppplt:description>
+        <askppplt:min>0</askppplt:min>
+        <askppplt:max>7</askppplt:max>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>rx-buffer-size-type</askppplt:name>
+        <askppplt:type>uint32</askppplt:type>
+        <askppplt:description>Rx Buffer size</askppplt:description>
+        <askppplt:min>64</askppplt:min>
+        <askppplt:max>10240</askppplt:max>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>tx-sdma-queue-mode-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies TX queue mode.</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>Normal</askppplt:name>
+          <askppplt:description>Application</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>Packet_Generator</askppplt:name>
+          <askppplt:description>Traffic generator</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>alloc-method-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies Buffers allocation method.</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>Dynamic_Alloc</askppplt:name>
+          <askppplt:description>Dynamic</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>Static_Alloc</askppplt:name>
+          <askppplt:description>Static</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>au_mesage_lenght-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies Buffers allocation method.</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>4_words</askppplt:name>
+          <askppplt:description>4 Words</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>8_words</askppplt:name>
+          <askppplt:description>8 Words</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>boolean-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Boolean 32 bits , due to bing endian</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>false</askppplt:name>
+          <askppplt:description>False</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>true</askppplt:name>
+          <askppplt:description>True</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>asic-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>ASIC Type</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>ASIC_AC3X</askppplt:name>
+          <askppplt:description>AC3X</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>ASIC_AC5X</askppplt:name>
+          <askppplt:description>AC5X</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>ASIC_Falcon</askppplt:name>
+          <askppplt:description>FALCON</askppplt:description>
+          <askppplt:value>2</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+    </askppplt:typedefs>
+    <askppplt:ASIC_Type askppplt:type="asic-type">ASIC_Falcon</askppplt:ASIC_Type>
+    <askppplt:PPInit>
+      <askppplt:PP-name askppplt:type="std-string">Falcon-12.8</askppplt:PP-name>
+      <askppplt:Phase1>
+        <askppplt:coreClock askppplt:type="uint32">4294967295</askppplt:coreClock>
+        <askppplt:serdesRefClock askppplt:type="serdes-ref-clock-type">external_25_single_ended</askppplt:serdesRefClock>
+        <askppplt:isrAddrCompletionRegionsBmp askppplt:type="uint32">2</askppplt:isrAddrCompletionRegionsBmp>
+        <askppplt:appAddrCompletionRegionsBmp askppplt:type="uint32">60</askppplt:appAddrCompletionRegionsBmp>
+        <askppplt:maxNumOfPhyPortsToUse askppplt:type="number-physical-port-type">64-ports</askppplt:maxNumOfPhyPortsToUse>
+        <askppplt:tcamParityCalcEnable askppplt:type="boolean-type">false</askppplt:tcamParityCalcEnable>
+        <askppplt:apEnable askppplt:type="boolean-type">true</askppplt:apEnable>
+        <askppplt:numOfDataIntegrityElements askppplt:type="uint32">0</askppplt:numOfDataIntegrityElements>
+      </askppplt:Phase1>
+      <askppplt:Phase2>
+        <askppplt:useMultiNetIfSdma askppplt:type="boolean-type">true</askppplt:useMultiNetIfSdma>
+        <askppplt:auqCfg>
+          <askppplt:auDescNum askppplt:type="uint32">4096</askppplt:auDescNum>
+        </askppplt:auqCfg>
+        <askppplt:fuqCfg>
+          <askppplt:fuDescNum askppplt:type="uint32">2048</askppplt:fuDescNum>
+        </askppplt:fuqCfg>
+        <askppplt:multiNetIfCfg>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">0</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">7</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">6</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">5</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">4</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">3</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">2</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">1</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">0</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">7</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">6</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">5</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">4</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">3</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">2</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">1</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">0</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">7</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">6</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">5</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">4</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">3</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">2</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">1</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">0</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">7</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">6</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">5</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">4</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">3</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">2</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">1</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">0</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">1</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">2</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">3</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">4</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">5</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">6</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">7</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">0</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">1</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">2</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">3</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">4</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">5</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">6</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">7</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">0</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">1</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">2</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">3</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">4</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">5</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">6</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">7</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">0</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">1</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">2</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">3</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">4</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">5</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">6</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Packet_Generator</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">256</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">256</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">144</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">7</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Packet_Generator</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">1</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">1</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">3032</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+        </askppplt:multiNetIfCfg>
+        <askppplt:internal>
+          <askppplt:fuqUseSeparate askppplt:type="boolean-type">false</askppplt:fuqUseSeparate>
+          <askppplt:useSecondaryAuq askppplt:type="boolean-type">false</askppplt:useSecondaryAuq>
+          <askppplt:noTraffic2CPU askppplt:type="boolean-type">false</askppplt:noTraffic2CPU>
+          <askppplt:netifSdmaPortGroupId askppplt:type="uint32">0</askppplt:netifSdmaPortGroupId>
+          <askppplt:auMessageLength askppplt:type="au_mesage_lenght-type">8_words</askppplt:auMessageLength>
+          <askppplt:useDoubleAuq askppplt:type="boolean-type">false</askppplt:useDoubleAuq>
+        </askppplt:internal>
+      </askppplt:Phase2>
+      <askppplt:LogicalInit>
+        <askppplt:routingMode askppplt:type="routing-mode-type">TCAM_ROUTER_BASED</askppplt:routingMode>
+        <askppplt:maxNumOfPbrEntries askppplt:type="uint32">0</askppplt:maxNumOfPbrEntries>
+        <askppplt:sharedTableMode askppplt:type="shared-table-mode-type">MID_L3_MID_L2_NO_EM</askppplt:sharedTableMode>
+        <askppplt:ingressDropEnable askppplt:type="boolean-type">false</askppplt:ingressDropEnable>
+      </askppplt:LogicalInit>
+      <askppplt:LibInit>
+        <askppplt:initBridge askppplt:type="boolean-type">true</askppplt:initBridge>
+        <askppplt:initMirror askppplt:type="boolean-type">true</askppplt:initMirror>
+        <askppplt:initNetIf askppplt:type="boolean-type">true</askppplt:initNetIf>
+        <askppplt:initPhy askppplt:type="boolean-type">true</askppplt:initPhy>
+        <askppplt:initPort askppplt:type="boolean-type">true</askppplt:initPort>
+        <askppplt:initTrunk askppplt:type="boolean-type">true</askppplt:initTrunk>
+        <askppplt:Trunk-params>
+          <askppplt:maxNumberOfTrunks askppplt:type="uint32">1023</askppplt:maxNumberOfTrunks>
+          <askppplt:trunkMembersMode askppplt:type="trunk-member-mode-type">FLEX</askppplt:trunkMembersMode>
+        </askppplt:Trunk-params>
+        <askppplt:initPcl askppplt:type="boolean-type">true</askppplt:initPcl>
+        <askppplt:initTcam askppplt:type="boolean-type">true</askppplt:initTcam>
+        <askppplt:initPolicer askppplt:type="boolean-type">true</askppplt:initPolicer>
+        <askppplt:initPha askppplt:type="boolean-type">true</askppplt:initPha>
+        <askppplt:Pha-params>
+          <askppplt:packetOrderChangeEnable askppplt:type="boolean-type">false</askppplt:packetOrderChangeEnable>
+          <askppplt:phaFwImageId askppplt:type="pha-firmware-image-id-type">02</askppplt:phaFwImageId>
+          <askppplt:phaFwImageIdVersion askppplt:type="uint32">0</askppplt:phaFwImageIdVersion>
+        </askppplt:Pha-params>
+      </askppplt:LibInit>
+    </askppplt:PPInit>
+  </askppplt:ASK-PP>
+</data>
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON32X25G/SAI-F12_8T_32x25G.md5 b/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON32X25G/SAI-F12_8T_32x25G.md5
new file mode 100644
index 000000000..09f527592
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON32X25G/SAI-F12_8T_32x25G.md5
@@ -0,0 +1 @@
+f9c28ab49d1a1af723ec804226e061f8
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON32X25G/SAI-F12_8T_32x25G.xml b/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON32X25G/SAI-F12_8T_32x25G.xml
new file mode 100644
index 000000000..3c7443e9d
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON32X25G/SAI-F12_8T_32x25G.xml
@@ -0,0 +1,401 @@
+<?xml version="1.0" encoding="utf-8"?>
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-02-19-1.06" profile="SAI" sid="c310bbb1-ffca-4c99-9bae-f7d4caff5941">
+  <SAIplt:SAI xmlns:SAIplt="urn:marvell:SAI:yang">
+    <SAIplt:typedefs>
+      <SAIplt:typedef>
+        <SAIplt:name>device-id-type</SAIplt:name>
+        <SAIplt:type>uint32</SAIplt:type>
+        <SAIplt:description>Device ID 0..1</SAIplt:description>
+        <SAIplt:min>0</SAIplt:min>
+        <SAIplt:max>1</SAIplt:max>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>port-id-type</SAIplt:name>
+        <SAIplt:type>uint32</SAIplt:type>
+        <SAIplt:description>Interface number</SAIplt:description>
+        <SAIplt:min>0</SAIplt:min>
+        <SAIplt:max>1023</SAIplt:max>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>logDest-type</SAIplt:name>
+        <SAIplt:type>enumeration</SAIplt:type>
+        <SAIplt:description>Logging Feature Options</SAIplt:description>
+        <SAIplt:enum>
+          <SAIplt:name>SAI_LOG_SYSLOG</SAIplt:name>
+          <SAIplt:description>SYSLOG  {Syslog service should be running to use this option}</SAIplt:description>
+          <SAIplt:value>0</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>SAI_LOG_CONSOLE</SAIplt:name>
+          <SAIplt:description>CONSOLE</SAIplt:description>
+          <SAIplt:value>1</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>SAI_LOG_FILE</SAIplt:name>
+          <SAIplt:description>FILE  {Warning !!! Use with caution. Can cause disk full issues}</SAIplt:description>
+          <SAIplt:value>2</SAIplt:value>
+        </SAIplt:enum>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>InDropCounter-type</SAIplt:name>
+        <SAIplt:type>enumeration</SAIplt:type>
+        <SAIplt:description>Router In Drop Reason Feature Options</SAIplt:description>
+        <SAIplt:enum>
+          <SAIplt:name>TTL_HOPLIMIT_EXCEEDED</SAIplt:name>
+          <SAIplt:description>Router In Drop Counters track TTL &amp; Hop Limit Exceeded Packets</SAIplt:description>
+          <SAIplt:value>0</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>ROUTE_BLACKHOLE</SAIplt:name>
+          <SAIplt:description>Router In Drop Counters track Route Black Hole Packets</SAIplt:description>
+          <SAIplt:value>1</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>IN_DROP_ANY</SAIplt:name>
+          <SAIplt:description>Router In Drop Counters track either TTL &amp; Hop Limit Exceeded or Route Black Hole Packets</SAIplt:description>
+          <SAIplt:value>2</SAIplt:value>
+        </SAIplt:enum>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>log-dest-file-path-type</SAIplt:name>
+        <SAIplt:type>string</SAIplt:type>
+        <SAIplt:description>A string with path to file for logging feature</SAIplt:description>
+        <SAIplt:min>2</SAIplt:min>
+        <SAIplt:max>30</SAIplt:max>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>acl-feature-name-type</SAIplt:name>
+        <SAIplt:type>enumeration</SAIplt:type>
+        <SAIplt:description/>
+        <SAIplt:enum>
+          <SAIplt:name>port-sFlow</SAIplt:name>
+          <SAIplt:description>SFlow over Port</SAIplt:description>
+          <SAIplt:value>0</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>port-counters-ipv4-ipv6</SAIplt:name>
+          <SAIplt:description>Port ipv4/ipv6 counters</SAIplt:description>
+          <SAIplt:value>1</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>control-acl</SAIplt:name>
+          <SAIplt:description>ACLs for control packet handling</SAIplt:description>
+          <SAIplt:value>2</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>debug-counter-acl</SAIplt:name>
+          <SAIplt:description>ACLs for Debug Counters</SAIplt:description>
+          <SAIplt:value>3</SAIplt:value>
+        </SAIplt:enum>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>ingress-acl-stage-type</SAIplt:name>
+        <SAIplt:type>enumeration</SAIplt:type>
+        <SAIplt:description/>
+        <SAIplt:enum>
+          <SAIplt:name>disabled</SAIplt:name>
+          <SAIplt:description>Feature not enabled</SAIplt:description>
+          <SAIplt:value>0</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>IPCL0</SAIplt:name>
+          <SAIplt:description>Stage IPCL0</SAIplt:description>
+          <SAIplt:value>1</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>IPCL1</SAIplt:name>
+          <SAIplt:description>Stage IPCL1</SAIplt:description>
+          <SAIplt:value>2</SAIplt:value>
+        </SAIplt:enum>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>egress-acl-stage-type</SAIplt:name>
+        <SAIplt:type>enumeration</SAIplt:type>
+        <SAIplt:description/>
+        <SAIplt:enum>
+          <SAIplt:name>disabled</SAIplt:name>
+          <SAIplt:description>Feature not enabled</SAIplt:description>
+          <SAIplt:value>0</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>EPCL0</SAIplt:name>
+          <SAIplt:description>Stage EPCL0</SAIplt:description>
+          <SAIplt:value>2</SAIplt:value>
+        </SAIplt:enum>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>feature-priority-type</SAIplt:name>
+        <SAIplt:type>uint32</SAIplt:type>
+        <SAIplt:description>Feature priority</SAIplt:description>
+        <SAIplt:min>2</SAIplt:min>
+        <SAIplt:max>15</SAIplt:max>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>hit-number-type</SAIplt:name>
+        <SAIplt:type>uint32</SAIplt:type>
+        <SAIplt:description>Hit/lookup number</SAIplt:description>
+        <SAIplt:min>0</SAIplt:min>
+        <SAIplt:max>3</SAIplt:max>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>asic-type</SAIplt:name>
+        <SAIplt:type>enumeration</SAIplt:type>
+        <SAIplt:description>ASIC Type</SAIplt:description>
+        <SAIplt:enum>
+          <SAIplt:name>ASIC_AC3X</SAIplt:name>
+          <SAIplt:description>AC3X</SAIplt:description>
+          <SAIplt:value>0</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>ASIC_AC5X</SAIplt:name>
+          <SAIplt:description>AC5X</SAIplt:description>
+          <SAIplt:value>1</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>ASIC_Falcon</SAIplt:name>
+          <SAIplt:description>FALCON</SAIplt:description>
+          <SAIplt:value>2</SAIplt:value>
+        </SAIplt:enum>
+      </SAIplt:typedef>
+    </SAIplt:typedefs>
+    <SAIplt:ASIC_Type SAIplt:type="asic-type">ASIC_Falcon</SAIplt:ASIC_Type>
+    <SAIplt:ASK-BOARD-Profile-Name SAIplt:type="string">ASK-Board-F12_8T_32x25G.xml</SAIplt:ASK-BOARD-Profile-Name>
+    <SAIplt:Ports>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">0</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">31</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">1</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">30</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">2</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">29</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">3</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">28</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">4</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">27</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">5</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">26</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">6</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">25</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">7</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">24</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">8</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">23</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">9</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">22</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">10</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">21</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">11</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">20</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">12</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">19</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">13</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">18</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">14</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">17</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">15</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">16</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">16</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">15</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">17</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">14</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">18</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">13</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">19</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">12</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">20</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">11</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">21</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">10</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">22</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">9</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">23</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">8</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">24</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">7</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">25</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">6</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">26</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">5</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">27</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">4</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">28</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">3</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">29</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">2</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">30</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">1</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">31</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">0</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">32</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">32</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+    </SAIplt:Ports>
+    <SAIplt:scalingFalcon>
+      <SAIplt:max_lag_members SAIplt:type="uint32">8</SAIplt:max_lag_members>
+      <SAIplt:max_route_ipv4 SAIplt:type="uint32">0</SAIplt:max_route_ipv4>
+      <SAIplt:max_route_ipv6 SAIplt:type="uint32">0</SAIplt:max_route_ipv6>
+      <SAIplt:max_Nh_Ecmp_Mbr_Per_Grp SAIplt:type="uint32">64</SAIplt:max_Nh_Ecmp_Mbr_Per_Grp>
+      <SAIplt:max_ipv4_tunnel SAIplt:type="uint32">8</SAIplt:max_ipv4_tunnel>
+      <SAIplt:max_ipv6_tunnel SAIplt:type="uint32">8</SAIplt:max_ipv6_tunnel>
+      <SAIplt:max_tti SAIplt:type="uint32">1024</SAIplt:max_tti>
+      <SAIplt:wred_size SAIplt:type="uint32">0</SAIplt:wred_size>
+      <SAIplt:max_nat SAIplt:type="uint32">0</SAIplt:max_nat>
+    </SAIplt:scalingFalcon>
+    <SAIplt:Counters>
+      <SAIplt:cnc-base-list>
+        <SAIplt:counter-base SAIplt:type="uint32">0</SAIplt:counter-base>
+      </SAIplt:cnc-base-list>
+      <SAIplt:cnc-base-list>
+        <SAIplt:counter-base SAIplt:type="uint32">4096</SAIplt:counter-base>
+      </SAIplt:cnc-base-list>
+    </SAIplt:Counters>
+    <SAIplt:Logging>
+      <SAIplt:log_dest SAIplt:type="logDest-type">SAI_LOG_SYSLOG</SAIplt:log_dest>
+    </SAIplt:Logging>
+    <SAIplt:Features-using-acl>
+      <SAIplt:feature SAIplt:type="acl-feature-name-type">control-acl</SAIplt:feature>
+      <SAIplt:feature-priority SAIplt:type="feature-priority-type">3</SAIplt:feature-priority>
+      <SAIplt:Ingress>
+        <SAIplt:ingress-stage SAIplt:type="ingress-acl-stage-type">IPCL0</SAIplt:ingress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">1</SAIplt:hit-number>
+      </SAIplt:Ingress>
+      <SAIplt:Egress>
+        <SAIplt:egress-stage SAIplt:type="egress-acl-stage-type">EPCL0</SAIplt:egress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">0</SAIplt:hit-number>
+      </SAIplt:Egress>
+    </SAIplt:Features-using-acl>
+    <SAIplt:Features-using-acl>
+      <SAIplt:feature SAIplt:type="acl-feature-name-type">port-sFlow</SAIplt:feature>
+      <SAIplt:feature-priority SAIplt:type="feature-priority-type">4</SAIplt:feature-priority>
+      <SAIplt:Ingress>
+        <SAIplt:ingress-stage SAIplt:type="ingress-acl-stage-type">IPCL0</SAIplt:ingress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">0</SAIplt:hit-number>
+      </SAIplt:Ingress>
+      <SAIplt:Egress>
+        <SAIplt:egress-stage SAIplt:type="egress-acl-stage-type">EPCL0</SAIplt:egress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">0</SAIplt:hit-number>
+      </SAIplt:Egress>
+    </SAIplt:Features-using-acl>
+    <SAIplt:Features-using-acl>
+      <SAIplt:feature SAIplt:type="acl-feature-name-type">port-counters-ipv4-ipv6</SAIplt:feature>
+      <SAIplt:feature-priority SAIplt:type="feature-priority-type">5</SAIplt:feature-priority>
+      <SAIplt:Ingress>
+        <SAIplt:ingress-stage SAIplt:type="ingress-acl-stage-type">IPCL0</SAIplt:ingress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">3</SAIplt:hit-number>
+      </SAIplt:Ingress>
+      <SAIplt:Egress>
+        <SAIplt:egress-stage SAIplt:type="egress-acl-stage-type">EPCL0</SAIplt:egress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">0</SAIplt:hit-number>
+      </SAIplt:Egress>
+    </SAIplt:Features-using-acl>
+    <SAIplt:Features-using-acl>
+      <SAIplt:feature SAIplt:type="acl-feature-name-type">debug-counter-acl</SAIplt:feature>
+      <SAIplt:feature-priority SAIplt:type="feature-priority-type">2</SAIplt:feature-priority>
+      <SAIplt:Ingress>
+        <SAIplt:ingress-stage SAIplt:type="ingress-acl-stage-type">IPCL0</SAIplt:ingress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">1</SAIplt:hit-number>
+      </SAIplt:Ingress>
+      <SAIplt:Egress>
+        <SAIplt:egress-stage SAIplt:type="egress-acl-stage-type">EPCL0</SAIplt:egress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">0</SAIplt:hit-number>
+      </SAIplt:Egress>
+    </SAIplt:Features-using-acl>
+  </SAIplt:SAI>
+</data>
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON32X25G/port_config.ini b/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON32X25G/port_config.ini
index 6d8b5d0a1..939b74a02 100644
--- a/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON32X25G/port_config.ini
+++ b/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON32X25G/port_config.ini
@@ -1,34 +1,34 @@
-#  name      	      lanes      speed     alias
-Ethernet0		0        25000    twenty5GigE0
-Ethernet1		1        25000    twenty5GigE1
-Ethernet2		2        25000    twenty5GigE2
-Ethernet3		3        25000    twenty5GigE3
-Ethernet4		4        25000    twenty5GigE4
-Ethernet5		5        25000    twenty5GigE5
-Ethernet6		6        25000    twenty5GigE6
-Ethernet7		7        25000    twenty5GigE7
-Ethernet8		8        25000    twenty5GigE8
-Ethernet9		9        25000    twenty5GigE9
-Ethernet10		10       25000    twenty5GigE10
-Ethernet11		11       25000    twenty5GigE11
-Ethernet12		12       25000    twenty5GigE12
-Ethernet13		13       25000    twenty5GigE13
-Ethernet14		14       25000    twenty5GigE14
-Ethernet15		15       25000    twenty5GigE15
-Ethernet16		16       25000    twenty5GigE16
-Ethernet17		17       25000    twenty5GigE17
-Ethernet18		18       25000    twenty5GigE18
-Ethernet19		19       25000    twenty5GigE19
-Ethernet20		20       25000    twenty5GigE20
-Ethernet21		21       25000    twenty5GigE21
-Ethernet22		22       25000    twenty5GigE22
-Ethernet23		23       25000    twenty5GigE23
-Ethernet24		24       25000    twenty5GigE24
-Ethernet25		25       25000    twenty5GigE25
-Ethernet26		26       25000    twenty5GigE26
-Ethernet27		27       25000    twenty5GigE27
-Ethernet28		28       25000    twenty5GigE28
-Ethernet29		29       25000    twenty5GigE29
-Ethernet30		30       25000    twenty5GigE30
-Ethernet31		31       25000    twenty5GigE31
-Ethernet32		32       10000    tenGigE32
+#  name       lanes    alias             speed    autoneg    fec     index
+Ethernet0     0        twenty5GigE0      25000    on         none    1
+Ethernet1     1        twenty5GigE1      25000    on         none    2
+Ethernet2     2        twenty5GigE2      25000    on         none    3
+Ethernet3     3        twenty5GigE3      25000    on         none    4
+Ethernet4     4        twenty5GigE4      25000    on         none    5
+Ethernet5     5        twenty5GigE5      25000    on         none    6
+Ethernet6     6        twenty5GigE6      25000    on         none    7
+Ethernet7     7        twenty5GigE7      25000    on         none    8
+Ethernet8     8        twenty5GigE8      25000    on         none    9
+Ethernet9     9        twenty5GigE9      25000    on         none    10
+Ethernet10    10       twenty5GigE10     25000    on         none    11
+Ethernet11    11       twenty5GigE11     25000    on         none    12
+Ethernet12    12       twenty5GigE12     25000    on         none    13
+Ethernet13    13       twenty5GigE13     25000    on         none    14
+Ethernet14    14       twenty5GigE14     25000    on         none    15
+Ethernet15    15       twenty5GigE15     25000    on         none    16
+Ethernet16    16       twenty5GigE16     25000    on         none    17
+Ethernet17    17       twenty5GigE17     25000    on         none    18
+Ethernet18    18       twenty5GigE18     25000    on         none    19
+Ethernet19    19       twenty5GigE19     25000    on         none    20
+Ethernet20    20       twenty5GigE20     25000    on         none    21
+Ethernet21    21       twenty5GigE21     25000    on         none    22
+Ethernet22    22       twenty5GigE22     25000    on         none    23
+Ethernet23    23       twenty5GigE23     25000    on         none    24
+Ethernet24    24       twenty5GigE24     25000    on         none    25
+Ethernet25    25       twenty5GigE25     25000    on         none    26
+Ethernet26    26       twenty5GigE26     25000    on         none    27
+Ethernet27    27       twenty5GigE27     25000    on         none    28
+Ethernet28    28       twenty5GigE28     25000    on         none    29
+Ethernet29    29       twenty5GigE29     25000    on         none    30
+Ethernet30    30       twenty5GigE30     25000    on         none    31
+Ethernet31    31       twenty5GigE31     25000    on         none    32
+Ethernet32    32       tenGigE32         10000    off        none    33
diff --git a/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON32X25G/profile.ini b/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON32X25G/profile.ini
index 487e80dcb..c2f77685a 100644
--- a/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON32X25G/profile.ini
+++ b/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON32X25G/profile.ini
@@ -1,2 +1 @@
 switchMacAddress=00:01:02:03:04:05
-apPortListWithCableLen=000:1 001:1 002:1 003:1 004:1 005:1 006:1 007:1 008:1 009:1 010:1 011:1 012:1 013:1 014:1 015:1 016:1 017:1 018:1 019:1 020:1 021:1 022:1 023:1 024:1 025:1 026:1 027:1 028:1 029:1 030:1 031:1 032:1
diff --git a/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON32X25G/sai.profile b/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON32X25G/sai.profile
index dd6f707a8..3333fd4b7 100644
--- a/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON32X25G/sai.profile
+++ b/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON32X25G/sai.profile
@@ -1,3 +1,4 @@
 mode=1
 hwId=FALCON32X25G
+switchProfile=/usr/share/sonic/hwsku/SAI-F12_8T_32x25G.xml
 SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/profile.ini
diff --git a/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON32x400G/port_config.ini b/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON32x400G/port_config.ini
deleted file mode 100644
index 62dd91ba8..000000000
--- a/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON32x400G/port_config.ini
+++ /dev/null
@@ -1,34 +0,0 @@
-#  name      	        lanes                                speed     alias
-Ethernet0		0,1,2,3,4,5,6,7                      400000    four00GigE0
-Ethernet8		8,9,10,11,12,13,14,15                400000    four00GigE8
-Ethernet16		16,17,18,19,20,21,22,23              400000    four00GigE16
-Ethernet24		24,25,26,27,28,29,30,31              400000    four00GigE24
-Ethernet32		32,33,34,35,36,37,38,39              400000    four00GigE32
-Ethernet40		40,41,42,43,44,45,46,47              400000    four00GigE40
-Ethernet48		48,49,50,51,52,53,54,55              400000    four00GigE48
-Ethernet56		56,57,58,59,60,61,62,63              400000    four00GigE56
-Ethernet64		64,65,66,67,68,69,70,71              400000    four00GigE64
-Ethernet72		72,73,74,75,76,77,78,79              400000    four00GigE72
-Ethernet80		80,81,82,83,84,85,86,87              400000    four00GigE80
-Ethernet88		88,89,90,91,92,93,94,95              400000    four00GigE88
-Ethernet96		96,97,98,99,100,101,102,103          400000    four00GigE96
-Ethernet104		104,105,106,107,108,109,110,111      400000    four00GigE104
-Ethernet112		112,113,114,115,116,117,118,119      400000    four00GigE112
-Ethernet120		120,121,122,123,124,125,126,127      400000    four00GigE120
-Ethernet128		128,129,130,131,132,133,134,135      400000    four00GigE128
-Ethernet136		136,137,138,139,140,141,142,143      400000    four00GigE136
-Ethernet144		144,145,146,147,148,149,150,151      400000    four00GigE144
-Ethernet152		152,153,154,155,156,157,158,159      400000    four00GigE152
-Ethernet160		160,161,162,163,164,165,166,167      400000    four00GigE160
-Ethernet168		168,169,170,171,172,173,174,175      400000    four00GigE168
-Ethernet176		176,177,178,179,180,181,182,183      400000    four00GigE176
-Ethernet184		184,185,186,187,188,189,190,191      400000    four00GigE184
-Ethernet192		192,193,194,195,196,197,198,199      400000    four00GigE192
-Ethernet200		200,201,202,203,204,205,206,207      400000    four00GigE200
-Ethernet208		208,209,210,211,212,213,214,215      400000    four00GigE208
-Ethernet216		216,217,218,219,220,221,222,223      400000    four00GigE216
-Ethernet224		224,225,226,227,228,229,230,231      400000    four00GigE224
-Ethernet232		232,233,234,235,236,237,238,239      400000    four00GigE232
-Ethernet240		240,241,242,243,244,245,246,247      400000    four00GigE240
-Ethernet248		248,249,250,251,252,253,254,255      400000    four00GigE248
-Ethernet256		256                                  10000     tenGigE256
diff --git a/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON32x400G/profile.ini b/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON32x400G/profile.ini
deleted file mode 100644
index 2813bbd36..000000000
--- a/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON32x400G/profile.ini
+++ /dev/null
@@ -1,2 +0,0 @@
-switchMacAddress=00:01:02:03:04:05
-apPortListWithCableLen=000:1 008:1 016:1 024:1 032:1 040:1 048:1 056:1 064:1 072:1 080:1 088:1 096:1 104:1 112:1 120:1 128:1 136:1 144:1 152:1 160:1 168:1 176:1 184:1 192:1 200:1 208:1 216:1 224:1 232:1 240:1 248:1 256:1
diff --git a/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON32x400G/sai.profile b/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON32x400G/sai.profile
deleted file mode 100644
index 6dc6f35fe..000000000
--- a/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON32x400G/sai.profile
+++ /dev/null
@@ -1,3 +0,0 @@
-mode=1
-hwId=FALCON32x400G
-SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/profile.ini
diff --git a/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON_DB/ASK-Board-F12_8T-DB.md5 b/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON_DB/ASK-Board-F12_8T-DB.md5
new file mode 100644
index 000000000..55bbf0dc3
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON_DB/ASK-Board-F12_8T-DB.md5
@@ -0,0 +1 @@
+a9b91dd828b6322ed3b341a7c49fecbc
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON_DB/ASK-Board-F12_8T-DB.xml b/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON_DB/ASK-Board-F12_8T-DB.xml
new file mode 100644
index 000000000..a9d2ccf46
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON_DB/ASK-Board-F12_8T-DB.xml
@@ -0,0 +1,4978 @@
+<?xml version="1.0" encoding="utf-8"?>
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-02-19-1.06" profile="Askboard" sid="eb53f80b-5892-4f8b-9197-a6f626effaba">
+  <askboardplt:ASK-Board xmlns:askboardplt="urn:marvell:askboard:yang">
+    <askboardplt:typedefs>
+      <askboardplt:typedef>
+        <askboardplt:name>std-string</askboardplt:name>
+        <askboardplt:type>string</askboardplt:type>
+        <askboardplt:description>standard string.</askboardplt:description>
+        <askboardplt:min>1</askboardplt:min>
+        <askboardplt:max>100</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>board-callback-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies os/ext drv callback types.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>linux-static</askboardplt:name>
+          <askboardplt:description>Linux Static</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>linux-shared</askboardplt:name>
+          <askboardplt:description>Linux Shared Lib mode</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>external</askboardplt:name>
+          <askboardplt:description>External Os</askboardplt:description>
+          <askboardplt:value>3</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>freeBsd</askboardplt:name>
+          <askboardplt:description>Free BSD</askboardplt:description>
+          <askboardplt:value>4</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>board-pp-map-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies pci info types.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>fixed</askboardplt:name>
+          <askboardplt:description>Fixed</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>autoscan</askboardplt:name>
+          <askboardplt:description>Auto scan</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>board-pp-interface-channel-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies channel interface type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>pci</askboardplt:name>
+          <askboardplt:description>PCI</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>smi</askboardplt:name>
+          <askboardplt:description>SMI</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>twsi</askboardplt:name>
+          <askboardplt:description>TWSI</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>board-pp-as-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies Address space type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>4_regions</askboardplt:name>
+          <askboardplt:description>address-space 4 regions</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>8_regions</askboardplt:name>
+          <askboardplt:description>address-space 8 regions</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>atu</askboardplt:name>
+          <askboardplt:description>address translation unit</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>device-id-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Device ID 0..1</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>1</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>port-mapping-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies port map type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>ethernet_mac</askboardplt:name>
+          <askboardplt:description>ETHERNET_MAC</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>cpu_sdma</askboardplt:name>
+          <askboardplt:description>CPU_SDMA</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>interface-num-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Interface number</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>1023</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>txq-port-number-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>TXq port number </askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>99</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>phy-smi-interface-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Phy SMI interface type.</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>3</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>phy-xsmi-interface-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Phy XSMI interface type.</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>15</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>phy-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the PHY Part Identifier.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>NA</askboardplt:name>
+          <askboardplt:description>No Phy</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E1543</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E1543, used for Combo ports.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E1545</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E1545, used for Copper GE with MAC on PHY support.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E1680</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E1680, used for Copper with speeds of 10M/100M/1G.</askboardplt:description>
+          <askboardplt:value>3</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E151X</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E151X, used for Copper (HW supports combo and fiber).</askboardplt:description>
+          <askboardplt:value>4</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E3140</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E3140, used for Copper with speeds of 100M/1G/10G.
+Uses with FW SolarFlare next generation.</askboardplt:description>
+          <askboardplt:value>5</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E3240</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E3240, used for Copper with speeds of 100M/1G/10G.
+Uses with FW, SolarFlare next generation.</askboardplt:description>
+          <askboardplt:value>6</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E3680</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E3680, used for Octal Copper 100M.</askboardplt:description>
+          <askboardplt:value>7</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E3220</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E3220, used for Combo port with speeds of 100M/1G/10G.
+Uses FW, SolarFlare next generation.</askboardplt:description>
+          <askboardplt:value>8</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E1680L</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E1680L, used for Copper with speeds of 10M/100M/1G.</askboardplt:description>
+          <askboardplt:value>9</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E33X0</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E33X0, used for MGIG Combo.</askboardplt:description>
+          <askboardplt:value>10</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E1548</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E1548, used for Fiber GE.</askboardplt:description>
+          <askboardplt:value>11</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E20X0</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E20X0, used for Copper with speeds of 10M/100M/1G/2.5G/5G.</askboardplt:description>
+          <askboardplt:value>12</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E1512</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E1512, used for Copper with speeds of 10M/100M/1G.</askboardplt:description>
+          <askboardplt:value>13</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E2180</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E2180, used for Copper with speeds of 10M/100M/1G/2.5G/5G.</askboardplt:description>
+          <askboardplt:value>14</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E1780</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E1780, Integrated Octal 10/100/1000 Mbps Energy
+Efficient Ethernet Transceiver</askboardplt:description>
+          <askboardplt:value>15</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E2540</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E2540, 4 ports 10/100/1000/2.5G/5GBASE-T Ethernet
+Transceiver with IEEE 1588v2 PTP Support</askboardplt:description>
+          <askboardplt:value>16</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E2580</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E12580, Octal 10/100/1000/2.5G/5GBASE-T Ethernet Transceiver
+with IEEE 1588v2 PTP Support</askboardplt:description>
+          <askboardplt:value>17</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>physical-port-num-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>PHYSICAL PORT NUM</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>1023</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-port-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the ledstream port type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>PORT_TYPE_TRI_SPEED</askboardplt:name>
+          <askboardplt:description>tri-speed port.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>PORT_TYPE_XG</askboardplt:name>
+          <askboardplt:description>XG port.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-blink-select-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the LED stream blink select type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_SELECT_0</askboardplt:name>
+          <askboardplt:description>Blink 0 signal.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_SELECT_1</askboardplt:name>
+          <askboardplt:description>Blink 1 signal</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-order-mode-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the LED stream ordering mode.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>ORDER_MODE_BY_PORT</askboardplt:name>
+          <askboardplt:description>the indication order is arranged by port.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>ORDER_MODE_BY_CLASS</askboardplt:name>
+          <askboardplt:description>the indication order is arranged by class.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-blink-duty-cycle-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the LED stream blink cycle duty cycle type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DUTY_CYCLE_0</askboardplt:name>
+          <askboardplt:description>25% on, 75% off.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DUTY_CYCLE_1</askboardplt:name>
+          <askboardplt:description>50% on, 50% off.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DUTY_CYCLE_2</askboardplt:name>
+          <askboardplt:description>50% on, 50% off.</askboardplt:description>
+          <askboardplt:value>3</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DUTY_CYCLE_3</askboardplt:name>
+          <askboardplt:description>75% on, 25% off.</askboardplt:description>
+          <askboardplt:value>4</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-blink-duration-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the LED stream blink period type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DURATION_0</askboardplt:name>
+          <askboardplt:description>BLINK_DURATION_0.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DURATION_1</askboardplt:name>
+          <askboardplt:description>BLINK_DURATION_1.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DURATION_2</askboardplt:name>
+          <askboardplt:description>BLINK_DURATION_2.</askboardplt:description>
+          <askboardplt:value>3</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DURATION_3</askboardplt:name>
+          <askboardplt:description>BLINK_DURATION_3.</askboardplt:description>
+          <askboardplt:value>4</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DURATION_4</askboardplt:name>
+          <askboardplt:description>BLINK_DURATION_4.</askboardplt:description>
+          <askboardplt:value>5</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DURATION_5</askboardplt:name>
+          <askboardplt:description>BLINK_DURATION_5.</askboardplt:description>
+          <askboardplt:value>6</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DURATION_6</askboardplt:name>
+          <askboardplt:description>(APPLICABLE DEVICES: xCat3; AC5; Lion2; Bobcat2; Caelum; Aldrin; AC3X; Bobcat3; Aldrin2; Pipe) .</askboardplt:description>
+          <askboardplt:value>7</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DURATION_7</askboardplt:name>
+          <askboardplt:description>APPLICABLE DEVICES: Bobcat2; Caelum; Aldrin; AC3X; Bobcat3; Aldrin2; Pipe).</askboardplt:description>
+          <askboardplt:value>8</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-pulse-stretch-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the LED stream length of stretching for dynamic signals.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>PULSE_STRETCH_0_NO</askboardplt:name>
+          <askboardplt:description>PULSE_STRETCH_0_NO.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>PULSE_STRETCH_1</askboardplt:name>
+          <askboardplt:description>PULSE_STRETCH_1.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>PULSE_STRETCH_2</askboardplt:name>
+          <askboardplt:description>PULSE_STRETCH_2.</askboardplt:description>
+          <askboardplt:value>3</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>PULSE_STRETCH_3</askboardplt:name>
+          <askboardplt:description>PULSE_STRETCH_3.</askboardplt:description>
+          <askboardplt:value>4</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>PULSE_STRETCH_4</askboardplt:name>
+          <askboardplt:description>PULSE_STRETCH_4.</askboardplt:description>
+          <askboardplt:value>5</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>PULSE_STRETCH_5</askboardplt:name>
+          <askboardplt:description>PULSE_STRETCH_5.</askboardplt:description>
+          <askboardplt:value>6</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>PULSE_STRETCH_6</askboardplt:name>
+          <askboardplt:description>(APPLICABLE DEVICES: Bobcat2; Caelum; Aldrin; AC3X; Bobcat3; Aldrin2; Falcon; AC5P; Pipe).</askboardplt:description>
+          <askboardplt:value>7</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>PULSE_STRETCH_7</askboardplt:name>
+          <askboardplt:description>(APPLICABLE DEVICES: Bobcat2; Caelum; Aldrin; AC3X; Bobcat3; Aldrin2; Falcon; AC5P; Pipe).</askboardplt:description>
+          <askboardplt:value>8</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-clock-out-frequency-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the LED stream blink cycle duty cycle type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>_CLOCK_OUT_FREQUENCY_500</askboardplt:name>
+          <askboardplt:description>500 KHz LED clock frequency.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>CLOCK_OUT_FREQUENCY_1000</askboardplt:name>
+          <askboardplt:description>1 MHz LED clock frequency.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>CLOCK_OUT_FREQUENCY_2000</askboardplt:name>
+          <askboardplt:description>2 MHz LED clock frequency.</askboardplt:description>
+          <askboardplt:value>3</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>CLOCK_OUT_FREQUENCY_3000</askboardplt:name>
+          <askboardplt:description>3 MHz LED clock frequency.</askboardplt:description>
+          <askboardplt:value>4</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-class5-select-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the LED stream indication displayed on class5 (for dual-media port/phy).</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>CLASS_5_SELECT_HALF_DUPLEX</askboardplt:name>
+          <askboardplt:description>Half Duplex is displayed on class5.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>CLASS_5_SELECT_FIBER_LINK_UP</askboardplt:name>
+          <askboardplt:description>If port is a dual media port, Fiber Link Up is displayed on class5.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-class13-select-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the LED stream indication displayed on class13 (for dual-media port/phy).</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>CLASS_13_SELECT_LINK_DOWN</askboardplt:name>
+          <askboardplt:description>Link Down is displayed on class13.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>CLASS_13_SELECT_COPPER_LINK_UP</askboardplt:name>
+          <askboardplt:description>If port is a dual media port, Copper Link Up is displayed on class13.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-class-num-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Led Class number</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>11</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>boolean-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Boolean 32 bits , due to bing endian</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>false</askboardplt:name>
+          <askboardplt:description>False</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>true</askboardplt:name>
+          <askboardplt:description>True</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>bus-id-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Bus Id Type, PCI/SMI</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>255</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>function-id-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Function Id Type, PCI/SMI</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>255</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>domain-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Domain, PCI/SMI</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>255</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-interface-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Led interface</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>255</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-position-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Led position</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>63</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>serdes-lane-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>serdes lane</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>7</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>cpu-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>The CPU Internal/External</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>external</askboardplt:name>
+          <askboardplt:description>Extrenal connected CPU</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>internal</askboardplt:name>
+          <askboardplt:description>Internal CPU</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-clock-frequency-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Led Clock Frequency Sip6</askboardplt:description>
+        <askboardplt:min>500</askboardplt:min>
+        <askboardplt:max>80000</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-unit-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Led units</askboardplt:description>
+        <askboardplt:min>1</askboardplt:min>
+        <askboardplt:max>16</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-unit-or-no-unit-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Led units, 0 for no Unit</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>16</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-group-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Led Group</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>1</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-force-data-type</askboardplt:name>
+        <askboardplt:type>string</askboardplt:type>
+        <askboardplt:description>A hexadecimal string with octets represented as hex digits
+separated by colons.  The canonical representation uses
+lowercase characters.</askboardplt:description>
+        <askboardplt:min>3</askboardplt:min>
+        <askboardplt:max>11</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>bit-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Bit range 0..31</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>31</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>bit-size-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Bit leng 1..32</askboardplt:description>
+        <askboardplt:min>1</askboardplt:min>
+        <askboardplt:max>32</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-sip-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>The LED scehme</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>na</askboardplt:name>
+          <askboardplt:description>NA</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>sip5</askboardplt:name>
+          <askboardplt:description>SIP5: AC3x</askboardplt:description>
+          <askboardplt:value>5</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>sip6</askboardplt:name>
+          <askboardplt:description>SIP6: Falcon, AC5x</askboardplt:description>
+          <askboardplt:value>6</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>port-cscd-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the cascade port type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>DSA_1_WORD</askboardplt:name>
+          <askboardplt:description>DSA Regular</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>DSA_2_WORDS</askboardplt:name>
+          <askboardplt:description>DSA Extended</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>NETWORK</askboardplt:name>
+          <askboardplt:description>Network.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>DSA_3_WORDS</askboardplt:name>
+          <askboardplt:description>DSA 3 Words</askboardplt:description>
+          <askboardplt:value>3</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>DSA_4_WORD</askboardplt:name>
+          <askboardplt:description>DSA 4 Words</askboardplt:description>
+          <askboardplt:value>4</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>trunk-cscd-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Specifies the Cascade Trunk id.</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>127</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>port-trunk-cscd-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the cascade port type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>cscdPort</askboardplt:name>
+          <askboardplt:description>Cascade port</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>cscdTrunk</askboardplt:name>
+          <askboardplt:description>Csacde trunk</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>hash-cscd-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the hash used by cascade trunk.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>pkt</askboardplt:name>
+          <askboardplt:description>Hash based on packet</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>srcPort</askboardplt:name>
+          <askboardplt:description>Hash based on source port</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>asic-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>ASIC Type</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>ASIC_AC3X</askboardplt:name>
+          <askboardplt:description>AC3X</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>ASIC_AC5X</askboardplt:name>
+          <askboardplt:description>AC5X</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>ASIC_Falcon</askboardplt:name>
+          <askboardplt:description>FALCON</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+    </askboardplt:typedefs>
+    <askboardplt:ASIC_Type askboardplt:type="asic-type">ASIC_Falcon</askboardplt:ASIC_Type>
+    <askboardplt:boardName askboardplt:type="std-string">Falcon-12.8T-DB</askboardplt:boardName>
+    <askboardplt:osCallType askboardplt:type="board-callback-type">linux-static</askboardplt:osCallType>
+    <askboardplt:extDrvCallType askboardplt:type="board-callback-type">linux-static</askboardplt:extDrvCallType>
+    <askboardplt:mapType askboardplt:type="board-pp-map-type">autoscan</askboardplt:mapType>
+    <askboardplt:cpuType askboardplt:type="cpu-type">external</askboardplt:cpuType>
+    <askboardplt:mngInterfaceType askboardplt:type="board-pp-interface-channel-type">pci</askboardplt:mngInterfaceType>
+    <askboardplt:adressSpaceType askboardplt:type="board-pp-as-type">atu</askboardplt:adressSpaceType>
+    <askboardplt:device-list>
+      <askboardplt:devNum askboardplt:type="device-id-type">0</askboardplt:devNum>
+      <askboardplt:deviceId askboardplt:type="device-id-type">0</askboardplt:deviceId>
+      <askboardplt:pp-profile-name askboardplt:type="std-string">ASK-PP-F12_8T-DB.xml</askboardplt:pp-profile-name>
+      <askboardplt:L1-profile-name askboardplt:type="std-string">ASK-L1-F12_8T-DB.xml</askboardplt:L1-profile-name>
+      <askboardplt:ledStreamType askboardplt:type="led-sip-type">sip6</askboardplt:ledStreamType>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">0</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">32</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP4</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">0</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">1</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">33</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">2</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">34</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">3</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">35</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">4</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">36</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">5</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">37</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">6</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">38</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">7</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">39</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">8</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">40</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP5</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">1</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">9</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">41</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">10</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">42</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">11</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">43</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">12</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">44</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">13</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">45</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">14</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">46</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">15</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">47</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">16</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">48</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP6</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">0</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">17</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">49</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">18</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">50</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">19</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">51</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">20</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">52</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">21</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">53</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">22</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">54</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">23</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">55</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">24</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">56</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP7</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">1</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">25</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">57</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">26</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">58</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">27</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">59</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">28</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">60</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">29</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">61</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">30</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">62</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">31</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">63</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">32</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">64</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP0</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">0</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">33</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">65</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">34</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">66</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">35</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">67</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">36</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">68</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">37</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">69</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">38</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">70</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">39</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">71</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">40</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">72</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP1</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">1</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">41</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">73</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">42</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">74</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">43</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">75</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">44</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">76</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">45</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">77</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">46</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">78</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">47</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">79</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">48</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">80</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP2</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">0</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">49</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">81</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">50</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">82</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">51</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">83</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">52</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">84</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">53</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">85</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">54</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">86</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">55</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">87</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">56</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">88</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP3</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">1</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">57</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">89</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">58</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">90</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">59</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">91</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">60</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">92</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">64</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">93</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">65</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">94</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">66</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">95</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">67</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">96</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP4</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">0</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">68</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">97</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">69</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">98</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">70</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">99</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">71</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">100</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">72</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">101</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">73</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">102</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">74</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">103</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">75</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">104</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP5</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">1</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">76</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">105</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">77</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">106</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">78</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">107</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">79</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">108</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">80</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">109</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">81</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">110</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">82</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">111</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">83</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">112</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP6</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">0</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">84</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">113</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">85</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">114</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">86</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">115</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">87</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">116</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">88</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">117</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">89</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">118</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">90</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">119</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">91</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">120</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP7</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">1</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">92</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">121</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">93</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">122</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">94</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">123</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">95</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">124</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">96</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">125</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">97</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">126</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">98</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">127</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">99</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">128</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP0</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">0</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">100</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">130</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">101</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">132</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">102</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">134</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">103</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">136</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP1</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">1</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">104</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">138</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">105</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">140</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">106</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">142</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">107</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">144</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP2</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">0</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">108</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">146</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">109</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">148</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">110</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">150</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">111</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">152</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP3</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">1</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">112</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">154</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">113</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">156</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">114</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">158</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">115</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">160</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP4</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">0</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">116</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">164</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">117</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">168</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP5</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">1</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">118</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">172</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">119</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">176</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP6</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">0</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">120</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">180</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">121</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">184</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP7</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">1</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">122</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">188</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">123</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">192</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP0</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">0</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">124</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">196</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">125</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">200</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP1</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">1</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">126</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">204</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">127</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">208</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP2</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">0</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">128</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">212</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">129</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">216</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP3</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">1</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">130</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">220</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">131</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">224</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP4</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">0</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">132</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">232</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP5</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">1</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">133</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">240</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP6</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">0</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">134</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">248</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP7</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">1</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">135</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">0</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP0</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">0</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">136</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">8</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP1</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">1</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">137</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">16</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP2</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">0</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">138</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">24</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP3</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">1</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">139</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">258</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">2</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">63</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">cpu_sdma</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">273</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">140</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">cpu_sdma</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">274</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">142</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">cpu_sdma</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">275</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">141</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">cpu_sdma</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">276</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+      </askboardplt:portMap-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">32</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">38</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">34</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">39</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">33</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">37</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">36</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">35</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">40</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">45</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">41</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">46</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">42</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">47</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">44</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">43</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">50</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">54</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">49</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">51</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">48</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">52</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">53</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">55</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">57</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">62</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">58</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">63</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">56</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">60</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">59</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">61</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">64</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">71</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">66</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">68</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">65</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">69</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">67</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">70</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">72</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">77</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">73</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">79</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">75</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">74</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">76</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">78</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">81</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">85</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">80</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">87</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">84</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">82</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">83</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">86</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">88</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">94</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">89</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">95</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">90</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">91</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">92</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">93</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">96</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">102</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">98</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">103</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">97</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">101</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">100</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">99</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">104</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">109</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">105</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">110</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">106</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">111</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">108</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">107</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">114</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">118</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">113</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">115</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">112</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">116</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">117</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">119</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">121</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">126</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">122</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">127</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">120</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">124</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">123</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">125</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">128</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">135</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">130</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">132</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">129</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">133</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">131</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">134</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">136</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">141</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">137</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">143</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">139</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">138</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">140</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">142</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">145</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">149</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">144</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">151</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">148</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">146</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">147</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">150</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">152</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">158</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">153</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">159</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">154</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">155</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">156</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">157</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">160</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">166</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">162</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">167</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">161</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">165</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">164</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">163</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">168</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">173</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">169</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">174</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">170</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">175</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">176</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">172</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">171</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">178</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">182</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">177</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">179</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">180</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">181</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">183</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">185</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">190</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">186</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">191</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">184</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">188</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">187</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">189</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">192</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">199</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">194</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">196</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">193</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">197</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">195</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">198</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">200</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">205</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">201</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">207</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">203</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">202</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">204</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">206</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">209</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">213</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">208</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">215</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">212</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">210</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">211</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">214</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">216</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">222</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">217</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">223</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">218</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">219</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">220</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">221</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">224</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">230</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">226</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">231</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">225</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">229</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">228</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">227</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">232</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">237</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">233</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">238</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">234</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">239</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">236</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">235</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">242</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">246</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">241</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">243</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">240</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">244</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">245</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">247</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">249</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">254</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">250</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">255</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">248</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">252</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">251</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">253</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">0</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">7</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">2</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">4</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">1</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">5</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">3</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">6</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">8</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">13</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">9</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">15</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">11</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">10</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">12</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">14</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">17</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">21</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">16</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">23</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">20</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">18</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">19</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">22</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">24</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">30</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">25</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">31</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">26</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">27</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">28</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">29</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:Ledstream-interface-list>
+        <askboardplt:ledstream-interface-number askboardplt:type="led-interface-type">0</askboardplt:ledstream-interface-number>
+        <askboardplt:ledstream-configSet>
+          <askboardplt:ledOrganize askboardplt:type="led-stream-order-mode-type">ORDER_MODE_BY_CLASS</askboardplt:ledOrganize>
+          <askboardplt:blink0DutyCycle askboardplt:type="led-stream-blink-duty-cycle-type">BLINK_DUTY_CYCLE_0</askboardplt:blink0DutyCycle>
+          <askboardplt:blink0Duration askboardplt:type="led-stream-blink-duration-type">BLINK_DURATION_0</askboardplt:blink0Duration>
+          <askboardplt:blink1DutyCycle askboardplt:type="led-stream-blink-duty-cycle-type">BLINK_DUTY_CYCLE_0</askboardplt:blink1DutyCycle>
+          <askboardplt:blink1Duration askboardplt:type="led-stream-blink-duration-type">BLINK_DURATION_1</askboardplt:blink1Duration>
+          <askboardplt:pulseStretch askboardplt:type="led-stream-pulse-stretch-type">PULSE_STRETCH_1</askboardplt:pulseStretch>
+          <askboardplt:invertEnable askboardplt:type="boolean-type">false</askboardplt:invertEnable>
+          <askboardplt:SIP6ledClockFrequency askboardplt:type="led-stream-clock-frequency-type">1627</askboardplt:SIP6ledClockFrequency>
+          <askboardplt:ledClockPosEdgeModeEnable askboardplt:type="boolean-type">false</askboardplt:ledClockPosEdgeModeEnable>
+          <askboardplt:ledUnit-List>
+            <askboardplt:ledUnit askboardplt:type="led-unit-type">1</askboardplt:ledUnit>
+            <askboardplt:ledStart askboardplt:type="uint32">64</askboardplt:ledStart>
+            <askboardplt:ledEnd askboardplt:type="uint32">66</askboardplt:ledEnd>
+            <askboardplt:ledChainBypass askboardplt:type="boolean-type">false</askboardplt:ledChainBypass>
+          </askboardplt:ledUnit-List>
+          <askboardplt:ledUnit-List>
+            <askboardplt:ledUnit askboardplt:type="led-unit-type">2</askboardplt:ledUnit>
+            <askboardplt:ledStart askboardplt:type="uint32">64</askboardplt:ledStart>
+            <askboardplt:ledEnd askboardplt:type="uint32">65</askboardplt:ledEnd>
+            <askboardplt:ledChainBypass askboardplt:type="boolean-type">false</askboardplt:ledChainBypass>
+          </askboardplt:ledUnit-List>
+          <askboardplt:ledUnit-List>
+            <askboardplt:ledUnit askboardplt:type="led-unit-type">3</askboardplt:ledUnit>
+            <askboardplt:ledStart askboardplt:type="uint32">64</askboardplt:ledStart>
+            <askboardplt:ledEnd askboardplt:type="uint32">65</askboardplt:ledEnd>
+            <askboardplt:ledChainBypass askboardplt:type="boolean-type">false</askboardplt:ledChainBypass>
+          </askboardplt:ledUnit-List>
+          <askboardplt:ledUnit-List>
+            <askboardplt:ledUnit askboardplt:type="led-unit-type">4</askboardplt:ledUnit>
+            <askboardplt:ledStart askboardplt:type="uint32">64</askboardplt:ledStart>
+            <askboardplt:ledEnd askboardplt:type="uint32">66</askboardplt:ledEnd>
+            <askboardplt:ledChainBypass askboardplt:type="boolean-type">false</askboardplt:ledChainBypass>
+          </askboardplt:ledUnit-List>
+          <askboardplt:ledUnit-List>
+            <askboardplt:ledUnit askboardplt:type="led-unit-type">5</askboardplt:ledUnit>
+            <askboardplt:ledStart askboardplt:type="uint32">64</askboardplt:ledStart>
+            <askboardplt:ledEnd askboardplt:type="uint32">66</askboardplt:ledEnd>
+            <askboardplt:ledChainBypass askboardplt:type="boolean-type">false</askboardplt:ledChainBypass>
+          </askboardplt:ledUnit-List>
+          <askboardplt:ledUnit-List>
+            <askboardplt:ledUnit askboardplt:type="led-unit-type">6</askboardplt:ledUnit>
+            <askboardplt:ledStart askboardplt:type="uint32">64</askboardplt:ledStart>
+            <askboardplt:ledEnd askboardplt:type="uint32">65</askboardplt:ledEnd>
+            <askboardplt:ledChainBypass askboardplt:type="boolean-type">false</askboardplt:ledChainBypass>
+          </askboardplt:ledUnit-List>
+          <askboardplt:ledUnit-List>
+            <askboardplt:ledUnit askboardplt:type="led-unit-type">7</askboardplt:ledUnit>
+            <askboardplt:ledStart askboardplt:type="uint32">64</askboardplt:ledStart>
+            <askboardplt:ledEnd askboardplt:type="uint32">65</askboardplt:ledEnd>
+            <askboardplt:ledChainBypass askboardplt:type="boolean-type">false</askboardplt:ledChainBypass>
+          </askboardplt:ledUnit-List>
+          <askboardplt:ledUnit-List>
+            <askboardplt:ledUnit askboardplt:type="led-unit-type">8</askboardplt:ledUnit>
+            <askboardplt:ledStart askboardplt:type="uint32">64</askboardplt:ledStart>
+            <askboardplt:ledEnd askboardplt:type="uint32">66</askboardplt:ledEnd>
+            <askboardplt:ledChainBypass askboardplt:type="boolean-type">false</askboardplt:ledChainBypass>
+          </askboardplt:ledUnit-List>
+        </askboardplt:ledstream-configSet>
+        <askboardplt:ledstream-class-manipulation-list>
+          <askboardplt:classNum askboardplt:type="led-class-num-type">0</askboardplt:classNum>
+          <askboardplt:portType askboardplt:type="led-stream-port-type">PORT_TYPE_XG</askboardplt:portType>
+          <askboardplt:blinkEnable askboardplt:type="boolean-type">false</askboardplt:blinkEnable>
+          <askboardplt:blinkSelect askboardplt:type="led-stream-blink-select-type">BLINK_SELECT_0</askboardplt:blinkSelect>
+          <askboardplt:forceEnable askboardplt:type="boolean-type">false</askboardplt:forceEnable>
+          <askboardplt:pulseStretchEnable askboardplt:type="boolean-type">true</askboardplt:pulseStretchEnable>
+          <askboardplt:disableOnLinkDown askboardplt:type="boolean-type">false</askboardplt:disableOnLinkDown>
+        </askboardplt:ledstream-class-manipulation-list>
+        <askboardplt:ledstream-class-manipulation-list>
+          <askboardplt:classNum askboardplt:type="led-class-num-type">1</askboardplt:classNum>
+          <askboardplt:portType askboardplt:type="led-stream-port-type">PORT_TYPE_XG</askboardplt:portType>
+          <askboardplt:blinkEnable askboardplt:type="boolean-type">false</askboardplt:blinkEnable>
+          <askboardplt:blinkSelect askboardplt:type="led-stream-blink-select-type">BLINK_SELECT_0</askboardplt:blinkSelect>
+          <askboardplt:forceEnable askboardplt:type="boolean-type">false</askboardplt:forceEnable>
+          <askboardplt:pulseStretchEnable askboardplt:type="boolean-type">true</askboardplt:pulseStretchEnable>
+          <askboardplt:disableOnLinkDown askboardplt:type="boolean-type">false</askboardplt:disableOnLinkDown>
+        </askboardplt:ledstream-class-manipulation-list>
+        <askboardplt:ledstream-class-manipulation-list>
+          <askboardplt:classNum askboardplt:type="led-class-num-type">2</askboardplt:classNum>
+          <askboardplt:portType askboardplt:type="led-stream-port-type">PORT_TYPE_XG</askboardplt:portType>
+          <askboardplt:blinkEnable askboardplt:type="boolean-type">true</askboardplt:blinkEnable>
+          <askboardplt:blinkSelect askboardplt:type="led-stream-blink-select-type">BLINK_SELECT_0</askboardplt:blinkSelect>
+          <askboardplt:forceEnable askboardplt:type="boolean-type">false</askboardplt:forceEnable>
+          <askboardplt:pulseStretchEnable askboardplt:type="boolean-type">true</askboardplt:pulseStretchEnable>
+          <askboardplt:disableOnLinkDown askboardplt:type="boolean-type">true</askboardplt:disableOnLinkDown>
+        </askboardplt:ledstream-class-manipulation-list>
+        <askboardplt:ledstream-class-manipulation-list>
+          <askboardplt:classNum askboardplt:type="led-class-num-type">3</askboardplt:classNum>
+          <askboardplt:portType askboardplt:type="led-stream-port-type">PORT_TYPE_XG</askboardplt:portType>
+          <askboardplt:blinkEnable askboardplt:type="boolean-type">false</askboardplt:blinkEnable>
+          <askboardplt:blinkSelect askboardplt:type="led-stream-blink-select-type">BLINK_SELECT_0</askboardplt:blinkSelect>
+          <askboardplt:forceEnable askboardplt:type="boolean-type">false</askboardplt:forceEnable>
+          <askboardplt:pulseStretchEnable askboardplt:type="boolean-type">true</askboardplt:pulseStretchEnable>
+          <askboardplt:disableOnLinkDown askboardplt:type="boolean-type">false</askboardplt:disableOnLinkDown>
+        </askboardplt:ledstream-class-manipulation-list>
+        <askboardplt:ledstream-class-manipulation-list>
+          <askboardplt:classNum askboardplt:type="led-class-num-type">4</askboardplt:classNum>
+          <askboardplt:portType askboardplt:type="led-stream-port-type">PORT_TYPE_XG</askboardplt:portType>
+          <askboardplt:blinkEnable askboardplt:type="boolean-type">false</askboardplt:blinkEnable>
+          <askboardplt:blinkSelect askboardplt:type="led-stream-blink-select-type">BLINK_SELECT_0</askboardplt:blinkSelect>
+          <askboardplt:forceEnable askboardplt:type="boolean-type">false</askboardplt:forceEnable>
+          <askboardplt:pulseStretchEnable askboardplt:type="boolean-type">true</askboardplt:pulseStretchEnable>
+          <askboardplt:disableOnLinkDown askboardplt:type="boolean-type">false</askboardplt:disableOnLinkDown>
+        </askboardplt:ledstream-class-manipulation-list>
+        <askboardplt:ledstream-class-manipulation-list>
+          <askboardplt:classNum askboardplt:type="led-class-num-type">5</askboardplt:classNum>
+          <askboardplt:portType askboardplt:type="led-stream-port-type">PORT_TYPE_XG</askboardplt:portType>
+          <askboardplt:blinkEnable askboardplt:type="boolean-type">false</askboardplt:blinkEnable>
+          <askboardplt:blinkSelect askboardplt:type="led-stream-blink-select-type">BLINK_SELECT_0</askboardplt:blinkSelect>
+          <askboardplt:forceEnable askboardplt:type="boolean-type">false</askboardplt:forceEnable>
+          <askboardplt:pulseStretchEnable askboardplt:type="boolean-type">true</askboardplt:pulseStretchEnable>
+          <askboardplt:disableOnLinkDown askboardplt:type="boolean-type">false</askboardplt:disableOnLinkDown>
+        </askboardplt:ledstream-class-manipulation-list>
+      </askboardplt:Ledstream-interface-list>
+    </askboardplt:device-list>
+    <askboardplt:UDSFilePath askboardplt:type="std-string">/tmp/cpss_uds</askboardplt:UDSFilePath>
+    <askboardplt:serdesMux>
+      <askboardplt:serdesMuxSchemePortMod askboardplt:type="uint32">8</askboardplt:serdesMuxSchemePortMod>
+      <askboardplt:serdesMuxSchemeList>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP0</askboardplt:serdesMuxScheme>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">0</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">7</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">2</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">4</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">1</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">5</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">3</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">6</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+      </askboardplt:serdesMuxSchemeList>
+      <askboardplt:serdesMuxSchemeList>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP1</askboardplt:serdesMuxScheme>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">0</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">5</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">1</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">7</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">3</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">2</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">4</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">6</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+      </askboardplt:serdesMuxSchemeList>
+      <askboardplt:serdesMuxSchemeList>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP2</askboardplt:serdesMuxScheme>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">1</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">5</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">0</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">7</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">4</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">2</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">3</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">6</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+      </askboardplt:serdesMuxSchemeList>
+      <askboardplt:serdesMuxSchemeList>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP3</askboardplt:serdesMuxScheme>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">0</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">6</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">1</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">7</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">2</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">3</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">4</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">5</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+      </askboardplt:serdesMuxSchemeList>
+      <askboardplt:serdesMuxSchemeList>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP4</askboardplt:serdesMuxScheme>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">0</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">6</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">2</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">7</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">1</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">5</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">4</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">3</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+      </askboardplt:serdesMuxSchemeList>
+      <askboardplt:serdesMuxSchemeList>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP5</askboardplt:serdesMuxScheme>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">0</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">5</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">1</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">6</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">2</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">7</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">4</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">3</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+      </askboardplt:serdesMuxSchemeList>
+      <askboardplt:serdesMuxSchemeList>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP6</askboardplt:serdesMuxScheme>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">2</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">6</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">1</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">3</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">0</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">4</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">5</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">7</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+      </askboardplt:serdesMuxSchemeList>
+      <askboardplt:serdesMuxSchemeList>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP7</askboardplt:serdesMuxScheme>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">1</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">6</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">2</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">7</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">0</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">4</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">3</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">5</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+      </askboardplt:serdesMuxSchemeList>
+    </askboardplt:serdesMux>
+  </askboardplt:ASK-Board>
+</data>
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON_DB/ASK-L1-F12_8T-DB.md5 b/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON_DB/ASK-L1-F12_8T-DB.md5
new file mode 100644
index 000000000..dd2029e18
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON_DB/ASK-L1-F12_8T-DB.md5
@@ -0,0 +1 @@
+ea16f9a242a729d34f016aeb819b10c1
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON_DB/ASK-L1-F12_8T-DB.xml b/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON_DB/ASK-L1-F12_8T-DB.xml
new file mode 100644
index 000000000..c248b2556
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON_DB/ASK-L1-F12_8T-DB.xml
@@ -0,0 +1,1962 @@
+<?xml version="1.0" encoding="utf-8"?>
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-02-19-1.06" profile="Askl1" sid="71d3ab0f-3ac2-452a-a5c9-2dfdc969734a">
+  <ASKL1plt:ASK-L1 xmlns:ASKL1plt="urn:marvell:ASKL1:yang">
+    <ASKL1plt:typedefs>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>interface-mode-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Specifies supported Interface modes</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>1000BASE_X</ASKL1plt:name>
+          <ASKL1plt:description>1G</ASKL1plt:description>
+          <ASKL1plt:value>6</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>SGMII</ASKL1plt:name>
+          <ASKL1plt:description>1G , 2.5G</ASKL1plt:description>
+          <ASKL1plt:value>3</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>QSGMII</ASKL1plt:name>
+          <ASKL1plt:description>1G</ASKL1plt:description>
+          <ASKL1plt:value>13</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>KR</ASKL1plt:name>
+          <ASKL1plt:description>10G, 12G, 20G, 40G, 100G</ASKL1plt:description>
+          <ASKL1plt:value>16</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>SR_LR</ASKL1plt:name>
+          <ASKL1plt:description>5G, 10G, 12G, 20G, 40G</ASKL1plt:description>
+          <ASKL1plt:value>20</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>KR2</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>27</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>KR4</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>28</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>SR_LR2</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>29</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>SR_LR4</ASKL1plt:name>
+          <ASKL1plt:description>100G</ASKL1plt:description>
+          <ASKL1plt:value>30</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>KR_C</ASKL1plt:name>
+          <ASKL1plt:description>CONSORTIUM - 25G</ASKL1plt:description>
+          <ASKL1plt:value>32</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>CR_C</ASKL1plt:name>
+          <ASKL1plt:description>CONSORTIUM - 25G</ASKL1plt:description>
+          <ASKL1plt:value>33</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>KR2_C</ASKL1plt:name>
+          <ASKL1plt:description>CONSORTIUM - 50G</ASKL1plt:description>
+          <ASKL1plt:value>34</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>CR2_C</ASKL1plt:name>
+          <ASKL1plt:description>CONSORTIUM - 50G</ASKL1plt:description>
+          <ASKL1plt:value>35</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>CR</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>36</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>CR2</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>37</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>CR4</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>38</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>KR_S</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>39</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>CR_S</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>40</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>KR8</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>41</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>CR8</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>42</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>SR_LR8</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>43</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>USX_10G_QXGMII</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>51</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>USX_20G_QXGMII</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>52</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>USX_OUSGMII</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>53</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>USX_20G_OXGMII</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>54</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>NA</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>57</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>port-speed-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Specifies supported speeds</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>1G</ASKL1plt:name>
+          <ASKL1plt:description>1G</ASKL1plt:description>
+          <ASKL1plt:value>2</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>10G</ASKL1plt:name>
+          <ASKL1plt:description>10G</ASKL1plt:description>
+          <ASKL1plt:value>3</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>2500M</ASKL1plt:name>
+          <ASKL1plt:description>2.5G</ASKL1plt:description>
+          <ASKL1plt:value>5</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>5G</ASKL1plt:name>
+          <ASKL1plt:description>5G</ASKL1plt:description>
+          <ASKL1plt:value>6</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>25G</ASKL1plt:name>
+          <ASKL1plt:description>25G, used in combination with CPSS_PORT_INTERFACE_MODE_KR_E, CPSS_PORT_INTERFACE_MODE_KR2_E</ASKL1plt:description>
+          <ASKL1plt:value>21</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>40G</ASKL1plt:name>
+          <ASKL1plt:description>40G</ASKL1plt:description>
+          <ASKL1plt:value>9</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>50G</ASKL1plt:name>
+          <ASKL1plt:description>50G</ASKL1plt:description>
+          <ASKL1plt:value>14</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>100G</ASKL1plt:name>
+          <ASKL1plt:description>100G</ASKL1plt:description>
+          <ASKL1plt:value>13</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>200G</ASKL1plt:name>
+          <ASKL1plt:description>200G</ASKL1plt:description>
+          <ASKL1plt:value>24</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>400G</ASKL1plt:name>
+          <ASKL1plt:description>400G</ASKL1plt:description>
+          <ASKL1plt:value>25</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>NA</ASKL1plt:name>
+          <ASKL1plt:description>NA</ASKL1plt:description>
+          <ASKL1plt:value>35</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>fec-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Rx parameter type</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>enabled</ASKL1plt:name>
+          <ASKL1plt:description>Enabled</ASKL1plt:description>
+          <ASKL1plt:value>0</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>disabled</ASKL1plt:name>
+          <ASKL1plt:description>Disabled</ASKL1plt:description>
+          <ASKL1plt:value>1</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rs_enabled</ASKL1plt:name>
+          <ASKL1plt:description>RS FEC enabled</ASKL1plt:description>
+          <ASKL1plt:value>2</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>both_enabled</ASKL1plt:name>
+          <ASKL1plt:description>Both enabled</ASKL1plt:description>
+          <ASKL1plt:value>3</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rs_544_514_enabled</ASKL1plt:name>
+          <ASKL1plt:description>RS FEC 544 and 514</ASKL1plt:description>
+          <ASKL1plt:value>4</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>physical-port-num-type</ASKL1plt:name>
+        <ASKL1plt:type>uint32</ASKL1plt:type>
+        <ASKL1plt:description>PHYSICAL PORT NUM</ASKL1plt:description>
+        <ASKL1plt:min>0</ASKL1plt:min>
+        <ASKL1plt:max>1023</ASKL1plt:max>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>tx-param-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Tx parameter type</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>atten</ASKL1plt:name>
+          <ASKL1plt:description>atten</ASKL1plt:description>
+          <ASKL1plt:value>0</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>post</ASKL1plt:name>
+          <ASKL1plt:description>post</ASKL1plt:description>
+          <ASKL1plt:value>1</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>pre</ASKL1plt:name>
+          <ASKL1plt:description>pre</ASKL1plt:description>
+          <ASKL1plt:value>2</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>pre2</ASKL1plt:name>
+          <ASKL1plt:description>pre2</ASKL1plt:description>
+          <ASKL1plt:value>3</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>pre3</ASKL1plt:name>
+          <ASKL1plt:description>pre3</ASKL1plt:description>
+          <ASKL1plt:value>4</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>peak</ASKL1plt:name>
+          <ASKL1plt:description>peak</ASKL1plt:description>
+          <ASKL1plt:value>5</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>main</ASKL1plt:name>
+          <ASKL1plt:description>main</ASKL1plt:description>
+          <ASKL1plt:value>6</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>txAmpAdjEn</ASKL1plt:name>
+          <ASKL1plt:description>txAmpAdjEn</ASKL1plt:description>
+          <ASKL1plt:value>7</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>emph0</ASKL1plt:name>
+          <ASKL1plt:description>emph0</ASKL1plt:description>
+          <ASKL1plt:value>8</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>emph1</ASKL1plt:name>
+          <ASKL1plt:description>emph1</ASKL1plt:description>
+          <ASKL1plt:value>9</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>txAmpShft</ASKL1plt:name>
+          <ASKL1plt:description>txAmpShft</ASKL1plt:description>
+          <ASKL1plt:value>10</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>txEmphEn</ASKL1plt:name>
+          <ASKL1plt:description>txEmphEn</ASKL1plt:description>
+          <ASKL1plt:value>11</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>txEmphEn1</ASKL1plt:name>
+          <ASKL1plt:description>txEmphEn1</ASKL1plt:description>
+          <ASKL1plt:value>12</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>txAmpAdj</ASKL1plt:name>
+          <ASKL1plt:description>txAmpAdj</ASKL1plt:description>
+          <ASKL1plt:value>13</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>slewCtrlEn</ASKL1plt:name>
+          <ASKL1plt:description>slewCtrlEn</ASKL1plt:description>
+          <ASKL1plt:value>14</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>slewRate</ASKL1plt:name>
+          <ASKL1plt:description>slewRate</ASKL1plt:description>
+          <ASKL1plt:value>15</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>rx-param-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Rx parameter type</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>sqlch</ASKL1plt:name>
+          <ASKL1plt:description>sqlch</ASKL1plt:description>
+          <ASKL1plt:value>0</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>DC</ASKL1plt:name>
+          <ASKL1plt:description>DC</ASKL1plt:description>
+          <ASKL1plt:value>1</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>LF</ASKL1plt:name>
+          <ASKL1plt:description>LF</ASKL1plt:description>
+          <ASKL1plt:value>2</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>HF</ASKL1plt:name>
+          <ASKL1plt:description>HF</ASKL1plt:description>
+          <ASKL1plt:value>3</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>gainShape1</ASKL1plt:name>
+          <ASKL1plt:description>gainShape1</ASKL1plt:description>
+          <ASKL1plt:value>4</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>gainShape2</ASKL1plt:name>
+          <ASKL1plt:description>gainShape2</ASKL1plt:description>
+          <ASKL1plt:value>5</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>shortChannelEn</ASKL1plt:name>
+          <ASKL1plt:description>shortChannelEn</ASKL1plt:description>
+          <ASKL1plt:value>7</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>bfLf</ASKL1plt:name>
+          <ASKL1plt:description>bfLf</ASKL1plt:description>
+          <ASKL1plt:value>8</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>bfHf</ASKL1plt:name>
+          <ASKL1plt:description>bfHf</ASKL1plt:description>
+          <ASKL1plt:value>9</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>minLf</ASKL1plt:name>
+          <ASKL1plt:description>minLf</ASKL1plt:description>
+          <ASKL1plt:value>10</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>maxLf</ASKL1plt:name>
+          <ASKL1plt:description>maxLf</ASKL1plt:description>
+          <ASKL1plt:value>11</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>minHf</ASKL1plt:name>
+          <ASKL1plt:description>minHf</ASKL1plt:description>
+          <ASKL1plt:value>12</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>maxHf</ASKL1plt:name>
+          <ASKL1plt:description>maxHf</ASKL1plt:description>
+          <ASKL1plt:value>13</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>minPre1</ASKL1plt:name>
+          <ASKL1plt:description>minPre1</ASKL1plt:description>
+          <ASKL1plt:value>14</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>maxPre1</ASKL1plt:name>
+          <ASKL1plt:description>maxPre1</ASKL1plt:description>
+          <ASKL1plt:value>15</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>minPre2</ASKL1plt:name>
+          <ASKL1plt:description>minPre2</ASKL1plt:description>
+          <ASKL1plt:value>16</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>maxPre2</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>17</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>minPost</ASKL1plt:name>
+          <ASKL1plt:description>minPost</ASKL1plt:description>
+          <ASKL1plt:value>18</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>maxPost</ASKL1plt:name>
+          <ASKL1plt:description>maxPost</ASKL1plt:description>
+          <ASKL1plt:value>19</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>squelch</ASKL1plt:name>
+          <ASKL1plt:description>squelch</ASKL1plt:description>
+          <ASKL1plt:value>20</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>termination</ASKL1plt:name>
+          <ASKL1plt:description>termination</ASKL1plt:description>
+          <ASKL1plt:value>27</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>coldEnvelope</ASKL1plt:name>
+          <ASKL1plt:description>coldEnvelope</ASKL1plt:description>
+          <ASKL1plt:value>35</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>hotEnvelope</ASKL1plt:name>
+          <ASKL1plt:description>hotEnvelope</ASKL1plt:description>
+          <ASKL1plt:value>36</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>dcGain</ASKL1plt:name>
+          <ASKL1plt:description>dcGain</ASKL1plt:description>
+          <ASKL1plt:value>37</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>bandWidth</ASKL1plt:name>
+          <ASKL1plt:description>bandWidth</ASKL1plt:description>
+          <ASKL1plt:value>38</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>dfe</ASKL1plt:name>
+          <ASKL1plt:description>dfe</ASKL1plt:description>
+          <ASKL1plt:value>39</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>ffeR</ASKL1plt:name>
+          <ASKL1plt:description>ffeR</ASKL1plt:description>
+          <ASKL1plt:value>40</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>ffeC</ASKL1plt:name>
+          <ASKL1plt:description>ffeC</ASKL1plt:description>
+          <ASKL1plt:value>41</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>sampler</ASKL1plt:name>
+          <ASKL1plt:description>sampler</ASKL1plt:description>
+          <ASKL1plt:value>42</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>align90</ASKL1plt:name>
+          <ASKL1plt:description>align90</ASKL1plt:description>
+          <ASKL1plt:value>43</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>ffeS</ASKL1plt:name>
+          <ASKL1plt:description>ffeS</ASKL1plt:description>
+          <ASKL1plt:value>44</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>resSel</ASKL1plt:name>
+          <ASKL1plt:description>resSel</ASKL1plt:description>
+          <ASKL1plt:value>45</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>resShift</ASKL1plt:name>
+          <ASKL1plt:description>resShift</ASKL1plt:description>
+          <ASKL1plt:value>46</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>capSel</ASKL1plt:name>
+          <ASKL1plt:description>capSel</ASKL1plt:description>
+          <ASKL1plt:value>47</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>ffeSettingForce</ASKL1plt:name>
+          <ASKL1plt:description>ffeSettingForce</ASKL1plt:description>
+          <ASKL1plt:value>48</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>adaptedResSel</ASKL1plt:name>
+          <ASKL1plt:description>adaptedResSel</ASKL1plt:description>
+          <ASKL1plt:value>49</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>adaptedCapSel</ASKL1plt:name>
+          <ASKL1plt:description>adaptedCapSel</ASKL1plt:description>
+          <ASKL1plt:value>50</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>selmufi</ASKL1plt:name>
+          <ASKL1plt:description>selmufi</ASKL1plt:description>
+          <ASKL1plt:value>51</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>selmuff</ASKL1plt:name>
+          <ASKL1plt:description>selmuff</ASKL1plt:description>
+          <ASKL1plt:value>52</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>selmupi</ASKL1plt:name>
+          <ASKL1plt:description>selmupi</ASKL1plt:description>
+          <ASKL1plt:value>53</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>selmupf</ASKL1plt:name>
+          <ASKL1plt:description>selmupf</ASKL1plt:description>
+          <ASKL1plt:value>54</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>slewRateCtrl0</ASKL1plt:name>
+          <ASKL1plt:description>slewRateCtrl0</ASKL1plt:description>
+          <ASKL1plt:value>55</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>slewRateCtrl1</ASKL1plt:name>
+          <ASKL1plt:description>slewRateCtrl1</ASKL1plt:description>
+          <ASKL1plt:value>56</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>EO</ASKL1plt:name>
+          <ASKL1plt:description>EO</ASKL1plt:description>
+          <ASKL1plt:value>57</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>dataRate</ASKL1plt:name>
+          <ASKL1plt:description>dataRate</ASKL1plt:description>
+          <ASKL1plt:value>58</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>res1Sel</ASKL1plt:name>
+          <ASKL1plt:description>res1Sel</ASKL1plt:description>
+          <ASKL1plt:value>59</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>res2Sel</ASKL1plt:name>
+          <ASKL1plt:description>res2Sel</ASKL1plt:description>
+          <ASKL1plt:value>60</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>cap1Sel</ASKL1plt:name>
+          <ASKL1plt:description>cap1Sel</ASKL1plt:description>
+          <ASKL1plt:value>61</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>cap2Sel</ASKL1plt:name>
+          <ASKL1plt:description>cap2Sel</ASKL1plt:description>
+          <ASKL1plt:value>62</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>midpointLargeThresKLane</ASKL1plt:name>
+          <ASKL1plt:description>midpointLargeThresKLane</ASKL1plt:description>
+          <ASKL1plt:value>63</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>midpointSmallThresKLane</ASKL1plt:name>
+          <ASKL1plt:description>midpointSmallThresKLane</ASKL1plt:description>
+          <ASKL1plt:value>64</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>midpointLargeThresCLane</ASKL1plt:name>
+          <ASKL1plt:description>midpointLargeThresCLane</ASKL1plt:description>
+          <ASKL1plt:value>65</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>midpointSmallThresCLane</ASKL1plt:name>
+          <ASKL1plt:description>midpointSmallThresCLane</ASKL1plt:description>
+          <ASKL1plt:value>66</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>dfeResF0aHighThresInitLane</ASKL1plt:name>
+          <ASKL1plt:description>dfeResF0aHighThresInitLane</ASKL1plt:description>
+          <ASKL1plt:value>67</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>dfeResF0aHighThresEndLane</ASKL1plt:name>
+          <ASKL1plt:description>dfeResF0aHighThresEndLane</ASKL1plt:description>
+          <ASKL1plt:value>68</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>current1Sel</ASKL1plt:name>
+          <ASKL1plt:description>current1Sel</ASKL1plt:description>
+          <ASKL1plt:value>69</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rl1Sel</ASKL1plt:name>
+          <ASKL1plt:description>rl1Sel</ASKL1plt:description>
+          <ASKL1plt:value>70</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rl1Extra</ASKL1plt:name>
+          <ASKL1plt:description>rl1Extra</ASKL1plt:description>
+          <ASKL1plt:value>71</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>cl1Ctrl</ASKL1plt:name>
+          <ASKL1plt:description>cl1Ctrl</ASKL1plt:description>
+          <ASKL1plt:value>72</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>enMidFreq</ASKL1plt:name>
+          <ASKL1plt:description>enMidFreq</ASKL1plt:description>
+          <ASKL1plt:value>73</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>cs1Mid</ASKL1plt:name>
+          <ASKL1plt:description>cs1Mid</ASKL1plt:description>
+          <ASKL1plt:value>74</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rs1Mid</ASKL1plt:name>
+          <ASKL1plt:description>rs1Mid</ASKL1plt:description>
+          <ASKL1plt:value>75</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rfCtrl</ASKL1plt:name>
+          <ASKL1plt:description>rfCtrl</ASKL1plt:description>
+          <ASKL1plt:value>76</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rl1TiaSel</ASKL1plt:name>
+          <ASKL1plt:description>rl1TiaSel</ASKL1plt:description>
+          <ASKL1plt:value>77</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rl1TiaExtra</ASKL1plt:name>
+          <ASKL1plt:description>rl1TiaExtra</ASKL1plt:description>
+          <ASKL1plt:value>78</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>hpfRSel1st</ASKL1plt:name>
+          <ASKL1plt:description>hpfRSel1st</ASKL1plt:description>
+          <ASKL1plt:value>79</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>current1TiaSel</ASKL1plt:name>
+          <ASKL1plt:description>current1TiaSel</ASKL1plt:description>
+          <ASKL1plt:value>80</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rl2Tune</ASKL1plt:name>
+          <ASKL1plt:description>rl2Tune</ASKL1plt:description>
+          <ASKL1plt:value>81</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rl2Sel</ASKL1plt:name>
+          <ASKL1plt:description>rl2Sel</ASKL1plt:description>
+          <ASKL1plt:value>82</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rs2Sel</ASKL1plt:name>
+          <ASKL1plt:description>rs2Sel</ASKL1plt:description>
+          <ASKL1plt:value>83</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>current2Sel</ASKL1plt:name>
+          <ASKL1plt:description>current2Sel</ASKL1plt:description>
+          <ASKL1plt:value>84</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>hpfRsel2nd</ASKL1plt:name>
+          <ASKL1plt:description>hpfRsel2nd</ASKL1plt:description>
+          <ASKL1plt:value>85</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>BW</ASKL1plt:name>
+          <ASKL1plt:description>BW</ASKL1plt:description>
+          <ASKL1plt:value>86</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>dfeGAIN</ASKL1plt:name>
+          <ASKL1plt:description>dfeGAIN</ASKL1plt:description>
+          <ASKL1plt:value>87</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>dfeGAIN2</ASKL1plt:name>
+          <ASKL1plt:description>dfeGAIN2</ASKL1plt:description>
+          <ASKL1plt:value>88</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>pre1</ASKL1plt:name>
+          <ASKL1plt:description>pre1</ASKL1plt:description>
+          <ASKL1plt:value>89</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>pre2</ASKL1plt:name>
+          <ASKL1plt:description>pre2</ASKL1plt:description>
+          <ASKL1plt:value>90</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>post1</ASKL1plt:name>
+          <ASKL1plt:description>post1</ASKL1plt:description>
+          <ASKL1plt:value>91</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>boolean-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Boolean 32 bits , due to bing endian</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>false</ASKL1plt:name>
+          <ASKL1plt:description>False</ASKL1plt:description>
+          <ASKL1plt:value>0</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>true</ASKL1plt:name>
+          <ASKL1plt:description>True</ASKL1plt:description>
+          <ASKL1plt:value>1</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>serdes-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Serdes Type</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>NA</ASKL1plt:name>
+          <ASKL1plt:description>No serdes</ASKL1plt:description>
+          <ASKL1plt:value>0</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>AVAGO</ASKL1plt:name>
+          <ASKL1plt:description>AVAGO</ASKL1plt:description>
+          <ASKL1plt:value>1</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>COMPHY</ASKL1plt:name>
+          <ASKL1plt:description>COMPHY</ASKL1plt:description>
+          <ASKL1plt:value>2</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>COMPHY_C12G</ASKL1plt:name>
+          <ASKL1plt:description>COMPHY_C12G</ASKL1plt:description>
+          <ASKL1plt:value>3</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>COMPHY_C28G</ASKL1plt:name>
+          <ASKL1plt:description>COMPHY_C28G</ASKL1plt:description>
+          <ASKL1plt:value>4</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>COMPHY_C112G</ASKL1plt:name>
+          <ASKL1plt:description>COMPHY_C112G</ASKL1plt:description>
+          <ASKL1plt:value>5</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>uint8-type</ASKL1plt:name>
+        <ASKL1plt:type>uint32</ASKL1plt:type>
+        <ASKL1plt:description>Uint8 32 bits , due to bing endian</ASKL1plt:description>
+        <ASKL1plt:min>0</ASKL1plt:min>
+        <ASKL1plt:max>255</ASKL1plt:max>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>serdes-termination-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>RX termination mode</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>GND</ASKL1plt:name>
+          <ASKL1plt:description>Enabled</ASKL1plt:description>
+          <ASKL1plt:value>0</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>VDD</ASKL1plt:name>
+          <ASKL1plt:description>Disabled</ASKL1plt:description>
+          <ASKL1plt:value>1</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>FLOATING</ASKL1plt:name>
+          <ASKL1plt:description>RS FEC enabled</ASKL1plt:description>
+          <ASKL1plt:value>2</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>port-interconnect-profile-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Enumerator of interconnect profile.</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>profile_default</ASKL1plt:name>
+          <ASKL1plt:description>Profile Default</ASKL1plt:description>
+          <ASKL1plt:value>0</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>profile_1</ASKL1plt:name>
+          <ASKL1plt:description>Profile 1</ASKL1plt:description>
+          <ASKL1plt:value>1</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>profile_2</ASKL1plt:name>
+          <ASKL1plt:description>Profile 2</ASKL1plt:description>
+          <ASKL1plt:value>2</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+    </ASKL1plt:typedefs>
+    <ASKL1plt:IfModeName>
+      <ASKL1plt:ifModeNameList>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR2</ASKL1plt:ifModeName>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">CR2</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">100G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">KR2</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">100G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">SR_LR2</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">100G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">SR_LR2</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">50G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">CR2</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">50G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">KR2</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">50G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">CR2</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">100G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">KR2</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">100G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">CR2</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">50G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">KR2</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">50G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+      </ASKL1plt:ifModeNameList>
+      <ASKL1plt:ifModeNameList>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:ifModeName>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">CR4</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">100G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">KR4</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">100G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">SR_LR4</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">100G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">CR4</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">100G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">KR4</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">100G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+      </ASKL1plt:ifModeNameList>
+      <ASKL1plt:ifModeNameList>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">10GR1</ASKL1plt:ifModeName>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">KR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">10G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">SR_LR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">10G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">KR</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">10G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+      </ASKL1plt:ifModeNameList>
+      <ASKL1plt:ifModeNameList>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">10GR1Fix</ASKL1plt:ifModeName>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">KR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">10G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">disabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+      </ASKL1plt:ifModeNameList>
+      <ASKL1plt:ifModeNameList>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">200GR4</ASKL1plt:ifModeName>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">CR4</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">200G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">SR_LR4</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">100G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">KR4</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">100G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">CR4</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">100G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">KR4</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">200G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">SR_LR4</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">200G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">CR4</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">200G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">KR4</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">200G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">CR4</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">100G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">KR4</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">100G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+      </ASKL1plt:ifModeNameList>
+      <ASKL1plt:ifModeNameList>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">CR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">25G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">KR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">25G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">KR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">10G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">SR_LR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">25G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">SR_LR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">10G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">CR</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">25G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">KR</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">25G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">KR</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">10G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+      </ASKL1plt:ifModeNameList>
+      <ASKL1plt:ifModeNameList>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">400GR8</ASKL1plt:ifModeName>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">CR8</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">400G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">KR8</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">400G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">SR_LR8</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">400G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">CR8</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">400G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">KR8</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">400G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+      </ASKL1plt:ifModeNameList>
+      <ASKL1plt:ifModeNameList>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">CR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">50G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">KR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">50G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">CR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">25G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">KR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">25G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">KR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">10G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">SR_LR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">50G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">SR_LR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">25G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">SR_LR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">10G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">CR</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">50G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">KR</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">50G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">CR</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">25G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">KR</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">25G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">KR</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">10G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+      </ASKL1plt:ifModeNameList>
+    </ASKL1plt:IfModeName>
+    <ASKL1plt:Port>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">0</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">10GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">1</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">10GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">2</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">10GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">3</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">10GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">4</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">10GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">5</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">10GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">6</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">10GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">7</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">10GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">8</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">10GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">9</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">10GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">10</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">10GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">11</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">10GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">12</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">10GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">13</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">10GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">14</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">10GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">15</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">10GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">16</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">10GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">17</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">10GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">18</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">10GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">19</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">10GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">20</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">10GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">21</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">10GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">22</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">10GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">23</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">10GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">24</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">10GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">25</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">10GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">26</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">10GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">27</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">10GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">28</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">10GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">29</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">10GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">30</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">10GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">31</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">10GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">32</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">33</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">34</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">35</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">36</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">37</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">38</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">39</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">40</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">41</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">42</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">43</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">44</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">45</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">46</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">47</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">48</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">49</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">50</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">51</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">52</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">53</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">54</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">55</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">56</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">57</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">58</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">59</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">60</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">64</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">65</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">66</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">67</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">68</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">69</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">70</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">71</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">72</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">73</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">74</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">75</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">76</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">77</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">78</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">79</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">80</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">81</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">82</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">83</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">84</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">85</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">86</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">87</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">88</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">89</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">90</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">91</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">92</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">93</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">94</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">95</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">96</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">97</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">98</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">99</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR2</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">100</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR2</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">101</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR2</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">102</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR2</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">103</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR2</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">104</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR2</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">105</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR2</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">106</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR2</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">107</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR2</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">108</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR2</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">109</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR2</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">110</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR2</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">111</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR2</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">112</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR2</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">113</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR2</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">114</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR2</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">115</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">116</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">117</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">118</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">119</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">120</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">121</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">122</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">123</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">200GR4</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">124</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">200GR4</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">125</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">200GR4</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">126</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">200GR4</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">127</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">200GR4</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">128</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">200GR4</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">129</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">200GR4</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">130</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">200GR4</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">131</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">400GR8</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">132</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">400GR8</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">133</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">400GR8</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">134</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">400GR8</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">135</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">400GR8</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">136</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">400GR8</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">137</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">400GR8</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">138</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">400GR8</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">139</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">10GR1Fix</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+    </ASKL1plt:Port>
+  </ASKL1plt:ASK-L1>
+</data>
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON_DB/ASK-PP-F12_8T-DB.md5 b/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON_DB/ASK-PP-F12_8T-DB.md5
new file mode 100644
index 000000000..9980130ff
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON_DB/ASK-PP-F12_8T-DB.md5
@@ -0,0 +1 @@
+fa06a79dae1d9859fa0d579044b41e62
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON_DB/ASK-PP-F12_8T-DB.xml b/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON_DB/ASK-PP-F12_8T-DB.xml
new file mode 100644
index 000000000..6bc02e574
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON_DB/ASK-PP-F12_8T-DB.xml
@@ -0,0 +1,1180 @@
+<?xml version="1.0" encoding="utf-8"?>
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-02-19-1.06" profile="Askpp" sid="34f1c14a-b581-422d-bd10-426dfac013dd">
+  <askppplt:ASK-PP xmlns:askppplt="urn:marvell:askpp:yang">
+    <askppplt:typedefs>
+      <askppplt:typedef>
+        <askppplt:name>std-string</askppplt:name>
+        <askppplt:type>string</askppplt:type>
+        <askppplt:description>standard string.</askppplt:description>
+        <askppplt:min>1</askppplt:min>
+        <askppplt:max>100</askppplt:max>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>queue-id-type</askppplt:name>
+        <askppplt:type>uint32</askppplt:type>
+        <askppplt:description>Queue id</askppplt:description>
+        <askppplt:min>0</askppplt:min>
+        <askppplt:max>7</askppplt:max>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>precent-type</askppplt:name>
+        <askppplt:type>uint32</askppplt:type>
+        <askppplt:description>Precent</askppplt:description>
+        <askppplt:min>0</askppplt:min>
+        <askppplt:max>100</askppplt:max>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>phaThreadId-type</askppplt:name>
+        <askppplt:type>uint32</askppplt:type>
+        <askppplt:description>Thread id</askppplt:description>
+        <askppplt:min>1</askppplt:min>
+        <askppplt:max>255</askppplt:max>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>routing-mode-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies routing mode.</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>POLICY_BASED_ROUTING_ONLY</askppplt:name>
+          <askppplt:description>PBR only</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>TCAM_ROUTER_BASED</askppplt:name>
+          <askppplt:description>Router engine or PBR</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>shared-table-mode-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies table sharing modes for L3 (LPM), L2 (FDB), EM (Exact Match)</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>MID_L3_MID_L2_NO_EM</askppplt:name>
+          <askppplt:description>MID_L3_MID_L2_NO_EM</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>MID_L3_MID_L2_MIN_EM</askppplt:name>
+          <askppplt:description>MID_L3_MID_L2_MIN_EM</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>LOW_MAX_L3_MID_LOW_L2_NO_EM</askppplt:name>
+          <askppplt:description>LOW_MAX_L3_MID_LOW_L2_NO_EM</askppplt:description>
+          <askppplt:value>2</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>MAX_L3_MIN_L2_NO_EM</askppplt:name>
+          <askppplt:description>MAX_L3_MIN_L2_NO_EM</askppplt:description>
+          <askppplt:value>3</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>pha-firmware-image-id-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies supported Pha image id</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>DEFAULT</askppplt:name>
+          <askppplt:description>Default PHA firmware image ID</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>01</askppplt:name>
+          <askppplt:description>01 firmware image ID</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>02</askppplt:name>
+          <askppplt:description>02 PHA firmware image ID</askppplt:description>
+          <askppplt:value>2</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>pha-firmware-thread-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies supported Pha thread type</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>IOAM_INGRESS_SWITCH_IPV4</askppplt:name>
+          <askppplt:description>IOAM_INGRESS_SWITCH_IPV4</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>IOAM_INGRESS_SWITCH_IPV6</askppplt:name>
+          <askppplt:description>IOAM_INGRESS_SWITCH_IPV6</askppplt:description>
+          <askppplt:value>2</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>IOAM_TRANSIT_SWITCH_IPV4</askppplt:name>
+          <askppplt:description>IOAM_TRANSIT_SWITCH_IPV4</askppplt:description>
+          <askppplt:value>3</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>IOAM_TRANSIT_SWITCH_IPV6</askppplt:name>
+          <askppplt:description>IOAM_TRANSIT_SWITCH_IPV6</askppplt:description>
+          <askppplt:value>4</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>INT_IOAM_MIRRORING</askppplt:name>
+          <askppplt:description>INT_IOAM_MIRRORING</askppplt:description>
+          <askppplt:value>5</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>INT_IOAM_EGRESS_SWITCH</askppplt:name>
+          <askppplt:description>INT_IOAM_EGRESS_SWITCH</askppplt:description>
+          <askppplt:value>6</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>MPLS_SR_NO_EL</askppplt:name>
+          <askppplt:description>MPLS_SR_NO_EL</askppplt:description>
+          <askppplt:value>7</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>MPLS_SR_ONE_EL</askppplt:name>
+          <askppplt:description>MPLS_SR_ONE_EL</askppplt:description>
+          <askppplt:value>8</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>MPLS_SR_TWO_EL</askppplt:name>
+          <askppplt:description>MPLS_SR_TWO_EL</askppplt:description>
+          <askppplt:value>9</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>MPLS_SR_THREE_EL</askppplt:name>
+          <askppplt:description>MPLS_SR_THREE_EL</askppplt:description>
+          <askppplt:value>10</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>UNIFIED_SR</askppplt:name>
+          <askppplt:description>UNIFIED_SR</askppplt:description>
+          <askppplt:value>11</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>CLASSIFIER_NSH_OVER_ETHERNET</askppplt:name>
+          <askppplt:description>CLASSIFIER_NSH_OVER_ETHERNET</askppplt:description>
+          <askppplt:value>12</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>CLASSIFIER_NSH_OVER_VXLAN_GPE</askppplt:name>
+          <askppplt:description>CLASSIFIER_NSH_OVER_VXLAN_GPE</askppplt:description>
+          <askppplt:value>13</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SFF_NSH_VXLAN_GPE_TO_ETHERNET</askppplt:name>
+          <askppplt:description>SFF_NSH_VXLAN_GPE_TO_ETHERNET</askppplt:description>
+          <askppplt:value>14</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SFF_NSH_ETHERNET_TO_VXLAN_GPE</askppplt:name>
+          <askppplt:description>SFF_NSH_ETHERNET_TO_VXLAN_GPE</askppplt:description>
+          <askppplt:value>15</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>IOAM_EGRESS_SWITCH_IPV6</askppplt:name>
+          <askppplt:description>IOAM_EGRESS_SWITCH_IPV6</askppplt:description>
+          <askppplt:value>16</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_END_NODE</askppplt:name>
+          <askppplt:description>SRV6_END_NODE</askppplt:description>
+          <askppplt:value>17</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_PENULTIMATE_END_NODE</askppplt:name>
+          <askppplt:description>SRV6_PENULTIMATE_END_NODE</askppplt:description>
+          <askppplt:value>18</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_SRC_NODE_1_SEGMENT</askppplt:name>
+          <askppplt:description>SRV6_SRC_NODE_1_SEGMENT</askppplt:description>
+          <askppplt:value>19</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_SRC_NODE_FIRST_PASS_2_3_SEGMENTS</askppplt:name>
+          <askppplt:description>SRV6_SRC_NODE_FIRST_PASS_2_3_SEGMENTS</askppplt:description>
+          <askppplt:value>20</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_SRC_NODE_SECOND_PASS_3_SEGMENTS</askppplt:name>
+          <askppplt:description>SRV6_SRC_NODE_SECOND_PASS_3_SEGMENTS</askppplt:description>
+          <askppplt:value>21</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_SRC_NODE_SECOND_PASS_2_SEGMENTS</askppplt:name>
+          <askppplt:description>SRV6_SRC_NODE_SECOND_PASS_2_SEGMENTS</askppplt:description>
+          <askppplt:value>22</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_NETWORK_ADD_MSB</askppplt:name>
+          <askppplt:description>SGT_NETWORK_ADD_MSB</askppplt:description>
+          <askppplt:value>23</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_NETWORK_FIX</askppplt:name>
+          <askppplt:description>SGT_NETWORK_FIX</askppplt:description>
+          <askppplt:value>24</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_NETWORK_REMOVE</askppplt:name>
+          <askppplt:description>SGT_NETWORK_REMOVE</askppplt:description>
+          <askppplt:value>25</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_EDSA_FIX</askppplt:name>
+          <askppplt:description>SGT_EDSA_FIX</askppplt:description>
+          <askppplt:value>26</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_EDSA_REMOVE</askppplt:name>
+          <askppplt:description>SGT_EDSA_REMOVE</askppplt:description>
+          <askppplt:value>27</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_GBP_FIX_IPV4</askppplt:name>
+          <askppplt:description>SGT_GBP_FIX_IPV4</askppplt:description>
+          <askppplt:value>28</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_GBP_FIX_IPV6</askppplt:name>
+          <askppplt:description>SGT_GBP_FIX_IPV6</askppplt:description>
+          <askppplt:value>29</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_GBP_REMOVE_IPV4</askppplt:name>
+          <askppplt:description>SGT_GBP_REMOVE_IPV4</askppplt:description>
+          <askppplt:value>30</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_GBP_REMOVE_IPV6</askppplt:name>
+          <askppplt:description>SGT_GBP_REMOVE_IPV6</askppplt:description>
+          <askppplt:value>31</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>PTP_PHY_1_STEP</askppplt:name>
+          <askppplt:description>PTP_PHY_1_STEP</askppplt:description>
+          <askppplt:value>32</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>EGRESS_MIRRORING_METADATA</askppplt:name>
+          <askppplt:description>EGRESS_MIRRORING_METADATA</askppplt:description>
+          <askppplt:value>33</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>CC_ERSPAN_TYPE_II_TRG_DEV_LC_IPV4</askppplt:name>
+          <askppplt:description>CC_ERSPAN_TYPE_II_TRG_DEV_LC_IPV4</askppplt:description>
+          <askppplt:value>34</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>CC_ERSPAN_TYPE_II_TRG_DEV_LC_IPV6</askppplt:name>
+          <askppplt:description>CC_ERSPAN_TYPE_II_TRG_DEV_LC_IPV6</askppplt:description>
+          <askppplt:value>35</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>CC_ERSPAN_TYPE_II_TRG_DEV_DIRECT_IPV4</askppplt:name>
+          <askppplt:description>CC_ERSPAN_TYPE_II_TRG_DEV_DIRECT_IPV4</askppplt:description>
+          <askppplt:value>36</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>CC_ERSPAN_TYPE_II_TRG_DEV_DIRECT_IPV6</askppplt:name>
+          <askppplt:description>CC_ERSPAN_TYPE_II_TRG_DEV_DIRECT_IPV6</askppplt:description>
+          <askppplt:value>37</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>CC_ERSPAN_TYPE_II_SRC_DEV</askppplt:name>
+          <askppplt:description>CC_ERSPAN_TYPE_II_SRC_DEV</askppplt:description>
+          <askppplt:value>38</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>VXLAN_GBP_SOURCE_GROUP_POLICY_ID</askppplt:name>
+          <askppplt:description>VXLAN_GBP_SOURCE_GROUP_POLICY_ID</askppplt:description>
+          <askppplt:value>39</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_BEST_EFFORT</askppplt:name>
+          <askppplt:description>SRV6_BEST_EFFORT</askppplt:description>
+          <askppplt:value>40</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_SRC_NODE_1_CONTAINER</askppplt:name>
+          <askppplt:description>SRV6_SRC_NODE_1_CONTAINER</askppplt:description>
+          <askppplt:value>41</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_SRC_NODE_FIRST_PASS_2_3_CONTAINERS</askppplt:name>
+          <askppplt:description>SRV6_SRC_NODE_FIRST_PASS_2_3_CONTAINERS</askppplt:description>
+          <askppplt:value>42</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_SRC_NODE_SECOND_PASS_2_CONTAINERS</askppplt:name>
+          <askppplt:description>SRV6_SRC_NODE_SECOND_PASS_2_CONTAINERS</askppplt:description>
+          <askppplt:value>43</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_SRC_NODE_SECOND_PASS_3_CONTAINERS</askppplt:name>
+          <askppplt:description>SRV6_SRC_NODE_SECOND_PASS_3_CONTAINERS</askppplt:description>
+          <askppplt:value>44</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_END_NODE_COC32_GSID</askppplt:name>
+          <askppplt:description>SRV6_END_NODE_COC32_GSID</askppplt:description>
+          <askppplt:value>45</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>IPV4_TTL_INCREMENT</askppplt:name>
+          <askppplt:description>IPV4_TTL_INCREMENT</askppplt:description>
+          <askppplt:value>46</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>IPV6_HOP_LIMIT_INCREMENT</askppplt:name>
+          <askppplt:description>IPV6_HOP_LIMIT_INCREMENT</askppplt:description>
+          <askppplt:value>47</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>CLEAR_OUTGOING_MTAG_COMMAND</askppplt:name>
+          <askppplt:description>CLEAR_OUTGOING_MTAG_COMMAND</askppplt:description>
+          <askppplt:value>48</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SFLOW_V5_IPV4</askppplt:name>
+          <askppplt:description>SFLOW_V5_IPV4</askppplt:description>
+          <askppplt:value>49</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SFLOW_V5_IPV6</askppplt:name>
+          <askppplt:description>SFLOW_V5_IPV6</askppplt:description>
+          <askppplt:value>50</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SLS</askppplt:name>
+          <askppplt:description>SLS</askppplt:description>
+          <askppplt:value>51</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>trunk-member-mode-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies supported Pha image id</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>NATIVE</askppplt:name>
+          <askppplt:description>NATIVE
+*  the trunk members are filled
+*  according to the order given by application.
+*  Regular trunk may hold max of 8 members.
+*  Cascade trunk may hold :
+*  max of 64 members</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>FLEX</askppplt:name>
+          <askppplt:description>FLEX
+*  A mode to allows flexibility for
+*  each Regular trunk to state it's max number of members (before starting to add members).
+*  (this mode not effect 'cascade trunk' members)
+*  Regular trunk may hold : max of 4K members. (each trunk set it's own limit)
+*  Cascade trunk may hold : max of 64 members.</askppplt:description>
+          <askppplt:value>2</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>number-physical-port-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>AC3X/AC5X 128, falcon 64, 128, 256, 512, 1024</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>no-ports</askppplt:name>
+          <askppplt:description>no-ports</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>64-ports</askppplt:name>
+          <askppplt:description>64-ports</askppplt:description>
+          <askppplt:value>64</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>128-ports</askppplt:name>
+          <askppplt:description>128-ports</askppplt:description>
+          <askppplt:value>128</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>256-ports</askppplt:name>
+          <askppplt:description>256-ports</askppplt:description>
+          <askppplt:value>256</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>512-ports</askppplt:name>
+          <askppplt:description>512-ports</askppplt:description>
+          <askppplt:value>512</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>1024-ports</askppplt:name>
+          <askppplt:description>1024-ports</askppplt:description>
+          <askppplt:value>1024</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>serdes-ref-clock-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies serdes refernce clock.</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>external_25_single_ended</askppplt:name>
+          <askppplt:description>EXTERNAL_25_SINGLE_ENDED</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>external_125_single_ended</askppplt:name>
+          <askppplt:description>EXTERNAL_125_SINGLE_ENDED</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>external_125_diff</askppplt:name>
+          <askppplt:description>EXTERNAL_125_DIFF</askppplt:description>
+          <askppplt:value>2</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>external_156_25_single_ended</askppplt:name>
+          <askppplt:description>EXTERNAL_156_25_SINGLE_ENDED</askppplt:description>
+          <askppplt:value>3</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>external_156_25_diff</askppplt:name>
+          <askppplt:description>EXTERNAL_156_25_DIFF</askppplt:description>
+          <askppplt:value>4</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>internal_125</askppplt:name>
+          <askppplt:description>INTERNAL_125</askppplt:description>
+          <askppplt:value>5</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>cpu-port-id-type</askppplt:name>
+        <askppplt:type>uint32</askppplt:type>
+        <askppplt:description>CPU port id</askppplt:description>
+        <askppplt:min>0</askppplt:min>
+        <askppplt:max>7</askppplt:max>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>rx-buffer-size-type</askppplt:name>
+        <askppplt:type>uint32</askppplt:type>
+        <askppplt:description>Rx Buffer size</askppplt:description>
+        <askppplt:min>64</askppplt:min>
+        <askppplt:max>10240</askppplt:max>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>tx-sdma-queue-mode-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies TX queue mode.</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>Normal</askppplt:name>
+          <askppplt:description>Application</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>Packet_Generator</askppplt:name>
+          <askppplt:description>Traffic generator</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>alloc-method-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies Buffers allocation method.</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>Dynamic_Alloc</askppplt:name>
+          <askppplt:description>Dynamic</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>Static_Alloc</askppplt:name>
+          <askppplt:description>Static</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>au_mesage_lenght-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies Buffers allocation method.</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>4_words</askppplt:name>
+          <askppplt:description>4 Words</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>8_words</askppplt:name>
+          <askppplt:description>8 Words</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>boolean-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Boolean 32 bits , due to bing endian</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>false</askppplt:name>
+          <askppplt:description>False</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>true</askppplt:name>
+          <askppplt:description>True</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>asic-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>ASIC Type</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>ASIC_AC3X</askppplt:name>
+          <askppplt:description>AC3X</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>ASIC_AC5X</askppplt:name>
+          <askppplt:description>AC5X</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>ASIC_Falcon</askppplt:name>
+          <askppplt:description>FALCON</askppplt:description>
+          <askppplt:value>2</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+    </askppplt:typedefs>
+    <askppplt:ASIC_Type askppplt:type="asic-type">ASIC_Falcon</askppplt:ASIC_Type>
+    <askppplt:PPInit>
+      <askppplt:PP-name askppplt:type="std-string">Falcon-12.8</askppplt:PP-name>
+      <askppplt:Phase1>
+        <askppplt:coreClock askppplt:type="uint32">4294967295</askppplt:coreClock>
+        <askppplt:serdesRefClock askppplt:type="serdes-ref-clock-type">external_25_single_ended</askppplt:serdesRefClock>
+        <askppplt:isrAddrCompletionRegionsBmp askppplt:type="uint32">2</askppplt:isrAddrCompletionRegionsBmp>
+        <askppplt:appAddrCompletionRegionsBmp askppplt:type="uint32">60</askppplt:appAddrCompletionRegionsBmp>
+        <askppplt:maxNumOfPhyPortsToUse askppplt:type="number-physical-port-type">256-ports</askppplt:maxNumOfPhyPortsToUse>
+        <askppplt:tcamParityCalcEnable askppplt:type="boolean-type">false</askppplt:tcamParityCalcEnable>
+        <askppplt:apEnable askppplt:type="boolean-type">true</askppplt:apEnable>
+        <askppplt:numOfDataIntegrityElements askppplt:type="uint32">0</askppplt:numOfDataIntegrityElements>
+      </askppplt:Phase1>
+      <askppplt:Phase2>
+        <askppplt:useMultiNetIfSdma askppplt:type="boolean-type">true</askppplt:useMultiNetIfSdma>
+        <askppplt:auqCfg>
+          <askppplt:auDescNum askppplt:type="uint32">4096</askppplt:auDescNum>
+        </askppplt:auqCfg>
+        <askppplt:fuqCfg>
+          <askppplt:fuDescNum askppplt:type="uint32">2048</askppplt:fuDescNum>
+        </askppplt:fuqCfg>
+        <askppplt:multiNetIfCfg>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">0</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">7</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">6</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">5</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">4</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">3</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">2</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">1</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">0</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">7</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">6</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">5</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">4</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">3</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">2</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">1</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">0</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">7</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">6</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">5</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">4</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">3</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">2</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">1</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">0</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">7</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">6</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">5</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">4</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">3</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">2</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">1</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">0</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">1</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">2</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">3</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">4</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">5</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">6</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">7</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">0</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">1</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">2</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">3</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">4</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">5</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">6</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">7</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">0</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">1</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">2</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">3</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">4</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">5</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">6</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">7</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">0</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">1</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">2</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">3</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">4</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">5</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">6</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Packet_Generator</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">256</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">256</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">144</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">7</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Packet_Generator</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">1</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">1</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">3032</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+        </askppplt:multiNetIfCfg>
+        <askppplt:internal>
+          <askppplt:fuqUseSeparate askppplt:type="boolean-type">false</askppplt:fuqUseSeparate>
+          <askppplt:useSecondaryAuq askppplt:type="boolean-type">false</askppplt:useSecondaryAuq>
+          <askppplt:noTraffic2CPU askppplt:type="boolean-type">false</askppplt:noTraffic2CPU>
+          <askppplt:netifSdmaPortGroupId askppplt:type="uint32">0</askppplt:netifSdmaPortGroupId>
+          <askppplt:auMessageLength askppplt:type="au_mesage_lenght-type">8_words</askppplt:auMessageLength>
+          <askppplt:useDoubleAuq askppplt:type="boolean-type">false</askppplt:useDoubleAuq>
+        </askppplt:internal>
+      </askppplt:Phase2>
+      <askppplt:LogicalInit>
+        <askppplt:routingMode askppplt:type="routing-mode-type">TCAM_ROUTER_BASED</askppplt:routingMode>
+        <askppplt:maxNumOfPbrEntries askppplt:type="uint32">0</askppplt:maxNumOfPbrEntries>
+        <askppplt:sharedTableMode askppplt:type="shared-table-mode-type">MID_L3_MID_L2_NO_EM</askppplt:sharedTableMode>
+        <askppplt:ingressDropEnable askppplt:type="boolean-type">false</askppplt:ingressDropEnable>
+      </askppplt:LogicalInit>
+      <askppplt:LibInit>
+        <askppplt:initBridge askppplt:type="boolean-type">true</askppplt:initBridge>
+        <askppplt:initMirror askppplt:type="boolean-type">true</askppplt:initMirror>
+        <askppplt:initNetIf askppplt:type="boolean-type">true</askppplt:initNetIf>
+        <askppplt:initPhy askppplt:type="boolean-type">true</askppplt:initPhy>
+        <askppplt:initPort askppplt:type="boolean-type">true</askppplt:initPort>
+        <askppplt:initTrunk askppplt:type="boolean-type">true</askppplt:initTrunk>
+        <askppplt:Trunk-params>
+          <askppplt:maxNumberOfTrunks askppplt:type="uint32">1023</askppplt:maxNumberOfTrunks>
+          <askppplt:trunkMembersMode askppplt:type="trunk-member-mode-type">FLEX</askppplt:trunkMembersMode>
+        </askppplt:Trunk-params>
+        <askppplt:initPcl askppplt:type="boolean-type">true</askppplt:initPcl>
+        <askppplt:initTcam askppplt:type="boolean-type">true</askppplt:initTcam>
+        <askppplt:initPolicer askppplt:type="boolean-type">true</askppplt:initPolicer>
+        <askppplt:initPha askppplt:type="boolean-type">true</askppplt:initPha>
+        <askppplt:Pha-params>
+          <askppplt:packetOrderChangeEnable askppplt:type="boolean-type">false</askppplt:packetOrderChangeEnable>
+          <askppplt:phaFwImageId askppplt:type="pha-firmware-image-id-type">02</askppplt:phaFwImageId>
+          <askppplt:phaFwImageIdVersion askppplt:type="uint32">0</askppplt:phaFwImageIdVersion>
+        </askppplt:Pha-params>
+      </askppplt:LibInit>
+    </askppplt:PPInit>
+  </askppplt:ASK-PP>
+</data>
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON_DB/SAI-F12_8T-DB.md5 b/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON_DB/SAI-F12_8T-DB.md5
new file mode 100644
index 000000000..b8354262f
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON_DB/SAI-F12_8T-DB.md5
@@ -0,0 +1 @@
+77abb2b5b75369072fc4e2e498e86204
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON_DB/SAI-F12_8T-DB.xml b/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON_DB/SAI-F12_8T-DB.xml
new file mode 100644
index 000000000..b603467c4
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON_DB/SAI-F12_8T-DB.xml
@@ -0,0 +1,918 @@
+<?xml version="1.0" encoding="utf-8"?>
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-02-19-1.06" profile="SAI" sid="c310bbb1-ffca-4c99-9bae-f7d4caff5941">
+  <SAIplt:SAI xmlns:SAIplt="urn:marvell:SAI:yang">
+    <SAIplt:typedefs>
+      <SAIplt:typedef>
+        <SAIplt:name>device-id-type</SAIplt:name>
+        <SAIplt:type>uint32</SAIplt:type>
+        <SAIplt:description>Device ID 0..1</SAIplt:description>
+        <SAIplt:min>0</SAIplt:min>
+        <SAIplt:max>1</SAIplt:max>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>port-id-type</SAIplt:name>
+        <SAIplt:type>uint32</SAIplt:type>
+        <SAIplt:description>Interface number</SAIplt:description>
+        <SAIplt:min>0</SAIplt:min>
+        <SAIplt:max>1023</SAIplt:max>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>logDest-type</SAIplt:name>
+        <SAIplt:type>enumeration</SAIplt:type>
+        <SAIplt:description>Logging Feature Options</SAIplt:description>
+        <SAIplt:enum>
+          <SAIplt:name>SAI_LOG_SYSLOG</SAIplt:name>
+          <SAIplt:description>SYSLOG  {Syslog service should be running to use this option}</SAIplt:description>
+          <SAIplt:value>0</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>SAI_LOG_CONSOLE</SAIplt:name>
+          <SAIplt:description>CONSOLE</SAIplt:description>
+          <SAIplt:value>1</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>SAI_LOG_FILE</SAIplt:name>
+          <SAIplt:description>FILE  {Warning !!! Use with caution. Can cause disk full issues}</SAIplt:description>
+          <SAIplt:value>2</SAIplt:value>
+        </SAIplt:enum>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>InDropCounter-type</SAIplt:name>
+        <SAIplt:type>enumeration</SAIplt:type>
+        <SAIplt:description>Router In Drop Reason Feature Options</SAIplt:description>
+        <SAIplt:enum>
+          <SAIplt:name>TTL_HOPLIMIT_EXCEEDED</SAIplt:name>
+          <SAIplt:description>Router In Drop Counters track TTL &amp; Hop Limit Exceeded Packets</SAIplt:description>
+          <SAIplt:value>0</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>ROUTE_BLACKHOLE</SAIplt:name>
+          <SAIplt:description>Router In Drop Counters track Route Black Hole Packets</SAIplt:description>
+          <SAIplt:value>1</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>IN_DROP_ANY</SAIplt:name>
+          <SAIplt:description>Router In Drop Counters track either TTL &amp; Hop Limit Exceeded or Route Black Hole Packets</SAIplt:description>
+          <SAIplt:value>2</SAIplt:value>
+        </SAIplt:enum>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>log-dest-file-path-type</SAIplt:name>
+        <SAIplt:type>string</SAIplt:type>
+        <SAIplt:description>A string with path to file for logging feature</SAIplt:description>
+        <SAIplt:min>2</SAIplt:min>
+        <SAIplt:max>30</SAIplt:max>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>acl-feature-name-type</SAIplt:name>
+        <SAIplt:type>enumeration</SAIplt:type>
+        <SAIplt:description/>
+        <SAIplt:enum>
+          <SAIplt:name>port-sFlow</SAIplt:name>
+          <SAIplt:description>SFlow over Port</SAIplt:description>
+          <SAIplt:value>0</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>port-counters-ipv4-ipv6</SAIplt:name>
+          <SAIplt:description>Port ipv4/ipv6 counters</SAIplt:description>
+          <SAIplt:value>1</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>control-acl</SAIplt:name>
+          <SAIplt:description>ACLs for control packet handling</SAIplt:description>
+          <SAIplt:value>2</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>debug-counter-acl</SAIplt:name>
+          <SAIplt:description>ACLs for Debug Counters</SAIplt:description>
+          <SAIplt:value>3</SAIplt:value>
+        </SAIplt:enum>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>ingress-acl-stage-type</SAIplt:name>
+        <SAIplt:type>enumeration</SAIplt:type>
+        <SAIplt:description/>
+        <SAIplt:enum>
+          <SAIplt:name>disabled</SAIplt:name>
+          <SAIplt:description>Feature not enabled</SAIplt:description>
+          <SAIplt:value>0</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>IPCL0</SAIplt:name>
+          <SAIplt:description>Stage IPCL0</SAIplt:description>
+          <SAIplt:value>1</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>IPCL1</SAIplt:name>
+          <SAIplt:description>Stage IPCL1</SAIplt:description>
+          <SAIplt:value>2</SAIplt:value>
+        </SAIplt:enum>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>egress-acl-stage-type</SAIplt:name>
+        <SAIplt:type>enumeration</SAIplt:type>
+        <SAIplt:description/>
+        <SAIplt:enum>
+          <SAIplt:name>disabled</SAIplt:name>
+          <SAIplt:description>Feature not enabled</SAIplt:description>
+          <SAIplt:value>0</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>EPCL0</SAIplt:name>
+          <SAIplt:description>Stage EPCL0</SAIplt:description>
+          <SAIplt:value>2</SAIplt:value>
+        </SAIplt:enum>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>feature-priority-type</SAIplt:name>
+        <SAIplt:type>uint32</SAIplt:type>
+        <SAIplt:description>Feature priority</SAIplt:description>
+        <SAIplt:min>2</SAIplt:min>
+        <SAIplt:max>15</SAIplt:max>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>hit-number-type</SAIplt:name>
+        <SAIplt:type>uint32</SAIplt:type>
+        <SAIplt:description>Hit/lookup number</SAIplt:description>
+        <SAIplt:min>0</SAIplt:min>
+        <SAIplt:max>3</SAIplt:max>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>asic-type</SAIplt:name>
+        <SAIplt:type>enumeration</SAIplt:type>
+        <SAIplt:description>ASIC Type</SAIplt:description>
+        <SAIplt:enum>
+          <SAIplt:name>ASIC_AC3X</SAIplt:name>
+          <SAIplt:description>AC3X</SAIplt:description>
+          <SAIplt:value>0</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>ASIC_AC5X</SAIplt:name>
+          <SAIplt:description>AC5X</SAIplt:description>
+          <SAIplt:value>1</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>ASIC_Falcon</SAIplt:name>
+          <SAIplt:description>FALCON</SAIplt:description>
+          <SAIplt:value>2</SAIplt:value>
+        </SAIplt:enum>
+      </SAIplt:typedef>
+    </SAIplt:typedefs>
+    <SAIplt:ASIC_Type SAIplt:type="asic-type">ASIC_Falcon</SAIplt:ASIC_Type>
+    <SAIplt:ASK-BOARD-Profile-Name SAIplt:type="string">ASK-Board-F12_8T-DB.xml</SAIplt:ASK-BOARD-Profile-Name>
+    <SAIplt:Ports>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">0</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">31</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">1</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">30</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">2</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">29</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">3</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">28</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">4</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">27</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">5</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">26</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">6</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">25</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">7</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">24</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">8</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">23</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">9</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">22</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">10</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">21</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">11</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">20</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">12</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">19</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">13</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">18</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">14</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">17</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">15</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">16</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">16</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">15</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">17</SAIplt:sai_port_id>
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+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">135</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">224</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">134</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">232</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">133</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">240</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">132</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">248</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">131</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">256</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">139</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+    </SAIplt:Ports>
+    <SAIplt:scalingFalcon>
+      <SAIplt:max_lag_members SAIplt:type="uint32">8</SAIplt:max_lag_members>
+      <SAIplt:max_route_ipv4 SAIplt:type="uint32">0</SAIplt:max_route_ipv4>
+      <SAIplt:max_route_ipv6 SAIplt:type="uint32">0</SAIplt:max_route_ipv6>
+      <SAIplt:max_Nh_Ecmp_Mbr_Per_Grp SAIplt:type="uint32">64</SAIplt:max_Nh_Ecmp_Mbr_Per_Grp>
+      <SAIplt:max_ipv4_tunnel SAIplt:type="uint32">8</SAIplt:max_ipv4_tunnel>
+      <SAIplt:max_ipv6_tunnel SAIplt:type="uint32">8</SAIplt:max_ipv6_tunnel>
+      <SAIplt:max_tti SAIplt:type="uint32">1024</SAIplt:max_tti>
+      <SAIplt:wred_size SAIplt:type="uint32">0</SAIplt:wred_size>
+      <SAIplt:max_nat SAIplt:type="uint32">0</SAIplt:max_nat>
+    </SAIplt:scalingFalcon>
+    <SAIplt:Counters>
+      <SAIplt:cnc-base-list>
+        <SAIplt:counter-base SAIplt:type="uint32">0</SAIplt:counter-base>
+      </SAIplt:cnc-base-list>
+    </SAIplt:Counters>
+    <SAIplt:Logging>
+      <SAIplt:log_dest SAIplt:type="logDest-type">SAI_LOG_SYSLOG</SAIplt:log_dest>
+    </SAIplt:Logging>
+    <SAIplt:Features-using-acl>
+      <SAIplt:feature SAIplt:type="acl-feature-name-type">control-acl</SAIplt:feature>
+      <SAIplt:feature-priority SAIplt:type="feature-priority-type">3</SAIplt:feature-priority>
+      <SAIplt:Ingress>
+        <SAIplt:ingress-stage SAIplt:type="ingress-acl-stage-type">IPCL0</SAIplt:ingress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">1</SAIplt:hit-number>
+      </SAIplt:Ingress>
+      <SAIplt:Egress>
+        <SAIplt:egress-stage SAIplt:type="egress-acl-stage-type">EPCL0</SAIplt:egress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">0</SAIplt:hit-number>
+      </SAIplt:Egress>
+    </SAIplt:Features-using-acl>
+    <SAIplt:Features-using-acl>
+      <SAIplt:feature SAIplt:type="acl-feature-name-type">port-sFlow</SAIplt:feature>
+      <SAIplt:feature-priority SAIplt:type="feature-priority-type">4</SAIplt:feature-priority>
+      <SAIplt:Ingress>
+        <SAIplt:ingress-stage SAIplt:type="ingress-acl-stage-type">IPCL0</SAIplt:ingress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">0</SAIplt:hit-number>
+      </SAIplt:Ingress>
+      <SAIplt:Egress>
+        <SAIplt:egress-stage SAIplt:type="egress-acl-stage-type">EPCL0</SAIplt:egress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">0</SAIplt:hit-number>
+      </SAIplt:Egress>
+    </SAIplt:Features-using-acl>
+    <SAIplt:Features-using-acl>
+      <SAIplt:feature SAIplt:type="acl-feature-name-type">port-counters-ipv4-ipv6</SAIplt:feature>
+      <SAIplt:feature-priority SAIplt:type="feature-priority-type">5</SAIplt:feature-priority>
+      <SAIplt:Ingress>
+        <SAIplt:ingress-stage SAIplt:type="ingress-acl-stage-type">IPCL0</SAIplt:ingress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">3</SAIplt:hit-number>
+      </SAIplt:Ingress>
+      <SAIplt:Egress>
+        <SAIplt:egress-stage SAIplt:type="egress-acl-stage-type">EPCL0</SAIplt:egress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">0</SAIplt:hit-number>
+      </SAIplt:Egress>
+    </SAIplt:Features-using-acl>
+    <SAIplt:Features-using-acl>
+      <SAIplt:feature SAIplt:type="acl-feature-name-type">debug-counter-acl</SAIplt:feature>
+      <SAIplt:feature-priority SAIplt:type="feature-priority-type">2</SAIplt:feature-priority>
+      <SAIplt:Ingress>
+        <SAIplt:ingress-stage SAIplt:type="ingress-acl-stage-type">IPCL0</SAIplt:ingress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">1</SAIplt:hit-number>
+      </SAIplt:Ingress>
+      <SAIplt:Egress>
+        <SAIplt:egress-stage SAIplt:type="egress-acl-stage-type">EPCL0</SAIplt:egress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">0</SAIplt:hit-number>
+      </SAIplt:Egress>
+    </SAIplt:Features-using-acl>
+  </SAIplt:SAI>
+</data>
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON_DB/buffers_defaults_t0.j2 b/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON_DB/buffers_defaults_t0.j2
new file mode 100644
index 000000000..5e24d9925
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON_DB/buffers_defaults_t0.j2
@@ -0,0 +1,36 @@
+
+{%- set default_cable = '40m' %}
+
+{%- macro generate_buffer_pool_and_profiles() %}
+    "BUFFER_POOL": {
+        "ingress_lossless_pool": {
+            "size": "23000000",
+            "type": "ingress",
+            "mode": "dynamic"
+        },
+        "egress_pool": {
+            "size": "23000000",
+            "type": "egress",
+            "mode": "static"
+        }
+    },
+    "BUFFER_PROFILE": {
+        "ingress_lossy_profile": {
+            "pool":"ingress_lossless_pool",
+            "size":"0",
+            "dynamic_th":"3"
+        },
+        "egress_lossless_profile": {
+            "pool":"egress_pool",
+            "mode": "static",
+            "size":"85000",
+            "static_th":"0"
+        },
+        "egress_lossy_profile": {
+            "pool":"egress_pool",
+            "size":"0",
+            "mode": "dynamic",
+            "dynamic_th":"3"
+        }
+    },
+{%- endmacro %}
diff --git a/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON_DB/buffers_defaults_t1.j2 b/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON_DB/buffers_defaults_t1.j2
new file mode 100644
index 000000000..5e24d9925
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON_DB/buffers_defaults_t1.j2
@@ -0,0 +1,36 @@
+
+{%- set default_cable = '40m' %}
+
+{%- macro generate_buffer_pool_and_profiles() %}
+    "BUFFER_POOL": {
+        "ingress_lossless_pool": {
+            "size": "23000000",
+            "type": "ingress",
+            "mode": "dynamic"
+        },
+        "egress_pool": {
+            "size": "23000000",
+            "type": "egress",
+            "mode": "static"
+        }
+    },
+    "BUFFER_PROFILE": {
+        "ingress_lossy_profile": {
+            "pool":"ingress_lossless_pool",
+            "size":"0",
+            "dynamic_th":"3"
+        },
+        "egress_lossless_profile": {
+            "pool":"egress_pool",
+            "mode": "static",
+            "size":"85000",
+            "static_th":"0"
+        },
+        "egress_lossy_profile": {
+            "pool":"egress_pool",
+            "size":"0",
+            "mode": "dynamic",
+            "dynamic_th":"3"
+        }
+    },
+{%- endmacro %}
diff --git a/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON_DB/port_config.ini b/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON_DB/port_config.ini
new file mode 100644
index 000000000..57fb6e2c4
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON_DB/port_config.ini
@@ -0,0 +1,138 @@
+#  name         lanes                                alias           speed  autoneg     fec    index
+Ethernet0       0                                   tenGigE0         10000    on        none     1
+Ethernet1       1                                   tenGigE1         10000    on        none     2
+Ethernet2       2                                   tenGigE2         10000    on        none     3
+Ethernet3       3                                   tenGigE3         10000    on        none     4
+Ethernet4       4                                   tenGigE4         10000    on        none     5
+Ethernet5       5                                   tenGigE5         10000    on        none     6
+Ethernet6       6                                   tenGigE6         10000    on        none     7
+Ethernet7       7                                   tenGigE7         10000    on        none     8
+Ethernet8       8                                   tenGigE8         10000    on        none     9
+Ethernet9       9                                   tenGigE9         10000    on        none     10
+Ethernet10      10                                  tenGigE10        10000    on        none     11
+Ethernet11      11                                  tenGigE11        10000    on        none     12
+Ethernet12      12                                  tenGigE12        10000    on        none     13
+Ethernet13      13                                  tenGigE13        10000    on        none     14
+Ethernet14      14                                  tenGigE14        10000    on        none     15
+Ethernet15      15                                  tenGigE15        10000    on        none     16
+Ethernet16      16                                  tenGigE16        10000    on        none     17
+Ethernet17      17                                  tenGigE17        10000    on        none     18
+Ethernet18      18                                  tenGigE18        10000    on        none     19
+Ethernet19      19                                  tenGigE19        10000    on        none     20
+Ethernet20      20                                  tenGigE20        10000    on        none     21
+Ethernet21      21                                  tenGigE21        10000    on        none     22
+Ethernet22      22                                  tenGigE22        10000    on        none     23
+Ethernet23      23                                  tenGigE23        10000    on        none     24
+Ethernet24      24                                  tenGigE24        10000    on        none     25
+Ethernet25      25                                  tenGigE25        10000    on        none     26
+Ethernet26      26                                  tenGigE26        10000    on        none     27
+Ethernet27      27                                  tenGigE27        10000    on        none     28
+Ethernet28      28                                  tenGigE28        10000    on        none     29
+Ethernet29      29                                  tenGigE29        10000    on        none     30
+Ethernet30      30                                  tenGigE30        10000    on        none     31
+Ethernet31      31                                  tenGigE31        10000    on        none     32
+Ethernet32      32                                  twenty5GigE32    25000    on        none     33
+Ethernet33      33                                  twenty5GigE33    25000    on        none     34
+Ethernet34      34                                  twenty5GigE34    25000    on        none     35
+Ethernet35      35                                  twenty5GigE35    25000    on        none     36
+Ethernet36      36                                  twenty5GigE36    25000    on        none     37
+Ethernet37      37                                  twenty5GigE37    25000    on        none     38
+Ethernet38      38                                  twenty5GigE38    25000    on        none     39
+Ethernet39      39                                  twenty5GigE39    25000    on        none     40
+Ethernet40      40                                  twenty5GigE40    25000    on        none     41
+Ethernet41      41                                  twenty5GigE41    25000    on        none     42
+Ethernet42      42                                  twenty5GigE42    25000    on        none     43
+Ethernet43      43                                  twenty5GigE43    25000    on        none     44
+Ethernet44      44                                  twenty5GigE44    25000    on        none     45
+Ethernet45      45                                  twenty5GigE45    25000    on        none     46
+Ethernet46      46                                  twenty5GigE46    25000    on        none     47
+Ethernet47      47                                  twenty5GigE47    25000    on        none     48
+Ethernet48      48                                  twenty5GigE48    25000    on        none     49
+Ethernet49      49                                  twenty5GigE49    25000    on        none     50
+Ethernet50      50                                  twenty5GigE50    25000    on        none     51
+Ethernet51      51                                  twenty5GigE51    25000    on        none     52
+Ethernet52      52                                  twenty5GigE52    25000    on        none     53
+Ethernet53      53                                  twenty5GigE53    25000    on        none     54
+Ethernet54      54                                  twenty5GigE54    25000    on        none     55
+Ethernet55      55                                  twenty5GigE55    25000    on        none     56
+Ethernet56      56                                  twenty5GigE56    25000    on        none     57
+Ethernet57      57                                  twenty5GigE57    25000    on        none     58
+Ethernet58      58                                  twenty5GigE58    25000    on        none     59
+Ethernet59      59                                  twenty5GigE59    25000    on        none     60
+Ethernet60      60                                  twenty5GigE60    25000    on        none     61
+Ethernet61      61                                  twenty5GigE61    25000    on        none     62
+Ethernet62      62                                  twenty5GigE62    25000    on        none     63
+Ethernet63      63                                  twenty5GigE63    25000    on        none     64
+Ethernet64      64                                  fiftyGigE64      50000    on        rs       65
+Ethernet65      65                                  fiftyGigE65      50000    on        rs       66
+Ethernet66      66                                  fiftyGigE66      50000    on        rs       67
+Ethernet67      67                                  fiftyGigE67      50000    on        rs       68
+Ethernet68      68                                  fiftyGigE68      50000    on        rs       69
+Ethernet69      69                                  fiftyGigE69      50000    on        rs       70
+Ethernet70      70                                  fiftyGigE70      50000    on        rs       71
+Ethernet71      71                                  fiftyGigE71      50000    on        rs       72
+Ethernet72      72                                  fiftyGigE72      50000    on        rs       73
+Ethernet73      73                                  fiftyGigE73      50000    on        rs       74
+Ethernet74      74                                  fiftyGigE74      50000    on        rs       75
+Ethernet75      75                                  fiftyGigE75      50000    on        rs       76
+Ethernet76      76                                  fiftyGigE76      50000    on        rs       77
+Ethernet77      77                                  fiftyGigE77      50000    on        rs       78
+Ethernet78      78                                  fiftyGigE78      50000    on        rs       79
+Ethernet79      79                                  fiftyGigE79      50000    on        rs       80
+Ethernet80      80                                  fiftyGigE80      50000    on        rs       81
+Ethernet81      81                                  fiftyGigE81      50000    on        rs       82
+Ethernet82      82                                  fiftyGigE82      50000    on        rs       83
+Ethernet83      83                                  fiftyGigE83      50000    on        rs       84
+Ethernet84      84                                  fiftyGigE84      50000    on        rs       85
+Ethernet85      85                                  fiftyGigE85      50000    on        rs       86
+Ethernet86      86                                  fiftyGigE86      50000    on        rs       87
+Ethernet87      87                                  fiftyGigE87      50000    on        rs       88
+Ethernet88      88                                  fiftyGigE88      50000    on        rs       89
+Ethernet89      89                                  fiftyGigE89      50000    on        rs       90
+Ethernet90      90                                  fiftyGigE90      50000    on        rs       91
+Ethernet91      91                                  fiftyGigE91      50000    on        rs       92
+Ethernet92      92                                  fiftyGigE92      50000    on        rs       93
+Ethernet93      93                                  fiftyGigE93      50000    on        rs       94
+Ethernet94      94                                  fiftyGigE94      50000    on        rs       95
+Ethernet95      95                                  fiftyGigE95      50000    on        rs       96
+Ethernet96      96,97                               one00GigE96      100000   on        rs       97
+Ethernet97      98,99                               one00GigE97      100000   on        rs       98
+Ethernet98      100,101                             one00GigE98      100000   on        rs       99
+Ethernet99      102,103                             one00GigE99      100000   on        rs       100
+Ethernet100     104,105                             one00GigE100     100000   on        rs       101
+Ethernet101     106,107                             one00GigE101     100000   on        rs       102
+Ethernet102     108,109                             one00GigE102     100000   on        rs       103
+Ethernet103     110,111                             one00GigE103     100000   on        rs       104
+Ethernet104     112,113                             one00GigE104     100000   on        rs       105
+Ethernet105     114,115                             one00GigE105     100000   on        rs       106
+Ethernet106     116,117                             one00GigE106     100000   on        rs       107
+Ethernet107     118,119                             one00GigE107     100000   on        rs       108
+Ethernet108     120,121                             one00GigE108     100000   on        rs       109
+Ethernet109     122,123                             one00GigE109     100000   on        rs       110
+Ethernet110     124,125                             one00GigE110     100000   on        rs       111
+Ethernet111     126,127                             one00GigE111     100000   on        rs       112
+Ethernet112     128,129,130,131                     one00GigE112     100000   on        rs       113
+Ethernet113     132,133,134,135                     one00GigE113     100000   on        rs       114
+Ethernet114     136,137,138,139                     one00GigE114     100000   on        rs       115
+Ethernet115     140,141,142,143                     one00GigE115     100000   on        rs       116
+Ethernet116     144,145,146,147                     one00GigE116     100000   on        rs       117
+Ethernet117     148,149,150,151                     one00GigE117     100000   on        rs       118
+Ethernet118     152,153,154,155                     one00GigE118     100000   on        rs       119
+Ethernet119     156,157,158,159                     one00GigE119     100000   on        rs       120
+Ethernet120     160,161,162,163                     two00GigE120     200000   on        rs       121
+Ethernet121     164,165,166,167                     two00GigE121     200000   on        rs       122
+Ethernet122     168,169,170,171                     two00GigE122     200000   on        rs       123
+Ethernet123     172,173,174,175                     two00GigE123     200000   on        rs       124
+Ethernet124     176,177,178,179                     two00GigE124     200000   on        rs       125
+Ethernet125     180,181,182,183                     two00GigE125     200000   on        rs       126
+Ethernet126     184,185,186,187                     two00GigE126     200000   on        rs       127
+Ethernet127     188,189,190,191                     two00GigE127     200000   on        rs       128
+Ethernet128     192,193,194,195,196,197,198,199     four00GigE128    400000   on        rs       129
+Ethernet129     200,201,202,203,204,205,206,207     four00GigE129    400000   on        rs       130
+Ethernet130     208,209,210,211,212,213,214,215     four00GigE130    400000   on        rs       131
+Ethernet131     216,217,218,219,220,221,222,223     four00GigE131    400000   on        rs       132
+Ethernet132     224,225,226,227,228,229,230,231     four00GigE132    400000   on        rs       133
+Ethernet133     232,233,234,235,236,237,238,239     four00GigE133    400000   on        rs       134
+Ethernet134     240,241,242,243,244,245,246,247     four00GigE134    400000   on        rs       135
+Ethernet135     248,249,250,251,252,253,254,255     four00GigE135    400000   on        rs       136
+Ethernet136     256                                 tenGigE136       10000    off       none     137
diff --git a/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON_DB/profile.ini b/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON_DB/profile.ini
new file mode 100644
index 000000000..c2f77685a
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON_DB/profile.ini
@@ -0,0 +1 @@
+switchMacAddress=00:01:02:03:04:05
diff --git a/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON_DB/sai.profile b/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON_DB/sai.profile
new file mode 100644
index 000000000..735e6c221
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON_DB/sai.profile
@@ -0,0 +1,4 @@
+mode=1
+hwId=FC12_8T-DB
+switchProfile=/usr/share/sonic/hwsku/SAI-F12_8T-DB.xml
+SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/profile.ini
diff --git a/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FC48x25G8x100GR4/ASK-Board-F12_8T-48x25G-8x100G.md5 b/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FC48x25G8x100GR4/ASK-Board-F12_8T-48x25G-8x100G.md5
new file mode 100644
index 000000000..fc1b8e224
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FC48x25G8x100GR4/ASK-Board-F12_8T-48x25G-8x100G.md5
@@ -0,0 +1 @@
+bfcdbba53aa3d422d93b9d900c305516
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FC48x25G8x100GR4/ASK-Board-F12_8T-48x25G-8x100G.xml b/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FC48x25G8x100GR4/ASK-Board-F12_8T-48x25G-8x100G.xml
new file mode 100644
index 000000000..6bc7a71b1
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FC48x25G8x100GR4/ASK-Board-F12_8T-48x25G-8x100G.xml
@@ -0,0 +1,3458 @@
+<?xml version="1.0" encoding="utf-8"?>
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-02-19-1.06" profile="Askboard" sid="eb53f80b-5892-4f8b-9197-a6f626effaba">
+  <askboardplt:ASK-Board xmlns:askboardplt="urn:marvell:askboard:yang">
+    <askboardplt:typedefs>
+      <askboardplt:typedef>
+        <askboardplt:name>std-string</askboardplt:name>
+        <askboardplt:type>string</askboardplt:type>
+        <askboardplt:description>standard string.</askboardplt:description>
+        <askboardplt:min>1</askboardplt:min>
+        <askboardplt:max>100</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>board-callback-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies os/ext drv callback types.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>linux-static</askboardplt:name>
+          <askboardplt:description>Linux Static</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>linux-shared</askboardplt:name>
+          <askboardplt:description>Linux Shared Lib mode</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>external</askboardplt:name>
+          <askboardplt:description>External Os</askboardplt:description>
+          <askboardplt:value>3</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>freeBsd</askboardplt:name>
+          <askboardplt:description>Free BSD</askboardplt:description>
+          <askboardplt:value>4</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>board-pp-map-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies pci info types.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>fixed</askboardplt:name>
+          <askboardplt:description>Fixed</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>autoscan</askboardplt:name>
+          <askboardplt:description>Auto scan</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>board-pp-interface-channel-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies channel interface type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>pci</askboardplt:name>
+          <askboardplt:description>PCI</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>smi</askboardplt:name>
+          <askboardplt:description>SMI</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>twsi</askboardplt:name>
+          <askboardplt:description>TWSI</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>board-pp-as-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies Address space type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>4_regions</askboardplt:name>
+          <askboardplt:description>address-space 4 regions</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>8_regions</askboardplt:name>
+          <askboardplt:description>address-space 8 regions</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>atu</askboardplt:name>
+          <askboardplt:description>address translation unit</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>device-id-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Device ID 0..1</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>1</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>port-mapping-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies port map type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>ethernet_mac</askboardplt:name>
+          <askboardplt:description>ETHERNET_MAC</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>cpu_sdma</askboardplt:name>
+          <askboardplt:description>CPU_SDMA</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>interface-num-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Interface number</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>1023</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>txq-port-number-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>TXq port number </askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>99</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>phy-smi-interface-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Phy SMI interface type.</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>3</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>phy-xsmi-interface-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Phy XSMI interface type.</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>15</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>phy-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the PHY Part Identifier.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>NA</askboardplt:name>
+          <askboardplt:description>No Phy</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E1543</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E1543, used for Combo ports.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E1545</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E1545, used for Copper GE with MAC on PHY support.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E1680</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E1680, used for Copper with speeds of 10M/100M/1G.</askboardplt:description>
+          <askboardplt:value>3</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E151X</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E151X, used for Copper (HW supports combo and fiber).</askboardplt:description>
+          <askboardplt:value>4</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E3140</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E3140, used for Copper with speeds of 100M/1G/10G.
+Uses with FW SolarFlare next generation.</askboardplt:description>
+          <askboardplt:value>5</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E3240</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E3240, used for Copper with speeds of 100M/1G/10G.
+Uses with FW, SolarFlare next generation.</askboardplt:description>
+          <askboardplt:value>6</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E3680</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E3680, used for Octal Copper 100M.</askboardplt:description>
+          <askboardplt:value>7</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E3220</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E3220, used for Combo port with speeds of 100M/1G/10G.
+Uses FW, SolarFlare next generation.</askboardplt:description>
+          <askboardplt:value>8</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E1680L</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E1680L, used for Copper with speeds of 10M/100M/1G.</askboardplt:description>
+          <askboardplt:value>9</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E33X0</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E33X0, used for MGIG Combo.</askboardplt:description>
+          <askboardplt:value>10</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E1548</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E1548, used for Fiber GE.</askboardplt:description>
+          <askboardplt:value>11</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E20X0</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E20X0, used for Copper with speeds of 10M/100M/1G/2.5G/5G.</askboardplt:description>
+          <askboardplt:value>12</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E1512</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E1512, used for Copper with speeds of 10M/100M/1G.</askboardplt:description>
+          <askboardplt:value>13</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E2180</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E2180, used for Copper with speeds of 10M/100M/1G/2.5G/5G.</askboardplt:description>
+          <askboardplt:value>14</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E1780</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E1780, Integrated Octal 10/100/1000 Mbps Energy
+Efficient Ethernet Transceiver</askboardplt:description>
+          <askboardplt:value>15</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E2540</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E2540, 4 ports 10/100/1000/2.5G/5GBASE-T Ethernet
+Transceiver with IEEE 1588v2 PTP Support</askboardplt:description>
+          <askboardplt:value>16</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E2580</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E12580, Octal 10/100/1000/2.5G/5GBASE-T Ethernet Transceiver
+with IEEE 1588v2 PTP Support</askboardplt:description>
+          <askboardplt:value>17</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>physical-port-num-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>PHYSICAL PORT NUM</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>1023</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-port-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the ledstream port type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>PORT_TYPE_TRI_SPEED</askboardplt:name>
+          <askboardplt:description>tri-speed port.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>PORT_TYPE_XG</askboardplt:name>
+          <askboardplt:description>XG port.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-blink-select-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the LED stream blink select type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_SELECT_0</askboardplt:name>
+          <askboardplt:description>Blink 0 signal.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_SELECT_1</askboardplt:name>
+          <askboardplt:description>Blink 1 signal</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-order-mode-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the LED stream ordering mode.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>ORDER_MODE_BY_PORT</askboardplt:name>
+          <askboardplt:description>the indication order is arranged by port.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>ORDER_MODE_BY_CLASS</askboardplt:name>
+          <askboardplt:description>the indication order is arranged by class.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-blink-duty-cycle-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the LED stream blink cycle duty cycle type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DUTY_CYCLE_0</askboardplt:name>
+          <askboardplt:description>25% on, 75% off.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DUTY_CYCLE_1</askboardplt:name>
+          <askboardplt:description>50% on, 50% off.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DUTY_CYCLE_2</askboardplt:name>
+          <askboardplt:description>50% on, 50% off.</askboardplt:description>
+          <askboardplt:value>3</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DUTY_CYCLE_3</askboardplt:name>
+          <askboardplt:description>75% on, 25% off.</askboardplt:description>
+          <askboardplt:value>4</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-blink-duration-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the LED stream blink period type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DURATION_0</askboardplt:name>
+          <askboardplt:description>BLINK_DURATION_0.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DURATION_1</askboardplt:name>
+          <askboardplt:description>BLINK_DURATION_1.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DURATION_2</askboardplt:name>
+          <askboardplt:description>BLINK_DURATION_2.</askboardplt:description>
+          <askboardplt:value>3</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DURATION_3</askboardplt:name>
+          <askboardplt:description>BLINK_DURATION_3.</askboardplt:description>
+          <askboardplt:value>4</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DURATION_4</askboardplt:name>
+          <askboardplt:description>BLINK_DURATION_4.</askboardplt:description>
+          <askboardplt:value>5</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DURATION_5</askboardplt:name>
+          <askboardplt:description>BLINK_DURATION_5.</askboardplt:description>
+          <askboardplt:value>6</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DURATION_6</askboardplt:name>
+          <askboardplt:description>(APPLICABLE DEVICES: xCat3; AC5; Lion2; Bobcat2; Caelum; Aldrin; AC3X; Bobcat3; Aldrin2; Pipe) .</askboardplt:description>
+          <askboardplt:value>7</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DURATION_7</askboardplt:name>
+          <askboardplt:description>APPLICABLE DEVICES: Bobcat2; Caelum; Aldrin; AC3X; Bobcat3; Aldrin2; Pipe).</askboardplt:description>
+          <askboardplt:value>8</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-pulse-stretch-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the LED stream length of stretching for dynamic signals.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>PULSE_STRETCH_0_NO</askboardplt:name>
+          <askboardplt:description>PULSE_STRETCH_0_NO.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>PULSE_STRETCH_1</askboardplt:name>
+          <askboardplt:description>PULSE_STRETCH_1.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>PULSE_STRETCH_2</askboardplt:name>
+          <askboardplt:description>PULSE_STRETCH_2.</askboardplt:description>
+          <askboardplt:value>3</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>PULSE_STRETCH_3</askboardplt:name>
+          <askboardplt:description>PULSE_STRETCH_3.</askboardplt:description>
+          <askboardplt:value>4</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>PULSE_STRETCH_4</askboardplt:name>
+          <askboardplt:description>PULSE_STRETCH_4.</askboardplt:description>
+          <askboardplt:value>5</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>PULSE_STRETCH_5</askboardplt:name>
+          <askboardplt:description>PULSE_STRETCH_5.</askboardplt:description>
+          <askboardplt:value>6</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>PULSE_STRETCH_6</askboardplt:name>
+          <askboardplt:description>(APPLICABLE DEVICES: Bobcat2; Caelum; Aldrin; AC3X; Bobcat3; Aldrin2; Falcon; AC5P; Pipe).</askboardplt:description>
+          <askboardplt:value>7</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>PULSE_STRETCH_7</askboardplt:name>
+          <askboardplt:description>(APPLICABLE DEVICES: Bobcat2; Caelum; Aldrin; AC3X; Bobcat3; Aldrin2; Falcon; AC5P; Pipe).</askboardplt:description>
+          <askboardplt:value>8</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-clock-out-frequency-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the LED stream blink cycle duty cycle type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>_CLOCK_OUT_FREQUENCY_500</askboardplt:name>
+          <askboardplt:description>500 KHz LED clock frequency.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>CLOCK_OUT_FREQUENCY_1000</askboardplt:name>
+          <askboardplt:description>1 MHz LED clock frequency.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>CLOCK_OUT_FREQUENCY_2000</askboardplt:name>
+          <askboardplt:description>2 MHz LED clock frequency.</askboardplt:description>
+          <askboardplt:value>3</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>CLOCK_OUT_FREQUENCY_3000</askboardplt:name>
+          <askboardplt:description>3 MHz LED clock frequency.</askboardplt:description>
+          <askboardplt:value>4</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-class5-select-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the LED stream indication displayed on class5 (for dual-media port/phy).</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>CLASS_5_SELECT_HALF_DUPLEX</askboardplt:name>
+          <askboardplt:description>Half Duplex is displayed on class5.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>CLASS_5_SELECT_FIBER_LINK_UP</askboardplt:name>
+          <askboardplt:description>If port is a dual media port, Fiber Link Up is displayed on class5.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-class13-select-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the LED stream indication displayed on class13 (for dual-media port/phy).</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>CLASS_13_SELECT_LINK_DOWN</askboardplt:name>
+          <askboardplt:description>Link Down is displayed on class13.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>CLASS_13_SELECT_COPPER_LINK_UP</askboardplt:name>
+          <askboardplt:description>If port is a dual media port, Copper Link Up is displayed on class13.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-class-num-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Led Class number</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>11</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>boolean-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Boolean 32 bits , due to bing endian</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>false</askboardplt:name>
+          <askboardplt:description>False</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>true</askboardplt:name>
+          <askboardplt:description>True</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>bus-id-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Bus Id Type, PCI/SMI</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>255</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>function-id-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Function Id Type, PCI/SMI</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>255</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>domain-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Domain, PCI/SMI</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>255</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-interface-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Led interface</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>255</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-position-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Led position</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>63</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>serdes-lane-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>serdes lane</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>7</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>cpu-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>The CPU Internal/External</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>external</askboardplt:name>
+          <askboardplt:description>Extrenal connected CPU</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>internal</askboardplt:name>
+          <askboardplt:description>Internal CPU</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-clock-frequency-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Led Clock Frequency Sip6</askboardplt:description>
+        <askboardplt:min>500</askboardplt:min>
+        <askboardplt:max>80000</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-unit-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Led units</askboardplt:description>
+        <askboardplt:min>1</askboardplt:min>
+        <askboardplt:max>16</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-unit-or-no-unit-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Led units, 0 for no Unit</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>16</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-group-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Led Group</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>1</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-force-data-type</askboardplt:name>
+        <askboardplt:type>string</askboardplt:type>
+        <askboardplt:description>A hexadecimal string with octets represented as hex digits
+separated by colons.  The canonical representation uses
+lowercase characters.</askboardplt:description>
+        <askboardplt:min>3</askboardplt:min>
+        <askboardplt:max>11</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>bit-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Bit range 0..31</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>31</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>bit-size-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Bit leng 1..32</askboardplt:description>
+        <askboardplt:min>1</askboardplt:min>
+        <askboardplt:max>32</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-sip-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>The LED scehme</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>na</askboardplt:name>
+          <askboardplt:description>NA</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>sip5</askboardplt:name>
+          <askboardplt:description>SIP5: AC3x</askboardplt:description>
+          <askboardplt:value>5</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>sip6</askboardplt:name>
+          <askboardplt:description>SIP6: Falcon, AC5x</askboardplt:description>
+          <askboardplt:value>6</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>port-cscd-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the cascade port type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>DSA_1_WORD</askboardplt:name>
+          <askboardplt:description>DSA Regular</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>DSA_2_WORDS</askboardplt:name>
+          <askboardplt:description>DSA Extended</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>NETWORK</askboardplt:name>
+          <askboardplt:description>Network.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>DSA_3_WORDS</askboardplt:name>
+          <askboardplt:description>DSA 3 Words</askboardplt:description>
+          <askboardplt:value>3</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>DSA_4_WORD</askboardplt:name>
+          <askboardplt:description>DSA 4 Words</askboardplt:description>
+          <askboardplt:value>4</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>trunk-cscd-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Specifies the Cascade Trunk id.</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>127</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>port-trunk-cscd-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the cascade port type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>cscdPort</askboardplt:name>
+          <askboardplt:description>Cascade port</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>cscdTrunk</askboardplt:name>
+          <askboardplt:description>Csacde trunk</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>hash-cscd-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the hash used by cascade trunk.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>pkt</askboardplt:name>
+          <askboardplt:description>Hash based on packet</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>srcPort</askboardplt:name>
+          <askboardplt:description>Hash based on source port</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>asic-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>ASIC Type</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>ASIC_AC3X</askboardplt:name>
+          <askboardplt:description>AC3X</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>ASIC_AC5X</askboardplt:name>
+          <askboardplt:description>AC5X</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>ASIC_Falcon</askboardplt:name>
+          <askboardplt:description>FALCON</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+    </askboardplt:typedefs>
+    <askboardplt:ASIC_Type askboardplt:type="asic-type">ASIC_Falcon</askboardplt:ASIC_Type>
+    <askboardplt:boardName askboardplt:type="std-string">Falcon-12.8T-48x25G-8x100G</askboardplt:boardName>
+    <askboardplt:osCallType askboardplt:type="board-callback-type">linux-static</askboardplt:osCallType>
+    <askboardplt:extDrvCallType askboardplt:type="board-callback-type">linux-static</askboardplt:extDrvCallType>
+    <askboardplt:mapType askboardplt:type="board-pp-map-type">autoscan</askboardplt:mapType>
+    <askboardplt:cpuType askboardplt:type="cpu-type">external</askboardplt:cpuType>
+    <askboardplt:mngInterfaceType askboardplt:type="board-pp-interface-channel-type">pci</askboardplt:mngInterfaceType>
+    <askboardplt:adressSpaceType askboardplt:type="board-pp-as-type">atu</askboardplt:adressSpaceType>
+    <askboardplt:device-list>
+      <askboardplt:devNum askboardplt:type="device-id-type">0</askboardplt:devNum>
+      <askboardplt:deviceId askboardplt:type="device-id-type">0</askboardplt:deviceId>
+      <askboardplt:pp-profile-name askboardplt:type="std-string">ASK-PP-F12_8T-48x25G-8x100G.xml</askboardplt:pp-profile-name>
+      <askboardplt:L1-profile-name askboardplt:type="std-string">ASK-L1-F12_8T-48x25G-8x100G.xml</askboardplt:L1-profile-name>
+      <askboardplt:ledStreamType askboardplt:type="led-sip-type">sip6</askboardplt:ledStreamType>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">0</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">32</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP4</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">0</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">1</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">33</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">2</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">34</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">3</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">35</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">4</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">40</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP5</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">1</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">5</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">41</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">6</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">42</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">7</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">43</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">8</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">48</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP6</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">0</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">9</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">49</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">10</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">50</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">11</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">51</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">12</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">56</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP7</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">1</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">13</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">57</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">14</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">58</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">15</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">59</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">16</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">64</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP0</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">0</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">17</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">65</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">18</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">66</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">19</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">67</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">20</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">72</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP1</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">1</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">21</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">73</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">22</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">74</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">23</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">75</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">24</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">80</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP2</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">0</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">25</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">81</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">26</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">82</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">27</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">83</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">28</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">88</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP3</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">1</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">29</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">89</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">30</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">90</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">31</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">91</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">32</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">96</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP4</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">0</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">33</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">97</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">34</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">98</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">35</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">99</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">36</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">104</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP5</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">1</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">37</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">105</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">38</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">106</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">39</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">107</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">40</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">112</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP6</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">0</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">41</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">113</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">42</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">114</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">43</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">115</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">44</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">120</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP7</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">1</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">45</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">121</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">46</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">122</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">47</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">123</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">48</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">128</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP0</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">0</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">49</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">136</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP1</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">1</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">50</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">144</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP2</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">0</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">51</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">152</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP3</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">1</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">52</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">160</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP4</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">0</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">53</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">168</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP5</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">1</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">54</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">176</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP6</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">0</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">55</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">184</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP7</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">1</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">56</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">258</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">2</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">63</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">cpu_sdma</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">273</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">57</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">cpu_sdma</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">274</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">58</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">cpu_sdma</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">275</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">59</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">cpu_sdma</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">276</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+      </askboardplt:portMap-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">32</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">38</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">34</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">39</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">33</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">37</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">36</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">35</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">40</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">45</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">41</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">46</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">42</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">47</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">44</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">43</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">50</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">54</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">49</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">51</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">48</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">52</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">53</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">55</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">57</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">62</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">58</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">63</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">56</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">60</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">59</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">61</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">64</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">71</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">66</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">68</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">65</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">69</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">67</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">70</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">72</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">77</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">73</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">79</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">75</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">74</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">76</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">78</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">81</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">85</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">80</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">87</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">84</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">82</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">83</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">86</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">88</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">94</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">89</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">95</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">90</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">91</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">92</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">93</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">96</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">102</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">98</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">103</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">97</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">101</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">100</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">99</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">104</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">109</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">105</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">110</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">106</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">111</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">108</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">107</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">114</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">118</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">113</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">115</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">112</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">116</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">117</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">119</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">121</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">126</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">122</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">127</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">120</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">124</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">123</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">125</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">128</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">135</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">130</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">132</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">129</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">133</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">131</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">134</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">136</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">141</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">137</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">143</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">139</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">138</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">140</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">142</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">145</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">149</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">144</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">151</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">148</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">146</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">147</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">150</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">152</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">158</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">153</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">159</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">154</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">155</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">156</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">157</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">160</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">166</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">162</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">167</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">161</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">165</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">164</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">163</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">168</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">173</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">169</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">174</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">170</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">175</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">176</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">172</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">171</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">178</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">182</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">177</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">179</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">180</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">181</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">183</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">185</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">190</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">186</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">191</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">184</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">188</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">187</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">189</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">192</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">199</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">194</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">196</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">193</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">197</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">195</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">198</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">200</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">205</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">201</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">207</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">203</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">202</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">204</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">206</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">209</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">213</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">208</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">215</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">212</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">210</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">211</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">214</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">216</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">222</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">217</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">223</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">218</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">219</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">220</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">221</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">224</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">230</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">226</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">231</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">225</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">229</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">228</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">227</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">232</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">237</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">233</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">238</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">234</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">239</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">236</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">235</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">242</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">246</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">241</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">243</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">240</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">244</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">245</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">247</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">249</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">254</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">250</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">255</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">248</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">252</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">251</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">253</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">0</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">7</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">2</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">4</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">1</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">5</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">3</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">6</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">8</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">13</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">9</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">15</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">11</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">10</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">12</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">14</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">17</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">21</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">16</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">23</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">20</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">18</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">19</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">22</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">24</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">30</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">25</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">31</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">26</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">27</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">28</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">29</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:Ledstream-interface-list>
+        <askboardplt:ledstream-interface-number askboardplt:type="led-interface-type">0</askboardplt:ledstream-interface-number>
+        <askboardplt:ledstream-configSet>
+          <askboardplt:ledOrganize askboardplt:type="led-stream-order-mode-type">ORDER_MODE_BY_CLASS</askboardplt:ledOrganize>
+          <askboardplt:blink0DutyCycle askboardplt:type="led-stream-blink-duty-cycle-type">BLINK_DUTY_CYCLE_0</askboardplt:blink0DutyCycle>
+          <askboardplt:blink0Duration askboardplt:type="led-stream-blink-duration-type">BLINK_DURATION_0</askboardplt:blink0Duration>
+          <askboardplt:blink1DutyCycle askboardplt:type="led-stream-blink-duty-cycle-type">BLINK_DUTY_CYCLE_0</askboardplt:blink1DutyCycle>
+          <askboardplt:blink1Duration askboardplt:type="led-stream-blink-duration-type">BLINK_DURATION_1</askboardplt:blink1Duration>
+          <askboardplt:pulseStretch askboardplt:type="led-stream-pulse-stretch-type">PULSE_STRETCH_1</askboardplt:pulseStretch>
+          <askboardplt:invertEnable askboardplt:type="boolean-type">false</askboardplt:invertEnable>
+          <askboardplt:SIP6ledClockFrequency askboardplt:type="led-stream-clock-frequency-type">1627</askboardplt:SIP6ledClockFrequency>
+          <askboardplt:ledClockPosEdgeModeEnable askboardplt:type="boolean-type">false</askboardplt:ledClockPosEdgeModeEnable>
+          <askboardplt:ledUnit-List>
+            <askboardplt:ledUnit askboardplt:type="led-unit-type">1</askboardplt:ledUnit>
+            <askboardplt:ledStart askboardplt:type="uint32">64</askboardplt:ledStart>
+            <askboardplt:ledEnd askboardplt:type="uint32">66</askboardplt:ledEnd>
+            <askboardplt:ledChainBypass askboardplt:type="boolean-type">false</askboardplt:ledChainBypass>
+          </askboardplt:ledUnit-List>
+          <askboardplt:ledUnit-List>
+            <askboardplt:ledUnit askboardplt:type="led-unit-type">2</askboardplt:ledUnit>
+            <askboardplt:ledStart askboardplt:type="uint32">64</askboardplt:ledStart>
+            <askboardplt:ledEnd askboardplt:type="uint32">65</askboardplt:ledEnd>
+            <askboardplt:ledChainBypass askboardplt:type="boolean-type">false</askboardplt:ledChainBypass>
+          </askboardplt:ledUnit-List>
+          <askboardplt:ledUnit-List>
+            <askboardplt:ledUnit askboardplt:type="led-unit-type">3</askboardplt:ledUnit>
+            <askboardplt:ledStart askboardplt:type="uint32">64</askboardplt:ledStart>
+            <askboardplt:ledEnd askboardplt:type="uint32">65</askboardplt:ledEnd>
+            <askboardplt:ledChainBypass askboardplt:type="boolean-type">false</askboardplt:ledChainBypass>
+          </askboardplt:ledUnit-List>
+          <askboardplt:ledUnit-List>
+            <askboardplt:ledUnit askboardplt:type="led-unit-type">4</askboardplt:ledUnit>
+            <askboardplt:ledStart askboardplt:type="uint32">64</askboardplt:ledStart>
+            <askboardplt:ledEnd askboardplt:type="uint32">66</askboardplt:ledEnd>
+            <askboardplt:ledChainBypass askboardplt:type="boolean-type">false</askboardplt:ledChainBypass>
+          </askboardplt:ledUnit-List>
+          <askboardplt:ledUnit-List>
+            <askboardplt:ledUnit askboardplt:type="led-unit-type">5</askboardplt:ledUnit>
+            <askboardplt:ledStart askboardplt:type="uint32">64</askboardplt:ledStart>
+            <askboardplt:ledEnd askboardplt:type="uint32">66</askboardplt:ledEnd>
+            <askboardplt:ledChainBypass askboardplt:type="boolean-type">false</askboardplt:ledChainBypass>
+          </askboardplt:ledUnit-List>
+          <askboardplt:ledUnit-List>
+            <askboardplt:ledUnit askboardplt:type="led-unit-type">6</askboardplt:ledUnit>
+            <askboardplt:ledStart askboardplt:type="uint32">64</askboardplt:ledStart>
+            <askboardplt:ledEnd askboardplt:type="uint32">65</askboardplt:ledEnd>
+            <askboardplt:ledChainBypass askboardplt:type="boolean-type">false</askboardplt:ledChainBypass>
+          </askboardplt:ledUnit-List>
+          <askboardplt:ledUnit-List>
+            <askboardplt:ledUnit askboardplt:type="led-unit-type">7</askboardplt:ledUnit>
+            <askboardplt:ledStart askboardplt:type="uint32">64</askboardplt:ledStart>
+            <askboardplt:ledEnd askboardplt:type="uint32">65</askboardplt:ledEnd>
+            <askboardplt:ledChainBypass askboardplt:type="boolean-type">false</askboardplt:ledChainBypass>
+          </askboardplt:ledUnit-List>
+          <askboardplt:ledUnit-List>
+            <askboardplt:ledUnit askboardplt:type="led-unit-type">8</askboardplt:ledUnit>
+            <askboardplt:ledStart askboardplt:type="uint32">64</askboardplt:ledStart>
+            <askboardplt:ledEnd askboardplt:type="uint32">66</askboardplt:ledEnd>
+            <askboardplt:ledChainBypass askboardplt:type="boolean-type">false</askboardplt:ledChainBypass>
+          </askboardplt:ledUnit-List>
+        </askboardplt:ledstream-configSet>
+        <askboardplt:ledstream-class-manipulation-list>
+          <askboardplt:classNum askboardplt:type="led-class-num-type">0</askboardplt:classNum>
+          <askboardplt:portType askboardplt:type="led-stream-port-type">PORT_TYPE_XG</askboardplt:portType>
+          <askboardplt:blinkEnable askboardplt:type="boolean-type">false</askboardplt:blinkEnable>
+          <askboardplt:blinkSelect askboardplt:type="led-stream-blink-select-type">BLINK_SELECT_0</askboardplt:blinkSelect>
+          <askboardplt:forceEnable askboardplt:type="boolean-type">false</askboardplt:forceEnable>
+          <askboardplt:pulseStretchEnable askboardplt:type="boolean-type">true</askboardplt:pulseStretchEnable>
+          <askboardplt:disableOnLinkDown askboardplt:type="boolean-type">false</askboardplt:disableOnLinkDown>
+        </askboardplt:ledstream-class-manipulation-list>
+        <askboardplt:ledstream-class-manipulation-list>
+          <askboardplt:classNum askboardplt:type="led-class-num-type">1</askboardplt:classNum>
+          <askboardplt:portType askboardplt:type="led-stream-port-type">PORT_TYPE_XG</askboardplt:portType>
+          <askboardplt:blinkEnable askboardplt:type="boolean-type">false</askboardplt:blinkEnable>
+          <askboardplt:blinkSelect askboardplt:type="led-stream-blink-select-type">BLINK_SELECT_0</askboardplt:blinkSelect>
+          <askboardplt:forceEnable askboardplt:type="boolean-type">false</askboardplt:forceEnable>
+          <askboardplt:pulseStretchEnable askboardplt:type="boolean-type">true</askboardplt:pulseStretchEnable>
+          <askboardplt:disableOnLinkDown askboardplt:type="boolean-type">false</askboardplt:disableOnLinkDown>
+        </askboardplt:ledstream-class-manipulation-list>
+        <askboardplt:ledstream-class-manipulation-list>
+          <askboardplt:classNum askboardplt:type="led-class-num-type">2</askboardplt:classNum>
+          <askboardplt:portType askboardplt:type="led-stream-port-type">PORT_TYPE_XG</askboardplt:portType>
+          <askboardplt:blinkEnable askboardplt:type="boolean-type">true</askboardplt:blinkEnable>
+          <askboardplt:blinkSelect askboardplt:type="led-stream-blink-select-type">BLINK_SELECT_0</askboardplt:blinkSelect>
+          <askboardplt:forceEnable askboardplt:type="boolean-type">false</askboardplt:forceEnable>
+          <askboardplt:pulseStretchEnable askboardplt:type="boolean-type">true</askboardplt:pulseStretchEnable>
+          <askboardplt:disableOnLinkDown askboardplt:type="boolean-type">true</askboardplt:disableOnLinkDown>
+        </askboardplt:ledstream-class-manipulation-list>
+        <askboardplt:ledstream-class-manipulation-list>
+          <askboardplt:classNum askboardplt:type="led-class-num-type">3</askboardplt:classNum>
+          <askboardplt:portType askboardplt:type="led-stream-port-type">PORT_TYPE_XG</askboardplt:portType>
+          <askboardplt:blinkEnable askboardplt:type="boolean-type">false</askboardplt:blinkEnable>
+          <askboardplt:blinkSelect askboardplt:type="led-stream-blink-select-type">BLINK_SELECT_0</askboardplt:blinkSelect>
+          <askboardplt:forceEnable askboardplt:type="boolean-type">false</askboardplt:forceEnable>
+          <askboardplt:pulseStretchEnable askboardplt:type="boolean-type">true</askboardplt:pulseStretchEnable>
+          <askboardplt:disableOnLinkDown askboardplt:type="boolean-type">false</askboardplt:disableOnLinkDown>
+        </askboardplt:ledstream-class-manipulation-list>
+        <askboardplt:ledstream-class-manipulation-list>
+          <askboardplt:classNum askboardplt:type="led-class-num-type">4</askboardplt:classNum>
+          <askboardplt:portType askboardplt:type="led-stream-port-type">PORT_TYPE_XG</askboardplt:portType>
+          <askboardplt:blinkEnable askboardplt:type="boolean-type">false</askboardplt:blinkEnable>
+          <askboardplt:blinkSelect askboardplt:type="led-stream-blink-select-type">BLINK_SELECT_0</askboardplt:blinkSelect>
+          <askboardplt:forceEnable askboardplt:type="boolean-type">false</askboardplt:forceEnable>
+          <askboardplt:pulseStretchEnable askboardplt:type="boolean-type">true</askboardplt:pulseStretchEnable>
+          <askboardplt:disableOnLinkDown askboardplt:type="boolean-type">false</askboardplt:disableOnLinkDown>
+        </askboardplt:ledstream-class-manipulation-list>
+        <askboardplt:ledstream-class-manipulation-list>
+          <askboardplt:classNum askboardplt:type="led-class-num-type">5</askboardplt:classNum>
+          <askboardplt:portType askboardplt:type="led-stream-port-type">PORT_TYPE_XG</askboardplt:portType>
+          <askboardplt:blinkEnable askboardplt:type="boolean-type">false</askboardplt:blinkEnable>
+          <askboardplt:blinkSelect askboardplt:type="led-stream-blink-select-type">BLINK_SELECT_0</askboardplt:blinkSelect>
+          <askboardplt:forceEnable askboardplt:type="boolean-type">false</askboardplt:forceEnable>
+          <askboardplt:pulseStretchEnable askboardplt:type="boolean-type">true</askboardplt:pulseStretchEnable>
+          <askboardplt:disableOnLinkDown askboardplt:type="boolean-type">false</askboardplt:disableOnLinkDown>
+        </askboardplt:ledstream-class-manipulation-list>
+      </askboardplt:Ledstream-interface-list>
+    </askboardplt:device-list>
+    <askboardplt:UDSFilePath askboardplt:type="std-string">/tmp/cpss_uds</askboardplt:UDSFilePath>
+    <askboardplt:serdesMux>
+      <askboardplt:serdesMuxSchemePortMod askboardplt:type="uint32">8</askboardplt:serdesMuxSchemePortMod>
+      <askboardplt:serdesMuxSchemeList>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP0</askboardplt:serdesMuxScheme>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">0</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">7</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">2</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">4</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">1</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">5</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">3</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">6</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+      </askboardplt:serdesMuxSchemeList>
+      <askboardplt:serdesMuxSchemeList>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP1</askboardplt:serdesMuxScheme>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">0</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">5</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">1</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">7</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">3</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">2</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">4</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">6</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+      </askboardplt:serdesMuxSchemeList>
+      <askboardplt:serdesMuxSchemeList>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP2</askboardplt:serdesMuxScheme>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">1</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">5</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">0</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">7</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">4</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">2</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">3</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">6</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+      </askboardplt:serdesMuxSchemeList>
+      <askboardplt:serdesMuxSchemeList>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP3</askboardplt:serdesMuxScheme>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">0</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">6</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">1</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">7</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">2</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">3</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">4</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">5</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+      </askboardplt:serdesMuxSchemeList>
+      <askboardplt:serdesMuxSchemeList>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP4</askboardplt:serdesMuxScheme>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">0</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">6</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">2</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">7</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">1</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">5</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">4</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">3</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+      </askboardplt:serdesMuxSchemeList>
+      <askboardplt:serdesMuxSchemeList>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP5</askboardplt:serdesMuxScheme>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">0</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">5</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">1</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">6</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">2</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">7</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">4</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">3</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+      </askboardplt:serdesMuxSchemeList>
+      <askboardplt:serdesMuxSchemeList>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP6</askboardplt:serdesMuxScheme>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">2</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">6</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">1</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">3</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">0</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">4</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">5</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">7</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+      </askboardplt:serdesMuxSchemeList>
+      <askboardplt:serdesMuxSchemeList>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP7</askboardplt:serdesMuxScheme>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">1</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">6</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">2</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">7</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">0</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">4</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">3</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">5</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+      </askboardplt:serdesMuxSchemeList>
+    </askboardplt:serdesMux>
+  </askboardplt:ASK-Board>
+</data>
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FC48x25G8x100GR4/ASK-L1-F12_8T-48x25G-8x100G.md5 b/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FC48x25G8x100GR4/ASK-L1-F12_8T-48x25G-8x100G.md5
new file mode 100644
index 000000000..80f5a4819
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FC48x25G8x100GR4/ASK-L1-F12_8T-48x25G-8x100G.md5
@@ -0,0 +1 @@
+bae90780b221c3059c83112fab4abca5
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FC48x25G8x100GR4/ASK-L1-F12_8T-48x25G-8x100G.xml b/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FC48x25G8x100GR4/ASK-L1-F12_8T-48x25G-8x100G.xml
new file mode 100644
index 000000000..796023cd7
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FC48x25G8x100GR4/ASK-L1-F12_8T-48x25G-8x100G.xml
@@ -0,0 +1,1246 @@
+<?xml version="1.0" encoding="utf-8"?>
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-02-19-1.06" profile="Askl1" sid="71d3ab0f-3ac2-452a-a5c9-2dfdc969734a">
+  <ASKL1plt:ASK-L1 xmlns:ASKL1plt="urn:marvell:ASKL1:yang">
+    <ASKL1plt:typedefs>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>interface-mode-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Specifies supported Interface modes</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>1000BASE_X</ASKL1plt:name>
+          <ASKL1plt:description>1G</ASKL1plt:description>
+          <ASKL1plt:value>6</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>SGMII</ASKL1plt:name>
+          <ASKL1plt:description>1G , 2.5G</ASKL1plt:description>
+          <ASKL1plt:value>3</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>QSGMII</ASKL1plt:name>
+          <ASKL1plt:description>1G</ASKL1plt:description>
+          <ASKL1plt:value>13</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>KR</ASKL1plt:name>
+          <ASKL1plt:description>10G, 12G, 20G, 40G, 100G</ASKL1plt:description>
+          <ASKL1plt:value>16</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>SR_LR</ASKL1plt:name>
+          <ASKL1plt:description>5G, 10G, 12G, 20G, 40G</ASKL1plt:description>
+          <ASKL1plt:value>20</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>KR2</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>27</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>KR4</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>28</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>SR_LR2</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>29</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>SR_LR4</ASKL1plt:name>
+          <ASKL1plt:description>100G</ASKL1plt:description>
+          <ASKL1plt:value>30</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>KR_C</ASKL1plt:name>
+          <ASKL1plt:description>CONSORTIUM - 25G</ASKL1plt:description>
+          <ASKL1plt:value>32</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>CR_C</ASKL1plt:name>
+          <ASKL1plt:description>CONSORTIUM - 25G</ASKL1plt:description>
+          <ASKL1plt:value>33</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>KR2_C</ASKL1plt:name>
+          <ASKL1plt:description>CONSORTIUM - 50G</ASKL1plt:description>
+          <ASKL1plt:value>34</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>CR2_C</ASKL1plt:name>
+          <ASKL1plt:description>CONSORTIUM - 50G</ASKL1plt:description>
+          <ASKL1plt:value>35</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>CR</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>36</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>CR2</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>37</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>CR4</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>38</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>KR_S</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>39</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>CR_S</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>40</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>KR8</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>41</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>CR8</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>42</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>SR_LR8</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>43</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>USX_10G_QXGMII</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>51</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>USX_20G_QXGMII</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>52</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>USX_OUSGMII</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>53</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>USX_20G_OXGMII</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>54</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>NA</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>57</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>port-speed-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Specifies supported speeds</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>1G</ASKL1plt:name>
+          <ASKL1plt:description>1G</ASKL1plt:description>
+          <ASKL1plt:value>2</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>10G</ASKL1plt:name>
+          <ASKL1plt:description>10G</ASKL1plt:description>
+          <ASKL1plt:value>3</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>2500M</ASKL1plt:name>
+          <ASKL1plt:description>2.5G</ASKL1plt:description>
+          <ASKL1plt:value>5</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>5G</ASKL1plt:name>
+          <ASKL1plt:description>5G</ASKL1plt:description>
+          <ASKL1plt:value>6</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>25G</ASKL1plt:name>
+          <ASKL1plt:description>25G, used in combination with CPSS_PORT_INTERFACE_MODE_KR_E, CPSS_PORT_INTERFACE_MODE_KR2_E</ASKL1plt:description>
+          <ASKL1plt:value>21</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>40G</ASKL1plt:name>
+          <ASKL1plt:description>40G</ASKL1plt:description>
+          <ASKL1plt:value>9</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>50G</ASKL1plt:name>
+          <ASKL1plt:description>50G</ASKL1plt:description>
+          <ASKL1plt:value>14</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>100G</ASKL1plt:name>
+          <ASKL1plt:description>100G</ASKL1plt:description>
+          <ASKL1plt:value>13</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>200G</ASKL1plt:name>
+          <ASKL1plt:description>200G</ASKL1plt:description>
+          <ASKL1plt:value>24</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>400G</ASKL1plt:name>
+          <ASKL1plt:description>400G</ASKL1plt:description>
+          <ASKL1plt:value>25</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>NA</ASKL1plt:name>
+          <ASKL1plt:description>NA</ASKL1plt:description>
+          <ASKL1plt:value>35</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>fec-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Rx parameter type</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>enabled</ASKL1plt:name>
+          <ASKL1plt:description>Enabled</ASKL1plt:description>
+          <ASKL1plt:value>0</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>disabled</ASKL1plt:name>
+          <ASKL1plt:description>Disabled</ASKL1plt:description>
+          <ASKL1plt:value>1</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rs_enabled</ASKL1plt:name>
+          <ASKL1plt:description>RS FEC enabled</ASKL1plt:description>
+          <ASKL1plt:value>2</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>both_enabled</ASKL1plt:name>
+          <ASKL1plt:description>Both enabled</ASKL1plt:description>
+          <ASKL1plt:value>3</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rs_544_514_enabled</ASKL1plt:name>
+          <ASKL1plt:description>RS FEC 544 and 514</ASKL1plt:description>
+          <ASKL1plt:value>4</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>physical-port-num-type</ASKL1plt:name>
+        <ASKL1plt:type>uint32</ASKL1plt:type>
+        <ASKL1plt:description>PHYSICAL PORT NUM</ASKL1plt:description>
+        <ASKL1plt:min>0</ASKL1plt:min>
+        <ASKL1plt:max>1023</ASKL1plt:max>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>tx-param-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Tx parameter type</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>atten</ASKL1plt:name>
+          <ASKL1plt:description>atten</ASKL1plt:description>
+          <ASKL1plt:value>0</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>post</ASKL1plt:name>
+          <ASKL1plt:description>post</ASKL1plt:description>
+          <ASKL1plt:value>1</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>pre</ASKL1plt:name>
+          <ASKL1plt:description>pre</ASKL1plt:description>
+          <ASKL1plt:value>2</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>pre2</ASKL1plt:name>
+          <ASKL1plt:description>pre2</ASKL1plt:description>
+          <ASKL1plt:value>3</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>pre3</ASKL1plt:name>
+          <ASKL1plt:description>pre3</ASKL1plt:description>
+          <ASKL1plt:value>4</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>peak</ASKL1plt:name>
+          <ASKL1plt:description>peak</ASKL1plt:description>
+          <ASKL1plt:value>5</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>main</ASKL1plt:name>
+          <ASKL1plt:description>main</ASKL1plt:description>
+          <ASKL1plt:value>6</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>txAmpAdjEn</ASKL1plt:name>
+          <ASKL1plt:description>txAmpAdjEn</ASKL1plt:description>
+          <ASKL1plt:value>7</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>emph0</ASKL1plt:name>
+          <ASKL1plt:description>emph0</ASKL1plt:description>
+          <ASKL1plt:value>8</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>emph1</ASKL1plt:name>
+          <ASKL1plt:description>emph1</ASKL1plt:description>
+          <ASKL1plt:value>9</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>txAmpShft</ASKL1plt:name>
+          <ASKL1plt:description>txAmpShft</ASKL1plt:description>
+          <ASKL1plt:value>10</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>txEmphEn</ASKL1plt:name>
+          <ASKL1plt:description>txEmphEn</ASKL1plt:description>
+          <ASKL1plt:value>11</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>txEmphEn1</ASKL1plt:name>
+          <ASKL1plt:description>txEmphEn1</ASKL1plt:description>
+          <ASKL1plt:value>12</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>txAmpAdj</ASKL1plt:name>
+          <ASKL1plt:description>txAmpAdj</ASKL1plt:description>
+          <ASKL1plt:value>13</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>slewCtrlEn</ASKL1plt:name>
+          <ASKL1plt:description>slewCtrlEn</ASKL1plt:description>
+          <ASKL1plt:value>14</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>slewRate</ASKL1plt:name>
+          <ASKL1plt:description>slewRate</ASKL1plt:description>
+          <ASKL1plt:value>15</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>rx-param-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Rx parameter type</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>sqlch</ASKL1plt:name>
+          <ASKL1plt:description>sqlch</ASKL1plt:description>
+          <ASKL1plt:value>0</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>DC</ASKL1plt:name>
+          <ASKL1plt:description>DC</ASKL1plt:description>
+          <ASKL1plt:value>1</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>LF</ASKL1plt:name>
+          <ASKL1plt:description>LF</ASKL1plt:description>
+          <ASKL1plt:value>2</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>HF</ASKL1plt:name>
+          <ASKL1plt:description>HF</ASKL1plt:description>
+          <ASKL1plt:value>3</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>gainShape1</ASKL1plt:name>
+          <ASKL1plt:description>gainShape1</ASKL1plt:description>
+          <ASKL1plt:value>4</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>gainShape2</ASKL1plt:name>
+          <ASKL1plt:description>gainShape2</ASKL1plt:description>
+          <ASKL1plt:value>5</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>shortChannelEn</ASKL1plt:name>
+          <ASKL1plt:description>shortChannelEn</ASKL1plt:description>
+          <ASKL1plt:value>7</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>bfLf</ASKL1plt:name>
+          <ASKL1plt:description>bfLf</ASKL1plt:description>
+          <ASKL1plt:value>8</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>bfHf</ASKL1plt:name>
+          <ASKL1plt:description>bfHf</ASKL1plt:description>
+          <ASKL1plt:value>9</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>minLf</ASKL1plt:name>
+          <ASKL1plt:description>minLf</ASKL1plt:description>
+          <ASKL1plt:value>10</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>maxLf</ASKL1plt:name>
+          <ASKL1plt:description>maxLf</ASKL1plt:description>
+          <ASKL1plt:value>11</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>minHf</ASKL1plt:name>
+          <ASKL1plt:description>minHf</ASKL1plt:description>
+          <ASKL1plt:value>12</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>maxHf</ASKL1plt:name>
+          <ASKL1plt:description>maxHf</ASKL1plt:description>
+          <ASKL1plt:value>13</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>minPre1</ASKL1plt:name>
+          <ASKL1plt:description>minPre1</ASKL1plt:description>
+          <ASKL1plt:value>14</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>maxPre1</ASKL1plt:name>
+          <ASKL1plt:description>maxPre1</ASKL1plt:description>
+          <ASKL1plt:value>15</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>minPre2</ASKL1plt:name>
+          <ASKL1plt:description>minPre2</ASKL1plt:description>
+          <ASKL1plt:value>16</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>maxPre2</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>17</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>minPost</ASKL1plt:name>
+          <ASKL1plt:description>minPost</ASKL1plt:description>
+          <ASKL1plt:value>18</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>maxPost</ASKL1plt:name>
+          <ASKL1plt:description>maxPost</ASKL1plt:description>
+          <ASKL1plt:value>19</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>squelch</ASKL1plt:name>
+          <ASKL1plt:description>squelch</ASKL1plt:description>
+          <ASKL1plt:value>20</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>termination</ASKL1plt:name>
+          <ASKL1plt:description>termination</ASKL1plt:description>
+          <ASKL1plt:value>27</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>coldEnvelope</ASKL1plt:name>
+          <ASKL1plt:description>coldEnvelope</ASKL1plt:description>
+          <ASKL1plt:value>35</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>hotEnvelope</ASKL1plt:name>
+          <ASKL1plt:description>hotEnvelope</ASKL1plt:description>
+          <ASKL1plt:value>36</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>dcGain</ASKL1plt:name>
+          <ASKL1plt:description>dcGain</ASKL1plt:description>
+          <ASKL1plt:value>37</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>bandWidth</ASKL1plt:name>
+          <ASKL1plt:description>bandWidth</ASKL1plt:description>
+          <ASKL1plt:value>38</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>dfe</ASKL1plt:name>
+          <ASKL1plt:description>dfe</ASKL1plt:description>
+          <ASKL1plt:value>39</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>ffeR</ASKL1plt:name>
+          <ASKL1plt:description>ffeR</ASKL1plt:description>
+          <ASKL1plt:value>40</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>ffeC</ASKL1plt:name>
+          <ASKL1plt:description>ffeC</ASKL1plt:description>
+          <ASKL1plt:value>41</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>sampler</ASKL1plt:name>
+          <ASKL1plt:description>sampler</ASKL1plt:description>
+          <ASKL1plt:value>42</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>align90</ASKL1plt:name>
+          <ASKL1plt:description>align90</ASKL1plt:description>
+          <ASKL1plt:value>43</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>ffeS</ASKL1plt:name>
+          <ASKL1plt:description>ffeS</ASKL1plt:description>
+          <ASKL1plt:value>44</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>resSel</ASKL1plt:name>
+          <ASKL1plt:description>resSel</ASKL1plt:description>
+          <ASKL1plt:value>45</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>resShift</ASKL1plt:name>
+          <ASKL1plt:description>resShift</ASKL1plt:description>
+          <ASKL1plt:value>46</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>capSel</ASKL1plt:name>
+          <ASKL1plt:description>capSel</ASKL1plt:description>
+          <ASKL1plt:value>47</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>ffeSettingForce</ASKL1plt:name>
+          <ASKL1plt:description>ffeSettingForce</ASKL1plt:description>
+          <ASKL1plt:value>48</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>adaptedResSel</ASKL1plt:name>
+          <ASKL1plt:description>adaptedResSel</ASKL1plt:description>
+          <ASKL1plt:value>49</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>adaptedCapSel</ASKL1plt:name>
+          <ASKL1plt:description>adaptedCapSel</ASKL1plt:description>
+          <ASKL1plt:value>50</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>selmufi</ASKL1plt:name>
+          <ASKL1plt:description>selmufi</ASKL1plt:description>
+          <ASKL1plt:value>51</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>selmuff</ASKL1plt:name>
+          <ASKL1plt:description>selmuff</ASKL1plt:description>
+          <ASKL1plt:value>52</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>selmupi</ASKL1plt:name>
+          <ASKL1plt:description>selmupi</ASKL1plt:description>
+          <ASKL1plt:value>53</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>selmupf</ASKL1plt:name>
+          <ASKL1plt:description>selmupf</ASKL1plt:description>
+          <ASKL1plt:value>54</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>slewRateCtrl0</ASKL1plt:name>
+          <ASKL1plt:description>slewRateCtrl0</ASKL1plt:description>
+          <ASKL1plt:value>55</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>slewRateCtrl1</ASKL1plt:name>
+          <ASKL1plt:description>slewRateCtrl1</ASKL1plt:description>
+          <ASKL1plt:value>56</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>EO</ASKL1plt:name>
+          <ASKL1plt:description>EO</ASKL1plt:description>
+          <ASKL1plt:value>57</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>dataRate</ASKL1plt:name>
+          <ASKL1plt:description>dataRate</ASKL1plt:description>
+          <ASKL1plt:value>58</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>res1Sel</ASKL1plt:name>
+          <ASKL1plt:description>res1Sel</ASKL1plt:description>
+          <ASKL1plt:value>59</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>res2Sel</ASKL1plt:name>
+          <ASKL1plt:description>res2Sel</ASKL1plt:description>
+          <ASKL1plt:value>60</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>cap1Sel</ASKL1plt:name>
+          <ASKL1plt:description>cap1Sel</ASKL1plt:description>
+          <ASKL1plt:value>61</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>cap2Sel</ASKL1plt:name>
+          <ASKL1plt:description>cap2Sel</ASKL1plt:description>
+          <ASKL1plt:value>62</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>midpointLargeThresKLane</ASKL1plt:name>
+          <ASKL1plt:description>midpointLargeThresKLane</ASKL1plt:description>
+          <ASKL1plt:value>63</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>midpointSmallThresKLane</ASKL1plt:name>
+          <ASKL1plt:description>midpointSmallThresKLane</ASKL1plt:description>
+          <ASKL1plt:value>64</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>midpointLargeThresCLane</ASKL1plt:name>
+          <ASKL1plt:description>midpointLargeThresCLane</ASKL1plt:description>
+          <ASKL1plt:value>65</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>midpointSmallThresCLane</ASKL1plt:name>
+          <ASKL1plt:description>midpointSmallThresCLane</ASKL1plt:description>
+          <ASKL1plt:value>66</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>dfeResF0aHighThresInitLane</ASKL1plt:name>
+          <ASKL1plt:description>dfeResF0aHighThresInitLane</ASKL1plt:description>
+          <ASKL1plt:value>67</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>dfeResF0aHighThresEndLane</ASKL1plt:name>
+          <ASKL1plt:description>dfeResF0aHighThresEndLane</ASKL1plt:description>
+          <ASKL1plt:value>68</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>current1Sel</ASKL1plt:name>
+          <ASKL1plt:description>current1Sel</ASKL1plt:description>
+          <ASKL1plt:value>69</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rl1Sel</ASKL1plt:name>
+          <ASKL1plt:description>rl1Sel</ASKL1plt:description>
+          <ASKL1plt:value>70</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rl1Extra</ASKL1plt:name>
+          <ASKL1plt:description>rl1Extra</ASKL1plt:description>
+          <ASKL1plt:value>71</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>cl1Ctrl</ASKL1plt:name>
+          <ASKL1plt:description>cl1Ctrl</ASKL1plt:description>
+          <ASKL1plt:value>72</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>enMidFreq</ASKL1plt:name>
+          <ASKL1plt:description>enMidFreq</ASKL1plt:description>
+          <ASKL1plt:value>73</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>cs1Mid</ASKL1plt:name>
+          <ASKL1plt:description>cs1Mid</ASKL1plt:description>
+          <ASKL1plt:value>74</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rs1Mid</ASKL1plt:name>
+          <ASKL1plt:description>rs1Mid</ASKL1plt:description>
+          <ASKL1plt:value>75</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rfCtrl</ASKL1plt:name>
+          <ASKL1plt:description>rfCtrl</ASKL1plt:description>
+          <ASKL1plt:value>76</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rl1TiaSel</ASKL1plt:name>
+          <ASKL1plt:description>rl1TiaSel</ASKL1plt:description>
+          <ASKL1plt:value>77</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rl1TiaExtra</ASKL1plt:name>
+          <ASKL1plt:description>rl1TiaExtra</ASKL1plt:description>
+          <ASKL1plt:value>78</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>hpfRSel1st</ASKL1plt:name>
+          <ASKL1plt:description>hpfRSel1st</ASKL1plt:description>
+          <ASKL1plt:value>79</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>current1TiaSel</ASKL1plt:name>
+          <ASKL1plt:description>current1TiaSel</ASKL1plt:description>
+          <ASKL1plt:value>80</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rl2Tune</ASKL1plt:name>
+          <ASKL1plt:description>rl2Tune</ASKL1plt:description>
+          <ASKL1plt:value>81</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rl2Sel</ASKL1plt:name>
+          <ASKL1plt:description>rl2Sel</ASKL1plt:description>
+          <ASKL1plt:value>82</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rs2Sel</ASKL1plt:name>
+          <ASKL1plt:description>rs2Sel</ASKL1plt:description>
+          <ASKL1plt:value>83</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>current2Sel</ASKL1plt:name>
+          <ASKL1plt:description>current2Sel</ASKL1plt:description>
+          <ASKL1plt:value>84</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>hpfRsel2nd</ASKL1plt:name>
+          <ASKL1plt:description>hpfRsel2nd</ASKL1plt:description>
+          <ASKL1plt:value>85</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>BW</ASKL1plt:name>
+          <ASKL1plt:description>BW</ASKL1plt:description>
+          <ASKL1plt:value>86</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>dfeGAIN</ASKL1plt:name>
+          <ASKL1plt:description>dfeGAIN</ASKL1plt:description>
+          <ASKL1plt:value>87</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>dfeGAIN2</ASKL1plt:name>
+          <ASKL1plt:description>dfeGAIN2</ASKL1plt:description>
+          <ASKL1plt:value>88</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>pre1</ASKL1plt:name>
+          <ASKL1plt:description>pre1</ASKL1plt:description>
+          <ASKL1plt:value>89</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>pre2</ASKL1plt:name>
+          <ASKL1plt:description>pre2</ASKL1plt:description>
+          <ASKL1plt:value>90</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>post1</ASKL1plt:name>
+          <ASKL1plt:description>post1</ASKL1plt:description>
+          <ASKL1plt:value>91</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>boolean-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Boolean 32 bits , due to bing endian</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>false</ASKL1plt:name>
+          <ASKL1plt:description>False</ASKL1plt:description>
+          <ASKL1plt:value>0</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>true</ASKL1plt:name>
+          <ASKL1plt:description>True</ASKL1plt:description>
+          <ASKL1plt:value>1</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>serdes-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Serdes Type</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>NA</ASKL1plt:name>
+          <ASKL1plt:description>No serdes</ASKL1plt:description>
+          <ASKL1plt:value>0</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>AVAGO</ASKL1plt:name>
+          <ASKL1plt:description>AVAGO</ASKL1plt:description>
+          <ASKL1plt:value>1</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>COMPHY</ASKL1plt:name>
+          <ASKL1plt:description>COMPHY</ASKL1plt:description>
+          <ASKL1plt:value>2</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>COMPHY_C12G</ASKL1plt:name>
+          <ASKL1plt:description>COMPHY_C12G</ASKL1plt:description>
+          <ASKL1plt:value>3</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>COMPHY_C28G</ASKL1plt:name>
+          <ASKL1plt:description>COMPHY_C28G</ASKL1plt:description>
+          <ASKL1plt:value>4</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>COMPHY_C112G</ASKL1plt:name>
+          <ASKL1plt:description>COMPHY_C112G</ASKL1plt:description>
+          <ASKL1plt:value>5</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>uint8-type</ASKL1plt:name>
+        <ASKL1plt:type>uint32</ASKL1plt:type>
+        <ASKL1plt:description>Uint8 32 bits , due to bing endian</ASKL1plt:description>
+        <ASKL1plt:min>0</ASKL1plt:min>
+        <ASKL1plt:max>255</ASKL1plt:max>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>serdes-termination-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>RX termination mode</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>GND</ASKL1plt:name>
+          <ASKL1plt:description>Enabled</ASKL1plt:description>
+          <ASKL1plt:value>0</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>VDD</ASKL1plt:name>
+          <ASKL1plt:description>Disabled</ASKL1plt:description>
+          <ASKL1plt:value>1</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>FLOATING</ASKL1plt:name>
+          <ASKL1plt:description>RS FEC enabled</ASKL1plt:description>
+          <ASKL1plt:value>2</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>port-interconnect-profile-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Enumerator of interconnect profile.</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>profile_default</ASKL1plt:name>
+          <ASKL1plt:description>Profile Default</ASKL1plt:description>
+          <ASKL1plt:value>0</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>profile_1</ASKL1plt:name>
+          <ASKL1plt:description>Profile 1</ASKL1plt:description>
+          <ASKL1plt:value>1</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>profile_2</ASKL1plt:name>
+          <ASKL1plt:description>Profile 2</ASKL1plt:description>
+          <ASKL1plt:value>2</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+    </ASKL1plt:typedefs>
+    <ASKL1plt:IfModeName>
+      <ASKL1plt:ifModeNameList>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:ifModeName>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">CR4</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">100G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">KR4</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">100G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">SR_LR4</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">100G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">CR4</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">100G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">KR4</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">100G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+      </ASKL1plt:ifModeNameList>
+      <ASKL1plt:ifModeNameList>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">10GR1Fix</ASKL1plt:ifModeName>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">KR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">10G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">disabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+      </ASKL1plt:ifModeNameList>
+      <ASKL1plt:ifModeNameList>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">CR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">25G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">KR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">25G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">KR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">10G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">SR_LR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">25G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">SR_LR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">10G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">CR</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">25G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">KR</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">25G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">KR</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">10G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+      </ASKL1plt:ifModeNameList>
+    </ASKL1plt:IfModeName>
+    <ASKL1plt:Port>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">0</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">1</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">2</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">3</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">4</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">5</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">6</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">7</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">8</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">9</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">10</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">11</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">12</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">13</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">14</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">15</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">16</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">17</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">18</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">19</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">20</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">21</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">22</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">23</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">24</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">25</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">26</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">27</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">28</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">29</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">30</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">31</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">32</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">33</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">34</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">35</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">36</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">37</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">38</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">39</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">40</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">41</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">42</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">43</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">44</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">45</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">46</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">47</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">48</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">49</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">50</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">51</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">52</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">53</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">54</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">55</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">56</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">10GR1Fix</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+    </ASKL1plt:Port>
+  </ASKL1plt:ASK-L1>
+</data>
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FC48x25G8x100GR4/ASK-PP-F12_8T-48x25G-8x100G.md5 b/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FC48x25G8x100GR4/ASK-PP-F12_8T-48x25G-8x100G.md5
new file mode 100644
index 000000000..3c2807997
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FC48x25G8x100GR4/ASK-PP-F12_8T-48x25G-8x100G.md5
@@ -0,0 +1 @@
+1ed6046358d99524cdf9cd9e136a0efa
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FC48x25G8x100GR4/ASK-PP-F12_8T-48x25G-8x100G.xml b/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FC48x25G8x100GR4/ASK-PP-F12_8T-48x25G-8x100G.xml
new file mode 100644
index 000000000..e3239589f
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FC48x25G8x100GR4/ASK-PP-F12_8T-48x25G-8x100G.xml
@@ -0,0 +1,1180 @@
+<?xml version="1.0" encoding="utf-8"?>
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-02-19-1.06" profile="Askpp" sid="34f1c14a-b581-422d-bd10-426dfac013dd">
+  <askppplt:ASK-PP xmlns:askppplt="urn:marvell:askpp:yang">
+    <askppplt:typedefs>
+      <askppplt:typedef>
+        <askppplt:name>std-string</askppplt:name>
+        <askppplt:type>string</askppplt:type>
+        <askppplt:description>standard string.</askppplt:description>
+        <askppplt:min>1</askppplt:min>
+        <askppplt:max>100</askppplt:max>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>queue-id-type</askppplt:name>
+        <askppplt:type>uint32</askppplt:type>
+        <askppplt:description>Queue id</askppplt:description>
+        <askppplt:min>0</askppplt:min>
+        <askppplt:max>7</askppplt:max>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>precent-type</askppplt:name>
+        <askppplt:type>uint32</askppplt:type>
+        <askppplt:description>Precent</askppplt:description>
+        <askppplt:min>0</askppplt:min>
+        <askppplt:max>100</askppplt:max>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>phaThreadId-type</askppplt:name>
+        <askppplt:type>uint32</askppplt:type>
+        <askppplt:description>Thread id</askppplt:description>
+        <askppplt:min>1</askppplt:min>
+        <askppplt:max>255</askppplt:max>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>routing-mode-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies routing mode.</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>POLICY_BASED_ROUTING_ONLY</askppplt:name>
+          <askppplt:description>PBR only</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>TCAM_ROUTER_BASED</askppplt:name>
+          <askppplt:description>Router engine or PBR</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>shared-table-mode-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies table sharing modes for L3 (LPM), L2 (FDB), EM (Exact Match)</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>MID_L3_MID_L2_NO_EM</askppplt:name>
+          <askppplt:description>MID_L3_MID_L2_NO_EM</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>MID_L3_MID_L2_MIN_EM</askppplt:name>
+          <askppplt:description>MID_L3_MID_L2_MIN_EM</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>LOW_MAX_L3_MID_LOW_L2_NO_EM</askppplt:name>
+          <askppplt:description>LOW_MAX_L3_MID_LOW_L2_NO_EM</askppplt:description>
+          <askppplt:value>2</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>MAX_L3_MIN_L2_NO_EM</askppplt:name>
+          <askppplt:description>MAX_L3_MIN_L2_NO_EM</askppplt:description>
+          <askppplt:value>3</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>pha-firmware-image-id-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies supported Pha image id</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>DEFAULT</askppplt:name>
+          <askppplt:description>Default PHA firmware image ID</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>01</askppplt:name>
+          <askppplt:description>01 firmware image ID</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>02</askppplt:name>
+          <askppplt:description>02 PHA firmware image ID</askppplt:description>
+          <askppplt:value>2</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>pha-firmware-thread-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies supported Pha thread type</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>IOAM_INGRESS_SWITCH_IPV4</askppplt:name>
+          <askppplt:description>IOAM_INGRESS_SWITCH_IPV4</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>IOAM_INGRESS_SWITCH_IPV6</askppplt:name>
+          <askppplt:description>IOAM_INGRESS_SWITCH_IPV6</askppplt:description>
+          <askppplt:value>2</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>IOAM_TRANSIT_SWITCH_IPV4</askppplt:name>
+          <askppplt:description>IOAM_TRANSIT_SWITCH_IPV4</askppplt:description>
+          <askppplt:value>3</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>IOAM_TRANSIT_SWITCH_IPV6</askppplt:name>
+          <askppplt:description>IOAM_TRANSIT_SWITCH_IPV6</askppplt:description>
+          <askppplt:value>4</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>INT_IOAM_MIRRORING</askppplt:name>
+          <askppplt:description>INT_IOAM_MIRRORING</askppplt:description>
+          <askppplt:value>5</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>INT_IOAM_EGRESS_SWITCH</askppplt:name>
+          <askppplt:description>INT_IOAM_EGRESS_SWITCH</askppplt:description>
+          <askppplt:value>6</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>MPLS_SR_NO_EL</askppplt:name>
+          <askppplt:description>MPLS_SR_NO_EL</askppplt:description>
+          <askppplt:value>7</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>MPLS_SR_ONE_EL</askppplt:name>
+          <askppplt:description>MPLS_SR_ONE_EL</askppplt:description>
+          <askppplt:value>8</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>MPLS_SR_TWO_EL</askppplt:name>
+          <askppplt:description>MPLS_SR_TWO_EL</askppplt:description>
+          <askppplt:value>9</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>MPLS_SR_THREE_EL</askppplt:name>
+          <askppplt:description>MPLS_SR_THREE_EL</askppplt:description>
+          <askppplt:value>10</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>UNIFIED_SR</askppplt:name>
+          <askppplt:description>UNIFIED_SR</askppplt:description>
+          <askppplt:value>11</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>CLASSIFIER_NSH_OVER_ETHERNET</askppplt:name>
+          <askppplt:description>CLASSIFIER_NSH_OVER_ETHERNET</askppplt:description>
+          <askppplt:value>12</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>CLASSIFIER_NSH_OVER_VXLAN_GPE</askppplt:name>
+          <askppplt:description>CLASSIFIER_NSH_OVER_VXLAN_GPE</askppplt:description>
+          <askppplt:value>13</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SFF_NSH_VXLAN_GPE_TO_ETHERNET</askppplt:name>
+          <askppplt:description>SFF_NSH_VXLAN_GPE_TO_ETHERNET</askppplt:description>
+          <askppplt:value>14</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SFF_NSH_ETHERNET_TO_VXLAN_GPE</askppplt:name>
+          <askppplt:description>SFF_NSH_ETHERNET_TO_VXLAN_GPE</askppplt:description>
+          <askppplt:value>15</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>IOAM_EGRESS_SWITCH_IPV6</askppplt:name>
+          <askppplt:description>IOAM_EGRESS_SWITCH_IPV6</askppplt:description>
+          <askppplt:value>16</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_END_NODE</askppplt:name>
+          <askppplt:description>SRV6_END_NODE</askppplt:description>
+          <askppplt:value>17</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_PENULTIMATE_END_NODE</askppplt:name>
+          <askppplt:description>SRV6_PENULTIMATE_END_NODE</askppplt:description>
+          <askppplt:value>18</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_SRC_NODE_1_SEGMENT</askppplt:name>
+          <askppplt:description>SRV6_SRC_NODE_1_SEGMENT</askppplt:description>
+          <askppplt:value>19</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_SRC_NODE_FIRST_PASS_2_3_SEGMENTS</askppplt:name>
+          <askppplt:description>SRV6_SRC_NODE_FIRST_PASS_2_3_SEGMENTS</askppplt:description>
+          <askppplt:value>20</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_SRC_NODE_SECOND_PASS_3_SEGMENTS</askppplt:name>
+          <askppplt:description>SRV6_SRC_NODE_SECOND_PASS_3_SEGMENTS</askppplt:description>
+          <askppplt:value>21</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_SRC_NODE_SECOND_PASS_2_SEGMENTS</askppplt:name>
+          <askppplt:description>SRV6_SRC_NODE_SECOND_PASS_2_SEGMENTS</askppplt:description>
+          <askppplt:value>22</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_NETWORK_ADD_MSB</askppplt:name>
+          <askppplt:description>SGT_NETWORK_ADD_MSB</askppplt:description>
+          <askppplt:value>23</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_NETWORK_FIX</askppplt:name>
+          <askppplt:description>SGT_NETWORK_FIX</askppplt:description>
+          <askppplt:value>24</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_NETWORK_REMOVE</askppplt:name>
+          <askppplt:description>SGT_NETWORK_REMOVE</askppplt:description>
+          <askppplt:value>25</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_EDSA_FIX</askppplt:name>
+          <askppplt:description>SGT_EDSA_FIX</askppplt:description>
+          <askppplt:value>26</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_EDSA_REMOVE</askppplt:name>
+          <askppplt:description>SGT_EDSA_REMOVE</askppplt:description>
+          <askppplt:value>27</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_GBP_FIX_IPV4</askppplt:name>
+          <askppplt:description>SGT_GBP_FIX_IPV4</askppplt:description>
+          <askppplt:value>28</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_GBP_FIX_IPV6</askppplt:name>
+          <askppplt:description>SGT_GBP_FIX_IPV6</askppplt:description>
+          <askppplt:value>29</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_GBP_REMOVE_IPV4</askppplt:name>
+          <askppplt:description>SGT_GBP_REMOVE_IPV4</askppplt:description>
+          <askppplt:value>30</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_GBP_REMOVE_IPV6</askppplt:name>
+          <askppplt:description>SGT_GBP_REMOVE_IPV6</askppplt:description>
+          <askppplt:value>31</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>PTP_PHY_1_STEP</askppplt:name>
+          <askppplt:description>PTP_PHY_1_STEP</askppplt:description>
+          <askppplt:value>32</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>EGRESS_MIRRORING_METADATA</askppplt:name>
+          <askppplt:description>EGRESS_MIRRORING_METADATA</askppplt:description>
+          <askppplt:value>33</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>CC_ERSPAN_TYPE_II_TRG_DEV_LC_IPV4</askppplt:name>
+          <askppplt:description>CC_ERSPAN_TYPE_II_TRG_DEV_LC_IPV4</askppplt:description>
+          <askppplt:value>34</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>CC_ERSPAN_TYPE_II_TRG_DEV_LC_IPV6</askppplt:name>
+          <askppplt:description>CC_ERSPAN_TYPE_II_TRG_DEV_LC_IPV6</askppplt:description>
+          <askppplt:value>35</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>CC_ERSPAN_TYPE_II_TRG_DEV_DIRECT_IPV4</askppplt:name>
+          <askppplt:description>CC_ERSPAN_TYPE_II_TRG_DEV_DIRECT_IPV4</askppplt:description>
+          <askppplt:value>36</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>CC_ERSPAN_TYPE_II_TRG_DEV_DIRECT_IPV6</askppplt:name>
+          <askppplt:description>CC_ERSPAN_TYPE_II_TRG_DEV_DIRECT_IPV6</askppplt:description>
+          <askppplt:value>37</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>CC_ERSPAN_TYPE_II_SRC_DEV</askppplt:name>
+          <askppplt:description>CC_ERSPAN_TYPE_II_SRC_DEV</askppplt:description>
+          <askppplt:value>38</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>VXLAN_GBP_SOURCE_GROUP_POLICY_ID</askppplt:name>
+          <askppplt:description>VXLAN_GBP_SOURCE_GROUP_POLICY_ID</askppplt:description>
+          <askppplt:value>39</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_BEST_EFFORT</askppplt:name>
+          <askppplt:description>SRV6_BEST_EFFORT</askppplt:description>
+          <askppplt:value>40</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_SRC_NODE_1_CONTAINER</askppplt:name>
+          <askppplt:description>SRV6_SRC_NODE_1_CONTAINER</askppplt:description>
+          <askppplt:value>41</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_SRC_NODE_FIRST_PASS_2_3_CONTAINERS</askppplt:name>
+          <askppplt:description>SRV6_SRC_NODE_FIRST_PASS_2_3_CONTAINERS</askppplt:description>
+          <askppplt:value>42</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_SRC_NODE_SECOND_PASS_2_CONTAINERS</askppplt:name>
+          <askppplt:description>SRV6_SRC_NODE_SECOND_PASS_2_CONTAINERS</askppplt:description>
+          <askppplt:value>43</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_SRC_NODE_SECOND_PASS_3_CONTAINERS</askppplt:name>
+          <askppplt:description>SRV6_SRC_NODE_SECOND_PASS_3_CONTAINERS</askppplt:description>
+          <askppplt:value>44</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_END_NODE_COC32_GSID</askppplt:name>
+          <askppplt:description>SRV6_END_NODE_COC32_GSID</askppplt:description>
+          <askppplt:value>45</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>IPV4_TTL_INCREMENT</askppplt:name>
+          <askppplt:description>IPV4_TTL_INCREMENT</askppplt:description>
+          <askppplt:value>46</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>IPV6_HOP_LIMIT_INCREMENT</askppplt:name>
+          <askppplt:description>IPV6_HOP_LIMIT_INCREMENT</askppplt:description>
+          <askppplt:value>47</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>CLEAR_OUTGOING_MTAG_COMMAND</askppplt:name>
+          <askppplt:description>CLEAR_OUTGOING_MTAG_COMMAND</askppplt:description>
+          <askppplt:value>48</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SFLOW_V5_IPV4</askppplt:name>
+          <askppplt:description>SFLOW_V5_IPV4</askppplt:description>
+          <askppplt:value>49</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SFLOW_V5_IPV6</askppplt:name>
+          <askppplt:description>SFLOW_V5_IPV6</askppplt:description>
+          <askppplt:value>50</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SLS</askppplt:name>
+          <askppplt:description>SLS</askppplt:description>
+          <askppplt:value>51</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>trunk-member-mode-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies supported Pha image id</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>NATIVE</askppplt:name>
+          <askppplt:description>NATIVE
+*  the trunk members are filled
+*  according to the order given by application.
+*  Regular trunk may hold max of 8 members.
+*  Cascade trunk may hold :
+*  max of 64 members</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>FLEX</askppplt:name>
+          <askppplt:description>FLEX
+*  A mode to allows flexibility for
+*  each Regular trunk to state it's max number of members (before starting to add members).
+*  (this mode not effect 'cascade trunk' members)
+*  Regular trunk may hold : max of 4K members. (each trunk set it's own limit)
+*  Cascade trunk may hold : max of 64 members.</askppplt:description>
+          <askppplt:value>2</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>number-physical-port-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>AC3X/AC5X 128, falcon 64, 128, 256, 512, 1024</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>no-ports</askppplt:name>
+          <askppplt:description>no-ports</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>64-ports</askppplt:name>
+          <askppplt:description>64-ports</askppplt:description>
+          <askppplt:value>64</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>128-ports</askppplt:name>
+          <askppplt:description>128-ports</askppplt:description>
+          <askppplt:value>128</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>256-ports</askppplt:name>
+          <askppplt:description>256-ports</askppplt:description>
+          <askppplt:value>256</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>512-ports</askppplt:name>
+          <askppplt:description>512-ports</askppplt:description>
+          <askppplt:value>512</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>1024-ports</askppplt:name>
+          <askppplt:description>1024-ports</askppplt:description>
+          <askppplt:value>1024</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>serdes-ref-clock-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies serdes refernce clock.</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>external_25_single_ended</askppplt:name>
+          <askppplt:description>EXTERNAL_25_SINGLE_ENDED</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>external_125_single_ended</askppplt:name>
+          <askppplt:description>EXTERNAL_125_SINGLE_ENDED</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>external_125_diff</askppplt:name>
+          <askppplt:description>EXTERNAL_125_DIFF</askppplt:description>
+          <askppplt:value>2</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>external_156_25_single_ended</askppplt:name>
+          <askppplt:description>EXTERNAL_156_25_SINGLE_ENDED</askppplt:description>
+          <askppplt:value>3</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>external_156_25_diff</askppplt:name>
+          <askppplt:description>EXTERNAL_156_25_DIFF</askppplt:description>
+          <askppplt:value>4</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>internal_125</askppplt:name>
+          <askppplt:description>INTERNAL_125</askppplt:description>
+          <askppplt:value>5</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>cpu-port-id-type</askppplt:name>
+        <askppplt:type>uint32</askppplt:type>
+        <askppplt:description>CPU port id</askppplt:description>
+        <askppplt:min>0</askppplt:min>
+        <askppplt:max>7</askppplt:max>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>rx-buffer-size-type</askppplt:name>
+        <askppplt:type>uint32</askppplt:type>
+        <askppplt:description>Rx Buffer size</askppplt:description>
+        <askppplt:min>64</askppplt:min>
+        <askppplt:max>10240</askppplt:max>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>tx-sdma-queue-mode-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies TX queue mode.</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>Normal</askppplt:name>
+          <askppplt:description>Application</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>Packet_Generator</askppplt:name>
+          <askppplt:description>Traffic generator</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>alloc-method-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies Buffers allocation method.</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>Dynamic_Alloc</askppplt:name>
+          <askppplt:description>Dynamic</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>Static_Alloc</askppplt:name>
+          <askppplt:description>Static</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>au_mesage_lenght-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies Buffers allocation method.</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>4_words</askppplt:name>
+          <askppplt:description>4 Words</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>8_words</askppplt:name>
+          <askppplt:description>8 Words</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>boolean-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Boolean 32 bits , due to bing endian</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>false</askppplt:name>
+          <askppplt:description>False</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>true</askppplt:name>
+          <askppplt:description>True</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>asic-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>ASIC Type</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>ASIC_AC3X</askppplt:name>
+          <askppplt:description>AC3X</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>ASIC_AC5X</askppplt:name>
+          <askppplt:description>AC5X</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>ASIC_Falcon</askppplt:name>
+          <askppplt:description>FALCON</askppplt:description>
+          <askppplt:value>2</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+    </askppplt:typedefs>
+    <askppplt:ASIC_Type askppplt:type="asic-type">ASIC_Falcon</askppplt:ASIC_Type>
+    <askppplt:PPInit>
+      <askppplt:PP-name askppplt:type="std-string">Falcon-12.8</askppplt:PP-name>
+      <askppplt:Phase1>
+        <askppplt:coreClock askppplt:type="uint32">4294967295</askppplt:coreClock>
+        <askppplt:serdesRefClock askppplt:type="serdes-ref-clock-type">external_25_single_ended</askppplt:serdesRefClock>
+        <askppplt:isrAddrCompletionRegionsBmp askppplt:type="uint32">2</askppplt:isrAddrCompletionRegionsBmp>
+        <askppplt:appAddrCompletionRegionsBmp askppplt:type="uint32">60</askppplt:appAddrCompletionRegionsBmp>
+        <askppplt:maxNumOfPhyPortsToUse askppplt:type="number-physical-port-type">64-ports</askppplt:maxNumOfPhyPortsToUse>
+        <askppplt:tcamParityCalcEnable askppplt:type="boolean-type">false</askppplt:tcamParityCalcEnable>
+        <askppplt:apEnable askppplt:type="boolean-type">true</askppplt:apEnable>
+        <askppplt:numOfDataIntegrityElements askppplt:type="uint32">0</askppplt:numOfDataIntegrityElements>
+      </askppplt:Phase1>
+      <askppplt:Phase2>
+        <askppplt:useMultiNetIfSdma askppplt:type="boolean-type">true</askppplt:useMultiNetIfSdma>
+        <askppplt:auqCfg>
+          <askppplt:auDescNum askppplt:type="uint32">4096</askppplt:auDescNum>
+        </askppplt:auqCfg>
+        <askppplt:fuqCfg>
+          <askppplt:fuDescNum askppplt:type="uint32">2048</askppplt:fuDescNum>
+        </askppplt:fuqCfg>
+        <askppplt:multiNetIfCfg>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">0</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">7</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">6</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">5</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">4</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">3</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">2</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">1</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">0</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">7</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">6</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">5</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">4</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">3</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">2</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">1</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">0</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">7</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">6</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">5</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">4</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">3</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">2</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">1</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">0</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">7</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">6</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">5</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">4</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">3</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">2</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">1</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">0</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">1</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">2</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">3</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">4</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">5</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">6</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">7</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">0</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">1</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">2</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">3</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">4</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">5</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">6</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">7</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">0</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">1</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">2</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">3</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">4</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">5</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">6</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">7</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">0</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">1</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">2</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">3</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">4</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">5</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">6</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Packet_Generator</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">256</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">256</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">144</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">7</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Packet_Generator</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">1</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">1</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">3032</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+        </askppplt:multiNetIfCfg>
+        <askppplt:internal>
+          <askppplt:fuqUseSeparate askppplt:type="boolean-type">false</askppplt:fuqUseSeparate>
+          <askppplt:useSecondaryAuq askppplt:type="boolean-type">false</askppplt:useSecondaryAuq>
+          <askppplt:noTraffic2CPU askppplt:type="boolean-type">false</askppplt:noTraffic2CPU>
+          <askppplt:netifSdmaPortGroupId askppplt:type="uint32">0</askppplt:netifSdmaPortGroupId>
+          <askppplt:auMessageLength askppplt:type="au_mesage_lenght-type">8_words</askppplt:auMessageLength>
+          <askppplt:useDoubleAuq askppplt:type="boolean-type">false</askppplt:useDoubleAuq>
+        </askppplt:internal>
+      </askppplt:Phase2>
+      <askppplt:LogicalInit>
+        <askppplt:routingMode askppplt:type="routing-mode-type">TCAM_ROUTER_BASED</askppplt:routingMode>
+        <askppplt:maxNumOfPbrEntries askppplt:type="uint32">0</askppplt:maxNumOfPbrEntries>
+        <askppplt:sharedTableMode askppplt:type="shared-table-mode-type">MID_L3_MID_L2_NO_EM</askppplt:sharedTableMode>
+        <askppplt:ingressDropEnable askppplt:type="boolean-type">false</askppplt:ingressDropEnable>
+      </askppplt:LogicalInit>
+      <askppplt:LibInit>
+        <askppplt:initBridge askppplt:type="boolean-type">true</askppplt:initBridge>
+        <askppplt:initMirror askppplt:type="boolean-type">true</askppplt:initMirror>
+        <askppplt:initNetIf askppplt:type="boolean-type">true</askppplt:initNetIf>
+        <askppplt:initPhy askppplt:type="boolean-type">true</askppplt:initPhy>
+        <askppplt:initPort askppplt:type="boolean-type">true</askppplt:initPort>
+        <askppplt:initTrunk askppplt:type="boolean-type">true</askppplt:initTrunk>
+        <askppplt:Trunk-params>
+          <askppplt:maxNumberOfTrunks askppplt:type="uint32">1023</askppplt:maxNumberOfTrunks>
+          <askppplt:trunkMembersMode askppplt:type="trunk-member-mode-type">FLEX</askppplt:trunkMembersMode>
+        </askppplt:Trunk-params>
+        <askppplt:initPcl askppplt:type="boolean-type">true</askppplt:initPcl>
+        <askppplt:initTcam askppplt:type="boolean-type">true</askppplt:initTcam>
+        <askppplt:initPolicer askppplt:type="boolean-type">true</askppplt:initPolicer>
+        <askppplt:initPha askppplt:type="boolean-type">true</askppplt:initPha>
+        <askppplt:Pha-params>
+          <askppplt:packetOrderChangeEnable askppplt:type="boolean-type">false</askppplt:packetOrderChangeEnable>
+          <askppplt:phaFwImageId askppplt:type="pha-firmware-image-id-type">02</askppplt:phaFwImageId>
+          <askppplt:phaFwImageIdVersion askppplt:type="uint32">0</askppplt:phaFwImageIdVersion>
+        </askppplt:Pha-params>
+      </askppplt:LibInit>
+    </askppplt:PPInit>
+  </askppplt:ASK-PP>
+</data>
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FC48x25G8x100GR4/SAI-F12_8T-48x25G-8x100G.md5 b/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FC48x25G8x100GR4/SAI-F12_8T-48x25G-8x100G.md5
new file mode 100644
index 000000000..c01137b77
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FC48x25G8x100GR4/SAI-F12_8T-48x25G-8x100G.md5
@@ -0,0 +1 @@
+68eb84de73105b7ea023989d8e8ebd13
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FC48x25G8x100GR4/SAI-F12_8T-48x25G-8x100G.xml b/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FC48x25G8x100GR4/SAI-F12_8T-48x25G-8x100G.xml
new file mode 100644
index 000000000..7039fa0da
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FC48x25G8x100GR4/SAI-F12_8T-48x25G-8x100G.xml
@@ -0,0 +1,518 @@
+<?xml version="1.0" encoding="utf-8"?>
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-02-19-1.06" profile="SAI" sid="c310bbb1-ffca-4c99-9bae-f7d4caff5941">
+  <SAIplt:SAI xmlns:SAIplt="urn:marvell:SAI:yang">
+    <SAIplt:typedefs>
+      <SAIplt:typedef>
+        <SAIplt:name>device-id-type</SAIplt:name>
+        <SAIplt:type>uint32</SAIplt:type>
+        <SAIplt:description>Device ID 0..1</SAIplt:description>
+        <SAIplt:min>0</SAIplt:min>
+        <SAIplt:max>1</SAIplt:max>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>port-id-type</SAIplt:name>
+        <SAIplt:type>uint32</SAIplt:type>
+        <SAIplt:description>Interface number</SAIplt:description>
+        <SAIplt:min>0</SAIplt:min>
+        <SAIplt:max>1023</SAIplt:max>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>logDest-type</SAIplt:name>
+        <SAIplt:type>enumeration</SAIplt:type>
+        <SAIplt:description>Logging Feature Options</SAIplt:description>
+        <SAIplt:enum>
+          <SAIplt:name>SAI_LOG_SYSLOG</SAIplt:name>
+          <SAIplt:description>SYSLOG  {Syslog service should be running to use this option}</SAIplt:description>
+          <SAIplt:value>0</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>SAI_LOG_CONSOLE</SAIplt:name>
+          <SAIplt:description>CONSOLE</SAIplt:description>
+          <SAIplt:value>1</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>SAI_LOG_FILE</SAIplt:name>
+          <SAIplt:description>FILE  {Warning !!! Use with caution. Can cause disk full issues}</SAIplt:description>
+          <SAIplt:value>2</SAIplt:value>
+        </SAIplt:enum>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>InDropCounter-type</SAIplt:name>
+        <SAIplt:type>enumeration</SAIplt:type>
+        <SAIplt:description>Router In Drop Reason Feature Options</SAIplt:description>
+        <SAIplt:enum>
+          <SAIplt:name>TTL_HOPLIMIT_EXCEEDED</SAIplt:name>
+          <SAIplt:description>Router In Drop Counters track TTL &amp; Hop Limit Exceeded Packets</SAIplt:description>
+          <SAIplt:value>0</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>ROUTE_BLACKHOLE</SAIplt:name>
+          <SAIplt:description>Router In Drop Counters track Route Black Hole Packets</SAIplt:description>
+          <SAIplt:value>1</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>IN_DROP_ANY</SAIplt:name>
+          <SAIplt:description>Router In Drop Counters track either TTL &amp; Hop Limit Exceeded or Route Black Hole Packets</SAIplt:description>
+          <SAIplt:value>2</SAIplt:value>
+        </SAIplt:enum>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>log-dest-file-path-type</SAIplt:name>
+        <SAIplt:type>string</SAIplt:type>
+        <SAIplt:description>A string with path to file for logging feature</SAIplt:description>
+        <SAIplt:min>2</SAIplt:min>
+        <SAIplt:max>30</SAIplt:max>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>acl-feature-name-type</SAIplt:name>
+        <SAIplt:type>enumeration</SAIplt:type>
+        <SAIplt:description/>
+        <SAIplt:enum>
+          <SAIplt:name>port-sFlow</SAIplt:name>
+          <SAIplt:description>SFlow over Port</SAIplt:description>
+          <SAIplt:value>0</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>port-counters-ipv4-ipv6</SAIplt:name>
+          <SAIplt:description>Port ipv4/ipv6 counters</SAIplt:description>
+          <SAIplt:value>1</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>control-acl</SAIplt:name>
+          <SAIplt:description>ACLs for control packet handling</SAIplt:description>
+          <SAIplt:value>2</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>debug-counter-acl</SAIplt:name>
+          <SAIplt:description>ACLs for Debug Counters</SAIplt:description>
+          <SAIplt:value>3</SAIplt:value>
+        </SAIplt:enum>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>ingress-acl-stage-type</SAIplt:name>
+        <SAIplt:type>enumeration</SAIplt:type>
+        <SAIplt:description/>
+        <SAIplt:enum>
+          <SAIplt:name>disabled</SAIplt:name>
+          <SAIplt:description>Feature not enabled</SAIplt:description>
+          <SAIplt:value>0</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>IPCL0</SAIplt:name>
+          <SAIplt:description>Stage IPCL0</SAIplt:description>
+          <SAIplt:value>1</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>IPCL1</SAIplt:name>
+          <SAIplt:description>Stage IPCL1</SAIplt:description>
+          <SAIplt:value>2</SAIplt:value>
+        </SAIplt:enum>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>egress-acl-stage-type</SAIplt:name>
+        <SAIplt:type>enumeration</SAIplt:type>
+        <SAIplt:description/>
+        <SAIplt:enum>
+          <SAIplt:name>disabled</SAIplt:name>
+          <SAIplt:description>Feature not enabled</SAIplt:description>
+          <SAIplt:value>0</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>EPCL0</SAIplt:name>
+          <SAIplt:description>Stage EPCL0</SAIplt:description>
+          <SAIplt:value>2</SAIplt:value>
+        </SAIplt:enum>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>feature-priority-type</SAIplt:name>
+        <SAIplt:type>uint32</SAIplt:type>
+        <SAIplt:description>Feature priority</SAIplt:description>
+        <SAIplt:min>2</SAIplt:min>
+        <SAIplt:max>15</SAIplt:max>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>hit-number-type</SAIplt:name>
+        <SAIplt:type>uint32</SAIplt:type>
+        <SAIplt:description>Hit/lookup number</SAIplt:description>
+        <SAIplt:min>0</SAIplt:min>
+        <SAIplt:max>3</SAIplt:max>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>asic-type</SAIplt:name>
+        <SAIplt:type>enumeration</SAIplt:type>
+        <SAIplt:description>ASIC Type</SAIplt:description>
+        <SAIplt:enum>
+          <SAIplt:name>ASIC_AC3X</SAIplt:name>
+          <SAIplt:description>AC3X</SAIplt:description>
+          <SAIplt:value>0</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>ASIC_AC5X</SAIplt:name>
+          <SAIplt:description>AC5X</SAIplt:description>
+          <SAIplt:value>1</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>ASIC_Falcon</SAIplt:name>
+          <SAIplt:description>FALCON</SAIplt:description>
+          <SAIplt:value>2</SAIplt:value>
+        </SAIplt:enum>
+      </SAIplt:typedef>
+    </SAIplt:typedefs>
+    <SAIplt:ASIC_Type SAIplt:type="asic-type">ASIC_Falcon</SAIplt:ASIC_Type>
+    <SAIplt:ASK-BOARD-Profile-Name SAIplt:type="string">ASK-Board-F12_8T-48x25G-8x100G.xml</SAIplt:ASK-BOARD-Profile-Name>
+    <SAIplt:Ports>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">0</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">47</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">1</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">46</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">2</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">45</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">3</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">44</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">4</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">43</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">5</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">42</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">6</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">41</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">7</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">40</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">8</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">39</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">9</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">38</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">10</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">37</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">11</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">36</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">12</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">35</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">13</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">34</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">14</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">33</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">15</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">32</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">16</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">31</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">17</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">30</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">18</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">29</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">19</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">28</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">20</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">27</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">21</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">26</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">22</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">25</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">23</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">24</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">24</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">23</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">25</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">22</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">26</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">21</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">27</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">20</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">28</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">19</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">29</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">18</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">30</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">17</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">31</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">16</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">32</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">15</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">33</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">14</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">34</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">13</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">35</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">12</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">36</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">11</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">37</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">10</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">38</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">9</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">39</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">8</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">40</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">7</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">41</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">6</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">42</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">5</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">43</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">4</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">44</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">3</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">45</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">2</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">46</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">1</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">47</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">0</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">48</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">55</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">52</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">54</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">56</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">53</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">60</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">52</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">64</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">51</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">68</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">50</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">72</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">49</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">76</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">48</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">80</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">56</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+    </SAIplt:Ports>
+    <SAIplt:scalingFalcon>
+      <SAIplt:max_lag_members SAIplt:type="uint32">8</SAIplt:max_lag_members>
+      <SAIplt:max_route_ipv4 SAIplt:type="uint32">0</SAIplt:max_route_ipv4>
+      <SAIplt:max_route_ipv6 SAIplt:type="uint32">0</SAIplt:max_route_ipv6>
+      <SAIplt:max_Nh_Ecmp_Mbr_Per_Grp SAIplt:type="uint32">64</SAIplt:max_Nh_Ecmp_Mbr_Per_Grp>
+      <SAIplt:max_ipv4_tunnel SAIplt:type="uint32">8</SAIplt:max_ipv4_tunnel>
+      <SAIplt:max_ipv6_tunnel SAIplt:type="uint32">8</SAIplt:max_ipv6_tunnel>
+      <SAIplt:max_tti SAIplt:type="uint32">1024</SAIplt:max_tti>
+      <SAIplt:wred_size SAIplt:type="uint32">0</SAIplt:wred_size>
+      <SAIplt:max_nat SAIplt:type="uint32">0</SAIplt:max_nat>
+    </SAIplt:scalingFalcon>
+    <SAIplt:Counters>
+      <SAIplt:cnc-base-list>
+        <SAIplt:counter-base SAIplt:type="uint32">0</SAIplt:counter-base>
+      </SAIplt:cnc-base-list>
+    </SAIplt:Counters>
+    <SAIplt:Logging>
+      <SAIplt:log_dest SAIplt:type="logDest-type">SAI_LOG_SYSLOG</SAIplt:log_dest>
+    </SAIplt:Logging>
+    <SAIplt:Features-using-acl>
+      <SAIplt:feature SAIplt:type="acl-feature-name-type">control-acl</SAIplt:feature>
+      <SAIplt:feature-priority SAIplt:type="feature-priority-type">3</SAIplt:feature-priority>
+      <SAIplt:Ingress>
+        <SAIplt:ingress-stage SAIplt:type="ingress-acl-stage-type">IPCL0</SAIplt:ingress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">1</SAIplt:hit-number>
+      </SAIplt:Ingress>
+      <SAIplt:Egress>
+        <SAIplt:egress-stage SAIplt:type="egress-acl-stage-type">EPCL0</SAIplt:egress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">0</SAIplt:hit-number>
+      </SAIplt:Egress>
+    </SAIplt:Features-using-acl>
+    <SAIplt:Features-using-acl>
+      <SAIplt:feature SAIplt:type="acl-feature-name-type">port-sFlow</SAIplt:feature>
+      <SAIplt:feature-priority SAIplt:type="feature-priority-type">4</SAIplt:feature-priority>
+      <SAIplt:Ingress>
+        <SAIplt:ingress-stage SAIplt:type="ingress-acl-stage-type">IPCL0</SAIplt:ingress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">0</SAIplt:hit-number>
+      </SAIplt:Ingress>
+      <SAIplt:Egress>
+        <SAIplt:egress-stage SAIplt:type="egress-acl-stage-type">EPCL0</SAIplt:egress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">0</SAIplt:hit-number>
+      </SAIplt:Egress>
+    </SAIplt:Features-using-acl>
+    <SAIplt:Features-using-acl>
+      <SAIplt:feature SAIplt:type="acl-feature-name-type">port-counters-ipv4-ipv6</SAIplt:feature>
+      <SAIplt:feature-priority SAIplt:type="feature-priority-type">5</SAIplt:feature-priority>
+      <SAIplt:Ingress>
+        <SAIplt:ingress-stage SAIplt:type="ingress-acl-stage-type">IPCL0</SAIplt:ingress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">3</SAIplt:hit-number>
+      </SAIplt:Ingress>
+      <SAIplt:Egress>
+        <SAIplt:egress-stage SAIplt:type="egress-acl-stage-type">EPCL0</SAIplt:egress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">0</SAIplt:hit-number>
+      </SAIplt:Egress>
+    </SAIplt:Features-using-acl>
+    <SAIplt:Features-using-acl>
+      <SAIplt:feature SAIplt:type="acl-feature-name-type">debug-counter-acl</SAIplt:feature>
+      <SAIplt:feature-priority SAIplt:type="feature-priority-type">2</SAIplt:feature-priority>
+      <SAIplt:Ingress>
+        <SAIplt:ingress-stage SAIplt:type="ingress-acl-stage-type">IPCL0</SAIplt:ingress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">1</SAIplt:hit-number>
+      </SAIplt:Ingress>
+      <SAIplt:Egress>
+        <SAIplt:egress-stage SAIplt:type="egress-acl-stage-type">EPCL0</SAIplt:egress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">0</SAIplt:hit-number>
+      </SAIplt:Egress>
+    </SAIplt:Features-using-acl>
+  </SAIplt:SAI>
+</data>
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON32x400G/buffers_defaults_t0.j2 b/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FC48x25G8x100GR4/buffers_defaults_t0.j2
similarity index 100%
rename from device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON32x400G/buffers_defaults_t0.j2
rename to device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FC48x25G8x100GR4/buffers_defaults_t0.j2
diff --git a/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON32x400G/buffers_defaults_t1.j2 b/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FC48x25G8x100GR4/buffers_defaults_t1.j2
similarity index 100%
rename from device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FALCON32x400G/buffers_defaults_t1.j2
rename to device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FC48x25G8x100GR4/buffers_defaults_t1.j2
diff --git a/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FC48x25G8x100GR4/port_config.ini b/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FC48x25G8x100GR4/port_config.ini
new file mode 100644
index 000000000..a1ee6d9bb
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FC48x25G8x100GR4/port_config.ini
@@ -0,0 +1,58 @@
+#  name         lanes                                alias           speed  autoneg     fec    index
+Ethernet0       0                                   twenty5GigE0     25000    on        none     1
+Ethernet1       1                                   twenty5GigE1     25000    on        none     2
+Ethernet2       2                                   twenty5GigE2     25000    on        none     3
+Ethernet3       3                                   twenty5GigE3     25000    on        none     4
+Ethernet4       4                                   twenty5GigE4     25000    on        none     5
+Ethernet5       5                                   twenty5GigE5     25000    on        none     6
+Ethernet6       6                                   twenty5GigE6     25000    on        none     7
+Ethernet7       7                                   twenty5GigE7     25000    on        none     8
+Ethernet8       8                                   twenty5GigE8     25000    on        none     9
+Ethernet9       9                                   twenty5GigE9     25000    on        none     10
+Ethernet10      10                                  twenty5GigE10    25000    on        none     11
+Ethernet11      11                                  twenty5GigE11    25000    on        none     12
+Ethernet12      12                                  twenty5GigE12    25000    on        none     13
+Ethernet13      13                                  twenty5GigE13    25000    on        none     14
+Ethernet14      14                                  twenty5GigE14    25000    on        none     15
+Ethernet15      15                                  twenty5GigE15    25000    on        none     16
+Ethernet16      16                                  twenty5GigE16    25000    on        none     17
+Ethernet17      17                                  twenty5GigE17    25000    on        none     18
+Ethernet18      18                                  twenty5GigE18    25000    on        none     19
+Ethernet19      19                                  twenty5GigE19    25000    on        none     20
+Ethernet20      20                                  twenty5GigE20    25000    on        none     21
+Ethernet21      21                                  twenty5GigE21    25000    on        none     22
+Ethernet22      22                                  twenty5GigE22    25000    on        none     23
+Ethernet23      23                                  twenty5GigE23    25000    on        none     24
+Ethernet24      24                                  twenty5GigE24    25000    on        none     25
+Ethernet25      25                                  twenty5GigE25    25000    on        none     26
+Ethernet26      26                                  twenty5GigE26    25000    on        none     27
+Ethernet27      27                                  twenty5GigE27    25000    on        none     28
+Ethernet28      28                                  twenty5GigE28    25000    on        none     29
+Ethernet29      29                                  twenty5GigE29    25000    on        none     30
+Ethernet30      30                                  twenty5GigE30    25000    on        none     31
+Ethernet31      31                                  twenty5GigE31    25000    on        none     32
+Ethernet32      32                                  twenty5GigE32    25000    on        none     33
+Ethernet33      33                                  twenty5GigE33    25000    on        none     34
+Ethernet34      34                                  twenty5GigE34    25000    on        none     35
+Ethernet35      35                                  twenty5GigE35    25000    on        none     36
+Ethernet36      36                                  twenty5GigE36    25000    on        none     37
+Ethernet37      37                                  twenty5GigE37    25000    on        none     38
+Ethernet38      38                                  twenty5GigE38    25000    on        none     39
+Ethernet39      39                                  twenty5GigE39    25000    on        none     40
+Ethernet40      40                                  twenty5GigE40    25000    on        none     41
+Ethernet41      41                                  twenty5GigE41    25000    on        none     42
+Ethernet42      42                                  twenty5GigE42    25000    on        none     43
+Ethernet43      43                                  twenty5GigE43    25000    on        none     44
+Ethernet44      44                                  twenty5GigE44    25000    on        none     45
+Ethernet45      45                                  twenty5GigE45    25000    on        none     46
+Ethernet46      46                                  twenty5GigE46    25000    on        none     47
+Ethernet47      47                                  twenty5GigE47    25000    on        none     48
+Ethernet48      48,49,50,51                         one00GigE48      100000   on        rs       49
+Ethernet49      52,53,54,55                         one00GigE49      100000   on        rs       50
+Ethernet50      56,57,58,59                         one00GigE113     100000   on        rs       51
+Ethernet51      60,61,62,63                         one00GigE114     100000   on        rs       52
+Ethernet52      64,65,66,67                         one00GigE115     100000   on        rs       53
+Ethernet53      68,69,70,71                         one00GigE116     100000   on        rs       54
+Ethernet54      72,73,74,75                         one00GigE117     100000   on        rs       55
+Ethernet55      76,77,78,79                         one00GigE118     100000   on        rs       56
+Ethernet56      80                                  tenGigE136       10000    off       none     57
diff --git a/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FC48x25G8x100GR4/profile.ini b/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FC48x25G8x100GR4/profile.ini
new file mode 100644
index 000000000..c2f77685a
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FC48x25G8x100GR4/profile.ini
@@ -0,0 +1 @@
+switchMacAddress=00:01:02:03:04:05
diff --git a/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FC48x25G8x100GR4/sai.profile b/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FC48x25G8x100GR4/sai.profile
new file mode 100644
index 000000000..8f6edc9ae
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/FC48x25G8x100GR4/sai.profile
@@ -0,0 +1,4 @@
+mode=1
+hwId=FC48x25G8x100GR4
+switchProfile=/usr/share/sonic/hwsku/SAI-F12_8T-48x25G-8x100G.xml
+SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/profile.ini
diff --git a/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/db98cx8580_32cd/ASK-Board-F12_8T-48x25G-8x100G.md5 b/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/db98cx8580_32cd/ASK-Board-F12_8T-48x25G-8x100G.md5
new file mode 100644
index 000000000..fc1b8e224
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/db98cx8580_32cd/ASK-Board-F12_8T-48x25G-8x100G.md5
@@ -0,0 +1 @@
+bfcdbba53aa3d422d93b9d900c305516
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/db98cx8580_32cd/ASK-Board-F12_8T-48x25G-8x100G.xml b/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/db98cx8580_32cd/ASK-Board-F12_8T-48x25G-8x100G.xml
new file mode 100644
index 000000000..6bc7a71b1
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/db98cx8580_32cd/ASK-Board-F12_8T-48x25G-8x100G.xml
@@ -0,0 +1,3458 @@
+<?xml version="1.0" encoding="utf-8"?>
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-02-19-1.06" profile="Askboard" sid="eb53f80b-5892-4f8b-9197-a6f626effaba">
+  <askboardplt:ASK-Board xmlns:askboardplt="urn:marvell:askboard:yang">
+    <askboardplt:typedefs>
+      <askboardplt:typedef>
+        <askboardplt:name>std-string</askboardplt:name>
+        <askboardplt:type>string</askboardplt:type>
+        <askboardplt:description>standard string.</askboardplt:description>
+        <askboardplt:min>1</askboardplt:min>
+        <askboardplt:max>100</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>board-callback-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies os/ext drv callback types.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>linux-static</askboardplt:name>
+          <askboardplt:description>Linux Static</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>linux-shared</askboardplt:name>
+          <askboardplt:description>Linux Shared Lib mode</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>external</askboardplt:name>
+          <askboardplt:description>External Os</askboardplt:description>
+          <askboardplt:value>3</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>freeBsd</askboardplt:name>
+          <askboardplt:description>Free BSD</askboardplt:description>
+          <askboardplt:value>4</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>board-pp-map-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies pci info types.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>fixed</askboardplt:name>
+          <askboardplt:description>Fixed</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>autoscan</askboardplt:name>
+          <askboardplt:description>Auto scan</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>board-pp-interface-channel-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies channel interface type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>pci</askboardplt:name>
+          <askboardplt:description>PCI</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>smi</askboardplt:name>
+          <askboardplt:description>SMI</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>twsi</askboardplt:name>
+          <askboardplt:description>TWSI</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>board-pp-as-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies Address space type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>4_regions</askboardplt:name>
+          <askboardplt:description>address-space 4 regions</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>8_regions</askboardplt:name>
+          <askboardplt:description>address-space 8 regions</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>atu</askboardplt:name>
+          <askboardplt:description>address translation unit</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>device-id-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Device ID 0..1</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>1</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>port-mapping-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies port map type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>ethernet_mac</askboardplt:name>
+          <askboardplt:description>ETHERNET_MAC</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>cpu_sdma</askboardplt:name>
+          <askboardplt:description>CPU_SDMA</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>interface-num-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Interface number</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>1023</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>txq-port-number-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>TXq port number </askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>99</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>phy-smi-interface-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Phy SMI interface type.</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>3</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>phy-xsmi-interface-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Phy XSMI interface type.</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>15</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>phy-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the PHY Part Identifier.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>NA</askboardplt:name>
+          <askboardplt:description>No Phy</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E1543</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E1543, used for Combo ports.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E1545</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E1545, used for Copper GE with MAC on PHY support.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E1680</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E1680, used for Copper with speeds of 10M/100M/1G.</askboardplt:description>
+          <askboardplt:value>3</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E151X</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E151X, used for Copper (HW supports combo and fiber).</askboardplt:description>
+          <askboardplt:value>4</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E3140</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E3140, used for Copper with speeds of 100M/1G/10G.
+Uses with FW SolarFlare next generation.</askboardplt:description>
+          <askboardplt:value>5</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E3240</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E3240, used for Copper with speeds of 100M/1G/10G.
+Uses with FW, SolarFlare next generation.</askboardplt:description>
+          <askboardplt:value>6</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E3680</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E3680, used for Octal Copper 100M.</askboardplt:description>
+          <askboardplt:value>7</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E3220</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E3220, used for Combo port with speeds of 100M/1G/10G.
+Uses FW, SolarFlare next generation.</askboardplt:description>
+          <askboardplt:value>8</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E1680L</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E1680L, used for Copper with speeds of 10M/100M/1G.</askboardplt:description>
+          <askboardplt:value>9</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E33X0</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E33X0, used for MGIG Combo.</askboardplt:description>
+          <askboardplt:value>10</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E1548</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E1548, used for Fiber GE.</askboardplt:description>
+          <askboardplt:value>11</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E20X0</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E20X0, used for Copper with speeds of 10M/100M/1G/2.5G/5G.</askboardplt:description>
+          <askboardplt:value>12</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E1512</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E1512, used for Copper with speeds of 10M/100M/1G.</askboardplt:description>
+          <askboardplt:value>13</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E2180</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E2180, used for Copper with speeds of 10M/100M/1G/2.5G/5G.</askboardplt:description>
+          <askboardplt:value>14</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E1780</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E1780, Integrated Octal 10/100/1000 Mbps Energy
+Efficient Ethernet Transceiver</askboardplt:description>
+          <askboardplt:value>15</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E2540</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E2540, 4 ports 10/100/1000/2.5G/5GBASE-T Ethernet
+Transceiver with IEEE 1588v2 PTP Support</askboardplt:description>
+          <askboardplt:value>16</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E2580</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E12580, Octal 10/100/1000/2.5G/5GBASE-T Ethernet Transceiver
+with IEEE 1588v2 PTP Support</askboardplt:description>
+          <askboardplt:value>17</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>physical-port-num-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>PHYSICAL PORT NUM</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>1023</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-port-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the ledstream port type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>PORT_TYPE_TRI_SPEED</askboardplt:name>
+          <askboardplt:description>tri-speed port.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>PORT_TYPE_XG</askboardplt:name>
+          <askboardplt:description>XG port.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-blink-select-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the LED stream blink select type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_SELECT_0</askboardplt:name>
+          <askboardplt:description>Blink 0 signal.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_SELECT_1</askboardplt:name>
+          <askboardplt:description>Blink 1 signal</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-order-mode-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the LED stream ordering mode.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>ORDER_MODE_BY_PORT</askboardplt:name>
+          <askboardplt:description>the indication order is arranged by port.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>ORDER_MODE_BY_CLASS</askboardplt:name>
+          <askboardplt:description>the indication order is arranged by class.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-blink-duty-cycle-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the LED stream blink cycle duty cycle type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DUTY_CYCLE_0</askboardplt:name>
+          <askboardplt:description>25% on, 75% off.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DUTY_CYCLE_1</askboardplt:name>
+          <askboardplt:description>50% on, 50% off.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DUTY_CYCLE_2</askboardplt:name>
+          <askboardplt:description>50% on, 50% off.</askboardplt:description>
+          <askboardplt:value>3</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DUTY_CYCLE_3</askboardplt:name>
+          <askboardplt:description>75% on, 25% off.</askboardplt:description>
+          <askboardplt:value>4</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-blink-duration-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the LED stream blink period type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DURATION_0</askboardplt:name>
+          <askboardplt:description>BLINK_DURATION_0.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DURATION_1</askboardplt:name>
+          <askboardplt:description>BLINK_DURATION_1.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DURATION_2</askboardplt:name>
+          <askboardplt:description>BLINK_DURATION_2.</askboardplt:description>
+          <askboardplt:value>3</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DURATION_3</askboardplt:name>
+          <askboardplt:description>BLINK_DURATION_3.</askboardplt:description>
+          <askboardplt:value>4</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DURATION_4</askboardplt:name>
+          <askboardplt:description>BLINK_DURATION_4.</askboardplt:description>
+          <askboardplt:value>5</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DURATION_5</askboardplt:name>
+          <askboardplt:description>BLINK_DURATION_5.</askboardplt:description>
+          <askboardplt:value>6</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DURATION_6</askboardplt:name>
+          <askboardplt:description>(APPLICABLE DEVICES: xCat3; AC5; Lion2; Bobcat2; Caelum; Aldrin; AC3X; Bobcat3; Aldrin2; Pipe) .</askboardplt:description>
+          <askboardplt:value>7</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DURATION_7</askboardplt:name>
+          <askboardplt:description>APPLICABLE DEVICES: Bobcat2; Caelum; Aldrin; AC3X; Bobcat3; Aldrin2; Pipe).</askboardplt:description>
+          <askboardplt:value>8</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-pulse-stretch-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the LED stream length of stretching for dynamic signals.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>PULSE_STRETCH_0_NO</askboardplt:name>
+          <askboardplt:description>PULSE_STRETCH_0_NO.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>PULSE_STRETCH_1</askboardplt:name>
+          <askboardplt:description>PULSE_STRETCH_1.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>PULSE_STRETCH_2</askboardplt:name>
+          <askboardplt:description>PULSE_STRETCH_2.</askboardplt:description>
+          <askboardplt:value>3</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>PULSE_STRETCH_3</askboardplt:name>
+          <askboardplt:description>PULSE_STRETCH_3.</askboardplt:description>
+          <askboardplt:value>4</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>PULSE_STRETCH_4</askboardplt:name>
+          <askboardplt:description>PULSE_STRETCH_4.</askboardplt:description>
+          <askboardplt:value>5</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>PULSE_STRETCH_5</askboardplt:name>
+          <askboardplt:description>PULSE_STRETCH_5.</askboardplt:description>
+          <askboardplt:value>6</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>PULSE_STRETCH_6</askboardplt:name>
+          <askboardplt:description>(APPLICABLE DEVICES: Bobcat2; Caelum; Aldrin; AC3X; Bobcat3; Aldrin2; Falcon; AC5P; Pipe).</askboardplt:description>
+          <askboardplt:value>7</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>PULSE_STRETCH_7</askboardplt:name>
+          <askboardplt:description>(APPLICABLE DEVICES: Bobcat2; Caelum; Aldrin; AC3X; Bobcat3; Aldrin2; Falcon; AC5P; Pipe).</askboardplt:description>
+          <askboardplt:value>8</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-clock-out-frequency-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the LED stream blink cycle duty cycle type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>_CLOCK_OUT_FREQUENCY_500</askboardplt:name>
+          <askboardplt:description>500 KHz LED clock frequency.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>CLOCK_OUT_FREQUENCY_1000</askboardplt:name>
+          <askboardplt:description>1 MHz LED clock frequency.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>CLOCK_OUT_FREQUENCY_2000</askboardplt:name>
+          <askboardplt:description>2 MHz LED clock frequency.</askboardplt:description>
+          <askboardplt:value>3</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>CLOCK_OUT_FREQUENCY_3000</askboardplt:name>
+          <askboardplt:description>3 MHz LED clock frequency.</askboardplt:description>
+          <askboardplt:value>4</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-class5-select-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the LED stream indication displayed on class5 (for dual-media port/phy).</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>CLASS_5_SELECT_HALF_DUPLEX</askboardplt:name>
+          <askboardplt:description>Half Duplex is displayed on class5.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>CLASS_5_SELECT_FIBER_LINK_UP</askboardplt:name>
+          <askboardplt:description>If port is a dual media port, Fiber Link Up is displayed on class5.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-class13-select-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the LED stream indication displayed on class13 (for dual-media port/phy).</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>CLASS_13_SELECT_LINK_DOWN</askboardplt:name>
+          <askboardplt:description>Link Down is displayed on class13.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>CLASS_13_SELECT_COPPER_LINK_UP</askboardplt:name>
+          <askboardplt:description>If port is a dual media port, Copper Link Up is displayed on class13.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-class-num-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Led Class number</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>11</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>boolean-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Boolean 32 bits , due to bing endian</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>false</askboardplt:name>
+          <askboardplt:description>False</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>true</askboardplt:name>
+          <askboardplt:description>True</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>bus-id-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Bus Id Type, PCI/SMI</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>255</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>function-id-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Function Id Type, PCI/SMI</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>255</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>domain-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Domain, PCI/SMI</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>255</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-interface-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Led interface</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>255</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-position-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Led position</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>63</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>serdes-lane-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>serdes lane</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>7</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>cpu-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>The CPU Internal/External</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>external</askboardplt:name>
+          <askboardplt:description>Extrenal connected CPU</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>internal</askboardplt:name>
+          <askboardplt:description>Internal CPU</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-clock-frequency-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Led Clock Frequency Sip6</askboardplt:description>
+        <askboardplt:min>500</askboardplt:min>
+        <askboardplt:max>80000</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-unit-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Led units</askboardplt:description>
+        <askboardplt:min>1</askboardplt:min>
+        <askboardplt:max>16</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-unit-or-no-unit-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Led units, 0 for no Unit</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>16</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-group-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Led Group</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>1</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-force-data-type</askboardplt:name>
+        <askboardplt:type>string</askboardplt:type>
+        <askboardplt:description>A hexadecimal string with octets represented as hex digits
+separated by colons.  The canonical representation uses
+lowercase characters.</askboardplt:description>
+        <askboardplt:min>3</askboardplt:min>
+        <askboardplt:max>11</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>bit-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Bit range 0..31</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>31</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>bit-size-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Bit leng 1..32</askboardplt:description>
+        <askboardplt:min>1</askboardplt:min>
+        <askboardplt:max>32</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-sip-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>The LED scehme</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>na</askboardplt:name>
+          <askboardplt:description>NA</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>sip5</askboardplt:name>
+          <askboardplt:description>SIP5: AC3x</askboardplt:description>
+          <askboardplt:value>5</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>sip6</askboardplt:name>
+          <askboardplt:description>SIP6: Falcon, AC5x</askboardplt:description>
+          <askboardplt:value>6</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>port-cscd-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the cascade port type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>DSA_1_WORD</askboardplt:name>
+          <askboardplt:description>DSA Regular</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>DSA_2_WORDS</askboardplt:name>
+          <askboardplt:description>DSA Extended</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>NETWORK</askboardplt:name>
+          <askboardplt:description>Network.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>DSA_3_WORDS</askboardplt:name>
+          <askboardplt:description>DSA 3 Words</askboardplt:description>
+          <askboardplt:value>3</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>DSA_4_WORD</askboardplt:name>
+          <askboardplt:description>DSA 4 Words</askboardplt:description>
+          <askboardplt:value>4</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>trunk-cscd-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Specifies the Cascade Trunk id.</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>127</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>port-trunk-cscd-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the cascade port type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>cscdPort</askboardplt:name>
+          <askboardplt:description>Cascade port</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>cscdTrunk</askboardplt:name>
+          <askboardplt:description>Csacde trunk</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>hash-cscd-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the hash used by cascade trunk.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>pkt</askboardplt:name>
+          <askboardplt:description>Hash based on packet</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>srcPort</askboardplt:name>
+          <askboardplt:description>Hash based on source port</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>asic-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>ASIC Type</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>ASIC_AC3X</askboardplt:name>
+          <askboardplt:description>AC3X</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>ASIC_AC5X</askboardplt:name>
+          <askboardplt:description>AC5X</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>ASIC_Falcon</askboardplt:name>
+          <askboardplt:description>FALCON</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+    </askboardplt:typedefs>
+    <askboardplt:ASIC_Type askboardplt:type="asic-type">ASIC_Falcon</askboardplt:ASIC_Type>
+    <askboardplt:boardName askboardplt:type="std-string">Falcon-12.8T-48x25G-8x100G</askboardplt:boardName>
+    <askboardplt:osCallType askboardplt:type="board-callback-type">linux-static</askboardplt:osCallType>
+    <askboardplt:extDrvCallType askboardplt:type="board-callback-type">linux-static</askboardplt:extDrvCallType>
+    <askboardplt:mapType askboardplt:type="board-pp-map-type">autoscan</askboardplt:mapType>
+    <askboardplt:cpuType askboardplt:type="cpu-type">external</askboardplt:cpuType>
+    <askboardplt:mngInterfaceType askboardplt:type="board-pp-interface-channel-type">pci</askboardplt:mngInterfaceType>
+    <askboardplt:adressSpaceType askboardplt:type="board-pp-as-type">atu</askboardplt:adressSpaceType>
+    <askboardplt:device-list>
+      <askboardplt:devNum askboardplt:type="device-id-type">0</askboardplt:devNum>
+      <askboardplt:deviceId askboardplt:type="device-id-type">0</askboardplt:deviceId>
+      <askboardplt:pp-profile-name askboardplt:type="std-string">ASK-PP-F12_8T-48x25G-8x100G.xml</askboardplt:pp-profile-name>
+      <askboardplt:L1-profile-name askboardplt:type="std-string">ASK-L1-F12_8T-48x25G-8x100G.xml</askboardplt:L1-profile-name>
+      <askboardplt:ledStreamType askboardplt:type="led-sip-type">sip6</askboardplt:ledStreamType>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">0</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">32</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP4</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">0</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">1</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">33</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">2</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">34</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">3</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">35</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">4</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">40</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP5</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">1</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">5</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">41</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">6</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">42</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">7</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">43</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">8</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">48</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP6</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">0</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">9</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">49</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">10</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">50</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">11</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">51</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">12</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">56</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP7</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">1</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">13</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">57</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">14</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">58</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">15</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">59</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">16</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">64</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP0</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">0</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">17</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">65</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">18</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">66</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">19</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">67</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">20</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">72</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP1</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">1</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">21</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">73</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">22</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">74</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">23</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">75</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">24</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">80</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP2</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">0</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">25</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">81</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">26</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">82</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">27</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">83</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">28</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">88</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP3</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">1</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">29</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">89</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">30</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">90</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">31</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">91</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">32</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">96</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP4</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">0</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">33</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">97</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">34</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">98</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">35</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">99</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">36</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">104</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP5</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">1</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">37</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">105</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">38</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">106</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">39</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">107</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">40</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">112</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP6</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">0</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">41</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">113</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">42</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">114</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">43</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">115</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">44</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">120</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP7</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">1</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">45</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">121</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">46</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">122</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">47</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">123</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">48</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">128</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP0</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">0</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">49</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">136</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP1</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">1</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">50</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">144</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP2</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">0</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">51</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">152</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP3</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">1</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">52</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">160</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP4</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">0</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">53</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">168</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP5</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">1</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">54</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">176</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP6</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">0</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">55</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">184</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP7</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">1</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">56</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">258</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">2</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">63</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">cpu_sdma</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">273</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">57</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">cpu_sdma</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">274</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">58</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">cpu_sdma</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">275</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">59</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">cpu_sdma</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">276</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+      </askboardplt:portMap-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">32</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">38</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">34</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">39</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">33</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">37</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">36</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">35</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">40</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">45</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">41</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">46</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">42</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">47</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">44</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">43</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">50</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">54</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">49</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">51</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">48</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">52</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">53</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">55</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">57</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">62</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">58</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">63</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">56</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">60</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">59</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">61</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">64</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">71</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">66</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">68</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">65</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">69</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">67</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">70</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">72</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">77</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">73</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">79</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">75</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">74</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">76</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">78</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">81</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">85</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">80</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">87</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">84</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">82</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">83</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">86</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">88</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">94</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">89</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">95</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">90</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">91</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">92</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">93</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">96</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">102</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">98</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">103</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">97</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">101</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">100</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">99</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">104</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">109</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">105</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">110</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">106</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">111</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">108</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">107</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">114</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">118</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">113</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">115</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">112</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">116</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">117</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">119</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">121</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">126</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">122</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">127</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">120</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">124</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">123</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">125</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">128</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">135</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">130</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">132</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">129</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">133</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">131</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">134</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">136</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">141</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">137</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">143</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">139</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">138</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">140</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">142</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">145</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">149</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">144</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">151</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">148</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">146</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">147</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">150</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">152</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">158</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">153</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">159</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">154</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">155</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">156</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">157</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">160</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">166</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">162</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">167</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">161</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">165</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">164</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">163</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">168</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">173</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">169</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">174</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">170</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">175</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">176</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">172</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">171</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">178</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">182</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">177</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">179</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">180</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">181</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">183</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">185</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">190</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">186</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">191</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">184</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">188</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">187</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">189</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">192</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">199</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">194</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">196</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">193</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">197</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">195</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">198</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">200</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">205</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">201</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">207</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">203</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">202</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">204</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">206</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">209</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">213</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">208</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">215</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">212</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">210</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">211</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">214</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">216</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">222</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">217</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">223</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">218</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">219</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">220</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">221</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">224</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">230</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">226</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">231</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">225</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">229</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">228</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">227</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">232</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">237</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">233</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">238</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">234</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">239</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">236</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">235</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">242</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">246</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">241</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">243</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">240</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">244</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">245</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">247</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">249</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">254</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">250</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">255</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">248</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">252</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">251</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">253</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">0</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">7</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">2</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">4</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">1</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">5</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">3</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">6</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">8</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">13</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">9</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">15</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">11</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">10</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">12</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">14</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">17</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">21</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">16</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">23</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">20</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">18</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">19</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">22</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">24</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">30</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">25</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">31</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">26</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">27</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">28</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">29</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:Ledstream-interface-list>
+        <askboardplt:ledstream-interface-number askboardplt:type="led-interface-type">0</askboardplt:ledstream-interface-number>
+        <askboardplt:ledstream-configSet>
+          <askboardplt:ledOrganize askboardplt:type="led-stream-order-mode-type">ORDER_MODE_BY_CLASS</askboardplt:ledOrganize>
+          <askboardplt:blink0DutyCycle askboardplt:type="led-stream-blink-duty-cycle-type">BLINK_DUTY_CYCLE_0</askboardplt:blink0DutyCycle>
+          <askboardplt:blink0Duration askboardplt:type="led-stream-blink-duration-type">BLINK_DURATION_0</askboardplt:blink0Duration>
+          <askboardplt:blink1DutyCycle askboardplt:type="led-stream-blink-duty-cycle-type">BLINK_DUTY_CYCLE_0</askboardplt:blink1DutyCycle>
+          <askboardplt:blink1Duration askboardplt:type="led-stream-blink-duration-type">BLINK_DURATION_1</askboardplt:blink1Duration>
+          <askboardplt:pulseStretch askboardplt:type="led-stream-pulse-stretch-type">PULSE_STRETCH_1</askboardplt:pulseStretch>
+          <askboardplt:invertEnable askboardplt:type="boolean-type">false</askboardplt:invertEnable>
+          <askboardplt:SIP6ledClockFrequency askboardplt:type="led-stream-clock-frequency-type">1627</askboardplt:SIP6ledClockFrequency>
+          <askboardplt:ledClockPosEdgeModeEnable askboardplt:type="boolean-type">false</askboardplt:ledClockPosEdgeModeEnable>
+          <askboardplt:ledUnit-List>
+            <askboardplt:ledUnit askboardplt:type="led-unit-type">1</askboardplt:ledUnit>
+            <askboardplt:ledStart askboardplt:type="uint32">64</askboardplt:ledStart>
+            <askboardplt:ledEnd askboardplt:type="uint32">66</askboardplt:ledEnd>
+            <askboardplt:ledChainBypass askboardplt:type="boolean-type">false</askboardplt:ledChainBypass>
+          </askboardplt:ledUnit-List>
+          <askboardplt:ledUnit-List>
+            <askboardplt:ledUnit askboardplt:type="led-unit-type">2</askboardplt:ledUnit>
+            <askboardplt:ledStart askboardplt:type="uint32">64</askboardplt:ledStart>
+            <askboardplt:ledEnd askboardplt:type="uint32">65</askboardplt:ledEnd>
+            <askboardplt:ledChainBypass askboardplt:type="boolean-type">false</askboardplt:ledChainBypass>
+          </askboardplt:ledUnit-List>
+          <askboardplt:ledUnit-List>
+            <askboardplt:ledUnit askboardplt:type="led-unit-type">3</askboardplt:ledUnit>
+            <askboardplt:ledStart askboardplt:type="uint32">64</askboardplt:ledStart>
+            <askboardplt:ledEnd askboardplt:type="uint32">65</askboardplt:ledEnd>
+            <askboardplt:ledChainBypass askboardplt:type="boolean-type">false</askboardplt:ledChainBypass>
+          </askboardplt:ledUnit-List>
+          <askboardplt:ledUnit-List>
+            <askboardplt:ledUnit askboardplt:type="led-unit-type">4</askboardplt:ledUnit>
+            <askboardplt:ledStart askboardplt:type="uint32">64</askboardplt:ledStart>
+            <askboardplt:ledEnd askboardplt:type="uint32">66</askboardplt:ledEnd>
+            <askboardplt:ledChainBypass askboardplt:type="boolean-type">false</askboardplt:ledChainBypass>
+          </askboardplt:ledUnit-List>
+          <askboardplt:ledUnit-List>
+            <askboardplt:ledUnit askboardplt:type="led-unit-type">5</askboardplt:ledUnit>
+            <askboardplt:ledStart askboardplt:type="uint32">64</askboardplt:ledStart>
+            <askboardplt:ledEnd askboardplt:type="uint32">66</askboardplt:ledEnd>
+            <askboardplt:ledChainBypass askboardplt:type="boolean-type">false</askboardplt:ledChainBypass>
+          </askboardplt:ledUnit-List>
+          <askboardplt:ledUnit-List>
+            <askboardplt:ledUnit askboardplt:type="led-unit-type">6</askboardplt:ledUnit>
+            <askboardplt:ledStart askboardplt:type="uint32">64</askboardplt:ledStart>
+            <askboardplt:ledEnd askboardplt:type="uint32">65</askboardplt:ledEnd>
+            <askboardplt:ledChainBypass askboardplt:type="boolean-type">false</askboardplt:ledChainBypass>
+          </askboardplt:ledUnit-List>
+          <askboardplt:ledUnit-List>
+            <askboardplt:ledUnit askboardplt:type="led-unit-type">7</askboardplt:ledUnit>
+            <askboardplt:ledStart askboardplt:type="uint32">64</askboardplt:ledStart>
+            <askboardplt:ledEnd askboardplt:type="uint32">65</askboardplt:ledEnd>
+            <askboardplt:ledChainBypass askboardplt:type="boolean-type">false</askboardplt:ledChainBypass>
+          </askboardplt:ledUnit-List>
+          <askboardplt:ledUnit-List>
+            <askboardplt:ledUnit askboardplt:type="led-unit-type">8</askboardplt:ledUnit>
+            <askboardplt:ledStart askboardplt:type="uint32">64</askboardplt:ledStart>
+            <askboardplt:ledEnd askboardplt:type="uint32">66</askboardplt:ledEnd>
+            <askboardplt:ledChainBypass askboardplt:type="boolean-type">false</askboardplt:ledChainBypass>
+          </askboardplt:ledUnit-List>
+        </askboardplt:ledstream-configSet>
+        <askboardplt:ledstream-class-manipulation-list>
+          <askboardplt:classNum askboardplt:type="led-class-num-type">0</askboardplt:classNum>
+          <askboardplt:portType askboardplt:type="led-stream-port-type">PORT_TYPE_XG</askboardplt:portType>
+          <askboardplt:blinkEnable askboardplt:type="boolean-type">false</askboardplt:blinkEnable>
+          <askboardplt:blinkSelect askboardplt:type="led-stream-blink-select-type">BLINK_SELECT_0</askboardplt:blinkSelect>
+          <askboardplt:forceEnable askboardplt:type="boolean-type">false</askboardplt:forceEnable>
+          <askboardplt:pulseStretchEnable askboardplt:type="boolean-type">true</askboardplt:pulseStretchEnable>
+          <askboardplt:disableOnLinkDown askboardplt:type="boolean-type">false</askboardplt:disableOnLinkDown>
+        </askboardplt:ledstream-class-manipulation-list>
+        <askboardplt:ledstream-class-manipulation-list>
+          <askboardplt:classNum askboardplt:type="led-class-num-type">1</askboardplt:classNum>
+          <askboardplt:portType askboardplt:type="led-stream-port-type">PORT_TYPE_XG</askboardplt:portType>
+          <askboardplt:blinkEnable askboardplt:type="boolean-type">false</askboardplt:blinkEnable>
+          <askboardplt:blinkSelect askboardplt:type="led-stream-blink-select-type">BLINK_SELECT_0</askboardplt:blinkSelect>
+          <askboardplt:forceEnable askboardplt:type="boolean-type">false</askboardplt:forceEnable>
+          <askboardplt:pulseStretchEnable askboardplt:type="boolean-type">true</askboardplt:pulseStretchEnable>
+          <askboardplt:disableOnLinkDown askboardplt:type="boolean-type">false</askboardplt:disableOnLinkDown>
+        </askboardplt:ledstream-class-manipulation-list>
+        <askboardplt:ledstream-class-manipulation-list>
+          <askboardplt:classNum askboardplt:type="led-class-num-type">2</askboardplt:classNum>
+          <askboardplt:portType askboardplt:type="led-stream-port-type">PORT_TYPE_XG</askboardplt:portType>
+          <askboardplt:blinkEnable askboardplt:type="boolean-type">true</askboardplt:blinkEnable>
+          <askboardplt:blinkSelect askboardplt:type="led-stream-blink-select-type">BLINK_SELECT_0</askboardplt:blinkSelect>
+          <askboardplt:forceEnable askboardplt:type="boolean-type">false</askboardplt:forceEnable>
+          <askboardplt:pulseStretchEnable askboardplt:type="boolean-type">true</askboardplt:pulseStretchEnable>
+          <askboardplt:disableOnLinkDown askboardplt:type="boolean-type">true</askboardplt:disableOnLinkDown>
+        </askboardplt:ledstream-class-manipulation-list>
+        <askboardplt:ledstream-class-manipulation-list>
+          <askboardplt:classNum askboardplt:type="led-class-num-type">3</askboardplt:classNum>
+          <askboardplt:portType askboardplt:type="led-stream-port-type">PORT_TYPE_XG</askboardplt:portType>
+          <askboardplt:blinkEnable askboardplt:type="boolean-type">false</askboardplt:blinkEnable>
+          <askboardplt:blinkSelect askboardplt:type="led-stream-blink-select-type">BLINK_SELECT_0</askboardplt:blinkSelect>
+          <askboardplt:forceEnable askboardplt:type="boolean-type">false</askboardplt:forceEnable>
+          <askboardplt:pulseStretchEnable askboardplt:type="boolean-type">true</askboardplt:pulseStretchEnable>
+          <askboardplt:disableOnLinkDown askboardplt:type="boolean-type">false</askboardplt:disableOnLinkDown>
+        </askboardplt:ledstream-class-manipulation-list>
+        <askboardplt:ledstream-class-manipulation-list>
+          <askboardplt:classNum askboardplt:type="led-class-num-type">4</askboardplt:classNum>
+          <askboardplt:portType askboardplt:type="led-stream-port-type">PORT_TYPE_XG</askboardplt:portType>
+          <askboardplt:blinkEnable askboardplt:type="boolean-type">false</askboardplt:blinkEnable>
+          <askboardplt:blinkSelect askboardplt:type="led-stream-blink-select-type">BLINK_SELECT_0</askboardplt:blinkSelect>
+          <askboardplt:forceEnable askboardplt:type="boolean-type">false</askboardplt:forceEnable>
+          <askboardplt:pulseStretchEnable askboardplt:type="boolean-type">true</askboardplt:pulseStretchEnable>
+          <askboardplt:disableOnLinkDown askboardplt:type="boolean-type">false</askboardplt:disableOnLinkDown>
+        </askboardplt:ledstream-class-manipulation-list>
+        <askboardplt:ledstream-class-manipulation-list>
+          <askboardplt:classNum askboardplt:type="led-class-num-type">5</askboardplt:classNum>
+          <askboardplt:portType askboardplt:type="led-stream-port-type">PORT_TYPE_XG</askboardplt:portType>
+          <askboardplt:blinkEnable askboardplt:type="boolean-type">false</askboardplt:blinkEnable>
+          <askboardplt:blinkSelect askboardplt:type="led-stream-blink-select-type">BLINK_SELECT_0</askboardplt:blinkSelect>
+          <askboardplt:forceEnable askboardplt:type="boolean-type">false</askboardplt:forceEnable>
+          <askboardplt:pulseStretchEnable askboardplt:type="boolean-type">true</askboardplt:pulseStretchEnable>
+          <askboardplt:disableOnLinkDown askboardplt:type="boolean-type">false</askboardplt:disableOnLinkDown>
+        </askboardplt:ledstream-class-manipulation-list>
+      </askboardplt:Ledstream-interface-list>
+    </askboardplt:device-list>
+    <askboardplt:UDSFilePath askboardplt:type="std-string">/tmp/cpss_uds</askboardplt:UDSFilePath>
+    <askboardplt:serdesMux>
+      <askboardplt:serdesMuxSchemePortMod askboardplt:type="uint32">8</askboardplt:serdesMuxSchemePortMod>
+      <askboardplt:serdesMuxSchemeList>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP0</askboardplt:serdesMuxScheme>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">0</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">7</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">2</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">4</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">1</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">5</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">3</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">6</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+      </askboardplt:serdesMuxSchemeList>
+      <askboardplt:serdesMuxSchemeList>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP1</askboardplt:serdesMuxScheme>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">0</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">5</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">1</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">7</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">3</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">2</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">4</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">6</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+      </askboardplt:serdesMuxSchemeList>
+      <askboardplt:serdesMuxSchemeList>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP2</askboardplt:serdesMuxScheme>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">1</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">5</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">0</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">7</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">4</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">2</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">3</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">6</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+      </askboardplt:serdesMuxSchemeList>
+      <askboardplt:serdesMuxSchemeList>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP3</askboardplt:serdesMuxScheme>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">0</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">6</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">1</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">7</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">2</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">3</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">4</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">5</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+      </askboardplt:serdesMuxSchemeList>
+      <askboardplt:serdesMuxSchemeList>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP4</askboardplt:serdesMuxScheme>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">0</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">6</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">2</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">7</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">1</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">5</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">4</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">3</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+      </askboardplt:serdesMuxSchemeList>
+      <askboardplt:serdesMuxSchemeList>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP5</askboardplt:serdesMuxScheme>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">0</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">5</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">1</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">6</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">2</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">7</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">4</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">3</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+      </askboardplt:serdesMuxSchemeList>
+      <askboardplt:serdesMuxSchemeList>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP6</askboardplt:serdesMuxScheme>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">2</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">6</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">1</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">3</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">0</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">4</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">5</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">7</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+      </askboardplt:serdesMuxSchemeList>
+      <askboardplt:serdesMuxSchemeList>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP7</askboardplt:serdesMuxScheme>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">1</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">6</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">2</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">7</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">0</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">4</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">3</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">5</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+      </askboardplt:serdesMuxSchemeList>
+    </askboardplt:serdesMux>
+  </askboardplt:ASK-Board>
+</data>
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/db98cx8580_32cd/ASK-L1-F12_8T-48x25G-8x100G.md5 b/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/db98cx8580_32cd/ASK-L1-F12_8T-48x25G-8x100G.md5
new file mode 100644
index 000000000..80f5a4819
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/db98cx8580_32cd/ASK-L1-F12_8T-48x25G-8x100G.md5
@@ -0,0 +1 @@
+bae90780b221c3059c83112fab4abca5
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/db98cx8580_32cd/ASK-L1-F12_8T-48x25G-8x100G.xml b/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/db98cx8580_32cd/ASK-L1-F12_8T-48x25G-8x100G.xml
new file mode 100644
index 000000000..796023cd7
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/db98cx8580_32cd/ASK-L1-F12_8T-48x25G-8x100G.xml
@@ -0,0 +1,1246 @@
+<?xml version="1.0" encoding="utf-8"?>
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-02-19-1.06" profile="Askl1" sid="71d3ab0f-3ac2-452a-a5c9-2dfdc969734a">
+  <ASKL1plt:ASK-L1 xmlns:ASKL1plt="urn:marvell:ASKL1:yang">
+    <ASKL1plt:typedefs>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>interface-mode-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Specifies supported Interface modes</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>1000BASE_X</ASKL1plt:name>
+          <ASKL1plt:description>1G</ASKL1plt:description>
+          <ASKL1plt:value>6</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>SGMII</ASKL1plt:name>
+          <ASKL1plt:description>1G , 2.5G</ASKL1plt:description>
+          <ASKL1plt:value>3</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>QSGMII</ASKL1plt:name>
+          <ASKL1plt:description>1G</ASKL1plt:description>
+          <ASKL1plt:value>13</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>KR</ASKL1plt:name>
+          <ASKL1plt:description>10G, 12G, 20G, 40G, 100G</ASKL1plt:description>
+          <ASKL1plt:value>16</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>SR_LR</ASKL1plt:name>
+          <ASKL1plt:description>5G, 10G, 12G, 20G, 40G</ASKL1plt:description>
+          <ASKL1plt:value>20</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>KR2</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>27</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>KR4</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>28</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>SR_LR2</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>29</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>SR_LR4</ASKL1plt:name>
+          <ASKL1plt:description>100G</ASKL1plt:description>
+          <ASKL1plt:value>30</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>KR_C</ASKL1plt:name>
+          <ASKL1plt:description>CONSORTIUM - 25G</ASKL1plt:description>
+          <ASKL1plt:value>32</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>CR_C</ASKL1plt:name>
+          <ASKL1plt:description>CONSORTIUM - 25G</ASKL1plt:description>
+          <ASKL1plt:value>33</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>KR2_C</ASKL1plt:name>
+          <ASKL1plt:description>CONSORTIUM - 50G</ASKL1plt:description>
+          <ASKL1plt:value>34</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>CR2_C</ASKL1plt:name>
+          <ASKL1plt:description>CONSORTIUM - 50G</ASKL1plt:description>
+          <ASKL1plt:value>35</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>CR</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>36</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>CR2</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>37</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>CR4</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>38</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>KR_S</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>39</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>CR_S</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>40</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>KR8</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>41</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>CR8</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>42</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>SR_LR8</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>43</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>USX_10G_QXGMII</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>51</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>USX_20G_QXGMII</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>52</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>USX_OUSGMII</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>53</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>USX_20G_OXGMII</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>54</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>NA</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>57</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>port-speed-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Specifies supported speeds</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>1G</ASKL1plt:name>
+          <ASKL1plt:description>1G</ASKL1plt:description>
+          <ASKL1plt:value>2</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>10G</ASKL1plt:name>
+          <ASKL1plt:description>10G</ASKL1plt:description>
+          <ASKL1plt:value>3</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>2500M</ASKL1plt:name>
+          <ASKL1plt:description>2.5G</ASKL1plt:description>
+          <ASKL1plt:value>5</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>5G</ASKL1plt:name>
+          <ASKL1plt:description>5G</ASKL1plt:description>
+          <ASKL1plt:value>6</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>25G</ASKL1plt:name>
+          <ASKL1plt:description>25G, used in combination with CPSS_PORT_INTERFACE_MODE_KR_E, CPSS_PORT_INTERFACE_MODE_KR2_E</ASKL1plt:description>
+          <ASKL1plt:value>21</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>40G</ASKL1plt:name>
+          <ASKL1plt:description>40G</ASKL1plt:description>
+          <ASKL1plt:value>9</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>50G</ASKL1plt:name>
+          <ASKL1plt:description>50G</ASKL1plt:description>
+          <ASKL1plt:value>14</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>100G</ASKL1plt:name>
+          <ASKL1plt:description>100G</ASKL1plt:description>
+          <ASKL1plt:value>13</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>200G</ASKL1plt:name>
+          <ASKL1plt:description>200G</ASKL1plt:description>
+          <ASKL1plt:value>24</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>400G</ASKL1plt:name>
+          <ASKL1plt:description>400G</ASKL1plt:description>
+          <ASKL1plt:value>25</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>NA</ASKL1plt:name>
+          <ASKL1plt:description>NA</ASKL1plt:description>
+          <ASKL1plt:value>35</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>fec-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Rx parameter type</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>enabled</ASKL1plt:name>
+          <ASKL1plt:description>Enabled</ASKL1plt:description>
+          <ASKL1plt:value>0</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>disabled</ASKL1plt:name>
+          <ASKL1plt:description>Disabled</ASKL1plt:description>
+          <ASKL1plt:value>1</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rs_enabled</ASKL1plt:name>
+          <ASKL1plt:description>RS FEC enabled</ASKL1plt:description>
+          <ASKL1plt:value>2</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>both_enabled</ASKL1plt:name>
+          <ASKL1plt:description>Both enabled</ASKL1plt:description>
+          <ASKL1plt:value>3</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rs_544_514_enabled</ASKL1plt:name>
+          <ASKL1plt:description>RS FEC 544 and 514</ASKL1plt:description>
+          <ASKL1plt:value>4</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>physical-port-num-type</ASKL1plt:name>
+        <ASKL1plt:type>uint32</ASKL1plt:type>
+        <ASKL1plt:description>PHYSICAL PORT NUM</ASKL1plt:description>
+        <ASKL1plt:min>0</ASKL1plt:min>
+        <ASKL1plt:max>1023</ASKL1plt:max>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>tx-param-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Tx parameter type</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>atten</ASKL1plt:name>
+          <ASKL1plt:description>atten</ASKL1plt:description>
+          <ASKL1plt:value>0</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>post</ASKL1plt:name>
+          <ASKL1plt:description>post</ASKL1plt:description>
+          <ASKL1plt:value>1</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>pre</ASKL1plt:name>
+          <ASKL1plt:description>pre</ASKL1plt:description>
+          <ASKL1plt:value>2</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>pre2</ASKL1plt:name>
+          <ASKL1plt:description>pre2</ASKL1plt:description>
+          <ASKL1plt:value>3</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>pre3</ASKL1plt:name>
+          <ASKL1plt:description>pre3</ASKL1plt:description>
+          <ASKL1plt:value>4</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>peak</ASKL1plt:name>
+          <ASKL1plt:description>peak</ASKL1plt:description>
+          <ASKL1plt:value>5</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>main</ASKL1plt:name>
+          <ASKL1plt:description>main</ASKL1plt:description>
+          <ASKL1plt:value>6</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>txAmpAdjEn</ASKL1plt:name>
+          <ASKL1plt:description>txAmpAdjEn</ASKL1plt:description>
+          <ASKL1plt:value>7</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>emph0</ASKL1plt:name>
+          <ASKL1plt:description>emph0</ASKL1plt:description>
+          <ASKL1plt:value>8</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>emph1</ASKL1plt:name>
+          <ASKL1plt:description>emph1</ASKL1plt:description>
+          <ASKL1plt:value>9</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>txAmpShft</ASKL1plt:name>
+          <ASKL1plt:description>txAmpShft</ASKL1plt:description>
+          <ASKL1plt:value>10</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>txEmphEn</ASKL1plt:name>
+          <ASKL1plt:description>txEmphEn</ASKL1plt:description>
+          <ASKL1plt:value>11</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>txEmphEn1</ASKL1plt:name>
+          <ASKL1plt:description>txEmphEn1</ASKL1plt:description>
+          <ASKL1plt:value>12</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>txAmpAdj</ASKL1plt:name>
+          <ASKL1plt:description>txAmpAdj</ASKL1plt:description>
+          <ASKL1plt:value>13</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>slewCtrlEn</ASKL1plt:name>
+          <ASKL1plt:description>slewCtrlEn</ASKL1plt:description>
+          <ASKL1plt:value>14</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>slewRate</ASKL1plt:name>
+          <ASKL1plt:description>slewRate</ASKL1plt:description>
+          <ASKL1plt:value>15</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>rx-param-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Rx parameter type</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>sqlch</ASKL1plt:name>
+          <ASKL1plt:description>sqlch</ASKL1plt:description>
+          <ASKL1plt:value>0</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>DC</ASKL1plt:name>
+          <ASKL1plt:description>DC</ASKL1plt:description>
+          <ASKL1plt:value>1</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>LF</ASKL1plt:name>
+          <ASKL1plt:description>LF</ASKL1plt:description>
+          <ASKL1plt:value>2</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>HF</ASKL1plt:name>
+          <ASKL1plt:description>HF</ASKL1plt:description>
+          <ASKL1plt:value>3</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>gainShape1</ASKL1plt:name>
+          <ASKL1plt:description>gainShape1</ASKL1plt:description>
+          <ASKL1plt:value>4</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>gainShape2</ASKL1plt:name>
+          <ASKL1plt:description>gainShape2</ASKL1plt:description>
+          <ASKL1plt:value>5</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>shortChannelEn</ASKL1plt:name>
+          <ASKL1plt:description>shortChannelEn</ASKL1plt:description>
+          <ASKL1plt:value>7</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>bfLf</ASKL1plt:name>
+          <ASKL1plt:description>bfLf</ASKL1plt:description>
+          <ASKL1plt:value>8</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>bfHf</ASKL1plt:name>
+          <ASKL1plt:description>bfHf</ASKL1plt:description>
+          <ASKL1plt:value>9</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>minLf</ASKL1plt:name>
+          <ASKL1plt:description>minLf</ASKL1plt:description>
+          <ASKL1plt:value>10</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>maxLf</ASKL1plt:name>
+          <ASKL1plt:description>maxLf</ASKL1plt:description>
+          <ASKL1plt:value>11</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>minHf</ASKL1plt:name>
+          <ASKL1plt:description>minHf</ASKL1plt:description>
+          <ASKL1plt:value>12</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>maxHf</ASKL1plt:name>
+          <ASKL1plt:description>maxHf</ASKL1plt:description>
+          <ASKL1plt:value>13</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>minPre1</ASKL1plt:name>
+          <ASKL1plt:description>minPre1</ASKL1plt:description>
+          <ASKL1plt:value>14</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>maxPre1</ASKL1plt:name>
+          <ASKL1plt:description>maxPre1</ASKL1plt:description>
+          <ASKL1plt:value>15</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>minPre2</ASKL1plt:name>
+          <ASKL1plt:description>minPre2</ASKL1plt:description>
+          <ASKL1plt:value>16</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>maxPre2</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>17</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>minPost</ASKL1plt:name>
+          <ASKL1plt:description>minPost</ASKL1plt:description>
+          <ASKL1plt:value>18</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>maxPost</ASKL1plt:name>
+          <ASKL1plt:description>maxPost</ASKL1plt:description>
+          <ASKL1plt:value>19</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>squelch</ASKL1plt:name>
+          <ASKL1plt:description>squelch</ASKL1plt:description>
+          <ASKL1plt:value>20</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>termination</ASKL1plt:name>
+          <ASKL1plt:description>termination</ASKL1plt:description>
+          <ASKL1plt:value>27</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>coldEnvelope</ASKL1plt:name>
+          <ASKL1plt:description>coldEnvelope</ASKL1plt:description>
+          <ASKL1plt:value>35</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>hotEnvelope</ASKL1plt:name>
+          <ASKL1plt:description>hotEnvelope</ASKL1plt:description>
+          <ASKL1plt:value>36</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>dcGain</ASKL1plt:name>
+          <ASKL1plt:description>dcGain</ASKL1plt:description>
+          <ASKL1plt:value>37</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>bandWidth</ASKL1plt:name>
+          <ASKL1plt:description>bandWidth</ASKL1plt:description>
+          <ASKL1plt:value>38</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>dfe</ASKL1plt:name>
+          <ASKL1plt:description>dfe</ASKL1plt:description>
+          <ASKL1plt:value>39</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>ffeR</ASKL1plt:name>
+          <ASKL1plt:description>ffeR</ASKL1plt:description>
+          <ASKL1plt:value>40</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>ffeC</ASKL1plt:name>
+          <ASKL1plt:description>ffeC</ASKL1plt:description>
+          <ASKL1plt:value>41</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>sampler</ASKL1plt:name>
+          <ASKL1plt:description>sampler</ASKL1plt:description>
+          <ASKL1plt:value>42</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>align90</ASKL1plt:name>
+          <ASKL1plt:description>align90</ASKL1plt:description>
+          <ASKL1plt:value>43</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>ffeS</ASKL1plt:name>
+          <ASKL1plt:description>ffeS</ASKL1plt:description>
+          <ASKL1plt:value>44</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>resSel</ASKL1plt:name>
+          <ASKL1plt:description>resSel</ASKL1plt:description>
+          <ASKL1plt:value>45</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>resShift</ASKL1plt:name>
+          <ASKL1plt:description>resShift</ASKL1plt:description>
+          <ASKL1plt:value>46</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>capSel</ASKL1plt:name>
+          <ASKL1plt:description>capSel</ASKL1plt:description>
+          <ASKL1plt:value>47</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>ffeSettingForce</ASKL1plt:name>
+          <ASKL1plt:description>ffeSettingForce</ASKL1plt:description>
+          <ASKL1plt:value>48</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>adaptedResSel</ASKL1plt:name>
+          <ASKL1plt:description>adaptedResSel</ASKL1plt:description>
+          <ASKL1plt:value>49</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>adaptedCapSel</ASKL1plt:name>
+          <ASKL1plt:description>adaptedCapSel</ASKL1plt:description>
+          <ASKL1plt:value>50</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>selmufi</ASKL1plt:name>
+          <ASKL1plt:description>selmufi</ASKL1plt:description>
+          <ASKL1plt:value>51</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>selmuff</ASKL1plt:name>
+          <ASKL1plt:description>selmuff</ASKL1plt:description>
+          <ASKL1plt:value>52</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>selmupi</ASKL1plt:name>
+          <ASKL1plt:description>selmupi</ASKL1plt:description>
+          <ASKL1plt:value>53</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>selmupf</ASKL1plt:name>
+          <ASKL1plt:description>selmupf</ASKL1plt:description>
+          <ASKL1plt:value>54</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>slewRateCtrl0</ASKL1plt:name>
+          <ASKL1plt:description>slewRateCtrl0</ASKL1plt:description>
+          <ASKL1plt:value>55</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>slewRateCtrl1</ASKL1plt:name>
+          <ASKL1plt:description>slewRateCtrl1</ASKL1plt:description>
+          <ASKL1plt:value>56</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>EO</ASKL1plt:name>
+          <ASKL1plt:description>EO</ASKL1plt:description>
+          <ASKL1plt:value>57</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>dataRate</ASKL1plt:name>
+          <ASKL1plt:description>dataRate</ASKL1plt:description>
+          <ASKL1plt:value>58</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>res1Sel</ASKL1plt:name>
+          <ASKL1plt:description>res1Sel</ASKL1plt:description>
+          <ASKL1plt:value>59</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>res2Sel</ASKL1plt:name>
+          <ASKL1plt:description>res2Sel</ASKL1plt:description>
+          <ASKL1plt:value>60</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>cap1Sel</ASKL1plt:name>
+          <ASKL1plt:description>cap1Sel</ASKL1plt:description>
+          <ASKL1plt:value>61</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>cap2Sel</ASKL1plt:name>
+          <ASKL1plt:description>cap2Sel</ASKL1plt:description>
+          <ASKL1plt:value>62</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>midpointLargeThresKLane</ASKL1plt:name>
+          <ASKL1plt:description>midpointLargeThresKLane</ASKL1plt:description>
+          <ASKL1plt:value>63</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>midpointSmallThresKLane</ASKL1plt:name>
+          <ASKL1plt:description>midpointSmallThresKLane</ASKL1plt:description>
+          <ASKL1plt:value>64</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>midpointLargeThresCLane</ASKL1plt:name>
+          <ASKL1plt:description>midpointLargeThresCLane</ASKL1plt:description>
+          <ASKL1plt:value>65</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>midpointSmallThresCLane</ASKL1plt:name>
+          <ASKL1plt:description>midpointSmallThresCLane</ASKL1plt:description>
+          <ASKL1plt:value>66</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>dfeResF0aHighThresInitLane</ASKL1plt:name>
+          <ASKL1plt:description>dfeResF0aHighThresInitLane</ASKL1plt:description>
+          <ASKL1plt:value>67</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>dfeResF0aHighThresEndLane</ASKL1plt:name>
+          <ASKL1plt:description>dfeResF0aHighThresEndLane</ASKL1plt:description>
+          <ASKL1plt:value>68</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>current1Sel</ASKL1plt:name>
+          <ASKL1plt:description>current1Sel</ASKL1plt:description>
+          <ASKL1plt:value>69</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rl1Sel</ASKL1plt:name>
+          <ASKL1plt:description>rl1Sel</ASKL1plt:description>
+          <ASKL1plt:value>70</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rl1Extra</ASKL1plt:name>
+          <ASKL1plt:description>rl1Extra</ASKL1plt:description>
+          <ASKL1plt:value>71</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>cl1Ctrl</ASKL1plt:name>
+          <ASKL1plt:description>cl1Ctrl</ASKL1plt:description>
+          <ASKL1plt:value>72</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>enMidFreq</ASKL1plt:name>
+          <ASKL1plt:description>enMidFreq</ASKL1plt:description>
+          <ASKL1plt:value>73</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>cs1Mid</ASKL1plt:name>
+          <ASKL1plt:description>cs1Mid</ASKL1plt:description>
+          <ASKL1plt:value>74</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rs1Mid</ASKL1plt:name>
+          <ASKL1plt:description>rs1Mid</ASKL1plt:description>
+          <ASKL1plt:value>75</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rfCtrl</ASKL1plt:name>
+          <ASKL1plt:description>rfCtrl</ASKL1plt:description>
+          <ASKL1plt:value>76</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rl1TiaSel</ASKL1plt:name>
+          <ASKL1plt:description>rl1TiaSel</ASKL1plt:description>
+          <ASKL1plt:value>77</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rl1TiaExtra</ASKL1plt:name>
+          <ASKL1plt:description>rl1TiaExtra</ASKL1plt:description>
+          <ASKL1plt:value>78</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>hpfRSel1st</ASKL1plt:name>
+          <ASKL1plt:description>hpfRSel1st</ASKL1plt:description>
+          <ASKL1plt:value>79</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>current1TiaSel</ASKL1plt:name>
+          <ASKL1plt:description>current1TiaSel</ASKL1plt:description>
+          <ASKL1plt:value>80</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rl2Tune</ASKL1plt:name>
+          <ASKL1plt:description>rl2Tune</ASKL1plt:description>
+          <ASKL1plt:value>81</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rl2Sel</ASKL1plt:name>
+          <ASKL1plt:description>rl2Sel</ASKL1plt:description>
+          <ASKL1plt:value>82</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rs2Sel</ASKL1plt:name>
+          <ASKL1plt:description>rs2Sel</ASKL1plt:description>
+          <ASKL1plt:value>83</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>current2Sel</ASKL1plt:name>
+          <ASKL1plt:description>current2Sel</ASKL1plt:description>
+          <ASKL1plt:value>84</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>hpfRsel2nd</ASKL1plt:name>
+          <ASKL1plt:description>hpfRsel2nd</ASKL1plt:description>
+          <ASKL1plt:value>85</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>BW</ASKL1plt:name>
+          <ASKL1plt:description>BW</ASKL1plt:description>
+          <ASKL1plt:value>86</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>dfeGAIN</ASKL1plt:name>
+          <ASKL1plt:description>dfeGAIN</ASKL1plt:description>
+          <ASKL1plt:value>87</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>dfeGAIN2</ASKL1plt:name>
+          <ASKL1plt:description>dfeGAIN2</ASKL1plt:description>
+          <ASKL1plt:value>88</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>pre1</ASKL1plt:name>
+          <ASKL1plt:description>pre1</ASKL1plt:description>
+          <ASKL1plt:value>89</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>pre2</ASKL1plt:name>
+          <ASKL1plt:description>pre2</ASKL1plt:description>
+          <ASKL1plt:value>90</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>post1</ASKL1plt:name>
+          <ASKL1plt:description>post1</ASKL1plt:description>
+          <ASKL1plt:value>91</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>boolean-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Boolean 32 bits , due to bing endian</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>false</ASKL1plt:name>
+          <ASKL1plt:description>False</ASKL1plt:description>
+          <ASKL1plt:value>0</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>true</ASKL1plt:name>
+          <ASKL1plt:description>True</ASKL1plt:description>
+          <ASKL1plt:value>1</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>serdes-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Serdes Type</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>NA</ASKL1plt:name>
+          <ASKL1plt:description>No serdes</ASKL1plt:description>
+          <ASKL1plt:value>0</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>AVAGO</ASKL1plt:name>
+          <ASKL1plt:description>AVAGO</ASKL1plt:description>
+          <ASKL1plt:value>1</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>COMPHY</ASKL1plt:name>
+          <ASKL1plt:description>COMPHY</ASKL1plt:description>
+          <ASKL1plt:value>2</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>COMPHY_C12G</ASKL1plt:name>
+          <ASKL1plt:description>COMPHY_C12G</ASKL1plt:description>
+          <ASKL1plt:value>3</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>COMPHY_C28G</ASKL1plt:name>
+          <ASKL1plt:description>COMPHY_C28G</ASKL1plt:description>
+          <ASKL1plt:value>4</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>COMPHY_C112G</ASKL1plt:name>
+          <ASKL1plt:description>COMPHY_C112G</ASKL1plt:description>
+          <ASKL1plt:value>5</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>uint8-type</ASKL1plt:name>
+        <ASKL1plt:type>uint32</ASKL1plt:type>
+        <ASKL1plt:description>Uint8 32 bits , due to bing endian</ASKL1plt:description>
+        <ASKL1plt:min>0</ASKL1plt:min>
+        <ASKL1plt:max>255</ASKL1plt:max>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>serdes-termination-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>RX termination mode</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>GND</ASKL1plt:name>
+          <ASKL1plt:description>Enabled</ASKL1plt:description>
+          <ASKL1plt:value>0</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>VDD</ASKL1plt:name>
+          <ASKL1plt:description>Disabled</ASKL1plt:description>
+          <ASKL1plt:value>1</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>FLOATING</ASKL1plt:name>
+          <ASKL1plt:description>RS FEC enabled</ASKL1plt:description>
+          <ASKL1plt:value>2</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>port-interconnect-profile-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Enumerator of interconnect profile.</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>profile_default</ASKL1plt:name>
+          <ASKL1plt:description>Profile Default</ASKL1plt:description>
+          <ASKL1plt:value>0</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>profile_1</ASKL1plt:name>
+          <ASKL1plt:description>Profile 1</ASKL1plt:description>
+          <ASKL1plt:value>1</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>profile_2</ASKL1plt:name>
+          <ASKL1plt:description>Profile 2</ASKL1plt:description>
+          <ASKL1plt:value>2</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+    </ASKL1plt:typedefs>
+    <ASKL1plt:IfModeName>
+      <ASKL1plt:ifModeNameList>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:ifModeName>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">CR4</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">100G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">KR4</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">100G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">SR_LR4</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">100G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">CR4</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">100G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">KR4</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">100G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+      </ASKL1plt:ifModeNameList>
+      <ASKL1plt:ifModeNameList>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">10GR1Fix</ASKL1plt:ifModeName>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">KR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">10G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">disabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+      </ASKL1plt:ifModeNameList>
+      <ASKL1plt:ifModeNameList>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">CR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">25G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">KR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">25G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">KR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">10G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">SR_LR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">25G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">SR_LR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">10G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">CR</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">25G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">KR</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">25G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">KR</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">10G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+      </ASKL1plt:ifModeNameList>
+    </ASKL1plt:IfModeName>
+    <ASKL1plt:Port>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">0</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">1</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">2</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">3</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">4</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">5</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">6</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">7</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">8</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">9</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">10</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">11</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">12</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">13</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">14</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">15</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">16</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">17</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">18</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">19</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">20</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">21</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">22</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">23</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">24</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">25</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">26</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">27</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">28</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">29</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">30</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">31</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">32</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">33</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">34</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">35</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">36</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">37</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">38</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">39</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">40</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">41</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">42</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">43</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">44</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">45</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">46</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">47</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">48</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">49</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">50</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">51</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">52</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">53</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">54</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">55</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">56</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">10GR1Fix</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+    </ASKL1plt:Port>
+  </ASKL1plt:ASK-L1>
+</data>
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/db98cx8580_32cd/ASK-PP-F12_8T-48x25G-8x100G.md5 b/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/db98cx8580_32cd/ASK-PP-F12_8T-48x25G-8x100G.md5
new file mode 100644
index 000000000..3c2807997
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/db98cx8580_32cd/ASK-PP-F12_8T-48x25G-8x100G.md5
@@ -0,0 +1 @@
+1ed6046358d99524cdf9cd9e136a0efa
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/db98cx8580_32cd/ASK-PP-F12_8T-48x25G-8x100G.xml b/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/db98cx8580_32cd/ASK-PP-F12_8T-48x25G-8x100G.xml
new file mode 100644
index 000000000..e3239589f
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/db98cx8580_32cd/ASK-PP-F12_8T-48x25G-8x100G.xml
@@ -0,0 +1,1180 @@
+<?xml version="1.0" encoding="utf-8"?>
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-02-19-1.06" profile="Askpp" sid="34f1c14a-b581-422d-bd10-426dfac013dd">
+  <askppplt:ASK-PP xmlns:askppplt="urn:marvell:askpp:yang">
+    <askppplt:typedefs>
+      <askppplt:typedef>
+        <askppplt:name>std-string</askppplt:name>
+        <askppplt:type>string</askppplt:type>
+        <askppplt:description>standard string.</askppplt:description>
+        <askppplt:min>1</askppplt:min>
+        <askppplt:max>100</askppplt:max>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>queue-id-type</askppplt:name>
+        <askppplt:type>uint32</askppplt:type>
+        <askppplt:description>Queue id</askppplt:description>
+        <askppplt:min>0</askppplt:min>
+        <askppplt:max>7</askppplt:max>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>precent-type</askppplt:name>
+        <askppplt:type>uint32</askppplt:type>
+        <askppplt:description>Precent</askppplt:description>
+        <askppplt:min>0</askppplt:min>
+        <askppplt:max>100</askppplt:max>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>phaThreadId-type</askppplt:name>
+        <askppplt:type>uint32</askppplt:type>
+        <askppplt:description>Thread id</askppplt:description>
+        <askppplt:min>1</askppplt:min>
+        <askppplt:max>255</askppplt:max>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>routing-mode-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies routing mode.</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>POLICY_BASED_ROUTING_ONLY</askppplt:name>
+          <askppplt:description>PBR only</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>TCAM_ROUTER_BASED</askppplt:name>
+          <askppplt:description>Router engine or PBR</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>shared-table-mode-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies table sharing modes for L3 (LPM), L2 (FDB), EM (Exact Match)</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>MID_L3_MID_L2_NO_EM</askppplt:name>
+          <askppplt:description>MID_L3_MID_L2_NO_EM</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>MID_L3_MID_L2_MIN_EM</askppplt:name>
+          <askppplt:description>MID_L3_MID_L2_MIN_EM</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>LOW_MAX_L3_MID_LOW_L2_NO_EM</askppplt:name>
+          <askppplt:description>LOW_MAX_L3_MID_LOW_L2_NO_EM</askppplt:description>
+          <askppplt:value>2</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>MAX_L3_MIN_L2_NO_EM</askppplt:name>
+          <askppplt:description>MAX_L3_MIN_L2_NO_EM</askppplt:description>
+          <askppplt:value>3</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>pha-firmware-image-id-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies supported Pha image id</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>DEFAULT</askppplt:name>
+          <askppplt:description>Default PHA firmware image ID</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>01</askppplt:name>
+          <askppplt:description>01 firmware image ID</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>02</askppplt:name>
+          <askppplt:description>02 PHA firmware image ID</askppplt:description>
+          <askppplt:value>2</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>pha-firmware-thread-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies supported Pha thread type</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>IOAM_INGRESS_SWITCH_IPV4</askppplt:name>
+          <askppplt:description>IOAM_INGRESS_SWITCH_IPV4</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>IOAM_INGRESS_SWITCH_IPV6</askppplt:name>
+          <askppplt:description>IOAM_INGRESS_SWITCH_IPV6</askppplt:description>
+          <askppplt:value>2</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>IOAM_TRANSIT_SWITCH_IPV4</askppplt:name>
+          <askppplt:description>IOAM_TRANSIT_SWITCH_IPV4</askppplt:description>
+          <askppplt:value>3</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>IOAM_TRANSIT_SWITCH_IPV6</askppplt:name>
+          <askppplt:description>IOAM_TRANSIT_SWITCH_IPV6</askppplt:description>
+          <askppplt:value>4</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>INT_IOAM_MIRRORING</askppplt:name>
+          <askppplt:description>INT_IOAM_MIRRORING</askppplt:description>
+          <askppplt:value>5</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>INT_IOAM_EGRESS_SWITCH</askppplt:name>
+          <askppplt:description>INT_IOAM_EGRESS_SWITCH</askppplt:description>
+          <askppplt:value>6</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>MPLS_SR_NO_EL</askppplt:name>
+          <askppplt:description>MPLS_SR_NO_EL</askppplt:description>
+          <askppplt:value>7</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>MPLS_SR_ONE_EL</askppplt:name>
+          <askppplt:description>MPLS_SR_ONE_EL</askppplt:description>
+          <askppplt:value>8</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>MPLS_SR_TWO_EL</askppplt:name>
+          <askppplt:description>MPLS_SR_TWO_EL</askppplt:description>
+          <askppplt:value>9</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>MPLS_SR_THREE_EL</askppplt:name>
+          <askppplt:description>MPLS_SR_THREE_EL</askppplt:description>
+          <askppplt:value>10</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>UNIFIED_SR</askppplt:name>
+          <askppplt:description>UNIFIED_SR</askppplt:description>
+          <askppplt:value>11</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>CLASSIFIER_NSH_OVER_ETHERNET</askppplt:name>
+          <askppplt:description>CLASSIFIER_NSH_OVER_ETHERNET</askppplt:description>
+          <askppplt:value>12</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>CLASSIFIER_NSH_OVER_VXLAN_GPE</askppplt:name>
+          <askppplt:description>CLASSIFIER_NSH_OVER_VXLAN_GPE</askppplt:description>
+          <askppplt:value>13</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SFF_NSH_VXLAN_GPE_TO_ETHERNET</askppplt:name>
+          <askppplt:description>SFF_NSH_VXLAN_GPE_TO_ETHERNET</askppplt:description>
+          <askppplt:value>14</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SFF_NSH_ETHERNET_TO_VXLAN_GPE</askppplt:name>
+          <askppplt:description>SFF_NSH_ETHERNET_TO_VXLAN_GPE</askppplt:description>
+          <askppplt:value>15</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>IOAM_EGRESS_SWITCH_IPV6</askppplt:name>
+          <askppplt:description>IOAM_EGRESS_SWITCH_IPV6</askppplt:description>
+          <askppplt:value>16</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_END_NODE</askppplt:name>
+          <askppplt:description>SRV6_END_NODE</askppplt:description>
+          <askppplt:value>17</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_PENULTIMATE_END_NODE</askppplt:name>
+          <askppplt:description>SRV6_PENULTIMATE_END_NODE</askppplt:description>
+          <askppplt:value>18</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_SRC_NODE_1_SEGMENT</askppplt:name>
+          <askppplt:description>SRV6_SRC_NODE_1_SEGMENT</askppplt:description>
+          <askppplt:value>19</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_SRC_NODE_FIRST_PASS_2_3_SEGMENTS</askppplt:name>
+          <askppplt:description>SRV6_SRC_NODE_FIRST_PASS_2_3_SEGMENTS</askppplt:description>
+          <askppplt:value>20</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_SRC_NODE_SECOND_PASS_3_SEGMENTS</askppplt:name>
+          <askppplt:description>SRV6_SRC_NODE_SECOND_PASS_3_SEGMENTS</askppplt:description>
+          <askppplt:value>21</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_SRC_NODE_SECOND_PASS_2_SEGMENTS</askppplt:name>
+          <askppplt:description>SRV6_SRC_NODE_SECOND_PASS_2_SEGMENTS</askppplt:description>
+          <askppplt:value>22</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_NETWORK_ADD_MSB</askppplt:name>
+          <askppplt:description>SGT_NETWORK_ADD_MSB</askppplt:description>
+          <askppplt:value>23</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_NETWORK_FIX</askppplt:name>
+          <askppplt:description>SGT_NETWORK_FIX</askppplt:description>
+          <askppplt:value>24</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_NETWORK_REMOVE</askppplt:name>
+          <askppplt:description>SGT_NETWORK_REMOVE</askppplt:description>
+          <askppplt:value>25</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_EDSA_FIX</askppplt:name>
+          <askppplt:description>SGT_EDSA_FIX</askppplt:description>
+          <askppplt:value>26</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_EDSA_REMOVE</askppplt:name>
+          <askppplt:description>SGT_EDSA_REMOVE</askppplt:description>
+          <askppplt:value>27</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_GBP_FIX_IPV4</askppplt:name>
+          <askppplt:description>SGT_GBP_FIX_IPV4</askppplt:description>
+          <askppplt:value>28</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_GBP_FIX_IPV6</askppplt:name>
+          <askppplt:description>SGT_GBP_FIX_IPV6</askppplt:description>
+          <askppplt:value>29</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_GBP_REMOVE_IPV4</askppplt:name>
+          <askppplt:description>SGT_GBP_REMOVE_IPV4</askppplt:description>
+          <askppplt:value>30</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_GBP_REMOVE_IPV6</askppplt:name>
+          <askppplt:description>SGT_GBP_REMOVE_IPV6</askppplt:description>
+          <askppplt:value>31</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>PTP_PHY_1_STEP</askppplt:name>
+          <askppplt:description>PTP_PHY_1_STEP</askppplt:description>
+          <askppplt:value>32</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>EGRESS_MIRRORING_METADATA</askppplt:name>
+          <askppplt:description>EGRESS_MIRRORING_METADATA</askppplt:description>
+          <askppplt:value>33</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>CC_ERSPAN_TYPE_II_TRG_DEV_LC_IPV4</askppplt:name>
+          <askppplt:description>CC_ERSPAN_TYPE_II_TRG_DEV_LC_IPV4</askppplt:description>
+          <askppplt:value>34</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>CC_ERSPAN_TYPE_II_TRG_DEV_LC_IPV6</askppplt:name>
+          <askppplt:description>CC_ERSPAN_TYPE_II_TRG_DEV_LC_IPV6</askppplt:description>
+          <askppplt:value>35</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>CC_ERSPAN_TYPE_II_TRG_DEV_DIRECT_IPV4</askppplt:name>
+          <askppplt:description>CC_ERSPAN_TYPE_II_TRG_DEV_DIRECT_IPV4</askppplt:description>
+          <askppplt:value>36</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>CC_ERSPAN_TYPE_II_TRG_DEV_DIRECT_IPV6</askppplt:name>
+          <askppplt:description>CC_ERSPAN_TYPE_II_TRG_DEV_DIRECT_IPV6</askppplt:description>
+          <askppplt:value>37</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>CC_ERSPAN_TYPE_II_SRC_DEV</askppplt:name>
+          <askppplt:description>CC_ERSPAN_TYPE_II_SRC_DEV</askppplt:description>
+          <askppplt:value>38</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>VXLAN_GBP_SOURCE_GROUP_POLICY_ID</askppplt:name>
+          <askppplt:description>VXLAN_GBP_SOURCE_GROUP_POLICY_ID</askppplt:description>
+          <askppplt:value>39</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_BEST_EFFORT</askppplt:name>
+          <askppplt:description>SRV6_BEST_EFFORT</askppplt:description>
+          <askppplt:value>40</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_SRC_NODE_1_CONTAINER</askppplt:name>
+          <askppplt:description>SRV6_SRC_NODE_1_CONTAINER</askppplt:description>
+          <askppplt:value>41</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_SRC_NODE_FIRST_PASS_2_3_CONTAINERS</askppplt:name>
+          <askppplt:description>SRV6_SRC_NODE_FIRST_PASS_2_3_CONTAINERS</askppplt:description>
+          <askppplt:value>42</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_SRC_NODE_SECOND_PASS_2_CONTAINERS</askppplt:name>
+          <askppplt:description>SRV6_SRC_NODE_SECOND_PASS_2_CONTAINERS</askppplt:description>
+          <askppplt:value>43</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_SRC_NODE_SECOND_PASS_3_CONTAINERS</askppplt:name>
+          <askppplt:description>SRV6_SRC_NODE_SECOND_PASS_3_CONTAINERS</askppplt:description>
+          <askppplt:value>44</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_END_NODE_COC32_GSID</askppplt:name>
+          <askppplt:description>SRV6_END_NODE_COC32_GSID</askppplt:description>
+          <askppplt:value>45</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>IPV4_TTL_INCREMENT</askppplt:name>
+          <askppplt:description>IPV4_TTL_INCREMENT</askppplt:description>
+          <askppplt:value>46</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>IPV6_HOP_LIMIT_INCREMENT</askppplt:name>
+          <askppplt:description>IPV6_HOP_LIMIT_INCREMENT</askppplt:description>
+          <askppplt:value>47</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>CLEAR_OUTGOING_MTAG_COMMAND</askppplt:name>
+          <askppplt:description>CLEAR_OUTGOING_MTAG_COMMAND</askppplt:description>
+          <askppplt:value>48</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SFLOW_V5_IPV4</askppplt:name>
+          <askppplt:description>SFLOW_V5_IPV4</askppplt:description>
+          <askppplt:value>49</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SFLOW_V5_IPV6</askppplt:name>
+          <askppplt:description>SFLOW_V5_IPV6</askppplt:description>
+          <askppplt:value>50</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SLS</askppplt:name>
+          <askppplt:description>SLS</askppplt:description>
+          <askppplt:value>51</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>trunk-member-mode-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies supported Pha image id</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>NATIVE</askppplt:name>
+          <askppplt:description>NATIVE
+*  the trunk members are filled
+*  according to the order given by application.
+*  Regular trunk may hold max of 8 members.
+*  Cascade trunk may hold :
+*  max of 64 members</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>FLEX</askppplt:name>
+          <askppplt:description>FLEX
+*  A mode to allows flexibility for
+*  each Regular trunk to state it's max number of members (before starting to add members).
+*  (this mode not effect 'cascade trunk' members)
+*  Regular trunk may hold : max of 4K members. (each trunk set it's own limit)
+*  Cascade trunk may hold : max of 64 members.</askppplt:description>
+          <askppplt:value>2</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>number-physical-port-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>AC3X/AC5X 128, falcon 64, 128, 256, 512, 1024</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>no-ports</askppplt:name>
+          <askppplt:description>no-ports</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>64-ports</askppplt:name>
+          <askppplt:description>64-ports</askppplt:description>
+          <askppplt:value>64</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>128-ports</askppplt:name>
+          <askppplt:description>128-ports</askppplt:description>
+          <askppplt:value>128</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>256-ports</askppplt:name>
+          <askppplt:description>256-ports</askppplt:description>
+          <askppplt:value>256</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>512-ports</askppplt:name>
+          <askppplt:description>512-ports</askppplt:description>
+          <askppplt:value>512</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>1024-ports</askppplt:name>
+          <askppplt:description>1024-ports</askppplt:description>
+          <askppplt:value>1024</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>serdes-ref-clock-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies serdes refernce clock.</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>external_25_single_ended</askppplt:name>
+          <askppplt:description>EXTERNAL_25_SINGLE_ENDED</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>external_125_single_ended</askppplt:name>
+          <askppplt:description>EXTERNAL_125_SINGLE_ENDED</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>external_125_diff</askppplt:name>
+          <askppplt:description>EXTERNAL_125_DIFF</askppplt:description>
+          <askppplt:value>2</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>external_156_25_single_ended</askppplt:name>
+          <askppplt:description>EXTERNAL_156_25_SINGLE_ENDED</askppplt:description>
+          <askppplt:value>3</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>external_156_25_diff</askppplt:name>
+          <askppplt:description>EXTERNAL_156_25_DIFF</askppplt:description>
+          <askppplt:value>4</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>internal_125</askppplt:name>
+          <askppplt:description>INTERNAL_125</askppplt:description>
+          <askppplt:value>5</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>cpu-port-id-type</askppplt:name>
+        <askppplt:type>uint32</askppplt:type>
+        <askppplt:description>CPU port id</askppplt:description>
+        <askppplt:min>0</askppplt:min>
+        <askppplt:max>7</askppplt:max>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>rx-buffer-size-type</askppplt:name>
+        <askppplt:type>uint32</askppplt:type>
+        <askppplt:description>Rx Buffer size</askppplt:description>
+        <askppplt:min>64</askppplt:min>
+        <askppplt:max>10240</askppplt:max>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>tx-sdma-queue-mode-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies TX queue mode.</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>Normal</askppplt:name>
+          <askppplt:description>Application</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>Packet_Generator</askppplt:name>
+          <askppplt:description>Traffic generator</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>alloc-method-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies Buffers allocation method.</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>Dynamic_Alloc</askppplt:name>
+          <askppplt:description>Dynamic</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>Static_Alloc</askppplt:name>
+          <askppplt:description>Static</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>au_mesage_lenght-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies Buffers allocation method.</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>4_words</askppplt:name>
+          <askppplt:description>4 Words</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>8_words</askppplt:name>
+          <askppplt:description>8 Words</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>boolean-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Boolean 32 bits , due to bing endian</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>false</askppplt:name>
+          <askppplt:description>False</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>true</askppplt:name>
+          <askppplt:description>True</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>asic-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>ASIC Type</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>ASIC_AC3X</askppplt:name>
+          <askppplt:description>AC3X</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>ASIC_AC5X</askppplt:name>
+          <askppplt:description>AC5X</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>ASIC_Falcon</askppplt:name>
+          <askppplt:description>FALCON</askppplt:description>
+          <askppplt:value>2</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+    </askppplt:typedefs>
+    <askppplt:ASIC_Type askppplt:type="asic-type">ASIC_Falcon</askppplt:ASIC_Type>
+    <askppplt:PPInit>
+      <askppplt:PP-name askppplt:type="std-string">Falcon-12.8</askppplt:PP-name>
+      <askppplt:Phase1>
+        <askppplt:coreClock askppplt:type="uint32">4294967295</askppplt:coreClock>
+        <askppplt:serdesRefClock askppplt:type="serdes-ref-clock-type">external_25_single_ended</askppplt:serdesRefClock>
+        <askppplt:isrAddrCompletionRegionsBmp askppplt:type="uint32">2</askppplt:isrAddrCompletionRegionsBmp>
+        <askppplt:appAddrCompletionRegionsBmp askppplt:type="uint32">60</askppplt:appAddrCompletionRegionsBmp>
+        <askppplt:maxNumOfPhyPortsToUse askppplt:type="number-physical-port-type">64-ports</askppplt:maxNumOfPhyPortsToUse>
+        <askppplt:tcamParityCalcEnable askppplt:type="boolean-type">false</askppplt:tcamParityCalcEnable>
+        <askppplt:apEnable askppplt:type="boolean-type">true</askppplt:apEnable>
+        <askppplt:numOfDataIntegrityElements askppplt:type="uint32">0</askppplt:numOfDataIntegrityElements>
+      </askppplt:Phase1>
+      <askppplt:Phase2>
+        <askppplt:useMultiNetIfSdma askppplt:type="boolean-type">true</askppplt:useMultiNetIfSdma>
+        <askppplt:auqCfg>
+          <askppplt:auDescNum askppplt:type="uint32">4096</askppplt:auDescNum>
+        </askppplt:auqCfg>
+        <askppplt:fuqCfg>
+          <askppplt:fuDescNum askppplt:type="uint32">2048</askppplt:fuDescNum>
+        </askppplt:fuqCfg>
+        <askppplt:multiNetIfCfg>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">0</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">7</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">6</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">5</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">4</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">3</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">2</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">1</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">0</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">7</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">6</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">5</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">4</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">3</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">2</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">1</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">0</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">7</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">6</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">5</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">4</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">3</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">2</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">1</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">0</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">7</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">6</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">5</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">4</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">3</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">2</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">1</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">0</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">1</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">2</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">3</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">4</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">5</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">6</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">7</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">0</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">1</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">2</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">3</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">4</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">5</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">6</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">7</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">0</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">1</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">2</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">3</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">4</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">5</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">6</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">7</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">0</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">1</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">2</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">3</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">4</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">5</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">6</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Packet_Generator</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">256</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">256</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">144</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">7</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Packet_Generator</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">1</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">1</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">3032</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+        </askppplt:multiNetIfCfg>
+        <askppplt:internal>
+          <askppplt:fuqUseSeparate askppplt:type="boolean-type">false</askppplt:fuqUseSeparate>
+          <askppplt:useSecondaryAuq askppplt:type="boolean-type">false</askppplt:useSecondaryAuq>
+          <askppplt:noTraffic2CPU askppplt:type="boolean-type">false</askppplt:noTraffic2CPU>
+          <askppplt:netifSdmaPortGroupId askppplt:type="uint32">0</askppplt:netifSdmaPortGroupId>
+          <askppplt:auMessageLength askppplt:type="au_mesage_lenght-type">8_words</askppplt:auMessageLength>
+          <askppplt:useDoubleAuq askppplt:type="boolean-type">false</askppplt:useDoubleAuq>
+        </askppplt:internal>
+      </askppplt:Phase2>
+      <askppplt:LogicalInit>
+        <askppplt:routingMode askppplt:type="routing-mode-type">TCAM_ROUTER_BASED</askppplt:routingMode>
+        <askppplt:maxNumOfPbrEntries askppplt:type="uint32">0</askppplt:maxNumOfPbrEntries>
+        <askppplt:sharedTableMode askppplt:type="shared-table-mode-type">MID_L3_MID_L2_NO_EM</askppplt:sharedTableMode>
+        <askppplt:ingressDropEnable askppplt:type="boolean-type">false</askppplt:ingressDropEnable>
+      </askppplt:LogicalInit>
+      <askppplt:LibInit>
+        <askppplt:initBridge askppplt:type="boolean-type">true</askppplt:initBridge>
+        <askppplt:initMirror askppplt:type="boolean-type">true</askppplt:initMirror>
+        <askppplt:initNetIf askppplt:type="boolean-type">true</askppplt:initNetIf>
+        <askppplt:initPhy askppplt:type="boolean-type">true</askppplt:initPhy>
+        <askppplt:initPort askppplt:type="boolean-type">true</askppplt:initPort>
+        <askppplt:initTrunk askppplt:type="boolean-type">true</askppplt:initTrunk>
+        <askppplt:Trunk-params>
+          <askppplt:maxNumberOfTrunks askppplt:type="uint32">1023</askppplt:maxNumberOfTrunks>
+          <askppplt:trunkMembersMode askppplt:type="trunk-member-mode-type">FLEX</askppplt:trunkMembersMode>
+        </askppplt:Trunk-params>
+        <askppplt:initPcl askppplt:type="boolean-type">true</askppplt:initPcl>
+        <askppplt:initTcam askppplt:type="boolean-type">true</askppplt:initTcam>
+        <askppplt:initPolicer askppplt:type="boolean-type">true</askppplt:initPolicer>
+        <askppplt:initPha askppplt:type="boolean-type">true</askppplt:initPha>
+        <askppplt:Pha-params>
+          <askppplt:packetOrderChangeEnable askppplt:type="boolean-type">false</askppplt:packetOrderChangeEnable>
+          <askppplt:phaFwImageId askppplt:type="pha-firmware-image-id-type">02</askppplt:phaFwImageId>
+          <askppplt:phaFwImageIdVersion askppplt:type="uint32">0</askppplt:phaFwImageIdVersion>
+        </askppplt:Pha-params>
+      </askppplt:LibInit>
+    </askppplt:PPInit>
+  </askppplt:ASK-PP>
+</data>
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/db98cx8580_32cd/SAI-F12_8T-48x25G-8x100G.md5 b/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/db98cx8580_32cd/SAI-F12_8T-48x25G-8x100G.md5
new file mode 100644
index 000000000..c01137b77
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/db98cx8580_32cd/SAI-F12_8T-48x25G-8x100G.md5
@@ -0,0 +1 @@
+68eb84de73105b7ea023989d8e8ebd13
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/db98cx8580_32cd/SAI-F12_8T-48x25G-8x100G.xml b/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/db98cx8580_32cd/SAI-F12_8T-48x25G-8x100G.xml
new file mode 100644
index 000000000..7039fa0da
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/db98cx8580_32cd/SAI-F12_8T-48x25G-8x100G.xml
@@ -0,0 +1,518 @@
+<?xml version="1.0" encoding="utf-8"?>
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-02-19-1.06" profile="SAI" sid="c310bbb1-ffca-4c99-9bae-f7d4caff5941">
+  <SAIplt:SAI xmlns:SAIplt="urn:marvell:SAI:yang">
+    <SAIplt:typedefs>
+      <SAIplt:typedef>
+        <SAIplt:name>device-id-type</SAIplt:name>
+        <SAIplt:type>uint32</SAIplt:type>
+        <SAIplt:description>Device ID 0..1</SAIplt:description>
+        <SAIplt:min>0</SAIplt:min>
+        <SAIplt:max>1</SAIplt:max>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>port-id-type</SAIplt:name>
+        <SAIplt:type>uint32</SAIplt:type>
+        <SAIplt:description>Interface number</SAIplt:description>
+        <SAIplt:min>0</SAIplt:min>
+        <SAIplt:max>1023</SAIplt:max>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>logDest-type</SAIplt:name>
+        <SAIplt:type>enumeration</SAIplt:type>
+        <SAIplt:description>Logging Feature Options</SAIplt:description>
+        <SAIplt:enum>
+          <SAIplt:name>SAI_LOG_SYSLOG</SAIplt:name>
+          <SAIplt:description>SYSLOG  {Syslog service should be running to use this option}</SAIplt:description>
+          <SAIplt:value>0</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>SAI_LOG_CONSOLE</SAIplt:name>
+          <SAIplt:description>CONSOLE</SAIplt:description>
+          <SAIplt:value>1</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>SAI_LOG_FILE</SAIplt:name>
+          <SAIplt:description>FILE  {Warning !!! Use with caution. Can cause disk full issues}</SAIplt:description>
+          <SAIplt:value>2</SAIplt:value>
+        </SAIplt:enum>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>InDropCounter-type</SAIplt:name>
+        <SAIplt:type>enumeration</SAIplt:type>
+        <SAIplt:description>Router In Drop Reason Feature Options</SAIplt:description>
+        <SAIplt:enum>
+          <SAIplt:name>TTL_HOPLIMIT_EXCEEDED</SAIplt:name>
+          <SAIplt:description>Router In Drop Counters track TTL &amp; Hop Limit Exceeded Packets</SAIplt:description>
+          <SAIplt:value>0</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>ROUTE_BLACKHOLE</SAIplt:name>
+          <SAIplt:description>Router In Drop Counters track Route Black Hole Packets</SAIplt:description>
+          <SAIplt:value>1</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>IN_DROP_ANY</SAIplt:name>
+          <SAIplt:description>Router In Drop Counters track either TTL &amp; Hop Limit Exceeded or Route Black Hole Packets</SAIplt:description>
+          <SAIplt:value>2</SAIplt:value>
+        </SAIplt:enum>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>log-dest-file-path-type</SAIplt:name>
+        <SAIplt:type>string</SAIplt:type>
+        <SAIplt:description>A string with path to file for logging feature</SAIplt:description>
+        <SAIplt:min>2</SAIplt:min>
+        <SAIplt:max>30</SAIplt:max>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>acl-feature-name-type</SAIplt:name>
+        <SAIplt:type>enumeration</SAIplt:type>
+        <SAIplt:description/>
+        <SAIplt:enum>
+          <SAIplt:name>port-sFlow</SAIplt:name>
+          <SAIplt:description>SFlow over Port</SAIplt:description>
+          <SAIplt:value>0</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>port-counters-ipv4-ipv6</SAIplt:name>
+          <SAIplt:description>Port ipv4/ipv6 counters</SAIplt:description>
+          <SAIplt:value>1</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>control-acl</SAIplt:name>
+          <SAIplt:description>ACLs for control packet handling</SAIplt:description>
+          <SAIplt:value>2</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>debug-counter-acl</SAIplt:name>
+          <SAIplt:description>ACLs for Debug Counters</SAIplt:description>
+          <SAIplt:value>3</SAIplt:value>
+        </SAIplt:enum>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>ingress-acl-stage-type</SAIplt:name>
+        <SAIplt:type>enumeration</SAIplt:type>
+        <SAIplt:description/>
+        <SAIplt:enum>
+          <SAIplt:name>disabled</SAIplt:name>
+          <SAIplt:description>Feature not enabled</SAIplt:description>
+          <SAIplt:value>0</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>IPCL0</SAIplt:name>
+          <SAIplt:description>Stage IPCL0</SAIplt:description>
+          <SAIplt:value>1</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>IPCL1</SAIplt:name>
+          <SAIplt:description>Stage IPCL1</SAIplt:description>
+          <SAIplt:value>2</SAIplt:value>
+        </SAIplt:enum>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>egress-acl-stage-type</SAIplt:name>
+        <SAIplt:type>enumeration</SAIplt:type>
+        <SAIplt:description/>
+        <SAIplt:enum>
+          <SAIplt:name>disabled</SAIplt:name>
+          <SAIplt:description>Feature not enabled</SAIplt:description>
+          <SAIplt:value>0</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>EPCL0</SAIplt:name>
+          <SAIplt:description>Stage EPCL0</SAIplt:description>
+          <SAIplt:value>2</SAIplt:value>
+        </SAIplt:enum>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>feature-priority-type</SAIplt:name>
+        <SAIplt:type>uint32</SAIplt:type>
+        <SAIplt:description>Feature priority</SAIplt:description>
+        <SAIplt:min>2</SAIplt:min>
+        <SAIplt:max>15</SAIplt:max>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>hit-number-type</SAIplt:name>
+        <SAIplt:type>uint32</SAIplt:type>
+        <SAIplt:description>Hit/lookup number</SAIplt:description>
+        <SAIplt:min>0</SAIplt:min>
+        <SAIplt:max>3</SAIplt:max>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>asic-type</SAIplt:name>
+        <SAIplt:type>enumeration</SAIplt:type>
+        <SAIplt:description>ASIC Type</SAIplt:description>
+        <SAIplt:enum>
+          <SAIplt:name>ASIC_AC3X</SAIplt:name>
+          <SAIplt:description>AC3X</SAIplt:description>
+          <SAIplt:value>0</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>ASIC_AC5X</SAIplt:name>
+          <SAIplt:description>AC5X</SAIplt:description>
+          <SAIplt:value>1</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>ASIC_Falcon</SAIplt:name>
+          <SAIplt:description>FALCON</SAIplt:description>
+          <SAIplt:value>2</SAIplt:value>
+        </SAIplt:enum>
+      </SAIplt:typedef>
+    </SAIplt:typedefs>
+    <SAIplt:ASIC_Type SAIplt:type="asic-type">ASIC_Falcon</SAIplt:ASIC_Type>
+    <SAIplt:ASK-BOARD-Profile-Name SAIplt:type="string">ASK-Board-F12_8T-48x25G-8x100G.xml</SAIplt:ASK-BOARD-Profile-Name>
+    <SAIplt:Ports>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">0</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">47</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">1</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">46</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">2</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">45</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">3</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">44</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">4</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">43</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">5</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">42</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">6</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">41</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">7</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">40</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">8</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">39</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">9</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">38</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">10</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">37</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">11</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">36</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">12</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">35</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">13</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">34</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">14</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">33</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">15</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">32</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">16</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">31</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">17</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">30</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">18</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">29</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">19</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">28</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">20</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">27</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">21</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">26</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">22</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">25</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">23</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">24</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">24</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">23</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">25</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">22</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">26</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">21</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">27</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">20</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">28</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">19</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">29</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">18</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">30</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">17</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">31</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">16</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">32</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">15</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">33</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">14</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">34</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">13</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">35</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">12</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">36</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">11</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">37</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">10</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">38</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">9</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">39</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">8</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">40</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">7</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">41</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">6</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">42</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">5</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">43</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">4</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">44</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">3</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">45</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">2</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">46</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">1</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">47</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">0</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">48</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">55</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">52</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">54</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">56</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">53</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">60</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">52</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">64</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">51</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">68</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">50</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">72</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">49</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">76</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">48</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">80</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">56</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+    </SAIplt:Ports>
+    <SAIplt:scalingFalcon>
+      <SAIplt:max_lag_members SAIplt:type="uint32">8</SAIplt:max_lag_members>
+      <SAIplt:max_route_ipv4 SAIplt:type="uint32">0</SAIplt:max_route_ipv4>
+      <SAIplt:max_route_ipv6 SAIplt:type="uint32">0</SAIplt:max_route_ipv6>
+      <SAIplt:max_Nh_Ecmp_Mbr_Per_Grp SAIplt:type="uint32">64</SAIplt:max_Nh_Ecmp_Mbr_Per_Grp>
+      <SAIplt:max_ipv4_tunnel SAIplt:type="uint32">8</SAIplt:max_ipv4_tunnel>
+      <SAIplt:max_ipv6_tunnel SAIplt:type="uint32">8</SAIplt:max_ipv6_tunnel>
+      <SAIplt:max_tti SAIplt:type="uint32">1024</SAIplt:max_tti>
+      <SAIplt:wred_size SAIplt:type="uint32">0</SAIplt:wred_size>
+      <SAIplt:max_nat SAIplt:type="uint32">0</SAIplt:max_nat>
+    </SAIplt:scalingFalcon>
+    <SAIplt:Counters>
+      <SAIplt:cnc-base-list>
+        <SAIplt:counter-base SAIplt:type="uint32">0</SAIplt:counter-base>
+      </SAIplt:cnc-base-list>
+    </SAIplt:Counters>
+    <SAIplt:Logging>
+      <SAIplt:log_dest SAIplt:type="logDest-type">SAI_LOG_SYSLOG</SAIplt:log_dest>
+    </SAIplt:Logging>
+    <SAIplt:Features-using-acl>
+      <SAIplt:feature SAIplt:type="acl-feature-name-type">control-acl</SAIplt:feature>
+      <SAIplt:feature-priority SAIplt:type="feature-priority-type">3</SAIplt:feature-priority>
+      <SAIplt:Ingress>
+        <SAIplt:ingress-stage SAIplt:type="ingress-acl-stage-type">IPCL0</SAIplt:ingress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">1</SAIplt:hit-number>
+      </SAIplt:Ingress>
+      <SAIplt:Egress>
+        <SAIplt:egress-stage SAIplt:type="egress-acl-stage-type">EPCL0</SAIplt:egress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">0</SAIplt:hit-number>
+      </SAIplt:Egress>
+    </SAIplt:Features-using-acl>
+    <SAIplt:Features-using-acl>
+      <SAIplt:feature SAIplt:type="acl-feature-name-type">port-sFlow</SAIplt:feature>
+      <SAIplt:feature-priority SAIplt:type="feature-priority-type">4</SAIplt:feature-priority>
+      <SAIplt:Ingress>
+        <SAIplt:ingress-stage SAIplt:type="ingress-acl-stage-type">IPCL0</SAIplt:ingress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">0</SAIplt:hit-number>
+      </SAIplt:Ingress>
+      <SAIplt:Egress>
+        <SAIplt:egress-stage SAIplt:type="egress-acl-stage-type">EPCL0</SAIplt:egress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">0</SAIplt:hit-number>
+      </SAIplt:Egress>
+    </SAIplt:Features-using-acl>
+    <SAIplt:Features-using-acl>
+      <SAIplt:feature SAIplt:type="acl-feature-name-type">port-counters-ipv4-ipv6</SAIplt:feature>
+      <SAIplt:feature-priority SAIplt:type="feature-priority-type">5</SAIplt:feature-priority>
+      <SAIplt:Ingress>
+        <SAIplt:ingress-stage SAIplt:type="ingress-acl-stage-type">IPCL0</SAIplt:ingress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">3</SAIplt:hit-number>
+      </SAIplt:Ingress>
+      <SAIplt:Egress>
+        <SAIplt:egress-stage SAIplt:type="egress-acl-stage-type">EPCL0</SAIplt:egress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">0</SAIplt:hit-number>
+      </SAIplt:Egress>
+    </SAIplt:Features-using-acl>
+    <SAIplt:Features-using-acl>
+      <SAIplt:feature SAIplt:type="acl-feature-name-type">debug-counter-acl</SAIplt:feature>
+      <SAIplt:feature-priority SAIplt:type="feature-priority-type">2</SAIplt:feature-priority>
+      <SAIplt:Ingress>
+        <SAIplt:ingress-stage SAIplt:type="ingress-acl-stage-type">IPCL0</SAIplt:ingress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">1</SAIplt:hit-number>
+      </SAIplt:Ingress>
+      <SAIplt:Egress>
+        <SAIplt:egress-stage SAIplt:type="egress-acl-stage-type">EPCL0</SAIplt:egress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">0</SAIplt:hit-number>
+      </SAIplt:Egress>
+    </SAIplt:Features-using-acl>
+  </SAIplt:SAI>
+</data>
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/db98cx8580_32cd/buffers_config.j2 b/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/db98cx8580_32cd/buffers_config.j2
index 6ad65b4f7..a5212d979 100644
--- a/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/db98cx8580_32cd/buffers_config.j2
+++ b/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/db98cx8580_32cd/buffers_config.j2
@@ -9,9 +9,9 @@ def
 {# Determine device topology and filename postfix #}
 {%- if DEVICE_METADATA is defined %}
 {%-     set switch_role = DEVICE_METADATA['localhost']['type'] %}
-{%-     if 'torrouter' in switch_role.lower() %}
+{%-     if switch_role.lower() == 'torrouter' %}
 {%-         set filename_postfix = 't0' %}
-{%-     elif 'leafrouter' in switch_role.lower() %}
+{%-     elif switch_role.lower() == 'leafrouter' %}
 {%-         set filename_postfix = 't1' %}
 {%-     else %}
 {%-         set filename_postfix = set_default_topology() %}
@@ -62,7 +62,7 @@ def
     {%- if cable_len -%}
         {{ cable_len.0 }}
     {%- else %}
-        {%- if 'torrouter' in switch_role.lower() %}
+        {%- if switch_role.lower() == 'torrouter' %}
             {%- for local_port in VLAN_MEMBER %}
                 {%- if local_port[1] == port_name %}
                     {%- set roles3 = switch_role + '_' + 'server' %}
@@ -133,7 +133,7 @@ def
     "BUFFER_PG": {
 {% for port in PORT_ACTIVE %}
         "{{ port }}|0": {
-            "profile" : "ingress_lossy_profile"
+            "profile" : "[BUFFER_PROFILE|ingress_lossy_profile]"
         }{% if not loop.last %},{% endif %}
 
 {% endfor %}
@@ -146,17 +146,17 @@ def
     "BUFFER_QUEUE": {
 {% for port in PORT_ACTIVE %}
         "{{ port }}|3-4": {
-            "profile" : "egress_lossless_profile"
+            "profile" : "[BUFFER_PROFILE|egress_lossless_profile]"
         },
 {% endfor %}
 {% for port in PORT_ACTIVE %}
         "{{ port }}|0-2": {
-            "profile" : "egress_lossy_profile"
+            "profile" : "[BUFFER_PROFILE|egress_lossy_profile]"
         },
 {% endfor %}
 {% for port in PORT_ACTIVE %}
         "{{ port }}|5-6": {
-            "profile" : "egress_lossy_profile"
+            "profile" : "[BUFFER_PROFILE|egress_lossy_profile]"
         }{% if not loop.last %},{% endif %}
 
 {% endfor %}
diff --git a/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/db98cx8580_32cd/port_config.ini b/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/db98cx8580_32cd/port_config.ini
index 62dd91ba8..a1ee6d9bb 100644
--- a/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/db98cx8580_32cd/port_config.ini
+++ b/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/db98cx8580_32cd/port_config.ini
@@ -1,34 +1,58 @@
-#  name      	        lanes                                speed     alias
-Ethernet0		0,1,2,3,4,5,6,7                      400000    four00GigE0
-Ethernet8		8,9,10,11,12,13,14,15                400000    four00GigE8
-Ethernet16		16,17,18,19,20,21,22,23              400000    four00GigE16
-Ethernet24		24,25,26,27,28,29,30,31              400000    four00GigE24
-Ethernet32		32,33,34,35,36,37,38,39              400000    four00GigE32
-Ethernet40		40,41,42,43,44,45,46,47              400000    four00GigE40
-Ethernet48		48,49,50,51,52,53,54,55              400000    four00GigE48
-Ethernet56		56,57,58,59,60,61,62,63              400000    four00GigE56
-Ethernet64		64,65,66,67,68,69,70,71              400000    four00GigE64
-Ethernet72		72,73,74,75,76,77,78,79              400000    four00GigE72
-Ethernet80		80,81,82,83,84,85,86,87              400000    four00GigE80
-Ethernet88		88,89,90,91,92,93,94,95              400000    four00GigE88
-Ethernet96		96,97,98,99,100,101,102,103          400000    four00GigE96
-Ethernet104		104,105,106,107,108,109,110,111      400000    four00GigE104
-Ethernet112		112,113,114,115,116,117,118,119      400000    four00GigE112
-Ethernet120		120,121,122,123,124,125,126,127      400000    four00GigE120
-Ethernet128		128,129,130,131,132,133,134,135      400000    four00GigE128
-Ethernet136		136,137,138,139,140,141,142,143      400000    four00GigE136
-Ethernet144		144,145,146,147,148,149,150,151      400000    four00GigE144
-Ethernet152		152,153,154,155,156,157,158,159      400000    four00GigE152
-Ethernet160		160,161,162,163,164,165,166,167      400000    four00GigE160
-Ethernet168		168,169,170,171,172,173,174,175      400000    four00GigE168
-Ethernet176		176,177,178,179,180,181,182,183      400000    four00GigE176
-Ethernet184		184,185,186,187,188,189,190,191      400000    four00GigE184
-Ethernet192		192,193,194,195,196,197,198,199      400000    four00GigE192
-Ethernet200		200,201,202,203,204,205,206,207      400000    four00GigE200
-Ethernet208		208,209,210,211,212,213,214,215      400000    four00GigE208
-Ethernet216		216,217,218,219,220,221,222,223      400000    four00GigE216
-Ethernet224		224,225,226,227,228,229,230,231      400000    four00GigE224
-Ethernet232		232,233,234,235,236,237,238,239      400000    four00GigE232
-Ethernet240		240,241,242,243,244,245,246,247      400000    four00GigE240
-Ethernet248		248,249,250,251,252,253,254,255      400000    four00GigE248
-Ethernet256		256                                  10000     tenGigE256
+#  name         lanes                                alias           speed  autoneg     fec    index
+Ethernet0       0                                   twenty5GigE0     25000    on        none     1
+Ethernet1       1                                   twenty5GigE1     25000    on        none     2
+Ethernet2       2                                   twenty5GigE2     25000    on        none     3
+Ethernet3       3                                   twenty5GigE3     25000    on        none     4
+Ethernet4       4                                   twenty5GigE4     25000    on        none     5
+Ethernet5       5                                   twenty5GigE5     25000    on        none     6
+Ethernet6       6                                   twenty5GigE6     25000    on        none     7
+Ethernet7       7                                   twenty5GigE7     25000    on        none     8
+Ethernet8       8                                   twenty5GigE8     25000    on        none     9
+Ethernet9       9                                   twenty5GigE9     25000    on        none     10
+Ethernet10      10                                  twenty5GigE10    25000    on        none     11
+Ethernet11      11                                  twenty5GigE11    25000    on        none     12
+Ethernet12      12                                  twenty5GigE12    25000    on        none     13
+Ethernet13      13                                  twenty5GigE13    25000    on        none     14
+Ethernet14      14                                  twenty5GigE14    25000    on        none     15
+Ethernet15      15                                  twenty5GigE15    25000    on        none     16
+Ethernet16      16                                  twenty5GigE16    25000    on        none     17
+Ethernet17      17                                  twenty5GigE17    25000    on        none     18
+Ethernet18      18                                  twenty5GigE18    25000    on        none     19
+Ethernet19      19                                  twenty5GigE19    25000    on        none     20
+Ethernet20      20                                  twenty5GigE20    25000    on        none     21
+Ethernet21      21                                  twenty5GigE21    25000    on        none     22
+Ethernet22      22                                  twenty5GigE22    25000    on        none     23
+Ethernet23      23                                  twenty5GigE23    25000    on        none     24
+Ethernet24      24                                  twenty5GigE24    25000    on        none     25
+Ethernet25      25                                  twenty5GigE25    25000    on        none     26
+Ethernet26      26                                  twenty5GigE26    25000    on        none     27
+Ethernet27      27                                  twenty5GigE27    25000    on        none     28
+Ethernet28      28                                  twenty5GigE28    25000    on        none     29
+Ethernet29      29                                  twenty5GigE29    25000    on        none     30
+Ethernet30      30                                  twenty5GigE30    25000    on        none     31
+Ethernet31      31                                  twenty5GigE31    25000    on        none     32
+Ethernet32      32                                  twenty5GigE32    25000    on        none     33
+Ethernet33      33                                  twenty5GigE33    25000    on        none     34
+Ethernet34      34                                  twenty5GigE34    25000    on        none     35
+Ethernet35      35                                  twenty5GigE35    25000    on        none     36
+Ethernet36      36                                  twenty5GigE36    25000    on        none     37
+Ethernet37      37                                  twenty5GigE37    25000    on        none     38
+Ethernet38      38                                  twenty5GigE38    25000    on        none     39
+Ethernet39      39                                  twenty5GigE39    25000    on        none     40
+Ethernet40      40                                  twenty5GigE40    25000    on        none     41
+Ethernet41      41                                  twenty5GigE41    25000    on        none     42
+Ethernet42      42                                  twenty5GigE42    25000    on        none     43
+Ethernet43      43                                  twenty5GigE43    25000    on        none     44
+Ethernet44      44                                  twenty5GigE44    25000    on        none     45
+Ethernet45      45                                  twenty5GigE45    25000    on        none     46
+Ethernet46      46                                  twenty5GigE46    25000    on        none     47
+Ethernet47      47                                  twenty5GigE47    25000    on        none     48
+Ethernet48      48,49,50,51                         one00GigE48      100000   on        rs       49
+Ethernet49      52,53,54,55                         one00GigE49      100000   on        rs       50
+Ethernet50      56,57,58,59                         one00GigE113     100000   on        rs       51
+Ethernet51      60,61,62,63                         one00GigE114     100000   on        rs       52
+Ethernet52      64,65,66,67                         one00GigE115     100000   on        rs       53
+Ethernet53      68,69,70,71                         one00GigE116     100000   on        rs       54
+Ethernet54      72,73,74,75                         one00GigE117     100000   on        rs       55
+Ethernet55      76,77,78,79                         one00GigE118     100000   on        rs       56
+Ethernet56      80                                  tenGigE136       10000    off       none     57
diff --git a/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/db98cx8580_32cd/profile.ini b/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/db98cx8580_32cd/profile.ini
index 2813bbd36..c2f77685a 100644
--- a/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/db98cx8580_32cd/profile.ini
+++ b/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/db98cx8580_32cd/profile.ini
@@ -1,2 +1 @@
 switchMacAddress=00:01:02:03:04:05
-apPortListWithCableLen=000:1 008:1 016:1 024:1 032:1 040:1 048:1 056:1 064:1 072:1 080:1 088:1 096:1 104:1 112:1 120:1 128:1 136:1 144:1 152:1 160:1 168:1 176:1 184:1 192:1 200:1 208:1 216:1 224:1 232:1 240:1 248:1 256:1
diff --git a/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/db98cx8580_32cd/sai.profile b/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/db98cx8580_32cd/sai.profile
index 6dc6f35fe..8f6edc9ae 100644
--- a/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/db98cx8580_32cd/sai.profile
+++ b/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/db98cx8580_32cd/sai.profile
@@ -1,3 +1,4 @@
 mode=1
-hwId=FALCON32x400G
+hwId=FC48x25G8x100GR4
+switchProfile=/usr/share/sonic/hwsku/SAI-F12_8T-48x25G-8x100G.xml
 SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/profile.ini
diff --git a/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/plugins/eeprom.py b/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/plugins/eeprom.py
deleted file mode 100644
index 71f05c5b7..000000000
--- a/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/plugins/eeprom.py
+++ /dev/null
@@ -1,11 +0,0 @@
-try:
-    from sonic_eeprom import eeprom_tlvinfo
-except ImportError as e:
-    raise ImportError(str(e) + "- required module not found")
-
-
-class board(eeprom_tlvinfo.TlvInfoDecoder):
-
-    def __init__(self, name, path, cpld_root, ro):
-        self.eeprom_path = "/etc/sonic/eeprom"
-        super(board, self).__init__(self.eeprom_path, 0, '', True)
diff --git a/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/plugins/sfputil.py b/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/plugins/sfputil.py
deleted file mode 100644
index 280593c60..000000000
--- a/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/plugins/sfputil.py
+++ /dev/null
@@ -1,254 +0,0 @@
-try:
-    import os
-    import time
-    import re
-    import subprocess
-    from sonic_sfp.sfputilbase import SfpUtilBase
-    from sonic_py_common.general import getstatusoutput_noshell
-except ImportError as e:
-    raise ImportError(str(e) + "- required module not found")
-
-smbus_present = 1
-
-try:
-    import smbus
-except ImportError as e:
-    smbus_present = 0
-
-
-class SfpUtil(SfpUtilBase):
-    """Platform specific sfputil class"""
-    _port_start = 1
-    _port_end = 257
-    ports_in_block = 257
-
-    _port_to_eeprom_mapping = {}
-
-    _qsfp_ports = list(range(_port_start, ports_in_block + 1))
-
-    def __init__(self):
-        subprocess.call(["modprobe", "i2c-dev"])
-        if not os.path.exists("/sys/bus/i2c/devices/0-0050"):
-            with open("/sys/bus/i2c/devices/i2c-0/new_device", 'w') as file:
-                file.write("optoe2 0x50")
-
-        eeprom_path = '/sys/bus/i2c/devices/0-0050/eeprom'
-        # for x in range(self.port _start, self.port_end +1):
-        x = self.port_start
-        while(x < self.port_end+1):
-            self.port_to_eeprom_mapping[x] = eeprom_path
-            x = x + 1
-        SfpUtilBase.__init__(self)
-
-    def reset(self, port_num):
-        # Check for invalid port_num
-        if port_num < self._port_start or port_num > self._port_end:
-            return False
-
-        port_ps = "/sys/bus/i2c/devices/0-0050/sfp_port_reset"
-
-        try:
-            reg_file = open(port_ps, 'w')
-        except IOError as e:
-            print("Error: unable to open file: %s" % str(e))
-            return False
-
-        # toggle reset
-        reg_file.seek(0)
-        reg_file.write('1')
-        time.sleep(1)
-        reg_file.seek(0)
-        reg_file.write('0')
-        reg_file.close()
-        return True
-
-    def set_low_power_mode(self, port_nuM, lpmode):
-        raise NotImplementedError
-
-    def get_low_power_mode(self, port_num):
-        raise NotImplementedError
-
-    def i2c_get(self, device_addr, offset):
-        status = 0
-        if smbus_present == 0:
-            x = ["i2cget", "-y", "0", hex(device_addr), hex(offset)]
-            cmdstatus, status = getstatusoutput_noshell(x)
-            if cmdstatus != 0:
-                return cmdstatus
-            status = int(status, 16)
-        else:
-            bus = smbus.SMBus(0)
-            status = bus.read_byte_data(device_addr, offset)
-        return status
-
-    def i2c_set(self, device_addr, offset, value):
-        if smbus_present == 0:
-            cmd = ["i2cset", "-y", "0", hex(device_addr), hex(offset), hex(value)]
-            subprocess.call(cmd)
-        else:
-            bus = smbus.SMBus(0)
-            bus.write_byte_data(device_addr, offset, value)
-
-    def get_presence(self, port_num):
-        # Check for invalid port_num
-        if port_num < self._port_start or port_num > self._port_end:
-            return False
-        else:
-            self.i2c_set(0x70, 0, 0)
-            self.i2c_set(0x71, 0, 0)
-            self.i2c_set(0x72, 0, 0)
-            self.i2c_set(0x73, 0, 0)
-            self.i2c_set(0x74, 0, 0)
-            reg = (port_num)/8
-            offset = reg % 8
-            if offset >= 4:
-                offset = offset-4
-            elif offset < 4:
-                offset = offset+4
-            bin_offset = 1 << offset
-
-            if port_num >= 0 and port_num <= 63:
-                device_reg = 0x70
-            elif port_num >= 64 and port_num <= 127:
-                device_reg = 0x71
-            elif port_num >= 128 and port_num <= 191:
-                device_reg = 0x72
-            elif port_num >= 192 and port_num <= 255:
-                device_reg = 0x73
-            elif port_num >= 256 and port_num <= 257:
-                device_reg = 0x74
-
-            #print "i2c %d %x %x" % (port_num, device_reg, bin_offset)
-            self.i2c_set(device_reg, 0, bin_offset)
-            path = "/sys/bus/i2c/devices/0-0050/eeprom"
-            try:
-                reg_file = open(path)
-                reg_file.seek(0o1)
-                reg_file.read(0o2)
-            except IOError as e:
-                return False
-
-            return True
-
-    def read_porttab_mappings(self, porttabfile):
-        #print("I am in porttab_mappings")
-        logical = []
-        logical_to_bcm = {}
-        logical_to_physical = {}
-        physical_to_logical = {}
-        last_fp_port_index = 0
-        last_portname = ""
-        first = 1
-        port_pos_in_file = 0
-        parse_fmt_port_config_ini = False
-
-        try:
-            f = open(porttabfile)
-        except:
-            raise
-
-        parse_fmt_port_config_ini = (os.path.basename(porttabfile) == "port_config.ini")
-        # Read the porttab file and generate dicts
-        # with mapping for future reference.
-        #
-        # TODO: Refactor this to use the portconfig.py module that now
-        # exists as part of the sonic-config-engine package.
-        title = []
-        for line in f:
-            line.strip()
-            if re.search("^#", line) is not None:
-                # The current format is: # name lanes alias index speed
-                # Where the ordering of the columns can vary
-                title = line.split()[1:]
-                continue
-            #print title
-
-            # Parsing logic for 'port_config.ini' file
-            if (parse_fmt_port_config_ini):
-                # bcm_port is not explicitly listed in port_config.ini format
-                # Currently we assume ports are listed in numerical order according to bcm_port
-                # so we use the port's position in the file (zero-based) as bcm_port
-                portname = line.split()[0]
-
-                bcm_port = str(port_pos_in_file)
-
-                if "index" in title:
-                    fp_port_index = int(line.split()[title.index("index")])
-                # Leave the old code for backward compatibility
-                # if len(line.split()) >= 4:
-                #    fp_port_index = (line.split()[3])
-                #    print(fp_port_index)
-                else:
-                    fp_port_index = portname.split("Ethernet").pop()
-                    fp_port_index = int(fp_port_index.split("s").pop(0))+1
-            else:  # Parsing logic for older 'portmap.ini' file
-                (portname, bcm_port) = line.split("=")[1].split(",")[:2]
-
-                fp_port_index = portname.split("Ethernet").pop()
-                fp_port_index = int(fp_port_index.split("s").pop(0))+1
-
-            if ((len(self.sfp_ports) > 0) and (fp_port_index not in self.sfp_ports)):
-                continue
-
-            if first == 1:
-                # Initialize last_[physical|logical]_port
-                # to the first valid port
-                last_fp_port_index = fp_port_index
-                last_portname = portname
-                first = 0
-
-            logical.append(portname)
-
-            logical_to_bcm[portname] = "xe" + bcm_port
-            logical_to_physical[portname] = [fp_port_index]
-            if physical_to_logical.get(fp_port_index) is None:
-                physical_to_logical[fp_port_index] = [portname]
-            else:
-                physical_to_logical[fp_port_index].append(
-                    portname)
-
-            if (fp_port_index - last_fp_port_index) > 1:
-                # last port was a gang port
-                for p in range(last_fp_port_index+1, fp_port_index):
-                    logical_to_physical[last_portname].append(p)
-                    if physical_to_logical.get(p) is None:
-                        physical_to_logical[p] = [last_portname]
-                    else:
-                        physical_to_logical[p].append(last_portname)
-
-            last_fp_port_index = fp_port_index
-            last_portname = portname
-
-            port_pos_in_file += 1
-
-        self.logical = logical
-        self.logical_to_bcm = logical_to_bcm
-        self.logical_to_physical = logical_to_physical
-        self.physical_to_logical = physical_to_logical
-
-        # print(self.logical_to_physical)
-        '''print("logical: " + self.logical)
-        print("logical to bcm: " + self.logical_to_bcm)
-        print("logical to physical: " + self.logical_to_physical)
-        print("physical to logical: " + self.physical_to_logical)'''
-        #print("exiting port_tab_mappings")
-
-    @property
-    def port_start(self):
-        return self._port_start
-
-    @property
-    def port_end(self):
-        return self._port_end
-
-    @property
-    def qsfp_ports(self):
-        return self._qsfp_ports
-
-    @property
-    def port_to_eeprom_mapping(self):
-        return self._port_to_eeprom_mapping
-
-    @property
-    def get_transceiver_change_event(self):
-        raise NotImplementedError
diff --git a/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/pmon_daemon_control.json b/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/pmon_daemon_control.json
index 94592fa8c..39deb88be 100644
--- a/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/pmon_daemon_control.json
+++ b/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/pmon_daemon_control.json
@@ -1,3 +1,8 @@
 {
-    "skip_ledd": true
+    "skip_ledd": true,
+    "skip_pcied": true,
+    "skip_thermalctld": true,
+    "skip_psud": true,
+    "skip_xcvrd": true,
+    "skip_syseepromd": true
 }
diff --git a/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/system_health_monitoring_config.json b/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/system_health_monitoring_config.json
new file mode 100644
index 000000000..79c17103b
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8580_32cd-r0/system_health_monitoring_config.json
@@ -0,0 +1,10 @@
+{
+    "services_to_ignore": [],
+    "devices_to_ignore": [
+        "asic",
+        "psu.temperature",
+        "fan",
+        "psu"
+    ],
+    "user_defined_checkers": []
+}

From c4695baa9b37fe43c5425ba37ea04486ba3d307e Mon Sep 17 00:00:00 2001
From: Pavan Naregundi <pnaregundi@marvell.com>
Date: Mon, 22 Apr 2024 04:39:20 +0000
Subject: [PATCH 0544/1115] HWSKU for x86_64-marvell_db98cx8540_16cd-r0

Signed-off-by: Pavan Naregundi <pnaregundi@marvell.com>
---
 .../FALCON_DB/ASK-Board-F6_4T-DB.md5          |    1 +
 .../FALCON_DB/ASK-Board-F6_4T-DB.xml          | 2898 ++++++++++++
 .../FALCON_DB/ASK-L1-F6_4T-DB.md5             |    1 +
 .../FALCON_DB/ASK-L1-F6_4T-DB.xml             | 1560 +++++++
 .../FALCON_DB/ASK-PP-F6_4T-DB.md5             |    1 +
 .../FALCON_DB/ASK-PP-F6_4T-DB.xml             | 1180 +++++
 .../FALCON_DB/SAI-F6_4T-DB.md5                |    1 +
 .../FALCON_DB/SAI-F6_4T-DB.xml                |  583 +++
 .../FALCON_DB/buffers_defaults_t0.j2          |   36 +
 .../FALCON_DB/buffers_defaults_t1.j2          |   36 +
 .../FALCON_DB/port_config.ini                 |   71 +
 .../FALCON_DB/profile.ini                     |    1 +
 .../FALCON_DB/sai.profile                     |    4 +
 .../FC128x50G/ASK-Board-F6_4T-128x50G.md5     |    1 +
 .../FC128x50G/ASK-Board-F6_4T-128x50G.xml     | 4038 +++++++++++++++++
 .../FC128x50G/ASK-L1-F6_4T-128x50G.md5        |    1 +
 .../FC128x50G/ASK-L1-F6_4T-128x50G.xml        | 1681 +++++++
 .../FC128x50G/ASK-PP-F6_4T-128x50G.md5        |    1 +
 .../FC128x50G/ASK-PP-F6_4T-128x50G.xml        | 1180 +++++
 .../FC128x50G/SAI-F6_4T-128x50G.md5           |    1 +
 .../FC128x50G/SAI-F6_4T-128x50G.xml           |  883 ++++
 .../FC128x50G/buffers_defaults_t0.j2          |   36 +
 .../FC128x50G/buffers_defaults_t1.j2          |   36 +
 .../FC128x50G/port_config.ini                 |  131 +
 .../FC128x50G/profile.ini                     |    1 +
 .../FC128x50G/sai.profile                     |    4 +
 .../ASK-Board-F6_4T-48x25G-4x100G.md5         |    1 +
 .../ASK-Board-F6_4T-48x25G-4x100G.xml         | 2606 +++++++++++
 .../ASK-L1-F6_4T-48x25G-4x100G.md5            |    1 +
 .../ASK-L1-F6_4T-48x25G-4x100G.xml            | 1228 +++++
 .../ASK-PP-F6_4T-48x25G-4x100G.md5            |    1 +
 .../ASK-PP-F6_4T-48x25G-4x100G.xml            | 1180 +++++
 .../SAI-F6_4T-48x25G-4x100G.md5               |    1 +
 .../SAI-F6_4T-48x25G-4x100G.xml               |  503 ++
 .../FC48x25G4x100GR4/buffers_defaults_t0.j2   |   36 +
 .../FC48x25G4x100GR4/buffers_defaults_t1.j2   |   36 +
 .../FC48x25G4x100GR4/port_config.ini          |   55 +
 .../FC48x25G4x100GR4/profile.ini              |    1 +
 .../FC48x25G4x100GR4/sai.profile              |    4 +
 .../ASK-Board-F6_4T-48x25G-4x100G.md5         |    1 +
 .../ASK-Board-F6_4T-48x25G-4x100G.xml         | 2606 +++++++++++
 .../ASK-L1-F6_4T-48x25G-4x100G.md5            |    1 +
 .../ASK-L1-F6_4T-48x25G-4x100G.xml            | 1228 +++++
 .../ASK-PP-F6_4T-48x25G-4x100G.md5            |    1 +
 .../ASK-PP-F6_4T-48x25G-4x100G.xml            | 1180 +++++
 .../SAI-F6_4T-48x25G-4x100G.md5               |    1 +
 .../SAI-F6_4T-48x25G-4x100G.xml               |  503 ++
 .../db98cx8540_16cd/buffers.json.j2           |    1 +
 .../db98cx8540_16cd/buffers_config.j2         |  165 +
 .../db98cx8540_16cd/buffers_defaults_t0.j2    |   36 +
 .../db98cx8540_16cd/buffers_defaults_t1.j2    |   36 +
 .../db98cx8540_16cd/port_config.ini           |   55 +
 .../db98cx8540_16cd/profile.ini               |    1 +
 .../db98cx8540_16cd/qos.json.j2               |    1 +
 .../db98cx8540_16cd/sai.profile               |    4 +
 .../default_sku                               |    1 +
 .../platform_asic                             |    1 +
 .../pmon_daemon_control.json                  |    8 +
 .../system_health_monitoring_config.json      |   10 +
 59 files changed, 25860 insertions(+)
 create mode 100644 device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FALCON_DB/ASK-Board-F6_4T-DB.md5
 create mode 100644 device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FALCON_DB/ASK-Board-F6_4T-DB.xml
 create mode 100644 device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FALCON_DB/ASK-L1-F6_4T-DB.md5
 create mode 100644 device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FALCON_DB/ASK-L1-F6_4T-DB.xml
 create mode 100644 device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FALCON_DB/ASK-PP-F6_4T-DB.md5
 create mode 100644 device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FALCON_DB/ASK-PP-F6_4T-DB.xml
 create mode 100644 device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FALCON_DB/SAI-F6_4T-DB.md5
 create mode 100644 device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FALCON_DB/SAI-F6_4T-DB.xml
 create mode 100644 device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FALCON_DB/buffers_defaults_t0.j2
 create mode 100644 device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FALCON_DB/buffers_defaults_t1.j2
 create mode 100644 device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FALCON_DB/port_config.ini
 create mode 100644 device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FALCON_DB/profile.ini
 create mode 100644 device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FALCON_DB/sai.profile
 create mode 100644 device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FC128x50G/ASK-Board-F6_4T-128x50G.md5
 create mode 100644 device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FC128x50G/ASK-Board-F6_4T-128x50G.xml
 create mode 100644 device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FC128x50G/ASK-L1-F6_4T-128x50G.md5
 create mode 100644 device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FC128x50G/ASK-L1-F6_4T-128x50G.xml
 create mode 100644 device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FC128x50G/ASK-PP-F6_4T-128x50G.md5
 create mode 100644 device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FC128x50G/ASK-PP-F6_4T-128x50G.xml
 create mode 100644 device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FC128x50G/SAI-F6_4T-128x50G.md5
 create mode 100644 device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FC128x50G/SAI-F6_4T-128x50G.xml
 create mode 100644 device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FC128x50G/buffers_defaults_t0.j2
 create mode 100644 device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FC128x50G/buffers_defaults_t1.j2
 create mode 100644 device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FC128x50G/port_config.ini
 create mode 100644 device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FC128x50G/profile.ini
 create mode 100644 device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FC128x50G/sai.profile
 create mode 100644 device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FC48x25G4x100GR4/ASK-Board-F6_4T-48x25G-4x100G.md5
 create mode 100644 device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FC48x25G4x100GR4/ASK-Board-F6_4T-48x25G-4x100G.xml
 create mode 100644 device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FC48x25G4x100GR4/ASK-L1-F6_4T-48x25G-4x100G.md5
 create mode 100644 device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FC48x25G4x100GR4/ASK-L1-F6_4T-48x25G-4x100G.xml
 create mode 100644 device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FC48x25G4x100GR4/ASK-PP-F6_4T-48x25G-4x100G.md5
 create mode 100644 device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FC48x25G4x100GR4/ASK-PP-F6_4T-48x25G-4x100G.xml
 create mode 100644 device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FC48x25G4x100GR4/SAI-F6_4T-48x25G-4x100G.md5
 create mode 100644 device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FC48x25G4x100GR4/SAI-F6_4T-48x25G-4x100G.xml
 create mode 100644 device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FC48x25G4x100GR4/buffers_defaults_t0.j2
 create mode 100644 device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FC48x25G4x100GR4/buffers_defaults_t1.j2
 create mode 100644 device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FC48x25G4x100GR4/port_config.ini
 create mode 100644 device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FC48x25G4x100GR4/profile.ini
 create mode 100644 device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FC48x25G4x100GR4/sai.profile
 create mode 100644 device/marvell/x86_64-marvell_db98cx8540_16cd-r0/db98cx8540_16cd/ASK-Board-F6_4T-48x25G-4x100G.md5
 create mode 100644 device/marvell/x86_64-marvell_db98cx8540_16cd-r0/db98cx8540_16cd/ASK-Board-F6_4T-48x25G-4x100G.xml
 create mode 100644 device/marvell/x86_64-marvell_db98cx8540_16cd-r0/db98cx8540_16cd/ASK-L1-F6_4T-48x25G-4x100G.md5
 create mode 100644 device/marvell/x86_64-marvell_db98cx8540_16cd-r0/db98cx8540_16cd/ASK-L1-F6_4T-48x25G-4x100G.xml
 create mode 100644 device/marvell/x86_64-marvell_db98cx8540_16cd-r0/db98cx8540_16cd/ASK-PP-F6_4T-48x25G-4x100G.md5
 create mode 100644 device/marvell/x86_64-marvell_db98cx8540_16cd-r0/db98cx8540_16cd/ASK-PP-F6_4T-48x25G-4x100G.xml
 create mode 100644 device/marvell/x86_64-marvell_db98cx8540_16cd-r0/db98cx8540_16cd/SAI-F6_4T-48x25G-4x100G.md5
 create mode 100644 device/marvell/x86_64-marvell_db98cx8540_16cd-r0/db98cx8540_16cd/SAI-F6_4T-48x25G-4x100G.xml
 create mode 100644 device/marvell/x86_64-marvell_db98cx8540_16cd-r0/db98cx8540_16cd/buffers.json.j2
 create mode 100644 device/marvell/x86_64-marvell_db98cx8540_16cd-r0/db98cx8540_16cd/buffers_config.j2
 create mode 100644 device/marvell/x86_64-marvell_db98cx8540_16cd-r0/db98cx8540_16cd/buffers_defaults_t0.j2
 create mode 100644 device/marvell/x86_64-marvell_db98cx8540_16cd-r0/db98cx8540_16cd/buffers_defaults_t1.j2
 create mode 100644 device/marvell/x86_64-marvell_db98cx8540_16cd-r0/db98cx8540_16cd/port_config.ini
 create mode 100644 device/marvell/x86_64-marvell_db98cx8540_16cd-r0/db98cx8540_16cd/profile.ini
 create mode 100644 device/marvell/x86_64-marvell_db98cx8540_16cd-r0/db98cx8540_16cd/qos.json.j2
 create mode 100644 device/marvell/x86_64-marvell_db98cx8540_16cd-r0/db98cx8540_16cd/sai.profile
 create mode 100644 device/marvell/x86_64-marvell_db98cx8540_16cd-r0/default_sku
 create mode 100644 device/marvell/x86_64-marvell_db98cx8540_16cd-r0/platform_asic
 create mode 100644 device/marvell/x86_64-marvell_db98cx8540_16cd-r0/pmon_daemon_control.json
 create mode 100644 device/marvell/x86_64-marvell_db98cx8540_16cd-r0/system_health_monitoring_config.json

diff --git a/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FALCON_DB/ASK-Board-F6_4T-DB.md5 b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FALCON_DB/ASK-Board-F6_4T-DB.md5
new file mode 100644
index 000000000..ed4d23021
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FALCON_DB/ASK-Board-F6_4T-DB.md5
@@ -0,0 +1 @@
+79a4ca665350035cf9ba9b1c19507011
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FALCON_DB/ASK-Board-F6_4T-DB.xml b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FALCON_DB/ASK-Board-F6_4T-DB.xml
new file mode 100644
index 000000000..fb05b7825
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FALCON_DB/ASK-Board-F6_4T-DB.xml
@@ -0,0 +1,2898 @@
+<?xml version="1.0" encoding="utf-8"?>
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-02-19-1.06" profile="Askboard" sid="eb53f80b-5892-4f8b-9197-a6f626effaba">
+  <askboardplt:ASK-Board xmlns:askboardplt="urn:marvell:askboard:yang">
+    <askboardplt:typedefs>
+      <askboardplt:typedef>
+        <askboardplt:name>std-string</askboardplt:name>
+        <askboardplt:type>string</askboardplt:type>
+        <askboardplt:description>standard string.</askboardplt:description>
+        <askboardplt:min>1</askboardplt:min>
+        <askboardplt:max>100</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>board-callback-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies os/ext drv callback types.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>linux-static</askboardplt:name>
+          <askboardplt:description>Linux Static</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>linux-shared</askboardplt:name>
+          <askboardplt:description>Linux Shared Lib mode</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>external</askboardplt:name>
+          <askboardplt:description>External Os</askboardplt:description>
+          <askboardplt:value>3</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>freeBsd</askboardplt:name>
+          <askboardplt:description>Free BSD</askboardplt:description>
+          <askboardplt:value>4</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>board-pp-map-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies pci info types.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>fixed</askboardplt:name>
+          <askboardplt:description>Fixed</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>autoscan</askboardplt:name>
+          <askboardplt:description>Auto scan</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>board-pp-interface-channel-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies channel interface type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>pci</askboardplt:name>
+          <askboardplt:description>PCI</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>smi</askboardplt:name>
+          <askboardplt:description>SMI</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>twsi</askboardplt:name>
+          <askboardplt:description>TWSI</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>board-pp-as-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies Address space type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>4_regions</askboardplt:name>
+          <askboardplt:description>address-space 4 regions</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>8_regions</askboardplt:name>
+          <askboardplt:description>address-space 8 regions</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>atu</askboardplt:name>
+          <askboardplt:description>address translation unit</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>device-id-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Device ID 0..1</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>1</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>port-mapping-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies port map type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>ethernet_mac</askboardplt:name>
+          <askboardplt:description>ETHERNET_MAC</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>cpu_sdma</askboardplt:name>
+          <askboardplt:description>CPU_SDMA</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>interface-num-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Interface number</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>1023</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>txq-port-number-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>TXq port number </askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>99</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>phy-smi-interface-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Phy SMI interface type.</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>3</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>phy-xsmi-interface-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Phy XSMI interface type.</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>15</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>phy-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the PHY Part Identifier.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>NA</askboardplt:name>
+          <askboardplt:description>No Phy</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E1543</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E1543, used for Combo ports.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E1545</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E1545, used for Copper GE with MAC on PHY support.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E1680</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E1680, used for Copper with speeds of 10M/100M/1G.</askboardplt:description>
+          <askboardplt:value>3</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E151X</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E151X, used for Copper (HW supports combo and fiber).</askboardplt:description>
+          <askboardplt:value>4</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E3140</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E3140, used for Copper with speeds of 100M/1G/10G.
+Uses with FW SolarFlare next generation.</askboardplt:description>
+          <askboardplt:value>5</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E3240</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E3240, used for Copper with speeds of 100M/1G/10G.
+Uses with FW, SolarFlare next generation.</askboardplt:description>
+          <askboardplt:value>6</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E3680</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E3680, used for Octal Copper 100M.</askboardplt:description>
+          <askboardplt:value>7</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E3220</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E3220, used for Combo port with speeds of 100M/1G/10G.
+Uses FW, SolarFlare next generation.</askboardplt:description>
+          <askboardplt:value>8</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E1680L</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E1680L, used for Copper with speeds of 10M/100M/1G.</askboardplt:description>
+          <askboardplt:value>9</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E33X0</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E33X0, used for MGIG Combo.</askboardplt:description>
+          <askboardplt:value>10</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E1548</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E1548, used for Fiber GE.</askboardplt:description>
+          <askboardplt:value>11</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E20X0</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E20X0, used for Copper with speeds of 10M/100M/1G/2.5G/5G.</askboardplt:description>
+          <askboardplt:value>12</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E1512</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E1512, used for Copper with speeds of 10M/100M/1G.</askboardplt:description>
+          <askboardplt:value>13</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E2180</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E2180, used for Copper with speeds of 10M/100M/1G/2.5G/5G.</askboardplt:description>
+          <askboardplt:value>14</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E1780</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E1780, Integrated Octal 10/100/1000 Mbps Energy
+Efficient Ethernet Transceiver</askboardplt:description>
+          <askboardplt:value>15</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E2540</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E2540, 4 ports 10/100/1000/2.5G/5GBASE-T Ethernet
+Transceiver with IEEE 1588v2 PTP Support</askboardplt:description>
+          <askboardplt:value>16</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E2580</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E12580, Octal 10/100/1000/2.5G/5GBASE-T Ethernet Transceiver
+with IEEE 1588v2 PTP Support</askboardplt:description>
+          <askboardplt:value>17</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>physical-port-num-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>PHYSICAL PORT NUM</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>1023</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-port-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the ledstream port type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>PORT_TYPE_TRI_SPEED</askboardplt:name>
+          <askboardplt:description>tri-speed port.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>PORT_TYPE_XG</askboardplt:name>
+          <askboardplt:description>XG port.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-blink-select-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the LED stream blink select type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_SELECT_0</askboardplt:name>
+          <askboardplt:description>Blink 0 signal.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_SELECT_1</askboardplt:name>
+          <askboardplt:description>Blink 1 signal</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-order-mode-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the LED stream ordering mode.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>ORDER_MODE_BY_PORT</askboardplt:name>
+          <askboardplt:description>the indication order is arranged by port.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>ORDER_MODE_BY_CLASS</askboardplt:name>
+          <askboardplt:description>the indication order is arranged by class.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-blink-duty-cycle-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the LED stream blink cycle duty cycle type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DUTY_CYCLE_0</askboardplt:name>
+          <askboardplt:description>25% on, 75% off.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DUTY_CYCLE_1</askboardplt:name>
+          <askboardplt:description>50% on, 50% off.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DUTY_CYCLE_2</askboardplt:name>
+          <askboardplt:description>50% on, 50% off.</askboardplt:description>
+          <askboardplt:value>3</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DUTY_CYCLE_3</askboardplt:name>
+          <askboardplt:description>75% on, 25% off.</askboardplt:description>
+          <askboardplt:value>4</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-blink-duration-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the LED stream blink period type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DURATION_0</askboardplt:name>
+          <askboardplt:description>BLINK_DURATION_0.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DURATION_1</askboardplt:name>
+          <askboardplt:description>BLINK_DURATION_1.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DURATION_2</askboardplt:name>
+          <askboardplt:description>BLINK_DURATION_2.</askboardplt:description>
+          <askboardplt:value>3</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DURATION_3</askboardplt:name>
+          <askboardplt:description>BLINK_DURATION_3.</askboardplt:description>
+          <askboardplt:value>4</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DURATION_4</askboardplt:name>
+          <askboardplt:description>BLINK_DURATION_4.</askboardplt:description>
+          <askboardplt:value>5</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DURATION_5</askboardplt:name>
+          <askboardplt:description>BLINK_DURATION_5.</askboardplt:description>
+          <askboardplt:value>6</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DURATION_6</askboardplt:name>
+          <askboardplt:description>(APPLICABLE DEVICES: xCat3; AC5; Lion2; Bobcat2; Caelum; Aldrin; AC3X; Bobcat3; Aldrin2; Pipe) .</askboardplt:description>
+          <askboardplt:value>7</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DURATION_7</askboardplt:name>
+          <askboardplt:description>APPLICABLE DEVICES: Bobcat2; Caelum; Aldrin; AC3X; Bobcat3; Aldrin2; Pipe).</askboardplt:description>
+          <askboardplt:value>8</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-pulse-stretch-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the LED stream length of stretching for dynamic signals.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>PULSE_STRETCH_0_NO</askboardplt:name>
+          <askboardplt:description>PULSE_STRETCH_0_NO.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>PULSE_STRETCH_1</askboardplt:name>
+          <askboardplt:description>PULSE_STRETCH_1.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>PULSE_STRETCH_2</askboardplt:name>
+          <askboardplt:description>PULSE_STRETCH_2.</askboardplt:description>
+          <askboardplt:value>3</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>PULSE_STRETCH_3</askboardplt:name>
+          <askboardplt:description>PULSE_STRETCH_3.</askboardplt:description>
+          <askboardplt:value>4</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>PULSE_STRETCH_4</askboardplt:name>
+          <askboardplt:description>PULSE_STRETCH_4.</askboardplt:description>
+          <askboardplt:value>5</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>PULSE_STRETCH_5</askboardplt:name>
+          <askboardplt:description>PULSE_STRETCH_5.</askboardplt:description>
+          <askboardplt:value>6</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>PULSE_STRETCH_6</askboardplt:name>
+          <askboardplt:description>(APPLICABLE DEVICES: Bobcat2; Caelum; Aldrin; AC3X; Bobcat3; Aldrin2; Falcon; AC5P; Pipe).</askboardplt:description>
+          <askboardplt:value>7</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>PULSE_STRETCH_7</askboardplt:name>
+          <askboardplt:description>(APPLICABLE DEVICES: Bobcat2; Caelum; Aldrin; AC3X; Bobcat3; Aldrin2; Falcon; AC5P; Pipe).</askboardplt:description>
+          <askboardplt:value>8</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-clock-out-frequency-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the LED stream blink cycle duty cycle type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>_CLOCK_OUT_FREQUENCY_500</askboardplt:name>
+          <askboardplt:description>500 KHz LED clock frequency.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>CLOCK_OUT_FREQUENCY_1000</askboardplt:name>
+          <askboardplt:description>1 MHz LED clock frequency.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>CLOCK_OUT_FREQUENCY_2000</askboardplt:name>
+          <askboardplt:description>2 MHz LED clock frequency.</askboardplt:description>
+          <askboardplt:value>3</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>CLOCK_OUT_FREQUENCY_3000</askboardplt:name>
+          <askboardplt:description>3 MHz LED clock frequency.</askboardplt:description>
+          <askboardplt:value>4</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-class5-select-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the LED stream indication displayed on class5 (for dual-media port/phy).</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>CLASS_5_SELECT_HALF_DUPLEX</askboardplt:name>
+          <askboardplt:description>Half Duplex is displayed on class5.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>CLASS_5_SELECT_FIBER_LINK_UP</askboardplt:name>
+          <askboardplt:description>If port is a dual media port, Fiber Link Up is displayed on class5.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-class13-select-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the LED stream indication displayed on class13 (for dual-media port/phy).</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>CLASS_13_SELECT_LINK_DOWN</askboardplt:name>
+          <askboardplt:description>Link Down is displayed on class13.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>CLASS_13_SELECT_COPPER_LINK_UP</askboardplt:name>
+          <askboardplt:description>If port is a dual media port, Copper Link Up is displayed on class13.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-class-num-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Led Class number</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>11</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>boolean-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Boolean 32 bits , due to bing endian</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>false</askboardplt:name>
+          <askboardplt:description>False</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>true</askboardplt:name>
+          <askboardplt:description>True</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>bus-id-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Bus Id Type, PCI/SMI</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>255</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>function-id-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Function Id Type, PCI/SMI</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>255</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>domain-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Domain, PCI/SMI</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>255</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-interface-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Led interface</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>255</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-position-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Led position</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>63</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>serdes-lane-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>serdes lane</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>7</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>cpu-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>The CPU Internal/External</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>external</askboardplt:name>
+          <askboardplt:description>Extrenal connected CPU</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>internal</askboardplt:name>
+          <askboardplt:description>Internal CPU</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-clock-frequency-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Led Clock Frequency Sip6</askboardplt:description>
+        <askboardplt:min>500</askboardplt:min>
+        <askboardplt:max>80000</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-unit-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Led units</askboardplt:description>
+        <askboardplt:min>1</askboardplt:min>
+        <askboardplt:max>16</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-unit-or-no-unit-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Led units, 0 for no Unit</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>16</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-group-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Led Group</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>1</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-force-data-type</askboardplt:name>
+        <askboardplt:type>string</askboardplt:type>
+        <askboardplt:description>A hexadecimal string with octets represented as hex digits
+separated by colons.  The canonical representation uses
+lowercase characters.</askboardplt:description>
+        <askboardplt:min>3</askboardplt:min>
+        <askboardplt:max>11</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>bit-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Bit range 0..31</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>31</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>bit-size-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Bit leng 1..32</askboardplt:description>
+        <askboardplt:min>1</askboardplt:min>
+        <askboardplt:max>32</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-sip-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>The LED scehme</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>na</askboardplt:name>
+          <askboardplt:description>NA</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>sip5</askboardplt:name>
+          <askboardplt:description>SIP5: AC3x</askboardplt:description>
+          <askboardplt:value>5</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>sip6</askboardplt:name>
+          <askboardplt:description>SIP6: Falcon, AC5x</askboardplt:description>
+          <askboardplt:value>6</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>port-cscd-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the cascade port type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>DSA_1_WORD</askboardplt:name>
+          <askboardplt:description>DSA Regular</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>DSA_2_WORDS</askboardplt:name>
+          <askboardplt:description>DSA Extended</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>NETWORK</askboardplt:name>
+          <askboardplt:description>Network.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>DSA_3_WORDS</askboardplt:name>
+          <askboardplt:description>DSA 3 Words</askboardplt:description>
+          <askboardplt:value>3</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>DSA_4_WORD</askboardplt:name>
+          <askboardplt:description>DSA 4 Words</askboardplt:description>
+          <askboardplt:value>4</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>trunk-cscd-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Specifies the Cascade Trunk id.</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>127</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>port-trunk-cscd-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the cascade port type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>cscdPort</askboardplt:name>
+          <askboardplt:description>Cascade port</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>cscdTrunk</askboardplt:name>
+          <askboardplt:description>Csacde trunk</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>hash-cscd-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the hash used by cascade trunk.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>pkt</askboardplt:name>
+          <askboardplt:description>Hash based on packet</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>srcPort</askboardplt:name>
+          <askboardplt:description>Hash based on source port</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>asic-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>ASIC Type</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>ASIC_AC3X</askboardplt:name>
+          <askboardplt:description>AC3X</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>ASIC_AC5X</askboardplt:name>
+          <askboardplt:description>AC5X</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>ASIC_Falcon</askboardplt:name>
+          <askboardplt:description>FALCON</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+    </askboardplt:typedefs>
+    <askboardplt:ASIC_Type askboardplt:type="asic-type">ASIC_Falcon</askboardplt:ASIC_Type>
+    <askboardplt:boardName askboardplt:type="std-string">Falcon-6.4T-DB</askboardplt:boardName>
+    <askboardplt:osCallType askboardplt:type="board-callback-type">linux-static</askboardplt:osCallType>
+    <askboardplt:extDrvCallType askboardplt:type="board-callback-type">linux-static</askboardplt:extDrvCallType>
+    <askboardplt:mapType askboardplt:type="board-pp-map-type">autoscan</askboardplt:mapType>
+    <askboardplt:cpuType askboardplt:type="cpu-type">external</askboardplt:cpuType>
+    <askboardplt:mngInterfaceType askboardplt:type="board-pp-interface-channel-type">pci</askboardplt:mngInterfaceType>
+    <askboardplt:adressSpaceType askboardplt:type="board-pp-as-type">atu</askboardplt:adressSpaceType>
+    <askboardplt:device-list>
+      <askboardplt:devNum askboardplt:type="device-id-type">0</askboardplt:devNum>
+      <askboardplt:deviceId askboardplt:type="device-id-type">0</askboardplt:deviceId>
+      <askboardplt:pp-profile-name askboardplt:type="std-string">ASK-PP-F6_4T-DB.xml</askboardplt:pp-profile-name>
+      <askboardplt:L1-profile-name askboardplt:type="std-string">ASK-L1-F6_4T-DB.xml</askboardplt:L1-profile-name>
+      <askboardplt:ledStreamType askboardplt:type="led-sip-type">sip6</askboardplt:ledStreamType>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">0</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">0</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP0</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">0</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">1</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">1</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">2</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">2</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">3</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">3</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">4</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">4</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">5</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">5</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">6</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">6</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">7</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">7</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">8</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">8</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP1</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">1</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">9</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">9</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">10</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">10</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">11</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">11</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">12</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">12</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">13</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">13</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">14</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">14</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">15</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">15</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">16</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">16</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP0</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">0</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">17</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">17</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">18</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">18</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">19</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">19</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">20</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">20</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">21</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">21</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">22</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">22</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">23</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">23</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">24</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">24</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP1</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">1</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">25</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">25</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">26</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">26</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">27</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">27</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">28</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">28</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">29</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">29</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">30</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">30</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">31</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">31</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">32</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">32</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP0</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">0</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">33</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">33</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">34</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">34</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">35</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">35</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">36</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">36</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">37</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">37</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">38</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">38</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">39</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">39</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">40</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">40</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP1</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">1</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">41</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">41</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">42</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">42</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">43</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">43</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">44</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">44</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">45</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">45</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">46</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">46</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">47</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">47</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">48</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">48</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP0</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">0</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">49</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">50</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">50</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">52</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">51</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">54</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">52</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">56</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP1</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">1</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">53</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">58</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">54</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">60</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">55</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">62</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">56</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">64</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP0</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">0</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">57</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">68</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">58</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">72</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP1</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">1</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">59</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">76</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">60</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">80</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP0</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">0</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">64</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">84</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">65</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">88</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP1</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">1</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">66</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">92</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">67</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">96</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP0</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">0</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">68</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">104</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP1</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">1</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">69</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">112</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP0</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">0</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">70</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">120</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP1</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">1</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">71</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">128</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">72</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">135</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">63</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">cpu_sdma</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">136</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">73</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">cpu_sdma</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">137</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">74</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">cpu_sdma</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">138</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">75</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">cpu_sdma</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">139</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+      </askboardplt:portMap-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">7</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">1</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">6</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">0</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">5</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">3</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">4</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">2</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">8</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">14</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">9</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">15</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">10</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">12</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">11</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">13</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">23</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">17</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">22</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">16</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">21</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">19</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">20</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">18</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">24</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">30</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">25</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">31</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">26</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">28</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">27</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">29</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">39</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">33</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">38</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">32</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">37</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">35</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">36</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">34</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">40</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">41</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">46</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">47</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">42</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">44</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">43</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">45</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">55</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">49</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">54</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">48</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">53</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">51</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">52</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">50</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">56</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">62</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">57</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">63</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">58</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">60</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">59</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">61</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">71</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">65</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">70</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">64</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">69</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">67</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">68</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">66</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">72</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">78</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">73</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">79</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">74</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">76</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">75</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">77</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">87</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">81</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">86</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">80</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">85</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">83</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">84</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">82</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">88</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">94</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">89</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">95</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">90</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">92</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">91</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">93</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">103</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">97</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">102</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">96</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">101</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">99</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">100</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">98</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">104</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">110</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">105</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">111</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">106</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">108</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">107</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">109</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">119</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">113</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">118</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">112</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">117</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">115</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">116</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">114</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">120</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">126</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">121</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">127</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">122</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">124</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">123</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">125</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">128</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">135</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:Ledstream-interface-list>
+        <askboardplt:ledstream-interface-number askboardplt:type="led-interface-type">0</askboardplt:ledstream-interface-number>
+        <askboardplt:ledstream-configSet>
+          <askboardplt:ledOrganize askboardplt:type="led-stream-order-mode-type">ORDER_MODE_BY_CLASS</askboardplt:ledOrganize>
+          <askboardplt:blink0DutyCycle askboardplt:type="led-stream-blink-duty-cycle-type">BLINK_DUTY_CYCLE_0</askboardplt:blink0DutyCycle>
+          <askboardplt:blink0Duration askboardplt:type="led-stream-blink-duration-type">BLINK_DURATION_0</askboardplt:blink0Duration>
+          <askboardplt:blink1DutyCycle askboardplt:type="led-stream-blink-duty-cycle-type">BLINK_DUTY_CYCLE_0</askboardplt:blink1DutyCycle>
+          <askboardplt:blink1Duration askboardplt:type="led-stream-blink-duration-type">BLINK_DURATION_1</askboardplt:blink1Duration>
+          <askboardplt:pulseStretch askboardplt:type="led-stream-pulse-stretch-type">PULSE_STRETCH_1</askboardplt:pulseStretch>
+          <askboardplt:invertEnable askboardplt:type="boolean-type">false</askboardplt:invertEnable>
+          <askboardplt:SIP6ledClockFrequency askboardplt:type="led-stream-clock-frequency-type">1627</askboardplt:SIP6ledClockFrequency>
+          <askboardplt:ledClockPosEdgeModeEnable askboardplt:type="boolean-type">false</askboardplt:ledClockPosEdgeModeEnable>
+          <askboardplt:ledUnit-List>
+            <askboardplt:ledUnit askboardplt:type="led-unit-type">1</askboardplt:ledUnit>
+            <askboardplt:ledStart askboardplt:type="uint32">64</askboardplt:ledStart>
+            <askboardplt:ledEnd askboardplt:type="uint32">66</askboardplt:ledEnd>
+            <askboardplt:ledChainBypass askboardplt:type="boolean-type">false</askboardplt:ledChainBypass>
+          </askboardplt:ledUnit-List>
+          <askboardplt:ledUnit-List>
+            <askboardplt:ledUnit askboardplt:type="led-unit-type">2</askboardplt:ledUnit>
+            <askboardplt:ledStart askboardplt:type="uint32">64</askboardplt:ledStart>
+            <askboardplt:ledEnd askboardplt:type="uint32">65</askboardplt:ledEnd>
+            <askboardplt:ledChainBypass askboardplt:type="boolean-type">false</askboardplt:ledChainBypass>
+          </askboardplt:ledUnit-List>
+          <askboardplt:ledUnit-List>
+            <askboardplt:ledUnit askboardplt:type="led-unit-type">3</askboardplt:ledUnit>
+            <askboardplt:ledStart askboardplt:type="uint32">64</askboardplt:ledStart>
+            <askboardplt:ledEnd askboardplt:type="uint32">65</askboardplt:ledEnd>
+            <askboardplt:ledChainBypass askboardplt:type="boolean-type">false</askboardplt:ledChainBypass>
+          </askboardplt:ledUnit-List>
+          <askboardplt:ledUnit-List>
+            <askboardplt:ledUnit askboardplt:type="led-unit-type">4</askboardplt:ledUnit>
+            <askboardplt:ledStart askboardplt:type="uint32">64</askboardplt:ledStart>
+            <askboardplt:ledEnd askboardplt:type="uint32">66</askboardplt:ledEnd>
+            <askboardplt:ledChainBypass askboardplt:type="boolean-type">false</askboardplt:ledChainBypass>
+          </askboardplt:ledUnit-List>
+          <askboardplt:ledUnit-List>
+            <askboardplt:ledUnit askboardplt:type="led-unit-type">5</askboardplt:ledUnit>
+            <askboardplt:ledStart askboardplt:type="uint32">64</askboardplt:ledStart>
+            <askboardplt:ledEnd askboardplt:type="uint32">66</askboardplt:ledEnd>
+            <askboardplt:ledChainBypass askboardplt:type="boolean-type">false</askboardplt:ledChainBypass>
+          </askboardplt:ledUnit-List>
+          <askboardplt:ledUnit-List>
+            <askboardplt:ledUnit askboardplt:type="led-unit-type">6</askboardplt:ledUnit>
+            <askboardplt:ledStart askboardplt:type="uint32">64</askboardplt:ledStart>
+            <askboardplt:ledEnd askboardplt:type="uint32">65</askboardplt:ledEnd>
+            <askboardplt:ledChainBypass askboardplt:type="boolean-type">false</askboardplt:ledChainBypass>
+          </askboardplt:ledUnit-List>
+          <askboardplt:ledUnit-List>
+            <askboardplt:ledUnit askboardplt:type="led-unit-type">7</askboardplt:ledUnit>
+            <askboardplt:ledStart askboardplt:type="uint32">64</askboardplt:ledStart>
+            <askboardplt:ledEnd askboardplt:type="uint32">65</askboardplt:ledEnd>
+            <askboardplt:ledChainBypass askboardplt:type="boolean-type">false</askboardplt:ledChainBypass>
+          </askboardplt:ledUnit-List>
+          <askboardplt:ledUnit-List>
+            <askboardplt:ledUnit askboardplt:type="led-unit-type">8</askboardplt:ledUnit>
+            <askboardplt:ledStart askboardplt:type="uint32">64</askboardplt:ledStart>
+            <askboardplt:ledEnd askboardplt:type="uint32">66</askboardplt:ledEnd>
+            <askboardplt:ledChainBypass askboardplt:type="boolean-type">false</askboardplt:ledChainBypass>
+          </askboardplt:ledUnit-List>
+        </askboardplt:ledstream-configSet>
+        <askboardplt:ledstream-class-manipulation-list>
+          <askboardplt:classNum askboardplt:type="led-class-num-type">0</askboardplt:classNum>
+          <askboardplt:portType askboardplt:type="led-stream-port-type">PORT_TYPE_XG</askboardplt:portType>
+          <askboardplt:blinkEnable askboardplt:type="boolean-type">false</askboardplt:blinkEnable>
+          <askboardplt:blinkSelect askboardplt:type="led-stream-blink-select-type">BLINK_SELECT_0</askboardplt:blinkSelect>
+          <askboardplt:forceEnable askboardplt:type="boolean-type">false</askboardplt:forceEnable>
+          <askboardplt:pulseStretchEnable askboardplt:type="boolean-type">true</askboardplt:pulseStretchEnable>
+          <askboardplt:disableOnLinkDown askboardplt:type="boolean-type">false</askboardplt:disableOnLinkDown>
+        </askboardplt:ledstream-class-manipulation-list>
+        <askboardplt:ledstream-class-manipulation-list>
+          <askboardplt:classNum askboardplt:type="led-class-num-type">1</askboardplt:classNum>
+          <askboardplt:portType askboardplt:type="led-stream-port-type">PORT_TYPE_XG</askboardplt:portType>
+          <askboardplt:blinkEnable askboardplt:type="boolean-type">false</askboardplt:blinkEnable>
+          <askboardplt:blinkSelect askboardplt:type="led-stream-blink-select-type">BLINK_SELECT_0</askboardplt:blinkSelect>
+          <askboardplt:forceEnable askboardplt:type="boolean-type">false</askboardplt:forceEnable>
+          <askboardplt:pulseStretchEnable askboardplt:type="boolean-type">true</askboardplt:pulseStretchEnable>
+          <askboardplt:disableOnLinkDown askboardplt:type="boolean-type">false</askboardplt:disableOnLinkDown>
+        </askboardplt:ledstream-class-manipulation-list>
+        <askboardplt:ledstream-class-manipulation-list>
+          <askboardplt:classNum askboardplt:type="led-class-num-type">2</askboardplt:classNum>
+          <askboardplt:portType askboardplt:type="led-stream-port-type">PORT_TYPE_XG</askboardplt:portType>
+          <askboardplt:blinkEnable askboardplt:type="boolean-type">true</askboardplt:blinkEnable>
+          <askboardplt:blinkSelect askboardplt:type="led-stream-blink-select-type">BLINK_SELECT_0</askboardplt:blinkSelect>
+          <askboardplt:forceEnable askboardplt:type="boolean-type">false</askboardplt:forceEnable>
+          <askboardplt:pulseStretchEnable askboardplt:type="boolean-type">true</askboardplt:pulseStretchEnable>
+          <askboardplt:disableOnLinkDown askboardplt:type="boolean-type">true</askboardplt:disableOnLinkDown>
+        </askboardplt:ledstream-class-manipulation-list>
+        <askboardplt:ledstream-class-manipulation-list>
+          <askboardplt:classNum askboardplt:type="led-class-num-type">3</askboardplt:classNum>
+          <askboardplt:portType askboardplt:type="led-stream-port-type">PORT_TYPE_XG</askboardplt:portType>
+          <askboardplt:blinkEnable askboardplt:type="boolean-type">false</askboardplt:blinkEnable>
+          <askboardplt:blinkSelect askboardplt:type="led-stream-blink-select-type">BLINK_SELECT_0</askboardplt:blinkSelect>
+          <askboardplt:forceEnable askboardplt:type="boolean-type">false</askboardplt:forceEnable>
+          <askboardplt:pulseStretchEnable askboardplt:type="boolean-type">true</askboardplt:pulseStretchEnable>
+          <askboardplt:disableOnLinkDown askboardplt:type="boolean-type">false</askboardplt:disableOnLinkDown>
+        </askboardplt:ledstream-class-manipulation-list>
+        <askboardplt:ledstream-class-manipulation-list>
+          <askboardplt:classNum askboardplt:type="led-class-num-type">4</askboardplt:classNum>
+          <askboardplt:portType askboardplt:type="led-stream-port-type">PORT_TYPE_XG</askboardplt:portType>
+          <askboardplt:blinkEnable askboardplt:type="boolean-type">false</askboardplt:blinkEnable>
+          <askboardplt:blinkSelect askboardplt:type="led-stream-blink-select-type">BLINK_SELECT_0</askboardplt:blinkSelect>
+          <askboardplt:forceEnable askboardplt:type="boolean-type">false</askboardplt:forceEnable>
+          <askboardplt:pulseStretchEnable askboardplt:type="boolean-type">true</askboardplt:pulseStretchEnable>
+          <askboardplt:disableOnLinkDown askboardplt:type="boolean-type">false</askboardplt:disableOnLinkDown>
+        </askboardplt:ledstream-class-manipulation-list>
+        <askboardplt:ledstream-class-manipulation-list>
+          <askboardplt:classNum askboardplt:type="led-class-num-type">5</askboardplt:classNum>
+          <askboardplt:portType askboardplt:type="led-stream-port-type">PORT_TYPE_XG</askboardplt:portType>
+          <askboardplt:blinkEnable askboardplt:type="boolean-type">false</askboardplt:blinkEnable>
+          <askboardplt:blinkSelect askboardplt:type="led-stream-blink-select-type">BLINK_SELECT_0</askboardplt:blinkSelect>
+          <askboardplt:forceEnable askboardplt:type="boolean-type">false</askboardplt:forceEnable>
+          <askboardplt:pulseStretchEnable askboardplt:type="boolean-type">true</askboardplt:pulseStretchEnable>
+          <askboardplt:disableOnLinkDown askboardplt:type="boolean-type">false</askboardplt:disableOnLinkDown>
+        </askboardplt:ledstream-class-manipulation-list>
+      </askboardplt:Ledstream-interface-list>
+    </askboardplt:device-list>
+    <askboardplt:UDSFilePath askboardplt:type="std-string">/tmp/cpss_uds</askboardplt:UDSFilePath>
+    <askboardplt:serdesMux>
+      <askboardplt:serdesMuxSchemePortMod askboardplt:type="uint32">8</askboardplt:serdesMuxSchemePortMod>
+      <askboardplt:serdesMuxSchemeList>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP0</askboardplt:serdesMuxScheme>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">7</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">1</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">6</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">0</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">5</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">3</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">4</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">2</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+      </askboardplt:serdesMuxSchemeList>
+      <askboardplt:serdesMuxSchemeList>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP1</askboardplt:serdesMuxScheme>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">0</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">6</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">1</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">7</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">2</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">4</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">3</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">5</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+      </askboardplt:serdesMuxSchemeList>
+    </askboardplt:serdesMux>
+  </askboardplt:ASK-Board>
+</data>
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FALCON_DB/ASK-L1-F6_4T-DB.md5 b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FALCON_DB/ASK-L1-F6_4T-DB.md5
new file mode 100644
index 000000000..5e201dca8
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FALCON_DB/ASK-L1-F6_4T-DB.md5
@@ -0,0 +1 @@
+ce74a7780c98ac3f53f39cb7e2564ae6
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FALCON_DB/ASK-L1-F6_4T-DB.xml b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FALCON_DB/ASK-L1-F6_4T-DB.xml
new file mode 100644
index 000000000..52d534122
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FALCON_DB/ASK-L1-F6_4T-DB.xml
@@ -0,0 +1,1560 @@
+<?xml version="1.0" encoding="utf-8"?>
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-02-19-1.06" profile="Askl1" sid="71d3ab0f-3ac2-452a-a5c9-2dfdc969734a">
+  <ASKL1plt:ASK-L1 xmlns:ASKL1plt="urn:marvell:ASKL1:yang">
+    <ASKL1plt:typedefs>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>interface-mode-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Specifies supported Interface modes</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>1000BASE_X</ASKL1plt:name>
+          <ASKL1plt:description>1G</ASKL1plt:description>
+          <ASKL1plt:value>6</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>SGMII</ASKL1plt:name>
+          <ASKL1plt:description>1G , 2.5G</ASKL1plt:description>
+          <ASKL1plt:value>3</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>QSGMII</ASKL1plt:name>
+          <ASKL1plt:description>1G</ASKL1plt:description>
+          <ASKL1plt:value>13</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>KR</ASKL1plt:name>
+          <ASKL1plt:description>10G, 12G, 20G, 40G, 100G</ASKL1plt:description>
+          <ASKL1plt:value>16</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>SR_LR</ASKL1plt:name>
+          <ASKL1plt:description>5G, 10G, 12G, 20G, 40G</ASKL1plt:description>
+          <ASKL1plt:value>20</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>KR2</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>27</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>KR4</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>28</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>SR_LR2</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>29</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>SR_LR4</ASKL1plt:name>
+          <ASKL1plt:description>100G</ASKL1plt:description>
+          <ASKL1plt:value>30</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>KR_C</ASKL1plt:name>
+          <ASKL1plt:description>CONSORTIUM - 25G</ASKL1plt:description>
+          <ASKL1plt:value>32</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>CR_C</ASKL1plt:name>
+          <ASKL1plt:description>CONSORTIUM - 25G</ASKL1plt:description>
+          <ASKL1plt:value>33</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>KR2_C</ASKL1plt:name>
+          <ASKL1plt:description>CONSORTIUM - 50G</ASKL1plt:description>
+          <ASKL1plt:value>34</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>CR2_C</ASKL1plt:name>
+          <ASKL1plt:description>CONSORTIUM - 50G</ASKL1plt:description>
+          <ASKL1plt:value>35</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>CR</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>36</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>CR2</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>37</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>CR4</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>38</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>KR_S</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>39</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>CR_S</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>40</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>KR8</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>41</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>CR8</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>42</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>SR_LR8</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>43</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>USX_10G_QXGMII</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>51</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>USX_20G_QXGMII</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>52</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>USX_OUSGMII</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>53</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>USX_20G_OXGMII</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>54</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>NA</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>57</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>port-speed-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Specifies supported speeds</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>1G</ASKL1plt:name>
+          <ASKL1plt:description>1G</ASKL1plt:description>
+          <ASKL1plt:value>2</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>10G</ASKL1plt:name>
+          <ASKL1plt:description>10G</ASKL1plt:description>
+          <ASKL1plt:value>3</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>2500M</ASKL1plt:name>
+          <ASKL1plt:description>2.5G</ASKL1plt:description>
+          <ASKL1plt:value>5</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>5G</ASKL1plt:name>
+          <ASKL1plt:description>5G</ASKL1plt:description>
+          <ASKL1plt:value>6</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>25G</ASKL1plt:name>
+          <ASKL1plt:description>25G, used in combination with CPSS_PORT_INTERFACE_MODE_KR_E, CPSS_PORT_INTERFACE_MODE_KR2_E</ASKL1plt:description>
+          <ASKL1plt:value>21</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>40G</ASKL1plt:name>
+          <ASKL1plt:description>40G</ASKL1plt:description>
+          <ASKL1plt:value>9</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>50G</ASKL1plt:name>
+          <ASKL1plt:description>50G</ASKL1plt:description>
+          <ASKL1plt:value>14</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>100G</ASKL1plt:name>
+          <ASKL1plt:description>100G</ASKL1plt:description>
+          <ASKL1plt:value>13</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>200G</ASKL1plt:name>
+          <ASKL1plt:description>200G</ASKL1plt:description>
+          <ASKL1plt:value>24</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>400G</ASKL1plt:name>
+          <ASKL1plt:description>400G</ASKL1plt:description>
+          <ASKL1plt:value>25</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>NA</ASKL1plt:name>
+          <ASKL1plt:description>NA</ASKL1plt:description>
+          <ASKL1plt:value>35</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>fec-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Rx parameter type</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>enabled</ASKL1plt:name>
+          <ASKL1plt:description>Enabled</ASKL1plt:description>
+          <ASKL1plt:value>0</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>disabled</ASKL1plt:name>
+          <ASKL1plt:description>Disabled</ASKL1plt:description>
+          <ASKL1plt:value>1</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rs_enabled</ASKL1plt:name>
+          <ASKL1plt:description>RS FEC enabled</ASKL1plt:description>
+          <ASKL1plt:value>2</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>both_enabled</ASKL1plt:name>
+          <ASKL1plt:description>Both enabled</ASKL1plt:description>
+          <ASKL1plt:value>3</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rs_544_514_enabled</ASKL1plt:name>
+          <ASKL1plt:description>RS FEC 544 and 514</ASKL1plt:description>
+          <ASKL1plt:value>4</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>physical-port-num-type</ASKL1plt:name>
+        <ASKL1plt:type>uint32</ASKL1plt:type>
+        <ASKL1plt:description>PHYSICAL PORT NUM</ASKL1plt:description>
+        <ASKL1plt:min>0</ASKL1plt:min>
+        <ASKL1plt:max>1023</ASKL1plt:max>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>tx-param-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Tx parameter type</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>atten</ASKL1plt:name>
+          <ASKL1plt:description>atten</ASKL1plt:description>
+          <ASKL1plt:value>0</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>post</ASKL1plt:name>
+          <ASKL1plt:description>post</ASKL1plt:description>
+          <ASKL1plt:value>1</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>pre</ASKL1plt:name>
+          <ASKL1plt:description>pre</ASKL1plt:description>
+          <ASKL1plt:value>2</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>pre2</ASKL1plt:name>
+          <ASKL1plt:description>pre2</ASKL1plt:description>
+          <ASKL1plt:value>3</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>pre3</ASKL1plt:name>
+          <ASKL1plt:description>pre3</ASKL1plt:description>
+          <ASKL1plt:value>4</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>peak</ASKL1plt:name>
+          <ASKL1plt:description>peak</ASKL1plt:description>
+          <ASKL1plt:value>5</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>main</ASKL1plt:name>
+          <ASKL1plt:description>main</ASKL1plt:description>
+          <ASKL1plt:value>6</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>txAmpAdjEn</ASKL1plt:name>
+          <ASKL1plt:description>txAmpAdjEn</ASKL1plt:description>
+          <ASKL1plt:value>7</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>emph0</ASKL1plt:name>
+          <ASKL1plt:description>emph0</ASKL1plt:description>
+          <ASKL1plt:value>8</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>emph1</ASKL1plt:name>
+          <ASKL1plt:description>emph1</ASKL1plt:description>
+          <ASKL1plt:value>9</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>txAmpShft</ASKL1plt:name>
+          <ASKL1plt:description>txAmpShft</ASKL1plt:description>
+          <ASKL1plt:value>10</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>txEmphEn</ASKL1plt:name>
+          <ASKL1plt:description>txEmphEn</ASKL1plt:description>
+          <ASKL1plt:value>11</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>txEmphEn1</ASKL1plt:name>
+          <ASKL1plt:description>txEmphEn1</ASKL1plt:description>
+          <ASKL1plt:value>12</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>txAmpAdj</ASKL1plt:name>
+          <ASKL1plt:description>txAmpAdj</ASKL1plt:description>
+          <ASKL1plt:value>13</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>slewCtrlEn</ASKL1plt:name>
+          <ASKL1plt:description>slewCtrlEn</ASKL1plt:description>
+          <ASKL1plt:value>14</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>slewRate</ASKL1plt:name>
+          <ASKL1plt:description>slewRate</ASKL1plt:description>
+          <ASKL1plt:value>15</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>rx-param-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Rx parameter type</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>sqlch</ASKL1plt:name>
+          <ASKL1plt:description>sqlch</ASKL1plt:description>
+          <ASKL1plt:value>0</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>DC</ASKL1plt:name>
+          <ASKL1plt:description>DC</ASKL1plt:description>
+          <ASKL1plt:value>1</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>LF</ASKL1plt:name>
+          <ASKL1plt:description>LF</ASKL1plt:description>
+          <ASKL1plt:value>2</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>HF</ASKL1plt:name>
+          <ASKL1plt:description>HF</ASKL1plt:description>
+          <ASKL1plt:value>3</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>gainShape1</ASKL1plt:name>
+          <ASKL1plt:description>gainShape1</ASKL1plt:description>
+          <ASKL1plt:value>4</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>gainShape2</ASKL1plt:name>
+          <ASKL1plt:description>gainShape2</ASKL1plt:description>
+          <ASKL1plt:value>5</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>shortChannelEn</ASKL1plt:name>
+          <ASKL1plt:description>shortChannelEn</ASKL1plt:description>
+          <ASKL1plt:value>7</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>bfLf</ASKL1plt:name>
+          <ASKL1plt:description>bfLf</ASKL1plt:description>
+          <ASKL1plt:value>8</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>bfHf</ASKL1plt:name>
+          <ASKL1plt:description>bfHf</ASKL1plt:description>
+          <ASKL1plt:value>9</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>minLf</ASKL1plt:name>
+          <ASKL1plt:description>minLf</ASKL1plt:description>
+          <ASKL1plt:value>10</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>maxLf</ASKL1plt:name>
+          <ASKL1plt:description>maxLf</ASKL1plt:description>
+          <ASKL1plt:value>11</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>minHf</ASKL1plt:name>
+          <ASKL1plt:description>minHf</ASKL1plt:description>
+          <ASKL1plt:value>12</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>maxHf</ASKL1plt:name>
+          <ASKL1plt:description>maxHf</ASKL1plt:description>
+          <ASKL1plt:value>13</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>minPre1</ASKL1plt:name>
+          <ASKL1plt:description>minPre1</ASKL1plt:description>
+          <ASKL1plt:value>14</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>maxPre1</ASKL1plt:name>
+          <ASKL1plt:description>maxPre1</ASKL1plt:description>
+          <ASKL1plt:value>15</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>minPre2</ASKL1plt:name>
+          <ASKL1plt:description>minPre2</ASKL1plt:description>
+          <ASKL1plt:value>16</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>maxPre2</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>17</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>minPost</ASKL1plt:name>
+          <ASKL1plt:description>minPost</ASKL1plt:description>
+          <ASKL1plt:value>18</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>maxPost</ASKL1plt:name>
+          <ASKL1plt:description>maxPost</ASKL1plt:description>
+          <ASKL1plt:value>19</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>squelch</ASKL1plt:name>
+          <ASKL1plt:description>squelch</ASKL1plt:description>
+          <ASKL1plt:value>20</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>termination</ASKL1plt:name>
+          <ASKL1plt:description>termination</ASKL1plt:description>
+          <ASKL1plt:value>27</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>coldEnvelope</ASKL1plt:name>
+          <ASKL1plt:description>coldEnvelope</ASKL1plt:description>
+          <ASKL1plt:value>35</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>hotEnvelope</ASKL1plt:name>
+          <ASKL1plt:description>hotEnvelope</ASKL1plt:description>
+          <ASKL1plt:value>36</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>dcGain</ASKL1plt:name>
+          <ASKL1plt:description>dcGain</ASKL1plt:description>
+          <ASKL1plt:value>37</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>bandWidth</ASKL1plt:name>
+          <ASKL1plt:description>bandWidth</ASKL1plt:description>
+          <ASKL1plt:value>38</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>dfe</ASKL1plt:name>
+          <ASKL1plt:description>dfe</ASKL1plt:description>
+          <ASKL1plt:value>39</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>ffeR</ASKL1plt:name>
+          <ASKL1plt:description>ffeR</ASKL1plt:description>
+          <ASKL1plt:value>40</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>ffeC</ASKL1plt:name>
+          <ASKL1plt:description>ffeC</ASKL1plt:description>
+          <ASKL1plt:value>41</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>sampler</ASKL1plt:name>
+          <ASKL1plt:description>sampler</ASKL1plt:description>
+          <ASKL1plt:value>42</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>align90</ASKL1plt:name>
+          <ASKL1plt:description>align90</ASKL1plt:description>
+          <ASKL1plt:value>43</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>ffeS</ASKL1plt:name>
+          <ASKL1plt:description>ffeS</ASKL1plt:description>
+          <ASKL1plt:value>44</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>resSel</ASKL1plt:name>
+          <ASKL1plt:description>resSel</ASKL1plt:description>
+          <ASKL1plt:value>45</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>resShift</ASKL1plt:name>
+          <ASKL1plt:description>resShift</ASKL1plt:description>
+          <ASKL1plt:value>46</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>capSel</ASKL1plt:name>
+          <ASKL1plt:description>capSel</ASKL1plt:description>
+          <ASKL1plt:value>47</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>ffeSettingForce</ASKL1plt:name>
+          <ASKL1plt:description>ffeSettingForce</ASKL1plt:description>
+          <ASKL1plt:value>48</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>adaptedResSel</ASKL1plt:name>
+          <ASKL1plt:description>adaptedResSel</ASKL1plt:description>
+          <ASKL1plt:value>49</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>adaptedCapSel</ASKL1plt:name>
+          <ASKL1plt:description>adaptedCapSel</ASKL1plt:description>
+          <ASKL1plt:value>50</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>selmufi</ASKL1plt:name>
+          <ASKL1plt:description>selmufi</ASKL1plt:description>
+          <ASKL1plt:value>51</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>selmuff</ASKL1plt:name>
+          <ASKL1plt:description>selmuff</ASKL1plt:description>
+          <ASKL1plt:value>52</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>selmupi</ASKL1plt:name>
+          <ASKL1plt:description>selmupi</ASKL1plt:description>
+          <ASKL1plt:value>53</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>selmupf</ASKL1plt:name>
+          <ASKL1plt:description>selmupf</ASKL1plt:description>
+          <ASKL1plt:value>54</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>slewRateCtrl0</ASKL1plt:name>
+          <ASKL1plt:description>slewRateCtrl0</ASKL1plt:description>
+          <ASKL1plt:value>55</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>slewRateCtrl1</ASKL1plt:name>
+          <ASKL1plt:description>slewRateCtrl1</ASKL1plt:description>
+          <ASKL1plt:value>56</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>EO</ASKL1plt:name>
+          <ASKL1plt:description>EO</ASKL1plt:description>
+          <ASKL1plt:value>57</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>dataRate</ASKL1plt:name>
+          <ASKL1plt:description>dataRate</ASKL1plt:description>
+          <ASKL1plt:value>58</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>res1Sel</ASKL1plt:name>
+          <ASKL1plt:description>res1Sel</ASKL1plt:description>
+          <ASKL1plt:value>59</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>res2Sel</ASKL1plt:name>
+          <ASKL1plt:description>res2Sel</ASKL1plt:description>
+          <ASKL1plt:value>60</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>cap1Sel</ASKL1plt:name>
+          <ASKL1plt:description>cap1Sel</ASKL1plt:description>
+          <ASKL1plt:value>61</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>cap2Sel</ASKL1plt:name>
+          <ASKL1plt:description>cap2Sel</ASKL1plt:description>
+          <ASKL1plt:value>62</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>midpointLargeThresKLane</ASKL1plt:name>
+          <ASKL1plt:description>midpointLargeThresKLane</ASKL1plt:description>
+          <ASKL1plt:value>63</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>midpointSmallThresKLane</ASKL1plt:name>
+          <ASKL1plt:description>midpointSmallThresKLane</ASKL1plt:description>
+          <ASKL1plt:value>64</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>midpointLargeThresCLane</ASKL1plt:name>
+          <ASKL1plt:description>midpointLargeThresCLane</ASKL1plt:description>
+          <ASKL1plt:value>65</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>midpointSmallThresCLane</ASKL1plt:name>
+          <ASKL1plt:description>midpointSmallThresCLane</ASKL1plt:description>
+          <ASKL1plt:value>66</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>dfeResF0aHighThresInitLane</ASKL1plt:name>
+          <ASKL1plt:description>dfeResF0aHighThresInitLane</ASKL1plt:description>
+          <ASKL1plt:value>67</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>dfeResF0aHighThresEndLane</ASKL1plt:name>
+          <ASKL1plt:description>dfeResF0aHighThresEndLane</ASKL1plt:description>
+          <ASKL1plt:value>68</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>current1Sel</ASKL1plt:name>
+          <ASKL1plt:description>current1Sel</ASKL1plt:description>
+          <ASKL1plt:value>69</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rl1Sel</ASKL1plt:name>
+          <ASKL1plt:description>rl1Sel</ASKL1plt:description>
+          <ASKL1plt:value>70</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rl1Extra</ASKL1plt:name>
+          <ASKL1plt:description>rl1Extra</ASKL1plt:description>
+          <ASKL1plt:value>71</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>cl1Ctrl</ASKL1plt:name>
+          <ASKL1plt:description>cl1Ctrl</ASKL1plt:description>
+          <ASKL1plt:value>72</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>enMidFreq</ASKL1plt:name>
+          <ASKL1plt:description>enMidFreq</ASKL1plt:description>
+          <ASKL1plt:value>73</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>cs1Mid</ASKL1plt:name>
+          <ASKL1plt:description>cs1Mid</ASKL1plt:description>
+          <ASKL1plt:value>74</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rs1Mid</ASKL1plt:name>
+          <ASKL1plt:description>rs1Mid</ASKL1plt:description>
+          <ASKL1plt:value>75</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rfCtrl</ASKL1plt:name>
+          <ASKL1plt:description>rfCtrl</ASKL1plt:description>
+          <ASKL1plt:value>76</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rl1TiaSel</ASKL1plt:name>
+          <ASKL1plt:description>rl1TiaSel</ASKL1plt:description>
+          <ASKL1plt:value>77</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rl1TiaExtra</ASKL1plt:name>
+          <ASKL1plt:description>rl1TiaExtra</ASKL1plt:description>
+          <ASKL1plt:value>78</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>hpfRSel1st</ASKL1plt:name>
+          <ASKL1plt:description>hpfRSel1st</ASKL1plt:description>
+          <ASKL1plt:value>79</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>current1TiaSel</ASKL1plt:name>
+          <ASKL1plt:description>current1TiaSel</ASKL1plt:description>
+          <ASKL1plt:value>80</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rl2Tune</ASKL1plt:name>
+          <ASKL1plt:description>rl2Tune</ASKL1plt:description>
+          <ASKL1plt:value>81</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rl2Sel</ASKL1plt:name>
+          <ASKL1plt:description>rl2Sel</ASKL1plt:description>
+          <ASKL1plt:value>82</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rs2Sel</ASKL1plt:name>
+          <ASKL1plt:description>rs2Sel</ASKL1plt:description>
+          <ASKL1plt:value>83</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>current2Sel</ASKL1plt:name>
+          <ASKL1plt:description>current2Sel</ASKL1plt:description>
+          <ASKL1plt:value>84</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>hpfRsel2nd</ASKL1plt:name>
+          <ASKL1plt:description>hpfRsel2nd</ASKL1plt:description>
+          <ASKL1plt:value>85</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>BW</ASKL1plt:name>
+          <ASKL1plt:description>BW</ASKL1plt:description>
+          <ASKL1plt:value>86</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>dfeGAIN</ASKL1plt:name>
+          <ASKL1plt:description>dfeGAIN</ASKL1plt:description>
+          <ASKL1plt:value>87</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>dfeGAIN2</ASKL1plt:name>
+          <ASKL1plt:description>dfeGAIN2</ASKL1plt:description>
+          <ASKL1plt:value>88</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>pre1</ASKL1plt:name>
+          <ASKL1plt:description>pre1</ASKL1plt:description>
+          <ASKL1plt:value>89</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>pre2</ASKL1plt:name>
+          <ASKL1plt:description>pre2</ASKL1plt:description>
+          <ASKL1plt:value>90</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>post1</ASKL1plt:name>
+          <ASKL1plt:description>post1</ASKL1plt:description>
+          <ASKL1plt:value>91</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>boolean-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Boolean 32 bits , due to bing endian</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>false</ASKL1plt:name>
+          <ASKL1plt:description>False</ASKL1plt:description>
+          <ASKL1plt:value>0</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>true</ASKL1plt:name>
+          <ASKL1plt:description>True</ASKL1plt:description>
+          <ASKL1plt:value>1</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>serdes-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Serdes Type</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>NA</ASKL1plt:name>
+          <ASKL1plt:description>No serdes</ASKL1plt:description>
+          <ASKL1plt:value>0</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>AVAGO</ASKL1plt:name>
+          <ASKL1plt:description>AVAGO</ASKL1plt:description>
+          <ASKL1plt:value>1</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>COMPHY</ASKL1plt:name>
+          <ASKL1plt:description>COMPHY</ASKL1plt:description>
+          <ASKL1plt:value>2</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>COMPHY_C12G</ASKL1plt:name>
+          <ASKL1plt:description>COMPHY_C12G</ASKL1plt:description>
+          <ASKL1plt:value>3</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>COMPHY_C28G</ASKL1plt:name>
+          <ASKL1plt:description>COMPHY_C28G</ASKL1plt:description>
+          <ASKL1plt:value>4</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>COMPHY_C112G</ASKL1plt:name>
+          <ASKL1plt:description>COMPHY_C112G</ASKL1plt:description>
+          <ASKL1plt:value>5</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>uint8-type</ASKL1plt:name>
+        <ASKL1plt:type>uint32</ASKL1plt:type>
+        <ASKL1plt:description>Uint8 32 bits , due to bing endian</ASKL1plt:description>
+        <ASKL1plt:min>0</ASKL1plt:min>
+        <ASKL1plt:max>255</ASKL1plt:max>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>serdes-termination-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>RX termination mode</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>GND</ASKL1plt:name>
+          <ASKL1plt:description>Enabled</ASKL1plt:description>
+          <ASKL1plt:value>0</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>VDD</ASKL1plt:name>
+          <ASKL1plt:description>Disabled</ASKL1plt:description>
+          <ASKL1plt:value>1</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>FLOATING</ASKL1plt:name>
+          <ASKL1plt:description>RS FEC enabled</ASKL1plt:description>
+          <ASKL1plt:value>2</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>port-interconnect-profile-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Enumerator of interconnect profile.</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>profile_default</ASKL1plt:name>
+          <ASKL1plt:description>Profile Default</ASKL1plt:description>
+          <ASKL1plt:value>0</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>profile_1</ASKL1plt:name>
+          <ASKL1plt:description>Profile 1</ASKL1plt:description>
+          <ASKL1plt:value>1</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>profile_2</ASKL1plt:name>
+          <ASKL1plt:description>Profile 2</ASKL1plt:description>
+          <ASKL1plt:value>2</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+    </ASKL1plt:typedefs>
+    <ASKL1plt:IfModeName>
+      <ASKL1plt:ifModeNameList>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR2</ASKL1plt:ifModeName>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">CR2</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">100G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">KR2</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">100G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">SR_LR2</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">100G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">SR_LR2</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">50G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">CR2</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">50G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">KR2</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">50G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">CR2</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">100G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">KR2</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">100G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">CR2</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">50G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">KR2</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">50G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+      </ASKL1plt:ifModeNameList>
+      <ASKL1plt:ifModeNameList>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:ifModeName>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">CR4</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">100G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">KR4</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">100G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">SR_LR4</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">100G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">CR4</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">100G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">KR4</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">100G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+      </ASKL1plt:ifModeNameList>
+      <ASKL1plt:ifModeNameList>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">10GR1</ASKL1plt:ifModeName>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">KR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">10G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">SR_LR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">10G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">KR</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">10G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+      </ASKL1plt:ifModeNameList>
+      <ASKL1plt:ifModeNameList>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">10GR1Fix</ASKL1plt:ifModeName>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">KR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">10G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">disabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+      </ASKL1plt:ifModeNameList>
+      <ASKL1plt:ifModeNameList>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">200GR4</ASKL1plt:ifModeName>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">CR4</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">200G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">SR_LR4</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">100G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">KR4</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">100G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">CR4</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">100G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">KR4</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">200G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">SR_LR4</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">200G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">CR4</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">200G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">KR4</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">200G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">CR4</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">100G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">KR4</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">100G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+      </ASKL1plt:ifModeNameList>
+      <ASKL1plt:ifModeNameList>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">CR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">25G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">KR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">25G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">KR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">10G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">SR_LR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">25G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">SR_LR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">10G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">CR</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">25G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">KR</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">25G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">KR</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">10G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+      </ASKL1plt:ifModeNameList>
+      <ASKL1plt:ifModeNameList>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">400GR8</ASKL1plt:ifModeName>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">CR8</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">400G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">KR8</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">400G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">SR_LR8</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">400G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">CR8</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">400G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">KR8</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">400G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+      </ASKL1plt:ifModeNameList>
+      <ASKL1plt:ifModeNameList>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">CR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">50G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">KR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">50G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">CR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">25G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">KR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">25G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">KR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">10G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">SR_LR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">50G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">SR_LR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">25G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">SR_LR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">10G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">CR</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">50G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">KR</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">50G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">CR</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">25G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">KR</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">25G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">KR</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">10G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+      </ASKL1plt:ifModeNameList>
+    </ASKL1plt:IfModeName>
+    <ASKL1plt:Port>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">0</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">10GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">1</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">10GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">2</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">10GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">3</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">10GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">4</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">10GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">5</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">10GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">6</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">10GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">7</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">10GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">8</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">10GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">9</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">10GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">10</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">10GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">11</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">10GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">12</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">10GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">13</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">10GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">14</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">10GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">15</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">10GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">16</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">17</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">18</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">19</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">20</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">21</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">22</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">23</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">24</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">25</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">26</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">27</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">28</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">29</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">30</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">31</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">32</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">33</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">34</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">35</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">36</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">37</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">38</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">39</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">40</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">41</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">42</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">43</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">44</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">45</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">46</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">47</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">48</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR2</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">49</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR2</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">50</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR2</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">51</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR2</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">52</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR2</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">53</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR2</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">54</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR2</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">55</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR2</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">56</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">57</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">58</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">59</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">60</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">200GR4</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">64</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">200GR4</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">65</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">200GR4</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">66</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">200GR4</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">67</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">400GR8</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">68</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">400GR8</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">69</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">400GR8</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">70</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">400GR8</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">71</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">10GR1Fix</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">72</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">10GR1Fix</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+    </ASKL1plt:Port>
+  </ASKL1plt:ASK-L1>
+</data>
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FALCON_DB/ASK-PP-F6_4T-DB.md5 b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FALCON_DB/ASK-PP-F6_4T-DB.md5
new file mode 100644
index 000000000..3b165056b
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FALCON_DB/ASK-PP-F6_4T-DB.md5
@@ -0,0 +1 @@
+715e923d22c6767a6f6bb95d32b78713
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FALCON_DB/ASK-PP-F6_4T-DB.xml b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FALCON_DB/ASK-PP-F6_4T-DB.xml
new file mode 100644
index 000000000..7f7dde9c0
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FALCON_DB/ASK-PP-F6_4T-DB.xml
@@ -0,0 +1,1180 @@
+<?xml version="1.0" encoding="utf-8"?>
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-02-19-1.06" profile="Askpp" sid="34f1c14a-b581-422d-bd10-426dfac013dd">
+  <askppplt:ASK-PP xmlns:askppplt="urn:marvell:askpp:yang">
+    <askppplt:typedefs>
+      <askppplt:typedef>
+        <askppplt:name>std-string</askppplt:name>
+        <askppplt:type>string</askppplt:type>
+        <askppplt:description>standard string.</askppplt:description>
+        <askppplt:min>1</askppplt:min>
+        <askppplt:max>100</askppplt:max>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>queue-id-type</askppplt:name>
+        <askppplt:type>uint32</askppplt:type>
+        <askppplt:description>Queue id</askppplt:description>
+        <askppplt:min>0</askppplt:min>
+        <askppplt:max>7</askppplt:max>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>precent-type</askppplt:name>
+        <askppplt:type>uint32</askppplt:type>
+        <askppplt:description>Precent</askppplt:description>
+        <askppplt:min>0</askppplt:min>
+        <askppplt:max>100</askppplt:max>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>phaThreadId-type</askppplt:name>
+        <askppplt:type>uint32</askppplt:type>
+        <askppplt:description>Thread id</askppplt:description>
+        <askppplt:min>1</askppplt:min>
+        <askppplt:max>255</askppplt:max>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>routing-mode-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies routing mode.</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>POLICY_BASED_ROUTING_ONLY</askppplt:name>
+          <askppplt:description>PBR only</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>TCAM_ROUTER_BASED</askppplt:name>
+          <askppplt:description>Router engine or PBR</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>shared-table-mode-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies table sharing modes for L3 (LPM), L2 (FDB), EM (Exact Match)</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>MID_L3_MID_L2_NO_EM</askppplt:name>
+          <askppplt:description>MID_L3_MID_L2_NO_EM</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>MID_L3_MID_L2_MIN_EM</askppplt:name>
+          <askppplt:description>MID_L3_MID_L2_MIN_EM</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>LOW_MAX_L3_MID_LOW_L2_NO_EM</askppplt:name>
+          <askppplt:description>LOW_MAX_L3_MID_LOW_L2_NO_EM</askppplt:description>
+          <askppplt:value>2</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>MAX_L3_MIN_L2_NO_EM</askppplt:name>
+          <askppplt:description>MAX_L3_MIN_L2_NO_EM</askppplt:description>
+          <askppplt:value>3</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>pha-firmware-image-id-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies supported Pha image id</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>DEFAULT</askppplt:name>
+          <askppplt:description>Default PHA firmware image ID</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>01</askppplt:name>
+          <askppplt:description>01 firmware image ID</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>02</askppplt:name>
+          <askppplt:description>02 PHA firmware image ID</askppplt:description>
+          <askppplt:value>2</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>pha-firmware-thread-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies supported Pha thread type</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>IOAM_INGRESS_SWITCH_IPV4</askppplt:name>
+          <askppplt:description>IOAM_INGRESS_SWITCH_IPV4</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>IOAM_INGRESS_SWITCH_IPV6</askppplt:name>
+          <askppplt:description>IOAM_INGRESS_SWITCH_IPV6</askppplt:description>
+          <askppplt:value>2</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>IOAM_TRANSIT_SWITCH_IPV4</askppplt:name>
+          <askppplt:description>IOAM_TRANSIT_SWITCH_IPV4</askppplt:description>
+          <askppplt:value>3</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>IOAM_TRANSIT_SWITCH_IPV6</askppplt:name>
+          <askppplt:description>IOAM_TRANSIT_SWITCH_IPV6</askppplt:description>
+          <askppplt:value>4</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>INT_IOAM_MIRRORING</askppplt:name>
+          <askppplt:description>INT_IOAM_MIRRORING</askppplt:description>
+          <askppplt:value>5</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>INT_IOAM_EGRESS_SWITCH</askppplt:name>
+          <askppplt:description>INT_IOAM_EGRESS_SWITCH</askppplt:description>
+          <askppplt:value>6</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>MPLS_SR_NO_EL</askppplt:name>
+          <askppplt:description>MPLS_SR_NO_EL</askppplt:description>
+          <askppplt:value>7</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>MPLS_SR_ONE_EL</askppplt:name>
+          <askppplt:description>MPLS_SR_ONE_EL</askppplt:description>
+          <askppplt:value>8</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>MPLS_SR_TWO_EL</askppplt:name>
+          <askppplt:description>MPLS_SR_TWO_EL</askppplt:description>
+          <askppplt:value>9</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>MPLS_SR_THREE_EL</askppplt:name>
+          <askppplt:description>MPLS_SR_THREE_EL</askppplt:description>
+          <askppplt:value>10</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>UNIFIED_SR</askppplt:name>
+          <askppplt:description>UNIFIED_SR</askppplt:description>
+          <askppplt:value>11</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>CLASSIFIER_NSH_OVER_ETHERNET</askppplt:name>
+          <askppplt:description>CLASSIFIER_NSH_OVER_ETHERNET</askppplt:description>
+          <askppplt:value>12</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>CLASSIFIER_NSH_OVER_VXLAN_GPE</askppplt:name>
+          <askppplt:description>CLASSIFIER_NSH_OVER_VXLAN_GPE</askppplt:description>
+          <askppplt:value>13</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SFF_NSH_VXLAN_GPE_TO_ETHERNET</askppplt:name>
+          <askppplt:description>SFF_NSH_VXLAN_GPE_TO_ETHERNET</askppplt:description>
+          <askppplt:value>14</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SFF_NSH_ETHERNET_TO_VXLAN_GPE</askppplt:name>
+          <askppplt:description>SFF_NSH_ETHERNET_TO_VXLAN_GPE</askppplt:description>
+          <askppplt:value>15</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>IOAM_EGRESS_SWITCH_IPV6</askppplt:name>
+          <askppplt:description>IOAM_EGRESS_SWITCH_IPV6</askppplt:description>
+          <askppplt:value>16</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_END_NODE</askppplt:name>
+          <askppplt:description>SRV6_END_NODE</askppplt:description>
+          <askppplt:value>17</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_PENULTIMATE_END_NODE</askppplt:name>
+          <askppplt:description>SRV6_PENULTIMATE_END_NODE</askppplt:description>
+          <askppplt:value>18</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_SRC_NODE_1_SEGMENT</askppplt:name>
+          <askppplt:description>SRV6_SRC_NODE_1_SEGMENT</askppplt:description>
+          <askppplt:value>19</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_SRC_NODE_FIRST_PASS_2_3_SEGMENTS</askppplt:name>
+          <askppplt:description>SRV6_SRC_NODE_FIRST_PASS_2_3_SEGMENTS</askppplt:description>
+          <askppplt:value>20</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_SRC_NODE_SECOND_PASS_3_SEGMENTS</askppplt:name>
+          <askppplt:description>SRV6_SRC_NODE_SECOND_PASS_3_SEGMENTS</askppplt:description>
+          <askppplt:value>21</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_SRC_NODE_SECOND_PASS_2_SEGMENTS</askppplt:name>
+          <askppplt:description>SRV6_SRC_NODE_SECOND_PASS_2_SEGMENTS</askppplt:description>
+          <askppplt:value>22</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_NETWORK_ADD_MSB</askppplt:name>
+          <askppplt:description>SGT_NETWORK_ADD_MSB</askppplt:description>
+          <askppplt:value>23</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_NETWORK_FIX</askppplt:name>
+          <askppplt:description>SGT_NETWORK_FIX</askppplt:description>
+          <askppplt:value>24</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_NETWORK_REMOVE</askppplt:name>
+          <askppplt:description>SGT_NETWORK_REMOVE</askppplt:description>
+          <askppplt:value>25</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_EDSA_FIX</askppplt:name>
+          <askppplt:description>SGT_EDSA_FIX</askppplt:description>
+          <askppplt:value>26</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_EDSA_REMOVE</askppplt:name>
+          <askppplt:description>SGT_EDSA_REMOVE</askppplt:description>
+          <askppplt:value>27</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_GBP_FIX_IPV4</askppplt:name>
+          <askppplt:description>SGT_GBP_FIX_IPV4</askppplt:description>
+          <askppplt:value>28</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_GBP_FIX_IPV6</askppplt:name>
+          <askppplt:description>SGT_GBP_FIX_IPV6</askppplt:description>
+          <askppplt:value>29</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_GBP_REMOVE_IPV4</askppplt:name>
+          <askppplt:description>SGT_GBP_REMOVE_IPV4</askppplt:description>
+          <askppplt:value>30</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_GBP_REMOVE_IPV6</askppplt:name>
+          <askppplt:description>SGT_GBP_REMOVE_IPV6</askppplt:description>
+          <askppplt:value>31</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>PTP_PHY_1_STEP</askppplt:name>
+          <askppplt:description>PTP_PHY_1_STEP</askppplt:description>
+          <askppplt:value>32</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>EGRESS_MIRRORING_METADATA</askppplt:name>
+          <askppplt:description>EGRESS_MIRRORING_METADATA</askppplt:description>
+          <askppplt:value>33</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>CC_ERSPAN_TYPE_II_TRG_DEV_LC_IPV4</askppplt:name>
+          <askppplt:description>CC_ERSPAN_TYPE_II_TRG_DEV_LC_IPV4</askppplt:description>
+          <askppplt:value>34</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>CC_ERSPAN_TYPE_II_TRG_DEV_LC_IPV6</askppplt:name>
+          <askppplt:description>CC_ERSPAN_TYPE_II_TRG_DEV_LC_IPV6</askppplt:description>
+          <askppplt:value>35</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>CC_ERSPAN_TYPE_II_TRG_DEV_DIRECT_IPV4</askppplt:name>
+          <askppplt:description>CC_ERSPAN_TYPE_II_TRG_DEV_DIRECT_IPV4</askppplt:description>
+          <askppplt:value>36</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>CC_ERSPAN_TYPE_II_TRG_DEV_DIRECT_IPV6</askppplt:name>
+          <askppplt:description>CC_ERSPAN_TYPE_II_TRG_DEV_DIRECT_IPV6</askppplt:description>
+          <askppplt:value>37</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>CC_ERSPAN_TYPE_II_SRC_DEV</askppplt:name>
+          <askppplt:description>CC_ERSPAN_TYPE_II_SRC_DEV</askppplt:description>
+          <askppplt:value>38</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>VXLAN_GBP_SOURCE_GROUP_POLICY_ID</askppplt:name>
+          <askppplt:description>VXLAN_GBP_SOURCE_GROUP_POLICY_ID</askppplt:description>
+          <askppplt:value>39</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_BEST_EFFORT</askppplt:name>
+          <askppplt:description>SRV6_BEST_EFFORT</askppplt:description>
+          <askppplt:value>40</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_SRC_NODE_1_CONTAINER</askppplt:name>
+          <askppplt:description>SRV6_SRC_NODE_1_CONTAINER</askppplt:description>
+          <askppplt:value>41</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_SRC_NODE_FIRST_PASS_2_3_CONTAINERS</askppplt:name>
+          <askppplt:description>SRV6_SRC_NODE_FIRST_PASS_2_3_CONTAINERS</askppplt:description>
+          <askppplt:value>42</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_SRC_NODE_SECOND_PASS_2_CONTAINERS</askppplt:name>
+          <askppplt:description>SRV6_SRC_NODE_SECOND_PASS_2_CONTAINERS</askppplt:description>
+          <askppplt:value>43</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_SRC_NODE_SECOND_PASS_3_CONTAINERS</askppplt:name>
+          <askppplt:description>SRV6_SRC_NODE_SECOND_PASS_3_CONTAINERS</askppplt:description>
+          <askppplt:value>44</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_END_NODE_COC32_GSID</askppplt:name>
+          <askppplt:description>SRV6_END_NODE_COC32_GSID</askppplt:description>
+          <askppplt:value>45</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>IPV4_TTL_INCREMENT</askppplt:name>
+          <askppplt:description>IPV4_TTL_INCREMENT</askppplt:description>
+          <askppplt:value>46</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>IPV6_HOP_LIMIT_INCREMENT</askppplt:name>
+          <askppplt:description>IPV6_HOP_LIMIT_INCREMENT</askppplt:description>
+          <askppplt:value>47</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>CLEAR_OUTGOING_MTAG_COMMAND</askppplt:name>
+          <askppplt:description>CLEAR_OUTGOING_MTAG_COMMAND</askppplt:description>
+          <askppplt:value>48</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SFLOW_V5_IPV4</askppplt:name>
+          <askppplt:description>SFLOW_V5_IPV4</askppplt:description>
+          <askppplt:value>49</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SFLOW_V5_IPV6</askppplt:name>
+          <askppplt:description>SFLOW_V5_IPV6</askppplt:description>
+          <askppplt:value>50</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SLS</askppplt:name>
+          <askppplt:description>SLS</askppplt:description>
+          <askppplt:value>51</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>trunk-member-mode-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies supported Pha image id</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>NATIVE</askppplt:name>
+          <askppplt:description>NATIVE
+*  the trunk members are filled
+*  according to the order given by application.
+*  Regular trunk may hold max of 8 members.
+*  Cascade trunk may hold :
+*  max of 64 members</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>FLEX</askppplt:name>
+          <askppplt:description>FLEX
+*  A mode to allows flexibility for
+*  each Regular trunk to state it's max number of members (before starting to add members).
+*  (this mode not effect 'cascade trunk' members)
+*  Regular trunk may hold : max of 4K members. (each trunk set it's own limit)
+*  Cascade trunk may hold : max of 64 members.</askppplt:description>
+          <askppplt:value>2</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>number-physical-port-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>AC3X/AC5X 128, falcon 64, 128, 256, 512, 1024</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>no-ports</askppplt:name>
+          <askppplt:description>no-ports</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>64-ports</askppplt:name>
+          <askppplt:description>64-ports</askppplt:description>
+          <askppplt:value>64</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>128-ports</askppplt:name>
+          <askppplt:description>128-ports</askppplt:description>
+          <askppplt:value>128</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>256-ports</askppplt:name>
+          <askppplt:description>256-ports</askppplt:description>
+          <askppplt:value>256</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>512-ports</askppplt:name>
+          <askppplt:description>512-ports</askppplt:description>
+          <askppplt:value>512</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>1024-ports</askppplt:name>
+          <askppplt:description>1024-ports</askppplt:description>
+          <askppplt:value>1024</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>serdes-ref-clock-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies serdes refernce clock.</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>external_25_single_ended</askppplt:name>
+          <askppplt:description>EXTERNAL_25_SINGLE_ENDED</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>external_125_single_ended</askppplt:name>
+          <askppplt:description>EXTERNAL_125_SINGLE_ENDED</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>external_125_diff</askppplt:name>
+          <askppplt:description>EXTERNAL_125_DIFF</askppplt:description>
+          <askppplt:value>2</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>external_156_25_single_ended</askppplt:name>
+          <askppplt:description>EXTERNAL_156_25_SINGLE_ENDED</askppplt:description>
+          <askppplt:value>3</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>external_156_25_diff</askppplt:name>
+          <askppplt:description>EXTERNAL_156_25_DIFF</askppplt:description>
+          <askppplt:value>4</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>internal_125</askppplt:name>
+          <askppplt:description>INTERNAL_125</askppplt:description>
+          <askppplt:value>5</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>cpu-port-id-type</askppplt:name>
+        <askppplt:type>uint32</askppplt:type>
+        <askppplt:description>CPU port id</askppplt:description>
+        <askppplt:min>0</askppplt:min>
+        <askppplt:max>7</askppplt:max>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>rx-buffer-size-type</askppplt:name>
+        <askppplt:type>uint32</askppplt:type>
+        <askppplt:description>Rx Buffer size</askppplt:description>
+        <askppplt:min>64</askppplt:min>
+        <askppplt:max>10240</askppplt:max>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>tx-sdma-queue-mode-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies TX queue mode.</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>Normal</askppplt:name>
+          <askppplt:description>Application</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>Packet_Generator</askppplt:name>
+          <askppplt:description>Traffic generator</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>alloc-method-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies Buffers allocation method.</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>Dynamic_Alloc</askppplt:name>
+          <askppplt:description>Dynamic</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>Static_Alloc</askppplt:name>
+          <askppplt:description>Static</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>au_mesage_lenght-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies Buffers allocation method.</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>4_words</askppplt:name>
+          <askppplt:description>4 Words</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>8_words</askppplt:name>
+          <askppplt:description>8 Words</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>boolean-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Boolean 32 bits , due to bing endian</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>false</askppplt:name>
+          <askppplt:description>False</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>true</askppplt:name>
+          <askppplt:description>True</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>asic-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>ASIC Type</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>ASIC_AC3X</askppplt:name>
+          <askppplt:description>AC3X</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>ASIC_AC5X</askppplt:name>
+          <askppplt:description>AC5X</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>ASIC_Falcon</askppplt:name>
+          <askppplt:description>FALCON</askppplt:description>
+          <askppplt:value>2</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+    </askppplt:typedefs>
+    <askppplt:ASIC_Type askppplt:type="asic-type">ASIC_Falcon</askppplt:ASIC_Type>
+    <askppplt:PPInit>
+      <askppplt:PP-name askppplt:type="std-string">Falcon-6.4</askppplt:PP-name>
+      <askppplt:Phase1>
+        <askppplt:coreClock askppplt:type="uint32">4294967295</askppplt:coreClock>
+        <askppplt:serdesRefClock askppplt:type="serdes-ref-clock-type">external_25_single_ended</askppplt:serdesRefClock>
+        <askppplt:isrAddrCompletionRegionsBmp askppplt:type="uint32">2</askppplt:isrAddrCompletionRegionsBmp>
+        <askppplt:appAddrCompletionRegionsBmp askppplt:type="uint32">60</askppplt:appAddrCompletionRegionsBmp>
+        <askppplt:maxNumOfPhyPortsToUse askppplt:type="number-physical-port-type">128-ports</askppplt:maxNumOfPhyPortsToUse>
+        <askppplt:tcamParityCalcEnable askppplt:type="boolean-type">false</askppplt:tcamParityCalcEnable>
+        <askppplt:apEnable askppplt:type="boolean-type">true</askppplt:apEnable>
+        <askppplt:numOfDataIntegrityElements askppplt:type="uint32">0</askppplt:numOfDataIntegrityElements>
+      </askppplt:Phase1>
+      <askppplt:Phase2>
+        <askppplt:useMultiNetIfSdma askppplt:type="boolean-type">true</askppplt:useMultiNetIfSdma>
+        <askppplt:auqCfg>
+          <askppplt:auDescNum askppplt:type="uint32">4096</askppplt:auDescNum>
+        </askppplt:auqCfg>
+        <askppplt:fuqCfg>
+          <askppplt:fuDescNum askppplt:type="uint32">2048</askppplt:fuDescNum>
+        </askppplt:fuqCfg>
+        <askppplt:multiNetIfCfg>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">0</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">7</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">6</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">5</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">4</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">3</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">2</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">1</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">0</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">7</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">6</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">5</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">4</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">3</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">2</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">1</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">0</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">7</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">6</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">5</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">4</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">3</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">2</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">1</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">0</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">7</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">6</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">5</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">4</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">3</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">2</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">1</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">0</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">1</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">2</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">3</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">4</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">5</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">6</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">7</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">0</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">1</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">2</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">3</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">4</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">5</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">6</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">7</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">0</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">1</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">2</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">3</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">4</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">5</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">6</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">7</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">0</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">1</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">2</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">3</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">4</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">5</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">6</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Packet_Generator</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">256</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">256</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">144</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">7</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Packet_Generator</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">1</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">1</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">3032</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+        </askppplt:multiNetIfCfg>
+        <askppplt:internal>
+          <askppplt:fuqUseSeparate askppplt:type="boolean-type">false</askppplt:fuqUseSeparate>
+          <askppplt:useSecondaryAuq askppplt:type="boolean-type">false</askppplt:useSecondaryAuq>
+          <askppplt:noTraffic2CPU askppplt:type="boolean-type">false</askppplt:noTraffic2CPU>
+          <askppplt:netifSdmaPortGroupId askppplt:type="uint32">0</askppplt:netifSdmaPortGroupId>
+          <askppplt:auMessageLength askppplt:type="au_mesage_lenght-type">8_words</askppplt:auMessageLength>
+          <askppplt:useDoubleAuq askppplt:type="boolean-type">false</askppplt:useDoubleAuq>
+        </askppplt:internal>
+      </askppplt:Phase2>
+      <askppplt:LogicalInit>
+        <askppplt:routingMode askppplt:type="routing-mode-type">TCAM_ROUTER_BASED</askppplt:routingMode>
+        <askppplt:maxNumOfPbrEntries askppplt:type="uint32">0</askppplt:maxNumOfPbrEntries>
+        <askppplt:sharedTableMode askppplt:type="shared-table-mode-type">MID_L3_MID_L2_NO_EM</askppplt:sharedTableMode>
+        <askppplt:ingressDropEnable askppplt:type="boolean-type">false</askppplt:ingressDropEnable>
+      </askppplt:LogicalInit>
+      <askppplt:LibInit>
+        <askppplt:initBridge askppplt:type="boolean-type">true</askppplt:initBridge>
+        <askppplt:initMirror askppplt:type="boolean-type">true</askppplt:initMirror>
+        <askppplt:initNetIf askppplt:type="boolean-type">true</askppplt:initNetIf>
+        <askppplt:initPhy askppplt:type="boolean-type">true</askppplt:initPhy>
+        <askppplt:initPort askppplt:type="boolean-type">true</askppplt:initPort>
+        <askppplt:initTrunk askppplt:type="boolean-type">true</askppplt:initTrunk>
+        <askppplt:Trunk-params>
+          <askppplt:maxNumberOfTrunks askppplt:type="uint32">1023</askppplt:maxNumberOfTrunks>
+          <askppplt:trunkMembersMode askppplt:type="trunk-member-mode-type">FLEX</askppplt:trunkMembersMode>
+        </askppplt:Trunk-params>
+        <askppplt:initPcl askppplt:type="boolean-type">true</askppplt:initPcl>
+        <askppplt:initTcam askppplt:type="boolean-type">true</askppplt:initTcam>
+        <askppplt:initPolicer askppplt:type="boolean-type">true</askppplt:initPolicer>
+        <askppplt:initPha askppplt:type="boolean-type">true</askppplt:initPha>
+        <askppplt:Pha-params>
+          <askppplt:packetOrderChangeEnable askppplt:type="boolean-type">false</askppplt:packetOrderChangeEnable>
+          <askppplt:phaFwImageId askppplt:type="pha-firmware-image-id-type">02</askppplt:phaFwImageId>
+          <askppplt:phaFwImageIdVersion askppplt:type="uint32">0</askppplt:phaFwImageIdVersion>
+        </askppplt:Pha-params>
+      </askppplt:LibInit>
+    </askppplt:PPInit>
+  </askppplt:ASK-PP>
+</data>
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FALCON_DB/SAI-F6_4T-DB.md5 b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FALCON_DB/SAI-F6_4T-DB.md5
new file mode 100644
index 000000000..8e92075a3
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FALCON_DB/SAI-F6_4T-DB.md5
@@ -0,0 +1 @@
+79e0d448ff6f12de9926163545fcf9a2
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FALCON_DB/SAI-F6_4T-DB.xml b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FALCON_DB/SAI-F6_4T-DB.xml
new file mode 100644
index 000000000..2b5db7976
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FALCON_DB/SAI-F6_4T-DB.xml
@@ -0,0 +1,583 @@
+<?xml version="1.0" encoding="utf-8"?>
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-02-19-1.06" profile="SAI" sid="c310bbb1-ffca-4c99-9bae-f7d4caff5941">
+  <SAIplt:SAI xmlns:SAIplt="urn:marvell:SAI:yang">
+    <SAIplt:typedefs>
+      <SAIplt:typedef>
+        <SAIplt:name>device-id-type</SAIplt:name>
+        <SAIplt:type>uint32</SAIplt:type>
+        <SAIplt:description>Device ID 0..1</SAIplt:description>
+        <SAIplt:min>0</SAIplt:min>
+        <SAIplt:max>1</SAIplt:max>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>port-id-type</SAIplt:name>
+        <SAIplt:type>uint32</SAIplt:type>
+        <SAIplt:description>Interface number</SAIplt:description>
+        <SAIplt:min>0</SAIplt:min>
+        <SAIplt:max>1023</SAIplt:max>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>logDest-type</SAIplt:name>
+        <SAIplt:type>enumeration</SAIplt:type>
+        <SAIplt:description>Logging Feature Options</SAIplt:description>
+        <SAIplt:enum>
+          <SAIplt:name>SAI_LOG_SYSLOG</SAIplt:name>
+          <SAIplt:description>SYSLOG  {Syslog service should be running to use this option}</SAIplt:description>
+          <SAIplt:value>0</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>SAI_LOG_CONSOLE</SAIplt:name>
+          <SAIplt:description>CONSOLE</SAIplt:description>
+          <SAIplt:value>1</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>SAI_LOG_FILE</SAIplt:name>
+          <SAIplt:description>FILE  {Warning !!! Use with caution. Can cause disk full issues}</SAIplt:description>
+          <SAIplt:value>2</SAIplt:value>
+        </SAIplt:enum>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>InDropCounter-type</SAIplt:name>
+        <SAIplt:type>enumeration</SAIplt:type>
+        <SAIplt:description>Router In Drop Reason Feature Options</SAIplt:description>
+        <SAIplt:enum>
+          <SAIplt:name>TTL_HOPLIMIT_EXCEEDED</SAIplt:name>
+          <SAIplt:description>Router In Drop Counters track TTL &amp; Hop Limit Exceeded Packets</SAIplt:description>
+          <SAIplt:value>0</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>ROUTE_BLACKHOLE</SAIplt:name>
+          <SAIplt:description>Router In Drop Counters track Route Black Hole Packets</SAIplt:description>
+          <SAIplt:value>1</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>IN_DROP_ANY</SAIplt:name>
+          <SAIplt:description>Router In Drop Counters track either TTL &amp; Hop Limit Exceeded or Route Black Hole Packets</SAIplt:description>
+          <SAIplt:value>2</SAIplt:value>
+        </SAIplt:enum>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>log-dest-file-path-type</SAIplt:name>
+        <SAIplt:type>string</SAIplt:type>
+        <SAIplt:description>A string with path to file for logging feature</SAIplt:description>
+        <SAIplt:min>2</SAIplt:min>
+        <SAIplt:max>30</SAIplt:max>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>acl-feature-name-type</SAIplt:name>
+        <SAIplt:type>enumeration</SAIplt:type>
+        <SAIplt:description/>
+        <SAIplt:enum>
+          <SAIplt:name>port-sFlow</SAIplt:name>
+          <SAIplt:description>SFlow over Port</SAIplt:description>
+          <SAIplt:value>0</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>port-counters-ipv4-ipv6</SAIplt:name>
+          <SAIplt:description>Port ipv4/ipv6 counters</SAIplt:description>
+          <SAIplt:value>1</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>control-acl</SAIplt:name>
+          <SAIplt:description>ACLs for control packet handling</SAIplt:description>
+          <SAIplt:value>2</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>debug-counter-acl</SAIplt:name>
+          <SAIplt:description>ACLs for Debug Counters</SAIplt:description>
+          <SAIplt:value>3</SAIplt:value>
+        </SAIplt:enum>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>ingress-acl-stage-type</SAIplt:name>
+        <SAIplt:type>enumeration</SAIplt:type>
+        <SAIplt:description/>
+        <SAIplt:enum>
+          <SAIplt:name>disabled</SAIplt:name>
+          <SAIplt:description>Feature not enabled</SAIplt:description>
+          <SAIplt:value>0</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>IPCL0</SAIplt:name>
+          <SAIplt:description>Stage IPCL0</SAIplt:description>
+          <SAIplt:value>1</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>IPCL1</SAIplt:name>
+          <SAIplt:description>Stage IPCL1</SAIplt:description>
+          <SAIplt:value>2</SAIplt:value>
+        </SAIplt:enum>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>egress-acl-stage-type</SAIplt:name>
+        <SAIplt:type>enumeration</SAIplt:type>
+        <SAIplt:description/>
+        <SAIplt:enum>
+          <SAIplt:name>disabled</SAIplt:name>
+          <SAIplt:description>Feature not enabled</SAIplt:description>
+          <SAIplt:value>0</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>EPCL0</SAIplt:name>
+          <SAIplt:description>Stage EPCL0</SAIplt:description>
+          <SAIplt:value>2</SAIplt:value>
+        </SAIplt:enum>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>feature-priority-type</SAIplt:name>
+        <SAIplt:type>uint32</SAIplt:type>
+        <SAIplt:description>Feature priority</SAIplt:description>
+        <SAIplt:min>2</SAIplt:min>
+        <SAIplt:max>15</SAIplt:max>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>hit-number-type</SAIplt:name>
+        <SAIplt:type>uint32</SAIplt:type>
+        <SAIplt:description>Hit/lookup number</SAIplt:description>
+        <SAIplt:min>0</SAIplt:min>
+        <SAIplt:max>3</SAIplt:max>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>asic-type</SAIplt:name>
+        <SAIplt:type>enumeration</SAIplt:type>
+        <SAIplt:description>ASIC Type</SAIplt:description>
+        <SAIplt:enum>
+          <SAIplt:name>ASIC_AC3X</SAIplt:name>
+          <SAIplt:description>AC3X</SAIplt:description>
+          <SAIplt:value>0</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>ASIC_AC5X</SAIplt:name>
+          <SAIplt:description>AC5X</SAIplt:description>
+          <SAIplt:value>1</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>ASIC_Falcon</SAIplt:name>
+          <SAIplt:description>FALCON</SAIplt:description>
+          <SAIplt:value>2</SAIplt:value>
+        </SAIplt:enum>
+      </SAIplt:typedef>
+    </SAIplt:typedefs>
+    <SAIplt:ASIC_Type SAIplt:type="asic-type">ASIC_Falcon</SAIplt:ASIC_Type>
+    <SAIplt:ASK-BOARD-Profile-Name SAIplt:type="string">ASK-Board-F6_4T-DB.xml</SAIplt:ASK-BOARD-Profile-Name>
+    <SAIplt:Ports>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">0</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">15</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">1</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">14</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">2</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">13</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">3</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">12</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">4</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">11</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">5</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">10</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">6</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">9</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">7</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">8</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">8</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">7</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">9</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">6</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">10</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">5</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">11</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">4</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">12</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">3</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">13</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">2</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">14</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">1</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">15</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">0</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">16</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">31</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">17</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">30</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">18</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">29</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">19</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">28</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">20</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">27</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">21</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">26</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">22</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">25</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">23</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">24</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">24</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">23</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">25</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">22</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">26</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">21</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">27</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">20</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">28</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">19</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">29</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">18</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">30</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">17</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">31</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">16</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">32</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">47</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">33</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">46</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">34</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">45</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">35</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">44</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">36</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">43</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">37</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">42</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">38</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">41</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">39</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">40</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">40</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">39</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">41</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">38</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">42</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">37</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">43</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">36</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">44</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">35</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">45</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">34</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">46</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">33</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">47</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">32</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">48</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">55</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">50</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">54</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">52</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">53</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">54</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">52</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">56</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">51</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">58</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">50</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">60</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">49</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">62</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">48</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">64</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">59</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">68</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">58</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">72</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">57</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">76</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">56</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">80</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">66</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">84</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">65</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">88</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">64</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">92</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">60</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">96</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">70</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">104</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">69</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">112</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">68</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">120</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">67</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">128</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">71</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">129</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">72</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+    </SAIplt:Ports>
+    <SAIplt:scalingFalcon>
+      <SAIplt:max_lag_members SAIplt:type="uint32">8</SAIplt:max_lag_members>
+      <SAIplt:max_route_ipv4 SAIplt:type="uint32">0</SAIplt:max_route_ipv4>
+      <SAIplt:max_route_ipv6 SAIplt:type="uint32">0</SAIplt:max_route_ipv6>
+      <SAIplt:max_Nh_Ecmp_Mbr_Per_Grp SAIplt:type="uint32">64</SAIplt:max_Nh_Ecmp_Mbr_Per_Grp>
+      <SAIplt:max_ipv4_tunnel SAIplt:type="uint32">8</SAIplt:max_ipv4_tunnel>
+      <SAIplt:max_ipv6_tunnel SAIplt:type="uint32">8</SAIplt:max_ipv6_tunnel>
+      <SAIplt:max_tti SAIplt:type="uint32">1024</SAIplt:max_tti>
+      <SAIplt:wred_size SAIplt:type="uint32">0</SAIplt:wred_size>
+      <SAIplt:max_nat SAIplt:type="uint32">0</SAIplt:max_nat>
+    </SAIplt:scalingFalcon>
+    <SAIplt:Counters>
+      <SAIplt:cnc-base-list>
+        <SAIplt:counter-base SAIplt:type="uint32">0</SAIplt:counter-base>
+      </SAIplt:cnc-base-list>
+    </SAIplt:Counters>
+    <SAIplt:Logging>
+      <SAIplt:log_dest SAIplt:type="logDest-type">SAI_LOG_SYSLOG</SAIplt:log_dest>
+    </SAIplt:Logging>
+    <SAIplt:Features-using-acl>
+      <SAIplt:feature SAIplt:type="acl-feature-name-type">control-acl</SAIplt:feature>
+      <SAIplt:feature-priority SAIplt:type="feature-priority-type">3</SAIplt:feature-priority>
+      <SAIplt:Ingress>
+        <SAIplt:ingress-stage SAIplt:type="ingress-acl-stage-type">IPCL0</SAIplt:ingress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">1</SAIplt:hit-number>
+      </SAIplt:Ingress>
+      <SAIplt:Egress>
+        <SAIplt:egress-stage SAIplt:type="egress-acl-stage-type">EPCL0</SAIplt:egress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">0</SAIplt:hit-number>
+      </SAIplt:Egress>
+    </SAIplt:Features-using-acl>
+    <SAIplt:Features-using-acl>
+      <SAIplt:feature SAIplt:type="acl-feature-name-type">port-sFlow</SAIplt:feature>
+      <SAIplt:feature-priority SAIplt:type="feature-priority-type">4</SAIplt:feature-priority>
+      <SAIplt:Ingress>
+        <SAIplt:ingress-stage SAIplt:type="ingress-acl-stage-type">IPCL0</SAIplt:ingress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">0</SAIplt:hit-number>
+      </SAIplt:Ingress>
+      <SAIplt:Egress>
+        <SAIplt:egress-stage SAIplt:type="egress-acl-stage-type">EPCL0</SAIplt:egress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">0</SAIplt:hit-number>
+      </SAIplt:Egress>
+    </SAIplt:Features-using-acl>
+    <SAIplt:Features-using-acl>
+      <SAIplt:feature SAIplt:type="acl-feature-name-type">port-counters-ipv4-ipv6</SAIplt:feature>
+      <SAIplt:feature-priority SAIplt:type="feature-priority-type">5</SAIplt:feature-priority>
+      <SAIplt:Ingress>
+        <SAIplt:ingress-stage SAIplt:type="ingress-acl-stage-type">IPCL0</SAIplt:ingress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">3</SAIplt:hit-number>
+      </SAIplt:Ingress>
+      <SAIplt:Egress>
+        <SAIplt:egress-stage SAIplt:type="egress-acl-stage-type">EPCL0</SAIplt:egress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">0</SAIplt:hit-number>
+      </SAIplt:Egress>
+    </SAIplt:Features-using-acl>
+    <SAIplt:Features-using-acl>
+      <SAIplt:feature SAIplt:type="acl-feature-name-type">debug-counter-acl</SAIplt:feature>
+      <SAIplt:feature-priority SAIplt:type="feature-priority-type">2</SAIplt:feature-priority>
+      <SAIplt:Ingress>
+        <SAIplt:ingress-stage SAIplt:type="ingress-acl-stage-type">IPCL0</SAIplt:ingress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">1</SAIplt:hit-number>
+      </SAIplt:Ingress>
+      <SAIplt:Egress>
+        <SAIplt:egress-stage SAIplt:type="egress-acl-stage-type">EPCL0</SAIplt:egress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">0</SAIplt:hit-number>
+      </SAIplt:Egress>
+    </SAIplt:Features-using-acl>
+  </SAIplt:SAI>
+</data>
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FALCON_DB/buffers_defaults_t0.j2 b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FALCON_DB/buffers_defaults_t0.j2
new file mode 100644
index 000000000..688fbe9d4
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FALCON_DB/buffers_defaults_t0.j2
@@ -0,0 +1,36 @@
+
+{%- set default_cable = '40m' %}
+
+{%- macro generate_buffer_pool_and_profiles() %}
+    "BUFFER_POOL": {
+        "ingress_lossless_pool": {
+            "size": "11500000",
+            "type": "ingress",
+            "mode": "dynamic"
+        },
+        "egress_pool": {
+            "size": "11500000",
+            "type": "egress",
+            "mode": "static"
+        }
+    },
+    "BUFFER_PROFILE": {
+        "ingress_lossy_profile": {
+            "pool":"ingress_lossless_pool",
+            "size":"0",
+            "dynamic_th":"3"
+        },
+        "egress_lossless_profile": {
+            "pool":"egress_pool",
+            "mode": "static",
+            "size":"85000",
+            "static_th":"0"
+        },
+        "egress_lossy_profile": {
+            "pool":"egress_pool",
+            "size":"0",
+            "mode": "dynamic",
+            "dynamic_th":"3"
+        }
+    },
+{%- endmacro %}
diff --git a/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FALCON_DB/buffers_defaults_t1.j2 b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FALCON_DB/buffers_defaults_t1.j2
new file mode 100644
index 000000000..e9685b553
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FALCON_DB/buffers_defaults_t1.j2
@@ -0,0 +1,36 @@
+
+{%- set default_cable = '40m' %}
+
+{%- macro generate_buffer_pool_and_profiles() %}
+    "BUFFER_POOL": {
+        "ingress_lossless_pool": {
+            "size": "11500000",
+            "type": "ingress",
+            "mode": "dynamic"
+        },
+        "egress_pool": {
+            "size": "11500000",
+            "type": "egress",
+            "mode": "static"
+        }
+    },
+    "BUFFER_PROFILE": {
+        "ingress_lossy_profile": {
+            "pool":"ingress_lossless_pool",
+            "size":"0",
+            "dynamic_th":"3"
+        },
+        "egress_lossless_profile": {
+            "pool":"egress_pool",
+            "mode": "static",
+            "size":"85000",
+	    "static_th":"0"
+        },
+        "egress_lossy_profile": {
+            "pool":"egress_pool",
+            "size":"0",
+            "mode": "dynamic",
+            "dynamic_th":"3"
+        }
+    },
+{%- endmacro %}
diff --git a/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FALCON_DB/port_config.ini b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FALCON_DB/port_config.ini
new file mode 100644
index 000000000..607dbf393
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FALCON_DB/port_config.ini
@@ -0,0 +1,71 @@
+#  name         lanes                                alias           speed  autoneg     fec    index
+Ethernet0       0                                   tenGigE0         10000    on        none     1
+Ethernet1       1                                   tenGigE1         10000    on        none     2
+Ethernet2       2                                   tenGigE2         10000    on        none     3
+Ethernet3       3                                   tenGigE3         10000    on        none     4
+Ethernet4       4                                   tenGigE4         10000    on        none     5
+Ethernet5       5                                   tenGigE5         10000    on        none     6
+Ethernet6       6                                   tenGigE6         10000    on        none     7
+Ethernet7       7                                   tenGigE7         10000    on        none     8
+Ethernet8       8                                   tenGigE8         10000    on        none     9
+Ethernet9       9                                   tenGigE9         10000    on        none     10
+Ethernet10      10                                  tenGigE10        10000    on        none     11
+Ethernet11      11                                  tenGigE11        10000    on        none     12
+Ethernet12      12                                  tenGigE12        10000    on        none     13
+Ethernet13      13                                  tenGigE13        10000    on        none     14
+Ethernet14      14                                  tenGigE14        10000    on        none     15
+Ethernet15      15                                  tenGigE15        10000    on        none     16
+Ethernet16      16                                  twenty5GigE16    25000    on        none     17
+Ethernet17      17                                  twenty5GigE17    25000    on        none     18
+Ethernet18      18                                  twenty5GigE18    25000    on        none     19
+Ethernet19      19                                  twenty5GigE19    25000    on        none     20
+Ethernet20      20                                  twenty5GigE20    25000    on        none     21
+Ethernet21      21                                  twenty5GigE21    25000    on        none     22
+Ethernet22      22                                  twenty5GigE22    25000    on        none     23
+Ethernet23      23                                  twenty5GigE23    25000    on        none     24
+Ethernet24      24                                  twenty5GigE24    25000    on        none     25
+Ethernet25      25                                  twenty5GigE25    25000    on        none     26
+Ethernet26      26                                  twenty5GigE26    25000    on        none     27
+Ethernet27      27                                  twenty5GigE27    25000    on        none     28
+Ethernet28      28                                  twenty5GigE28    25000    on        none     29
+Ethernet29      29                                  twenty5GigE29    25000    on        none     30
+Ethernet30      30                                  twenty5GigE30    25000    on        none     31
+Ethernet31      31                                  twenty5GigE31    25000    on        none     32
+Ethernet32      32                                  fiftyGigE32      50000    on        rs       33
+Ethernet33      33                                  fiftyGigE33      50000    on        rs       34
+Ethernet34      34                                  fiftyGigE34      50000    on        rs       35
+Ethernet35      35                                  fiftyGigE35      50000    on        rs       36
+Ethernet36      36                                  fiftyGigE36      50000    on        rs       37
+Ethernet37      37                                  fiftyGigE37      50000    on        rs       38
+Ethernet38      38                                  fiftyGigE38      50000    on        rs       39
+Ethernet39      39                                  fiftyGigE39      50000    on        rs       40
+Ethernet40      40                                  fiftyGigE40      50000    on        rs       41
+Ethernet41      41                                  fiftyGigE41      50000    on        rs       42
+Ethernet42      42                                  fiftyGigE42      50000    on        rs       43
+Ethernet43      43                                  fiftyGigE43      50000    on        rs       44
+Ethernet44      44                                  fiftyGigE44      50000    on        rs       45
+Ethernet45      45                                  fiftyGigE45      50000    on        rs       46
+Ethernet46      46                                  fiftyGigE46      50000    on        rs       47
+Ethernet47      47                                  fiftyGigE47      50000    on        rs       48
+Ethernet48      48,49                               one00GigE48      100000   on        rs       49
+Ethernet49      50,51                               one00GigE49      100000   on        rs       50
+Ethernet50      52,53                               one00GigE50      100000   on        rs       51
+Ethernet51      54,55                               one00GigE51      100000   on        rs       52
+Ethernet52      56,57                               one00GigE52      100000   on        rs       53
+Ethernet53      58,59                               one00GigE53      100000   on        rs       54
+Ethernet54      60,61                               one00GigE54      100000   on        rs       55
+Ethernet55      62,63                               one00GigE55      100000   on        rs       56
+Ethernet56      64,65,66,67                         one00GigE56      100000   on        rs       57
+Ethernet57      68,69,70,71                         one00GigE57      100000   on        rs       58
+Ethernet58      72,73,74,75                         one00GigE58      100000   on        rs       59
+Ethernet59      76,77,78,79                         one00GigE59      100000   on        rs       60
+Ethernet60      80,81,82,83                         two00GigE60      200000   on        rs       61
+Ethernet61      84,85,86,87                         two00GigE61      200000   on        rs       62
+Ethernet62      88,89,90,91                         two00GigE62      200000   on        rs       63
+Ethernet63      92,93,94,95                         two00GigE63      200000   on        rs       64
+Ethernet64      96,97,98,99,100,101,102,103         four00GigE64     400000   on        rs       65
+Ethernet65      104,105,106,107,108,109,110,111     four00GigE65     400000   on        rs       66
+Ethernet66      112,113,114,115,116,117,118,119     four00GigE66     400000   on        rs       67
+Ethernet67      120,121,122,123,124,125,126,127     four00GigE67     400000   on        rs       68
+Ethernet68      128                                 tenGigE68        10000    off       none     69
+Ethernet69      129                                 tenGigE69        10000    off       none     70
diff --git a/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FALCON_DB/profile.ini b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FALCON_DB/profile.ini
new file mode 100644
index 000000000..c2f77685a
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FALCON_DB/profile.ini
@@ -0,0 +1 @@
+switchMacAddress=00:01:02:03:04:05
diff --git a/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FALCON_DB/sai.profile b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FALCON_DB/sai.profile
new file mode 100644
index 000000000..c38ff1ab2
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FALCON_DB/sai.profile
@@ -0,0 +1,4 @@
+mode=1
+hwId=FC6_8T-DB
+switchProfile=/usr/share/sonic/hwsku/SAI-F6_4T-DB.xml
+SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/profile.ini
diff --git a/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FC128x50G/ASK-Board-F6_4T-128x50G.md5 b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FC128x50G/ASK-Board-F6_4T-128x50G.md5
new file mode 100644
index 000000000..3a1dbc2cb
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FC128x50G/ASK-Board-F6_4T-128x50G.md5
@@ -0,0 +1 @@
+62fde882ea62d2c13eb9d7def73f5373
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FC128x50G/ASK-Board-F6_4T-128x50G.xml b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FC128x50G/ASK-Board-F6_4T-128x50G.xml
new file mode 100644
index 000000000..6fb03bf18
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FC128x50G/ASK-Board-F6_4T-128x50G.xml
@@ -0,0 +1,4038 @@
+<?xml version="1.0" encoding="utf-8"?>
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-02-19-1.06" profile="Askboard" sid="eb53f80b-5892-4f8b-9197-a6f626effaba">
+  <askboardplt:ASK-Board xmlns:askboardplt="urn:marvell:askboard:yang">
+    <askboardplt:typedefs>
+      <askboardplt:typedef>
+        <askboardplt:name>std-string</askboardplt:name>
+        <askboardplt:type>string</askboardplt:type>
+        <askboardplt:description>standard string.</askboardplt:description>
+        <askboardplt:min>1</askboardplt:min>
+        <askboardplt:max>100</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>board-callback-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies os/ext drv callback types.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>linux-static</askboardplt:name>
+          <askboardplt:description>Linux Static</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>linux-shared</askboardplt:name>
+          <askboardplt:description>Linux Shared Lib mode</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>external</askboardplt:name>
+          <askboardplt:description>External Os</askboardplt:description>
+          <askboardplt:value>3</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>freeBsd</askboardplt:name>
+          <askboardplt:description>Free BSD</askboardplt:description>
+          <askboardplt:value>4</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>board-pp-map-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies pci info types.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>fixed</askboardplt:name>
+          <askboardplt:description>Fixed</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>autoscan</askboardplt:name>
+          <askboardplt:description>Auto scan</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>board-pp-interface-channel-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies channel interface type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>pci</askboardplt:name>
+          <askboardplt:description>PCI</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>smi</askboardplt:name>
+          <askboardplt:description>SMI</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>twsi</askboardplt:name>
+          <askboardplt:description>TWSI</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>board-pp-as-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies Address space type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>4_regions</askboardplt:name>
+          <askboardplt:description>address-space 4 regions</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>8_regions</askboardplt:name>
+          <askboardplt:description>address-space 8 regions</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>atu</askboardplt:name>
+          <askboardplt:description>address translation unit</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>device-id-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Device ID 0..1</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>1</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>port-mapping-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies port map type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>ethernet_mac</askboardplt:name>
+          <askboardplt:description>ETHERNET_MAC</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>cpu_sdma</askboardplt:name>
+          <askboardplt:description>CPU_SDMA</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>interface-num-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Interface number</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>1023</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>txq-port-number-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>TXq port number </askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>99</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>phy-smi-interface-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Phy SMI interface type.</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>3</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>phy-xsmi-interface-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Phy XSMI interface type.</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>15</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>phy-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the PHY Part Identifier.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>NA</askboardplt:name>
+          <askboardplt:description>No Phy</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E1543</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E1543, used for Combo ports.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E1545</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E1545, used for Copper GE with MAC on PHY support.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E1680</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E1680, used for Copper with speeds of 10M/100M/1G.</askboardplt:description>
+          <askboardplt:value>3</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E151X</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E151X, used for Copper (HW supports combo and fiber).</askboardplt:description>
+          <askboardplt:value>4</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E3140</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E3140, used for Copper with speeds of 100M/1G/10G.
+Uses with FW SolarFlare next generation.</askboardplt:description>
+          <askboardplt:value>5</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E3240</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E3240, used for Copper with speeds of 100M/1G/10G.
+Uses with FW, SolarFlare next generation.</askboardplt:description>
+          <askboardplt:value>6</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E3680</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E3680, used for Octal Copper 100M.</askboardplt:description>
+          <askboardplt:value>7</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E3220</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E3220, used for Combo port with speeds of 100M/1G/10G.
+Uses FW, SolarFlare next generation.</askboardplt:description>
+          <askboardplt:value>8</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E1680L</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E1680L, used for Copper with speeds of 10M/100M/1G.</askboardplt:description>
+          <askboardplt:value>9</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E33X0</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E33X0, used for MGIG Combo.</askboardplt:description>
+          <askboardplt:value>10</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E1548</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E1548, used for Fiber GE.</askboardplt:description>
+          <askboardplt:value>11</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E20X0</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E20X0, used for Copper with speeds of 10M/100M/1G/2.5G/5G.</askboardplt:description>
+          <askboardplt:value>12</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E1512</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E1512, used for Copper with speeds of 10M/100M/1G.</askboardplt:description>
+          <askboardplt:value>13</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E2180</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E2180, used for Copper with speeds of 10M/100M/1G/2.5G/5G.</askboardplt:description>
+          <askboardplt:value>14</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E1780</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E1780, Integrated Octal 10/100/1000 Mbps Energy
+Efficient Ethernet Transceiver</askboardplt:description>
+          <askboardplt:value>15</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E2540</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E2540, 4 ports 10/100/1000/2.5G/5GBASE-T Ethernet
+Transceiver with IEEE 1588v2 PTP Support</askboardplt:description>
+          <askboardplt:value>16</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E2580</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E12580, Octal 10/100/1000/2.5G/5GBASE-T Ethernet Transceiver
+with IEEE 1588v2 PTP Support</askboardplt:description>
+          <askboardplt:value>17</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>physical-port-num-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>PHYSICAL PORT NUM</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>1023</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-port-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the ledstream port type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>PORT_TYPE_TRI_SPEED</askboardplt:name>
+          <askboardplt:description>tri-speed port.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>PORT_TYPE_XG</askboardplt:name>
+          <askboardplt:description>XG port.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-blink-select-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the LED stream blink select type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_SELECT_0</askboardplt:name>
+          <askboardplt:description>Blink 0 signal.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_SELECT_1</askboardplt:name>
+          <askboardplt:description>Blink 1 signal</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-order-mode-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the LED stream ordering mode.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>ORDER_MODE_BY_PORT</askboardplt:name>
+          <askboardplt:description>the indication order is arranged by port.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>ORDER_MODE_BY_CLASS</askboardplt:name>
+          <askboardplt:description>the indication order is arranged by class.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-blink-duty-cycle-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the LED stream blink cycle duty cycle type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DUTY_CYCLE_0</askboardplt:name>
+          <askboardplt:description>25% on, 75% off.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DUTY_CYCLE_1</askboardplt:name>
+          <askboardplt:description>50% on, 50% off.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DUTY_CYCLE_2</askboardplt:name>
+          <askboardplt:description>50% on, 50% off.</askboardplt:description>
+          <askboardplt:value>3</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DUTY_CYCLE_3</askboardplt:name>
+          <askboardplt:description>75% on, 25% off.</askboardplt:description>
+          <askboardplt:value>4</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-blink-duration-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the LED stream blink period type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DURATION_0</askboardplt:name>
+          <askboardplt:description>BLINK_DURATION_0.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DURATION_1</askboardplt:name>
+          <askboardplt:description>BLINK_DURATION_1.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DURATION_2</askboardplt:name>
+          <askboardplt:description>BLINK_DURATION_2.</askboardplt:description>
+          <askboardplt:value>3</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DURATION_3</askboardplt:name>
+          <askboardplt:description>BLINK_DURATION_3.</askboardplt:description>
+          <askboardplt:value>4</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DURATION_4</askboardplt:name>
+          <askboardplt:description>BLINK_DURATION_4.</askboardplt:description>
+          <askboardplt:value>5</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DURATION_5</askboardplt:name>
+          <askboardplt:description>BLINK_DURATION_5.</askboardplt:description>
+          <askboardplt:value>6</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DURATION_6</askboardplt:name>
+          <askboardplt:description>(APPLICABLE DEVICES: xCat3; AC5; Lion2; Bobcat2; Caelum; Aldrin; AC3X; Bobcat3; Aldrin2; Pipe) .</askboardplt:description>
+          <askboardplt:value>7</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DURATION_7</askboardplt:name>
+          <askboardplt:description>APPLICABLE DEVICES: Bobcat2; Caelum; Aldrin; AC3X; Bobcat3; Aldrin2; Pipe).</askboardplt:description>
+          <askboardplt:value>8</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-pulse-stretch-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the LED stream length of stretching for dynamic signals.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>PULSE_STRETCH_0_NO</askboardplt:name>
+          <askboardplt:description>PULSE_STRETCH_0_NO.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>PULSE_STRETCH_1</askboardplt:name>
+          <askboardplt:description>PULSE_STRETCH_1.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>PULSE_STRETCH_2</askboardplt:name>
+          <askboardplt:description>PULSE_STRETCH_2.</askboardplt:description>
+          <askboardplt:value>3</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>PULSE_STRETCH_3</askboardplt:name>
+          <askboardplt:description>PULSE_STRETCH_3.</askboardplt:description>
+          <askboardplt:value>4</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>PULSE_STRETCH_4</askboardplt:name>
+          <askboardplt:description>PULSE_STRETCH_4.</askboardplt:description>
+          <askboardplt:value>5</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>PULSE_STRETCH_5</askboardplt:name>
+          <askboardplt:description>PULSE_STRETCH_5.</askboardplt:description>
+          <askboardplt:value>6</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>PULSE_STRETCH_6</askboardplt:name>
+          <askboardplt:description>(APPLICABLE DEVICES: Bobcat2; Caelum; Aldrin; AC3X; Bobcat3; Aldrin2; Falcon; AC5P; Pipe).</askboardplt:description>
+          <askboardplt:value>7</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>PULSE_STRETCH_7</askboardplt:name>
+          <askboardplt:description>(APPLICABLE DEVICES: Bobcat2; Caelum; Aldrin; AC3X; Bobcat3; Aldrin2; Falcon; AC5P; Pipe).</askboardplt:description>
+          <askboardplt:value>8</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-clock-out-frequency-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the LED stream blink cycle duty cycle type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>_CLOCK_OUT_FREQUENCY_500</askboardplt:name>
+          <askboardplt:description>500 KHz LED clock frequency.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>CLOCK_OUT_FREQUENCY_1000</askboardplt:name>
+          <askboardplt:description>1 MHz LED clock frequency.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>CLOCK_OUT_FREQUENCY_2000</askboardplt:name>
+          <askboardplt:description>2 MHz LED clock frequency.</askboardplt:description>
+          <askboardplt:value>3</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>CLOCK_OUT_FREQUENCY_3000</askboardplt:name>
+          <askboardplt:description>3 MHz LED clock frequency.</askboardplt:description>
+          <askboardplt:value>4</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-class5-select-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the LED stream indication displayed on class5 (for dual-media port/phy).</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>CLASS_5_SELECT_HALF_DUPLEX</askboardplt:name>
+          <askboardplt:description>Half Duplex is displayed on class5.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>CLASS_5_SELECT_FIBER_LINK_UP</askboardplt:name>
+          <askboardplt:description>If port is a dual media port, Fiber Link Up is displayed on class5.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-class13-select-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the LED stream indication displayed on class13 (for dual-media port/phy).</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>CLASS_13_SELECT_LINK_DOWN</askboardplt:name>
+          <askboardplt:description>Link Down is displayed on class13.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>CLASS_13_SELECT_COPPER_LINK_UP</askboardplt:name>
+          <askboardplt:description>If port is a dual media port, Copper Link Up is displayed on class13.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-class-num-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Led Class number</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>11</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>boolean-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Boolean 32 bits , due to bing endian</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>false</askboardplt:name>
+          <askboardplt:description>False</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>true</askboardplt:name>
+          <askboardplt:description>True</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>bus-id-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Bus Id Type, PCI/SMI</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>255</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>function-id-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Function Id Type, PCI/SMI</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>255</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>domain-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Domain, PCI/SMI</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>255</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-interface-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Led interface</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>255</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-position-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Led position</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>63</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>serdes-lane-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>serdes lane</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>7</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>cpu-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>The CPU Internal/External</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>external</askboardplt:name>
+          <askboardplt:description>Extrenal connected CPU</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>internal</askboardplt:name>
+          <askboardplt:description>Internal CPU</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-clock-frequency-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Led Clock Frequency Sip6</askboardplt:description>
+        <askboardplt:min>500</askboardplt:min>
+        <askboardplt:max>80000</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-unit-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Led units</askboardplt:description>
+        <askboardplt:min>1</askboardplt:min>
+        <askboardplt:max>16</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-unit-or-no-unit-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Led units, 0 for no Unit</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>16</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-group-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Led Group</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>1</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-force-data-type</askboardplt:name>
+        <askboardplt:type>string</askboardplt:type>
+        <askboardplt:description>A hexadecimal string with octets represented as hex digits
+separated by colons.  The canonical representation uses
+lowercase characters.</askboardplt:description>
+        <askboardplt:min>3</askboardplt:min>
+        <askboardplt:max>11</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>bit-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Bit range 0..31</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>31</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>bit-size-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Bit leng 1..32</askboardplt:description>
+        <askboardplt:min>1</askboardplt:min>
+        <askboardplt:max>32</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-sip-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>The LED scehme</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>na</askboardplt:name>
+          <askboardplt:description>NA</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>sip5</askboardplt:name>
+          <askboardplt:description>SIP5: AC3x</askboardplt:description>
+          <askboardplt:value>5</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>sip6</askboardplt:name>
+          <askboardplt:description>SIP6: Falcon, AC5x</askboardplt:description>
+          <askboardplt:value>6</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>port-cscd-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the cascade port type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>DSA_1_WORD</askboardplt:name>
+          <askboardplt:description>DSA Regular</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>DSA_2_WORDS</askboardplt:name>
+          <askboardplt:description>DSA Extended</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>NETWORK</askboardplt:name>
+          <askboardplt:description>Network.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>DSA_3_WORDS</askboardplt:name>
+          <askboardplt:description>DSA 3 Words</askboardplt:description>
+          <askboardplt:value>3</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>DSA_4_WORD</askboardplt:name>
+          <askboardplt:description>DSA 4 Words</askboardplt:description>
+          <askboardplt:value>4</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>trunk-cscd-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Specifies the Cascade Trunk id.</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>127</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>port-trunk-cscd-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the cascade port type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>cscdPort</askboardplt:name>
+          <askboardplt:description>Cascade port</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>cscdTrunk</askboardplt:name>
+          <askboardplt:description>Csacde trunk</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>hash-cscd-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the hash used by cascade trunk.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>pkt</askboardplt:name>
+          <askboardplt:description>Hash based on packet</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>srcPort</askboardplt:name>
+          <askboardplt:description>Hash based on source port</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>asic-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>ASIC Type</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>ASIC_AC3X</askboardplt:name>
+          <askboardplt:description>AC3X</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>ASIC_AC5X</askboardplt:name>
+          <askboardplt:description>AC5X</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>ASIC_Falcon</askboardplt:name>
+          <askboardplt:description>FALCON</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+    </askboardplt:typedefs>
+    <askboardplt:ASIC_Type askboardplt:type="asic-type">ASIC_Falcon</askboardplt:ASIC_Type>
+    <askboardplt:boardName askboardplt:type="std-string">Falcon-6.4T-256x50G</askboardplt:boardName>
+    <askboardplt:osCallType askboardplt:type="board-callback-type">linux-static</askboardplt:osCallType>
+    <askboardplt:extDrvCallType askboardplt:type="board-callback-type">linux-static</askboardplt:extDrvCallType>
+    <askboardplt:mapType askboardplt:type="board-pp-map-type">autoscan</askboardplt:mapType>
+    <askboardplt:cpuType askboardplt:type="cpu-type">external</askboardplt:cpuType>
+    <askboardplt:mngInterfaceType askboardplt:type="board-pp-interface-channel-type">pci</askboardplt:mngInterfaceType>
+    <askboardplt:adressSpaceType askboardplt:type="board-pp-as-type">atu</askboardplt:adressSpaceType>
+    <askboardplt:device-list>
+      <askboardplt:devNum askboardplt:type="device-id-type">0</askboardplt:devNum>
+      <askboardplt:deviceId askboardplt:type="device-id-type">0</askboardplt:deviceId>
+      <askboardplt:pp-profile-name askboardplt:type="std-string">ASK-PP-F6_4T-128x50G.xml</askboardplt:pp-profile-name>
+      <askboardplt:L1-profile-name askboardplt:type="std-string">ASK-L1-F6_4T-128x50G.xml</askboardplt:L1-profile-name>
+      <askboardplt:ledStreamType askboardplt:type="led-sip-type">sip6</askboardplt:ledStreamType>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">0</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">0</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP0</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">0</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">1</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">1</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">2</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">2</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">3</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">3</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">4</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">4</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">5</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">5</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">6</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">6</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">7</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">7</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">8</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">8</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP1</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">1</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">9</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">9</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">10</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">10</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">11</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">11</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">12</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">12</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">13</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">13</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">14</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">14</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">15</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">15</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">16</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">16</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP0</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">0</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">17</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">17</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">18</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">18</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">19</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">19</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">20</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">20</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">21</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">21</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">22</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">22</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">23</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">23</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">24</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">24</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP1</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">1</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">25</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">25</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">26</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">26</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">27</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">27</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">28</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">28</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">29</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">29</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">30</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">30</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">31</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">31</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">32</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">32</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP0</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">0</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">33</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">33</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">34</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">34</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">35</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">35</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">36</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">36</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">37</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">37</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">38</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">38</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">39</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">39</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">40</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">40</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP1</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">1</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">41</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">41</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">42</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">42</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">43</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">43</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">44</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">44</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">45</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">45</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">46</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">46</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">47</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">47</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">48</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">48</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP0</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">0</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">49</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">49</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">50</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">50</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">51</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">51</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">52</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">52</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">53</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">53</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">54</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">54</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">55</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">55</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">56</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">56</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP1</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">1</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">57</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">57</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">58</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">58</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">59</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">59</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">60</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">60</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">64</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">61</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">65</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">62</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">66</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">63</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">67</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">64</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP0</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">0</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">68</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">65</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">69</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">66</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">70</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">67</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">130</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">127</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">129</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">126</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">128</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">125</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">127</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">124</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">126</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">123</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">125</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">122</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">124</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">121</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">123</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">120</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP1</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">1</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">122</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">119</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">121</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">118</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">120</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">117</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">119</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">116</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">118</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">115</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">117</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">114</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">116</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">113</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">115</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">112</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP0</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">0</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">114</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">111</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">113</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">110</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">112</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">109</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">111</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">108</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">110</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">107</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">109</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">106</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">108</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">105</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">107</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">104</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP1</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">1</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">106</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">103</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">105</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">102</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">104</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">101</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">103</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">100</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">102</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">99</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">101</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">98</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">100</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">97</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">99</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">96</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP0</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">0</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">98</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">95</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">97</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">94</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">96</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">93</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">95</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">92</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">94</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">91</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">93</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">90</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">92</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">89</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">91</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">88</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP1</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">1</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">90</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">87</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">89</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">86</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">88</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">85</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">87</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">84</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">86</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">83</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">85</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">82</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">84</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">81</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">83</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">80</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP0</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">0</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">82</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">79</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">81</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">78</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">80</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">77</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">79</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">76</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">78</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">75</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">77</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">74</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">76</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">73</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">75</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">72</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP1</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">1</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">74</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">71</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">73</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">70</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">72</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">69</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">71</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">68</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">131</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">128</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">132</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">135</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">63</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">cpu_sdma</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">136</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">133</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">cpu_sdma</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">137</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">134</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">cpu_sdma</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">138</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">135</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">cpu_sdma</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">139</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+      </askboardplt:portMap-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">7</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">1</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">6</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">0</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">5</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">3</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">4</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">2</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">8</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">14</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">9</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">15</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">10</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">12</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">11</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">13</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">23</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">17</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">22</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">16</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">21</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">19</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">20</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">18</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">24</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">30</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">25</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">31</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">26</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">28</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">27</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">29</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">39</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">33</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">38</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">32</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">37</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">35</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">36</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">34</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">40</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">41</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">46</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">47</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">42</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">44</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">43</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">45</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">55</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">49</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">54</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">48</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">53</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">51</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">52</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">50</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">56</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">62</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">57</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">63</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">58</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">60</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">59</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">61</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">71</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">65</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">70</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">64</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">69</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">67</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">68</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">66</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">72</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">78</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">73</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">79</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">74</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">76</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">75</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">77</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">87</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">81</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">86</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">80</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">85</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">83</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">84</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">82</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">88</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">94</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">89</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">95</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">90</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">92</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">91</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">93</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">103</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">97</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">102</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">96</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">101</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">99</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">100</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">98</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">104</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">110</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">105</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">111</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">106</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">108</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">107</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">109</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">119</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">113</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">118</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">112</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">117</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">115</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">116</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">114</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">120</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">126</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">121</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">127</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">122</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">124</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">123</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">125</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">128</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">135</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:Ledstream-interface-list>
+        <askboardplt:ledstream-interface-number askboardplt:type="led-interface-type">0</askboardplt:ledstream-interface-number>
+        <askboardplt:ledstream-configSet>
+          <askboardplt:ledOrganize askboardplt:type="led-stream-order-mode-type">ORDER_MODE_BY_CLASS</askboardplt:ledOrganize>
+          <askboardplt:blink0DutyCycle askboardplt:type="led-stream-blink-duty-cycle-type">BLINK_DUTY_CYCLE_0</askboardplt:blink0DutyCycle>
+          <askboardplt:blink0Duration askboardplt:type="led-stream-blink-duration-type">BLINK_DURATION_0</askboardplt:blink0Duration>
+          <askboardplt:blink1DutyCycle askboardplt:type="led-stream-blink-duty-cycle-type">BLINK_DUTY_CYCLE_0</askboardplt:blink1DutyCycle>
+          <askboardplt:blink1Duration askboardplt:type="led-stream-blink-duration-type">BLINK_DURATION_1</askboardplt:blink1Duration>
+          <askboardplt:pulseStretch askboardplt:type="led-stream-pulse-stretch-type">PULSE_STRETCH_1</askboardplt:pulseStretch>
+          <askboardplt:invertEnable askboardplt:type="boolean-type">false</askboardplt:invertEnable>
+          <askboardplt:SIP6ledClockFrequency askboardplt:type="led-stream-clock-frequency-type">1627</askboardplt:SIP6ledClockFrequency>
+          <askboardplt:ledClockPosEdgeModeEnable askboardplt:type="boolean-type">false</askboardplt:ledClockPosEdgeModeEnable>
+          <askboardplt:ledUnit-List>
+            <askboardplt:ledUnit askboardplt:type="led-unit-type">1</askboardplt:ledUnit>
+            <askboardplt:ledStart askboardplt:type="uint32">64</askboardplt:ledStart>
+            <askboardplt:ledEnd askboardplt:type="uint32">66</askboardplt:ledEnd>
+            <askboardplt:ledChainBypass askboardplt:type="boolean-type">false</askboardplt:ledChainBypass>
+          </askboardplt:ledUnit-List>
+          <askboardplt:ledUnit-List>
+            <askboardplt:ledUnit askboardplt:type="led-unit-type">2</askboardplt:ledUnit>
+            <askboardplt:ledStart askboardplt:type="uint32">64</askboardplt:ledStart>
+            <askboardplt:ledEnd askboardplt:type="uint32">65</askboardplt:ledEnd>
+            <askboardplt:ledChainBypass askboardplt:type="boolean-type">false</askboardplt:ledChainBypass>
+          </askboardplt:ledUnit-List>
+          <askboardplt:ledUnit-List>
+            <askboardplt:ledUnit askboardplt:type="led-unit-type">3</askboardplt:ledUnit>
+            <askboardplt:ledStart askboardplt:type="uint32">64</askboardplt:ledStart>
+            <askboardplt:ledEnd askboardplt:type="uint32">65</askboardplt:ledEnd>
+            <askboardplt:ledChainBypass askboardplt:type="boolean-type">false</askboardplt:ledChainBypass>
+          </askboardplt:ledUnit-List>
+          <askboardplt:ledUnit-List>
+            <askboardplt:ledUnit askboardplt:type="led-unit-type">4</askboardplt:ledUnit>
+            <askboardplt:ledStart askboardplt:type="uint32">64</askboardplt:ledStart>
+            <askboardplt:ledEnd askboardplt:type="uint32">66</askboardplt:ledEnd>
+            <askboardplt:ledChainBypass askboardplt:type="boolean-type">false</askboardplt:ledChainBypass>
+          </askboardplt:ledUnit-List>
+          <askboardplt:ledUnit-List>
+            <askboardplt:ledUnit askboardplt:type="led-unit-type">5</askboardplt:ledUnit>
+            <askboardplt:ledStart askboardplt:type="uint32">64</askboardplt:ledStart>
+            <askboardplt:ledEnd askboardplt:type="uint32">66</askboardplt:ledEnd>
+            <askboardplt:ledChainBypass askboardplt:type="boolean-type">false</askboardplt:ledChainBypass>
+          </askboardplt:ledUnit-List>
+          <askboardplt:ledUnit-List>
+            <askboardplt:ledUnit askboardplt:type="led-unit-type">6</askboardplt:ledUnit>
+            <askboardplt:ledStart askboardplt:type="uint32">64</askboardplt:ledStart>
+            <askboardplt:ledEnd askboardplt:type="uint32">65</askboardplt:ledEnd>
+            <askboardplt:ledChainBypass askboardplt:type="boolean-type">false</askboardplt:ledChainBypass>
+          </askboardplt:ledUnit-List>
+          <askboardplt:ledUnit-List>
+            <askboardplt:ledUnit askboardplt:type="led-unit-type">7</askboardplt:ledUnit>
+            <askboardplt:ledStart askboardplt:type="uint32">64</askboardplt:ledStart>
+            <askboardplt:ledEnd askboardplt:type="uint32">65</askboardplt:ledEnd>
+            <askboardplt:ledChainBypass askboardplt:type="boolean-type">false</askboardplt:ledChainBypass>
+          </askboardplt:ledUnit-List>
+          <askboardplt:ledUnit-List>
+            <askboardplt:ledUnit askboardplt:type="led-unit-type">8</askboardplt:ledUnit>
+            <askboardplt:ledStart askboardplt:type="uint32">64</askboardplt:ledStart>
+            <askboardplt:ledEnd askboardplt:type="uint32">66</askboardplt:ledEnd>
+            <askboardplt:ledChainBypass askboardplt:type="boolean-type">false</askboardplt:ledChainBypass>
+          </askboardplt:ledUnit-List>
+        </askboardplt:ledstream-configSet>
+        <askboardplt:ledstream-class-manipulation-list>
+          <askboardplt:classNum askboardplt:type="led-class-num-type">0</askboardplt:classNum>
+          <askboardplt:portType askboardplt:type="led-stream-port-type">PORT_TYPE_XG</askboardplt:portType>
+          <askboardplt:blinkEnable askboardplt:type="boolean-type">false</askboardplt:blinkEnable>
+          <askboardplt:blinkSelect askboardplt:type="led-stream-blink-select-type">BLINK_SELECT_0</askboardplt:blinkSelect>
+          <askboardplt:forceEnable askboardplt:type="boolean-type">false</askboardplt:forceEnable>
+          <askboardplt:pulseStretchEnable askboardplt:type="boolean-type">true</askboardplt:pulseStretchEnable>
+          <askboardplt:disableOnLinkDown askboardplt:type="boolean-type">false</askboardplt:disableOnLinkDown>
+        </askboardplt:ledstream-class-manipulation-list>
+        <askboardplt:ledstream-class-manipulation-list>
+          <askboardplt:classNum askboardplt:type="led-class-num-type">1</askboardplt:classNum>
+          <askboardplt:portType askboardplt:type="led-stream-port-type">PORT_TYPE_XG</askboardplt:portType>
+          <askboardplt:blinkEnable askboardplt:type="boolean-type">false</askboardplt:blinkEnable>
+          <askboardplt:blinkSelect askboardplt:type="led-stream-blink-select-type">BLINK_SELECT_0</askboardplt:blinkSelect>
+          <askboardplt:forceEnable askboardplt:type="boolean-type">false</askboardplt:forceEnable>
+          <askboardplt:pulseStretchEnable askboardplt:type="boolean-type">true</askboardplt:pulseStretchEnable>
+          <askboardplt:disableOnLinkDown askboardplt:type="boolean-type">false</askboardplt:disableOnLinkDown>
+        </askboardplt:ledstream-class-manipulation-list>
+        <askboardplt:ledstream-class-manipulation-list>
+          <askboardplt:classNum askboardplt:type="led-class-num-type">2</askboardplt:classNum>
+          <askboardplt:portType askboardplt:type="led-stream-port-type">PORT_TYPE_XG</askboardplt:portType>
+          <askboardplt:blinkEnable askboardplt:type="boolean-type">true</askboardplt:blinkEnable>
+          <askboardplt:blinkSelect askboardplt:type="led-stream-blink-select-type">BLINK_SELECT_0</askboardplt:blinkSelect>
+          <askboardplt:forceEnable askboardplt:type="boolean-type">false</askboardplt:forceEnable>
+          <askboardplt:pulseStretchEnable askboardplt:type="boolean-type">true</askboardplt:pulseStretchEnable>
+          <askboardplt:disableOnLinkDown askboardplt:type="boolean-type">true</askboardplt:disableOnLinkDown>
+        </askboardplt:ledstream-class-manipulation-list>
+        <askboardplt:ledstream-class-manipulation-list>
+          <askboardplt:classNum askboardplt:type="led-class-num-type">3</askboardplt:classNum>
+          <askboardplt:portType askboardplt:type="led-stream-port-type">PORT_TYPE_XG</askboardplt:portType>
+          <askboardplt:blinkEnable askboardplt:type="boolean-type">false</askboardplt:blinkEnable>
+          <askboardplt:blinkSelect askboardplt:type="led-stream-blink-select-type">BLINK_SELECT_0</askboardplt:blinkSelect>
+          <askboardplt:forceEnable askboardplt:type="boolean-type">false</askboardplt:forceEnable>
+          <askboardplt:pulseStretchEnable askboardplt:type="boolean-type">true</askboardplt:pulseStretchEnable>
+          <askboardplt:disableOnLinkDown askboardplt:type="boolean-type">false</askboardplt:disableOnLinkDown>
+        </askboardplt:ledstream-class-manipulation-list>
+        <askboardplt:ledstream-class-manipulation-list>
+          <askboardplt:classNum askboardplt:type="led-class-num-type">4</askboardplt:classNum>
+          <askboardplt:portType askboardplt:type="led-stream-port-type">PORT_TYPE_XG</askboardplt:portType>
+          <askboardplt:blinkEnable askboardplt:type="boolean-type">false</askboardplt:blinkEnable>
+          <askboardplt:blinkSelect askboardplt:type="led-stream-blink-select-type">BLINK_SELECT_0</askboardplt:blinkSelect>
+          <askboardplt:forceEnable askboardplt:type="boolean-type">false</askboardplt:forceEnable>
+          <askboardplt:pulseStretchEnable askboardplt:type="boolean-type">true</askboardplt:pulseStretchEnable>
+          <askboardplt:disableOnLinkDown askboardplt:type="boolean-type">false</askboardplt:disableOnLinkDown>
+        </askboardplt:ledstream-class-manipulation-list>
+        <askboardplt:ledstream-class-manipulation-list>
+          <askboardplt:classNum askboardplt:type="led-class-num-type">5</askboardplt:classNum>
+          <askboardplt:portType askboardplt:type="led-stream-port-type">PORT_TYPE_XG</askboardplt:portType>
+          <askboardplt:blinkEnable askboardplt:type="boolean-type">false</askboardplt:blinkEnable>
+          <askboardplt:blinkSelect askboardplt:type="led-stream-blink-select-type">BLINK_SELECT_0</askboardplt:blinkSelect>
+          <askboardplt:forceEnable askboardplt:type="boolean-type">false</askboardplt:forceEnable>
+          <askboardplt:pulseStretchEnable askboardplt:type="boolean-type">true</askboardplt:pulseStretchEnable>
+          <askboardplt:disableOnLinkDown askboardplt:type="boolean-type">false</askboardplt:disableOnLinkDown>
+        </askboardplt:ledstream-class-manipulation-list>
+      </askboardplt:Ledstream-interface-list>
+    </askboardplt:device-list>
+    <askboardplt:UDSFilePath askboardplt:type="std-string">/tmp/cpss_uds</askboardplt:UDSFilePath>
+    <askboardplt:serdesMux>
+      <askboardplt:serdesMuxSchemePortMod askboardplt:type="uint32">8</askboardplt:serdesMuxSchemePortMod>
+      <askboardplt:serdesMuxSchemeList>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP0</askboardplt:serdesMuxScheme>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">7</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">1</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">6</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">0</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">5</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">3</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">4</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">2</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+      </askboardplt:serdesMuxSchemeList>
+      <askboardplt:serdesMuxSchemeList>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP1</askboardplt:serdesMuxScheme>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">0</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">6</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">1</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">7</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">2</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">4</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">3</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">5</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+      </askboardplt:serdesMuxSchemeList>
+    </askboardplt:serdesMux>
+  </askboardplt:ASK-Board>
+</data>
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FC128x50G/ASK-L1-F6_4T-128x50G.md5 b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FC128x50G/ASK-L1-F6_4T-128x50G.md5
new file mode 100644
index 000000000..5f5b56ae9
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FC128x50G/ASK-L1-F6_4T-128x50G.md5
@@ -0,0 +1 @@
+51984f20fe0c5fc520468799ed78af96
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FC128x50G/ASK-L1-F6_4T-128x50G.xml b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FC128x50G/ASK-L1-F6_4T-128x50G.xml
new file mode 100644
index 000000000..b79e0a2f0
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FC128x50G/ASK-L1-F6_4T-128x50G.xml
@@ -0,0 +1,1681 @@
+<?xml version="1.0" encoding="utf-8"?>
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-02-19-1.06" profile="Askl1" sid="71d3ab0f-3ac2-452a-a5c9-2dfdc969734a">
+  <ASKL1plt:ASK-L1 xmlns:ASKL1plt="urn:marvell:ASKL1:yang">
+    <ASKL1plt:typedefs>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>interface-mode-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Specifies supported Interface modes</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>1000BASE_X</ASKL1plt:name>
+          <ASKL1plt:description>1G</ASKL1plt:description>
+          <ASKL1plt:value>6</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>SGMII</ASKL1plt:name>
+          <ASKL1plt:description>1G , 2.5G</ASKL1plt:description>
+          <ASKL1plt:value>3</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>QSGMII</ASKL1plt:name>
+          <ASKL1plt:description>1G</ASKL1plt:description>
+          <ASKL1plt:value>13</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>KR</ASKL1plt:name>
+          <ASKL1plt:description>10G, 12G, 20G, 40G, 100G</ASKL1plt:description>
+          <ASKL1plt:value>16</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>SR_LR</ASKL1plt:name>
+          <ASKL1plt:description>5G, 10G, 12G, 20G, 40G</ASKL1plt:description>
+          <ASKL1plt:value>20</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>KR2</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>27</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>KR4</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>28</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>SR_LR2</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>29</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>SR_LR4</ASKL1plt:name>
+          <ASKL1plt:description>100G</ASKL1plt:description>
+          <ASKL1plt:value>30</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>KR_C</ASKL1plt:name>
+          <ASKL1plt:description>CONSORTIUM - 25G</ASKL1plt:description>
+          <ASKL1plt:value>32</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>CR_C</ASKL1plt:name>
+          <ASKL1plt:description>CONSORTIUM - 25G</ASKL1plt:description>
+          <ASKL1plt:value>33</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>KR2_C</ASKL1plt:name>
+          <ASKL1plt:description>CONSORTIUM - 50G</ASKL1plt:description>
+          <ASKL1plt:value>34</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>CR2_C</ASKL1plt:name>
+          <ASKL1plt:description>CONSORTIUM - 50G</ASKL1plt:description>
+          <ASKL1plt:value>35</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>CR</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>36</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>CR2</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>37</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>CR4</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>38</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>KR_S</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>39</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>CR_S</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>40</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>KR8</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>41</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>CR8</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>42</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>SR_LR8</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>43</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>USX_10G_QXGMII</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>51</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>USX_20G_QXGMII</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>52</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>USX_OUSGMII</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>53</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>USX_20G_OXGMII</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>54</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>NA</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>57</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>port-speed-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Specifies supported speeds</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>1G</ASKL1plt:name>
+          <ASKL1plt:description>1G</ASKL1plt:description>
+          <ASKL1plt:value>2</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>10G</ASKL1plt:name>
+          <ASKL1plt:description>10G</ASKL1plt:description>
+          <ASKL1plt:value>3</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>2500M</ASKL1plt:name>
+          <ASKL1plt:description>2.5G</ASKL1plt:description>
+          <ASKL1plt:value>5</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>5G</ASKL1plt:name>
+          <ASKL1plt:description>5G</ASKL1plt:description>
+          <ASKL1plt:value>6</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>25G</ASKL1plt:name>
+          <ASKL1plt:description>25G, used in combination with CPSS_PORT_INTERFACE_MODE_KR_E, CPSS_PORT_INTERFACE_MODE_KR2_E</ASKL1plt:description>
+          <ASKL1plt:value>21</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>40G</ASKL1plt:name>
+          <ASKL1plt:description>40G</ASKL1plt:description>
+          <ASKL1plt:value>9</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>50G</ASKL1plt:name>
+          <ASKL1plt:description>50G</ASKL1plt:description>
+          <ASKL1plt:value>14</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>100G</ASKL1plt:name>
+          <ASKL1plt:description>100G</ASKL1plt:description>
+          <ASKL1plt:value>13</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>200G</ASKL1plt:name>
+          <ASKL1plt:description>200G</ASKL1plt:description>
+          <ASKL1plt:value>24</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>400G</ASKL1plt:name>
+          <ASKL1plt:description>400G</ASKL1plt:description>
+          <ASKL1plt:value>25</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>NA</ASKL1plt:name>
+          <ASKL1plt:description>NA</ASKL1plt:description>
+          <ASKL1plt:value>35</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>fec-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Rx parameter type</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>enabled</ASKL1plt:name>
+          <ASKL1plt:description>Enabled</ASKL1plt:description>
+          <ASKL1plt:value>0</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>disabled</ASKL1plt:name>
+          <ASKL1plt:description>Disabled</ASKL1plt:description>
+          <ASKL1plt:value>1</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rs_enabled</ASKL1plt:name>
+          <ASKL1plt:description>RS FEC enabled</ASKL1plt:description>
+          <ASKL1plt:value>2</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>both_enabled</ASKL1plt:name>
+          <ASKL1plt:description>Both enabled</ASKL1plt:description>
+          <ASKL1plt:value>3</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rs_544_514_enabled</ASKL1plt:name>
+          <ASKL1plt:description>RS FEC 544 and 514</ASKL1plt:description>
+          <ASKL1plt:value>4</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>physical-port-num-type</ASKL1plt:name>
+        <ASKL1plt:type>uint32</ASKL1plt:type>
+        <ASKL1plt:description>PHYSICAL PORT NUM</ASKL1plt:description>
+        <ASKL1plt:min>0</ASKL1plt:min>
+        <ASKL1plt:max>1023</ASKL1plt:max>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>tx-param-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Tx parameter type</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>atten</ASKL1plt:name>
+          <ASKL1plt:description>atten</ASKL1plt:description>
+          <ASKL1plt:value>0</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>post</ASKL1plt:name>
+          <ASKL1plt:description>post</ASKL1plt:description>
+          <ASKL1plt:value>1</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>pre</ASKL1plt:name>
+          <ASKL1plt:description>pre</ASKL1plt:description>
+          <ASKL1plt:value>2</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>pre2</ASKL1plt:name>
+          <ASKL1plt:description>pre2</ASKL1plt:description>
+          <ASKL1plt:value>3</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>pre3</ASKL1plt:name>
+          <ASKL1plt:description>pre3</ASKL1plt:description>
+          <ASKL1plt:value>4</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>peak</ASKL1plt:name>
+          <ASKL1plt:description>peak</ASKL1plt:description>
+          <ASKL1plt:value>5</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>main</ASKL1plt:name>
+          <ASKL1plt:description>main</ASKL1plt:description>
+          <ASKL1plt:value>6</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>txAmpAdjEn</ASKL1plt:name>
+          <ASKL1plt:description>txAmpAdjEn</ASKL1plt:description>
+          <ASKL1plt:value>7</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>emph0</ASKL1plt:name>
+          <ASKL1plt:description>emph0</ASKL1plt:description>
+          <ASKL1plt:value>8</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>emph1</ASKL1plt:name>
+          <ASKL1plt:description>emph1</ASKL1plt:description>
+          <ASKL1plt:value>9</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>txAmpShft</ASKL1plt:name>
+          <ASKL1plt:description>txAmpShft</ASKL1plt:description>
+          <ASKL1plt:value>10</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>txEmphEn</ASKL1plt:name>
+          <ASKL1plt:description>txEmphEn</ASKL1plt:description>
+          <ASKL1plt:value>11</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>txEmphEn1</ASKL1plt:name>
+          <ASKL1plt:description>txEmphEn1</ASKL1plt:description>
+          <ASKL1plt:value>12</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>txAmpAdj</ASKL1plt:name>
+          <ASKL1plt:description>txAmpAdj</ASKL1plt:description>
+          <ASKL1plt:value>13</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>slewCtrlEn</ASKL1plt:name>
+          <ASKL1plt:description>slewCtrlEn</ASKL1plt:description>
+          <ASKL1plt:value>14</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>slewRate</ASKL1plt:name>
+          <ASKL1plt:description>slewRate</ASKL1plt:description>
+          <ASKL1plt:value>15</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>rx-param-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Rx parameter type</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>sqlch</ASKL1plt:name>
+          <ASKL1plt:description>sqlch</ASKL1plt:description>
+          <ASKL1plt:value>0</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>DC</ASKL1plt:name>
+          <ASKL1plt:description>DC</ASKL1plt:description>
+          <ASKL1plt:value>1</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>LF</ASKL1plt:name>
+          <ASKL1plt:description>LF</ASKL1plt:description>
+          <ASKL1plt:value>2</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>HF</ASKL1plt:name>
+          <ASKL1plt:description>HF</ASKL1plt:description>
+          <ASKL1plt:value>3</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>gainShape1</ASKL1plt:name>
+          <ASKL1plt:description>gainShape1</ASKL1plt:description>
+          <ASKL1plt:value>4</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>gainShape2</ASKL1plt:name>
+          <ASKL1plt:description>gainShape2</ASKL1plt:description>
+          <ASKL1plt:value>5</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>shortChannelEn</ASKL1plt:name>
+          <ASKL1plt:description>shortChannelEn</ASKL1plt:description>
+          <ASKL1plt:value>7</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>bfLf</ASKL1plt:name>
+          <ASKL1plt:description>bfLf</ASKL1plt:description>
+          <ASKL1plt:value>8</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>bfHf</ASKL1plt:name>
+          <ASKL1plt:description>bfHf</ASKL1plt:description>
+          <ASKL1plt:value>9</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>minLf</ASKL1plt:name>
+          <ASKL1plt:description>minLf</ASKL1plt:description>
+          <ASKL1plt:value>10</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>maxLf</ASKL1plt:name>
+          <ASKL1plt:description>maxLf</ASKL1plt:description>
+          <ASKL1plt:value>11</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>minHf</ASKL1plt:name>
+          <ASKL1plt:description>minHf</ASKL1plt:description>
+          <ASKL1plt:value>12</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>maxHf</ASKL1plt:name>
+          <ASKL1plt:description>maxHf</ASKL1plt:description>
+          <ASKL1plt:value>13</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>minPre1</ASKL1plt:name>
+          <ASKL1plt:description>minPre1</ASKL1plt:description>
+          <ASKL1plt:value>14</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>maxPre1</ASKL1plt:name>
+          <ASKL1plt:description>maxPre1</ASKL1plt:description>
+          <ASKL1plt:value>15</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>minPre2</ASKL1plt:name>
+          <ASKL1plt:description>minPre2</ASKL1plt:description>
+          <ASKL1plt:value>16</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>maxPre2</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>17</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>minPost</ASKL1plt:name>
+          <ASKL1plt:description>minPost</ASKL1plt:description>
+          <ASKL1plt:value>18</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>maxPost</ASKL1plt:name>
+          <ASKL1plt:description>maxPost</ASKL1plt:description>
+          <ASKL1plt:value>19</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>squelch</ASKL1plt:name>
+          <ASKL1plt:description>squelch</ASKL1plt:description>
+          <ASKL1plt:value>20</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>termination</ASKL1plt:name>
+          <ASKL1plt:description>termination</ASKL1plt:description>
+          <ASKL1plt:value>27</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>coldEnvelope</ASKL1plt:name>
+          <ASKL1plt:description>coldEnvelope</ASKL1plt:description>
+          <ASKL1plt:value>35</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>hotEnvelope</ASKL1plt:name>
+          <ASKL1plt:description>hotEnvelope</ASKL1plt:description>
+          <ASKL1plt:value>36</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>dcGain</ASKL1plt:name>
+          <ASKL1plt:description>dcGain</ASKL1plt:description>
+          <ASKL1plt:value>37</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>bandWidth</ASKL1plt:name>
+          <ASKL1plt:description>bandWidth</ASKL1plt:description>
+          <ASKL1plt:value>38</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>dfe</ASKL1plt:name>
+          <ASKL1plt:description>dfe</ASKL1plt:description>
+          <ASKL1plt:value>39</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>ffeR</ASKL1plt:name>
+          <ASKL1plt:description>ffeR</ASKL1plt:description>
+          <ASKL1plt:value>40</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>ffeC</ASKL1plt:name>
+          <ASKL1plt:description>ffeC</ASKL1plt:description>
+          <ASKL1plt:value>41</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>sampler</ASKL1plt:name>
+          <ASKL1plt:description>sampler</ASKL1plt:description>
+          <ASKL1plt:value>42</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>align90</ASKL1plt:name>
+          <ASKL1plt:description>align90</ASKL1plt:description>
+          <ASKL1plt:value>43</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>ffeS</ASKL1plt:name>
+          <ASKL1plt:description>ffeS</ASKL1plt:description>
+          <ASKL1plt:value>44</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>resSel</ASKL1plt:name>
+          <ASKL1plt:description>resSel</ASKL1plt:description>
+          <ASKL1plt:value>45</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>resShift</ASKL1plt:name>
+          <ASKL1plt:description>resShift</ASKL1plt:description>
+          <ASKL1plt:value>46</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>capSel</ASKL1plt:name>
+          <ASKL1plt:description>capSel</ASKL1plt:description>
+          <ASKL1plt:value>47</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>ffeSettingForce</ASKL1plt:name>
+          <ASKL1plt:description>ffeSettingForce</ASKL1plt:description>
+          <ASKL1plt:value>48</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>adaptedResSel</ASKL1plt:name>
+          <ASKL1plt:description>adaptedResSel</ASKL1plt:description>
+          <ASKL1plt:value>49</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>adaptedCapSel</ASKL1plt:name>
+          <ASKL1plt:description>adaptedCapSel</ASKL1plt:description>
+          <ASKL1plt:value>50</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>selmufi</ASKL1plt:name>
+          <ASKL1plt:description>selmufi</ASKL1plt:description>
+          <ASKL1plt:value>51</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>selmuff</ASKL1plt:name>
+          <ASKL1plt:description>selmuff</ASKL1plt:description>
+          <ASKL1plt:value>52</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>selmupi</ASKL1plt:name>
+          <ASKL1plt:description>selmupi</ASKL1plt:description>
+          <ASKL1plt:value>53</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>selmupf</ASKL1plt:name>
+          <ASKL1plt:description>selmupf</ASKL1plt:description>
+          <ASKL1plt:value>54</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>slewRateCtrl0</ASKL1plt:name>
+          <ASKL1plt:description>slewRateCtrl0</ASKL1plt:description>
+          <ASKL1plt:value>55</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>slewRateCtrl1</ASKL1plt:name>
+          <ASKL1plt:description>slewRateCtrl1</ASKL1plt:description>
+          <ASKL1plt:value>56</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>EO</ASKL1plt:name>
+          <ASKL1plt:description>EO</ASKL1plt:description>
+          <ASKL1plt:value>57</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>dataRate</ASKL1plt:name>
+          <ASKL1plt:description>dataRate</ASKL1plt:description>
+          <ASKL1plt:value>58</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>res1Sel</ASKL1plt:name>
+          <ASKL1plt:description>res1Sel</ASKL1plt:description>
+          <ASKL1plt:value>59</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>res2Sel</ASKL1plt:name>
+          <ASKL1plt:description>res2Sel</ASKL1plt:description>
+          <ASKL1plt:value>60</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>cap1Sel</ASKL1plt:name>
+          <ASKL1plt:description>cap1Sel</ASKL1plt:description>
+          <ASKL1plt:value>61</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>cap2Sel</ASKL1plt:name>
+          <ASKL1plt:description>cap2Sel</ASKL1plt:description>
+          <ASKL1plt:value>62</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>midpointLargeThresKLane</ASKL1plt:name>
+          <ASKL1plt:description>midpointLargeThresKLane</ASKL1plt:description>
+          <ASKL1plt:value>63</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>midpointSmallThresKLane</ASKL1plt:name>
+          <ASKL1plt:description>midpointSmallThresKLane</ASKL1plt:description>
+          <ASKL1plt:value>64</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>midpointLargeThresCLane</ASKL1plt:name>
+          <ASKL1plt:description>midpointLargeThresCLane</ASKL1plt:description>
+          <ASKL1plt:value>65</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>midpointSmallThresCLane</ASKL1plt:name>
+          <ASKL1plt:description>midpointSmallThresCLane</ASKL1plt:description>
+          <ASKL1plt:value>66</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>dfeResF0aHighThresInitLane</ASKL1plt:name>
+          <ASKL1plt:description>dfeResF0aHighThresInitLane</ASKL1plt:description>
+          <ASKL1plt:value>67</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>dfeResF0aHighThresEndLane</ASKL1plt:name>
+          <ASKL1plt:description>dfeResF0aHighThresEndLane</ASKL1plt:description>
+          <ASKL1plt:value>68</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>current1Sel</ASKL1plt:name>
+          <ASKL1plt:description>current1Sel</ASKL1plt:description>
+          <ASKL1plt:value>69</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rl1Sel</ASKL1plt:name>
+          <ASKL1plt:description>rl1Sel</ASKL1plt:description>
+          <ASKL1plt:value>70</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rl1Extra</ASKL1plt:name>
+          <ASKL1plt:description>rl1Extra</ASKL1plt:description>
+          <ASKL1plt:value>71</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>cl1Ctrl</ASKL1plt:name>
+          <ASKL1plt:description>cl1Ctrl</ASKL1plt:description>
+          <ASKL1plt:value>72</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>enMidFreq</ASKL1plt:name>
+          <ASKL1plt:description>enMidFreq</ASKL1plt:description>
+          <ASKL1plt:value>73</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>cs1Mid</ASKL1plt:name>
+          <ASKL1plt:description>cs1Mid</ASKL1plt:description>
+          <ASKL1plt:value>74</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rs1Mid</ASKL1plt:name>
+          <ASKL1plt:description>rs1Mid</ASKL1plt:description>
+          <ASKL1plt:value>75</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rfCtrl</ASKL1plt:name>
+          <ASKL1plt:description>rfCtrl</ASKL1plt:description>
+          <ASKL1plt:value>76</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rl1TiaSel</ASKL1plt:name>
+          <ASKL1plt:description>rl1TiaSel</ASKL1plt:description>
+          <ASKL1plt:value>77</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rl1TiaExtra</ASKL1plt:name>
+          <ASKL1plt:description>rl1TiaExtra</ASKL1plt:description>
+          <ASKL1plt:value>78</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>hpfRSel1st</ASKL1plt:name>
+          <ASKL1plt:description>hpfRSel1st</ASKL1plt:description>
+          <ASKL1plt:value>79</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>current1TiaSel</ASKL1plt:name>
+          <ASKL1plt:description>current1TiaSel</ASKL1plt:description>
+          <ASKL1plt:value>80</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rl2Tune</ASKL1plt:name>
+          <ASKL1plt:description>rl2Tune</ASKL1plt:description>
+          <ASKL1plt:value>81</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rl2Sel</ASKL1plt:name>
+          <ASKL1plt:description>rl2Sel</ASKL1plt:description>
+          <ASKL1plt:value>82</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rs2Sel</ASKL1plt:name>
+          <ASKL1plt:description>rs2Sel</ASKL1plt:description>
+          <ASKL1plt:value>83</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>current2Sel</ASKL1plt:name>
+          <ASKL1plt:description>current2Sel</ASKL1plt:description>
+          <ASKL1plt:value>84</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>hpfRsel2nd</ASKL1plt:name>
+          <ASKL1plt:description>hpfRsel2nd</ASKL1plt:description>
+          <ASKL1plt:value>85</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>BW</ASKL1plt:name>
+          <ASKL1plt:description>BW</ASKL1plt:description>
+          <ASKL1plt:value>86</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>dfeGAIN</ASKL1plt:name>
+          <ASKL1plt:description>dfeGAIN</ASKL1plt:description>
+          <ASKL1plt:value>87</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>dfeGAIN2</ASKL1plt:name>
+          <ASKL1plt:description>dfeGAIN2</ASKL1plt:description>
+          <ASKL1plt:value>88</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>pre1</ASKL1plt:name>
+          <ASKL1plt:description>pre1</ASKL1plt:description>
+          <ASKL1plt:value>89</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>pre2</ASKL1plt:name>
+          <ASKL1plt:description>pre2</ASKL1plt:description>
+          <ASKL1plt:value>90</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>post1</ASKL1plt:name>
+          <ASKL1plt:description>post1</ASKL1plt:description>
+          <ASKL1plt:value>91</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>boolean-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Boolean 32 bits , due to bing endian</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>false</ASKL1plt:name>
+          <ASKL1plt:description>False</ASKL1plt:description>
+          <ASKL1plt:value>0</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>true</ASKL1plt:name>
+          <ASKL1plt:description>True</ASKL1plt:description>
+          <ASKL1plt:value>1</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>serdes-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Serdes Type</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>NA</ASKL1plt:name>
+          <ASKL1plt:description>No serdes</ASKL1plt:description>
+          <ASKL1plt:value>0</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>AVAGO</ASKL1plt:name>
+          <ASKL1plt:description>AVAGO</ASKL1plt:description>
+          <ASKL1plt:value>1</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>COMPHY</ASKL1plt:name>
+          <ASKL1plt:description>COMPHY</ASKL1plt:description>
+          <ASKL1plt:value>2</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>COMPHY_C12G</ASKL1plt:name>
+          <ASKL1plt:description>COMPHY_C12G</ASKL1plt:description>
+          <ASKL1plt:value>3</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>COMPHY_C28G</ASKL1plt:name>
+          <ASKL1plt:description>COMPHY_C28G</ASKL1plt:description>
+          <ASKL1plt:value>4</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>COMPHY_C112G</ASKL1plt:name>
+          <ASKL1plt:description>COMPHY_C112G</ASKL1plt:description>
+          <ASKL1plt:value>5</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>uint8-type</ASKL1plt:name>
+        <ASKL1plt:type>uint32</ASKL1plt:type>
+        <ASKL1plt:description>Uint8 32 bits , due to bing endian</ASKL1plt:description>
+        <ASKL1plt:min>0</ASKL1plt:min>
+        <ASKL1plt:max>255</ASKL1plt:max>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>serdes-termination-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>RX termination mode</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>GND</ASKL1plt:name>
+          <ASKL1plt:description>Enabled</ASKL1plt:description>
+          <ASKL1plt:value>0</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>VDD</ASKL1plt:name>
+          <ASKL1plt:description>Disabled</ASKL1plt:description>
+          <ASKL1plt:value>1</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>FLOATING</ASKL1plt:name>
+          <ASKL1plt:description>RS FEC enabled</ASKL1plt:description>
+          <ASKL1plt:value>2</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>port-interconnect-profile-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Enumerator of interconnect profile.</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>profile_default</ASKL1plt:name>
+          <ASKL1plt:description>Profile Default</ASKL1plt:description>
+          <ASKL1plt:value>0</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>profile_1</ASKL1plt:name>
+          <ASKL1plt:description>Profile 1</ASKL1plt:description>
+          <ASKL1plt:value>1</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>profile_2</ASKL1plt:name>
+          <ASKL1plt:description>Profile 2</ASKL1plt:description>
+          <ASKL1plt:value>2</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+    </ASKL1plt:typedefs>
+    <ASKL1plt:IfModeName>
+      <ASKL1plt:ifModeNameList>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">10GR1Fix</ASKL1plt:ifModeName>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">KR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">10G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">disabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+      </ASKL1plt:ifModeNameList>
+      <ASKL1plt:ifModeNameList>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">CR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">50G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">KR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">50G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">CR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">25G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">KR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">25G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">KR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">10G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">SR_LR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">50G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">SR_LR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">25G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">SR_LR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">10G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">CR</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">50G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">KR</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">50G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">rs_544_514_enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">CR</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">25G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">KR</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">25G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">KR</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">10G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+      </ASKL1plt:ifModeNameList>
+    </ASKL1plt:IfModeName>
+    <ASKL1plt:Port>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">0</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">1</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">2</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">3</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">4</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">5</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">6</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">7</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">8</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">9</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">10</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">11</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">12</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">13</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">14</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">15</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">16</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">17</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">18</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">19</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">20</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">21</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">22</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">23</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">24</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">25</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">26</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">27</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">28</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">29</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">30</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">31</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">32</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">33</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">34</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">35</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">36</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">37</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">38</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">39</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">40</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">41</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">42</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">43</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">44</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">45</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">46</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">47</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">48</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">49</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">50</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">51</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">52</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">53</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">54</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">55</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">56</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">57</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">58</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">59</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">60</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">64</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">65</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">66</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">67</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">68</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">69</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">70</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">71</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">72</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">73</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">74</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">75</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">76</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">77</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">78</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">79</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">80</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">81</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">82</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">83</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">84</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">85</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">86</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">87</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">88</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">89</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">90</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">91</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">92</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">93</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">94</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">95</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">96</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">97</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">98</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">99</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">100</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">101</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">102</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">103</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">104</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">105</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">106</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">107</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">108</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">109</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">110</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">111</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">112</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">113</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">114</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">115</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">116</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">117</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">118</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">119</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">120</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">121</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">122</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">123</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">124</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">125</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">126</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">127</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">128</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">129</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">130</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">50GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">131</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">10GR1Fix</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">132</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">10GR1Fix</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+    </ASKL1plt:Port>
+  </ASKL1plt:ASK-L1>
+</data>
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FC128x50G/ASK-PP-F6_4T-128x50G.md5 b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FC128x50G/ASK-PP-F6_4T-128x50G.md5
new file mode 100644
index 000000000..a42c5128e
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FC128x50G/ASK-PP-F6_4T-128x50G.md5
@@ -0,0 +1 @@
+2af3a9b26c1f50a5b1201246746c1094
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FC128x50G/ASK-PP-F6_4T-128x50G.xml b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FC128x50G/ASK-PP-F6_4T-128x50G.xml
new file mode 100644
index 000000000..e3d2f754e
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FC128x50G/ASK-PP-F6_4T-128x50G.xml
@@ -0,0 +1,1180 @@
+<?xml version="1.0" encoding="utf-8"?>
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-02-19-1.06" profile="Askpp" sid="34f1c14a-b581-422d-bd10-426dfac013dd">
+  <askppplt:ASK-PP xmlns:askppplt="urn:marvell:askpp:yang">
+    <askppplt:typedefs>
+      <askppplt:typedef>
+        <askppplt:name>std-string</askppplt:name>
+        <askppplt:type>string</askppplt:type>
+        <askppplt:description>standard string.</askppplt:description>
+        <askppplt:min>1</askppplt:min>
+        <askppplt:max>100</askppplt:max>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>queue-id-type</askppplt:name>
+        <askppplt:type>uint32</askppplt:type>
+        <askppplt:description>Queue id</askppplt:description>
+        <askppplt:min>0</askppplt:min>
+        <askppplt:max>7</askppplt:max>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>precent-type</askppplt:name>
+        <askppplt:type>uint32</askppplt:type>
+        <askppplt:description>Precent</askppplt:description>
+        <askppplt:min>0</askppplt:min>
+        <askppplt:max>100</askppplt:max>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>phaThreadId-type</askppplt:name>
+        <askppplt:type>uint32</askppplt:type>
+        <askppplt:description>Thread id</askppplt:description>
+        <askppplt:min>1</askppplt:min>
+        <askppplt:max>255</askppplt:max>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>routing-mode-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies routing mode.</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>POLICY_BASED_ROUTING_ONLY</askppplt:name>
+          <askppplt:description>PBR only</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>TCAM_ROUTER_BASED</askppplt:name>
+          <askppplt:description>Router engine or PBR</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>shared-table-mode-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies table sharing modes for L3 (LPM), L2 (FDB), EM (Exact Match)</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>MID_L3_MID_L2_NO_EM</askppplt:name>
+          <askppplt:description>MID_L3_MID_L2_NO_EM</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>MID_L3_MID_L2_MIN_EM</askppplt:name>
+          <askppplt:description>MID_L3_MID_L2_MIN_EM</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>LOW_MAX_L3_MID_LOW_L2_NO_EM</askppplt:name>
+          <askppplt:description>LOW_MAX_L3_MID_LOW_L2_NO_EM</askppplt:description>
+          <askppplt:value>2</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>MAX_L3_MIN_L2_NO_EM</askppplt:name>
+          <askppplt:description>MAX_L3_MIN_L2_NO_EM</askppplt:description>
+          <askppplt:value>3</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>pha-firmware-image-id-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies supported Pha image id</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>DEFAULT</askppplt:name>
+          <askppplt:description>Default PHA firmware image ID</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>01</askppplt:name>
+          <askppplt:description>01 firmware image ID</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>02</askppplt:name>
+          <askppplt:description>02 PHA firmware image ID</askppplt:description>
+          <askppplt:value>2</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>pha-firmware-thread-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies supported Pha thread type</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>IOAM_INGRESS_SWITCH_IPV4</askppplt:name>
+          <askppplt:description>IOAM_INGRESS_SWITCH_IPV4</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>IOAM_INGRESS_SWITCH_IPV6</askppplt:name>
+          <askppplt:description>IOAM_INGRESS_SWITCH_IPV6</askppplt:description>
+          <askppplt:value>2</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>IOAM_TRANSIT_SWITCH_IPV4</askppplt:name>
+          <askppplt:description>IOAM_TRANSIT_SWITCH_IPV4</askppplt:description>
+          <askppplt:value>3</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>IOAM_TRANSIT_SWITCH_IPV6</askppplt:name>
+          <askppplt:description>IOAM_TRANSIT_SWITCH_IPV6</askppplt:description>
+          <askppplt:value>4</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>INT_IOAM_MIRRORING</askppplt:name>
+          <askppplt:description>INT_IOAM_MIRRORING</askppplt:description>
+          <askppplt:value>5</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>INT_IOAM_EGRESS_SWITCH</askppplt:name>
+          <askppplt:description>INT_IOAM_EGRESS_SWITCH</askppplt:description>
+          <askppplt:value>6</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>MPLS_SR_NO_EL</askppplt:name>
+          <askppplt:description>MPLS_SR_NO_EL</askppplt:description>
+          <askppplt:value>7</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>MPLS_SR_ONE_EL</askppplt:name>
+          <askppplt:description>MPLS_SR_ONE_EL</askppplt:description>
+          <askppplt:value>8</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>MPLS_SR_TWO_EL</askppplt:name>
+          <askppplt:description>MPLS_SR_TWO_EL</askppplt:description>
+          <askppplt:value>9</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>MPLS_SR_THREE_EL</askppplt:name>
+          <askppplt:description>MPLS_SR_THREE_EL</askppplt:description>
+          <askppplt:value>10</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>UNIFIED_SR</askppplt:name>
+          <askppplt:description>UNIFIED_SR</askppplt:description>
+          <askppplt:value>11</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>CLASSIFIER_NSH_OVER_ETHERNET</askppplt:name>
+          <askppplt:description>CLASSIFIER_NSH_OVER_ETHERNET</askppplt:description>
+          <askppplt:value>12</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>CLASSIFIER_NSH_OVER_VXLAN_GPE</askppplt:name>
+          <askppplt:description>CLASSIFIER_NSH_OVER_VXLAN_GPE</askppplt:description>
+          <askppplt:value>13</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SFF_NSH_VXLAN_GPE_TO_ETHERNET</askppplt:name>
+          <askppplt:description>SFF_NSH_VXLAN_GPE_TO_ETHERNET</askppplt:description>
+          <askppplt:value>14</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SFF_NSH_ETHERNET_TO_VXLAN_GPE</askppplt:name>
+          <askppplt:description>SFF_NSH_ETHERNET_TO_VXLAN_GPE</askppplt:description>
+          <askppplt:value>15</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>IOAM_EGRESS_SWITCH_IPV6</askppplt:name>
+          <askppplt:description>IOAM_EGRESS_SWITCH_IPV6</askppplt:description>
+          <askppplt:value>16</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_END_NODE</askppplt:name>
+          <askppplt:description>SRV6_END_NODE</askppplt:description>
+          <askppplt:value>17</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_PENULTIMATE_END_NODE</askppplt:name>
+          <askppplt:description>SRV6_PENULTIMATE_END_NODE</askppplt:description>
+          <askppplt:value>18</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_SRC_NODE_1_SEGMENT</askppplt:name>
+          <askppplt:description>SRV6_SRC_NODE_1_SEGMENT</askppplt:description>
+          <askppplt:value>19</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_SRC_NODE_FIRST_PASS_2_3_SEGMENTS</askppplt:name>
+          <askppplt:description>SRV6_SRC_NODE_FIRST_PASS_2_3_SEGMENTS</askppplt:description>
+          <askppplt:value>20</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_SRC_NODE_SECOND_PASS_3_SEGMENTS</askppplt:name>
+          <askppplt:description>SRV6_SRC_NODE_SECOND_PASS_3_SEGMENTS</askppplt:description>
+          <askppplt:value>21</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_SRC_NODE_SECOND_PASS_2_SEGMENTS</askppplt:name>
+          <askppplt:description>SRV6_SRC_NODE_SECOND_PASS_2_SEGMENTS</askppplt:description>
+          <askppplt:value>22</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_NETWORK_ADD_MSB</askppplt:name>
+          <askppplt:description>SGT_NETWORK_ADD_MSB</askppplt:description>
+          <askppplt:value>23</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_NETWORK_FIX</askppplt:name>
+          <askppplt:description>SGT_NETWORK_FIX</askppplt:description>
+          <askppplt:value>24</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_NETWORK_REMOVE</askppplt:name>
+          <askppplt:description>SGT_NETWORK_REMOVE</askppplt:description>
+          <askppplt:value>25</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_EDSA_FIX</askppplt:name>
+          <askppplt:description>SGT_EDSA_FIX</askppplt:description>
+          <askppplt:value>26</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_EDSA_REMOVE</askppplt:name>
+          <askppplt:description>SGT_EDSA_REMOVE</askppplt:description>
+          <askppplt:value>27</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_GBP_FIX_IPV4</askppplt:name>
+          <askppplt:description>SGT_GBP_FIX_IPV4</askppplt:description>
+          <askppplt:value>28</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_GBP_FIX_IPV6</askppplt:name>
+          <askppplt:description>SGT_GBP_FIX_IPV6</askppplt:description>
+          <askppplt:value>29</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_GBP_REMOVE_IPV4</askppplt:name>
+          <askppplt:description>SGT_GBP_REMOVE_IPV4</askppplt:description>
+          <askppplt:value>30</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_GBP_REMOVE_IPV6</askppplt:name>
+          <askppplt:description>SGT_GBP_REMOVE_IPV6</askppplt:description>
+          <askppplt:value>31</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>PTP_PHY_1_STEP</askppplt:name>
+          <askppplt:description>PTP_PHY_1_STEP</askppplt:description>
+          <askppplt:value>32</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>EGRESS_MIRRORING_METADATA</askppplt:name>
+          <askppplt:description>EGRESS_MIRRORING_METADATA</askppplt:description>
+          <askppplt:value>33</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>CC_ERSPAN_TYPE_II_TRG_DEV_LC_IPV4</askppplt:name>
+          <askppplt:description>CC_ERSPAN_TYPE_II_TRG_DEV_LC_IPV4</askppplt:description>
+          <askppplt:value>34</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>CC_ERSPAN_TYPE_II_TRG_DEV_LC_IPV6</askppplt:name>
+          <askppplt:description>CC_ERSPAN_TYPE_II_TRG_DEV_LC_IPV6</askppplt:description>
+          <askppplt:value>35</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>CC_ERSPAN_TYPE_II_TRG_DEV_DIRECT_IPV4</askppplt:name>
+          <askppplt:description>CC_ERSPAN_TYPE_II_TRG_DEV_DIRECT_IPV4</askppplt:description>
+          <askppplt:value>36</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>CC_ERSPAN_TYPE_II_TRG_DEV_DIRECT_IPV6</askppplt:name>
+          <askppplt:description>CC_ERSPAN_TYPE_II_TRG_DEV_DIRECT_IPV6</askppplt:description>
+          <askppplt:value>37</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>CC_ERSPAN_TYPE_II_SRC_DEV</askppplt:name>
+          <askppplt:description>CC_ERSPAN_TYPE_II_SRC_DEV</askppplt:description>
+          <askppplt:value>38</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>VXLAN_GBP_SOURCE_GROUP_POLICY_ID</askppplt:name>
+          <askppplt:description>VXLAN_GBP_SOURCE_GROUP_POLICY_ID</askppplt:description>
+          <askppplt:value>39</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_BEST_EFFORT</askppplt:name>
+          <askppplt:description>SRV6_BEST_EFFORT</askppplt:description>
+          <askppplt:value>40</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_SRC_NODE_1_CONTAINER</askppplt:name>
+          <askppplt:description>SRV6_SRC_NODE_1_CONTAINER</askppplt:description>
+          <askppplt:value>41</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_SRC_NODE_FIRST_PASS_2_3_CONTAINERS</askppplt:name>
+          <askppplt:description>SRV6_SRC_NODE_FIRST_PASS_2_3_CONTAINERS</askppplt:description>
+          <askppplt:value>42</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_SRC_NODE_SECOND_PASS_2_CONTAINERS</askppplt:name>
+          <askppplt:description>SRV6_SRC_NODE_SECOND_PASS_2_CONTAINERS</askppplt:description>
+          <askppplt:value>43</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_SRC_NODE_SECOND_PASS_3_CONTAINERS</askppplt:name>
+          <askppplt:description>SRV6_SRC_NODE_SECOND_PASS_3_CONTAINERS</askppplt:description>
+          <askppplt:value>44</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_END_NODE_COC32_GSID</askppplt:name>
+          <askppplt:description>SRV6_END_NODE_COC32_GSID</askppplt:description>
+          <askppplt:value>45</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>IPV4_TTL_INCREMENT</askppplt:name>
+          <askppplt:description>IPV4_TTL_INCREMENT</askppplt:description>
+          <askppplt:value>46</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>IPV6_HOP_LIMIT_INCREMENT</askppplt:name>
+          <askppplt:description>IPV6_HOP_LIMIT_INCREMENT</askppplt:description>
+          <askppplt:value>47</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>CLEAR_OUTGOING_MTAG_COMMAND</askppplt:name>
+          <askppplt:description>CLEAR_OUTGOING_MTAG_COMMAND</askppplt:description>
+          <askppplt:value>48</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SFLOW_V5_IPV4</askppplt:name>
+          <askppplt:description>SFLOW_V5_IPV4</askppplt:description>
+          <askppplt:value>49</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SFLOW_V5_IPV6</askppplt:name>
+          <askppplt:description>SFLOW_V5_IPV6</askppplt:description>
+          <askppplt:value>50</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SLS</askppplt:name>
+          <askppplt:description>SLS</askppplt:description>
+          <askppplt:value>51</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>trunk-member-mode-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies supported Pha image id</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>NATIVE</askppplt:name>
+          <askppplt:description>NATIVE
+*  the trunk members are filled
+*  according to the order given by application.
+*  Regular trunk may hold max of 8 members.
+*  Cascade trunk may hold :
+*  max of 64 members</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>FLEX</askppplt:name>
+          <askppplt:description>FLEX
+*  A mode to allows flexibility for
+*  each Regular trunk to state it's max number of members (before starting to add members).
+*  (this mode not effect 'cascade trunk' members)
+*  Regular trunk may hold : max of 4K members. (each trunk set it's own limit)
+*  Cascade trunk may hold : max of 64 members.</askppplt:description>
+          <askppplt:value>2</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>number-physical-port-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>AC3X/AC5X 128, falcon 64, 128, 256, 512, 1024</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>no-ports</askppplt:name>
+          <askppplt:description>no-ports</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>64-ports</askppplt:name>
+          <askppplt:description>64-ports</askppplt:description>
+          <askppplt:value>64</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>128-ports</askppplt:name>
+          <askppplt:description>128-ports</askppplt:description>
+          <askppplt:value>128</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>256-ports</askppplt:name>
+          <askppplt:description>256-ports</askppplt:description>
+          <askppplt:value>256</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>512-ports</askppplt:name>
+          <askppplt:description>512-ports</askppplt:description>
+          <askppplt:value>512</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>1024-ports</askppplt:name>
+          <askppplt:description>1024-ports</askppplt:description>
+          <askppplt:value>1024</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>serdes-ref-clock-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies serdes refernce clock.</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>external_25_single_ended</askppplt:name>
+          <askppplt:description>EXTERNAL_25_SINGLE_ENDED</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>external_125_single_ended</askppplt:name>
+          <askppplt:description>EXTERNAL_125_SINGLE_ENDED</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>external_125_diff</askppplt:name>
+          <askppplt:description>EXTERNAL_125_DIFF</askppplt:description>
+          <askppplt:value>2</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>external_156_25_single_ended</askppplt:name>
+          <askppplt:description>EXTERNAL_156_25_SINGLE_ENDED</askppplt:description>
+          <askppplt:value>3</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>external_156_25_diff</askppplt:name>
+          <askppplt:description>EXTERNAL_156_25_DIFF</askppplt:description>
+          <askppplt:value>4</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>internal_125</askppplt:name>
+          <askppplt:description>INTERNAL_125</askppplt:description>
+          <askppplt:value>5</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>cpu-port-id-type</askppplt:name>
+        <askppplt:type>uint32</askppplt:type>
+        <askppplt:description>CPU port id</askppplt:description>
+        <askppplt:min>0</askppplt:min>
+        <askppplt:max>7</askppplt:max>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>rx-buffer-size-type</askppplt:name>
+        <askppplt:type>uint32</askppplt:type>
+        <askppplt:description>Rx Buffer size</askppplt:description>
+        <askppplt:min>64</askppplt:min>
+        <askppplt:max>10240</askppplt:max>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>tx-sdma-queue-mode-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies TX queue mode.</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>Normal</askppplt:name>
+          <askppplt:description>Application</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>Packet_Generator</askppplt:name>
+          <askppplt:description>Traffic generator</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>alloc-method-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies Buffers allocation method.</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>Dynamic_Alloc</askppplt:name>
+          <askppplt:description>Dynamic</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>Static_Alloc</askppplt:name>
+          <askppplt:description>Static</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>au_mesage_lenght-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies Buffers allocation method.</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>4_words</askppplt:name>
+          <askppplt:description>4 Words</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>8_words</askppplt:name>
+          <askppplt:description>8 Words</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>boolean-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Boolean 32 bits , due to bing endian</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>false</askppplt:name>
+          <askppplt:description>False</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>true</askppplt:name>
+          <askppplt:description>True</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>asic-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>ASIC Type</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>ASIC_AC3X</askppplt:name>
+          <askppplt:description>AC3X</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>ASIC_AC5X</askppplt:name>
+          <askppplt:description>AC5X</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>ASIC_Falcon</askppplt:name>
+          <askppplt:description>FALCON</askppplt:description>
+          <askppplt:value>2</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+    </askppplt:typedefs>
+    <askppplt:ASIC_Type askppplt:type="asic-type">ASIC_Falcon</askppplt:ASIC_Type>
+    <askppplt:PPInit>
+      <askppplt:PP-name askppplt:type="std-string">Falcon-6.4</askppplt:PP-name>
+      <askppplt:Phase1>
+        <askppplt:coreClock askppplt:type="uint32">4294967295</askppplt:coreClock>
+        <askppplt:serdesRefClock askppplt:type="serdes-ref-clock-type">external_25_single_ended</askppplt:serdesRefClock>
+        <askppplt:isrAddrCompletionRegionsBmp askppplt:type="uint32">2</askppplt:isrAddrCompletionRegionsBmp>
+        <askppplt:appAddrCompletionRegionsBmp askppplt:type="uint32">60</askppplt:appAddrCompletionRegionsBmp>
+        <askppplt:maxNumOfPhyPortsToUse askppplt:type="number-physical-port-type">256-ports</askppplt:maxNumOfPhyPortsToUse>
+        <askppplt:tcamParityCalcEnable askppplt:type="boolean-type">false</askppplt:tcamParityCalcEnable>
+        <askppplt:apEnable askppplt:type="boolean-type">true</askppplt:apEnable>
+        <askppplt:numOfDataIntegrityElements askppplt:type="uint32">0</askppplt:numOfDataIntegrityElements>
+      </askppplt:Phase1>
+      <askppplt:Phase2>
+        <askppplt:useMultiNetIfSdma askppplt:type="boolean-type">true</askppplt:useMultiNetIfSdma>
+        <askppplt:auqCfg>
+          <askppplt:auDescNum askppplt:type="uint32">4096</askppplt:auDescNum>
+        </askppplt:auqCfg>
+        <askppplt:fuqCfg>
+          <askppplt:fuDescNum askppplt:type="uint32">2048</askppplt:fuDescNum>
+        </askppplt:fuqCfg>
+        <askppplt:multiNetIfCfg>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">0</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">7</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">6</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">5</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">4</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">3</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">2</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">1</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">0</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">7</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">6</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">5</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">4</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">3</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">2</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">1</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">0</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">7</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">6</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">5</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">4</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">3</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">2</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">1</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">0</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">7</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">6</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">5</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">4</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">3</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">2</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">1</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">0</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">1</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">2</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">3</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">4</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">5</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">6</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">7</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">0</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">1</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">2</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">3</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">4</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">5</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">6</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">7</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">0</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">1</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">2</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">3</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">4</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">5</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">6</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">7</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">0</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">1</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">2</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">3</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">4</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">5</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">6</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Packet_Generator</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">256</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">256</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">144</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">7</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Packet_Generator</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">1</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">1</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">3032</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+        </askppplt:multiNetIfCfg>
+        <askppplt:internal>
+          <askppplt:fuqUseSeparate askppplt:type="boolean-type">false</askppplt:fuqUseSeparate>
+          <askppplt:useSecondaryAuq askppplt:type="boolean-type">false</askppplt:useSecondaryAuq>
+          <askppplt:noTraffic2CPU askppplt:type="boolean-type">false</askppplt:noTraffic2CPU>
+          <askppplt:netifSdmaPortGroupId askppplt:type="uint32">0</askppplt:netifSdmaPortGroupId>
+          <askppplt:auMessageLength askppplt:type="au_mesage_lenght-type">8_words</askppplt:auMessageLength>
+          <askppplt:useDoubleAuq askppplt:type="boolean-type">false</askppplt:useDoubleAuq>
+        </askppplt:internal>
+      </askppplt:Phase2>
+      <askppplt:LogicalInit>
+        <askppplt:routingMode askppplt:type="routing-mode-type">TCAM_ROUTER_BASED</askppplt:routingMode>
+        <askppplt:maxNumOfPbrEntries askppplt:type="uint32">0</askppplt:maxNumOfPbrEntries>
+        <askppplt:sharedTableMode askppplt:type="shared-table-mode-type">MID_L3_MID_L2_NO_EM</askppplt:sharedTableMode>
+        <askppplt:ingressDropEnable askppplt:type="boolean-type">false</askppplt:ingressDropEnable>
+      </askppplt:LogicalInit>
+      <askppplt:LibInit>
+        <askppplt:initBridge askppplt:type="boolean-type">true</askppplt:initBridge>
+        <askppplt:initMirror askppplt:type="boolean-type">true</askppplt:initMirror>
+        <askppplt:initNetIf askppplt:type="boolean-type">true</askppplt:initNetIf>
+        <askppplt:initPhy askppplt:type="boolean-type">true</askppplt:initPhy>
+        <askppplt:initPort askppplt:type="boolean-type">true</askppplt:initPort>
+        <askppplt:initTrunk askppplt:type="boolean-type">true</askppplt:initTrunk>
+        <askppplt:Trunk-params>
+          <askppplt:maxNumberOfTrunks askppplt:type="uint32">1023</askppplt:maxNumberOfTrunks>
+          <askppplt:trunkMembersMode askppplt:type="trunk-member-mode-type">FLEX</askppplt:trunkMembersMode>
+        </askppplt:Trunk-params>
+        <askppplt:initPcl askppplt:type="boolean-type">true</askppplt:initPcl>
+        <askppplt:initTcam askppplt:type="boolean-type">true</askppplt:initTcam>
+        <askppplt:initPolicer askppplt:type="boolean-type">true</askppplt:initPolicer>
+        <askppplt:initPha askppplt:type="boolean-type">true</askppplt:initPha>
+        <askppplt:Pha-params>
+          <askppplt:packetOrderChangeEnable askppplt:type="boolean-type">false</askppplt:packetOrderChangeEnable>
+          <askppplt:phaFwImageId askppplt:type="pha-firmware-image-id-type">02</askppplt:phaFwImageId>
+          <askppplt:phaFwImageIdVersion askppplt:type="uint32">0</askppplt:phaFwImageIdVersion>
+        </askppplt:Pha-params>
+      </askppplt:LibInit>
+    </askppplt:PPInit>
+  </askppplt:ASK-PP>
+</data>
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FC128x50G/SAI-F6_4T-128x50G.md5 b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FC128x50G/SAI-F6_4T-128x50G.md5
new file mode 100644
index 000000000..937d5b67f
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FC128x50G/SAI-F6_4T-128x50G.md5
@@ -0,0 +1 @@
+b6f84e11689b4f1c648e63119410f900
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FC128x50G/SAI-F6_4T-128x50G.xml b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FC128x50G/SAI-F6_4T-128x50G.xml
new file mode 100644
index 000000000..31d7b03f1
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FC128x50G/SAI-F6_4T-128x50G.xml
@@ -0,0 +1,883 @@
+<?xml version="1.0" encoding="utf-8"?>
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-02-19-1.06" profile="SAI" sid="c310bbb1-ffca-4c99-9bae-f7d4caff5941">
+  <SAIplt:SAI xmlns:SAIplt="urn:marvell:SAI:yang">
+    <SAIplt:typedefs>
+      <SAIplt:typedef>
+        <SAIplt:name>device-id-type</SAIplt:name>
+        <SAIplt:type>uint32</SAIplt:type>
+        <SAIplt:description>Device ID 0..1</SAIplt:description>
+        <SAIplt:min>0</SAIplt:min>
+        <SAIplt:max>1</SAIplt:max>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>port-id-type</SAIplt:name>
+        <SAIplt:type>uint32</SAIplt:type>
+        <SAIplt:description>Interface number</SAIplt:description>
+        <SAIplt:min>0</SAIplt:min>
+        <SAIplt:max>1023</SAIplt:max>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>logDest-type</SAIplt:name>
+        <SAIplt:type>enumeration</SAIplt:type>
+        <SAIplt:description>Logging Feature Options</SAIplt:description>
+        <SAIplt:enum>
+          <SAIplt:name>SAI_LOG_SYSLOG</SAIplt:name>
+          <SAIplt:description>SYSLOG  {Syslog service should be running to use this option}</SAIplt:description>
+          <SAIplt:value>0</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>SAI_LOG_CONSOLE</SAIplt:name>
+          <SAIplt:description>CONSOLE</SAIplt:description>
+          <SAIplt:value>1</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>SAI_LOG_FILE</SAIplt:name>
+          <SAIplt:description>FILE  {Warning !!! Use with caution. Can cause disk full issues}</SAIplt:description>
+          <SAIplt:value>2</SAIplt:value>
+        </SAIplt:enum>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>InDropCounter-type</SAIplt:name>
+        <SAIplt:type>enumeration</SAIplt:type>
+        <SAIplt:description>Router In Drop Reason Feature Options</SAIplt:description>
+        <SAIplt:enum>
+          <SAIplt:name>TTL_HOPLIMIT_EXCEEDED</SAIplt:name>
+          <SAIplt:description>Router In Drop Counters track TTL &amp; Hop Limit Exceeded Packets</SAIplt:description>
+          <SAIplt:value>0</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>ROUTE_BLACKHOLE</SAIplt:name>
+          <SAIplt:description>Router In Drop Counters track Route Black Hole Packets</SAIplt:description>
+          <SAIplt:value>1</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>IN_DROP_ANY</SAIplt:name>
+          <SAIplt:description>Router In Drop Counters track either TTL &amp; Hop Limit Exceeded or Route Black Hole Packets</SAIplt:description>
+          <SAIplt:value>2</SAIplt:value>
+        </SAIplt:enum>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>log-dest-file-path-type</SAIplt:name>
+        <SAIplt:type>string</SAIplt:type>
+        <SAIplt:description>A string with path to file for logging feature</SAIplt:description>
+        <SAIplt:min>2</SAIplt:min>
+        <SAIplt:max>30</SAIplt:max>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>acl-feature-name-type</SAIplt:name>
+        <SAIplt:type>enumeration</SAIplt:type>
+        <SAIplt:description/>
+        <SAIplt:enum>
+          <SAIplt:name>port-sFlow</SAIplt:name>
+          <SAIplt:description>SFlow over Port</SAIplt:description>
+          <SAIplt:value>0</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>port-counters-ipv4-ipv6</SAIplt:name>
+          <SAIplt:description>Port ipv4/ipv6 counters</SAIplt:description>
+          <SAIplt:value>1</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>control-acl</SAIplt:name>
+          <SAIplt:description>ACLs for control packet handling</SAIplt:description>
+          <SAIplt:value>2</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>debug-counter-acl</SAIplt:name>
+          <SAIplt:description>ACLs for Debug Counters</SAIplt:description>
+          <SAIplt:value>3</SAIplt:value>
+        </SAIplt:enum>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>ingress-acl-stage-type</SAIplt:name>
+        <SAIplt:type>enumeration</SAIplt:type>
+        <SAIplt:description/>
+        <SAIplt:enum>
+          <SAIplt:name>disabled</SAIplt:name>
+          <SAIplt:description>Feature not enabled</SAIplt:description>
+          <SAIplt:value>0</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>IPCL0</SAIplt:name>
+          <SAIplt:description>Stage IPCL0</SAIplt:description>
+          <SAIplt:value>1</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>IPCL1</SAIplt:name>
+          <SAIplt:description>Stage IPCL1</SAIplt:description>
+          <SAIplt:value>2</SAIplt:value>
+        </SAIplt:enum>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>egress-acl-stage-type</SAIplt:name>
+        <SAIplt:type>enumeration</SAIplt:type>
+        <SAIplt:description/>
+        <SAIplt:enum>
+          <SAIplt:name>disabled</SAIplt:name>
+          <SAIplt:description>Feature not enabled</SAIplt:description>
+          <SAIplt:value>0</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>EPCL0</SAIplt:name>
+          <SAIplt:description>Stage EPCL0</SAIplt:description>
+          <SAIplt:value>2</SAIplt:value>
+        </SAIplt:enum>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>feature-priority-type</SAIplt:name>
+        <SAIplt:type>uint32</SAIplt:type>
+        <SAIplt:description>Feature priority</SAIplt:description>
+        <SAIplt:min>2</SAIplt:min>
+        <SAIplt:max>15</SAIplt:max>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>hit-number-type</SAIplt:name>
+        <SAIplt:type>uint32</SAIplt:type>
+        <SAIplt:description>Hit/lookup number</SAIplt:description>
+        <SAIplt:min>0</SAIplt:min>
+        <SAIplt:max>3</SAIplt:max>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>asic-type</SAIplt:name>
+        <SAIplt:type>enumeration</SAIplt:type>
+        <SAIplt:description>ASIC Type</SAIplt:description>
+        <SAIplt:enum>
+          <SAIplt:name>ASIC_AC3X</SAIplt:name>
+          <SAIplt:description>AC3X</SAIplt:description>
+          <SAIplt:value>0</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>ASIC_AC5X</SAIplt:name>
+          <SAIplt:description>AC5X</SAIplt:description>
+          <SAIplt:value>1</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>ASIC_Falcon</SAIplt:name>
+          <SAIplt:description>FALCON</SAIplt:description>
+          <SAIplt:value>2</SAIplt:value>
+        </SAIplt:enum>
+      </SAIplt:typedef>
+    </SAIplt:typedefs>
+    <SAIplt:ASIC_Type SAIplt:type="asic-type">ASIC_Falcon</SAIplt:ASIC_Type>
+    <SAIplt:ASK-BOARD-Profile-Name SAIplt:type="string">ASK-Board-F6_4T-128x50G.xml</SAIplt:ASK-BOARD-Profile-Name>
+    <SAIplt:Ports>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">0</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">130</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">1</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">129</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">2</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">128</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">3</SAIplt:sai_port_id>
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+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">10</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">118</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">9</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">119</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">8</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">120</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">7</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">121</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">6</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">122</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">5</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">123</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">4</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">124</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">3</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">125</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">2</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">126</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">1</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">127</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">0</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">128</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">131</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">129</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">132</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+    </SAIplt:Ports>
+    <SAIplt:scalingFalcon>
+      <SAIplt:max_lag_members SAIplt:type="uint32">8</SAIplt:max_lag_members>
+      <SAIplt:max_route_ipv4 SAIplt:type="uint32">0</SAIplt:max_route_ipv4>
+      <SAIplt:max_route_ipv6 SAIplt:type="uint32">0</SAIplt:max_route_ipv6>
+      <SAIplt:max_Nh_Ecmp_Mbr_Per_Grp SAIplt:type="uint32">64</SAIplt:max_Nh_Ecmp_Mbr_Per_Grp>
+      <SAIplt:max_ipv4_tunnel SAIplt:type="uint32">8</SAIplt:max_ipv4_tunnel>
+      <SAIplt:max_ipv6_tunnel SAIplt:type="uint32">8</SAIplt:max_ipv6_tunnel>
+      <SAIplt:max_tti SAIplt:type="uint32">1024</SAIplt:max_tti>
+      <SAIplt:wred_size SAIplt:type="uint32">0</SAIplt:wred_size>
+      <SAIplt:max_nat SAIplt:type="uint32">0</SAIplt:max_nat>
+    </SAIplt:scalingFalcon>
+    <SAIplt:Counters>
+      <SAIplt:cnc-base-list>
+        <SAIplt:counter-base SAIplt:type="uint32">0</SAIplt:counter-base>
+      </SAIplt:cnc-base-list>
+    </SAIplt:Counters>
+    <SAIplt:Logging>
+      <SAIplt:log_dest SAIplt:type="logDest-type">SAI_LOG_SYSLOG</SAIplt:log_dest>
+    </SAIplt:Logging>
+    <SAIplt:Features-using-acl>
+      <SAIplt:feature SAIplt:type="acl-feature-name-type">control-acl</SAIplt:feature>
+      <SAIplt:feature-priority SAIplt:type="feature-priority-type">3</SAIplt:feature-priority>
+      <SAIplt:Ingress>
+        <SAIplt:ingress-stage SAIplt:type="ingress-acl-stage-type">IPCL0</SAIplt:ingress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">1</SAIplt:hit-number>
+      </SAIplt:Ingress>
+      <SAIplt:Egress>
+        <SAIplt:egress-stage SAIplt:type="egress-acl-stage-type">EPCL0</SAIplt:egress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">0</SAIplt:hit-number>
+      </SAIplt:Egress>
+    </SAIplt:Features-using-acl>
+    <SAIplt:Features-using-acl>
+      <SAIplt:feature SAIplt:type="acl-feature-name-type">port-sFlow</SAIplt:feature>
+      <SAIplt:feature-priority SAIplt:type="feature-priority-type">4</SAIplt:feature-priority>
+      <SAIplt:Ingress>
+        <SAIplt:ingress-stage SAIplt:type="ingress-acl-stage-type">IPCL0</SAIplt:ingress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">0</SAIplt:hit-number>
+      </SAIplt:Ingress>
+      <SAIplt:Egress>
+        <SAIplt:egress-stage SAIplt:type="egress-acl-stage-type">EPCL0</SAIplt:egress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">0</SAIplt:hit-number>
+      </SAIplt:Egress>
+    </SAIplt:Features-using-acl>
+    <SAIplt:Features-using-acl>
+      <SAIplt:feature SAIplt:type="acl-feature-name-type">port-counters-ipv4-ipv6</SAIplt:feature>
+      <SAIplt:feature-priority SAIplt:type="feature-priority-type">5</SAIplt:feature-priority>
+      <SAIplt:Ingress>
+        <SAIplt:ingress-stage SAIplt:type="ingress-acl-stage-type">IPCL0</SAIplt:ingress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">3</SAIplt:hit-number>
+      </SAIplt:Ingress>
+      <SAIplt:Egress>
+        <SAIplt:egress-stage SAIplt:type="egress-acl-stage-type">EPCL0</SAIplt:egress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">0</SAIplt:hit-number>
+      </SAIplt:Egress>
+    </SAIplt:Features-using-acl>
+    <SAIplt:Features-using-acl>
+      <SAIplt:feature SAIplt:type="acl-feature-name-type">debug-counter-acl</SAIplt:feature>
+      <SAIplt:feature-priority SAIplt:type="feature-priority-type">2</SAIplt:feature-priority>
+      <SAIplt:Ingress>
+        <SAIplt:ingress-stage SAIplt:type="ingress-acl-stage-type">IPCL0</SAIplt:ingress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">1</SAIplt:hit-number>
+      </SAIplt:Ingress>
+      <SAIplt:Egress>
+        <SAIplt:egress-stage SAIplt:type="egress-acl-stage-type">EPCL0</SAIplt:egress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">0</SAIplt:hit-number>
+      </SAIplt:Egress>
+    </SAIplt:Features-using-acl>
+  </SAIplt:SAI>
+</data>
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FC128x50G/buffers_defaults_t0.j2 b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FC128x50G/buffers_defaults_t0.j2
new file mode 100644
index 000000000..d207208ed
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FC128x50G/buffers_defaults_t0.j2
@@ -0,0 +1,36 @@
+
+{%- set default_cable = '40m' %}
+
+{%- macro generate_buffer_pool_and_profiles() %}
+    "BUFFER_POOL": {
+        "ingress_lossless_pool": {
+            "size": "11500000",
+            "type": "ingress",
+            "mode": "dynamic"
+        },
+        "egress_pool": {
+            "size": "11500000",
+            "type": "egress",
+            "mode": "static"
+        }
+    },
+    "BUFFER_PROFILE": {
+        "ingress_lossy_profile": {
+            "pool":"ingress_lossless_pool",
+            "size":"0",
+            "dynamic_th":"3"
+        },
+        "egress_lossless_profile": {
+            "pool":"egress_pool",
+            "mode": "static",
+            "size":"42500",
+            "static_th":"0"
+        },
+        "egress_lossy_profile": {
+            "pool":"egress_pool",
+            "size":"0",
+            "mode": "dynamic",
+            "dynamic_th":"3"
+        }
+    },
+{%- endmacro %}
diff --git a/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FC128x50G/buffers_defaults_t1.j2 b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FC128x50G/buffers_defaults_t1.j2
new file mode 100644
index 000000000..0de5fbd21
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FC128x50G/buffers_defaults_t1.j2
@@ -0,0 +1,36 @@
+
+{%- set default_cable = '40m' %}
+
+{%- macro generate_buffer_pool_and_profiles() %}
+    "BUFFER_POOL": {
+        "ingress_lossless_pool": {
+            "size": "11500000",
+            "type": "ingress",
+            "mode": "dynamic"
+        },
+        "egress_pool": {
+            "size": "11500000",
+            "type": "egress",
+            "mode": "static"
+        }
+    },
+    "BUFFER_PROFILE": {
+        "ingress_lossy_profile": {
+            "pool":"ingress_lossless_pool",
+            "size":"0",
+            "dynamic_th":"3"
+        },
+        "egress_lossless_profile": {
+            "pool":"egress_pool",
+            "mode": "static",
+            "size":"42500",
+	    "static_th":"0"
+        },
+        "egress_lossy_profile": {
+            "pool":"egress_pool",
+            "size":"0",
+            "mode": "dynamic",
+            "dynamic_th":"3"
+        }
+    },
+{%- endmacro %}
diff --git a/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FC128x50G/port_config.ini b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FC128x50G/port_config.ini
new file mode 100644
index 000000000..bb752f698
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FC128x50G/port_config.ini
@@ -0,0 +1,131 @@
+#  name         lanes                    alias           speed  autoneg     fec    index
+Ethernet0         0                      fiftyGigE0      50000    on        rs      1
+Ethernet1         1                      fiftyGigE1      50000    on        rs      2
+Ethernet2         2                      fiftyGigE2      50000    on        rs      3
+Ethernet3         3                      fiftyGigE3      50000    on        rs      4
+Ethernet4         4                      fiftyGigE4      50000    on        rs      5
+Ethernet5         5                      fiftyGigE5      50000    on        rs      6
+Ethernet6         6                      fiftyGigE6      50000    on        rs      7
+Ethernet7         7                      fiftyGigE7      50000    on        rs      8
+Ethernet8         8                      fiftyGigE8      50000    on        rs      9
+Ethernet9         9                      fiftyGigE9      50000    on        rs      10
+Ethernet10       10                      fiftyGigE10     50000    on        rs      11
+Ethernet11       11                      fiftyGigE11     50000    on        rs      12
+Ethernet12       12                      fiftyGigE12     50000    on        rs      13
+Ethernet13       13                      fiftyGigE13     50000    on        rs      14
+Ethernet14       14                      fiftyGigE14     50000    on        rs      15
+Ethernet15       15                      fiftyGigE15     50000    on        rs      16
+Ethernet16       16                      fiftyGigE16     50000    on        rs      17
+Ethernet17       17                      fiftyGigE17     50000    on        rs      18
+Ethernet18       18                      fiftyGigE18     50000    on        rs      19
+Ethernet19       19                      fiftyGigE19     50000    on        rs      20
+Ethernet20       20                      fiftyGigE20     50000    on        rs      21
+Ethernet21       21                      fiftyGigE21     50000    on        rs      22
+Ethernet22       22                      fiftyGigE22     50000    on        rs      23
+Ethernet23       23                      fiftyGigE23     50000    on        rs      24
+Ethernet24       24                      fiftyGigE24     50000    on        rs      25
+Ethernet25       25                      fiftyGigE25     50000    on        rs      26
+Ethernet26       26                      fiftyGigE26     50000    on        rs      27
+Ethernet27       27                      fiftyGigE27     50000    on        rs      28
+Ethernet28       28                      fiftyGigE28     50000    on        rs      29
+Ethernet29       29                      fiftyGigE29     50000    on        rs      30
+Ethernet30       30                      fiftyGigE30     50000    on        rs      31
+Ethernet31       31                      fiftyGigE31     50000    on        rs      32
+Ethernet32       32                      fiftyGigE32     50000    on        rs      33
+Ethernet33       33                      fiftyGigE33     50000    on        rs      34
+Ethernet34       34                      fiftyGigE34     50000    on        rs      35
+Ethernet35       35                      fiftyGigE35     50000    on        rs      36
+Ethernet36       36                      fiftyGigE36     50000    on        rs      37
+Ethernet37       37                      fiftyGigE37     50000    on        rs      38
+Ethernet38       38                      fiftyGigE38     50000    on        rs      39
+Ethernet39       39                      fiftyGigE39     50000    on        rs      40
+Ethernet40       40                      fiftyGigE40     50000    on        rs      41
+Ethernet41       41                      fiftyGigE41     50000    on        rs      42
+Ethernet42       42                      fiftyGigE42     50000    on        rs      43
+Ethernet43       43                      fiftyGigE43     50000    on        rs      44
+Ethernet44       44                      fiftyGigE44     50000    on        rs      45
+Ethernet45       45                      fiftyGigE45     50000    on        rs      46
+Ethernet46       46                      fiftyGigE46     50000    on        rs      47
+Ethernet47       47                      fiftyGigE47     50000    on        rs      48
+Ethernet48       48                      fiftyGigE48     50000    on        rs      49
+Ethernet49       49                      fiftyGigE49     50000    on        rs      50
+Ethernet50       50                      fiftyGigE50     50000    on        rs      51
+Ethernet51       51                      fiftyGigE51     50000    on        rs      52
+Ethernet52       52                      fiftyGigE52     50000    on        rs      53
+Ethernet53       53                      fiftyGigE53     50000    on        rs      54
+Ethernet54       54                      fiftyGigE54     50000    on        rs      55
+Ethernet55       55                      fiftyGigE55     50000    on        rs      56
+Ethernet56       56                      fiftyGigE56     50000    on        rs      57
+Ethernet57       57                      fiftyGigE57     50000    on        rs      58
+Ethernet58       58                      fiftyGigE58     50000    on        rs      59
+Ethernet59       59                      fiftyGigE59     50000    on        rs      60
+Ethernet60       60                      fiftyGigE60     50000    on        rs      61
+Ethernet61       61                      fiftyGigE61     50000    on        rs      62
+Ethernet62       62                      fiftyGigE62     50000    on        rs      63
+Ethernet63       63                      fiftyGigE63     50000    on        rs      64
+Ethernet64       64                      fiftyGigE64     50000    on        rs      65
+Ethernet65       65                      fiftyGigE65     50000    on        rs      66
+Ethernet66       66                      fiftyGigE66     50000    on        rs      67
+Ethernet67       67                      fiftyGigE67     50000    on        rs      68
+Ethernet68       68                      fiftyGigE68     50000    on        rs      69
+Ethernet69       69                      fiftyGigE69     50000    on        rs      70
+Ethernet70       70                      fiftyGigE70     50000    on        rs      71
+Ethernet71       71                      fiftyGigE71     50000    on        rs      72
+Ethernet72       72                      fiftyGigE72     50000    on        rs      73
+Ethernet73       73                      fiftyGigE73     50000    on        rs      74
+Ethernet74       74                      fiftyGigE74     50000    on        rs      75
+Ethernet75       75                      fiftyGigE75     50000    on        rs      76
+Ethernet76       76                      fiftyGigE76     50000    on        rs      77
+Ethernet77       77                      fiftyGigE77     50000    on        rs      78
+Ethernet78       78                      fiftyGigE78     50000    on        rs      79
+Ethernet79       79                      fiftyGigE79     50000    on        rs      80
+Ethernet80       80                      fiftyGigE80     50000    on        rs      81
+Ethernet81       81                      fiftyGigE81     50000    on        rs      82
+Ethernet82       82                      fiftyGigE82     50000    on        rs      83
+Ethernet83       83                      fiftyGigE83     50000    on        rs      84
+Ethernet84       84                      fiftyGigE84     50000    on        rs      85
+Ethernet85       85                      fiftyGigE85     50000    on        rs      86
+Ethernet86       86                      fiftyGigE86     50000    on        rs      87
+Ethernet87       87                      fiftyGigE87     50000    on        rs      88
+Ethernet88       88                      fiftyGigE88     50000    on        rs      89
+Ethernet89       89                      fiftyGigE89     50000    on        rs      90
+Ethernet90       90                      fiftyGigE90     50000    on        rs      91
+Ethernet91       91                      fiftyGigE91     50000    on        rs      92
+Ethernet92       92                      fiftyGigE92     50000    on        rs      93
+Ethernet93       93                      fiftyGigE93     50000    on        rs      94
+Ethernet94       94                      fiftyGigE94     50000    on        rs      95
+Ethernet95       95                      fiftyGigE95     50000    on        rs      96
+Ethernet96       96                      fiftyGigE96     50000    on        rs      97
+Ethernet97       97                      fiftyGigE97     50000    on        rs      98
+Ethernet98       98                      fiftyGigE98     50000    on        rs      99
+Ethernet99       99                      fiftyGigE99     50000    on        rs      100
+Ethernet100     100                      fiftyGigE100    50000    on        rs      101
+Ethernet101     101                      fiftyGigE101    50000    on        rs      102
+Ethernet102     102                      fiftyGigE102    50000    on        rs      103
+Ethernet103     103                      fiftyGigE103    50000    on        rs      104
+Ethernet104     104                      fiftyGigE104    50000    on        rs      105
+Ethernet105     105                      fiftyGigE105    50000    on        rs      106
+Ethernet106     106                      fiftyGigE106    50000    on        rs      107
+Ethernet107     107                      fiftyGigE107    50000    on        rs      108
+Ethernet108     108                      fiftyGigE108    50000    on        rs      109
+Ethernet109     109                      fiftyGigE109    50000    on        rs      110
+Ethernet110     110                      fiftyGigE110    50000    on        rs      111
+Ethernet111     111                      fiftyGigE111    50000    on        rs      112
+Ethernet112     112                      fiftyGigE112    50000    on        rs      113
+Ethernet113     113                      fiftyGigE113    50000    on        rs      114
+Ethernet114     114                      fiftyGigE114    50000    on        rs      115
+Ethernet115     115                      fiftyGigE115    50000    on        rs      116
+Ethernet116     116                      fiftyGigE116    50000    on        rs      117
+Ethernet117     117                      fiftyGigE117    50000    on        rs      118
+Ethernet118     118                      fiftyGigE118    50000    on        rs      119
+Ethernet119     119                      fiftyGigE119    50000    on        rs      120
+Ethernet120     120                      fiftyGigE120    50000    on        rs      121
+Ethernet121     121                      fiftyGigE121    50000    on        rs      122
+Ethernet122     122                      fiftyGigE122    50000    on        rs      123
+Ethernet123     123                      fiftyGigE123    50000    on        rs      124
+Ethernet124     124                      fiftyGigE124    50000    on        rs      125
+Ethernet125     125                      fiftyGigE125    50000    on        rs      126
+Ethernet126     126                      fiftyGigE126    50000    on        rs      127
+Ethernet127     127                      fiftyGigE127    50000    on        rs      128
+Ethernet128     128                      tenGigE128      10000    off       none    129
+Ethernet129     129                      tenGigE129      10000    off       none    130
diff --git a/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FC128x50G/profile.ini b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FC128x50G/profile.ini
new file mode 100644
index 000000000..c2f77685a
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FC128x50G/profile.ini
@@ -0,0 +1 @@
+switchMacAddress=00:01:02:03:04:05
diff --git a/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FC128x50G/sai.profile b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FC128x50G/sai.profile
new file mode 100644
index 000000000..74f7334f5
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FC128x50G/sai.profile
@@ -0,0 +1,4 @@
+mode=1
+hwId=FC128x50G
+switchProfile=/usr/share/sonic/hwsku/SAI-F6_4T-128x50G.xml
+SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/profile.ini
diff --git a/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FC48x25G4x100GR4/ASK-Board-F6_4T-48x25G-4x100G.md5 b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FC48x25G4x100GR4/ASK-Board-F6_4T-48x25G-4x100G.md5
new file mode 100644
index 000000000..8c4e2fc53
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FC48x25G4x100GR4/ASK-Board-F6_4T-48x25G-4x100G.md5
@@ -0,0 +1 @@
+8aeebdef0a211f5143f1084019654814
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FC48x25G4x100GR4/ASK-Board-F6_4T-48x25G-4x100G.xml b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FC48x25G4x100GR4/ASK-Board-F6_4T-48x25G-4x100G.xml
new file mode 100644
index 000000000..d88594c3e
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FC48x25G4x100GR4/ASK-Board-F6_4T-48x25G-4x100G.xml
@@ -0,0 +1,2606 @@
+<?xml version="1.0" encoding="utf-8"?>
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-02-19-1.06" profile="Askboard" sid="eb53f80b-5892-4f8b-9197-a6f626effaba">
+  <askboardplt:ASK-Board xmlns:askboardplt="urn:marvell:askboard:yang">
+    <askboardplt:typedefs>
+      <askboardplt:typedef>
+        <askboardplt:name>std-string</askboardplt:name>
+        <askboardplt:type>string</askboardplt:type>
+        <askboardplt:description>standard string.</askboardplt:description>
+        <askboardplt:min>1</askboardplt:min>
+        <askboardplt:max>100</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>board-callback-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies os/ext drv callback types.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>linux-static</askboardplt:name>
+          <askboardplt:description>Linux Static</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>linux-shared</askboardplt:name>
+          <askboardplt:description>Linux Shared Lib mode</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>external</askboardplt:name>
+          <askboardplt:description>External Os</askboardplt:description>
+          <askboardplt:value>3</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>freeBsd</askboardplt:name>
+          <askboardplt:description>Free BSD</askboardplt:description>
+          <askboardplt:value>4</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>board-pp-map-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies pci info types.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>fixed</askboardplt:name>
+          <askboardplt:description>Fixed</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>autoscan</askboardplt:name>
+          <askboardplt:description>Auto scan</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>board-pp-interface-channel-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies channel interface type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>pci</askboardplt:name>
+          <askboardplt:description>PCI</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>smi</askboardplt:name>
+          <askboardplt:description>SMI</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>twsi</askboardplt:name>
+          <askboardplt:description>TWSI</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>board-pp-as-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies Address space type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>4_regions</askboardplt:name>
+          <askboardplt:description>address-space 4 regions</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>8_regions</askboardplt:name>
+          <askboardplt:description>address-space 8 regions</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>atu</askboardplt:name>
+          <askboardplt:description>address translation unit</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>device-id-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Device ID 0..1</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>1</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>port-mapping-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies port map type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>ethernet_mac</askboardplt:name>
+          <askboardplt:description>ETHERNET_MAC</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>cpu_sdma</askboardplt:name>
+          <askboardplt:description>CPU_SDMA</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>interface-num-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Interface number</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>1023</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>txq-port-number-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>TXq port number </askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>99</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>phy-smi-interface-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Phy SMI interface type.</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>3</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>phy-xsmi-interface-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Phy XSMI interface type.</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>15</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>phy-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the PHY Part Identifier.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>NA</askboardplt:name>
+          <askboardplt:description>No Phy</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E1543</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E1543, used for Combo ports.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E1545</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E1545, used for Copper GE with MAC on PHY support.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E1680</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E1680, used for Copper with speeds of 10M/100M/1G.</askboardplt:description>
+          <askboardplt:value>3</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E151X</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E151X, used for Copper (HW supports combo and fiber).</askboardplt:description>
+          <askboardplt:value>4</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E3140</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E3140, used for Copper with speeds of 100M/1G/10G.
+Uses with FW SolarFlare next generation.</askboardplt:description>
+          <askboardplt:value>5</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E3240</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E3240, used for Copper with speeds of 100M/1G/10G.
+Uses with FW, SolarFlare next generation.</askboardplt:description>
+          <askboardplt:value>6</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E3680</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E3680, used for Octal Copper 100M.</askboardplt:description>
+          <askboardplt:value>7</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E3220</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E3220, used for Combo port with speeds of 100M/1G/10G.
+Uses FW, SolarFlare next generation.</askboardplt:description>
+          <askboardplt:value>8</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E1680L</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E1680L, used for Copper with speeds of 10M/100M/1G.</askboardplt:description>
+          <askboardplt:value>9</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E33X0</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E33X0, used for MGIG Combo.</askboardplt:description>
+          <askboardplt:value>10</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E1548</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E1548, used for Fiber GE.</askboardplt:description>
+          <askboardplt:value>11</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E20X0</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E20X0, used for Copper with speeds of 10M/100M/1G/2.5G/5G.</askboardplt:description>
+          <askboardplt:value>12</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E1512</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E1512, used for Copper with speeds of 10M/100M/1G.</askboardplt:description>
+          <askboardplt:value>13</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E2180</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E2180, used for Copper with speeds of 10M/100M/1G/2.5G/5G.</askboardplt:description>
+          <askboardplt:value>14</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E1780</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E1780, Integrated Octal 10/100/1000 Mbps Energy
+Efficient Ethernet Transceiver</askboardplt:description>
+          <askboardplt:value>15</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E2540</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E2540, 4 ports 10/100/1000/2.5G/5GBASE-T Ethernet
+Transceiver with IEEE 1588v2 PTP Support</askboardplt:description>
+          <askboardplt:value>16</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E2580</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E12580, Octal 10/100/1000/2.5G/5GBASE-T Ethernet Transceiver
+with IEEE 1588v2 PTP Support</askboardplt:description>
+          <askboardplt:value>17</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>physical-port-num-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>PHYSICAL PORT NUM</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>1023</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-port-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the ledstream port type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>PORT_TYPE_TRI_SPEED</askboardplt:name>
+          <askboardplt:description>tri-speed port.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>PORT_TYPE_XG</askboardplt:name>
+          <askboardplt:description>XG port.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-blink-select-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the LED stream blink select type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_SELECT_0</askboardplt:name>
+          <askboardplt:description>Blink 0 signal.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_SELECT_1</askboardplt:name>
+          <askboardplt:description>Blink 1 signal</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-order-mode-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the LED stream ordering mode.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>ORDER_MODE_BY_PORT</askboardplt:name>
+          <askboardplt:description>the indication order is arranged by port.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>ORDER_MODE_BY_CLASS</askboardplt:name>
+          <askboardplt:description>the indication order is arranged by class.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-blink-duty-cycle-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the LED stream blink cycle duty cycle type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DUTY_CYCLE_0</askboardplt:name>
+          <askboardplt:description>25% on, 75% off.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DUTY_CYCLE_1</askboardplt:name>
+          <askboardplt:description>50% on, 50% off.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DUTY_CYCLE_2</askboardplt:name>
+          <askboardplt:description>50% on, 50% off.</askboardplt:description>
+          <askboardplt:value>3</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DUTY_CYCLE_3</askboardplt:name>
+          <askboardplt:description>75% on, 25% off.</askboardplt:description>
+          <askboardplt:value>4</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-blink-duration-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the LED stream blink period type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DURATION_0</askboardplt:name>
+          <askboardplt:description>BLINK_DURATION_0.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DURATION_1</askboardplt:name>
+          <askboardplt:description>BLINK_DURATION_1.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DURATION_2</askboardplt:name>
+          <askboardplt:description>BLINK_DURATION_2.</askboardplt:description>
+          <askboardplt:value>3</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DURATION_3</askboardplt:name>
+          <askboardplt:description>BLINK_DURATION_3.</askboardplt:description>
+          <askboardplt:value>4</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DURATION_4</askboardplt:name>
+          <askboardplt:description>BLINK_DURATION_4.</askboardplt:description>
+          <askboardplt:value>5</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DURATION_5</askboardplt:name>
+          <askboardplt:description>BLINK_DURATION_5.</askboardplt:description>
+          <askboardplt:value>6</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DURATION_6</askboardplt:name>
+          <askboardplt:description>(APPLICABLE DEVICES: xCat3; AC5; Lion2; Bobcat2; Caelum; Aldrin; AC3X; Bobcat3; Aldrin2; Pipe) .</askboardplt:description>
+          <askboardplt:value>7</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DURATION_7</askboardplt:name>
+          <askboardplt:description>APPLICABLE DEVICES: Bobcat2; Caelum; Aldrin; AC3X; Bobcat3; Aldrin2; Pipe).</askboardplt:description>
+          <askboardplt:value>8</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-pulse-stretch-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the LED stream length of stretching for dynamic signals.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>PULSE_STRETCH_0_NO</askboardplt:name>
+          <askboardplt:description>PULSE_STRETCH_0_NO.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>PULSE_STRETCH_1</askboardplt:name>
+          <askboardplt:description>PULSE_STRETCH_1.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>PULSE_STRETCH_2</askboardplt:name>
+          <askboardplt:description>PULSE_STRETCH_2.</askboardplt:description>
+          <askboardplt:value>3</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>PULSE_STRETCH_3</askboardplt:name>
+          <askboardplt:description>PULSE_STRETCH_3.</askboardplt:description>
+          <askboardplt:value>4</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>PULSE_STRETCH_4</askboardplt:name>
+          <askboardplt:description>PULSE_STRETCH_4.</askboardplt:description>
+          <askboardplt:value>5</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>PULSE_STRETCH_5</askboardplt:name>
+          <askboardplt:description>PULSE_STRETCH_5.</askboardplt:description>
+          <askboardplt:value>6</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>PULSE_STRETCH_6</askboardplt:name>
+          <askboardplt:description>(APPLICABLE DEVICES: Bobcat2; Caelum; Aldrin; AC3X; Bobcat3; Aldrin2; Falcon; AC5P; Pipe).</askboardplt:description>
+          <askboardplt:value>7</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>PULSE_STRETCH_7</askboardplt:name>
+          <askboardplt:description>(APPLICABLE DEVICES: Bobcat2; Caelum; Aldrin; AC3X; Bobcat3; Aldrin2; Falcon; AC5P; Pipe).</askboardplt:description>
+          <askboardplt:value>8</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-clock-out-frequency-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the LED stream blink cycle duty cycle type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>_CLOCK_OUT_FREQUENCY_500</askboardplt:name>
+          <askboardplt:description>500 KHz LED clock frequency.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>CLOCK_OUT_FREQUENCY_1000</askboardplt:name>
+          <askboardplt:description>1 MHz LED clock frequency.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>CLOCK_OUT_FREQUENCY_2000</askboardplt:name>
+          <askboardplt:description>2 MHz LED clock frequency.</askboardplt:description>
+          <askboardplt:value>3</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>CLOCK_OUT_FREQUENCY_3000</askboardplt:name>
+          <askboardplt:description>3 MHz LED clock frequency.</askboardplt:description>
+          <askboardplt:value>4</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-class5-select-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the LED stream indication displayed on class5 (for dual-media port/phy).</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>CLASS_5_SELECT_HALF_DUPLEX</askboardplt:name>
+          <askboardplt:description>Half Duplex is displayed on class5.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>CLASS_5_SELECT_FIBER_LINK_UP</askboardplt:name>
+          <askboardplt:description>If port is a dual media port, Fiber Link Up is displayed on class5.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-class13-select-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the LED stream indication displayed on class13 (for dual-media port/phy).</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>CLASS_13_SELECT_LINK_DOWN</askboardplt:name>
+          <askboardplt:description>Link Down is displayed on class13.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>CLASS_13_SELECT_COPPER_LINK_UP</askboardplt:name>
+          <askboardplt:description>If port is a dual media port, Copper Link Up is displayed on class13.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-class-num-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Led Class number</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>11</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>boolean-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Boolean 32 bits , due to bing endian</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>false</askboardplt:name>
+          <askboardplt:description>False</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>true</askboardplt:name>
+          <askboardplt:description>True</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>bus-id-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Bus Id Type, PCI/SMI</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>255</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>function-id-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Function Id Type, PCI/SMI</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>255</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>domain-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Domain, PCI/SMI</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>255</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-interface-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Led interface</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>255</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-position-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Led position</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>63</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>serdes-lane-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>serdes lane</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>7</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>cpu-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>The CPU Internal/External</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>external</askboardplt:name>
+          <askboardplt:description>Extrenal connected CPU</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>internal</askboardplt:name>
+          <askboardplt:description>Internal CPU</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-clock-frequency-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Led Clock Frequency Sip6</askboardplt:description>
+        <askboardplt:min>500</askboardplt:min>
+        <askboardplt:max>80000</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-unit-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Led units</askboardplt:description>
+        <askboardplt:min>1</askboardplt:min>
+        <askboardplt:max>16</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-unit-or-no-unit-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Led units, 0 for no Unit</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>16</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-group-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Led Group</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>1</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-force-data-type</askboardplt:name>
+        <askboardplt:type>string</askboardplt:type>
+        <askboardplt:description>A hexadecimal string with octets represented as hex digits
+separated by colons.  The canonical representation uses
+lowercase characters.</askboardplt:description>
+        <askboardplt:min>3</askboardplt:min>
+        <askboardplt:max>11</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>bit-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Bit range 0..31</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>31</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>bit-size-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Bit leng 1..32</askboardplt:description>
+        <askboardplt:min>1</askboardplt:min>
+        <askboardplt:max>32</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-sip-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>The LED scehme</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>na</askboardplt:name>
+          <askboardplt:description>NA</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>sip5</askboardplt:name>
+          <askboardplt:description>SIP5: AC3x</askboardplt:description>
+          <askboardplt:value>5</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>sip6</askboardplt:name>
+          <askboardplt:description>SIP6: Falcon, AC5x</askboardplt:description>
+          <askboardplt:value>6</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>port-cscd-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the cascade port type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>DSA_1_WORD</askboardplt:name>
+          <askboardplt:description>DSA Regular</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>DSA_2_WORDS</askboardplt:name>
+          <askboardplt:description>DSA Extended</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>NETWORK</askboardplt:name>
+          <askboardplt:description>Network.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>DSA_3_WORDS</askboardplt:name>
+          <askboardplt:description>DSA 3 Words</askboardplt:description>
+          <askboardplt:value>3</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>DSA_4_WORD</askboardplt:name>
+          <askboardplt:description>DSA 4 Words</askboardplt:description>
+          <askboardplt:value>4</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>trunk-cscd-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Specifies the Cascade Trunk id.</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>127</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>port-trunk-cscd-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the cascade port type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>cscdPort</askboardplt:name>
+          <askboardplt:description>Cascade port</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>cscdTrunk</askboardplt:name>
+          <askboardplt:description>Csacde trunk</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>hash-cscd-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the hash used by cascade trunk.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>pkt</askboardplt:name>
+          <askboardplt:description>Hash based on packet</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>srcPort</askboardplt:name>
+          <askboardplt:description>Hash based on source port</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>asic-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>ASIC Type</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>ASIC_AC3X</askboardplt:name>
+          <askboardplt:description>AC3X</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>ASIC_AC5X</askboardplt:name>
+          <askboardplt:description>AC5X</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>ASIC_Falcon</askboardplt:name>
+          <askboardplt:description>FALCON</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+    </askboardplt:typedefs>
+    <askboardplt:ASIC_Type askboardplt:type="asic-type">ASIC_Falcon</askboardplt:ASIC_Type>
+    <askboardplt:boardName askboardplt:type="std-string">Falcon-6.4T-48x25G-4x100G</askboardplt:boardName>
+    <askboardplt:osCallType askboardplt:type="board-callback-type">linux-static</askboardplt:osCallType>
+    <askboardplt:extDrvCallType askboardplt:type="board-callback-type">linux-static</askboardplt:extDrvCallType>
+    <askboardplt:mapType askboardplt:type="board-pp-map-type">autoscan</askboardplt:mapType>
+    <askboardplt:cpuType askboardplt:type="cpu-type">external</askboardplt:cpuType>
+    <askboardplt:mngInterfaceType askboardplt:type="board-pp-interface-channel-type">pci</askboardplt:mngInterfaceType>
+    <askboardplt:adressSpaceType askboardplt:type="board-pp-as-type">atu</askboardplt:adressSpaceType>
+    <askboardplt:device-list>
+      <askboardplt:devNum askboardplt:type="device-id-type">0</askboardplt:devNum>
+      <askboardplt:deviceId askboardplt:type="device-id-type">0</askboardplt:deviceId>
+      <askboardplt:pp-profile-name askboardplt:type="std-string">ASK-PP-F6_4T-48x25G-4x100G.xml</askboardplt:pp-profile-name>
+      <askboardplt:L1-profile-name askboardplt:type="std-string">ASK-L1-F6_4T-48x25G-4x100G.xml</askboardplt:L1-profile-name>
+      <askboardplt:ledStreamType askboardplt:type="led-sip-type">sip6</askboardplt:ledStreamType>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">0</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">0</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP0</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">0</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">1</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">1</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">2</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">2</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">3</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">3</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">4</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">8</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP1</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">1</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">5</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">9</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">6</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">10</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">7</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">11</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">8</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">16</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP0</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">0</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">9</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">17</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">10</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">18</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">11</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">19</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">12</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">24</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP1</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">1</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">13</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">25</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">14</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">26</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">15</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">27</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">16</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">32</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP0</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">0</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">17</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">33</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">18</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">34</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">19</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">35</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">20</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">40</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP1</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">1</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">21</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">41</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">22</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">42</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">23</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">43</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">24</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">48</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP0</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">0</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">25</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">49</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">26</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">50</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">27</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">51</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">28</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">56</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP1</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">1</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">29</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">57</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">30</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">58</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">31</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">59</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">32</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">64</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP0</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">0</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">33</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">65</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">35</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">67</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">34</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">66</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">36</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">72</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP1</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">1</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">37</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">73</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">39</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">75</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">38</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">74</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">40</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">80</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP0</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">0</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">41</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">81</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">43</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">83</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">42</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">82</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">44</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">88</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP1</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">1</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">45</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">89</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">46</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">90</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">47</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">91</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">48</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">96</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP0</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">0</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">49</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">104</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP1</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">1</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">50</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">112</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP0</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">0</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">51</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">120</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP1</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">1</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">52</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">128</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">53</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">135</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">63</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">cpu_sdma</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">136</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">54</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">cpu_sdma</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">137</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">55</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">cpu_sdma</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">138</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">56</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">cpu_sdma</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">139</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+      </askboardplt:portMap-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">7</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">1</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">6</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">0</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">5</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">3</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">4</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">2</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">8</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">14</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">9</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">15</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">10</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">12</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">11</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">13</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">23</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">17</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">22</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">16</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">21</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">19</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">20</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">18</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">24</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">30</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">25</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">31</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">26</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">28</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">27</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">29</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">39</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">33</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">38</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">32</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">37</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">35</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">36</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">34</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">40</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">41</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">46</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">47</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">42</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">44</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">43</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">45</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">55</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">49</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">54</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">48</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">53</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">51</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">52</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">50</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">56</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">62</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">57</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">63</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">58</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">60</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">59</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">61</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">71</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">65</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">70</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">64</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">69</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">67</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">68</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">66</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">72</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">78</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">73</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">79</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">74</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">76</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">75</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">77</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">87</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">81</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">86</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">80</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">85</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">83</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">84</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">82</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">88</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">94</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">89</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">95</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">90</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">92</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">91</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">93</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">103</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">97</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">102</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">96</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">101</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">99</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">100</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">98</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">104</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">110</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">105</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">111</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">106</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">108</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">107</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">109</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">119</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">113</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">118</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">112</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">117</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">115</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">116</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">114</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">120</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">126</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">121</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">127</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">122</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">124</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">123</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">125</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">128</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">135</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:Ledstream-interface-list>
+        <askboardplt:ledstream-interface-number askboardplt:type="led-interface-type">0</askboardplt:ledstream-interface-number>
+        <askboardplt:ledstream-configSet>
+          <askboardplt:ledOrganize askboardplt:type="led-stream-order-mode-type">ORDER_MODE_BY_CLASS</askboardplt:ledOrganize>
+          <askboardplt:blink0DutyCycle askboardplt:type="led-stream-blink-duty-cycle-type">BLINK_DUTY_CYCLE_0</askboardplt:blink0DutyCycle>
+          <askboardplt:blink0Duration askboardplt:type="led-stream-blink-duration-type">BLINK_DURATION_0</askboardplt:blink0Duration>
+          <askboardplt:blink1DutyCycle askboardplt:type="led-stream-blink-duty-cycle-type">BLINK_DUTY_CYCLE_0</askboardplt:blink1DutyCycle>
+          <askboardplt:blink1Duration askboardplt:type="led-stream-blink-duration-type">BLINK_DURATION_1</askboardplt:blink1Duration>
+          <askboardplt:pulseStretch askboardplt:type="led-stream-pulse-stretch-type">PULSE_STRETCH_1</askboardplt:pulseStretch>
+          <askboardplt:invertEnable askboardplt:type="boolean-type">false</askboardplt:invertEnable>
+          <askboardplt:SIP6ledClockFrequency askboardplt:type="led-stream-clock-frequency-type">1627</askboardplt:SIP6ledClockFrequency>
+          <askboardplt:ledClockPosEdgeModeEnable askboardplt:type="boolean-type">false</askboardplt:ledClockPosEdgeModeEnable>
+          <askboardplt:ledUnit-List>
+            <askboardplt:ledUnit askboardplt:type="led-unit-type">1</askboardplt:ledUnit>
+            <askboardplt:ledStart askboardplt:type="uint32">64</askboardplt:ledStart>
+            <askboardplt:ledEnd askboardplt:type="uint32">66</askboardplt:ledEnd>
+            <askboardplt:ledChainBypass askboardplt:type="boolean-type">false</askboardplt:ledChainBypass>
+          </askboardplt:ledUnit-List>
+          <askboardplt:ledUnit-List>
+            <askboardplt:ledUnit askboardplt:type="led-unit-type">2</askboardplt:ledUnit>
+            <askboardplt:ledStart askboardplt:type="uint32">64</askboardplt:ledStart>
+            <askboardplt:ledEnd askboardplt:type="uint32">65</askboardplt:ledEnd>
+            <askboardplt:ledChainBypass askboardplt:type="boolean-type">false</askboardplt:ledChainBypass>
+          </askboardplt:ledUnit-List>
+          <askboardplt:ledUnit-List>
+            <askboardplt:ledUnit askboardplt:type="led-unit-type">3</askboardplt:ledUnit>
+            <askboardplt:ledStart askboardplt:type="uint32">64</askboardplt:ledStart>
+            <askboardplt:ledEnd askboardplt:type="uint32">65</askboardplt:ledEnd>
+            <askboardplt:ledChainBypass askboardplt:type="boolean-type">false</askboardplt:ledChainBypass>
+          </askboardplt:ledUnit-List>
+          <askboardplt:ledUnit-List>
+            <askboardplt:ledUnit askboardplt:type="led-unit-type">4</askboardplt:ledUnit>
+            <askboardplt:ledStart askboardplt:type="uint32">64</askboardplt:ledStart>
+            <askboardplt:ledEnd askboardplt:type="uint32">66</askboardplt:ledEnd>
+            <askboardplt:ledChainBypass askboardplt:type="boolean-type">false</askboardplt:ledChainBypass>
+          </askboardplt:ledUnit-List>
+          <askboardplt:ledUnit-List>
+            <askboardplt:ledUnit askboardplt:type="led-unit-type">5</askboardplt:ledUnit>
+            <askboardplt:ledStart askboardplt:type="uint32">64</askboardplt:ledStart>
+            <askboardplt:ledEnd askboardplt:type="uint32">66</askboardplt:ledEnd>
+            <askboardplt:ledChainBypass askboardplt:type="boolean-type">false</askboardplt:ledChainBypass>
+          </askboardplt:ledUnit-List>
+          <askboardplt:ledUnit-List>
+            <askboardplt:ledUnit askboardplt:type="led-unit-type">6</askboardplt:ledUnit>
+            <askboardplt:ledStart askboardplt:type="uint32">64</askboardplt:ledStart>
+            <askboardplt:ledEnd askboardplt:type="uint32">65</askboardplt:ledEnd>
+            <askboardplt:ledChainBypass askboardplt:type="boolean-type">false</askboardplt:ledChainBypass>
+          </askboardplt:ledUnit-List>
+          <askboardplt:ledUnit-List>
+            <askboardplt:ledUnit askboardplt:type="led-unit-type">7</askboardplt:ledUnit>
+            <askboardplt:ledStart askboardplt:type="uint32">64</askboardplt:ledStart>
+            <askboardplt:ledEnd askboardplt:type="uint32">65</askboardplt:ledEnd>
+            <askboardplt:ledChainBypass askboardplt:type="boolean-type">false</askboardplt:ledChainBypass>
+          </askboardplt:ledUnit-List>
+          <askboardplt:ledUnit-List>
+            <askboardplt:ledUnit askboardplt:type="led-unit-type">8</askboardplt:ledUnit>
+            <askboardplt:ledStart askboardplt:type="uint32">64</askboardplt:ledStart>
+            <askboardplt:ledEnd askboardplt:type="uint32">66</askboardplt:ledEnd>
+            <askboardplt:ledChainBypass askboardplt:type="boolean-type">false</askboardplt:ledChainBypass>
+          </askboardplt:ledUnit-List>
+        </askboardplt:ledstream-configSet>
+        <askboardplt:ledstream-class-manipulation-list>
+          <askboardplt:classNum askboardplt:type="led-class-num-type">0</askboardplt:classNum>
+          <askboardplt:portType askboardplt:type="led-stream-port-type">PORT_TYPE_XG</askboardplt:portType>
+          <askboardplt:blinkEnable askboardplt:type="boolean-type">false</askboardplt:blinkEnable>
+          <askboardplt:blinkSelect askboardplt:type="led-stream-blink-select-type">BLINK_SELECT_0</askboardplt:blinkSelect>
+          <askboardplt:forceEnable askboardplt:type="boolean-type">false</askboardplt:forceEnable>
+          <askboardplt:pulseStretchEnable askboardplt:type="boolean-type">true</askboardplt:pulseStretchEnable>
+          <askboardplt:disableOnLinkDown askboardplt:type="boolean-type">false</askboardplt:disableOnLinkDown>
+        </askboardplt:ledstream-class-manipulation-list>
+        <askboardplt:ledstream-class-manipulation-list>
+          <askboardplt:classNum askboardplt:type="led-class-num-type">1</askboardplt:classNum>
+          <askboardplt:portType askboardplt:type="led-stream-port-type">PORT_TYPE_XG</askboardplt:portType>
+          <askboardplt:blinkEnable askboardplt:type="boolean-type">false</askboardplt:blinkEnable>
+          <askboardplt:blinkSelect askboardplt:type="led-stream-blink-select-type">BLINK_SELECT_0</askboardplt:blinkSelect>
+          <askboardplt:forceEnable askboardplt:type="boolean-type">false</askboardplt:forceEnable>
+          <askboardplt:pulseStretchEnable askboardplt:type="boolean-type">true</askboardplt:pulseStretchEnable>
+          <askboardplt:disableOnLinkDown askboardplt:type="boolean-type">false</askboardplt:disableOnLinkDown>
+        </askboardplt:ledstream-class-manipulation-list>
+        <askboardplt:ledstream-class-manipulation-list>
+          <askboardplt:classNum askboardplt:type="led-class-num-type">2</askboardplt:classNum>
+          <askboardplt:portType askboardplt:type="led-stream-port-type">PORT_TYPE_XG</askboardplt:portType>
+          <askboardplt:blinkEnable askboardplt:type="boolean-type">true</askboardplt:blinkEnable>
+          <askboardplt:blinkSelect askboardplt:type="led-stream-blink-select-type">BLINK_SELECT_0</askboardplt:blinkSelect>
+          <askboardplt:forceEnable askboardplt:type="boolean-type">false</askboardplt:forceEnable>
+          <askboardplt:pulseStretchEnable askboardplt:type="boolean-type">true</askboardplt:pulseStretchEnable>
+          <askboardplt:disableOnLinkDown askboardplt:type="boolean-type">true</askboardplt:disableOnLinkDown>
+        </askboardplt:ledstream-class-manipulation-list>
+        <askboardplt:ledstream-class-manipulation-list>
+          <askboardplt:classNum askboardplt:type="led-class-num-type">3</askboardplt:classNum>
+          <askboardplt:portType askboardplt:type="led-stream-port-type">PORT_TYPE_XG</askboardplt:portType>
+          <askboardplt:blinkEnable askboardplt:type="boolean-type">false</askboardplt:blinkEnable>
+          <askboardplt:blinkSelect askboardplt:type="led-stream-blink-select-type">BLINK_SELECT_0</askboardplt:blinkSelect>
+          <askboardplt:forceEnable askboardplt:type="boolean-type">false</askboardplt:forceEnable>
+          <askboardplt:pulseStretchEnable askboardplt:type="boolean-type">true</askboardplt:pulseStretchEnable>
+          <askboardplt:disableOnLinkDown askboardplt:type="boolean-type">false</askboardplt:disableOnLinkDown>
+        </askboardplt:ledstream-class-manipulation-list>
+        <askboardplt:ledstream-class-manipulation-list>
+          <askboardplt:classNum askboardplt:type="led-class-num-type">4</askboardplt:classNum>
+          <askboardplt:portType askboardplt:type="led-stream-port-type">PORT_TYPE_XG</askboardplt:portType>
+          <askboardplt:blinkEnable askboardplt:type="boolean-type">false</askboardplt:blinkEnable>
+          <askboardplt:blinkSelect askboardplt:type="led-stream-blink-select-type">BLINK_SELECT_0</askboardplt:blinkSelect>
+          <askboardplt:forceEnable askboardplt:type="boolean-type">false</askboardplt:forceEnable>
+          <askboardplt:pulseStretchEnable askboardplt:type="boolean-type">true</askboardplt:pulseStretchEnable>
+          <askboardplt:disableOnLinkDown askboardplt:type="boolean-type">false</askboardplt:disableOnLinkDown>
+        </askboardplt:ledstream-class-manipulation-list>
+        <askboardplt:ledstream-class-manipulation-list>
+          <askboardplt:classNum askboardplt:type="led-class-num-type">5</askboardplt:classNum>
+          <askboardplt:portType askboardplt:type="led-stream-port-type">PORT_TYPE_XG</askboardplt:portType>
+          <askboardplt:blinkEnable askboardplt:type="boolean-type">false</askboardplt:blinkEnable>
+          <askboardplt:blinkSelect askboardplt:type="led-stream-blink-select-type">BLINK_SELECT_0</askboardplt:blinkSelect>
+          <askboardplt:forceEnable askboardplt:type="boolean-type">false</askboardplt:forceEnable>
+          <askboardplt:pulseStretchEnable askboardplt:type="boolean-type">true</askboardplt:pulseStretchEnable>
+          <askboardplt:disableOnLinkDown askboardplt:type="boolean-type">false</askboardplt:disableOnLinkDown>
+        </askboardplt:ledstream-class-manipulation-list>
+      </askboardplt:Ledstream-interface-list>
+    </askboardplt:device-list>
+    <askboardplt:UDSFilePath askboardplt:type="std-string">/tmp/cpss_uds</askboardplt:UDSFilePath>
+    <askboardplt:serdesMux>
+      <askboardplt:serdesMuxSchemePortMod askboardplt:type="uint32">8</askboardplt:serdesMuxSchemePortMod>
+      <askboardplt:serdesMuxSchemeList>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP0</askboardplt:serdesMuxScheme>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">7</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">1</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">6</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">0</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">5</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">3</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">4</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">2</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+      </askboardplt:serdesMuxSchemeList>
+      <askboardplt:serdesMuxSchemeList>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP1</askboardplt:serdesMuxScheme>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">0</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">6</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">1</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">7</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">2</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">4</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">3</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">5</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+      </askboardplt:serdesMuxSchemeList>
+    </askboardplt:serdesMux>
+  </askboardplt:ASK-Board>
+</data>
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FC48x25G4x100GR4/ASK-L1-F6_4T-48x25G-4x100G.md5 b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FC48x25G4x100GR4/ASK-L1-F6_4T-48x25G-4x100G.md5
new file mode 100644
index 000000000..be0843ca8
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FC48x25G4x100GR4/ASK-L1-F6_4T-48x25G-4x100G.md5
@@ -0,0 +1 @@
+825014d819cb5d702586d3cc0bf9e2d0
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FC48x25G4x100GR4/ASK-L1-F6_4T-48x25G-4x100G.xml b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FC48x25G4x100GR4/ASK-L1-F6_4T-48x25G-4x100G.xml
new file mode 100644
index 000000000..e33753b1e
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FC48x25G4x100GR4/ASK-L1-F6_4T-48x25G-4x100G.xml
@@ -0,0 +1,1228 @@
+<?xml version="1.0" encoding="utf-8"?>
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-02-19-1.06" profile="Askl1" sid="71d3ab0f-3ac2-452a-a5c9-2dfdc969734a">
+  <ASKL1plt:ASK-L1 xmlns:ASKL1plt="urn:marvell:ASKL1:yang">
+    <ASKL1plt:typedefs>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>interface-mode-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Specifies supported Interface modes</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>1000BASE_X</ASKL1plt:name>
+          <ASKL1plt:description>1G</ASKL1plt:description>
+          <ASKL1plt:value>6</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>SGMII</ASKL1plt:name>
+          <ASKL1plt:description>1G , 2.5G</ASKL1plt:description>
+          <ASKL1plt:value>3</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>QSGMII</ASKL1plt:name>
+          <ASKL1plt:description>1G</ASKL1plt:description>
+          <ASKL1plt:value>13</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>KR</ASKL1plt:name>
+          <ASKL1plt:description>10G, 12G, 20G, 40G, 100G</ASKL1plt:description>
+          <ASKL1plt:value>16</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>SR_LR</ASKL1plt:name>
+          <ASKL1plt:description>5G, 10G, 12G, 20G, 40G</ASKL1plt:description>
+          <ASKL1plt:value>20</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>KR2</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>27</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>KR4</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>28</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>SR_LR2</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>29</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>SR_LR4</ASKL1plt:name>
+          <ASKL1plt:description>100G</ASKL1plt:description>
+          <ASKL1plt:value>30</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>KR_C</ASKL1plt:name>
+          <ASKL1plt:description>CONSORTIUM - 25G</ASKL1plt:description>
+          <ASKL1plt:value>32</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>CR_C</ASKL1plt:name>
+          <ASKL1plt:description>CONSORTIUM - 25G</ASKL1plt:description>
+          <ASKL1plt:value>33</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>KR2_C</ASKL1plt:name>
+          <ASKL1plt:description>CONSORTIUM - 50G</ASKL1plt:description>
+          <ASKL1plt:value>34</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>CR2_C</ASKL1plt:name>
+          <ASKL1plt:description>CONSORTIUM - 50G</ASKL1plt:description>
+          <ASKL1plt:value>35</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>CR</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>36</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>CR2</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>37</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>CR4</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>38</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>KR_S</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>39</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>CR_S</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>40</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>KR8</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>41</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>CR8</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>42</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>SR_LR8</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>43</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>USX_10G_QXGMII</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>51</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>USX_20G_QXGMII</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>52</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>USX_OUSGMII</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>53</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>USX_20G_OXGMII</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>54</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>NA</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>57</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>port-speed-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Specifies supported speeds</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>1G</ASKL1plt:name>
+          <ASKL1plt:description>1G</ASKL1plt:description>
+          <ASKL1plt:value>2</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>10G</ASKL1plt:name>
+          <ASKL1plt:description>10G</ASKL1plt:description>
+          <ASKL1plt:value>3</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>2500M</ASKL1plt:name>
+          <ASKL1plt:description>2.5G</ASKL1plt:description>
+          <ASKL1plt:value>5</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>5G</ASKL1plt:name>
+          <ASKL1plt:description>5G</ASKL1plt:description>
+          <ASKL1plt:value>6</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>25G</ASKL1plt:name>
+          <ASKL1plt:description>25G, used in combination with CPSS_PORT_INTERFACE_MODE_KR_E, CPSS_PORT_INTERFACE_MODE_KR2_E</ASKL1plt:description>
+          <ASKL1plt:value>21</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>40G</ASKL1plt:name>
+          <ASKL1plt:description>40G</ASKL1plt:description>
+          <ASKL1plt:value>9</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>50G</ASKL1plt:name>
+          <ASKL1plt:description>50G</ASKL1plt:description>
+          <ASKL1plt:value>14</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>100G</ASKL1plt:name>
+          <ASKL1plt:description>100G</ASKL1plt:description>
+          <ASKL1plt:value>13</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>200G</ASKL1plt:name>
+          <ASKL1plt:description>200G</ASKL1plt:description>
+          <ASKL1plt:value>24</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>400G</ASKL1plt:name>
+          <ASKL1plt:description>400G</ASKL1plt:description>
+          <ASKL1plt:value>25</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>NA</ASKL1plt:name>
+          <ASKL1plt:description>NA</ASKL1plt:description>
+          <ASKL1plt:value>35</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>fec-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Rx parameter type</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>enabled</ASKL1plt:name>
+          <ASKL1plt:description>Enabled</ASKL1plt:description>
+          <ASKL1plt:value>0</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>disabled</ASKL1plt:name>
+          <ASKL1plt:description>Disabled</ASKL1plt:description>
+          <ASKL1plt:value>1</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rs_enabled</ASKL1plt:name>
+          <ASKL1plt:description>RS FEC enabled</ASKL1plt:description>
+          <ASKL1plt:value>2</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>both_enabled</ASKL1plt:name>
+          <ASKL1plt:description>Both enabled</ASKL1plt:description>
+          <ASKL1plt:value>3</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rs_544_514_enabled</ASKL1plt:name>
+          <ASKL1plt:description>RS FEC 544 and 514</ASKL1plt:description>
+          <ASKL1plt:value>4</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>physical-port-num-type</ASKL1plt:name>
+        <ASKL1plt:type>uint32</ASKL1plt:type>
+        <ASKL1plt:description>PHYSICAL PORT NUM</ASKL1plt:description>
+        <ASKL1plt:min>0</ASKL1plt:min>
+        <ASKL1plt:max>1023</ASKL1plt:max>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>tx-param-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Tx parameter type</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>atten</ASKL1plt:name>
+          <ASKL1plt:description>atten</ASKL1plt:description>
+          <ASKL1plt:value>0</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>post</ASKL1plt:name>
+          <ASKL1plt:description>post</ASKL1plt:description>
+          <ASKL1plt:value>1</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>pre</ASKL1plt:name>
+          <ASKL1plt:description>pre</ASKL1plt:description>
+          <ASKL1plt:value>2</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>pre2</ASKL1plt:name>
+          <ASKL1plt:description>pre2</ASKL1plt:description>
+          <ASKL1plt:value>3</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>pre3</ASKL1plt:name>
+          <ASKL1plt:description>pre3</ASKL1plt:description>
+          <ASKL1plt:value>4</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>peak</ASKL1plt:name>
+          <ASKL1plt:description>peak</ASKL1plt:description>
+          <ASKL1plt:value>5</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>main</ASKL1plt:name>
+          <ASKL1plt:description>main</ASKL1plt:description>
+          <ASKL1plt:value>6</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>txAmpAdjEn</ASKL1plt:name>
+          <ASKL1plt:description>txAmpAdjEn</ASKL1plt:description>
+          <ASKL1plt:value>7</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>emph0</ASKL1plt:name>
+          <ASKL1plt:description>emph0</ASKL1plt:description>
+          <ASKL1plt:value>8</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>emph1</ASKL1plt:name>
+          <ASKL1plt:description>emph1</ASKL1plt:description>
+          <ASKL1plt:value>9</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>txAmpShft</ASKL1plt:name>
+          <ASKL1plt:description>txAmpShft</ASKL1plt:description>
+          <ASKL1plt:value>10</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>txEmphEn</ASKL1plt:name>
+          <ASKL1plt:description>txEmphEn</ASKL1plt:description>
+          <ASKL1plt:value>11</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>txEmphEn1</ASKL1plt:name>
+          <ASKL1plt:description>txEmphEn1</ASKL1plt:description>
+          <ASKL1plt:value>12</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>txAmpAdj</ASKL1plt:name>
+          <ASKL1plt:description>txAmpAdj</ASKL1plt:description>
+          <ASKL1plt:value>13</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>slewCtrlEn</ASKL1plt:name>
+          <ASKL1plt:description>slewCtrlEn</ASKL1plt:description>
+          <ASKL1plt:value>14</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>slewRate</ASKL1plt:name>
+          <ASKL1plt:description>slewRate</ASKL1plt:description>
+          <ASKL1plt:value>15</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>rx-param-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Rx parameter type</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>sqlch</ASKL1plt:name>
+          <ASKL1plt:description>sqlch</ASKL1plt:description>
+          <ASKL1plt:value>0</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>DC</ASKL1plt:name>
+          <ASKL1plt:description>DC</ASKL1plt:description>
+          <ASKL1plt:value>1</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>LF</ASKL1plt:name>
+          <ASKL1plt:description>LF</ASKL1plt:description>
+          <ASKL1plt:value>2</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>HF</ASKL1plt:name>
+          <ASKL1plt:description>HF</ASKL1plt:description>
+          <ASKL1plt:value>3</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>gainShape1</ASKL1plt:name>
+          <ASKL1plt:description>gainShape1</ASKL1plt:description>
+          <ASKL1plt:value>4</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>gainShape2</ASKL1plt:name>
+          <ASKL1plt:description>gainShape2</ASKL1plt:description>
+          <ASKL1plt:value>5</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>shortChannelEn</ASKL1plt:name>
+          <ASKL1plt:description>shortChannelEn</ASKL1plt:description>
+          <ASKL1plt:value>7</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>bfLf</ASKL1plt:name>
+          <ASKL1plt:description>bfLf</ASKL1plt:description>
+          <ASKL1plt:value>8</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>bfHf</ASKL1plt:name>
+          <ASKL1plt:description>bfHf</ASKL1plt:description>
+          <ASKL1plt:value>9</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>minLf</ASKL1plt:name>
+          <ASKL1plt:description>minLf</ASKL1plt:description>
+          <ASKL1plt:value>10</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>maxLf</ASKL1plt:name>
+          <ASKL1plt:description>maxLf</ASKL1plt:description>
+          <ASKL1plt:value>11</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>minHf</ASKL1plt:name>
+          <ASKL1plt:description>minHf</ASKL1plt:description>
+          <ASKL1plt:value>12</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>maxHf</ASKL1plt:name>
+          <ASKL1plt:description>maxHf</ASKL1plt:description>
+          <ASKL1plt:value>13</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>minPre1</ASKL1plt:name>
+          <ASKL1plt:description>minPre1</ASKL1plt:description>
+          <ASKL1plt:value>14</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>maxPre1</ASKL1plt:name>
+          <ASKL1plt:description>maxPre1</ASKL1plt:description>
+          <ASKL1plt:value>15</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>minPre2</ASKL1plt:name>
+          <ASKL1plt:description>minPre2</ASKL1plt:description>
+          <ASKL1plt:value>16</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>maxPre2</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>17</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>minPost</ASKL1plt:name>
+          <ASKL1plt:description>minPost</ASKL1plt:description>
+          <ASKL1plt:value>18</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>maxPost</ASKL1plt:name>
+          <ASKL1plt:description>maxPost</ASKL1plt:description>
+          <ASKL1plt:value>19</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>squelch</ASKL1plt:name>
+          <ASKL1plt:description>squelch</ASKL1plt:description>
+          <ASKL1plt:value>20</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>termination</ASKL1plt:name>
+          <ASKL1plt:description>termination</ASKL1plt:description>
+          <ASKL1plt:value>27</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>coldEnvelope</ASKL1plt:name>
+          <ASKL1plt:description>coldEnvelope</ASKL1plt:description>
+          <ASKL1plt:value>35</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>hotEnvelope</ASKL1plt:name>
+          <ASKL1plt:description>hotEnvelope</ASKL1plt:description>
+          <ASKL1plt:value>36</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>dcGain</ASKL1plt:name>
+          <ASKL1plt:description>dcGain</ASKL1plt:description>
+          <ASKL1plt:value>37</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>bandWidth</ASKL1plt:name>
+          <ASKL1plt:description>bandWidth</ASKL1plt:description>
+          <ASKL1plt:value>38</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>dfe</ASKL1plt:name>
+          <ASKL1plt:description>dfe</ASKL1plt:description>
+          <ASKL1plt:value>39</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>ffeR</ASKL1plt:name>
+          <ASKL1plt:description>ffeR</ASKL1plt:description>
+          <ASKL1plt:value>40</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>ffeC</ASKL1plt:name>
+          <ASKL1plt:description>ffeC</ASKL1plt:description>
+          <ASKL1plt:value>41</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>sampler</ASKL1plt:name>
+          <ASKL1plt:description>sampler</ASKL1plt:description>
+          <ASKL1plt:value>42</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>align90</ASKL1plt:name>
+          <ASKL1plt:description>align90</ASKL1plt:description>
+          <ASKL1plt:value>43</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>ffeS</ASKL1plt:name>
+          <ASKL1plt:description>ffeS</ASKL1plt:description>
+          <ASKL1plt:value>44</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>resSel</ASKL1plt:name>
+          <ASKL1plt:description>resSel</ASKL1plt:description>
+          <ASKL1plt:value>45</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>resShift</ASKL1plt:name>
+          <ASKL1plt:description>resShift</ASKL1plt:description>
+          <ASKL1plt:value>46</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>capSel</ASKL1plt:name>
+          <ASKL1plt:description>capSel</ASKL1plt:description>
+          <ASKL1plt:value>47</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>ffeSettingForce</ASKL1plt:name>
+          <ASKL1plt:description>ffeSettingForce</ASKL1plt:description>
+          <ASKL1plt:value>48</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>adaptedResSel</ASKL1plt:name>
+          <ASKL1plt:description>adaptedResSel</ASKL1plt:description>
+          <ASKL1plt:value>49</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>adaptedCapSel</ASKL1plt:name>
+          <ASKL1plt:description>adaptedCapSel</ASKL1plt:description>
+          <ASKL1plt:value>50</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>selmufi</ASKL1plt:name>
+          <ASKL1plt:description>selmufi</ASKL1plt:description>
+          <ASKL1plt:value>51</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>selmuff</ASKL1plt:name>
+          <ASKL1plt:description>selmuff</ASKL1plt:description>
+          <ASKL1plt:value>52</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>selmupi</ASKL1plt:name>
+          <ASKL1plt:description>selmupi</ASKL1plt:description>
+          <ASKL1plt:value>53</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>selmupf</ASKL1plt:name>
+          <ASKL1plt:description>selmupf</ASKL1plt:description>
+          <ASKL1plt:value>54</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>slewRateCtrl0</ASKL1plt:name>
+          <ASKL1plt:description>slewRateCtrl0</ASKL1plt:description>
+          <ASKL1plt:value>55</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>slewRateCtrl1</ASKL1plt:name>
+          <ASKL1plt:description>slewRateCtrl1</ASKL1plt:description>
+          <ASKL1plt:value>56</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>EO</ASKL1plt:name>
+          <ASKL1plt:description>EO</ASKL1plt:description>
+          <ASKL1plt:value>57</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>dataRate</ASKL1plt:name>
+          <ASKL1plt:description>dataRate</ASKL1plt:description>
+          <ASKL1plt:value>58</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>res1Sel</ASKL1plt:name>
+          <ASKL1plt:description>res1Sel</ASKL1plt:description>
+          <ASKL1plt:value>59</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>res2Sel</ASKL1plt:name>
+          <ASKL1plt:description>res2Sel</ASKL1plt:description>
+          <ASKL1plt:value>60</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>cap1Sel</ASKL1plt:name>
+          <ASKL1plt:description>cap1Sel</ASKL1plt:description>
+          <ASKL1plt:value>61</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>cap2Sel</ASKL1plt:name>
+          <ASKL1plt:description>cap2Sel</ASKL1plt:description>
+          <ASKL1plt:value>62</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>midpointLargeThresKLane</ASKL1plt:name>
+          <ASKL1plt:description>midpointLargeThresKLane</ASKL1plt:description>
+          <ASKL1plt:value>63</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>midpointSmallThresKLane</ASKL1plt:name>
+          <ASKL1plt:description>midpointSmallThresKLane</ASKL1plt:description>
+          <ASKL1plt:value>64</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>midpointLargeThresCLane</ASKL1plt:name>
+          <ASKL1plt:description>midpointLargeThresCLane</ASKL1plt:description>
+          <ASKL1plt:value>65</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>midpointSmallThresCLane</ASKL1plt:name>
+          <ASKL1plt:description>midpointSmallThresCLane</ASKL1plt:description>
+          <ASKL1plt:value>66</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>dfeResF0aHighThresInitLane</ASKL1plt:name>
+          <ASKL1plt:description>dfeResF0aHighThresInitLane</ASKL1plt:description>
+          <ASKL1plt:value>67</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>dfeResF0aHighThresEndLane</ASKL1plt:name>
+          <ASKL1plt:description>dfeResF0aHighThresEndLane</ASKL1plt:description>
+          <ASKL1plt:value>68</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>current1Sel</ASKL1plt:name>
+          <ASKL1plt:description>current1Sel</ASKL1plt:description>
+          <ASKL1plt:value>69</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rl1Sel</ASKL1plt:name>
+          <ASKL1plt:description>rl1Sel</ASKL1plt:description>
+          <ASKL1plt:value>70</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rl1Extra</ASKL1plt:name>
+          <ASKL1plt:description>rl1Extra</ASKL1plt:description>
+          <ASKL1plt:value>71</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>cl1Ctrl</ASKL1plt:name>
+          <ASKL1plt:description>cl1Ctrl</ASKL1plt:description>
+          <ASKL1plt:value>72</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>enMidFreq</ASKL1plt:name>
+          <ASKL1plt:description>enMidFreq</ASKL1plt:description>
+          <ASKL1plt:value>73</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>cs1Mid</ASKL1plt:name>
+          <ASKL1plt:description>cs1Mid</ASKL1plt:description>
+          <ASKL1plt:value>74</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rs1Mid</ASKL1plt:name>
+          <ASKL1plt:description>rs1Mid</ASKL1plt:description>
+          <ASKL1plt:value>75</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rfCtrl</ASKL1plt:name>
+          <ASKL1plt:description>rfCtrl</ASKL1plt:description>
+          <ASKL1plt:value>76</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rl1TiaSel</ASKL1plt:name>
+          <ASKL1plt:description>rl1TiaSel</ASKL1plt:description>
+          <ASKL1plt:value>77</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rl1TiaExtra</ASKL1plt:name>
+          <ASKL1plt:description>rl1TiaExtra</ASKL1plt:description>
+          <ASKL1plt:value>78</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>hpfRSel1st</ASKL1plt:name>
+          <ASKL1plt:description>hpfRSel1st</ASKL1plt:description>
+          <ASKL1plt:value>79</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>current1TiaSel</ASKL1plt:name>
+          <ASKL1plt:description>current1TiaSel</ASKL1plt:description>
+          <ASKL1plt:value>80</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rl2Tune</ASKL1plt:name>
+          <ASKL1plt:description>rl2Tune</ASKL1plt:description>
+          <ASKL1plt:value>81</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rl2Sel</ASKL1plt:name>
+          <ASKL1plt:description>rl2Sel</ASKL1plt:description>
+          <ASKL1plt:value>82</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rs2Sel</ASKL1plt:name>
+          <ASKL1plt:description>rs2Sel</ASKL1plt:description>
+          <ASKL1plt:value>83</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>current2Sel</ASKL1plt:name>
+          <ASKL1plt:description>current2Sel</ASKL1plt:description>
+          <ASKL1plt:value>84</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>hpfRsel2nd</ASKL1plt:name>
+          <ASKL1plt:description>hpfRsel2nd</ASKL1plt:description>
+          <ASKL1plt:value>85</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>BW</ASKL1plt:name>
+          <ASKL1plt:description>BW</ASKL1plt:description>
+          <ASKL1plt:value>86</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>dfeGAIN</ASKL1plt:name>
+          <ASKL1plt:description>dfeGAIN</ASKL1plt:description>
+          <ASKL1plt:value>87</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>dfeGAIN2</ASKL1plt:name>
+          <ASKL1plt:description>dfeGAIN2</ASKL1plt:description>
+          <ASKL1plt:value>88</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>pre1</ASKL1plt:name>
+          <ASKL1plt:description>pre1</ASKL1plt:description>
+          <ASKL1plt:value>89</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>pre2</ASKL1plt:name>
+          <ASKL1plt:description>pre2</ASKL1plt:description>
+          <ASKL1plt:value>90</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>post1</ASKL1plt:name>
+          <ASKL1plt:description>post1</ASKL1plt:description>
+          <ASKL1plt:value>91</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>boolean-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Boolean 32 bits , due to bing endian</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>false</ASKL1plt:name>
+          <ASKL1plt:description>False</ASKL1plt:description>
+          <ASKL1plt:value>0</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>true</ASKL1plt:name>
+          <ASKL1plt:description>True</ASKL1plt:description>
+          <ASKL1plt:value>1</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>serdes-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Serdes Type</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>NA</ASKL1plt:name>
+          <ASKL1plt:description>No serdes</ASKL1plt:description>
+          <ASKL1plt:value>0</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>AVAGO</ASKL1plt:name>
+          <ASKL1plt:description>AVAGO</ASKL1plt:description>
+          <ASKL1plt:value>1</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>COMPHY</ASKL1plt:name>
+          <ASKL1plt:description>COMPHY</ASKL1plt:description>
+          <ASKL1plt:value>2</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>COMPHY_C12G</ASKL1plt:name>
+          <ASKL1plt:description>COMPHY_C12G</ASKL1plt:description>
+          <ASKL1plt:value>3</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>COMPHY_C28G</ASKL1plt:name>
+          <ASKL1plt:description>COMPHY_C28G</ASKL1plt:description>
+          <ASKL1plt:value>4</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>COMPHY_C112G</ASKL1plt:name>
+          <ASKL1plt:description>COMPHY_C112G</ASKL1plt:description>
+          <ASKL1plt:value>5</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>uint8-type</ASKL1plt:name>
+        <ASKL1plt:type>uint32</ASKL1plt:type>
+        <ASKL1plt:description>Uint8 32 bits , due to bing endian</ASKL1plt:description>
+        <ASKL1plt:min>0</ASKL1plt:min>
+        <ASKL1plt:max>255</ASKL1plt:max>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>serdes-termination-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>RX termination mode</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>GND</ASKL1plt:name>
+          <ASKL1plt:description>Enabled</ASKL1plt:description>
+          <ASKL1plt:value>0</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>VDD</ASKL1plt:name>
+          <ASKL1plt:description>Disabled</ASKL1plt:description>
+          <ASKL1plt:value>1</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>FLOATING</ASKL1plt:name>
+          <ASKL1plt:description>RS FEC enabled</ASKL1plt:description>
+          <ASKL1plt:value>2</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>port-interconnect-profile-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Enumerator of interconnect profile.</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>profile_default</ASKL1plt:name>
+          <ASKL1plt:description>Profile Default</ASKL1plt:description>
+          <ASKL1plt:value>0</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>profile_1</ASKL1plt:name>
+          <ASKL1plt:description>Profile 1</ASKL1plt:description>
+          <ASKL1plt:value>1</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>profile_2</ASKL1plt:name>
+          <ASKL1plt:description>Profile 2</ASKL1plt:description>
+          <ASKL1plt:value>2</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+    </ASKL1plt:typedefs>
+    <ASKL1plt:IfModeName>
+      <ASKL1plt:ifModeNameList>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:ifModeName>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">CR4</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">100G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">KR4</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">100G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">SR_LR4</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">100G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">CR4</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">100G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">KR4</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">100G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+      </ASKL1plt:ifModeNameList>
+      <ASKL1plt:ifModeNameList>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">10GR1Fix</ASKL1plt:ifModeName>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">KR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">10G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">disabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+      </ASKL1plt:ifModeNameList>
+      <ASKL1plt:ifModeNameList>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">CR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">25G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">KR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">25G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">KR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">10G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">SR_LR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">25G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">SR_LR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">10G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">CR</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">25G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">KR</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">25G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">KR</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">10G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+      </ASKL1plt:ifModeNameList>
+    </ASKL1plt:IfModeName>
+    <ASKL1plt:Port>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">0</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">1</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">2</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">3</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">4</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">5</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">6</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">7</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">8</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">9</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">10</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">11</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">12</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">13</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">14</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">15</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">16</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">17</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">18</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">19</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">20</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">21</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">22</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">23</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">24</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">25</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">26</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">27</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">28</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">29</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">30</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">31</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">32</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">33</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">34</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">35</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">36</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">37</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">38</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">39</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">40</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">41</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">42</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">43</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">44</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">45</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">46</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">47</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">48</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">49</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">50</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">51</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">52</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">10GR1Fix</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">53</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">10GR1Fix</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+    </ASKL1plt:Port>
+  </ASKL1plt:ASK-L1>
+</data>
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FC48x25G4x100GR4/ASK-PP-F6_4T-48x25G-4x100G.md5 b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FC48x25G4x100GR4/ASK-PP-F6_4T-48x25G-4x100G.md5
new file mode 100644
index 000000000..8f2588351
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FC48x25G4x100GR4/ASK-PP-F6_4T-48x25G-4x100G.md5
@@ -0,0 +1 @@
+897ca459774ad5e95dcd7dcb0d10c0af
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FC48x25G4x100GR4/ASK-PP-F6_4T-48x25G-4x100G.xml b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FC48x25G4x100GR4/ASK-PP-F6_4T-48x25G-4x100G.xml
new file mode 100644
index 000000000..b50dbcd5d
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FC48x25G4x100GR4/ASK-PP-F6_4T-48x25G-4x100G.xml
@@ -0,0 +1,1180 @@
+<?xml version="1.0" encoding="utf-8"?>
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-02-19-1.06" profile="Askpp" sid="34f1c14a-b581-422d-bd10-426dfac013dd">
+  <askppplt:ASK-PP xmlns:askppplt="urn:marvell:askpp:yang">
+    <askppplt:typedefs>
+      <askppplt:typedef>
+        <askppplt:name>std-string</askppplt:name>
+        <askppplt:type>string</askppplt:type>
+        <askppplt:description>standard string.</askppplt:description>
+        <askppplt:min>1</askppplt:min>
+        <askppplt:max>100</askppplt:max>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>queue-id-type</askppplt:name>
+        <askppplt:type>uint32</askppplt:type>
+        <askppplt:description>Queue id</askppplt:description>
+        <askppplt:min>0</askppplt:min>
+        <askppplt:max>7</askppplt:max>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>precent-type</askppplt:name>
+        <askppplt:type>uint32</askppplt:type>
+        <askppplt:description>Precent</askppplt:description>
+        <askppplt:min>0</askppplt:min>
+        <askppplt:max>100</askppplt:max>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>phaThreadId-type</askppplt:name>
+        <askppplt:type>uint32</askppplt:type>
+        <askppplt:description>Thread id</askppplt:description>
+        <askppplt:min>1</askppplt:min>
+        <askppplt:max>255</askppplt:max>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>routing-mode-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies routing mode.</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>POLICY_BASED_ROUTING_ONLY</askppplt:name>
+          <askppplt:description>PBR only</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>TCAM_ROUTER_BASED</askppplt:name>
+          <askppplt:description>Router engine or PBR</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>shared-table-mode-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies table sharing modes for L3 (LPM), L2 (FDB), EM (Exact Match)</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>MID_L3_MID_L2_NO_EM</askppplt:name>
+          <askppplt:description>MID_L3_MID_L2_NO_EM</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>MID_L3_MID_L2_MIN_EM</askppplt:name>
+          <askppplt:description>MID_L3_MID_L2_MIN_EM</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>LOW_MAX_L3_MID_LOW_L2_NO_EM</askppplt:name>
+          <askppplt:description>LOW_MAX_L3_MID_LOW_L2_NO_EM</askppplt:description>
+          <askppplt:value>2</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>MAX_L3_MIN_L2_NO_EM</askppplt:name>
+          <askppplt:description>MAX_L3_MIN_L2_NO_EM</askppplt:description>
+          <askppplt:value>3</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>pha-firmware-image-id-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies supported Pha image id</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>DEFAULT</askppplt:name>
+          <askppplt:description>Default PHA firmware image ID</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>01</askppplt:name>
+          <askppplt:description>01 firmware image ID</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>02</askppplt:name>
+          <askppplt:description>02 PHA firmware image ID</askppplt:description>
+          <askppplt:value>2</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>pha-firmware-thread-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies supported Pha thread type</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>IOAM_INGRESS_SWITCH_IPV4</askppplt:name>
+          <askppplt:description>IOAM_INGRESS_SWITCH_IPV4</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>IOAM_INGRESS_SWITCH_IPV6</askppplt:name>
+          <askppplt:description>IOAM_INGRESS_SWITCH_IPV6</askppplt:description>
+          <askppplt:value>2</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>IOAM_TRANSIT_SWITCH_IPV4</askppplt:name>
+          <askppplt:description>IOAM_TRANSIT_SWITCH_IPV4</askppplt:description>
+          <askppplt:value>3</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>IOAM_TRANSIT_SWITCH_IPV6</askppplt:name>
+          <askppplt:description>IOAM_TRANSIT_SWITCH_IPV6</askppplt:description>
+          <askppplt:value>4</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>INT_IOAM_MIRRORING</askppplt:name>
+          <askppplt:description>INT_IOAM_MIRRORING</askppplt:description>
+          <askppplt:value>5</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>INT_IOAM_EGRESS_SWITCH</askppplt:name>
+          <askppplt:description>INT_IOAM_EGRESS_SWITCH</askppplt:description>
+          <askppplt:value>6</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>MPLS_SR_NO_EL</askppplt:name>
+          <askppplt:description>MPLS_SR_NO_EL</askppplt:description>
+          <askppplt:value>7</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>MPLS_SR_ONE_EL</askppplt:name>
+          <askppplt:description>MPLS_SR_ONE_EL</askppplt:description>
+          <askppplt:value>8</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>MPLS_SR_TWO_EL</askppplt:name>
+          <askppplt:description>MPLS_SR_TWO_EL</askppplt:description>
+          <askppplt:value>9</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>MPLS_SR_THREE_EL</askppplt:name>
+          <askppplt:description>MPLS_SR_THREE_EL</askppplt:description>
+          <askppplt:value>10</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>UNIFIED_SR</askppplt:name>
+          <askppplt:description>UNIFIED_SR</askppplt:description>
+          <askppplt:value>11</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>CLASSIFIER_NSH_OVER_ETHERNET</askppplt:name>
+          <askppplt:description>CLASSIFIER_NSH_OVER_ETHERNET</askppplt:description>
+          <askppplt:value>12</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>CLASSIFIER_NSH_OVER_VXLAN_GPE</askppplt:name>
+          <askppplt:description>CLASSIFIER_NSH_OVER_VXLAN_GPE</askppplt:description>
+          <askppplt:value>13</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SFF_NSH_VXLAN_GPE_TO_ETHERNET</askppplt:name>
+          <askppplt:description>SFF_NSH_VXLAN_GPE_TO_ETHERNET</askppplt:description>
+          <askppplt:value>14</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SFF_NSH_ETHERNET_TO_VXLAN_GPE</askppplt:name>
+          <askppplt:description>SFF_NSH_ETHERNET_TO_VXLAN_GPE</askppplt:description>
+          <askppplt:value>15</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>IOAM_EGRESS_SWITCH_IPV6</askppplt:name>
+          <askppplt:description>IOAM_EGRESS_SWITCH_IPV6</askppplt:description>
+          <askppplt:value>16</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_END_NODE</askppplt:name>
+          <askppplt:description>SRV6_END_NODE</askppplt:description>
+          <askppplt:value>17</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_PENULTIMATE_END_NODE</askppplt:name>
+          <askppplt:description>SRV6_PENULTIMATE_END_NODE</askppplt:description>
+          <askppplt:value>18</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_SRC_NODE_1_SEGMENT</askppplt:name>
+          <askppplt:description>SRV6_SRC_NODE_1_SEGMENT</askppplt:description>
+          <askppplt:value>19</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_SRC_NODE_FIRST_PASS_2_3_SEGMENTS</askppplt:name>
+          <askppplt:description>SRV6_SRC_NODE_FIRST_PASS_2_3_SEGMENTS</askppplt:description>
+          <askppplt:value>20</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_SRC_NODE_SECOND_PASS_3_SEGMENTS</askppplt:name>
+          <askppplt:description>SRV6_SRC_NODE_SECOND_PASS_3_SEGMENTS</askppplt:description>
+          <askppplt:value>21</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_SRC_NODE_SECOND_PASS_2_SEGMENTS</askppplt:name>
+          <askppplt:description>SRV6_SRC_NODE_SECOND_PASS_2_SEGMENTS</askppplt:description>
+          <askppplt:value>22</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_NETWORK_ADD_MSB</askppplt:name>
+          <askppplt:description>SGT_NETWORK_ADD_MSB</askppplt:description>
+          <askppplt:value>23</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_NETWORK_FIX</askppplt:name>
+          <askppplt:description>SGT_NETWORK_FIX</askppplt:description>
+          <askppplt:value>24</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_NETWORK_REMOVE</askppplt:name>
+          <askppplt:description>SGT_NETWORK_REMOVE</askppplt:description>
+          <askppplt:value>25</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_EDSA_FIX</askppplt:name>
+          <askppplt:description>SGT_EDSA_FIX</askppplt:description>
+          <askppplt:value>26</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_EDSA_REMOVE</askppplt:name>
+          <askppplt:description>SGT_EDSA_REMOVE</askppplt:description>
+          <askppplt:value>27</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_GBP_FIX_IPV4</askppplt:name>
+          <askppplt:description>SGT_GBP_FIX_IPV4</askppplt:description>
+          <askppplt:value>28</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_GBP_FIX_IPV6</askppplt:name>
+          <askppplt:description>SGT_GBP_FIX_IPV6</askppplt:description>
+          <askppplt:value>29</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_GBP_REMOVE_IPV4</askppplt:name>
+          <askppplt:description>SGT_GBP_REMOVE_IPV4</askppplt:description>
+          <askppplt:value>30</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_GBP_REMOVE_IPV6</askppplt:name>
+          <askppplt:description>SGT_GBP_REMOVE_IPV6</askppplt:description>
+          <askppplt:value>31</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>PTP_PHY_1_STEP</askppplt:name>
+          <askppplt:description>PTP_PHY_1_STEP</askppplt:description>
+          <askppplt:value>32</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>EGRESS_MIRRORING_METADATA</askppplt:name>
+          <askppplt:description>EGRESS_MIRRORING_METADATA</askppplt:description>
+          <askppplt:value>33</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>CC_ERSPAN_TYPE_II_TRG_DEV_LC_IPV4</askppplt:name>
+          <askppplt:description>CC_ERSPAN_TYPE_II_TRG_DEV_LC_IPV4</askppplt:description>
+          <askppplt:value>34</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>CC_ERSPAN_TYPE_II_TRG_DEV_LC_IPV6</askppplt:name>
+          <askppplt:description>CC_ERSPAN_TYPE_II_TRG_DEV_LC_IPV6</askppplt:description>
+          <askppplt:value>35</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>CC_ERSPAN_TYPE_II_TRG_DEV_DIRECT_IPV4</askppplt:name>
+          <askppplt:description>CC_ERSPAN_TYPE_II_TRG_DEV_DIRECT_IPV4</askppplt:description>
+          <askppplt:value>36</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>CC_ERSPAN_TYPE_II_TRG_DEV_DIRECT_IPV6</askppplt:name>
+          <askppplt:description>CC_ERSPAN_TYPE_II_TRG_DEV_DIRECT_IPV6</askppplt:description>
+          <askppplt:value>37</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>CC_ERSPAN_TYPE_II_SRC_DEV</askppplt:name>
+          <askppplt:description>CC_ERSPAN_TYPE_II_SRC_DEV</askppplt:description>
+          <askppplt:value>38</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>VXLAN_GBP_SOURCE_GROUP_POLICY_ID</askppplt:name>
+          <askppplt:description>VXLAN_GBP_SOURCE_GROUP_POLICY_ID</askppplt:description>
+          <askppplt:value>39</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_BEST_EFFORT</askppplt:name>
+          <askppplt:description>SRV6_BEST_EFFORT</askppplt:description>
+          <askppplt:value>40</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_SRC_NODE_1_CONTAINER</askppplt:name>
+          <askppplt:description>SRV6_SRC_NODE_1_CONTAINER</askppplt:description>
+          <askppplt:value>41</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_SRC_NODE_FIRST_PASS_2_3_CONTAINERS</askppplt:name>
+          <askppplt:description>SRV6_SRC_NODE_FIRST_PASS_2_3_CONTAINERS</askppplt:description>
+          <askppplt:value>42</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_SRC_NODE_SECOND_PASS_2_CONTAINERS</askppplt:name>
+          <askppplt:description>SRV6_SRC_NODE_SECOND_PASS_2_CONTAINERS</askppplt:description>
+          <askppplt:value>43</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_SRC_NODE_SECOND_PASS_3_CONTAINERS</askppplt:name>
+          <askppplt:description>SRV6_SRC_NODE_SECOND_PASS_3_CONTAINERS</askppplt:description>
+          <askppplt:value>44</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_END_NODE_COC32_GSID</askppplt:name>
+          <askppplt:description>SRV6_END_NODE_COC32_GSID</askppplt:description>
+          <askppplt:value>45</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>IPV4_TTL_INCREMENT</askppplt:name>
+          <askppplt:description>IPV4_TTL_INCREMENT</askppplt:description>
+          <askppplt:value>46</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>IPV6_HOP_LIMIT_INCREMENT</askppplt:name>
+          <askppplt:description>IPV6_HOP_LIMIT_INCREMENT</askppplt:description>
+          <askppplt:value>47</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>CLEAR_OUTGOING_MTAG_COMMAND</askppplt:name>
+          <askppplt:description>CLEAR_OUTGOING_MTAG_COMMAND</askppplt:description>
+          <askppplt:value>48</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SFLOW_V5_IPV4</askppplt:name>
+          <askppplt:description>SFLOW_V5_IPV4</askppplt:description>
+          <askppplt:value>49</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SFLOW_V5_IPV6</askppplt:name>
+          <askppplt:description>SFLOW_V5_IPV6</askppplt:description>
+          <askppplt:value>50</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SLS</askppplt:name>
+          <askppplt:description>SLS</askppplt:description>
+          <askppplt:value>51</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>trunk-member-mode-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies supported Pha image id</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>NATIVE</askppplt:name>
+          <askppplt:description>NATIVE
+*  the trunk members are filled
+*  according to the order given by application.
+*  Regular trunk may hold max of 8 members.
+*  Cascade trunk may hold :
+*  max of 64 members</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>FLEX</askppplt:name>
+          <askppplt:description>FLEX
+*  A mode to allows flexibility for
+*  each Regular trunk to state it's max number of members (before starting to add members).
+*  (this mode not effect 'cascade trunk' members)
+*  Regular trunk may hold : max of 4K members. (each trunk set it's own limit)
+*  Cascade trunk may hold : max of 64 members.</askppplt:description>
+          <askppplt:value>2</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>number-physical-port-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>AC3X/AC5X 128, falcon 64, 128, 256, 512, 1024</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>no-ports</askppplt:name>
+          <askppplt:description>no-ports</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>64-ports</askppplt:name>
+          <askppplt:description>64-ports</askppplt:description>
+          <askppplt:value>64</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>128-ports</askppplt:name>
+          <askppplt:description>128-ports</askppplt:description>
+          <askppplt:value>128</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>256-ports</askppplt:name>
+          <askppplt:description>256-ports</askppplt:description>
+          <askppplt:value>256</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>512-ports</askppplt:name>
+          <askppplt:description>512-ports</askppplt:description>
+          <askppplt:value>512</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>1024-ports</askppplt:name>
+          <askppplt:description>1024-ports</askppplt:description>
+          <askppplt:value>1024</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>serdes-ref-clock-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies serdes refernce clock.</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>external_25_single_ended</askppplt:name>
+          <askppplt:description>EXTERNAL_25_SINGLE_ENDED</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>external_125_single_ended</askppplt:name>
+          <askppplt:description>EXTERNAL_125_SINGLE_ENDED</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>external_125_diff</askppplt:name>
+          <askppplt:description>EXTERNAL_125_DIFF</askppplt:description>
+          <askppplt:value>2</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>external_156_25_single_ended</askppplt:name>
+          <askppplt:description>EXTERNAL_156_25_SINGLE_ENDED</askppplt:description>
+          <askppplt:value>3</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>external_156_25_diff</askppplt:name>
+          <askppplt:description>EXTERNAL_156_25_DIFF</askppplt:description>
+          <askppplt:value>4</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>internal_125</askppplt:name>
+          <askppplt:description>INTERNAL_125</askppplt:description>
+          <askppplt:value>5</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>cpu-port-id-type</askppplt:name>
+        <askppplt:type>uint32</askppplt:type>
+        <askppplt:description>CPU port id</askppplt:description>
+        <askppplt:min>0</askppplt:min>
+        <askppplt:max>7</askppplt:max>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>rx-buffer-size-type</askppplt:name>
+        <askppplt:type>uint32</askppplt:type>
+        <askppplt:description>Rx Buffer size</askppplt:description>
+        <askppplt:min>64</askppplt:min>
+        <askppplt:max>10240</askppplt:max>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>tx-sdma-queue-mode-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies TX queue mode.</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>Normal</askppplt:name>
+          <askppplt:description>Application</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>Packet_Generator</askppplt:name>
+          <askppplt:description>Traffic generator</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>alloc-method-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies Buffers allocation method.</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>Dynamic_Alloc</askppplt:name>
+          <askppplt:description>Dynamic</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>Static_Alloc</askppplt:name>
+          <askppplt:description>Static</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>au_mesage_lenght-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies Buffers allocation method.</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>4_words</askppplt:name>
+          <askppplt:description>4 Words</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>8_words</askppplt:name>
+          <askppplt:description>8 Words</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>boolean-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Boolean 32 bits , due to bing endian</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>false</askppplt:name>
+          <askppplt:description>False</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>true</askppplt:name>
+          <askppplt:description>True</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>asic-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>ASIC Type</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>ASIC_AC3X</askppplt:name>
+          <askppplt:description>AC3X</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>ASIC_AC5X</askppplt:name>
+          <askppplt:description>AC5X</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>ASIC_Falcon</askppplt:name>
+          <askppplt:description>FALCON</askppplt:description>
+          <askppplt:value>2</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+    </askppplt:typedefs>
+    <askppplt:ASIC_Type askppplt:type="asic-type">ASIC_Falcon</askppplt:ASIC_Type>
+    <askppplt:PPInit>
+      <askppplt:PP-name askppplt:type="std-string">Falcon-6.4</askppplt:PP-name>
+      <askppplt:Phase1>
+        <askppplt:coreClock askppplt:type="uint32">4294967295</askppplt:coreClock>
+        <askppplt:serdesRefClock askppplt:type="serdes-ref-clock-type">external_25_single_ended</askppplt:serdesRefClock>
+        <askppplt:isrAddrCompletionRegionsBmp askppplt:type="uint32">2</askppplt:isrAddrCompletionRegionsBmp>
+        <askppplt:appAddrCompletionRegionsBmp askppplt:type="uint32">60</askppplt:appAddrCompletionRegionsBmp>
+        <askppplt:maxNumOfPhyPortsToUse askppplt:type="number-physical-port-type">64-ports</askppplt:maxNumOfPhyPortsToUse>
+        <askppplt:tcamParityCalcEnable askppplt:type="boolean-type">false</askppplt:tcamParityCalcEnable>
+        <askppplt:apEnable askppplt:type="boolean-type">true</askppplt:apEnable>
+        <askppplt:numOfDataIntegrityElements askppplt:type="uint32">0</askppplt:numOfDataIntegrityElements>
+      </askppplt:Phase1>
+      <askppplt:Phase2>
+        <askppplt:useMultiNetIfSdma askppplt:type="boolean-type">true</askppplt:useMultiNetIfSdma>
+        <askppplt:auqCfg>
+          <askppplt:auDescNum askppplt:type="uint32">4096</askppplt:auDescNum>
+        </askppplt:auqCfg>
+        <askppplt:fuqCfg>
+          <askppplt:fuDescNum askppplt:type="uint32">2048</askppplt:fuDescNum>
+        </askppplt:fuqCfg>
+        <askppplt:multiNetIfCfg>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">0</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">7</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">6</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">5</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">4</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">3</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">2</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">1</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">0</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">7</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">6</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">5</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">4</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">3</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">2</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">1</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">0</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">7</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">6</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">5</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">4</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">3</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">2</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">1</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">0</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">7</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">6</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">5</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">4</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">3</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">2</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">1</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">0</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">1</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">2</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">3</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">4</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">5</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">6</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">7</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">0</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">1</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">2</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">3</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">4</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">5</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">6</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">7</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">0</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">1</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">2</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">3</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">4</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">5</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">6</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">7</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">0</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">1</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">2</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">3</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">4</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">5</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">6</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Packet_Generator</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">256</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">256</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">144</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">7</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Packet_Generator</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">1</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">1</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">3032</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+        </askppplt:multiNetIfCfg>
+        <askppplt:internal>
+          <askppplt:fuqUseSeparate askppplt:type="boolean-type">false</askppplt:fuqUseSeparate>
+          <askppplt:useSecondaryAuq askppplt:type="boolean-type">false</askppplt:useSecondaryAuq>
+          <askppplt:noTraffic2CPU askppplt:type="boolean-type">false</askppplt:noTraffic2CPU>
+          <askppplt:netifSdmaPortGroupId askppplt:type="uint32">0</askppplt:netifSdmaPortGroupId>
+          <askppplt:auMessageLength askppplt:type="au_mesage_lenght-type">8_words</askppplt:auMessageLength>
+          <askppplt:useDoubleAuq askppplt:type="boolean-type">false</askppplt:useDoubleAuq>
+        </askppplt:internal>
+      </askppplt:Phase2>
+      <askppplt:LogicalInit>
+        <askppplt:routingMode askppplt:type="routing-mode-type">TCAM_ROUTER_BASED</askppplt:routingMode>
+        <askppplt:maxNumOfPbrEntries askppplt:type="uint32">0</askppplt:maxNumOfPbrEntries>
+        <askppplt:sharedTableMode askppplt:type="shared-table-mode-type">MID_L3_MID_L2_NO_EM</askppplt:sharedTableMode>
+        <askppplt:ingressDropEnable askppplt:type="boolean-type">false</askppplt:ingressDropEnable>
+      </askppplt:LogicalInit>
+      <askppplt:LibInit>
+        <askppplt:initBridge askppplt:type="boolean-type">true</askppplt:initBridge>
+        <askppplt:initMirror askppplt:type="boolean-type">true</askppplt:initMirror>
+        <askppplt:initNetIf askppplt:type="boolean-type">true</askppplt:initNetIf>
+        <askppplt:initPhy askppplt:type="boolean-type">true</askppplt:initPhy>
+        <askppplt:initPort askppplt:type="boolean-type">true</askppplt:initPort>
+        <askppplt:initTrunk askppplt:type="boolean-type">true</askppplt:initTrunk>
+        <askppplt:Trunk-params>
+          <askppplt:maxNumberOfTrunks askppplt:type="uint32">1023</askppplt:maxNumberOfTrunks>
+          <askppplt:trunkMembersMode askppplt:type="trunk-member-mode-type">FLEX</askppplt:trunkMembersMode>
+        </askppplt:Trunk-params>
+        <askppplt:initPcl askppplt:type="boolean-type">true</askppplt:initPcl>
+        <askppplt:initTcam askppplt:type="boolean-type">true</askppplt:initTcam>
+        <askppplt:initPolicer askppplt:type="boolean-type">true</askppplt:initPolicer>
+        <askppplt:initPha askppplt:type="boolean-type">true</askppplt:initPha>
+        <askppplt:Pha-params>
+          <askppplt:packetOrderChangeEnable askppplt:type="boolean-type">false</askppplt:packetOrderChangeEnable>
+          <askppplt:phaFwImageId askppplt:type="pha-firmware-image-id-type">02</askppplt:phaFwImageId>
+          <askppplt:phaFwImageIdVersion askppplt:type="uint32">0</askppplt:phaFwImageIdVersion>
+        </askppplt:Pha-params>
+      </askppplt:LibInit>
+    </askppplt:PPInit>
+  </askppplt:ASK-PP>
+</data>
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FC48x25G4x100GR4/SAI-F6_4T-48x25G-4x100G.md5 b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FC48x25G4x100GR4/SAI-F6_4T-48x25G-4x100G.md5
new file mode 100644
index 000000000..64a779785
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FC48x25G4x100GR4/SAI-F6_4T-48x25G-4x100G.md5
@@ -0,0 +1 @@
+0952c232696d216ca2361801f32bfac4
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FC48x25G4x100GR4/SAI-F6_4T-48x25G-4x100G.xml b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FC48x25G4x100GR4/SAI-F6_4T-48x25G-4x100G.xml
new file mode 100644
index 000000000..9b3224ab6
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FC48x25G4x100GR4/SAI-F6_4T-48x25G-4x100G.xml
@@ -0,0 +1,503 @@
+<?xml version="1.0" encoding="utf-8"?>
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-02-19-1.06" profile="SAI" sid="c310bbb1-ffca-4c99-9bae-f7d4caff5941">
+  <SAIplt:SAI xmlns:SAIplt="urn:marvell:SAI:yang">
+    <SAIplt:typedefs>
+      <SAIplt:typedef>
+        <SAIplt:name>device-id-type</SAIplt:name>
+        <SAIplt:type>uint32</SAIplt:type>
+        <SAIplt:description>Device ID 0..1</SAIplt:description>
+        <SAIplt:min>0</SAIplt:min>
+        <SAIplt:max>1</SAIplt:max>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>port-id-type</SAIplt:name>
+        <SAIplt:type>uint32</SAIplt:type>
+        <SAIplt:description>Interface number</SAIplt:description>
+        <SAIplt:min>0</SAIplt:min>
+        <SAIplt:max>1023</SAIplt:max>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>logDest-type</SAIplt:name>
+        <SAIplt:type>enumeration</SAIplt:type>
+        <SAIplt:description>Logging Feature Options</SAIplt:description>
+        <SAIplt:enum>
+          <SAIplt:name>SAI_LOG_SYSLOG</SAIplt:name>
+          <SAIplt:description>SYSLOG  {Syslog service should be running to use this option}</SAIplt:description>
+          <SAIplt:value>0</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>SAI_LOG_CONSOLE</SAIplt:name>
+          <SAIplt:description>CONSOLE</SAIplt:description>
+          <SAIplt:value>1</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>SAI_LOG_FILE</SAIplt:name>
+          <SAIplt:description>FILE  {Warning !!! Use with caution. Can cause disk full issues}</SAIplt:description>
+          <SAIplt:value>2</SAIplt:value>
+        </SAIplt:enum>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>InDropCounter-type</SAIplt:name>
+        <SAIplt:type>enumeration</SAIplt:type>
+        <SAIplt:description>Router In Drop Reason Feature Options</SAIplt:description>
+        <SAIplt:enum>
+          <SAIplt:name>TTL_HOPLIMIT_EXCEEDED</SAIplt:name>
+          <SAIplt:description>Router In Drop Counters track TTL &amp; Hop Limit Exceeded Packets</SAIplt:description>
+          <SAIplt:value>0</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>ROUTE_BLACKHOLE</SAIplt:name>
+          <SAIplt:description>Router In Drop Counters track Route Black Hole Packets</SAIplt:description>
+          <SAIplt:value>1</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>IN_DROP_ANY</SAIplt:name>
+          <SAIplt:description>Router In Drop Counters track either TTL &amp; Hop Limit Exceeded or Route Black Hole Packets</SAIplt:description>
+          <SAIplt:value>2</SAIplt:value>
+        </SAIplt:enum>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>log-dest-file-path-type</SAIplt:name>
+        <SAIplt:type>string</SAIplt:type>
+        <SAIplt:description>A string with path to file for logging feature</SAIplt:description>
+        <SAIplt:min>2</SAIplt:min>
+        <SAIplt:max>30</SAIplt:max>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>acl-feature-name-type</SAIplt:name>
+        <SAIplt:type>enumeration</SAIplt:type>
+        <SAIplt:description/>
+        <SAIplt:enum>
+          <SAIplt:name>port-sFlow</SAIplt:name>
+          <SAIplt:description>SFlow over Port</SAIplt:description>
+          <SAIplt:value>0</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>port-counters-ipv4-ipv6</SAIplt:name>
+          <SAIplt:description>Port ipv4/ipv6 counters</SAIplt:description>
+          <SAIplt:value>1</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>control-acl</SAIplt:name>
+          <SAIplt:description>ACLs for control packet handling</SAIplt:description>
+          <SAIplt:value>2</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>debug-counter-acl</SAIplt:name>
+          <SAIplt:description>ACLs for Debug Counters</SAIplt:description>
+          <SAIplt:value>3</SAIplt:value>
+        </SAIplt:enum>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>ingress-acl-stage-type</SAIplt:name>
+        <SAIplt:type>enumeration</SAIplt:type>
+        <SAIplt:description/>
+        <SAIplt:enum>
+          <SAIplt:name>disabled</SAIplt:name>
+          <SAIplt:description>Feature not enabled</SAIplt:description>
+          <SAIplt:value>0</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>IPCL0</SAIplt:name>
+          <SAIplt:description>Stage IPCL0</SAIplt:description>
+          <SAIplt:value>1</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>IPCL1</SAIplt:name>
+          <SAIplt:description>Stage IPCL1</SAIplt:description>
+          <SAIplt:value>2</SAIplt:value>
+        </SAIplt:enum>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>egress-acl-stage-type</SAIplt:name>
+        <SAIplt:type>enumeration</SAIplt:type>
+        <SAIplt:description/>
+        <SAIplt:enum>
+          <SAIplt:name>disabled</SAIplt:name>
+          <SAIplt:description>Feature not enabled</SAIplt:description>
+          <SAIplt:value>0</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>EPCL0</SAIplt:name>
+          <SAIplt:description>Stage EPCL0</SAIplt:description>
+          <SAIplt:value>2</SAIplt:value>
+        </SAIplt:enum>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>feature-priority-type</SAIplt:name>
+        <SAIplt:type>uint32</SAIplt:type>
+        <SAIplt:description>Feature priority</SAIplt:description>
+        <SAIplt:min>2</SAIplt:min>
+        <SAIplt:max>15</SAIplt:max>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>hit-number-type</SAIplt:name>
+        <SAIplt:type>uint32</SAIplt:type>
+        <SAIplt:description>Hit/lookup number</SAIplt:description>
+        <SAIplt:min>0</SAIplt:min>
+        <SAIplt:max>3</SAIplt:max>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>asic-type</SAIplt:name>
+        <SAIplt:type>enumeration</SAIplt:type>
+        <SAIplt:description>ASIC Type</SAIplt:description>
+        <SAIplt:enum>
+          <SAIplt:name>ASIC_AC3X</SAIplt:name>
+          <SAIplt:description>AC3X</SAIplt:description>
+          <SAIplt:value>0</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>ASIC_AC5X</SAIplt:name>
+          <SAIplt:description>AC5X</SAIplt:description>
+          <SAIplt:value>1</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>ASIC_Falcon</SAIplt:name>
+          <SAIplt:description>FALCON</SAIplt:description>
+          <SAIplt:value>2</SAIplt:value>
+        </SAIplt:enum>
+      </SAIplt:typedef>
+    </SAIplt:typedefs>
+    <SAIplt:ASIC_Type SAIplt:type="asic-type">ASIC_Falcon</SAIplt:ASIC_Type>
+    <SAIplt:ASK-BOARD-Profile-Name SAIplt:type="string">ASK-Board-F6_4T-48x25G-4x100G.xml</SAIplt:ASK-BOARD-Profile-Name>
+    <SAIplt:Ports>
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+        <SAIplt:sai_port_id SAIplt:type="port-id-type">0</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">47</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
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+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">46</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
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+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">45</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
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+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">44</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
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+      <SAIplt:max_Nh_Ecmp_Mbr_Per_Grp SAIplt:type="uint32">64</SAIplt:max_Nh_Ecmp_Mbr_Per_Grp>
+      <SAIplt:max_ipv4_tunnel SAIplt:type="uint32">8</SAIplt:max_ipv4_tunnel>
+      <SAIplt:max_ipv6_tunnel SAIplt:type="uint32">8</SAIplt:max_ipv6_tunnel>
+      <SAIplt:max_tti SAIplt:type="uint32">1024</SAIplt:max_tti>
+      <SAIplt:wred_size SAIplt:type="uint32">0</SAIplt:wred_size>
+      <SAIplt:max_nat SAIplt:type="uint32">0</SAIplt:max_nat>
+    </SAIplt:scalingFalcon>
+    <SAIplt:Counters>
+      <SAIplt:cnc-base-list>
+        <SAIplt:counter-base SAIplt:type="uint32">0</SAIplt:counter-base>
+      </SAIplt:cnc-base-list>
+    </SAIplt:Counters>
+    <SAIplt:Logging>
+      <SAIplt:log_dest SAIplt:type="logDest-type">SAI_LOG_SYSLOG</SAIplt:log_dest>
+    </SAIplt:Logging>
+    <SAIplt:Features-using-acl>
+      <SAIplt:feature SAIplt:type="acl-feature-name-type">control-acl</SAIplt:feature>
+      <SAIplt:feature-priority SAIplt:type="feature-priority-type">3</SAIplt:feature-priority>
+      <SAIplt:Ingress>
+        <SAIplt:ingress-stage SAIplt:type="ingress-acl-stage-type">IPCL0</SAIplt:ingress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">1</SAIplt:hit-number>
+      </SAIplt:Ingress>
+      <SAIplt:Egress>
+        <SAIplt:egress-stage SAIplt:type="egress-acl-stage-type">EPCL0</SAIplt:egress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">0</SAIplt:hit-number>
+      </SAIplt:Egress>
+    </SAIplt:Features-using-acl>
+    <SAIplt:Features-using-acl>
+      <SAIplt:feature SAIplt:type="acl-feature-name-type">port-sFlow</SAIplt:feature>
+      <SAIplt:feature-priority SAIplt:type="feature-priority-type">4</SAIplt:feature-priority>
+      <SAIplt:Ingress>
+        <SAIplt:ingress-stage SAIplt:type="ingress-acl-stage-type">IPCL0</SAIplt:ingress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">0</SAIplt:hit-number>
+      </SAIplt:Ingress>
+      <SAIplt:Egress>
+        <SAIplt:egress-stage SAIplt:type="egress-acl-stage-type">EPCL0</SAIplt:egress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">0</SAIplt:hit-number>
+      </SAIplt:Egress>
+    </SAIplt:Features-using-acl>
+    <SAIplt:Features-using-acl>
+      <SAIplt:feature SAIplt:type="acl-feature-name-type">port-counters-ipv4-ipv6</SAIplt:feature>
+      <SAIplt:feature-priority SAIplt:type="feature-priority-type">5</SAIplt:feature-priority>
+      <SAIplt:Ingress>
+        <SAIplt:ingress-stage SAIplt:type="ingress-acl-stage-type">IPCL0</SAIplt:ingress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">3</SAIplt:hit-number>
+      </SAIplt:Ingress>
+      <SAIplt:Egress>
+        <SAIplt:egress-stage SAIplt:type="egress-acl-stage-type">EPCL0</SAIplt:egress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">0</SAIplt:hit-number>
+      </SAIplt:Egress>
+    </SAIplt:Features-using-acl>
+    <SAIplt:Features-using-acl>
+      <SAIplt:feature SAIplt:type="acl-feature-name-type">debug-counter-acl</SAIplt:feature>
+      <SAIplt:feature-priority SAIplt:type="feature-priority-type">2</SAIplt:feature-priority>
+      <SAIplt:Ingress>
+        <SAIplt:ingress-stage SAIplt:type="ingress-acl-stage-type">IPCL0</SAIplt:ingress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">1</SAIplt:hit-number>
+      </SAIplt:Ingress>
+      <SAIplt:Egress>
+        <SAIplt:egress-stage SAIplt:type="egress-acl-stage-type">EPCL0</SAIplt:egress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">0</SAIplt:hit-number>
+      </SAIplt:Egress>
+    </SAIplt:Features-using-acl>
+  </SAIplt:SAI>
+</data>
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FC48x25G4x100GR4/buffers_defaults_t0.j2 b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FC48x25G4x100GR4/buffers_defaults_t0.j2
new file mode 100644
index 000000000..f056413e8
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FC48x25G4x100GR4/buffers_defaults_t0.j2
@@ -0,0 +1,36 @@
+
+{%- set default_cable = '40m' %}
+
+{%- macro generate_buffer_pool_and_profiles() %}
+    "BUFFER_POOL": {
+        "ingress_lossless_pool": {
+            "size": "11500000",
+            "type": "ingress",
+            "mode": "dynamic"
+        },
+        "egress_pool": {
+            "size": "11500000",
+            "type": "egress",
+            "mode": "static"
+        }
+    },
+    "BUFFER_PROFILE": {
+        "ingress_lossy_profile": {
+            "pool":"ingress_lossless_pool",
+            "size":"0",
+            "dynamic_th":"3"
+        },
+        "egress_lossless_profile": {
+            "pool":"egress_pool",
+            "mode": "static",
+            "size":"170000",
+            "static_th":"0"
+        },
+        "egress_lossy_profile": {
+            "pool":"egress_pool",
+            "size":"0",
+            "mode": "dynamic",
+            "dynamic_th":"3"
+        }
+    },
+{%- endmacro %}
diff --git a/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FC48x25G4x100GR4/buffers_defaults_t1.j2 b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FC48x25G4x100GR4/buffers_defaults_t1.j2
new file mode 100644
index 000000000..f056413e8
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FC48x25G4x100GR4/buffers_defaults_t1.j2
@@ -0,0 +1,36 @@
+
+{%- set default_cable = '40m' %}
+
+{%- macro generate_buffer_pool_and_profiles() %}
+    "BUFFER_POOL": {
+        "ingress_lossless_pool": {
+            "size": "11500000",
+            "type": "ingress",
+            "mode": "dynamic"
+        },
+        "egress_pool": {
+            "size": "11500000",
+            "type": "egress",
+            "mode": "static"
+        }
+    },
+    "BUFFER_PROFILE": {
+        "ingress_lossy_profile": {
+            "pool":"ingress_lossless_pool",
+            "size":"0",
+            "dynamic_th":"3"
+        },
+        "egress_lossless_profile": {
+            "pool":"egress_pool",
+            "mode": "static",
+            "size":"170000",
+            "static_th":"0"
+        },
+        "egress_lossy_profile": {
+            "pool":"egress_pool",
+            "size":"0",
+            "mode": "dynamic",
+            "dynamic_th":"3"
+        }
+    },
+{%- endmacro %}
diff --git a/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FC48x25G4x100GR4/port_config.ini b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FC48x25G4x100GR4/port_config.ini
new file mode 100644
index 000000000..a8d374571
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FC48x25G4x100GR4/port_config.ini
@@ -0,0 +1,55 @@
+#  name       lanes                       alias           speed  autoneg     fec    index
+Ethernet0       0                        twenty5GigE0      25000    on        none      1
+Ethernet1       1                        twenty5GigE1      25000    on        none      2
+Ethernet2       2                        twenty5GigE2      25000    on        none      3
+Ethernet3       3                        twenty5GigE3      25000    on        none      4
+Ethernet4       4                        twenty5GigE4      25000    on        none      5
+Ethernet5       5                        twenty5GigE5      25000    on        none      6
+Ethernet6       6                        twenty5GigE6      25000    on        none      7
+Ethernet7       7                        twenty5GigE7      25000    on        none      8
+Ethernet8       8                        twenty5GigE8      25000    on        none      9
+Ethernet9       9                        twenty5GigE9      25000    on        none      10
+Ethernet10     10                        twenty5GigE10     25000    on        none      11
+Ethernet11     11                        twenty5GigE11     25000    on        none      12
+Ethernet12     12                        twenty5GigE12     25000    on        none      13
+Ethernet13     13                        twenty5GigE13     25000    on        none      14
+Ethernet14     14                        twenty5GigE14     25000    on        none      15
+Ethernet15     15                        twenty5GigE15     25000    on        none      16
+Ethernet16     16                        twenty5GigE16     25000    on        none      17
+Ethernet17     17                        twenty5GigE17     25000    on        none      18
+Ethernet18     18                        twenty5GigE18     25000    on        none      19
+Ethernet19     19                        twenty5GigE19     25000    on        none      20
+Ethernet20     20                        twenty5GigE20     25000    on        none      21
+Ethernet21     21                        twenty5GigE21     25000    on        none      22
+Ethernet22     22                        twenty5GigE22     25000    on        none      23
+Ethernet23     23                        twenty5GigE23     25000    on        none      24
+Ethernet24     24                        twenty5GigE24     25000    on        none      25
+Ethernet25     25                        twenty5GigE25     25000    on        none      26
+Ethernet26     26                        twenty5GigE26     25000    on        none      27
+Ethernet27     27                        twenty5GigE27     25000    on        none      28
+Ethernet28     28                        twenty5GigE28     25000    on        none      29
+Ethernet29     29                        twenty5GigE29     25000    on        none      30
+Ethernet30     30                        twenty5GigE30     25000    on        none      31
+Ethernet31     31                        twenty5GigE31     25000    on        none      32
+Ethernet32     32                        twenty5GigE32     25000    on        none      33
+Ethernet33     33                        twenty5GigE33     25000    on        none      34
+Ethernet34     34                        twenty5GigE34     25000    on        none      35
+Ethernet35     35                        twenty5GigE35     25000    on        none      36
+Ethernet36     36                        twenty5GigE36     25000    on        none      37
+Ethernet37     37                        twenty5GigE37     25000    on        none      38
+Ethernet38     38                        twenty5GigE38     25000    on        none      39
+Ethernet39     39                        twenty5GigE39     25000    on        none      40
+Ethernet40     40                        twenty5GigE40     25000    on        none      41
+Ethernet41     41                        twenty5GigE41     25000    on        none      42
+Ethernet42     42                        twenty5GigE42     25000    on        none      43
+Ethernet43     43                        twenty5GigE43     25000    on        none      44
+Ethernet44     44                        twenty5GigE44     25000    on        none      45
+Ethernet45     45                        twenty5GigE45     25000    on        none      46
+Ethernet46     46                        twenty5GigE46     25000    on        none      47
+Ethernet47     47                        twenty5GigE47     25000    on        none      48
+Ethernet48     48,49,50,51               one00GigE48      100000    on          rs      49
+Ethernet49     52,53,54,55               one00GigE49      100000    on          rs      50
+Ethernet50     56,57,58,59               one00GigE50      100000    on          rs      51
+Ethernet51     60,61,62,63               one00GigE51      100000    on          rs      52
+Ethernet52     64                        tenGigE52         10000    off       none      53
+Ethernet53     65                        tenGigE53         10000    off       none      54
diff --git a/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FC48x25G4x100GR4/profile.ini b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FC48x25G4x100GR4/profile.ini
new file mode 100644
index 000000000..c2f77685a
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FC48x25G4x100GR4/profile.ini
@@ -0,0 +1 @@
+switchMacAddress=00:01:02:03:04:05
diff --git a/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FC48x25G4x100GR4/sai.profile b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FC48x25G4x100GR4/sai.profile
new file mode 100644
index 000000000..b57d61241
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/FC48x25G4x100GR4/sai.profile
@@ -0,0 +1,4 @@
+mode=1
+hwId=FC48x25G4x100GR4
+switchProfile=/usr/share/sonic/hwsku/SAI-F6_4T-48x25G-4x100G.xml
+SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/profile.ini
diff --git a/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/db98cx8540_16cd/ASK-Board-F6_4T-48x25G-4x100G.md5 b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/db98cx8540_16cd/ASK-Board-F6_4T-48x25G-4x100G.md5
new file mode 100644
index 000000000..8c4e2fc53
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/db98cx8540_16cd/ASK-Board-F6_4T-48x25G-4x100G.md5
@@ -0,0 +1 @@
+8aeebdef0a211f5143f1084019654814
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/db98cx8540_16cd/ASK-Board-F6_4T-48x25G-4x100G.xml b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/db98cx8540_16cd/ASK-Board-F6_4T-48x25G-4x100G.xml
new file mode 100644
index 000000000..d88594c3e
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/db98cx8540_16cd/ASK-Board-F6_4T-48x25G-4x100G.xml
@@ -0,0 +1,2606 @@
+<?xml version="1.0" encoding="utf-8"?>
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-02-19-1.06" profile="Askboard" sid="eb53f80b-5892-4f8b-9197-a6f626effaba">
+  <askboardplt:ASK-Board xmlns:askboardplt="urn:marvell:askboard:yang">
+    <askboardplt:typedefs>
+      <askboardplt:typedef>
+        <askboardplt:name>std-string</askboardplt:name>
+        <askboardplt:type>string</askboardplt:type>
+        <askboardplt:description>standard string.</askboardplt:description>
+        <askboardplt:min>1</askboardplt:min>
+        <askboardplt:max>100</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>board-callback-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies os/ext drv callback types.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>linux-static</askboardplt:name>
+          <askboardplt:description>Linux Static</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>linux-shared</askboardplt:name>
+          <askboardplt:description>Linux Shared Lib mode</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>external</askboardplt:name>
+          <askboardplt:description>External Os</askboardplt:description>
+          <askboardplt:value>3</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>freeBsd</askboardplt:name>
+          <askboardplt:description>Free BSD</askboardplt:description>
+          <askboardplt:value>4</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>board-pp-map-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies pci info types.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>fixed</askboardplt:name>
+          <askboardplt:description>Fixed</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>autoscan</askboardplt:name>
+          <askboardplt:description>Auto scan</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>board-pp-interface-channel-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies channel interface type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>pci</askboardplt:name>
+          <askboardplt:description>PCI</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>smi</askboardplt:name>
+          <askboardplt:description>SMI</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>twsi</askboardplt:name>
+          <askboardplt:description>TWSI</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>board-pp-as-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies Address space type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>4_regions</askboardplt:name>
+          <askboardplt:description>address-space 4 regions</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>8_regions</askboardplt:name>
+          <askboardplt:description>address-space 8 regions</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>atu</askboardplt:name>
+          <askboardplt:description>address translation unit</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>device-id-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Device ID 0..1</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>1</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>port-mapping-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies port map type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>ethernet_mac</askboardplt:name>
+          <askboardplt:description>ETHERNET_MAC</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>cpu_sdma</askboardplt:name>
+          <askboardplt:description>CPU_SDMA</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>interface-num-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Interface number</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>1023</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>txq-port-number-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>TXq port number </askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>99</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>phy-smi-interface-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Phy SMI interface type.</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>3</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>phy-xsmi-interface-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Phy XSMI interface type.</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>15</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>phy-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the PHY Part Identifier.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>NA</askboardplt:name>
+          <askboardplt:description>No Phy</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E1543</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E1543, used for Combo ports.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E1545</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E1545, used for Copper GE with MAC on PHY support.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E1680</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E1680, used for Copper with speeds of 10M/100M/1G.</askboardplt:description>
+          <askboardplt:value>3</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E151X</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E151X, used for Copper (HW supports combo and fiber).</askboardplt:description>
+          <askboardplt:value>4</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E3140</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E3140, used for Copper with speeds of 100M/1G/10G.
+Uses with FW SolarFlare next generation.</askboardplt:description>
+          <askboardplt:value>5</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E3240</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E3240, used for Copper with speeds of 100M/1G/10G.
+Uses with FW, SolarFlare next generation.</askboardplt:description>
+          <askboardplt:value>6</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E3680</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E3680, used for Octal Copper 100M.</askboardplt:description>
+          <askboardplt:value>7</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E3220</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E3220, used for Combo port with speeds of 100M/1G/10G.
+Uses FW, SolarFlare next generation.</askboardplt:description>
+          <askboardplt:value>8</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E1680L</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E1680L, used for Copper with speeds of 10M/100M/1G.</askboardplt:description>
+          <askboardplt:value>9</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E33X0</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E33X0, used for MGIG Combo.</askboardplt:description>
+          <askboardplt:value>10</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E1548</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E1548, used for Fiber GE.</askboardplt:description>
+          <askboardplt:value>11</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E20X0</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E20X0, used for Copper with speeds of 10M/100M/1G/2.5G/5G.</askboardplt:description>
+          <askboardplt:value>12</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E1512</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E1512, used for Copper with speeds of 10M/100M/1G.</askboardplt:description>
+          <askboardplt:value>13</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E2180</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E2180, used for Copper with speeds of 10M/100M/1G/2.5G/5G.</askboardplt:description>
+          <askboardplt:value>14</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E1780</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E1780, Integrated Octal 10/100/1000 Mbps Energy
+Efficient Ethernet Transceiver</askboardplt:description>
+          <askboardplt:value>15</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E2540</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E2540, 4 ports 10/100/1000/2.5G/5GBASE-T Ethernet
+Transceiver with IEEE 1588v2 PTP Support</askboardplt:description>
+          <askboardplt:value>16</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E2580</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E12580, Octal 10/100/1000/2.5G/5GBASE-T Ethernet Transceiver
+with IEEE 1588v2 PTP Support</askboardplt:description>
+          <askboardplt:value>17</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>physical-port-num-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>PHYSICAL PORT NUM</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>1023</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-port-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the ledstream port type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>PORT_TYPE_TRI_SPEED</askboardplt:name>
+          <askboardplt:description>tri-speed port.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>PORT_TYPE_XG</askboardplt:name>
+          <askboardplt:description>XG port.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-blink-select-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the LED stream blink select type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_SELECT_0</askboardplt:name>
+          <askboardplt:description>Blink 0 signal.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_SELECT_1</askboardplt:name>
+          <askboardplt:description>Blink 1 signal</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-order-mode-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the LED stream ordering mode.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>ORDER_MODE_BY_PORT</askboardplt:name>
+          <askboardplt:description>the indication order is arranged by port.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>ORDER_MODE_BY_CLASS</askboardplt:name>
+          <askboardplt:description>the indication order is arranged by class.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-blink-duty-cycle-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the LED stream blink cycle duty cycle type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DUTY_CYCLE_0</askboardplt:name>
+          <askboardplt:description>25% on, 75% off.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DUTY_CYCLE_1</askboardplt:name>
+          <askboardplt:description>50% on, 50% off.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DUTY_CYCLE_2</askboardplt:name>
+          <askboardplt:description>50% on, 50% off.</askboardplt:description>
+          <askboardplt:value>3</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DUTY_CYCLE_3</askboardplt:name>
+          <askboardplt:description>75% on, 25% off.</askboardplt:description>
+          <askboardplt:value>4</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-blink-duration-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the LED stream blink period type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DURATION_0</askboardplt:name>
+          <askboardplt:description>BLINK_DURATION_0.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DURATION_1</askboardplt:name>
+          <askboardplt:description>BLINK_DURATION_1.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DURATION_2</askboardplt:name>
+          <askboardplt:description>BLINK_DURATION_2.</askboardplt:description>
+          <askboardplt:value>3</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DURATION_3</askboardplt:name>
+          <askboardplt:description>BLINK_DURATION_3.</askboardplt:description>
+          <askboardplt:value>4</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DURATION_4</askboardplt:name>
+          <askboardplt:description>BLINK_DURATION_4.</askboardplt:description>
+          <askboardplt:value>5</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DURATION_5</askboardplt:name>
+          <askboardplt:description>BLINK_DURATION_5.</askboardplt:description>
+          <askboardplt:value>6</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DURATION_6</askboardplt:name>
+          <askboardplt:description>(APPLICABLE DEVICES: xCat3; AC5; Lion2; Bobcat2; Caelum; Aldrin; AC3X; Bobcat3; Aldrin2; Pipe) .</askboardplt:description>
+          <askboardplt:value>7</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DURATION_7</askboardplt:name>
+          <askboardplt:description>APPLICABLE DEVICES: Bobcat2; Caelum; Aldrin; AC3X; Bobcat3; Aldrin2; Pipe).</askboardplt:description>
+          <askboardplt:value>8</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-pulse-stretch-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the LED stream length of stretching for dynamic signals.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>PULSE_STRETCH_0_NO</askboardplt:name>
+          <askboardplt:description>PULSE_STRETCH_0_NO.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>PULSE_STRETCH_1</askboardplt:name>
+          <askboardplt:description>PULSE_STRETCH_1.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>PULSE_STRETCH_2</askboardplt:name>
+          <askboardplt:description>PULSE_STRETCH_2.</askboardplt:description>
+          <askboardplt:value>3</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>PULSE_STRETCH_3</askboardplt:name>
+          <askboardplt:description>PULSE_STRETCH_3.</askboardplt:description>
+          <askboardplt:value>4</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>PULSE_STRETCH_4</askboardplt:name>
+          <askboardplt:description>PULSE_STRETCH_4.</askboardplt:description>
+          <askboardplt:value>5</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>PULSE_STRETCH_5</askboardplt:name>
+          <askboardplt:description>PULSE_STRETCH_5.</askboardplt:description>
+          <askboardplt:value>6</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>PULSE_STRETCH_6</askboardplt:name>
+          <askboardplt:description>(APPLICABLE DEVICES: Bobcat2; Caelum; Aldrin; AC3X; Bobcat3; Aldrin2; Falcon; AC5P; Pipe).</askboardplt:description>
+          <askboardplt:value>7</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>PULSE_STRETCH_7</askboardplt:name>
+          <askboardplt:description>(APPLICABLE DEVICES: Bobcat2; Caelum; Aldrin; AC3X; Bobcat3; Aldrin2; Falcon; AC5P; Pipe).</askboardplt:description>
+          <askboardplt:value>8</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-clock-out-frequency-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the LED stream blink cycle duty cycle type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>_CLOCK_OUT_FREQUENCY_500</askboardplt:name>
+          <askboardplt:description>500 KHz LED clock frequency.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>CLOCK_OUT_FREQUENCY_1000</askboardplt:name>
+          <askboardplt:description>1 MHz LED clock frequency.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>CLOCK_OUT_FREQUENCY_2000</askboardplt:name>
+          <askboardplt:description>2 MHz LED clock frequency.</askboardplt:description>
+          <askboardplt:value>3</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>CLOCK_OUT_FREQUENCY_3000</askboardplt:name>
+          <askboardplt:description>3 MHz LED clock frequency.</askboardplt:description>
+          <askboardplt:value>4</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-class5-select-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the LED stream indication displayed on class5 (for dual-media port/phy).</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>CLASS_5_SELECT_HALF_DUPLEX</askboardplt:name>
+          <askboardplt:description>Half Duplex is displayed on class5.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>CLASS_5_SELECT_FIBER_LINK_UP</askboardplt:name>
+          <askboardplt:description>If port is a dual media port, Fiber Link Up is displayed on class5.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-class13-select-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the LED stream indication displayed on class13 (for dual-media port/phy).</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>CLASS_13_SELECT_LINK_DOWN</askboardplt:name>
+          <askboardplt:description>Link Down is displayed on class13.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>CLASS_13_SELECT_COPPER_LINK_UP</askboardplt:name>
+          <askboardplt:description>If port is a dual media port, Copper Link Up is displayed on class13.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-class-num-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Led Class number</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>11</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>boolean-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Boolean 32 bits , due to bing endian</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>false</askboardplt:name>
+          <askboardplt:description>False</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>true</askboardplt:name>
+          <askboardplt:description>True</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>bus-id-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Bus Id Type, PCI/SMI</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>255</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>function-id-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Function Id Type, PCI/SMI</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>255</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>domain-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Domain, PCI/SMI</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>255</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-interface-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Led interface</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>255</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-position-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Led position</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>63</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>serdes-lane-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>serdes lane</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>7</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>cpu-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>The CPU Internal/External</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>external</askboardplt:name>
+          <askboardplt:description>Extrenal connected CPU</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>internal</askboardplt:name>
+          <askboardplt:description>Internal CPU</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-clock-frequency-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Led Clock Frequency Sip6</askboardplt:description>
+        <askboardplt:min>500</askboardplt:min>
+        <askboardplt:max>80000</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-unit-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Led units</askboardplt:description>
+        <askboardplt:min>1</askboardplt:min>
+        <askboardplt:max>16</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-unit-or-no-unit-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Led units, 0 for no Unit</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>16</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-group-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Led Group</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>1</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-force-data-type</askboardplt:name>
+        <askboardplt:type>string</askboardplt:type>
+        <askboardplt:description>A hexadecimal string with octets represented as hex digits
+separated by colons.  The canonical representation uses
+lowercase characters.</askboardplt:description>
+        <askboardplt:min>3</askboardplt:min>
+        <askboardplt:max>11</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>bit-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Bit range 0..31</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>31</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>bit-size-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Bit leng 1..32</askboardplt:description>
+        <askboardplt:min>1</askboardplt:min>
+        <askboardplt:max>32</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-sip-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>The LED scehme</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>na</askboardplt:name>
+          <askboardplt:description>NA</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>sip5</askboardplt:name>
+          <askboardplt:description>SIP5: AC3x</askboardplt:description>
+          <askboardplt:value>5</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>sip6</askboardplt:name>
+          <askboardplt:description>SIP6: Falcon, AC5x</askboardplt:description>
+          <askboardplt:value>6</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>port-cscd-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the cascade port type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>DSA_1_WORD</askboardplt:name>
+          <askboardplt:description>DSA Regular</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>DSA_2_WORDS</askboardplt:name>
+          <askboardplt:description>DSA Extended</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>NETWORK</askboardplt:name>
+          <askboardplt:description>Network.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>DSA_3_WORDS</askboardplt:name>
+          <askboardplt:description>DSA 3 Words</askboardplt:description>
+          <askboardplt:value>3</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>DSA_4_WORD</askboardplt:name>
+          <askboardplt:description>DSA 4 Words</askboardplt:description>
+          <askboardplt:value>4</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>trunk-cscd-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Specifies the Cascade Trunk id.</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>127</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>port-trunk-cscd-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the cascade port type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>cscdPort</askboardplt:name>
+          <askboardplt:description>Cascade port</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>cscdTrunk</askboardplt:name>
+          <askboardplt:description>Csacde trunk</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>hash-cscd-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the hash used by cascade trunk.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>pkt</askboardplt:name>
+          <askboardplt:description>Hash based on packet</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>srcPort</askboardplt:name>
+          <askboardplt:description>Hash based on source port</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>asic-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>ASIC Type</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>ASIC_AC3X</askboardplt:name>
+          <askboardplt:description>AC3X</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>ASIC_AC5X</askboardplt:name>
+          <askboardplt:description>AC5X</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>ASIC_Falcon</askboardplt:name>
+          <askboardplt:description>FALCON</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+    </askboardplt:typedefs>
+    <askboardplt:ASIC_Type askboardplt:type="asic-type">ASIC_Falcon</askboardplt:ASIC_Type>
+    <askboardplt:boardName askboardplt:type="std-string">Falcon-6.4T-48x25G-4x100G</askboardplt:boardName>
+    <askboardplt:osCallType askboardplt:type="board-callback-type">linux-static</askboardplt:osCallType>
+    <askboardplt:extDrvCallType askboardplt:type="board-callback-type">linux-static</askboardplt:extDrvCallType>
+    <askboardplt:mapType askboardplt:type="board-pp-map-type">autoscan</askboardplt:mapType>
+    <askboardplt:cpuType askboardplt:type="cpu-type">external</askboardplt:cpuType>
+    <askboardplt:mngInterfaceType askboardplt:type="board-pp-interface-channel-type">pci</askboardplt:mngInterfaceType>
+    <askboardplt:adressSpaceType askboardplt:type="board-pp-as-type">atu</askboardplt:adressSpaceType>
+    <askboardplt:device-list>
+      <askboardplt:devNum askboardplt:type="device-id-type">0</askboardplt:devNum>
+      <askboardplt:deviceId askboardplt:type="device-id-type">0</askboardplt:deviceId>
+      <askboardplt:pp-profile-name askboardplt:type="std-string">ASK-PP-F6_4T-48x25G-4x100G.xml</askboardplt:pp-profile-name>
+      <askboardplt:L1-profile-name askboardplt:type="std-string">ASK-L1-F6_4T-48x25G-4x100G.xml</askboardplt:L1-profile-name>
+      <askboardplt:ledStreamType askboardplt:type="led-sip-type">sip6</askboardplt:ledStreamType>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">0</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">0</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP0</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">0</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">1</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">1</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">2</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">2</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">3</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">3</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">4</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">8</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP1</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">1</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">5</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">9</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">6</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">10</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">7</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">11</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">8</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">16</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP0</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">0</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">9</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">17</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">10</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">18</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">11</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">19</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">12</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">24</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP1</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">1</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">13</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">25</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">14</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">26</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">15</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">27</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">16</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">32</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP0</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">0</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">17</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">33</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">18</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">34</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">19</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">35</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">20</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">40</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP1</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">1</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">21</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">41</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">22</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">42</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">23</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">43</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">24</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">48</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP0</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">0</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">25</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">49</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">26</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">50</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">27</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">51</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">28</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">56</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP1</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">1</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">29</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">57</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">30</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">58</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">31</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">59</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">32</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">64</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP0</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">0</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">33</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">65</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">35</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">67</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">34</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">66</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">36</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">72</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP1</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">1</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">37</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">73</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">39</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">75</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">38</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">74</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">40</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">80</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP0</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">0</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">41</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">81</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">43</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">83</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">42</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">82</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">44</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">88</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP1</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">1</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">45</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">89</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">46</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">90</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">47</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">91</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">48</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">96</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP0</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">0</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">49</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">104</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP1</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">1</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">50</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">112</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP0</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">0</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">51</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">120</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP1</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type">1</askboardplt:ledPosition>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">52</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">128</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">53</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">135</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:polarityInvertList-list>
+            <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+          </askboardplt:polarityInvertList-list>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">63</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">cpu_sdma</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">136</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">54</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">cpu_sdma</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">137</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">55</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">cpu_sdma</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">138</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">56</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">cpu_sdma</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">139</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+      </askboardplt:portMap-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">7</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">1</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">6</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">0</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">5</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">3</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">4</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">2</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">8</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">14</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">9</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">15</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">10</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">12</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">11</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">13</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">23</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">17</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">22</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">16</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">21</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">19</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">20</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">18</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">24</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">30</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">25</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">31</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">26</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">28</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">27</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">29</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">39</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">33</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">38</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">32</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">37</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">35</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">36</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">34</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">40</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">41</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">46</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">47</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">42</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">44</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">43</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">45</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">55</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">49</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">54</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">48</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">53</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">51</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">52</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">50</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">56</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">62</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">57</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">63</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">58</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">60</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">59</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">61</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">71</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">65</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">70</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">64</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">69</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">67</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">68</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">66</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">72</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">78</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">73</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">79</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">74</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">76</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">75</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">77</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">87</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">81</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">86</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">80</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">85</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">83</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">84</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">82</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">88</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">94</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">89</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">95</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">90</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">92</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">91</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">93</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">103</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">97</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">102</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">96</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">101</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">99</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">100</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">98</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">104</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">110</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">105</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">111</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">106</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">108</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">107</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">109</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">119</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">113</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">118</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">112</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">117</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">115</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">116</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">114</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">120</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">126</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">121</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">127</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">122</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">124</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">123</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">125</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">128</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">135</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:Ledstream-interface-list>
+        <askboardplt:ledstream-interface-number askboardplt:type="led-interface-type">0</askboardplt:ledstream-interface-number>
+        <askboardplt:ledstream-configSet>
+          <askboardplt:ledOrganize askboardplt:type="led-stream-order-mode-type">ORDER_MODE_BY_CLASS</askboardplt:ledOrganize>
+          <askboardplt:blink0DutyCycle askboardplt:type="led-stream-blink-duty-cycle-type">BLINK_DUTY_CYCLE_0</askboardplt:blink0DutyCycle>
+          <askboardplt:blink0Duration askboardplt:type="led-stream-blink-duration-type">BLINK_DURATION_0</askboardplt:blink0Duration>
+          <askboardplt:blink1DutyCycle askboardplt:type="led-stream-blink-duty-cycle-type">BLINK_DUTY_CYCLE_0</askboardplt:blink1DutyCycle>
+          <askboardplt:blink1Duration askboardplt:type="led-stream-blink-duration-type">BLINK_DURATION_1</askboardplt:blink1Duration>
+          <askboardplt:pulseStretch askboardplt:type="led-stream-pulse-stretch-type">PULSE_STRETCH_1</askboardplt:pulseStretch>
+          <askboardplt:invertEnable askboardplt:type="boolean-type">false</askboardplt:invertEnable>
+          <askboardplt:SIP6ledClockFrequency askboardplt:type="led-stream-clock-frequency-type">1627</askboardplt:SIP6ledClockFrequency>
+          <askboardplt:ledClockPosEdgeModeEnable askboardplt:type="boolean-type">false</askboardplt:ledClockPosEdgeModeEnable>
+          <askboardplt:ledUnit-List>
+            <askboardplt:ledUnit askboardplt:type="led-unit-type">1</askboardplt:ledUnit>
+            <askboardplt:ledStart askboardplt:type="uint32">64</askboardplt:ledStart>
+            <askboardplt:ledEnd askboardplt:type="uint32">66</askboardplt:ledEnd>
+            <askboardplt:ledChainBypass askboardplt:type="boolean-type">false</askboardplt:ledChainBypass>
+          </askboardplt:ledUnit-List>
+          <askboardplt:ledUnit-List>
+            <askboardplt:ledUnit askboardplt:type="led-unit-type">2</askboardplt:ledUnit>
+            <askboardplt:ledStart askboardplt:type="uint32">64</askboardplt:ledStart>
+            <askboardplt:ledEnd askboardplt:type="uint32">65</askboardplt:ledEnd>
+            <askboardplt:ledChainBypass askboardplt:type="boolean-type">false</askboardplt:ledChainBypass>
+          </askboardplt:ledUnit-List>
+          <askboardplt:ledUnit-List>
+            <askboardplt:ledUnit askboardplt:type="led-unit-type">3</askboardplt:ledUnit>
+            <askboardplt:ledStart askboardplt:type="uint32">64</askboardplt:ledStart>
+            <askboardplt:ledEnd askboardplt:type="uint32">65</askboardplt:ledEnd>
+            <askboardplt:ledChainBypass askboardplt:type="boolean-type">false</askboardplt:ledChainBypass>
+          </askboardplt:ledUnit-List>
+          <askboardplt:ledUnit-List>
+            <askboardplt:ledUnit askboardplt:type="led-unit-type">4</askboardplt:ledUnit>
+            <askboardplt:ledStart askboardplt:type="uint32">64</askboardplt:ledStart>
+            <askboardplt:ledEnd askboardplt:type="uint32">66</askboardplt:ledEnd>
+            <askboardplt:ledChainBypass askboardplt:type="boolean-type">false</askboardplt:ledChainBypass>
+          </askboardplt:ledUnit-List>
+          <askboardplt:ledUnit-List>
+            <askboardplt:ledUnit askboardplt:type="led-unit-type">5</askboardplt:ledUnit>
+            <askboardplt:ledStart askboardplt:type="uint32">64</askboardplt:ledStart>
+            <askboardplt:ledEnd askboardplt:type="uint32">66</askboardplt:ledEnd>
+            <askboardplt:ledChainBypass askboardplt:type="boolean-type">false</askboardplt:ledChainBypass>
+          </askboardplt:ledUnit-List>
+          <askboardplt:ledUnit-List>
+            <askboardplt:ledUnit askboardplt:type="led-unit-type">6</askboardplt:ledUnit>
+            <askboardplt:ledStart askboardplt:type="uint32">64</askboardplt:ledStart>
+            <askboardplt:ledEnd askboardplt:type="uint32">65</askboardplt:ledEnd>
+            <askboardplt:ledChainBypass askboardplt:type="boolean-type">false</askboardplt:ledChainBypass>
+          </askboardplt:ledUnit-List>
+          <askboardplt:ledUnit-List>
+            <askboardplt:ledUnit askboardplt:type="led-unit-type">7</askboardplt:ledUnit>
+            <askboardplt:ledStart askboardplt:type="uint32">64</askboardplt:ledStart>
+            <askboardplt:ledEnd askboardplt:type="uint32">65</askboardplt:ledEnd>
+            <askboardplt:ledChainBypass askboardplt:type="boolean-type">false</askboardplt:ledChainBypass>
+          </askboardplt:ledUnit-List>
+          <askboardplt:ledUnit-List>
+            <askboardplt:ledUnit askboardplt:type="led-unit-type">8</askboardplt:ledUnit>
+            <askboardplt:ledStart askboardplt:type="uint32">64</askboardplt:ledStart>
+            <askboardplt:ledEnd askboardplt:type="uint32">66</askboardplt:ledEnd>
+            <askboardplt:ledChainBypass askboardplt:type="boolean-type">false</askboardplt:ledChainBypass>
+          </askboardplt:ledUnit-List>
+        </askboardplt:ledstream-configSet>
+        <askboardplt:ledstream-class-manipulation-list>
+          <askboardplt:classNum askboardplt:type="led-class-num-type">0</askboardplt:classNum>
+          <askboardplt:portType askboardplt:type="led-stream-port-type">PORT_TYPE_XG</askboardplt:portType>
+          <askboardplt:blinkEnable askboardplt:type="boolean-type">false</askboardplt:blinkEnable>
+          <askboardplt:blinkSelect askboardplt:type="led-stream-blink-select-type">BLINK_SELECT_0</askboardplt:blinkSelect>
+          <askboardplt:forceEnable askboardplt:type="boolean-type">false</askboardplt:forceEnable>
+          <askboardplt:pulseStretchEnable askboardplt:type="boolean-type">true</askboardplt:pulseStretchEnable>
+          <askboardplt:disableOnLinkDown askboardplt:type="boolean-type">false</askboardplt:disableOnLinkDown>
+        </askboardplt:ledstream-class-manipulation-list>
+        <askboardplt:ledstream-class-manipulation-list>
+          <askboardplt:classNum askboardplt:type="led-class-num-type">1</askboardplt:classNum>
+          <askboardplt:portType askboardplt:type="led-stream-port-type">PORT_TYPE_XG</askboardplt:portType>
+          <askboardplt:blinkEnable askboardplt:type="boolean-type">false</askboardplt:blinkEnable>
+          <askboardplt:blinkSelect askboardplt:type="led-stream-blink-select-type">BLINK_SELECT_0</askboardplt:blinkSelect>
+          <askboardplt:forceEnable askboardplt:type="boolean-type">false</askboardplt:forceEnable>
+          <askboardplt:pulseStretchEnable askboardplt:type="boolean-type">true</askboardplt:pulseStretchEnable>
+          <askboardplt:disableOnLinkDown askboardplt:type="boolean-type">false</askboardplt:disableOnLinkDown>
+        </askboardplt:ledstream-class-manipulation-list>
+        <askboardplt:ledstream-class-manipulation-list>
+          <askboardplt:classNum askboardplt:type="led-class-num-type">2</askboardplt:classNum>
+          <askboardplt:portType askboardplt:type="led-stream-port-type">PORT_TYPE_XG</askboardplt:portType>
+          <askboardplt:blinkEnable askboardplt:type="boolean-type">true</askboardplt:blinkEnable>
+          <askboardplt:blinkSelect askboardplt:type="led-stream-blink-select-type">BLINK_SELECT_0</askboardplt:blinkSelect>
+          <askboardplt:forceEnable askboardplt:type="boolean-type">false</askboardplt:forceEnable>
+          <askboardplt:pulseStretchEnable askboardplt:type="boolean-type">true</askboardplt:pulseStretchEnable>
+          <askboardplt:disableOnLinkDown askboardplt:type="boolean-type">true</askboardplt:disableOnLinkDown>
+        </askboardplt:ledstream-class-manipulation-list>
+        <askboardplt:ledstream-class-manipulation-list>
+          <askboardplt:classNum askboardplt:type="led-class-num-type">3</askboardplt:classNum>
+          <askboardplt:portType askboardplt:type="led-stream-port-type">PORT_TYPE_XG</askboardplt:portType>
+          <askboardplt:blinkEnable askboardplt:type="boolean-type">false</askboardplt:blinkEnable>
+          <askboardplt:blinkSelect askboardplt:type="led-stream-blink-select-type">BLINK_SELECT_0</askboardplt:blinkSelect>
+          <askboardplt:forceEnable askboardplt:type="boolean-type">false</askboardplt:forceEnable>
+          <askboardplt:pulseStretchEnable askboardplt:type="boolean-type">true</askboardplt:pulseStretchEnable>
+          <askboardplt:disableOnLinkDown askboardplt:type="boolean-type">false</askboardplt:disableOnLinkDown>
+        </askboardplt:ledstream-class-manipulation-list>
+        <askboardplt:ledstream-class-manipulation-list>
+          <askboardplt:classNum askboardplt:type="led-class-num-type">4</askboardplt:classNum>
+          <askboardplt:portType askboardplt:type="led-stream-port-type">PORT_TYPE_XG</askboardplt:portType>
+          <askboardplt:blinkEnable askboardplt:type="boolean-type">false</askboardplt:blinkEnable>
+          <askboardplt:blinkSelect askboardplt:type="led-stream-blink-select-type">BLINK_SELECT_0</askboardplt:blinkSelect>
+          <askboardplt:forceEnable askboardplt:type="boolean-type">false</askboardplt:forceEnable>
+          <askboardplt:pulseStretchEnable askboardplt:type="boolean-type">true</askboardplt:pulseStretchEnable>
+          <askboardplt:disableOnLinkDown askboardplt:type="boolean-type">false</askboardplt:disableOnLinkDown>
+        </askboardplt:ledstream-class-manipulation-list>
+        <askboardplt:ledstream-class-manipulation-list>
+          <askboardplt:classNum askboardplt:type="led-class-num-type">5</askboardplt:classNum>
+          <askboardplt:portType askboardplt:type="led-stream-port-type">PORT_TYPE_XG</askboardplt:portType>
+          <askboardplt:blinkEnable askboardplt:type="boolean-type">false</askboardplt:blinkEnable>
+          <askboardplt:blinkSelect askboardplt:type="led-stream-blink-select-type">BLINK_SELECT_0</askboardplt:blinkSelect>
+          <askboardplt:forceEnable askboardplt:type="boolean-type">false</askboardplt:forceEnable>
+          <askboardplt:pulseStretchEnable askboardplt:type="boolean-type">true</askboardplt:pulseStretchEnable>
+          <askboardplt:disableOnLinkDown askboardplt:type="boolean-type">false</askboardplt:disableOnLinkDown>
+        </askboardplt:ledstream-class-manipulation-list>
+      </askboardplt:Ledstream-interface-list>
+    </askboardplt:device-list>
+    <askboardplt:UDSFilePath askboardplt:type="std-string">/tmp/cpss_uds</askboardplt:UDSFilePath>
+    <askboardplt:serdesMux>
+      <askboardplt:serdesMuxSchemePortMod askboardplt:type="uint32">8</askboardplt:serdesMuxSchemePortMod>
+      <askboardplt:serdesMuxSchemeList>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP0</askboardplt:serdesMuxScheme>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">7</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">1</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">6</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">0</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">5</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">3</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">4</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">2</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+      </askboardplt:serdesMuxSchemeList>
+      <askboardplt:serdesMuxSchemeList>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP1</askboardplt:serdesMuxScheme>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">0</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">6</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">1</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">7</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">2</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">4</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">3</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">5</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+      </askboardplt:serdesMuxSchemeList>
+    </askboardplt:serdesMux>
+  </askboardplt:ASK-Board>
+</data>
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/db98cx8540_16cd/ASK-L1-F6_4T-48x25G-4x100G.md5 b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/db98cx8540_16cd/ASK-L1-F6_4T-48x25G-4x100G.md5
new file mode 100644
index 000000000..be0843ca8
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/db98cx8540_16cd/ASK-L1-F6_4T-48x25G-4x100G.md5
@@ -0,0 +1 @@
+825014d819cb5d702586d3cc0bf9e2d0
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/db98cx8540_16cd/ASK-L1-F6_4T-48x25G-4x100G.xml b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/db98cx8540_16cd/ASK-L1-F6_4T-48x25G-4x100G.xml
new file mode 100644
index 000000000..e33753b1e
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/db98cx8540_16cd/ASK-L1-F6_4T-48x25G-4x100G.xml
@@ -0,0 +1,1228 @@
+<?xml version="1.0" encoding="utf-8"?>
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-02-19-1.06" profile="Askl1" sid="71d3ab0f-3ac2-452a-a5c9-2dfdc969734a">
+  <ASKL1plt:ASK-L1 xmlns:ASKL1plt="urn:marvell:ASKL1:yang">
+    <ASKL1plt:typedefs>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>interface-mode-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Specifies supported Interface modes</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>1000BASE_X</ASKL1plt:name>
+          <ASKL1plt:description>1G</ASKL1plt:description>
+          <ASKL1plt:value>6</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>SGMII</ASKL1plt:name>
+          <ASKL1plt:description>1G , 2.5G</ASKL1plt:description>
+          <ASKL1plt:value>3</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>QSGMII</ASKL1plt:name>
+          <ASKL1plt:description>1G</ASKL1plt:description>
+          <ASKL1plt:value>13</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>KR</ASKL1plt:name>
+          <ASKL1plt:description>10G, 12G, 20G, 40G, 100G</ASKL1plt:description>
+          <ASKL1plt:value>16</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>SR_LR</ASKL1plt:name>
+          <ASKL1plt:description>5G, 10G, 12G, 20G, 40G</ASKL1plt:description>
+          <ASKL1plt:value>20</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>KR2</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>27</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>KR4</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>28</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>SR_LR2</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>29</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>SR_LR4</ASKL1plt:name>
+          <ASKL1plt:description>100G</ASKL1plt:description>
+          <ASKL1plt:value>30</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>KR_C</ASKL1plt:name>
+          <ASKL1plt:description>CONSORTIUM - 25G</ASKL1plt:description>
+          <ASKL1plt:value>32</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>CR_C</ASKL1plt:name>
+          <ASKL1plt:description>CONSORTIUM - 25G</ASKL1plt:description>
+          <ASKL1plt:value>33</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>KR2_C</ASKL1plt:name>
+          <ASKL1plt:description>CONSORTIUM - 50G</ASKL1plt:description>
+          <ASKL1plt:value>34</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>CR2_C</ASKL1plt:name>
+          <ASKL1plt:description>CONSORTIUM - 50G</ASKL1plt:description>
+          <ASKL1plt:value>35</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>CR</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>36</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>CR2</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>37</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>CR4</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>38</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>KR_S</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>39</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>CR_S</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>40</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>KR8</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>41</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>CR8</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>42</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>SR_LR8</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>43</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>USX_10G_QXGMII</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>51</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>USX_20G_QXGMII</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>52</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>USX_OUSGMII</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>53</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>USX_20G_OXGMII</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>54</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>NA</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>57</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>port-speed-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Specifies supported speeds</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>1G</ASKL1plt:name>
+          <ASKL1plt:description>1G</ASKL1plt:description>
+          <ASKL1plt:value>2</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>10G</ASKL1plt:name>
+          <ASKL1plt:description>10G</ASKL1plt:description>
+          <ASKL1plt:value>3</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>2500M</ASKL1plt:name>
+          <ASKL1plt:description>2.5G</ASKL1plt:description>
+          <ASKL1plt:value>5</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>5G</ASKL1plt:name>
+          <ASKL1plt:description>5G</ASKL1plt:description>
+          <ASKL1plt:value>6</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>25G</ASKL1plt:name>
+          <ASKL1plt:description>25G, used in combination with CPSS_PORT_INTERFACE_MODE_KR_E, CPSS_PORT_INTERFACE_MODE_KR2_E</ASKL1plt:description>
+          <ASKL1plt:value>21</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>40G</ASKL1plt:name>
+          <ASKL1plt:description>40G</ASKL1plt:description>
+          <ASKL1plt:value>9</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>50G</ASKL1plt:name>
+          <ASKL1plt:description>50G</ASKL1plt:description>
+          <ASKL1plt:value>14</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>100G</ASKL1plt:name>
+          <ASKL1plt:description>100G</ASKL1plt:description>
+          <ASKL1plt:value>13</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>200G</ASKL1plt:name>
+          <ASKL1plt:description>200G</ASKL1plt:description>
+          <ASKL1plt:value>24</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>400G</ASKL1plt:name>
+          <ASKL1plt:description>400G</ASKL1plt:description>
+          <ASKL1plt:value>25</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>NA</ASKL1plt:name>
+          <ASKL1plt:description>NA</ASKL1plt:description>
+          <ASKL1plt:value>35</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>fec-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Rx parameter type</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>enabled</ASKL1plt:name>
+          <ASKL1plt:description>Enabled</ASKL1plt:description>
+          <ASKL1plt:value>0</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>disabled</ASKL1plt:name>
+          <ASKL1plt:description>Disabled</ASKL1plt:description>
+          <ASKL1plt:value>1</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rs_enabled</ASKL1plt:name>
+          <ASKL1plt:description>RS FEC enabled</ASKL1plt:description>
+          <ASKL1plt:value>2</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>both_enabled</ASKL1plt:name>
+          <ASKL1plt:description>Both enabled</ASKL1plt:description>
+          <ASKL1plt:value>3</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rs_544_514_enabled</ASKL1plt:name>
+          <ASKL1plt:description>RS FEC 544 and 514</ASKL1plt:description>
+          <ASKL1plt:value>4</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>physical-port-num-type</ASKL1plt:name>
+        <ASKL1plt:type>uint32</ASKL1plt:type>
+        <ASKL1plt:description>PHYSICAL PORT NUM</ASKL1plt:description>
+        <ASKL1plt:min>0</ASKL1plt:min>
+        <ASKL1plt:max>1023</ASKL1plt:max>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>tx-param-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Tx parameter type</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>atten</ASKL1plt:name>
+          <ASKL1plt:description>atten</ASKL1plt:description>
+          <ASKL1plt:value>0</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>post</ASKL1plt:name>
+          <ASKL1plt:description>post</ASKL1plt:description>
+          <ASKL1plt:value>1</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>pre</ASKL1plt:name>
+          <ASKL1plt:description>pre</ASKL1plt:description>
+          <ASKL1plt:value>2</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>pre2</ASKL1plt:name>
+          <ASKL1plt:description>pre2</ASKL1plt:description>
+          <ASKL1plt:value>3</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>pre3</ASKL1plt:name>
+          <ASKL1plt:description>pre3</ASKL1plt:description>
+          <ASKL1plt:value>4</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>peak</ASKL1plt:name>
+          <ASKL1plt:description>peak</ASKL1plt:description>
+          <ASKL1plt:value>5</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>main</ASKL1plt:name>
+          <ASKL1plt:description>main</ASKL1plt:description>
+          <ASKL1plt:value>6</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>txAmpAdjEn</ASKL1plt:name>
+          <ASKL1plt:description>txAmpAdjEn</ASKL1plt:description>
+          <ASKL1plt:value>7</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>emph0</ASKL1plt:name>
+          <ASKL1plt:description>emph0</ASKL1plt:description>
+          <ASKL1plt:value>8</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>emph1</ASKL1plt:name>
+          <ASKL1plt:description>emph1</ASKL1plt:description>
+          <ASKL1plt:value>9</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>txAmpShft</ASKL1plt:name>
+          <ASKL1plt:description>txAmpShft</ASKL1plt:description>
+          <ASKL1plt:value>10</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>txEmphEn</ASKL1plt:name>
+          <ASKL1plt:description>txEmphEn</ASKL1plt:description>
+          <ASKL1plt:value>11</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>txEmphEn1</ASKL1plt:name>
+          <ASKL1plt:description>txEmphEn1</ASKL1plt:description>
+          <ASKL1plt:value>12</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>txAmpAdj</ASKL1plt:name>
+          <ASKL1plt:description>txAmpAdj</ASKL1plt:description>
+          <ASKL1plt:value>13</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>slewCtrlEn</ASKL1plt:name>
+          <ASKL1plt:description>slewCtrlEn</ASKL1plt:description>
+          <ASKL1plt:value>14</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>slewRate</ASKL1plt:name>
+          <ASKL1plt:description>slewRate</ASKL1plt:description>
+          <ASKL1plt:value>15</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>rx-param-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Rx parameter type</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>sqlch</ASKL1plt:name>
+          <ASKL1plt:description>sqlch</ASKL1plt:description>
+          <ASKL1plt:value>0</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>DC</ASKL1plt:name>
+          <ASKL1plt:description>DC</ASKL1plt:description>
+          <ASKL1plt:value>1</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>LF</ASKL1plt:name>
+          <ASKL1plt:description>LF</ASKL1plt:description>
+          <ASKL1plt:value>2</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>HF</ASKL1plt:name>
+          <ASKL1plt:description>HF</ASKL1plt:description>
+          <ASKL1plt:value>3</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>gainShape1</ASKL1plt:name>
+          <ASKL1plt:description>gainShape1</ASKL1plt:description>
+          <ASKL1plt:value>4</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>gainShape2</ASKL1plt:name>
+          <ASKL1plt:description>gainShape2</ASKL1plt:description>
+          <ASKL1plt:value>5</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>shortChannelEn</ASKL1plt:name>
+          <ASKL1plt:description>shortChannelEn</ASKL1plt:description>
+          <ASKL1plt:value>7</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>bfLf</ASKL1plt:name>
+          <ASKL1plt:description>bfLf</ASKL1plt:description>
+          <ASKL1plt:value>8</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>bfHf</ASKL1plt:name>
+          <ASKL1plt:description>bfHf</ASKL1plt:description>
+          <ASKL1plt:value>9</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>minLf</ASKL1plt:name>
+          <ASKL1plt:description>minLf</ASKL1plt:description>
+          <ASKL1plt:value>10</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>maxLf</ASKL1plt:name>
+          <ASKL1plt:description>maxLf</ASKL1plt:description>
+          <ASKL1plt:value>11</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>minHf</ASKL1plt:name>
+          <ASKL1plt:description>minHf</ASKL1plt:description>
+          <ASKL1plt:value>12</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>maxHf</ASKL1plt:name>
+          <ASKL1plt:description>maxHf</ASKL1plt:description>
+          <ASKL1plt:value>13</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>minPre1</ASKL1plt:name>
+          <ASKL1plt:description>minPre1</ASKL1plt:description>
+          <ASKL1plt:value>14</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>maxPre1</ASKL1plt:name>
+          <ASKL1plt:description>maxPre1</ASKL1plt:description>
+          <ASKL1plt:value>15</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>minPre2</ASKL1plt:name>
+          <ASKL1plt:description>minPre2</ASKL1plt:description>
+          <ASKL1plt:value>16</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>maxPre2</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>17</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>minPost</ASKL1plt:name>
+          <ASKL1plt:description>minPost</ASKL1plt:description>
+          <ASKL1plt:value>18</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>maxPost</ASKL1plt:name>
+          <ASKL1plt:description>maxPost</ASKL1plt:description>
+          <ASKL1plt:value>19</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>squelch</ASKL1plt:name>
+          <ASKL1plt:description>squelch</ASKL1plt:description>
+          <ASKL1plt:value>20</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>termination</ASKL1plt:name>
+          <ASKL1plt:description>termination</ASKL1plt:description>
+          <ASKL1plt:value>27</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>coldEnvelope</ASKL1plt:name>
+          <ASKL1plt:description>coldEnvelope</ASKL1plt:description>
+          <ASKL1plt:value>35</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>hotEnvelope</ASKL1plt:name>
+          <ASKL1plt:description>hotEnvelope</ASKL1plt:description>
+          <ASKL1plt:value>36</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>dcGain</ASKL1plt:name>
+          <ASKL1plt:description>dcGain</ASKL1plt:description>
+          <ASKL1plt:value>37</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>bandWidth</ASKL1plt:name>
+          <ASKL1plt:description>bandWidth</ASKL1plt:description>
+          <ASKL1plt:value>38</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>dfe</ASKL1plt:name>
+          <ASKL1plt:description>dfe</ASKL1plt:description>
+          <ASKL1plt:value>39</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>ffeR</ASKL1plt:name>
+          <ASKL1plt:description>ffeR</ASKL1plt:description>
+          <ASKL1plt:value>40</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>ffeC</ASKL1plt:name>
+          <ASKL1plt:description>ffeC</ASKL1plt:description>
+          <ASKL1plt:value>41</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>sampler</ASKL1plt:name>
+          <ASKL1plt:description>sampler</ASKL1plt:description>
+          <ASKL1plt:value>42</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>align90</ASKL1plt:name>
+          <ASKL1plt:description>align90</ASKL1plt:description>
+          <ASKL1plt:value>43</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>ffeS</ASKL1plt:name>
+          <ASKL1plt:description>ffeS</ASKL1plt:description>
+          <ASKL1plt:value>44</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>resSel</ASKL1plt:name>
+          <ASKL1plt:description>resSel</ASKL1plt:description>
+          <ASKL1plt:value>45</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>resShift</ASKL1plt:name>
+          <ASKL1plt:description>resShift</ASKL1plt:description>
+          <ASKL1plt:value>46</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>capSel</ASKL1plt:name>
+          <ASKL1plt:description>capSel</ASKL1plt:description>
+          <ASKL1plt:value>47</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>ffeSettingForce</ASKL1plt:name>
+          <ASKL1plt:description>ffeSettingForce</ASKL1plt:description>
+          <ASKL1plt:value>48</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>adaptedResSel</ASKL1plt:name>
+          <ASKL1plt:description>adaptedResSel</ASKL1plt:description>
+          <ASKL1plt:value>49</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>adaptedCapSel</ASKL1plt:name>
+          <ASKL1plt:description>adaptedCapSel</ASKL1plt:description>
+          <ASKL1plt:value>50</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>selmufi</ASKL1plt:name>
+          <ASKL1plt:description>selmufi</ASKL1plt:description>
+          <ASKL1plt:value>51</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>selmuff</ASKL1plt:name>
+          <ASKL1plt:description>selmuff</ASKL1plt:description>
+          <ASKL1plt:value>52</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>selmupi</ASKL1plt:name>
+          <ASKL1plt:description>selmupi</ASKL1plt:description>
+          <ASKL1plt:value>53</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>selmupf</ASKL1plt:name>
+          <ASKL1plt:description>selmupf</ASKL1plt:description>
+          <ASKL1plt:value>54</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>slewRateCtrl0</ASKL1plt:name>
+          <ASKL1plt:description>slewRateCtrl0</ASKL1plt:description>
+          <ASKL1plt:value>55</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>slewRateCtrl1</ASKL1plt:name>
+          <ASKL1plt:description>slewRateCtrl1</ASKL1plt:description>
+          <ASKL1plt:value>56</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>EO</ASKL1plt:name>
+          <ASKL1plt:description>EO</ASKL1plt:description>
+          <ASKL1plt:value>57</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>dataRate</ASKL1plt:name>
+          <ASKL1plt:description>dataRate</ASKL1plt:description>
+          <ASKL1plt:value>58</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>res1Sel</ASKL1plt:name>
+          <ASKL1plt:description>res1Sel</ASKL1plt:description>
+          <ASKL1plt:value>59</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>res2Sel</ASKL1plt:name>
+          <ASKL1plt:description>res2Sel</ASKL1plt:description>
+          <ASKL1plt:value>60</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>cap1Sel</ASKL1plt:name>
+          <ASKL1plt:description>cap1Sel</ASKL1plt:description>
+          <ASKL1plt:value>61</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>cap2Sel</ASKL1plt:name>
+          <ASKL1plt:description>cap2Sel</ASKL1plt:description>
+          <ASKL1plt:value>62</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>midpointLargeThresKLane</ASKL1plt:name>
+          <ASKL1plt:description>midpointLargeThresKLane</ASKL1plt:description>
+          <ASKL1plt:value>63</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>midpointSmallThresKLane</ASKL1plt:name>
+          <ASKL1plt:description>midpointSmallThresKLane</ASKL1plt:description>
+          <ASKL1plt:value>64</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>midpointLargeThresCLane</ASKL1plt:name>
+          <ASKL1plt:description>midpointLargeThresCLane</ASKL1plt:description>
+          <ASKL1plt:value>65</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>midpointSmallThresCLane</ASKL1plt:name>
+          <ASKL1plt:description>midpointSmallThresCLane</ASKL1plt:description>
+          <ASKL1plt:value>66</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>dfeResF0aHighThresInitLane</ASKL1plt:name>
+          <ASKL1plt:description>dfeResF0aHighThresInitLane</ASKL1plt:description>
+          <ASKL1plt:value>67</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>dfeResF0aHighThresEndLane</ASKL1plt:name>
+          <ASKL1plt:description>dfeResF0aHighThresEndLane</ASKL1plt:description>
+          <ASKL1plt:value>68</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>current1Sel</ASKL1plt:name>
+          <ASKL1plt:description>current1Sel</ASKL1plt:description>
+          <ASKL1plt:value>69</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rl1Sel</ASKL1plt:name>
+          <ASKL1plt:description>rl1Sel</ASKL1plt:description>
+          <ASKL1plt:value>70</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rl1Extra</ASKL1plt:name>
+          <ASKL1plt:description>rl1Extra</ASKL1plt:description>
+          <ASKL1plt:value>71</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>cl1Ctrl</ASKL1plt:name>
+          <ASKL1plt:description>cl1Ctrl</ASKL1plt:description>
+          <ASKL1plt:value>72</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>enMidFreq</ASKL1plt:name>
+          <ASKL1plt:description>enMidFreq</ASKL1plt:description>
+          <ASKL1plt:value>73</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>cs1Mid</ASKL1plt:name>
+          <ASKL1plt:description>cs1Mid</ASKL1plt:description>
+          <ASKL1plt:value>74</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rs1Mid</ASKL1plt:name>
+          <ASKL1plt:description>rs1Mid</ASKL1plt:description>
+          <ASKL1plt:value>75</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rfCtrl</ASKL1plt:name>
+          <ASKL1plt:description>rfCtrl</ASKL1plt:description>
+          <ASKL1plt:value>76</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rl1TiaSel</ASKL1plt:name>
+          <ASKL1plt:description>rl1TiaSel</ASKL1plt:description>
+          <ASKL1plt:value>77</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rl1TiaExtra</ASKL1plt:name>
+          <ASKL1plt:description>rl1TiaExtra</ASKL1plt:description>
+          <ASKL1plt:value>78</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>hpfRSel1st</ASKL1plt:name>
+          <ASKL1plt:description>hpfRSel1st</ASKL1plt:description>
+          <ASKL1plt:value>79</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>current1TiaSel</ASKL1plt:name>
+          <ASKL1plt:description>current1TiaSel</ASKL1plt:description>
+          <ASKL1plt:value>80</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rl2Tune</ASKL1plt:name>
+          <ASKL1plt:description>rl2Tune</ASKL1plt:description>
+          <ASKL1plt:value>81</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rl2Sel</ASKL1plt:name>
+          <ASKL1plt:description>rl2Sel</ASKL1plt:description>
+          <ASKL1plt:value>82</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rs2Sel</ASKL1plt:name>
+          <ASKL1plt:description>rs2Sel</ASKL1plt:description>
+          <ASKL1plt:value>83</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>current2Sel</ASKL1plt:name>
+          <ASKL1plt:description>current2Sel</ASKL1plt:description>
+          <ASKL1plt:value>84</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>hpfRsel2nd</ASKL1plt:name>
+          <ASKL1plt:description>hpfRsel2nd</ASKL1plt:description>
+          <ASKL1plt:value>85</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>BW</ASKL1plt:name>
+          <ASKL1plt:description>BW</ASKL1plt:description>
+          <ASKL1plt:value>86</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>dfeGAIN</ASKL1plt:name>
+          <ASKL1plt:description>dfeGAIN</ASKL1plt:description>
+          <ASKL1plt:value>87</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>dfeGAIN2</ASKL1plt:name>
+          <ASKL1plt:description>dfeGAIN2</ASKL1plt:description>
+          <ASKL1plt:value>88</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>pre1</ASKL1plt:name>
+          <ASKL1plt:description>pre1</ASKL1plt:description>
+          <ASKL1plt:value>89</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>pre2</ASKL1plt:name>
+          <ASKL1plt:description>pre2</ASKL1plt:description>
+          <ASKL1plt:value>90</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>post1</ASKL1plt:name>
+          <ASKL1plt:description>post1</ASKL1plt:description>
+          <ASKL1plt:value>91</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>boolean-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Boolean 32 bits , due to bing endian</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>false</ASKL1plt:name>
+          <ASKL1plt:description>False</ASKL1plt:description>
+          <ASKL1plt:value>0</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>true</ASKL1plt:name>
+          <ASKL1plt:description>True</ASKL1plt:description>
+          <ASKL1plt:value>1</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>serdes-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Serdes Type</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>NA</ASKL1plt:name>
+          <ASKL1plt:description>No serdes</ASKL1plt:description>
+          <ASKL1plt:value>0</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>AVAGO</ASKL1plt:name>
+          <ASKL1plt:description>AVAGO</ASKL1plt:description>
+          <ASKL1plt:value>1</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>COMPHY</ASKL1plt:name>
+          <ASKL1plt:description>COMPHY</ASKL1plt:description>
+          <ASKL1plt:value>2</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>COMPHY_C12G</ASKL1plt:name>
+          <ASKL1plt:description>COMPHY_C12G</ASKL1plt:description>
+          <ASKL1plt:value>3</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>COMPHY_C28G</ASKL1plt:name>
+          <ASKL1plt:description>COMPHY_C28G</ASKL1plt:description>
+          <ASKL1plt:value>4</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>COMPHY_C112G</ASKL1plt:name>
+          <ASKL1plt:description>COMPHY_C112G</ASKL1plt:description>
+          <ASKL1plt:value>5</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>uint8-type</ASKL1plt:name>
+        <ASKL1plt:type>uint32</ASKL1plt:type>
+        <ASKL1plt:description>Uint8 32 bits , due to bing endian</ASKL1plt:description>
+        <ASKL1plt:min>0</ASKL1plt:min>
+        <ASKL1plt:max>255</ASKL1plt:max>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>serdes-termination-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>RX termination mode</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>GND</ASKL1plt:name>
+          <ASKL1plt:description>Enabled</ASKL1plt:description>
+          <ASKL1plt:value>0</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>VDD</ASKL1plt:name>
+          <ASKL1plt:description>Disabled</ASKL1plt:description>
+          <ASKL1plt:value>1</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>FLOATING</ASKL1plt:name>
+          <ASKL1plt:description>RS FEC enabled</ASKL1plt:description>
+          <ASKL1plt:value>2</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>port-interconnect-profile-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Enumerator of interconnect profile.</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>profile_default</ASKL1plt:name>
+          <ASKL1plt:description>Profile Default</ASKL1plt:description>
+          <ASKL1plt:value>0</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>profile_1</ASKL1plt:name>
+          <ASKL1plt:description>Profile 1</ASKL1plt:description>
+          <ASKL1plt:value>1</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>profile_2</ASKL1plt:name>
+          <ASKL1plt:description>Profile 2</ASKL1plt:description>
+          <ASKL1plt:value>2</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+    </ASKL1plt:typedefs>
+    <ASKL1plt:IfModeName>
+      <ASKL1plt:ifModeNameList>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:ifModeName>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">CR4</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">100G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">KR4</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">100G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">SR_LR4</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">100G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">CR4</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">100G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">KR4</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">100G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+      </ASKL1plt:ifModeNameList>
+      <ASKL1plt:ifModeNameList>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">10GR1Fix</ASKL1plt:ifModeName>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">KR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">10G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">disabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+      </ASKL1plt:ifModeNameList>
+      <ASKL1plt:ifModeNameList>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">CR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">25G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">KR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">25G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">KR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">10G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">SR_LR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">25G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">SR_LR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">10G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">CR</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">25G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">KR</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">25G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">KR</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">10G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+      </ASKL1plt:ifModeNameList>
+    </ASKL1plt:IfModeName>
+    <ASKL1plt:Port>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">0</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">1</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">2</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">3</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">4</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">5</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">6</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">7</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">8</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">9</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">10</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">11</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">12</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">13</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">14</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">15</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">16</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">17</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">18</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">19</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">20</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">21</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">22</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">23</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">24</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">25</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">26</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">27</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">28</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">29</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">30</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">31</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">32</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">33</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">34</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">35</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">36</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">37</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">38</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">39</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">40</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">41</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">42</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">43</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">44</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">45</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">46</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">47</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">48</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">49</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">50</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">51</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">52</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">10GR1Fix</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">53</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">10GR1Fix</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+    </ASKL1plt:Port>
+  </ASKL1plt:ASK-L1>
+</data>
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/db98cx8540_16cd/ASK-PP-F6_4T-48x25G-4x100G.md5 b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/db98cx8540_16cd/ASK-PP-F6_4T-48x25G-4x100G.md5
new file mode 100644
index 000000000..8f2588351
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/db98cx8540_16cd/ASK-PP-F6_4T-48x25G-4x100G.md5
@@ -0,0 +1 @@
+897ca459774ad5e95dcd7dcb0d10c0af
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/db98cx8540_16cd/ASK-PP-F6_4T-48x25G-4x100G.xml b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/db98cx8540_16cd/ASK-PP-F6_4T-48x25G-4x100G.xml
new file mode 100644
index 000000000..b50dbcd5d
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/db98cx8540_16cd/ASK-PP-F6_4T-48x25G-4x100G.xml
@@ -0,0 +1,1180 @@
+<?xml version="1.0" encoding="utf-8"?>
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-02-19-1.06" profile="Askpp" sid="34f1c14a-b581-422d-bd10-426dfac013dd">
+  <askppplt:ASK-PP xmlns:askppplt="urn:marvell:askpp:yang">
+    <askppplt:typedefs>
+      <askppplt:typedef>
+        <askppplt:name>std-string</askppplt:name>
+        <askppplt:type>string</askppplt:type>
+        <askppplt:description>standard string.</askppplt:description>
+        <askppplt:min>1</askppplt:min>
+        <askppplt:max>100</askppplt:max>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>queue-id-type</askppplt:name>
+        <askppplt:type>uint32</askppplt:type>
+        <askppplt:description>Queue id</askppplt:description>
+        <askppplt:min>0</askppplt:min>
+        <askppplt:max>7</askppplt:max>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>precent-type</askppplt:name>
+        <askppplt:type>uint32</askppplt:type>
+        <askppplt:description>Precent</askppplt:description>
+        <askppplt:min>0</askppplt:min>
+        <askppplt:max>100</askppplt:max>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>phaThreadId-type</askppplt:name>
+        <askppplt:type>uint32</askppplt:type>
+        <askppplt:description>Thread id</askppplt:description>
+        <askppplt:min>1</askppplt:min>
+        <askppplt:max>255</askppplt:max>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>routing-mode-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies routing mode.</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>POLICY_BASED_ROUTING_ONLY</askppplt:name>
+          <askppplt:description>PBR only</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>TCAM_ROUTER_BASED</askppplt:name>
+          <askppplt:description>Router engine or PBR</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>shared-table-mode-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies table sharing modes for L3 (LPM), L2 (FDB), EM (Exact Match)</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>MID_L3_MID_L2_NO_EM</askppplt:name>
+          <askppplt:description>MID_L3_MID_L2_NO_EM</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>MID_L3_MID_L2_MIN_EM</askppplt:name>
+          <askppplt:description>MID_L3_MID_L2_MIN_EM</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>LOW_MAX_L3_MID_LOW_L2_NO_EM</askppplt:name>
+          <askppplt:description>LOW_MAX_L3_MID_LOW_L2_NO_EM</askppplt:description>
+          <askppplt:value>2</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>MAX_L3_MIN_L2_NO_EM</askppplt:name>
+          <askppplt:description>MAX_L3_MIN_L2_NO_EM</askppplt:description>
+          <askppplt:value>3</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>pha-firmware-image-id-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies supported Pha image id</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>DEFAULT</askppplt:name>
+          <askppplt:description>Default PHA firmware image ID</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>01</askppplt:name>
+          <askppplt:description>01 firmware image ID</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>02</askppplt:name>
+          <askppplt:description>02 PHA firmware image ID</askppplt:description>
+          <askppplt:value>2</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>pha-firmware-thread-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies supported Pha thread type</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>IOAM_INGRESS_SWITCH_IPV4</askppplt:name>
+          <askppplt:description>IOAM_INGRESS_SWITCH_IPV4</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>IOAM_INGRESS_SWITCH_IPV6</askppplt:name>
+          <askppplt:description>IOAM_INGRESS_SWITCH_IPV6</askppplt:description>
+          <askppplt:value>2</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>IOAM_TRANSIT_SWITCH_IPV4</askppplt:name>
+          <askppplt:description>IOAM_TRANSIT_SWITCH_IPV4</askppplt:description>
+          <askppplt:value>3</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>IOAM_TRANSIT_SWITCH_IPV6</askppplt:name>
+          <askppplt:description>IOAM_TRANSIT_SWITCH_IPV6</askppplt:description>
+          <askppplt:value>4</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>INT_IOAM_MIRRORING</askppplt:name>
+          <askppplt:description>INT_IOAM_MIRRORING</askppplt:description>
+          <askppplt:value>5</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>INT_IOAM_EGRESS_SWITCH</askppplt:name>
+          <askppplt:description>INT_IOAM_EGRESS_SWITCH</askppplt:description>
+          <askppplt:value>6</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>MPLS_SR_NO_EL</askppplt:name>
+          <askppplt:description>MPLS_SR_NO_EL</askppplt:description>
+          <askppplt:value>7</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>MPLS_SR_ONE_EL</askppplt:name>
+          <askppplt:description>MPLS_SR_ONE_EL</askppplt:description>
+          <askppplt:value>8</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>MPLS_SR_TWO_EL</askppplt:name>
+          <askppplt:description>MPLS_SR_TWO_EL</askppplt:description>
+          <askppplt:value>9</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>MPLS_SR_THREE_EL</askppplt:name>
+          <askppplt:description>MPLS_SR_THREE_EL</askppplt:description>
+          <askppplt:value>10</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>UNIFIED_SR</askppplt:name>
+          <askppplt:description>UNIFIED_SR</askppplt:description>
+          <askppplt:value>11</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>CLASSIFIER_NSH_OVER_ETHERNET</askppplt:name>
+          <askppplt:description>CLASSIFIER_NSH_OVER_ETHERNET</askppplt:description>
+          <askppplt:value>12</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>CLASSIFIER_NSH_OVER_VXLAN_GPE</askppplt:name>
+          <askppplt:description>CLASSIFIER_NSH_OVER_VXLAN_GPE</askppplt:description>
+          <askppplt:value>13</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SFF_NSH_VXLAN_GPE_TO_ETHERNET</askppplt:name>
+          <askppplt:description>SFF_NSH_VXLAN_GPE_TO_ETHERNET</askppplt:description>
+          <askppplt:value>14</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SFF_NSH_ETHERNET_TO_VXLAN_GPE</askppplt:name>
+          <askppplt:description>SFF_NSH_ETHERNET_TO_VXLAN_GPE</askppplt:description>
+          <askppplt:value>15</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>IOAM_EGRESS_SWITCH_IPV6</askppplt:name>
+          <askppplt:description>IOAM_EGRESS_SWITCH_IPV6</askppplt:description>
+          <askppplt:value>16</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_END_NODE</askppplt:name>
+          <askppplt:description>SRV6_END_NODE</askppplt:description>
+          <askppplt:value>17</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_PENULTIMATE_END_NODE</askppplt:name>
+          <askppplt:description>SRV6_PENULTIMATE_END_NODE</askppplt:description>
+          <askppplt:value>18</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_SRC_NODE_1_SEGMENT</askppplt:name>
+          <askppplt:description>SRV6_SRC_NODE_1_SEGMENT</askppplt:description>
+          <askppplt:value>19</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_SRC_NODE_FIRST_PASS_2_3_SEGMENTS</askppplt:name>
+          <askppplt:description>SRV6_SRC_NODE_FIRST_PASS_2_3_SEGMENTS</askppplt:description>
+          <askppplt:value>20</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_SRC_NODE_SECOND_PASS_3_SEGMENTS</askppplt:name>
+          <askppplt:description>SRV6_SRC_NODE_SECOND_PASS_3_SEGMENTS</askppplt:description>
+          <askppplt:value>21</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_SRC_NODE_SECOND_PASS_2_SEGMENTS</askppplt:name>
+          <askppplt:description>SRV6_SRC_NODE_SECOND_PASS_2_SEGMENTS</askppplt:description>
+          <askppplt:value>22</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_NETWORK_ADD_MSB</askppplt:name>
+          <askppplt:description>SGT_NETWORK_ADD_MSB</askppplt:description>
+          <askppplt:value>23</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_NETWORK_FIX</askppplt:name>
+          <askppplt:description>SGT_NETWORK_FIX</askppplt:description>
+          <askppplt:value>24</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_NETWORK_REMOVE</askppplt:name>
+          <askppplt:description>SGT_NETWORK_REMOVE</askppplt:description>
+          <askppplt:value>25</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_EDSA_FIX</askppplt:name>
+          <askppplt:description>SGT_EDSA_FIX</askppplt:description>
+          <askppplt:value>26</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_EDSA_REMOVE</askppplt:name>
+          <askppplt:description>SGT_EDSA_REMOVE</askppplt:description>
+          <askppplt:value>27</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_GBP_FIX_IPV4</askppplt:name>
+          <askppplt:description>SGT_GBP_FIX_IPV4</askppplt:description>
+          <askppplt:value>28</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_GBP_FIX_IPV6</askppplt:name>
+          <askppplt:description>SGT_GBP_FIX_IPV6</askppplt:description>
+          <askppplt:value>29</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_GBP_REMOVE_IPV4</askppplt:name>
+          <askppplt:description>SGT_GBP_REMOVE_IPV4</askppplt:description>
+          <askppplt:value>30</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_GBP_REMOVE_IPV6</askppplt:name>
+          <askppplt:description>SGT_GBP_REMOVE_IPV6</askppplt:description>
+          <askppplt:value>31</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>PTP_PHY_1_STEP</askppplt:name>
+          <askppplt:description>PTP_PHY_1_STEP</askppplt:description>
+          <askppplt:value>32</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>EGRESS_MIRRORING_METADATA</askppplt:name>
+          <askppplt:description>EGRESS_MIRRORING_METADATA</askppplt:description>
+          <askppplt:value>33</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>CC_ERSPAN_TYPE_II_TRG_DEV_LC_IPV4</askppplt:name>
+          <askppplt:description>CC_ERSPAN_TYPE_II_TRG_DEV_LC_IPV4</askppplt:description>
+          <askppplt:value>34</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>CC_ERSPAN_TYPE_II_TRG_DEV_LC_IPV6</askppplt:name>
+          <askppplt:description>CC_ERSPAN_TYPE_II_TRG_DEV_LC_IPV6</askppplt:description>
+          <askppplt:value>35</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>CC_ERSPAN_TYPE_II_TRG_DEV_DIRECT_IPV4</askppplt:name>
+          <askppplt:description>CC_ERSPAN_TYPE_II_TRG_DEV_DIRECT_IPV4</askppplt:description>
+          <askppplt:value>36</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>CC_ERSPAN_TYPE_II_TRG_DEV_DIRECT_IPV6</askppplt:name>
+          <askppplt:description>CC_ERSPAN_TYPE_II_TRG_DEV_DIRECT_IPV6</askppplt:description>
+          <askppplt:value>37</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>CC_ERSPAN_TYPE_II_SRC_DEV</askppplt:name>
+          <askppplt:description>CC_ERSPAN_TYPE_II_SRC_DEV</askppplt:description>
+          <askppplt:value>38</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>VXLAN_GBP_SOURCE_GROUP_POLICY_ID</askppplt:name>
+          <askppplt:description>VXLAN_GBP_SOURCE_GROUP_POLICY_ID</askppplt:description>
+          <askppplt:value>39</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_BEST_EFFORT</askppplt:name>
+          <askppplt:description>SRV6_BEST_EFFORT</askppplt:description>
+          <askppplt:value>40</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_SRC_NODE_1_CONTAINER</askppplt:name>
+          <askppplt:description>SRV6_SRC_NODE_1_CONTAINER</askppplt:description>
+          <askppplt:value>41</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_SRC_NODE_FIRST_PASS_2_3_CONTAINERS</askppplt:name>
+          <askppplt:description>SRV6_SRC_NODE_FIRST_PASS_2_3_CONTAINERS</askppplt:description>
+          <askppplt:value>42</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_SRC_NODE_SECOND_PASS_2_CONTAINERS</askppplt:name>
+          <askppplt:description>SRV6_SRC_NODE_SECOND_PASS_2_CONTAINERS</askppplt:description>
+          <askppplt:value>43</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_SRC_NODE_SECOND_PASS_3_CONTAINERS</askppplt:name>
+          <askppplt:description>SRV6_SRC_NODE_SECOND_PASS_3_CONTAINERS</askppplt:description>
+          <askppplt:value>44</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_END_NODE_COC32_GSID</askppplt:name>
+          <askppplt:description>SRV6_END_NODE_COC32_GSID</askppplt:description>
+          <askppplt:value>45</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>IPV4_TTL_INCREMENT</askppplt:name>
+          <askppplt:description>IPV4_TTL_INCREMENT</askppplt:description>
+          <askppplt:value>46</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>IPV6_HOP_LIMIT_INCREMENT</askppplt:name>
+          <askppplt:description>IPV6_HOP_LIMIT_INCREMENT</askppplt:description>
+          <askppplt:value>47</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>CLEAR_OUTGOING_MTAG_COMMAND</askppplt:name>
+          <askppplt:description>CLEAR_OUTGOING_MTAG_COMMAND</askppplt:description>
+          <askppplt:value>48</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SFLOW_V5_IPV4</askppplt:name>
+          <askppplt:description>SFLOW_V5_IPV4</askppplt:description>
+          <askppplt:value>49</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SFLOW_V5_IPV6</askppplt:name>
+          <askppplt:description>SFLOW_V5_IPV6</askppplt:description>
+          <askppplt:value>50</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SLS</askppplt:name>
+          <askppplt:description>SLS</askppplt:description>
+          <askppplt:value>51</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>trunk-member-mode-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies supported Pha image id</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>NATIVE</askppplt:name>
+          <askppplt:description>NATIVE
+*  the trunk members are filled
+*  according to the order given by application.
+*  Regular trunk may hold max of 8 members.
+*  Cascade trunk may hold :
+*  max of 64 members</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>FLEX</askppplt:name>
+          <askppplt:description>FLEX
+*  A mode to allows flexibility for
+*  each Regular trunk to state it's max number of members (before starting to add members).
+*  (this mode not effect 'cascade trunk' members)
+*  Regular trunk may hold : max of 4K members. (each trunk set it's own limit)
+*  Cascade trunk may hold : max of 64 members.</askppplt:description>
+          <askppplt:value>2</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>number-physical-port-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>AC3X/AC5X 128, falcon 64, 128, 256, 512, 1024</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>no-ports</askppplt:name>
+          <askppplt:description>no-ports</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>64-ports</askppplt:name>
+          <askppplt:description>64-ports</askppplt:description>
+          <askppplt:value>64</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>128-ports</askppplt:name>
+          <askppplt:description>128-ports</askppplt:description>
+          <askppplt:value>128</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>256-ports</askppplt:name>
+          <askppplt:description>256-ports</askppplt:description>
+          <askppplt:value>256</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>512-ports</askppplt:name>
+          <askppplt:description>512-ports</askppplt:description>
+          <askppplt:value>512</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>1024-ports</askppplt:name>
+          <askppplt:description>1024-ports</askppplt:description>
+          <askppplt:value>1024</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>serdes-ref-clock-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies serdes refernce clock.</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>external_25_single_ended</askppplt:name>
+          <askppplt:description>EXTERNAL_25_SINGLE_ENDED</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>external_125_single_ended</askppplt:name>
+          <askppplt:description>EXTERNAL_125_SINGLE_ENDED</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>external_125_diff</askppplt:name>
+          <askppplt:description>EXTERNAL_125_DIFF</askppplt:description>
+          <askppplt:value>2</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>external_156_25_single_ended</askppplt:name>
+          <askppplt:description>EXTERNAL_156_25_SINGLE_ENDED</askppplt:description>
+          <askppplt:value>3</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>external_156_25_diff</askppplt:name>
+          <askppplt:description>EXTERNAL_156_25_DIFF</askppplt:description>
+          <askppplt:value>4</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>internal_125</askppplt:name>
+          <askppplt:description>INTERNAL_125</askppplt:description>
+          <askppplt:value>5</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>cpu-port-id-type</askppplt:name>
+        <askppplt:type>uint32</askppplt:type>
+        <askppplt:description>CPU port id</askppplt:description>
+        <askppplt:min>0</askppplt:min>
+        <askppplt:max>7</askppplt:max>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>rx-buffer-size-type</askppplt:name>
+        <askppplt:type>uint32</askppplt:type>
+        <askppplt:description>Rx Buffer size</askppplt:description>
+        <askppplt:min>64</askppplt:min>
+        <askppplt:max>10240</askppplt:max>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>tx-sdma-queue-mode-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies TX queue mode.</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>Normal</askppplt:name>
+          <askppplt:description>Application</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>Packet_Generator</askppplt:name>
+          <askppplt:description>Traffic generator</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>alloc-method-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies Buffers allocation method.</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>Dynamic_Alloc</askppplt:name>
+          <askppplt:description>Dynamic</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>Static_Alloc</askppplt:name>
+          <askppplt:description>Static</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>au_mesage_lenght-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies Buffers allocation method.</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>4_words</askppplt:name>
+          <askppplt:description>4 Words</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>8_words</askppplt:name>
+          <askppplt:description>8 Words</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>boolean-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Boolean 32 bits , due to bing endian</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>false</askppplt:name>
+          <askppplt:description>False</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>true</askppplt:name>
+          <askppplt:description>True</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>asic-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>ASIC Type</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>ASIC_AC3X</askppplt:name>
+          <askppplt:description>AC3X</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>ASIC_AC5X</askppplt:name>
+          <askppplt:description>AC5X</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>ASIC_Falcon</askppplt:name>
+          <askppplt:description>FALCON</askppplt:description>
+          <askppplt:value>2</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+    </askppplt:typedefs>
+    <askppplt:ASIC_Type askppplt:type="asic-type">ASIC_Falcon</askppplt:ASIC_Type>
+    <askppplt:PPInit>
+      <askppplt:PP-name askppplt:type="std-string">Falcon-6.4</askppplt:PP-name>
+      <askppplt:Phase1>
+        <askppplt:coreClock askppplt:type="uint32">4294967295</askppplt:coreClock>
+        <askppplt:serdesRefClock askppplt:type="serdes-ref-clock-type">external_25_single_ended</askppplt:serdesRefClock>
+        <askppplt:isrAddrCompletionRegionsBmp askppplt:type="uint32">2</askppplt:isrAddrCompletionRegionsBmp>
+        <askppplt:appAddrCompletionRegionsBmp askppplt:type="uint32">60</askppplt:appAddrCompletionRegionsBmp>
+        <askppplt:maxNumOfPhyPortsToUse askppplt:type="number-physical-port-type">64-ports</askppplt:maxNumOfPhyPortsToUse>
+        <askppplt:tcamParityCalcEnable askppplt:type="boolean-type">false</askppplt:tcamParityCalcEnable>
+        <askppplt:apEnable askppplt:type="boolean-type">true</askppplt:apEnable>
+        <askppplt:numOfDataIntegrityElements askppplt:type="uint32">0</askppplt:numOfDataIntegrityElements>
+      </askppplt:Phase1>
+      <askppplt:Phase2>
+        <askppplt:useMultiNetIfSdma askppplt:type="boolean-type">true</askppplt:useMultiNetIfSdma>
+        <askppplt:auqCfg>
+          <askppplt:auDescNum askppplt:type="uint32">4096</askppplt:auDescNum>
+        </askppplt:auqCfg>
+        <askppplt:fuqCfg>
+          <askppplt:fuDescNum askppplt:type="uint32">2048</askppplt:fuDescNum>
+        </askppplt:fuqCfg>
+        <askppplt:multiNetIfCfg>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">0</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">7</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">6</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">5</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">4</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">3</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">2</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">1</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">0</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">7</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">6</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">5</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">4</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">3</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">2</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">1</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">0</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">7</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">6</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">5</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">4</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">3</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">2</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">1</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">0</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">7</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">6</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">5</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">4</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">3</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">2</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">1</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">0</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">1</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">2</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">3</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">4</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">5</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">6</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">7</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">0</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">1</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">2</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">3</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">4</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">5</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">6</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">7</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">0</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">1</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">2</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">3</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">4</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">5</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">6</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">7</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">0</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">1</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">2</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">3</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">4</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">5</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">6</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Packet_Generator</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">256</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">256</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">144</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">7</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Packet_Generator</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">1</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">1</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">3032</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+        </askppplt:multiNetIfCfg>
+        <askppplt:internal>
+          <askppplt:fuqUseSeparate askppplt:type="boolean-type">false</askppplt:fuqUseSeparate>
+          <askppplt:useSecondaryAuq askppplt:type="boolean-type">false</askppplt:useSecondaryAuq>
+          <askppplt:noTraffic2CPU askppplt:type="boolean-type">false</askppplt:noTraffic2CPU>
+          <askppplt:netifSdmaPortGroupId askppplt:type="uint32">0</askppplt:netifSdmaPortGroupId>
+          <askppplt:auMessageLength askppplt:type="au_mesage_lenght-type">8_words</askppplt:auMessageLength>
+          <askppplt:useDoubleAuq askppplt:type="boolean-type">false</askppplt:useDoubleAuq>
+        </askppplt:internal>
+      </askppplt:Phase2>
+      <askppplt:LogicalInit>
+        <askppplt:routingMode askppplt:type="routing-mode-type">TCAM_ROUTER_BASED</askppplt:routingMode>
+        <askppplt:maxNumOfPbrEntries askppplt:type="uint32">0</askppplt:maxNumOfPbrEntries>
+        <askppplt:sharedTableMode askppplt:type="shared-table-mode-type">MID_L3_MID_L2_NO_EM</askppplt:sharedTableMode>
+        <askppplt:ingressDropEnable askppplt:type="boolean-type">false</askppplt:ingressDropEnable>
+      </askppplt:LogicalInit>
+      <askppplt:LibInit>
+        <askppplt:initBridge askppplt:type="boolean-type">true</askppplt:initBridge>
+        <askppplt:initMirror askppplt:type="boolean-type">true</askppplt:initMirror>
+        <askppplt:initNetIf askppplt:type="boolean-type">true</askppplt:initNetIf>
+        <askppplt:initPhy askppplt:type="boolean-type">true</askppplt:initPhy>
+        <askppplt:initPort askppplt:type="boolean-type">true</askppplt:initPort>
+        <askppplt:initTrunk askppplt:type="boolean-type">true</askppplt:initTrunk>
+        <askppplt:Trunk-params>
+          <askppplt:maxNumberOfTrunks askppplt:type="uint32">1023</askppplt:maxNumberOfTrunks>
+          <askppplt:trunkMembersMode askppplt:type="trunk-member-mode-type">FLEX</askppplt:trunkMembersMode>
+        </askppplt:Trunk-params>
+        <askppplt:initPcl askppplt:type="boolean-type">true</askppplt:initPcl>
+        <askppplt:initTcam askppplt:type="boolean-type">true</askppplt:initTcam>
+        <askppplt:initPolicer askppplt:type="boolean-type">true</askppplt:initPolicer>
+        <askppplt:initPha askppplt:type="boolean-type">true</askppplt:initPha>
+        <askppplt:Pha-params>
+          <askppplt:packetOrderChangeEnable askppplt:type="boolean-type">false</askppplt:packetOrderChangeEnable>
+          <askppplt:phaFwImageId askppplt:type="pha-firmware-image-id-type">02</askppplt:phaFwImageId>
+          <askppplt:phaFwImageIdVersion askppplt:type="uint32">0</askppplt:phaFwImageIdVersion>
+        </askppplt:Pha-params>
+      </askppplt:LibInit>
+    </askppplt:PPInit>
+  </askppplt:ASK-PP>
+</data>
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/db98cx8540_16cd/SAI-F6_4T-48x25G-4x100G.md5 b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/db98cx8540_16cd/SAI-F6_4T-48x25G-4x100G.md5
new file mode 100644
index 000000000..64a779785
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/db98cx8540_16cd/SAI-F6_4T-48x25G-4x100G.md5
@@ -0,0 +1 @@
+0952c232696d216ca2361801f32bfac4
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/db98cx8540_16cd/SAI-F6_4T-48x25G-4x100G.xml b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/db98cx8540_16cd/SAI-F6_4T-48x25G-4x100G.xml
new file mode 100644
index 000000000..9b3224ab6
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/db98cx8540_16cd/SAI-F6_4T-48x25G-4x100G.xml
@@ -0,0 +1,503 @@
+<?xml version="1.0" encoding="utf-8"?>
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-02-19-1.06" profile="SAI" sid="c310bbb1-ffca-4c99-9bae-f7d4caff5941">
+  <SAIplt:SAI xmlns:SAIplt="urn:marvell:SAI:yang">
+    <SAIplt:typedefs>
+      <SAIplt:typedef>
+        <SAIplt:name>device-id-type</SAIplt:name>
+        <SAIplt:type>uint32</SAIplt:type>
+        <SAIplt:description>Device ID 0..1</SAIplt:description>
+        <SAIplt:min>0</SAIplt:min>
+        <SAIplt:max>1</SAIplt:max>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>port-id-type</SAIplt:name>
+        <SAIplt:type>uint32</SAIplt:type>
+        <SAIplt:description>Interface number</SAIplt:description>
+        <SAIplt:min>0</SAIplt:min>
+        <SAIplt:max>1023</SAIplt:max>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>logDest-type</SAIplt:name>
+        <SAIplt:type>enumeration</SAIplt:type>
+        <SAIplt:description>Logging Feature Options</SAIplt:description>
+        <SAIplt:enum>
+          <SAIplt:name>SAI_LOG_SYSLOG</SAIplt:name>
+          <SAIplt:description>SYSLOG  {Syslog service should be running to use this option}</SAIplt:description>
+          <SAIplt:value>0</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>SAI_LOG_CONSOLE</SAIplt:name>
+          <SAIplt:description>CONSOLE</SAIplt:description>
+          <SAIplt:value>1</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>SAI_LOG_FILE</SAIplt:name>
+          <SAIplt:description>FILE  {Warning !!! Use with caution. Can cause disk full issues}</SAIplt:description>
+          <SAIplt:value>2</SAIplt:value>
+        </SAIplt:enum>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>InDropCounter-type</SAIplt:name>
+        <SAIplt:type>enumeration</SAIplt:type>
+        <SAIplt:description>Router In Drop Reason Feature Options</SAIplt:description>
+        <SAIplt:enum>
+          <SAIplt:name>TTL_HOPLIMIT_EXCEEDED</SAIplt:name>
+          <SAIplt:description>Router In Drop Counters track TTL &amp; Hop Limit Exceeded Packets</SAIplt:description>
+          <SAIplt:value>0</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>ROUTE_BLACKHOLE</SAIplt:name>
+          <SAIplt:description>Router In Drop Counters track Route Black Hole Packets</SAIplt:description>
+          <SAIplt:value>1</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>IN_DROP_ANY</SAIplt:name>
+          <SAIplt:description>Router In Drop Counters track either TTL &amp; Hop Limit Exceeded or Route Black Hole Packets</SAIplt:description>
+          <SAIplt:value>2</SAIplt:value>
+        </SAIplt:enum>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>log-dest-file-path-type</SAIplt:name>
+        <SAIplt:type>string</SAIplt:type>
+        <SAIplt:description>A string with path to file for logging feature</SAIplt:description>
+        <SAIplt:min>2</SAIplt:min>
+        <SAIplt:max>30</SAIplt:max>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>acl-feature-name-type</SAIplt:name>
+        <SAIplt:type>enumeration</SAIplt:type>
+        <SAIplt:description/>
+        <SAIplt:enum>
+          <SAIplt:name>port-sFlow</SAIplt:name>
+          <SAIplt:description>SFlow over Port</SAIplt:description>
+          <SAIplt:value>0</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>port-counters-ipv4-ipv6</SAIplt:name>
+          <SAIplt:description>Port ipv4/ipv6 counters</SAIplt:description>
+          <SAIplt:value>1</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>control-acl</SAIplt:name>
+          <SAIplt:description>ACLs for control packet handling</SAIplt:description>
+          <SAIplt:value>2</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>debug-counter-acl</SAIplt:name>
+          <SAIplt:description>ACLs for Debug Counters</SAIplt:description>
+          <SAIplt:value>3</SAIplt:value>
+        </SAIplt:enum>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>ingress-acl-stage-type</SAIplt:name>
+        <SAIplt:type>enumeration</SAIplt:type>
+        <SAIplt:description/>
+        <SAIplt:enum>
+          <SAIplt:name>disabled</SAIplt:name>
+          <SAIplt:description>Feature not enabled</SAIplt:description>
+          <SAIplt:value>0</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>IPCL0</SAIplt:name>
+          <SAIplt:description>Stage IPCL0</SAIplt:description>
+          <SAIplt:value>1</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>IPCL1</SAIplt:name>
+          <SAIplt:description>Stage IPCL1</SAIplt:description>
+          <SAIplt:value>2</SAIplt:value>
+        </SAIplt:enum>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>egress-acl-stage-type</SAIplt:name>
+        <SAIplt:type>enumeration</SAIplt:type>
+        <SAIplt:description/>
+        <SAIplt:enum>
+          <SAIplt:name>disabled</SAIplt:name>
+          <SAIplt:description>Feature not enabled</SAIplt:description>
+          <SAIplt:value>0</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>EPCL0</SAIplt:name>
+          <SAIplt:description>Stage EPCL0</SAIplt:description>
+          <SAIplt:value>2</SAIplt:value>
+        </SAIplt:enum>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>feature-priority-type</SAIplt:name>
+        <SAIplt:type>uint32</SAIplt:type>
+        <SAIplt:description>Feature priority</SAIplt:description>
+        <SAIplt:min>2</SAIplt:min>
+        <SAIplt:max>15</SAIplt:max>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>hit-number-type</SAIplt:name>
+        <SAIplt:type>uint32</SAIplt:type>
+        <SAIplt:description>Hit/lookup number</SAIplt:description>
+        <SAIplt:min>0</SAIplt:min>
+        <SAIplt:max>3</SAIplt:max>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>asic-type</SAIplt:name>
+        <SAIplt:type>enumeration</SAIplt:type>
+        <SAIplt:description>ASIC Type</SAIplt:description>
+        <SAIplt:enum>
+          <SAIplt:name>ASIC_AC3X</SAIplt:name>
+          <SAIplt:description>AC3X</SAIplt:description>
+          <SAIplt:value>0</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>ASIC_AC5X</SAIplt:name>
+          <SAIplt:description>AC5X</SAIplt:description>
+          <SAIplt:value>1</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>ASIC_Falcon</SAIplt:name>
+          <SAIplt:description>FALCON</SAIplt:description>
+          <SAIplt:value>2</SAIplt:value>
+        </SAIplt:enum>
+      </SAIplt:typedef>
+    </SAIplt:typedefs>
+    <SAIplt:ASIC_Type SAIplt:type="asic-type">ASIC_Falcon</SAIplt:ASIC_Type>
+    <SAIplt:ASK-BOARD-Profile-Name SAIplt:type="string">ASK-Board-F6_4T-48x25G-4x100G.xml</SAIplt:ASK-BOARD-Profile-Name>
+    <SAIplt:Ports>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">0</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">47</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">1</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">46</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">2</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">45</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">3</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">44</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">4</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">43</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">5</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">42</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">6</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">41</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">7</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">40</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">8</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">39</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">9</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">38</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">10</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">37</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">11</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">36</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">12</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">35</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">13</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">34</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">14</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">33</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">15</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">32</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">16</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">31</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">17</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">30</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">18</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">29</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">19</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">28</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">20</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">27</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">21</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">26</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">22</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">25</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">23</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">24</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">24</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">23</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">25</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">22</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">26</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">21</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">27</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">20</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">28</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">19</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">29</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">18</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">30</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">17</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">31</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">16</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">32</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">15</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">33</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">14</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">34</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">13</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">35</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">12</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">36</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">11</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">37</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">10</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">38</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">9</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">39</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">8</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">40</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">7</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">41</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">6</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">42</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">5</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">43</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">4</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">44</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">3</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">45</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">2</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">46</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">1</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">47</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">0</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">48</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">51</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">52</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">50</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">56</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">49</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">60</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">48</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">64</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">52</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">65</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">53</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+    </SAIplt:Ports>
+    <SAIplt:scalingFalcon>
+      <SAIplt:max_lag_members SAIplt:type="uint32">8</SAIplt:max_lag_members>
+      <SAIplt:max_route_ipv4 SAIplt:type="uint32">0</SAIplt:max_route_ipv4>
+      <SAIplt:max_route_ipv6 SAIplt:type="uint32">0</SAIplt:max_route_ipv6>
+      <SAIplt:max_Nh_Ecmp_Mbr_Per_Grp SAIplt:type="uint32">64</SAIplt:max_Nh_Ecmp_Mbr_Per_Grp>
+      <SAIplt:max_ipv4_tunnel SAIplt:type="uint32">8</SAIplt:max_ipv4_tunnel>
+      <SAIplt:max_ipv6_tunnel SAIplt:type="uint32">8</SAIplt:max_ipv6_tunnel>
+      <SAIplt:max_tti SAIplt:type="uint32">1024</SAIplt:max_tti>
+      <SAIplt:wred_size SAIplt:type="uint32">0</SAIplt:wred_size>
+      <SAIplt:max_nat SAIplt:type="uint32">0</SAIplt:max_nat>
+    </SAIplt:scalingFalcon>
+    <SAIplt:Counters>
+      <SAIplt:cnc-base-list>
+        <SAIplt:counter-base SAIplt:type="uint32">0</SAIplt:counter-base>
+      </SAIplt:cnc-base-list>
+    </SAIplt:Counters>
+    <SAIplt:Logging>
+      <SAIplt:log_dest SAIplt:type="logDest-type">SAI_LOG_SYSLOG</SAIplt:log_dest>
+    </SAIplt:Logging>
+    <SAIplt:Features-using-acl>
+      <SAIplt:feature SAIplt:type="acl-feature-name-type">control-acl</SAIplt:feature>
+      <SAIplt:feature-priority SAIplt:type="feature-priority-type">3</SAIplt:feature-priority>
+      <SAIplt:Ingress>
+        <SAIplt:ingress-stage SAIplt:type="ingress-acl-stage-type">IPCL0</SAIplt:ingress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">1</SAIplt:hit-number>
+      </SAIplt:Ingress>
+      <SAIplt:Egress>
+        <SAIplt:egress-stage SAIplt:type="egress-acl-stage-type">EPCL0</SAIplt:egress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">0</SAIplt:hit-number>
+      </SAIplt:Egress>
+    </SAIplt:Features-using-acl>
+    <SAIplt:Features-using-acl>
+      <SAIplt:feature SAIplt:type="acl-feature-name-type">port-sFlow</SAIplt:feature>
+      <SAIplt:feature-priority SAIplt:type="feature-priority-type">4</SAIplt:feature-priority>
+      <SAIplt:Ingress>
+        <SAIplt:ingress-stage SAIplt:type="ingress-acl-stage-type">IPCL0</SAIplt:ingress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">0</SAIplt:hit-number>
+      </SAIplt:Ingress>
+      <SAIplt:Egress>
+        <SAIplt:egress-stage SAIplt:type="egress-acl-stage-type">EPCL0</SAIplt:egress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">0</SAIplt:hit-number>
+      </SAIplt:Egress>
+    </SAIplt:Features-using-acl>
+    <SAIplt:Features-using-acl>
+      <SAIplt:feature SAIplt:type="acl-feature-name-type">port-counters-ipv4-ipv6</SAIplt:feature>
+      <SAIplt:feature-priority SAIplt:type="feature-priority-type">5</SAIplt:feature-priority>
+      <SAIplt:Ingress>
+        <SAIplt:ingress-stage SAIplt:type="ingress-acl-stage-type">IPCL0</SAIplt:ingress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">3</SAIplt:hit-number>
+      </SAIplt:Ingress>
+      <SAIplt:Egress>
+        <SAIplt:egress-stage SAIplt:type="egress-acl-stage-type">EPCL0</SAIplt:egress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">0</SAIplt:hit-number>
+      </SAIplt:Egress>
+    </SAIplt:Features-using-acl>
+    <SAIplt:Features-using-acl>
+      <SAIplt:feature SAIplt:type="acl-feature-name-type">debug-counter-acl</SAIplt:feature>
+      <SAIplt:feature-priority SAIplt:type="feature-priority-type">2</SAIplt:feature-priority>
+      <SAIplt:Ingress>
+        <SAIplt:ingress-stage SAIplt:type="ingress-acl-stage-type">IPCL0</SAIplt:ingress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">1</SAIplt:hit-number>
+      </SAIplt:Ingress>
+      <SAIplt:Egress>
+        <SAIplt:egress-stage SAIplt:type="egress-acl-stage-type">EPCL0</SAIplt:egress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">0</SAIplt:hit-number>
+      </SAIplt:Egress>
+    </SAIplt:Features-using-acl>
+  </SAIplt:SAI>
+</data>
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/db98cx8540_16cd/buffers.json.j2 b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/db98cx8540_16cd/buffers.json.j2
new file mode 100644
index 000000000..a9a01d707
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/db98cx8540_16cd/buffers.json.j2
@@ -0,0 +1 @@
+{%- include 'buffers_config.j2' %}
diff --git a/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/db98cx8540_16cd/buffers_config.j2 b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/db98cx8540_16cd/buffers_config.j2
new file mode 100644
index 000000000..a5212d979
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/db98cx8540_16cd/buffers_config.j2
@@ -0,0 +1,165 @@
+{%- macro set_default_topology() %}
+{%- if default_topo is defined %}
+{{ default_topo }}
+{%- else %}
+def
+{%- endif %}
+{%- endmacro -%}
+
+{# Determine device topology and filename postfix #}
+{%- if DEVICE_METADATA is defined %}
+{%-     set switch_role = DEVICE_METADATA['localhost']['type'] %}
+{%-     if switch_role.lower() == 'torrouter' %}
+{%-         set filename_postfix = 't0' %}
+{%-     elif switch_role.lower() == 'leafrouter' %}
+{%-         set filename_postfix = 't1' %}
+{%-     else %}
+{%-         set filename_postfix = set_default_topology() %}
+{%-     endif %}
+{%- else %}
+{%-     set filename_postfix = set_default_topology() %}
+{%-     set switch_role      = '' %}
+{%- endif -%}
+
+{# Import default values from device HWSKU folder #}
+{%- import 'buffers_defaults_%s.j2' % filename_postfix as defs %}
+
+{%- set default_cable = defs.default_cable -%}
+
+{# Port configuration to cable length look-up table #}
+{# Each record describes mapping of DUT (DUT port) role and neighbor role to cable length #}
+{# Roles described in the minigraph #}
+{%- if defs.ports2cable is defined %}
+    {%- set ports2cable = defs.ports2cable %}
+{%- else %}
+    {%- set ports2cable = {
+            'torrouter_server'       : '5m',
+            'leafrouter_torrouter'   : '40m',
+            'spinerouter_leafrouter' : '300m'
+            }
+    -%}
+{%- endif %}
+
+{%- macro cable_length(port_name) %}
+    {%- set cable_len = [] %}
+    {%- for local_port in DEVICE_NEIGHBOR %}
+        {%- if local_port == port_name %}
+            {%- if DEVICE_NEIGHBOR_METADATA is defined and DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[local_port].name] %}
+                {%- set neighbor = DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[local_port].name] %}
+                {%- set neighbor_role = neighbor.type %}
+                {%- set roles1 = switch_role + '_' + neighbor_role %}
+                {%- set roles2 = neighbor_role + '_' + switch_role %}
+                {%- set roles1 = roles1 | lower %}
+                {%- set roles2 = roles2 | lower %}
+                {%- if roles1 in ports2cable %}
+                    {%- if cable_len.append(ports2cable[roles1]) %}{% endif %}
+                {%- elif roles2 in ports2cable %}
+                    {%- if cable_len.append(ports2cable[roles2]) %}{% endif %}
+                {%- endif %}
+            {%- endif %}
+        {%- endif %}
+    {%- endfor %}
+    {%- if cable_len -%}
+        {{ cable_len.0 }}
+    {%- else %}
+        {%- if switch_role.lower() == 'torrouter' %}
+            {%- for local_port in VLAN_MEMBER %}
+                {%- if local_port[1] == port_name %}
+                    {%- set roles3 = switch_role + '_' + 'server' %}
+                    {%- set roles3 = roles3 | lower %}
+                    {%- if roles3 in ports2cable %}
+                        {%- if cable_len.append(ports2cable[roles3]) %}{% endif %}
+                    {%- endif %}
+                {%- endif %}
+            {%- endfor %}
+            {%- if cable_len -%}
+                {{ cable_len.0 }}
+            {%- else -%}
+                {{ default_cable }}
+            {%- endif %}
+        {%- else -%}
+            {{ default_cable }}
+        {%- endif %}
+    {%- endif %}
+{%- endmacro %}
+
+{%- set PORT_ALL  = [] %}
+
+{%- if PORT is not defined %}
+    {%- if defs.generate_port_lists(PORT_ALL) %} {% endif %}
+{%- else %}
+    {%- for port in PORT %}
+        {%- if PORT_ALL.append(port) %}{%- endif %}
+    {%- endfor %}
+{%- endif %}
+
+{%- set PORT_ACTIVE  = [] %}
+{%- if DEVICE_NEIGHBOR is not defined %}
+    {%- set PORT_ACTIVE = PORT_ALL %}
+{%- else %}
+    {%- for port in DEVICE_NEIGHBOR.keys() %}
+        {%- if PORT_ACTIVE.append(port) %}{%- endif %}
+    {%- endfor %}
+{%- endif %}
+
+{%- set port_names_list_active  = [] %}
+{%- for port in PORT_ACTIVE %}
+    {%- if port_names_list_active.append(port) %}{%- endif %}
+{%- endfor %}
+{%- set port_names_active  = port_names_list_active  | join(',') %}
+
+{
+    "CABLE_LENGTH": {
+        "AZURE": {
+    {% for port in PORT_ALL %}
+        {%- set cable = cable_length(port) %}
+        "{{ port }}": "{{ cable }}"{%- if not loop.last %},{% endif %}
+
+    {% endfor %}
+    }
+    },
+
+{% if defs.generate_buffer_pool_and_profiles is defined %}
+{{ defs.generate_buffer_pool_and_profiles() }}
+{% endif %}
+
+{%- if defs.generate_profile_lists is defined %}
+{{ defs.generate_profile_lists(port_names_active) }},
+{% endif %}
+
+{%- if defs.generate_pg_profils is defined %}
+{{ defs.generate_pg_profils(port_names_active) }}
+{% else %}
+    "BUFFER_PG": {
+{% for port in PORT_ACTIVE %}
+        "{{ port }}|0": {
+            "profile" : "[BUFFER_PROFILE|ingress_lossy_profile]"
+        }{% if not loop.last %},{% endif %}
+
+{% endfor %}
+    },
+{% endif %}
+
+{% if defs.generate_queue_buffers is defined %}
+{{ defs.generate_queue_buffers(port_names_active) }}
+{% else %}
+    "BUFFER_QUEUE": {
+{% for port in PORT_ACTIVE %}
+        "{{ port }}|3-4": {
+            "profile" : "[BUFFER_PROFILE|egress_lossless_profile]"
+        },
+{% endfor %}
+{% for port in PORT_ACTIVE %}
+        "{{ port }}|0-2": {
+            "profile" : "[BUFFER_PROFILE|egress_lossy_profile]"
+        },
+{% endfor %}
+{% for port in PORT_ACTIVE %}
+        "{{ port }}|5-6": {
+            "profile" : "[BUFFER_PROFILE|egress_lossy_profile]"
+        }{% if not loop.last %},{% endif %}
+
+{% endfor %}
+    }
+{% endif %}
+}
diff --git a/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/db98cx8540_16cd/buffers_defaults_t0.j2 b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/db98cx8540_16cd/buffers_defaults_t0.j2
new file mode 100644
index 000000000..f056413e8
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/db98cx8540_16cd/buffers_defaults_t0.j2
@@ -0,0 +1,36 @@
+
+{%- set default_cable = '40m' %}
+
+{%- macro generate_buffer_pool_and_profiles() %}
+    "BUFFER_POOL": {
+        "ingress_lossless_pool": {
+            "size": "11500000",
+            "type": "ingress",
+            "mode": "dynamic"
+        },
+        "egress_pool": {
+            "size": "11500000",
+            "type": "egress",
+            "mode": "static"
+        }
+    },
+    "BUFFER_PROFILE": {
+        "ingress_lossy_profile": {
+            "pool":"ingress_lossless_pool",
+            "size":"0",
+            "dynamic_th":"3"
+        },
+        "egress_lossless_profile": {
+            "pool":"egress_pool",
+            "mode": "static",
+            "size":"170000",
+            "static_th":"0"
+        },
+        "egress_lossy_profile": {
+            "pool":"egress_pool",
+            "size":"0",
+            "mode": "dynamic",
+            "dynamic_th":"3"
+        }
+    },
+{%- endmacro %}
diff --git a/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/db98cx8540_16cd/buffers_defaults_t1.j2 b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/db98cx8540_16cd/buffers_defaults_t1.j2
new file mode 100644
index 000000000..f056413e8
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/db98cx8540_16cd/buffers_defaults_t1.j2
@@ -0,0 +1,36 @@
+
+{%- set default_cable = '40m' %}
+
+{%- macro generate_buffer_pool_and_profiles() %}
+    "BUFFER_POOL": {
+        "ingress_lossless_pool": {
+            "size": "11500000",
+            "type": "ingress",
+            "mode": "dynamic"
+        },
+        "egress_pool": {
+            "size": "11500000",
+            "type": "egress",
+            "mode": "static"
+        }
+    },
+    "BUFFER_PROFILE": {
+        "ingress_lossy_profile": {
+            "pool":"ingress_lossless_pool",
+            "size":"0",
+            "dynamic_th":"3"
+        },
+        "egress_lossless_profile": {
+            "pool":"egress_pool",
+            "mode": "static",
+            "size":"170000",
+            "static_th":"0"
+        },
+        "egress_lossy_profile": {
+            "pool":"egress_pool",
+            "size":"0",
+            "mode": "dynamic",
+            "dynamic_th":"3"
+        }
+    },
+{%- endmacro %}
diff --git a/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/db98cx8540_16cd/port_config.ini b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/db98cx8540_16cd/port_config.ini
new file mode 100644
index 000000000..a8d374571
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/db98cx8540_16cd/port_config.ini
@@ -0,0 +1,55 @@
+#  name       lanes                       alias           speed  autoneg     fec    index
+Ethernet0       0                        twenty5GigE0      25000    on        none      1
+Ethernet1       1                        twenty5GigE1      25000    on        none      2
+Ethernet2       2                        twenty5GigE2      25000    on        none      3
+Ethernet3       3                        twenty5GigE3      25000    on        none      4
+Ethernet4       4                        twenty5GigE4      25000    on        none      5
+Ethernet5       5                        twenty5GigE5      25000    on        none      6
+Ethernet6       6                        twenty5GigE6      25000    on        none      7
+Ethernet7       7                        twenty5GigE7      25000    on        none      8
+Ethernet8       8                        twenty5GigE8      25000    on        none      9
+Ethernet9       9                        twenty5GigE9      25000    on        none      10
+Ethernet10     10                        twenty5GigE10     25000    on        none      11
+Ethernet11     11                        twenty5GigE11     25000    on        none      12
+Ethernet12     12                        twenty5GigE12     25000    on        none      13
+Ethernet13     13                        twenty5GigE13     25000    on        none      14
+Ethernet14     14                        twenty5GigE14     25000    on        none      15
+Ethernet15     15                        twenty5GigE15     25000    on        none      16
+Ethernet16     16                        twenty5GigE16     25000    on        none      17
+Ethernet17     17                        twenty5GigE17     25000    on        none      18
+Ethernet18     18                        twenty5GigE18     25000    on        none      19
+Ethernet19     19                        twenty5GigE19     25000    on        none      20
+Ethernet20     20                        twenty5GigE20     25000    on        none      21
+Ethernet21     21                        twenty5GigE21     25000    on        none      22
+Ethernet22     22                        twenty5GigE22     25000    on        none      23
+Ethernet23     23                        twenty5GigE23     25000    on        none      24
+Ethernet24     24                        twenty5GigE24     25000    on        none      25
+Ethernet25     25                        twenty5GigE25     25000    on        none      26
+Ethernet26     26                        twenty5GigE26     25000    on        none      27
+Ethernet27     27                        twenty5GigE27     25000    on        none      28
+Ethernet28     28                        twenty5GigE28     25000    on        none      29
+Ethernet29     29                        twenty5GigE29     25000    on        none      30
+Ethernet30     30                        twenty5GigE30     25000    on        none      31
+Ethernet31     31                        twenty5GigE31     25000    on        none      32
+Ethernet32     32                        twenty5GigE32     25000    on        none      33
+Ethernet33     33                        twenty5GigE33     25000    on        none      34
+Ethernet34     34                        twenty5GigE34     25000    on        none      35
+Ethernet35     35                        twenty5GigE35     25000    on        none      36
+Ethernet36     36                        twenty5GigE36     25000    on        none      37
+Ethernet37     37                        twenty5GigE37     25000    on        none      38
+Ethernet38     38                        twenty5GigE38     25000    on        none      39
+Ethernet39     39                        twenty5GigE39     25000    on        none      40
+Ethernet40     40                        twenty5GigE40     25000    on        none      41
+Ethernet41     41                        twenty5GigE41     25000    on        none      42
+Ethernet42     42                        twenty5GigE42     25000    on        none      43
+Ethernet43     43                        twenty5GigE43     25000    on        none      44
+Ethernet44     44                        twenty5GigE44     25000    on        none      45
+Ethernet45     45                        twenty5GigE45     25000    on        none      46
+Ethernet46     46                        twenty5GigE46     25000    on        none      47
+Ethernet47     47                        twenty5GigE47     25000    on        none      48
+Ethernet48     48,49,50,51               one00GigE48      100000    on          rs      49
+Ethernet49     52,53,54,55               one00GigE49      100000    on          rs      50
+Ethernet50     56,57,58,59               one00GigE50      100000    on          rs      51
+Ethernet51     60,61,62,63               one00GigE51      100000    on          rs      52
+Ethernet52     64                        tenGigE52         10000    off       none      53
+Ethernet53     65                        tenGigE53         10000    off       none      54
diff --git a/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/db98cx8540_16cd/profile.ini b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/db98cx8540_16cd/profile.ini
new file mode 100644
index 000000000..c2f77685a
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/db98cx8540_16cd/profile.ini
@@ -0,0 +1 @@
+switchMacAddress=00:01:02:03:04:05
diff --git a/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/db98cx8540_16cd/qos.json.j2 b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/db98cx8540_16cd/qos.json.j2
new file mode 100644
index 000000000..3e548325e
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/db98cx8540_16cd/qos.json.j2
@@ -0,0 +1 @@
+{%- include 'qos_config.j2' %}
diff --git a/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/db98cx8540_16cd/sai.profile b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/db98cx8540_16cd/sai.profile
new file mode 100644
index 000000000..b57d61241
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/db98cx8540_16cd/sai.profile
@@ -0,0 +1,4 @@
+mode=1
+hwId=FC48x25G4x100GR4
+switchProfile=/usr/share/sonic/hwsku/SAI-F6_4T-48x25G-4x100G.xml
+SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/profile.ini
diff --git a/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/default_sku b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/default_sku
new file mode 100644
index 000000000..e18b74451
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/default_sku
@@ -0,0 +1 @@
+db98cx8540_16cd t1
diff --git a/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/platform_asic b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/platform_asic
new file mode 100644
index 000000000..a55475287
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/platform_asic
@@ -0,0 +1 @@
+marvell
diff --git a/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/pmon_daemon_control.json b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/pmon_daemon_control.json
new file mode 100644
index 000000000..39deb88be
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/pmon_daemon_control.json
@@ -0,0 +1,8 @@
+{
+    "skip_ledd": true,
+    "skip_pcied": true,
+    "skip_thermalctld": true,
+    "skip_psud": true,
+    "skip_xcvrd": true,
+    "skip_syseepromd": true
+}
diff --git a/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/system_health_monitoring_config.json b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/system_health_monitoring_config.json
new file mode 100644
index 000000000..79c17103b
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8540_16cd-r0/system_health_monitoring_config.json
@@ -0,0 +1,10 @@
+{
+    "services_to_ignore": [],
+    "devices_to_ignore": [
+        "asic",
+        "psu.temperature",
+        "fan",
+        "psu"
+    ],
+    "user_defined_checkers": []
+}

From 556d1f1361cca9cc3630c7de8d3b0f6860a2d52d Mon Sep 17 00:00:00 2001
From: Pavan Naregundi <pnaregundi@marvell.com>
Date: Mon, 22 Apr 2024 04:42:02 +0000
Subject: [PATCH 0545/1115] HWSKU for x86_64-marvell_db98cx8514_10cc-r0

Signed-off-by: Pavan Naregundi <pnaregundi@marvell.com>
---
 .../ASK-Board-F2T_48x25G-8x100G.md5           |    1 +
 .../ASK-Board-F2T_48x25G-8x100G.xml           | 2153 ++++++++++++++
 .../ASK-L1-F2T_48x25G-8x100G.md5              |    1 +
 .../ASK-L1-F2T_48x25G-8x100G.xml              | 1252 ++++++++
 .../ASK-PP-F2T_48x25G-8x100G.md5              |    1 +
 .../ASK-PP-F2T_48x25G-8x100G.xml              | 1180 ++++++++
 .../F2T48x25G8x100G/SAI-F2T_48x25G-8x100G.md5 |    1 +
 .../F2T48x25G8x100G/SAI-F2T_48x25G-8x100G.xml |  523 ++++
 .../F2T48x25G8x100G/buffers_defaults_t0.j2    |   36 +
 .../F2T48x25G8x100G/buffers_defaults_t1.j2    |   36 +
 .../F2T48x25G8x100G/port_config.ini           |   59 +
 .../F2T48x25G8x100G/profile.ini               |    1 +
 .../F2T48x25G8x100G/sai.profile               |    4 +
 .../F2T80x25G/ASK-Board-F2T_80x25G.md5        |    1 +
 .../F2T80x25G/ASK-Board-F2T_80x25G.xml        | 2513 +++++++++++++++++
 .../F2T80x25G/ASK-L1-F2T_80x25G.md5           |    1 +
 .../F2T80x25G/ASK-L1-F2T_80x25G.xml           | 1366 +++++++++
 .../F2T80x25G/ASK-PP-F2T_80x25G.md5           |    1 +
 .../F2T80x25G/ASK-PP-F2T_80x25G.xml           | 1180 ++++++++
 .../F2T80x25G/SAI-F2T_80x25G.md5              |    1 +
 .../F2T80x25G/SAI-F2T_80x25G.xml              |  646 +++++
 .../F2T80x25G/buffers_defaults_t0.j2          |   36 +
 .../F2T80x25G/buffers_defaults_t1.j2          |   36 +
 .../F2T80x25G/port_config.ini                 |   83 +
 .../F2T80x25G/profile.ini                     |    1 +
 .../F2T80x25G/sai.profile                     |    4 +
 .../ASK-Board-F2T_48x25G-8x100G.md5           |    1 +
 .../ASK-Board-F2T_48x25G-8x100G.xml           | 2153 ++++++++++++++
 .../ASK-L1-F2T_48x25G-8x100G.md5              |    1 +
 .../ASK-L1-F2T_48x25G-8x100G.xml              | 1252 ++++++++
 .../ASK-PP-F2T_48x25G-8x100G.md5              |    1 +
 .../ASK-PP-F2T_48x25G-8x100G.xml              | 1180 ++++++++
 .../db98cx8514_10cc/SAI-F2T_48x25G-8x100G.md5 |    1 +
 .../db98cx8514_10cc/SAI-F2T_48x25G-8x100G.xml |  523 ++++
 .../db98cx8514_10cc/buffers.json.j2           |    1 +
 .../db98cx8514_10cc/buffers_config.j2         |  165 ++
 .../db98cx8514_10cc/buffers_defaults_t0.j2    |   36 +
 .../db98cx8514_10cc/buffers_defaults_t1.j2    |   36 +
 .../db98cx8514_10cc/port_config.ini           |   59 +
 .../db98cx8514_10cc/profile.ini               |    1 +
 .../db98cx8514_10cc/qos.json.j2               |    1 +
 .../db98cx8514_10cc/sai.profile               |    4 +
 .../default_sku                               |    1 +
 .../platform_asic                             |    1 +
 .../pmon_daemon_control.json                  |    8 +
 .../system_health_monitoring_config.json      |   10 +
 46 files changed, 16552 insertions(+)
 create mode 100644 device/marvell/x86_64-marvell_db98cx8514_10cc-r0/F2T48x25G8x100G/ASK-Board-F2T_48x25G-8x100G.md5
 create mode 100644 device/marvell/x86_64-marvell_db98cx8514_10cc-r0/F2T48x25G8x100G/ASK-Board-F2T_48x25G-8x100G.xml
 create mode 100644 device/marvell/x86_64-marvell_db98cx8514_10cc-r0/F2T48x25G8x100G/ASK-L1-F2T_48x25G-8x100G.md5
 create mode 100644 device/marvell/x86_64-marvell_db98cx8514_10cc-r0/F2T48x25G8x100G/ASK-L1-F2T_48x25G-8x100G.xml
 create mode 100644 device/marvell/x86_64-marvell_db98cx8514_10cc-r0/F2T48x25G8x100G/ASK-PP-F2T_48x25G-8x100G.md5
 create mode 100644 device/marvell/x86_64-marvell_db98cx8514_10cc-r0/F2T48x25G8x100G/ASK-PP-F2T_48x25G-8x100G.xml
 create mode 100644 device/marvell/x86_64-marvell_db98cx8514_10cc-r0/F2T48x25G8x100G/SAI-F2T_48x25G-8x100G.md5
 create mode 100644 device/marvell/x86_64-marvell_db98cx8514_10cc-r0/F2T48x25G8x100G/SAI-F2T_48x25G-8x100G.xml
 create mode 100644 device/marvell/x86_64-marvell_db98cx8514_10cc-r0/F2T48x25G8x100G/buffers_defaults_t0.j2
 create mode 100644 device/marvell/x86_64-marvell_db98cx8514_10cc-r0/F2T48x25G8x100G/buffers_defaults_t1.j2
 create mode 100644 device/marvell/x86_64-marvell_db98cx8514_10cc-r0/F2T48x25G8x100G/port_config.ini
 create mode 100644 device/marvell/x86_64-marvell_db98cx8514_10cc-r0/F2T48x25G8x100G/profile.ini
 create mode 100644 device/marvell/x86_64-marvell_db98cx8514_10cc-r0/F2T48x25G8x100G/sai.profile
 create mode 100644 device/marvell/x86_64-marvell_db98cx8514_10cc-r0/F2T80x25G/ASK-Board-F2T_80x25G.md5
 create mode 100644 device/marvell/x86_64-marvell_db98cx8514_10cc-r0/F2T80x25G/ASK-Board-F2T_80x25G.xml
 create mode 100644 device/marvell/x86_64-marvell_db98cx8514_10cc-r0/F2T80x25G/ASK-L1-F2T_80x25G.md5
 create mode 100644 device/marvell/x86_64-marvell_db98cx8514_10cc-r0/F2T80x25G/ASK-L1-F2T_80x25G.xml
 create mode 100644 device/marvell/x86_64-marvell_db98cx8514_10cc-r0/F2T80x25G/ASK-PP-F2T_80x25G.md5
 create mode 100644 device/marvell/x86_64-marvell_db98cx8514_10cc-r0/F2T80x25G/ASK-PP-F2T_80x25G.xml
 create mode 100644 device/marvell/x86_64-marvell_db98cx8514_10cc-r0/F2T80x25G/SAI-F2T_80x25G.md5
 create mode 100644 device/marvell/x86_64-marvell_db98cx8514_10cc-r0/F2T80x25G/SAI-F2T_80x25G.xml
 create mode 100644 device/marvell/x86_64-marvell_db98cx8514_10cc-r0/F2T80x25G/buffers_defaults_t0.j2
 create mode 100644 device/marvell/x86_64-marvell_db98cx8514_10cc-r0/F2T80x25G/buffers_defaults_t1.j2
 create mode 100644 device/marvell/x86_64-marvell_db98cx8514_10cc-r0/F2T80x25G/port_config.ini
 create mode 100644 device/marvell/x86_64-marvell_db98cx8514_10cc-r0/F2T80x25G/profile.ini
 create mode 100755 device/marvell/x86_64-marvell_db98cx8514_10cc-r0/F2T80x25G/sai.profile
 create mode 100644 device/marvell/x86_64-marvell_db98cx8514_10cc-r0/db98cx8514_10cc/ASK-Board-F2T_48x25G-8x100G.md5
 create mode 100644 device/marvell/x86_64-marvell_db98cx8514_10cc-r0/db98cx8514_10cc/ASK-Board-F2T_48x25G-8x100G.xml
 create mode 100644 device/marvell/x86_64-marvell_db98cx8514_10cc-r0/db98cx8514_10cc/ASK-L1-F2T_48x25G-8x100G.md5
 create mode 100644 device/marvell/x86_64-marvell_db98cx8514_10cc-r0/db98cx8514_10cc/ASK-L1-F2T_48x25G-8x100G.xml
 create mode 100644 device/marvell/x86_64-marvell_db98cx8514_10cc-r0/db98cx8514_10cc/ASK-PP-F2T_48x25G-8x100G.md5
 create mode 100644 device/marvell/x86_64-marvell_db98cx8514_10cc-r0/db98cx8514_10cc/ASK-PP-F2T_48x25G-8x100G.xml
 create mode 100644 device/marvell/x86_64-marvell_db98cx8514_10cc-r0/db98cx8514_10cc/SAI-F2T_48x25G-8x100G.md5
 create mode 100644 device/marvell/x86_64-marvell_db98cx8514_10cc-r0/db98cx8514_10cc/SAI-F2T_48x25G-8x100G.xml
 create mode 100644 device/marvell/x86_64-marvell_db98cx8514_10cc-r0/db98cx8514_10cc/buffers.json.j2
 create mode 100644 device/marvell/x86_64-marvell_db98cx8514_10cc-r0/db98cx8514_10cc/buffers_config.j2
 create mode 100644 device/marvell/x86_64-marvell_db98cx8514_10cc-r0/db98cx8514_10cc/buffers_defaults_t0.j2
 create mode 100644 device/marvell/x86_64-marvell_db98cx8514_10cc-r0/db98cx8514_10cc/buffers_defaults_t1.j2
 create mode 100644 device/marvell/x86_64-marvell_db98cx8514_10cc-r0/db98cx8514_10cc/port_config.ini
 create mode 100644 device/marvell/x86_64-marvell_db98cx8514_10cc-r0/db98cx8514_10cc/profile.ini
 create mode 100644 device/marvell/x86_64-marvell_db98cx8514_10cc-r0/db98cx8514_10cc/qos.json.j2
 create mode 100644 device/marvell/x86_64-marvell_db98cx8514_10cc-r0/db98cx8514_10cc/sai.profile
 create mode 100644 device/marvell/x86_64-marvell_db98cx8514_10cc-r0/default_sku
 create mode 100644 device/marvell/x86_64-marvell_db98cx8514_10cc-r0/platform_asic
 create mode 100644 device/marvell/x86_64-marvell_db98cx8514_10cc-r0/pmon_daemon_control.json
 create mode 100644 device/marvell/x86_64-marvell_db98cx8514_10cc-r0/system_health_monitoring_config.json

diff --git a/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/F2T48x25G8x100G/ASK-Board-F2T_48x25G-8x100G.md5 b/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/F2T48x25G8x100G/ASK-Board-F2T_48x25G-8x100G.md5
new file mode 100644
index 000000000..3e849f9f5
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/F2T48x25G8x100G/ASK-Board-F2T_48x25G-8x100G.md5
@@ -0,0 +1 @@
+6eecbbbd215fe27637a19f5b01f96b51
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/F2T48x25G8x100G/ASK-Board-F2T_48x25G-8x100G.xml b/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/F2T48x25G8x100G/ASK-Board-F2T_48x25G-8x100G.xml
new file mode 100644
index 000000000..9eeb751c9
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/F2T48x25G8x100G/ASK-Board-F2T_48x25G-8x100G.xml
@@ -0,0 +1,2153 @@
+<?xml version="1.0" encoding="utf-8"?>
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-02-19-1.06" profile="Askboard" sid="eb53f80b-5892-4f8b-9197-a6f626effaba">
+  <askboardplt:ASK-Board xmlns:askboardplt="urn:marvell:askboard:yang">
+    <askboardplt:typedefs>
+      <askboardplt:typedef>
+        <askboardplt:name>std-string</askboardplt:name>
+        <askboardplt:type>string</askboardplt:type>
+        <askboardplt:description>standard string.</askboardplt:description>
+        <askboardplt:min>1</askboardplt:min>
+        <askboardplt:max>100</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>board-callback-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies os/ext drv callback types.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>linux-static</askboardplt:name>
+          <askboardplt:description>Linux Static</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>linux-shared</askboardplt:name>
+          <askboardplt:description>Linux Shared Lib mode</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>external</askboardplt:name>
+          <askboardplt:description>External Os</askboardplt:description>
+          <askboardplt:value>3</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>freeBsd</askboardplt:name>
+          <askboardplt:description>Free BSD</askboardplt:description>
+          <askboardplt:value>4</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>board-pp-map-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies pci info types.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>fixed</askboardplt:name>
+          <askboardplt:description>Fixed</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>autoscan</askboardplt:name>
+          <askboardplt:description>Auto scan</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>board-pp-interface-channel-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies channel interface type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>pci</askboardplt:name>
+          <askboardplt:description>PCI</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>smi</askboardplt:name>
+          <askboardplt:description>SMI</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>twsi</askboardplt:name>
+          <askboardplt:description>TWSI</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>board-pp-as-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies Address space type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>4_regions</askboardplt:name>
+          <askboardplt:description>address-space 4 regions</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>8_regions</askboardplt:name>
+          <askboardplt:description>address-space 8 regions</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>atu</askboardplt:name>
+          <askboardplt:description>address translation unit</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>device-id-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Device ID 0..1</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>1</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>port-mapping-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies port map type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>ethernet_mac</askboardplt:name>
+          <askboardplt:description>ETHERNET_MAC</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>cpu_sdma</askboardplt:name>
+          <askboardplt:description>CPU_SDMA</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>interface-num-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Interface number</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>1023</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>txq-port-number-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>TXq port number </askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>99</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>phy-smi-interface-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Phy SMI interface type.</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>3</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>phy-xsmi-interface-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Phy XSMI interface type.</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>15</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>phy-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the PHY Part Identifier.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>NA</askboardplt:name>
+          <askboardplt:description>No Phy</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E1543</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E1543, used for Combo ports.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E1545</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E1545, used for Copper GE with MAC on PHY support.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E1680</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E1680, used for Copper with speeds of 10M/100M/1G.</askboardplt:description>
+          <askboardplt:value>3</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E151X</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E151X, used for Copper (HW supports combo and fiber).</askboardplt:description>
+          <askboardplt:value>4</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E3140</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E3140, used for Copper with speeds of 100M/1G/10G.
+Uses with FW SolarFlare next generation.</askboardplt:description>
+          <askboardplt:value>5</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E3240</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E3240, used for Copper with speeds of 100M/1G/10G.
+Uses with FW, SolarFlare next generation.</askboardplt:description>
+          <askboardplt:value>6</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E3680</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E3680, used for Octal Copper 100M.</askboardplt:description>
+          <askboardplt:value>7</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E3220</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E3220, used for Combo port with speeds of 100M/1G/10G.
+Uses FW, SolarFlare next generation.</askboardplt:description>
+          <askboardplt:value>8</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E1680L</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E1680L, used for Copper with speeds of 10M/100M/1G.</askboardplt:description>
+          <askboardplt:value>9</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E33X0</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E33X0, used for MGIG Combo.</askboardplt:description>
+          <askboardplt:value>10</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E1548</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E1548, used for Fiber GE.</askboardplt:description>
+          <askboardplt:value>11</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E20X0</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E20X0, used for Copper with speeds of 10M/100M/1G/2.5G/5G.</askboardplt:description>
+          <askboardplt:value>12</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E1512</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E1512, used for Copper with speeds of 10M/100M/1G.</askboardplt:description>
+          <askboardplt:value>13</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E2180</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E2180, used for Copper with speeds of 10M/100M/1G/2.5G/5G.</askboardplt:description>
+          <askboardplt:value>14</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E1780</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E1780, Integrated Octal 10/100/1000 Mbps Energy
+Efficient Ethernet Transceiver</askboardplt:description>
+          <askboardplt:value>15</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E2540</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E2540, 4 ports 10/100/1000/2.5G/5GBASE-T Ethernet
+Transceiver with IEEE 1588v2 PTP Support</askboardplt:description>
+          <askboardplt:value>16</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E2580</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E12580, Octal 10/100/1000/2.5G/5GBASE-T Ethernet Transceiver
+with IEEE 1588v2 PTP Support</askboardplt:description>
+          <askboardplt:value>17</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>physical-port-num-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>PHYSICAL PORT NUM</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>1023</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-port-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the ledstream port type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>PORT_TYPE_TRI_SPEED</askboardplt:name>
+          <askboardplt:description>tri-speed port.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>PORT_TYPE_XG</askboardplt:name>
+          <askboardplt:description>XG port.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-blink-select-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the LED stream blink select type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_SELECT_0</askboardplt:name>
+          <askboardplt:description>Blink 0 signal.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_SELECT_1</askboardplt:name>
+          <askboardplt:description>Blink 1 signal</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-order-mode-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the LED stream ordering mode.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>ORDER_MODE_BY_PORT</askboardplt:name>
+          <askboardplt:description>the indication order is arranged by port.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>ORDER_MODE_BY_CLASS</askboardplt:name>
+          <askboardplt:description>the indication order is arranged by class.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-blink-duty-cycle-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the LED stream blink cycle duty cycle type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DUTY_CYCLE_0</askboardplt:name>
+          <askboardplt:description>25% on, 75% off.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DUTY_CYCLE_1</askboardplt:name>
+          <askboardplt:description>50% on, 50% off.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DUTY_CYCLE_2</askboardplt:name>
+          <askboardplt:description>50% on, 50% off.</askboardplt:description>
+          <askboardplt:value>3</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DUTY_CYCLE_3</askboardplt:name>
+          <askboardplt:description>75% on, 25% off.</askboardplt:description>
+          <askboardplt:value>4</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-blink-duration-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the LED stream blink period type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DURATION_0</askboardplt:name>
+          <askboardplt:description>BLINK_DURATION_0.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DURATION_1</askboardplt:name>
+          <askboardplt:description>BLINK_DURATION_1.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DURATION_2</askboardplt:name>
+          <askboardplt:description>BLINK_DURATION_2.</askboardplt:description>
+          <askboardplt:value>3</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DURATION_3</askboardplt:name>
+          <askboardplt:description>BLINK_DURATION_3.</askboardplt:description>
+          <askboardplt:value>4</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DURATION_4</askboardplt:name>
+          <askboardplt:description>BLINK_DURATION_4.</askboardplt:description>
+          <askboardplt:value>5</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DURATION_5</askboardplt:name>
+          <askboardplt:description>BLINK_DURATION_5.</askboardplt:description>
+          <askboardplt:value>6</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DURATION_6</askboardplt:name>
+          <askboardplt:description>(APPLICABLE DEVICES: xCat3; AC5; Lion2; Bobcat2; Caelum; Aldrin; AC3X; Bobcat3; Aldrin2; Pipe) .</askboardplt:description>
+          <askboardplt:value>7</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DURATION_7</askboardplt:name>
+          <askboardplt:description>APPLICABLE DEVICES: Bobcat2; Caelum; Aldrin; AC3X; Bobcat3; Aldrin2; Pipe).</askboardplt:description>
+          <askboardplt:value>8</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-pulse-stretch-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the LED stream length of stretching for dynamic signals.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>PULSE_STRETCH_0_NO</askboardplt:name>
+          <askboardplt:description>PULSE_STRETCH_0_NO.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>PULSE_STRETCH_1</askboardplt:name>
+          <askboardplt:description>PULSE_STRETCH_1.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>PULSE_STRETCH_2</askboardplt:name>
+          <askboardplt:description>PULSE_STRETCH_2.</askboardplt:description>
+          <askboardplt:value>3</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>PULSE_STRETCH_3</askboardplt:name>
+          <askboardplt:description>PULSE_STRETCH_3.</askboardplt:description>
+          <askboardplt:value>4</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>PULSE_STRETCH_4</askboardplt:name>
+          <askboardplt:description>PULSE_STRETCH_4.</askboardplt:description>
+          <askboardplt:value>5</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>PULSE_STRETCH_5</askboardplt:name>
+          <askboardplt:description>PULSE_STRETCH_5.</askboardplt:description>
+          <askboardplt:value>6</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>PULSE_STRETCH_6</askboardplt:name>
+          <askboardplt:description>(APPLICABLE DEVICES: Bobcat2; Caelum; Aldrin; AC3X; Bobcat3; Aldrin2; Falcon; AC5P; Pipe).</askboardplt:description>
+          <askboardplt:value>7</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>PULSE_STRETCH_7</askboardplt:name>
+          <askboardplt:description>(APPLICABLE DEVICES: Bobcat2; Caelum; Aldrin; AC3X; Bobcat3; Aldrin2; Falcon; AC5P; Pipe).</askboardplt:description>
+          <askboardplt:value>8</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-clock-out-frequency-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the LED stream blink cycle duty cycle type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>_CLOCK_OUT_FREQUENCY_500</askboardplt:name>
+          <askboardplt:description>500 KHz LED clock frequency.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>CLOCK_OUT_FREQUENCY_1000</askboardplt:name>
+          <askboardplt:description>1 MHz LED clock frequency.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>CLOCK_OUT_FREQUENCY_2000</askboardplt:name>
+          <askboardplt:description>2 MHz LED clock frequency.</askboardplt:description>
+          <askboardplt:value>3</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>CLOCK_OUT_FREQUENCY_3000</askboardplt:name>
+          <askboardplt:description>3 MHz LED clock frequency.</askboardplt:description>
+          <askboardplt:value>4</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-class5-select-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the LED stream indication displayed on class5 (for dual-media port/phy).</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>CLASS_5_SELECT_HALF_DUPLEX</askboardplt:name>
+          <askboardplt:description>Half Duplex is displayed on class5.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>CLASS_5_SELECT_FIBER_LINK_UP</askboardplt:name>
+          <askboardplt:description>If port is a dual media port, Fiber Link Up is displayed on class5.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-class13-select-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the LED stream indication displayed on class13 (for dual-media port/phy).</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>CLASS_13_SELECT_LINK_DOWN</askboardplt:name>
+          <askboardplt:description>Link Down is displayed on class13.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>CLASS_13_SELECT_COPPER_LINK_UP</askboardplt:name>
+          <askboardplt:description>If port is a dual media port, Copper Link Up is displayed on class13.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-class-num-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Led Class number</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>11</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>boolean-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Boolean 32 bits , due to bing endian</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>false</askboardplt:name>
+          <askboardplt:description>False</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>true</askboardplt:name>
+          <askboardplt:description>True</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>bus-id-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Bus Id Type, PCI/SMI</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>255</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>function-id-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Function Id Type, PCI/SMI</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>255</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>domain-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Domain, PCI/SMI</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>255</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-interface-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Led interface</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>255</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-position-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Led position</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>63</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>serdes-lane-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>serdes lane</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>7</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>cpu-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>The CPU Internal/External</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>external</askboardplt:name>
+          <askboardplt:description>Extrenal connected CPU</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>internal</askboardplt:name>
+          <askboardplt:description>Internal CPU</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-clock-frequency-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Led Clock Frequency Sip6</askboardplt:description>
+        <askboardplt:min>500</askboardplt:min>
+        <askboardplt:max>80000</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-unit-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Led units</askboardplt:description>
+        <askboardplt:min>1</askboardplt:min>
+        <askboardplt:max>16</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-unit-or-no-unit-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Led units, 0 for no Unit</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>16</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-group-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Led Group</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>1</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-force-data-type</askboardplt:name>
+        <askboardplt:type>string</askboardplt:type>
+        <askboardplt:description>A hexadecimal string with octets represented as hex digits
+separated by colons.  The canonical representation uses
+lowercase characters.</askboardplt:description>
+        <askboardplt:min>3</askboardplt:min>
+        <askboardplt:max>11</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>bit-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Bit range 0..31</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>31</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>bit-size-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Bit leng 1..32</askboardplt:description>
+        <askboardplt:min>1</askboardplt:min>
+        <askboardplt:max>32</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-sip-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>The LED scehme</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>na</askboardplt:name>
+          <askboardplt:description>NA</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>sip5</askboardplt:name>
+          <askboardplt:description>SIP5: AC3x</askboardplt:description>
+          <askboardplt:value>5</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>sip6</askboardplt:name>
+          <askboardplt:description>SIP6: Falcon, AC5x</askboardplt:description>
+          <askboardplt:value>6</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>port-cscd-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the cascade port type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>DSA_1_WORD</askboardplt:name>
+          <askboardplt:description>DSA Regular</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>DSA_2_WORDS</askboardplt:name>
+          <askboardplt:description>DSA Extended</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>NETWORK</askboardplt:name>
+          <askboardplt:description>Network.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>DSA_3_WORDS</askboardplt:name>
+          <askboardplt:description>DSA 3 Words</askboardplt:description>
+          <askboardplt:value>3</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>DSA_4_WORD</askboardplt:name>
+          <askboardplt:description>DSA 4 Words</askboardplt:description>
+          <askboardplt:value>4</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>trunk-cscd-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Specifies the Cascade Trunk id.</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>127</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>port-trunk-cscd-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the cascade port type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>cscdPort</askboardplt:name>
+          <askboardplt:description>Cascade port</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>cscdTrunk</askboardplt:name>
+          <askboardplt:description>Csacde trunk</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>hash-cscd-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the hash used by cascade trunk.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>pkt</askboardplt:name>
+          <askboardplt:description>Hash based on packet</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>srcPort</askboardplt:name>
+          <askboardplt:description>Hash based on source port</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>asic-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>ASIC Type</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>ASIC_AC3X</askboardplt:name>
+          <askboardplt:description>AC3X</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>ASIC_AC5X</askboardplt:name>
+          <askboardplt:description>AC5X</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>ASIC_Falcon</askboardplt:name>
+          <askboardplt:description>FALCON</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+    </askboardplt:typedefs>
+    <askboardplt:ASIC_Type askboardplt:type="asic-type">ASIC_Falcon</askboardplt:ASIC_Type>
+    <askboardplt:boardName askboardplt:type="std-string">ASK-Board-F2T_48x25G-8x100G</askboardplt:boardName>
+    <askboardplt:osCallType askboardplt:type="board-callback-type">linux-static</askboardplt:osCallType>
+    <askboardplt:extDrvCallType askboardplt:type="board-callback-type">linux-static</askboardplt:extDrvCallType>
+    <askboardplt:mapType askboardplt:type="board-pp-map-type">autoscan</askboardplt:mapType>
+    <askboardplt:cpuType askboardplt:type="cpu-type">external</askboardplt:cpuType>
+    <askboardplt:mngInterfaceType askboardplt:type="board-pp-interface-channel-type">pci</askboardplt:mngInterfaceType>
+    <askboardplt:adressSpaceType askboardplt:type="board-pp-as-type">atu</askboardplt:adressSpaceType>
+    <askboardplt:device-list>
+      <askboardplt:devNum askboardplt:type="device-id-type">0</askboardplt:devNum>
+      <askboardplt:deviceId askboardplt:type="device-id-type">0</askboardplt:deviceId>
+      <askboardplt:pp-profile-name askboardplt:type="std-string">ASK-PP-F2T_48x25G-8x100G.xml</askboardplt:pp-profile-name>
+      <askboardplt:L1-profile-name askboardplt:type="std-string">ASK-L1-F2T_48x25G-8x100G.xml</askboardplt:L1-profile-name>
+      <askboardplt:ledStreamType askboardplt:type="led-sip-type">sip6</askboardplt:ledStreamType>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">0</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">112</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP0</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">1</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">113</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">2</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">114</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">3</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">115</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">4</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">116</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">5</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">117</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">6</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">118</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">7</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">119</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">8</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">120</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP1</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">9</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">121</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">10</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">122</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">11</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">123</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">12</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">124</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">13</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">125</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">14</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">126</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">15</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">127</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">16</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">0</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP0</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">17</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">1</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">18</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">2</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">19</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">3</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">20</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">4</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">21</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">5</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">22</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">6</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">23</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">7</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">24</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">8</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP1</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">25</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">9</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">26</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">10</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">27</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">11</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">28</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">12</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">29</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">13</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">30</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">14</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">31</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">15</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">32</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">32</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP0</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">33</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">33</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">34</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">34</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">35</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">35</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">36</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">36</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">37</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">37</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">38</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">38</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">39</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">39</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">40</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">40</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP1</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">41</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">41</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">42</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">42</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">43</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">43</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">44</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">44</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">45</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">45</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">46</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">46</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">47</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">47</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">48</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">64</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP2</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">49</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">68</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">50</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">72</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP3</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">51</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">76</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">52</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">80</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP2</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">53</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">84</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">54</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">88</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP3</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">55</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">92</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">56</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">133</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">57</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">135</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">63</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">cpu_sdma</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">136</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">58</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">cpu_sdma</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">137</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">59</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">cpu_sdma</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">138</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">60</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">cpu_sdma</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">139</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+      </askboardplt:portMap-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">64</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">65</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">66</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">67</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">68</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">69</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">70</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">71</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">79</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">78</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">77</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">76</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">75</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">74</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">73</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">72</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">0</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">1</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">2</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">3</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">4</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">5</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">6</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">7</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">15</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">14</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">13</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">12</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">11</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">10</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">9</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">8</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">16</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">17</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">18</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">19</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">20</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">21</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">22</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">23</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">31</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">30</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">29</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">28</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">27</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">26</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">25</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">24</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">32</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">35</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">33</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">34</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">37</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">39</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">36</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">38</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">47</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">44</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">46</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">45</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">42</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">40</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">43</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">41</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">48</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">51</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">49</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">50</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">53</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">55</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">52</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">54</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">63</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">60</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">62</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">61</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">58</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">56</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">59</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">57</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">80</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">81</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+    </askboardplt:device-list>
+    <askboardplt:UDSFilePath askboardplt:type="std-string">/tmp/cpss_uds</askboardplt:UDSFilePath>
+    <askboardplt:serdesMux>
+      <askboardplt:serdesMuxSchemePortMod askboardplt:type="uint32">8</askboardplt:serdesMuxSchemePortMod>
+      <askboardplt:serdesMuxSchemeList>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP0</askboardplt:serdesMuxScheme>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">0</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">1</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">2</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">3</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">4</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">5</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">6</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">7</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+      </askboardplt:serdesMuxSchemeList>
+      <askboardplt:serdesMuxSchemeList>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP1</askboardplt:serdesMuxScheme>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">7</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">6</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">5</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">4</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">3</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">2</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">1</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">0</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+      </askboardplt:serdesMuxSchemeList>
+      <askboardplt:serdesMuxSchemeList>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP2</askboardplt:serdesMuxScheme>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">0</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">3</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">1</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">2</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">5</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">7</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">4</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">6</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+      </askboardplt:serdesMuxSchemeList>
+      <askboardplt:serdesMuxSchemeList>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP3</askboardplt:serdesMuxScheme>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">7</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">4</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">6</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">5</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">2</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">0</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">3</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">1</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+      </askboardplt:serdesMuxSchemeList>
+    </askboardplt:serdesMux>
+  </askboardplt:ASK-Board>
+</data>
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/F2T48x25G8x100G/ASK-L1-F2T_48x25G-8x100G.md5 b/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/F2T48x25G8x100G/ASK-L1-F2T_48x25G-8x100G.md5
new file mode 100644
index 000000000..5ce1720c3
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/F2T48x25G8x100G/ASK-L1-F2T_48x25G-8x100G.md5
@@ -0,0 +1 @@
+06a802c61f6b37d6e1897fdf4be6ee83
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/F2T48x25G8x100G/ASK-L1-F2T_48x25G-8x100G.xml b/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/F2T48x25G8x100G/ASK-L1-F2T_48x25G-8x100G.xml
new file mode 100644
index 000000000..666a1eec8
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/F2T48x25G8x100G/ASK-L1-F2T_48x25G-8x100G.xml
@@ -0,0 +1,1252 @@
+<?xml version="1.0" encoding="utf-8"?>
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-02-19-1.06" profile="Askl1" sid="71d3ab0f-3ac2-452a-a5c9-2dfdc969734a">
+  <ASKL1plt:ASK-L1 xmlns:ASKL1plt="urn:marvell:ASKL1:yang">
+    <ASKL1plt:typedefs>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>interface-mode-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Specifies supported Interface modes</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>1000BASE_X</ASKL1plt:name>
+          <ASKL1plt:description>1G</ASKL1plt:description>
+          <ASKL1plt:value>6</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>SGMII</ASKL1plt:name>
+          <ASKL1plt:description>1G , 2.5G</ASKL1plt:description>
+          <ASKL1plt:value>3</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>QSGMII</ASKL1plt:name>
+          <ASKL1plt:description>1G</ASKL1plt:description>
+          <ASKL1plt:value>13</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>KR</ASKL1plt:name>
+          <ASKL1plt:description>10G, 12G, 20G, 40G, 100G</ASKL1plt:description>
+          <ASKL1plt:value>16</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>SR_LR</ASKL1plt:name>
+          <ASKL1plt:description>5G, 10G, 12G, 20G, 40G</ASKL1plt:description>
+          <ASKL1plt:value>20</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>KR2</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>27</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>KR4</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>28</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>SR_LR2</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>29</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>SR_LR4</ASKL1plt:name>
+          <ASKL1plt:description>100G</ASKL1plt:description>
+          <ASKL1plt:value>30</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>KR_C</ASKL1plt:name>
+          <ASKL1plt:description>CONSORTIUM - 25G</ASKL1plt:description>
+          <ASKL1plt:value>32</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>CR_C</ASKL1plt:name>
+          <ASKL1plt:description>CONSORTIUM - 25G</ASKL1plt:description>
+          <ASKL1plt:value>33</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>KR2_C</ASKL1plt:name>
+          <ASKL1plt:description>CONSORTIUM - 50G</ASKL1plt:description>
+          <ASKL1plt:value>34</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>CR2_C</ASKL1plt:name>
+          <ASKL1plt:description>CONSORTIUM - 50G</ASKL1plt:description>
+          <ASKL1plt:value>35</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>CR</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>36</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>CR2</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>37</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>CR4</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>38</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>KR_S</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>39</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>CR_S</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>40</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>KR8</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>41</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>CR8</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>42</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>SR_LR8</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>43</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>USX_10G_QXGMII</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>51</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>USX_20G_QXGMII</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>52</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>USX_OUSGMII</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>53</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>USX_20G_OXGMII</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>54</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>NA</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>57</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>port-speed-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Specifies supported speeds</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>1G</ASKL1plt:name>
+          <ASKL1plt:description>1G</ASKL1plt:description>
+          <ASKL1plt:value>2</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>10G</ASKL1plt:name>
+          <ASKL1plt:description>10G</ASKL1plt:description>
+          <ASKL1plt:value>3</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>2500M</ASKL1plt:name>
+          <ASKL1plt:description>2.5G</ASKL1plt:description>
+          <ASKL1plt:value>5</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>5G</ASKL1plt:name>
+          <ASKL1plt:description>5G</ASKL1plt:description>
+          <ASKL1plt:value>6</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>25G</ASKL1plt:name>
+          <ASKL1plt:description>25G, used in combination with CPSS_PORT_INTERFACE_MODE_KR_E, CPSS_PORT_INTERFACE_MODE_KR2_E</ASKL1plt:description>
+          <ASKL1plt:value>21</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>40G</ASKL1plt:name>
+          <ASKL1plt:description>40G</ASKL1plt:description>
+          <ASKL1plt:value>9</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>50G</ASKL1plt:name>
+          <ASKL1plt:description>50G</ASKL1plt:description>
+          <ASKL1plt:value>14</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>100G</ASKL1plt:name>
+          <ASKL1plt:description>100G</ASKL1plt:description>
+          <ASKL1plt:value>13</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>200G</ASKL1plt:name>
+          <ASKL1plt:description>200G</ASKL1plt:description>
+          <ASKL1plt:value>24</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>400G</ASKL1plt:name>
+          <ASKL1plt:description>400G</ASKL1plt:description>
+          <ASKL1plt:value>25</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>NA</ASKL1plt:name>
+          <ASKL1plt:description>NA</ASKL1plt:description>
+          <ASKL1plt:value>35</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>fec-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Rx parameter type</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>enabled</ASKL1plt:name>
+          <ASKL1plt:description>Enabled</ASKL1plt:description>
+          <ASKL1plt:value>0</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>disabled</ASKL1plt:name>
+          <ASKL1plt:description>Disabled</ASKL1plt:description>
+          <ASKL1plt:value>1</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rs_enabled</ASKL1plt:name>
+          <ASKL1plt:description>RS FEC enabled</ASKL1plt:description>
+          <ASKL1plt:value>2</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>both_enabled</ASKL1plt:name>
+          <ASKL1plt:description>Both enabled</ASKL1plt:description>
+          <ASKL1plt:value>3</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rs_544_514_enabled</ASKL1plt:name>
+          <ASKL1plt:description>RS FEC 544 and 514</ASKL1plt:description>
+          <ASKL1plt:value>4</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>physical-port-num-type</ASKL1plt:name>
+        <ASKL1plt:type>uint32</ASKL1plt:type>
+        <ASKL1plt:description>PHYSICAL PORT NUM</ASKL1plt:description>
+        <ASKL1plt:min>0</ASKL1plt:min>
+        <ASKL1plt:max>1023</ASKL1plt:max>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>tx-param-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Tx parameter type</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>atten</ASKL1plt:name>
+          <ASKL1plt:description>atten</ASKL1plt:description>
+          <ASKL1plt:value>0</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>post</ASKL1plt:name>
+          <ASKL1plt:description>post</ASKL1plt:description>
+          <ASKL1plt:value>1</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>pre</ASKL1plt:name>
+          <ASKL1plt:description>pre</ASKL1plt:description>
+          <ASKL1plt:value>2</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>pre2</ASKL1plt:name>
+          <ASKL1plt:description>pre2</ASKL1plt:description>
+          <ASKL1plt:value>3</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>pre3</ASKL1plt:name>
+          <ASKL1plt:description>pre3</ASKL1plt:description>
+          <ASKL1plt:value>4</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>peak</ASKL1plt:name>
+          <ASKL1plt:description>peak</ASKL1plt:description>
+          <ASKL1plt:value>5</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>main</ASKL1plt:name>
+          <ASKL1plt:description>main</ASKL1plt:description>
+          <ASKL1plt:value>6</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>txAmpAdjEn</ASKL1plt:name>
+          <ASKL1plt:description>txAmpAdjEn</ASKL1plt:description>
+          <ASKL1plt:value>7</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>emph0</ASKL1plt:name>
+          <ASKL1plt:description>emph0</ASKL1plt:description>
+          <ASKL1plt:value>8</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>emph1</ASKL1plt:name>
+          <ASKL1plt:description>emph1</ASKL1plt:description>
+          <ASKL1plt:value>9</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>txAmpShft</ASKL1plt:name>
+          <ASKL1plt:description>txAmpShft</ASKL1plt:description>
+          <ASKL1plt:value>10</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>txEmphEn</ASKL1plt:name>
+          <ASKL1plt:description>txEmphEn</ASKL1plt:description>
+          <ASKL1plt:value>11</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>txEmphEn1</ASKL1plt:name>
+          <ASKL1plt:description>txEmphEn1</ASKL1plt:description>
+          <ASKL1plt:value>12</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>txAmpAdj</ASKL1plt:name>
+          <ASKL1plt:description>txAmpAdj</ASKL1plt:description>
+          <ASKL1plt:value>13</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>slewCtrlEn</ASKL1plt:name>
+          <ASKL1plt:description>slewCtrlEn</ASKL1plt:description>
+          <ASKL1plt:value>14</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>slewRate</ASKL1plt:name>
+          <ASKL1plt:description>slewRate</ASKL1plt:description>
+          <ASKL1plt:value>15</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>rx-param-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Rx parameter type</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>sqlch</ASKL1plt:name>
+          <ASKL1plt:description>sqlch</ASKL1plt:description>
+          <ASKL1plt:value>0</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>DC</ASKL1plt:name>
+          <ASKL1plt:description>DC</ASKL1plt:description>
+          <ASKL1plt:value>1</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>LF</ASKL1plt:name>
+          <ASKL1plt:description>LF</ASKL1plt:description>
+          <ASKL1plt:value>2</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>HF</ASKL1plt:name>
+          <ASKL1plt:description>HF</ASKL1plt:description>
+          <ASKL1plt:value>3</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>gainShape1</ASKL1plt:name>
+          <ASKL1plt:description>gainShape1</ASKL1plt:description>
+          <ASKL1plt:value>4</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>gainShape2</ASKL1plt:name>
+          <ASKL1plt:description>gainShape2</ASKL1plt:description>
+          <ASKL1plt:value>5</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>shortChannelEn</ASKL1plt:name>
+          <ASKL1plt:description>shortChannelEn</ASKL1plt:description>
+          <ASKL1plt:value>7</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>bfLf</ASKL1plt:name>
+          <ASKL1plt:description>bfLf</ASKL1plt:description>
+          <ASKL1plt:value>8</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>bfHf</ASKL1plt:name>
+          <ASKL1plt:description>bfHf</ASKL1plt:description>
+          <ASKL1plt:value>9</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>minLf</ASKL1plt:name>
+          <ASKL1plt:description>minLf</ASKL1plt:description>
+          <ASKL1plt:value>10</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>maxLf</ASKL1plt:name>
+          <ASKL1plt:description>maxLf</ASKL1plt:description>
+          <ASKL1plt:value>11</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>minHf</ASKL1plt:name>
+          <ASKL1plt:description>minHf</ASKL1plt:description>
+          <ASKL1plt:value>12</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>maxHf</ASKL1plt:name>
+          <ASKL1plt:description>maxHf</ASKL1plt:description>
+          <ASKL1plt:value>13</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>minPre1</ASKL1plt:name>
+          <ASKL1plt:description>minPre1</ASKL1plt:description>
+          <ASKL1plt:value>14</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>maxPre1</ASKL1plt:name>
+          <ASKL1plt:description>maxPre1</ASKL1plt:description>
+          <ASKL1plt:value>15</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>minPre2</ASKL1plt:name>
+          <ASKL1plt:description>minPre2</ASKL1plt:description>
+          <ASKL1plt:value>16</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>maxPre2</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>17</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>minPost</ASKL1plt:name>
+          <ASKL1plt:description>minPost</ASKL1plt:description>
+          <ASKL1plt:value>18</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>maxPost</ASKL1plt:name>
+          <ASKL1plt:description>maxPost</ASKL1plt:description>
+          <ASKL1plt:value>19</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>squelch</ASKL1plt:name>
+          <ASKL1plt:description>squelch</ASKL1plt:description>
+          <ASKL1plt:value>20</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>termination</ASKL1plt:name>
+          <ASKL1plt:description>termination</ASKL1plt:description>
+          <ASKL1plt:value>27</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>coldEnvelope</ASKL1plt:name>
+          <ASKL1plt:description>coldEnvelope</ASKL1plt:description>
+          <ASKL1plt:value>35</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>hotEnvelope</ASKL1plt:name>
+          <ASKL1plt:description>hotEnvelope</ASKL1plt:description>
+          <ASKL1plt:value>36</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>dcGain</ASKL1plt:name>
+          <ASKL1plt:description>dcGain</ASKL1plt:description>
+          <ASKL1plt:value>37</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>bandWidth</ASKL1plt:name>
+          <ASKL1plt:description>bandWidth</ASKL1plt:description>
+          <ASKL1plt:value>38</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>dfe</ASKL1plt:name>
+          <ASKL1plt:description>dfe</ASKL1plt:description>
+          <ASKL1plt:value>39</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>ffeR</ASKL1plt:name>
+          <ASKL1plt:description>ffeR</ASKL1plt:description>
+          <ASKL1plt:value>40</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>ffeC</ASKL1plt:name>
+          <ASKL1plt:description>ffeC</ASKL1plt:description>
+          <ASKL1plt:value>41</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>sampler</ASKL1plt:name>
+          <ASKL1plt:description>sampler</ASKL1plt:description>
+          <ASKL1plt:value>42</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>align90</ASKL1plt:name>
+          <ASKL1plt:description>align90</ASKL1plt:description>
+          <ASKL1plt:value>43</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>ffeS</ASKL1plt:name>
+          <ASKL1plt:description>ffeS</ASKL1plt:description>
+          <ASKL1plt:value>44</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>resSel</ASKL1plt:name>
+          <ASKL1plt:description>resSel</ASKL1plt:description>
+          <ASKL1plt:value>45</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>resShift</ASKL1plt:name>
+          <ASKL1plt:description>resShift</ASKL1plt:description>
+          <ASKL1plt:value>46</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>capSel</ASKL1plt:name>
+          <ASKL1plt:description>capSel</ASKL1plt:description>
+          <ASKL1plt:value>47</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>ffeSettingForce</ASKL1plt:name>
+          <ASKL1plt:description>ffeSettingForce</ASKL1plt:description>
+          <ASKL1plt:value>48</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>adaptedResSel</ASKL1plt:name>
+          <ASKL1plt:description>adaptedResSel</ASKL1plt:description>
+          <ASKL1plt:value>49</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>adaptedCapSel</ASKL1plt:name>
+          <ASKL1plt:description>adaptedCapSel</ASKL1plt:description>
+          <ASKL1plt:value>50</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>selmufi</ASKL1plt:name>
+          <ASKL1plt:description>selmufi</ASKL1plt:description>
+          <ASKL1plt:value>51</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>selmuff</ASKL1plt:name>
+          <ASKL1plt:description>selmuff</ASKL1plt:description>
+          <ASKL1plt:value>52</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>selmupi</ASKL1plt:name>
+          <ASKL1plt:description>selmupi</ASKL1plt:description>
+          <ASKL1plt:value>53</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>selmupf</ASKL1plt:name>
+          <ASKL1plt:description>selmupf</ASKL1plt:description>
+          <ASKL1plt:value>54</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>slewRateCtrl0</ASKL1plt:name>
+          <ASKL1plt:description>slewRateCtrl0</ASKL1plt:description>
+          <ASKL1plt:value>55</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>slewRateCtrl1</ASKL1plt:name>
+          <ASKL1plt:description>slewRateCtrl1</ASKL1plt:description>
+          <ASKL1plt:value>56</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>EO</ASKL1plt:name>
+          <ASKL1plt:description>EO</ASKL1plt:description>
+          <ASKL1plt:value>57</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>dataRate</ASKL1plt:name>
+          <ASKL1plt:description>dataRate</ASKL1plt:description>
+          <ASKL1plt:value>58</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>res1Sel</ASKL1plt:name>
+          <ASKL1plt:description>res1Sel</ASKL1plt:description>
+          <ASKL1plt:value>59</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>res2Sel</ASKL1plt:name>
+          <ASKL1plt:description>res2Sel</ASKL1plt:description>
+          <ASKL1plt:value>60</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>cap1Sel</ASKL1plt:name>
+          <ASKL1plt:description>cap1Sel</ASKL1plt:description>
+          <ASKL1plt:value>61</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>cap2Sel</ASKL1plt:name>
+          <ASKL1plt:description>cap2Sel</ASKL1plt:description>
+          <ASKL1plt:value>62</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>midpointLargeThresKLane</ASKL1plt:name>
+          <ASKL1plt:description>midpointLargeThresKLane</ASKL1plt:description>
+          <ASKL1plt:value>63</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>midpointSmallThresKLane</ASKL1plt:name>
+          <ASKL1plt:description>midpointSmallThresKLane</ASKL1plt:description>
+          <ASKL1plt:value>64</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>midpointLargeThresCLane</ASKL1plt:name>
+          <ASKL1plt:description>midpointLargeThresCLane</ASKL1plt:description>
+          <ASKL1plt:value>65</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>midpointSmallThresCLane</ASKL1plt:name>
+          <ASKL1plt:description>midpointSmallThresCLane</ASKL1plt:description>
+          <ASKL1plt:value>66</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>dfeResF0aHighThresInitLane</ASKL1plt:name>
+          <ASKL1plt:description>dfeResF0aHighThresInitLane</ASKL1plt:description>
+          <ASKL1plt:value>67</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>dfeResF0aHighThresEndLane</ASKL1plt:name>
+          <ASKL1plt:description>dfeResF0aHighThresEndLane</ASKL1plt:description>
+          <ASKL1plt:value>68</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>current1Sel</ASKL1plt:name>
+          <ASKL1plt:description>current1Sel</ASKL1plt:description>
+          <ASKL1plt:value>69</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rl1Sel</ASKL1plt:name>
+          <ASKL1plt:description>rl1Sel</ASKL1plt:description>
+          <ASKL1plt:value>70</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rl1Extra</ASKL1plt:name>
+          <ASKL1plt:description>rl1Extra</ASKL1plt:description>
+          <ASKL1plt:value>71</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>cl1Ctrl</ASKL1plt:name>
+          <ASKL1plt:description>cl1Ctrl</ASKL1plt:description>
+          <ASKL1plt:value>72</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>enMidFreq</ASKL1plt:name>
+          <ASKL1plt:description>enMidFreq</ASKL1plt:description>
+          <ASKL1plt:value>73</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>cs1Mid</ASKL1plt:name>
+          <ASKL1plt:description>cs1Mid</ASKL1plt:description>
+          <ASKL1plt:value>74</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rs1Mid</ASKL1plt:name>
+          <ASKL1plt:description>rs1Mid</ASKL1plt:description>
+          <ASKL1plt:value>75</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rfCtrl</ASKL1plt:name>
+          <ASKL1plt:description>rfCtrl</ASKL1plt:description>
+          <ASKL1plt:value>76</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rl1TiaSel</ASKL1plt:name>
+          <ASKL1plt:description>rl1TiaSel</ASKL1plt:description>
+          <ASKL1plt:value>77</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rl1TiaExtra</ASKL1plt:name>
+          <ASKL1plt:description>rl1TiaExtra</ASKL1plt:description>
+          <ASKL1plt:value>78</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>hpfRSel1st</ASKL1plt:name>
+          <ASKL1plt:description>hpfRSel1st</ASKL1plt:description>
+          <ASKL1plt:value>79</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>current1TiaSel</ASKL1plt:name>
+          <ASKL1plt:description>current1TiaSel</ASKL1plt:description>
+          <ASKL1plt:value>80</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rl2Tune</ASKL1plt:name>
+          <ASKL1plt:description>rl2Tune</ASKL1plt:description>
+          <ASKL1plt:value>81</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rl2Sel</ASKL1plt:name>
+          <ASKL1plt:description>rl2Sel</ASKL1plt:description>
+          <ASKL1plt:value>82</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rs2Sel</ASKL1plt:name>
+          <ASKL1plt:description>rs2Sel</ASKL1plt:description>
+          <ASKL1plt:value>83</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>current2Sel</ASKL1plt:name>
+          <ASKL1plt:description>current2Sel</ASKL1plt:description>
+          <ASKL1plt:value>84</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>hpfRsel2nd</ASKL1plt:name>
+          <ASKL1plt:description>hpfRsel2nd</ASKL1plt:description>
+          <ASKL1plt:value>85</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>BW</ASKL1plt:name>
+          <ASKL1plt:description>BW</ASKL1plt:description>
+          <ASKL1plt:value>86</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>dfeGAIN</ASKL1plt:name>
+          <ASKL1plt:description>dfeGAIN</ASKL1plt:description>
+          <ASKL1plt:value>87</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>dfeGAIN2</ASKL1plt:name>
+          <ASKL1plt:description>dfeGAIN2</ASKL1plt:description>
+          <ASKL1plt:value>88</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>pre1</ASKL1plt:name>
+          <ASKL1plt:description>pre1</ASKL1plt:description>
+          <ASKL1plt:value>89</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>pre2</ASKL1plt:name>
+          <ASKL1plt:description>pre2</ASKL1plt:description>
+          <ASKL1plt:value>90</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>post1</ASKL1plt:name>
+          <ASKL1plt:description>post1</ASKL1plt:description>
+          <ASKL1plt:value>91</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>boolean-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Boolean 32 bits , due to bing endian</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>false</ASKL1plt:name>
+          <ASKL1plt:description>False</ASKL1plt:description>
+          <ASKL1plt:value>0</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>true</ASKL1plt:name>
+          <ASKL1plt:description>True</ASKL1plt:description>
+          <ASKL1plt:value>1</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>serdes-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Serdes Type</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>NA</ASKL1plt:name>
+          <ASKL1plt:description>No serdes</ASKL1plt:description>
+          <ASKL1plt:value>0</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>AVAGO</ASKL1plt:name>
+          <ASKL1plt:description>AVAGO</ASKL1plt:description>
+          <ASKL1plt:value>1</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>COMPHY</ASKL1plt:name>
+          <ASKL1plt:description>COMPHY</ASKL1plt:description>
+          <ASKL1plt:value>2</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>COMPHY_C12G</ASKL1plt:name>
+          <ASKL1plt:description>COMPHY_C12G</ASKL1plt:description>
+          <ASKL1plt:value>3</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>COMPHY_C28G</ASKL1plt:name>
+          <ASKL1plt:description>COMPHY_C28G</ASKL1plt:description>
+          <ASKL1plt:value>4</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>COMPHY_C112G</ASKL1plt:name>
+          <ASKL1plt:description>COMPHY_C112G</ASKL1plt:description>
+          <ASKL1plt:value>5</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>uint8-type</ASKL1plt:name>
+        <ASKL1plt:type>uint32</ASKL1plt:type>
+        <ASKL1plt:description>Uint8 32 bits , due to bing endian</ASKL1plt:description>
+        <ASKL1plt:min>0</ASKL1plt:min>
+        <ASKL1plt:max>255</ASKL1plt:max>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>serdes-termination-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>RX termination mode</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>GND</ASKL1plt:name>
+          <ASKL1plt:description>Enabled</ASKL1plt:description>
+          <ASKL1plt:value>0</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>VDD</ASKL1plt:name>
+          <ASKL1plt:description>Disabled</ASKL1plt:description>
+          <ASKL1plt:value>1</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>FLOATING</ASKL1plt:name>
+          <ASKL1plt:description>RS FEC enabled</ASKL1plt:description>
+          <ASKL1plt:value>2</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>port-interconnect-profile-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Enumerator of interconnect profile.</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>profile_default</ASKL1plt:name>
+          <ASKL1plt:description>Profile Default</ASKL1plt:description>
+          <ASKL1plt:value>0</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>profile_1</ASKL1plt:name>
+          <ASKL1plt:description>Profile 1</ASKL1plt:description>
+          <ASKL1plt:value>1</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>profile_2</ASKL1plt:name>
+          <ASKL1plt:description>Profile 2</ASKL1plt:description>
+          <ASKL1plt:value>2</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+    </ASKL1plt:typedefs>
+    <ASKL1plt:IfModeName>
+      <ASKL1plt:ifModeNameList>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:ifModeName>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">CR4</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">100G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">KR4</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">100G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">SR_LR4</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">100G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">CR4</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">100G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">KR4</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">100G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+      </ASKL1plt:ifModeNameList>
+      <ASKL1plt:ifModeNameList>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">10GR1Fix</ASKL1plt:ifModeName>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">KR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">10G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">disabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+      </ASKL1plt:ifModeNameList>
+      <ASKL1plt:ifModeNameList>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">CR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">25G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">KR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">25G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">KR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">10G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">SR_LR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">25G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">SR_LR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">10G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">CR</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">25G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">KR</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">25G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">KR</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">10G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+      </ASKL1plt:ifModeNameList>
+    </ASKL1plt:IfModeName>
+    <ASKL1plt:Port>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">0</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">1</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">2</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">3</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">4</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">5</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">6</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">7</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">8</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">9</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">10</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">11</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">12</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">13</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">14</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">15</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">16</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">17</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">18</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">19</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">20</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">21</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">22</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">23</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">24</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">25</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">26</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">27</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">28</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">29</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">30</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">31</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">32</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">33</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">34</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">35</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">36</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">37</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">38</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">39</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">40</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">41</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">42</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">43</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">44</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">45</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">46</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">47</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">48</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">49</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">50</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">51</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">52</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">53</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">54</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">55</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">56</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">10GR1Fix</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">57</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">10GR1Fix</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+    </ASKL1plt:Port>
+  </ASKL1plt:ASK-L1>
+</data>
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/F2T48x25G8x100G/ASK-PP-F2T_48x25G-8x100G.md5 b/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/F2T48x25G8x100G/ASK-PP-F2T_48x25G-8x100G.md5
new file mode 100644
index 000000000..92fc07b50
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/F2T48x25G8x100G/ASK-PP-F2T_48x25G-8x100G.md5
@@ -0,0 +1 @@
+72ea1b2a8dd25f7d1584a05b11c1ae0b
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/F2T48x25G8x100G/ASK-PP-F2T_48x25G-8x100G.xml b/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/F2T48x25G8x100G/ASK-PP-F2T_48x25G-8x100G.xml
new file mode 100644
index 000000000..288006a4a
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/F2T48x25G8x100G/ASK-PP-F2T_48x25G-8x100G.xml
@@ -0,0 +1,1180 @@
+<?xml version="1.0" encoding="utf-8"?>
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-02-19-1.06" profile="Askpp" sid="34f1c14a-b581-422d-bd10-426dfac013dd">
+  <askppplt:ASK-PP xmlns:askppplt="urn:marvell:askpp:yang">
+    <askppplt:typedefs>
+      <askppplt:typedef>
+        <askppplt:name>std-string</askppplt:name>
+        <askppplt:type>string</askppplt:type>
+        <askppplt:description>standard string.</askppplt:description>
+        <askppplt:min>1</askppplt:min>
+        <askppplt:max>100</askppplt:max>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>queue-id-type</askppplt:name>
+        <askppplt:type>uint32</askppplt:type>
+        <askppplt:description>Queue id</askppplt:description>
+        <askppplt:min>0</askppplt:min>
+        <askppplt:max>7</askppplt:max>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>precent-type</askppplt:name>
+        <askppplt:type>uint32</askppplt:type>
+        <askppplt:description>Precent</askppplt:description>
+        <askppplt:min>0</askppplt:min>
+        <askppplt:max>100</askppplt:max>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>phaThreadId-type</askppplt:name>
+        <askppplt:type>uint32</askppplt:type>
+        <askppplt:description>Thread id</askppplt:description>
+        <askppplt:min>1</askppplt:min>
+        <askppplt:max>255</askppplt:max>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>routing-mode-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies routing mode.</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>POLICY_BASED_ROUTING_ONLY</askppplt:name>
+          <askppplt:description>PBR only</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>TCAM_ROUTER_BASED</askppplt:name>
+          <askppplt:description>Router engine or PBR</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>shared-table-mode-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies table sharing modes for L3 (LPM), L2 (FDB), EM (Exact Match)</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>MID_L3_MID_L2_NO_EM</askppplt:name>
+          <askppplt:description>MID_L3_MID_L2_NO_EM</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>MID_L3_MID_L2_MIN_EM</askppplt:name>
+          <askppplt:description>MID_L3_MID_L2_MIN_EM</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>LOW_MAX_L3_MID_LOW_L2_NO_EM</askppplt:name>
+          <askppplt:description>LOW_MAX_L3_MID_LOW_L2_NO_EM</askppplt:description>
+          <askppplt:value>2</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>MAX_L3_MIN_L2_NO_EM</askppplt:name>
+          <askppplt:description>MAX_L3_MIN_L2_NO_EM</askppplt:description>
+          <askppplt:value>3</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>pha-firmware-image-id-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies supported Pha image id</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>DEFAULT</askppplt:name>
+          <askppplt:description>Default PHA firmware image ID</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>01</askppplt:name>
+          <askppplt:description>01 firmware image ID</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>02</askppplt:name>
+          <askppplt:description>02 PHA firmware image ID</askppplt:description>
+          <askppplt:value>2</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>pha-firmware-thread-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies supported Pha thread type</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>IOAM_INGRESS_SWITCH_IPV4</askppplt:name>
+          <askppplt:description>IOAM_INGRESS_SWITCH_IPV4</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>IOAM_INGRESS_SWITCH_IPV6</askppplt:name>
+          <askppplt:description>IOAM_INGRESS_SWITCH_IPV6</askppplt:description>
+          <askppplt:value>2</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>IOAM_TRANSIT_SWITCH_IPV4</askppplt:name>
+          <askppplt:description>IOAM_TRANSIT_SWITCH_IPV4</askppplt:description>
+          <askppplt:value>3</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>IOAM_TRANSIT_SWITCH_IPV6</askppplt:name>
+          <askppplt:description>IOAM_TRANSIT_SWITCH_IPV6</askppplt:description>
+          <askppplt:value>4</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>INT_IOAM_MIRRORING</askppplt:name>
+          <askppplt:description>INT_IOAM_MIRRORING</askppplt:description>
+          <askppplt:value>5</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>INT_IOAM_EGRESS_SWITCH</askppplt:name>
+          <askppplt:description>INT_IOAM_EGRESS_SWITCH</askppplt:description>
+          <askppplt:value>6</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>MPLS_SR_NO_EL</askppplt:name>
+          <askppplt:description>MPLS_SR_NO_EL</askppplt:description>
+          <askppplt:value>7</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>MPLS_SR_ONE_EL</askppplt:name>
+          <askppplt:description>MPLS_SR_ONE_EL</askppplt:description>
+          <askppplt:value>8</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>MPLS_SR_TWO_EL</askppplt:name>
+          <askppplt:description>MPLS_SR_TWO_EL</askppplt:description>
+          <askppplt:value>9</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>MPLS_SR_THREE_EL</askppplt:name>
+          <askppplt:description>MPLS_SR_THREE_EL</askppplt:description>
+          <askppplt:value>10</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>UNIFIED_SR</askppplt:name>
+          <askppplt:description>UNIFIED_SR</askppplt:description>
+          <askppplt:value>11</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>CLASSIFIER_NSH_OVER_ETHERNET</askppplt:name>
+          <askppplt:description>CLASSIFIER_NSH_OVER_ETHERNET</askppplt:description>
+          <askppplt:value>12</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>CLASSIFIER_NSH_OVER_VXLAN_GPE</askppplt:name>
+          <askppplt:description>CLASSIFIER_NSH_OVER_VXLAN_GPE</askppplt:description>
+          <askppplt:value>13</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SFF_NSH_VXLAN_GPE_TO_ETHERNET</askppplt:name>
+          <askppplt:description>SFF_NSH_VXLAN_GPE_TO_ETHERNET</askppplt:description>
+          <askppplt:value>14</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SFF_NSH_ETHERNET_TO_VXLAN_GPE</askppplt:name>
+          <askppplt:description>SFF_NSH_ETHERNET_TO_VXLAN_GPE</askppplt:description>
+          <askppplt:value>15</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>IOAM_EGRESS_SWITCH_IPV6</askppplt:name>
+          <askppplt:description>IOAM_EGRESS_SWITCH_IPV6</askppplt:description>
+          <askppplt:value>16</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_END_NODE</askppplt:name>
+          <askppplt:description>SRV6_END_NODE</askppplt:description>
+          <askppplt:value>17</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_PENULTIMATE_END_NODE</askppplt:name>
+          <askppplt:description>SRV6_PENULTIMATE_END_NODE</askppplt:description>
+          <askppplt:value>18</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_SRC_NODE_1_SEGMENT</askppplt:name>
+          <askppplt:description>SRV6_SRC_NODE_1_SEGMENT</askppplt:description>
+          <askppplt:value>19</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_SRC_NODE_FIRST_PASS_2_3_SEGMENTS</askppplt:name>
+          <askppplt:description>SRV6_SRC_NODE_FIRST_PASS_2_3_SEGMENTS</askppplt:description>
+          <askppplt:value>20</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_SRC_NODE_SECOND_PASS_3_SEGMENTS</askppplt:name>
+          <askppplt:description>SRV6_SRC_NODE_SECOND_PASS_3_SEGMENTS</askppplt:description>
+          <askppplt:value>21</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_SRC_NODE_SECOND_PASS_2_SEGMENTS</askppplt:name>
+          <askppplt:description>SRV6_SRC_NODE_SECOND_PASS_2_SEGMENTS</askppplt:description>
+          <askppplt:value>22</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_NETWORK_ADD_MSB</askppplt:name>
+          <askppplt:description>SGT_NETWORK_ADD_MSB</askppplt:description>
+          <askppplt:value>23</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_NETWORK_FIX</askppplt:name>
+          <askppplt:description>SGT_NETWORK_FIX</askppplt:description>
+          <askppplt:value>24</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_NETWORK_REMOVE</askppplt:name>
+          <askppplt:description>SGT_NETWORK_REMOVE</askppplt:description>
+          <askppplt:value>25</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_EDSA_FIX</askppplt:name>
+          <askppplt:description>SGT_EDSA_FIX</askppplt:description>
+          <askppplt:value>26</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_EDSA_REMOVE</askppplt:name>
+          <askppplt:description>SGT_EDSA_REMOVE</askppplt:description>
+          <askppplt:value>27</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_GBP_FIX_IPV4</askppplt:name>
+          <askppplt:description>SGT_GBP_FIX_IPV4</askppplt:description>
+          <askppplt:value>28</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_GBP_FIX_IPV6</askppplt:name>
+          <askppplt:description>SGT_GBP_FIX_IPV6</askppplt:description>
+          <askppplt:value>29</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_GBP_REMOVE_IPV4</askppplt:name>
+          <askppplt:description>SGT_GBP_REMOVE_IPV4</askppplt:description>
+          <askppplt:value>30</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_GBP_REMOVE_IPV6</askppplt:name>
+          <askppplt:description>SGT_GBP_REMOVE_IPV6</askppplt:description>
+          <askppplt:value>31</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>PTP_PHY_1_STEP</askppplt:name>
+          <askppplt:description>PTP_PHY_1_STEP</askppplt:description>
+          <askppplt:value>32</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>EGRESS_MIRRORING_METADATA</askppplt:name>
+          <askppplt:description>EGRESS_MIRRORING_METADATA</askppplt:description>
+          <askppplt:value>33</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>CC_ERSPAN_TYPE_II_TRG_DEV_LC_IPV4</askppplt:name>
+          <askppplt:description>CC_ERSPAN_TYPE_II_TRG_DEV_LC_IPV4</askppplt:description>
+          <askppplt:value>34</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>CC_ERSPAN_TYPE_II_TRG_DEV_LC_IPV6</askppplt:name>
+          <askppplt:description>CC_ERSPAN_TYPE_II_TRG_DEV_LC_IPV6</askppplt:description>
+          <askppplt:value>35</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>CC_ERSPAN_TYPE_II_TRG_DEV_DIRECT_IPV4</askppplt:name>
+          <askppplt:description>CC_ERSPAN_TYPE_II_TRG_DEV_DIRECT_IPV4</askppplt:description>
+          <askppplt:value>36</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>CC_ERSPAN_TYPE_II_TRG_DEV_DIRECT_IPV6</askppplt:name>
+          <askppplt:description>CC_ERSPAN_TYPE_II_TRG_DEV_DIRECT_IPV6</askppplt:description>
+          <askppplt:value>37</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>CC_ERSPAN_TYPE_II_SRC_DEV</askppplt:name>
+          <askppplt:description>CC_ERSPAN_TYPE_II_SRC_DEV</askppplt:description>
+          <askppplt:value>38</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>VXLAN_GBP_SOURCE_GROUP_POLICY_ID</askppplt:name>
+          <askppplt:description>VXLAN_GBP_SOURCE_GROUP_POLICY_ID</askppplt:description>
+          <askppplt:value>39</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_BEST_EFFORT</askppplt:name>
+          <askppplt:description>SRV6_BEST_EFFORT</askppplt:description>
+          <askppplt:value>40</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_SRC_NODE_1_CONTAINER</askppplt:name>
+          <askppplt:description>SRV6_SRC_NODE_1_CONTAINER</askppplt:description>
+          <askppplt:value>41</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_SRC_NODE_FIRST_PASS_2_3_CONTAINERS</askppplt:name>
+          <askppplt:description>SRV6_SRC_NODE_FIRST_PASS_2_3_CONTAINERS</askppplt:description>
+          <askppplt:value>42</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_SRC_NODE_SECOND_PASS_2_CONTAINERS</askppplt:name>
+          <askppplt:description>SRV6_SRC_NODE_SECOND_PASS_2_CONTAINERS</askppplt:description>
+          <askppplt:value>43</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_SRC_NODE_SECOND_PASS_3_CONTAINERS</askppplt:name>
+          <askppplt:description>SRV6_SRC_NODE_SECOND_PASS_3_CONTAINERS</askppplt:description>
+          <askppplt:value>44</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_END_NODE_COC32_GSID</askppplt:name>
+          <askppplt:description>SRV6_END_NODE_COC32_GSID</askppplt:description>
+          <askppplt:value>45</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>IPV4_TTL_INCREMENT</askppplt:name>
+          <askppplt:description>IPV4_TTL_INCREMENT</askppplt:description>
+          <askppplt:value>46</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>IPV6_HOP_LIMIT_INCREMENT</askppplt:name>
+          <askppplt:description>IPV6_HOP_LIMIT_INCREMENT</askppplt:description>
+          <askppplt:value>47</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>CLEAR_OUTGOING_MTAG_COMMAND</askppplt:name>
+          <askppplt:description>CLEAR_OUTGOING_MTAG_COMMAND</askppplt:description>
+          <askppplt:value>48</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SFLOW_V5_IPV4</askppplt:name>
+          <askppplt:description>SFLOW_V5_IPV4</askppplt:description>
+          <askppplt:value>49</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SFLOW_V5_IPV6</askppplt:name>
+          <askppplt:description>SFLOW_V5_IPV6</askppplt:description>
+          <askppplt:value>50</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SLS</askppplt:name>
+          <askppplt:description>SLS</askppplt:description>
+          <askppplt:value>51</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>trunk-member-mode-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies supported Pha image id</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>NATIVE</askppplt:name>
+          <askppplt:description>NATIVE
+*  the trunk members are filled
+*  according to the order given by application.
+*  Regular trunk may hold max of 8 members.
+*  Cascade trunk may hold :
+*  max of 64 members</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>FLEX</askppplt:name>
+          <askppplt:description>FLEX
+*  A mode to allows flexibility for
+*  each Regular trunk to state it's max number of members (before starting to add members).
+*  (this mode not effect 'cascade trunk' members)
+*  Regular trunk may hold : max of 4K members. (each trunk set it's own limit)
+*  Cascade trunk may hold : max of 64 members.</askppplt:description>
+          <askppplt:value>2</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>number-physical-port-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>AC3X/AC5X 128, falcon 64, 128, 256, 512, 1024</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>no-ports</askppplt:name>
+          <askppplt:description>no-ports</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>64-ports</askppplt:name>
+          <askppplt:description>64-ports</askppplt:description>
+          <askppplt:value>64</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>128-ports</askppplt:name>
+          <askppplt:description>128-ports</askppplt:description>
+          <askppplt:value>128</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>256-ports</askppplt:name>
+          <askppplt:description>256-ports</askppplt:description>
+          <askppplt:value>256</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>512-ports</askppplt:name>
+          <askppplt:description>512-ports</askppplt:description>
+          <askppplt:value>512</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>1024-ports</askppplt:name>
+          <askppplt:description>1024-ports</askppplt:description>
+          <askppplt:value>1024</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>serdes-ref-clock-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies serdes refernce clock.</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>external_25_single_ended</askppplt:name>
+          <askppplt:description>EXTERNAL_25_SINGLE_ENDED</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>external_125_single_ended</askppplt:name>
+          <askppplt:description>EXTERNAL_125_SINGLE_ENDED</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>external_125_diff</askppplt:name>
+          <askppplt:description>EXTERNAL_125_DIFF</askppplt:description>
+          <askppplt:value>2</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>external_156_25_single_ended</askppplt:name>
+          <askppplt:description>EXTERNAL_156_25_SINGLE_ENDED</askppplt:description>
+          <askppplt:value>3</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>external_156_25_diff</askppplt:name>
+          <askppplt:description>EXTERNAL_156_25_DIFF</askppplt:description>
+          <askppplt:value>4</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>internal_125</askppplt:name>
+          <askppplt:description>INTERNAL_125</askppplt:description>
+          <askppplt:value>5</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>cpu-port-id-type</askppplt:name>
+        <askppplt:type>uint32</askppplt:type>
+        <askppplt:description>CPU port id</askppplt:description>
+        <askppplt:min>0</askppplt:min>
+        <askppplt:max>7</askppplt:max>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>rx-buffer-size-type</askppplt:name>
+        <askppplt:type>uint32</askppplt:type>
+        <askppplt:description>Rx Buffer size</askppplt:description>
+        <askppplt:min>64</askppplt:min>
+        <askppplt:max>10240</askppplt:max>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>tx-sdma-queue-mode-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies TX queue mode.</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>Normal</askppplt:name>
+          <askppplt:description>Application</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>Packet_Generator</askppplt:name>
+          <askppplt:description>Traffic generator</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>alloc-method-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies Buffers allocation method.</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>Dynamic_Alloc</askppplt:name>
+          <askppplt:description>Dynamic</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>Static_Alloc</askppplt:name>
+          <askppplt:description>Static</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>au_mesage_lenght-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies Buffers allocation method.</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>4_words</askppplt:name>
+          <askppplt:description>4 Words</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>8_words</askppplt:name>
+          <askppplt:description>8 Words</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>boolean-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Boolean 32 bits , due to bing endian</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>false</askppplt:name>
+          <askppplt:description>False</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>true</askppplt:name>
+          <askppplt:description>True</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>asic-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>ASIC Type</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>ASIC_AC3X</askppplt:name>
+          <askppplt:description>AC3X</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>ASIC_AC5X</askppplt:name>
+          <askppplt:description>AC5X</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>ASIC_Falcon</askppplt:name>
+          <askppplt:description>FALCON</askppplt:description>
+          <askppplt:value>2</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+    </askppplt:typedefs>
+    <askppplt:ASIC_Type askppplt:type="asic-type">ASIC_Falcon</askppplt:ASIC_Type>
+    <askppplt:PPInit>
+      <askppplt:PP-name askppplt:type="std-string">Falcon-2</askppplt:PP-name>
+      <askppplt:Phase1>
+        <askppplt:coreClock askppplt:type="uint32">4294967295</askppplt:coreClock>
+        <askppplt:serdesRefClock askppplt:type="serdes-ref-clock-type">external_25_single_ended</askppplt:serdesRefClock>
+        <askppplt:isrAddrCompletionRegionsBmp askppplt:type="uint32">2</askppplt:isrAddrCompletionRegionsBmp>
+        <askppplt:appAddrCompletionRegionsBmp askppplt:type="uint32">60</askppplt:appAddrCompletionRegionsBmp>
+        <askppplt:maxNumOfPhyPortsToUse askppplt:type="number-physical-port-type">64-ports</askppplt:maxNumOfPhyPortsToUse>
+        <askppplt:tcamParityCalcEnable askppplt:type="boolean-type">false</askppplt:tcamParityCalcEnable>
+        <askppplt:apEnable askppplt:type="boolean-type">true</askppplt:apEnable>
+        <askppplt:numOfDataIntegrityElements askppplt:type="uint32">0</askppplt:numOfDataIntegrityElements>
+      </askppplt:Phase1>
+      <askppplt:Phase2>
+        <askppplt:useMultiNetIfSdma askppplt:type="boolean-type">true</askppplt:useMultiNetIfSdma>
+        <askppplt:auqCfg>
+          <askppplt:auDescNum askppplt:type="uint32">4096</askppplt:auDescNum>
+        </askppplt:auqCfg>
+        <askppplt:fuqCfg>
+          <askppplt:fuDescNum askppplt:type="uint32">2048</askppplt:fuDescNum>
+        </askppplt:fuqCfg>
+        <askppplt:multiNetIfCfg>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">0</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">7</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">6</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">5</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">4</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">3</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">2</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">1</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">0</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">7</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">6</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">5</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">4</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">3</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">2</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">1</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">0</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">7</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">6</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">5</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">4</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">3</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">2</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">1</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">0</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">7</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">6</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">5</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">4</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">3</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">2</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">1</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">0</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">1</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">2</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">3</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">4</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">5</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">6</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">7</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">0</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">1</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">2</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">3</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">4</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">5</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">6</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">7</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">0</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">1</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">2</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">3</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">4</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">5</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">6</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">7</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">0</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">1</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">2</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">3</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">4</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">5</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">6</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Packet_Generator</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">256</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">256</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">144</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">7</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Packet_Generator</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">1</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">1</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">3032</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+        </askppplt:multiNetIfCfg>
+        <askppplt:internal>
+          <askppplt:fuqUseSeparate askppplt:type="boolean-type">false</askppplt:fuqUseSeparate>
+          <askppplt:useSecondaryAuq askppplt:type="boolean-type">false</askppplt:useSecondaryAuq>
+          <askppplt:noTraffic2CPU askppplt:type="boolean-type">false</askppplt:noTraffic2CPU>
+          <askppplt:netifSdmaPortGroupId askppplt:type="uint32">0</askppplt:netifSdmaPortGroupId>
+          <askppplt:auMessageLength askppplt:type="au_mesage_lenght-type">8_words</askppplt:auMessageLength>
+          <askppplt:useDoubleAuq askppplt:type="boolean-type">false</askppplt:useDoubleAuq>
+        </askppplt:internal>
+      </askppplt:Phase2>
+      <askppplt:LogicalInit>
+        <askppplt:routingMode askppplt:type="routing-mode-type">TCAM_ROUTER_BASED</askppplt:routingMode>
+        <askppplt:maxNumOfPbrEntries askppplt:type="uint32">0</askppplt:maxNumOfPbrEntries>
+        <askppplt:sharedTableMode askppplt:type="shared-table-mode-type">MID_L3_MID_L2_NO_EM</askppplt:sharedTableMode>
+        <askppplt:ingressDropEnable askppplt:type="boolean-type">false</askppplt:ingressDropEnable>
+      </askppplt:LogicalInit>
+      <askppplt:LibInit>
+        <askppplt:initBridge askppplt:type="boolean-type">true</askppplt:initBridge>
+        <askppplt:initMirror askppplt:type="boolean-type">true</askppplt:initMirror>
+        <askppplt:initNetIf askppplt:type="boolean-type">true</askppplt:initNetIf>
+        <askppplt:initPhy askppplt:type="boolean-type">true</askppplt:initPhy>
+        <askppplt:initPort askppplt:type="boolean-type">true</askppplt:initPort>
+        <askppplt:initTrunk askppplt:type="boolean-type">true</askppplt:initTrunk>
+        <askppplt:Trunk-params>
+          <askppplt:maxNumberOfTrunks askppplt:type="uint32">1023</askppplt:maxNumberOfTrunks>
+          <askppplt:trunkMembersMode askppplt:type="trunk-member-mode-type">FLEX</askppplt:trunkMembersMode>
+        </askppplt:Trunk-params>
+        <askppplt:initPcl askppplt:type="boolean-type">true</askppplt:initPcl>
+        <askppplt:initTcam askppplt:type="boolean-type">true</askppplt:initTcam>
+        <askppplt:initPolicer askppplt:type="boolean-type">true</askppplt:initPolicer>
+        <askppplt:initPha askppplt:type="boolean-type">true</askppplt:initPha>
+        <askppplt:Pha-params>
+          <askppplt:packetOrderChangeEnable askppplt:type="boolean-type">false</askppplt:packetOrderChangeEnable>
+          <askppplt:phaFwImageId askppplt:type="pha-firmware-image-id-type">02</askppplt:phaFwImageId>
+          <askppplt:phaFwImageIdVersion askppplt:type="uint32">0</askppplt:phaFwImageIdVersion>
+        </askppplt:Pha-params>
+      </askppplt:LibInit>
+    </askppplt:PPInit>
+  </askppplt:ASK-PP>
+</data>
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/F2T48x25G8x100G/SAI-F2T_48x25G-8x100G.md5 b/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/F2T48x25G8x100G/SAI-F2T_48x25G-8x100G.md5
new file mode 100644
index 000000000..8f24db9ff
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/F2T48x25G8x100G/SAI-F2T_48x25G-8x100G.md5
@@ -0,0 +1 @@
+cdd0dffb9811802ae6b98caa7b62b96b
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/F2T48x25G8x100G/SAI-F2T_48x25G-8x100G.xml b/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/F2T48x25G8x100G/SAI-F2T_48x25G-8x100G.xml
new file mode 100644
index 000000000..973cc465d
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/F2T48x25G8x100G/SAI-F2T_48x25G-8x100G.xml
@@ -0,0 +1,523 @@
+<?xml version="1.0" encoding="utf-8"?>
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-02-19-1.06" profile="SAI" sid="c310bbb1-ffca-4c99-9bae-f7d4caff5941">
+  <SAIplt:SAI xmlns:SAIplt="urn:marvell:SAI:yang">
+    <SAIplt:typedefs>
+      <SAIplt:typedef>
+        <SAIplt:name>device-id-type</SAIplt:name>
+        <SAIplt:type>uint32</SAIplt:type>
+        <SAIplt:description>Device ID 0..1</SAIplt:description>
+        <SAIplt:min>0</SAIplt:min>
+        <SAIplt:max>1</SAIplt:max>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>port-id-type</SAIplt:name>
+        <SAIplt:type>uint32</SAIplt:type>
+        <SAIplt:description>Interface number</SAIplt:description>
+        <SAIplt:min>0</SAIplt:min>
+        <SAIplt:max>1023</SAIplt:max>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>logDest-type</SAIplt:name>
+        <SAIplt:type>enumeration</SAIplt:type>
+        <SAIplt:description>Logging Feature Options</SAIplt:description>
+        <SAIplt:enum>
+          <SAIplt:name>SAI_LOG_SYSLOG</SAIplt:name>
+          <SAIplt:description>SYSLOG  {Syslog service should be running to use this option}</SAIplt:description>
+          <SAIplt:value>0</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>SAI_LOG_CONSOLE</SAIplt:name>
+          <SAIplt:description>CONSOLE</SAIplt:description>
+          <SAIplt:value>1</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>SAI_LOG_FILE</SAIplt:name>
+          <SAIplt:description>FILE  {Warning !!! Use with caution. Can cause disk full issues}</SAIplt:description>
+          <SAIplt:value>2</SAIplt:value>
+        </SAIplt:enum>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>InDropCounter-type</SAIplt:name>
+        <SAIplt:type>enumeration</SAIplt:type>
+        <SAIplt:description>Router In Drop Reason Feature Options</SAIplt:description>
+        <SAIplt:enum>
+          <SAIplt:name>TTL_HOPLIMIT_EXCEEDED</SAIplt:name>
+          <SAIplt:description>Router In Drop Counters track TTL &amp; Hop Limit Exceeded Packets</SAIplt:description>
+          <SAIplt:value>0</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>ROUTE_BLACKHOLE</SAIplt:name>
+          <SAIplt:description>Router In Drop Counters track Route Black Hole Packets</SAIplt:description>
+          <SAIplt:value>1</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>IN_DROP_ANY</SAIplt:name>
+          <SAIplt:description>Router In Drop Counters track either TTL &amp; Hop Limit Exceeded or Route Black Hole Packets</SAIplt:description>
+          <SAIplt:value>2</SAIplt:value>
+        </SAIplt:enum>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>log-dest-file-path-type</SAIplt:name>
+        <SAIplt:type>string</SAIplt:type>
+        <SAIplt:description>A string with path to file for logging feature</SAIplt:description>
+        <SAIplt:min>2</SAIplt:min>
+        <SAIplt:max>30</SAIplt:max>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>acl-feature-name-type</SAIplt:name>
+        <SAIplt:type>enumeration</SAIplt:type>
+        <SAIplt:description/>
+        <SAIplt:enum>
+          <SAIplt:name>port-sFlow</SAIplt:name>
+          <SAIplt:description>SFlow over Port</SAIplt:description>
+          <SAIplt:value>0</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>port-counters-ipv4-ipv6</SAIplt:name>
+          <SAIplt:description>Port ipv4/ipv6 counters</SAIplt:description>
+          <SAIplt:value>1</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>control-acl</SAIplt:name>
+          <SAIplt:description>ACLs for control packet handling</SAIplt:description>
+          <SAIplt:value>2</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>debug-counter-acl</SAIplt:name>
+          <SAIplt:description>ACLs for Debug Counters</SAIplt:description>
+          <SAIplt:value>3</SAIplt:value>
+        </SAIplt:enum>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>ingress-acl-stage-type</SAIplt:name>
+        <SAIplt:type>enumeration</SAIplt:type>
+        <SAIplt:description/>
+        <SAIplt:enum>
+          <SAIplt:name>disabled</SAIplt:name>
+          <SAIplt:description>Feature not enabled</SAIplt:description>
+          <SAIplt:value>0</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>IPCL0</SAIplt:name>
+          <SAIplt:description>Stage IPCL0</SAIplt:description>
+          <SAIplt:value>1</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>IPCL1</SAIplt:name>
+          <SAIplt:description>Stage IPCL1</SAIplt:description>
+          <SAIplt:value>2</SAIplt:value>
+        </SAIplt:enum>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>egress-acl-stage-type</SAIplt:name>
+        <SAIplt:type>enumeration</SAIplt:type>
+        <SAIplt:description/>
+        <SAIplt:enum>
+          <SAIplt:name>disabled</SAIplt:name>
+          <SAIplt:description>Feature not enabled</SAIplt:description>
+          <SAIplt:value>0</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>EPCL0</SAIplt:name>
+          <SAIplt:description>Stage EPCL0</SAIplt:description>
+          <SAIplt:value>2</SAIplt:value>
+        </SAIplt:enum>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>feature-priority-type</SAIplt:name>
+        <SAIplt:type>uint32</SAIplt:type>
+        <SAIplt:description>Feature priority</SAIplt:description>
+        <SAIplt:min>2</SAIplt:min>
+        <SAIplt:max>15</SAIplt:max>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>hit-number-type</SAIplt:name>
+        <SAIplt:type>uint32</SAIplt:type>
+        <SAIplt:description>Hit/lookup number</SAIplt:description>
+        <SAIplt:min>0</SAIplt:min>
+        <SAIplt:max>3</SAIplt:max>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>asic-type</SAIplt:name>
+        <SAIplt:type>enumeration</SAIplt:type>
+        <SAIplt:description>ASIC Type</SAIplt:description>
+        <SAIplt:enum>
+          <SAIplt:name>ASIC_AC3X</SAIplt:name>
+          <SAIplt:description>AC3X</SAIplt:description>
+          <SAIplt:value>0</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>ASIC_AC5X</SAIplt:name>
+          <SAIplt:description>AC5X</SAIplt:description>
+          <SAIplt:value>1</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>ASIC_Falcon</SAIplt:name>
+          <SAIplt:description>FALCON</SAIplt:description>
+          <SAIplt:value>2</SAIplt:value>
+        </SAIplt:enum>
+      </SAIplt:typedef>
+    </SAIplt:typedefs>
+    <SAIplt:ASIC_Type SAIplt:type="asic-type">ASIC_Falcon</SAIplt:ASIC_Type>
+    <SAIplt:ASK-BOARD-Profile-Name SAIplt:type="string">ASK-Board-F2T_48x25G-8x100G.xml</SAIplt:ASK-BOARD-Profile-Name>
+    <SAIplt:Ports>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">0</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">47</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">1</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">46</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">2</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">45</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">3</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">44</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">4</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">43</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">5</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">42</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">6</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">41</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">7</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">40</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">8</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">39</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">9</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">38</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">10</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">37</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">11</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">36</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">12</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">35</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">13</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">34</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">14</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">33</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">15</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">32</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">16</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">31</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">17</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">30</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">18</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">29</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">19</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">28</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">20</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">27</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">21</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">26</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">22</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">25</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">23</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">24</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">24</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">23</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">25</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">22</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">26</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">21</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">27</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">20</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">28</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">19</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">29</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">18</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">30</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">17</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">31</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">16</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">32</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">15</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">33</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">14</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">34</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">13</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">35</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">12</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">36</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">11</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">37</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">10</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">38</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">9</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">39</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">8</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">40</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">7</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">41</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">6</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">42</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">5</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">43</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">4</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">44</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">3</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">45</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">2</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">46</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">1</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">47</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">0</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">48</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">55</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">52</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">54</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">56</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">53</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">60</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">52</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">64</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">51</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">68</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">50</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">72</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">49</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">76</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">48</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">80</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">56</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">81</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">57</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+    </SAIplt:Ports>
+    <SAIplt:scalingFalcon>
+      <SAIplt:max_lag_members SAIplt:type="uint32">8</SAIplt:max_lag_members>
+      <SAIplt:max_route_ipv4 SAIplt:type="uint32">0</SAIplt:max_route_ipv4>
+      <SAIplt:max_route_ipv6 SAIplt:type="uint32">0</SAIplt:max_route_ipv6>
+      <SAIplt:max_Nh_Ecmp_Mbr_Per_Grp SAIplt:type="uint32">64</SAIplt:max_Nh_Ecmp_Mbr_Per_Grp>
+      <SAIplt:max_ipv4_tunnel SAIplt:type="uint32">8</SAIplt:max_ipv4_tunnel>
+      <SAIplt:max_ipv6_tunnel SAIplt:type="uint32">8</SAIplt:max_ipv6_tunnel>
+      <SAIplt:max_tti SAIplt:type="uint32">1024</SAIplt:max_tti>
+      <SAIplt:wred_size SAIplt:type="uint32">0</SAIplt:wred_size>
+      <SAIplt:max_nat SAIplt:type="uint32">0</SAIplt:max_nat>
+    </SAIplt:scalingFalcon>
+    <SAIplt:Counters>
+      <SAIplt:cnc-base-list>
+        <SAIplt:counter-base SAIplt:type="uint32">0</SAIplt:counter-base>
+      </SAIplt:cnc-base-list>
+    </SAIplt:Counters>
+    <SAIplt:Logging>
+      <SAIplt:log_dest SAIplt:type="logDest-type">SAI_LOG_SYSLOG</SAIplt:log_dest>
+    </SAIplt:Logging>
+    <SAIplt:Features-using-acl>
+      <SAIplt:feature SAIplt:type="acl-feature-name-type">control-acl</SAIplt:feature>
+      <SAIplt:feature-priority SAIplt:type="feature-priority-type">3</SAIplt:feature-priority>
+      <SAIplt:Ingress>
+        <SAIplt:ingress-stage SAIplt:type="ingress-acl-stage-type">IPCL0</SAIplt:ingress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">1</SAIplt:hit-number>
+      </SAIplt:Ingress>
+      <SAIplt:Egress>
+        <SAIplt:egress-stage SAIplt:type="egress-acl-stage-type">EPCL0</SAIplt:egress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">0</SAIplt:hit-number>
+      </SAIplt:Egress>
+    </SAIplt:Features-using-acl>
+    <SAIplt:Features-using-acl>
+      <SAIplt:feature SAIplt:type="acl-feature-name-type">port-sFlow</SAIplt:feature>
+      <SAIplt:feature-priority SAIplt:type="feature-priority-type">4</SAIplt:feature-priority>
+      <SAIplt:Ingress>
+        <SAIplt:ingress-stage SAIplt:type="ingress-acl-stage-type">IPCL0</SAIplt:ingress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">0</SAIplt:hit-number>
+      </SAIplt:Ingress>
+      <SAIplt:Egress>
+        <SAIplt:egress-stage SAIplt:type="egress-acl-stage-type">EPCL0</SAIplt:egress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">0</SAIplt:hit-number>
+      </SAIplt:Egress>
+    </SAIplt:Features-using-acl>
+    <SAIplt:Features-using-acl>
+      <SAIplt:feature SAIplt:type="acl-feature-name-type">port-counters-ipv4-ipv6</SAIplt:feature>
+      <SAIplt:feature-priority SAIplt:type="feature-priority-type">5</SAIplt:feature-priority>
+      <SAIplt:Ingress>
+        <SAIplt:ingress-stage SAIplt:type="ingress-acl-stage-type">IPCL0</SAIplt:ingress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">3</SAIplt:hit-number>
+      </SAIplt:Ingress>
+      <SAIplt:Egress>
+        <SAIplt:egress-stage SAIplt:type="egress-acl-stage-type">EPCL0</SAIplt:egress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">0</SAIplt:hit-number>
+      </SAIplt:Egress>
+    </SAIplt:Features-using-acl>
+    <SAIplt:Features-using-acl>
+      <SAIplt:feature SAIplt:type="acl-feature-name-type">debug-counter-acl</SAIplt:feature>
+      <SAIplt:feature-priority SAIplt:type="feature-priority-type">2</SAIplt:feature-priority>
+      <SAIplt:Ingress>
+        <SAIplt:ingress-stage SAIplt:type="ingress-acl-stage-type">IPCL0</SAIplt:ingress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">1</SAIplt:hit-number>
+      </SAIplt:Ingress>
+      <SAIplt:Egress>
+        <SAIplt:egress-stage SAIplt:type="egress-acl-stage-type">EPCL0</SAIplt:egress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">0</SAIplt:hit-number>
+      </SAIplt:Egress>
+    </SAIplt:Features-using-acl>
+  </SAIplt:SAI>
+</data>
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/F2T48x25G8x100G/buffers_defaults_t0.j2 b/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/F2T48x25G8x100G/buffers_defaults_t0.j2
new file mode 100644
index 000000000..f3eaf0144
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/F2T48x25G8x100G/buffers_defaults_t0.j2
@@ -0,0 +1,36 @@
+
+{%- set default_cable = '40m' %}
+
+{%- macro generate_buffer_pool_and_profiles() %}
+    "BUFFER_POOL": {
+        "ingress_lossless_pool": {
+            "size": "21120000",
+            "type": "ingress",
+            "mode": "dynamic"
+        },
+        "egress_pool": {
+            "size": "21120000",
+            "type": "egress",
+            "mode": "static"
+        }
+    },
+    "BUFFER_PROFILE": {
+        "ingress_lossy_profile": {
+            "pool":"ingress_lossless_pool",
+            "size":"0",
+            "dynamic_th":"3"
+        },
+        "egress_lossless_profile": {
+            "pool":"egress_pool",
+            "mode": "static",
+            "size":"330000",
+            "static_th":"0"
+        },
+        "egress_lossy_profile": {
+            "pool":"egress_pool",
+            "size":"0",
+            "mode": "dynamic",
+            "dynamic_th":"3"
+        }
+    },
+{%- endmacro %}
diff --git a/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/F2T48x25G8x100G/buffers_defaults_t1.j2 b/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/F2T48x25G8x100G/buffers_defaults_t1.j2
new file mode 100644
index 000000000..f3eaf0144
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/F2T48x25G8x100G/buffers_defaults_t1.j2
@@ -0,0 +1,36 @@
+
+{%- set default_cable = '40m' %}
+
+{%- macro generate_buffer_pool_and_profiles() %}
+    "BUFFER_POOL": {
+        "ingress_lossless_pool": {
+            "size": "21120000",
+            "type": "ingress",
+            "mode": "dynamic"
+        },
+        "egress_pool": {
+            "size": "21120000",
+            "type": "egress",
+            "mode": "static"
+        }
+    },
+    "BUFFER_PROFILE": {
+        "ingress_lossy_profile": {
+            "pool":"ingress_lossless_pool",
+            "size":"0",
+            "dynamic_th":"3"
+        },
+        "egress_lossless_profile": {
+            "pool":"egress_pool",
+            "mode": "static",
+            "size":"330000",
+            "static_th":"0"
+        },
+        "egress_lossy_profile": {
+            "pool":"egress_pool",
+            "size":"0",
+            "mode": "dynamic",
+            "dynamic_th":"3"
+        }
+    },
+{%- endmacro %}
diff --git a/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/F2T48x25G8x100G/port_config.ini b/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/F2T48x25G8x100G/port_config.ini
new file mode 100644
index 000000000..0c4067b10
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/F2T48x25G8x100G/port_config.ini
@@ -0,0 +1,59 @@
+#  name         lanes         alias             speed      autoneg    fec      index
+Ethernet0       0             twenty5GigE0      25000      on         none     1
+Ethernet1       1             twenty5GigE1      25000      on         none     2
+Ethernet2       2             twenty5GigE2      25000      on         none     3
+Ethernet3       3             twenty5GigE3      25000      on         none     4
+Ethernet4       4             twenty5GigE4      25000      on         none     5
+Ethernet5       5             twenty5GigE5      25000      on         none     6
+Ethernet6       6             twenty5GigE6      25000      on         none     7
+Ethernet7       7             twenty5GigE7      25000      on         none     8
+Ethernet8       8             twenty5GigE8      25000      on         none     9
+Ethernet9       9             twenty5GigE9      25000      on         none     10
+Ethernet10      10            twenty5GigE10     25000      on         none     11
+Ethernet11      11            twenty5GigE11     25000      on         none     12
+Ethernet12      12            twenty5GigE12     25000      on         none     13
+Ethernet13      13            twenty5GigE13     25000      on         none     14
+Ethernet14      14            twenty5GigE14     25000      on         none     15
+Ethernet15      15            twenty5GigE15     25000      on         none     16
+Ethernet16      16            twenty5GigE16     25000      on         none     17
+Ethernet17      17            twenty5GigE17     25000      on         none     18
+Ethernet18      18            twenty5GigE18     25000      on         none     19
+Ethernet19      19            twenty5GigE19     25000      on         none     20
+Ethernet20      20            twenty5GigE20     25000      on         none     21
+Ethernet21      21            twenty5GigE21     25000      on         none     22
+Ethernet22      22            twenty5GigE22     25000      on         none     23
+Ethernet23      23            twenty5GigE23     25000      on         none     24
+Ethernet24      24            twenty5GigE24     25000      on         none     25
+Ethernet25      25            twenty5GigE25     25000      on         none     26
+Ethernet26      26            twenty5GigE26     25000      on         none     27
+Ethernet27      27            twenty5GigE27     25000      on         none     28
+Ethernet28      28            twenty5GigE28     25000      on         none     29
+Ethernet29      29            twenty5GigE29     25000      on         none     30
+Ethernet30      30            twenty5GigE30     25000      on         none     31
+Ethernet31      31            twenty5GigE31     25000      on         none     32
+Ethernet32      32            twenty5GigE32     25000      on         none     33
+Ethernet33      33            twenty5GigE33     25000      on         none     34
+Ethernet34      34            twenty5GigE34     25000      on         none     35
+Ethernet35      35            twenty5GigE35     25000      on         none     36
+Ethernet36      36            twenty5GigE36     25000      on         none     37
+Ethernet37      37            twenty5GigE37     25000      on         none     38
+Ethernet38      38            twenty5GigE38     25000      on         none     39
+Ethernet39      39            twenty5GigE39     25000      on         none     40
+Ethernet40      40            twenty5GigE40     25000      on         none     41
+Ethernet41      41            twenty5GigE41     25000      on         none     42
+Ethernet42      42            twenty5GigE42     25000      on         none     43
+Ethernet43      43            twenty5GigE43     25000      on         none     44
+Ethernet44      44            twenty5GigE44     25000      on         none     45
+Ethernet45      45            twenty5GigE45     25000      on         none     46
+Ethernet46      46            twenty5GigE46     25000      on         none     47
+Ethernet47      47            twenty5GigE47     25000      on         none     48
+Ethernet48      48,49,50,51   one00GigE48       100000     on         rs       49
+Ethernet49      52,53,54,55   one00GigE49       100000     on         rs       50
+Ethernet50      56,57,58,59   one00GigE50       100000     on         rs       51
+Ethernet51      60,61,62,63   one00GigE51       100000     on         rs       52
+Ethernet52      64,65,66,67   one00GigE52       100000     on         rs       53
+Ethernet53      68,69,70,71   one00GigE53       100000     on         rs       54
+Ethernet54      72,73,74,75   one00GigE54       100000     on         rs       55
+Ethernet55      76,77,78,79   one00GigE55       100000     on         rs       56
+Ethernet56      80            tenGigE56         10000      off        none     57
+Ethernet57      81            tenGigE57         10000      off        none     58
diff --git a/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/F2T48x25G8x100G/profile.ini b/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/F2T48x25G8x100G/profile.ini
new file mode 100644
index 000000000..c2f77685a
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/F2T48x25G8x100G/profile.ini
@@ -0,0 +1 @@
+switchMacAddress=00:01:02:03:04:05
diff --git a/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/F2T48x25G8x100G/sai.profile b/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/F2T48x25G8x100G/sai.profile
new file mode 100644
index 000000000..49afb26f8
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/F2T48x25G8x100G/sai.profile
@@ -0,0 +1,4 @@
+mode=1
+hwId=F2T48x25G8x100G
+switchProfile=/usr/share/sonic/hwsku/SAI-F2T_48x25G-8x100G.xml
+SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/profile.ini
diff --git a/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/F2T80x25G/ASK-Board-F2T_80x25G.md5 b/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/F2T80x25G/ASK-Board-F2T_80x25G.md5
new file mode 100644
index 000000000..afe19e324
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/F2T80x25G/ASK-Board-F2T_80x25G.md5
@@ -0,0 +1 @@
+5a26299fae46aeeca40f450e0cc4e602
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/F2T80x25G/ASK-Board-F2T_80x25G.xml b/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/F2T80x25G/ASK-Board-F2T_80x25G.xml
new file mode 100644
index 000000000..879e3b954
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/F2T80x25G/ASK-Board-F2T_80x25G.xml
@@ -0,0 +1,2513 @@
+<?xml version="1.0" encoding="utf-8"?>
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-02-19-1.06" profile="Askboard" sid="eb53f80b-5892-4f8b-9197-a6f626effaba">
+  <askboardplt:ASK-Board xmlns:askboardplt="urn:marvell:askboard:yang">
+    <askboardplt:typedefs>
+      <askboardplt:typedef>
+        <askboardplt:name>std-string</askboardplt:name>
+        <askboardplt:type>string</askboardplt:type>
+        <askboardplt:description>standard string.</askboardplt:description>
+        <askboardplt:min>1</askboardplt:min>
+        <askboardplt:max>100</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>board-callback-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies os/ext drv callback types.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>linux-static</askboardplt:name>
+          <askboardplt:description>Linux Static</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>linux-shared</askboardplt:name>
+          <askboardplt:description>Linux Shared Lib mode</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>external</askboardplt:name>
+          <askboardplt:description>External Os</askboardplt:description>
+          <askboardplt:value>3</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>freeBsd</askboardplt:name>
+          <askboardplt:description>Free BSD</askboardplt:description>
+          <askboardplt:value>4</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>board-pp-map-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies pci info types.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>fixed</askboardplt:name>
+          <askboardplt:description>Fixed</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>autoscan</askboardplt:name>
+          <askboardplt:description>Auto scan</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>board-pp-interface-channel-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies channel interface type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>pci</askboardplt:name>
+          <askboardplt:description>PCI</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>smi</askboardplt:name>
+          <askboardplt:description>SMI</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>twsi</askboardplt:name>
+          <askboardplt:description>TWSI</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>board-pp-as-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies Address space type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>4_regions</askboardplt:name>
+          <askboardplt:description>address-space 4 regions</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>8_regions</askboardplt:name>
+          <askboardplt:description>address-space 8 regions</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>atu</askboardplt:name>
+          <askboardplt:description>address translation unit</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>device-id-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Device ID 0..1</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>1</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>port-mapping-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies port map type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>ethernet_mac</askboardplt:name>
+          <askboardplt:description>ETHERNET_MAC</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>cpu_sdma</askboardplt:name>
+          <askboardplt:description>CPU_SDMA</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>interface-num-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Interface number</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>1023</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>txq-port-number-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>TXq port number </askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>99</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>phy-smi-interface-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Phy SMI interface type.</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>3</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>phy-xsmi-interface-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Phy XSMI interface type.</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>15</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>phy-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the PHY Part Identifier.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>NA</askboardplt:name>
+          <askboardplt:description>No Phy</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E1543</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E1543, used for Combo ports.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E1545</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E1545, used for Copper GE with MAC on PHY support.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E1680</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E1680, used for Copper with speeds of 10M/100M/1G.</askboardplt:description>
+          <askboardplt:value>3</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E151X</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E151X, used for Copper (HW supports combo and fiber).</askboardplt:description>
+          <askboardplt:value>4</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E3140</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E3140, used for Copper with speeds of 100M/1G/10G.
+Uses with FW SolarFlare next generation.</askboardplt:description>
+          <askboardplt:value>5</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E3240</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E3240, used for Copper with speeds of 100M/1G/10G.
+Uses with FW, SolarFlare next generation.</askboardplt:description>
+          <askboardplt:value>6</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E3680</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E3680, used for Octal Copper 100M.</askboardplt:description>
+          <askboardplt:value>7</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E3220</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E3220, used for Combo port with speeds of 100M/1G/10G.
+Uses FW, SolarFlare next generation.</askboardplt:description>
+          <askboardplt:value>8</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E1680L</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E1680L, used for Copper with speeds of 10M/100M/1G.</askboardplt:description>
+          <askboardplt:value>9</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E33X0</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E33X0, used for MGIG Combo.</askboardplt:description>
+          <askboardplt:value>10</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E1548</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E1548, used for Fiber GE.</askboardplt:description>
+          <askboardplt:value>11</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E20X0</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E20X0, used for Copper with speeds of 10M/100M/1G/2.5G/5G.</askboardplt:description>
+          <askboardplt:value>12</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E1512</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E1512, used for Copper with speeds of 10M/100M/1G.</askboardplt:description>
+          <askboardplt:value>13</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E2180</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E2180, used for Copper with speeds of 10M/100M/1G/2.5G/5G.</askboardplt:description>
+          <askboardplt:value>14</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E1780</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E1780, Integrated Octal 10/100/1000 Mbps Energy
+Efficient Ethernet Transceiver</askboardplt:description>
+          <askboardplt:value>15</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E2540</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E2540, 4 ports 10/100/1000/2.5G/5GBASE-T Ethernet
+Transceiver with IEEE 1588v2 PTP Support</askboardplt:description>
+          <askboardplt:value>16</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E2580</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E12580, Octal 10/100/1000/2.5G/5GBASE-T Ethernet Transceiver
+with IEEE 1588v2 PTP Support</askboardplt:description>
+          <askboardplt:value>17</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>physical-port-num-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>PHYSICAL PORT NUM</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>1023</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-port-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the ledstream port type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>PORT_TYPE_TRI_SPEED</askboardplt:name>
+          <askboardplt:description>tri-speed port.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>PORT_TYPE_XG</askboardplt:name>
+          <askboardplt:description>XG port.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-blink-select-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the LED stream blink select type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_SELECT_0</askboardplt:name>
+          <askboardplt:description>Blink 0 signal.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_SELECT_1</askboardplt:name>
+          <askboardplt:description>Blink 1 signal</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-order-mode-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the LED stream ordering mode.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>ORDER_MODE_BY_PORT</askboardplt:name>
+          <askboardplt:description>the indication order is arranged by port.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>ORDER_MODE_BY_CLASS</askboardplt:name>
+          <askboardplt:description>the indication order is arranged by class.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-blink-duty-cycle-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the LED stream blink cycle duty cycle type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DUTY_CYCLE_0</askboardplt:name>
+          <askboardplt:description>25% on, 75% off.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DUTY_CYCLE_1</askboardplt:name>
+          <askboardplt:description>50% on, 50% off.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DUTY_CYCLE_2</askboardplt:name>
+          <askboardplt:description>50% on, 50% off.</askboardplt:description>
+          <askboardplt:value>3</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DUTY_CYCLE_3</askboardplt:name>
+          <askboardplt:description>75% on, 25% off.</askboardplt:description>
+          <askboardplt:value>4</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-blink-duration-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the LED stream blink period type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DURATION_0</askboardplt:name>
+          <askboardplt:description>BLINK_DURATION_0.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DURATION_1</askboardplt:name>
+          <askboardplt:description>BLINK_DURATION_1.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DURATION_2</askboardplt:name>
+          <askboardplt:description>BLINK_DURATION_2.</askboardplt:description>
+          <askboardplt:value>3</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DURATION_3</askboardplt:name>
+          <askboardplt:description>BLINK_DURATION_3.</askboardplt:description>
+          <askboardplt:value>4</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DURATION_4</askboardplt:name>
+          <askboardplt:description>BLINK_DURATION_4.</askboardplt:description>
+          <askboardplt:value>5</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DURATION_5</askboardplt:name>
+          <askboardplt:description>BLINK_DURATION_5.</askboardplt:description>
+          <askboardplt:value>6</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DURATION_6</askboardplt:name>
+          <askboardplt:description>(APPLICABLE DEVICES: xCat3; AC5; Lion2; Bobcat2; Caelum; Aldrin; AC3X; Bobcat3; Aldrin2; Pipe) .</askboardplt:description>
+          <askboardplt:value>7</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DURATION_7</askboardplt:name>
+          <askboardplt:description>APPLICABLE DEVICES: Bobcat2; Caelum; Aldrin; AC3X; Bobcat3; Aldrin2; Pipe).</askboardplt:description>
+          <askboardplt:value>8</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-pulse-stretch-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the LED stream length of stretching for dynamic signals.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>PULSE_STRETCH_0_NO</askboardplt:name>
+          <askboardplt:description>PULSE_STRETCH_0_NO.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>PULSE_STRETCH_1</askboardplt:name>
+          <askboardplt:description>PULSE_STRETCH_1.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>PULSE_STRETCH_2</askboardplt:name>
+          <askboardplt:description>PULSE_STRETCH_2.</askboardplt:description>
+          <askboardplt:value>3</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>PULSE_STRETCH_3</askboardplt:name>
+          <askboardplt:description>PULSE_STRETCH_3.</askboardplt:description>
+          <askboardplt:value>4</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>PULSE_STRETCH_4</askboardplt:name>
+          <askboardplt:description>PULSE_STRETCH_4.</askboardplt:description>
+          <askboardplt:value>5</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>PULSE_STRETCH_5</askboardplt:name>
+          <askboardplt:description>PULSE_STRETCH_5.</askboardplt:description>
+          <askboardplt:value>6</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>PULSE_STRETCH_6</askboardplt:name>
+          <askboardplt:description>(APPLICABLE DEVICES: Bobcat2; Caelum; Aldrin; AC3X; Bobcat3; Aldrin2; Falcon; AC5P; Pipe).</askboardplt:description>
+          <askboardplt:value>7</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>PULSE_STRETCH_7</askboardplt:name>
+          <askboardplt:description>(APPLICABLE DEVICES: Bobcat2; Caelum; Aldrin; AC3X; Bobcat3; Aldrin2; Falcon; AC5P; Pipe).</askboardplt:description>
+          <askboardplt:value>8</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-clock-out-frequency-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the LED stream blink cycle duty cycle type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>_CLOCK_OUT_FREQUENCY_500</askboardplt:name>
+          <askboardplt:description>500 KHz LED clock frequency.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>CLOCK_OUT_FREQUENCY_1000</askboardplt:name>
+          <askboardplt:description>1 MHz LED clock frequency.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>CLOCK_OUT_FREQUENCY_2000</askboardplt:name>
+          <askboardplt:description>2 MHz LED clock frequency.</askboardplt:description>
+          <askboardplt:value>3</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>CLOCK_OUT_FREQUENCY_3000</askboardplt:name>
+          <askboardplt:description>3 MHz LED clock frequency.</askboardplt:description>
+          <askboardplt:value>4</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-class5-select-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the LED stream indication displayed on class5 (for dual-media port/phy).</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>CLASS_5_SELECT_HALF_DUPLEX</askboardplt:name>
+          <askboardplt:description>Half Duplex is displayed on class5.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>CLASS_5_SELECT_FIBER_LINK_UP</askboardplt:name>
+          <askboardplt:description>If port is a dual media port, Fiber Link Up is displayed on class5.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-class13-select-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the LED stream indication displayed on class13 (for dual-media port/phy).</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>CLASS_13_SELECT_LINK_DOWN</askboardplt:name>
+          <askboardplt:description>Link Down is displayed on class13.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>CLASS_13_SELECT_COPPER_LINK_UP</askboardplt:name>
+          <askboardplt:description>If port is a dual media port, Copper Link Up is displayed on class13.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-class-num-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Led Class number</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>11</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>boolean-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Boolean 32 bits , due to bing endian</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>false</askboardplt:name>
+          <askboardplt:description>False</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>true</askboardplt:name>
+          <askboardplt:description>True</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>bus-id-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Bus Id Type, PCI/SMI</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>255</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>function-id-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Function Id Type, PCI/SMI</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>255</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>domain-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Domain, PCI/SMI</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>255</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-interface-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Led interface</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>255</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-position-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Led position</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>63</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>serdes-lane-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>serdes lane</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>7</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>cpu-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>The CPU Internal/External</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>external</askboardplt:name>
+          <askboardplt:description>Extrenal connected CPU</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>internal</askboardplt:name>
+          <askboardplt:description>Internal CPU</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-clock-frequency-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Led Clock Frequency Sip6</askboardplt:description>
+        <askboardplt:min>500</askboardplt:min>
+        <askboardplt:max>80000</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-unit-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Led units</askboardplt:description>
+        <askboardplt:min>1</askboardplt:min>
+        <askboardplt:max>16</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-unit-or-no-unit-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Led units, 0 for no Unit</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>16</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-group-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Led Group</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>1</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-force-data-type</askboardplt:name>
+        <askboardplt:type>string</askboardplt:type>
+        <askboardplt:description>A hexadecimal string with octets represented as hex digits
+separated by colons.  The canonical representation uses
+lowercase characters.</askboardplt:description>
+        <askboardplt:min>3</askboardplt:min>
+        <askboardplt:max>11</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>bit-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Bit range 0..31</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>31</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>bit-size-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Bit leng 1..32</askboardplt:description>
+        <askboardplt:min>1</askboardplt:min>
+        <askboardplt:max>32</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-sip-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>The LED scehme</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>na</askboardplt:name>
+          <askboardplt:description>NA</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>sip5</askboardplt:name>
+          <askboardplt:description>SIP5: AC3x</askboardplt:description>
+          <askboardplt:value>5</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>sip6</askboardplt:name>
+          <askboardplt:description>SIP6: Falcon, AC5x</askboardplt:description>
+          <askboardplt:value>6</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>port-cscd-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the cascade port type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>DSA_1_WORD</askboardplt:name>
+          <askboardplt:description>DSA Regular</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>DSA_2_WORDS</askboardplt:name>
+          <askboardplt:description>DSA Extended</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>NETWORK</askboardplt:name>
+          <askboardplt:description>Network.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>DSA_3_WORDS</askboardplt:name>
+          <askboardplt:description>DSA 3 Words</askboardplt:description>
+          <askboardplt:value>3</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>DSA_4_WORD</askboardplt:name>
+          <askboardplt:description>DSA 4 Words</askboardplt:description>
+          <askboardplt:value>4</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>trunk-cscd-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Specifies the Cascade Trunk id.</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>127</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>port-trunk-cscd-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the cascade port type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>cscdPort</askboardplt:name>
+          <askboardplt:description>Cascade port</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>cscdTrunk</askboardplt:name>
+          <askboardplt:description>Csacde trunk</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>hash-cscd-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the hash used by cascade trunk.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>pkt</askboardplt:name>
+          <askboardplt:description>Hash based on packet</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>srcPort</askboardplt:name>
+          <askboardplt:description>Hash based on source port</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>asic-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>ASIC Type</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>ASIC_AC3X</askboardplt:name>
+          <askboardplt:description>AC3X</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>ASIC_AC5X</askboardplt:name>
+          <askboardplt:description>AC5X</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>ASIC_Falcon</askboardplt:name>
+          <askboardplt:description>FALCON</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+    </askboardplt:typedefs>
+    <askboardplt:ASIC_Type askboardplt:type="asic-type">ASIC_Falcon</askboardplt:ASIC_Type>
+    <askboardplt:boardName askboardplt:type="std-string">ASK-Board-F2T_80x25G</askboardplt:boardName>
+    <askboardplt:osCallType askboardplt:type="board-callback-type">linux-static</askboardplt:osCallType>
+    <askboardplt:extDrvCallType askboardplt:type="board-callback-type">linux-static</askboardplt:extDrvCallType>
+    <askboardplt:mapType askboardplt:type="board-pp-map-type">autoscan</askboardplt:mapType>
+    <askboardplt:cpuType askboardplt:type="cpu-type">external</askboardplt:cpuType>
+    <askboardplt:mngInterfaceType askboardplt:type="board-pp-interface-channel-type">pci</askboardplt:mngInterfaceType>
+    <askboardplt:adressSpaceType askboardplt:type="board-pp-as-type">atu</askboardplt:adressSpaceType>
+    <askboardplt:device-list>
+      <askboardplt:devNum askboardplt:type="device-id-type">0</askboardplt:devNum>
+      <askboardplt:deviceId askboardplt:type="device-id-type">0</askboardplt:deviceId>
+      <askboardplt:pp-profile-name askboardplt:type="std-string">ASK-PP-F2T_80x25G.xml</askboardplt:pp-profile-name>
+      <askboardplt:L1-profile-name askboardplt:type="std-string">ASK-L1-F2T_80x25G.xml</askboardplt:L1-profile-name>
+      <askboardplt:ledStreamType askboardplt:type="led-sip-type">sip6</askboardplt:ledStreamType>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">0</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">112</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP0</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">1</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">113</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">2</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">114</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">3</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">115</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">4</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">116</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">5</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">117</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">6</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">118</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">7</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">119</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">8</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">120</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP1</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">9</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">121</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">10</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">122</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">11</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">123</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">12</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">124</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">13</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">125</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">14</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">126</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">15</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">127</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">16</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">0</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP0</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">17</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">1</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">18</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">2</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">19</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">3</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">20</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">4</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">21</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">5</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">22</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">6</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">23</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">7</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">24</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">8</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP1</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">25</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">9</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">26</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">10</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">27</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">11</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">28</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">12</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">29</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">13</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">30</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">14</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">31</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">15</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">32</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">32</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP0</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">33</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">33</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">34</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">34</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">35</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">35</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">36</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">36</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">37</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">37</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">38</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">38</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">39</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">39</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">40</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">40</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP1</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">41</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">41</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">42</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">42</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">43</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">43</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">44</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">44</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">45</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">45</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">46</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">46</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">47</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">47</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">48</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">64</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP2</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">49</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">65</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">50</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">66</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">51</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">67</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">52</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">68</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">53</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">69</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">54</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">70</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">55</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">71</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">56</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">72</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP3</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">57</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">73</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">58</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">74</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">59</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">75</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">60</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">76</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">64</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">77</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">65</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">78</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">66</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">79</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">67</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">80</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP2</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">68</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">81</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">69</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">82</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">70</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">83</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">71</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">84</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">72</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">85</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">73</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">86</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">74</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">87</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">75</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">88</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP3</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">76</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">89</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">77</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">90</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">78</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">91</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">79</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">92</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">80</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">93</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">81</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">94</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">82</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">95</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">83</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">133</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">84</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">135</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">63</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">cpu_sdma</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">136</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">85</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">cpu_sdma</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">137</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">86</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">cpu_sdma</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">138</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">87</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">cpu_sdma</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">139</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+      </askboardplt:portMap-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">64</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">65</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">66</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">67</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">68</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">69</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">70</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">71</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">79</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">78</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">77</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">76</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">75</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">74</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">73</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">72</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">0</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">1</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">2</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">3</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">4</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">5</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">6</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">7</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">15</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">14</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">13</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">12</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">11</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">10</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">9</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">8</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">16</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">17</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">18</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">19</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">20</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">21</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">22</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">23</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">31</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">30</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">29</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">28</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">27</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">26</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">25</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">24</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">32</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">35</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">33</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">34</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">37</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">39</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">36</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">38</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">47</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">44</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">46</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">45</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">42</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">40</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">43</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">41</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">48</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">51</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">49</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">50</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">53</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">55</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">52</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">54</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">63</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">60</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">62</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">61</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">58</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">56</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">59</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">57</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">80</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">81</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+    </askboardplt:device-list>
+    <askboardplt:UDSFilePath askboardplt:type="std-string">/tmp/cpss_uds</askboardplt:UDSFilePath>
+    <askboardplt:serdesMux>
+      <askboardplt:serdesMuxSchemePortMod askboardplt:type="uint32">8</askboardplt:serdesMuxSchemePortMod>
+      <askboardplt:serdesMuxSchemeList>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP0</askboardplt:serdesMuxScheme>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">0</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">1</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">2</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">3</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">4</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">5</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">6</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">7</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+      </askboardplt:serdesMuxSchemeList>
+      <askboardplt:serdesMuxSchemeList>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP1</askboardplt:serdesMuxScheme>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">7</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">6</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">5</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">4</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">3</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">2</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">1</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">0</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+      </askboardplt:serdesMuxSchemeList>
+      <askboardplt:serdesMuxSchemeList>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP2</askboardplt:serdesMuxScheme>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">0</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">3</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">1</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">2</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">5</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">7</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">4</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">6</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+      </askboardplt:serdesMuxSchemeList>
+      <askboardplt:serdesMuxSchemeList>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP3</askboardplt:serdesMuxScheme>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">7</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">4</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">6</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">5</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">2</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">0</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">3</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">1</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+      </askboardplt:serdesMuxSchemeList>
+    </askboardplt:serdesMux>
+  </askboardplt:ASK-Board>
+</data>
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/F2T80x25G/ASK-L1-F2T_80x25G.md5 b/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/F2T80x25G/ASK-L1-F2T_80x25G.md5
new file mode 100644
index 000000000..48db34913
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/F2T80x25G/ASK-L1-F2T_80x25G.md5
@@ -0,0 +1 @@
+b9e6fa1643045736b22b06e5a3443962
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/F2T80x25G/ASK-L1-F2T_80x25G.xml b/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/F2T80x25G/ASK-L1-F2T_80x25G.xml
new file mode 100644
index 000000000..448077663
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/F2T80x25G/ASK-L1-F2T_80x25G.xml
@@ -0,0 +1,1366 @@
+<?xml version="1.0" encoding="utf-8"?>
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-02-19-1.06" profile="Askl1" sid="71d3ab0f-3ac2-452a-a5c9-2dfdc969734a">
+  <ASKL1plt:ASK-L1 xmlns:ASKL1plt="urn:marvell:ASKL1:yang">
+    <ASKL1plt:typedefs>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>interface-mode-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Specifies supported Interface modes</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>1000BASE_X</ASKL1plt:name>
+          <ASKL1plt:description>1G</ASKL1plt:description>
+          <ASKL1plt:value>6</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>SGMII</ASKL1plt:name>
+          <ASKL1plt:description>1G , 2.5G</ASKL1plt:description>
+          <ASKL1plt:value>3</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>QSGMII</ASKL1plt:name>
+          <ASKL1plt:description>1G</ASKL1plt:description>
+          <ASKL1plt:value>13</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>KR</ASKL1plt:name>
+          <ASKL1plt:description>10G, 12G, 20G, 40G, 100G</ASKL1plt:description>
+          <ASKL1plt:value>16</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>SR_LR</ASKL1plt:name>
+          <ASKL1plt:description>5G, 10G, 12G, 20G, 40G</ASKL1plt:description>
+          <ASKL1plt:value>20</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>KR2</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>27</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>KR4</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>28</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>SR_LR2</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>29</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>SR_LR4</ASKL1plt:name>
+          <ASKL1plt:description>100G</ASKL1plt:description>
+          <ASKL1plt:value>30</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>KR_C</ASKL1plt:name>
+          <ASKL1plt:description>CONSORTIUM - 25G</ASKL1plt:description>
+          <ASKL1plt:value>32</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>CR_C</ASKL1plt:name>
+          <ASKL1plt:description>CONSORTIUM - 25G</ASKL1plt:description>
+          <ASKL1plt:value>33</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>KR2_C</ASKL1plt:name>
+          <ASKL1plt:description>CONSORTIUM - 50G</ASKL1plt:description>
+          <ASKL1plt:value>34</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>CR2_C</ASKL1plt:name>
+          <ASKL1plt:description>CONSORTIUM - 50G</ASKL1plt:description>
+          <ASKL1plt:value>35</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>CR</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>36</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>CR2</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>37</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>CR4</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>38</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>KR_S</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>39</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>CR_S</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>40</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>KR8</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>41</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>CR8</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>42</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>SR_LR8</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>43</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>USX_10G_QXGMII</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>51</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>USX_20G_QXGMII</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>52</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>USX_OUSGMII</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>53</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>USX_20G_OXGMII</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>54</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>NA</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>57</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>port-speed-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Specifies supported speeds</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>1G</ASKL1plt:name>
+          <ASKL1plt:description>1G</ASKL1plt:description>
+          <ASKL1plt:value>2</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>10G</ASKL1plt:name>
+          <ASKL1plt:description>10G</ASKL1plt:description>
+          <ASKL1plt:value>3</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>2500M</ASKL1plt:name>
+          <ASKL1plt:description>2.5G</ASKL1plt:description>
+          <ASKL1plt:value>5</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>5G</ASKL1plt:name>
+          <ASKL1plt:description>5G</ASKL1plt:description>
+          <ASKL1plt:value>6</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>25G</ASKL1plt:name>
+          <ASKL1plt:description>25G, used in combination with CPSS_PORT_INTERFACE_MODE_KR_E, CPSS_PORT_INTERFACE_MODE_KR2_E</ASKL1plt:description>
+          <ASKL1plt:value>21</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>40G</ASKL1plt:name>
+          <ASKL1plt:description>40G</ASKL1plt:description>
+          <ASKL1plt:value>9</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>50G</ASKL1plt:name>
+          <ASKL1plt:description>50G</ASKL1plt:description>
+          <ASKL1plt:value>14</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>100G</ASKL1plt:name>
+          <ASKL1plt:description>100G</ASKL1plt:description>
+          <ASKL1plt:value>13</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>200G</ASKL1plt:name>
+          <ASKL1plt:description>200G</ASKL1plt:description>
+          <ASKL1plt:value>24</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>400G</ASKL1plt:name>
+          <ASKL1plt:description>400G</ASKL1plt:description>
+          <ASKL1plt:value>25</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>NA</ASKL1plt:name>
+          <ASKL1plt:description>NA</ASKL1plt:description>
+          <ASKL1plt:value>35</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>fec-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Rx parameter type</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>enabled</ASKL1plt:name>
+          <ASKL1plt:description>Enabled</ASKL1plt:description>
+          <ASKL1plt:value>0</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>disabled</ASKL1plt:name>
+          <ASKL1plt:description>Disabled</ASKL1plt:description>
+          <ASKL1plt:value>1</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rs_enabled</ASKL1plt:name>
+          <ASKL1plt:description>RS FEC enabled</ASKL1plt:description>
+          <ASKL1plt:value>2</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>both_enabled</ASKL1plt:name>
+          <ASKL1plt:description>Both enabled</ASKL1plt:description>
+          <ASKL1plt:value>3</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rs_544_514_enabled</ASKL1plt:name>
+          <ASKL1plt:description>RS FEC 544 and 514</ASKL1plt:description>
+          <ASKL1plt:value>4</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>physical-port-num-type</ASKL1plt:name>
+        <ASKL1plt:type>uint32</ASKL1plt:type>
+        <ASKL1plt:description>PHYSICAL PORT NUM</ASKL1plt:description>
+        <ASKL1plt:min>0</ASKL1plt:min>
+        <ASKL1plt:max>1023</ASKL1plt:max>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>tx-param-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Tx parameter type</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>atten</ASKL1plt:name>
+          <ASKL1plt:description>atten</ASKL1plt:description>
+          <ASKL1plt:value>0</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>post</ASKL1plt:name>
+          <ASKL1plt:description>post</ASKL1plt:description>
+          <ASKL1plt:value>1</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>pre</ASKL1plt:name>
+          <ASKL1plt:description>pre</ASKL1plt:description>
+          <ASKL1plt:value>2</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>pre2</ASKL1plt:name>
+          <ASKL1plt:description>pre2</ASKL1plt:description>
+          <ASKL1plt:value>3</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>pre3</ASKL1plt:name>
+          <ASKL1plt:description>pre3</ASKL1plt:description>
+          <ASKL1plt:value>4</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>peak</ASKL1plt:name>
+          <ASKL1plt:description>peak</ASKL1plt:description>
+          <ASKL1plt:value>5</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>main</ASKL1plt:name>
+          <ASKL1plt:description>main</ASKL1plt:description>
+          <ASKL1plt:value>6</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>txAmpAdjEn</ASKL1plt:name>
+          <ASKL1plt:description>txAmpAdjEn</ASKL1plt:description>
+          <ASKL1plt:value>7</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>emph0</ASKL1plt:name>
+          <ASKL1plt:description>emph0</ASKL1plt:description>
+          <ASKL1plt:value>8</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>emph1</ASKL1plt:name>
+          <ASKL1plt:description>emph1</ASKL1plt:description>
+          <ASKL1plt:value>9</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>txAmpShft</ASKL1plt:name>
+          <ASKL1plt:description>txAmpShft</ASKL1plt:description>
+          <ASKL1plt:value>10</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>txEmphEn</ASKL1plt:name>
+          <ASKL1plt:description>txEmphEn</ASKL1plt:description>
+          <ASKL1plt:value>11</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>txEmphEn1</ASKL1plt:name>
+          <ASKL1plt:description>txEmphEn1</ASKL1plt:description>
+          <ASKL1plt:value>12</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>txAmpAdj</ASKL1plt:name>
+          <ASKL1plt:description>txAmpAdj</ASKL1plt:description>
+          <ASKL1plt:value>13</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>slewCtrlEn</ASKL1plt:name>
+          <ASKL1plt:description>slewCtrlEn</ASKL1plt:description>
+          <ASKL1plt:value>14</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>slewRate</ASKL1plt:name>
+          <ASKL1plt:description>slewRate</ASKL1plt:description>
+          <ASKL1plt:value>15</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>rx-param-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Rx parameter type</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>sqlch</ASKL1plt:name>
+          <ASKL1plt:description>sqlch</ASKL1plt:description>
+          <ASKL1plt:value>0</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>DC</ASKL1plt:name>
+          <ASKL1plt:description>DC</ASKL1plt:description>
+          <ASKL1plt:value>1</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>LF</ASKL1plt:name>
+          <ASKL1plt:description>LF</ASKL1plt:description>
+          <ASKL1plt:value>2</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>HF</ASKL1plt:name>
+          <ASKL1plt:description>HF</ASKL1plt:description>
+          <ASKL1plt:value>3</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>gainShape1</ASKL1plt:name>
+          <ASKL1plt:description>gainShape1</ASKL1plt:description>
+          <ASKL1plt:value>4</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>gainShape2</ASKL1plt:name>
+          <ASKL1plt:description>gainShape2</ASKL1plt:description>
+          <ASKL1plt:value>5</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>shortChannelEn</ASKL1plt:name>
+          <ASKL1plt:description>shortChannelEn</ASKL1plt:description>
+          <ASKL1plt:value>7</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>bfLf</ASKL1plt:name>
+          <ASKL1plt:description>bfLf</ASKL1plt:description>
+          <ASKL1plt:value>8</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>bfHf</ASKL1plt:name>
+          <ASKL1plt:description>bfHf</ASKL1plt:description>
+          <ASKL1plt:value>9</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>minLf</ASKL1plt:name>
+          <ASKL1plt:description>minLf</ASKL1plt:description>
+          <ASKL1plt:value>10</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>maxLf</ASKL1plt:name>
+          <ASKL1plt:description>maxLf</ASKL1plt:description>
+          <ASKL1plt:value>11</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>minHf</ASKL1plt:name>
+          <ASKL1plt:description>minHf</ASKL1plt:description>
+          <ASKL1plt:value>12</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>maxHf</ASKL1plt:name>
+          <ASKL1plt:description>maxHf</ASKL1plt:description>
+          <ASKL1plt:value>13</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>minPre1</ASKL1plt:name>
+          <ASKL1plt:description>minPre1</ASKL1plt:description>
+          <ASKL1plt:value>14</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>maxPre1</ASKL1plt:name>
+          <ASKL1plt:description>maxPre1</ASKL1plt:description>
+          <ASKL1plt:value>15</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>minPre2</ASKL1plt:name>
+          <ASKL1plt:description>minPre2</ASKL1plt:description>
+          <ASKL1plt:value>16</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>maxPre2</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>17</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>minPost</ASKL1plt:name>
+          <ASKL1plt:description>minPost</ASKL1plt:description>
+          <ASKL1plt:value>18</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>maxPost</ASKL1plt:name>
+          <ASKL1plt:description>maxPost</ASKL1plt:description>
+          <ASKL1plt:value>19</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>squelch</ASKL1plt:name>
+          <ASKL1plt:description>squelch</ASKL1plt:description>
+          <ASKL1plt:value>20</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>termination</ASKL1plt:name>
+          <ASKL1plt:description>termination</ASKL1plt:description>
+          <ASKL1plt:value>27</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>coldEnvelope</ASKL1plt:name>
+          <ASKL1plt:description>coldEnvelope</ASKL1plt:description>
+          <ASKL1plt:value>35</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>hotEnvelope</ASKL1plt:name>
+          <ASKL1plt:description>hotEnvelope</ASKL1plt:description>
+          <ASKL1plt:value>36</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>dcGain</ASKL1plt:name>
+          <ASKL1plt:description>dcGain</ASKL1plt:description>
+          <ASKL1plt:value>37</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>bandWidth</ASKL1plt:name>
+          <ASKL1plt:description>bandWidth</ASKL1plt:description>
+          <ASKL1plt:value>38</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>dfe</ASKL1plt:name>
+          <ASKL1plt:description>dfe</ASKL1plt:description>
+          <ASKL1plt:value>39</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>ffeR</ASKL1plt:name>
+          <ASKL1plt:description>ffeR</ASKL1plt:description>
+          <ASKL1plt:value>40</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>ffeC</ASKL1plt:name>
+          <ASKL1plt:description>ffeC</ASKL1plt:description>
+          <ASKL1plt:value>41</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>sampler</ASKL1plt:name>
+          <ASKL1plt:description>sampler</ASKL1plt:description>
+          <ASKL1plt:value>42</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>align90</ASKL1plt:name>
+          <ASKL1plt:description>align90</ASKL1plt:description>
+          <ASKL1plt:value>43</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>ffeS</ASKL1plt:name>
+          <ASKL1plt:description>ffeS</ASKL1plt:description>
+          <ASKL1plt:value>44</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>resSel</ASKL1plt:name>
+          <ASKL1plt:description>resSel</ASKL1plt:description>
+          <ASKL1plt:value>45</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>resShift</ASKL1plt:name>
+          <ASKL1plt:description>resShift</ASKL1plt:description>
+          <ASKL1plt:value>46</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>capSel</ASKL1plt:name>
+          <ASKL1plt:description>capSel</ASKL1plt:description>
+          <ASKL1plt:value>47</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>ffeSettingForce</ASKL1plt:name>
+          <ASKL1plt:description>ffeSettingForce</ASKL1plt:description>
+          <ASKL1plt:value>48</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>adaptedResSel</ASKL1plt:name>
+          <ASKL1plt:description>adaptedResSel</ASKL1plt:description>
+          <ASKL1plt:value>49</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>adaptedCapSel</ASKL1plt:name>
+          <ASKL1plt:description>adaptedCapSel</ASKL1plt:description>
+          <ASKL1plt:value>50</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>selmufi</ASKL1plt:name>
+          <ASKL1plt:description>selmufi</ASKL1plt:description>
+          <ASKL1plt:value>51</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>selmuff</ASKL1plt:name>
+          <ASKL1plt:description>selmuff</ASKL1plt:description>
+          <ASKL1plt:value>52</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>selmupi</ASKL1plt:name>
+          <ASKL1plt:description>selmupi</ASKL1plt:description>
+          <ASKL1plt:value>53</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>selmupf</ASKL1plt:name>
+          <ASKL1plt:description>selmupf</ASKL1plt:description>
+          <ASKL1plt:value>54</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>slewRateCtrl0</ASKL1plt:name>
+          <ASKL1plt:description>slewRateCtrl0</ASKL1plt:description>
+          <ASKL1plt:value>55</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>slewRateCtrl1</ASKL1plt:name>
+          <ASKL1plt:description>slewRateCtrl1</ASKL1plt:description>
+          <ASKL1plt:value>56</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>EO</ASKL1plt:name>
+          <ASKL1plt:description>EO</ASKL1plt:description>
+          <ASKL1plt:value>57</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>dataRate</ASKL1plt:name>
+          <ASKL1plt:description>dataRate</ASKL1plt:description>
+          <ASKL1plt:value>58</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>res1Sel</ASKL1plt:name>
+          <ASKL1plt:description>res1Sel</ASKL1plt:description>
+          <ASKL1plt:value>59</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>res2Sel</ASKL1plt:name>
+          <ASKL1plt:description>res2Sel</ASKL1plt:description>
+          <ASKL1plt:value>60</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>cap1Sel</ASKL1plt:name>
+          <ASKL1plt:description>cap1Sel</ASKL1plt:description>
+          <ASKL1plt:value>61</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>cap2Sel</ASKL1plt:name>
+          <ASKL1plt:description>cap2Sel</ASKL1plt:description>
+          <ASKL1plt:value>62</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>midpointLargeThresKLane</ASKL1plt:name>
+          <ASKL1plt:description>midpointLargeThresKLane</ASKL1plt:description>
+          <ASKL1plt:value>63</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>midpointSmallThresKLane</ASKL1plt:name>
+          <ASKL1plt:description>midpointSmallThresKLane</ASKL1plt:description>
+          <ASKL1plt:value>64</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>midpointLargeThresCLane</ASKL1plt:name>
+          <ASKL1plt:description>midpointLargeThresCLane</ASKL1plt:description>
+          <ASKL1plt:value>65</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>midpointSmallThresCLane</ASKL1plt:name>
+          <ASKL1plt:description>midpointSmallThresCLane</ASKL1plt:description>
+          <ASKL1plt:value>66</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>dfeResF0aHighThresInitLane</ASKL1plt:name>
+          <ASKL1plt:description>dfeResF0aHighThresInitLane</ASKL1plt:description>
+          <ASKL1plt:value>67</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>dfeResF0aHighThresEndLane</ASKL1plt:name>
+          <ASKL1plt:description>dfeResF0aHighThresEndLane</ASKL1plt:description>
+          <ASKL1plt:value>68</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>current1Sel</ASKL1plt:name>
+          <ASKL1plt:description>current1Sel</ASKL1plt:description>
+          <ASKL1plt:value>69</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rl1Sel</ASKL1plt:name>
+          <ASKL1plt:description>rl1Sel</ASKL1plt:description>
+          <ASKL1plt:value>70</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rl1Extra</ASKL1plt:name>
+          <ASKL1plt:description>rl1Extra</ASKL1plt:description>
+          <ASKL1plt:value>71</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>cl1Ctrl</ASKL1plt:name>
+          <ASKL1plt:description>cl1Ctrl</ASKL1plt:description>
+          <ASKL1plt:value>72</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>enMidFreq</ASKL1plt:name>
+          <ASKL1plt:description>enMidFreq</ASKL1plt:description>
+          <ASKL1plt:value>73</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>cs1Mid</ASKL1plt:name>
+          <ASKL1plt:description>cs1Mid</ASKL1plt:description>
+          <ASKL1plt:value>74</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rs1Mid</ASKL1plt:name>
+          <ASKL1plt:description>rs1Mid</ASKL1plt:description>
+          <ASKL1plt:value>75</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rfCtrl</ASKL1plt:name>
+          <ASKL1plt:description>rfCtrl</ASKL1plt:description>
+          <ASKL1plt:value>76</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rl1TiaSel</ASKL1plt:name>
+          <ASKL1plt:description>rl1TiaSel</ASKL1plt:description>
+          <ASKL1plt:value>77</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rl1TiaExtra</ASKL1plt:name>
+          <ASKL1plt:description>rl1TiaExtra</ASKL1plt:description>
+          <ASKL1plt:value>78</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>hpfRSel1st</ASKL1plt:name>
+          <ASKL1plt:description>hpfRSel1st</ASKL1plt:description>
+          <ASKL1plt:value>79</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>current1TiaSel</ASKL1plt:name>
+          <ASKL1plt:description>current1TiaSel</ASKL1plt:description>
+          <ASKL1plt:value>80</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rl2Tune</ASKL1plt:name>
+          <ASKL1plt:description>rl2Tune</ASKL1plt:description>
+          <ASKL1plt:value>81</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rl2Sel</ASKL1plt:name>
+          <ASKL1plt:description>rl2Sel</ASKL1plt:description>
+          <ASKL1plt:value>82</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rs2Sel</ASKL1plt:name>
+          <ASKL1plt:description>rs2Sel</ASKL1plt:description>
+          <ASKL1plt:value>83</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>current2Sel</ASKL1plt:name>
+          <ASKL1plt:description>current2Sel</ASKL1plt:description>
+          <ASKL1plt:value>84</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>hpfRsel2nd</ASKL1plt:name>
+          <ASKL1plt:description>hpfRsel2nd</ASKL1plt:description>
+          <ASKL1plt:value>85</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>BW</ASKL1plt:name>
+          <ASKL1plt:description>BW</ASKL1plt:description>
+          <ASKL1plt:value>86</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>dfeGAIN</ASKL1plt:name>
+          <ASKL1plt:description>dfeGAIN</ASKL1plt:description>
+          <ASKL1plt:value>87</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>dfeGAIN2</ASKL1plt:name>
+          <ASKL1plt:description>dfeGAIN2</ASKL1plt:description>
+          <ASKL1plt:value>88</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>pre1</ASKL1plt:name>
+          <ASKL1plt:description>pre1</ASKL1plt:description>
+          <ASKL1plt:value>89</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>pre2</ASKL1plt:name>
+          <ASKL1plt:description>pre2</ASKL1plt:description>
+          <ASKL1plt:value>90</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>post1</ASKL1plt:name>
+          <ASKL1plt:description>post1</ASKL1plt:description>
+          <ASKL1plt:value>91</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>boolean-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Boolean 32 bits , due to bing endian</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>false</ASKL1plt:name>
+          <ASKL1plt:description>False</ASKL1plt:description>
+          <ASKL1plt:value>0</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>true</ASKL1plt:name>
+          <ASKL1plt:description>True</ASKL1plt:description>
+          <ASKL1plt:value>1</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>serdes-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Serdes Type</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>NA</ASKL1plt:name>
+          <ASKL1plt:description>No serdes</ASKL1plt:description>
+          <ASKL1plt:value>0</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>AVAGO</ASKL1plt:name>
+          <ASKL1plt:description>AVAGO</ASKL1plt:description>
+          <ASKL1plt:value>1</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>COMPHY</ASKL1plt:name>
+          <ASKL1plt:description>COMPHY</ASKL1plt:description>
+          <ASKL1plt:value>2</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>COMPHY_C12G</ASKL1plt:name>
+          <ASKL1plt:description>COMPHY_C12G</ASKL1plt:description>
+          <ASKL1plt:value>3</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>COMPHY_C28G</ASKL1plt:name>
+          <ASKL1plt:description>COMPHY_C28G</ASKL1plt:description>
+          <ASKL1plt:value>4</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>COMPHY_C112G</ASKL1plt:name>
+          <ASKL1plt:description>COMPHY_C112G</ASKL1plt:description>
+          <ASKL1plt:value>5</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>uint8-type</ASKL1plt:name>
+        <ASKL1plt:type>uint32</ASKL1plt:type>
+        <ASKL1plt:description>Uint8 32 bits , due to bing endian</ASKL1plt:description>
+        <ASKL1plt:min>0</ASKL1plt:min>
+        <ASKL1plt:max>255</ASKL1plt:max>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>serdes-termination-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>RX termination mode</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>GND</ASKL1plt:name>
+          <ASKL1plt:description>Enabled</ASKL1plt:description>
+          <ASKL1plt:value>0</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>VDD</ASKL1plt:name>
+          <ASKL1plt:description>Disabled</ASKL1plt:description>
+          <ASKL1plt:value>1</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>FLOATING</ASKL1plt:name>
+          <ASKL1plt:description>RS FEC enabled</ASKL1plt:description>
+          <ASKL1plt:value>2</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>port-interconnect-profile-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Enumerator of interconnect profile.</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>profile_default</ASKL1plt:name>
+          <ASKL1plt:description>Profile Default</ASKL1plt:description>
+          <ASKL1plt:value>0</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>profile_1</ASKL1plt:name>
+          <ASKL1plt:description>Profile 1</ASKL1plt:description>
+          <ASKL1plt:value>1</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>profile_2</ASKL1plt:name>
+          <ASKL1plt:description>Profile 2</ASKL1plt:description>
+          <ASKL1plt:value>2</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+    </ASKL1plt:typedefs>
+    <ASKL1plt:IfModeName>
+      <ASKL1plt:ifModeNameList>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">10GR1Fix</ASKL1plt:ifModeName>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">KR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">10G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">disabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+      </ASKL1plt:ifModeNameList>
+      <ASKL1plt:ifModeNameList>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">CR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">25G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">KR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">25G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">KR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">10G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">SR_LR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">25G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">SR_LR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">10G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">CR</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">25G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">KR</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">25G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">KR</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">10G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+      </ASKL1plt:ifModeNameList>
+    </ASKL1plt:IfModeName>
+    <ASKL1plt:Port>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">0</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">1</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">2</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">3</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">4</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">5</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">6</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">7</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">8</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">9</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">10</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">11</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">12</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">13</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">14</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">15</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">16</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">17</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">18</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">19</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">20</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">21</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">22</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">23</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">24</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">25</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">26</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">27</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">28</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">29</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">30</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">31</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">32</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">33</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">34</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">35</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">36</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">37</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">38</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">39</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">40</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">41</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">42</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">43</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">44</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">45</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">46</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">47</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">48</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">49</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">50</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">51</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">52</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">53</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">54</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">55</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">56</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">57</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">58</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">59</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">60</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">64</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">65</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">66</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">67</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">68</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">69</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">70</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">71</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">72</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">73</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">74</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">75</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">76</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">77</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">78</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">79</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">80</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">81</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">82</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">83</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">10GR1Fix</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">84</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">10GR1Fix</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+    </ASKL1plt:Port>
+  </ASKL1plt:ASK-L1>
+</data>
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/F2T80x25G/ASK-PP-F2T_80x25G.md5 b/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/F2T80x25G/ASK-PP-F2T_80x25G.md5
new file mode 100644
index 000000000..604343ce0
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/F2T80x25G/ASK-PP-F2T_80x25G.md5
@@ -0,0 +1 @@
+3943f8d39de0129472bf59ff13c92222
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/F2T80x25G/ASK-PP-F2T_80x25G.xml b/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/F2T80x25G/ASK-PP-F2T_80x25G.xml
new file mode 100644
index 000000000..b7e9ec199
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/F2T80x25G/ASK-PP-F2T_80x25G.xml
@@ -0,0 +1,1180 @@
+<?xml version="1.0" encoding="utf-8"?>
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-02-19-1.06" profile="Askpp" sid="34f1c14a-b581-422d-bd10-426dfac013dd">
+  <askppplt:ASK-PP xmlns:askppplt="urn:marvell:askpp:yang">
+    <askppplt:typedefs>
+      <askppplt:typedef>
+        <askppplt:name>std-string</askppplt:name>
+        <askppplt:type>string</askppplt:type>
+        <askppplt:description>standard string.</askppplt:description>
+        <askppplt:min>1</askppplt:min>
+        <askppplt:max>100</askppplt:max>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>queue-id-type</askppplt:name>
+        <askppplt:type>uint32</askppplt:type>
+        <askppplt:description>Queue id</askppplt:description>
+        <askppplt:min>0</askppplt:min>
+        <askppplt:max>7</askppplt:max>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>precent-type</askppplt:name>
+        <askppplt:type>uint32</askppplt:type>
+        <askppplt:description>Precent</askppplt:description>
+        <askppplt:min>0</askppplt:min>
+        <askppplt:max>100</askppplt:max>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>phaThreadId-type</askppplt:name>
+        <askppplt:type>uint32</askppplt:type>
+        <askppplt:description>Thread id</askppplt:description>
+        <askppplt:min>1</askppplt:min>
+        <askppplt:max>255</askppplt:max>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>routing-mode-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies routing mode.</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>POLICY_BASED_ROUTING_ONLY</askppplt:name>
+          <askppplt:description>PBR only</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>TCAM_ROUTER_BASED</askppplt:name>
+          <askppplt:description>Router engine or PBR</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>shared-table-mode-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies table sharing modes for L3 (LPM), L2 (FDB), EM (Exact Match)</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>MID_L3_MID_L2_NO_EM</askppplt:name>
+          <askppplt:description>MID_L3_MID_L2_NO_EM</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>MID_L3_MID_L2_MIN_EM</askppplt:name>
+          <askppplt:description>MID_L3_MID_L2_MIN_EM</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>LOW_MAX_L3_MID_LOW_L2_NO_EM</askppplt:name>
+          <askppplt:description>LOW_MAX_L3_MID_LOW_L2_NO_EM</askppplt:description>
+          <askppplt:value>2</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>MAX_L3_MIN_L2_NO_EM</askppplt:name>
+          <askppplt:description>MAX_L3_MIN_L2_NO_EM</askppplt:description>
+          <askppplt:value>3</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>pha-firmware-image-id-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies supported Pha image id</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>DEFAULT</askppplt:name>
+          <askppplt:description>Default PHA firmware image ID</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>01</askppplt:name>
+          <askppplt:description>01 firmware image ID</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>02</askppplt:name>
+          <askppplt:description>02 PHA firmware image ID</askppplt:description>
+          <askppplt:value>2</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>pha-firmware-thread-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies supported Pha thread type</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>IOAM_INGRESS_SWITCH_IPV4</askppplt:name>
+          <askppplt:description>IOAM_INGRESS_SWITCH_IPV4</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>IOAM_INGRESS_SWITCH_IPV6</askppplt:name>
+          <askppplt:description>IOAM_INGRESS_SWITCH_IPV6</askppplt:description>
+          <askppplt:value>2</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>IOAM_TRANSIT_SWITCH_IPV4</askppplt:name>
+          <askppplt:description>IOAM_TRANSIT_SWITCH_IPV4</askppplt:description>
+          <askppplt:value>3</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>IOAM_TRANSIT_SWITCH_IPV6</askppplt:name>
+          <askppplt:description>IOAM_TRANSIT_SWITCH_IPV6</askppplt:description>
+          <askppplt:value>4</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>INT_IOAM_MIRRORING</askppplt:name>
+          <askppplt:description>INT_IOAM_MIRRORING</askppplt:description>
+          <askppplt:value>5</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>INT_IOAM_EGRESS_SWITCH</askppplt:name>
+          <askppplt:description>INT_IOAM_EGRESS_SWITCH</askppplt:description>
+          <askppplt:value>6</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>MPLS_SR_NO_EL</askppplt:name>
+          <askppplt:description>MPLS_SR_NO_EL</askppplt:description>
+          <askppplt:value>7</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>MPLS_SR_ONE_EL</askppplt:name>
+          <askppplt:description>MPLS_SR_ONE_EL</askppplt:description>
+          <askppplt:value>8</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>MPLS_SR_TWO_EL</askppplt:name>
+          <askppplt:description>MPLS_SR_TWO_EL</askppplt:description>
+          <askppplt:value>9</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>MPLS_SR_THREE_EL</askppplt:name>
+          <askppplt:description>MPLS_SR_THREE_EL</askppplt:description>
+          <askppplt:value>10</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>UNIFIED_SR</askppplt:name>
+          <askppplt:description>UNIFIED_SR</askppplt:description>
+          <askppplt:value>11</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>CLASSIFIER_NSH_OVER_ETHERNET</askppplt:name>
+          <askppplt:description>CLASSIFIER_NSH_OVER_ETHERNET</askppplt:description>
+          <askppplt:value>12</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>CLASSIFIER_NSH_OVER_VXLAN_GPE</askppplt:name>
+          <askppplt:description>CLASSIFIER_NSH_OVER_VXLAN_GPE</askppplt:description>
+          <askppplt:value>13</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SFF_NSH_VXLAN_GPE_TO_ETHERNET</askppplt:name>
+          <askppplt:description>SFF_NSH_VXLAN_GPE_TO_ETHERNET</askppplt:description>
+          <askppplt:value>14</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SFF_NSH_ETHERNET_TO_VXLAN_GPE</askppplt:name>
+          <askppplt:description>SFF_NSH_ETHERNET_TO_VXLAN_GPE</askppplt:description>
+          <askppplt:value>15</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>IOAM_EGRESS_SWITCH_IPV6</askppplt:name>
+          <askppplt:description>IOAM_EGRESS_SWITCH_IPV6</askppplt:description>
+          <askppplt:value>16</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_END_NODE</askppplt:name>
+          <askppplt:description>SRV6_END_NODE</askppplt:description>
+          <askppplt:value>17</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_PENULTIMATE_END_NODE</askppplt:name>
+          <askppplt:description>SRV6_PENULTIMATE_END_NODE</askppplt:description>
+          <askppplt:value>18</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_SRC_NODE_1_SEGMENT</askppplt:name>
+          <askppplt:description>SRV6_SRC_NODE_1_SEGMENT</askppplt:description>
+          <askppplt:value>19</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_SRC_NODE_FIRST_PASS_2_3_SEGMENTS</askppplt:name>
+          <askppplt:description>SRV6_SRC_NODE_FIRST_PASS_2_3_SEGMENTS</askppplt:description>
+          <askppplt:value>20</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_SRC_NODE_SECOND_PASS_3_SEGMENTS</askppplt:name>
+          <askppplt:description>SRV6_SRC_NODE_SECOND_PASS_3_SEGMENTS</askppplt:description>
+          <askppplt:value>21</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_SRC_NODE_SECOND_PASS_2_SEGMENTS</askppplt:name>
+          <askppplt:description>SRV6_SRC_NODE_SECOND_PASS_2_SEGMENTS</askppplt:description>
+          <askppplt:value>22</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_NETWORK_ADD_MSB</askppplt:name>
+          <askppplt:description>SGT_NETWORK_ADD_MSB</askppplt:description>
+          <askppplt:value>23</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_NETWORK_FIX</askppplt:name>
+          <askppplt:description>SGT_NETWORK_FIX</askppplt:description>
+          <askppplt:value>24</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_NETWORK_REMOVE</askppplt:name>
+          <askppplt:description>SGT_NETWORK_REMOVE</askppplt:description>
+          <askppplt:value>25</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_EDSA_FIX</askppplt:name>
+          <askppplt:description>SGT_EDSA_FIX</askppplt:description>
+          <askppplt:value>26</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_EDSA_REMOVE</askppplt:name>
+          <askppplt:description>SGT_EDSA_REMOVE</askppplt:description>
+          <askppplt:value>27</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_GBP_FIX_IPV4</askppplt:name>
+          <askppplt:description>SGT_GBP_FIX_IPV4</askppplt:description>
+          <askppplt:value>28</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_GBP_FIX_IPV6</askppplt:name>
+          <askppplt:description>SGT_GBP_FIX_IPV6</askppplt:description>
+          <askppplt:value>29</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_GBP_REMOVE_IPV4</askppplt:name>
+          <askppplt:description>SGT_GBP_REMOVE_IPV4</askppplt:description>
+          <askppplt:value>30</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_GBP_REMOVE_IPV6</askppplt:name>
+          <askppplt:description>SGT_GBP_REMOVE_IPV6</askppplt:description>
+          <askppplt:value>31</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>PTP_PHY_1_STEP</askppplt:name>
+          <askppplt:description>PTP_PHY_1_STEP</askppplt:description>
+          <askppplt:value>32</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>EGRESS_MIRRORING_METADATA</askppplt:name>
+          <askppplt:description>EGRESS_MIRRORING_METADATA</askppplt:description>
+          <askppplt:value>33</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>CC_ERSPAN_TYPE_II_TRG_DEV_LC_IPV4</askppplt:name>
+          <askppplt:description>CC_ERSPAN_TYPE_II_TRG_DEV_LC_IPV4</askppplt:description>
+          <askppplt:value>34</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>CC_ERSPAN_TYPE_II_TRG_DEV_LC_IPV6</askppplt:name>
+          <askppplt:description>CC_ERSPAN_TYPE_II_TRG_DEV_LC_IPV6</askppplt:description>
+          <askppplt:value>35</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>CC_ERSPAN_TYPE_II_TRG_DEV_DIRECT_IPV4</askppplt:name>
+          <askppplt:description>CC_ERSPAN_TYPE_II_TRG_DEV_DIRECT_IPV4</askppplt:description>
+          <askppplt:value>36</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>CC_ERSPAN_TYPE_II_TRG_DEV_DIRECT_IPV6</askppplt:name>
+          <askppplt:description>CC_ERSPAN_TYPE_II_TRG_DEV_DIRECT_IPV6</askppplt:description>
+          <askppplt:value>37</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>CC_ERSPAN_TYPE_II_SRC_DEV</askppplt:name>
+          <askppplt:description>CC_ERSPAN_TYPE_II_SRC_DEV</askppplt:description>
+          <askppplt:value>38</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>VXLAN_GBP_SOURCE_GROUP_POLICY_ID</askppplt:name>
+          <askppplt:description>VXLAN_GBP_SOURCE_GROUP_POLICY_ID</askppplt:description>
+          <askppplt:value>39</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_BEST_EFFORT</askppplt:name>
+          <askppplt:description>SRV6_BEST_EFFORT</askppplt:description>
+          <askppplt:value>40</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_SRC_NODE_1_CONTAINER</askppplt:name>
+          <askppplt:description>SRV6_SRC_NODE_1_CONTAINER</askppplt:description>
+          <askppplt:value>41</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_SRC_NODE_FIRST_PASS_2_3_CONTAINERS</askppplt:name>
+          <askppplt:description>SRV6_SRC_NODE_FIRST_PASS_2_3_CONTAINERS</askppplt:description>
+          <askppplt:value>42</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_SRC_NODE_SECOND_PASS_2_CONTAINERS</askppplt:name>
+          <askppplt:description>SRV6_SRC_NODE_SECOND_PASS_2_CONTAINERS</askppplt:description>
+          <askppplt:value>43</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_SRC_NODE_SECOND_PASS_3_CONTAINERS</askppplt:name>
+          <askppplt:description>SRV6_SRC_NODE_SECOND_PASS_3_CONTAINERS</askppplt:description>
+          <askppplt:value>44</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_END_NODE_COC32_GSID</askppplt:name>
+          <askppplt:description>SRV6_END_NODE_COC32_GSID</askppplt:description>
+          <askppplt:value>45</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>IPV4_TTL_INCREMENT</askppplt:name>
+          <askppplt:description>IPV4_TTL_INCREMENT</askppplt:description>
+          <askppplt:value>46</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>IPV6_HOP_LIMIT_INCREMENT</askppplt:name>
+          <askppplt:description>IPV6_HOP_LIMIT_INCREMENT</askppplt:description>
+          <askppplt:value>47</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>CLEAR_OUTGOING_MTAG_COMMAND</askppplt:name>
+          <askppplt:description>CLEAR_OUTGOING_MTAG_COMMAND</askppplt:description>
+          <askppplt:value>48</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SFLOW_V5_IPV4</askppplt:name>
+          <askppplt:description>SFLOW_V5_IPV4</askppplt:description>
+          <askppplt:value>49</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SFLOW_V5_IPV6</askppplt:name>
+          <askppplt:description>SFLOW_V5_IPV6</askppplt:description>
+          <askppplt:value>50</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SLS</askppplt:name>
+          <askppplt:description>SLS</askppplt:description>
+          <askppplt:value>51</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>trunk-member-mode-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies supported Pha image id</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>NATIVE</askppplt:name>
+          <askppplt:description>NATIVE
+*  the trunk members are filled
+*  according to the order given by application.
+*  Regular trunk may hold max of 8 members.
+*  Cascade trunk may hold :
+*  max of 64 members</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>FLEX</askppplt:name>
+          <askppplt:description>FLEX
+*  A mode to allows flexibility for
+*  each Regular trunk to state it's max number of members (before starting to add members).
+*  (this mode not effect 'cascade trunk' members)
+*  Regular trunk may hold : max of 4K members. (each trunk set it's own limit)
+*  Cascade trunk may hold : max of 64 members.</askppplt:description>
+          <askppplt:value>2</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>number-physical-port-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>AC3X/AC5X 128, falcon 64, 128, 256, 512, 1024</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>no-ports</askppplt:name>
+          <askppplt:description>no-ports</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>64-ports</askppplt:name>
+          <askppplt:description>64-ports</askppplt:description>
+          <askppplt:value>64</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>128-ports</askppplt:name>
+          <askppplt:description>128-ports</askppplt:description>
+          <askppplt:value>128</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>256-ports</askppplt:name>
+          <askppplt:description>256-ports</askppplt:description>
+          <askppplt:value>256</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>512-ports</askppplt:name>
+          <askppplt:description>512-ports</askppplt:description>
+          <askppplt:value>512</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>1024-ports</askppplt:name>
+          <askppplt:description>1024-ports</askppplt:description>
+          <askppplt:value>1024</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>serdes-ref-clock-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies serdes refernce clock.</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>external_25_single_ended</askppplt:name>
+          <askppplt:description>EXTERNAL_25_SINGLE_ENDED</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>external_125_single_ended</askppplt:name>
+          <askppplt:description>EXTERNAL_125_SINGLE_ENDED</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>external_125_diff</askppplt:name>
+          <askppplt:description>EXTERNAL_125_DIFF</askppplt:description>
+          <askppplt:value>2</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>external_156_25_single_ended</askppplt:name>
+          <askppplt:description>EXTERNAL_156_25_SINGLE_ENDED</askppplt:description>
+          <askppplt:value>3</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>external_156_25_diff</askppplt:name>
+          <askppplt:description>EXTERNAL_156_25_DIFF</askppplt:description>
+          <askppplt:value>4</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>internal_125</askppplt:name>
+          <askppplt:description>INTERNAL_125</askppplt:description>
+          <askppplt:value>5</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>cpu-port-id-type</askppplt:name>
+        <askppplt:type>uint32</askppplt:type>
+        <askppplt:description>CPU port id</askppplt:description>
+        <askppplt:min>0</askppplt:min>
+        <askppplt:max>7</askppplt:max>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>rx-buffer-size-type</askppplt:name>
+        <askppplt:type>uint32</askppplt:type>
+        <askppplt:description>Rx Buffer size</askppplt:description>
+        <askppplt:min>64</askppplt:min>
+        <askppplt:max>10240</askppplt:max>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>tx-sdma-queue-mode-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies TX queue mode.</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>Normal</askppplt:name>
+          <askppplt:description>Application</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>Packet_Generator</askppplt:name>
+          <askppplt:description>Traffic generator</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>alloc-method-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies Buffers allocation method.</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>Dynamic_Alloc</askppplt:name>
+          <askppplt:description>Dynamic</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>Static_Alloc</askppplt:name>
+          <askppplt:description>Static</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>au_mesage_lenght-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies Buffers allocation method.</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>4_words</askppplt:name>
+          <askppplt:description>4 Words</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>8_words</askppplt:name>
+          <askppplt:description>8 Words</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>boolean-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Boolean 32 bits , due to bing endian</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>false</askppplt:name>
+          <askppplt:description>False</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>true</askppplt:name>
+          <askppplt:description>True</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>asic-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>ASIC Type</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>ASIC_AC3X</askppplt:name>
+          <askppplt:description>AC3X</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>ASIC_AC5X</askppplt:name>
+          <askppplt:description>AC5X</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>ASIC_Falcon</askppplt:name>
+          <askppplt:description>FALCON</askppplt:description>
+          <askppplt:value>2</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+    </askppplt:typedefs>
+    <askppplt:ASIC_Type askppplt:type="asic-type">ASIC_Falcon</askppplt:ASIC_Type>
+    <askppplt:PPInit>
+      <askppplt:PP-name askppplt:type="std-string">Falcon-2</askppplt:PP-name>
+      <askppplt:Phase1>
+        <askppplt:coreClock askppplt:type="uint32">4294967295</askppplt:coreClock>
+        <askppplt:serdesRefClock askppplt:type="serdes-ref-clock-type">external_25_single_ended</askppplt:serdesRefClock>
+        <askppplt:isrAddrCompletionRegionsBmp askppplt:type="uint32">2</askppplt:isrAddrCompletionRegionsBmp>
+        <askppplt:appAddrCompletionRegionsBmp askppplt:type="uint32">60</askppplt:appAddrCompletionRegionsBmp>
+        <askppplt:maxNumOfPhyPortsToUse askppplt:type="number-physical-port-type">128-ports</askppplt:maxNumOfPhyPortsToUse>
+        <askppplt:tcamParityCalcEnable askppplt:type="boolean-type">false</askppplt:tcamParityCalcEnable>
+        <askppplt:apEnable askppplt:type="boolean-type">true</askppplt:apEnable>
+        <askppplt:numOfDataIntegrityElements askppplt:type="uint32">0</askppplt:numOfDataIntegrityElements>
+      </askppplt:Phase1>
+      <askppplt:Phase2>
+        <askppplt:useMultiNetIfSdma askppplt:type="boolean-type">true</askppplt:useMultiNetIfSdma>
+        <askppplt:auqCfg>
+          <askppplt:auDescNum askppplt:type="uint32">4096</askppplt:auDescNum>
+        </askppplt:auqCfg>
+        <askppplt:fuqCfg>
+          <askppplt:fuDescNum askppplt:type="uint32">2048</askppplt:fuDescNum>
+        </askppplt:fuqCfg>
+        <askppplt:multiNetIfCfg>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">0</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">7</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">6</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">5</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">4</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">3</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">2</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">1</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">0</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">7</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">6</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">5</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">4</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">3</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">2</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">1</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">0</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">7</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">6</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">5</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">4</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">3</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">2</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">1</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">0</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">7</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">6</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">5</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">4</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">3</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">2</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">1</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">0</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">1</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">2</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">3</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">4</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">5</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">6</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">7</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">0</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">1</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">2</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">3</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">4</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">5</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">6</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">7</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">0</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">1</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">2</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">3</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">4</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">5</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">6</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">7</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">0</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">1</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">2</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">3</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">4</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">5</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">6</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Packet_Generator</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">256</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">256</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">144</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">7</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Packet_Generator</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">1</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">1</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">3032</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+        </askppplt:multiNetIfCfg>
+        <askppplt:internal>
+          <askppplt:fuqUseSeparate askppplt:type="boolean-type">false</askppplt:fuqUseSeparate>
+          <askppplt:useSecondaryAuq askppplt:type="boolean-type">false</askppplt:useSecondaryAuq>
+          <askppplt:noTraffic2CPU askppplt:type="boolean-type">false</askppplt:noTraffic2CPU>
+          <askppplt:netifSdmaPortGroupId askppplt:type="uint32">0</askppplt:netifSdmaPortGroupId>
+          <askppplt:auMessageLength askppplt:type="au_mesage_lenght-type">8_words</askppplt:auMessageLength>
+          <askppplt:useDoubleAuq askppplt:type="boolean-type">false</askppplt:useDoubleAuq>
+        </askppplt:internal>
+      </askppplt:Phase2>
+      <askppplt:LogicalInit>
+        <askppplt:routingMode askppplt:type="routing-mode-type">TCAM_ROUTER_BASED</askppplt:routingMode>
+        <askppplt:maxNumOfPbrEntries askppplt:type="uint32">0</askppplt:maxNumOfPbrEntries>
+        <askppplt:sharedTableMode askppplt:type="shared-table-mode-type">MID_L3_MID_L2_NO_EM</askppplt:sharedTableMode>
+        <askppplt:ingressDropEnable askppplt:type="boolean-type">false</askppplt:ingressDropEnable>
+      </askppplt:LogicalInit>
+      <askppplt:LibInit>
+        <askppplt:initBridge askppplt:type="boolean-type">true</askppplt:initBridge>
+        <askppplt:initMirror askppplt:type="boolean-type">true</askppplt:initMirror>
+        <askppplt:initNetIf askppplt:type="boolean-type">true</askppplt:initNetIf>
+        <askppplt:initPhy askppplt:type="boolean-type">true</askppplt:initPhy>
+        <askppplt:initPort askppplt:type="boolean-type">true</askppplt:initPort>
+        <askppplt:initTrunk askppplt:type="boolean-type">true</askppplt:initTrunk>
+        <askppplt:Trunk-params>
+          <askppplt:maxNumberOfTrunks askppplt:type="uint32">1023</askppplt:maxNumberOfTrunks>
+          <askppplt:trunkMembersMode askppplt:type="trunk-member-mode-type">FLEX</askppplt:trunkMembersMode>
+        </askppplt:Trunk-params>
+        <askppplt:initPcl askppplt:type="boolean-type">true</askppplt:initPcl>
+        <askppplt:initTcam askppplt:type="boolean-type">true</askppplt:initTcam>
+        <askppplt:initPolicer askppplt:type="boolean-type">true</askppplt:initPolicer>
+        <askppplt:initPha askppplt:type="boolean-type">true</askppplt:initPha>
+        <askppplt:Pha-params>
+          <askppplt:packetOrderChangeEnable askppplt:type="boolean-type">false</askppplt:packetOrderChangeEnable>
+          <askppplt:phaFwImageId askppplt:type="pha-firmware-image-id-type">02</askppplt:phaFwImageId>
+          <askppplt:phaFwImageIdVersion askppplt:type="uint32">0</askppplt:phaFwImageIdVersion>
+        </askppplt:Pha-params>
+      </askppplt:LibInit>
+    </askppplt:PPInit>
+  </askppplt:ASK-PP>
+</data>
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/F2T80x25G/SAI-F2T_80x25G.md5 b/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/F2T80x25G/SAI-F2T_80x25G.md5
new file mode 100644
index 000000000..e804ba2cb
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/F2T80x25G/SAI-F2T_80x25G.md5
@@ -0,0 +1 @@
+fa2395cae24db38d8388f251dae7c5b4
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/F2T80x25G/SAI-F2T_80x25G.xml b/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/F2T80x25G/SAI-F2T_80x25G.xml
new file mode 100644
index 000000000..24006250e
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/F2T80x25G/SAI-F2T_80x25G.xml
@@ -0,0 +1,646 @@
+<?xml version="1.0" encoding="utf-8"?>
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-02-19-1.06" profile="SAI" sid="c310bbb1-ffca-4c99-9bae-f7d4caff5941">
+  <SAIplt:SAI xmlns:SAIplt="urn:marvell:SAI:yang">
+    <SAIplt:typedefs>
+      <SAIplt:typedef>
+        <SAIplt:name>device-id-type</SAIplt:name>
+        <SAIplt:type>uint32</SAIplt:type>
+        <SAIplt:description>Device ID 0..1</SAIplt:description>
+        <SAIplt:min>0</SAIplt:min>
+        <SAIplt:max>1</SAIplt:max>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>port-id-type</SAIplt:name>
+        <SAIplt:type>uint32</SAIplt:type>
+        <SAIplt:description>Interface number</SAIplt:description>
+        <SAIplt:min>0</SAIplt:min>
+        <SAIplt:max>1023</SAIplt:max>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>logDest-type</SAIplt:name>
+        <SAIplt:type>enumeration</SAIplt:type>
+        <SAIplt:description>Logging Feature Options</SAIplt:description>
+        <SAIplt:enum>
+          <SAIplt:name>SAI_LOG_SYSLOG</SAIplt:name>
+          <SAIplt:description>SYSLOG  {Syslog service should be running to use this option}</SAIplt:description>
+          <SAIplt:value>0</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>SAI_LOG_CONSOLE</SAIplt:name>
+          <SAIplt:description>CONSOLE</SAIplt:description>
+          <SAIplt:value>1</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>SAI_LOG_FILE</SAIplt:name>
+          <SAIplt:description>FILE  {Warning !!! Use with caution. Can cause disk full issues}</SAIplt:description>
+          <SAIplt:value>2</SAIplt:value>
+        </SAIplt:enum>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>InDropCounter-type</SAIplt:name>
+        <SAIplt:type>enumeration</SAIplt:type>
+        <SAIplt:description>Router In Drop Reason Feature Options</SAIplt:description>
+        <SAIplt:enum>
+          <SAIplt:name>TTL_HOPLIMIT_EXCEEDED</SAIplt:name>
+          <SAIplt:description>Router In Drop Counters track TTL &amp; Hop Limit Exceeded Packets</SAIplt:description>
+          <SAIplt:value>0</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>ROUTE_BLACKHOLE</SAIplt:name>
+          <SAIplt:description>Router In Drop Counters track Route Black Hole Packets</SAIplt:description>
+          <SAIplt:value>1</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>IN_DROP_ANY</SAIplt:name>
+          <SAIplt:description>Router In Drop Counters track either TTL &amp; Hop Limit Exceeded or Route Black Hole Packets</SAIplt:description>
+          <SAIplt:value>2</SAIplt:value>
+        </SAIplt:enum>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>log-dest-file-path-type</SAIplt:name>
+        <SAIplt:type>string</SAIplt:type>
+        <SAIplt:description>A string with path to file for logging feature</SAIplt:description>
+        <SAIplt:min>2</SAIplt:min>
+        <SAIplt:max>30</SAIplt:max>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>acl-feature-name-type</SAIplt:name>
+        <SAIplt:type>enumeration</SAIplt:type>
+        <SAIplt:description/>
+        <SAIplt:enum>
+          <SAIplt:name>port-sFlow</SAIplt:name>
+          <SAIplt:description>SFlow over Port</SAIplt:description>
+          <SAIplt:value>0</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>port-counters-ipv4-ipv6</SAIplt:name>
+          <SAIplt:description>Port ipv4/ipv6 counters</SAIplt:description>
+          <SAIplt:value>1</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>control-acl</SAIplt:name>
+          <SAIplt:description>ACLs for control packet handling</SAIplt:description>
+          <SAIplt:value>2</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>debug-counter-acl</SAIplt:name>
+          <SAIplt:description>ACLs for Debug Counters</SAIplt:description>
+          <SAIplt:value>3</SAIplt:value>
+        </SAIplt:enum>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>ingress-acl-stage-type</SAIplt:name>
+        <SAIplt:type>enumeration</SAIplt:type>
+        <SAIplt:description/>
+        <SAIplt:enum>
+          <SAIplt:name>disabled</SAIplt:name>
+          <SAIplt:description>Feature not enabled</SAIplt:description>
+          <SAIplt:value>0</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>IPCL0</SAIplt:name>
+          <SAIplt:description>Stage IPCL0</SAIplt:description>
+          <SAIplt:value>1</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>IPCL1</SAIplt:name>
+          <SAIplt:description>Stage IPCL1</SAIplt:description>
+          <SAIplt:value>2</SAIplt:value>
+        </SAIplt:enum>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>egress-acl-stage-type</SAIplt:name>
+        <SAIplt:type>enumeration</SAIplt:type>
+        <SAIplt:description/>
+        <SAIplt:enum>
+          <SAIplt:name>disabled</SAIplt:name>
+          <SAIplt:description>Feature not enabled</SAIplt:description>
+          <SAIplt:value>0</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>EPCL0</SAIplt:name>
+          <SAIplt:description>Stage EPCL0</SAIplt:description>
+          <SAIplt:value>2</SAIplt:value>
+        </SAIplt:enum>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>feature-priority-type</SAIplt:name>
+        <SAIplt:type>uint32</SAIplt:type>
+        <SAIplt:description>Feature priority</SAIplt:description>
+        <SAIplt:min>2</SAIplt:min>
+        <SAIplt:max>15</SAIplt:max>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>hit-number-type</SAIplt:name>
+        <SAIplt:type>uint32</SAIplt:type>
+        <SAIplt:description>Hit/lookup number</SAIplt:description>
+        <SAIplt:min>0</SAIplt:min>
+        <SAIplt:max>3</SAIplt:max>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>asic-type</SAIplt:name>
+        <SAIplt:type>enumeration</SAIplt:type>
+        <SAIplt:description>ASIC Type</SAIplt:description>
+        <SAIplt:enum>
+          <SAIplt:name>ASIC_AC3X</SAIplt:name>
+          <SAIplt:description>AC3X</SAIplt:description>
+          <SAIplt:value>0</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>ASIC_AC5X</SAIplt:name>
+          <SAIplt:description>AC5X</SAIplt:description>
+          <SAIplt:value>1</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>ASIC_Falcon</SAIplt:name>
+          <SAIplt:description>FALCON</SAIplt:description>
+          <SAIplt:value>2</SAIplt:value>
+        </SAIplt:enum>
+      </SAIplt:typedef>
+    </SAIplt:typedefs>
+    <SAIplt:ASIC_Type SAIplt:type="asic-type">ASIC_Falcon</SAIplt:ASIC_Type>
+    <SAIplt:ASK-BOARD-Profile-Name SAIplt:type="string">ASK-Board-F2T_80x25G.xml</SAIplt:ASK-BOARD-Profile-Name>
+    <SAIplt:Ports>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">0</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">82</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">1</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">81</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">2</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">80</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">3</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">79</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">4</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">78</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">5</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">77</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
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+        <SAIplt:sai_port_id SAIplt:type="port-id-type">6</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">76</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
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+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">75</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
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+        <SAIplt:sai_port_id SAIplt:type="port-id-type">8</SAIplt:sai_port_id>
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+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">74</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
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+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">27</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">53</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">26</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">54</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">25</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">55</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">24</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">56</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">23</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">57</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">22</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">58</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">21</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">59</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">20</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">60</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">19</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">61</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">18</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">62</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">17</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">63</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">16</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">64</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">15</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">65</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">14</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">66</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">13</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">67</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">12</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">68</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">11</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">69</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">10</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">70</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">9</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">71</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">8</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">72</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">7</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">73</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">6</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">74</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">5</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">75</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">4</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">76</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">3</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">77</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">2</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">78</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">1</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">79</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">0</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">80</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">83</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">81</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">84</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+    </SAIplt:Ports>
+    <SAIplt:scalingFalcon>
+      <SAIplt:max_lag_members SAIplt:type="uint32">8</SAIplt:max_lag_members>
+      <SAIplt:max_route_ipv4 SAIplt:type="uint32">0</SAIplt:max_route_ipv4>
+      <SAIplt:max_route_ipv6 SAIplt:type="uint32">0</SAIplt:max_route_ipv6>
+      <SAIplt:max_Nh_Ecmp_Mbr_Per_Grp SAIplt:type="uint32">64</SAIplt:max_Nh_Ecmp_Mbr_Per_Grp>
+      <SAIplt:max_ipv4_tunnel SAIplt:type="uint32">8</SAIplt:max_ipv4_tunnel>
+      <SAIplt:max_ipv6_tunnel SAIplt:type="uint32">8</SAIplt:max_ipv6_tunnel>
+      <SAIplt:max_tti SAIplt:type="uint32">1024</SAIplt:max_tti>
+      <SAIplt:wred_size SAIplt:type="uint32">0</SAIplt:wred_size>
+      <SAIplt:max_nat SAIplt:type="uint32">0</SAIplt:max_nat>
+    </SAIplt:scalingFalcon>
+    <SAIplt:Counters>
+      <SAIplt:cnc-base-list>
+        <SAIplt:counter-base SAIplt:type="uint32">0</SAIplt:counter-base>
+      </SAIplt:cnc-base-list>
+      <SAIplt:cnc-base-list>
+        <SAIplt:counter-base SAIplt:type="uint32">2048</SAIplt:counter-base>
+      </SAIplt:cnc-base-list>
+    </SAIplt:Counters>
+    <SAIplt:Logging>
+      <SAIplt:log_dest SAIplt:type="logDest-type">SAI_LOG_SYSLOG</SAIplt:log_dest>
+    </SAIplt:Logging>
+    <SAIplt:Features-using-acl>
+      <SAIplt:feature SAIplt:type="acl-feature-name-type">control-acl</SAIplt:feature>
+      <SAIplt:feature-priority SAIplt:type="feature-priority-type">3</SAIplt:feature-priority>
+      <SAIplt:Ingress>
+        <SAIplt:ingress-stage SAIplt:type="ingress-acl-stage-type">IPCL0</SAIplt:ingress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">1</SAIplt:hit-number>
+      </SAIplt:Ingress>
+      <SAIplt:Egress>
+        <SAIplt:egress-stage SAIplt:type="egress-acl-stage-type">EPCL0</SAIplt:egress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">0</SAIplt:hit-number>
+      </SAIplt:Egress>
+    </SAIplt:Features-using-acl>
+    <SAIplt:Features-using-acl>
+      <SAIplt:feature SAIplt:type="acl-feature-name-type">port-sFlow</SAIplt:feature>
+      <SAIplt:feature-priority SAIplt:type="feature-priority-type">4</SAIplt:feature-priority>
+      <SAIplt:Ingress>
+        <SAIplt:ingress-stage SAIplt:type="ingress-acl-stage-type">IPCL0</SAIplt:ingress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">0</SAIplt:hit-number>
+      </SAIplt:Ingress>
+      <SAIplt:Egress>
+        <SAIplt:egress-stage SAIplt:type="egress-acl-stage-type">EPCL0</SAIplt:egress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">0</SAIplt:hit-number>
+      </SAIplt:Egress>
+    </SAIplt:Features-using-acl>
+    <SAIplt:Features-using-acl>
+      <SAIplt:feature SAIplt:type="acl-feature-name-type">port-counters-ipv4-ipv6</SAIplt:feature>
+      <SAIplt:feature-priority SAIplt:type="feature-priority-type">5</SAIplt:feature-priority>
+      <SAIplt:Ingress>
+        <SAIplt:ingress-stage SAIplt:type="ingress-acl-stage-type">IPCL0</SAIplt:ingress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">3</SAIplt:hit-number>
+      </SAIplt:Ingress>
+      <SAIplt:Egress>
+        <SAIplt:egress-stage SAIplt:type="egress-acl-stage-type">EPCL0</SAIplt:egress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">0</SAIplt:hit-number>
+      </SAIplt:Egress>
+    </SAIplt:Features-using-acl>
+    <SAIplt:Features-using-acl>
+      <SAIplt:feature SAIplt:type="acl-feature-name-type">debug-counter-acl</SAIplt:feature>
+      <SAIplt:feature-priority SAIplt:type="feature-priority-type">2</SAIplt:feature-priority>
+      <SAIplt:Ingress>
+        <SAIplt:ingress-stage SAIplt:type="ingress-acl-stage-type">IPCL0</SAIplt:ingress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">1</SAIplt:hit-number>
+      </SAIplt:Ingress>
+      <SAIplt:Egress>
+        <SAIplt:egress-stage SAIplt:type="egress-acl-stage-type">EPCL0</SAIplt:egress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">0</SAIplt:hit-number>
+      </SAIplt:Egress>
+    </SAIplt:Features-using-acl>
+  </SAIplt:SAI>
+</data>
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/F2T80x25G/buffers_defaults_t0.j2 b/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/F2T80x25G/buffers_defaults_t0.j2
new file mode 100644
index 000000000..f3eaf0144
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/F2T80x25G/buffers_defaults_t0.j2
@@ -0,0 +1,36 @@
+
+{%- set default_cable = '40m' %}
+
+{%- macro generate_buffer_pool_and_profiles() %}
+    "BUFFER_POOL": {
+        "ingress_lossless_pool": {
+            "size": "21120000",
+            "type": "ingress",
+            "mode": "dynamic"
+        },
+        "egress_pool": {
+            "size": "21120000",
+            "type": "egress",
+            "mode": "static"
+        }
+    },
+    "BUFFER_PROFILE": {
+        "ingress_lossy_profile": {
+            "pool":"ingress_lossless_pool",
+            "size":"0",
+            "dynamic_th":"3"
+        },
+        "egress_lossless_profile": {
+            "pool":"egress_pool",
+            "mode": "static",
+            "size":"330000",
+            "static_th":"0"
+        },
+        "egress_lossy_profile": {
+            "pool":"egress_pool",
+            "size":"0",
+            "mode": "dynamic",
+            "dynamic_th":"3"
+        }
+    },
+{%- endmacro %}
diff --git a/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/F2T80x25G/buffers_defaults_t1.j2 b/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/F2T80x25G/buffers_defaults_t1.j2
new file mode 100644
index 000000000..f3eaf0144
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/F2T80x25G/buffers_defaults_t1.j2
@@ -0,0 +1,36 @@
+
+{%- set default_cable = '40m' %}
+
+{%- macro generate_buffer_pool_and_profiles() %}
+    "BUFFER_POOL": {
+        "ingress_lossless_pool": {
+            "size": "21120000",
+            "type": "ingress",
+            "mode": "dynamic"
+        },
+        "egress_pool": {
+            "size": "21120000",
+            "type": "egress",
+            "mode": "static"
+        }
+    },
+    "BUFFER_PROFILE": {
+        "ingress_lossy_profile": {
+            "pool":"ingress_lossless_pool",
+            "size":"0",
+            "dynamic_th":"3"
+        },
+        "egress_lossless_profile": {
+            "pool":"egress_pool",
+            "mode": "static",
+            "size":"330000",
+            "static_th":"0"
+        },
+        "egress_lossy_profile": {
+            "pool":"egress_pool",
+            "size":"0",
+            "mode": "dynamic",
+            "dynamic_th":"3"
+        }
+    },
+{%- endmacro %}
diff --git a/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/F2T80x25G/port_config.ini b/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/F2T80x25G/port_config.ini
new file mode 100644
index 000000000..e0f004920
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/F2T80x25G/port_config.ini
@@ -0,0 +1,83 @@
+#  name        lanes  alias             speed    autoneg    fec     index
+Ethernet0      0      twenty5GigE0      25000    on         none    1
+Ethernet1      1      twenty5GigE1      25000    on         none    2
+Ethernet2      2      twenty5GigE2      25000    on         none    3
+Ethernet3      3      twenty5GigE3      25000    on         none    4
+Ethernet4      4      twenty5GigE4      25000    on         none    5
+Ethernet5      5      twenty5GigE5      25000    on         none    6
+Ethernet6      6      twenty5GigE6      25000    on         none    7
+Ethernet7      7      twenty5GigE7      25000    on         none    8
+Ethernet8      8      twenty5GigE8      25000    on         none    9
+Ethernet9      9      twenty5GigE9      25000    on         none    10
+Ethernet10     10     twenty5GigE10     25000    on         none    11
+Ethernet11     11     twenty5GigE11     25000    on         none    12
+Ethernet12     12     twenty5GigE12     25000    on         none    13
+Ethernet13     13     twenty5GigE13     25000    on         none    14
+Ethernet14     14     twenty5GigE14     25000    on         none    15
+Ethernet15     15     twenty5GigE15     25000    on         none    16
+Ethernet16     16     twenty5GigE16     25000    on         none    17
+Ethernet17     17     twenty5GigE17     25000    on         none    18
+Ethernet18     18     twenty5GigE18     25000    on         none    19
+Ethernet19     19     twenty5GigE19     25000    on         none    20
+Ethernet20     20     twenty5GigE20     25000    on         none    21
+Ethernet21     21     twenty5GigE21     25000    on         none    22
+Ethernet22     22     twenty5GigE22     25000    on         none    23
+Ethernet23     23     twenty5GigE23     25000    on         none    24
+Ethernet24     24     twenty5GigE24     25000    on         none    25
+Ethernet25     25     twenty5GigE25     25000    on         none    26
+Ethernet26     26     twenty5GigE26     25000    on         none    27
+Ethernet27     27     twenty5GigE27     25000    on         none    28
+Ethernet28     28     twenty5GigE28     25000    on         none    29
+Ethernet29     29     twenty5GigE29     25000    on         none    30
+Ethernet30     30     twenty5GigE30     25000    on         none    31
+Ethernet31     31     twenty5GigE31     25000    on         none    32
+Ethernet32     32     twenty5GigE32     25000    on         none    33
+Ethernet33     33     twenty5GigE33     25000    on         none    34
+Ethernet34     34     twenty5GigE34     25000    on         none    35
+Ethernet35     35     twenty5GigE35     25000    on         none    36
+Ethernet36     36     twenty5GigE36     25000    on         none    37
+Ethernet37     37     twenty5GigE37     25000    on         none    38
+Ethernet38     38     twenty5GigE38     25000    on         none    39
+Ethernet39     39     twenty5GigE39     25000    on         none    40
+Ethernet40     40     twenty5GigE40     25000    on         none    41
+Ethernet41     41     twenty5GigE41     25000    on         none    42
+Ethernet42     42     twenty5GigE42     25000    on         none    43
+Ethernet43     43     twenty5GigE43     25000    on         none    44
+Ethernet44     44     twenty5GigE44     25000    on         none    45
+Ethernet45     45     twenty5GigE45     25000    on         none    46
+Ethernet46     46     twenty5GigE46     25000    on         none    47
+Ethernet47     47     twenty5GigE47     25000    on         none    48
+Ethernet48     48     twenty5GigE48     25000    on         none    49
+Ethernet49     49     twenty5GigE49     25000    on         none    50
+Ethernet50     50     twenty5GigE50     25000    on         none    51
+Ethernet51     51     twenty5GigE51     25000    on         none    52
+Ethernet52     52     twenty5GigE52     25000    on         none    53
+Ethernet53     53     twenty5GigE53     25000    on         none    54
+Ethernet54     54     twenty5GigE54     25000    on         none    55
+Ethernet55     55     twenty5GigE55     25000    on         none    56
+Ethernet56     56     twenty5GigE56     25000    on         none    57
+Ethernet57     57     twenty5GigE57     25000    on         none    58
+Ethernet58     58     twenty5GigE58     25000    on         none    59
+Ethernet59     59     twenty5GigE59     25000    on         none    60
+Ethernet60     60     twenty5GigE60     25000    on         none    61
+Ethernet61     61     twenty5GigE61     25000    on         none    62
+Ethernet62     62     twenty5GigE62     25000    on         none    63
+Ethernet63     63     twenty5GigE63     25000    on         none    64
+Ethernet64     64     twenty5GigE64     25000    on         none    65
+Ethernet65     65     twenty5GigE65     25000    on         none    66
+Ethernet66     66     twenty5GigE66     25000    on         none    67
+Ethernet67     67     twenty5GigE67     25000    on         none    68
+Ethernet68     68     twenty5GigE68     25000    on         none    69
+Ethernet69     69     twenty5GigE69     25000    on         none    70
+Ethernet70     70     twenty5GigE70     25000    on         none    71
+Ethernet71     71     twenty5GigE71     25000    on         none    72
+Ethernet72     72     twenty5GigE72     25000    on         none    73
+Ethernet73     73     twenty5GigE73     25000    on         none    74
+Ethernet74     74     twenty5GigE74     25000    on         none    75
+Ethernet75     75     twenty5GigE75     25000    on         none    76
+Ethernet76     76     twenty5GigE76     25000    on         none    77
+Ethernet77     77     twenty5GigE77     25000    on         none    78
+Ethernet78     78     twenty5GigE78     25000    on         none    79
+Ethernet79     79     twenty5GigE79     25000    on         none    80
+Ethernet80     80     tenGigE80         10000    off        none    81
+Ethernet81     81     tenGigE81         10000    off        none    82
diff --git a/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/F2T80x25G/profile.ini b/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/F2T80x25G/profile.ini
new file mode 100644
index 000000000..c2f77685a
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/F2T80x25G/profile.ini
@@ -0,0 +1 @@
+switchMacAddress=00:01:02:03:04:05
diff --git a/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/F2T80x25G/sai.profile b/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/F2T80x25G/sai.profile
new file mode 100755
index 000000000..e7c78a75e
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/F2T80x25G/sai.profile
@@ -0,0 +1,4 @@
+mode=1
+hwId=F2T80x25G
+switchProfile=/usr/share/sonic/hwsku/SAI-F2T_80x25G.xml
+SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/profile.ini
diff --git a/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/db98cx8514_10cc/ASK-Board-F2T_48x25G-8x100G.md5 b/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/db98cx8514_10cc/ASK-Board-F2T_48x25G-8x100G.md5
new file mode 100644
index 000000000..3e849f9f5
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/db98cx8514_10cc/ASK-Board-F2T_48x25G-8x100G.md5
@@ -0,0 +1 @@
+6eecbbbd215fe27637a19f5b01f96b51
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/db98cx8514_10cc/ASK-Board-F2T_48x25G-8x100G.xml b/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/db98cx8514_10cc/ASK-Board-F2T_48x25G-8x100G.xml
new file mode 100644
index 000000000..9eeb751c9
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/db98cx8514_10cc/ASK-Board-F2T_48x25G-8x100G.xml
@@ -0,0 +1,2153 @@
+<?xml version="1.0" encoding="utf-8"?>
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-02-19-1.06" profile="Askboard" sid="eb53f80b-5892-4f8b-9197-a6f626effaba">
+  <askboardplt:ASK-Board xmlns:askboardplt="urn:marvell:askboard:yang">
+    <askboardplt:typedefs>
+      <askboardplt:typedef>
+        <askboardplt:name>std-string</askboardplt:name>
+        <askboardplt:type>string</askboardplt:type>
+        <askboardplt:description>standard string.</askboardplt:description>
+        <askboardplt:min>1</askboardplt:min>
+        <askboardplt:max>100</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>board-callback-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies os/ext drv callback types.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>linux-static</askboardplt:name>
+          <askboardplt:description>Linux Static</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>linux-shared</askboardplt:name>
+          <askboardplt:description>Linux Shared Lib mode</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>external</askboardplt:name>
+          <askboardplt:description>External Os</askboardplt:description>
+          <askboardplt:value>3</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>freeBsd</askboardplt:name>
+          <askboardplt:description>Free BSD</askboardplt:description>
+          <askboardplt:value>4</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>board-pp-map-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies pci info types.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>fixed</askboardplt:name>
+          <askboardplt:description>Fixed</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>autoscan</askboardplt:name>
+          <askboardplt:description>Auto scan</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>board-pp-interface-channel-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies channel interface type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>pci</askboardplt:name>
+          <askboardplt:description>PCI</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>smi</askboardplt:name>
+          <askboardplt:description>SMI</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>twsi</askboardplt:name>
+          <askboardplt:description>TWSI</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>board-pp-as-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies Address space type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>4_regions</askboardplt:name>
+          <askboardplt:description>address-space 4 regions</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>8_regions</askboardplt:name>
+          <askboardplt:description>address-space 8 regions</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>atu</askboardplt:name>
+          <askboardplt:description>address translation unit</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>device-id-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Device ID 0..1</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>1</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>port-mapping-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies port map type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>ethernet_mac</askboardplt:name>
+          <askboardplt:description>ETHERNET_MAC</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>cpu_sdma</askboardplt:name>
+          <askboardplt:description>CPU_SDMA</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>interface-num-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Interface number</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>1023</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>txq-port-number-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>TXq port number </askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>99</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>phy-smi-interface-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Phy SMI interface type.</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>3</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>phy-xsmi-interface-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Phy XSMI interface type.</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>15</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>phy-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the PHY Part Identifier.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>NA</askboardplt:name>
+          <askboardplt:description>No Phy</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E1543</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E1543, used for Combo ports.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E1545</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E1545, used for Copper GE with MAC on PHY support.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E1680</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E1680, used for Copper with speeds of 10M/100M/1G.</askboardplt:description>
+          <askboardplt:value>3</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E151X</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E151X, used for Copper (HW supports combo and fiber).</askboardplt:description>
+          <askboardplt:value>4</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E3140</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E3140, used for Copper with speeds of 100M/1G/10G.
+Uses with FW SolarFlare next generation.</askboardplt:description>
+          <askboardplt:value>5</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E3240</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E3240, used for Copper with speeds of 100M/1G/10G.
+Uses with FW, SolarFlare next generation.</askboardplt:description>
+          <askboardplt:value>6</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E3680</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E3680, used for Octal Copper 100M.</askboardplt:description>
+          <askboardplt:value>7</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E3220</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E3220, used for Combo port with speeds of 100M/1G/10G.
+Uses FW, SolarFlare next generation.</askboardplt:description>
+          <askboardplt:value>8</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E1680L</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E1680L, used for Copper with speeds of 10M/100M/1G.</askboardplt:description>
+          <askboardplt:value>9</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E33X0</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E33X0, used for MGIG Combo.</askboardplt:description>
+          <askboardplt:value>10</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E1548</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E1548, used for Fiber GE.</askboardplt:description>
+          <askboardplt:value>11</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E20X0</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E20X0, used for Copper with speeds of 10M/100M/1G/2.5G/5G.</askboardplt:description>
+          <askboardplt:value>12</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E1512</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E1512, used for Copper with speeds of 10M/100M/1G.</askboardplt:description>
+          <askboardplt:value>13</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E2180</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E2180, used for Copper with speeds of 10M/100M/1G/2.5G/5G.</askboardplt:description>
+          <askboardplt:value>14</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E1780</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E1780, Integrated Octal 10/100/1000 Mbps Energy
+Efficient Ethernet Transceiver</askboardplt:description>
+          <askboardplt:value>15</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E2540</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E2540, 4 ports 10/100/1000/2.5G/5GBASE-T Ethernet
+Transceiver with IEEE 1588v2 PTP Support</askboardplt:description>
+          <askboardplt:value>16</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>alaska-88E2580</askboardplt:name>
+          <askboardplt:description>Specifies PHY identifier 88E12580, Octal 10/100/1000/2.5G/5GBASE-T Ethernet Transceiver
+with IEEE 1588v2 PTP Support</askboardplt:description>
+          <askboardplt:value>17</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>physical-port-num-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>PHYSICAL PORT NUM</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>1023</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-port-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the ledstream port type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>PORT_TYPE_TRI_SPEED</askboardplt:name>
+          <askboardplt:description>tri-speed port.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>PORT_TYPE_XG</askboardplt:name>
+          <askboardplt:description>XG port.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-blink-select-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the LED stream blink select type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_SELECT_0</askboardplt:name>
+          <askboardplt:description>Blink 0 signal.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_SELECT_1</askboardplt:name>
+          <askboardplt:description>Blink 1 signal</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-order-mode-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the LED stream ordering mode.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>ORDER_MODE_BY_PORT</askboardplt:name>
+          <askboardplt:description>the indication order is arranged by port.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>ORDER_MODE_BY_CLASS</askboardplt:name>
+          <askboardplt:description>the indication order is arranged by class.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-blink-duty-cycle-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the LED stream blink cycle duty cycle type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DUTY_CYCLE_0</askboardplt:name>
+          <askboardplt:description>25% on, 75% off.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DUTY_CYCLE_1</askboardplt:name>
+          <askboardplt:description>50% on, 50% off.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DUTY_CYCLE_2</askboardplt:name>
+          <askboardplt:description>50% on, 50% off.</askboardplt:description>
+          <askboardplt:value>3</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DUTY_CYCLE_3</askboardplt:name>
+          <askboardplt:description>75% on, 25% off.</askboardplt:description>
+          <askboardplt:value>4</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-blink-duration-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the LED stream blink period type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DURATION_0</askboardplt:name>
+          <askboardplt:description>BLINK_DURATION_0.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DURATION_1</askboardplt:name>
+          <askboardplt:description>BLINK_DURATION_1.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DURATION_2</askboardplt:name>
+          <askboardplt:description>BLINK_DURATION_2.</askboardplt:description>
+          <askboardplt:value>3</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DURATION_3</askboardplt:name>
+          <askboardplt:description>BLINK_DURATION_3.</askboardplt:description>
+          <askboardplt:value>4</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DURATION_4</askboardplt:name>
+          <askboardplt:description>BLINK_DURATION_4.</askboardplt:description>
+          <askboardplt:value>5</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DURATION_5</askboardplt:name>
+          <askboardplt:description>BLINK_DURATION_5.</askboardplt:description>
+          <askboardplt:value>6</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DURATION_6</askboardplt:name>
+          <askboardplt:description>(APPLICABLE DEVICES: xCat3; AC5; Lion2; Bobcat2; Caelum; Aldrin; AC3X; Bobcat3; Aldrin2; Pipe) .</askboardplt:description>
+          <askboardplt:value>7</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>BLINK_DURATION_7</askboardplt:name>
+          <askboardplt:description>APPLICABLE DEVICES: Bobcat2; Caelum; Aldrin; AC3X; Bobcat3; Aldrin2; Pipe).</askboardplt:description>
+          <askboardplt:value>8</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-pulse-stretch-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the LED stream length of stretching for dynamic signals.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>PULSE_STRETCH_0_NO</askboardplt:name>
+          <askboardplt:description>PULSE_STRETCH_0_NO.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>PULSE_STRETCH_1</askboardplt:name>
+          <askboardplt:description>PULSE_STRETCH_1.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>PULSE_STRETCH_2</askboardplt:name>
+          <askboardplt:description>PULSE_STRETCH_2.</askboardplt:description>
+          <askboardplt:value>3</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>PULSE_STRETCH_3</askboardplt:name>
+          <askboardplt:description>PULSE_STRETCH_3.</askboardplt:description>
+          <askboardplt:value>4</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>PULSE_STRETCH_4</askboardplt:name>
+          <askboardplt:description>PULSE_STRETCH_4.</askboardplt:description>
+          <askboardplt:value>5</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>PULSE_STRETCH_5</askboardplt:name>
+          <askboardplt:description>PULSE_STRETCH_5.</askboardplt:description>
+          <askboardplt:value>6</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>PULSE_STRETCH_6</askboardplt:name>
+          <askboardplt:description>(APPLICABLE DEVICES: Bobcat2; Caelum; Aldrin; AC3X; Bobcat3; Aldrin2; Falcon; AC5P; Pipe).</askboardplt:description>
+          <askboardplt:value>7</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>PULSE_STRETCH_7</askboardplt:name>
+          <askboardplt:description>(APPLICABLE DEVICES: Bobcat2; Caelum; Aldrin; AC3X; Bobcat3; Aldrin2; Falcon; AC5P; Pipe).</askboardplt:description>
+          <askboardplt:value>8</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-clock-out-frequency-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the LED stream blink cycle duty cycle type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>_CLOCK_OUT_FREQUENCY_500</askboardplt:name>
+          <askboardplt:description>500 KHz LED clock frequency.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>CLOCK_OUT_FREQUENCY_1000</askboardplt:name>
+          <askboardplt:description>1 MHz LED clock frequency.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>CLOCK_OUT_FREQUENCY_2000</askboardplt:name>
+          <askboardplt:description>2 MHz LED clock frequency.</askboardplt:description>
+          <askboardplt:value>3</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>CLOCK_OUT_FREQUENCY_3000</askboardplt:name>
+          <askboardplt:description>3 MHz LED clock frequency.</askboardplt:description>
+          <askboardplt:value>4</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-class5-select-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the LED stream indication displayed on class5 (for dual-media port/phy).</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>CLASS_5_SELECT_HALF_DUPLEX</askboardplt:name>
+          <askboardplt:description>Half Duplex is displayed on class5.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>CLASS_5_SELECT_FIBER_LINK_UP</askboardplt:name>
+          <askboardplt:description>If port is a dual media port, Fiber Link Up is displayed on class5.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-class13-select-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the LED stream indication displayed on class13 (for dual-media port/phy).</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>CLASS_13_SELECT_LINK_DOWN</askboardplt:name>
+          <askboardplt:description>Link Down is displayed on class13.</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>CLASS_13_SELECT_COPPER_LINK_UP</askboardplt:name>
+          <askboardplt:description>If port is a dual media port, Copper Link Up is displayed on class13.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-class-num-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Led Class number</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>11</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>boolean-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Boolean 32 bits , due to bing endian</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>false</askboardplt:name>
+          <askboardplt:description>False</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>true</askboardplt:name>
+          <askboardplt:description>True</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>bus-id-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Bus Id Type, PCI/SMI</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>255</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>function-id-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Function Id Type, PCI/SMI</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>255</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>domain-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Domain, PCI/SMI</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>255</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-interface-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Led interface</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>255</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-position-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Led position</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>63</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>serdes-lane-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>serdes lane</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>7</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>cpu-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>The CPU Internal/External</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>external</askboardplt:name>
+          <askboardplt:description>Extrenal connected CPU</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>internal</askboardplt:name>
+          <askboardplt:description>Internal CPU</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-clock-frequency-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Led Clock Frequency Sip6</askboardplt:description>
+        <askboardplt:min>500</askboardplt:min>
+        <askboardplt:max>80000</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-unit-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Led units</askboardplt:description>
+        <askboardplt:min>1</askboardplt:min>
+        <askboardplt:max>16</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-unit-or-no-unit-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Led units, 0 for no Unit</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>16</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-group-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Led Group</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>1</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-stream-force-data-type</askboardplt:name>
+        <askboardplt:type>string</askboardplt:type>
+        <askboardplt:description>A hexadecimal string with octets represented as hex digits
+separated by colons.  The canonical representation uses
+lowercase characters.</askboardplt:description>
+        <askboardplt:min>3</askboardplt:min>
+        <askboardplt:max>11</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>bit-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Bit range 0..31</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>31</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>bit-size-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Bit leng 1..32</askboardplt:description>
+        <askboardplt:min>1</askboardplt:min>
+        <askboardplt:max>32</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>led-sip-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>The LED scehme</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>na</askboardplt:name>
+          <askboardplt:description>NA</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>sip5</askboardplt:name>
+          <askboardplt:description>SIP5: AC3x</askboardplt:description>
+          <askboardplt:value>5</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>sip6</askboardplt:name>
+          <askboardplt:description>SIP6: Falcon, AC5x</askboardplt:description>
+          <askboardplt:value>6</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>port-cscd-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the cascade port type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>DSA_1_WORD</askboardplt:name>
+          <askboardplt:description>DSA Regular</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>DSA_2_WORDS</askboardplt:name>
+          <askboardplt:description>DSA Extended</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>NETWORK</askboardplt:name>
+          <askboardplt:description>Network.</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>DSA_3_WORDS</askboardplt:name>
+          <askboardplt:description>DSA 3 Words</askboardplt:description>
+          <askboardplt:value>3</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>DSA_4_WORD</askboardplt:name>
+          <askboardplt:description>DSA 4 Words</askboardplt:description>
+          <askboardplt:value>4</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>trunk-cscd-type</askboardplt:name>
+        <askboardplt:type>uint32</askboardplt:type>
+        <askboardplt:description>Specifies the Cascade Trunk id.</askboardplt:description>
+        <askboardplt:min>0</askboardplt:min>
+        <askboardplt:max>127</askboardplt:max>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>port-trunk-cscd-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the cascade port type.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>cscdPort</askboardplt:name>
+          <askboardplt:description>Cascade port</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>cscdTrunk</askboardplt:name>
+          <askboardplt:description>Csacde trunk</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>hash-cscd-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies the hash used by cascade trunk.</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>pkt</askboardplt:name>
+          <askboardplt:description>Hash based on packet</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>srcPort</askboardplt:name>
+          <askboardplt:description>Hash based on source port</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>asic-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>ASIC Type</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>ASIC_AC3X</askboardplt:name>
+          <askboardplt:description>AC3X</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>ASIC_AC5X</askboardplt:name>
+          <askboardplt:description>AC5X</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>ASIC_Falcon</askboardplt:name>
+          <askboardplt:description>FALCON</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
+    </askboardplt:typedefs>
+    <askboardplt:ASIC_Type askboardplt:type="asic-type">ASIC_Falcon</askboardplt:ASIC_Type>
+    <askboardplt:boardName askboardplt:type="std-string">ASK-Board-F2T_48x25G-8x100G</askboardplt:boardName>
+    <askboardplt:osCallType askboardplt:type="board-callback-type">linux-static</askboardplt:osCallType>
+    <askboardplt:extDrvCallType askboardplt:type="board-callback-type">linux-static</askboardplt:extDrvCallType>
+    <askboardplt:mapType askboardplt:type="board-pp-map-type">autoscan</askboardplt:mapType>
+    <askboardplt:cpuType askboardplt:type="cpu-type">external</askboardplt:cpuType>
+    <askboardplt:mngInterfaceType askboardplt:type="board-pp-interface-channel-type">pci</askboardplt:mngInterfaceType>
+    <askboardplt:adressSpaceType askboardplt:type="board-pp-as-type">atu</askboardplt:adressSpaceType>
+    <askboardplt:device-list>
+      <askboardplt:devNum askboardplt:type="device-id-type">0</askboardplt:devNum>
+      <askboardplt:deviceId askboardplt:type="device-id-type">0</askboardplt:deviceId>
+      <askboardplt:pp-profile-name askboardplt:type="std-string">ASK-PP-F2T_48x25G-8x100G.xml</askboardplt:pp-profile-name>
+      <askboardplt:L1-profile-name askboardplt:type="std-string">ASK-L1-F2T_48x25G-8x100G.xml</askboardplt:L1-profile-name>
+      <askboardplt:ledStreamType askboardplt:type="led-sip-type">sip6</askboardplt:ledStreamType>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">0</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">112</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP0</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">1</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">113</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">2</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">114</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">3</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">115</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">4</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">116</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">5</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">117</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">6</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">118</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">7</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">119</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">8</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">120</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP1</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">9</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">121</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">10</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">122</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">11</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">123</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">12</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">124</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">13</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">125</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">14</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">126</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">15</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">127</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">16</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">0</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP0</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">17</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">1</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">18</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">2</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">19</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">3</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">20</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">4</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">21</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">5</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">22</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">6</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">23</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">7</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">24</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">8</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP1</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">25</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">9</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">26</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">10</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">27</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">11</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">28</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">12</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">29</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">13</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">30</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">14</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">31</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">15</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">32</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">32</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP0</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">33</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">33</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">34</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">34</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">35</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">35</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">36</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">36</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">37</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">37</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">38</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">38</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">39</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">39</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">40</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">40</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP1</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">41</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">41</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">42</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">42</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">43</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">43</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">44</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">44</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">45</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">45</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">46</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">46</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">47</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">47</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">48</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">64</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP2</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">49</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">68</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">50</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">72</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP3</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">51</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">76</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">52</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">80</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP2</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">53</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">84</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">54</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">88</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP3</askboardplt:serdesMuxScheme>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">55</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">92</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">56</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">133</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">57</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">135</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+        <askboardplt:phy>
+          <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
+        </askboardplt:phy>
+        <askboardplt:ledstream-port>
+          <askboardplt:ledPosition askboardplt:type="led-position-type"/>
+          <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
+        </askboardplt:ledstream-port>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">63</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">cpu_sdma</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">136</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">58</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">cpu_sdma</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">137</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">59</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">cpu_sdma</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">138</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+      </askboardplt:portMap-list>
+      <askboardplt:portMap-list>
+        <askboardplt:portNumber askboardplt:type="physical-port-num-type">60</askboardplt:portNumber>
+        <askboardplt:TXQueue>
+          <askboardplt:mappingType askboardplt:type="port-mapping-type">cpu_sdma</askboardplt:mappingType>
+          <askboardplt:interfaceNum askboardplt:type="interface-num-type">139</askboardplt:interfaceNum>
+          <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
+        </askboardplt:TXQueue>
+      </askboardplt:portMap-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">64</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">65</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">66</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">67</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">68</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">69</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">70</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">71</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">79</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">78</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">77</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">76</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">75</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">74</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">73</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">72</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">0</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">1</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">2</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">3</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">4</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">5</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">6</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">7</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">15</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">14</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">13</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">12</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">11</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">10</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">9</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">8</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">16</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">17</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">18</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">19</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">20</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">21</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">22</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">23</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">31</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">30</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">29</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">28</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">27</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">26</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">25</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">24</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">32</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">35</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">33</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">34</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">37</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">39</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">36</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">38</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">47</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">44</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">46</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">45</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">42</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">40</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">43</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">41</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">48</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">51</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">49</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">50</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">53</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">55</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">52</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">54</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">63</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">60</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">62</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">61</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">58</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">56</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">59</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">57</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">80</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">false</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">true</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+      <askboardplt:laneList-list>
+        <askboardplt:laneNumber askboardplt:type="uint32">81</askboardplt:laneNumber>
+        <askboardplt:invertTx askboardplt:type="boolean-type">true</askboardplt:invertTx>
+        <askboardplt:invertRx askboardplt:type="boolean-type">false</askboardplt:invertRx>
+      </askboardplt:laneList-list>
+    </askboardplt:device-list>
+    <askboardplt:UDSFilePath askboardplt:type="std-string">/tmp/cpss_uds</askboardplt:UDSFilePath>
+    <askboardplt:serdesMux>
+      <askboardplt:serdesMuxSchemePortMod askboardplt:type="uint32">8</askboardplt:serdesMuxSchemePortMod>
+      <askboardplt:serdesMuxSchemeList>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP0</askboardplt:serdesMuxScheme>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">0</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">1</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">2</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">3</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">4</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">5</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">6</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">7</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+      </askboardplt:serdesMuxSchemeList>
+      <askboardplt:serdesMuxSchemeList>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP1</askboardplt:serdesMuxScheme>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">7</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">6</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">5</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">4</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">3</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">2</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">1</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">0</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+      </askboardplt:serdesMuxSchemeList>
+      <askboardplt:serdesMuxSchemeList>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP2</askboardplt:serdesMuxScheme>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">0</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">3</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">1</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">2</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">5</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">7</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">4</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">6</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+      </askboardplt:serdesMuxSchemeList>
+      <askboardplt:serdesMuxSchemeList>
+        <askboardplt:serdesMuxScheme askboardplt:type="string">MAP3</askboardplt:serdesMuxScheme>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">7</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">4</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">6</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">5</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">2</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">0</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">3</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+        <askboardplt:serdesMuxList>
+          <askboardplt:serdesLane askboardplt:type="serdes-lane-type">1</askboardplt:serdesLane>
+        </askboardplt:serdesMuxList>
+      </askboardplt:serdesMuxSchemeList>
+    </askboardplt:serdesMux>
+  </askboardplt:ASK-Board>
+</data>
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/db98cx8514_10cc/ASK-L1-F2T_48x25G-8x100G.md5 b/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/db98cx8514_10cc/ASK-L1-F2T_48x25G-8x100G.md5
new file mode 100644
index 000000000..5ce1720c3
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/db98cx8514_10cc/ASK-L1-F2T_48x25G-8x100G.md5
@@ -0,0 +1 @@
+06a802c61f6b37d6e1897fdf4be6ee83
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/db98cx8514_10cc/ASK-L1-F2T_48x25G-8x100G.xml b/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/db98cx8514_10cc/ASK-L1-F2T_48x25G-8x100G.xml
new file mode 100644
index 000000000..666a1eec8
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/db98cx8514_10cc/ASK-L1-F2T_48x25G-8x100G.xml
@@ -0,0 +1,1252 @@
+<?xml version="1.0" encoding="utf-8"?>
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-02-19-1.06" profile="Askl1" sid="71d3ab0f-3ac2-452a-a5c9-2dfdc969734a">
+  <ASKL1plt:ASK-L1 xmlns:ASKL1plt="urn:marvell:ASKL1:yang">
+    <ASKL1plt:typedefs>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>interface-mode-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Specifies supported Interface modes</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>1000BASE_X</ASKL1plt:name>
+          <ASKL1plt:description>1G</ASKL1plt:description>
+          <ASKL1plt:value>6</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>SGMII</ASKL1plt:name>
+          <ASKL1plt:description>1G , 2.5G</ASKL1plt:description>
+          <ASKL1plt:value>3</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>QSGMII</ASKL1plt:name>
+          <ASKL1plt:description>1G</ASKL1plt:description>
+          <ASKL1plt:value>13</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>KR</ASKL1plt:name>
+          <ASKL1plt:description>10G, 12G, 20G, 40G, 100G</ASKL1plt:description>
+          <ASKL1plt:value>16</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>SR_LR</ASKL1plt:name>
+          <ASKL1plt:description>5G, 10G, 12G, 20G, 40G</ASKL1plt:description>
+          <ASKL1plt:value>20</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>KR2</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>27</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>KR4</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>28</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>SR_LR2</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>29</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>SR_LR4</ASKL1plt:name>
+          <ASKL1plt:description>100G</ASKL1plt:description>
+          <ASKL1plt:value>30</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>KR_C</ASKL1plt:name>
+          <ASKL1plt:description>CONSORTIUM - 25G</ASKL1plt:description>
+          <ASKL1plt:value>32</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>CR_C</ASKL1plt:name>
+          <ASKL1plt:description>CONSORTIUM - 25G</ASKL1plt:description>
+          <ASKL1plt:value>33</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>KR2_C</ASKL1plt:name>
+          <ASKL1plt:description>CONSORTIUM - 50G</ASKL1plt:description>
+          <ASKL1plt:value>34</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>CR2_C</ASKL1plt:name>
+          <ASKL1plt:description>CONSORTIUM - 50G</ASKL1plt:description>
+          <ASKL1plt:value>35</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>CR</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>36</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>CR2</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>37</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>CR4</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>38</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>KR_S</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>39</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>CR_S</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>40</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>KR8</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>41</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>CR8</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>42</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>SR_LR8</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>43</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>USX_10G_QXGMII</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>51</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>USX_20G_QXGMII</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>52</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>USX_OUSGMII</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>53</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>USX_20G_OXGMII</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>54</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>NA</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>57</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>port-speed-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Specifies supported speeds</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>1G</ASKL1plt:name>
+          <ASKL1plt:description>1G</ASKL1plt:description>
+          <ASKL1plt:value>2</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>10G</ASKL1plt:name>
+          <ASKL1plt:description>10G</ASKL1plt:description>
+          <ASKL1plt:value>3</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>2500M</ASKL1plt:name>
+          <ASKL1plt:description>2.5G</ASKL1plt:description>
+          <ASKL1plt:value>5</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>5G</ASKL1plt:name>
+          <ASKL1plt:description>5G</ASKL1plt:description>
+          <ASKL1plt:value>6</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>25G</ASKL1plt:name>
+          <ASKL1plt:description>25G, used in combination with CPSS_PORT_INTERFACE_MODE_KR_E, CPSS_PORT_INTERFACE_MODE_KR2_E</ASKL1plt:description>
+          <ASKL1plt:value>21</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>40G</ASKL1plt:name>
+          <ASKL1plt:description>40G</ASKL1plt:description>
+          <ASKL1plt:value>9</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>50G</ASKL1plt:name>
+          <ASKL1plt:description>50G</ASKL1plt:description>
+          <ASKL1plt:value>14</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>100G</ASKL1plt:name>
+          <ASKL1plt:description>100G</ASKL1plt:description>
+          <ASKL1plt:value>13</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>200G</ASKL1plt:name>
+          <ASKL1plt:description>200G</ASKL1plt:description>
+          <ASKL1plt:value>24</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>400G</ASKL1plt:name>
+          <ASKL1plt:description>400G</ASKL1plt:description>
+          <ASKL1plt:value>25</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>NA</ASKL1plt:name>
+          <ASKL1plt:description>NA</ASKL1plt:description>
+          <ASKL1plt:value>35</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>fec-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Rx parameter type</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>enabled</ASKL1plt:name>
+          <ASKL1plt:description>Enabled</ASKL1plt:description>
+          <ASKL1plt:value>0</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>disabled</ASKL1plt:name>
+          <ASKL1plt:description>Disabled</ASKL1plt:description>
+          <ASKL1plt:value>1</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rs_enabled</ASKL1plt:name>
+          <ASKL1plt:description>RS FEC enabled</ASKL1plt:description>
+          <ASKL1plt:value>2</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>both_enabled</ASKL1plt:name>
+          <ASKL1plt:description>Both enabled</ASKL1plt:description>
+          <ASKL1plt:value>3</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rs_544_514_enabled</ASKL1plt:name>
+          <ASKL1plt:description>RS FEC 544 and 514</ASKL1plt:description>
+          <ASKL1plt:value>4</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>physical-port-num-type</ASKL1plt:name>
+        <ASKL1plt:type>uint32</ASKL1plt:type>
+        <ASKL1plt:description>PHYSICAL PORT NUM</ASKL1plt:description>
+        <ASKL1plt:min>0</ASKL1plt:min>
+        <ASKL1plt:max>1023</ASKL1plt:max>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>tx-param-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Tx parameter type</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>atten</ASKL1plt:name>
+          <ASKL1plt:description>atten</ASKL1plt:description>
+          <ASKL1plt:value>0</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>post</ASKL1plt:name>
+          <ASKL1plt:description>post</ASKL1plt:description>
+          <ASKL1plt:value>1</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>pre</ASKL1plt:name>
+          <ASKL1plt:description>pre</ASKL1plt:description>
+          <ASKL1plt:value>2</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>pre2</ASKL1plt:name>
+          <ASKL1plt:description>pre2</ASKL1plt:description>
+          <ASKL1plt:value>3</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>pre3</ASKL1plt:name>
+          <ASKL1plt:description>pre3</ASKL1plt:description>
+          <ASKL1plt:value>4</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>peak</ASKL1plt:name>
+          <ASKL1plt:description>peak</ASKL1plt:description>
+          <ASKL1plt:value>5</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>main</ASKL1plt:name>
+          <ASKL1plt:description>main</ASKL1plt:description>
+          <ASKL1plt:value>6</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>txAmpAdjEn</ASKL1plt:name>
+          <ASKL1plt:description>txAmpAdjEn</ASKL1plt:description>
+          <ASKL1plt:value>7</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>emph0</ASKL1plt:name>
+          <ASKL1plt:description>emph0</ASKL1plt:description>
+          <ASKL1plt:value>8</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>emph1</ASKL1plt:name>
+          <ASKL1plt:description>emph1</ASKL1plt:description>
+          <ASKL1plt:value>9</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>txAmpShft</ASKL1plt:name>
+          <ASKL1plt:description>txAmpShft</ASKL1plt:description>
+          <ASKL1plt:value>10</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>txEmphEn</ASKL1plt:name>
+          <ASKL1plt:description>txEmphEn</ASKL1plt:description>
+          <ASKL1plt:value>11</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>txEmphEn1</ASKL1plt:name>
+          <ASKL1plt:description>txEmphEn1</ASKL1plt:description>
+          <ASKL1plt:value>12</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>txAmpAdj</ASKL1plt:name>
+          <ASKL1plt:description>txAmpAdj</ASKL1plt:description>
+          <ASKL1plt:value>13</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>slewCtrlEn</ASKL1plt:name>
+          <ASKL1plt:description>slewCtrlEn</ASKL1plt:description>
+          <ASKL1plt:value>14</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>slewRate</ASKL1plt:name>
+          <ASKL1plt:description>slewRate</ASKL1plt:description>
+          <ASKL1plt:value>15</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>rx-param-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Rx parameter type</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>sqlch</ASKL1plt:name>
+          <ASKL1plt:description>sqlch</ASKL1plt:description>
+          <ASKL1plt:value>0</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>DC</ASKL1plt:name>
+          <ASKL1plt:description>DC</ASKL1plt:description>
+          <ASKL1plt:value>1</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>LF</ASKL1plt:name>
+          <ASKL1plt:description>LF</ASKL1plt:description>
+          <ASKL1plt:value>2</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>HF</ASKL1plt:name>
+          <ASKL1plt:description>HF</ASKL1plt:description>
+          <ASKL1plt:value>3</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>gainShape1</ASKL1plt:name>
+          <ASKL1plt:description>gainShape1</ASKL1plt:description>
+          <ASKL1plt:value>4</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>gainShape2</ASKL1plt:name>
+          <ASKL1plt:description>gainShape2</ASKL1plt:description>
+          <ASKL1plt:value>5</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>shortChannelEn</ASKL1plt:name>
+          <ASKL1plt:description>shortChannelEn</ASKL1plt:description>
+          <ASKL1plt:value>7</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>bfLf</ASKL1plt:name>
+          <ASKL1plt:description>bfLf</ASKL1plt:description>
+          <ASKL1plt:value>8</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>bfHf</ASKL1plt:name>
+          <ASKL1plt:description>bfHf</ASKL1plt:description>
+          <ASKL1plt:value>9</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>minLf</ASKL1plt:name>
+          <ASKL1plt:description>minLf</ASKL1plt:description>
+          <ASKL1plt:value>10</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>maxLf</ASKL1plt:name>
+          <ASKL1plt:description>maxLf</ASKL1plt:description>
+          <ASKL1plt:value>11</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>minHf</ASKL1plt:name>
+          <ASKL1plt:description>minHf</ASKL1plt:description>
+          <ASKL1plt:value>12</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>maxHf</ASKL1plt:name>
+          <ASKL1plt:description>maxHf</ASKL1plt:description>
+          <ASKL1plt:value>13</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>minPre1</ASKL1plt:name>
+          <ASKL1plt:description>minPre1</ASKL1plt:description>
+          <ASKL1plt:value>14</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>maxPre1</ASKL1plt:name>
+          <ASKL1plt:description>maxPre1</ASKL1plt:description>
+          <ASKL1plt:value>15</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>minPre2</ASKL1plt:name>
+          <ASKL1plt:description>minPre2</ASKL1plt:description>
+          <ASKL1plt:value>16</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>maxPre2</ASKL1plt:name>
+          <ASKL1plt:description/>
+          <ASKL1plt:value>17</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>minPost</ASKL1plt:name>
+          <ASKL1plt:description>minPost</ASKL1plt:description>
+          <ASKL1plt:value>18</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>maxPost</ASKL1plt:name>
+          <ASKL1plt:description>maxPost</ASKL1plt:description>
+          <ASKL1plt:value>19</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>squelch</ASKL1plt:name>
+          <ASKL1plt:description>squelch</ASKL1plt:description>
+          <ASKL1plt:value>20</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>termination</ASKL1plt:name>
+          <ASKL1plt:description>termination</ASKL1plt:description>
+          <ASKL1plt:value>27</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>coldEnvelope</ASKL1plt:name>
+          <ASKL1plt:description>coldEnvelope</ASKL1plt:description>
+          <ASKL1plt:value>35</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>hotEnvelope</ASKL1plt:name>
+          <ASKL1plt:description>hotEnvelope</ASKL1plt:description>
+          <ASKL1plt:value>36</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>dcGain</ASKL1plt:name>
+          <ASKL1plt:description>dcGain</ASKL1plt:description>
+          <ASKL1plt:value>37</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>bandWidth</ASKL1plt:name>
+          <ASKL1plt:description>bandWidth</ASKL1plt:description>
+          <ASKL1plt:value>38</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>dfe</ASKL1plt:name>
+          <ASKL1plt:description>dfe</ASKL1plt:description>
+          <ASKL1plt:value>39</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>ffeR</ASKL1plt:name>
+          <ASKL1plt:description>ffeR</ASKL1plt:description>
+          <ASKL1plt:value>40</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>ffeC</ASKL1plt:name>
+          <ASKL1plt:description>ffeC</ASKL1plt:description>
+          <ASKL1plt:value>41</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>sampler</ASKL1plt:name>
+          <ASKL1plt:description>sampler</ASKL1plt:description>
+          <ASKL1plt:value>42</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>align90</ASKL1plt:name>
+          <ASKL1plt:description>align90</ASKL1plt:description>
+          <ASKL1plt:value>43</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>ffeS</ASKL1plt:name>
+          <ASKL1plt:description>ffeS</ASKL1plt:description>
+          <ASKL1plt:value>44</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>resSel</ASKL1plt:name>
+          <ASKL1plt:description>resSel</ASKL1plt:description>
+          <ASKL1plt:value>45</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>resShift</ASKL1plt:name>
+          <ASKL1plt:description>resShift</ASKL1plt:description>
+          <ASKL1plt:value>46</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>capSel</ASKL1plt:name>
+          <ASKL1plt:description>capSel</ASKL1plt:description>
+          <ASKL1plt:value>47</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>ffeSettingForce</ASKL1plt:name>
+          <ASKL1plt:description>ffeSettingForce</ASKL1plt:description>
+          <ASKL1plt:value>48</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>adaptedResSel</ASKL1plt:name>
+          <ASKL1plt:description>adaptedResSel</ASKL1plt:description>
+          <ASKL1plt:value>49</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>adaptedCapSel</ASKL1plt:name>
+          <ASKL1plt:description>adaptedCapSel</ASKL1plt:description>
+          <ASKL1plt:value>50</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>selmufi</ASKL1plt:name>
+          <ASKL1plt:description>selmufi</ASKL1plt:description>
+          <ASKL1plt:value>51</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>selmuff</ASKL1plt:name>
+          <ASKL1plt:description>selmuff</ASKL1plt:description>
+          <ASKL1plt:value>52</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>selmupi</ASKL1plt:name>
+          <ASKL1plt:description>selmupi</ASKL1plt:description>
+          <ASKL1plt:value>53</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>selmupf</ASKL1plt:name>
+          <ASKL1plt:description>selmupf</ASKL1plt:description>
+          <ASKL1plt:value>54</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>slewRateCtrl0</ASKL1plt:name>
+          <ASKL1plt:description>slewRateCtrl0</ASKL1plt:description>
+          <ASKL1plt:value>55</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>slewRateCtrl1</ASKL1plt:name>
+          <ASKL1plt:description>slewRateCtrl1</ASKL1plt:description>
+          <ASKL1plt:value>56</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>EO</ASKL1plt:name>
+          <ASKL1plt:description>EO</ASKL1plt:description>
+          <ASKL1plt:value>57</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>dataRate</ASKL1plt:name>
+          <ASKL1plt:description>dataRate</ASKL1plt:description>
+          <ASKL1plt:value>58</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>res1Sel</ASKL1plt:name>
+          <ASKL1plt:description>res1Sel</ASKL1plt:description>
+          <ASKL1plt:value>59</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>res2Sel</ASKL1plt:name>
+          <ASKL1plt:description>res2Sel</ASKL1plt:description>
+          <ASKL1plt:value>60</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>cap1Sel</ASKL1plt:name>
+          <ASKL1plt:description>cap1Sel</ASKL1plt:description>
+          <ASKL1plt:value>61</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>cap2Sel</ASKL1plt:name>
+          <ASKL1plt:description>cap2Sel</ASKL1plt:description>
+          <ASKL1plt:value>62</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>midpointLargeThresKLane</ASKL1plt:name>
+          <ASKL1plt:description>midpointLargeThresKLane</ASKL1plt:description>
+          <ASKL1plt:value>63</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>midpointSmallThresKLane</ASKL1plt:name>
+          <ASKL1plt:description>midpointSmallThresKLane</ASKL1plt:description>
+          <ASKL1plt:value>64</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>midpointLargeThresCLane</ASKL1plt:name>
+          <ASKL1plt:description>midpointLargeThresCLane</ASKL1plt:description>
+          <ASKL1plt:value>65</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>midpointSmallThresCLane</ASKL1plt:name>
+          <ASKL1plt:description>midpointSmallThresCLane</ASKL1plt:description>
+          <ASKL1plt:value>66</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>dfeResF0aHighThresInitLane</ASKL1plt:name>
+          <ASKL1plt:description>dfeResF0aHighThresInitLane</ASKL1plt:description>
+          <ASKL1plt:value>67</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>dfeResF0aHighThresEndLane</ASKL1plt:name>
+          <ASKL1plt:description>dfeResF0aHighThresEndLane</ASKL1plt:description>
+          <ASKL1plt:value>68</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>current1Sel</ASKL1plt:name>
+          <ASKL1plt:description>current1Sel</ASKL1plt:description>
+          <ASKL1plt:value>69</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rl1Sel</ASKL1plt:name>
+          <ASKL1plt:description>rl1Sel</ASKL1plt:description>
+          <ASKL1plt:value>70</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rl1Extra</ASKL1plt:name>
+          <ASKL1plt:description>rl1Extra</ASKL1plt:description>
+          <ASKL1plt:value>71</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>cl1Ctrl</ASKL1plt:name>
+          <ASKL1plt:description>cl1Ctrl</ASKL1plt:description>
+          <ASKL1plt:value>72</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>enMidFreq</ASKL1plt:name>
+          <ASKL1plt:description>enMidFreq</ASKL1plt:description>
+          <ASKL1plt:value>73</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>cs1Mid</ASKL1plt:name>
+          <ASKL1plt:description>cs1Mid</ASKL1plt:description>
+          <ASKL1plt:value>74</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rs1Mid</ASKL1plt:name>
+          <ASKL1plt:description>rs1Mid</ASKL1plt:description>
+          <ASKL1plt:value>75</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rfCtrl</ASKL1plt:name>
+          <ASKL1plt:description>rfCtrl</ASKL1plt:description>
+          <ASKL1plt:value>76</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rl1TiaSel</ASKL1plt:name>
+          <ASKL1plt:description>rl1TiaSel</ASKL1plt:description>
+          <ASKL1plt:value>77</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rl1TiaExtra</ASKL1plt:name>
+          <ASKL1plt:description>rl1TiaExtra</ASKL1plt:description>
+          <ASKL1plt:value>78</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>hpfRSel1st</ASKL1plt:name>
+          <ASKL1plt:description>hpfRSel1st</ASKL1plt:description>
+          <ASKL1plt:value>79</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>current1TiaSel</ASKL1plt:name>
+          <ASKL1plt:description>current1TiaSel</ASKL1plt:description>
+          <ASKL1plt:value>80</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rl2Tune</ASKL1plt:name>
+          <ASKL1plt:description>rl2Tune</ASKL1plt:description>
+          <ASKL1plt:value>81</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rl2Sel</ASKL1plt:name>
+          <ASKL1plt:description>rl2Sel</ASKL1plt:description>
+          <ASKL1plt:value>82</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>rs2Sel</ASKL1plt:name>
+          <ASKL1plt:description>rs2Sel</ASKL1plt:description>
+          <ASKL1plt:value>83</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>current2Sel</ASKL1plt:name>
+          <ASKL1plt:description>current2Sel</ASKL1plt:description>
+          <ASKL1plt:value>84</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>hpfRsel2nd</ASKL1plt:name>
+          <ASKL1plt:description>hpfRsel2nd</ASKL1plt:description>
+          <ASKL1plt:value>85</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>BW</ASKL1plt:name>
+          <ASKL1plt:description>BW</ASKL1plt:description>
+          <ASKL1plt:value>86</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>dfeGAIN</ASKL1plt:name>
+          <ASKL1plt:description>dfeGAIN</ASKL1plt:description>
+          <ASKL1plt:value>87</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>dfeGAIN2</ASKL1plt:name>
+          <ASKL1plt:description>dfeGAIN2</ASKL1plt:description>
+          <ASKL1plt:value>88</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>pre1</ASKL1plt:name>
+          <ASKL1plt:description>pre1</ASKL1plt:description>
+          <ASKL1plt:value>89</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>pre2</ASKL1plt:name>
+          <ASKL1plt:description>pre2</ASKL1plt:description>
+          <ASKL1plt:value>90</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>post1</ASKL1plt:name>
+          <ASKL1plt:description>post1</ASKL1plt:description>
+          <ASKL1plt:value>91</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>boolean-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Boolean 32 bits , due to bing endian</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>false</ASKL1plt:name>
+          <ASKL1plt:description>False</ASKL1plt:description>
+          <ASKL1plt:value>0</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>true</ASKL1plt:name>
+          <ASKL1plt:description>True</ASKL1plt:description>
+          <ASKL1plt:value>1</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>serdes-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Serdes Type</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>NA</ASKL1plt:name>
+          <ASKL1plt:description>No serdes</ASKL1plt:description>
+          <ASKL1plt:value>0</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>AVAGO</ASKL1plt:name>
+          <ASKL1plt:description>AVAGO</ASKL1plt:description>
+          <ASKL1plt:value>1</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>COMPHY</ASKL1plt:name>
+          <ASKL1plt:description>COMPHY</ASKL1plt:description>
+          <ASKL1plt:value>2</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>COMPHY_C12G</ASKL1plt:name>
+          <ASKL1plt:description>COMPHY_C12G</ASKL1plt:description>
+          <ASKL1plt:value>3</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>COMPHY_C28G</ASKL1plt:name>
+          <ASKL1plt:description>COMPHY_C28G</ASKL1plt:description>
+          <ASKL1plt:value>4</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>COMPHY_C112G</ASKL1plt:name>
+          <ASKL1plt:description>COMPHY_C112G</ASKL1plt:description>
+          <ASKL1plt:value>5</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>uint8-type</ASKL1plt:name>
+        <ASKL1plt:type>uint32</ASKL1plt:type>
+        <ASKL1plt:description>Uint8 32 bits , due to bing endian</ASKL1plt:description>
+        <ASKL1plt:min>0</ASKL1plt:min>
+        <ASKL1plt:max>255</ASKL1plt:max>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>serdes-termination-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>RX termination mode</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>GND</ASKL1plt:name>
+          <ASKL1plt:description>Enabled</ASKL1plt:description>
+          <ASKL1plt:value>0</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>VDD</ASKL1plt:name>
+          <ASKL1plt:description>Disabled</ASKL1plt:description>
+          <ASKL1plt:value>1</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>FLOATING</ASKL1plt:name>
+          <ASKL1plt:description>RS FEC enabled</ASKL1plt:description>
+          <ASKL1plt:value>2</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+      <ASKL1plt:typedef>
+        <ASKL1plt:name>port-interconnect-profile-type</ASKL1plt:name>
+        <ASKL1plt:type>enumeration</ASKL1plt:type>
+        <ASKL1plt:description>Enumerator of interconnect profile.</ASKL1plt:description>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>profile_default</ASKL1plt:name>
+          <ASKL1plt:description>Profile Default</ASKL1plt:description>
+          <ASKL1plt:value>0</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>profile_1</ASKL1plt:name>
+          <ASKL1plt:description>Profile 1</ASKL1plt:description>
+          <ASKL1plt:value>1</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>profile_2</ASKL1plt:name>
+          <ASKL1plt:description>Profile 2</ASKL1plt:description>
+          <ASKL1plt:value>2</ASKL1plt:value>
+        </ASKL1plt:enum>
+      </ASKL1plt:typedef>
+    </ASKL1plt:typedefs>
+    <ASKL1plt:IfModeName>
+      <ASKL1plt:ifModeNameList>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:ifModeName>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">CR4</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">100G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">KR4</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">100G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">SR_LR4</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">100G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">CR4</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">100G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">KR4</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">100G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+      </ASKL1plt:ifModeNameList>
+      <ASKL1plt:ifModeNameList>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">10GR1Fix</ASKL1plt:ifModeName>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">KR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">10G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">disabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+      </ASKL1plt:ifModeNameList>
+      <ASKL1plt:ifModeNameList>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">CR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">25G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">KR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">25G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">KR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">10G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">SR_LR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">25G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:IfModeSpeedList-list>
+          <ASKL1plt:ifMode ASKL1plt:type="interface-mode-type">SR_LR</ASKL1plt:ifMode>
+          <ASKL1plt:speed ASKL1plt:type="port-speed-type">10G</ASKL1plt:speed>
+          <ASKL1plt:fec ASKL1plt:type="fec-type">enabled</ASKL1plt:fec>
+        </ASKL1plt:IfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">CR</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">25G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">KR</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">25G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">rs_enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+        <ASKL1plt:APIfModeSpeedList-list>
+          <ASKL1plt:APifMode ASKL1plt:type="interface-mode-type">KR</ASKL1plt:APifMode>
+          <ASKL1plt:APspeed ASKL1plt:type="port-speed-type">10G</ASKL1plt:APspeed>
+          <ASKL1plt:APfecSupport ASKL1plt:type="fec-type">enabled</ASKL1plt:APfecSupport>
+          <ASKL1plt:APfecRequest ASKL1plt:type="fec-type">enabled</ASKL1plt:APfecRequest>
+        </ASKL1plt:APIfModeSpeedList-list>
+      </ASKL1plt:ifModeNameList>
+    </ASKL1plt:IfModeName>
+    <ASKL1plt:Port>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">0</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">1</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">2</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">3</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">4</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">5</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">6</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">7</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">8</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">9</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">10</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">11</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">12</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">13</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">14</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">15</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">16</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">17</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">18</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">19</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">20</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">21</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">22</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">23</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">24</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">25</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">26</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">27</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">28</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">29</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">30</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">31</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">32</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">33</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">34</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">35</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">36</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">37</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">38</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">39</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">40</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">41</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">42</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">43</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">44</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">45</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">46</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">47</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">48</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">49</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">50</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">51</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">52</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">53</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">54</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">55</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">100GR4</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">56</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">10GR1Fix</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+      <ASKL1plt:port-list>
+        <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">57</ASKL1plt:portNumber>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
+        <ASKL1plt:ifModeName ASKL1plt:type="string">10GR1Fix</ASKL1plt:ifModeName>
+      </ASKL1plt:port-list>
+    </ASKL1plt:Port>
+  </ASKL1plt:ASK-L1>
+</data>
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/db98cx8514_10cc/ASK-PP-F2T_48x25G-8x100G.md5 b/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/db98cx8514_10cc/ASK-PP-F2T_48x25G-8x100G.md5
new file mode 100644
index 000000000..92fc07b50
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/db98cx8514_10cc/ASK-PP-F2T_48x25G-8x100G.md5
@@ -0,0 +1 @@
+72ea1b2a8dd25f7d1584a05b11c1ae0b
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/db98cx8514_10cc/ASK-PP-F2T_48x25G-8x100G.xml b/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/db98cx8514_10cc/ASK-PP-F2T_48x25G-8x100G.xml
new file mode 100644
index 000000000..288006a4a
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/db98cx8514_10cc/ASK-PP-F2T_48x25G-8x100G.xml
@@ -0,0 +1,1180 @@
+<?xml version="1.0" encoding="utf-8"?>
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-02-19-1.06" profile="Askpp" sid="34f1c14a-b581-422d-bd10-426dfac013dd">
+  <askppplt:ASK-PP xmlns:askppplt="urn:marvell:askpp:yang">
+    <askppplt:typedefs>
+      <askppplt:typedef>
+        <askppplt:name>std-string</askppplt:name>
+        <askppplt:type>string</askppplt:type>
+        <askppplt:description>standard string.</askppplt:description>
+        <askppplt:min>1</askppplt:min>
+        <askppplt:max>100</askppplt:max>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>queue-id-type</askppplt:name>
+        <askppplt:type>uint32</askppplt:type>
+        <askppplt:description>Queue id</askppplt:description>
+        <askppplt:min>0</askppplt:min>
+        <askppplt:max>7</askppplt:max>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>precent-type</askppplt:name>
+        <askppplt:type>uint32</askppplt:type>
+        <askppplt:description>Precent</askppplt:description>
+        <askppplt:min>0</askppplt:min>
+        <askppplt:max>100</askppplt:max>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>phaThreadId-type</askppplt:name>
+        <askppplt:type>uint32</askppplt:type>
+        <askppplt:description>Thread id</askppplt:description>
+        <askppplt:min>1</askppplt:min>
+        <askppplt:max>255</askppplt:max>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>routing-mode-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies routing mode.</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>POLICY_BASED_ROUTING_ONLY</askppplt:name>
+          <askppplt:description>PBR only</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>TCAM_ROUTER_BASED</askppplt:name>
+          <askppplt:description>Router engine or PBR</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>shared-table-mode-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies table sharing modes for L3 (LPM), L2 (FDB), EM (Exact Match)</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>MID_L3_MID_L2_NO_EM</askppplt:name>
+          <askppplt:description>MID_L3_MID_L2_NO_EM</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>MID_L3_MID_L2_MIN_EM</askppplt:name>
+          <askppplt:description>MID_L3_MID_L2_MIN_EM</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>LOW_MAX_L3_MID_LOW_L2_NO_EM</askppplt:name>
+          <askppplt:description>LOW_MAX_L3_MID_LOW_L2_NO_EM</askppplt:description>
+          <askppplt:value>2</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>MAX_L3_MIN_L2_NO_EM</askppplt:name>
+          <askppplt:description>MAX_L3_MIN_L2_NO_EM</askppplt:description>
+          <askppplt:value>3</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>pha-firmware-image-id-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies supported Pha image id</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>DEFAULT</askppplt:name>
+          <askppplt:description>Default PHA firmware image ID</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>01</askppplt:name>
+          <askppplt:description>01 firmware image ID</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>02</askppplt:name>
+          <askppplt:description>02 PHA firmware image ID</askppplt:description>
+          <askppplt:value>2</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>pha-firmware-thread-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies supported Pha thread type</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>IOAM_INGRESS_SWITCH_IPV4</askppplt:name>
+          <askppplt:description>IOAM_INGRESS_SWITCH_IPV4</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>IOAM_INGRESS_SWITCH_IPV6</askppplt:name>
+          <askppplt:description>IOAM_INGRESS_SWITCH_IPV6</askppplt:description>
+          <askppplt:value>2</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>IOAM_TRANSIT_SWITCH_IPV4</askppplt:name>
+          <askppplt:description>IOAM_TRANSIT_SWITCH_IPV4</askppplt:description>
+          <askppplt:value>3</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>IOAM_TRANSIT_SWITCH_IPV6</askppplt:name>
+          <askppplt:description>IOAM_TRANSIT_SWITCH_IPV6</askppplt:description>
+          <askppplt:value>4</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>INT_IOAM_MIRRORING</askppplt:name>
+          <askppplt:description>INT_IOAM_MIRRORING</askppplt:description>
+          <askppplt:value>5</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>INT_IOAM_EGRESS_SWITCH</askppplt:name>
+          <askppplt:description>INT_IOAM_EGRESS_SWITCH</askppplt:description>
+          <askppplt:value>6</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>MPLS_SR_NO_EL</askppplt:name>
+          <askppplt:description>MPLS_SR_NO_EL</askppplt:description>
+          <askppplt:value>7</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>MPLS_SR_ONE_EL</askppplt:name>
+          <askppplt:description>MPLS_SR_ONE_EL</askppplt:description>
+          <askppplt:value>8</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>MPLS_SR_TWO_EL</askppplt:name>
+          <askppplt:description>MPLS_SR_TWO_EL</askppplt:description>
+          <askppplt:value>9</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>MPLS_SR_THREE_EL</askppplt:name>
+          <askppplt:description>MPLS_SR_THREE_EL</askppplt:description>
+          <askppplt:value>10</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>UNIFIED_SR</askppplt:name>
+          <askppplt:description>UNIFIED_SR</askppplt:description>
+          <askppplt:value>11</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>CLASSIFIER_NSH_OVER_ETHERNET</askppplt:name>
+          <askppplt:description>CLASSIFIER_NSH_OVER_ETHERNET</askppplt:description>
+          <askppplt:value>12</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>CLASSIFIER_NSH_OVER_VXLAN_GPE</askppplt:name>
+          <askppplt:description>CLASSIFIER_NSH_OVER_VXLAN_GPE</askppplt:description>
+          <askppplt:value>13</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SFF_NSH_VXLAN_GPE_TO_ETHERNET</askppplt:name>
+          <askppplt:description>SFF_NSH_VXLAN_GPE_TO_ETHERNET</askppplt:description>
+          <askppplt:value>14</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SFF_NSH_ETHERNET_TO_VXLAN_GPE</askppplt:name>
+          <askppplt:description>SFF_NSH_ETHERNET_TO_VXLAN_GPE</askppplt:description>
+          <askppplt:value>15</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>IOAM_EGRESS_SWITCH_IPV6</askppplt:name>
+          <askppplt:description>IOAM_EGRESS_SWITCH_IPV6</askppplt:description>
+          <askppplt:value>16</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_END_NODE</askppplt:name>
+          <askppplt:description>SRV6_END_NODE</askppplt:description>
+          <askppplt:value>17</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_PENULTIMATE_END_NODE</askppplt:name>
+          <askppplt:description>SRV6_PENULTIMATE_END_NODE</askppplt:description>
+          <askppplt:value>18</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_SRC_NODE_1_SEGMENT</askppplt:name>
+          <askppplt:description>SRV6_SRC_NODE_1_SEGMENT</askppplt:description>
+          <askppplt:value>19</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_SRC_NODE_FIRST_PASS_2_3_SEGMENTS</askppplt:name>
+          <askppplt:description>SRV6_SRC_NODE_FIRST_PASS_2_3_SEGMENTS</askppplt:description>
+          <askppplt:value>20</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_SRC_NODE_SECOND_PASS_3_SEGMENTS</askppplt:name>
+          <askppplt:description>SRV6_SRC_NODE_SECOND_PASS_3_SEGMENTS</askppplt:description>
+          <askppplt:value>21</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_SRC_NODE_SECOND_PASS_2_SEGMENTS</askppplt:name>
+          <askppplt:description>SRV6_SRC_NODE_SECOND_PASS_2_SEGMENTS</askppplt:description>
+          <askppplt:value>22</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_NETWORK_ADD_MSB</askppplt:name>
+          <askppplt:description>SGT_NETWORK_ADD_MSB</askppplt:description>
+          <askppplt:value>23</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_NETWORK_FIX</askppplt:name>
+          <askppplt:description>SGT_NETWORK_FIX</askppplt:description>
+          <askppplt:value>24</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_NETWORK_REMOVE</askppplt:name>
+          <askppplt:description>SGT_NETWORK_REMOVE</askppplt:description>
+          <askppplt:value>25</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_EDSA_FIX</askppplt:name>
+          <askppplt:description>SGT_EDSA_FIX</askppplt:description>
+          <askppplt:value>26</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_EDSA_REMOVE</askppplt:name>
+          <askppplt:description>SGT_EDSA_REMOVE</askppplt:description>
+          <askppplt:value>27</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_GBP_FIX_IPV4</askppplt:name>
+          <askppplt:description>SGT_GBP_FIX_IPV4</askppplt:description>
+          <askppplt:value>28</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_GBP_FIX_IPV6</askppplt:name>
+          <askppplt:description>SGT_GBP_FIX_IPV6</askppplt:description>
+          <askppplt:value>29</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_GBP_REMOVE_IPV4</askppplt:name>
+          <askppplt:description>SGT_GBP_REMOVE_IPV4</askppplt:description>
+          <askppplt:value>30</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SGT_GBP_REMOVE_IPV6</askppplt:name>
+          <askppplt:description>SGT_GBP_REMOVE_IPV6</askppplt:description>
+          <askppplt:value>31</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>PTP_PHY_1_STEP</askppplt:name>
+          <askppplt:description>PTP_PHY_1_STEP</askppplt:description>
+          <askppplt:value>32</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>EGRESS_MIRRORING_METADATA</askppplt:name>
+          <askppplt:description>EGRESS_MIRRORING_METADATA</askppplt:description>
+          <askppplt:value>33</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>CC_ERSPAN_TYPE_II_TRG_DEV_LC_IPV4</askppplt:name>
+          <askppplt:description>CC_ERSPAN_TYPE_II_TRG_DEV_LC_IPV4</askppplt:description>
+          <askppplt:value>34</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>CC_ERSPAN_TYPE_II_TRG_DEV_LC_IPV6</askppplt:name>
+          <askppplt:description>CC_ERSPAN_TYPE_II_TRG_DEV_LC_IPV6</askppplt:description>
+          <askppplt:value>35</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>CC_ERSPAN_TYPE_II_TRG_DEV_DIRECT_IPV4</askppplt:name>
+          <askppplt:description>CC_ERSPAN_TYPE_II_TRG_DEV_DIRECT_IPV4</askppplt:description>
+          <askppplt:value>36</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>CC_ERSPAN_TYPE_II_TRG_DEV_DIRECT_IPV6</askppplt:name>
+          <askppplt:description>CC_ERSPAN_TYPE_II_TRG_DEV_DIRECT_IPV6</askppplt:description>
+          <askppplt:value>37</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>CC_ERSPAN_TYPE_II_SRC_DEV</askppplt:name>
+          <askppplt:description>CC_ERSPAN_TYPE_II_SRC_DEV</askppplt:description>
+          <askppplt:value>38</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>VXLAN_GBP_SOURCE_GROUP_POLICY_ID</askppplt:name>
+          <askppplt:description>VXLAN_GBP_SOURCE_GROUP_POLICY_ID</askppplt:description>
+          <askppplt:value>39</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_BEST_EFFORT</askppplt:name>
+          <askppplt:description>SRV6_BEST_EFFORT</askppplt:description>
+          <askppplt:value>40</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_SRC_NODE_1_CONTAINER</askppplt:name>
+          <askppplt:description>SRV6_SRC_NODE_1_CONTAINER</askppplt:description>
+          <askppplt:value>41</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_SRC_NODE_FIRST_PASS_2_3_CONTAINERS</askppplt:name>
+          <askppplt:description>SRV6_SRC_NODE_FIRST_PASS_2_3_CONTAINERS</askppplt:description>
+          <askppplt:value>42</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_SRC_NODE_SECOND_PASS_2_CONTAINERS</askppplt:name>
+          <askppplt:description>SRV6_SRC_NODE_SECOND_PASS_2_CONTAINERS</askppplt:description>
+          <askppplt:value>43</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_SRC_NODE_SECOND_PASS_3_CONTAINERS</askppplt:name>
+          <askppplt:description>SRV6_SRC_NODE_SECOND_PASS_3_CONTAINERS</askppplt:description>
+          <askppplt:value>44</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SRV6_END_NODE_COC32_GSID</askppplt:name>
+          <askppplt:description>SRV6_END_NODE_COC32_GSID</askppplt:description>
+          <askppplt:value>45</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>IPV4_TTL_INCREMENT</askppplt:name>
+          <askppplt:description>IPV4_TTL_INCREMENT</askppplt:description>
+          <askppplt:value>46</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>IPV6_HOP_LIMIT_INCREMENT</askppplt:name>
+          <askppplt:description>IPV6_HOP_LIMIT_INCREMENT</askppplt:description>
+          <askppplt:value>47</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>CLEAR_OUTGOING_MTAG_COMMAND</askppplt:name>
+          <askppplt:description>CLEAR_OUTGOING_MTAG_COMMAND</askppplt:description>
+          <askppplt:value>48</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SFLOW_V5_IPV4</askppplt:name>
+          <askppplt:description>SFLOW_V5_IPV4</askppplt:description>
+          <askppplt:value>49</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SFLOW_V5_IPV6</askppplt:name>
+          <askppplt:description>SFLOW_V5_IPV6</askppplt:description>
+          <askppplt:value>50</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>SLS</askppplt:name>
+          <askppplt:description>SLS</askppplt:description>
+          <askppplt:value>51</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>trunk-member-mode-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies supported Pha image id</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>NATIVE</askppplt:name>
+          <askppplt:description>NATIVE
+*  the trunk members are filled
+*  according to the order given by application.
+*  Regular trunk may hold max of 8 members.
+*  Cascade trunk may hold :
+*  max of 64 members</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>FLEX</askppplt:name>
+          <askppplt:description>FLEX
+*  A mode to allows flexibility for
+*  each Regular trunk to state it's max number of members (before starting to add members).
+*  (this mode not effect 'cascade trunk' members)
+*  Regular trunk may hold : max of 4K members. (each trunk set it's own limit)
+*  Cascade trunk may hold : max of 64 members.</askppplt:description>
+          <askppplt:value>2</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>number-physical-port-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>AC3X/AC5X 128, falcon 64, 128, 256, 512, 1024</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>no-ports</askppplt:name>
+          <askppplt:description>no-ports</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>64-ports</askppplt:name>
+          <askppplt:description>64-ports</askppplt:description>
+          <askppplt:value>64</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>128-ports</askppplt:name>
+          <askppplt:description>128-ports</askppplt:description>
+          <askppplt:value>128</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>256-ports</askppplt:name>
+          <askppplt:description>256-ports</askppplt:description>
+          <askppplt:value>256</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>512-ports</askppplt:name>
+          <askppplt:description>512-ports</askppplt:description>
+          <askppplt:value>512</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>1024-ports</askppplt:name>
+          <askppplt:description>1024-ports</askppplt:description>
+          <askppplt:value>1024</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>serdes-ref-clock-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies serdes refernce clock.</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>external_25_single_ended</askppplt:name>
+          <askppplt:description>EXTERNAL_25_SINGLE_ENDED</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>external_125_single_ended</askppplt:name>
+          <askppplt:description>EXTERNAL_125_SINGLE_ENDED</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>external_125_diff</askppplt:name>
+          <askppplt:description>EXTERNAL_125_DIFF</askppplt:description>
+          <askppplt:value>2</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>external_156_25_single_ended</askppplt:name>
+          <askppplt:description>EXTERNAL_156_25_SINGLE_ENDED</askppplt:description>
+          <askppplt:value>3</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>external_156_25_diff</askppplt:name>
+          <askppplt:description>EXTERNAL_156_25_DIFF</askppplt:description>
+          <askppplt:value>4</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>internal_125</askppplt:name>
+          <askppplt:description>INTERNAL_125</askppplt:description>
+          <askppplt:value>5</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>cpu-port-id-type</askppplt:name>
+        <askppplt:type>uint32</askppplt:type>
+        <askppplt:description>CPU port id</askppplt:description>
+        <askppplt:min>0</askppplt:min>
+        <askppplt:max>7</askppplt:max>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>rx-buffer-size-type</askppplt:name>
+        <askppplt:type>uint32</askppplt:type>
+        <askppplt:description>Rx Buffer size</askppplt:description>
+        <askppplt:min>64</askppplt:min>
+        <askppplt:max>10240</askppplt:max>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>tx-sdma-queue-mode-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies TX queue mode.</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>Normal</askppplt:name>
+          <askppplt:description>Application</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>Packet_Generator</askppplt:name>
+          <askppplt:description>Traffic generator</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>alloc-method-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies Buffers allocation method.</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>Dynamic_Alloc</askppplt:name>
+          <askppplt:description>Dynamic</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>Static_Alloc</askppplt:name>
+          <askppplt:description>Static</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>au_mesage_lenght-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Specifies Buffers allocation method.</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>4_words</askppplt:name>
+          <askppplt:description>4 Words</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>8_words</askppplt:name>
+          <askppplt:description>8 Words</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>boolean-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>Boolean 32 bits , due to bing endian</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>false</askppplt:name>
+          <askppplt:description>False</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>true</askppplt:name>
+          <askppplt:description>True</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>asic-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>ASIC Type</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>ASIC_AC3X</askppplt:name>
+          <askppplt:description>AC3X</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>ASIC_AC5X</askppplt:name>
+          <askppplt:description>AC5X</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>ASIC_Falcon</askppplt:name>
+          <askppplt:description>FALCON</askppplt:description>
+          <askppplt:value>2</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
+    </askppplt:typedefs>
+    <askppplt:ASIC_Type askppplt:type="asic-type">ASIC_Falcon</askppplt:ASIC_Type>
+    <askppplt:PPInit>
+      <askppplt:PP-name askppplt:type="std-string">Falcon-2</askppplt:PP-name>
+      <askppplt:Phase1>
+        <askppplt:coreClock askppplt:type="uint32">4294967295</askppplt:coreClock>
+        <askppplt:serdesRefClock askppplt:type="serdes-ref-clock-type">external_25_single_ended</askppplt:serdesRefClock>
+        <askppplt:isrAddrCompletionRegionsBmp askppplt:type="uint32">2</askppplt:isrAddrCompletionRegionsBmp>
+        <askppplt:appAddrCompletionRegionsBmp askppplt:type="uint32">60</askppplt:appAddrCompletionRegionsBmp>
+        <askppplt:maxNumOfPhyPortsToUse askppplt:type="number-physical-port-type">64-ports</askppplt:maxNumOfPhyPortsToUse>
+        <askppplt:tcamParityCalcEnable askppplt:type="boolean-type">false</askppplt:tcamParityCalcEnable>
+        <askppplt:apEnable askppplt:type="boolean-type">true</askppplt:apEnable>
+        <askppplt:numOfDataIntegrityElements askppplt:type="uint32">0</askppplt:numOfDataIntegrityElements>
+      </askppplt:Phase1>
+      <askppplt:Phase2>
+        <askppplt:useMultiNetIfSdma askppplt:type="boolean-type">true</askppplt:useMultiNetIfSdma>
+        <askppplt:auqCfg>
+          <askppplt:auDescNum askppplt:type="uint32">4096</askppplt:auDescNum>
+        </askppplt:auqCfg>
+        <askppplt:fuqCfg>
+          <askppplt:fuDescNum askppplt:type="uint32">2048</askppplt:fuDescNum>
+        </askppplt:fuqCfg>
+        <askppplt:multiNetIfCfg>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">0</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">7</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">6</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">5</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">4</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">3</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">2</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">1</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">0</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">7</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">6</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">5</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">4</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">3</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">2</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">1</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">0</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">7</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">6</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">5</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">4</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">3</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">2</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">1</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">0</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">7</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">6</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">5</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">4</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">3</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">2</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:rxSdmaQueuesConfig-list>
+            <askppplt:rx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:rx_sdma_cpu_port>
+            <askppplt:rx_sdma_cpu_queue askppplt:type="queue-id-type">1</askppplt:rx_sdma_cpu_queue>
+            <askppplt:buffAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAllocMethod>
+            <askppplt:numOfRxDesc askppplt:type="uint32">20</askppplt:numOfRxDesc>
+            <askppplt:numOfRxBuff askppplt:type="uint32">20</askppplt:numOfRxBuff>
+            <askppplt:buffSize askppplt:type="rx-buffer-size-type">2048</askppplt:buffSize>
+            <askppplt:buffHeaderOffset askppplt:type="uint32">0</askppplt:buffHeaderOffset>
+          </askppplt:rxSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">0</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">1</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">2</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">3</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">4</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">5</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">6</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">0</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">7</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">0</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">1</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">2</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">3</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">4</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">5</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">6</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">1</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">7</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">0</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">1</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">2</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">3</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">4</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">5</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">6</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">2</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">7</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">0</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">1</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">2</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">3</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">4</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">5</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Normal</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">20</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">0</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">128</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">6</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Packet_Generator</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">256</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">256</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">144</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+          <askppplt:txSdmaQueuesConfig-list>
+            <askppplt:tx_sdma_cpu_port askppplt:type="cpu-port-id-type">3</askppplt:tx_sdma_cpu_port>
+            <askppplt:tx_sdma_cpu_queue askppplt:type="queue-id-type">7</askppplt:tx_sdma_cpu_queue>
+            <askppplt:buffAndDescAllocMethod askppplt:type="alloc-method-type">Static_Alloc</askppplt:buffAndDescAllocMethod>
+            <askppplt:queueMode askppplt:type="tx-sdma-queue-mode-type">Packet_Generator</askppplt:queueMode>
+            <askppplt:numOfTxDesc askppplt:type="uint32">1</askppplt:numOfTxDesc>
+            <askppplt:numOfTxBuff askppplt:type="uint32">1</askppplt:numOfTxBuff>
+            <askppplt:TxBuffSize askppplt:type="rx-buffer-size-type">3032</askppplt:TxBuffSize>
+          </askppplt:txSdmaQueuesConfig-list>
+        </askppplt:multiNetIfCfg>
+        <askppplt:internal>
+          <askppplt:fuqUseSeparate askppplt:type="boolean-type">false</askppplt:fuqUseSeparate>
+          <askppplt:useSecondaryAuq askppplt:type="boolean-type">false</askppplt:useSecondaryAuq>
+          <askppplt:noTraffic2CPU askppplt:type="boolean-type">false</askppplt:noTraffic2CPU>
+          <askppplt:netifSdmaPortGroupId askppplt:type="uint32">0</askppplt:netifSdmaPortGroupId>
+          <askppplt:auMessageLength askppplt:type="au_mesage_lenght-type">8_words</askppplt:auMessageLength>
+          <askppplt:useDoubleAuq askppplt:type="boolean-type">false</askppplt:useDoubleAuq>
+        </askppplt:internal>
+      </askppplt:Phase2>
+      <askppplt:LogicalInit>
+        <askppplt:routingMode askppplt:type="routing-mode-type">TCAM_ROUTER_BASED</askppplt:routingMode>
+        <askppplt:maxNumOfPbrEntries askppplt:type="uint32">0</askppplt:maxNumOfPbrEntries>
+        <askppplt:sharedTableMode askppplt:type="shared-table-mode-type">MID_L3_MID_L2_NO_EM</askppplt:sharedTableMode>
+        <askppplt:ingressDropEnable askppplt:type="boolean-type">false</askppplt:ingressDropEnable>
+      </askppplt:LogicalInit>
+      <askppplt:LibInit>
+        <askppplt:initBridge askppplt:type="boolean-type">true</askppplt:initBridge>
+        <askppplt:initMirror askppplt:type="boolean-type">true</askppplt:initMirror>
+        <askppplt:initNetIf askppplt:type="boolean-type">true</askppplt:initNetIf>
+        <askppplt:initPhy askppplt:type="boolean-type">true</askppplt:initPhy>
+        <askppplt:initPort askppplt:type="boolean-type">true</askppplt:initPort>
+        <askppplt:initTrunk askppplt:type="boolean-type">true</askppplt:initTrunk>
+        <askppplt:Trunk-params>
+          <askppplt:maxNumberOfTrunks askppplt:type="uint32">1023</askppplt:maxNumberOfTrunks>
+          <askppplt:trunkMembersMode askppplt:type="trunk-member-mode-type">FLEX</askppplt:trunkMembersMode>
+        </askppplt:Trunk-params>
+        <askppplt:initPcl askppplt:type="boolean-type">true</askppplt:initPcl>
+        <askppplt:initTcam askppplt:type="boolean-type">true</askppplt:initTcam>
+        <askppplt:initPolicer askppplt:type="boolean-type">true</askppplt:initPolicer>
+        <askppplt:initPha askppplt:type="boolean-type">true</askppplt:initPha>
+        <askppplt:Pha-params>
+          <askppplt:packetOrderChangeEnable askppplt:type="boolean-type">false</askppplt:packetOrderChangeEnable>
+          <askppplt:phaFwImageId askppplt:type="pha-firmware-image-id-type">02</askppplt:phaFwImageId>
+          <askppplt:phaFwImageIdVersion askppplt:type="uint32">0</askppplt:phaFwImageIdVersion>
+        </askppplt:Pha-params>
+      </askppplt:LibInit>
+    </askppplt:PPInit>
+  </askppplt:ASK-PP>
+</data>
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/db98cx8514_10cc/SAI-F2T_48x25G-8x100G.md5 b/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/db98cx8514_10cc/SAI-F2T_48x25G-8x100G.md5
new file mode 100644
index 000000000..8f24db9ff
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/db98cx8514_10cc/SAI-F2T_48x25G-8x100G.md5
@@ -0,0 +1 @@
+cdd0dffb9811802ae6b98caa7b62b96b
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/db98cx8514_10cc/SAI-F2T_48x25G-8x100G.xml b/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/db98cx8514_10cc/SAI-F2T_48x25G-8x100G.xml
new file mode 100644
index 000000000..973cc465d
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/db98cx8514_10cc/SAI-F2T_48x25G-8x100G.xml
@@ -0,0 +1,523 @@
+<?xml version="1.0" encoding="utf-8"?>
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-02-19-1.06" profile="SAI" sid="c310bbb1-ffca-4c99-9bae-f7d4caff5941">
+  <SAIplt:SAI xmlns:SAIplt="urn:marvell:SAI:yang">
+    <SAIplt:typedefs>
+      <SAIplt:typedef>
+        <SAIplt:name>device-id-type</SAIplt:name>
+        <SAIplt:type>uint32</SAIplt:type>
+        <SAIplt:description>Device ID 0..1</SAIplt:description>
+        <SAIplt:min>0</SAIplt:min>
+        <SAIplt:max>1</SAIplt:max>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>port-id-type</SAIplt:name>
+        <SAIplt:type>uint32</SAIplt:type>
+        <SAIplt:description>Interface number</SAIplt:description>
+        <SAIplt:min>0</SAIplt:min>
+        <SAIplt:max>1023</SAIplt:max>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>logDest-type</SAIplt:name>
+        <SAIplt:type>enumeration</SAIplt:type>
+        <SAIplt:description>Logging Feature Options</SAIplt:description>
+        <SAIplt:enum>
+          <SAIplt:name>SAI_LOG_SYSLOG</SAIplt:name>
+          <SAIplt:description>SYSLOG  {Syslog service should be running to use this option}</SAIplt:description>
+          <SAIplt:value>0</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>SAI_LOG_CONSOLE</SAIplt:name>
+          <SAIplt:description>CONSOLE</SAIplt:description>
+          <SAIplt:value>1</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>SAI_LOG_FILE</SAIplt:name>
+          <SAIplt:description>FILE  {Warning !!! Use with caution. Can cause disk full issues}</SAIplt:description>
+          <SAIplt:value>2</SAIplt:value>
+        </SAIplt:enum>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>InDropCounter-type</SAIplt:name>
+        <SAIplt:type>enumeration</SAIplt:type>
+        <SAIplt:description>Router In Drop Reason Feature Options</SAIplt:description>
+        <SAIplt:enum>
+          <SAIplt:name>TTL_HOPLIMIT_EXCEEDED</SAIplt:name>
+          <SAIplt:description>Router In Drop Counters track TTL &amp; Hop Limit Exceeded Packets</SAIplt:description>
+          <SAIplt:value>0</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>ROUTE_BLACKHOLE</SAIplt:name>
+          <SAIplt:description>Router In Drop Counters track Route Black Hole Packets</SAIplt:description>
+          <SAIplt:value>1</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>IN_DROP_ANY</SAIplt:name>
+          <SAIplt:description>Router In Drop Counters track either TTL &amp; Hop Limit Exceeded or Route Black Hole Packets</SAIplt:description>
+          <SAIplt:value>2</SAIplt:value>
+        </SAIplt:enum>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>log-dest-file-path-type</SAIplt:name>
+        <SAIplt:type>string</SAIplt:type>
+        <SAIplt:description>A string with path to file for logging feature</SAIplt:description>
+        <SAIplt:min>2</SAIplt:min>
+        <SAIplt:max>30</SAIplt:max>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>acl-feature-name-type</SAIplt:name>
+        <SAIplt:type>enumeration</SAIplt:type>
+        <SAIplt:description/>
+        <SAIplt:enum>
+          <SAIplt:name>port-sFlow</SAIplt:name>
+          <SAIplt:description>SFlow over Port</SAIplt:description>
+          <SAIplt:value>0</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>port-counters-ipv4-ipv6</SAIplt:name>
+          <SAIplt:description>Port ipv4/ipv6 counters</SAIplt:description>
+          <SAIplt:value>1</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>control-acl</SAIplt:name>
+          <SAIplt:description>ACLs for control packet handling</SAIplt:description>
+          <SAIplt:value>2</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>debug-counter-acl</SAIplt:name>
+          <SAIplt:description>ACLs for Debug Counters</SAIplt:description>
+          <SAIplt:value>3</SAIplt:value>
+        </SAIplt:enum>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>ingress-acl-stage-type</SAIplt:name>
+        <SAIplt:type>enumeration</SAIplt:type>
+        <SAIplt:description/>
+        <SAIplt:enum>
+          <SAIplt:name>disabled</SAIplt:name>
+          <SAIplt:description>Feature not enabled</SAIplt:description>
+          <SAIplt:value>0</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>IPCL0</SAIplt:name>
+          <SAIplt:description>Stage IPCL0</SAIplt:description>
+          <SAIplt:value>1</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>IPCL1</SAIplt:name>
+          <SAIplt:description>Stage IPCL1</SAIplt:description>
+          <SAIplt:value>2</SAIplt:value>
+        </SAIplt:enum>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>egress-acl-stage-type</SAIplt:name>
+        <SAIplt:type>enumeration</SAIplt:type>
+        <SAIplt:description/>
+        <SAIplt:enum>
+          <SAIplt:name>disabled</SAIplt:name>
+          <SAIplt:description>Feature not enabled</SAIplt:description>
+          <SAIplt:value>0</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>EPCL0</SAIplt:name>
+          <SAIplt:description>Stage EPCL0</SAIplt:description>
+          <SAIplt:value>2</SAIplt:value>
+        </SAIplt:enum>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>feature-priority-type</SAIplt:name>
+        <SAIplt:type>uint32</SAIplt:type>
+        <SAIplt:description>Feature priority</SAIplt:description>
+        <SAIplt:min>2</SAIplt:min>
+        <SAIplt:max>15</SAIplt:max>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>hit-number-type</SAIplt:name>
+        <SAIplt:type>uint32</SAIplt:type>
+        <SAIplt:description>Hit/lookup number</SAIplt:description>
+        <SAIplt:min>0</SAIplt:min>
+        <SAIplt:max>3</SAIplt:max>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>asic-type</SAIplt:name>
+        <SAIplt:type>enumeration</SAIplt:type>
+        <SAIplt:description>ASIC Type</SAIplt:description>
+        <SAIplt:enum>
+          <SAIplt:name>ASIC_AC3X</SAIplt:name>
+          <SAIplt:description>AC3X</SAIplt:description>
+          <SAIplt:value>0</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>ASIC_AC5X</SAIplt:name>
+          <SAIplt:description>AC5X</SAIplt:description>
+          <SAIplt:value>1</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>ASIC_Falcon</SAIplt:name>
+          <SAIplt:description>FALCON</SAIplt:description>
+          <SAIplt:value>2</SAIplt:value>
+        </SAIplt:enum>
+      </SAIplt:typedef>
+    </SAIplt:typedefs>
+    <SAIplt:ASIC_Type SAIplt:type="asic-type">ASIC_Falcon</SAIplt:ASIC_Type>
+    <SAIplt:ASK-BOARD-Profile-Name SAIplt:type="string">ASK-Board-F2T_48x25G-8x100G.xml</SAIplt:ASK-BOARD-Profile-Name>
+    <SAIplt:Ports>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">0</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">47</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">1</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">46</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">2</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">45</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">3</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">44</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">4</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">43</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">5</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">42</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">6</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">41</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">7</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">40</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">8</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">39</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">9</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">38</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">10</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">37</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">11</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">36</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">12</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">35</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">13</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">34</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">14</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">33</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">15</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">32</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">16</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">31</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">17</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">30</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">18</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">29</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">19</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">28</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">20</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">27</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">21</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">26</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">22</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">25</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">23</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">24</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">24</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">23</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">25</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">22</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">26</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">21</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">27</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">20</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">28</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">19</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">29</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">18</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">30</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">17</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">31</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">16</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">32</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">15</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">33</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">14</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">34</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">13</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">35</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">12</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">36</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">11</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">37</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">10</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">38</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">9</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">39</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">8</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">40</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">7</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">41</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">6</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">42</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">5</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">43</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">4</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">44</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">3</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">45</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">2</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">46</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">1</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">47</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">0</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">48</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">55</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">52</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">54</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">56</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">53</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">60</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">52</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">64</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">51</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">68</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">50</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">72</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">49</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">76</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">48</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">80</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">56</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+      <SAIplt:port-list>
+        <SAIplt:sai_port_id SAIplt:type="port-id-type">81</SAIplt:sai_port_id>
+        <SAIplt:sdk_device_id SAIplt:type="device-id-type">0</SAIplt:sdk_device_id>
+        <SAIplt:sdk_port_id SAIplt:type="port-id-type">57</SAIplt:sdk_port_id>
+      </SAIplt:port-list>
+    </SAIplt:Ports>
+    <SAIplt:scalingFalcon>
+      <SAIplt:max_lag_members SAIplt:type="uint32">8</SAIplt:max_lag_members>
+      <SAIplt:max_route_ipv4 SAIplt:type="uint32">0</SAIplt:max_route_ipv4>
+      <SAIplt:max_route_ipv6 SAIplt:type="uint32">0</SAIplt:max_route_ipv6>
+      <SAIplt:max_Nh_Ecmp_Mbr_Per_Grp SAIplt:type="uint32">64</SAIplt:max_Nh_Ecmp_Mbr_Per_Grp>
+      <SAIplt:max_ipv4_tunnel SAIplt:type="uint32">8</SAIplt:max_ipv4_tunnel>
+      <SAIplt:max_ipv6_tunnel SAIplt:type="uint32">8</SAIplt:max_ipv6_tunnel>
+      <SAIplt:max_tti SAIplt:type="uint32">1024</SAIplt:max_tti>
+      <SAIplt:wred_size SAIplt:type="uint32">0</SAIplt:wred_size>
+      <SAIplt:max_nat SAIplt:type="uint32">0</SAIplt:max_nat>
+    </SAIplt:scalingFalcon>
+    <SAIplt:Counters>
+      <SAIplt:cnc-base-list>
+        <SAIplt:counter-base SAIplt:type="uint32">0</SAIplt:counter-base>
+      </SAIplt:cnc-base-list>
+    </SAIplt:Counters>
+    <SAIplt:Logging>
+      <SAIplt:log_dest SAIplt:type="logDest-type">SAI_LOG_SYSLOG</SAIplt:log_dest>
+    </SAIplt:Logging>
+    <SAIplt:Features-using-acl>
+      <SAIplt:feature SAIplt:type="acl-feature-name-type">control-acl</SAIplt:feature>
+      <SAIplt:feature-priority SAIplt:type="feature-priority-type">3</SAIplt:feature-priority>
+      <SAIplt:Ingress>
+        <SAIplt:ingress-stage SAIplt:type="ingress-acl-stage-type">IPCL0</SAIplt:ingress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">1</SAIplt:hit-number>
+      </SAIplt:Ingress>
+      <SAIplt:Egress>
+        <SAIplt:egress-stage SAIplt:type="egress-acl-stage-type">EPCL0</SAIplt:egress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">0</SAIplt:hit-number>
+      </SAIplt:Egress>
+    </SAIplt:Features-using-acl>
+    <SAIplt:Features-using-acl>
+      <SAIplt:feature SAIplt:type="acl-feature-name-type">port-sFlow</SAIplt:feature>
+      <SAIplt:feature-priority SAIplt:type="feature-priority-type">4</SAIplt:feature-priority>
+      <SAIplt:Ingress>
+        <SAIplt:ingress-stage SAIplt:type="ingress-acl-stage-type">IPCL0</SAIplt:ingress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">0</SAIplt:hit-number>
+      </SAIplt:Ingress>
+      <SAIplt:Egress>
+        <SAIplt:egress-stage SAIplt:type="egress-acl-stage-type">EPCL0</SAIplt:egress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">0</SAIplt:hit-number>
+      </SAIplt:Egress>
+    </SAIplt:Features-using-acl>
+    <SAIplt:Features-using-acl>
+      <SAIplt:feature SAIplt:type="acl-feature-name-type">port-counters-ipv4-ipv6</SAIplt:feature>
+      <SAIplt:feature-priority SAIplt:type="feature-priority-type">5</SAIplt:feature-priority>
+      <SAIplt:Ingress>
+        <SAIplt:ingress-stage SAIplt:type="ingress-acl-stage-type">IPCL0</SAIplt:ingress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">3</SAIplt:hit-number>
+      </SAIplt:Ingress>
+      <SAIplt:Egress>
+        <SAIplt:egress-stage SAIplt:type="egress-acl-stage-type">EPCL0</SAIplt:egress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">0</SAIplt:hit-number>
+      </SAIplt:Egress>
+    </SAIplt:Features-using-acl>
+    <SAIplt:Features-using-acl>
+      <SAIplt:feature SAIplt:type="acl-feature-name-type">debug-counter-acl</SAIplt:feature>
+      <SAIplt:feature-priority SAIplt:type="feature-priority-type">2</SAIplt:feature-priority>
+      <SAIplt:Ingress>
+        <SAIplt:ingress-stage SAIplt:type="ingress-acl-stage-type">IPCL0</SAIplt:ingress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">1</SAIplt:hit-number>
+      </SAIplt:Ingress>
+      <SAIplt:Egress>
+        <SAIplt:egress-stage SAIplt:type="egress-acl-stage-type">EPCL0</SAIplt:egress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">0</SAIplt:hit-number>
+      </SAIplt:Egress>
+    </SAIplt:Features-using-acl>
+  </SAIplt:SAI>
+</data>
\ No newline at end of file
diff --git a/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/db98cx8514_10cc/buffers.json.j2 b/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/db98cx8514_10cc/buffers.json.j2
new file mode 100644
index 000000000..a9a01d707
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/db98cx8514_10cc/buffers.json.j2
@@ -0,0 +1 @@
+{%- include 'buffers_config.j2' %}
diff --git a/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/db98cx8514_10cc/buffers_config.j2 b/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/db98cx8514_10cc/buffers_config.j2
new file mode 100644
index 000000000..a5212d979
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/db98cx8514_10cc/buffers_config.j2
@@ -0,0 +1,165 @@
+{%- macro set_default_topology() %}
+{%- if default_topo is defined %}
+{{ default_topo }}
+{%- else %}
+def
+{%- endif %}
+{%- endmacro -%}
+
+{# Determine device topology and filename postfix #}
+{%- if DEVICE_METADATA is defined %}
+{%-     set switch_role = DEVICE_METADATA['localhost']['type'] %}
+{%-     if switch_role.lower() == 'torrouter' %}
+{%-         set filename_postfix = 't0' %}
+{%-     elif switch_role.lower() == 'leafrouter' %}
+{%-         set filename_postfix = 't1' %}
+{%-     else %}
+{%-         set filename_postfix = set_default_topology() %}
+{%-     endif %}
+{%- else %}
+{%-     set filename_postfix = set_default_topology() %}
+{%-     set switch_role      = '' %}
+{%- endif -%}
+
+{# Import default values from device HWSKU folder #}
+{%- import 'buffers_defaults_%s.j2' % filename_postfix as defs %}
+
+{%- set default_cable = defs.default_cable -%}
+
+{# Port configuration to cable length look-up table #}
+{# Each record describes mapping of DUT (DUT port) role and neighbor role to cable length #}
+{# Roles described in the minigraph #}
+{%- if defs.ports2cable is defined %}
+    {%- set ports2cable = defs.ports2cable %}
+{%- else %}
+    {%- set ports2cable = {
+            'torrouter_server'       : '5m',
+            'leafrouter_torrouter'   : '40m',
+            'spinerouter_leafrouter' : '300m'
+            }
+    -%}
+{%- endif %}
+
+{%- macro cable_length(port_name) %}
+    {%- set cable_len = [] %}
+    {%- for local_port in DEVICE_NEIGHBOR %}
+        {%- if local_port == port_name %}
+            {%- if DEVICE_NEIGHBOR_METADATA is defined and DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[local_port].name] %}
+                {%- set neighbor = DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[local_port].name] %}
+                {%- set neighbor_role = neighbor.type %}
+                {%- set roles1 = switch_role + '_' + neighbor_role %}
+                {%- set roles2 = neighbor_role + '_' + switch_role %}
+                {%- set roles1 = roles1 | lower %}
+                {%- set roles2 = roles2 | lower %}
+                {%- if roles1 in ports2cable %}
+                    {%- if cable_len.append(ports2cable[roles1]) %}{% endif %}
+                {%- elif roles2 in ports2cable %}
+                    {%- if cable_len.append(ports2cable[roles2]) %}{% endif %}
+                {%- endif %}
+            {%- endif %}
+        {%- endif %}
+    {%- endfor %}
+    {%- if cable_len -%}
+        {{ cable_len.0 }}
+    {%- else %}
+        {%- if switch_role.lower() == 'torrouter' %}
+            {%- for local_port in VLAN_MEMBER %}
+                {%- if local_port[1] == port_name %}
+                    {%- set roles3 = switch_role + '_' + 'server' %}
+                    {%- set roles3 = roles3 | lower %}
+                    {%- if roles3 in ports2cable %}
+                        {%- if cable_len.append(ports2cable[roles3]) %}{% endif %}
+                    {%- endif %}
+                {%- endif %}
+            {%- endfor %}
+            {%- if cable_len -%}
+                {{ cable_len.0 }}
+            {%- else -%}
+                {{ default_cable }}
+            {%- endif %}
+        {%- else -%}
+            {{ default_cable }}
+        {%- endif %}
+    {%- endif %}
+{%- endmacro %}
+
+{%- set PORT_ALL  = [] %}
+
+{%- if PORT is not defined %}
+    {%- if defs.generate_port_lists(PORT_ALL) %} {% endif %}
+{%- else %}
+    {%- for port in PORT %}
+        {%- if PORT_ALL.append(port) %}{%- endif %}
+    {%- endfor %}
+{%- endif %}
+
+{%- set PORT_ACTIVE  = [] %}
+{%- if DEVICE_NEIGHBOR is not defined %}
+    {%- set PORT_ACTIVE = PORT_ALL %}
+{%- else %}
+    {%- for port in DEVICE_NEIGHBOR.keys() %}
+        {%- if PORT_ACTIVE.append(port) %}{%- endif %}
+    {%- endfor %}
+{%- endif %}
+
+{%- set port_names_list_active  = [] %}
+{%- for port in PORT_ACTIVE %}
+    {%- if port_names_list_active.append(port) %}{%- endif %}
+{%- endfor %}
+{%- set port_names_active  = port_names_list_active  | join(',') %}
+
+{
+    "CABLE_LENGTH": {
+        "AZURE": {
+    {% for port in PORT_ALL %}
+        {%- set cable = cable_length(port) %}
+        "{{ port }}": "{{ cable }}"{%- if not loop.last %},{% endif %}
+
+    {% endfor %}
+    }
+    },
+
+{% if defs.generate_buffer_pool_and_profiles is defined %}
+{{ defs.generate_buffer_pool_and_profiles() }}
+{% endif %}
+
+{%- if defs.generate_profile_lists is defined %}
+{{ defs.generate_profile_lists(port_names_active) }},
+{% endif %}
+
+{%- if defs.generate_pg_profils is defined %}
+{{ defs.generate_pg_profils(port_names_active) }}
+{% else %}
+    "BUFFER_PG": {
+{% for port in PORT_ACTIVE %}
+        "{{ port }}|0": {
+            "profile" : "[BUFFER_PROFILE|ingress_lossy_profile]"
+        }{% if not loop.last %},{% endif %}
+
+{% endfor %}
+    },
+{% endif %}
+
+{% if defs.generate_queue_buffers is defined %}
+{{ defs.generate_queue_buffers(port_names_active) }}
+{% else %}
+    "BUFFER_QUEUE": {
+{% for port in PORT_ACTIVE %}
+        "{{ port }}|3-4": {
+            "profile" : "[BUFFER_PROFILE|egress_lossless_profile]"
+        },
+{% endfor %}
+{% for port in PORT_ACTIVE %}
+        "{{ port }}|0-2": {
+            "profile" : "[BUFFER_PROFILE|egress_lossy_profile]"
+        },
+{% endfor %}
+{% for port in PORT_ACTIVE %}
+        "{{ port }}|5-6": {
+            "profile" : "[BUFFER_PROFILE|egress_lossy_profile]"
+        }{% if not loop.last %},{% endif %}
+
+{% endfor %}
+    }
+{% endif %}
+}
diff --git a/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/db98cx8514_10cc/buffers_defaults_t0.j2 b/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/db98cx8514_10cc/buffers_defaults_t0.j2
new file mode 100644
index 000000000..f3eaf0144
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/db98cx8514_10cc/buffers_defaults_t0.j2
@@ -0,0 +1,36 @@
+
+{%- set default_cable = '40m' %}
+
+{%- macro generate_buffer_pool_and_profiles() %}
+    "BUFFER_POOL": {
+        "ingress_lossless_pool": {
+            "size": "21120000",
+            "type": "ingress",
+            "mode": "dynamic"
+        },
+        "egress_pool": {
+            "size": "21120000",
+            "type": "egress",
+            "mode": "static"
+        }
+    },
+    "BUFFER_PROFILE": {
+        "ingress_lossy_profile": {
+            "pool":"ingress_lossless_pool",
+            "size":"0",
+            "dynamic_th":"3"
+        },
+        "egress_lossless_profile": {
+            "pool":"egress_pool",
+            "mode": "static",
+            "size":"330000",
+            "static_th":"0"
+        },
+        "egress_lossy_profile": {
+            "pool":"egress_pool",
+            "size":"0",
+            "mode": "dynamic",
+            "dynamic_th":"3"
+        }
+    },
+{%- endmacro %}
diff --git a/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/db98cx8514_10cc/buffers_defaults_t1.j2 b/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/db98cx8514_10cc/buffers_defaults_t1.j2
new file mode 100644
index 000000000..f3eaf0144
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/db98cx8514_10cc/buffers_defaults_t1.j2
@@ -0,0 +1,36 @@
+
+{%- set default_cable = '40m' %}
+
+{%- macro generate_buffer_pool_and_profiles() %}
+    "BUFFER_POOL": {
+        "ingress_lossless_pool": {
+            "size": "21120000",
+            "type": "ingress",
+            "mode": "dynamic"
+        },
+        "egress_pool": {
+            "size": "21120000",
+            "type": "egress",
+            "mode": "static"
+        }
+    },
+    "BUFFER_PROFILE": {
+        "ingress_lossy_profile": {
+            "pool":"ingress_lossless_pool",
+            "size":"0",
+            "dynamic_th":"3"
+        },
+        "egress_lossless_profile": {
+            "pool":"egress_pool",
+            "mode": "static",
+            "size":"330000",
+            "static_th":"0"
+        },
+        "egress_lossy_profile": {
+            "pool":"egress_pool",
+            "size":"0",
+            "mode": "dynamic",
+            "dynamic_th":"3"
+        }
+    },
+{%- endmacro %}
diff --git a/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/db98cx8514_10cc/port_config.ini b/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/db98cx8514_10cc/port_config.ini
new file mode 100644
index 000000000..0c4067b10
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/db98cx8514_10cc/port_config.ini
@@ -0,0 +1,59 @@
+#  name         lanes         alias             speed      autoneg    fec      index
+Ethernet0       0             twenty5GigE0      25000      on         none     1
+Ethernet1       1             twenty5GigE1      25000      on         none     2
+Ethernet2       2             twenty5GigE2      25000      on         none     3
+Ethernet3       3             twenty5GigE3      25000      on         none     4
+Ethernet4       4             twenty5GigE4      25000      on         none     5
+Ethernet5       5             twenty5GigE5      25000      on         none     6
+Ethernet6       6             twenty5GigE6      25000      on         none     7
+Ethernet7       7             twenty5GigE7      25000      on         none     8
+Ethernet8       8             twenty5GigE8      25000      on         none     9
+Ethernet9       9             twenty5GigE9      25000      on         none     10
+Ethernet10      10            twenty5GigE10     25000      on         none     11
+Ethernet11      11            twenty5GigE11     25000      on         none     12
+Ethernet12      12            twenty5GigE12     25000      on         none     13
+Ethernet13      13            twenty5GigE13     25000      on         none     14
+Ethernet14      14            twenty5GigE14     25000      on         none     15
+Ethernet15      15            twenty5GigE15     25000      on         none     16
+Ethernet16      16            twenty5GigE16     25000      on         none     17
+Ethernet17      17            twenty5GigE17     25000      on         none     18
+Ethernet18      18            twenty5GigE18     25000      on         none     19
+Ethernet19      19            twenty5GigE19     25000      on         none     20
+Ethernet20      20            twenty5GigE20     25000      on         none     21
+Ethernet21      21            twenty5GigE21     25000      on         none     22
+Ethernet22      22            twenty5GigE22     25000      on         none     23
+Ethernet23      23            twenty5GigE23     25000      on         none     24
+Ethernet24      24            twenty5GigE24     25000      on         none     25
+Ethernet25      25            twenty5GigE25     25000      on         none     26
+Ethernet26      26            twenty5GigE26     25000      on         none     27
+Ethernet27      27            twenty5GigE27     25000      on         none     28
+Ethernet28      28            twenty5GigE28     25000      on         none     29
+Ethernet29      29            twenty5GigE29     25000      on         none     30
+Ethernet30      30            twenty5GigE30     25000      on         none     31
+Ethernet31      31            twenty5GigE31     25000      on         none     32
+Ethernet32      32            twenty5GigE32     25000      on         none     33
+Ethernet33      33            twenty5GigE33     25000      on         none     34
+Ethernet34      34            twenty5GigE34     25000      on         none     35
+Ethernet35      35            twenty5GigE35     25000      on         none     36
+Ethernet36      36            twenty5GigE36     25000      on         none     37
+Ethernet37      37            twenty5GigE37     25000      on         none     38
+Ethernet38      38            twenty5GigE38     25000      on         none     39
+Ethernet39      39            twenty5GigE39     25000      on         none     40
+Ethernet40      40            twenty5GigE40     25000      on         none     41
+Ethernet41      41            twenty5GigE41     25000      on         none     42
+Ethernet42      42            twenty5GigE42     25000      on         none     43
+Ethernet43      43            twenty5GigE43     25000      on         none     44
+Ethernet44      44            twenty5GigE44     25000      on         none     45
+Ethernet45      45            twenty5GigE45     25000      on         none     46
+Ethernet46      46            twenty5GigE46     25000      on         none     47
+Ethernet47      47            twenty5GigE47     25000      on         none     48
+Ethernet48      48,49,50,51   one00GigE48       100000     on         rs       49
+Ethernet49      52,53,54,55   one00GigE49       100000     on         rs       50
+Ethernet50      56,57,58,59   one00GigE50       100000     on         rs       51
+Ethernet51      60,61,62,63   one00GigE51       100000     on         rs       52
+Ethernet52      64,65,66,67   one00GigE52       100000     on         rs       53
+Ethernet53      68,69,70,71   one00GigE53       100000     on         rs       54
+Ethernet54      72,73,74,75   one00GigE54       100000     on         rs       55
+Ethernet55      76,77,78,79   one00GigE55       100000     on         rs       56
+Ethernet56      80            tenGigE56         10000      off        none     57
+Ethernet57      81            tenGigE57         10000      off        none     58
diff --git a/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/db98cx8514_10cc/profile.ini b/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/db98cx8514_10cc/profile.ini
new file mode 100644
index 000000000..c2f77685a
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/db98cx8514_10cc/profile.ini
@@ -0,0 +1 @@
+switchMacAddress=00:01:02:03:04:05
diff --git a/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/db98cx8514_10cc/qos.json.j2 b/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/db98cx8514_10cc/qos.json.j2
new file mode 100644
index 000000000..3e548325e
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/db98cx8514_10cc/qos.json.j2
@@ -0,0 +1 @@
+{%- include 'qos_config.j2' %}
diff --git a/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/db98cx8514_10cc/sai.profile b/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/db98cx8514_10cc/sai.profile
new file mode 100644
index 000000000..49afb26f8
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/db98cx8514_10cc/sai.profile
@@ -0,0 +1,4 @@
+mode=1
+hwId=F2T48x25G8x100G
+switchProfile=/usr/share/sonic/hwsku/SAI-F2T_48x25G-8x100G.xml
+SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/profile.ini
diff --git a/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/default_sku b/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/default_sku
new file mode 100644
index 000000000..00fddc162
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/default_sku
@@ -0,0 +1 @@
+db98cx8514_10cc t1
diff --git a/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/platform_asic b/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/platform_asic
new file mode 100644
index 000000000..a55475287
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/platform_asic
@@ -0,0 +1 @@
+marvell
diff --git a/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/pmon_daemon_control.json b/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/pmon_daemon_control.json
new file mode 100644
index 000000000..39deb88be
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/pmon_daemon_control.json
@@ -0,0 +1,8 @@
+{
+    "skip_ledd": true,
+    "skip_pcied": true,
+    "skip_thermalctld": true,
+    "skip_psud": true,
+    "skip_xcvrd": true,
+    "skip_syseepromd": true
+}
diff --git a/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/system_health_monitoring_config.json b/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/system_health_monitoring_config.json
new file mode 100644
index 000000000..79c17103b
--- /dev/null
+++ b/device/marvell/x86_64-marvell_db98cx8514_10cc-r0/system_health_monitoring_config.json
@@ -0,0 +1,10 @@
+{
+    "services_to_ignore": [],
+    "devices_to_ignore": [
+        "asic",
+        "psu.temperature",
+        "fan",
+        "psu"
+    ],
+    "user_defined_checkers": []
+}

From e046f7f2ce4d8fee5bc5fca4d6c4e46570520bcb Mon Sep 17 00:00:00 2001
From: Dror Prital <76714716+dprital@users.noreply.github.com>
Date: Thu, 9 May 2024 08:13:52 +0300
Subject: [PATCH 0546/1115] [Mellanox] Mount /var/log/sdk_dbg folder to host
 filesystem (#18711)

- Why I did it
Mellanox SDK Sniffer target path was changed from "/var/log/mellanox/sniffer/" To: "/var/log/sdk_dbg"
This PR mount the new folder so it can be accessed from host

- How I did it
Add /var/log/sdk_dbg to mount

- How to verify it
Run SDK sniffer and make sure the sniffer output file kept in the new location
---
 files/build_templates/docker_image_ctl.j2 | 1 +
 1 file changed, 1 insertion(+)

diff --git a/files/build_templates/docker_image_ctl.j2 b/files/build_templates/docker_image_ctl.j2
index 21676ca59..f0208d32f 100644
--- a/files/build_templates/docker_image_ctl.j2
+++ b/files/build_templates/docker_image_ctl.j2
@@ -607,6 +607,7 @@ start() {
 {%- if sonic_asic_platform == "mellanox" %}
 {%- if docker_container_name == "syncd" %}
         -v /var/log/mellanox:/var/log/mellanox:rw \
+	-v /var/log/sdk_dbg:/var/log/sdk_dbg:rw \
         -v mlnx_sdk_socket:/var/run/sx_sdk \
         -v /tmp/nv-syncd-shared/:/tmp \
         -v /dev/shm:/dev/shm:rw \

From 5c39fb2ab7c6b342c7a37d9cd688449e2bc21d44 Mon Sep 17 00:00:00 2001
From: Junhua Zhai <junhua.zhai@outlook.com>
Date: Thu, 9 May 2024 16:35:09 +0800
Subject: [PATCH 0547/1115] [gearbox]: Upgrade credo sai package to v0.9.6
 (#18910)

Update credo sai package to the latest v0.9.6 to support the blackhawk phys used on Arista platform 7060dx5_64s. It also fixes the issue #17716.

Microsoft ADO: 28013325

How I did it
Update credo sai url for v0.9.6
Include credo sai blackhawk package for blackhawk phy

How to verify it
Basic traffic test on A7280
---
 platform/components/docker-gbsyncd-credo.mk | 14 ++++++++------
 1 file changed, 8 insertions(+), 6 deletions(-)

diff --git a/platform/components/docker-gbsyncd-credo.mk b/platform/components/docker-gbsyncd-credo.mk
index a500a34a4..e0833068d 100644
--- a/platform/components/docker-gbsyncd-credo.mk
+++ b/platform/components/docker-gbsyncd-credo.mk
@@ -1,15 +1,17 @@
 DOCKER_GBSYNCD_PLATFORM_CODE = credo
 
-LIBSAI_CREDO = libsaicredo_0.9.3_amd64.deb
-$(LIBSAI_CREDO)_URL = "https://sonicstorage.blob.core.windows.net/public/credosai/libsaicredo_0.9.3_amd64.deb"
-LIBSAI_CREDO_OWL = libsaicredo-owl_0.9.3_amd64.deb
-$(LIBSAI_CREDO_OWL)_URL = "https://sonicstorage.blob.core.windows.net/public/credosai/libsaicredo-owl_0.9.3_amd64.deb?"
+LIBSAI_CREDO = libsaicredo_0.9.6_amd64.deb
+$(LIBSAI_CREDO)_URL = "https://sonicstorage.blob.core.windows.net/public/credosai/libsaicredo_0.9.6_amd64.deb"
+LIBSAI_CREDO_OWL = libsaicredo-owl_0.9.6_amd64.deb
+$(LIBSAI_CREDO_OWL)_URL = "https://sonicstorage.blob.core.windows.net/public/credosai/libsaicredo-owl_0.9.6_amd64.deb"
+LIBSAI_CREDO_BLACKHAWK = libsaicredo-blackhawk_0.9.6_amd64.deb
+$(LIBSAI_CREDO_BLACKHAWK)_URL = "https://sonicstorage.blob.core.windows.net/public/credosai/libsaicredo-blackhawk_0.9.6_amd64.deb"
 
 ifneq ($($(LIBSAI_CREDO)_URL),)
 include $(PLATFORM_PATH)/../template/docker-gbsyncd-base.mk
 $(DOCKER_GBSYNCD_BASE)_VERSION = 1.0.0
 $(DOCKER_GBSYNCD_BASE)_PACKAGE_NAME = gbsyncd
 $(DOCKER_GBSYNCD_BASE)_PATH = $(PLATFORM_PATH)/../components/docker-gbsyncd-$(DOCKER_GBSYNCD_PLATFORM_CODE)
-SONIC_ONLINE_DEBS += $(LIBSAI_CREDO) $(LIBSAI_CREDO_OWL)
-$(DOCKER_GBSYNCD_BASE)_DEPENDS += $(SYNCD) $(LIBSAI_CREDO) $(LIBSAI_CREDO_OWL)
+SONIC_ONLINE_DEBS += $(LIBSAI_CREDO) $(LIBSAI_CREDO_OWL) $(LIBSAI_CREDO_BLACKHAWK)
+$(DOCKER_GBSYNCD_BASE)_DEPENDS += $(SYNCD) $(LIBSAI_CREDO) $(LIBSAI_CREDO_OWL) $(LIBSAI_CREDO_BLACKHAWK)
 endif

From dfa242f6b4649c8299c4059ce758697a5d7a2b56 Mon Sep 17 00:00:00 2001
From: byu343 <byu@arista.com>
Date: Thu, 9 May 2024 01:36:59 -0700
Subject: [PATCH 0548/1115] [arista] add dpp_db_path for Arista-7280CR3-C40
 (#18917)

This is to fix the runtime syncd error for HwSku Arista-7280CR3-C40:
sonic INFO syncd#supervisord: syncd :dbx_file_get_db_directory: Error: Entry not found ; DB was not found in /db0:dbx_file_get_db_location: DB Directory does not exist#015

How I did it
Add dpp_db_path=/usr/share/bcm/db to the broadcom config file, which has been done on another HwSku Arista-7280CR3-C32D4:
https://github.com/sonic-net/sonic-buildimage/blob/202205/device/arista/x86_64-arista_7280cr3_32d4/Arista-7280CR3-C32D4/jr2-a7280cr3-32d4-32x100G%2B4x400G.config.bcm#L3
---
 .../Arista-7280CR3-C40/jr2-a7280cr3-32d4-40x100G.config.bcm      | 1 +
 .../Arista-7280CR3-C40/jr2-a7280cr3-32p4-40x100G.config.bcm      | 1 +
 2 files changed, 2 insertions(+)

diff --git a/device/arista/x86_64-arista_7280cr3_32d4/Arista-7280CR3-C40/jr2-a7280cr3-32d4-40x100G.config.bcm b/device/arista/x86_64-arista_7280cr3_32d4/Arista-7280CR3-C40/jr2-a7280cr3-32d4-40x100G.config.bcm
index 8dbd850d3..e30cd5f38 100644
--- a/device/arista/x86_64-arista_7280cr3_32d4/Arista-7280CR3-C40/jr2-a7280cr3-32d4-40x100G.config.bcm
+++ b/device/arista/x86_64-arista_7280cr3_32d4/Arista-7280CR3-C40/jr2-a7280cr3-32d4-40x100G.config.bcm
@@ -1,5 +1,6 @@
 soc_family.BCM8869X=BCM8869X
 
+dpp_db_path=/usr/share/bcm/db
 custom_feature_ucode_path=u_code_db2pem.txt
 system_headers_mode=1
 suppress_unknown_prop_warnings=1
diff --git a/device/arista/x86_64-arista_7280cr3_32p4/Arista-7280CR3-C40/jr2-a7280cr3-32p4-40x100G.config.bcm b/device/arista/x86_64-arista_7280cr3_32p4/Arista-7280CR3-C40/jr2-a7280cr3-32p4-40x100G.config.bcm
index ea071fa04..8acc88016 100644
--- a/device/arista/x86_64-arista_7280cr3_32p4/Arista-7280CR3-C40/jr2-a7280cr3-32p4-40x100G.config.bcm
+++ b/device/arista/x86_64-arista_7280cr3_32p4/Arista-7280CR3-C40/jr2-a7280cr3-32p4-40x100G.config.bcm
@@ -1,5 +1,6 @@
 soc_family.BCM8869X=BCM8869X
 
+dpp_db_path=/usr/share/bcm/db
 custom_feature_ucode_path=u_code_db2pem.txt
 system_headers_mode=1
 suppress_unknown_prop_warnings=1

From 4956cf3b16df46d0ac8f3c31584ddb645d63d1c2 Mon Sep 17 00:00:00 2001
From: arista-nwolfe <94405414+arista-nwolfe@users.noreply.github.com>
Date: Thu, 9 May 2024 04:37:48 -0400
Subject: [PATCH 0549/1115] Bump up rif_id_max to match other 7280cr3 SKUs
 (#18792)

In the following commit the rif_id_max was increased from 0x4000 to 0x6000 but it appears a few 7280cr3 SKUs were missed:
c3506ce

Fixing those missing SKUs
---
 .../jr2-a7280cr3-32d4-32x100G+4x400G.config.bcm                 | 2 +-
 .../jr2-a7280cr3-32p4-32x100G+4x400G.config.bcm                 | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/device/arista/x86_64-arista_7280cr3_32d4/Arista-7280CR3-C32D4/jr2-a7280cr3-32d4-32x100G+4x400G.config.bcm b/device/arista/x86_64-arista_7280cr3_32d4/Arista-7280CR3-C32D4/jr2-a7280cr3-32d4-32x100G+4x400G.config.bcm
index a8e711e7b..7530e40e6 100644
--- a/device/arista/x86_64-arista_7280cr3_32d4/Arista-7280CR3-C32D4/jr2-a7280cr3-32d4-32x100G+4x400G.config.bcm
+++ b/device/arista/x86_64-arista_7280cr3_32d4/Arista-7280CR3-C32D4/jr2-a7280cr3-32d4-32x100G+4x400G.config.bcm
@@ -744,7 +744,7 @@ ucode_port_34=CDGE5:core_0.34
 ucode_port_35=CDGE11:core_1.35
 ucode_port_36=CDGE10:core_1.36
 
-rif_id_max=0x4000
+rif_id_max=0x6000
 
 dma_desc_aggregator_chain_length_max.BCM8869X=1000
 dma_desc_aggregator_buff_size_kb.BCM8869X=100
diff --git a/device/arista/x86_64-arista_7280cr3_32p4/Arista-7280CR3-C32P4/jr2-a7280cr3-32p4-32x100G+4x400G.config.bcm b/device/arista/x86_64-arista_7280cr3_32p4/Arista-7280CR3-C32P4/jr2-a7280cr3-32p4-32x100G+4x400G.config.bcm
index 3d4f595f2..7bd0fdea8 100644
--- a/device/arista/x86_64-arista_7280cr3_32p4/Arista-7280CR3-C32P4/jr2-a7280cr3-32p4-32x100G+4x400G.config.bcm
+++ b/device/arista/x86_64-arista_7280cr3_32p4/Arista-7280CR3-C32P4/jr2-a7280cr3-32p4-32x100G+4x400G.config.bcm
@@ -734,7 +734,7 @@ ucode_port_34=CDGE5:core_0.34
 ucode_port_35=CDGE11:core_1.35
 ucode_port_36=CDGE10:core_1.36
 
-rif_id_max=0x4000
+rif_id_max=0x6000
 
 dma_desc_aggregator_chain_length_max.BCM8869X=1000
 dma_desc_aggregator_buff_size_kb.BCM8869X=100

From d9e62560fdd0b67ebab99e54a0949e4684a6ee50 Mon Sep 17 00:00:00 2001
From: Gagan Punathil Ellath <gpunathilell@nvidia.com>
Date: Thu, 9 May 2024 11:02:05 -0700
Subject: [PATCH 0550/1115] Fix for DNS service being canceled (#18670)

#### Why I did it
To fix `resolv-config.service` being cancelled:
`resolv-config.service` is started from `hostcfgd` each time there is an [update to the dns configuration or during the start of hostcfgd.
](https://github.com/sonic-net/sonic-host-services/blob/6fce4781da508709f11be595e3c7048ffd3138cb/scripts/hostcfgd#L1406) When we perform `config reload` because `hostcfgd` is restarted `resolv-config.service` is also restarted, but due to dependency of [`resolv-config.service` on `sonic.target`](https://github.com/sonic-net/sonic-buildimage/blob/ed839c65055c3cbb446ddabdc9c15b0684988139/files/image_config/resolv-config/resolv-config.service#L5)  `systemd` also tries to restart `resolv-config.service` causing cancellation of one of the instances of `resolv-config.service`. This fix removes the dependency of `resolv-config.service` on `sonic.target`

#### How I did it
By removing the `BindsTo` and `WantedBy` dependency to `sonic.target` the service is not restarted upon `config reload` by `systemd` anymore, which would solve the issue of the service being cancelled.

#### How to verify it
No occurrence of `Job for resolv-config.service canceled.` in `syslog` after this change is considered
---
 files/image_config/resolv-config/resolv-config.service | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/files/image_config/resolv-config/resolv-config.service b/files/image_config/resolv-config/resolv-config.service
index fa69330ab..36b5f3240 100644
--- a/files/image_config/resolv-config/resolv-config.service
+++ b/files/image_config/resolv-config/resolv-config.service
@@ -2,7 +2,6 @@
 Description=Update DNS configuration
 Requires=config-setup.service
 After=config-setup.service
-BindsTo=sonic.target
 After=sonic.target
 StartLimitIntervalSec=0
 
@@ -11,5 +10,3 @@ Type=oneshot
 RemainAfterExit=yes
 ExecStart=/usr/bin/resolv-config.sh start
 
-[Install]
-WantedBy=sonic.target

From d982462880c87978785a30055eccd055a89770e6 Mon Sep 17 00:00:00 2001
From: Junchao-Mellanox <57339448+Junchao-Mellanox@users.noreply.github.com>
Date: Fri, 10 May 2024 14:00:51 +0800
Subject: [PATCH 0551/1115] [Mellanox] run module initialization when any SFP
 related API is called (#18930)

Why I did it
Currently, there are a few issues related to module host management:

1. module initialization flow is triggered when chassis.get_change_event is called for the first time. It is too late which delays fast-reboot/warm-reboot convergence time

2. module initialization flow always send change event for all SFP objects to xcvrd even if there is no real module change event. It causes ports flapping during warm-reboot

3. legacy mode and module host management mode are mixed into the same code logic which makes it hard to maintain and extend

To address above issues, the PR introduces following changes:

1. module initialization flow is triggered when chassis SFP related API is called for the first time. It means that any of the following API will trigger module init: chassis.get_sfp, chassis.get_all_sfps, chassis.get_change_event. The init flow shall only execute once under xcvrd context.

2. module initialization flow does not send change event anymore. Change event shall be sent only if a real cable event is detected by chassis.get_change_event (plug-in/plug-out/error)

3. legacy mode and module host management mode are decoupled to avoid affecting each other

How to verify it
1. Unit test covered most of the new change
2. Full sonic-mgmt regression test make sure there is no degradation (test branch 202311)
3. Manual test
---
 .../sonic_platform/chassis.py                 | 251 +++++-
 .../sonic_platform/device_data.py             |   4 +-
 .../module_host_mgmt_initializer.py           | 128 +++
 .../sonic_platform/modules_mgmt.py            | 783 -----------------
 .../mlnx-platform-api/sonic_platform/sfp.py   | 786 +++++++++++++++--
 .../sonic_platform/sfp_event.py               | 409 ---------
 .../sonic_platform/state_machine.py           | 168 ++++
 .../sonic_platform/thermal_manager.py         |   6 +-
 .../sonic_platform/thermal_updater.py         |  25 +-
 .../mlnx-platform-api/sonic_platform/utils.py |   8 +-
 .../sonic_platform/wait_sfp_ready_task.py     | 139 +++
 .../tests/test_change_event.py                | 220 +++++
 .../mlnx-platform-api/tests/test_chassis.py   |  21 +-
 .../tests/test_device_data.py                 |   8 +-
 .../tests/test_module_initializer.py          |  98 +++
 .../tests/test_modules_mgmt.py                | 800 ------------------
 .../mlnx-platform-api/tests/test_sfp.py       | 151 +++-
 .../mlnx-platform-api/tests/test_sfp_event.py |  61 --
 .../mlnx-platform-api/tests/test_sfp_sm.py    | 170 ++++
 .../tests/test_statemachine.py                | 137 +++
 .../tests/test_thermal_updater.py             |  21 +-
 .../tests/test_wait_sfp_ready_task.py         |  51 ++
 22 files changed, 2201 insertions(+), 2244 deletions(-)
 create mode 100644 platform/mellanox/mlnx-platform-api/sonic_platform/module_host_mgmt_initializer.py
 delete mode 100644 platform/mellanox/mlnx-platform-api/sonic_platform/modules_mgmt.py
 delete mode 100644 platform/mellanox/mlnx-platform-api/sonic_platform/sfp_event.py
 create mode 100644 platform/mellanox/mlnx-platform-api/sonic_platform/state_machine.py
 create mode 100644 platform/mellanox/mlnx-platform-api/sonic_platform/wait_sfp_ready_task.py
 create mode 100644 platform/mellanox/mlnx-platform-api/tests/test_change_event.py
 create mode 100644 platform/mellanox/mlnx-platform-api/tests/test_module_initializer.py
 delete mode 100644 platform/mellanox/mlnx-platform-api/tests/test_modules_mgmt.py
 delete mode 100644 platform/mellanox/mlnx-platform-api/tests/test_sfp_event.py
 create mode 100644 platform/mellanox/mlnx-platform-api/tests/test_sfp_sm.py
 create mode 100644 platform/mellanox/mlnx-platform-api/tests/test_statemachine.py
 create mode 100644 platform/mellanox/mlnx-platform-api/tests/test_wait_sfp_ready_task.py

diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/chassis.py b/platform/mellanox/mlnx-platform-api/sonic_platform/chassis.py
index f216f6de2..935a2fa5f 100644
--- a/platform/mellanox/mlnx-platform-api/sonic_platform/chassis.py
+++ b/platform/mellanox/mlnx-platform-api/sonic_platform/chassis.py
@@ -28,13 +28,13 @@
     import os
     from functools import reduce
     from .utils import extract_RJ45_ports_index
+    from . import module_host_mgmt_initializer
     from . import utils
     from .device_data import DeviceDataManager
     import re
-    import queue
+    import select
     import threading
     import time
-    from sonic_platform import modules_mgmt
 except ImportError as e:
     raise ImportError (str(e) + "- required module not found")
 
@@ -132,9 +132,9 @@ def __init__(self):
 
         Chassis.chassis_instance = self
 
-        self.modules_mgmt_thread = threading.Thread()
-        self.modules_changes_queue = queue.Queue()
-        self.modules_mgmt_task_stopping_event = threading.Event()
+        self.module_host_mgmt_initializer = module_host_mgmt_initializer.ModuleHostMgmtInitializer()
+        self.poll_obj = None
+        self.registered_fds = None
 
         logger.log_info("Chassis loaded successfully")
 
@@ -344,8 +344,11 @@ def get_all_sfps(self):
         Returns:
             A list of objects derived from SfpBase representing all sfps
             available on this chassis
-        """
-        self.initialize_sfp()
+        """    
+        if DeviceDataManager.is_module_host_management_mode():
+            self.module_host_mgmt_initializer.initialize(self)
+        else:
+            self.initialize_sfp()
         return self._sfp_list
 
     def get_sfp(self, index):
@@ -362,7 +365,10 @@ def get_sfp(self, index):
             An object dervied from SfpBase representing the specified sfp
         """
         index = index - 1
-        self.initialize_single_sfp(index)
+        if DeviceDataManager.is_module_host_management_mode():
+            self.module_host_mgmt_initializer.initialize(self)
+        else:
+            self.initialize_single_sfp(index)
         return super(Chassis, self).get_sfp(index)
 
     def get_port_or_cage_type(self, index):
@@ -412,42 +418,223 @@ def get_change_event(self, timeout=0):
                       indicates that fan 0 has been removed, fan 2
                       has been inserted and sfp 11 has been removed.
         """
-        if not self.modules_mgmt_thread.is_alive():
-            # open new SFP change events thread
-            self.modules_mgmt_thread = modules_mgmt.ModulesMgmtTask(q=self.modules_changes_queue
-                                                    , main_thread_stop_event = self.modules_mgmt_task_stopping_event)
-            # Set the thread as daemon so when pmon/xcvrd are shutting down, modules_mgmt will shut down immedietly.
-            self.modules_mgmt_thread.daemon = True
-            self.modules_mgmt_thread.start()
-        self.initialize_sfp()
-        wait_for_ever = (timeout == 0)
+        if DeviceDataManager.is_module_host_management_mode():
+            self.module_host_mgmt_initializer.initialize(self)
+            return self.get_change_event_for_module_host_management_mode(timeout)
+        else:
+            self.initialize_sfp()
+            return self.get_change_event_legacy(timeout)
+            
+    def get_change_event_for_module_host_management_mode(self, timeout):
+        """Get SFP change event when module host management mode is enabled.
+
+        Args:
+            timeout: Timeout in milliseconds (optional). If timeout == 0,
+                this method will block until a change is detected.
+
+        Returns:
+            (bool, dict):
+                - True if call successful, False if not; - Deprecated, will always return True
+                - A nested dictionary where key is a device type,
+                  value is a dictionary with key:value pairs in the format of
+                  {'device_id':'device_event'},
+                  where device_id is the device ID for this device and
+                        device_event,
+                             status='1' represents device inserted,
+                             status='0' represents device removed.
+                  Ex. {'fan':{'0':'0', '2':'1'}, 'sfp':{'11':'0'}}
+                      indicates that fan 0 has been removed, fan 2
+                      has been inserted and sfp 11 has been removed.
+        """
+        if not self.poll_obj:
+            self.poll_obj = select.poll()
+            self.registered_fds = {}
+            for s in self._sfp_list:
+                fds = s.get_fds_for_poling()
+                for fd_type, fd in fds.items():
+                    self.poll_obj.register(fd, select.POLLERR | select.POLLPRI)
+                    self.registered_fds[fd.fileno()] = (s.sdk_index, fd, fd_type)
+
+            logger.log_debug(f'Registered SFP file descriptors for polling: {self.registered_fds}')
+                    
+        from . import sfp
+        
+        wait_forever = (timeout == 0)
+        # poll timeout should be no more than 1000ms to ensure fast shutdown flow
+        timeout = 1000.0 if timeout >= 1000 else float(timeout)
+        port_dict = {}
+        error_dict = {}
+        begin = time.time()
+        wait_ready_task = sfp.SFP.get_wait_ready_task()
+        
+        while True:        
+            fds_events = self.poll_obj.poll(timeout)
+            for fileno, _ in fds_events:
+                if fileno not in self.registered_fds:
+                    logger.log_error(f'Unknown file no {fileno} from poll event, registered files are {self.registered_fds}')
+                    continue
+                
+                sfp_index, fd, fd_type = self.registered_fds[fileno]
+                s = self._sfp_list[sfp_index]
+                fd.seek(0)
+                fd_value = int(fd.read().strip())
+
+                # Detecting dummy event
+                if s.is_dummy_event(fd_type, fd_value):
+                    # Ignore dummy event for the first poll, assume SDK only provide 1 dummy event
+                    logger.log_debug(f'Ignore dummy event {fd_type}:{fd_value} for SFP {sfp_index}')
+                    continue
+
+                logger.log_notice(f'Got SFP event: index={sfp_index}, type={fd_type}, value={fd_value}')
+                if fd_type == 'hw_present':
+                    # event could be EVENT_NOT_PRESENT or EVENT_PRESENT
+                    event = sfp.EVENT_NOT_PRESENT if fd_value == 0 else sfp.EVENT_PRESENT
+                    s.on_event(event)
+                elif fd_type == 'present':
+                    if str(fd_value) == sfp.SFP_STATUS_ERROR:
+                        # FW control cable got an error, no need trigger state machine
+                        sfp_status, error_desc = s.get_error_info_from_sdk_error_type()
+                        port_dict[sfp_index + 1] = sfp_status
+                        if error_desc: 
+                            error_dict[sfp_index + 1] = error_desc
+                        continue
+                    elif str(fd_value) == sfp.SFP_STATUS_INSERTED:
+                        # FW control cable got present, only case is that the cable is recovering
+                        # from an error. FW control cable has no transition from "Not Present" to "Present"
+                        # because "Not Present" cable is always "software control" and should always poll
+                        # hw_present sysfs instead of present sysfs.
+                        port_dict[sfp_index + 1] = sfp.SFP_STATUS_INSERTED
+                        continue
+                    else:
+                        s.on_event(sfp.EVENT_NOT_PRESENT)
+                else:
+                    # event could be EVENT_POWER_GOOD or EVENT_POWER_BAD
+                    event = sfp.EVENT_POWER_BAD if fd_value == 0 else sfp.EVENT_POWER_GOOD
+                    s.on_event(event)
+                    
+                if s.in_stable_state():
+                    s.fill_change_event(port_dict)
+                    s.refresh_poll_obj(self.poll_obj, self.registered_fds)
+                else:
+                    logger.log_debug(f'SFP {sfp_index} does not reach stable state, state={s.state}')
+                                        
+            ready_sfp_set = wait_ready_task.get_ready_set()
+            for sfp_index in ready_sfp_set:
+                s = self._sfp_list[sfp_index]
+                s.on_event(sfp.EVENT_RESET_DONE)
+                if s.in_stable_state():
+                    s.fill_change_event(port_dict)
+                    s.refresh_poll_obj(self.poll_obj, self.registered_fds)
+                else:
+                    logger.log_error(f'SFP {sfp_index} failed to reach stable state, state={s.state}')
+                    
+            if port_dict:
+                logger.log_notice(f'Sending SFP change event: {port_dict}, error event: {error_dict}')
+                self.reinit_sfps(port_dict)
+                return True, {
+                    'sfp': port_dict,
+                    'sfp_error': error_dict
+                }
+            else:
+                if not wait_forever:
+                    elapse = time.time() - begin
+                    if elapse * 1000 >= timeout:
+                        return True, {'sfp': {}}
+
+    def get_change_event_legacy(self, timeout):
+        """Get SFP change event when module host management is disabled.
+
+        Args:
+            timeout (int): polling timeout in ms
+
+        Returns:
+            (bool, dict):
+                - True if call successful, False if not; - Deprecated, will always return True
+                - A nested dictionary where key is a device type,
+                  value is a dictionary with key:value pairs in the format of
+                  {'device_id':'device_event'},
+                  where device_id is the device ID for this device and
+                        device_event,
+                             status='1' represents device inserted,
+                             status='0' represents device removed.
+                  Ex. {'fan':{'0':'0', '2':'1'}, 'sfp':{'11':'0'}}
+                      indicates that fan 0 has been removed, fan 2
+                      has been inserted and sfp 11 has been removed.
+        """
+        if not self.poll_obj:
+            self.poll_obj = select.poll()
+            self.registered_fds = {}
+            # SDK always sent event for the first time polling. Such event should not be sent to xcvrd.
+            # Store SFP state before first time polling so that we can detect dummy event.
+            self.sfp_states_before_first_poll = {}
+            for s in self._sfp_list:
+                fd = s.get_fd_for_polling_legacy()
+                self.poll_obj.register(fd, select.POLLERR | select.POLLPRI)
+                self.registered_fds[fd.fileno()] = (s.sdk_index, fd)
+                self.sfp_states_before_first_poll[s.sdk_index] = s.get_module_status()
+
+            logger.log_debug(f'Registered SFP file descriptors for polling: {self.registered_fds}')
+            
+        from . import sfp
+        
+        wait_forever = (timeout == 0)
         # poll timeout should be no more than 1000ms to ensure fast shutdown flow
         timeout = 1000.0 if timeout >= 1000 else float(timeout)
         port_dict = {}
         error_dict = {}
         begin = time.time()
-        i = 0
+        
         while True:
-            try:
-                logger.log_info(f'get_change_event() trying to get changes from queue on iteration {i}')
-                port_dict = self.modules_changes_queue.get(timeout=timeout / 1000)
-                logger.log_info(f'get_change_event() iteration {i} port_dict: {port_dict}')
-            except queue.Empty:
-                logger.log_info(f"failed to get item from modules changes queue on itertaion {i}")
+            fds_events = self.poll_obj.poll(timeout)
+            for fileno, _ in fds_events:
+                if fileno not in self.registered_fds:
+                    logger.log_error(f'Unknown file no {fileno} from poll event, registered files are {self.registered_fds}')
+                    continue
+                
+                sfp_index, fd = self.registered_fds[fileno]
+                fd.seek(0)
+                fd.read()
+                s = self._sfp_list[sfp_index]
+                sfp_status = s.get_module_status()
+
+                if sfp_index in self.sfp_states_before_first_poll:
+                    # Detecting dummy event
+                    sfp_state_before_poll = self.sfp_states_before_first_poll[sfp_index]
+                    self.sfp_states_before_first_poll.pop(sfp_index)
+                    if sfp_state_before_poll == sfp_status:
+                        # Ignore dummy event for the first poll, assume SDK only provide 1 dummy event
+                        logger.log_debug(f'Ignore dummy event {sfp_status} for SFP {sfp_index}')
+                        continue
+
+                logger.log_notice(f'Got SFP event: index={sfp_index}, value={sfp_status}')
+                if sfp_status == sfp.SFP_STATUS_UNKNOWN:
+                    # in the following sequence, STATUS_UNKNOWN can be returned.
+                    # so we shouldn't raise exception here.
+                    # 1. some sfp module is inserted
+                    # 2. sfp_event gets stuck and fails to fetch the change event instantaneously
+                    # 3. and then the sfp module is removed
+                    # 4. sfp_event starts to try fetching the change event
+                    logger.log_notice("unknown module state, maybe the port suffers two adjacent insertion/removal")
+                    continue
+
+                if sfp_status == sfp.SFP_STATUS_ERROR:
+                    sfp_status, error_desc = s.get_error_info_from_sdk_error_type()
+                    if error_desc:
+                        error_dict[sfp_index + 1] = error_desc
+                port_dict[sfp_index + 1] = sfp_status
 
             if port_dict:
+                logger.log_notice(f'Sending SFP change event: {port_dict}, error event: {error_dict}')
                 self.reinit_sfps(port_dict)
-                result_dict = {'sfp': port_dict}
-                result_dict['sfp_error'] = error_dict
-                return True, result_dict
+                return True, {
+                    'sfp': port_dict,
+                    'sfp_error': error_dict
+                }
             else:
-                if not wait_for_ever:
+                if not wait_forever:
                     elapse = time.time() - begin
-                    logger.log_info(f"get_change_event: wait_for_ever {wait_for_ever} elapse {elapse} iteartion {i}")
                     if elapse * 1000 >= timeout:
-                        logger.log_info(f"elapse {elapse} > timeout {timeout} iteartion {i} returning empty dict")
                         return True, {'sfp': {}}
-            i += 1
 
     def reinit_sfps(self, port_dict):
         """
@@ -457,7 +644,7 @@ def reinit_sfps(self, port_dict):
         """
         from . import sfp
         for index, status in port_dict.items():
-            if status == sfp.SFP_STATUS_INSERTED:
+            if status == sfp.SFP_STATUS_REMOVED:
                 try:
                     self._sfp_list[int(index) - 1].reinit()
                 except Exception as e:
diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/device_data.py b/platform/mellanox/mlnx-platform-api/sonic_platform/device_data.py
index b3b076573..d6f846a30 100644
--- a/platform/mellanox/mlnx-platform-api/sonic_platform/device_data.py
+++ b/platform/mellanox/mlnx-platform-api/sonic_platform/device_data.py
@@ -258,7 +258,7 @@ def get_cpld_component_list(cls):
 
     @classmethod
     @utils.read_only_cache()
-    def is_independent_mode(cls):
+    def is_module_host_management_mode(cls):
         from sonic_py_common import device_info
         _, hwsku_dir = device_info.get_paths_to_platform_and_hwsku_dirs()
         sai_profile_file = os.path.join(hwsku_dir, 'sai.profile')
@@ -274,7 +274,7 @@ def wait_platform_ready(cls):
         """
         conditions = []
         sysfs_nodes = ['power_mode', 'power_mode_policy', 'present', 'reset', 'status', 'statuserror']
-        if cls.is_independent_mode():
+        if cls.is_module_host_management_mode():
             sysfs_nodes.extend(['control', 'frequency', 'frequency_support', 'hw_present', 'hw_reset',
                                 'power_good', 'power_limit', 'power_on', 'temperature/input'])
         else:
diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/module_host_mgmt_initializer.py b/platform/mellanox/mlnx-platform-api/sonic_platform/module_host_mgmt_initializer.py
new file mode 100644
index 000000000..d9bec6598
--- /dev/null
+++ b/platform/mellanox/mlnx-platform-api/sonic_platform/module_host_mgmt_initializer.py
@@ -0,0 +1,128 @@
+#
+# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+from . import utils
+from sonic_py_common.logger import Logger
+
+import atexit
+import os
+import sys
+import threading
+
+MODULE_READY_MAX_WAIT_TIME = 300
+MODULE_READY_CHECK_INTERVAL = 5
+MODULE_READY_CONTAINER_FILE = '/tmp/module_host_mgmt_ready'
+MODULE_READY_HOST_FILE = '/tmp/nv-syncd-shared/module_host_mgmt_ready'
+DEDICATE_INIT_DAEMON = 'xcvrd'
+initialization_owner = False
+
+logger = Logger()
+
+
+class ModuleHostMgmtInitializer:
+    """Responsible for initializing modules for host management mode.
+    """
+    def __init__(self):
+        self.initialized = False
+        self.lock = threading.Lock()
+
+    def initialize(self, chassis):
+        """Initialize all modules. Only applicable for module host management mode.
+        The real initialization job shall only be done in xcvrd. Only 1 owner is allowed
+        to to the initialization. Other daemon/CLI shall wait for the initialization done.
+
+        Args:
+            chassis (object): chassis object
+        """
+        global initialization_owner
+        if self.initialized:
+            return
+        
+        if utils.is_host():
+            self.wait_module_ready()
+            chassis.initialize_sfp()
+        else:
+            if self.is_initialization_owner():
+                if not self.initialized:
+                    with self.lock:
+                        if not self.initialized:
+                            logger.log_notice('Starting module initialization for module host management...')
+                            initialization_owner = True
+                            self.remove_module_ready_file()
+                            
+                            chassis.initialize_sfp()
+                            
+                            from .sfp import SFP
+                            SFP.initialize_sfp_modules(chassis._sfp_list)
+                            
+                            self.create_module_ready_file()    
+                            self.initialized = True
+                            logger.log_notice('Module initialization for module host management done')
+            else:
+                self.wait_module_ready()
+                chassis.initialize_sfp()
+                  
+    @classmethod
+    def create_module_ready_file(cls):
+        """Create module ready file
+        """
+        with open(MODULE_READY_CONTAINER_FILE, 'w'):
+            pass
+
+    @classmethod
+    def remove_module_ready_file(cls):
+        """Remove module ready file
+        """
+        if os.path.exists(MODULE_READY_CONTAINER_FILE):
+            os.remove(MODULE_READY_CONTAINER_FILE)
+                
+    def wait_module_ready(self):
+        """Wait up to MODULE_READY_MAX_WAIT_TIME seconds for all modules to be ready
+        """
+        if utils.is_host():
+            module_ready_file = MODULE_READY_HOST_FILE
+        else:
+            module_ready_file = MODULE_READY_CONTAINER_FILE
+
+        if os.path.exists(module_ready_file):
+            self.initialized = True
+            return
+        else:
+            print('Waiting module to be initialized...')
+        
+        if utils.wait_until(os.path.exists, MODULE_READY_MAX_WAIT_TIME, MODULE_READY_CHECK_INTERVAL, module_ready_file):
+            self.initialized = True
+        else:
+            logger.log_error('Module initialization timeout', True)
+            
+    def is_initialization_owner(self):
+        """Indicate whether current thread is the owner of doing module initialization
+
+        Returns:
+            bool: True if current thread is the owner
+        """
+        cmd = os.path.basename(sys.argv[0])
+        return DEDICATE_INIT_DAEMON in cmd
+
+@atexit.register
+def clean_up():
+    """Remove module ready file when program exits.
+    When module host management is enabled, xcvrd is the dependency for all other
+    daemon/CLI who potentially uses SFP API.
+    """
+    if initialization_owner:
+        ModuleHostMgmtInitializer.remove_module_ready_file()
diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/modules_mgmt.py b/platform/mellanox/mlnx-platform-api/sonic_platform/modules_mgmt.py
deleted file mode 100644
index b8d99ca1f..000000000
--- a/platform/mellanox/mlnx-platform-api/sonic_platform/modules_mgmt.py
+++ /dev/null
@@ -1,783 +0,0 @@
-#
-# Copyright (c) 2023-2024 NVIDIA CORPORATION & AFFILIATES.
-# Apache-2.0
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-# http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-# See the License for the specific language governing permissions and
-# limitations under the License.
-#
-
-import threading
-import time
-import queue
-import os
-import select
-import traceback
-
-try:
-    from sonic_py_common.logger import Logger
-    from sonic_py_common import device_info, multi_asic
-    from .device_data import DeviceDataManager
-    from sonic_platform_base.sonic_xcvr.fields import consts
-    from sonic_platform_base.sonic_xcvr.api.public import cmis
-    from . import sfp as sfp_module
-    from . import utils
-    from swsscommon.swsscommon import SonicV2Connector
-except ImportError as e:
-    raise ImportError (str(e) + "- required module not found")
-
-# Global logger class instance
-logger = Logger()
-
-STATE_HW_NOT_PRESENT = "Initial state. module is not plugged to cage."
-STATE_HW_PRESENT = "Module is plugged to cage"
-STATE_MODULE_AVAILABLE = "Module hw present and power is good"
-STATE_POWERED = "Module power is already loaded"
-STATE_NOT_POWERED = "Module power is not loaded"
-STATE_FW_CONTROL = "The module is not CMIS and FW needs to handle"
-STATE_SW_CONTROL = "The module is CMIS and SW needs to handle"
-STATE_ERROR_HANDLER = "An error occurred - read/write error, power limit or power cap."
-STATE_POWER_LIMIT_ERROR = "The cage has not enough power for the plugged module"
-STATE_SYSFS_ERROR = "An error occurred while writing/reading SySFS."
-
-SAI_PROFILE_FILE = "/{}/sai.profile"
-SAI_INDEP_MODULE_MODE = "SAI_INDEPENDENT_MODULE_MODE"
-SAI_INDEP_MODULE_MODE_DELIMITER = "="
-SAI_INDEP_MODULE_MODE_TRUE_STR = "1"
-SYSFS_LEGACY_FD_PRESENCE = "/sys/module/sx_core/asic0/module{}/present"
-ASIC_NUM = 0
-SYSFS_INDEPENDENT_FD_PREFIX_WO_MODULE = "/sys/module/sx_core/asic{}".format(ASIC_NUM)
-SYSFS_INDEPENDENT_FD_PREFIX = SYSFS_INDEPENDENT_FD_PREFIX_WO_MODULE + "/module{}"
-SYSFS_INDEPENDENT_FD_PRESENCE = os.path.join(SYSFS_INDEPENDENT_FD_PREFIX, "hw_present")
-SYSFS_INDEPENDENT_FD_POWER_GOOD = os.path.join(SYSFS_INDEPENDENT_FD_PREFIX, "power_good")
-SYSFS_INDEPENDENT_FD_POWER_ON = os.path.join(SYSFS_INDEPENDENT_FD_PREFIX, "power_on")
-SYSFS_INDEPENDENT_FD_HW_RESET = os.path.join(SYSFS_INDEPENDENT_FD_PREFIX, "hw_reset")
-SYSFS_INDEPENDENT_FD_POWER_LIMIT = os.path.join(SYSFS_INDEPENDENT_FD_PREFIX, "power_limit")
-SYSFS_INDEPENDENT_FD_FW_CONTROL = os.path.join(SYSFS_INDEPENDENT_FD_PREFIX, "control")
-# echo <val>  /sys/module/sx_core/$asic/$module/frequency   //  val: 0 - up to 400KHz, 1 - up to 1MHz
-SYSFS_INDEPENDENT_FD_FREQ = os.path.join(SYSFS_INDEPENDENT_FD_PREFIX, "frequency")
-SYSFS_INDEPENDENT_FD_FREQ_SUPPORT = os.path.join(SYSFS_INDEPENDENT_FD_PREFIX, "frequency_support")
-IS_INDEPENDENT_MODULE = 'is_independent_module'
-PROC_CMDLINE = "/proc/cmdline"
-CMDLINE_STR_TO_LOOK_FOR = 'SONIC_BOOT_TYPE='
-CMDLINE_VAL_TO_LOOK_FOR = 'fastfast'
-
-MAX_EEPROM_ERROR_RESET_RETRIES = 4
-
-
-class ModulesMgmtTask(threading.Thread):
-
-    def __init__(self, namespaces=None, main_thread_stop_event=None, q=None):
-        threading.Thread.__init__(self)
-        self.name = "ModulesMgmtTask"
-        self.main_thread_stop_event = main_thread_stop_event
-        self.sfp_port_dict_initial = {}
-        self.sfp_port_dict = {}
-        self.sfp_changes_dict = {}
-        self.sfp_delete_list_from_port_dict = []
-        self.namespaces = namespaces
-        self.modules_changes_queue = q
-        self.is_supported_indep_mods_system = False
-        self.modules_lock_list = []
-        # A set to hold those modules waiting 3 seconds since power on and hw reset
-        self.waiting_modules_list = set()
-        self.timer = threading.Thread()
-        self.poll_obj = None
-        self.fds_mapping_to_obj = {}
-        self.port_to_fds = {}
-        self.fds_events_count_dict = {}
-        self.delete_ports_and_reset_states_dict = {}
-        self.setName("ModulesMgmtTask")
-        self.register_hw_present_fds = []
-        self.is_warm_reboot = False
-        self.port_control_dict = {}
-
-    # SFPs state machine
-    def get_sm_func(self, sm, port):
-        SFP_SM_ENUM = {STATE_HW_NOT_PRESENT: self.check_if_hw_present
-            , STATE_HW_PRESENT: self.check_if_power_on
-            , STATE_NOT_POWERED: self.power_on_module
-            , STATE_POWERED: self.check_if_module_available
-            , STATE_MODULE_AVAILABLE: self.check_module_type
-            , STATE_FW_CONTROL: self.save_module_control_mode
-            , STATE_SW_CONTROL: self.save_module_control_mode
-            , STATE_ERROR_HANDLER: STATE_ERROR_HANDLER
-            , STATE_POWER_LIMIT_ERROR: STATE_POWER_LIMIT_ERROR
-            , STATE_SYSFS_ERROR: STATE_SYSFS_ERROR
-        }
-        logger.log_debug("getting state machine func for state {} for port {}".format(sm, port))
-        try:
-            func = SFP_SM_ENUM[sm]
-            logger.log_debug("got state machine func {} for state {} for port {}".format(func, sm, port))
-            return func
-        except KeyError as e:
-            logger.log_error("exception {} for port {} sm {}".format(e, port, sm))
-        return None
-
-    def run(self):
-        # check first if the system supports independent mode and set boolean accordingly
-        (platform_path, hwsku_dir) = device_info.get_paths_to_platform_and_hwsku_dirs()
-        logger.log_info("hwsku_dir {} found, continue to check sai.profile file".format(hwsku_dir))
-        independent_file = SAI_PROFILE_FILE.format(hwsku_dir)
-        if os.path.isfile(independent_file):
-            logger.log_info("file {} found, checking content for independent mode value".format(independent_file))
-            with open(independent_file, "r") as independent_file_fd:
-                found = False
-                independent_file_content = ' '
-                logger.log_info("file {} found, checking content for independent mode value".format(independent_file))
-                while independent_file_content and not found:
-                    independent_file_content = independent_file_fd.readline()
-                    if SAI_INDEP_MODULE_MODE in independent_file_content and \
-                            SAI_INDEP_MODULE_MODE_DELIMITER in independent_file_content:
-                        independent_file_splitted = independent_file_content.split(SAI_INDEP_MODULE_MODE_DELIMITER)
-                        if (len(independent_file_splitted) > 1):
-                            self.is_supported_indep_mods_system = int(independent_file_splitted[1]) == int(SAI_INDEP_MODULE_MODE_TRUE_STR)
-                            logger.log_notice(f"{SAI_INDEP_MODULE_MODE}={SAI_INDEP_MODULE_MODE_TRUE_STR} in file {independent_file}, \
-                                module host management mode is enabled")
-                            found = True
-        else:
-            logger.log_notice("module host management mode is disabled".format(independent_file))
-
-        # static init - at first go over all ports and check each one if it's independent module or legacy
-        self.sfp_changes_dict = {}
-        # check for each port if the module connected and if it supports independent mode or legacy
-        num_of_ports = DeviceDataManager.get_sfp_count()
-        # create the modules sysfs fds poller
-        self.poll_obj = select.poll()
-        # read cmdline to check if warm reboot done. cannot use swsscommon warmstart since this code runs after
-        # warm-reboot is finished. if done, need to read control sysfs per port and act accordingly since modules are
-        # not reset in warm-reboot
-        cmdline_dict = {}
-        proc_cmdline_str = utils.read_str_from_file(PROC_CMDLINE)
-        if CMDLINE_STR_TO_LOOK_FOR in proc_cmdline_str:
-            cmdline_dict[CMDLINE_STR_TO_LOOK_FOR] = proc_cmdline_str.split(CMDLINE_STR_TO_LOOK_FOR)[1]
-        if CMDLINE_STR_TO_LOOK_FOR in cmdline_dict.keys():
-            self.is_warm_reboot = cmdline_dict[CMDLINE_STR_TO_LOOK_FOR] == CMDLINE_VAL_TO_LOOK_FOR
-            logger.log_info(f"system was warm rebooted is_warm_reboot: {self.is_warm_reboot}")
-        for port in range(num_of_ports):
-            # check sysfs per port whether it's independent mode or legacy
-            temp_module_sm = ModuleStateMachine(port_num=port, initial_state=STATE_HW_NOT_PRESENT
-                                              , current_state=STATE_HW_NOT_PRESENT)
-            module_fd_indep_path = SYSFS_INDEPENDENT_FD_PRESENCE.format(port)
-            logger.log_info("system in indep mode: {} port {}".format(self.is_supported_indep_mods_system, port))
-            if self.is_warm_reboot:
-                logger.log_info("system was warm rebooted is_warm_reboot: {} trying to read control sysfs for port {}"
-                                .format(self.is_warm_reboot, port))
-                port_control_file = SYSFS_INDEPENDENT_FD_FW_CONTROL.format(port)
-                try:
-                    port_control = utils.read_int_from_file(port_control_file, raise_exception=True)
-                    self.port_control_dict[port] = port_control
-                    logger.log_info(f"port control sysfs is {port_control} for port {port}")
-                except Exception as e:
-                    logger.log_error("exception {} for port {} trying to read port control sysfs {}"
-                                     .format(e, port, port_control_file))
-            if (self.is_supported_indep_mods_system and os.path.isfile(module_fd_indep_path)) \
-                    and not (self.is_warm_reboot and 0 == port_control):
-                logger.log_info("system in indep mode: {} port {} reading file {}".format(self.is_supported_indep_mods_system, port, module_fd_indep_path))
-                temp_module_sm.set_is_indep_modules(True)
-                temp_module_sm.set_module_fd_path(module_fd_indep_path)
-                module_fd = open(module_fd_indep_path, "r")
-                temp_module_sm.set_module_fd(module_fd)
-            else:
-                module_fd_legacy_path = self.get_sysfs_ethernet_port_fd(SYSFS_LEGACY_FD_PRESENCE, port)
-                temp_module_sm.set_module_fd_path(module_fd_legacy_path)
-                module_fd = open(module_fd_legacy_path, "r")
-                temp_module_sm.set_module_fd(module_fd)
-            # add lock to use with timer task updating next state per module object
-            self.modules_lock_list.append(threading.Lock())
-            # start SM for this independent module
-            logger.log_debug("adding temp_module_sm {} to sfp_port_dict".format(temp_module_sm))
-            self.sfp_port_dict_initial[port] = temp_module_sm
-            self.sfp_port_dict[port] = temp_module_sm
-
-        i = 0
-        # need at least 1 module in final state until it makes sense to send changes dict
-        is_final_state_module = False
-        all_static_detection_done = False
-        logger.log_debug(f"sfp_port_dict before starting static detection: {self.sfp_port_dict} main_thread_stop_event: "
-                    f"{self.main_thread_stop_event.is_set()} all_static_detection_done: {all_static_detection_done}")
-        # static detection - loop on different state for all ports until all done
-        while not self.main_thread_stop_event.is_set() and not all_static_detection_done:
-            logger.log_debug("static detection running iteration {}".format(i))
-            waiting_list_len = len(self.waiting_modules_list)
-            sfp_port_dict_keys_len = len(self.sfp_port_dict.keys())
-            if waiting_list_len == sfp_port_dict_keys_len:
-                logger.log_debug("static detection length of waiting list {}: {} and sfp port dict keys {}:{} is the same, sleeping 1 second..."
-                              .format(waiting_list_len, self.waiting_modules_list, sfp_port_dict_keys_len, self.sfp_port_dict.keys()))
-                time.sleep(1)
-            else:
-                logger.log_debug("static detection length of waiting list {}: {} and sfp port dict keys {}: {} is different, NOT sleeping 1 second"
-                              .format(waiting_list_len, self.waiting_modules_list, sfp_port_dict_keys_len, self.sfp_port_dict.keys()))
-            for port_num, module_sm_obj in self.sfp_port_dict.items():
-                curr_state = module_sm_obj.get_current_state()
-                logger.log_debug(f'static detection STATE_LOG {port_num}: curr_state is {curr_state}')
-                func = self.get_sm_func(curr_state, port_num)
-                logger.log_debug("static detection got returned func {} for state {}".format(func, curr_state))
-                try:
-                    if not isinstance(func, str):
-                        if func is not None:
-                            next_state = func(port_num, module_sm_obj)
-                except TypeError as e:
-                    logger.log_error("static detection exception {} for port {} traceback:\n{}".format(e, port_num, traceback.format_exc()))
-                    module_sm_obj.set_final_state(STATE_ERROR_HANDLER)
-                    continue
-                logger.log_debug(f'static detection STATE_LOG {port_num}: next_state is {next_state}')
-                if self.timer.is_alive():
-                    logger.log_debug("static detection timer threads is alive, acquiring lock")
-                    self.modules_lock_list[port_num].acquire()
-                # for STATE_NOT_POWERED we dont advance to next state, timerTask is doing it into STATE_POWERED
-                if curr_state != STATE_NOT_POWERED or not module_sm_obj.wait_for_power_on:
-                    module_sm_obj.set_next_state(next_state)
-                    module_sm_obj.advance_state()
-                if module_sm_obj.get_final_state():
-                    logger.log_info(f'static detection STATE_LOG {port_num}: enter final state {module_sm_obj.get_final_state()}')
-                    is_final_state_module = True
-                if self.timer.is_alive():
-                    self.modules_lock_list[port_num].release()
-                is_timer_alive = self.timer.is_alive()
-                logger.log_debug("static detection timer thread is_alive {} port {}".format(is_timer_alive, port_num))
-                if STATE_NOT_POWERED == curr_state:
-                    if not is_timer_alive:
-                        logger.log_debug ("static detection curr_state is {} and timer thread is_alive {}, running timer task thread"
-                               .format(curr_state, is_timer_alive))
-                        # call timer task
-                        self.timer = threading.Timer(1.0, self.timerTask)
-                        self.timer.start()
-                    if self.timer.is_alive():
-                        logger.log_debug("timer thread is_alive {}, locking module obj".format(self.timer.is_alive()))
-                        self.modules_lock_list[port_num].acquire()
-                    module_sm_obj.set_next_state(next_state)
-                    if self.timer.is_alive():
-                        logger.log_debug("timer thread is_alive {}, releasing module obj".format(self.timer.is_alive()))
-                        self.modules_lock_list[port_num].release()
-
-            if is_final_state_module:
-                self.map_ports_final_state()
-                self.delete_ports_from_dict()
-                self.send_changes_to_shared_queue()
-                self.register_presece_closed_ports(False, self.register_hw_present_fds)
-            i += 1
-            self.register_hw_present_fds = []
-            logger.log_debug("sfp_port_dict: {}".format(self.sfp_port_dict))
-            for port_num, module_sm_obj in self.sfp_port_dict.items():
-                logger.log_debug("static detection port_num: {} initial state: {} current_state: {} next_state: {}"
-                       .format(port_num, module_sm_obj.initial_state, module_sm_obj.get_current_state()
-                               , module_sm_obj.get_next_state()))
-            sfp_port_dict_keys_len = len(self.sfp_port_dict.keys())
-            if sfp_port_dict_keys_len == 0:
-                logger.log_notice('All ports have been initialized, static detection is done')
-                all_static_detection_done = True
-            else:
-                logger.log_info("Continue static detection, pending ports number: {}".format(sfp_port_dict_keys_len))
-
-        logger.log_debug(f"sfp_port_dict before dynamic detection: {self.sfp_port_dict} "
-                        f"main_thread_stop_event.is_set(): {self.main_thread_stop_event.is_set()}")
-        # dynamic detection - loop on polling changes, run state machine for them and put them into shared queue
-        i = 0
-        # need at least 1 module in final state until it makes sense to send changes dict
-        is_final_state_module = False
-        # initialize fds events count to 0
-        for fd_fileno in self.fds_mapping_to_obj:
-            module_obj = self.fds_mapping_to_obj[fd_fileno]['module_obj']
-            # for debug purposes
-            self.fds_events_count_dict[module_obj.port_num] = { 'presence' : 0 , 'power_good' : 0 }
-        while not self.main_thread_stop_event.is_set():
-            logger.log_debug("dynamic detection running iteration {}".format(i))
-            # poll for changes with 1 second timeout
-            fds_events = self.poll_obj.poll(1000)
-            logger.log_debug("dynamic detection polled obj checking fds_events iteration {}".format(i))
-            for fd, event in fds_events:
-                # get modules object from fd according to saved key-value of fd-module obj saved earlier
-                logger.log_info("dynamic detection working on fd {} event {}".format(fd, event))
-                module_obj = self.fds_mapping_to_obj[fd]['module_obj']
-                module_fd = self.fds_mapping_to_obj[fd]['fd']
-                fd_name = self.fds_mapping_to_obj[fd]['fd_name']
-                if 'presence' == fd_name:
-                    module_fd_path = module_obj.module_fd_path
-                elif 'power_good' == fd_name:
-                    module_fd_path = module_obj.module_power_good_fd_path
-                self.fds_events_count_dict[module_obj.port_num][fd_name] += 1
-                try:
-                    module_fd.seek(0)
-                    val = module_fd.read().strip()
-                    logger.log_info("dynamic detection got module_obj {} with port {} from fd number {} path {} val {} count {}"
-                                  .format(module_obj, module_obj.port_num, fd, module_fd_path
-                                          , val, self.fds_events_count_dict[module_obj.port_num]))
-                    if self.is_dummy_event(int(val), module_obj):
-                        logger.log_info(f"dynamic detection dummy event port {module_obj.port_num} from fd number {fd}")
-                        continue
-                    if module_obj.port_num not in self.sfp_port_dict.keys():
-                        logger.log_info("dynamic detection port {} not found in sfp_port_dict keys: {} adding it"
-                                        .format(module_obj.port_num, self.sfp_port_dict.keys()))
-                        self.deregister_fd_from_polling(module_obj.port_num)
-                        # put again module obj in sfp_port_dict so next loop will work on it
-                        self.sfp_port_dict[module_obj.port_num] = module_obj
-                        self.delete_ports_and_reset_states_dict[module_obj.port_num] = val
-                except Exception as e:
-                    logger.log_error("dynamic detection exception on read presence {} for port {} fd name {} traceback:\n{}"
-                                    .format(e, module_obj.port_num, module_fd.name, traceback.format_exc()))
-            for port, val in self.delete_ports_and_reset_states_dict.items():
-                logger.log_info(f"dynamic detection resetting all states for port {port} close_presence_ports {val}")
-                module_obj = self.sfp_port_dict[port]
-                module_obj.reset_all_states(close_presence_ports=val)
-            self.delete_ports_and_reset_states_dict = {}
-            for port_num, module_sm_obj in self.sfp_port_dict.items():
-                curr_state = module_sm_obj.get_current_state()
-                logger.log_debug(f'dynamic detection STATE_LOG {port_num}: curr_state is {curr_state}')
-                func = self.get_sm_func(curr_state, port)
-                logger.log_debug("dynamic detection got returned func {} for state {}".format(func, curr_state))
-                try:
-                    if func is not None:
-                        next_state = func(port_num, module_sm_obj, dynamic=True)
-                except TypeError as e:
-                    logger.log_error("exception {} for port {}".format(e, port_num))
-                    continue
-                logger.log_debug(f'dynamic detection STATE_LOG {port_num}: next_state is {next_state}')
-                if self.timer.is_alive():
-                    logger.log_debug("dynamic detection timer threads is alive, acquiring lock")
-                    self.modules_lock_list[port_num].acquire()
-                if curr_state != STATE_NOT_POWERED or not module_sm_obj.wait_for_power_on:
-                    module_sm_obj.set_next_state(next_state)
-                    module_sm_obj.advance_state()
-                if module_sm_obj.get_final_state():
-                    logger.log_info(f'dynamic detection STATE_LOG {port_num}: enter final state {module_sm_obj.get_final_state()}')
-                    is_final_state_module = True
-                if self.timer.is_alive():
-                    self.modules_lock_list[port_num].release()
-                is_timer_alive = self.timer.is_alive()
-                logger.log_debug("dynamic detection timer thread is_alive {} port {}".format(is_timer_alive, port_num))
-                if STATE_NOT_POWERED == curr_state:
-                    if not is_timer_alive:
-                        logger.log_debug("dynamic detection curr_state is {} and timer thread is_alive {}, running timer task thread"
-                                      .format(curr_state, is_timer_alive))
-                        # call timer task
-                        self.timer = threading.Timer(1.0, self.timerTask)
-                        self.timer.start()
-                    if self.timer.is_alive():
-                        logger.log_debug("dynamic detection timer thread is_alive {}, locking module obj".format(self.timer.is_alive()))
-                        self.modules_lock_list[port_num].acquire()
-                    module_sm_obj.set_next_state(next_state)
-                    if self.timer.is_alive():
-                        logger.log_debug(
-                            "dynamic detection timer thread is_alive {}, releasing module obj".format(self.timer.is_alive()))
-                        self.modules_lock_list[port_num].release()
-
-            if is_final_state_module:
-                self.map_ports_final_state(dynamic=True)
-                self.delete_ports_from_dict(dynamic=True)
-                self.send_changes_to_shared_queue(dynamic=True)
-                self.register_presece_closed_ports(True, self.register_hw_present_fds)
-            if not self.sfp_port_dict and is_final_state_module:
-                is_final_state_module = False
-                logger.log_debug(f"sft_port_dict is empty {self.sfp_port_dict}, set is_final_state_module to {is_final_state_module}")
-            self.register_hw_present_fds = []
-            i += 1
-            logger.log_debug("sfp_port_dict: {}".format(self.sfp_port_dict))
-            for port_num, module_sm_obj in self.sfp_port_dict.items():
-                logger.log_debug("port_num: {} module_sm_obj initial state: {} current_state: {} next_state: {}"
-                       .format(port_num, module_sm_obj.initial_state, module_sm_obj.get_current_state(), module_sm_obj.get_next_state()))
-
-    def is_dummy_event(self, val, module_sm_obj):
-        if val == 1:
-            return module_sm_obj.final_state in (STATE_HW_PRESENT, STATE_SW_CONTROL, STATE_FW_CONTROL)
-        elif val == 0:
-            return module_sm_obj.final_state in (STATE_HW_NOT_PRESENT,)
-        return False
-
-    def check_if_hw_present(self, port, module_sm_obj, dynamic=False):
-        detection_method = 'dynamic' if dynamic else 'static'
-        logger.log_debug(f"{detection_method} detection enter check_if_hw_present port {port} module_sm_obj {module_sm_obj}")
-        module_fd_indep_path = module_sm_obj.module_fd_path
-        if os.path.isfile(module_fd_indep_path):
-            try:
-                val_int = utils.read_int_from_file(module_fd_indep_path)
-                logger.log_info(f'reading sysfs {module_fd_indep_path} got value {val_int}')
-                if 0 == val_int:
-                    retval_state = STATE_HW_NOT_PRESENT
-                    module_sm_obj.set_final_state(retval_state, detection_method)
-                    return retval_state
-                elif 1 == val_int:
-                    retval_state = STATE_HW_PRESENT
-                    if not self.is_supported_indep_mods_system or (self.is_warm_reboot and 0 == self.port_control_dict[port] and not dynamic):
-                        module_sm_obj.set_final_state(retval_state, detection_method)
-                        self.register_fd_for_polling(module_sm_obj, module_sm_obj.module_fd, 'presence')
-                    return retval_state
-                else:
-                    logger.log_error(f'unexpected value {val_int} from file {module_fd_indep_path}')
-                    module_sm_obj.set_final_state(STATE_HW_NOT_PRESENT, detection_method)
-                    return STATE_HW_NOT_PRESENT
-            except Exception as e:
-                logger.log_error("exception {} in check_if_hw_present for port {}, setting final state STATE_ERROR_HANDLER".format(e, port))
-                module_sm_obj.set_final_state(STATE_ERROR_HANDLER)
-                return STATE_ERROR_HANDLER
-        logger.log_error(f'{module_fd_indep_path} does not exists, treat this port as not present')
-        module_sm_obj.set_final_state(STATE_HW_NOT_PRESENT, detection_method)
-        return STATE_HW_NOT_PRESENT
-
-    def check_if_module_available(self, port, module_sm_obj, dynamic=False):
-        logger.log_debug("enter check_if_module_available port {} module_sm_obj {}".format(port, module_sm_obj))
-        module_fd_indep_path = SYSFS_INDEPENDENT_FD_POWER_GOOD.format(port)
-        if os.path.isfile(module_fd_indep_path):
-            try:
-                # not using utils.read_int_from_file since need to catch the exception here if no such file or it is
-                # not accesible. utils.read_int_from_file will return 0 in such a case
-                module_power_good_fd = open(module_fd_indep_path, "r")
-                val = module_power_good_fd.read()
-                val_int = int(val)
-                module_sm_obj.module_power_good_fd_path = module_fd_indep_path
-                module_sm_obj.module_power_good_fd = module_power_good_fd
-                logger.log_info(f'reading sysfs {module_fd_indep_path} got value {val_int}')
-                if 0 == val_int:
-                    module_sm_obj.set_final_state(STATE_HW_NOT_PRESENT)
-                    return STATE_HW_NOT_PRESENT
-                elif 1 == val_int:
-                    return STATE_MODULE_AVAILABLE
-                else:
-                    logger.log_error(f'unexpected value {val_int} from file {module_fd_indep_path}')
-                    module_sm_obj.set_final_state(STATE_HW_NOT_PRESENT)
-                    return STATE_HW_NOT_PRESENT
-            except Exception as e:
-                logger.log_error("exception {} for port {}".format(e, port))
-                return STATE_HW_NOT_PRESENT
-        logger.log_error(f'port {port} has no power good file {module_fd_indep_path}')
-        module_sm_obj.set_final_state(STATE_HW_NOT_PRESENT)
-        return STATE_HW_NOT_PRESENT
-
-    def check_if_power_on(self, port, module_sm_obj, dynamic=False):
-        logger.log_debug(f'enter check_if_power_on for port {port}')
-        module_fd_indep_path = SYSFS_INDEPENDENT_FD_POWER_ON.format(port)
-        if os.path.isfile(module_fd_indep_path):
-            try:
-                val_int = utils.read_int_from_file(module_fd_indep_path)
-                logger.log_info(f'reading sysfs {module_fd_indep_path} got value {val_int}')
-                if 0 == val_int:
-                    return STATE_NOT_POWERED
-                elif 1 == val_int:
-                    return STATE_POWERED
-                else:
-                    logger.log_error(f'unexpected value {val_int} from file {module_fd_indep_path}')
-                    module_sm_obj.set_final_state(STATE_HW_NOT_PRESENT)
-                    return STATE_HW_NOT_PRESENT
-            except Exception as e:
-                logger.log_error(f'check_if_power_on got exception {e}')
-                module_sm_obj.set_final_state(STATE_HW_NOT_PRESENT)
-                return STATE_HW_NOT_PRESENT
-        logger.log_error(f'port {port} has no power on file {module_fd_indep_path}')
-        module_sm_obj.set_final_state(STATE_HW_NOT_PRESENT)
-        return STATE_HW_NOT_PRESENT
-
-
-    def power_on_module(self, port, module_sm_obj, dynamic=False):
-        logger.log_debug(f'enter power_on_module for port {port}')
-        if not module_sm_obj.wait_for_power_on:
-            module_fd_indep_path_po = SYSFS_INDEPENDENT_FD_POWER_ON.format(port)
-            module_fd_indep_path_r = SYSFS_INDEPENDENT_FD_HW_RESET.format(port)
-            try:
-                if os.path.isfile(module_fd_indep_path_po):
-                    # echo 1 > /sys/module/sx_core/$asic/$module/power_on
-                    utils.write_file(module_fd_indep_path_po, "1")
-                    logger.log_info(f'write sysfs {module_fd_indep_path_po} with value 1')
-                if os.path.isfile(module_fd_indep_path_r):
-                    # de-assert hw_reset - low polarity. 1 for de-assert 0 for assert
-                    # echo 1 > /sys/module/sx_core/$asic/$module/hw_reset
-                    utils.write_file(module_fd_indep_path_r, "1")
-                    logger.log_info(f'write sysfs {module_fd_indep_path_r} with value 1')
-                self.add_port_to_wait_reset(module_sm_obj)
-            except Exception as e:
-                logger.log_error("exception in power_on_module {} for port {}".format(e, port))
-                return STATE_HW_NOT_PRESENT
-        return STATE_NOT_POWERED
-
-    def check_module_type(self, port, module_sm_obj, dynamic=False):
-        logger.log_debug("enter check_module_type port {} module_sm_obj {}".format(port, module_sm_obj))
-        sfp = sfp_module.SFP(port)
-        xcvr_api = sfp.get_xcvr_api()
-        if not xcvr_api:
-            logger.log_debug("check_module_type calling sfp reinit for port {} module_sm_obj {}"
-                            .format(port, module_sm_obj))
-            sfp.reinit()
-            logger.log_info("check_module_type setting as FW control as xcvr_api is None for port {} module_sm_obj {}"
-                            .format(port, module_sm_obj))
-            return STATE_FW_CONTROL
-        # QSFP-DD ID is 24, OSFP ID is 25 - only these 2 are supported currently as independent module - SW controlled
-        if not isinstance(xcvr_api, cmis.CmisApi):
-            logger.log_info("check_module_type setting STATE_FW_CONTROL for {} in check_module_type port {} module_sm_obj {}"
-                            .format(xcvr_api, port, module_sm_obj))
-            return STATE_FW_CONTROL
-        else:
-            if xcvr_api.is_flat_memory():
-                logger.log_info("check_module_type port {} setting STATE_FW_CONTROL module ID {} due to flat_mem device"
-                              .format(xcvr_api, port))
-                return STATE_FW_CONTROL
-            logger.log_debug("check_module_type checking power cap for {} in check_module_type port {} module_sm_obj {}"
-                               .format(xcvr_api, port, module_sm_obj))
-            power_cap = self.check_power_cap(port, module_sm_obj)
-            if power_cap is STATE_POWER_LIMIT_ERROR:
-                logger.log_info(f"check_module_type port {port} setting STATE_POWER_LIMIT_ERROR")
-                module_sm_obj.set_final_state(STATE_POWER_LIMIT_ERROR)
-                return STATE_POWER_LIMIT_ERROR
-            else:
-                # first read the frequency support - if it's 1 then continue, if it's 0 no need to do anything
-                module_fd_freq_support_path = SYSFS_INDEPENDENT_FD_FREQ_SUPPORT.format(port)
-                val_int = utils.read_int_from_file(module_fd_freq_support_path)
-                logger.log_info(f'reading sysfs {module_fd_freq_support_path} got value {val_int}')
-                if 1 == val_int:
-                    # read the module maximum supported clock of Management Comm Interface (MCI) from module EEPROM.
-                    # from byte 2 bits 3-2:
-                    # 00b means module supports up to 400KHz
-                    # 01b means module supports up to 1MHz
-                    logger.log_debug(f"check_module_type reading mci max frequency for port {port}")
-                    read_mci = xcvr_api.xcvr_eeprom.read_raw(2, 1)
-                    logger.log_debug(f"check_module_type read mci max frequency {read_mci} for port {port}")
-                    mci_bits = read_mci & 0b00001100
-                    logger.log_debug(f"check_module_type read mci max frequency bits {mci_bits} for port {port}")
-                    # Then, set it to frequency Sysfs using:
-                    # echo <val> > /sys/module/sx_core/$asic/$module/frequency //  val: 0 - up to 400KHz, 1 - up to 1MHz
-                    indep_fd_freq = SYSFS_INDEPENDENT_FD_FREQ.format(port)
-                    utils.write_file(indep_fd_freq, mci_bits)
-                    logger.log_info(f'write sysfs {indep_fd_freq} with value {mci_bits}')
-                logger.log_info(f"check_module_type port {port} setting STATE_SW_CONTROL")
-                return STATE_SW_CONTROL
-
-    def check_power_cap(self, port, module_sm_obj, dynamic=False):
-        logger.log_debug("enter check_power_cap port {} module_sm_obj {}".format(port, module_sm_obj))
-        sfp = sfp_module.SFP(port)
-        xcvr_api = sfp.get_xcvr_api()
-        field = xcvr_api.xcvr_eeprom.mem_map.get_field(consts.MAX_POWER_FIELD)
-        powercap_ba = xcvr_api.xcvr_eeprom.reader(field.get_offset(), field.get_size())
-        logger.log_debug("check_power_cap got powercap bytearray {} for port {} module_sm_obj {}".format(powercap_ba, port, module_sm_obj))
-        powercap = int.from_bytes(powercap_ba, "big")
-        logger.log_debug("check_power_cap got powercap {} for port {} module_sm_obj {}".format(powercap, port, module_sm_obj))
-        indep_fd_power_limit = self.get_sysfs_ethernet_port_fd(SYSFS_INDEPENDENT_FD_POWER_LIMIT, port)
-        cage_power_limit = utils.read_int_from_file(indep_fd_power_limit)
-        logger.log_info(f'reading sysfs {indep_fd_power_limit} got value {cage_power_limit}, power capability from EEPROM is {powercap}')
-        if powercap > int(cage_power_limit):
-            logger.log_info("check_power_cap powercap {} != cage_power_limit {} for port {} module_sm_obj {}".format(powercap, cage_power_limit, port, module_sm_obj))
-            module_sm_obj.set_final_state(STATE_POWER_LIMIT_ERROR)
-            return STATE_POWER_LIMIT_ERROR
-
-    def save_module_control_mode(self, port, module_sm_obj, dynamic=False):
-        detection_method = 'dynamic' if dynamic else 'static'
-        logger.log_debug("{} detection save_module_control_mode setting current state {} for port {} as final state"
-                        .format(detection_method, module_sm_obj.get_current_state(), port))
-        state = module_sm_obj.get_current_state()
-        module_sm_obj.set_final_state(state)
-        try:
-            if state == STATE_FW_CONTROL:
-                # echo 0 > /sys/module/sx_core/$asic/$module/control
-                indep_fd_fw_control = SYSFS_INDEPENDENT_FD_FW_CONTROL.format(port)
-                utils.write_file(indep_fd_fw_control, "0")
-                logger.log_info(f'write sysfs {indep_fd_fw_control} with value 0')
-                # update the presence sysfs fd to legacy FD presence, first close the previous fd
-                module_sm_obj.module_fd.close()
-                module_fd_legacy_path = SYSFS_LEGACY_FD_PRESENCE.format(port)
-                module_sm_obj.set_module_fd_path(module_fd_legacy_path)
-                module_fd = open(module_fd_legacy_path, "r")
-                module_sm_obj.set_module_fd(module_fd)
-                logger.log_debug("save_module_control_mode changed module fd to legacy present for port {}".format(port))
-            else:
-                # registering power good sysfs even if not good, so we can get an event from poller upon changes
-                self.register_fd_for_polling(module_sm_obj, module_sm_obj.module_power_good_fd, 'power_good')
-            # register the module's sysfs fd to poller with ERR and PRI attrs
-            logger.log_debug("save_module_control_mode registering sysfs fd {} number {} path {} for port {}"
-                          .format(module_sm_obj.module_fd, module_sm_obj.module_fd.fileno(), module_sm_obj.set_module_fd_path, port))
-        except Exception as e:
-            logger.log_error("{} detection exception on read presence {} for port {} fd name {} traceback:\n{}"
-                             .format(detection_method, e, port, module_sm_obj.module_fd.name, traceback.format_exc()))
-        self.register_fd_for_polling(module_sm_obj, module_sm_obj.module_fd, 'presence')
-        logger.log_info("save_module_control_mode set current state {} for port {} as final state {}".format(
-            module_sm_obj.get_current_state(), port, module_sm_obj.get_final_state()))
-
-    def register_fd_for_polling(self, module_sm_obj, fd, fd_name):
-        self.fds_mapping_to_obj[fd.fileno()] = {'module_obj' : module_sm_obj,
-                                                'fd': fd,
-                                                'fd_name' : fd_name}
-        if module_sm_obj.port_num not in self.port_to_fds:
-            self.port_to_fds[module_sm_obj.port_num] = [fd]
-        else:
-            self.port_to_fds[module_sm_obj.port_num].append(fd)
-        self.poll_obj.register(fd, select.POLLERR | select.POLLPRI)
-
-    def deregister_fd_from_polling(self, port):
-        if port in self.port_to_fds:
-            fds = self.port_to_fds[port]
-            for fd in fds:
-                self.fds_mapping_to_obj.pop(fd.fileno())
-                self.poll_obj.unregister(fd)
-            self.port_to_fds.pop(port)
-
-    def timerTask(self): # wakes up every 1 second
-        logger.log_debug("timerTask entered run state")
-        empty = False
-        i = 0
-        while not empty:
-            logger.log_debug("timerTask while loop iteration {}".format(i))
-            empty = True
-            port_list_to_delete = []
-            for port in self.waiting_modules_list:
-                logger.log_debug("timerTask working on port {}".format(port))
-                empty = False
-                module = self.sfp_port_dict[port]
-                logger.log_debug("timerTask got module with port_num {} from port {}".format(module.port_num, port))
-                state = module.get_current_state()
-                if module and state == STATE_NOT_POWERED:
-                    logger.log_debug("timerTask module {} current_state {} counting seconds since reset_start_time"
-                                  .format(module, module.get_current_state()))
-                    if time.time() - module.reset_start_time >= 3:
-                        # set next state as STATE_POWERED state to trigger the function of check module type
-                        logger.log_debug("timerTask module port {} locking lock of port {}".format(module.port_num, module.port_num))
-                        self.modules_lock_list[module.port_num].acquire()
-                        logger.log_info("timerTask module port {} setting next state to STATE_POWERED".format(module.port_num))
-                        module.set_next_state(STATE_POWERED)
-                        logger.log_debug("timerTask module port {} advancing next state".format(module.port_num))
-                        module.advance_state()
-                        logger.log_debug("timerTask module port {} releasing lock of port {}".format(port, module.port_num))
-                        self.modules_lock_list[module.port_num].release()
-                        logger.log_debug("timerTask module port {} adding to delete list to remove from waiting_modules_list".format(module.port_num))
-                        port_list_to_delete.append(module.port_num)
-            logger.log_debug("timerTask deleting ports {} from waiting_modules_list...".format(port_list_to_delete))
-            for port in port_list_to_delete:
-                logger.log_debug("timerTask deleting port {} from waiting_modules_list".format(port))
-                self.waiting_modules_list.remove(port)
-            logger.log_debug("timerTask waiting_modules_list after deletion: {}".format(self.waiting_modules_list))
-            time.sleep(1)
-            i += 1
-
-    def get_sysfs_ethernet_port_fd(self, sysfs_fd, port):
-        sysfs_eth_port_fd = sysfs_fd.format(port)
-        return sysfs_eth_port_fd
-
-    def add_port_to_wait_reset(self, module_sm_obj):
-        module_sm_obj.reset_start_time = time.time()
-        module_sm_obj.wait_for_power_on = True
-        self.waiting_modules_list.add(module_sm_obj.port_num)
-        logger.log_info(f'added port {module_sm_obj.port_num} to wait list with timestamp {module_sm_obj.reset_start_time}')
-
-    def map_ports_final_state(self, dynamic=False):
-        detection_method = 'dynamic' if dynamic else 'static'
-        logger.log_debug(f"{detection_method} detection enter map_ports_final_state")
-        for port, module_obj in self.sfp_port_dict.items():
-            final_state = module_obj.get_final_state()
-            if final_state:
-                # add port to delete list that we will iterate on later and delete the ports from sfp_port_dict
-                self.sfp_delete_list_from_port_dict.append(port)
-                if final_state in [STATE_HW_NOT_PRESENT, STATE_POWER_LIMIT_ERROR, STATE_ERROR_HANDLER]:
-                    port_status = '0'
-                    logger.log_debug(f"{detection_method} detection adding port {port} to register_hw_present_fds")
-                    self.register_hw_present_fds.append(module_obj)
-                else:
-                    port_status = '1'
-                self.sfp_changes_dict[str(module_obj.port_num + 1)] = port_status
-
-    def delete_ports_from_dict(self, dynamic=False):
-        detection_method = 'dynamic' if dynamic else 'static'
-        logger.log_debug(f"{detection_method} detection sfp_port_dict before deletion: {self.sfp_port_dict}")
-        for port in self.sfp_delete_list_from_port_dict:
-            del self.sfp_port_dict[port]
-        self.sfp_delete_list_from_port_dict = []
-        logger.log_debug("{} detection sfp_port_dict after deletion: {}".format(detection_method, self.sfp_port_dict))
-
-    def send_changes_to_shared_queue(self, dynamic=False):
-        detection_method = 'dynamic' if dynamic else 'static'
-        if self.sfp_changes_dict:
-            logger.log_info(f"{detection_method} detection putting sfp_changes_dict {self.sfp_changes_dict} "
-                               f"in modules changes queue...")
-            try:
-                self.modules_changes_queue.put(self.sfp_changes_dict, timeout=1)
-                self.sfp_changes_dict = {}
-                logger.log_debug(f"{detection_method} sfp_changes_dict after put changes: {self.sfp_changes_dict}")
-            except queue.Full:
-                logger.log_error(f"{detection_method} failed to put item from modules changes queue, queue is full")
-        else:
-            logger.log_debug(f"{detection_method} sfp_changes_dict {self.sfp_changes_dict} is empty...")
-
-    def register_presece_closed_ports(self, dynamic=False, module_obj_list=[]):
-        detection_method = 'dynamic' if dynamic else 'static'
-        logger.log_debug(f"{detection_method} detection enter register_presence_closed_ports")
-        for module_obj in module_obj_list:
-            port = module_obj.port_num
-            if self.is_supported_indep_mods_system:
-                module_fd_indep_path = SYSFS_INDEPENDENT_FD_PRESENCE.format(port)
-            else:
-                module_fd_indep_path = SYSFS_LEGACY_FD_PRESENCE.format(port)
-            module_obj.set_module_fd_path(module_fd_indep_path)
-            module_fd = open(module_fd_indep_path, "r")
-            module_obj.set_module_fd(module_fd)
-            logger.log_debug(f"{detection_method} registering fd {module_fd} fd name {module_fd.name} for port {port}")
-            self.register_fd_for_polling(module_obj, module_fd, 'presence')
-
-class ModuleStateMachine(object):
-
-    def __init__(self, port_num=0, initial_state=STATE_HW_NOT_PRESENT, current_state=STATE_HW_NOT_PRESENT
-                 , next_state=STATE_HW_NOT_PRESENT, final_state='', is_indep_module=False
-                 , module_fd_path='', module_fd=None, reset_start_time=None
-                 , eeprom_poweron_reset_retries=1, module_power_good_fd_path=None, module_power_good_fd=None):
-
-        self.port_num = port_num
-        self.initial_state = initial_state
-        self.current_state = current_state
-        self.next_state = next_state
-        self.final_state = final_state
-        self.is_indep_modules = is_indep_module
-        self.module_fd_path = module_fd_path
-        self.module_fd = module_fd
-        self.reset_start_time = reset_start_time
-        self.wait_for_power_on = False
-        self.eeprom_poweron_reset_retries = eeprom_poweron_reset_retries
-        self.module_power_good_fd_path = module_power_good_fd_path
-        self.module_power_good_fd = module_power_good_fd
-
-    def set_initial_state(self, state):
-        self.initial_state = state
-
-    def get_current_state(self):
-        return self.current_state
-
-    def set_current_state(self, state):
-        self.current_state = state
-
-    def get_next_state(self):
-        return self.next_state
-
-    def set_next_state(self, state):
-        self.next_state = state
-
-    def get_final_state(self):
-        return self.final_state
-
-    def set_final_state(self, state, detection_method='static'):
-        logger.log_info(f"{detection_method} set_final_state setting {state} port {self.port_num}")
-        self.final_state = state
-
-    def advance_state(self):
-        self.set_current_state(self.next_state)
-        self.next_state = ''
-
-    def set_is_indep_modules(self, is_indep_modules):
-        self.is_indep_modules = is_indep_modules
-
-    def set_module_fd_path(self, module_fd_path):
-        self.module_fd_path = module_fd_path
-
-    def set_module_fd(self, module_fd):
-        self.module_fd = module_fd
-
-    def reset_all_states(self, def_state=STATE_HW_NOT_PRESENT, retries=1, close_presence_ports='0'):
-        self.initial_state = def_state
-        self.current_state = def_state
-        self.next_state = def_state
-        self.final_state = ''
-        self.wait_for_power_on = False
-        self.eeprom_poweron_reset_retries = retries
-        if '0' == close_presence_ports:
-            self.module_fd.close()
-        if self.module_power_good_fd:
-            self.module_power_good_fd.close()
diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py b/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py
index cea8034bb..35d5904a1 100644
--- a/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py
+++ b/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py
@@ -24,16 +24,18 @@
 
 try:
     import ctypes
+    import select
     import subprocess
     import os
     import threading
+    import time
     from sonic_py_common.logger import Logger
     from sonic_py_common.general import check_output_pipe
     from . import utils
     from .device_data import DeviceDataManager
     from sonic_platform_base.sonic_xcvr.sfp_optoe_base import SfpOptoeBase
     from sonic_platform_base.sonic_xcvr.fields import consts
-    from sonic_platform_base.sonic_xcvr.api.public import sff8636, sff8436
+    from sonic_platform_base.sonic_xcvr.api.public import cmis, sff8636, sff8436
 
 except ImportError as e:
     raise ImportError (str(e) + "- required module not found")
@@ -127,7 +129,44 @@
 CPU_MASK = PORT_TYPE_MASK & (PORT_TYPE_CPU << PORT_TYPE_OFFSET)
 
 # parameters for SFP presence
+SFP_STATUS_REMOVED = '0'
 SFP_STATUS_INSERTED = '1'
+SFP_STATUS_ERROR = '2'
+SFP_STATUS_UNKNOWN = '-1'
+
+# SFP status from PMAOS register
+# 0x1 plug in
+# 0x2 plug out
+# 0x3 plug in with error
+# 0x4 disabled, at this status SFP eeprom is not accessible, 
+#     and presence status also will be not present, 
+#     so treate it as plug out.
+SDK_SFP_STATE_IN  = 0x1
+SDK_SFP_STATE_OUT = 0x2
+SDK_SFP_STATE_ERR = 0x3
+SDK_SFP_STATE_DIS = 0x4
+SDK_SFP_STATE_UNKNOWN = 0x5
+
+SDK_STATUS_TO_SONIC_STATUS = {
+    SDK_SFP_STATE_IN:  SFP_STATUS_INSERTED,
+    SDK_SFP_STATE_OUT: SFP_STATUS_REMOVED,
+    SDK_SFP_STATE_ERR: SFP_STATUS_ERROR,
+    SDK_SFP_STATE_DIS: SFP_STATUS_REMOVED,
+    SDK_SFP_STATE_UNKNOWN: SFP_STATUS_UNKNOWN
+}
+
+# SDK error definitions begin
+
+# SFP errors that will block eeprom accessing
+SDK_SFP_BLOCKING_ERRORS = [
+    0x2, # SFP.SFP_ERROR_BIT_I2C_STUCK,
+    0x3, # SFP.SFP_ERROR_BIT_BAD_EEPROM,
+    0x5, # SFP.SFP_ERROR_BIT_UNSUPPORTED_CABLE,
+    0x6, # SFP.SFP_ERROR_BIT_HIGH_TEMP,
+    0x7, # SFP.SFP_ERROR_BIT_BAD_CABLE
+]
+
+# SDK error definitions end
 
 # SFP constants
 SFP_PAGE_SIZE = 256          # page size of page0h
@@ -162,6 +201,60 @@
 SFP_DEFAULT_TEMP_CRITICAL_THRESHOLD = 80.0
 SFP_TEMPERATURE_SCALE = 8.0
 
+# Module host management definitions begin
+SFP_SW_CONTROL = 1
+SFP_FW_CONTROL = 0
+
+CMIS_MAX_POWER_OFFSET = 201
+
+SFF_POWER_CLASS_MASK = 0xE3
+SFF_POWER_CLASS_MAPPING = {
+    0: 1.5,   # 1.5W
+    64: 2,    # 2.0W
+    128: 2.5, # 2.5W
+    192: 3.5, # 3.5W
+    193: 4,   # 4.0W
+    194: 4.5, # 4.5W
+    195: 5    # 5.0W
+}
+SFF_POWER_CLASS_OFFSET = 129
+SFF_POWER_CLASS_8_INDICATOR = 32
+SFF_POWER_CLASS_8_OFFSET = 107
+
+CMIS_MCI_EEPROM_OFFSET = 2
+CMIS_MCI_MASK = 0b00001100
+
+STATE_DOWN = 'Down'                             # Initial state
+STATE_INIT = 'Initializing'                     # Module starts initializing, check module present, also power on the module if need
+STATE_RESETTING = 'Resetting'                   # Module is resetting the firmware
+STATE_POWERED_ON = 'Power On'                   # Module is powered on, module firmware has been loaded, check module power is in good state
+STATE_SW_CONTROL = 'Software Control'           # Module is under software control
+STATE_FW_CONTROL = 'Firmware Control'           # Module is under firmware control
+STATE_POWER_BAD = 'Power Bad'                   # Module power_good returns 0
+STATE_POWER_LIMIT_ERROR = 'Exceed Power Limit'  # Module power exceeds cage power limit
+STATE_NOT_PRESENT = 'Not Present'               # Module is not present
+
+EVENT_START = 'Start'
+EVENT_NOT_PRESENT = 'Not Present'
+EVENT_RESET = 'Reset'
+EVENT_POWER_ON = 'Power On'
+EVENT_RESET_DONE = 'Reset Done'
+EVENT_POWER_BAD = 'Power Bad'
+EVENT_SW_CONTROL = 'Software Control'
+EVENT_FW_CONTROL = 'Firmware Control'
+EVENT_POWER_LIMIT_EXCEED = 'Power Limit Exceed'
+EVENT_POWER_GOOD = 'Power Good'
+EVENT_PRESENT = 'Present'
+
+ACTION_ON_START = 'On Start'
+ACTION_ON_RESET = 'On Reset'
+ACTION_ON_POWERED = 'On Powered'
+ACTION_ON_SW_CONTROL = 'On Software Control'
+ACTION_ON_FW_CONTROL = 'On Firmware Control'
+ACTION_ON_POWER_LIMIT_ERROR = 'On Power Limit Error'
+ACTION_ON_CANCEL_WAIT = 'On Cancel Wait'
+# Module host management definitions end
+
 # SFP EEPROM limited bytes
 limited_eeprom = {
     SFP_TYPE_CMIS: {
@@ -223,6 +316,38 @@ class NvidiaSFPCommon(SfpOptoeBase):
     sfp_index_to_logical_port_dict = {}
     sfp_index_to_logical_lock = threading.Lock()
     
+    SFP_MLNX_ERROR_DESCRIPTION_LONGRANGE_NON_MLNX_CABLE = 'Long range for non-Mellanox cable or module'
+    SFP_MLNX_ERROR_DESCRIPTION_ENFORCE_PART_NUMBER_LIST = 'Enforce part number list'
+    SFP_MLNX_ERROR_DESCRIPTION_PMD_TYPE_NOT_ENABLED = 'PMD type not enabled'
+    SFP_MLNX_ERROR_DESCRIPTION_PCIE_POWER_SLOT_EXCEEDED = 'PCIE system power slot exceeded'
+    SFP_MLNX_ERROR_DESCRIPTION_RESERVED = 'Reserved'
+
+    SDK_ERRORS_TO_DESCRIPTION = {
+        0x1: SFP_MLNX_ERROR_DESCRIPTION_LONGRANGE_NON_MLNX_CABLE,
+        0x4: SFP_MLNX_ERROR_DESCRIPTION_ENFORCE_PART_NUMBER_LIST,
+        0x8: SFP_MLNX_ERROR_DESCRIPTION_PMD_TYPE_NOT_ENABLED,
+        0xc: SFP_MLNX_ERROR_DESCRIPTION_PCIE_POWER_SLOT_EXCEEDED
+    }
+
+    SFP_MLNX_ERROR_BIT_LONGRANGE_NON_MLNX_CABLE = 0x00010000
+    SFP_MLNX_ERROR_BIT_ENFORCE_PART_NUMBER_LIST = 0x00020000
+    SFP_MLNX_ERROR_BIT_PMD_TYPE_NOT_ENABLED = 0x00040000
+    SFP_MLNX_ERROR_BIT_PCIE_POWER_SLOT_EXCEEDED = 0x00080000
+    SFP_MLNX_ERROR_BIT_RESERVED = 0x80000000
+
+    SDK_ERRORS_TO_ERROR_BITS = {
+        0x0: SfpOptoeBase.SFP_ERROR_BIT_POWER_BUDGET_EXCEEDED,
+        0x1: SFP_MLNX_ERROR_BIT_LONGRANGE_NON_MLNX_CABLE,
+        0x2: SfpOptoeBase.SFP_ERROR_BIT_I2C_STUCK,
+        0x3: SfpOptoeBase.SFP_ERROR_BIT_BAD_EEPROM,
+        0x4: SFP_MLNX_ERROR_BIT_ENFORCE_PART_NUMBER_LIST,
+        0x5: SfpOptoeBase.SFP_ERROR_BIT_UNSUPPORTED_CABLE,
+        0x6: SfpOptoeBase.SFP_ERROR_BIT_HIGH_TEMP,
+        0x7: SfpOptoeBase.SFP_ERROR_BIT_BAD_CABLE,
+        0x8: SFP_MLNX_ERROR_BIT_PMD_TYPE_NOT_ENABLED,
+        0xc: SFP_MLNX_ERROR_BIT_PCIE_POWER_SLOT_EXCEEDED
+    }
+
     def __init__(self, sfp_index):
         super(NvidiaSFPCommon, self).__init__()
         self.index = sfp_index + 1
@@ -251,46 +376,72 @@ def _get_module_info(self, sdk_index):
         error_type = utils.read_int_from_file(status_error_file_path)
 
         return oper_state, error_type
+
+    def get_fd(self, fd_type):
+        return open(f'/sys/module/sx_core/asic0/module{self.sdk_index}/{fd_type}')
+
+    def get_fd_for_polling_legacy(self):
+        """Get polling fds for when module host management is disabled
+
+        Returns:
+            object: file descriptor of present
+        """
+        return self.get_fd('present')
+
+    def get_module_status(self):
+        """Get value of sysfs status. It could return:
+            SXD_PMPE_MODULE_STATUS_PLUGGED_ENABLED_E = 0x1,
+            SXD_PMPE_MODULE_STATUS_UNPLUGGED_E = 0x2,
+            SXD_PMPE_MODULE_STATUS_MODULE_PLUGGED_ERROR_E = 0x3,
+            SXD_PMPE_MODULE_STATUS_PLUGGED_DISABLED_E = 0x4,
+            SXD_PMPE_MODULE_STATUS_UNKNOWN_E = 0x5,
+
+        Returns:
+            str: sonic status of the module
+        """
+        status = utils.read_int_from_file(f'/sys/module/sx_core/asic0/module{self.sdk_index}/status')
+        return SDK_STATUS_TO_SONIC_STATUS[status]
+
+    def get_error_info_from_sdk_error_type(self):
+        """Translate SDK error type to SONiC error state and error description. Only calls
+        when sysfs "present" returns "2".
+
+        Returns:
+            tuple: (error state, error description)
+        """
+        error_type = utils.read_int_from_file(f'/sys/module/sx_core/asic0/module{self.sdk_index}/temperature/statuserror', default=-1)
+        sfp_state_bits = NvidiaSFPCommon.SDK_ERRORS_TO_ERROR_BITS.get(error_type)
+        if sfp_state_bits is None:
+            logger.log_error(f"Unrecognized error {error_type} detected on SFP {self.sdk_index}")
+            return SFP_STATUS_ERROR, "Unknown error ({})".format(error_type)
+
+        if error_type in SDK_SFP_BLOCKING_ERRORS:
+            # In SFP at error status case, need to overwrite the sfp_state with the exact error code
+            sfp_state_bits |= SfpOptoeBase.SFP_ERROR_BIT_BLOCKING
+
+        # An error should be always set along with 'INSERTED'
+        sfp_state_bits |= SfpOptoeBase.SFP_STATUS_BIT_INSERTED
+
+        # For vendor specific errors, the description should be returned as well
+        error_description = NvidiaSFPCommon.SDK_ERRORS_TO_DESCRIPTION.get(error_type)
+        sfp_state = str(sfp_state_bits)
+        return sfp_state, error_description
     
-    @classmethod
-    def get_sfp_index_to_logical_port(cls, force=False):
-        if not cls.sfp_index_to_logical_port_dict or force:
-            config_db = utils.DbUtils.get_db_instance('CONFIG_DB')
-            port_data = config_db.get_table('PORT')
-            for key, data in port_data.items():
-                if data['index'] not in cls.sfp_index_to_logical_port_dict:
-                    cls.sfp_index_to_logical_port_dict[int(data['index']) - 1] = key
-    
-    @classmethod
-    def get_logical_port_by_sfp_index(cls, sfp_index):
-        with cls.sfp_index_to_logical_lock:
-            cls.get_sfp_index_to_logical_port()
-            logical_port_name = cls.sfp_index_to_logical_port_dict.get(sfp_index)
-            if not logical_port_name:
-                cls.get_sfp_index_to_logical_port(force=True)
-            else:
-                config_db = utils.DbUtils.get_db_instance('CONFIG_DB')
-                current_index = int(config_db.get('CONFIG_DB', f'PORT|{logical_port_name}', 'index'))
-                if current_index != sfp_index:
-                    cls.get_sfp_index_to_logical_port(force=True)
-                    logical_port_name = cls.sfp_index_to_logical_port_dict.get(sfp_index)
-            return logical_port_name
-  
 
 class SFP(NvidiaSFPCommon):
     """Platform-specific SFP class"""
     shared_sdk_handle = None
-    SFP_MLNX_ERROR_DESCRIPTION_LONGRANGE_NON_MLNX_CABLE = 'Long range for non-Mellanox cable or module'
-    SFP_MLNX_ERROR_DESCRIPTION_ENFORCE_PART_NUMBER_LIST = 'Enforce part number list'
-    SFP_MLNX_ERROR_DESCRIPTION_PMD_TYPE_NOT_ENABLED = 'PMD type not enabled'
-    SFP_MLNX_ERROR_DESCRIPTION_PCIE_POWER_SLOT_EXCEEDED = 'PCIE system power slot exceeded'
-    SFP_MLNX_ERROR_DESCRIPTION_RESERVED = 'Reserved'
-
-    SFP_MLNX_ERROR_BIT_LONGRANGE_NON_MLNX_CABLE = 0x00010000
-    SFP_MLNX_ERROR_BIT_ENFORCE_PART_NUMBER_LIST = 0x00020000
-    SFP_MLNX_ERROR_BIT_PMD_TYPE_NOT_ENABLED = 0x00040000
-    SFP_MLNX_ERROR_BIT_PCIE_POWER_SLOT_EXCEEDED = 0x00080000
-    SFP_MLNX_ERROR_BIT_RESERVED = 0x80000000
+    
+    # Class level state machine object, only applicable for module host management
+    sm = None
+    
+    # Class level wait SFP ready task, the task waits for module to load its firmware after resetting,
+    # only applicable for module host management
+    wait_ready_task = None
+    
+    # Class level action table which stores the mapping from action name to action function,
+    # only applicable for module host management
+    action_table = None
 
     def __init__(self, sfp_index, sfp_type=None, slot_id=0, linecard_port_count=0, lc_name=None):
         super(SFP, self).__init__(sfp_index)
@@ -311,6 +462,11 @@ def __init__(self, sfp_index, sfp_type=None, slot_id=0, linecard_port_count=0, l
 
         self.slot_id = slot_id
         self._sfp_type_str = None
+        # SFP state, only applicable for module host management
+        self.state = STATE_DOWN
+
+    def __str__(self):
+        return f'SFP {self.sdk_index}'
 
     def reinit(self):
         """
@@ -318,7 +474,7 @@ def reinit(self):
         :return:
         """
         self._sfp_type_str = None
-        self.refresh_xcvr_api()
+        self._xcvr_api = None
 
     def get_presence(self):
         """
@@ -327,10 +483,6 @@ def get_presence(self):
         Returns:
             bool: True if device is present, False if not
         """
-        try:
-            self.is_sw_control()
-        except:
-            return False
         eeprom_raw = self._read_eeprom(0, 1, log_on_error=False)
         return eeprom_raw is not None
 
@@ -466,7 +618,7 @@ def get_lpmode(self):
             if self.is_sw_control():
                 api = self.get_xcvr_api()
                 return api.get_lpmode() if api else False
-            elif DeviceDataManager.is_independent_mode():
+            elif DeviceDataManager.is_module_host_management_mode():
                 file_path = SFP_SDK_MODULE_SYSFS_ROOT_TEMPLATE.format(self.sdk_index) + SFP_SYSFS_POWER_MODE
                 power_mode = utils.read_int_from_file(file_path)
                 return power_mode == POWER_MODE_LOW
@@ -673,7 +825,7 @@ def set_lpmode(self, lpmode):
                 # If at some point get_lpmode=desired_lpmode, it will return true.
                 # If after timeout ends, lpmode will not be desired_lpmode, it will return false.
                 return utils.wait_until(check_lpmode, 2, 1, api=api, lpmode=lpmode)
-            elif DeviceDataManager.is_independent_mode():
+            elif DeviceDataManager.is_module_host_management_mode():
                 # FW control under CMIS host management mode. 
                 # Currently, we don't support set LPM under this mode.
                 # Just return False to indicate set Fail
@@ -1003,24 +1155,534 @@ def get_xcvr_api(self):
         return self._xcvr_api
 
     def is_sw_control(self):
-        if not DeviceDataManager.is_independent_mode():
+        if not DeviceDataManager.is_module_host_management_mode():
             return False
-        
-        db = utils.DbUtils.get_db_instance('STATE_DB')
-        logical_port = NvidiaSFPCommon.get_logical_port_by_sfp_index(self.sdk_index)
-        if not logical_port:
-            raise Exception(f'Module {self.sdk_index} is not present or under initialization')
-        
-        initialized = db.exists('STATE_DB', f'TRANSCEIVER_STATUS|{logical_port}')
-        if not initialized:
-            raise Exception(f'Module {self.sdk_index} is not present or under initialization')
-        
         try:
             return utils.read_int_from_file(f'/sys/module/sx_core/asic0/module{self.sdk_index}/control', 
                                             raise_exception=True, log_func=None) == 1
         except:
             # just in case control file does not exist
-            raise Exception(f'Module {self.sdk_index} is under initialization')
+            raise Exception(f'control sysfs for SFP {self.sdk_index} does not exist')
+    
+    def get_hw_present(self):
+        """Get hardware present status, only applicable on host management mode
+
+        Returns:
+            bool: True if module is in the cage
+        """
+        return utils.read_int_from_file(f'/sys/module/sx_core/asic0/module{self.sdk_index}/hw_present') == 1
+    
+    def get_power_on(self):
+        """Get power on status, only applicable on host management mode
+
+        Returns:
+            bool: True if the module is powered on
+        """
+        return utils.read_int_from_file(f'/sys/module/sx_core/asic0/module{self.sdk_index}/power_on') == 1
+    
+    def set_power(self, on):
+        """Control the power of this module, only applicable on host management mode
+
+        Args:
+            on (bool): True if on
+        """
+        value = 1 if on else 0
+        utils.write_file(f'/sys/module/sx_core/asic0/module{self.sdk_index}/power_on', value)
+    
+    def get_reset_state(self):
+        """Get reset state of this module, only applicable on host management mode
+
+        Returns:
+            bool: True if module is not in reset status
+        """
+        return utils.read_int_from_file(f'/sys/module/sx_core/asic0/module{self.sdk_index}/hw_reset') == 1
+    
+    def set_hw_reset(self, value):
+        """Set the module reset status
+
+        Args:
+            value (int): 1 for reset, 0 for leaving reset
+        """
+        utils.write_file(f'/sys/module/sx_core/asic0/module{self.sdk_index}/hw_reset', value)
+    
+    def get_power_good(self):
+        """Get power good status of this module, only applicable on host management mode
+
+        Returns:
+            bool: True if the power is in good status
+        """
+        return utils.read_int_from_file(f'/sys/module/sx_core/asic0/module{self.sdk_index}/power_good') == 1
+    
+    def get_control_type(self):
+        """Get control type of this module, only applicable on host management mode
+
+        Returns:
+            int: 1 - software control, 0 - firmware control
+        """
+        return utils.read_int_from_file(f'/sys/module/sx_core/asic0/module{self.sdk_index}/control')
+    
+    def set_control_type(self, control_type):
+        """Set control type for the module
+
+        Args:
+            control_type (int): 0 for firmware control, currently only 0 is allowed
+        """
+        utils.write_file(f'/sys/module/sx_core/asic0/module{self.sdk_index}/control', control_type)
+    
+    def determine_control_type(self):
+        """Determine control type according to module type
+
+        Returns:
+            enum: software control or firmware control
+        """
+        api = self.get_xcvr_api()
+        if not api:
+            logger.log_error(f'Failed to get api object for SFP {self.sdk_index}, probably module EEPROM is not ready')
+            return SFP_FW_CONTROL
+        
+        if not self.is_supported_for_software_control(api):
+            return SFP_FW_CONTROL
+        else:
+            return SFP_SW_CONTROL
+        
+    def is_cmis_api(self, xcvr_api):
+        """Check if the api type is CMIS
+
+        Args:
+            xcvr_api (object): xcvr api object
+
+        Returns:
+            bool: True if the api is of type CMIS
+        """
+        return isinstance(xcvr_api, cmis.CmisApi)
+
+    def is_sff_api(self, xcvr_api):
+        """Check if the api type is SFF
+
+        Args:
+            xcvr_api (object): xcvr api object
+
+        Returns:
+            bool: True if the api is of type SFF
+        """
+        return isinstance(xcvr_api, sff8636.Sff8636Api) or isinstance(xcvr_api, sff8436.Sff8436Api)
+
+    def is_supported_for_software_control(self, xcvr_api):
+        """Check if the api object supports software control
+
+        Args:
+            xcvr_api (object): xcvr api object
+
+        Returns:
+            bool: True if the api object supports software control
+        """
+        return self.is_cmis_api(xcvr_api) and not xcvr_api.is_flat_memory()
+
+    def check_power_capability(self):
+        """Check module max power with cage power limit
+
+        Returns:
+            bool: True if max power does not exceed cage power limit
+        """
+        max_power = self.get_module_max_power()
+        if max_power < 0:
+            return False
+        
+        power_limit = self.get_power_limit()
+        logger.log_info(f'SFP {self.sdk_index}: max_power={max_power}, power_limit={power_limit}')
+        if max_power <= power_limit:
+            return True
+        else:
+            logger.log_error(f'SFP {self.sdk_index} exceed power limit: max_power={max_power}, power_limit={power_limit}')
+            return False
+            
+    def get_power_limit(self):
+        """Get power limit of this module
+
+        Returns:
+            int: Power limit in unit of 0.25W
+        """
+        return utils.read_int_from_file(f'/sys/module/sx_core/asic0/module{self.sdk_index}/power_limit')
+        
+    def get_module_max_power(self):
+        """Get module max power from EEPROM
+
+        Returns:
+            int: max power in terms of 0.25W. Return POWER_CLASS_INVALID if EEPROM data is incorrect.
+        """
+        xcvr_api = self.get_xcvr_api()
+        if self.is_cmis_api(xcvr_api):
+            powercap_raw = self.read_eeprom(CMIS_MAX_POWER_OFFSET, 1)
+            return powercap_raw[0]
+        elif self.is_sff_api(xcvr_api):
+            power_class_raw = self.read_eeprom(SFF_POWER_CLASS_OFFSET, 1)
+            power_class_bit = power_class_raw[0] & SFF_POWER_CLASS_MASK
+            if power_class_bit in SFF_POWER_CLASS_MAPPING:
+                powercap = SFF_POWER_CLASS_MAPPING[power_class_bit]
+            elif power_class_bit == SFF_POWER_CLASS_8_INDICATOR:
+                # According to standard:
+                # Byte 128:
+                #    if bit 5 is 1, "Power Class 8 implemented (Max power declared in byte 107)"
+                # Byte 107: 
+                #    "Maximum power consumption of module. Unsigned integer with LSB = 0.1 W."
+                power_class_8_byte = self.read_eeprom(SFF_POWER_CLASS_8_OFFSET, 1)
+                powercap = power_class_8_byte[0] * 0.1
+            else:
+                logger.log_error(f'SFP {self.sdk_index} got invalid value for power class field: {power_class_bit}')
+                return -1
+
+            # Multiplying the sysfs value (0.25 Watt units) by 4 aligns it with the EEPROM max power value (1 Watt units), 
+            # ensuring both are in the same unit for a meaningful comparison
+            return powercap * 4 #
+        else:
+            # Should never hit, just in case
+            logger.log_error(f'SFP {self.sdk_index} with api type {xcvr_api} does not support getting max power')
+            return -1
+ 
+    def update_i2c_frequency(self):
+        """Update I2C frequency for the module.
+        """
+        if self.get_frequency_support():
+            api = self.get_xcvr_api()
+            if self.is_cmis_api(api):
+                # for CMIS modules, read the module maximum supported clock of Management Comm Interface (MCI) from module EEPROM.
+                # from byte 2 bits 3-2:
+                # 00b means module supports up to 400KHz
+                # 01b means module supports up to 1MHz
+                logger.log_debug(f"Reading mci max frequency for SFP {self.sdk_index}")
+                read_mci = self.read_eeprom(CMIS_MCI_EEPROM_OFFSET, 1)
+                logger.log_debug(f"Read mci max frequency {read_mci[0]} for SFP {self.sdk_index}")
+                frequency = (read_mci[0] & CMIS_MCI_MASK) >> 2
+            elif self.is_sff_api(api):
+                # for SFF modules, frequency is always 400KHz
+                frequency = 0
+            else:
+                # Should never hit, just in case
+                logger.log_error(f'SFP {self.sdk_index} with api type {api} does not support updating frequency but frequency_support sysfs return 1')
+                return
+            
+            logger.log_info(f"Read mci max frequency bits {frequency} for SFP {self.sdk_index}")
+            self.set_frequency(frequency)
+    
+    def get_frequency_support(self):
+        """Get frequency support for this module
+
+        Returns:
+            bool: True if supported
+        """
+        return utils.read_int_from_file(f'/sys/module/sx_core/asic0/module{self.sdk_index}/frequency_support') == 1
+    
+    def set_frequency(self, freqeuncy):
+        """Set module frequency.
+
+        Args:
+            freqeuncy (int): 0 - up to 400KHz, 1 - up to 1MHz
+        """
+        utils.write_file(f'/sys/module/sx_core/asic0/module{self.sdk_index}/frequency', freqeuncy)
+    
+    def disable_tx_for_sff_optics(self):
+        """Disable TX for SFF optics
+        """
+        api = self.get_xcvr_api()
+        if self.is_sff_api(api) and api.get_tx_disable_support():
+            logger.log_info(f'Disabling tx for SFP {self.sdk_index}')
+            api.tx_disable(True)
+    
+    @classmethod
+    def get_state_machine(cls):
+        """Get state machine object, create if not exists
+
+        Returns:
+            object: state machine object
+        """
+        if not cls.sm:
+            from .state_machine import StateMachine
+            sm = StateMachine()
+            sm.add_state(STATE_DOWN).add_transition(EVENT_START, STATE_INIT)
+            sm.add_state(STATE_INIT).set_entry_action(ACTION_ON_START) \
+              .add_transition(EVENT_NOT_PRESENT, STATE_NOT_PRESENT) \
+              .add_transition(EVENT_RESET, STATE_RESETTING) \
+              .add_transition(EVENT_POWER_ON, STATE_POWERED_ON) \
+              .add_transition(EVENT_FW_CONTROL, STATE_FW_CONTROL)  # for warm reboot, cable might be in firmware control at startup
+            sm.add_state(STATE_RESETTING).set_entry_action(ACTION_ON_RESET) \
+              .add_transition(EVENT_RESET_DONE, STATE_POWERED_ON) \
+              .add_transition(EVENT_NOT_PRESENT, STATE_NOT_PRESENT, ACTION_ON_CANCEL_WAIT)
+            sm.add_state(STATE_POWERED_ON).set_entry_action(ACTION_ON_POWERED) \
+              .add_transition(EVENT_POWER_BAD, STATE_POWER_BAD) \
+              .add_transition(EVENT_SW_CONTROL, STATE_SW_CONTROL) \
+              .add_transition(EVENT_FW_CONTROL, STATE_FW_CONTROL)
+            sm.add_state(STATE_SW_CONTROL).set_entry_action(ACTION_ON_SW_CONTROL) \
+              .add_transition(EVENT_NOT_PRESENT, STATE_NOT_PRESENT) \
+              .add_transition(EVENT_POWER_LIMIT_EXCEED, STATE_POWER_LIMIT_ERROR) \
+              .add_transition(EVENT_POWER_BAD, STATE_POWER_BAD)
+            sm.add_state(STATE_FW_CONTROL).set_entry_action(ACTION_ON_FW_CONTROL) \
+              .add_transition(EVENT_NOT_PRESENT, STATE_NOT_PRESENT)
+            sm.add_state(STATE_POWER_BAD).add_transition(EVENT_POWER_GOOD, STATE_POWERED_ON) \
+              .add_transition(EVENT_NOT_PRESENT, STATE_NOT_PRESENT)
+            sm.add_state(STATE_NOT_PRESENT).add_transition(EVENT_PRESENT, STATE_INIT)
+            sm.add_state(STATE_POWER_LIMIT_ERROR).set_entry_action(ACTION_ON_POWER_LIMIT_ERROR) \
+              .add_transition(EVENT_POWER_GOOD, STATE_POWERED_ON) \
+              .add_transition(EVENT_NOT_PRESENT, STATE_NOT_PRESENT)
+              
+            cls.action_table = {}
+            cls.action_table[ACTION_ON_START] = cls.action_on_start
+            cls.action_table[ACTION_ON_RESET] = cls.action_on_reset
+            cls.action_table[ACTION_ON_POWERED] = cls.action_on_powered
+            cls.action_table[ACTION_ON_SW_CONTROL] = cls.action_on_sw_control
+            cls.action_table[ACTION_ON_FW_CONTROL] = cls.action_on_fw_control
+            cls.action_table[ACTION_ON_CANCEL_WAIT] = cls.action_on_cancel_wait
+            cls.action_table[ACTION_ON_POWER_LIMIT_ERROR] = cls.action_on_power_limit_error
+            
+            cls.sm = sm
+            
+        return cls.sm
+    
+    @classmethod
+    def action_on_start(cls, sfp):
+        if sfp.get_control_type() == SFP_FW_CONTROL:
+            logger.log_info(f'SFP {sfp.sdk_index} is already FW control, probably in warm reboot')
+            sfp.on_event(EVENT_FW_CONTROL)
+            return
+        
+        if not sfp.get_hw_present():
+            logger.log_info(f'SFP {sfp.sdk_index} is not present')
+            sfp.on_event(EVENT_NOT_PRESENT)
+            return
+        
+        if not sfp.get_power_on():
+            logger.log_info(f'SFP {sfp.sdk_index} is not powered on')
+            sfp.set_power(True)
+            sfp.set_hw_reset(1)
+            sfp.on_event(EVENT_RESET)
+        else:
+            if not sfp.get_reset_state():
+                logger.log_info(f'SFP {sfp.sdk_index} is in reset state')
+                sfp.set_hw_reset(1)
+                sfp.on_event(EVENT_RESET)
+            else:
+                sfp.on_event(EVENT_POWER_ON)
+            
+    @classmethod
+    def action_on_reset(cls, sfp):
+        logger.log_info(f'SFP {sfp.sdk_index} is scheduled to wait for resetting done')
+        cls.get_wait_ready_task().schedule_wait(sfp.sdk_index)
+        
+    @classmethod
+    def action_on_powered(cls, sfp):
+        if not sfp.get_power_good():
+            logger.log_error(f'SFP {sfp.sdk_index} is not in power good state')
+            sfp.on_event(EVENT_POWER_BAD)
+            return
+        
+        control_type = sfp.determine_control_type()
+        if control_type == SFP_SW_CONTROL:
+            sfp.on_event(EVENT_SW_CONTROL)
+        else:
+            sfp.on_event(EVENT_FW_CONTROL)
+            
+    @classmethod
+    def action_on_sw_control(cls, sfp):
+        if not sfp.check_power_capability():
+            sfp.on_event(EVENT_POWER_LIMIT_EXCEED)
+            return
+        
+        sfp.update_i2c_frequency()
+        sfp.disable_tx_for_sff_optics()
+        logger.log_info(f'SFP {sfp.sdk_index} is set to software control')
+        
+    @classmethod
+    def action_on_fw_control(cls, sfp):
+        logger.log_info(f'SFP {sfp.sdk_index} is set to firmware control')
+        sfp.set_control_type(SFP_FW_CONTROL)
+        
+    @classmethod
+    def action_on_cancel_wait(cls, sfp):
+        cls.get_wait_ready_task().cancel_wait(sfp.sdk_index)
+        
+    @classmethod
+    def action_on_power_limit_error(cls, sfp):
+        logger.log_info(f'SFP {sfp.sdk_index} is powered off due to exceeding power limit')
+        sfp.set_power(False)
+        sfp.set_hw_reset(0)
+    
+    @classmethod
+    def get_wait_ready_task(cls):
+        """Get SFP wait ready task. Create if not exists.
+
+        Returns:
+            object: an instance of WaitSfpReadyTask
+        """
+        if not cls.wait_ready_task:
+            from .wait_sfp_ready_task import WaitSfpReadyTask
+            cls.wait_ready_task = WaitSfpReadyTask()
+        return cls.wait_ready_task
+    
+    def get_state(self):
+        """Return the current state.
+
+        Returns:
+            str: current state
+        """
+        return self.state
+    
+    def change_state(self, new_state):
+        """Change from old state to new state
+
+        Args:
+            new_state (str): new state
+        """
+        self.state = new_state
+
+    def on_action(self, action_name):
+        """Called when a state machine action is executing
+
+        Args:
+            action_name (str): action name
+        """
+        SFP.action_table[action_name](self)
+    
+    def on_event(self, event):
+        """Called when a state machine event arrives
+
+        Args:
+            event (str): State machine event
+        """
+        SFP.get_state_machine().on_event(self, event)
+        
+    def in_stable_state(self):
+        """Indicate whether this module is in a stable state. 'Stable state' means the module is pending on a polling event
+        from SDK.
+
+        Returns:
+            bool: True if the module is in a stable state
+        """
+        return self.state in (STATE_NOT_PRESENT, STATE_SW_CONTROL, STATE_FW_CONTROL, STATE_POWER_BAD, STATE_POWER_LIMIT_ERROR)
+        
+    def get_fds_for_poling(self):            
+        if self.state == STATE_FW_CONTROL:
+            return {
+                'present': self.get_fd('present')
+            } 
+        else:
+            return {
+                'hw_present': self.get_fd('hw_present'),
+                'power_good': self.get_fd('power_good')
+            } 
+    
+    def fill_change_event(self, port_dict):
+        """Fill change event data based on current state.
+
+        Args:
+            port_dict (dict): {<sfp_index>:<sfp_state>}
+        """
+        if self.state == STATE_NOT_PRESENT:
+            port_dict[self.sdk_index + 1] = SFP_STATUS_REMOVED
+        elif self.state == STATE_SW_CONTROL:
+            port_dict[self.sdk_index + 1] = SFP_STATUS_INSERTED
+        elif self.state == STATE_FW_CONTROL:
+            port_dict[self.sdk_index + 1] = SFP_STATUS_INSERTED
+        elif self.state == STATE_POWER_BAD or self.state == STATE_POWER_LIMIT_ERROR:
+            sfp_state = SFP.SFP_ERROR_BIT_POWER_BUDGET_EXCEEDED | SFP.SFP_STATUS_BIT_INSERTED
+            port_dict[self.sdk_index + 1] = str(sfp_state)
+            
+    def refresh_poll_obj(self, poll_obj, all_registered_fds):
+        """Refresh polling object and registered fds. This function is usually called when a cable plugin
+        event occurs. For example, user plugs out a software control module and replaces with a firmware
+        control cable. In such case, poll_obj was polling "hw_present" and "power_good" for software control,
+        and it needs to be changed to poll "present" for new control type which is firmware control.
+
+        Args:
+            poll_obj (object): poll object
+            all_registered_fds (dict): fds that have been registered to poll object
+        """
+        # find fds registered by this SFP
+        current_registered_fds = {item[2]: (fileno, item[1]) for fileno, item in all_registered_fds.items() if item[0] == self.sdk_index}
+        logger.log_debug(f'SFP {self.sdk_index} registered fds are: {current_registered_fds}')
+        if self.state == STATE_FW_CONTROL:
+            target_poll_types = ['present']
+        else:
+            target_poll_types = ['hw_present', 'power_good']
+            
+        for target_poll_type in target_poll_types:
+            if target_poll_type not in current_registered_fds:
+                # need add new fd for polling
+                logger.log_debug(f'SFP {self.sdk_index} is registering file descriptor: {target_poll_type}')
+                fd = self.get_fd(target_poll_type)
+                poll_obj.register(fd, select.POLLERR | select.POLLPRI)
+                all_registered_fds[fd.fileno()] = (self.sdk_index, fd, target_poll_type)
+            else:
+                # the fd is already in polling
+                current_registered_fds.pop(target_poll_type)
+
+        for _, item in current_registered_fds.items():
+            # Deregister poll, close fd
+            logger.log_debug(f'SFP {self.sdk_index} is de-registering file descriptor: {item}')
+            poll_obj.unregister(item[1])
+            all_registered_fds.pop(item[0])
+            item[1].close()
+
+    def is_dummy_event(self, fd_type, fd_value):
+        """Check whether an event is dummy event
+
+        Args:
+            origin_state (str): original state before polling
+            fd_type (str): polling sysfs type
+            fd_value (int): polling sysfs value
+
+        Returns:
+            bool: True if the event is a dummy event
+        """
+        if fd_type == 'hw_present' or fd_type == 'present':
+            if fd_value == int(SFP_STATUS_INSERTED):
+                return self.state in (STATE_SW_CONTROL, STATE_FW_CONTROL, STATE_POWER_BAD, STATE_POWER_LIMIT_ERROR)
+            elif fd_value == int(SFP_STATUS_REMOVED):
+                return self.state == STATE_NOT_PRESENT
+        elif fd_type == 'power_good':
+            if fd_value == 1:
+                return self.state in (STATE_SW_CONTROL, STATE_NOT_PRESENT, STATE_RESETTING)
+            else:
+                return self.state in (STATE_POWER_BAD, STATE_POWER_LIMIT_ERROR, STATE_NOT_PRESENT)
+        return False
+
+    @classmethod
+    def initialize_sfp_modules(cls, sfp_list):
+        """Initialize all modules. Only applicable when module host management is enabled
+
+        Args:
+            sfp_list (object): all sfps
+        """
+        wait_ready_task = cls.get_wait_ready_task()
+        wait_ready_task.start()
+        
+        for s in sfp_list:
+            s.on_event(EVENT_START)
+            
+        if not wait_ready_task.empty():
+            # Wait until wait_ready_task is up
+            while not wait_ready_task.is_alive():
+                pass
+
+            # Resetting SFP requires a reloading of module firmware, it takes up to 3 seconds
+            # according to standard
+            max_wait_time = 3.5
+            begin = time.time()
+            while True:
+                ready_sfp_set = wait_ready_task.get_ready_set()
+                for sfp_index in ready_sfp_set:
+                    s = sfp_list[sfp_index]
+                    logger.log_debug(f'SFP {sfp_index} is recovered from resetting state')
+                    s.on_event(EVENT_RESET_DONE)
+                elapse = time.time() - begin
+                if elapse < max_wait_time:
+                    time.sleep(0.5)
+                else:
+                    break
+
+        # Verify that all modules are in a stable state
+        for index, s in enumerate(sfp_list):
+            if not s.in_stable_state():
+                logger.log_error(f'SFP {index} is not in stable state after initializing, state={s.state}')
+            logger.log_notice(f'SFP {index} is in state {s.state} after module initialization')
 
 
 class RJ45Port(NvidiaSFPCommon):
@@ -1261,3 +1923,17 @@ def reinit(self):
         :return:
         """
         return
+
+    def get_module_status(self):
+        """Get value of sysfs status. It could return:
+            SXD_PMPE_MODULE_STATUS_PLUGGED_ENABLED_E = 0x1,
+            SXD_PMPE_MODULE_STATUS_UNPLUGGED_E = 0x2,
+            SXD_PMPE_MODULE_STATUS_MODULE_PLUGGED_ERROR_E = 0x3,
+            SXD_PMPE_MODULE_STATUS_PLUGGED_DISABLED_E = 0x4,
+            SXD_PMPE_MODULE_STATUS_UNKNOWN_E = 0x5,
+
+        Returns:
+            str: sonic status of the module
+        """
+        status = super().get_module_status()
+        return SFP_STATUS_REMOVED if status == SFP_STATUS_UNKNOWN else status
diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/sfp_event.py b/platform/mellanox/mlnx-platform-api/sonic_platform/sfp_event.py
deleted file mode 100644
index 133001020..000000000
--- a/platform/mellanox/mlnx-platform-api/sonic_platform/sfp_event.py
+++ /dev/null
@@ -1,409 +0,0 @@
-#
-# Copyright (c) 2019-2024 NVIDIA CORPORATION & AFFILIATES.
-# Apache-2.0
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-# http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-# See the License for the specific language governing permissions and
-# limitations under the License.
-#
-'''
-listen to the SDK for the SFP change event and return to chassis.
-'''
-
-
-import sys, errno
-import os
-import time
-import select
-
-from .device_data import DeviceDataManager
-try:
-    if 'PLATFORM_API_UNIT_TESTING' not in os.environ:
-        from python_sdk_api.sx_api import *
-    else:
-        from mock import MagicMock
-        class MockSxFd(object):
-            fd = 99
-        new_sx_fd_t_p = MagicMock(return_value=MockSxFd())
-        new_sx_user_channel_t_p = MagicMock()
-except KeyError:
-    pass
-from sonic_py_common.logger import Logger
-from .sfp import SFP
-
-# SFP status from PMAOS register
-# 0x1 plug in
-# 0x2 plug out
-# 0x3 plug in with error
-# 0x4 disabled, at this status SFP eeprom is not accessible, 
-#     and presence status also will be not present, 
-#     so treate it as plug out.
-SDK_SFP_STATE_IN  = 0x1
-SDK_SFP_STATE_OUT = 0x2
-SDK_SFP_STATE_ERR = 0x3
-SDK_SFP_STATE_DIS = 0x4
-SDK_SFP_STATE_UNKNOWN = 0x5
-
-# SFP status used in this file only, will not expose to XCVRD
-# STATUS_ERROR will be mapped to different status according to the error code
-STATUS_UNKNOWN = '-1'
-STATUS_ERROR   = '-2'
-
-# SFP error code, only valid when SFP at SDK_SFP_STATE_ERR status
-# Only 0x2, 0x3, 0x5, 0x6 and 0x7 will block the eeprom access,
-# so will only report above errors to XCVRD and other errors will be 
-# printed to syslog. 
-
-'''
-0x0: "Power_Budget_Exceeded",
-0x1: "Long_Range_for_non_MLNX_cable_or_module",
-0x2: "Bus_stuck",
-0x3: "bad_or_unsupported_EEPROM",
-0x4: "Enforce_part_number_list",
-0x5: "unsupported_cable",
-0x6: "High_Temperature",
-0x7: "bad_cable",
-0x8: "PMD_type_is_not_enabled",
-0x9: "[internal]Laster_TEC_failure",
-0xa: "[internal]High_current",
-0xb: "[internal]High_voltage",
-0xd: "[internal]High_power",
-0xe: "[internal]Module_state_machine_fault",
-0xc: "pcie_system_power_slot_Exceeded"
-'''
-
-# SFP errors that will block eeprom accessing
-SDK_SFP_BLOCKING_ERRORS = [
-    0x2, # SFP.SFP_ERROR_BIT_I2C_STUCK,
-    0x3, # SFP.SFP_ERROR_BIT_BAD_EEPROM,
-    0x5, # SFP.SFP_ERROR_BIT_UNSUPPORTED_CABLE,
-    0x6, # SFP.SFP_ERROR_BIT_HIGH_TEMP,
-    0x7, # SFP.SFP_ERROR_BIT_BAD_CABLE
-]
-
-SDK_ERRORS_TO_ERROR_BITS = {
-    0x0: SFP.SFP_ERROR_BIT_POWER_BUDGET_EXCEEDED,
-    0x1: SFP.SFP_MLNX_ERROR_BIT_LONGRANGE_NON_MLNX_CABLE,
-    0x2: SFP.SFP_ERROR_BIT_I2C_STUCK,
-    0x3: SFP.SFP_ERROR_BIT_BAD_EEPROM,
-    0x4: SFP.SFP_MLNX_ERROR_BIT_ENFORCE_PART_NUMBER_LIST,
-    0x5: SFP.SFP_ERROR_BIT_UNSUPPORTED_CABLE,
-    0x6: SFP.SFP_ERROR_BIT_HIGH_TEMP,
-    0x7: SFP.SFP_ERROR_BIT_BAD_CABLE,
-    0x8: SFP.SFP_MLNX_ERROR_BIT_PMD_TYPE_NOT_ENABLED,
-    0xc: SFP.SFP_MLNX_ERROR_BIT_PCIE_POWER_SLOT_EXCEEDED
-}
-
-SDK_ERRORS_TO_DESCRIPTION = {
-    0x1: SFP.SFP_MLNX_ERROR_DESCRIPTION_LONGRANGE_NON_MLNX_CABLE,
-    0x4: SFP.SFP_MLNX_ERROR_DESCRIPTION_ENFORCE_PART_NUMBER_LIST,
-    0x8: SFP.SFP_MLNX_ERROR_DESCRIPTION_PMD_TYPE_NOT_ENABLED,
-    0xc: SFP.SFP_MLNX_ERROR_DESCRIPTION_PCIE_POWER_SLOT_EXCEEDED
-}
-
-sfp_value_status_dict = {
-    SDK_SFP_STATE_IN:  str(SFP.SFP_STATUS_BIT_INSERTED),
-    SDK_SFP_STATE_OUT: str(SFP.SFP_STATUS_BIT_REMOVED),
-    SDK_SFP_STATE_ERR: STATUS_ERROR,
-    SDK_SFP_STATE_DIS: str(SFP.SFP_STATUS_BIT_REMOVED),
-}
-
-# system level event/error
-EVENT_ON_ALL_SFP = '-1'
-SYSTEM_NOT_READY = 'system_not_ready'
-SYSTEM_READY = 'system_become_ready'
-SYSTEM_FAIL = 'system_fail'
-
-SDK_DAEMON_READY_FILE = '/tmp/sdk_ready'
-
-PMPE_PACKET_SIZE = 2000
-
-logger = Logger()
-
-class sfp_event:
-    ''' Listen to plugin/plugout cable events '''
-
-    SX_OPEN_RETRIES = 30
-    SX_OPEN_TIMEOUT = 5
-    SELECT_TIMEOUT = 1
-
-    def __init__(self, rj45_port_list=None):
-        self.swid = 0
-        self.handle = None
-
-        # Allocate SDK fd and user channel structures
-        self.rx_fd_p = new_sx_fd_t_p()
-        self.user_channel_p = new_sx_user_channel_t_p()
-        if rj45_port_list:
-            self.RJ45_port_set = set(rj45_port_list)
-        else:
-            self.RJ45_port_set = set()
-
-    def initialize(self):
-        swid_cnt_p = None
-
-        try:
-            # Wait for SDK daemon to be started with detect the sdk_ready file
-            retry = 0
-            while not os.path.exists(SDK_DAEMON_READY_FILE):  
-                if retry >= self.SX_OPEN_RETRIES:
-                    raise RuntimeError("SDK daemon failed to start after {} retries and {} seconds waiting, exiting..."
-                        .format(retry, self.SX_OPEN_TIMEOUT * self.SX_OPEN_RETRIES))
-                else:
-                    logger.log_info("SDK daemon not started yet, retry {} times".format(retry))
-                    retry += 1
-                    time.sleep(self.SX_OPEN_TIMEOUT)
-
-            # After SDK daemon started, sx_api_open and sx_api_host_ifc_open is ready for call
-            rc, self.handle = sx_api_open(None)
-            if rc != SX_STATUS_SUCCESS:
-                raise RuntimeError("failed to call sx_api_open with rc {}, exiting...".format(rc))
-
-            rc = sx_api_host_ifc_open(self.handle, self.rx_fd_p)
-            if rc != SX_STATUS_SUCCESS:
-                raise RuntimeError("failed to call sx_api_host_ifc_open with rc {}, exiting...".format(rc))
-
-            self.user_channel_p.type = SX_USER_CHANNEL_TYPE_FD
-            self.user_channel_p.channel.fd = self.rx_fd_p
-
-            # Wait for switch to be created and initialized inside SDK
-            retry = 0
-            swid_cnt_p = new_uint32_t_p()
-            uint32_t_p_assign(swid_cnt_p, 0)
-            swid_cnt = 0
-            while True:
-                if retry >= self.SX_OPEN_RETRIES:
-                    raise RuntimeError("switch not created after {} retries and {} seconds waiting, exiting..."
-                        .format(retry, self.SX_OPEN_RETRIES * self.SX_OPEN_TIMEOUT))
-                else:
-                    rc = sx_api_port_swid_list_get(self.handle, None, swid_cnt_p)
-                    if rc == SX_STATUS_SUCCESS:
-                        swid_cnt = uint32_t_p_value(swid_cnt_p)
-                        if swid_cnt > 0:
-                            delete_uint32_t_p(swid_cnt_p)
-                            swid_cnt_p = None
-                            break
-                        else:
-                            logger.log_info("switch not created yet, swid_cnt {}, retry {} times and wait for {} seconds"
-                                .format(swid_cnt, retry, self.SX_OPEN_TIMEOUT * retry))
-                    else:
-                        raise RuntimeError("sx_api_port_swid_list_get fail with rc {}, retry {} times and wait for {} seconds".
-                            format(rc, retry, self.SX_OPEN_TIMEOUT * retry))
-
-                    retry += 1
-                    time.sleep(self.SX_OPEN_TIMEOUT)
-
-            # After switch was created inside SDK, sx_api_host_ifc_trap_id_register_set is ready to call
-            rc = sx_api_host_ifc_trap_id_register_set(self.handle,
-                                                    SX_ACCESS_CMD_REGISTER,
-                                                    self.swid,
-                                                    SX_TRAP_ID_PMPE,
-                                                    self.user_channel_p)
-
-            if rc != SX_STATUS_SUCCESS:
-                raise RuntimeError("sx_api_host_ifc_trap_id_register_set failed with rc {}, exiting...".format(rc))
-        except Exception as e:
-            logger.log_error("sfp_event initialization failed due to {}, exiting...".format(repr(e)))
-            if swid_cnt_p is not None:
-                delete_uint32_t_p(swid_cnt_p)
-            self.deinitialize()
-
-    def deinitialize(self):
-        if self.handle is None:
-            return
-
-        # unregister trap id
-        rc = sx_api_host_ifc_trap_id_register_set(self.handle,
-                                                  SX_ACCESS_CMD_DEREGISTER,
-                                                  self.swid,
-                                                  SX_TRAP_ID_PMPE,
-                                                  self.user_channel_p)
-        if rc != SX_STATUS_SUCCESS:
-            logger.log_error("sx_api_host_ifc_trap_id_register_set exited with error, rc {}".format(rc))
-
-        rc = sx_api_host_ifc_close(self.handle, self.rx_fd_p)
-        if rc != SX_STATUS_SUCCESS:
-            logger.log_error("sx_api_host_ifc_close exited with error, rc {}".format(rc))
-
-        rc = sx_api_close(self.handle)
-        if rc != SX_STATUS_SUCCESS:
-            logger.log_error("sx_api_close exited with error, rc {}".format(rc))
-
-        delete_sx_fd_t_p(self.rx_fd_p)
-        delete_sx_user_channel_t_p(self.user_channel_p)
-
-    def check_sfp_status(self, port_change, error_dict, timeout):
-        """
-        the meaning of timeout is aligned with select.select, which has the following meaning:
-            0: poll, returns without blocked
-            arbitrary positive value: doesn't returns until at least fd in the set is ready or
-                                        <timeout> seconds elapsed
-        Note:
-            check_sfp_status makes the use of select to retrieve the notifications, which means
-            it should has the logic of reading out all the notifications in the fd selected without blocked.
-            However, it fails to do that due to some sdk API's characteristics:
-                sx_lib_host_ifc_recv can only read one notification each time and will block when no notification in that fd.
-                sx_lib_host_ifc_recv_list can return all notification in the fd via a single reading operation but
-                                         not supported by PMPE register (I've tested it but failed)
-            as a result the only way to satisfy the logic is to call sx_lib_host_ifc_recv in a loop until all notifications
-            has been read and we have to find a way to check that. it seems the only way to check that is via using select. 
-            in this sense, we return one notification each time check_sfp_status called and let the caller, get_change_event,
-            to repeat calling it with timeout = 0 in a loop until no new notification read (in this case it returns false).
-            by doing so all the notifications in the fd can be retrieved through a single call to get_change_event.
-        """
-        found = 0
-
-        try:
-            read, _, _ = select.select([self.rx_fd_p.fd], [], [], float(timeout) / 1000)
-            print(read)
-        except select.error as err:
-            rc, msg = err
-            if rc == errno.EAGAIN or rc == errno.EINTR:
-                return False
-            else:
-                raise
-
-        for fd in read:
-            if fd == self.rx_fd_p.fd:
-                success, port_list, module_state, error_type = self.on_pmpe(self.rx_fd_p)
-                print('success = ', success)
-                if not success:
-                    logger.log_error("failed to read from {}".format(fd))
-                    break
-
-                sfp_state = sfp_value_status_dict.get(module_state, STATUS_UNKNOWN)
-                error_description = None
-                if sfp_state == STATUS_UNKNOWN:
-                    # in the following sequence, STATUS_UNKNOWN can be returned.
-                    # so we shouldn't raise exception here.
-                    # 1. some sfp module is inserted
-                    # 2. sfp_event gets stuck and fails to fetch the change event instantaneously
-                    # 3. and then the sfp module is removed
-                    # 4. sfp_event starts to try fetching the change event
-                    # in this case found is increased so that True will be returned
-                    logger.log_info("unknown module state {}, maybe the port suffers two adjacent insertion/removal".format(module_state))
-                    found += 1
-                    continue
-
-                # If get SFP status error(0x3) from SDK, then need to read the error_type to get the detailed error
-                if sfp_state == STATUS_ERROR:
-                    sfp_state_bits = SDK_ERRORS_TO_ERROR_BITS.get(error_type)
-                    if sfp_state_bits is None:
-                        logger.log_error("Unrecognized error {} detected on ports {}".format(error_type, port_list))
-                        found += 1
-                        continue
-
-                    if error_type in SDK_SFP_BLOCKING_ERRORS:
-                        # In SFP at error status case, need to overwrite the sfp_state with the exact error code
-                        sfp_state_bits |= SFP.SFP_ERROR_BIT_BLOCKING
-
-                    # An error should be always set along with 'INSERTED'
-                    sfp_state_bits |= SFP.SFP_STATUS_BIT_INSERTED
-
-                    # For vendor specific errors, the description should be returned as well
-                    error_description = SDK_ERRORS_TO_DESCRIPTION.get(error_type)
-
-                    sfp_state = str(sfp_state_bits)
-
-                for port in port_list:
-                    logger.log_info("SFP on port {} state {}".format(port, sfp_state))
-                    port_change[port+1] = sfp_state
-                    if error_description:
-                        error_dict[port+1] = error_description
-                    found += 1
-
-        return found != 0
-
-    def on_pmpe(self, fd_p):
-        ''' on port module plug event handler '''
-
-        # recv parameters
-        pkt_size = PMPE_PACKET_SIZE
-        pkt_size_p = new_uint32_t_p()
-        uint32_t_p_assign(pkt_size_p, pkt_size)
-        pkt = new_uint8_t_arr(pkt_size)
-        recv_info_p = new_sx_receive_info_t_p()
-        pmpe_t = sx_event_pmpe_t()
-        port_cnt_p = new_uint32_t_p()
-        uint32_t_p_assign(port_cnt_p, 0)
-        label_port_list = []
-        module_state = 0
-        error_type = pmpe_t.error_type
-
-        rc = sx_lib_host_ifc_recv(fd_p, pkt, pkt_size_p, recv_info_p)
-        if rc != 0:
-            logger.log_error("sx_lib_host_ifc_recv exited with error, rc %d" % rc)
-            status = False
-        else:
-            status = True
-            unknown = False
-            pmpe_t = recv_info_p.event_info.pmpe
-            port_list_size = pmpe_t.list_size
-            logical_port_list = pmpe_t.log_port_list
-            module_state = pmpe_t.module_state
-            error_type = pmpe_t.error_type
-            module_id = pmpe_t.module_id
-            slot_id = pmpe_t.slot_id  # For non-modular chassis, it should return 0
-
-            if module_state == SDK_SFP_STATE_ERR:
-                logger.log_error("Receive PMPE error event on module {}: status {} error type {}".format(module_id, module_state, error_type))
-            elif module_state == SDK_SFP_STATE_DIS:
-                logger.log_notice("Receive PMPE disable event on module {}: status {}".format(module_id, module_state))
-            elif module_state == SDK_SFP_STATE_IN or module_state == SDK_SFP_STATE_OUT:
-                logger.log_notice("Receive PMPE plug in/out event on module {}: status {}".format(module_id, module_state))
-            elif module_state == SDK_SFP_STATE_UNKNOWN:
-                unknown = True
-            else:
-                logger.log_error("Receive PMPE unknown event on module {}: status {}".format(module_id, module_state))
-
-            # Call sx_api_port_device_get with port_cnt_p=0, SDK will return the logical port number
-            rc = sx_api_port_device_get(self.handle, 1, 0, None,  port_cnt_p)
-            if rc != SX_STATUS_SUCCESS:
-                logger.log_error("Failed to get logical port number")
-                status = False
-            else:
-                port_cnt = uint32_t_p_value(port_cnt_p)
-                port_attributes_list = new_sx_port_attributes_t_arr(port_cnt)
-                rc = sx_api_port_device_get(self.handle, 1, 0, port_attributes_list,  port_cnt_p)
-                if rc != SX_STATUS_SUCCESS:
-                    logger.log_error("Failed to get logical port attributes")
-                    status = False
-                else:
-                    for i in range(port_list_size):
-                        label_port = None
-                        logical_port = sx_port_log_id_t_arr_getitem(logical_port_list, i)
-                        for j in range(port_cnt):
-                            port_attributes = sx_port_attributes_t_arr_getitem(port_attributes_list,j)
-                            if port_attributes.log_port == logical_port:
-                                label_port = slot_id * DeviceDataManager.get_linecard_max_port_count() + port_attributes.port_mapping.module_port
-                                break
-
-                        if label_port is not None:
-                            label_port_list.append(label_port)
-                delete_sx_port_attributes_t_arr(port_attributes_list)
-
-            if unknown:
-                SFP_ports_with_unknown_event = set(label_port_list) - self.RJ45_port_set
-                if SFP_ports_with_unknown_event:
-                    logger.log_error("Receive PMPE unknown event on module {}: status {}".format(module_id, module_state))
-                else:
-                    # For RJ45 ports, we treat unknown as disconnect
-                    module_state = SDK_SFP_STATE_DIS
-
-        delete_uint32_t_p(pkt_size_p)
-        delete_uint8_t_arr(pkt)
-        delete_sx_receive_info_t_p(recv_info_p)
-        delete_uint32_t_p(port_cnt_p)
-
-        if not label_port_list:
-            logger.log_error('Dropping PMPE event due to label port not found')
-
-        return status, label_port_list, module_state, error_type
diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/state_machine.py b/platform/mellanox/mlnx-platform-api/sonic_platform/state_machine.py
new file mode 100644
index 000000000..d7b6faf10
--- /dev/null
+++ b/platform/mellanox/mlnx-platform-api/sonic_platform/state_machine.py
@@ -0,0 +1,168 @@
+#
+# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+from sonic_py_common.logger import Logger
+
+logger = Logger()
+
+
+class State:
+    """Represent a state in a state machine
+    """
+    def __init__(self, name):
+        self.name = name
+        self.entry_action = None
+        self.leave_action = None
+        self.transitions = {}
+        self.event_actions = {}
+
+    def set_entry_action(self, action_name):
+        """Set an action when entering this state
+
+        Args:
+            action_name (str): action name
+
+        Returns:
+            object: self
+        """
+        self.entry_action = action_name
+        return self
+
+    def set_leave_action(self, action_name):
+        """Set a leave action when leaving the state
+
+        Args:
+            action_name (str): action name
+
+        Returns:
+            object: self
+        """
+        self.leave_action = action_name
+        return self
+
+    def add_transition(self, event, next_state, event_action=None):
+        """Add a transition item to this state
+
+        Args:
+            event (str): event name
+            next_state (str): next state that the state entity will transit to upon this event.
+            event_action (str): action called when event arrives
+
+        Raises:
+            RuntimeError: raise if the event is already in the transition table
+
+        Returns:
+            object: self
+        """
+        if event in self.transitions:
+            raise RuntimeError(f'event {event} already exists in transition table of state {self.name}')
+
+        self.transitions[event] = next_state
+        
+        if event_action:
+            if event in self.event_actions:
+                raise RuntimeError(f'event {event} already exists in action table of state {self.name}')
+            self.event_actions[event] = event_action
+        return self
+
+    def on_enter(self, entity):
+        """Called when state entity enters the state
+
+        Args:
+            entity (obj): state entity
+        """
+        if self.entry_action:
+            logger.log_debug(f'{entity} entered state [{self.name}] and is triggering action [{self.entry_action}]')
+            entity.on_action(self.entry_action)
+        else:
+            logger.log_debug(f'{entity} entered state [{self.name}]')
+
+    def on_leave(self, entity):
+        """Called when state entity leaves the state
+
+        Args:
+            entity (obj): state entity
+        """
+        if self.leave_action:
+            entity.on_action(self.leave_action)
+
+    def on_event(self, entity, event):
+        """Called when state entity has got an event
+
+        Args:
+            entity (object): state entity
+            event (str): event name
+
+        Returns:
+            str: next event name
+        """
+        if event not in self.transitions:
+            logger.log_error(f'{event} is not defined in state {self.name}')
+            return self.name
+        else:
+            if event in self.event_actions:
+                entity.on_action(self.event_actions[event])
+            return self.transitions[event]
+
+
+class StateMachine:
+    def __init__(self):
+        self.states = {}
+
+    def add_state(self, state_name):
+        """Register a state to state machine
+
+        Args:
+            state_name (str): name of the state
+
+        Raises:
+            RuntimeError: raise if state name already exists
+
+        Returns:
+            object: the new state object
+        """
+        if state_name in self.states:
+            raise RuntimeError(f'state {state_name} already exists')
+
+        state = State(state_name)
+        self.states[state_name] = state
+        return state
+
+    def on_event(self, entity, event):
+        """Called when an event occurs
+
+        Args:
+            entity (object): state entity
+            event (str): event name
+
+        Raises:
+            RuntimeError: raise if the current state is not registered
+            RuntimeError: raise if next state is not registered
+        """
+        current_state_name = entity.get_state()
+        if current_state_name not in self.states:
+            raise RuntimeError(f'Unknown state {current_state_name}')
+
+        current_state = self.states[current_state_name]
+        next_state_name = current_state.on_event(entity, event)
+        logger.log_debug(f'{entity} has got event [{event}], it is changing from state [{current_state}] to [{next_state_name}]')
+        if next_state_name not in self.states:
+            raise RuntimeError(f'Unknown next state {next_state_name}')
+        if next_state_name != current_state_name:
+            current_state.on_leave(entity)
+            entity.change_state(next_state_name)
+            self.states[next_state_name].on_enter(entity)
diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/thermal_manager.py b/platform/mellanox/mlnx-platform-api/sonic_platform/thermal_manager.py
index 5c118b4c9..3512a0cf5 100644
--- a/platform/mellanox/mlnx-platform-api/sonic_platform/thermal_manager.py
+++ b/platform/mellanox/mlnx-platform-api/sonic_platform/thermal_manager.py
@@ -1,5 +1,5 @@
 #
-# Copyright (c) 2020-2023 NVIDIA CORPORATION & AFFILIATES.
+# Copyright (c) 2020-2024 NVIDIA CORPORATION & AFFILIATES.
 # Apache-2.0
 #
 # Licensed under the Apache License, Version 2.0 (the "License");
@@ -33,7 +33,7 @@ def initialize(cls):
         and any other vendor specific initialization.
         :return:
         """
-        if DeviceDataManager.is_independent_mode():
+        if DeviceDataManager.is_module_host_management_mode():
             from .chassis import Chassis
             cls.thermal_updater_task = thermal_updater.ThermalUpdater(Chassis.chassis_instance.get_all_sfps())
             cls.thermal_updater_task.start()
@@ -46,5 +46,5 @@ def deinitialize(cls):
         is a no-op.
         :return:
         """
-        if DeviceDataManager.is_independent_mode() and cls.thermal_updater_task:
+        if DeviceDataManager.is_module_host_management_mode() and cls.thermal_updater_task:
             cls.thermal_updater_task.stop()
diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/thermal_updater.py b/platform/mellanox/mlnx-platform-api/sonic_platform/thermal_updater.py
index f2f0f75b2..889bc96d3 100644
--- a/platform/mellanox/mlnx-platform-api/sonic_platform/thermal_updater.py
+++ b/platform/mellanox/mlnx-platform-api/sonic_platform/thermal_updater.py
@@ -1,5 +1,5 @@
 #
-# Copyright (c) 2023 NVIDIA CORPORATION & AFFILIATES.
+# Copyright (c) 2023-2024 NVIDIA CORPORATION & AFFILIATES.
 # Apache-2.0
 #
 # Licensed under the Apache License, Version 2.0 (the "License");
@@ -81,10 +81,6 @@ def load_tc_config(self):
 
     def start(self):
         self.clean_thermal_data()
-        if not self.wait_all_sfp_ready():
-            logger.log_error('Failed to wait for all SFP ready, will put hw-management-tc to suspend')
-            self.control_tc(True)
-            return
         self.control_tc(False)
         self.load_tc_config()
         self._timer.start()
@@ -106,25 +102,6 @@ def clean_thermal_data(self):
                 sfp.sdk_index + 1
             )
 
-    def wait_all_sfp_ready(self):
-        logger.log_notice('Waiting for all SFP modules ready...')
-        max_wait_time = 300
-        ready_set = set()
-        while len(ready_set) != len(self._sfp_list):
-            for sfp in self._sfp_list:
-                try:
-                    sfp.is_sw_control()
-                    ready_set.add(sfp)
-                except:
-                    continue
-            max_wait_time -= 1
-            if max_wait_time == 0:
-                return False
-            time.sleep(1)
-
-        logger.log_notice('All SFP modules are ready')
-        return True
-
     def get_asic_temp(self):
         temperature = utils.read_int_from_file('/sys/module/sx_core/asic0/temperature/input', default=None)
         return temperature * ASIC_TEMPERATURE_SCALE if temperature is not None else None
diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/utils.py b/platform/mellanox/mlnx-platform-api/sonic_platform/utils.py
index a7354ac7b..77aad4a31 100644
--- a/platform/mellanox/mlnx-platform-api/sonic_platform/utils.py
+++ b/platform/mellanox/mlnx-platform-api/sonic_platform/utils.py
@@ -1,5 +1,5 @@
 #
-# Copyright (c) 2020-2023 NVIDIA CORPORATION & AFFILIATES.
+# Copyright (c) 2020-2024 NVIDIA CORPORATION & AFFILIATES.
 # Apache-2.0
 #
 # Licensed under the Apache License, Version 2.0 (the "License");
@@ -282,11 +282,13 @@ def wait_until(predict, timeout, interval=1, *args, **kwargs):
     Returns:
         _type_: _description_
     """
+    if predict(*args, **kwargs):
+        return True
     while timeout > 0:
-        if predict(*args, **kwargs):
-            return True
         time.sleep(interval)
         timeout -= interval
+        if predict(*args, **kwargs):
+            return True
     return False
 
 
diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/wait_sfp_ready_task.py b/platform/mellanox/mlnx-platform-api/sonic_platform/wait_sfp_ready_task.py
new file mode 100644
index 000000000..56b1f479f
--- /dev/null
+++ b/platform/mellanox/mlnx-platform-api/sonic_platform/wait_sfp_ready_task.py
@@ -0,0 +1,139 @@
+#
+# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+import copy
+import threading
+import time
+from sonic_py_common.logger import Logger
+
+logger = Logger()
+EMPTY_SET = set()
+
+
+class WaitSfpReadyTask(threading.Thread):
+    """When bring a module from powered off to powered on, it takes 3 seconds
+    for module to load its firmware. This class is designed to perform a wait for
+    those modules who are loading firmware.
+    """
+    WAIT_TIME = 3
+    
+    def __init__(self):
+        # Set daemon to True so that the thread will be destroyed when daemon exits.
+        super().__init__(daemon=True)
+        self.running = False
+        
+        # Lock to protect the wait list 
+        self.lock = threading.Lock()
+        
+        # Event to wake up thread function
+        self.event = threading.Event()
+        
+        # A list of SFP to be waited. Key is SFP index, value is the expire time.
+        self._wait_dict = {}
+        
+        # The queue to store those SFPs who finish loading firmware.
+        self._ready_set = set()
+        
+    def stop(self):
+        """Stop the task, only used in unit test
+        """
+        self.running = False
+        self.event.set()
+        
+    def schedule_wait(self, sfp_index):
+        """Add a SFP to the wait list
+
+        Args:
+            sfp_index (int): the index of the SFP object
+        """
+        logger.log_debug(f'SFP {sfp_index} is scheduled for waiting reset done')
+        with self.lock:
+            if len(self._wait_dict) == 0:
+                is_empty = True
+            # The item will be expired in 3 seconds
+            self._wait_dict[sfp_index] = time.time() + self.WAIT_TIME
+
+        if is_empty:
+            logger.log_debug('An item arrives, wake up WaitSfpReadyTask')
+            # wake up the thread
+            self.event.set()
+    
+    def cancel_wait(self, sfp_index):
+        """Cancel a SFP from the wait list
+
+        Args:
+            sfp_index (int): the index of the SFP object
+        """
+        logger.log_debug(f'SFP {sfp_index} is canceled for waiting reset done')
+        with self.lock:
+            if sfp_index in self._wait_dict:
+                self._wait_dict.pop(sfp_index)
+            if sfp_index in self._ready_set:
+                self._ready_set.pop(sfp_index)
+                
+    def get_ready_set(self):
+        """Get ready set and clear it
+
+        Returns:
+            set: a deep copy of self._ready_set
+        """
+        with self.lock:
+            if not self._ready_set:
+                return EMPTY_SET
+            ready_set = copy.deepcopy(self._ready_set)
+            self._ready_set.clear()
+        return ready_set
+            
+    def empty(self):
+        """Indicate if wait_dict is empty
+
+        Returns:
+            bool: True if wait_dict is empty
+        """
+        with self.lock:
+            return len(self._wait_dict) == 0
+
+    def run(self):
+        """Thread function
+        """
+        self.running = True
+        pending_remove_set = set()
+        is_empty = True
+        while self.running:
+            if is_empty:
+                logger.log_debug(f'WaitSfpReadyTask is waiting for task...')
+                # If wait_dict is empty, hold the thread until an item coming
+                self.event.wait()
+                self.event.clear()
+
+            now = time.time()
+            with self.lock:
+                logger.log_debug(f'Processing wait SFP dict: {self._wait_dict}, now={now}')
+                for sfp_index, expire_time in self._wait_dict.items():
+                    # If now time is greater than the expire time, remove
+                    # the item from wait_dict
+                    if now >= expire_time:
+                        pending_remove_set.add(sfp_index)
+
+                for sfp_index in pending_remove_set:
+                    self._wait_dict.pop(sfp_index)
+                    self._ready_set.add(sfp_index)
+                    
+                is_empty = (len(self._wait_dict) == 0)
+                    
+            pending_remove_set.clear()
+            time.sleep(1)
diff --git a/platform/mellanox/mlnx-platform-api/tests/test_change_event.py b/platform/mellanox/mlnx-platform-api/tests/test_change_event.py
new file mode 100644
index 000000000..0d3429c48
--- /dev/null
+++ b/platform/mellanox/mlnx-platform-api/tests/test_change_event.py
@@ -0,0 +1,220 @@
+#
+# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+import os
+import sys
+
+if sys.version_info.major == 3:
+    from unittest import mock
+else:
+    import mock
+
+test_path = os.path.dirname(os.path.abspath(__file__))
+modules_path = os.path.dirname(test_path)
+sys.path.insert(0, modules_path)
+
+from sonic_platform import chassis
+from sonic_platform import sfp
+
+
+class TestChangeEvent:
+    @mock.patch('sonic_platform.sfp.SFP.get_fd_for_polling_legacy')
+    @mock.patch('select.poll')
+    @mock.patch('time.time')
+    @mock.patch('sonic_platform.device_data.DeviceDataManager.is_module_host_management_mode', mock.MagicMock(return_value=False))
+    @mock.patch('sonic_platform.device_data.DeviceDataManager.get_sfp_count', mock.MagicMock(return_value=1))
+    @mock.patch('sonic_platform.chassis.extract_RJ45_ports_index', mock.MagicMock(return_value=[]))
+    @mock.patch('sonic_platform.sfp.SFP.get_module_status')
+    def test_get_change_event_legacy(self, mock_status, mock_time, mock_create_poll, mock_get_fd):
+        c = chassis.Chassis()
+        s = c.get_sfp(1)
+        
+        mock_status.return_value = sfp.SFP_STATUS_INSERTED
+        
+        # mock poll object
+        mock_poll = mock.MagicMock()
+        mock_create_poll.return_value = mock_poll
+        mock_poll.poll = mock.MagicMock(return_value = [])
+
+        # mock file descriptor for polling
+        mock_file = mock.MagicMock()
+        mock_get_fd.return_value = mock_file
+        mock_file.fileno = mock.MagicMock(return_value = 1)
+
+        timeout = 1000
+        # mock time function so that the while loop exit early
+        mock_time.side_effect = [0, timeout]
+
+        # no event, expect returning empty change event
+        _, change_event = c.get_change_event(timeout)
+        assert 'sfp' in change_event and not change_event['sfp']
+
+        # dummy event, expect returning empty change event
+        sfp_index = s.sdk_index + 1
+        mock_poll.poll.return_value = [(1, 10)]
+        mock_time.side_effect = [0, timeout]
+        _, change_event = c.get_change_event(timeout)
+        assert 'sfp' in change_event and not change_event['sfp']
+
+        # plug out event, expect returning remove event
+        mock_time.side_effect = [0, timeout]
+        mock_status.return_value = sfp.SFP_STATUS_REMOVED
+        _, change_event = c.get_change_event(timeout)
+        assert 'sfp' in change_event and sfp_index in change_event['sfp'] and change_event['sfp'][sfp_index] == sfp.SFP_STATUS_REMOVED
+
+        # error event, expect returning error event
+        mock_time.side_effect = [0, timeout]
+        mock_status.return_value = sfp.SFP_STATUS_ERROR
+        s.get_error_info_from_sdk_error_type = mock.MagicMock(return_value=('2', 'some error'))
+        _, change_event = c.get_change_event(timeout)
+        assert 'sfp' in change_event and sfp_index in change_event['sfp'] and change_event['sfp'][sfp_index] == '2'
+        assert 'sfp_error' in change_event and sfp_index in change_event['sfp_error'] and change_event['sfp_error'][sfp_index] == 'some error'
+        
+    @mock.patch('sonic_platform.sfp.SFP.get_fd')
+    @mock.patch('select.poll')
+    @mock.patch('time.time')
+    @mock.patch('sonic_platform.device_data.DeviceDataManager.is_module_host_management_mode', mock.MagicMock(return_value=True))
+    @mock.patch('sonic_platform.device_data.DeviceDataManager.get_sfp_count', mock.MagicMock(return_value=1))
+    @mock.patch('sonic_platform.chassis.extract_RJ45_ports_index', mock.MagicMock(return_value=[]))
+    @mock.patch('sonic_platform.module_host_mgmt_initializer.ModuleHostMgmtInitializer.initialize', mock.MagicMock())
+    def test_get_change_event_for_module_host_management_mode(self, mock_time, mock_create_poll, mock_get_fd):
+        """Test steps:
+            1. Simulate polling with no event
+            2. Simulate polling the first dummy event. (SDK always return a event when first polling the fd even if there is no change)
+            3. Simulate a plug out event, module transfer from sw control to not present
+            4. Simulate plugging in a fw control module, module transfer to fw control
+            5. Simulate an error event
+            6. Simulate a plug out event, module transfer from fw control to not present
+            7. Simulate plugging in a sw control module, module transfer to sw control
+            8. Simulate a power bad event, module transfer from sw control to power bad
+            9. Simulate a power good event, module transfer from power bad to sw control
+        """
+        c = chassis.Chassis()
+        c.initialize_sfp()
+        s = c._sfp_list[0]
+        s.state = sfp.STATE_SW_CONTROL
+        
+        # mock poll object
+        mock_poll = mock.MagicMock()
+        mock_create_poll.return_value = mock_poll
+        mock_poll.poll = mock.MagicMock(return_value = [])
+        
+        # mock file descriptors for polling
+        mock_hw_present_file = mock.MagicMock()
+        mock_power_good_file = mock.MagicMock()
+        mock_present_file = mock.MagicMock()
+        mock_hw_present_file.read = mock.MagicMock(return_value=sfp.SFP_STATUS_INSERTED)
+        mock_hw_present_file.fileno = mock.MagicMock(return_value = 1)
+        mock_power_good_file.read = mock.MagicMock(return_value=1)
+        mock_power_good_file.fileno = mock.MagicMock(return_value = 2)
+        mock_present_file.read = mock.MagicMock(return_value=sfp.SFP_STATUS_INSERTED)
+        mock_present_file.fileno = mock.MagicMock(return_value = 3)
+        def get_fd(fd_type):
+            if fd_type == 'hw_present':
+                return mock_hw_present_file
+            elif fd_type == 'power_good':
+                return mock_power_good_file
+            else:
+                return mock_present_file
+        mock_get_fd.side_effect = get_fd
+        
+        timeout = 1000
+        # mock time function so that the while loop exit early
+        mock_time.side_effect = [0, timeout]
+        
+        # no event, expect returning empty change event
+        _, change_event = c.get_change_event(timeout)
+        assert 'sfp' in change_event and not change_event['sfp']
+        
+        # dummy event, expect returning empty change event
+        sfp_index = s.sdk_index + 1
+        mock_poll.poll.return_value = [(1, 10)]
+        mock_time.side_effect = [0, timeout]
+        _, change_event = c.get_change_event(timeout)
+        assert 'sfp' in change_event and not change_event['sfp']
+        
+        # plug out event, expect returning remove event
+        mock_time.side_effect = [0, timeout]
+        mock_hw_present_file.read.return_value = sfp.SFP_STATUS_REMOVED
+        _, change_event = c.get_change_event(timeout)
+        assert 'sfp' in change_event and sfp_index in change_event['sfp'] and change_event['sfp'][sfp_index] == sfp.SFP_STATUS_REMOVED
+        assert s.state == sfp.STATE_NOT_PRESENT
+        
+        # plug in with a fw control cable, expect returning insert event
+        s.get_control_type = mock.MagicMock(return_value=sfp.SFP_SW_CONTROL)
+        s.get_hw_present = mock.MagicMock(return_value=True)
+        s.get_power_on = mock.MagicMock(return_value=True)
+        s.get_reset_state = mock.MagicMock(return_value=True)
+        s.get_power_good = mock.MagicMock(return_value=True)
+        s.determine_control_type = mock.MagicMock(return_value=sfp.SFP_FW_CONTROL)
+        s.set_control_type = mock.MagicMock()
+        mock_time.side_effect = [0, timeout]
+        mock_hw_present_file.read.return_value = sfp.SFP_STATUS_INSERTED
+        _, change_event = c.get_change_event(timeout)
+        assert 'sfp' in change_event and sfp_index in change_event['sfp'] and change_event['sfp'][sfp_index] == sfp.SFP_STATUS_INSERTED
+        assert s.state == sfp.STATE_FW_CONTROL
+        assert 1 not in c.registered_fds # stop polling hw_present
+        assert 2 not in c.registered_fds # stop polling power_good
+        assert 3 in c.registered_fds # start polling present because it is firmware control
+        print(c.registered_fds)
+        
+        # error event, expect returning error
+        mock_time.side_effect = [0, timeout]
+        mock_poll.poll.return_value = [(3, 10)]
+        mock_present_file.read.return_value = sfp.SFP_STATUS_ERROR
+        s.get_error_info_from_sdk_error_type = mock.MagicMock(return_value=('2', 'some error'))
+        _, change_event = c.get_change_event(timeout)
+        assert 'sfp' in change_event and sfp_index in change_event['sfp'] and change_event['sfp'][sfp_index] == '2'
+        assert 'sfp_error' in change_event and sfp_index in change_event['sfp_error'] and change_event['sfp_error'][sfp_index] == 'some error'
+        
+        # plug out the firmware control cable, expect returning remove event
+        mock_time.side_effect = [0, timeout]
+        mock_present_file.read.return_value = sfp.SFP_STATUS_REMOVED
+        _, change_event = c.get_change_event(timeout)
+        assert 'sfp' in change_event and sfp_index in change_event['sfp'] and change_event['sfp'][sfp_index] == sfp.SFP_STATUS_REMOVED
+        assert s.state == sfp.STATE_NOT_PRESENT
+        assert 1 in c.registered_fds # start polling hw_present because cable is not present, always assume software control
+        assert 2 in c.registered_fds # start polling power_good because cable is not present, always assume software control
+        assert 3 not in c.registered_fds # stop polling present
+        
+        # plug in a software control cable, expect returning insert event
+        mock_time.side_effect = [0, timeout]
+        mock_poll.poll.return_value = [(1, 10)]
+        mock_hw_present_file.read.return_value = sfp.SFP_STATUS_INSERTED
+        s.determine_control_type.return_value = sfp.SFP_SW_CONTROL
+        s.check_power_capability = mock.MagicMock(return_value=True)
+        s.update_i2c_frequency = mock.MagicMock()
+        s.disable_tx_for_sff_optics = mock.MagicMock()
+        _, change_event = c.get_change_event(timeout)
+        assert 'sfp' in change_event and sfp_index in change_event['sfp'] and change_event['sfp'][sfp_index] == sfp.SFP_STATUS_INSERTED
+        assert s.state == sfp.STATE_SW_CONTROL
+        
+        # power bad event, expect returning error event
+        mock_time.side_effect = [0, timeout]
+        mock_poll.poll.return_value = [(2, 10)]
+        mock_power_good_file.read.return_value = '0'
+        _, change_event = c.get_change_event(timeout)
+        assert 'sfp' in change_event and sfp_index in change_event['sfp'] and change_event['sfp'][sfp_index] == '5'
+        assert s.state == sfp.STATE_POWER_BAD
+        
+        # power good event, expect returning insert event
+        mock_time.side_effect = [0, timeout]
+        mock_poll.poll.return_value = [(2, 10)]
+        mock_power_good_file.read.return_value = '1'
+        _, change_event = c.get_change_event(timeout)
+        assert 'sfp' in change_event and sfp_index in change_event['sfp'] and change_event['sfp'][sfp_index] == '1'
+        assert s.state == sfp.STATE_SW_CONTROL
diff --git a/platform/mellanox/mlnx-platform-api/tests/test_chassis.py b/platform/mellanox/mlnx-platform-api/tests/test_chassis.py
index ad23cd8dd..49dfa8ff3 100644
--- a/platform/mellanox/mlnx-platform-api/tests/test_chassis.py
+++ b/platform/mellanox/mlnx-platform-api/tests/test_chassis.py
@@ -124,6 +124,7 @@ def test_fan(self):
         chassis._fan_drawer_list = []
         assert chassis.get_num_fan_drawers() == 2
 
+    @mock.patch('sonic_platform.device_data.DeviceDataManager.is_module_host_management_mode', mock.MagicMock(return_value=False))
     def test_sfp(self):
         # Test get_num_sfps, it should not create any SFP objects
         DeviceDataManager.get_sfp_count = mock.MagicMock(return_value=3)
@@ -176,6 +177,7 @@ def test_sfp(self):
         assert chassis.get_num_sfps() == 6
         sonic_platform.chassis.extract_RJ45_ports_index = mock.MagicMock(return_value=[])
 
+    @mock.patch('sonic_platform.device_data.DeviceDataManager.is_module_host_management_mode', mock.MagicMock(return_value=False))
     def test_create_sfp_in_multi_thread(self):
         DeviceDataManager.get_sfp_count = mock.MagicMock(return_value=3)
 
@@ -199,25 +201,6 @@ def test_create_sfp_in_multi_thread(self):
                 assert s.sdk_index == index
             iteration_num -= 1
 
-
-    @mock.patch('sonic_platform.device_data.DeviceDataManager.get_sfp_count', MagicMock(return_value=3))
-    def test_change_event(self):
-        chassis = Chassis()
-        chassis.modules_mgmt_thread.is_alive = MagicMock(return_value=True)
-        chassis.modules_changes_queue.get = MagicMock(return_value={1: '1'})
-
-        # Call get_change_event with timeout=0, wait until an event is detected
-        status, event_dict = chassis.get_change_event()
-        assert status is True
-        assert 'sfp' in event_dict and event_dict['sfp'][1] == '1'
-        assert len(chassis._sfp_list) == 3
-
-        # Call get_change_event with timeout=1.0
-        chassis.modules_changes_queue.get.return_value = {}
-        status, event_dict = chassis.get_change_event(timeout=1.0)
-        assert status is True
-        assert 'sfp' in event_dict and not event_dict['sfp']
-
     @mock.patch('sonic_platform.chassis.Chassis._wait_reboot_cause_ready', MagicMock(return_value=True))
     def test_reboot_cause(self):
         from sonic_platform import utils
diff --git a/platform/mellanox/mlnx-platform-api/tests/test_device_data.py b/platform/mellanox/mlnx-platform-api/tests/test_device_data.py
index c172b82a3..f67793419 100644
--- a/platform/mellanox/mlnx-platform-api/tests/test_device_data.py
+++ b/platform/mellanox/mlnx-platform-api/tests/test_device_data.py
@@ -54,11 +54,11 @@ def test_get_bios_component(self):
 
     @mock.patch('sonic_py_common.device_info.get_paths_to_platform_and_hwsku_dirs', mock.MagicMock(return_value=('', '/tmp')))
     @mock.patch('sonic_platform.device_data.utils.read_key_value_file')
-    def test_is_independent_mode(self, mock_read):
+    def test_is_module_host_management_mode(self, mock_read):
         mock_read.return_value = {}
-        assert not DeviceDataManager.is_independent_mode()
+        assert not DeviceDataManager.is_module_host_management_mode()
         mock_read.return_value = {'SAI_INDEPENDENT_MODULE_MODE': '1'}
-        assert DeviceDataManager.is_independent_mode()
+        assert DeviceDataManager.is_module_host_management_mode()
 
     @mock.patch('sonic_py_common.device_info.get_path_to_platform_dir', mock.MagicMock(return_value='/tmp'))
     @mock.patch('sonic_platform.device_data.utils.load_json_file')
@@ -74,7 +74,7 @@ def test_get_sfp_count(self, mock_load_json):
     @mock.patch('sonic_platform.device_data.DeviceDataManager.get_sfp_count', mock.MagicMock(return_value=3))
     @mock.patch('sonic_platform.device_data.utils.read_int_from_file', mock.MagicMock(return_value=1))
     @mock.patch('sonic_platform.device_data.os.path.exists')
-    @mock.patch('sonic_platform.device_data.DeviceDataManager.is_independent_mode')
+    @mock.patch('sonic_platform.device_data.DeviceDataManager.is_module_host_management_mode')
     def test_wait_platform_ready(self, mock_is_indep, mock_exists):
         mock_exists.return_value = True
         mock_is_indep.return_value = True
diff --git a/platform/mellanox/mlnx-platform-api/tests/test_module_initializer.py b/platform/mellanox/mlnx-platform-api/tests/test_module_initializer.py
new file mode 100644
index 000000000..ad833a70f
--- /dev/null
+++ b/platform/mellanox/mlnx-platform-api/tests/test_module_initializer.py
@@ -0,0 +1,98 @@
+#
+# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+import os
+import sys
+
+if sys.version_info.major == 3:
+    from unittest import mock
+else:
+    import mock
+
+test_path = os.path.dirname(os.path.abspath(__file__))
+modules_path = os.path.dirname(test_path)
+sys.path.insert(0, modules_path)
+
+from sonic_platform import chassis
+from sonic_platform import module_host_mgmt_initializer
+
+
+class TestModuleInitializer:
+    @mock.patch('os.path.exists')
+    @mock.patch('sonic_platform.utils.wait_until')
+    @mock.patch('sonic_platform.utils.is_host')
+    def test_wait_module_ready(self, mock_is_host, mock_wait, mock_exists):
+        initializer = module_host_mgmt_initializer.ModuleHostMgmtInitializer()
+        mock_is_host.return_value = True
+        mock_exists.return_value = False
+        mock_wait.return_value = True
+        initializer.wait_module_ready()
+        mock_exists.assert_called_with(module_host_mgmt_initializer.MODULE_READY_HOST_FILE)
+        assert initializer.initialized
+        
+        initializer.initialized = False
+        mock_is_host.return_value = False
+        initializer.wait_module_ready()
+        mock_exists.assert_called_with(module_host_mgmt_initializer.MODULE_READY_CONTAINER_FILE)
+        
+        initializer.initialized = False
+        mock_exists.return_value = True
+        initializer.wait_module_ready()
+        assert initializer.initialized
+        
+        initializer.initialized = False
+        mock_wait.return_value = False
+        mock_exists.return_value = False
+        initializer.wait_module_ready()
+        assert not initializer.initialized
+        
+
+    @mock.patch('sonic_platform.chassis.extract_RJ45_ports_index', mock.MagicMock(return_value=[]))
+    @mock.patch('sonic_platform.device_data.DeviceDataManager.get_sfp_count', mock.MagicMock(return_value=1))
+    @mock.patch('sonic_platform.sfp.SFP.initialize_sfp_modules', mock.MagicMock())
+    @mock.patch('sonic_platform.module_host_mgmt_initializer.ModuleHostMgmtInitializer.is_initialization_owner')
+    @mock.patch('sonic_platform.module_host_mgmt_initializer.ModuleHostMgmtInitializer.wait_module_ready')
+    @mock.patch('sonic_platform.utils.is_host')
+    def test_initialize(self, mock_is_host, mock_wait_ready, mock_owner):
+        c = chassis.Chassis()
+        initializer = module_host_mgmt_initializer.ModuleHostMgmtInitializer()
+        mock_is_host.return_value = True
+        mock_owner.return_value = False
+        # called from host side, just wait
+        initializer.initialize(c)
+        mock_wait_ready.assert_called_once()
+        mock_wait_ready.reset_mock()
+        
+        mock_is_host.return_value = False
+        # non-initializer-owner called from container side, just wait
+        initializer.initialize(c)
+        mock_wait_ready.assert_called_once()
+        mock_wait_ready.reset_mock()
+        
+        mock_owner.return_value = True
+        initializer.initialize(c)
+        mock_wait_ready.assert_not_called()
+        assert initializer.initialized
+        assert module_host_mgmt_initializer.initialization_owner
+        assert os.path.exists(module_host_mgmt_initializer.MODULE_READY_CONTAINER_FILE)
+        
+        module_host_mgmt_initializer.clean_up()
+        assert not os.path.exists(module_host_mgmt_initializer.MODULE_READY_CONTAINER_FILE)
+
+    def test_is_initialization_owner(self):
+        initializer = module_host_mgmt_initializer.ModuleHostMgmtInitializer()
+        assert not initializer.is_initialization_owner()
diff --git a/platform/mellanox/mlnx-platform-api/tests/test_modules_mgmt.py b/platform/mellanox/mlnx-platform-api/tests/test_modules_mgmt.py
deleted file mode 100644
index d0cab978c..000000000
--- a/platform/mellanox/mlnx-platform-api/tests/test_modules_mgmt.py
+++ /dev/null
@@ -1,800 +0,0 @@
-#
-# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
-# Apache-2.0
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-# http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-# See the License for the specific language governing permissions and
-# limitations under the License.
-#
-
-import os
-import queue
-import sys
-import threading
-import time
-import types
-import unittest
-
-from mock import MagicMock, patch, mock_open, Mock
-if sys.version_info.major == 3:
-    from unittest import mock
-else:
-    import mock
-
-test_path = os.path.dirname(os.path.abspath(__file__))
-modules_path = os.path.dirname(test_path)
-sys.path.insert(0, modules_path)
-
-from sonic_platform.device_data import DeviceDataManager
-from sonic_py_common import device_info
-from sonic_platform import modules_mgmt
-from sonic_platform.modules_mgmt import ModulesMgmtTask
-from sonic_platform_base.sonic_xcvr.api.public.cmis import CmisApi
-from sonic_platform_base.sonic_xcvr.xcvr_eeprom import XcvrEeprom
-from sonic_platform_base.sonic_xcvr.codes.public.cmis import CmisCodes
-from sonic_platform_base.sonic_xcvr.mem_maps.public.cmis import CmisMemMap
-from sonic_platform_base.sonic_xcvr.fields import consts
-
-DEFAULT_NUM_OF_PORTS_1 = 1
-DEFAULT_NUM_OF_PORTS_3 = 3
-DEFAULT_NUM_OF_PORTS_32 = 32
-POLLER_EXECUTED = False
-
-def _mock_sysfs_default_file_content():
-    return {
-        modules_mgmt.SYSFS_INDEPENDENT_FD_PRESENCE.format("0"): "1",
-        modules_mgmt.SYSFS_INDEPENDENT_FD_PRESENCE.format("1"): "1",
-        modules_mgmt.SYSFS_INDEPENDENT_FD_PRESENCE.format("2"): "1",
-        modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_GOOD.format("0"): "1",
-        modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_GOOD.format("1"): "1",
-        modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_GOOD.format("2"): "1",
-        modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_ON.format("0"): "1",
-        modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_ON.format("1"): "1",
-        modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_ON.format("2"): "1",
-        modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_LIMIT.format("0"): "48",
-        modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_LIMIT.format("1"): "48",
-        modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_LIMIT.format("2"): "48",
-        modules_mgmt.SYSFS_INDEPENDENT_FD_FREQ_SUPPORT.format("0"): "0",
-        modules_mgmt.SYSFS_INDEPENDENT_FD_FREQ_SUPPORT.format("1"): "0",
-        modules_mgmt.SYSFS_INDEPENDENT_FD_FREQ_SUPPORT.format("2"): "0",
-        modules_mgmt.SYSFS_INDEPENDENT_FD_HW_RESET: "",
-        modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_LIMIT: "48",
-        modules_mgmt.SYSFS_LEGACY_FD_PRESENCE.format("0"): "1",
-        modules_mgmt.SYSFS_INDEPENDENT_FD_FW_CONTROL.format("0"): "1",
-        modules_mgmt.SYSFS_INDEPENDENT_FD_FW_CONTROL.format("1"): "1",
-        modules_mgmt.SYSFS_INDEPENDENT_FD_FW_CONTROL.format("2"): "1",
-        modules_mgmt.SYSFS_LEGACY_FD_PRESENCE: "1",
-        modules_mgmt.PROC_CMDLINE: ""
-    }
-
-
-mock_file_content = _mock_sysfs_default_file_content()
-
-
-class MockPoller:
-
-    def __init__(self, modules_mgmt_task_stopping_event, modules_mgmt_thrd=None, num_of_ports=3, port_plug_out=False
-                 , feature_enabled=True, warm_reboot=False, port_plug_in=False, sleep_timeout=False):
-        self.fds_dict = {}
-        self.poller_iteration_count = 0
-        self.modules_mgmt_task_stopping_event = modules_mgmt_task_stopping_event
-        self.modules_mgmt_thrd = modules_mgmt_thrd
-        self.num_of_ports = num_of_ports
-        self.port_plug_out = port_plug_out
-        self.port_plug_in = port_plug_in
-        self.feature_enabled = feature_enabled
-        self.warm_reboot = warm_reboot
-        self.port_plug_out_changed = False
-        self.port_plug_in_changed = False
-        self.sleep_timeout = sleep_timeout
-
-    def register(self, fd, attrs):
-        self.fds_dict[fd.fileno()] = { fd : attrs }
-        assert fd.fileno() in self.fds_dict
-
-    def unregister(self, fd):
-        if fd.fileno() in self.fds_dict.keys():
-            del self.fds_dict[fd.fileno()]
-        assert fd.fileno() not in self.fds_dict.keys()
-
-    def poll(self, timeout=1000):
-        global POLLER_EXECUTED
-        assert len(self.modules_mgmt_thrd.sfp_port_dict_initial) == self.num_of_ports
-        assert self.modules_mgmt_thrd.is_supported_indep_mods_system == self.feature_enabled
-        # counting the number of poller iterations to know when to do the checks after plug out (and plug in)
-        # have to check at least on iteration 7 to let ports reach final state
-        self.poller_iteration_count += 1
-        if self.num_of_ports > 0:
-            if not self.port_plug_out_changed:
-                if self.port_plug_out:
-                    # return first fd registered with some made up event number 870
-                    fd_no_to_return = list(self.fds_dict.keys())[0]
-                    fd = list(self.fds_dict[fd_no_to_return].keys())[0]
-                    fd.set_file_int_content(0)
-                    event_to_return = 870
-                    self.port_plug_out_changed = True
-                    return [(fd_no_to_return, event_to_return)]
-            if not self.port_plug_in_changed:
-                if self.port_plug_in:
-                    # return first fd registered with some made up event number 871
-                    fd_no_to_return = list(self.fds_dict.keys())[0]
-                    fd = list(self.fds_dict[fd_no_to_return].keys())[0]
-                    fd.set_file_int_content(1)
-                    event_to_return = 871
-                    self.port_plug_in_changed = True
-                    return [(fd_no_to_return, event_to_return)]
-            if 7 == self.poller_iteration_count:
-                # when feature is enabled, need to check for each port both power_good and hw_present sysfs for
-                # cmis non-flat memory cables
-                num_of_sysfs_to_check = self.num_of_ports if (not self.port_plug_out or not self.feature_enabled
-                                                              or self.warm_reboot) else self.num_of_ports * 2
-                for i in range(num_of_sysfs_to_check):
-                    # when feature is enabled, power_good sysfs is also registered for cmis non-flat memory cables
-                    # so each SW controlled port has 2 fds registered
-                    port_to_test = i if not self.feature_enabled else int(i / 2)
-                    assert self.modules_mgmt_thrd.sfp_port_dict_initial[port_to_test].port_num == port_to_test
-                    assert self.modules_mgmt_thrd.sfp_port_dict_initial[
-                               port_to_test].initial_state == modules_mgmt.STATE_HW_NOT_PRESENT
-                    if self.feature_enabled:
-                        module_obj = self.modules_mgmt_thrd.fds_mapping_to_obj[list(self.fds_dict.keys())[i]][
-                            'module_obj']
-                        assert module_obj.port_num == port_to_test
-                        if not self.warm_reboot:
-                            # in tests other than warm reboot it creates only SW control ports
-                            if not self.port_plug_out:
-                                assert module_obj.final_state == modules_mgmt.STATE_SW_CONTROL
-                            else:
-                                assert module_obj.final_state == modules_mgmt.STATE_HW_NOT_PRESENT
-                        else:
-                            if not self.port_plug_out:
-                                assert module_obj.final_state == modules_mgmt.STATE_HW_PRESENT
-                            # in warm reboot test with plug out plug in test creates only FW control ports
-                            elif self.port_plug_out and self.port_plug_in:
-                                assert module_obj.final_state == modules_mgmt.STATE_FW_CONTROL
-                            else:
-                                assert module_obj.final_state == modules_mgmt.STATE_HW_NOT_PRESENT
-                        POLLER_EXECUTED = True
-                self.modules_mgmt_task_stopping_event.set()
-        if self.sleep_timeout:
-            time.sleep(timeout/1000)
-        return []
-
-
-class MockOpen:
-
-    def __init__(self, name='', file_no=None, indep_mode_supported=True):
-        self.name = name
-        self.file_no = file_no
-        self.indep_mode_supported = indep_mode_supported
-        self.retint = None
-        self.curr = 0
-
-    def read(self):
-        if self.fileno() in [SAI_PROFILE_FD_FILENO]:
-            pass
-        else:
-            # if return value was changed, i.e. sysfs content changed from 1 to 0 to simulate plug out
-            if self.retint is not None:
-                return str(self.retint)
-            # return default values (can be changed per test)
-            else:
-                return mock_file_content[self.name]
-
-    def readline(self):
-        # if trying to read sai profile file, according to fd fileno
-        if self.fileno() in [SAI_PROFILE_FD_FILENO]:
-            if self.indep_mode_supported:
-                return "SAI_INDEPENDENT_MODULE_MODE=1"
-            else:
-                return ""
-        else:
-            return mock_file_content[self.name]
-
-    def fileno(self):
-        return self.file_no
-
-    def seek(self, seek_val):
-        self.curr = seek_val
-
-    def close(self):
-        pass
-
-    def write(self, write_val):
-        self.set_file_int_content(write_val)
-
-    def set_file_int_content(self, retint):
-        self.retint = str(retint)
-        mock_file_content[self.name] = str(retint)
-
-    def __enter__(self):
-        return self
-
-    def __exit__(self, filename, *args, **kwargs):
-        pass
-
-class MockPollerStopEvent:
-
-    def __init__(self, modules_mgmt_task_stopping_event, modules_mgmt_thrd=None, num_of_ports=DEFAULT_NUM_OF_PORTS_3
-                 , feature_enabled=True, ports_connected=True, fw_controlled_ports=False, sleep_timeout=False):
-        self.fds_dict = {}
-        self.modules_mgmt_task_stopping_event = modules_mgmt_task_stopping_event
-        self.modules_mgmt_thrd = modules_mgmt_thrd
-        self.num_of_ports = num_of_ports
-        self.feature_enabled = feature_enabled
-        self.ports_connected = ports_connected
-        self.sleep_timeout = sleep_timeout
-        self.fw_controlled_ports = fw_controlled_ports
-
-    def register(self, fd, attrs):
-        self.fds_dict[fd.fileno()] = 1 & attrs
-        assert fd.fileno() in self.fds_dict
-
-    def poll(self, timeout=0):
-        assert len(self.modules_mgmt_thrd.sfp_port_dict_initial) == self.num_of_ports
-        assert self.modules_mgmt_thrd.is_supported_indep_mods_system == self.feature_enabled
-        global POLLER_EXECUTED
-        if self.num_of_ports > 0:
-            # when feature is enabled, need to check for each port both power_good and hw_present sysfs for
-            # cmis non-flat memory cables
-            ports_to_test = self.num_of_ports if (not self.feature_enabled or not self.ports_connected
-                                                  or self.fw_controlled_ports) else self.num_of_ports * 2
-            for i in range(ports_to_test):
-                # when feature is enabled, power_good sysfs is also registered for cmis non-flat memory cables
-                port_to_test = i if (not self.feature_enabled or not self.ports_connected
-                                     or self.fw_controlled_ports) else int(i / 2)
-                assert self.modules_mgmt_thrd.sfp_port_dict_initial[port_to_test].port_num == port_to_test
-                assert self.modules_mgmt_thrd.sfp_port_dict_initial[port_to_test].initial_state == modules_mgmt.STATE_HW_NOT_PRESENT
-                module_obj = self.modules_mgmt_thrd.fds_mapping_to_obj[list(self.fds_dict.keys())[i]]['module_obj']
-                assert module_obj.port_num == port_to_test
-                if self.ports_connected:
-                    if self.feature_enabled:
-                        if self.fw_controlled_ports:
-                            assert module_obj.final_state == modules_mgmt.STATE_FW_CONTROL
-                        else:
-                            assert module_obj.final_state == modules_mgmt.STATE_SW_CONTROL
-                    else:
-                        assert module_obj.final_state == modules_mgmt.STATE_HW_PRESENT
-                else:
-                    assert module_obj.final_state == modules_mgmt.STATE_HW_NOT_PRESENT
-                POLLER_EXECUTED = True
-        else:
-            POLLER_EXECUTED = True
-        self.modules_mgmt_task_stopping_event.set()
-        if self.sleep_timeout:
-            time.sleep(timeout/1000)
-        return []
-
-
-def _mock_is_file_indep_mode_disabled_content():
-    return {
-        modules_mgmt.SYSFS_INDEPENDENT_FD_PRESENCE: True,
-        modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_GOOD: True,
-        modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_ON: True,
-        modules_mgmt.SYSFS_INDEPENDENT_FD_HW_RESET: True,
-        modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_LIMIT: True,
-        modules_mgmt.SYSFS_INDEPENDENT_FD_FW_CONTROL: True,
-        modules_mgmt.SYSFS_LEGACY_FD_PRESENCE.format("0"): True,
-        modules_mgmt.SYSFS_LEGACY_FD_PRESENCE.format("1"): True,
-        modules_mgmt.SYSFS_LEGACY_FD_PRESENCE.format("2"): True,
-        '//usr/share/sonic/platform/ACS-MSN4700/sai.profile' : True
-    }
-
-mock_is_file_indep_mode_disabled_content = _mock_is_file_indep_mode_disabled_content()
-
-def mock_is_file_indep_mode_disabled(file_path, **kwargs):
-    return mock_is_file_indep_mode_disabled_content[file_path]
-
-def _mock_is_file_indep_mode_enabled_content():
-    return {
-        modules_mgmt.SYSFS_INDEPENDENT_FD_PRESENCE: True,
-        modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_GOOD: True,
-        modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_ON: True,
-        modules_mgmt.SYSFS_INDEPENDENT_FD_HW_RESET: True,
-        modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_LIMIT: True,
-        modules_mgmt.SYSFS_INDEPENDENT_FD_FW_CONTROL: True,
-        modules_mgmt.SYSFS_LEGACY_FD_PRESENCE.format("0"): True,
-        modules_mgmt.SYSFS_INDEPENDENT_FD_PRESENCE.format("0"): True,
-        modules_mgmt.SYSFS_INDEPENDENT_FD_PRESENCE.format("1"): True,
-        modules_mgmt.SYSFS_INDEPENDENT_FD_PRESENCE.format("2"): True,
-        modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_GOOD.format("0"): True,
-        modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_GOOD.format("1"): True,
-        modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_GOOD.format("2"): True,
-        modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_ON.format("0"): True,
-        modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_ON.format("1"): True,
-        modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_ON.format("2"): True,
-        '//usr/share/sonic/platform/ACS-MSN4700/sai.profile'    :   True
-    }
-
-mock_is_file_indep_mode_enabled_content = _mock_is_file_indep_mode_enabled_content()
-
-
-def mock_is_file_indep_mode_enabled(file_path, **kwargs):
-    return mock_is_file_indep_mode_enabled_content[file_path]
-
-
-def mock_read_int_from_file(filename, *args):
-    return_dict = {
-        modules_mgmt.SYSFS_LEGACY_FD_PRESENCE.format("0") : 1,
-        modules_mgmt.SYSFS_LEGACY_FD_PRESENCE.format("1") : 1,
-        modules_mgmt.SYSFS_LEGACY_FD_PRESENCE.format("2") : 1
-    }
-
-    return return_dict[filename]
-
-
-class MockXcvrEeprom():
-    def __init__(self, is_flat_memory, mem_map):
-        self.is_flat_memory = is_flat_memory
-        self.mem_map = mem_map
-
-    def is_cmis_api(self):
-        return self.is_cmis_api
-
-    def is_flat_memory(self):
-        return self.is_flat_memory
-
-    def read(self, field):
-        if consts.FLAT_MEM_FIELD == field:
-            return 0 if self.is_flat_memory else 1
-        else:
-            return 0
-
-
-class MockXcvrapi:
-    def __init__(self, is_cmis_api=True, is_flat_memory_bool=False):
-        self.is_cmis_api = is_cmis_api
-        self.is_flat_memory_bool = is_flat_memory_bool
-        self.xcvr_eeprom = MagicMock(autospec=XcvrEeprom, return_value=MockXcvrEeprom(is_flat_memory_bool, CmisMemMap(CmisCodes)))
-
-    def is_flat_memory(self):
-        return self.is_flat_memory_bool
-
-    def xcvr_eeprom(self):
-        return self.xcvr_eeprom
-
-
-class MockSFPxcvrapi:
-    def __init__(self, xcvr_api_is_cmis_api=True, xcvr_eeprom_is_flat_memory=False):
-        self.xcvr_api = Mock(spec=CmisApi(MockXcvrEeprom(False, CmisMemMap(CmisCodes))), return_value=MockXcvrapi(xcvr_api_is_cmis_api, xcvr_eeprom_is_flat_memory))
-        self.xcvr_api_is_cmis_api = xcvr_api_is_cmis_api
-        self.xcvr_eeprom_is_flat_memory = xcvr_eeprom_is_flat_memory
-        self.xcvr_api.is_flat_memory = types.MethodType(self.is_flat_memory, self)
-
-    def get_xcvr_api(self):
-        return self.xcvr_api
-
-    def is_flat_memory(self, ref):
-        return self.xcvr_eeprom_is_flat_memory
-
-
-def check_power_cap(port, module_sm_obj):
-    pass
-
-SAI_PROFILE_FD_FILENO = 99
-
-
-class TestModulesMgmt(unittest.TestCase):
-    """Test class to test modules_mgmt.py. The test cases covers:
-        1. cables detection for 1 to 3 ports - feature disabled / enabled / poller
-        2. cable disconnection - plug out
-        3. cable reconnection - plug in
-        4. warm reboot normal flow with FW ports
-        5. warm reboot flow with FW ports plugged out
-        6. warm reboot flow with FW ports plugged out and then plugged in (stays FW controlled, no SFP mock change)
-        7. test 32 FW controlled (non cmis flat mem) cables powered off
-        8. test 32 SW controlled (cmis active non flat mem) cables powered off
-    """
-
-    def _mock_sysfs_file_content(self):
-        return {
-            modules_mgmt.SYSFS_INDEPENDENT_FD_PRESENCE : "1",
-            modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_GOOD : "1",
-            modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_ON : "0",
-            modules_mgmt.SYSFS_INDEPENDENT_FD_HW_RESET : "",
-            modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_LIMIT : "48",
-            modules_mgmt.SYSFS_INDEPENDENT_FD_FW_CONTROL : "1",
-            modules_mgmt.SYSFS_LEGACY_FD_PRESENCE.format("0") : "1",
-            modules_mgmt.SYSFS_LEGACY_FD_PRESENCE.format("1") : "1",
-            modules_mgmt.SYSFS_LEGACY_FD_PRESENCE.format("2") : "1",
-            modules_mgmt.SYSFS_INDEPENDENT_FD_FREQ_SUPPORT.format("0"): "0"
-        }
-
-    def mock_open_builtin(self, file_name, feature_enabled=True):
-        return_dict = {
-            (modules_mgmt.SYSFS_LEGACY_FD_PRESENCE.format("0"), 'r') : MockOpen(modules_mgmt.SYSFS_LEGACY_FD_PRESENCE.format("0"), 100),
-            (modules_mgmt.SYSFS_LEGACY_FD_PRESENCE.format("1"), 'r') : MockOpen(modules_mgmt.SYSFS_LEGACY_FD_PRESENCE.format("1"), 101),
-            (modules_mgmt.SYSFS_LEGACY_FD_PRESENCE.format("2"), 'r') : MockOpen(modules_mgmt.SYSFS_LEGACY_FD_PRESENCE.format("2"), 102),
-            '//usr/share/sonic/platform/ACS-MSN4700/sai.profile' : MockOpen('//usr/share/sonic/platform/ACS-MSN4700/sai.profile'
-                                                                            , SAI_PROFILE_FD_FILENO, feature_enabled),
-            modules_mgmt.SYSFS_LEGACY_FD_PRESENCE.format("0") : MockOpen(modules_mgmt.SYSFS_LEGACY_FD_PRESENCE.format("0"), 100),
-            modules_mgmt.SYSFS_LEGACY_FD_PRESENCE.format("1") : MockOpen(modules_mgmt.SYSFS_LEGACY_FD_PRESENCE.format("1"), 101),
-            modules_mgmt.SYSFS_LEGACY_FD_PRESENCE.format("2") : MockOpen(modules_mgmt.SYSFS_LEGACY_FD_PRESENCE.format("2"), 102),
-            modules_mgmt.SYSFS_INDEPENDENT_FD_PRESENCE.format("0"): MockOpen(modules_mgmt.SYSFS_INDEPENDENT_FD_PRESENCE.format("0"), 0),
-            modules_mgmt.SYSFS_INDEPENDENT_FD_PRESENCE.format("1"): MockOpen(modules_mgmt.SYSFS_INDEPENDENT_FD_PRESENCE.format("1"), 1),
-            modules_mgmt.SYSFS_INDEPENDENT_FD_PRESENCE.format("2"): MockOpen(modules_mgmt.SYSFS_INDEPENDENT_FD_PRESENCE.format("2"), 2),
-            modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_GOOD.format("0"): MockOpen(modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_GOOD.format("0"), 200),
-            modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_GOOD.format("1"): MockOpen(modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_GOOD.format("1"), 201),
-            modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_GOOD.format("2"): MockOpen(modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_GOOD.format("2"), 202),
-            modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_ON.format("0"): MockOpen(modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_ON.format("0"), 300),
-            modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_ON.format("1"): MockOpen(modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_ON.format("1"), 301),
-            modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_ON.format("2"): MockOpen(modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_ON.format("2"), 302),
-            modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_LIMIT.format("0"): MockOpen(modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_LIMIT.format("0"), 500),
-            modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_LIMIT.format("1"): MockOpen(modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_LIMIT.format("1"), 501),
-            modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_LIMIT.format("2"): MockOpen(modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_LIMIT.format("2"), 502),
-            modules_mgmt.SYSFS_INDEPENDENT_FD_FREQ_SUPPORT.format("0"): MockOpen(modules_mgmt.SYSFS_INDEPENDENT_FD_FREQ_SUPPORT.format("0"), 602),
-            modules_mgmt.SYSFS_INDEPENDENT_FD_FREQ_SUPPORT.format("1"): MockOpen(modules_mgmt.SYSFS_INDEPENDENT_FD_FREQ_SUPPORT.format("1"), 602),
-            modules_mgmt.SYSFS_INDEPENDENT_FD_FREQ_SUPPORT.format("2"): MockOpen(modules_mgmt.SYSFS_INDEPENDENT_FD_FREQ_SUPPORT.format("2"), 602),
-            modules_mgmt.PROC_CMDLINE: MockOpen(modules_mgmt.PROC_CMDLINE, self.fd_number_by_fd_name_dict[modules_mgmt.PROC_CMDLINE])
-        }
-        return return_dict[file_name]
-
-    # side effects are used in mock when want to create different mocks per variable, i.e. here it's filename
-    # see below mock_open_new_side_effect_poller_test where returning a new MockOpen passing it the filename
-    def mock_open_new_side_effect_feature_disabled(self, filename, *args, **kwargs):
-        mock_context = MagicMock()
-        mock_context.__enter__.return_value = self.mock_open_builtin(filename, False)
-        mock_context.__exit__.return_value = False
-        return mock_context
-
-    def mock_open_new_side_effect_feature_enabled(self, filename, *args, **kwargs):
-        mock_context = MagicMock()
-        mock_context.__enter__.return_value = self.mock_open_builtin(filename)
-        mock_context.__exit__.return_value = False
-        return mock_context
-
-    def mock_open_new_side_effect_poller_test(self, filename, *args, **kwargs):
-        if filename in ['//usr/share/sonic/platform/ACS-MSN4700/sai.profile']:
-            mock_context = MagicMock()
-            mock_context.__enter__.return_value = MockOpen(filename, SAI_PROFILE_FD_FILENO)
-            mock_context.__exit__.return_value = False
-            return mock_context
-        else:
-            mock_context = MagicMock()
-            mock_open_new = MockOpen(filename, self.fd_number_by_fd_name_dict[filename])
-            mock_context.return_value = mock_open_new
-            mock_context.__enter__.return_value = mock_open_new
-            mock_context.__exit__.return_value = False
-            if 'hw_present' in filename or 'power_on' in filename or 'freq' in filename or 'control' in filename:
-                return mock_context
-            else:
-                return mock_context.return_value
-
-    def mock_open_new_side_effect_warm_reboot(self, filename, *args, **kwargs):
-        if filename in ['//usr/share/sonic/platform/ACS-MSN4700/sai.profile']:
-            mock_context = MagicMock()
-            mock_context.__enter__.return_value = MockOpen(filename, SAI_PROFILE_FD_FILENO)
-            mock_context.__exit__.return_value = False
-            return mock_context
-        else:
-            mock_open_new = MockOpen(filename, self.fd_number_by_fd_name_dict[filename])
-            return mock_open_new
-
-    def setUp(cls):
-        cls.modules_mgmt_task_stopping_event = threading.Event()
-        cls.modules_changes_queue = queue.Queue()
-        global POLLER_EXECUTED
-        POLLER_EXECUTED = False
-        # start modules_mgmt thread and the test in poller part
-        cls.modules_mgmt_thrd = ModulesMgmtTask(main_thread_stop_event=cls.modules_mgmt_task_stopping_event,
-                                            q=cls.modules_changes_queue)
-        cls.modules_mgmt_thrd.check_power_cap = check_power_cap
-        assert cls.modules_mgmt_thrd.sfp_port_dict_initial == {}
-
-    @classmethod
-    def setup_class(cls):
-        os.environ["MLNX_PLATFORM_API_UNIT_TESTING"] = "1"
-        cls.fd_number_by_fd_name_dict = {
-                modules_mgmt.SYSFS_LEGACY_FD_PRESENCE.format("0") : 100,
-                modules_mgmt.SYSFS_LEGACY_FD_PRESENCE.format("1") : 101,
-                modules_mgmt.SYSFS_LEGACY_FD_PRESENCE.format("2") : 102,
-                '//usr/share/sonic/platform/ACS-MSN4700/sai.profile' : SAI_PROFILE_FD_FILENO,
-                modules_mgmt.SYSFS_INDEPENDENT_FD_PRESENCE.format("0") : 0,
-                modules_mgmt.SYSFS_INDEPENDENT_FD_PRESENCE.format("1") : 1,
-                modules_mgmt.SYSFS_INDEPENDENT_FD_PRESENCE.format("2") : 2,
-                modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_GOOD.format("0") : 200,
-                modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_GOOD.format("1") : 201,
-                modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_GOOD.format("2") : 202,
-                modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_ON.format("0") : 300,
-                modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_ON.format("1") : 301,
-                modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_ON.format("2") : 302,
-                modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_LIMIT.format("0") : 500,
-                modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_LIMIT.format("1") : 501,
-                modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_LIMIT.format("2") : 502,
-                modules_mgmt.SYSFS_INDEPENDENT_FD_FREQ_SUPPORT.format("0") : 600,
-                modules_mgmt.SYSFS_INDEPENDENT_FD_FREQ_SUPPORT.format("1") : 601,
-                modules_mgmt.SYSFS_INDEPENDENT_FD_FREQ_SUPPORT.format("2") : 602,
-                modules_mgmt.SYSFS_INDEPENDENT_FD_FW_CONTROL.format("0") : 700,
-                modules_mgmt.SYSFS_INDEPENDENT_FD_FW_CONTROL.format("1") : 701,
-                modules_mgmt.SYSFS_INDEPENDENT_FD_FW_CONTROL.format("2") : 702,
-                modules_mgmt.PROC_CMDLINE : 800
-        }
-        # mock the directory holding relevant sai.profile
-        device_info.get_paths_to_platform_and_hwsku_dirs = mock.MagicMock(return_value=('', '/usr/share/sonic/platform/ACS-MSN4700'))
-
-
-    @patch('sonic_platform.device_data.DeviceDataManager.get_sfp_count', MagicMock(return_value=DEFAULT_NUM_OF_PORTS_3))
-    @patch('os.path.isfile', MagicMock(side_effect=mock_is_file_indep_mode_disabled))
-    @patch('sonic_platform.utils.read_int_from_file', MagicMock(side_effect=mock_read_int_from_file))
-    @patch('builtins.open', spec=open)
-    def test_mdf_all_ports_feature_disabled(self, mock_open):
-        mock_open.side_effect = self.mock_open_new_side_effect_feature_disabled
-        num_of_tested_ports = DeviceDataManager.get_sfp_count()
-        assert num_of_tested_ports == DEFAULT_NUM_OF_PORTS_3
-
-        # start modules_mgmt thread and the test in poller part
-        with patch('select.poll', MagicMock(return_value=MockPollerStopEvent(self.modules_mgmt_task_stopping_event
-                                                                    , self.modules_mgmt_thrd, feature_enabled=False))):
-            self.modules_mgmt_thrd.run()
-
-    @patch('sonic_platform.device_data.DeviceDataManager.get_sfp_count', MagicMock(return_value=DEFAULT_NUM_OF_PORTS_3))
-    @patch('os.path.isfile', MagicMock(side_effect=mock_is_file_indep_mode_enabled))
-    @patch('builtins.open', spec=open)
-    @patch('sonic_platform.sfp.SFP', MagicMock(return_value=MockSFPxcvrapi()))
-    def test_mdf_all_ports_feature_enabled(self, mock_open):
-        mock_open.side_effect = self.mock_open_new_side_effect_feature_enabled
-        num_of_tested_ports = DeviceDataManager.get_sfp_count()
-        assert num_of_tested_ports == DEFAULT_NUM_OF_PORTS_3
-
-        # start modules_mgmt thread and the test in poller part
-        with patch('select.poll', MagicMock(return_value=MockPollerStopEvent(self.modules_mgmt_task_stopping_event
-                , self.modules_mgmt_thrd))):
-            self.modules_mgmt_thrd.run()
-
-    @patch('os.path.isfile', MagicMock(side_effect=mock_is_file_indep_mode_enabled))
-    @patch('builtins.open', spec=open)
-    @patch('sonic_platform.sfp.SFP', MagicMock(return_value=MockSFPxcvrapi()))
-    def test_modules_mgmt_poller_events_3_ports(self, mock_open):
-        mock_open.side_effect = self.mock_open_new_side_effect_poller_test
-        DeviceDataManager.get_sfp_count = mock.MagicMock(return_value=DEFAULT_NUM_OF_PORTS_3)
-        num_of_tested_ports = DeviceDataManager.get_sfp_count()
-        assert num_of_tested_ports == DEFAULT_NUM_OF_PORTS_3
-
-        # start modules_mgmt thread and the test in poller part
-        with patch('select.poll', MagicMock(return_value=MockPollerStopEvent(self.modules_mgmt_task_stopping_event
-                , self.modules_mgmt_thrd))):
-            self.modules_mgmt_thrd.run()
-
-    @patch('os.path.isfile', MagicMock(side_effect=mock_is_file_indep_mode_enabled))
-    @patch('builtins.open', spec=open)
-    @patch('sonic_platform.sfp.SFP', MagicMock(return_value=MockSFPxcvrapi()))
-    def test_modules_mgmt_poller_events_single_port(self, mock_open):
-        mock_open.side_effect = self.mock_open_new_side_effect_poller_test
-        DeviceDataManager.get_sfp_count = mock.MagicMock(return_value=DEFAULT_NUM_OF_PORTS_1)
-        num_of_tested_ports = DeviceDataManager.get_sfp_count()
-        assert num_of_tested_ports == DEFAULT_NUM_OF_PORTS_1
-
-        # start modules_mgmt thread and the test in poller part
-        with patch('select.poll', MagicMock(return_value=MockPollerStopEvent(self.modules_mgmt_task_stopping_event
-                , self.modules_mgmt_thrd, num_of_tested_ports))):
-            #with patch('builtins.open', MagicMock(side_effect=self.mock_open_new_side_effect_poller_test)):
-            self.modules_mgmt_thrd.run()
-
-    @patch('os.path.isfile', MagicMock(side_effect=mock_is_file_indep_mode_enabled))
-    @patch('builtins.open', spec=open)
-    @patch('sonic_platform.sfp.SFP', MagicMock(return_value=MockSFPxcvrapi(False, True)))
-    def test_modules_mgmt_normal_warm_reboot(self, mock_open):
-        mock_open.side_effect = self.mock_open_new_side_effect_warm_reboot
-        # mock /proc/cmdline with warm reboot boot type key value
-        mock_file_content[modules_mgmt.PROC_CMDLINE] = f'{modules_mgmt.CMDLINE_STR_TO_LOOK_FOR}{modules_mgmt.CMDLINE_VAL_TO_LOOK_FOR}'
-        DeviceDataManager.get_sfp_count = mock.MagicMock(return_value=DEFAULT_NUM_OF_PORTS_1)
-        num_of_tested_ports = DeviceDataManager.get_sfp_count()
-        assert num_of_tested_ports == DEFAULT_NUM_OF_PORTS_1
-        # set the port to start with FW controlled before warm reboot takes place
-        mock_file_content[modules_mgmt.SYSFS_INDEPENDENT_FD_FW_CONTROL.format("0")] = "0"
-
-        # start modules_mgmt thread and the test in poller part
-        with patch('select.poll', MagicMock(return_value=MockPoller(self.modules_mgmt_task_stopping_event
-                , self.modules_mgmt_thrd, num_of_tested_ports, warm_reboot=True))):
-            self.modules_mgmt_thrd.run()
-
-    @patch('os.path.isfile', MagicMock(side_effect=mock_is_file_indep_mode_enabled))
-    @patch('builtins.open', spec=open)
-    @patch('sonic_platform.sfp.SFP', MagicMock(return_value=MockSFPxcvrapi(False, True)))
-    def test_modules_mgmt_plug_out_fw_cable_after_warm_reboot(self, mock_open):
-        mock_open.side_effect = self.mock_open_new_side_effect_warm_reboot
-        # mock /proc/cmdline with warm reboot boot type key value
-        mock_file_content[modules_mgmt.PROC_CMDLINE] = f'{modules_mgmt.CMDLINE_STR_TO_LOOK_FOR}{modules_mgmt.CMDLINE_VAL_TO_LOOK_FOR}'
-        DeviceDataManager.get_sfp_count = mock.MagicMock(return_value=DEFAULT_NUM_OF_PORTS_1)
-        num_of_tested_ports = DeviceDataManager.get_sfp_count()
-        assert num_of_tested_ports == DEFAULT_NUM_OF_PORTS_1
-
-        # set the port to start with FW controlled before warm reboot takes place
-        mock_file_content[modules_mgmt.SYSFS_INDEPENDENT_FD_FW_CONTROL.format("0")] = "0"
-
-        # start modules_mgmt thread and the test in poller part
-        with patch('select.poll', MagicMock(return_value=MockPoller(self.modules_mgmt_task_stopping_event
-                , self.modules_mgmt_thrd, num_of_tested_ports, port_plug_out=True, warm_reboot=True))):
-            self.modules_mgmt_thrd.run()
-
-    @patch('os.path.isfile', MagicMock(side_effect=mock_is_file_indep_mode_enabled))
-    @patch('builtins.open', spec=open)
-    @patch('sonic_platform.sfp.SFP', MagicMock(return_value=MockSFPxcvrapi(False, True)))
-    def test_modules_mgmt_plug_out_plug_in_fw_cable_after_warm_reboot(self, mock_open):
-        mock_open.side_effect = self.mock_open_new_side_effect_warm_reboot
-        # mock /proc/cmdline with warm reboot boot type key value
-        mock_file_content[modules_mgmt.PROC_CMDLINE] = f'{modules_mgmt.CMDLINE_STR_TO_LOOK_FOR}{modules_mgmt.CMDLINE_VAL_TO_LOOK_FOR}'
-        DeviceDataManager.get_sfp_count = mock.MagicMock(return_value=DEFAULT_NUM_OF_PORTS_1)
-        num_of_tested_ports = DeviceDataManager.get_sfp_count()
-        assert num_of_tested_ports == DEFAULT_NUM_OF_PORTS_1
-
-        mock_file_content[modules_mgmt.SYSFS_INDEPENDENT_FD_FW_CONTROL.format("0")] = "0"
-
-        # start modules_mgmt thread and the test in poller part
-        with patch('select.poll', MagicMock(return_value=MockPoller(self.modules_mgmt_task_stopping_event
-                , self.modules_mgmt_thrd, num_of_tested_ports, port_plug_out=True, warm_reboot=True, port_plug_in=True))):
-            self.modules_mgmt_thrd.run()
-
-    @patch('os.path.isfile', MagicMock(side_effect=mock_is_file_indep_mode_enabled))
-    @patch('builtins.open', spec=open)
-    @patch('sonic_platform.sfp.SFP', MagicMock(return_value=MockSFPxcvrapi(False, True)))
-    def test_modules_mgmt_no_ports(self, mock_open):
-        mock_open.side_effect = self.mock_open_new_side_effect_poller_test
-        DeviceDataManager.get_sfp_count = mock.MagicMock(return_value=0)
-        num_of_tested_ports = DeviceDataManager.get_sfp_count()
-        assert num_of_tested_ports == 0
-
-        # start modules_mgmt thread and the test in poller part
-        with patch('select.poll', MagicMock(return_value=MockPollerStopEvent(self.modules_mgmt_task_stopping_event
-                , self.modules_mgmt_thrd, num_of_tested_ports))):
-            self.modules_mgmt_thrd.run()
-
-    @patch('os.path.isfile', MagicMock(side_effect=mock_is_file_indep_mode_enabled))
-    @patch('builtins.open', spec=open)
-    @patch('sonic_platform.sfp.SFP', MagicMock(return_value=MockSFPxcvrapi(False, True)))
-    def test_modules_mgmt_ports_disconnected(self, mock_open):
-        mock_open.side_effect = self.mock_open_new_side_effect_poller_test
-        DeviceDataManager.get_sfp_count = mock.MagicMock(return_value=DEFAULT_NUM_OF_PORTS_3)
-        num_of_tested_ports = DeviceDataManager.get_sfp_count()
-        assert num_of_tested_ports == DEFAULT_NUM_OF_PORTS_3
-
-        # update hw_present sysfs with value of 0 for each port
-        for i in range(num_of_tested_ports):
-            modules_sysfs = modules_mgmt.SYSFS_INDEPENDENT_FD_PRESENCE.format(f"{i}")
-            mock_file_content[modules_sysfs] = "0"
-
-        # start modules_mgmt thread and the test in poller part
-        with patch('select.poll', MagicMock(return_value=MockPollerStopEvent(self.modules_mgmt_task_stopping_event
-                , self.modules_mgmt_thrd, num_of_tested_ports, ports_connected=False))):
-            self.modules_mgmt_thrd.run()
-
-    @patch('os.path.isfile', MagicMock(side_effect=mock_is_file_indep_mode_enabled))
-    @patch('builtins.open', spec=open)
-    @patch('sonic_platform.sfp.SFP', MagicMock(return_value=MockSFPxcvrapi(False, True)))
-    def test_modules_mgmt_bad_flows_port_disconnected(self, mock_open):
-        mock_open.side_effect = self.mock_open_new_side_effect_poller_test
-        DeviceDataManager.get_sfp_count = mock.MagicMock(return_value=DEFAULT_NUM_OF_PORTS_1)
-        num_of_tested_ports = DeviceDataManager.get_sfp_count()
-        assert num_of_tested_ports == DEFAULT_NUM_OF_PORTS_1
-
-        # update hw_present sysfs with value of 0 for each port
-        for i in range(num_of_tested_ports):
-            modules_sysfs = modules_mgmt.SYSFS_INDEPENDENT_FD_PRESENCE.format(f"{i}")
-            mock_file_content[modules_sysfs] = "0"
-
-        # start modules_mgmt thread and the test in poller part
-        with patch('select.poll', MagicMock(return_value=MockPollerStopEvent(self.modules_mgmt_task_stopping_event
-                , self.modules_mgmt_thrd, num_of_tested_ports, ports_connected=False))):
-            self.modules_mgmt_thrd.run()
-
-    @patch('os.path.isfile', MagicMock(side_effect=mock_is_file_indep_mode_enabled))
-    @patch('builtins.open', spec=open)
-    @patch('sonic_platform.sfp.SFP', MagicMock(return_value=MockSFPxcvrapi(False, True)))
-    def test_modules_mgmt_bad_flows_power_good(self, mock_open):
-        mock_open.side_effect = self.mock_open_new_side_effect_poller_test
-        DeviceDataManager.get_sfp_count = mock.MagicMock(return_value=DEFAULT_NUM_OF_PORTS_1)
-        num_of_tested_ports = DeviceDataManager.get_sfp_count()
-        assert num_of_tested_ports == DEFAULT_NUM_OF_PORTS_1
-
-        # update power_good sysfs with value of 0 for each port
-        for i in range(num_of_tested_ports):
-            modules_sysfs = modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_GOOD.format(f"{i}")
-            mock_file_content[modules_sysfs] = "0"
-
-        # start modules_mgmt thread and the test in poller part
-        with patch('select.poll', MagicMock(return_value=MockPollerStopEvent(self.modules_mgmt_task_stopping_event
-                , self.modules_mgmt_thrd, num_of_tested_ports, ports_connected=False))):
-            self.modules_mgmt_thrd.run()
-        for i in range(num_of_tested_ports):
-            modules_sysfs = modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_GOOD.format(f"{i}")
-            mock_file_content[modules_sysfs] = "1"
-
-    @patch('os.path.isfile', MagicMock(side_effect=mock_is_file_indep_mode_enabled))
-    @patch('builtins.open', spec=open)
-    @patch('sonic_platform.sfp.SFP', MagicMock(return_value=MockSFPxcvrapi(False, True)))
-    def test_modules_mgmt_bad_flows_ports_powered_off_fw_controlled(self, mock_open):
-        mock_open.side_effect = self.mock_open_new_side_effect_poller_test
-        DeviceDataManager.get_sfp_count = mock.MagicMock(return_value=DEFAULT_NUM_OF_PORTS_32)
-        num_of_tested_ports = DeviceDataManager.get_sfp_count()
-        assert num_of_tested_ports == DEFAULT_NUM_OF_PORTS_32
-
-        # create or update different sysfs and is_file mocking with relevant value for each port
-        for i in range(num_of_tested_ports):
-            # mock power_on sysfs for all ports
-            modules_sysfs = modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_ON.format(f"{i}")
-            mock_file_content[modules_sysfs] = "0"
-            mock_is_file_indep_mode_enabled_content[modules_sysfs] = True
-            self.fd_number_by_fd_name_dict[modules_sysfs] = 300 + i
-            # mock hw_presence sysfs for all ports
-            modules_sysfs = modules_mgmt.SYSFS_INDEPENDENT_FD_PRESENCE.format(f'{i}')
-            mock_file_content[modules_sysfs] = "1"
-            mock_is_file_indep_mode_enabled_content[modules_sysfs] = True
-            self.fd_number_by_fd_name_dict[modules_sysfs] = i
-            # mock power_good sysfs for all ports
-            modules_sysfs = modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_GOOD.format(f'{i}')
-            mock_file_content[modules_sysfs] = "1"
-            mock_is_file_indep_mode_enabled_content[modules_sysfs] = True
-            self.fd_number_by_fd_name_dict[modules_sysfs] = 200 + i
-            # mock hw_reset sysfs for all ports
-            modules_sysfs = modules_mgmt.SYSFS_INDEPENDENT_FD_HW_RESET.format(f'{i}')
-            mock_is_file_indep_mode_enabled_content[modules_sysfs] = True
-            self.fd_number_by_fd_name_dict[modules_sysfs] = 400 + i
-
-        # start modules_mgmt thread and the test in poller part
-        with patch('select.poll', MagicMock(return_value=MockPollerStopEvent(self.modules_mgmt_task_stopping_event
-                , self.modules_mgmt_thrd, num_of_tested_ports, fw_controlled_ports=True))):
-            self.modules_mgmt_thrd.run()
-
-        # change power_on sysfs values back to the default ones
-        for i in range(num_of_tested_ports):
-            modules_sysfs = modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_ON.format(f"{i}")
-            mock_file_content[modules_sysfs] = "1"
-
-    @patch('os.path.isfile', MagicMock(side_effect=mock_is_file_indep_mode_enabled))
-    @patch('builtins.open', spec=open)
-    @patch('sonic_platform.sfp.SFP', MagicMock(return_value=MockSFPxcvrapi()))
-    def test_modules_mgmt_bad_flows_ports_powered_off_sw_controlled(self, mock_open):
-        mock_open.side_effect = self.mock_open_new_side_effect_poller_test
-        DeviceDataManager.get_sfp_count = mock.MagicMock(return_value=DEFAULT_NUM_OF_PORTS_32)
-        num_of_tested_ports = DeviceDataManager.get_sfp_count()
-        assert num_of_tested_ports == DEFAULT_NUM_OF_PORTS_32
-
-        # create or update different sysfs and is_file mocking with relevant value for each port
-        for i in range(num_of_tested_ports):
-            # mock power_on sysfs for all ports
-            modules_sysfs = modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_ON.format(f"{i}")
-            mock_file_content[modules_sysfs] = "0"
-            mock_is_file_indep_mode_enabled_content[modules_sysfs] = True
-            self.fd_number_by_fd_name_dict[modules_sysfs] = 300 + i
-            # mock hw_presence sysfs for all ports
-            modules_sysfs = modules_mgmt.SYSFS_INDEPENDENT_FD_PRESENCE.format(f'{i}')
-            mock_file_content[modules_sysfs] = "1"
-            mock_is_file_indep_mode_enabled_content[modules_sysfs] = True
-            self.fd_number_by_fd_name_dict[modules_sysfs] = i
-            # mock power_good sysfs for all ports
-            modules_sysfs = modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_GOOD.format(f'{i}')
-            mock_file_content[modules_sysfs] = "1"
-            mock_is_file_indep_mode_enabled_content[modules_sysfs] = True
-            self.fd_number_by_fd_name_dict[modules_sysfs] = 200 + i
-            # mock hw_reset sysfs for all ports
-            modules_sysfs = modules_mgmt.SYSFS_INDEPENDENT_FD_HW_RESET.format(f'{i}')
-            mock_is_file_indep_mode_enabled_content[modules_sysfs] = True
-            self.fd_number_by_fd_name_dict[modules_sysfs] = 400 + i
-            # mock frequency_support sysfs for all ports
-            modules_sysfs = modules_mgmt.SYSFS_INDEPENDENT_FD_FREQ_SUPPORT.format(f'{i}')
-            mock_file_content[modules_sysfs] = "0"
-            mock_is_file_indep_mode_enabled_content[modules_sysfs] = True
-            self.fd_number_by_fd_name_dict[modules_sysfs] = 600 + i
-
-        # start modules_mgmt thread and the test in poller part
-        with patch('select.poll', MagicMock(return_value=MockPollerStopEvent(self.modules_mgmt_task_stopping_event
-                , self.modules_mgmt_thrd, num_of_tested_ports))):
-            self.modules_mgmt_thrd.run()
-
-        # change power_on sysfs values back to the default ones
-        for i in range(num_of_tested_ports):
-            modules_sysfs = modules_mgmt.SYSFS_INDEPENDENT_FD_POWER_ON.format(f"{i}")
-            mock_file_content[modules_sysfs] = "1"
-
-    def tearDown(cls):
-        mock_file_content[modules_mgmt.PROC_CMDLINE] = ''
-        cls.modules_mgmt_thrd = None
-        # a check that modules mgmt thread ran and got into the poller part where the tests here has all checks
-        assert POLLER_EXECUTED
diff --git a/platform/mellanox/mlnx-platform-api/tests/test_sfp.py b/platform/mellanox/mlnx-platform-api/tests/test_sfp.py
index 748a9c714..98246c295 100644
--- a/platform/mellanox/mlnx-platform-api/tests/test_sfp.py
+++ b/platform/mellanox/mlnx-platform-api/tests/test_sfp.py
@@ -1,5 +1,5 @@
 #
-# Copyright (c) 2021-2023 NVIDIA CORPORATION & AFFILIATES.
+# Copyright (c) 2021-2024 NVIDIA CORPORATION & AFFILIATES.
 # Apache-2.0
 #
 # Licensed under the Apache License, Version 2.0 (the "License");
@@ -61,10 +61,7 @@ def test_sfp_index(self, mock_max_port):
     @mock.patch('sonic_platform.chassis.Chassis.get_num_sfps', mock.MagicMock(return_value=2))
     @mock.patch('sonic_platform.chassis.extract_RJ45_ports_index', mock.MagicMock(return_value=[]))
     def test_sfp_get_error_status(self, mock_get_error_code, mock_control):
-        chassis = Chassis()
-
-        # Fetch an SFP module to test
-        sfp = chassis.get_sfp(1)
+        sfp = SFP(1)
         mock_control.return_value = False
         description_dict = sfp._get_error_description_dict()
         for error in description_dict.keys():
@@ -248,18 +245,14 @@ def test_get_page_and_page_offset(self, mock_get_type_str, mock_eeprom_path, moc
         assert page == '/tmp/1/data'
         assert page_offset is 0
 
-    @mock.patch('sonic_platform.sfp.SFP.is_sw_control')
     @mock.patch('sonic_platform.sfp.SFP._read_eeprom')
-    def test_sfp_get_presence(self, mock_read, mock_control):
+    def test_sfp_get_presence(self, mock_read):
         sfp = SFP(0)
         mock_read.return_value = None
         assert not sfp.get_presence()
 
         mock_read.return_value = 0
         assert sfp.get_presence()
-        
-        mock_control.side_effect = RuntimeError('')
-        assert not sfp.get_presence()
 
     @mock.patch('sonic_platform.utils.read_int_from_file')
     def test_rj45_get_presence(self, mock_read_int):
@@ -361,34 +354,20 @@ def test_get_temperature_threshold(self):
         assert sfp.get_temperature_warning_threshold() == 75.0
         assert sfp.get_temperature_critical_threshold() == 85.0
 
-    @mock.patch('sonic_platform.sfp.NvidiaSFPCommon.get_logical_port_by_sfp_index')
     @mock.patch('sonic_platform.utils.read_int_from_file')
-    @mock.patch('sonic_platform.device_data.DeviceDataManager.is_independent_mode')
-    @mock.patch('sonic_platform.utils.DbUtils.get_db_instance')
-    def test_is_sw_control(self, mock_get_db, mock_mode, mock_read, mock_get_logical):
+    @mock.patch('sonic_platform.device_data.DeviceDataManager.is_module_host_management_mode')
+    def test_is_sw_control(self, mock_mode, mock_read):
         sfp = SFP(0)
         mock_mode.return_value = False
         assert not sfp.is_sw_control()
         mock_mode.return_value = True
         
-        mock_get_logical.return_value = None
-        with pytest.raises(Exception):
-            sfp.is_sw_control()
-
-        mock_get_logical.return_value = 'Ethernet0'
-        mock_db = mock.MagicMock()
-        mock_get_db.return_value = mock_db
-        mock_db.exists = mock.MagicMock(return_value=False)
-        with pytest.raises(Exception):
-            sfp.is_sw_control()
-
-        mock_db.exists.return_value = True
         mock_read.return_value = 0
         assert not sfp.is_sw_control()
         mock_read.return_value = 1
         assert sfp.is_sw_control()
 
-    @mock.patch('sonic_platform.device_data.DeviceDataManager.is_independent_mode', mock.MagicMock(return_value=False))
+    @mock.patch('sonic_platform.device_data.DeviceDataManager.is_module_host_management_mode', mock.MagicMock(return_value=False))
     @mock.patch('sonic_platform.sfp.SFP.is_sw_control', mock.MagicMock(return_value=False))
     @mock.patch('sonic_platform.utils.is_host', mock.MagicMock(side_effect = [True, True, False, False]))
     @mock.patch('subprocess.check_output', mock.MagicMock(side_effect = ['True', 'False']))
@@ -401,7 +380,7 @@ def test_get_lpmode(self):
         assert sfp.get_lpmode()
         assert not sfp.get_lpmode()
 
-    @mock.patch('sonic_platform.device_data.DeviceDataManager.is_independent_mode', mock.MagicMock(return_value=False))
+    @mock.patch('sonic_platform.device_data.DeviceDataManager.is_module_host_management_mode', mock.MagicMock(return_value=False))
     @mock.patch('sonic_platform.sfp.SFP.is_sw_control', mock.MagicMock(return_value=False))
     @mock.patch('sonic_platform.utils.is_host', mock.MagicMock(side_effect = [True, True, False, False]))
     @mock.patch('subprocess.check_output', mock.MagicMock(side_effect = ['True', 'False']))
@@ -414,7 +393,7 @@ def test_set_lpmode(self):
         assert sfp.set_lpmode(False)
         assert not sfp.set_lpmode(False)
         
-    @mock.patch('sonic_platform.device_data.DeviceDataManager.is_independent_mode', mock.MagicMock(return_value=True))
+    @mock.patch('sonic_platform.device_data.DeviceDataManager.is_module_host_management_mode', mock.MagicMock(return_value=True))
     @mock.patch('sonic_platform.utils.read_int_from_file')
     @mock.patch('sonic_platform.sfp.SFP.is_sw_control')
     def test_get_lpmode_cmis_host_mangagement(self, mock_control, mock_read):
@@ -438,7 +417,7 @@ def test_get_lpmode_cmis_host_mangagement(self, mock_control, mock_read):
         mock_read.return_value = 2
         assert not sfp.get_lpmode()
 
-    @mock.patch('sonic_platform.device_data.DeviceDataManager.is_independent_mode', mock.MagicMock(return_value=True))
+    @mock.patch('sonic_platform.device_data.DeviceDataManager.is_module_host_management_mode', mock.MagicMock(return_value=True))
     @mock.patch('sonic_platform.sfp.SFP.is_sw_control')
     def test_set_lpmode_cmis_host_mangagement(self, mock_control):
         mock_control.return_value = True
@@ -455,3 +434,115 @@ def test_set_lpmode_cmis_host_mangagement(self, mock_control):
         mock_control.return_value = False
         assert not sfp.set_lpmode(True)
         assert not sfp.set_lpmode(False)
+
+    def test_determine_control_type(self):
+        sfp = SFP(0)
+        sfp.get_xcvr_api = mock.MagicMock(return_value=None)
+        assert sfp.determine_control_type() == 0
+        
+        sfp.get_xcvr_api.return_value = 1 # Just make it not None
+        sfp.is_supported_for_software_control = mock.MagicMock(return_value=True)
+        assert sfp.determine_control_type() == 1
+        
+        sfp.is_supported_for_software_control.return_value = False
+        assert sfp.determine_control_type() == 0
+        
+    def test_check_power_capability(self):
+        sfp = SFP(0)
+        sfp.get_module_max_power = mock.MagicMock(return_value=-1)
+        assert not sfp.check_power_capability()
+        
+        sfp.get_module_max_power.return_value = 48
+        sfp.get_power_limit = mock.MagicMock(return_value=48)
+        assert sfp.check_power_capability()
+        
+        sfp.get_power_limit.return_value = 1
+        assert not sfp.check_power_capability()
+        
+    def test_get_module_max_power(self):
+        sfp = SFP(0)
+        sfp.is_cmis_api = mock.MagicMock(return_value=True)
+        sfp.read_eeprom = mock.MagicMock(return_value=bytearray([48]))
+        assert sfp.get_module_max_power() == 48
+        
+        sfp.is_cmis_api.return_value = False
+        sfp.is_sff_api = mock.MagicMock(return_value=True)
+        sfp.read_eeprom.return_value = bytearray([128])
+        assert sfp.get_module_max_power() == 2.5 * 4
+        
+        sfp.read_eeprom.return_value = bytearray([32])
+        assert sfp.get_module_max_power() == 3.2 * 4
+        
+        # Simulate invalid value
+        sfp.read_eeprom.return_value = bytearray([33])
+        assert sfp.get_module_max_power() == -1
+        
+        # Simulate unsupported module type
+        sfp.is_sff_api .return_value = False
+        assert sfp.get_module_max_power() == -1
+        
+    def test_update_i2c_frequency(self):
+        sfp = SFP(0)
+        sfp.get_frequency_support = mock.MagicMock(return_value=False)
+        sfp.set_frequency = mock.MagicMock()
+        sfp.update_i2c_frequency()
+        sfp.set_frequency.assert_not_called()
+        
+        sfp.get_frequency_support.return_value = True
+        sfp.update_i2c_frequency()
+        sfp.set_frequency.assert_not_called()
+        
+        sfp.is_cmis_api = mock.MagicMock(return_value=True)
+        sfp.read_eeprom = mock.MagicMock(return_value=bytearray([0]))
+        sfp.update_i2c_frequency()
+        sfp.set_frequency.assert_called_with(0)
+        
+        sfp.is_cmis_api.return_value = False
+        sfp.is_sff_api = mock.MagicMock(return_value=True)
+        sfp.update_i2c_frequency()
+        sfp.set_frequency.assert_called_with(0)
+        
+    def test_disable_tx_for_sff_optics(self):
+        sfp = SFP(0)
+        mock_api = mock.MagicMock()
+        sfp.get_xcvr_api = mock.MagicMock(return_value=mock_api)
+        mock_api.tx_disable = mock.MagicMock()
+        sfp.disable_tx_for_sff_optics()
+        mock_api.tx_disable.assert_not_called()
+        
+        sfp.is_sff_api = mock.MagicMock(return_value=True)
+        mock_api.get_tx_disable_support = mock.MagicMock(return_value=True)
+        sfp.disable_tx_for_sff_optics()
+        mock_api.tx_disable.assert_called_with(True)
+        
+    @mock.patch('sonic_platform.utils.read_int_from_file')
+    def test_get_error_info_from_sdk_error_type(self, mock_read):
+        sfp = SFP(0)
+        # Unknown error
+        mock_read.return_value = -1
+        sfp_state, error_desc = sfp.get_error_info_from_sdk_error_type()
+        assert sfp_state == '2'
+        assert 'Unknown error' in error_desc
+        
+        mock_read.return_value = 2
+        sfp_state, error_desc = sfp.get_error_info_from_sdk_error_type()
+        assert sfp_state == '11'
+        assert error_desc is None
+
+    @mock.patch('sonic_platform.chassis.extract_RJ45_ports_index', mock.MagicMock(return_value=[]))
+    @mock.patch('sonic_platform.device_data.DeviceDataManager.get_sfp_count', mock.MagicMock(return_value=1))
+    def test_initialize_sfp_modules(self):
+        c = Chassis()
+        c.initialize_sfp()
+        s = c._sfp_list[0]
+        s.get_hw_present = mock.MagicMock(return_value=True)
+        s.get_power_on = mock.MagicMock(return_value=False)
+        s.get_reset_state = mock.MagicMock(return_value=True)
+        s.get_power_good = mock.MagicMock(return_value=True)
+        s.determine_control_type = mock.MagicMock(return_value=1) # software control
+        s.set_control_type = mock.MagicMock()
+        SFP.initialize_sfp_modules(c._sfp_list)
+        assert s.in_stable_state()
+        SFP.wait_ready_task.stop()
+        SFP.wait_ready_task.join()
+        SFP.wait_ready_task = None
diff --git a/platform/mellanox/mlnx-platform-api/tests/test_sfp_event.py b/platform/mellanox/mlnx-platform-api/tests/test_sfp_event.py
deleted file mode 100644
index ef4820ecf..000000000
--- a/platform/mellanox/mlnx-platform-api/tests/test_sfp_event.py
+++ /dev/null
@@ -1,61 +0,0 @@
-#
-# Copyright (c) 2021 NVIDIA CORPORATION & AFFILIATES.
-# Apache-2.0
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-# http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-# See the License for the specific language governing permissions and
-# limitations under the License.
-#
-import os
-import sys
-
-from mock import MagicMock, patch
-
-test_path = os.path.dirname(os.path.abspath(__file__))
-modules_path = os.path.dirname(test_path)
-sys.path.insert(0, modules_path)
-
-from sonic_platform_base.sfp_base import SfpBase
-
-class TestSfpEvent(object):
-    @classmethod
-    def setup_class(cls):
-        os.environ["MLNX_PLATFORM_API_UNIT_TESTING"] = "1"
-
-    @patch('select.select', MagicMock(return_value=([99], None, None)))
-    def test_check_sfp_status(self):
-        from sonic_platform.sfp_event import SDK_SFP_STATE_IN, SDK_SFP_STATE_OUT, SDK_SFP_STATE_ERR
-        from sonic_platform.sfp_event import SDK_ERRORS_TO_ERROR_BITS, SDK_ERRORS_TO_DESCRIPTION, SDK_SFP_BLOCKING_ERRORS
-
-        self.executor(SDK_SFP_STATE_IN, None, SfpBase.SFP_STATUS_BIT_INSERTED)
-        self.executor(SDK_SFP_STATE_OUT, None, SfpBase.SFP_STATUS_BIT_REMOVED)
-        for error_type, error_status in SDK_ERRORS_TO_ERROR_BITS.items():
-            description = SDK_ERRORS_TO_DESCRIPTION.get(error_type)
-            if error_type in SDK_SFP_BLOCKING_ERRORS:
-                error_status |= SfpBase.SFP_ERROR_BIT_BLOCKING
-            error_status |= SfpBase.SFP_STATUS_BIT_INSERTED
-            self.executor(SDK_SFP_STATE_ERR, error_type, error_status, description)
-
-    def executor(self, mock_module_state, mock_error_type, expect_status, description=None):
-        from sonic_platform.sfp_event import sfp_event
-
-        event = sfp_event()
-        event.on_pmpe = MagicMock(return_value=(True, [0,1], mock_module_state, mock_error_type))
-        port_change = {}
-        error_dict = {}
-        found = event.check_sfp_status(port_change, error_dict, 0)
-        assert found
-        expect_status_str = str(expect_status)
-        assert 1 in port_change and port_change[1] == expect_status_str
-        assert 2 in port_change and port_change[2] == expect_status_str
-        if description:
-            assert 1 in error_dict and error_dict[1] == description
-            assert 2 in error_dict and error_dict[2] == description
diff --git a/platform/mellanox/mlnx-platform-api/tests/test_sfp_sm.py b/platform/mellanox/mlnx-platform-api/tests/test_sfp_sm.py
new file mode 100644
index 000000000..9f2154173
--- /dev/null
+++ b/platform/mellanox/mlnx-platform-api/tests/test_sfp_sm.py
@@ -0,0 +1,170 @@
+#
+# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+import os
+import sys
+if sys.version_info.major == 3:
+    from unittest import mock
+else:
+    import mock
+
+test_path = os.path.dirname(os.path.abspath(__file__))
+modules_path = os.path.dirname(test_path)
+sys.path.insert(0, modules_path)
+
+from sonic_platform import sfp
+from sonic_platform import utils
+
+origin_read = utils.read_from_file
+origin_write = utils.write_file
+
+
+class TestSfpStateMachine:
+    PATH_PREFIX = '/sys/module/sx_core/asic0/module0'
+    mock_file_content = {}
+    
+    @classmethod
+    def setup_class(cls):
+        utils.read_from_file = cls.mock_read
+        utils.write_file = cls.mock_write
+        
+    @classmethod
+    def teardown_class(cls):
+        utils.read_from_file = origin_read
+        utils.write_file = origin_write
+    
+    @classmethod
+    def mock_value(cls, file_name, value):
+        cls.mock_file_content[f'{cls.PATH_PREFIX}/{file_name}'] = value
+        
+    @classmethod
+    def get_value(cls, file_name):
+        return cls.mock_file_content[f'{cls.PATH_PREFIX}/{file_name}']
+        
+    @classmethod
+    def mock_write(cls, file_path, value, *args, **kwargs):
+        cls.mock_file_content[file_path] = value
+        
+    @classmethod
+    def mock_read(cls, file_path, *args, **kwargs):
+        return cls.mock_file_content[file_path]
+    
+    def test_warm_reboot_from_fw_control(self):
+        self.mock_value('control', 0)
+        s = sfp.SFP(0)
+        s.on_event(sfp.EVENT_START)
+        assert s.get_state() == sfp.STATE_FW_CONTROL
+        
+    def test_no_hw_present(self):
+        self.mock_value('control', 1)
+        self.mock_value('hw_present', 0)
+        s = sfp.SFP(0)
+        s.on_event(sfp.EVENT_START)
+        assert s.get_state() == sfp.STATE_NOT_PRESENT
+        
+    def test_not_powered(self):
+        self.mock_value('control', 1)
+        self.mock_value('hw_present', 1)
+        self.mock_value('power_on', 0)
+        s = sfp.SFP(0)
+        s.on_event(sfp.EVENT_START)
+        assert s.get_state() == sfp.STATE_RESETTING
+        assert self.get_value('power_on') == 1
+        assert self.get_value('hw_reset') == 1
+        assert 0 in sfp.SFP.get_wait_ready_task()._wait_dict
+        sfp.SFP.get_wait_ready_task()._wait_dict.pop(0)
+        
+    def test_in_reset_state(self):
+        self.mock_value('control', 1)
+        self.mock_value('hw_present', 1)
+        self.mock_value('power_on', 1)
+        self.mock_value('hw_reset', 0)
+        s = sfp.SFP(0)
+        s.on_event(sfp.EVENT_START)
+        assert s.get_state() == sfp.STATE_RESETTING
+        assert self.get_value('hw_reset') == 1
+        assert 0 in sfp.SFP.get_wait_ready_task()._wait_dict
+        s.on_event(sfp.EVENT_NOT_PRESENT)
+        assert s.get_state() == sfp.STATE_NOT_PRESENT
+        assert 0 not in sfp.SFP.get_wait_ready_task()._wait_dict
+        
+    def test_reset_done(self):
+        self.mock_value('control', 1)
+        self.mock_value('hw_present', 1)
+        self.mock_value('power_on', 1)
+        self.mock_value('hw_reset', 0)
+        self.mock_value('power_good', 1)
+        s = sfp.SFP(0)
+        s.determine_control_type = mock.MagicMock(return_value=sfp.SFP_FW_CONTROL)
+        s.on_event(sfp.EVENT_START)
+        assert s.get_state() == sfp.STATE_RESETTING
+        s.on_event(sfp.EVENT_RESET_DONE)
+        assert s.get_state() == sfp.STATE_FW_CONTROL
+        
+    def test_no_power_good(self):
+        self.mock_value('control', 1)
+        self.mock_value('hw_present', 1)
+        self.mock_value('power_on', 1)
+        self.mock_value('hw_reset', 1)
+        self.mock_value('power_good', 0)
+        s = sfp.SFP(0)
+        s.on_event(sfp.EVENT_START)
+        assert s.get_state() == sfp.STATE_POWER_BAD
+        s.on_event(sfp.EVENT_NOT_PRESENT)
+        assert s.get_state() == sfp.STATE_NOT_PRESENT
+
+    def test_fw_control(self):
+        self.mock_value('control', 1)
+        self.mock_value('hw_present', 1)
+        self.mock_value('power_on', 1)
+        self.mock_value('hw_reset', 1)
+        self.mock_value('power_good', 1)
+        s = sfp.SFP(0)
+        s.determine_control_type = mock.MagicMock(return_value=sfp.SFP_FW_CONTROL)
+        s.on_event(sfp.EVENT_START)
+        assert s.get_state() == sfp.STATE_FW_CONTROL
+        assert self.get_value('control') == sfp.SFP_FW_CONTROL
+        
+    def test_power_exceed(self):
+        self.mock_value('control', 1)
+        self.mock_value('hw_present', 1)
+        self.mock_value('power_on', 1)
+        self.mock_value('hw_reset', 1)
+        self.mock_value('power_good', 1)
+        s = sfp.SFP(0)
+        s.determine_control_type = mock.MagicMock(return_value=sfp.SFP_SW_CONTROL)
+        s.check_power_capability = mock.MagicMock(return_value=False)
+        s.on_event(sfp.EVENT_START)
+        assert s.get_state() == sfp.STATE_POWER_LIMIT_ERROR
+        assert self.get_value('power_on') == 0
+        assert self.get_value('hw_reset') == 0
+        s.on_event(sfp.EVENT_NOT_PRESENT)
+        assert s.get_state() == sfp.STATE_NOT_PRESENT
+        
+    def test_sw_control(self):
+        self.mock_value('control', 1)
+        self.mock_value('hw_present', 1)
+        self.mock_value('power_on', 1)
+        self.mock_value('hw_reset', 1)
+        self.mock_value('power_good', 1)
+        s = sfp.SFP(0)
+        s.determine_control_type = mock.MagicMock(return_value=sfp.SFP_SW_CONTROL)
+        s.check_power_capability = mock.MagicMock(return_value=True)
+        s.update_i2c_frequency = mock.MagicMock()
+        s.disable_tx_for_sff_optics = mock.MagicMock()
+        s.on_event(sfp.EVENT_START)
+        assert s.get_state() == sfp.STATE_SW_CONTROL
diff --git a/platform/mellanox/mlnx-platform-api/tests/test_statemachine.py b/platform/mellanox/mlnx-platform-api/tests/test_statemachine.py
new file mode 100644
index 000000000..f2193a686
--- /dev/null
+++ b/platform/mellanox/mlnx-platform-api/tests/test_statemachine.py
@@ -0,0 +1,137 @@
+#
+# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+import os
+import pytest
+import sys
+
+from mock import MagicMock
+if sys.version_info.major == 3:
+    from unittest import mock
+else:
+    import mock
+
+test_path = os.path.dirname(os.path.abspath(__file__))
+modules_path = os.path.dirname(test_path)
+sys.path.insert(0, modules_path)
+
+from sonic_platform import state_machine
+
+STATE_DOWN = 'Down'
+STATE_INIT = 'Initializing'
+STATE_UP = 'Up'
+
+ACTION_LEAVE_DOWN = 'Leave Down'
+ACTION_INIT = 'Initializing'
+ACTION_UP = 'Up'
+
+EVENT_START = 'Start'
+EVENT_INIT_DONE = 'Initialize Done'
+EVENT_STOP = 'Stop'
+
+class StateEntity:
+    def __init__(self):
+        self.state = STATE_DOWN
+        self.current_action = None
+        self.triggered_actions = []
+        
+    def get_state(self):
+        return self.state
+    
+    def change_state(self, new_state):
+        self.state = new_state
+    
+    def on_event(self, event):
+        pass
+    
+    def on_action(self, action_name):
+        self.current_action = action_name
+        self.triggered_actions.append(action_name)
+
+
+class TestStateMachine:
+    sm = None
+    @classmethod
+    def setup_class(cls):
+        sm = state_machine.StateMachine()
+        sm.add_state(STATE_DOWN).set_leave_action(ACTION_LEAVE_DOWN) \
+          .add_transition(EVENT_START, STATE_INIT)
+        sm.add_state(STATE_INIT).set_entry_action(ACTION_INIT) \
+          .add_transition(EVENT_INIT_DONE, STATE_UP) \
+          .add_transition(EVENT_STOP, STATE_DOWN)
+        sm.add_state(STATE_UP).set_entry_action(ACTION_UP) \
+          .add_transition(EVENT_STOP, STATE_DOWN)
+        cls.sm = sm
+        
+    def test_state_machine(self):
+        state_entity = StateEntity()
+        
+        # Start
+        self.sm.on_event(state_entity, EVENT_START)
+        assert state_entity.triggered_actions == [ACTION_LEAVE_DOWN, ACTION_INIT]
+        assert state_entity.get_state() == STATE_INIT
+        
+        # Initialize done
+        self.sm.on_event(state_entity, EVENT_INIT_DONE)
+        assert state_entity.current_action == ACTION_UP
+        assert state_entity.get_state() == STATE_UP
+        
+        # Stop
+        self.sm.on_event(state_entity, EVENT_STOP)
+        assert state_entity.get_state() == STATE_DOWN
+        
+        # Quick start/stop
+        self.sm.on_event(state_entity, EVENT_START)
+        self.sm.on_event(state_entity, EVENT_STOP)
+        assert state_entity.get_state() == STATE_DOWN
+        
+        # Event not defined for this state, state machine should ignore it
+        self.sm.on_event(state_entity, EVENT_STOP)
+        assert state_entity.get_state() == STATE_DOWN
+        
+    def test_unknown_state(self):
+        state_entity = StateEntity()
+        state_entity.state = 'unknown'
+        with pytest.raises(RuntimeError):
+            # Trigger unknown event
+            self.sm.on_event(state_entity, EVENT_START)
+            
+    def test_duplicate_state(self):
+        sm = state_machine.StateMachine()
+        sm.add_state(STATE_DOWN)
+        with pytest.raises(RuntimeError):
+            # Add duplicate state
+            sm.add_state(STATE_DOWN)
+            
+    def test_duplicate_transition(self):
+        sm = state_machine.StateMachine()
+        with pytest.raises(RuntimeError):
+            # Add duplicate transition
+            sm.add_state(STATE_DOWN) \
+              .add_transition(EVENT_START, STATE_INIT) \
+              .add_transition(EVENT_START, STATE_INIT)
+
+    def test_unknown_transition_target(self):
+        sm = state_machine.StateMachine()
+        # Add unknown transition target
+        sm.add_state(STATE_DOWN) \
+          .add_transition(EVENT_START, 'unknown')
+          
+        state_entity = StateEntity()
+        with pytest.raises(RuntimeError):
+            sm.on_event(state_entity, EVENT_START)
+    
\ No newline at end of file
diff --git a/platform/mellanox/mlnx-platform-api/tests/test_thermal_updater.py b/platform/mellanox/mlnx-platform-api/tests/test_thermal_updater.py
index 8e7509ce9..c135395c3 100644
--- a/platform/mellanox/mlnx-platform-api/tests/test_thermal_updater.py
+++ b/platform/mellanox/mlnx-platform-api/tests/test_thermal_updater.py
@@ -1,5 +1,5 @@
 #
-# Copyright (c) 2023 NVIDIA CORPORATION & AFFILIATES.
+# Copyright (c) 2023-2024 NVIDIA CORPORATION & AFFILIATES.
 # Apache-2.0
 #
 # Licensed under the Apache License, Version 2.0 (the "License");
@@ -61,10 +61,8 @@ def test_load_tc_config_mocked(self):
 
     @mock.patch('sonic_platform.thermal_updater.ThermalUpdater.update_asic', mock.MagicMock())
     @mock.patch('sonic_platform.thermal_updater.ThermalUpdater.update_module', mock.MagicMock())
-    @mock.patch('sonic_platform.thermal_updater.ThermalUpdater.wait_all_sfp_ready')
     @mock.patch('sonic_platform.utils.write_file')
-    def test_start_stop(self, mock_write, mock_wait):
-        mock_wait.return_value = True
+    def test_start_stop(self, mock_write):
         mock_sfp = mock.MagicMock()
         mock_sfp.sdk_index = 1
         updater = ThermalUpdater([mock_sfp])
@@ -77,21 +75,6 @@ def test_start_stop(self, mock_write, mock_wait):
         assert not updater._timer.is_alive()
         mock_write.assert_called_once_with('/run/hw-management/config/suspend', 1)
 
-        mock_wait.return_value = False
-        mock_write.reset_mock()
-        updater.start()
-        mock_write.assert_called_once_with('/run/hw-management/config/suspend', 1)
-        updater.stop()
-
-    @mock.patch('sonic_platform.thermal_updater.time.sleep', mock.MagicMock())
-    def test_wait_all_sfp_ready(self):
-        mock_sfp = mock.MagicMock()
-        mock_sfp.is_sw_control = mock.MagicMock(return_value=True)
-        updater = ThermalUpdater([mock_sfp])
-        assert updater.wait_all_sfp_ready()
-        mock_sfp.is_sw_control.side_effect = Exception('')
-        assert not updater.wait_all_sfp_ready()
-
     @mock.patch('sonic_platform.utils.read_int_from_file')
     def test_update_asic(self, mock_read):
         mock_read.return_value = 8
diff --git a/platform/mellanox/mlnx-platform-api/tests/test_wait_sfp_ready_task.py b/platform/mellanox/mlnx-platform-api/tests/test_wait_sfp_ready_task.py
new file mode 100644
index 000000000..16e361f09
--- /dev/null
+++ b/platform/mellanox/mlnx-platform-api/tests/test_wait_sfp_ready_task.py
@@ -0,0 +1,51 @@
+#
+# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+import os
+import sys
+
+if sys.version_info.major == 3:
+    from unittest import mock
+else:
+    import mock
+
+test_path = os.path.dirname(os.path.abspath(__file__))
+modules_path = os.path.dirname(test_path)
+sys.path.insert(0, modules_path)
+
+from sonic_platform import wait_sfp_ready_task
+from sonic_platform import utils
+
+
+class TestWaitSfpReadyTask:
+    def test_schedule(self):
+        task = wait_sfp_ready_task.WaitSfpReadyTask()
+        task.schedule_wait(0)
+        assert not task.empty()
+        task.cancel_wait(0)
+        assert task.empty()
+        
+    def test_run(self):
+        task = wait_sfp_ready_task.WaitSfpReadyTask()
+        task.WAIT_TIME = 1 # Fast the test
+        task.start()
+        task.schedule_wait(0)
+        assert utils.wait_until(lambda: 0 in task.get_ready_set(), 4, 0.5), 'sfp does not reach ready in 4 seconds'
+        assert 0 not in task._wait_dict
+        assert len(task._ready_set) == 0
+        task.stop()
+        task.join()

From 5da926d83c435afa7b069a9630ace817d1c4f2ba Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sat, 11 May 2024 16:00:56 +0800
Subject: [PATCH 0552/1115] [submodule] Update submodule sonic-swss to the
 latest HEAD automatically (#18935)

#### Why I did it
src/sonic-swss
```
* 198eb3d1 - (HEAD -> master, origin/master, origin/HEAD) Add transceiver info to bake only if supported (#3142) (2 hours ago) [Sudharsan Dhamal Gopalarathnam]
* f62eed23 - [Mellanox] PFC watchdog long term solution to reduce false alarm (#3036) (35 hours ago) [Stephen Sun]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-swss | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-swss b/src/sonic-swss
index 837e46757..198eb3d1f 160000
--- a/src/sonic-swss
+++ b/src/sonic-swss
@@ -1 +1 @@
-Subproject commit 837e46757756dc07fd5840678fa73e8c27abaf20
+Subproject commit 198eb3d1f16f3e5746f1613b74a3debcbc2ac669

From 6caa1fba71567fa298b0ad5b5fbf2dea164a7247 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sat, 11 May 2024 19:01:04 +0800
Subject: [PATCH 0553/1115] [submodule] Update submodule sonic-linux-kernel to
 the latest HEAD automatically (#18922)

#### Why I did it
src/sonic-linux-kernel
```
* f182d03 - (HEAD -> master, origin/master, origin/HEAD) Kernel changes for support of elba DSS (#389) (2 days ago) [Shantanu Shrivastava]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-linux-kernel | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-linux-kernel b/src/sonic-linux-kernel
index b0dec2c92..f182d03e9 160000
--- a/src/sonic-linux-kernel
+++ b/src/sonic-linux-kernel
@@ -1 +1 @@
-Subproject commit b0dec2c92c570fa9d7d04d80aca381fd360ff52c
+Subproject commit f182d03e9155a429d62a0dbf08ad8f5a33f2bc83

From e6b3f91be3e96feb6bf4b59f841643054a6c3906 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sat, 11 May 2024 22:01:13 +0800
Subject: [PATCH 0554/1115] [submodule] Update submodule sonic-sairedis to the
 latest HEAD automatically (#18934)

#### Why I did it
src/sonic-sairedis
```
* 256ce7d - (HEAD -> master, origin/master, origin/HEAD) [syncd]: Generate syncd_dash (#1377) (27 hours ago) [Ze Gan]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-sairedis | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-sairedis b/src/sonic-sairedis
index 8a0cc2598..256ce7dc5 160000
--- a/src/sonic-sairedis
+++ b/src/sonic-sairedis
@@ -1 +1 @@
-Subproject commit 8a0cc25989fb5bd005bde493190faac6bc84a86d
+Subproject commit 256ce7dc546e99dbeeb43404c4157ed7136e2932

From 595ee17b10b243604c79d9d0485efc6bf358234d Mon Sep 17 00:00:00 2001
From: Sudharsan Dhamal Gopalarathnam <sudharsand@nvidia.com>
Date: Sat, 11 May 2024 15:52:46 -0700
Subject: [PATCH 0555/1115] [FRR]Fix zebra parse attribute problem for encap
 (#18939)

Adding patch FRRouting/frr#15968.
This fixes zebra encap problem for multipath with evpn
---
 ...ra-fix-parse-attr-problems-for-encap.patch | 290 ++++++++++++++++++
 src/sonic-frr/patch/series                    |   1 +
 2 files changed, 291 insertions(+)
 create mode 100644 src/sonic-frr/patch/0028-zebra-fix-parse-attr-problems-for-encap.patch

diff --git a/src/sonic-frr/patch/0028-zebra-fix-parse-attr-problems-for-encap.patch b/src/sonic-frr/patch/0028-zebra-fix-parse-attr-problems-for-encap.patch
new file mode 100644
index 000000000..358cee25b
--- /dev/null
+++ b/src/sonic-frr/patch/0028-zebra-fix-parse-attr-problems-for-encap.patch
@@ -0,0 +1,290 @@
+From bef0dda1527782830b034dce9fbdc35a5b3aa88e Mon Sep 17 00:00:00 2001
+From: Donald Sharp <sharpd@nvidia.com>
+Date: Wed, 8 May 2024 12:46:08 -0400
+Subject: [PATCH 1/3] zebra: Move netlink_route_nexthop_encap
+
+Move this static function earlier so we can avoid
+a predecleartion.
+
+Signed-off-by: Donald Sharp <sharpd@nvidia.com>
+---
+ zebra/rt_netlink.c | 82 +++++++++++++++++++++++-----------------------
+ 1 file changed, 41 insertions(+), 41 deletions(-)
+
+diff --git a/zebra/rt_netlink.c b/zebra/rt_netlink.c
+index fc9e8c457c..42b4d7c199 100644
+--- a/zebra/rt_netlink.c
++++ b/zebra/rt_netlink.c
+@@ -1732,6 +1732,47 @@ static inline bool _netlink_set_tag(struct nlmsghdr *n, unsigned int maxlen,
+ 	return true;
+ }
+ 
++/*
++ * The function returns true if the attribute could be added
++ * to the message, otherwise false is returned.
++ */
++static int netlink_route_nexthop_encap(struct nlmsghdr *n, size_t nlen,
++				       struct nexthop *nh)
++{
++	struct rtattr *nest;
++	struct vxlan_nh_encap* encap_data;
++
++	switch (nh->nh_encap_type) {
++	case NET_VXLAN:
++		if (!nl_attr_put16(n, nlen, RTA_ENCAP_TYPE, nh->nh_encap_type))
++			return false;
++
++		nest = nl_attr_nest(n, nlen, RTA_ENCAP);
++		if (!nest)
++			return false;
++
++		encap_data = &nh->nh_encap.encap_data;
++
++		if (!nl_attr_put32(n, nlen, 0 /* VXLAN_VNI */,
++				   encap_data->vni))
++			return false;
++
++		if (ZEBRA_DEBUG_KERNEL)
++			zlog_debug(
++				"%s: VNI:%d RMAC:%pEA", __func__, encap_data->vni,
++				&encap_data->rmac);
++
++		if (!nl_attr_put(n, nlen, 1 /* VXLAN_RMAC */,
++					&encap_data->rmac, sizeof(encap_data->rmac)))
++			return false;
++
++		nl_attr_nest_end(n, nest);
++		break;
++	}
++
++	return true;
++}
++
+ /* This function takes a nexthop as argument and
+  * appends to the given netlink msg. If the nexthop
+  * defines a preferred source, the src parameter
+@@ -1972,47 +2013,6 @@ static bool nexthop_set_src(const struct nexthop *nexthop, int family,
+ 	return false;
+ }
+ 
+-/*
+- * The function returns true if the attribute could be added
+- * to the message, otherwise false is returned.
+- */
+-static int netlink_route_nexthop_encap(struct nlmsghdr *n, size_t nlen,
+-				       struct nexthop *nh)
+-{
+-	struct rtattr *nest;
+-	struct vxlan_nh_encap* encap_data;
+-
+-	switch (nh->nh_encap_type) {
+-	case NET_VXLAN:
+-		if (!nl_attr_put16(n, nlen, RTA_ENCAP_TYPE, nh->nh_encap_type))
+-			return false;
+-
+-		nest = nl_attr_nest(n, nlen, RTA_ENCAP);
+-		if (!nest)
+-			return false;
+-
+-		encap_data = &nh->nh_encap.encap_data;
+-
+-		if (!nl_attr_put32(n, nlen, 0 /* VXLAN_VNI */,
+-				   encap_data->vni))
+-			return false;
+-
+-		if (ZEBRA_DEBUG_KERNEL)
+-			zlog_debug(
+-				"%s: VNI:%d RMAC:%pEA", __func__, encap_data->vni,
+-				&encap_data->rmac);
+-
+-		if (!nl_attr_put(n, nlen, 1 /* VXLAN_RMAC */,
+-					&encap_data->rmac, sizeof(encap_data->rmac)))
+-			return false;
+-
+-		nl_attr_nest_end(n, nest);
+-		break;
+-	}
+-
+-	return true;
+-}
+-
+ /*
+  * Routing table change via netlink interface, using a dataplane context object
+  *
+-- 
+2.17.1
+
+
+From 35e1282543bda57563a68046489e0fdb1a0416d1 Mon Sep 17 00:00:00 2001
+From: Donald Sharp <sharpd@nvidia.com>
+Date: Wed, 8 May 2024 12:48:12 -0400
+Subject: [PATCH 2/3] zebra: Move fpm check to inside of
+ netlink_route_nexthop_encap
+
+Signed-off-by: Donald Sharp <sharpd@nvidia.com>
+---
+ zebra/rt_netlink.c | 26 +++++++++++++-------------
+ 1 file changed, 13 insertions(+), 13 deletions(-)
+
+diff --git a/zebra/rt_netlink.c b/zebra/rt_netlink.c
+index 42b4d7c199..e52916fa07 100644
+--- a/zebra/rt_netlink.c
++++ b/zebra/rt_netlink.c
+@@ -1736,12 +1736,15 @@ static inline bool _netlink_set_tag(struct nlmsghdr *n, unsigned int maxlen,
+  * The function returns true if the attribute could be added
+  * to the message, otherwise false is returned.
+  */
+-static int netlink_route_nexthop_encap(struct nlmsghdr *n, size_t nlen,
+-				       struct nexthop *nh)
++static int netlink_route_nexthop_encap(bool fpm, struct nlmsghdr *n,
++				       size_t nlen, struct nexthop *nh)
+ {
+ 	struct rtattr *nest;
+ 	struct vxlan_nh_encap* encap_data;
+ 
++	if (!fpm)
++		return true;
++
+ 	switch (nh->nh_encap_type) {
+ 	case NET_VXLAN:
+ 		if (!nl_attr_put16(n, nlen, RTA_ENCAP_TYPE, nh->nh_encap_type))
+@@ -2276,12 +2279,10 @@ ssize_t netlink_route_multipath_msg_encode(int cmd,
+ 				 * Add encapsulation information when
+ 				 * installing via FPM.
+ 				 */
+-				if (fpm) {
+-					if (!netlink_route_nexthop_encap(&req->n,
+-									 datalen,
+-									 nexthop))
+-						return 0;
+-				}
++				if (!netlink_route_nexthop_encap(fpm, &req->n,
++								 datalen,
++								 nexthop))
++					return 0;
+ 
+ 				nexthop_num++;
+ 				break;
+@@ -2336,11 +2337,10 @@ ssize_t netlink_route_multipath_msg_encode(int cmd,
+ 				 * Add encapsulation information when installing via
+ 				 * FPM.
+ 				 */
+-				if (fpm) {
+-					if (!netlink_route_nexthop_encap(
+-						    &req->n, datalen, nexthop))
+-						return 0;
+-				}
++				if (!netlink_route_nexthop_encap(fpm, &req->n,
++								 datalen,
++								 nexthop))
++					return 0;
+ 
+ 				if (!setsrc && src1) {
+ 					if (p->family == AF_INET)
+-- 
+2.17.1
+
+
+From 9f3314723a0569c1d2b5aec5088af87c1d06d40e Mon Sep 17 00:00:00 2001
+From: Donald Sharp <sharpd@nvidia.com>
+Date: Wed, 8 May 2024 12:52:12 -0400
+Subject: [PATCH 3/3] zebra: Ensure multipath encodes vxlan right for fpm usage
+
+The fpm code path for the dplane_fpm_nl module was improperly
+encoding the multipath nexthop data for vxlan type routes.
+Move this into the embedded nexthop encoding where it belongs.
+
+This change makes it so that the usage of `-M dplane_fpm_nl`
+is now producing the same netlink messages that `-M fpm`
+produces when using vxlan based nexthops.
+
+Signed-off-by: Donald Sharp <sharpd@nvidia.com>
+---
+ zebra/rt_netlink.c | 43 ++++++++++++++++++++++++-------------------
+ 1 file changed, 24 insertions(+), 19 deletions(-)
+
+diff --git a/zebra/rt_netlink.c b/zebra/rt_netlink.c
+index e52916fa07..3f51894be3 100644
+--- a/zebra/rt_netlink.c
++++ b/zebra/rt_netlink.c
+@@ -1737,7 +1737,7 @@ static inline bool _netlink_set_tag(struct nlmsghdr *n, unsigned int maxlen,
+  * to the message, otherwise false is returned.
+  */
+ static int netlink_route_nexthop_encap(bool fpm, struct nlmsghdr *n,
+-				       size_t nlen, struct nexthop *nh)
++				       size_t nlen, const struct nexthop *nh)
+ {
+ 	struct rtattr *nest;
+ 	struct vxlan_nh_encap* encap_data;
+@@ -1794,10 +1794,13 @@ static int netlink_route_nexthop_encap(bool fpm, struct nlmsghdr *n,
+  * The function returns true if the nexthop could be added
+  * to the message, otherwise false is returned.
+  */
+-static bool _netlink_route_build_multipath(
+-	const struct prefix *p, const char *routedesc, int bytelen,
+-	const struct nexthop *nexthop, struct nlmsghdr *nlmsg, size_t req_size,
+-	struct rtmsg *rtmsg, const union g_addr **src, route_tag_t tag)
++static bool _netlink_route_build_multipath(const struct prefix *p,
++					   const char *routedesc, int bytelen,
++					   const struct nexthop *nexthop,
++					   struct nlmsghdr *nlmsg,
++					   size_t req_size, struct rtmsg *rtmsg,
++					   const union g_addr **src,
++					   route_tag_t tag, bool fpm)
+ {
+ 	char label_buf[256];
+ 	struct vrf *vrf;
+@@ -1906,6 +1909,13 @@ static bool _netlink_route_build_multipath(
+ 	if (!_netlink_set_tag(nlmsg, req_size, tag))
+ 		return false;
+ 
++	/*
++	 * Add encapsulation information when installing via
++	 * FPM.
++	 */
++	if (!netlink_route_nexthop_encap(fpm, nlmsg, req_size, nexthop))
++		return false;
++
+ 	nl_attr_rtnh_end(nlmsg, rtnh);
+ 	return true;
+ }
+@@ -1940,7 +1950,7 @@ _netlink_mpls_build_multipath(const struct prefix *p, const char *routedesc,
+ 	bytelen = (family == AF_INET ? 4 : 16);
+ 	return _netlink_route_build_multipath(p, routedesc, bytelen,
+ 					      nhlfe->nexthop, nlmsg, req_size,
+-					      rtmsg, src, 0);
++					      rtmsg, src, 0, false);
+ }
+ 
+ static void _netlink_mpls_debug(int cmd, uint32_t label, const char *routedesc)
+@@ -2327,19 +2337,14 @@ ssize_t netlink_route_multipath_msg_encode(int cmd,
+ 						    : "multipath";
+ 				nexthop_num++;
+ 
+-				if (!_netlink_route_build_multipath(
+-					    p, routedesc, bytelen, nexthop,
+-					    &req->n, datalen, &req->r, &src1,
+-					    tag))
+-					return 0;
+-
+-				/*
+-				 * Add encapsulation information when installing via
+-				 * FPM.
+-				 */
+-				if (!netlink_route_nexthop_encap(fpm, &req->n,
+-								 datalen,
+-								 nexthop))
++				if (!_netlink_route_build_multipath(p, routedesc,
++								    bytelen,
++								    nexthop,
++								    &req->n,
++								    datalen,
++								    &req->r,
++								    &src1, tag,
++								    fpm))
+ 					return 0;
+ 
+ 				if (!setsrc && src1) {
+-- 
+2.17.1
+
diff --git a/src/sonic-frr/patch/series b/src/sonic-frr/patch/series
index 9874e27ae..f2cd08ca6 100644
--- a/src/sonic-frr/patch/series
+++ b/src/sonic-frr/patch/series
@@ -25,3 +25,4 @@
 0025-bgp-community-memory-leak-fix.patch
 0026-bgp-fib-suppress-announce-fix.patch
 0027-lib-Do-not-convert-EVPN-prefixes-into-IPv4-IPv6-if-n.patch
+0028-zebra-fix-parse-attr-problems-for-encap.patch

From e1d4c9abbeec1195f70700286b8152a57f9ff199 Mon Sep 17 00:00:00 2001
From: Pavan Prakash <120486223+Pavan-Nokia@users.noreply.github.com>
Date: Sat, 11 May 2024 21:53:30 -0400
Subject: [PATCH 0556/1115] [Nokia-7215-A1] EZB update for SAI and platform
 finetuning (#18914)

1) Update EZB to version 1.06 to suppost Marvell SAI update to version 1.13.3
2) Platform changes to finetune fan and thermals
---
 .../Nokia-7215-A1/ASK-Board-AC5X-xb.md5       |  2 +-
 .../Nokia-7215-A1/ASK-Board-AC5X-xb.xml       | 52 +++++++++++------
 .../Nokia-7215-A1/ASK-L1-AC5X-xb.md5          |  2 +-
 .../Nokia-7215-A1/ASK-L1-AC5X-xb.xml          |  2 +-
 .../Nokia-7215-A1/ASK-PP-AC5X-xb.md5          |  2 +-
 .../Nokia-7215-A1/ASK-PP-AC5X-xb.xml          | 24 +++++++-
 .../Nokia-7215-A1/SAI-AC5X-xb.md5             |  2 +-
 .../Nokia-7215-A1/SAI-AC5X-xb.xml             | 56 +++++++++++++++++--
 .../7215-a1/modules/nokia_7215_ixs_a1_cpld.c  |  6 +-
 .../7215-a1/scripts/nokia-7215-init.sh        |  3 +
 .../7215-a1/sonic_platform/chassis.py         |  5 +-
 .../7215-a1/sonic_platform/fan.py             |  4 +-
 12 files changed, 123 insertions(+), 37 deletions(-)

diff --git a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-Board-AC5X-xb.md5 b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-Board-AC5X-xb.md5
index fe63caf78..b11b209e5 100644
--- a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-Board-AC5X-xb.md5
+++ b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-Board-AC5X-xb.md5
@@ -1 +1 @@
-4983b60d1d68623c202b91093f3730db
\ No newline at end of file
+c99947340cd205fa728bd418d1ca7a92
\ No newline at end of file
diff --git a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-Board-AC5X-xb.xml b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-Board-AC5X-xb.xml
index 20cdef069..f23c2e9ba 100644
--- a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-Board-AC5X-xb.xml
+++ b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-Board-AC5X-xb.xml
@@ -1,5 +1,5 @@
 <?xml version="1.0" encoding="utf-8"?>
-<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2023-11-20-1.05" profile="Askboard" sid="20929980-c61f-4f1d-b08a-4e64f6d717c2">
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-02-19-1.06" profile="Askboard" dsig="md5" sid="c3bbe06d-10a0-44e5-9673-58f50238498a">
   <askboardplt:ASK-Board xmlns:askboardplt="urn:marvell:askboard:yang">
     <askboardplt:typedefs>
       <askboardplt:typedef>
@@ -52,7 +52,7 @@
       <askboardplt:typedef>
         <askboardplt:name>board-pp-interface-channel-type</askboardplt:name>
         <askboardplt:type>enumeration</askboardplt:type>
-        <askboardplt:description>Specifies interface tunnel.</askboardplt:description>
+        <askboardplt:description>Specifies channel interface type.</askboardplt:description>
         <askboardplt:enum>
           <askboardplt:name>pci</askboardplt:name>
           <askboardplt:description>PCI</askboardplt:description>
@@ -64,19 +64,29 @@
           <askboardplt:value>1</askboardplt:value>
         </askboardplt:enum>
         <askboardplt:enum>
-          <askboardplt:name>pex</askboardplt:name>
-          <askboardplt:description>PEX</askboardplt:description>
-          <askboardplt:value>3</askboardplt:value>
+          <askboardplt:name>twsi</askboardplt:name>
+          <askboardplt:description>TWSI</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
         </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>board-pp-as-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies Address space type.</askboardplt:description>
         <askboardplt:enum>
-          <askboardplt:name>pex_eagle</askboardplt:name>
-          <askboardplt:description>PEX EAGLE</askboardplt:description>
-          <askboardplt:value>5</askboardplt:value>
+          <askboardplt:name>4_regions</askboardplt:name>
+          <askboardplt:description>address-space 4 regions</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
         </askboardplt:enum>
         <askboardplt:enum>
-          <askboardplt:name>pex_falcon_z</askboardplt:name>
-          <askboardplt:description>PEX FALCON Z</askboardplt:description>
-          <askboardplt:value>6</askboardplt:value>
+          <askboardplt:name>8_regions</askboardplt:name>
+          <askboardplt:description>address-space 8 regions</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>atu</askboardplt:name>
+          <askboardplt:description>address translation unit</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
         </askboardplt:enum>
       </askboardplt:typedef>
       <askboardplt:typedef>
@@ -683,6 +693,11 @@ lowercase characters.</askboardplt:description>
           <askboardplt:description>AC5X</askboardplt:description>
           <askboardplt:value>1</askboardplt:value>
         </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>ASIC_Falcon</askboardplt:name>
+          <askboardplt:description>FALCON</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
       </askboardplt:typedef>
     </askboardplt:typedefs>
     <askboardplt:ASIC_Type askboardplt:type="asic-type">ASIC_AC5X</askboardplt:ASIC_Type>
@@ -691,7 +706,8 @@ lowercase characters.</askboardplt:description>
     <askboardplt:extDrvCallType askboardplt:type="board-callback-type">linux-static</askboardplt:extDrvCallType>
     <askboardplt:mapType askboardplt:type="board-pp-map-type">autoscan</askboardplt:mapType>
     <askboardplt:cpuType askboardplt:type="cpu-type">external</askboardplt:cpuType>
-    <askboardplt:mngInterfaceType askboardplt:type="board-pp-interface-channel-type">pex_eagle</askboardplt:mngInterfaceType>
+    <askboardplt:mngInterfaceType askboardplt:type="board-pp-interface-channel-type">pci</askboardplt:mngInterfaceType>
+    <askboardplt:adressSpaceType askboardplt:type="board-pp-as-type">atu</askboardplt:adressSpaceType>
     <askboardplt:device-list>
       <askboardplt:devNum askboardplt:type="device-id-type">0</askboardplt:devNum>
       <askboardplt:deviceId askboardplt:type="device-id-type">0</askboardplt:deviceId>
@@ -1625,7 +1641,7 @@ lowercase characters.</askboardplt:description>
           <askboardplt:ledPosition askboardplt:type="led-position-type">0</askboardplt:ledPosition>
           <askboardplt:polarityInvertList-list>
             <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
-            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">false</askboardplt:invertEnable>
           </askboardplt:polarityInvertList-list>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
         </askboardplt:ledstream-port>
@@ -1645,7 +1661,7 @@ lowercase characters.</askboardplt:description>
           <askboardplt:ledPosition askboardplt:type="led-position-type">1</askboardplt:ledPosition>
           <askboardplt:polarityInvertList-list>
             <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
-            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">false</askboardplt:invertEnable>
           </askboardplt:polarityInvertList-list>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
         </askboardplt:ledstream-port>
@@ -1665,7 +1681,7 @@ lowercase characters.</askboardplt:description>
           <askboardplt:ledPosition askboardplt:type="led-position-type">0</askboardplt:ledPosition>
           <askboardplt:polarityInvertList-list>
             <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
-            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">false</askboardplt:invertEnable>
           </askboardplt:polarityInvertList-list>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
         </askboardplt:ledstream-port>
@@ -1685,7 +1701,7 @@ lowercase characters.</askboardplt:description>
           <askboardplt:ledPosition askboardplt:type="led-position-type">1</askboardplt:ledPosition>
           <askboardplt:polarityInvertList-list>
             <askboardplt:polarityClassNum askboardplt:type="led-class-num-type">2</askboardplt:polarityClassNum>
-            <askboardplt:invertEnable askboardplt:type="boolean-type">true</askboardplt:invertEnable>
+            <askboardplt:invertEnable askboardplt:type="boolean-type">false</askboardplt:invertEnable>
           </askboardplt:polarityInvertList-list>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
         </askboardplt:ledstream-port>
@@ -1771,9 +1787,9 @@ lowercase characters.</askboardplt:description>
         <askboardplt:ledstream-configSet>
           <askboardplt:ledOrganize askboardplt:type="led-stream-order-mode-type">ORDER_MODE_BY_PORT</askboardplt:ledOrganize>
           <askboardplt:blink0DutyCycle askboardplt:type="led-stream-blink-duty-cycle-type">BLINK_DUTY_CYCLE_1</askboardplt:blink0DutyCycle>
-          <askboardplt:blink0Duration askboardplt:type="led-stream-blink-duration-type">BLINK_DURATION_2</askboardplt:blink0Duration>
+          <askboardplt:blink0Duration askboardplt:type="led-stream-blink-duration-type">BLINK_DURATION_0</askboardplt:blink0Duration>
           <askboardplt:blink1DutyCycle askboardplt:type="led-stream-blink-duty-cycle-type">BLINK_DUTY_CYCLE_1</askboardplt:blink1DutyCycle>
-          <askboardplt:blink1Duration askboardplt:type="led-stream-blink-duration-type">BLINK_DURATION_2</askboardplt:blink1Duration>
+          <askboardplt:blink1Duration askboardplt:type="led-stream-blink-duration-type">BLINK_DURATION_0</askboardplt:blink1Duration>
           <askboardplt:pulseStretch askboardplt:type="led-stream-pulse-stretch-type">PULSE_STRETCH_1</askboardplt:pulseStretch>
           <askboardplt:invertEnable askboardplt:type="boolean-type">false</askboardplt:invertEnable>
           <askboardplt:SIP6ledClockFrequency askboardplt:type="led-stream-clock-frequency-type">1627</askboardplt:SIP6ledClockFrequency>
diff --git a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-L1-AC5X-xb.md5 b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-L1-AC5X-xb.md5
index 6ea0d9634..575bbf06a 100644
--- a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-L1-AC5X-xb.md5
+++ b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-L1-AC5X-xb.md5
@@ -1 +1 @@
-48c76e16726ad2b1cb797c55c477fc30
\ No newline at end of file
+83b91095c99529e49619e31e3fd72101
\ No newline at end of file
diff --git a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-L1-AC5X-xb.xml b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-L1-AC5X-xb.xml
index e00ba0314..eff23c06f 100644
--- a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-L1-AC5X-xb.xml
+++ b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-L1-AC5X-xb.xml
@@ -1,5 +1,5 @@
 <?xml version="1.0" encoding="utf-8"?>
-<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2023-11-20-1.05" profile="Askl1" sid="a9deb744-f6cb-4675-bab3-11132e7db1cd">
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-02-19-1.06" profile="Askl1" sid="71d3ab0f-3ac2-452a-a5c9-2dfdc969734a">
   <ASKL1plt:ASK-L1 xmlns:ASKL1plt="urn:marvell:ASKL1:yang">
     <ASKL1plt:typedefs>
       <ASKL1plt:typedef>
diff --git a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-PP-AC5X-xb.md5 b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-PP-AC5X-xb.md5
index bcd85e67a..c043a0d72 100644
--- a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-PP-AC5X-xb.md5
+++ b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-PP-AC5X-xb.md5
@@ -1 +1 @@
-d36319f76733ae8593e31f3231599936
\ No newline at end of file
+209426f8b550ddf85db19925f9f202a1
\ No newline at end of file
diff --git a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-PP-AC5X-xb.xml b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-PP-AC5X-xb.xml
index cd948edc2..9e40492cf 100644
--- a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-PP-AC5X-xb.xml
+++ b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-PP-AC5X-xb.xml
@@ -1,5 +1,5 @@
 <?xml version="1.0" encoding="utf-8"?>
-<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2023-11-20-1.05" profile="Askpp" sid="fdf5b1c2-b80a-47a6-ac37-47e174286524">
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-02-19-1.06" profile="Askpp" sid="34f1c14a-b581-422d-bd10-426dfac013dd">
   <askppplt:ASK-PP xmlns:askppplt="urn:marvell:askpp:yang">
     <askppplt:typedefs>
       <askppplt:typedef>
@@ -519,7 +519,28 @@
           <askppplt:value>1</askppplt:value>
         </askppplt:enum>
       </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>asic-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>ASIC Type</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>ASIC_AC3X</askppplt:name>
+          <askppplt:description>AC3X</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>ASIC_AC5X</askppplt:name>
+          <askppplt:description>AC5X</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>ASIC_Falcon</askppplt:name>
+          <askppplt:description>FALCON</askppplt:description>
+          <askppplt:value>2</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
     </askppplt:typedefs>
+    <askppplt:ASIC_Type askppplt:type="asic-type">ASIC_AC5X</askppplt:ASIC_Type>
     <askppplt:PPInit>
       <askppplt:PP-name askppplt:type="std-string">AC5X-RD</askppplt:PP-name>
       <askppplt:Phase1>
@@ -842,7 +863,6 @@
       <askppplt:LogicalInit>
         <askppplt:routingMode askppplt:type="routing-mode-type">TCAM_ROUTER_BASED</askppplt:routingMode>
         <askppplt:maxNumOfPbrEntries askppplt:type="uint32">0</askppplt:maxNumOfPbrEntries>
-        <askppplt:sharedTableMode askppplt:type="shared-table-mode-type">MID_L3_MID_L2_NO_EM</askppplt:sharedTableMode>
         <askppplt:ingressDropEnable askppplt:type="boolean-type">true</askppplt:ingressDropEnable>
       </askppplt:LogicalInit>
       <askppplt:LibInit>
diff --git a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/SAI-AC5X-xb.md5 b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/SAI-AC5X-xb.md5
index dd43b5857..04eaffc09 100644
--- a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/SAI-AC5X-xb.md5
+++ b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/SAI-AC5X-xb.md5
@@ -1 +1 @@
-1ff8c65eb4b5dfff5d2c9be67401c723
\ No newline at end of file
+8918d787a5ccaa80a481ddb8b169574a
\ No newline at end of file
diff --git a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/SAI-AC5X-xb.xml b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/SAI-AC5X-xb.xml
index d88939c00..00c77001f 100644
--- a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/SAI-AC5X-xb.xml
+++ b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/SAI-AC5X-xb.xml
@@ -1,5 +1,5 @@
 <?xml version="1.0" encoding="utf-8"?>
-<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-01-08-1.05" profile="SAI" sid="fd56a8b4-6b41-4ead-9a27-c491bc2f95b9">
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-02-19-1.06" profile="SAI" dsig="md5" sid="c310bbb1-ffca-4c99-9bae-f7d4caff5941">
   <SAIplt:SAI xmlns:SAIplt="urn:marvell:SAI:yang">
     <SAIplt:typedefs>
       <SAIplt:typedef>
@@ -36,6 +36,26 @@
           <SAIplt:value>2</SAIplt:value>
         </SAIplt:enum>
       </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>InDropCounter-type</SAIplt:name>
+        <SAIplt:type>enumeration</SAIplt:type>
+        <SAIplt:description>Router In Drop Reason Feature Options</SAIplt:description>
+        <SAIplt:enum>
+          <SAIplt:name>TTL_HOPLIMIT_EXCEEDED</SAIplt:name>
+          <SAIplt:description>Router In Drop Counters track TTL &amp; Hop Limit Exceeded Packets</SAIplt:description>
+          <SAIplt:value>0</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>ROUTE_BLACKHOLE</SAIplt:name>
+          <SAIplt:description>Router In Drop Counters track Route Black Hole Packets</SAIplt:description>
+          <SAIplt:value>1</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>IN_DROP_ANY</SAIplt:name>
+          <SAIplt:description>Router In Drop Counters track either TTL &amp; Hop Limit Exceeded or Route Black Hole Packets</SAIplt:description>
+          <SAIplt:value>2</SAIplt:value>
+        </SAIplt:enum>
+      </SAIplt:typedef>
       <SAIplt:typedef>
         <SAIplt:name>log-dest-file-path-type</SAIplt:name>
         <SAIplt:type>string</SAIplt:type>
@@ -62,6 +82,11 @@
           <SAIplt:description>ACLs for control packet handling</SAIplt:description>
           <SAIplt:value>2</SAIplt:value>
         </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>debug-counter-acl</SAIplt:name>
+          <SAIplt:description>ACLs for Debug Counters</SAIplt:description>
+          <SAIplt:value>3</SAIplt:value>
+        </SAIplt:enum>
       </SAIplt:typedef>
       <SAIplt:typedef>
         <SAIplt:name>ingress-acl-stage-type</SAIplt:name>
@@ -126,6 +151,11 @@
           <SAIplt:description>AC5X</SAIplt:description>
           <SAIplt:value>1</SAIplt:value>
         </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>ASIC_Falcon</SAIplt:name>
+          <SAIplt:description>FALCON</SAIplt:description>
+          <SAIplt:value>2</SAIplt:value>
+        </SAIplt:enum>
       </SAIplt:typedef>
     </SAIplt:typedefs>
     <SAIplt:ASIC_Type SAIplt:type="asic-type">ASIC_AC5X</SAIplt:ASIC_Type>
@@ -400,15 +430,19 @@
       <SAIplt:max_ipv4_tunnel SAIplt:type="uint32">8</SAIplt:max_ipv4_tunnel>
       <SAIplt:max_ipv6_tunnel SAIplt:type="uint32">8</SAIplt:max_ipv6_tunnel>
       <SAIplt:max_tti SAIplt:type="uint32">1024</SAIplt:max_tti>
-      <SAIplt:wred_size SAIplt:type="uint32">0</SAIplt:wred_size>
-      <SAIplt:max_nat SAIplt:type="uint32">0</SAIplt:max_nat>
     </SAIplt:scalingAC5>
+    <SAIplt:Counters>
+      <SAIplt:cnc-base-list>
+        <SAIplt:counter-base SAIplt:type="uint32">0</SAIplt:counter-base>
+      </SAIplt:cnc-base-list>
+      <SAIplt:router-in-drop-counter SAIplt:type="InDropCounter-type">IN_DROP_ANY</SAIplt:router-in-drop-counter>
+    </SAIplt:Counters>
     <SAIplt:Logging>
       <SAIplt:log_dest SAIplt:type="logDest-type">SAI_LOG_SYSLOG</SAIplt:log_dest>
     </SAIplt:Logging>
     <SAIplt:Features-using-acl>
       <SAIplt:feature SAIplt:type="acl-feature-name-type">control-acl</SAIplt:feature>
-      <SAIplt:feature-priority SAIplt:type="feature-priority-type">2</SAIplt:feature-priority>
+      <SAIplt:feature-priority SAIplt:type="feature-priority-type">3</SAIplt:feature-priority>
       <SAIplt:Ingress>
         <SAIplt:ingress-stage SAIplt:type="ingress-acl-stage-type">IPCL0</SAIplt:ingress-stage>
         <SAIplt:hit-number SAIplt:type="hit-number-type">1</SAIplt:hit-number>
@@ -420,7 +454,7 @@
     </SAIplt:Features-using-acl>
     <SAIplt:Features-using-acl>
       <SAIplt:feature SAIplt:type="acl-feature-name-type">port-sFlow</SAIplt:feature>
-      <SAIplt:feature-priority SAIplt:type="feature-priority-type">3</SAIplt:feature-priority>
+      <SAIplt:feature-priority SAIplt:type="feature-priority-type">4</SAIplt:feature-priority>
       <SAIplt:Ingress>
         <SAIplt:ingress-stage SAIplt:type="ingress-acl-stage-type">IPCL0</SAIplt:ingress-stage>
         <SAIplt:hit-number SAIplt:type="hit-number-type">0</SAIplt:hit-number>
@@ -432,7 +466,7 @@
     </SAIplt:Features-using-acl>
     <SAIplt:Features-using-acl>
       <SAIplt:feature SAIplt:type="acl-feature-name-type">port-counters-ipv4-ipv6</SAIplt:feature>
-      <SAIplt:feature-priority SAIplt:type="feature-priority-type">4</SAIplt:feature-priority>
+      <SAIplt:feature-priority SAIplt:type="feature-priority-type">5</SAIplt:feature-priority>
       <SAIplt:Ingress>
         <SAIplt:ingress-stage SAIplt:type="ingress-acl-stage-type">IPCL0</SAIplt:ingress-stage>
         <SAIplt:hit-number SAIplt:type="hit-number-type">3</SAIplt:hit-number>
@@ -442,5 +476,15 @@
         <SAIplt:hit-number SAIplt:type="hit-number-type">0</SAIplt:hit-number>
       </SAIplt:Egress>
     </SAIplt:Features-using-acl>
+    <SAIplt:Features-using-acl>
+      <SAIplt:feature SAIplt:type="acl-feature-name-type">debug-counter-acl</SAIplt:feature>
+      <SAIplt:feature-priority SAIplt:type="feature-priority-type">2</SAIplt:feature-priority>
+      <SAIplt:Ingress>
+        <SAIplt:ingress-stage SAIplt:type="ingress-acl-stage-type">disabled</SAIplt:ingress-stage>
+      </SAIplt:Ingress>
+      <SAIplt:Egress>
+        <SAIplt:egress-stage SAIplt:type="egress-acl-stage-type">disabled</SAIplt:egress-stage>
+      </SAIplt:Egress>
+    </SAIplt:Features-using-acl>
   </SAIplt:SAI>
 </data>
\ No newline at end of file
diff --git a/platform/marvell/sonic-platform-nokia/7215-a1/modules/nokia_7215_ixs_a1_cpld.c b/platform/marvell/sonic-platform-nokia/7215-a1/modules/nokia_7215_ixs_a1_cpld.c
index 3c0639770..e90715dc3 100644
--- a/platform/marvell/sonic-platform-nokia/7215-a1/modules/nokia_7215_ixs_a1_cpld.c
+++ b/platform/marvell/sonic-platform-nokia/7215-a1/modules/nokia_7215_ixs_a1_cpld.c
@@ -351,13 +351,13 @@ static ssize_t show_temp_event_status(struct device *dev, struct device_attribut
     val = nokia_7215_ixs_a1_cpld_read(data, TEMP_EVENT_STATUS_REG);
     switch (val) {
     case TS1_ALERT_EVENT:
-        reason="ts1";
+        reason="PCB Back";
         break;
     case TS2_ALERT_EVENT:
-        reason="ts2";
+        reason="PCB Front";
         break;
     case TS3_ALERT_EVENT:
-        reason="ts3";
+        reason="PCB Mid";
         break;
     case CPU_TEMP_EVENT:
         reason="cpu";
diff --git a/platform/marvell/sonic-platform-nokia/7215-a1/scripts/nokia-7215-init.sh b/platform/marvell/sonic-platform-nokia/7215-a1/scripts/nokia-7215-init.sh
index a69c871b0..51474c2e0 100644
--- a/platform/marvell/sonic-platform-nokia/7215-a1/scripts/nokia-7215-init.sh
+++ b/platform/marvell/sonic-platform-nokia/7215-a1/scripts/nokia-7215-init.sh
@@ -40,6 +40,9 @@ file_exists() {
 # Install kernel drivers required for i2c bus access
 load_kernel_drivers
 
+# Disable sysrq-trigger
+echo 0 > /proc/sys/kernel/sysrq
+
 #setting up uboot environment
 fw_uboot_env_cfg
 
diff --git a/platform/marvell/sonic-platform-nokia/7215-a1/sonic_platform/chassis.py b/platform/marvell/sonic-platform-nokia/7215-a1/sonic_platform/chassis.py
index 19007a3b4..41d600147 100644
--- a/platform/marvell/sonic-platform-nokia/7215-a1/sonic_platform/chassis.py
+++ b/platform/marvell/sonic-platform-nokia/7215-a1/sonic_platform/chassis.py
@@ -271,8 +271,11 @@ def get_reboot_cause(self):
             reboot_cause=(ChassisBase.REBOOT_CAUSE_THERMAL_OVERLOAD_OTHER, thermal)
         else:
             reboot_cause=(ChassisBase.REBOOT_CAUSE_NON_HARDWARE, None)
-        #unmask temperature event    
+
+        #Log reboot cause and unmask temperature event    
+        sonic_logger.log_notice("Reboot-cause reported by platform - {}".format(reboot_cause))
         self._write_sysfs_file(CPLD_DIR+"temp_event_mask", 0)
+
         return reboot_cause
 
     def get_watchdog(self):
diff --git a/platform/marvell/sonic-platform-nokia/7215-a1/sonic_platform/fan.py b/platform/marvell/sonic-platform-nokia/7215-a1/sonic_platform/fan.py
index b86370dc0..a8891a51f 100644
--- a/platform/marvell/sonic-platform-nokia/7215-a1/sonic_platform/fan.py
+++ b/platform/marvell/sonic-platform-nokia/7215-a1/sonic_platform/fan.py
@@ -16,8 +16,8 @@
 except ImportError as e:
     raise ImportError(str(e) + "- required module not found")
 
-MAX_IXS7215_FAN_SPEED = 23000
-WORKING_IXS7215_FAN_SPEED = 2300
+MAX_IXS7215_FAN_SPEED = 24000
+WORKING_IXS7215_FAN_SPEED = 2400
 
 
 sonic_logger = logger.Logger('fan')

From 3d47ac1879eaa19a1585b4d0bd40ff267acb28f1 Mon Sep 17 00:00:00 2001
From: Keshav Gupta <keshavg@marvell.com>
Date: Sun, 12 May 2024 07:29:05 +0530
Subject: [PATCH 0557/1115] [innovium]: sai-server bookworm changes for
 innovium (#18848)

Signed-off-by: Keshav Gupta <keshavg@marvell.com>
---
 platform/innovium/docker-saiserver-invm.dep   |  8 ++++
 platform/innovium/docker-saiserver-invm.mk    | 14 +++++++
 .../docker-saiserver-invm/Dockerfile.j2       | 41 +++++++++++++++++++
 .../innovium/docker-saiserver-invm/start.sh   |  5 +++
 .../docker-saiserver-invm/supervisord.conf    | 28 +++++++++++++
 platform/innovium/libsaithrift-dev.dep        | 13 ++++++
 platform/innovium/libsaithrift-dev.mk         |  9 +++-
 platform/innovium/rules.mk                    |  1 +
 8 files changed, 118 insertions(+), 1 deletion(-)
 create mode 100644 platform/innovium/docker-saiserver-invm.dep
 create mode 100644 platform/innovium/docker-saiserver-invm.mk
 create mode 100644 platform/innovium/docker-saiserver-invm/Dockerfile.j2
 create mode 100755 platform/innovium/docker-saiserver-invm/start.sh
 create mode 100644 platform/innovium/docker-saiserver-invm/supervisord.conf
 create mode 100644 platform/innovium/libsaithrift-dev.dep

diff --git a/platform/innovium/docker-saiserver-invm.dep b/platform/innovium/docker-saiserver-invm.dep
new file mode 100644
index 000000000..cf8cc4b6b
--- /dev/null
+++ b/platform/innovium/docker-saiserver-invm.dep
@@ -0,0 +1,8 @@
+DPATH       := $($(DOCKER_SAISERVER_INVM)_PATH)
+DEP_FILES   := $(SONIC_COMMON_FILES_LIST) platform/innovium/docker-saiserver-invm.mk platform/innovium/docker-saiserver-invm.dep
+DEP_FILES   += $(SONIC_COMMON_BASE_FILES_LIST)
+DEP_FILES   += $(shell git ls-files $(DPATH))
+
+$(DOCKER_SAISERVER_INVM)_CACHE_MODE  := GIT_CONTENT_SHA
+$(DOCKER_SAISERVER_INVM)_DEP_FLAGS   := $(SONIC_COMMON_FLAGS_LIST)
+$(DOCKER_SAISERVER_INVM)_DEP_FILES   := $(DEP_FILES)
diff --git a/platform/innovium/docker-saiserver-invm.mk b/platform/innovium/docker-saiserver-invm.mk
new file mode 100644
index 000000000..1f30efc6b
--- /dev/null
+++ b/platform/innovium/docker-saiserver-invm.mk
@@ -0,0 +1,14 @@
+# docker image for invm saiserver
+
+DOCKER_SAISERVER_INVM = docker-saiserver$(SAITHRIFT_VER)-invm.gz
+$(DOCKER_SAISERVER_INVM)_PATH = $(PLATFORM_PATH)/docker-saiserver-invm
+$(DOCKER_SAISERVER_INVM)_DEPENDS += $(SAISERVER)
+$(DOCKER_SAISERVER_INVM)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE_BOOKWORM)
+SONIC_DOCKER_IMAGES += $(DOCKER_SAISERVER_INVM)
+
+$(DOCKER_SAISERVER_INVM)_CONTAINER_NAME = saiserver$(SAITHRIFT_VER)
+$(DOCKER_SAISERVER_INVM)_RUN_OPT += --privileged -t
+$(DOCKER_SAISERVER_INVM)_RUN_OPT += -v /host/machine.conf:/etc/machine.conf
+$(DOCKER_SAISERVER_INVM)_RUN_OPT += -v /var/run/docker-saiserver:/var/run/sswsyncd
+$(DOCKER_SAISERVER_INVM)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro
+$(DOCKER_SAISERVER_INVM)_RUN_OPT += -v /host/warmboot:/var/warmboot
diff --git a/platform/innovium/docker-saiserver-invm/Dockerfile.j2 b/platform/innovium/docker-saiserver-invm/Dockerfile.j2
new file mode 100644
index 000000000..c6d0ada17
--- /dev/null
+++ b/platform/innovium/docker-saiserver-invm/Dockerfile.j2
@@ -0,0 +1,41 @@
+{% from "dockers/dockerfile-macros.j2" import install_debian_packages %}
+FROM docker-config-engine-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}}
+
+ARG docker_container_name
+
+## Make apt-get non-interactive
+ENV DEBIAN_FRONTEND=noninteractive
+
+## Pre-install the fundamental packages
+RUN apt-get update \
+ && apt-get -y install  \
+    gdb                 \
+    libboost-atomic1.74.0 \
+    libqt5core5a          \
+    libqt5network5      \
+    libyaml-dev         \
+    libthrift-0.17.0    \
+    binutils
+
+RUN pip3 install numpy
+RUN pip3 install yamlordereddictloader
+
+COPY \
+{% for deb in docker_saiserver_invm_debs.split(' ') -%}
+debs/{{ deb }}{{' '}}
+{%- endfor -%}
+debs/
+
+RUN dpkg_apt() { [ -f $1 ] && { dpkg -i $1 || apt-get -y install -f; } || return 1; } ; \
+{% for deb in docker_saiserver_invm_debs.split(' ') -%}
+dpkg_apt debs/{{ deb }}{{'; '}}
+{%- endfor %}
+
+COPY ["start.sh", "/usr/bin"]
+COPY ["supervisord.conf", "/etc/supervisor/conf.d/"]
+
+## Clean up
+RUN apt-get clean -y; apt-get autoclean -y; apt-get autoremove -y
+RUN rm -rf /debs
+
+ENTRYPOINT ["/usr/local/bin/supervisord"]
diff --git a/platform/innovium/docker-saiserver-invm/start.sh b/platform/innovium/docker-saiserver-invm/start.sh
new file mode 100755
index 000000000..13592e074
--- /dev/null
+++ b/platform/innovium/docker-saiserver-invm/start.sh
@@ -0,0 +1,5 @@
+#!/usr/bin/env bash
+
+rm -f /var/run/rsyslogd.pid
+supervisorctl start rsyslogd
+supervisorctl start saiserver
diff --git a/platform/innovium/docker-saiserver-invm/supervisord.conf b/platform/innovium/docker-saiserver-invm/supervisord.conf
new file mode 100644
index 000000000..ccb107b3d
--- /dev/null
+++ b/platform/innovium/docker-saiserver-invm/supervisord.conf
@@ -0,0 +1,28 @@
+[supervisord]
+logfile_maxbytes=1MB
+logfile_backups=2
+nodaemon=true
+
+[program:start.sh]
+command=/usr/bin/start.sh
+priority=1
+autostart=true
+autorestart=false
+stdout_logfile=syslog
+stderr_logfile=syslog
+
+[program:rsyslogd]
+command=/usr/sbin/rsyslogd -n
+priority=2
+autostart=false
+autorestart=false
+stdout_logfile=syslog
+stderr_logfile=syslog
+
+[program:saiserver]
+command=/usr/sbin/saiserver -p /usr/share/sonic/hwsku/sai.profile -f /usr/share/sonic/hwsku/port_config.ini
+priority=3
+autostart=false
+autorestart=false
+stdout_logfile=syslog
+stderr_logfile=syslog
diff --git a/platform/innovium/libsaithrift-dev.dep b/platform/innovium/libsaithrift-dev.dep
new file mode 100644
index 000000000..f9d75d284
--- /dev/null
+++ b/platform/innovium/libsaithrift-dev.dep
@@ -0,0 +1,13 @@
+#DPKG FRK
+SPATH       := $($(LIBSAITHRIFT_DEV)_SRC_PATH)
+DEP_FILES   := $(SONIC_COMMON_FILES_LIST) platform/innovium/libsaithrift-dev.mk platform/innovium/libsaithrift-dev.dep
+DEP_FILES   += $(SONIC_COMMON_BASE_FILES_LIST)
+SMDEP_PATHS := $(SPATH)  $(SPATH)/bm/behavioral-model  $(SPATH)/test/ptf  $(SPATH)/test/saithrift/ctypesgen
+$(foreach path, $(SMDEP_PATHS), $(eval $(path) :=$(filter-out $(SMDEP_PATHS),$(addprefix $(path)/, $(shell cd $(path) &&  git ls-files | grep -Ev " " )))))
+
+$(LIBSAITHRIFT_DEV)_CACHE_MODE  := GIT_CONTENT_SHA
+$(LIBSAITHRIFT_DEV)_DEP_FLAGS   := $(SONIC_COMMON_FLAGS_LIST)
+$(LIBSAITHRIFT_DEV)_DEP_FILES   := $(DEP_FILES)
+$(LIBSAITHRIFT_DEV)_SMDEP_FILES := $(foreach path, $(SMDEP_PATHS), $($(path)))
+$(LIBSAITHRIFT_DEV)_SMDEP_PATHS := $(SMDEP_PATHS)
+
diff --git a/platform/innovium/libsaithrift-dev.mk b/platform/innovium/libsaithrift-dev.mk
index ebc573e50..2a8b6bf13 100755
--- a/platform/innovium/libsaithrift-dev.mk
+++ b/platform/innovium/libsaithrift-dev.mk
@@ -13,8 +13,15 @@ $(LIBSAITHRIFT_DEV)_RDEPENDS += $(INVM_HSAI)
 endif
 $(LIBSAITHRIFT_DEV)_DEPENDS += $(LIBSAIMETADATA) $(LIBSAIMETADATA_DEV)
 $(LIBSAITHRIFT_DEV)_RDEPENDS += $(LIBSAIMETADATA) $(INVM_LIBSAI) $(INVM_SHELL)
+SONIC_DPKG_DEBS += $(LIBSAITHRIFT_DEV)
 
 PYTHON_SAITHRIFT = python-saithrift$(SAITHRIFT_VER)_$(SAI_VER)_$(CONFIGURED_ARCH).deb
 $(eval $(call add_extra_package,$(LIBSAITHRIFT_DEV),$(PYTHON_SAITHRIFT)))
 
-SONIC_DPKG_DEBS += $(LIBSAITHRIFT_DEV)
+SAISERVER = saiserver$(SAITHRIFT_VER)_$(SAI_VER)_$(CONFIGURED_ARCH).deb
+$(SAISERVER)_RDEPENDS += $(LIBSAITHRIFT_DEV) $(INVM_LIBSAI) $(INVM_HSAI) $(INVM_SHELL)
+$(eval $(call add_extra_package,$(LIBSAITHRIFT_DEV),$(SAISERVER)))
+
+SAISERVER_DBG = saiserver$(SAITHRIFT_VER)-dbg_$(SAI_VER)_$(CONFIGURED_ARCH).deb
+$(SAISERVER_DBG)_RDEPENDS += $(SAISERVER)
+$(eval $(call add_extra_package,$(LIBSAITHRIFT_DEV),$(SAISERVER_DBG)))
diff --git a/platform/innovium/rules.mk b/platform/innovium/rules.mk
index dcf7f079f..906d0619d 100755
--- a/platform/innovium/rules.mk
+++ b/platform/innovium/rules.mk
@@ -6,6 +6,7 @@ include $(PLATFORM_PATH)/platform-modules-marvell.mk
 include $(PLATFORM_PATH)/docker-syncd-invm.mk
 include $(PLATFORM_PATH)/docker-syncd-invm-rpc.mk
 include $(PLATFORM_PATH)/one-image.mk
+include $(PLATFORM_PATH)/docker-saiserver-invm.mk
 include $(PLATFORM_PATH)/libsaithrift-dev.mk
 include $(PLATFORM_PATH)/python-saithrift.mk
 

From 4d4b1d4c4912d22df169f06966ab0accef9c8414 Mon Sep 17 00:00:00 2001
From: "Marty Y. Lok" <76118573+mlok-nokia@users.noreply.github.com>
Date: Sat, 11 May 2024 22:01:27 -0400
Subject: [PATCH 0558/1115] [Nokia][chassis] modify Nokia-IXR7250E-36x400G
 platform specified reboot to allow SUP to log expected/unepected
 midplane/module connectivity msg (#18805)

Why I did it
For Linecard expected and unexpected reboot, Supervisor needs to log a expected and unexpected lost connectivity message. After the new mechanism has been introduced by PRs. For Nokia-IXR7250E-36x600G linecard, it requires to handle missing heartbeat reboot is unexpected reboot for SUP. Issue #18540

Work item tracking
Microsoft ADO (number only):
How I did it
On Nokia-IXR7250E-36x400G platform, missing heartbeat reboot also call the "sudo reboot" which creates a CHASSIS_MODULE_REBOOT_INFO_TABLE entry expected reboot on SUP. Since heartbeat reboot is unexpected reboot, it requires to modify the platform_reboot check if it is missing heart reboot, then remove the CHASSIS_MODULE_REBOOT_INFO_TABLE entry on the SUP. So that, SUP can log the unexpected log.

How to verify it
Simulated the missing heartbeat reboot on the linecard, then, verify the log message on SUP as below
Apr 25 19:50:19.286081 ixre-cpm-chassis7 WARNING pmon#chassisd: Module LINE-CARD0 went off-line!
Apr 25 19:50:22.549416 ixre-cpm-chassis7 WARNING pmon#chassisd: Unexpected: Module LINE-CARD0 lost midplane connectivity.


Signed-off-by: mlok <marty.lok@nokia.com>
---
 .../platform_reboot                           | 23 +++++++++++++++----
 1 file changed, 19 insertions(+), 4 deletions(-)

diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/platform_reboot b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/platform_reboot
index eb0bebef0..454a14c5a 100755
--- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/platform_reboot
+++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/platform_reboot
@@ -1,12 +1,27 @@
 #!/bin/bash
 
+DEVICE_MGR_REBOOT_FILE=/tmp/device_mgr_reboot
+REBOOT_CAUSE_FILE=/host/reboot-cause/reboot-cause.txt
+DEVICE_REBOOT_CAUSE_FILE=/etc/opt/srlinux/reboot-cause.txt
+kHeartbeatLostRebootCause="Heartbeat with the Supervisor card lost"
+DEVICE_DETAILS_FILE="/etc/opt/srlinux/devices/hw_details.json"
+
+ungraceful_reboot_handle()
+{
+    str=$(grep "$kHeartbeatLostRebootCause" $DEVICE_REBOOT_CAUSE_FILE 2> /dev/null)
+    status=$?
+    if [ $status -eq 0 ]; then
+        slot_num=$(jq -r '.slot_num' $DEVICE_DETAILS_FILE 2>/dev/null)
+        slot_num=$((slot_num - 1))
+        sonic-db-cli CHASSIS_STATE_DB del "CHASSIS_MODULE_REBOOT_INFO_TABLE|LINE-CARD${slot_num}"
+    fi
+}
 update_reboot_cause()
 {
-    DEVICE_MGR_REBOOT_FILE=/tmp/device_mgr_reboot
-    REBOOT_CAUSE_FILE=/host/reboot-cause/reboot-cause.txt
-    DEVICE_REBOOT_CAUSE_FILE=/etc/opt/srlinux/reboot-cause.txt
     if [ -e  $DEVICE_MGR_REBOOT_FILE ]; then
         if [ -e $DEVICE_REBOOT_CAUSE_FILE ]; then
+            # reomve the REBOOT_INFO_TABLE entry for unpexected reboot
+            ungraceful_reboot_handle
             cp -f $DEVICE_REBOOT_CAUSE_FILE $REBOOT_CAUSE_FILE
         fi
         rm -f $DEVICE_MGR_REBOOT_FILE
@@ -18,7 +33,7 @@ update_reboot_cause()
 }
 
 echo "Disable all SFPs"
-python3 -c 'import sonic_platform.platform; platform_chassis = sonic_platform.platform.Platform().get_chassis(); platform_chassis.tx_disable_all_sfps()'
+python3 -c 'import sonic_platform.platform; platform_chassis = sonic_platform.platform.Platform().get_chassis(); platform_chassis.tx_disable_all_sfps()' &
 sleep 3
 
 # update the reboot_cuase file when reboot is trigger by device-mgr

From 2e97051809531ebe11040f093b94f67f049bf99e Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sun, 12 May 2024 16:01:15 +0800
Subject: [PATCH 0559/1115] [submodule] Update submodule sonic-platform-common
 to the latest HEAD automatically (#18840)

#### Why I did it
src/sonic-platform-common
```
* 0362460 - (HEAD -> master, origin/master, origin/HEAD) fix: using PAGE_LENGTH instead of INIT_OFFSET (#452) (4 days ago) [Qingxiao Ren]
* 16ab403 - Update Innolight package for mock test (#461) (4 days ago) [Anoop Kamath]
* 50a75a5 - Aligning SONiC code with sff8024 spec (#457) (5 days ago) [Tomer Shalvi]
* 655a5ff - Handle page select and remote access check after changing SFP target (#462) (9 days ago) [mihirpat1]
* de16e50 - DPinit timeout seen for Innolight transceiver during CMIS init + transceiver OIR causing CMIS init failure (#450) (11 days ago) [Anoop Kamath]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-platform-common | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-platform-common b/src/sonic-platform-common
index 4163365b9..036246032 160000
--- a/src/sonic-platform-common
+++ b/src/sonic-platform-common
@@ -1 +1 @@
-Subproject commit 4163365b97a8a2cb80dc895dcada1a51b5347fd3
+Subproject commit 036246032e0012910b71e1986b74100dbd8142a3

From 3ef49c97df1aeccb44bdfd6eb8e7bcc34c62f960 Mon Sep 17 00:00:00 2001
From: Sai Kiran <110003254+opcoder0@users.noreply.github.com>
Date: Sun, 12 May 2024 18:37:38 +1000
Subject: [PATCH 0560/1115] [docker-ptf]: Changes to build Python 3 docker-ptf
 (#18909)

Why I did it
As Python 2 has reached EOL it is important to migrate all PTF tests to Python 3. The current docker-ptf image contains both Python 2 and Python 3. This PR adds configuration option to build docker-ptf image with its current contents of both Python 2 and 3 by setting SONIC_PTF_ENV_PY_VER to mixed (default value). Or building a Python 3 only image by setting SONIC_PTF_ENV_PY_VER to py3.

Once all the tests are fully migrated to Python 3 the older docker-ptf container with Python 2 will only be used for older releases and newer releases can use Python 3 only PTF docker image. The main branch's setting can be updated to use py3 image.

How I did it
Add SONIC_PTF_ENV_PY_VER configuration variable with mixed and py3 values.
platform/vs/docker-ptf.mk and slave.mk uses the configuration value to set dependencies and build the image
make target/docker-ptf.gz builds a Python 2 and 3 or Python 3 only image based on the configuration value.

How to verify it
make USERNAME=admin SONIC_BUILD_JOBS=4 BUILD_MULTIASIC_KVM=y INCLUDE_DHCP_SERVER=y  target/docker-ptf.gz
Which release branch to backport (provide reason below if selected)
Not applicable

Tested branch (Please provide the tested image version)
None. Individual PTF scripts that have been moved to Python 3 (from the main branch) will be tested.

Description for the changelog

[docker-ptf]: Changes to build Python 3 docker-ptf

Adds SONIC_PTF_ENV_PY_VER to build current docker-ptf with Python 2 and 3 or just Python 3
Update dockers/docker-ptf/Dockerfile.j2 to install Python 3 only and required packages
---
 Makefile.work                    |  5 +++-
 dockers/docker-ptf/Dockerfile.j2 | 39 +++++++++++++++++++++++++++++---
 platform/vs/docker-ptf.mk        |  4 ++++
 rules/config                     |  4 ++++
 slave.mk                         |  5 ++++
 5 files changed, 53 insertions(+), 4 deletions(-)

diff --git a/Makefile.work b/Makefile.work
index bece7e56c..d66774ddc 100644
--- a/Makefile.work
+++ b/Makefile.work
@@ -61,7 +61,9 @@
 #  *             value to anything will enable it
 #  *             Default: unset
 #  *             Value: y
-#
+#  * SONIC_PTF_ENV_PY_VER: Python version for PTF image
+#  *                       Default: mixed
+#  *                       Values: mixed,py3
 ###############################################################################
 
 SHELL = /bin/bash
@@ -592,6 +594,7 @@ SONIC_BUILD_INSTRUCTION :=  $(MAKE) \
                            SONIC_OS_VERSION=$(SONIC_OS_VERSION) \
                            PIP_HTTP_TIMEOUT=$(PIP_HTTP_TIMEOUT) \
                            LEGACY_SONIC_MGMT_DOCKER=$(LEGACY_SONIC_MGMT_DOCKER) \
+                           SONIC_PTF_ENV_PY_VER=$(SONIC_PTF_ENV_PY_VER) \
                            $(SONIC_OVERRIDE_BUILD_VARS)
 
 .PHONY: sonic-slave-build sonic-slave-bash init reset
diff --git a/dockers/docker-ptf/Dockerfile.j2 b/dockers/docker-ptf/Dockerfile.j2
index 809b1474d..d026b708b 100644
--- a/dockers/docker-ptf/Dockerfile.j2
+++ b/dockers/docker-ptf/Dockerfile.j2
@@ -3,8 +3,10 @@
 FROM {{ prefix }}multiarch/debian-debootstrap:armhf-stretch
 {% elif CONFIGURED_ARCH == "arm64" and MULTIARCH_QEMU_ENVIRON == "y" %}
 FROM {{ prefix }}multiarch/debian-debootstrap:arm64-stretch
+{% elif PTF_ENV_PY_VER == "mixed" %}
+FROM {{ prefix}}debian:buster
 {% else %}
-FROM {{ prefix }}debian:buster
+FROM {{ prefix }}debian:bullseye
 {% endif %}
 
 {% from "dockers/dockerfile-macros.j2" import install_python_wheels, copy_files %}
@@ -12,7 +14,7 @@ FROM {{ prefix }}debian:buster
 USER root
 WORKDIR /root
 
-MAINTAINER Pavel Shirshov
+LABEL maintainer="Pavel Shirshov"
 
 COPY ["sources.list.{{ CONFIGURED_ARCH }}", "/etc/apt/sources.list"]
 COPY ["no-check-valid-until", "/etc/apt/apt.conf.d"]
@@ -45,18 +47,24 @@ RUN apt-get update          \
         cmake               \
         libqt5core5a        \
         libqt5network5      \
+{% if PTF_ENV_PY_VER == "mixed" %}
         libboost-atomic1.71.0 \
+{% else %}
+        libboost-atomic1.74.0 \
+{% endif %}
         less                \
         git                 \
         iputils-ping        \
         hping3              \
         curl                \
         tmux                \
+{% if PTF_ENV_PY_VER == "mixed" %}
         python              \
         python-dev          \
         python-libpcap      \
         python-scapy        \
         python-six          \
+{% endif %}
         python3             \
         python3-venv        \
         python3-pip         \
@@ -64,7 +72,10 @@ RUN apt-get update          \
         python3-scapy       \
         python3-six         \
         libpcap-dev         \
+# TODO check if tacacs+ is required by tests
+{% if PTF_ENV_PY_VER == "mixed" %}
         tacacs+             \
+{% endif %}
         rsyslog             \
         ntp                 \
         ntpstat             \
@@ -77,12 +88,20 @@ RUN apt-get update          \
         iproute2            \
         wireshark-common
 
+{% if PTF_ENV_PY_VER == "py3" %}
+RUN update-alternatives --install /usr/bin/python python /usr/bin/python3 1 \
+    && update-alternatives --install /usr/bin/pdb pdb /usr/bin/pdb3 1 \
+    && update-alternatives --install /usr/bin/pydoc pydoc /usr/bin/pydoc3 1 \
+    && update-alternatives --install /usr/bin/pygettext pygettext /usr/bin/pygettext3 1
+{% endif %}
+
 # Install all python modules from pypi. python-scapy is exception, ptf debian package requires python-scapy
 # TODO: Clean up this step
 RUN rm -rf /debs \
     && apt-get -y autoclean \
     && apt-get -y autoremove \
     && rm -rf /var/lib/apt/lists/* \
+{% if PTF_ENV_PY_VER == "mixed" %}
     && wget --https-only https://bootstrap.pypa.io/pip/2.7/get-pip.py \
     && python get-pip.py \
     && rm -f get-pip.py \
@@ -94,6 +113,7 @@ RUN rm -rf /debs \
     && python setup.py install \
     && cd .. \
     && rm -fr scapy-vxlan \
+{% endif %}
     && git clone https://github.com/sflow/sflowtool \
     && cd sflowtool \
     && ./boot.sh \
@@ -121,6 +141,7 @@ RUN rm -rf /debs \
     && cd ../..            \
     && rm -fr nanomsg-1.0.0 \
     && rm -f 1.0.0.tar.gz  \
+{% if PTF_ENV_PY_VER == "mixed" %}
     && pip install cffi    \
     && pip install nnpy    \
     && pip install dpkt    \
@@ -134,6 +155,7 @@ RUN rm -rf /debs \
     && pip install unittest-xml-reporting \
     && pip install pyrasite \
     && pip install retrying \
+{% endif %}
     && mkdir -p /opt       \
     && cd /opt             \
     && wget https://raw.githubusercontent.com/p4lang/ptf/master/ptf_nn/ptf_nn_agent.py
@@ -147,10 +169,14 @@ ENV PATH="$VIRTUAL_ENV/bin:$PATH"
 
 ENV LANG=C.UTF-8 LC_ALL=C.UTF-8 PYTHONIOENCODING=UTF-8
 
+{% if PTF_ENV_PY_VER == "mixed" %}
 RUN python3 -m pip install --upgrade --ignore-installed pip
+{% else %}
+RUN pip install --upgrade --ignore-installed pip
+{% endif %}
 
 # Install all python modules from pypi. python3-scapy is exception, ptf debian package requires python3-scapy
-RUN python3 -m pip install setuptools \
+RUN pip3 install setuptools \
     && pip3 install supervisor \
     && pip3 install ipython==5.4.1 \
     && pip3 install Cython \
@@ -200,9 +226,11 @@ COPY supervisord.conf /etc/supervisor/
 COPY conf.d/ /etc/supervisor/conf.d/
 COPY ptf_tgen.sh /ptf_tgen/
 
+{% if PTF_ENV_PY_VER == "mixed" %}
 # Move tcpdump into /usr/bin Otherwise it's impossible to run tcpdump due to a docker bug
 RUN mv /usr/sbin/tcpdump /usr/bin/tcpdump
 RUN ln -s /usr/bin/tcpdump /usr/sbin/tcpdump
+{% endif %}
 
 RUN mkdir -p /var/log/supervisor
 
@@ -211,7 +239,12 @@ RUN git clone https://github.com/lguohan/gnxi.git \
     && cd gnxi \
     && git checkout 3adf8b9 \
     && cd gnmi_cli_py \
+{% if PTF_ENV_PY_VER == "mixed" %}
     && pip install -r requirements.txt
+{% else %}
+    && cat requirements.txt | grep -v futures > /tmp/requirements.txt \
+    && pip3 install -r /tmp/requirements.txt
+{% endif %}
 
 COPY \
 {% for deb in docker_ptf_debs.split(' ') -%}
diff --git a/platform/vs/docker-ptf.mk b/platform/vs/docker-ptf.mk
index ef102be96..1c66f8b88 100644
--- a/platform/vs/docker-ptf.mk
+++ b/platform/vs/docker-ptf.mk
@@ -3,6 +3,10 @@
 DOCKER_PTF = docker-ptf.gz
 $(DOCKER_PTF)_PYTHON_WHEELS += $(PTF_PY3)
 $(DOCKER_PTF)_PATH = $(DOCKERS_PATH)/docker-ptf
+ifeq ($(SONIC_PTF_ENV_PY_VER), mixed)
 $(DOCKER_PTF)_DEPENDS += $(LIBTHRIFT) $(PYTHON_THRIFT) $(PTF) $(PYTHON_SAITHRIFT)
+else
+$(DOCKER_PTF)_DEPENDS += $(LIBTHRIFT_0_14_1) $(PYTHON3_THRIFT_0_14_1) $(PYTHON_SAITHRIFT)
+endif
 SONIC_DOCKER_IMAGES += $(DOCKER_PTF)
 SONIC_BUSTER_DOCKERS += $(DOCKER_PTF)
diff --git a/rules/config b/rules/config
index e52eeae4c..2996d0f46 100644
--- a/rules/config
+++ b/rules/config
@@ -319,3 +319,7 @@ PIP_HTTP_TIMEOUT ?= 60
 
 # BUILD_REDUCE_IMAGE_SIZE - reduce the image size as much as possbible
 BUILD_REDUCE_IMAGE_SIZE = n
+
+# SONIC_PTF_ENV_PY_VER - SONiC PTF test Python version. Set to 'mixed' to build the 
+# image with both Python 2 and 3. Set to 'py3' to build a Python 3 only image
+SONIC_PTF_ENV_PY_VER = mixed
diff --git a/slave.mk b/slave.mk
index eb537e740..c6c0e32e6 100644
--- a/slave.mk
+++ b/slave.mk
@@ -75,6 +75,9 @@ else
 ENABLE_PY2_MODULES = y
 endif
 
+# Python version for PTF image
+PTF_ENV_PY_VER = $(if $(SONIC_PTF_ENV_PY_VER),$(SONIC_PTF_ENV_PY_VER),mixed)
+
 export BUILD_NUMBER
 export BUILD_TIMESTAMP
 export SONIC_IMAGE_VERSION
@@ -94,6 +97,7 @@ export MIRROR_SNAPSHOT
 export SONIC_OS_VERSION
 export FILES_PATH
 export PROJECT_ROOT
+export PTF_ENV_PY_VER
 
 ###############################################################################
 ## Utility rules
@@ -461,6 +465,7 @@ $(info "CROSS_BUILD_ENVIRON"             : "$(CROSS_BUILD_ENVIRON)")
 $(info "GZ_COMPRESS_PROGRAM"             : "$(GZ_COMPRESS_PROGRAM)")
 $(info "LEGACY_SONIC_MGMT_DOCKER"        : "$(LEGACY_SONIC_MGMT_DOCKER)")
 $(info "INCLUDE_EXTERNAL_PATCHES"        : "$(INCLUDE_EXTERNAL_PATCHES)")
+$(info "PTF_ENV_PY_VER"                  : "$(PTF_ENV_PY_VER)")
 $(info )
 else
 $(info SONiC Build System for $(CONFIGURED_PLATFORM):$(CONFIGURED_ARCH))

From 71eb9b9162599dc05edb90f4a5e1ca25f10ca6c0 Mon Sep 17 00:00:00 2001
From: Bob Chu <79439153+qnos@users.noreply.github.com>
Date: Sun, 12 May 2024 16:45:19 +0800
Subject: [PATCH 0561/1115] [devices]: Seastone fix issue #18767 psu fan speed
 issue (#18787)

Fix issue #18787 fan information could not been shown issue.

How I did it
Add psu fan get_target_speed api support.

How to verify it
Use `show platform fan` in branch 202311.
---
 device/celestica/x86_64-cel_seastone-r0/sonic_platform/fan.py | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/device/celestica/x86_64-cel_seastone-r0/sonic_platform/fan.py b/device/celestica/x86_64-cel_seastone-r0/sonic_platform/fan.py
index 00785dd8f..9269dbe26 100644
--- a/device/celestica/x86_64-cel_seastone-r0/sonic_platform/fan.py
+++ b/device/celestica/x86_64-cel_seastone-r0/sonic_platform/fan.py
@@ -188,6 +188,8 @@ def get_target_speed(self):
             sysfs_path = sysfs_path.format(fan_index[self.fan_tray_index])
             pwm = self._api_helper.read_txt_file(sysfs_path)
             target = round(int(pwm) / 255 * 100.0)
+        else:
+            return self.get_speed()
 
         return target
 

From 71001711c7733dbd3ddb1d5fb2428b4433ee1939 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sun, 12 May 2024 16:47:54 +0800
Subject: [PATCH 0562/1115] [ci/build]: Upgrade SONiC package versions (#18786)

---
 .../versions-deb-bookworm                     | 11 +++
 .../build-sonic-slave-bookworm/versions-py3   |  5 +-
 .../versions-deb-bullseye                     | 17 ----
 .../versions-deb-bullseye-arm64               |  1 -
 .../build-sonic-slave-bullseye/versions-py3   |  3 +-
 files/build/versions/default/versions-docker  | 36 ++++----
 files/build/versions/default/versions-git     | 14 +--
 files/build/versions/default/versions-mirror  | 37 ++++----
 files/build/versions/default/versions-web     | 61 ++++++-------
 .../versions-deb-bookworm                     |  4 +-
 .../dockers/docker-base-bookworm/versions-py3 |  4 +-
 .../versions-deb-bullseye                     |  3 +-
 .../dockers/docker-base-bullseye/versions-py3 |  4 +-
 .../docker-base-buster/versions-deb-buster    |  2 +-
 .../dockers/docker-base-buster/versions-py3   |  2 +-
 .../versions-deb-bookworm                     |  6 +-
 .../versions-mirror                           |  1 -
 .../versions-py3                              |  2 +-
 .../versions-deb-bullseye                     |  6 +-
 .../versions-py3                              |  2 +-
 .../versions-deb-buster                       |  5 +-
 .../docker-database/versions-deb-bookworm     |  2 +-
 .../dockers/docker-database/versions-mirror   |  1 -
 .../docker-dhcp-relay/versions-deb-bookworm   |  2 +-
 .../dockers/docker-dhcp-relay/versions-mirror |  1 -
 .../dockers/docker-dhcp-relay/versions-py3    |  2 +-
 .../docker-eventd/versions-deb-bookworm       |  2 +-
 .../dockers/docker-eventd/versions-mirror     |  1 -
 .../docker-fpm-frr/versions-deb-bullseye      | 10 +--
 .../versions-deb-bullseye                     |  8 +-
 .../versions-deb-bullseye                     |  7 +-
 .../docker-gbsyncd-vs/versions-deb-bookworm   | 35 ++++++++
 .../dockers/docker-lldp/versions-deb-bookworm | 37 ++++++++
 .../dockers/docker-lldp/versions-deb-bullseye | 34 -------
 .../docker-macsec/versions-deb-bookworm       |  2 +-
 .../dockers/docker-macsec/versions-mirror     |  1 -
 .../dockers/docker-mux/versions-deb-bookworm  |  2 +-
 .../dockers/docker-mux/versions-mirror        |  1 -
 .../dockers/docker-nat/versions-deb-bookworm  | 38 ++++++++
 .../dockers/docker-nat/versions-deb-bullseye  | 35 --------
 .../docker-orchagent/versions-deb-bookworm    |  3 +-
 .../dockers/docker-orchagent/versions-mirror  |  1 -
 .../dockers/docker-orchagent/versions-py3     |  1 +
 .../versions-deb-bookworm                     |  2 +-
 .../docker-platform-monitor/versions-mirror   |  1 -
 .../dockers/docker-ptf/versions-deb-buster    | 26 +++---
 .../versions-deb-bookworm                     |  2 +-
 .../docker-router-advertiser/versions-mirror  |  1 -
 .../docker-sflow/versions-deb-bullseye        |  2 +-
 .../dockers/docker-snmp/versions-deb-bookworm | 43 +++++++++
 .../dockers/docker-snmp/versions-deb-bullseye | 40 ---------
 .../docker-sonic-gnmi/versions-deb-bullseye   |  2 +-
 .../docker-sonic-vs/versions-deb-bullseye     | 14 +--
 .../dockers/docker-sonic-vs/versions-py3      |  7 +-
 .../versions-mirror                           |  1 -
 .../versions-deb-bullseye                     |  8 +-
 .../versions-deb-bullseye                     |  2 +-
 .../versions-deb-bullseye                     |  8 +-
 .../docker-syncd-brcm/versions-deb-bullseye   |  2 +-
 .../versions-deb-bullseye                     |  8 +-
 .../docker-syncd-centec/versions-deb-bullseye |  2 +-
 .../versions-deb-bookworm                     | 18 ++++
 .../docker-syncd-mlnx-rpc/versions-py3        |  3 +-
 .../docker-syncd-mlnx/versions-deb-bookworm   | 74 +++++++++++++++
 .../dockers/docker-syncd-mlnx/versions-py3    |  7 +-
 .../versions-deb-bookworm-arm64               | 24 +++++
 .../versions-deb-bookworm-armhf               | 24 +++++
 .../docker-syncd-vs/versions-deb-bookworm     | 35 ++++++++
 .../docker-teamd/versions-deb-bookworm        |  2 +-
 .../dockers/docker-teamd/versions-mirror      |  1 -
 .../versions-deb-bookworm                     | 76 +++++++++-------
 .../versions-deb-bookworm-armhf               |  6 +-
 .../sonic-slave-bookworm/versions-mirror      |  1 -
 .../dockers/sonic-slave-bookworm/versions-py3 |  5 +-
 .../versions-deb-bullseye                     | 63 ++++++-------
 .../versions-deb-bullseye-armhf               |  6 +-
 .../dockers/sonic-slave-bullseye/versions-py3 |  4 +-
 .../sonic-slave-buster/versions-deb-buster    | 90 ++++++++++---------
 .../versions-deb-buster-armhf                 | 19 ++++
 .../dockers/sonic-slave-buster/versions-py3   |  2 +-
 .../versions/host-image/versions-deb-bookworm | 23 +++--
 files/build/versions/host-image/versions-py3  |  8 +-
 82 files changed, 678 insertions(+), 436 deletions(-)
 delete mode 100644 files/build/versions/build/build-sonic-slave-bullseye/versions-deb-bullseye-arm64
 delete mode 100644 files/build/versions/dockers/docker-config-engine-bookworm/versions-mirror
 delete mode 100644 files/build/versions/dockers/docker-database/versions-mirror
 delete mode 100644 files/build/versions/dockers/docker-dhcp-relay/versions-mirror
 delete mode 100644 files/build/versions/dockers/docker-eventd/versions-mirror
 create mode 100644 files/build/versions/dockers/docker-gbsyncd-vs/versions-deb-bookworm
 create mode 100644 files/build/versions/dockers/docker-lldp/versions-deb-bookworm
 delete mode 100644 files/build/versions/dockers/docker-lldp/versions-deb-bullseye
 delete mode 100644 files/build/versions/dockers/docker-macsec/versions-mirror
 delete mode 100644 files/build/versions/dockers/docker-mux/versions-mirror
 create mode 100644 files/build/versions/dockers/docker-nat/versions-deb-bookworm
 delete mode 100644 files/build/versions/dockers/docker-nat/versions-deb-bullseye
 delete mode 100644 files/build/versions/dockers/docker-orchagent/versions-mirror
 delete mode 100644 files/build/versions/dockers/docker-platform-monitor/versions-mirror
 delete mode 100644 files/build/versions/dockers/docker-router-advertiser/versions-mirror
 create mode 100644 files/build/versions/dockers/docker-snmp/versions-deb-bookworm
 delete mode 100644 files/build/versions/dockers/docker-snmp/versions-deb-bullseye
 delete mode 100644 files/build/versions/dockers/docker-swss-layer-bookworm/versions-mirror
 create mode 100644 files/build/versions/dockers/docker-syncd-mlnx-rpc/versions-deb-bookworm
 create mode 100644 files/build/versions/dockers/docker-syncd-mlnx/versions-deb-bookworm
 create mode 100644 files/build/versions/dockers/docker-syncd-mrvl/versions-deb-bookworm-arm64
 create mode 100644 files/build/versions/dockers/docker-syncd-mrvl/versions-deb-bookworm-armhf
 create mode 100644 files/build/versions/dockers/docker-syncd-vs/versions-deb-bookworm
 delete mode 100644 files/build/versions/dockers/docker-teamd/versions-mirror
 delete mode 100644 files/build/versions/dockers/sonic-slave-bookworm/versions-mirror

diff --git a/files/build/versions/build/build-sonic-slave-bookworm/versions-deb-bookworm b/files/build/versions/build/build-sonic-slave-bookworm/versions-deb-bookworm
index 36978b689..5f1fcdeb3 100644
--- a/files/build/versions/build/build-sonic-slave-bookworm/versions-deb-bookworm
+++ b/files/build/versions/build/build-sonic-slave-bookworm/versions-deb-bookworm
@@ -1,4 +1,5 @@
 applibs==1.mlnx.4.6.3064
+applibs-dev==1.mlnx.4.6.3064
 kernel-mft-dkms==4.27.0-83
 libdashapi==1.0.0
 libnl-3-200==3.5.0-1
@@ -15,6 +16,7 @@ libsaimetadata==1.0.0
 libsaimetadata-dev==1.0.0
 libsairedis==1.0.0
 libsairedis-dev==1.0.0
+libsaithrift-dev==0.9.4
 libsaivs==1.0.0
 libswsscommon==1.0.0
 libswsscommon-dev==1.0.0
@@ -35,9 +37,18 @@ python3-swsscommon==1.0.0
 python3-yang==1.0.73
 sonic-platform-pddf==1.1
 sonic-platform-pddf-sym==1.1
+sx-acl-helper==1.mlnx.4.6.3064
+sx-acl-helper-dev==1.mlnx.4.6.3064
 sx-complib==1.mlnx.4.6.3064
 sx-complib-dev==1.mlnx.4.6.3064
+sx-examples==1.mlnx.4.6.3064
+sx-examples-dev==1.mlnx.4.6.3064
 sx-gen-utils==1.mlnx.4.6.3064
 sx-gen-utils-dev==1.mlnx.4.6.3064
+sx-hash-calc==1.mlnx.4.6.3064
+sx-obj-desc-lib==1.mlnx.4.6.3064
+sx-obj-desc-lib-dev==1.mlnx.4.6.3064
 sxd-libs==1.mlnx.4.6.3064
 sxd-libs-dev==1.mlnx.4.6.3064
+wjh-libs==1.mlnx.4.6.3064
+wjh-libs-dev==1.mlnx.4.6.3064
diff --git a/files/build/versions/build/build-sonic-slave-bookworm/versions-py3 b/files/build/versions/build/build-sonic-slave-bookworm/versions-py3
index 31d944ddd..8007697ea 100644
--- a/files/build/versions/build/build-sonic-slave-bookworm/versions-py3
+++ b/files/build/versions/build/build-sonic-slave-bookworm/versions-py3
@@ -8,8 +8,8 @@ deepdiff==6.2.2
 docker==7.0.0
 docker-image-py==0.1.12
 enlighten==1.12.4
-filelock==3.13.4
-freezegun==1.4.0
+filelock==3.14.0
+freezegun==1.5.0
 ijson==3.2.3
 ipaddress==1.0.23
 jsondiff==2.0.0
@@ -31,6 +31,7 @@ pycairo==1.26.0
 pycparser==2.22
 pynacl==1.5.0
 pyroute2==0.5.19
+python-arptable==0.0.2
 pyyaml==6.0.1
 semantic-version==2.10.0
 systemd-python==235
diff --git a/files/build/versions/build/build-sonic-slave-bullseye/versions-deb-bullseye b/files/build/versions/build/build-sonic-slave-bullseye/versions-deb-bullseye
index 50350dd3e..3709687ca 100644
--- a/files/build/versions/build/build-sonic-slave-bullseye/versions-deb-bullseye
+++ b/files/build/versions/build/build-sonic-slave-bullseye/versions-deb-bullseye
@@ -1,5 +1,3 @@
-applibs==1.mlnx.4.6.3064
-applibs-dev==1.mlnx.4.6.3064
 libdashapi==1.0.0
 libnl-3-200==3.5.0-1
 libnl-3-dev==3.5.0-1
@@ -40,19 +38,4 @@ python3-swsscommon==1.0.0
 python3-yang==1.0.73
 sonic-mgmt-common==1.0.0
 sonic-mgmt-common-codegen==1.0.0
-sx-acl-helper==1.mlnx.4.6.3064
-sx-acl-helper-dev==1.mlnx.4.6.3064
-sx-complib==1.mlnx.4.6.3064
-sx-complib-dev==1.mlnx.4.6.3064
-sx-examples==1.mlnx.4.6.3064
-sx-examples-dev==1.mlnx.4.6.3064
-sx-gen-utils==1.mlnx.4.6.3064
-sx-gen-utils-dev==1.mlnx.4.6.3064
-sx-hash-calc==1.mlnx.4.6.3064
-sx-obj-desc-lib==1.mlnx.4.6.3064
-sx-obj-desc-lib-dev==1.mlnx.4.6.3064
-sxd-libs==1.mlnx.4.6.3064
-sxd-libs-dev==1.mlnx.4.6.3064
 thrift-compiler==0.11.0-4
-wjh-libs==1.mlnx.4.6.3064
-wjh-libs-dev==1.mlnx.4.6.3064
diff --git a/files/build/versions/build/build-sonic-slave-bullseye/versions-deb-bullseye-arm64 b/files/build/versions/build/build-sonic-slave-bullseye/versions-deb-bullseye-arm64
deleted file mode 100644
index f49254536..000000000
--- a/files/build/versions/build/build-sonic-slave-bullseye/versions-deb-bullseye-arm64
+++ /dev/null
@@ -1 +0,0 @@
-libsaivs-dev==1.0.0
diff --git a/files/build/versions/build/build-sonic-slave-bullseye/versions-py3 b/files/build/versions/build/build-sonic-slave-bullseye/versions-py3
index 5f7fde14a..b7b7da383 100644
--- a/files/build/versions/build/build-sonic-slave-bullseye/versions-py3
+++ b/files/build/versions/build/build-sonic-slave-bullseye/versions-py3
@@ -7,7 +7,7 @@ colorful==0.5.6
 docker==7.0.0
 docker-image-py==0.1.12
 enlighten==1.12.4
-filelock==3.13.4
+filelock==3.14.0
 ijson==3.2.3
 ipaddress==1.0.23
 jsondiff==2.0.0
@@ -24,7 +24,6 @@ pycairo==1.26.0
 pycparser==2.22
 pynacl==1.5.0
 pyroute2==0.5.19
-python-arptable==0.0.2
 pyyaml==6.0.1
 semantic-version==2.10.0
 systemd-python==235
diff --git a/files/build/versions/default/versions-docker b/files/build/versions/default/versions-docker
index d13a537ee..c7c706f47 100644
--- a/files/build/versions/default/versions-docker
+++ b/files/build/versions/default/versions-docker
@@ -1,18 +1,18 @@
-amd64:amd64/debian:bookworm==sha256:ada577e24663e2f16bd2aa706bd11d4594f52b9ae08fd3a2156eeefdb8dff1a2
-amd64:amd64/debian:bullseye==sha256:ad47d883924a75f704037e49c71c20ef209fb3ba05be7070322cb45d2e089261
-amd64:amd64/debian:buster==sha256:354013bcb050b68661b9d6038faa63a6bb9f52f559058e31fa6121f6b24e0be1
-amd64:debian:bookworm==sha256:b37bc259c67238d814516548c17ad912f26c3eed48dd9bb54893eafec8739c89
-amd64:debian:bullseye==sha256:26d72b71f88865377988af6f54da9aaa5bed201f39bcee13eb55737016660df2
-amd64:debian:buster==sha256:873743c4eec09ddea0dcac0cda31fce2ff348ed41cd1d5c33ecee7d42f03052f
-arm64:arm64v8/debian:bookworm==sha256:e27b218f4fbed3b1b2769805708bf8c4cb7992287e801c8a38821d8765d02880
-arm64:arm64v8/debian:bullseye==sha256:2e5a4906b6d9aaea56dc705dff91d16b092f3b0d504869f8c66cb5223dfff7c7
-arm64:arm64v8/debian:buster==sha256:5e790baa2535371cf5309af22f2b721bde93bdfa22d9d2121e3ab0ac949a702f
-arm64:debian:bookworm==sha256:b37bc259c67238d814516548c17ad912f26c3eed48dd9bb54893eafec8739c89
-arm64:debian:bullseye==sha256:26d72b71f88865377988af6f54da9aaa5bed201f39bcee13eb55737016660df2
-arm64:debian:buster==sha256:873743c4eec09ddea0dcac0cda31fce2ff348ed41cd1d5c33ecee7d42f03052f
-armhf:arm32v7/debian:bookworm==sha256:72f95924eb348f8dcd1f01a5888ac50a126aa63009dc7705abaeeda2e18f04ea
-armhf:arm32v7/debian:bullseye==sha256:55034733fd35fc50c600430a0e6e59f7fe7c46b2b6630274befe3c631e015968
-armhf:arm32v7/debian:buster==sha256:25da76aea696384d64882d7cb3762ab38e427e868aab9e2efdef25321b923101
-armhf:debian:bookworm==sha256:b37bc259c67238d814516548c17ad912f26c3eed48dd9bb54893eafec8739c89
-armhf:debian:bullseye==sha256:26d72b71f88865377988af6f54da9aaa5bed201f39bcee13eb55737016660df2
-armhf:debian:buster==sha256:873743c4eec09ddea0dcac0cda31fce2ff348ed41cd1d5c33ecee7d42f03052f
+amd64:amd64/debian:bookworm==sha256:40f71cd223a60afc1bac2adf1b204bfabef29cdef725e74993f86098ff87f92f
+amd64:amd64/debian:bullseye==sha256:38fb0f1618bfa65b0cf1dd279293ebc70ef94aab2f2dc49274a2efc6ee29880e
+amd64:amd64/debian:buster==sha256:255eec9d157d35e00a81a45f1e958fd19437d504139e8eb4ea6cc380ea741ed4
+amd64:debian:bookworm==sha256:1aadfee8d292f64b045adb830f8a58bfacc15789ae5f489a0fedcd517a862cb9
+amd64:debian:bullseye==sha256:f860cec7ccaf31b42cd60b6a409f9dad9510ea27fca9c2864741087b4298a1e3
+amd64:debian:buster==sha256:bce46a1c39574f98c845df4a5acc6c70c211df5a6182e428c1155c33317d4920
+arm64:arm64v8/debian:bookworm==sha256:40374b5cdc928ffc606cb5c2bbf5e2b2eb6eb918a8e62104ae1f001c49dcbe3a
+arm64:arm64v8/debian:bullseye==sha256:284d075b0fd0350198c79fcb19b9b0fccac6ade8ada1b1309aee35dd223fc802
+arm64:arm64v8/debian:buster==sha256:4d104dd705ba3cba521271fae2d7259e4bc078c5f4855de32dab30acc9a5d3c5
+arm64:debian:bookworm==sha256:1aadfee8d292f64b045adb830f8a58bfacc15789ae5f489a0fedcd517a862cb9
+arm64:debian:bullseye==sha256:f860cec7ccaf31b42cd60b6a409f9dad9510ea27fca9c2864741087b4298a1e3
+arm64:debian:buster==sha256:bce46a1c39574f98c845df4a5acc6c70c211df5a6182e428c1155c33317d4920
+armhf:arm32v7/debian:bookworm==sha256:4c1f203254edd0f60bf8269d57f64c3cfc238af1d13d4f8e484c05af2154046b
+armhf:arm32v7/debian:bullseye==sha256:c1205d95cc1479322f5c34df0a98f62ede571d041cb02a48ccca34209b3f7be9
+armhf:arm32v7/debian:buster==sha256:540d61b391864b97f3ee3d9d0ded73d21e35b23c3db56c6400ac789118d0f47c
+armhf:debian:bookworm==sha256:1aadfee8d292f64b045adb830f8a58bfacc15789ae5f489a0fedcd517a862cb9
+armhf:debian:bullseye==sha256:f860cec7ccaf31b42cd60b6a409f9dad9510ea27fca9c2864741087b4298a1e3
+armhf:debian:buster==sha256:bce46a1c39574f98c845df4a5acc6c70c211df5a6182e428c1155c33317d4920
diff --git a/files/build/versions/default/versions-git b/files/build/versions/default/versions-git
index 6be317c50..f52de7666 100644
--- a/files/build/versions/default/versions-git
+++ b/files/build/versions/default/versions-git
@@ -1,21 +1,21 @@
-https://chromium.googlesource.com/chromium/tools/depot_tools.git==6ba67afd6fb7718743af91b847ddf1907f3ee9a6
+https://chromium.googlesource.com/chromium/tools/depot_tools.git==a9b9284faf89cd1a426371237df8307c328cc818
 https://github.com/aristanetworks/swi-tools.git==b5f087e4774168bf536360d43c9c509c8f14ad9f
 https://github.com/CESNET/libyang.git==4c733412e7173219166be7053940326a92699765
 https://github.com/daveolson53/audisp-tacplus.git==559c9f22edd4f2dea0ecedffb3ad9502b12a75b6
 https://github.com/daveolson53/libnss-tacplus.git==19008ab68d9d504aa58eb34d5f564755a1613b8b
 https://github.com/dyninc/OpenBFDD.git==e35f43ad8d2b3f084e96a84c392528a90d05a287
-https://github.com/flashrom/flashrom.git==e5ed0c6340961594dcf1a22f9907d91d576b4885
-https://github.com/FreeRADIUS/freeradius-server.git==a3d5f7f5173f562b53b6da564806fadb97fb3cef
-https://github.com/FreeRADIUS/pam_radius.git==2751218c5cd822b4ca8783f1fc03df15500db3c6
+https://github.com/flashrom/flashrom.git==a67b7963a0f8f671fe3d3db54c803a068b93f2c4
+https://github.com/FreeRADIUS/freeradius-server.git==ae174ae97d3274cb168a87e445348845b1da07a2
+https://github.com/FreeRADIUS/pam_radius.git==d802da75cbfc3062ae1b18d0bf26ac2a030ffdaa
 https://github.com/jeroennijhof/pam_tacplus.git==b839c440e33c36eced9dcbc287fcfe6237c4c4ce
 https://github.com/lguohan/gnxi.git==3adf8b97755b49947e465b5a14645f11e79fa0cd
 https://github.com/Mellanox/libpsample.git==62bb27d9a49424e45191eee81df7ce0d8c74e774
 https://github.com/openconfig/oc-pyang.git==4607fd1987d4f586aba03b40f222015cb3ef8161
 https://github.com/p4lang/ptf.git==c554f83685186be4cfa9387eb5d6d700d2bbd7c0
 https://github.com/p4lang/scapy-vxlan.git==85ffe83da156568ee47a0750f638227e6e1d7479
-https://github.com/sflow/host-sflow==0224201ebb6dd47e1dd9ab1f68f8cf2950ea4591
+https://github.com/sflow/host-sflow==6edc82d62a1cf0f7fb821587af67e5520624f50d
 https://github.com/sflow/sflowtool==c42c49cb80b927a4c02e54fc26430417f18f4833
-https://github.com/thom311/libnl==19d48b0fe924085f28c9410fae448d385f5f9a23
+https://github.com/thom311/libnl==7cc72d19f84698a194bee843af66be9be6179baa
 https://salsa.debian.org/kernel-team/initramfs-tools.git==cf964bfb4362019fd7fba1e839e403ff950dca8e
 https://salsa.debian.org/sk-guest/monit.git==c9da7ebb1f35dfba17b50b5969a6e75e29cbec0d
-https://salsa.debian.org/ssh-team/openssh.git==e4f80d7ae4c9bb1125ff1987b1a0ead33b577ec4
+https://salsa.debian.org/ssh-team/openssh.git==52d8a44435f69123efb98d0e7c128b4a81e8aacb
diff --git a/files/build/versions/default/versions-mirror b/files/build/versions/default/versions-mirror
index 279756087..c699c20d0 100644
--- a/files/build/versions/default/versions-mirror
+++ b/files/build/versions/default/versions-mirror
@@ -1,23 +1,20 @@
-deb.debian.org_debian-security_dists_bookworm-security==2024-04-19T19:43:00Z
-deb.debian.org_debian_dists_bookworm==2024-02-10T11:07:25Z
-deb.debian.org_debian_dists_bookworm-updates==2024-04-19T20:17:02Z
 deb.nodesource.com_node%5f14.x_dists_bookworm==2023-02-17T00:35:29Z
 deb.nodesource.com_node%5f14.x_dists_bullseye==2023-02-17T00:35:28Z
 deb.nodesource.com_node%5f14.x_dists_buster==2023-02-17T00:35:28Z
-debian==20240419T000606Z
-debian-security==20240419T000427Z
-download.docker.com_linux_debian_dists_bookworm==2024-04-18T19:25:14Z
-download.docker.com_linux_debian_dists_bullseye==2024-04-18T19:25:15Z
-download.docker.com_linux_debian_dists_buster==2024-04-18T19:25:15Z
-packages.trafficmanager.net_snapshot_debian-security_20240419T000427Z_dists_bookworm-security==2024-04-17T21:43:25Z
-packages.trafficmanager.net_snapshot_debian-security_20240419T000427Z_dists_bullseye-security==2024-04-17T21:43:25Z
-packages.trafficmanager.net_snapshot_debian-security_20240419T000427Z_dists_buster_updates==2024-04-17T21:43:25Z
-packages.trafficmanager.net_snapshot_debian_20240419T000606Z_dists_bookworm==2024-02-10T11:07:25Z
-packages.trafficmanager.net_snapshot_debian_20240419T000606Z_dists_bookworm-backports==2024-04-18T20:13:31Z
-packages.trafficmanager.net_snapshot_debian_20240419T000606Z_dists_bookworm-updates==2024-04-18T20:13:31Z
-packages.trafficmanager.net_snapshot_debian_20240419T000606Z_dists_bullseye==2024-02-10T12:40:37Z
-packages.trafficmanager.net_snapshot_debian_20240419T000606Z_dists_bullseye-backports==2024-04-18T20:13:31Z
-packages.trafficmanager.net_snapshot_debian_20240419T000606Z_dists_bullseye-updates==2024-04-18T20:13:31Z
-packages.trafficmanager.net_snapshot_debian_20240419T000606Z_dists_buster==2023-06-10T08:53:33Z
-packages.trafficmanager.net_snapshot_debian_20240419T000606Z_dists_buster-backports==2024-03-09T20:54:54Z
-packages.trafficmanager.net_snapshot_debian_20240419T000606Z_dists_buster-updates==2023-06-10T08:55:10Z
+debian==20240510T000228Z
+debian-security==20240510T000251Z
+download.docker.com_linux_debian_dists_bookworm==2024-05-10T08:31:56Z
+download.docker.com_linux_debian_dists_bullseye==2024-05-10T08:31:56Z
+download.docker.com_linux_debian_dists_buster==2024-05-09T09:19:41Z
+packages.trafficmanager.net_snapshot_debian-security_20240510T000251Z_dists_bookworm-security==2024-05-09T22:23:01Z
+packages.trafficmanager.net_snapshot_debian-security_20240510T000251Z_dists_bullseye-security==2024-05-09T22:23:00Z
+packages.trafficmanager.net_snapshot_debian-security_20240510T000251Z_dists_buster_updates==2024-05-09T22:23:00Z
+packages.trafficmanager.net_snapshot_debian_20240510T000228Z_dists_bookworm==2024-02-10T11:07:25Z
+packages.trafficmanager.net_snapshot_debian_20240510T000228Z_dists_bookworm-backports==2024-05-09T20:12:26Z
+packages.trafficmanager.net_snapshot_debian_20240510T000228Z_dists_bookworm-updates==2024-05-09T20:12:26Z
+packages.trafficmanager.net_snapshot_debian_20240510T000228Z_dists_bullseye==2024-02-10T12:40:37Z
+packages.trafficmanager.net_snapshot_debian_20240510T000228Z_dists_bullseye-backports==2024-05-09T20:12:26Z
+packages.trafficmanager.net_snapshot_debian_20240510T000228Z_dists_bullseye-updates==2024-05-09T20:12:26Z
+packages.trafficmanager.net_snapshot_debian_20240510T000228Z_dists_buster==2023-06-10T08:53:33Z
+packages.trafficmanager.net_snapshot_debian_20240510T000228Z_dists_buster-backports==2024-03-09T20:54:54Z
+packages.trafficmanager.net_snapshot_debian_20240510T000228Z_dists_buster-updates==2023-06-10T08:55:10Z
diff --git a/files/build/versions/default/versions-web b/files/build/versions/default/versions-web
index 87e523f2b..15e5c9815 100644
--- a/files/build/versions/default/versions-web
+++ b/files/build/versions/default/versions-web
@@ -1,11 +1,9 @@
-http://deb.debian.org/debian/pool/main/i/iproute2/iproute2_5.10.0-4.debian.tar.xz==9a85eed17658cdbf9287606da64143e5
-http://deb.debian.org/debian/pool/main/i/iproute2/iproute2_5.10.0-4.dsc==0038ddbc885bea2b1bcf367b1806bfbf
-http://deb.debian.org/debian/pool/main/i/iproute2/iproute2_5.10.0-4~bpo10+1.debian.tar.xz==4fcbfdd68253864ebbfc11c3fb1480c6
-http://deb.debian.org/debian/pool/main/i/iproute2/iproute2_5.10.0-4~bpo10+1.dsc==81cf5b863f12de38a48b5a3b602cfff4
-http://deb.debian.org/debian/pool/main/i/iproute2/iproute2_5.10.0.orig.tar.xz==f36f0a0612f7fd565680e918d692900d
-http://deb.debian.org/debian/pool/main/i/iptables/iptables_1.8.7-1.debian.tar.xz==bacfd4f463240af61c4a50298e5f7560
-http://deb.debian.org/debian/pool/main/i/iptables/iptables_1.8.7-1.dsc==c7b1880f0d2e7a9306007969f3b541ee
-http://deb.debian.org/debian/pool/main/i/iptables/iptables_1.8.7.orig.tar.bz2==602ba7e937c72fbb7b1c2b71c3b0004b
+http://deb.debian.org/debian/pool/main/i/iproute2/iproute2_6.1.0-3.debian.tar.xz==fc7fd2b3eebb09770c1608dcddda878e
+http://deb.debian.org/debian/pool/main/i/iproute2/iproute2_6.1.0-3.dsc==c3116f907750a9e903d605b18256839f
+http://deb.debian.org/debian/pool/main/i/iproute2/iproute2_6.1.0.orig.tar.xz==f3ff4461e25dbc5ef1fb7a9167a9523d
+http://deb.debian.org/debian/pool/main/i/iptables/iptables_1.8.9-2.debian.tar.xz==833a30b64d7b257ce27e6bfa91a33b96
+http://deb.debian.org/debian/pool/main/i/iptables/iptables_1.8.9-2.dsc==f75e4908e4c841e569447376be6bb043
+http://deb.debian.org/debian/pool/main/i/iptables/iptables_1.8.9.orig.tar.xz==ffa00f68d63e723c21b8a091c5c0271b
 http://deb.debian.org/debian/pool/main/i/isc-dhcp/isc-dhcp_4.4.3-P1-2.debian.tar.xz==64fbb939e9c93d14e5a9040b45e5b459
 http://deb.debian.org/debian/pool/main/i/isc-dhcp/isc-dhcp_4.4.3-P1-2.dsc==9f39c78ebbf7d66194de179dc12de49e
 http://deb.debian.org/debian/pool/main/i/isc-dhcp/isc-dhcp_4.4.3-P1.orig.tar.gz==36c6ca77212373b0cff478ae9e5d32af
@@ -16,8 +14,7 @@ http://deb.debian.org/debian/pool/main/l/lm-sensors/lm-sensors_3.6.0.orig.tar.gz
 http://deb.debian.org/debian/pool/main/p/protobuf/protobuf_3.21.12-3.debian.tar.xz==f457e44218a7d4cc7b7ab0ed696096e3
 http://deb.debian.org/debian/pool/main/p/protobuf/protobuf_3.21.12-3.dsc==d8e34e7b07473c6903f9d245934524fb
 http://deb.debian.org/debian/pool/main/p/protobuf/protobuf_3.21.12.orig.tar.gz==d38562490234d8080bdbe8eb7baf937a
-http://ftp.us.debian.org/debian/pool/main/s/scapy/python3-scapy_2.4.0-2_all.deb==b8717ca83b3b60da54bc3f72018964a7
-http://www.iana.org/assignments/enterprise-numbers.txt==76c0dcc9f445729894dd54827a91ad38
+http://www.iana.org/assignments/enterprise-numbers.txt==1ab53990feba6e1917592d0b085740ff
 http://www.mellanox.com/downloads/MFT/mft-4.27.0-83-x86_64-deb.tgz==e475ca87a9252ba8d0abb6b05d5d94d0
 https://archive.apache.org/dist/thrift/0.14.1/thrift-0.14.1.tar.gz==c64434548438df2cb1e53fb27c600e85
 https://bootstrap.pypa.io/pip/2.7/get-pip.py==60e8267eb1b7bc71dc4843eb7bd294d3
@@ -36,8 +33,8 @@ https://deb.nodesource.com/node_14.x/dists/buster/Release==42875141604382f0abb4d
 https://deb.nodesource.com/setup_14.x==c30873f4a513bb935afaf8f65e7de9e1
 https://download.docker.com/linux/debian/gpg==1afae06b34a13c1b3d9cb61a26285a15
 https://github.com/aristanetworks/sonic-firmware/raw/9e34da2a2d2d1e7e972cda3064b7b73c0558b322/phy/phy-credo_1.0_amd64.deb==a9c38d11ae4e34ca728d9b3b92fd89af
-https://github.com/bazelbuild/bazelisk/releases/latest/download/bazelisk-linux-amd64==44124b7ea28b7ffc38cb7a6b770b7844
-https://github.com/bazelbuild/bazelisk/releases/latest/download/bazelisk-linux-arm64==13442c16ab9043c7f351f74001c565ac
+https://github.com/bazelbuild/bazelisk/releases/latest/download/bazelisk-linux-amd64==4c5f03df0d1074addce889dd53d9564a
+https://github.com/bazelbuild/bazelisk/releases/latest/download/bazelisk-linux-arm64==bd02444daced3e97685d1067fbe6498d
 https://github.com/CentecNetworks/sonic-binaries/raw/master/amd64/sai/libsaictc-dev_1.13.0-1_amd64.deb==b2e4b33541d4ab5de4c1b8eb4a783761
 https://github.com/CentecNetworks/sonic-binaries/raw/master/amd64/sai/libsaictc_1.13.0-1_amd64.deb==fd5f2ddc1d9bc12c0e612154c63634cf
 https://github.com/CentecNetworks/sonic-binaries/raw/master/amd64/third_party/advantech/_Susi4.so==5e1b8daef522c9da00af400abe25810b
@@ -45,39 +42,31 @@ https://github.com/CentecNetworks/sonic-binaries/raw/master/amd64/third_party/ad
 https://github.com/CentecNetworks/sonic-binaries/raw/master/arm64/sai/libsaictc-dev_1.13.0-1_arm64.deb==1162131e154bba573bf7502d743f1d81
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 https://github.com/CumulusNetworks/ifupdown2/archive/3.0.0-1.tar.gz==755459b3a58fbc11625336846cea7420
+https://github.com/Mellanox/sonic-bluefield-packages/releases/download/rshim-2.0.19-bookworm-amd64/rshim_2.0.19_amd64.deb==8128219b0328704b67def640a356df1f
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 https://github.com/Mellanox/Spectrum-SDK-Drivers-SONiC-Bins/releases/download/fw-2012.3064/fw-SPC2-rel-29_2012_3064-EVB.mfa==093179eb16f8f2e296369015d627af14
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-https://github.com/Mellanox/Spectrum-SDK-Drivers-SONiC-Bins/releases/download/sai-SAIBuild2311.27.0.16-bullseye-amd64/mlnx-sai-dbgsym_1.mlnx.SAIBuild2311.27.0.16_amd64.deb==2cbe57565baca9586c9bf96cf32587ed
-https://github.com/Mellanox/Spectrum-SDK-Drivers-SONiC-Bins/releases/download/sai-SAIBuild2311.27.0.16-bullseye-amd64/mlnx-sai_1.mlnx.SAIBuild2311.27.0.16_amd64.deb==b406879fee5f14b387a8aa38d91ea3d2
+https://github.com/Mellanox/Spectrum-SDK-Drivers-SONiC-Bins/releases/download/sai-SAIBuild2311.27.0.16-bookworm-amd64/mlnx-sai-dbgsym_1.mlnx.SAIBuild2311.27.0.16_amd64.deb==351569aa94d7fe2295af2e014572afbd
+https://github.com/Mellanox/Spectrum-SDK-Drivers-SONiC-Bins/releases/download/sai-SAIBuild2311.27.0.16-bookworm-amd64/mlnx-sai_1.mlnx.SAIBuild2311.27.0.16_amd64.deb==cc89e15c7c7bbdcb36a158d2c944612a
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+https://github.com/Mellanox/Spectrum-SDK-Drivers-SONiC-Bins/releases/download/sdk-4.6.3064-bookworm-amd64/sx-examples-dev_1.mlnx.4.6.3064_amd64.deb==1915fbb41d1f624b9559fd07f9af7a5d
+https://github.com/Mellanox/Spectrum-SDK-Drivers-SONiC-Bins/releases/download/sdk-4.6.3064-bookworm-amd64/sx-examples_1.mlnx.4.6.3064_amd64.deb==839a814c914b5c56e6eccf6903921250
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+https://github.com/Mellanox/Spectrum-SDK-Drivers-SONiC-Bins/releases/download/sdk-4.6.3064-bookworm-amd64/sx-hash-calc_1.mlnx.4.6.3064_amd64.deb==6f3030a1a88ca5373b0d75ae95d8d9da
+https://github.com/Mellanox/Spectrum-SDK-Drivers-SONiC-Bins/releases/download/sdk-4.6.3064-bookworm-amd64/sx-obj-desc-lib-dev_1.mlnx.4.6.3064_amd64.deb==1a8f5bbf2453c12176ae513c95f2e056
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+https://github.com/Mellanox/Spectrum-SDK-Drivers-SONiC-Bins/releases/download/sdk-4.6.3064-bookworm-amd64/wjh-libs-dev_1.mlnx.4.6.3064_amd64.deb==197da637515976dc561a8b11e39df40f
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@@ -100,10 +89,14 @@ https://sonicstorage.blob.core.windows.net/debian/pool/main/liby/libyang/libyang
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 https://sonicstorage.blob.core.windows.net/debian/pool/main/n/net-snmp/net-snmp_5.9+dfsg-4+deb11u1.dsc==a36ed553b5034b7400d9e9a8d529b27e
 https://sonicstorage.blob.core.windows.net/debian/pool/main/n/net-snmp/net-snmp_5.9+dfsg.orig.tar.xz==6c2d346ce3320e8999500497e9bacc99
+https://sonicstorage.blob.core.windows.net/debian/pool/main/n/net-snmp/net-snmp_5.9.3+dfsg-2.debian.tar.xz==a0561270faa298995d7106ff5c0de3bb
+https://sonicstorage.blob.core.windows.net/debian/pool/main/n/net-snmp/net-snmp_5.9.3+dfsg-2.dsc==2f4fdd92831f79763efbc96457949f6b
+https://sonicstorage.blob.core.windows.net/debian/pool/main/n/net-snmp/net-snmp_5.9.3+dfsg.orig.tar.xz==cb1dd152d16ea204e7b026937f152b38
 https://sonicstorage.blob.core.windows.net/public/20190307/bcmcmd==b8aefc751bdf93218716bca6797460ff
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-https://sonicstorage.blob.core.windows.net/public/credosai/libsaicredo-owl_0.9.3_amd64.deb?==c69922a1589cf5615a3fddd5b66aa296
-https://sonicstorage.blob.core.windows.net/public/credosai/libsaicredo_0.9.3_amd64.deb==0400bc2015f56bff7d4283c030be26cc
+https://sonicstorage.blob.core.windows.net/public/credosai/libsaicredo-blackhawk_0.9.6_amd64.deb==18f6144a93ba577509b7ff8609c35a27
+https://sonicstorage.blob.core.windows.net/public/credosai/libsaicredo-owl_0.9.6_amd64.deb==ead55c816f8592bd038815349b388ea3
+https://sonicstorage.blob.core.windows.net/public/credosai/libsaicredo_0.9.6_amd64.deb==1cbebed1acd41a4e90ea04355304d5ac
 https://sonicstorage.blob.core.windows.net/public/debian/socat_1.7.4.1-3.debian.tar.xz==e8d1e99b4b9e93f5dde860f6d55f42e3
 https://sonicstorage.blob.core.windows.net/public/debian/socat_1.7.4.1-3.dsc==df3ed0dd965589fd09bf6a2920bc273e
 https://sonicstorage.blob.core.windows.net/public/debian/socat_1.7.4.1.orig.tar.gz==780d14908dc1a6aa2790de376ab56b7a
diff --git a/files/build/versions/dockers/docker-base-bookworm/versions-deb-bookworm b/files/build/versions/dockers/docker-base-bookworm/versions-deb-bookworm
index d0c554ae9..501094edf 100644
--- a/files/build/versions/dockers/docker-base-bookworm/versions-deb-bookworm
+++ b/files/build/versions/dockers/docker-base-bookworm/versions-deb-bookworm
@@ -2,11 +2,13 @@ ca-certificates==20230311
 curl==7.88.1-10+deb12u5
 iproute2==6.1.0-3
 jq==1.6-2.1
-less==590-2
+less==590-2.1~deb12u2
 libatomic1==12.2.0-14
 libbpf1==1:1.1.0-1
 libbrotli1==1.0.9-2+b6
 libbsd0==0.11.7-2
+libc-bin==2.36-9+deb12u7
+libc6==2.36-9+deb12u7
 libcap2-bin==1:2.66-4
 libcurl4==7.88.1-10+deb12u5
 libdaemon0==0.14-7.1
diff --git a/files/build/versions/dockers/docker-base-bookworm/versions-py3 b/files/build/versions/dockers/docker-base-bookworm/versions-py3
index 0ef39410f..13275869a 100644
--- a/files/build/versions/dockers/docker-base-bookworm/versions-py3
+++ b/files/build/versions/dockers/docker-base-bookworm/versions-py3
@@ -1,11 +1,11 @@
 async-timeout==4.0.3
 j2cli==0.3.10
-jinja2==3.1.3
+jinja2==3.1.4
 markupsafe==2.1.5
 pip==24.0
 python-lzf==0.2.4
 rdbtools==0.1.15
-redis==5.0.3
+redis==5.0.4
 setuptools==66.1.1
 supervisor==4.2.5
 supervisord-dependent-startup==1.4.0
diff --git a/files/build/versions/dockers/docker-base-bullseye/versions-deb-bullseye b/files/build/versions/dockers/docker-base-bullseye/versions-deb-bullseye
index 716540f65..1a43c5332 100644
--- a/files/build/versions/dockers/docker-base-bullseye/versions-deb-bullseye
+++ b/files/build/versions/dockers/docker-base-bullseye/versions-deb-bullseye
@@ -2,11 +2,12 @@ ca-certificates==20210119
 curl==7.74.0-1.3+deb11u11
 iproute2==5.10.0-4
 jq==1.6-2.1
-less==551-2
+less==551-2+deb11u2
 libatomic1==10.2.1-6
 libbpf0==1:0.3-2
 libbrotli1==1.0.9-2+b2
 libbsd0==0.11.3-1+deb11u1
+libc6==2.31-13+deb11u10
 libcap2==1:2.44-1
 libcap2-bin==1:2.44-1
 libcurl4==7.74.0-1.3+deb11u11
diff --git a/files/build/versions/dockers/docker-base-bullseye/versions-py3 b/files/build/versions/dockers/docker-base-bullseye/versions-py3
index 78376cb17..c927d1012 100644
--- a/files/build/versions/dockers/docker-base-bullseye/versions-py3
+++ b/files/build/versions/dockers/docker-base-bullseye/versions-py3
@@ -1,11 +1,11 @@
 async-timeout==4.0.3
 j2cli==0.3.10
-jinja2==3.1.3
+jinja2==3.1.4
 markupsafe==2.1.5
 pip==24.0
 python-lzf==0.2.4
 rdbtools==0.1.15
-redis==5.0.3
+redis==5.0.4
 setuptools==49.6.0
 supervisor==4.2.1
 supervisord-dependent-startup==1.4.0
diff --git a/files/build/versions/dockers/docker-base-buster/versions-deb-buster b/files/build/versions/dockers/docker-base-buster/versions-deb-buster
index 0f0a68887..820ceac71 100644
--- a/files/build/versions/dockers/docker-base-buster/versions-deb-buster
+++ b/files/build/versions/dockers/docker-base-buster/versions-deb-buster
@@ -25,7 +25,7 @@ liblognorm5==2.0.5-1
 liblua5.1-0==5.1.5-8.1+b2
 libmpdec2==2.4.2-2
 libncurses6==6.1+20181013-2+deb10u5
-libnghttp2-14==1.36.0-2+deb10u2
+libnghttp2-14==1.36.0-2+deb10u3
 libnorm1==1.5.8+dfsg2-1
 libonig5==6.9.1-1
 libperl5.28==5.28.1-6+deb10u1
diff --git a/files/build/versions/dockers/docker-base-buster/versions-py3 b/files/build/versions/dockers/docker-base-buster/versions-py3
index 927a1686e..37440ddb1 100644
--- a/files/build/versions/dockers/docker-base-buster/versions-py3
+++ b/files/build/versions/dockers/docker-base-buster/versions-py3
@@ -1,5 +1,5 @@
 j2cli==0.3.10
-jinja2==3.1.3
+jinja2==3.1.4
 markupsafe==2.1.5
 pip==24.0
 setuptools==49.6.0
diff --git a/files/build/versions/dockers/docker-config-engine-bookworm/versions-deb-bookworm b/files/build/versions/dockers/docker-config-engine-bookworm/versions-deb-bookworm
index 6e642a04e..4cbe81273 100644
--- a/files/build/versions/dockers/docker-config-engine-bookworm/versions-deb-bookworm
+++ b/files/build/versions/dockers/docker-config-engine-bookworm/versions-deb-bookworm
@@ -3,8 +3,8 @@ binutils-common==2.40-2
 dpkg-dev==1.21.22
 icu-devtools==72.1-3
 libboost-serialization1.74.0==1.74.0+ds1-21
-libc-dev-bin==2.36-9+deb12u4
-libc6-dev==2.36-9+deb12u4
+libc-dev-bin==2.36-9+deb12u7
+libc6-dev==2.36-9+deb12u7
 libcrypt-dev==1:4.4.33-2
 libhiredis0.14==0.14.1-3
 libicu-dev==72.1-3
@@ -27,7 +27,7 @@ libxslt1.1==1.1.35-1
 libyaml-0-2==0.2.5-1
 libyang==1.0.73
 libyang-cpp==1.0.73
-linux-libc-dev==6.1.85-1
+linux-libc-dev==6.1.90-1
 python3-swsscommon==1.0.0
 python3-yaml==6.0-3+b2
 python3-yang==1.0.73
diff --git a/files/build/versions/dockers/docker-config-engine-bookworm/versions-mirror b/files/build/versions/dockers/docker-config-engine-bookworm/versions-mirror
deleted file mode 100644
index 18bbd1153..000000000
--- a/files/build/versions/dockers/docker-config-engine-bookworm/versions-mirror
+++ /dev/null
@@ -1 +0,0 @@
-deb.debian.org_debian_dists_bookworm-updates==2024-04-20T02:13:22Z
diff --git a/files/build/versions/dockers/docker-config-engine-bookworm/versions-py3 b/files/build/versions/dockers/docker-config-engine-bookworm/versions-py3
index becec22b4..ab241307b 100644
--- a/files/build/versions/dockers/docker-config-engine-bookworm/versions-py3
+++ b/files/build/versions/dockers/docker-config-engine-bookworm/versions-py3
@@ -10,7 +10,7 @@ pyangbind==0.8.2
 pyyaml==6.0.1
 redis==5.0.1
 redis-dump-load==1.1
-regex==2024.4.16
+regex==2024.5.10
 six==1.16.0
 tabulate==0.9.0
 xmltodict==0.12.0
diff --git a/files/build/versions/dockers/docker-config-engine-bullseye/versions-deb-bullseye b/files/build/versions/dockers/docker-config-engine-bullseye/versions-deb-bullseye
index 0eb227fc7..f833c3a67 100644
--- a/files/build/versions/dockers/docker-config-engine-bullseye/versions-deb-bullseye
+++ b/files/build/versions/dockers/docker-config-engine-bullseye/versions-deb-bullseye
@@ -2,8 +2,8 @@ apt-utils==2.2.4
 dpkg-dev==1.20.13
 icu-devtools==67.1-7
 libboost-serialization1.74.0==1.74.0-9
-libc-dev-bin==2.31-13+deb11u8
-libc6-dev==2.31-13+deb11u8
+libc-dev-bin==2.31-13+deb11u10
+libc6-dev==2.31-13+deb11u10
 libcrypt-dev==1:4.4.18-4
 libhiredis0.14==0.14.1-1
 libicu-dev==67.1-7
@@ -24,7 +24,7 @@ libxslt1-dev==1.1.34-4+deb11u1
 libxslt1.1==1.1.34-4+deb11u1
 libyang==1.0.73
 libyang-cpp==1.0.73
-linux-libc-dev==5.10.209-2
+linux-libc-dev==5.10.216-1
 python3-swsscommon==1.0.0
 python3-yang==1.0.73
 sonic-db-cli==1.0.0
diff --git a/files/build/versions/dockers/docker-config-engine-bullseye/versions-py3 b/files/build/versions/dockers/docker-config-engine-bullseye/versions-py3
index e468cb043..cb89d4ce2 100644
--- a/files/build/versions/dockers/docker-config-engine-bullseye/versions-py3
+++ b/files/build/versions/dockers/docker-config-engine-bullseye/versions-py3
@@ -10,7 +10,7 @@ pyangbind==0.8.1
 pyyaml==6.0.1
 redis==4.5.4
 redis-dump-load==1.1
-regex==2024.4.16
+regex==2024.5.10
 six==1.16.0
 tabulate==0.9.0
 xmltodict==0.12.0
diff --git a/files/build/versions/dockers/docker-config-engine-buster/versions-deb-buster b/files/build/versions/dockers/docker-config-engine-buster/versions-deb-buster
index 1801e2a26..f6ec0e97a 100644
--- a/files/build/versions/dockers/docker-config-engine-buster/versions-deb-buster
+++ b/files/build/versions/dockers/docker-config-engine-buster/versions-deb-buster
@@ -4,8 +4,9 @@ dpkg-dev==1.19.8
 icu-devtools==63.1-6+deb10u3
 libapt-inst2.0==1.8.2.3
 libboost-serialization1.71.0==1.71.0-6~bpo10+1
-libc-dev-bin==2.28-10+deb10u2
-libc6-dev==2.28-10+deb10u2
+libc-dev-bin==2.28-10+deb10u3
+libc6==2.28-10+deb10u3
+libc6-dev==2.28-10+deb10u3
 libdpkg-perl==1.19.8
 libglib2.0-0==2.58.3-2+deb10u5
 libhiredis0.14==0.14.0-3
diff --git a/files/build/versions/dockers/docker-database/versions-deb-bookworm b/files/build/versions/dockers/docker-database/versions-deb-bookworm
index dbb924121..d4a0316f6 100644
--- a/files/build/versions/dockers/docker-database/versions-deb-bookworm
+++ b/files/build/versions/dockers/docker-database/versions-deb-bookworm
@@ -10,7 +10,7 @@ libdebuginfod1==0.188-2.1
 libdw1==0.188-2.1
 libedit2==3.1-20221030-2
 libfido2-1==1.12.0-2+b1
-libglib2.0-0==2.74.6-2
+libglib2.0-0==2.74.6-2+deb12u2
 libgpm2==1.20.7-10+b1
 libicu72==72.1-3
 libipt2==2.0.5-1
diff --git a/files/build/versions/dockers/docker-database/versions-mirror b/files/build/versions/dockers/docker-database/versions-mirror
deleted file mode 100644
index 18bbd1153..000000000
--- a/files/build/versions/dockers/docker-database/versions-mirror
+++ /dev/null
@@ -1 +0,0 @@
-deb.debian.org_debian_dists_bookworm-updates==2024-04-20T02:13:22Z
diff --git a/files/build/versions/dockers/docker-dhcp-relay/versions-deb-bookworm b/files/build/versions/dockers/docker-dhcp-relay/versions-deb-bookworm
index acd363bff..3da29ccd3 100644
--- a/files/build/versions/dockers/docker-dhcp-relay/versions-deb-bookworm
+++ b/files/build/versions/dockers/docker-dhcp-relay/versions-deb-bookworm
@@ -13,7 +13,7 @@ libedit2==3.1-20221030-2
 libevent-2.1-7==2.1.12-stable-8
 libexplain51==1.4.D001-12+b1
 libfido2-1==1.12.0-2+b1
-libglib2.0-0==2.74.6-2
+libglib2.0-0==2.74.6-2+deb12u2
 libgpm2==1.20.7-10+b1
 libicu72==72.1-3
 libipt2==2.0.5-1
diff --git a/files/build/versions/dockers/docker-dhcp-relay/versions-mirror b/files/build/versions/dockers/docker-dhcp-relay/versions-mirror
deleted file mode 100644
index 18bbd1153..000000000
--- a/files/build/versions/dockers/docker-dhcp-relay/versions-mirror
+++ /dev/null
@@ -1 +0,0 @@
-deb.debian.org_debian_dists_bookworm-updates==2024-04-20T02:13:22Z
diff --git a/files/build/versions/dockers/docker-dhcp-relay/versions-py3 b/files/build/versions/dockers/docker-dhcp-relay/versions-py3
index 0ff1a8722..23bb524eb 100644
--- a/files/build/versions/dockers/docker-dhcp-relay/versions-py3
+++ b/files/build/versions/dockers/docker-dhcp-relay/versions-py3
@@ -1,3 +1,3 @@
-freezegun==1.4.0
+freezegun==1.5.0
 psutil==5.9.8
 python-dateutil==2.9.0.post0
diff --git a/files/build/versions/dockers/docker-eventd/versions-deb-bookworm b/files/build/versions/dockers/docker-eventd/versions-deb-bookworm
index bb687701b..f86585305 100644
--- a/files/build/versions/dockers/docker-eventd/versions-deb-bookworm
+++ b/files/build/versions/dockers/docker-eventd/versions-deb-bookworm
@@ -9,7 +9,7 @@ libdebuginfod1==0.188-2.1
 libdw1==0.188-2.1
 libedit2==3.1-20221030-2
 libfido2-1==1.12.0-2+b1
-libglib2.0-0==2.74.6-2
+libglib2.0-0==2.74.6-2+deb12u2
 libgpm2==1.20.7-10+b1
 libicu72==72.1-3
 libipt2==2.0.5-1
diff --git a/files/build/versions/dockers/docker-eventd/versions-mirror b/files/build/versions/dockers/docker-eventd/versions-mirror
deleted file mode 100644
index 18bbd1153..000000000
--- a/files/build/versions/dockers/docker-eventd/versions-mirror
+++ /dev/null
@@ -1 +0,0 @@
-deb.debian.org_debian_dists_bookworm-updates==2024-04-20T02:13:22Z
diff --git a/files/build/versions/dockers/docker-fpm-frr/versions-deb-bullseye b/files/build/versions/dockers/docker-fpm-frr/versions-deb-bullseye
index 7d076b3f8..551d1b7e5 100644
--- a/files/build/versions/dockers/docker-fpm-frr/versions-deb-bullseye
+++ b/files/build/versions/dockers/docker-fpm-frr/versions-deb-bullseye
@@ -1,8 +1,8 @@
 cron==3.0pl1-137
-frr==8.5.1-sonic-0
-frr-dbgsym==8.5.1-sonic-0
-frr-snmp==8.5.1-sonic-0
-frr-snmp-dbgsym==8.5.1-sonic-0
+frr==8.5.4-sonic-0
+frr-dbgsym==8.5.4-sonic-0
+frr-snmp==8.5.4-sonic-0
+frr-snmp-dbgsym==8.5.4-sonic-0
 gdb==10.1-1.7
 gdbserver==10.1-1.7
 libbabeltrace1==1.5.8-1+b3
@@ -14,7 +14,7 @@ libdebuginfod1==0.183-1
 libdw1==0.183-1
 libedit2==3.1-20191231-2+b1
 libfido2-1==1.6.0-2
-libglib2.0-0==2.66.8-1+deb11u1
+libglib2.0-0==2.66.8-1+deb11u3
 libgpm2==1.20.7-8
 libicu67==67.1-7
 libipt2==2.0.3-1
diff --git a/files/build/versions/dockers/docker-gbsyncd-broncos/versions-deb-bullseye b/files/build/versions/dockers/docker-gbsyncd-broncos/versions-deb-bullseye
index bf8acc56c..99169d93b 100644
--- a/files/build/versions/dockers/docker-gbsyncd-broncos/versions-deb-bullseye
+++ b/files/build/versions/dockers/docker-gbsyncd-broncos/versions-deb-bullseye
@@ -2,8 +2,8 @@ gdb==10.1-1.7
 gdbserver==10.1-1.7
 libbabeltrace1==1.5.8-1+b3
 libboost-regex1.74.0==1.74.0-9
-libc-dev-bin==2.31-13+deb11u8
-libc6-dev==2.31-13+deb11u8
+libc-dev-bin==2.31-13+deb11u10
+libc6-dev==2.31-13+deb11u10
 libcbor0==0.5.0+dfsg-2
 libcrypt-dev==1:4.4.18-4
 libcurl3-gnutls==7.74.0-1.3+deb11u11
@@ -11,7 +11,7 @@ libdebuginfod1==0.183-1
 libdw1==0.183-1
 libedit2==3.1-20191231-2+b1
 libfido2-1==1.6.0-2
-libglib2.0-0==2.66.8-1+deb11u1
+libglib2.0-0==2.66.8-1+deb11u3
 libgpm2==1.20.7-8
 libicu67==67.1-7
 libipt2==2.0.3-1
@@ -28,7 +28,7 @@ libsource-highlight4v5==3.1.9-3+b1
 libswsscommon-dbgsym==1.0.0
 libtirpc-dev==1.3.1-1+deb11u1
 libunwind8==1.3.2-2
-linux-libc-dev==5.10.209-2
+linux-libc-dev==5.10.216-1
 openssh-client==1:8.4p1-5+deb11u3
 sshpass==1.09-1+b1
 strace==5.10-1
diff --git a/files/build/versions/dockers/docker-gbsyncd-credo/versions-deb-bullseye b/files/build/versions/dockers/docker-gbsyncd-credo/versions-deb-bullseye
index 272f7dca3..d61c9bbe5 100644
--- a/files/build/versions/dockers/docker-gbsyncd-credo/versions-deb-bullseye
+++ b/files/build/versions/dockers/docker-gbsyncd-credo/versions-deb-bullseye
@@ -8,13 +8,14 @@ libdebuginfod1==0.183-1
 libdw1==0.183-1
 libedit2==3.1-20191231-2+b1
 libfido2-1==1.6.0-2
-libglib2.0-0==2.66.8-1+deb11u1
+libglib2.0-0==2.66.8-1+deb11u3
 libgpm2==1.20.7-8
 libicu67==67.1-7
 libipt2==2.0.3-1
 libmpfr6==4.1.0-3
-libsaicredo==0.9.3
-libsaicredo-owl==0.9.3
+libsaicredo==0.9.6
+libsaicredo-blackhawk==0.9.6
+libsaicredo-owl==0.9.6
 libsaimetadata==1.0.0
 libsairedis==1.0.0
 libsource-highlight-common==3.1.9-3
diff --git a/files/build/versions/dockers/docker-gbsyncd-vs/versions-deb-bookworm b/files/build/versions/dockers/docker-gbsyncd-vs/versions-deb-bookworm
new file mode 100644
index 000000000..afd567e7c
--- /dev/null
+++ b/files/build/versions/dockers/docker-gbsyncd-vs/versions-deb-bookworm
@@ -0,0 +1,35 @@
+gdb==13.1-3
+gdbserver==13.1-3
+libbabeltrace1==1.5.11-1+b2
+libboost-regex1.74.0==1.74.0+ds1-21
+libcbor0.8==0.8.0-2+b1
+libcurl3-gnutls==7.88.1-10+deb12u5
+libdebuginfod-common==0.188-2.1
+libdebuginfod1==0.188-2.1
+libdw1==0.188-2.1
+libedit2==3.1-20221030-2
+libfido2-1==1.12.0-2+b1
+libglib2.0-0==2.74.6-2+deb12u2
+libgpm2==1.20.7-10+b1
+libicu72==72.1-3
+libipt2==2.0.5-1
+libmpfr6==4.2.0-1
+libsaimetadata==1.0.0
+libsaimetadata-dbgsym==1.0.0
+libsairedis==1.0.0
+libsairedis-dbgsym==1.0.0
+libsaivs==1.0.0
+libsaivs-dbgsym==1.0.0
+libsource-highlight-common==3.1.9-4.2
+libsource-highlight4v5==3.1.9-4.2+b3
+libswsscommon-dbgsym==1.0.0
+libunwind8==1.6.2-3
+openssh-client==1:9.2p1-2+deb12u2
+sensible-utils==0.0.17+nmu1
+sshpass==1.09-1+b1
+strace==6.1-0.1
+syncd-vs==1.0.0
+syncd-vs-dbgsym==1.0.0
+ucf==3.0043+nmu1
+vim==2:9.0.1378-2
+vim-runtime==2:9.0.1378-2
diff --git a/files/build/versions/dockers/docker-lldp/versions-deb-bookworm b/files/build/versions/dockers/docker-lldp/versions-deb-bookworm
new file mode 100644
index 000000000..3c52fb813
--- /dev/null
+++ b/files/build/versions/dockers/docker-lldp/versions-deb-bookworm
@@ -0,0 +1,37 @@
+gdb==13.1-3
+gdbserver==13.1-3
+libbabeltrace1==1.5.11-1+b2
+libboost-regex1.74.0==1.74.0+ds1-21
+libcbor0.8==0.8.0-2+b1
+libcurl3-gnutls==7.88.1-10+deb12u5
+libdebuginfod-common==0.188-2.1
+libdebuginfod1==0.188-2.1
+libdw1==0.188-2.1
+libedit2==3.1-20221030-2
+libevent-2.1-7==2.1.12-stable-8
+libfido2-1==1.12.0-2+b1
+libglib2.0-0==2.74.6-2+deb12u2
+libgpm2==1.20.7-10+b1
+libicu72==72.1-3
+libipt2==2.0.5-1
+libmpfr6==4.2.0-1
+libpci3==1:3.9.0-4
+libsensors-config==1:3.6.0-7.1
+libsensors5==1:3.6.0-7.1
+libsnmp-base==5.9.3+dfsg-2
+libsnmp40==5.9.3+dfsg-2
+libsource-highlight-common==3.1.9-4.2
+libsource-highlight4v5==3.1.9-4.2+b3
+libswsscommon-dbgsym==1.0.0
+libunwind8==1.6.2-3
+libxml2==2.9.14+dfsg-1.3~deb12u1
+lldpd==1.0.16-1+deb12u1
+lldpd-dbgsym==1.0.16-1+deb12u1
+openssh-client==1:9.2p1-2+deb12u2
+pci.ids==0.0~2023.04.11-1
+sensible-utils==0.0.17+nmu1
+sshpass==1.09-1+b1
+strace==6.1-0.1
+ucf==3.0043+nmu1
+vim==2:9.0.1378-2
+vim-runtime==2:9.0.1378-2
diff --git a/files/build/versions/dockers/docker-lldp/versions-deb-bullseye b/files/build/versions/dockers/docker-lldp/versions-deb-bullseye
deleted file mode 100644
index 2454215e4..000000000
--- a/files/build/versions/dockers/docker-lldp/versions-deb-bullseye
+++ /dev/null
@@ -1,34 +0,0 @@
-gdb==10.1-1.7
-gdbserver==10.1-1.7
-libbabeltrace1==1.5.8-1+b3
-libboost-regex1.74.0==1.74.0-9
-libcbor0==0.5.0+dfsg-2
-libcurl3-gnutls==7.74.0-1.3+deb11u11
-libdebuginfod1==0.183-1
-libdw1==0.183-1
-libedit2==3.1-20191231-2+b1
-libevent-2.1-7==2.1.12-stable-1
-libfido2-1==1.6.0-2
-libglib2.0-0==2.66.8-1+deb11u1
-libgpm2==1.20.7-8
-libicu67==67.1-7
-libipt2==2.0.3-1
-libmpfr6==4.1.0-3
-libpci3==1:3.7.0-5
-libsensors-config==1:3.6.0-7
-libsensors5==1:3.6.0-7
-libsnmp-base==5.9+dfsg-4+deb11u1
-libsnmp40==5.9+dfsg-4+deb11u1
-libsource-highlight-common==3.1.9-3
-libsource-highlight4v5==3.1.9-3+b1
-libswsscommon-dbgsym==1.0.0
-libunwind8==1.3.2-2
-libxml2==2.9.10+dfsg-6.7+deb11u4
-lldpd==1.0.16-1+deb12u1
-lldpd-dbgsym==1.0.16-1+deb12u1
-openssh-client==1:8.4p1-5+deb11u3
-pci.ids==0.0~2021.02.08-1
-sshpass==1.09-1+b1
-strace==5.10-1
-vim==2:8.2.2434-3+deb11u1
-vim-runtime==2:8.2.2434-3+deb11u1
diff --git a/files/build/versions/dockers/docker-macsec/versions-deb-bookworm b/files/build/versions/dockers/docker-macsec/versions-deb-bookworm
index 24a19338a..ecadea5a6 100644
--- a/files/build/versions/dockers/docker-macsec/versions-deb-bookworm
+++ b/files/build/versions/dockers/docker-macsec/versions-deb-bookworm
@@ -9,7 +9,7 @@ libdebuginfod1==0.188-2.1
 libdw1==0.188-2.1
 libedit2==3.1-20221030-2
 libfido2-1==1.12.0-2+b1
-libglib2.0-0==2.74.6-2
+libglib2.0-0==2.74.6-2+deb12u2
 libgpm2==1.20.7-10+b1
 libicu72==72.1-3
 libipt2==2.0.5-1
diff --git a/files/build/versions/dockers/docker-macsec/versions-mirror b/files/build/versions/dockers/docker-macsec/versions-mirror
deleted file mode 100644
index 18bbd1153..000000000
--- a/files/build/versions/dockers/docker-macsec/versions-mirror
+++ /dev/null
@@ -1 +0,0 @@
-deb.debian.org_debian_dists_bookworm-updates==2024-04-20T02:13:22Z
diff --git a/files/build/versions/dockers/docker-mux/versions-deb-bookworm b/files/build/versions/dockers/docker-mux/versions-deb-bookworm
index e67021248..0838f42f9 100644
--- a/files/build/versions/dockers/docker-mux/versions-deb-bookworm
+++ b/files/build/versions/dockers/docker-mux/versions-deb-bookworm
@@ -13,7 +13,7 @@ libdebuginfod1==0.188-2.1
 libdw1==0.188-2.1
 libedit2==3.1-20221030-2
 libfido2-1==1.12.0-2+b1
-libglib2.0-0==2.74.6-2
+libglib2.0-0==2.74.6-2+deb12u2
 libgpm2==1.20.7-10+b1
 libicu72==72.1-3
 libipt2==2.0.5-1
diff --git a/files/build/versions/dockers/docker-mux/versions-mirror b/files/build/versions/dockers/docker-mux/versions-mirror
deleted file mode 100644
index 18bbd1153..000000000
--- a/files/build/versions/dockers/docker-mux/versions-mirror
+++ /dev/null
@@ -1 +0,0 @@
-deb.debian.org_debian_dists_bookworm-updates==2024-04-20T02:13:22Z
diff --git a/files/build/versions/dockers/docker-nat/versions-deb-bookworm b/files/build/versions/dockers/docker-nat/versions-deb-bookworm
new file mode 100644
index 000000000..6e0af0d6e
--- /dev/null
+++ b/files/build/versions/dockers/docker-nat/versions-deb-bookworm
@@ -0,0 +1,38 @@
+bridge-utils==1.7.1-1
+conntrack==1:1.4.7-1+b2
+gdb==13.1-3
+gdbserver==13.1-3
+iptables==1.8.9-2
+libbabeltrace1==1.5.11-1+b2
+libboost-regex1.74.0==1.74.0+ds1-21
+libcbor0.8==0.8.0-2+b1
+libcurl3-gnutls==7.88.1-10+deb12u5
+libdebuginfod-common==0.188-2.1
+libdebuginfod1==0.188-2.1
+libdw1==0.188-2.1
+libedit2==3.1-20221030-2
+libfido2-1==1.12.0-2+b1
+libglib2.0-0==2.74.6-2+deb12u2
+libgpm2==1.20.7-10+b1
+libicu72==72.1-3
+libip4tc2==1.8.9-2
+libip6tc2==1.8.9-2
+libipt2==2.0.5-1
+libiptc0==1.8.9-2
+libmpfr6==4.2.0-1
+libnetfilter-conntrack3==1.0.9-3
+libnfnetlink0==1.0.2-2
+libnftnl11==1.2.4-2
+libsource-highlight-common==3.1.9-4.2
+libsource-highlight4v5==3.1.9-4.2+b3
+libswsscommon-dbgsym==1.0.0
+libunwind8==1.6.2-3
+netbase==6.4
+openssh-client==1:9.2p1-2+deb12u2
+sensible-utils==0.0.17+nmu1
+sshpass==1.09-1+b1
+strace==6.1-0.1
+swss-dbg==1.0.0
+ucf==3.0043+nmu1
+vim==2:9.0.1378-2
+vim-runtime==2:9.0.1378-2
diff --git a/files/build/versions/dockers/docker-nat/versions-deb-bullseye b/files/build/versions/dockers/docker-nat/versions-deb-bullseye
deleted file mode 100644
index fa4f16b3a..000000000
--- a/files/build/versions/dockers/docker-nat/versions-deb-bullseye
+++ /dev/null
@@ -1,35 +0,0 @@
-bridge-utils==1.7-1
-conntrack==1:1.4.6-2
-gdb==10.1-1.7
-gdbserver==10.1-1.7
-iptables==1.8.7-1
-libbabeltrace1==1.5.8-1+b3
-libboost-regex1.74.0==1.74.0-9
-libcbor0==0.5.0+dfsg-2
-libcurl3-gnutls==7.74.0-1.3+deb11u11
-libdebuginfod1==0.183-1
-libdw1==0.183-1
-libedit2==3.1-20191231-2+b1
-libfido2-1==1.6.0-2
-libglib2.0-0==2.66.8-1+deb11u1
-libgpm2==1.20.7-8
-libicu67==67.1-7
-libip4tc2==1.8.7-1
-libip6tc2==1.8.7-1
-libipt2==2.0.3-1
-libiptc0==1.8.7-1
-libmpfr6==4.1.0-3
-libnetfilter-conntrack3==1.0.8-3
-libnfnetlink0==1.0.1-3+b1
-libnftnl11==1.1.9-1
-libsource-highlight-common==3.1.9-3
-libsource-highlight4v5==3.1.9-3+b1
-libswsscommon-dbgsym==1.0.0
-libunwind8==1.3.2-2
-netbase==6.3
-openssh-client==1:8.4p1-5+deb11u3
-sshpass==1.09-1+b1
-strace==5.10-1
-swss-dbg==1.0.0
-vim==2:8.2.2434-3+deb11u1
-vim-runtime==2:8.2.2434-3+deb11u1
diff --git a/files/build/versions/dockers/docker-orchagent/versions-deb-bookworm b/files/build/versions/dockers/docker-orchagent/versions-deb-bookworm
index 113b60aed..f606f8ca6 100644
--- a/files/build/versions/dockers/docker-orchagent/versions-deb-bookworm
+++ b/files/build/versions/dockers/docker-orchagent/versions-deb-bookworm
@@ -13,7 +13,7 @@ libdebuginfod1==0.188-2.1
 libdw1==0.188-2.1
 libedit2==3.1-20221030-2
 libfido2-1==1.12.0-2+b1
-libglib2.0-0==2.74.6-2
+libglib2.0-0==2.74.6-2+deb12u2
 libgpm2==1.20.7-10+b1
 libicu72==72.1-3
 libipt2==2.0.5-1
@@ -35,6 +35,7 @@ ndppd==0.2.5-6
 openssh-client==1:9.2p1-2+deb12u2
 pci.ids==0.0~2023.04.11-1
 pciutils==1:3.9.0-4
+python3-protobuf==3.21.12-3
 sensible-utils==0.0.17+nmu1
 sgml-base==1.31
 sonic-rsyslog-plugin==1.0.0-0
diff --git a/files/build/versions/dockers/docker-orchagent/versions-mirror b/files/build/versions/dockers/docker-orchagent/versions-mirror
deleted file mode 100644
index 18bbd1153..000000000
--- a/files/build/versions/dockers/docker-orchagent/versions-mirror
+++ /dev/null
@@ -1 +0,0 @@
-deb.debian.org_debian_dists_bookworm-updates==2024-04-20T02:13:22Z
diff --git a/files/build/versions/dockers/docker-orchagent/versions-py3 b/files/build/versions/dockers/docker-orchagent/versions-py3
index 197d40489..00191ce1c 100644
--- a/files/build/versions/dockers/docker-orchagent/versions-py3
+++ b/files/build/versions/dockers/docker-orchagent/versions-py3
@@ -1,2 +1,3 @@
 netifaces==0.10.9
+protobuf==4.21.12
 pyroute2==0.5.14
diff --git a/files/build/versions/dockers/docker-platform-monitor/versions-deb-bookworm b/files/build/versions/dockers/docker-platform-monitor/versions-deb-bookworm
index fd6d7b8a2..ce7883fa9 100644
--- a/files/build/versions/dockers/docker-platform-monitor/versions-deb-bookworm
+++ b/files/build/versions/dockers/docker-platform-monitor/versions-deb-bookworm
@@ -27,7 +27,7 @@ libfido2-1==1.12.0-2+b1
 libfontconfig1==2.14.1-4
 libfreetype6==2.12.1+dfsg-5
 libfribidi0==1.0.8-2.1
-libglib2.0-0==2.74.6-2
+libglib2.0-0==2.74.6-2+deb12u2
 libgpm2==1.20.7-10+b1
 libgraphite2-3==1.3.14-1
 libharfbuzz0b==6.0.0+dfsg-3
diff --git a/files/build/versions/dockers/docker-platform-monitor/versions-mirror b/files/build/versions/dockers/docker-platform-monitor/versions-mirror
deleted file mode 100644
index 18bbd1153..000000000
--- a/files/build/versions/dockers/docker-platform-monitor/versions-mirror
+++ /dev/null
@@ -1 +0,0 @@
-deb.debian.org_debian_dists_bookworm-updates==2024-04-20T02:13:22Z
diff --git a/files/build/versions/dockers/docker-ptf/versions-deb-buster b/files/build/versions/dockers/docker-ptf/versions-deb-buster
index 02c90922c..518fcc70e 100644
--- a/files/build/versions/dockers/docker-ptf/versions-deb-buster
+++ b/files/build/versions/dockers/docker-ptf/versions-deb-buster
@@ -99,9 +99,11 @@ libboost-atomic1.71.0==1.71.0-6~bpo10+1
 libbrotli1==1.0.7-2+deb10u1
 libbsd0==0.9.1-2+deb10u1
 libc-ares2==1.14.0-1+deb10u4
-libc-dev-bin==2.28-10+deb10u2
-libc6-dbg==2.28-10+deb10u2
-libc6-dev==2.28-10+deb10u2
+libc-bin==2.28-10+deb10u3
+libc-dev-bin==2.28-10+deb10u3
+libc6==2.28-10+deb10u3
+libc6-dbg==2.28-10+deb10u3
+libc6-dev==2.28-10+deb10u3
 libcairo-gobject2==1.16.0-4+deb10u1
 libcairo2==1.16.0-4+deb10u1
 libcc1-0==8.3.0-6
@@ -269,7 +271,7 @@ libnet-http-perl==6.18-1
 libnet-smtp-ssl-perl==1.04-1
 libnet-ssleay-perl==1.85-2+deb10u1
 libnet1==1.1.6+dfsg-3.1
-libnghttp2-14==1.36.0-2+deb10u2
+libnghttp2-14==1.36.0-2+deb10u3
 libnl-3-200==3.4.0-1
 libnl-cli-3-200==3.4.0-1
 libnl-genl-3-200==3.4.0-1
@@ -319,18 +321,18 @@ libpython3.7==3.7.3-2+deb10u7
 libpython3.7-dev==3.7.3-2+deb10u7
 libpython3.7-minimal==3.7.3-2+deb10u7
 libpython3.7-stdlib==3.7.3-2+deb10u7
-libqt5core5a==5.11.3+dfsg1-1+deb10u5
-libqt5dbus5==5.11.3+dfsg1-1+deb10u5
-libqt5gui5==5.11.3+dfsg1-1+deb10u5
+libqt5core5a==5.11.3+dfsg1-1+deb10u6
+libqt5dbus5==5.11.3+dfsg1-1+deb10u6
+libqt5gui5==5.11.3+dfsg1-1+deb10u6
 libqt5multimedia5==5.11.3-2
 libqt5multimedia5-plugins==5.11.3-2
 libqt5multimediagsttools5==5.11.3-2
 libqt5multimediawidgets5==5.11.3-2
-libqt5network5==5.11.3+dfsg1-1+deb10u5
-libqt5opengl5==5.11.3+dfsg1-1+deb10u5
-libqt5printsupport5==5.11.3+dfsg1-1+deb10u5
+libqt5network5==5.11.3+dfsg1-1+deb10u6
+libqt5opengl5==5.11.3+dfsg1-1+deb10u6
+libqt5printsupport5==5.11.3+dfsg1-1+deb10u6
 libqt5svg5==5.11.3-2
-libqt5widgets5==5.11.3+dfsg1-1+deb10u5
+libqt5widgets5==5.11.3+dfsg1-1+deb10u6
 libquadmath0==8.3.0-6
 libreadline7==7.0-5
 librest-0.7-0==0.8.1-1
@@ -557,7 +559,7 @@ python3.7==3.7.3-2+deb10u7
 python3.7-dev==3.7.3-2+deb10u7
 python3.7-minimal==3.7.3-2+deb10u7
 python3.7-venv==3.7.3-2+deb10u7
-qt5-gtk-platformtheme==5.11.3+dfsg1-1+deb10u5
+qt5-gtk-platformtheme==5.11.3+dfsg1-1+deb10u6
 qttranslations5-l10n==5.11.3-2
 readline-common==7.0-5
 rsync==3.1.3-6
diff --git a/files/build/versions/dockers/docker-router-advertiser/versions-deb-bookworm b/files/build/versions/dockers/docker-router-advertiser/versions-deb-bookworm
index ef6058968..2c7500156 100644
--- a/files/build/versions/dockers/docker-router-advertiser/versions-deb-bookworm
+++ b/files/build/versions/dockers/docker-router-advertiser/versions-deb-bookworm
@@ -9,7 +9,7 @@ libdebuginfod1==0.188-2.1
 libdw1==0.188-2.1
 libedit2==3.1-20221030-2
 libfido2-1==1.12.0-2+b1
-libglib2.0-0==2.74.6-2
+libglib2.0-0==2.74.6-2+deb12u2
 libgpm2==1.20.7-10+b1
 libicu72==72.1-3
 libipt2==2.0.5-1
diff --git a/files/build/versions/dockers/docker-router-advertiser/versions-mirror b/files/build/versions/dockers/docker-router-advertiser/versions-mirror
deleted file mode 100644
index 18bbd1153..000000000
--- a/files/build/versions/dockers/docker-router-advertiser/versions-mirror
+++ /dev/null
@@ -1 +0,0 @@
-deb.debian.org_debian_dists_bookworm-updates==2024-04-20T02:13:22Z
diff --git a/files/build/versions/dockers/docker-sflow/versions-deb-bullseye b/files/build/versions/dockers/docker-sflow/versions-deb-bullseye
index 9c2e1a810..351cd8237 100644
--- a/files/build/versions/dockers/docker-sflow/versions-deb-bullseye
+++ b/files/build/versions/dockers/docker-sflow/versions-deb-bullseye
@@ -11,7 +11,7 @@ libdebuginfod1==0.183-1
 libdw1==0.183-1
 libedit2==3.1-20191231-2+b1
 libfido2-1==1.6.0-2
-libglib2.0-0==2.66.8-1+deb11u1
+libglib2.0-0==2.66.8-1+deb11u3
 libgpm2==1.20.7-8
 libicu67==67.1-7
 libipt2==2.0.3-1
diff --git a/files/build/versions/dockers/docker-snmp/versions-deb-bookworm b/files/build/versions/dockers/docker-snmp/versions-deb-bookworm
new file mode 100644
index 000000000..80548bf42
--- /dev/null
+++ b/files/build/versions/dockers/docker-snmp/versions-deb-bookworm
@@ -0,0 +1,43 @@
+freeipmi-common==1.6.10-1
+gdb==13.1-3
+gdbserver==13.1-3
+ipmitool==1.8.19-4
+libbabeltrace1==1.5.11-1+b2
+libboost-regex1.74.0==1.74.0+ds1-21
+libc-l10n==2.36-9+deb12u7
+libcbor0.8==0.8.0-2+b1
+libcurl3-gnutls==7.88.1-10+deb12u5
+libdebuginfod-common==0.188-2.1
+libdebuginfod1==0.188-2.1
+libdw1==0.188-2.1
+libedit2==3.1-20221030-2
+libfido2-1==1.12.0-2+b1
+libfreeipmi17==1.6.10-1+b1
+libglib2.0-0==2.74.6-2+deb12u2
+libgpm2==1.20.7-10+b1
+libicu72==72.1-3
+libipt2==2.0.5-1
+libmpfr6==4.2.0-1
+libpci3==1:3.9.0-4
+libsensors-config==1:3.6.0-7.1
+libsensors5==1:3.6.0-7.1
+libsnmp-base==5.9.3+dfsg-2
+libsnmp40==5.9.3+dfsg-2
+libsnmp40-dbgsym==5.9.3+dfsg-2
+libsource-highlight-common==3.1.9-4.2
+libsource-highlight4v5==3.1.9-4.2+b3
+libswsscommon-dbgsym==1.0.0
+libunwind8==1.6.2-3
+locales==2.36-9+deb12u7
+openssh-client==1:9.2p1-2+deb12u2
+pci.ids==0.0~2023.04.11-1
+sensible-utils==0.0.17+nmu1
+snmp==5.9.3+dfsg-2
+snmp-dbgsym==5.9.3+dfsg-2
+snmpd==5.9.3+dfsg-2
+snmpd-dbgsym==5.9.3+dfsg-2
+sshpass==1.09-1+b1
+strace==6.1-0.1
+ucf==3.0043+nmu1
+vim==2:9.0.1378-2
+vim-runtime==2:9.0.1378-2
diff --git a/files/build/versions/dockers/docker-snmp/versions-deb-bullseye b/files/build/versions/dockers/docker-snmp/versions-deb-bullseye
deleted file mode 100644
index 247f77f79..000000000
--- a/files/build/versions/dockers/docker-snmp/versions-deb-bullseye
+++ /dev/null
@@ -1,40 +0,0 @@
-freeipmi-common==1.6.6-4+deb11u1
-gdb==10.1-1.7
-gdbserver==10.1-1.7
-ipmitool==1.8.18-10.1
-libbabeltrace1==1.5.8-1+b3
-libboost-regex1.74.0==1.74.0-9
-libc-l10n==2.31-13+deb11u8
-libcbor0==0.5.0+dfsg-2
-libcurl3-gnutls==7.74.0-1.3+deb11u11
-libdebuginfod1==0.183-1
-libdw1==0.183-1
-libedit2==3.1-20191231-2+b1
-libfido2-1==1.6.0-2
-libfreeipmi17==1.6.6-4+deb11u1
-libglib2.0-0==2.66.8-1+deb11u1
-libgpm2==1.20.7-8
-libicu67==67.1-7
-libipt2==2.0.3-1
-libmpfr6==4.1.0-3
-libpci3==1:3.7.0-5
-libsensors-config==1:3.6.0-7
-libsensors5==1:3.6.0-7
-libsnmp-base==5.9+dfsg-4+deb11u1
-libsnmp40==5.9+dfsg-4+deb11u1
-libsnmp40-dbgsym==5.9+dfsg-4+deb11u1
-libsource-highlight-common==3.1.9-3
-libsource-highlight4v5==3.1.9-3+b1
-libswsscommon-dbgsym==1.0.0
-libunwind8==1.3.2-2
-locales==2.31-13+deb11u8
-openssh-client==1:8.4p1-5+deb11u3
-pci.ids==0.0~2021.02.08-1
-snmp==5.9+dfsg-4+deb11u1
-snmp-dbgsym==5.9+dfsg-4+deb11u1
-snmpd==5.9+dfsg-4+deb11u1
-snmpd-dbgsym==5.9+dfsg-4+deb11u1
-sshpass==1.09-1+b1
-strace==5.10-1
-vim==2:8.2.2434-3+deb11u1
-vim-runtime==2:8.2.2434-3+deb11u1
diff --git a/files/build/versions/dockers/docker-sonic-gnmi/versions-deb-bullseye b/files/build/versions/dockers/docker-sonic-gnmi/versions-deb-bullseye
index 7ae0b391e..40e96a175 100644
--- a/files/build/versions/dockers/docker-sonic-gnmi/versions-deb-bullseye
+++ b/files/build/versions/dockers/docker-sonic-gnmi/versions-deb-bullseye
@@ -8,7 +8,7 @@ libdebuginfod1==0.183-1
 libdw1==0.183-1
 libedit2==3.1-20191231-2+b1
 libfido2-1==1.6.0-2
-libglib2.0-0==2.66.8-1+deb11u1
+libglib2.0-0==2.66.8-1+deb11u3
 libgpm2==1.20.7-8
 libicu67==67.1-7
 libipt2==2.0.3-1
diff --git a/files/build/versions/dockers/docker-sonic-vs/versions-deb-bullseye b/files/build/versions/dockers/docker-sonic-vs/versions-deb-bullseye
index 6766a3285..27ec4b678 100644
--- a/files/build/versions/dockers/docker-sonic-vs/versions-deb-bullseye
+++ b/files/build/versions/dockers/docker-sonic-vs/versions-deb-bullseye
@@ -13,7 +13,7 @@ fontconfig-config==2.13.1-4.2
 fonts-dejavu-core==2.37-2
 fonts-font-awesome==5.0.10+really4.7.0~dfsg-4.1
 fonts-lato==2.0-2.1
-frr==8.5.1-sonic-0
+frr==8.5.4-sonic-0
 gettext-base==0.21-4
 gir1.2-glib-2.0==1.66.1-1+b1
 gnupg==2.2.27-2+deb11u2
@@ -29,7 +29,7 @@ grub-common==2.06-3~deb11u6
 grub2-common==2.06-3~deb11u6
 icu-devtools==67.1-7
 ifupdown==0.8.36
-iproute2==5.10.0-4sonic1
+iproute2==6.1.0-3~bpo11+1
 iptables==1.8.7-1
 krb5-multidev==1.18.3-6+deb11u4+fips
 libapparmor1==2.13.6-10
@@ -38,8 +38,8 @@ libblkid-dev==2.36.1-8+deb11u2
 libblkid1==2.36.1-8+deb11u2
 libbsd-dev==0.11.3-1+deb11u1
 libc-ares2==1.17.1-1+deb11u3
-libc-dev-bin==2.31-13+deb11u8
-libc6-dev==2.31-13+deb11u8
+libc-dev-bin==2.31-13+deb11u10
+libc6-dev==2.31-13+deb11u10
 libcbor0==0.5.0+dfsg-2
 libcrypt-dev==1:4.4.18-4
 libdevmapper1.02.1==2:1.02.175-2.1
@@ -52,8 +52,8 @@ libfreetype6==2.10.4+dfsg-1+deb11u1
 libfreetype6-dev==2.10.4+dfsg-1+deb11u1
 libfuse2==2.9.9-5
 libgirepository-1.0-1==1.66.1-1+b1
-libglib2.0-0==2.66.8-1+deb11u1
-libglib2.0-data==2.66.8-1+deb11u1
+libglib2.0-0==2.66.8-1+deb11u3
+libglib2.0-data==2.66.8-1+deb11u3
 libgssapi-krb5-2==1.18.3-6+deb11u4+fips
 libgssrpc4==1.18.3-6+deb11u4+fips
 libicu-dev==67.1-7
@@ -104,7 +104,7 @@ libxml2==2.9.10+dfsg-6.7+deb11u4
 libxml2-dev==2.9.10+dfsg-6.7+deb11u4
 libyang2==2.0.112-6
 libzmq3-dev==4.3.4-1+deb11u1
-linux-libc-dev==5.10.209-2
+linux-libc-dev==5.10.216-1
 logrotate==3.18.0-2+deb11u2
 lsof==4.93.2+dfsg-1.1
 mailcap==3.69
diff --git a/files/build/versions/dockers/docker-sonic-vs/versions-py3 b/files/build/versions/dockers/docker-sonic-vs/versions-py3
index 9830e0374..d0d352f18 100644
--- a/files/build/versions/dockers/docker-sonic-vs/versions-py3
+++ b/files/build/versions/dockers/docker-sonic-vs/versions-py3
@@ -7,12 +7,12 @@ charset-normalizer==3.3.2
 click==7.0
 click-log==0.4.0
 colorful==0.5.6
-cryptography==42.0.5
+cryptography==42.0.7
 dbus-python==1.3.2
 docker==7.0.0
 docker-image-py==0.1.12
 enlighten==1.12.4
-filelock==3.13.4
+filelock==3.14.0
 idna==3.7
 importlib-metadata==6.1.0
 jsonpatch==1.33
@@ -25,10 +25,11 @@ paramiko==2.11.0
 pexpect==4.9.0
 prefixed==0.7.1
 prettyprinter==0.18.0
+psutil==5.9.8
 ptyprocess==0.7.0
 pycairo==1.26.0
 pycparser==2.22
-pygments==2.17.2
+pygments==2.18.0
 pygobject==3.48.2
 pynacl==1.5.0
 pyroute2==0.5.14
diff --git a/files/build/versions/dockers/docker-swss-layer-bookworm/versions-mirror b/files/build/versions/dockers/docker-swss-layer-bookworm/versions-mirror
deleted file mode 100644
index 18bbd1153..000000000
--- a/files/build/versions/dockers/docker-swss-layer-bookworm/versions-mirror
+++ /dev/null
@@ -1 +0,0 @@
-deb.debian.org_debian_dists_bookworm-updates==2024-04-20T02:13:22Z
diff --git a/files/build/versions/dockers/docker-syncd-brcm-dnx-rpc/versions-deb-bullseye b/files/build/versions/dockers/docker-syncd-brcm-dnx-rpc/versions-deb-bullseye
index 5aa883cb4..ccec9b25c 100644
--- a/files/build/versions/dockers/docker-syncd-brcm-dnx-rpc/versions-deb-bullseye
+++ b/files/build/versions/dockers/docker-syncd-brcm-dnx-rpc/versions-deb-bullseye
@@ -15,8 +15,8 @@ libarchive13==3.4.3-2+deb11u1
 libasan6==10.2.1-6
 libbinutils==2.35.2-2
 libboost-atomic1.74.0==1.74.0-9
-libc-dev-bin==2.31-13+deb11u8
-libc6-dev==2.31-13+deb11u8
+libc-dev-bin==2.31-13+deb11u10
+libc6-dev==2.31-13+deb11u10
 libcc1-0==10.2.1-6
 libcrypt-dev==1:4.4.18-4
 libctf-nobfd0==2.35.2-2
@@ -26,7 +26,7 @@ libdpkg-perl==1.20.13
 libexpat1-dev==2.2.10-2+deb11u5
 libffi-dev==3.3-6
 libgcc-10-dev==10.2.1-6
-libglib2.0-0==2.66.8-1+deb11u1
+libglib2.0-0==2.66.8-1+deb11u3
 libgomp1==10.2.1-6
 libicu67==67.1-7
 libisl23==0.23-1
@@ -57,7 +57,7 @@ libtsan0==10.2.1-6
 libubsan1==10.2.1-6
 libuv1==1.40.0-2+deb11u1
 libxml2==2.9.10+dfsg-6.7+deb11u4
-linux-libc-dev==5.10.209-2
+linux-libc-dev==5.10.216-1
 mailcap==3.69
 make==4.3-4.1
 mime-support==3.66
diff --git a/files/build/versions/dockers/docker-syncd-brcm-dnx/versions-deb-bullseye b/files/build/versions/dockers/docker-syncd-brcm-dnx/versions-deb-bullseye
index 6a726d5df..72bbb5739 100644
--- a/files/build/versions/dockers/docker-syncd-brcm-dnx/versions-deb-bullseye
+++ b/files/build/versions/dockers/docker-syncd-brcm-dnx/versions-deb-bullseye
@@ -10,7 +10,7 @@ libdebuginfod1==0.183-1
 libdw1==0.183-1
 libedit2==3.1-20191231-2+b1
 libfido2-1==1.6.0-2
-libglib2.0-0==2.66.8-1+deb11u1
+libglib2.0-0==2.66.8-1+deb11u3
 libgpm2==1.20.7-8
 libicu67==67.1-7
 libipt2==2.0.3-1
diff --git a/files/build/versions/dockers/docker-syncd-brcm-rpc/versions-deb-bullseye b/files/build/versions/dockers/docker-syncd-brcm-rpc/versions-deb-bullseye
index 5aa883cb4..ccec9b25c 100644
--- a/files/build/versions/dockers/docker-syncd-brcm-rpc/versions-deb-bullseye
+++ b/files/build/versions/dockers/docker-syncd-brcm-rpc/versions-deb-bullseye
@@ -15,8 +15,8 @@ libarchive13==3.4.3-2+deb11u1
 libasan6==10.2.1-6
 libbinutils==2.35.2-2
 libboost-atomic1.74.0==1.74.0-9
-libc-dev-bin==2.31-13+deb11u8
-libc6-dev==2.31-13+deb11u8
+libc-dev-bin==2.31-13+deb11u10
+libc6-dev==2.31-13+deb11u10
 libcc1-0==10.2.1-6
 libcrypt-dev==1:4.4.18-4
 libctf-nobfd0==2.35.2-2
@@ -26,7 +26,7 @@ libdpkg-perl==1.20.13
 libexpat1-dev==2.2.10-2+deb11u5
 libffi-dev==3.3-6
 libgcc-10-dev==10.2.1-6
-libglib2.0-0==2.66.8-1+deb11u1
+libglib2.0-0==2.66.8-1+deb11u3
 libgomp1==10.2.1-6
 libicu67==67.1-7
 libisl23==0.23-1
@@ -57,7 +57,7 @@ libtsan0==10.2.1-6
 libubsan1==10.2.1-6
 libuv1==1.40.0-2+deb11u1
 libxml2==2.9.10+dfsg-6.7+deb11u4
-linux-libc-dev==5.10.209-2
+linux-libc-dev==5.10.216-1
 mailcap==3.69
 make==4.3-4.1
 mime-support==3.66
diff --git a/files/build/versions/dockers/docker-syncd-brcm/versions-deb-bullseye b/files/build/versions/dockers/docker-syncd-brcm/versions-deb-bullseye
index 225a59d00..1c5b66ad5 100644
--- a/files/build/versions/dockers/docker-syncd-brcm/versions-deb-bullseye
+++ b/files/build/versions/dockers/docker-syncd-brcm/versions-deb-bullseye
@@ -10,7 +10,7 @@ libdebuginfod1==0.183-1
 libdw1==0.183-1
 libedit2==3.1-20191231-2+b1
 libfido2-1==1.6.0-2
-libglib2.0-0==2.66.8-1+deb11u1
+libglib2.0-0==2.66.8-1+deb11u3
 libgpm2==1.20.7-8
 libicu67==67.1-7
 libipt2==2.0.3-1
diff --git a/files/build/versions/dockers/docker-syncd-centec-rpc/versions-deb-bullseye b/files/build/versions/dockers/docker-syncd-centec-rpc/versions-deb-bullseye
index 5aa883cb4..ccec9b25c 100644
--- a/files/build/versions/dockers/docker-syncd-centec-rpc/versions-deb-bullseye
+++ b/files/build/versions/dockers/docker-syncd-centec-rpc/versions-deb-bullseye
@@ -15,8 +15,8 @@ libarchive13==3.4.3-2+deb11u1
 libasan6==10.2.1-6
 libbinutils==2.35.2-2
 libboost-atomic1.74.0==1.74.0-9
-libc-dev-bin==2.31-13+deb11u8
-libc6-dev==2.31-13+deb11u8
+libc-dev-bin==2.31-13+deb11u10
+libc6-dev==2.31-13+deb11u10
 libcc1-0==10.2.1-6
 libcrypt-dev==1:4.4.18-4
 libctf-nobfd0==2.35.2-2
@@ -26,7 +26,7 @@ libdpkg-perl==1.20.13
 libexpat1-dev==2.2.10-2+deb11u5
 libffi-dev==3.3-6
 libgcc-10-dev==10.2.1-6
-libglib2.0-0==2.66.8-1+deb11u1
+libglib2.0-0==2.66.8-1+deb11u3
 libgomp1==10.2.1-6
 libicu67==67.1-7
 libisl23==0.23-1
@@ -57,7 +57,7 @@ libtsan0==10.2.1-6
 libubsan1==10.2.1-6
 libuv1==1.40.0-2+deb11u1
 libxml2==2.9.10+dfsg-6.7+deb11u4
-linux-libc-dev==5.10.209-2
+linux-libc-dev==5.10.216-1
 mailcap==3.69
 make==4.3-4.1
 mime-support==3.66
diff --git a/files/build/versions/dockers/docker-syncd-centec/versions-deb-bullseye b/files/build/versions/dockers/docker-syncd-centec/versions-deb-bullseye
index a3b48eb31..f9547ecf8 100644
--- a/files/build/versions/dockers/docker-syncd-centec/versions-deb-bullseye
+++ b/files/build/versions/dockers/docker-syncd-centec/versions-deb-bullseye
@@ -9,7 +9,7 @@ libdebuginfod1==0.183-1
 libdw1==0.183-1
 libedit2==3.1-20191231-2+b1
 libfido2-1==1.6.0-2
-libglib2.0-0==2.66.8-1+deb11u1
+libglib2.0-0==2.66.8-1+deb11u3
 libgpm2==1.20.7-8
 libhiredis0.14-dbgsym==0.14.1-1
 libicu67==67.1-7
diff --git a/files/build/versions/dockers/docker-syncd-mlnx-rpc/versions-deb-bookworm b/files/build/versions/dockers/docker-syncd-mlnx-rpc/versions-deb-bookworm
new file mode 100644
index 000000000..5fa2d43ee
--- /dev/null
+++ b/files/build/versions/dockers/docker-syncd-mlnx-rpc/versions-deb-bookworm
@@ -0,0 +1,18 @@
+cmake-data==3.25.1-1
+libboost-atomic1.74.0==1.74.0+ds1-21
+libdouble-conversion3==3.2.1-1
+libglib2.0-0==2.74.6-2+deb12u2
+libnanomsg-dev==1.1.5+dfsg-1.1+b1
+libnanomsg5==1.1.5+dfsg-1.1+b1
+libpcre2-16-0==10.42-1
+libqt5core5a==5.15.8+dfsg-11
+libqt5dbus5==5.15.8+dfsg-11
+libqt5network5==5.15.8+dfsg-11
+libthrift-0.17.0==0.17.0-2+b2
+netbase==6.4
+python3-scapy==2.5.0+dfsg-2
+python3-thrift==0.17.0-2+b2
+shared-mime-info==2.2-1
+syncd-rpc==1.0.0
+thrift-compiler==0.17.0-2+b2
+wget==1.21.3-1+b2
diff --git a/files/build/versions/dockers/docker-syncd-mlnx-rpc/versions-py3 b/files/build/versions/dockers/docker-syncd-mlnx-rpc/versions-py3
index 9ad41d81d..cf9d9ebd3 100644
--- a/files/build/versions/dockers/docker-syncd-mlnx-rpc/versions-py3
+++ b/files/build/versions/dockers/docker-syncd-mlnx-rpc/versions-py3
@@ -2,4 +2,5 @@ cffi==1.16.0
 nnpy==1.4.2
 ptf==0.10.0
 pycparser==2.22
-scapy==2.4.0
+scapy==2.5.0
+thrift==0.17.0
diff --git a/files/build/versions/dockers/docker-syncd-mlnx/versions-deb-bookworm b/files/build/versions/dockers/docker-syncd-mlnx/versions-deb-bookworm
new file mode 100644
index 000000000..c6b09dbd0
--- /dev/null
+++ b/files/build/versions/dockers/docker-syncd-mlnx/versions-deb-bookworm
@@ -0,0 +1,74 @@
+applibs==1.mlnx.4.6.3064
+applibs-dev==1.mlnx.4.6.3064
+gdb==13.1-3
+gdbserver==13.1-3
+iproute2-mlnx==6.1.0-3
+libbabeltrace1==1.5.11-1+b2
+libboost-regex1.74.0==1.74.0+ds1-21
+libc-dev-bin==2.36-9+deb12u7
+libc6-dev==2.36-9+deb12u7
+libcbor0.8==0.8.0-2+b1
+libcurl3-gnutls==7.88.1-10+deb12u5
+libdebuginfod-common==0.188-2.1
+libdebuginfod1==0.188-2.1
+libdw1==0.188-2.1
+libedit2==3.1-20221030-2
+libexpat1-dev==2.5.0-1
+libfido2-1==1.12.0-2+b1
+libglib2.0-0==2.74.6-2+deb12u2
+libgpm2==1.20.7-10+b1
+libicu72==72.1-3
+libipt2==2.0.5-1
+libjs-sphinxdoc==5.3.0-4
+libjs-underscore==1.13.4~dfsg+~1.11.4-3
+libmpfr6==4.2.0-1
+libnsl-dev==1.3.0-2
+libpython3-dev==3.11.2-1+b1
+libpython3.11-dev==3.11.2-6
+libsaimetadata==1.0.0
+libsaimetadata-dbgsym==1.0.0
+libsairedis==1.0.0
+libsairedis-dbgsym==1.0.0
+libsource-highlight-common==3.1.9-4.2
+libsource-highlight4v5==3.1.9-4.2+b3
+libswsscommon-dbgsym==1.0.0
+libtirpc-dev==1.3.3+ds-1
+libunwind8==1.6.2-3
+libxml2==2.9.14+dfsg-1.3~deb12u1
+linux-libc-dev==6.1.90-1
+mft==4.27.0-83
+mft-fwtrace-cfg==1.0.0
+mlnx-sai==1.mlnx.SAIBuild2311.27.0.16
+openssh-client==1:9.2p1-2+deb12u2
+python-sdk-api==1.mlnx.4.6.3064
+python3-attr==22.2.0-1
+python3-dev==3.11.2-1+b1
+python3-jsonschema==4.10.3-1
+python3-pip==23.0.1+dfsg-1
+python3-pyrsistent==0.18.1-1+b3
+python3.11-dev==3.11.2-6
+rpcsvc-proto==1.4.3-1
+sensible-utils==0.0.17+nmu1
+sshpass==1.09-1+b1
+strace==6.1-0.1
+sx-acl-helper==1.mlnx.4.6.3064
+sx-acl-helper-dev==1.mlnx.4.6.3064
+sx-complib==1.mlnx.4.6.3064
+sx-complib-dev==1.mlnx.4.6.3064
+sx-examples==1.mlnx.4.6.3064
+sx-examples-dev==1.mlnx.4.6.3064
+sx-gen-utils==1.mlnx.4.6.3064
+sx-gen-utils-dev==1.mlnx.4.6.3064
+sx-hash-calc==1.mlnx.4.6.3064
+sx-obj-desc-lib==1.mlnx.4.6.3064
+sx-obj-desc-lib-dev==1.mlnx.4.6.3064
+sxd-libs==1.mlnx.4.6.3064
+sxd-libs-dev==1.mlnx.4.6.3064
+syncd==1.0.0
+syncd-dbgsym==1.0.0
+ucf==3.0043+nmu1
+vim==2:9.0.1378-2
+vim-runtime==2:9.0.1378-2
+wjh-libs==1.mlnx.4.6.3064
+wjh-libs-dev==1.mlnx.4.6.3064
+zlib1g-dev==1:1.2.13.dfsg-1
diff --git a/files/build/versions/dockers/docker-syncd-mlnx/versions-py3 b/files/build/versions/dockers/docker-syncd-mlnx/versions-py3
index 908739d95..9330926a7 100644
--- a/files/build/versions/dockers/docker-syncd-mlnx/versions-py3
+++ b/files/build/versions/dockers/docker-syncd-mlnx/versions-py3
@@ -1,7 +1,8 @@
-attrs==20.3.0
+attrs==22.2.0
 importlib-metadata==1.6.0
-jsonschema==3.2.0
+jsonschema==4.10.3
 more-itertools==4.2.0
-pyrsistent==0.15.5
+pyrsistent==0.18.1
+python-sdk-api==4.6.3064
 python_sdk_api==4.6.3064
 zipp==1.0.0
diff --git a/files/build/versions/dockers/docker-syncd-mrvl/versions-deb-bookworm-arm64 b/files/build/versions/dockers/docker-syncd-mrvl/versions-deb-bookworm-arm64
new file mode 100644
index 000000000..86b1a2416
--- /dev/null
+++ b/files/build/versions/dockers/docker-syncd-mrvl/versions-deb-bookworm-arm64
@@ -0,0 +1,24 @@
+iputils-ping==3:20221126-1
+libdbus-1-dev==1.14.10-1~deb12u1
+libexpat1-dev==2.5.0-1
+libjs-sphinxdoc==5.3.0-4
+libjs-underscore==1.13.4~dfsg+~1.11.4-3
+libpcap-dev==1.10.3-1
+libpcap0.8==1.10.3-1
+libpcap0.8-dev==1.10.3-1
+libpkgconf3==1.8.1-1
+libpython3-dev==3.11.2-1+b1
+libpython3.11-dev==3.11.2-6
+libsaimetadata==1.0.0
+libsairedis==1.0.0
+mrvllibsai==1.13.0-1
+pkg-config==1.8.1-1
+pkgconf==1.8.1-1
+pkgconf-bin==1.8.1-1
+python3-dev==3.11.2-1+b1
+python3.11-dev==3.11.2-6
+sgml-base==1.31
+swig==4.1.0-0.2
+swig4.0==4.1.0-0.2
+syncd==1.0.0
+xml-core==0.18+nmu1
diff --git a/files/build/versions/dockers/docker-syncd-mrvl/versions-deb-bookworm-armhf b/files/build/versions/dockers/docker-syncd-mrvl/versions-deb-bookworm-armhf
new file mode 100644
index 000000000..0cc251c1f
--- /dev/null
+++ b/files/build/versions/dockers/docker-syncd-mrvl/versions-deb-bookworm-armhf
@@ -0,0 +1,24 @@
+iputils-ping==3:20221126-1
+libdbus-1-dev==1.14.10-1~deb12u1
+libexpat1-dev==2.5.0-1
+libjs-sphinxdoc==5.3.0-4
+libjs-underscore==1.13.4~dfsg+~1.11.4-3
+libpcap-dev==1.10.3-1
+libpcap0.8==1.10.3-1
+libpcap0.8-dev==1.10.3-1
+libpkgconf3==1.8.1-1
+libpython3-dev==3.11.2-1+b1
+libpython3.11-dev==3.11.2-6
+libsaimetadata==1.0.0
+libsairedis==1.0.0
+mrvllibsai==1.13.0-3
+pkg-config==1.8.1-1
+pkgconf==1.8.1-1
+pkgconf-bin==1.8.1-1
+python3-dev==3.11.2-1+b1
+python3.11-dev==3.11.2-6
+sgml-base==1.31
+swig==4.1.0-0.2
+swig4.0==4.1.0-0.2
+syncd==1.0.0
+xml-core==0.18+nmu1
diff --git a/files/build/versions/dockers/docker-syncd-vs/versions-deb-bookworm b/files/build/versions/dockers/docker-syncd-vs/versions-deb-bookworm
new file mode 100644
index 000000000..afd567e7c
--- /dev/null
+++ b/files/build/versions/dockers/docker-syncd-vs/versions-deb-bookworm
@@ -0,0 +1,35 @@
+gdb==13.1-3
+gdbserver==13.1-3
+libbabeltrace1==1.5.11-1+b2
+libboost-regex1.74.0==1.74.0+ds1-21
+libcbor0.8==0.8.0-2+b1
+libcurl3-gnutls==7.88.1-10+deb12u5
+libdebuginfod-common==0.188-2.1
+libdebuginfod1==0.188-2.1
+libdw1==0.188-2.1
+libedit2==3.1-20221030-2
+libfido2-1==1.12.0-2+b1
+libglib2.0-0==2.74.6-2+deb12u2
+libgpm2==1.20.7-10+b1
+libicu72==72.1-3
+libipt2==2.0.5-1
+libmpfr6==4.2.0-1
+libsaimetadata==1.0.0
+libsaimetadata-dbgsym==1.0.0
+libsairedis==1.0.0
+libsairedis-dbgsym==1.0.0
+libsaivs==1.0.0
+libsaivs-dbgsym==1.0.0
+libsource-highlight-common==3.1.9-4.2
+libsource-highlight4v5==3.1.9-4.2+b3
+libswsscommon-dbgsym==1.0.0
+libunwind8==1.6.2-3
+openssh-client==1:9.2p1-2+deb12u2
+sensible-utils==0.0.17+nmu1
+sshpass==1.09-1+b1
+strace==6.1-0.1
+syncd-vs==1.0.0
+syncd-vs-dbgsym==1.0.0
+ucf==3.0043+nmu1
+vim==2:9.0.1378-2
+vim-runtime==2:9.0.1378-2
diff --git a/files/build/versions/dockers/docker-teamd/versions-deb-bookworm b/files/build/versions/dockers/docker-teamd/versions-deb-bookworm
index 22d08f783..b2369562d 100644
--- a/files/build/versions/dockers/docker-teamd/versions-deb-bookworm
+++ b/files/build/versions/dockers/docker-teamd/versions-deb-bookworm
@@ -9,7 +9,7 @@ libdebuginfod1==0.188-2.1
 libdw1==0.188-2.1
 libedit2==3.1-20221030-2
 libfido2-1==1.12.0-2+b1
-libglib2.0-0==2.74.6-2
+libglib2.0-0==2.74.6-2+deb12u2
 libgpm2==1.20.7-10+b1
 libicu72==72.1-3
 libipt2==2.0.5-1
diff --git a/files/build/versions/dockers/docker-teamd/versions-mirror b/files/build/versions/dockers/docker-teamd/versions-mirror
deleted file mode 100644
index 18bbd1153..000000000
--- a/files/build/versions/dockers/docker-teamd/versions-mirror
+++ /dev/null
@@ -1 +0,0 @@
-deb.debian.org_debian_dists_bookworm-updates==2024-04-20T02:13:22Z
diff --git a/files/build/versions/dockers/sonic-slave-bookworm/versions-deb-bookworm b/files/build/versions/dockers/sonic-slave-bookworm/versions-deb-bookworm
index 2e0c8d12e..af573272f 100644
--- a/files/build/versions/dockers/sonic-slave-bookworm/versions-deb-bookworm
+++ b/files/build/versions/dockers/sonic-slave-bookworm/versions-deb-bookworm
@@ -110,7 +110,7 @@ docbook-xml==4.5-12
 docker-buildx-plugin==0.10.5-1~debian.12~bookworm
 docker-ce==5:24.0.2-1~debian.12~bookworm
 docker-ce-cli==5:24.0.2-1~debian.12~bookworm
-docker-ce-rootless-extras==5:26.0.2-1~debian.12~bookworm
+docker-ce-rootless-extras==5:26.1.2-1~debian.12~bookworm
 docker-compose-plugin==2.18.1-1~debian.12~bookworm
 docutils-common==0.19+dfsg-6
 dosfstools==4.2-1
@@ -247,7 +247,7 @@ kmod==30+20221128-1
 krb5-locales==1.20.1-2+deb12u1
 krb5-multidev==1.20.1-2+deb12u1
 lcov==1.16-1
-less==590-2
+less==590-2.1~deb12u2
 lib2geom1.2.0==1.2.2-3
 lib32asan8==12.2.0-14
 lib32atomic1==12.2.0-14
@@ -398,16 +398,18 @@ libbsh-java==2.0b4-20
 libbz2-dev==1.0.8-5+b1
 libc-ares-dev==1.18.1-3
 libc-ares2==1.18.1-3
-libc-dev-bin==2.36-9+deb12u4
-libc-devtools==2.36-9+deb12u4
-libc-l10n==2.36-9+deb12u4
+libc-bin==2.36-9+deb12u7
+libc-dev-bin==2.36-9+deb12u7
+libc-devtools==2.36-9+deb12u7
+libc-l10n==2.36-9+deb12u7
+libc6==2.36-9+deb12u7
 libc6-armhf-cross==2.36-8cross1
-libc6-dbg==2.36-9+deb12u4
-libc6-dev==2.36-9+deb12u4
-libc6-dev-i386==2.36-9+deb12u4
-libc6-dev-x32==2.36-9+deb12u4
-libc6-i386==2.36-9+deb12u4
-libc6-x32==2.36-9+deb12u4
+libc6-dbg==2.36-9+deb12u7
+libc6-dev==2.36-9+deb12u7
+libc6-dev-i386==2.36-9+deb12u7
+libc6-dev-x32==2.36-9+deb12u7
+libc6-i386==2.36-9+deb12u7
+libc6-x32==2.36-9+deb12u7
 libcaca0==0.99.beta20-3
 libcacard0==1:2.8.0-3
 libcairo-gobject2==1.16.0-7
@@ -498,7 +500,7 @@ libdate-calc-xs-perl==6.4-2+b1
 libdate-manip-perl==6.91-1
 libdatrie-dev==0.2.13-2+b1
 libdatrie1==0.2.13-2+b1
-libdav1d6==1.0.0-2
+libdav1d6==1.0.0-2+deb12u1
 libdaxctl1==76.1-1
 libdb-dev==5.3.2
 libdb5.3-dev==5.3.28+dfsg2-1
@@ -630,6 +632,7 @@ libfreezethaw-perl==0.5001-3
 libfribidi-dev==1.0.8-2.1
 libfribidi0==1.0.8-2.1
 libfstrm0==0.6.1-1
+libfuse-dev==2.9.9-6+b1
 libfuse2==2.9.9-6+b1
 libfuse3-3==3.14.0-4
 libgail-common==2.24.33-2
@@ -667,11 +670,11 @@ libglapi-mesa==22.3.6-1+deb12u1
 libgles-dev==1.6.0-1
 libgles1==1.6.0-1
 libgles2==1.6.0-1
-libglib2.0-0==2.74.6-2
-libglib2.0-bin==2.74.6-2
-libglib2.0-data==2.74.6-2
-libglib2.0-dev==2.74.6-2
-libglib2.0-dev-bin==2.74.6-2
+libglib2.0-0==2.74.6-2+deb12u2
+libglib2.0-bin==2.74.6-2+deb12u2
+libglib2.0-data==2.74.6-2+deb12u2
+libglib2.0-dev==2.74.6-2+deb12u2
+libglib2.0-dev-bin==2.74.6-2+deb12u2
 libglibmm-2.4-1v5==2.66.5-2
 libglu1-mesa==9.0.2-1.1
 libglu1-mesa-dev==9.0.2-1.1
@@ -1177,7 +1180,7 @@ librsvg2-common==2.54.7+dfsg-1~deb12u1
 librtmp1==2.4+20151223.gitfa8646d.1-2+b2
 librubberband2==3.1.2+dfsg0-1
 libruby==1:3.1
-libruby3.1==3.1.2-7
+libruby3.1==3.1.2-7+deb12u1
 libsamplerate0==0.2.2-3
 libsasl2-2==2.1.28+dfsg-10
 libsasl2-modules==2.1.28+dfsg-10
@@ -1294,6 +1297,8 @@ libthai-data==0.1.29-1
 libthai-dev==0.1.29-1
 libthai0==0.1.29-1
 libtheora0==1.1.1+dfsg.1-16.1+b1
+libthrift-0.17.0==0.17.0-2+b2
+libthrift-dev==0.17.0-2+b2
 libtie-ixhash-perl==1.23-4
 libtiff-dev==4.5.0-6+deb12u1
 libtiff6==4.5.0-6+deb12u1
@@ -1523,14 +1528,14 @@ libzvbi0==0.2.41-1
 libzzip-0-13==0.13.72+dfsg.1-1.1
 licensecheck==3.3.5-1
 lintian==2.116.3
-linux-compiler-gcc-12-x86==6.1.85-1
-linux-headers-6.1.0-20-amd64==6.1.85-1
-linux-headers-6.1.0-20-arm64==6.1.85-1
-linux-headers-6.1.0-20-common==6.1.85-1
-linux-headers-amd64==6.1.85-1
-linux-headers-arm64==6.1.85-1
-linux-kbuild-6.1==6.1.85-1
-linux-libc-dev==6.1.85-1
+linux-compiler-gcc-12-x86==6.1.90-1
+linux-headers-6.1.0-21-amd64==6.1.90-1
+linux-headers-6.1.0-21-arm64==6.1.90-1
+linux-headers-6.1.0-21-common==6.1.90-1
+linux-headers-amd64==6.1.90-1
+linux-headers-arm64==6.1.90-1
+linux-kbuild-6.1==6.1.90-1
+linux-libc-dev==6.1.90-1
 linuxdoc-tools==0.9.82-1
 llvm-14==1:14.0.6-12
 llvm-14-dev==1:14.0.6-12
@@ -1538,7 +1543,7 @@ llvm-14-linker-tools==1:14.0.6-12
 llvm-14-runtime==1:14.0.6-12
 llvm-14-tools==1:14.0.6-12
 lmodern==2.005-1
-locales==2.36-9+deb12u4
+locales==2.36-9+deb12u7
 logrotate==3.21.0-1
 lsb-release==12.0-1
 lsof==4.95.0-1
@@ -1588,10 +1593,10 @@ nodejs-doc==18.19.0+dfsg-6~deb12u1
 nss-plugin-pem==1.0.8+1-1
 ocl-icd-libopencl1==2.3.1-1
 openjade==1.4devel1-22
-openjdk-17-jdk==17.0.10+7-1~deb12u1
-openjdk-17-jdk-headless==17.0.10+7-1~deb12u1
-openjdk-17-jre==17.0.10+7-1~deb12u1
-openjdk-17-jre-headless==17.0.10+7-1~deb12u1
+openjdk-17-jdk==17.0.11+9-1~deb12u1
+openjdk-17-jdk-headless==17.0.11+9-1~deb12u1
+openjdk-17-jre==17.0.11+9-1~deb12u1
+openjdk-17-jre-headless==17.0.11+9-1~deb12u1
 opensp==1.5.2-13+b2
 openssh-client==1:9.2p1-2+deb12u2
 openssh-server==1:9.2p1-2+deb12u2
@@ -1777,6 +1782,7 @@ python3-soupsieve==2.3.2-1
 python3-sphinx==5.3.0-4
 python3-sphinx-rtd-theme==1.2.0+dfsg-1
 python3-stdeb==0.10.0-2
+python3-thrift==0.17.0-2+b2
 python3-tk==3.11.2-3
 python3-toml==0.10.2-1
 python3-tomli==2.0.1-2
@@ -1817,6 +1823,7 @@ qtwayland5==5.15.8-2
 quilt==0.67+really0.66-1
 rake==13.0.6-3
 readline-common==8.2-1.3
+remake==4.3+dbg-1.6+dfsg-1
 rpcsvc-proto==1.4.3-1
 rpm-common==4.18.0+dfsg-1+deb12u1
 rpm2cpio==4.18.0+dfsg-1+deb12u1
@@ -1831,9 +1838,9 @@ ruby-rubygems==3.3.15-2
 ruby-sdbm==1.0.0-5+b1
 ruby-webrick==1.8.1-1
 ruby-xmlrpc==0.3.2-2
-ruby3.1==3.1.2-7
-ruby3.1-dev==3.1.2-7
-ruby3.1-doc==3.1.2-7
+ruby3.1==3.1.2-7+deb12u1
+ruby3.1-dev==3.1.2-7+deb12u1
+ruby3.1-doc==3.1.2-7+deb12u1
 rubygems-integration==1.18
 runit-helper==2.15.2
 sbsigntool==0.9.4-3.1
@@ -1882,6 +1889,7 @@ texlive-latex-recommended==2022.20230122-3
 texlive-pictures==2022.20230122-3
 texlive-plain-generic==2022.20230122-4
 texlive-xetex==2022.20230122-3
+thrift-compiler==0.17.0-2+b2
 time==1.9-0.2
 tipa==2:1.3-21
 tk==8.6.13
diff --git a/files/build/versions/dockers/sonic-slave-bookworm/versions-deb-bookworm-armhf b/files/build/versions/dockers/sonic-slave-bookworm/versions-deb-bookworm-armhf
index aa5cf7c82..17485c2a2 100644
--- a/files/build/versions/dockers/sonic-slave-bookworm/versions-deb-bookworm-armhf
+++ b/files/build/versions/dockers/sonic-slave-bookworm/versions-deb-bookworm-armhf
@@ -3,8 +3,8 @@ dctrl-tools==2.24-3
 dvipng==1.15-1.1
 libnanomsg-dev==1.1.5+dfsg-1.1
 libnanomsg5==1.1.5+dfsg-1.1
-linux-compiler-gcc-12-arm==6.1.85-1
-linux-headers-6.1.0-20-armmp==6.1.85-1
-linux-headers-armmp==6.1.85-1
+linux-compiler-gcc-12-arm==6.1.90-1
+linux-headers-6.1.0-21-armmp==6.1.90-1
+linux-headers-armmp==6.1.90-1
 watchdog==5.16-1+b1
 wget==1.21.3-1+b1
diff --git a/files/build/versions/dockers/sonic-slave-bookworm/versions-mirror b/files/build/versions/dockers/sonic-slave-bookworm/versions-mirror
deleted file mode 100644
index f393a67e9..000000000
--- a/files/build/versions/dockers/sonic-slave-bookworm/versions-mirror
+++ /dev/null
@@ -1 +0,0 @@
-deb.debian.org_debian_dists_bookworm-updates==2024-04-19T20:17:02Z
diff --git a/files/build/versions/dockers/sonic-slave-bookworm/versions-py3 b/files/build/versions/dockers/sonic-slave-bookworm/versions-py3
index f4259abbb..7781b8119 100644
--- a/files/build/versions/dockers/sonic-slave-bookworm/versions-py3
+++ b/files/build/versions/dockers/sonic-slave-bookworm/versions-py3
@@ -99,8 +99,8 @@ python-magic==0.4.26
 pytz==2022.7.1
 pyxdg==0.28
 pyyaml==6.0
-redis==5.0.3
-regex==2024.4.16
+redis==5.0.4
+regex==2024.5.10
 requests==2.28.1
 roman==3.3
 scour==0.38.2
@@ -115,6 +115,7 @@ sphinx==5.3.0
 sphinx-rtd-theme==1.2.0
 stdeb==0.10.0
 stgit==0.19
+thrift==0.17.0
 toml==0.10.2
 tomli==2.0.1
 tomlkit==0.11.7
diff --git a/files/build/versions/dockers/sonic-slave-bullseye/versions-deb-bullseye b/files/build/versions/dockers/sonic-slave-bullseye/versions-deb-bullseye
index 739eb3c63..527521bb3 100644
--- a/files/build/versions/dockers/sonic-slave-bullseye/versions-deb-bullseye
+++ b/files/build/versions/dockers/sonic-slave-bullseye/versions-deb-bullseye
@@ -105,7 +105,7 @@ docbook-xsl==1.79.2+dfsg-1
 docker-buildx-plugin==0.10.5-1~debian.11~bullseye
 docker-ce==5:24.0.2-1~debian.11~bullseye
 docker-ce-cli==5:24.0.2-1~debian.11~bullseye
-docker-ce-rootless-extras==5:26.0.2-1~debian.11~bullseye
+docker-ce-rootless-extras==5:26.1.2-1~debian.11~bullseye
 docker-compose-plugin==2.18.1-1~debian.11~bullseye
 docutils-common==0.16+dfsg-4
 dosfstools==4.2-1
@@ -207,6 +207,7 @@ gstreamer1.0-plugins-good==1.18.4-2+deb11u2
 gstreamer1.0-x==1.18.4-2+deb11u1
 gtk-update-icon-cache==3.24.24-4+deb11u3
 guile-2.2-libs==2.2.7+1-6
+guile-3.0-libs==3.0.5-4
 hicolor-icon-theme==0.17-2
 i965-va-driver==2.4.1+dfsg1-1
 ibverbs-providers==33.2-1
@@ -232,7 +233,7 @@ kernel-wedge==2.104
 kmod==28-1
 krb5-multidev==1.18.3-6+deb11u4
 lcov==1.14-2
-less==551-2
+less==551-2+deb11u2
 lib32asan6==10.2.1-6
 lib32atomic1==10.2.1-6
 lib32gcc-10-dev==10.2.1-6
@@ -382,16 +383,17 @@ libbsh-java==2.0b4-20
 libbz2-dev==1.0.8-4
 libc-ares-dev==1.17.1-1+deb11u3
 libc-ares2==1.17.1-1+deb11u3
-libc-dev-bin==2.31-13+deb11u8
-libc-devtools==2.31-13+deb11u8
-libc-l10n==2.31-13+deb11u8
+libc-dev-bin==2.31-13+deb11u10
+libc-devtools==2.31-13+deb11u10
+libc-l10n==2.31-13+deb11u10
+libc6==2.31-13+deb11u10
 libc6-armhf-cross==2.31-9cross4
-libc6-dbg==2.31-13+deb11u8
-libc6-dev==2.31-13+deb11u8
-libc6-dev-i386==2.31-13+deb11u8
-libc6-dev-x32==2.31-13+deb11u8
-libc6-i386==2.31-13+deb11u8
-libc6-x32==2.31-13+deb11u8
+libc6-dbg==2.31-13+deb11u10
+libc6-dev==2.31-13+deb11u10
+libc6-dev-i386==2.31-13+deb11u10
+libc6-dev-x32==2.31-13+deb11u10
+libc6-i386==2.31-13+deb11u10
+libc6-x32==2.31-13+deb11u10
 libcaca0==0.99.beta19-2.2
 libcacard0==1:2.8.0-3
 libcairo-gobject2==1.16.0-5
@@ -472,7 +474,7 @@ libdata-optlist-perl==0.110-1.1
 libdata-validate-domain-perl==0.10-1.1
 libdatrie-dev==0.2.13-1
 libdatrie1==0.2.13-1
-libdav1d4==0.7.1-3
+libdav1d4==0.7.1-3+deb11u1
 libdaxctl1==71.1-1
 libdb-dev==5.3.1+nmu1
 libdb5.3-dev==5.3.28+dfsg1-0.8
@@ -625,11 +627,11 @@ libglapi-mesa==20.3.5-1
 libgles-dev==1.3.2-1
 libgles1==1.3.2-1
 libgles2==1.3.2-1
-libglib2.0-0==2.66.8-1+deb11u1
-libglib2.0-bin==2.66.8-1+deb11u1
-libglib2.0-data==2.66.8-1+deb11u1
-libglib2.0-dev==2.66.8-1+deb11u1
-libglib2.0-dev-bin==2.66.8-1+deb11u1
+libglib2.0-0==2.66.8-1+deb11u3
+libglib2.0-bin==2.66.8-1+deb11u3
+libglib2.0-data==2.66.8-1+deb11u3
+libglib2.0-dev==2.66.8-1+deb11u3
+libglib2.0-dev-bin==2.66.8-1+deb11u3
 libglu1-mesa==9.0.1-1
 libglu1-mesa-dev==9.0.1-1
 libglvnd-dev==1.3.2-1
@@ -1417,19 +1419,19 @@ libzvbi0==0.2.35-18
 libzzip-0-13==0.13.62-3.3+deb11u1
 licensecheck==3.1.1-2
 lintian==2.104.0
-linux-compiler-gcc-10-x86==5.10.209-2
-linux-headers-5.10.0-28-amd64==5.10.209-2
-linux-headers-5.10.0-28-arm64==5.10.209-2
-linux-headers-5.10.0-28-common==5.10.209-2
-linux-headers-amd64==5.10.209-2
-linux-headers-arm64==5.10.209-2
-linux-kbuild-5.10==5.10.209-2
-linux-libc-dev==5.10.209-2
+linux-compiler-gcc-10-x86==5.10.216-1
+linux-headers-5.10.0-29-amd64==5.10.216-1
+linux-headers-5.10.0-29-arm64==5.10.216-1
+linux-headers-5.10.0-29-common==5.10.216-1
+linux-headers-amd64==5.10.216-1
+linux-headers-arm64==5.10.216-1
+linux-kbuild-5.10==5.10.216-1
+linux-libc-dev==5.10.216-1
 linuxdoc-tools==0.9.82-1
 llvm-11==1:11.0.1-2
 llvm-11-runtime==1:11.0.1-2
 lmodern==2.004.5-6.1
-locales==2.31-13+deb11u8
+locales==2.31-13+deb11u10
 logrotate==3.18.0-2+deb11u2
 lsb-release==11.1.0
 lsof==4.93.2+dfsg-1.1
@@ -1472,10 +1474,10 @@ node-jquery==3.5.1+dfsg+~3.5.5-7
 nodejs==14.21.3-deb-1nodesource1
 ocl-icd-libopencl1==2.2.14-2
 openjade==1.4devel1-22
-openjdk-11-jdk==11.0.22+7-1~deb11u1
-openjdk-11-jdk-headless==11.0.22+7-1~deb11u1
-openjdk-11-jre==11.0.22+7-1~deb11u1
-openjdk-11-jre-headless==11.0.22+7-1~deb11u1
+openjdk-11-jdk==11.0.23+9-1~deb11u1
+openjdk-11-jdk-headless==11.0.23+9-1~deb11u1
+openjdk-11-jre==11.0.23+9-1~deb11u1
+openjdk-11-jre-headless==11.0.23+9-1~deb11u1
 opensp==1.5.2-13+b2
 openssh-client==1:8.4p1-5+deb11u3
 openssh-server==1:8.4p1-5+deb11u3
@@ -1686,6 +1688,7 @@ quilt==0.66-2.1
 rake==13.0.3-1
 rake-compiler==1.1.1-1
 readline-common==8.1-1
+remake==4.3+dbg-1.5+dfsg-1
 rrdtool==1.7.2-3+b7
 rsync==3.2.3-4+deb11u1
 rsyslog==8.2102.0-2+deb11u1
diff --git a/files/build/versions/dockers/sonic-slave-bullseye/versions-deb-bullseye-armhf b/files/build/versions/dockers/sonic-slave-bullseye/versions-deb-bullseye-armhf
index 05c16b6c8..27aa80758 100644
--- a/files/build/versions/dockers/sonic-slave-bullseye/versions-deb-bullseye-armhf
+++ b/files/build/versions/dockers/sonic-slave-bullseye/versions-deb-bullseye-armhf
@@ -5,7 +5,7 @@ golang-1.15-src==1.15.15-1~deb11u4
 libjpeg-dev==1:2.0.6-4
 libjpeg62-turbo-dev==1:2.0.6-4
 libunicode-linebreak-perl==0.0.20190101-1+b2
-linux-compiler-gcc-10-arm==5.10.209-2
-linux-headers-5.10.0-28-armmp==5.10.209-2
-linux-headers-armmp==5.10.209-2
+linux-compiler-gcc-10-arm==5.10.216-1
+linux-headers-5.10.0-29-armmp==5.10.216-1
+linux-headers-armmp==5.10.216-1
 nasm==2.15.05-1
diff --git a/files/build/versions/dockers/sonic-slave-bullseye/versions-py3 b/files/build/versions/dockers/sonic-slave-bullseye/versions-py3
index 210a4c94a..43bbe1c30 100644
--- a/files/build/versions/dockers/sonic-slave-bullseye/versions-py3
+++ b/files/build/versions/dockers/sonic-slave-bullseye/versions-py3
@@ -88,8 +88,8 @@ python-magic==0.4.20
 pytz==2021.1
 pyxdg==0.27
 pyyaml==5.4.1
-redis==5.0.3
-regex==2024.4.16
+redis==5.0.4
+regex==2024.5.10
 requests==2.25.1
 roman==2.0.0
 service-identity==18.1.0
diff --git a/files/build/versions/dockers/sonic-slave-buster/versions-deb-buster b/files/build/versions/dockers/sonic-slave-buster/versions-deb-buster
index 86e292b81..42298a846 100644
--- a/files/build/versions/dockers/sonic-slave-buster/versions-deb-buster
+++ b/files/build/versions/dockers/sonic-slave-buster/versions-deb-buster
@@ -82,7 +82,7 @@ dh-systemd==12.1.1
 dictionaries-common==1.28.1
 diffstat==1.62-1
 dirmngr==2.2.12-1+deb10u2
-distro-info-data==0.41+deb10u8
+distro-info-data==0.41+deb10u9
 dkms==2.6.1-4
 dmeventd==2:1.02.155-3
 dmsetup==2:1.02.155-3
@@ -95,7 +95,7 @@ docbook-xml==4.5-8
 docker-buildx-plugin==0.10.5-1~debian.10~buster
 docker-ce==5:24.0.2-1~debian.10~buster
 docker-ce-cli==5:24.0.2-1~debian.10~buster
-docker-ce-rootless-extras==5:26.0.2-1~debian.10~buster
+docker-ce-rootless-extras==5:26.1.2-1~debian.10~buster
 docker-compose-plugin==2.18.1-1~debian.10~buster
 docutils-common==0.14+dfsg-4
 docutils-doc==0.14+dfsg-4
@@ -342,14 +342,15 @@ libbsh-java==2.0b4-19
 libbz2-dev==1.0.6-9.2~deb10u2
 libc-ares-dev==1.14.0-1+deb10u4
 libc-ares2==1.14.0-1+deb10u4
-libc-dev-bin==2.28-10+deb10u2
-libc-l10n==2.28-10+deb10u2
-libc6-dbg==2.28-10+deb10u2
-libc6-dev==2.28-10+deb10u2
-libc6-dev-i386==2.28-10+deb10u2
-libc6-dev-x32==2.28-10+deb10u2
-libc6-i386==2.28-10+deb10u2
-libc6-x32==2.28-10+deb10u2
+libc-dev-bin==2.28-10+deb10u3
+libc-l10n==2.28-10+deb10u3
+libc6==2.28-10+deb10u3
+libc6-dbg==2.28-10+deb10u3
+libc6-dev==2.28-10+deb10u3
+libc6-dev-i386==2.28-10+deb10u3
+libc6-dev-x32==2.28-10+deb10u3
+libc6-i386==2.28-10+deb10u3
+libc6-x32==2.28-10+deb10u3
 libcaca0==0.99.beta19-2.1+deb10u1
 libcacard0==1:2.6.1-1
 libcaf-openmpi-3==2.4.0-2
@@ -839,7 +840,7 @@ libnfnetlink0==1.0.1-3+b1
 libnftables0==0.9.0-2
 libnftnl-dev==1.1.2-2
 libnftnl11==1.1.2-2
-libnghttp2-14==1.36.0-2+deb10u2
+libnghttp2-14==1.36.0-2+deb10u3
 libnl-3-200==3.4.0-1
 libnl-3-dev==3.4.0-1
 libnl-route-3-200==3.4.0-1
@@ -1008,20 +1009,20 @@ libqt4-svg==4:4.8.7+dfsg-18+deb10u2
 libqt4-test==4:4.8.7+dfsg-18+deb10u2
 libqt4-xml==4:4.8.7+dfsg-18+deb10u2
 libqt4-xmlpatterns==4:4.8.7+dfsg-18+deb10u2
-libqt5concurrent5==5.11.3+dfsg1-1+deb10u5
-libqt5core5a==5.11.3+dfsg1-1+deb10u5
-libqt5dbus5==5.11.3+dfsg1-1+deb10u5
-libqt5gui5==5.11.3+dfsg1-1+deb10u5
-libqt5network5==5.11.3+dfsg1-1+deb10u5
-libqt5opengl5==5.11.3+dfsg1-1+deb10u5
-libqt5opengl5-dev==5.11.3+dfsg1-1+deb10u5
-libqt5printsupport5==5.11.3+dfsg1-1+deb10u5
-libqt5sql5==5.11.3+dfsg1-1+deb10u5
-libqt5sql5-sqlite==5.11.3+dfsg1-1+deb10u5
+libqt5concurrent5==5.11.3+dfsg1-1+deb10u6
+libqt5core5a==5.11.3+dfsg1-1+deb10u6
+libqt5dbus5==5.11.3+dfsg1-1+deb10u6
+libqt5gui5==5.11.3+dfsg1-1+deb10u6
+libqt5network5==5.11.3+dfsg1-1+deb10u6
+libqt5opengl5==5.11.3+dfsg1-1+deb10u6
+libqt5opengl5-dev==5.11.3+dfsg1-1+deb10u6
+libqt5printsupport5==5.11.3+dfsg1-1+deb10u6
+libqt5sql5==5.11.3+dfsg1-1+deb10u6
+libqt5sql5-sqlite==5.11.3+dfsg1-1+deb10u6
 libqt5svg5==5.11.3-2
-libqt5test5==5.11.3+dfsg1-1+deb10u5
-libqt5widgets5==5.11.3+dfsg1-1+deb10u5
-libqt5xml5==5.11.3+dfsg1-1+deb10u5
+libqt5test5==5.11.3+dfsg1-1+deb10u6
+libqt5widgets5==5.11.3+dfsg1-1+deb10u6
+libqt5xml5==5.11.3+dfsg1-1+deb10u6
 libqtcore4==4:4.8.7+dfsg-18+deb10u2
 libqtdbus4==4:4.8.7+dfsg-18+deb10u2
 libqtgui4==4:4.8.7+dfsg-18+deb10u2
@@ -1370,7 +1371,7 @@ llvm-7==1:7.0.1-8+deb10u2
 llvm-7-dev==1:7.0.1-8+deb10u2
 llvm-7-runtime==1:7.0.1-8+deb10u2
 lmodern==2.004.5-6
-locales==2.28-10+deb10u2
+locales==2.28-10+deb10u3
 logrotate==3.14.0-4
 lsb-base==10.2019051400
 lsb-release==10.2019051400
@@ -1407,10 +1408,10 @@ nlohmann-json3-dev==3.5.0-0.1
 nodejs==14.21.3-deb-1nodesource1
 ocl-icd-libopencl1==2.2.12-2
 openjade==1.4devel1-21.3+b1
-openjdk-11-jdk==11.0.22+7-1~deb10u1
-openjdk-11-jdk-headless==11.0.22+7-1~deb10u1
-openjdk-11-jre==11.0.22+7-1~deb10u1
-openjdk-11-jre-headless==11.0.22+7-1~deb10u1
+openjdk-11-jdk==11.0.23+9-1~deb10u1
+openjdk-11-jdk-headless==11.0.23+9-1~deb10u1
+openjdk-11-jre==11.0.23+9-1~deb10u1
+openjdk-11-jre-headless==11.0.23+9-1~deb10u1
 openmpi-bin==3.1.3-11
 openmpi-common==3.1.3-11
 opensp==1.5.2-13+b1
@@ -1449,13 +1450,13 @@ php-token-stream==3.0.1-1
 php-tokenizer==1.1.0-1
 php-webmozart-assert==1.4.0-3
 php-xml==2:7.3+69
-php7.3-cli==7.3.31-1~deb10u5
-php7.3-common==7.3.31-1~deb10u5
-php7.3-json==7.3.31-1~deb10u5
-php7.3-mbstring==7.3.31-1~deb10u5
-php7.3-opcache==7.3.31-1~deb10u5
-php7.3-readline==7.3.31-1~deb10u5
-php7.3-xml==7.3.31-1~deb10u5
+php7.3-cli==7.3.31-1~deb10u6
+php7.3-common==7.3.31-1~deb10u6
+php7.3-json==7.3.31-1~deb10u6
+php7.3-mbstring==7.3.31-1~deb10u6
+php7.3-opcache==7.3.31-1~deb10u6
+php7.3-readline==7.3.31-1~deb10u6
+php7.3-xml==7.3.31-1~deb10u6
 phpunit==7.5.6-1
 phpunit-code-unit-reverse-lookup==1.0.1-1
 phpunit-comparator==3.0.2-1
@@ -1522,7 +1523,7 @@ python-funcsigs==1.0.2-4
 python-gi==3.30.4-1
 python-html5lib==1.0.1-1
 python-hyperlink==17.3.1-2
-python-idna==2.6-1
+python-idna==2.6-1+deb10u1
 python-imagesize==1.0.0-1
 python-incremental==16.10.1-3
 python-ipaddr==2.2.0-2
@@ -1614,7 +1615,7 @@ python3-docutils==0.14+dfsg-4
 python3-entrypoints==0.3-1
 python3-gi==3.30.4-1
 python3-gpg==1.12.0-6
-python3-idna==2.6-1
+python3-idna==2.6-1+deb10u1
 python3-imagesize==1.0.0-1
 python3-jinja2==2.10-2+deb10u1
 python3-keyring==17.1.1-1
@@ -1667,18 +1668,19 @@ qemu-utils==1:3.1+dfsg-8+deb10u12
 qt-at-spi==0.4.0-9
 qt4-linguist-tools==4:4.8.7+dfsg-18+deb10u2
 qt4-qmake==4:4.8.7+dfsg-18+deb10u2
-qt5-default==5.11.3+dfsg1-1+deb10u5
-qt5-gtk-platformtheme==5.11.3+dfsg1-1+deb10u5
-qt5-qmake==5.11.3+dfsg1-1+deb10u5
-qt5-qmake-bin==5.11.3+dfsg1-1+deb10u5
-qtbase5-dev==5.11.3+dfsg1-1+deb10u5
-qtbase5-dev-tools==5.11.3+dfsg1-1+deb10u5
+qt5-default==5.11.3+dfsg1-1+deb10u6
+qt5-gtk-platformtheme==5.11.3+dfsg1-1+deb10u6
+qt5-qmake==5.11.3+dfsg1-1+deb10u6
+qt5-qmake-bin==5.11.3+dfsg1-1+deb10u6
+qtbase5-dev==5.11.3+dfsg1-1+deb10u6
+qtbase5-dev-tools==5.11.3+dfsg1-1+deb10u6
 qtchooser==66-2
 qtcore4-l10n==4:4.8.7+dfsg-18+deb10u2
 qttranslations5-l10n==5.11.3-2
 quilt==0.65-3
 rake==12.3.1-3+deb10u1
 readline-common==7.0-5
+remake==4.1+dbg1.3~dfsg.1-2
 rrdtool==1.7.1-2
 rsync==3.1.3-6
 rsyslog==8.1901.0-1+deb10u2
diff --git a/files/build/versions/dockers/sonic-slave-buster/versions-deb-buster-armhf b/files/build/versions/dockers/sonic-slave-buster/versions-deb-buster-armhf
index cad875a8e..fc8b535d0 100644
--- a/files/build/versions/dockers/sonic-slave-buster/versions-deb-buster-armhf
+++ b/files/build/versions/dockers/sonic-slave-buster/versions-deb-buster-armhf
@@ -4,5 +4,24 @@ libdrm-omap1==2.4.97-1
 libgles2-mesa-dev==18.3.6-2+deb10u1
 libjpeg-dev==1:1.5.2-2+deb10u1
 libjpeg62-turbo-dev==1:1.5.2-2+deb10u1
+libqt5concurrent5==5.11.3+dfsg1-1+deb10u5
+libqt5core5a==5.11.3+dfsg1-1+deb10u5
+libqt5dbus5==5.11.3+dfsg1-1+deb10u5
+libqt5gui5==5.11.3+dfsg1-1+deb10u5
+libqt5network5==5.11.3+dfsg1-1+deb10u5
+libqt5opengl5==5.11.3+dfsg1-1+deb10u5
+libqt5opengl5-dev==5.11.3+dfsg1-1+deb10u5
+libqt5printsupport5==5.11.3+dfsg1-1+deb10u5
+libqt5sql5==5.11.3+dfsg1-1+deb10u5
+libqt5sql5-sqlite==5.11.3+dfsg1-1+deb10u5
+libqt5test5==5.11.3+dfsg1-1+deb10u5
+libqt5widgets5==5.11.3+dfsg1-1+deb10u5
+libqt5xml5==5.11.3+dfsg1-1+deb10u5
 linux-compiler-gcc-8-arm==4.19.304-1
 nasm==2.14-1
+qt5-default==5.11.3+dfsg1-1+deb10u5
+qt5-gtk-platformtheme==5.11.3+dfsg1-1+deb10u5
+qt5-qmake==5.11.3+dfsg1-1+deb10u5
+qt5-qmake-bin==5.11.3+dfsg1-1+deb10u5
+qtbase5-dev==5.11.3+dfsg1-1+deb10u5
+qtbase5-dev-tools==5.11.3+dfsg1-1+deb10u5
diff --git a/files/build/versions/dockers/sonic-slave-buster/versions-py3 b/files/build/versions/dockers/sonic-slave-buster/versions-py3
index 5e1ba2343..bb6e87156 100644
--- a/files/build/versions/dockers/sonic-slave-buster/versions-py3
+++ b/files/build/versions/dockers/sonic-slave-buster/versions-py3
@@ -64,7 +64,7 @@ python-magic==0.4.16
 pytz==2019.1
 pyxdg==0.25
 pyyaml==5.4.1
-redis==5.0.3
+redis==5.0.4
 regex==2024.4.16
 requests==2.21.0
 roman==2.0.0
diff --git a/files/build/versions/host-image/versions-deb-bookworm b/files/build/versions/host-image/versions-deb-bookworm
index 3675e4426..5be3e86e8 100644
--- a/files/build/versions/host-image/versions-deb-bookworm
+++ b/files/build/versions/host-image/versions-deb-bookworm
@@ -83,7 +83,8 @@ kernel-mft-dkms-modules-6.1.0-11-2-amd64==4.27.0
 kexec-tools==1:2.0.25-3+b1
 klibc-utils==2.0.12-1
 kmod==30+20221128-1
-less==590-2
+ldap-utils==2.5.13+dfsg-5
+less==590-2.1~deb12u2
 libabsl20220623==20220623.1-1
 libapparmor1==3.0.8-3
 libargon2-1==0~20171227-0.3+deb12u1
@@ -99,9 +100,11 @@ libbpf1==1:1.1.0-1
 libbrotli1==1.0.9-2+b6
 libbsd0==0.11.7-2
 libc-ares2==1.18.1-3
-libc-dev-bin==2.36-9+deb12u4
-libc-l10n==2.36-9+deb12u4
-libc6-dev==2.36-9+deb12u4
+libc-bin==2.36-9+deb12u7
+libc-dev-bin==2.36-9+deb12u7
+libc-l10n==2.36-9+deb12u7
+libc6==2.36-9+deb12u7
+libc6-dev==2.36-9+deb12u7
 libcap2-bin==1:2.66-4
 libcbor0.8==0.8.0-2+b1
 libcc1-0==12.2.0-14
@@ -135,7 +138,7 @@ libgcc-12-dev==12.2.0-14
 libgdbm-compat4==1.23-3
 libgdbm6==1.23-3
 libgirepository-1.0-1==1.74.0-3
-libglib2.0-0==2.74.6-2
+libglib2.0-0==2.74.6-2+deb12u2
 libgomp1==12.2.0-14
 libgpm2==1.20.7-10+b1
 libgprofng0==2.40-2
@@ -189,11 +192,13 @@ libnl-route-3-200==3.5.0-1
 libnorm1==1.5.9+dfsg-2
 libnsl-dev==1.3.0-2
 libnsl2==1.3.0-2
+libnss-ldapd==0.9.12-4
 libnss-radius==1.0.1-1
 libnss-tacplus==1.0.4-1
 libnuma1==2.0.16-1
 libonig5==6.9.8-1
 libopencsd1==1.3.3-1
+libpam-ldapd==0.9.12-4
 libpam-pwquality==1.4.5-1+b1
 libpam-radius-auth==1.4.1-1
 libpam-tacplus==1.4.1-1
@@ -269,9 +274,9 @@ libzmq5==4.3.4-6
 linux-base==4.9
 linux-image-6.1.0-11-2-amd64-unsigned==6.1.38-4
 linux-image-6.1.0-11-2-arm64-unsigned==6.1.38-4
-linux-libc-dev==6.1.85-1
-linux-perf==6.1.85-1
-locales==2.36-9+deb12u4
+linux-libc-dev==6.1.90-1
+linux-perf==6.1.90-1
+locales==2.36-9+deb12u7
 logrotate==3.21.0-1
 lsof==4.95.0-1
 makedev==2.3.1-97
@@ -291,6 +296,7 @@ ndisc6==1.0.5-1+b2
 net-tools==2.10-0.1
 netbase==6.4
 netfilter-persistent==1.0.20
+nslcd==0.9.12-4
 ntp==1:4.2.8p15+dfsg-2~1.2.2+dfsg1-1+deb12u1
 ntpdate==1:4.2.8p15+dfsg-2~1.2.2+dfsg1-1+deb12u1
 ntpsec==1.2.2+dfsg1-1+deb12u1
@@ -341,6 +347,7 @@ rasdaemon==0.6.8-1.1
 readline-common==8.2-1.3
 resolvconf==1.91+nmu1
 rpcsvc-proto==1.4.3-1
+rshim==2.0.19
 rsyslog==8.2302.0-1
 runit-helper==2.15.2
 sbsigntool==0.9.4-3.1
diff --git a/files/build/versions/host-image/versions-py3 b/files/build/versions/host-image/versions-py3
index b5cc83b7e..1200e659a 100644
--- a/files/build/versions/host-image/versions-py3
+++ b/files/build/versions/host-image/versions-py3
@@ -15,7 +15,7 @@ dbus-python==1.3.2
 docker==6.1.1
 docker-image-py==0.1.12
 enlighten==1.12.4
-filelock==3.13.4
+filelock==3.14.0
 grpcio==1.51.1
 grpcio-tools==1.51.1
 idna==3.7
@@ -52,7 +52,7 @@ pyang==2.6.0
 pyangbind==0.8.2
 pycairo==1.26.0
 pycparser==2.21
-pygments==2.17.2
+pygments==2.18.0
 pygobject==3.48.2
 pynacl==1.5.0
 pyroute2==0.5.19
@@ -60,7 +60,7 @@ python-apt==2.6.0
 python-dateutil==2.9.0.post0
 pyyaml==5.4.1
 redis==3.5.3
-regex==2024.4.16
+regex==2024.5.10
 requests==2.31.0
 scapy==2.4.4
 semantic-version==2.10.0
@@ -72,7 +72,7 @@ toposort==1.6
 urllib3==2.2.1
 watchdog==0.10.3
 wcwidth==0.2.13
-websocket-client==1.7.0
+websocket-client==1.8.0
 wheel==0.38.4
 www-authenticate==0.9.2
 xmltodict==0.12.0

From e87a3ac1a028008102eb567cd9c1d1d2c9ee73ae Mon Sep 17 00:00:00 2001
From: bofish-arista <128172814+bofish-arista@users.noreply.github.com>
Date: Sun, 12 May 2024 04:55:37 -0400
Subject: [PATCH 0563/1115] [Arista]: Misc sensor updates for DCS-7060DX5-64S
 (#18763)

Follow-up to "Misc platform improvements for DCS-7060DX5-64S" filed originally as PR #13875.

While generating a 202305 backport of the aforementioned PR, some fixes were identified and implemented to the sensors.conf file on 202305. These same changes are being upstreamed as part of this PR to master and 202311 to bring the branches into alignment.

The 202305 backport is tracked under PR #18701.

How I did it
Sensor modifications corresponding to the platform implementation.

How to verify it
Fixes have been validated in our in-house testing and running sonic-mgmt testing on DCS-7060DX5-64S.

Co-authored-by: enes.oncu <enes.oncu@arista.com>
---
 .../x86_64-arista_7060px5_64s/sensors.conf     | 18 ++++++++++++++++--
 1 file changed, 16 insertions(+), 2 deletions(-)

diff --git a/device/arista/x86_64-arista_7060px5_64s/sensors.conf b/device/arista/x86_64-arista_7060px5_64s/sensors.conf
index 835a10c3c..4fb5447b6 100644
--- a/device/arista/x86_64-arista_7060px5_64s/sensors.conf
+++ b/device/arista/x86_64-arista_7060px5_64s/sensors.conf
@@ -11,16 +11,30 @@ chip "tmp464-i2c-19-48"
     label temp1 "Board sensor"
     label temp2 "TH4 exhaust temp sensor"
     label temp3 "Inlet temp sensor"
+    ignore temp4
+    ignore temp5
+    ignore temp6
+    ignore temp7
+    ignore temp8
+    ignore temp9
 
 chip "dps800-i2c-22-58"
     label temp1 "Power supply 1 hotspot sensor"
     label temp2 "Power supply 1 inlet temp sensor"
-    ignore temp3 "Power supply 1 exhaust temp sensor"
+    ignore temp3
+
+    ignore fan2
+    ignore fan3
+    ignore fan4
 
 chip "dps800-i2c-23-58"
     label temp1 "Power supply 2 hotspot sensor"
     label temp2 "Power supply 2 inlet temp sensor"
-    label temp3 "Power supply 2 exhaust temp sensor"
+    ignore temp3
+
+    ignore fan2
+    ignore fan3
+    ignore fan4
 
 chip "lm73-i2c-24-48"
     label temp1 "Front panel temp sensor"

From cb9d71ac2351a4a4fab6a84ecaa8a9c7c416b065 Mon Sep 17 00:00:00 2001
From: Mati Alfaro <mati@marvell.com>
Date: Sun, 12 May 2024 12:07:58 +0300
Subject: [PATCH 0564/1115] [yang] set port admin state default down - fix for
 #18345 (#18658)

fix #18345

Signed-off-by: matiAlfaro <mati@marvell.com>
---
 src/sonic-yang-models/yang-models/sonic-port.yang | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/sonic-yang-models/yang-models/sonic-port.yang b/src/sonic-yang-models/yang-models/sonic-port.yang
index 163e19fc8..459b65208 100644
--- a/src/sonic-yang-models/yang-models/sonic-port.yang
+++ b/src/sonic-yang-models/yang-models/sonic-port.yang
@@ -173,6 +173,7 @@ module sonic-port{
 
 				leaf admin_status {
 					type stypes:admin_status;
+					default down;
 				}
 
 				leaf fec {

From 4f4a5d04602309df1f1e3d6c72b4610182412f4f Mon Sep 17 00:00:00 2001
From: Justin Wong <51811017+justin-wong-ce@users.noreply.github.com>
Date: Sun, 12 May 2024 02:12:39 -0700
Subject: [PATCH 0565/1115] [baseimage]: Added wireless-regdb as package to
 install for Debian (#18650)

In Debian 6.1.38, rfkill is used, which uses cfg80211. cfg80211 will attempt to load on boot and will look for regulatory.db, which is installed via wireless-regdb, a missing package.

It looks like the cause for the cfg80211 module getting automatically loaded is mentioned in systemd/systemd#27520 (specifically, systemd/systemd#20802). Some code refactoring occurred in systemd-networkd that causes the module to automatically get loaded, which then looks for the regulatory.db firmware file. (Also, the cfg80211 module depends on the rfkill module, not the other way around.)

systemd-networkd isn't enabled by default by Debian, but looks like SONiC now uses systemd-networkd in one case, starting with #18178, which is probably when this issue started happening. I do see the advantages of using it more; network configuration could potentially become a bit easier with this, but it would take some effort in migrating everything over to it.

Given all of this, either the cfg80211 module needs to be blacklisted, or the wireless-regdb package needs to be added. Considering there could be a theoretical use case of someone trying to use SONiC with wireless interfaces (although it would be clunky), it might be fine to add the wireless-regdb package.
---
 build_debian.sh | 9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/build_debian.sh b/build_debian.sh
index 508c5dffa..6ba2a134e 100755
--- a/build_debian.sh
+++ b/build_debian.sh
@@ -402,10 +402,11 @@ sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y in
     auditd                  \
     linux-perf              \
     resolvconf              \
-	lsof                    \
-	sysstat                 \
-	xxd                     \
-	zstd
+    lsof                    \
+    sysstat                 \
+    xxd                     \
+    wireless-regdb          \
+    zstd
 
 # Have systemd create the auditd log directory
 sudo mkdir -p ${FILESYSTEM_ROOT}/etc/systemd/system/auditd.service.d

From a0ff20edf2ddac2a6c281cce109bddbaf6ae6007 Mon Sep 17 00:00:00 2001
From: SuvarnaMeenakshi <50386592+SuvarnaMeenakshi@users.noreply.github.com>
Date: Sun, 12 May 2024 02:16:26 -0700
Subject: [PATCH 0566/1115] [snmpd]: Fix to use IPv6 linklocal address as snmp
 agent address (#18350)

Why I did it

1. fix [snmp] Snmpd fails to start when mgmt or Loopback interface is configured with Link local IPv6 address #16001
2. fix Timeout error while fetching response using snmpget #17807

#17045 modified minigraph parser to use management and loopback IPs to support SNMP query over IPv6. With this fix, if mgmt or loopback IP contains link local IP, that will not work as link local IP has to be appended with scope id associating the IP address to a specific interface. This PR change is to ensure that snmp works with link local IPv6 address.

How I did it
Modify minigraph parser to append the Ip address with % scope id if snmp agent address being used is link local IP address.
Modify snmpd.conf.j2 to take this change while checking if an IP address is ipv4 or ipv6.

How to verify it
Verified by configuring link local ipv6 address.
Last login: Wed Mar 13 01:45:09 2024 from 10.1.84.57
admin@<>:~$ sudo netstat -tulnp | grep 161
...
udp6 0 0 fe80::f6ee:31ff:fe9:161 :::* 70355/snmpd

Signed-off-by: Suvarna Meenakshi <sumeenak@microsoft.com>
---
 dockers/docker-snmp/snmpd.conf.j2              |  2 +-
 src/sonic-config-engine/minigraph.py           | 13 +++++++------
 src/sonic-config-engine/tests/sample_graph.xml |  8 ++++++++
 src/sonic-config-engine/tests/test_cfggen.py   |  2 +-
 4 files changed, 17 insertions(+), 8 deletions(-)

diff --git a/dockers/docker-snmp/snmpd.conf.j2 b/dockers/docker-snmp/snmpd.conf.j2
index aa04901f0..b6dd82600 100644
--- a/dockers/docker-snmp/snmpd.conf.j2
+++ b/dockers/docker-snmp/snmpd.conf.j2
@@ -17,7 +17,7 @@
 # Listen on managment and loopback0 ips for single asic platform
 #
 {% macro protocol(ip_addr) %}
-{%- if ip_addr|ipv6 -%}
+{%- if ip_addr.split('%')[0]|ipv6 -%}
 {{ 'udp6' }}
 {%- else -%}
 {{ 'udp' }}
diff --git a/src/sonic-config-engine/minigraph.py b/src/sonic-config-engine/minigraph.py
index dab011bc5..5bfbeb650 100644
--- a/src/sonic-config-engine/minigraph.py
+++ b/src/sonic-config-engine/minigraph.py
@@ -1762,12 +1762,13 @@ def parse_xml(filename, platform=None, port_config_file=None, asic_name=None, hw
     if not is_multi_asic() and asic_name is None:
         results['SNMP_AGENT_ADDRESS_CONFIG'] = {}
         port = '161'
-        for mgmt_intf in mgmt_intf.keys():
-            snmp_key = mgmt_intf[1].split('/')[0] + '|' + port + '|'
-            results['SNMP_AGENT_ADDRESS_CONFIG'][snmp_key] = {}
-        # Add Loopback IP as agent address for single asic
-        for loip in lo_intfs.keys():
-            snmp_key = loip[1].split('/')[0] + '|' + port + '|'
+        for intf in list(mgmt_intf.keys()) + list(lo_intfs.keys()):
+            ip_addr = ipaddress.ip_address(UNICODE_TYPE(intf[1].split('/')[0]))
+            if ip_addr.version == 6 and ip_addr.is_link_local:
+                agent_addr = str(ip_addr) + '%' + intf[0]
+            else:
+                agent_addr = str(ip_addr)
+            snmp_key = agent_addr + '|' + port + '|'
             results['SNMP_AGENT_ADDRESS_CONFIG'][snmp_key] = {}
     else:
         results['SNMP_AGENT_ADDRESS_CONFIG'] = {}
diff --git a/src/sonic-config-engine/tests/sample_graph.xml b/src/sonic-config-engine/tests/sample_graph.xml
index 35247671f..a0c41a7f5 100644
--- a/src/sonic-config-engine/tests/sample_graph.xml
+++ b/src/sonic-config-engine/tests/sample_graph.xml
@@ -81,6 +81,14 @@
           </a:Prefix>
           <a:PrefixStr>192.168.200.15/24</a:PrefixStr>
         </a:ManagementIPInterface>
+        <a:ManagementIPInterface>
+          <Name>ManagementIPv6</Name>
+          <AttachTo>Management0</AttachTo>
+          <a:Prefix xmlns:b="Microsoft.Search.Autopilot.NetMux">
+            <b:IPPrefix>fe80::1/64</b:IPPrefix>
+          </a:Prefix>
+          <a:PrefixStr>fe80::1/64</a:PrefixStr>
+        </a:ManagementIPInterface>
       </ManagementIPInterfaces>
       <MplsInterfaces/>
       <MplsTeInterfaces/>
diff --git a/src/sonic-config-engine/tests/test_cfggen.py b/src/sonic-config-engine/tests/test_cfggen.py
index 7018dc7db..6126522bb 100644
--- a/src/sonic-config-engine/tests/test_cfggen.py
+++ b/src/sonic-config-engine/tests/test_cfggen.py
@@ -1150,4 +1150,4 @@ def testsnmp_agent_address_config(self):
         output = self.run_script(argument)
         self.assertEqual(
             utils.liststr_to_dict(output.strip()),
-            utils.liststr_to_dict("['192.168.200.15|161|', '100.0.0.6|161|', '100.0.0.7|161|']"))
+            utils.liststr_to_dict("['192.168.200.15|161|', '100.0.0.6|161|', '100.0.0.7|161|', 'fe80::1%Management0|161|']"))

From 73194090114e4f839cafe7e0b3209135ed88b32b Mon Sep 17 00:00:00 2001
From: Vijaya Kumar Abbaraju <vijaya-kumar.abbaraju@broadcom.com>
Date: Sun, 12 May 2024 14:47:56 +0530
Subject: [PATCH 0567/1115] MAB protocol related changes (#18630)

---
 src/sonic-pac/mab/protocol/mab_auth.c   | 226 ++++++
 src/sonic-pac/mab/protocol/mab_db.c     | 438 +++++++++++
 src/sonic-pac/mab/protocol/mab_local.c  | 269 +++++++
 src/sonic-pac/mab/protocol/mab_mac_db.c | 443 +++++++++++
 src/sonic-pac/mab/protocol/mab_radius.c | 943 ++++++++++++++++++++++++
 src/sonic-pac/mab/protocol/mab_timer.c  | 272 +++++++
 src/sonic-pac/mab/protocol/mab_utils.c  |  65 ++
 src/sonic-pac/mab/protocol/mab_vlan.c   | 260 +++++++
 8 files changed, 2916 insertions(+)
 create mode 100755 src/sonic-pac/mab/protocol/mab_auth.c
 create mode 100755 src/sonic-pac/mab/protocol/mab_db.c
 create mode 100755 src/sonic-pac/mab/protocol/mab_local.c
 create mode 100755 src/sonic-pac/mab/protocol/mab_mac_db.c
 create mode 100755 src/sonic-pac/mab/protocol/mab_radius.c
 create mode 100755 src/sonic-pac/mab/protocol/mab_timer.c
 create mode 100755 src/sonic-pac/mab/protocol/mab_utils.c
 create mode 100755 src/sonic-pac/mab/protocol/mab_vlan.c

diff --git a/src/sonic-pac/mab/protocol/mab_auth.c b/src/sonic-pac/mab/protocol/mab_auth.c
new file mode 100755
index 000000000..32b5128d2
--- /dev/null
+++ b/src/sonic-pac/mab/protocol/mab_auth.c
@@ -0,0 +1,226 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#define  MAC_EAPOL_PDU
+
+#include "mab_include.h"
+#include "sysapi.h"
+#include "mab_db.h"
+#include "auth_mgr_exports.h"
+#include "mab_client.h"
+#include "mab_struct.h"
+#include "mab_timer.h"
+
+extern mabBlock_t *mabBlock;
+
+/*********************************************************************
+ * @purpose Get the authentication method for the user of this port
+ *
+ * @param   logicalPortInfo  @b{(input))  Logical Port Info node
+ * @param   bufHandle  @b{(input)} the handle to the mab PDU
+ * @param   authMethod @b{(output)} user's authentication method
+ *
+ * @returns  SUCCESS
+ * @returns  FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+static
+RC_t mabSmAuthMethodGet(mabLogicalPortInfo_t *logicalPortInf,
+     netBufHandle bufHandle,
+     USER_MGR_AUTH_METHOD_t *authMethod)
+{
+   uchar8 *data;
+   enetHeader_t *enetHdr;
+   eapolPacket_t *eapolPkt;
+   authmgrEapPacket_t *eapPkt;
+   eapRrPacket_t *eapRrPkt= NULLPTR;
+  RC_t rc =  FAILURE;
+
+  if (bufHandle !=  NULL)
+  {
+    SYSAPI_NET_MBUF_GET_DATASTART(bufHandle, data);
+    enetHdr = ( enetHeader_t *)data;
+    eapolPkt = ( eapolPacket_t *)(( uchar8 *)enetHdr +  ENET_HDR_SIZE +  ENET_ENCAPS_HDR_SIZE);
+    eapPkt = ( authmgrEapPacket_t *)(( uchar8 *)eapolPkt + sizeof( eapolPacket_t));
+    eapRrPkt = ( eapRrPacket_t *)(( uchar8 *)eapPkt + sizeof( authmgrEapPacket_t));
+  }
+
+  /* attempt authentication with RADIUS */
+  *authMethod =  AUTH_METHOD_RADIUS;
+
+  logicalPortInf->client.authMethod = *authMethod;
+  rc =  SUCCESS;
+
+  return rc;
+}
+
+/*********************************************************************
+ * @purpose  Actions to be performed when sending request to a client
+ *
+ * @param   logicalPortInfo  @b{(input))  Logical Port Info node
+ *
+ * @returns  SUCCESS
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t mabClientRequestAction(mabLogicalPortInfo_t *logicalPortInfo,  netBufHandle bufHandle)
+{
+  uint32  physPort = 0, lPort = 0, type = 0;
+   uchar8 ch, *data =  NULLPTR;
+   radiusAttr_t *eapTlv =  NULLPTR;
+   BOOL generateNak =  FALSE;
+
+  MAB_IF_NULLPTR_RETURN_LOG(logicalPortInfo);
+  MAB_LPORT_KEY_UNPACK(physPort, lPort, type, logicalPortInfo->key.keyNum);
+
+  logicalPortInfo->client.currentIdL = logicalPortInfo->client.attrInfo.idFromServer;
+
+  if ( AUTHMGR_PORT_MAB_AUTH_TYPE_INVALID != logicalPortInfo->client.mabAuthType)
+  {
+    if(bufHandle !=  NULL) 
+    {
+      SYSAPI_NET_MBUF_GET_DATASTART(bufHandle, data);
+      eapTlv = ( radiusAttr_t *) (data +  ENET_HDR_SIZE +  ENET_ENCAPS_HDR_SIZE + 
+          sizeof( eapolPacket_t) + sizeof( authmgrEapPacket_t));
+      ch = ( uchar8)EAP_RRMD5;
+      if (memcmp(&eapTlv->type,( uchar8 *)&ch,sizeof( uchar8)) !=0)
+      {
+        /* generate NAK for unsupported EAP types */
+        generateNak =  TRUE;
+      }
+      /* Free bufHandle as another one will be allocated in mabCtlLogicalPortMABGenResp() */
+      SYSAPI_NET_MBUF_FREE(bufHandle);
+    }
+    mabCtlLogicalPortMABGenResp(logicalPortInfo->key.keyNum, generateNak);
+  }
+  else
+  {
+    if ( NULL != bufHandle)
+    {
+      SYSAPI_NET_MBUF_FREE(bufHandle);
+    }
+  }
+
+  return  SUCCESS;
+}
+
+/*********************************************************************
+ * @purpose  Actions to be performed when sending response to AAA
+ *
+ * @param   logicalPortInfo  @b{(input))  Logical Port Info node
+ *
+ * @returns  SUCCESS
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t mabClientResponseAction(mabLogicalPortInfo_t *logicalPortInfo,  netBufHandle bufHandle)
+{
+  mabPortCfg_t * pCfg;
+   USER_MGR_AUTH_METHOD_t authMethod;
+  uint32  physPort, lPort = 0, type = 0;
+
+  MAB_IF_NULLPTR_RETURN_LOG(logicalPortInfo);
+  MAB_LPORT_KEY_UNPACK(physPort, lPort, type, logicalPortInfo->key.keyNum);
+
+  if (mabIntfIsConfigurable(physPort, &pCfg) !=  TRUE)
+    return  FAILURE;
+
+  /* start the timer for the Server timeout */
+  if ( SUCCESS != mabTimerStart(logicalPortInfo, MAB_SERVER_AWHILE))
+  {
+    return  FAILURE;
+  }
+
+  if (logicalPortInfo->client.suppBufHandle !=  NULL)
+  {
+    SYSAPI_NET_MBUF_FREE(logicalPortInfo->client.suppBufHandle);
+    logicalPortInfo->client.suppBufHandle =  NULL;
+  }
+
+  if (mabSmAuthMethodGet(logicalPortInfo, bufHandle, &authMethod) ==  SUCCESS)
+  {
+    switch (authMethod)
+    {
+      case  AUTH_METHOD_UNDEFINED:
+      case  AUTH_METHOD_REJECT:
+        /* reset port from the existing vlans*/
+        MAB_EVENT_TRACE(
+            "\n%s:Reset vlan Type %s vlan Id %d participation "
+            "for linterface = %d as auth method is reject or undefined. \n",
+            __FUNCTION__, mabVlanTypeStringGet(logicalPortInfo->client.vlanType),
+            logicalPortInfo->client.vlanId, logicalPortInfo->key.keyNum);
+
+        logicalPortInfo->protocol.authFail =  TRUE;
+
+        mabUnAuthenticatedAction(logicalPortInfo);
+
+        break;
+
+      case  AUTH_METHOD_LOCAL:
+        /* attempt local authentication */
+        (void)mabLocalAuthResponseProcess(logicalPortInfo, bufHandle);
+        break;
+
+      case  AUTH_METHOD_RADIUS:
+        /* attempt authentication with RADIUS */
+        (void)mabRadiusSuppResponseProcess(logicalPortInfo->key.keyNum, bufHandle);
+        break;
+      case  AUTH_METHOD_NONE:
+        /* authorize */
+        mabAuthenticatedAction(logicalPortInfo);
+
+        break;
+
+      default:
+        /* reset port in any mab assigned vlans*/
+        MAB_EVENT_TRACE(
+            "\n%s:Reset vlan Type %s vlan Id %d participation "
+            "for linterface = %d as auth method is unsupported. \n",
+            __FUNCTION__, mabVlanTypeStringGet(logicalPortInfo->client.vlanType),
+            logicalPortInfo->client.vlanId, logicalPortInfo->key.keyNum);
+        mabUnAuthenticatedAction(logicalPortInfo);
+
+        break;
+    }
+  }
+  else
+  {
+    /* If we couldn't get an auth method, log an error and fail the authentication */
+     LOGF( LOG_SEVERITY_NOTICE,
+        "%s: Failed getting auth method, logical port %d."
+        " Could not determine the authentication method to be used . "
+        "Probably because of  a mis-configuration.", __FUNCTION__, logicalPortInfo->key.keyNum);
+    /* reset port in any mab assigned vlans*/
+    MAB_EVENT_TRACE(
+        "\n%s:Reset vlan Type %s vlan Id %d participation "
+        "for linterface = %d as auth method is unsupported. \n",
+        __FUNCTION__, mabVlanTypeStringGet(logicalPortInfo->client.vlanType),
+        logicalPortInfo->client.vlanId, logicalPortInfo->key.keyNum);
+
+    mabUnAuthenticatedAction(logicalPortInfo);
+  }
+
+  return  SUCCESS;
+}
+
+
diff --git a/src/sonic-pac/mab/protocol/mab_db.c b/src/sonic-pac/mab/protocol/mab_db.c
new file mode 100755
index 000000000..6ee661165
--- /dev/null
+++ b/src/sonic-pac/mab/protocol/mab_db.c
@@ -0,0 +1,438 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+
+#include "mab_include.h"
+#include "mab_util.h"
+#include "mab_struct.h"
+#include "osapi_sem.h"
+
+extern mabBlock_t *mabBlock;
+
+  int32
+ mabLogicalPortDbEntryCompare (const void* pData1,
+                             const void* pData2,
+                             size_t size)
+{
+  mabLogicalNodeKey_t *pKey1 = (mabLogicalNodeKey_t *) pData1;
+  mabLogicalNodeKey_t *pKey2 = (mabLogicalNodeKey_t *) pData2;
+  register  int32 retVal = 0;
+
+  if ((pKey1 ==  NULLPTR) || (pKey2 ==  NULLPTR))
+  {
+    return 1;
+  }
+
+  retVal = pKey1->keyNum - pKey2->keyNum;
+
+  return retVal;
+}
+
+/*********************************************************************
+ * @purpose  Initialize Logical Port Info Database
+ *
+ * @param    nodeCount    @b{(input)} The number of nodes to be created. 
+ *
+ * @returns   SUCCESS or  FAILURE
+ *
+ * @comments none
+ *       
+ * @end
+ *********************************************************************/
+RC_t mabLogicalPortInfoDBInit(uint32 nodeCount)
+{
+  /* Allocate the Heap structures */
+  mabBlock->mabLogicalPortTreeHeap = (avlTreeTables_t *)osapiMalloc( MAB_COMPONENT_ID,
+      nodeCount * sizeof(avlTreeTables_t));
+
+  mabBlock->mabLogicalPortDataHeap  = (mabLogicalPortInfo_t *)osapiMalloc( MAB_COMPONENT_ID,
+      nodeCount * sizeof(mabLogicalPortInfo_t));
+
+  /* validate the pointers*/
+  if ((mabBlock->mabLogicalPortTreeHeap ==  NULLPTR) ||(mabBlock->mabLogicalPortDataHeap ==  NULLPTR))
+  {
+     LOGF( LOG_SEVERITY_NOTICE,
+        " Error in allocating memory for the MAB database. Possible causes are insufficient memory.");
+    return  FAILURE;
+  }
+
+  /* AVL Tree creations - mabLogicalPortTreeDb*/
+  avlCreateAvlTree(&(mabBlock->mabLogicalPortTreeDb),  mabBlock->mabLogicalPortTreeHeap,
+      mabBlock->mabLogicalPortDataHeap, nodeCount,
+      sizeof(mabLogicalPortInfo_t), 0x10,
+      sizeof(mabLogicalNodeKey_t));
+
+  avlSetAvlTreeComparator(&(mabBlock->mabLogicalPortTreeDb), mabLogicalPortDbEntryCompare);
+  return  SUCCESS;
+}
+
+
+/*********************************************************************
+ * @purpose  DeInitialize Logical Port Info Database
+ *
+ * @param    none
+ *
+ * @returns   SUCCESS or  FAILURE
+ *
+ * @comments none
+ *
+ * @end
+ *********************************************************************/
+RC_t mabLogicalPortInfoDBDeInit(void)
+{
+  /* Destroy the AVL Tree */
+  if(mabBlock->mabLogicalPortTreeDb.semId !=  NULLPTR)
+  {
+    avlDeleteAvlTree(&mabBlock->mabLogicalPortTreeDb);
+  }
+
+  /* Give up the memory */
+  if (mabBlock->mabLogicalPortTreeHeap !=  NULLPTR)
+  {
+    osapiFree( MAB_COMPONENT_ID, mabBlock->mabLogicalPortTreeHeap);
+    mabBlock->mabLogicalPortTreeHeap =  NULLPTR;
+  }
+
+  if (mabBlock->mabLogicalPortDataHeap !=  NULLPTR)
+  {
+    osapiFree( MAB_COMPONENT_ID, mabBlock->mabLogicalPortDataHeap);
+    mabBlock->mabLogicalPortDataHeap =  NULLPTR;
+  }
+  return  SUCCESS;
+}
+
+/*********************************************************************
+ * @purpose  To Take lock for the Logical Port Info Node
+ *
+ * @param    None
+ *
+ * @returns   SUCCESS or  FAILURE
+ *
+ * @comments This lock needs to be taken only the API functions not running in 
+ *           the mab threads context.
+ *       
+ * @end
+ *********************************************************************/
+RC_t mabLogicalPortInfoTakeLock(void)
+{
+  return osapiSemaTake(mabBlock->mabLogicalPortTreeDb.semId,  WAIT_FOREVER);
+}
+
+/*********************************************************************
+ * @purpose  To Giveup lock for the Logical Port Info Node
+ *
+ * @param    None
+ *
+ * @returns   SUCCESS or  FAILURE
+ *
+ * @comments This lock needs to be taken only the API functions not running in 
+ *           the mab threads context.
+ *       
+ * @end
+ *********************************************************************/
+RC_t mabLogicalPortInfoGiveLock(void)
+{
+  return osapiSemaGive(mabBlock->mabLogicalPortTreeDb.semId);
+}
+
+
+/*********************************************************************
+ * @purpose  To allocate a Logical Port Info Node
+ *
+ * @param    intIfNum  @b{(input)} The internal interface for which this 
+ *                                 logical interface is being created
+ *
+ * @returns  Logical Internal Interface Number
+ *
+ * @comments none
+ *       
+ * @end
+ *********************************************************************/
+mabLogicalPortInfo_t *mabDynamicLogicalPortInfoAlloc(uint32 intIfNum)
+{
+  uint32               lIntIfNum;
+  mabLogicalPortInfo_t  newNode,*retNode,*tmpNode;
+   uchar8 ifName[ NIM_IF_ALIAS_SIZE + 1];
+  nimGetIntfName(intIfNum,  ALIASNAME, ifName);
+  mabLogicalNodeKey_t key;
+
+  /* iterate through the Logical interfaces to assign a empty slot to the new node.*/
+  for (lIntIfNum = MAB_LOGICAL_PORT_START;
+      lIntIfNum < MAB_LOGICAL_PORT_END; lIntIfNum++)
+  {
+    memset(&key, 0, sizeof(mabLogicalNodeKey_t));
+    MAB_LPORT_KEY_PACK(intIfNum, lIntIfNum, AUTHMGR_LOGICAL, key.keyNum);
+    
+    tmpNode = mabLogicalPortInfoGet(key.keyNum);
+    if (tmpNode ==  NULLPTR)
+    {
+      /* found one - use it */
+      memset(&newNode,0,sizeof(mabLogicalPortInfo_t));
+      newNode.key = key;
+
+      /* add the node to the tree */
+      osapiSemaTake(mabBlock->mabLogicalPortTreeDb.semId,  WAIT_FOREVER);
+      retNode  = avlInsertEntry(&mabBlock->mabLogicalPortTreeDb,&newNode);
+      osapiSemaGive(mabBlock->mabLogicalPortTreeDb.semId);
+      if (retNode == &newNode)
+      {
+         LOGF( LOG_SEVERITY_INFO,
+            "Error in adding the node to the MAB tree for interface %s.\n",
+            ifName);
+        return  NULLPTR;
+      }
+      return mabLogicalPortInfoGet(key.keyNum);
+    }
+  }
+   LOGF( LOG_SEVERITY_NOTICE,
+      "Error in allocating node for interface %s,as it reached maximum limit per port."
+      " Could not allocate memory for client as maximum number of clients allowed per port"
+      " has been reached.", ifName);
+  return  NULLPTR;
+}
+
+/*********************************************************************
+ * @purpose  To allocate a Logical Port Info Node
+ *
+ * @param    intIfNum  @b{(input)} The internal interface for which this 
+ *                                 logical interface is being created
+ *
+ * @returns  Logical Internal Interface Number
+ *
+ * @comments none
+ *       
+ * @end
+ *********************************************************************/
+mabLogicalPortInfo_t *mabLogicalPortInfoAlloc(uint32 intIfNum)
+{
+  return mabDynamicLogicalPortInfoAlloc(intIfNum);
+}
+
+/*********************************************************************
+ * @purpose  To Deallocate a Logical Port Info Node
+ *
+ * @param    intIfNum  @b{(input)} The internal interface for which this 
+ *                                 logical interface is being destroyed
+ *
+ * @returns   SUCCESS or  FAILURE
+ *
+ * @comments none
+ *       
+ * @end
+ *********************************************************************/
+RC_t mabLogicalPortInfoDeAlloc(mabLogicalPortInfo_t *node)
+{
+  uint32 physPort = 0, lPort = 0, type = 0;
+  if(node !=  NULLPTR)
+  {
+    MAB_LPORT_KEY_UNPACK(physPort, lPort, type, node->key.keyNum);
+
+    if (AUTHMGR_LOGICAL == type)
+    {
+    osapiSemaTake(mabBlock->mabLogicalPortTreeDb.semId,  WAIT_FOREVER);
+    avlDeleteEntry(&mabBlock->mabLogicalPortTreeDb,node);
+    osapiSemaGive(mabBlock->mabLogicalPortTreeDb.semId);
+    }
+    return  SUCCESS;
+  }
+  return  FAILURE;
+}
+
+/*********************************************************************
+ * @purpose  To Get a Logical Port Info Node
+ *
+ * @param    lIntIfNum  @b{(input)} The logical internal interface number
+ *
+ * @returns  Logical Internal Interface node
+ *
+ * @comments none
+ *       
+ * @end
+ *********************************************************************/
+mabLogicalPortInfo_t *mabLogicalPortInfoGet(uint32  lIntIfNum)
+{
+  mabLogicalNodeKey_t key;
+  uint32 physPort = 0, lPort = 0, type = 0;
+  mabLogicalPortInfo_t  *entry =  NULLPTR;
+
+  MAB_LPORT_KEY_UNPACK(physPort, lPort, type, lIntIfNum);
+
+  key.keyNum = lIntIfNum;
+
+  if (AUTHMGR_LOGICAL == type)
+  {
+    entry = (mabLogicalPortInfo_t *)avlSearch(&mabBlock->mabLogicalPortTreeDb, &key, AVL_EXACT);
+  }
+  return entry;
+}
+
+/*********************************************************************
+ * @purpose  To Get Next Logical Port Info Node
+ *
+ * @param    lIntIfNum  @b{(input)} The logical internal interface number
+ *
+ * @returns  Logical Internal Interface node
+ *
+ * @comments none
+ *       
+ * @end
+ *********************************************************************/
+mabLogicalPortInfo_t *mabLogicalPortInfoGetNext(uint32 lIntIfNum)
+{
+  uint32 physPort = 0, lPort = 0, type = 0;
+  mabLogicalPortInfo_t  *entry =  NULLPTR;
+  RC_t nimRc =  SUCCESS;
+
+  MAB_LPORT_KEY_UNPACK(physPort, lPort, type, lIntIfNum);
+
+  while (( SUCCESS == nimRc) && 
+    ( NULLPTR == (entry = mabLogicalPortInfoGetNextNode(physPort,&lIntIfNum))))
+  {
+    /* Entry not available on this port.
+       search on the next port */
+    lIntIfNum = MAB_LOGICAL_PORT_ITERATE;
+    nimRc = mabNextValidIntf(physPort, &physPort);
+  }
+
+  return entry;
+}
+
+/*********************************************************************
+ * @purpose  To get First logical interfaces for dynamically allocated nodes
+ *
+ * @param    intIfNum  @b{(input)} The internal interface 
+ * @param    lIntIfNum  @b{(input/output)} The logical internal interface number
+ *
+ * @returns  Logical Internal Interface node
+ *
+ * @comments For the first iteration start with zero.
+ *       
+ * @end
+ *********************************************************************/
+mabLogicalPortInfo_t *mabDynamicLogicalPortInfoFirstGet(uint32 intIfNum,
+    uint32 *lIntIfNum)
+{
+  mabLogicalPortInfo_t *node;
+  uint32 maxintf = MAB_LOGICAL_PORT_END;
+  uint32 lPort = 0;
+  uint32 temp = 0;
+
+
+  lPort = MAB_LOGICAL_PORT_START;
+  MAB_LPORT_KEY_PACK(intIfNum, lPort, AUTHMGR_LOGICAL, temp);
+  while((node=mabLogicalPortInfoGet(temp))== NULLPTR &&
+      lPort < maxintf)
+  {
+    lPort = lPort + 1;
+    temp = 0;
+    MAB_LPORT_KEY_PACK(intIfNum, lPort, AUTHMGR_LOGICAL, temp);
+  }
+
+  *lIntIfNum = temp;
+  return node;
+}
+
+/*********************************************************************
+ * @purpose  To iterate all the logical interfaces of a physical interface
+ *
+ * @param    intIfNum  @b{(input)} The internal interface 
+ * @param    lIntIfNum  @b{(input/output)} The logical internal interface number
+ *
+ * @returns  Logical Internal Interface node
+ *
+ * @comments For the first iteration start with zero.
+ *       
+ * @end
+ *********************************************************************/
+mabLogicalPortInfo_t *mabDynamicLogicalPortInfoGetNextNode(uint32 intIfNum,
+    uint32 *lIntIfNum)
+{
+  mabLogicalPortInfo_t *node =  NULLPTR;
+  uint32 physPort = 0, lPort = 0, type = 0, temp = 0;
+
+  if(*lIntIfNum == MAB_LOGICAL_PORT_ITERATE)
+  {
+    return mabLogicalPortInfoFirstGet(intIfNum,lIntIfNum);
+  }
+  
+  MAB_LPORT_KEY_UNPACK(physPort, lPort, type, *lIntIfNum);
+
+  if ((intIfNum != physPort) || (lPort >= MAB_LOGICAL_PORT_END))
+  {
+    return  NULLPTR;
+  }
+
+  lPort = lPort + 1;
+  MAB_LPORT_KEY_PACK(intIfNum, lPort, AUTHMGR_LOGICAL, temp);
+  while((node=mabLogicalPortInfoGet(temp))== NULLPTR &&
+      lPort < MAB_LOGICAL_PORT_END)
+  {
+    lPort = lPort + 1;
+    temp = 0;
+    MAB_LPORT_KEY_PACK(intIfNum, lPort, AUTHMGR_LOGICAL, temp);
+  }
+
+  *lIntIfNum = temp;
+  return node;
+}
+
+/*********************************************************************
+ * @purpose  To get First logical interfaces for a physical interface
+ *
+ * @param    intIfNum  @b{(input)} The internal interface 
+ * @param    lIntIfNum  @b{(input/output)} The logical internal interface number
+ *
+ * @returns  Logical Internal Interface node
+ *
+ * @comments For the first iteration start with zero.
+ *       
+ * @end
+ *********************************************************************/
+mabLogicalPortInfo_t *mabLogicalPortInfoFirstGet(uint32 intIfNum,
+    uint32 *lIntIfNum)
+{
+  mabLogicalPortInfo_t *node;
+
+  /* dynamically allocated node */
+  node = mabDynamicLogicalPortInfoFirstGet(intIfNum, lIntIfNum);
+
+  return node;
+}
+
+/*********************************************************************
+ * @purpose  To iterate all the logical interfaces of a physical interface
+ *
+ * @param    intIfNum  @b{(input)} The internal interface 
+ * @param    lIntIfNum  @b{(input/output)} The logical internal interface number
+ *
+ * @returns  Logical Internal Interface node
+ *
+ * @comments For the first iteration start with zero.
+ *       
+ * @end
+ *********************************************************************/
+mabLogicalPortInfo_t *mabLogicalPortInfoGetNextNode(uint32 intIfNum,
+    uint32 *lIntIfNum)
+{
+  mabLogicalPortInfo_t *node;
+
+  /* dynamically allocated node */
+  node = mabDynamicLogicalPortInfoGetNextNode(intIfNum, lIntIfNum);
+
+  return node;
+}
+
+
diff --git a/src/sonic-pac/mab/protocol/mab_local.c b/src/sonic-pac/mab/protocol/mab_local.c
new file mode 100755
index 000000000..010aef8b7
--- /dev/null
+++ b/src/sonic-pac/mab/protocol/mab_local.c
@@ -0,0 +1,269 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include <time.h>
+#include "mab_include.h"
+#include "md5_api.h"
+#include "mab_auth.h"
+#include "mab_client.h"
+#include "mab_control.h"
+
+RC_t mabLocalAuthSendAuthReq(mabLogicalPortInfo_t *logicalPortInfo)
+{
+  MAB_IF_NULLPTR_RETURN_LOG(logicalPortInfo);
+  /* Generate an event that will cause a request (MD5 challenge) to be sent to the supplicant.
+   * The bufHandle is  NULLPTR in this case since we didn't actually receive the request
+   * from a server.  So, we will need to generate the request locally.
+   */
+  if (AUTHMGR_CLIENT_UNAWARE == logicalPortInfo->client.clientType)
+  {
+    /* if MAB client generate and store mab challenge*/
+    memset(logicalPortInfo->client.mabChallenge,0,MAB_CHALLENGE_LEN);
+    mabLocalAuthChallengeGenerate(logicalPortInfo->client.mabChallenge, MAB_CHALLENGE_LEN);
+    logicalPortInfo->client.mabChallengelen = MAB_CHALLENGE_LEN;
+  
+  }
+  return mabClientRequestAction(logicalPortInfo,  NULLPTR);
+}
+
+/**************************************************************************
+* @purpose   Process EAP Response and Response/Identity frames
+*
+* @param     logicalPortInfo  @b{(input))  Logical Port Info node
+* @param     bufHandle  @b{(input)} the handle to the mab PDU
+*
+* @returns    SUCCESS
+* @returns    FAILURE
+*
+* @comments
+*
+* @end
+*************************************************************************/
+RC_t mabLocalAuthResponseProcess(mabLogicalPortInfo_t *logicalPortInfo,  netBufHandle bufHandle)
+{
+   uchar8 *data;
+   enetHeader_t *enetHdr;
+   eapolPacket_t *eapolPkt;
+   authmgrEapPacket_t *eapPkt;
+   eapRrPacket_t *eapRrPkt;
+   BOOL portAllow;
+  RC_t rc =  SUCCESS, authRc;
+  mabPortCfg_t * pCfg;
+  uint32 physPort = 0, type = 0, lPort = 0;
+  authmgrFailureReason_t  reason=0;
+  
+  if ( NULLPTR == logicalPortInfo)
+  {
+    return  FAILURE;
+  }
+
+  MAB_LPORT_KEY_UNPACK(physPort, lPort, type, logicalPortInfo->key.keyNum);
+
+  if ( TRUE != mabIntfIsConfigurable(physPort, &pCfg))
+  {
+     return  FAILURE;
+  }
+
+  enetHdr = ( enetHeader_t *)data;
+  eapolPkt = ( eapolPacket_t *)(( uchar8 *)enetHdr +  ENET_HDR_SIZE +  ENET_ENCAPS_HDR_SIZE);
+  eapPkt = ( authmgrEapPacket_t *)(( uchar8 *)eapolPkt + sizeof( eapolPacket_t));
+  eapRrPkt = ( eapRrPacket_t *)(( uchar8 *)eapPkt + sizeof( authmgrEapPacket_t));
+
+  logicalPortInfo->client.attrInfo.idFromServer = logicalPortInfo->client.currentIdL;
+
+  if (eapRrPkt->type == EAP_RRIDENTITY)
+  {
+    logicalPortInfo->client.mabUserIndex = MAB_USER_INDEX_INVALID;
+    if ( AUTH_METHOD_LOCAL == logicalPortInfo->client.authMethod)
+    {
+
+     /* User name was stored in port info structure when EAP-Response/Identity frame was received.
+      * See if this user name matches a locally configured user.  If we find a match, generate an
+      * event that will cause an MD5 challenge to be sent to the supplicant.  If we don't find a
+      * match, generate an authentication failure event.
+      */
+      if (/*userMgrLoginIndexGet(( char8 *)logicalPortInfo->client.mabUserName,
+                             &logicalPortInfo->client.mabUserIndex) != */ SUCCESS)
+      {
+        logicalPortInfo->client.mabUserIndex = MAB_USER_INDEX_INVALID;
+        reason =  AUTHMGR_FAIL_REASON_INVALID_USER;
+      }
+    }
+
+    if (logicalPortInfo->client.mabUserIndex != MAB_USER_INDEX_INVALID)
+    {
+      /* Make sure user has access to this port */
+      if (/*userMgrPortUserAccessGet(physPort, logicalPortInfo->client.mabUserName, &portAllow) == */ SUCCESS) 
+      {
+        if(portAllow ==  TRUE) 
+        {
+          rc = mabLocalAuthSendAuthReq(logicalPortInfo);
+        }
+      }
+      else
+      {
+        logicalPortInfo->client.mabUserIndex = MAB_USER_INDEX_INVALID;
+        reason =  AUTHMGR_FAIL_REASON_INVALID_USER;
+      } 
+    }
+  }
+  else if (eapRrPkt->type == EAP_RRMD5)
+  {
+     uchar8 *response = (( uchar8 *)eapRrPkt) + sizeof( eapRrPacket_t);
+    authRc = mabLocalAuthMd5ResponseValidate(logicalPortInfo, response);
+    if (authRc ==  SUCCESS)
+    {
+      /* Log the information */
+       LOGF( LOG_SEVERITY_NOTICE,
+          "Local MAB Authenticated Successfully.");
+
+      mabAuthenticatedAction(logicalPortInfo);
+
+    }
+    else if(authRc ==  NOT_EXIST)
+    {
+      reason =  AUTHMGR_FAIL_REASON_AUTH_FAILED;
+    }
+    else 
+    {
+      /* FAILED Unauthenticated vlan needs to be assigned */
+      reason =  AUTHMGR_FAIL_REASON_AUTH_FAILED;
+    }
+  }
+
+  if(reason == AUTHMGR_FAIL_REASON_INVALID_USER)
+  {
+    /* Send the challenge to accomodate clients that does not
+       accept eap-success/failure for initial eap-identity frames */
+    rc = mabLocalAuthSendAuthReq(logicalPortInfo);
+  }
+
+  return rc;
+}
+
+/**************************************************************************
+* @purpose   Validate an MD5 challenge response
+*
+* @param     logicalPortInfo  @b{(input))  Logical Port Info node
+* @param     *response  @b{(input)} pointer to MD5 response data
+*
+* @returns    SUCCESS if authenticated
+* @returns    FAILURE if not authenticated
+*
+* @comments
+*
+* @end
+*************************************************************************/
+RC_t mabLocalAuthMd5ResponseValidate(mabLogicalPortInfo_t *logicalPortInfo,  uchar8 *response)
+{
+  uint32 suppResponseLen, responseDataLen, challengeLen;
+   uchar8 suppAnswer[MAB_MD5_LEN], answer[MAB_MD5_LEN];
+   uchar8 responseData[ PASSWORD_SIZE+MAB_CHALLENGE_LEN+1];
+   uchar8 userPw[ PASSWORD_SIZE];
+  RC_t rc =  FAILURE;
+
+  /* Length is first byte in response field */
+  suppResponseLen = (uint32)(*response);
+  if (suppResponseLen != MAB_MD5_LEN)
+  {
+    return  FAILURE;
+  }
+
+  if (logicalPortInfo->client.mabUserIndex == MAB_USER_INDEX_INVALID)
+  {  
+    return  NOT_EXIST;
+  }
+
+  memcpy(suppAnswer, &response[1], suppResponseLen);
+
+  memset(userPw, 0x0,  PASSWORD_SIZE);
+
+  challengeLen = logicalPortInfo->client.mabChallengelen;
+  responseDataLen = 1 + strlen(( char8 *)userPw) + challengeLen;
+
+  memset(responseData,0,sizeof(responseData));
+  responseData[0] = logicalPortInfo->client.currentIdL;
+  memcpy(&responseData[1], userPw, strlen(( char8 *)userPw));
+  memcpy(&responseData[1+strlen(( char8 *)userPw)], logicalPortInfo->client.mabChallenge, challengeLen);
+
+  mabLocalMd5Calc(responseData, responseDataLen, answer);
+
+  if (memcmp(answer, suppAnswer, MAB_MD5_LEN) == 0)
+    rc =  SUCCESS;
+  else
+    rc =  FAILURE;
+
+  return rc;
+}
+
+/**************************************************************************
+* @purpose   Generate an random challenge
+*
+* @param     *challenge     @b{(output)} pointer to buffer to hold challenge
+* @param     challengeLen   @b{(input)} length of challenge buffer
+*
+* @returns   void
+*
+* @comments
+*
+* @end
+*************************************************************************/
+void mabLocalAuthChallengeGenerate( uchar8 *challenge, uint32 challengeLen)
+{
+  uint32 i, randno, cpLen;
+   uchar8 *vector = &challenge[0];
+
+  bzero(( uchar8 *)vector, challengeLen);
+
+	srand((uint32)time(0));
+	for (i = 0; i < challengeLen;)
+	{
+    cpLen = (uint32)sizeof(uint32);
+
+		randno = (uint32)rand();
+		memcpy (( uchar8 *) vector, ( uchar8 *) &randno, cpLen);
+		vector += cpLen;
+		i += cpLen;
+	}
+
+  return;
+}
+
+/**************************************************************************
+* @purpose   Calculate MD5 for given input buffer and length
+*
+* @param     *inBuf   @b{(input)} pointer to input buffer run MD5 against
+* @param     inLen    @b{(input)} length of input buffer
+* @param     *outBuf  @b{(output)} pointer to output buffer to hold MD5 result
+*
+* @returns   void
+*
+* @comments  *outBuf must be MAB_MD5_LEN (16) bytes
+*
+* @end
+*************************************************************************/
+void mabLocalMd5Calc( uchar8 *inBuf, uint32 inLen,  uchar8 *outBuf)
+{
+   MD5_CTX_t context;
+
+  bzero(outBuf, MAB_MD5_LEN);
+
+  md5_init(&context);
+  md5_update(&context, inBuf, inLen);
+  md5_final(outBuf, &context);
+
+  return;
+}
diff --git a/src/sonic-pac/mab/protocol/mab_mac_db.c b/src/sonic-pac/mab/protocol/mab_mac_db.c
new file mode 100755
index 000000000..a01cfa2b0
--- /dev/null
+++ b/src/sonic-pac/mab/protocol/mab_mac_db.c
@@ -0,0 +1,443 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+
+#include "mab_include.h"
+#include "mab_struct.h"
+
+extern mabBlock_t *mabBlock;
+
+
+/* Global parameters */
+typedef struct mabMacAddrInfo_s{
+     sll_member_t          *next;
+     enetMacAddr_t         suppMacAddr;
+    uint32                lIntIfNum;
+}mabMacAddrInfo_t;
+
+/*************************************************************************
+* @purpose  API to destroy the Mac Addr Info data node
+*
+* @param    ll_member  @b{(input)}  Linked list node containing the
+*                                   Mac Addr Info to be destroyed
+*
+* @returns   SUCCESS
+*
+* @comments This is called by SLL library when a node is being deleted
+*
+* @end
+*************************************************************************/
+RC_t mabMacAddrDataDestroy ( sll_member_t *ll_member)
+{
+  mabMacAddrInfo_t *pMacAddrInfo ;
+
+  pMacAddrInfo = ( mabMacAddrInfo_t *)ll_member;
+
+  pMacAddrInfo->lIntIfNum = MAB_LOGICAL_PORT_ITERATE;
+
+  bufferPoolFree(mabBlock->mabMacAddrBufferPoolId,( uchar8 *)pMacAddrInfo);
+
+  return  SUCCESS;
+}
+/*************************************************************************
+* @purpose  Helper API to compare two Mac Addr Info nodes  and
+*           returns the result
+*
+* @param     p  @b{(input)}  Pointer to Candidate 1 for comparison
+* @param     q  @b{(input)}  Pointer to Candidate 2 for comparison
+*
+* @returns   0   p = q
+* @returns  -1   p < q
+* @returns  +1   p > q
+*
+* @comments This is called by SLL library when a nodes are compared
+*
+* @end
+*************************************************************************/
+ int32 mabMacAddrDataCmp(void *p, void *q, uint32 key)
+{
+     int32 cmp;
+    cmp = memcmp(((mabMacAddrInfo_t *)p)->suppMacAddr.addr,((mabMacAddrInfo_t *)q)->suppMacAddr.addr, ENET_MAC_ADDR_LEN);
+    if (cmp == 0)
+      return 0;
+  else if (cmp < 0)
+      return -1;
+  else
+      return 1;
+
+}
+
+
+/*********************************************************************
+* @purpose  Initialize Mac Address Info Database
+*
+* @param    nodeCount    @b{(input)} The number of nodes to be created.
+*
+* @returns   SUCCESS or  FAILURE
+*
+* @comments none
+*
+* @end
+*********************************************************************/
+RC_t mabMacAddrInfoDBInit(uint32 nodeCount)
+{
+  /* Allocate the buffer pool */
+  if (bufferPoolInit( MAB_COMPONENT_ID, nodeCount, sizeof(mabMacAddrInfo_t), 
+                     "MAB Mac Addr Bufs",
+                     &(mabBlock->mabMacAddrBufferPoolId)) !=  SUCCESS)
+  {
+     LOGF(  LOG_SEVERITY_NOTICE,
+        "\n%s: Error allocating buffers for supplicant mac address database."
+        " Could not allocate buffer pool for Mac address link list. Insufficient memory."
+        ,__FUNCTION__);
+    MAB_EVENT_TRACE("%s: Error allocating buffers for supplicant mac address database\n",__FUNCTION__);
+    return  FAILURE;
+  }
+
+  /* Create the SLL*/
+  if (SLLCreate( MAB_COMPONENT_ID,  SLL_ASCEND_ORDER,
+               sizeof( enetMacAddr_t),mabMacAddrDataCmp ,mabMacAddrDataDestroy ,
+               &mabBlock->mabMacAddrSLL) !=  SUCCESS)
+  {
+     LOGF( LOG_SEVERITY_INFO,
+            "\n%s: Failed to create supplicant mac address linked list \n",__FUNCTION__);
+    MAB_EVENT_TRACE("%s: Failed to create supplicant mac address linked list \n",__FUNCTION__);
+    return  FAILURE;
+  }
+
+  /* Create Mac Address DB Semaphore*/
+  /* Read write lock for controlling Mac Addr Info additions and Deletions */
+  if (osapiRWLockCreate(&mabBlock->mabMacAddrDBRWLock,
+                        OSAPI_RWLOCK_Q_PRIORITY) ==  FAILURE)
+  {
+       LOGF( LOG_SEVERITY_INFO,
+              "Error creating mabMacAddrDBRWLock semaphore \n");
+      return  FAILURE;
+  }
+
+  return  SUCCESS;
+}
+
+
+/*********************************************************************
+* @purpose  DeInitialize Mac Address Info Database
+*
+* @param    none
+*
+* @returns   SUCCESS or  FAILURE
+*
+* @comments none
+*
+* @end
+*********************************************************************/
+RC_t mabMacAddrInfoDBDeInit(void)
+{
+  /* Destroy the SLL */
+  if (SLLDestroy( MAB_COMPONENT_ID, &mabBlock->mabMacAddrSLL)!=  SUCCESS)
+  {
+     LOGF( LOG_SEVERITY_INFO,
+            "\n%s: Failed to destroy the supplicant mac address linked list \n",__FUNCTION__);
+    MAB_EVENT_TRACE("\n%s: Failed to destroy the supplicant mac address linked list \n",__FUNCTION__);
+  }
+
+  /* Deallocate the buffer pool */
+
+  if (mabBlock->mabMacAddrBufferPoolId  != 0)
+  {
+    bufferPoolDelete(mabBlock->mabMacAddrBufferPoolId );
+    mabBlock->mabMacAddrBufferPoolId  = 0;
+  }
+
+  /* Delete the Mac Address DB Semaphore */
+  (void)osapiRWLockDelete(mabBlock->mabMacAddrDBRWLock);
+
+
+  return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose  Add a node Mac Address Info Database
+*
+* @param    mac_addr  supplicant mac address
+* @param    lIntIfNum corresponding logical interface
+*
+* @returns   SUCCESS or  FAILURE
+*
+* @comments none
+*
+* @end
+*********************************************************************/
+RC_t mabMacAddrInfoAdd( enetMacAddr_t *mac_addr,uint32 lIntIfNum)
+{
+   mabMacAddrInfo_t *pMacAddrInfo,*pMacAddrFind,macAddrInfo;
+    enetMacAddr_t    nullMacAddr;
+   uint32 physPort = 0;
+
+   memset(&(nullMacAddr.addr),0, ENET_MAC_ADDR_LEN);
+
+   MAB_PORT_GET(physPort, lIntIfNum);
+
+   if (mac_addr== NULL)
+   {
+       MAB_EVENT_TRACE("\n%s: Could not add supplicant mac address. Mac address is NULL. Input error. \n",
+               __FUNCTION__);
+       return  FAILURE;
+   }
+   if((lIntIfNum == MAB_LOGICAL_PORT_ITERATE)||
+        (memcmp(mac_addr->addr,nullMacAddr.addr, ENET_MAC_ADDR_LEN)==0))
+   {
+       MAB_EVENT_TRACE("\n%s: Could not add supplicant mac address(%2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x) logical Interface: %d . Input error. \n",
+               __FUNCTION__, mac_addr->addr[0],mac_addr->addr[1],mac_addr->addr[2],mac_addr->addr[3],mac_addr->addr[4],mac_addr->addr[5],lIntIfNum);
+       return  FAILURE;
+   }
+
+   /* In order to handle client roaming , check if the mac address already exists*/
+   /* copy info to node*/
+    memcpy(macAddrInfo.suppMacAddr.addr,mac_addr->addr, ENET_MAC_ADDR_LEN);
+   /* take Mac address DB semaphore*/
+   (void)osapiWriteLockTake(mabBlock->mabMacAddrDBRWLock,  WAIT_FOREVER);
+
+   if ((pMacAddrFind=(mabMacAddrInfo_t *)SLLFind(&mabBlock->mabMacAddrSLL,( sll_member_t *)&macAddrInfo)) !=  NULLPTR)
+   {
+       pMacAddrFind->lIntIfNum = lIntIfNum;
+      (void) osapiWriteLockGive(mabBlock->mabMacAddrDBRWLock);
+       MAB_EVENT_TRACE("\n%s: Found supplicant mac address(%2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x) Changed logical Interface to: %d .\n",
+               __FUNCTION__, mac_addr->addr[0],mac_addr->addr[1],mac_addr->addr[2],mac_addr->addr[3],mac_addr->addr[4],mac_addr->addr[5],lIntIfNum);
+       return  SUCCESS;
+   }
+
+   /* Allocate memory from the buffer pool*/
+   if (bufferPoolAllocate(mabBlock->mabMacAddrBufferPoolId,
+                            ( uchar8 **)&pMacAddrInfo) !=  SUCCESS)
+     {
+       /* release semaphore*/
+       (void)osapiWriteLockGive(mabBlock->mabMacAddrDBRWLock);
+
+        LOGF(  LOG_SEVERITY_NOTICE,
+           "\n%s: Could not add supplicant mac address(%2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x) logical Interface: %d . Insufficient memory. \n",
+               __FUNCTION__, mac_addr->addr[0],mac_addr->addr[1],mac_addr->addr[2],mac_addr->addr[3],mac_addr->addr[4],mac_addr->addr[5],lIntIfNum);
+
+       MAB_EVENT_TRACE("\n%s: Could not add supplicant mac address(%2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x) logical Interface: %d . Insufficient memory. \n",
+               __FUNCTION__, mac_addr->addr[0],mac_addr->addr[1],mac_addr->addr[2],mac_addr->addr[3],mac_addr->addr[4],mac_addr->addr[5],lIntIfNum);
+
+       return  FAILURE;
+     }
+
+   /* copy details into allocated node*/
+   memset(pMacAddrInfo,0,sizeof(mabMacAddrInfo_t));
+   memcpy(pMacAddrInfo->suppMacAddr.addr,mac_addr->addr, ENET_MAC_ADDR_LEN);
+   pMacAddrInfo->lIntIfNum = lIntIfNum;
+
+
+   /* Add node to the SLL*/
+   if (SLLAdd(&mabBlock->mabMacAddrSLL, ( sll_member_t *)pMacAddrInfo)
+         !=  SUCCESS)
+   {
+       MAB_EVENT_TRACE("\n%s: Could not add supplicant mac address(%2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x) logical Interface: %d . \n",
+               __FUNCTION__, mac_addr->addr[0],mac_addr->addr[1],mac_addr->addr[2],mac_addr->addr[3],mac_addr->addr[4],mac_addr->addr[5],lIntIfNum);
+       /* Free the previously allocated bufferpool */
+       bufferPoolFree(mabBlock->mabMacAddrBufferPoolId, ( uchar8 *)pMacAddrInfo);
+       /* release semaphore*/
+       (void)osapiWriteLockGive(mabBlock->mabMacAddrDBRWLock);
+       return  FAILURE;
+   }
+
+    /* release semaphore*/
+    (void)osapiWriteLockGive(mabBlock->mabMacAddrDBRWLock);
+    return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose  Remove a node from the Mac Address Info Database
+*
+* @param    mac_addr  supplicant mac address
+*
+* @returns   SUCCESS or  FAILURE
+*
+* @comments none
+*
+* @end
+*********************************************************************/
+RC_t mabMacAddrInfoRemove( enetMacAddr_t *mac_addr)
+{
+   mabMacAddrInfo_t macAddrInfo;
+    enetMacAddr_t    nullMacAddr;
+
+   memset(&nullMacAddr.addr,0, ENET_MAC_ADDR_LEN);
+   /*input check*/
+   if ((mac_addr ==  NULLPTR) ||
+        (memcmp(mac_addr->addr,nullMacAddr.addr, ENET_MAC_ADDR_LEN)==0))
+   {
+       return  FAILURE;
+   }
+   /* copy info to node*/
+   memcpy(macAddrInfo.suppMacAddr.addr,mac_addr->addr, ENET_MAC_ADDR_LEN);
+   macAddrInfo.lIntIfNum = 0;
+
+   /* take Mac address DB semaphore*/
+   (void)osapiWriteLockTake(mabBlock->mabMacAddrDBRWLock,  WAIT_FOREVER);
+
+    /* delete from SLL*/
+    if (SLLDelete(&mabBlock->mabMacAddrSLL, ( sll_member_t *)&macAddrInfo)
+                  !=  SUCCESS)
+    {
+        /* release semaphore*/
+       (void)osapiWriteLockGive(mabBlock->mabMacAddrDBRWLock);
+
+        MAB_EVENT_TRACE("\n%s: Could not delete supplicant mac address(%2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x) from the SLL . \n",
+               __FUNCTION__, mac_addr->addr[0],mac_addr->addr[1],mac_addr->addr[2],mac_addr->addr[3],mac_addr->addr[4],mac_addr->addr[5]);
+       return  FAILURE;
+    }
+
+  /* release semaphore*/
+  (void)osapiWriteLockGive(mabBlock->mabMacAddrDBRWLock);
+  return  SUCCESS;
+}
+
+
+/*********************************************************************
+* @purpose  Find a node in the Mac Address Info Database
+*
+* @param    mac_addr            supplicant mac address
+* @param   lIntIfnum{(output)} logical Port Number
+*
+* @returns   SUCCESS or  FAILURE
+*
+* @comments none
+*
+* @end
+*********************************************************************/
+RC_t mabMacAddrInfoFind( enetMacAddr_t *mac_addr,uint32 *lIntIfNum)
+{
+  mabMacAddrInfo_t macAddrInfo,*pMacAddrInfo;
+   enetMacAddr_t    nullMacAddr;
+
+  memset(&nullMacAddr.addr,0, ENET_MAC_ADDR_LEN);
+  /*input check*/
+  if ((mac_addr ==  NULLPTR) ||
+      (memcmp(mac_addr->addr,nullMacAddr.addr, ENET_MAC_ADDR_LEN)==0))
+  {
+      return  FAILURE;
+  }
+  /* copy info to node*/
+  memcpy(macAddrInfo.suppMacAddr.addr,mac_addr->addr, ENET_MAC_ADDR_LEN);
+
+  /* take Mac address DB semaphore*/
+   (void)osapiWriteLockTake(mabBlock->mabMacAddrDBRWLock,  WAIT_FOREVER);
+
+  if ((pMacAddrInfo=(mabMacAddrInfo_t *)SLLFind(&mabBlock->mabMacAddrSLL,( sll_member_t *)&macAddrInfo)) ==  NULLPTR)
+  {
+      /* release semaphore*/
+     (void)osapiWriteLockGive(mabBlock->mabMacAddrDBRWLock);
+      MAB_EVENT_TRACE("\n%s: Could not find supplicant mac address(%2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x). \n",
+               __FUNCTION__, mac_addr->addr[0],mac_addr->addr[1],mac_addr->addr[2],mac_addr->addr[3],mac_addr->addr[4],mac_addr->addr[5]);
+      *lIntIfNum = MAB_LOGICAL_PORT_ITERATE;
+      return  FAILURE;
+  }
+  *lIntIfNum = pMacAddrInfo->lIntIfNum;
+  /* release semaphore*/
+  (void)osapiWriteLockGive(mabBlock->mabMacAddrDBRWLock);
+  return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose  Find the next node in the Mac Address Info Database
+*
+* @param    mac_addr            supplicant mac address
+* @param   lIntIfnum{(output)}  logical Port Number
+*
+* @returns   SUCCESS or  FAILURE
+*
+* @comments none
+*
+* @end
+*********************************************************************/
+RC_t mabMacAddrInfoFindNext( enetMacAddr_t *mac_addr,uint32 *lIntIfNum)
+{
+  mabMacAddrInfo_t macAddrInfo,*pMacAddrInfo;
+
+  /*input check*/
+  if (mac_addr ==  NULLPTR)
+  {
+      return  FAILURE;
+  }
+
+  /* copy info to node*/
+  memcpy(macAddrInfo.suppMacAddr.addr,mac_addr->addr, ENET_MAC_ADDR_LEN);
+
+   /* take Mac address DB semaphore*/
+   (void)osapiWriteLockTake(mabBlock->mabMacAddrDBRWLock,  WAIT_FOREVER);
+
+  if ((pMacAddrInfo=(mabMacAddrInfo_t *)SLLFindNext(&mabBlock->mabMacAddrSLL,( sll_member_t *)&macAddrInfo)) ==  NULLPTR)
+  {
+      /* release semaphore*/
+      (void)osapiWriteLockGive(mabBlock->mabMacAddrDBRWLock);
+
+      MAB_EVENT_TRACE("\n%s: Could not find next node for supplicant mac address(%2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x). \n",
+               __FUNCTION__, mac_addr->addr[0],mac_addr->addr[1],mac_addr->addr[2],mac_addr->addr[3],mac_addr->addr[4],mac_addr->addr[5]);
+      *lIntIfNum = MAB_LOGICAL_PORT_ITERATE;
+      return  FAILURE;
+  }
+  memcpy(mac_addr->addr,pMacAddrInfo->suppMacAddr.addr, ENET_MAC_ADDR_LEN);
+  *lIntIfNum = pMacAddrInfo->lIntIfNum;
+
+  /* release semaphore*/
+  (void)osapiWriteLockGive(mabBlock->mabMacAddrDBRWLock);
+
+  return  SUCCESS;
+}
+
+/*********************************************************************
+* @purpose  Print the information in the Mac Address Database
+*
+* @param
+*
+* @returns   SUCCESS or  FAILURE
+*
+* @comments none
+*
+* @end
+*********************************************************************/
+RC_t mabDebugMacAddrDBList()
+{
+     enetMacAddr_t macAddr,nullMacAddr;
+    uint32 lIntIfNum;
+
+    memset(&macAddr,0,sizeof( enetMacAddr_t));
+
+    while(mabMacAddrInfoFindNext(&macAddr,&lIntIfNum)==  SUCCESS)
+    {
+        SYSAPI_PRINTF("\n Mac Address: %2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x",
+                      macAddr.addr[0],macAddr.addr[1],macAddr.addr[2],macAddr.addr[3],macAddr.addr[4],macAddr.addr[5]);
+
+        SYSAPI_PRINTF("\n Logical Port :%u",lIntIfNum);
+
+    }
+
+     memset(&nullMacAddr,0,sizeof( enetMacAddr_t));
+     if (memcmp(macAddr.addr,nullMacAddr.addr, ENET_MAC_ADDR_LEN)!=0)
+     {
+         if (mabMacAddrInfoFind(&macAddr,&lIntIfNum)== SUCCESS)
+         {
+             SYSAPI_PRINTF("\n Testing mabMacAddrInfoFind.Found \n");
+             SYSAPI_PRINTF("\n Mac Address: %2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x",
+                      macAddr.addr[0],macAddr.addr[1],macAddr.addr[2],macAddr.addr[3],macAddr.addr[4],macAddr.addr[5]);
+
+            SYSAPI_PRINTF("\n Logical Port :%u",lIntIfNum);
+         }
+     }
+    return  SUCCESS;
+}
diff --git a/src/sonic-pac/mab/protocol/mab_radius.c b/src/sonic-pac/mab/protocol/mab_radius.c
new file mode 100755
index 000000000..7b654b733
--- /dev/null
+++ b/src/sonic-pac/mab/protocol/mab_radius.c
@@ -0,0 +1,943 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#define  MAC_EAPOL_PDU
+
+#include "mab_include.h"
+#include "mab_auth.h"
+#include "mab_client.h"
+#include "mab_control.h"
+#include "mab_timer.h"
+#include "utils_api.h"
+#include "sysapi.h"
+#include "includes.h"
+#include "common.h"
+#include "eloop.h"
+#include "radius.h"
+#include "radius_client.h"
+#include "mab_radius.h"
+#include "osapi_sem.h"
+
+#define RADIUS_STATUS_SUCCESS            1
+#define RADIUS_STATUS_CHALLENGED         2
+#define RADIUS_STATUS_AUTHEN_FAILURE     3
+#define RADIUS_STATUS_REQUEST_TIMED_OUT  4
+#define RADIUS_STATUS_COMM_FAILURE       5
+#define RADIUS_STATUS_ALL_AUTH_SERVERS_DEAD   6
+
+static  enetMacAddr_t  EAPOL_PDU_MAC_ADDR =
+{{0x01, 0x80, 0xC2, 0x00, 0x00, 0x03}};
+
+#include "mab_struct.h"
+
+extern mabBlock_t *mabBlock;
+
+/**************************************************************************
+ * @purpose   Handle RADIUS client callbacks
+ *
+ * @param     status         @b{(input)} status of RADIUS response (accept, reject, challenge, etc)
+ * @param     correlator     @b{(input)} correlates responses to requests; for mab, this is ifIndex
+ * @param     *attributes    @b{(input)} RADIUS attribute data
+ * @param     attributesLen  @b{(input)} length of RADIUS attribute data
+ *
+ * @returns    SUCCESS
+ * @returns    FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *************************************************************************/
+RC_t mabRadiusResponseCallback (void *msg,
+                                   unsigned int correlator)
+{
+  mabAaaMsg_t mabAaaMsg;
+
+  /* Fill in AAA message structure */
+  bzero(( uchar8 *)&mabAaaMsg, sizeof(mabAaaMsg_t));
+  mabAaaMsg.resp = msg;
+
+  return mabIssueCmd(mabAaaInfoReceived, correlator, &mabAaaMsg);
+}
+
+int mab_radius_resp_code_map(unsigned int code, unsigned int *status)
+{
+  switch (code)
+  {
+    case RADIUS_CODE_ACCESS_ACCEPT:
+         *status = RADIUS_STATUS_SUCCESS;
+         break;
+
+    case RADIUS_CODE_ACCESS_REJECT:
+         *status = RADIUS_STATUS_AUTHEN_FAILURE;
+         break;
+
+    case RADIUS_CODE_ACCESS_CHALLENGE:
+         *status = RADIUS_STATUS_CHALLENGED;
+         break;
+    default:
+        *status = RADIUS_STATUS_REQUEST_TIMED_OUT;
+  }
+
+ return 0;
+}
+
+
+/**************************************************************************
+ * @purpose   Process RADIUS Server responses
+ *
+ * @param     lIntIfNum       @b{(input)} Logical internal interface number of port being authenticated
+ * @param     status         @b{(input)} status of RADIUS response (accept, reject, challenge, etc)
+ * @param     *attributes    @b{(input)} RADIUS attribute data
+ * @param     attributesLen  @b{(input)} length of RADIUS attribute data
+ *
+ * @returns    SUCCESS
+ * @returns    FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *************************************************************************/
+RC_t mabRadiusResponseProcess(unsigned int lIntIfNum, void *resp) 
+{
+  mabLogicalPortInfo_t *logicalPortInfo;
+  mabPortCfg_t *pCfg;
+   RC_t rc =  FAILURE;
+   uchar8 ifName[ NIM_IF_ALIAS_SIZE + 1];
+  uint32 physPort = 0, lPort = 0, type = 0;
+  uint32 status = 0, code = 0;
+
+  if (!(MAB_IS_READY))
+    return  SUCCESS;
+  logicalPortInfo = mabLogicalPortInfoGet(lIntIfNum);
+  if (logicalPortInfo ==  NULLPTR)
+  {
+    return  FAILURE;
+  }
+
+  MAB_LPORT_KEY_UNPACK(physPort, lPort, type, lIntIfNum);
+
+  if (mabIntfIsConfigurable(physPort, &pCfg) !=  TRUE)
+    return  FAILURE;
+/* get the response code */
+  if (-1 == radius_get_resp_code(resp, &code))
+    return  FAILURE;
+
+  nimGetIntfName(physPort,  ALIASNAME, ifName);
+  MAB_EVENT_TRACE(
+      "%s:Received Radius response message on logicalPort:[%s] with status[%d]\n\r",
+      __FUNCTION__,ifName, code);
+
+   mab_radius_resp_code_map(code, &status);
+
+  /* Ensure we are expecting a response from the server */
+  if (logicalPortInfo->protocol.mabAuthState == MAB_AUTHENTICATING)
+  {
+    switch (status)
+    {
+      case RADIUS_STATUS_SUCCESS:
+        rc = mabRadiusAcceptProcess(lIntIfNum, resp);
+
+        if (logicalPortInfo->client.attrInfo.serverStateLen != 0)
+        {
+           memset(logicalPortInfo->client.attrInfo.serverState,0, MAB_SERVER_STATE_LEN);
+           logicalPortInfo->client.attrInfo.serverStateLen = 0;
+        }
+
+        break;
+
+      case RADIUS_STATUS_CHALLENGED:
+        rc = mabRadiusChallengeProcess(lIntIfNum, resp);
+        break;
+
+      case RADIUS_STATUS_AUTHEN_FAILURE:
+
+        /* response from radius server received.
+           stop the serverwhile timer */
+        mabTimerDestroy(mabBlock->mabTimerCB, logicalPortInfo);
+
+
+        /* Initialize state to NULL as the session has been ended with a failure */ 
+        if (logicalPortInfo->client.attrInfo.serverStateLen != 0)
+        {
+           memset(logicalPortInfo->client.attrInfo.serverState,0, MAB_SERVER_STATE_LEN);
+           logicalPortInfo->client.attrInfo.serverStateLen = 0;
+        }
+
+          /* Log the information */
+           LOGF( LOG_SEVERITY_NOTICE,
+              "Radius Authentication failed on physPort:[%s] lIntIfNum:[%d]"
+               "Mac Address :[%02x:%02x:%02x:%02x:%02x:%02x].\n\r",
+               ifName, lIntIfNum,
+               logicalPortInfo->client.suppMacAddr.addr[0],
+               logicalPortInfo->client.suppMacAddr.addr[1],
+               logicalPortInfo->client.suppMacAddr.addr[2],
+               logicalPortInfo->client.suppMacAddr.addr[3],
+               logicalPortInfo->client.suppMacAddr.addr[4],
+               logicalPortInfo->client.suppMacAddr.addr[5]);
+
+            logicalPortInfo->protocol.authFail =  TRUE;
+            mabUnAuthenticatedAction(logicalPortInfo);
+        break;
+
+      case RADIUS_STATUS_REQUEST_TIMED_OUT:
+      case RADIUS_STATUS_COMM_FAILURE:
+
+        MAB_EVENT_TRACE(
+            "Reason:'%s' on physPort:[%d] logical interface:[%s]\n\r",
+            (status == RADIUS_STATUS_COMM_FAILURE)?"RADIUS_STATUS_COMM_FAILURE":"RADIUS_STATUS_REQUEST_TIMED_OUT",
+            physPort, ifName);
+
+        /* response from radius server received.
+           stop the serverwhile timer */
+        mabTimerDestroy(mabBlock->mabTimerCB, logicalPortInfo);
+
+        /* Initialize state to NULL as the session has been ended with a failure */
+        if (logicalPortInfo->client.attrInfo.serverStateLen != 0)
+        {
+           memset(logicalPortInfo->client.attrInfo.serverState,0, MAB_SERVER_STATE_LEN);
+           logicalPortInfo->client.attrInfo.serverStateLen = 0;
+        }
+
+        LOGF(LOG_SEVERITY_NOTICE,
+             "Failed to authenticate on logical interface %s.", ifName);
+
+        logicalPortInfo->protocol.authFail =  TRUE;
+        mabUnAuthenticatedAction(logicalPortInfo);
+
+        break;
+ 
+      case RADIUS_STATUS_ALL_AUTH_SERVERS_DEAD:
+
+        /* All Radius Auth servers unreachable. Go through Inaccessible Auth Bypass */
+         LOGF( LOG_SEVERITY_INFO, "All RADIUS Servers Dead.");
+
+        /* response from radius server received.
+           stop the serverwhile timer */
+        mabTimerDestroy(mabBlock->mabTimerCB, logicalPortInfo);
+
+        logicalPortInfo->protocol.authFail =  TRUE;
+        mabUnAuthenticatedAction(logicalPortInfo);
+
+        break;
+
+      default:
+        rc =  FAILURE;
+        /* Log the information */
+         LOGF( LOG_SEVERITY_NOTICE,
+            "Failed to authenticate on interface %s. Received an invalid RADIUS status type.", ifName);
+        break;
+    }
+  }
+
+    radius_msg_free(resp);
+  return rc;
+}
+
+/**************************************************************************
+ * @purpose   Process RADIUS Challenge from server
+ *
+ * @param     lIntIfNum       @b{(input)} Logical  interface number of port being authenticated
+ * @param     *radiusPayload  @b{(input)} payload of RADIUS frame (attributes)
+ * @param     payloadLen      @b{(input)} length of RADIUS payload
+ *
+ * @returns    SUCCESS
+ * @returns    FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *************************************************************************/
+RC_t mabRadiusChallengeProcess(uint32 lIntIfNum, void *resp)
+{
+   netBufHandle bufHandle;
+   uchar8 *data, *eapBuf;
+   enetHeader_t *enetHdr;
+   enet_encaps_t *encap;
+   uchar8 srcMac[ MAC_ADDR_LEN];
+   eapolPacket_t *eapolPkt;
+   authmgrEapPacket_t *eapPkt;
+  uint32 length;
+  RC_t rc =  SUCCESS;
+  mabPortCfg_t *pCfg;
+  mabLogicalPortInfo_t *logicalPortInfo;
+  uint32 physPort = 0, lPort = 0, type = 0;
+   uchar8 ifName[ NIM_IF_ALIAS_SIZE + 1];
+  challenge_info_t get_data;
+
+  logicalPortInfo = mabLogicalPortInfoGet(lIntIfNum);
+  if ((logicalPortInfo ==  NULLPTR) || ( NULLPTR == resp))
+  {
+    return  FAILURE;
+  }
+
+  MAB_LPORT_KEY_UNPACK(physPort, lPort, type, lIntIfNum);
+
+  if (mabIntfIsConfigurable(physPort, &pCfg) !=  TRUE)
+    return  FAILURE;
+
+  /* response from radius server received.
+     stop the serverwhile timer */
+  mabTimerDestroy(mabBlock->mabTimerCB, logicalPortInfo);
+
+  nimGetIntfName(physPort,  ALIASNAME, ifName);
+  MAB_EVENT_TRACE(
+      "%s:Received Radius Challenge message for "
+      "client - %02X:%02X:%02X:%02X:%02X:%02X on port - %s[%d]\n",
+      __FUNCTION__,( uchar8)logicalPortInfo->client.suppMacAddr.addr[0],
+      ( uchar8)logicalPortInfo->client.suppMacAddr.addr[1],
+      ( uchar8)logicalPortInfo->client.suppMacAddr.addr[2],
+      ( uchar8)logicalPortInfo->client.suppMacAddr.addr[3],
+      ( uchar8)logicalPortInfo->client.suppMacAddr.addr[4],
+      ( uchar8)logicalPortInfo->client.suppMacAddr.addr[5], ifName, lIntIfNum);
+
+   nimGetIntfAddress(physPort,  NULL, srcMac);
+  
+  SYSAPI_NET_MBUF_GET(bufHandle);
+  if (bufHandle ==  NULL)
+  {
+     LOGF( LOG_SEVERITY_NOTICE,
+        "mabRadiusChallengeProcess: Out of system buffers."
+        " 802.1X cannot process/transmit message due to lack of internal buffers");
+    return  FAILURE;
+  }
+
+ SYSAPI_NET_MBUF_GET_DATASTART(bufHandle, data);
+  /* Set ethernet header */
+  enetHdr = ( enetHeader_t *)(data);
+  /* Set dest and source MAC in ethernet header */
+  memcpy(enetHdr->dest.addr,  EAPOL_PDU_MAC_ADDR.addr,  MAC_ADDR_LEN);
+  memcpy(enetHdr->src.addr, srcMac,  MAC_ADDR_LEN);
+
+  /* Set ethernet type */
+  encap = ( enet_encaps_t *)(( uchar8 *)enetHdr +  ENET_HDR_SIZE);
+  encap->type = osapiHtons( ETYPE_EAPOL);
+
+  /* Set EAPOL header */
+  eapolPkt = ( eapolPacket_t *)(( uchar8 *)encap +  ENET_ENCAPS_HDR_SIZE);
+  eapolPkt->protocolVersion =  MAB_PAE_PORT_PROTOCOL_VERSION_1;
+  eapolPkt->packetType = EAPOL_EAPPKT;
+
+  eapPkt = ( authmgrEapPacket_t *)(( uchar8 *)eapolPkt + sizeof( eapolPacket_t));
+  eapBuf = ( uchar8 *)eapPkt;
+
+  logicalPortInfo->client.attrInfo.rcvdEapAttr =  FALSE;
+  if ( NULLPTR != resp)
+  {
+    memset(&get_data, 0, sizeof(get_data));
+    get_data.nas_port = lIntIfNum;
+    get_data.challenge = logicalPortInfo->client.mabChallenge;
+    get_data.challenge_len = &logicalPortInfo->client.mabChallengelen;
+    /*get_data.challenge_len = 32;*/
+
+    get_data.attrInfo = &logicalPortInfo->client.attrInfo;
+    get_data.supp_data = eapBuf;
+
+
+    rc = radiusClientChallengeProcess(resp, &get_data);
+    if ( SUCCESS != rc)
+    {
+      SYSAPI_NET_MBUF_FREE(bufHandle);
+      return  FAILURE;
+    }
+
+    if (0 == logicalPortInfo->client.attrInfo.accessLevel)
+           logicalPortInfo->client.attrInfo.accessLevel = RADIUS_SERVICE_TYPE_LOGIN;
+
+
+      if ((logicalPortInfo->client.attrInfo.accessLevel != RADIUS_SERVICE_TYPE_ADMIN) &&
+           (logicalPortInfo->client.attrInfo.accessLevel != RADIUS_SERVICE_TYPE_LOGIN) &&
+           (RADIUS_SERVICE_TYPE_CALL_CHECK != logicalPortInfo->client.attrInfo.accessLevel))
+       {
+          LOGF( LOG_SEVERITY_NOTICE,
+                 "Received an unsupported service-type value (%d) in the "
+                 "radius challenge message, sending EAP failure to the "
+                 "client %02X:%02X:%02X:%02X:%02X:%02X."
+                 "Supported values are 'Login' and 'Admin'.Modify the radius "
+                 "server settings with supported service-type",
+                 logicalPortInfo->client.attrInfo.accessLevel, ( uchar8)logicalPortInfo->client.suppMacAddr.addr[0],
+                 ( uchar8)logicalPortInfo->client.suppMacAddr.addr[1],
+                 ( uchar8)logicalPortInfo->client.suppMacAddr.addr[2],
+                 ( uchar8)logicalPortInfo->client.suppMacAddr.addr[3],
+                 ( uchar8)logicalPortInfo->client.suppMacAddr.addr[4],
+                 ( uchar8)logicalPortInfo->client.suppMacAddr.addr[5]);
+      SYSAPI_NET_MBUF_FREE(bufHandle);
+         return  FAILURE;
+       }
+  }
+
+  eapolPkt->packetBodyLength = eapPkt->length; /* already in network byte order */
+
+  length =  ENET_HDR_SIZE +  ENET_ENCAPS_HDR_SIZE + sizeof( eapolPacket_t) +
+    osapiNtohs(eapolPkt->packetBodyLength);
+  SYSAPI_NET_MBUF_SET_DATALENGTH(bufHandle, length);
+
+  /* send request to supplicant */
+  rc = mabClientRequestAction(logicalPortInfo, bufHandle);
+
+  return rc;
+}
+
+/**************************************************************************
+ * @purpose   Build VP list and send Access Request to RADIUS client
+ *
+ * @param     lIntIfNum       @b{(input)} Logical interface number of port being authenticated
+ * @param     *suppEapData  @b{(input)} EAP info received from supplicant
+ *
+ * @returns    SUCCESS
+ * @returns    FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *************************************************************************/
+RC_t mabRadiusAccessRequestSend(uint32 lIntIfNum,  uchar8 *suppEapData)
+{
+   authmgrEapPacket_t *eapPkt =  NULLPTR;
+  RC_t rc;
+  mabPortCfg_t *pCfg;
+  mabLogicalPortInfo_t *logicalPortInfo;
+  uint32 physPort;
+  uint32 ifIndex;
+  access_req_info_t *req;
+  mab_radius_cmd_msg_t cmd_req;
+   uchar8 localMac[6];
+   uchar8 calledId[AUTHMGR_MAC_ADDR_STR_LEN+1];
+   uchar8 callingId[AUTHMGR_MAC_ADDR_STR_LEN+1];
+   uchar8 nasPortId[ NIM_IF_ALIAS_SIZE + 1];
+   uchar8 md5ChkSum[MAB_MD5_LEN+1], responseData[ PASSWORD_SIZE + MAB_CHALLENGE_LEN + 2];
+  uint32 responseDataLen;
+   uchar8 password[ PASSWORD_SIZE];
+  uint32 challengelen;
+   uchar8 chapPassword[MAB_MD5_LEN+1];
+
+  if (suppEapData !=  NULL)
+    eapPkt = ( authmgrEapPacket_t *)suppEapData;
+
+  logicalPortInfo = mabLogicalPortInfoGet(lIntIfNum);
+  if (logicalPortInfo ==  NULLPTR)
+  {
+    return  FAILURE;
+  }
+
+  MAB_PORT_GET(physPort, lIntIfNum);
+
+
+  MAB_EVENT_TRACE(
+      "%s:Recieved Radius send Access Request message for logical - %d \n",
+      __FUNCTION__,lIntIfNum);
+
+  if (mabIntfIsConfigurable(physPort, &pCfg) !=  TRUE)
+    return  FAILURE;
+
+  if (nimGetIntfIfIndex(physPort, &ifIndex) !=  SUCCESS)
+    return  FAILURE;
+
+  if ( AUTHMGR_PORT_MAB_AUTH_TYPE_CHAP == logicalPortInfo->client.mabAuthType)
+  {
+    memset(logicalPortInfo->client.mabChallenge,0, MAB_CHALLENGE_LEN);
+    mabLocalAuthChallengeGenerate(logicalPortInfo->client.mabChallenge,  MAB_CHAP_CHALLENGE_LEN);
+    logicalPortInfo->client.mabChallengelen =  MAB_CHAP_CHALLENGE_LEN;
+
+    /* generate CHAP-Password using MD5 encryption */
+    memset(password, 0, sizeof(password));
+    osapiStrncpySafe(password, logicalPortInfo->client.mabUserName, strlen(logicalPortInfo->client.mabUserName)+ 1);
+
+    challengelen= logicalPortInfo->client.mabChallengelen;
+    responseDataLen = 1 + strlen(( char8 *)password) + challengelen;
+
+    memset(responseData, 0, sizeof(responseData));
+    responseData[0] = logicalPortInfo->client.currentIdL;
+
+    memcpy (&responseData[1], password, strlen(( char8 *)password));
+    memcpy (&responseData[1+strlen(( char8 *)password)], logicalPortInfo->client.mabChallenge, challengelen);
+
+    mabLocalMd5Calc(responseData, responseDataLen, md5ChkSum);
+
+    chapPassword[0] = logicalPortInfo->client.currentIdL;
+    memcpy(&chapPassword[1], md5ChkSum, MAB_MD5_LEN);
+  }
+
+  req = (access_req_info_t *)malloc(sizeof(access_req_info_t)); 
+  memset(req, 0, sizeof(req));
+
+  /* pack the reqired info to sent the access-req */
+  req->user_name = logicalPortInfo->client.mabUserName;
+  req->user_name_len = strlen(logicalPortInfo->client.mabUserName);
+  req->chap_password = chapPassword;
+  req->chap_password_len = MAB_MD5_LEN+1;
+  req->challenge = logicalPortInfo->client.mabChallenge;
+  req->challenge_len = logicalPortInfo->client.mabChallengelen;
+  req->mab_auth_type = logicalPortInfo->client.mabAuthType;
+  req->supp_eap_data = suppEapData;
+
+  /* Called-Station-Id */
+  bzero(localMac,  MAC_ADDR_LEN);
+
+  if (nimGetIntfAddress(physPort,  NULL, localMac) ==  SUCCESS)
+  {
+    bzero(calledId, AUTHMGR_MAC_ADDR_STR_LEN+1);
+    osapiSnprintf(( char8 *)calledId, sizeof(calledId), "%02X-%02X-%02X-%02X-%02X-%02X",
+                  localMac[0], localMac[1], localMac[2], localMac[3], localMac[4], localMac[5]);
+   req->calledId = calledId;
+   req->calledId_len = strlen(calledId);
+  }
+
+  /* Calling-Station-Id */
+  bzero(callingId, AUTHMGR_MAC_ADDR_STR_LEN+1);
+  osapiSnprintf(( char8 *)callingId, sizeof(callingId), "%02X-%02X-%02X-%02X-%02X-%02X",
+      logicalPortInfo->client.suppMacAddr.addr[0],
+      logicalPortInfo->client.suppMacAddr.addr[1],
+      logicalPortInfo->client.suppMacAddr.addr[2],
+      logicalPortInfo->client.suppMacAddr.addr[3],
+      logicalPortInfo->client.suppMacAddr.addr[4],
+      logicalPortInfo->client.suppMacAddr.addr[5]);
+
+  req->callingId = callingId;
+  req->callingId_len = strlen(callingId);
+
+  /* nas-port */
+  req->nas_port = ifIndex;
+
+
+/* nas-port-id */
+  bzero(nasPortId, ( NIM_IF_ALIAS_SIZE + 1));
+  nimGetIntfName(physPort,  ALIASNAME, nasPortId);
+  req->nas_portid = nasPortId;
+
+  if ((AF_INET == mabBlock->nas_ip.af) || ((AF_INET6 == mabBlock->nas_ip.af)))
+  {
+    req->nas_ip.family = mabBlock->nas_ip.af;
+    
+    if (AF_INET == mabBlock->nas_ip.af)
+    {
+      req->nas_ip.addr.ipv4.s_addr = mabBlock->nas_ip.u.v4.s_addr;
+    }
+    else
+    {
+      memcpy(&req->nas_ip.addr.ipv6.in6, &mabBlock->nas_ip.u.v6, 16);
+    }
+  }
+
+  if (strlen(mabBlock->nas_id))
+  {
+    memcpy(req->nas_id, mabBlock->nas_id, min(sizeof(req->nas_id), sizeof(mabBlock->nas_id)));
+  }
+
+req->attrInfo = &logicalPortInfo->client.attrInfo;
+
+memcpy (req->supp_mac, logicalPortInfo->client.suppMacAddr.addr, sizeof(logicalPortInfo->client.suppMacAddr));
+
+req->cxt = mabBlock->rad_cxt;
+req->correlator = lIntIfNum;
+
+ rc =  SUCCESS;
+ if (0 != radiusAccessRequestSend(req))
+ {
+  MAB_EVENT_TRACE(
+      "%s: radiusAccessRequestSend - failed \n",
+      __FUNCTION__);
+  rc =  FAILURE;
+ }
+
+
+  if ( SUCCESS != rc) 
+  {
+     LOGF( LOG_SEVERITY_NOTICE,
+        "Failed to send access-req to RADIUS Server.");
+     free(req);
+    return rc;
+  }
+
+      memset(&cmd_req, 0, sizeof(cmd_req));
+
+      strncpy(cmd_req.cmd, "access-req", strlen("access-req")+1);
+      cmd_req.data = mabBlock->rad_cxt;
+      cmd_req.cmd_data.access_req.req_attr = (void *)req;
+      cmd_req.cmd_data.access_req.msg = req->msg_req;
+      radius_mab_cmd_req_send(mabBlock->send_fd,(char *)&cmd_req, sizeof(cmd_req)); 
+  return rc;
+}
+
+
+/**************************************************************************
+ * @purpose   After client disconnected send clear RADIUS messages Request
+ *            to RADIUS client
+ *
+ * @param     suppMacAddr  @b{(input)} Supplicant MAC address
+ *
+ * @comments
+ *
+ * @end
+ *************************************************************************/
+void mabRadiusClearRadiusMsgsSend( enetMacAddr_t suppMacAddr)
+{
+  mab_radius_cmd_msg_t cmd_req;
+
+  memset(&cmd_req, 0, sizeof(cmd_req));
+
+  strncpy(cmd_req.cmd, "clear-radius-msgs", strlen("clear-radius-msgs")+1);
+  cmd_req.data = mabBlock->rad_cxt;
+  memcpy(&cmd_req.cmd_data.mab_cli_mac_addr, &suppMacAddr.addr,  ENET_MAC_ADDR_LEN);
+  radius_mab_cmd_req_send(mabBlock->send_fd,(char *)&cmd_req, sizeof(cmd_req));
+}
+
+
+/**************************************************************************
+ * @purpose   Process EAP Response and Response/Identity frames
+ *
+ * @param     lIntIfNum   @b{(input)} Logical internal interface number
+ * @param     bufHandle  @b{(input)} the handle to the mab PDU
+ *
+ * @returns    SUCCESS
+ * @returns    FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *************************************************************************/
+RC_t mabRadiusSuppResponseProcess(uint32 lIntIfNum,  netBufHandle bufHandle)
+{
+   uchar8 *data;
+   enetHeader_t *enetHdr;
+   eapolPacket_t *eapolPkt;
+   authmgrEapPacket_t *eapPkt;
+   eapRrPacket_t *eapRrPkt =  NULLPTR;
+  mabLogicalPortInfo_t *logicalPortInfo;
+  uint32 physPort = 0, lPort = 0, type = 0; /*, monitorMode */
+
+  logicalPortInfo = mabLogicalPortInfoGet(lIntIfNum);
+  if ((logicalPortInfo ==  NULLPTR) ||
+      ( NULL == bufHandle))
+  {
+    return  FAILURE;
+  }
+  MAB_LPORT_KEY_UNPACK(physPort, lPort, type, lIntIfNum);
+
+  MAB_EVENT_TRACE("%s: called for port -%d\n",
+      __FUNCTION__,lIntIfNum);
+
+  if(bufHandle !=  NULL)
+  {
+    SYSAPI_NET_MBUF_GET_DATASTART(bufHandle, data);
+    enetHdr = ( enetHeader_t *)data;
+    eapolPkt = ( eapolPacket_t *)(( uchar8 *)enetHdr +  ENET_HDR_SIZE +  ENET_ENCAPS_HDR_SIZE);
+    eapPkt = ( authmgrEapPacket_t *)(( uchar8 *)eapolPkt + sizeof( eapolPacket_t));
+    eapRrPkt = ( eapRrPacket_t *)(( uchar8 *)eapPkt + sizeof( authmgrEapPacket_t));
+  }
+
+  /* If this is a an EAP/Response-Identity, we need to see if the user has access to this port. */
+  if ((eapRrPkt !=  NULLPTR)&&(eapRrPkt->type == EAP_RRIDENTITY))
+  {
+    /* User name was stored in port info structure when EAP-Response/Identity frame was received.
+     * See if this user name matches a locally configured user.  If the user is locally configured
+     * but does not have access to this port, generate an error.
+     */
+#if 0
+    if (userMgrLoginIndexGet(( char8 *)logicalPortInfo->client.mabUserName,
+          &logicalPortInfo->client.mabUserIndex) ==  SUCCESS)
+    {
+      /* Make sure user has access to this port */
+      if ( (userMgrPortUserAccessGet(physPort, logicalPortInfo->client.mabUserName, &portAllow) ==  SUCCESS) &&
+          (portAllow ==  FALSE) )
+      {
+        logicalPortInfo->protocol.authFail =  TRUE;
+        return mabUnAuthenticatedAction(logicalPortInfo);
+      }
+    }
+#endif
+  }
+
+  /* Send the Supplicant response to the server */
+  return mabSendRespToServer(lIntIfNum, bufHandle);
+}
+
+/*********************************************************************
+ *
+ * @purpose Convert the given vlan string based on the id or name
+ *
+ * @param    vlanId    @b{(output)} Vlan Id assigned.
+ * @param    vlanName  @b{(input)} Vlan string.
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *
+ *********************************************************************/
+RC_t mabRadiusServerVlanConversionHandle(const  char8 *vlanName, uint32 *vlanId)
+{
+
+  /*Check that any vlan has same name with given string*/
+  if(/*dot1qVlanIdFromNameGet(vlanName, vlanId) == */ SUCCESS)
+  {
+    return  SUCCESS;
+  } /*check that given string is pure numeric string */
+  else if (/*usmDbStringNumericCheck(vlanName) == */ SUCCESS)
+  {
+    *vlanId = atoi(vlanName);
+    return  SUCCESS;
+  } 
+  else
+  { 
+    /*Then given string is invalid string */
+    *vlanId = 0;
+    return  FAILURE;
+  }
+}
+
+RC_t mabAccessLevelAttrValidate(mabLogicalPortInfo_t *logicalPortInfo)
+{
+  MAB_IF_NULLPTR_RETURN_LOG(logicalPortInfo);
+
+  /* if the service type from radius server is not 
+   **supported by DUT consider the response
+   ** as Access-Reject */
+  if ((RADIUS_SERVICE_TYPE_ADMIN != logicalPortInfo->client.attrInfo.accessLevel) &&
+      (RADIUS_SERVICE_TYPE_LOGIN != logicalPortInfo->client.attrInfo.accessLevel) &&
+      (RADIUS_SERVICE_TYPE_CALL_CHECK != logicalPortInfo->client.attrInfo.accessLevel))
+  {
+     LOGF( LOG_SEVERITY_WARNING,
+        "Unable to authenticate as an unsupported service-type value (%d) "
+        "received in the radius server access-accept message.Sending EAP "
+        "failure to the client %02X:%02X:%02X:%02X:%02X:%02X.Supported "
+        "values are 'Login' and 'Admin'.Recommend changing the radius "
+        "server settings with supported service-type.",
+        logicalPortInfo->client.attrInfo.accessLevel, ( uchar8)logicalPortInfo->client.suppMacAddr.addr[0],
+        ( uchar8)logicalPortInfo->client.suppMacAddr.addr[1],
+        ( uchar8)logicalPortInfo->client.suppMacAddr.addr[2],
+        ( uchar8)logicalPortInfo->client.suppMacAddr.addr[3],
+        ( uchar8)logicalPortInfo->client.suppMacAddr.addr[4],
+        ( uchar8)logicalPortInfo->client.suppMacAddr.addr[5]); 
+    return  FAILURE;
+  }
+  return  SUCCESS;
+}
+
+RC_t mabVlanAttrValidate(mabLogicalPortInfo_t *logicalPortInfo)
+{
+  uint32 vlanId = 0;
+
+  MAB_IF_NULLPTR_RETURN_LOG(logicalPortInfo);
+
+  /* process the string received and validate the 
+     result for presense of VLAN */
+  if ( SUCCESS != mabRadiusServerVlanConversionHandle
+      (logicalPortInfo->client.attrInfo.vlanString, &vlanId))
+  {
+    return  FAILURE;
+  }
+
+  logicalPortInfo->client.attrInfo.vlanId = vlanId;
+
+  return  SUCCESS;
+}
+
+RC_t mabRadiusAcceptPostProcess(mabLogicalPortInfo_t *logicalPortInfo)
+{
+  uint32 physPort = 0;
+   mabPortCfg_t *pCfg =  NULLPTR;
+
+  MAB_IF_NULLPTR_RETURN_LOG(logicalPortInfo);
+
+  MAB_PORT_GET(physPort, logicalPortInfo->key.keyNum);
+
+  /* check access level attribute */
+  if ((AUTHMGR_RADIUS_ATTR_TYPE_SERVICE_TYPE & logicalPortInfo->client.attrInfo.attrFlags) &&
+     ( SUCCESS != mabAccessLevelAttrValidate(logicalPortInfo)))
+  {
+    logicalPortInfo->protocol.authFail =  TRUE;
+    mabUnAuthenticatedAction(logicalPortInfo);
+    return  FAILURE;
+  }
+
+   /* check if EAP message is receied.
+      If the client is mab aware the eap attribute 
+      need to be present in the accept message */
+
+  if (!(AUTHMGR_RADIUS_ATTR_TYPE_EAP_MESSAGE & logicalPortInfo->client.attrInfo.attrFlags))
+  {
+    if (( TRUE != mabIntfIsConfigurable(physPort, &pCfg)) ||
+        ( NULLPTR == pCfg))
+    {
+      return  FAILURE;
+    }
+
+    /* check if the method is MD5 */
+    if ( AUTHMGR_PORT_MAB_AUTH_TYPE_EAP_MD5 == pCfg->mabAuthType)
+    {
+      logicalPortInfo->protocol.authFail =  TRUE;
+      mabUnAuthenticatedAction(logicalPortInfo);
+      return  FAILURE;
+    }
+  }
+
+  return  SUCCESS;
+}
+/**************************************************************************
+ * @purpose   Process RADIUS Accept from server
+ *
+ * @param     lIntIfNum       @b{(input)} Logical internal interface number of port being authenticated
+ * @param     *radiusPayload  @b{(input)} payload of RADIUS frame (attributes)
+ * @param     payloadLen      @b{(input)} length of RADIUS payload
+ *
+ * @returns    SUCCESS
+ * @returns    FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *************************************************************************/
+RC_t mabRadiusAcceptProcess(uint32 lIntIfNum, void *resp)
+{
+  uint32 rc =  SUCCESS;
+  mabPortCfg_t *pCfg;
+  uint32 physPort = 0, lPort = 0, type = 0;
+   uchar8 ifName[ NIM_IF_ALIAS_SIZE + 1];
+  mabLogicalPortInfo_t *logicalPortInfo =  NULLPTR;
+
+  logicalPortInfo = mabLogicalPortInfoGet(lIntIfNum);
+  MAB_IF_NULLPTR_RETURN_LOG (logicalPortInfo);
+
+  MAB_LPORT_KEY_UNPACK(physPort, lPort, type, lIntIfNum);
+
+  if (mabIntfIsConfigurable(physPort, &pCfg) !=  TRUE)
+    return  FAILURE;
+
+  nimGetIntfName(physPort,  ALIASNAME, ifName);
+  MAB_EVENT_TRACE(
+      "%s:Received Radius Accept message for port - %s\n",
+      __FUNCTION__,ifName);
+
+  /* response from radius server received.
+     stop the serverwhile timer */
+  mabTimerDestroy(mabBlock->mabTimerCB, logicalPortInfo);
+  
+  if ( NULLPTR != resp)
+  {
+    if (0 != radiusClientAcceptProcess(resp, &logicalPortInfo->client.attrInfo))
+    {
+      printf("radiusClientAcceptProcess failed \n");
+      rc =  FAILURE;
+    }
+
+    if ( SUCCESS != rc)
+    {
+       LOGF( LOG_SEVERITY_INFO, 
+              "Could not parse RADIUS attributes.");
+      return  FAILURE;
+    }
+  } /* radiusPayload check  ends here */
+
+  rc = mabRadiusAcceptPostProcess(logicalPortInfo);
+  if ( SUCCESS == rc)
+  {
+    logicalPortInfo->client.authMethod =  AUTH_METHOD_RADIUS;
+    mabAuthenticatedAction(logicalPortInfo);
+  }
+
+  return rc;
+}
+
+
+/**************************************************************************
+* @purpose   Send Response frame to Server
+*
+* @param     lIntIfNum   @b{(input)} Logical internal interface number
+* @param     bufHandle  @b{(input)} the handle to the mab PDU
+*
+* @returns    SUCCESS
+* @returns    FAILURE
+*
+* @comments
+*
+* @end
+*************************************************************************/
+RC_t mabSendRespToServer(uint32 lIntIfNum,  netBufHandle bufHandle)
+{
+   uchar8 *data;
+   authmgrEapPacket_t *eapPkt =  NULLPTR;
+  mabLogicalPortInfo_t *logicalPortInfo;
+
+  if ( NULL == bufHandle)
+  {
+    return  FAILURE;
+  }
+
+  MAB_EVENT_TRACE(
+                    "%s: called for port -%d\n",__FUNCTION__,lIntIfNum);
+
+  if (bufHandle !=  NULL)
+  {
+    SYSAPI_NET_MBUF_GET_DATASTART(bufHandle, data);
+
+    eapPkt = ( authmgrEapPacket_t *)(data +  ENET_HDR_SIZE +  ENET_ENCAPS_HDR_SIZE + sizeof( eapolPacket_t));
+  }
+
+
+  if (mabRadiusAccessRequestSend(lIntIfNum, ( uchar8 *)eapPkt) !=  SUCCESS)
+  {
+     LOGF( LOG_SEVERITY_NOTICE,
+        "mabSendRespToServer: mabRadiusAccessRequestSend failed\n"
+        " Failed sending message to RADIUS server");
+    MAB_EVENT_TRACE(
+        "%s: mabRadiusAccessRequestSend failed for port -%d\n",__FUNCTION__,lIntIfNum);
+
+    logicalPortInfo = mabLogicalPortInfoGet(lIntIfNum);
+    if (logicalPortInfo !=  NULLPTR)
+    {
+      logicalPortInfo->protocol.authFail =  TRUE;
+      mabUnAuthenticatedAction(logicalPortInfo);
+    }
+  }
+
+  return  SUCCESS;
+}
+
+/**************************************************************************
+ * @purpose   Take MAB Radius server lock
+ *
+ * @param     none
+ *
+ * @returns    SUCCESS
+ * @returns    FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *************************************************************************/
+RC_t mabRadiusServerTaskLockTake(void)
+{
+  return osapiSemaTake(mabBlock->mabRadiusSrvrTaskSyncSema,  WAIT_FOREVER);
+}
+
+/**************************************************************************
+ * @purpose   Give MAB Radius server lock
+ *
+ * @param     none
+ *
+ * @returns    SUCCESS
+ * @returns    FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *************************************************************************/
+RC_t mabRadiusServerTaskLockGive(void)
+{
+  return osapiSemaGive(mabBlock->mabRadiusSrvrTaskSyncSema);
+}
diff --git a/src/sonic-pac/mab/protocol/mab_timer.c b/src/sonic-pac/mab/protocol/mab_timer.c
new file mode 100755
index 000000000..bf7d14cf7
--- /dev/null
+++ b/src/sonic-pac/mab/protocol/mab_timer.c
@@ -0,0 +1,272 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "mab_include.h"
+#include "mab_db.h"
+#include "mab_debug.h"
+#include "mab_struct.h"
+
+extern mabBlock_t *mabBlock;
+
+/*************************************************************************
+ * @purpose  function to process on expiry of server awhile timer 
+ *
+ * @param    timer  @b{(input)}  Pointer to appTimer node
+ * @param    logicalPortInfo @b{(input)}  Pointer to logicalPort Info 
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments none
+ *
+ * @end
+ *************************************************************************/
+RC_t  mabServerAwhileExpiryAction(mabLogicalPortInfo_t *logicalPortInfo)
+{
+
+  MAB_IF_NULLPTR_RETURN_LOG(logicalPortInfo);
+
+  /* Supp AWhile Timer has expired. */
+  logicalPortInfo->protocol.authFail =  TRUE;
+  mabUnAuthenticatedAction(logicalPortInfo);
+  return  SUCCESS;
+}
+
+/*************************************************************************
+ * @purpose  function to get function map entry for the given timer type 
+ *
+ * @param    type  @b{(input)} timer type 
+ * @param    elem @b{(input)}  Pointer to map entry 
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments none
+ *
+ * @end
+ *************************************************************************/
+RC_t mabTimerHandlerInfoGet(mabTimerType_t type, mabTimerMap_t *elem)
+{
+  uint32 i = 0;
+  static mabTimerMap_t mabTimerHandlerTable[] =
+  { 
+    {MAB_SERVER_AWHILE, mabServerAwhileExpiryAction},
+  };
+
+
+  for (i = 0; i < (sizeof (mabTimerHandlerTable)/sizeof(mabTimerMap_t)); i++)
+  {
+    if (type == mabTimerHandlerTable[i].type)
+    {
+      *elem = mabTimerHandlerTable[i];
+      return  SUCCESS;
+    }
+  }
+
+  return  FAILURE;
+}
+
+
+/*********************************************************************
+ * @purpose   This function is used to send timer events
+ *
+ * @param     timerCtrlBlk    @b{(input)}   Timer Control Block
+ * @param     ptrData         @b{(input)}   Ptr to passed data
+ *
+ * @returns   None
+ *
+ * @notes     None
+ * @end
+ *********************************************************************/
+void mabTimerExpiryHdlr( APP_TMR_CTRL_BLK_t timerCtrlBlk, void* ptrData)
+{
+  mabIssueCmd(mabTimeTick,  NULL,  NULLPTR);
+}
+
+/*************************************************************************
+  * @purpose  Process the mab timer expiry event
+  *
+  * @param    param    @b{(input)}  Pointer to added mab node identifier 
+  *
+  * @returns  void
+  *
+  * @comments none
+  *
+  * @end
+  *************************************************************************/
+void mabTimerExpiryAction(void *param)
+{
+  mabTimerContext_t *pNode;
+  mabTimerMap_t entry;
+  mabLogicalPortInfo_t *logicalPortInfo =  NULLPTR;
+
+  pNode = (mabTimerContext_t *)param;
+  if (pNode ==  NULLPTR)
+  {
+     LOGF( LOG_SEVERITY_INFO,
+        "mabTimerExpiryAction: Failed to retrieve handle \n");
+    return;
+  }
+
+  logicalPortInfo = mabLogicalPortInfoGet(pNode->keyNum);
+
+  if ( NULLPTR == logicalPortInfo)
+  {
+    return;
+  }
+
+  MAB_EVENT_TRACE(
+      "MAB timer %s expired on logical port %d \r\n",
+      mabTimerTypeStringGet(pNode->type), logicalPortInfo->key.keyNum);
+
+  /* Delete the apptimer node */
+  (void)appTimerDelete(mabBlock->mabTimerCB, logicalPortInfo->mabTimer.handle.timer);
+  /* Null out the timer Details */
+  logicalPortInfo->mabTimer.handle.timer =  NULL;
+
+  /* pass the event accoring to the timer type */
+
+  memset(&entry, 0, sizeof(mabTimerMap_t));
+  if ( SUCCESS != mabTimerHandlerInfoGet(pNode->type, &entry))
+  {
+     LOGF( LOG_SEVERITY_WARNING,
+        "mabTimerExpiryAction: Failed to retrieve information"
+        "for timer type %s", mabTimerTypeStringGet(pNode->type));
+    return;
+  }
+
+  if ( NULLPTR != entry.expiryFn)
+  {
+    entry.expiryFn(logicalPortInfo);
+  }
+
+  return;
+}
+
+/*************************************************************************
+ * @purpose  Starts the specified timer
+ *
+ * @param    intIfNum      @b{(input)}  Interface for starting the timer
+ * @param    timerType     @b{(input)}  Interface/Timer type
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments none
+ *
+ * @end
+ *************************************************************************/
+RC_t mabTimerStart(mabLogicalPortInfo_t *logicalPortInfo, mabTimerType_t timerType)
+{
+  uint32 physPort = 0, lPort = 0, type = 0, val = 0;
+  mabTimerMap_t entry;
+
+  memset(&entry, 0, sizeof(mabTimerMap_t));
+
+  MAB_IF_NULLPTR_RETURN_LOG(logicalPortInfo);
+  MAB_LPORT_KEY_UNPACK(physPort, lPort, type, logicalPortInfo->key.keyNum);
+
+  if (logicalPortInfo->mabTimer.handle.timer !=  NULLPTR)
+  {
+    MAB_EVENT_TRACE( 
+                      "timer %s already running for logical port %d \r\n",
+                      mabTimerTypeStringGet (logicalPortInfo->mabTimer.cxt.type),
+                      logicalPortInfo->key.keyNum);
+
+    MAB_EVENT_TRACE( 
+                      "not starting timer %s for logical port %d \r\n",
+                      mabTimerTypeStringGet (timerType),
+                      logicalPortInfo->key.keyNum);
+    return  SUCCESS;
+  }
+
+  if ( SUCCESS != mabTimerHandlerInfoGet(timerType, &entry))
+  {
+     LOGF( LOG_SEVERITY_WARNING,
+        "mabTimerExpiryAction: Failed to retrieve information"
+        "for timer type %s", mabTimerTypeStringGet(timerType));
+    return  FAILURE;
+  }
+
+  MAB_EVENT_TRACE( "mab Timer start:"
+      "starting timer %s for logical port %d \r\n",
+      mabTimerTypeStringGet(timerType), 
+      logicalPortInfo->key.keyNum);
+
+  /* Timer value should be multipled by 2 to match the retries in hostapd. */
+  val = (2 * FD_MAB_PORT_SERVER_TIMEOUT);
+
+  /* fill the timer context */
+  logicalPortInfo->mabTimer.cxt.type = timerType;
+  logicalPortInfo->mabTimer.cxt.keyNum = logicalPortInfo->key.keyNum;
+
+ /* Start the timer */
+  logicalPortInfo->mabTimer.handle.timer = appTimerAdd(mabBlock->mabTimerCB, mabTimerExpiryAction,
+      (void *)&logicalPortInfo->mabTimer.cxt, val, mabTimerTypeStringGet(timerType));
+
+  if(logicalPortInfo->mabTimer.handle.timer ==  NULLPTR)
+  {
+     LOGF( LOG_SEVERITY_WARNING,
+        "mabTimerStart: Could not Start the %s timer."
+        "intIf %d, clientType %s, logical IntIfNum %d.",
+         mabTimerTypeStringGet(timerType), physPort, 
+         mabNodeTypeStringGet(type), lPort);
+    return  FAILURE;
+  }
+
+  return  SUCCESS;
+}
+
+/*************************************************************************
+ * @purpose  Helper API to delete the specifed timer node
+ *
+ * @param    timer  @b{(input)}  Pointer to appTimer node
+ * @param    logicalPortInfo @b{(input)}  Pointer to logicalPort Info 
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments none
+ *
+ * @end
+ *************************************************************************/
+RC_t  mabTimerDestroy( APP_TMR_CTRL_BLK_t timerCB,
+    mabLogicalPortInfo_t *logicalPortInfo)
+{
+  uint32 physPort = 0, lPort = 0, type = 0;
+
+  MAB_IF_NULLPTR_RETURN_LOG(logicalPortInfo);
+
+  MAB_LPORT_KEY_UNPACK(physPort, lPort, type, logicalPortInfo->key.keyNum);
+
+  /* Delete the apptimer node */
+  if ( NULL != logicalPortInfo->mabTimer.handle.timer)
+  {
+    (void)appTimerDelete(timerCB, logicalPortInfo->mabTimer.handle.timer);
+    logicalPortInfo->mabTimer.handle.timer =  NULL;
+
+    MAB_EVENT_TRACE( "deleted the timer type %s"
+        "port %d type %s lport %d \r\n",
+        mabTimerTypeStringGet(logicalPortInfo->mabTimer.cxt.type), 
+        physPort, mabNodeTypeStringGet(type), lPort);
+  }
+
+
+  /* clear the context */
+  memset(&logicalPortInfo->mabTimer, 0, sizeof(mabTimer_t));
+  return  SUCCESS;
+}
+
diff --git a/src/sonic-pac/mab/protocol/mab_utils.c b/src/sonic-pac/mab/protocol/mab_utils.c
new file mode 100755
index 000000000..6000a4843
--- /dev/null
+++ b/src/sonic-pac/mab/protocol/mab_utils.c
@@ -0,0 +1,65 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include <ctype.h>
+#include "mab_include.h"
+#include "mab_db.h"
+#include "mab_client.h"
+#include "mab_timer.h"
+#include "mab_control.h"
+#include "mab_struct.h"
+
+extern mabBlock_t *mabBlock;
+/*********************************************************************
+ * @purpose function to check policy validation based on host mode 
+ *
+ * @param    hostMode   @b{(input))  hostmode 
+ * @param    *appyPolicy  @b{(input)) bool value 
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t mabHostIsDynamicNodeAllocCheck( AUTHMGR_HOST_CONTROL_t hostMode,  BOOL *valid)
+{
+	*valid =  TRUE;
+	return  SUCCESS;
+}
+
+
+RC_t mabNimIntfStateCheck(uint32 intIfNum)
+{
+   INTF_STATES_t  state;
+  mabPortCfg_t   *pCfg;
+
+  if(mabIntfIsConfigurable(intIfNum, &pCfg) !=  TRUE)
+  {
+    return  FAILURE;
+  }
+
+  state = nimGetIntfState(intIfNum);
+  if ((state !=  INTF_ATTACHED)
+      && (state !=  INTF_ATTACHING)
+      && (state !=  INTF_DETACHING))
+  {
+    return  FAILURE;
+  }
+
+  return  SUCCESS;
+}
diff --git a/src/sonic-pac/mab/protocol/mab_vlan.c b/src/sonic-pac/mab/protocol/mab_vlan.c
new file mode 100755
index 000000000..191070a98
--- /dev/null
+++ b/src/sonic-pac/mab/protocol/mab_vlan.c
@@ -0,0 +1,260 @@
+/*
+ * Copyright 2024 Broadcom Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "mab_include.h"
+#include "auth_mgr_exports.h"
+#include "mab_include.h"
+#include "mab_client.h"
+#include "mab_struct.h"
+
+extern mabBlock_t *mabBlock;
+
+
+/*********************************************************************
+ * @purpose  Processes  Vlan PVID Change Notify event.
+ *
+ * @param    intIfNum   @b{(input)} internal interface number
+ * @param    vlanId     @b{(input)} VlanId (new PVID on the port)
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments
+ *
+ * @end
+*********************************************************************/
+RC_t mabVlanPVIDChangeEventProcess(uint32 physPort,uint32 vlanId)
+{
+  RC_t rc =  FAILURE;
+  mabLogicalPortInfo_t *logicalPortInfo;
+  uint32 i = 0;
+   BOOL valid =  FALSE;
+
+  MAB_EVENT_TRACE(
+      "%s:PVID for port -%d changed to Vlan %d\n",
+      __FUNCTION__,physPort,vlanId);
+
+  if (mabBlock->mabPortInfo[physPort].portControlMode ==  AUTHMGR_PORT_AUTO)
+  {
+    /* Nothing to be done as port pvid change is also triggered by a client being authorized
+       on the port in other host modes, where mab can aquire the port. 
+       The Admin cannot change the operational pvid of the port
+       as it is acquired by mab. */
+
+    /* check if the host policy is valid for the current host mode */
+    if (( SUCCESS == mabHostIsDynamicNodeAllocCheck(mabBlock->mabPortInfo[physPort].hostMode, &valid)) &&
+        ( TRUE == valid))
+    {
+      i = MAB_LOGICAL_PORT_ITERATE;
+      while ((NULLPTR != (logicalPortInfo=mabLogicalPortInfoGetNextNode(physPort,&i)) &&
+            (0 != logicalPortInfo->key.keyNum)))
+      {
+        if ((vlanId == logicalPortInfo->client.vlanId) &&
+            ( AUTHMGR_PORT_STATUS_AUTHORIZED == logicalPortInfo->client.logicalPortStatus))
+        {
+          MAB_EVENT_TRACE(
+              "pvid %d is changed. logicalPort %d is authenticated on same vlan. vlan type %s"
+              "Cleaning up the client \n",
+              vlanId, i, mabVlanTypeStringGet(logicalPortInfo->client.vlanType));
+
+
+          /* invoke the cleanup */
+          rc = mabClientInfoCleanup(logicalPortInfo);
+
+          if ( SUCCESS != rc)
+          {
+            MAB_EVENT_TRACE(
+                "client cleanup for logicalPort %d is NOT successful\n",i);
+          }
+        }
+      }
+    }
+  }
+  return rc;
+}
+
+/*********************************************************************
+ * @purpose  check if the port participation can be removed for a vlan
+ *
+ * @param    physPort    @b{(input))  Port
+ * @param    vlanId      @b{(input)) vlan Id
+ *
+ * @returns   SUCCESS/ FAILRE
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t mabVlanPortDeletionValidate(uint32 physPort, uint32 vlanId)
+{
+  uint32 i = 0;
+  mabLogicalPortInfo_t *logicalPortInfo =  NULLPTR;
+
+  if (AUTHMGR_PORT_AUTO == mabBlock->mabPortInfo[physPort].portControlMode)
+  {
+      i = MAB_LOGICAL_PORT_ITERATE;
+      while ((NULLPTR != (logicalPortInfo=mabLogicalPortInfoGetNextNode(physPort,&i)) &&
+            (0 != logicalPortInfo->key.keyNum)))
+      {
+        if (vlanId == logicalPortInfo->client.vlanId)
+        {
+           MAB_EVENT_TRACE(
+            "logicalPort %d is still a member of vlanId %d. \n",
+             i, logicalPortInfo->client.vlanId);
+
+          return  FAILURE;
+        }
+      }
+  }
+  return  SUCCESS;
+}
+
+/*********************************************************************
+ * @purpose  check if the port can be aquired by mab 
+ *
+ * @param    physPort    @b{(input))  Port
+ * @param    vlanId      @b{(input)) vlan Id
+ *
+ * @returns   SUCCESS/ FAILRE
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t mabVlanPortAcquireCheck(uint32 physPort)
+{
+   BOOL valid =  FALSE;
+
+  if ( AUTHMGR_PORT_AUTO == mabBlock->mabPortInfo[physPort].portControlMode)
+  {
+    /* check if the host policy is valid for the current host mode */
+    if (( SUCCESS == mabHostIsDynamicNodeAllocCheck(mabBlock->mabPortInfo[physPort].hostMode, &valid)) &&
+        ( FALSE == valid))
+    {
+      return  SUCCESS;
+    }
+  }
+  return  FAILURE;
+}
+
+/*********************************************************************
+ * @purpose  Apply mab vlan assignment to a specific logical interface
+ *
+ * @param    intIfNum   @b{(input)) internal interface number
+ * @param    vlanId     @b{(input)) vlan id
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments This call should happen only in mac-based mode.
+ *
+ * @end
+ *********************************************************************/
+RC_t mabVlanPortAddProcess(uint32 intIfNum,uint32 vlanId)
+{
+  return  SUCCESS;
+}
+
+/*********************************************************************
+ * @purpose  remove mab vlan assignment to a specific logical interface
+ *
+ * @param    intIfNum   @b{(input)) internal interface number
+ * @param    vlanId     @b{(input)) vlan id
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments This call should happen only in mac-based mode.
+ *
+ * @end
+ *********************************************************************/
+RC_t mabVlanDeleteProcess(uint32 vlanId)
+{
+  RC_t nimRc =  SUCCESS;
+  uint32 intIfNum;
+
+  nimRc = mabFirstValidIntfNumber(&intIfNum);
+  while (nimRc ==  SUCCESS)
+  {
+    /* delete the clients on this port for the vlan */
+    mabVlanPortDeleteProcess(intIfNum, vlanId);
+
+    nimRc = mabNextValidIntf(intIfNum, &intIfNum);
+  }
+
+  return  SUCCESS;
+}
+
+
+/*********************************************
+ * @purpose  Enable  mab vlan to a specified interface
+ *
+ * @param    intIfNum   @b{(input)) internal interface number
+ * @param    guestVlanId @b{(input)} guest vlan id
+ *
+ * @returns   SUCCESS
+ * @returns   FAILURE
+ *
+ * @comments
+ *
+ * @end
+ *********************************************************************/
+RC_t mabVlanPortDeleteProcess(uint32 intIfNum,uint32 vlanId)
+{
+  RC_t rc =  SUCCESS;
+  mabLogicalPortInfo_t *logicalPortInfo =  NULLPTR;
+  uint32 lIntIfNum;
+  mabPortCfg_t *pCfg;
+
+  if (mabIntfIsConfigurable(intIfNum, &pCfg) !=  TRUE)
+     return  FAILURE;
+
+
+  if ( AUTHMGR_PORT_AUTO != mabBlock->mabPortInfo[intIfNum].portControlMode)
+    return  SUCCESS;
+
+
+  if(mabBlock->mabPortInfo[intIfNum].portControlMode ==  AUTHMGR_PORT_AUTO)
+  {
+    lIntIfNum = MAB_LOGICAL_PORT_ITERATE;
+    while((logicalPortInfo=mabLogicalPortInfoGetNextNode(intIfNum,&lIntIfNum))!=  NULLPTR)
+    {
+      if ( AUTHMGR_PORT_STATUS_AUTHORIZED == logicalPortInfo->client.logicalPortStatus)
+      {
+        /* clean up the client */
+        if (vlanId == logicalPortInfo->client.vlanId)
+        {
+          MAB_EVENT_TRACE(
+              "port %d is deleted from vlan %d. logicalPort %d is authenticated on same vlan. vlan type %s"
+              "Cleaning up the client \n",
+              intIfNum, vlanId, lIntIfNum, mabVlanTypeStringGet(logicalPortInfo->client.vlanType));
+
+          /* invoke the cleanup */
+          rc = mabClientSwInfoCleanup(logicalPortInfo);
+
+          if ( SUCCESS != rc)
+          {
+            MAB_EVENT_TRACE(
+                "client cleanup for logicalPort %d is NOT successful\n",lIntIfNum);
+          }
+        }
+      }
+    }
+  }
+  return  SUCCESS;
+}
+
+

From f2f9a76c53e377a209e82f40ab2c9a5d685ea9d6 Mon Sep 17 00:00:00 2001
From: Saikrishna Arcot <sarcot@microsoft.com>
Date: Sun, 12 May 2024 02:27:59 -0700
Subject: [PATCH 0568/1115] [sflow]: Upgrade sflow container to be based on
 Bookworm (#18543)

Microsoft ADO (number only): 27475035

Signed-off-by: Saikrishna Arcot <sarcot@microsoft.com>
---
 dockers/docker-sflow/Dockerfile.j2            |  4 +-
 rules/docker-sflow.mk                         | 10 ++--
 rules/sflow.mk                                |  2 +-
 src/sflow/hsflowd/Makefile                    |  6 +-
 .../patch/0002-host_sflow_debian.patch        | 59 ++-----------------
 5 files changed, 17 insertions(+), 64 deletions(-)

diff --git a/dockers/docker-sflow/Dockerfile.j2 b/dockers/docker-sflow/Dockerfile.j2
index e8aee5fe6..a5eebf3a0 100644
--- a/dockers/docker-sflow/Dockerfile.j2
+++ b/dockers/docker-sflow/Dockerfile.j2
@@ -1,5 +1,5 @@
 {% from "dockers/dockerfile-macros.j2" import install_debian_packages, install_python_wheels, copy_files %}
-FROM docker-swss-layer-bullseye-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}}
+FROM docker-swss-layer-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}}
 
 ARG docker_container_name
 
@@ -9,7 +9,7 @@ ENV DEBIAN_FRONTEND=noninteractive
 RUN apt-get update      && \
     apt-get install -f -y  \
             dmidecode      \
-            libmnl0=1.0.4-3
+            libmnl0
 
 {% if docker_sflow_debs.strip() -%}
 # Copy locally-built Debian package dependencies
diff --git a/rules/docker-sflow.mk b/rules/docker-sflow.mk
index 3acd3c5dc..ece35f5cb 100644
--- a/rules/docker-sflow.mk
+++ b/rules/docker-sflow.mk
@@ -7,12 +7,12 @@ DOCKER_SFLOW_DBG = $(DOCKER_SFLOW_STEM)-$(DBG_IMAGE_MARK).gz
 $(DOCKER_SFLOW)_PATH = $(DOCKERS_PATH)/$(DOCKER_SFLOW_STEM)
 
 $(DOCKER_SFLOW)_DEPENDS += $(SWSS) $(HSFLOWD) $(SFLOWTOOL) $(PSAMPLE)
-$(DOCKER_SFLOW)_DBG_DEPENDS = $($(DOCKER_SWSS_LAYER_BULLSEYE)_DBG_DEPENDS)
+$(DOCKER_SFLOW)_DBG_DEPENDS = $($(DOCKER_SWSS_LAYER_BOOKWORM)_DBG_DEPENDS)
 $(DOCKER_SFLOW)_DBG_DEPENDS += $(HSFLOWD_DBG)
 $(DOCKER_TEAMD)_DBG_DEPENDS += $(SWSS_DBG) $(LIBSWSSCOMMON_DBG)
-$(DOCKER_SFLOW)_DBG_IMAGE_PACKAGES = $($(DOCKER_SWSS_LAYER_BULLSEYE)_DBG_IMAGE_PACKAGES)
+$(DOCKER_SFLOW)_DBG_IMAGE_PACKAGES = $($(DOCKER_SWSS_LAYER_BOOKWORM)_DBG_IMAGE_PACKAGES)
 
-$(DOCKER_SFLOW)_LOAD_DOCKERS += $(DOCKER_SWSS_LAYER_BULLSEYE)
+$(DOCKER_SFLOW)_LOAD_DOCKERS += $(DOCKER_SWSS_LAYER_BOOKWORM)
 
 $(DOCKER_SFLOW)_VERSION = 1.0.0
 $(DOCKER_SFLOW)_PACKAGE_NAME = sflow
@@ -39,5 +39,5 @@ $(DOCKER_SFLOW)_BASE_IMAGE_FILES += psample:/usr/bin/psample
 $(DOCKER_SFLOW)_BASE_IMAGE_FILES += sflowtool:/usr/bin/sflowtool
 $(DOCKER_SFLOW)_FILES += $(SUPERVISOR_PROC_EXIT_LISTENER_SCRIPT)
 
-SONIC_BULLSEYE_DOCKERS += $(DOCKER_SFLOW)
-SONIC_BULLSEYE_DBG_DOCKERS += $(DOCKER_SFLOW_DBG)
+SONIC_BOOKWORM_DOCKERS += $(DOCKER_SFLOW)
+SONIC_BOOKWORM_DBG_DOCKERS += $(DOCKER_SFLOW_DBG)
diff --git a/rules/sflow.mk b/rules/sflow.mk
index a7dc205ac..949b82289 100644
--- a/rules/sflow.mk
+++ b/rules/sflow.mk
@@ -11,7 +11,7 @@ $(HSFLOWD)_SRC_PATH = $(SRC_PATH)/sflow/hsflowd
 
 SONIC_MAKE_DEBS += $(HSFLOWD)
 
-HSFLOWD_DBG = hsflowd-dbg_$(HSFLOWD_VERSION)-$(HSFLOWD_SUBVERSION)_$(CONFIGURED_ARCH).deb
+HSFLOWD_DBG = hsflowd-dbgsym_$(HSFLOWD_VERSION)-$(HSFLOWD_SUBVERSION)_$(CONFIGURED_ARCH).deb
 $(HSFLOWD_DBG)_DEPENDS += $(HSFLOWD)
 $(HSFLOWD_DBG)_RDEPENDS += $(HSFLOWD)
 $(eval $(call add_derived_package,$(HSFLOWD),$(HSFLOWD_DBG)))
diff --git a/src/sflow/hsflowd/Makefile b/src/sflow/hsflowd/Makefile
index 5a9bf6047..23ed88012 100644
--- a/src/sflow/hsflowd/Makefile
+++ b/src/sflow/hsflowd/Makefile
@@ -22,12 +22,12 @@ $(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% :
 	sed -i -e s/_VERSION_/$(HSFLOWD_VERSION)-$(HSFLOWD_SUBVERSION)/g debian/changelog
 
 ifeq ($(CROSS_BUILD_ENVIRON), y)
-	dpkg-buildpackage -rfakeroot -b -us -uc -a$(CONFIGURED_ARCH) -Pcross,nocheck -j$(SONIC_CONFIG_MAKE_JOBS) --admindir $(SONIC_DPKG_ADMINDIR) --buildinfo-option=-u. --changes-option=-u.
+	dpkg-buildpackage -rfakeroot -b -us -uc -a$(CONFIGURED_ARCH) -Pcross,nocheck -j$(SONIC_CONFIG_MAKE_JOBS) --admindir $(SONIC_DPKG_ADMINDIR)
 else
-	dpkg-buildpackage -rfakeroot -b -us -uc -j$(SONIC_CONFIG_MAKE_JOBS) --admindir $(SONIC_DPKG_ADMINDIR) --buildinfo-option=-u. --changes-option=-u.
+	dpkg-buildpackage -rfakeroot -b -us -uc -j$(SONIC_CONFIG_MAKE_JOBS) --admindir $(SONIC_DPKG_ADMINDIR)
 endif
+	popd
 
 	mv $(DERIVED_TARGET) $* $(DEST)/
-	popd
 
 $(addprefix $(DEST)/, $(DERIVED_TARGET)): $(DEST)/% : $(DEST)/$(MAIN_TARGET)
diff --git a/src/sflow/hsflowd/patch/0002-host_sflow_debian.patch b/src/sflow/hsflowd/patch/0002-host_sflow_debian.patch
index f1977ccb0..518a75ff7 100644
--- a/src/sflow/hsflowd/patch/0002-host_sflow_debian.patch
+++ b/src/sflow/hsflowd/patch/0002-host_sflow_debian.patch
@@ -12,11 +12,11 @@ diff -ruN a/DEBIAN_build/compat b/DEBIAN_build/compat
 --- a/DEBIAN_build/compat	1969-12-31 19:00:00.000000000 -0500
 +++ b/DEBIAN_build/compat	2019-08-16 23:28:58.020938096 -0400
 @@ -0,0 +1 @@
-+9
++13
 diff -ruN a/DEBIAN_build/control b/DEBIAN_build/control
 --- a/DEBIAN_build/control	2019-08-16 05:11:33.974949327 -0400
 +++ b/DEBIAN_build/control	2019-08-19 21:28:07.155722725 -0400
-@@ -1,9 +1,22 @@
+@@ -1,9 +1,15 @@
 -Package: _PACKAGE_
 -Version: _VERSION_
 -Section: admin 
@@ -37,17 +37,10 @@ diff -ruN a/DEBIAN_build/control b/DEBIAN_build/control
 -Maintainer: Neil McKee [neil.mckee@inmon.com]
  Description: sFlow(R) monitoring agent
  Homepage: sflow.net
-+
-+Package: hsflowd-dbg
-+Architecture: any
-+Section: debug
-+Priority: extra
-+Depends: hsflowd
-+Description: debugging symbols for hsflowd
 diff -ruN a/DEBIAN_build/rules b/DEBIAN_build/rules
 --- a/DEBIAN_build/rules	1969-12-31 19:00:00.000000000 -0500
 +++ b/DEBIAN_build/rules	2019-08-19 22:20:42.998569601 -0400
-@@ -0,0 +1,31 @@
+@@ -0,0 +1,18 @@
 +#!/usr/bin/make -f
 +
 +# See debhelper(7) (uncomment to enable)
@@ -59,50 +52,10 @@ diff -ruN a/DEBIAN_build/rules b/DEBIAN_build/rules
 +include /usr/share/dpkg/default.mk
 +
 +%:
-+	dh $@
-+
-+binary:
-+	dh_gencontrol
-+	dh_strip -phsflowd --dbg-package=hsflowd-dbg
-+	dpkg-deb --build debian/hsflowd-dbg hsflowd-dbg_$(HSFLOWD_VERSION)-$(HSFLOWD_SUBVERSION)_$(CONFIGURED_ARCH).deb
-+	dpkg-deb --build debian/hsflowd hsflowd_$(HSFLOWD_VERSION)-$(HSFLOWD_SUBVERSION)_$(CONFIGURED_ARCH).deb
++	dh $@ --no-parallel
 +
 +override_dh_auto_build:
-+	make sonic-deb FEATURES="SONIC" CC=$(CC) CXX=$(CXX) LD=$(CC)
-+
-+override_dh_auto_configure:
++	dh_auto_build -- hsflowd MYARCH=$(shell uname -m | sed 's/x86_64/amd64/') FEATURES="SONIC"
 +
 +override_dh_auto_install:
-+
-+override_dh_auto_test:
-+
-+override_dh_auto_clean:
-+
-+override_dh_clean:
-diff -ruN a/Makefile b/Makefile
---- a/Makefile	2019-08-16 21:34:25.167679297 -0400
-+++ b/Makefile	2019-08-19 22:20:23.758479002 -0400
-@@ -146,6 +146,23 @@
- 	cd ..; \
- 	dpkg-deb --build debian hsflowd_$${MYVER}-$${MYREL}_$$MYARCH.deb
- 
-+sonic-deb: $(PROG)
-+	MYARCH=`uname -m|sed 's/x86_64/amd64/'`; \
-+	MYVER=`./getVersion`; \
-+	MYREL=`./getRelease`; \
-+	PLATFORM=`uname`; \
-+	mkdir -p debian/usr/sbin; \
-+	mkdir -p debian/etc/init.d; \
-+	mkdir -p debian/etc/hsflowd/modules; \
-+	mkdir -p debian/lib/systemd/system; \
-+	mkdir -p debian/etc/dbus-1/system.d; \
-+	cd src/$$PLATFORM; $(MAKE) VERSION=$$MYVER RELEASE=$$MYREL INSTROOT="../../debian/hsflowd" install; cd ../..; \
-+	pwd; \
-+	cd debian/hsflowd; \
-+	find . -type d | xargs chmod 755; \
-+	md5sum `find usr etc -type f` > md5sums; \
-+	cd ../..;
-+
- xenserver: xenrpm
- 	cd xenserver-ddk; $(MAKE) clean; $(MAKE)
- 
++	dh_auto_install -- INSTROOT="$(PWD)/debian/hsflowd/" FEATURES="SONIC"

From c2e249a9ce488ea3ca1183cf76bef4d13a37ef53 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sun, 12 May 2024 19:00:47 +0800
Subject: [PATCH 0569/1115] [submodule] Update submodule sonic-swss-common to
 the latest HEAD automatically (#18943)

#### Why I did it
src/sonic-swss-common
```
* 0044540 - (HEAD -> master, origin/master, origin/HEAD) Add new tables for Event and Alarms. (#852) (20 hours ago) [bhaveshdell]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-swss-common | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-swss-common b/src/sonic-swss-common
index 4b23970a0..00445404f 160000
--- a/src/sonic-swss-common
+++ b/src/sonic-swss-common
@@ -1 +1 @@
-Subproject commit 4b23970a0bc30ef66ff6825182a29886d9b253a6
+Subproject commit 00445404fff6d3673464e2a5defca1dc97ab3a43

From 3c1e31bfc2fb916066de2148cc821d72c088b1ed Mon Sep 17 00:00:00 2001
From: Yaqiang Zhu <yaqiangzhu@microsoft.com>
Date: Mon, 13 May 2024 13:54:33 +0800
Subject: [PATCH 0570/1115] [bgp] Add support to explicitly specify bgp router
 id for single asice device (#18727)
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

HLD: sonic-net/SONiC#1643
Add support to explictly specify bgp router id for single asic device


Microsoft ADO (number only): 27674485

How I did it
1. When bgp_router_id configured in DEVICE_METADATA, use it as bgp router-id.
2. Remove the hard dependency on loopback0 ipv4 address when adding bgp peer.
3. Add UTs.

Behavior of set bgp router-id

To be clarified that when bgp router-id hasn't been explicitly set, bgp actions would totally like previous

                                           Loopback0 IPv4 address exists	Loopback0 IPv4 address doesn't exist
bgp_router_id configured  Honor bgp_router_id	                Honor bgp_router_id
bgp_router_id not confgd  Honor Loopback0 IPv4 address	FRR default router ID value is selected as the largest IP address of the device. When router zebra is not enabled bgpd can’t get interface information, so router-id is set to 0.0.0.0


Behavior of add bgp peer

To be clarified that when bgp router-id hasn't been explicitly set, bgp actions would totally like previous

                                                         Loopback0 IPv4 address exists      Loopback0 IPv4 address doesn't exist
bgp_router_id configured	         Add BGP peer	                        Add BGP peer
bgp_router_id not configured	         Add BGP peer                                Do not add BGP peer
---
 .../docker-fpm-frr/frr/bgpd/bgpd.main.conf.j2 | 15 +++-
 .../templates/monitors/peer-group.conf.j2     |  2 +-
 src/sonic-bgpcfgd/bgpcfgd/managers_bgp.py     | 10 ++-
 .../param_without_lo0_ipv4.json               |  7 ++
 .../result_without_lo0_ipv4.conf              | 15 ++++
 .../bgpd.main.conf.j2/defaults_router_id.conf | 80 +++++++++++++++++++
 .../bgpd.main.conf.j2/defaults_router_id.json | 36 +++++++++
 .../bgpd.main.conf.j2/lo0_ipv6_only.conf      | 75 +++++++++++++++++
 .../bgpd.main.conf.j2/lo0_ipv6_only.json      | 37 +++++++++
 .../lo0_ipv6_only_router_id.conf              | 77 ++++++++++++++++++
 .../lo0_ipv6_only_router_id.json              | 35 ++++++++
 src/sonic-bgpcfgd/tests/test_bgp.py           | 28 ++++++-
 src/sonic-bgpcfgd/tests/test_sonic-cfggen.py  | 19 +++++
 13 files changed, 425 insertions(+), 11 deletions(-)
 create mode 100644 src/sonic-bgpcfgd/tests/data/monitors/peer-group.conf/param_without_lo0_ipv4.json
 create mode 100644 src/sonic-bgpcfgd/tests/data/monitors/peer-group.conf/result_without_lo0_ipv4.conf
 create mode 100644 src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/defaults_router_id.conf
 create mode 100644 src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/defaults_router_id.json
 create mode 100644 src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/lo0_ipv6_only.conf
 create mode 100644 src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/lo0_ipv6_only.json
 create mode 100644 src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/lo0_ipv6_only_router_id.conf
 create mode 100644 src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/lo0_ipv6_only_router_id.json

diff --git a/dockers/docker-fpm-frr/frr/bgpd/bgpd.main.conf.j2 b/dockers/docker-fpm-frr/frr/bgpd/bgpd.main.conf.j2
index 793ab055c..1ea4c8ac6 100644
--- a/dockers/docker-fpm-frr/frr/bgpd/bgpd.main.conf.j2
+++ b/dockers/docker-fpm-frr/frr/bgpd/bgpd.main.conf.j2
@@ -8,7 +8,10 @@
 !
 ! TSA configuration
 !
-ip prefix-list PL_LoopbackV4 permit {{ get_ipv4_loopback_address(LOOPBACK_INTERFACE, "Loopback0") | ip }}/32
+{% set lo0_ipv4 = get_ipv4_loopback_address(LOOPBACK_INTERFACE, "Loopback0") | ip %}
+{% if lo0_ipv4 is not none %}
+ip prefix-list PL_LoopbackV4 permit {{ lo0_ipv4 }}/32
+{% endif %}
 !
 {% if get_ipv6_loopback_address(LOOPBACK_INTERFACE, "Loopback0") != 'None' %}
 {% if ( ('localhost' in DEVICE_METADATA) and ('bgp_adv_lo_prefix_as_128' in  DEVICE_METADATA['localhost']) and
@@ -88,11 +91,17 @@ router bgp {{ DEVICE_METADATA['localhost']['bgp_asn'] }}
 {% if DEVICE_METADATA['localhost']['sub_role'] == 'BackEnd' or DEVICE_METADATA['localhost']['switch_type'] == 'voq' or DEVICE_METADATA['localhost']['switch_type'] == 'chassis-packet' %}
   bgp router-id {{ get_ipv4_loopback_address(LOOPBACK_INTERFACE, "Loopback4096") | ip }}
 {% else %}
-  bgp router-id {{ get_ipv4_loopback_address(LOOPBACK_INTERFACE, "Loopback0") | ip }}
+{% if "localhost" in DEVICE_METADATA and "bgp_router_id" in DEVICE_METADATA["localhost"] %}
+  bgp router-id {{ DEVICE_METADATA["localhost"]["bgp_router_id"] }}
+{% elif lo0_ipv4 is not none%}
+  bgp router-id {{ lo0_ipv4 }}
+{% endif %}
 {% endif %}
 !
 {# advertise loopback #}
-  network {{ get_ipv4_loopback_address(LOOPBACK_INTERFACE, "Loopback0") | ip }}/32
+{% if lo0_ipv4 is not none %}
+  network {{ lo0_ipv4 }}/32
+{% endif %}
 {% if ((multi_asic is defined and DEVICE_METADATA['localhost']['switch_type'] != 'chassis-packet') or (DEVICE_METADATA['localhost']['switch_type'] == 'voq')) %}
   network {{ get_ipv4_loopback_address(LOOPBACK_INTERFACE, "Loopback4096") | ip }}/32 route-map HIDE_INTERNAL
 {% endif %}
diff --git a/dockers/docker-fpm-frr/frr/bgpd/templates/monitors/peer-group.conf.j2 b/dockers/docker-fpm-frr/frr/bgpd/templates/monitors/peer-group.conf.j2
index 08df8adf7..45c60b817 100644
--- a/dockers/docker-fpm-frr/frr/bgpd/templates/monitors/peer-group.conf.j2
+++ b/dockers/docker-fpm-frr/frr/bgpd/templates/monitors/peer-group.conf.j2
@@ -4,7 +4,7 @@
   neighbor BGPMON peer-group
 {% if CONFIG_DB__DEVICE_METADATA['localhost']['type'] == 'SpineRouter' %}
   neighbor BGPMON update-source Loopback4096
-{% else %}
+{% elif loopback0_ipv4 %}
   neighbor BGPMON update-source {{ loopback0_ipv4 | ip }}
 {% endif %}
 
diff --git a/src/sonic-bgpcfgd/bgpcfgd/managers_bgp.py b/src/sonic-bgpcfgd/bgpcfgd/managers_bgp.py
index f0f23d3c4..347270f94 100644
--- a/src/sonic-bgpcfgd/bgpcfgd/managers_bgp.py
+++ b/src/sonic-bgpcfgd/bgpcfgd/managers_bgp.py
@@ -106,7 +106,6 @@ def __init__(self, common_objs, db_name, table_name, peer_type, check_neig_meta)
 
         deps = [
             ("CONFIG_DB", swsscommon.CFG_DEVICE_METADATA_TABLE_NAME, "localhost/bgp_asn"),
-            ("CONFIG_DB", swsscommon.CFG_LOOPBACK_INTERFACE_TABLE_NAME, "Loopback0"),
             ("CONFIG_DB", swsscommon.CFG_BGP_DEVICE_GLOBAL_TABLE_NAME, "tsa_enabled"),
             ("LOCAL", "local_addresses", ""),
             ("LOCAL", "interfaces", ""),
@@ -168,9 +167,11 @@ def add_peer(self, vrf, nbr, data):
         bgp_asn = self.directory.get_slot("CONFIG_DB", swsscommon.CFG_DEVICE_METADATA_TABLE_NAME)["localhost"]["bgp_asn"]
         #
         lo0_ipv4 = self.get_lo_ipv4("Loopback0|")
-        if lo0_ipv4 is None:
-            log_warn("Loopback0 ipv4 address is not presented yet")
+        if (lo0_ipv4 is None and "bgp_router_id"
+            not in self.directory.get_slot("CONFIG_DB", swsscommon.CFG_DEVICE_METADATA_TABLE_NAME)["localhost"]):
+            log_warn("Loopback0 ipv4 address is not presented yet and bgp_router_id not configured")
             return False
+
         #
         if self.peer_type == 'internal':
             lo4096_ipv4 = self.get_lo_ipv4("Loopback4096|")
@@ -203,10 +204,11 @@ def add_peer(self, vrf, nbr, data):
             'vrf': vrf,
             'neighbor_addr': nbr,
             'bgp_session': data,
-            'loopback0_ipv4': lo0_ipv4,
             'CONFIG_DB__LOOPBACK_INTERFACE':{ tuple(key.split('|')) : {} for key in self.directory.get_slot("CONFIG_DB", swsscommon.CFG_LOOPBACK_INTERFACE_TABLE_NAME)
                                                                          if '|' in key }
         }
+        if lo0_ipv4 is not None:
+            kwargs['loopback0_ipv4'] = lo0_ipv4
         if self.check_neig_meta:
             neigmeta = self.directory.get_slot("CONFIG_DB", swsscommon.CFG_DEVICE_NEIGHBOR_METADATA_TABLE_NAME)
             if 'name' in data and data["name"] not in neigmeta:
diff --git a/src/sonic-bgpcfgd/tests/data/monitors/peer-group.conf/param_without_lo0_ipv4.json b/src/sonic-bgpcfgd/tests/data/monitors/peer-group.conf/param_without_lo0_ipv4.json
new file mode 100644
index 000000000..da9a5c3db
--- /dev/null
+++ b/src/sonic-bgpcfgd/tests/data/monitors/peer-group.conf/param_without_lo0_ipv4.json
@@ -0,0 +1,7 @@
+{
+    "CONFIG_DB__DEVICE_METADATA": {
+        "localhost": {
+            "type": "LeafRouter"
+        }
+    }
+}
diff --git a/src/sonic-bgpcfgd/tests/data/monitors/peer-group.conf/result_without_lo0_ipv4.conf b/src/sonic-bgpcfgd/tests/data/monitors/peer-group.conf/result_without_lo0_ipv4.conf
new file mode 100644
index 000000000..ff6f98125
--- /dev/null
+++ b/src/sonic-bgpcfgd/tests/data/monitors/peer-group.conf/result_without_lo0_ipv4.conf
@@ -0,0 +1,15 @@
+!
+! template: bgpd/templates/BGPMON/peer-group.conf.j2
+!
+  neighbor BGPMON peer-group
+  address-family ipv4
+    neighbor BGPMON activate
+    neighbor BGPMON route-map FROM_BGPMON in
+    neighbor BGPMON route-map TO_BGPMON out
+    neighbor BGPMON send-community
+    neighbor BGPMON maximum-prefix 1
+  exit-address-family
+!
+! end of template: bgpd/templates/BGPMON/peer-group.conf.j2
+!
+
diff --git a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/defaults_router_id.conf b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/defaults_router_id.conf
new file mode 100644
index 000000000..96a30d0ab
--- /dev/null
+++ b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/defaults_router_id.conf
@@ -0,0 +1,80 @@
+!
+! template: bgpd/bgpd.main.conf.j2
+!
+! bgp multiple-instance
+!
+! BGP configuration
+!
+! TSA configuration
+!
+ip prefix-list PL_LoopbackV4 permit 55.55.55.55/32
+!
+ipv6 prefix-list PL_LoopbackV6 permit fc00::/64
+!
+ip prefix-list LOCAL_VLAN_IPV4_PREFIX seq 5 permit 10.10.10.0/24
+!
+ipv6 prefix-list LOCAL_VLAN_IPV6_PREFIX seq 10 permit fc01::/64
+!
+ip prefix-list V4_P2P_IP permit 0.0.0.0/0 ge 31 le 31
+!
+ipv6 prefix-list V6_P2P_IP permit ::/0 ge 126 le 126
+!
+route-map V4_CONNECTED_ROUTES permit 10
+  match ip address prefix-list V4_P2P_IP
+  call HIDE_INTERNAL
+!
+route-map V6_CONNECTED_ROUTES permit 10
+  match ipv6 address prefix-list V6_P2P_IP
+  call HIDE_INTERNAL
+!
+route-map HIDE_INTERNAL permit 10
+  set community no-export
+!
+!
+router bgp 55555
+!
+  bgp log-neighbor-changes
+  bgp suppress-fib-pending
+  no bgp default ipv4-unicast
+  no bgp ebgp-requires-policy
+!
+  bgp bestpath as-path multipath-relax
+!
+  bgp graceful-restart restart-time 240
+  bgp graceful-restart
+  bgp graceful-restart preserve-fw-state
+  bgp graceful-restart select-defer-time 45
+!
+  bgp router-id 8.8.8.8
+!
+  network 55.55.55.55/32
+  network 55.55.55.56/32 route-map HIDE_INTERNAL
+!
+  address-family ipv6
+    network fc00::1/64
+  exit-address-family
+  address-family ipv6
+    network fc00::2/128 route-map HIDE_INTERNAL
+  exit-address-family
+!
+  network 10.10.10.1/24
+  address-family ipv6
+   network fc01::1/64
+  exit-address-family
+!
+  address-family ipv4
+    redistribute connected route-map V4_CONNECTED_ROUTES
+  exit-address-family
+  address-family ipv6
+    redistribute connected route-map V6_CONNECTED_ROUTES
+  exit-address-family
+!
+  address-family ipv4
+    maximum-paths 64
+  exit-address-family
+  address-family ipv6
+    maximum-paths 64
+  exit-address-family
+!
+! end of template: bgpd/bgpd.main.conf.j2
+!
diff --git a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/defaults_router_id.json b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/defaults_router_id.json
new file mode 100644
index 000000000..1074ae707
--- /dev/null
+++ b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/defaults_router_id.json
@@ -0,0 +1,36 @@
+{
+    "DEVICE_METADATA": {
+        "localhost": {
+            "bgp_asn": "55555",
+            "sub_role": "FrontEnd",
+            "type": "ToRRouter",
+            "bgp_router_id": "8.8.8.8"
+        }
+    },
+    "LOOPBACK_INTERFACE": {
+        "Loopback0|55.55.55.55/32": {},
+        "Loopback0|fc00::1/128": {},
+        "Loopback4096|55.55.55.56/32": {},
+        "Loopback4096|fc00::2/128": {}
+    },
+    "VLAN_INTERFACE": {
+        "Vlan10|10.10.10.1/24": {},
+        "Vlan10|fc01::1/64": {},
+        "Vlan20": {"vnet_name": "Vnet1"},
+        "Vlan20|20.20.20.1/24": {},
+        "Vlan20|fd01::1/64": {}
+    },
+    "constants": {
+        "bgp": {
+            "multipath_relax": {
+                "enabled": true
+            },
+            "graceful_restart": {
+                "enabled": true
+            },
+            "maximum_paths": {
+                "enabled": true
+            }
+        }
+    }
+}
diff --git a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/lo0_ipv6_only.conf b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/lo0_ipv6_only.conf
new file mode 100644
index 000000000..b181dbd5e
--- /dev/null
+++ b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/lo0_ipv6_only.conf
@@ -0,0 +1,75 @@
+!
+! template: bgpd/bgpd.main.conf.j2
+!
+! bgp multiple-instance
+!
+! BGP configuration
+!
+! TSA configuration
+!
+ipv6 prefix-list PL_LoopbackV6 permit fc00::/64
+!
+ip prefix-list LOCAL_VLAN_IPV4_PREFIX seq 5 permit 10.10.10.0/24
+!
+ipv6 prefix-list LOCAL_VLAN_IPV6_PREFIX seq 10 permit fc01::/64
+!
+ip prefix-list V4_P2P_IP permit 0.0.0.0/0 ge 31 le 31
+!
+ipv6 prefix-list V6_P2P_IP permit ::/0 ge 126 le 126
+!
+route-map V4_CONNECTED_ROUTES permit 10
+  match ip address prefix-list V4_P2P_IP
+  call HIDE_INTERNAL
+!
+route-map V6_CONNECTED_ROUTES permit 10
+  match ipv6 address prefix-list V6_P2P_IP
+  call HIDE_INTERNAL
+!
+route-map HIDE_INTERNAL permit 10
+  set community no-export
+!
+!
+router bgp 55555
+!
+  bgp log-neighbor-changes
+  bgp suppress-fib-pending
+  no bgp default ipv4-unicast
+  no bgp ebgp-requires-policy
+!
+  bgp bestpath as-path multipath-relax
+!
+  bgp graceful-restart restart-time 480
+  bgp graceful-restart
+  bgp graceful-restart preserve-fw-state
+  bgp graceful-restart select-defer-time 45
+!
+  network 55.55.55.56/32 route-map HIDE_INTERNAL
+!
+  address-family ipv6
+    network fc00::1/64
+  exit-address-family
+  address-family ipv6
+    network fc00::2/128 route-map HIDE_INTERNAL
+  exit-address-family
+!
+  network 10.10.10.1/24
+  address-family ipv6
+   network fc01::1/64
+  exit-address-family
+!
+  address-family ipv4
+    redistribute connected route-map V4_CONNECTED_ROUTES
+  exit-address-family
+  address-family ipv6
+    redistribute connected route-map V6_CONNECTED_ROUTES
+  exit-address-family
+!
+  address-family ipv4
+    maximum-paths 32
+  exit-address-family
+  address-family ipv6
+    maximum-paths 32
+  exit-address-family
+!
+! end of template: bgpd/bgpd.main.conf.j2
+!
diff --git a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/lo0_ipv6_only.json b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/lo0_ipv6_only.json
new file mode 100644
index 000000000..3378029bd
--- /dev/null
+++ b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/lo0_ipv6_only.json
@@ -0,0 +1,37 @@
+{
+    "DEVICE_METADATA": {
+        "localhost": {
+            "bgp_asn": "55555",
+            "sub_role": "FrontEnd",
+            "type": "ToRRouter"
+        }
+    },
+    "LOOPBACK_INTERFACE": {
+        "Loopback0|fc00::1/128": {},
+        "Loopback4096|55.55.55.56/32": {},
+        "Loopback4096|fc00::2/128": {}
+    },
+    "VLAN_INTERFACE": {
+        "Vlan10|10.10.10.1/24": {},
+        "Vlan10|fc01::1/64": {},
+        "Vlan20": {"vnet_name": "Vnet1"},
+        "Vlan20|20.20.20.1/24": {},
+        "Vlan20|fd01::1/64": {}
+    },
+    "constants": {
+        "bgp": {
+            "multipath_relax": {
+                "enabled": true
+            },
+            "graceful_restart": {
+                "enabled": true,
+                "restart_time": 480
+            },
+            "maximum_paths": {
+                "enabled": true,
+                "ipv4": 32,
+                "ipv6": 32
+            }
+        }
+    }
+}
diff --git a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/lo0_ipv6_only_router_id.conf b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/lo0_ipv6_only_router_id.conf
new file mode 100644
index 000000000..c41fa0cfe
--- /dev/null
+++ b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/lo0_ipv6_only_router_id.conf
@@ -0,0 +1,77 @@
+!
+! template: bgpd/bgpd.main.conf.j2
+!
+! bgp multiple-instance
+!
+! BGP configuration
+!
+! TSA configuration
+!
+ipv6 prefix-list PL_LoopbackV6 permit fc00::/64
+!
+ip prefix-list LOCAL_VLAN_IPV4_PREFIX seq 5 permit 10.10.10.0/24
+!
+ipv6 prefix-list LOCAL_VLAN_IPV6_PREFIX seq 10 permit fc01::/64
+!
+ip prefix-list V4_P2P_IP permit 0.0.0.0/0 ge 31 le 31
+!
+ipv6 prefix-list V6_P2P_IP permit ::/0 ge 126 le 126
+!
+route-map V4_CONNECTED_ROUTES permit 10
+  match ip address prefix-list V4_P2P_IP
+  call HIDE_INTERNAL
+!
+route-map V6_CONNECTED_ROUTES permit 10
+  match ipv6 address prefix-list V6_P2P_IP
+  call HIDE_INTERNAL
+!
+route-map HIDE_INTERNAL permit 10
+  set community no-export
+!
+!
+router bgp 55555
+!
+  bgp log-neighbor-changes
+  bgp suppress-fib-pending
+  no bgp default ipv4-unicast
+  no bgp ebgp-requires-policy
+!
+  bgp bestpath as-path multipath-relax
+!
+  bgp graceful-restart restart-time 240
+  bgp graceful-restart
+  bgp graceful-restart preserve-fw-state
+  bgp graceful-restart select-defer-time 45
+!
+  bgp router-id 8.8.8.8
+!
+  network 55.55.55.56/32 route-map HIDE_INTERNAL
+!
+  address-family ipv6
+    network fc00::1/64
+  exit-address-family
+  address-family ipv6
+    network fc00::2/128 route-map HIDE_INTERNAL
+  exit-address-family
+!
+  network 10.10.10.1/24
+  address-family ipv6
+   network fc01::1/64
+  exit-address-family
+!
+  address-family ipv4
+    redistribute connected route-map V4_CONNECTED_ROUTES
+  exit-address-family
+  address-family ipv6
+    redistribute connected route-map V6_CONNECTED_ROUTES
+  exit-address-family
+!
+  address-family ipv4
+    maximum-paths 64
+  exit-address-family
+  address-family ipv6
+    maximum-paths 64
+  exit-address-family
+!
+! end of template: bgpd/bgpd.main.conf.j2
+!
diff --git a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/lo0_ipv6_only_router_id.json b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/lo0_ipv6_only_router_id.json
new file mode 100644
index 000000000..b400740e3
--- /dev/null
+++ b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/lo0_ipv6_only_router_id.json
@@ -0,0 +1,35 @@
+{
+    "DEVICE_METADATA": {
+        "localhost": {
+            "bgp_asn": "55555",
+            "sub_role": "FrontEnd",
+            "type": "ToRRouter",
+            "bgp_router_id": "8.8.8.8"
+        }
+    },
+    "LOOPBACK_INTERFACE": {
+        "Loopback0|fc00::1/128": {},
+        "Loopback4096|55.55.55.56/32": {},
+        "Loopback4096|fc00::2/128": {}
+    },
+    "VLAN_INTERFACE": {
+        "Vlan10|10.10.10.1/24": {},
+        "Vlan10|fc01::1/64": {},
+        "Vlan20": {"vnet_name": "Vnet1"},
+        "Vlan20|20.20.20.1/24": {},
+        "Vlan20|fd01::1/64": {}
+    },
+    "constants": {
+        "bgp": {
+            "multipath_relax": {
+                "enabled": true
+            },
+            "graceful_restart": {
+                "enabled": true
+            },
+            "maximum_paths": {
+                "enabled": true
+            }
+        }
+    }
+}
diff --git a/src/sonic-bgpcfgd/tests/test_bgp.py b/src/sonic-bgpcfgd/tests/test_bgp.py
index bd6f34c4b..6add8eaf0 100644
--- a/src/sonic-bgpcfgd/tests/test_bgp.py
+++ b/src/sonic-bgpcfgd/tests/test_bgp.py
@@ -21,7 +21,7 @@ def load_constant_files():
     return constant_files
 
 
-def constructor(constants_path):
+def constructor(constants_path, with_lo0_ipv4=True, bgp_router_id=""):
     cfg_mgr = MagicMock()
     constants = load_constants(constants_path)['constants']
     common_objs = {
@@ -41,8 +41,12 @@ def constructor(constants_path):
     assert m.peer_type == "general"
     assert m.check_neig_meta == ('bgp' in constants and 'use_neighbors_meta' in constants['bgp'] and constants['bgp']['use_neighbors_meta'])
 
-    m.directory.put("CONFIG_DB", swsscommon.CFG_DEVICE_METADATA_TABLE_NAME, "localhost", {"bgp_asn": "65100"})
-    m.directory.put("CONFIG_DB", swsscommon.CFG_LOOPBACK_INTERFACE_TABLE_NAME, "Loopback0|11.11.11.11/32", {})
+    localhost_obj = {"bgp_asn": "65100"}
+    if len(bgp_router_id) != 0:
+        localhost_obj["bgp_router_id"] = bgp_router_id
+    m.directory.put("CONFIG_DB", swsscommon.CFG_DEVICE_METADATA_TABLE_NAME, "localhost", localhost_obj)
+    if with_lo0_ipv4:
+        m.directory.put("CONFIG_DB", swsscommon.CFG_LOOPBACK_INTERFACE_TABLE_NAME, "Loopback0|11.11.11.11/32", {})
     m.directory.put("CONFIG_DB", swsscommon.CFG_LOOPBACK_INTERFACE_TABLE_NAME, "Loopback0|FC00:1::32/128", {})
     m.directory.put("LOCAL", "local_addresses", "30.30.30.30", {"interface": "Ethernet4|30.30.30.30/24"})
     m.directory.put("LOCAL", "local_addresses", "fc00:20::20", {"interface": "Ethernet8|fc00:20::20/96"})
@@ -100,6 +104,24 @@ def test_add_peer():
         res = m.set_handler("30.30.30.1", {'asn': '65200', 'holdtime': '180', 'keepalive': '60', 'local_addr': '30.30.30.30', 'name': 'TOR', 'nhopself': '0', 'rrclient': '0'})
         assert res, "Expect True return value"
 
+def test_add_peer_router_id():
+    for constant in load_constant_files():
+        m = constructor(constant, bgp_router_id="8.8.8.8")
+        res = m.set_handler("30.30.30.1", {'asn': '65200', 'holdtime': '180', 'keepalive': '60', 'local_addr': '30.30.30.30', 'name': 'TOR', 'nhopself': '0', 'rrclient': '0'})
+        assert res, "Expect True return value"
+
+def test_add_peer_without_lo_ipv4():
+    for constant in load_constant_files():
+        m = constructor(constant, with_lo0_ipv4=False)
+        res = m.set_handler("30.30.30.1", {'asn': '65200', 'holdtime': '180', 'keepalive': '60', 'local_addr': '30.30.30.30', 'name': 'TOR', 'nhopself': '0', 'rrclient': '0'})
+        assert not res, "Expect False return value"
+
+def test_add_peer_without_lo_ipv4_router_id():
+    for constant in load_constant_files():
+        m = constructor(constant, with_lo0_ipv4=False, bgp_router_id="8.8.8.8")
+        res = m.set_handler("30.30.30.1", {'asn': '65200', 'holdtime': '180', 'keepalive': '60', 'local_addr': '30.30.30.30', 'name': 'TOR', 'nhopself': '0', 'rrclient': '0'})
+        assert res, "Expect True return value"
+
 def test_add_peer_ipv6():
     for constant in load_constant_files():
         m = constructor(constant)
diff --git a/src/sonic-bgpcfgd/tests/test_sonic-cfggen.py b/src/sonic-bgpcfgd/tests/test_sonic-cfggen.py
index d18bbd058..d230197b7 100644
--- a/src/sonic-bgpcfgd/tests/test_sonic-cfggen.py
+++ b/src/sonic-bgpcfgd/tests/test_sonic-cfggen.py
@@ -152,3 +152,22 @@ def test_bgp_conf_all():
              "bgpd/bgpd.conf.j2",
              "bgpd.conf.j2/all.json",
              "bgpd.conf.j2/all.conf")
+
+def test_bgpd_main_conf_lo0_ipv6_only():
+    run_test("Base bgpd.main.conf.j2",
+             "bgpd/bgpd.main.conf.j2",
+             "bgpd.main.conf.j2/lo0_ipv6_only.json",
+             "bgpd.main.conf.j2/lo0_ipv6_only.conf")
+
+def test_bgpd_main_conf_lo0_ipv6_only_router_id():
+    run_test("Base bgpd.main.conf.j2",
+             "bgpd/bgpd.main.conf.j2",
+             "bgpd.main.conf.j2/lo0_ipv6_only_router_id.json",
+             "bgpd.main.conf.j2/lo0_ipv6_only_router_id.conf")
+
+def test_bgpd_main_conf_defaults_router_id():
+    run_test("Defaults bgpd.main.conf.j2",
+             "bgpd/bgpd.main.conf.j2",
+             "bgpd.main.conf.j2/defaults_router_id.json",
+             "bgpd.main.conf.j2/defaults_router_id.conf")
+    
\ No newline at end of file

From 050c764de3b6c1336d6f19c3a4076b5c9797dd2c Mon Sep 17 00:00:00 2001
From: wumiao_nokia <wu.miao@nokia.com>
Date: Mon, 13 May 2024 01:58:51 -0400
Subject: [PATCH 0571/1115] Clear FABRIC_PORT_TABLE when swss is got down
 (#18611)

Why I did it
fix #18554

Issue 18554(#18554) describes an issue of that when stopping swss services on SFMs, the related fabric reachability information do not get remove from the database.

It's found that corresponding fabric port status information is in STATE_DB with key FABRIC_PORT_TABLE|PORTxxx.

How I did it
Add clean table action for FABRIC_PORT_TABLE in STATE_DB when swss service is down.

How to verify it
Made changes and loaded the changes into chassis. Run "show fabric reachability -n asic7" to see the fabric ports. Also checked STATE_DB by using "sonic-db-cli -n asic7 STATE_DB hgetall "FABRIC_PORT_TABLE|PORT112" where port 112 is connected and up.

Issue "sudo systemctl stop swss@7". Check "show fabric reachability -n asic7". It's empty now.
Issue "sudo systemctl start swss@7" or "docker start swss7". Wait for 1 minutes. Run "show fabric reachability -n asic7", all connected port are displayed there. Also checked STATE_DB and all entries with key FABRIC_PORT_TABLE|PORTxxx are correct.
Issue "docker kill swss7". Repeat testing steps in 1). It works as exepcted.
Enter container swss7. Run "kill 35" where 35 is task id for orchagent. Watched container swss7 is stopped and then restarted. Watched the "Cleared FABRIC_PORT_TABLE from STATE_DB for swss7" log showed up after container is stopped.
---
 files/scripts/swss.sh | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/files/scripts/swss.sh b/files/scripts/swss.sh
index 0d73663b7..cb51c0bb0 100755
--- a/files/scripts/swss.sh
+++ b/files/scripts/swss.sh
@@ -310,7 +310,7 @@ start() {
         $SONIC_DB_CLI GB_ASIC_DB FLUSHDB
         $SONIC_DB_CLI GB_COUNTERS_DB FLUSHDB
         $SONIC_DB_CLI RESTAPI_DB FLUSHDB
-        clean_up_tables STATE_DB "'PORT_TABLE*', 'MGMT_PORT_TABLE*', 'VLAN_TABLE*', 'VLAN_MEMBER_TABLE*', 'LAG_TABLE*', 'LAG_MEMBER_TABLE*', 'INTERFACE_TABLE*', 'MIRROR_SESSION*', 'VRF_TABLE*', 'FDB_TABLE*', 'FG_ROUTE_TABLE*', 'BUFFER_POOL*', 'BUFFER_PROFILE*', 'MUX_CABLE_TABLE*', 'ADVERTISE_NETWORK_TABLE*', 'VXLAN_TUNNEL_TABLE*', 'VNET_ROUTE*', 'MACSEC_PORT_TABLE*', 'MACSEC_INGRESS_SA_TABLE*', 'MACSEC_EGRESS_SA_TABLE*', 'MACSEC_INGRESS_SC_TABLE*', 'MACSEC_EGRESS_SC_TABLE*', 'VRF_OBJECT_TABLE*', 'VNET_MONITOR_TABLE*', 'BFD_SESSION_TABLE*','SYSTEM_NEIGH_TABLE*'"
+        clean_up_tables STATE_DB "'PORT_TABLE*', 'MGMT_PORT_TABLE*', 'VLAN_TABLE*', 'VLAN_MEMBER_TABLE*', 'LAG_TABLE*', 'LAG_MEMBER_TABLE*', 'INTERFACE_TABLE*', 'MIRROR_SESSION*', 'VRF_TABLE*', 'FDB_TABLE*', 'FG_ROUTE_TABLE*', 'BUFFER_POOL*', 'BUFFER_PROFILE*', 'MUX_CABLE_TABLE*', 'ADVERTISE_NETWORK_TABLE*', 'VXLAN_TUNNEL_TABLE*', 'VNET_ROUTE*', 'MACSEC_PORT_TABLE*', 'MACSEC_INGRESS_SA_TABLE*', 'MACSEC_EGRESS_SA_TABLE*', 'MACSEC_INGRESS_SC_TABLE*', 'MACSEC_EGRESS_SC_TABLE*', 'VRF_OBJECT_TABLE*', 'VNET_MONITOR_TABLE*', 'BFD_SESSION_TABLE*', 'SYSTEM_NEIGH_TABLE*', 'FABRIC_PORT_TABLE*'"
         $SONIC_DB_CLI APPL_STATE_DB FLUSHDB
         clean_up_chassis_db_tables
         rm -rf /tmp/cache
@@ -412,7 +412,9 @@ stop() {
         /usr/bin/${SERVICE}.sh stop $DEV
         debug "Stopped ${SERVICE}$DEV service..."
         $SONIC_DB_CLI APPL_DB DEL PORT_TABLE:PortInitDone
-        debug "Cleared PortInitDone from APPL_DB..."
+        debug "Cleared PortInitDone from APPL_DB for ${SERVICE}$DEV..."
+        clean_up_tables STATE_DB "'FABRIC_PORT_TABLE*'"
+        debug "Cleared FABRIC_PORT_TABLE from STATE_DB for ${SERVICE}$DEV..."
     else
         debug "Killing Docker swss..."
         /usr/bin/docker kill swss &> /dev/null || debug "Docker swss is not running ($?) ..."

From c01f03164456b638b2bfa11521eedaa2feefd855 Mon Sep 17 00:00:00 2001
From: Mai Bui <maibui@microsoft.com>
Date: Mon, 13 May 2024 02:10:15 -0400
Subject: [PATCH 0572/1115] [iccpd]: Add boundary check before memset, memcpy,
 strncpy (#18270)

Add boundary check before memset, memcpy, strncpy calls to prevent buffer overflow

Microsoft ADO (number only): 27008041

Signed-off-by: Mai Bui <maibui@microsoft.com>
---
 src/iccpd/src/iccp_cli.c | 22 +++++++++++++++++++++-
 src/iccpd/src/iccp_cmd.c |  4 ++++
 2 files changed, 25 insertions(+), 1 deletion(-)

diff --git a/src/iccpd/src/iccp_cli.c b/src/iccpd/src/iccp_cli.c
index 59235215b..54b1e8907 100644
--- a/src/iccpd/src/iccp_cli.c
+++ b/src/iccpd/src/iccp_cli.c
@@ -117,7 +117,12 @@ int set_peer_link(int mid, const char* ifname)
                        csm->mlag_id, ifname);
     }
 
-    memset(csm->peer_itf_name, 0, MAX_L_PORT_NAME);
+    memset(csm->peer_itf_name, 0, IFNAMSIZ);
+    if (len > IFNAMSIZ)
+    {
+        ICCPD_LOG_ERR(__FUNCTION__, "len=%d greater than IFNAMESIZ=%d", len, IFNAMSIZ);
+        return MCLAG_ERROR;
+    }
     memcpy(csm->peer_itf_name, ifname, len);
 
     /* update peer-link link handler*/
@@ -208,8 +213,18 @@ int set_local_address(int mid, const char* addr)
 
     len = strlen(addr);
     memset(csm->sender_ip, 0, INET_ADDRSTRLEN);
+    if (len > INET_ADDRSTRLEN)
+    {
+        ICCPD_LOG_ERR(__FUNCTION__, "len=%d greater than INET_ADDRSTRLEN=%d ", len, INET_ADDRSTRLEN);
+        return MCLAG_ERROR;
+    }
     memcpy(csm->sender_ip, addr, len);
     memset(csm->iccp_info.sender_name, 0, INET_ADDRSTRLEN);
+    if (len > INET_ADDRSTRLEN)
+    {
+        ICCPD_LOG_ERR(__FUNCTION__, "len=%d greater than INET_ADDRSTRLEN=%d ", len, INET_ADDRSTRLEN);
+        return MCLAG_ERROR;
+    }
     memcpy(csm->iccp_info.sender_name, addr, len);
 
     return 0;
@@ -268,6 +283,11 @@ int set_peer_address(int mid, const char* addr)
     }
 
     memset(csm->peer_ip, 0, INET_ADDRSTRLEN);
+    if (len > INET_ADDRSTRLEN)
+    {
+        ICCPD_LOG_ERR(__FUNCTION__, "len=%d greater than INET_ADDRSTRLEN=%d ", len, INET_ADDRSTRLEN);
+        return MCLAG_ERROR;
+    }
     memcpy(csm->peer_ip, addr, len);
 
     return 0;
diff --git a/src/iccpd/src/iccp_cmd.c b/src/iccpd/src/iccp_cmd.c
index 8b39b73d0..134b293c0 100644
--- a/src/iccpd/src/iccp_cmd.c
+++ b/src/iccpd/src/iccp_cmd.c
@@ -135,6 +135,10 @@ int iccp_config_from_command(char * line)
                 cp++;
 
             slen = cp - start;
+            if (slen > strlen(token))
+            {
+                return MCLAG_ERROR;
+            }
             strncpy(token, start, slen);
             *(token + slen) = '\0';
             iccp_cli_attach_mclag_domain_to_port_channel(mid, token);

From edc9b6ad0dd4eead3db72c9f97afe9a60ad17279 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Mon, 13 May 2024 16:01:41 +0800
Subject: [PATCH 0573/1115] [submodule] Update submodule sonic-host-services to
 the latest HEAD automatically (#18900)

#### Why I did it
src/sonic-host-services
```
* aa84129 - (HEAD -> master, origin/master, origin/HEAD) Updated tacacs test (#123) (17 hours ago) [ycoheNvidia]
* 9e6404c - Add LDAP feature support (#80) (6 days ago) [davidpil2002]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-host-services | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-host-services b/src/sonic-host-services
index e93494c9c..aa8412986 160000
--- a/src/sonic-host-services
+++ b/src/sonic-host-services
@@ -1 +1 @@
-Subproject commit e93494c9c3b1fc49f998fcdc1daf7b02af8c9aba
+Subproject commit aa841298691dffd1ac0b527eb784928c08547cc2

From 1414156546bfd1ccbefa449d66be7b9a44717718 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Mon, 13 May 2024 16:01:47 +0800
Subject: [PATCH 0574/1115] [submodule] Update submodule sonic-gnmi to the
 latest HEAD automatically (#18899)

#### Why I did it
src/sonic-gnmi
```
* adece7c - (HEAD -> master, origin/master, origin/HEAD) Merge pull request #234 from saiarcot895/use-latest-swsscommon (3 days ago) [Saikrishna Arcot]
|\
| failure_prs.log 82c57c7 - Merge branch 'master' into use-latest-swsscommon (4 days ago) [Saikrishna Arcot]
| |\
| |/
|/|
* | d442e7a - Fix memory leak in unit test (#235) (4 days ago) [Hua Liu]
| failure_prs.log ec15a40 - Use the latest libswsscommon artifacts from the repo (4 days ago) [Saikrishna Arcot]
|/
* d16d1ca - Fix mixed_db_client ZMQ memory leak. (#232) (6 days ago) [Hua Liu]
* abe3ec0 - Merge pull request #227 from liuh-80/dev/liuh/fix_zmq_memory_leak (6 days ago) [Hua Liu]
* 7949eff - Fix indent issue (6 days ago) [liuh-80]
* 50c6c6d - Merge remote-tracking branch 'origin' into dev/liuh/fix_zmq_memory_leak (6 days ago) [liuh-80]
* 43b6fe5 - Improve code (6 days ago) [liuh-80]
* 709be76 - Fix ZMQ memory leak (7 days ago) [liuh-80]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-gnmi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-gnmi b/src/sonic-gnmi
index c2bfe3d27..adece7c46 160000
--- a/src/sonic-gnmi
+++ b/src/sonic-gnmi
@@ -1 +1 @@
-Subproject commit c2bfe3d2735421b3cb84d10e84014ed8019f986b
+Subproject commit adece7c46bed9b2a43ed2ea3fa325590988e95d3

From f88a12a3f69d350cf6e7acf2aa9d75abc4b3539a Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Mon, 13 May 2024 19:00:55 +0800
Subject: [PATCH 0575/1115] [submodule] Update submodule sonic-swss to the
 latest HEAD automatically (#18942)

#### Why I did it
src/sonic-swss
```
* 2aaca417 - (HEAD -> master, origin/master, origin/HEAD) [VRF]Fixing vrf orch to update state_db when evpn nvo arrives late (#3140) (2 days ago) [Sudharsan Dhamal Gopalarathnam]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-swss | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-swss b/src/sonic-swss
index 198eb3d1f..2aaca4179 160000
--- a/src/sonic-swss
+++ b/src/sonic-swss
@@ -1 +1 @@
-Subproject commit 198eb3d1f16f3e5746f1613b74a3debcbc2ac669
+Subproject commit 2aaca41794237cb6516866da2d0c7e29e31f44d2

From fd4c71f02bd072eba2af4d149c7653139dc9c9cf Mon Sep 17 00:00:00 2001
From: Pavan Naregundi <92989231+pavannaregundi@users.noreply.github.com>
Date: Tue, 14 May 2024 03:42:33 +0530
Subject: [PATCH 0576/1115] [marvell-arm64] Update HWSKU files to EZBv1.06
 (#18072)

Easy bringup (EZB) 1.05 and 1.06 add following features:
- User config support for ACL enhancements.
- Range check and validation changes in yang model.

Signed-off-by: Pavan Naregundi <pnaregundi@marvell.com>
---
 .../installer.conf                            |   2 +-
 .../ASK-Board-ac5x-rd-32x1G-16x2_5G-6x25G.md5 |   2 +-
 .../ASK-Board-ac5x-rd-32x1G-16x2_5G-6x25G.xml | 202 ++++++------------
 .../ASK-L1-AC5X-RD-32x1G-16x2_5G-6x25G.md5    |   2 +-
 .../ASK-L1-AC5X-RD-32x1G-16x2_5G-6x25G.xml    |   2 +-
 .../rd98DX35xx/ASK-PP-AC5X-RD.md5             |   2 +-
 .../rd98DX35xx/ASK-PP-AC5X-RD.xml             |  46 ++--
 .../SAI-AC5X-RD-32x1G-16x2_5G-6x25G.md5       |   2 +-
 .../SAI-AC5X-RD-32x1G-16x2_5G-6x25G.xml       | 184 ++++++++++++++--
 .../ASK-Board-ac5x-rd-32x1G-16x2_5G-6x25G.md5 |   2 +-
 .../ASK-Board-ac5x-rd-32x1G-16x2_5G-6x25G.xml | 202 ++++++------------
 .../ASK-L1-AC5X-RD-32x1G-16x2_5G-6x25G.md5    |   2 +-
 .../ASK-L1-AC5X-RD-32x1G-16x2_5G-6x25G.xml    |   2 +-
 .../rd98DX35xx_cn9131/ASK-PP-AC5X-RD.md5      |   2 +-
 .../rd98DX35xx_cn9131/ASK-PP-AC5X-RD.xml      |  46 ++--
 .../SAI-AC5X-RD-32x1G-16x2_5G-6x25G.md5       |   2 +-
 .../SAI-AC5X-RD-32x1G-16x2_5G-6x25G.xml       | 184 ++++++++++++++--
 17 files changed, 541 insertions(+), 345 deletions(-)

diff --git a/device/marvell/arm64-marvell_rd98DX35xx-r0/installer.conf b/device/marvell/arm64-marvell_rd98DX35xx-r0/installer.conf
index b65a86750..d22a7b2ea 100644
--- a/device/marvell/arm64-marvell_rd98DX35xx-r0/installer.conf
+++ b/device/marvell/arm64-marvell_rd98DX35xx-r0/installer.conf
@@ -1 +1 @@
-ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="default_hugepagesz=32M hugepages=4"
+ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="default_hugepagesz=32M hugepages=4 mem=4G"
diff --git a/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/ASK-Board-ac5x-rd-32x1G-16x2_5G-6x25G.md5 b/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/ASK-Board-ac5x-rd-32x1G-16x2_5G-6x25G.md5
index a848fd51c..0e8ad2bf7 100644
--- a/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/ASK-Board-ac5x-rd-32x1G-16x2_5G-6x25G.md5
+++ b/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/ASK-Board-ac5x-rd-32x1G-16x2_5G-6x25G.md5
@@ -1 +1 @@
-7a62aaeaed876bd57c22537911fa7a4e
\ No newline at end of file
+266aa59b7e63faf97657313fe65cdf86
\ No newline at end of file
diff --git a/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/ASK-Board-ac5x-rd-32x1G-16x2_5G-6x25G.xml b/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/ASK-Board-ac5x-rd-32x1G-16x2_5G-6x25G.xml
index b2d413fff..fc26d290e 100644
--- a/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/ASK-Board-ac5x-rd-32x1G-16x2_5G-6x25G.xml
+++ b/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/ASK-Board-ac5x-rd-32x1G-16x2_5G-6x25G.xml
@@ -1,5 +1,5 @@
 <?xml version="1.0" encoding="utf-8"?>
-<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2023-05-05-1.04" profile="Askboard" dsig="md5">
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-02-19-1.06" profile="Askboard" sid="eb53f80b-5892-4f8b-9197-a6f626effaba">
   <askboardplt:ASK-Board xmlns:askboardplt="urn:marvell:askboard:yang">
     <askboardplt:typedefs>
       <askboardplt:typedef>
@@ -52,7 +52,7 @@
       <askboardplt:typedef>
         <askboardplt:name>board-pp-interface-channel-type</askboardplt:name>
         <askboardplt:type>enumeration</askboardplt:type>
-        <askboardplt:description>Specifies interface tunnel.</askboardplt:description>
+        <askboardplt:description>Specifies channel interface type.</askboardplt:description>
         <askboardplt:enum>
           <askboardplt:name>pci</askboardplt:name>
           <askboardplt:description>PCI</askboardplt:description>
@@ -64,27 +64,37 @@
           <askboardplt:value>1</askboardplt:value>
         </askboardplt:enum>
         <askboardplt:enum>
-          <askboardplt:name>pex</askboardplt:name>
-          <askboardplt:description>PEX</askboardplt:description>
-          <askboardplt:value>3</askboardplt:value>
+          <askboardplt:name>twsi</askboardplt:name>
+          <askboardplt:description>TWSI</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
         </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>board-pp-as-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies Address space type.</askboardplt:description>
         <askboardplt:enum>
-          <askboardplt:name>pex_eagle</askboardplt:name>
-          <askboardplt:description>PEX EAGLE</askboardplt:description>
-          <askboardplt:value>5</askboardplt:value>
+          <askboardplt:name>4_regions</askboardplt:name>
+          <askboardplt:description>address-space 4 regions</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
         </askboardplt:enum>
         <askboardplt:enum>
-          <askboardplt:name>pex_falcon_z</askboardplt:name>
-          <askboardplt:description>PEX FALCON Z</askboardplt:description>
-          <askboardplt:value>6</askboardplt:value>
+          <askboardplt:name>8_regions</askboardplt:name>
+          <askboardplt:description>address-space 8 regions</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>atu</askboardplt:name>
+          <askboardplt:description>address translation unit</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
         </askboardplt:enum>
       </askboardplt:typedef>
       <askboardplt:typedef>
         <askboardplt:name>device-id-type</askboardplt:name>
         <askboardplt:type>uint32</askboardplt:type>
-        <askboardplt:description>Device ID 0..1023</askboardplt:description>
+        <askboardplt:description>Device ID 0..1</askboardplt:description>
         <askboardplt:min>0</askboardplt:min>
-        <askboardplt:max>1023</askboardplt:max>
+        <askboardplt:max>1</askboardplt:max>
       </askboardplt:typedef>
       <askboardplt:typedef>
         <askboardplt:name>port-mapping-type</askboardplt:name>
@@ -111,11 +121,9 @@
       <askboardplt:typedef>
         <askboardplt:name>txq-port-number-type</askboardplt:name>
         <askboardplt:type>uint32</askboardplt:type>
-        <askboardplt:description>0 - 8 queues are configured per port (legacy mode),
-1...16 - the number of queues configured per port
-   	SIP 5 : Bobcat2,BobK:0..71 ;Bobcat3: 0..576 ;Aldrin2:0..99</askboardplt:description>
+        <askboardplt:description>TXq port number </askboardplt:description>
         <askboardplt:min>0</askboardplt:min>
-        <askboardplt:max>576</askboardplt:max>
+        <askboardplt:max>99</askboardplt:max>
       </askboardplt:typedef>
       <askboardplt:typedef>
         <askboardplt:name>phy-smi-interface-type</askboardplt:name>
@@ -162,12 +170,14 @@
         </askboardplt:enum>
         <askboardplt:enum>
           <askboardplt:name>alaska-88E3140</askboardplt:name>
-          <askboardplt:description>Specifies PHY identifier 88E3140, used for Copper with speeds of 100M/1G/10G. Uses with FW SolarFlare next generation.</askboardplt:description>
+          <askboardplt:description>Specifies PHY identifier 88E3140, used for Copper with speeds of 100M/1G/10G.
+Uses with FW SolarFlare next generation.</askboardplt:description>
           <askboardplt:value>5</askboardplt:value>
         </askboardplt:enum>
         <askboardplt:enum>
           <askboardplt:name>alaska-88E3240</askboardplt:name>
-          <askboardplt:description>Specifies PHY identifier 88E3240, used for Copper with speeds of 100M/1G/10G. Uses with FW, SolarFlare next generation.</askboardplt:description>
+          <askboardplt:description>Specifies PHY identifier 88E3240, used for Copper with speeds of 100M/1G/10G.
+Uses with FW, SolarFlare next generation.</askboardplt:description>
           <askboardplt:value>6</askboardplt:value>
         </askboardplt:enum>
         <askboardplt:enum>
@@ -177,7 +187,8 @@
         </askboardplt:enum>
         <askboardplt:enum>
           <askboardplt:name>alaska-88E3220</askboardplt:name>
-          <askboardplt:description>Specifies PHY identifier 88E3220, used for Combo port with speeds of 100M/1G/10G. Uses FW, SolarFlare next generation.</askboardplt:description>
+          <askboardplt:description>Specifies PHY identifier 88E3220, used for Combo port with speeds of 100M/1G/10G.
+Uses FW, SolarFlare next generation.</askboardplt:description>
           <askboardplt:value>8</askboardplt:value>
         </askboardplt:enum>
         <askboardplt:enum>
@@ -212,17 +223,20 @@
         </askboardplt:enum>
         <askboardplt:enum>
           <askboardplt:name>alaska-88E1780</askboardplt:name>
-          <askboardplt:description>Specifies PHY identifier 88E1780, Integrated Octal 10/100/1000 Mbps Energy Efficient Ethernet Transceiver</askboardplt:description>
+          <askboardplt:description>Specifies PHY identifier 88E1780, Integrated Octal 10/100/1000 Mbps Energy
+Efficient Ethernet Transceiver</askboardplt:description>
           <askboardplt:value>15</askboardplt:value>
         </askboardplt:enum>
         <askboardplt:enum>
           <askboardplt:name>alaska-88E2540</askboardplt:name>
-          <askboardplt:description>Specifies PHY identifier 88E2540, 4 ports 10/100/1000/2.5G/5GBASE-T Ethernet Transceiver with IEEE 1588v2 PTP Support</askboardplt:description>
+          <askboardplt:description>Specifies PHY identifier 88E2540, 4 ports 10/100/1000/2.5G/5GBASE-T Ethernet
+Transceiver with IEEE 1588v2 PTP Support</askboardplt:description>
           <askboardplt:value>16</askboardplt:value>
         </askboardplt:enum>
         <askboardplt:enum>
           <askboardplt:name>alaska-88E2580</askboardplt:name>
-          <askboardplt:description>Specifies PHY identifier 88E12580, Octal 10/100/1000/2.5G/5GBASE-T Ethernet Transceiver with IEEE 1588v2 PTP Support</askboardplt:description>
+          <askboardplt:description>Specifies PHY identifier 88E12580, Octal 10/100/1000/2.5G/5GBASE-T Ethernet Transceiver
+with IEEE 1588v2 PTP Support</askboardplt:description>
           <askboardplt:value>17</askboardplt:value>
         </askboardplt:enum>
       </askboardplt:typedef>
@@ -510,7 +524,7 @@
         <askboardplt:type>uint32</askboardplt:type>
         <askboardplt:description>serdes lane</askboardplt:description>
         <askboardplt:min>0</askboardplt:min>
-        <askboardplt:max>255</askboardplt:max>
+        <askboardplt:max>7</askboardplt:max>
       </askboardplt:typedef>
       <askboardplt:typedef>
         <askboardplt:name>cpu-type</askboardplt:name>
@@ -589,12 +603,12 @@ lowercase characters.</askboardplt:description>
         </askboardplt:enum>
         <askboardplt:enum>
           <askboardplt:name>sip5</askboardplt:name>
-          <askboardplt:description>SIP5: AC5, AC3x</askboardplt:description>
+          <askboardplt:description>SIP5: AC3x</askboardplt:description>
           <askboardplt:value>5</askboardplt:value>
         </askboardplt:enum>
         <askboardplt:enum>
           <askboardplt:name>sip6</askboardplt:name>
-          <askboardplt:description>SIP6: Falcon, AC5x, AC5P</askboardplt:description>
+          <askboardplt:description>SIP6: Falcon, AC5x</askboardplt:description>
           <askboardplt:value>6</askboardplt:value>
         </askboardplt:enum>
       </askboardplt:typedef>
@@ -665,13 +679,35 @@ lowercase characters.</askboardplt:description>
           <askboardplt:value>1</askboardplt:value>
         </askboardplt:enum>
       </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>asic-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>ASIC Type</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>ASIC_AC3X</askboardplt:name>
+          <askboardplt:description>AC3X</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>ASIC_AC5X</askboardplt:name>
+          <askboardplt:description>AC5X</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>ASIC_Falcon</askboardplt:name>
+          <askboardplt:description>FALCON</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
     </askboardplt:typedefs>
+    <askboardplt:ASIC_Type askboardplt:type="asic-type">ASIC_AC5X</askboardplt:ASIC_Type>
     <askboardplt:boardName askboardplt:type="std-string">AC5X-RD-32x1G-16x2.5G-6x25G</askboardplt:boardName>
     <askboardplt:osCallType askboardplt:type="board-callback-type">linux-static</askboardplt:osCallType>
     <askboardplt:extDrvCallType askboardplt:type="board-callback-type">linux-static</askboardplt:extDrvCallType>
     <askboardplt:mapType askboardplt:type="board-pp-map-type">autoscan</askboardplt:mapType>
     <askboardplt:cpuType askboardplt:type="cpu-type">internal</askboardplt:cpuType>
-    <askboardplt:mngInterfaceType askboardplt:type="board-pp-interface-channel-type">pex_eagle</askboardplt:mngInterfaceType>
+    <askboardplt:mngInterfaceType askboardplt:type="board-pp-interface-channel-type">pci</askboardplt:mngInterfaceType>
+    <askboardplt:adressSpaceType askboardplt:type="board-pp-as-type">atu</askboardplt:adressSpaceType>
     <askboardplt:device-list>
       <askboardplt:devNum askboardplt:type="device-id-type">0</askboardplt:devNum>
       <askboardplt:deviceId askboardplt:type="device-id-type">0</askboardplt:deviceId>
@@ -683,10 +719,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">1</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">0</askboardplt:phyNumber>
@@ -704,10 +738,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">0</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">0</askboardplt:phyNumber>
@@ -725,10 +757,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">3</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">0</askboardplt:phyNumber>
@@ -746,10 +776,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">2</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">0</askboardplt:phyNumber>
@@ -767,10 +795,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">5</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">0</askboardplt:phyNumber>
@@ -788,10 +814,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">4</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">0</askboardplt:phyNumber>
@@ -809,10 +833,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">7</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">0</askboardplt:phyNumber>
@@ -830,10 +852,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">6</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">0</askboardplt:phyNumber>
@@ -851,10 +871,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">9</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">1</askboardplt:phyNumber>
@@ -872,10 +890,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">8</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">1</askboardplt:phyNumber>
@@ -893,10 +909,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">11</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">1</askboardplt:phyNumber>
@@ -914,10 +928,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">10</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">1</askboardplt:phyNumber>
@@ -935,10 +947,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">13</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">1</askboardplt:phyNumber>
@@ -956,10 +966,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">12</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">1</askboardplt:phyNumber>
@@ -977,10 +985,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">15</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">1</askboardplt:phyNumber>
@@ -998,10 +1004,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">14</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">1</askboardplt:phyNumber>
@@ -1019,10 +1023,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">17</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">2</askboardplt:phyNumber>
@@ -1040,10 +1042,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">16</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">2</askboardplt:phyNumber>
@@ -1061,10 +1061,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">19</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">2</askboardplt:phyNumber>
@@ -1082,10 +1080,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">18</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">2</askboardplt:phyNumber>
@@ -1103,10 +1099,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">21</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">2</askboardplt:phyNumber>
@@ -1124,10 +1118,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">20</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">2</askboardplt:phyNumber>
@@ -1145,10 +1137,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">23</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">2</askboardplt:phyNumber>
@@ -1166,10 +1156,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">22</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">2</askboardplt:phyNumber>
@@ -1187,10 +1175,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">25</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">3</askboardplt:phyNumber>
@@ -1208,10 +1194,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">24</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">3</askboardplt:phyNumber>
@@ -1229,10 +1213,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">27</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">3</askboardplt:phyNumber>
@@ -1250,10 +1232,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">26</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">3</askboardplt:phyNumber>
@@ -1271,10 +1251,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">29</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">3</askboardplt:phyNumber>
@@ -1292,10 +1270,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">28</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">3</askboardplt:phyNumber>
@@ -1313,10 +1289,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">31</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">3</askboardplt:phyNumber>
@@ -1334,10 +1308,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">30</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">3</askboardplt:phyNumber>
@@ -1355,10 +1327,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">33</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E2580</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">4</askboardplt:phyNumber>
@@ -1376,10 +1346,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">46</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E2540</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">6</askboardplt:phyNumber>
@@ -1397,10 +1365,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">47</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E2540</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">6</askboardplt:phyNumber>
@@ -1418,10 +1384,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">44</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E2540</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">6</askboardplt:phyNumber>
@@ -1439,10 +1403,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">45</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E2540</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">6</askboardplt:phyNumber>
@@ -1460,10 +1422,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">42</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E2540</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">5</askboardplt:phyNumber>
@@ -1481,10 +1441,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">43</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E2540</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">5</askboardplt:phyNumber>
@@ -1502,10 +1460,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">40</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E2540</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">5</askboardplt:phyNumber>
@@ -1523,10 +1479,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">41</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E2540</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">5</askboardplt:phyNumber>
@@ -1544,10 +1498,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">38</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E2580</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">4</askboardplt:phyNumber>
@@ -1565,10 +1517,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">39</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E2580</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">4</askboardplt:phyNumber>
@@ -1586,10 +1536,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">36</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E2580</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">4</askboardplt:phyNumber>
@@ -1607,10 +1555,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">37</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E2580</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">4</askboardplt:phyNumber>
@@ -1628,10 +1574,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">34</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E2580</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">4</askboardplt:phyNumber>
@@ -1649,10 +1593,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">35</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E2580</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">4</askboardplt:phyNumber>
@@ -1670,10 +1612,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">32</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E2580</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">4</askboardplt:phyNumber>
@@ -1691,10 +1631,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">48</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
         </askboardplt:phy>
@@ -1713,10 +1651,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">49</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
         </askboardplt:phy>
@@ -1735,10 +1671,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">50</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
         </askboardplt:phy>
@@ -1757,10 +1691,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">51</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
         </askboardplt:phy>
@@ -1779,10 +1711,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">52</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
         </askboardplt:phy>
@@ -1801,10 +1731,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">53</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
         </askboardplt:phy>
@@ -1823,20 +1751,16 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">cpu_sdma</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">54</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
       </askboardplt:portMap-list>
       <askboardplt:portMap-list>
         <askboardplt:portNumber askboardplt:type="physical-port-num-type">60</askboardplt:portNumber>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">cpu_sdma</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">55</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
       </askboardplt:portMap-list>
       <askboardplt:Ledstream-interface-list>
         <askboardplt:ledstream-interface-number askboardplt:type="led-interface-type">0</askboardplt:ledstream-interface-number>
diff --git a/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/ASK-L1-AC5X-RD-32x1G-16x2_5G-6x25G.md5 b/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/ASK-L1-AC5X-RD-32x1G-16x2_5G-6x25G.md5
index 3a08897bf..f2cf3d5b6 100644
--- a/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/ASK-L1-AC5X-RD-32x1G-16x2_5G-6x25G.md5
+++ b/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/ASK-L1-AC5X-RD-32x1G-16x2_5G-6x25G.md5
@@ -1 +1 @@
-2876aaa02a47b5842e152ce794c50110
\ No newline at end of file
+85b49bcb9d399bcd1b8128a42caba2d2
\ No newline at end of file
diff --git a/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/ASK-L1-AC5X-RD-32x1G-16x2_5G-6x25G.xml b/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/ASK-L1-AC5X-RD-32x1G-16x2_5G-6x25G.xml
index 1d07f5994..980d4267b 100644
--- a/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/ASK-L1-AC5X-RD-32x1G-16x2_5G-6x25G.xml
+++ b/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/ASK-L1-AC5X-RD-32x1G-16x2_5G-6x25G.xml
@@ -1,5 +1,5 @@
 <?xml version="1.0" encoding="utf-8"?>
-<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2023-05-05-1.04" profile="Askl1" dsig="md5">
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-02-19-1.06" profile="Askl1" sid="71d3ab0f-3ac2-452a-a5c9-2dfdc969734a">
   <ASKL1plt:ASK-L1 xmlns:ASKL1plt="urn:marvell:ASKL1:yang">
     <ASKL1plt:typedefs>
       <ASKL1plt:typedef>
diff --git a/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/ASK-PP-AC5X-RD.md5 b/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/ASK-PP-AC5X-RD.md5
index de23afe95..c043a0d72 100644
--- a/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/ASK-PP-AC5X-RD.md5
+++ b/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/ASK-PP-AC5X-RD.md5
@@ -1 +1 @@
-b42f2a2be9da6c7752c0807f9dee48bf
\ No newline at end of file
+209426f8b550ddf85db19925f9f202a1
\ No newline at end of file
diff --git a/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/ASK-PP-AC5X-RD.xml b/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/ASK-PP-AC5X-RD.xml
index ad457fe7d..9e40492cf 100644
--- a/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/ASK-PP-AC5X-RD.xml
+++ b/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/ASK-PP-AC5X-RD.xml
@@ -1,5 +1,5 @@
 <?xml version="1.0" encoding="utf-8"?>
-<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2023-05-05-1.04" profile="Askpp" dsig="md5">
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-02-19-1.06" profile="Askpp" sid="34f1c14a-b581-422d-bd10-426dfac013dd">
   <askppplt:ASK-PP xmlns:askppplt="urn:marvell:askpp:yang">
     <askppplt:typedefs>
       <askppplt:typedef>
@@ -357,28 +357,28 @@
         <askppplt:enum>
           <askppplt:name>NATIVE</askppplt:name>
           <askppplt:description>NATIVE
-   	 *  the trunk members are filled
-   	 *  according to the order given by application.
-   	 *  Regular trunk may hold max of 8 members.
-   	 *  Cascade trunk may hold :
-   	 *  max of 64 members</askppplt:description>
+*  the trunk members are filled
+*  according to the order given by application.
+*  Regular trunk may hold max of 8 members.
+*  Cascade trunk may hold :
+*  max of 64 members</askppplt:description>
           <askppplt:value>0</askppplt:value>
         </askppplt:enum>
         <askppplt:enum>
           <askppplt:name>FLEX</askppplt:name>
           <askppplt:description>FLEX
-   	 *  A mode to allows flexibility for
-   	 *  each Regular trunk to state it's max number of members (before starting to add members).
-   	 *  (this mode not effect 'cascade trunk' members)
-   	 *  Regular trunk may hold : max of 4K members. (each trunk set it's own limit)
-   	 *  Cascade trunk may hold : max of 64 members.</askppplt:description>
+*  A mode to allows flexibility for
+*  each Regular trunk to state it's max number of members (before starting to add members).
+*  (this mode not effect 'cascade trunk' members)
+*  Regular trunk may hold : max of 4K members. (each trunk set it's own limit)
+*  Cascade trunk may hold : max of 64 members.</askppplt:description>
           <askppplt:value>2</askppplt:value>
         </askppplt:enum>
       </askppplt:typedef>
       <askppplt:typedef>
         <askppplt:name>number-physical-port-type</askppplt:name>
         <askppplt:type>enumeration</askppplt:type>
-        <askppplt:description>ac5x 128, falcon 64,128,256, 512, 1024</askppplt:description>
+        <askppplt:description>AC3X/AC5X 128, falcon 64, 128, 256, 512, 1024</askppplt:description>
         <askppplt:enum>
           <askppplt:name>no-ports</askppplt:name>
           <askppplt:description>no-ports</askppplt:description>
@@ -519,7 +519,28 @@
           <askppplt:value>1</askppplt:value>
         </askppplt:enum>
       </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>asic-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>ASIC Type</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>ASIC_AC3X</askppplt:name>
+          <askppplt:description>AC3X</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>ASIC_AC5X</askppplt:name>
+          <askppplt:description>AC5X</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>ASIC_Falcon</askppplt:name>
+          <askppplt:description>FALCON</askppplt:description>
+          <askppplt:value>2</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
     </askppplt:typedefs>
+    <askppplt:ASIC_Type askppplt:type="asic-type">ASIC_AC5X</askppplt:ASIC_Type>
     <askppplt:PPInit>
       <askppplt:PP-name askppplt:type="std-string">AC5X-RD</askppplt:PP-name>
       <askppplt:Phase1>
@@ -842,7 +863,6 @@
       <askppplt:LogicalInit>
         <askppplt:routingMode askppplt:type="routing-mode-type">TCAM_ROUTER_BASED</askppplt:routingMode>
         <askppplt:maxNumOfPbrEntries askppplt:type="uint32">0</askppplt:maxNumOfPbrEntries>
-        <askppplt:sharedTableMode askppplt:type="shared-table-mode-type">MID_L3_MID_L2_NO_EM</askppplt:sharedTableMode>
         <askppplt:ingressDropEnable askppplt:type="boolean-type">true</askppplt:ingressDropEnable>
       </askppplt:LogicalInit>
       <askppplt:LibInit>
diff --git a/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/SAI-AC5X-RD-32x1G-16x2_5G-6x25G.md5 b/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/SAI-AC5X-RD-32x1G-16x2_5G-6x25G.md5
index bd88f03a2..41cd16295 100644
--- a/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/SAI-AC5X-RD-32x1G-16x2_5G-6x25G.md5
+++ b/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/SAI-AC5X-RD-32x1G-16x2_5G-6x25G.md5
@@ -1 +1 @@
-079a2fcdb8fe1d1f0cf39e3c40e6dd36
\ No newline at end of file
+fec8b7884a940c38451ef84be6fdbb24
\ No newline at end of file
diff --git a/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/SAI-AC5X-RD-32x1G-16x2_5G-6x25G.xml b/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/SAI-AC5X-RD-32x1G-16x2_5G-6x25G.xml
index f71d485bb..bbedd396d 100644
--- a/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/SAI-AC5X-RD-32x1G-16x2_5G-6x25G.xml
+++ b/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/SAI-AC5X-RD-32x1G-16x2_5G-6x25G.xml
@@ -1,13 +1,13 @@
 <?xml version="1.0" encoding="utf-8"?>
-<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2023-05-05-1.04" profile="SAI" dsig="md5">
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-02-19-1.06" profile="SAI" sid="c310bbb1-ffca-4c99-9bae-f7d4caff5941">
   <SAIplt:SAI xmlns:SAIplt="urn:marvell:SAI:yang">
     <SAIplt:typedefs>
       <SAIplt:typedef>
         <SAIplt:name>device-id-type</SAIplt:name>
         <SAIplt:type>uint32</SAIplt:type>
-        <SAIplt:description>Device ID 0..1023</SAIplt:description>
+        <SAIplt:description>Device ID 0..1</SAIplt:description>
         <SAIplt:min>0</SAIplt:min>
-        <SAIplt:max>1023</SAIplt:max>
+        <SAIplt:max>1</SAIplt:max>
       </SAIplt:typedef>
       <SAIplt:typedef>
         <SAIplt:name>port-id-type</SAIplt:name>
@@ -22,7 +22,7 @@
         <SAIplt:description>Logging Feature Options</SAIplt:description>
         <SAIplt:enum>
           <SAIplt:name>SAI_LOG_SYSLOG</SAIplt:name>
-          <SAIplt:description>SYSLOG               {Syslog service should be running to use this option}</SAIplt:description>
+          <SAIplt:description>SYSLOG  {Syslog service should be running to use this option}</SAIplt:description>
           <SAIplt:value>0</SAIplt:value>
         </SAIplt:enum>
         <SAIplt:enum>
@@ -32,7 +32,27 @@
         </SAIplt:enum>
         <SAIplt:enum>
           <SAIplt:name>SAI_LOG_FILE</SAIplt:name>
-          <SAIplt:description>FILE                       {Warning !!! Use with caution. Can cause disk full issues}</SAIplt:description>
+          <SAIplt:description>FILE  {Warning !!! Use with caution. Can cause disk full issues}</SAIplt:description>
+          <SAIplt:value>2</SAIplt:value>
+        </SAIplt:enum>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>InDropCounter-type</SAIplt:name>
+        <SAIplt:type>enumeration</SAIplt:type>
+        <SAIplt:description>Router In Drop Reason Feature Options</SAIplt:description>
+        <SAIplt:enum>
+          <SAIplt:name>TTL_HOPLIMIT_EXCEEDED</SAIplt:name>
+          <SAIplt:description>Router In Drop Counters track TTL &amp; Hop Limit Exceeded Packets</SAIplt:description>
+          <SAIplt:value>0</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>ROUTE_BLACKHOLE</SAIplt:name>
+          <SAIplt:description>Router In Drop Counters track Route Black Hole Packets</SAIplt:description>
+          <SAIplt:value>1</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>IN_DROP_ANY</SAIplt:name>
+          <SAIplt:description>Router In Drop Counters track either TTL &amp; Hop Limit Exceeded or Route Black Hole Packets</SAIplt:description>
           <SAIplt:value>2</SAIplt:value>
         </SAIplt:enum>
       </SAIplt:typedef>
@@ -43,11 +63,103 @@
         <SAIplt:min>2</SAIplt:min>
         <SAIplt:max>30</SAIplt:max>
       </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>acl-feature-name-type</SAIplt:name>
+        <SAIplt:type>enumeration</SAIplt:type>
+        <SAIplt:description/>
+        <SAIplt:enum>
+          <SAIplt:name>port-sFlow</SAIplt:name>
+          <SAIplt:description>SFlow over Port</SAIplt:description>
+          <SAIplt:value>0</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>port-counters-ipv4-ipv6</SAIplt:name>
+          <SAIplt:description>Port ipv4/ipv6 counters</SAIplt:description>
+          <SAIplt:value>1</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>control-acl</SAIplt:name>
+          <SAIplt:description>ACLs for control packet handling</SAIplt:description>
+          <SAIplt:value>2</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>debug-counter-acl</SAIplt:name>
+          <SAIplt:description>ACLs for Debug Counters</SAIplt:description>
+          <SAIplt:value>3</SAIplt:value>
+        </SAIplt:enum>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>ingress-acl-stage-type</SAIplt:name>
+        <SAIplt:type>enumeration</SAIplt:type>
+        <SAIplt:description/>
+        <SAIplt:enum>
+          <SAIplt:name>disabled</SAIplt:name>
+          <SAIplt:description>Feature not enabled</SAIplt:description>
+          <SAIplt:value>0</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>IPCL0</SAIplt:name>
+          <SAIplt:description>Stage IPCL0</SAIplt:description>
+          <SAIplt:value>1</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>IPCL1</SAIplt:name>
+          <SAIplt:description>Stage IPCL1</SAIplt:description>
+          <SAIplt:value>2</SAIplt:value>
+        </SAIplt:enum>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>egress-acl-stage-type</SAIplt:name>
+        <SAIplt:type>enumeration</SAIplt:type>
+        <SAIplt:description/>
+        <SAIplt:enum>
+          <SAIplt:name>disabled</SAIplt:name>
+          <SAIplt:description>Feature not enabled</SAIplt:description>
+          <SAIplt:value>0</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>EPCL0</SAIplt:name>
+          <SAIplt:description>Stage EPCL0</SAIplt:description>
+          <SAIplt:value>2</SAIplt:value>
+        </SAIplt:enum>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>feature-priority-type</SAIplt:name>
+        <SAIplt:type>uint32</SAIplt:type>
+        <SAIplt:description>Feature priority</SAIplt:description>
+        <SAIplt:min>2</SAIplt:min>
+        <SAIplt:max>15</SAIplt:max>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>hit-number-type</SAIplt:name>
+        <SAIplt:type>uint32</SAIplt:type>
+        <SAIplt:description>Hit/lookup number</SAIplt:description>
+        <SAIplt:min>0</SAIplt:min>
+        <SAIplt:max>3</SAIplt:max>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>asic-type</SAIplt:name>
+        <SAIplt:type>enumeration</SAIplt:type>
+        <SAIplt:description>ASIC Type</SAIplt:description>
+        <SAIplt:enum>
+          <SAIplt:name>ASIC_AC3X</SAIplt:name>
+          <SAIplt:description>AC3X</SAIplt:description>
+          <SAIplt:value>0</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>ASIC_AC5X</SAIplt:name>
+          <SAIplt:description>AC5X</SAIplt:description>
+          <SAIplt:value>1</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>ASIC_Falcon</SAIplt:name>
+          <SAIplt:description>FALCON</SAIplt:description>
+          <SAIplt:value>2</SAIplt:value>
+        </SAIplt:enum>
+      </SAIplt:typedef>
     </SAIplt:typedefs>
+    <SAIplt:ASIC_Type SAIplt:type="asic-type">ASIC_AC5X</SAIplt:ASIC_Type>
     <SAIplt:ASK-BOARD-Profile-Name SAIplt:type="string">ASK-Board-ac5x-rd-32x1G-16x2_5G-6x25G.xml</SAIplt:ASK-BOARD-Profile-Name>
-    <SAIplt:Features>
-      <SAIplt:RoCE SAIplt:type="boolean">false</SAIplt:RoCE>
-    </SAIplt:Features>
     <SAIplt:Ports>
       <SAIplt:port-list>
         <SAIplt:sai_port_id SAIplt:type="port-id-type">0</SAIplt:sai_port_id>
@@ -320,7 +432,7 @@
         <SAIplt:sdk_port_id SAIplt:type="port-id-type">53</SAIplt:sdk_port_id>
       </SAIplt:port-list>
     </SAIplt:Ports>
-    <SAIplt:Scaling>
+    <SAIplt:scalingAC5>
       <SAIplt:max_lag_members SAIplt:type="uint32">8</SAIplt:max_lag_members>
       <SAIplt:max_route_ipv4 SAIplt:type="uint32">0</SAIplt:max_route_ipv4>
       <SAIplt:max_route_ipv6 SAIplt:type="uint32">0</SAIplt:max_route_ipv6>
@@ -328,19 +440,61 @@
       <SAIplt:max_ipv4_tunnel SAIplt:type="uint32">8</SAIplt:max_ipv4_tunnel>
       <SAIplt:max_ipv6_tunnel SAIplt:type="uint32">8</SAIplt:max_ipv6_tunnel>
       <SAIplt:max_tti SAIplt:type="uint32">1024</SAIplt:max_tti>
-      <SAIplt:wred_size SAIplt:type="uint32">0</SAIplt:wred_size>
-      <SAIplt:max_nat SAIplt:type="uint32">0</SAIplt:max_nat>
-    </SAIplt:Scaling>
+    </SAIplt:scalingAC5>
     <SAIplt:Counters>
       <SAIplt:cnc-base-list>
         <SAIplt:counter-base SAIplt:type="uint32">0</SAIplt:counter-base>
       </SAIplt:cnc-base-list>
-      <SAIplt:cnc-base-list>
-        <SAIplt:counter-base SAIplt:type="uint32">2048</SAIplt:counter-base>
-      </SAIplt:cnc-base-list>
+      <SAIplt:router-in-drop-counter SAIplt:type="InDropCounter-type">IN_DROP_ANY</SAIplt:router-in-drop-counter>
     </SAIplt:Counters>
     <SAIplt:Logging>
       <SAIplt:log_dest SAIplt:type="logDest-type">SAI_LOG_SYSLOG</SAIplt:log_dest>
     </SAIplt:Logging>
+    <SAIplt:Features-using-acl>
+      <SAIplt:feature SAIplt:type="acl-feature-name-type">control-acl</SAIplt:feature>
+      <SAIplt:feature-priority SAIplt:type="feature-priority-type">3</SAIplt:feature-priority>
+      <SAIplt:Ingress>
+        <SAIplt:ingress-stage SAIplt:type="ingress-acl-stage-type">IPCL0</SAIplt:ingress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">1</SAIplt:hit-number>
+      </SAIplt:Ingress>
+      <SAIplt:Egress>
+        <SAIplt:egress-stage SAIplt:type="egress-acl-stage-type">EPCL0</SAIplt:egress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">0</SAIplt:hit-number>
+      </SAIplt:Egress>
+    </SAIplt:Features-using-acl>
+    <SAIplt:Features-using-acl>
+      <SAIplt:feature SAIplt:type="acl-feature-name-type">port-sFlow</SAIplt:feature>
+      <SAIplt:feature-priority SAIplt:type="feature-priority-type">4</SAIplt:feature-priority>
+      <SAIplt:Ingress>
+        <SAIplt:ingress-stage SAIplt:type="ingress-acl-stage-type">IPCL0</SAIplt:ingress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">0</SAIplt:hit-number>
+      </SAIplt:Ingress>
+      <SAIplt:Egress>
+        <SAIplt:egress-stage SAIplt:type="egress-acl-stage-type">EPCL0</SAIplt:egress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">0</SAIplt:hit-number>
+      </SAIplt:Egress>
+    </SAIplt:Features-using-acl>
+    <SAIplt:Features-using-acl>
+      <SAIplt:feature SAIplt:type="acl-feature-name-type">port-counters-ipv4-ipv6</SAIplt:feature>
+      <SAIplt:feature-priority SAIplt:type="feature-priority-type">5</SAIplt:feature-priority>
+      <SAIplt:Ingress>
+        <SAIplt:ingress-stage SAIplt:type="ingress-acl-stage-type">IPCL0</SAIplt:ingress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">3</SAIplt:hit-number>
+      </SAIplt:Ingress>
+      <SAIplt:Egress>
+        <SAIplt:egress-stage SAIplt:type="egress-acl-stage-type">EPCL0</SAIplt:egress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">0</SAIplt:hit-number>
+      </SAIplt:Egress>
+    </SAIplt:Features-using-acl>
+    <SAIplt:Features-using-acl>
+      <SAIplt:feature SAIplt:type="acl-feature-name-type">debug-counter-acl</SAIplt:feature>
+      <SAIplt:feature-priority SAIplt:type="feature-priority-type">2</SAIplt:feature-priority>
+      <SAIplt:Ingress>
+        <SAIplt:ingress-stage SAIplt:type="ingress-acl-stage-type">disabled</SAIplt:ingress-stage>
+      </SAIplt:Ingress>
+      <SAIplt:Egress>
+        <SAIplt:egress-stage SAIplt:type="egress-acl-stage-type">disabled</SAIplt:egress-stage>
+      </SAIplt:Egress>
+    </SAIplt:Features-using-acl>
   </SAIplt:SAI>
 </data>
\ No newline at end of file
diff --git a/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/ASK-Board-ac5x-rd-32x1G-16x2_5G-6x25G.md5 b/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/ASK-Board-ac5x-rd-32x1G-16x2_5G-6x25G.md5
index 433753d8f..7b8c7b490 100644
--- a/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/ASK-Board-ac5x-rd-32x1G-16x2_5G-6x25G.md5
+++ b/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/ASK-Board-ac5x-rd-32x1G-16x2_5G-6x25G.md5
@@ -1 +1 @@
-95f963f02f1cb808656fcb1f008aa36a
\ No newline at end of file
+69af36a9007f8c9e4d33ea6465cc6b89
\ No newline at end of file
diff --git a/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/ASK-Board-ac5x-rd-32x1G-16x2_5G-6x25G.xml b/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/ASK-Board-ac5x-rd-32x1G-16x2_5G-6x25G.xml
index 2c1bb27fb..7fd11122c 100644
--- a/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/ASK-Board-ac5x-rd-32x1G-16x2_5G-6x25G.xml
+++ b/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/ASK-Board-ac5x-rd-32x1G-16x2_5G-6x25G.xml
@@ -1,5 +1,5 @@
 <?xml version="1.0" encoding="utf-8"?>
-<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2023-05-05-1.04" profile="Askboard" dsig="md5">
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-02-19-1.06" profile="Askboard" sid="eb53f80b-5892-4f8b-9197-a6f626effaba">
   <askboardplt:ASK-Board xmlns:askboardplt="urn:marvell:askboard:yang">
     <askboardplt:typedefs>
       <askboardplt:typedef>
@@ -52,7 +52,7 @@
       <askboardplt:typedef>
         <askboardplt:name>board-pp-interface-channel-type</askboardplt:name>
         <askboardplt:type>enumeration</askboardplt:type>
-        <askboardplt:description>Specifies interface tunnel.</askboardplt:description>
+        <askboardplt:description>Specifies channel interface type.</askboardplt:description>
         <askboardplt:enum>
           <askboardplt:name>pci</askboardplt:name>
           <askboardplt:description>PCI</askboardplt:description>
@@ -64,27 +64,37 @@
           <askboardplt:value>1</askboardplt:value>
         </askboardplt:enum>
         <askboardplt:enum>
-          <askboardplt:name>pex</askboardplt:name>
-          <askboardplt:description>PEX</askboardplt:description>
-          <askboardplt:value>3</askboardplt:value>
+          <askboardplt:name>twsi</askboardplt:name>
+          <askboardplt:description>TWSI</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
         </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>board-pp-as-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies Address space type.</askboardplt:description>
         <askboardplt:enum>
-          <askboardplt:name>pex_eagle</askboardplt:name>
-          <askboardplt:description>PEX EAGLE</askboardplt:description>
-          <askboardplt:value>5</askboardplt:value>
+          <askboardplt:name>4_regions</askboardplt:name>
+          <askboardplt:description>address-space 4 regions</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
         </askboardplt:enum>
         <askboardplt:enum>
-          <askboardplt:name>pex_falcon_z</askboardplt:name>
-          <askboardplt:description>PEX FALCON Z</askboardplt:description>
-          <askboardplt:value>6</askboardplt:value>
+          <askboardplt:name>8_regions</askboardplt:name>
+          <askboardplt:description>address-space 8 regions</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>atu</askboardplt:name>
+          <askboardplt:description>address translation unit</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
         </askboardplt:enum>
       </askboardplt:typedef>
       <askboardplt:typedef>
         <askboardplt:name>device-id-type</askboardplt:name>
         <askboardplt:type>uint32</askboardplt:type>
-        <askboardplt:description>Device ID 0..1023</askboardplt:description>
+        <askboardplt:description>Device ID 0..1</askboardplt:description>
         <askboardplt:min>0</askboardplt:min>
-        <askboardplt:max>1023</askboardplt:max>
+        <askboardplt:max>1</askboardplt:max>
       </askboardplt:typedef>
       <askboardplt:typedef>
         <askboardplt:name>port-mapping-type</askboardplt:name>
@@ -111,11 +121,9 @@
       <askboardplt:typedef>
         <askboardplt:name>txq-port-number-type</askboardplt:name>
         <askboardplt:type>uint32</askboardplt:type>
-        <askboardplt:description>0 - 8 queues are configured per port (legacy mode),
-1...16 - the number of queues configured per port
-   	SIP 5 : Bobcat2,BobK:0..71 ;Bobcat3: 0..576 ;Aldrin2:0..99</askboardplt:description>
+        <askboardplt:description>TXq port number </askboardplt:description>
         <askboardplt:min>0</askboardplt:min>
-        <askboardplt:max>576</askboardplt:max>
+        <askboardplt:max>99</askboardplt:max>
       </askboardplt:typedef>
       <askboardplt:typedef>
         <askboardplt:name>phy-smi-interface-type</askboardplt:name>
@@ -162,12 +170,14 @@
         </askboardplt:enum>
         <askboardplt:enum>
           <askboardplt:name>alaska-88E3140</askboardplt:name>
-          <askboardplt:description>Specifies PHY identifier 88E3140, used for Copper with speeds of 100M/1G/10G. Uses with FW SolarFlare next generation.</askboardplt:description>
+          <askboardplt:description>Specifies PHY identifier 88E3140, used for Copper with speeds of 100M/1G/10G.
+Uses with FW SolarFlare next generation.</askboardplt:description>
           <askboardplt:value>5</askboardplt:value>
         </askboardplt:enum>
         <askboardplt:enum>
           <askboardplt:name>alaska-88E3240</askboardplt:name>
-          <askboardplt:description>Specifies PHY identifier 88E3240, used for Copper with speeds of 100M/1G/10G. Uses with FW, SolarFlare next generation.</askboardplt:description>
+          <askboardplt:description>Specifies PHY identifier 88E3240, used for Copper with speeds of 100M/1G/10G.
+Uses with FW, SolarFlare next generation.</askboardplt:description>
           <askboardplt:value>6</askboardplt:value>
         </askboardplt:enum>
         <askboardplt:enum>
@@ -177,7 +187,8 @@
         </askboardplt:enum>
         <askboardplt:enum>
           <askboardplt:name>alaska-88E3220</askboardplt:name>
-          <askboardplt:description>Specifies PHY identifier 88E3220, used for Combo port with speeds of 100M/1G/10G. Uses FW, SolarFlare next generation.</askboardplt:description>
+          <askboardplt:description>Specifies PHY identifier 88E3220, used for Combo port with speeds of 100M/1G/10G.
+Uses FW, SolarFlare next generation.</askboardplt:description>
           <askboardplt:value>8</askboardplt:value>
         </askboardplt:enum>
         <askboardplt:enum>
@@ -212,17 +223,20 @@
         </askboardplt:enum>
         <askboardplt:enum>
           <askboardplt:name>alaska-88E1780</askboardplt:name>
-          <askboardplt:description>Specifies PHY identifier 88E1780, Integrated Octal 10/100/1000 Mbps Energy Efficient Ethernet Transceiver</askboardplt:description>
+          <askboardplt:description>Specifies PHY identifier 88E1780, Integrated Octal 10/100/1000 Mbps Energy
+Efficient Ethernet Transceiver</askboardplt:description>
           <askboardplt:value>15</askboardplt:value>
         </askboardplt:enum>
         <askboardplt:enum>
           <askboardplt:name>alaska-88E2540</askboardplt:name>
-          <askboardplt:description>Specifies PHY identifier 88E2540, 4 ports 10/100/1000/2.5G/5GBASE-T Ethernet Transceiver with IEEE 1588v2 PTP Support</askboardplt:description>
+          <askboardplt:description>Specifies PHY identifier 88E2540, 4 ports 10/100/1000/2.5G/5GBASE-T Ethernet
+Transceiver with IEEE 1588v2 PTP Support</askboardplt:description>
           <askboardplt:value>16</askboardplt:value>
         </askboardplt:enum>
         <askboardplt:enum>
           <askboardplt:name>alaska-88E2580</askboardplt:name>
-          <askboardplt:description>Specifies PHY identifier 88E12580, Octal 10/100/1000/2.5G/5GBASE-T Ethernet Transceiver with IEEE 1588v2 PTP Support</askboardplt:description>
+          <askboardplt:description>Specifies PHY identifier 88E12580, Octal 10/100/1000/2.5G/5GBASE-T Ethernet Transceiver
+with IEEE 1588v2 PTP Support</askboardplt:description>
           <askboardplt:value>17</askboardplt:value>
         </askboardplt:enum>
       </askboardplt:typedef>
@@ -510,7 +524,7 @@
         <askboardplt:type>uint32</askboardplt:type>
         <askboardplt:description>serdes lane</askboardplt:description>
         <askboardplt:min>0</askboardplt:min>
-        <askboardplt:max>255</askboardplt:max>
+        <askboardplt:max>7</askboardplt:max>
       </askboardplt:typedef>
       <askboardplt:typedef>
         <askboardplt:name>cpu-type</askboardplt:name>
@@ -589,12 +603,12 @@ lowercase characters.</askboardplt:description>
         </askboardplt:enum>
         <askboardplt:enum>
           <askboardplt:name>sip5</askboardplt:name>
-          <askboardplt:description>SIP5: AC5, AC3x</askboardplt:description>
+          <askboardplt:description>SIP5: AC3x</askboardplt:description>
           <askboardplt:value>5</askboardplt:value>
         </askboardplt:enum>
         <askboardplt:enum>
           <askboardplt:name>sip6</askboardplt:name>
-          <askboardplt:description>SIP6: Falcon, AC5x, AC5P</askboardplt:description>
+          <askboardplt:description>SIP6: Falcon, AC5x</askboardplt:description>
           <askboardplt:value>6</askboardplt:value>
         </askboardplt:enum>
       </askboardplt:typedef>
@@ -665,13 +679,35 @@ lowercase characters.</askboardplt:description>
           <askboardplt:value>1</askboardplt:value>
         </askboardplt:enum>
       </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>asic-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>ASIC Type</askboardplt:description>
+        <askboardplt:enum>
+          <askboardplt:name>ASIC_AC3X</askboardplt:name>
+          <askboardplt:description>AC3X</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>ASIC_AC5X</askboardplt:name>
+          <askboardplt:description>AC5X</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>ASIC_Falcon</askboardplt:name>
+          <askboardplt:description>FALCON</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
+      </askboardplt:typedef>
     </askboardplt:typedefs>
+    <askboardplt:ASIC_Type askboardplt:type="asic-type">ASIC_AC5X</askboardplt:ASIC_Type>
     <askboardplt:boardName askboardplt:type="std-string">AC5X-RD-32x1G-16x2.5G-6x25G</askboardplt:boardName>
     <askboardplt:osCallType askboardplt:type="board-callback-type">linux-static</askboardplt:osCallType>
     <askboardplt:extDrvCallType askboardplt:type="board-callback-type">linux-static</askboardplt:extDrvCallType>
     <askboardplt:mapType askboardplt:type="board-pp-map-type">autoscan</askboardplt:mapType>
     <askboardplt:cpuType askboardplt:type="cpu-type">external</askboardplt:cpuType>
-    <askboardplt:mngInterfaceType askboardplt:type="board-pp-interface-channel-type">pex_eagle</askboardplt:mngInterfaceType>
+    <askboardplt:mngInterfaceType askboardplt:type="board-pp-interface-channel-type">pci</askboardplt:mngInterfaceType>
+    <askboardplt:adressSpaceType askboardplt:type="board-pp-as-type">atu</askboardplt:adressSpaceType>
     <askboardplt:device-list>
       <askboardplt:devNum askboardplt:type="device-id-type">0</askboardplt:devNum>
       <askboardplt:deviceId askboardplt:type="device-id-type">0</askboardplt:deviceId>
@@ -683,10 +719,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">1</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">0</askboardplt:phyNumber>
@@ -704,10 +738,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">0</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">0</askboardplt:phyNumber>
@@ -725,10 +757,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">3</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">0</askboardplt:phyNumber>
@@ -746,10 +776,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">2</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">0</askboardplt:phyNumber>
@@ -767,10 +795,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">5</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">0</askboardplt:phyNumber>
@@ -788,10 +814,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">4</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">0</askboardplt:phyNumber>
@@ -809,10 +833,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">7</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">0</askboardplt:phyNumber>
@@ -830,10 +852,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">6</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">0</askboardplt:phyNumber>
@@ -851,10 +871,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">9</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">1</askboardplt:phyNumber>
@@ -872,10 +890,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">8</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">1</askboardplt:phyNumber>
@@ -893,10 +909,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">11</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">1</askboardplt:phyNumber>
@@ -914,10 +928,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">10</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">1</askboardplt:phyNumber>
@@ -935,10 +947,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">13</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">1</askboardplt:phyNumber>
@@ -956,10 +966,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">12</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">1</askboardplt:phyNumber>
@@ -977,10 +985,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">15</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">1</askboardplt:phyNumber>
@@ -998,10 +1004,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">14</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">1</askboardplt:phyNumber>
@@ -1019,10 +1023,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">17</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">2</askboardplt:phyNumber>
@@ -1040,10 +1042,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">16</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">2</askboardplt:phyNumber>
@@ -1061,10 +1061,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">19</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">2</askboardplt:phyNumber>
@@ -1082,10 +1080,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">18</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">2</askboardplt:phyNumber>
@@ -1103,10 +1099,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">21</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">2</askboardplt:phyNumber>
@@ -1124,10 +1118,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">20</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">2</askboardplt:phyNumber>
@@ -1145,10 +1137,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">23</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">2</askboardplt:phyNumber>
@@ -1166,10 +1156,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">22</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">2</askboardplt:phyNumber>
@@ -1187,10 +1175,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">25</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">3</askboardplt:phyNumber>
@@ -1208,10 +1194,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">24</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">3</askboardplt:phyNumber>
@@ -1229,10 +1213,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">27</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">3</askboardplt:phyNumber>
@@ -1250,10 +1232,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">26</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">3</askboardplt:phyNumber>
@@ -1271,10 +1251,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">29</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">3</askboardplt:phyNumber>
@@ -1292,10 +1270,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">28</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">3</askboardplt:phyNumber>
@@ -1313,10 +1289,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">31</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">3</askboardplt:phyNumber>
@@ -1334,10 +1308,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">30</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">3</askboardplt:phyNumber>
@@ -1355,10 +1327,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">33</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E2580</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">4</askboardplt:phyNumber>
@@ -1376,10 +1346,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">46</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E2540</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">6</askboardplt:phyNumber>
@@ -1397,10 +1365,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">47</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E2540</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">6</askboardplt:phyNumber>
@@ -1418,10 +1384,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">44</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E2540</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">6</askboardplt:phyNumber>
@@ -1439,10 +1403,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">45</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E2540</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">6</askboardplt:phyNumber>
@@ -1460,10 +1422,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">42</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E2540</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">5</askboardplt:phyNumber>
@@ -1481,10 +1441,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">43</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E2540</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">5</askboardplt:phyNumber>
@@ -1502,10 +1460,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">40</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E2540</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">5</askboardplt:phyNumber>
@@ -1523,10 +1479,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">41</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E2540</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">5</askboardplt:phyNumber>
@@ -1544,10 +1498,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">38</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E2580</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">4</askboardplt:phyNumber>
@@ -1565,10 +1517,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">39</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E2580</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">4</askboardplt:phyNumber>
@@ -1586,10 +1536,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">36</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E2580</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">4</askboardplt:phyNumber>
@@ -1607,10 +1555,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">37</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E2580</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">4</askboardplt:phyNumber>
@@ -1628,10 +1574,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">34</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E2580</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">4</askboardplt:phyNumber>
@@ -1649,10 +1593,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">35</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E2580</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">4</askboardplt:phyNumber>
@@ -1670,10 +1612,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">32</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">alaska-88E2580</askboardplt:phyType>
           <askboardplt:phyNumber askboardplt:type="uint32">4</askboardplt:phyNumber>
@@ -1691,10 +1631,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">48</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
         </askboardplt:phy>
@@ -1713,10 +1651,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">49</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
         </askboardplt:phy>
@@ -1735,10 +1671,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">50</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
         </askboardplt:phy>
@@ -1757,10 +1691,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">51</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
         </askboardplt:phy>
@@ -1779,10 +1711,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">52</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
         </askboardplt:phy>
@@ -1801,10 +1731,8 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">ethernet_mac</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">53</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
         </askboardplt:phy>
@@ -1823,20 +1751,16 @@ lowercase characters.</askboardplt:description>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">cpu_sdma</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">54</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
       </askboardplt:portMap-list>
       <askboardplt:portMap-list>
         <askboardplt:portNumber askboardplt:type="physical-port-num-type">60</askboardplt:portNumber>
         <askboardplt:TXQueue>
           <askboardplt:mappingType askboardplt:type="port-mapping-type">cpu_sdma</askboardplt:mappingType>
           <askboardplt:interfaceNum askboardplt:type="interface-num-type">55</askboardplt:interfaceNum>
-          <askboardplt:txqPortNumber askboardplt:type="txq-port-number-type">0</askboardplt:txqPortNumber>
           <askboardplt:reservePreemptiveChannel askboardplt:type="boolean-type">false</askboardplt:reservePreemptiveChannel>
         </askboardplt:TXQueue>
-        <askboardplt:portCscd askboardplt:type="port-cscd-type">NETWORK</askboardplt:portCscd>
       </askboardplt:portMap-list>
       <askboardplt:Ledstream-interface-list>
         <askboardplt:ledstream-interface-number askboardplt:type="led-interface-type">0</askboardplt:ledstream-interface-number>
diff --git a/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/ASK-L1-AC5X-RD-32x1G-16x2_5G-6x25G.md5 b/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/ASK-L1-AC5X-RD-32x1G-16x2_5G-6x25G.md5
index 3a08897bf..f2cf3d5b6 100644
--- a/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/ASK-L1-AC5X-RD-32x1G-16x2_5G-6x25G.md5
+++ b/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/ASK-L1-AC5X-RD-32x1G-16x2_5G-6x25G.md5
@@ -1 +1 @@
-2876aaa02a47b5842e152ce794c50110
\ No newline at end of file
+85b49bcb9d399bcd1b8128a42caba2d2
\ No newline at end of file
diff --git a/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/ASK-L1-AC5X-RD-32x1G-16x2_5G-6x25G.xml b/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/ASK-L1-AC5X-RD-32x1G-16x2_5G-6x25G.xml
index 1d07f5994..980d4267b 100644
--- a/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/ASK-L1-AC5X-RD-32x1G-16x2_5G-6x25G.xml
+++ b/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/ASK-L1-AC5X-RD-32x1G-16x2_5G-6x25G.xml
@@ -1,5 +1,5 @@
 <?xml version="1.0" encoding="utf-8"?>
-<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2023-05-05-1.04" profile="Askl1" dsig="md5">
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-02-19-1.06" profile="Askl1" sid="71d3ab0f-3ac2-452a-a5c9-2dfdc969734a">
   <ASKL1plt:ASK-L1 xmlns:ASKL1plt="urn:marvell:ASKL1:yang">
     <ASKL1plt:typedefs>
       <ASKL1plt:typedef>
diff --git a/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/ASK-PP-AC5X-RD.md5 b/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/ASK-PP-AC5X-RD.md5
index de23afe95..c043a0d72 100644
--- a/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/ASK-PP-AC5X-RD.md5
+++ b/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/ASK-PP-AC5X-RD.md5
@@ -1 +1 @@
-b42f2a2be9da6c7752c0807f9dee48bf
\ No newline at end of file
+209426f8b550ddf85db19925f9f202a1
\ No newline at end of file
diff --git a/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/ASK-PP-AC5X-RD.xml b/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/ASK-PP-AC5X-RD.xml
index ad457fe7d..9e40492cf 100644
--- a/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/ASK-PP-AC5X-RD.xml
+++ b/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/ASK-PP-AC5X-RD.xml
@@ -1,5 +1,5 @@
 <?xml version="1.0" encoding="utf-8"?>
-<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2023-05-05-1.04" profile="Askpp" dsig="md5">
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-02-19-1.06" profile="Askpp" sid="34f1c14a-b581-422d-bd10-426dfac013dd">
   <askppplt:ASK-PP xmlns:askppplt="urn:marvell:askpp:yang">
     <askppplt:typedefs>
       <askppplt:typedef>
@@ -357,28 +357,28 @@
         <askppplt:enum>
           <askppplt:name>NATIVE</askppplt:name>
           <askppplt:description>NATIVE
-   	 *  the trunk members are filled
-   	 *  according to the order given by application.
-   	 *  Regular trunk may hold max of 8 members.
-   	 *  Cascade trunk may hold :
-   	 *  max of 64 members</askppplt:description>
+*  the trunk members are filled
+*  according to the order given by application.
+*  Regular trunk may hold max of 8 members.
+*  Cascade trunk may hold :
+*  max of 64 members</askppplt:description>
           <askppplt:value>0</askppplt:value>
         </askppplt:enum>
         <askppplt:enum>
           <askppplt:name>FLEX</askppplt:name>
           <askppplt:description>FLEX
-   	 *  A mode to allows flexibility for
-   	 *  each Regular trunk to state it's max number of members (before starting to add members).
-   	 *  (this mode not effect 'cascade trunk' members)
-   	 *  Regular trunk may hold : max of 4K members. (each trunk set it's own limit)
-   	 *  Cascade trunk may hold : max of 64 members.</askppplt:description>
+*  A mode to allows flexibility for
+*  each Regular trunk to state it's max number of members (before starting to add members).
+*  (this mode not effect 'cascade trunk' members)
+*  Regular trunk may hold : max of 4K members. (each trunk set it's own limit)
+*  Cascade trunk may hold : max of 64 members.</askppplt:description>
           <askppplt:value>2</askppplt:value>
         </askppplt:enum>
       </askppplt:typedef>
       <askppplt:typedef>
         <askppplt:name>number-physical-port-type</askppplt:name>
         <askppplt:type>enumeration</askppplt:type>
-        <askppplt:description>ac5x 128, falcon 64,128,256, 512, 1024</askppplt:description>
+        <askppplt:description>AC3X/AC5X 128, falcon 64, 128, 256, 512, 1024</askppplt:description>
         <askppplt:enum>
           <askppplt:name>no-ports</askppplt:name>
           <askppplt:description>no-ports</askppplt:description>
@@ -519,7 +519,28 @@
           <askppplt:value>1</askppplt:value>
         </askppplt:enum>
       </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>asic-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>ASIC Type</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>ASIC_AC3X</askppplt:name>
+          <askppplt:description>AC3X</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>ASIC_AC5X</askppplt:name>
+          <askppplt:description>AC5X</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>ASIC_Falcon</askppplt:name>
+          <askppplt:description>FALCON</askppplt:description>
+          <askppplt:value>2</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
     </askppplt:typedefs>
+    <askppplt:ASIC_Type askppplt:type="asic-type">ASIC_AC5X</askppplt:ASIC_Type>
     <askppplt:PPInit>
       <askppplt:PP-name askppplt:type="std-string">AC5X-RD</askppplt:PP-name>
       <askppplt:Phase1>
@@ -842,7 +863,6 @@
       <askppplt:LogicalInit>
         <askppplt:routingMode askppplt:type="routing-mode-type">TCAM_ROUTER_BASED</askppplt:routingMode>
         <askppplt:maxNumOfPbrEntries askppplt:type="uint32">0</askppplt:maxNumOfPbrEntries>
-        <askppplt:sharedTableMode askppplt:type="shared-table-mode-type">MID_L3_MID_L2_NO_EM</askppplt:sharedTableMode>
         <askppplt:ingressDropEnable askppplt:type="boolean-type">true</askppplt:ingressDropEnable>
       </askppplt:LogicalInit>
       <askppplt:LibInit>
diff --git a/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/SAI-AC5X-RD-32x1G-16x2_5G-6x25G.md5 b/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/SAI-AC5X-RD-32x1G-16x2_5G-6x25G.md5
index bd88f03a2..41cd16295 100644
--- a/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/SAI-AC5X-RD-32x1G-16x2_5G-6x25G.md5
+++ b/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/SAI-AC5X-RD-32x1G-16x2_5G-6x25G.md5
@@ -1 +1 @@
-079a2fcdb8fe1d1f0cf39e3c40e6dd36
\ No newline at end of file
+fec8b7884a940c38451ef84be6fdbb24
\ No newline at end of file
diff --git a/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/SAI-AC5X-RD-32x1G-16x2_5G-6x25G.xml b/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/SAI-AC5X-RD-32x1G-16x2_5G-6x25G.xml
index f71d485bb..bbedd396d 100644
--- a/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/SAI-AC5X-RD-32x1G-16x2_5G-6x25G.xml
+++ b/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/SAI-AC5X-RD-32x1G-16x2_5G-6x25G.xml
@@ -1,13 +1,13 @@
 <?xml version="1.0" encoding="utf-8"?>
-<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2023-05-05-1.04" profile="SAI" dsig="md5">
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-02-19-1.06" profile="SAI" sid="c310bbb1-ffca-4c99-9bae-f7d4caff5941">
   <SAIplt:SAI xmlns:SAIplt="urn:marvell:SAI:yang">
     <SAIplt:typedefs>
       <SAIplt:typedef>
         <SAIplt:name>device-id-type</SAIplt:name>
         <SAIplt:type>uint32</SAIplt:type>
-        <SAIplt:description>Device ID 0..1023</SAIplt:description>
+        <SAIplt:description>Device ID 0..1</SAIplt:description>
         <SAIplt:min>0</SAIplt:min>
-        <SAIplt:max>1023</SAIplt:max>
+        <SAIplt:max>1</SAIplt:max>
       </SAIplt:typedef>
       <SAIplt:typedef>
         <SAIplt:name>port-id-type</SAIplt:name>
@@ -22,7 +22,7 @@
         <SAIplt:description>Logging Feature Options</SAIplt:description>
         <SAIplt:enum>
           <SAIplt:name>SAI_LOG_SYSLOG</SAIplt:name>
-          <SAIplt:description>SYSLOG               {Syslog service should be running to use this option}</SAIplt:description>
+          <SAIplt:description>SYSLOG  {Syslog service should be running to use this option}</SAIplt:description>
           <SAIplt:value>0</SAIplt:value>
         </SAIplt:enum>
         <SAIplt:enum>
@@ -32,7 +32,27 @@
         </SAIplt:enum>
         <SAIplt:enum>
           <SAIplt:name>SAI_LOG_FILE</SAIplt:name>
-          <SAIplt:description>FILE                       {Warning !!! Use with caution. Can cause disk full issues}</SAIplt:description>
+          <SAIplt:description>FILE  {Warning !!! Use with caution. Can cause disk full issues}</SAIplt:description>
+          <SAIplt:value>2</SAIplt:value>
+        </SAIplt:enum>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>InDropCounter-type</SAIplt:name>
+        <SAIplt:type>enumeration</SAIplt:type>
+        <SAIplt:description>Router In Drop Reason Feature Options</SAIplt:description>
+        <SAIplt:enum>
+          <SAIplt:name>TTL_HOPLIMIT_EXCEEDED</SAIplt:name>
+          <SAIplt:description>Router In Drop Counters track TTL &amp; Hop Limit Exceeded Packets</SAIplt:description>
+          <SAIplt:value>0</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>ROUTE_BLACKHOLE</SAIplt:name>
+          <SAIplt:description>Router In Drop Counters track Route Black Hole Packets</SAIplt:description>
+          <SAIplt:value>1</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>IN_DROP_ANY</SAIplt:name>
+          <SAIplt:description>Router In Drop Counters track either TTL &amp; Hop Limit Exceeded or Route Black Hole Packets</SAIplt:description>
           <SAIplt:value>2</SAIplt:value>
         </SAIplt:enum>
       </SAIplt:typedef>
@@ -43,11 +63,103 @@
         <SAIplt:min>2</SAIplt:min>
         <SAIplt:max>30</SAIplt:max>
       </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>acl-feature-name-type</SAIplt:name>
+        <SAIplt:type>enumeration</SAIplt:type>
+        <SAIplt:description/>
+        <SAIplt:enum>
+          <SAIplt:name>port-sFlow</SAIplt:name>
+          <SAIplt:description>SFlow over Port</SAIplt:description>
+          <SAIplt:value>0</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>port-counters-ipv4-ipv6</SAIplt:name>
+          <SAIplt:description>Port ipv4/ipv6 counters</SAIplt:description>
+          <SAIplt:value>1</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>control-acl</SAIplt:name>
+          <SAIplt:description>ACLs for control packet handling</SAIplt:description>
+          <SAIplt:value>2</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>debug-counter-acl</SAIplt:name>
+          <SAIplt:description>ACLs for Debug Counters</SAIplt:description>
+          <SAIplt:value>3</SAIplt:value>
+        </SAIplt:enum>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>ingress-acl-stage-type</SAIplt:name>
+        <SAIplt:type>enumeration</SAIplt:type>
+        <SAIplt:description/>
+        <SAIplt:enum>
+          <SAIplt:name>disabled</SAIplt:name>
+          <SAIplt:description>Feature not enabled</SAIplt:description>
+          <SAIplt:value>0</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>IPCL0</SAIplt:name>
+          <SAIplt:description>Stage IPCL0</SAIplt:description>
+          <SAIplt:value>1</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>IPCL1</SAIplt:name>
+          <SAIplt:description>Stage IPCL1</SAIplt:description>
+          <SAIplt:value>2</SAIplt:value>
+        </SAIplt:enum>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>egress-acl-stage-type</SAIplt:name>
+        <SAIplt:type>enumeration</SAIplt:type>
+        <SAIplt:description/>
+        <SAIplt:enum>
+          <SAIplt:name>disabled</SAIplt:name>
+          <SAIplt:description>Feature not enabled</SAIplt:description>
+          <SAIplt:value>0</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>EPCL0</SAIplt:name>
+          <SAIplt:description>Stage EPCL0</SAIplt:description>
+          <SAIplt:value>2</SAIplt:value>
+        </SAIplt:enum>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>feature-priority-type</SAIplt:name>
+        <SAIplt:type>uint32</SAIplt:type>
+        <SAIplt:description>Feature priority</SAIplt:description>
+        <SAIplt:min>2</SAIplt:min>
+        <SAIplt:max>15</SAIplt:max>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>hit-number-type</SAIplt:name>
+        <SAIplt:type>uint32</SAIplt:type>
+        <SAIplt:description>Hit/lookup number</SAIplt:description>
+        <SAIplt:min>0</SAIplt:min>
+        <SAIplt:max>3</SAIplt:max>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>asic-type</SAIplt:name>
+        <SAIplt:type>enumeration</SAIplt:type>
+        <SAIplt:description>ASIC Type</SAIplt:description>
+        <SAIplt:enum>
+          <SAIplt:name>ASIC_AC3X</SAIplt:name>
+          <SAIplt:description>AC3X</SAIplt:description>
+          <SAIplt:value>0</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>ASIC_AC5X</SAIplt:name>
+          <SAIplt:description>AC5X</SAIplt:description>
+          <SAIplt:value>1</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>ASIC_Falcon</SAIplt:name>
+          <SAIplt:description>FALCON</SAIplt:description>
+          <SAIplt:value>2</SAIplt:value>
+        </SAIplt:enum>
+      </SAIplt:typedef>
     </SAIplt:typedefs>
+    <SAIplt:ASIC_Type SAIplt:type="asic-type">ASIC_AC5X</SAIplt:ASIC_Type>
     <SAIplt:ASK-BOARD-Profile-Name SAIplt:type="string">ASK-Board-ac5x-rd-32x1G-16x2_5G-6x25G.xml</SAIplt:ASK-BOARD-Profile-Name>
-    <SAIplt:Features>
-      <SAIplt:RoCE SAIplt:type="boolean">false</SAIplt:RoCE>
-    </SAIplt:Features>
     <SAIplt:Ports>
       <SAIplt:port-list>
         <SAIplt:sai_port_id SAIplt:type="port-id-type">0</SAIplt:sai_port_id>
@@ -320,7 +432,7 @@
         <SAIplt:sdk_port_id SAIplt:type="port-id-type">53</SAIplt:sdk_port_id>
       </SAIplt:port-list>
     </SAIplt:Ports>
-    <SAIplt:Scaling>
+    <SAIplt:scalingAC5>
       <SAIplt:max_lag_members SAIplt:type="uint32">8</SAIplt:max_lag_members>
       <SAIplt:max_route_ipv4 SAIplt:type="uint32">0</SAIplt:max_route_ipv4>
       <SAIplt:max_route_ipv6 SAIplt:type="uint32">0</SAIplt:max_route_ipv6>
@@ -328,19 +440,61 @@
       <SAIplt:max_ipv4_tunnel SAIplt:type="uint32">8</SAIplt:max_ipv4_tunnel>
       <SAIplt:max_ipv6_tunnel SAIplt:type="uint32">8</SAIplt:max_ipv6_tunnel>
       <SAIplt:max_tti SAIplt:type="uint32">1024</SAIplt:max_tti>
-      <SAIplt:wred_size SAIplt:type="uint32">0</SAIplt:wred_size>
-      <SAIplt:max_nat SAIplt:type="uint32">0</SAIplt:max_nat>
-    </SAIplt:Scaling>
+    </SAIplt:scalingAC5>
     <SAIplt:Counters>
       <SAIplt:cnc-base-list>
         <SAIplt:counter-base SAIplt:type="uint32">0</SAIplt:counter-base>
       </SAIplt:cnc-base-list>
-      <SAIplt:cnc-base-list>
-        <SAIplt:counter-base SAIplt:type="uint32">2048</SAIplt:counter-base>
-      </SAIplt:cnc-base-list>
+      <SAIplt:router-in-drop-counter SAIplt:type="InDropCounter-type">IN_DROP_ANY</SAIplt:router-in-drop-counter>
     </SAIplt:Counters>
     <SAIplt:Logging>
       <SAIplt:log_dest SAIplt:type="logDest-type">SAI_LOG_SYSLOG</SAIplt:log_dest>
     </SAIplt:Logging>
+    <SAIplt:Features-using-acl>
+      <SAIplt:feature SAIplt:type="acl-feature-name-type">control-acl</SAIplt:feature>
+      <SAIplt:feature-priority SAIplt:type="feature-priority-type">3</SAIplt:feature-priority>
+      <SAIplt:Ingress>
+        <SAIplt:ingress-stage SAIplt:type="ingress-acl-stage-type">IPCL0</SAIplt:ingress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">1</SAIplt:hit-number>
+      </SAIplt:Ingress>
+      <SAIplt:Egress>
+        <SAIplt:egress-stage SAIplt:type="egress-acl-stage-type">EPCL0</SAIplt:egress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">0</SAIplt:hit-number>
+      </SAIplt:Egress>
+    </SAIplt:Features-using-acl>
+    <SAIplt:Features-using-acl>
+      <SAIplt:feature SAIplt:type="acl-feature-name-type">port-sFlow</SAIplt:feature>
+      <SAIplt:feature-priority SAIplt:type="feature-priority-type">4</SAIplt:feature-priority>
+      <SAIplt:Ingress>
+        <SAIplt:ingress-stage SAIplt:type="ingress-acl-stage-type">IPCL0</SAIplt:ingress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">0</SAIplt:hit-number>
+      </SAIplt:Ingress>
+      <SAIplt:Egress>
+        <SAIplt:egress-stage SAIplt:type="egress-acl-stage-type">EPCL0</SAIplt:egress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">0</SAIplt:hit-number>
+      </SAIplt:Egress>
+    </SAIplt:Features-using-acl>
+    <SAIplt:Features-using-acl>
+      <SAIplt:feature SAIplt:type="acl-feature-name-type">port-counters-ipv4-ipv6</SAIplt:feature>
+      <SAIplt:feature-priority SAIplt:type="feature-priority-type">5</SAIplt:feature-priority>
+      <SAIplt:Ingress>
+        <SAIplt:ingress-stage SAIplt:type="ingress-acl-stage-type">IPCL0</SAIplt:ingress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">3</SAIplt:hit-number>
+      </SAIplt:Ingress>
+      <SAIplt:Egress>
+        <SAIplt:egress-stage SAIplt:type="egress-acl-stage-type">EPCL0</SAIplt:egress-stage>
+        <SAIplt:hit-number SAIplt:type="hit-number-type">0</SAIplt:hit-number>
+      </SAIplt:Egress>
+    </SAIplt:Features-using-acl>
+    <SAIplt:Features-using-acl>
+      <SAIplt:feature SAIplt:type="acl-feature-name-type">debug-counter-acl</SAIplt:feature>
+      <SAIplt:feature-priority SAIplt:type="feature-priority-type">2</SAIplt:feature-priority>
+      <SAIplt:Ingress>
+        <SAIplt:ingress-stage SAIplt:type="ingress-acl-stage-type">disabled</SAIplt:ingress-stage>
+      </SAIplt:Ingress>
+      <SAIplt:Egress>
+        <SAIplt:egress-stage SAIplt:type="egress-acl-stage-type">disabled</SAIplt:egress-stage>
+      </SAIplt:Egress>
+    </SAIplt:Features-using-acl>
   </SAIplt:SAI>
 </data>
\ No newline at end of file

From 07cd4fff2900f1202f91ada2f9404903fec6f36a Mon Sep 17 00:00:00 2001
From: jingwenxie <jingwenxie@microsoft.com>
Date: Tue, 14 May 2024 08:08:11 +0800
Subject: [PATCH 0577/1115] [YANG] Align to authentication check with
 load_minigraph to cover more scenarios (#18908)

#### Why I did it
This will cover more cases for those only have authentication enabled with tacacs but not authorization enabled. Also, make it algin with the check in load_minigraph
#### How I did it
Change to authentication
#### How to verify it
unit test
---
 .../tests/yang_model_tests/tests/aaa.json              | 10 +++++-----
 .../tests/yang_model_tests/tests_config/aaa.json       | 10 +++++-----
 .../yang-models/sonic-system-aaa.yang                  |  4 ++--
 3 files changed, 12 insertions(+), 12 deletions(-)

diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/aaa.json b/src/sonic-yang-models/tests/yang_model_tests/tests/aaa.json
index e1cf51385..9b02a303e 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests/aaa.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests/aaa.json
@@ -15,12 +15,12 @@
         "eStrKey": "Pattern",
         "eStr": ["false|true|False|True"]
     },
-    "AAA_AUTHORIZATION_TEST": {
-        "desc": "Configure an authorization type in AAA table."
+    "AAA_AUTHENTICATION_TEST": {
+        "desc": "Configure an authentication type in AAA table."
     },
-    "AAA_AUTHORIZATION_TEST_TACACS_WITHOUT_TACPLUS": {
-        "desc": "Configure tacacs in authorization type in AAA table without TACPLUS table.",
-        "eStr": ["Authorization with 'tacacs+' is not allowed when passkey not exists."]
+    "AAA_AUTHENTICATION_TEST_TACACS_WITHOUT_TACPLUS": {
+        "desc": "Configure tacacs in authentication type in AAA table without TACPLUS table.",
+        "eStr": ["Authentication with 'tacacs+' is not allowed when passkey not exists."]
     },
     "AAA_ACCOUNTING_TEST": {
         "desc": "Configure an accounting type in AAA table."
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/aaa.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/aaa.json
index 0be9b4b1f..ec7f4e961 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/aaa.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/aaa.json
@@ -4,7 +4,7 @@
             "sonic-system-aaa:AAA": {
                 "AAA_LIST": [{
                         "type": "authentication",
-                        "login": "tacacs+,local",
+                        "login": "local",
                         "failthrough": "True",
                         "fallback": "True",
                         "trace": "True",
@@ -45,11 +45,11 @@
         }
     },
 
-    "AAA_AUTHORIZATION_TEST": {
+    "AAA_AUTHENTICATION_TEST": {
         "sonic-system-aaa:sonic-system-aaa": {
             "sonic-system-aaa:AAA": {
                 "AAA_LIST": [{
-                        "type": "authorization",
+                        "type": "authentication",
                         "login": "tacacs+"
                 }]
             }
@@ -64,11 +64,11 @@
         }
     },
 
-    "AAA_AUTHORIZATION_TEST_TACACS_WITHOUT_TACPLUS": {
+    "AAA_AUTHENTICATION_TEST_TACACS_WITHOUT_TACPLUS": {
         "sonic-system-aaa:sonic-system-aaa": {
             "sonic-system-aaa:AAA": {
                 "AAA_LIST": [{
-                        "type": "authorization",
+                        "type": "authentication",
                         "login": "tacacs+"
                 }]
             }
diff --git a/src/sonic-yang-models/yang-models/sonic-system-aaa.yang b/src/sonic-yang-models/yang-models/sonic-system-aaa.yang
index 61fc9ab61..360ff9195 100644
--- a/src/sonic-yang-models/yang-models/sonic-system-aaa.yang
+++ b/src/sonic-yang-models/yang-models/sonic-system-aaa.yang
@@ -43,8 +43,8 @@ module sonic-system-aaa {
                     default "local";
                 }
 
-                must 'not(./type = "authorization" and contains(./login, "tacacs+") and not(/tacacs:sonic-system-tacacs/tacacs:TACPLUS/tacacs:global/tacacs:passkey))' {
-                    error-message "Authorization with 'tacacs+' is not allowed when passkey not exists.";
+                must 'not(./type = "authentication" and contains(./login, "tacacs+") and not(/tacacs:sonic-system-tacacs/tacacs:TACPLUS/tacacs:global/tacacs:passkey))' {
+                    error-message "Authentication with 'tacacs+' is not allowed when passkey not exists.";
                 }
 
                 leaf failthrough {

From 1627c5cef4bc73f5d48dd97f68c4110ac838aa13 Mon Sep 17 00:00:00 2001
From: Zain Budhwani <99770260+zbud-msft@users.noreply.github.com>
Date: Tue, 14 May 2024 18:08:14 -0700
Subject: [PATCH 0578/1115] [eventd]: Close rsyslog plugin when rsyslog SIGTERM
 and EOF is sent to stream (#18835)

Fix #18771

Microsoft ADO (number only):27882794

How I did it

Add signalOnClose for omprog as well as close rsyslog plugin when receives an EOF.

How to verify it

Verify rsyslog_plugin is running inside bgp or swss container

Run docker exec -it bgp supervisorctl restart rsyslogd

Before change:

This will not kill current rsyslog_plugin process but instead rsyslogd will now break off its end of writing to cin and send EOF to rsyslog_plugin, however will not send a signal SIGTERM or SIGKILL to rsyslog_plugin. Therefore, rsyslog plugin will run in an infinite loop forever, constantly calling getline raising CPU to 100% inside docker.

After change of adding signalOnClose="on" to conf file inside omprog, rsyslogd will now send SIGTERM to rsyslog_plugin process running inside container, and rsyslog_plugin will die.

? ( ): rsyslog_plugin/578637 ... [continued]: read()) = -1 (unknown) (INTERNAL ERROR: strerror_r(512, [buf], 128)=22)

UT (will add sonic-mgmt testcase for storming events with logs)

RCA:

1. When rsyslogd is terminated, no signal is sent to child process of rsyslog_plugin meaning that rsyslog_plugin will be constantly trying to read from cin with no writer on the other end of the pipe. This leads to rsyslog_plugin process will constantly be reading via getline infinitely.

2. Because rsyslog is terminated and the spawned rsyslog_plugin is still alive, when rsyslog starts backup again, and log is triggered, a new rsyslog_plugin will be spawned for that rsyslog process, which can lead to many "ghost" rsyslog_plugin processes that will be at high CPU usage.
---
 files/build_templates/rsyslog_plugin.conf.j2  |  1 +
 .../rsyslog_plugin/rsyslog_plugin.cpp         | 27 ++++++++++---------
 .../rsyslog_plugin/rsyslog_plugin.h           |  8 ++++++
 .../rsyslog_plugin_ut.cpp                     | 26 ++++++++++++++++++
 4 files changed, 50 insertions(+), 12 deletions(-)

diff --git a/files/build_templates/rsyslog_plugin.conf.j2 b/files/build_templates/rsyslog_plugin.conf.j2
index 4628bea70..56ec0f71d 100644
--- a/files/build_templates/rsyslog_plugin.conf.j2
+++ b/files/build_templates/rsyslog_plugin.conf.j2
@@ -12,6 +12,7 @@ if re_match($programname, "{{ proc.name }}") then {
     action(type="omprog"
         binary="/usr/bin/rsyslog_plugin -r /etc/rsyslog.d/{{ proc.parse_json }} -m {{ yang_module }}"
         output="/var/log/rsyslog_plugin.log"
+        signalOnClose="on"
         template="prog_msg")
 }
 {% endfor %}
diff --git a/src/sonic-eventd/rsyslog_plugin/rsyslog_plugin.cpp b/src/sonic-eventd/rsyslog_plugin/rsyslog_plugin.cpp
index 6df0a73b0..52a70fd18 100644
--- a/src/sonic-eventd/rsyslog_plugin/rsyslog_plugin.cpp
+++ b/src/sonic-eventd/rsyslog_plugin/rsyslog_plugin.cpp
@@ -9,6 +9,8 @@
 
 using json = nlohmann::json;
 
+bool RsyslogPlugin::g_running;
+
 bool RsyslogPlugin::onMessage(string msg, lua_State* luaState) {
     string tag;
     event_params_t paramDict;
@@ -30,18 +32,18 @@ void parseParams(vector<string> params, vector<EventParam>& eventParams) {
         if(params[i].empty()) {
             SWSS_LOG_ERROR("Empty param provided in regex file\n");
             continue;
-       	}
+        }
         EventParam ep = EventParam();
         auto delimPos = params[i].find(':');
         if(delimPos == string::npos) { // no lua code
             ep.paramName = params[i];
         } else {
             ep.paramName = params[i].substr(0, delimPos);
-	    ep.luaCode = params[i].substr(delimPos + 1);
+            ep.luaCode = params[i].substr(delimPos + 1);
             if(ep.luaCode.empty()) {
                 SWSS_LOG_ERROR("Lua code missing after :\n");
             }
-	}
+        }
         eventParams.push_back(ep);
     }
 }
@@ -71,11 +73,11 @@ bool RsyslogPlugin::createRegexList() {
         vector<EventParam> eventParams;
         try {
             string eventRegex = jsonList[i]["regex"];
-	    regexString = timestampRegex + eventRegex;
+            regexString = timestampRegex + eventRegex;
             string tag = jsonList[i]["tag"];
             vector<string> params = jsonList[i]["params"];
-	    vector<string> timestampParams = { "month", "day", "time" };
-	    params.insert(params.begin(), timestampParams.begin(), timestampParams.end());
+            vector<string> timestampParams = { "month", "day", "time" };
+            params.insert(params.begin(), timestampParams.begin(), timestampParams.end());
             regex expr(regexString);
             expression = expr;
             parseParams(params, eventParams);
@@ -83,13 +85,13 @@ bool RsyslogPlugin::createRegexList() {
             rs.tag = tag;
             rs.regexExpression = expression;
             regexList.push_back(rs);
-	} catch (nlohmann::detail::type_error& deException) {
+        } catch (nlohmann::detail::type_error& deException) {
             SWSS_LOG_ERROR("Missing required key, throws exception: %s\n", deException.what());
             return false;
         } catch (regex_error& reException) {
             SWSS_LOG_ERROR("Invalid regex, throws exception: %s\n", reException.what());
-	    return false;
-	}
+            return false;
+        }
     }
 
     if(regexList.empty()) {
@@ -104,11 +106,11 @@ bool RsyslogPlugin::createRegexList() {
 }
 
 void RsyslogPlugin::run() {
+    signal(SIGTERM, RsyslogPlugin::signalHandler);
     lua_State* luaState = luaL_newstate();
     luaL_openlibs(luaState);
-    while(true) {
-        string line;
-        getline(cin, line);
+    string line;
+    while(RsyslogPlugin::g_running && getline(cin, line)) {
         if(line.empty()) {
             continue;
         }
@@ -132,4 +134,5 @@ RsyslogPlugin::RsyslogPlugin(string moduleName, string regexPath) {
     m_parser = unique_ptr<SyslogParser>(new SyslogParser());
     m_moduleName = moduleName;
     m_regexPath = regexPath;
+    RsyslogPlugin::g_running = true;
 }
diff --git a/src/sonic-eventd/rsyslog_plugin/rsyslog_plugin.h b/src/sonic-eventd/rsyslog_plugin/rsyslog_plugin.h
index 0811b5f30..ae6c9baf9 100644
--- a/src/sonic-eventd/rsyslog_plugin/rsyslog_plugin.h
+++ b/src/sonic-eventd/rsyslog_plugin/rsyslog_plugin.h
@@ -9,6 +9,7 @@ extern "C"
 }
 #include <string>
 #include <memory>
+#include <csignal>
 #include "syslog_parser.h"
 #include "events.h"
 #include "logger.h"
@@ -24,10 +25,17 @@ using namespace swss;
 
 class RsyslogPlugin {
 public:
+    static bool g_running;
     int onInit();
     bool onMessage(string msg, lua_State* luaState);
     void run();
     RsyslogPlugin(string moduleName, string regexPath);
+    static void signalHandler(int signum) {
+        if (signum == SIGTERM) {
+            SWSS_LOG_INFO("Rsyslog plugin received SIGTERM, shutting down");
+	    RsyslogPlugin::g_running = false;
+        }
+    }
 private:
     unique_ptr<SyslogParser> m_parser;
     event_handle_t m_eventHandle;
diff --git a/src/sonic-eventd/rsyslog_plugin_tests/rsyslog_plugin_ut.cpp b/src/sonic-eventd/rsyslog_plugin_tests/rsyslog_plugin_ut.cpp
index 5ff41d11d..aafd35700 100644
--- a/src/sonic-eventd/rsyslog_plugin_tests/rsyslog_plugin_ut.cpp
+++ b/src/sonic-eventd/rsyslog_plugin_tests/rsyslog_plugin_ut.cpp
@@ -8,6 +8,7 @@ extern "C"
 #include <fstream>
 #include <memory>
 #include <regex>
+#include <thread>
 #include "gtest/gtest.h"
 #include <nlohmann/json.hpp>
 #include "events.h"
@@ -253,6 +254,31 @@ TEST(rsyslog_plugin, onMessage_noParams) {
     infile.close();
 }
 
+TEST(rsyslog_plugin, run) {
+    unique_ptr<RsyslogPlugin> plugin(new RsyslogPlugin("test_mod_name", "./rsyslog_plugin_tests/test_regex_5.rc.json"));
+    EXPECT_EQ(0, plugin->onInit());
+    istringstream ss("");
+    streambuf* cinbuf = cin.rdbuf();
+    cin.rdbuf(ss.rdbuf());
+    plugin->run();
+    cin.rdbuf(cinbuf);
+}
+
+TEST(rsyslog_plugin, run_SIGTERM) {
+    unique_ptr<RsyslogPlugin> plugin(new RsyslogPlugin("test_mod_name", "./rsyslog_plugin_tests/test_regex_5.rc.json"));
+    EXPECT_EQ(0, plugin->onInit());
+    EXPECT_TRUE(RsyslogPlugin::g_running);
+    thread pluginThread([&]() {
+        plugin->run();
+    });
+
+    RsyslogPlugin::signalHandler(SIGTERM);
+
+    pluginThread.join();
+
+    EXPECT_FALSE(RsyslogPlugin::g_running);
+}
+
 TEST(timestampFormatter, changeTimestampFormat) {
     unique_ptr<TimestampFormatter> formatter(new TimestampFormatter());
 

From a480f8dc0e99702471c3c97fbca8d782b8ac55ac Mon Sep 17 00:00:00 2001
From: Senthil Kumar Guruswamy <75792349+sg893052@users.noreply.github.com>
Date: Wed, 15 May 2024 06:52:18 +0530
Subject: [PATCH 0579/1115] Third Party Container Management Support in Sonic
 App Extension (#14917)

---
 files/build_templates/default_manifest        | 60 +++++++++++++++++++
 .../build_templates/sonic_debian_extension.j2 |  5 ++
 2 files changed, 65 insertions(+)
 create mode 100644 files/build_templates/default_manifest

diff --git a/files/build_templates/default_manifest b/files/build_templates/default_manifest
new file mode 100644
index 000000000..f6821b4ef
--- /dev/null
+++ b/files/build_templates/default_manifest
@@ -0,0 +1,60 @@
+{
+    "version": "1.0.0",
+    "package": {
+        "version": "1.0.0",
+        "name": "default_manifest",
+        "description": "",
+        "base-os": {},
+        "depends": [],
+        "breaks": [],
+        "init-cfg": {},
+        "changelog": {},
+        "debug-dump": ""
+    },
+    "service": {
+        "name": "default_manifest",
+        "requires": [],
+        "requisite": [],
+        "wanted-by": [],
+        "after": [],
+        "before": [],
+        "dependent": [],
+        "dependent-of": [],
+        "post-start-action": "",
+        "pre-shutdown-action": "",
+        "asic-service": false,
+        "host-service": true,
+        "delayed": false,
+        "check_up_status": false,
+        "warm-shutdown": {
+            "after": [],
+            "before": []
+        },
+        "fast-shutdown": {
+            "after": [],
+            "before": []
+        },
+        "syslog": {
+            "support-rate-limit": false
+        }
+    },
+    "container": {
+        "privileged": false,
+        "entrypoint": "",
+        "volumes": [],
+        "mounts": [],
+        "environment": {},
+        "tmpfs": []
+    },
+    "processes": [],
+    "cli": {
+        "mandatory": false,
+        "show": [],
+        "config": [],
+        "clear": [],
+        "auto-generate-show": false,
+        "auto-generate-config": false,
+        "auto-generate-show-source-yang-modules": [],
+        "auto-generate-config-source-yang-modules": []
+    }
+}
diff --git a/files/build_templates/sonic_debian_extension.j2 b/files/build_templates/sonic_debian_extension.j2
index 2889b2469..d30e85c26 100644
--- a/files/build_templates/sonic_debian_extension.j2
+++ b/files/build_templates/sonic_debian_extension.j2
@@ -845,6 +845,11 @@ if [ "${PIPESTATUS[0]}" != "0" ]; then
     exit 1
 fi
 
+#Copy the default manifest file to SONIC_PACKAGE_MANAGER_FOLDER directly
+sudo cp $BUILD_TEMPLATES/default_manifest $FILESYSTEM_ROOT/$SONIC_PACKAGE_MANAGER_FOLDER/default_manifest
+#Create a new manifests subdirectory under SONIC_PACKAGE_MANAGER_FOLDER for all the user created custom manifests
+sudo mkdir -p $FILESYSTEM_ROOT/$SONIC_PACKAGE_MANAGER_FOLDER/manifests
+
 # Copy docker_image_ctl.j2 for SONiC Package Manager
 sudo cp $BUILD_TEMPLATES/docker_image_ctl.j2 $FILESYSTEM_ROOT_USR_SHARE_SONIC_TEMPLATES/docker_image_ctl.j2
 

From 166a9fba0672757a2ed4e17b0aab5709b0e6da02 Mon Sep 17 00:00:00 2001
From: Xincun Li <147451452+xincunli-sonic@users.noreply.github.com>
Date: Tue, 14 May 2024 22:49:37 -0700
Subject: [PATCH 0580/1115] Add SysLogger for new implementation. (#17171)

This PR introduces the SysLogger to address an issue where the original Logger.py could override the SYSLOG_IDENTIFIER if a new Logger instance is created.

- Why I did it?
This change was made because the SysLog was displaying NOTICE pmon#CCmisApi: instead of NOTICE pmon#ycable:. This discrepancy led to confusion during debugging and incorrect component identification in log analysis.

- How I did it
I implemented an instance-level syslog using the logging.handlers module to prevent the SYSLOG_IDENTIFIER from being overridden.
---
 .../sonic_py_common/daemon_base.py            | 38 ++++++++++--
 .../sonic_py_common/syslogger.py              | 62 +++++++++++++++++++
 src/system-health/tests/test_system_health.py | 11 +++-
 3 files changed, 103 insertions(+), 8 deletions(-)
 create mode 100644 src/sonic-py-common/sonic_py_common/syslogger.py

diff --git a/src/sonic-py-common/sonic_py_common/daemon_base.py b/src/sonic-py-common/sonic_py_common/daemon_base.py
index 86870ba1f..8bfd09cd8 100644
--- a/src/sonic-py-common/sonic_py_common/daemon_base.py
+++ b/src/sonic-py-common/sonic_py_common/daemon_base.py
@@ -1,9 +1,12 @@
+import logging
 import signal
 import sys
+import syslog
 
 from . import device_info
 from .general import load_module_from_source
 from .logger import Logger
+from .syslogger import SysLogger
 
 #
 # Constants ====================================================================
@@ -32,12 +35,16 @@ def db_connect(db_name, namespace=EMPTY_NAMESPACE):
 
 
 class DaemonBase(Logger):
-    def __init__(self, log_identifier):
-        super(DaemonBase, self).__init__(
-            log_identifier=log_identifier,
-            log_facility=Logger.LOG_FACILITY_DAEMON,
-            log_option=(Logger.LOG_OPTION_NDELAY | Logger.LOG_OPTION_PID)
-        )
+    def __init__(self, log_identifier, use_syslogger=True):
+        super().__init__()
+        if use_syslogger:
+            self.logger_instance = SysLogger(log_identifier)
+        else:
+            self.logger_instance = Logger(
+                log_identifier=log_identifier,
+                log_facility=Logger.LOG_FACILITY_DAEMON,
+                log_option=(Logger.LOG_OPTION_NDELAY | Logger.LOG_OPTION_PID)
+            )
 
         # Register our default signal handlers, unless the signal already has a
         # handler registered, most likely from a subclass implementation
@@ -48,6 +55,25 @@ def __init__(self, log_identifier):
         if not signal.getsignal(signal.SIGTERM):
             signal.signal(signal.SIGTERM, self.signal_handler)
 
+    def log(self, priority, message, also_print_to_console=False):
+        self.logger_instance.log(priority, message, also_print_to_console)
+
+    def log_error(self, message, also_print_to_console=False):
+        self.logger_instance.log_error(message, also_print_to_console)
+
+    def log_warning(self, message, also_print_to_console=False):
+        self.logger_instance.log_warning(message, also_print_to_console)
+
+    def log_notice(self, message, also_print_to_console=False):
+        self.logger_instance.log_notice(message, also_print_to_console)
+
+    def log_info(self, message, also_print_to_console=False):
+        self.logger_instance.log_info(message, also_print_to_console)
+
+    def log_debug(self, message, also_print_to_console=False):
+        self.logger_instance.log_debug(message, also_print_to_console)
+
+    
     # Default signal handler; can be overridden by subclass
     def signal_handler(self, sig, frame):
         if sig == signal.SIGHUP:
diff --git a/src/sonic-py-common/sonic_py_common/syslogger.py b/src/sonic-py-common/sonic_py_common/syslogger.py
new file mode 100644
index 000000000..b3c8f7265
--- /dev/null
+++ b/src/sonic-py-common/sonic_py_common/syslogger.py
@@ -0,0 +1,62 @@
+import logging
+from logging.handlers import SysLogHandler
+import os
+import socket
+import sys
+
+class SysLogger:
+    """
+    SysLogger class for Python applications using SysLogHandler
+    """
+
+    DEFAULT_LOG_FACILITY = SysLogHandler.LOG_USER
+    DEFAULT_LOG_LEVEL = SysLogHandler.LOG_NOTICE
+
+    def __init__(self, log_identifier=None, log_facility=DEFAULT_LOG_FACILITY, log_level=DEFAULT_LOG_LEVEL):
+        if log_identifier is None:
+            log_identifier = os.path.basename(sys.argv[0])
+
+        # Initialize SysLogger
+        self.logger = logging.getLogger(log_identifier)
+
+        # Reset all existing handlers
+        for handler in self.logger.handlers[:]:
+            self.logger.removeHandler(handler)
+
+        handler = SysLogHandler(address="/dev/log", facility=log_facility, socktype=socket.SOCK_DGRAM)
+        formatter = logging.Formatter('%(name)s[%(process)d]: %(message)s')
+        handler.setFormatter(formatter)
+        self.logger.addHandler(handler)
+
+        self.set_min_log_priority(log_level)
+
+    def set_min_log_priority(self, priority):
+        """
+        Sets the minimum log priority level. All log messages
+        with a priority lower than this will not be logged
+        """
+        self._min_log_level = priority
+        self.logger.setLevel(priority)
+
+    # Methods for logging messages
+    def log(self, priority, msg, also_print_to_console=False):
+        self.logger.log(priority, msg)
+
+        if also_print_to_console:
+            print(msg)
+
+    # Convenience methods
+    def log_error(self, msg, also_print_to_console=False):
+        self.log(logging.ERROR, msg, also_print_to_console)
+
+    def log_warning(self, msg, also_print_to_console=False):
+        self.log(logging.WARNING, msg, also_print_to_console)
+
+    def log_notice(self, msg, also_print_to_console=False):
+        self.log(logging.INFO, msg, also_print_to_console)
+
+    def log_info(self, msg, also_print_to_console=False):
+        self.log(logging.INFO, msg, also_print_to_console)
+
+    def log_debug(self, msg, also_print_to_console=False):
+        self.log(logging.DEBUG, msg, also_print_to_console)
diff --git a/src/system-health/tests/test_system_health.py b/src/system-health/tests/test_system_health.py
index cd9a54e87..ab44fcd66 100644
--- a/src/system-health/tests/test_system_health.py
+++ b/src/system-health/tests/test_system_health.py
@@ -46,9 +46,12 @@
 snmp-subagent               EXITED    Oct 19 01:53 AM
 """
 device_info.get_platform = MagicMock(return_value='unittest')
-
+ 
 device_runtime_metadata = {"DEVICE_RUNTIME_METADATA": {"ETHERNET_PORTS_PRESENT":True}}
 
+def no_op(*args, **kwargs):
+    pass  # This function does nothing
+
 def setup():
     if os.path.exists(ServiceChecker.CRITICAL_PROCESS_CACHE):
         os.remove(ServiceChecker.CRITICAL_PROCESS_CACHE)
@@ -875,7 +878,9 @@ def test_get_service_from_feature_table():
 
 
 @patch('healthd.time.time')
-def test_healthd_check_interval(mock_time):
+@patch('healthd.HealthDaemon.log_notice', side_effect=lambda *args, **kwargs: None)
+@patch('healthd.HealthDaemon.log_warning', side_effect=lambda *args, **kwargs: None)
+def test_healthd_check_interval(mock_log_warning, mock_log_notice, mock_time):
     daemon = HealthDaemon()
     manager = MagicMock()
     manager.check = MagicMock()
@@ -888,6 +893,8 @@ def test_healthd_check_interval(mock_time):
     daemon.stop_event.wait.return_value = False
     manager.config.interval = 60
     mock_time.side_effect = [0, 3, 0, 61, 0, 1]
+    mock_log_notice.side_effect = no_op
+    mock_log_warning.side_effect = no_op
     assert daemon._run_checker(manager, chassis)
     daemon.stop_event.wait.assert_called_with(57)
     assert daemon._run_checker(manager, chassis)

From 31f2c7c09142197d32fbc36aa20bc765db00d53e Mon Sep 17 00:00:00 2001
From: Ashwin Srinivasan <93744978+assrinivasan@users.noreply.github.com>
Date: Tue, 14 May 2024 23:09:38 -0700
Subject: [PATCH 0581/1115] [syslog]: add year to all log files (#18099)

Why I did it
Currently SONiC logs do not show the year:

root@str2-7050cx3-acs-01:~# tail -f /var/log/teamd.log
Feb 14 00:07:54.856313 str2-7050cx3-acs-01 DEBUG teamd#teamd_PortChannel102[37]: usock: calling method "StateDump"
Feb 14 00:07:54.856795 str2-7050cx3-acs-01 DEBUG teamd#teamd_PortChannel101[29]: usock: calling method "StateDump"
Feb 14 00:07:55.859690 str2-7050cx3-acs-01 DEBUG teamd#teamd_PortChannel104[53]: usock: calling method "StateDump"
This PR fixes that issue:

2024 Feb 15 02:24:26.091224 str2-7050cx3-acs-01 DEBUG teamd#teamd_PortChannel102[33]: usock: calling method "StateDump"
2024 Feb 15 02:24:26.091224 str2-7050cx3-acs-01 DEBUG teamd#teamd_PortChannel101[25]: usock: calling method "StateDump"
2024 Feb 15 02:24:26.752655 str2-7050cx3-acs-01 DEBUG teamd#teamd_PortChannel103[41]: Ethernet120: Enabling port
2024 Feb 15 02:24:26.752655 str2-7050cx3-acs-01 DEBUG teamd#teamd_PortChannel103[41]: Enable carrier. Number of enabled ports 1 >= configured min_ports 1
2024 Feb 15 02:24:27.094931 str2-7050cx3-acs-01 DEBUG teamd#teamd_PortChannel103[41]: usock: calling method "StateDump"

Also added a sonic-mgmt PR 11806 to update the FMT time template in platform_tests/conftest.py to keep up with this image change.

Microsoft ADO (number only): 26399333
---
 files/image_config/rsyslog/rsyslog.conf.j2 | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/files/image_config/rsyslog/rsyslog.conf.j2 b/files/image_config/rsyslog/rsyslog.conf.j2
index 52096784c..dc88fc886 100644
--- a/files/image_config/rsyslog/rsyslog.conf.j2
+++ b/files/image_config/rsyslog/rsyslog.conf.j2
@@ -51,7 +51,7 @@ $UDPServerRun 514
 #$ActionFileDefaultTemplate RSYSLOG_TraditionalFileFormat
 
 # Define a custom template
-$template SONiCFileFormat,"%timegenerated%.%timegenerated:::date-subseconds% %HOSTNAME% %syslogseverity-text:::uppercase% %syslogtag%%msg:::sp-if-no-1st-sp%%msg:::drop-last-lf%\n"
+$template SONiCFileFormat,"%timegenerated:::date-year% %timegenerated%.%timegenerated:::date-subseconds% %HOSTNAME% %syslogseverity-text:::uppercase% %syslogtag%%msg:::sp-if-no-1st-sp%%msg:::drop-last-lf%\n"
 $ActionFileDefaultTemplate SONiCFileFormat
 $template SONiCForwardFormat,"<%PRI%>%TIMESTAMP:::date-rfc3339% %HOSTNAME% %syslogseverity-text:::uppercase% %syslogtag%%msg:::sp-if-no-1st-sp%%msg:::drop-last-lf%\n"
 $ActionForwardDefaultTemplate SONiCForwardFormat

From 8b3944f36128748eb5e67fb138641b8694d4a206 Mon Sep 17 00:00:00 2001
From: Yaqiang Zhu <yaqiangzhu@microsoft.com>
Date: Thu, 16 May 2024 01:28:10 +0800
Subject: [PATCH 0582/1115] [dhcp_server] Add support for monitoring used but
 invalid range/option (#18945)

Why I did it
Currently, dhcpservd wouldn't monitor option / range change which is referred in DHCP_SERVER_IPV4 table but is invalid or not been defined. It would miss config when they are defined or become valid.

How I did it
Treat invalid or not defined option / range as interested items.
---
 .../dhcp_utilities/dhcpservd/dhcp_cfggen.py                   | 4 ++--
 src/sonic-dhcp-utilities/tests/test_dhcp_cfggen.py            | 4 ++--
 src/sonic-dhcp-utilities/tests/test_smart_switch.py           | 2 +-
 3 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/src/sonic-dhcp-utilities/dhcp_utilities/dhcpservd/dhcp_cfggen.py b/src/sonic-dhcp-utilities/dhcp_utilities/dhcpservd/dhcp_cfggen.py
index 5bc9e6cb9..eb7ae34d8 100755
--- a/src/sonic-dhcp-utilities/dhcp_utilities/dhcpservd/dhcp_cfggen.py
+++ b/src/sonic-dhcp-utilities/dhcp_utilities/dhcpservd/dhcp_cfggen.py
@@ -196,6 +196,7 @@ def _construct_obj_for_template(self, dhcp_server_ipv4, port_ips, hostname, cust
                 curr_options = {}
                 if "customized_options" in dhcp_config:
                     for option in dhcp_config["customized_options"]:
+                        used_options.add(option)
                         if option not in customized_option_keys:
                             syslog.syslog(syslog.LOG_WARNING, "Customized option {} configured for {} is not defined"
                                           .format(option, dhcp_interface_name))
@@ -231,7 +232,6 @@ def _construct_obj_for_template(self, dhcp_server_ipv4, port_ips, hostname, cust
                         "lease_time": dhcp_config["lease_time"] if "lease_time" in dhcp_config else DEFAULT_LEASE_TIME,
                         "customized_options": curr_options
                     }
-                    used_options = used_options | set(subnet_obj["customized_options"])
                     subnets.append(subnet_obj)
         render_obj = {
             "subnets": subnets,
@@ -422,10 +422,10 @@ def _parse_port(self, port_ipv4, dhcp_interfaces, dhcp_members, ranges):
                                               port_ips)
             if "ranges" in port_config and len(port_config["ranges"]) != 0:
                 for range_name in list(port_config["ranges"]):
+                    used_ranges.add(range_name)
                     if range_name not in ranges:
                         syslog.syslog(syslog.LOG_WARNING, f"Range {range_name} is not in range table, skip")
                         continue
-                    used_ranges.add(range_name)
                     range = ranges[range_name]
                     # Loop the IP of the dhcp interface and find the network that target range is in this network.
                     self._match_range_network(dhcp_interface, dhcp_interface_name, port, range, port_ips)
diff --git a/src/sonic-dhcp-utilities/tests/test_dhcp_cfggen.py b/src/sonic-dhcp-utilities/tests/test_dhcp_cfggen.py
index 0d5edf03c..723731839 100644
--- a/src/sonic-dhcp-utilities/tests/test_dhcp_cfggen.py
+++ b/src/sonic-dhcp-utilities/tests/test_dhcp_cfggen.py
@@ -314,7 +314,7 @@ def test_parse_port(test_config_db, mock_swsscommon_dbconnector_init, mock_get_r
     parsed_port, used_ranges = dhcp_cfg_generator._parse_port(ipv4_port, tested_vlan_interfaces, vlan_members,
                                                               tested_ranges)
     assert parsed_port == (expected_parsed_port if test_config_db == "mock_config_db.json" else {})
-    assert used_ranges == ({"range1", "range0", "range3"}
+    assert used_ranges == ({"range1", "range0", "range3", "range2", "range6"}
                            if test_config_db == "mock_config_db.json" else set())
 
 
@@ -366,7 +366,7 @@ def test_construct_obj_for_template(mock_swsscommon_dbconnector_init, mock_parse
                                                        port_ips, tested_hostname, customized_options)
     assert render_obj == expected_render_obj
     assert enabled_dhcp_interfaces == {"Vlan1000", "Vlan4000", "Vlan3000", "Vlan6000"}
-    assert used_options == set(["option223"])
+    assert used_options == set(["option223", "option60"])
     assert subscribe_table == set(PORT_MODE_CHECKER)
 
 
diff --git a/src/sonic-dhcp-utilities/tests/test_smart_switch.py b/src/sonic-dhcp-utilities/tests/test_smart_switch.py
index 9d9d8a33f..0347d5df2 100644
--- a/src/sonic-dhcp-utilities/tests/test_smart_switch.py
+++ b/src/sonic-dhcp-utilities/tests/test_smart_switch.py
@@ -129,7 +129,7 @@ def test_dhcp_dhcp_cfggen_generate(mock_swsscommon_dbconnector_init, mock_parse_
         assert json.loads(kea_dhcp4_config) == expected_kea_config
         assert used_ranges == set()
         assert enabled_dhcp_interfaces == set(["bridge_midplane"])
-        assert used_options == set()
+        assert used_options == set(["option60", "option223"])
         expected_tables = set(["DpusTableEventChecker", "MidPlaneTableEventChecker", "VlanTableEventChecker",
                                "VlanIntfTableEventChecker", "DhcpRangeTableEventChecker", "VlanMemberTableEventChecker",
                                "DhcpOptionTableEventChecker", "DhcpPortTableEventChecker",

From b952caa155b2760a52ef9081ed28b505767da528 Mon Sep 17 00:00:00 2001
From: Yevhen Fastiuk <yfastiuk@nvidia.com>
Date: Thu, 16 May 2024 02:27:25 +0300
Subject: [PATCH 0583/1115] =?UTF-8?q?=F0=9F=90=9E=20NTP:=20Fix=20config=20?=
 =?UTF-8?q?template=20to=20init=20default=20parameters=20(#18736)?=
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

fixes #17906

#### Why I did it
To fix NTP config generation from the minigraph and save backward compatability

#### How I did it
Align `ntp.conf.j2` template to generate config out of empty `NTP_SERVER` DB configuration

#### How to verify it
Out of that NTP_SERVER configuration:
```json
{
  "10.210.25.32": {},
  "10.75.202.2": {}
}
```

The next config in `ntp.conf` file should be produced:
```
server 10.210.25.32
restrict 10.210.25.32 kod limited nomodify notrap noquery nopeer

server 10.75.202.2
restrict 10.75.202.2 kod limited nomodify notrap noquery nopeer
```
---
 files/image_config/ntp/ntp.conf.j2            | 22 ++++++++-----------
 .../tests/sample_output/py3/ntp.conf          |  4 ++--
 2 files changed, 11 insertions(+), 15 deletions(-)

diff --git a/files/image_config/ntp/ntp.conf.j2 b/files/image_config/ntp/ntp.conf.j2
index 0563e5044..e50822a67 100644
--- a/files/image_config/ntp/ntp.conf.j2
+++ b/files/image_config/ntp/ntp.conf.j2
@@ -18,14 +18,14 @@ leapfile /usr/share/zoneinfo/leap-seconds.list
 {# Adding NTP servers. We need to know if we have some pools, to set proper
 config -#}
 {% set ns = namespace(is_pools=false) %}
-{% for server in NTP_SERVER if NTP_SERVER[server].admin_state != 'disabled' and
-                               NTP_SERVER[server].resolve_as and
-                               NTP_SERVER[server].association_type -%}
+{% for server in NTP_SERVER if NTP_SERVER[server].admin_state != 'disabled' -%}
     {% set config = NTP_SERVER[server] -%}
     {# Server options -#}
     {% set soptions = '' -%}
-    {# Server access control options -#}
-    {% set aoptions = '' -%}
+
+    {# Define defaults if not defined -#}
+    {% set association_type = config.association_type | d('server') -%}
+    {% set resolve_as = config.resolve_as | d(server) -%}
 
     {# Authentication key -#}
     {% if global.authentication == 'enabled' -%}
@@ -47,17 +47,13 @@ config -#}
     {# Check if there are any pool configured. BTW it doesn't matter what was
     configured as "resolve_as" for pools. If they were configured with FQDN they
     must remain like that -#}
-    {% set config_as = config.resolve_as -%}
-    {% if config.association_type == 'pool' -%}
-        {% set ns.is_pools = true -%}
-        {% set config_as = server -%}
-    {% else -%}
-        {% set aoptions = aoptions ~ ' nopeer' -%}
+    {% if association_type == 'pool' -%}
+        {% set resolve_as = server -%}
     {% endif -%}
 
-{{ config.association_type }} {{ config_as }}{{ soptions }}
+{{ association_type }} {{ resolve_as }}{{ soptions }}
 {% if global.server_role == 'disabled' %}
-restrict {{ config_as }} kod limited nomodify notrap noquery{{ aoptions }}
+restrict {{ resolve_as }} kod limited nomodify noquery
 {% endif %}
 
 {% endfor -%}
diff --git a/src/sonic-config-engine/tests/sample_output/py3/ntp.conf b/src/sonic-config-engine/tests/sample_output/py3/ntp.conf
index 413615739..412d06cfd 100644
--- a/src/sonic-config-engine/tests/sample_output/py3/ntp.conf
+++ b/src/sonic-config-engine/tests/sample_output/py3/ntp.conf
@@ -13,10 +13,10 @@ driftfile /var/lib/ntpsec/ntp.drift
 leapfile /usr/share/zoneinfo/leap-seconds.list
 
 server 10.20.30.50 key 42 iburst version 3
-restrict 10.20.30.50 kod limited nomodify notrap noquery nopeer
+restrict 10.20.30.50 kod limited nomodify noquery
 
 pool pool.ntp.org iburst version 3
-restrict pool.ntp.org kod limited nomodify notrap noquery
+restrict pool.ntp.org kod limited nomodify noquery
 
 
 keys /etc/ntpsec/ntp.keys

From 98fefc6c0c95a5bdf754065589edbc1b1c66f349 Mon Sep 17 00:00:00 2001
From: Prince George <45705344+prgeor@users.noreply.github.com>
Date: Wed, 15 May 2024 17:04:08 -0700
Subject: [PATCH 0584/1115] [baseimage]: Add nvme-cli tool in both baseimage
 and pmon (#18967)
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

Add nvme-cli utility tool for platforms using NVMe

How to verify it
root@str-D10-U32:~# nvme version
nvme version 2.3 (git 2.3)
libnvme version 1.3 (git 1.3)
root@str-D10-U32:~#

root@str-D10-U32:~# nvme smart-log /dev/nvme0
Smart Log for NVME device:nvme0 namespace-id:ffffffff
critical_warning                        : 0
temperature                             : 43°C (316 Kelvin)
available_spare                         : 100%
available_spare_threshold               : 10%
percentage_used                         : 0%
endurance group critical warning summary: 0
Data Units Read                         : 4,421,218 (2.26 TB)
Data Units Written                      : 2,590,713 (1.33 TB)
host_read_commands                      : 26,514,410
host_write_commands                     : 30,359,625
controller_busy_time                    : 555
power_cycles                            : 222
power_on_hours                          : 2,528
unsafe_shutdowns                        : 219
media_errors                            : 0
num_err_log_entries                     : 0
Warning Temperature Time                : 18
Critical Composite Temperature Time     : 0
Temperature Sensor 2           : 43°C (316 Kelvin)
Temperature Sensor 3           : 30°C (303 Kelvin)
Temperature Sensor 6           : 43°C (316 Kelvin)
Thermal Management T1 Trans Count       : 4
Thermal Management T2 Trans Count       : 0
Thermal Management T1 Total Time        : 1337
Thermal Management T2 Total Time        : 0
root@str-D10-U32:~#
---
 build_debian.sh                               | 3 ++-
 dockers/docker-platform-monitor/Dockerfile.j2 | 1 +
 2 files changed, 3 insertions(+), 1 deletion(-)

diff --git a/build_debian.sh b/build_debian.sh
index 6ba2a134e..bc927fbb3 100755
--- a/build_debian.sh
+++ b/build_debian.sh
@@ -406,7 +406,8 @@ sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y in
     sysstat                 \
     xxd                     \
     wireless-regdb          \
-    zstd
+    zstd                    \
+    nvme-cli
 
 # Have systemd create the auditd log directory
 sudo mkdir -p ${FILESYSTEM_ROOT}/etc/systemd/system/auditd.service.d
diff --git a/dockers/docker-platform-monitor/Dockerfile.j2 b/dockers/docker-platform-monitor/Dockerfile.j2
index ef6b2fcea..a4e01237e 100755
--- a/dockers/docker-platform-monitor/Dockerfile.j2
+++ b/dockers/docker-platform-monitor/Dockerfile.j2
@@ -26,6 +26,7 @@ RUN apt-get update &&   \
         libpci3         \
         iputils-ping    \
         pciutils        \
+        nvme-cli        \
         ethtool &&	\
 # smartmontools version should match the installed smartmontools in sonic_debian_extension build template
     apt-get install -y -t bookworm-backports \

From 2a3bdb68ed1dd9ae7f99e489a2e6e616c27991de Mon Sep 17 00:00:00 2001
From: Senthil Kumar Guruswamy <75792349+sg893052@users.noreply.github.com>
Date: Thu, 16 May 2024 10:55:26 +0530
Subject: [PATCH 0585/1115] Remove services mentioned in exclude service list
 for system monitoring (#18911)

- Why I did it
To address #18814

- How I did it
Introduce exclude service list in the code to be parsed and remove the services from the system ready tracking.
In this case, it is ztp.service

- How to verify it
show system-health sysready-status output
---
 src/system-health/health_checker/sysmonitor.py | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/src/system-health/health_checker/sysmonitor.py b/src/system-health/health_checker/sysmonitor.py
index 5312603d7..115dbfbe9 100755
--- a/src/system-health/health_checker/sysmonitor.py
+++ b/src/system-health/health_checker/sysmonitor.py
@@ -23,7 +23,7 @@
 QUEUE_TIMEOUT = 15
 TASK_STOP_TIMEOUT = 10
 logger = Logger(log_identifier=SYSLOG_IDENTIFIER)
-
+exclude_srv_list = ['ztp.service']
 
 #Subprocess which subscribes to STATE_DB FEATURE table for any update
 #and push service events to main process via queue
@@ -158,6 +158,11 @@ def get_all_service_list(self):
                 if srv in dir_list:
                     dir_list.remove(srv)
 
+	#Remove services from exclude list Eg.ztp.service
+        for srv in exclude_srv_list:
+            if srv in dir_list:
+                dir_list.remove(srv)
+
         dir_list.sort()
         return dir_list
 

From c5a2eba47c1fcdc331730678a4cc62fc09033d58 Mon Sep 17 00:00:00 2001
From: Oleksandr Ivantsiv <oivantsiv@nvidia.com>
Date: Wed, 15 May 2024 22:36:50 -0700
Subject: [PATCH 0586/1115] Add configuration optimization to run SONiC on DPU
 (#18807)

- Why I did it
The Appliance DPU supports a limited subset of the configuration defined in the SONiC DASH HLD.
Configure SWSS and GMNI to communicate on the Appliance DPU.
Add a sample configuration for the appliance topology.

- How I did it
Disable configuration unsupported by the Appliance DPU based on the device type.

- How to verify it
Run VNET-to-VNET sonic-mgmt test.
---
 dockers/docker-orchagent/ipinip.json.j2        | 5 +++++
 dockers/docker-orchagent/switch.json.j2        | 2 ++
 dockers/docker-platform-monitor/docker_init.j2 | 4 ++++
 3 files changed, 11 insertions(+)

diff --git a/dockers/docker-orchagent/ipinip.json.j2 b/dockers/docker-orchagent/ipinip.json.j2
index 9cdf6857b..9d40ec68c 100644
--- a/dockers/docker-orchagent/ipinip.json.j2
+++ b/dockers/docker-orchagent/ipinip.json.j2
@@ -1,3 +1,6 @@
+{% if DEVICE_METADATA['localhost']['switch_type'] == "dpu" %}
+[]
+{% else %}
 {% set ipv4_addresses = [] %}
 {% set ipv6_addresses = [] %}
 {% set ipv4_loopback_addresses = [] %}
@@ -77,3 +80,5 @@
     }
 {% endif %}
 ]
+{% endif %}
+
diff --git a/dockers/docker-orchagent/switch.json.j2 b/dockers/docker-orchagent/switch.json.j2
index 30ad703bc..5816cecac 100644
--- a/dockers/docker-orchagent/switch.json.j2
+++ b/dockers/docker-orchagent/switch.json.j2
@@ -18,6 +18,7 @@
 [
     {
         "SWITCH_TABLE:switch": {
+{% if not DEVICE_METADATA.localhost.switch_type or DEVICE_METADATA.localhost.switch_type != "dpu" %}
             "ecmp_hash_seed": "{{ hash_seed_value }}",
             "lag_hash_seed": "{{ hash_seed_value }}",
             "fdb_aging_time": "600",
@@ -25,6 +26,7 @@
             "ordered_ecmp": "true"
 {% else %}
             "ordered_ecmp": "false"
+{% endif %}
 {% endif %}
         },
         "OP": "SET"
diff --git a/dockers/docker-platform-monitor/docker_init.j2 b/dockers/docker-platform-monitor/docker_init.j2
index 46766b5fd..765f7c863 100755
--- a/dockers/docker-platform-monitor/docker_init.j2
+++ b/dockers/docker-platform-monitor/docker_init.j2
@@ -91,6 +91,10 @@ if [ -e $SENSORS_CONF_PATH_GETTER ]; then
 fi
 {% endif %}
 
+{% if CONFIGURED_PLATFORM == "nvidia-bluefield" %}
+    mount -t debugfs none /sys/kernel/debug
+{% endif %}
+
 if [ -e $SENSORS_CONF_FILE ]; then
     HAVE_SENSORS_CONF=1
     mkdir -p /etc/sensors.d

From c48cc1e8979e5475f8e8a291076355504c934bc8 Mon Sep 17 00:00:00 2001
From: Yaqiang Zhu <yaqiangzhu@microsoft.com>
Date: Thu, 16 May 2024 14:19:04 +0800
Subject: [PATCH 0587/1115] [bgp] Add explictly configure bgp router id for
 multi-asic (#18764)
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

Why I did it
HLD: sonic-net/SONiC#1643
Remove hard coupling between bgp router-id and IPv4 address of Loopback4096
Add support to explictly specify bgp router id for multi asic device

Work item tracking
Microsoft ADO (number only): 27801007
How I did it
When bgp_router_id configured in DEVICE_METADATA, use it as bgp router-id and originator-id.
Remove the hard dependency on loopback4096 ipv4 address when adding ibgp peer.
Add UTs.

Behavior of set bgp router-id

To be clarified that when bgp router-id hasn't been explicitly set, bgp actions would totally like previous

Loopback4096 IPv4 address exists	Loopback4096 IPv4 address doesn't exist
bgp_router_id configured	Honor bgp_router_id	Honor bgp_router_id
bgp_router_id doesn't be configured	Honor Loopback4096 IPv4 address	FRR default router ID value is selected as the largest IP address of the device. When router zebra is not enabled bgpd can’t get interface information, so router-id is set to 0.0.0.0
Behavior of add bgp peer

To be clarified that when bgp router-id hasn't been explicitly set, bgp actions would totally like previous

Loopback4096 IPv4 address exists	Loopback4096 IPv4 address doesn't exist
bgp_router_id configured	Add BGP peer	Add BGP peer
bgp_router_id doesn't be configured	Add BGP peer	Do not add iBGP peer
How to verify it
UT passed.
---
 .../docker-fpm-frr/frr/bgpd/bgpd.main.conf.j2 | 11 ++-
 .../bgpd/templates/internal/policies.conf.j2  | 13 +++-
 src/sonic-bgpcfgd/bgpcfgd/managers_bgp.py     |  8 +-
 .../policies.conf/param_back_no_lo4096.json   | 13 ++++
 .../policies.conf/param_back_router_id.json   | 17 +++++
 .../param_back_router_id_no_lo4096.json       | 14 ++++
 .../policies.conf/result_back_no_lo4096.conf  | 21 ++++++
 .../policies.conf/result_back_router_id.conf  | 23 ++++++
 .../result_back_router_id_no_lo4096.conf      | 23 ++++++
 .../packet_chassis_ipv6_lo4096.conf           | 72 ++++++++++++++++++
 .../packet_chassis_ipv6_lo4096.json           | 35 +++++++++
 .../packet_chassis_ipv6_lo4096_router_id.conf | 73 +++++++++++++++++++
 .../packet_chassis_ipv6_lo4096_router_id.json | 36 +++++++++
 .../packet_chassis_router_id.conf             | 73 +++++++++++++++++++
 .../packet_chassis_router_id.json             | 37 ++++++++++
 src/sonic-bgpcfgd/tests/test_bgp.py           | 32 +++++++-
 src/sonic-bgpcfgd/tests/test_sonic-cfggen.py  | 22 +++++-
 17 files changed, 508 insertions(+), 15 deletions(-)
 create mode 100644 src/sonic-bgpcfgd/tests/data/internal/policies.conf/param_back_no_lo4096.json
 create mode 100644 src/sonic-bgpcfgd/tests/data/internal/policies.conf/param_back_router_id.json
 create mode 100644 src/sonic-bgpcfgd/tests/data/internal/policies.conf/param_back_router_id_no_lo4096.json
 create mode 100644 src/sonic-bgpcfgd/tests/data/internal/policies.conf/result_back_no_lo4096.conf
 create mode 100644 src/sonic-bgpcfgd/tests/data/internal/policies.conf/result_back_router_id.conf
 create mode 100644 src/sonic-bgpcfgd/tests/data/internal/policies.conf/result_back_router_id_no_lo4096.conf
 create mode 100644 src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/packet_chassis_ipv6_lo4096.conf
 create mode 100644 src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/packet_chassis_ipv6_lo4096.json
 create mode 100644 src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/packet_chassis_ipv6_lo4096_router_id.conf
 create mode 100644 src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/packet_chassis_ipv6_lo4096_router_id.json
 create mode 100644 src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/packet_chassis_router_id.conf
 create mode 100644 src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/packet_chassis_router_id.json

diff --git a/dockers/docker-fpm-frr/frr/bgpd/bgpd.main.conf.j2 b/dockers/docker-fpm-frr/frr/bgpd/bgpd.main.conf.j2
index 1ea4c8ac6..da6358a00 100644
--- a/dockers/docker-fpm-frr/frr/bgpd/bgpd.main.conf.j2
+++ b/dockers/docker-fpm-frr/frr/bgpd/bgpd.main.conf.j2
@@ -9,6 +9,7 @@
 ! TSA configuration
 !
 {% set lo0_ipv4 = get_ipv4_loopback_address(LOOPBACK_INTERFACE, "Loopback0") | ip %}
+{% set lo4096_ipv4 = get_ipv4_loopback_address(LOOPBACK_INTERFACE, "Loopback4096") | ip %}
 {% if lo0_ipv4 is not none %}
 ip prefix-list PL_LoopbackV4 permit {{ lo0_ipv4 }}/32
 {% endif %}
@@ -89,7 +90,11 @@ router bgp {{ DEVICE_METADATA['localhost']['bgp_asn'] }}
 !
 {# set router-id #}
 {% if DEVICE_METADATA['localhost']['sub_role'] == 'BackEnd' or DEVICE_METADATA['localhost']['switch_type'] == 'voq' or DEVICE_METADATA['localhost']['switch_type'] == 'chassis-packet' %}
-  bgp router-id {{ get_ipv4_loopback_address(LOOPBACK_INTERFACE, "Loopback4096") | ip }}
+{% if 'bgp_router_id' in DEVICE_METADATA['localhost'] %}
+  bgp router-id {{ DEVICE_METADATA["localhost"]["bgp_router_id"] }}
+{% elif lo4096_ipv4 is not none %}
+  bgp router-id {{ lo4096_ipv4 }}
+{% endif %}
 {% else %}
 {% if "localhost" in DEVICE_METADATA and "bgp_router_id" in DEVICE_METADATA["localhost"] %}
   bgp router-id {{ DEVICE_METADATA["localhost"]["bgp_router_id"] }}
@@ -102,8 +107,8 @@ router bgp {{ DEVICE_METADATA['localhost']['bgp_asn'] }}
 {% if lo0_ipv4 is not none %}
   network {{ lo0_ipv4 }}/32
 {% endif %}
-{% if ((multi_asic is defined and DEVICE_METADATA['localhost']['switch_type'] != 'chassis-packet') or (DEVICE_METADATA['localhost']['switch_type'] == 'voq')) %}
-  network {{ get_ipv4_loopback_address(LOOPBACK_INTERFACE, "Loopback4096") | ip }}/32 route-map HIDE_INTERNAL
+{% if lo4096_ipv4 is not none and ((multi_asic is defined and DEVICE_METADATA['localhost']['switch_type'] != 'chassis-packet') or (DEVICE_METADATA['localhost']['switch_type'] == 'voq')) %}
+  network {{ lo4096_ipv4 }}/32 route-map HIDE_INTERNAL
 {% endif %}
 !
 {% if get_ipv6_loopback_address(LOOPBACK_INTERFACE, "Loopback0") != 'None' %}
diff --git a/dockers/docker-fpm-frr/frr/bgpd/templates/internal/policies.conf.j2 b/dockers/docker-fpm-frr/frr/bgpd/templates/internal/policies.conf.j2
index bedc6eeea..bd341e70d 100644
--- a/dockers/docker-fpm-frr/frr/bgpd/templates/internal/policies.conf.j2
+++ b/dockers/docker-fpm-frr/frr/bgpd/templates/internal/policies.conf.j2
@@ -4,16 +4,25 @@
 !
 {% from "common/functions.conf.j2" import get_ipv4_loopback_address %}
 !
+{% set lo4096_ipv4 = get_ipv4_loopback_address(CONFIG_DB__LOOPBACK_INTERFACE, "Loopback4096") | ip %}
 {% if CONFIG_DB__DEVICE_METADATA['localhost']['sub_role'] == 'BackEnd' %}
 route-map FROM_BGP_INTERNAL_PEER_V4 permit 1
- set originator-id {{ get_ipv4_loopback_address(CONFIG_DB__LOOPBACK_INTERFACE, "Loopback4096") | ip }}
+{% if "localhost" in CONFIG_DB__DEVICE_METADATA and "bgp_router_id" in CONFIG_DB__DEVICE_METADATA["localhost"] %}
+ set originator-id {{ CONFIG_DB__DEVICE_METADATA["localhost"]["bgp_router_id"] }}
+{% elif lo4096_ipv4 is not none%}
+ set originator-id {{ lo4096_ipv4 }}
+{% endif %}
 !
 route-map FROM_BGP_INTERNAL_PEER_V6 permit 1
  set ipv6 next-hop prefer-global
  on-match next
 !
 route-map FROM_BGP_INTERNAL_PEER_V6 permit 2
- set originator-id {{ get_ipv4_loopback_address(CONFIG_DB__LOOPBACK_INTERFACE, "Loopback4096") | ip }}
+{% if "localhost" in CONFIG_DB__DEVICE_METADATA and "bgp_router_id" in CONFIG_DB__DEVICE_METADATA["localhost"] %}
+ set originator-id {{ CONFIG_DB__DEVICE_METADATA["localhost"]["bgp_router_id"] }}
+ {% elif lo4096_ipv4 is not none%}
+ set originator-id {{ lo4096_ipv4 }}
+ {% endif %}
 {% elif CONFIG_DB__DEVICE_METADATA['localhost']['switch_type'] == 'chassis-packet' %}
 bgp community-list standard DEVICE_INTERNAL_COMMUNITY permit {{ constants.bgp.internal_community }}
 bgp community-list standard NO_EXPORT permit no-export
diff --git a/src/sonic-bgpcfgd/bgpcfgd/managers_bgp.py b/src/sonic-bgpcfgd/bgpcfgd/managers_bgp.py
index 347270f94..26202ebc5 100644
--- a/src/sonic-bgpcfgd/bgpcfgd/managers_bgp.py
+++ b/src/sonic-bgpcfgd/bgpcfgd/managers_bgp.py
@@ -128,9 +128,6 @@ def __init__(self, common_objs, db_name, table_name, peer_type, check_neig_meta)
         if self.check_deployment_id:
             deps.append(("CONFIG_DB", swsscommon.CFG_DEVICE_METADATA_TABLE_NAME, "localhost/deployment_id"))
 
-        if self.peer_type == 'internal':
-            deps.append(("CONFIG_DB", swsscommon.CFG_LOOPBACK_INTERFACE_TABLE_NAME, "Loopback4096"))
-
         super(BGPPeerMgrBase, self).__init__(
             common_objs,
             deps,
@@ -175,8 +172,9 @@ def add_peer(self, vrf, nbr, data):
         #
         if self.peer_type == 'internal':
             lo4096_ipv4 = self.get_lo_ipv4("Loopback4096|")
-            if lo4096_ipv4 is None:
-                log_warn("Loopback4096 ipv4 address is not presented yet")
+            if (lo4096_ipv4 is None and "bgp_router_id"
+                not in self.directory.get_slot("CONFIG_DB", swsscommon.CFG_DEVICE_METADATA_TABLE_NAME)["localhost"]):
+                log_warn("Loopback4096 ipv4 address is not presented yet and bgp_router_id not configured")
                 return False
 
         if "local_addr" not in data:
diff --git a/src/sonic-bgpcfgd/tests/data/internal/policies.conf/param_back_no_lo4096.json b/src/sonic-bgpcfgd/tests/data/internal/policies.conf/param_back_no_lo4096.json
new file mode 100644
index 000000000..824193e7e
--- /dev/null
+++ b/src/sonic-bgpcfgd/tests/data/internal/policies.conf/param_back_no_lo4096.json
@@ -0,0 +1,13 @@
+{
+    "CONFIG_DB__DEVICE_METADATA": {
+        "localhost": {
+            "sub_role": "BackEnd"
+        }
+    },
+    "constants": {
+        "bgp": {
+            "internal_community": "12345:556",
+	    "internal_community_match_tag": "101"
+        }
+    }
+}
diff --git a/src/sonic-bgpcfgd/tests/data/internal/policies.conf/param_back_router_id.json b/src/sonic-bgpcfgd/tests/data/internal/policies.conf/param_back_router_id.json
new file mode 100644
index 000000000..8240db6bb
--- /dev/null
+++ b/src/sonic-bgpcfgd/tests/data/internal/policies.conf/param_back_router_id.json
@@ -0,0 +1,17 @@
+{
+    "CONFIG_DB__DEVICE_METADATA": {
+        "localhost": {
+            "sub_role": "BackEnd",
+            "bgp_router_id": "8.8.8.8"
+        }
+    },
+    "CONFIG_DB__LOOPBACK_INTERFACE": {
+        "Loopback4096|10.10.10.10/32": {}
+    },
+    "constants": {
+        "bgp": {
+            "internal_community": "12345:556",
+	    "internal_community_match_tag": "101"
+        }
+    }
+}
diff --git a/src/sonic-bgpcfgd/tests/data/internal/policies.conf/param_back_router_id_no_lo4096.json b/src/sonic-bgpcfgd/tests/data/internal/policies.conf/param_back_router_id_no_lo4096.json
new file mode 100644
index 000000000..13d782a68
--- /dev/null
+++ b/src/sonic-bgpcfgd/tests/data/internal/policies.conf/param_back_router_id_no_lo4096.json
@@ -0,0 +1,14 @@
+{
+    "CONFIG_DB__DEVICE_METADATA": {
+        "localhost": {
+            "sub_role": "BackEnd",
+            "bgp_router_id": "8.8.8.8"
+        }
+    },
+    "constants": {
+        "bgp": {
+            "internal_community": "12345:556",
+	    "internal_community_match_tag": "101"
+        }
+    }
+}
diff --git a/src/sonic-bgpcfgd/tests/data/internal/policies.conf/result_back_no_lo4096.conf b/src/sonic-bgpcfgd/tests/data/internal/policies.conf/result_back_no_lo4096.conf
new file mode 100644
index 000000000..a51f97aac
--- /dev/null
+++ b/src/sonic-bgpcfgd/tests/data/internal/policies.conf/result_back_no_lo4096.conf
@@ -0,0 +1,21 @@
+!
+! template: bgpd/templates/internal/policies.conf.j2
+!
+route-map FROM_BGP_INTERNAL_PEER_V4 permit 1
+!
+route-map FROM_BGP_INTERNAL_PEER_V6 permit 1
+ set ipv6 next-hop prefer-global
+ on-match next
+!
+route-map FROM_BGP_INTERNAL_PEER_V6 permit 2
+!
+route-map FROM_BGP_INTERNAL_PEER_V4 permit 100
+!
+route-map FROM_BGP_INTERNAL_PEER_V6 permit 100
+!
+route-map TO_BGP_INTERNAL_PEER_V4 permit 100
+!
+route-map TO_BGP_INTERNAL_PEER_V6 permit 100
+!
+! end of template: bgpd/templates/internal/policies.conf.j2
+!
diff --git a/src/sonic-bgpcfgd/tests/data/internal/policies.conf/result_back_router_id.conf b/src/sonic-bgpcfgd/tests/data/internal/policies.conf/result_back_router_id.conf
new file mode 100644
index 000000000..d067d862d
--- /dev/null
+++ b/src/sonic-bgpcfgd/tests/data/internal/policies.conf/result_back_router_id.conf
@@ -0,0 +1,23 @@
+!
+! template: bgpd/templates/internal/policies.conf.j2
+!
+route-map FROM_BGP_INTERNAL_PEER_V4 permit 1
+ set originator-id 8.8.8.8
+!
+route-map FROM_BGP_INTERNAL_PEER_V6 permit 1
+ set ipv6 next-hop prefer-global
+ on-match next
+!
+route-map FROM_BGP_INTERNAL_PEER_V6 permit 2
+ set originator-id 8.8.8.8
+!
+route-map FROM_BGP_INTERNAL_PEER_V4 permit 100
+!
+route-map FROM_BGP_INTERNAL_PEER_V6 permit 100
+!
+route-map TO_BGP_INTERNAL_PEER_V4 permit 100
+!
+route-map TO_BGP_INTERNAL_PEER_V6 permit 100
+!
+! end of template: bgpd/templates/internal/policies.conf.j2
+!
diff --git a/src/sonic-bgpcfgd/tests/data/internal/policies.conf/result_back_router_id_no_lo4096.conf b/src/sonic-bgpcfgd/tests/data/internal/policies.conf/result_back_router_id_no_lo4096.conf
new file mode 100644
index 000000000..d067d862d
--- /dev/null
+++ b/src/sonic-bgpcfgd/tests/data/internal/policies.conf/result_back_router_id_no_lo4096.conf
@@ -0,0 +1,23 @@
+!
+! template: bgpd/templates/internal/policies.conf.j2
+!
+route-map FROM_BGP_INTERNAL_PEER_V4 permit 1
+ set originator-id 8.8.8.8
+!
+route-map FROM_BGP_INTERNAL_PEER_V6 permit 1
+ set ipv6 next-hop prefer-global
+ on-match next
+!
+route-map FROM_BGP_INTERNAL_PEER_V6 permit 2
+ set originator-id 8.8.8.8
+!
+route-map FROM_BGP_INTERNAL_PEER_V4 permit 100
+!
+route-map FROM_BGP_INTERNAL_PEER_V6 permit 100
+!
+route-map TO_BGP_INTERNAL_PEER_V4 permit 100
+!
+route-map TO_BGP_INTERNAL_PEER_V6 permit 100
+!
+! end of template: bgpd/templates/internal/policies.conf.j2
+!
diff --git a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/packet_chassis_ipv6_lo4096.conf b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/packet_chassis_ipv6_lo4096.conf
new file mode 100644
index 000000000..381c5b05a
--- /dev/null
+++ b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/packet_chassis_ipv6_lo4096.conf
@@ -0,0 +1,72 @@
+!
+! template: bgpd/bgpd.main.conf.j2
+!
+! bgp multiple-instance
+!
+! BGP configuration
+!
+! TSA configuration
+!
+ip prefix-list PL_LoopbackV4 permit 55.55.55.55/32
+!
+ipv6 prefix-list PL_LoopbackV6 permit fc00::/64
+!
+ip prefix-list LOCAL_VLAN_IPV4_PREFIX seq 5 permit 10.10.10.0/24
+!
+ipv6 prefix-list LOCAL_VLAN_IPV6_PREFIX seq 10 permit fc01::/64
+!
+ip prefix-list V4_P2P_IP permit 0.0.0.0/0 ge 31 le 31
+!
+ipv6 prefix-list V6_P2P_IP permit ::/0 ge 126 le 126
+!
+route-map V4_CONNECTED_ROUTES permit 10
+  match ip address prefix-list V4_P2P_IP
+  call HIDE_INTERNAL
+!
+route-map V6_CONNECTED_ROUTES permit 10
+  match ipv6 address prefix-list V6_P2P_IP
+  call HIDE_INTERNAL
+!
+route-map HIDE_INTERNAL permit 10
+  set community no-export
+!
+!
+router bgp 55555
+!
+  bgp log-neighbor-changes
+  bgp suppress-fib-pending
+  no bgp default ipv4-unicast
+  no bgp ebgp-requires-policy
+!
+  bgp bestpath as-path multipath-relax
+!
+!
+!
+  network 55.55.55.55/32
+!
+  address-family ipv6
+    network fc00::1/64
+    network fc00::1/128 route-map HIDE_INTERNAL
+  exit-address-family
+!
+  network 10.10.10.1/24
+  address-family ipv6
+   network fc01::1/64
+  exit-address-family
+!
+  address-family ipv4
+    redistribute connected route-map V4_CONNECTED_ROUTES
+  exit-address-family
+  address-family ipv6
+    redistribute connected route-map V6_CONNECTED_ROUTES
+  exit-address-family
+!
+  address-family ipv4
+    maximum-paths 64
+  exit-address-family
+  address-family ipv6
+    maximum-paths 64
+  exit-address-family
+!
+! end of template: bgpd/bgpd.main.conf.j2
+!
diff --git a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/packet_chassis_ipv6_lo4096.json b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/packet_chassis_ipv6_lo4096.json
new file mode 100644
index 000000000..34bc6b339
--- /dev/null
+++ b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/packet_chassis_ipv6_lo4096.json
@@ -0,0 +1,35 @@
+{
+    "DEVICE_METADATA": {
+        "localhost": {
+            "bgp_asn": "55555",
+            "sub_role": "FrontEnd",
+            "switch_type": "chassis-packet",
+            "type": "SpineRouter"
+        }
+    },
+    "LOOPBACK_INTERFACE": {
+        "Loopback0|55.55.55.55/32": {},
+        "Loopback0|fc00::1/128": {},
+        "Loopback4096|fc00::2/128": {}
+    },
+    "VLAN_INTERFACE": {
+        "Vlan10|10.10.10.1/24": {},
+        "Vlan10|fc01::1/64": {},
+        "Vlan20": {"vnet_name": "Vnet1"},
+        "Vlan20|20.20.20.1/24": {},
+        "Vlan20|fd01::1/64": {}
+    },
+    "constants": {
+        "bgp": {
+            "multipath_relax": {
+                "enabled": true
+            },
+            "graceful_restart": {
+                "enabled": true
+            },
+            "maximum_paths": {
+                "enabled": true
+            }
+        }
+    }
+}
diff --git a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/packet_chassis_ipv6_lo4096_router_id.conf b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/packet_chassis_ipv6_lo4096_router_id.conf
new file mode 100644
index 000000000..213872f45
--- /dev/null
+++ b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/packet_chassis_ipv6_lo4096_router_id.conf
@@ -0,0 +1,73 @@
+!
+! template: bgpd/bgpd.main.conf.j2
+!
+! bgp multiple-instance
+!
+! BGP configuration
+!
+! TSA configuration
+!
+ip prefix-list PL_LoopbackV4 permit 55.55.55.55/32
+!
+ipv6 prefix-list PL_LoopbackV6 permit fc00::/64
+!
+ip prefix-list LOCAL_VLAN_IPV4_PREFIX seq 5 permit 10.10.10.0/24
+!
+ipv6 prefix-list LOCAL_VLAN_IPV6_PREFIX seq 10 permit fc01::/64
+!
+ip prefix-list V4_P2P_IP permit 0.0.0.0/0 ge 31 le 31
+!
+ipv6 prefix-list V6_P2P_IP permit ::/0 ge 126 le 126
+!
+route-map V4_CONNECTED_ROUTES permit 10
+  match ip address prefix-list V4_P2P_IP
+  call HIDE_INTERNAL
+!
+route-map V6_CONNECTED_ROUTES permit 10
+  match ipv6 address prefix-list V6_P2P_IP
+  call HIDE_INTERNAL
+!
+route-map HIDE_INTERNAL permit 10
+  set community no-export
+!
+!
+router bgp 55555
+!
+  bgp log-neighbor-changes
+  bgp suppress-fib-pending
+  no bgp default ipv4-unicast
+  no bgp ebgp-requires-policy
+!
+  bgp bestpath as-path multipath-relax
+!
+!
+  bgp router-id 8.8.8.8
+!
+  network 55.55.55.55/32
+!
+  address-family ipv6
+    network fc00::1/64
+    network fc00::1/128 route-map HIDE_INTERNAL
+  exit-address-family
+!
+  network 10.10.10.1/24
+  address-family ipv6
+   network fc01::1/64
+  exit-address-family
+!
+  address-family ipv4
+    redistribute connected route-map V4_CONNECTED_ROUTES
+  exit-address-family
+  address-family ipv6
+    redistribute connected route-map V6_CONNECTED_ROUTES
+  exit-address-family
+!
+  address-family ipv4
+    maximum-paths 64
+  exit-address-family
+  address-family ipv6
+    maximum-paths 64
+  exit-address-family
+!
+! end of template: bgpd/bgpd.main.conf.j2
+!
diff --git a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/packet_chassis_ipv6_lo4096_router_id.json b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/packet_chassis_ipv6_lo4096_router_id.json
new file mode 100644
index 000000000..8ff0d8afb
--- /dev/null
+++ b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/packet_chassis_ipv6_lo4096_router_id.json
@@ -0,0 +1,36 @@
+{
+    "DEVICE_METADATA": {
+        "localhost": {
+            "bgp_asn": "55555",
+            "sub_role": "FrontEnd",
+            "switch_type": "chassis-packet",
+            "type": "SpineRouter",
+            "bgp_router_id": "8.8.8.8"
+        }
+    },
+    "LOOPBACK_INTERFACE": {
+        "Loopback0|55.55.55.55/32": {},
+        "Loopback0|fc00::1/128": {},
+        "Loopback4096|fc00::2/128": {}
+    },
+    "VLAN_INTERFACE": {
+        "Vlan10|10.10.10.1/24": {},
+        "Vlan10|fc01::1/64": {},
+        "Vlan20": {"vnet_name": "Vnet1"},
+        "Vlan20|20.20.20.1/24": {},
+        "Vlan20|fd01::1/64": {}
+    },
+    "constants": {
+        "bgp": {
+            "multipath_relax": {
+                "enabled": true
+            },
+            "graceful_restart": {
+                "enabled": true
+            },
+            "maximum_paths": {
+                "enabled": true
+            }
+        }
+    }
+}
diff --git a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/packet_chassis_router_id.conf b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/packet_chassis_router_id.conf
new file mode 100644
index 000000000..213872f45
--- /dev/null
+++ b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/packet_chassis_router_id.conf
@@ -0,0 +1,73 @@
+!
+! template: bgpd/bgpd.main.conf.j2
+!
+! bgp multiple-instance
+!
+! BGP configuration
+!
+! TSA configuration
+!
+ip prefix-list PL_LoopbackV4 permit 55.55.55.55/32
+!
+ipv6 prefix-list PL_LoopbackV6 permit fc00::/64
+!
+ip prefix-list LOCAL_VLAN_IPV4_PREFIX seq 5 permit 10.10.10.0/24
+!
+ipv6 prefix-list LOCAL_VLAN_IPV6_PREFIX seq 10 permit fc01::/64
+!
+ip prefix-list V4_P2P_IP permit 0.0.0.0/0 ge 31 le 31
+!
+ipv6 prefix-list V6_P2P_IP permit ::/0 ge 126 le 126
+!
+route-map V4_CONNECTED_ROUTES permit 10
+  match ip address prefix-list V4_P2P_IP
+  call HIDE_INTERNAL
+!
+route-map V6_CONNECTED_ROUTES permit 10
+  match ipv6 address prefix-list V6_P2P_IP
+  call HIDE_INTERNAL
+!
+route-map HIDE_INTERNAL permit 10
+  set community no-export
+!
+!
+router bgp 55555
+!
+  bgp log-neighbor-changes
+  bgp suppress-fib-pending
+  no bgp default ipv4-unicast
+  no bgp ebgp-requires-policy
+!
+  bgp bestpath as-path multipath-relax
+!
+!
+  bgp router-id 8.8.8.8
+!
+  network 55.55.55.55/32
+!
+  address-family ipv6
+    network fc00::1/64
+    network fc00::1/128 route-map HIDE_INTERNAL
+  exit-address-family
+!
+  network 10.10.10.1/24
+  address-family ipv6
+   network fc01::1/64
+  exit-address-family
+!
+  address-family ipv4
+    redistribute connected route-map V4_CONNECTED_ROUTES
+  exit-address-family
+  address-family ipv6
+    redistribute connected route-map V6_CONNECTED_ROUTES
+  exit-address-family
+!
+  address-family ipv4
+    maximum-paths 64
+  exit-address-family
+  address-family ipv6
+    maximum-paths 64
+  exit-address-family
+!
+! end of template: bgpd/bgpd.main.conf.j2
+!
diff --git a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/packet_chassis_router_id.json b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/packet_chassis_router_id.json
new file mode 100644
index 000000000..9b037b681
--- /dev/null
+++ b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/packet_chassis_router_id.json
@@ -0,0 +1,37 @@
+{
+    "DEVICE_METADATA": {
+        "localhost": {
+            "bgp_asn": "55555",
+            "sub_role": "FrontEnd",
+            "switch_type": "chassis-packet",
+            "type": "SpineRouter",
+            "bgp_router_id": "8.8.8.8"
+        }
+    },
+    "LOOPBACK_INTERFACE": {
+        "Loopback0|55.55.55.55/32": {},
+        "Loopback0|fc00::1/128": {},
+        "Loopback4096|55.55.55.56/32": {},
+        "Loopback4096|fc00::2/128": {}
+    },
+    "VLAN_INTERFACE": {
+        "Vlan10|10.10.10.1/24": {},
+        "Vlan10|fc01::1/64": {},
+        "Vlan20": {"vnet_name": "Vnet1"},
+        "Vlan20|20.20.20.1/24": {},
+        "Vlan20|fd01::1/64": {}
+    },
+    "constants": {
+        "bgp": {
+            "multipath_relax": {
+                "enabled": true
+            },
+            "graceful_restart": {
+                "enabled": true
+            },
+            "maximum_paths": {
+                "enabled": true
+            }
+        }
+    }
+}
diff --git a/src/sonic-bgpcfgd/tests/test_bgp.py b/src/sonic-bgpcfgd/tests/test_bgp.py
index 6add8eaf0..5b494af4d 100644
--- a/src/sonic-bgpcfgd/tests/test_bgp.py
+++ b/src/sonic-bgpcfgd/tests/test_bgp.py
@@ -21,7 +21,7 @@ def load_constant_files():
     return constant_files
 
 
-def constructor(constants_path, with_lo0_ipv4=True, bgp_router_id=""):
+def constructor(constants_path, bgp_router_id="", peer_type="general", with_lo0_ipv4=True, with_lo4096_ipv4=False):
     cfg_mgr = MagicMock()
     constants = load_constants(constants_path)['constants']
     common_objs = {
@@ -37,14 +37,16 @@ def constructor(constants_path, with_lo0_ipv4=True, bgp_router_id=""):
     }
 
     bgpcfgd.managers_bgp.run_command = lambda cmd: return_value_map[str(cmd)]
-    m = bgpcfgd.managers_bgp.BGPPeerMgrBase(common_objs, "CONFIG_DB", swsscommon.CFG_BGP_NEIGHBOR_TABLE_NAME, "general", True)
-    assert m.peer_type == "general"
+    m = bgpcfgd.managers_bgp.BGPPeerMgrBase(common_objs, "CONFIG_DB", swsscommon.CFG_BGP_NEIGHBOR_TABLE_NAME, peer_type, True)
+    assert m.peer_type == peer_type
     assert m.check_neig_meta == ('bgp' in constants and 'use_neighbors_meta' in constants['bgp'] and constants['bgp']['use_neighbors_meta'])
 
     localhost_obj = {"bgp_asn": "65100"}
     if len(bgp_router_id) != 0:
         localhost_obj["bgp_router_id"] = bgp_router_id
     m.directory.put("CONFIG_DB", swsscommon.CFG_DEVICE_METADATA_TABLE_NAME, "localhost", localhost_obj)
+    if with_lo4096_ipv4:
+        m.directory.put("CONFIG_DB", swsscommon.CFG_LOOPBACK_INTERFACE_TABLE_NAME, "Loopback4096|11.11.11.11/32", {})
     if with_lo0_ipv4:
         m.directory.put("CONFIG_DB", swsscommon.CFG_LOOPBACK_INTERFACE_TABLE_NAME, "Loopback0|11.11.11.11/32", {})
     m.directory.put("CONFIG_DB", swsscommon.CFG_LOOPBACK_INTERFACE_TABLE_NAME, "Loopback0|FC00:1::32/128", {})
@@ -104,6 +106,28 @@ def test_add_peer():
         res = m.set_handler("30.30.30.1", {'asn': '65200', 'holdtime': '180', 'keepalive': '60', 'local_addr': '30.30.30.30', 'name': 'TOR', 'nhopself': '0', 'rrclient': '0'})
         assert res, "Expect True return value"
 
+def test_add_peer_internal():
+    for constant in load_constant_files():
+        m = constructor(constant, peer_type="internal", with_lo4096_ipv4=True)
+        res = m.set_handler("30.30.30.1", {'asn': '65200', 'holdtime': '180', 'keepalive': '60', 'local_addr': '30.30.30.30', 'name': 'TOR', 'nhopself': '0', 'rrclient': '0'})
+        assert res, "Expect True return value"
+
+def test_add_peer_internal_no_router_id_no_lo4096():
+    for constant in load_constant_files():
+        m = constructor(constant, peer_type="internal")
+        res = m.set_handler("30.30.30.1", {'asn': '65200', 'holdtime': '180', 'keepalive': '60', 'local_addr': '30.30.30.30', 'name': 'TOR', 'nhopself': '0', 'rrclient': '0'})
+        assert not res, "Expect False return value"
+
+def test_add_peer_internal_router_id():
+    for constant in load_constant_files():
+        m = constructor(constant,  bgp_router_id="8.8.8.8", peer_type="internal", with_lo4096_ipv4=True)
+        res = m.set_handler("30.30.30.1", {'asn': '65200', 'holdtime': '180', 'keepalive': '60', 'local_addr': '30.30.30.30', 'name': 'TOR', 'nhopself': '0', 'rrclient': '0'})
+        assert res, "Expect True return value"
+
+def test_add_peer_internal_router_id_no_lo4096():
+    for constant in load_constant_files():
+        m = constructor(constant, bgp_router_id="8.8.8.8", peer_type="internal")
+
 def test_add_peer_router_id():
     for constant in load_constant_files():
         m = constructor(constant, bgp_router_id="8.8.8.8")
@@ -118,7 +142,7 @@ def test_add_peer_without_lo_ipv4():
 
 def test_add_peer_without_lo_ipv4_router_id():
     for constant in load_constant_files():
-        m = constructor(constant, with_lo0_ipv4=False, bgp_router_id="8.8.8.8")
+        m = constructor(constant, bgp_router_id="8.8.8.8", with_lo0_ipv4=False)
         res = m.set_handler("30.30.30.1", {'asn': '65200', 'holdtime': '180', 'keepalive': '60', 'local_addr': '30.30.30.30', 'name': 'TOR', 'nhopself': '0', 'rrclient': '0'})
         assert res, "Expect True return value"
 
diff --git a/src/sonic-bgpcfgd/tests/test_sonic-cfggen.py b/src/sonic-bgpcfgd/tests/test_sonic-cfggen.py
index d230197b7..b5685b733 100644
--- a/src/sonic-bgpcfgd/tests/test_sonic-cfggen.py
+++ b/src/sonic-bgpcfgd/tests/test_sonic-cfggen.py
@@ -24,6 +24,9 @@ def run_test(name, template_path, json_path, match_path):
     with open(match_path) as result_fp:
         raw_saved_result = result_fp.read()
     canonical_saved_result = ConfigMgr.to_canonical(raw_saved_result)
+    print(canonical_generated_result)
+    print("----")
+    print(canonical_saved_result)
     assert canonical_saved_result == canonical_generated_result, "Test %s" % name
 
 
@@ -153,6 +156,24 @@ def test_bgp_conf_all():
              "bgpd.conf.j2/all.json",
              "bgpd.conf.j2/all.conf")
 
+def test_bgp_conf_packet_chassis_ipv6_lo4096():
+    run_test("packet chassis ipv6 loopback4096 bgpd.main.conf.j2",
+             "bgpd/bgpd.main.conf.j2",
+             "bgpd.main.conf.j2/packet_chassis_ipv6_lo4096.json",
+             "bgpd.main.conf.j2/packet_chassis_ipv6_lo4096.conf")
+
+def test_bgp_conf_packet_chassis_ipv6_lo4096_router_id():
+    run_test("packet chassis ipv6 loopback4096 with router_id bgpd.main.conf.j2",
+             "bgpd/bgpd.main.conf.j2",
+             "bgpd.main.conf.j2/packet_chassis_ipv6_lo4096_router_id.json",
+             "bgpd.main.conf.j2/packet_chassis_ipv6_lo4096_router_id.conf")
+
+def test_bgp_conf_packet_chassis_router_id():
+    run_test("packet chassis with router_id bgpd.main.conf.j2",
+             "bgpd/bgpd.main.conf.j2",
+             "bgpd.main.conf.j2/packet_chassis_router_id.json",
+             "bgpd.main.conf.j2/packet_chassis_router_id.conf")
+
 def test_bgpd_main_conf_lo0_ipv6_only():
     run_test("Base bgpd.main.conf.j2",
              "bgpd/bgpd.main.conf.j2",
@@ -170,4 +191,3 @@ def test_bgpd_main_conf_defaults_router_id():
              "bgpd/bgpd.main.conf.j2",
              "bgpd.main.conf.j2/defaults_router_id.json",
              "bgpd.main.conf.j2/defaults_router_id.conf")
-    
\ No newline at end of file

From 38fe4670d29f0418adda592dc83e288b27ef2ac1 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Thu, 16 May 2024 19:01:14 +0800
Subject: [PATCH 0588/1115] [submodule] Update submodule sonic-swss to the
 latest HEAD automatically (#18969)

#### Why I did it
src/sonic-swss
```
* c36333c3 - (HEAD -> master, origin/master, origin/HEAD) New p4orch development changes (#3066) (6 hours ago) [mint570]
* 26a5a1cb - Fix flex counter out-of-order issue by notifying counter operations using SelectableChannel (#3076) (10 hours ago) [Stephen Sun]
* 2f8bd9cf - Add support for ECMP and LAG hash offset (#3138) (28 hours ago) [Kumaresh Perumal]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-swss | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-swss b/src/sonic-swss
index 2aaca4179..c36333c3d 160000
--- a/src/sonic-swss
+++ b/src/sonic-swss
@@ -1 +1 @@
-Subproject commit 2aaca41794237cb6516866da2d0c7e29e31f44d2
+Subproject commit c36333c3d7573a249991df5357955f0189ab4ada

From 9aef5610964ae42a614206ece25845a13d4ddb91 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Thu, 16 May 2024 19:01:23 +0800
Subject: [PATCH 0589/1115] [submodule] Update submodule sonic-host-services to
 the latest HEAD automatically (#18959)

#### Why I did it
src/sonic-host-services
```
* 10bfa90 - (HEAD -> master, origin/master, origin/HEAD) Add new API to support config replace (#125) (25 hours ago) [ganglv]
* 1a8ff81 - Fix issue: delayed service will not be restarted if swss crashes (#107) (3 days ago) [Junchao-Mellanox]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-host-services | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-host-services b/src/sonic-host-services
index aa8412986..10bfa901a 160000
--- a/src/sonic-host-services
+++ b/src/sonic-host-services
@@ -1 +1 @@
-Subproject commit aa841298691dffd1ac0b527eb784928c08547cc2
+Subproject commit 10bfa901a78d678edc7ed00187f7d97870b22e26

From 0a6160acb33046cfa62ab2728b0f97c70afb99fb Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Fri, 17 May 2024 04:05:05 +0800
Subject: [PATCH 0590/1115] [ci/build]: Upgrade SONiC package versions (#18972)

---
 .../build-sonic-slave-bookworm/versions-py3   |  2 +-
 files/build/versions/default/versions-git     | 12 +++----
 files/build/versions/default/versions-mirror  | 28 ++++++++--------
 files/build/versions/default/versions-web     |  2 +-
 .../versions-deb-buster                       |  2 +-
 .../dockers/docker-dhcp-relay/versions-py3    |  2 +-
 .../dockers/docker-ptf/versions-deb-buster    |  4 +--
 .../docker-sflow/versions-deb-bookworm        | 33 +++++++++++++++++++
 .../docker-sflow/versions-deb-bullseye        | 30 -----------------
 .../versions-deb-buster                       |  2 +-
 .../dockers/sonic-slave-bookworm/versions-py3 |  2 +-
 .../dockers/sonic-slave-bullseye/versions-py3 |  2 +-
 .../sonic-slave-buster/versions-deb-buster    | 10 +++---
 .../dockers/sonic-slave-buster/versions-py3   |  2 +-
 .../versions/host-image/versions-deb-bookworm |  1 +
 15 files changed, 69 insertions(+), 65 deletions(-)
 create mode 100644 files/build/versions/dockers/docker-sflow/versions-deb-bookworm
 delete mode 100644 files/build/versions/dockers/docker-sflow/versions-deb-bullseye

diff --git a/files/build/versions/build/build-sonic-slave-bookworm/versions-py3 b/files/build/versions/build/build-sonic-slave-bookworm/versions-py3
index 8007697ea..322deae41 100644
--- a/files/build/versions/build/build-sonic-slave-bookworm/versions-py3
+++ b/files/build/versions/build/build-sonic-slave-bookworm/versions-py3
@@ -9,7 +9,7 @@ docker==7.0.0
 docker-image-py==0.1.12
 enlighten==1.12.4
 filelock==3.14.0
-freezegun==1.5.0
+freezegun==1.5.1
 ijson==3.2.3
 ipaddress==1.0.23
 jsondiff==2.0.0
diff --git a/files/build/versions/default/versions-git b/files/build/versions/default/versions-git
index f52de7666..41a9a05eb 100644
--- a/files/build/versions/default/versions-git
+++ b/files/build/versions/default/versions-git
@@ -1,11 +1,11 @@
-https://chromium.googlesource.com/chromium/tools/depot_tools.git==a9b9284faf89cd1a426371237df8307c328cc818
+https://chromium.googlesource.com/chromium/tools/depot_tools.git==5a86d1cc3934b7a388c29b6005f64675c56c9949
 https://github.com/aristanetworks/swi-tools.git==b5f087e4774168bf536360d43c9c509c8f14ad9f
 https://github.com/CESNET/libyang.git==4c733412e7173219166be7053940326a92699765
 https://github.com/daveolson53/audisp-tacplus.git==559c9f22edd4f2dea0ecedffb3ad9502b12a75b6
 https://github.com/daveolson53/libnss-tacplus.git==19008ab68d9d504aa58eb34d5f564755a1613b8b
 https://github.com/dyninc/OpenBFDD.git==e35f43ad8d2b3f084e96a84c392528a90d05a287
-https://github.com/flashrom/flashrom.git==a67b7963a0f8f671fe3d3db54c803a068b93f2c4
-https://github.com/FreeRADIUS/freeradius-server.git==ae174ae97d3274cb168a87e445348845b1da07a2
+https://github.com/flashrom/flashrom.git==e177e77f9fa2ee0a1bd459df27558528d8dabc8e
+https://github.com/FreeRADIUS/freeradius-server.git==e42947b083e77e0c6fc5d2c4de090f5d18eb06ae
 https://github.com/FreeRADIUS/pam_radius.git==d802da75cbfc3062ae1b18d0bf26ac2a030ffdaa
 https://github.com/jeroennijhof/pam_tacplus.git==b839c440e33c36eced9dcbc287fcfe6237c4c4ce
 https://github.com/lguohan/gnxi.git==3adf8b97755b49947e465b5a14645f11e79fa0cd
@@ -15,7 +15,7 @@ https://github.com/p4lang/ptf.git==c554f83685186be4cfa9387eb5d6d700d2bbd7c0
 https://github.com/p4lang/scapy-vxlan.git==85ffe83da156568ee47a0750f638227e6e1d7479
 https://github.com/sflow/host-sflow==6edc82d62a1cf0f7fb821587af67e5520624f50d
 https://github.com/sflow/sflowtool==c42c49cb80b927a4c02e54fc26430417f18f4833
-https://github.com/thom311/libnl==7cc72d19f84698a194bee843af66be9be6179baa
-https://salsa.debian.org/kernel-team/initramfs-tools.git==cf964bfb4362019fd7fba1e839e403ff950dca8e
+https://github.com/thom311/libnl==6db85366264c9c83e0d53995bfb68e0150184cb4
+https://salsa.debian.org/kernel-team/initramfs-tools.git==8801fda185d2accf39c4095858f76089799bfc7e
 https://salsa.debian.org/sk-guest/monit.git==c9da7ebb1f35dfba17b50b5969a6e75e29cbec0d
-https://salsa.debian.org/ssh-team/openssh.git==52d8a44435f69123efb98d0e7c128b4a81e8aacb
+https://salsa.debian.org/ssh-team/openssh.git==703b8198a123f57fd09e555a4c62b2d55273d57b
diff --git a/files/build/versions/default/versions-mirror b/files/build/versions/default/versions-mirror
index c699c20d0..f19837189 100644
--- a/files/build/versions/default/versions-mirror
+++ b/files/build/versions/default/versions-mirror
@@ -1,20 +1,20 @@
 deb.nodesource.com_node%5f14.x_dists_bookworm==2023-02-17T00:35:29Z
 deb.nodesource.com_node%5f14.x_dists_bullseye==2023-02-17T00:35:28Z
 deb.nodesource.com_node%5f14.x_dists_buster==2023-02-17T00:35:28Z
-debian==20240510T000228Z
-debian-security==20240510T000251Z
+debian==20240514T000307Z
+debian-security==20240514T000247Z
 download.docker.com_linux_debian_dists_bookworm==2024-05-10T08:31:56Z
 download.docker.com_linux_debian_dists_bullseye==2024-05-10T08:31:56Z
 download.docker.com_linux_debian_dists_buster==2024-05-09T09:19:41Z
-packages.trafficmanager.net_snapshot_debian-security_20240510T000251Z_dists_bookworm-security==2024-05-09T22:23:01Z
-packages.trafficmanager.net_snapshot_debian-security_20240510T000251Z_dists_bullseye-security==2024-05-09T22:23:00Z
-packages.trafficmanager.net_snapshot_debian-security_20240510T000251Z_dists_buster_updates==2024-05-09T22:23:00Z
-packages.trafficmanager.net_snapshot_debian_20240510T000228Z_dists_bookworm==2024-02-10T11:07:25Z
-packages.trafficmanager.net_snapshot_debian_20240510T000228Z_dists_bookworm-backports==2024-05-09T20:12:26Z
-packages.trafficmanager.net_snapshot_debian_20240510T000228Z_dists_bookworm-updates==2024-05-09T20:12:26Z
-packages.trafficmanager.net_snapshot_debian_20240510T000228Z_dists_bullseye==2024-02-10T12:40:37Z
-packages.trafficmanager.net_snapshot_debian_20240510T000228Z_dists_bullseye-backports==2024-05-09T20:12:26Z
-packages.trafficmanager.net_snapshot_debian_20240510T000228Z_dists_bullseye-updates==2024-05-09T20:12:26Z
-packages.trafficmanager.net_snapshot_debian_20240510T000228Z_dists_buster==2023-06-10T08:53:33Z
-packages.trafficmanager.net_snapshot_debian_20240510T000228Z_dists_buster-backports==2024-03-09T20:54:54Z
-packages.trafficmanager.net_snapshot_debian_20240510T000228Z_dists_buster-updates==2023-06-10T08:55:10Z
+packages.trafficmanager.net_snapshot_debian-security_20240514T000247Z_dists_bookworm-security==2024-05-13T21:03:23Z
+packages.trafficmanager.net_snapshot_debian-security_20240514T000247Z_dists_bullseye-security==2024-05-13T21:03:22Z
+packages.trafficmanager.net_snapshot_debian-security_20240514T000247Z_dists_buster_updates==2024-05-13T21:03:21Z
+packages.trafficmanager.net_snapshot_debian_20240514T000307Z_dists_bookworm==2024-02-10T11:07:25Z
+packages.trafficmanager.net_snapshot_debian_20240514T000307Z_dists_bookworm-backports==2024-05-13T20:15:31Z
+packages.trafficmanager.net_snapshot_debian_20240514T000307Z_dists_bookworm-updates==2024-05-13T20:15:31Z
+packages.trafficmanager.net_snapshot_debian_20240514T000307Z_dists_bullseye==2024-02-10T12:40:37Z
+packages.trafficmanager.net_snapshot_debian_20240514T000307Z_dists_bullseye-backports==2024-05-13T20:15:31Z
+packages.trafficmanager.net_snapshot_debian_20240514T000307Z_dists_bullseye-updates==2024-05-13T20:15:31Z
+packages.trafficmanager.net_snapshot_debian_20240514T000307Z_dists_buster==2023-06-10T08:53:33Z
+packages.trafficmanager.net_snapshot_debian_20240514T000307Z_dists_buster-backports==2024-03-09T20:54:54Z
+packages.trafficmanager.net_snapshot_debian_20240514T000307Z_dists_buster-updates==2023-06-10T08:55:10Z
diff --git a/files/build/versions/default/versions-web b/files/build/versions/default/versions-web
index 15e5c9815..4ef245014 100644
--- a/files/build/versions/default/versions-web
+++ b/files/build/versions/default/versions-web
@@ -14,7 +14,7 @@ http://deb.debian.org/debian/pool/main/l/lm-sensors/lm-sensors_3.6.0.orig.tar.gz
 http://deb.debian.org/debian/pool/main/p/protobuf/protobuf_3.21.12-3.debian.tar.xz==f457e44218a7d4cc7b7ab0ed696096e3
 http://deb.debian.org/debian/pool/main/p/protobuf/protobuf_3.21.12-3.dsc==d8e34e7b07473c6903f9d245934524fb
 http://deb.debian.org/debian/pool/main/p/protobuf/protobuf_3.21.12.orig.tar.gz==d38562490234d8080bdbe8eb7baf937a
-http://www.iana.org/assignments/enterprise-numbers.txt==1ab53990feba6e1917592d0b085740ff
+http://www.iana.org/assignments/enterprise-numbers.txt==a34d6d99898f7230f1bc9c8087923818
 http://www.mellanox.com/downloads/MFT/mft-4.27.0-83-x86_64-deb.tgz==e475ca87a9252ba8d0abb6b05d5d94d0
 https://archive.apache.org/dist/thrift/0.14.1/thrift-0.14.1.tar.gz==c64434548438df2cb1e53fb27c600e85
 https://bootstrap.pypa.io/pip/2.7/get-pip.py==60e8267eb1b7bc71dc4843eb7bd294d3
diff --git a/files/build/versions/dockers/docker-config-engine-buster/versions-deb-buster b/files/build/versions/dockers/docker-config-engine-buster/versions-deb-buster
index f6ec0e97a..da9912ab6 100644
--- a/files/build/versions/dockers/docker-config-engine-buster/versions-deb-buster
+++ b/files/build/versions/dockers/docker-config-engine-buster/versions-deb-buster
@@ -8,7 +8,7 @@ libc-dev-bin==2.28-10+deb10u3
 libc6==2.28-10+deb10u3
 libc6-dev==2.28-10+deb10u3
 libdpkg-perl==1.19.8
-libglib2.0-0==2.58.3-2+deb10u5
+libglib2.0-0==2.58.3-2+deb10u6
 libhiredis0.14==0.14.0-3
 libicu-dev==63.1-6+deb10u3
 libicu63==63.1-6+deb10u3
diff --git a/files/build/versions/dockers/docker-dhcp-relay/versions-py3 b/files/build/versions/dockers/docker-dhcp-relay/versions-py3
index 23bb524eb..7d60ac8db 100644
--- a/files/build/versions/dockers/docker-dhcp-relay/versions-py3
+++ b/files/build/versions/dockers/docker-dhcp-relay/versions-py3
@@ -1,3 +1,3 @@
-freezegun==1.5.0
+freezegun==1.5.1
 psutil==5.9.8
 python-dateutil==2.9.0.post0
diff --git a/files/build/versions/dockers/docker-ptf/versions-deb-buster b/files/build/versions/dockers/docker-ptf/versions-deb-buster
index 518fcc70e..dd4ff86f9 100644
--- a/files/build/versions/dockers/docker-ptf/versions-deb-buster
+++ b/files/build/versions/dockers/docker-ptf/versions-deb-buster
@@ -174,8 +174,8 @@ libgirepository-1.0-1==1.58.3-2
 libgl1==1.1.0-1
 libgl1-mesa-dri==18.3.6-2+deb10u1
 libglapi-mesa==18.3.6-2+deb10u1
-libglib2.0-0==2.58.3-2+deb10u5
-libglib2.0-data==2.58.3-2+deb10u5
+libglib2.0-0==2.58.3-2+deb10u6
+libglib2.0-data==2.58.3-2+deb10u6
 libglvnd0==1.1.0-1
 libglx-mesa0==18.3.6-2+deb10u1
 libglx0==1.1.0-1
diff --git a/files/build/versions/dockers/docker-sflow/versions-deb-bookworm b/files/build/versions/dockers/docker-sflow/versions-deb-bookworm
new file mode 100644
index 000000000..d4868ac3d
--- /dev/null
+++ b/files/build/versions/dockers/docker-sflow/versions-deb-bookworm
@@ -0,0 +1,33 @@
+dmidecode==3.4-1
+gdb==13.1-3
+gdbserver==13.1-3
+hsflowd==2.0.51-26
+hsflowd-dbgsym==2.0.51-26
+libbabeltrace1==1.5.11-1+b2
+libboost-regex1.74.0==1.74.0+ds1-21
+libcbor0.8==0.8.0-2+b1
+libcurl3-gnutls==7.88.1-10+deb12u5
+libdebuginfod-common==0.188-2.1
+libdebuginfod1==0.188-2.1
+libdw1==0.188-2.1
+libedit2==3.1-20221030-2
+libfido2-1==1.12.0-2+b1
+libglib2.0-0==2.74.6-2+deb12u2
+libgpm2==1.20.7-10+b1
+libicu72==72.1-3
+libipt2==2.0.5-1
+libmpfr6==4.2.0-1
+libsource-highlight-common==3.1.9-4.2
+libsource-highlight4v5==3.1.9-4.2+b3
+libswsscommon-dbgsym==1.0.0
+libunwind8==1.6.2-3
+openssh-client==1:9.2p1-2+deb12u2
+psample==1.1-1
+sensible-utils==0.0.17+nmu1
+sflowtool==5.04
+sshpass==1.09-1+b1
+strace==6.1-0.1
+swss-dbg==1.0.0
+ucf==3.0043+nmu1
+vim==2:9.0.1378-2
+vim-runtime==2:9.0.1378-2
diff --git a/files/build/versions/dockers/docker-sflow/versions-deb-bullseye b/files/build/versions/dockers/docker-sflow/versions-deb-bullseye
deleted file mode 100644
index 351cd8237..000000000
--- a/files/build/versions/dockers/docker-sflow/versions-deb-bullseye
+++ /dev/null
@@ -1,30 +0,0 @@
-dmidecode==3.3-2
-gdb==10.1-1.7
-gdbserver==10.1-1.7
-hsflowd==2.0.51-26
-hsflowd-dbg==2.0.51-26
-libbabeltrace1==1.5.8-1+b3
-libboost-regex1.74.0==1.74.0-9
-libcbor0==0.5.0+dfsg-2
-libcurl3-gnutls==7.74.0-1.3+deb11u11
-libdebuginfod1==0.183-1
-libdw1==0.183-1
-libedit2==3.1-20191231-2+b1
-libfido2-1==1.6.0-2
-libglib2.0-0==2.66.8-1+deb11u3
-libgpm2==1.20.7-8
-libicu67==67.1-7
-libipt2==2.0.3-1
-libmpfr6==4.1.0-3
-libsource-highlight-common==3.1.9-3
-libsource-highlight4v5==3.1.9-3+b1
-libswsscommon-dbgsym==1.0.0
-libunwind8==1.3.2-2
-openssh-client==1:8.4p1-5+deb11u3
-psample==1.1-1
-sflowtool==5.04
-sshpass==1.09-1+b1
-strace==5.10-1
-swss-dbg==1.0.0
-vim==2:8.2.2434-3+deb11u1
-vim-runtime==2:8.2.2434-3+deb11u1
diff --git a/files/build/versions/dockers/docker-sonic-mgmt-framework/versions-deb-buster b/files/build/versions/dockers/docker-sonic-mgmt-framework/versions-deb-buster
index 84f912677..9515fdc04 100644
--- a/files/build/versions/dockers/docker-sonic-mgmt-framework/versions-deb-buster
+++ b/files/build/versions/dockers/docker-sonic-mgmt-framework/versions-deb-buster
@@ -7,7 +7,7 @@ libcjson1==1.7.10-1.1+deb10u2
 libcurl3-gnutls==7.64.0-4+deb10u9
 libdw1==0.176-1.1+deb10u1
 libedit2==3.1-20181209-1
-libglib2.0-0==2.58.3-2+deb10u5
+libglib2.0-0==2.58.3-2+deb10u6
 libgpm2==1.20.7-5
 libicu63==63.1-6+deb10u3
 libipt2==2.0-2
diff --git a/files/build/versions/dockers/sonic-slave-bookworm/versions-py3 b/files/build/versions/dockers/sonic-slave-bookworm/versions-py3
index 7781b8119..0f751c588 100644
--- a/files/build/versions/dockers/sonic-slave-bookworm/versions-py3
+++ b/files/build/versions/dockers/sonic-slave-bookworm/versions-py3
@@ -80,7 +80,7 @@ pyangbind==0.8.2
 pyasn1==0.4.8
 pyasn1-modules==0.2.8
 pyelftools==0.29
-pyfakefs==5.4.1
+pyfakefs==5.5.0
 pygments==2.14.0
 pygobject==3.42.2
 pyhamcrest==2.0.3
diff --git a/files/build/versions/dockers/sonic-slave-bullseye/versions-py3 b/files/build/versions/dockers/sonic-slave-bullseye/versions-py3
index 43bbe1c30..9481bff74 100644
--- a/files/build/versions/dockers/sonic-slave-bullseye/versions-py3
+++ b/files/build/versions/dockers/sonic-slave-bullseye/versions-py3
@@ -70,7 +70,7 @@ pyangbind==0.8.1
 pyasn1==0.4.8
 pyasn1-modules==0.2.1
 pycurl==7.43.0.6
-pyfakefs==5.4.1
+pyfakefs==5.5.0
 pygments==2.7.1
 pygobject==3.38.0
 pyhamcrest==1.9.0
diff --git a/files/build/versions/dockers/sonic-slave-buster/versions-deb-buster b/files/build/versions/dockers/sonic-slave-buster/versions-deb-buster
index 42298a846..18c959d3a 100644
--- a/files/build/versions/dockers/sonic-slave-buster/versions-deb-buster
+++ b/files/build/versions/dockers/sonic-slave-buster/versions-deb-buster
@@ -566,11 +566,11 @@ libgl1-mesa-dri==18.3.6-2+deb10u1
 libglapi-mesa==18.3.6-2+deb10u1
 libgles1==1.1.0-1
 libgles2==1.1.0-1
-libglib2.0-0==2.58.3-2+deb10u5
-libglib2.0-bin==2.58.3-2+deb10u5
-libglib2.0-data==2.58.3-2+deb10u5
-libglib2.0-dev==2.58.3-2+deb10u5
-libglib2.0-dev-bin==2.58.3-2+deb10u5
+libglib2.0-0==2.58.3-2+deb10u6
+libglib2.0-bin==2.58.3-2+deb10u6
+libglib2.0-data==2.58.3-2+deb10u6
+libglib2.0-dev==2.58.3-2+deb10u6
+libglib2.0-dev-bin==2.58.3-2+deb10u6
 libglu1-mesa==9.0.0-2.1+b3
 libglu1-mesa-dev==9.0.0-2.1+b3
 libglvnd-core-dev==1.1.0-1
diff --git a/files/build/versions/dockers/sonic-slave-buster/versions-py3 b/files/build/versions/dockers/sonic-slave-buster/versions-py3
index bb6e87156..169a0f62a 100644
--- a/files/build/versions/dockers/sonic-slave-buster/versions-py3
+++ b/files/build/versions/dockers/sonic-slave-buster/versions-py3
@@ -49,7 +49,7 @@ pyang==2.4.0
 pyangbind==0.8.1
 pycrypto==2.6.1
 pycurl==7.43.0.2
-pyfakefs==5.4.1
+pyfakefs==5.5.0
 pygments==2.3.1
 pygobject==3.30.4
 pympler==0.8
diff --git a/files/build/versions/host-image/versions-deb-bookworm b/files/build/versions/host-image/versions-deb-bookworm
index 5be3e86e8..360701181 100644
--- a/files/build/versions/host-image/versions-deb-bookworm
+++ b/files/build/versions/host-image/versions-deb-bookworm
@@ -384,6 +384,7 @@ util-linux-extra==2.38.1-5+deb12u1
 vim==2:9.0.1378-2
 vim-common==2:9.0.1378-2
 vim-runtime==2:9.0.1378-2
+wireless-regdb==2022.06.06-1
 x11-common==1:7.7+23
 xml-core==0.18+nmu1
 xxd==2:9.0.1378-2

From c710002cb3059ba26c7d7e1efdf60a5a281eee16 Mon Sep 17 00:00:00 2001
From: Arvindsrinivasan Lakshmi Narasimhan
 <55814491+arlakshm@users.noreply.github.com>
Date: Thu, 16 May 2024 14:43:33 -0700
Subject: [PATCH 0591/1115] [Chassis][Voq]Update sonic-buffer-queue and
 sonic-queue for Voq Chassis (#18875)

Why I did it

The configuration for QUEUE and BUFFER_QUEUE differs between a VOQ device and a Non-VOQ devices.
For the Voq device:
The queue and buffer queue is applied on the system port. The system port is a representation of every port in a chassis, the key for systemport consists of Linecard Name , Asic Name and portname
On a Non voq device:
the queue and buffer queue configuration is applied on the front panel port.

Due to this differences the yang models sonic-queue.yang and sonic-buffer-queue.yang does not work for Voq devices
This is address in this PR

Microsoft ADO (27252773 and 27252696):

How I did it
Update the yang model to have different CONFIG_LIST with different keys based on the following condition

when the switch_type is not present or switch_type is not voq, the yang LIST will have key of port and queue_index
when the switch_type is present and switch_type is voqhe yang LIST will have key of Linecard name, asi name, port and queue_index
How to verify it
UT and incremental config push on chassis
---
 .../tests/files/sample_config_db.json         |   1 -
 .../yang_model_tests/tests/buffer_queue.json  |   3 +
 .../tests/yang_model_tests/tests/qos.json     |   3 +
 .../tests_config/buffer_queue.json            | 256 +++++++++++-------
 .../yang_model_tests/tests_config/qos.json    |  63 +++++
 .../yang-models/sonic-buffer-queue.yang       |  55 ++++
 .../yang-models/sonic-queue.yang              |  60 +++-
 7 files changed, 334 insertions(+), 107 deletions(-)

diff --git a/src/sonic-yang-models/tests/files/sample_config_db.json b/src/sonic-yang-models/tests/files/sample_config_db.json
index 9dc0b75e0..b6e6ef070 100644
--- a/src/sonic-yang-models/tests/files/sample_config_db.json
+++ b/src/sonic-yang-models/tests/files/sample_config_db.json
@@ -362,7 +362,6 @@
                 "region": "usfoo",
                 "asic_name": "Asic0",
                 "switch_id": "2",
-                "switch_type": "voq",
                 "max_cores": "8",
                 "sub_role": "FrontEnd",
                 "dhcp_server": "disabled",
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/buffer_queue.json b/src/sonic-yang-models/tests/yang_model_tests/tests/buffer_queue.json
index d6e05eeaf..32619dcd5 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests/buffer_queue.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests/buffer_queue.json
@@ -13,5 +13,8 @@
     "BUFFER_QUEUE_WRONG_PORT_VALUE": {
         "desc": "BUFFER_QUEUE_WRONG_PORT_VALUE pattern failure",
         "eStr": "wrong"
+    },
+    "VOQ_BUFFER_QUEUE_CONFIG": {
+        "desc": "VOQ_BUFFER_QUEUE_CONFIG has no failure"
     }
 }
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/qos.json b/src/sonic-yang-models/tests/yang_model_tests/tests/qos.json
index 47905cadf..3b0199106 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests/qos.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests/qos.json
@@ -85,5 +85,8 @@
     "QUEUE_WRED_NOT_EXIST": {
         "desc": "Referring non-existing WRED table.",
         "eStrKey" : "LeafRef"
+    },
+    "VOQ_QUEUE_CONFIG": {
+        "desc": "Attach scheduler and wred profiles to VOQ."
     }
 }
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/buffer_queue.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/buffer_queue.json
index e737c1296..91a39a89e 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/buffer_queue.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/buffer_queue.json
@@ -3,51 +3,51 @@
         "sonic-port:sonic-port": {
             "sonic-port:PORT": {
                 "PORT_LIST": [
-                {
-                    "admin_status": "up",
-                    "alias": "eth0",
-                    "description": "Ethernet0",
-                    "lanes": "65",
-                    "mtu": "9000",
-                    "name": "Ethernet4",
-                    "tpid": "0x8100",
-                    "speed": "25000"
-                }
+                    {
+                        "admin_status": "up",
+                        "alias": "eth0",
+                        "description": "Ethernet0",
+                        "lanes": "65",
+                        "mtu": "9000",
+                        "name": "Ethernet4",
+                        "tpid": "0x8100",
+                        "speed": "25000"
+                    }
                 ]
             }
         },
         "sonic-buffer-pool:sonic-buffer-pool": {
             "sonic-buffer-pool:BUFFER_POOL": {
                 "BUFFER_POOL_LIST": [
-                {
-                    "name": "egress_lossless_pool",
-                    "mode": "static",
-                    "size": "12766208",
-                    "type": "ingress"
-                }
+                    {
+                        "name": "egress_lossless_pool",
+                        "mode": "static",
+                        "size": "12766208",
+                        "type": "ingress"
+                    }
                 ]
             }
         },
         "sonic-buffer-profile:sonic-buffer-profile": {
             "sonic-buffer-profile:BUFFER_PROFILE": {
                 "BUFFER_PROFILE_LIST": [
-                {
-                    "name": "lossless_buffer_profile",
-                    "size": 1518,
-                    "dynamic_th": "2",
-                    "pool": "egress_lossless_pool"
-                }
+                    {
+                        "name": "lossless_buffer_profile",
+                        "size": 1518,
+                        "dynamic_th": "2",
+                        "pool": "egress_lossless_pool"
+                    }
                 ]
             }
         },
         "sonic-buffer-queue:sonic-buffer-queue": {
             "sonic-buffer-queue:BUFFER_QUEUE": {
                 "BUFFER_QUEUE_LIST": [
-                {
-                    "port": "Ethernet4",
-                    "qindex": "15",
-                    "profile": "lossless_buffer_profile"
-                }
+                    {
+                        "port": "Ethernet4",
+                        "qindex": "15",
+                        "profile": "lossless_buffer_profile"
+                    }
                 ]
             }
         }
@@ -56,50 +56,50 @@
         "sonic-port:sonic-port": {
             "sonic-port:PORT": {
                 "PORT_LIST": [
-                {
-                    "admin_status": "up",
-                    "alias": "eth0",
-                    "description": "Ethernet0",
-                    "lanes": "65",
-                    "mtu": "9000",
-                    "name": "Ethernet4",
-                    "tpid": "0x8100",
-                    "speed": "25000"
-                }
+                    {
+                        "admin_status": "up",
+                        "alias": "eth0",
+                        "description": "Ethernet0",
+                        "lanes": "65",
+                        "mtu": "9000",
+                        "name": "Ethernet4",
+                        "tpid": "0x8100",
+                        "speed": "25000"
+                    }
                 ]
             }
         },
         "sonic-buffer-pool:sonic-buffer-pool": {
             "sonic-buffer-pool:BUFFER_POOL": {
                 "BUFFER_POOL_LIST": [
-                {
-                    "name": "egress_lossless_pool",
-                    "mode": "static",
-                    "size": "12766208",
-                    "type": "ingress"
-                }
+                    {
+                        "name": "egress_lossless_pool",
+                        "mode": "static",
+                        "size": "12766208",
+                        "type": "ingress"
+                    }
                 ]
             }
         },
         "sonic-buffer-profile:sonic-buffer-profile": {
             "sonic-buffer-profile:BUFFER_PROFILE": {
                 "BUFFER_PROFILE_LIST": [
-                {
-                    "name": "lossless_buffer_profile",
-                    "size": "1518",
-                    "pool": "egress_lossless_pool"
-                }
+                    {
+                        "name": "lossless_buffer_profile",
+                        "size": "1518",
+                        "pool": "egress_lossless_pool"
+                    }
                 ]
             }
         },
         "sonic-buffer-queue:sonic-buffer-queue": {
             "sonic-buffer-queue:BUFFER_QUEUE": {
                 "BUFFER_QUEUE_LIST": [
-                {
-                    "port": "Ethernet4",
-                    "qindex": "3",
-                    "profile": "wrong"
-                }
+                    {
+                        "port": "Ethernet4",
+                        "qindex": "3",
+                        "profile": "wrong"
+                    }
                 ]
             }
         }
@@ -108,50 +108,50 @@
         "sonic-port:sonic-port": {
             "sonic-port:PORT": {
                 "PORT_LIST": [
-                {
-                    "admin_status": "up",
-                    "alias": "eth0",
-                    "description": "Ethernet0",
-                    "lanes": "65",
-                    "mtu": "9000",
-                    "name": "Ethernet4",
-                    "tpid": "0x8100",
-                    "speed": "25000"
-                }
+                    {
+                        "admin_status": "up",
+                        "alias": "eth0",
+                        "description": "Ethernet0",
+                        "lanes": "65",
+                        "mtu": "9000",
+                        "name": "Ethernet4",
+                        "tpid": "0x8100",
+                        "speed": "25000"
+                    }
                 ]
             }
         },
         "sonic-buffer-pool:sonic-buffer-pool": {
             "sonic-buffer-pool:BUFFER_POOL": {
                 "BUFFER_POOL_LIST": [
-                {
-                    "name": "egress_lossless_pool",
-                    "mode": "static",
-                    "size": "12766208",
-                    "type": "ingress"
-                }
+                    {
+                        "name": "egress_lossless_pool",
+                        "mode": "static",
+                        "size": "12766208",
+                        "type": "ingress"
+                    }
                 ]
             }
         },
         "sonic-buffer-profile:sonic-buffer-profile": {
             "sonic-buffer-profile:BUFFER_PROFILE": {
                 "BUFFER_PROFILE_LIST": [
-                {
-                    "name": "lossless_buffer_profile",
-                    "size": "1518",
-                    "pool": "egress_lossless_pool"
-                }
+                    {
+                        "name": "lossless_buffer_profile",
+                        "size": "1518",
+                        "pool": "egress_lossless_pool"
+                    }
                 ]
             }
         },
         "sonic-buffer-queue:sonic-buffer-queue": {
             "sonic-buffer-queue:BUFFER_QUEUE": {
                 "BUFFER_QUEUE_LIST": [
-                {
-                    "port": "Ethernet4",
-                    "qindex": "16",
-                    "profile": "lossless_buffer_profile"
-                }
+                    {
+                        "port": "Ethernet4",
+                        "qindex": "16",
+                        "profile": "lossless_buffer_profile"
+                    }
                 ]
             }
         }
@@ -160,52 +160,98 @@
         "sonic-port:sonic-port": {
             "sonic-port:PORT": {
                 "PORT_LIST": [
-                {
-                    "admin_status": "up",
-                    "alias": "eth0",
-                    "description": "Ethernet0",
-                    "lanes": "65",
-                    "mtu": "9000",
-                    "name": "Ethernet4",
-                    "tpid": "0x8100",
-                    "speed": "25000"
-                }
+                    {
+                        "admin_status": "up",
+                        "alias": "eth0",
+                        "description": "Ethernet0",
+                        "lanes": "65",
+                        "mtu": "9000",
+                        "name": "Ethernet4",
+                        "tpid": "0x8100",
+                        "speed": "25000"
+                    }
                 ]
             }
         },
         "sonic-buffer-pool:sonic-buffer-pool": {
             "sonic-buffer-pool:BUFFER_POOL": {
                 "BUFFER_POOL_LIST": [
-                {
-                    "name": "egress_lossless_pool",
-                    "mode": "static",
-                    "size": "12766208",
-                    "type": "ingress"
-                }
+                    {
+                        "name": "egress_lossless_pool",
+                        "mode": "static",
+                        "size": "12766208",
+                        "type": "ingress"
+                    }
                 ]
             }
         },
         "sonic-buffer-profile:sonic-buffer-profile": {
             "sonic-buffer-profile:BUFFER_PROFILE": {
                 "BUFFER_PROFILE_LIST": [
-                {
-                    "name": "lossless_buffer_profile",
-                    "size": "1518",
-                    "pool": "egress_lossless_pool"
-                }
+                    {
+                        "name": "lossless_buffer_profile",
+                        "size": "1518",
+                        "pool": "egress_lossless_pool"
+                    }
                 ]
             }
         },
         "sonic-buffer-queue:sonic-buffer-queue": {
             "sonic-buffer-queue:BUFFER_QUEUE": {
                 "BUFFER_QUEUE_LIST": [
-                {
-                    "port": "wrong",
-                    "qindex": "4",
-                    "profile": "lossless_buffer_profile"
+                    {
+                        "port": "wrong",
+                        "qindex": "4",
+                        "profile": "lossless_buffer_profile"
+                    }
+                ]
+            }
+        }
+    },
+    "VOQ_BUFFER_QUEUE_CONFIG": {
+        "sonic-device_metadata:sonic-device_metadata": {
+            "sonic-device_metadata:DEVICE_METADATA": {
+                "sonic-device_metadata:localhost": {
+                    "switch_type": "voq"
                 }
+            }
+        },
+        "sonic-buffer-pool:sonic-buffer-pool": {
+            "sonic-buffer-pool:BUFFER_POOL": {
+                "BUFFER_POOL_LIST": [
+                    {
+                        "name": "egress_lossless_pool",
+                        "mode": "static",
+                        "size": "12766208",
+                        "type": "ingress"
+                    }
+                ]
+            }
+        },
+        "sonic-buffer-profile:sonic-buffer-profile": {
+            "sonic-buffer-profile:BUFFER_PROFILE": {
+                "BUFFER_PROFILE_LIST": [
+                    {
+                        "name": "lossless_buffer_profile",
+                        "size": 1518,
+                        "dynamic_th": "2",
+                        "pool": "egress_lossless_pool"
+                    }
+                ]
+            }
+        },
+        "sonic-buffer-queue:sonic-buffer-queue": {
+            "sonic-buffer-queue:BUFFER_QUEUE": {
+                "VOQ_BUFFER_QUEUE_LIST": [
+                    {
+                        "hostname": "lc1",
+                        "asic_name": "asic0",
+                        "port": "Ethernet4",
+                        "qindex": "15",
+                        "profile": "lossless_buffer_profile"
+                    }
                 ]
             }
         }
     }
-}
+}
\ No newline at end of file
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/qos.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/qos.json
index 3b846d4ec..a26ff7f58 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/qos.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/qos.json
@@ -511,5 +511,68 @@
                 ]
             }
         }
+    },
+    "VOQ_QUEUE_CONFIG": {
+        "sonic-device_metadata:sonic-device_metadata": {
+            "sonic-device_metadata:DEVICE_METADATA": {
+                "sonic-device_metadata:localhost": {
+                    "switch_type": "voq"
+                }
+            }
+        },
+        "sonic-scheduler:sonic-scheduler":{
+            "sonic-scheduler:SCHEDULER": {
+                "SCHEDULER_LIST": [
+                {
+                    "name":"Test@0",
+                    "cbs": 256,
+                    "cir": 1250000,
+                    "meter_type": "bytes",
+                    "pbs": 1024,
+                    "pir": 25000000,
+                    "type": "DWRR",
+                    "weight": 10
+                }
+                ]
+            }
+        },
+        "sonic-wred-profile:sonic-wred-profile":{
+            "sonic-wred-profile:WRED_PROFILE": {
+                "WRED_PROFILE_LIST": [
+                {
+                    "name":"Wred1",
+                    "yellow_min_threshold": 2048,
+                    "green_min_threshold": 4096,
+                    "red_min_threshold": 1024,
+                    "yellow_max_threshold": 4096,
+                    "green_max_threshold": 8192,
+                    "red_max_threshold": 2048,
+                    "ecn": "ecn_none",
+                    "wred_green_enable": true,
+                    "wred_yellow_enable": true,
+                    "wred_red_enable": true,
+                    "yellow_drop_probability": 50,
+                    "green_drop_probability": 25,
+                    "red_drop_probability": 100
+                }
+                ]
+            }
+        },
+
+        "sonic-queue:sonic-queue": {
+            "sonic-queue:QUEUE": {
+                "VOQ_QUEUE_LIST": [
+                {
+                    "hostname": "lc1",
+                    "asic_name": "asic0",
+                    "ifname": "Ethernet0",
+                    "qindex": "0",
+                    "scheduler": "Test@0",
+                    "wred_profile": "Wred1"
+                }
+                ]
+            }
+        }
     }
+
 }
diff --git a/src/sonic-yang-models/yang-models/sonic-buffer-queue.yang b/src/sonic-yang-models/yang-models/sonic-buffer-queue.yang
index bd1130fcc..3e96db23c 100644
--- a/src/sonic-yang-models/yang-models/sonic-buffer-queue.yang
+++ b/src/sonic-yang-models/yang-models/sonic-buffer-queue.yang
@@ -14,6 +14,14 @@ module sonic-buffer-queue {
         prefix bpf;
     }
 
+    import sonic-device_metadata {
+        prefix sdm;
+    }
+
+    import sonic-types {
+        prefix stypes;
+    }
+
     organization
         "SONiC";
 
@@ -34,6 +42,9 @@ module sonic-buffer-queue {
         container BUFFER_QUEUE {
 
             list BUFFER_QUEUE_LIST {
+                when "not(/sdm:sonic-device_metadata/sdm:DEVICE_METADATA/sdm:localhost/sdm:switch_type) or
+                    (/sdm:sonic-device_metadata/sdm:DEVICE_METADATA/sdm:localhost/sdm:switch_type!='voq')";
+
                 key "port qindex";
 
                 leaf port {
@@ -61,6 +72,50 @@ module sonic-buffer-queue {
                 }
 
             }
+            list VOQ_BUFFER_QUEUE_LIST {
+                when "boolean(/sdm:sonic-device_metadata/sdm:DEVICE_METADATA/sdm:localhost/sdm:switch_type) and
+                    (/sdm:sonic-device_metadata/sdm:DEVICE_METADATA/sdm:localhost/sdm:switch_type='voq')";
+
+                key "hostname asic_name port qindex";
+
+
+                leaf hostname {
+                    type stypes:hostname;
+                }
+
+                leaf asic_name {
+                    type string {
+                        pattern "[Aa]sic[0-4]";
+                    }
+                }
+
+                leaf port {
+                    type string {
+                        length 1..128;
+                    }
+
+                    description "port name.";
+                }
+
+                leaf qindex {
+                    type string {
+                        pattern "(1[0-5]|[0-9])((-)(1[0-5]|[0-9]))?"{
+                            error-message "Invalid Q-index";
+                            error-app-tag qindex-invalid;
+                        }
+                    }
+                    description "Egress Queue Index for a port";
+                }
+
+                leaf profile {
+                    default 0;
+                    type leafref {
+                        path "/bpf:sonic-buffer-profile/bpf:BUFFER_PROFILE/bpf:BUFFER_PROFILE_LIST/bpf:name";
+                    }
+                    description "Buffer Profile associated with Priority Queue for a port";
+                }
+
+            }
         }
     }
 }
diff --git a/src/sonic-yang-models/yang-models/sonic-queue.yang b/src/sonic-yang-models/yang-models/sonic-queue.yang
index c29c61387..e491a50b0 100644
--- a/src/sonic-yang-models/yang-models/sonic-queue.yang
+++ b/src/sonic-yang-models/yang-models/sonic-queue.yang
@@ -22,6 +22,14 @@ module sonic-queue {
         prefix wrd;
     }
 
+    import sonic-device_metadata {
+        prefix sdm;
+    }
+
+    import sonic-types {
+        prefix stypes;
+    }
+
     organization
         "SONiC";
 
@@ -43,10 +51,12 @@ module sonic-queue {
             description "QUEUE part of config_db.json";
 
             list QUEUE_LIST {
+                when "not(/sdm:sonic-device_metadata/sdm:DEVICE_METADATA/sdm:localhost/sdm:switch_type) or
+                    (/sdm:sonic-device_metadata/sdm:DEVICE_METADATA/sdm:localhost/sdm:switch_type!='voq')";
 
                 key "ifname qindex";
 
-    //          sonic-ext:key-pattern "QUEUE|{ifname}|{qindex}"; //special pattern used for extracting keys from redis-key and populate the yang instance
+//         sonic-ext:key-pattern "QUEUE|{ifname}|{qindex}"; //special pattern used for extracting keys from redis-key and populate the yang instance
                                                                  // Total list instances = number(key1) * number(key2) * number(key3)
 
                 leaf ifname {
@@ -83,6 +93,54 @@ module sonic-queue {
                     description "Wred profile for queue.";
                 }
             }
+
+            list VOQ_QUEUE_LIST {
+                when "boolean(/sdm:sonic-device_metadata/sdm:DEVICE_METADATA/sdm:localhost/sdm:switch_type) and
+                    (/sdm:sonic-device_metadata/sdm:DEVICE_METADATA/sdm:localhost/sdm:switch_type='voq')";
+                key "hostname asic_name ifname qindex";
+
+
+                leaf hostname {
+                    type stypes:hostname;
+                }
+
+                leaf asic_name {
+                    type string {
+                        pattern "[Aa]sic[0-4]";
+                    }
+                }
+
+                leaf ifname {
+                    type string {
+                        length 1..128;
+                    }
+
+                    description "Interface name.";
+                }
+                // qindex format is (X) | (X-Y). X is start and Y is end index.
+                // X and Y value depends on platform, example for physical ports 0-7 and
+                // for CPU port 0-48. Example qindex is 3-4
+                leaf qindex {
+                  //  sonic-ext:custom-validation ValidateQindexPattern;
+                    type string;
+                    description "Queue index on the interface.";
+                }
+
+                leaf scheduler {
+                    type leafref {
+                        path "/sch:sonic-scheduler/sch:SCHEDULER/sch:SCHEDULER_LIST/sch:name"; //Reference to SCHEDULER table
+                    }
+                    description "Scheduler for queue.";
+                }
+
+                leaf wred_profile {
+                    type leafref {
+                        path "/wrd:sonic-wred-profile/wrd:WRED_PROFILE/wrd:WRED_PROFILE_LIST/wrd:name"; // Reference to WRED_PROFILE table
+                    }
+                    description "Wred profile for queue.";
+                }
+            }
         }
+
     }
 }

From f4fc6ce5a9f857907e69b636e80e44e05985be73 Mon Sep 17 00:00:00 2001
From: ranjinidn <51423501+ranjinidn@users.noreply.github.com>
Date: Thu, 16 May 2024 16:53:14 -0700
Subject: [PATCH 0592/1115] Bookworm migration for sonic-mgmt-framework and
 sonic-gnmi dockers (#18548)

* Bookworm migration for mgmt-framework container

* Bookworm migration for sonic-gnmi container

* removed unnecessary python packages from sonic-mgmt-framework docker manifest file

* use curl openssl for mgmt-framework same as what is used in bookworm backend

* install python-is-python3 for all archs for bookworm

* Address review comment to remove bazel 's python-is-python3 requirement since its to be included unconditionally

---------

Co-authored-by: amrutasali <Amruta_Sali@Dell.com>
Co-authored-by: amrutasali <51424374+amrutasali@users.noreply.github.com>
---
 dockers/docker-sonic-gnmi/Dockerfile.j2         |  2 +-
 .../docker-sonic-mgmt-framework/Dockerfile.j2   | 17 +++++------------
 rules/docker-gnmi.mk                            | 10 +++++-----
 rules/docker-sonic-mgmt-framework.mk            | 10 +++++-----
 sonic-slave-bookworm/Dockerfile.j2              |  5 ++---
 5 files changed, 18 insertions(+), 26 deletions(-)

diff --git a/dockers/docker-sonic-gnmi/Dockerfile.j2 b/dockers/docker-sonic-gnmi/Dockerfile.j2
index 962486520..7298a0597 100644
--- a/dockers/docker-sonic-gnmi/Dockerfile.j2
+++ b/dockers/docker-sonic-gnmi/Dockerfile.j2
@@ -1,5 +1,5 @@
 {% from "dockers/dockerfile-macros.j2" import install_debian_packages, install_python_wheels, copy_files %}
-FROM docker-config-engine-bullseye-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}}
+FROM docker-config-engine-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}}
 
 ARG docker_container_name
 ARG image_version
diff --git a/dockers/docker-sonic-mgmt-framework/Dockerfile.j2 b/dockers/docker-sonic-mgmt-framework/Dockerfile.j2
index 03ab38cc3..91f7ba7ee 100644
--- a/dockers/docker-sonic-mgmt-framework/Dockerfile.j2
+++ b/dockers/docker-sonic-mgmt-framework/Dockerfile.j2
@@ -1,4 +1,4 @@
-FROM docker-config-engine-buster-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}}
+FROM docker-config-engine-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}}
 
 ARG docker_container_name
 
@@ -6,17 +6,10 @@ ARG docker_container_name
 ENV DEBIAN_FRONTEND=noninteractive
 
 RUN apt-get update && \
-    apt-get install -y g++ python3-dev libxml2 libcurl3-gnutls libcjson-dev
-
-# Limited to grpcio 1.58.0 due to armhf 
-RUN pip3 install connexion==2.7.0 \
-                 setuptools==21.0.0 \
-                 grpcio==1.58.0 \
-                 grpcio-tools==1.20.0 \
-                 certifi==2017.4.17 \
-                 python-dateutil==2.6.0 \
-                 six==1.11.0 \
-                 urllib3==1.26.5
+    apt-get install -y g++ python3-dev libxml2 libcurl4-openssl-dev libcjson-dev
+
+RUN pip3 install requests \
+                 urllib3
 
 COPY \
 {% for deb in docker_sonic_mgmt_framework_debs.split(' ') -%}
diff --git a/rules/docker-gnmi.mk b/rules/docker-gnmi.mk
index 43cb7be2f..fccbafd2a 100644
--- a/rules/docker-gnmi.mk
+++ b/rules/docker-gnmi.mk
@@ -8,23 +8,23 @@ $(DOCKER_GNMI)_PATH = $(DOCKERS_PATH)/$(DOCKER_GNMI_STEM)
 
 $(DOCKER_GNMI)_DEPENDS += $(SONIC_MGMT_COMMON)
 $(DOCKER_GNMI)_DEPENDS += $(SONIC_TELEMETRY)
-$(DOCKER_GNMI)_DBG_DEPENDS = $($(DOCKER_CONFIG_ENGINE_BULLSEYE)_DBG_DEPENDS)
+$(DOCKER_GNMI)_DBG_DEPENDS = $($(DOCKER_CONFIG_ENGINE_BOOKWORM)_DBG_DEPENDS)
 
-$(DOCKER_GNMI)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE_BULLSEYE)
+$(DOCKER_GNMI)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE_BOOKWORM)
 
 $(DOCKER_GNMI)_VERSION = 1.0.0
 $(DOCKER_GNMI)_PACKAGE_NAME = gnmi
 
-$(DOCKER_GNMI)_DBG_IMAGE_PACKAGES = $($(DOCKER_CONFIG_ENGINE_BULLSEYE)_DBG_IMAGE_PACKAGES)
+$(DOCKER_GNMI)_DBG_IMAGE_PACKAGES = $($(DOCKER_CONFIG_ENGINE_BOOKWORM)_DBG_IMAGE_PACKAGES)
 
 SONIC_DOCKER_IMAGES += $(DOCKER_GNMI)
-SONIC_BULLSEYE_DOCKERS += $(DOCKER_GNMI)
+SONIC_BOOKWORM_DOCKERS += $(DOCKER_GNMI)
 ifeq ($(INCLUDE_SYSTEM_GNMI), y)
 SONIC_INSTALL_DOCKER_IMAGES += $(DOCKER_GNMI)
 endif
 
 SONIC_DOCKER_DBG_IMAGES += $(DOCKER_GNMI_DBG)
-SONIC_BULLSEYE_DBG_DOCKERS += $(DOCKER_GNMI_DBG)
+SONIC_BOOKWORM_DBG_DOCKERS += $(DOCKER_GNMI_DBG)
 ifeq ($(INCLUDE_SYSTEM_GNMI), y)
 SONIC_INSTALL_DOCKER_DBG_IMAGES += $(DOCKER_GNMI_DBG)
 endif
diff --git a/rules/docker-sonic-mgmt-framework.mk b/rules/docker-sonic-mgmt-framework.mk
index 1f26de396..b93c5e100 100644
--- a/rules/docker-sonic-mgmt-framework.mk
+++ b/rules/docker-sonic-mgmt-framework.mk
@@ -8,16 +8,16 @@ $(DOCKER_MGMT_FRAMEWORK)_PATH = $(DOCKERS_PATH)/$(DOCKER_MGMT_FRAMEWORK_STEM)
 
 $(DOCKER_MGMT_FRAMEWORK)_DEPENDS += $(SONIC_MGMT_COMMON)
 $(DOCKER_MGMT_FRAMEWORK)_DEPENDS += $(SONIC_MGMT_FRAMEWORK)
-$(DOCKER_MGMT_FRAMEWORK)_DBG_DEPENDS = $($(DOCKER_CONFIG_ENGINE_BUSTER)_DBG_DEPENDS)
+$(DOCKER_MGMT_FRAMEWORK)_DBG_DEPENDS = $($(DOCKER_CONFIG_ENGINE_BOOKWORM)_DBG_DEPENDS)
 $(DOCKER_MGMT_FRAMEWORK)_DBG_DEPENDS += $(SONIC_MGMT_FRAMEWORK_DBG)
 
 SONIC_DOCKER_IMAGES += $(DOCKER_MGMT_FRAMEWORK)
-$(DOCKER_MGMT_FRAMEWORK)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE_BUSTER)
+$(DOCKER_MGMT_FRAMEWORK)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE_BOOKWORM)
 
 $(DOCKER_MGMT_FRAMEWORK)_VERSION = 1.0.0
 $(DOCKER_MGMT_FRAMEWORK)_PACKAGE_NAME = mgmt-framework
 
-$(DOCKER_MGMT_FRAMEWORK)_DBG_IMAGE_PACKAGES = $($(DOCKER_CONFIG_ENGINE_BUSTER)_DBG_IMAGE_PACKAGES)
+$(DOCKER_MGMT_FRAMEWORK)_DBG_IMAGE_PACKAGES = $($(DOCKER_CONFIG_ENGINE_BOOKWORM)_DBG_IMAGE_PACKAGES)
 
 ifeq ($(INCLUDE_MGMT_FRAMEWORK), y)
 SONIC_INSTALL_DOCKER_IMAGES += $(DOCKER_MGMT_FRAMEWORK)
@@ -38,5 +38,5 @@ $(DOCKER_MGMT_FRAMEWORK)_RUN_OPT += --mount type=bind,source="/var/platform/",ta
 
 $(DOCKER_MGMT_FRAMEWORK)_BASE_IMAGE_FILES += sonic-cli:/usr/bin/sonic-cli
 
-SONIC_BUSTER_DOCKERS += $(DOCKER_MGMT_FRAMEWORK)
-SONIC_BUSTER_DBG_DOCKERS += $(DOCKER_MGMT_FRAMEWORK_DBG)
+SONIC_BOOKWORM_DOCKERS += $(DOCKER_MGMT_FRAMEWORK)
+SONIC_BOOKWORM_DBG_DOCKERS += $(DOCKER_MGMT_FRAMEWORK_DBG)
diff --git a/sonic-slave-bookworm/Dockerfile.j2 b/sonic-slave-bookworm/Dockerfile.j2
index b0efe041e..2d48357f5 100644
--- a/sonic-slave-bookworm/Dockerfile.j2
+++ b/sonic-slave-bookworm/Dockerfile.j2
@@ -694,12 +694,11 @@ RUN apt-get download python3.11-dev:$arch && apt-get download python3-dev:$arch
 LABEL "com.azure.dev.pipelines.agent.handler.node.path"="/usr/bin/node"
 {% endif -%}
 
+RUN apt install -y python-is-python3
+
 # Install Bazel build system (amd64 and arm64 architectures are supported using this method)
 # TODO(PINS): Remove once pre-build Bazel binaries are available for armhf (armv7l)
 {%- if CONFIGURED_ARCH == "amd64" or CONFIGURED_ARCH == "arm64" %}
 ARG bazelisk_url=https://github.com/bazelbuild/bazelisk/releases/latest/download/bazelisk-linux-{{ CONFIGURED_ARCH }}
 RUN curl -fsSL -o /usr/local/bin/bazel ${bazelisk_url} && chmod 755 /usr/local/bin/bazel
-# Bazel requires "python"
-# TODO(PINS): remove when Bazel is okay with "python3" binary name
-RUN apt install -y python-is-python3
 {% endif -%}

From 4863b0b3ea56f8fc4cf167ba05d8e80263a83051 Mon Sep 17 00:00:00 2001
From: Saikrishna Arcot <sarcot@microsoft.com>
Date: Thu, 16 May 2024 16:54:53 -0700
Subject: [PATCH 0593/1115] (Properly) upgrade docker-restapi to Bookworm, and
 add a debug container (#18975)

Upgrade docker-restapi container to Bookworm. It's worth noting that
because this container was not in the SONIC_BULLSEYE_DOCKERS list, the
binaries/libraries that got packaged here came from the Bookworm build,
but the base layer was for Bullseye, so it was already in some hybrid
state.

Also, include the autogenerated dbgsym package for restapi in
`rules/restapi.mk`, and add a debug container for restapi.

Also, enable caching of docker-restapi (not sure why it wasn't enabled
before).

Signed-off-by: Saikrishna Arcot <sarcot@microsoft.com>
---
 dockers/docker-sonic-restapi/Dockerfile.j2 |  2 +-
 rules/docker-restapi.dep                   | 11 +++++++++++
 rules/docker-restapi.mk                    | 19 +++++++++++++++----
 rules/restapi.mk                           |  4 ++++
 4 files changed, 31 insertions(+), 5 deletions(-)
 create mode 100644 rules/docker-restapi.dep

diff --git a/dockers/docker-sonic-restapi/Dockerfile.j2 b/dockers/docker-sonic-restapi/Dockerfile.j2
index ca1a80580..3bb1ab7df 100644
--- a/dockers/docker-sonic-restapi/Dockerfile.j2
+++ b/dockers/docker-sonic-restapi/Dockerfile.j2
@@ -1,5 +1,5 @@
 {% from "dockers/dockerfile-macros.j2" import install_debian_packages, install_python_wheels, copy_files %}
-FROM docker-config-engine-bullseye-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}}
+FROM docker-config-engine-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}}
 
 ARG docker_container_name
 
diff --git a/rules/docker-restapi.dep b/rules/docker-restapi.dep
new file mode 100644
index 000000000..77a5e712d
--- /dev/null
+++ b/rules/docker-restapi.dep
@@ -0,0 +1,11 @@
+
+DPATH       := $($(DOCKER_RESTAPI)_PATH)
+DEP_FILES   := $(SONIC_COMMON_FILES_LIST) rules/docker-restapi.mk rules/docker-restapi.dep
+DEP_FILES   += $(SONIC_COMMON_BASE_FILES_LIST)
+DEP_FILES   += $(shell git ls-files $(DPATH))
+
+$(DOCKER_RESTAPI)_CACHE_MODE  := GIT_CONTENT_SHA
+$(DOCKER_RESTAPI)_DEP_FLAGS   := $(SONIC_COMMON_FLAGS_LIST)
+$(DOCKER_RESTAPI)_DEP_FILES   := $(DEP_FILES)
+
+$(eval $(call add_dbg_docker,$(DOCKER_RESTAPI),$(DOCKER_RESTAPI_DBG)))
diff --git a/rules/docker-restapi.mk b/rules/docker-restapi.mk
index e6dc2dcf4..0fb8e19d5 100644
--- a/rules/docker-restapi.mk
+++ b/rules/docker-restapi.mk
@@ -2,20 +2,28 @@
 
 DOCKER_RESTAPI_STEM = docker-sonic-restapi
 DOCKER_RESTAPI = $(DOCKER_RESTAPI_STEM).gz
+DOCKER_RESTAPI_DBG = $(DOCKER_RESTAPI_STEM)-$(DBG_IMAGE_MARK).gz
 
-$(DOCKER_RESTAPI)_DEPENDS += $(LIBNL3) $(LIBNL_GENL3) \
-                             $(LIBNL_ROUTE3) $(LIBSWSSCOMMON) $(RESTAPI)
+$(DOCKER_RESTAPI)_DEPENDS += $(RESTAPI)
+
+$(DOCKER_RESTAPI)_DBG_DEPENDS = $($(DOCKER_CONFIG_ENGINE_BOOKWORM)_DBG_DEPENDS)
+$(DOCKER_RESTAPI)_DBG_DEPENDS += $(RESTAPI_DBG)
+
+$(DOCKER_RESTAPI)_DBG_IMAGE_PACKAGES = $($(DOCKER_CONFIG_ENGINE_BOOKWORM)_DBG_IMAGE_PACKAGES)
 
 $(DOCKER_RESTAPI)_PATH = $(DOCKERS_PATH)/$(DOCKER_RESTAPI_STEM)
 
-$(DOCKER_RESTAPI)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE_BULLSEYE)
+$(DOCKER_RESTAPI)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE_BOOKWORM)
 
 $(DOCKER_RESTAPI)_VERSION = 1.0.0
 $(DOCKER_RESTAPI)_PACKAGE_NAME = restapi
 
-ifeq ($(INCLUDE_RESTAPI), y)
 SONIC_DOCKER_IMAGES += $(DOCKER_RESTAPI)
+SONIC_DOCKER_DBG_IMAGES += $(DOCKER_RESTAPI_DBG)
+
+ifeq ($(INCLUDE_RESTAPI), y)
 SONIC_INSTALL_DOCKER_IMAGES += $(DOCKER_RESTAPI)
+SONIC_INSTALL_DOCKER_DBG_IMAGES += $(DOCKER_RESTAPI_DBG)
 endif
 
 $(DOCKER_RESTAPI)_CONTAINER_NAME = restapi
@@ -25,3 +33,6 @@ $(DOCKER_RESTAPI)_RUN_OPT += -v /etc/sonic/credentials:/etc/sonic/credentials:ro
 $(DOCKER_RESTAPI)_RUN_OPT += -p=8081:8081/tcp
 
 $(DOCKER_RESTAPI)_FILES += $(SUPERVISOR_PROC_EXIT_LISTENER_SCRIPT)
+
+SONIC_BOOKWORM_DOCKERS += $(DOCKER_RESTAPI)
+SONIC_BOOKWORM_DBG_DOCKERS += $(DOCKER_RESTAPI_DBG)
diff --git a/rules/restapi.mk b/rules/restapi.mk
index 9be5be9ae..b603ecd7a 100644
--- a/rules/restapi.mk
+++ b/rules/restapi.mk
@@ -2,8 +2,12 @@
 
 RESTAPI = sonic-rest-api_1.0.1_$(CONFIGURED_ARCH).deb
 $(RESTAPI)_SRC_PATH = $(SRC_PATH)/sonic-restapi
+
 $(RESTAPI)_DEPENDS += $(LIBNL3_DEV) $(LIBNL_GENL3_DEV) \
                             $(LIBNL_ROUTE3_DEV) $(LIBSWSSCOMMON_DEV) $(LIBSWSSCOMMON)
 $(RESTAPI)_RDEPENDS += $(LIBNL3) $(LIBNL_GENL3) \
                              $(LIBNL_ROUTE3) $(LIBSWSSCOMMON)
 SONIC_DPKG_DEBS += $(RESTAPI)
+
+RESTAPI_DBG = sonic-rest-api-dbgsym_1.0.1_$(CONFIGURED_ARCH).deb
+$(eval $(call add_derived_package,$(RESTAPI_DBG),$(RESTAPI_DBG)))

From c2406e6fc9e0bd120ae74653ad4fe9e7ba635f73 Mon Sep 17 00:00:00 2001
From: Arvindsrinivasan Lakshmi Narasimhan
 <55814491+arlakshm@users.noreply.github.com>
Date: Thu, 16 May 2024 17:13:08 -0700
Subject: [PATCH 0594/1115] [chassis][voq] Remove the leaf ref for the ifname
 in sonic-system-port.yang (#18855)

Microsoft ADO 27934751:

Fixes #18854

Update the sonic-system-port.yang to remove the check to have ifname as leafref in the port table
The system-port config table will have all the ports in the chassis not only to one linecard, so in case of the chassis with different linecards sku with different number of ports this leafref will not work.
---
 src/sonic-yang-models/yang-models/sonic-system-port.yang | 9 ++-------
 1 file changed, 2 insertions(+), 7 deletions(-)

diff --git a/src/sonic-yang-models/yang-models/sonic-system-port.yang b/src/sonic-yang-models/yang-models/sonic-system-port.yang
index 804b3313f..f95405ac6 100644
--- a/src/sonic-yang-models/yang-models/sonic-system-port.yang
+++ b/src/sonic-yang-models/yang-models/sonic-system-port.yang
@@ -40,13 +40,8 @@ module sonic-system-port {
                 }
 
                 leaf ifname {
-                    type union {
-                        type leafref {
-                            path /port:sonic-port/port:PORT/port:PORT_LIST/port:name;
-                        }
-                        type string {
-                            pattern "Cpu0";
-                        }
+                    type string {
+                        length 1..128;
                     }
                 }
 

From 592562aab47e19e1a4f519c1ee4337d96d0b595c Mon Sep 17 00:00:00 2001
From: dgsudharsan <sudharsand@nvidia.com>
Date: Tue, 30 Apr 2024 18:03:12 +0000
Subject: [PATCH 0595/1115] [FRR]Porting fix to handle nexthop group on
 interface up

---
 .../patch/0029-zebra-nhg-fix-on-intf-up.patch | 338 ++++++++++++++++++
 src/sonic-frr/patch/series                    |   1 +
 2 files changed, 339 insertions(+)
 create mode 100644 src/sonic-frr/patch/0029-zebra-nhg-fix-on-intf-up.patch

diff --git a/src/sonic-frr/patch/0029-zebra-nhg-fix-on-intf-up.patch b/src/sonic-frr/patch/0029-zebra-nhg-fix-on-intf-up.patch
new file mode 100644
index 000000000..64e8ac5d5
--- /dev/null
+++ b/src/sonic-frr/patch/0029-zebra-nhg-fix-on-intf-up.patch
@@ -0,0 +1,338 @@
+From 4a58bc9e856c4ca953474548d61f06aad2fdf45b Mon Sep 17 00:00:00 2001
+From: Ashwini Reddy <ashred@nvidia.com>
+Date: Wed, 19 Apr 2023 11:35:25 -0700
+Subject: [PATCH 1/3] zebra: re-install nhg on interface up
+
+Intermittently zebra and kernel are out of sync
+when interface flaps and the add's/dels are in
+same processing queue and zebra assumes no change in nexthop.
+Hence we need to bring in a reinstall to kernel
+of the nexthops and routes to sync their states.
+
+Upon interface flap kernel would have deleted NHGs
+associated to a interface (the one flapped),
+zebra retains NHGs for 3 mins even though upper
+layer protocol removes the nexthops (associated NHG).
+As part of interface address add ,
+re-add singleton NHGs associated to interface.
+
+Ticket: #3173663
+Issue: 3173663
+
+Signed-off-by: Ashwini Reddy <ashred@nvidia.com>
+Signed-off-by: Chirag Shah <chirag@nvidia.com>
+---
+ lib/nexthop.c        |  9 +++++++++
+ lib/nexthop.h        |  3 +++
+ zebra/redistribute.c |  4 ++++
+ zebra/zebra_nhg.c    | 46 ++++++++++++++++++++++++++++++++++++++++++++
+ zebra/zebra_nhg.h    |  1 +
+ 5 files changed, 63 insertions(+)
+
+diff --git a/lib/nexthop.c b/lib/nexthop.c
+index 52679388fd..e3bdbfb9e8 100644
+--- a/lib/nexthop.c
++++ b/lib/nexthop.c
+@@ -1093,3 +1093,12 @@ static ssize_t printfrr_nh(struct fbuf *buf, struct printfrr_eargs *ea,
+ 	}
+ 	return -1;
+ }
++
++bool nexthop_is_ifindex_type(const struct nexthop *nh)
++{
++	if (nh->type == NEXTHOP_TYPE_IFINDEX ||
++	    nh->type == NEXTHOP_TYPE_IPV4_IFINDEX ||
++	    nh->type == NEXTHOP_TYPE_IPV6_IFINDEX)
++		return true;
++	return false;
++}
+diff --git a/lib/nexthop.h b/lib/nexthop.h
+index f6fb6ec2b7..a52ae02172 100644
+--- a/lib/nexthop.h
++++ b/lib/nexthop.h
+@@ -260,6 +260,9 @@ extern struct nexthop *nexthop_dup(const struct nexthop *nexthop,
+ extern struct nexthop *nexthop_dup_no_recurse(const struct nexthop *nexthop,
+ 					      struct nexthop *rparent);
+ 
++/* Check nexthop of IFINDEX type */
++extern bool nexthop_is_ifindex_type(const struct nexthop *nh);
++
+ /*
+  * Parse one or more backup index values, as comma-separated numbers,
+  * into caller's array of uint8_ts. The array must be NEXTHOP_MAX_BACKUPS
+diff --git a/zebra/redistribute.c b/zebra/redistribute.c
+index 4a8fe938ed..fccbee7d85 100644
+--- a/zebra/redistribute.c
++++ b/zebra/redistribute.c
+@@ -561,6 +561,10 @@ void zebra_interface_address_add_update(struct interface *ifp,
+ 						client, ifp, ifc);
+ 		}
+ 	}
++	/* interface associated NHGs may have been deleted,
++	 * re-sync zebra -> dplane NHGs
++	 */
++	zebra_interface_nhg_reinstall(ifp);
+ }
+ 
+ /* Interface address deletion. */
+diff --git a/zebra/zebra_nhg.c b/zebra/zebra_nhg.c
+index 54c66fbf18..753efef7f8 100644
+--- a/zebra/zebra_nhg.c
++++ b/zebra/zebra_nhg.c
+@@ -3003,6 +3003,12 @@ void zebra_nhg_install_kernel(struct nhg_hash_entry *nhe)
+ 	/* Resolve it first */
+ 	nhe = zebra_nhg_resolve(nhe);
+ 
++	if (zebra_nhg_set_valid_if_active(nhe)) {
++		if (IS_ZEBRA_DEBUG_NHG_DETAIL)
++			zlog_debug("%s: valid flag set for nh %pNG", __func__,
++				   nhe);
++	}
++
+ 	/* Make sure all depends are installed/queued */
+ 	frr_each(nhg_connected_tree, &nhe->nhg_depends, rb_node_dep) {
+ 		zebra_nhg_install_kernel(rb_node_dep->nhe);
+@@ -3586,3 +3592,43 @@ static ssize_t printfrr_nhghe(struct fbuf *buf, struct printfrr_eargs *ea,
+ 	ret += bputs(buf, "]");
+ 	return ret;
+ }
++
++/*
++ * On interface add the nexthop that resolves to this intf needs
++ * a re-install. There are following scenarios when the nexthop group update
++ * gets skipped:
++ * 1. When upper level protocol sends removal of NHG, there is
++ * timer running to keep NHG for 180 seconds, during this interval, same route
++ * with same set of nexthops installation is given , the same NHG is used
++ * but since NHG is not reinstalled on interface address add, it is not aware
++ * in Dplan/Kernel.
++ * 2. Due to a quick port flap due to interface add and delete
++ * to be processed in same queue one after another. Zebra believes that
++ * there is no change in nhg in this case. Hence this re-install will
++ * make sure the nexthop group gets updated to Dplan/Kernel.
++ */
++void zebra_interface_nhg_reinstall(struct interface *ifp)
++{
++	struct nhg_connected *rb_node_dep = NULL;
++	struct zebra_if *zif = ifp->info;
++	struct nexthop *nh;
++
++	if (IS_ZEBRA_DEBUG_NHG_DETAIL)
++		zlog_debug(
++			"%s: Installing interface %s associated NHGs into kernel",
++			__func__, ifp->name);
++
++	frr_each (nhg_connected_tree, &zif->nhg_dependents, rb_node_dep) {
++		nh = rb_node_dep->nhe->nhg.nexthop;
++		if (zebra_nhg_set_valid_if_active(rb_node_dep->nhe)) {
++			if (IS_ZEBRA_DEBUG_NHG_DETAIL)
++				zlog_debug(
++					"%s: Setting the valid flag for nhe %pNG, interface: %s",
++					__func__, rb_node_dep->nhe, ifp->name);
++		}
++		/* Check for singleton NHG associated to interface */
++		if (nexthop_is_ifindex_type(nh) &&
++		    zebra_nhg_depends_is_empty(rb_node_dep->nhe))
++			zebra_nhg_install_kernel(rb_node_dep->nhe);
++	}
++}
+diff --git a/zebra/zebra_nhg.h b/zebra/zebra_nhg.h
+index 9b925bf10f..18914b7856 100644
+--- a/zebra/zebra_nhg.h
++++ b/zebra/zebra_nhg.h
+@@ -374,6 +374,7 @@ extern uint8_t zebra_nhg_nhe2grp(struct nh_grp *grp, struct nhg_hash_entry *nhe,
+ /* Dataplane install/uninstall */
+ extern void zebra_nhg_install_kernel(struct nhg_hash_entry *nhe);
+ extern void zebra_nhg_uninstall_kernel(struct nhg_hash_entry *nhe);
++extern void zebra_interface_nhg_reinstall(struct interface *ifp);
+ 
+ /* Forward ref of dplane update context type */
+ struct zebra_dplane_ctx;
+-- 
+2.17.1
+
+
+From 2b99f5ccf7768eff1393e07db2b77abc104dbbd7 Mon Sep 17 00:00:00 2001
+From: Chirag Shah <chirag@nvidia.com>
+Date: Fri, 28 Apr 2023 19:09:55 -0700
+Subject: [PATCH 2/3] zebra:re-install dependent nhgs on interface up
+
+Upon interface up associated singleton NHG's
+dependent NHGs needs to be reinstalled as
+kernel would have deleted if there is no route
+referencing it.
+
+Ticket:#3416477
+Issue:3416477
+Testing Done:
+flap interfaces which are part of route NHG,
+upon interfaces up event, NHGs are resynced
+into dplane.
+
+Signed-off-by: Chirag Shah <chirag@nvidia.com>
+---
+ zebra/zebra_nhg.c | 43 ++++++++++++++++++++++++++++++++++++++-----
+ 1 file changed, 38 insertions(+), 5 deletions(-)
+
+diff --git a/zebra/zebra_nhg.c b/zebra/zebra_nhg.c
+index 753efef7f8..e5efbf8d5f 100644
+--- a/zebra/zebra_nhg.c
++++ b/zebra/zebra_nhg.c
+@@ -1140,13 +1140,23 @@ static void zebra_nhg_handle_uninstall(struct nhg_hash_entry *nhe)
+ 	zebra_nhg_free(nhe);
+ }
+ 
+-static void zebra_nhg_handle_install(struct nhg_hash_entry *nhe)
++static void zebra_nhg_handle_install(struct nhg_hash_entry *nhe, bool install)
+ {
+ 	/* Update validity of groups depending on it */
+ 	struct nhg_connected *rb_node_dep;
+ 
+-	frr_each_safe(nhg_connected_tree, &nhe->nhg_dependents, rb_node_dep)
++	frr_each_safe (nhg_connected_tree, &nhe->nhg_dependents, rb_node_dep) {
+ 		zebra_nhg_set_valid(rb_node_dep->nhe);
++		/* install dependent NHG into kernel */
++		if (install) {
++			if (IS_ZEBRA_DEBUG_NHG_DETAIL)
++				zlog_debug(
++					"%s nh id %u (flags 0x%x) associated dependent NHG %pNG install",
++					__func__, nhe->id, nhe->flags,
++					rb_node_dep->nhe);
++			zebra_nhg_install_kernel(rb_node_dep->nhe);
++		}
++	}
+ }
+ 
+ /*
+@@ -3035,7 +3045,7 @@ void zebra_nhg_install_kernel(struct nhg_hash_entry *nhe)
+ 			break;
+ 		case ZEBRA_DPLANE_REQUEST_SUCCESS:
+ 			SET_FLAG(nhe->flags, NEXTHOP_GROUP_INSTALLED);
+-			zebra_nhg_handle_install(nhe);
++			zebra_nhg_handle_install(nhe, false);
+ 			break;
+ 		}
+ 	}
+@@ -3109,7 +3119,7 @@ void zebra_nhg_dplane_result(struct zebra_dplane_ctx *ctx)
+ 		if (status == ZEBRA_DPLANE_REQUEST_SUCCESS) {
+ 			SET_FLAG(nhe->flags, NEXTHOP_GROUP_VALID);
+ 			SET_FLAG(nhe->flags, NEXTHOP_GROUP_INSTALLED);
+-			zebra_nhg_handle_install(nhe);
++			zebra_nhg_handle_install(nhe, true);
+ 
+ 			/* If daemon nhg, send it an update */
+ 			if (PROTO_OWNED(nhe))
+@@ -3628,7 +3638,30 @@ void zebra_interface_nhg_reinstall(struct interface *ifp)
+ 		}
+ 		/* Check for singleton NHG associated to interface */
+ 		if (nexthop_is_ifindex_type(nh) &&
+-		    zebra_nhg_depends_is_empty(rb_node_dep->nhe))
++		    zebra_nhg_depends_is_empty(rb_node_dep->nhe)) {
++			struct nhg_connected *rb_node_dependent;
++
++			if (IS_ZEBRA_DEBUG_NHG)
++				zlog_debug(
++					"%s install nhe %pNG nh type %u flags 0x%x",
++					__func__, rb_node_dep->nhe, nh->type,
++					rb_node_dep->nhe->flags);
+ 			zebra_nhg_install_kernel(rb_node_dep->nhe);
++
++			/* mark depedent uninstall, when interface associated
++			 * singleton is installed, install depedent
++			 */
++			frr_each_safe (nhg_connected_tree,
++				       &rb_node_dep->nhe->nhg_dependents,
++				       rb_node_dependent) {
++				if (IS_ZEBRA_DEBUG_NHG)
++					zlog_debug(
++						"%s dependent nhe %pNG unset installed flag",
++						__func__,
++						rb_node_dependent->nhe);
++				UNSET_FLAG(rb_node_dependent->nhe->flags,
++					   NEXTHOP_GROUP_INSTALLED);
++			}
++		}
+ 	}
+ }
+-- 
+2.17.1
+
+
+From be767bd66143c2dcdd564a40a852400ae9e251e5 Mon Sep 17 00:00:00 2001
+From: Donald Sharp <sharpd@nvidia.com>
+Date: Fri, 19 Apr 2024 12:13:32 -0400
+Subject: [PATCH 3/3] lib, zebra: Check for not being a blackhole route
+
+In zebra_interface_nhg_reinstall zebra is checking that the
+nhg is a singleton and not a blackhole nhg.  This was originally
+done with checking that the nexthop is a NEXTHOP_TYPE_IFINDEX,
+NEXTHOP_TYPE_IPV4_IFINDEX and NEXTHOP_TYPE_IPV6_IFINDEX.  This
+was excluding NEXTHOP_TYPE_IPV4 and NEXTHOP_TYPE_IPV6.  These
+were both possible to be received and maintained from the upper
+level protocol for when a route is being recursively resolved.
+If we have gotten to this point in zebra_interface_nhg_reinstall
+the nexthop group has already been installed at least once
+and we *know* that it is actually a valid nexthop.  What the
+test is really trying to do is ensure that we are not reinstalling
+a blackhole nexthop group( Which is not possible to even be
+here by the way, but safety first! ).  So let's change
+to test for that instead.
+
+Signed-off-by: Donald Sharp <sharpd@nvidia.com>
+---
+ lib/nexthop.c     | 8 ++------
+ lib/nexthop.h     | 4 ++--
+ zebra/zebra_nhg.c | 3 ++-
+ 3 files changed, 6 insertions(+), 9 deletions(-)
+
+diff --git a/lib/nexthop.c b/lib/nexthop.c
+index e3bdbfb9e8..884255f158 100644
+--- a/lib/nexthop.c
++++ b/lib/nexthop.c
+@@ -1094,11 +1094,7 @@ static ssize_t printfrr_nh(struct fbuf *buf, struct printfrr_eargs *ea,
+ 	return -1;
+ }
+ 
+-bool nexthop_is_ifindex_type(const struct nexthop *nh)
++bool nexthop_is_blackhole(const struct nexthop *nh)
+ {
+-	if (nh->type == NEXTHOP_TYPE_IFINDEX ||
+-	    nh->type == NEXTHOP_TYPE_IPV4_IFINDEX ||
+-	    nh->type == NEXTHOP_TYPE_IPV6_IFINDEX)
+-		return true;
+-	return false;
++	return nh->type == NEXTHOP_TYPE_BLACKHOLE;
+ }
+diff --git a/lib/nexthop.h b/lib/nexthop.h
+index a52ae02172..bd1c0514fc 100644
+--- a/lib/nexthop.h
++++ b/lib/nexthop.h
+@@ -260,8 +260,8 @@ extern struct nexthop *nexthop_dup(const struct nexthop *nexthop,
+ extern struct nexthop *nexthop_dup_no_recurse(const struct nexthop *nexthop,
+ 					      struct nexthop *rparent);
+ 
+-/* Check nexthop of IFINDEX type */
+-extern bool nexthop_is_ifindex_type(const struct nexthop *nh);
++/* Is this nexthop a blackhole? */
++extern bool nexthop_is_blackhole(const struct nexthop *nh);
+ 
+ /*
+  * Parse one or more backup index values, as comma-separated numbers,
+diff --git a/zebra/zebra_nhg.c b/zebra/zebra_nhg.c
+index e5efbf8d5f..33d2344f51 100644
+--- a/zebra/zebra_nhg.c
++++ b/zebra/zebra_nhg.c
+@@ -3636,8 +3636,9 @@ void zebra_interface_nhg_reinstall(struct interface *ifp)
+ 					"%s: Setting the valid flag for nhe %pNG, interface: %s",
+ 					__func__, rb_node_dep->nhe, ifp->name);
+ 		}
++
+ 		/* Check for singleton NHG associated to interface */
+-		if (nexthop_is_ifindex_type(nh) &&
++		if (!nexthop_is_blackhole(nh) &&
+ 		    zebra_nhg_depends_is_empty(rb_node_dep->nhe)) {
+ 			struct nhg_connected *rb_node_dependent;
+ 
+-- 
+2.17.1
+
diff --git a/src/sonic-frr/patch/series b/src/sonic-frr/patch/series
index f2cd08ca6..445bc9dd9 100644
--- a/src/sonic-frr/patch/series
+++ b/src/sonic-frr/patch/series
@@ -26,3 +26,4 @@
 0026-bgp-fib-suppress-announce-fix.patch
 0027-lib-Do-not-convert-EVPN-prefixes-into-IPv4-IPv6-if-n.patch
 0028-zebra-fix-parse-attr-problems-for-encap.patch
+0029-zebra-nhg-fix-on-intf-up.patch

From c91ce6059931b52750964031d4f621cd2912e08e Mon Sep 17 00:00:00 2001
From: dgsudharsan <sudharsand@nvidia.com>
Date: Tue, 5 Mar 2024 00:28:06 +0000
Subject: [PATCH 0596/1115] Revert "[frr]: Force disable next hop group
 support. (#17344)"

This reverts commit 1ff27db42f4f8722f8f74967030a4d7e31473731.
---
 dockers/docker-fpm-frr/docker_init.sh                         | 4 ----
 dockers/docker-fpm-frr/frr/zebra/zebra.conf.j2                | 2 --
 platform/vs/docker-sonic-vs/frr/zebra.conf                    | 3 ++-
 src/sonic-bgpcfgd/tests/data/sonic-cfggen/zebra/zebra.conf    | 2 --
 .../tests/sample_output/py2/t2-chassis-fe-vni-zebra.conf      | 2 --
 .../tests/sample_output/py2/t2-chassis-fe-zebra.conf          | 2 --
 .../tests/sample_output/py2/zebra_frr.conf                    | 2 --
 .../tests/sample_output/py2/zebra_frr_dualtor.conf            | 2 --
 .../tests/sample_output/py3/t2-chassis-fe-vni-zebra.conf      | 2 --
 .../tests/sample_output/py3/t2-chassis-fe-zebra.conf          | 2 --
 .../tests/sample_output/py3/zebra_frr.conf                    | 2 --
 .../tests/sample_output/py3/zebra_frr_dualtor.conf            | 2 --
 12 files changed, 2 insertions(+), 25 deletions(-)

diff --git a/dockers/docker-fpm-frr/docker_init.sh b/dockers/docker-fpm-frr/docker_init.sh
index 390a403aa..0ed274ec7 100755
--- a/dockers/docker-fpm-frr/docker_init.sh
+++ b/dockers/docker-fpm-frr/docker_init.sh
@@ -49,10 +49,6 @@ write_default_zebra_config()
         echo "no fpm use-next-hop-groups" >> $FILE_NAME
         echo "fpm address 127.0.0.1" >> $FILE_NAME
     }
-
-    grep -q '^no zebra nexthop kernel enable' $FILE_NAME || {
-        echo "no zebra nexthop kernel enable" >> $FILE_NAME
-    }
 }
 
 if [[ ! -z "$NAMESPACE_ID" ]]; then
diff --git a/dockers/docker-fpm-frr/frr/zebra/zebra.conf.j2 b/dockers/docker-fpm-frr/frr/zebra/zebra.conf.j2
index 4543ad8f9..f5a56c316 100644
--- a/dockers/docker-fpm-frr/frr/zebra/zebra.conf.j2
+++ b/dockers/docker-fpm-frr/frr/zebra/zebra.conf.j2
@@ -7,8 +7,6 @@
 {% endblock banner %}
 !
 {% block fpm %}
-! Force disable next hop group support
-no zebra nexthop kernel enable
 ! Uses the old known FPM behavior of including next hop information in the route (e.g. RTM_NEWROUTE) messages
 no fpm use-next-hop-groups
 !
diff --git a/platform/vs/docker-sonic-vs/frr/zebra.conf b/platform/vs/docker-sonic-vs/frr/zebra.conf
index 1980a6e15..4c994e60d 100644
--- a/platform/vs/docker-sonic-vs/frr/zebra.conf
+++ b/platform/vs/docker-sonic-vs/frr/zebra.conf
@@ -1,3 +1,4 @@
-no zebra nexthop kernel enable
 no fpm use-next-hop-groups
+
 fpm address 127.0.0.1
+
diff --git a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/zebra/zebra.conf b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/zebra/zebra.conf
index 38db29648..6b7e1feff 100644
--- a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/zebra/zebra.conf
+++ b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/zebra/zebra.conf
@@ -4,8 +4,6 @@
 ! file: zebra.conf
 !
 !
-! Force disable next hop group support
-no zebra nexthop kernel enable
 ! Uses the old known FPM behavior of including next hop information in the route (e.g. RTM_NEWROUTE) messages
 no fpm use-next-hop-groups
 !
diff --git a/src/sonic-config-engine/tests/sample_output/py2/t2-chassis-fe-vni-zebra.conf b/src/sonic-config-engine/tests/sample_output/py2/t2-chassis-fe-vni-zebra.conf
index 120878fe1..8bb483456 100644
--- a/src/sonic-config-engine/tests/sample_output/py2/t2-chassis-fe-vni-zebra.conf
+++ b/src/sonic-config-engine/tests/sample_output/py2/t2-chassis-fe-vni-zebra.conf
@@ -4,8 +4,6 @@
 ! file: zebra.conf
 !
 !
-! Force disable next hop group support
-no zebra nexthop kernel enable
 ! Uses the old known FPM behavior of including next hop information in the route (e.g. RTM_NEWROUTE) messages
 no fpm use-next-hop-groups
 !
diff --git a/src/sonic-config-engine/tests/sample_output/py2/t2-chassis-fe-zebra.conf b/src/sonic-config-engine/tests/sample_output/py2/t2-chassis-fe-zebra.conf
index a6e3ad053..402230348 100644
--- a/src/sonic-config-engine/tests/sample_output/py2/t2-chassis-fe-zebra.conf
+++ b/src/sonic-config-engine/tests/sample_output/py2/t2-chassis-fe-zebra.conf
@@ -4,8 +4,6 @@
 ! file: zebra.conf
 !
 !
-! Force disable next hop group support
-no zebra nexthop kernel enable
 ! Uses the old known FPM behavior of including next hop information in the route (e.g. RTM_NEWROUTE) messages
 no fpm use-next-hop-groups
 !
diff --git a/src/sonic-config-engine/tests/sample_output/py2/zebra_frr.conf b/src/sonic-config-engine/tests/sample_output/py2/zebra_frr.conf
index 9e438caa0..9d0ab16ee 100644
--- a/src/sonic-config-engine/tests/sample_output/py2/zebra_frr.conf
+++ b/src/sonic-config-engine/tests/sample_output/py2/zebra_frr.conf
@@ -4,8 +4,6 @@
 ! file: zebra.conf
 !
 !
-! Force disable next hop group support
-no zebra nexthop kernel enable
 ! Uses the old known FPM behavior of including next hop information in the route (e.g. RTM_NEWROUTE) messages
 no fpm use-next-hop-groups
 !
diff --git a/src/sonic-config-engine/tests/sample_output/py2/zebra_frr_dualtor.conf b/src/sonic-config-engine/tests/sample_output/py2/zebra_frr_dualtor.conf
index 0f49b229b..4a23467ce 100644
--- a/src/sonic-config-engine/tests/sample_output/py2/zebra_frr_dualtor.conf
+++ b/src/sonic-config-engine/tests/sample_output/py2/zebra_frr_dualtor.conf
@@ -4,8 +4,6 @@
 ! file: zebra.conf
 !
 !
-! Force disable next hop group support
-no zebra nexthop kernel enable
 ! Uses the old known FPM behavior of including next hop information in the route (e.g. RTM_NEWROUTE) messages
 no fpm use-next-hop-groups
 !
diff --git a/src/sonic-config-engine/tests/sample_output/py3/t2-chassis-fe-vni-zebra.conf b/src/sonic-config-engine/tests/sample_output/py3/t2-chassis-fe-vni-zebra.conf
index c6c973f7f..b55906056 100644
--- a/src/sonic-config-engine/tests/sample_output/py3/t2-chassis-fe-vni-zebra.conf
+++ b/src/sonic-config-engine/tests/sample_output/py3/t2-chassis-fe-vni-zebra.conf
@@ -4,8 +4,6 @@
 ! file: zebra.conf
 !
 !
-! Force disable next hop group support
-no zebra nexthop kernel enable
 ! Uses the old known FPM behavior of including next hop information in the route (e.g. RTM_NEWROUTE) messages
 no fpm use-next-hop-groups
 !
diff --git a/src/sonic-config-engine/tests/sample_output/py3/t2-chassis-fe-zebra.conf b/src/sonic-config-engine/tests/sample_output/py3/t2-chassis-fe-zebra.conf
index 84e76ecdb..19e303639 100644
--- a/src/sonic-config-engine/tests/sample_output/py3/t2-chassis-fe-zebra.conf
+++ b/src/sonic-config-engine/tests/sample_output/py3/t2-chassis-fe-zebra.conf
@@ -4,8 +4,6 @@
 ! file: zebra.conf
 !
 !
-! Force disable next hop group support
-no zebra nexthop kernel enable
 ! Uses the old known FPM behavior of including next hop information in the route (e.g. RTM_NEWROUTE) messages
 no fpm use-next-hop-groups
 !
diff --git a/src/sonic-config-engine/tests/sample_output/py3/zebra_frr.conf b/src/sonic-config-engine/tests/sample_output/py3/zebra_frr.conf
index b8adb9878..a5fb8b1ca 100644
--- a/src/sonic-config-engine/tests/sample_output/py3/zebra_frr.conf
+++ b/src/sonic-config-engine/tests/sample_output/py3/zebra_frr.conf
@@ -4,8 +4,6 @@
 ! file: zebra.conf
 !
 !
-! Force disable next hop group support
-no zebra nexthop kernel enable
 ! Uses the old known FPM behavior of including next hop information in the route (e.g. RTM_NEWROUTE) messages
 no fpm use-next-hop-groups
 !
diff --git a/src/sonic-config-engine/tests/sample_output/py3/zebra_frr_dualtor.conf b/src/sonic-config-engine/tests/sample_output/py3/zebra_frr_dualtor.conf
index 2741ba54c..5fdf0ced3 100644
--- a/src/sonic-config-engine/tests/sample_output/py3/zebra_frr_dualtor.conf
+++ b/src/sonic-config-engine/tests/sample_output/py3/zebra_frr_dualtor.conf
@@ -4,8 +4,6 @@
 ! file: zebra.conf
 !
 !
-! Force disable next hop group support
-no zebra nexthop kernel enable
 ! Uses the old known FPM behavior of including next hop information in the route (e.g. RTM_NEWROUTE) messages
 no fpm use-next-hop-groups
 !

From 53966e3ff340cc16127d78aa92587aee3b48dd0e Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Fri, 17 May 2024 16:01:28 +0800
Subject: [PATCH 0597/1115] [submodule] Update submodule sonic-swss to the
 latest HEAD automatically (#18987)

#### Why I did it
src/sonic-swss
```
* 84ce1a7c - (HEAD -> master, origin/master, origin/HEAD) [mclag] Use port-isolation feature for Marvell platforms. (#3151) (11 hours ago) [Rajkumar-Marvell]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-swss | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-swss b/src/sonic-swss
index c36333c3d..84ce1a7c9 160000
--- a/src/sonic-swss
+++ b/src/sonic-swss
@@ -1 +1 @@
-Subproject commit c36333c3d7573a249991df5357955f0189ab4ada
+Subproject commit 84ce1a7c9cf50bf6719d710f3ee3e5286998bf8b

From 2c6927738b23f2283243f0cc74e430de4dcce89d Mon Sep 17 00:00:00 2001
From: Bobby McGonigle <bobbymcgonigle@arista.com>
Date: Fri, 17 May 2024 13:58:09 -0700
Subject: [PATCH 0598/1115] Calulcate subport values and fix key error in
 hwsku.json (#18499)
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

Automatically populate the correct subport value for an interface and insert into config_db.json

Why I did it
Problem 1
Breakouts of optic CMIS modules are broken. For example when in breakout mode of 4x100G on a port the /3, /5, /7 are not correctly associating with lanes (3,4), (5,6) and (7,8) of the transceiver respectively. The /3, /5, /7 are all trying to reprogram lanes (1,2).

In the xcvrd logs we see the following lane masks for all 4 interfaces for a port in 4x100G-2 mode:

EthernetX/X: Setting host_lanemask=0x3
EthernetX/X: Setting media_lanemask=0x1
As a result, we only see the /1 interface linking up correctly, the other 3 interfaces do not have the correct application advertisement + lanemasks applied. This is what we should expect to see:

lanes (1,2)
EthernetX/1: Setting host_lanemask=0x3
EthernetX/1: Setting media_lanemask=0x1

lanes (3,4)
EthernetX/3: Setting host_lanemask=0xc
EthernetX/3: Setting media_lanemask=0x2

lanes (5,6)
EthernetX/5: Setting host_lanemask=0x30
EthernetX/5: Setting media_lanemask=0x4

lanes (7,8)
EthernetX/7: Setting host_lanemask=0xc0
EthernetX/7: Setting media_lanemask=0x8
The problem is that “subport” is expected and used in xcvrd, xcvrd unit tests and explained in the Port Breakout HLD ; it was not implemented and does not end up in DB as expected, which defaults this value to 0.

(Pdb) self.port_dict["Ethernet194"]
{'index': 25, 'speed': '100000', 'lanes': '451,452', 'admin_status': 'up', 'cmis_state': 'INSERTED', 'cmis_retries': 0, 'cmis_expired': None}
Problem 2
This Pull Request does not play well with all HWSKUs that define breakouts. It does a lookup for every child port in the hwsku.json file - There should be 1 default breakout mode for each front panel port - this change expects every child port in a front panel port to have an entry - which causes an exception. Right now as far as I can tell this will break a lot of HWSKUs in a breakout config.

For example this is what the Dynamic Port Breakout feature uses on an Arista SKU to define 2x200G on the first front panel port:

"Ethernet0": {
     "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G]"
},
but it currently expects:

"Ethernet0": {
    ...
},
"Ethernet4": {
    ...
},
How I did it
Calculate subport value automatically based on the number of child ports used per front panel port and insert it into CONFIG_DB for the interface. If that number is 1 for the front panel, subport 0 is used. If has more than 1 I.e. is in breakout mode use a 1 based subport number as the feature expects. For example:

1x400G-8:

Ethernet0: subport 0
4x100G-2:

Ethernet0: subport 1
Ethernet2: subport 2
Ethernet4: subport 3
Ethernet6: subport 4
I have kept it compatible with Mellanox change - if you want to define a different subport number in your hwsku.json that is fine and it will override the dynamically generated default.

How to verify it
I verified this by checking the output of sonic-cfggen, updating config_db. and checking that both the host and media lane masks were correct for a 400GBASE-DR4 xcvr in both 2x200G-4 mode and 4x100G-2 mode.

All links came up and xcvrd prints the correct lanemasks in logs.

I also made sure that portconfig.py no longer causes an exception; it only checks for the optional HWSKU value if childports are present in hwsku.json file (this is to make sure we don't break Mellanox hwsku's)

I also changed the unit test for config_db generation and ensured the correct values match. The test passes.
---
 .../sample_output/sample_new_port_config.json |  96 ++++++++++------
 .../vs/tests/breakout/test_breakout_cli.py    |   8 +-
 src/sonic-config-engine/portconfig.py         |  15 ++-
 .../tests/sample_output/platform_output.json  | 105 ++++++++++++++++--
 .../tests/test_cfggen_platformJson.py         |   6 +-
 5 files changed, 179 insertions(+), 51 deletions(-)

diff --git a/platform/vs/tests/breakout/sample_output/sample_new_port_config.json b/platform/vs/tests/breakout/sample_output/sample_new_port_config.json
index 442224ea6..2d4cb86a1 100644
--- a/platform/vs/tests/breakout/sample_output/sample_new_port_config.json
+++ b/platform/vs/tests/breakout/sample_output/sample_new_port_config.json
@@ -4,13 +4,15 @@
 	        "alias": "fortyGigE0/2",
 	        "lanes": "27,28",
 	        "speed": "50000",
-	        "index": "0"
+	        "index": "0",
+	        "subport": "2"
 	    },
 	    "Ethernet0": {
 	        "alias": "fortyGigE0/0",
 	        "lanes": "25,26",
 	        "speed": "50000",
-	        "index": "0"
+	        "index": "0",
+	        "subport": "1"
 	    }
     },
     "Ethernet12_1x50G_2x25G": {
@@ -18,19 +20,22 @@
                 "alias": "fortyGigE0/12",
                 "lanes": "37,38",
                 "speed": "50000",
-                "index": "3"
+                "index": "3",
+                "subport": "1"
             },
             "Ethernet14": {
                 "alias": "fortyGigE0/14",
                 "lanes": "39",
                 "speed": "25000",
-                "index": "3"
+                "index": "3",
+                "subport": "2"
             },
 	    "Ethernet15": {
                 "alias": "fortyGigE0/15",
                 "lanes": "40",
                 "speed": "25000",
-                "index": "3"
+                "index": "3",
+                "subport": "3"
             }
     },
     "Ethernet0_2x50G": {
@@ -38,13 +43,15 @@
                 "alias": "fortyGigE0/2",
                 "lanes": "27,28",
                 "speed": "50000",
-                "index": "0"
+                "index": "0",
+                "subport": "2"
             },
             "Ethernet0": {
                 "alias": "fortyGigE0/0",
                 "lanes": "25,26",
                 "speed": "50000",
-                "index": "0"
+                "index": "0",
+                "subport": "1"
             }
     },
     "Ethernet0_1x100G": {
@@ -52,7 +59,8 @@
 	        "alias": "fortyGigE0/0",
 	        "lanes": "25,26,27,28",
 	        "speed": "100000",
-	        "index": "0"
+	        "index": "0",
+	        "subport": "1"
 	    }
     },
     "Ethernet0_4x25G":	{
@@ -60,25 +68,29 @@
 	        "alias": "fortyGigE0/2",
 	        "lanes": "27",
 	        "speed": "25000",
-	        "index": "0"
+	        "index": "0",
+	        "subport": "3"
 	    },
 	    "Ethernet3": {
 	        "alias": "fortyGigE0/3",
 	        "lanes": "28",
 	        "speed": "25000",
-	        "index": "0"
+	        "index": "0",
+	        "subport": "4"
 	    },
 	    "Ethernet0": {
 	        "alias": "fortyGigE0/0",
 	        "lanes": "25",
 	        "speed": "25000",
-	        "index": "0"
+	        "index": "0",
+	        "subport": "1"
 	    },
 	    "Ethernet1": {
 	        "alias": "fortyGigE0/1",
 	        "lanes": "26",
 	        "speed": "25000",
-	        "index": "0"
+	        "index": "0",
+	        "subport": "2"
 	    }
     },
     "Ethernet0_2x25G_1x50G": {
@@ -86,19 +98,22 @@
 	        "alias": "fortyGigE0/2",
 	        "lanes": "27,28",
 	        "speed": "50000",
-	        "index": "0"
+	        "index": "0",
+	        "subport": "3"
 	    },
 	    "Ethernet0": {
 	        "alias": "fortyGigE0/0",
 	        "lanes": "25",
 	        "speed": "25000",
-	        "index": "0"
+	        "index": "0",
+	        "subport": "1"
 	    },
 	    "Ethernet1": {
 	        "alias": "fortyGigE0/1",
 	        "lanes": "26",
 	        "speed": "25000",
-	        "index": "0"
+	        "index": "0",
+	        "subport": "2"
 	    }
     },
     "Ethernet0_1x50G_2x25G": {
@@ -106,19 +121,22 @@
 	        "alias": "fortyGigE0/2",
 	        "lanes": "27",
 	        "speed": "25000",
-	        "index": "0"
+	        "index": "0",
+	        "subport": "2"
 	    },
 	    "Ethernet3": {
 	        "alias": "fortyGigE0/3",
 	        "lanes": "28",
 	        "speed": "25000",
-	        "index": "0"
+	        "index": "0",
+	        "subport": "3"
 	    },
 	    "Ethernet0": {
 	        "alias": "fortyGigE0/0",
 	        "lanes": "25,26",
 	        "speed": "50000",
-	        "index": "0"
+	        "index": "0",
+	        "subport": "1"
 		}
     },
     "Ethernet4_4x25G": {
@@ -126,25 +144,29 @@
 		"alias": "fortyGigE0/6",
 		"lanes": "31",
 		"speed": "25000",
-		"index": "1"
+		"index": "1",
+		"subport": "3"
 	},
 	"Ethernet7": {
 		"alias": "fortyGigE0/7",
 		"lanes": "32",
 		"speed": "25000",
-		"index": "1"
+		"index": "1",
+		"subport": "4"
 	},
 	"Ethernet4": {
 		"alias": "fortyGigE0/4",
 		"lanes": "29",
 		"speed": "25000",
-		"index": "1"
+		"index": "1",
+		"subport": "1"
 	},
 	"Ethernet5": {
 		"alias": "fortyGigE0/5",
 		"lanes": "30",
 		"speed": "25000",
-		"index": "1"
+		"index": "1",
+		"subport": "2"
 	}
     },
     "Ethernet4_2x50G": {
@@ -152,13 +174,15 @@
 		"alias": "fortyGigE0/6",
 		"lanes": "31,32",
 		"speed": "50000",
-		"index": "1"
+		"index": "1",
+		"subport": "2"
 	},
 	"Ethernet4": {
 		"alias": "fortyGigE0/4",
 		"lanes": "29,30",
 		"speed": "50000",
-		"index": "1"
+		"index": "1",
+		"subport": "1"
 	}
     },
     "Ethernet8_2x50G": {
@@ -166,13 +190,15 @@
 	        "alias": "fortyGigE0/8",
 	        "lanes": "33,34",
 	        "speed": "50000",
-	        "index": "2"
+	        "index": "2",
+	        "subport": "1"
 	    },
 	    "Ethernet10": {
 	        "alias": "fortyGigE0/10",
 	        "lanes": "35,36",
 	        "speed": "50000",
-	        "index": "2"
+	        "index": "2",
+	        "subport": "2"
 	    }
     },
     "Ethernet8_1x50G_2x25G": {
@@ -180,13 +206,15 @@
 	        "alias": "fortyGigE0/10",
 	        "lanes": "35",
 	        "speed": "25000",
-	        "index": "2"
+	        "index": "2",
+	        "subport": "1"
 	    },
 	    "Ethernet11": {
 	        "alias": "fortyGigE0/11",
 	        "lanes": "36",
 	        "speed": "25000",
-	        "index": "2"
+	        "index": "2",
+	        "subport": "2"
 	    }
     },
     "Ethernet8_2x25G_1x50G": {
@@ -194,19 +222,22 @@
 	        "alias": "fortyGigE0/8",
 	        "lanes": "33",
 	        "speed": "25000",
-	        "index": "2"
+	        "index": "2",
+	        "subport": "1"
 	    },
 	    "Ethernet9": {
 	        "alias": "fortyGigE0/9",
 	        "lanes": "34",
 	        "speed": "25000",
-	        "index": "2"
+	        "index": "2",
+	        "subport": "2"
 	    },
 	    "Ethernet10": {
 	        "alias": "fortyGigE0/10",
 	        "lanes": "35,36",
 	        "speed": "50000",
-	        "index": "2"
+	        "index": "2",
+	        "subport": "3"
 	    }
     },
     "Ethernet8_1x100G": {
@@ -214,7 +245,8 @@
 	        "alias": "fortyGigE0/8",
 	        "lanes": "33,34,35,36",
 	        "speed": "100000",
-	        "index": "2"
+	        "index": "2",
+	        "subport": "0"
 	    }
     }
 }
diff --git a/platform/vs/tests/breakout/test_breakout_cli.py b/platform/vs/tests/breakout/test_breakout_cli.py
index d93dc0e04..5a41aae5c 100755
--- a/platform/vs/tests/breakout/test_breakout_cli.py
+++ b/platform/vs/tests/breakout/test_breakout_cli.py
@@ -74,22 +74,22 @@ def test_breakout_modes(self, dvs):
         print("**** Breakout Cli test Starts ****")
         output_dict = self.breakout(dvs, 'Ethernet0', '2x50G')
         expected_dict = expected["Ethernet0_2x50G"]
-        assert output_dict == expected_dict
+        assert output_dict == expected_dict, "output: {} != expected: {}".format(output_dict, expected_dict)
         print("**** 1X100G --> 2x50G passed ****")
 
         output_dict = self.breakout(dvs, 'Ethernet4', '4x25G[10G]')
         expected_dict = expected["Ethernet4_4x25G"]
-        assert output_dict == expected_dict
+        assert output_dict == expected_dict, "output: {} != expected: {}".format(output_dict, expected_dict)
         print("**** 1X100G --> 4x25G[10G] passed ****")
 
         output_dict = self.breakout(dvs, 'Ethernet8', '2x25G(2)+1x50G(2)')
         expected_dict = expected["Ethernet8_2x25G_1x50G"]
-        assert output_dict == expected_dict
+        assert output_dict == expected_dict, "output: {} != expected: {}".format(output_dict, expected_dict)
         print("**** 1X100G --> 2x25G(2)+1x50G(2) passed ****")
 
         output_dict = self.breakout(dvs, 'Ethernet12', '1x50G(2)+2x25G(2)')
         expected_dict = expected["Ethernet12_1x50G_2x25G"]
-        assert output_dict == expected_dict
+        assert output_dict == expected_dict, "output: {} != expected: {}".format(output_dict, expected_dict)
         print("**** 1X100G --> 1x50G(2)+2x25G(2) passed ****")
 
         # TODOFIX: remove comments once #4442 PR got merged and
diff --git a/src/sonic-config-engine/portconfig.py b/src/sonic-config-engine/portconfig.py
index dcc535eed..788774d34 100644
--- a/src/sonic-config-engine/portconfig.py
+++ b/src/sonic-config-engine/portconfig.py
@@ -37,7 +37,7 @@
 BRKOUT_MODE = "default_brkout_mode"
 CUR_BRKOUT_MODE = "brkout_mode"
 INTF_KEY = "interfaces"
-OPTIONAL_HWSKU_ATTRIBUTES = ["fec", "autoneg", "subport", "role"]
+OPTIONAL_HWSKU_ATTRIBUTES = ["fec", "autoneg", "role"]
 
 BRKOUT_PATTERN = r'(\d{1,6})x(\d{1,6}G?)(\[(\d{1,6}G?,?)*\])?(\((\d{1,6})\))?'
 BRKOUT_PATTERN_GROUPS = 6
@@ -353,8 +353,10 @@ def _str_to_entries(self, bmode):
     def get_config(self):
         # Ensure that we have corret number of configured lanes
         lanes_used = 0
+        total_num_ports = 0
         for entry in self._breakout_mode_entry:
             lanes_used += entry.num_assigned_lanes
+            total_num_ports += entry.num_ports
 
         if lanes_used > len(self._lanes):
             raise RuntimeError("Assigned lines count is more that available!")
@@ -376,7 +378,8 @@ def get_config(self):
                     'alias': self._breakout_capabilities[alias_id],
                     'lanes': ','.join(lanes),
                     'speed': str(entry.default_speed),
-                    'index': self._indexes[lane_id]
+                    'index': self._indexes[lane_id],
+                    'subport': "0" if total_num_ports == 1 else str(alias_id + 1)
                 }
 
                 lane_id += lanes_per_port
@@ -422,10 +425,12 @@ def parse_platform_json_file(hwsku_json_file, platform_json_file):
         child_ports = get_child_ports(intf, brkout_mode, platform_json_file)
 
         # take optional fields from hwsku.json
+        hwsku_entry = hwsku_dict[INTF_KEY]
         for child_port in child_ports:
-            for key, item in hwsku_dict[INTF_KEY][child_port].items():
-                if key in OPTIONAL_HWSKU_ATTRIBUTES:
-                    child_ports.get(child_port)[key] = item
+            if child_port in hwsku_entry:
+                for key, item in hwsku_entry[child_port].items():
+                    if key in OPTIONAL_HWSKU_ATTRIBUTES:
+                        child_ports.get(child_port)[key] = item
 
         ports.update(child_ports)
 
diff --git a/src/sonic-config-engine/tests/sample_output/platform_output.json b/src/sonic-config-engine/tests/sample_output/platform_output.json
index 15bd4a29d..51c26754e 100644
--- a/src/sonic-config-engine/tests/sample_output/platform_output.json
+++ b/src/sonic-config-engine/tests/sample_output/platform_output.json
@@ -7,6 +7,7 @@
     "alias": "Eth3/1",
     "pfc_asym": "off",
     "speed": "25000",
+    "subport": "1",
     "tpid": "0x8100"
   },
   "Ethernet9": {
@@ -17,6 +18,7 @@
     "alias": "Eth3/2",
     "pfc_asym": "off",
     "speed": "25000",
+    "subport": "2",
     "tpid": "0x8100"
   },
   "Ethernet36": {
@@ -27,6 +29,7 @@
     "alias": "Eth10/1",
     "pfc_asym": "off",
     "speed": "50000",
+    "subport": "1",
     "tpid": "0x8100"
   },
   "Ethernet98": {
@@ -37,6 +40,7 @@
     "alias": "Eth25/2",
     "pfc_asym": "off",
     "speed": "25000",
+    "subport": "2",
     "tpid": "0x8100"
   },
   "Ethernet0": {
@@ -49,6 +53,7 @@
     "alias": "Eth1",
     "pfc_asym": "off",
     "speed": "100000",
+    "subport": "0",
     "tpid": "0x8100"
   },
   "Ethernet6": {
@@ -60,6 +65,7 @@
     "alias": "Eth2/2",
     "pfc_asym": "off",
     "speed": "50000",
+    "subport": "2",
     "tpid": "0x8100"
   },
   "Ethernet4": {
@@ -71,6 +77,7 @@
     "alias": "Eth2/1",
     "pfc_asym": "off",
     "speed": "50000",
+    "subport": "1",
     "tpid": "0x8100"
   },
   "Ethernet109": {
@@ -81,6 +88,7 @@
     "alias": "Eth28/2",
     "pfc_asym": "off",
     "speed": "25000",
+    "subport": "2",
     "tpid": "0x8100"
   },
   "Ethernet108": {
@@ -91,6 +99,7 @@
     "alias": "Eth28/1",
     "pfc_asym": "off",
     "speed": "25000",
+    "subport": "1",
     "tpid": "0x8100"
   },
   "Ethernet18": {
@@ -101,6 +110,7 @@
     "alias": "Eth5/2",
     "pfc_asym": "off",
     "speed": "25000",
+    "subport": "2",
     "tpid": "0x8100"
   },
   "Ethernet100": {
@@ -112,6 +122,7 @@
     "alias": "Eth26",
     "pfc_asym": "off",
     "speed": "100000",
+    "subport": "0",
     "tpid": "0x8100"
   },
   "Ethernet34": {
@@ -122,6 +133,7 @@
     "alias": "Eth9/3",
     "pfc_asym": "off",
     "speed": "50000",
+    "subport": "3",
     "tpid": "0x8100"
   },
   "Ethernet104": {
@@ -132,6 +144,7 @@
     "alias": "Eth27/1",
     "pfc_asym": "off",
     "speed": "50000",
+    "subport": "1",
     "tpid": "0x8100"
   },
   "Ethernet106": {
@@ -142,6 +155,7 @@
     "alias": "Eth27/2",
     "pfc_asym": "off",
     "speed": "50000",
+    "subport": "2",
     "tpid": "0x8100"
   },
   "Ethernet94": {
@@ -152,6 +166,7 @@
     "alias": "Eth24/3",
     "pfc_asym": "off",
     "speed": "50000",
+    "subport": "3",
     "tpid": "0x8100"
   },
   "Ethernet126": {
@@ -162,6 +177,7 @@
     "alias": "Eth32/2",
     "pfc_asym": "off",
     "speed": "50000",
+    "subport": "2",
     "tpid": "0x8100"
   },
   "Ethernet96": {
@@ -172,6 +188,7 @@
     "alias": "Eth25/1",
     "pfc_asym": "off",
     "speed": "50000",
+    "subport": "1",
     "tpid": "0x8100"
   },
   "Ethernet124": {
@@ -182,6 +199,7 @@
     "alias": "Eth32/1",
     "pfc_asym": "off",
     "speed": "50000",
+    "subport": "1",
     "tpid": "0x8100"
   },
   "Ethernet90": {
@@ -192,6 +210,7 @@
     "alias": "Eth23/3",
     "pfc_asym": "off",
     "speed": "25000",
+    "subport": "3",
     "tpid": "0x8100"
   },
   "Ethernet91": {
@@ -202,6 +221,7 @@
     "alias": "Eth23/4",
     "pfc_asym": "off",
     "speed": "25000",
+    "subport": "4",
     "tpid": "0x8100"
   },
   "Ethernet92": {
@@ -212,6 +232,7 @@
     "alias": "Eth24/1",
     "pfc_asym": "off",
     "speed": "25000",
+    "subport": "1",
     "tpid": "0x8100"
   },
   "Ethernet93": {
@@ -222,6 +243,7 @@
     "alias": "Eth24/2",
     "pfc_asym": "off",
     "speed": "25000",
+    "subport": "2",
     "tpid": "0x8100"
   },
   "Ethernet50": {
@@ -232,6 +254,7 @@
     "alias": "Eth13/3",
     "pfc_asym": "off",
     "speed": "25000",
+    "subport": "3",
     "tpid": "0x8100"
   },
   "Ethernet51": {
@@ -242,6 +265,7 @@
     "alias": "Eth13/4",
     "pfc_asym": "off",
     "speed": "25000",
+    "subport": "4",
     "tpid": "0x8100"
   },
   "Ethernet52": {
@@ -252,6 +276,7 @@
     "alias": "Eth14/1",
     "pfc_asym": "off",
     "speed": "25000",
+    "subport": "1",
     "tpid": "0x8100"
   },
   "Ethernet53": {
@@ -262,6 +287,7 @@
     "alias": "Eth14/2",
     "pfc_asym": "off",
     "speed": "25000",
+    "subport": "2",
     "tpid": "0x8100"
   },
   "Ethernet54": {
@@ -272,6 +298,7 @@
     "alias": "Eth14/3",
     "pfc_asym": "off",
     "speed": "50000",
+    "subport": "3",
     "tpid": "0x8100"
   },
   "Ethernet99": {
@@ -282,6 +309,7 @@
     "alias": "Eth25/3",
     "pfc_asym": "off",
     "speed": "25000",
+    "subport": "3",
     "tpid": "0x8100"
   },
   "Ethernet56": {
@@ -292,6 +320,7 @@
     "alias": "Eth15/1",
     "pfc_asym": "off",
     "speed": "50000",
+    "subport": "1",
     "tpid": "0x8100"
   },
   "Ethernet113": {
@@ -302,6 +331,7 @@
     "alias": "Eth29/2",
     "pfc_asym": "off",
     "speed": "25000",
+    "subport": "2",
     "tpid": "0x8100"
   },
   "Ethernet76": {
@@ -312,6 +342,7 @@
     "alias": "Eth20/1",
     "pfc_asym": "off",
     "speed": "50000",
+    "subport": "1",
     "tpid": "0x8100"
   },
   "Ethernet74": {
@@ -322,6 +353,7 @@
     "alias": "Eth19/3",
     "pfc_asym": "off",
     "speed": "50000",
+    "subport": "3",
     "tpid": "0x8100"
   },
   "Ethernet39": {
@@ -332,6 +364,7 @@
     "alias": "Eth10/3",
     "pfc_asym": "off",
     "speed": "25000",
+    "subport": "3",
     "tpid": "0x8100"
   },
   "Ethernet72": {
@@ -342,6 +375,7 @@
     "alias": "Eth19/1",
     "pfc_asym": "off",
     "speed": "25000",
+    "subport": "1",
     "tpid": "0x8100"
   },
   "Ethernet73": {
@@ -352,6 +386,7 @@
     "alias": "Eth19/2",
     "pfc_asym": "off",
     "speed": "25000",
+    "subport": "2",
     "tpid": "0x8100"
   },
   "Ethernet70": {
@@ -362,6 +397,7 @@
     "alias": "Eth18/3",
     "pfc_asym": "off",
     "speed": "25000",
+    "subport": "3",
     "tpid": "0x8100"
   },
   "Ethernet71": {
@@ -372,6 +408,7 @@
     "alias": "Eth18/4",
     "pfc_asym": "off",
     "speed": "25000",
+    "subport": "4",
     "tpid": "0x8100"
   },
   "Ethernet32": {
@@ -382,6 +419,7 @@
     "alias": "Eth9/1",
     "pfc_asym": "off",
     "speed": "25000",
+    "subport": "1",
     "tpid": "0x8100"
   },
   "Ethernet33": {
@@ -392,6 +430,7 @@
     "alias": "Eth9/2",
     "pfc_asym": "off",
     "speed": "25000",
+    "subport": "2",
     "tpid": "0x8100"
   },
   "Ethernet16": {
@@ -402,6 +441,7 @@
     "alias": "Eth5/1",
     "pfc_asym": "off",
     "speed": "50000",
+    "subport": "1",
     "tpid": "0x8100"
   },
   "Ethernet111": {
@@ -412,6 +452,7 @@
     "alias": "Eth28/4",
     "pfc_asym": "off",
     "speed": "25000",
+    "subport": "4",
     "tpid": "0x8100"
   },
   "Ethernet10": {
@@ -422,6 +463,7 @@
     "alias": "Eth3/3",
     "pfc_asym": "off",
     "speed": "25000",
+    "subport": "3",
     "tpid": "0x8100"
   },
   "Ethernet11": {
@@ -432,6 +474,7 @@
     "alias": "Eth3/4",
     "pfc_asym": "off",
     "speed": "25000",
+    "subport": "4",
     "tpid": "0x8100"
   },
   "Ethernet12": {
@@ -442,6 +485,7 @@
     "alias": "Eth4/1",
     "pfc_asym": "off",
     "speed": "25000",
+    "subport": "1",
     "tpid": "0x8100"
   },
   "Ethernet13": {
@@ -452,6 +496,7 @@
     "alias": "Eth4/2",
     "pfc_asym": "off",
     "speed": "25000",
+    "subport": "2",
     "tpid": "0x8100"
   },
   "Ethernet58": {
@@ -462,6 +507,7 @@
     "alias": "Eth15/2",
     "pfc_asym": "off",
     "speed": "25000",
+    "subport": "2",
     "tpid": "0x8100"
   },
   "Ethernet19": {
@@ -472,6 +518,7 @@
     "alias": "Eth5/3",
     "pfc_asym": "off",
     "speed": "25000",
+    "subport": "3",
     "tpid": "0x8100"
   },
   "Ethernet59": {
@@ -482,6 +529,7 @@
     "alias": "Eth15/3",
     "pfc_asym": "off",
     "speed": "25000",
+    "subport": "3",
     "tpid": "0x8100"
   },
   "Ethernet38": {
@@ -492,6 +540,7 @@
     "alias": "Eth10/2",
     "pfc_asym": "off",
     "speed": "25000",
+    "subport": "2",
     "tpid": "0x8100"
   },
   "Ethernet78": {
@@ -502,6 +551,7 @@
     "alias": "Eth20/2",
     "pfc_asym": "off",
     "speed": "25000",
+    "subport": "2",
     "tpid": "0x8100"
   },
   "Ethernet68": {
@@ -512,6 +562,7 @@
     "alias": "Eth18/1",
     "pfc_asym": "off",
     "speed": "25000",
+    "subport": "1",
     "tpid": "0x8100"
   },
   "Ethernet14": {
@@ -522,6 +573,7 @@
     "alias": "Eth4/3",
     "pfc_asym": "off",
     "speed": "50000",
+    "subport": "3",
     "tpid": "0x8100"
   },
   "Ethernet89": {
@@ -532,6 +584,7 @@
     "alias": "Eth23/2",
     "pfc_asym": "off",
     "speed": "25000",
+    "subport": "2",
     "tpid": "0x8100"
   },
   "Ethernet88": {
@@ -542,6 +595,7 @@
     "alias": "Eth23/1",
     "pfc_asym": "off",
     "speed": "25000",
+    "subport": "1",
     "tpid": "0x8100"
   },
   "Ethernet118": {
@@ -552,6 +606,7 @@
     "alias": "Eth30/2",
     "pfc_asym": "off",
     "speed": "25000",
+    "subport": "2",
     "tpid": "0x8100"
   },
   "Ethernet119": {
@@ -562,6 +617,7 @@
     "alias": "Eth30/3",
     "pfc_asym": "off",
     "speed": "25000",
+    "subport": "3",
     "tpid": "0x8100"
   },
   "Ethernet116": {
@@ -572,6 +628,7 @@
     "alias": "Eth30/1",
     "pfc_asym": "off",
     "speed": "50000",
+    "subport": "1",
     "tpid": "0x8100"
   },
   "Ethernet114": {
@@ -582,6 +639,7 @@
     "alias": "Eth29/3",
     "pfc_asym": "off",
     "speed": "50000",
+    "subport": "3",
     "tpid": "0x8100"
   },
   "Ethernet80": {
@@ -593,6 +651,7 @@
     "alias": "Eth21",
     "pfc_asym": "off",
     "speed": "100000",
+    "subport": "0",
     "tpid": "0x8100"
   },
   "Ethernet112": {
@@ -603,6 +662,7 @@
     "alias": "Eth29/1",
     "pfc_asym": "off",
     "speed": "25000",
+    "subport": "1",
     "tpid": "0x8100"
   },
   "Ethernet86": {
@@ -613,6 +673,7 @@
     "alias": "Eth22/2",
     "pfc_asym": "off",
     "speed": "50000",
+    "subport": "2",
     "tpid": "0x8100"
   },
   "Ethernet110": {
@@ -623,6 +684,7 @@
     "alias": "Eth28/3",
     "pfc_asym": "off",
     "speed": "25000",
+    "subport": "3",
     "tpid": "0x8100"
   },
   "Ethernet84": {
@@ -633,6 +695,7 @@
     "alias": "Eth22/1",
     "pfc_asym": "off",
     "speed": "50000",
+    "subport": "1",
     "tpid": "0x8100"
   },
   "Ethernet31": {
@@ -643,6 +706,7 @@
     "alias": "Eth8/4",
     "pfc_asym": "off",
     "speed": "25000",
+    "subport": "4",
     "tpid": "0x8100"
   },
   "Ethernet49": {
@@ -653,6 +717,7 @@
     "alias": "Eth13/2",
     "pfc_asym": "off",
     "speed": "25000",
+    "subport": "2",
     "tpid": "0x8100"
   },
   "Ethernet48": {
@@ -663,6 +728,7 @@
     "alias": "Eth13/1",
     "pfc_asym": "off",
     "speed": "25000",
+    "subport": "1",
     "tpid": "0x8100"
   },
   "Ethernet46": {
@@ -673,6 +739,7 @@
     "alias": "Eth12/2",
     "pfc_asym": "off",
     "speed": "50000",
+    "subport": "2",
     "tpid": "0x8100"
   },
   "Ethernet30": {
@@ -683,6 +750,7 @@
     "alias": "Eth8/3",
     "pfc_asym": "off",
     "speed": "25000",
+    "subport": "3",
     "tpid": "0x8100"
   },
   "Ethernet29": {
@@ -693,6 +761,7 @@
     "alias": "Eth8/2",
     "pfc_asym": "off",
     "speed": "25000",
+    "subport": "2",
     "tpid": "0x8100"
   },
   "Ethernet40": {
@@ -704,6 +773,7 @@
     "alias": "Eth11",
     "pfc_asym": "off",
     "speed": "100000",
+    "subport": "0",
     "tpid": "0x8100"
   },
   "Ethernet120": {
@@ -715,6 +785,7 @@
     "alias": "Eth31",
     "pfc_asym": "off",
     "speed": "100000",
+    "subport": "0",
     "tpid": "0x8100"
   },
   "Ethernet28": {
@@ -725,6 +796,7 @@
     "alias": "Eth8/1",
     "pfc_asym": "off",
     "speed": "25000",
+    "subport": "1",
     "tpid": "0x8100"
   },
   "Ethernet66": {
@@ -735,6 +807,7 @@
     "alias": "Eth17/2",
     "pfc_asym": "off",
     "speed": "50000",
+    "subport": "2",
     "tpid": "0x8100"
   },
   "Ethernet60": {
@@ -746,6 +819,7 @@
     "alias": "Eth16",
     "pfc_asym": "off",
     "speed": "100000",
+    "subport": "0",
     "tpid": "0x8100"
   },
   "Ethernet64": {
@@ -756,6 +830,7 @@
     "alias": "Eth17/1",
     "pfc_asym": "off",
     "speed": "50000",
+    "subport": "1",
     "tpid": "0x8100"
   },
   "Ethernet44": {
@@ -766,6 +841,7 @@
     "alias": "Eth12/1",
     "pfc_asym": "off",
     "speed": "50000",
+    "subport": "1",
     "tpid": "0x8100"
   },
   "Ethernet20": {
@@ -778,6 +854,7 @@
     "alias": "Eth6",
     "pfc_asym": "off",
     "speed": "100000",
+    "subport": "0",
     "tpid": "0x8100"
   },
   "Ethernet79": {
@@ -788,6 +865,7 @@
     "alias": "Eth20/3",
     "pfc_asym": "off",
     "speed": "25000",
+    "subport": "3",
     "tpid": "0x8100"
   },
   "Ethernet69": {
@@ -798,6 +876,7 @@
     "alias": "Eth18/2",
     "pfc_asym": "off",
     "speed": "25000",
+    "subport": "2",
     "tpid": "0x8100"
   },
   "Ethernet24": {
@@ -808,6 +887,7 @@
     "alias": "Eth7/1",
     "pfc_asym": "off",
     "speed": "50000",
+    "subport": "1",
     "tpid": "0x8100"
   },
   "Ethernet26": {
@@ -818,6 +898,7 @@
     "alias": "Eth7/2",
     "pfc_asym": "off",
     "speed": "50000",
+    "subport": "2",
     "tpid": "0x8100"
   },
   "Ethernet128": {
@@ -828,7 +909,8 @@
     "mtu": "9100",
     "alias": "Eth33",
     "pfc_asym": "off",
-    "speed": "40000"
+    "speed": "40000",
+    "subport": "0"
   },
   "Ethernet132": {
     "index": "34",
@@ -838,7 +920,8 @@
     "mtu": "9100",
     "alias": "Eth34",
     "pfc_asym": "off",
-    "speed": "25000"
+    "speed": "25000",
+    "subport": "0"
   },
   "Ethernet136": {
     "index": "35",
@@ -848,7 +931,8 @@
     "mtu": "9100",
     "alias": "Eth35/1",
     "pfc_asym": "off",
-    "speed": "10000"
+    "speed": "10000",
+    "subport": "1"
   },
   "Ethernet137": {
     "index": "35",
@@ -858,7 +942,8 @@
     "mtu": "9100",
     "alias": "Eth35/2",
     "pfc_asym": "off",
-    "speed": "10000"
+    "speed": "10000",
+    "subport": "2"
   },
   "Ethernet138": {
     "index": "35",
@@ -868,7 +953,8 @@
     "mtu": "9100",
     "alias": "Eth35/3",
     "pfc_asym": "off",
-    "speed": "10000"
+    "speed": "10000",
+    "subport": "3"
   },
   "Ethernet139": {
     "index": "35",
@@ -878,7 +964,8 @@
     "mtu": "9100",
     "alias": "Eth35/4",
     "pfc_asym": "off",
-    "speed": "10000"
+    "speed": "10000",
+    "subport": "4"
   },
   "Ethernet140": {
     "index": "36",
@@ -888,6 +975,7 @@
     "mtu": "9100",
     "alias": "Eth36/1",
     "pfc_asym": "off",
+    "subport": "1",
     "speed": "25000"
   },
   "Ethernet141": {
@@ -898,7 +986,8 @@
     "mtu": "9100",
     "alias": "Eth36/2",
     "pfc_asym": "off",
-    "speed": "25000"
+    "speed": "25000",
+    "subport": "2"
   },
   "Ethernet142": {
     "index": "36",
@@ -909,6 +998,7 @@
     "alias": "Eth36/3",
     "pfc_asym": "off",
     "speed": "50000",
+    "subport": "3",
     "role": "Dpc"
   },
   "Ethernet144": {
@@ -920,6 +1010,7 @@
     "alias": "Eth37",
     "pfc_asym": "off",
     "speed": "100000",
+    "subport": "0",
     "fec": "rs"
   }
 }
diff --git a/src/sonic-config-engine/tests/test_cfggen_platformJson.py b/src/sonic-config-engine/tests/test_cfggen_platformJson.py
index 5d39fd2f3..4a255ba5d 100644
--- a/src/sonic-config-engine/tests/test_cfggen_platformJson.py
+++ b/src/sonic-config-engine/tests/test_cfggen_platformJson.py
@@ -79,19 +79,19 @@ def test_platform_json_specific_ethernet_interfaces(self):
         argument = ['-m', self.platform_sample_graph, '-p', self.platform_json, '-S', self.hwsku_json, '-v', "PORT[\'Ethernet8\']"]
         output = self.run_script(argument)
         self.maxDiff = None
-        expected = "{'index': '3', 'lanes': '8', 'description': 'Eth3/1', 'mtu': '9100', 'alias': 'Eth3/1', 'pfc_asym': 'off', 'speed': '25000', 'tpid': '0x8100'}"
+        expected = "{'index': '3', 'lanes': '8', 'description': 'Eth3/1', 'mtu': '9100', 'alias': 'Eth3/1', 'pfc_asym': 'off', 'speed': '25000', 'subport': '1', 'tpid': '0x8100'}"
         self.assertEqual(utils.to_dict(output.strip()), utils.to_dict(expected))
 
         argument = ['-m', self.platform_sample_graph, '-p', self.platform_json, '-S', self.hwsku_json, '-v', "PORT[\'Ethernet112\']"]
         output = self.run_script(argument)
         self.maxDiff = None
-        expected = "{'index': '29', 'lanes': '112', 'description': 'Eth29/1', 'mtu': '9100', 'alias': 'Eth29/1', 'pfc_asym': 'off', 'speed': '25000', 'tpid': '0x8100'}"
+        expected = "{'index': '29', 'lanes': '112', 'description': 'Eth29/1', 'mtu': '9100', 'alias': 'Eth29/1', 'pfc_asym': 'off', 'speed': '25000', 'subport': '1', 'tpid': '0x8100'}"
         self.assertEqual(utils.to_dict(output.strip()), utils.to_dict(expected))
 
         argument = ['-m', self.platform_sample_graph, '-p', self.platform_json, '-S', self.hwsku_json, '-v', "PORT[\'Ethernet4\']"]
         output = self.run_script(argument)
         self.maxDiff = None
-        expected = "{'index': '2', 'lanes': '4,5', 'description': 'Eth2/1', 'admin_status': 'up', 'mtu': '9100', 'alias': 'Eth2/1', 'pfc_asym': 'off', 'speed': '50000', 'tpid': '0x8100'}"
+        expected = "{'index': '2', 'lanes': '4,5', 'description': 'Eth2/1', 'admin_status': 'up', 'mtu': '9100', 'alias': 'Eth2/1', 'pfc_asym': 'off', 'speed': '50000', 'subport': '1', 'tpid': '0x8100'}"
         print(output.strip())
         self.assertEqual(utils.to_dict(output.strip()), utils.to_dict(expected))
 

From 3a84ba8cac38c15d70df14ba428bdca9c4a3a3a6 Mon Sep 17 00:00:00 2001
From: Ze Gan <ganze718@gmail.com>
Date: Sat, 18 May 2024 06:10:31 +0800
Subject: [PATCH 0599/1115] [vs]: BMv2-based DPU KVM image (#18762)

Why I did it
Provide POC for development and cooperation.
Test for CI (Azp)

Microsoft ADO (number only): 27515178

How I did it
HLD: sonic-net/SONiC#1634

How to verify it
Merge PR: sonic-net/sonic-sairedis#1377

Download the vsdpu image from Azp
check the syncd links to the correct DASH SAI
admin@vlab-01:~$ docker exec -ti syncd bash
root@vlab-01:/# dpkg -l | grep sai
ii  libsai                                 1.0.0                          amd64        This package contains DASH libsai
root@vlab-01:/# dpkg -L libsai
/.
/etc
/etc/dash
/etc/dash/dash_pipeline.json
/etc/dash/dash_pipeline_ir.json
/etc/dash/dash_pipeline_p4rt.json
/etc/dash/dash_pipeline_p4rt.txt
/usr
/usr/lib
/usr/lib/x86_64-linux-gnu
/usr/lib/x86_64-linux-gnu/libsai.so
root@vlab-01:/# which syncd_dash
/usr/bin/syncd_dash
root@vlab-01:/# ldd /usr/bin/syncd_dash | grep sai
        libsaimetadata.so.0 => /usr/lib/x86_64-linux-gnu/libsaimetadata.so.0 (0x00007f949e99b000)
        libsaimeta.so.0 => /usr/lib/x86_64-linux-gnu/libsaimeta.so.0 (0x00007f949e8ca000)
        libsai.so => /usr/lib/x86_64-linux-gnu/libsai.so (0x00007f949e417000)
root@vlab-01:/# md5sum /usr/lib/x86_64-linux-gnu/libsai.so
9e86fa2f49a824837064d1b8f95b7e48  /usr/lib/x86_64-linux-gnu/libsai.so
root@vlab-01:/# ls /etc/dash
dash_pipeline.json  dash_pipeline_ir.json  dash_pipeline_p4rt.json  dash_pipeline_p4rt.txt
Check the dash engine logs(BMv2) likes following
admin@vlab-01:~$ docker logs dash_engine
Calling target program-options parser
Adding interface eth1 as port 0
[11:20:12.458] [bmv2] [D] [thread 7] Adding interface eth1 as port 0
[11:20:12.500] [bmv2] [E] [thread 7] Add port operation failed
Adding interface eth2 as port 1
[11:20:12.500] [bmv2] [D] [thread 7] Adding interface eth2 as port 1
[11:20:12.556] [bmv2] [E] [thread 7] Add port operation failed
Server listening on 0.0.0.0:9559
[11:22:09.706] [bmv2] [D] [thread 23] Set default default entry for table 'tbl_dash_pipeline241': dash_pipeline241 -
[11:22:09.706] [bmv2] [D] [thread 23] Set default default entry for table 'dash_ingress.vip': dash_ingress.deny -
[11:22:09.706] [bmv2] [D] [thread 23] Set default default entry for table 'tbl_dash_pipeline247': dash_pipeline247 -
[11:22:09.706] [bmv2] [D] [thread 23] Set default default entry for table 'dash_ingress.direction_lookup_stage.direction_lookup': dash_ingress.direction_lookup_stage.set_inbound_direction -
[11:22:09.706] [bmv2] [D] [thread 23] Set default default entry for table 'dash_ingress.appliance': NoAction -
[11:22:09.706] [bmv2] [D] [thread 23] Set default default entry for table 'tbl_eni_lookup33': eni_lookup33 -
[11:22:09.706] [bmv2] [D] [thread 23] Set default default entry for table 'tbl_eni_lookup33_0': eni_lookup33_0 -
[11:22:09.706] [bmv2] [D] [thread 23] Set default default entry for table 'tbl_eni_lookup33_1': eni_lookup33_1 -
[11:22:09.706] [bmv2] [D] [thread 23] Set default default entry for table
...
[11:23:32.035] [bmv2] [D] [thread 23] Set default default entry for table 'tbl_metering_update92': metering_update92 -
[11:23:32.035] [bmv2] [D] [thread 23] Set default default entry for table 'tbl_metering_update94': metering_update94 -
[11:23:32.035] [bmv2] [D] [thread 23] Set default default entry for table 'tbl_metering_update97': metering_update97 -
[11:23:32.035] [bmv2] [D] [thread 23] Set default default entry for table 'dash_ingress.metering_update_stage.meter_bucket': NoAction -
[11:23:32.035] [bmv2] [D] [thread 23] Set default default entry for table 'tbl_metering_update103': metering_update103 -
[11:23:32.035] [bmv2] [D] [thread 23] Set default default entry for table 'tbl_metering_update105': metering_update105 -
[11:23:32.035] [bmv2] [D] [thread 23] Set default default entry for table 'dash_ingress.metering_update_stage.eni_meter': NoAction -
[11:23:32.035] [bmv2] [D] [thread 23] Set default default entry for table 'tbl_drop_action': dash_ingress.drop_action -
[11:23:32.049] [bmv2] [D] [thread 23] simple_switch target has been notified of a config swap

Signed-off-by: Ze Gan <ganze718@gmail.com>
---
 .../build_templates/sonic_debian_extension.j2 |  4 ++
 platform/vs/dash-engine.service               | 16 ++++++
 platform/vs/docker-dash-engine.dep            |  8 +++
 platform/vs/docker-dash-engine.mk             | 14 +++++
 .../vs/docker-dash-engine/Dockerfile.cleanup  | 11 ++++
 platform/vs/docker-dash-engine/Dockerfile.j2  | 23 ++++++++
 .../vs/docker-dash-engine/critical_processes  |  1 +
 platform/vs/docker-dash-engine/start.sh       |  3 +
 .../vs/docker-dash-engine/supervisord.conf    | 33 +++++++++++
 platform/vs/docker-gbsyncd-vs/Dockerfile.j2   |  7 +++
 platform/vs/docker-syncd-vs/Dockerfile.j2     |  9 ++-
 platform/vs/rules.dep                         |  1 +
 platform/vs/rules.mk                          |  1 +
 platform/vs/syncd-vs.mk                       | 10 ++++
 rules/dash-sai.dep                            |  8 +++
 rules/dash-sai.mk                             | 17 ++++++
 rules/grpc.mk                                 | 39 +++++++++++++
 rules/p4lang.dep                              |  9 +++
 rules/p4lang.mk                               | 45 +++++++++++++++
 rules/protobuf.mk                             |  9 +++
 slave.mk                                      |  1 -
 sonic-slave-bookworm/Dockerfile.j2            | 31 ++++++++++
 sonic-slave-bullseye/Dockerfile.j2            | 34 +++++++++++
 src/dash-sai/Makefile                         | 57 +++++++++++++++++++
 src/grpc/Makefile                             | 30 ++++++++++
 src/p4lang/Makefile                           | 48 ++++++++++++++++
 src/protobuf/Makefile                         |  4 +-
 27 files changed, 470 insertions(+), 3 deletions(-)
 create mode 100644 platform/vs/dash-engine.service
 create mode 100644 platform/vs/docker-dash-engine.dep
 create mode 100644 platform/vs/docker-dash-engine.mk
 create mode 100644 platform/vs/docker-dash-engine/Dockerfile.cleanup
 create mode 100644 platform/vs/docker-dash-engine/Dockerfile.j2
 create mode 100644 platform/vs/docker-dash-engine/critical_processes
 create mode 100755 platform/vs/docker-dash-engine/start.sh
 create mode 100644 platform/vs/docker-dash-engine/supervisord.conf
 create mode 100644 rules/dash-sai.dep
 create mode 100644 rules/dash-sai.mk
 create mode 100644 rules/grpc.mk
 create mode 100644 rules/p4lang.dep
 create mode 100644 rules/p4lang.mk
 create mode 100644 src/dash-sai/Makefile
 create mode 100644 src/grpc/Makefile
 create mode 100644 src/p4lang/Makefile

diff --git a/files/build_templates/sonic_debian_extension.j2 b/files/build_templates/sonic_debian_extension.j2
index d30e85c26..ca8ad48b9 100644
--- a/files/build_templates/sonic_debian_extension.j2
+++ b/files/build_templates/sonic_debian_extension.j2
@@ -633,6 +633,10 @@ sudo cp $IMAGE_CONFIGS/misc/docker-wait-any $FILESYSTEM_ROOT/usr/bin/
 sudo cp $IMAGE_CONFIGS/topology/topology.service $FILESYSTEM_ROOT_USR_LIB_SYSTEMD_SYSTEM
 echo "topology.service" | sudo tee -a $GENERATED_SERVICE_FILE
 sudo cp $IMAGE_CONFIGS/topology/topology.sh $FILESYSTEM_ROOT/usr/bin
+
+sudo cp platform/vs/dash-engine.service $FILESYSTEM_ROOT_USR_LIB_SYSTEMD_SYSTEM
+sudo LANG=C chroot $FILESYSTEM_ROOT systemctl disable dash-engine
+
 {%- endif %}
 
 # Copy platform topology configuration scripts
diff --git a/platform/vs/dash-engine.service b/platform/vs/dash-engine.service
new file mode 100644
index 000000000..342cca06a
--- /dev/null
+++ b/platform/vs/dash-engine.service
@@ -0,0 +1,16 @@
+[Unit]
+Description=Dash engine service
+Before=syncd.service
+StartLimitIntervalSec=1200
+StartLimitBurst=3
+
+[Service]
+User=root
+ExecStartPre=/usr/bin/dash_engine.sh start
+ExecStart=/usr/bin/dash_engine.sh wait
+ExecStop=/usr/bin/dash_engine.sh stop
+Restart=always
+RestartSec=30
+
+[Install]
+WantedBy=multi-user.target
diff --git a/platform/vs/docker-dash-engine.dep b/platform/vs/docker-dash-engine.dep
new file mode 100644
index 000000000..cd0bfe889
--- /dev/null
+++ b/platform/vs/docker-dash-engine.dep
@@ -0,0 +1,8 @@
+DPATH       := $($(DOCKER_DASH_ENGINE)_PATH)
+DEP_FILES   := $(SONIC_COMMON_FILES_LIST) platform/vs/docker-dash-engine.mk platform/vs/docker-dash-engine.dep   
+DEP_FILES   += $(SONIC_COMMON_BASE_FILES_LIST)
+DEP_FILES   += $(shell git ls-files $(DPATH))
+
+$(DOCKER_DASH_ENGINE)_CACHE_MODE  := GIT_CONTENT_SHA 
+$(DOCKER_DASH_ENGINE)_DEP_FLAGS   := $(SONIC_COMMON_FLAGS_LIST)
+$(DOCKER_DASH_ENGINE)_DEP_FILES   := $(DEP_FILES)
diff --git a/platform/vs/docker-dash-engine.mk b/platform/vs/docker-dash-engine.mk
new file mode 100644
index 000000000..177045f29
--- /dev/null
+++ b/platform/vs/docker-dash-engine.mk
@@ -0,0 +1,14 @@
+# docker image for vs gbsyncd
+
+DOCKER_DASH_ENGINE = docker-dash-engine.gz
+$(DOCKER_DASH_ENGINE)_VERSION = 1.0.0
+$(DOCKER_DASH_ENGINE)_PACKAGE_NAME = dash-engine
+$(DOCKER_DASH_ENGINE)_PATH = $(PLATFORM_PATH)/docker-dash-engine
+
+SONIC_DOCKER_IMAGES += $(DOCKER_DASH_ENGINE)
+SONIC_INSTALL_DOCKER_IMAGES += $(DOCKER_DASH_ENGINE)
+
+$(DOCKER_DASH_ENGINE)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE_BOOKWORM)
+
+$(DOCKER_DASH_ENGINE)_CONTAINER_NAME = dash_engine
+$(DOCKER_DASH_ENGINE)_CONTAINER_PRIVILEGED = true
diff --git a/platform/vs/docker-dash-engine/Dockerfile.cleanup b/platform/vs/docker-dash-engine/Dockerfile.cleanup
new file mode 100644
index 000000000..514bd95ae
--- /dev/null
+++ b/platform/vs/docker-dash-engine/Dockerfile.cleanup
@@ -0,0 +1,11 @@
+# Base docker build
+FROM docker-dash-engine-sonic:latest
+
+# Copy the cache data to host
+From scratch as output
+COPY --from=docker-dash-engine-sonic:latest /cache.tgz cache.tgz
+
+# Clean up the cache data
+FROM docker-dash-engine-sonic:latest as final
+RUN rm /cache.tgz
+
diff --git a/platform/vs/docker-dash-engine/Dockerfile.j2 b/platform/vs/docker-dash-engine/Dockerfile.j2
new file mode 100644
index 000000000..a3d2ebf03
--- /dev/null
+++ b/platform/vs/docker-dash-engine/Dockerfile.j2
@@ -0,0 +1,23 @@
+FROM p4lang/behavioral-model@sha256:ce45720e28a96a50f275c1b511cd84c2558b62f2cf7a7e506765183bc3fb2e32
+## FROM docker-config-engine-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}}
+
+## Make apt-get non-interactive
+ENV DEBIAN_FRONTEND=noninteractive
+
+RUN apt-get update
+
+RUN apt-get install -f -y supervisor rsyslog  python3-pip
+RUN pip3 install supervisord-dependent-startup
+
+COPY ["start.sh", "/usr/bin/"]
+
+## COPY ["supervisord.conf", "/etc/supervisor/conf.d/"]
+## COPY ["files/supervisor-proc-exit-listener", "/usr/bin"]
+## COPY ["critical_processes", "/etc/supervisor/"]
+
+## Clean up
+RUN apt-get clean -y; apt-get autoclean -y; apt-get autoremove -y
+RUN rm -rf /debs
+
+## ENTRYPOINT ["/usr/bin/supervisord"]
+ENTRYPOINT ["/usr/bin/start.sh"]
diff --git a/platform/vs/docker-dash-engine/critical_processes b/platform/vs/docker-dash-engine/critical_processes
new file mode 100644
index 000000000..41d8adfbc
--- /dev/null
+++ b/platform/vs/docker-dash-engine/critical_processes
@@ -0,0 +1 @@
+program:simple_switch_grpc
diff --git a/platform/vs/docker-dash-engine/start.sh b/platform/vs/docker-dash-engine/start.sh
new file mode 100755
index 000000000..26adccd38
--- /dev/null
+++ b/platform/vs/docker-dash-engine/start.sh
@@ -0,0 +1,3 @@
+#!/usr/bin/env bash
+
+simple_switch_grpc --interface 0@eth1 --interface 1@eth2 --log-console --no-p4
diff --git a/platform/vs/docker-dash-engine/supervisord.conf b/platform/vs/docker-dash-engine/supervisord.conf
new file mode 100644
index 000000000..df50a2d9a
--- /dev/null
+++ b/platform/vs/docker-dash-engine/supervisord.conf
@@ -0,0 +1,33 @@
+[supervisord]
+logfile_maxbytes=1MB
+logfile_backups=2
+nodaemon=true
+
+[eventlistener:dependent-startup]
+command=python3 -m supervisord_dependent_startup
+autostart=true
+autorestart=unexpected
+startretries=0
+exitcodes=0,3
+events=PROCESS_STATE
+buffer_size=1024
+
+[program:rsyslogd]
+command=/usr/sbin/rsyslogd -n -iNONE
+priority=1
+autostart=true
+autorestart=unexpected
+stdout_logfile=syslog
+stderr_logfile=syslog
+dependent_startup=true
+
+[program:start]
+command=/usr/bin/start.sh
+priority=2
+autostart=false
+autorestart=false
+startsecs=0
+stdout_logfile=syslog
+stderr_logfile=syslog
+dependent_startup=true
+dependent_startup_wait_for=rsyslogd:running
diff --git a/platform/vs/docker-gbsyncd-vs/Dockerfile.j2 b/platform/vs/docker-gbsyncd-vs/Dockerfile.j2
index e5491fd1b..1c28688ca 100644
--- a/platform/vs/docker-gbsyncd-vs/Dockerfile.j2
+++ b/platform/vs/docker-gbsyncd-vs/Dockerfile.j2
@@ -9,6 +9,13 @@ RUN apt-get update
 
 RUN apt-get install -f -y iproute2 libcap2-bin
 
+# For DASH engine
+
+COPY debs/libnl-3-dev_3.5.0-1_amd64.deb debs/libnl-route-3-dev_3.5.0-1_amd64.deb debs/
+RUN dpkg -i debs/libnl-3-dev_3.5.0-1_amd64.deb debs/libnl-route-3-dev_3.5.0-1_amd64.deb
+
+RUN apt-get install -f -y libabsl20220623 libc-ares2 python3-six libboost-thread1.74.0 libboost-dev libboost-system-dev libboost-thread-dev libboost-filesystem1.74.0 libboost-program-options1.74.0 libboost-thread1.74.0 libnanomsg5 libpcap0.8 libthrift-0.17.0 libboost-dev libboost-filesystem-dev libboost-program-options-dev libgmp-dev libnanomsg-dev libpcap-dev libtool pkg-config libthrift-dev python3-thrift thrift-compiler libboost-iostreams1.74.0 libgc1 cpp libboost-dev libboost-all-dev libboost-graph-dev libboost-iostreams-dev libfl-dev libgc-dev libgmp-dev libbpf-dev tcpdump libelf-dev llvm clang python3-pyroute2 python3-ply python3-scapy python3-setuptools python3-thrift libthrift-0.17.0 libgrpc++1.51 libgrpc29 libprotobuf32 libboost-dev libboost-system-dev libboost-thread-dev libprotoc-dev protobuf-compiler python3-protobuf libgrpc++-dev libgrpc-dev protobuf-compiler-grpc python3-grpcio 
+
 COPY \
 {% for deb in docker_gbsyncd_vs_debs.split(' ') -%}
 debs/{{ deb }}{{' '}}
diff --git a/platform/vs/docker-syncd-vs/Dockerfile.j2 b/platform/vs/docker-syncd-vs/Dockerfile.j2
index a29b5e6b6..6e40fd822 100644
--- a/platform/vs/docker-syncd-vs/Dockerfile.j2
+++ b/platform/vs/docker-syncd-vs/Dockerfile.j2
@@ -8,7 +8,14 @@ ENV DEBIAN_FRONTEND=noninteractive
 
 RUN apt-get update
 
-RUN apt-get install -y libcap2-bin
+RUN apt-get install -f -y iproute2 libcap2-bin
+
+# For DASH engine
+
+COPY debs/libnl-3-dev_3.5.0-1_amd64.deb debs/libnl-route-3-dev_3.5.0-1_amd64.deb debs/
+RUN dpkg -i debs/libnl-3-dev_3.5.0-1_amd64.deb debs/libnl-route-3-dev_3.5.0-1_amd64.deb
+
+RUN apt-get install -f -y libabsl20220623 libc-ares2 python3-six libboost-thread1.74.0 libboost-dev libboost-system-dev libboost-thread-dev libboost-filesystem1.74.0 libboost-program-options1.74.0 libboost-thread1.74.0 libnanomsg5 libpcap0.8 libthrift-0.17.0 libboost-dev libboost-filesystem-dev libboost-program-options-dev libgmp-dev libnanomsg-dev libpcap-dev libtool pkg-config libthrift-dev python3-thrift thrift-compiler libboost-iostreams1.74.0 libgc1 cpp libboost-dev libboost-all-dev libboost-graph-dev libboost-iostreams-dev libfl-dev libgc-dev libgmp-dev libbpf-dev tcpdump libelf-dev llvm clang python3-pyroute2 python3-ply python3-scapy python3-setuptools python3-thrift libthrift-0.17.0 libgrpc++1.51 libgrpc29 libprotobuf32 libboost-dev libboost-system-dev libboost-thread-dev libprotoc-dev protobuf-compiler python3-protobuf libgrpc++-dev libgrpc-dev protobuf-compiler-grpc python3-grpcio 
 
 {% if docker_syncd_vs_debs.strip() -%}
 # Copy built Debian packages
diff --git a/platform/vs/rules.dep b/platform/vs/rules.dep
index 44c863612..14597a1e0 100644
--- a/platform/vs/rules.dep
+++ b/platform/vs/rules.dep
@@ -10,3 +10,4 @@ include $(PLATFORM_PATH)/one-image.dep
 include $(PLATFORM_PATH)/onie.dep
 include $(PLATFORM_PATH)/kvm-image.dep
 
+include $(PLATFORM_PATH)/docker-dash-engine.dep
diff --git a/platform/vs/rules.mk b/platform/vs/rules.mk
index 6f67778ea..c03e386b8 100644
--- a/platform/vs/rules.mk
+++ b/platform/vs/rules.mk
@@ -11,5 +11,6 @@ include $(PLATFORM_PATH)/one-image.mk
 include $(PLATFORM_PATH)/onie.mk
 include $(PLATFORM_PATH)/kvm-image.mk
 include $(PLATFORM_PATH)/raw-image.mk
+include $(PLATFORM_PATH)/docker-dash-engine.mk
 
 SONIC_ALL += $(SONIC_ONE_IMAGE) $(SONIC_KVM_IMAGE) $(DOCKER_SONIC_VS) $(SONIC_RAW_IMAGE)
diff --git a/platform/vs/syncd-vs.mk b/platform/vs/syncd-vs.mk
index e9edf78b2..748e2a7df 100644
--- a/platform/vs/syncd-vs.mk
+++ b/platform/vs/syncd-vs.mk
@@ -2,6 +2,16 @@ $(LIBSAIREDIS)_DEB_BUILD_PROFILES += syncd vs
 
 SYNCD_VS = syncd-vs_1.0.0_$(CONFIGURED_ARCH).deb
 $(SYNCD_VS)_RDEPENDS += $(LIBSAIREDIS) $(LIBSAIMETADATA) $(LIBSAIVS)
+
+ifeq ($(BLDENV),bookworm)
+  $(LIBSAIREDIS)_DEB_BUILD_PROFILES += dashsai
+  $(LIBSAIREDIS)_DEPENDS += $(DASH_SAI)
+  $(SYNCD_VS)_RDEPENDS += $(DASH_SAI)
+else
+  $(warning DASH_SAI cannot support this build environment $(BLDENV))
+endif
+
+
 $(eval $(call add_derived_package,$(LIBSAIREDIS),$(SYNCD_VS)))
 
 SYNCD_VS_DBG = syncd-vs-dbgsym_1.0.0_$(CONFIGURED_ARCH).deb
diff --git a/rules/dash-sai.dep b/rules/dash-sai.dep
new file mode 100644
index 000000000..2cc40f8f7
--- /dev/null
+++ b/rules/dash-sai.dep
@@ -0,0 +1,8 @@
+SPATH       := $($(DASH_SAI)_SRC_PATH)
+DEP_FILES   := $(SONIC_COMMON_FILES_LIST) rules/dash-sai.mk rules/dash-sai.dep   
+DEP_FILES   += $(SONIC_COMMON_BASE_FILES_LIST)
+DEP_FILES   += $(shell git ls-files $(SPATH))
+
+$(DASH_SAI)_CACHE_MODE  := GIT_CONTENT_SHA 
+$(DASH_SAI)_DEP_FLAGS   := $(SONIC_COMMON_FLAGS_LIST)
+$(DASH_SAI)_DEP_FILES   := $(DEP_FILES)
diff --git a/rules/dash-sai.mk b/rules/dash-sai.mk
new file mode 100644
index 000000000..7accf72e9
--- /dev/null
+++ b/rules/dash-sai.mk
@@ -0,0 +1,17 @@
+# DASH SAI repo: https://github.com/sonic-net/DASH
+
+DASH_SAI_VERSION = 1.0.0
+DASH_SAI_COMMIT = cc281333e24ade258773ea843f669251a44d7c9a
+
+export DASH_SAI_VERSION
+export DASH_SAI_COMMIT
+
+DASH_SAI = libsai_$(DASH_SAI_VERSION)_$(CONFIGURED_ARCH).deb
+$(DASH_SAI)_SRC_PATH = $(SRC_PATH)/dash-sai
+$(DASH_SAI)_DEPENDS = $(P4LANG_PI) $(P4LANG_BMV2) $(P4LANG_P4C)
+$(DASH_SAI)_RDEPENDS = $(P4LANG_PI) $(P4LANG_BMV2) $(P4LANG_P4C)
+SONIC_MAKE_DEBS += $(DASH_SAI)
+
+DASH_SAI_DEV = libsai-dev_$(DASH_SAI_VERSION)_$(CONFIGURED_ARCH).deb
+$(DASH_SAI_DEV)_DEPENDS = $(DASH_SAI)
+$(eval $(call add_derived_package,$(DASH_SAI),$(DASH_SAI_DEV)))
diff --git a/rules/grpc.mk b/rules/grpc.mk
new file mode 100644
index 000000000..71612e708
--- /dev/null
+++ b/rules/grpc.mk
@@ -0,0 +1,39 @@
+# grpc package
+# A newer GRPC has been released in bookworm, So we only need to build it
+# in the bullseye environment.
+ifeq ($(BLDENV),bullseye)
+
+    GRPC_VERSION = 1.30.2
+    GRPC_VERSION_FULL = $(GRPC_VERSION)-3
+
+    export GRPC_VERSION
+    export GRPC_VERSION_FULL
+
+    GRPC = libgrpc10_$(GRPC_VERSION_FULL)_$(CONFIGURED_ARCH).deb
+    $(GRPC)_DEPENDS = $(PROTOBUF) $(PROTOC32) $(PROTOBUF_COMPILER) $(PROTOBUF_DEV) $(PROTOC_DEV) $(RUBY_PROTOBUF)
+    $(GRPC)_SRC_PATH = $(SRC_PATH)/grpc
+    SONIC_MAKE_DEBS += $(GRPC)
+
+    GRPC_DEV = libgrpc-dev_$(GRPC_VERSION_FULL)_$(CONFIGURED_ARCH).deb
+    $(GRPC_DEV)_DEPENDS = $(GRPC)
+    $(eval $(call add_derived_package,$(GRPC),$(GRPC_DEV)))
+
+    GRPC_CPP = libgrpc++1_$(GRPC_VERSION_FULL)_$(CONFIGURED_ARCH).deb
+    $(GRPC_CPP)_DEPENDS = $(GRPC) $(PROTOC32)
+    $(eval $(call add_derived_package,$(GRPC),$(GRPC_CPP)))
+
+    GRPC_CPP_DEV = libgrpc++-dev_$(GRPC_VERSION_FULL)_$(CONFIGURED_ARCH).deb
+    $(GRPC_CPP_DEV)_DEPENDS = $(GRPC_CPP) $(GRPC_DEV)
+    $(eval $(call add_derived_package,$(GRPC),$(GRPC_CPP_DEV)))
+
+    PYTHON3_GRPC = python3-grpcio_$(GRPC_VERSION_FULL)_$(CONFIGURED_ARCH).deb
+    $(PYTHON3_GRPC)_DEPENDS = $(GRPC_DEV) $(GRPC) $(GRPC_DEV) $(GRPC_CPP) $(GRPC_CPP_DEV) $(PYTHON3_PROTOBUF)
+    $(PYTHON3_GRPC)_RDEPENDS = $(GRPC) $(GRPC_CPP) $(PYTHON3_PROTOBUF)
+    $(eval $(call add_derived_package,$(GRPC),$(PYTHON3_GRPC)))
+
+    GRPC_COMPILER = protobuf-compiler-grpc_$(GRPC_VERSION_FULL)_$(CONFIGURED_ARCH).deb
+    $(GRPC_COMPILER)_DEPENDS = $(PROTOBUF) $(PROTOC32) $(PROTOBUF_COMPILER) 
+    $(GRPC_COMPILER)_RDEPENDS = $(PROTOBUF) $(PROTOC32) $(PROTOBUF_COMPILER)
+    $(eval $(call add_derived_package,$(GRPC),$(GRPC_COMPILER)))
+
+endif
diff --git a/rules/p4lang.dep b/rules/p4lang.dep
new file mode 100644
index 000000000..01effeb6f
--- /dev/null
+++ b/rules/p4lang.dep
@@ -0,0 +1,9 @@
+
+SPATH       := $($(P4LANG_PI)_SRC_PATH)
+DEP_FILES   := $(SONIC_COMMON_FILES_LIST) rules/p4lang.mk rules/p4lang.dep   
+DEP_FILES   += $(SONIC_COMMON_BASE_FILES_LIST)
+DEP_FILES   += $(shell git ls-files $(SPATH))
+
+$(P4LANG_PI)_CACHE_MODE  := GIT_CONTENT_SHA 
+$(P4LANG_PI)_DEP_FLAGS   := $(SONIC_COMMON_FLAGS_LIST)
+$(P4LANG_PI)_DEP_FILES   := $(DEP_FILES)
diff --git a/rules/p4lang.mk b/rules/p4lang.mk
new file mode 100644
index 000000000..2bca4e1f5
--- /dev/null
+++ b/rules/p4lang.mk
@@ -0,0 +1,45 @@
+# p4lang package
+
+# Main target: p4lang-pi
+P4LANG_PI_VERSION = 0.1.0
+P4LANG_PI_VERSION_FULL = $(P4LANG_PI_VERSION)-15
+
+export P4LANG_PI_VERSION
+export P4LANG_PI_VERSION_FULL
+
+P4LANG_PI = p4lang-pi_$(P4LANG_PI_VERSION_FULL)_$(CONFIGURED_ARCH).deb
+$(P4LANG_PI)_DEPENDS = $(PROTOBUF) $(PROTOBUF_LITE) $(PROTOC32) $(PYTHON3_PROTOBUF) $(GRPC) $(GRPC_CPP) $(PYTHON3_GRPC) $(PROTOBUF_DEV) $(PROTOC_DEV) $(PROTOBUF_COMPILER) $(GRPC_DEV) $(GRPC_CPP_DEV) $(GRPC_COMPILER)
+$(P4LANG_PI)_RDEPENDS = $(PROTOBUF) $(PROTOBUF_LITE) $(PROTOC32) $(PYTHON3_PROTOBUF) $(GRPC) $(GRPC_CPP) $(PYTHON3_GRPC) $(PROTOBUF_DEV) $(PROTOC_DEV) $(PROTOBUF_COMPILER) $(GRPC_DEV) $(GRPC_CPP_DEV) $(GRPC_COMPILER)
+
+
+P4LANG = $(P4LANG_PI)
+$(P4LANG)_SRC_PATH = $(SRC_PATH)/p4lang
+SONIC_MAKE_DEBS += $(P4LANG)
+
+# p4lang-bmv2
+
+P4LANG_BMV2_VERSION = 1.15.0
+P4LANG_BMV2_VERSION_FULL = $(P4LANG_BMV2_VERSION)-7
+
+export P4LANG_BMV2_VERSION
+export P4LANG_BMV2_VERSION_FULL
+
+P4LANG_BMV2 = p4lang-bmv2_$(P4LANG_BMV2_VERSION_FULL)_$(CONFIGURED_ARCH).deb
+$(P4LANG_BMV2)_SRC_PATH = $(SRC_PATH)/p4lang
+$(P4LANG_BMV2)_DEPENDS = $(P4LANG_PI)
+$(P4LANG_BMV2)_RDEPENDS = $(P4LANG_PI)
+SONIC_MAKE_DEBS += $(P4LANG_BMV2)
+
+# p4lang-p4c
+
+P4LANG_P4C_VERSION = 1.2.4.2
+P4LANG_P4C_VERSION_FULL = $(P4LANG_P4C_VERSION)-2
+
+export P4LANG_P4C_VERSION
+export P4LANG_P4C_VERSION_FULL
+
+P4LANG_P4C = p4lang-p4c_$(P4LANG_P4C_VERSION_FULL)_$(CONFIGURED_ARCH).deb
+$(P4LANG_P4C)_SRC_PATH = $(SRC_PATH)/p4lang
+$(P4LANG_P4C)_DEPENDS = $(P4LANG_BMV2)
+$(P4LANG_P4C)_RDEPENDS = $(P4LANG_BMV2)
+SONIC_MAKE_DEBS += $(P4LANG_P4C)
diff --git a/rules/protobuf.mk b/rules/protobuf.mk
index 866eb6b99..4ebb88e76 100644
--- a/rules/protobuf.mk
+++ b/rules/protobuf.mk
@@ -24,6 +24,10 @@ ifeq ($(BLDENV),bullseye)
     $(PROTOC32)_RDEPENDS = $(PROTOBUF) $(PROTOBUF_LITE)
     $(eval $(call add_derived_package,$(PROTOBUF),$(PROTOC32)))
 
+    PROTOC_DEV = libprotoc-dev_$(PROTOBUF_VERSION_FULL)_$(CONFIGURED_ARCH).deb
+    $(PROTOC_DEV)_DEPENDS = $(PROTOBUF) $(PROTOBUF_LITE) $(PROTOC32)
+    $(eval $(call add_derived_package,$(PROTOBUF),$(PROTOC_DEV)))
+
     PROTOBUF_COMPILER = protobuf-compiler_$(PROTOBUF_VERSION_FULL)_$(CONFIGURED_ARCH).deb
     $(PROTOBUF_COMPILER)_DEPENDS = $(PROTOC32)
     $(PROTOBUF_COMPILER)_RDEPENDS = $(PROTOC32)
@@ -34,4 +38,9 @@ ifeq ($(BLDENV),bullseye)
     $(PYTHON3_PROTOBUF)_RDEPENDS = $(PROTOBUF)
     $(eval $(call add_derived_package,$(PROTOBUF),$(PYTHON3_PROTOBUF)))
 
+    RUBY_PROTOBUF = ruby-google-protobuf_$(PROTOBUF_VERSION_FULL)_$(CONFIGURED_ARCH).deb
+    $(RUBY_PROTOBUF)_DEPENDS = $(PROTOBUF_DEV) $(PROTOBUF)
+    $(RUBY_PROTOBUF)_RDEPENDS = $(PROTOBUF)
+    $(eval $(call add_derived_package,$(PROTOBUF),$(RUBY_PROTOBUF)))
+
 endif
diff --git a/slave.mk b/slave.mk
index c6c0e32e6..783ca1ac0 100644
--- a/slave.mk
+++ b/slave.mk
@@ -250,7 +250,6 @@ ifeq ($(SONIC_ENABLE_BOOTCHART),y)
 ENABLE_BOOTCHART = y
 endif
 
-
 ifeq ($(ENABLE_ASAN),y)
 ifneq ($(CONFIGURED_ARCH),amd64)
 $(Q)echo "Disabling SWSS address sanitizer due to incompatible CPU architecture: $(CONFIGURED_ARCH)"
diff --git a/sonic-slave-bookworm/Dockerfile.j2 b/sonic-slave-bookworm/Dockerfile.j2
index 2d48357f5..6b749b5e8 100644
--- a/sonic-slave-bookworm/Dockerfile.j2
+++ b/sonic-slave-bookworm/Dockerfile.j2
@@ -447,6 +447,34 @@ RUN apt-get update && apt-get install -y \
         hwdata \
         libzip-dev
 
+{%- if CONFIGURED_ARCH != "arm64" and CONFIGURED_ARCH != "armhf" %}
+RUN apt-get update && apt-get install -y \
+# For p4 libraries
+        libgrpc++-dev \
+        libgrpc-dev \
+        libprotoc-dev \
+        protobuf-compiler-grpc \
+        valgrind \
+        python3-protobuf \
+        python3-grpcio \
+        thrift-compiler \
+        gfortran \
+        libopenmpi-dev \
+        libthrift-0.17.0 \
+        libthrift-dev \
+        libboost-all-dev \
+        libboost-graph-dev \
+        libboost-iostreams-dev \
+        libgc-dev \
+        tcpdump \
+        llvm \
+        net-tools \
+        python3-pyroute2 \
+        python3-ply \
+        python3-scapy \
+        python3-thrift
+{%- endif %}
+
 {%- if CROSS_BUILD_ENVIRON == "y" %}
 # Arm vs. amd64 versions conflict - remove amd64 packages
 RUN apt-get remove -y libnl-3-200
@@ -506,6 +534,9 @@ RUN patch -p1 -i /disable-non-manylinux.patch /usr/local/lib/python3.11/dist-pac
 # For building sonic-utilities
 RUN pip3 install fastentrypoints mock
 
+# For DASH BMv2
+RUN pip3 install jsonpath_ng
+
 # For building sonic_ycabled
 # Note: Match version in bookworm
 RUN pip3 install grpcio==1.51.1 grpcio-tools==1.51.1
diff --git a/sonic-slave-bullseye/Dockerfile.j2 b/sonic-slave-bullseye/Dockerfile.j2
index 4ff550aca..2e9a3b2e6 100644
--- a/sonic-slave-bullseye/Dockerfile.j2
+++ b/sonic-slave-bullseye/Dockerfile.j2
@@ -427,6 +427,37 @@ RUN apt-get update && apt-get install -y eatmydata && eatmydata apt-get install
         default-jdk \
         libgoogle-gson-java
 
+{%- if CONFIGURED_ARCH != "arm64" and CONFIGURED_ARCH != "armhf" %}
+# For DASH BMv2
+RUN eatmydata apt install -y \
+# For grpc
+        libgflags-dev                       \
+        libgoogle-perftools-dev             \
+        ruby-googleauth                     \
+        ruby-googleapis-common-protos-types \
+        ruby-simplecov                      \
+        cython3                             \
+# For p4 libraries
+        valgrind \
+        thrift-compiler \
+        gfortran \
+        libopenmpi-dev \
+        libthrift-0.13.0 \
+        libthrift-dev \
+        libboost-all-dev \
+        libboost-graph-dev \
+        libboost-iostreams-dev \
+        libgc-dev \
+        tcpdump \
+        llvm \
+        net-tools \
+        python3-pyroute2 \
+        python3-ply \
+        python3-scapy \
+        python3-thrift \
+        libabsl20200923 libc-ares2 python3-six libboost-thread1.74.0 libboost-dev libboost-system-dev libboost-thread-dev libboost-filesystem1.74.0 libboost-program-options1.74.0 libboost-thread1.74.0 libnanomsg5 libpcap0.8 libthrift-0.13.0 libboost-dev libboost-filesystem-dev libboost-program-options-dev libgmp-dev libnanomsg-dev libpcap-dev libtool pkg-config libthrift-dev python3-thrift thrift-compiler libboost-iostreams1.74.0 libgc1 cpp libboost-dev libboost-all-dev libboost-graph-dev libboost-iostreams-dev libfl-dev libgc-dev libgmp-dev libbpf-dev tcpdump libelf-dev llvm clang python3-pyroute2 python3-ply python3-scapy python3-setuptools python3-thrift libthrift-0.13.0
+{%- endif %}
+
 {%- if CROSS_BUILD_ENVIRON == "y" %}
 # Arm vs. amd64 versions conflict - remove amd64 packages
 RUN apt-get remove -y libnl-3-200
@@ -571,6 +602,9 @@ RUN pip3 install mmh3==2.5.1
 
 RUN pip3 install parameterized==0.8.1
 
+# For DASH BMv2
+RUN pip3 install jsonpath_ng
+
 RUN eatmydata apt-get install -y xsltproc
 
 # Install dependencies for isc-dhcp-relay build
diff --git a/src/dash-sai/Makefile b/src/dash-sai/Makefile
new file mode 100644
index 000000000..2a188c49f
--- /dev/null
+++ b/src/dash-sai/Makefile
@@ -0,0 +1,57 @@
+SHELL = /bin/bash
+.ONESHELL:
+.SHELLFLAGS += -xe
+
+MAIN_TARGET = libsai_$(DASH_SAI_VERSION)_$(CONFIGURED_ARCH).deb
+DERIVED_TARGETS = libsai-dev_$(DASH_SAI_VERSION)_$(CONFIGURED_ARCH).deb
+
+CURRENT_DIR=$(shell pwd)
+PIPELINE_DIR=$(CURRENT_DIR)/DASH/dash-pipeline
+P4_MAIN=bmv2/dash_pipeline.p4
+P4_OUTDIR=bmv2/dash_pipeline.bmv2
+
+
+$(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% :
+# Remove any stale files
+	rm -rf DASH
+
+	git clone https://github.com/sonic-net/DASH.git DASH
+
+	pushd DASH/dash-pipeline
+	git checkout $(DASH_SAI_COMMIT)
+	git submodule update --init
+
+	mkdir -p $(P4_OUTDIR)
+	mkdir -p SAI/lib
+	sudo ln -sf $(PIPELINE_DIR)/bmv2 /bmv2
+
+# Compile the P4 program
+	p4c-bm2-ss -DTARGET_BMV2_V1MODEL $(P4_MAIN) -o $(P4_OUTDIR)/dash_pipeline.json --p4runtime-files $(P4_OUTDIR)/dash_pipeline_p4rt.json,$(P4_OUTDIR)/dash_pipeline_p4rt.txt --toJSON $(P4_OUTDIR)/dash_pipeline_ir.json
+
+# Generate SAI files
+	pushd SAI
+	make
+	popd
+
+# Compile sai meta
+	sed -i.bak '/checkenumlock.sh/d' SAI/SAI/meta/Makefile
+	sed -i.bak '/checkancestry.sh/d' SAI/SAI/meta/Makefile
+	sed -i.bak '/checkstructs.sh/d' SAI/SAI/meta/Makefile
+	pushd SAI/SAI/meta/
+	CFLAGS=-Wdangling-pointer=1 make all libsaimetadata.so
+	popd
+
+# Compile sai library
+	pushd SAI/lib
+	make
+	popd
+
+	pushd SAI/debian
+	make
+	mv $(DERIVED_TARGETS) $* $(DEST)/
+	popd
+
+	popd
+
+$(addprefix $(DEST)/, $(DERIVED_TARGETS)): $(DEST)/% : $(DEST)/$(MAIN_TARGET)
+
diff --git a/src/grpc/Makefile b/src/grpc/Makefile
new file mode 100644
index 000000000..c77cb8d44
--- /dev/null
+++ b/src/grpc/Makefile
@@ -0,0 +1,30 @@
+SHELL = /bin/bash
+.ONESHELL:
+.SHELLFLAGS += -e
+
+MAIN_TARGET = libgrpc10_$(GRPC_VERSION_FULL)_$(CONFIGURED_ARCH).deb
+DERIVED_TARGETS = libgrpc-dev_$(GRPC_VERSION_FULL)_$(CONFIGURED_ARCH).deb \
+					libgrpc++1_$(GRPC_VERSION_FULL)_$(CONFIGURED_ARCH).deb \
+					libgrpc++-dev_$(GRPC_VERSION_FULL)_$(CONFIGURED_ARCH).deb \
+					python3-grpcio_$(GRPC_VERSION_FULL)_$(CONFIGURED_ARCH).deb \
+					protobuf-compiler-grpc_$(GRPC_VERSION_FULL)_$(CONFIGURED_ARCH).deb
+
+$(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% :
+	# Remove any stale files
+	rm -rf grpc-$(GRPC_VERSION)
+
+	dget -u grpc_$(GRPC_VERSION_FULL).dsc https://deb.debian.org/debian/pool/main/g/grpc/grpc_$(GRPC_VERSION_FULL).dsc
+
+	pushd grpc-$(GRPC_VERSION)
+
+ifeq ($(CROSS_BUILD_ENVIRON), y)
+	dpkg-buildpackage -us -uc -b -a$(CONFIGURED_ARCH) -Pcross,nocheck -j$(SONIC_CONFIG_MAKE_JOBS) --admindir $(SONIC_DPKG_ADMINDIR)
+else
+	dpkg-buildpackage -us -uc -b -j$(SONIC_CONFIG_MAKE_JOBS) --admindir $(SONIC_DPKG_ADMINDIR)
+endif
+
+	popd
+
+	mv $(DERIVED_TARGETS) $* $(DEST)/
+
+$(addprefix $(DEST)/, $(DERIVED_TARGETS)): $(DEST)/% : $(DEST)/$(MAIN_TARGET)
\ No newline at end of file
diff --git a/src/p4lang/Makefile b/src/p4lang/Makefile
new file mode 100644
index 000000000..a896001ba
--- /dev/null
+++ b/src/p4lang/Makefile
@@ -0,0 +1,48 @@
+SHELL = /bin/bash
+.ONESHELL:
+.SHELLFLAGS += -xe
+
+P4LANG_TARGET = p4lang-pi_$(P4LANG_PI_VERSION_FULL)_$(CONFIGURED_ARCH).deb
+
+$(addprefix $(DEST)/, $(P4LANG_TARGET)): $(DEST)/% :
+# 	# Remove any stale files
+	rm -rf p4lang-pi-$(P4LANG_PI_VERSION)
+	dget -u p4lang-pi_$(P4LANG_PI_VERSION_FULL).dsc http://download.opensuse.org/repositories/home:/p4lang/Debian_11/p4lang-pi_$(P4LANG_PI_VERSION_FULL).dsc
+	pushd p4lang-pi-$(P4LANG_PI_VERSION)
+ifeq ($(CROSS_BUILD_ENVIRON), y)
+	dpkg-buildpackage -us -uc -b -a$(CONFIGURED_ARCH) -Pcross,nocheck -j$(SONIC_CONFIG_MAKE_JOBS) --admindir $(SONIC_DPKG_ADMINDIR)
+else
+	dpkg-buildpackage -us -uc -b -j$(SONIC_CONFIG_MAKE_JOBS) --admindir $(SONIC_DPKG_ADMINDIR)
+endif
+	popd
+	mv $* $(DEST)/
+
+P4LANG_BMV2_TARGET = p4lang-bmv2_$(P4LANG_BMV2_VERSION_FULL)_$(CONFIGURED_ARCH).deb
+
+$(addprefix $(DEST)/, $(P4LANG_BMV2_TARGET)): $(DEST)/% :
+# 	# Remove any stale files
+	rm -rf p4lang-bmv2-$(P4LANG_BMV2_VERSION)
+	dget -u p4lang-bmv2_$(P4LANG_BMV2_VERSION_FULL).dsc http://download.opensuse.org/repositories/home:/p4lang/Debian_11/p4lang-bmv2_$(P4LANG_BMV2_VERSION_FULL).dsc
+	pushd p4lang-bmv2-$(P4LANG_BMV2_VERSION)
+ifeq ($(CROSS_BUILD_ENVIRON), y)
+	dpkg-buildpackage -us -uc -b -a$(CONFIGURED_ARCH) -Pcross,nocheck -j$(SONIC_CONFIG_MAKE_JOBS) --admindir $(SONIC_DPKG_ADMINDIR)
+else
+	dpkg-buildpackage -us -uc -b -j$(SONIC_CONFIG_MAKE_JOBS) --admindir $(SONIC_DPKG_ADMINDIR)
+endif
+	popd
+	mv $* $(DEST)/
+
+P4LANG_P4C_TARGET = p4lang-p4c_$(P4LANG_P4C_VERSION_FULL)_$(CONFIGURED_ARCH).deb
+$(addprefix $(DEST)/, $(P4LANG_P4C_TARGET)): $(DEST)/% :
+# 	# Remove any stale files
+	rm -rf p4lang-p4c-$(P4LANG_P4C_VERSION)
+	dget -u p4lang-p4c_$(P4LANG_P4C_VERSION_FULL).dsc http://download.opensuse.org/repositories/home:/p4lang/Debian_11/p4lang-p4c_$(P4LANG_P4C_VERSION_FULL).dsc
+	pushd p4lang-p4c-$(P4LANG_P4C_VERSION)
+ifeq ($(CROSS_BUILD_ENVIRON), y)
+	dpkg-buildpackage -us -uc -b -a$(CONFIGURED_ARCH) -Pcross,nocheck -j$(SONIC_CONFIG_MAKE_JOBS) --admindir $(SONIC_DPKG_ADMINDIR)
+else
+	dpkg-buildpackage -us -uc -b -j$(SONIC_CONFIG_MAKE_JOBS) --admindir $(SONIC_DPKG_ADMINDIR)
+endif
+	popd
+	mv $* $(DEST)/
+
diff --git a/src/protobuf/Makefile b/src/protobuf/Makefile
index 3b13eaec5..6aead6060 100644
--- a/src/protobuf/Makefile
+++ b/src/protobuf/Makefile
@@ -7,7 +7,9 @@ DERIVED_TARGETS = protobuf-compiler_$(PROTOBUF_VERSION_FULL)_$(CONFIGURED_ARCH).
 					libprotobuf-dev_$(PROTOBUF_VERSION_FULL)_$(CONFIGURED_ARCH).deb \
 					libprotobuf-lite32_$(PROTOBUF_VERSION_FULL)_$(CONFIGURED_ARCH).deb \
 					libprotoc32_$(PROTOBUF_VERSION_FULL)_$(CONFIGURED_ARCH).deb \
-					python3-protobuf_$(PROTOBUF_VERSION_FULL)_$(CONFIGURED_ARCH).deb
+					libprotoc-dev_$(PROTOBUF_VERSION_FULL)_$(CONFIGURED_ARCH).deb \
+					python3-protobuf_$(PROTOBUF_VERSION_FULL)_$(CONFIGURED_ARCH).deb \
+					ruby-google-protobuf_$(PROTOBUF_VERSION_FULL)_$(CONFIGURED_ARCH).deb
 
 $(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% :
 	# Remove any stale files

From 79502f0de187d24c43fe539fb245fe5602b67e22 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sat, 18 May 2024 10:00:51 +0800
Subject: [PATCH 0600/1115] [submodule] Update submodule sonic-platform-common
 to the latest HEAD automatically (#18986)

#### Why I did it
src/sonic-platform-common
```
* 862a67c - (HEAD -> master, origin/master, origin/HEAD) Added API to decommison all datapaths of a CMIS compliant module (#471) (10 hours ago) [Prince George]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-platform-common | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-platform-common b/src/sonic-platform-common
index 036246032..862a67c59 160000
--- a/src/sonic-platform-common
+++ b/src/sonic-platform-common
@@ -1 +1 @@
-Subproject commit 036246032e0012910b71e1986b74100dbd8142a3
+Subproject commit 862a67c59de267567563e003f5d0845b5f939527

From 2e1d4026a7f2b09b2cb5e67d6a85aedeaeb5392b Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sat, 18 May 2024 10:00:56 +0800
Subject: [PATCH 0601/1115] [submodule] Update submodule sonic-platform-daemons
 to the latest HEAD automatically (#18976)

#### Why I did it
src/sonic-platform-daemons
```
* 88bf8ec - (HEAD -> master, origin/master, origin/HEAD) [chassis][midplane] Modify the chassisd to log expected/unexpected midplane connectivity messages (#480) (34 hours ago) [Marty Y. Lok]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-platform-daemons | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-platform-daemons b/src/sonic-platform-daemons
index 9d0c55002..88bf8ecc0 160000
--- a/src/sonic-platform-daemons
+++ b/src/sonic-platform-daemons
@@ -1 +1 @@
-Subproject commit 9d0c55002129dac4fecddc45edfd6cfa8bc510d8
+Subproject commit 88bf8ecc0b2733b37340902eeea3382c3477ff1b

From aed91044a977ca560e8e2843d9a21dba915f6674 Mon Sep 17 00:00:00 2001
From: anamehra <54692434+anamehra@users.noreply.github.com>
Date: Fri, 17 May 2024 21:13:03 -0700
Subject: [PATCH 0602/1115] [cisco]: Update cisco-8000.ini to 0.master.0.1
 release (#18989)

Support for Cisco-8000 platforms on master/ bookworm
---
 platform/checkout/cisco-8000.ini | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/platform/checkout/cisco-8000.ini b/platform/checkout/cisco-8000.ini
index ccda22289..709f576b1 100644
--- a/platform/checkout/cisco-8000.ini
+++ b/platform/checkout/cisco-8000.ini
@@ -1,3 +1,3 @@
 [module]
 repo=git@github.com:Cisco-8000-sonic/platform-cisco-8000.git
-ref=202311.main.0.1
+ref=0.master.0.1

From 15c9014aea741c39cd51dc5b7e767a0b2d0c7d27 Mon Sep 17 00:00:00 2001
From: Vivek <vivekreddykarri98@gmail.com>
Date: Fri, 17 May 2024 21:15:48 -0700
Subject: [PATCH 0603/1115] [Mellanox] Use the explicit mst device of SPC
 during fw-upgrade (#18929)

Why I did it
mlxfwmanager on smartwitch will show more than 1 device. Thus update the mlnx-fw-upgrade script to operate explicitly on Spectrum PCI device.

How I did it
Used the mlxfwmanager --query-format XML command to get the output in XML format and used xmlstarlet cmd to parse the output
Example cmd output:
<Devices>
    <Device pciName="/dev/mst/mt41692_pciconf0" type="BlueField3" psid="MT_0000001139" partNumber="BF3-COM-DPU_QP_Ax">
      <Versions>
        <FW current="32.41.1000" available="N/A"/>
      </Versions>
      <MACs Base_Mac="N/A" />
      <GUIDs Base_Guid="N/A" />
      <Status>No matching image found</Status>
      <Description>NVIDIA BlueField-3 DPU based COM express; IPN QP</Description>
    </Device>
    <Device pciName="/dev/mst/mt53104_pci_cr0" type="Spectrum3" psid="MT_0000001189" partNumber="MSN4280-WS2RXO_Ax">
      <Versions>
        <FW current="30_2012_4038-006" available="N/A"/>
      </Versions>
      <MACs Base_Mac="N/A" />
      <Status>No matching image found</Status>
      <Description>NVIDIA Spectrum-3 based 400GbE 2U Ethernet Smart-Switch with ONIE; 28 ports QSFP-DD; 4 DPUs; 2 power supplies (AC); x86 CPU - 16 Cores; Secure-boot Capable; standard depth; C2P airflow; Tool-less Rail Kit</Description>
    </Device>
</Devices>

Exclusively operate on the PCI device inferred from the output to Wait, fetch psid and Current FW version
Use awk for a reliable extraction of Available FW output

How to verify it
Verify the script if it upgrades FW properly during switch init and during reboot.

Signed-off-by: Vivek Reddy <vkarri@nvidia.com>
---
 .../build_templates/sonic_debian_extension.j2 |  4 +-
 platform/mellanox/mlnx-fw-upgrade.j2          | 56 ++++++++++++-------
 2 files changed, 38 insertions(+), 22 deletions(-)

diff --git a/files/build_templates/sonic_debian_extension.j2 b/files/build_templates/sonic_debian_extension.j2
index ca8ad48b9..74865bf57 100644
--- a/files/build_templates/sonic_debian_extension.j2
+++ b/files/build_templates/sonic_debian_extension.j2
@@ -1058,8 +1058,8 @@ sudo rm -rf $FILESYSTEM_ROOT/$MLNX_SONIC_PLATFORM_PY3_WHEEL_NAME
 sudo cp platform/mellanox/nv-syncd-shared/nv-syncd-shared.service $FILESYSTEM_ROOT_USR_LIB_SYSTEMD_SYSTEM/
 sudo LANG=C chroot $FILESYSTEM_ROOT systemctl enable nv-syncd-shared
 
-# Install minicom package
-sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install minicom
+# Install required packages specific for mellanox platform
+sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install minicom xmlstarlet
 
 sudo LANG=C chroot $FILESYSTEM_ROOT systemctl disable rshim.service
 {% endif %}
diff --git a/platform/mellanox/mlnx-fw-upgrade.j2 b/platform/mellanox/mlnx-fw-upgrade.j2
index 7a36a2ebd..eb2886249 100755
--- a/platform/mellanox/mlnx-fw-upgrade.j2
+++ b/platform/mellanox/mlnx-fw-upgrade.j2
@@ -1,10 +1,13 @@
 {#-
-    Copyright (c) 2020-2023 NVIDIA CORPORATION & AFFILIATES.
+    Copyright (c) 2020-2024 NVIDIA CORPORATION & AFFILIATES.
     Apache-2.0
+
     Licensed under the Apache License, Version 2.0 (the "License");
     you may not use this file except in compliance with the License.
     You may obtain a copy of the License at
+
     http://www.apache.org/licenses/LICENSE-2.0
+
     Unless required by applicable law or agreed to in writing, software
     distributed under the License is distributed on an "AS IS" BASIS,
     WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
@@ -32,6 +35,7 @@ declare -r EXIT_SUCCESS="0"
 declare -r EXIT_FAILURE="1"
 declare -r FW_ALREADY_UPDATED_FAILURE="2"
 
+declare -r QUERY_XML="mlxfwmanager --query-format XML"
 declare -r QUERY_CMD="mlxfwmanager --query"
 declare -r LIST_CONTENT_CMD="mlxfwmanager --list-content"
 declare -r BURN_CMD="mlxfwmanager -u -f -y"
@@ -163,21 +167,22 @@ function WaitForDevice() {
     local -i QUERY_RETRY_COUNT_MAX="10"
     local -i QUERY_RETRY_COUNT="0"
 
-    ${QUERY_CMD} > /dev/null
+    local SPC_MST_DEV=$(GetSPCMstDevice)
 
-    while [[ ("${QUERY_RETRY_COUNT}" -lt "${QUERY_RETRY_COUNT_MAX}") && ("$?" -ne "${EXIT_SUCCESS}") ]]; do
+    while [[ ("${QUERY_RETRY_COUNT}" -lt "${QUERY_RETRY_COUNT_MAX}") && ("${SPC_MST_DEV}" == "${UNKN_MST}") ]]; do
         sleep 1s
         ((QUERY_RETRY_COUNT++))
-        output=$(eval ${MFT_DIAGNOSIS_FLAGS} ${QUERY_CMD}) > /dev/null
+        SPC_MST_DEV=$(GetSPCMstDevice)
     done
 
-    ERROR_CODE="$?"
-    if [[ "${ERROR_CODE}" != "${EXIT_SUCCESS}" ]]; then
-        # Exit failure and print the detailed information
-        echo "$output"
+    if [[ "${SPC_MST_DEV}" == "${UNKN_MST}" ]]; then
+        # Couldn't Detect the Spectrum ASIC. Exit failure and print the detailed information
+        output=$(${QUERY_CMD})
         failure_msg="${output#*Fail : }"
-        ExitFailure "FW Query command: ${QUERY_CMD} failed to wait for device with error: ${failure_msg}"
+        ExitFailure "FW Query command: ${QUERY_CMD} failed to detect spectrum device with error: ${failure_msg}"
     fi
+
+    LogInfo "Spectrum ASIC successfully detected at ${SPC_MST_DEV}"
 }
 
 function GetAsicType() {
@@ -206,8 +211,8 @@ function GetAsicType() {
     exit "${EXIT_FAILURE}"
 }
 
-function GetMstDevice() {
-    local _MST_DEVICE="$(ls /dev/mst/*_pci_cr0 2>&1)"
+function GetSPCMstDevice() {
+    local _MST_DEVICE=$(${QUERY_XML} | xmlstarlet sel -t -m "//Device[contains(@type,'Spectrum')]" -v @pciName | head -n 1)
 
     if [[ ! -c "${_MST_DEVICE}" ]]; then
         echo "${UNKN_MST}"
@@ -218,6 +223,19 @@ function GetMstDevice() {
     exit "${EXIT_SUCCESS}"
 }
 
+function GetXPathXML() {
+    local xpath=$1
+    local xml_file=$2
+
+    val=$(xmlstarlet sel -t -v "${xpath}" ${xml_file})
+    ERROR_CODE="$?"
+    if [[ "${ERROR_CODE}" != "${EXIT_SUCCESS}" ]]; then
+        ExitFailure "XML Fetch failed for path: ${xpath}, file: $(cat ${xml_file})"
+    fi
+
+    echo ${val}
+}
+
 function RunCmd() {
     local ERROR_CODE="${EXIT_SUCCESS}"
 
@@ -247,7 +265,7 @@ function RunFwUpdateCmd() {
 
     if [[ "${ERROR_CODE}" == "${FW_ALREADY_UPDATED_FAILURE}" ]]; then
         LogInfo "FW reactivation is required. Reactivating and updating FW ..."
-        local -r _MST_DEVICE="$(GetMstDevice)"
+        local -r _MST_DEVICE="$(GetSPCMstDevice)"
         local -r _CMD="flint -d ${_MST_DEVICE} ir"
         output=$(eval "${_CMD}")
 
@@ -285,15 +303,14 @@ function UpgradeFW() {
         ExitFailure "no such file: ${_FW_FILE}"
     fi
 
-    RunCmd "${QUERY_CMD} -o ${QUERY_FILE}"
-    local -r _FW_CURRENT_INFO="$(grep FW ${QUERY_FILE})"
-    local -r _FW_CURRENT="$(echo ${_FW_CURRENT_INFO} | cut -f2 -d' ')"
-    local -r _PSID_INFO="$(grep PSID ${QUERY_FILE})"
-    local -r _PSID="$(echo ${_PSID_INFO} | cut -f2 -d' ')"
+    local -r _MST_DEVICE=$(GetSPCMstDevice)
+    RunCmd "${QUERY_XML} -d ${_MST_DEVICE} -o ${QUERY_FILE}"
+    local -r _FW_CURRENT=$(GetXPathXML "//Device/Versions/FW/@current" ${QUERY_FILE})
+    local -r _PSID=$(GetXPathXML "//Device/@psid" ${QUERY_FILE})
 
-    RunCmd "${LIST_CONTENT_CMD} -i ${_FW_FILE} -o ${LIST_CONTENT_FILE}"
+    RunCmd "${LIST_CONTENT_CMD} -i ${_FW_FILE} -d ${_MST_DEVICE} -o ${LIST_CONTENT_FILE}"
     local -r _FW_AVAILABLE_INFO="$(grep ${_PSID} ${LIST_CONTENT_FILE})"
-    local -r _FW_AVAILABLE="$(echo ${_FW_AVAILABLE_INFO} | cut -f4 -d' ')"
+    local -r _FW_AVAILABLE="$(echo ${_FW_AVAILABLE_INFO} | awk '{print $4}')"
 
     if [[ -z "${_FW_CURRENT}" ]]; then
         ExitFailure "could not retreive current FW version"
@@ -307,7 +324,6 @@ function UpgradeFW() {
         ExitSuccess "firmware is up to date"
     else
         LogNotice "firmware upgrade is required. Installing compatible version..."
-        local -r _MST_DEVICE="$(GetMstDevice)"
         if [[ "${_MST_DEVICE}" = "${UNKN_MST}" ]]; then
             LogWarning "could not find fastest mst device, using default device"
             RunFwUpdateCmd "-i ${_FW_FILE}"

From f2418ab2eccbd0c2822326dd359246ca0af05adc Mon Sep 17 00:00:00 2001
From: wumiao_nokia <wu.miao@nokia.com>
Date: Sat, 18 May 2024 00:24:00 -0400
Subject: [PATCH 0604/1115] Fix a logic issue for load_namespace_config in
 sonic-cfggen (#18691)

PR 10960 fixed an issue of calling load_sonic_global_db_config() multiple times which causes error log of "SonicDBConfig Global config is already initialized". The load_namespace_config() has logic issue so is fixed with this PR
---
 src/sonic-config-engine/sonic-cfggen | 22 +++++++++++-----------
 1 file changed, 11 insertions(+), 11 deletions(-)

diff --git a/src/sonic-config-engine/sonic-cfggen b/src/sonic-config-engine/sonic-cfggen
index 87a1dbb17..a3b54c756 100755
--- a/src/sonic-config-engine/sonic-cfggen
+++ b/src/sonic-config-engine/sonic-cfggen
@@ -184,12 +184,13 @@ def get_primary_addr(value):
             intf_with_secondary.remove(name)
     return primary_gateways
 
-def load_namespace_config(asic_name):
-    if not SonicDBConfig.isInit():
-        if is_multi_asic():
-            SonicDBConfig.load_sonic_global_db_config(namespace=asic_name)
-        else:
-            SonicDBConfig.load_sonic_db_config()
+def load_namespace_config():
+    if is_multi_asic():
+        if not SonicDBConfig.isGlobalInit():
+            SonicDBConfig.initializeGlobalConfig()
+    else:
+        if not SonicDBConfig.isInit():
+            SonicDBConfig.initialize()
 
 class FormatConverter:
     """Convert config DB based schema to legacy minigraph based schema for backward capability.
@@ -241,7 +242,6 @@ TODO(taoyl): Current version of config db only supports BGP admin states.
                         data[table][new_key] = data[table].pop(key)
         return data
 
-
 def deep_update(dst, src):
     """ Deep update of dst dict with contest of src dict"""
     pending_nodes = [(dst, src)]
@@ -360,7 +360,7 @@ def main():
         deep_update(data, hardware_data)
         if args.port_config is None:
             args.port_config = device_info.get_path_to_port_config_file(hwsku)
-        load_namespace_config(asic_name)
+        load_namespace_config()
         (ports, _, _) = get_port_config(hwsku, platform, args.port_config, asic_id)
         if ports is None:
             print('Failed to get port config', file=sys.stderr)
@@ -391,7 +391,7 @@ def main():
 
     if args.minigraph is not None:
         minigraph = args.minigraph
-        load_namespace_config(asic_name)
+        load_namespace_config()
         if platform:
             if args.port_config is not None:
                 deep_update(data, parse_xml(minigraph, platform, args.port_config, asic_name=asic_name, hwsku_config_file=args.hwsku_config))
@@ -419,7 +419,7 @@ def main():
         if args.namespace is None:
             configdb = ConfigDBPipeConnector(use_unix_socket_path=use_unix_sock, **db_kwargs)
         else:
-            SonicDBConfig.load_sonic_global_db_config(namespace=args.namespace)
+            load_namespace_config()
             configdb = ConfigDBPipeConnector(use_unix_socket_path=use_unix_sock, namespace=args.namespace, **db_kwargs)
 
         configdb.connect()
@@ -496,7 +496,7 @@ def main():
         if args.namespace is None:
             configdb = ConfigDBPipeConnector(use_unix_socket_path=True, **db_kwargs)
         else:
-            SonicDBConfig.load_sonic_global_db_config(namespace=args.namespace)
+            load_namespace_config()
             configdb = ConfigDBPipeConnector(use_unix_socket_path=True, namespace=args.namespace, **db_kwargs)
 
         configdb.connect(False)

From db78f748f02cae9f9130616827c450ae6e365733 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sat, 18 May 2024 19:01:00 +0800
Subject: [PATCH 0605/1115] [submodule] Update submodule sonic-platform-daemons
 to the latest HEAD automatically (#18994)

#### Why I did it
src/sonic-platform-daemons
```
* 9ffce20 - (HEAD -> master, origin/master, origin/HEAD) CMIS 'ConfigSuccess" failure while changing default ApSel code for 800G DR8/FR8 modules (#459) (9 hours ago) [Anoop Kamath]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-platform-daemons | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-platform-daemons b/src/sonic-platform-daemons
index 88bf8ecc0..9ffce2036 160000
--- a/src/sonic-platform-daemons
+++ b/src/sonic-platform-daemons
@@ -1 +1 @@
-Subproject commit 88bf8ecc0b2733b37340902eeea3382c3477ff1b
+Subproject commit 9ffce2036d53571bd23b4a630ac285039e383c4f

From dfa3eaae9c053d7cd88cb55d001f4e7223e6a47a Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sat, 18 May 2024 19:01:09 +0800
Subject: [PATCH 0606/1115] [submodule] Update submodule sonic-gnmi to the
 latest HEAD automatically (#18991)

#### Why I did it
src/sonic-gnmi
```
* 692f967 - (HEAD -> master, origin/master, origin/HEAD) Update pipeline to check memory leak (#228) (19 hours ago) [ganglv]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-gnmi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-gnmi b/src/sonic-gnmi
index adece7c46..692f967d4 160000
--- a/src/sonic-gnmi
+++ b/src/sonic-gnmi
@@ -1 +1 @@
-Subproject commit adece7c46bed9b2a43ed2ea3fa325590988e95d3
+Subproject commit 692f967d4fb2d55593267663a722826186ddf0d1

From 19f7e1c0e7fb5ff81cec4cf3c973052d20cfcffa Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sun, 19 May 2024 02:52:48 +0800
Subject: [PATCH 0607/1115] [ci/build]: Upgrade SONiC package versions (#18996)

---
 .../versions-deb-bookworm                     |   7 +-
 .../versions-deb-bullseye                     |   4 -
 .../build-sonic-slave-bullseye/versions-py3   |   3 -
 files/build/versions/default/versions-docker  |   4 +-
 files/build/versions/default/versions-git     |  13 +-
 files/build/versions/default/versions-mirror  |  38 +--
 files/build/versions/default/versions-web     |  14 +-
 .../versions-py3                              |   2 +-
 .../versions-py3                              |   2 +-
 .../docker-dash-engine/versions-deb-focal     | 101 +++++++
 .../dockers/docker-dash-engine/versions-py3   |  18 ++
 .../docker-gbsyncd-vs/versions-deb-bookworm   | 268 ++++++++++++++++++
 .../dockers/docker-gbsyncd-vs/versions-py3    |   7 +
 .../versions-deb-bookworm                     |   4 +
 .../docker-sonic-gnmi/versions-deb-bookworm   |  29 ++
 .../docker-sonic-gnmi/versions-deb-bullseye   |  26 --
 .../versions-deb-bookworm                     |  34 +++
 .../versions-deb-buster                       |  25 --
 .../docker-sonic-mgmt-framework/versions-py3  |  29 +-
 .../docker-syncd-vs/versions-deb-bookworm     | 268 ++++++++++++++++++
 .../dockers/docker-syncd-vs/versions-py3      |   7 +
 .../versions-deb-bookworm                     | 136 ++++++++-
 .../dockers/sonic-slave-bookworm/versions-py3 |  39 ++-
 .../versions-py3-all-arm64                    |   1 +
 .../versions-py3-all-armhf                    |   1 +
 .../versions-deb-bullseye                     | 127 ++++++++-
 .../dockers/sonic-slave-bullseye/versions-py3 |  19 +-
 .../sonic-slave-buster/versions-deb-buster    |   2 +-
 .../versions/host-image/versions-deb-bookworm |   9 +-
 .../host-image/versions-deb-bookworm-arm64    |   3 -
 .../host-image/versions-deb-bookworm-armhf    |   3 -
 files/build/versions/host-image/versions-py3  |   4 +-
 .../host-image/versions-py3-all-arm64         |   1 -
 .../host-image/versions-py3-all-armhf         |   1 -
 34 files changed, 1105 insertions(+), 144 deletions(-)
 create mode 100644 files/build/versions/dockers/docker-dash-engine/versions-deb-focal
 create mode 100644 files/build/versions/dockers/docker-dash-engine/versions-py3
 create mode 100644 files/build/versions/dockers/docker-gbsyncd-vs/versions-py3
 create mode 100644 files/build/versions/dockers/docker-sonic-gnmi/versions-deb-bookworm
 delete mode 100644 files/build/versions/dockers/docker-sonic-gnmi/versions-deb-bullseye
 create mode 100644 files/build/versions/dockers/docker-sonic-mgmt-framework/versions-deb-bookworm
 delete mode 100644 files/build/versions/dockers/docker-sonic-mgmt-framework/versions-deb-buster
 create mode 100644 files/build/versions/dockers/docker-syncd-vs/versions-py3
 create mode 100644 files/build/versions/dockers/sonic-slave-bookworm/versions-py3-all-arm64
 create mode 100644 files/build/versions/dockers/sonic-slave-bookworm/versions-py3-all-armhf
 delete mode 100644 files/build/versions/host-image/versions-py3-all-arm64

diff --git a/files/build/versions/build/build-sonic-slave-bookworm/versions-deb-bookworm b/files/build/versions/build/build-sonic-slave-bookworm/versions-deb-bookworm
index 5f1fcdeb3..d53a235ff 100644
--- a/files/build/versions/build/build-sonic-slave-bookworm/versions-deb-bookworm
+++ b/files/build/versions/build/build-sonic-slave-bookworm/versions-deb-bookworm
@@ -12,6 +12,7 @@ libnl-nf-3-200==3.5.0-1
 libnl-nf-3-dev==3.5.0-1
 libnl-route-3-200==3.5.0-1
 libnl-route-3-dev==3.5.0-1
+libsai==1.0.0
 libsaimetadata==1.0.0
 libsaimetadata-dev==1.0.0
 libsairedis==1.0.0
@@ -32,9 +33,13 @@ libyang-dev==1.0.73
 linux-headers-6.1.0-11-2-amd64==6.1.38-4
 linux-headers-6.1.0-11-2-arm64==6.1.38-4
 linux-headers-6.1.0-11-2-common==6.1.38-4
-net-tools==2.10-0.1
+p4lang-bmv2==1.15.0-7
+p4lang-p4c==1.2.4.2-2
+p4lang-pi==0.1.0-15
 python3-swsscommon==1.0.0
 python3-yang==1.0.73
+sonic-mgmt-common==1.0.0
+sonic-mgmt-common-codegen==1.0.0
 sonic-platform-pddf==1.1
 sonic-platform-pddf-sym==1.1
 sx-acl-helper==1.mlnx.4.6.3064
diff --git a/files/build/versions/build/build-sonic-slave-bullseye/versions-deb-bullseye b/files/build/versions/build/build-sonic-slave-bullseye/versions-deb-bullseye
index 3709687ca..1a89e443e 100644
--- a/files/build/versions/build/build-sonic-slave-bullseye/versions-deb-bullseye
+++ b/files/build/versions/build/build-sonic-slave-bullseye/versions-deb-bullseye
@@ -28,7 +28,6 @@ libteam-utils==1.31-1
 libteam5==1.31-1
 libteamdctl0==1.31-1
 libthrift-0.11.0==0.11.0-4
-libthrift-dev==0.11.0-4
 libyang==1.0.73
 libyang-cpp==1.0.73
 libyang-dev==1.0.73
@@ -36,6 +35,3 @@ protobuf-compiler==3.21.12-3
 python-thrift==0.11.0-4
 python3-swsscommon==1.0.0
 python3-yang==1.0.73
-sonic-mgmt-common==1.0.0
-sonic-mgmt-common-codegen==1.0.0
-thrift-compiler==0.11.0-4
diff --git a/files/build/versions/build/build-sonic-slave-bullseye/versions-py3 b/files/build/versions/build/build-sonic-slave-bullseye/versions-py3
index b7b7da383..97b8c8233 100644
--- a/files/build/versions/build/build-sonic-slave-bullseye/versions-py3
+++ b/files/build/versions/build/build-sonic-slave-bullseye/versions-py3
@@ -19,17 +19,14 @@ netifaces==0.11.0
 paramiko==2.11.0
 prefixed==0.7.1
 prettyprinter==0.18.0
-psutil==5.9.8
 pycairo==1.26.0
 pycparser==2.22
 pynacl==1.5.0
-pyroute2==0.5.19
 pyyaml==6.0.1
 semantic-version==2.10.0
 systemd-python==235
 tabulate==0.9.0
 toposort==1.6
-wcwidth==0.2.13
 www-authenticate==0.9.2
 xmltodict==0.12.0
 zipp==1.2.0
diff --git a/files/build/versions/default/versions-docker b/files/build/versions/default/versions-docker
index c7c706f47..75ade2ee9 100644
--- a/files/build/versions/default/versions-docker
+++ b/files/build/versions/default/versions-docker
@@ -1,18 +1,16 @@
 amd64:amd64/debian:bookworm==sha256:40f71cd223a60afc1bac2adf1b204bfabef29cdef725e74993f86098ff87f92f
 amd64:amd64/debian:bullseye==sha256:38fb0f1618bfa65b0cf1dd279293ebc70ef94aab2f2dc49274a2efc6ee29880e
-amd64:amd64/debian:buster==sha256:255eec9d157d35e00a81a45f1e958fd19437d504139e8eb4ea6cc380ea741ed4
 amd64:debian:bookworm==sha256:1aadfee8d292f64b045adb830f8a58bfacc15789ae5f489a0fedcd517a862cb9
 amd64:debian:bullseye==sha256:f860cec7ccaf31b42cd60b6a409f9dad9510ea27fca9c2864741087b4298a1e3
 amd64:debian:buster==sha256:bce46a1c39574f98c845df4a5acc6c70c211df5a6182e428c1155c33317d4920
+amd64:p4lang/behavioral-model@sha256:ce45720e28a96a50f275c1b511cd84c2558b62f2cf7a7e506765183bc3fb2e32==sha256:ce45720e28a96a50f275c1b511cd84c2558b62f2cf7a7e506765183bc3fb2e32
 arm64:arm64v8/debian:bookworm==sha256:40374b5cdc928ffc606cb5c2bbf5e2b2eb6eb918a8e62104ae1f001c49dcbe3a
 arm64:arm64v8/debian:bullseye==sha256:284d075b0fd0350198c79fcb19b9b0fccac6ade8ada1b1309aee35dd223fc802
-arm64:arm64v8/debian:buster==sha256:4d104dd705ba3cba521271fae2d7259e4bc078c5f4855de32dab30acc9a5d3c5
 arm64:debian:bookworm==sha256:1aadfee8d292f64b045adb830f8a58bfacc15789ae5f489a0fedcd517a862cb9
 arm64:debian:bullseye==sha256:f860cec7ccaf31b42cd60b6a409f9dad9510ea27fca9c2864741087b4298a1e3
 arm64:debian:buster==sha256:bce46a1c39574f98c845df4a5acc6c70c211df5a6182e428c1155c33317d4920
 armhf:arm32v7/debian:bookworm==sha256:4c1f203254edd0f60bf8269d57f64c3cfc238af1d13d4f8e484c05af2154046b
 armhf:arm32v7/debian:bullseye==sha256:c1205d95cc1479322f5c34df0a98f62ede571d041cb02a48ccca34209b3f7be9
-armhf:arm32v7/debian:buster==sha256:540d61b391864b97f3ee3d9d0ded73d21e35b23c3db56c6400ac789118d0f47c
 armhf:debian:bookworm==sha256:1aadfee8d292f64b045adb830f8a58bfacc15789ae5f489a0fedcd517a862cb9
 armhf:debian:bullseye==sha256:f860cec7ccaf31b42cd60b6a409f9dad9510ea27fca9c2864741087b4298a1e3
 armhf:debian:buster==sha256:bce46a1c39574f98c845df4a5acc6c70c211df5a6182e428c1155c33317d4920
diff --git a/files/build/versions/default/versions-git b/files/build/versions/default/versions-git
index 41a9a05eb..4c9e43ea6 100644
--- a/files/build/versions/default/versions-git
+++ b/files/build/versions/default/versions-git
@@ -1,11 +1,11 @@
-https://chromium.googlesource.com/chromium/tools/depot_tools.git==5a86d1cc3934b7a388c29b6005f64675c56c9949
+https://chromium.googlesource.com/chromium/tools/depot_tools.git==6708d95ec6d819098093cd57c746636a5bb9a4ea
 https://github.com/aristanetworks/swi-tools.git==b5f087e4774168bf536360d43c9c509c8f14ad9f
 https://github.com/CESNET/libyang.git==4c733412e7173219166be7053940326a92699765
 https://github.com/daveolson53/audisp-tacplus.git==559c9f22edd4f2dea0ecedffb3ad9502b12a75b6
 https://github.com/daveolson53/libnss-tacplus.git==19008ab68d9d504aa58eb34d5f564755a1613b8b
 https://github.com/dyninc/OpenBFDD.git==e35f43ad8d2b3f084e96a84c392528a90d05a287
-https://github.com/flashrom/flashrom.git==e177e77f9fa2ee0a1bd459df27558528d8dabc8e
-https://github.com/FreeRADIUS/freeradius-server.git==e42947b083e77e0c6fc5d2c4de090f5d18eb06ae
+https://github.com/flashrom/flashrom.git==643ae4d1fcb9b3bda6f35e8ff6f5b71b1104f600
+https://github.com/FreeRADIUS/freeradius-server.git==66cf26be5e195b56c70288c98a3e62680ff38154
 https://github.com/FreeRADIUS/pam_radius.git==d802da75cbfc3062ae1b18d0bf26ac2a030ffdaa
 https://github.com/jeroennijhof/pam_tacplus.git==b839c440e33c36eced9dcbc287fcfe6237c4c4ce
 https://github.com/lguohan/gnxi.git==3adf8b97755b49947e465b5a14645f11e79fa0cd
@@ -15,7 +15,8 @@ https://github.com/p4lang/ptf.git==c554f83685186be4cfa9387eb5d6d700d2bbd7c0
 https://github.com/p4lang/scapy-vxlan.git==85ffe83da156568ee47a0750f638227e6e1d7479
 https://github.com/sflow/host-sflow==6edc82d62a1cf0f7fb821587af67e5520624f50d
 https://github.com/sflow/sflowtool==c42c49cb80b927a4c02e54fc26430417f18f4833
-https://github.com/thom311/libnl==6db85366264c9c83e0d53995bfb68e0150184cb4
-https://salsa.debian.org/kernel-team/initramfs-tools.git==8801fda185d2accf39c4095858f76089799bfc7e
+https://github.com/sonic-net/DASH.git==2cb918fbe22eee60296c7326af530bd25b23398f
+https://github.com/thom311/libnl==49f7822961f5bc6b18cd2a2d3f3b8d2ab0896d3f
+https://salsa.debian.org/kernel-team/initramfs-tools.git==15311e6282434f184fb306c38d415f2217239214
 https://salsa.debian.org/sk-guest/monit.git==c9da7ebb1f35dfba17b50b5969a6e75e29cbec0d
-https://salsa.debian.org/ssh-team/openssh.git==703b8198a123f57fd09e555a4c62b2d55273d57b
+https://salsa.debian.org/ssh-team/openssh.git==d150d0d69246f55c711684078f47f999a4bfd6bc
diff --git a/files/build/versions/default/versions-mirror b/files/build/versions/default/versions-mirror
index f19837189..9e406ee2f 100644
--- a/files/build/versions/default/versions-mirror
+++ b/files/build/versions/default/versions-mirror
@@ -1,20 +1,24 @@
+archive.ubuntu.com_ubuntu_dists_focal==2020-04-23T17:33:17Z
+archive.ubuntu.com_ubuntu_dists_focal-backports==2023-11-13T00:36:10Z
+archive.ubuntu.com_ubuntu_dists_focal-updates==2024-05-18T01:45:17Z
 deb.nodesource.com_node%5f14.x_dists_bookworm==2023-02-17T00:35:29Z
 deb.nodesource.com_node%5f14.x_dists_bullseye==2023-02-17T00:35:28Z
 deb.nodesource.com_node%5f14.x_dists_buster==2023-02-17T00:35:28Z
-debian==20240514T000307Z
-debian-security==20240514T000247Z
-download.docker.com_linux_debian_dists_bookworm==2024-05-10T08:31:56Z
-download.docker.com_linux_debian_dists_bullseye==2024-05-10T08:31:56Z
-download.docker.com_linux_debian_dists_buster==2024-05-09T09:19:41Z
-packages.trafficmanager.net_snapshot_debian-security_20240514T000247Z_dists_bookworm-security==2024-05-13T21:03:23Z
-packages.trafficmanager.net_snapshot_debian-security_20240514T000247Z_dists_bullseye-security==2024-05-13T21:03:22Z
-packages.trafficmanager.net_snapshot_debian-security_20240514T000247Z_dists_buster_updates==2024-05-13T21:03:21Z
-packages.trafficmanager.net_snapshot_debian_20240514T000307Z_dists_bookworm==2024-02-10T11:07:25Z
-packages.trafficmanager.net_snapshot_debian_20240514T000307Z_dists_bookworm-backports==2024-05-13T20:15:31Z
-packages.trafficmanager.net_snapshot_debian_20240514T000307Z_dists_bookworm-updates==2024-05-13T20:15:31Z
-packages.trafficmanager.net_snapshot_debian_20240514T000307Z_dists_bullseye==2024-02-10T12:40:37Z
-packages.trafficmanager.net_snapshot_debian_20240514T000307Z_dists_bullseye-backports==2024-05-13T20:15:31Z
-packages.trafficmanager.net_snapshot_debian_20240514T000307Z_dists_bullseye-updates==2024-05-13T20:15:31Z
-packages.trafficmanager.net_snapshot_debian_20240514T000307Z_dists_buster==2023-06-10T08:53:33Z
-packages.trafficmanager.net_snapshot_debian_20240514T000307Z_dists_buster-backports==2024-03-09T20:54:54Z
-packages.trafficmanager.net_snapshot_debian_20240514T000307Z_dists_buster-updates==2023-06-10T08:55:10Z
+debian==20240517T000625Z
+debian-security==20240517T000237Z
+download.docker.com_linux_debian_dists_bookworm==2024-05-16T12:25:40Z
+download.docker.com_linux_debian_dists_bullseye==2024-05-16T12:25:40Z
+download.docker.com_linux_debian_dists_buster==2024-05-16T12:25:40Z
+packages.trafficmanager.net_snapshot_debian-security_20240517T000237Z_dists_bookworm-security==2024-05-16T19:15:13Z
+packages.trafficmanager.net_snapshot_debian-security_20240517T000237Z_dists_bullseye-security==2024-05-16T19:15:12Z
+packages.trafficmanager.net_snapshot_debian-security_20240517T000237Z_dists_buster_updates==2024-05-16T19:15:12Z
+packages.trafficmanager.net_snapshot_debian_20240517T000625Z_dists_bookworm==2024-02-10T11:07:25Z
+packages.trafficmanager.net_snapshot_debian_20240517T000625Z_dists_bookworm-backports==2024-05-16T20:19:56Z
+packages.trafficmanager.net_snapshot_debian_20240517T000625Z_dists_bookworm-updates==2024-05-16T20:19:56Z
+packages.trafficmanager.net_snapshot_debian_20240517T000625Z_dists_bullseye==2024-02-10T12:40:37Z
+packages.trafficmanager.net_snapshot_debian_20240517T000625Z_dists_bullseye-backports==2024-05-16T20:19:56Z
+packages.trafficmanager.net_snapshot_debian_20240517T000625Z_dists_bullseye-updates==2024-05-16T20:19:56Z
+packages.trafficmanager.net_snapshot_debian_20240517T000625Z_dists_buster==2023-06-10T08:53:33Z
+packages.trafficmanager.net_snapshot_debian_20240517T000625Z_dists_buster-backports==2024-03-09T20:54:54Z
+packages.trafficmanager.net_snapshot_debian_20240517T000625Z_dists_buster-updates==2023-06-10T08:55:10Z
+security.ubuntu.com_ubuntu_dists_focal-security==2024-05-15T17:54:08Z
diff --git a/files/build/versions/default/versions-web b/files/build/versions/default/versions-web
index 4ef245014..bb9655609 100644
--- a/files/build/versions/default/versions-web
+++ b/files/build/versions/default/versions-web
@@ -14,7 +14,16 @@ http://deb.debian.org/debian/pool/main/l/lm-sensors/lm-sensors_3.6.0.orig.tar.gz
 http://deb.debian.org/debian/pool/main/p/protobuf/protobuf_3.21.12-3.debian.tar.xz==f457e44218a7d4cc7b7ab0ed696096e3
 http://deb.debian.org/debian/pool/main/p/protobuf/protobuf_3.21.12-3.dsc==d8e34e7b07473c6903f9d245934524fb
 http://deb.debian.org/debian/pool/main/p/protobuf/protobuf_3.21.12.orig.tar.gz==d38562490234d8080bdbe8eb7baf937a
-http://www.iana.org/assignments/enterprise-numbers.txt==a34d6d99898f7230f1bc9c8087923818
+http://download.opensuse.org/repositories/home:/p4lang/Debian_11/p4lang-bmv2_1.15.0-7.debian.tar.xz==f4d249b77d4f8d120b229834aac02df5
+http://download.opensuse.org/repositories/home:/p4lang/Debian_11/p4lang-bmv2_1.15.0-7.dsc==6882841200ce58acc8db7f3e6a15e91d
+http://download.opensuse.org/repositories/home:/p4lang/Debian_11/p4lang-bmv2_1.15.0.orig.tar.gz==cbbb4a0d5b1e17dca0532c3ca761e05c
+http://download.opensuse.org/repositories/home:/p4lang/Debian_11/p4lang-p4c_1.2.4.2-2.debian.tar.xz==7ea7d64c9147bd93a790af57693ce36f
+http://download.opensuse.org/repositories/home:/p4lang/Debian_11/p4lang-p4c_1.2.4.2-2.dsc==49a4c37e4030348958320e7d95a08209
+http://download.opensuse.org/repositories/home:/p4lang/Debian_11/p4lang-p4c_1.2.4.2.orig.tar.gz==b1008dffbe236d065c5557f2d4629aa9
+http://download.opensuse.org/repositories/home:/p4lang/Debian_11/p4lang-pi_0.1.0-15.debian.tar.xz==b9d8e4ce4cb66385250cf6dded0ef57a
+http://download.opensuse.org/repositories/home:/p4lang/Debian_11/p4lang-pi_0.1.0-15.dsc==9bfdfc3b6bf96e4e8c3a6a72fc56fded
+http://download.opensuse.org/repositories/home:/p4lang/Debian_11/p4lang-pi_0.1.0.orig.tar.gz==551d3780d615557674e93fa11210499d
+http://www.iana.org/assignments/enterprise-numbers.txt==a08ba53e0976a8776b3b1a2cc9f91feb
 http://www.mellanox.com/downloads/MFT/mft-4.27.0-83-x86_64-deb.tgz==e475ca87a9252ba8d0abb6b05d5d94d0
 https://archive.apache.org/dist/thrift/0.14.1/thrift-0.14.1.tar.gz==c64434548438df2cb1e53fb27c600e85
 https://bootstrap.pypa.io/pip/2.7/get-pip.py==60e8267eb1b7bc71dc4843eb7bd294d3
@@ -162,9 +171,6 @@ https://sonicstorage.blob.core.windows.net/public/fips/bullseye/0.10/arm64/symcr
 https://sonicstorage.blob.core.windows.net/public/onie/onie-recovery-x86_64-kvm_x86_64-r0.iso==54e11e450a461b1f4ae39c3ce3f15eff
 https://sonicstorage.blob.core.windows.net/public/onie/onie-recovery-x86_64-kvm_x86_64_4_asic-r0.iso==1d8b8d3fa37f842d0184b5205be22be9
 https://sonicstorage.blob.core.windows.net/public/onie/onie-recovery-x86_64-kvm_x86_64_6_asic-r0.iso==58494305d4ac201daedf9364a1018a1b
-https://sonicstorage.blob.core.windows.net/public/redis/redis-tools_6.0.6-1_bpo10+1_arm64.deb==282b4766cc9ac7d8bb70622bd69d9f5c
-https://sonicstorage.blob.core.windows.net/public/redis/redis-tools_6.0.6-1_bpo10+1_armhf.deb==62f287117afab6caaec564232ebbb5de
-https://sonicstorage.blob.core.windows.net/public/redis/redis-tools_6.0.6-1~bpo10+1_amd64.deb==2d58c3c3358290c04d5e0ba70f297f18
 https://sonicstorage.blob.core.windows.net/public/sai/bcmpai/REL_3.11/3.11/libsaibroncos_3.11_amd64.deb==6e21a16126e833516a9659d4c35c284e
 https://storage.googleapis.com/golang/go1.15.15.linux-amd64.tar.gz==b75227438c6129b5013da053b3aa3f38
 https://storage.googleapis.com/golang/go1.15.15.linux-arm64.tar.gz==6d721146a9195592d92a80cf27d475f9
diff --git a/files/build/versions/dockers/docker-config-engine-bookworm/versions-py3 b/files/build/versions/dockers/docker-config-engine-bookworm/versions-py3
index ab241307b..d28ce7ea2 100644
--- a/files/build/versions/dockers/docker-config-engine-bookworm/versions-py3
+++ b/files/build/versions/dockers/docker-config-engine-bookworm/versions-py3
@@ -10,7 +10,7 @@ pyangbind==0.8.2
 pyyaml==6.0.1
 redis==5.0.1
 redis-dump-load==1.1
-regex==2024.5.10
+regex==2024.5.15
 six==1.16.0
 tabulate==0.9.0
 xmltodict==0.12.0
diff --git a/files/build/versions/dockers/docker-config-engine-bullseye/versions-py3 b/files/build/versions/dockers/docker-config-engine-bullseye/versions-py3
index cb89d4ce2..e3564c3c8 100644
--- a/files/build/versions/dockers/docker-config-engine-bullseye/versions-py3
+++ b/files/build/versions/dockers/docker-config-engine-bullseye/versions-py3
@@ -10,7 +10,7 @@ pyangbind==0.8.1
 pyyaml==6.0.1
 redis==4.5.4
 redis-dump-load==1.1
-regex==2024.5.10
+regex==2024.5.15
 six==1.16.0
 tabulate==0.9.0
 xmltodict==0.12.0
diff --git a/files/build/versions/dockers/docker-dash-engine/versions-deb-focal b/files/build/versions/dockers/docker-dash-engine/versions-deb-focal
new file mode 100644
index 000000000..723eaaedd
--- /dev/null
+++ b/files/build/versions/dockers/docker-dash-engine/versions-deb-focal
@@ -0,0 +1,101 @@
+binutils==2.34-6ubuntu1.9
+binutils-common==2.34-6ubuntu1.9
+binutils-x86-64-linux-gnu==2.34-6ubuntu1.9
+build-essential==12.8ubuntu1.1
+ca-certificates==20230311ubuntu0.20.04.1
+cpp==4:9.3.0-1ubuntu2
+cpp-9==9.4.0-1ubuntu1~20.04.2
+cron==3.0pl1-136ubuntu1
+dirmngr==2.2.19-3ubuntu2.2
+dpkg-dev==1.19.7ubuntu3.2
+fakeroot==1.24-1
+g++==4:9.3.0-1ubuntu2
+g++-9==9.4.0-1ubuntu1~20.04.2
+gcc==4:9.3.0-1ubuntu2
+gcc-10-base==10.5.0-1ubuntu1~20.04
+gcc-9==9.4.0-1ubuntu1~20.04.2
+gcc-9-base==9.4.0-1ubuntu1~20.04.2
+gnupg==2.2.19-3ubuntu2.2
+gnupg-l10n==2.2.19-3ubuntu2.2
+gnupg-utils==2.2.19-3ubuntu2.2
+gpg==2.2.19-3ubuntu2.2
+gpg-agent==2.2.19-3ubuntu2.2
+gpg-wks-client==2.2.19-3ubuntu2.2
+gpg-wks-server==2.2.19-3ubuntu2.2
+gpgconf==2.2.19-3ubuntu2.2
+gpgsm==2.2.19-3ubuntu2.2
+gpgv==2.2.19-3ubuntu2.2
+libalgorithm-diff-perl==1.19.03-2
+libalgorithm-diff-xs-perl==0.04-6
+libalgorithm-merge-perl==0.08-3
+libasan5==9.4.0-1ubuntu1~20.04.2
+libasn1-8-heimdal==7.7.0+dfsg-1ubuntu1.4
+libassuan0==2.5.3-7ubuntu2
+libatomic1==10.5.0-1ubuntu1~20.04
+libbinutils==2.34-6ubuntu1.9
+libcc1-0==10.5.0-1ubuntu1~20.04
+libctf-nobfd0==2.34-6ubuntu1.9
+libctf0==2.34-6ubuntu1.9
+libdpkg-perl==1.19.7ubuntu3.2
+libestr0==0.1.10-2.1
+libexpat1==2.2.9-1ubuntu0.6
+libexpat1-dev==2.2.9-1ubuntu0.6
+libfakeroot==1.24-1
+libfastjson4==0.99.8-2
+libfile-fcntllock-perl==0.22-3build4
+libgcc-9-dev==9.4.0-1ubuntu1~20.04.2
+libgcc-s1==10.5.0-1ubuntu1~20.04
+libgdbm-compat4==1.18.1-5
+libgdbm6==1.18.1-5
+libgomp1==10.5.0-1ubuntu1~20.04
+libgssapi3-heimdal==7.7.0+dfsg-1ubuntu1.4
+libhcrypto4-heimdal==7.7.0+dfsg-1ubuntu1.4
+libheimbase1-heimdal==7.7.0+dfsg-1ubuntu1.4
+libheimntlm0-heimdal==7.7.0+dfsg-1ubuntu1.4
+libhx509-5-heimdal==7.7.0+dfsg-1ubuntu1.4
+libisl22==0.22.1-1
+libitm1==10.5.0-1ubuntu1~20.04
+libkrb5-26-heimdal==7.7.0+dfsg-1ubuntu1.4
+libksba8==1.3.5-2ubuntu0.20.04.2
+libldap-2.4-2==2.4.49+dfsg-2ubuntu1.10
+libldap-common==2.4.49+dfsg-2ubuntu1.10
+liblocale-gettext-perl==1.07-4
+liblsan0==10.5.0-1ubuntu1~20.04
+libmpc3==1.1.0-1
+libmpfr6==4.0.2-1
+libnpth0==1.6-1
+libperl5.30==5.30.0-9ubuntu0.5
+libpopt0==1.16-14
+libpython3-dev==3.8.2-0ubuntu2
+libpython3.8==3.8.10-0ubuntu1~20.04.9
+libpython3.8-dev==3.8.10-0ubuntu1~20.04.9
+libpython3.8-minimal==3.8.10-0ubuntu1~20.04.9
+libpython3.8-stdlib==3.8.10-0ubuntu1~20.04.9
+libquadmath0==10.5.0-1ubuntu1~20.04
+libroken18-heimdal==7.7.0+dfsg-1ubuntu1.4
+libstdc++-9-dev==9.4.0-1ubuntu1~20.04.2
+libstdc++6==10.5.0-1ubuntu1~20.04
+libtsan0==10.5.0-1ubuntu1~20.04
+libubsan1==10.5.0-1ubuntu1~20.04
+libwind0-heimdal==7.7.0+dfsg-1ubuntu1.4
+logrotate==3.14.0-4ubuntu3
+make==4.2.1-1.2
+netbase==6.1
+openssl==1.1.1f-1ubuntu2.22
+patch==2.7.6-6
+perl==5.30.0-9ubuntu0.5
+perl-base==5.30.0-9ubuntu0.5
+perl-modules-5.30==5.30.0-9ubuntu0.5
+pinentry-curses==1.1.0-3build1
+python-pip-whl==20.0.2-5ubuntu1.10
+python3-dev==3.8.2-0ubuntu2
+python3-pip==20.0.2-5ubuntu1.10
+python3-wheel==0.34.2-1ubuntu0.1
+python3.8==3.8.10-0ubuntu1~20.04.9
+python3.8-dev==3.8.10-0ubuntu1~20.04.9
+python3.8-minimal==3.8.10-0ubuntu1~20.04.9
+rsyslog==8.2001.0-1ubuntu1.3
+supervisor==4.1.0-1ubuntu1
+ucf==3.0038+nmu1
+zlib1g==1:1.2.11.dfsg-2ubuntu1.5
+zlib1g-dev==1:1.2.11.dfsg-2ubuntu1.5
diff --git a/files/build/versions/dockers/docker-dash-engine/versions-py3 b/files/build/versions/dockers/docker-dash-engine/versions-py3
new file mode 100644
index 000000000..da8137a38
--- /dev/null
+++ b/files/build/versions/dockers/docker-dash-engine/versions-py3
@@ -0,0 +1,18 @@
+cffi==1.15.0
+coverage==6.3.1
+cython==0.29.27
+grpcio==1.43.2
+nnpy==0.1
+pip==20.0.2
+protobuf==3.18.1
+ptf==0.9.1
+pycparser==2.21
+pypcap==1.2.3
+scapy==2.4.5
+setuptools==45.2.0
+six==1.16.0
+supervisor==4.1.0
+supervisord-dependent-startup==1.4.0
+thrift==0.13.0
+toposort==1.10
+wheel==0.37.1
diff --git a/files/build/versions/dockers/docker-gbsyncd-vs/versions-deb-bookworm b/files/build/versions/dockers/docker-gbsyncd-vs/versions-deb-bookworm
index afd567e7c..616dcecd8 100644
--- a/files/build/versions/dockers/docker-gbsyncd-vs/versions-deb-bookworm
+++ b/files/build/versions/dockers/docker-gbsyncd-vs/versions-deb-bookworm
@@ -1,19 +1,230 @@
+autoconf==2.71-3
+automake==1:1.16.5-1.3
+autotools-dev==20220109.1
+binutils==2.40-2
+binutils-x86-64-linux-gnu==2.40-2
+clang==1:14.0-55.7~deb12u1
+clang-14==1:14.0.6-12
+cpp==4:12.2.0-3
+cpp-12==12.2.0-14
+file==1:5.44-3
+flex==2.6.4-8.2
+gcc==4:12.2.0-3
+gcc-12==12.2.0-14
 gdb==13.1-3
 gdbserver==13.1-3
+gfortran-12==12.2.0-14
+ibverbs-providers==44.0-2
+icu-devtools==72.1-3
+libabsl-dev==20220623.1-1
+libabsl20220623==20220623.1-1
+libasan8==12.2.0-14
 libbabeltrace1==1.5.11-1+b2
+libbinutils==2.40-2
+libboost-all-dev==1.74.0.3
+libboost-atomic-dev==1.74.0.3
+libboost-atomic1.74-dev==1.74.0+ds1-21
+libboost-atomic1.74.0==1.74.0+ds1-21
+libboost-chrono-dev==1.74.0.3
+libboost-chrono1.74-dev==1.74.0+ds1-21
+libboost-chrono1.74.0==1.74.0+ds1-21
+libboost-container-dev==1.74.0.3
+libboost-container1.74-dev==1.74.0+ds1-21
+libboost-container1.74.0==1.74.0+ds1-21
+libboost-context-dev==1.74.0.3
+libboost-context1.74-dev==1.74.0+ds1-21
+libboost-context1.74.0==1.74.0+ds1-21
+libboost-coroutine-dev==1.74.0.3
+libboost-coroutine1.74-dev==1.74.0+ds1-21
+libboost-coroutine1.74.0==1.74.0+ds1-21
+libboost-date-time-dev==1.74.0.3
+libboost-date-time1.74-dev==1.74.0+ds1-21
+libboost-date-time1.74.0==1.74.0+ds1-21
+libboost-dev==1.74.0.3
+libboost-exception-dev==1.74.0.3
+libboost-exception1.74-dev==1.74.0+ds1-21
+libboost-fiber-dev==1.74.0.3
+libboost-fiber1.74-dev==1.74.0+ds1-21
+libboost-fiber1.74.0==1.74.0+ds1-21
+libboost-filesystem-dev==1.74.0.3
+libboost-filesystem1.74-dev==1.74.0+ds1-21
+libboost-filesystem1.74.0==1.74.0+ds1-21
+libboost-graph-dev==1.74.0.3
+libboost-graph-parallel-dev==1.74.0.3
+libboost-graph-parallel1.74-dev==1.74.0+ds1-21
+libboost-graph-parallel1.74.0==1.74.0+ds1-21
+libboost-graph1.74-dev==1.74.0+ds1-21
+libboost-graph1.74.0==1.74.0+ds1-21
+libboost-iostreams-dev==1.74.0.3
+libboost-iostreams1.74-dev==1.74.0+ds1-21
+libboost-iostreams1.74.0==1.74.0+ds1-21
+libboost-locale-dev==1.74.0.3
+libboost-locale1.74-dev==1.74.0+ds1-21
+libboost-locale1.74.0==1.74.0+ds1-21
+libboost-log-dev==1.74.0.3
+libboost-log1.74-dev==1.74.0+ds1-21
+libboost-log1.74.0==1.74.0+ds1-21
+libboost-math-dev==1.74.0.3
+libboost-math1.74-dev==1.74.0+ds1-21
+libboost-math1.74.0==1.74.0+ds1-21
+libboost-mpi-dev==1.74.0.3
+libboost-mpi-python-dev==1.74.0.3
+libboost-mpi-python1.74-dev==1.74.0+ds1-21
+libboost-mpi-python1.74.0==1.74.0+ds1-21
+libboost-mpi1.74-dev==1.74.0+ds1-21
+libboost-mpi1.74.0==1.74.0+ds1-21
+libboost-nowide-dev==1.74.0.3
+libboost-nowide1.74-dev==1.74.0+ds1-21
+libboost-nowide1.74.0==1.74.0+ds1-21
+libboost-numpy-dev==1.74.0.3
+libboost-numpy1.74-dev==1.74.0+ds1-21
+libboost-numpy1.74.0==1.74.0+ds1-21
+libboost-program-options-dev==1.74.0.3
+libboost-program-options1.74-dev==1.74.0+ds1-21
+libboost-program-options1.74.0==1.74.0+ds1-21
+libboost-python-dev==1.74.0.3
+libboost-python1.74-dev==1.74.0+ds1-21
+libboost-python1.74.0==1.74.0+ds1-21
+libboost-random-dev==1.74.0.3
+libboost-random1.74-dev==1.74.0+ds1-21
+libboost-random1.74.0==1.74.0+ds1-21
+libboost-regex-dev==1.74.0.3
+libboost-regex1.74-dev==1.74.0+ds1-21
 libboost-regex1.74.0==1.74.0+ds1-21
+libboost-serialization-dev==1.74.0.3
+libboost-serialization1.74-dev==1.74.0+ds1-21
+libboost-stacktrace-dev==1.74.0.3
+libboost-stacktrace1.74-dev==1.74.0+ds1-21
+libboost-stacktrace1.74.0==1.74.0+ds1-21
+libboost-system-dev==1.74.0.3
+libboost-system1.74-dev==1.74.0+ds1-21
+libboost-system1.74.0==1.74.0+ds1-21
+libboost-test-dev==1.74.0.3
+libboost-test1.74-dev==1.74.0+ds1-21
+libboost-test1.74.0==1.74.0+ds1-21
+libboost-thread-dev==1.74.0.3
+libboost-thread1.74-dev==1.74.0+ds1-21
+libboost-thread1.74.0==1.74.0+ds1-21
+libboost-timer-dev==1.74.0.3
+libboost-timer1.74-dev==1.74.0+ds1-21
+libboost-timer1.74.0==1.74.0+ds1-21
+libboost-tools-dev==1.74.0.3
+libboost-type-erasure-dev==1.74.0.3
+libboost-type-erasure1.74-dev==1.74.0+ds1-21
+libboost-type-erasure1.74.0==1.74.0+ds1-21
+libboost-wave-dev==1.74.0.3
+libboost-wave1.74-dev==1.74.0+ds1-21
+libboost-wave1.74.0==1.74.0+ds1-21
+libboost1.74-dev==1.74.0+ds1-21
+libboost1.74-tools-dev==1.74.0+ds1-21
+libbpf-dev==1:1.1.0-1
+libc-ares-dev==1.18.1-3
+libc-ares2==1.18.1-3
+libc-dev-bin==2.36-9+deb12u7
+libc6-dev==2.36-9+deb12u7
 libcbor0.8==0.8.0-2+b1
+libcc1-0==12.2.0-14
+libclang-common-14-dev==1:14.0.6-12
+libclang-cpp14==1:14.0.6-12
+libclang1-14==1:14.0.6-12
+libctf-nobfd0==2.40-2
+libctf0==2.40-2
 libcurl3-gnutls==7.88.1-10+deb12u5
+libcurl3-nss==7.88.1-10+deb12u5
+libdbus-1-dev==1.14.10-1~deb12u1
 libdebuginfod-common==0.188-2.1
 libdebuginfod1==0.188-2.1
+libdouble-conversion3==3.2.1-1
 libdw1==0.188-2.1
 libedit2==3.1-20221030-2
+libelf-dev==0.188-2.1
+libevent-2.1-7==2.1.12-stable-8
+libevent-core-2.1-7==2.1.12-stable-8
+libevent-dev==2.1.12-stable-8
+libevent-extra-2.1-7==2.1.12-stable-8
+libevent-openssl-2.1-7==2.1.12-stable-8
+libevent-pthreads-2.1-7==2.1.12-stable-8
+libexpat1-dev==2.5.0-1
+libfabric1==1.17.0-3
 libfido2-1==1.12.0-2+b1
+libfl-dev==2.6.4-8.2
+libfl2==2.6.4-8.2
+libgc-dev==1:8.2.2-3
+libgc1==1:8.2.2-3
+libgcc-12-dev==12.2.0-14
+libgfortran-12-dev==12.2.0-14
+libgfortran5==12.2.0-14
 libglib2.0-0==2.74.6-2+deb12u2
+libgmp-dev==2:6.2.1+dfsg1-1.1
+libgmpxx4ldbl==2:6.2.1+dfsg1-1.1
+libgomp1==12.2.0-14
 libgpm2==1.20.7-10+b1
+libgprofng0==2.40-2
+libgrpc++-dev==1.51.1-3+b1
+libgrpc++1.51==1.51.1-3+b1
+libgrpc-dev==1.51.1-3+b1
+libgrpc29==1.51.1-3+b1
+libhwloc-dev==2.9.0-1
+libhwloc-plugins==2.9.0-1
+libhwloc15==2.9.0-1
+libibverbs-dev==44.0-2
+libibverbs1==44.0-2
+libicu-dev==72.1-3
 libicu72==72.1-3
 libipt2==2.0.5-1
+libisl23==0.25-1.1
+libitm1==12.2.0-14
+libjs-jquery-ui==1.13.2+dfsg-1
+libjs-sphinxdoc==5.3.0-4
+libjs-underscore==1.13.4~dfsg+~1.11.4-3
+libllvm14==1:14.0.6-12
+liblsan0==12.2.0-14
+libltdl-dev==2.4.7-5
+libltdl7==2.4.7-5
+libmagic-mgc==1:5.44-3
+libmagic1==1:5.44-3
+libmpc3==1.3.1-1
 libmpfr6==4.2.0-1
+libmunge2==0.5.15-2
+libnanomsg-dev==1.1.5+dfsg-1.1+b1
+libnanomsg5==1.1.5+dfsg-1.1+b1
+libnl-3-dev==3.5.0-1
+libnl-route-3-dev==3.5.0-1
+libnsl-dev==1.3.0-2
+libnspr4==2:4.35-1
+libnss3==2:3.87.1-1
+libnuma-dev==2.0.16-1
+libnuma1==2.0.16-1
+libobjc-12-dev==12.2.0-14
+libobjc4==12.2.0-14
+libopenmpi-dev==4.1.4-3+b1
+libopenmpi3==4.1.4-3+b1
+libpcap-dev==1.10.3-1
+libpcap0.8==1.10.3-1
+libpcap0.8-dev==1.10.3-1
+libpciaccess0==0.17-2
+libpcre2-16-0==10.42-1
+libpfm4==4.13.0-1
+libpkgconf3==1.8.1-1
+libpmix-dev==4.2.2-1+deb12u1
+libpmix2==4.2.2-1+deb12u1
+libprotobuf-dev==3.21.12-3
+libprotobuf-lite32==3.21.12-3
+libprotobuf32==3.21.12-3
+libprotoc-dev==3.21.12-3
+libprotoc32==3.21.12-3
+libpsm-infinipath1==3.3+20.604758e7-6.2
+libpsm2-2==11.2.185-2
+libpython3-dev==3.11.2-1+b1
+libpython3.11-dev==3.11.2-6
+libqt5core5a==5.15.8+dfsg-11
+libqt5dbus5==5.15.8+dfsg-11
+libqt5network5==5.15.8+dfsg-11
+libquadmath0==12.2.0-14
+librdmacm1==44.0-2
+libre2-9==20220601+dfsg-1+b1
+libre2-dev==20220601+dfsg-1+b1
+libsai==1.0.0
 libsaimetadata==1.0.0
 libsaimetadata-dbgsym==1.0.0
 libsairedis==1.0.0
@@ -22,14 +233,71 @@ libsaivs==1.0.0
 libsaivs-dbgsym==1.0.0
 libsource-highlight-common==3.1.9-4.2
 libsource-highlight4v5==3.1.9-4.2+b3
+libssl-dev==3.0.11-1~deb12u2
+libstdc++-12-dev==12.2.0-14
 libswsscommon-dbgsym==1.0.0
+libthrift-0.17.0==0.17.0-2+b2
+libthrift-dev==0.17.0-2+b2
+libtirpc-dev==1.3.3+ds-1
+libtool==2.4.7-5
+libtsan2==12.2.0-14
+libubsan1==12.2.0-14
+libucx0==1.13.1-1
 libunwind8==1.6.2-3
+libx11-6==2:1.8.4-2+deb12u2
+libx11-data==2:1.8.4-2+deb12u2
+libxau6==1:1.0.9-1
+libxcb1==1.15-1
+libxdmcp6==1:1.1.2-3
+libxext6==2:1.3.4-1+b1
+libxml2==2.9.14+dfsg-1.3~deb12u1
+libxnvctrl0==525.85.05-3~deb12u1
+libz3-4==4.8.12-3.1
+linux-libc-dev==6.1.90-1
+llvm==1:14.0-55.7~deb12u1
+llvm-14==1:14.0.6-12
+llvm-14-linker-tools==1:14.0.6-12
+llvm-14-runtime==1:14.0.6-12
+llvm-runtime==1:14.0-55.7~deb12u1
+m4==1.4.19-3
+mpi-default-bin==1.14
+mpi-default-dev==1.14
+netbase==6.4
+nss-plugin-pem==1.0.8+1-1
+ocl-icd-libopencl1==2.3.1-1
+openmpi-bin==4.1.4-3+b1
+openmpi-common==4.1.4-3
 openssh-client==1:9.2p1-2+deb12u2
+p4lang-bmv2==1.15.0-7
+p4lang-p4c==1.2.4.2-2
+p4lang-pi==0.1.0-15
+pkg-config==1.8.1-1
+pkgconf==1.8.1-1
+pkgconf-bin==1.8.1-1
+protobuf-compiler==3.21.12-3
+protobuf-compiler-grpc==1.51.1-3+b1
+python3-dev==3.11.2-1+b1
+python3-grpcio==1.51.1-3+b1
+python3-ply==3.11-5
+python3-protobuf==3.21.12-3
+python3-psutil==5.9.4-1+b1
+python3-pyroute2==0.7.2-2
+python3-scapy==2.5.0+dfsg-2
+python3-six==1.16.0-4
+python3-thrift==0.17.0-2+b2
+python3.11-dev==3.11.2-6
+rpcsvc-proto==1.4.3-1
 sensible-utils==0.0.17+nmu1
+sgml-base==1.31
+shared-mime-info==2.2-1
 sshpass==1.09-1+b1
 strace==6.1-0.1
 syncd-vs==1.0.0
 syncd-vs-dbgsym==1.0.0
+tcpdump==4.99.3-1
+thrift-compiler==0.17.0-2+b2
 ucf==3.0043+nmu1
 vim==2:9.0.1378-2
 vim-runtime==2:9.0.1378-2
+xml-core==0.18+nmu1
+zlib1g-dev==1:1.2.13.dfsg-1
diff --git a/files/build/versions/dockers/docker-gbsyncd-vs/versions-py3 b/files/build/versions/dockers/docker-gbsyncd-vs/versions-py3
new file mode 100644
index 000000000..ed1879443
--- /dev/null
+++ b/files/build/versions/dockers/docker-gbsyncd-vs/versions-py3
@@ -0,0 +1,7 @@
+grpcio==1.51.1
+ply==3.11
+protobuf==4.21.12
+psutil==5.9.4
+pyroute2==0.7.2
+scapy==2.5.0
+thrift==0.17.0
diff --git a/files/build/versions/dockers/docker-platform-monitor/versions-deb-bookworm b/files/build/versions/dockers/docker-platform-monitor/versions-deb-bookworm
index ce7883fa9..066fa012d 100644
--- a/files/build/versions/dockers/docker-platform-monitor/versions-deb-bookworm
+++ b/files/build/versions/dockers/docker-platform-monitor/versions-deb-bookworm
@@ -34,8 +34,10 @@ libharfbuzz0b==6.0.0+dfsg-3
 libi2c0==4.3-2+b3
 libicu72==72.1-3
 libipt2==2.0.5-1
+libjson-c5==0.16-2
 libkmod2==30+20221128-1
 libmpfr6==4.2.0-1
+libnvme1==1.3-1
 libpango-1.0-0==1.50.12+ds-1
 libpangocairo-1.0-0==1.50.12+ds-1
 libpangoft2-1.0-0==1.50.12+ds-1
@@ -65,6 +67,7 @@ libxml2==2.9.14+dfsg-1.3~deb12u1
 libxrender1==1:0.9.10-1.1
 lm-sensors==1:3.6.0-7.1
 lm-sensors-dbgsym==1:3.6.0-7.1
+nvme-cli==2.4+really2.3-3
 openssh-client==1:9.2p1-2+deb12u2
 pci.ids==0.0~2023.04.11-1
 pciutils==1:3.9.0-4
@@ -89,5 +92,6 @@ sxd-libs==1.mlnx.4.6.3064
 sxd-libs-dev==1.mlnx.4.6.3064
 ucf==3.0043+nmu1
 udev==252.22-1~deb12u1
+uuid-runtime==2.38.1-5+deb12u1
 vim==2:9.0.1378-2
 vim-runtime==2:9.0.1378-2
diff --git a/files/build/versions/dockers/docker-sonic-gnmi/versions-deb-bookworm b/files/build/versions/dockers/docker-sonic-gnmi/versions-deb-bookworm
new file mode 100644
index 000000000..78de7f716
--- /dev/null
+++ b/files/build/versions/dockers/docker-sonic-gnmi/versions-deb-bookworm
@@ -0,0 +1,29 @@
+gdb==13.1-3
+gdbserver==13.1-3
+libbabeltrace1==1.5.11-1+b2
+libboost-regex1.74.0==1.74.0+ds1-21
+libcbor0.8==0.8.0-2+b1
+libcurl3-gnutls==7.88.1-10+deb12u5
+libdebuginfod-common==0.188-2.1
+libdebuginfod1==0.188-2.1
+libdw1==0.188-2.1
+libedit2==3.1-20221030-2
+libfido2-1==1.12.0-2+b1
+libglib2.0-0==2.74.6-2+deb12u2
+libgpm2==1.20.7-10+b1
+libicu72==72.1-3
+libipt2==2.0.5-1
+libmpfr6==4.2.0-1
+libsource-highlight-common==3.1.9-4.2
+libsource-highlight4v5==3.1.9-4.2+b3
+libswsscommon-dbgsym==1.0.0
+libunwind8==1.6.2-3
+openssh-client==1:9.2p1-2+deb12u2
+sensible-utils==0.0.17+nmu1
+sonic-gnmi==0.1
+sonic-mgmt-common==1.0.0
+sshpass==1.09-1+b1
+strace==6.1-0.1
+ucf==3.0043+nmu1
+vim==2:9.0.1378-2
+vim-runtime==2:9.0.1378-2
diff --git a/files/build/versions/dockers/docker-sonic-gnmi/versions-deb-bullseye b/files/build/versions/dockers/docker-sonic-gnmi/versions-deb-bullseye
deleted file mode 100644
index 40e96a175..000000000
--- a/files/build/versions/dockers/docker-sonic-gnmi/versions-deb-bullseye
+++ /dev/null
@@ -1,26 +0,0 @@
-gdb==10.1-1.7
-gdbserver==10.1-1.7
-libbabeltrace1==1.5.8-1+b3
-libboost-regex1.74.0==1.74.0-9
-libcbor0==0.5.0+dfsg-2
-libcurl3-gnutls==7.74.0-1.3+deb11u11
-libdebuginfod1==0.183-1
-libdw1==0.183-1
-libedit2==3.1-20191231-2+b1
-libfido2-1==1.6.0-2
-libglib2.0-0==2.66.8-1+deb11u3
-libgpm2==1.20.7-8
-libicu67==67.1-7
-libipt2==2.0.3-1
-libmpfr6==4.1.0-3
-libsource-highlight-common==3.1.9-3
-libsource-highlight4v5==3.1.9-3+b1
-libswsscommon-dbgsym==1.0.0
-libunwind8==1.3.2-2
-openssh-client==1:8.4p1-5+deb11u3
-sonic-gnmi==0.1
-sonic-mgmt-common==1.0.0
-sshpass==1.09-1+b1
-strace==5.10-1
-vim==2:8.2.2434-3+deb11u1
-vim-runtime==2:8.2.2434-3+deb11u1
diff --git a/files/build/versions/dockers/docker-sonic-mgmt-framework/versions-deb-bookworm b/files/build/versions/dockers/docker-sonic-mgmt-framework/versions-deb-bookworm
new file mode 100644
index 000000000..4ac805e33
--- /dev/null
+++ b/files/build/versions/dockers/docker-sonic-mgmt-framework/versions-deb-bookworm
@@ -0,0 +1,34 @@
+gdb==13.1-3
+gdbserver==13.1-3
+libbabeltrace1==1.5.11-1+b2
+libboost-regex1.74.0==1.74.0+ds1-21
+libcbor0.8==0.8.0-2+b1
+libcjson-dev==1.7.15-1
+libcjson1==1.7.15-1
+libcurl3-gnutls==7.88.1-10+deb12u5
+libcurl4-openssl-dev==7.88.1-10+deb12u5
+libdebuginfod-common==0.188-2.1
+libdebuginfod1==0.188-2.1
+libdw1==0.188-2.1
+libedit2==3.1-20221030-2
+libfido2-1==1.12.0-2+b1
+libglib2.0-0==2.74.6-2+deb12u2
+libgpm2==1.20.7-10+b1
+libicu72==72.1-3
+libipt2==2.0.5-1
+libmpfr6==4.2.0-1
+libsource-highlight-common==3.1.9-4.2
+libsource-highlight4v5==3.1.9-4.2+b3
+libswsscommon-dbgsym==1.0.0
+libunwind8==1.6.2-3
+libxml2==2.9.14+dfsg-1.3~deb12u1
+openssh-client==1:9.2p1-2+deb12u2
+sensible-utils==0.0.17+nmu1
+sonic-mgmt-common==1.0.0
+sonic-mgmt-framework==1.0-01
+sonic-mgmt-framework-dbg==1.0-01
+sshpass==1.09-1+b1
+strace==6.1-0.1
+ucf==3.0043+nmu1
+vim==2:9.0.1378-2
+vim-runtime==2:9.0.1378-2
diff --git a/files/build/versions/dockers/docker-sonic-mgmt-framework/versions-deb-buster b/files/build/versions/dockers/docker-sonic-mgmt-framework/versions-deb-buster
deleted file mode 100644
index 9515fdc04..000000000
--- a/files/build/versions/dockers/docker-sonic-mgmt-framework/versions-deb-buster
+++ /dev/null
@@ -1,25 +0,0 @@
-gdb==8.2.1-2+b3
-gdbserver==8.2.1-2+b3
-libbabeltrace1==1.5.6-2+deb10u1
-libbsd0==0.9.1-2+deb10u1
-libcjson-dev==1.7.10-1.1+deb10u2
-libcjson1==1.7.10-1.1+deb10u2
-libcurl3-gnutls==7.64.0-4+deb10u9
-libdw1==0.176-1.1+deb10u1
-libedit2==3.1-20181209-1
-libglib2.0-0==2.58.3-2+deb10u6
-libgpm2==1.20.7-5
-libicu63==63.1-6+deb10u3
-libipt2==2.0-2
-libpopt0==1.16-12
-libswsscommon-dbgsym==1.0.0
-libunwind8==1.2.1-10~deb10u1
-libxml2==2.9.4+dfsg1-7+deb10u6
-openssh-client==1:7.9p1-10+deb10u4
-sonic-mgmt-common==1.0.0
-sonic-mgmt-framework==1.0-01
-sonic-mgmt-framework-dbg==1.0-01
-sshpass==1.06-1
-strace==4.26-0.2
-vim==2:8.1.0875-5+deb10u6
-vim-runtime==2:8.1.0875-5+deb10u6
diff --git a/files/build/versions/dockers/docker-sonic-mgmt-framework/versions-py3 b/files/build/versions/dockers/docker-sonic-mgmt-framework/versions-py3
index 6bcdc5559..2179078d0 100644
--- a/files/build/versions/dockers/docker-sonic-mgmt-framework/versions-py3
+++ b/files/build/versions/dockers/docker-sonic-mgmt-framework/versions-py3
@@ -1,30 +1,5 @@
-attrs==23.2.0
-certifi==2017.4.17
+certifi==2024.2.2
 charset-normalizer==3.3.2
-click==8.1.7
-clickclick==20.10.2
-connexion==2.7.0
-flask==2.2.5
-grpcio==1.58.0
-grpcio-tools==1.20.0
 idna==3.7
-importlib-resources==5.12.0
-inflection==0.5.1
-itsdangerous==2.1.2
-jsonschema==4.17.3
-jsonschema-spec==0.1.6
-lazy-object-proxy==1.9.0
-openapi-schema-validator==0.4.4
-openapi-spec-validator==0.5.7
-pathable==0.4.3
-pkgutil_resolve_name==1.3.10
-protobuf==4.24.4
-pyrsistent==0.19.3
-python-dateutil==2.6.0
 requests==2.31.0
-rfc3339-validator==0.1.4
-setuptools==21.0.0
-six==1.11.0
-typing_extensions==4.5.0
-urllib3==1.26.5
-werkzeug==2.2.3
+urllib3==2.2.1
diff --git a/files/build/versions/dockers/docker-syncd-vs/versions-deb-bookworm b/files/build/versions/dockers/docker-syncd-vs/versions-deb-bookworm
index afd567e7c..616dcecd8 100644
--- a/files/build/versions/dockers/docker-syncd-vs/versions-deb-bookworm
+++ b/files/build/versions/dockers/docker-syncd-vs/versions-deb-bookworm
@@ -1,19 +1,230 @@
+autoconf==2.71-3
+automake==1:1.16.5-1.3
+autotools-dev==20220109.1
+binutils==2.40-2
+binutils-x86-64-linux-gnu==2.40-2
+clang==1:14.0-55.7~deb12u1
+clang-14==1:14.0.6-12
+cpp==4:12.2.0-3
+cpp-12==12.2.0-14
+file==1:5.44-3
+flex==2.6.4-8.2
+gcc==4:12.2.0-3
+gcc-12==12.2.0-14
 gdb==13.1-3
 gdbserver==13.1-3
+gfortran-12==12.2.0-14
+ibverbs-providers==44.0-2
+icu-devtools==72.1-3
+libabsl-dev==20220623.1-1
+libabsl20220623==20220623.1-1
+libasan8==12.2.0-14
 libbabeltrace1==1.5.11-1+b2
+libbinutils==2.40-2
+libboost-all-dev==1.74.0.3
+libboost-atomic-dev==1.74.0.3
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+libboost-chrono1.74-dev==1.74.0+ds1-21
+libboost-chrono1.74.0==1.74.0+ds1-21
+libboost-container-dev==1.74.0.3
+libboost-container1.74-dev==1.74.0+ds1-21
+libboost-container1.74.0==1.74.0+ds1-21
+libboost-context-dev==1.74.0.3
+libboost-context1.74-dev==1.74.0+ds1-21
+libboost-context1.74.0==1.74.0+ds1-21
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+libboost-coroutine1.74-dev==1.74.0+ds1-21
+libboost-coroutine1.74.0==1.74.0+ds1-21
+libboost-date-time-dev==1.74.0.3
+libboost-date-time1.74-dev==1.74.0+ds1-21
+libboost-date-time1.74.0==1.74.0+ds1-21
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+libboost-exception-dev==1.74.0.3
+libboost-exception1.74-dev==1.74.0+ds1-21
+libboost-fiber-dev==1.74.0.3
+libboost-fiber1.74-dev==1.74.0+ds1-21
+libboost-fiber1.74.0==1.74.0+ds1-21
+libboost-filesystem-dev==1.74.0.3
+libboost-filesystem1.74-dev==1.74.0+ds1-21
+libboost-filesystem1.74.0==1.74.0+ds1-21
+libboost-graph-dev==1.74.0.3
+libboost-graph-parallel-dev==1.74.0.3
+libboost-graph-parallel1.74-dev==1.74.0+ds1-21
+libboost-graph-parallel1.74.0==1.74.0+ds1-21
+libboost-graph1.74-dev==1.74.0+ds1-21
+libboost-graph1.74.0==1.74.0+ds1-21
+libboost-iostreams-dev==1.74.0.3
+libboost-iostreams1.74-dev==1.74.0+ds1-21
+libboost-iostreams1.74.0==1.74.0+ds1-21
+libboost-locale-dev==1.74.0.3
+libboost-locale1.74-dev==1.74.0+ds1-21
+libboost-locale1.74.0==1.74.0+ds1-21
+libboost-log-dev==1.74.0.3
+libboost-log1.74-dev==1.74.0+ds1-21
+libboost-log1.74.0==1.74.0+ds1-21
+libboost-math-dev==1.74.0.3
+libboost-math1.74-dev==1.74.0+ds1-21
+libboost-math1.74.0==1.74.0+ds1-21
+libboost-mpi-dev==1.74.0.3
+libboost-mpi-python-dev==1.74.0.3
+libboost-mpi-python1.74-dev==1.74.0+ds1-21
+libboost-mpi-python1.74.0==1.74.0+ds1-21
+libboost-mpi1.74-dev==1.74.0+ds1-21
+libboost-mpi1.74.0==1.74.0+ds1-21
+libboost-nowide-dev==1.74.0.3
+libboost-nowide1.74-dev==1.74.0+ds1-21
+libboost-nowide1.74.0==1.74.0+ds1-21
+libboost-numpy-dev==1.74.0.3
+libboost-numpy1.74-dev==1.74.0+ds1-21
+libboost-numpy1.74.0==1.74.0+ds1-21
+libboost-program-options-dev==1.74.0.3
+libboost-program-options1.74-dev==1.74.0+ds1-21
+libboost-program-options1.74.0==1.74.0+ds1-21
+libboost-python-dev==1.74.0.3
+libboost-python1.74-dev==1.74.0+ds1-21
+libboost-python1.74.0==1.74.0+ds1-21
+libboost-random-dev==1.74.0.3
+libboost-random1.74-dev==1.74.0+ds1-21
+libboost-random1.74.0==1.74.0+ds1-21
+libboost-regex-dev==1.74.0.3
+libboost-regex1.74-dev==1.74.0+ds1-21
 libboost-regex1.74.0==1.74.0+ds1-21
+libboost-serialization-dev==1.74.0.3
+libboost-serialization1.74-dev==1.74.0+ds1-21
+libboost-stacktrace-dev==1.74.0.3
+libboost-stacktrace1.74-dev==1.74.0+ds1-21
+libboost-stacktrace1.74.0==1.74.0+ds1-21
+libboost-system-dev==1.74.0.3
+libboost-system1.74-dev==1.74.0+ds1-21
+libboost-system1.74.0==1.74.0+ds1-21
+libboost-test-dev==1.74.0.3
+libboost-test1.74-dev==1.74.0+ds1-21
+libboost-test1.74.0==1.74.0+ds1-21
+libboost-thread-dev==1.74.0.3
+libboost-thread1.74-dev==1.74.0+ds1-21
+libboost-thread1.74.0==1.74.0+ds1-21
+libboost-timer-dev==1.74.0.3
+libboost-timer1.74-dev==1.74.0+ds1-21
+libboost-timer1.74.0==1.74.0+ds1-21
+libboost-tools-dev==1.74.0.3
+libboost-type-erasure-dev==1.74.0.3
+libboost-type-erasure1.74-dev==1.74.0+ds1-21
+libboost-type-erasure1.74.0==1.74.0+ds1-21
+libboost-wave-dev==1.74.0.3
+libboost-wave1.74-dev==1.74.0+ds1-21
+libboost-wave1.74.0==1.74.0+ds1-21
+libboost1.74-dev==1.74.0+ds1-21
+libboost1.74-tools-dev==1.74.0+ds1-21
+libbpf-dev==1:1.1.0-1
+libc-ares-dev==1.18.1-3
+libc-ares2==1.18.1-3
+libc-dev-bin==2.36-9+deb12u7
+libc6-dev==2.36-9+deb12u7
 libcbor0.8==0.8.0-2+b1
+libcc1-0==12.2.0-14
+libclang-common-14-dev==1:14.0.6-12
+libclang-cpp14==1:14.0.6-12
+libclang1-14==1:14.0.6-12
+libctf-nobfd0==2.40-2
+libctf0==2.40-2
 libcurl3-gnutls==7.88.1-10+deb12u5
+libcurl3-nss==7.88.1-10+deb12u5
+libdbus-1-dev==1.14.10-1~deb12u1
 libdebuginfod-common==0.188-2.1
 libdebuginfod1==0.188-2.1
+libdouble-conversion3==3.2.1-1
 libdw1==0.188-2.1
 libedit2==3.1-20221030-2
+libelf-dev==0.188-2.1
+libevent-2.1-7==2.1.12-stable-8
+libevent-core-2.1-7==2.1.12-stable-8
+libevent-dev==2.1.12-stable-8
+libevent-extra-2.1-7==2.1.12-stable-8
+libevent-openssl-2.1-7==2.1.12-stable-8
+libevent-pthreads-2.1-7==2.1.12-stable-8
+libexpat1-dev==2.5.0-1
+libfabric1==1.17.0-3
 libfido2-1==1.12.0-2+b1
+libfl-dev==2.6.4-8.2
+libfl2==2.6.4-8.2
+libgc-dev==1:8.2.2-3
+libgc1==1:8.2.2-3
+libgcc-12-dev==12.2.0-14
+libgfortran-12-dev==12.2.0-14
+libgfortran5==12.2.0-14
 libglib2.0-0==2.74.6-2+deb12u2
+libgmp-dev==2:6.2.1+dfsg1-1.1
+libgmpxx4ldbl==2:6.2.1+dfsg1-1.1
+libgomp1==12.2.0-14
 libgpm2==1.20.7-10+b1
+libgprofng0==2.40-2
+libgrpc++-dev==1.51.1-3+b1
+libgrpc++1.51==1.51.1-3+b1
+libgrpc-dev==1.51.1-3+b1
+libgrpc29==1.51.1-3+b1
+libhwloc-dev==2.9.0-1
+libhwloc-plugins==2.9.0-1
+libhwloc15==2.9.0-1
+libibverbs-dev==44.0-2
+libibverbs1==44.0-2
+libicu-dev==72.1-3
 libicu72==72.1-3
 libipt2==2.0.5-1
+libisl23==0.25-1.1
+libitm1==12.2.0-14
+libjs-jquery-ui==1.13.2+dfsg-1
+libjs-sphinxdoc==5.3.0-4
+libjs-underscore==1.13.4~dfsg+~1.11.4-3
+libllvm14==1:14.0.6-12
+liblsan0==12.2.0-14
+libltdl-dev==2.4.7-5
+libltdl7==2.4.7-5
+libmagic-mgc==1:5.44-3
+libmagic1==1:5.44-3
+libmpc3==1.3.1-1
 libmpfr6==4.2.0-1
+libmunge2==0.5.15-2
+libnanomsg-dev==1.1.5+dfsg-1.1+b1
+libnanomsg5==1.1.5+dfsg-1.1+b1
+libnl-3-dev==3.5.0-1
+libnl-route-3-dev==3.5.0-1
+libnsl-dev==1.3.0-2
+libnspr4==2:4.35-1
+libnss3==2:3.87.1-1
+libnuma-dev==2.0.16-1
+libnuma1==2.0.16-1
+libobjc-12-dev==12.2.0-14
+libobjc4==12.2.0-14
+libopenmpi-dev==4.1.4-3+b1
+libopenmpi3==4.1.4-3+b1
+libpcap-dev==1.10.3-1
+libpcap0.8==1.10.3-1
+libpcap0.8-dev==1.10.3-1
+libpciaccess0==0.17-2
+libpcre2-16-0==10.42-1
+libpfm4==4.13.0-1
+libpkgconf3==1.8.1-1
+libpmix-dev==4.2.2-1+deb12u1
+libpmix2==4.2.2-1+deb12u1
+libprotobuf-dev==3.21.12-3
+libprotobuf-lite32==3.21.12-3
+libprotobuf32==3.21.12-3
+libprotoc-dev==3.21.12-3
+libprotoc32==3.21.12-3
+libpsm-infinipath1==3.3+20.604758e7-6.2
+libpsm2-2==11.2.185-2
+libpython3-dev==3.11.2-1+b1
+libpython3.11-dev==3.11.2-6
+libqt5core5a==5.15.8+dfsg-11
+libqt5dbus5==5.15.8+dfsg-11
+libqt5network5==5.15.8+dfsg-11
+libquadmath0==12.2.0-14
+librdmacm1==44.0-2
+libre2-9==20220601+dfsg-1+b1
+libre2-dev==20220601+dfsg-1+b1
+libsai==1.0.0
 libsaimetadata==1.0.0
 libsaimetadata-dbgsym==1.0.0
 libsairedis==1.0.0
@@ -22,14 +233,71 @@ libsaivs==1.0.0
 libsaivs-dbgsym==1.0.0
 libsource-highlight-common==3.1.9-4.2
 libsource-highlight4v5==3.1.9-4.2+b3
+libssl-dev==3.0.11-1~deb12u2
+libstdc++-12-dev==12.2.0-14
 libswsscommon-dbgsym==1.0.0
+libthrift-0.17.0==0.17.0-2+b2
+libthrift-dev==0.17.0-2+b2
+libtirpc-dev==1.3.3+ds-1
+libtool==2.4.7-5
+libtsan2==12.2.0-14
+libubsan1==12.2.0-14
+libucx0==1.13.1-1
 libunwind8==1.6.2-3
+libx11-6==2:1.8.4-2+deb12u2
+libx11-data==2:1.8.4-2+deb12u2
+libxau6==1:1.0.9-1
+libxcb1==1.15-1
+libxdmcp6==1:1.1.2-3
+libxext6==2:1.3.4-1+b1
+libxml2==2.9.14+dfsg-1.3~deb12u1
+libxnvctrl0==525.85.05-3~deb12u1
+libz3-4==4.8.12-3.1
+linux-libc-dev==6.1.90-1
+llvm==1:14.0-55.7~deb12u1
+llvm-14==1:14.0.6-12
+llvm-14-linker-tools==1:14.0.6-12
+llvm-14-runtime==1:14.0.6-12
+llvm-runtime==1:14.0-55.7~deb12u1
+m4==1.4.19-3
+mpi-default-bin==1.14
+mpi-default-dev==1.14
+netbase==6.4
+nss-plugin-pem==1.0.8+1-1
+ocl-icd-libopencl1==2.3.1-1
+openmpi-bin==4.1.4-3+b1
+openmpi-common==4.1.4-3
 openssh-client==1:9.2p1-2+deb12u2
+p4lang-bmv2==1.15.0-7
+p4lang-p4c==1.2.4.2-2
+p4lang-pi==0.1.0-15
+pkg-config==1.8.1-1
+pkgconf==1.8.1-1
+pkgconf-bin==1.8.1-1
+protobuf-compiler==3.21.12-3
+protobuf-compiler-grpc==1.51.1-3+b1
+python3-dev==3.11.2-1+b1
+python3-grpcio==1.51.1-3+b1
+python3-ply==3.11-5
+python3-protobuf==3.21.12-3
+python3-psutil==5.9.4-1+b1
+python3-pyroute2==0.7.2-2
+python3-scapy==2.5.0+dfsg-2
+python3-six==1.16.0-4
+python3-thrift==0.17.0-2+b2
+python3.11-dev==3.11.2-6
+rpcsvc-proto==1.4.3-1
 sensible-utils==0.0.17+nmu1
+sgml-base==1.31
+shared-mime-info==2.2-1
 sshpass==1.09-1+b1
 strace==6.1-0.1
 syncd-vs==1.0.0
 syncd-vs-dbgsym==1.0.0
+tcpdump==4.99.3-1
+thrift-compiler==0.17.0-2+b2
 ucf==3.0043+nmu1
 vim==2:9.0.1378-2
 vim-runtime==2:9.0.1378-2
+xml-core==0.18+nmu1
+zlib1g-dev==1:1.2.13.dfsg-1
diff --git a/files/build/versions/dockers/docker-syncd-vs/versions-py3 b/files/build/versions/dockers/docker-syncd-vs/versions-py3
new file mode 100644
index 000000000..ed1879443
--- /dev/null
+++ b/files/build/versions/dockers/docker-syncd-vs/versions-py3
@@ -0,0 +1,7 @@
+grpcio==1.51.1
+ply==3.11
+protobuf==4.21.12
+psutil==5.9.4
+pyroute2==0.7.2
+scapy==2.5.0
+thrift==0.17.0
diff --git a/files/build/versions/dockers/sonic-slave-bookworm/versions-deb-bookworm b/files/build/versions/dockers/sonic-slave-bookworm/versions-deb-bookworm
index af573272f..7b30e7e95 100644
--- a/files/build/versions/dockers/sonic-slave-bookworm/versions-deb-bookworm
+++ b/files/build/versions/dockers/sonic-slave-bookworm/versions-deb-bookworm
@@ -110,7 +110,7 @@ docbook-xml==4.5-12
 docker-buildx-plugin==0.10.5-1~debian.12~bookworm
 docker-ce==5:24.0.2-1~debian.12~bookworm
 docker-ce-cli==5:24.0.2-1~debian.12~bookworm
-docker-ce-rootless-extras==5:26.1.2-1~debian.12~bookworm
+docker-ce-rootless-extras==5:26.1.3-1~debian.12~bookworm
 docker-compose-plugin==2.18.1-1~debian.12~bookworm
 docutils-common==0.19+dfsg-6
 dosfstools==4.2-1
@@ -143,6 +143,7 @@ fonts-font-awesome==5.0.10+really4.7.0~dfsg-4.1
 fonts-lato==2.0-2.1
 fonts-liberation2==2.1.5-1
 fonts-lmodern==2.005-1
+fonts-lyx==2.3.7-1
 fonts-noto-mono==20201225-1
 fonts-texgyre==20180621-6
 fonts-texgyre-math==20180621-6
@@ -164,7 +165,9 @@ gem2deb==2.1
 gem2deb-test-runner==2.1
 gettext==0.21-12
 gettext-base==0.21-12
-ghostscript==10.0.0~dfsg-11+deb12u3
+gfortran==4:12.2.0-3
+gfortran-12==12.2.0-14
+ghostscript==10.0.0~dfsg-11+deb12u4
 gir1.2-atk-1.0==2.46.0-5
 gir1.2-atspi-2.0==2.46.0-5
 gir1.2-freedesktop==1.74.0-3
@@ -233,7 +236,10 @@ intltool-debian==0.35.0+20060710.6
 iproute2==6.1.0-3
 iptables==1.8.9-2
 ipxe-qemu==1.0.0+git-20190125.36a4c85-5.1
+ipython3==8.5.0-4
 iso-codes==4.15.0-1
+isympy-common==1.11.1-1
+isympy3==1.11.1-1
 j2cli==0.3.12b-4
 java-common==0.74
 java-wrappers==0.4
@@ -333,6 +339,7 @@ libbit-vector-perl==7.4-2+b1
 libblas3==3.11.0-2
 libblkid-dev==2.38.1-5+deb12u1
 libbluray2==1:1.3.4-1
+libboost-all-dev==1.74.0.3
 libboost-atomic-dev==1.74.0.3
 libboost-atomic1.74-dev==1.74.0+ds1-21
 libboost-atomic1.74.0==1.74.0+ds1-21
@@ -355,37 +362,83 @@ libboost-date-time-dev==1.74.0.3
 libboost-date-time1.74-dev==1.74.0+ds1-21
 libboost-date-time1.74.0==1.74.0+ds1-21
 libboost-dev==1.74.0.3
+libboost-exception-dev==1.74.0.3
+libboost-exception1.74-dev==1.74.0+ds1-21
 libboost-fiber-dev==1.74.0.3
 libboost-fiber1.74-dev==1.74.0+ds1-21
 libboost-fiber1.74.0==1.74.0+ds1-21
 libboost-filesystem-dev==1.74.0.3
 libboost-filesystem1.74-dev==1.74.0+ds1-21
 libboost-filesystem1.74.0==1.74.0+ds1-21
+libboost-graph-dev==1.74.0.3
 libboost-graph-parallel-dev==1.74.0.3
 libboost-graph-parallel1.74-dev==1.74.0+ds1-21
 libboost-graph-parallel1.74.0==1.74.0+ds1-21
+libboost-graph1.74-dev==1.74.0+ds1-21
+libboost-graph1.74.0==1.74.0+ds1-21
+libboost-iostreams-dev==1.74.0.3
+libboost-iostreams1.74-dev==1.74.0+ds1-21
 libboost-iostreams1.74.0==1.74.0+ds1-21
+libboost-locale-dev==1.74.0.3
+libboost-locale1.74-dev==1.74.0+ds1-21
+libboost-locale1.74.0==1.74.0+ds1-21
 libboost-log-dev==1.74.0.3
 libboost-log1.74-dev==1.74.0+ds1-21
 libboost-log1.74.0==1.74.0+ds1-21
+libboost-math-dev==1.74.0.3
+libboost-math1.74-dev==1.74.0+ds1-21
+libboost-math1.74.0==1.74.0+ds1-21
+libboost-mpi-dev==1.74.0.3
+libboost-mpi-python-dev==1.74.0.3
+libboost-mpi-python1.74-dev==1.74.0+ds1-21
+libboost-mpi-python1.74.0==1.74.0+ds1-21
+libboost-mpi1.74-dev==1.74.0+ds1-21
 libboost-mpi1.74.0==1.74.0+ds1-21
+libboost-nowide-dev==1.74.0.3
+libboost-nowide1.74-dev==1.74.0+ds1-21
+libboost-nowide1.74.0==1.74.0+ds1-21
+libboost-numpy-dev==1.74.0.3
+libboost-numpy1.74-dev==1.74.0+ds1-21
+libboost-numpy1.74.0==1.74.0+ds1-21
 libboost-program-options-dev==1.74.0.3
 libboost-program-options1.74-dev==1.74.0+ds1-21
 libboost-program-options1.74.0==1.74.0+ds1-21
+libboost-python-dev==1.74.0.3
+libboost-python1.74-dev==1.74.0+ds1-21
+libboost-python1.74.0==1.74.0+ds1-21
+libboost-random-dev==1.74.0.3
+libboost-random1.74-dev==1.74.0+ds1-21
+libboost-random1.74.0==1.74.0+ds1-21
 libboost-regex-dev==1.74.0.3
 libboost-regex1.74-dev==1.74.0+ds1-21
 libboost-regex1.74.0==1.74.0+ds1-21
+libboost-serialization-dev==1.74.0.3
 libboost-serialization1.74-dev==1.74.0+ds1-21
 libboost-serialization1.74.0==1.74.0+ds1-21
+libboost-stacktrace-dev==1.74.0.3
+libboost-stacktrace1.74-dev==1.74.0+ds1-21
+libboost-stacktrace1.74.0==1.74.0+ds1-21
 libboost-system-dev==1.74.0.3
 libboost-system1.74-dev==1.74.0+ds1-21
 libboost-system1.74.0==1.74.0+ds1-21
+libboost-test-dev==1.74.0.3
 libboost-test1.74-dev==1.74.0+ds1-21
 libboost-test1.74.0==1.74.0+ds1-21
 libboost-thread-dev==1.74.0.3
 libboost-thread1.74-dev==1.74.0+ds1-21
 libboost-thread1.74.0==1.74.0+ds1-21
+libboost-timer-dev==1.74.0.3
+libboost-timer1.74-dev==1.74.0+ds1-21
+libboost-timer1.74.0==1.74.0+ds1-21
+libboost-tools-dev==1.74.0.3
+libboost-type-erasure-dev==1.74.0.3
+libboost-type-erasure1.74-dev==1.74.0+ds1-21
+libboost-type-erasure1.74.0==1.74.0+ds1-21
+libboost-wave-dev==1.74.0.3
+libboost-wave1.74-dev==1.74.0+ds1-21
+libboost-wave1.74.0==1.74.0+ds1-21
 libboost1.74-dev==1.74.0+ds1-21
+libboost1.74-tools-dev==1.74.0+ds1-21
 libbpf-dev==1:1.1.0-1
 libbpf1==1:1.1.0-1
 libbrlapi0.8==6.5-7+deb12u1
@@ -412,6 +465,7 @@ libc6-i386==2.36-9+deb12u7
 libc6-x32==2.36-9+deb12u7
 libcaca0==0.99.beta20-3
 libcacard0==1:2.8.0-3
+libcaf-openmpi-3==2.10.1-1+b1
 libcairo-gobject2==1.16.0-7
 libcairo-script-interpreter2==1.16.0-7
 libcairo2==1.16.0-7
@@ -452,6 +506,8 @@ libclass-xsaccessor-perl==1.19-4+b1
 libclone-perl==0.46-1
 libcmocka-dev==1.1.5-2.1
 libcmocka0==1.1.5-2.1
+libcoarrays-dev==2.10.1-1+b1
+libcoarrays-openmpi-dev==2.10.1-1+b1
 libcodec2-1.0==1.0.5-1
 libcolord2==1.4.6-2.2
 libcommon-sense-perl==3.75-3
@@ -639,6 +695,7 @@ libgail-common==2.24.33-2
 libgail18==2.24.33-2
 libgav1-1==0.18.0-1+b1
 libgbm1==22.3.6-1+deb12u1
+libgc-dev==1:8.2.2-3
 libgc1==1:8.2.2-3
 libgcc-12-dev==12.2.0-14
 libgcc-12-dev-armhf-cross==12.2.0-14cross1
@@ -655,6 +712,7 @@ libgeronimo-annotation-1.3-spec-java==1.3-1
 libgeronimo-interceptor-3.0-spec-java==1.0.1-4
 libgetopt-long-descriptive-perl==0.111-1
 libgfapi0==10.3-5
+libgfortran-12-dev==12.2.0-14
 libgfortran5==12.2.0-14
 libgfrpc0==10.3-5
 libgfxdr0==10.3-5
@@ -698,9 +756,13 @@ libgpm2==1.20.7-10+b1
 libgprofng0==2.40-2
 libgraphite2-3==1.3.14-1
 libgraphite2-dev==1.3.14-1
-libgs-common==10.0.0~dfsg-11+deb12u3
-libgs10==10.0.0~dfsg-11+deb12u3
-libgs10-common==10.0.0~dfsg-11+deb12u3
+libgrpc++-dev==1.51.1-3+b1
+libgrpc++1.51==1.51.1-3+b1
+libgrpc-dev==1.51.1-3+b1
+libgrpc29==1.51.1-3+b1
+libgs-common==10.0.0~dfsg-11+deb12u4
+libgs10==10.0.0~dfsg-11+deb12u4
+libgs10-common==10.0.0~dfsg-11+deb12u4
 libgsl27==2.7.1+dfsg-5
 libgslcblas0==2.7.1+dfsg-5
 libgsm1==1.0.22-1
@@ -753,10 +815,12 @@ libhttpclient-java==4.5.14-1
 libhttpcore-java==4.4.16-1
 libhunspell-1.7-0==1.7.1-1
 libhwasan0==12.2.0-14
+libhwloc-dev==2.9.0-1
 libhwloc-plugins==2.9.0-1
 libhwloc15==2.9.0-1
 libhwy1==1.0.3-3+deb12u1
 libiberty-dev==20230104-1
+libibverbs-dev==44.0-2
 libibverbs1==44.0-2
 libice-dev==2:1.0.10-1
 libice6==2:1.0.10-1
@@ -822,6 +886,7 @@ libjs-jquery-isonscreen==1.2.0-1.1
 libjs-jquery-metadata==12-4
 libjs-jquery-tablesorter==1:2.31.3+dfsg1-3
 libjs-jquery-throttle-debounce==1.1+dfsg.1-2
+libjs-jquery-ui==1.13.2+dfsg-1
 libjs-popper.js==1.16.1+ds-6
 libjs-sizzle==2.3.6+ds+~2.3.3-2
 libjs-sphinxdoc==5.3.0-4
@@ -855,6 +920,7 @@ libkrb5support0==1.20.1-2+deb12u1
 libksba8==1.6.3-2
 liblab-gamut1==2.42.2-7+b3
 liblapack3==3.11.0-2
+liblbfgsb0==3.0+dfsg.4-1
 liblcms2-2==2.14-2
 libldap-2.5-0==2.5.13+dfsg-5
 libldap-common==2.5.13+dfsg-5
@@ -979,7 +1045,9 @@ libnftnl-dev==1.2.4-2
 libnftnl11==1.2.4-2
 libnghttp2-14==1.52.0-1+deb12u1
 libnl-3-200==3.7.0-0.2+b1
+libnl-3-dev==3.7.0-0.2+b1
 libnl-route-3-200==3.7.0-0.2+b1
+libnl-route-3-dev==3.7.0-0.2+b1
 libnode108==18.19.0+dfsg-6~deb12u1
 libnorm-dev==1.5.9+dfsg-2
 libnorm1==1.5.9+dfsg-2
@@ -998,12 +1066,17 @@ libobject-pad-perl==0.78-1
 libogg0==1.3.5-3
 libole-storage-lite-perl==0.20-2
 libonig5==6.9.8-1
+libopenblas-dev==0.3.21+ds-4
+libopenblas-pthread-dev==0.3.21+ds-4
+libopenblas0==0.3.21+ds-4
+libopenblas0-pthread==0.3.21+ds-4
 libopencsd-dev==1.3.3-1
 libopencsd1==1.3.3-1
 libopenexr-3-1-30==3.1.5-5
 libopengl-dev==1.6.0-1
 libopengl0==1.6.0-1
 libopenjp2-7==2.5.0-2
+libopenmpi-dev==4.1.4-3+b1
 libopenmpi3==4.1.4-3+b1
 libopenmpt0==0.6.9-1
 libopentest4j-java==1.2.0-4
@@ -1087,6 +1160,7 @@ libplexus-sec-dispatcher-java==2.0-3
 libplexus-utils2-java==3.4.2-1
 libplexus-velocity-java==1.2-3.1
 libpmem1==1.12.1-2
+libpmix-dev==4.2.2-1+deb12u1
 libpmix2==4.2.2-1+deb12u1
 libpng-dev==1.6.39-2
 libpng-tools==1.6.39-2
@@ -1108,6 +1182,7 @@ libprotobuf-c1==1.4.1-1+b1
 libprotobuf-dev==3.21.12-3
 libprotobuf-lite32==3.21.12-3
 libprotobuf32==3.21.12-3
+libprotoc-dev==3.21.12-3
 libprotoc32==3.21.12-3
 libproxy1v5==0.4.18-1.2
 libpsl5==0.21.2-1
@@ -1128,6 +1203,7 @@ libpython3.11-minimal==3.11.2-6
 libpython3.11-stdlib==3.11.2-6
 libqdox-java==1.12.1-3
 libqdox2-java==2.0.3-1
+libqhull-r8.0==2020.2-5
 libqt5concurrent5==5.15.8+dfsg-11
 libqt5core5a==5.15.8+dfsg-11
 libqt5dbus5==5.15.8+dfsg-11
@@ -1157,6 +1233,7 @@ librbd1==16.2.11+ds-2
 librdmacm1==44.0-2
 libre-engine-re2-perl==0.17+ds-1
 libre2-9==20220601+dfsg-1+b1
+libre2-dev==20220601+dfsg-1+b1
 libreadline-dev==8.2-1.3
 libreadline8==8.2-1.3
 libreadonly-perl==2.050-3
@@ -1495,6 +1572,7 @@ libxrender1==1:0.9.10-1.1
 libxs-parse-keyword-perl==0.33-1
 libxs-parse-sublike-perl==0.16-1+b2
 libxshmfence1==1.3-1
+libxsimd-dev==8.1.0-7
 libxslt1-dev==1.1.35-1
 libxslt1.1==1.1.35-1
 libxss1==1:1.2.3-1
@@ -1537,11 +1615,13 @@ linux-headers-arm64==6.1.90-1
 linux-kbuild-6.1==6.1.90-1
 linux-libc-dev==6.1.90-1
 linuxdoc-tools==0.9.82-1
+llvm==1:14.0-55.7~deb12u1
 llvm-14==1:14.0.6-12
 llvm-14-dev==1:14.0.6-12
 llvm-14-linker-tools==1:14.0.6-12
 llvm-14-runtime==1:14.0.6-12
 llvm-14-tools==1:14.0.6-12
+llvm-runtime==1:14.0-55.7~deb12u1
 lmodern==2.005-1
 locales==2.36-9+deb12u7
 logrotate==3.21.0-1
@@ -1574,9 +1654,12 @@ meson==1.0.1-5
 mime-support==3.66
 module-assistant==0.11.11
 mokutil==0.6.0-2
+mpi-default-bin==1.14
+mpi-default-dev==1.14
 mupdf-tools==1.21.1+ds2-1+b4
 mysql-common==5.8+1.1.0
 ncurses-term==6.4-4
+net-tools==2.10-0.1
 netbase==6.4
 netpbm==2:11.01.00-2
 nftables==1.0.6-2+deb12u2
@@ -1597,6 +1680,8 @@ openjdk-17-jdk==17.0.11+9-1~deb12u1
 openjdk-17-jdk-headless==17.0.11+9-1~deb12u1
 openjdk-17-jre==17.0.11+9-1~deb12u1
 openjdk-17-jre-headless==17.0.11+9-1~deb12u1
+openmpi-bin==4.1.4-3+b1
+openmpi-common==4.1.4-3
 opensp==1.5.2-13+b2
 openssh-client==1:9.2p1-2+deb12u2
 openssh-server==1:9.2p1-2+deb12u2
@@ -1676,6 +1761,7 @@ pristine-tar==1.50
 procmail==3.22-27
 procps==2:4.0.2-3
 protobuf-compiler==3.21.12-3
+protobuf-compiler-grpc==1.51.1-3+b1
 psmisc==23.6-1
 psutils==1.17.dfsg-4
 publicsuffix==20230209.2326-1
@@ -1683,18 +1769,24 @@ pylint==2.16.2-2
 python-apt-common==2.6.0
 python-babel-localedata==2.10.3-1
 python-is-python3==3.11.1-3
+python-matplotlib-data==3.6.3-1
 python3==3.11.2-1+b1
 python3-alabaster==0.7.12-1
 python3-all==3.11.2-1+b1
 python3-all-dbg==3.11.2-1+b1
 python3-all-dev==3.11.2-1+b1
+python3-appdirs==1.4.4-3
 python3-apt==2.6.0
 python3-astroid==2.14.2-1
+python3-asttokens==2.2.1-1
 python3-attr==22.2.0-1
 python3-automat==22.10.0-1
 python3-babel==2.10.3-1
+python3-backcall==0.2.0-4
 python3-bcrypt==3.2.2-1
+python3-beniget==0.4.1-3
 python3-blinker==1.5-1
+python3-brotli==1.0.9-2+b6
 python3-bs4==4.11.2-2
 python3-build==0.9.0-1
 python3-certifi==2022.9.24-1
@@ -1704,20 +1796,28 @@ python3-charset-normalizer==3.0.1-2
 python3-click==8.1.3-2
 python3-colorama==0.4.6-2
 python3-constantly==15.1.0-4
+python3-contourpy==1.0.7-1+b1
 python3-coverage==6.5.0+dfsg1-2+b1
 python3-cryptography==38.0.4-3
 python3-cssselect==1.2.0-2
+python3-cycler==0.11.0-1
 python3-dateutil==2.8.2-2
 python3-dbg==3.11.2-1+b1
 python3-dbus==1.3.2-4+b1
 python3-debian==0.1.49
+python3-decorator==5.1.1-3
 python3-dev==3.11.2-1+b1
 python3-dill==0.3.6-1
 python3-distro==1.8.0-1
 python3-distutils==3.11.2-3
 python3-docutils==0.19+dfsg-6
+python3-executing==1.2.0-2
+python3-fonttools==4.38.0-1+b1
+python3-fs==2.4.16-2
+python3-gast==0.5.2-2
 python3-gi==3.42.2-3+b1
 python3-gpg==1.18.0-3+b1
+python3-grpcio==1.51.1-3+b1
 python3-hamcrest==2.0.3-2
 python3-html5lib==1.1-3
 python3-httplib2==0.20.4-3
@@ -1727,23 +1827,30 @@ python3-imagesize==1.4.1-1
 python3-importlib-metadata==4.12.0-1
 python3-incremental==21.3.0-2
 python3-iniconfig==1.1.1-2
+python3-ipython==8.5.0-4
 python3-isort==5.6.4-1
+python3-jedi==0.18.2-1
 python3-jinja2==3.1.2-1
 python3-jwt==2.6.0-1
+python3-kiwisolver==1.4.4-1+b1
 python3-lazr.restfulclient==0.14.5-1
 python3-lazr.uri==1.0.6-3
 python3-lazy-object-proxy==1.9.0-1+b1
 python3-lib2to3==3.11.2-3
 python3-logilab-common==1.9.8-1
 python3-lxml==4.9.2-1+b1
+python3-lz4==4.0.2+dfsg-1+b2
 python3-m2crypto==0.38.0-4+b1
 python3-magic==2:0.4.26-3
 python3-mako==1.2.4+ds-1
 python3-markdown==3.4.1-2
 python3-markupsafe==2.1.2-1+b1
+python3-matplotlib==3.6.3-1+b1
+python3-matplotlib-inline==0.1.6-2
 python3-mccabe==0.7.0-1
 python3-minimal==3.11.2-1+b1
 python3-more-itertools==8.10.0-2
+python3-mpmath==1.2.1-2
 python3-mypy-extensions==0.4.3-4
 python3-nose==1.3.7-9
 python3-numpy==1:1.24.2-1
@@ -1753,24 +1860,36 @@ python3-openssl==23.0.0-1
 python3-packaging==23.0-1
 python3-parameterized==0.8.1-6
 python3-parse==1.19.0-0.2
+python3-parso==0.8.3-1
 python3-pep517==0.13.0-2
 python3-pexpect==4.8.0-4
+python3-pickleshare==0.7.5-5
 python3-pil==9.4.0-1.1+b1
+python3-pil.imagetk==9.4.0-1.1+b1
 python3-pip-whl==23.0.1+dfsg-1
 python3-pkg-resources==66.1.1-1
 python3-platformdirs==2.6.0-1
 python3-pluggy==1.0.0+repack-1
+python3-ply==3.11-5
+python3-prompt-toolkit==3.0.36-2
+python3-protobuf==3.21.12-3
+python3-psutil==5.9.4-1+b1
 python3-ptyprocess==0.7.0-5
+python3-pure-eval==0.2.2-1
 python3-py==1.11.0-1
 python3-pyasn1==0.4.8-3
 python3-pyasn1-modules==0.2.8-1
 python3-pyelftools==0.29-1
 python3-pygments==2.14.0+dfsg-1
 python3-pyparsing==3.0.9-1
+python3-pyroute2==0.7.2-2
 python3-pytest==7.2.1-2
 python3-pytest-cov==4.0.0-1
+python3-pythran==0.11.0+ds-7
 python3-requests==2.28.1+dfsg-1
 python3-roman==3.3-3
+python3-scapy==2.5.0+dfsg-2
+python3-scipy==1.10.1-2
 python3-scour==0.38.2-2
 python3-service-identity==18.1.0-8
 python3-setuptools==66.1.1-1
@@ -1781,19 +1900,24 @@ python3-software-properties==0.99.30-4
 python3-soupsieve==2.3.2-1
 python3-sphinx==5.3.0-4
 python3-sphinx-rtd-theme==1.2.0+dfsg-1
+python3-stack-data==0.6.2-3
 python3-stdeb==0.10.0-2
+python3-sympy==1.11.1-1
 python3-thrift==0.17.0-2+b2
 python3-tk==3.11.2-3
 python3-toml==0.10.2-1
 python3-tomli==2.0.1-2
 python3-tomlkit==0.11.7-1
+python3-traitlets==5.5.0-1
 python3-twisted==22.4.0-4
 python3-typing-extensions==4.4.0-1
 python3-tz==2022.7.1-4
+python3-ufolib2==0.14.0+dfsg1-1
 python3-unidiff==0.7.3-1
 python3-urllib3==1.26.12-1
 python3-venv==3.11.2-1+b1
 python3-wadllib==1.3.6-4
+python3-wcwidth==0.2.5+dfsg1-1.1
 python3-webencodings==0.5.1-5
 python3-wheel==0.38.4-2
 python3-wrapt==1.14.1-2+b2
@@ -1873,6 +1997,7 @@ systemd-timesyncd==252.22-1~deb12u1
 t1utils==1.41-4
 tcl==8.6.13
 tcl8.6==8.6.13+dfsg-2
+tcpdump==4.99.3-1
 teckit==2.5.11+ds1-1+b1
 telnet==0.17+2.4-2+deb12u1
 tex-common==6.18
@@ -1897,6 +2022,7 @@ tk8.6==8.6.13-2
 tk8.6-blt2.5==2.5.3+dfsg-4.1
 ucf==3.0043+nmu1
 udev==252.22-1~deb12u1
+unicode-data==15.0.0-1
 unzip==6.0-28
 usb.ids==2024.01.20-0+deb12u1
 uuid-dev==2.38.1-5+deb12u1
diff --git a/files/build/versions/dockers/sonic-slave-bookworm/versions-py3 b/files/build/versions/dockers/sonic-slave-bookworm/versions-py3
index 0f751c588..97db75c96 100644
--- a/files/build/versions/dockers/sonic-slave-bookworm/versions-py3
+++ b/files/build/versions/dockers/sonic-slave-bookworm/versions-py3
@@ -1,13 +1,18 @@
 alabaster==0.7.12
+appdirs==1.4.4
 astroid==2.14.2
+asttokens==2.2.1
 async-timeout==4.0.3
 attrs==22.2.0
 automat==22.10.0
 babel==2.10.3
+backcall==0.2.0
 bcrypt==3.2.2
 beautifulsoup4==4.11.2
+beniget==0.4.1
 bitarray==2.9.2
 blinker==1.5
+brotli==1.0.9
 build==0.9.0
 certifi==2022.9.24
 chardet==5.1.0
@@ -15,18 +20,25 @@ charset-normalizer==3.0.1
 click==8.1.3
 colorama==0.4.6
 constantly==15.1.0
+contourpy==1.0.7
 coverage==6.5.0
 crc16==0.1.1
 cryptography==38.0.4
 cssselect==1.2.0
 ctypesgen==1.0.2
+cycler==0.11.0
 cython==0.29.32
 dbus-python==1.3.2
+decorator==5.1.1
 devscripts==2.23.4+deb12u1
 dill==0.3.6
 distro==1.8.0
 docutils==0.19
+executing==1.2.0
 fastentrypoints==0.12
+fonttools==4.38.0
+fs==2.4.16
+gast==0.5.2
 gbp==0.9.30
 gcovr==5.2
 gpg==1.18.0
@@ -40,24 +52,32 @@ imagesize==1.4.1
 importlib-metadata==4.12.0
 incremental==21.3.0
 iniconfig==1.1.1
+ipython==8.5.0
 isort==5.6.4
 j2cli==0.3.12b0
+jedi==0.18.2
 jinja2==3.1.2
+jsonpath-ng==1.6.1
+kiwisolver==0.0.0
 lazr.restfulclient==0.14.5
 lazr.uri==1.0.6
 lazy-object-proxy==1.9.0
 logilab-common==1.9.8
 lxml==4.9.2
+lz4==4.0.2+dfsg
 m2crypto==0.38.0
 mako==1.2.4.dev0
 markdown==3.4.1
 markupsafe==2.1.2
+matplotlib==3.6.3
+matplotlib-inline==0.1.6
 mccabe==0.7.0
 meson==1.0.1
 mmh3==2.5.1
 mock==5.1.0
 mockredispy==2.9.3
 more-itertools==8.10.0
+mpmath==0.0.0
 mypy-extensions==0.4.3
 nose==1.3.7
 numpy==1.24.2
@@ -66,14 +86,20 @@ olefile==0.46
 packaging==23.0
 parameterized==0.8.1
 parse==1.19.0
+parso==0.8.3
 pep517==0.13.0
 pexpect==4.8.0
+pickleshare==0.7.5
 pillow==10.0.0
 pip==24.0
 platformdirs==2.6.0
 pluggy==1.0.0+repack
-protobuf==4.25.3
+ply==3.11
+prompt-toolkit==3.0.36
+protobuf==4.21.12
+psutil==5.9.4
 ptyprocess==0.7.0
+pure-eval==0.0.0
 py==1.11.0
 pyang==2.4.0
 pyangbind==0.8.2
@@ -89,6 +115,7 @@ pylint==2.16.2
 pympler==1.0
 pyopenssl==23.0.0
 pyparsing==3.0.9
+pyroute2==0.7.2
 pytest==7.2.1
 pytest-cov==4.0.0
 pytest-runner==5.2
@@ -96,13 +123,16 @@ python-apt==2.6.0
 python-dateutil==2.8.2
 python-debian==0.1.49
 python-magic==0.4.26
+pythran==0.11.0
 pytz==2022.7.1
 pyxdg==0.28
 pyyaml==6.0
 redis==5.0.4
-regex==2024.5.10
+regex==2024.5.15
 requests==2.28.1
 roman==3.3
+scapy==2.5.0
+scipy==1.10.1
 scour==0.38.2
 service-identity==18.1.0
 setuptools==66.1.1
@@ -113,17 +143,22 @@ snowballstemmer==2.2.0
 soupsieve==2.3.2
 sphinx==5.3.0
 sphinx-rtd-theme==1.2.0
+stack-data==0.6.2
 stdeb==0.10.0
 stgit==0.19
+sympy==1.11.1
 thrift==0.17.0
 toml==0.10.2
 tomli==2.0.1
 tomlkit==0.11.7
+traitlets==5.5.0
 twisted==22.4.0
 typing_extensions==4.4.0
+ufolib2==0.14.0
 unidiff==0.7.3
 urllib3==1.26.12
 wadllib==1.3.6
+wcwidth==0.2.5
 webencodings==0.5.1
 wheel==0.38.4
 wrapt==1.14.1
diff --git a/files/build/versions/dockers/sonic-slave-bookworm/versions-py3-all-arm64 b/files/build/versions/dockers/sonic-slave-bookworm/versions-py3-all-arm64
new file mode 100644
index 000000000..9a6fae8cb
--- /dev/null
+++ b/files/build/versions/dockers/sonic-slave-bookworm/versions-py3-all-arm64
@@ -0,0 +1 @@
+protobuf==4.25.3
diff --git a/files/build/versions/dockers/sonic-slave-bookworm/versions-py3-all-armhf b/files/build/versions/dockers/sonic-slave-bookworm/versions-py3-all-armhf
new file mode 100644
index 000000000..9a6fae8cb
--- /dev/null
+++ b/files/build/versions/dockers/sonic-slave-bookworm/versions-py3-all-armhf
@@ -0,0 +1 @@
+protobuf==4.25.3
diff --git a/files/build/versions/dockers/sonic-slave-bullseye/versions-deb-bullseye b/files/build/versions/dockers/sonic-slave-bullseye/versions-deb-bullseye
index 527521bb3..7e60275d0 100644
--- a/files/build/versions/dockers/sonic-slave-bullseye/versions-deb-bullseye
+++ b/files/build/versions/dockers/sonic-slave-bullseye/versions-deb-bullseye
@@ -63,6 +63,7 @@ cpp-arm-linux-gnueabihf==4:10.2.1-1
 cppcheck==2.3-1
 cron==3.0pl1-137
 curl==7.74.0-1.3+deb11u11
+cython3==0.29.21-3+b1
 dblatex==0.3.12py3-1
 dblatex-doc==0.3.12py3-1
 dbus==1.12.28-0+deb11u1
@@ -105,7 +106,7 @@ docbook-xsl==1.79.2+dfsg-1
 docker-buildx-plugin==0.10.5-1~debian.11~bullseye
 docker-ce==5:24.0.2-1~debian.11~bullseye
 docker-ce-cli==5:24.0.2-1~debian.11~bullseye
-docker-ce-rootless-extras==5:26.1.2-1~debian.11~bullseye
+docker-ce-rootless-extras==5:26.1.3-1~debian.11~bullseye
 docker-compose-plugin==2.18.1-1~debian.11~bullseye
 docutils-common==0.16+dfsg-4
 dosfstools==4.2-1
@@ -163,7 +164,9 @@ gem2deb==1.4
 gem2deb-test-runner==1.4
 gettext==0.21-4
 gettext-base==0.21-4
-ghostscript==9.53.3~dfsg-7+deb11u6
+gfortran==4:10.2.1-1
+gfortran-10==10.2.1-6
+ghostscript==9.53.3~dfsg-7+deb11u7
 gir1.2-atk-1.0==2.36.0-2
 gir1.2-atspi-2.0==2.38.0-4+deb11u1
 gir1.2-freedesktop==1.66.1-1+b1
@@ -222,6 +225,7 @@ intltool-debian==0.35.0+20060710.5
 iproute2==5.10.0-4
 iptables==1.8.7-1
 ipxe-qemu==1.0.0+git-20190125.36a4c85-5.1
+ipython3==7.20.0-1+deb11u1
 iso-codes==4.6.0-1
 java-common==0.72
 java-wrappers==0.3
@@ -319,6 +323,7 @@ libbit-vector-perl==7.4-1+b7
 libblas3==3.9.0-3+deb11u1
 libblkid-dev==2.36.1-8+deb11u2
 libbluray2==1:1.2.1-4+deb11u2
+libboost-all-dev==1.74.0.3
 libboost-atomic-dev==1.74.0.3
 libboost-atomic1.74-dev==1.74.0-9
 libboost-atomic1.74.0==1.74.0-9
@@ -341,36 +346,83 @@ libboost-date-time-dev==1.74.0.3
 libboost-date-time1.74-dev==1.74.0-9
 libboost-date-time1.74.0==1.74.0-9
 libboost-dev==1.74.0.3
+libboost-exception-dev==1.74.0.3
+libboost-exception1.74-dev==1.74.0-9
 libboost-fiber-dev==1.74.0.3
 libboost-fiber1.74-dev==1.74.0-9
 libboost-fiber1.74.0==1.74.0-9
 libboost-filesystem-dev==1.74.0.3
 libboost-filesystem1.74-dev==1.74.0-9
 libboost-filesystem1.74.0==1.74.0-9
+libboost-graph-dev==1.74.0.3
 libboost-graph-parallel-dev==1.74.0.3
 libboost-graph-parallel1.74-dev==1.74.0-9
 libboost-graph-parallel1.74.0==1.74.0-9
+libboost-graph1.74-dev==1.74.0-9
+libboost-graph1.74.0==1.74.0-9
+libboost-iostreams-dev==1.74.0.3
+libboost-iostreams1.74-dev==1.74.0-9
+libboost-iostreams1.74.0==1.74.0-9
+libboost-locale-dev==1.74.0.3
+libboost-locale1.74-dev==1.74.0-9
+libboost-locale1.74.0==1.74.0-9
 libboost-log-dev==1.74.0.3
 libboost-log1.74-dev==1.74.0-9
 libboost-log1.74.0==1.74.0-9
+libboost-math-dev==1.74.0.3
+libboost-math1.74-dev==1.74.0-9
+libboost-math1.74.0==1.74.0-9
+libboost-mpi-dev==1.74.0.3
+libboost-mpi-python-dev==1.74.0.3
+libboost-mpi-python1.74-dev==1.74.0-9
+libboost-mpi-python1.74.0==1.74.0-9
+libboost-mpi1.74-dev==1.74.0-9
 libboost-mpi1.74.0==1.74.0-9
+libboost-nowide-dev==1.74.0.3
+libboost-nowide1.74-dev==1.74.0-9
+libboost-nowide1.74.0==1.74.0-9
+libboost-numpy-dev==1.74.0.3
+libboost-numpy1.74-dev==1.74.0-9
+libboost-numpy1.74.0==1.74.0-9
 libboost-program-options-dev==1.74.0.3
 libboost-program-options1.74-dev==1.74.0-9
 libboost-program-options1.74.0==1.74.0-9
+libboost-python-dev==1.74.0.3
+libboost-python1.74-dev==1.74.0-9
+libboost-python1.74.0==1.74.0-9
+libboost-random-dev==1.74.0.3
+libboost-random1.74-dev==1.74.0-9
+libboost-random1.74.0==1.74.0-9
 libboost-regex-dev==1.74.0.3
 libboost-regex1.74-dev==1.74.0-9
 libboost-regex1.74.0==1.74.0-9
+libboost-serialization-dev==1.74.0.3
 libboost-serialization1.74-dev==1.74.0-9
 libboost-serialization1.74.0==1.74.0-9
+libboost-stacktrace-dev==1.74.0.3
+libboost-stacktrace1.74-dev==1.74.0-9
+libboost-stacktrace1.74.0==1.74.0-9
 libboost-system-dev==1.74.0.3
 libboost-system1.74-dev==1.74.0-9
 libboost-system1.74.0==1.74.0-9
+libboost-test-dev==1.74.0.3
 libboost-test1.74-dev==1.74.0-9
 libboost-test1.74.0==1.74.0-9
 libboost-thread-dev==1.74.0.3
 libboost-thread1.74-dev==1.74.0-9
 libboost-thread1.74.0==1.74.0-9
+libboost-timer-dev==1.74.0.3
+libboost-timer1.74-dev==1.74.0-9
+libboost-timer1.74.0==1.74.0-9
+libboost-tools-dev==1.74.0.3
+libboost-type-erasure-dev==1.74.0.3
+libboost-type-erasure1.74-dev==1.74.0-9
+libboost-type-erasure1.74.0==1.74.0-9
+libboost-wave-dev==1.74.0.3
+libboost-wave1.74-dev==1.74.0-9
+libboost-wave1.74.0==1.74.0-9
 libboost1.74-dev==1.74.0-9
+libboost1.74-tools-dev==1.74.0-9
 libbpf-dev==1:0.3-2
 libbpf0==1:0.3-2
 libbrlapi0.8==6.3+dfsg-1+deb11u1
@@ -396,6 +448,7 @@ libc6-i386==2.31-13+deb11u10
 libc6-x32==2.31-13+deb11u10
 libcaca0==0.99.beta19-2.2
 libcacard0==1:2.8.0-3
+libcaf-openmpi-3==2.9.2-3
 libcairo-gobject2==1.16.0-5
 libcairo-script-interpreter2==1.16.0-5
 libcairo2==1.16.0-5
@@ -434,6 +487,8 @@ libclass-xsaccessor-perl==1.19-3+b7
 libclone-perl==0.45-1+b1
 libcmocka-dev==1.1.5-2
 libcmocka0==1.1.5-2
+libcoarrays-dev==2.9.2-3
+libcoarrays-openmpi-dev==2.9.2-3
 libcodec2-0.9==0.9.2-4
 libcolord2==1.4.5-3
 libcommon-sense-perl==3.75-1+b4
@@ -599,6 +654,7 @@ libfribidi-dev==1.0.8-2+deb11u1
 libfribidi0==1.0.8-2+deb11u1
 libfstrm0==0.6.0-1+b1
 libgbm1==20.3.5-1
+libgc-dev==1:8.0.4-3
 libgc1==1:8.0.4-3
 libgcc-10-dev==10.2.1-6
 libgcc-10-dev-armhf-cross==10.2.1-6cross1
@@ -614,6 +670,9 @@ libgdk-pixbuf2.0-common==2.42.2+dfsg-1+deb11u1
 libgeronimo-annotation-1.3-spec-java==1.3-1
 libgeronimo-interceptor-3.0-spec-java==1.0.1-4
 libgetopt-long-descriptive-perl==0.105-1
+libgflags-dev==2.2.2-2
+libgflags2.2==2.2.2-2
+libgfortran-10-dev==10.2.1-6
 libgfortran5==10.2.1-6
 libgif7==5.1.9-2
 libgirepository-1.0-1==1.66.1-1+b1
@@ -647,6 +706,7 @@ libgnutls-dane0==3.7.1-5+deb11u4
 libgomp1==10.2.1-6
 libgomp1-armhf-cross==10.2.1-6cross1
 libgoogle-gson-java==2.8.6-1+deb11u1
+libgoogle-perftools-dev==2.8.1-1
 libgoogle-perftools4==2.8.1-1
 libgpgme11==1.14.0-1+b2
 libgpm2==1.20.7-8
@@ -654,8 +714,8 @@ libgraphite2-3==1.3.14-1
 libgraphite2-dev==1.3.14-1
 libgrpc++1==1.30.2-3
 libgrpc10==1.30.2-3
-libgs9==9.53.3~dfsg-7+deb11u6
-libgs9-common==9.53.3~dfsg-7+deb11u6
+libgs9==9.53.3~dfsg-7+deb11u7
+libgs9-common==9.53.3~dfsg-7+deb11u7
 libgsasl7==1.10.0-4+deb11u1
 libgsm1==1.0.18-2
 libgssrpc4==1.18.3-6+deb11u4
@@ -697,9 +757,11 @@ libhttp-server-simple-perl==0.52-1.1
 libhttp-tiny-multipart-perl==0.08-1.1
 libhttpclient-java==4.5.13-2
 libhttpcore-java==4.4.14-1
+libhwloc-dev==2.4.1+dfsg-1
 libhwloc-plugins==2.4.1+dfsg-1
 libhwloc15==2.4.1+dfsg-1
 libiberty-dev==20210106-1
+libibverbs-dev==33.2-1
 libibverbs1==33.2-1
 libice-dev==2:1.0.10-1
 libice6==2:1.0.10-1
@@ -757,11 +819,15 @@ libjq1==1.6-2.1
 libjs-bootstrap4==4.5.2+dfsg1-8~deb11u1
 libjs-d3==3.5.17-4
 libjs-jquery==3.5.1+dfsg+~3.5.5-7
+libjs-jquery-easing==12-3
+libjs-jquery-fancybox==12-3
 libjs-jquery-hotkeys==0~20130707+git2d51e3a9+dfsg-2.1
 libjs-jquery-isonscreen==1.2.0-1.1
 libjs-jquery-metadata==12-3
+libjs-jquery-mousewheel==1:3.1.13-2
 libjs-jquery-tablesorter==1:2.31.3+dfsg1-1
 libjs-jquery-throttle-debounce==1.1+dfsg.1-1.1
+libjs-jquery-ui==1.12.1+dfsg-8+deb11u2
 libjs-popper.js==1.16.1+ds-3
 libjs-sizzle==2.3.5+ds-2
 libjs-sphinxdoc==3.4.3-2
@@ -911,7 +977,9 @@ libnftnl-dev==1.1.9-1
 libnftnl11==1.1.9-1
 libnghttp2-14==1.43.0-1+deb11u1
 libnl-3-200==3.4.0-1+b1
+libnl-3-dev==3.4.0-1+b1
 libnl-route-3-200==3.4.0-1+b1
+libnl-route-3-dev==3.4.0-1+b1
 libnorm-dev==1.5.9+dfsg-2
 libnorm1==1.5.9+dfsg-2
 libnpth0==1.6-3
@@ -937,6 +1005,7 @@ libopenexr25==2.5.4-2+deb11u1
 libopengl-dev==1.3.2-1
 libopengl0==1.3.2-1
 libopenjp2-7==2.4.0-3
+libopenmpi-dev==4.1.0-10
 libopenmpi3==4.1.0-10
 libopenmpt0==0.4.11-1
 libopentest4j-java==1.2.0-2
@@ -1018,6 +1087,7 @@ libplexus-sec-dispatcher-java==1.4-4
 libplexus-utils2-java==3.3.0-1
 libplexus-velocity-java==1.2-3.1
 libpmem1==1.10-2+deb11u1
+libpmix-dev==4.0.0-4.1+deb11u1
 libpmix2==4.0.0-4.1+deb11u1
 libpng-dev==1.6.37-3
 libpng-tools==1.6.37-3
@@ -1201,6 +1271,8 @@ libthai-data==0.1.28-3
 libthai-dev==0.1.28-3
 libthai0==0.1.28-3
 libtheora0==1.1.1+dfsg.1-15
+libthrift-0.13.0==0.13.0-6
+libthrift-dev==0.13.0-6
 libtie-ixhash-perl==1.23-2.1
 libtiff5==4.2.0-1+deb11u5
 libtime-duration-perl==1.21-1
@@ -1428,8 +1500,10 @@ linux-headers-arm64==5.10.216-1
 linux-kbuild-5.10==5.10.216-1
 linux-libc-dev==5.10.216-1
 linuxdoc-tools==0.9.82-1
+llvm==1:11.0-51+nmu5
 llvm-11==1:11.0.1-2
 llvm-11-runtime==1:11.0.1-2
+llvm-runtime==1:11.0-51+nmu5
 lmodern==2.004.5-6.1
 locales==2.31-13+deb11u10
 logrotate==3.18.0-2+deb11u2
@@ -1464,8 +1538,11 @@ mesa-vdpau-drivers==20.3.5-1
 mesa-vulkan-drivers==20.3.5-1
 mime-support==3.66
 module-assistant==0.11.10
+mpi-default-bin==1.13
+mpi-default-dev==1.13
 mysql-common==5.8+1.0.7
 ncurses-term==6.2+20201114-2+deb11u2
+net-tools==1.60+git20181103.0eebece-1
 netbase==6.3
 netpbm==2:10.0-15.4
 nftables==0.9.8-3.1+deb11u2
@@ -1478,6 +1555,8 @@ openjdk-11-jdk==11.0.23+9-1~deb11u1
 openjdk-11-jdk-headless==11.0.23+9-1~deb11u1
 openjdk-11-jre==11.0.23+9-1~deb11u1
 openjdk-11-jre-headless==11.0.23+9-1~deb11u1
+openmpi-bin==4.1.0-10
+openmpi-common==4.1.0-10
 opensp==1.5.2-13+b2
 openssh-client==1:8.4p1-5+deb11u3
 openssh-server==1:8.4p1-5+deb11u3
@@ -1581,6 +1660,7 @@ python3-astroid==2.5.1-1
 python3-attr==20.3.0-1
 python3-automat==20.2.0-1
 python3-babel==2.8.0+dfsg.1-7
+python3-backcall==0.2.0-1
 python3-bcrypt==3.1.7-4
 python3-bs4==4.9.3-1
 python3-certifi==2020.6.20-1
@@ -1596,6 +1676,7 @@ python3-dateutil==2.8.1-6
 python3-dbg==3.9.2-3
 python3-dbus==1.2.16-5
 python3-debian==0.1.39
+python3-decorator==4.4.2-2
 python3-dev==3.9.2-3
 python3-distro-info==1.0+deb11u1
 python3-distutils==3.9.2-1
@@ -1611,7 +1692,10 @@ python3-importlib-metadata==1.6.0-2
 python3-incremental==17.5.0-1
 python3-iniconfig==1.1.1-1
 python3-ipaddr==2.2.0-4
+python3-ipython==7.20.0-1+deb11u1
+python3-ipython-genutils==0.2.0-4
 python3-isort==5.6.4-1
+python3-jedi==0.18.0-1
 python3-jinja2==2.11.3-1
 python3-lazy-object-proxy==1.5.2-1
 python3-lib2to3==3.9.2-1
@@ -1630,19 +1714,28 @@ python3-olefile==0.46-3
 python3-openssl==20.0.1-1
 python3-packaging==20.9-2
 python3-parse==1.6.6-0.2
+python3-parso==0.8.1-1
+python3-pexpect==4.8.0-2
+python3-pickleshare==0.7.5-3
 python3-pil==8.1.2+dfsg-0.3+deb11u1
 python3-pkg-resources==52.0.0-4
 python3-pluggy==0.13.0-6
+python3-ply==3.11-4
+python3-prompt-toolkit==3.0.14-1
+python3-psutil==5.8.0-1
+python3-ptyprocess==0.7.0-1
 python3-py==1.10.0-1
 python3-pyasn1==0.4.8-1
 python3-pyasn1-modules==0.2.1-1
 python3-pycurl==7.43.0.6-5
 python3-pygments==2.7.1+dfsg-2.1
 python3-pyparsing==2.4.7-1
+python3-pyroute2==0.5.14-2
 python3-pytest==6.0.2-2
 python3-pytest-cov==2.10.1-1
 python3-requests==2.25.1+dfsg-2
 python3-roman==2.0.0-5
+python3-scapy==2.4.4-4
 python3-service-identity==18.1.0-6
 python3-setuptools==52.0.0-4
 python3-six==1.16.0-2
@@ -1652,8 +1745,10 @@ python3-soupsieve==2.2.1-1
 python3-sphinx==3.4.3-2
 python3-sphinx-rtd-theme==0.5.1+dfsg-1
 python3-stdeb==0.10.0-1
+python3-thrift==0.13.0-6
 python3-tk==3.9.2-1
 python3-toml==0.10.1-1
+python3-traitlets==5.0.5-1
 python3-twisted==20.3.0-7+deb11u1
 python3-twisted-bin==20.3.0-7+deb11u1
 python3-typing-extensions==3.7.4.3-1
@@ -1661,6 +1756,7 @@ python3-tz==2021.1-1
 python3-unidiff==0.5.5-2
 python3-urllib3==1.26.5-1~exp1
 python3-venv==3.9.2-3
+python3-wcwidth==0.1.9+dfsg1-2
 python3-webencodings==0.5.1-2
 python3-wheel==0.34.2-1
 python3-wrapt==1.12.1-4+b1
@@ -1693,18 +1789,37 @@ rrdtool==1.7.2-3+b7
 rsync==3.2.3-4+deb11u1
 rsyslog==8.2102.0-2+deb11u1
 ruby==1:2.7+2
+ruby-addressable==2.7.0-2
 ruby-all-dev==1:2.7+2
 ruby-asciidoctor==2.0.12-2
 ruby-diff-lcs==1.4.4-1
+ruby-docile==1.1.5-2
+ruby-faraday==1.1.0-6
+ruby-google-protobuf==3.12.4-1+deb11u1
+ruby-googleapis-common-protos-types==1.0.1-1.1
+ruby-googleauth==0.13.0-3
+ruby-jwt==2.2.2-1
+ruby-little-plugger==1.1.4-1
+ruby-logging==2.2.2-1
+ruby-memoist==0.16.2-2
 ruby-minitest==5.13.0-1
+ruby-multi-json==1.14.1-1
+ruby-multipart-post==2.0.0-1
 ruby-net-telnet==0.1.1-2
+ruby-oj==3.11.0-1
+ruby-os==0.9.6-1.1
 ruby-power-assert==1.1.7-2
+ruby-public-suffix==3.0.3+ds-1
 ruby-rspec==3.9.0c2e2m1s3-2
 ruby-rspec-core==3.9.0c2e2m1s3-2
 ruby-rspec-expectations==3.9.0c2e2m1s3-2
 ruby-rspec-mocks==3.9.0c2e2m1s3-2
 ruby-rspec-support==3.9.0c2e2m1s3-2
+ruby-ruby2-keywords==0.0.2-2
 ruby-rubygems==3.2.5-2
+ruby-signet==0.14.0-4
+ruby-simplecov==0.19.1-1
+ruby-simplecov-html==0.12.3-1
 ruby-test-unit==3.3.9-1
 ruby-xmlrpc==0.3.0-2
 ruby2.7==2.7.4-1+deb11u1
@@ -1737,6 +1852,7 @@ systemd-timesyncd==247.3-7+deb11u4
 t1utils==1.41-4
 tcl==8.6.11+1
 tcl8.6==8.6.11+dfsg-1
+tcpdump==4.99.0-2+deb11u1
 teckit==2.5.10+ds1-3
 telnet==0.17-42
 termit==3.1-1
@@ -1761,6 +1877,7 @@ texlive-plain-generic==2020.20210202-3
 texlive-science==2020.20210202-3
 texlive-xetex==2020.20210202-3
 thin-provisioning-tools==0.9.0-1
+thrift-compiler==0.13.0-6
 time==1.9-0.1
 tipa==2:1.3-20.1
 tk==8.6.11+1
@@ -1771,6 +1888,8 @@ unattended-upgrades==2.8
 unzip==6.0-26+deb11u1
 uuid-dev==2.36.1-8+deb11u2
 va-driver-all==2.10.0-1
+valgrind==1:3.16.1-1
+valgrind-dbg==1:3.16.1-1
 vdpau-driver-all==1.4-3
 velocity==1.7-6
 vim==2:8.2.2434-3+deb11u1
diff --git a/files/build/versions/dockers/sonic-slave-bullseye/versions-py3 b/files/build/versions/dockers/sonic-slave-bullseye/versions-py3
index 9481bff74..4bfb6d46b 100644
--- a/files/build/versions/dockers/sonic-slave-bullseye/versions-py3
+++ b/files/build/versions/dockers/sonic-slave-bullseye/versions-py3
@@ -4,6 +4,7 @@ async-timeout==4.0.3
 attrs==20.3.0
 automat==20.2.0
 babel==2.8.0
+backcall==0.2.0
 bcrypt==3.1.7
 beautifulsoup4==4.9.3
 bitarray==2.9.2
@@ -17,8 +18,10 @@ coverage==5.1
 crc16==0.1.1
 cryptography==3.3.2
 ctypesgen==1.0.2
+cython==0.29.21
 dblatex==0.3.12
 dbus-python==1.2.16
+decorator==4.4.2
 devscripts==2.21.3+deb11u1
 distro-info==1.0+deb11u1
 docutils==0.16
@@ -36,9 +39,13 @@ importlib-metadata==1.6.0
 incremental==17.5.0
 iniconfig==0.0.0
 ipaddr==2.2.0
+ipython==7.20.0
+ipython_genutils==0.2.0
 isort==5.6.4
 j2cli==0.3.10
+jedi==0.18.0
 jinja2==2.11.3
+jsonpath-ng==1.6.1
 lazy-object-proxy==0.0.0
 logilab-common==1.8.1
 lxml==4.9.1
@@ -58,11 +65,16 @@ olefile==0.46
 packaging==20.9
 parameterized==0.8.1
 parse==1.6.6
+parso==0.8.1
 pexpect==4.8.0
+pickleshare==0.7.5
 pillow==9.4.0
 pip==24.0
 pluggy==0.13.0
+ply==3.11
+prompt-toolkit==3.0.14
 protobuf==4.25.3
+psutil==5.8.0
 ptyprocess==0.7.0
 py==1.10.0
 pyang==2.4.0
@@ -78,6 +90,7 @@ pylint==2.7.2
 pympler==0.8
 pyopenssl==20.0.1
 pyparsing==2.4.7
+pyroute2==0.5.14
 pytest==6.0.2
 pytest-cov==2.10.1
 pytest-runner==5.2
@@ -89,9 +102,10 @@ pytz==2021.1
 pyxdg==0.27
 pyyaml==5.4.1
 redis==5.0.4
-regex==2024.5.10
+regex==2024.5.15
 requests==2.25.1
 roman==2.0.0
+scapy==2.4.4
 service-identity==18.1.0
 setuptools==49.6.0
 six==1.16.0
@@ -101,12 +115,15 @@ sphinx==3.4.3
 sphinx-rtd-theme==0.5.1
 stdeb==0.10.0
 stgit==0.19
+thrift==0.13.0
 toml==0.10.1
+traitlets==5.0.5
 twisted==20.3.0
 typing-extensions==3.7.4.3
 unattended-upgrades==0.1
 unidiff==0.5.5
 urllib3==1.26.5
+wcwidth==0.1.9
 webencodings==0.5.1
 wheel==0.38.1
 wrapt==1.12.1
diff --git a/files/build/versions/dockers/sonic-slave-buster/versions-deb-buster b/files/build/versions/dockers/sonic-slave-buster/versions-deb-buster
index 18c959d3a..202bd02c0 100644
--- a/files/build/versions/dockers/sonic-slave-buster/versions-deb-buster
+++ b/files/build/versions/dockers/sonic-slave-buster/versions-deb-buster
@@ -95,7 +95,7 @@ docbook-xml==4.5-8
 docker-buildx-plugin==0.10.5-1~debian.10~buster
 docker-ce==5:24.0.2-1~debian.10~buster
 docker-ce-cli==5:24.0.2-1~debian.10~buster
-docker-ce-rootless-extras==5:26.1.2-1~debian.10~buster
+docker-ce-rootless-extras==5:26.1.3-1~debian.10~buster
 docker-compose-plugin==2.18.1-1~debian.10~buster
 docutils-common==0.14+dfsg-4
 docutils-doc==0.14+dfsg-4
diff --git a/files/build/versions/host-image/versions-deb-bookworm b/files/build/versions/host-image/versions-deb-bookworm
index 360701181..242ff4bb7 100644
--- a/files/build/versions/host-image/versions-deb-bookworm
+++ b/files/build/versions/host-image/versions-deb-bookworm
@@ -196,6 +196,7 @@ libnss-ldapd==0.9.12-4
 libnss-radius==1.0.1-1
 libnss-tacplus==1.0.4-1
 libnuma1==2.0.16-1
+libnvme1==1.3-1
 libonig5==6.9.8-1
 libopencsd1==1.3.3-1
 libpam-ldapd==0.9.12-4
@@ -303,10 +304,11 @@ ntpsec==1.2.2+dfsg1-1+deb12u1
 ntpsec-ntpdate==1.2.2+dfsg1-1+deb12u1
 ntpsec-ntpdig==1.2.2+dfsg1-1+deb12u1
 ntpstat==0.0.0.1-2+b1
+nvme-cli==2.4+really2.3-3
 opennsl-modules==7.1.0.0
-openssh-client==1:9.2p1-2+deb12u2
-openssh-server==1:9.2p1-2+deb12u2
-openssh-sftp-server==1:9.2p1-2+deb12u2
+openssh-client==1:9.2p1-2+deb12u1
+openssh-server==1:9.2p1-2+deb12u1
+openssh-sftp-server==1:9.2p1-2+deb12u1
 openssl==3.0.11-1~deb12u2
 pci.ids==0.0~2023.04.11-1
 pciutils==1:3.9.0-4
@@ -381,6 +383,7 @@ unzip==6.0-28
 usbutils==1:014-1+deb12u1
 util-linux==2.38.1-5+deb12u1
 util-linux-extra==2.38.1-5+deb12u1
+uuid-runtime==2.38.1-5+deb12u1
 vim==2:9.0.1378-2
 vim-common==2:9.0.1378-2
 vim-runtime==2:9.0.1378-2
diff --git a/files/build/versions/host-image/versions-deb-bookworm-arm64 b/files/build/versions/host-image/versions-deb-bookworm-arm64
index dcb0fd7d8..d82ad8838 100644
--- a/files/build/versions/host-image/versions-deb-bookworm-arm64
+++ b/files/build/versions/host-image/versions-deb-bookworm-arm64
@@ -1,6 +1,3 @@
 mrvlprestera==1.0
 ntpstat==0.0.0.1-2
-openssh-client==1:9.2p1-2+deb12u1
-openssh-server==1:9.2p1-2+deb12u1
-openssh-sftp-server==1:9.2p1-2+deb12u1
 tsingma-bsp==1.0
diff --git a/files/build/versions/host-image/versions-deb-bookworm-armhf b/files/build/versions/host-image/versions-deb-bookworm-armhf
index 4ad526a0d..85aa015ee 100644
--- a/files/build/versions/host-image/versions-deb-bookworm-armhf
+++ b/files/build/versions/host-image/versions-deb-bookworm-armhf
@@ -2,7 +2,4 @@ binutils-arm-linux-gnueabihf==2.40-2
 linux-image-6.1.0-11-2-armmp==6.1.38-4
 mrvlprestera==1.0
 ntpstat==0.0.0.1-2
-openssh-client==1:9.2p1-2+deb12u1
-openssh-server==1:9.2p1-2+deb12u1
-openssh-sftp-server==1:9.2p1-2+deb12u1
 python3-gi==3.42.2-3+b1
diff --git a/files/build/versions/host-image/versions-py3 b/files/build/versions/host-image/versions-py3
index 1200e659a..eae03d6c4 100644
--- a/files/build/versions/host-image/versions-py3
+++ b/files/build/versions/host-image/versions-py3
@@ -58,9 +58,9 @@ pynacl==1.5.0
 pyroute2==0.5.19
 python-apt==2.6.0
 python-dateutil==2.9.0.post0
-pyyaml==5.4.1
+pyyaml==6.0.1
 redis==3.5.3
-regex==2024.5.10
+regex==2024.5.15
 requests==2.31.0
 scapy==2.4.4
 semantic-version==2.10.0
diff --git a/files/build/versions/host-image/versions-py3-all-arm64 b/files/build/versions/host-image/versions-py3-all-arm64
deleted file mode 100644
index cf39afa6b..000000000
--- a/files/build/versions/host-image/versions-py3-all-arm64
+++ /dev/null
@@ -1 +0,0 @@
-pyyaml==6.0.1
diff --git a/files/build/versions/host-image/versions-py3-all-armhf b/files/build/versions/host-image/versions-py3-all-armhf
index 947ac1b16..fe39c407f 100644
--- a/files/build/versions/host-image/versions-py3-all-armhf
+++ b/files/build/versions/host-image/versions-py3-all-armhf
@@ -1,2 +1 @@
 pygobject==3.42.2
-pyyaml==6.0.1

From 2fb29d39fd0ba6221a2536db86f3ad732b91e099 Mon Sep 17 00:00:00 2001
From: Ashwin Srinivasan <93744978+assrinivasan@users.noreply.github.com>
Date: Sat, 18 May 2024 12:32:12 -0700
Subject: [PATCH 0608/1115] [pmon]: Adds a bind mount from host to
 /usr/share/stormond/ directory on pmon container (#18122)

Why I did it
This is a part of a larger commit that adds a storage monitoring daemon to SONiC. This commit is needed to that storagemon daemon can save FS stats JSON file to disk in the event of planned reboots and unintentional powercycles.

SONiC Storage Monitoring Daemon HLD

Also added psutil module to perform process and system monitoring operations pythonically.

Microsoft ADO (number only): 17468992

How I did it
Added a rule to create the directory on the pmon container
Added a rule to create a bind-mount
How to verify it
Flash a switch with image containing the changes.
Run:

root@str2-7050cx3-acs-13:~# docker inspect pmon
and verify the following parameters in the "mounts" section:

        "Mounts": [
            .
            .
            .
            {
                "Type": "bind",
                "Source": "/host/pmon/stormond",
                "Destination": "/usr/share/stormond",
                "Mode": "rw",
                "RW": true,
                "Propagation": "rprivate"
            },
            .
            .
            .
        ]
Additionally, you can run the following steps:

Navigate to /host/pmon/stormond directory on the host and create an empty file
Enter the pmon container and navigate to /usr/share/stormond
Verify that the file created in the host is seen here
Add text to this file
Exit the docker container
cat the file on the host and verify that the text you added is seen here
root@str2-7050cx3-acs-13:/host# cd pmon/
root@str2-7050cx3-acs-13:/host/pmon# ls
stormond
root@str2-7050cx3-acs-13:/host/pmon# cd stormond/
root@str2-7050cx3-acs-13:/host/pmon/stormond# touch ashwin.txt
root@str2-7050cx3-acs-13:/host/pmon/stormond# docker exec -it pmon bash
root@str2-7050cx3-acs-13:/# cd /usr/share/stormond/
root@str2-7050cx3-acs-13:/usr/share/stormond# ls
ashwin.txt
root@str2-7050cx3-acs-13:/usr/share/stormond# ls -al
total 8
drwxr-xr-x 2 root root 4096 Feb 19 04:06 .
drwxr-xr-x 3 root root 4096 Feb 19 02:04 ..
-rw-r--r-- 1 root root    0 Feb 19 04:06 ashwin.txt
root@str2-7050cx3-acs-13:/usr/share/stormond# echo "Bind mount successful?" > ashwin.txt
root@str2-7050cx3-acs-13:/usr/share/stormond# exit
exit
root@str2-7050cx3-acs-13:/host/pmon/stormond# cat ashwin.txt
Bind mount successful?
root@str2-7050cx3-acs-13:/host/pmon/stormond#
As a third test:

Run ls -alirth in both the /host/pmon/stormond dir on the host and /usr/share/stormond dir in the pmon container and verify that the inode numbers match.

root@str2-7050cx3-acs-13:/host/pmon/stormond# ls -alirth
total 12K
129546 drwxr-xr-x 3 root root 4.0K Feb 19 04:06 ..
129554 drwxr-xr-x 2 root root 4.0K Feb 19 04:06 .
129555 -rw-r--r-- 1 root root   23 Feb 19 04:07 ashwin.txt

root@str2-7050cx3-acs-13:/host/pmon/stormond# docker exec -it pmon bash
root@str2-7050cx3-acs-13:/# cd /usr/share/stormond/
root@str2-7050cx3-acs-13:/usr/share/stormond# ls -alirth
total 12K
 33618 drwxr-xr-x 3 root root 4.0K Feb 19 02:04 ..
129554 drwxr-xr-x 2 root root 4.0K Feb 19 04:06 .
129555 -rw-r--r-- 1 root root   23 Feb 19 04:07 ashwin.txt
root@str2-7050cx3-acs-13:/usr/share/stormond#
---
 dockers/docker-platform-monitor/Dockerfile.j2 | 4 ++++
 rules/docker-platform-monitor.mk              | 1 +
 sonic-slave-bookworm/Dockerfile.j2            | 1 +
 3 files changed, 6 insertions(+)

diff --git a/dockers/docker-platform-monitor/Dockerfile.j2 b/dockers/docker-platform-monitor/Dockerfile.j2
index a4e01237e..8c9deb02f 100755
--- a/dockers/docker-platform-monitor/Dockerfile.j2
+++ b/dockers/docker-platform-monitor/Dockerfile.j2
@@ -49,6 +49,9 @@ RUN pip3 install requests
 # We install the libpci module in order to be able to do PCI transactions
 RUN pip3 install libpci
 
+# Install psutil for process and system monitoring operations
+RUN pip3 install psutil
+
 {% if docker_platform_monitor_debs.strip() -%}
 # Copy locally-built Debian package dependencies
 {{ copy_files("debs/", docker_platform_monitor_debs.split(' '), "/debs/") }}
@@ -92,6 +95,7 @@ COPY ["files/supervisor-proc-exit-listener", "/usr/bin"]
 COPY ["critical_processes", "/etc/supervisor"]
 COPY ["etc/rsyslog.conf", "/etc/rsyslog.conf"]
 
+RUN mkdir -p /usr/share/stormond
 RUN sonic-cfggen -a "{\"CONFIGURED_PLATFORM\":\"{{CONFIGURED_PLATFORM}}\"}" -t /usr/share/sonic/templates/docker_init.j2 > /usr/bin/docker_init.sh
 RUN rm -f /usr/share/sonic/templates/docker_init.j2
 RUN chmod 755 /usr/bin/docker_init.sh
diff --git a/rules/docker-platform-monitor.mk b/rules/docker-platform-monitor.mk
index 99cca6f70..4f060ec04 100644
--- a/rules/docker-platform-monitor.mk
+++ b/rules/docker-platform-monitor.mk
@@ -53,6 +53,7 @@ $(DOCKER_PLATFORM_MONITOR)_CONTAINER_NAME = pmon
 $(DOCKER_PLATFORM_MONITOR)_RUN_OPT += --privileged -t
 $(DOCKER_PLATFORM_MONITOR)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro
 $(DOCKER_PLATFORM_MONITOR)_RUN_OPT += -v /etc/timezone:/etc/timezone:ro 
+$(DOCKER_PLATFORM_MONITOR)_RUN_OPT += -v /host/pmon/stormond:/usr/share/stormond:rw
 $(DOCKER_PLATFORM_MONITOR)_RUN_OPT += -v /var/run/platform_cache:/var/run/platform_cache:ro
 $(DOCKER_PLATFORM_MONITOR)_RUN_OPT += -v /usr/share/sonic/device/pddf:/usr/share/sonic/device/pddf:ro
 
diff --git a/sonic-slave-bookworm/Dockerfile.j2 b/sonic-slave-bookworm/Dockerfile.j2
index 6b749b5e8..2c1b0e375 100644
--- a/sonic-slave-bookworm/Dockerfile.j2
+++ b/sonic-slave-bookworm/Dockerfile.j2
@@ -562,6 +562,7 @@ RUN pip3 uninstall -y enum34
 
 # For sonic-platform-common testing
 RUN pip3 install redis
+RUN pip3 install psutil
 
 # For sonic-swss-common testing
 RUN pip3 install Pympler==1.0

From 1fd869b41647f2d8501be8bf50b398e97abe1b5a Mon Sep 17 00:00:00 2001
From: "Marty Y. Lok" <76118573+mlok-nokia@users.noreply.github.com>
Date: Sat, 18 May 2024 18:13:04 -0400
Subject: [PATCH 0609/1115] [master][ethtool] Install ethtool to localhost
 (#18241)

Signed-off-by: mlok <marty.lok@nokia.com>
---
 build_debian.sh                               | 1 +
 dockers/docker-platform-monitor/Dockerfile.j2 | 5 +++--
 rules/docker-platform-monitor.mk              | 1 -
 3 files changed, 4 insertions(+), 3 deletions(-)

diff --git a/build_debian.sh b/build_debian.sh
index bc927fbb3..2e054e716 100755
--- a/build_debian.sh
+++ b/build_debian.sh
@@ -406,6 +406,7 @@ sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y in
     sysstat                 \
     xxd                     \
     wireless-regdb          \
+    ethtool                 \
     zstd                    \
     nvme-cli
 
diff --git a/dockers/docker-platform-monitor/Dockerfile.j2 b/dockers/docker-platform-monitor/Dockerfile.j2
index 8c9deb02f..9f44ca004 100755
--- a/dockers/docker-platform-monitor/Dockerfile.j2
+++ b/dockers/docker-platform-monitor/Dockerfile.j2
@@ -27,9 +27,10 @@ RUN apt-get update &&   \
         iputils-ping    \
         pciutils        \
         nvme-cli        \
-        ethtool &&	\
+        ethtool
+
 # smartmontools version should match the installed smartmontools in sonic_debian_extension build template
-    apt-get install -y -t bookworm-backports \
+RUN apt-get install -y -t bookworm-backports \
         smartmontools
 
 # On Arista devices, the sonic_platform wheel is not installed in the container.
diff --git a/rules/docker-platform-monitor.mk b/rules/docker-platform-monitor.mk
index 4f060ec04..bf72808e0 100644
--- a/rules/docker-platform-monitor.mk
+++ b/rules/docker-platform-monitor.mk
@@ -65,7 +65,6 @@ $(DOCKER_PLATFORM_MONITOR)_aboot_RUN_OPT += -v /usr/lib/python3/dist-packages/so
 $(DOCKER_PLATFORM_MONITOR)_BASE_IMAGE_FILES += cmd_wrapper:/usr/bin/sensors
 $(DOCKER_PLATFORM_MONITOR)_BASE_IMAGE_FILES += cmd_wrapper:/usr/sbin/iSmart
 $(DOCKER_PLATFORM_MONITOR)_BASE_IMAGE_FILES += cmd_wrapper:/usr/sbin/SmartCmd
-$(DOCKER_PLATFORM_MONITOR)_BASE_IMAGE_FILES += cmd_wrapper:/usr/bin/ethtool
 $(DOCKER_PLATFORM_MONITOR)_FILES += $(SUPERVISOR_PROC_EXIT_LISTENER_SCRIPT)
 
 SONIC_BOOKWORM_DOCKERS += $(DOCKER_PLATFORM_MONITOR)

From 21eadf5594048338df6d76ea1ecb41b07c6da3d2 Mon Sep 17 00:00:00 2001
From: Mati Alfaro <mati@marvell.com>
Date: Sun, 19 May 2024 01:29:19 +0300
Subject: [PATCH 0610/1115] [yang-models] Add missing constraints in VLAN yang
 model. Fixes #12256 (#18292)

Fix #12256

Implement constraints as described in https://github.com/sonic-net/sonic-buildimage/issues/12256

1. **Don't allow write of default vlan (vid = 1)**
- Change range from 1..4094 to 2..4094

2. **If vlan id already exists, do not allow duplicitous write to ConfigDB**
No change is needed, name is key so it will be unique

3. **Do not allow removal of vlan interface if vlan has IP address assigned**
No chnage is needed since both VLAN_INTERFACE_LIST and VLAN_INTERFACE_IPPREFIX_LIST reference /vlan:sonic-vlan/vlan:VLAN/vlan:VLAN_LIST/vlan:name
- 	Added IP_PREFIX_WITHOUT_CREATNG_VLAN test

4. **Don't allow removal of vlan if there are members assigned**
No chnage is needed since VLAN_MEMBER_LIST refereces "/vlan:sonic-vlan/vlan:VLAN/vlan:VLAN_LIST/vlan:name"
- Added test VLAN_MEMBERS_WITHOUT_CREATING_VLAN

5. **If interface naming mode is alias, make sure corresponding port name exists**
sonic-yang doesn't support adding a ports using alias

6. **Make sure port is not configured as a mirror destination port**
- must "not(/sms:sonic-mirror-session/sms:MIRROR_SESSION/sms:MIRROR_SESSION_LIST[sms:dst_port=current()])"
- Fixed MIRROR_SESSION in sonic-yang-models\tests\files\sample_config_db.json (Ethernet2 is in Vlan111)
- Test MIRROR_SESSION_ON_VLAN_MEMBER_PORT

7. **Make sure port is not already a vlan member**
No change is needed, <vlan,port> is the key for VLAN_MEMBER_LIST

8. **Make sure port is not a router interface**
- must "not(/intf:sonic-interface/intf:INTERFACE/intf:INTERFACE_LIST[intf:name=current()])"
- Test VLAN_ADD_PORT_THAT_IS_ROUTER_INTERFACE

9. **Make sure port is not already a portchannel member**
- must "not(/lag:sonic-portchannel/lag:PORTCHANNEL_MEMBER/lag:PORTCHANNEL_MEMBER_LIST[lag:port=current()]/lag:name)"
- Test VLAN_ADD_PORT_CHANNEL_MEMBER

10. **Make sure port is not already an untagged member**
- must "not(/vlan:sonic-vlan/vlan:VLAN_MEMBER/vlan:VLAN_MEMBER_LIST[vlan:port=current() and vlan:tagging_mode='untagged' and vlan:name!=current()/../name])"
- Test VLAN_ADD_PORT_THAT_IS_UNTAGGED

**Verify Vlan name matches vlanid**
- must "substring-after(../name, 'Vlan') = current()"
- Test VLAN_CREATE_VLAN_WITH_MISSMATCHING_NAME

Signed-off-by: matiAlfaro <mati@marvell.com>
---
 ...imple-sample-graph-case-remap-disabled.xml |   2 +-
 ...ase-remap-enabled-no-tunnel-attributes.xml |   2 +-
 ...simple-sample-graph-case-remap-enabled.xml |   2 +-
 .../tests/simple-sample-graph-case.xml        |   2 +-
 .../tests/t0-sample-graph-two-mgmt.xml        |   2 +-
 .../tests/t0-sample-graph.xml                 |   2 +-
 .../tests/test_minigraph_case.py              |   2 +-
 .../tests/files/sample_config_db.json         |   7 +-
 .../tests/yang_model_tests/test_yang_model.py |   5 +-
 .../tests/yang_model_tests/tests/vlan.json    |  28 ++
 .../yang_model_tests/tests_config/vlan.json   | 243 ++++++++++++++++++
 .../yang-models/sonic-vlan.yang               |  62 +++--
 12 files changed, 326 insertions(+), 33 deletions(-)

diff --git a/src/sonic-config-engine/tests/simple-sample-graph-case-remap-disabled.xml b/src/sonic-config-engine/tests/simple-sample-graph-case-remap-disabled.xml
index 4ae1b3302..2d26bc910 100644
--- a/src/sonic-config-engine/tests/simple-sample-graph-case-remap-disabled.xml
+++ b/src/sonic-config-engine/tests/simple-sample-graph-case-remap-disabled.xml
@@ -142,7 +142,7 @@
         </VlanInterface>
         <VlanInterface>
           <Name>ab2</Name>
-          <AttachTo>fortyGigE0/4</AttachTo>
+          <AttachTo>PortChannel01</AttachTo>
           <DhcpRelays>192.0.0.1</DhcpRelays>
           <Dhcpv6Relays>fc02:2000::3;fc02:2000::4</Dhcpv6Relays>
           <VlanID>2000</VlanID>
diff --git a/src/sonic-config-engine/tests/simple-sample-graph-case-remap-enabled-no-tunnel-attributes.xml b/src/sonic-config-engine/tests/simple-sample-graph-case-remap-enabled-no-tunnel-attributes.xml
index 6bc2a6db1..650f56e4d 100644
--- a/src/sonic-config-engine/tests/simple-sample-graph-case-remap-enabled-no-tunnel-attributes.xml
+++ b/src/sonic-config-engine/tests/simple-sample-graph-case-remap-enabled-no-tunnel-attributes.xml
@@ -142,7 +142,7 @@
         </VlanInterface>
         <VlanInterface>
           <Name>ab2</Name>
-          <AttachTo>fortyGigE0/4</AttachTo>
+          <AttachTo>PortChannel01</AttachTo>
           <DhcpRelays>192.0.0.1</DhcpRelays>
           <Dhcpv6Relays>fc02:2000::3;fc02:2000::4</Dhcpv6Relays>
           <VlanID>2000</VlanID>
diff --git a/src/sonic-config-engine/tests/simple-sample-graph-case-remap-enabled.xml b/src/sonic-config-engine/tests/simple-sample-graph-case-remap-enabled.xml
index 8c69f0496..b290eb7c6 100644
--- a/src/sonic-config-engine/tests/simple-sample-graph-case-remap-enabled.xml
+++ b/src/sonic-config-engine/tests/simple-sample-graph-case-remap-enabled.xml
@@ -142,7 +142,7 @@
         </VlanInterface>
         <VlanInterface>
           <Name>ab2</Name>
-          <AttachTo>fortyGigE0/4</AttachTo>
+          <AttachTo>PortChannel01</AttachTo>
           <DhcpRelays>192.0.0.1</DhcpRelays>
           <Dhcpv6Relays>fc02:2000::3;fc02:2000::4</Dhcpv6Relays>
           <VlanID>2000</VlanID>
diff --git a/src/sonic-config-engine/tests/simple-sample-graph-case.xml b/src/sonic-config-engine/tests/simple-sample-graph-case.xml
index ddb5f03c5..008719c85 100644
--- a/src/sonic-config-engine/tests/simple-sample-graph-case.xml
+++ b/src/sonic-config-engine/tests/simple-sample-graph-case.xml
@@ -143,7 +143,7 @@
         </VlanInterface>
         <VlanInterface>
           <Name>ab2</Name>
-          <AttachTo>fortyGigE0/4</AttachTo>
+          <AttachTo>PortChannel01</AttachTo>
           <DhcpRelays>192.0.0.1</DhcpRelays>
           <Dhcpv6Relays>fc02:2000::3;fc02:2000::4</Dhcpv6Relays>
           <VlanID>2000</VlanID>
diff --git a/src/sonic-config-engine/tests/t0-sample-graph-two-mgmt.xml b/src/sonic-config-engine/tests/t0-sample-graph-two-mgmt.xml
index da1b56fe1..5d201cc3e 100644
--- a/src/sonic-config-engine/tests/t0-sample-graph-two-mgmt.xml
+++ b/src/sonic-config-engine/tests/t0-sample-graph-two-mgmt.xml
@@ -281,7 +281,7 @@
         </VlanInterface>
         <VlanInterface>
           <Name>Vlan2000</Name>
-          <AttachTo>fortyGigE0/112;fortyGigE0/116;fortyGigE0/120</AttachTo>
+          <AttachTo>PortChannel01;PortChannel02;PortChannel03</AttachTo>
           <NoDhcpRelay>False</NoDhcpRelay>
           <StaticDHCPRelay>0.0.0.0/0</StaticDHCPRelay>
           <FhrpProtoType i:nil="true"/>
diff --git a/src/sonic-config-engine/tests/t0-sample-graph.xml b/src/sonic-config-engine/tests/t0-sample-graph.xml
index 05db8246e..b343a8b5e 100644
--- a/src/sonic-config-engine/tests/t0-sample-graph.xml
+++ b/src/sonic-config-engine/tests/t0-sample-graph.xml
@@ -265,7 +265,7 @@
         </VlanInterface>
         <VlanInterface>
           <Name>Vlan2000</Name>
-          <AttachTo>fortyGigE0/112;fortyGigE0/116;fortyGigE0/120</AttachTo>
+          <AttachTo>PortChannel01;PortChannel02;PortChannel03</AttachTo>
           <NoDhcpRelay>False</NoDhcpRelay>
           <StaticDHCPRelay>0.0.0.0/0</StaticDHCPRelay>
           <FhrpProtoType i:nil="true"/>
diff --git a/src/sonic-config-engine/tests/test_minigraph_case.py b/src/sonic-config-engine/tests/test_minigraph_case.py
index 8bad0f5f3..a5578b841 100644
--- a/src/sonic-config-engine/tests/test_minigraph_case.py
+++ b/src/sonic-config-engine/tests/test_minigraph_case.py
@@ -129,7 +129,7 @@ def test_minigraph_vlan_members(self):
         output = self.run_script(argument)
         expected = {
                        'Vlan1000|Ethernet8': {'tagging_mode': 'untagged'},
-                       'Vlan2000|Ethernet4': {'tagging_mode': 'untagged'}
+                       'Vlan2000|PortChannel01': {'tagging_mode': 'untagged'}
                    }
         self.assertEqual(
                 utils.to_dict(output.strip()),
diff --git a/src/sonic-yang-models/tests/files/sample_config_db.json b/src/sonic-yang-models/tests/files/sample_config_db.json
index b6e6ef070..db159a93c 100644
--- a/src/sonic-yang-models/tests/files/sample_config_db.json
+++ b/src/sonic-yang-models/tests/files/sample_config_db.json
@@ -1197,10 +1197,7 @@
             "Vlan111|Ethernet0": {
                 "tagging_mode": "untagged"
             },
-            "Vlan111|Ethernet1": {
-                "tagging_mode": "untagged"
-            },
-            "Vlan111|Ethernet2": {
+            "Vlan111|PortChannel0004": {
                 "tagging_mode": "untagged"
             },
             "Vlan111|Ethernet3": {
@@ -2297,7 +2294,7 @@
             "span": {
                 "direction": "RX",
                 "type": "SPAN",
-                "dst_port": "Ethernet2",
+                "dst_port": "Ethernet7",
                 "src_port": "Ethernet3,Ethernet4"
             }
         },
diff --git a/src/sonic-yang-models/tests/yang_model_tests/test_yang_model.py b/src/sonic-yang-models/tests/yang_model_tests/test_yang_model.py
index d46d03623..22cad816b 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/test_yang_model.py
+++ b/src/sonic-yang-models/tests/yang_model_tests/test_yang_model.py
@@ -234,8 +234,9 @@ def runVlanSpecialTest(self, test):
             desc = self.SpecialTests[test]['desc']
             self.logStartTest(desc)
             jInput = json.loads(self.readJsonInput(test))
-            # check all Vlan from 1 to 4094
-            for i in range(1,4095):
+            # check all Vlan from 2 to 4094
+            for i in range(2,4095):
+
                 vlan = 'Vlan'+str(i)
                 jInput["sonic-vlan:sonic-vlan"]["sonic-vlan:VLAN"]["VLAN_LIST"]\
                       [0]["name"] = vlan
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/vlan.json b/src/sonic-yang-models/tests/yang_model_tests/tests/vlan.json
index 7f1cb4eb3..a795a7e3b 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests/vlan.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests/vlan.json
@@ -86,5 +86,33 @@
     "VLAN_INTERFACE_INVALID_ENABLE_IPV6_LINK_LOCAL": {
         "desc": "Enable the ipv6 link-local as true.",
         "eStr": "Invalid value \"true\" in \"ipv6_use_link_local_only\" element."
+    },
+    "VLAN_MEMBERS_WITHOUT_CREATING_VLAN":{
+        "desc": "Vlan members without Creating Vlan",
+        "eStrKey": "LeafRef"
+    },
+    "VLAN_CREATE_VLAN_WITH_MISSMATCHING_NAME": {
+        "desc": "Create Vlan so that name doesn't match id",
+        "eStr": "The vlanid must correspond to the VLAN name"        
+    },
+    "IP_PREFIX_WITHOUT_CREATNG_VLAN": {
+        "desc": "Create IP on not created Vlan",
+        "eStrKey": "LeafRef"
+    },
+    "MIRROR_SESSION_ON_VLAN_MEMBER_PORT": {
+        "desc": "Set mirror dst port to a Vlan member",
+        "eStr": "Port is used as a destination port in a mirror session"
+    },
+    "VLAN_ADD_PORT_CHANNEL_MEMBER": {
+        "desc": "Add port channel member to Vlan",
+        "eStr": "Port is a member of a port channel"
+    },
+    "VLAN_ADD_PORT_THAT_IS_UNTAGGED": {
+        "desc": "Add port that is already untagged",
+        "eStr": "Port can be untagged in at most one VLAN"
+    },
+    "VLAN_ADD_PORT_THAT_IS_ROUTER_INTERFACE": {
+        "desc": "Add to Vlan port that is router interface",
+        "eStr": "Port is a router interface"
     }
 }
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/vlan.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/vlan.json
index 9f3086b60..b4288472c 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/vlan.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/vlan.json
@@ -719,5 +719,248 @@
                 ]
             }
         }
+    },
+
+    "VLAN_MEMBERS_WITHOUT_CREATING_VLAN": {
+        "sonic-port:sonic-port": {
+            "sonic-port:PORT": {
+                "PORT_LIST": [
+                    {
+                        "admin_status": "up",
+                        "name": "Ethernet0"
+                    }
+                ]
+            }
+        },
+        "sonic-vlan:sonic-vlan": {
+            "sonic-vlan:VLAN_MEMBER": {
+                "VLAN_MEMBER_LIST": [
+                    {
+                        "port": "Ethernet0",
+                        "tagging_mode": "tagged",
+                        "name": "Vlan100"
+                    }
+                ]
+            }
+        }
+    },
+    "VLAN_CREATE_VLAN_WITH_MISSMATCHING_NAME": {
+        "sonic-vlan:sonic-vlan": {
+            "sonic-vlan:VLAN": {
+                "VLAN_LIST": [
+                    {
+                        "name": "Vlan10",
+                        "vlanid":11
+                    }
+                ]
+            }
+        }
+    },
+    "IP_PREFIX_WITHOUT_CREATNG_VLAN": {
+        "sonic-vlan:sonic-vlan": {
+            "sonic-vlan:VLAN": {
+                "VLAN_LIST": [
+                    {
+                        "description": "server_vlan",
+                        "name": "Vlan10"
+                    }
+                ]
+            },
+            "sonic-vlan:VLAN_INTERFACE": {
+                "VLAN_INTERFACE_IPPREFIX_LIST": [
+                    {
+                        "family": "IPv4",
+                        "ip-prefix": "20.0.0.1/24",
+                        "scope": "global",
+                        "name": "Vlan100"
+                    }
+                ],
+                "VLAN_INTERFACE_LIST": [
+                    {
+                        "name": "Vlan100"
+                    }
+                ]
+            }
+        }
+    },
+    "MIRROR_SESSION_ON_VLAN_MEMBER_PORT": {
+        "sonic-port:sonic-port": {
+            "sonic-port:PORT": {
+                "PORT_LIST": [
+                    {
+                        "admin_status": "up",
+                        "name": "Ethernet1",
+                        "speed": 25000,
+                        "lanes": "1"
+                    },
+                    {
+                        "admin_status": "up",
+                        "name": "Ethernet2",
+                        "speed": 25000,
+                        "lanes": "1"
+                    }
+                ]
+            }
+        },
+        "sonic-vlan:sonic-vlan": {
+            "sonic-vlan:VLAN": {
+                "VLAN_LIST": [
+                    {
+                        "name": "Vlan10"
+                    }
+                ]
+            },
+            "sonic-vlan:VLAN_MEMBER": {
+                "VLAN_MEMBER_LIST": [
+                    {
+                        "port": "Ethernet2",
+                        "tagging_mode": "tagged",
+                        "name": "Vlan10"
+                    }
+                ]
+            }
+        },
+        "sonic-mirror-session:sonic-mirror-session": {
+            "sonic-mirror-session:MIRROR_SESSION": {
+                "MIRROR_SESSION_LIST": [ {
+                    "name":"mirror_session_dscp",
+                    "type": "SPAN",
+                    "src_port": "Ethernet1",
+                    "dst_port": "Ethernet2"
+                }]   
+            }
+        }
+    },
+    "VLAN_ADD_PORT_CHANNEL_MEMBER": {
+        "sonic-port:sonic-port": {
+            "sonic-port:PORT": {
+                "PORT_LIST": [{
+                    "admin_status": "up",
+                    "name": "Ethernet1",
+                    "speed": 25000,
+                    "lanes": "1"
+                }]
+            }
+        },
+        "sonic-portchannel:sonic-portchannel": {
+            "sonic-portchannel:PORTCHANNEL": {
+                "PORTCHANNEL_LIST": [
+                    {
+                        "admin_status": "up",
+                        "min_links": "1",
+                        "mtu": "9100",
+                        "tpid": "0x8100",
+                        "lacp_key": "auto",
+                        "name": "PortChannel0001",
+                        "fast_rate": "false",
+                        "fallback" : "false",
+                        "mode" :  "routed"
+                    }
+                ]
+            },
+            "sonic-portchannel:PORTCHANNEL_MEMBER": {
+                "PORTCHANNEL_MEMBER_LIST": [
+                    {
+                        "name": "PortChannel0001",
+                        "port": "Ethernet1"
+                    }
+                ]
+            }
+        },
+        "sonic-vlan:sonic-vlan": {
+            "sonic-vlan:VLAN": {
+                "VLAN_LIST": [
+                    {
+                        "name": "Vlan10"
+                    }
+                ]
+            },
+            "sonic-vlan:VLAN_MEMBER": {
+                "VLAN_MEMBER_LIST": [
+                    {
+                        "port": "Ethernet1",
+                        "tagging_mode": "tagged",
+                        "name": "Vlan10"
+                    }
+                ]
+            }
+        }
+    },
+    "VLAN_ADD_PORT_THAT_IS_UNTAGGED": {
+        "sonic-port:sonic-port": {
+            "sonic-port:PORT": {
+                "PORT_LIST": [{
+                    "admin_status": "up",
+                    "name": "Ethernet1",
+                    "speed": 25000,
+                    "lanes": "1"
+                }]
+            }
+        },
+        "sonic-vlan:sonic-vlan": {
+            "sonic-vlan:VLAN": {
+                "VLAN_LIST": [
+                    {
+                        "name": "Vlan10"
+                    },
+                    {
+                        "name": "Vlan11"
+                    }
+                ]
+            },
+            "sonic-vlan:VLAN_MEMBER": {
+                "VLAN_MEMBER_LIST": [
+                    {
+                        "port": "Ethernet1",
+                        "tagging_mode": "untagged",
+                        "name": "Vlan10"
+                    },
+                    {
+                        "port": "Ethernet1",
+                        "tagging_mode": "untagged",
+                        "name": "Vlan11"
+                    }
+                ]
+            }
+        }
+    },
+    "VLAN_ADD_PORT_THAT_IS_ROUTER_INTERFACE": {
+        "sonic-interface:sonic-interface": {
+            "sonic-interface:INTERFACE": {
+                "INTERFACE_LIST": [
+                    {
+                        "name": "Ethernet1"
+                    }
+                ]
+            }
+        },
+        "sonic-port:sonic-port": {
+            "sonic-port:PORT": {
+                "PORT_LIST": [{
+                    "admin_status": "up",
+                    "name": "Ethernet1",
+                    "speed": 25000,
+                    "lanes": "1"
+                }]
+            }
+        },
+        "sonic-vlan:sonic-vlan": {
+            "sonic-vlan:VLAN": {
+                "VLAN_LIST": [
+                    {
+                        "name": "Vlan10"
+                    }
+                ]
+            },
+            "sonic-vlan:VLAN_MEMBER": {
+                "VLAN_MEMBER_LIST": [
+                    {
+                        "port": "Ethernet1",
+                        "tagging_mode": "untagged",
+                        "name": "Vlan10"
+                    }
+                ]
+            }
+        }
     }
 }
diff --git a/src/sonic-yang-models/yang-models/sonic-vlan.yang b/src/sonic-yang-models/yang-models/sonic-vlan.yang
index 1e2361ade..ff3a1f2f6 100644
--- a/src/sonic-yang-models/yang-models/sonic-vlan.yang
+++ b/src/sonic-yang-models/yang-models/sonic-vlan.yang
@@ -1,6 +1,6 @@
 module sonic-vlan {
 
-    yang-version 1.1;
+	yang-version 1.1;
 
 	namespace "http://github.com/sonic-net/sonic-vlan";
 	prefix vlan;
@@ -34,8 +34,19 @@ module sonic-vlan {
 		prefix vrf;
 	}
 
+	import sonic-mirror-session {
+		prefix sms;
+	}
+	import sonic-interface {
+		prefix intf;
+	}
+
 	description "VLAN yang Module for SONiC OS";
 
+
+	revision 2024-03-07 {
+		description "Add Constraints that are implemented in CLI";
+	}
 	revision 2021-04-28 {
 		description "Modify Vlan name constraint to allow only legal Vlan names";
 	}
@@ -66,7 +77,7 @@ module sonic-vlan {
 
 				leaf name {
 					type leafref {
-						path /vlan:sonic-vlan/vlan:VLAN/vlan:VLAN_LIST/vlan:name;
+						path "/vlan:sonic-vlan/vlan:VLAN/vlan:VLAN_LIST/vlan:name";
 					}
 				}
 
@@ -84,7 +95,7 @@ module sonic-vlan {
 							error-app-tag nat-zone-invalid;
 						}
 					}
-                                        default "0";
+					default "0";
 				}
 				leaf mpls {
 					description "Enable/disable MPLS routing for the vlan interface";
@@ -113,10 +124,10 @@ module sonic-vlan {
 				}
 
 
-                leaf loopback_action {
-                    description "Packet action when a packet ingress and gets routed on the same IP interface";
-                    type stypes:loopback_action;
-                }
+				leaf loopback_action {
+					description "Packet action when a packet ingress and gets routed on the same IP interface";
+					type stypes:loopback_action;
+				}
 			}
 			/* end of VLAN_INTERFACE_LIST */
 
@@ -153,9 +164,9 @@ module sonic-vlan {
 				leaf family {
 
 					/* family leaf needed for backward compatibility
-					   Both ip4 and ip6 address are string in IETF RFC 6021,
-					   so must statement can check based on : or ., family
-					   should be IPv4 or IPv6 according.
+						Both ip4 and ip6 address are string in IETF RFC 6021,
+						so must statement can check based on : or ., family
+						should be IPv4 or IPv6 according.
 					 */
 
 					must "(contains(../ip-prefix, ':') and current()='IPv6') or
@@ -168,7 +179,7 @@ module sonic-vlan {
 					type boolean;
 				}
 			}
-			/* end of VLAN_INTERFACE_LIST */
+			/* end of VLAN_INTERFACE_IPPREFIX_LIST */
 		}
 		/* end of VLAN_INTERFACE container */
 
@@ -182,13 +193,15 @@ module sonic-vlan {
 
 				leaf name {
 					type string {
-						pattern 'Vlan(409[0-5]|40[0-8][0-9]|[1-3][0-9]{3}|[1-9][0-9]{2}|[1-9][0-9]|[1-9])';
+						pattern 'Vlan(409[0-5]|40[0-8][0-9]|[1-3][0-9]{3}|[1-9][0-9]{2}|[1-9][0-9]|[2-9])';
 					}
 				}
-
 				leaf vlanid {
 					type uint16 {
-						range 1..4094;
+						range 2..4094;
+					}
+					must "substring-after(../name, 'Vlan') = current()"{
+						error-message "The vlanid must correspond to the VLAN name";
 					}
 				}
 
@@ -243,7 +256,6 @@ module sonic-vlan {
 						path "/vlan:sonic-vlan/vlan:VLAN/vlan:VLAN_LIST/vlan:name";
 					}
 				}
-
 				leaf port {
 					/* key elements are mandatory by default */
 					type union {
@@ -254,17 +266,29 @@ module sonic-vlan {
 							path "/lag:sonic-portchannel/lag:PORTCHANNEL/lag:PORTCHANNEL_LIST/lag:name";
 						}
 					}
+					must "not(/sms:sonic-mirror-session/sms:MIRROR_SESSION/sms:MIRROR_SESSION_LIST[sms:dst_port=current()])" 
+					{
+						error-message "Port is used as a destination port in a mirror session.";
+					}
+					must "not(/lag:sonic-portchannel/lag:PORTCHANNEL_MEMBER/lag:PORTCHANNEL_MEMBER_LIST[lag:port=current()]/lag:name)" {
+						error-message "Port is a member of a port channel.";
+					}
+					must "not(/intf:sonic-interface/intf:INTERFACE/intf:INTERFACE_LIST[intf:name=current()])" {
+						error-message "Port is a router interface.";
+					}
+					must "count(../../vlan:VLAN_MEMBER_LIST[vlan:port=current() and vlan:tagging_mode='untagged']) <= 1" {
+						error-message "Port can be untagged in at most one VLAN.";
+					}
 				}
-
 				leaf tagging_mode {
 					mandatory true;
 					type stypes:vlan_tagging_mode;
 				}
 			}
-            /* end of list VLAN_MEMBER_LIST */
+			/* end of list VLAN_MEMBER_LIST */
 		}
-        /* end of container VLAN_MEMBER */
+		/* end of container VLAN_MEMBER */
 	}
-    /* end of container sonic-vlan */
+	/* end of container sonic-vlan */
 }
 /* end of module sonic-vlan */

From de18ccc08d3e9de5c7ae8ce7489114eb5f5b06d8 Mon Sep 17 00:00:00 2001
From: Guohan Lu <lguohan@gmail.com>
Date: Sat, 18 May 2024 20:53:12 -0700
Subject: [PATCH 0611/1115] [doc]: add 202311 build badge (#19002)

Signed-off-by: Guohan Lu <lguohan@gmail.com>
---
 README.md | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/README.md b/README.md
index 1fbcb128c..36a91619d 100644
--- a/README.md
+++ b/README.md
@@ -11,6 +11,17 @@
 [![Nephos](https://dev.azure.com/mssonic/build/_apis/build/status/nephos/Azure.sonic-buildimage.official.nephos?branchName=master&label=Nephos)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=149&branchName=master)
 [![VS](https://dev.azure.com/mssonic/build/_apis/build/status/vs/Azure.sonic-buildimage.official.vs?branchName=master&label=VS)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=142&branchName=master)
 
+*202311 builds*:
+
+[![Broadcom](https://dev.azure.com/mssonic/build/_apis/build/status/broadcom/Azure.sonic-buildimage.official.broadcom?branchName=202311&label=Broadcom)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=138&branchName=202311)
+[![Centec](https://dev.azure.com/mssonic/build/_apis/build/status/centec/Azure.sonic-buildimage.official.centec?branchName=202311&label=Centec)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=143&branchName=202311)
+[![Centec(arm64)](https://dev.azure.com/mssonic/build/_apis/build/status/centec/Azure.sonic-buildimage.official.centec-arm64?branchName=202311&label=Centec-arm64)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=140&branchName=202311)
+[![Innovium](https://dev.azure.com/mssonic/build/_apis/build/status/innovium/Azure.sonic-buildimage.official.innovium?branchName=202311&label=Innovium)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=148&branchName=202311)
+[![Mellanox](https://dev.azure.com/mssonic/build/_apis/build/status/mellanox/Azure.sonic-buildimage.official.mellanox?branchName=202311&label=Mellanox)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=139&branchName=202311)
+[![Marvell(armhf)](https://dev.azure.com/mssonic/build/_apis/build/status/marvell/Azure.sonic-buildimage.official.marvell-armhf?branchName=202311&label=Marvell-armhf)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=141&branchName=202311)
+[![Marvell(arm64)](https://dev.azure.com/mssonic/build/_apis/build/status/marvell/Azure.sonic-buildimage.official.marvell-arm64?branchName=202311&label=Marvell-arm64)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=999&branchName=202311)
+[![VS](https://dev.azure.com/mssonic/build/_apis/build/status/vs/Azure.sonic-buildimage.official.vs?branchName=202311&label=VS)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=142&branchName=202311)
+
 *202305 builds*:
 
 [![Barefoot](https://dev.azure.com/mssonic/build/_apis/build/status/barefoot/Azure.sonic-buildimage.official.barefoot?branchName=202205&label=Barefoot)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=146&branchName=202305)

From a0b2f0ad38042c444239b81e0fc324c436eb0a6b Mon Sep 17 00:00:00 2001
From: Guohan Lu <lguohan@gmail.com>
Date: Sat, 18 May 2024 23:43:38 -0700
Subject: [PATCH 0612/1115] [doc]: add pensando master build badge (#19003)

remove barefoot master build badge as it is no longer supported.

Signed-off-by: Guohan Lu <lguohan@gmail.com>
---
 README.md | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/README.md b/README.md
index 36a91619d..ae76a8937 100644
--- a/README.md
+++ b/README.md
@@ -1,6 +1,5 @@
 *master builds*:
 
-[![Barefoot](https://dev.azure.com/mssonic/build/_apis/build/status/barefoot/Azure.sonic-buildimage.official.barefoot?branchName=master&label=Barefoot)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=146&branchName=master)
 [![Broadcom](https://dev.azure.com/mssonic/build/_apis/build/status/broadcom/Azure.sonic-buildimage.official.broadcom?branchName=master&label=Broadcom)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=138&branchName=master)
 [![Centec](https://dev.azure.com/mssonic/build/_apis/build/status/centec/Azure.sonic-buildimage.official.centec?branchName=master&label=Centec)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=143&branchName=master)
 [![Centec(arm64)](https://dev.azure.com/mssonic/build/_apis/build/status/centec/Azure.sonic-buildimage.official.centec-arm64?branchName=master&label=Centec-arm64)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=140&branchName=master)
@@ -9,6 +8,7 @@
 [![Marvell(armhf)](https://dev.azure.com/mssonic/build/_apis/build/status/marvell/Azure.sonic-buildimage.official.marvell-armhf?branchName=master&label=Marvell-armhf)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=141&branchName=master)
 [![Marvell(arm64)](https://dev.azure.com/mssonic/build/_apis/build/status/marvell/Azure.sonic-buildimage.official.marvell-arm64?branchName=master&label=Marvell-arm64)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=999&branchName=master)
 [![Nephos](https://dev.azure.com/mssonic/build/_apis/build/status/nephos/Azure.sonic-buildimage.official.nephos?branchName=master&label=Nephos)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=149&branchName=master)
+[![Pensando](https://dev.azure.com/mssonic/build/_apis/build/status/pensando/Azure.sonic-buildimage.official.pensando?branchName=master&label=Pensando)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=1366&branchName=master)
 [![VS](https://dev.azure.com/mssonic/build/_apis/build/status/vs/Azure.sonic-buildimage.official.vs?branchName=master&label=VS)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=142&branchName=master)
 
 *202311 builds*:

From 6164d586ffaeabea175e05993855dc0fea41b623 Mon Sep 17 00:00:00 2001
From: Konstantin Vasin <126960927+k-v1@users.noreply.github.com>
Date: Sun, 19 May 2024 09:59:20 +0300
Subject: [PATCH 0613/1115] [Build]: fix DPKG cache for frr (#17475)

Fix #16713
Variable SMDEP_FILES is empty and smdep file is not generated for sonic-frr.
---
 rules/frr.dep | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/rules/frr.dep b/rules/frr.dep
index d113202cf..0e23860fc 100644
--- a/rules/frr.dep
+++ b/rules/frr.dep
@@ -9,7 +9,7 @@ DEP_FILES   += $(addprefix $(SPATH)/,$(shell cd $(SPATH) && git ls-files |grep -
 FRR_SPATH   := $(SPATH)/frr
 SMDEP_FILES := $(addprefix $(FRR_SPATH)/,$(shell cd $(FRR_SPATH) && git ls-files \
 			| grep -Ev -e 'debian/changelog$$$$' \
-			-e "$(find -L tests/ -xtype l)" \
+			-e "$$(find -L tests/ -xtype l)" \
 			))
 
 $(FRR)_CACHE_MODE  := GIT_CONTENT_SHA 

From 3b3fa200aba2988bc59750800865e469c49e1b6d Mon Sep 17 00:00:00 2001
From: Konstantin Vasin <126960927+k-v1@users.noreply.github.com>
Date: Sun, 19 May 2024 10:01:13 +0300
Subject: [PATCH 0614/1115] [build]: execute make reset only once (#17644)

It's enough to execute make reset only once.
Now it's executed 3 times.
---
 Makefile | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/Makefile b/Makefile
index 5318ce84c..ca2192f66 100644
--- a/Makefile
+++ b/Makefile
@@ -83,7 +83,7 @@ ifeq ($(NOBUSTER), 0)
 	$(MAKE) -f Makefile.work bullseye
 endif
 
-init:
+init reset:
 	@echo "+++ Making $@ +++"
 	$(MAKE) -f Makefile.work $@
 
@@ -108,7 +108,7 @@ $(PLATFORM_PATH):
 configure : $(PLATFORM_PATH)
 	$(call make_work, $@)
 
-clean reset showtag docker-cleanup sonic-slave-build sonic-slave-bash :
+clean showtag docker-cleanup sonic-slave-build sonic-slave-bash :
 	$(call make_work, $@)
 
 # Freeze the versions, see more detail options: scripts/versions_manager.py freeze -h

From d31e84ab348452e0f49bb5eff8740d21be29a057 Mon Sep 17 00:00:00 2001
From: Konstantin Vasin <126960927+k-v1@users.noreply.github.com>
Date: Sun, 19 May 2024 10:02:34 +0300
Subject: [PATCH 0615/1115] [build] enable pigz by default (#16959)

Why I did it
pigz, which stands for parallel implementation of gzip,
is a fully functional replacement for gzip that exploits multiple processors
and multiple cores to the hilt when compressing data.

We can use it for compression instead of gzip to speed up builds.
It reduces build time (especially at final stage where we compress whole file system).

But solution with special option GZ_COMPRESS_PROGRAM is not good,
because it's hard to maintain (developers need to pass this flag to every script).
I think it's better to remove this option at all and use pigz directly where it's possible.

How I did it
Remove config flag GZ_COMPRESS_PROGRAM
Use pigz directly instead of gzip where it's possible.

How to verify it
I have tested builds with pigz almost 1 year and no issues were detected.
So I think it's better to enable it by default for all builds.
If we found some issues we can always replace pigz with gzip.
---
 Makefile.work                      | 9 ---------
 build_debian.sh                    | 8 +++-----
 build_image.sh                     | 4 ++--
 rules/config                       | 4 ----
 slave.mk                           | 4 +---
 sonic-slave-bookworm/Dockerfile.j2 | 3 ++-
 sonic-slave-bullseye/Dockerfile.j2 | 3 ++-
 sonic-slave-buster/Dockerfile.j2   | 3 ++-
 sonic-slave-stretch/Dockerfile.j2  | 3 ++-
 9 files changed, 14 insertions(+), 27 deletions(-)

diff --git a/Makefile.work b/Makefile.work
index d66774ddc..58266149d 100644
--- a/Makefile.work
+++ b/Makefile.work
@@ -54,9 +54,6 @@
 #  * ENABLE_BOOTCHART: Enable SONiC bootchart
 #  *                 Default: n
 #  *                 Values: y,n
-#  * GZ_COMPRESS_PROGRAM: Select pigz to reduce build time
-#  *                 Default: gzip
-#  *                 Values: pigz,gzip
 #  * UNATTENDED: Don't wait for interactive input from terminal, setting this
 #  *             value to anything will enable it
 #  *             Default: unset
@@ -157,10 +154,6 @@ ifeq ($(LEGACY_SONIC_MGMT_DOCKER),)
 	override LEGACY_SONIC_MGMT_DOCKER = y
 endif
 
-ifneq ($(GZ_COMPRESS_PROGRAM), pigz)
-override GZ_COMPRESS_PROGRAM = gzip
-endif
-
 ifeq ($(CONFIGURED_ARCH),amd64)
 SLAVE_BASE_IMAGE = $(SLAVE_DIR)
 MULTIARCH_QEMU_ENVIRON = n
@@ -229,7 +222,6 @@ $(shell CONFIGURED_ARCH=$(CONFIGURED_ARCH) \
 	INCLUDE_FIPS=$(INCLUDE_FIPS) \
 	DOCKER_EXTRA_OPTS=$(DOCKER_EXTRA_OPTS) \
 	DEFAULT_CONTAINER_REGISTRY=$(DEFAULT_CONTAINER_REGISTRY) \
-	GZ_COMPRESS_PROGRAM=$(GZ_COMPRESS_PROGRAM) \
 	j2 $(SLAVE_DIR)/Dockerfile.j2 > $(SLAVE_DIR)/Dockerfile)
 
 $(shell CONFIGURED_ARCH=$(CONFIGURED_ARCH) \
@@ -587,7 +579,6 @@ SONIC_BUILD_INSTRUCTION :=  $(MAKE) \
                            SONIC_SLAVE_DOCKER_DRIVER=$(SONIC_SLAVE_DOCKER_DRIVER) \
                            MIRROR_URLS=$(MIRROR_URLS) \
                            MIRROR_SECURITY_URLS=$(MIRROR_SECURITY_URLS) \
-                           GZ_COMPRESS_PROGRAM=$(GZ_COMPRESS_PROGRAM) \
                            MIRROR_SNAPSHOT=$(MIRROR_SNAPSHOT) \
                            SONIC_VERSION_CONTROL_COMPONENTS=$(SONIC_VERSION_CONTROL_COMPONENTS) \
                            ONIE_IMAGE_PART_SIZE=$(ONIE_IMAGE_PART_SIZE) \
diff --git a/build_debian.sh b/build_debian.sh
index 2e054e716..a34f92c01 100755
--- a/build_debian.sh
+++ b/build_debian.sh
@@ -150,9 +150,7 @@ else
 fi
 
 ## docker and mkinitramfs on target system will use pigz/unpigz automatically
-if [[ $GZ_COMPRESS_PROGRAM == pigz ]]; then
-    sudo LANG=C chroot $FILESYSTEM_ROOT apt-get -y install pigz
-fi
+sudo LANG=C chroot $FILESYSTEM_ROOT apt-get -y install pigz
 
 ## Install initramfs-tools and linux kernel
 ## Note: initramfs-tools recommends depending on busybox, and we really want busybox for
@@ -879,8 +877,8 @@ if [[ $MULTIARCH_QEMU_ENVIRON == y || $CROSS_BUILD_ENVIRON == y ]]; then
 fi
 
 ## Compress docker files
-pushd $FILESYSTEM_ROOT && sudo tar -I $GZ_COMPRESS_PROGRAM -cf $OLDPWD/$FILESYSTEM_DOCKERFS -C ${DOCKERFS_PATH}var/lib/docker .; popd
+pushd $FILESYSTEM_ROOT && sudo tar -I pigz -cf $OLDPWD/$FILESYSTEM_DOCKERFS -C ${DOCKERFS_PATH}var/lib/docker .; popd
 
 ## Compress together with /boot, /var/lib/docker and $PLATFORM_DIR as an installer payload zip file
-pushd $FILESYSTEM_ROOT && sudo tar -I $GZ_COMPRESS_PROGRAM -cf platform.tar.gz -C $PLATFORM_DIR . && sudo zip -n .gz $OLDPWD/$INSTALLER_PAYLOAD -r boot/ platform.tar.gz; popd
+pushd $FILESYSTEM_ROOT && sudo tar -I pigz -cf platform.tar.gz -C $PLATFORM_DIR . && sudo zip -n .gz $OLDPWD/$INSTALLER_PAYLOAD -r boot/ platform.tar.gz; popd
 sudo zip -g -n .squashfs:.gz $INSTALLER_PAYLOAD $FILESYSTEM_SQUASHFS $FILESYSTEM_DOCKERFS
diff --git a/build_image.sh b/build_image.sh
index fe75bcaf3..571febe5c 100755
--- a/build_image.sh
+++ b/build_image.sh
@@ -60,10 +60,10 @@ generate_kvm_image()
         exit 1
     }
 
-    $GZ_COMPRESS_PROGRAM $KVM_IMAGE_DISK
+    pigz $KVM_IMAGE_DISK
 
     [ -r $KVM_IMAGE_DISK.gz ] || {
-        echo "Error : $GZ_COMPRESS_PROGRAM $KVM_IMAGE_DISK failed!"
+        echo "Error : pigz $KVM_IMAGE_DISK failed!"
         exit 1
     }
 
diff --git a/rules/config b/rules/config
index 2996d0f46..c54424c56 100644
--- a/rules/config
+++ b/rules/config
@@ -307,10 +307,6 @@ ENABLE_FIPS ?= n
 # SONIC_SLAVE_DOCKER_DRIVER - set the sonic slave docker storage driver
 SONIC_SLAVE_DOCKER_DRIVER ?= vfs
 
-# GZ_COMPRESS_PROGRAM - select pigz (a parallel implementation of gzip) to reduce a build time
-# and speed up a decompression of docker images on target system
-GZ_COMPRESS_PROGRAM ?= gzip
-
 # SONIC_OS_VERSION - sonic os version
 SONIC_OS_VERSION ?= 12
 
diff --git a/slave.mk b/slave.mk
index 783ca1ac0..b6eb08fee 100644
--- a/slave.mk
+++ b/slave.mk
@@ -92,7 +92,6 @@ export DOCKER_BASE_ARCH
 export CROSS_BUILD_ENVIRON
 export BLDENV
 export BUILD_WORKDIR
-export GZ_COMPRESS_PROGRAM
 export MIRROR_SNAPSHOT
 export SONIC_OS_VERSION
 export FILES_PATH
@@ -461,7 +460,6 @@ ifeq ($(CONFIGURED_PLATFORM),vs)
 $(info "BUILD_MULTIASIC_KVM"             : "$(BUILD_MULTIASIC_KVM)")
 endif
 $(info "CROSS_BUILD_ENVIRON"             : "$(CROSS_BUILD_ENVIRON)")
-$(info "GZ_COMPRESS_PROGRAM"             : "$(GZ_COMPRESS_PROGRAM)")
 $(info "LEGACY_SONIC_MGMT_DOCKER"        : "$(LEGACY_SONIC_MGMT_DOCKER)")
 $(info "INCLUDE_EXTERNAL_PATCHES"        : "$(INCLUDE_EXTERNAL_PATCHES)")
 $(info "PTF_ENV_PY_VER"                  : "$(PTF_ENV_PY_VER)")
@@ -553,7 +551,7 @@ define docker-image-save
     @echo "Tagging docker image $(1)-$(DOCKER_USERNAME):$(DOCKER_USERTAG) as $(1):$(call docker-get-tag,$(1))" $(LOG)
     docker tag $(1)-$(DOCKER_USERNAME):$(DOCKER_USERTAG) $(1):$(call docker-get-tag,$(1)) $(LOG)
     @echo "Saving docker image $(1):$(call docker-get-tag,$(1))" $(LOG)
-        docker save $(1):$(call docker-get-tag,$(1)) | $(GZ_COMPRESS_PROGRAM) -c > $(2)
+        docker save $(1):$(call docker-get-tag,$(1)) | pigz -c > $(2)
     if [ x$(SONIC_CONFIG_USE_NATIVE_DOCKERD_FOR_BUILD) == x"y" ]; then
         @echo "Removing docker image $(1):$(call docker-get-tag,$(1))" $(LOG)
         docker rmi -f $(1):$(call docker-get-tag,$(1)) $(LOG)
diff --git a/sonic-slave-bookworm/Dockerfile.j2 b/sonic-slave-bookworm/Dockerfile.j2
index 2c1b0e375..05f282f61 100644
--- a/sonic-slave-bookworm/Dockerfile.j2
+++ b/sonic-slave-bookworm/Dockerfile.j2
@@ -88,7 +88,8 @@ RUN apt-get update && apt-get install -y \
         curl \
         wget \
         unzip \
-        {{ GZ_COMPRESS_PROGRAM }} \
+        gzip \
+        pigz \
         git \
         build-essential \
         remake \
diff --git a/sonic-slave-bullseye/Dockerfile.j2 b/sonic-slave-bullseye/Dockerfile.j2
index 2e9a3b2e6..a0b453d4d 100644
--- a/sonic-slave-bullseye/Dockerfile.j2
+++ b/sonic-slave-bullseye/Dockerfile.j2
@@ -94,7 +94,8 @@ RUN apt-get update && apt-get install -y eatmydata && eatmydata apt-get install
         curl \
         wget \
         unzip \
-        {{ GZ_COMPRESS_PROGRAM }} \
+        gzip \
+        pigz \
         git \
         build-essential \
         remake \
diff --git a/sonic-slave-buster/Dockerfile.j2 b/sonic-slave-buster/Dockerfile.j2
index ac4108fac..151df8243 100644
--- a/sonic-slave-buster/Dockerfile.j2
+++ b/sonic-slave-buster/Dockerfile.j2
@@ -90,7 +90,8 @@ RUN apt-get update && apt-get install -y eatmydata && eatmydata apt-get install
         curl \
         wget \
         unzip \
-        {{ GZ_COMPRESS_PROGRAM }} \
+        gzip \
+        pigz \
         git \
         build-essential \
         remake \
diff --git a/sonic-slave-stretch/Dockerfile.j2 b/sonic-slave-stretch/Dockerfile.j2
index 5d2d345e2..280c8404a 100644
--- a/sonic-slave-stretch/Dockerfile.j2
+++ b/sonic-slave-stretch/Dockerfile.j2
@@ -23,7 +23,8 @@ RUN apt-get update && apt-get install -y \
         curl \
         wget \
         unzip \
-        {{ GZ_COMPRESS_PROGRAM }} \
+        gzip \
+        pigz \
         git \
         build-essential \
         libtool \

From 881abd309a2968ef3c89a763a70f7225fbc495d6 Mon Sep 17 00:00:00 2001
From: Konstantin Vasin <126960927+k-v1@users.noreply.github.com>
Date: Sun, 19 May 2024 10:08:06 +0300
Subject: [PATCH 0616/1115] enable MIRROR_SNAPSHOT if
 SONIC_VERSION_CONTROL_COMPONENTS includes deb (#17148)

Fix #17113
If we set MIRROR_SNAPSHOT=y in build_mirror_config.sh
then we have incorrect value of MIRROR_SNAPSHOT in other places like buildinfo/config/buildinfo.config

How I did it
Override MIRROR_SNAPSHOT=y in rules/config if
SONIC_VERSION_CONTROL_COMPONENTS=all or
SONIC_VERSION_CONTROL_COMPONENTS includes deb component.

How to verify it
Start to build with different values of SONIC_VERSION_CONTROL_COMPONENTS and MIRROR_SNAPSHOT in cmdline
and check value of MIRROR_SNAPSHOT in buildinfo.config and debian mirrors in sources.list files
---
 rules/config                   | 8 ++++++++
 scripts/build_mirror_config.sh | 2 +-
 2 files changed, 9 insertions(+), 1 deletion(-)

diff --git a/rules/config b/rules/config
index c54424c56..d081fd5aa 100644
--- a/rules/config
+++ b/rules/config
@@ -262,6 +262,14 @@ TRUSTED_GPG_URLS = https://packages.trafficmanager.net/debian/public_key.gpg,htt
 #   docker: docker base images
 SONIC_VERSION_CONTROL_COMPONENTS ?= none
 
+ifeq ($(SONIC_VERSION_CONTROL_COMPONENTS),all)
+override MIRROR_SNAPSHOT = y
+endif
+
+ifneq (,$(findstring deb,$(SONIC_VERSION_CONTROL_COMPONENTS)))
+override MIRROR_SNAPSHOT = y
+endif
+
 # MIRROR_SNAPSHOT - support mirror snapshot flag
 MIRROR_SNAPSHOT ?= n
 
diff --git a/scripts/build_mirror_config.sh b/scripts/build_mirror_config.sh
index 971390d00..be67052ce 100755
--- a/scripts/build_mirror_config.sh
+++ b/scripts/build_mirror_config.sh
@@ -11,7 +11,7 @@ export APT_RETRIES_COUNT
 
 DEFAULT_MIRROR_URL_PREFIX=http://packages.trafficmanager.net
 MIRROR_VERSION_FILE=
-[[ "$SONIC_VERSION_CONTROL_COMPONENTS" == *deb* || $SONIC_VERSION_CONTROL_COMPONENTS == *all* ]] && MIRROR_VERSION_FILE=files/build/versions/default/versions-mirror && MIRROR_SNAPSHOT=y
+[[ "$SONIC_VERSION_CONTROL_COMPONENTS" == *deb* || $SONIC_VERSION_CONTROL_COMPONENTS == *all* ]] && MIRROR_VERSION_FILE=files/build/versions/default/versions-mirror
 [ -f target/versions/default/versions-mirror ] && MIRROR_VERSION_FILE=target/versions/default/versions-mirror
 
 # The default mirror urls

From 60b1440f58476278d771b2a1d5e0044297985db7 Mon Sep 17 00:00:00 2001
From: Konstantin Vasin <126960927+k-v1@users.noreply.github.com>
Date: Sun, 19 May 2024 10:18:26 +0300
Subject: [PATCH 0617/1115] [Build]: Fix dpkg lock (#15735)

Fix #15722

We don't need to use a lock file every time we call dpkg.
For some commands, like dpkg --print-architecture or dpkg --compare-versions, this action is not required.
Moreover, sometimes these commands are called by apt-get and dpkg -i, and we get a deadlock in this case.

How I did it
Use dpkg lock only for dpkg commands that use /var/lib/dpkg/lock or /var/lib/dpkg/lock-frontend.
I mean dpkg -i, dpkg -P, ...

How to verify it
Check there is no dpkg lock errors in build log.
Check build time of docker-sonic-vs.gz:

old:
08:57:14[ building ] [ target/docker-sonic-vs.gz ]
09:12:47 [ finished ] [ target/docker-sonic-vs.gz ]

new:
01:45:12[ building ] [ target/docker-sonic-vs.gz ]
01:50:39 [ finished ] [ target/docker-sonic-vs.gz ]
---
 src/sonic-build-hooks/hooks/dpkg              | 13 +++-----
 .../scripts/buildinfo_base.sh                 | 33 +++++++++++++++++++
 2 files changed, 38 insertions(+), 8 deletions(-)

diff --git a/src/sonic-build-hooks/hooks/dpkg b/src/sonic-build-hooks/hooks/dpkg
index 294cb19f4..da810d2ac 100755
--- a/src/sonic-build-hooks/hooks/dpkg
+++ b/src/sonic-build-hooks/hooks/dpkg
@@ -2,17 +2,14 @@
 
 . /usr/local/share/buildinfo/scripts/buildinfo_base.sh
 REAL_COMMAND=$(get_command dpkg)
-COMMAND_INFO="Locked by command: $REAL_COMMAND $@"
-NEED_RELEASE_LOCK=n
-if [[ "$DPKG_HOOK_LOCKED" != "y" ]];then
+COMMAND_INFO="Locked by command: $REAL_COMMAND $*"
+DPKG_NEED_LOCK=$(check_dpkg_need_lock "$@")
+
+if [ "$DPKG_NEED_LOCK" == "y" ]; then
     lock_result=$(acquire_apt_installation_lock "$COMMAND_INFO" )
-    export DPKG_HOOK_LOCKED=y
-    NEED_RELEASE_LOCK=y
 fi
+
 $REAL_COMMAND "$@"
 command_result=$?
-if [[ "$NEED_RELEASE_LOCK" == "y" ]];then
-    unset DPKG_HOOK_LOCKED
-fi
 [ "$lock_result" == y ] && release_apt_installation_lock
 exit $command_result
diff --git a/src/sonic-build-hooks/scripts/buildinfo_base.sh b/src/sonic-build-hooks/scripts/buildinfo_base.sh
index bb64a2466..9adcb1d3b 100755
--- a/src/sonic-build-hooks/scripts/buildinfo_base.sh
+++ b/src/sonic-build-hooks/scripts/buildinfo_base.sh
@@ -388,6 +388,39 @@ check_apt_install()
     done
 }
 
+# Check if we need to use apt_installation_lock for this dpkg command
+check_dpkg_need_lock()
+{
+    for para in "$@"
+    do
+        if [ "$para" == "-i" ] || [ "$para" == "--install" ]; then
+            echo y
+            break
+        fi
+
+        if [ "$para" == "-P"  ] || [ "$para" == "--purge" ]; then
+            echo y
+            break
+        fi
+
+        if [ "$para" == "-r"  ] || [ "$para" == "--remove" ]; then
+            echo y
+            break
+        fi
+
+        if [ "$para" == "--unpack"  ] || [ "$para" == "--configure" ]; then
+            echo y
+            break
+        fi
+
+        if [ "$para" == "--update-avail"  ] || [ "$para" == "--merge-avail" ] || [ "$para" == "--clear-avail" ]; then
+            echo y
+            break
+        fi
+
+    done
+}
+
 # Print warning message if a debian package version not specified when debian version control enabled.
 check_apt_version()
 {

From 021a383bd0839ba212965036318653fcdc5515e4 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sun, 19 May 2024 16:01:02 +0800
Subject: [PATCH 0618/1115] [submodule] Update submodule sonic-swss to the
 latest HEAD automatically (#19000)

#### Why I did it
src/sonic-swss
```
* 536f43a9 - (HEAD -> master, origin/master, origin/HEAD) [Orchagent] Recursive nexthop group enhancement (#3105) (10 hours ago) [Utpal]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-swss | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-swss b/src/sonic-swss
index 84ce1a7c9..536f43a93 160000
--- a/src/sonic-swss
+++ b/src/sonic-swss
@@ -1 +1 @@
-Subproject commit 84ce1a7c9cf50bf6719d710f3ee3e5286998bf8b
+Subproject commit 536f43a93900c4d684f9defea922d495b6157be9

From 1b0e40762c0536ebebaf1d3f8541479893620409 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sun, 19 May 2024 16:01:13 +0800
Subject: [PATCH 0619/1115] [submodule] Update submodule sonic-host-services to
 the latest HEAD automatically (#18992)

#### Why I did it
src/sonic-host-services
```
* 246f2d2 - (HEAD -> master, origin/master, origin/HEAD) Added a try block to prevent JSON decoder errors (#126) (30 hours ago) [Ashwin Srinivasan]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-host-services | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-host-services b/src/sonic-host-services
index 10bfa901a..246f2d2e6 160000
--- a/src/sonic-host-services
+++ b/src/sonic-host-services
@@ -1 +1 @@
-Subproject commit 10bfa901a78d678edc7ed00187f7d97870b22e26
+Subproject commit 246f2d2e629947c1f77a9caa8fd6bfd0725b1a77

From 11b80b110a9f99c898bf8587f2c32a09a49d3d3b Mon Sep 17 00:00:00 2001
From: Saikrishna Arcot <sarcot@microsoft.com>
Date: Sun, 19 May 2024 09:41:36 -0700
Subject: [PATCH 0620/1115] [redis]: Update save disable code for new Redis
 version (#18979)

With the upgrade of docker-database to Bookworm and the new Redis
version that was brought in, database saves are enabled by default.
However, we don't use (and maybe don't want, at this time) those
database saves.

Restore the old behavior by modifying `/etc/redis/redis.conf` to not
save at all.

Signed-off-by: Saikrishna Arcot <sarcot@microsoft.com>
---
 dockers/docker-database/Dockerfile.j2 | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/dockers/docker-database/Dockerfile.j2 b/dockers/docker-database/Dockerfile.j2
index b73762da5..6f39d0ac5 100644
--- a/dockers/docker-database/Dockerfile.j2
+++ b/dockers/docker-database/Dockerfile.j2
@@ -28,7 +28,7 @@ RUN apt-get clean -y                                  && \
     apt-get autoclean -y                              && \
     apt-get autoremove -y                             && \
     rm -rf /debs ~/.cache                             && \
-    sed -ri 's/^(save .*$)/# \1/g;                       \
+    sed -ri 's/^# save ""$/save ""/g;                    \
              s/^daemonize yes$/daemonize no/;            \
              s/^logfile .*$/logfile ""/;                 \
              s/^# syslog-enabled no$/syslog-enabled no/; \

From 1da090aa3c84fdd91d4bbb211a4611dda007c94a Mon Sep 17 00:00:00 2001
From: Yutong Zhang <90831468+yutongzhang-microsoft@users.noreply.github.com>
Date: Mon, 20 May 2024 16:07:09 +0800
Subject: [PATCH 0621/1115] Add a separate non-blocking PR check for onboarding
 new tests(T0). (#18944)

We are going to onboard a batch of test cases into PR test recently. To achieve this without disrupting the existing PR test processes, we add a separate non-blocking PR checker for onboarding new tests.
---
 azure-pipelines.yml | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/azure-pipelines.yml b/azure-pipelines.yml
index cafd813e5..b87dfc41c 100644
--- a/azure-pipelines.yml
+++ b/azure-pipelines.yml
@@ -261,6 +261,21 @@ stages:
           MAX_WORKER: $(T0_SONIC_INSTANCE_NUM)
           MGMT_BRANCH: $(BUILD_BRANCH)
 
+  - job: onboarding_elastictest_t0
+    displayName: "onboarding testcases by Elastictest"
+    timeoutInMinutes: 240
+    continueOnError: true
+    pool: ubuntu-20.04
+    steps:
+      - template: .azure-pipelines/run-test-elastictest-template.yml@sonic-mgmt
+        parameters:
+          TOPOLOGY: t0
+          MIN_WORKER: $(T0_ONBOARDING_SONIC_INSTANCE_NUM)
+          MAX_WORKER: $(T0_ONBOARDING_SONIC_INSTANCE_NUM)
+          KVM_IMAGE_BRANCH: $(BUILD_BRANCH)
+          MGMT_BRANCH: $(BUILD_BRANCH)
+          TEST_SET: onboarding_t0
+
 
 #  - job: wan_elastictest
 #    displayName: "kvmtest-wan by Elastictest"

From db50ce970d017d4684762b3ef93a30e80ef71caa Mon Sep 17 00:00:00 2001
From: Liu Shilong <shilongliu@microsoft.com>
Date: Tue, 21 May 2024 10:32:56 +0800
Subject: [PATCH 0622/1115] [build] docker-gnmi is migrate to bookworm. Fix the
 dependency. (#19011)

Why I did it
docker-telemetry depends on gnmi.
gnmi migrates from bullseye to bookworm. It breaks the build for docker telemetry.

Work item tracking
Microsoft ADO (number only): 28133591
How I did it
How to verify it
---
 rules/docker-telemetry.mk | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/rules/docker-telemetry.mk b/rules/docker-telemetry.mk
index 8f2324080..4ccd2781b 100644
--- a/rules/docker-telemetry.mk
+++ b/rules/docker-telemetry.mk
@@ -16,7 +16,7 @@ $(DOCKER_TELEMETRY)_PACKAGE_NAME = telemetry
 $(DOCKER_TELEMETRY)_DBG_IMAGE_PACKAGES = $($(DOCKER_GNMI)_DBG_IMAGE_PACKAGES)
 
 SONIC_DOCKER_IMAGES += $(DOCKER_TELEMETRY)
-SONIC_BULLSEYE_DOCKERS += $(DOCKER_TELEMETRY)
+SONIC_BOOKWORM_DOCKERS += $(DOCKER_TELEMETRY)
 ifeq ($(INCLUDE_SYSTEM_TELEMETRY), y)
 SONIC_INSTALL_DOCKER_IMAGES += $(DOCKER_TELEMETRY)
 endif

From 7eb6cd81b6cb1537d4e5e20bcb21984c8553594e Mon Sep 17 00:00:00 2001
From: Yaqiang Zhu <zyq1512099831@gmail.com>
Date: Tue, 21 May 2024 12:04:55 +0800
Subject: [PATCH 0623/1115] [bgp] Remove unnecessary print in bgpcfd ut
 (#19010)

Why I did it
Remove unnecessary print introduced by #18764

Work item tracking
Microsoft ADO (number only): 27801007
How I did it
Remove unnecessary print introduced by #18764

How to verify it
UT passed
---
 src/sonic-bgpcfgd/tests/test_sonic-cfggen.py | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/src/sonic-bgpcfgd/tests/test_sonic-cfggen.py b/src/sonic-bgpcfgd/tests/test_sonic-cfggen.py
index b5685b733..acbd3b53c 100644
--- a/src/sonic-bgpcfgd/tests/test_sonic-cfggen.py
+++ b/src/sonic-bgpcfgd/tests/test_sonic-cfggen.py
@@ -24,9 +24,6 @@ def run_test(name, template_path, json_path, match_path):
     with open(match_path) as result_fp:
         raw_saved_result = result_fp.read()
     canonical_saved_result = ConfigMgr.to_canonical(raw_saved_result)
-    print(canonical_generated_result)
-    print("----")
-    print(canonical_saved_result)
     assert canonical_saved_result == canonical_generated_result, "Test %s" % name
 
 

From bf556c5cd72b328692403756d35972a28211ad39 Mon Sep 17 00:00:00 2001
From: Yuanzhe <150663541+yuazhe@users.noreply.github.com>
Date: Tue, 21 May 2024 13:52:33 +0800
Subject: [PATCH 0624/1115] [Mellanox] Fix 4600c sensors.conf inverted psu
 number designation (#18722)

- Why I did it
This PR is used to standardize several sensors.conf psu section
I. Fix 4600/4600c inverted psu number designation
II. Fix 5600 second psu miss set_power_cap label
III. Standardized comments

- How to verify it
check sensors command output

Signed-off-by: Yuanzhe, Liu <yualiu@nvidia.com>
---
 .../x86_64-mlnx_msn2010-r0/sensors.conf       |  2 +-
 .../x86_64-mlnx_msn4600-r0/sensors.conf       | 28 +++++++--------
 .../x86_64-mlnx_msn4600c-r0/sensors.conf      | 34 +++++++++----------
 .../sensors_respin.conf                       | 34 +++++++++----------
 .../x86_64-nvidia_sn2201-r0/sensors.conf      |  2 +-
 .../x86_64-nvidia_sn5600-r0/sensors.conf      |  1 +
 6 files changed, 51 insertions(+), 50 deletions(-)

diff --git a/device/mellanox/x86_64-mlnx_msn2010-r0/sensors.conf b/device/mellanox/x86_64-mlnx_msn2010-r0/sensors.conf
index 9bcfcbe21..92d742c18 100644
--- a/device/mellanox/x86_64-mlnx_msn2010-r0/sensors.conf
+++ b/device/mellanox/x86_64-mlnx_msn2010-r0/sensors.conf
@@ -15,7 +15,7 @@ bus "i2c-7" "i2c-1-mux (chan_id 6)"
     chip "lm75-i2c-*-4b"
         label temp1 "Ambient Fan Side Temp (air intake)"
 
-# Power supplies
+# Power controllers
 bus "i2c-5" "i2c-1-mux (chan_id 4)"
     chip "tps53679-i2c-*-70"
         label in1 "PMIC-1 PSU 12V Rail (in1)"
diff --git a/device/mellanox/x86_64-mlnx_msn4600-r0/sensors.conf b/device/mellanox/x86_64-mlnx_msn4600-r0/sensors.conf
index 8443e1b11..4c374a839 100644
--- a/device/mellanox/x86_64-mlnx_msn4600-r0/sensors.conf
+++ b/device/mellanox/x86_64-mlnx_msn4600-r0/sensors.conf
@@ -162,20 +162,6 @@ bus "i2c-15" "i2c-1-mux (chan_id 6)"
 # Power supplies
 bus "i2c-4" "i2c-1-mux (chan_id 3)"
     chip "dps460-i2c-*-58"
-        label in1 "PSU-1(L) 220V Rail (in)"
-        ignore in2
-        label in3 "PSU-1(L) 12V Rail (out)"
-        label fan1 "PSU-1(L) Fan 1"
-        ignore fan2
-        ignore fan3
-        label temp1 "PSU-1(L) Temp 1"
-        label temp2 "PSU-1(L) Temp 2"
-        label temp3 "PSU-1(L) Temp 3"
-        label power1 "PSU-1(L) 220V Rail Pwr (in)"
-        label power2 "PSU-1(L) 12V Rail Pwr (out)"
-        label curr1 "PSU-1(L) 220V Rail Curr (in)"
-        label curr2 "PSU-1(L) 12V Rail Curr (out)"
-    chip "dps460-i2c-*-59"
         label in1 "PSU-2(R) 220V Rail (in)"
         ignore in2
         label in3 "PSU-2(R) 12V Rail (out)"
@@ -189,6 +175,20 @@ bus "i2c-4" "i2c-1-mux (chan_id 3)"
         label power2 "PSU-2(R) 12V Rail Pwr (out)"
         label curr1 "PSU-2(R) 220V Rail Curr (in)"
         label curr2 "PSU-2(R) 12V Rail Curr (out)"
+    chip "dps460-i2c-*-59"
+        label in1 "PSU-1(L) 220V Rail (in)"
+        ignore in2
+        label in3 "PSU-1(L) 12V Rail (out)"
+        label fan1 "PSU-1(L) Fan 1"
+        ignore fan2
+        ignore fan3
+        label temp1 "PSU-1(L) Temp 1"
+        label temp2 "PSU-1(L) Temp 2"
+        label temp3 "PSU-1(L) Temp 3"
+        label power1 "PSU-1(L) 220V Rail Pwr (in)"
+        label power2 "PSU-1(L) 12V Rail Pwr (out)"
+        label curr1 "PSU-1(L) 220V Rail Curr (in)"
+        label curr2 "PSU-1(L) 12V Rail Curr (out)"
 
 # Chassis fans
 chip "mlxreg_fan-isa-*"
diff --git a/device/mellanox/x86_64-mlnx_msn4600c-r0/sensors.conf b/device/mellanox/x86_64-mlnx_msn4600c-r0/sensors.conf
index 02f811b6c..4f60ceb02 100644
--- a/device/mellanox/x86_64-mlnx_msn4600c-r0/sensors.conf
+++ b/device/mellanox/x86_64-mlnx_msn4600c-r0/sensors.conf
@@ -220,23 +220,6 @@ bus "i2c-15" "i2c-1-mux (chan_id 6)"
 # Power supplies
 bus "i2c-4" "i2c-1-mux (chan_id 3)"
     chip "dps460-i2c-*-58"
-        label in1 "PSU-1(L) 220V Rail (in)"
-        ignore in2
-        label in3 "PSU-1(L) 12V Rail (out)"
-        label fan1 "PSU-1(L) Fan 1"
-        ignore fan2
-        ignore fan3
-        label temp1 "PSU-1(L) Temp 1"
-        label temp2 "PSU-1(L) Temp 2"
-        label temp3 "PSU-1(L) Temp 3"
-        label power1 "PSU-1(L) 220V Rail Pwr (in)"
-        label power2 "PSU-1(L) 12V Rail Pwr (out)"
-        label curr1 "PSU-1(L) 220V Rail Curr (in)"
-        label curr2 "PSU-1(L) 12V Rail Curr (out)"
-        set in3_lcrit in3_crit * 0.662
-        set in3_min in3_crit * 0.745
-        set in3_max in3_crit * 0.952
-    chip "dps460-i2c-*-59"
         label in1 "PSU-2(R) 220V Rail (in)"
         ignore in2
         label in3 "PSU-2(R) 12V Rail (out)"
@@ -253,6 +236,23 @@ bus "i2c-4" "i2c-1-mux (chan_id 3)"
         set in3_lcrit in3_crit * 0.662
         set in3_min in3_crit * 0.745
         set in3_max in3_crit * 0.952
+    chip "dps460-i2c-*-59"
+        label in1 "PSU-1(L) 220V Rail (in)"
+        ignore in2
+        label in3 "PSU-1(L) 12V Rail (out)"
+        label fan1 "PSU-1(L) Fan 1"
+        ignore fan2
+        ignore fan3
+        label temp1 "PSU-1(L) Temp 1"
+        label temp2 "PSU-1(L) Temp 2"
+        label temp3 "PSU-1(L) Temp 3"
+        label power1 "PSU-1(L) 220V Rail Pwr (in)"
+        label power2 "PSU-1(L) 12V Rail Pwr (out)"
+        label curr1 "PSU-1(L) 220V Rail Curr (in)"
+        label curr2 "PSU-1(L) 12V Rail Curr (out)"
+        set in3_lcrit in3_crit * 0.662
+        set in3_min in3_crit * 0.745
+        set in3_max in3_crit * 0.952
 
 # Chassis fans
 chip "mlxreg_fan-isa-*"
diff --git a/device/mellanox/x86_64-mlnx_msn4600c-r0/sensors_respin.conf b/device/mellanox/x86_64-mlnx_msn4600c-r0/sensors_respin.conf
index 4cf7b71ef..0e346b31e 100644
--- a/device/mellanox/x86_64-mlnx_msn4600c-r0/sensors_respin.conf
+++ b/device/mellanox/x86_64-mlnx_msn4600c-r0/sensors_respin.conf
@@ -255,23 +255,6 @@ bus "i2c-15" "i2c-1-mux (chan_id 6)"
 # Power supplies
 bus "i2c-4" "i2c-1-mux (chan_id 3)"
     chip "dps460-i2c-*-58"
-        label in1 "PSU-1(L) 220V Rail (in)"
-        ignore in2
-        label in3 "PSU-1(L) 12V Rail (out)"
-        label fan1 "PSU-1(L) Fan 1"
-        ignore fan2
-        ignore fan3
-        label temp1 "PSU-1(L) Temp 1"
-        label temp2 "PSU-1(L) Temp 2"
-        label temp3 "PSU-1(L) Temp 3"
-        label power1 "PSU-1(L) 220V Rail Pwr (in)"
-        label power2 "PSU-1(L) 12V Rail Pwr (out)"
-        label curr1 "PSU-1(L) 220V Rail Curr (in)"
-        label curr2 "PSU-1(L) 12V Rail Curr (out)"
-        set in3_lcrit in3_crit * 0.662
-        set in3_min in3_crit * 0.745
-        set in3_max in3_crit * 0.952
-    chip "dps460-i2c-*-59"
         label in1 "PSU-2(R) 220V Rail (in)"
         ignore in2
         label in3 "PSU-2(R) 12V Rail (out)"
@@ -288,6 +271,23 @@ bus "i2c-4" "i2c-1-mux (chan_id 3)"
         set in3_lcrit in3_crit * 0.662
         set in3_min in3_crit * 0.745
         set in3_max in3_crit * 0.952
+    chip "dps460-i2c-*-59"
+        label in1 "PSU-1(L) 220V Rail (in)"
+        ignore in2
+        label in3 "PSU-1(L) 12V Rail (out)"
+        label fan1 "PSU-1(L) Fan 1"
+        ignore fan2
+        ignore fan3
+        label temp1 "PSU-1(L) Temp 1"
+        label temp2 "PSU-1(L) Temp 2"
+        label temp3 "PSU-1(L) Temp 3"
+        label power1 "PSU-1(L) 220V Rail Pwr (in)"
+        label power2 "PSU-1(L) 12V Rail Pwr (out)"
+        label curr1 "PSU-1(L) 220V Rail Curr (in)"
+        label curr2 "PSU-1(L) 12V Rail Curr (out)"
+        set in3_lcrit in3_crit * 0.662
+        set in3_min in3_crit * 0.745
+        set in3_max in3_crit * 0.952        
 
 # Chassis fans
 chip "mlxreg_fan-isa-*"
diff --git a/device/mellanox/x86_64-nvidia_sn2201-r0/sensors.conf b/device/mellanox/x86_64-nvidia_sn2201-r0/sensors.conf
index 908ebe7c1..5024abd70 100644
--- a/device/mellanox/x86_64-nvidia_sn2201-r0/sensors.conf
+++ b/device/mellanox/x86_64-nvidia_sn2201-r0/sensors.conf
@@ -130,7 +130,7 @@ bus "i2c-8" "i2c-1-mux (chan_id 6)"
         label in8 "MONITOR CPU Board V1P8"
         label in9 "MONITOR CPU Board V1P24"
 
-# PSU PMBus sensors
+# Power supplies
 bus "i2c-3" "i2c-1-mux (chan_id 1)"
     chip "pmbus-i2c-3-58"
         label in1 "PSU-1 220V Rail(in)"
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/sensors.conf b/device/mellanox/x86_64-nvidia_sn5600-r0/sensors.conf
index 2a78b7cd6..e64aabae6 100644
--- a/device/mellanox/x86_64-nvidia_sn5600-r0/sensors.conf
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/sensors.conf
@@ -288,6 +288,7 @@ chip "dps460-i2c-*-5a"
     label power2 "PSU-2(R) 12V Rail Pwr (out)"
     label curr1 "PSU-2(R) 220V Rail Curr (in)"
     label curr2 "PSU-2(R) 12V Rail Curr (out)"
+    set power2_cap 0
 
 # Power converters
 chip "pmbus-i2c-*-10"

From 44d16d1fd950a51716e70a9c31d4c53b0a97e215 Mon Sep 17 00:00:00 2001
From: Stephen Sun <5379172+stephenxs@users.noreply.github.com>
Date: Tue, 21 May 2024 21:57:28 +0800
Subject: [PATCH 0625/1115]  [Mellanox] Avoid returning NoneType while reading
 0 byte from SPF's EEPROM (#18964)

- Why I did it
Avoid returning NoneType while reading 0 byte from SFP's EEPROM

In CMIS CDB it is possible to read 0 byte from SFP's EEPROM. It will throw an exception if the platform API returns' NoneType'.
We would like to return bytearray(0) here to avoid such exceptions.

Signed-off-by: Stephen Sun <stephens@nvidia.com>
---
 platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py | 2 +-
 platform/mellanox/mlnx-platform-api/tests/test_sfp.py     | 2 ++
 2 files changed, 3 insertions(+), 1 deletion(-)

diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py b/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py
index 35d5904a1..e7874a658 100644
--- a/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py
+++ b/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py
@@ -507,7 +507,7 @@ def _read_eeprom(self, offset, num_bytes, log_on_error=True):
         Returns:
             bytearray: the content of EEPROM
         """
-        result = None
+        result = bytearray(0)
         while num_bytes > 0:
             _, page, page_offset = self._get_page_and_page_offset(offset)
             if not page:
diff --git a/platform/mellanox/mlnx-platform-api/tests/test_sfp.py b/platform/mellanox/mlnx-platform-api/tests/test_sfp.py
index 98246c295..92f5d0d51 100644
--- a/platform/mellanox/mlnx-platform-api/tests/test_sfp.py
+++ b/platform/mellanox/mlnx-platform-api/tests/test_sfp.py
@@ -149,6 +149,8 @@ def test_sfp_read_eeprom(self, mock_get_page):
         mo = mock.mock_open()
         with mock.patch('sonic_platform.sfp.open', mo):
             handle = mo()
+            assert sfp.read_eeprom(0, 0) == bytearray(0)
+
             handle.read.return_value = b'\x00'
             assert sfp.read_eeprom(0, 1) == bytearray([0])
             handle.seek.assert_called_once_with(0)

From 518c3bc7a9cf5293fcc2a0c76298f83073b1a974 Mon Sep 17 00:00:00 2001
From: Kumaresh Perumal <kperumal@microsoft.com>
Date: Tue, 21 May 2024 12:16:06 -0700
Subject: [PATCH 0626/1115] [swss]: Add default ECMP/LAG hash offset values for
 T0 and T1 (#18912)

To avoid ECMP polarization, hash offset values are set from orchagent.

Earlier, vendor SDK sets the hash_offset value internally with the same value as hash_seed. After introduction of SAI attributes(SAI_SWITCH_ATTR_ECMP_DEFAULT_HASH_OFFSET/SAI_SWITCH_ATTR_LAG_DEFAULT_HASH_OFFSET), those changes in SDK were removed causing imbalance of traffic in T1s.

This change will pass the ECMP/LAG HASH_OFFSET values from orchagent to SAI and set them in ASIC.

Different ECMP/LAG hash_offset values are set for T0 and T1 in swss switch.json(ecmp_hash_offset and lag_hash_offset). Values are different for T0 and T1 to avoid ECMP/LAG hash polarization.
As part of switch initialization, these values are passed to switch orchagent.
Switch orchagent process these values and call SAI switch API to set these values.

Will be merged after swss changes: sonic-net/sonic-swss#3138

sonic-mgmt - sonic-net/sonic-mgmt#12765

Microsoft ADO (number only): 25873808
---
 dockers/docker-orchagent/switch.json.j2                     | 6 ++++++
 .../tests/sample_output/t0-switch-masic1.json               | 2 ++
 .../tests/sample_output/t0-switch-masic3.json               | 2 ++
 src/sonic-config-engine/tests/sample_output/t0-switch.json  | 2 ++
 src/sonic-config-engine/tests/sample_output/t1-switch.json  | 2 ++
 5 files changed, 14 insertions(+)

diff --git a/dockers/docker-orchagent/switch.json.j2 b/dockers/docker-orchagent/switch.json.j2
index 5816cecac..565d6b500 100644
--- a/dockers/docker-orchagent/switch.json.j2
+++ b/dockers/docker-orchagent/switch.json.j2
@@ -2,11 +2,15 @@
 {# set default hash seed to 0 #}
 {% set hash_seed = 0 %}
 {% set hash_seed_offset = 0 %}
+{% set ecmp_hash_offset_value = 0 %}
+{% set lag_hash_offset_value = 0 %}
 {% if DEVICE_METADATA.localhost.type %}
 {% if "ToRRouter" in DEVICE_METADATA.localhost.type or DEVICE_METADATA.localhost.type in ["EPMS", "MgmtTsToR"] %}
 {% set hash_seed = 0 %}
 {% elif "LeafRouter" in DEVICE_METADATA.localhost.type %}
 {% set hash_seed = 10 %}
+{% set ecmp_hash_offset_value = 10 %}
+{% set lag_hash_offset_value = 10 %}
 {% elif "SpineRouter" in DEVICE_METADATA.localhost.type %}
 {% set hash_seed = 25 %}
 {% endif %}
@@ -22,6 +26,8 @@
             "ecmp_hash_seed": "{{ hash_seed_value }}",
             "lag_hash_seed": "{{ hash_seed_value }}",
             "fdb_aging_time": "600",
+            "ecmp_hash_offset": "{{ ecmp_hash_offset_value }}",
+            "lag_hash_offset": "{{ lag_hash_offset_value }}",
 {% if DEVICE_METADATA.localhost.type and "LeafRouter" in DEVICE_METADATA.localhost.type %}
             "ordered_ecmp": "true"
 {% else %}
diff --git a/src/sonic-config-engine/tests/sample_output/t0-switch-masic1.json b/src/sonic-config-engine/tests/sample_output/t0-switch-masic1.json
index 83ca9f50a..d64c5070f 100644
--- a/src/sonic-config-engine/tests/sample_output/t0-switch-masic1.json
+++ b/src/sonic-config-engine/tests/sample_output/t0-switch-masic1.json
@@ -4,6 +4,8 @@
             "ecmp_hash_seed": "11",
             "lag_hash_seed": "11",
             "fdb_aging_time": "600",
+            "ecmp_hash_offset": "10",
+            "lag_hash_offset": "10",
             "ordered_ecmp": "true"
         },
         "OP": "SET"
diff --git a/src/sonic-config-engine/tests/sample_output/t0-switch-masic3.json b/src/sonic-config-engine/tests/sample_output/t0-switch-masic3.json
index db5d1b6e4..2f91d5664 100644
--- a/src/sonic-config-engine/tests/sample_output/t0-switch-masic3.json
+++ b/src/sonic-config-engine/tests/sample_output/t0-switch-masic3.json
@@ -4,6 +4,8 @@
             "ecmp_hash_seed": "13",
             "lag_hash_seed": "13",
             "fdb_aging_time": "600",
+            "ecmp_hash_offset": "10",
+            "lag_hash_offset": "10",
             "ordered_ecmp": "true"
         },
         "OP": "SET"
diff --git a/src/sonic-config-engine/tests/sample_output/t0-switch.json b/src/sonic-config-engine/tests/sample_output/t0-switch.json
index d585ca2a5..1dda7c549 100644
--- a/src/sonic-config-engine/tests/sample_output/t0-switch.json
+++ b/src/sonic-config-engine/tests/sample_output/t0-switch.json
@@ -4,6 +4,8 @@
             "ecmp_hash_seed": "0",
             "lag_hash_seed": "0",
             "fdb_aging_time": "600",
+            "ecmp_hash_offset": "0",
+            "lag_hash_offset": "0",
             "ordered_ecmp": "false"
         },
         "OP": "SET"
diff --git a/src/sonic-config-engine/tests/sample_output/t1-switch.json b/src/sonic-config-engine/tests/sample_output/t1-switch.json
index 3b3b79591..bc5a02b21 100644
--- a/src/sonic-config-engine/tests/sample_output/t1-switch.json
+++ b/src/sonic-config-engine/tests/sample_output/t1-switch.json
@@ -4,6 +4,8 @@
             "ecmp_hash_seed": "10",
             "lag_hash_seed": "10",
             "fdb_aging_time": "600",
+            "ecmp_hash_offset": "10",
+            "lag_hash_offset": "10",
             "ordered_ecmp": "true"
         },
         "OP": "SET"

From 8132fbad38f30b54291cb4c40955049b36c3d30e Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Wed, 22 May 2024 18:27:31 +0800
Subject: [PATCH 0627/1115] [submodule] Update submodule sonic-swss to the
 latest HEAD automatically (#19026)

#### Why I did it
src/sonic-swss
```
* a280e367 - (HEAD -> master, origin/master, origin/HEAD) [COPP]Fix coppmgr when there are multiple features using same trap (#3144) (10 hours ago) [Sudharsan Dhamal Gopalarathnam]
* 1ff61602 - revert requests from 2.32.0 to 2.31.0 (#3154) (11 hours ago) [Liu Shilong]
* 9e80dc82 - Update setHostTxReady() to receive Port instead of portId (#3133) (35 hours ago) [noaOrMlnx]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-swss | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-swss b/src/sonic-swss
index 536f43a93..a280e3675 160000
--- a/src/sonic-swss
+++ b/src/sonic-swss
@@ -1 +1 @@
-Subproject commit 536f43a93900c4d684f9defea922d495b6157be9
+Subproject commit a280e367564cce6d8138fe39a0ce031b516c5699

From 64646f43ff3b56ef26e1bf618b1933c35fb27d64 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Wed, 22 May 2024 18:27:41 +0800
Subject: [PATCH 0628/1115] [submodule] Update submodule sonic-mgmt-common to
 the latest HEAD automatically (#19024)

#### Why I did it
src/sonic-mgmt-common
```
* 1e12744 - (HEAD -> master, origin/master, origin/HEAD) Interface and Ethernet Counter support (#139) (31 hours ago) [Satoru Shinohara]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-mgmt-common | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-mgmt-common b/src/sonic-mgmt-common
index 328d8063c..1e1274415 160000
--- a/src/sonic-mgmt-common
+++ b/src/sonic-mgmt-common
@@ -1 +1 @@
-Subproject commit 328d8063c1692ef402a15b5228b2a3c71b9dc53c
+Subproject commit 1e127441522a2fab99fc5d102853baed209131d4

From c2b0c7b9e3ef411a8a9083cc207d7b8d4feae5dc Mon Sep 17 00:00:00 2001
From: noaOrMlnx <58519608+noaOrMlnx@users.noreply.github.com>
Date: Wed, 22 May 2024 17:37:16 +0300
Subject: [PATCH 0629/1115] Add the ability to enable CMIS host mgmt. feature
 to Mellanox-SN4700-O8C48, Mellanox-SN4700-O8V48 SKUs (#18737)

- Why I did it
To enable CMIS host mgmt feature

- How I did it
Update information on the relevant fields on each SKU

- How to verify it
Load the system with the relevant SKU, verify CMIS host management is enabled, and per supported module check SW control is on.
---
 .../Mellanox-SN4700-O8C48/media_settings.json | 506 ++++++++++++++++++
 .../optics_si_settings.json                   | 108 ++++
 .../pmon_daemon_control.json                  |   6 +
 .../Mellanox-SN4700-O8V48/media_settings.json | 506 ++++++++++++++++++
 .../optics_si_settings.json                   | 108 ++++
 .../pmon_daemon_control.json                  |   6 +
 6 files changed, 1240 insertions(+)
 create mode 100644 device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/media_settings.json
 create mode 100644 device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/optics_si_settings.json
 create mode 100644 device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/pmon_daemon_control.json
 create mode 100644 device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/media_settings.json
 create mode 100644 device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/optics_si_settings.json
 create mode 100644 device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/pmon_daemon_control.json

diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/media_settings.json b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/media_settings.json
new file mode 100644
index 000000000..372b1cb28
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/media_settings.json
@@ -0,0 +1,506 @@
+{
+  "GLOBAL_MEDIA_SETTINGS": {
+      "1-32": {
+          "QSFP-DD-sm_media_interface": {
+              "speed:400GAUI-8": {
+                  "idriver": {
+                      "lane0": "0x0000003c",
+                      "lane1": "0x0000003c",
+                      "lane2": "0x0000003c",
+                      "lane3": "0x0000003c",
+                      "lane4": "0x0000003c",
+                      "lane5": "0x0000003c",
+                      "lane6": "0x0000003c",
+                      "lane7": "0x0000003c"
+                  },
+                  "pre1": {
+                      "lane0": "0xfffffffe",
+                      "lane1": "0xfffffffe",
+                      "lane2": "0xfffffffe",
+                      "lane3": "0xfffffffe",
+                      "lane4": "0xfffffffe",
+                      "lane5": "0xfffffffe",
+                      "lane6": "0xfffffffe",
+                      "lane7": "0xfffffffe"
+                  },
+                  "pre2": {
+                      "lane0": "0x00000000",
+                      "lane1": "0x00000000",
+                      "lane2": "0x00000000",
+                      "lane3": "0x00000000",
+                      "lane4": "0x00000000",
+                      "lane5": "0x00000000",
+                      "lane6": "0x00000000",
+                      "lane7": "0x00000000"
+                  },
+                  "main": {
+                      "lane0": "0x00000020",
+                      "lane1": "0x00000020",
+                      "lane2": "0x00000020",
+                      "lane3": "0x00000020",
+                      "lane4": "0x00000020",
+                      "lane5": "0x00000020",
+                      "lane6": "0x00000020",
+                      "lane7": "0x00000020"
+                  },
+                  "post1": {
+                      "lane0": "0x00000006",
+                      "lane1": "0x00000006",
+                      "lane2": "0x00000006",
+                      "lane3": "0x00000006",
+                      "lane4": "0x00000006",
+                      "lane5": "0x00000006",
+                      "lane6": "0x00000006",
+                      "lane7": "0x00000006"
+                  },
+                  "ob_m2lp": {
+                      "lane0": "0x00000004",
+                      "lane1": "0x00000004",
+                      "lane2": "0x00000004",
+                      "lane3": "0x00000004",
+                      "lane4": "0x00000004",
+                      "lane5": "0x00000004",
+                      "lane6": "0x00000004",
+                      "lane7": "0x00000004"
+                  },
+                  "ob_alev_out": {
+                      "lane0": "0x0000000f",
+                      "lane1": "0x0000000f",
+                      "lane2": "0x0000000f",
+                      "lane3": "0x0000000f",
+                      "lane4": "0x0000000f",
+                      "lane5": "0x0000000f",
+                      "lane6": "0x0000000f",
+                      "lane7": "0x0000000f"
+                  },
+                  "obplev": {
+                      "lane0": "0x00000069",
+                      "lane1": "0x00000069",
+                      "lane2": "0x00000069",
+                      "lane3": "0x00000069",
+                      "lane4": "0x00000069",
+                      "lane5": "0x00000069",
+                      "lane6": "0x00000069",
+                      "lane7": "0x00000069"
+                  },
+                  "obnlev": {
+                      "lane0": "0x0000005f",
+                      "lane1": "0x0000005f",
+                      "lane2": "0x0000005f",
+                      "lane3": "0x0000005f",
+                      "lane4": "0x0000005f",
+                      "lane5": "0x0000005f",
+                      "lane6": "0x0000005f",
+                      "lane7": "0x0000005f"
+                  },
+                  "regn_bfm1p": {
+                      "lane0": "0x0000001e",
+                      "lane1": "0x0000001e",
+                      "lane2": "0x0000001e",
+                      "lane3": "0x0000001e",
+                      "lane4": "0x0000001e",
+                      "lane5": "0x0000001e",
+                      "lane6": "0x0000001e",
+                      "lane7": "0x0000001e"
+                  },
+                  "regn_bfm1n": {
+                      "lane0": "0x000000aa",
+                      "lane1": "0x000000aa",
+                      "lane2": "0x000000aa",
+                      "lane3": "0x000000aa",
+                      "lane4": "0x000000aa",
+                      "lane5": "0x000000aa",
+                      "lane6": "0x000000aa",
+                      "lane7": "0x000000aa"
+                  }
+              },
+              "speed:100GAUI-2": {
+                  "idriver": {
+                      "lane0": "0x0000003c",
+                      "lane1": "0x0000003c"
+                  },
+                  "pre1": {
+                      "lane0": "0xfffffffe",
+                      "lane1": "0xfffffffe"
+                  },
+                  "pre2": {
+                      "lane0": "0x00000000",
+                      "lane1": "0x00000000"
+                  },
+                  "main": {
+                      "lane0": "0x00000020",
+                      "lane1": "0x00000020"
+                  },
+                  "post1": {
+                      "lane0": "0x00000006",
+                      "lane1": "0x00000006"
+                  },
+                  "ob_m2lp": {
+                      "lane0": "0x00000004",
+                      "lane1": "0x00000004"
+                  },
+                  "ob_alev_out": {
+                      "lane0": "0x0000000f",
+                      "lane1": "0x0000000f"
+                  },
+                  "obplev": {
+                      "lane0": "0x00000069",
+                      "lane1": "0x00000069"
+                  },
+                  "obnlev": {
+                      "lane0": "0x0000005f",
+                      "lane1": "0x0000005f"
+                  },
+                  "regn_bfm1p": {
+                      "lane0": "0x0000001e",
+                      "lane1": "0x0000001e"
+                  },
+                  "regn_bfm1n": {
+                      "lane0": "0x000000aa",
+                      "lane1": "0x000000aa"
+                  }
+              }
+          },
+          "QSFP-DD-active_cable_media_interface": {
+              "speed:400GAUI-8": {
+                  "idriver": {
+                      "lane0": "0x0000003c",
+                      "lane1": "0x0000003c",
+                      "lane2": "0x0000003c",
+                      "lane3": "0x0000003c",
+                      "lane4": "0x0000003c",
+                      "lane5": "0x0000003c",
+                      "lane6": "0x0000003c",
+                      "lane7": "0x0000003c"
+                  },
+                  "pre1": {
+                      "lane0": "0xfffffffe",
+                      "lane1": "0xfffffffe",
+                      "lane2": "0xfffffffe",
+                      "lane3": "0xfffffffe",
+                      "lane4": "0xfffffffe",
+                      "lane5": "0xfffffffe",
+                      "lane6": "0xfffffffe",
+                      "lane7": "0xfffffffe"
+                  },
+                  "pre2": {
+                      "lane0": "0x00000000",
+                      "lane1": "0x00000000",
+                      "lane2": "0x00000000",
+                      "lane3": "0x00000000",
+                      "lane4": "0x00000000",
+                      "lane5": "0x00000000",
+                      "lane6": "0x00000000",
+                      "lane7": "0x00000000"
+                  },
+                  "main": {
+                      "lane0": "0x00000020",
+                      "lane1": "0x00000020",
+                      "lane2": "0x00000020",
+                      "lane3": "0x00000020",
+                      "lane4": "0x00000020",
+                      "lane5": "0x00000020",
+                      "lane6": "0x00000020",
+                      "lane7": "0x00000020"
+                  },
+                  "post1": {
+                      "lane0": "0x00000006",
+                      "lane1": "0x00000006",
+                      "lane2": "0x00000006",
+                      "lane3": "0x00000006",
+                      "lane4": "0x00000006",
+                      "lane5": "0x00000006",
+                      "lane6": "0x00000006",
+                      "lane7": "0x00000006"
+                  },
+                  "ob_m2lp": {
+                      "lane0": "0x00000004",
+                      "lane1": "0x00000004",
+                      "lane2": "0x00000004",
+                      "lane3": "0x00000004",
+                      "lane4": "0x00000004",
+                      "lane5": "0x00000004",
+                      "lane6": "0x00000004",
+                      "lane7": "0x00000004"
+                  },
+                  "ob_alev_out": {
+                      "lane0": "0x0000000f",
+                      "lane1": "0x0000000f",
+                      "lane2": "0x0000000f",
+                      "lane3": "0x0000000f",
+                      "lane4": "0x0000000f",
+                      "lane5": "0x0000000f",
+                      "lane6": "0x0000000f",
+                      "lane7": "0x0000000f"
+                  },
+                  "obplev": {
+                      "lane0": "0x00000069",
+                      "lane1": "0x00000069",
+                      "lane2": "0x00000069",
+                      "lane3": "0x00000069",
+                      "lane4": "0x00000069",
+                      "lane5": "0x00000069",
+                      "lane6": "0x00000069",
+                      "lane7": "0x00000069"
+                  },
+                  "obnlev": {
+                      "lane0": "0x0000005f",
+                      "lane1": "0x0000005f",
+                      "lane2": "0x0000005f",
+                      "lane3": "0x0000005f",
+                      "lane4": "0x0000005f",
+                      "lane5": "0x0000005f",
+                      "lane6": "0x0000005f",
+                      "lane7": "0x0000005f"
+                  },
+                  "regn_bfm1p": {
+                      "lane0": "0x0000001e",
+                      "lane1": "0x0000001e",
+                      "lane2": "0x0000001e",
+                      "lane3": "0x0000001e",
+                      "lane4": "0x0000001e",
+                      "lane5": "0x0000001e",
+                      "lane6": "0x0000001e",
+                      "lane7": "0x0000001e"
+                  },
+                  "regn_bfm1n": {
+                      "lane0": "0x000000aa",
+                      "lane1": "0x000000aa",
+                      "lane2": "0x000000aa",
+                      "lane3": "0x000000aa",
+                      "lane4": "0x000000aa",
+                      "lane5": "0x000000aa",
+                      "lane6": "0x000000aa",
+                      "lane7": "0x000000aa"
+                  }
+              },
+              "speed:CAUI-4": {
+                  "idriver": {
+                      "lane0": "0x00000028",
+                      "lane1": "0x00000028",
+                      "lane2": "0x00000028",
+                      "lane3": "0x00000028",
+                      "lane4": "0x00000028",
+                      "lane5": "0x00000028",
+                      "lane6": "0x00000028",
+                      "lane7": "0x00000028"
+                  },
+                  "pre1": {
+                      "lane0": "0xfffffff3",
+                      "lane1": "0xfffffff3",
+                      "lane2": "0xfffffff3",
+                      "lane3": "0xfffffff3",
+                      "lane4": "0xfffffff3",
+                      "lane5": "0xfffffff3",
+                      "lane6": "0xfffffff3",
+                      "lane7": "0xfffffff3"
+                  },
+                  "pre2": {
+                      "lane0": "0x00000000",
+                      "lane1": "0x00000000",
+                      "lane2": "0x00000000",
+                      "lane3": "0x00000000",
+                      "lane4": "0x00000000",
+                      "lane5": "0x00000000",
+                      "lane6": "0x00000000",
+                      "lane7": "0x00000000"
+                  },
+                  "main": {
+                      "lane0": "0x00000033",
+                      "lane1": "0x00000033",
+                      "lane2": "0x00000033",
+                      "lane3": "0x00000033",
+                      "lane4": "0x00000033",
+                      "lane5": "0x00000033",
+                      "lane6": "0x00000033",
+                      "lane7": "0x00000033"
+                  },
+                  "post1": {
+                      "lane0": "0x00000000",
+                      "lane1": "0x00000000",
+                      "lane2": "0x00000000",
+                      "lane3": "0x00000000",
+                      "lane4": "0x00000000",
+                      "lane5": "0x00000000",
+                      "lane6": "0x00000000",
+                      "lane7": "0x00000000"
+                  },
+                  "ob_m2lp": {
+                      "lane0": "0x00000000",
+                      "lane1": "0x00000000",
+                      "lane2": "0x00000000",
+                      "lane3": "0x00000000",
+                      "lane4": "0x00000000",
+                      "lane5": "0x00000000",
+                      "lane6": "0x00000000",
+                      "lane7": "0x00000000"
+                  },
+                  "ob_alev_out": {
+                      "lane0": "0x0000000f",
+                      "lane1": "0x0000000f",
+                      "lane2": "0x0000000f",
+                      "lane3": "0x0000000f",
+                      "lane4": "0x0000000f",
+                      "lane5": "0x0000000f",
+                      "lane6": "0x0000000f",
+                      "lane7": "0x0000000f"
+                  },
+                  "obplev": {
+                      "lane0": "0x00000050",
+                      "lane1": "0x00000050",
+                      "lane2": "0x00000050",
+                      "lane3": "0x00000050",
+                      "lane4": "0x00000050",
+                      "lane5": "0x00000050",
+                      "lane6": "0x00000050",
+                      "lane7": "0x00000050"
+                  },
+                  "obnlev": {
+                      "lane0": "0x00000078",
+                      "lane1": "0x00000078",
+                      "lane2": "0x00000078",
+                      "lane3": "0x00000078",
+                      "lane4": "0x00000078",
+                      "lane5": "0x00000078",
+                      "lane6": "0x00000078",
+                      "lane7": "0x00000078"
+                  },
+                  "regn_bfm1p": {
+                      "lane0": "0x0000003c",
+                      "lane1": "0x0000003c",
+                      "lane2": "0x0000003c",
+                      "lane3": "0x0000003c",
+                      "lane4": "0x0000003c",
+                      "lane5": "0x0000003c",
+                      "lane6": "0x0000003c",
+                      "lane7": "0x0000003c"
+                  },
+                  "regn_bfm1n": {
+                      "lane0": "0x0000008c",
+                      "lane1": "0x0000008c",
+                      "lane2": "0x0000008c",
+                      "lane3": "0x0000008c",
+                      "lane4": "0x0000008c",
+                      "lane5": "0x0000008c",
+                      "lane6": "0x0000008c",
+                      "lane7": "0x0000008c"
+                  }
+              }
+          },
+          "QSFP+-active_cable_media_interface": {
+              "speed:CAUI-4": {
+                  "idriver": {
+                      "lane0": "0x00000028",
+                      "lane1": "0x00000028",
+                      "lane2": "0x00000028",
+                      "lane3": "0x00000028",
+                      "lane4": "0x00000028",
+                      "lane5": "0x00000028",
+                      "lane6": "0x00000028",
+                      "lane7": "0x00000028"
+                  },
+                  "pre1": {
+                      "lane0": "0xfffffff3",
+                      "lane1": "0xfffffff3",
+                      "lane2": "0xfffffff3",
+                      "lane3": "0xfffffff3",
+                      "lane4": "0xfffffff3",
+                      "lane5": "0xfffffff3",
+                      "lane6": "0xfffffff3",
+                      "lane7": "0xfffffff3"
+                  },
+                  "pre2": {
+                      "lane0": "0x00000000",
+                      "lane1": "0x00000000",
+                      "lane2": "0x00000000",
+                      "lane3": "0x00000000",
+                      "lane4": "0x00000000",
+                      "lane5": "0x00000000",
+                      "lane6": "0x00000000",
+                      "lane7": "0x00000000"
+                  },
+                  "main": {
+                      "lane0": "0x00000033",
+                      "lane1": "0x00000033",
+                      "lane2": "0x00000033",
+                      "lane3": "0x00000033",
+                      "lane4": "0x00000033",
+                      "lane5": "0x00000033",
+                      "lane6": "0x00000033",
+                      "lane7": "0x00000033"
+                  },
+                  "post1": {
+                      "lane0": "0x00000000",
+                      "lane1": "0x00000000",
+                      "lane2": "0x00000000",
+                      "lane3": "0x00000000",
+                      "lane4": "0x00000000",
+                      "lane5": "0x00000000",
+                      "lane6": "0x00000000",
+                      "lane7": "0x00000000"
+                  },
+                  "ob_m2lp": {
+                      "lane0": "0x00000000",
+                      "lane1": "0x00000000",
+                      "lane2": "0x00000000",
+                      "lane3": "0x00000000",
+                      "lane4": "0x00000000",
+                      "lane5": "0x00000000",
+                      "lane6": "0x00000000",
+                      "lane7": "0x00000000"
+                  },
+                  "ob_alev_out": {
+                      "lane0": "0x0000000f",
+                      "lane1": "0x0000000f",
+                      "lane2": "0x0000000f",
+                      "lane3": "0x0000000f",
+                      "lane4": "0x0000000f",
+                      "lane5": "0x0000000f",
+                      "lane6": "0x0000000f",
+                      "lane7": "0x0000000f"
+                  },
+                  "obplev": {
+                      "lane0": "0x00000050",
+                      "lane1": "0x00000050",
+                      "lane2": "0x00000050",
+                      "lane3": "0x00000050",
+                      "lane4": "0x00000050",
+                      "lane5": "0x00000050",
+                      "lane6": "0x00000050",
+                      "lane7": "0x00000050"
+                  },
+                  "obnlev": {
+                      "lane0": "0x00000078",
+                      "lane1": "0x00000078",
+                      "lane2": "0x00000078",
+                      "lane3": "0x00000078",
+                      "lane4": "0x00000078",
+                      "lane5": "0x00000078",
+                      "lane6": "0x00000078",
+                      "lane7": "0x00000078"
+                  },
+                  "regn_bfm1p": {
+                      "lane0": "0x0000003c",
+                      "lane1": "0x0000003c",
+                      "lane2": "0x0000003c",
+                      "lane3": "0x0000003c",
+                      "lane4": "0x0000003c",
+                      "lane5": "0x0000003c",
+                      "lane6": "0x0000003c",
+                      "lane7": "0x0000003c"
+                  },
+                  "regn_bfm1n": {
+                      "lane0": "0x0000008c",
+                      "lane1": "0x0000008c",
+                      "lane2": "0x0000008c",
+                      "lane3": "0x0000008c",
+                      "lane4": "0x0000008c",
+                      "lane5": "0x0000008c",
+                      "lane6": "0x0000008c",
+                      "lane7": "0x0000008c"
+                  }
+              }
+          }
+      }
+  }
+}
diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/optics_si_settings.json b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/optics_si_settings.json
new file mode 100644
index 000000000..bf71e818a
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/optics_si_settings.json
@@ -0,0 +1,108 @@
+{
+    "GLOBAL_MEDIA_SETTINGS": {
+        "1-32": {
+            "50G_SPEED": {
+                "Default": {
+                    "OutputAmplitudeTargetRx": {
+                        "OutputAmplitudeTargetRx1": 0,
+                        "OutputAmplitudeTargetRx2": 0,
+                        "OutputAmplitudeTargetRx3": 0,
+                        "OutputAmplitudeTargetRx4": 0,
+                        "OutputAmplitudeTargetRx5": 0,
+                        "OutputAmplitudeTargetRx6": 0,
+                        "OutputAmplitudeTargetRx7": 0,
+                        "OutputAmplitudeTargetRx8": 0
+                    },
+                    "OutputEqPreCursorTargetRx": {
+                        "OutputEqPreCursorTargetRx1": 0,
+                        "OutputEqPreCursorTargetRx2": 0,
+                        "OutputEqPreCursorTargetRx3": 0,
+                        "OutputEqPreCursorTargetRx4": 0,
+                        "OutputEqPreCursorTargetRx5": 0,
+                        "OutputEqPreCursorTargetRx6": 0,
+                        "OutputEqPreCursorTargetRx7": 0,
+                        "OutputEqPreCursorTargetRx8": 0
+                    },
+                    "OutputEqPostCursorTargetRx": {
+                        "OutputEqPostCursorTargetRx1": 0,
+                        "OutputEqPostCursorTargetRx2": 0,
+                        "OutputEqPostCursorTargetRx3": 0,
+                        "OutputEqPostCursorTargetRx4": 0,
+                        "OutputEqPostCursorTargetRx5": 0,
+                        "OutputEqPostCursorTargetRx6": 0,
+                        "OutputEqPostCursorTargetRx7": 0,
+                        "OutputEqPostCursorTargetRx8": 0
+                    }
+                }
+            },
+            "25G_SPEED": {
+                "Default": {
+                    "OutputAmplitudeTargetRx": {
+                        "OutputAmplitudeTargetRx1": 0,
+                        "OutputAmplitudeTargetRx2": 0,
+                        "OutputAmplitudeTargetRx3": 0,
+                        "OutputAmplitudeTargetRx4": 0,
+                        "OutputAmplitudeTargetRx5": 0,
+                        "OutputAmplitudeTargetRx6": 0,
+                        "OutputAmplitudeTargetRx7": 0,
+                        "OutputAmplitudeTargetRx8": 0
+                    },
+                    "OutputEqPreCursorTargetRx": {
+                        "OutputEqPreCursorTargetRx1": 0,
+                        "OutputEqPreCursorTargetRx2": 0,
+                        "OutputEqPreCursorTargetRx3": 0,
+                        "OutputEqPreCursorTargetRx4": 0,
+                        "OutputEqPreCursorTargetRx5": 0,
+                        "OutputEqPreCursorTargetRx6": 0,
+                        "OutputEqPreCursorTargetRx7": 0,
+                        "OutputEqPreCursorTargetRx8": 0
+                    },
+                    "OutputEqPostCursorTargetRx": {
+                        "OutputEqPostCursorTargetRx1": 0,
+                        "OutputEqPostCursorTargetRx2": 0,
+                        "OutputEqPostCursorTargetRx3": 0,
+                        "OutputEqPostCursorTargetRx4": 0,
+                        "OutputEqPostCursorTargetRx5": 0,
+                        "OutputEqPostCursorTargetRx6": 0,
+                        "OutputEqPostCursorTargetRx7": 0,
+                        "OutputEqPostCursorTargetRx8": 0
+                    }
+                }
+            },
+            "10G_SPEED": {
+                "Default": {
+                    "OutputAmplitudeTargetRx": {
+                        "OutputAmplitudeTargetRx1": 0,
+                        "OutputAmplitudeTargetRx2": 0,
+                        "OutputAmplitudeTargetRx3": 0,
+                        "OutputAmplitudeTargetRx4": 0,
+                        "OutputAmplitudeTargetRx5": 0,
+                        "OutputAmplitudeTargetRx6": 0,
+                        "OutputAmplitudeTargetRx7": 0,
+                        "OutputAmplitudeTargetRx8": 0
+                    },
+                    "OutputEqPreCursorTargetRx": {
+                        "OutputEqPreCursorTargetRx1": 0,
+                        "OutputEqPreCursorTargetRx2": 0,
+                        "OutputEqPreCursorTargetRx3": 0,
+                        "OutputEqPreCursorTargetRx4": 0,
+                        "OutputEqPreCursorTargetRx5": 0,
+                        "OutputEqPreCursorTargetRx6": 0,
+                        "OutputEqPreCursorTargetRx7": 0,
+                        "OutputEqPreCursorTargetRx8": 0
+                    },
+                    "OutputEqPostCursorTargetRx": {
+                        "OutputEqPostCursorTargetRx1": 0,
+                        "OutputEqPostCursorTargetRx2": 0,
+                        "OutputEqPostCursorTargetRx3": 0,
+                        "OutputEqPostCursorTargetRx4": 0,
+                        "OutputEqPostCursorTargetRx5": 0,
+                        "OutputEqPostCursorTargetRx6": 0,
+                        "OutputEqPostCursorTargetRx7": 0,
+                        "OutputEqPostCursorTargetRx8": 0
+                    }
+                }
+            }
+        }
+    }
+}
diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/pmon_daemon_control.json b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/pmon_daemon_control.json
new file mode 100644
index 000000000..ac8cc05f6
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/pmon_daemon_control.json
@@ -0,0 +1,6 @@
+{
+    "skip_ledd": true,
+    "skip_fancontrol": true,
+    "delay_xcvrd": true,
+    "skip_xcvrd_cmis_mgr": false
+}
diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/media_settings.json b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/media_settings.json
new file mode 100644
index 000000000..372b1cb28
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/media_settings.json
@@ -0,0 +1,506 @@
+{
+  "GLOBAL_MEDIA_SETTINGS": {
+      "1-32": {
+          "QSFP-DD-sm_media_interface": {
+              "speed:400GAUI-8": {
+                  "idriver": {
+                      "lane0": "0x0000003c",
+                      "lane1": "0x0000003c",
+                      "lane2": "0x0000003c",
+                      "lane3": "0x0000003c",
+                      "lane4": "0x0000003c",
+                      "lane5": "0x0000003c",
+                      "lane6": "0x0000003c",
+                      "lane7": "0x0000003c"
+                  },
+                  "pre1": {
+                      "lane0": "0xfffffffe",
+                      "lane1": "0xfffffffe",
+                      "lane2": "0xfffffffe",
+                      "lane3": "0xfffffffe",
+                      "lane4": "0xfffffffe",
+                      "lane5": "0xfffffffe",
+                      "lane6": "0xfffffffe",
+                      "lane7": "0xfffffffe"
+                  },
+                  "pre2": {
+                      "lane0": "0x00000000",
+                      "lane1": "0x00000000",
+                      "lane2": "0x00000000",
+                      "lane3": "0x00000000",
+                      "lane4": "0x00000000",
+                      "lane5": "0x00000000",
+                      "lane6": "0x00000000",
+                      "lane7": "0x00000000"
+                  },
+                  "main": {
+                      "lane0": "0x00000020",
+                      "lane1": "0x00000020",
+                      "lane2": "0x00000020",
+                      "lane3": "0x00000020",
+                      "lane4": "0x00000020",
+                      "lane5": "0x00000020",
+                      "lane6": "0x00000020",
+                      "lane7": "0x00000020"
+                  },
+                  "post1": {
+                      "lane0": "0x00000006",
+                      "lane1": "0x00000006",
+                      "lane2": "0x00000006",
+                      "lane3": "0x00000006",
+                      "lane4": "0x00000006",
+                      "lane5": "0x00000006",
+                      "lane6": "0x00000006",
+                      "lane7": "0x00000006"
+                  },
+                  "ob_m2lp": {
+                      "lane0": "0x00000004",
+                      "lane1": "0x00000004",
+                      "lane2": "0x00000004",
+                      "lane3": "0x00000004",
+                      "lane4": "0x00000004",
+                      "lane5": "0x00000004",
+                      "lane6": "0x00000004",
+                      "lane7": "0x00000004"
+                  },
+                  "ob_alev_out": {
+                      "lane0": "0x0000000f",
+                      "lane1": "0x0000000f",
+                      "lane2": "0x0000000f",
+                      "lane3": "0x0000000f",
+                      "lane4": "0x0000000f",
+                      "lane5": "0x0000000f",
+                      "lane6": "0x0000000f",
+                      "lane7": "0x0000000f"
+                  },
+                  "obplev": {
+                      "lane0": "0x00000069",
+                      "lane1": "0x00000069",
+                      "lane2": "0x00000069",
+                      "lane3": "0x00000069",
+                      "lane4": "0x00000069",
+                      "lane5": "0x00000069",
+                      "lane6": "0x00000069",
+                      "lane7": "0x00000069"
+                  },
+                  "obnlev": {
+                      "lane0": "0x0000005f",
+                      "lane1": "0x0000005f",
+                      "lane2": "0x0000005f",
+                      "lane3": "0x0000005f",
+                      "lane4": "0x0000005f",
+                      "lane5": "0x0000005f",
+                      "lane6": "0x0000005f",
+                      "lane7": "0x0000005f"
+                  },
+                  "regn_bfm1p": {
+                      "lane0": "0x0000001e",
+                      "lane1": "0x0000001e",
+                      "lane2": "0x0000001e",
+                      "lane3": "0x0000001e",
+                      "lane4": "0x0000001e",
+                      "lane5": "0x0000001e",
+                      "lane6": "0x0000001e",
+                      "lane7": "0x0000001e"
+                  },
+                  "regn_bfm1n": {
+                      "lane0": "0x000000aa",
+                      "lane1": "0x000000aa",
+                      "lane2": "0x000000aa",
+                      "lane3": "0x000000aa",
+                      "lane4": "0x000000aa",
+                      "lane5": "0x000000aa",
+                      "lane6": "0x000000aa",
+                      "lane7": "0x000000aa"
+                  }
+              },
+              "speed:100GAUI-2": {
+                  "idriver": {
+                      "lane0": "0x0000003c",
+                      "lane1": "0x0000003c"
+                  },
+                  "pre1": {
+                      "lane0": "0xfffffffe",
+                      "lane1": "0xfffffffe"
+                  },
+                  "pre2": {
+                      "lane0": "0x00000000",
+                      "lane1": "0x00000000"
+                  },
+                  "main": {
+                      "lane0": "0x00000020",
+                      "lane1": "0x00000020"
+                  },
+                  "post1": {
+                      "lane0": "0x00000006",
+                      "lane1": "0x00000006"
+                  },
+                  "ob_m2lp": {
+                      "lane0": "0x00000004",
+                      "lane1": "0x00000004"
+                  },
+                  "ob_alev_out": {
+                      "lane0": "0x0000000f",
+                      "lane1": "0x0000000f"
+                  },
+                  "obplev": {
+                      "lane0": "0x00000069",
+                      "lane1": "0x00000069"
+                  },
+                  "obnlev": {
+                      "lane0": "0x0000005f",
+                      "lane1": "0x0000005f"
+                  },
+                  "regn_bfm1p": {
+                      "lane0": "0x0000001e",
+                      "lane1": "0x0000001e"
+                  },
+                  "regn_bfm1n": {
+                      "lane0": "0x000000aa",
+                      "lane1": "0x000000aa"
+                  }
+              }
+          },
+          "QSFP-DD-active_cable_media_interface": {
+              "speed:400GAUI-8": {
+                  "idriver": {
+                      "lane0": "0x0000003c",
+                      "lane1": "0x0000003c",
+                      "lane2": "0x0000003c",
+                      "lane3": "0x0000003c",
+                      "lane4": "0x0000003c",
+                      "lane5": "0x0000003c",
+                      "lane6": "0x0000003c",
+                      "lane7": "0x0000003c"
+                  },
+                  "pre1": {
+                      "lane0": "0xfffffffe",
+                      "lane1": "0xfffffffe",
+                      "lane2": "0xfffffffe",
+                      "lane3": "0xfffffffe",
+                      "lane4": "0xfffffffe",
+                      "lane5": "0xfffffffe",
+                      "lane6": "0xfffffffe",
+                      "lane7": "0xfffffffe"
+                  },
+                  "pre2": {
+                      "lane0": "0x00000000",
+                      "lane1": "0x00000000",
+                      "lane2": "0x00000000",
+                      "lane3": "0x00000000",
+                      "lane4": "0x00000000",
+                      "lane5": "0x00000000",
+                      "lane6": "0x00000000",
+                      "lane7": "0x00000000"
+                  },
+                  "main": {
+                      "lane0": "0x00000020",
+                      "lane1": "0x00000020",
+                      "lane2": "0x00000020",
+                      "lane3": "0x00000020",
+                      "lane4": "0x00000020",
+                      "lane5": "0x00000020",
+                      "lane6": "0x00000020",
+                      "lane7": "0x00000020"
+                  },
+                  "post1": {
+                      "lane0": "0x00000006",
+                      "lane1": "0x00000006",
+                      "lane2": "0x00000006",
+                      "lane3": "0x00000006",
+                      "lane4": "0x00000006",
+                      "lane5": "0x00000006",
+                      "lane6": "0x00000006",
+                      "lane7": "0x00000006"
+                  },
+                  "ob_m2lp": {
+                      "lane0": "0x00000004",
+                      "lane1": "0x00000004",
+                      "lane2": "0x00000004",
+                      "lane3": "0x00000004",
+                      "lane4": "0x00000004",
+                      "lane5": "0x00000004",
+                      "lane6": "0x00000004",
+                      "lane7": "0x00000004"
+                  },
+                  "ob_alev_out": {
+                      "lane0": "0x0000000f",
+                      "lane1": "0x0000000f",
+                      "lane2": "0x0000000f",
+                      "lane3": "0x0000000f",
+                      "lane4": "0x0000000f",
+                      "lane5": "0x0000000f",
+                      "lane6": "0x0000000f",
+                      "lane7": "0x0000000f"
+                  },
+                  "obplev": {
+                      "lane0": "0x00000069",
+                      "lane1": "0x00000069",
+                      "lane2": "0x00000069",
+                      "lane3": "0x00000069",
+                      "lane4": "0x00000069",
+                      "lane5": "0x00000069",
+                      "lane6": "0x00000069",
+                      "lane7": "0x00000069"
+                  },
+                  "obnlev": {
+                      "lane0": "0x0000005f",
+                      "lane1": "0x0000005f",
+                      "lane2": "0x0000005f",
+                      "lane3": "0x0000005f",
+                      "lane4": "0x0000005f",
+                      "lane5": "0x0000005f",
+                      "lane6": "0x0000005f",
+                      "lane7": "0x0000005f"
+                  },
+                  "regn_bfm1p": {
+                      "lane0": "0x0000001e",
+                      "lane1": "0x0000001e",
+                      "lane2": "0x0000001e",
+                      "lane3": "0x0000001e",
+                      "lane4": "0x0000001e",
+                      "lane5": "0x0000001e",
+                      "lane6": "0x0000001e",
+                      "lane7": "0x0000001e"
+                  },
+                  "regn_bfm1n": {
+                      "lane0": "0x000000aa",
+                      "lane1": "0x000000aa",
+                      "lane2": "0x000000aa",
+                      "lane3": "0x000000aa",
+                      "lane4": "0x000000aa",
+                      "lane5": "0x000000aa",
+                      "lane6": "0x000000aa",
+                      "lane7": "0x000000aa"
+                  }
+              },
+              "speed:CAUI-4": {
+                  "idriver": {
+                      "lane0": "0x00000028",
+                      "lane1": "0x00000028",
+                      "lane2": "0x00000028",
+                      "lane3": "0x00000028",
+                      "lane4": "0x00000028",
+                      "lane5": "0x00000028",
+                      "lane6": "0x00000028",
+                      "lane7": "0x00000028"
+                  },
+                  "pre1": {
+                      "lane0": "0xfffffff3",
+                      "lane1": "0xfffffff3",
+                      "lane2": "0xfffffff3",
+                      "lane3": "0xfffffff3",
+                      "lane4": "0xfffffff3",
+                      "lane5": "0xfffffff3",
+                      "lane6": "0xfffffff3",
+                      "lane7": "0xfffffff3"
+                  },
+                  "pre2": {
+                      "lane0": "0x00000000",
+                      "lane1": "0x00000000",
+                      "lane2": "0x00000000",
+                      "lane3": "0x00000000",
+                      "lane4": "0x00000000",
+                      "lane5": "0x00000000",
+                      "lane6": "0x00000000",
+                      "lane7": "0x00000000"
+                  },
+                  "main": {
+                      "lane0": "0x00000033",
+                      "lane1": "0x00000033",
+                      "lane2": "0x00000033",
+                      "lane3": "0x00000033",
+                      "lane4": "0x00000033",
+                      "lane5": "0x00000033",
+                      "lane6": "0x00000033",
+                      "lane7": "0x00000033"
+                  },
+                  "post1": {
+                      "lane0": "0x00000000",
+                      "lane1": "0x00000000",
+                      "lane2": "0x00000000",
+                      "lane3": "0x00000000",
+                      "lane4": "0x00000000",
+                      "lane5": "0x00000000",
+                      "lane6": "0x00000000",
+                      "lane7": "0x00000000"
+                  },
+                  "ob_m2lp": {
+                      "lane0": "0x00000000",
+                      "lane1": "0x00000000",
+                      "lane2": "0x00000000",
+                      "lane3": "0x00000000",
+                      "lane4": "0x00000000",
+                      "lane5": "0x00000000",
+                      "lane6": "0x00000000",
+                      "lane7": "0x00000000"
+                  },
+                  "ob_alev_out": {
+                      "lane0": "0x0000000f",
+                      "lane1": "0x0000000f",
+                      "lane2": "0x0000000f",
+                      "lane3": "0x0000000f",
+                      "lane4": "0x0000000f",
+                      "lane5": "0x0000000f",
+                      "lane6": "0x0000000f",
+                      "lane7": "0x0000000f"
+                  },
+                  "obplev": {
+                      "lane0": "0x00000050",
+                      "lane1": "0x00000050",
+                      "lane2": "0x00000050",
+                      "lane3": "0x00000050",
+                      "lane4": "0x00000050",
+                      "lane5": "0x00000050",
+                      "lane6": "0x00000050",
+                      "lane7": "0x00000050"
+                  },
+                  "obnlev": {
+                      "lane0": "0x00000078",
+                      "lane1": "0x00000078",
+                      "lane2": "0x00000078",
+                      "lane3": "0x00000078",
+                      "lane4": "0x00000078",
+                      "lane5": "0x00000078",
+                      "lane6": "0x00000078",
+                      "lane7": "0x00000078"
+                  },
+                  "regn_bfm1p": {
+                      "lane0": "0x0000003c",
+                      "lane1": "0x0000003c",
+                      "lane2": "0x0000003c",
+                      "lane3": "0x0000003c",
+                      "lane4": "0x0000003c",
+                      "lane5": "0x0000003c",
+                      "lane6": "0x0000003c",
+                      "lane7": "0x0000003c"
+                  },
+                  "regn_bfm1n": {
+                      "lane0": "0x0000008c",
+                      "lane1": "0x0000008c",
+                      "lane2": "0x0000008c",
+                      "lane3": "0x0000008c",
+                      "lane4": "0x0000008c",
+                      "lane5": "0x0000008c",
+                      "lane6": "0x0000008c",
+                      "lane7": "0x0000008c"
+                  }
+              }
+          },
+          "QSFP+-active_cable_media_interface": {
+              "speed:CAUI-4": {
+                  "idriver": {
+                      "lane0": "0x00000028",
+                      "lane1": "0x00000028",
+                      "lane2": "0x00000028",
+                      "lane3": "0x00000028",
+                      "lane4": "0x00000028",
+                      "lane5": "0x00000028",
+                      "lane6": "0x00000028",
+                      "lane7": "0x00000028"
+                  },
+                  "pre1": {
+                      "lane0": "0xfffffff3",
+                      "lane1": "0xfffffff3",
+                      "lane2": "0xfffffff3",
+                      "lane3": "0xfffffff3",
+                      "lane4": "0xfffffff3",
+                      "lane5": "0xfffffff3",
+                      "lane6": "0xfffffff3",
+                      "lane7": "0xfffffff3"
+                  },
+                  "pre2": {
+                      "lane0": "0x00000000",
+                      "lane1": "0x00000000",
+                      "lane2": "0x00000000",
+                      "lane3": "0x00000000",
+                      "lane4": "0x00000000",
+                      "lane5": "0x00000000",
+                      "lane6": "0x00000000",
+                      "lane7": "0x00000000"
+                  },
+                  "main": {
+                      "lane0": "0x00000033",
+                      "lane1": "0x00000033",
+                      "lane2": "0x00000033",
+                      "lane3": "0x00000033",
+                      "lane4": "0x00000033",
+                      "lane5": "0x00000033",
+                      "lane6": "0x00000033",
+                      "lane7": "0x00000033"
+                  },
+                  "post1": {
+                      "lane0": "0x00000000",
+                      "lane1": "0x00000000",
+                      "lane2": "0x00000000",
+                      "lane3": "0x00000000",
+                      "lane4": "0x00000000",
+                      "lane5": "0x00000000",
+                      "lane6": "0x00000000",
+                      "lane7": "0x00000000"
+                  },
+                  "ob_m2lp": {
+                      "lane0": "0x00000000",
+                      "lane1": "0x00000000",
+                      "lane2": "0x00000000",
+                      "lane3": "0x00000000",
+                      "lane4": "0x00000000",
+                      "lane5": "0x00000000",
+                      "lane6": "0x00000000",
+                      "lane7": "0x00000000"
+                  },
+                  "ob_alev_out": {
+                      "lane0": "0x0000000f",
+                      "lane1": "0x0000000f",
+                      "lane2": "0x0000000f",
+                      "lane3": "0x0000000f",
+                      "lane4": "0x0000000f",
+                      "lane5": "0x0000000f",
+                      "lane6": "0x0000000f",
+                      "lane7": "0x0000000f"
+                  },
+                  "obplev": {
+                      "lane0": "0x00000050",
+                      "lane1": "0x00000050",
+                      "lane2": "0x00000050",
+                      "lane3": "0x00000050",
+                      "lane4": "0x00000050",
+                      "lane5": "0x00000050",
+                      "lane6": "0x00000050",
+                      "lane7": "0x00000050"
+                  },
+                  "obnlev": {
+                      "lane0": "0x00000078",
+                      "lane1": "0x00000078",
+                      "lane2": "0x00000078",
+                      "lane3": "0x00000078",
+                      "lane4": "0x00000078",
+                      "lane5": "0x00000078",
+                      "lane6": "0x00000078",
+                      "lane7": "0x00000078"
+                  },
+                  "regn_bfm1p": {
+                      "lane0": "0x0000003c",
+                      "lane1": "0x0000003c",
+                      "lane2": "0x0000003c",
+                      "lane3": "0x0000003c",
+                      "lane4": "0x0000003c",
+                      "lane5": "0x0000003c",
+                      "lane6": "0x0000003c",
+                      "lane7": "0x0000003c"
+                  },
+                  "regn_bfm1n": {
+                      "lane0": "0x0000008c",
+                      "lane1": "0x0000008c",
+                      "lane2": "0x0000008c",
+                      "lane3": "0x0000008c",
+                      "lane4": "0x0000008c",
+                      "lane5": "0x0000008c",
+                      "lane6": "0x0000008c",
+                      "lane7": "0x0000008c"
+                  }
+              }
+          }
+      }
+  }
+}
diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/optics_si_settings.json b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/optics_si_settings.json
new file mode 100644
index 000000000..bf71e818a
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/optics_si_settings.json
@@ -0,0 +1,108 @@
+{
+    "GLOBAL_MEDIA_SETTINGS": {
+        "1-32": {
+            "50G_SPEED": {
+                "Default": {
+                    "OutputAmplitudeTargetRx": {
+                        "OutputAmplitudeTargetRx1": 0,
+                        "OutputAmplitudeTargetRx2": 0,
+                        "OutputAmplitudeTargetRx3": 0,
+                        "OutputAmplitudeTargetRx4": 0,
+                        "OutputAmplitudeTargetRx5": 0,
+                        "OutputAmplitudeTargetRx6": 0,
+                        "OutputAmplitudeTargetRx7": 0,
+                        "OutputAmplitudeTargetRx8": 0
+                    },
+                    "OutputEqPreCursorTargetRx": {
+                        "OutputEqPreCursorTargetRx1": 0,
+                        "OutputEqPreCursorTargetRx2": 0,
+                        "OutputEqPreCursorTargetRx3": 0,
+                        "OutputEqPreCursorTargetRx4": 0,
+                        "OutputEqPreCursorTargetRx5": 0,
+                        "OutputEqPreCursorTargetRx6": 0,
+                        "OutputEqPreCursorTargetRx7": 0,
+                        "OutputEqPreCursorTargetRx8": 0
+                    },
+                    "OutputEqPostCursorTargetRx": {
+                        "OutputEqPostCursorTargetRx1": 0,
+                        "OutputEqPostCursorTargetRx2": 0,
+                        "OutputEqPostCursorTargetRx3": 0,
+                        "OutputEqPostCursorTargetRx4": 0,
+                        "OutputEqPostCursorTargetRx5": 0,
+                        "OutputEqPostCursorTargetRx6": 0,
+                        "OutputEqPostCursorTargetRx7": 0,
+                        "OutputEqPostCursorTargetRx8": 0
+                    }
+                }
+            },
+            "25G_SPEED": {
+                "Default": {
+                    "OutputAmplitudeTargetRx": {
+                        "OutputAmplitudeTargetRx1": 0,
+                        "OutputAmplitudeTargetRx2": 0,
+                        "OutputAmplitudeTargetRx3": 0,
+                        "OutputAmplitudeTargetRx4": 0,
+                        "OutputAmplitudeTargetRx5": 0,
+                        "OutputAmplitudeTargetRx6": 0,
+                        "OutputAmplitudeTargetRx7": 0,
+                        "OutputAmplitudeTargetRx8": 0
+                    },
+                    "OutputEqPreCursorTargetRx": {
+                        "OutputEqPreCursorTargetRx1": 0,
+                        "OutputEqPreCursorTargetRx2": 0,
+                        "OutputEqPreCursorTargetRx3": 0,
+                        "OutputEqPreCursorTargetRx4": 0,
+                        "OutputEqPreCursorTargetRx5": 0,
+                        "OutputEqPreCursorTargetRx6": 0,
+                        "OutputEqPreCursorTargetRx7": 0,
+                        "OutputEqPreCursorTargetRx8": 0
+                    },
+                    "OutputEqPostCursorTargetRx": {
+                        "OutputEqPostCursorTargetRx1": 0,
+                        "OutputEqPostCursorTargetRx2": 0,
+                        "OutputEqPostCursorTargetRx3": 0,
+                        "OutputEqPostCursorTargetRx4": 0,
+                        "OutputEqPostCursorTargetRx5": 0,
+                        "OutputEqPostCursorTargetRx6": 0,
+                        "OutputEqPostCursorTargetRx7": 0,
+                        "OutputEqPostCursorTargetRx8": 0
+                    }
+                }
+            },
+            "10G_SPEED": {
+                "Default": {
+                    "OutputAmplitudeTargetRx": {
+                        "OutputAmplitudeTargetRx1": 0,
+                        "OutputAmplitudeTargetRx2": 0,
+                        "OutputAmplitudeTargetRx3": 0,
+                        "OutputAmplitudeTargetRx4": 0,
+                        "OutputAmplitudeTargetRx5": 0,
+                        "OutputAmplitudeTargetRx6": 0,
+                        "OutputAmplitudeTargetRx7": 0,
+                        "OutputAmplitudeTargetRx8": 0
+                    },
+                    "OutputEqPreCursorTargetRx": {
+                        "OutputEqPreCursorTargetRx1": 0,
+                        "OutputEqPreCursorTargetRx2": 0,
+                        "OutputEqPreCursorTargetRx3": 0,
+                        "OutputEqPreCursorTargetRx4": 0,
+                        "OutputEqPreCursorTargetRx5": 0,
+                        "OutputEqPreCursorTargetRx6": 0,
+                        "OutputEqPreCursorTargetRx7": 0,
+                        "OutputEqPreCursorTargetRx8": 0
+                    },
+                    "OutputEqPostCursorTargetRx": {
+                        "OutputEqPostCursorTargetRx1": 0,
+                        "OutputEqPostCursorTargetRx2": 0,
+                        "OutputEqPostCursorTargetRx3": 0,
+                        "OutputEqPostCursorTargetRx4": 0,
+                        "OutputEqPostCursorTargetRx5": 0,
+                        "OutputEqPostCursorTargetRx6": 0,
+                        "OutputEqPostCursorTargetRx7": 0,
+                        "OutputEqPostCursorTargetRx8": 0
+                    }
+                }
+            }
+        }
+    }
+}
diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/pmon_daemon_control.json b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/pmon_daemon_control.json
new file mode 100644
index 000000000..ac8cc05f6
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/pmon_daemon_control.json
@@ -0,0 +1,6 @@
+{
+    "skip_ledd": true,
+    "skip_fancontrol": true,
+    "delay_xcvrd": true,
+    "skip_xcvrd_cmis_mgr": false
+}

From 3a8ba71bc08dfebcded21ffd6af3feceb7c6f445 Mon Sep 17 00:00:00 2001
From: Vivek <vivekreddykarri98@gmail.com>
Date: Wed, 22 May 2024 08:42:41 -0700
Subject: [PATCH 0630/1115] Fix rasdaemon crash during bootup on AMD CPU
 (#19023)

- Why I did it
Booting SONiC on a AMD EPYC 16-Core CPU is causing rasdaemon to crash. This is not a major blocker because rasdaemon eventually restarts and is stable after a point.

Coredump stack trace:

[Thread debugging using libthread_db enabled]
Using host libthread_db library "/lib/x86_64-linux-gnu/libthread_db.so.1".
Core was generated by `/usr/sbin/rasdaemon -f -r'.
Program terminated with signal SIGBUS, Bus error.
#0  0x00007f74f62af7f4 in sqlite3_finalize () from /lib/x86_64-linux-gnu/libsqlite3.so.0
[Current thread is 1 (Thread 0x7f73c8ff96c0 (LWP 17416))]
Known issue for rasdaemon: mchehab/rasdaemon#77

Fixed here:
mchehab/rasdaemon@f1ea763

Unfortunately this fix is not present in the default bookworm version. So, backported the fix and compiled rasdaemon from source

Here is the patch: https://sources.debian.org/patches/rasdaemon/0.8.0-2/0001-Check-CPUs-online-not-configured.patch/

- How I did it

- How to verify it
Booted the image built with these changes and no issue in observed

Signed-off-by: Vivek Reddy <vkarri@nvidia.com>
---
 build_debian.sh                               |  6 ---
 .../build_templates/sonic_debian_extension.j2 |  5 +++
 rules/rasdaemon.dep                           | 10 +++++
 rules/rasdaemon.mk                            |  8 ++++
 slave.mk                                      |  1 +
 sonic-slave-bookworm/Dockerfile.j2            |  3 ++
 ...001-Check-CPUs-online-not-configured.patch | 38 +++++++++++++++++++
 src/rasdaemon/Makefile                        | 23 +++++++++++
 8 files changed, 88 insertions(+), 6 deletions(-)
 create mode 100644 rules/rasdaemon.dep
 create mode 100644 rules/rasdaemon.mk
 create mode 100644 src/rasdaemon/0001-Check-CPUs-online-not-configured.patch
 create mode 100644 src/rasdaemon/Makefile

diff --git a/build_debian.sh b/build_debian.sh
index a34f92c01..352c642ca 100755
--- a/build_debian.sh
+++ b/build_debian.sh
@@ -420,12 +420,6 @@ EOF
 # override tcpdump profile to allow tcpdump access TACACS config file.
 sudo cp files/apparmor/usr.bin.tcpdump $FILESYSTEM_ROOT/etc/apparmor.d/local/usr.bin.tcpdump
 
-if [[ $CONFIGURED_ARCH == amd64 ]]; then
-## Pre-install the fundamental packages for amd64 (x86)
-sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install      \
-    rasdaemon
-fi
-
 ## Set /etc/shadow permissions to -rw-------.
 sudo LANG=c chroot $FILESYSTEM_ROOT chmod 600 /etc/shadow
 
diff --git a/files/build_templates/sonic_debian_extension.j2 b/files/build_templates/sonic_debian_extension.j2
index 74865bf57..2557d2b6d 100644
--- a/files/build_templates/sonic_debian_extension.j2
+++ b/files/build_templates/sonic_debian_extension.j2
@@ -510,6 +510,11 @@ sudo cp $IMAGE_CONFIGS/corefile_uploader/core_analyzer.rc.json $FILESYSTEM_ROOT_
 sudo chmod og-rw $FILESYSTEM_ROOT_ETC_SONIC/core_analyzer.rc.json
 
 if [[ $CONFIGURED_ARCH == amd64 ]]; then
+    # Install rasdaemon package
+    # NOTE: Can be installed from debian directly when we move to trixie
+    sudo dpkg --root=$FILESYSTEM_ROOT -i $debs_path/rasdaemon_*.deb || \
+    sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install -f
+
     # Rasdaemon service configuration. Use timer to start rasdaemon with a delay for better fast/warm boot performance
     sudo cp $IMAGE_CONFIGS/rasdaemon/rasdaemon.timer $FILESYSTEM_ROOT_USR_LIB_SYSTEMD_SYSTEM
     sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT systemctl disable rasdaemon.service
diff --git a/rules/rasdaemon.dep b/rules/rasdaemon.dep
new file mode 100644
index 000000000..40621f305
--- /dev/null
+++ b/rules/rasdaemon.dep
@@ -0,0 +1,10 @@
+
+SPATH       := $($(RASDAEMON)_SRC_PATH)
+DEP_FILES   := $(SONIC_COMMON_FILES_LIST) rules/rasdaemon.mk rules/rasdaemon.dep   
+DEP_FILES   += $(SONIC_COMMON_BASE_FILES_LIST)
+DEP_FILES   += $(shell git ls-files $(SPATH))
+
+$(RASDAEMON)_CACHE_MODE  := GIT_CONTENT_SHA 
+$(RASDAEMON)_DEP_FLAGS   := $(SONIC_COMMON_FLAGS_LIST)
+$(RASDAEMON)_DEP_FILES   := $(DEP_FILES)
+
diff --git a/rules/rasdaemon.mk b/rules/rasdaemon.mk
new file mode 100644
index 000000000..82486d6a1
--- /dev/null
+++ b/rules/rasdaemon.mk
@@ -0,0 +1,8 @@
+# rasdaemon package
+
+RASDAEMON_VERSION = 0.6.8-1
+export RASDAEMON_VERSION
+
+RASDAEMON = rasdaemon_$(RASDAEMON_VERSION)_$(CONFIGURED_ARCH).deb
+$(RASDAEMON)_SRC_PATH = $(SRC_PATH)/rasdaemon
+SONIC_MAKE_DEBS += $(RASDAEMON)
diff --git a/slave.mk b/slave.mk
index b6eb08fee..29f6baa25 100644
--- a/slave.mk
+++ b/slave.mk
@@ -1393,6 +1393,7 @@ $(addprefix $(TARGET_PATH)/, $(SONIC_INSTALLERS)) : $(TARGET_PATH)/% : \
         $(addprefix $(PYTHON_WHEELS_PATH)/,$(SONIC_PLATFORM_API_PY3)) \
         $(if $(findstring y,$(PDDF_SUPPORT)),$(addprefix $(PYTHON_WHEELS_PATH)/,$(PDDF_PLATFORM_API_BASE_PY2))) \
         $(if $(findstring y,$(PDDF_SUPPORT)),$(addprefix $(PYTHON_WHEELS_PATH)/,$(PDDF_PLATFORM_API_BASE_PY3))) \
+        $(if $(findstring amd64,$(CONFIGURED_ARCH)),$(addprefix $(IMAGE_DISTRO_DEBS_PATH)/,$(RASDAEMON))) \
         $(addprefix $(PYTHON_WHEELS_PATH)/,$(SONIC_YANG_MODELS_PY3)) \
         $(addprefix $(PYTHON_WHEELS_PATH)/,$(SONIC_CTRMGRD)) \
         $(addprefix $(FILES_PATH)/,$($(SONIC_CTRMGRD)_FILES)) \
diff --git a/sonic-slave-bookworm/Dockerfile.j2 b/sonic-slave-bookworm/Dockerfile.j2
index 05f282f61..56ced720b 100644
--- a/sonic-slave-bookworm/Dockerfile.j2
+++ b/sonic-slave-bookworm/Dockerfile.j2
@@ -337,6 +337,9 @@ RUN apt-get update && apt-get install -y \
         qemu-kvm \
         libvirt-clients \
         python3-pexpect \
+# For rasdaemon build
+        libsqlite3-dev \
+        libgettextpo-dev \
 {%- endif %}
 # For ntp
         autogen \
diff --git a/src/rasdaemon/0001-Check-CPUs-online-not-configured.patch b/src/rasdaemon/0001-Check-CPUs-online-not-configured.patch
new file mode 100644
index 000000000..c7c703fdb
--- /dev/null
+++ b/src/rasdaemon/0001-Check-CPUs-online-not-configured.patch
@@ -0,0 +1,38 @@
+From f1ea76375281001cdf4a048c1a4a24d86c6fbe48 Mon Sep 17 00:00:00 2001
+From: Zeph / Liz Loss-Cutler-Hull <warp-spam_git@aehallh.com>
+Date: Sun, 9 Jul 2023 04:57:19 -0700
+Subject: [PATCH] Check CPUs online, not configured.
+
+When the number of CPUs detected is greater than the number of CPUs in
+the system, rasdaemon will crash when it receives some events.
+
+Looking deeper, we also fail to use the poll method for similar reasons
+in this case.
+
+All of this can be prevented by checking to see how many CPUs are
+currently online (sysconf(_SC_NPROCESSORS_ONLN)) instead of how many
+CPUs the current kernel was configured to support
+(sysconf(_SC_NPROCESSORS_CONF)).
+
+For the kernel side of the discussion, see https://lore.kernel.org/lkml/CAM6Wdxft33zLeeXHhmNX5jyJtfGTLiwkQSApc=10fqf+rQh9DA@mail.gmail.com/T/
+Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
+---
+ ras-events.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/ras-events.c b/ras-events.c
+index a82dab2..5935163 100644
+--- a/ras-events.c
++++ b/ras-events.c
+@@ -350,7 +350,7 @@ static void parse_ras_data(struct pthread_data *pdata, struct kbuffer *kbuf,
+ 
+ static int get_num_cpus(struct ras_events *ras)
+ {
+-	return sysconf(_SC_NPROCESSORS_CONF);
++	return sysconf(_SC_NPROCESSORS_ONLN);
+ #if 0
+ 	char fname[MAX_PATH + 1];
+ 	int num_cpus = 0;
+-- 
+2.36.1
+
diff --git a/src/rasdaemon/Makefile b/src/rasdaemon/Makefile
new file mode 100644
index 000000000..15e6bbebe
--- /dev/null
+++ b/src/rasdaemon/Makefile
@@ -0,0 +1,23 @@
+.ONESHELL:
+SHELL = /bin/bash
+.SHELLFLAGS += -e
+
+MAIN_TARGET = rasdaemon_$(RASDAEMON_VERSION)_$(CONFIGURED_ARCH).deb
+
+$(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% :
+	rm -rf rasdaemon/
+
+	# Checkout Repository
+	git clone https://salsa.debian.org/tai271828/rasdaemon.git -b debian/$(RASDAEMON_VERSION)
+
+	pushd ./rasdaemon
+	# Patch
+	git apply ../0001-Check-CPUs-online-not-configured.patch
+ifeq ($(CROSS_BUILD_ENVIRON), y)
+	dpkg-buildpackage -rfakeroot -b -us -uc -a$(CONFIGURED_ARCH) -Pcross,nocheck -j$(SONIC_CONFIG_MAKE_JOBS) --admindir $(SONIC_DPKG_ADMINDIR)
+else
+	dpkg-buildpackage -rfakeroot -b -us -uc -j$(SONIC_CONFIG_MAKE_JOBS) --admindir $(SONIC_DPKG_ADMINDIR)
+endif
+	popd
+
+	mv $* $(DEST)/

From 90ade42b81887c22f182eddef9368bc019589d8d Mon Sep 17 00:00:00 2001
From: Kebo Liu <kebol@nvidia.com>
Date: Wed, 22 May 2024 23:52:59 +0800
Subject: [PATCH 0631/1115] [Mellanox] Block setting the watchdog in the case
 that watchdog period is longer than the max period supported by the platform
 #18980)

- Why I did it
Currently the platform API will arm the watchdog w/o checking the required watchdog period. If the watchdog period is longer than the max period supported by the platform, it will cause issue on some specific platform.

- How I did it
Verify whether the required watchdog period is longer than the max period supported, if yes then return failure.

- How to verify it
test with watchdog util to set the watchdog period to different values including larger than the max supported period, all case passed.

Signed-off-by: Kebo Liu <kebol@nvidia.com>
---
 .../sonic_platform/device_data.py             | 21 +++++++++++++++++++
 .../sonic_platform/watchdog.py                |  5 +++--
 .../mlnx-platform-api/tests/test_watchdog.py  |  4 +++-
 3 files changed, 27 insertions(+), 3 deletions(-)

diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/device_data.py b/platform/mellanox/mlnx-platform-api/sonic_platform/device_data.py
index d6f846a30..9ee37af99 100644
--- a/platform/mellanox/mlnx-platform-api/sonic_platform/device_data.py
+++ b/platform/mellanox/mlnx-platform-api/sonic_platform/device_data.py
@@ -21,6 +21,8 @@
 
 from . import utils
 
+DEFAULT_WD_PERIOD = 65535
+
 DEVICE_DATA = {
     'x86_64-mlnx_msn2700-r0': {
         'thermal': {
@@ -54,6 +56,9 @@
                 "cpu_pack": False,
                 "comex_amb": False
             }
+        },
+        'watchdog': {
+            "max_period": 32
         }
     },
     'x86_64-mlnx_msn2410-r0': {
@@ -69,6 +74,9 @@
                 "cpu_pack": False,
                 "comex_amb": False
             }
+        },
+        'watchdog': {
+            "max_period": 32
         }
     },
     'x86_64-mlnx_msn4700_simx-r0': {
@@ -284,3 +292,16 @@ def wait_platform_ready(cls):
             for sysfs_node in sysfs_nodes:
                 conditions.append(lambda: os.path.exists(f'/sys/module/sx_core/asic0/module{sfp_index}/{sysfs_node}'))
         return utils.wait_until_conditions(conditions, 300, 1)
+
+    @classmethod
+    @utils.read_only_cache()
+    def get_watchdog_max_period(cls):
+        platform_data = DEVICE_DATA.get(cls.get_platform_name(), None)
+        if not platform_data:
+            return DEFAULT_WD_PERIOD
+
+        watchdog_data = platform_data.get('watchdog', None)
+        if not watchdog_data:
+            return DEFAULT_WD_PERIOD
+
+        return watchdog_data.get('max_period', None)
diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/watchdog.py b/platform/mellanox/mlnx-platform-api/sonic_platform/watchdog.py
index 9e16b6d69..efa626e54 100644
--- a/platform/mellanox/mlnx-platform-api/sonic_platform/watchdog.py
+++ b/platform/mellanox/mlnx-platform-api/sonic_platform/watchdog.py
@@ -1,5 +1,5 @@
 #
-# Copyright (c) 2019-2023 NVIDIA CORPORATION & AFFILIATES.
+# Copyright (c) 2019-2024 NVIDIA CORPORATION & AFFILIATES.
 # Apache-2.0
 #
 # Licensed under the Apache License, Version 2.0 (the "License");
@@ -28,6 +28,7 @@
 
 from sonic_platform_base.watchdog_base import WatchdogBase
 from . import utils
+from .device_data import DeviceDataManager
 
 """ ioctl constants """
 IO_WRITE = 0x40000000
@@ -150,7 +151,7 @@ def arm(self, seconds):
         """
 
         ret = WD_COMMON_ERROR
-        if seconds < 0:
+        if seconds < 0 or seconds > DeviceDataManager.get_watchdog_max_period():
             return ret
 
         try:
diff --git a/platform/mellanox/mlnx-platform-api/tests/test_watchdog.py b/platform/mellanox/mlnx-platform-api/tests/test_watchdog.py
index 6e925d594..4b5f6c972 100644
--- a/platform/mellanox/mlnx-platform-api/tests/test_watchdog.py
+++ b/platform/mellanox/mlnx-platform-api/tests/test_watchdog.py
@@ -1,5 +1,5 @@
 #
-# Copyright (c) 2023 NVIDIA CORPORATION & AFFILIATES.
+# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
 # Apache-2.0
 #
 # Licensed under the Apache License, Version 2.0 (the "License");
@@ -97,9 +97,11 @@ def test_is_armed(self, mock_read):
     @mock.patch('sonic_platform.watchdog.WatchdogImplBase.open_handle', mock.MagicMock())
     @mock.patch('sonic_platform.watchdog.fcntl.ioctl', mock.MagicMock())
     @mock.patch('sonic_platform.watchdog.WatchdogImplBase.is_armed')
+    @mock.patch('sonic_platform.device_data.DeviceDataManager.get_watchdog_max_period', mock.MagicMock(return_value=32))
     def test_arm_disarm_watchdog2(self, mock_is_armed):
         watchdog = WatchdogType2('watchdog2')
         assert watchdog.arm(-1) == -1
+        assert watchdog.arm(33) == -1
         mock_is_armed.return_value = False
         watchdog.arm(10)
         mock_is_armed.return_value = True

From b1edfc60713ee05c7c30e12cfde4d636552eede3 Mon Sep 17 00:00:00 2001
From: Gagan Punathil Ellath <gpunathilell@nvidia.com>
Date: Wed, 22 May 2024 09:33:43 -0700
Subject: [PATCH 0632/1115] [Mellanox] Add bfb image installation script to the
 switch image (#18923)

- Why I did it
In order to install the bfb image from the switch to all the dpus we need a script to execute the bfb_install script on all the detected rshim device parallely. The sonic-bfb-installer can be used to install bfb images on the DPUs from the switch using the rshim drivers

- How I did it
Added new makefile and script files for installation of bfb image

- How to verify it
sonic-bfb-installer.sh -b <bfb_image_path> -r all
sonic-bfb-installer.sh -b <bfb_image_path> -r rshim1,rshim0
---
 .../build_templates/sonic_debian_extension.j2 |   1 +
 platform/mellanox/mlnx-sonic-bfb-installer.mk |  26 +++
 platform/mellanox/rules.mk                    |   1 +
 platform/mellanox/sonic-bfb-installer.sh      | 163 ++++++++++++++++++
 4 files changed, 191 insertions(+)
 create mode 100644 platform/mellanox/mlnx-sonic-bfb-installer.mk
 create mode 100755 platform/mellanox/sonic-bfb-installer.sh

diff --git a/files/build_templates/sonic_debian_extension.j2 b/files/build_templates/sonic_debian_extension.j2
index 2557d2b6d..72abfec16 100644
--- a/files/build_templates/sonic_debian_extension.j2
+++ b/files/build_templates/sonic_debian_extension.j2
@@ -1043,6 +1043,7 @@ sudo cp $files_path/$COMPONENT_VERSIONS_FILE $FILESYSTEM_ROOT/etc/mlnx/component
 sudo cp $files_path/$MLNX_FFB_SCRIPT $FILESYSTEM_ROOT/usr/bin/mlnx-ffb.sh
 sudo cp $files_path/$MLNX_ONIE_FW_UPDATE $FILESYSTEM_ROOT/usr/bin/$MLNX_ONIE_FW_UPDATE
 sudo cp $files_path/$MLNX_SSD_FW_UPDATE $FILESYSTEM_ROOT/usr/bin/$MLNX_SSD_FW_UPDATE
+sudo cp $files_path/$MLNX_SONIC_BFB_INSTALL $FILESYSTEM_ROOT/usr/bin/$MLNX_SONIC_BFB_INSTALL
 sudo cp $files_path/$MLNX_INSTALL_PENDING_FW $FILESYSTEM_ROOT/usr/bin/$MLNX_INSTALL_PENDING_FW
 sudo mkdir -p $FILESYSTEM_ROOT/etc/mlnx/cpld/
 for MLNX_CPLD_ARCHIVE in $MLNX_CPLD_ARCHIVES; do
diff --git a/platform/mellanox/mlnx-sonic-bfb-installer.mk b/platform/mellanox/mlnx-sonic-bfb-installer.mk
new file mode 100644
index 000000000..b247c0445
--- /dev/null
+++ b/platform/mellanox/mlnx-sonic-bfb-installer.mk
@@ -0,0 +1,26 @@
+#
+# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+# Mellanox specific Tool for installing bfb image on all DPUs attached to SmartSwitch
+
+MLNX_SONIC_BFB_INSTALL = sonic-bfb-installer.sh
+$(MLNX_SONIC_BFB_INSTALL)_PATH = $(PLATFORM_PATH)/
+MLNX_BFB_FILES = $(MLNX_SONIC_BFB_INSTALL) 
+SONIC_COPY_FILES += $(MLNX_BFB_FILES)
+MLNX_FILES += $(MLNX_BFB_FILES)
+
+export MLNX_SONIC_BFB_INSTALL
diff --git a/platform/mellanox/rules.mk b/platform/mellanox/rules.mk
index f7a10bc82..19e83b7c3 100644
--- a/platform/mellanox/rules.mk
+++ b/platform/mellanox/rules.mk
@@ -36,6 +36,7 @@ include $(PLATFORM_PATH)/install-pending-fw.mk
 include $(PLATFORM_PATH)/integration-scripts.mk
 include $(PLATFORM_PATH)/component-versions.mk
 include $(PLATFORM_PATH)/rshim.mk
+include $(PLATFORM_PATH)/mlnx-sonic-bfb-installer.mk
 
 SONIC_ALL += $(SONIC_ONE_IMAGE) \
              $(DOCKER_FPM)
diff --git a/platform/mellanox/sonic-bfb-installer.sh b/platform/mellanox/sonic-bfb-installer.sh
new file mode 100755
index 000000000..57930d991
--- /dev/null
+++ b/platform/mellanox/sonic-bfb-installer.sh
@@ -0,0 +1,163 @@
+#!/bin/bash
+#
+# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+command_name="sonic-bfb-installer.sh"
+usage(){
+    echo "Syntax: $command_name -b|--bfb <BFB_Image_Path> --rshim|-r <rshim1,..rshimN> --verbose|-v --config|-c <Options> --help|h"
+    echo "Arguments:"
+    echo "-b			Provide custom path for bfb image"
+    echo "-r			Install only on DPUs connected to rshim interfaces provided, mention all if installation is requried on all connected DPUs"
+    echo "-v			Verbose installation result output"
+    echo "-c			Config file"
+    echo "-h		        Help"
+}
+
+bfb_install_call(){
+    #Example:sudo bfb-install -b <full path to image> -r rshim<id>
+    local result_file=$(mktemp "/tmp/result_file.XXXXX")
+    trap "rm -f $result_file" EXIT
+    local cmd="timeout 300s bfb-install -b $2 -r $1 $appendix"
+    echo "Installing bfb image on DPU connected to $1 using $cmd"
+    local indicator="$1:"
+    eval "$cmd" > "$result_file" 2>&1 > >(while IFS= read -r line; do echo "$indicator $line"; done > "$result_file")
+    local exit_status=$?
+    if [ $exit_status  -ne 0 ]; then
+        echo "$1: Error: Installation failed on connected DPU!"
+    else
+        echo "$1: Installation Successful"
+    fi
+    if [ $exit_status -ne 0 ] ||[ $verbose = true ]; then
+        cat "$result_file"
+    fi
+    rm -f $result_file
+}
+
+validate_rshim(){
+    local provided_list=("$@")
+    for item1 in "${provided_list[@]}"; do
+        local found=0
+        for item2 in "${dev_names_det[@]}"; do
+            if [[ "$item1" = "$item2" ]]; then
+                found=1
+                break
+            fi
+        done
+        if [[ $found -eq 0 ]]; then
+            echo "$item1 is not detected! Please provide proper rshim interface list!"
+            exit 1
+        fi
+    done
+}
+
+check_for_root(){
+    if [ "$EUID" -ne 0 ]
+        then echo "Please run the script in sudo mode"
+        exit
+    fi
+}
+
+
+
+main(){
+    check_for_root
+    local config=
+    while [ "$1" != "--" ]  && [ -n "$1" ]; do
+        case $1 in
+            --help|-h)
+                usage;
+                exit 0
+            ;;
+            --bfb|-b)
+                shift;
+                bfb=$1
+            ;;
+            --rshim|-r)
+                shift;
+                rshim_dev=$1
+            ;;
+            --config|-c)
+                shift;
+                config=$1
+            ;;
+            --verbose|-v)
+                verbose=true
+            ;;
+        esac
+        shift
+    done
+    if [ -z "$bfb" ]; then
+        echo "Error : bfb image is not provided."
+        usage
+        exit 1
+    fi
+    if [[ -f ${config} ]]; then
+        echo "Using ${config} file"
+        appendix="-c ${config}"
+    fi
+    dev_names_det+=($(
+        ls /dev/rshim* | awk -F'/' '/^\/dev\/rshim/ {gsub(/:/,"",$NF); print $NF}'
+    ))
+    if [ "${#dev_names_det[@]}" -eq 0 ]; then
+        echo "No rshim interfaces detected! Make sure to run the $command_name script from the host device/ switch!"
+        exit 1
+    fi
+    if [ -z "$rshim_dev" ]; then
+        echo "No rshim interfaces provided!"
+        usage
+        exit 1
+    else
+        if [ "$rshim_dev" = "all" ]; then
+            dev_names=("${dev_names_det[@]}")
+            echo "${#dev_names_det[@]} rshim interfaces detected:"
+            echo "${dev_names_det[@]}"
+        else
+            IFS=',' read -ra dev_names <<< "$rshim_dev"
+            validate_rshim $dev_names
+        fi
+    fi
+    trap 'kill_ch_procs' SIGINT SIGTERM SIGHUP
+    for i in "${dev_names[@]}"
+    do
+        :
+        bfb_install_call $i $bfb &
+    done
+    wait
+}
+
+kill_all_descendant_procs() {
+    local pid="$1"
+    local self_kill="${2:-false}"
+    if children="$(pgrep -P "$pid")"; then
+        for child in $children; do
+            kill_all_descendant_procs "$child" true
+        done
+    fi
+    if [[ "$self_kill" == true ]]; then
+        kill -15 "$pid" > /dev/null 2>&1
+    fi
+}
+
+
+kill_ch_procs(){
+    echo ""
+    echo "Installation Interrupted.. killing All child procs"
+    kill_all_descendant_procs $$
+}
+appendix=
+verbose=false
+main "$@"

From 9c18b27802185d2dcf5bcb6dc62cdcf8308e1cbe Mon Sep 17 00:00:00 2001
From: Hua Liu <58683130+liuh-80@users.noreply.github.com>
Date: Thu, 23 May 2024 00:50:25 +0800
Subject: [PATCH 0633/1115] [docker]: Fix docker-wait-any script crash issue
 (#19009)

Fix docker-wait-any script crash issue.

Why I did it
docker-wait-any script will create a waiting thread for multiple containers.
When any container thread exit, g_thread_exit_event will set, and main thread will exit.
However when this happen, some thread may still waiting container with following code:
docker_client.wait(container_name)
Because docker_client will be destroyed when main thread exist, some time wait method will throw TypeError, and this will cause swss.sh crash then swss container can't start:

<30>May 13 07:11:22 DEVICE_NAME swss.sh[13603]: Traceback (most recent call last):
<30>May 13 07:11:22 DEVICE_NAME swss.sh[13603]: Exception in thread Thread-1:
...
<30>May 13 07:11:22 DEVICE_NAME swss.sh[13603]: while docker_client.inspect_container(container_name)['State']['Status'] != "running":
...
<30>May 13 07:11:23 DEVICE_NAME swss.sh[13603]: TypeError: 'NoneType' object is not callable
<13>May 13 07:11:23 DEVICE_NAME root: Stopping swss service...

This PR is based on analyze result of following PR: #10812

Microsoft ADO: 28052815
---
 files/image_config/misc/docker-wait-any | 12 ++++++++++--
 1 file changed, 10 insertions(+), 2 deletions(-)

diff --git a/files/image_config/misc/docker-wait-any b/files/image_config/misc/docker-wait-any
index f4001d7e0..a76efc0d8 100755
--- a/files/image_config/misc/docker-wait-any
+++ b/files/image_config/misc/docker-wait-any
@@ -49,8 +49,16 @@ def wait_for_container(docker_client, container_name):
     log.log_info("Waiting on container '{}'".format(container_name))
 
     while True:
-        docker_client.wait(container_name)
-
+        try:
+            docker_client.wait(container_name)
+        except TypeError as e:
+            if g_thread_exit_event.is_set():
+                # When other thread exist, main thread will exit and docker_client will be destoryed
+                log.log_info("Container {} wait thread get exception: {}".format(container_name, e))
+                return
+            else:
+                raise e
+        
         log.log_info("No longer waiting on container '{}'".format(container_name))
 
         # If this is a dependent service and warm restart is enabled for the system/container,

From f7d0fa8f5653461d6aa9d5f67d7ed02a5aea4532 Mon Sep 17 00:00:00 2001
From: DavidZagury <32644413+DavidZagury@users.noreply.github.com>
Date: Wed, 22 May 2024 19:51:48 +0300
Subject: [PATCH 0634/1115] [Mellanox] Update pcie yaml file for SN5600 and
 SN5400 (#19015)

Remove I2C Controller from pcie yaml file for SN5600 and SN5400
---
 device/mellanox/x86_64-nvidia_sn5400-r0/pcie.yaml | 6 ------
 device/mellanox/x86_64-nvidia_sn5600-r0/pcie.yaml | 8 +-------
 2 files changed, 1 insertion(+), 13 deletions(-)

diff --git a/device/mellanox/x86_64-nvidia_sn5400-r0/pcie.yaml b/device/mellanox/x86_64-nvidia_sn5400-r0/pcie.yaml
index 7c08d0aa1..0741f00f1 100644
--- a/device/mellanox/x86_64-nvidia_sn5400-r0/pcie.yaml
+++ b/device/mellanox/x86_64-nvidia_sn5400-r0/pcie.yaml
@@ -56,12 +56,6 @@
   fn: '2'
   id: a36f
   name: 'RAM memory: Intel Corporation Cannon Lake PCH Shared SRAM (rev 10)'
-- bus: '00'
-  dev: '15'
-  fn: '0'
-  id: a368
-  name: 'Serial bus controller [0c80]: Intel Corporation Cannon Lake PCH Serial IO
-    I2C Controller #0 (rev 10)'
 - bus: '00'
   dev: '16'
   fn: '0'
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/pcie.yaml b/device/mellanox/x86_64-nvidia_sn5600-r0/pcie.yaml
index 30c6a2377..ef0d1b3c7 100644
--- a/device/mellanox/x86_64-nvidia_sn5600-r0/pcie.yaml
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/pcie.yaml
@@ -1,5 +1,5 @@
 ##
-## Copyright (c) 2022 NVIDIA CORPORATION & AFFILIATES.
+## Copyright (c) 2022-2024 NVIDIA CORPORATION & AFFILIATES.
 ## Apache-2.0
 ##
 ## Licensed under the Apache License, Version 2.0 (the "License");
@@ -56,12 +56,6 @@
   fn: '2'
   id: a36f
   name: 'RAM memory: Intel Corporation Cannon Lake PCH Shared SRAM (rev 10)'
-- bus: '00'
-  dev: '15'
-  fn: '0'
-  id: a368
-  name: 'Serial bus controller [0c80]: Intel Corporation Cannon Lake PCH Serial IO
-    I2C Controller #0 (rev 10)'
 - bus: '00'
   dev: '16'
   fn: '0'

From 7d7332a6448c53856978db845685892507d27abe Mon Sep 17 00:00:00 2001
From: Guohan Lu <lguohan@gmail.com>
Date: Wed, 22 May 2024 09:52:13 -0700
Subject: [PATCH 0635/1115] [ci]: build nvidia bluefield dpu image (#19004)

Signed-off-by: Guohan Lu <lguohan@gmail.com>
---
 .azure-pipelines/azure-pipelines-UpgrateVersion.yml | 5 +++--
 .azure-pipelines/azure-pipelines-build.yml          | 7 ++++++-
 2 files changed, 9 insertions(+), 3 deletions(-)

diff --git a/.azure-pipelines/azure-pipelines-UpgrateVersion.yml b/.azure-pipelines/azure-pipelines-UpgrateVersion.yml
index d2be6dcbd..cb1b0744c 100644
--- a/.azure-pipelines/azure-pipelines-UpgrateVersion.yml
+++ b/.azure-pipelines/azure-pipelines-UpgrateVersion.yml
@@ -41,6 +41,7 @@ parameters:
   - marvell-arm64
   - mellanox
   - pensando
+  - nvidia-bluefield
 
 stages:
 - stage: Prepare
@@ -117,7 +118,7 @@ stages:
         echo "artifacts$artifacts"
         cp -r $(Pipeline.Workspace)/sonic-buildimage.${default_platform}/target/versions target/
         make freeze FREEZE_VERSION_OPTIONS=-r
-        find files/build/versions 
+        find files/build/versions
         ordered_artifacts=$(echo "$artifacts" | grep -v -E "arm64|armhf" && echo "$artifacts" | grep -E "arm64|armhf")
         for artifact in $ordered_artifacts
         do
@@ -179,4 +180,4 @@ stages:
     - publish: $(System.DefaultWorkingDirectory)/files/build/versions
       artifact: 'sonic-buildimage.versions'
       displayName: 'Archive SONiC versions'
-    
+
diff --git a/.azure-pipelines/azure-pipelines-build.yml b/.azure-pipelines/azure-pipelines-build.yml
index cf2b84041..9ef929530 100644
--- a/.azure-pipelines/azure-pipelines-build.yml
+++ b/.azure-pipelines/azure-pipelines-build.yml
@@ -121,6 +121,11 @@ jobs:
           variables:
             PLATFORM_ARCH: arm64
 
+        - name: nvidia-bluefield
+          pool: sonicbld-arm64
+          variables:
+            PLATFORM_ARCH: arm64
+
     buildSteps:
       - template: .azure-pipelines/template-skipvstest.yml@buildimage
       - template: .azure-pipelines/template-daemon.yml@buildimage
@@ -170,7 +175,7 @@ jobs:
                 make $BUILD_OPTIONS ENABLE_SYNCD_RPC=y target/docker-syncd-$(platform_rpc)-dnx-rpc.gz
                 pushd ./src/sonic-sairedis/SAI
                 git stash
-                popd 
+                popd
               fi
             fi
             if [ $(syncd_rpc_image) == yes ]; then

From 8db0a1f1b03d8dcfbc7a4885c5f5ea742da4f5ce Mon Sep 17 00:00:00 2001
From: Ashwin Srinivasan <93744978+assrinivasan@users.noreply.github.com>
Date: Wed, 22 May 2024 16:30:52 -0700
Subject: [PATCH 0636/1115] Adds YANG models for configurable intervals in
 CONFIG_DB for stormond (#18657)

#### Why I did it
This is part of a larger feature: [SONiC Storage Monitoring Daemon](https://github.com/sonic-net/SONiC/pull/1481) -- this commit adds the option to configure the daemon's polling interval and fsstats file sync interval (in seconds) of the daemon via config_db by introducing YANG models.

#### How I did it
Gives userside the option to dynamically a new table 'STORMOND' with key INTERVALS and fields 'daemon_polling_interval' with default value of '3600' seconds and 'fsstats_sync_interval' with default value of '86400' seconds as defined in the YANG model.

#### How to verify it
Flash image onto a DUT and add the aforementioned table to the CONFIG_DB. Verify that `stormond` has picked up your config intervals.
---
 src/sonic-yang-models/doc/Configuration.md    | 21 +++++
 .../tests/files/sample_config_db.json         |  6 ++
 .../yang_model_tests/tests/stormond.json      | 29 +++++++
 .../tests_config/stormond.json                | 79 +++++++++++++++++++
 .../yang-models/sonic-stormond-config.yang    | 40 ++++++++++
 5 files changed, 175 insertions(+)
 create mode 100644 src/sonic-yang-models/tests/yang_model_tests/tests/stormond.json
 create mode 100644 src/sonic-yang-models/tests/yang_model_tests/tests_config/stormond.json
 create mode 100644 src/sonic-yang-models/yang-models/sonic-stormond-config.yang

diff --git a/src/sonic-yang-models/doc/Configuration.md b/src/sonic-yang-models/doc/Configuration.md
index 37f193e1c..db1709f47 100644
--- a/src/sonic-yang-models/doc/Configuration.md
+++ b/src/sonic-yang-models/doc/Configuration.md
@@ -2072,6 +2072,27 @@ key - name
 | collector_port | Destination L4 port of the Sflow collector                                              |             | 6343      |             |
 | collector_vrf  | Specify the Collector VRF. In this revision, it is either default VRF or Management VRF.|             |           |             |
 
+### Storage Monitoring Daemon Interval Configuration
+
+These options are used to configure the daemon polling and sync-to-disk interval
+of the Storage Monitoring Daemon (stormond)
+
+**Config Sample**
+```
+{
+    "STORMOND_CONFIG": {
+        "INTERVALS": {
+            "daemon_polling_interval" : "60",
+            "fsstats_sync_interval"   : "360"
+        }
+    }
+}
+```
+
+*   `daemon_polling_interval` - Determines how often stormond queries the disk for relevant information and posts to STATE_DB
+*   `fsstats_sync_interval`   - Determines how often key information from the STATE_DB is synced to a file on disk
+
+
 ### Syslog Global Configuration
 
 These configuration options are used to configure rsyslog utility and the way
diff --git a/src/sonic-yang-models/tests/files/sample_config_db.json b/src/sonic-yang-models/tests/files/sample_config_db.json
index db159a93c..36814657d 100644
--- a/src/sonic-yang-models/tests/files/sample_config_db.json
+++ b/src/sonic-yang-models/tests/files/sample_config_db.json
@@ -2683,5 +2683,11 @@
             "global": {
             }
         }
+    },
+    "STORMOND_CONFIG": {
+        "INTERVALS": {
+            "daemon_polling_interval" : "3600",
+            "fsstats_sync_interval"   : "86400"
+        }
     }
 }
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/stormond.json b/src/sonic-yang-models/tests/yang_model_tests/tests/stormond.json
new file mode 100644
index 000000000..de8c699c4
--- /dev/null
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests/stormond.json
@@ -0,0 +1,29 @@
+{
+    "STORMOND_CONFIG_TABLE": {
+        "desc": "Config DB interval parameters for Storage Monitoring Daemon"
+    },
+    "STORMOND_INVALID_POLLING_INTERVAL": {
+        "desc": "Configure an invalid daemon polling interval",
+        "eStrKey" : "InvalidValue"
+    },
+    "STORMOND_INVALID_SYNC_INTERVAL": {
+        "desc": "Configure an invalid fsstats file sync interval",
+        "eStrKey" : "InvalidValue"
+    },
+    "STORMOND_POLLING_INTVL_BAD_LEN_MAX": {
+        "desc": "Configure an invalid daemon polling interval: out of range value",
+        "eStrKey" : "InvalidValue"
+    },
+    "STORMOND_SYNC_INTVL_BAD_LEN_MAX": {
+        "desc": "Configure an invalid fsstats file sync interval: out of range value",
+        "eStrKey" : "InvalidValue"
+    },
+    "STORMOND_SYNC_INTVL_EMPTY_VALUE": {
+        "desc": "Configure an empty file sync interval",
+        "eStrKey" : "InvalidValue"
+    },
+    "STORMOND_POLLING_INTVL_EMPTY_VALUE": {
+        "desc": "Configure an empty file sync interval",
+        "eStrKey" : "InvalidValue"
+    }
+}
\ No newline at end of file
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/stormond.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/stormond.json
new file mode 100644
index 000000000..225e6db22
--- /dev/null
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/stormond.json
@@ -0,0 +1,79 @@
+{
+    "STORMOND_CONFIG_TABLE": {
+        "sonic-stormond-config:sonic-stormond-config": {
+            "sonic-stormond-config:STORMOND_CONFIG": {
+                "INTERVALS":{
+                    "daemon_polling_interval" : "3600",
+                    "fsstats_sync_interval"   : "86400"
+
+                }
+            }
+        }
+    },
+    "STORMOND_INVALID_POLLING_INTERVAL": {
+        "sonic-stormond-config:sonic-stormond-config": {
+            "sonic-stormond-config:STORMOND_CONFIG": {
+                "INTERVALS":{
+                    "daemon_polling_interval" : "-1",
+                    "fsstats_sync_interval"   : "86400"
+
+                }
+            }
+        }
+    },
+    "STORMOND_INVALID_SYNC_INTERVAL": {
+        "sonic-stormond-config:sonic-stormond-config": {
+            "sonic-stormond-config:STORMOND_CONFIG": {
+                "INTERVALS":{
+                    "daemon_polling_interval" : "3600",
+                    "fsstats_sync_interval"   : "five_thousand_two_hundred_seconds"
+
+                }
+            }
+        }
+    },
+    "STORMOND_POLLING_INTVL_BAD_LEN_MAX": {
+        "sonic-stormond-config:sonic-stormond-config": {
+            "sonic-stormond-config:STORMOND_CONFIG": {
+                "INTERVALS":{
+                    "daemon_polling_interval" : "360036003600360036003600360036003",
+                    "fsstats_sync_interval"   : "86400"
+
+                }
+            }
+        }
+    },
+    "STORMOND_SYNC_INTVL_BAD_LEN_MAX": {
+        "sonic-stormond-config:sonic-stormond-config": {
+            "sonic-stormond-config:STORMOND_CONFIG": {
+                "INTERVALS":{
+                    "daemon_polling_interval" : "3600",
+                    "fsstats_sync_interval"   : "864008640086400864008640086400864"
+
+                }
+            }
+        }
+    },
+    "STORMOND_SYNC_INTVL_EMPTY_VALUE": {
+        "sonic-stormond-config:sonic-stormond-config": {
+            "sonic-stormond-config:STORMOND_CONFIG": {
+                "INTERVALS":{
+                    "daemon_polling_interval" : "3600",
+                    "fsstats_sync_interval"   : ""
+
+                }
+            }
+        }
+    },
+    "STORMOND_POLLING_INTVL_EMPTY_VALUE": {
+        "sonic-stormond-config:sonic-stormond-config": {
+            "sonic-stormond-config:STORMOND_CONFIG": {
+                "INTERVALS":{
+                    "daemon_polling_interval" : "",
+                    "fsstats_sync_interval"   : "86400"
+
+                }
+            }
+        }
+    }
+}
\ No newline at end of file
diff --git a/src/sonic-yang-models/yang-models/sonic-stormond-config.yang b/src/sonic-yang-models/yang-models/sonic-stormond-config.yang
new file mode 100644
index 000000000..3b50c6be2
--- /dev/null
+++ b/src/sonic-yang-models/yang-models/sonic-stormond-config.yang
@@ -0,0 +1,40 @@
+module sonic-stormond-config{
+
+    yang-version 1.1;
+
+    namespace "http://github.com/sonic-net/sonic-stormond-config";
+    prefix stormond-config;
+
+    import sonic-types {
+        prefix stypes;
+    }
+
+    description "STORMOND_CONFIG Table yang Module for SONiC";
+
+    container sonic-stormond-config {
+
+        container STORMOND_CONFIG {
+
+            description "stormond_config table in config_db.json";
+
+            container INTERVALS {
+
+                leaf daemon_polling_interval {
+                    description "Polling inerval for Storage Monitoring Daemon in STORMOND_CONFIG table";
+                    type uint32 {
+                        range "1..4294967295";
+                    }
+                    default "3600";
+                }
+
+                leaf fsstats_sync_interval {
+                    description "FSSTATS JSON file syncing interval for the Storage Monitoring Daemon in STORMOND_CONFIG table";
+                    type uint32 {
+                        range "1..4294967295";
+                    }
+                    default "86400";
+                }
+            }
+        }
+    }
+}

From eef4f1ea9a17cfd1038f3e0e6242c04661c5bf77 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Thu, 23 May 2024 19:00:47 +0800
Subject: [PATCH 0637/1115] [submodule] Update submodule sonic-gnmi to the
 latest HEAD automatically (#19038)

#### Why I did it
src/sonic-gnmi
```
* 585f441 - (HEAD -> master, origin/master, origin/HEAD) Add SaveOnSet (#108) (28 hours ago) [Ryan Lucus]
* 81174c0 - Fix full config update (#240) (2 days ago) [ganglv]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-gnmi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-gnmi b/src/sonic-gnmi
index 692f967d4..585f4419f 160000
--- a/src/sonic-gnmi
+++ b/src/sonic-gnmi
@@ -1 +1 @@
-Subproject commit 692f967d4fb2d55593267663a722826186ddf0d1
+Subproject commit 585f4419f983b8d931121fdcb8acfe549bb06fba

From 74317df1b07f778d8b7b21159afc92a7583c1760 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Thu, 23 May 2024 19:00:52 +0800
Subject: [PATCH 0638/1115] [submodule] Update submodule sonic-dbsyncd to the
 latest HEAD automatically (#19036)

#### Why I did it
src/sonic-dbsyncd
```
* d5fa793 - (HEAD -> master, origin/master, origin/HEAD) Handle exception to avoid lldp_syncd crash (#65) (2 hours ago) [Zhaohui Sun]
* bc63571 - Fix pipeline issue. (#66) (25 hours ago) [Liu Shilong]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-dbsyncd | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-dbsyncd b/src/sonic-dbsyncd
index 4d627eed8..d5fa7937a 160000
--- a/src/sonic-dbsyncd
+++ b/src/sonic-dbsyncd
@@ -1 +1 @@
-Subproject commit 4d627eed8173ceab02bf9070cd5360c8ad0d42d7
+Subproject commit d5fa7937a4e38ce0356368977ab4ba89090b2209

From 65c4a7d10a2aa97b25c32745b58b7929a6d9b2c3 Mon Sep 17 00:00:00 2001
From: xumia <59720581+xumia@users.noreply.github.com>
Date: Fri, 24 May 2024 00:30:27 +0800
Subject: [PATCH 0639/1115] Support OpenSSL 3.0 SymCrypt provider for bookworm
 (#18088)

Support OpenSSL 3.0 SymCrypt provider and engine for bookworm
Restore the feature support for SymCrypt-OpenSSL.
For bookworm, using OpenSSL 3.0.11, it supports both provider and engine. The engine is in deprecating, it will be deprecated in the long term. Currently, some of the applications which still use the low-level OpenSSL APIs are not ready to migrate to OpenSSL provider, so OpenSSL engine will still be used for some time.
The OpenSSL SymCrypt provider and engine are included in the openssl-symcrypt debian package (>=1.0-preview).

Microsoft ADO (number only): 27655936
---
 Makefile.work                                 | 15 ++--------
 azure-pipelines.yml                           |  2 +-
 dockers/docker-base-bookworm/Dockerfile.j2    |  3 +-
 .../build_templates/sonic_debian_extension.j2 |  7 +++++
 rules/sonic-fips.mk                           | 30 ++++++++++++++++---
 sonic-slave-bookworm/Dockerfile.j2            |  8 ++---
 sonic-slave-bullseye/Dockerfile.j2            |  4 +--
 7 files changed, 44 insertions(+), 25 deletions(-)

diff --git a/Makefile.work b/Makefile.work
index 58266149d..69cf6e5b1 100644
--- a/Makefile.work
+++ b/Makefile.work
@@ -141,6 +141,7 @@ rules/config.user:
 
 include rules/config
 -include rules/config.user
+include rules/sonic-fips.mk
 
 ifneq ($(DEFAULT_CONTAINER_REGISTRY),)
 override DEFAULT_CONTAINER_REGISTRY := $(DEFAULT_CONTAINER_REGISTRY)/
@@ -177,18 +178,6 @@ endif
 SLAVE_IMAGE = $(SLAVE_BASE_IMAGE)-$(USER_LC)
 DOCKER_ROOT = $(PWD)/fsroot.docker.$(BLDENV)
 
-# Support FIPS feature, armhf not supported yet
-ifeq ($(PLATFORM_ARCH),armhf)
-INCLUDE_FIPS := n
-ENABLE_FIPS := n
-endif
-
-# FIPS not yet available on Bookworm
-ifeq ($(BLDENV),bookworm)
-$(warning FIPS support not yet available on Bookworm)
-INCLUDE_FIPS := n
-endif
-
 ifeq ($(INCLUDE_FIPS), n)
 ifeq ($(ENABLE_FIPS), y)
     $(error Cannot set fips config ENABLE_FIPS=y when INCLUDE_FIPS=n)
@@ -222,6 +211,8 @@ $(shell CONFIGURED_ARCH=$(CONFIGURED_ARCH) \
 	INCLUDE_FIPS=$(INCLUDE_FIPS) \
 	DOCKER_EXTRA_OPTS=$(DOCKER_EXTRA_OPTS) \
 	DEFAULT_CONTAINER_REGISTRY=$(DEFAULT_CONTAINER_REGISTRY) \
+	FIPS_VERSION=$(FIPS_VERSION) \
+	FIPS_GOLANG_VERSION=$(FIPS_GOLANG_VERSION) \
 	j2 $(SLAVE_DIR)/Dockerfile.j2 > $(SLAVE_DIR)/Dockerfile)
 
 $(shell CONFIGURED_ARCH=$(CONFIGURED_ARCH) \
diff --git a/azure-pipelines.yml b/azure-pipelines.yml
index b87dfc41c..18ed0c58b 100644
--- a/azure-pipelines.yml
+++ b/azure-pipelines.yml
@@ -42,7 +42,7 @@ variables:
 - name: CACHE_MODE
   value: rcache
 - name: ENABLE_FIPS
-  value: n
+  value: y
 - name: BUILD_BRANCH
   ${{ if eq(variables['Build.Reason'], 'PullRequest') }}:
     value: $(System.PullRequest.TargetBranch)
diff --git a/dockers/docker-base-bookworm/Dockerfile.j2 b/dockers/docker-base-bookworm/Dockerfile.j2
index e500259bb..2a3388d77 100644
--- a/dockers/docker-base-bookworm/Dockerfile.j2
+++ b/dockers/docker-base-bookworm/Dockerfile.j2
@@ -60,7 +60,8 @@ RUN apt update &&            \
         jq                   \
 # for sairedis zmq rpc channel
         libzmq5              \
-        libwrap0
+        libwrap0            \
+        libatomic1
 
 # Add a config file to allow pip to install packages outside of apt/the Debian repos
 COPY ["pip.conf", "/etc/pip.conf"]
diff --git a/files/build_templates/sonic_debian_extension.j2 b/files/build_templates/sonic_debian_extension.j2
index 72abfec16..b540f39d4 100644
--- a/files/build_templates/sonic_debian_extension.j2
+++ b/files/build_templates/sonic_debian_extension.j2
@@ -732,6 +732,13 @@ exit 101
 EOF
 sudo chmod a+x $FILESYSTEM_ROOT/usr/sbin/policy-rc.d
 
+if [ "$INCLUDE_FIPS" == y ]; then
+    sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install libatomic1
+    # The package openssh-client 9.2 is conflict with FIPS, the line below can be removed when the openssh-client version>=9.4
+    # The package will be reinstalled when isntalling the FIPS packages
+    sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y remove openssh-client
+fi
+
 {% if installer_debs.strip() -%}
 {% for deb in installer_debs.strip().split(' ') -%}
 sudo dpkg --root=$FILESYSTEM_ROOT -i {{deb}} || sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install -f
diff --git a/rules/sonic-fips.mk b/rules/sonic-fips.mk
index b6c0d1743..0ec82b266 100644
--- a/rules/sonic-fips.mk
+++ b/rules/sonic-fips.mk
@@ -1,6 +1,18 @@
 # fips packages
 
-FIPS_VERSION = 0.10
+ifeq ($(BLDENV), bookworm)
+FIPS_VERSION = 1.4.3-preview
+FIPS_OPENSSL_VERSION = 3.0.11-1~deb12u2+fips
+FIPS_OPENSSH_VERSION = 9.2p1-2+deb12u2+fips
+FIPS_PYTHON_MAIN_VERSION = 3.11
+FIPS_PYTHON_VERSION = 3.11.2-6+fips
+FIPS_GOLANG_MAIN_VERSION = 1.19
+FIPS_GOLANG_VERSION = 1.19.8-2+fips
+FIPS_KRB5_VERSION = 1.20.1-2+deb12u1+fips
+endif
+
+ifeq ($(BLDENV), bullseye)
+FIPS_VERSION = 0.12
 FIPS_OPENSSL_VERSION = 1.1.1n-0+deb11u5+fips
 FIPS_OPENSSH_VERSION = 8.4p1-5+deb11u2+fips
 FIPS_PYTHON_MAIN_VERSION = 3.9
@@ -8,6 +20,8 @@ FIPS_PYTHON_VERSION = 3.9.2-1+fips
 FIPS_GOLANG_MAIN_VERSION = 1.15
 FIPS_GOLANG_VERSION = 1.15.15-1~deb11u4+fips
 FIPS_KRB5_VERSION = 1.18.3-6+deb11u4+fips
+endif
+
 FIPS_URL_PREFIX = https://sonicstorage.blob.core.windows.net/public/fips/$(BLDENV)/$(FIPS_VERSION)/$(CONFIGURED_ARCH)
 
 SYMCRYPT_OPENSSL_NAME = symcrypt-openssl
@@ -15,16 +29,20 @@ SYMCRYPT_OPENSSL = $(SYMCRYPT_OPENSSL_NAME)_$(FIPS_VERSION)_$(CONFIGURED_ARCH).d
 $(SYMCRYPT_OPENSSL)_SRC_PATH = $(SRC_PATH)/sonic-fips
 
 FIPS_OPENSSL = openssl_$(FIPS_OPENSSL_VERSION)_$(CONFIGURED_ARCH).deb
+ifeq ($(BLDENV), bookworm)
+FIPS_OPENSSL_LIBSSL = libssl3_$(FIPS_OPENSSL_VERSION)_$(CONFIGURED_ARCH).deb
+else
 FIPS_OPENSSL_LIBSSL = libssl1.1_$(FIPS_OPENSSL_VERSION)_$(CONFIGURED_ARCH).deb
+endif
 FIPS_OPENSSL_LIBSSL_DEV = libssl-dev_$(FIPS_OPENSSL_VERSION)_$(CONFIGURED_ARCH).deb
 FIPS_OPENSSL_LIBSSL_DOC = libssl-doc_$(FIPS_OPENSSL_VERSION)_all.deb
 FIPS_OPENSSL_ALL = $(FIPS_OPENSSL) $(FIPS_OPENSSL_LIBSSL) $(FIPS_OPENSSL_LIBSSL_DEV) $(FIPS_OPENSSL_LIBSSL_DOC)
 
-FIPS_OPENSSH = ssh_$(FIPS_OPENSSH_VERSION)_$(CONFIGURED_ARCH).deb
+FIPS_OPENSSH = ssh_$(FIPS_OPENSSH_VERSION)_all.deb
 FIPS_OPENSSH_CLIENT = openssh-client_$(FIPS_OPENSSH_VERSION)_$(CONFIGURED_ARCH).deb
 FIPS_OPENSSH_SFTP_SERVER = openssh-sftp-server_$(FIPS_OPENSSH_VERSION)_$(CONFIGURED_ARCH).deb
 FIPS_OPENSSH_SERVER = openssh-server_$(FIPS_OPENSSH_VERSION)_$(CONFIGURED_ARCH).deb
-FIPS_OPENSSH_ALL = $(FIPS_SSH) $(FIPS_OPENSSH_CLIENT) $(FIPS_OPENSSH_SFTP_SERVER) $(FIPS_OPENSSH_SERVER)
+FIPS_OPENSSH_ALL = $(FIPS_OPENSSH_CLIENT) $(FIPS_OPENSSH_SFTP_SERVER) $(FIPS_OPENSSH_SERVER) $(FIPS_OPENSSH)
 
 FIPS_PYTHON = python$(FIPS_PYTHON_MAIN_VERSION)_$(FIPS_PYTHON_VERSION)_$(CONFIGURED_ARCH).deb
 FIPS_PYTHON_MINIMAL = python$(FIPS_PYTHON_MAIN_VERSION)-minimal_$(FIPS_PYTHON_VERSION)_$(CONFIGURED_ARCH).deb
@@ -35,7 +53,11 @@ FIPS_PYTHON_ALL = $(FIPS_PYTHON) $(FIPS_PYTHON_MINIMAL) $(FIPS_LIBPYTHON) $(FIPS
 
 FIPS_GOLANG = golang-$(FIPS_GOLANG_MAIN_VERSION)_$(FIPS_GOLANG_VERSION)_all.deb
 FIPS_GOLANG_GO = golang-$(FIPS_GOLANG_MAIN_VERSION)-go_$(FIPS_GOLANG_VERSION)_$(CONFIGURED_ARCH).deb
+ifeq ($(BLDENV), bookworm)
+FIPS_GOLANG_SRC = golang-$(FIPS_GOLANG_MAIN_VERSION)-src_$(FIPS_GOLANG_VERSION)_all.deb
+else
 FIPS_GOLANG_SRC = golang-$(FIPS_GOLANG_MAIN_VERSION)-src_$(FIPS_GOLANG_VERSION)_$(CONFIGURED_ARCH).deb
+endif
 FIPS_GOLANG_DOC = golang-$(FIPS_GOLANG_MAIN_VERSION)-doc_$(FIPS_GOLANG_VERSION)_all.deb
 FIPS_GOLANG_ALL = $(FIPS_GOLANG) $(FIPS_GOLANG_GO) $(FIPS_GOLANG_SRC) $(FIPS_GOLANG_DOC)
 
@@ -55,7 +77,7 @@ FIPS_PACKAGE_ALL = $(SYMCRYPT_OPENSSL) $(FIPS_DERIVED_TARGET)
 
 
 ifeq ($(INCLUDE_FIPS), y)
-  FIPS_BASEIMAGE_INSTALLERS = $(FIPS_OPENSSL_LIBSSL) $(FIPS_OPENSSL_LIBSSL_DEV) $(FIPS_OPENSSL) $(SYMCRYPT_OPENSSL) $(FIPS_OPENSSH) $(FIPS_OPENSSH_CLIENT) $(FIPS_OPENSSH_SFTP_SERVER) $(FIPS_OPENSSH_SERVER) $(FIPS_KRB5)
+  FIPS_BASEIMAGE_INSTALLERS = $(FIPS_OPENSSL_LIBSSL) $(FIPS_OPENSSL_LIBSSL_DEV) $(FIPS_OPENSSL) $(SYMCRYPT_OPENSSL) $(FIPS_OPENSSH_CLIENT) $(FIPS_OPENSSH) $(FIPS_OPENSSH_SFTP_SERVER) $(FIPS_OPENSSH_SERVER) $(FIPS_KRB5)
   SONIC_MAKE_DEBS += $(SYMCRYPT_OPENSSL)
 
 $(foreach package,$(FIPS_DERIVED_TARGET),$(eval $(call add_extra_package,$(SYMCRYPT_OPENSSL),$(package))))
diff --git a/sonic-slave-bookworm/Dockerfile.j2 b/sonic-slave-bookworm/Dockerfile.j2
index 56ced720b..fd9184218 100644
--- a/sonic-slave-bookworm/Dockerfile.j2
+++ b/sonic-slave-bookworm/Dockerfile.j2
@@ -510,12 +510,10 @@ RUN apt-get install -y kernel-wedge
 # For gobgp and telemetry build
 RUN apt-get install -y golang
 {%- if INCLUDE_FIPS == "y" %}
-# FIPS not yet available
-RUN false
-RUN wget -O golang-go.deb 'https://sonicstorage.blob.core.windows.net/public/fips/bookworm/0.1/{{ CONFIGURED_ARCH }}/golang-1.15-go_1.15.15-1~deb11u4%2Bfips_{{ CONFIGURED_ARCH }}.deb' \
- && wget -O golang-src.deb 'https://sonicstorage.blob.core.windows.net/public/fips/bookworm/0.1/{{ CONFIGURED_ARCH }}/golang-1.15-src_1.15.15-1~deb11u4%2Bfips_{{ CONFIGURED_ARCH }}.deb' \
+RUN wget -O golang-go.deb 'https://sonicstorage.blob.core.windows.net/public/fips/bookworm/{{ FIPS_VERSION }}/{{ CONFIGURED_ARCH }}/golang-1.19-go_{{ FIPS_GOLANG_VERSION }}_{{ CONFIGURED_ARCH }}.deb' \
+ && wget -O golang-src.deb 'https://sonicstorage.blob.core.windows.net/public/fips/bookworm/{{ FIPS_VERSION }}/{{ CONFIGURED_ARCH }}/golang-1.19-src_{{ FIPS_GOLANG_VERSION }}_all.deb' \
  && dpkg -i golang-go.deb golang-src.deb \
- && ln -sf /usr/lib/go-1.15 /usr/local/go \
+ && ln -sf /usr/lib/go-1.19 /usr/local/go \
  && rm golang-go.deb golang-src.deb
 {%- else %}
 RUN apt-get install -y golang-go \
diff --git a/sonic-slave-bullseye/Dockerfile.j2 b/sonic-slave-bullseye/Dockerfile.j2
index a0b453d4d..2272dac60 100644
--- a/sonic-slave-bullseye/Dockerfile.j2
+++ b/sonic-slave-bullseye/Dockerfile.j2
@@ -514,8 +514,8 @@ RUN eatmydata apt-get install -y kernel-wedge
 # For gobgp and telemetry build
 RUN eatmydata apt-get install -y golang-1.15 && ln -s /usr/lib/go-1.15 /usr/local/go
 {%- if INCLUDE_FIPS == "y" %}
-RUN wget -O golang-go.deb 'https://sonicstorage.blob.core.windows.net/public/fips/bullseye/0.1/{{ CONFIGURED_ARCH }}/golang-1.15-go_1.15.15-1~deb11u4%2Bfips_{{ CONFIGURED_ARCH }}.deb' \
- && wget -O golang-src.deb 'https://sonicstorage.blob.core.windows.net/public/fips/bullseye/0.1/{{ CONFIGURED_ARCH }}/golang-1.15-src_1.15.15-1~deb11u4%2Bfips_{{ CONFIGURED_ARCH }}.deb' \
+RUN wget -O golang-go.deb 'https://sonicstorage.blob.core.windows.net/public/fips/bullseye/{{ FIPS_VERSION }}/{{ CONFIGURED_ARCH }}/golang-1.15-go_{{ FIPS_GOLANG_VERSION }}_{{ CONFIGURED_ARCH }}.deb' \
+ && wget -O golang-src.deb 'https://sonicstorage.blob.core.windows.net/public/fips/bullseye/{{ FIPS_VERSION }}/{{ CONFIGURED_ARCH }}/golang-1.15-src_{{ FIPS_GOLANG_VERSION }}_{{ CONFIGURED_ARCH }}.deb' \
  && eatmydata dpkg -i golang-go.deb golang-src.deb \
  && ln -sf /usr/lib/go-1.15 /usr/local/go \
  && rm golang-go.deb golang-src.deb

From d6ccd2d10a2f8ea0983aadb623a814aab0fedae6 Mon Sep 17 00:00:00 2001
From: siqbal1986 <shahzad.iqbal@microsoft.com>
Date: Thu, 23 May 2024 09:39:40 -0700
Subject: [PATCH 0640/1115] [Yang][Bugfix] Vxlan tunnel yang model to support
 dest_ip and name length. (#18966)

Fixed  the Vxlan tunnel yang model to add support for
1) Tunnel name length restriction has been removed
2) dst_ip field.

#### Why I did it
The yand modle was misisng an element and supported tunnel anme was very small.
#### How to verify it
run yang model tests
---
 src/sonic-yang-models/doc/Configuration.md    |   3 +-
 .../tests/yang_model_tests/tests/vxlan.json   |  13 ++
 .../yang_model_tests/tests_config/vxlan.json  | 170 +++++++++++++++---
 .../yang-models/sonic-vxlan.yang              |  14 +-
 4 files changed, 169 insertions(+), 31 deletions(-)

diff --git a/src/sonic-yang-models/doc/Configuration.md b/src/sonic-yang-models/doc/Configuration.md
index db1709f47..0017abaa5 100644
--- a/src/sonic-yang-models/doc/Configuration.md
+++ b/src/sonic-yang-models/doc/Configuration.md
@@ -2508,7 +2508,8 @@ VXLAN_EVPN_NVO holds the VXLAN_TUNNEL object to be used for BGP-EVPN discovered
 {
 "VXLAN_TUNNEL": {
         "vtep1": {
-            "src_ip": "10.10.10.10"
+            "src_ip": "10.10.10.10",
+            "dst_ip": "12.12.12.12"
         }
   }
 "VXLAN_TUNNEL_MAP" : {
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/vxlan.json b/src/sonic-yang-models/tests/yang_model_tests/tests/vxlan.json
index 880d0c015..778ab68a6 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests/vxlan.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests/vxlan.json
@@ -16,5 +16,18 @@
     "VXLAN_MAP_OOR_VNI": {
         "desc": "VNI Out of Range in VXLAN_TUNNEL_MAP TABLE",
         "eStrKey": "Range"
+    },
+    "VXLAN_TUNNEL_NAME_VALID_TEST": {
+        "desc": "Tunnel Name string length 30 is valid"
+    },
+    "VXLAN_TUNNEL_NAME_INVALID_TEST": {
+        "desc": "Tunnel Name string length 0 is invalid",
+        "eStrKey": "Must"
+    },
+    "VXLAN_TUNNEL_NAME_VALID_DST_IPV4_TEST": {
+        "desc": "Valid IPv4 Destination Address"
+    },
+    "VXLAN_TUNNEL_NAME_VALID_DST_IPV6_TEST": {
+        "desc": "Valid IPv6 Destination Address"
     }
 }
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/vxlan.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/vxlan.json
index 117d626ca..64c26d3e9 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/vxlan.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/vxlan.json
@@ -8,7 +8,7 @@
                     }
                 ]
             }
-         },
+        },
         "sonic-vxlan:sonic-vxlan": {
             "sonic-vxlan:VXLAN_TUNNEL": {
                 "VXLAN_TUNNEL_LIST": [
@@ -17,7 +17,7 @@
                         "src_ip": "1.2.3.4"
                     }
                 ]
-             },
+            },
             "sonic-vxlan:VXLAN_EVPN_NVO": {
                 "VXLAN_EVPN_NVO_LIST": [
                     {
@@ -25,7 +25,7 @@
                         "source_vtep": "vtep1"
                     }
                 ]
-             },
+            },
             "sonic-vxlan:VXLAN_TUNNEL_MAP": {
                 "VXLAN_TUNNEL_MAP_LIST": [
                     {
@@ -35,8 +35,8 @@
                         "vni": "100"
                     }
                 ]
-             }
-         }
+            }
+        }
     },
     "VXLAN_VALID_V6_TUNNEL_TEST": {
         "sonic-vlan:sonic-vlan": {
@@ -47,7 +47,7 @@
                     }
                 ]
             }
-         },
+        },
         "sonic-vxlan:sonic-vxlan": {
             "sonic-vxlan:VXLAN_TUNNEL": {
                 "VXLAN_TUNNEL_LIST": [
@@ -56,7 +56,7 @@
                         "src_ip": "2001::1:2:3:4"
                     }
                 ]
-             },
+            },
             "sonic-vxlan:VXLAN_EVPN_NVO": {
                 "VXLAN_EVPN_NVO_LIST": [
                     {
@@ -64,7 +64,7 @@
                         "source_vtep": "vtep1"
                     }
                 ]
-             },
+            },
             "sonic-vxlan:VXLAN_TUNNEL_MAP": {
                 "VXLAN_TUNNEL_MAP_LIST": [
                     {
@@ -74,8 +74,8 @@
                         "vni": "100"
                     }
                 ]
-             }
-         }
+            }
+        }
     },
     "VXLAN_EVPN_NVO_WITHOUT_VTEP": {
         "sonic-vxlan:sonic-vxlan": {
@@ -86,8 +86,8 @@
                         "source_vtep": "vtep1"
                     }
                 ]
-             }
-         }
+            }
+        }
     },
     "VXLAN_MAP_WITHOUT_VTEP": {
         "sonic-vlan:sonic-vlan": {
@@ -98,7 +98,7 @@
                     }
                 ]
             }
-         },
+        },
         "sonic-vxlan:sonic-vxlan": {
             "sonic-vxlan:VXLAN_TUNNEL_MAP": {
                 "VXLAN_TUNNEL_MAP_LIST": [
@@ -109,8 +109,8 @@
                         "vni": "100"
                     }
                 ]
-             }
-         }
+            }
+        }
     },
     "VXLAN_MAP_WITHOUT_VLAN": {
         "sonic-vxlan:sonic-vxlan": {
@@ -121,7 +121,7 @@
                         "src_ip": "1.2.3.4"
                     }
                 ]
-             },
+            },
             "sonic-vxlan:VXLAN_TUNNEL_MAP": {
                 "VXLAN_TUNNEL_MAP_LIST": [
                     {
@@ -131,8 +131,8 @@
                         "vni": "100"
                     }
                 ]
-             }
-         }
+            }
+        }
     },
     "VXLAN_MAP_OOR_VNI": {
         "sonic-vlan:sonic-vlan": {
@@ -143,7 +143,7 @@
                     }
                 ]
             }
-         },
+        },
         "sonic-vxlan:sonic-vxlan": {
             "sonic-vxlan:VXLAN_TUNNEL": {
                 "VXLAN_TUNNEL_LIST": [
@@ -152,7 +152,7 @@
                         "src_ip": "1.2.3.4"
                     }
                 ]
-             },
+            },
             "sonic-vxlan:VXLAN_TUNNEL_MAP": {
                 "VXLAN_TUNNEL_MAP_LIST": [
                     {
@@ -162,7 +162,133 @@
                         "vni": "16777299"
                     }
                 ]
-             }
-         }
+            }
+        }
+    },
+    "VXLAN_TUNNEL_NAME_VALID_TEST": {
+        "sonic-vlan:sonic-vlan": {
+            "sonic-vlan:VLAN": {
+                "VLAN_LIST": [
+                    {
+                        "name": "Vlan100"
+                    }
+                ]
+            }
+        },
+        "sonic-vxlan:sonic-vxlan": {
+            "sonic-vxlan:VXLAN_TUNNEL": {
+                "VXLAN_TUNNEL_LIST": [
+                    {
+                        "name": "30CharachterLongName1234567890",
+                        "src_ip": "1.2.3.4"
+                    }
+                ]
+            },
+            "sonic-vxlan:VXLAN_TUNNEL_MAP": {
+                "VXLAN_TUNNEL_MAP_LIST": [
+                    {
+                        "name": "30CharachterLongName1234567890",
+                        "mapname": "map_100_Vlan100",
+                        "vlan": "Vlan100",
+                        "vni": "16777214"
+                    }
+                ]
+            }
+        }
+    },
+    "VXLAN_TUNNEL_NAME_INVALID_TEST": {
+        "sonic-vlan:sonic-vlan": {
+            "sonic-vlan:VLAN": {
+                "VLAN_LIST": [
+                    {
+                        "name": "Vlan100"
+                    }
+                ]
+            }
+         },
+        "sonic-vxlan:sonic-vxlan": {
+            "sonic-vxlan:VXLAN_TUNNEL": {
+                "VXLAN_TUNNEL_LIST": [
+                    {
+                        "name": "",
+                        "src_ip": "1.2.3.4"
+                    }
+                ]
+             },
+            "sonic-vxlan:VXLAN_TUNNEL_MAP": {
+                "VXLAN_TUNNEL_MAP_LIST": [
+                    {
+                        "name": "",
+                        "mapname": "map_100_Vlan100",
+                        "vlan": "Vlan100",
+                        "vni": "16777214"
+                    }
+                ]
+            }
+        }
+    },
+    "VXLAN_TUNNEL_NAME_VALID_DST_IPV4_TEST": {
+        "sonic-vlan:sonic-vlan": {
+            "sonic-vlan:VLAN": {
+                "VLAN_LIST": [
+                    {
+                        "name": "Vlan100"
+                    }
+                ]
+            }
+        },
+        "sonic-vxlan:sonic-vxlan": {
+            "sonic-vxlan:VXLAN_TUNNEL": {
+                "VXLAN_TUNNEL_LIST": [
+                    {
+                        "name": "30CharachterLongName1234567890",
+                        "src_ip": "1.2.3.4",
+                        "dst_ip": "1.2.3.4"
+                    }
+                ]
+            },
+            "sonic-vxlan:VXLAN_TUNNEL_MAP": {
+                "VXLAN_TUNNEL_MAP_LIST": [
+                    {
+                        "name": "30CharachterLongName1234567890",
+                        "mapname": "map_100_Vlan100",
+                        "vlan": "Vlan100",
+                        "vni": "16777214"
+                    }
+                ]
+            }
+        }
+    },
+    "VXLAN_TUNNEL_NAME_VALID_DST_IPV6_TEST": {
+        "sonic-vlan:sonic-vlan": {
+            "sonic-vlan:VLAN": {
+                "VLAN_LIST": [
+                    {
+                        "name": "Vlan100"
+                    }
+                ]
+            }
+        },
+        "sonic-vxlan:sonic-vxlan": {
+            "sonic-vxlan:VXLAN_TUNNEL": {
+                "VXLAN_TUNNEL_LIST": [
+                    {
+                        "name": "tunnel1",
+                        "src_ip": "1.2.3.4",
+                        "dst_ip": "2001::1:2:3:4"
+                    }
+                ]
+            },
+            "sonic-vxlan:VXLAN_TUNNEL_MAP": {
+                "VXLAN_TUNNEL_MAP_LIST": [
+                    {
+                        "name": "tunnel1",
+                        "mapname": "map_100_Vlan100",
+                        "vlan": "Vlan100",
+                        "vni": "16777214"
+                    }
+                ]
+            }
+        }
     }
 }
diff --git a/src/sonic-yang-models/yang-models/sonic-vxlan.yang b/src/sonic-yang-models/yang-models/sonic-vxlan.yang
index f35276f23..7e0b03395 100644
--- a/src/sonic-yang-models/yang-models/sonic-vxlan.yang
+++ b/src/sonic-yang-models/yang-models/sonic-vxlan.yang
@@ -49,19 +49,17 @@ module sonic-vxlan {
                 max-elements 1;
 
                 leaf name {
-                /* vni devices are created of the form 'name'-vlanid
-                   The kernel has a max limit of 15 chars for netdevices.
-                   keeping aside 5 chars for hyphen and vlanid the
-                   name should have a max of 10 chars */
-
-                    type string {
-                        length 1..10;
-                    }
+                    type string;
                 }
+                must "string-length(name) != 0";
 
                 leaf src_ip {
                     type inet:ip-address;
                 }
+
+                leaf dst_ip {
+                    type inet:ip-address;
+                }
             }
         }
 

From de1a73f57b89dbc81de42a451b0952995d0d4b2f Mon Sep 17 00:00:00 2001
From: anamehra <54692434+anamehra@users.noreply.github.com>
Date: Thu, 23 May 2024 09:59:23 -0700
Subject: [PATCH 0641/1115] [multi-asic] Use asic_id/asic_name for APIs to get
 port config data (#18452)

Fixes: https://github.com/sonic-net/sonic-buildimage/issues/18431

#### Why I did it
sonic-cfggen misses handling for namespace at couple of locations. Due to this, when port config is fetched, it returns data from global config and not the namespace.

The function calls for
get_path_to_port_config_file
get_port_config

needs to be fixed to handle namespace for multi-asic.

#### How I did it
1.Pass asic_id as argument when calling get_path_to_port_config_file()
For single asic, asic_id is None and the function returns the correct port_config.ini file path.
For multi-asic, using asic_id provides the correct file path for the asic.

2. Pass asic_name as argument when calling get_port_config()

#### How to verify it
sonic-cfggen -H --print -n -k
This command should return the correct port config for the namespace.
---
 src/sonic-config-engine/sonic-cfggen          |  4 ++--
 .../tests/test_multinpu_cfggen.py             | 24 +++++++++++++++++++
 2 files changed, 26 insertions(+), 2 deletions(-)

diff --git a/src/sonic-config-engine/sonic-cfggen b/src/sonic-config-engine/sonic-cfggen
index a3b54c756..e3314d34f 100755
--- a/src/sonic-config-engine/sonic-cfggen
+++ b/src/sonic-config-engine/sonic-cfggen
@@ -359,9 +359,9 @@ def main():
             }}}
         deep_update(data, hardware_data)
         if args.port_config is None:
-            args.port_config = device_info.get_path_to_port_config_file(hwsku)
+            args.port_config = device_info.get_path_to_port_config_file(hwsku, asic_id)
         load_namespace_config()
-        (ports, _, _) = get_port_config(hwsku, platform, args.port_config, asic_id)
+        (ports, _, _) = get_port_config(hwsku, platform, args.port_config, hwsku_config_file=args.hwsku_config, asic_name=asic_name)
         if ports is None:
             print('Failed to get port config', file=sys.stderr)
             sys.exit(1)
diff --git a/src/sonic-config-engine/tests/test_multinpu_cfggen.py b/src/sonic-config-engine/tests/test_multinpu_cfggen.py
index bc4227f85..665f2b971 100644
--- a/src/sonic-config-engine/tests/test_multinpu_cfggen.py
+++ b/src/sonic-config-engine/tests/test_multinpu_cfggen.py
@@ -3,6 +3,7 @@
 import os
 import shutil
 import subprocess
+import sys
 import unittest
 import yaml
 import tests.common_utils as utils
@@ -10,6 +11,10 @@
 from unittest import TestCase
 from sonic_py_common.general import getstatusoutput_noshell
 
+if sys.version_info.major == 3:
+    from unittest import mock
+else:
+    import mock
 
 SKU = 'multi-npu-01'
 ASIC_SKU = 'multi-npu-asic'
@@ -27,6 +32,7 @@ def setUp(self):
         self.sample_graph = os.path.join(self.test_data_dir, 'sample-minigraph.xml')
         self.sample_graph1 = os.path.join(self.test_data_dir, 'sample-minigraph-noportchannel.xml')
         self.sample_port_config = os.path.join(self.test_data_dir, 'sample_port_config.ini')
+        self.sample_port_config_0 = os.path.join(self.test_data_dir, 'sample_port_config-0.ini')
         self.port_config = []
         for asic in range(NUM_ASIC):
             self.port_config.append(os.path.join(self.test_data_dir, "sample_port_config-{}.ini".format(asic)))
@@ -227,6 +233,24 @@ def test_frontend_asic_ports(self):
              "Ethernet-BP8": { "admin_status": "up",  "alias": "Eth6-ASIC0",  "asic_port_name": "Eth6-ASIC0",  "description": "ASIC3:Eth0-ASIC3",  "index": "2",  "lanes": "21,22,23,24",  "mtu": "9100", "tpid": "0x8100", "pfc_asym": "off",  "role": "Int",  "speed": "40000" },
              "Ethernet-BP12": { "admin_status": "up",  "alias": "Eth7-ASIC0",  "asic_port_name": "Eth7-ASIC0",  "description": "ASIC3:Eth1-ASIC3",  "index": "3",  "lanes": "25,26,27,28",  "mtu": "9100", "tpid": "0x8100", "pfc_asym": "off",  "role": "Int",  "speed": "40000" }})
 
+    def test_hwsku_option_port_list_port_config_ini(self):
+        mock.patch('device_info.get_path_to_port_config_file', mock.MagicMock(return_value=self.sample_port_config_0))
+        argument = ["-k", ASIC_SKU, "-n", "asic0", "-v", "PORT.keys()|list"]
+        output = self.run_script(argument)
+        self.assertEqual(
+            utils.liststr_to_dict(output.strip()),
+            utils.liststr_to_dict("['Ethernet0','Ethernet4','Ethernet8','Ethernet12','Ethernet-BP0','Ethernet-BP4','Ethernet-BP8','Ethernet-BP12']")
+        )
+
+    def test_hwsku_option_port_list_configdb(self):
+        mock.patch('device_info.get_path_to_port_config_file', mock.MagicMock(return_value=None))
+        argument = ["-k", ASIC_SKU, "-n", "asic0", "-v", "PORT.keys()|list"]
+        output = self.run_script(argument)
+        self.assertEqual(
+            utils.liststr_to_dict(output.strip()),
+            utils.liststr_to_dict("['Ethernet0','Ethernet4','Ethernet8','Ethernet12','Ethernet-BP0','Ethernet-BP4','Ethernet-BP8','Ethernet-BP12']")
+        )
+
     def test_frontend_asic_ports_config_db(self):
         argument = ["-m", self.sample_graph, "-p", self.port_config[0], "-n", "asic0", "--var-json", "PORT"]
         output = json.loads(self.run_script(argument))

From 3ae0d8789bb2fa0b3d9a747f0d8975667944b591 Mon Sep 17 00:00:00 2001
From: Wenda Chu <32250288+w1nda@users.noreply.github.com>
Date: Fri, 24 May 2024 01:15:44 +0800
Subject: [PATCH 0642/1115] Update dhcpservd.py (#19029)

After dump new config, send SIGHUP to kea-dhcp4 process to force refresh config.
---
 .../dhcp_utilities/dhcpservd/dhcpservd.py                     | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/sonic-dhcp-utilities/dhcp_utilities/dhcpservd/dhcpservd.py b/src/sonic-dhcp-utilities/dhcp_utilities/dhcpservd/dhcpservd.py
index 7a9b65092..e8341e436 100644
--- a/src/sonic-dhcp-utilities/dhcp_utilities/dhcpservd/dhcpservd.py
+++ b/src/sonic-dhcp-utilities/dhcp_utilities/dhcpservd/dhcpservd.py
@@ -59,8 +59,8 @@ def dump_dhcp4_config(self):
         self.used_options = used_options
         with open(self.kea_dhcp4_config_path, "w") as write_file:
             write_file.write(kea_dhcp4_config)
-            # After refresh kea-config, we need to SIGHUP kea-dhcp4 process to read new config
-            self._notify_kea_dhcp4_proc()
+        # After refresh kea-config, we need to SIGHUP kea-dhcp4 process to read new config
+        self._notify_kea_dhcp4_proc()
 
     def _update_dhcp_server_ip(self):
         """

From 3acd509826e48d8406d6dd37d0af473409368e55 Mon Sep 17 00:00:00 2001
From: Fei Zhou <156348280+fzhou-nokia@users.noreply.github.com>
Date: Thu, 23 May 2024 13:25:30 -0400
Subject: [PATCH 0643/1115] [Nokia-7220 IXR] Add support for NOKIA 7220 IXR-H3,
 H4-32D, H5-64D platforms  (#18497)

* [Nokia-7220-H3] Add support for NOKIA 7220 IXR-H3 platform

Add support for NOKIA 7220 IXR-H3:

Platform: x86_64-nokia_ixr7220_h3-r0
HwSKU: Nokia-IXR7220-H3
ASIC: Broadcom
Port Config: 32x400G + 2x10G
---
 .../Nokia-IXR7220-H3/ixr7220-h3.bcm           |  284 +++
 .../Nokia-IXR7220-H3/port_config.ini          |   36 +
 .../Nokia-IXR7220-H3/profile.ini              |    1 +
 .../Nokia-IXR7220-H3/sai.profile              |    1 +
 .../x86_64-nokia_ixr7220_h3-r0/default_sku    |    1 +
 .../x86_64-nokia_ixr7220_h3-r0/installer.conf |    4 +
 .../x86_64-nokia_ixr7220_h3-r0/pcie.yaml      |  166 ++
 .../x86_64-nokia_ixr7220_h3-r0/platform.json  |  410 ++++
 .../x86_64-nokia_ixr7220_h3-r0/platform_asic  |    1 +
 .../plugins/eeprom.py                         |   20 +
 .../plugins/led_control.py                    |  110 ++
 .../system_health_monitoring_config.json      |   16 +
 .../thermal_policy.json                       |   67 +
 .../Nokia-IXR7220-H4-32D/ixr7220_h4_32d.bcm   | 1645 +++++++++++++++++
 .../Nokia-IXR7220-H4-32D/port_config.ini      |   34 +
 .../Nokia-IXR7220-H4-32D/profile.ini          |    1 +
 .../Nokia-IXR7220-H4-32D/sai.profile          |    1 +
 .../default_sku                               |    1 +
 .../installer.conf                            |    1 +
 .../x86_64-nokia_ixr7220_h4_32d-r0/pcie.yaml  |  119 ++
 .../platform.json                             |  440 +++++
 .../platform_asic                             |    1 +
 .../plugins/eeprom.py                         |   16 +
 .../plugins/led_control.py                    |  125 ++
 .../system_health_monitoring_config.json      |   14 +
 .../thermal_policy.json                       |   67 +
 .../Nokia-IXR7220-H5-64D/h5_64Dx400g.yml      | 1121 +++++++++++
 .../Nokia-IXR7220-H5-64D/port_config.ini      |   68 +
 .../Nokia-IXR7220-H5-64D/profile.ini          |    1 +
 .../Nokia-IXR7220-H5-64D/sai.profile          |    1 +
 .../default_sku                               |    1 +
 .../installer.conf                            |    0
 .../platform.json                             |  464 +++++
 .../platform_asic                             |    1 +
 .../plugins/eeprom.py                         |   16 +
 .../plugins/led_control.py                    |  125 ++
 .../system_health_monitoring_config.json      |   14 +
 .../thermal_policy.json                       |   67 +
 platform/broadcom/one-image.mk                |    3 +
 platform/broadcom/platform-modules-nokia.mk   |   21 +-
 .../broadcom/sonic-platform-modules-nokia     |    2 +-
 41 files changed, 5485 insertions(+), 2 deletions(-)
 create mode 100644 device/nokia/x86_64-nokia_ixr7220_h3-r0/Nokia-IXR7220-H3/ixr7220-h3.bcm
 create mode 100644 device/nokia/x86_64-nokia_ixr7220_h3-r0/Nokia-IXR7220-H3/port_config.ini
 create mode 100644 device/nokia/x86_64-nokia_ixr7220_h3-r0/Nokia-IXR7220-H3/profile.ini
 create mode 100644 device/nokia/x86_64-nokia_ixr7220_h3-r0/Nokia-IXR7220-H3/sai.profile
 create mode 100644 device/nokia/x86_64-nokia_ixr7220_h3-r0/default_sku
 create mode 100644 device/nokia/x86_64-nokia_ixr7220_h3-r0/installer.conf
 create mode 100644 device/nokia/x86_64-nokia_ixr7220_h3-r0/pcie.yaml
 create mode 100644 device/nokia/x86_64-nokia_ixr7220_h3-r0/platform.json
 create mode 100644 device/nokia/x86_64-nokia_ixr7220_h3-r0/platform_asic
 create mode 100644 device/nokia/x86_64-nokia_ixr7220_h3-r0/plugins/eeprom.py
 create mode 100644 device/nokia/x86_64-nokia_ixr7220_h3-r0/plugins/led_control.py
 create mode 100644 device/nokia/x86_64-nokia_ixr7220_h3-r0/system_health_monitoring_config.json
 create mode 100644 device/nokia/x86_64-nokia_ixr7220_h3-r0/thermal_policy.json
 create mode 100644 device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/Nokia-IXR7220-H4-32D/ixr7220_h4_32d.bcm
 create mode 100644 device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/Nokia-IXR7220-H4-32D/port_config.ini
 create mode 100644 device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/Nokia-IXR7220-H4-32D/profile.ini
 create mode 100644 device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/Nokia-IXR7220-H4-32D/sai.profile
 create mode 100644 device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/default_sku
 create mode 100644 device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/installer.conf
 create mode 100644 device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/pcie.yaml
 create mode 100644 device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/platform.json
 create mode 100644 device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/platform_asic
 create mode 100644 device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/plugins/eeprom.py
 create mode 100644 device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/plugins/led_control.py
 create mode 100644 device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/system_health_monitoring_config.json
 create mode 100644 device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/thermal_policy.json
 create mode 100644 device/nokia/x86_64-nokia_ixr7220_h5_64d-r0/Nokia-IXR7220-H5-64D/h5_64Dx400g.yml
 create mode 100644 device/nokia/x86_64-nokia_ixr7220_h5_64d-r0/Nokia-IXR7220-H5-64D/port_config.ini
 create mode 100644 device/nokia/x86_64-nokia_ixr7220_h5_64d-r0/Nokia-IXR7220-H5-64D/profile.ini
 create mode 100644 device/nokia/x86_64-nokia_ixr7220_h5_64d-r0/Nokia-IXR7220-H5-64D/sai.profile
 create mode 100644 device/nokia/x86_64-nokia_ixr7220_h5_64d-r0/default_sku
 create mode 100644 device/nokia/x86_64-nokia_ixr7220_h5_64d-r0/installer.conf
 create mode 100644 device/nokia/x86_64-nokia_ixr7220_h5_64d-r0/platform.json
 create mode 100644 device/nokia/x86_64-nokia_ixr7220_h5_64d-r0/platform_asic
 create mode 100644 device/nokia/x86_64-nokia_ixr7220_h5_64d-r0/plugins/eeprom.py
 create mode 100644 device/nokia/x86_64-nokia_ixr7220_h5_64d-r0/plugins/led_control.py
 create mode 100644 device/nokia/x86_64-nokia_ixr7220_h5_64d-r0/system_health_monitoring_config.json
 create mode 100644 device/nokia/x86_64-nokia_ixr7220_h5_64d-r0/thermal_policy.json

diff --git a/device/nokia/x86_64-nokia_ixr7220_h3-r0/Nokia-IXR7220-H3/ixr7220-h3.bcm b/device/nokia/x86_64-nokia_ixr7220_h3-r0/Nokia-IXR7220-H3/ixr7220-h3.bcm
new file mode 100644
index 000000000..bd0af5a7b
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h3-r0/Nokia-IXR7220-H3/ixr7220-h3.bcm
@@ -0,0 +1,284 @@
+#########################################
+## cfg for NOKIA IXR7220 H3
+#########################################
+pbmp_xport_xe=0x8000f8000fc000f8000f8000f8000fc000f8001e
+ccm_dma_enable=0
+ccmdma_intr_enable=0
+ctr_evict_enable=0
+mem_cache_enable=0
+parity_correction=0
+parity_enable=0
+phy_enable=0
+phy_null=1
+pll_bypass=1
+init_all_modules=0
+sai_tunnel_global_sip_mask_enable=1
+bcm_tunnel_term_compatible_mode=1
+l3_alpm_enable=2
+l3_mem_entries=16384
+################################################################################
+# Pipe 0
+portmap_1=1:400
+portmap_2=9:400
+portmap_3=17:400
+portmap_4=25:400
+
+#loopback port
+portmap_19=259:10
+################################################################################
+# Pipe 1
+portmap_20=33:400
+portmap_21=41:400
+portmap_22=49:400
+portmap_23=57:400
+
+#management port
+portmap_38=257:10
+
+#loopback port
+portmap_39=260:10
+################################################################################
+# Pipe 2
+portmap_40=65:400
+portmap_41=73:400
+portmap_42=81:400
+portmap_43=89:400
+
+#loopback port
+portmap_59=261:10
+################################################################################
+# Pipe 3
+portmap_60=97:400
+portmap_61=105:400
+portmap_62=113:400
+portmap_63=121:400
+
+#loopback port
+portmap_79=262:10
+################################################################################
+# Pipe 4
+portmap_80=129:400
+portmap_81=137:400
+portmap_82=145:400
+portmap_83=153:400
+
+#loopback port
+portmap_99=263:10
+################################################################################
+# Pipe 5
+portmap_100=161:400
+portmap_101=169:400
+portmap_102=177:400
+portmap_103=185:400
+
+#management port
+portmap_118=258:10
+
+#loopback port
+portmap_119=264:10
+################################################################################
+# Pipe 6
+portmap_120=193:400
+portmap_121=201:400
+portmap_122=209:400
+portmap_123=217:400
+
+#loopback port
+portmap_139=265:10
+################################################################################
+# Pipe 7
+portmap_140=225:400
+portmap_141=233:400
+portmap_142=241:400
+portmap_143=249:400
+
+#loopback port
+portmap_159=266:10
+################################################################################
+dport_map_enable=1
+
+dport_map_port_1=3
+dport_map_port_2=4
+dport_map_port_3=1
+dport_map_port_4=2
+dport_map_port_20=7
+dport_map_port_21=8
+dport_map_port_22=5
+dport_map_port_23=6
+dport_map_port_40=11
+dport_map_port_41=12
+dport_map_port_42=9
+dport_map_port_43=10
+dport_map_port_60=15
+dport_map_port_61=16
+dport_map_port_62=13
+dport_map_port_63=14
+dport_map_port_80=17
+dport_map_port_81=18
+dport_map_port_82=19
+dport_map_port_83=20
+dport_map_port_100=21
+dport_map_port_101=22
+dport_map_port_102=23
+dport_map_port_103=24
+dport_map_port_120=25
+dport_map_port_121=26
+dport_map_port_122=27
+dport_map_port_123=28
+dport_map_port_140=29
+dport_map_port_141=30
+dport_map_port_142=31
+dport_map_port_143=32
+
+dport_map_port_38=33
+dport_map_port_118=34
+################################################################################
+# tx_lane map
+phy_chain_tx_lane_map_physical{1.0}=0x14762350
+phy_chain_tx_lane_map_physical{9.0}=0x36104527
+phy_chain_tx_lane_map_physical{17.0}=0x17053624
+phy_chain_tx_lane_map_physical{25.0}=0x57314602
+phy_chain_tx_lane_map_physical{33.0}=0x46302517
+phy_chain_tx_lane_map_physical{41.0}=0x76203514
+phy_chain_tx_lane_map_physical{49.0}=0x26143507
+phy_chain_tx_lane_map_physical{57.0}=0x74236510
+phy_chain_tx_lane_map_physical{65.0}=0x75021436
+phy_chain_tx_lane_map_physical{73.0}=0x67210435
+phy_chain_tx_lane_map_physical{81.0}=0x26143507
+phy_chain_tx_lane_map_physical{89.0}=0x75436120
+phy_chain_tx_lane_map_physical{97.0}=0x54621730
+phy_chain_tx_lane_map_physical{105.0}=0x64310725
+phy_chain_tx_lane_map_physical{113.0}=0x07352416
+phy_chain_tx_lane_map_physical{121.0}=0x13762054
+phy_chain_tx_lane_map_physical{129.0}=0x13427506
+phy_chain_tx_lane_map_physical{137.0}=0x54307612
+phy_chain_tx_lane_map_physical{145.0}=0x76103524
+phy_chain_tx_lane_map_physical{153.0}=0x67103425
+phy_chain_tx_lane_map_physical{161.0}=0x15402637
+phy_chain_tx_lane_map_physical{169.0}=0x76135420
+phy_chain_tx_lane_map_physical{177.0}=0x67052431
+phy_chain_tx_lane_map_physical{185.0}=0x57103624
+phy_chain_tx_lane_map_physical{193.0}=0x15402637
+phy_chain_tx_lane_map_physical{201.0}=0x54137620
+phy_chain_tx_lane_map_physical{209.0}=0x56012734
+phy_chain_tx_lane_map_physical{217.0}=0x57301426
+phy_chain_tx_lane_map_physical{225.0}=0x07352641
+phy_chain_tx_lane_map_physical{233.0}=0x57236401
+phy_chain_tx_lane_map_physical{241.0}=0x16543720
+phy_chain_tx_lane_map_physical{249.0}=0x50273416
+
+# rx_lane_map
+phy_chain_rx_lane_map_physical{1.0}=0x42305761
+phy_chain_rx_lane_map_physical{9.0}=0x13605472
+phy_chain_rx_lane_map_physical{17.0}=0x41730652
+phy_chain_rx_lane_map_physical{25.0}=0x71206534
+phy_chain_rx_lane_map_physical{33.0}=0x62170453
+phy_chain_rx_lane_map_physical{41.0}=0x27641305
+phy_chain_rx_lane_map_physical{49.0}=0x53604271
+phy_chain_rx_lane_map_physical{57.0}=0x31607425
+phy_chain_rx_lane_map_physical{65.0}=0x47612350
+phy_chain_rx_lane_map_physical{73.0}=0x23471605
+phy_chain_rx_lane_map_physical{81.0}=0x43710265
+phy_chain_rx_lane_map_physical{89.0}=0x31706425
+phy_chain_rx_lane_map_physical{97.0}=0x60317425
+phy_chain_rx_lane_map_physical{105.0}=0x40635172
+phy_chain_rx_lane_map_physical{113.0}=0x20573146
+phy_chain_rx_lane_map_physical{121.0}=0x51204637
+phy_chain_rx_lane_map_physical{129.0}=0x34102567
+phy_chain_rx_lane_map_physical{137.0}=0x70143526
+phy_chain_rx_lane_map_physical{145.0}=0x20316574
+phy_chain_rx_lane_map_physical{153.0}=0x13572046
+phy_chain_rx_lane_map_physical{161.0}=0x61253074
+phy_chain_rx_lane_map_physical{169.0}=0x61043527
+phy_chain_rx_lane_map_physical{177.0}=0x43617250
+phy_chain_rx_lane_map_physical{185.0}=0x31067425
+phy_chain_rx_lane_map_physical{193.0}=0x35162074
+phy_chain_rx_lane_map_physical{201.0}=0x30146527
+phy_chain_rx_lane_map_physical{209.0}=0x73506241
+phy_chain_rx_lane_map_physical{217.0}=0x73241605
+phy_chain_rx_lane_map_physical{225.0}=0x26573140
+phy_chain_rx_lane_map_physical{233.0}=0x46213750
+phy_chain_rx_lane_map_physical{241.0}=0x13650274
+phy_chain_rx_lane_map_physical{249.0}=0x42305167
+
+# tx polarity
+serdes_core_tx_polarity_flip_physical{1}=0x5d
+serdes_core_tx_polarity_flip_physical{9}=0x9c
+serdes_core_tx_polarity_flip_physical{17}=0x72
+serdes_core_tx_polarity_flip_physical{25}=0xad
+serdes_core_tx_polarity_flip_physical{33}=0x38
+serdes_core_tx_polarity_flip_physical{41}=0x86
+serdes_core_tx_polarity_flip_physical{49}=0xaf
+serdes_core_tx_polarity_flip_physical{57}=0xc6
+serdes_core_tx_polarity_flip_physical{65}=0x70
+serdes_core_tx_polarity_flip_physical{73}=0xc7
+serdes_core_tx_polarity_flip_physical{81}=0xae
+serdes_core_tx_polarity_flip_physical{89}=0xe0
+serdes_core_tx_polarity_flip_physical{97}=0xf1
+serdes_core_tx_polarity_flip_physical{105}=0x0c
+serdes_core_tx_polarity_flip_physical{113}=0xc8
+serdes_core_tx_polarity_flip_physical{121}=0x3f
+serdes_core_tx_polarity_flip_physical{129}=0x8b
+serdes_core_tx_polarity_flip_physical{137}=0x77
+serdes_core_tx_polarity_flip_physical{145}=0x39
+serdes_core_tx_polarity_flip_physical{153}=0xa5
+serdes_core_tx_polarity_flip_physical{161}=0xd8
+serdes_core_tx_polarity_flip_physical{169}=0x8b
+serdes_core_tx_polarity_flip_physical{177}=0x29
+serdes_core_tx_polarity_flip_physical{185}=0x30
+serdes_core_tx_polarity_flip_physical{193}=0xf8
+serdes_core_tx_polarity_flip_physical{201}=0x8a
+serdes_core_tx_polarity_flip_physical{209}=0xb8
+serdes_core_tx_polarity_flip_physical{217}=0x08
+serdes_core_tx_polarity_flip_physical{225}=0xb3
+serdes_core_tx_polarity_flip_physical{233}=0x62
+serdes_core_tx_polarity_flip_physical{241}=0x70
+serdes_core_tx_polarity_flip_physical{249}=0xd2
+
+# rx poplarity
+serdes_core_rx_polarity_flip_physical{1}=0x18
+serdes_core_rx_polarity_flip_physical{9}=0xa0
+serdes_core_rx_polarity_flip_physical{17}=0x9c
+serdes_core_rx_polarity_flip_physical{25}=0x47
+serdes_core_rx_polarity_flip_physical{33}=0xf5
+serdes_core_rx_polarity_flip_physical{41}=0x38
+serdes_core_rx_polarity_flip_physical{49}=0x87
+serdes_core_rx_polarity_flip_physical{57}=0x1a
+serdes_core_rx_polarity_flip_physical{65}=0xf0
+serdes_core_rx_polarity_flip_physical{73}=0x68
+serdes_core_rx_polarity_flip_physical{81}=0x96
+serdes_core_rx_polarity_flip_physical{89}=0x32
+serdes_core_rx_polarity_flip_physical{97}=0x5a
+serdes_core_rx_polarity_flip_physical{105}=0xb4
+serdes_core_rx_polarity_flip_physical{113}=0xe1
+serdes_core_rx_polarity_flip_physical{121}=0x4a
+serdes_core_rx_polarity_flip_physical{129}=0xf3
+serdes_core_rx_polarity_flip_physical{137}=0xc3
+serdes_core_rx_polarity_flip_physical{145}=0x12
+serdes_core_rx_polarity_flip_physical{153}=0xb4
+serdes_core_rx_polarity_flip_physical{161}=0xf0
+serdes_core_rx_polarity_flip_physical{169}=0xa7
+serdes_core_rx_polarity_flip_physical{177}=0xe1
+serdes_core_rx_polarity_flip_physical{185}=0x90
+serdes_core_rx_polarity_flip_physical{193}=0x0a
+serdes_core_rx_polarity_flip_physical{201}=0x4e
+serdes_core_rx_polarity_flip_physical{209}=0x5a
+serdes_core_rx_polarity_flip_physical{217}=0x98
+serdes_core_rx_polarity_flip_physical{225}=0x2f
+serdes_core_rx_polarity_flip_physical{233}=0x5b
+serdes_core_rx_polarity_flip_physical{241}=0xf4
+serdes_core_rx_polarity_flip_physical{249}=0x1d
+################################################################################
+#firmware load, use fast load
+load_firmware=0x2
+
+core_clock_frequency=1325
+dpr_clock_frequency=1000
+device_clock_frequency=1325
+port_flex_enable=1
+
+
+################################################################################
+serdes_tx_taps_cd=pam4:-20:142:0:0:6:0
+
+sai_tunnel_global_sip_mask_enable=1
diff --git a/device/nokia/x86_64-nokia_ixr7220_h3-r0/Nokia-IXR7220-H3/port_config.ini b/device/nokia/x86_64-nokia_ixr7220_h3-r0/Nokia-IXR7220-H3/port_config.ini
new file mode 100644
index 000000000..f5a81b7f6
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h3-r0/Nokia-IXR7220-H3/port_config.ini
@@ -0,0 +1,36 @@
+# name          lanes                             alias               index     speed
+Ethernet0       17,18,19,20,21,22,23,24           fourhundredGigE1/1  1         400000
+Ethernet4       25,26,27,28,29,30,31,32           fourhundredGigE1/2  2         400000
+Ethernet8       1,2,3,4,5,6,7,8                   fourhundredGigE1/3  3         400000
+Ethernet12      9,10,11,12,13,14,15,16            fourhundredGigE1/4  4         400000
+Ethernet16      49,50,51,52,53,54,55,56           fourhundredGigE1/5  5         400000
+Ethernet20      57,58,59,60,61,62,63,64           fourhundredGigE1/6  6         400000
+Ethernet24      33,34,35,36,37,38,39,40           fourhundredGigE1/7  7         400000
+Ethernet28      41,42,43,44,45,46,47,48           fourhundredGigE1/8  8         400000
+Ethernet32      81,82,83,84,85,86,87,88           fourhundredGigE1/9  9         400000
+Ethernet36      89,90,91,92,93,94,95,96           fourhundredGigE1/10 10        400000
+Ethernet40      65,66,67,68,69,70,71,72           fourhundredGigE1/11 11        400000
+Ethernet44      73,74,75,76,77,78,79,80           fourhundredGigE1/12 12        400000
+Ethernet48      113,114,115,116,117,118,119,120   fourhundredGigE1/13 13        400000
+Ethernet52      121,122,123,124,125,126,127,128   fourhundredGigE1/14 14        400000
+Ethernet56      97,98,99,100,101,102,103,104      fourhundredGigE1/15 15        400000
+Ethernet60      105,106,107,108,109,110,111,112   fourhundredGigE1/16 16        400000
+Ethernet64      129,130,131,132,133,134,135,136   fourhundredGigE1/17 17        400000
+Ethernet68      137,138,139,140,141,142,143,144   fourhundredGigE1/18 18        400000
+Ethernet72      145,146,147,148,149,150,151,152   fourhundredGigE1/19 19        400000
+Ethernet76      153,154,155,156,157,158,159,160   fourhundredGigE1/20 20        400000
+Ethernet80      161,162,163,164,165,166,167,168   fourhundredGigE1/21 21        400000
+Ethernet84      169,170,171,172,173,174,175,176   fourhundredGigE1/22 22        400000
+Ethernet88      177,178,179,180,181,182,183,184   fourhundredGigE1/23 23        400000
+Ethernet92      185,186,187,188,189,190,191,192   fourhundredGigE1/24 24        400000
+Ethernet96      193,194,195,196,197,198,199,200   fourhundredGigE1/25 25        400000
+Ethernet100     201,202,203,204,205,206,207,208   fourhundredGigE1/26 26        400000
+Ethernet104     209,210,211,212,213,214,215,216   fourhundredGigE1/27 27        400000
+Ethernet108     217,218,219,220,221,222,223,224   fourhundredGigE1/28 28        400000
+Ethernet112     225,226,227,228,229,230,231,232   fourhundredGigE1/29 29        400000
+Ethernet116     233,234,235,236,237,238,239,240   fourhundredGigE1/30 30        400000
+Ethernet120     241,242,243,244,245,246,247,248   fourhundredGigE1/31 31        400000
+Ethernet124     249,250,251,252,253,254,255,256   fourhundredGigE1/32 32        400000
+Ethernet128     257                               tenGigE1/33         33        10000
+Ethernet132     258                               tenGigE1/34         34        10000
+
diff --git a/device/nokia/x86_64-nokia_ixr7220_h3-r0/Nokia-IXR7220-H3/profile.ini b/device/nokia/x86_64-nokia_ixr7220_h3-r0/Nokia-IXR7220-H3/profile.ini
new file mode 100644
index 000000000..4eda67c91
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h3-r0/Nokia-IXR7220-H3/profile.ini
@@ -0,0 +1 @@
+switchMacAddress=XX:XX:XX:XX:XX:XX
diff --git a/device/nokia/x86_64-nokia_ixr7220_h3-r0/Nokia-IXR7220-H3/sai.profile b/device/nokia/x86_64-nokia_ixr7220_h3-r0/Nokia-IXR7220-H3/sai.profile
new file mode 100644
index 000000000..cb4b92363
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h3-r0/Nokia-IXR7220-H3/sai.profile
@@ -0,0 +1 @@
+SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/ixr7220-h3.bcm
diff --git a/device/nokia/x86_64-nokia_ixr7220_h3-r0/default_sku b/device/nokia/x86_64-nokia_ixr7220_h3-r0/default_sku
new file mode 100644
index 000000000..e9b60ed08
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h3-r0/default_sku
@@ -0,0 +1 @@
+Nokia-IXR7220-H3 t1
diff --git a/device/nokia/x86_64-nokia_ixr7220_h3-r0/installer.conf b/device/nokia/x86_64-nokia_ixr7220_h3-r0/installer.conf
new file mode 100644
index 000000000..1605db9e6
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h3-r0/installer.conf
@@ -0,0 +1,4 @@
+CONSOLE_PORT=0x3f8
+CONSOLE_DEV=0
+CONSOLE_SPEED=115200
+#ONIE_PLATFORM_EXTRA_CMDLINE_LINUX=" intel_iommu=off"
diff --git a/device/nokia/x86_64-nokia_ixr7220_h3-r0/pcie.yaml b/device/nokia/x86_64-nokia_ixr7220_h3-r0/pcie.yaml
new file mode 100644
index 000000000..755b4f2a0
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h3-r0/pcie.yaml
@@ -0,0 +1,166 @@
+- bus: '00'
+  dev: '00'
+  fn: '0'
+  id: '1980'
+  name: 'Host bridge: Intel Corporation Atom Processor C3000 Series System Agent (rev
+    11)'
+- bus: '00'
+  dev: '04'
+  fn: '0'
+  id: 19a1
+  name: 'Host bridge: Intel Corporation Atom Processor C3000 Series Error Registers
+    (rev 11)'
+- bus: '00'
+  dev: '05'
+  fn: '0'
+  id: 19a2
+  name: 'Generic system peripheral [0807]: Intel Corporation Atom Processor C3000
+    Series Root Complex Event Collector (rev 11)'
+- bus: '00'
+  dev: '06'
+  fn: '0'
+  id: 19a3
+  name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series Integrated QAT
+    Root Port (rev 11)'
+- bus: '00'
+  dev: 09
+  fn: '0'
+  id: 19a4
+  name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root
+    Port #0 (rev 11)'
+- bus: '00'
+  dev: 0b
+  fn: '0'
+  id: 19a6
+  name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root
+    Port #2 (rev 11)'
+- bus: '00'
+  dev: 0e
+  fn: '0'
+  id: 19a8
+  name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root
+    Port #4 (rev 11)'
+- bus: '00'
+  dev: 0f
+  fn: '0'
+  id: 19a9
+  name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root
+    Port #5 (rev 11)'
+- bus: '00'
+  dev: '10'
+  fn: '0'
+  id: 19aa
+  name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root
+    Port #6 (rev 11)'
+- bus: '00'
+  dev: '11'
+  fn: '0'
+  id: 19ab
+  name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root
+    Port #7 (rev 11)'
+- bus: '00'
+  dev: '12'
+  fn: '0'
+  id: 19ac
+  name: 'System peripheral: Intel Corporation Atom Processor C3000 Series SMBus Contoller
+    - Host (rev 11)'
+- bus: '00'
+  dev: '14'
+  fn: '0'
+  id: 19c2
+  name: 'SATA controller: Intel Corporation Atom Processor C3000 Series SATA Controller
+    1 (rev 11)'
+- bus: '00'
+  dev: '15'
+  fn: '0'
+  id: 19d0
+  name: 'USB controller: Intel Corporation Atom Processor C3000 Series USB 3.0 xHCI
+    Controller (rev 11)'
+- bus: '00'
+  dev: '16'
+  fn: '0'
+  id: 19d1
+  name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series Integrated LAN
+    Root Port #0 (rev 11)'
+- bus: '00'
+  dev: '17'
+  fn: '0'
+  id: 19d2
+  name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series Integrated LAN
+    Root Port #1 (rev 11)'
+- bus: '00'
+  dev: '18'
+  fn: '0'
+  id: 19d3
+  name: 'Communication controller: Intel Corporation Atom Processor C3000 Series ME
+    HECI 1 (rev 11)'
+- bus: '00'
+  dev: 1c
+  fn: '0'
+  id: 19db
+  name: 'SD Host controller: Intel Corporation Device 19db (rev 11)'
+- bus: '00'
+  dev: 1f
+  fn: '0'
+  id: 19dc
+  name: 'ISA bridge: Intel Corporation Atom Processor C3000 Series LPC or eSPI (rev
+    11)'
+- bus: '00'
+  dev: 1f
+  fn: '2'
+  id: 19de
+  name: 'Memory controller: Intel Corporation Atom Processor C3000 Series Power Management
+    Controller (rev 11)'
+- bus: '00'
+  dev: 1f
+  fn: '4'
+  id: 19df
+  name: 'SMBus: Intel Corporation Atom Processor C3000 Series SMBus controller (rev
+    11)'
+- bus: '00'
+  dev: 1f
+  fn: '5'
+  id: 19e0
+  name: 'Serial bus controller [0c80]: Intel Corporation Atom Processor C3000 Series
+    SPI Controller (rev 11)'
+- bus: '01'
+  dev: '00'
+  fn: '0'
+  id: 19e2
+  name: 'Co-processor: Intel Corporation Atom Processor C3000 Series QuickAssist Technology
+    (rev 11)'
+- bus: '02'
+  dev: '00'
+  fn: '0'
+  id: b980
+  name: 'Ethernet controller: Broadcom Inc. and subsidiaries Device b980 (rev 11)'
+- bus: '04'
+  dev: '00'
+  fn: '0'
+  id: '1533'
+  name: 'Ethernet controller: Intel Corporation I210 Gigabit Network Connection (rev
+    03)'
+- bus: 08
+  dev: '00'
+  fn: '0'
+  id: 15e4
+  name: 'Ethernet controller: Intel Corporation Ethernet Connection X553 1GbE (rev
+    11)'
+- bus: 08
+  dev: '00'
+  fn: '1'
+  id: 15e4
+  name: 'Ethernet controller: Intel Corporation Ethernet Connection X553 1GbE (rev
+    11)'
+- bus: 09
+  dev: '00'
+  fn: '0'
+  id: 15c3
+  name: 'Ethernet controller: Intel Corporation Ethernet Connection X553 Backplane
+    (rev 11)'
+- bus: 09
+  dev: '00'
+  fn: '1'
+  id: 15c3
+  name: 'Ethernet controller: Intel Corporation Ethernet Connection X553 Backplane
+    (rev 11)'
diff --git a/device/nokia/x86_64-nokia_ixr7220_h3-r0/platform.json b/device/nokia/x86_64-nokia_ixr7220_h3-r0/platform.json
new file mode 100644
index 000000000..ae1a111fe
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h3-r0/platform.json
@@ -0,0 +1,410 @@
+{
+    "chassis": {
+        "name": "7220 IXR-H3",
+        "components": [
+            {
+                "name": "CPU-PLD"
+            },
+            {
+                "name": "SW1-PLD"
+            },
+            {
+                "name": "SW2-PLD"
+            },
+            {
+                "name": "SW3-PLD"
+            }
+        ],
+        "fans": [
+            {
+                "name": "Fan1",
+                "status_led": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "Fan2",
+                "status_led": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "Fan3",
+                "status_led": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "Fan4",
+                "status_led": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "Fan5",
+                "status_led": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "Fan6",
+                "status_led": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "Fan7",
+                "status_led": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "Fan8",
+                "status_led": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "Fan9",
+                "status_led": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "Fan10",
+                "status_led": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "Fan11",
+                "status_led": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "Fan12",
+                "status_led": {
+                    "controllable": false
+                }
+            }
+        ],
+        "fan_drawers": [
+            {
+                "name": "drawer1",
+                "status_led": {
+                    "controllable": false
+                },
+                "max_consumed_power": false,
+                "fans": [
+                    {
+                        "name": "Fan1",
+                        "status_led": {
+                            "controllable": false
+                        }
+                    },
+                    {
+                        "name": "Fan2",
+                        "status_led": {
+                            "controllable": false
+                        }
+                    }
+                ]
+            },
+            {
+                "name": "drawer2",
+                "status_led": {
+                    "controllable": false
+                },
+                "max_consumed_power": false,
+                "fans": [
+                    {
+                        "name": "Fan3",
+                        "status_led": {
+                            "controllable": false
+                        }
+                    },
+                    {
+                        "name": "Fan4",
+                        "status_led": {
+                            "controllable": false
+                        }
+                    }
+                ]
+            },
+            {
+                "name": "drawer3",
+                "status_led": {
+                    "controllable": false
+                },
+                "max_consumed_power": false,
+                "fans": [
+                    {
+                        "name": "Fan5",
+                        "status_led": {
+                            "controllable": false
+                        }
+                    },
+                    {
+                        "name": "Fan6",
+                        "status_led": {
+                            "controllable": false
+                        }
+                    }
+                ]
+            },
+            {
+                "name": "drawer4",
+                "status_led": {
+                    "controllable": false
+                },
+                "max_consumed_power": false,
+                "fans": [
+                    {
+                        "name": "Fan7",
+                        "status_led": {
+                            "controllable": false
+                        }
+                    },
+                    {
+                        "name": "Fan8",
+                        "status_led": {
+                            "controllable": false
+                        }
+                    }
+                ]
+            },
+            {
+                "name": "drawer5",
+                "status_led": {
+                    "controllable": false
+                },
+                "max_consumed_power": false,
+                "fans": [
+                    {
+                        "name": "Fan9",
+                        "status_led": {
+                            "controllable": false
+                        }
+                    },
+                    {
+                        "name": "Fan10",
+                        "status_led": {
+                            "controllable": false
+                        }
+                    }
+                ]
+            },
+            {
+                "name": "drawer6",
+                "status_led": {
+                    "controllable": false
+                },
+                "max_consumed_power": false,
+                "fans": [
+                    {
+                        "name": "Fan11",
+                        "status_led": {
+                            "controllable": false
+                        }
+                    },
+                    {
+                        "name": "Fan12",
+                        "status_led": {
+                            "controllable": false
+                        }
+                    }
+                ]
+            }
+        ],
+        "psus": [
+            {
+                "name": "PSU1",
+                "status_led": {
+                    "controllable": false
+                },
+                "current": false,
+                "power": false,
+                "max_power": false,
+                "voltage_high_threshold": false,
+                "voltage_low_threshold": false,
+                "temperature": false
+            },
+            {
+                "name": "PSU2",
+                "status_led": {
+                    "controllable": false
+                },
+                "current": true,
+                "power": true,
+                "max_power": false,
+                "voltage_high_threshold": false,
+                "voltage_low_threshold": false,
+                "temperature": false
+            }
+        ],
+        "thermals": [
+            {
+                "name": "cpu",
+                "controllable": false,
+                "low-threshold": false,
+                "high-threshold": true,
+                "low-crit-threshold": false,
+                "high-crit-threshold": true
+            },
+            {
+                "name": "fan board",
+                "controllable": false,
+                "low-threshold": false,
+                "high-threshold": true,
+                "low-crit-threshold": false,
+                "high-crit-threshold": true
+            },
+            {
+                "name": "MAC top",
+                "controllable": false,
+                "low-threshold": false,
+                "high-threshold": true,
+                "low-crit-threshold": false,
+                "high-crit-threshold": true
+            },
+            {
+                "name": "MAC down",
+                "controllable": false,
+                "low-threshold": false,
+                "high-threshold": true,
+                "low-crit-threshold": false,
+                "high-crit-threshold": true
+            },
+            {
+                "name": "main board1",
+                "controllable": false,
+                "low-threshold": false,
+                "high-threshold": true,
+                "low-crit-threshold": false,
+                "high-crit-threshold": true
+            },
+            {
+                "name": "main board2",
+                "controllable": false,
+                "low-threshold": false,
+                "high-threshold": true,
+                "low-crit-threshold": false,
+                "high-crit-threshold": true
+            },
+            {
+                "name": "MAC internal",
+                "controllable": false,
+                "low-threshold": false,
+                "high-threshold": true,
+                "low-crit-threshold": false,
+                "high-crit-threshold": true
+            }
+        ],
+        "sfps": [
+            {
+                "name": "QSFPDD_1"
+            },
+            {
+                "name": "QSFPDD_2"
+            },
+            {
+                "name": "QSFPDD_3"
+            },
+            {
+                "name": "QSFPDD_4"
+            },
+            {
+                "name": "QSFPDD_5"
+            },
+            {
+                "name": "QSFPDD_6"
+            },
+            {
+                "name": "QSFPDD_7"
+            },
+            {
+                "name": "QSFPDD_8"
+            },
+            {
+                "name": "QSFPDD_9"
+            },
+            {
+                "name": "QSFPDD_10"
+            },
+            {
+                "name": "QSFPDD_11"
+            },
+            {
+                "name": "QSFPDD_12"
+            },
+            {
+                "name": "QSFPDD_13"
+            },
+            {
+                "name": "QSFPDD_14"
+            },
+            {
+                "name": "QSFPDD_15"
+            },
+            {
+                "name": "QSFPDD_16"
+            },
+            {
+                "name": "QSFPDD_17"
+            },
+            {
+                "name": "QSFPDD_18"
+            },
+            {
+                "name": "QSFPDD_19"
+            },
+            {
+                "name": "QSFPDD_20"
+            },
+            {
+                "name": "QSFPDD_21"
+            },
+            {
+                "name": "QSFPDD_22"
+            },
+            {
+                "name": "QSFPDD_23"
+            },
+            {
+                "name": "QSFPDD_24"
+            },
+            {
+                "name": "QSFPDD_25"
+            },
+            {
+                "name": "QSFPDD_26"
+            },
+            {
+                "name": "QSFPDD_27"
+            },
+            {
+                "name": "QSFPDD_28"
+            },
+            {
+                "name": "QSFPDD_29"
+            },
+            {
+                "name": "QSFPDD_30"
+            },
+            {
+                "name": "QSFPDD_31"
+            },
+            {
+                "name": "QSFPDD_32"
+            },
+            {
+                "name": "SFP+_0"
+            },
+            {
+                "name": "SFP+_1"
+            }
+       	]
+    },
+    "interfaces": {}
+}
diff --git a/device/nokia/x86_64-nokia_ixr7220_h3-r0/platform_asic b/device/nokia/x86_64-nokia_ixr7220_h3-r0/platform_asic
new file mode 100644
index 000000000..960467652
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h3-r0/platform_asic
@@ -0,0 +1 @@
+broadcom
diff --git a/device/nokia/x86_64-nokia_ixr7220_h3-r0/plugins/eeprom.py b/device/nokia/x86_64-nokia_ixr7220_h3-r0/plugins/eeprom.py
new file mode 100644
index 000000000..aba8801bd
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h3-r0/plugins/eeprom.py
@@ -0,0 +1,20 @@
+try:
+    import os
+    from sonic_eeprom import eeprom_tlvinfo
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+
+class board(eeprom_tlvinfo.TlvInfoDecoder):
+
+    def __init__(self, name, path, cpld_root, ro):
+        self.eeprom_path = "/sys/class/i2c-adapter/i2c-0/0-0053/eeprom"
+        if not os.path.exists(self.eeprom_path):
+            file = "/sys/class/i2c-adapter/i2c-0/new_device"
+            with open(file, 'w') as f:
+                f.write('24c02 0x53\n')
+        super(board, self).__init__(self.eeprom_path, 0, '', True)
+    
+    # def __init__(self, name, path, cpld_root, ro):
+    #     self.eeprom_path = "/etc/sonic/nokia/syseeprom.bin"
+    #     super(board, self).__init__(self.eeprom_path, 0, '', True)
\ No newline at end of file
diff --git a/device/nokia/x86_64-nokia_ixr7220_h3-r0/plugins/led_control.py b/device/nokia/x86_64-nokia_ixr7220_h3-r0/plugins/led_control.py
new file mode 100644
index 000000000..f61527504
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h3-r0/plugins/led_control.py
@@ -0,0 +1,110 @@
+#
+# led_control.py
+#
+# Platform-specific LED control functionality for SONiC
+#
+
+try:
+    from sonic_led.led_control_base import LedControlBase
+    import os
+    import time
+    import syslog
+    import sonic_platform.platform
+    import sonic_platform.chassis
+except ImportError as e:
+    raise ImportError(str(e) + " - required module not found")
+
+SWPLD1_DIR = "/sys/bus/i2c/devices/17-0032/"
+MAX_7220H3_FAN_DRAWERS = 6
+MAX_7220H3_FANS_PER_DRAWER = 2
+
+def DBG_PRINT(str):
+    syslog.openlog("nokia-led")
+    syslog.syslog(syslog.LOG_INFO, str)
+    syslog.closelog()
+
+
+class LedControl(LedControlBase):
+    """Platform specific LED control class"""
+
+    # Constructor
+    def __init__(self):
+        self.chassis = sonic_platform.platform.Platform().get_chassis()
+        self._initDefaultConfig()
+
+    def _initDefaultConfig(self):
+        # The fan tray leds and system led managed by new chassis class API
+        # leaving only a couple other front panel leds to be done old style
+        DBG_PRINT("starting system leds")
+        self._initSystemLed()
+        DBG_PRINT(" led done")
+
+    def _read_sysfs_file(self, sysfs_file):
+        # On successful read, returns the value read from given
+        # reg_name and on failure returns 'ERR'
+        rv = 'ERR'
+
+        if (not os.path.isfile(sysfs_file)):
+            return rv
+        try:
+            with open(sysfs_file, 'r') as fd:
+                rv = fd.read()
+        except Exception as e:
+            rv = 'ERR'
+
+        rv = rv.rstrip('\r\n')
+        rv = rv.lstrip(" ")
+        return rv
+
+    def _write_sysfs_file(self, sysfs_file, value):
+        # On successful write, the value read will be written on
+        # reg_name and on failure returns 'ERR'
+        rv = 'ERR'
+
+        if (not os.path.isfile(sysfs_file)):
+            return rv
+        try:
+            with open(sysfs_file, 'w') as fd:
+                rv = fd.write(str(value))
+        except Exception as e:
+            rv = 'ERR'
+
+        return rv
+
+    def _initSystemLed(self):
+        # Front Panel System LEDs setting
+        oldfan = 0xf    # 0=amber, 1=green
+        oldpsu = 0xf    # 0=amber, 1=green
+
+        # Write sys led
+        status = self._write_sysfs_file(SWPLD1_DIR+"led_sys", "1")
+        if status == "ERR":
+            DBG_PRINT(" System LED NOT set correctly")
+        else:
+            DBG_PRINT(" System LED set O.K. ")
+
+        # Timer loop to monitor and set front panel Status, Fan, and PSU LEDs
+        while True:
+            # Front Panel FAN Panel LED setting
+            good_fan = 0
+            for fan in self.chassis._fan_list:
+                if fan.get_status() == True:
+                    good_fan = good_fan + 1
+            
+            if (good_fan == MAX_7220H3_FAN_DRAWERS * MAX_7220H3_FANS_PER_DRAWER):
+                if (os.path.isfile(SWPLD1_DIR+"led_fan")):
+                    if oldfan != 0x1:
+                        self._write_sysfs_file(SWPLD1_DIR+"led_fan", "1")
+                        oldfan = 0x1
+                else:
+                    oldfan = 0xf
+            else:
+                if (os.path.isfile(SWPLD1_DIR+"led_fan")):
+                    if oldfan != 0x0:
+                        self._write_sysfs_file(SWPLD1_DIR+"led_fan", "2")
+                        oldfan = 0x0
+                else:
+                    oldfan = 0xf
+
+            time.sleep(6)
+
diff --git a/device/nokia/x86_64-nokia_ixr7220_h3-r0/system_health_monitoring_config.json b/device/nokia/x86_64-nokia_ixr7220_h3-r0/system_health_monitoring_config.json
new file mode 100644
index 000000000..b4c438a10
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h3-r0/system_health_monitoring_config.json
@@ -0,0 +1,16 @@
+{
+    "services_to_ignore": [],
+    "devices_to_ignore": [
+        "asic",
+        "psu.temperature",
+        "fan",
+        "psu"
+    ],
+    "user_defined_checkers": [],
+    "polling_interval": 60,
+    "led_color": {
+        "fault": "amber",
+        "normal": "green",
+        "booting": "blinking green"
+    }
+}
diff --git a/device/nokia/x86_64-nokia_ixr7220_h3-r0/thermal_policy.json b/device/nokia/x86_64-nokia_ixr7220_h3-r0/thermal_policy.json
new file mode 100644
index 000000000..667d82dac
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h3-r0/thermal_policy.json
@@ -0,0 +1,67 @@
+{   
+    "thermal_control_algorithm": {
+        "run_at_boot_up": "false",
+        "fan_speed_when_suspend": "65"
+    },
+    "info_types": [
+        {
+            "type": "fan_info"
+        },
+        {
+            "type": "thermal_info"
+        },
+        {
+            "type": "chassis_info"
+        }
+    ],
+    "policies": [
+        {
+            "name": "any fan absence",
+            "conditions": [
+                {
+                    "type": "fan.any.absence"
+                }
+            ],
+            "actions": [
+                {
+                    "type": "thermal_control.control",
+                    "status": "false"
+                },
+                {
+                    "type": "fan.all.set_speed",
+                    "speed": "100"
+                }
+            ]
+        },
+        {
+            "name": "all fan presence",
+            "conditions": [
+                {
+                    "type": "fan.all.presence"
+                }
+            ],
+            "actions": [
+                {
+                    "type": "thermal.temp_check_and_set_all_fan_speed",
+                    "default_speed": "40",
+                    "threshold1_speed": "55",
+                    "threshold2_speed": "80",
+                    "hightemp_speed": "100"
+                }
+            ]
+        },
+	{
+            "name": "temp over high critical threshold",
+            "conditions": [
+                {
+                    "type": "thermal.over.high_critical_threshold"
+                }
+            ],
+            "actions": [
+                {
+                    "type": "switch.shutdown"
+                }
+            ]
+        }
+    ]
+}
diff --git a/device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/Nokia-IXR7220-H4-32D/ixr7220_h4_32d.bcm b/device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/Nokia-IXR7220-H4-32D/ixr7220_h4_32d.bcm
new file mode 100644
index 000000000..bf354d452
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/Nokia-IXR7220-H4-32D/ixr7220_h4_32d.bcm
@@ -0,0 +1,1645 @@
+# $Copyright: Broadcom Ltd.$
+# $Copyright: Nokia
+#
+# BCM56993 32x400g port configuration.
+# Support pipe numbers: 0, 1, 2, 3, 12, 13, 14, 15
+#
+# configuration yaml file
+#   device:
+#       <unit>:
+#           <table>:
+#               ?
+#                   <key_fld_1>: <value>
+#                   <key_fld_2>: <value>
+#                   ...
+#                   <key_fld_n>: <value>
+#               :
+#                   <data_fld_1>: <value>
+#                   <data_fld_2>: <value>
+#                   ...
+#                   <data_fld_n>: <value>
+#
+
+---
+bcm_device:
+    0:
+        global:
+            pktio_mode: 1
+            vlan_flooding_l2mc_num_reserved: 0
+            ipv6_lpm_128b_enable: 1
+            shared_block_mask_section: uc_bc
+            skip_protocol_default_entries: 1
+            # LTSW uses value 1 for ALPM combined mode
+            l3_alpm_template: 1
+            l3_alpm_hit_skip: 1
+            sai_feat_tail_timestamp : 1
+            sai_field_group_auto_prioritize: 1
+            #l3_intf_vlan_split_egress for MTU at L3IF
+            l3_intf_vlan_split_egress : 1
+
+            # vxlan
+            l3_alpm_template: 1
+            riot_overlay_l3_egress_mem_size: 16384
+            riot_overlay_l3_intf_mem_size: 4096
+            l3_ecmp_member_first_lkup_mem_size: 12288
+            bcm_tunnel_term_compatible_mode: 1
+            shared_l2_tunnel: 1
+            sai_tunnel_support: 10
+            sai_tunnel_underlay_route_mode: 2
+            sai_tunnel_ecmp_sharing_mode: 0 # change to 2 if SAI_NEXT_HOP_GROUP_ATTR_LEVEL_1 used
+
+            # bfd
+            #bfd_enable: 1
+            #bfd_sha1_keys: 5
+            #bfd_num_sessions: 2048
+            #bfd_simple_password_keys: 5
+            #num_queues_pci: 47
+            #num_queues_uc0: 1
+            #bfd_feature_enable: 1
+            #bfd_use_endpoint_id_as_discriminator: 1
+            #bfd_tx_raw_ingress_enable: 1
+            #sai_eapp_config_file: "/usr/share/sonic/device/x86_64-broadcom_common/eapps/eapp_config.json"
+---
+device:
+    0:
+        PC_SERDES_CONFIG:
+            PKG_SWAP_BYPASS: 1
+
+        PC_PM_CORE:
+            ?
+                PC_PM_ID: 1
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x72306451
+                TX_LANE_MAP: 0x14670235
+                RX_POLARITY_FLIP: 0xff
+                TX_POLARITY_FLIP: 0xab
+            ?
+                PC_PM_ID: 2
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x20635471
+                TX_LANE_MAP: 0x26134705
+                RX_POLARITY_FLIP: 0x00
+                TX_POLARITY_FLIP: 0xfc
+            ?
+                PC_PM_ID: 3
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x46217035
+                TX_LANE_MAP: 0x40536172
+                RX_POLARITY_FLIP: 0xf3
+                TX_POLARITY_FLIP: 0x80
+            ?
+                PC_PM_ID: 4
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x25643170
+                TX_LANE_MAP: 0x20751364
+                RX_POLARITY_FLIP: 0xfb
+                TX_POLARITY_FLIP: 0x66
+            ?
+                PC_PM_ID: 5
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x07623415
+                TX_LANE_MAP: 0x02746153
+                RX_POLARITY_FLIP: 0xeb
+                TX_POLARITY_FLIP: 0x68
+            ?
+                PC_PM_ID: 6
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x37640215
+                TX_LANE_MAP: 0x67130524
+                RX_POLARITY_FLIP: 0x40
+                TX_POLARITY_FLIP: 0x45
+            ?
+                PC_PM_ID: 7
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x17320645
+                TX_LANE_MAP: 0x71536240
+                RX_POLARITY_FLIP: 0x55
+                TX_POLARITY_FLIP: 0x28
+            ?
+                PC_PM_ID: 8
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x30716245
+                TX_LANE_MAP: 0x64107523
+                RX_POLARITY_FLIP: 0x7e
+                TX_POLARITY_FLIP: 0x14
+            ?
+                PC_PM_ID: 9
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x46712350
+                TX_LANE_MAP: 0x74031526
+                RX_POLARITY_FLIP: 0x9d
+                TX_POLARITY_FLIP: 0x08
+            ?
+                PC_PM_ID: 10
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x76125340
+                TX_LANE_MAP: 0x13645072
+                RX_POLARITY_FLIP: 0x40
+                TX_POLARITY_FLIP: 0xd9
+            ?
+                PC_PM_ID: 11
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x43601275
+                TX_LANE_MAP: 0x36251407
+                RX_POLARITY_FLIP: 0xdF
+                TX_POLARITY_FLIP: 0x29
+            ?
+                PC_PM_ID: 12
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x65423170
+                TX_LANE_MAP: 0x23170465
+                RX_POLARITY_FLIP: 0xfe
+                TX_POLARITY_FLIP: 0x54
+            ?
+                PC_PM_ID: 13
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x71306245
+                TX_LANE_MAP: 0x45721630
+                RX_POLARITY_FLIP: 0x00
+                TX_POLARITY_FLIP: 0xec
+            ?
+                PC_PM_ID: 14
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x62514370
+                TX_LANE_MAP: 0x31745260
+                RX_POLARITY_FLIP: 0x00
+                TX_POLARITY_FLIP: 0x74
+            ?
+                PC_PM_ID: 15
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x20574136
+                TX_LANE_MAP: 0x17352406
+                RX_POLARITY_FLIP: 0x45
+                TX_POLARITY_FLIP: 0x10
+            ?
+                PC_PM_ID: 16
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x07561423
+                TX_LANE_MAP: 0x56137402
+                RX_POLARITY_FLIP: 0xfb
+                TX_POLARITY_FLIP: 0x33
+            ?
+                PC_PM_ID: 49
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13240576
+                TX_LANE_MAP: 0x31524706
+                RX_POLARITY_FLIP: 0xaa
+                TX_POLARITY_FLIP: 0x95
+            ?
+                PC_PM_ID: 50
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32450716
+                TX_LANE_MAP: 0x42610573
+                RX_POLARITY_FLIP: 0x05
+                TX_POLARITY_FLIP: 0xcc
+            ?
+                PC_PM_ID: 51
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x74632150
+                TX_LANE_MAP: 0x12704365
+                RX_POLARITY_FLIP: 0x3a
+                TX_POLARITY_FLIP: 0xd8
+            ?
+                PC_PM_ID: 52
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x23564107
+                TX_LANE_MAP: 0x76023514
+                RX_POLARITY_FLIP: 0xcc
+                TX_POLARITY_FLIP: 0x7e
+            ?
+                PC_PM_ID: 53
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x35726041
+                TX_LANE_MAP: 0x40156273
+                RX_POLARITY_FLIP: 0x28
+                TX_POLARITY_FLIP: 0x7e
+            ?
+                PC_PM_ID: 54
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x34016257
+                TX_LANE_MAP: 0x76534012
+                RX_POLARITY_FLIP: 0x80
+                TX_POLARITY_FLIP: 0x22
+            ?
+                PC_PM_ID: 55
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x16743520
+                TX_LANE_MAP: 0x23416075
+                RX_POLARITY_FLIP: 0x00
+                TX_POLARITY_FLIP: 0x26
+            ?
+                PC_PM_ID: 56
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x64037152
+                TX_LANE_MAP: 0x64732150
+                RX_POLARITY_FLIP: 0x77
+                TX_POLARITY_FLIP: 0x6a
+            ?
+                PC_PM_ID: 57
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x42537061
+                TX_LANE_MAP: 0x50246173
+                RX_POLARITY_FLIP: 0x32
+                TX_POLARITY_FLIP: 0x5e
+            ?
+                PC_PM_ID: 58
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x31207564
+                TX_LANE_MAP: 0x01734562
+                RX_POLARITY_FLIP: 0x08
+                TX_POLARITY_FLIP: 0x23
+            ?
+                PC_PM_ID: 59
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x51473062
+                TX_LANE_MAP: 0x62705341
+                RX_POLARITY_FLIP: 0x00
+                TX_POLARITY_FLIP: 0x63
+            ?
+                PC_PM_ID: 60
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x62471305
+                TX_LANE_MAP: 0x43506172
+                RX_POLARITY_FLIP: 0x7f
+                TX_POLARITY_FLIP: 0x07
+            ?
+                PC_PM_ID: 61
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x53024617
+                TX_LANE_MAP: 0x50627143
+                RX_POLARITY_FLIP: 0x8f
+                TX_POLARITY_FLIP: 0x6b
+            ?
+                PC_PM_ID: 62
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x62537041
+                TX_LANE_MAP: 0x02761345
+                RX_POLARITY_FLIP: 0x7c
+                TX_POLARITY_FLIP: 0xa2
+            ?
+                PC_PM_ID: 63
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x20653174
+                TX_LANE_MAP: 0x06714523
+                RX_POLARITY_FLIP: 0x26
+                TX_POLARITY_FLIP: 0x20
+            ?
+                PC_PM_ID: 64
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x74516320
+                TX_LANE_MAP: 0x53170426
+                RX_POLARITY_FLIP: 0xef
+                TX_POLARITY_FLIP: 0xef
+...
+---
+device:
+    0:
+        PC_PORT_PHYS_MAP:
+            ?
+                # CPU port
+                PORT_ID: 0
+            :
+                PC_PHYS_PORT_ID: 0
+            ?
+                PORT_ID: 1
+            :
+                PC_PHYS_PORT_ID: 1
+            ?
+                PORT_ID: 2
+            :
+                PC_PHYS_PORT_ID: 5
+            ?
+                PORT_ID: 3
+            :
+                PC_PHYS_PORT_ID: 9
+            ?
+                PORT_ID: 4
+            :
+                PC_PHYS_PORT_ID: 13
+            ?
+                PORT_ID: 17
+            :
+                PC_PHYS_PORT_ID: 17
+            ?
+                PORT_ID: 18
+            :
+                PC_PHYS_PORT_ID: 21
+            ?
+                PORT_ID: 19
+            :
+                PC_PHYS_PORT_ID: 25
+            ?
+                PORT_ID: 20
+            :
+                PC_PHYS_PORT_ID: 29
+            ?
+                PORT_ID: 34
+            :
+                PC_PHYS_PORT_ID: 33
+            ?
+                PORT_ID: 35
+            :
+                PC_PHYS_PORT_ID: 37
+            ?
+                PORT_ID: 36
+            :
+                PC_PHYS_PORT_ID: 41
+            ?
+                PORT_ID: 37
+            :
+                PC_PHYS_PORT_ID: 45
+            ?
+                PORT_ID: 51
+            :
+                PC_PHYS_PORT_ID: 49
+            ?
+                PORT_ID: 52
+            :
+                PC_PHYS_PORT_ID: 53
+            ?
+                PORT_ID: 53
+            :
+                PC_PHYS_PORT_ID: 57
+            ?
+                PORT_ID: 54
+            :
+                PC_PHYS_PORT_ID: 61
+            ?
+                PORT_ID: 204
+            :
+                PC_PHYS_PORT_ID: 193
+            ?
+                PORT_ID: 205
+            :
+                PC_PHYS_PORT_ID: 197
+            ?
+                PORT_ID: 206
+            :
+                PC_PHYS_PORT_ID: 201
+            ?
+                PORT_ID: 207
+            :
+                PC_PHYS_PORT_ID: 205
+            ?
+                PORT_ID: 221
+            :
+                PC_PHYS_PORT_ID: 209
+            ?
+                PORT_ID: 222
+            :
+                PC_PHYS_PORT_ID: 213
+            ?
+                PORT_ID: 223
+            :
+                PC_PHYS_PORT_ID: 217
+            ?
+                PORT_ID: 224
+            :
+                PC_PHYS_PORT_ID: 221
+            ?
+                PORT_ID: 238
+            :
+                PC_PHYS_PORT_ID: 225
+            ?
+                PORT_ID: 239
+            :
+                PC_PHYS_PORT_ID: 229
+            ?
+                PORT_ID: 240
+            :
+                PC_PHYS_PORT_ID: 233
+            ?
+                PORT_ID: 241
+            :
+                PC_PHYS_PORT_ID: 237
+            ?
+                PORT_ID: 255
+            :
+                PC_PHYS_PORT_ID: 241
+            ?
+                PORT_ID: 256
+            :
+                PC_PHYS_PORT_ID: 245
+            ?
+                PORT_ID: 257
+            :
+                PC_PHYS_PORT_ID: 249
+            ?
+                PORT_ID: 258
+            :
+                PC_PHYS_PORT_ID: 253
+            ?
+                PORT_ID: 50
+            :
+                PC_PHYS_PORT_ID: 258
+...
+---
+device:
+    0:
+        PC_PORT:
+            ?
+                PORT_ID: 0
+            :
+                &port_mode_10g
+                ENABLE: 1
+                SPEED: 10000
+                NUM_LANES: 1
+            ?
+                PORT_ID: [[50, 50]]
+            :
+                ENABLE: 0
+                MAX_FRAME_SIZE: 9416
+                SPEED: 10000
+                NUM_LANES: 1
+            ?
+               PORT_ID: [[1, 4],
+                         [17, 20],
+                         [34, 37],
+                         [51, 54],
+                         [204, 207],
+                         [221, 224],
+                         [238, 241],
+                         [255, 258]]
+            :
+                ENABLE: 0
+                SPEED: 400000
+                NUM_LANES: 8
+                FEC_MODE: PC_FEC_RS544_2XN
+                MAX_FRAME_SIZE: 9416
+...
+---
+device:
+    0:
+        # Per pipe flex counter configuration
+        CTR_EFLEX_CONFIG:
+            CTR_ING_EFLEX_OPERMODE_PIPEUNIQUE: 0
+            CTR_EGR_EFLEX_OPERMODE_PIPEUNIQUE: 0
+
+        # Per pipe flex state configuration
+        #FLEX_STATE_CONFIG:
+        #    FLEX_STATE_ING_OPERMODE_PIPEUNIQUE: 0
+        #    FLEX_STATE_EGR_OPERMODE_PIPEUNIQUE: 1
+
+        # Lossy vs Lossless mode
+        TM_THD_CONFIG:
+            THRESHOLD_MODE: LOSSLESS
+
+        # IFP mode
+        FP_CONFIG:
+            FP_ING_OPERMODE: GLOBAL_PIPE_AWARE
+...
+---
+device:
+    0:
+        TM_THD_CONFIG:
+            SKIP_BUFFER_RESERVATION: 1
+            THRESHOLD_MODE: LOSSY_AND_LOSSLESS
+
+        TM_SCHEDULER_CONFIG:
+            NUM_MC_Q: NUM_MC_Q_2
+...
+---
+device:
+    0:
+        TM_ING_THD_PORT_PRI_GRP:
+            ?
+                PORT_ID: [[0,67], [204,219], [221,253],[255,271]]
+                TM_PRI_GRP_ID: [[0,7]]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                DYNAMIC_SHARED_LIMITS: 0
+                SHARED_LIMIT_CELLS_STATIC: 0
+                HEADROOM_LIMIT_CELLS: 0
+
+        TM_ING_THD_PORT_SERVICE_POOL:
+            ?
+                PORT_ID: [[0,67], [204,219], [221,253],[255,271]]
+                TM_ING_SERVICE_POOL_ID: [[0,3]]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                SHARED_LIMIT_CELLS: 0
+
+        TM_ING_THD_HEADROOM_POOL:
+            ?
+                BUFFER_POOL: 0
+                TM_HEADROOM_POOL_ID: [[0,3]]
+            :
+                LIMIT_CELLS: 0
+
+        TM_THD_UC_Q:
+            ?
+                PORT_ID: [[1,67], [204,219], [221,253],[255,271]]
+                TM_UC_Q_ID: [[0,11]]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                SHARED_LIMITS: 1
+                DYNAMIC_SHARED_LIMITS: 0
+                SHARED_LIMIT_CELLS_STATIC: 0
+
+        TM_THD_MC_Q:
+            ?
+                PORT_ID: 0
+                TM_MC_Q_ID: [[0,47]]
+            :
+                MIN_GUARANTEE_CELLS: 0
+            ?
+                PORT_ID: [[1,67], [204,219], [221,253],[255,271]]
+                TM_MC_Q_ID: [[0,5]]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                SHARED_LIMITS: 1
+                DYNAMIC_SHARED_LIMITS: 0
+                SHARED_LIMIT_CELLS_STATIC: 0
+
+        TM_THD_Q_GRP:
+            ?
+                PORT_ID: [[0,67], [204,219], [221,253],[255,271]]
+            :
+                UC_Q_GRP_MIN_GUARANTEE_CELLS: 0
+                MC_Q_GRP_MIN_GUARANTEE_CELLS: 0
+...
+---
+device:
+    0:
+        TM_ING_PORT:
+            ?
+                PORT_ID: [[0,67], [204,219], [221,253],[255,271]]
+            :
+                PAUSE: 0
+
+        TM_ING_PORT_PRI_GRP:
+            ?
+                PORT_ID: [[0,67], [204,219], [221,253],[255,271]]
+                TM_PRI_GRP_ID: [[0,7]]
+            :
+                PFC: 0
+                LOSSLESS: 0
+                ING_MIN_MODE: USE_PRI_GRP_MIN
+
+        TM_PORT_UC_Q_TO_SERVICE_POOL:
+            ?
+                PORT_ID: [[1,67], [204,219], [221,253],[255,271]]
+                TM_UC_Q_ID: [[0,11]]
+            :
+                USE_QGROUP_MIN: 0
+
+        TM_PORT_MC_Q_TO_SERVICE_POOL:
+            ?
+                PORT_ID: 0
+                TM_MC_Q_ID: [[0,47]]
+            :
+                USE_QGROUP_MIN: 0
+            ?
+                PORT_ID: [[1,67], [204,219], [221,253],[255,271]]
+                TM_MC_Q_ID: [[0,5]]
+            :
+                USE_QGROUP_MIN: 0
+...
+---
+device:
+    0:
+        TM_ING_THD_HEADROOM_POOL:
+            ?
+                BUFFER_POOL: 0
+                TM_HEADROOM_POOL_ID: [[0,3]]
+            :
+                LIMIT_CELLS: 0
+
+        TM_ING_THD_SERVICE_POOL:
+            ?
+                BUFFER_POOL: 0
+                TM_ING_SERVICE_POOL_ID: [[0,3]]
+            :
+                SHARED_LIMIT_CELLS: 0
+                SHARED_RESUME_OFFSET_CELLS: 0
+                COLOR_SPECIFIC_LIMITS: 0
+
+        TM_EGR_THD_SERVICE_POOL:
+            ?
+                BUFFER_POOL: 0
+                TM_EGR_SERVICE_POOL_ID: [[0,3]]
+            :
+                SHARED_LIMIT_CELLS: 0
+                SHARED_RESUME_LIMIT_CELLS: 0
+                COLOR_SPECIFIC_LIMITS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 0
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 0
+                RED_SHARED_LIMIT_CELLS: 0
+                RED_SHARED_RESUME_LIMIT_CELLS: 0
+
+        TM_THD_MC_EGR_SERVICE_POOL:
+            ?
+                BUFFER_POOL: 0
+                TM_EGR_SERVICE_POOL_ID: [[0,3]]
+            :
+                SHARED_LIMIT_CELLS: 0
+                SHARED_RESUME_LIMIT_CELLS: 0
+                COLOR_SPECIFIC_LIMITS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 0
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 0
+                RED_SHARED_LIMIT_CELLS: 0
+                RED_SHARED_RESUME_LIMIT_CELLS: 0
+...
+
+### Mapping
+---
+device:
+    0:
+        TM_ING_UC_ING_PRI_MAP:
+            ?
+                # Profile 1
+                TM_ING_UC_ING_PRI_MAP_ID: 1
+                ING_PRI: [0, 1, 2, 5, 6, [8,15]]
+            :
+                TM_PRI_GRP_ID: 0
+            ?
+                TM_ING_UC_ING_PRI_MAP_ID: 1
+                ING_PRI: 3
+            :
+                TM_PRI_GRP_ID: 3
+            ?
+                TM_ING_UC_ING_PRI_MAP_ID: 1
+                ING_PRI: 4
+            :
+                TM_PRI_GRP_ID: 4
+            ?
+                TM_ING_UC_ING_PRI_MAP_ID: 1
+                ING_PRI: 7
+            :
+                TM_PRI_GRP_ID: 7
+            ?
+                # Profile 2
+                TM_ING_UC_ING_PRI_MAP_ID: 1
+                ING_PRI: [0, 1, 5, [8,15]]
+            :
+                TM_PRI_GRP_ID: 0
+            ?
+                TM_ING_UC_ING_PRI_MAP_ID: 2
+                ING_PRI: 2
+            :
+                TM_PRI_GRP_ID: 2
+            ?
+                TM_ING_UC_ING_PRI_MAP_ID: 2
+                ING_PRI: 3
+            :
+                TM_PRI_GRP_ID: 3
+            ?
+                TM_ING_UC_ING_PRI_MAP_ID: 2
+                ING_PRI: 4
+            :
+                TM_PRI_GRP_ID: 4
+            ?
+                TM_ING_UC_ING_PRI_MAP_ID: 2
+                ING_PRI: 6
+            :
+                TM_PRI_GRP_ID: 6
+            ?
+                TM_ING_UC_ING_PRI_MAP_ID: 2
+                ING_PRI: 7
+            :
+                TM_PRI_GRP_ID: 7
+            ?
+                # Profile 3
+                TM_ING_UC_ING_PRI_MAP_ID: 3
+                ING_PRI: [[0,15]]
+            :
+                TM_PRI_GRP_ID: 7
+
+        TM_ING_NONUC_ING_PRI_MAP:
+            ?
+                # Profile 1
+                TM_ING_NONUC_ING_PRI_MAP_ID: 1
+                ING_PRI: [0, 1, 2, 5, 6, [8,15]]
+            :
+                TM_PRI_GRP_ID: 0
+            ?
+                TM_ING_NONUC_ING_PRI_MAP_ID: 1
+                ING_PRI: 3
+            :
+                TM_PRI_GRP_ID: 3
+            ?
+                TM_ING_NONUC_ING_PRI_MAP_ID: 1
+                ING_PRI: 4
+            :
+                TM_PRI_GRP_ID: 4
+            ?
+                TM_ING_NONUC_ING_PRI_MAP_ID: 1
+                ING_PRI: 7
+            :
+                TM_PRI_GRP_ID: 7
+            ?
+                # Profile 2
+                TM_ING_NONUC_ING_PRI_MAP_ID: 1
+                ING_PRI: [0, 1, 5, [8,15]]
+            :
+                TM_PRI_GRP_ID: 0
+            ?
+                TM_ING_NONUC_ING_PRI_MAP_ID: 2
+                ING_PRI: 2
+            :
+                TM_PRI_GRP_ID: 2
+            ?
+                TM_ING_NONUC_ING_PRI_MAP_ID: 2
+                ING_PRI: 3
+            :
+                TM_PRI_GRP_ID: 3
+            ?
+                TM_ING_NONUC_ING_PRI_MAP_ID: 2
+                ING_PRI: 4
+            :
+                TM_PRI_GRP_ID: 4
+            ?
+                TM_ING_NONUC_ING_PRI_MAP_ID: 2
+                ING_PRI: 6
+            :
+                TM_PRI_GRP_ID: 6
+            ?
+                TM_ING_NONUC_ING_PRI_MAP_ID: 2
+                ING_PRI: 7
+            :
+                TM_PRI_GRP_ID: 7
+            ?
+                # Profile 3
+                TM_ING_NONUC_ING_PRI_MAP_ID: 3
+                ING_PRI: [[0,15]]
+            :
+                TM_PRI_GRP_ID: 7
+
+        TM_PRI_GRP_POOL_MAP:
+            ?
+                TM_PRI_GRP_POOL_MAP_ID: 1
+                TM_PRI_GRP_ID: [[0,6]]
+            :
+                TM_ING_SERVICE_POOL_ID: 0
+                TM_HEADROOM_POOL_ID: 0
+            ?
+                TM_PRI_GRP_POOL_MAP_ID: 1
+                TM_PRI_GRP_ID: 7
+            :
+                TM_ING_SERVICE_POOL_ID: 1
+                TM_HEADROOM_POOL_ID: 1
+
+        TM_ING_PORT:
+            ?
+                PORT_ID: [0]
+            :
+                ING_PRI_MAP_ID: 3
+                PRI_GRP_MAP_ID: 1
+            ?
+                PORT_ID: [[1,4], [204,207]]
+            :
+                ING_PRI_MAP_ID: 1
+                PRI_GRP_MAP_ID: 1
+            ?
+                PORT_ID: [[17,20], [34,37], [51,54], [221,224], [238,241], [255,258]]
+            :
+                ING_PRI_MAP_ID: 2
+                PRI_GRP_MAP_ID: 1
+            ?
+                PORT_ID: [50]
+            :
+                ING_PRI_MAP_ID: 1
+                PRI_GRP_MAP_ID: 1
+            ?
+                PORT_ID: [33, 67, 237, 271]
+            :
+                ING_PRI_MAP_ID: 1
+                PRI_GRP_MAP_ID: 1
+
+        TM_PORT_UC_Q_TO_SERVICE_POOL:
+            ?
+                PORT_ID: [[1,4], [17,20], [33,37], [50,54], 67, [204,207], [221,224], [237,241], [255,258], 271]
+                TM_UC_Q_ID: [[0,6], [8,9]]
+            :
+                TM_EGR_SERVICE_POOL_ID: 0
+            ?
+                PORT_ID: [[1,4], [17,20], [33,37], [50,54], 67, [204,207], [221,224], [237,241], [255,258], 271]
+                TM_UC_Q_ID: 7
+            :
+                TM_EGR_SERVICE_POOL_ID: 1
+
+        TM_PORT_MC_Q_TO_SERVICE_POOL:
+            ?
+                PORT_ID: [0]
+                TM_MC_Q_ID: [[0,47]]
+            :
+                TM_EGR_SERVICE_POOL_ID: 1
+            ?
+                PORT_ID: [[1,4], [17,20], [33,37], [50,54], 67, [204,207], [221,224], [237,241], [255,258], 271]
+                TM_MC_Q_ID: [[0,1]]
+            :
+                TM_EGR_SERVICE_POOL_ID: 0
+...
+
+### Scheduler
+---
+device:
+    0:
+        TM_SCHEDULER_PROFILE:
+            ?
+                TM_SCHEDULER_PROFILE_ID: 1
+                TM_SCHEDULER_NODE_ID: [0, 1]
+            :
+                NUM_UC_Q: 1
+                NUM_MC_Q: 1
+                FLOW_CTRL_UC: 0
+            ?
+                TM_SCHEDULER_PROFILE_ID: 1
+                TM_SCHEDULER_NODE_ID: [2, 5, 6, 7, 8, 9]
+            :
+                NUM_UC_Q: 1
+                NUM_MC_Q: 0
+                FLOW_CTRL_UC: 0
+            ?
+                TM_SCHEDULER_PROFILE_ID: 1
+                TM_SCHEDULER_NODE_ID: [3, 4]
+            :
+                NUM_UC_Q: 1
+                NUM_MC_Q: 0
+                FLOW_CTRL_UC: 1
+            ?
+                TM_SCHEDULER_PROFILE_ID: 1
+                TM_SCHEDULER_NODE_ID: [10, 11]
+            :
+                NUM_UC_Q: 0
+                NUM_MC_Q: 0
+                FLOW_CTRL_UC: 0
+
+        TM_SCHEDULER_PROFILE:
+            ?
+                TM_SCHEDULER_PROFILE_ID: 2
+                TM_SCHEDULER_NODE_ID: [0, 1]
+            :
+                NUM_UC_Q: 1
+                NUM_MC_Q: 1
+                FLOW_CTRL_UC: 0
+            ?
+                TM_SCHEDULER_PROFILE_ID: 2
+                TM_SCHEDULER_NODE_ID: [5, 7, 8, 9]
+            :
+                NUM_UC_Q: 1
+                NUM_MC_Q: 0
+                FLOW_CTRL_UC: 0
+            ?
+                TM_SCHEDULER_PROFILE_ID: 2
+                TM_SCHEDULER_NODE_ID: [2, 3, 4, 6]
+            :
+                NUM_UC_Q: 1
+                NUM_MC_Q: 0
+                FLOW_CTRL_UC: 1
+            ?
+                TM_SCHEDULER_PROFILE_ID: 2
+                TM_SCHEDULER_NODE_ID: [10, 11]
+            :
+                NUM_UC_Q: 0
+                NUM_MC_Q: 0
+                FLOW_CTRL_UC: 0
+...
+---
+device:
+    0:
+        TM_SCHEDULER_PORT_PROFILE:
+            ?
+                PORT_ID: [[1,4], [204,207]]
+            :
+                TM_SCHEDULER_PROFILE_ID: 1
+                WRR: 0
+        TM_SCHEDULER_PORT_PROFILE:
+            ?
+                PORT_ID: [[17,20], [34,37], [51,54], [221,224], [238,241], [255,258]]
+            :
+                TM_SCHEDULER_PROFILE_ID: 2
+                WRR: 0
+...
+
+### Pools
+### hard code service pool size for TH4 per architecture requirement.
+---
+device:
+    0:
+        TM_ING_THD_HEADROOM_POOL:
+            ?
+                BUFFER_POOL: 0
+                TM_HEADROOM_POOL_ID: 0
+            :
+                LIMIT_CELLS: 45696
+
+        TM_ING_THD_SERVICE_POOL:
+            ?
+                BUFFER_POOL: 0
+                TM_ING_SERVICE_POOL_ID: 0
+            :
+                SHARED_LIMIT_CELLS: 173222
+                SHARED_RESUME_OFFSET_CELLS: 74
+                COLOR_SPECIFIC_LIMITS: 0
+            ?
+                BUFFER_POOL: 0
+                TM_ING_SERVICE_POOL_ID: 1
+            :
+                SHARED_LIMIT_CELLS: 605
+                SHARED_RESUME_OFFSET_CELLS: 74
+                COLOR_SPECIFIC_LIMITS: 0
+
+        TM_EGR_THD_SERVICE_POOL:
+            ?
+                BUFFER_POOL: 0
+                TM_EGR_SERVICE_POOL_ID: 0
+            :
+                SHARED_LIMIT_CELLS: 173222
+                SHARED_RESUME_LIMIT_CELLS: 21643
+                COLOR_SPECIFIC_LIMITS: 1
+                YELLOW_SHARED_LIMIT_CELLS: 16240
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 16230
+                RED_SHARED_LIMIT_CELLS: 13533
+                RED_SHARED_RESUME_LIMIT_CELLS: 13523
+            ?
+                BUFFER_POOL: 0
+                TM_EGR_SERVICE_POOL_ID: 1
+            :
+                SHARED_LIMIT_CELLS: 605
+                SHARED_RESUME_LIMIT_CELLS: 73
+                COLOR_SPECIFIC_LIMITS: 1
+                YELLOW_SHARED_LIMIT_CELLS: 57
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 55
+                RED_SHARED_LIMIT_CELLS: 48
+                RED_SHARED_RESUME_LIMIT_CELLS: 46
+
+        TM_THD_MC_EGR_SERVICE_POOL:
+            ?
+                BUFFER_POOL: 0
+                TM_EGR_SERVICE_POOL_ID: 0
+            :
+                SHARED_LIMIT_CELLS: 15779
+                SHARED_RESUME_LIMIT_CELLS: 1962
+                COLOR_SPECIFIC_LIMITS: 1
+                YELLOW_SHARED_LIMIT_CELLS: 1480
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 1470
+                RED_SHARED_LIMIT_CELLS: 1233
+                RED_SHARED_RESUME_LIMIT_CELLS: 1223
+            ?
+                BUFFER_POOL: 0
+                TM_EGR_SERVICE_POOL_ID: 1
+            :
+                SHARED_LIMIT_CELLS: 605
+                SHARED_RESUME_LIMIT_CELLS: 73
+                COLOR_SPECIFIC_LIMITS: 1
+                YELLOW_SHARED_LIMIT_CELLS: 57
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 55
+                RED_SHARED_LIMIT_CELLS: 46
+                RED_SHARED_RESUME_LIMIT_CELLS: 46
+...
+
+### Thresholds
+######################################
+---
+device:
+    0:
+        TM_ING_THD_PORT_PRI_GRP:
+            ?
+                PORT_ID: [[0,4], [17,20], [33,37], [50,54], 67, [204,207], [221,224], [237,241], [255,258], 271]
+                TM_PRI_GRP_ID: [0, 1, 5, 7]
+            :
+                SHARED_LIMIT_CELLS_STATIC: 227317
+                MIN_GUARANTEE_CELLS: 0
+                DYNAMIC_SHARED_LIMITS: 0
+                RESUME_OFFSET_CELLS: 0
+                RESUME_FLOOR_CELLS: 0
+                HEADROOM_LIMIT_AUTO: 0
+                HEADROOM_LIMIT_CELLS: 0
+            ?
+                PORT_ID: [[1,4], [204,207]]
+                TM_PRI_GRP_ID: [2, 3, 4, 6]
+            :
+                MIN_GUARANTEE_CELLS: 18
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_DYNAMIC: ALPHA_1_4
+                RESUME_OFFSET_CELLS: 18
+                RESUME_FLOOR_CELLS: 0
+                HEADROOM_LIMIT_AUTO: 0
+                HEADROOM_LIMIT_CELLS: 2874
+            ?
+                PORT_ID: [[17,20], [34,37], [51,54], [221,224], [238,241], [255,258]]
+                TM_PRI_GRP_ID: [2, 3, 4, 6]
+            :
+                MIN_GUARANTEE_CELLS: 18
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_DYNAMIC: ALPHA_1_4
+                RESUME_OFFSET_CELLS: 18
+                RESUME_FLOOR_CELLS: 0
+                HEADROOM_LIMIT_AUTO: 0
+                HEADROOM_LIMIT_CELLS: 675
+            ?
+                PORT_ID: [50]
+                TM_PRI_GRP_ID: [2, 3, 4, 6]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_DYNAMIC: ALPHA_1_4
+                RESUME_OFFSET_CELLS: 0
+                RESUME_FLOOR_CELLS: 0
+                HEADROOM_LIMIT_AUTO: 0
+            ?
+                PORT_ID: [33, 67, 237, 271]
+                TM_PRI_GRP_ID: [2, 3, 4, 6]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_DYNAMIC: ALPHA_1_4
+                RESUME_OFFSET_CELLS: 0
+                RESUME_FLOOR_CELLS: 0
+                HEADROOM_LIMIT_AUTO: 0
+            ?
+                PORT_ID: [0]
+                TM_PRI_GRP_ID: [2, 3, 4, 6]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_DYNAMIC: ALPHA_1_4
+                RESUME_OFFSET_CELLS: 0
+                RESUME_FLOOR_CELLS: 0
+                HEADROOM_LIMIT_AUTO: 0
+
+        TM_ING_THD_PORT_SERVICE_POOL:
+            ?
+                PORT_ID: [[0,4], [17,20], [33,37], [50,54], 67, [204,207], [221,224], [237,241], [255,258], 271]
+                TM_ING_SERVICE_POOL_ID: [0, 1]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                SHARED_LIMIT_CELLS: 227317
+                RESUME_LIMIT_CELLS: 227317
+
+        TM_THD_UC_Q:
+            ?
+                PORT_ID: [[1,4], [17,20], [33,37], [50,54], 67, [204,207], [221,224], [237,241], [255,258], 271]
+                TM_UC_Q_ID: [0, 1, 5, 7, 8, 9]
+            :
+                SHARED_LIMITS: 1
+                COLOR_SPECIFIC_LIMITS: 1
+                RED_LIMIT_DYNAMIC: PERCENTAGE_675
+                YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750
+                COLOR_SPECIFIC_DYNAMIC_LIMITS: 1
+                MIN_GUARANTEE_CELLS: 7
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                RESUME_OFFSET_CELLS: 2
+            ?
+                PORT_ID: [[1,4], [17,20], [33,37], [50,54], 67, [204,207], [221,224], [237,241], [255,258], 271]
+                TM_UC_Q_ID: [2, 3, 4, 6]
+            :
+                SHARED_LIMITS: 0
+                COLOR_SPECIFIC_LIMITS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
+                MIN_GUARANTEE_CELLS: 0
+                DYNAMIC_SHARED_LIMITS: 0
+                SHARED_LIMIT_CELLS_STATIC: 227317
+                RESUME_OFFSET_CELLS: 2
+
+        TM_THD_MC_Q:
+            ?
+                PORT_ID: [0]
+                TM_MC_Q_ID: [0, 1, 2, 3]
+            :
+                MIN_GUARANTEE_CELLS: 37
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_DYNAMIC: ALPHA_2
+                COLOR_SPECIFIC_LIMITS: 1
+                COLOR_SPECIFIC_DYNAMIC_LIMITS: 1
+                YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750
+                RED_LIMIT_DYNAMIC: PERCENTAGE_675
+                RESUME_OFFSET_CELLS: 2
+            ?
+                PORT_ID: [0]
+                TM_MC_Q_ID: [4, 5, 6, 7, 8, 9]
+            :
+                MIN_GUARANTEE_CELLS: 7
+                SHARED_LIMITS: 1
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_DYNAMIC: ALPHA_1_4
+                COLOR_SPECIFIC_LIMITS: 1
+                COLOR_SPECIFIC_DYNAMIC_LIMITS: 1
+                YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750
+                RED_LIMIT_DYNAMIC: PERCENTAGE_675
+                RESUME_OFFSET_CELLS: 2
+            ?
+                PORT_ID: [[1,4], [17,20], [33,37], [50,54], 67, [204,207], [221,224], [237,241], [255,258], 271]
+                TM_MC_Q_ID: [0, 1]
+            :
+                SHARED_LIMITS: 1
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                COLOR_SPECIFIC_LIMITS: 1
+                COLOR_SPECIFIC_DYNAMIC_LIMITS: 1
+                YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750
+                RED_LIMIT_DYNAMIC: PERCENTAGE_675
+                RESUME_OFFSET_CELLS: 2
+
+        TM_EGR_THD_UC_PORT_SERVICE_POOL:
+            ?
+                PORT_ID: [[1,4], [17,20], [33,37], [50,54], 67, [204,207], [221,224], [237,241], [255,258], 271]
+                TM_EGR_SERVICE_POOL_ID: 0
+            :
+                SHARED_LIMIT_CELLS: 173222
+                SHARED_RESUME_LIMIT_CELLS: 21651
+                COLOR_SPECIFIC_LIMITS: 1
+                YELLOW_SHARED_LIMIT_CELLS: 16239
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 16237
+                RED_SHARED_LIMIT_CELLS: 13532
+                RED_SHARED_RESUME_LIMIT_CELLS: 13530
+            ?
+                PORT_ID: [[1,4], [17,20], [33,37], [50,54], 67, [204,207], [221,224], [237,241], [255,258], 271]
+                TM_EGR_SERVICE_POOL_ID: 1
+            :
+                SHARED_LIMIT_CELLS: 605
+                SHARED_RESUME_LIMIT_CELLS: 73
+                COLOR_SPECIFIC_LIMITS: 1
+                YELLOW_SHARED_LIMIT_CELLS: 56
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 54
+                RED_SHARED_LIMIT_CELLS: 47
+                RED_SHARED_RESUME_LIMIT_CELLS: 45
+
+        TM_EGR_THD_MC_PORT_SERVICE_POOL:
+            ?
+                PORT_ID: [[0,4], [17,20], [33,37], [50,54], 67, [204,207], [221,224], [237,241], [255,258], 271]
+                TM_EGR_SERVICE_POOL_ID: 0
+            :
+                COLOR_SPECIFIC_LIMITS: 1
+                RED_SHARED_LIMIT_CELLS: 1232
+                YELLOW_SHARED_LIMIT_CELLS: 1479
+                SHARED_LIMIT_CELLS: 15779
+                RED_SHARED_RESUME_LIMIT_CELLS: 1230
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 1477
+                SHARED_RESUME_LIMIT_CELLS: 1970
+            ?
+                PORT_ID: [[0,4], [17,20], [33,37], [50,54], 67, [204,207], [221,224], [237,241], [255,258], 271]
+                TM_EGR_SERVICE_POOL_ID: 1
+            :
+                COLOR_SPECIFIC_LIMITS: 1
+                RED_SHARED_LIMIT_CELLS: 47
+                YELLOW_SHARED_LIMIT_CELLS: 56
+                SHARED_LIMIT_CELLS: 605
+                RED_SHARED_RESUME_LIMIT_CELLS: 45
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 54
+                SHARED_RESUME_LIMIT_CELLS: 73
+
+
+...
+### THDR Limits
+---
+device:
+    0:
+        TM_THD_REPL_SERVICE_POOL:
+                COLOR_SPECIFIC_LIMITS: 1
+                SHARED_LIMIT_CELLS: 2961
+                SHARED_RESUME_LIMIT_CELLS: 2947
+                YELLOW_SHARED_LIMIT_CELLS: 2220
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 2206
+                RED_SHARED_LIMIT_CELLS: 1850
+                RED_SHARED_RESUME_LIMIT_CELLS: 1836
+
+        TM_THD_REPL_Q:
+            ?
+                REPL_Q_NUM: [0,8]
+            :
+                COLOR_SPECIFIC_LIMITS: 1
+                COLOR_SPECIFIC_DYNAMIC_LIMITS: 1
+                SHARED_LIMITS: 1
+                DYNAMIC_SHARED_LIMITS: 1
+                RESUME_OFFSET_CELLS: 14
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750
+                RED_LIMIT_DYNAMIC: PERCENTAGE_675
+                RESUME_OFFSET_YELLOW_CELLS: 14
+                RESUME_OFFSET_RED_CELLS: 14
+
+        TM_THD_REPL_Q:
+            ?
+                REPL_Q_NUM: [0,5]
+            :
+                MIN_GUARANTEE_CELLS: 0
+            ?
+                REPL_Q_NUM: [6,8]
+            :
+                MIN_GUARANTEE_CELLS: 37
+
+...
+### Mirror-on-drop
+---
+device:
+    0:
+        TM_MIRROR_ON_DROP_CONTROL:
+            RESERVED_LIMIT_CELLS: 2580
+
+        TM_MIRROR_ON_DROP_PROFILE:
+            ?
+                TM_MIRROR_ON_DROP_PROFILE_ID: 0
+            :
+                PERCENTAGE_0_25: 65535
+                PERCENTAGE_25_50: 65535
+                PERCENTAGE_50_75: 65535
+                PERCENTAGE_75_100: 65535
+
+        TM_MIRROR_ON_DROP_DESTINATION:
+            ?
+                TM_MIRROR_ON_DROP_DESTINATION_ID: 0
+            :
+                TM_MC_Q_ID: 1
+                PORT_ID: 1
+...
+
+### OBM
+---
+device:
+    0:
+        TM_OBM_PORT_PKT_PARSE:
+            ?
+                PORT_ID: [[1,4], [204,207]]
+            :
+                DSCP_MAP: 1
+                HEADER_TYPE: OBM_HEADER_TYPE_ETHERNET
+                DEFAULT_PKT_PRI: 0
+
+        TM_OBM_PORT_PKT_PARSE:
+            ?
+                PORT_ID: [[17,20], [34,37], [51,54], [221,224], [238,241], [255,258]]
+            :
+                DSCP_MAP: 1
+                HEADER_TYPE: OBM_HEADER_TYPE_ETHERNET
+                DEFAULT_PKT_PRI: 0
+
+        TM_OBM_PORT_PKT_PRI_TC_MAP:
+            ?
+                PORT_ID: [[1,4], [204,207]]
+                PKT_PRI_TYPE: PKT_PRI_TYPE_DSCP
+                PKT_PRI: [3, 4]
+            :
+                TRAFFIC_CLASS: OBM_TC_LOSSLESS0
+
+        TM_OBM_PORT_PKT_PRI_TC_MAP:
+            ?
+                PORT_ID: [[17,20], [34,37], [51,54], [221,224], [238,241], [255,258]]
+                PKT_PRI_TYPE: PKT_PRI_TYPE_DSCP
+                PKT_PRI: [2, 3, 4, 6]
+            :
+                TRAFFIC_CLASS: OBM_TC_LOSSLESS0
+
+        TM_OBM_THD_PORT:
+            ?
+                PORT_ID: [[1,4], [204,207]]
+            :
+                THD_AUTO: 0
+                LOSSY_LOW_MAX_BYTES: 37376
+                LOSSLESS0_MAX_BYTES: 235264
+                MAX_BYTES: 235264
+
+        TM_OBM_THD_PORT:
+            ?
+                PORT_ID: [[17,20], [34,37], [51,54], [221,224], [238,241], [255,258]]
+            :
+                THD_AUTO: 0
+                LOSSY_LOW_MAX_BYTES: 37376
+                LOSSLESS0_MAX_BYTES: 235264
+                MAX_BYTES: 235264
+
+        TM_OBM_THD_PORT_FLOW_CTRL:
+            ?
+                PORT_ID: [[1,4], [204,207]]
+            :
+                THD_AUTO: 0
+                LOSSLESS0_XOFF_BYTES: 5184
+                LOSSLESS0_XON_BYTES: 4672
+                XOFF_BYTES: 5184
+                XON_BYTES: 4672
+
+        TM_OBM_THD_PORT_FLOW_CTRL:
+            ?
+                PORT_ID: [[17,20], [34,37], [51,54], [221,224], [238,241], [255,258]]
+            :
+                THD_AUTO: 0
+                LOSSLESS0_XOFF_BYTES: 5184
+                LOSSLESS0_XON_BYTES: 4672
+                XOFF_BYTES: 5184
+                XON_BYTES: 4672
+
+        TM_OBM_PORT_FLOW_CTRL:
+            ?
+                PORT_ID: [[1,4], [204,207]]
+            :
+                FLOW_CTRL: 1
+                FLOW_CTRL_TYPE: PFC
+                LOSSLESS0_FLOW_CTRL: 1
+
+        TM_OBM_PORT_FLOW_CTRL:
+            ?
+                PORT_ID: [[17,20], [34,37], [51,54], [221,224], [238,241], [255,258]]
+            :
+                FLOW_CTRL: 1
+                FLOW_CTRL_TYPE: PFC
+                LOSSLESS0_FLOW_CTRL: 1
+...
+
+### PFC
+---
+device:
+    0:
+        PC_MAC_CONTROL:
+            ?
+                PORT_ID: [[1,4], [17,20], [33,37], [50,54], 67, [204,207], [221,224], [237,241], [255,258], 271]
+            :
+                PAUSE_TX: 0
+                PAUSE_RX: 0
+
+        TM_PFC_EGR:
+            ?
+                PORT_ID: [[1,4], [204,207]]
+            :
+                TM_PFC_PRI_PROFILE_ID: 1
+
+        TM_PFC_EGR:
+            ?
+                PORT_ID: [[17,20], [34,37], [51,54], [221,224], [238,241], [255,258]]
+            :
+                TM_PFC_PRI_PROFILE_ID: 2
+...
+---
+device:
+    0:
+        TM_PFC_PRI_TO_PRI_GRP_MAP:
+            ?
+                TM_PFC_PRI_TO_PRI_GRP_MAP_ID: 1
+                PFC_PRI: 3
+            :
+                TM_PRI_GRP_ID: 3
+
+        TM_PFC_PRI_TO_PRI_GRP_MAP:
+            ?
+                TM_PFC_PRI_TO_PRI_GRP_MAP_ID: 1
+                PFC_PRI: 4
+            :
+                TM_PRI_GRP_ID: 4
+
+        TM_PFC_PRI_TO_PRI_GRP_MAP:
+            ?
+                TM_PFC_PRI_TO_PRI_GRP_MAP_ID: 2
+                PFC_PRI: 2
+            :
+                TM_PRI_GRP_ID: 2
+
+        TM_PFC_PRI_TO_PRI_GRP_MAP:
+            ?
+                TM_PFC_PRI_TO_PRI_GRP_MAP_ID: 2
+                PFC_PRI: 3
+            :
+                TM_PRI_GRP_ID: 3
+
+        TM_PFC_PRI_TO_PRI_GRP_MAP:
+            ?
+                TM_PFC_PRI_TO_PRI_GRP_MAP_ID: 2
+                PFC_PRI: 4
+            :
+                TM_PRI_GRP_ID: 4
+
+        TM_PFC_PRI_TO_PRI_GRP_MAP:
+            ?
+                TM_PFC_PRI_TO_PRI_GRP_MAP_ID: 2
+                PFC_PRI: 6
+            :
+                TM_PRI_GRP_ID: 6
+
+        TM_PFC_PRI_PROFILE:
+            ?
+                TM_PFC_PRI_PROFILE_ID: 1
+                PFC_PRI: 3
+            :
+                PFC: 1
+                COS_LIST: [0, 0, 0, 1, 0, 0, 0, 0, 0, 0]
+
+        TM_PFC_PRI_PROFILE:
+            ?
+                TM_PFC_PRI_PROFILE_ID: 1
+                PFC_PRI: 4
+            :
+                PFC: 1
+                COS_LIST: [0, 0, 0, 0, 1, 0, 0, 0, 0, 0]
+
+        TM_PFC_PRI_PROFILE:
+            ?
+                TM_PFC_PRI_PROFILE_ID: 2
+                PFC_PRI: 2
+            :
+                PFC: 1
+                COS_LIST: [0, 0, 1, 0, 0, 0, 0, 0, 0, 0]
+
+        TM_PFC_PRI_PROFILE:
+            ?
+                TM_PFC_PRI_PROFILE_ID: 2
+                PFC_PRI: 3
+            :
+                PFC: 1
+                COS_LIST: [0, 0, 0, 1, 0, 0, 0, 0, 0, 0]
+
+        TM_PFC_PRI_PROFILE:
+            ?
+                TM_PFC_PRI_PROFILE_ID: 2
+                PFC_PRI: 4
+            :
+                PFC: 1
+                COS_LIST: [0, 0, 0, 0, 1, 0, 0, 0, 0, 0]
+
+        TM_PFC_PRI_PROFILE:
+            ?
+                TM_PFC_PRI_PROFILE_ID: 2
+                PFC_PRI: 6
+            :
+                PFC: 1
+                COS_LIST: [0, 0, 0, 0, 0, 0, 1, 0, 0, 0]
+
+        TM_ING_PORT_PRI_GRP:
+            ?
+                PORT_ID: [[1,4], [204,207]]
+                TM_PRI_GRP_ID: [3, 4]
+            :
+                PFC: 1
+                LOSSLESS: 1
+
+        TM_ING_PORT_PRI_GRP:
+            ?
+                PORT_ID: [[17,20], [34,37], [51,54], [221,224], [238,241], [255,258]]
+                TM_PRI_GRP_ID: [2, 3, 4, 6]
+            :
+                PFC: 1
+                LOSSLESS: 1
+
+        PC_PFC:
+            ?
+                PORT_ID: [[1,4], [204,207]]
+            :
+                ENABLE_RX: 1
+                ENABLE_TX: 1
+
+        PC_PFC:
+            ?
+                PORT_ID: [[17,20], [34,37], [51,54], [221,224], [238,241], [255,258]]
+            :
+                ENABLE_RX: 1
+                ENABLE_TX: 1
+...
diff --git a/device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/Nokia-IXR7220-H4-32D/port_config.ini b/device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/Nokia-IXR7220-H4-32D/port_config.ini
new file mode 100644
index 000000000..98a2de236
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/Nokia-IXR7220-H4-32D/port_config.ini
@@ -0,0 +1,34 @@
+# name          lanes                             alias               index     speed
+Ethernet0       1,2,3,4,5,6,7,8                   fourhundredGigE1/1  1         400000
+Ethernet4       9,10,11,12,13,14,15,16            fourhundredGigE1/2  2         400000
+Ethernet8       17,18,19,20,21,22,23,24           fourhundredGigE1/3  3         400000
+Ethernet12      25,26,27,28,29,30,31,32           fourhundredGigE1/4  4         400000
+Ethernet16      33,34,35,36,37,38,39,40           fourhundredGigE1/5  5         400000
+Ethernet20      41,42,43,44,45,46,47,48           fourhundredGigE1/6  6         400000
+Ethernet24      49,50,51,52,53,54,55,56           fourhundredGigE1/7  7         400000
+Ethernet28      57,58,59,60,61,62,63,64           fourhundredGigE1/8  8         400000
+Ethernet32      65,66,67,68,69,70,71,72           fourhundredGigE1/9  9         400000
+Ethernet36      73,74,75,76,77,78,79,80           fourhundredGigE1/10 10        400000
+Ethernet40      81,82,83,84,85,86,87,88           fourhundredGigE1/11 11        400000
+Ethernet44      89,90,91,92,93,94,95,96           fourhundredGigE1/12 12        400000
+Ethernet48      97,98,99,100,101,102,103,104      fourhundredGigE1/13 13        400000
+Ethernet52      105,106,107,108,109,110,111,112   fourhundredGigE1/14 14        400000
+Ethernet56      113,114,115,116,117,118,119,120   fourhundredGigE1/15 15        400000
+Ethernet60      121,122,123,124,125,126,127,128   fourhundredGigE1/16 16        400000
+Ethernet64      385,386,387,388,389,390,391,392   fourhundredGigE1/17 17        400000
+Ethernet68      393,394,395,396,397,398,399,400   fourhundredGigE1/18 18        400000
+Ethernet72      401,402,403,404,405,406,407,408   fourhundredGigE1/19 19        400000
+Ethernet76      409,410,411,412,413,414,415,416   fourhundredGigE1/20 20        400000
+Ethernet80      417,418,419,420,421,422,423,424   fourhundredGigE1/21 21        400000
+Ethernet84      425,426,427,428,429,430,431,432   fourhundredGigE1/22 22        400000
+Ethernet88      433,434,435,436,437,438,439,440   fourhundredGigE1/23 23        400000
+Ethernet92      441,442,443,444,445,446,447,448   fourhundredGigE1/24 24        400000
+Ethernet96      449,450,451,452,453,454,455,456   fourhundredGigE1/25 25        400000
+Ethernet100     457,458,459,460,461,462,463,464   fourhundredGigE1/26 26        400000
+Ethernet104     465,466,467,468,469,470,471,472   fourhundredGigE1/27 27        400000
+Ethernet108     473,474,475,476,477,478,479,480   fourhundredGigE1/28 28        400000
+Ethernet112     481,482,483,484,485,486,487,488   fourhundredGigE1/29 29        400000
+Ethernet116     489,490,491,492,493,494,495,496   fourhundredGigE1/30 30        400000
+Ethernet120     497,498,499,500,501,502,503,504   fourhundredGigE1/31 31        400000
+Ethernet124     505,506,507,508,509,510,511,512   fourhundredGigE1/32 32        400000
+Ethernet128     513                               tenGigE1/33         33        10000
diff --git a/device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/Nokia-IXR7220-H4-32D/profile.ini b/device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/Nokia-IXR7220-H4-32D/profile.ini
new file mode 100644
index 000000000..4eda67c91
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/Nokia-IXR7220-H4-32D/profile.ini
@@ -0,0 +1 @@
+switchMacAddress=XX:XX:XX:XX:XX:XX
diff --git a/device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/Nokia-IXR7220-H4-32D/sai.profile b/device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/Nokia-IXR7220-H4-32D/sai.profile
new file mode 100644
index 000000000..28f89146b
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/Nokia-IXR7220-H4-32D/sai.profile
@@ -0,0 +1 @@
+SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/ixr7220_h4_32d.bcm
diff --git a/device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/default_sku b/device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/default_sku
new file mode 100644
index 000000000..10de48e89
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/default_sku
@@ -0,0 +1 @@
+Nokia-IXR7220-H4-32D t1
diff --git a/device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/installer.conf b/device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/installer.conf
new file mode 100644
index 000000000..8b1378917
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/installer.conf
@@ -0,0 +1 @@
+
diff --git a/device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/pcie.yaml b/device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/pcie.yaml
new file mode 100644
index 000000000..408155571
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/pcie.yaml
@@ -0,0 +1,119 @@
+- bus: '00'
+  dev: '00'
+  fn: '0'
+  id: '1980'
+  name: 'Host bridge: Intel Corporation Atom Processor C3000 Series System Agent (rev
+    11)'
+- bus: '00'
+  dev: '04'
+  fn: '0'
+  id: 19a1
+  name: 'Host bridge: Intel Corporation Atom Processor C3000 Series Error Registers
+    (rev 11)'
+- bus: '00'
+  dev: '05'
+  fn: '0'
+  id: 19a2
+  name: 'Generic system peripheral [0807]: Intel Corporation Atom Processor C3000
+    Series Root Complex Event Collector (rev 11)'
+- bus: '00'
+  dev: '06'
+  fn: '0'
+  id: 19a3
+  name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series Integrated QAT
+    Root Port (rev 11)'
+- bus: '00'
+  dev: 0b
+  fn: '0'
+  id: 19a6
+  name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root
+    Port #2 (rev 11)'
+- bus: '00'
+  dev: '10'
+  fn: '0'
+  id: 19aa
+  name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root
+    Port #6 (rev 11)'
+- bus: '00'
+  dev: '11'
+  fn: '0'
+  id: 19ab
+  name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root
+    Port #7 (rev 11)'
+- bus: '00'
+  dev: '12'
+  fn: '0'
+  id: 19ac
+  name: 'System peripheral: Intel Corporation Atom Processor C3000 Series SMBus Contoller
+    - Host (rev 11)'
+- bus: '00'
+  dev: '14'
+  fn: '0'
+  id: 19c2
+  name: 'SATA controller: Intel Corporation Atom Processor C3000 Series SATA Controller
+    1 (rev 11)'
+- bus: '00'
+  dev: '15'
+  fn: '0'
+  id: 19d0
+  name: 'USB controller: Intel Corporation Atom Processor C3000 Series USB 3.0 xHCI
+    Controller (rev 11)'
+- bus: '00'
+  dev: '18'
+  fn: '0'
+  id: 19d3
+  name: 'Communication controller: Intel Corporation Atom Processor C3000 Series ME
+    HECI 1 (rev 11)'
+- bus: '00'
+  dev: 1c
+  fn: '0'
+  id: 19db
+  name: 'SD Host controller: Intel Corporation Device 19db (rev 11)'
+- bus: '00'
+  dev: 1f
+  fn: '0'
+  id: 19dc
+  name: 'ISA bridge: Intel Corporation Atom Processor C3000 Series LPC or eSPI (rev
+    11)'
+- bus: '00'
+  dev: 1f
+  fn: '2'
+  id: 19de
+  name: 'Memory controller: Intel Corporation Atom Processor C3000 Series Power Management
+    Controller (rev 11)'
+- bus: '00'
+  dev: 1f
+  fn: '4'
+  id: 19df
+  name: 'SMBus: Intel Corporation Atom Processor C3000 Series SMBus controller (rev
+    11)'
+- bus: '00'
+  dev: 1f
+  fn: '5'
+  id: 19e0
+  name: 'Serial bus controller: Intel Corporation Atom Processor C3000 Series SPI
+    Controller (rev 11)'
+- bus: '01'
+  dev: '00'
+  fn: '0'
+  id: 19e2
+  name: 'Co-processor: Intel Corporation Atom Processor C3000 Series QuickAssist Technology
+    (rev 11)'
+- bus: '02'
+  dev: '00'
+  fn: '0'
+  id: b993
+  name: 'Ethernet controller: Broadcom Inc. and subsidiaries BCM56993 Switch ASIC
+    [Tomahawk4] (rev 11)'
+- bus: '03'
+  dev: '00'
+  fn: '0'
+  id: 9c1d
+  name: 'Unassigned class [ff00]: Lattice Semiconductor Corporation Device 9c1d (rev
+    01)'
+- bus: '04'
+  dev: '00'
+  fn: '0'
+  id: '1533'
+  name: 'Ethernet controller: Intel Corporation I210 Gigabit Network Connection (rev
+    02)'
diff --git a/device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/platform.json b/device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/platform.json
new file mode 100644
index 000000000..915b83c2e
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/platform.json
@@ -0,0 +1,440 @@
+{
+    "chassis": {
+        "name": "7220 IXR-H4-32D",
+        "components": [
+            {
+                "name": "CPUPLD"
+            },
+            {
+                "name": "SysFPGA"
+            },
+            {
+                "name": "SWPLD2"
+            },
+            {
+                "name": "SWPLD3"
+            }
+        ],
+        "fans": [
+            {
+                "name": "Fan1",
+                "status_led": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "Fan2",
+                "status_led": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "Fan3",
+                "status_led": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "Fan4",
+                "status_led": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "Fan5",
+                "status_led": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "Fan6",
+                "status_led": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "Fan7",
+                "status_led": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "Fan8",
+                "status_led": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "Fan9",
+                "status_led": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "Fan10",
+                "status_led": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "Fan11",
+                "status_led": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "Fan12",
+                "status_led": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "Fan13",
+                "status_led": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "Fan14",
+                "status_led": {
+                    "controllable": false
+                }
+            }
+        ],
+        "fan_drawers": [
+            {
+                "name": "drawer1",
+                "status_led": {
+                    "controllable": false
+                },
+                "max_consumed_power": false,
+                "fans": [
+                    {
+                        "name": "Fan1",
+                        "status_led": {
+                            "controllable": false
+                        }
+                    },
+                    {
+                        "name": "Fan2",
+                        "status_led": {
+                            "controllable": false
+                        }
+                    }
+                ]
+            },
+            {
+                "name": "drawer2",
+                "status_led": {
+                    "controllable": false
+                },
+                "max_consumed_power": false,
+                "fans": [
+                    {
+                        "name": "Fan3",
+                        "status_led": {
+                            "controllable": false
+                        }
+                    },
+                    {
+                        "name": "Fan4",
+                        "status_led": {
+                            "controllable": false
+                        }
+                    }
+                ]
+            },
+            {
+                "name": "drawer3",
+                "status_led": {
+                    "controllable": false
+                },
+                "max_consumed_power": false,
+                "fans": [
+                    {
+                        "name": "Fan5",
+                        "status_led": {
+                            "controllable": false
+                        }
+                    },
+                    {
+                        "name": "Fan6",
+                        "status_led": {
+                            "controllable": false
+                        }
+                    }
+                ]
+            },
+            {
+                "name": "drawer4",
+                "status_led": {
+                    "controllable": false
+                },
+                "max_consumed_power": false,
+                "fans": [
+                    {
+                        "name": "Fan7",
+                        "status_led": {
+                            "controllable": false
+                        }
+                    },
+                    {
+                        "name": "Fan8",
+                        "status_led": {
+                            "controllable": false
+                        }
+                    }
+                ]
+            },
+            {
+                "name": "drawer5",
+                "status_led": {
+                    "controllable": false
+                },
+                "max_consumed_power": false,
+                "fans": [
+                    {
+                        "name": "Fan9",
+                        "status_led": {
+                            "controllable": false
+                        }
+                    },
+                    {
+                        "name": "Fan10",
+                        "status_led": {
+                            "controllable": false
+                        }
+                    }
+                ]
+            },
+            {
+                "name": "drawer6",
+                "status_led": {
+                    "controllable": false
+                },
+                "max_consumed_power": false,
+                "fans": [
+                    {
+                        "name": "Fan11",
+                        "status_led": {
+                            "controllable": false
+                        }
+                    },
+                    {
+                        "name": "Fan12",
+                        "status_led": {
+                            "controllable": false
+                        }
+                    }
+                ]
+            },
+            {
+                "name": "drawer7",
+                "status_led": {
+                    "controllable": false
+                },
+                "max_consumed_power": false,
+                "fans": [
+                    {
+                        "name": "Fan13",
+                        "status_led": {
+                            "controllable": false
+                        }
+                    },
+                    {
+                        "name": "Fan14",
+                        "status_led": {
+                            "controllable": false
+                        }
+                    }
+                ]
+            }
+        ],
+        "psus": [
+            {
+                "name": "PSU1",
+                "status_led": {
+                    "controllable": false
+                },
+                "current": true,
+                "power": true,
+                "max_power": false,
+                "voltage_high_threshold": false,
+                "voltage_low_threshold": false,
+                "temperature": false
+            },
+            {
+                "name": "PSU2",
+                "status_led": {
+                    "controllable": false
+                },
+                "current": true,
+                "power": true,
+                "max_power": false,
+                "voltage_high_threshold": false,
+                "voltage_low_threshold": false,
+                "temperature": false
+            }
+        ],
+        "thermals": [
+            {
+                "name": "CPU Board",
+                "controllable": false,
+                "low-threshold": false,
+                "high-threshold": true,
+                "low-crit-threshold": false,
+                "high-crit-threshold": true
+            },
+            {
+                "name": "Fan Board",
+                "controllable": false,
+                "low-threshold": false,
+                "high-threshold": true,
+                "low-crit-threshold": false,
+                "high-crit-threshold": true
+            },
+            {
+                "name": "MAC Right",
+                "controllable": false,
+                "low-threshold": false,
+                "high-threshold": true,
+                "low-crit-threshold": false,
+                "high-crit-threshold": true
+            },
+            {
+                "name": "MAC Left1",
+                "controllable": false,
+                "low-threshold": false,
+                "high-threshold": true,
+                "low-crit-threshold": false,
+                "high-crit-threshold": true
+            },
+            {
+                "name": "MAC Left2",
+                "controllable": false,
+                "low-threshold": false,
+                "high-threshold": true,
+                "low-crit-threshold": false,
+                "high-crit-threshold": true
+            },
+            {
+                "name": "Mac Front",
+                "controllable": false,
+                "low-threshold": false,
+                "high-threshold": true,
+                "low-crit-threshold": false,
+                "high-crit-threshold": true
+            },
+            {
+                "name": "ASIC TH4",
+                "controllable": false,
+                "low-threshold": false,
+                "high-threshold": true,
+                "low-crit-threshold": false,
+                "high-crit-threshold": true
+            }
+        ],
+        "sfps": [
+            {
+                "name": "QSFPDD_1"
+            },
+            {
+                "name": "QSFPDD_2"
+            },
+            {
+                "name": "QSFPDD_3"
+            },
+            {
+                "name": "QSFPDD_4"
+            },
+            {
+                "name": "QSFPDD_5"
+            },
+            {
+                "name": "QSFPDD_6"
+            },
+            {
+                "name": "QSFPDD_7"
+            },
+            {
+                "name": "QSFPDD_8"
+            },
+            {
+                "name": "QSFPDD_9"
+            },
+            {
+                "name": "QSFPDD_10"
+            },
+            {
+                "name": "QSFPDD_11"
+            },
+            {
+                "name": "QSFPDD_12"
+            },
+            {
+                "name": "QSFPDD_13"
+            },
+            {
+                "name": "QSFPDD_14"
+            },
+            {
+                "name": "QSFPDD_15"
+            },
+            {
+                "name": "QSFPDD_16"
+            },
+            {
+                "name": "QSFPDD_17"
+            },
+            {
+                "name": "QSFPDD_18"
+            },
+            {
+                "name": "QSFPDD_19"
+            },
+            {
+                "name": "QSFPDD_20"
+            },
+            {
+                "name": "QSFPDD_21"
+            },
+            {
+                "name": "QSFPDD_22"
+            },
+            {
+                "name": "QSFPDD_23"
+            },
+            {
+                "name": "QSFPDD_24"
+            },
+            {
+                "name": "QSFPDD_25"
+            },
+            {
+                "name": "QSFPDD_26"
+            },
+            {
+                "name": "QSFPDD_27"
+            },
+            {
+                "name": "QSFPDD_28"
+            },
+            {
+                "name": "QSFPDD_29"
+            },
+            {
+                "name": "QSFPDD_30"
+            },
+            {
+                "name": "QSFPDD_31"
+            },
+            {
+                "name": "QSFPDD_32"
+            },
+            {
+                "name": "SFP+_1"
+            }
+       	]
+    },
+    "interfaces": {}
+}
diff --git a/device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/platform_asic b/device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/platform_asic
new file mode 100644
index 000000000..960467652
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/platform_asic
@@ -0,0 +1 @@
+broadcom
diff --git a/device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/plugins/eeprom.py b/device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/plugins/eeprom.py
new file mode 100644
index 000000000..1adc2802a
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/plugins/eeprom.py
@@ -0,0 +1,16 @@
+try:
+    import os
+    from sonic_eeprom import eeprom_tlvinfo
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+
+class board(eeprom_tlvinfo.TlvInfoDecoder):
+
+    def __init__(self, name, path, cpld_root, ro):
+        self.eeprom_path = "/sys/class/i2c-adapter/i2c-1/1-0053/eeprom"
+        if not os.path.exists(self.eeprom_path):
+            file = "/sys/class/i2c-adapter/i2c-1/new_device"
+            with open(file, 'w') as f:
+                f.write('24c02 0x53\n')
+        super(board, self).__init__(self.eeprom_path, 0, '', True)
diff --git a/device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/plugins/led_control.py b/device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/plugins/led_control.py
new file mode 100644
index 000000000..88acf9f11
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/plugins/led_control.py
@@ -0,0 +1,125 @@
+#
+# led_control.py
+#
+# Platform-specific LED control functionality for SONiC
+#
+
+try:
+    from sonic_led.led_control_base import LedControlBase
+    import os
+    import time
+    import syslog
+    import struct
+    from mmap import *
+    import sonic_platform.platform
+    import sonic_platform.chassis
+except ImportError as e:
+    raise ImportError(str(e) + " - required module not found")
+
+H4_32D_FAN_DRAWERS = 7
+H4_32D_FANS_PER_DRAWER = 2
+RESOURCE = "/sys/bus/pci/devices/0000:03:00.0/resource0"
+REG_FRONT_SYSLED = 0x0084
+REG_FRONT_FANLED = 0x0088
+
+def DBG_PRINT(str):
+    syslog.openlog("nokia-led")
+    syslog.syslog(syslog.LOG_INFO, str)
+    syslog.closelog()
+
+
+class LedControl(LedControlBase):
+    """Platform specific LED control class"""
+
+    # Constructor
+    def __init__(self):
+        self.chassis = sonic_platform.platform.Platform().get_chassis()
+        self._initDefaultConfig()
+
+    def _initDefaultConfig(self):
+        # The fan tray leds and system led managed by new chassis class API
+        # leaving only a couple other front panel leds to be done old style
+        DBG_PRINT("starting system leds")
+        self._initSystemLed()
+        DBG_PRINT(" led done")
+
+    def _read_sysfs_file(self, sysfs_file):
+        # On successful read, returns the value read from given
+        # reg_name and on failure returns 'ERR'
+        rv = 'ERR'
+
+        if (not os.path.isfile(sysfs_file)):
+            return rv
+        try:
+            with open(sysfs_file, 'r') as fd:
+                rv = fd.read()
+        except Exception as e:
+            rv = 'ERR'
+
+        rv = rv.rstrip('\r\n')
+        rv = rv.lstrip(" ")
+        return rv
+
+    def _write_sysfs_file(self, sysfs_file, value):
+        # On successful write, the value read will be written on
+        # reg_name and on failure returns 'ERR'
+        rv = 'ERR'
+
+        if (not os.path.isfile(sysfs_file)):
+            return rv
+        try:
+            with open(sysfs_file, 'w') as fd:
+                rv = fd.write(str(value))
+        except Exception as e:
+            rv = 'ERR'
+
+        return rv
+    
+    def _pci_set_value(self, resource, data, offset):
+        fd = open(resource, O_RDWR)
+        mm = mmap(fd, 0)
+        mm.seek(offset)
+        mm.write(struct.pack('I', data))
+        mm.close()
+        close(fd)
+
+    def _pci_get_value(self, resource, offset):
+        fd = open(resource, O_RDWR)
+        mm = mmap(fd, 0)
+        mm.seek(offset)
+        read_data_stream = mm.read(4)
+        reg_val = struct.unpack('I', read_data_stream)
+        mm.close()
+        close(fd)
+        return reg_val
+    
+    def _initSystemLed(self):
+        # Front Panel System LEDs setting
+        oldfan = 0xf    # 0=amber, 1=green
+        oldpsu = 0xf    # 0=amber, 1=green
+
+        # Write sys led
+        self._pci_set_value(RESOURCE, 1, REG_FRONT_SYSLED)
+        
+        # Timer loop to monitor and set front panel Status, Fan, and PSU LEDs
+        while True:
+            # Front Panel FAN Panel LED setting
+            good_fan = 0
+            for fan in self.chassis._fan_list:
+                if fan.get_status() == True:
+                    good_fan = good_fan + 1
+            
+            if (good_fan == H4_32D_FAN_DRAWERS * H4_32D_FANS_PER_DRAWER):                
+                if oldfan != 0x1:
+                    self._pci_set_value(RESOURCE, 1, REG_FRONT_FANLED)
+                    oldfan = 0x1
+                
+            else:                
+                if oldfan != 0x0:
+                    self._pci_set_value(RESOURCE, 0, REG_FRONT_FANLED)
+                    oldfan = 0x0
+                
+
+            
+            time.sleep(6)
+
diff --git a/device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/system_health_monitoring_config.json b/device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/system_health_monitoring_config.json
new file mode 100644
index 000000000..d5f3a7b98
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/system_health_monitoring_config.json
@@ -0,0 +1,14 @@
+{
+    "services_to_ignore": [],
+    "devices_to_ignore": [
+        "asic",
+        "psu.temperature"
+    ],
+    "user_defined_checkers": [],
+    "polling_interval": 60,
+    "led_color": {
+        "fault": "amber",
+        "normal": "green",
+        "booting": "blinking green"
+    }
+}
diff --git a/device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/thermal_policy.json b/device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/thermal_policy.json
new file mode 100644
index 000000000..667d82dac
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h4_32d-r0/thermal_policy.json
@@ -0,0 +1,67 @@
+{   
+    "thermal_control_algorithm": {
+        "run_at_boot_up": "false",
+        "fan_speed_when_suspend": "65"
+    },
+    "info_types": [
+        {
+            "type": "fan_info"
+        },
+        {
+            "type": "thermal_info"
+        },
+        {
+            "type": "chassis_info"
+        }
+    ],
+    "policies": [
+        {
+            "name": "any fan absence",
+            "conditions": [
+                {
+                    "type": "fan.any.absence"
+                }
+            ],
+            "actions": [
+                {
+                    "type": "thermal_control.control",
+                    "status": "false"
+                },
+                {
+                    "type": "fan.all.set_speed",
+                    "speed": "100"
+                }
+            ]
+        },
+        {
+            "name": "all fan presence",
+            "conditions": [
+                {
+                    "type": "fan.all.presence"
+                }
+            ],
+            "actions": [
+                {
+                    "type": "thermal.temp_check_and_set_all_fan_speed",
+                    "default_speed": "40",
+                    "threshold1_speed": "55",
+                    "threshold2_speed": "80",
+                    "hightemp_speed": "100"
+                }
+            ]
+        },
+	{
+            "name": "temp over high critical threshold",
+            "conditions": [
+                {
+                    "type": "thermal.over.high_critical_threshold"
+                }
+            ],
+            "actions": [
+                {
+                    "type": "switch.shutdown"
+                }
+            ]
+        }
+    ]
+}
diff --git a/device/nokia/x86_64-nokia_ixr7220_h5_64d-r0/Nokia-IXR7220-H5-64D/h5_64Dx400g.yml b/device/nokia/x86_64-nokia_ixr7220_h5_64d-r0/Nokia-IXR7220-H5-64D/h5_64Dx400g.yml
new file mode 100644
index 000000000..a3efe8918
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h5_64d-r0/Nokia-IXR7220-H5-64D/h5_64Dx400g.yml
@@ -0,0 +1,1121 @@
+#
+# $Copyright: (c) 2022-2023 Delta Electronics, INC.
+# Delta Electronics, INC. Proprietary and Confidential. All rights reserved.
+#
+
+---
+device:
+    0:
+        PC_PM_CORE:
+            ?
+                PC_PM_ID: 1
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x35712460
+                TX_LANE_MAP: 0x34702561
+                RX_POLARITY_FLIP: 0x30
+                TX_POLARITY_FLIP: 0x2E
+            ?
+                PC_PM_ID: 3
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x17530642
+                TX_LANE_MAP: 0x35712460
+                RX_POLARITY_FLIP: 0xC2
+                TX_POLARITY_FLIP: 0x6A
+            ?
+                PC_PM_ID: 4
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x17530642
+                TX_LANE_MAP: 0x35712460
+                RX_POLARITY_FLIP: 0x9A
+                TX_POLARITY_FLIP: 0x3F
+            ?
+                PC_PM_ID: 2
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x17530642
+                TX_LANE_MAP: 0x16520743
+                RX_POLARITY_FLIP: 0x9A
+                TX_POLARITY_FLIP: 0xDE
+            ?
+                PC_PM_ID: 5
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x10762435
+                TX_LANE_MAP: 0x04153627
+                RX_POLARITY_FLIP: 0xCD
+                TX_POLARITY_FLIP: 0x2D
+            ?
+                PC_PM_ID: 7
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x02763415
+                TX_LANE_MAP: 0x35061427
+                RX_POLARITY_FLIP: 0x27
+                TX_POLARITY_FLIP: 0x6C
+            ?
+                PC_PM_ID: 8
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x02763415
+                TX_LANE_MAP: 0x35061427
+                RX_POLARITY_FLIP: 0xD8
+                TX_POLARITY_FLIP: 0x93
+            ?
+                PC_PM_ID: 6
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x02763415
+                TX_LANE_MAP: 0x62517043
+                RX_POLARITY_FLIP: 0xD8
+                TX_POLARITY_FLIP: 0xCD
+            ?
+                PC_PM_ID: 9
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x67205143
+                TX_LANE_MAP: 0x34071526
+                RX_POLARITY_FLIP: 0x4E
+                TX_POLARITY_FLIP: 0x6C
+            ?
+                PC_PM_ID: 11
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x02763415
+                TX_LANE_MAP: 0x35061427
+                RX_POLARITY_FLIP: 0x27
+                TX_POLARITY_FLIP: 0x6C
+            ?
+                PC_PM_ID: 12
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x02763415
+                TX_LANE_MAP: 0x35061427
+                RX_POLARITY_FLIP: 0xD8
+                TX_POLARITY_FLIP: 0x93
+            ?
+                PC_PM_ID: 10
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x02763415
+                TX_LANE_MAP: 0x62517043
+                RX_POLARITY_FLIP: 0xD8
+                TX_POLARITY_FLIP: 0xC9
+            ?
+                PC_PM_ID: 13
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x67205143
+                TX_LANE_MAP: 0x34071526
+                RX_POLARITY_FLIP: 0x4E
+                TX_POLARITY_FLIP: 0x6C
+            ?
+                PC_PM_ID: 15
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x02763415
+                TX_LANE_MAP: 0x35061427
+                RX_POLARITY_FLIP: 0x27
+                TX_POLARITY_FLIP: 0x6C
+            ?
+                PC_PM_ID: 16
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x02763415
+                TX_LANE_MAP: 0x35061427
+                RX_POLARITY_FLIP: 0xD8
+                TX_POLARITY_FLIP: 0x93
+            ?
+                PC_PM_ID: 14
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x02763415
+                TX_LANE_MAP: 0x62517043
+                RX_POLARITY_FLIP: 0xD8
+                TX_POLARITY_FLIP: 0xC9
+            ?
+                PC_PM_ID: 17
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x31670524
+                TX_LANE_MAP: 0x70634251
+                RX_POLARITY_FLIP: 0xDB
+                TX_POLARITY_FLIP: 0xD3
+            ?
+                PC_PM_ID: 19
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x76134250
+                TX_LANE_MAP: 0x72614053
+                RX_POLARITY_FLIP: 0xBD
+                TX_POLARITY_FLIP: 0x97
+            ?
+                PC_PM_ID: 20
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x76134250
+                TX_LANE_MAP: 0x72614053
+                RX_POLARITY_FLIP: 0x42
+                TX_POLARITY_FLIP: 0x68
+            ?
+                PC_PM_ID: 18
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x76134250
+                TX_LANE_MAP: 0x15243607
+                RX_POLARITY_FLIP: 0x42
+                TX_POLARITY_FLIP: 0x34
+            ?
+                PC_PM_ID: 21
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x31670524
+                TX_LANE_MAP: 0x70634251
+                RX_POLARITY_FLIP: 0xDB
+                TX_POLARITY_FLIP: 0xD3
+            ?
+                PC_PM_ID: 23
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x76134250
+                TX_LANE_MAP: 0x72614053
+                RX_POLARITY_FLIP: 0xBD
+                TX_POLARITY_FLIP: 0x97
+            ?
+                PC_PM_ID: 24
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x76134250
+                TX_LANE_MAP: 0x72614053
+                RX_POLARITY_FLIP: 0x42
+                TX_POLARITY_FLIP: 0x68
+            ?
+                PC_PM_ID: 22
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x76134250
+                TX_LANE_MAP: 0x15243607
+                RX_POLARITY_FLIP: 0x42
+                TX_POLARITY_FLIP: 0x34
+            ?
+                PC_PM_ID: 25
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x31670524
+                TX_LANE_MAP: 0x70634251
+                RX_POLARITY_FLIP: 0xDB
+                TX_POLARITY_FLIP: 0xD3
+            ?
+                PC_PM_ID: 27
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x76134250
+                TX_LANE_MAP: 0x72614053
+                RX_POLARITY_FLIP: 0xBD
+                TX_POLARITY_FLIP: 0x93
+            ?
+                PC_PM_ID: 28
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x20461537
+                TX_LANE_MAP: 0x51627340
+                RX_POLARITY_FLIP: 0x24
+                TX_POLARITY_FLIP: 0xC5
+            ?
+                PC_PM_ID: 26
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x76134250
+                TX_LANE_MAP: 0x15243607
+                RX_POLARITY_FLIP: 0x42
+                TX_POLARITY_FLIP: 0x34
+            ?
+                PC_PM_ID: 30
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x53174206
+                TX_LANE_MAP: 0x52164307
+                RX_POLARITY_FLIP: 0x3F
+                TX_POLARITY_FLIP: 0x74
+            ?
+                PC_PM_ID: 32
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x71356024
+                TX_LANE_MAP: 0x53174206
+                RX_POLARITY_FLIP: 0xCF
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 31
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x71356024
+                TX_LANE_MAP: 0x53174206
+                RX_POLARITY_FLIP: 0xCA
+                TX_POLARITY_FLIP: 0x3F
+            ?
+                PC_PM_ID: 29
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x71356024
+                TX_LANE_MAP: 0x70346125
+                RX_POLARITY_FLIP: 0xCA
+                TX_POLARITY_FLIP: 0xDE
+            ?
+                PC_PM_ID: 35
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x71356024
+                TX_LANE_MAP: 0x70346125
+                RX_POLARITY_FLIP: 0x30
+                TX_POLARITY_FLIP: 0xD1
+            ?
+                PC_PM_ID: 33
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x71356024
+                TX_LANE_MAP: 0x53174206
+                RX_POLARITY_FLIP: 0x30
+                TX_POLARITY_FLIP: 0x9A
+            ?
+                PC_PM_ID: 34
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x71356024
+                TX_LANE_MAP: 0x53174206
+                RX_POLARITY_FLIP: 0x35
+                TX_POLARITY_FLIP: 0xC0
+            ?
+                PC_PM_ID: 36
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x53174206
+                TX_LANE_MAP: 0x52164307
+                RX_POLARITY_FLIP: 0xCA
+                TX_POLARITY_FLIP: 0x84
+            ?
+                PC_PM_ID: 40
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x76134250
+                TX_LANE_MAP: 0x15243607
+                RX_POLARITY_FLIP: 0x42
+                TX_POLARITY_FLIP: 0x34
+            ?
+                PC_PM_ID: 38
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x76134250
+                TX_LANE_MAP: 0x72614053
+                RX_POLARITY_FLIP: 0x42
+                TX_POLARITY_FLIP: 0x6C
+            ?
+                PC_PM_ID: 37
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x20461537
+                TX_LANE_MAP: 0x51627340
+                RX_POLARITY_FLIP: 0xDB
+                TX_POLARITY_FLIP: 0x3A
+            ?
+                PC_PM_ID: 39
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x31670524
+                TX_LANE_MAP: 0x70634251
+                RX_POLARITY_FLIP: 0xDB
+                TX_POLARITY_FLIP: 0xD3
+            ?
+                PC_PM_ID: 44
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x76134250
+                TX_LANE_MAP: 0x15243607
+                RX_POLARITY_FLIP: 0x42
+                TX_POLARITY_FLIP: 0x34
+            ?
+                PC_PM_ID: 42
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x76134250
+                TX_LANE_MAP: 0x72614053
+                RX_POLARITY_FLIP: 0x42
+                TX_POLARITY_FLIP: 0x68
+            ?
+                PC_PM_ID: 41
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x76134250
+                TX_LANE_MAP: 0x72614053
+                RX_POLARITY_FLIP: 0xBD
+                TX_POLARITY_FLIP: 0x97
+            ?
+                PC_PM_ID: 43
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x31670524
+                TX_LANE_MAP: 0x70634251
+                RX_POLARITY_FLIP: 0xDB
+                TX_POLARITY_FLIP: 0xD3
+            ?
+                PC_PM_ID: 48
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x76134250
+                TX_LANE_MAP: 0x15243607
+                RX_POLARITY_FLIP: 0x42
+                TX_POLARITY_FLIP: 0x34
+            ?
+                PC_PM_ID: 46
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x76134250
+                TX_LANE_MAP: 0x72614053
+                RX_POLARITY_FLIP: 0x42
+                TX_POLARITY_FLIP: 0x68
+            ?
+                PC_PM_ID: 45
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x76134250
+                TX_LANE_MAP: 0x72614053
+                RX_POLARITY_FLIP: 0xBD
+                TX_POLARITY_FLIP: 0x97
+            ?
+                PC_PM_ID: 47
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x31670524
+                TX_LANE_MAP: 0x70634251
+                RX_POLARITY_FLIP: 0xDB
+                TX_POLARITY_FLIP: 0xD3
+            ?
+                PC_PM_ID: 52
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x02763415
+                TX_LANE_MAP: 0x62517043
+                RX_POLARITY_FLIP: 0xD8
+                TX_POLARITY_FLIP: 0xC9
+            ?
+                PC_PM_ID: 50
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x02763415
+                TX_LANE_MAP: 0x35061427
+                RX_POLARITY_FLIP: 0xD8
+                TX_POLARITY_FLIP: 0x93
+            ?
+                PC_PM_ID: 49
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x02763415
+                TX_LANE_MAP: 0x35061427
+                RX_POLARITY_FLIP: 0x27
+                TX_POLARITY_FLIP: 0x6C
+            ?
+                PC_PM_ID: 51
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x67205143
+                TX_LANE_MAP: 0x34071526
+                RX_POLARITY_FLIP: 0x4E
+                TX_POLARITY_FLIP: 0x6C
+            ?
+                PC_PM_ID: 56
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x02763415
+                TX_LANE_MAP: 0x62517043
+                RX_POLARITY_FLIP: 0xD8
+                TX_POLARITY_FLIP: 0xC9
+            ?
+                PC_PM_ID: 54
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x02763415
+                TX_LANE_MAP: 0x35061427
+                RX_POLARITY_FLIP: 0xD8
+                TX_POLARITY_FLIP: 0x93
+            ?
+                PC_PM_ID: 53
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x02763415
+                TX_LANE_MAP: 0x35061427
+                RX_POLARITY_FLIP: 0x27
+                TX_POLARITY_FLIP: 0x6C
+            ?
+                PC_PM_ID: 55
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x67205143
+                TX_LANE_MAP: 0x34071526
+                RX_POLARITY_FLIP: 0x4E
+                TX_POLARITY_FLIP: 0x6C
+            ?
+                PC_PM_ID: 60
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x67015342
+                TX_LANE_MAP: 0x72635140
+                RX_POLARITY_FLIP: 0xC4
+                TX_POLARITY_FLIP: 0x4B
+            ?
+                PC_PM_ID: 58
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x02763415
+                TX_LANE_MAP: 0x35061427
+                RX_POLARITY_FLIP: 0xD8
+                TX_POLARITY_FLIP: 0x93
+            ?
+                PC_PM_ID: 57
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x02763415
+                TX_LANE_MAP: 0x35061427
+                RX_POLARITY_FLIP: 0x27
+                TX_POLARITY_FLIP: 0x6C
+            ?
+                PC_PM_ID: 59
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x67205143
+                TX_LANE_MAP: 0x34071526
+                RX_POLARITY_FLIP: 0x4E
+                TX_POLARITY_FLIP: 0x4C
+            ?
+                PC_PM_ID: 64
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x17530642
+                TX_LANE_MAP: 0x16520743
+                RX_POLARITY_FLIP: 0x3F
+                TX_POLARITY_FLIP: 0x8B
+            ?
+                PC_PM_ID: 62
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x17530642
+                TX_LANE_MAP: 0x35712460
+                RX_POLARITY_FLIP: 0x3D
+                TX_POLARITY_FLIP: 0x95
+            ?
+                PC_PM_ID: 61
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x17530642
+                TX_LANE_MAP: 0x35712460
+                RX_POLARITY_FLIP: 0x65
+                TX_POLARITY_FLIP: 0xC0
+            ?
+                PC_PM_ID: 63
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x35712460
+                TX_LANE_MAP: 0x34702561
+                RX_POLARITY_FLIP: 0x6A
+                TX_POLARITY_FLIP: 0x84
+...
+---
+device:
+    0:
+        PC_PORT_PHYS_MAP:
+            ?
+                # CPU port
+                PORT_ID: 0
+            :
+                PC_PHYS_PORT_ID: 0
+            ?
+                PORT_ID: 1
+            :
+                PC_PHYS_PORT_ID: 1
+            ?
+                PORT_ID: 2
+            :
+                PC_PHYS_PORT_ID: 9
+            ?
+                PORT_ID: 11
+            :
+                PC_PHYS_PORT_ID: 17
+            ?
+                PORT_ID: 12
+            :
+                PC_PHYS_PORT_ID: 25
+            ?
+                PORT_ID: 22
+            :
+                PC_PHYS_PORT_ID: 33
+            ?
+                PORT_ID: 23
+            :
+                PC_PHYS_PORT_ID: 41
+            ?
+                PORT_ID: 33
+            :
+                PC_PHYS_PORT_ID: 49
+            ?
+                PORT_ID: 34
+            :
+                PC_PHYS_PORT_ID: 57
+            ?
+                PORT_ID: 44
+            :
+                PC_PHYS_PORT_ID: 65
+            ?
+                PORT_ID: 45
+            :
+                PC_PHYS_PORT_ID: 73
+            ?
+                PORT_ID: 55
+            :
+                PC_PHYS_PORT_ID: 81
+            ?
+                PORT_ID: 56
+            :
+                PC_PHYS_PORT_ID: 89
+            ?
+                PORT_ID: 66
+            :
+                PC_PHYS_PORT_ID: 97
+            ?
+                PORT_ID: 67
+            :
+                PC_PHYS_PORT_ID: 105
+            ?
+                PORT_ID: 77
+            :
+                PC_PHYS_PORT_ID: 113
+            ?
+                PORT_ID: 78
+            :
+                PC_PHYS_PORT_ID: 121
+            ?
+                PORT_ID: 88
+            :
+                PC_PHYS_PORT_ID: 129
+            ?
+                PORT_ID: 89
+            :
+                PC_PHYS_PORT_ID: 137
+            ?
+                PORT_ID: 99
+            :
+                PC_PHYS_PORT_ID: 145
+            ?
+                PORT_ID: 100
+            :
+                PC_PHYS_PORT_ID: 153
+            ?
+                PORT_ID: 110
+            :
+                PC_PHYS_PORT_ID: 161
+            ?
+                PORT_ID: 111
+            :
+                PC_PHYS_PORT_ID: 169
+            ?
+                PORT_ID: 121
+            :
+                PC_PHYS_PORT_ID: 177
+            ?
+                PORT_ID: 122
+            :
+                PC_PHYS_PORT_ID: 185
+            ?
+                PORT_ID: 132
+            :
+                PC_PHYS_PORT_ID: 193
+            ?
+                PORT_ID: 133
+            :
+                PC_PHYS_PORT_ID: 201
+            ?
+                PORT_ID: 143
+            :
+                PC_PHYS_PORT_ID: 209
+            ?
+                PORT_ID: 144
+            :
+                PC_PHYS_PORT_ID: 217
+            ?
+                PORT_ID: 154
+            :
+                PC_PHYS_PORT_ID: 225
+            ?
+                PORT_ID: 155
+            :
+                PC_PHYS_PORT_ID: 233
+            ?
+                PORT_ID: 165
+            :
+                PC_PHYS_PORT_ID: 241
+            ?
+                PORT_ID: 166
+            :
+                PC_PHYS_PORT_ID: 249
+            ?
+                PORT_ID: 176
+            :
+                PC_PHYS_PORT_ID: 257
+            ?
+                PORT_ID: 177
+            :
+                PC_PHYS_PORT_ID: 265
+            ?
+                PORT_ID: 187
+            :
+                PC_PHYS_PORT_ID: 273
+            ?
+                PORT_ID: 188
+            :
+                PC_PHYS_PORT_ID: 281
+            ?
+                PORT_ID: 198
+            :
+                PC_PHYS_PORT_ID: 289
+            ?
+                PORT_ID: 199
+            :
+                PC_PHYS_PORT_ID: 297
+            ?
+                PORT_ID: 209
+            :
+                PC_PHYS_PORT_ID: 305
+            ?
+                PORT_ID: 210
+            :
+                PC_PHYS_PORT_ID: 313
+            ?
+                PORT_ID: 220
+            :
+                PC_PHYS_PORT_ID: 321
+            ?
+                PORT_ID: 221
+            :
+                PC_PHYS_PORT_ID: 329
+            ?
+                PORT_ID: 231
+            :
+                PC_PHYS_PORT_ID: 337
+            ?
+                PORT_ID: 232
+            :
+                PC_PHYS_PORT_ID: 345
+            ?
+                PORT_ID: 242
+            :
+                PC_PHYS_PORT_ID: 353
+            ?
+                PORT_ID: 243
+            :
+                PC_PHYS_PORT_ID: 361
+            ?
+                PORT_ID: 253
+            :
+                PC_PHYS_PORT_ID: 369
+            ?
+                PORT_ID: 254
+            :
+                PC_PHYS_PORT_ID: 377
+            ?
+                PORT_ID: 264
+            :
+                PC_PHYS_PORT_ID: 385
+            ?
+                PORT_ID: 265
+            :
+                PC_PHYS_PORT_ID: 393
+            ?
+                PORT_ID: 275
+            :
+                PC_PHYS_PORT_ID: 401
+            ?
+                PORT_ID: 276
+            :
+                PC_PHYS_PORT_ID: 409
+            ?
+                PORT_ID: 286
+            :
+                PC_PHYS_PORT_ID: 417
+            ?
+                PORT_ID: 287
+            :
+                PC_PHYS_PORT_ID: 425
+            ?
+                PORT_ID: 297
+            :
+                PC_PHYS_PORT_ID: 433
+            ?
+                PORT_ID: 298
+            :
+                PC_PHYS_PORT_ID: 441
+            ?
+                PORT_ID: 308
+            :
+                PC_PHYS_PORT_ID: 449
+            ?
+                PORT_ID: 309
+            :
+                PC_PHYS_PORT_ID: 457
+            ?
+                PORT_ID: 319
+            :
+                PC_PHYS_PORT_ID: 465
+            ?
+                PORT_ID: 320
+            :
+                PC_PHYS_PORT_ID: 473
+            ?
+                PORT_ID: 330
+            :
+                PC_PHYS_PORT_ID: 481
+            ?
+                PORT_ID: 331
+            :
+                PC_PHYS_PORT_ID: 489
+            ?
+                PORT_ID: 341
+            :
+                PC_PHYS_PORT_ID: 497
+            ?
+                PORT_ID: 342
+            :
+                PC_PHYS_PORT_ID: 505
+            # mgmt port
+            ?
+                PORT_ID: 76
+            :
+                PC_PHYS_PORT_ID: 513
+            ?
+                PORT_ID: 164
+            :
+                PC_PHYS_PORT_ID: 514
+            ?
+                PORT_ID: 186
+            :
+                PC_PHYS_PORT_ID: 516
+            ?
+                PORT_ID: 274
+            :
+                PC_PHYS_PORT_ID: 515
+...
+---
+device:
+    0:
+        PC_PORT:
+            ?
+                PORT_ID: 0
+            :
+                &port_mode_10g
+                ENABLE: 1
+                SPEED: 10000
+                NUM_LANES: 1
+            ?
+                PORT_ID: [[1, 2],
+                          [11, 12],
+                          [22, 23],
+                          [33, 34],
+                          [44, 45],
+                          [55, 56],
+                          [66, 67],
+                          [77, 78],
+                          [88, 89],
+                          [99, 100],
+                          [110, 111],
+                          [121, 122],
+                          [132, 133],
+                          [143, 144],
+                          [154, 155],
+                          [165, 166],
+                          [176, 177],
+                          [187, 188],
+                          [198, 199],
+                          [209, 210],
+                          [220, 221],
+                          [231, 232],
+                          [242, 243],
+                          [253, 254],
+                          [264, 265],
+                          [275, 276],
+                          [286, 287],
+                          [297, 298],
+                          [308, 309],
+                          [319, 320],
+                          [330, 331],
+                          [341, 342]]
+            :
+                ENABLE: 1
+                SPEED: 400000
+                NUM_LANES: 8
+                FEC_MODE: PC_FEC_RS544_2XN
+                MAX_FRAME_SIZE: 9416
+                LINK_TRAINING: 1
+            ?
+                PORT_ID: [76, 164, 186, 274]
+            :
+                ENABLE: 1
+                SPEED: 10000
+                NUM_LANES: 1
+                MAX_FRAME_SIZE: 9416
+
+...
diff --git a/device/nokia/x86_64-nokia_ixr7220_h5_64d-r0/Nokia-IXR7220-H5-64D/port_config.ini b/device/nokia/x86_64-nokia_ixr7220_h5_64d-r0/Nokia-IXR7220-H5-64D/port_config.ini
new file mode 100644
index 000000000..40e197e5f
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h5_64d-r0/Nokia-IXR7220-H5-64D/port_config.ini
@@ -0,0 +1,68 @@
+# name          lanes                             alias               index     speed
+Ethernet0       17,18,19,20,21,22,23,24           fourhundredGigE1/1  1         400000
+Ethernet4       25,26,27,28,29,30,31,32           fourhundredGigE1/2  2         400000
+Ethernet8       1,2,3,4,5,6,7,8                   fourhundredGigE1/3  3         400000
+Ethernet12      9,10,11,12,13,14,15,16            fourhundredGigE1/4  4         400000
+Ethernet16      49,50,51,52,53,54,55,56           fourhundredGigE1/5  5         400000
+Ethernet20      57,58,59,60,61,62,63,64           fourhundredGigE1/6  6         400000
+Ethernet24      33,34,35,36,37,38,39,40           fourhundredGigE1/7  7         400000
+Ethernet28      41,42,43,44,45,46,47,48           fourhundredGigE1/8  8         400000
+Ethernet32      81,82,83,84,85,86,87,88           fourhundredGigE1/9  9         400000
+Ethernet36      89,90,91,92,93,94,95,96           fourhundredGigE1/10 10        400000
+Ethernet40      65,66,67,68,69,70,71,72           fourhundredGigE1/11 11        400000
+Ethernet44      73,74,75,76,77,78,79,80           fourhundredGigE1/12 12        400000
+Ethernet48      113,114,115,116,117,118,119,120   fourhundredGigE1/13 13        400000
+Ethernet52      121,122,123,124,125,126,127,128   fourhundredGigE1/14 14        400000
+Ethernet56      97,98,99,100,101,102,103,104      fourhundredGigE1/15 15        400000
+Ethernet60      105,106,107,108,109,110,111,112   fourhundredGigE1/16 16        400000
+Ethernet64      129,130,131,132,133,134,135,136   fourhundredGigE1/17 17        400000
+Ethernet68      137,138,139,140,141,142,143,144   fourhundredGigE1/18 18        400000
+Ethernet72      145,146,147,148,149,150,151,152   fourhundredGigE1/19 19        400000
+Ethernet76      153,154,155,156,157,158,159,160   fourhundredGigE1/20 20        400000
+Ethernet80      161,162,163,164,165,166,167,168   fourhundredGigE1/21 21        400000
+Ethernet84      169,170,171,172,173,174,175,176   fourhundredGigE1/22 22        400000
+Ethernet88      177,178,179,180,181,182,183,184   fourhundredGigE1/23 23        400000
+Ethernet92      185,186,187,188,189,190,191,192   fourhundredGigE1/24 24        400000
+Ethernet96      193,194,195,196,197,198,199,200   fourhundredGigE1/25 25        400000
+Ethernet100     201,202,203,204,205,206,207,208   fourhundredGigE1/26 26        400000
+Ethernet104     209,210,211,212,213,214,215,216   fourhundredGigE1/27 27        400000
+Ethernet108     217,218,219,220,221,222,223,224   fourhundredGigE1/28 28        400000
+Ethernet112     225,226,227,228,229,230,231,232   fourhundredGigE1/29 29        400000
+Ethernet116     233,234,235,236,237,238,239,240   fourhundredGigE1/30 30        400000
+Ethernet120     241,242,243,244,245,246,247,248   fourhundredGigE1/31 31        400000
+Ethernet124     249,250,251,252,253,254,255,256   fourhundredGigE1/32 32        400000
+Ethernet128     257,258,259,260,261,262,263,264   fourhundredGigE1/33 33        400000
+Ethernet132     265,266,267,268,269,270,271,272   fourhundredGigE1/34 34        400000
+Ethernet136     273,274,275,276,277,278,279,280   fourhundredGigE1/35 35        400000
+Ethernet140     281,282,283,284,285,286,287,288   fourhundredGigE1/36 36        400000
+Ethernet144     289,290,291,292,293,294,295,296   fourhundredGigE1/37 37        400000
+Ethernet148     297,298,299,300,301,302,303,304   fourhundredGigE1/38 38        400000
+Ethernet152     305,306,307,308,309,310,311,312   fourhundredGigE1/39 39        400000
+Ethernet156     313,314,315,316,317,318,319,320   fourhundredGigE1/40 40        400000
+Ethernet160     321,322,323,324,325,326,327,328   fourhundredGigE1/41 41        400000
+Ethernet164     329,330,331,332,333,334,335,336   fourhundredGigE1/42 42        400000
+Ethernet168     337,338,339,340,341,342,343,344   fourhundredGigE1/43 43        400000
+Ethernet172     345,346,347,348,349,350,351,352   fourhundredGigE1/44 44        400000
+Ethernet176     353,354,355,356,357,358,359,360   fourhundredGigE1/45 45        400000
+Ethernet180     361,362,363,364,365,366,367,368   fourhundredGigE1/46 46        400000
+Ethernet184     369,370,371,372,373,374,375,376   fourhundredGigE1/47 47        400000
+Ethernet188     377,378,379,380,381,382,383,384   fourhundredGigE1/48 48        400000
+Ethernet192     385,386,387,388,389,390,391,392   fourhundredGigE1/49 49        400000
+Ethernet196     393,394,395,396,397,398,399,400   fourhundredGigE1/50 50        400000
+Ethernet200     401,402,403,404,405,406,407,408   fourhundredGigE1/51 51        400000
+Ethernet204     409,410,411,412,413,414,415,416   fourhundredGigE1/52 52        400000
+Ethernet208     417,418,419,420,421,422,423,424   fourhundredGigE1/53 53        400000
+Ethernet212     425,426,427,428,429,430,431,432   fourhundredGigE1/54 54        400000
+Ethernet216     433,434,435,436,437,438,439,440   fourhundredGigE1/55 55        400000
+Ethernet220     441,442,443,444,445,446,447,448   fourhundredGigE1/56 56        400000
+Ethernet224     449,450,451,452,453,454,455,456   fourhundredGigE1/57 57        400000
+Ethernet228     457,458,459,460,461,462,463,464   fourhundredGigE1/58 58        400000
+Ethernet232     465,466,467,468,469,470,471,472   fourhundredGigE1/59 59        400000
+Ethernet236     473,474,475,476,477,478,479,480   fourhundredGigE1/60 60        400000
+Ethernet240     481,482,483,484,485,486,487,488   fourhundredGigE1/61 61        400000
+Ethernet244     489,490,491,492,493,494,495,496   fourhundredGigE1/62 62        400000
+Ethernet248     497,498,499,500,501,502,503,504   fourhundredGigE1/63 63        400000
+Ethernet252     505,506,507,508,509,510,511,512   fourhundredGigE1/64 64        400000
+Ethernet256     513                               tenGigE1/65         65        10000
+Ethernet257     514                               tenGigE1/66         66        10000
+
diff --git a/device/nokia/x86_64-nokia_ixr7220_h5_64d-r0/Nokia-IXR7220-H5-64D/profile.ini b/device/nokia/x86_64-nokia_ixr7220_h5_64d-r0/Nokia-IXR7220-H5-64D/profile.ini
new file mode 100644
index 000000000..4eda67c91
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h5_64d-r0/Nokia-IXR7220-H5-64D/profile.ini
@@ -0,0 +1 @@
+switchMacAddress=XX:XX:XX:XX:XX:XX
diff --git a/device/nokia/x86_64-nokia_ixr7220_h5_64d-r0/Nokia-IXR7220-H5-64D/sai.profile b/device/nokia/x86_64-nokia_ixr7220_h5_64d-r0/Nokia-IXR7220-H5-64D/sai.profile
new file mode 100644
index 000000000..dbdfc2c47
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h5_64d-r0/Nokia-IXR7220-H5-64D/sai.profile
@@ -0,0 +1 @@
+SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/h5_64dx400g.yml
diff --git a/device/nokia/x86_64-nokia_ixr7220_h5_64d-r0/default_sku b/device/nokia/x86_64-nokia_ixr7220_h5_64d-r0/default_sku
new file mode 100644
index 000000000..15bb786fc
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h5_64d-r0/default_sku
@@ -0,0 +1 @@
+Nokia-IXR7220-H5-64D t1
diff --git a/device/nokia/x86_64-nokia_ixr7220_h5_64d-r0/installer.conf b/device/nokia/x86_64-nokia_ixr7220_h5_64d-r0/installer.conf
new file mode 100644
index 000000000..e69de29bb
diff --git a/device/nokia/x86_64-nokia_ixr7220_h5_64d-r0/platform.json b/device/nokia/x86_64-nokia_ixr7220_h5_64d-r0/platform.json
new file mode 100644
index 000000000..63f55d3eb
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h5_64d-r0/platform.json
@@ -0,0 +1,464 @@
+{
+    "chassis": {
+        "name": "7220 IXR-H5-64D",
+        "components": [
+            {
+                "name": "CPUPLD"
+            },
+            {
+                "name": "SysFPGA"
+            },
+            {
+                "name": "SWPLD2"
+            },
+            {
+                "name": "SWPLD3"
+            }
+        ],
+        "fans": [
+            {
+                "name": "Fan1",
+                "status_led": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "Fan2",
+                "status_led": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "Fan3",
+                "status_led": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "Fan4",
+                "status_led": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "Fan5",
+                "status_led": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "Fan6",
+                "status_led": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "Fan7",
+                "status_led": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "Fan8",
+                "status_led": {
+                    "controllable": false
+                }
+            }
+        ],
+        "fan_drawers": [
+            {
+                "name": "drawer1",
+                "status_led": {
+                    "controllable": false
+                },
+                "max_consumed_power": false,
+                "fans": [
+                    {
+                        "name": "Fan1",
+                        "status_led": {
+                            "controllable": false
+                        }
+                    },
+                    {
+                        "name": "Fan2",
+                        "status_led": {
+                            "controllable": false
+                        }
+                    }
+                ]
+            },
+            {
+                "name": "drawer2",
+                "status_led": {
+                    "controllable": false
+                },
+                "max_consumed_power": false,
+                "fans": [
+                    {
+                        "name": "Fan3",
+                        "status_led": {
+                            "controllable": false
+                        }
+                    },
+                    {
+                        "name": "Fan4",
+                        "status_led": {
+                            "controllable": false
+                        }
+                    }
+                ]
+            },
+            {
+                "name": "drawer3",
+                "status_led": {
+                    "controllable": false
+                },
+                "max_consumed_power": false,
+                "fans": [
+                    {
+                        "name": "Fan5",
+                        "status_led": {
+                            "controllable": false
+                        }
+                    },
+                    {
+                        "name": "Fan6",
+                        "status_led": {
+                            "controllable": false
+                        }
+                    }
+                ]
+            },
+            {
+                "name": "drawer4",
+                "status_led": {
+                    "controllable": false
+                },
+                "max_consumed_power": false,
+                "fans": [
+                    {
+                        "name": "Fan7",
+                        "status_led": {
+                            "controllable": false
+                        }
+                    },
+                    {
+                        "name": "Fan8",
+                        "status_led": {
+                            "controllable": false
+                        }
+                    }
+                ]
+            }            
+        ],
+        "psus": [
+            {
+                "name": "PSU1",
+                "status_led": {
+                    "controllable": false
+                },
+                "current": true,
+                "power": true,
+                "max_power": false,
+                "voltage_high_threshold": false,
+                "voltage_low_threshold": false,
+                "temperature": false
+            },
+            {
+                "name": "PSU2",
+                "status_led": {
+                    "controllable": false
+                },
+                "current": true,
+                "power": true,
+                "max_power": false,
+                "voltage_high_threshold": false,
+                "voltage_low_threshold": false,
+                "temperature": false
+            }
+        ],
+        "thermals": [
+            {
+                "name": "MB Left",
+                "controllable": false,
+                "low-threshold": false,
+                "high-threshold": true,
+                "low-crit-threshold": false,
+                "high-crit-threshold": true
+            },
+            {
+                "name": "MB Front",
+                "controllable": false,
+                "low-threshold": false,
+                "high-threshold": true,
+                "low-crit-threshold": false,
+                "high-crit-threshold": true
+            },
+            {
+                "name": "MB Right",
+                "controllable": false,
+                "low-threshold": false,
+                "high-threshold": true,
+                "low-crit-threshold": false,
+                "high-crit-threshold": true
+            },
+            {
+                "name": "MB MAC",
+                "controllable": false,
+                "low-threshold": false,
+                "high-threshold": true,
+                "low-crit-threshold": false,
+                "high-crit-threshold": true
+            },
+            {
+                "name": "PSU top",
+                "controllable": false,
+                "low-threshold": false,
+                "high-threshold": true,
+                "low-crit-threshold": false,
+                "high-crit-threshold": true
+            },
+            {
+                "name": "PSU Bottom",
+                "controllable": false,
+                "low-threshold": false,
+                "high-threshold": true,
+                "low-crit-threshold": false,
+                "high-crit-threshold": true
+            },
+            {
+                "name": "CPU Board",
+                "controllable": false,
+                "low-threshold": false,
+                "high-threshold": true,
+                "low-crit-threshold": false,
+                "high-crit-threshold": true
+            },
+            {
+                "name": "Fan Left",
+                "controllable": false,
+                "low-threshold": false,
+                "high-threshold": true,
+                "low-crit-threshold": false,
+                "high-crit-threshold": true
+            },
+            {
+                "name": "Fan Right",
+                "controllable": false,
+                "low-threshold": false,
+                "high-threshold": true,
+                "low-crit-threshold": false,
+                "high-crit-threshold": true
+            },
+            {
+                "name": "MAC internal",
+                "controllable": false,
+                "low-threshold": false,
+                "high-threshold": true,
+                "low-crit-threshold": false,
+                "high-crit-threshold": true
+            }
+        ],
+        "sfps": [
+            {
+                "name": "QSFPDD_1"
+            },
+            {
+                "name": "QSFPDD_2"
+            },
+            {
+                "name": "QSFPDD_3"
+            },
+            {
+                "name": "QSFPDD_4"
+            },
+            {
+                "name": "QSFPDD_5"
+            },
+            {
+                "name": "QSFPDD_6"
+            },
+            {
+                "name": "QSFPDD_7"
+            },
+            {
+                "name": "QSFPDD_8"
+            },
+            {
+                "name": "QSFPDD_9"
+            },
+            {
+                "name": "QSFPDD_10"
+            },
+            {
+                "name": "QSFPDD_11"
+            },
+            {
+                "name": "QSFPDD_12"
+            },
+            {
+                "name": "QSFPDD_13"
+            },
+            {
+                "name": "QSFPDD_14"
+            },
+            {
+                "name": "QSFPDD_15"
+            },
+            {
+                "name": "QSFPDD_16"
+            },
+            {
+                "name": "QSFPDD_17"
+            },
+            {
+                "name": "QSFPDD_18"
+            },
+            {
+                "name": "QSFPDD_19"
+            },
+            {
+                "name": "QSFPDD_20"
+            },
+            {
+                "name": "QSFPDD_21"
+            },
+            {
+                "name": "QSFPDD_22"
+            },
+            {
+                "name": "QSFPDD_23"
+            },
+            {
+                "name": "QSFPDD_24"
+            },
+            {
+                "name": "QSFPDD_25"
+            },
+            {
+                "name": "QSFPDD_26"
+            },
+            {
+                "name": "QSFPDD_27"
+            },
+            {
+                "name": "QSFPDD_28"
+            },
+            {
+                "name": "QSFPDD_29"
+            },
+            {
+                "name": "QSFPDD_30"
+            },
+            {
+                "name": "QSFPDD_31"
+            },
+            {
+                "name": "QSFPDD_32"
+            },
+            {
+                "name": "QSFPDD_33"
+            },
+            {
+                "name": "QSFPDD_34"
+            },
+            {
+                "name": "QSFPDD_35"
+            },
+            {
+                "name": "QSFPDD_36"
+            },
+            {
+                "name": "QSFPDD_37"
+            },
+            {
+                "name": "QSFPDD_38"
+            },
+            {
+                "name": "QSFPDD_39"
+            },
+            {
+                "name": "QSFPDD_40"
+            },
+            {
+                "name": "QSFPDD_41"
+            },
+            {
+                "name": "QSFPDD_42"
+            },
+            {
+                "name": "QSFPDD_43"
+            },
+            {
+                "name": "QSFPDD_44"
+            },
+            {
+                "name": "QSFPDD_45"
+            },
+            {
+                "name": "QSFPDD_46"
+            },
+            {
+                "name": "QSFPDD_47"
+            },
+            {
+                "name": "QSFPDD_48"
+            },
+            {
+                "name": "QSFPDD_49"
+            },
+            {
+                "name": "QSFPDD_50"
+            },
+            {
+                "name": "QSFPDD_51"
+            },
+            {
+                "name": "QSFPDD_52"
+            },
+            {
+                "name": "QSFPDD_53"
+            },
+            {
+                "name": "QSFPDD_54"
+            },
+            {
+                "name": "QSFPDD_55"
+            },
+            {
+                "name": "QSFPDD_56"
+            },
+            {
+                "name": "QSFPDD_57"
+            },
+            {
+                "name": "QSFPDD_58"
+            },
+            {
+                "name": "QSFPDD_59"
+            },
+            {
+                "name": "QSFPDD_60"
+            },
+            {
+                "name": "QSFPDD_64"
+            },
+            {
+                "name": "QSFPDD_62"
+            },
+            {
+                "name": "QSFPDD_63"
+            },
+            {
+                "name": "QSFPDD_64"
+            },
+            {
+                "name": "SFP+_0"
+            },
+            {
+                "name": "SFP+_1"
+            }
+       	]
+    },
+    "interfaces": {}
+}
diff --git a/device/nokia/x86_64-nokia_ixr7220_h5_64d-r0/platform_asic b/device/nokia/x86_64-nokia_ixr7220_h5_64d-r0/platform_asic
new file mode 100644
index 000000000..960467652
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h5_64d-r0/platform_asic
@@ -0,0 +1 @@
+broadcom
diff --git a/device/nokia/x86_64-nokia_ixr7220_h5_64d-r0/plugins/eeprom.py b/device/nokia/x86_64-nokia_ixr7220_h5_64d-r0/plugins/eeprom.py
new file mode 100644
index 000000000..12a1bbe5d
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h5_64d-r0/plugins/eeprom.py
@@ -0,0 +1,16 @@
+try:
+    import os
+    from sonic_eeprom import eeprom_tlvinfo
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+
+class board(eeprom_tlvinfo.TlvInfoDecoder):
+
+    def __init__(self, name, path, cpld_root, ro):
+        self.eeprom_path = "/sys/class/i2c-adapter/i2c-0/0-0053/eeprom"
+        if not os.path.exists(self.eeprom_path):
+            file = "/sys/class/i2c-adapter/i2c-0/new_device"
+            with open(file, 'w') as f:
+                f.write('24c02 0x53\n')
+        super(board, self).__init__(self.eeprom_path, 0, '', True)
diff --git a/device/nokia/x86_64-nokia_ixr7220_h5_64d-r0/plugins/led_control.py b/device/nokia/x86_64-nokia_ixr7220_h5_64d-r0/plugins/led_control.py
new file mode 100644
index 000000000..eb1dbeb34
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h5_64d-r0/plugins/led_control.py
@@ -0,0 +1,125 @@
+#
+# led_control.py
+#
+# Platform-specific LED control functionality for SONiC
+#
+
+try:
+    from sonic_led.led_control_base import LedControlBase
+    import os
+    import time
+    import syslog
+    import struct
+    from mmap import *
+    import sonic_platform.platform
+    import sonic_platform.chassis
+except ImportError as e:
+    raise ImportError(str(e) + " - required module not found")
+
+H5_64D_FAN_DRAWERS = 4
+H5_64D_FANS_PER_DRAWER = 2
+RESOURCE = "/sys/bus/pci/devices/0000:02:00.0/resource0"
+REG_FRONT_SYSLED = 0x0084
+REG_FRONT_FANLED = 0x0088
+
+def DBG_PRINT(str):
+    syslog.openlog("nokia-led")
+    syslog.syslog(syslog.LOG_INFO, str)
+    syslog.closelog()
+
+
+class LedControl(LedControlBase):
+    """Platform specific LED control class"""
+
+    # Constructor
+    def __init__(self):
+        self.chassis = sonic_platform.platform.Platform().get_chassis()
+        self._initDefaultConfig()
+
+    def _initDefaultConfig(self):
+        # The fan tray leds and system led managed by new chassis class API
+        # leaving only a couple other front panel leds to be done old style
+        DBG_PRINT("starting system leds")
+        self._initSystemLed()
+        DBG_PRINT(" led done")
+
+    def _read_sysfs_file(self, sysfs_file):
+        # On successful read, returns the value read from given
+        # reg_name and on failure returns 'ERR'
+        rv = 'ERR'
+
+        if (not os.path.isfile(sysfs_file)):
+            return rv
+        try:
+            with open(sysfs_file, 'r') as fd:
+                rv = fd.read()
+        except Exception as e:
+            rv = 'ERR'
+
+        rv = rv.rstrip('\r\n')
+        rv = rv.lstrip(" ")
+        return rv
+
+    def _write_sysfs_file(self, sysfs_file, value):
+        # On successful write, the value read will be written on
+        # reg_name and on failure returns 'ERR'
+        rv = 'ERR'
+
+        if (not os.path.isfile(sysfs_file)):
+            return rv
+        try:
+            with open(sysfs_file, 'w') as fd:
+                rv = fd.write(str(value))
+        except Exception as e:
+            rv = 'ERR'
+
+        return rv
+    
+    def _pci_set_value(self, resource, data, offset):
+        fd = open(resource, O_RDWR)
+        mm = mmap(fd, 0)
+        mm.seek(offset)
+        mm.write(struct.pack('I', data))
+        mm.close()
+        close(fd)
+
+    def _pci_get_value(self, resource, offset):
+        fd = open(resource, O_RDWR)
+        mm = mmap(fd, 0)
+        mm.seek(offset)
+        read_data_stream = mm.read(4)
+        reg_val = struct.unpack('I', read_data_stream)
+        mm.close()
+        close(fd)
+        return reg_val
+    
+    def _initSystemLed(self):
+        # Front Panel System LEDs setting
+        oldfan = 0xf    # 0=amber, 1=green
+        oldpsu = 0xf    # 0=amber, 1=green
+
+        # Write sys led
+        self._pci_set_value(RESOURCE, 1, REG_FRONT_SYSLED)
+        
+        # Timer loop to monitor and set front panel Status, Fan, and PSU LEDs
+        while True:
+            # Front Panel FAN Panel LED setting
+            good_fan = 0
+            for fan in self.chassis._fan_list:
+                if fan.get_status() == True:
+                    good_fan = good_fan + 1
+            
+            if (good_fan == H5_64D_FAN_DRAWERS * H5_64D_FANS_PER_DRAWER):                
+                if oldfan != 0x1:
+                    self._pci_set_value(RESOURCE, 1, REG_FRONT_FANLED)
+                    oldfan = 0x1
+                
+            else:                
+                if oldfan != 0x0:
+                    self._pci_set_value(RESOURCE, 0, REG_FRONT_FANLED)
+                    oldfan = 0x0
+                
+
+            
+            time.sleep(6)
+
diff --git a/device/nokia/x86_64-nokia_ixr7220_h5_64d-r0/system_health_monitoring_config.json b/device/nokia/x86_64-nokia_ixr7220_h5_64d-r0/system_health_monitoring_config.json
new file mode 100644
index 000000000..d5f3a7b98
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h5_64d-r0/system_health_monitoring_config.json
@@ -0,0 +1,14 @@
+{
+    "services_to_ignore": [],
+    "devices_to_ignore": [
+        "asic",
+        "psu.temperature"
+    ],
+    "user_defined_checkers": [],
+    "polling_interval": 60,
+    "led_color": {
+        "fault": "amber",
+        "normal": "green",
+        "booting": "blinking green"
+    }
+}
diff --git a/device/nokia/x86_64-nokia_ixr7220_h5_64d-r0/thermal_policy.json b/device/nokia/x86_64-nokia_ixr7220_h5_64d-r0/thermal_policy.json
new file mode 100644
index 000000000..667d82dac
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7220_h5_64d-r0/thermal_policy.json
@@ -0,0 +1,67 @@
+{   
+    "thermal_control_algorithm": {
+        "run_at_boot_up": "false",
+        "fan_speed_when_suspend": "65"
+    },
+    "info_types": [
+        {
+            "type": "fan_info"
+        },
+        {
+            "type": "thermal_info"
+        },
+        {
+            "type": "chassis_info"
+        }
+    ],
+    "policies": [
+        {
+            "name": "any fan absence",
+            "conditions": [
+                {
+                    "type": "fan.any.absence"
+                }
+            ],
+            "actions": [
+                {
+                    "type": "thermal_control.control",
+                    "status": "false"
+                },
+                {
+                    "type": "fan.all.set_speed",
+                    "speed": "100"
+                }
+            ]
+        },
+        {
+            "name": "all fan presence",
+            "conditions": [
+                {
+                    "type": "fan.all.presence"
+                }
+            ],
+            "actions": [
+                {
+                    "type": "thermal.temp_check_and_set_all_fan_speed",
+                    "default_speed": "40",
+                    "threshold1_speed": "55",
+                    "threshold2_speed": "80",
+                    "hightemp_speed": "100"
+                }
+            ]
+        },
+	{
+            "name": "temp over high critical threshold",
+            "conditions": [
+                {
+                    "type": "thermal.over.high_critical_threshold"
+                }
+            ],
+            "actions": [
+                {
+                    "type": "switch.shutdown"
+                }
+            ]
+        }
+    ]
+}
diff --git a/platform/broadcom/one-image.mk b/platform/broadcom/one-image.mk
index c9660299e..f5a1f68f4 100755
--- a/platform/broadcom/one-image.mk
+++ b/platform/broadcom/one-image.mk
@@ -80,6 +80,9 @@ $(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(DELL_S6000_PLATFORM_MODULE) \
                                $(RUIJIE_B6510_48VS8CQ_PLATFORM_MODULE) \
                                $(RAGILE_RA_B6510_48V8C_PLATFORM_MODULE) \
                                $(NOKIA_IXR7250_PLATFORM_MODULE) \
+                               $(NOKIA_IXR7220H3_PLATFORM_MODULE) \
+                               $(NOKIA_IXR7220H4_32D_PLATFORM_MODULE) \
+                               $(NOKIA_IXR7220H5_64D_PLATFORM_MODULE) \
                                $(TENCENT_TCS8400_PLATFORM_MODULE) \
                                $(TENCENT_TCS9400_PLATFORM_MODULE) \
                                $(UFISPACE_S9300_32D_PLATFORM_MODULE) \
diff --git a/platform/broadcom/platform-modules-nokia.mk b/platform/broadcom/platform-modules-nokia.mk
index fb5199375..10c556917 100644
--- a/platform/broadcom/platform-modules-nokia.mk
+++ b/platform/broadcom/platform-modules-nokia.mk
@@ -1,9 +1,14 @@
 # Nokia Platform modules
 
 NOKIA_IXR7250_PLATFORM_MODULE_VERSION = 1.0
+NOKIA_IXR7220H3_PLATFORM_MODULE_VERSION = 1.0
+NOKIA_IXR7220H4_32D_PLATFORM_MODULE_VERSION = 1.0
+NOKIA_IXR7220H5_64D_PLATFORM_MODULE_VERSION = 1.0
 
 export NOKIA_IXR7250_PLATFORM_MODULE_VERSION
-
+export NOKIA_IXR7220H3_PLATFORM_MODULE_VERSION
+export NOKIA_IXR7220H4_32D_PLATFORM_MODULE_VERSION
+export NOKIA_IXR7220H5_64D_PLATFORM_MODULE_VERSION
 
 NOKIA_IXR7250_PLATFORM_MODULE = sonic-platform-nokia-chassis_$(NOKIA_IXR7250_PLATFORM_MODULE_VERSION)_amd64.deb
 $(NOKIA_IXR7250_PLATFORM_MODULE)_SRC_PATH = $(PLATFORM_PATH)/sonic-platform-modules-nokia
@@ -12,3 +17,17 @@ $(NOKIA_IXR7250_PLATFORM_MODULE)_PLATFORM = x86_64-nokia_ixr7250e_sup-r0
 $(NOKIA_IXR7250_PLATFORM_MODULE)_PLATFORM += x86_64-nokia_ixr7250e_36x400g-r0
 SONIC_DPKG_DEBS += $(NOKIA_IXR7250_PLATFORM_MODULE)
 
+NOKIA_IXR7220H3_PLATFORM_MODULE = sonic-platform-nokia-ixr7220h3_$(NOKIA_IXR7220H3_PLATFORM_MODULE_VERSION)_amd64.deb
+$(NOKIA_IXR7220H3_PLATFORM_MODULE)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON) 
+$(NOKIA_IXR7220H3_PLATFORM_MODULE)_PLATFORM = x86_64-nokia_ixr7220_h3-r0
+$(eval $(call add_extra_package,$(NOKIA_IXR7250_PLATFORM_MODULE),$(NOKIA_IXR7220H3_PLATFORM_MODULE)))
+
+NOKIA_IXR7220H4_32D_PLATFORM_MODULE = sonic-platform-nokia-ixr7220h4-32d_$(NOKIA_IXR7220H4_32D_PLATFORM_MODULE_VERSION)_amd64.deb
+$(NOKIA_IXR7220H4_32D_PLATFORM_MODULE)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON) 
+$(NOKIA_IXR7220H4_32D_PLATFORM_MODULE)_PLATFORM = x86_64-nokia_ixr7220_h4_32d-r0
+$(eval $(call add_extra_package,$(NOKIA_IXR7250_PLATFORM_MODULE),$(NOKIA_IXR7220H4_32D_PLATFORM_MODULE)))
+
+NOKIA_IXR7220H5_64D_PLATFORM_MODULE = sonic-platform-nokia-ixr7220h5-64d_$(NOKIA_IXR7220H5_64D_PLATFORM_MODULE_VERSION)_amd64.deb
+$(NOKIA_IXR7220H5_64D_PLATFORM_MODULE)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON) 
+$(NOKIA_IXR7220H5_64D_PLATFORM_MODULE)_PLATFORM = x86_64-nokia_ixr7220_h5_64d-r0
+$(eval $(call add_extra_package,$(NOKIA_IXR7250_PLATFORM_MODULE),$(NOKIA_IXR7220H5_64D_PLATFORM_MODULE)))
diff --git a/platform/broadcom/sonic-platform-modules-nokia b/platform/broadcom/sonic-platform-modules-nokia
index 840927827..20f82d014 160000
--- a/platform/broadcom/sonic-platform-modules-nokia
+++ b/platform/broadcom/sonic-platform-modules-nokia
@@ -1 +1 @@
-Subproject commit 84092782791ecc42b4f597fbea0c16204e4a8f9d
+Subproject commit 20f82d0144b4afb71389f82636ba0e98a09c07a6

From 0528ae19d94feb48814ae7764c1dd353d4dd9a56 Mon Sep 17 00:00:00 2001
From: Samuel Angebault <staphylo@arista.com>
Date: Thu, 23 May 2024 21:11:01 +0200
Subject: [PATCH 0644/1115] [Arista] Update platform library submodules
 (#19050)

Add SFP+ support for 7060X6
---
 platform/barefoot/sonic-platform-modules-arista | 2 +-
 platform/broadcom/sonic-platform-modules-arista | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/platform/barefoot/sonic-platform-modules-arista b/platform/barefoot/sonic-platform-modules-arista
index c8924f32a..af03fbd9f 160000
--- a/platform/barefoot/sonic-platform-modules-arista
+++ b/platform/barefoot/sonic-platform-modules-arista
@@ -1 +1 @@
-Subproject commit c8924f32a3cff45e35dcdfd9f0b7dd9d37cecf60
+Subproject commit af03fbd9f67260ba764c833aaaa65b2ff07762d7
diff --git a/platform/broadcom/sonic-platform-modules-arista b/platform/broadcom/sonic-platform-modules-arista
index c8924f32a..af03fbd9f 160000
--- a/platform/broadcom/sonic-platform-modules-arista
+++ b/platform/broadcom/sonic-platform-modules-arista
@@ -1 +1 @@
-Subproject commit c8924f32a3cff45e35dcdfd9f0b7dd9d37cecf60
+Subproject commit af03fbd9f67260ba764c833aaaa65b2ff07762d7

From e240bc79fb479cdc97f5e11b8f6ad6f4e8615f41 Mon Sep 17 00:00:00 2001
From: vmittal-msft <46945843+vmittal-msft@users.noreply.github.com>
Date: Thu, 23 May 2024 12:16:12 -0700
Subject: [PATCH 0645/1115] [yang]: adding Buffer pool enum type both for sonic
 chassis (#18956)

---
 .../tests/yang_model_tests/tests/buffer_pool.json  |  3 +++
 .../yang_model_tests/tests_config/buffer_pool.json | 14 ++++++++++++++
 .../yang-models/sonic-buffer-pool.yang             |  1 +
 3 files changed, 18 insertions(+)

diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/buffer_pool.json b/src/sonic-yang-models/tests/yang_model_tests/tests/buffer_pool.json
index 907fa9101..974ece55d 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests/buffer_pool.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests/buffer_pool.json
@@ -5,6 +5,9 @@
     "BUFFER_POOL_CORRECT_TYPE_EGRESS_VALUE": {
         "desc": "BUFFER_POOL_CORRECT_TYPE_EGRESS_VALUE no failure."
     },
+    "BUFFER_POOL_CORRECT_TYPE_BOTH_VALUE": {
+        "desc": "BUFFER_POOL_CORRECT_TYPE_BOTH_VALUE no failure."
+    },
     "BUFFER_POOL_WRONG_TYPE_VALUE": {
         "desc": "BUFFER_POOL_WRONG_TYPE_VALUE pattern failure.",
         "eStr": "wrong"
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/buffer_pool.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/buffer_pool.json
index 8a0005305..a2a4d6fc1 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/buffer_pool.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/buffer_pool.json
@@ -27,6 +27,20 @@
             }
         }
     },
+    "BUFFER_POOL_CORRECT_TYPE_BOTH_VALUE": {
+        "sonic-buffer-pool:sonic-buffer-pool": {
+            "sonic-buffer-pool:BUFFER_POOL": {
+                "BUFFER_POOL_LIST": [
+                {
+                    "name": "Ethernet4",
+                    "mode": "static",
+                    "size": "12766208",
+                    "type": "both"
+                }
+                ]
+            }
+        }
+    },
     "BUFFER_POOL_WRONG_TYPE_VALUE": {
         "sonic-buffer-pool:sonic-buffer-pool": {
             "sonic-buffer-pool:BUFFER_POOL": {
diff --git a/src/sonic-yang-models/yang-models/sonic-buffer-pool.yang b/src/sonic-yang-models/yang-models/sonic-buffer-pool.yang
index fd8321857..dd8c74c13 100644
--- a/src/sonic-yang-models/yang-models/sonic-buffer-pool.yang
+++ b/src/sonic-yang-models/yang-models/sonic-buffer-pool.yang
@@ -33,6 +33,7 @@ module sonic-buffer-pool {
                     type enumeration {
                         enum ingress;
                         enum egress;
+                        enum both;
                     }
                     description "Buffer Pool Type";
                 }

From 65cbd12542e9b5f2a5b7f60bb7eee503c35e19eb Mon Sep 17 00:00:00 2001
From: Tejaswini Chadaga <85581939+tjchadaga@users.noreply.github.com>
Date: Thu, 23 May 2024 13:02:13 -0700
Subject: [PATCH 0646/1115] Yang model changes for Sequential IDF isolation
 (#18597)

#### Why I did it
To define a field to track isolation state for the IDF to which the T2 device belongs

#### How I did it
Added yang model definition, unit tests, sample config and documentation for the table

#### How to verify it
Validated config tree generation using "pyang -Vf tree -p /usr/local/share/yang/modules/ietf ./yang-models/sonic-voq-inband-interface.yang"

Built the below python-wheels to validate unit tests and other changes
target/python-wheels/bullseye/sonic_yang_mgmt-1.0-py3-none-any.whl
target/python-wheels/bullseye/sonic_yang_models-1.0-py3-none-any.whl
target/python-wheels/bullseye/sonic_config_engine-1.0-py3-none-any.whl
---
 files/build_templates/init_cfg.json.j2        |  3 +-
 src/sonic-yang-models/doc/Configuration.md    | 12 +++--
 .../tests/files/sample_config_db.json         |  3 +-
 .../tests/bgp_device_global.json              | 18 ++++++-
 .../tests_config/bgp_device_global.json       | 54 +++++++++++++++++--
 .../yang-models/sonic-bgp-device-global.yang  | 14 +++++
 6 files changed, 90 insertions(+), 14 deletions(-)

diff --git a/files/build_templates/init_cfg.json.j2 b/files/build_templates/init_cfg.json.j2
index ae382263b..f31b5a22f 100644
--- a/files/build_templates/init_cfg.json.j2
+++ b/files/build_templates/init_cfg.json.j2
@@ -30,7 +30,8 @@
     },
     "BGP_DEVICE_GLOBAL": {
         "STATE": {
-            "tsa_enabled": "false"
+            "tsa_enabled": "false",
+            "idf_isolation_state": "unisolated"
         }
     },
 {%- set features = [("bgp", "{% if not DEVICE_RUNTIME_METADATA['ETHERNET_PORTS_PRESENT'] or ('CHASSIS_METADATA' in DEVICE_RUNTIME_METADATA and DEVICE_RUNTIME_METADATA['CHASSIS_METADATA']['module_type'] in ['supervisor']) %}disabled{% else %}enabled{% endif %}", false, "enabled"),
diff --git a/src/sonic-yang-models/doc/Configuration.md b/src/sonic-yang-models/doc/Configuration.md
index 0017abaa5..f1bc162cb 100644
--- a/src/sonic-yang-models/doc/Configuration.md
+++ b/src/sonic-yang-models/doc/Configuration.md
@@ -407,16 +407,18 @@ ASIC/SDK health event related configuration is defined in **SUPPRESS_ASIC_SDK_HE
 
 ### BGP Device Global
 
-The **BGP_DEVICE_GLOBAL** table contains device-level BGP global state.
-It has a STATE object containing device state like **tsa_enabled**
-which is set to true if device is currently isolated using
-traffic-shift-away (TSA) route-maps in BGP
+The **BGP_DEVICE_GLOBAL** table contains device-level BGP global state. 
+It has a STATE object containing device state like **tsa_enabled** 
+which is set to true if device is currently isolated using 
+traffic-shift-away (TSA) route-maps in BGP. It also holds IDF isolation state
+which could be one of isolated_no_export, isolated_withdraw_all or unisolated
 
 ```
 {
 "BGP_DEVICE_GLOBAL": {
     "STATE": {
-        "tsa_enabled": "true"
+        "tsa_enabled": "true",
+        "idf_isolation_state": "isolated_no_export"
     }
 }
 ```
diff --git a/src/sonic-yang-models/tests/files/sample_config_db.json b/src/sonic-yang-models/tests/files/sample_config_db.json
index 36814657d..42c40ab36 100644
--- a/src/sonic-yang-models/tests/files/sample_config_db.json
+++ b/src/sonic-yang-models/tests/files/sample_config_db.json
@@ -1707,7 +1707,8 @@
         },
         "BGP_DEVICE_GLOBAL": {
             "STATE": {
-                "tsa_enabled": "false"
+                "tsa_enabled": "false",
+                "idf_isolation_state": "unisolated"
             }
         },
         "BGP_PEER_RANGE": {
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/bgp_device_global.json b/src/sonic-yang-models/tests/yang_model_tests/tests/bgp_device_global.json
index 233f23f3d..3c3a8559b 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests/bgp_device_global.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests/bgp_device_global.json
@@ -8,9 +8,23 @@
     "BGP_DEVICE_GLOBAL_WITH_TSB_TEST": {
         "desc": "Load bgp device global table with tsa_enabled set to false"
     },
-    "BGP_DEVICE_GLOBAL_WITH_INVALID_VALUE": {
+    "BGP_DEVICE_GLOBAL_WITH_IDF_ISOLATION_TEST_1": {
+        "desc": "Load bgp device global table with idf_isolation_state set to isolated_no_export"
+    },
+    "BGP_DEVICE_GLOBAL_WITH_IDF_ISOLATION_TEST_2": {
+        "desc": "Load bgp device global table with idf_isolation_state set to isolated_withdraw_all"        
+    },
+    "BGP_DEVICE_GLOBAL_WITH_IDF_ISOLATION_TEST_3": {
+        "desc": "Load bgp device global table with idf_isolation_state set to unisolated"        
+    },
+    "BGP_DEVICE_GLOBAL_WITH_INVALID_VALUE_1": {
         "desc": "Load bgp device global table with invalid value",
         "eStrKey": "InvalidValue",
         "eStr": ["tsa_enabled"]
+    },
+    "BGP_DEVICE_GLOBAL_WITH_INVALID_VALUE_2": {
+        "desc": "Load bgp device global table with invalid value",
+        "eStrKey": "InvalidValue",
+        "eStr": ["idf_isolation_state"]
     }
-}
+}
\ No newline at end of file
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/bgp_device_global.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/bgp_device_global.json
index f96de59df..b9bb4fe00 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/bgp_device_global.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/bgp_device_global.json
@@ -3,7 +3,8 @@
         "sonic-bgp-device-global:sonic-bgp-device-global": {
             "sonic-bgp-device-global:BGP_DEVICE_GLOBAL": {
                 "STATE":{
-                    "tsa_enabled": "false"
+                    "tsa_enabled": "false",
+                    "idf_isolation_state": "unisolated"
                 }
             }
         }
@@ -12,7 +13,8 @@
         "sonic-bgp-device-global:sonic-bgp-device-global": {
             "sonic-bgp-device-global:BGP_DEVICE_GLOBAL": {
                 "STATE":{
-                    "tsa_enabled": "true"
+                    "tsa_enabled": "true",
+                    "idf_isolation_state": "unisolated"
                 }
             }
         }
@@ -21,16 +23,58 @@
         "sonic-bgp-device-global:sonic-bgp-device-global": {
             "sonic-bgp-device-global:BGP_DEVICE_GLOBAL": {
                 "STATE":{
-                    "tsa_enabled": "false"
+                    "tsa_enabled": "false",
+                    "idf_isolation_state": "unisolated"
                 }
             }
         }
     },
-    "BGP_DEVICE_GLOBAL_WITH_INVALID_VALUE": {
+    "BGP_DEVICE_GLOBAL_WITH_IDF_ISOLATION_TEST_1": {
         "sonic-bgp-device-global:sonic-bgp-device-global": {
             "sonic-bgp-device-global:BGP_DEVICE_GLOBAL": {
                 "STATE":{
-                    "tsa_enabled": "FALSE"
+                    "tsa_enabled": "true",
+                    "idf_isolation_state": "isolated_no_export"
+                }
+            }
+        }
+    },
+    "BGP_DEVICE_GLOBAL_WITH_IDF_ISOLATION_TEST_2": {
+        "sonic-bgp-device-global:sonic-bgp-device-global": {
+            "sonic-bgp-device-global:BGP_DEVICE_GLOBAL": {
+                "STATE":{
+                    "tsa_enabled": "false",
+                    "idf_isolation_state": "isolated_withdraw_all"
+                }
+            }
+        }
+    },
+    "BGP_DEVICE_GLOBAL_WITH_IDF_ISOLATION_TEST_3": {
+        "sonic-bgp-device-global:sonic-bgp-device-global": {
+            "sonic-bgp-device-global:BGP_DEVICE_GLOBAL": {
+                "STATE":{
+                    "tsa_enabled": "false",
+                    "idf_isolation_state": "unisolated"
+                }
+            }
+        }
+    },
+    "BGP_DEVICE_GLOBAL_WITH_INVALID_VALUE_1": {
+        "sonic-bgp-device-global:sonic-bgp-device-global": {
+            "sonic-bgp-device-global:BGP_DEVICE_GLOBAL": {
+                "STATE":{
+                    "tsa_enabled": "FALSE",
+                    "idf_isolation_state": "unisolated"
+                }
+            }
+        }
+    },
+    "BGP_DEVICE_GLOBAL_WITH_INVALID_VALUE_2": {
+        "sonic-bgp-device-global:sonic-bgp-device-global": {
+            "sonic-bgp-device-global:BGP_DEVICE_GLOBAL": {
+                "STATE":{
+                    "tsa_enabled": "false",
+                    "idf_isolation_state": "isolated"
                 }
             }
         }
diff --git a/src/sonic-yang-models/yang-models/sonic-bgp-device-global.yang b/src/sonic-yang-models/yang-models/sonic-bgp-device-global.yang
index 277be6870..07e763735 100644
--- a/src/sonic-yang-models/yang-models/sonic-bgp-device-global.yang
+++ b/src/sonic-yang-models/yang-models/sonic-bgp-device-global.yang
@@ -27,6 +27,20 @@ module sonic-bgp-device-global {
                     description
                     "When set to true, Traffic is shifted away (TSA), i.e, BGP routes are not advertised to neighboring routers";
                 }
+                leaf idf_isolation_state {
+                    type enumeration {
+                        enum isolated_no_export {
+                            description "IDF isolated using no-export community tag";
+                        }
+                        enum isolated_withdraw_all {
+                            description "IDF isolated by withdrawing routes";
+                        }
+                        enum unisolated {
+                            description "IDF un-isolated";
+                        }
+                    }
+                    default unisolated;
+                }
             } /* end of STATE container */
         } /* end of BGP_DEVICE_GLOBAL container */
 

From a7ab698f1c7218b4ddc4db63c42918a8c3eb9eb4 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Fri, 24 May 2024 19:00:57 +0800
Subject: [PATCH 0647/1115] [submodule] Update submodule sonic-sairedis to the
 latest HEAD automatically (#19063)

#### Why I did it
src/sonic-sairedis
```
* a83b083 - (HEAD -> master, origin/master, origin/HEAD) Update pipeline (#1382) (16 hours ago) [Kamil Cudnik]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-sairedis | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-sairedis b/src/sonic-sairedis
index 256ce7dc5..a83b083a6 160000
--- a/src/sonic-sairedis
+++ b/src/sonic-sairedis
@@ -1 +1 @@
-Subproject commit 256ce7dc546e99dbeeb43404c4157ed7136e2932
+Subproject commit a83b083a6e1cb71127bf09c0778673b2934d4891

From c5c54c61983dc74a839e8ac6196f6499f86d8b13 Mon Sep 17 00:00:00 2001
From: Arvindsrinivasan Lakshmi Narasimhan
 <55814491+arlakshm@users.noreply.github.com>
Date: Fri, 24 May 2024 08:02:19 -0700
Subject: [PATCH 0648/1115] [yang]: add chassis hostname to device metadata
 (#19019)

Add chassis-hostname leaf to the sonic-device_metadata.yang
---
 src/sonic-yang-models/tests/files/sample_config_db.json  | 3 ++-
 .../tests/yang_model_tests/tests/device_metadata.json    | 3 +++
 .../yang_model_tests/tests_config/device_metadata.json   | 9 +++++++++
 .../yang-models/sonic-device_metadata.yang               | 5 +++++
 4 files changed, 19 insertions(+), 1 deletion(-)

diff --git a/src/sonic-yang-models/tests/files/sample_config_db.json b/src/sonic-yang-models/tests/files/sample_config_db.json
index 42c40ab36..2d2c2e63d 100644
--- a/src/sonic-yang-models/tests/files/sample_config_db.json
+++ b/src/sonic-yang-models/tests/files/sample_config_db.json
@@ -369,7 +369,8 @@
                 "yang_config_validation": "disable",
                 "rack_mgmt_map": "dummy_value",
                 "timezone": "Europe/Kiev",
-                "bgp_router_id": "8.8.8.8"
+                "bgp_router_id": "8.8.8.8",
+                "chassis_hostname": "str-sonic-chassis-1"
             }
         },
         "VLAN": {
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/device_metadata.json b/src/sonic-yang-models/tests/yang_model_tests/tests/device_metadata.json
index 226107109..5f81f02a3 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests/device_metadata.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests/device_metadata.json
@@ -169,5 +169,8 @@
     "DEVICE_METADATA_INVALID_BGP_ROUTER_ID": {
         "desc": "Verifying invalid bgp_router_id configuration.",
         "eStrKey": "Pattern"
+    },
+    "DEVICE_METADATA_VALID_CHASSIS_HOSTNAME": {
+        "desc": "Verifying valid chassis hostname configuration."
     }
 }
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/device_metadata.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/device_metadata.json
index cda0eef26..75d08694a 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/device_metadata.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/device_metadata.json
@@ -462,5 +462,14 @@
                 }
             }
         }
+    },
+    "DEVICE_METADATA_VALID_CHASSIS_HOSTNAME": {
+        "sonic-device_metadata:sonic-device_metadata": {
+            "sonic-device_metadata:DEVICE_METADATA": {
+                "sonic-device_metadata:localhost": {
+                    "chassis_hostname": "sonic-chassis-1"
+                }
+            }
+        }
     }
 }
diff --git a/src/sonic-yang-models/yang-models/sonic-device_metadata.yang b/src/sonic-yang-models/yang-models/sonic-device_metadata.yang
index 02f81283c..e201b4bfd 100644
--- a/src/sonic-yang-models/yang-models/sonic-device_metadata.yang
+++ b/src/sonic-yang-models/yang-models/sonic-device_metadata.yang
@@ -254,6 +254,11 @@ module sonic-device_metadata {
                     type inet:ipv4-address;
                     description "BGP Router identifier";
                 }
+
+                leaf chassis_hostname {
+                    description "hostname of the chassis to which this linecard or supervisor belongs to";
+                    type stypes:hostname;
+                }
             }
             /* end of container localhost */
         }

From e42dccb2fca9a1cbe7883aa8477fa01c71e244bb Mon Sep 17 00:00:00 2001
From: andywongarista <78833093+andywongarista@users.noreply.github.com>
Date: Fri, 24 May 2024 08:17:26 -0700
Subject: [PATCH 0649/1115] [devices]: Add buffers_defaults_t1 to D108C8
 (#18845)

This symlink is required else config-setup fails
---
 .../Arista-7260CX3-D108C8/buffers_defaults_t1.j2                 | 1 +
 1 file changed, 1 insertion(+)
 create mode 120000 device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D108C8/buffers_defaults_t1.j2

diff --git a/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D108C8/buffers_defaults_t1.j2 b/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D108C8/buffers_defaults_t1.j2
new file mode 120000
index 000000000..c25cc95d6
--- /dev/null
+++ b/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D108C8/buffers_defaults_t1.j2
@@ -0,0 +1 @@
+BALANCED/buffers_defaults_t1.j2
\ No newline at end of file

From 7fb369efd30cb5a0fd9cd780431d68329f6d3e4e Mon Sep 17 00:00:00 2001
From: Samuel Angebault <staphylo@arista.com>
Date: Thu, 16 May 2024 03:04:43 -0700
Subject: [PATCH 0650/1115] Add support for the SFP ports on Quicksilver

---
 .../Arista-7060X6-64DE-256x200G/hwsku.json    |   6 +
 .../port_config.ini                           |   2 +
 .../th5-a7060x6-64de.config.bcm               |  15 ++
 .../Arista-7060X6-64DE-64x400G/hwsku.json     |   6 +
 .../port_config.ini                           |   2 +
 .../Arista-7060X6-64DE/hwsku.json             |   6 +
 .../Arista-7060X6-64DE/port_config.ini        |   2 +
 .../th5-a7060x6-64de.config.bcm               |  15 ++
 .../x86_64-arista_7060x6_64de/platform.json   |  26 ++-
 .../Arista-7060X6-64PE/hwsku.json             | 202 ++++++++++++++++++
 .../Arista-7060X6-64PE/port_config.ini        |   2 +
 .../th5-a7060x6-64pe.config.bcm               |  15 ++
 .../x86_64-arista_7060x6_64pe/platform.json   |  26 ++-
 13 files changed, 323 insertions(+), 2 deletions(-)
 create mode 100644 device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE/hwsku.json

diff --git a/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-256x200G/hwsku.json b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-256x200G/hwsku.json
index f30bfc4a0..5b1282251 100644
--- a/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-256x200G/hwsku.json
+++ b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-256x200G/hwsku.json
@@ -191,6 +191,12 @@
         },
         "Ethernet504": {
             "default_brkout_mode": "4x200G"
+        },
+        "Ethernet512": {
+            "default_brkout_mode": "1x10G"
+        },
+        "Ethernet513": {
+            "default_brkout_mode": "1x10G"
         }
     }
 }
diff --git a/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-256x200G/port_config.ini b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-256x200G/port_config.ini
index 323b8e261..86b32b0bf 100644
--- a/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-256x200G/port_config.ini
+++ b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-256x200G/port_config.ini
@@ -255,3 +255,5 @@ Ethernet504  497,498                          Ethernet64/1  64     200000  rs
 Ethernet506  499,500                          Ethernet64/3  64     200000  rs
 Ethernet508  501,502                          Ethernet64/5  64     200000  rs
 Ethernet510  503,504                          Ethernet64/7  64     200000  rs
+Ethernet512  513                              Ethernet65    65     10000   none
+Ethernet513  515                              Ethernet66    66     10000   none
diff --git a/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-256x200G/th5-a7060x6-64de.config.bcm b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-256x200G/th5-a7060x6-64de.config.bcm
index b418d4965..79ebb0dfe 100644
--- a/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-256x200G/th5-a7060x6-64de.config.bcm
+++ b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-256x200G/th5-a7060x6-64de.config.bcm
@@ -1842,6 +1842,14 @@ device:
                 PORT_ID: 348
             :
                 PC_PHYS_PORT_ID: 511
+            ?
+                PORT_ID: 76
+            :
+                PC_PHYS_PORT_ID: 513
+            ?
+                PORT_ID: 274
+            :
+                PC_PHYS_PORT_ID: 515
 ...
 ---
 device:
@@ -1886,6 +1894,13 @@ device:
                 NUM_LANES: 2
                 FEC_MODE: PC_FEC_RS544_2XN
                 MAX_FRAME_SIZE: 9416
+            ?
+                PORT_ID: [[76, 76], [274, 274]]
+            :
+                ENABLE: 0
+                MAX_FRAME_SIZE: 9416
+                SPEED: 10000
+                NUM_LANES: 1
 ...
 ---
 bcm_device:
diff --git a/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-64x400G/hwsku.json b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-64x400G/hwsku.json
index 84e39004f..155c1da1d 100644
--- a/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-64x400G/hwsku.json
+++ b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-64x400G/hwsku.json
@@ -191,6 +191,12 @@
         },
         "Ethernet504": {
             "default_brkout_mode": "1x400G"
+        },
+        "Ethernet512": {
+            "default_brkout_mode": "1x10G"
+        },
+        "Ethernet513": {
+            "default_brkout_mode": "1x10G"
         }
     }
 }
diff --git a/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-64x400G/port_config.ini b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-64x400G/port_config.ini
index dfb191ace..d29a307ac 100644
--- a/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-64x400G/port_config.ini
+++ b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-64x400G/port_config.ini
@@ -63,3 +63,5 @@ Ethernet480  505,506,507,508,509,510,511,512  Ethernet61/1  61     400000  rs
 Ethernet488  489,490,491,492,493,494,495,496  Ethernet62/1  62     400000  rs
 Ethernet496  481,482,483,484,485,486,487,488  Ethernet63/1  63     400000  rs
 Ethernet504  497,498,499,500,501,502,503,504  Ethernet64/1  64     400000  rs
+Ethernet512  513                              Ethernet65    65     10000   none
+Ethernet513  515                              Ethernet66    66     10000   none
diff --git a/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE/hwsku.json b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE/hwsku.json
index 74df31482..62b564403 100644
--- a/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE/hwsku.json
+++ b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE/hwsku.json
@@ -191,6 +191,12 @@
         },
         "Ethernet504": {
             "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet512": {
+            "default_brkout_mode": "1x10G"
+        },
+        "Ethernet513": {
+            "default_brkout_mode": "1x10G"
         }
     }
 }
diff --git a/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE/port_config.ini b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE/port_config.ini
index 48d2519c0..881462c06 100644
--- a/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE/port_config.ini
+++ b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE/port_config.ini
@@ -63,3 +63,5 @@ Ethernet480  505,506,507,508,509,510,511,512  Ethernet61/1  61     800000  rs
 Ethernet488  489,490,491,492,493,494,495,496  Ethernet62/1  62     800000  rs
 Ethernet496  481,482,483,484,485,486,487,488  Ethernet63/1  63     800000  rs
 Ethernet504  497,498,499,500,501,502,503,504  Ethernet64/1  64     800000  rs
+Ethernet512  513                              Ethernet65    65     10000   none
+Ethernet513  515                              Ethernet66    66     10000   none
diff --git a/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE/th5-a7060x6-64de.config.bcm b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE/th5-a7060x6-64de.config.bcm
index 33fa541ca..afe53dfe8 100644
--- a/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE/th5-a7060x6-64de.config.bcm
+++ b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE/th5-a7060x6-64de.config.bcm
@@ -1074,6 +1074,14 @@ device:
                 PORT_ID: 342
             :
                 PC_PHYS_PORT_ID: 505
+            ?
+                PORT_ID: 76
+            :
+                PC_PHYS_PORT_ID: 513
+            ?
+                PORT_ID: 274
+            :
+                PC_PHYS_PORT_ID: 515
 ...
 ---
 device:
@@ -1118,6 +1126,13 @@ device:
                 NUM_LANES: 8
                 FEC_MODE: PC_FEC_RS544_2XN
                 MAX_FRAME_SIZE: 9416
+            ?
+                PORT_ID: [[76, 76], [274, 274]]
+            :
+                ENABLE: 0
+                MAX_FRAME_SIZE: 9416
+                SPEED: 10000
+                NUM_LANES: 1
 ...
 ---
 bcm_device:
diff --git a/device/arista/x86_64-arista_7060x6_64de/platform.json b/device/arista/x86_64-arista_7060x6_64de/platform.json
index 6af55dd4f..2bf04ce30 100644
--- a/device/arista/x86_64-arista_7060x6_64de/platform.json
+++ b/device/arista/x86_64-arista_7060x6_64de/platform.json
@@ -308,6 +308,12 @@
             },
             {
                 "name": "osfp64"
+            },
+            {
+                "name": "sfp65"
+            },
+            {
+                "name": "sfp66"
             }
         ]
     },
@@ -1719,6 +1725,24 @@
                     "Ethernet64/7"
                 ]
             }
+        },
+        "Ethernet512": {
+            "index": "65",
+            "lanes": "513",
+            "breakout_modes": {
+                "1x10G": [
+                    "Ethernet65"
+                ]
+            }
+        },
+        "Ethernet513": {
+            "index": "66",
+            "lanes": "515",
+            "breakout_modes": {
+                "1x10G": [
+                    "Ethernet66"
+                ]
+            }
         }
     }
-}
\ No newline at end of file
+}
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE/hwsku.json b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE/hwsku.json
new file mode 100644
index 000000000..62b564403
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE/hwsku.json
@@ -0,0 +1,202 @@
+{
+    "interfaces": {
+        "Ethernet0": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet8": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet16": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet24": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet32": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet40": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet48": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet56": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet64": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet72": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet80": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet88": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet96": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet104": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet112": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet120": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet128": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet136": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet144": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet152": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet160": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet168": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet176": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet184": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet192": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet200": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet208": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet216": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet224": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet232": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet240": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet248": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet256": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet264": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet272": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet280": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet288": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet296": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet304": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet312": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet320": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet328": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet336": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet344": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet352": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet360": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet368": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet376": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet384": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet392": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet400": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet408": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet416": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet424": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet432": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet440": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet448": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet456": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet464": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet472": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet480": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet488": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet496": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet504": {
+            "default_brkout_mode": "1x800G[400G]"
+        },
+        "Ethernet512": {
+            "default_brkout_mode": "1x10G"
+        },
+        "Ethernet513": {
+            "default_brkout_mode": "1x10G"
+        }
+    }
+}
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE/port_config.ini b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE/port_config.ini
index 48d2519c0..881462c06 100644
--- a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE/port_config.ini
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE/port_config.ini
@@ -63,3 +63,5 @@ Ethernet480  505,506,507,508,509,510,511,512  Ethernet61/1  61     800000  rs
 Ethernet488  489,490,491,492,493,494,495,496  Ethernet62/1  62     800000  rs
 Ethernet496  481,482,483,484,485,486,487,488  Ethernet63/1  63     800000  rs
 Ethernet504  497,498,499,500,501,502,503,504  Ethernet64/1  64     800000  rs
+Ethernet512  513                              Ethernet65    65     10000   none
+Ethernet513  515                              Ethernet66    66     10000   none
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE/th5-a7060x6-64pe.config.bcm b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE/th5-a7060x6-64pe.config.bcm
index 015f79440..2db52548e 100644
--- a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE/th5-a7060x6-64pe.config.bcm
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE/th5-a7060x6-64pe.config.bcm
@@ -1074,6 +1074,14 @@ device:
                 PORT_ID: 342
             :
                 PC_PHYS_PORT_ID: 505
+            ?
+                PORT_ID: 76
+            :
+                PC_PHYS_PORT_ID: 513
+            ?
+                PORT_ID: 274
+            :
+                PC_PHYS_PORT_ID: 515
 ...
 ---
 device:
@@ -1118,6 +1126,13 @@ device:
                 NUM_LANES: 8
                 FEC_MODE: PC_FEC_RS544_2XN
                 MAX_FRAME_SIZE: 9416
+            ?
+                PORT_ID: [[76, 76], [274, 274]]
+            :
+                ENABLE: 0
+                MAX_FRAME_SIZE: 9416
+                SPEED: 10000
+                NUM_LANES: 1
 ...
 ---
 bcm_device:
diff --git a/device/arista/x86_64-arista_7060x6_64pe/platform.json b/device/arista/x86_64-arista_7060x6_64pe/platform.json
index 45c564a12..1d8ef14e4 100644
--- a/device/arista/x86_64-arista_7060x6_64pe/platform.json
+++ b/device/arista/x86_64-arista_7060x6_64pe/platform.json
@@ -304,6 +304,12 @@
             },
             {
                 "name": "osfp64"
+            },
+            {
+                "name": "sfp65"
+            },
+            {
+                "name": "sfp66"
             }
         ]
     },
@@ -1715,6 +1721,24 @@
                     "Ethernet64/7"
                 ]
             }
+        },
+        "Ethernet512": {
+            "index": "65",
+            "lanes": "513",
+            "breakout_modes": {
+                "1x10G": [
+                    "Ethernet65"
+                ]
+            }
+        },
+        "Ethernet513": {
+            "index": "66",
+            "lanes": "515",
+            "breakout_modes": {
+                "1x10G": [
+                    "Ethernet66"
+                ]
+            }
         }
     }
-}
\ No newline at end of file
+}

From 676a87ca59399012046b7232ac1655f98506c204 Mon Sep 17 00:00:00 2001
From: Samuel Angebault <staphylo@arista.com>
Date: Wed, 1 May 2024 09:57:26 -0700
Subject: [PATCH 0651/1115] Add a 256x200G profile for QuicksilverP

---
 .../Arista-7060X6-64PE-256x200G/hwsku.json    | 202 ++++++++++++++++++
 .../port_config.ini                           |   2 +
 .../th5-a7060x6-64pe.config.bcm               |  15 ++
 3 files changed, 219 insertions(+)
 create mode 100644 device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/hwsku.json

diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/hwsku.json b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/hwsku.json
new file mode 100644
index 000000000..5b1282251
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/hwsku.json
@@ -0,0 +1,202 @@
+{
+    "interfaces": {
+        "Ethernet0": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet8": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet16": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet24": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet32": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet40": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet48": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet56": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet64": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet72": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet80": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet88": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet96": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet104": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet112": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet120": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet128": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet136": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet144": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet152": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet160": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet168": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet176": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet184": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet192": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet200": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet208": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet216": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet224": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet232": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet240": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet248": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet256": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet264": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet272": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet280": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet288": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet296": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet304": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet312": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet320": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet328": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet336": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet344": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet352": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet360": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet368": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet376": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet384": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet392": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet400": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet408": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet416": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet424": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet432": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet440": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet448": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet456": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet464": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet472": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet480": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet488": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet496": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet504": {
+            "default_brkout_mode": "4x200G"
+        },
+        "Ethernet512": {
+            "default_brkout_mode": "1x10G"
+        },
+        "Ethernet513": {
+            "default_brkout_mode": "1x10G"
+        }
+    }
+}
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/port_config.ini b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/port_config.ini
index 323b8e261..86b32b0bf 100644
--- a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/port_config.ini
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/port_config.ini
@@ -255,3 +255,5 @@ Ethernet504  497,498                          Ethernet64/1  64     200000  rs
 Ethernet506  499,500                          Ethernet64/3  64     200000  rs
 Ethernet508  501,502                          Ethernet64/5  64     200000  rs
 Ethernet510  503,504                          Ethernet64/7  64     200000  rs
+Ethernet512  513                              Ethernet65    65     10000   none
+Ethernet513  515                              Ethernet66    66     10000   none
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/th5-a7060x6-64pe.config.bcm b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/th5-a7060x6-64pe.config.bcm
index 997636fdc..103fff69e 100644
--- a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/th5-a7060x6-64pe.config.bcm
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/th5-a7060x6-64pe.config.bcm
@@ -1842,6 +1842,14 @@ device:
                 PORT_ID: 348
             :
                 PC_PHYS_PORT_ID: 511
+            ?
+                PORT_ID: 76
+            :
+                PC_PHYS_PORT_ID: 513
+            ?
+                PORT_ID: 274
+            :
+                PC_PHYS_PORT_ID: 515
 ...
 ---
 device:
@@ -1886,6 +1894,13 @@ device:
                 NUM_LANES: 2
                 FEC_MODE: PC_FEC_RS544_2XN
                 MAX_FRAME_SIZE: 9416
+            ?
+                PORT_ID: [[76, 76], [274, 274]]
+            :
+                ENABLE: 0
+                MAX_FRAME_SIZE: 9416
+                SPEED: 10000
+                NUM_LANES: 1
 ...
 ---
 bcm_device:

From 48c2cde05630e5a50c3f850192681782b1e3be36 Mon Sep 17 00:00:00 2001
From: Samuel Angebault <staphylo@arista.com>
Date: Tue, 7 May 2024 11:18:18 -0700
Subject: [PATCH 0652/1115] Add new 128x400G HwSku for QuicksilverP

---
 .../Arista-7060X6-64PE-128x400G/hwsku.json    |  202 +++
 .../port_config.ini                           |  131 ++
 .../Arista-7060X6-64PE-128x400G/sai.profile   |    1 +
 .../th5-a7060x6-64pe.config.bcm               | 1416 +++++++++++++++++
 4 files changed, 1750 insertions(+)
 create mode 100644 device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-128x400G/hwsku.json
 create mode 100644 device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-128x400G/port_config.ini
 create mode 100644 device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-128x400G/sai.profile
 create mode 100644 device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-128x400G/th5-a7060x6-64pe.config.bcm

diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-128x400G/hwsku.json b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-128x400G/hwsku.json
new file mode 100644
index 000000000..b40939ff0
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-128x400G/hwsku.json
@@ -0,0 +1,202 @@
+{
+    "interfaces": {
+        "Ethernet0": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet8": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet16": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet24": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet32": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet40": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet48": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet56": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet64": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet72": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet80": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet88": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet96": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet104": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet112": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet120": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet128": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet136": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet144": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet152": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet160": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet168": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet176": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet184": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet192": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet200": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet208": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet216": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet224": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet232": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet240": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet248": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet256": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet264": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet272": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet280": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet288": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet296": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet304": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet312": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet320": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet328": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet336": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet344": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet352": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet360": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet368": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet376": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet384": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet392": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet400": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet408": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet416": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet424": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet432": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet440": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet448": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet456": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet464": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet472": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet480": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet488": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet496": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet504": {
+            "default_brkout_mode": "2x400G"
+        },
+        "Ethernet512": {
+            "default_brkout_mode": "1x10G"
+        },
+        "Ethernet513": {
+            "default_brkout_mode": "1x10G"
+        }
+    }
+}
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-128x400G/port_config.ini b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-128x400G/port_config.ini
new file mode 100644
index 000000000..4fee0c95b
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-128x400G/port_config.ini
@@ -0,0 +1,131 @@
+# name       lanes                            alias         index  speed   fec
+Ethernet0    17,18,19,20                      Ethernet1/1   1      400000  rs
+Ethernet4    21,22,23,24                      Ethernet1/5   1      400000  rs
+Ethernet8    1,2,3,4                          Ethernet2/1   2      400000  rs
+Ethernet12   5,6,7,8                          Ethernet2/5   2      400000  rs
+Ethernet16   9,10,11,12                       Ethernet3/1   3      400000  rs
+Ethernet20   13,14,15,16                      Ethernet3/5   3      400000  rs
+Ethernet24   25,26,27,28                      Ethernet4/1   4      400000  rs
+Ethernet28   29,30,31,32                      Ethernet4/5   4      400000  rs
+Ethernet32   57,58,59,60                      Ethernet5/1   5      400000  rs
+Ethernet36   61,62,63,64                      Ethernet5/5   5      400000  rs
+Ethernet40   41,42,43,44                      Ethernet6/1   6      400000  rs
+Ethernet44   45,46,47,48                      Ethernet6/5   6      400000  rs
+Ethernet48   33,34,35,36                      Ethernet7/1   7      400000  rs
+Ethernet52   37,38,39,40                      Ethernet7/5   7      400000  rs
+Ethernet56   49,50,51,52                      Ethernet8/1   8      400000  rs
+Ethernet60   53,54,55,56                      Ethernet8/5   8      400000  rs
+Ethernet64   89,90,91,92                      Ethernet9/1   9      400000  rs
+Ethernet68   93,94,95,96                      Ethernet9/5   9      400000  rs
+Ethernet72   73,74,75,76                      Ethernet10/1  10     400000  rs
+Ethernet76   77,78,79,80                      Ethernet10/5  10     400000  rs
+Ethernet80   65,66,67,68                      Ethernet11/1  11     400000  rs
+Ethernet84   69,70,71,72                      Ethernet11/5  11     400000  rs
+Ethernet88   81,82,83,84                      Ethernet12/1  12     400000  rs
+Ethernet92   85,86,87,88                      Ethernet12/5  12     400000  rs
+Ethernet96   121,122,123,124                  Ethernet13/1  13     400000  rs
+Ethernet100  125,126,127,128                  Ethernet13/5  13     400000  rs
+Ethernet104  105,106,107,108                  Ethernet14/1  14     400000  rs
+Ethernet108  109,110,111,112                  Ethernet14/5  14     400000  rs
+Ethernet112  97,98,99,100                     Ethernet15/1  15     400000  rs
+Ethernet116  101,102,103,104                  Ethernet15/5  15     400000  rs
+Ethernet120  113,114,115,116                  Ethernet16/1  16     400000  rs
+Ethernet124  117,118,119,120                  Ethernet16/5  16     400000  rs
+Ethernet128  153,154,155,156                  Ethernet17/1  17     400000  rs
+Ethernet132  157,158,159,160                  Ethernet17/5  17     400000  rs
+Ethernet136  137,138,139,140                  Ethernet18/1  18     400000  rs
+Ethernet140  141,142,143,144                  Ethernet18/5  18     400000  rs
+Ethernet144  129,130,131,132                  Ethernet19/1  19     400000  rs
+Ethernet148  133,134,135,136                  Ethernet19/5  19     400000  rs
+Ethernet152  145,146,147,148                  Ethernet20/1  20     400000  rs
+Ethernet156  149,150,151,152                  Ethernet20/5  20     400000  rs
+Ethernet160  185,186,187,188                  Ethernet21/1  21     400000  rs
+Ethernet164  189,190,191,192                  Ethernet21/5  21     400000  rs
+Ethernet168  169,170,171,172                  Ethernet22/1  22     400000  rs
+Ethernet172  173,174,175,176                  Ethernet22/5  22     400000  rs
+Ethernet176  161,162,163,164                  Ethernet23/1  23     400000  rs
+Ethernet180  165,166,167,168                  Ethernet23/5  23     400000  rs
+Ethernet184  177,178,179,180                  Ethernet24/1  24     400000  rs
+Ethernet188  181,182,183,184                  Ethernet24/5  24     400000  rs
+Ethernet192  217,218,219,220                  Ethernet25/1  25     400000  rs
+Ethernet196  221,222,223,224                  Ethernet25/5  25     400000  rs
+Ethernet200  201,202,203,204                  Ethernet26/1  26     400000  rs
+Ethernet204  205,206,207,208                  Ethernet26/5  26     400000  rs
+Ethernet208  193,194,195,196                  Ethernet27/1  27     400000  rs
+Ethernet212  197,198,199,200                  Ethernet27/5  27     400000  rs
+Ethernet216  209,210,211,212                  Ethernet28/1  28     400000  rs
+Ethernet220  213,214,215,216                  Ethernet28/5  28     400000  rs
+Ethernet224  249,250,251,252                  Ethernet29/1  29     400000  rs
+Ethernet228  253,254,255,256                  Ethernet29/5  29     400000  rs
+Ethernet232  233,234,235,236                  Ethernet30/1  30     400000  rs
+Ethernet236  237,238,239,240                  Ethernet30/5  30     400000  rs
+Ethernet240  225,226,227,228                  Ethernet31/1  31     400000  rs
+Ethernet244  229,230,231,232                  Ethernet31/5  31     400000  rs
+Ethernet248  241,242,243,244                  Ethernet32/1  32     400000  rs
+Ethernet252  245,246,247,248                  Ethernet32/5  32     400000  rs
+Ethernet256  273,274,275,276                  Ethernet33/1  33     400000  rs
+Ethernet260  277,278,279,280                  Ethernet33/5  33     400000  rs
+Ethernet264  257,258,259,260                  Ethernet34/1  34     400000  rs
+Ethernet268  261,262,263,264                  Ethernet34/5  34     400000  rs
+Ethernet272  265,266,267,268                  Ethernet35/1  35     400000  rs
+Ethernet276  269,270,271,272                  Ethernet35/5  35     400000  rs
+Ethernet280  281,282,283,284                  Ethernet36/1  36     400000  rs
+Ethernet284  285,286,287,288                  Ethernet36/5  36     400000  rs
+Ethernet288  313,314,315,316                  Ethernet37/1  37     400000  rs
+Ethernet292  317,318,319,320                  Ethernet37/5  37     400000  rs
+Ethernet296  297,298,299,300                  Ethernet38/1  38     400000  rs
+Ethernet300  301,302,303,304                  Ethernet38/5  38     400000  rs
+Ethernet304  289,290,291,292                  Ethernet39/1  39     400000  rs
+Ethernet308  293,294,295,296                  Ethernet39/5  39     400000  rs
+Ethernet312  305,306,307,308                  Ethernet40/1  40     400000  rs
+Ethernet316  309,310,311,312                  Ethernet40/5  40     400000  rs
+Ethernet320  345,346,347,348                  Ethernet41/1  41     400000  rs
+Ethernet324  349,350,351,352                  Ethernet41/5  41     400000  rs
+Ethernet328  329,330,331,332                  Ethernet42/1  42     400000  rs
+Ethernet332  333,334,335,336                  Ethernet42/5  42     400000  rs
+Ethernet336  321,322,323,324                  Ethernet43/1  43     400000  rs
+Ethernet340  325,326,327,328                  Ethernet43/5  43     400000  rs
+Ethernet344  337,338,339,340                  Ethernet44/1  44     400000  rs
+Ethernet348  341,342,343,344                  Ethernet44/5  44     400000  rs
+Ethernet352  377,378,379,380                  Ethernet45/1  45     400000  rs
+Ethernet356  381,382,381,382                  Ethernet45/5  45     400000  rs
+Ethernet360  361,362,363,364                  Ethernet46/1  46     400000  rs
+Ethernet364  365,366,367,368                  Ethernet46/5  46     400000  rs
+Ethernet368  353,354,355,356                  Ethernet47/1  47     400000  rs
+Ethernet372  357,358,359,360                  Ethernet47/5  47     400000  rs
+Ethernet376  369,370,371,372                  Ethernet48/1  48     400000  rs
+Ethernet380  373,374,375,376                  Ethernet48/5  48     400000  rs
+Ethernet384  409,410,411,412                  Ethernet49/1  49     400000  rs
+Ethernet388  413,414,415,416                  Ethernet49/5  49     400000  rs
+Ethernet392  393,394,395,396                  Ethernet50/1  50     400000  rs
+Ethernet396  397,398,399,400                  Ethernet50/5  50     400000  rs
+Ethernet400  385,386,387,388                  Ethernet51/1  51     400000  rs
+Ethernet404  389,390,391,392                  Ethernet51/5  51     400000  rs
+Ethernet408  401,402,403,404                  Ethernet52/1  52     400000  rs
+Ethernet412  405,406,407,408                  Ethernet52/5  52     400000  rs
+Ethernet416  441,442,443,444                  Ethernet53/1  53     400000  rs
+Ethernet420  445,446,447,448                  Ethernet53/5  53     400000  rs
+Ethernet424  425,426,427,428                  Ethernet54/1  54     400000  rs
+Ethernet428  429,430,431,432                  Ethernet54/5  54     400000  rs
+Ethernet432  417,418,419,420                  Ethernet55/1  55     400000  rs
+Ethernet436  421,422,423,424                  Ethernet55/5  55     400000  rs
+Ethernet440  433,434,435,436                  Ethernet56/1  56     400000  rs
+Ethernet444  437,438,439,430                  Ethernet56/5  56     400000  rs
+Ethernet448  473,474,475,476                  Ethernet57/1  57     400000  rs
+Ethernet452  477,478,479,480                  Ethernet57/5  57     400000  rs
+Ethernet456  457,458,459,460                  Ethernet58/1  58     400000  rs
+Ethernet460  461,462,463,464                  Ethernet58/5  58     400000  rs
+Ethernet464  449,450,451,452                  Ethernet59/1  59     400000  rs
+Ethernet468  453,454,453,454                  Ethernet59/5  59     400000  rs
+Ethernet472  465,466,467,468                  Ethernet60/1  60     400000  rs
+Ethernet476  469,470,471,472                  Ethernet60/5  60     400000  rs
+Ethernet480  505,506,507,508                  Ethernet61/1  61     400000  rs
+Ethernet484  509,510,511,512                  Ethernet61/5  61     400000  rs
+Ethernet488  489,490,491,492                  Ethernet62/1  62     400000  rs
+Ethernet492  493,494,495,496                  Ethernet62/5  62     400000  rs
+Ethernet496  481,482,483,483                  Ethernet63/1  63     400000  rs
+Ethernet500  485,486,487,488                  Ethernet63/5  63     400000  rs
+Ethernet504  497,498,499,500                  Ethernet64/1  64     400000  rs
+Ethernet508  501,502,503,504                  Ethernet64/5  64     400000  rs
+Ethernet512  513                              Ethernet65    65     10000   none
+Ethernet513  515                              Ethernet66    66     10000   none
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-128x400G/sai.profile b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-128x400G/sai.profile
new file mode 100644
index 000000000..50c136d97
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-128x400G/sai.profile
@@ -0,0 +1 @@
+SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th5-a7060x6-64pe.config.bcm
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-128x400G/th5-a7060x6-64pe.config.bcm b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-128x400G/th5-a7060x6-64pe.config.bcm
new file mode 100644
index 000000000..6915862e1
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-128x400G/th5-a7060x6-64pe.config.bcm
@@ -0,0 +1,1416 @@
+#
+# $Copyright: (c) 2022 Broadcom.
+# Broadcom Proprietary and Confidential. All rights reserved.$
+#
+# BCM78900 64x800g port configuration.
+#
+# configuration yaml file
+#   device:
+#       <unit>:
+#           <table>:
+#               ?
+#                   <key_fld_1>: <value>
+#                   <key_fld_2>: <value>
+#                   ...
+#                   <key_fld_n>: <value>
+#               :
+#                   <data_fld_1>: <value>
+#                   <data_fld_2>: <value>
+#                   ...
+#                   <data_fld_n>: <value>
+#
+
+---
+bcm_device:
+    0:
+        global:
+            pktio_mode: 1
+            default_cpu_tx_queue: 7
+            vlan_flooding_l2mc_num_reserved: 0
+            ipv6_lpm_128b_enable: 1
+            shared_block_mask_section: uc_bc
+            skip_protocol_default_entries: 1
+            # LTSW uses value 1 for ALPM combined mode
+            l3_alpm_template: 1
+            l3_alpm_hit_skip: 1
+            sai_feat_tail_timestamp : 1
+            sai_port_phy_time_sync_en : 1
+            sai_field_group_auto_prioritize: 1
+            #l3_intf_vlan_split_egress for MTU at L3IF
+            l3_intf_vlan_split_egress : 1
+            pfc_deadlock_seq_control : 1
+            sai_tunnel_support: 2
+            bcm_tunnel_term_compatible_mode: 1
+            l3_ecmp_member_first_lkup_mem_size: 12288
+---
+device:
+    0:
+        PC_PM_CORE:
+            ?
+                PC_PM_ID: 3
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0x66
+                TX_POLARITY_FLIP: 0xaa
+            ?
+                PC_PM_ID: 1
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0x26
+                TX_POLARITY_FLIP: 0xaa
+            ?
+                PC_PM_ID: 2
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x55
+                TX_POLARITY_FLIP: 0x66
+            ?
+                PC_PM_ID: 4
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x55
+                TX_POLARITY_FLIP: 0x66
+            ?
+                PC_PM_ID: 8
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 6
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xb6
+            ?
+                PC_PM_ID: 5
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x23016745
+                TX_LANE_MAP: 0x54670123
+                RX_POLARITY_FLIP: 0x97
+                TX_POLARITY_FLIP: 0x35
+            ?
+                PC_PM_ID: 7
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 12
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 10
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 9
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 11
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 16
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 14
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 13
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 15
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 20
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 18
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 17
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 19
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 24
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 22
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 21
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 23
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 28
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x31204675
+                TX_LANE_MAP: 0x47561203
+                RX_POLARITY_FLIP: 0x11
+                TX_POLARITY_FLIP: 0x2b
+            ?
+                PC_PM_ID: 26
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 25
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 27
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0x9a
+            ?
+                PC_PM_ID: 32
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x33
+                TX_POLARITY_FLIP: 0xff
+            ?
+                PC_PM_ID: 30
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x33
+                TX_POLARITY_FLIP: 0xff
+            ?
+                PC_PM_ID: 29
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0x66
+            ?
+                PC_PM_ID: 31
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0x66
+            ?
+                PC_PM_ID: 35
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0x33
+                TX_POLARITY_FLIP: 0x00
+            ?
+                PC_PM_ID: 33
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0x33
+                TX_POLARITY_FLIP: 0x00
+            ?
+                PC_PM_ID: 34
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x66
+            ?
+                PC_PM_ID: 36
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x66
+            ?
+                PC_PM_ID: 40
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 38
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0x9a
+            ?
+                PC_PM_ID: 37
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x31204675
+                TX_LANE_MAP: 0x47561203
+                RX_POLARITY_FLIP: 0x11
+                TX_POLARITY_FLIP: 0x2b
+            ?
+                PC_PM_ID: 39
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 44
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 42
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 41
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 43
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 48
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 46
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 45
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 47
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 52
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 50
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 49
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 51
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 56
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 54
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 53
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 55
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 60
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x23016745
+                TX_LANE_MAP: 0x54670123
+                RX_POLARITY_FLIP: 0x97
+                TX_POLARITY_FLIP: 0x35
+            ?
+                PC_PM_ID: 58
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 57
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 59
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xb6
+            ?
+                PC_PM_ID: 64
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x67
+                TX_POLARITY_FLIP: 0x55
+            ?
+                PC_PM_ID: 62
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x66
+                TX_POLARITY_FLIP: 0x55
+            ?
+                PC_PM_ID: 61
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0xaa
+                TX_POLARITY_FLIP: 0x66
+            ?
+                PC_PM_ID: 63
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0xaa
+                TX_POLARITY_FLIP: 0x66
+---
+device:
+    0:
+        PC_PORT_PHYS_MAP:
+            ?
+                PORT_ID: 1
+            :
+                PC_PHYS_PORT_ID: 1
+            ?
+                PORT_ID: 2
+            :
+                PC_PHYS_PORT_ID: 5
+            ?
+                PORT_ID: 3
+            :
+                PC_PHYS_PORT_ID: 9
+            ?
+                PORT_ID: 4
+            :
+                PC_PHYS_PORT_ID: 13
+            ?
+                PORT_ID: 11
+            :
+                PC_PHYS_PORT_ID: 17
+            ?
+                PORT_ID: 12
+            :
+                PC_PHYS_PORT_ID: 21
+            ?
+                PORT_ID: 13
+            :
+                PC_PHYS_PORT_ID: 25
+            ?
+                PORT_ID: 14
+            :
+                PC_PHYS_PORT_ID: 29
+            ?
+                PORT_ID: 22
+            :
+                PC_PHYS_PORT_ID: 33
+            ?
+                PORT_ID: 23
+            :
+                PC_PHYS_PORT_ID: 37
+            ?
+                PORT_ID: 24
+            :
+                PC_PHYS_PORT_ID: 41
+            ?
+                PORT_ID: 25
+            :
+                PC_PHYS_PORT_ID: 45
+            ?
+                PORT_ID: 33
+            :
+                PC_PHYS_PORT_ID: 49
+            ?
+                PORT_ID: 34
+            :
+                PC_PHYS_PORT_ID: 53
+            ?
+                PORT_ID: 35
+            :
+                PC_PHYS_PORT_ID: 57
+            ?
+                PORT_ID: 36
+            :
+                PC_PHYS_PORT_ID: 61
+            ?
+                PORT_ID: 44
+            :
+                PC_PHYS_PORT_ID: 65
+            ?
+                PORT_ID: 45
+            :
+                PC_PHYS_PORT_ID: 69
+            ?
+                PORT_ID: 46
+            :
+                PC_PHYS_PORT_ID: 73
+            ?
+                PORT_ID: 47
+            :
+                PC_PHYS_PORT_ID: 77
+            ?
+                PORT_ID: 55
+            :
+                PC_PHYS_PORT_ID: 81
+            ?
+                PORT_ID: 56
+            :
+                PC_PHYS_PORT_ID: 85
+            ?
+                PORT_ID: 57
+            :
+                PC_PHYS_PORT_ID: 89
+            ?
+                PORT_ID: 58
+            :
+                PC_PHYS_PORT_ID: 93
+            ?
+                PORT_ID: 66
+            :
+                PC_PHYS_PORT_ID: 97
+            ?
+                PORT_ID: 67
+            :
+                PC_PHYS_PORT_ID: 101
+            ?
+                PORT_ID: 68
+            :
+                PC_PHYS_PORT_ID: 105
+            ?
+                PORT_ID: 69
+            :
+                PC_PHYS_PORT_ID: 109
+            ?
+                PORT_ID: 77
+            :
+                PC_PHYS_PORT_ID: 113
+            ?
+                PORT_ID: 78
+            :
+                PC_PHYS_PORT_ID: 117
+            ?
+                PORT_ID: 79
+            :
+                PC_PHYS_PORT_ID: 121
+            ?
+                PORT_ID: 80
+            :
+                PC_PHYS_PORT_ID: 125
+            ?
+                PORT_ID: 88
+            :
+                PC_PHYS_PORT_ID: 129
+            ?
+                PORT_ID: 89
+            :
+                PC_PHYS_PORT_ID: 133
+            ?
+                PORT_ID: 90
+            :
+                PC_PHYS_PORT_ID: 137
+            ?
+                PORT_ID: 91
+            :
+                PC_PHYS_PORT_ID: 141
+            ?
+                PORT_ID: 99
+            :
+                PC_PHYS_PORT_ID: 145
+            ?
+                PORT_ID: 100
+            :
+                PC_PHYS_PORT_ID: 149
+            ?
+                PORT_ID: 101
+            :
+                PC_PHYS_PORT_ID: 153
+            ?
+                PORT_ID: 102
+            :
+                PC_PHYS_PORT_ID: 157
+            ?
+                PORT_ID: 110
+            :
+                PC_PHYS_PORT_ID: 161
+            ?
+                PORT_ID: 111
+            :
+                PC_PHYS_PORT_ID: 165
+            ?
+                PORT_ID: 112
+            :
+                PC_PHYS_PORT_ID: 169
+            ?
+                PORT_ID: 113
+            :
+                PC_PHYS_PORT_ID: 173
+            ?
+                PORT_ID: 121
+            :
+                PC_PHYS_PORT_ID: 177
+            ?
+                PORT_ID: 122
+            :
+                PC_PHYS_PORT_ID: 181
+            ?
+                PORT_ID: 123
+            :
+                PC_PHYS_PORT_ID: 185
+            ?
+                PORT_ID: 124
+            :
+                PC_PHYS_PORT_ID: 189
+            ?
+                PORT_ID: 132
+            :
+                PC_PHYS_PORT_ID: 193
+            ?
+                PORT_ID: 133
+            :
+                PC_PHYS_PORT_ID: 197
+            ?
+                PORT_ID: 134
+            :
+                PC_PHYS_PORT_ID: 201
+            ?
+                PORT_ID: 135
+            :
+                PC_PHYS_PORT_ID: 205
+            ?
+                PORT_ID: 143
+            :
+                PC_PHYS_PORT_ID: 209
+            ?
+                PORT_ID: 144
+            :
+                PC_PHYS_PORT_ID: 213
+            ?
+                PORT_ID: 145
+            :
+                PC_PHYS_PORT_ID: 217
+            ?
+                PORT_ID: 146
+            :
+                PC_PHYS_PORT_ID: 221
+            ?
+                PORT_ID: 154
+            :
+                PC_PHYS_PORT_ID: 225
+            ?
+                PORT_ID: 155
+            :
+                PC_PHYS_PORT_ID: 229
+            ?
+                PORT_ID: 156
+            :
+                PC_PHYS_PORT_ID: 233
+            ?
+                PORT_ID: 157
+            :
+                PC_PHYS_PORT_ID: 237
+            ?
+                PORT_ID: 165
+            :
+                PC_PHYS_PORT_ID: 241
+            ?
+                PORT_ID: 166
+            :
+                PC_PHYS_PORT_ID: 245
+            ?
+                PORT_ID: 167
+            :
+                PC_PHYS_PORT_ID: 249
+            ?
+                PORT_ID: 168
+            :
+                PC_PHYS_PORT_ID: 253
+            ?
+                PORT_ID: 176
+            :
+                PC_PHYS_PORT_ID: 257
+            ?
+                PORT_ID: 177
+            :
+                PC_PHYS_PORT_ID: 261
+            ?
+                PORT_ID: 178
+            :
+                PC_PHYS_PORT_ID: 265
+            ?
+                PORT_ID: 179
+            :
+                PC_PHYS_PORT_ID: 269
+            ?
+                PORT_ID: 187
+            :
+                PC_PHYS_PORT_ID: 273
+            ?
+                PORT_ID: 188
+            :
+                PC_PHYS_PORT_ID: 277
+            ?
+                PORT_ID: 189
+            :
+                PC_PHYS_PORT_ID: 281
+            ?
+                PORT_ID: 190
+            :
+                PC_PHYS_PORT_ID: 285
+            ?
+                PORT_ID: 198
+            :
+                PC_PHYS_PORT_ID: 289
+            ?
+                PORT_ID: 199
+            :
+                PC_PHYS_PORT_ID: 293
+            ?
+                PORT_ID: 200
+            :
+                PC_PHYS_PORT_ID: 297
+            ?
+                PORT_ID: 201
+            :
+                PC_PHYS_PORT_ID: 301
+            ?
+                PORT_ID: 209
+            :
+                PC_PHYS_PORT_ID: 305
+            ?
+                PORT_ID: 210
+            :
+                PC_PHYS_PORT_ID: 309
+            ?
+                PORT_ID: 211
+            :
+                PC_PHYS_PORT_ID: 313
+            ?
+                PORT_ID: 212
+            :
+                PC_PHYS_PORT_ID: 317
+            ?
+                PORT_ID: 220
+            :
+                PC_PHYS_PORT_ID: 321
+            ?
+                PORT_ID: 221
+            :
+                PC_PHYS_PORT_ID: 325
+            ?
+                PORT_ID: 222
+            :
+                PC_PHYS_PORT_ID: 329
+            ?
+                PORT_ID: 223
+            :
+                PC_PHYS_PORT_ID: 333
+            ?
+                PORT_ID: 231
+            :
+                PC_PHYS_PORT_ID: 337
+            ?
+                PORT_ID: 232
+            :
+                PC_PHYS_PORT_ID: 341
+            ?
+                PORT_ID: 233
+            :
+                PC_PHYS_PORT_ID: 345
+            ?
+                PORT_ID: 234
+            :
+                PC_PHYS_PORT_ID: 349
+            ?
+                PORT_ID: 242
+            :
+                PC_PHYS_PORT_ID: 353
+            ?
+                PORT_ID: 243
+            :
+                PC_PHYS_PORT_ID: 357
+            ?
+                PORT_ID: 244
+            :
+                PC_PHYS_PORT_ID: 361
+            ?
+                PORT_ID: 245
+            :
+                PC_PHYS_PORT_ID: 365
+            ?
+                PORT_ID: 253
+            :
+                PC_PHYS_PORT_ID: 369
+            ?
+                PORT_ID: 254
+            :
+                PC_PHYS_PORT_ID: 373
+            ?
+                PORT_ID: 255
+            :
+                PC_PHYS_PORT_ID: 377
+            ?
+                PORT_ID: 256
+            :
+                PC_PHYS_PORT_ID: 381
+            ?
+                PORT_ID: 264
+            :
+                PC_PHYS_PORT_ID: 385
+            ?
+                PORT_ID: 265
+            :
+                PC_PHYS_PORT_ID: 389
+            ?
+                PORT_ID: 266
+            :
+                PC_PHYS_PORT_ID: 393
+            ?
+                PORT_ID: 267
+            :
+                PC_PHYS_PORT_ID: 397
+            ?
+                PORT_ID: 275
+            :
+                PC_PHYS_PORT_ID: 401
+            ?
+                PORT_ID: 276
+            :
+                PC_PHYS_PORT_ID: 405
+            ?
+                PORT_ID: 277
+            :
+                PC_PHYS_PORT_ID: 409
+            ?
+                PORT_ID: 278
+            :
+                PC_PHYS_PORT_ID: 413
+            ?
+                PORT_ID: 286
+            :
+                PC_PHYS_PORT_ID: 417
+            ?
+                PORT_ID: 287
+            :
+                PC_PHYS_PORT_ID: 421
+            ?
+                PORT_ID: 288
+            :
+                PC_PHYS_PORT_ID: 425
+            ?
+                PORT_ID: 289
+            :
+                PC_PHYS_PORT_ID: 429
+            ?
+                PORT_ID: 297
+            :
+                PC_PHYS_PORT_ID: 433
+            ?
+                PORT_ID: 298
+            :
+                PC_PHYS_PORT_ID: 437
+            ?
+                PORT_ID: 299
+            :
+                PC_PHYS_PORT_ID: 441
+            ?
+                PORT_ID: 300
+            :
+                PC_PHYS_PORT_ID: 445
+            ?
+                PORT_ID: 308
+            :
+                PC_PHYS_PORT_ID: 449
+            ?
+                PORT_ID: 309
+            :
+                PC_PHYS_PORT_ID: 453
+            ?
+                PORT_ID: 310
+            :
+                PC_PHYS_PORT_ID: 457
+            ?
+                PORT_ID: 311
+            :
+                PC_PHYS_PORT_ID: 461
+            ?
+                PORT_ID: 319
+            :
+                PC_PHYS_PORT_ID: 465
+            ?
+                PORT_ID: 320
+            :
+                PC_PHYS_PORT_ID: 469
+            ?
+                PORT_ID: 321
+            :
+                PC_PHYS_PORT_ID: 473
+            ?
+                PORT_ID: 322
+            :
+                PC_PHYS_PORT_ID: 477
+            ?
+                PORT_ID: 330
+            :
+                PC_PHYS_PORT_ID: 481
+            ?
+                PORT_ID: 331
+            :
+                PC_PHYS_PORT_ID: 485
+            ?
+                PORT_ID: 332
+            :
+                PC_PHYS_PORT_ID: 489
+            ?
+                PORT_ID: 333
+            :
+                PC_PHYS_PORT_ID: 493
+            ?
+                PORT_ID: 341
+            :
+                PC_PHYS_PORT_ID: 497
+            ?
+                PORT_ID: 342
+            :
+                PC_PHYS_PORT_ID: 501
+            ?
+                PORT_ID: 343
+            :
+                PC_PHYS_PORT_ID: 505
+            ?
+                PORT_ID: 344
+            :
+                PC_PHYS_PORT_ID: 509
+            ?
+                PORT_ID: 76
+            :
+                PC_PHYS_PORT_ID: 513
+            ?
+                PORT_ID: 274
+            :
+                PC_PHYS_PORT_ID: 515
+...
+---
+device:
+    0:
+        PC_PORT:
+            ?
+                PORT_ID: [[1, 4],
+                          [11, 14],
+                          [22, 25],
+                          [33, 36],
+                          [44, 47],
+                          [55, 58],
+                          [66, 69],
+                          [77, 80],
+                          [88, 91],
+                          [99, 102],
+                          [110, 113],
+                          [121, 124],
+                          [132, 135],
+                          [143, 146],
+                          [154, 157],
+                          [165, 168],
+                          [176, 179],
+                          [187, 190],
+                          [198, 201],
+                          [209, 212],
+                          [220, 223],
+                          [231, 234],
+                          [242, 245],
+                          [253, 256],
+                          [264, 267],
+                          [275, 278],
+                          [286, 289],
+                          [297, 300],
+                          [308, 311],
+                          [319, 322],
+                          [330, 333],
+                          [341, 344]]
+            :
+                ENABLE: 0
+                SPEED: 400000
+                NUM_LANES: 4
+                FEC_MODE: PC_FEC_RS544_2XN
+                MAX_FRAME_SIZE: 9416
+            ?
+                PORT_ID: [[76, 76], [274, 274]]
+            :
+                ENABLE: 0
+                MAX_FRAME_SIZE: 9416
+                SPEED: 10000
+                NUM_LANES: 1
+...
+---
+bcm_device:
+    0:
+        global:
+            ftem_mem_entries: 65536
+...
+---
+device:
+    0:
+        # Per pipe flex counter configuration
+        CTR_EFLEX_CONFIG:
+            CTR_ING_EFLEX_OPERMODE_PIPEUNIQUE: 0
+            CTR_EGR_EFLEX_OPERMODE_PIPEUNIQUE: 0
+
+        # IFP mode
+        FP_CONFIG:
+            FP_ING_OPERMODE: GLOBAL_PIPE_AWARE
+...
+---
+device:
+    0:
+        DEVICE_CONFIG:
+            AUTOLOAD_BOARD_SETTINGS: 0
+...

From 3e1043bc8452b6a6c91f11712a0bd8378e38aa07 Mon Sep 17 00:00:00 2001
From: David Meggy <davidm@arista.com>
Date: Wed, 8 May 2024 10:10:18 -0700
Subject: [PATCH 0653/1115] Add new 64x400G HwSku for QuicksilverP

---
 .../Arista-7060X6-64PE-64x400G/hwsku.json     |  202 +++
 .../port_config.ini                           |   67 +
 .../Arista-7060X6-64PE-64x400G/sai.profile    |    1 +
 .../th5-a7060x6-64pe.config.bcm               | 1160 +++++++++++++++++
 4 files changed, 1430 insertions(+)
 create mode 100644 device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-64x400G/hwsku.json
 create mode 100644 device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-64x400G/port_config.ini
 create mode 100644 device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-64x400G/sai.profile
 create mode 100644 device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-64x400G/th5-a7060x6-64pe.config.bcm

diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-64x400G/hwsku.json b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-64x400G/hwsku.json
new file mode 100644
index 000000000..155c1da1d
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-64x400G/hwsku.json
@@ -0,0 +1,202 @@
+{
+    "interfaces": {
+        "Ethernet0": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet8": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet16": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet24": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet32": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet40": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet48": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet56": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet64": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet72": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet80": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet88": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet96": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet104": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet112": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet120": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet128": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet136": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet144": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet152": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet160": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet168": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet176": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet184": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet192": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet200": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet208": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet216": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet224": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet232": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet240": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet248": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet256": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet264": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet272": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet280": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet288": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet296": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet304": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet312": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet320": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet328": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet336": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet344": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet352": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet360": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet368": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet376": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet384": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet392": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet400": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet408": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet416": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet424": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet432": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet440": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet448": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet456": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet464": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet472": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet480": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet488": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet496": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet504": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet512": {
+            "default_brkout_mode": "1x10G"
+        },
+        "Ethernet513": {
+            "default_brkout_mode": "1x10G"
+        }
+    }
+}
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-64x400G/port_config.ini b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-64x400G/port_config.ini
new file mode 100644
index 000000000..d29a307ac
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-64x400G/port_config.ini
@@ -0,0 +1,67 @@
+# name       lanes                            alias         index  speed   fec
+Ethernet0    17,18,19,20,21,22,23,24          Ethernet1/1   1      400000  rs
+Ethernet8    1,2,3,4,5,6,7,8                  Ethernet2/1   2      400000  rs
+Ethernet16   9,10,11,12,13,14,15,16           Ethernet3/1   3      400000  rs
+Ethernet24   25,26,27,28,29,30,31,32          Ethernet4/1   4      400000  rs
+Ethernet32   57,58,59,60,61,62,63,64          Ethernet5/1   5      400000  rs
+Ethernet40   41,42,43,44,45,46,47,48          Ethernet6/1   6      400000  rs
+Ethernet48   33,34,35,36,37,38,39,40          Ethernet7/1   7      400000  rs
+Ethernet56   49,50,51,52,53,54,55,56          Ethernet8/1   8      400000  rs
+Ethernet64   89,90,91,92,93,94,95,96          Ethernet9/1   9      400000  rs
+Ethernet72   73,74,75,76,77,78,79,80          Ethernet10/1  10     400000  rs
+Ethernet80   65,66,67,68,69,70,71,72          Ethernet11/1  11     400000  rs
+Ethernet88   81,82,83,84,85,86,87,88          Ethernet12/1  12     400000  rs
+Ethernet96   121,122,123,124,125,126,127,128  Ethernet13/1  13     400000  rs
+Ethernet104  105,106,107,108,109,110,111,112  Ethernet14/1  14     400000  rs
+Ethernet112  97,98,99,100,101,102,103,104     Ethernet15/1  15     400000  rs
+Ethernet120  113,114,115,116,117,118,119,120  Ethernet16/1  16     400000  rs
+Ethernet128  153,154,155,156,157,158,159,160  Ethernet17/1  17     400000  rs
+Ethernet136  137,138,139,140,141,142,143,144  Ethernet18/1  18     400000  rs
+Ethernet144  129,130,131,132,133,134,135,136  Ethernet19/1  19     400000  rs
+Ethernet152  145,146,147,148,149,150,151,152  Ethernet20/1  20     400000  rs
+Ethernet160  185,186,187,188,189,190,191,192  Ethernet21/1  21     400000  rs
+Ethernet168  169,170,171,172,173,174,175,176  Ethernet22/1  22     400000  rs
+Ethernet176  161,162,163,164,165,166,167,168  Ethernet23/1  23     400000  rs
+Ethernet184  177,178,179,180,181,182,183,184  Ethernet24/1  24     400000  rs
+Ethernet192  217,218,219,220,221,222,223,224  Ethernet25/1  25     400000  rs
+Ethernet200  201,202,203,204,205,206,207,208  Ethernet26/1  26     400000  rs
+Ethernet208  193,194,195,196,197,198,199,200  Ethernet27/1  27     400000  rs
+Ethernet216  209,210,211,212,213,214,215,216  Ethernet28/1  28     400000  rs
+Ethernet224  249,250,251,252,253,254,255,256  Ethernet29/1  29     400000  rs
+Ethernet232  233,234,235,236,237,238,239,240  Ethernet30/1  30     400000  rs
+Ethernet240  225,226,227,228,229,230,231,232  Ethernet31/1  31     400000  rs
+Ethernet248  241,242,243,244,245,246,247,248  Ethernet32/1  32     400000  rs
+Ethernet256  273,274,275,276,277,278,279,280  Ethernet33/1  33     400000  rs
+Ethernet264  257,258,259,260,261,262,263,264  Ethernet34/1  34     400000  rs
+Ethernet272  265,266,267,268,269,270,271,272  Ethernet35/1  35     400000  rs
+Ethernet280  281,282,283,284,285,286,287,288  Ethernet36/1  36     400000  rs
+Ethernet288  313,314,315,316,317,318,319,320  Ethernet37/1  37     400000  rs
+Ethernet296  297,298,299,300,301,302,303,304  Ethernet38/1  38     400000  rs
+Ethernet304  289,290,291,292,293,294,295,296  Ethernet39/1  39     400000  rs
+Ethernet312  305,306,307,308,309,310,311,312  Ethernet40/1  40     400000  rs
+Ethernet320  345,346,347,348,349,350,351,352  Ethernet41/1  41     400000  rs
+Ethernet328  329,330,331,332,333,334,335,336  Ethernet42/1  42     400000  rs
+Ethernet336  321,322,323,324,325,326,327,328  Ethernet43/1  43     400000  rs
+Ethernet344  337,338,339,340,341,342,343,344  Ethernet44/1  44     400000  rs
+Ethernet352  377,378,379,380,381,382,383,384  Ethernet45/1  45     400000  rs
+Ethernet360  361,362,363,364,365,366,367,368  Ethernet46/1  46     400000  rs
+Ethernet368  353,354,355,356,357,358,359,360  Ethernet47/1  47     400000  rs
+Ethernet376  369,370,371,372,373,374,375,376  Ethernet48/1  48     400000  rs
+Ethernet384  409,410,411,412,413,414,415,416  Ethernet49/1  49     400000  rs
+Ethernet392  393,394,395,396,397,398,399,400  Ethernet50/1  50     400000  rs
+Ethernet400  385,386,387,388,389,390,391,392  Ethernet51/1  51     400000  rs
+Ethernet408  401,402,403,404,405,406,407,408  Ethernet52/1  52     400000  rs
+Ethernet416  441,442,443,444,445,446,447,448  Ethernet53/1  53     400000  rs
+Ethernet424  425,426,427,428,429,430,431,432  Ethernet54/1  54     400000  rs
+Ethernet432  417,418,419,420,421,422,423,424  Ethernet55/1  55     400000  rs
+Ethernet440  433,434,435,436,437,438,439,440  Ethernet56/1  56     400000  rs
+Ethernet448  473,474,475,476,477,478,479,480  Ethernet57/1  57     400000  rs
+Ethernet456  457,458,459,460,461,462,463,464  Ethernet58/1  58     400000  rs
+Ethernet464  449,450,451,452,453,454,455,456  Ethernet59/1  59     400000  rs
+Ethernet472  465,466,467,468,469,470,471,472  Ethernet60/1  60     400000  rs
+Ethernet480  505,506,507,508,509,510,511,512  Ethernet61/1  61     400000  rs
+Ethernet488  489,490,491,492,493,494,495,496  Ethernet62/1  62     400000  rs
+Ethernet496  481,482,483,484,485,486,487,488  Ethernet63/1  63     400000  rs
+Ethernet504  497,498,499,500,501,502,503,504  Ethernet64/1  64     400000  rs
+Ethernet512  513                              Ethernet65    65     10000   none
+Ethernet513  515                              Ethernet66    66     10000   none
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-64x400G/sai.profile b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-64x400G/sai.profile
new file mode 100644
index 000000000..50c136d97
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-64x400G/sai.profile
@@ -0,0 +1 @@
+SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th5-a7060x6-64pe.config.bcm
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-64x400G/th5-a7060x6-64pe.config.bcm b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-64x400G/th5-a7060x6-64pe.config.bcm
new file mode 100644
index 000000000..a8f3023f9
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-64x400G/th5-a7060x6-64pe.config.bcm
@@ -0,0 +1,1160 @@
+#
+# $Copyright: (c) 2022 Broadcom.
+# Broadcom Proprietary and Confidential. All rights reserved.$
+#
+# BCM78900 64x800g port configuration.
+#
+# configuration yaml file
+#   device:
+#       <unit>:
+#           <table>:
+#               ?
+#                   <key_fld_1>: <value>
+#                   <key_fld_2>: <value>
+#                   ...
+#                   <key_fld_n>: <value>
+#               :
+#                   <data_fld_1>: <value>
+#                   <data_fld_2>: <value>
+#                   ...
+#                   <data_fld_n>: <value>
+#
+
+---
+bcm_device:
+    0:
+        global:
+            pktio_mode: 1
+            default_cpu_tx_queue: 7
+            vlan_flooding_l2mc_num_reserved: 0
+            ipv6_lpm_128b_enable: 1
+            shared_block_mask_section: uc_bc
+            skip_protocol_default_entries: 1
+            # LTSW uses value 1 for ALPM combined mode
+            l3_alpm_template: 1
+            l3_alpm_hit_skip: 1
+            sai_feat_tail_timestamp : 1
+            sai_port_phy_time_sync_en : 1
+            sai_field_group_auto_prioritize: 1
+            #l3_intf_vlan_split_egress for MTU at L3IF
+            l3_intf_vlan_split_egress : 1
+            pfc_deadlock_seq_control : 1
+            sai_tunnel_support: 2
+            bcm_tunnel_term_compatible_mode: 1
+            l3_ecmp_member_first_lkup_mem_size: 12288
+---
+device:
+    0:
+        PC_PM_CORE:
+            ?
+                PC_PM_ID: 3
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0x66
+                TX_POLARITY_FLIP: 0xaa
+            ?
+                PC_PM_ID: 1
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0x26
+                TX_POLARITY_FLIP: 0xaa
+            ?
+                PC_PM_ID: 2
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x55
+                TX_POLARITY_FLIP: 0x66
+            ?
+                PC_PM_ID: 4
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x55
+                TX_POLARITY_FLIP: 0x66
+            ?
+                PC_PM_ID: 8
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 6
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xb6
+            ?
+                PC_PM_ID: 5
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x23016745
+                TX_LANE_MAP: 0x54670123
+                RX_POLARITY_FLIP: 0x97
+                TX_POLARITY_FLIP: 0x35
+            ?
+                PC_PM_ID: 7
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 12
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 10
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 9
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 11
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 16
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 14
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 13
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 15
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 20
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 18
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 17
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 19
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 24
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 22
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 21
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 23
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 28
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x31204675
+                TX_LANE_MAP: 0x47561203
+                RX_POLARITY_FLIP: 0x11
+                TX_POLARITY_FLIP: 0x2b
+            ?
+                PC_PM_ID: 26
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 25
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 27
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0x9a
+            ?
+                PC_PM_ID: 32
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x33
+                TX_POLARITY_FLIP: 0xff
+            ?
+                PC_PM_ID: 30
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x33
+                TX_POLARITY_FLIP: 0xff
+            ?
+                PC_PM_ID: 29
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0x66
+            ?
+                PC_PM_ID: 31
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0x66
+            ?
+                PC_PM_ID: 35
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0x33
+                TX_POLARITY_FLIP: 0x00
+            ?
+                PC_PM_ID: 33
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0x33
+                TX_POLARITY_FLIP: 0x00
+            ?
+                PC_PM_ID: 34
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x66
+            ?
+                PC_PM_ID: 36
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x66
+            ?
+                PC_PM_ID: 40
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 38
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0x9a
+            ?
+                PC_PM_ID: 37
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x31204675
+                TX_LANE_MAP: 0x47561203
+                RX_POLARITY_FLIP: 0x11
+                TX_POLARITY_FLIP: 0x2b
+            ?
+                PC_PM_ID: 39
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 44
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 42
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 41
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 43
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 48
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 46
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2137654
+                TX_LANE_MAP: 0x30217654
+                RX_POLARITY_FLIP: 0xdd
+                TX_POLARITY_FLIP: 0xda
+            ?
+                PC_PM_ID: 45
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 47
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761302
+                TX_LANE_MAP: 0x54762130
+                RX_POLARITY_FLIP: 0x88
+                TX_POLARITY_FLIP: 0x58
+            ?
+                PC_PM_ID: 52
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 50
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 49
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 51
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 56
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 54
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 53
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 55
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 60
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x23016745
+                TX_LANE_MAP: 0x54670123
+                RX_POLARITY_FLIP: 0x97
+                TX_POLARITY_FLIP: 0x35
+            ?
+                PC_PM_ID: 58
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54760213
+                TX_LANE_MAP: 0x74563021
+                RX_POLARITY_FLIP: 0xc6
+                TX_POLARITY_FLIP: 0x65
+            ?
+                PC_PM_ID: 57
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 59
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13027654
+                TX_LANE_MAP: 0x21305674
+                RX_POLARITY_FLIP: 0x6c
+                TX_POLARITY_FLIP: 0xb6
+            ?
+                PC_PM_ID: 64
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x67
+                TX_POLARITY_FLIP: 0x55
+            ?
+                PC_PM_ID: 62
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32107654
+                TX_LANE_MAP: 0x54761032
+                RX_POLARITY_FLIP: 0x66
+                TX_POLARITY_FLIP: 0x55
+            ?
+                PC_PM_ID: 61
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0xaa
+                TX_POLARITY_FLIP: 0x66
+            ?
+                PC_PM_ID: 63
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54761032
+                TX_LANE_MAP: 0x32107654
+                RX_POLARITY_FLIP: 0xaa
+                TX_POLARITY_FLIP: 0x66
+---
+device:
+    0:
+        PC_PORT_PHYS_MAP:
+            ?
+                PORT_ID: 1
+            :
+                PC_PHYS_PORT_ID: 1
+            ?
+                PORT_ID: 2
+            :
+                PC_PHYS_PORT_ID: 9
+            ?
+                PORT_ID: 11
+            :
+                PC_PHYS_PORT_ID: 17
+            ?
+                PORT_ID: 12
+            :
+                PC_PHYS_PORT_ID: 25
+            ?
+                PORT_ID: 22
+            :
+                PC_PHYS_PORT_ID: 33
+            ?
+                PORT_ID: 23
+            :
+                PC_PHYS_PORT_ID: 41
+            ?
+                PORT_ID: 33
+            :
+                PC_PHYS_PORT_ID: 49
+            ?
+                PORT_ID: 34
+            :
+                PC_PHYS_PORT_ID: 57
+            ?
+                PORT_ID: 44
+            :
+                PC_PHYS_PORT_ID: 65
+            ?
+                PORT_ID: 45
+            :
+                PC_PHYS_PORT_ID: 73
+            ?
+                PORT_ID: 55
+            :
+                PC_PHYS_PORT_ID: 81
+            ?
+                PORT_ID: 56
+            :
+                PC_PHYS_PORT_ID: 89
+            ?
+                PORT_ID: 66
+            :
+                PC_PHYS_PORT_ID: 97
+            ?
+                PORT_ID: 67
+            :
+                PC_PHYS_PORT_ID: 105
+            ?
+                PORT_ID: 77
+            :
+                PC_PHYS_PORT_ID: 113
+            ?
+                PORT_ID: 78
+            :
+                PC_PHYS_PORT_ID: 121
+            ?
+                PORT_ID: 88
+            :
+                PC_PHYS_PORT_ID: 129
+            ?
+                PORT_ID: 89
+            :
+                PC_PHYS_PORT_ID: 137
+            ?
+                PORT_ID: 99
+            :
+                PC_PHYS_PORT_ID: 145
+            ?
+                PORT_ID: 100
+            :
+                PC_PHYS_PORT_ID: 153
+            ?
+                PORT_ID: 110
+            :
+                PC_PHYS_PORT_ID: 161
+            ?
+                PORT_ID: 111
+            :
+                PC_PHYS_PORT_ID: 169
+            ?
+                PORT_ID: 121
+            :
+                PC_PHYS_PORT_ID: 177
+            ?
+                PORT_ID: 122
+            :
+                PC_PHYS_PORT_ID: 185
+            ?
+                PORT_ID: 132
+            :
+                PC_PHYS_PORT_ID: 193
+            ?
+                PORT_ID: 133
+            :
+                PC_PHYS_PORT_ID: 201
+            ?
+                PORT_ID: 143
+            :
+                PC_PHYS_PORT_ID: 209
+            ?
+                PORT_ID: 144
+            :
+                PC_PHYS_PORT_ID: 217
+            ?
+                PORT_ID: 154
+            :
+                PC_PHYS_PORT_ID: 225
+            ?
+                PORT_ID: 155
+            :
+                PC_PHYS_PORT_ID: 233
+            ?
+                PORT_ID: 165
+            :
+                PC_PHYS_PORT_ID: 241
+            ?
+                PORT_ID: 166
+            :
+                PC_PHYS_PORT_ID: 249
+            ?
+                PORT_ID: 176
+            :
+                PC_PHYS_PORT_ID: 257
+            ?
+                PORT_ID: 177
+            :
+                PC_PHYS_PORT_ID: 265
+            ?
+                PORT_ID: 187
+            :
+                PC_PHYS_PORT_ID: 273
+            ?
+                PORT_ID: 188
+            :
+                PC_PHYS_PORT_ID: 281
+            ?
+                PORT_ID: 198
+            :
+                PC_PHYS_PORT_ID: 289
+            ?
+                PORT_ID: 199
+            :
+                PC_PHYS_PORT_ID: 297
+            ?
+                PORT_ID: 209
+            :
+                PC_PHYS_PORT_ID: 305
+            ?
+                PORT_ID: 210
+            :
+                PC_PHYS_PORT_ID: 313
+            ?
+                PORT_ID: 220
+            :
+                PC_PHYS_PORT_ID: 321
+            ?
+                PORT_ID: 221
+            :
+                PC_PHYS_PORT_ID: 329
+            ?
+                PORT_ID: 231
+            :
+                PC_PHYS_PORT_ID: 337
+            ?
+                PORT_ID: 232
+            :
+                PC_PHYS_PORT_ID: 345
+            ?
+                PORT_ID: 242
+            :
+                PC_PHYS_PORT_ID: 353
+            ?
+                PORT_ID: 243
+            :
+                PC_PHYS_PORT_ID: 361
+            ?
+                PORT_ID: 253
+            :
+                PC_PHYS_PORT_ID: 369
+            ?
+                PORT_ID: 254
+            :
+                PC_PHYS_PORT_ID: 377
+            ?
+                PORT_ID: 264
+            :
+                PC_PHYS_PORT_ID: 385
+            ?
+                PORT_ID: 265
+            :
+                PC_PHYS_PORT_ID: 393
+            ?
+                PORT_ID: 275
+            :
+                PC_PHYS_PORT_ID: 401
+            ?
+                PORT_ID: 276
+            :
+                PC_PHYS_PORT_ID: 409
+            ?
+                PORT_ID: 286
+            :
+                PC_PHYS_PORT_ID: 417
+            ?
+                PORT_ID: 287
+            :
+                PC_PHYS_PORT_ID: 425
+            ?
+                PORT_ID: 297
+            :
+                PC_PHYS_PORT_ID: 433
+            ?
+                PORT_ID: 298
+            :
+                PC_PHYS_PORT_ID: 441
+            ?
+                PORT_ID: 308
+            :
+                PC_PHYS_PORT_ID: 449
+            ?
+                PORT_ID: 309
+            :
+                PC_PHYS_PORT_ID: 457
+            ?
+                PORT_ID: 319
+            :
+                PC_PHYS_PORT_ID: 465
+            ?
+                PORT_ID: 320
+            :
+                PC_PHYS_PORT_ID: 473
+            ?
+                PORT_ID: 330
+            :
+                PC_PHYS_PORT_ID: 481
+            ?
+                PORT_ID: 331
+            :
+                PC_PHYS_PORT_ID: 489
+            ?
+                PORT_ID: 341
+            :
+                PC_PHYS_PORT_ID: 497
+            ?
+                PORT_ID: 342
+            :
+                PC_PHYS_PORT_ID: 505
+            ?
+                PORT_ID: 76
+            :
+                PC_PHYS_PORT_ID: 513
+            ?
+                PORT_ID: 274
+            :
+                PC_PHYS_PORT_ID: 515
+...
+---
+device:
+    0:
+        PC_PORT:
+            ?
+                PORT_ID: [[1, 2],
+                          [11, 12],
+                          [22, 23],
+                          [33, 34],
+                          [44, 45],
+                          [55, 56],
+                          [66, 67],
+                          [77, 78],
+                          [88, 89],
+                          [99, 100],
+                          [110, 111],
+                          [121, 122],
+                          [132, 133],
+                          [143, 144],
+                          [154, 155],
+                          [165, 166],
+                          [176, 177],
+                          [187, 188],
+                          [198, 199],
+                          [209, 210],
+                          [220, 221],
+                          [231, 232],
+                          [242, 243],
+                          [253, 254],
+                          [264, 265],
+                          [275, 276],
+                          [286, 287],
+                          [297, 298],
+                          [308, 309],
+                          [319, 320],
+                          [330, 331],
+                          [341, 342]]
+            :
+                ENABLE: 1
+                SPEED: 400000
+                NUM_LANES: 8
+                FEC_MODE: PC_FEC_RS544_2XN
+                MAX_FRAME_SIZE: 9416
+            ?
+                PORT_ID: [[76, 76], [274, 274]]
+            :
+                ENABLE: 0
+                MAX_FRAME_SIZE: 9416
+                SPEED: 10000
+                NUM_LANES: 1
+...
+---
+bcm_device:
+    0:
+        global:
+            ftem_mem_entries: 65536
+...
+---
+device:
+    0:
+        # Per pipe flex counter configuration
+        CTR_EFLEX_CONFIG:
+            CTR_ING_EFLEX_OPERMODE_PIPEUNIQUE: 0
+            CTR_EGR_EFLEX_OPERMODE_PIPEUNIQUE: 0
+
+        # IFP mode
+        FP_CONFIG:
+            FP_ING_OPERMODE: GLOBAL_PIPE_AWARE
+...
+---
+device:
+    0:
+        DEVICE_CONFIG:
+            AUTOLOAD_BOARD_SETTINGS: 0
+...

From 7d42d490e7d9c75de1572b5137377c86a5871a76 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sun, 26 May 2024 16:01:20 +0800
Subject: [PATCH 0654/1115] [submodule] Update submodule linkmgrd to the latest
 HEAD automatically (#19079)

#### Why I did it
src/linkmgrd
```
* f96d40c - (HEAD -> master, origin/master, origin/HEAD) [active-standby] add knob to enable/disable oscillation (#250) (17 hours ago) [Jing Zhang]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/linkmgrd | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/linkmgrd b/src/linkmgrd
index dd618447e..f96d40cfb 160000
--- a/src/linkmgrd
+++ b/src/linkmgrd
@@ -1 +1 @@
-Subproject commit dd618447e2cc1838431d94f1f8bffa807ef65d89
+Subproject commit f96d40cfbe4a771c60579935998ae2c52816c4ea

From e1eb9e9854708e6c126e553cdd8f6d0e4f71d399 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sun, 26 May 2024 16:01:34 +0800
Subject: [PATCH 0655/1115] [submodule] Update submodule sonic-swss to the
 latest HEAD automatically (#19064)

#### Why I did it
src/sonic-swss
```
* 3ee73618 - (HEAD -> master, origin/master, origin/HEAD) [orchagent] Add support for Path Tracing Midpoint (#2903) (34 hours ago) [Carmine Scarpitta]
* 5ffb0b50 - [Bridge] Disable MAC learning for Link Local Mulitcast Frames on the kernel bridge (#3162) (2 days ago) [Gord Chen]
* de9baac1 - [Marvell] PFC Detect lua script (#3160) (2 days ago) [Rajkumar-Marvell]
* 31d9d6c1 - Add fabric counter rate mbps command handling. (#3129) (2 days ago) [jfeng-arista]
* 425a8526 - Parse subport value added to config_db (#3161) (2 days ago) [Bobby McGonigle]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-swss | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-swss b/src/sonic-swss
index a280e3675..3ee73618d 160000
--- a/src/sonic-swss
+++ b/src/sonic-swss
@@ -1 +1 @@
-Subproject commit a280e367564cce6d8138fe39a0ce031b516c5699
+Subproject commit 3ee73618d41052ff24234a34e75551f12b5ba940

From 8c35340964cd33111aaf70ef6551806ef4ed0104 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sun, 26 May 2024 19:00:53 +0800
Subject: [PATCH 0656/1115] [submodule] Update submodule sonic-sairedis to the
 latest HEAD automatically (#19074)

#### Why I did it
src/sonic-sairedis
```
* c3ad5ce - (HEAD -> master, origin/master, origin/HEAD) [saiproxy] Add SAI proxy library (#1363) (10 hours ago) [Kamil Cudnik]
* d4a085f - Skip ASIC_TEMPERATURE attributes from sairedis recording (#1375) (19 hours ago) [saksarav-nokia]
* 456780e - [nvidia] update config_syncd_nvidia_bluefield() (#1380) (22 hours ago) [Yakiv Huryk]
* 79b27c0 - Add check for global SAI api used (#1379) (30 hours ago) [Kamil Cudnik]
* 0adbe25 - (origin/202405) [submodule] Update SAI submodule to v1.14 (#1381) (2 days ago) [Kamil Cudnik]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-sairedis | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-sairedis b/src/sonic-sairedis
index a83b083a6..c3ad5ce62 160000
--- a/src/sonic-sairedis
+++ b/src/sonic-sairedis
@@ -1 +1 @@
-Subproject commit a83b083a6e1cb71127bf09c0778673b2934d4891
+Subproject commit c3ad5ce62e48fd6afcc19672c57258388fd6fedb

From c9135945de2e8b56fce6beed471e39f7f576cf5a Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sun, 26 May 2024 19:00:58 +0800
Subject: [PATCH 0657/1115] [submodule] Update submodule sonic-linux-kernel to
 the latest HEAD automatically (#19073)

#### Why I did it
src/sonic-linux-kernel
```
* 9770e13 - (HEAD -> master, origin/master, origin/HEAD) Add patch of SONiC Linux kernel DTS file to support Supermicro SSE-G3748 board. (#394) (27 hours ago) [Erich Yen]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-linux-kernel | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-linux-kernel b/src/sonic-linux-kernel
index f182d03e9..9770e1382 160000
--- a/src/sonic-linux-kernel
+++ b/src/sonic-linux-kernel
@@ -1 +1 @@
-Subproject commit f182d03e9155a429d62a0dbf08ad8f5a33f2bc83
+Subproject commit 9770e1382add4f667d1e809a7d03de76e69a6c60

From d3fbec017efe9f33b588802563cd535abacb8766 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Mon, 27 May 2024 19:00:39 +0800
Subject: [PATCH 0658/1115] [submodule] Update submodule sonic-sairedis to the
 latest HEAD automatically (#19086)

#### Why I did it
src/sonic-sairedis
```
* 20bcfe1 - (HEAD -> master, origin/master, origin/HEAD) [SaiInterface] Support sai_query_api_version api (#1383) (10 hours ago) [Kamil Cudnik]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-sairedis | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-sairedis b/src/sonic-sairedis
index c3ad5ce62..20bcfe196 160000
--- a/src/sonic-sairedis
+++ b/src/sonic-sairedis
@@ -1 +1 @@
-Subproject commit c3ad5ce62e48fd6afcc19672c57258388fd6fedb
+Subproject commit 20bcfe1965a8f9f64e25355783994165b780839a

From 3debe78879bf4e00e88a03155e281764babfc8a0 Mon Sep 17 00:00:00 2001
From: Liu Shilong <shilongliu@microsoft.com>
Date: Mon, 27 May 2024 20:39:27 +0800
Subject: [PATCH 0659/1115] [build] Fix docker-telemetry dependency issue.
 (#19089)

Why I did it
PR#19011 forget to migrate docker-sonic-telemetry-dbg to bookworm.
It breaks docker-sonic-telemetry's debug image build.

Work item tracking
Microsoft ADO (number only): 28202870
How I did it
How to verify it
---
 rules/docker-telemetry.mk | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/rules/docker-telemetry.mk b/rules/docker-telemetry.mk
index 4ccd2781b..f710eedd5 100644
--- a/rules/docker-telemetry.mk
+++ b/rules/docker-telemetry.mk
@@ -22,7 +22,7 @@ SONIC_INSTALL_DOCKER_IMAGES += $(DOCKER_TELEMETRY)
 endif
 
 SONIC_DOCKER_DBG_IMAGES += $(DOCKER_TELEMETRY_DBG)
-SONIC_BULLSEYE_DBG_DOCKERS += $(DOCKER_TELEMETRY_DBG)
+SONIC_BOOKWORM_DBG_DOCKERS += $(DOCKER_TELEMETRY_DBG)
 ifeq ($(INCLUDE_SYSTEM_TELEMETRY), y)
 SONIC_INSTALL_DOCKER_DBG_IMAGES += $(DOCKER_TELEMETRY_DBG)
 endif

From d1875c66ea0d15b218c011f572ed8884a389176d Mon Sep 17 00:00:00 2001
From: Yaqiang Zhu <zyq1512099831@gmail.com>
Date: Tue, 28 May 2024 14:51:26 +0800
Subject: [PATCH 0660/1115] [bgp] Add dependency in bgpcfgd (#19088)

Why I did it
These 2 dependencies were removed by #18764 and #18727 for decoupling hard dependency between Loopback IPv4 address and BGP.
Actually, these dependencies are to make sure existence of Loopback interface, no need to remove.

Work item tracking
Microsoft ADO (number only): 28210625
How I did it
Add dependency back

How to verify it
UT passed.
---
 src/sonic-bgpcfgd/bgpcfgd/managers_bgp.py | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/src/sonic-bgpcfgd/bgpcfgd/managers_bgp.py b/src/sonic-bgpcfgd/bgpcfgd/managers_bgp.py
index 26202ebc5..de85a2f84 100644
--- a/src/sonic-bgpcfgd/bgpcfgd/managers_bgp.py
+++ b/src/sonic-bgpcfgd/bgpcfgd/managers_bgp.py
@@ -106,6 +106,7 @@ def __init__(self, common_objs, db_name, table_name, peer_type, check_neig_meta)
 
         deps = [
             ("CONFIG_DB", swsscommon.CFG_DEVICE_METADATA_TABLE_NAME, "localhost/bgp_asn"),
+            ("CONFIG_DB", swsscommon.CFG_LOOPBACK_INTERFACE_TABLE_NAME, "Loopback0"),
             ("CONFIG_DB", swsscommon.CFG_BGP_DEVICE_GLOBAL_TABLE_NAME, "tsa_enabled"),
             ("LOCAL", "local_addresses", ""),
             ("LOCAL", "interfaces", ""),
@@ -128,6 +129,9 @@ def __init__(self, common_objs, db_name, table_name, peer_type, check_neig_meta)
         if self.check_deployment_id:
             deps.append(("CONFIG_DB", swsscommon.CFG_DEVICE_METADATA_TABLE_NAME, "localhost/deployment_id"))
 
+        if self.peer_type == 'internal':
+            deps.append(("CONFIG_DB", swsscommon.CFG_LOOPBACK_INTERFACE_TABLE_NAME, "Loopback4096"))
+
         super(BGPPeerMgrBase, self).__init__(
             common_objs,
             deps,

From 10e0df97d84a8cd11c88befab1e726a34be8950b Mon Sep 17 00:00:00 2001
From: Tomer Shalvi <116184476+tshalvi@users.noreply.github.com>
Date: Tue, 28 May 2024 14:01:01 +0300
Subject: [PATCH 0661/1115] [Mellanox] Verify the value of the control type
 sysfs before changing it to FW control (#19046)

- Why I did it
On Mellanox platforms, changing the control type sysfs value is not supported for ports that are set to firmware control. Therefore, attempting to change this value to firmware control will result in an error log, which we want to avoid.

- How I did it
I added a check to ensure that the control sysfs value is set to firmware control only if it is not already in firmware control.

- How to verify it
Ensure that after a warm reboot on the Mellanox platform (an attempt to change the sysfs value from fw_control to fw_control is only applicable in this scenario), the following error does not appear:
sxd_kernel: [error] sx_core_set_module_control: Failed control change: module is dependent (FW control).
---
 platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py b/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py
index e7874a658..7b21f22ca 100644
--- a/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py
+++ b/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py
@@ -1492,8 +1492,9 @@ def action_on_sw_control(cls, sfp):
         
     @classmethod
     def action_on_fw_control(cls, sfp):
-        logger.log_info(f'SFP {sfp.sdk_index} is set to firmware control')
-        sfp.set_control_type(SFP_FW_CONTROL)
+        if sfp.get_control_type() != SFP_FW_CONTROL:
+            logger.log_info(f'SFP {sfp.sdk_index} is set to firmware control')
+            sfp.set_control_type(SFP_FW_CONTROL)
         
     @classmethod
     def action_on_cancel_wait(cls, sfp):

From 319c02472278c009856d79c08d784126c74b3003 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Tue, 28 May 2024 22:01:00 +0800
Subject: [PATCH 0662/1115] [submodule] Update submodule sonic-swss-common to
 the latest HEAD automatically (#19096)

#### Why I did it
src/sonic-swss-common
```
* 3750752 - (HEAD -> master, origin/master, origin/HEAD) [ci] Use requests==2.31.0 instead of latest version to avoid test failure. (#877) (14 hours ago) [Liu Shilong]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-swss-common | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-swss-common b/src/sonic-swss-common
index 00445404f..3750752df 160000
--- a/src/sonic-swss-common
+++ b/src/sonic-swss-common
@@ -1 +1 @@
-Subproject commit 00445404fff6d3673464e2a5defca1dc97ab3a43
+Subproject commit 3750752dfaf68d3d2cecf49ad77cdadde3c9a955

From d0548cfe7b36c8bd95e5cc473e46fc9b92dda27b Mon Sep 17 00:00:00 2001
From: Hua Liu <58683130+liuh-80@users.noreply.github.com>
Date: Wed, 29 May 2024 05:59:24 +0800
Subject: [PATCH 0663/1115] Update orchagent.sh (#19062)

Fix Orchagent crash during boot because of eth0 not config address.

#### Why I did it
Fix https://github.com/sonic-net/sonic-buildimage/issues/19044
On SmartSwitch DPU the eth0 might not config any address

##### Work item tracking
- Microsoft ADO: 28188952

#### How I did it
Fix Orchagent crash during boot because of eth0 not config address.

#### How to verify it
Pass all UT.
Manually verified the orchagent not crash when eth not config address:
root       20026  8.3  1.2 748344 49512 pts/0    Sl   06:25   0:03 /usr/bin/orchagent -d /var/log/swss -b 1024 -s -m 22:48:23:27:33:d8 -q tcp://127.0.0.1:8100

#### Description for the changelog
Fix Orchagent crash during boot because of eth0 not config address.
---
 dockers/docker-orchagent/orchagent.sh | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/dockers/docker-orchagent/orchagent.sh b/dockers/docker-orchagent/orchagent.sh
index 1b2a1b88a..df29c6a25 100755
--- a/dockers/docker-orchagent/orchagent.sh
+++ b/dockers/docker-orchagent/orchagent.sh
@@ -82,7 +82,7 @@ if [[ x"${LOCALHOST_SUBTYPE}" == x"SmartSwitch" ]]; then
     if [[ $midplane_ip != "" ]]; then
         # Enable ZMQ with eth0-midplane address
         ORCHAGENT_ARGS+=" -q tcp://${midplane_mgmt_ip}:8100"
-    elif [[ $mgmt_ip != "" ]]; then
+    elif [[ $mgmt_ip != "" ]] && [[ $mgmt_ip != "null" ]]; then
         # If eth0-midplane interface does not exist, enable ZMQ with eth0 address
         ORCHAGENT_ARGS+=" -q tcp://${mgmt_ip}:8100"
     else

From f7793790b731b03235d9ecc12049de1fb5b50641 Mon Sep 17 00:00:00 2001
From: Arvindsrinivasan Lakshmi Narasimhan
 <55814491+arlakshm@users.noreply.github.com>
Date: Tue, 28 May 2024 22:28:08 -0700
Subject: [PATCH 0664/1115] [chassis] Minigraph parser changes (#19018)

Update the minigraph parser to support chassis production minigraph

Microsoft ADO 28223907:

How I did it
Make changes the following changes in the parser to parse production minigraph for sonic T2 chassis and generate the configuration required for SONiC T2

- Support parsing of the system-ports for voq chassis from the production minigraph
- Generate the chassis level port alias for all the ports in the chassis from the minigraph
- Generate the chassis hostname in the device metadata for all the linecards from the minigraph
- Generate the voqinband interface for voq chassis.
- Update the actual port speed for linecards based on the minigraph.
- Add UT for voq and packet chassis minigraphs.
---
 src/sonic-config-engine/minigraph.py          |   658 +-
 .../packet-chassis-port-config-1.ini          |    49 +
 .../packet_chassis_sup.xml                    | 53496 ++++++++++++++++
 .../voq_chassis_data/system_ports.json        |  3170 +
 .../voq-sample-port-config-1.ini              |    51 +
 .../voq-sample-port-config-2.ini              |    21 +
 .../voq_chassis_lc_multi_asic.xml             | 48338 ++++++++++++++
 .../voq_chassis_lc_single_asic.xml            | 46215 +++++++++++++
 .../voq_chassis_data/voq_chassis_sup.xml      | 52726 +++++++++++++++
 .../tests/test_chassis_cfggen.py              |  1159 +
 .../tests/test_multinpu_cfggen.py             |    20 +-
 11 files changed, 205843 insertions(+), 60 deletions(-)
 create mode 100644 src/sonic-config-engine/tests/chassis_data/packet_chassis_data/packet-chassis-port-config-1.ini
 create mode 100644 src/sonic-config-engine/tests/chassis_data/packet_chassis_data/packet_chassis_sup.xml
 create mode 100644 src/sonic-config-engine/tests/chassis_data/voq_chassis_data/system_ports.json
 create mode 100644 src/sonic-config-engine/tests/chassis_data/voq_chassis_data/voq-sample-port-config-1.ini
 create mode 100644 src/sonic-config-engine/tests/chassis_data/voq_chassis_data/voq-sample-port-config-2.ini
 create mode 100644 src/sonic-config-engine/tests/chassis_data/voq_chassis_data/voq_chassis_lc_multi_asic.xml
 create mode 100644 src/sonic-config-engine/tests/chassis_data/voq_chassis_data/voq_chassis_lc_single_asic.xml
 create mode 100644 src/sonic-config-engine/tests/chassis_data/voq_chassis_data/voq_chassis_sup.xml
 create mode 100644 src/sonic-config-engine/tests/test_chassis_cfggen.py

diff --git a/src/sonic-config-engine/minigraph.py b/src/sonic-config-engine/minigraph.py
index 5bfbeb650..390410067 100644
--- a/src/sonic-config-engine/minigraph.py
+++ b/src/sonic-config-engine/minigraph.py
@@ -9,6 +9,7 @@
 import subprocess
 from collections import defaultdict
 
+
 from lxml import etree as ET
 from lxml.etree import QName
 
@@ -16,7 +17,7 @@
 
 from portconfig import get_port_config, get_fabric_port_config, get_fabric_monitor_config
 from sonic_py_common.interface import backplane_prefix
-from sonic_py_common.multi_asic import is_multi_asic
+from sonic_py_common.multi_asic import is_multi_asic, get_asic_id_from_name
 
 # TODO: Remove this once we no longer support Python 2
 if sys.version_info.major == 3:
@@ -24,6 +25,14 @@
 else:
     UNICODE_TYPE = unicode
 
+try:
+    if os.environ["CFGGEN_UNIT_TESTING_TOPOLOGY"] == "multi_asic":
+        import mock
+        is_multi_asic = mock.MagicMock(return_value=True)
+except KeyError:
+    pass
+
+
 """minigraph.py
 version_added: "1.9"
 author: Guohan Lu (gulv@microsoft.com)
@@ -53,7 +62,7 @@
 
 FRONTEND_ASIC_SUB_ROLE = 'FrontEnd'
 BACKEND_ASIC_SUB_ROLE = 'BackEnd'
-
+FABRIC_ASIC_SUB_ROLE = 'Fabric'
 dualtor_cable_types = ["active-active", "active-standby"]
 
 # Default Virtual Network Index (VNI)
@@ -72,6 +81,102 @@
         "MATCHES": ["SRC_IPV6", "DST_IPV6", "ETHER_TYPE", "IP_TYPE", "IP_PROTOCOL", "IN_PORTS", "L4_SRC_PORT", "L4_DST_PORT", "L4_SRC_PORT_RANGE", "L4_DST_PORT_RANGE", "ICMPV6_TYPE", "ICMPV6_CODE", "TCP_FLAGS"]
     }
 }
+# Chassis card type
+CHASSIS_CARD_VOQ = 'VoQ'
+CHASSIS_CARD_PACKET = 'chassis-packet'
+CHASSIS_CARD_FABRIC = 'Fabric'
+voq_internal_intfs =  ['cpu', 'recirc', 'inband']
+
+def get_asic_switch_id(slot_index, asic_name):
+    asic_id = 0
+    if slot_index is None:
+        return None
+    if asic_name is not None:
+        asic_id = int(asic_name[len('ASIC'):])
+    switch_id = 2*(2*(int(slot_index)-1) + asic_id)
+    return switch_id
+
+def get_asic_hostname_from_asic_name(chassis_type, asic_name, hostname):
+    if is_multi_asic() == True and  asic_name is None:
+        return asic_name
+
+    if is_minigraph_for_chassis(chassis_type):
+        # for chassis in the minigraph the asic hostname is <asic_name>-<hostname>
+        if is_multi_asic():
+            asic_id = get_asic_id_from_name(asic_name)
+        else:
+            asic_id = '0'
+        asic_hostname = "{}-ASIC{:02d}".format(hostname, int(asic_id ))
+    else:
+        # for multi_asic pizza boxes the asic_hostname is same as asic_name
+        asic_hostname = asic_name
+
+    return asic_hostname
+
+def get_linecard_slot_index(hostname, chassis_linecard_info):
+    for lc_slot, lc_name in chassis_linecard_info.items():
+        if hostname.lower() == lc_name['hostname'].lower():
+            return lc_slot
+    return None
+
+def get_voq_intf_attributes(ports):
+    voq_intf_attributes = {}
+    for port in ports:
+        role = ports.get(port, {}).get('role', None)
+        if role.lower() == 'inb' or role.lower() == 'rec':
+            core_id = None
+            core_port_index = None
+            speed = None
+            for k,v in ports.get(port, {}).items():
+                if k.lower() == 'coreid':
+                    core_id = v
+                if k.lower() == 'coreportid':
+                    core_port_index = v
+                if k.lower() == 'speed':
+                    speed = v
+            voq_intf_attributes.setdefault(role.lower(), {}).update({'core_id': core_id, 'core_port_index': core_port_index, 'speed' : speed})
+
+    return voq_intf_attributes
+
+def get_chassis_type_and_hostname(root, hname):
+    chassis_type = None
+    chassis_hostname = None
+    for child in root:
+        if child.tag == str(QName(ns, "MetadataDeclaration")):
+            devices = child.find(str(QName(ns, "Devices")))
+            for device_meta in devices.findall(str(QName(ns1, "DeviceMetadata"))):
+                device_name = device_meta.find(str(QName(ns1, "Name"))).text
+                if device_name != hname:
+                    continue
+                properties = device_meta.find(str(QName(ns1, "Properties")))
+                for device_property in properties.findall(str(QName(ns1, "DeviceProperty"))):
+                    name = device_property.find(str(QName(ns1, "Name"))).text
+                    value = device_property.find(str(QName(ns1, "Value"))).text
+                    if name == "ForwardingMethod":
+                        chassis_type = value
+                    if name == "ParentRouter":
+                        chassis_hostname = value
+    return chassis_type, chassis_hostname
+
+def is_minigraph_for_chassis(chassis_type):
+    if chassis_type in [CHASSIS_CARD_VOQ, CHASSIS_CARD_PACKET]:
+        return True
+    return False
+
+
+def normailize_port_map_for_chassis(asic_name, port_map):
+    if asic_name is None:
+        return port_map
+
+    new_port_map = {}
+    for k,v in port_map.items():
+        if asic_name.lower() in v.lower():
+            v = v.split('-')[0]
+        if asic_name.lower() in k.lower():
+            k = k.split('-')[0]
+        new_port_map.update({k:v})
+    
+    return new_port_map
 
 ###############################################################################
 #
@@ -79,6 +184,249 @@
 #
 ###############################################################################
 
+def parse_chassis_metadata(root,hname, lcname):
+    """
+    Parses the chassis metadata from the XML root.
+
+    This function iterates over the XML root to find the metadata declaration. It then extracts the device metadata,
+    specifically the name, properties, and slot index. If the device name matches the provided hostname or linecard name,
+    it extracts the total count of VoQ and the max count of cores. The function also updates a dictionary with slot indices
+    and corresponding hostnames.
+
+    Args:
+        root: The root of the minigraph.xml.
+        hname (str): chassis hostname.
+        lcname (str): The linecard name or supervisor hostname.
+
+    Returns:
+        max_num_core (int): The maximum number of cores, only appliable for voq chassis
+        num_voq (int): The total count of VoQ per port, only appliable for voq chassis
+        chassis_linecards (dict): A dictionary of slot indices and corresponding LC hostnames.
+    """
+    chassis_linecards = {}
+    max_num_core = None
+    num_voq = None
+    for child in root:
+        if child.tag == str(QName(ns, "MetadataDeclaration")):
+            devices = child.find(str(QName(ns, "Devices")))
+            for device_meta in devices.findall(str(QName(ns1, "DeviceMetadata"))):
+                slot_index = None
+                device_name = device_meta.find(str(QName(ns1, "Name"))).text
+
+                properties = device_meta.find(str(QName(ns1, "Properties")))
+                for device_property in properties.findall(str(QName(ns1, "DeviceProperty"))):
+                    name = device_property.find(str(QName(ns1, "Name"))).text
+                    value = device_property.find(str(QName(ns1, "Value"))).text
+                    if device_name == hname or device_name == lcname:
+                        if name == "TotalCountOfVoQ":
+                            num_voq = value
+                        if name == "MaxCountOfCores":
+                            max_num_core = 64
+                    if name == "SlotIndex":
+                        slot_index = value
+                if slot_index is not None:
+                    chassis_linecards.update({slot_index:{'hostname':device_name}})
+
+    return max_num_core, num_voq, chassis_linecards
+
+
+def parse_chassis_deviceinfo_intf_metadata(device_info, chassis_linecards_info, chassis_hwsku, num_voq, chassis_type, chassis_intf_map, voq_intf_attributes):
+    """
+    This function iterates InterfaceMetadata for every port in the chassis and genetate the configuration for 
+    systemport, chassis port alias and port default speeds.d.
+
+    Args:
+        device_info: The XML element containing device info.
+        chassis_linecards_info (dict): A dictionary mapping slot indices to hostnames.
+        chassis_hwsku (str): The hardware SKU of the chassis.
+        num_voq (str): The number of VoQ.
+        chassis_type (str): The type of the chassis.
+        chassis_intf_map (dict): A dictionary mapping interface names to their properties.
+        voq_intf_attributes (dict): A dictionary mapping VoQ interface names to their properties.
+
+    Returns:
+        system_ports (dict): A dictionary of system ports, only for voq chassis
+        chassis_port_alias (dict): A dictionary of chassis port aliases.
+        port_default_speed (dict): A dictionary of port default speeds.
+    """
+    system_ports = {}
+    chassis_port_alias = {}
+    port_default_speed = {}
+    system_port_id = 1
+
+    interface_metadata = device_info.find(str(QName(ns, "InterfaceMetadata")))
+    for interface in interface_metadata.findall(str(QName(ns1, "DeviceInterfaceMetadata"))):
+        linecard_name = None
+        asic_name = None
+        core_port_id = None
+        core_id = None
+        switch_id = None
+        slot_index = None
+        intf_name = interface.find(str(QName(ns1, "InterfaceName"))).text
+        # ignore the managment interfaces
+        if any(mgmt_intf in intf_name for mgmt_intf in ['Management', 'console']) == True:
+            continue
+
+        if intf_name not in chassis_intf_map:
+            print('Warning cannot find metadata for interface {}'.format(
+                intf_name), file=sys.stderr)
+            continue
+
+        intf_sonic_name = chassis_intf_map[intf_name].get('sonic_name', None)
+        if intf_sonic_name is None:
+            print('Warning cannot find sonic name  for interface {}'.format(
+                intf_name), file=sys.stderr)
+            continue
+
+        intf_speed = chassis_intf_map[intf_name].get('speed', None)
+        if intf_speed is None:
+            print('Warning cannot find speed  for interface' %
+                  (intf_name), file=sys.stderr)
+            continue
+
+        intf_properties = interface.find(str(QName(ns1, "Properties")))
+        if intf_properties is None:
+            print('Warning cannot find interface porperties  for interface' %
+                  (intf_name), file=sys.stderr)
+            continue
+
+        for intf_property in intf_properties.findall(str(QName(ns1, "InterfaceProperty"))):
+
+            name = intf_property.find(str(QName(ns1, "Name"))).text
+            value = intf_property.find(str(QName(ns1, "Value"))).text
+            if name == "CoreId":
+                core_id = value
+            if name == "SlotIndex":
+                slot_index = value
+            if name == "ProviderChipName":
+                asic_name = value
+            if name == "LineCardSku":
+                lc_sku = value
+            if name == "AsicInterfaceIndex":
+                core_port_id = value
+            if name == "AsicSwitchId":
+                switch_id = value
+
+        if intf_sonic_name.startswith('cpu'):
+            core_id = 0
+            core_port_id = 0
+            speed = 10000
+            asic_id = intf_name.split('/')[1]
+            asic_name = 'ASIC{}'.format(asic_id)
+        if intf_sonic_name.startswith('Ethernet-IB'):
+            core_id = voq_intf_attributes.get('inb', {}).get('core_id', None)
+            core_port_id = voq_intf_attributes.get(
+                'inb', {}).get('core_port_index', None)
+            intf_speed = voq_intf_attributes.get('inb', {}).get('speed', None)
+            asic_id = intf_name.split('/')[1]
+            asic_name = 'ASIC{}'.format(asic_id)
+        if intf_sonic_name.startswith('Ethernet-Rec'):
+            #    continue
+            core_id = voq_intf_attributes.get('rec', {}).get('core_id', None)
+            core_port_id = voq_intf_attributes.get(
+                'rec', {}).get('core_port_index', None)
+            intf_speed = voq_intf_attributes.get('rec', {}).get('speed', None)
+            asic_id = intf_name.split('/')[1]
+            asic_name = 'ASIC{}'.format(asic_id)
+
+        switch_id = get_asic_switch_id(slot_index, asic_name)
+        linecard_name = chassis_linecards_info.get(
+            slot_index, {}).get('hostname', None)
+        if linecard_name is None:
+            continue
+
+        if chassis_type == CHASSIS_CARD_VOQ:
+            key = intf_sonic_name
+            if asic_name is not None:
+                key = "%s|%s" % (asic_name, key)
+            if linecard_name is not None:
+                key = "%s|%s" % (linecard_name, key)
+            system_ports[key] = {
+                "system_port_id": system_port_id,
+                "switch_id": switch_id,
+                "core_index": core_id,
+                "core_port_index": core_port_id,
+                "speed": intf_speed,
+                "num_voq": num_voq
+            }
+            system_port_id += 1
+
+        chassis_port_alias.setdefault(slot_index, {}).update(
+            {(intf_sonic_name, intf_speed): intf_name})
+        # For Some Vendor we can have multiple speed define for same port with different alias.
+        # Example Port serving 400G alias will be FoutHundredGig0/0/0/0 and same port as 100G will be HundredGig0/0/0/0
+        # So to get port default speed get the max speed possible.
+        try:
+            if int(intf_speed) > int(port_default_speed[slot_index][intf_sonic_name]):
+               port_default_speed[slot_index][intf_sonic_name] = intf_speed
+        except:
+            port_default_speed.setdefault(slot_index, {}).update(
+                {intf_sonic_name: intf_speed})
+
+    return system_ports, chassis_port_alias, port_default_speed
+
+
+
+def parse_chassis_deviceinfo_voq_int_intfs(device_info):
+    backend_intf_map = {}
+    backend_interfaces = device_info.find(str(QName(ns, "BackendFabricInterfaces"))).findall(
+        str(QName(ns1, "BackendFabricInterface")))
+    voq_internal_intf_attr = {}
+    for backend_interface in backend_interfaces:
+        intf_name = backend_interface.find(str(QName(ns, "InterfaceName"))).text
+        if any(voq_intf in intf_name.lower() for voq_intf in voq_internal_intfs) == True:
+            sonic_name = backend_interface.find(str(QName(ns, "SonicName"))).text
+            speed = backend_interface.find(str(QName(ns, "Speed"))).text
+            backend_intf_map[intf_name] = {'sonic_name': sonic_name, 'speed': speed}
+    return backend_intf_map
+
+
+def parse_chassis_deviceinfo_intfs(device_info):
+    interface_map = {}
+
+    interfaces = device_info.find(str(QName(ns, "EthernetInterfaces"))).findall(
+        str(QName(ns1, "EthernetInterface")))
+
+    for interface in interfaces:
+        # the interface name is at the chassis level, so the interface name will have
+        # the slot information. It will be of format
+        # Ethernet<slot_index>/port
+        intf_name = interface.find(str(QName(ns, "InterfaceName"))).text
+        sonic_name = interface.find(str(QName(ns, "SonicName"))).text
+        speed = interface.find(str(QName(ns, "Speed"))).text
+        interface_map[intf_name] = {'sonic_name': sonic_name, 'speed': speed}
+    return interface_map
+
+
+def parse_chassis_deviceinfo(deviceinfos, chassis_linecards_info, chassis_hwsku, num_voq, chassis_type, voq_intf_attributes):
+    system_ports = {}
+    chassis_port_alias = {}
+    chassis_name = None
+    port_default_speed = {}
+
+    for device_info in deviceinfos.findall(str(QName(ns, "DeviceInfo"))):
+        dev_sku = device_info.find(str(QName(ns, "HwSku"))).text
+        if dev_sku == chassis_hwsku:
+            # The chassis device_info for sonic chassiss will 3 sections
+            # level information
+            # 1. EthernetInterfaces, which contains all the front panel ports present in the chassis
+            # 2. BackendFabricInterfaces, which contains all the internal/fabric ports present in the chassis
+            #    this includes, cpu, Inband and recirc ports for all linecards
+            # 3. InterfaceMetadata which contains Metadata for the ports.
+            #    In case of Voq chassis, the system port  properties are presnent in this section
+
+            chassis_intf_map = parse_chassis_deviceinfo_intfs(device_info)
+
+            if chassis_type == CHASSIS_CARD_VOQ:
+                chassis_internal_intf_map = parse_chassis_deviceinfo_voq_int_intfs(
+                        device_info)
+                chassis_intf_map.update(chassis_internal_intf_map)
+
+            system_ports, chassis_port_alias, port_default_speed  = parse_chassis_deviceinfo_intf_metadata(
+                    device_info, chassis_linecards_info, chassis_hwsku, num_voq, chassis_type, chassis_intf_map, voq_intf_attributes)
+    return system_ports, chassis_port_alias, port_default_speed
+
+
 class minigraph_encoder(json.JSONEncoder):
     def default(self, obj):
         if isinstance(obj, (
@@ -513,9 +861,26 @@ def parse_dpg(dpg, hname):
         intfs = {}
         ip_intfs_map = {}
         for ipintf in ipintfs.findall(str(QName(ns, "IPInterface"))):
+            ipprefix = ipintf.find(str(QName(ns, "Prefix"))).text
+            ipintf_name  = ipintf.find(str(QName(ns, "Name"))).text
             intfalias = ipintf.find(str(QName(ns, "AttachTo"))).text
+            """
+                VoqInband interfaces are special ip interfaces needed on inter linecard
+                control plane communications on Voq Chassis
+            """
+            if ipintf_name in ["v6VoqInband", "VoqInband"]:
+                if intfalias.startswith("Ethernet"):
+                    voq_intf_type = "Port"
+                # Vlan interface is not used, adding to be future proof
+                elif intfalias.startswith("Vlan"):
+                    voq_intf_type = "Vlan"
+                if intfalias not in voq_inband_intfs:
+                    voq_inband_intfs[intfalias] = {'inband_type': voq_intf_type}
+
+                voq_inband_intfs["%s|%s" % (intfalias, ipprefix)] = {}
+
+                continue
             intfname = port_alias_map.get(intfalias, intfalias)
-            ipprefix = ipintf.find(str(QName(ns, "Prefix"))).text
             intfs[(intfname, ipprefix)] = {}
             ip_intfs_map[ipprefix] = intfalias
         lo_intfs = parse_loopback_intf(child)
@@ -547,7 +912,6 @@ def parse_dpg(dpg, hname):
             mgmt_intf[(intfname, ipprefix)] = {'gwaddr': gwaddr}
 
         voqinbandintfs = child.find(str(QName(ns, "VoqInbandInterfaces")))
-        voq_inband_intfs = {}
         if voqinbandintfs:
             for voqintf in voqinbandintfs.findall(str(QName(ns1, "VoqInbandInterface"))):
                 intfname = voqintf.find(str(QName(ns, "Name"))).text
@@ -927,11 +1291,31 @@ def parse_cpg(cpg, hname, local_devices=[]):
                 nhopself = 1 if session.find(str(QName(ns, "NextHopSelf"))) is not None else 0
 
                 # choose the right table and admin_status for the peer
-                chassis_internal_ibgp = session.find(str(QName(ns, "ChassisInternal")))
-                if chassis_internal_ibgp is not None and chassis_internal_ibgp.text == "voq":
+                chassis_internal_ibgp = None
+                if session.find(str(QName(ns, "ChassisInternal")))is not None:
+
+                    chassis_internal_ibgp = session.find(str(QName(ns, "ChassisInternal"))).text
+                else:
+                    if session.find(str(QName(ns, "BgpGroup"))) is not None:
+                        chassis_internal_ibgp_group = session.find(str(QName(ns, "BgpGroup")))
+                        start_group_peer = None
+                        end_group_peer = None
+
+                        if chassis_internal_ibgp_group.find(str(QName(ns, "Start"))) is not None:
+                            start_group_peer = chassis_internal_ibgp_group.find(str(QName(ns, "Start"))).text
+                        if chassis_internal_ibgp_group.find(str(QName(ns, "End"))) is not None:
+                            end_group_peer = chassis_internal_ibgp_group.find(str(QName(ns, "End"))).text
+
+                        if start_group_peer == CHASSIS_CARD_VOQ  and end_group_peer == CHASSIS_CARD_VOQ:
+                            chassis_internal_ibgp = "voq"
+                        elif start_group_peer == CHASSIS_CARD_PACKET  and end_group_peer == CHASSIS_CARD_PACKET:
+                            chassis_internal_ibgp = "chassis-packet"
+
+
+                if chassis_internal_ibgp == "voq":
                     table = bgp_voq_chassis_sessions
                     admin_status = 'up'
-                elif chassis_internal_ibgp is not None and chassis_internal_ibgp.text == "chassis-packet":
+                elif chassis_internal_ibgp == "chassis-packet":
                     table = bgp_internal_sessions
                     admin_status = 'up'
                 elif end_router.lower() in local_devices and start_router.lower() in local_devices:
@@ -1015,6 +1399,46 @@ def filter_bad_asn(table):
 
     return bgp_sessions, bgp_internal_sessions, bgp_voq_chassis_sessions, myasn, bgp_peers_with_range, bgp_monitors, bgp_sentinel_sessions
 
+def parse_chassis_meta(meta, hname):
+    syslog_servers = []
+    ntp_servers = []
+    tacacs_servers = []
+    mgmt_routes = []
+    erspan_dst = []
+    deployment_id = None
+    region = None
+    macsec_profile = {}
+    qos_profile = None
+
+    device_metas = meta.find(str(QName(ns, "Devices")))
+    for device in device_metas.findall(str(QName(ns1, "DeviceMetadata"))):
+        if device.find(str(QName(ns1, "Name"))).text.lower() == hname.lower():
+            properties = device.find(str(QName(ns1, "Properties")))
+            for device_property in properties.findall(str(QName(ns1, "DeviceProperty"))):
+                name = device_property.find(str(QName(ns1, "Name"))).text
+                value = device_property.find(str(QName(ns1, "Value"))).text
+                value_group = value.strip().split(';') if value and value != "" else []
+                if name == "NtpResources":
+                    ntp_servers = value_group
+                elif name == "SyslogResources":
+                    syslog_servers = value_group
+                elif name == "TacacsServer":
+                    tacacs_servers = value_group
+                    mgmt_routes.extend(value_group)
+                elif name == "ForcedMgmtRoutes":
+                    mgmt_routes.extend(value_group)
+                elif name == "ErspanDestinationIpv4":
+                    erspan_dst = value_group
+                elif name == "DeploymentId":
+                    deployment_id = value
+                elif name == "Region":
+                    region = value
+                elif name == 'MacSecProfile':
+                    macsec_profile = parse_macsec_profile(value)
+                elif name == "SonicQosProfile":
+                    qos_profile = value
+
+    return syslog_servers, ntp_servers, tacacs_servers, mgmt_routes, erspan_dst, deployment_id, region, macsec_profile
 
 def parse_meta(meta, hname):
     syslog_servers = []
@@ -1170,6 +1594,25 @@ def parse_macsec_profile(val_string):
 
     return macsec_profile
 
+def parse_global_info(root):
+
+    hwsku = hostname = None
+    docker_routing_config_mode = "separated"
+
+    hwsku_qn = QName(ns, "HwSku")
+    hostname_qn = QName(ns, "Hostname")
+    docker_routing_config_mode_qn = QName(ns, "DockerRoutingConfigMode")
+    for child in root:
+        if child.tag == str(hwsku_qn):
+            hwsku = child.text
+        if child.tag == str(hostname_qn):
+            hostname = child.text
+        if child.tag == str(docker_routing_config_mode_qn):
+            docker_routing_config_mode = child.text
+            
+    chassis_type, chassis_hostname  =  get_chassis_type_and_hostname(root, hostname)
+    return hwsku, hostname, docker_routing_config_mode, chassis_type, chassis_hostname 
+
 def parse_asic_meta(meta, hname):
     sub_role = None
     switch_id = None
@@ -1186,7 +1629,7 @@ def parse_asic_meta(meta, hname):
                 value = device_property.find(str(QName(ns1, "Value"))).text
                 if name == "SubRole":
                     sub_role = value
-                elif name == "SwitchId":
+                elif name == "SwitchId" or name == "AsicSwitchId":
                     switch_id = value
                 elif name == "SwitchType":
                     switch_type = value
@@ -1566,6 +2009,12 @@ def parse_xml(filename, platform=None, port_config_file=None, asic_name=None, hw
     redundancy_type = None
     qos_profile = None
     rack_mgmt_map = None
+    chassis_linecards_info = {}
+    chassis_hwsku = None
+    chassis_port_alias = {}
+    slot_index = None
+    max_num_cores = None
+    card_type = None
 
     hwsku_qn = QName(ns, "HwSku")
     hostname_qn = QName(ns, "Hostname")
@@ -1578,17 +2027,29 @@ def parse_xml(filename, platform=None, port_config_file=None, asic_name=None, hw
         if child.tag == str(docker_routing_config_mode_qn):
             docker_routing_config_mode = child.text
 
+    hwsku, hostname, docker_routing_config_mode, chassis_type, chassis_hostname = parse_global_info(root)
+
     (ports, alias_map, alias_asic_map) = get_port_config(hwsku=hwsku, platform=platform, port_config_file=port_config_file, asic_name=asic_name, hwsku_config_file=hwsku_config_file)
 
+    asic_hostname = get_asic_hostname_from_asic_name(chassis_type, asic_name, hostname)
+
+    if is_minigraph_for_chassis(chassis_type):
+        alias_map = normailize_port_map_for_chassis(asic_name, alias_map)
+        alias_asic_map = normailize_port_map_for_chassis(asic_name, alias_asic_map)
+        (max_num_cores, num_voq, chassis_linecards_info) = parse_chassis_metadata(root, chassis_hostname, hostname)
+        chassis_hwsku = parse_chassis_hwsku(root, chassis_hostname)
+        voq_intf_attributes = get_voq_intf_attributes(ports)
+
     port_names_map.update(ports)
     port_alias_map.update(alias_map)
     port_alias_asic_map.update(alias_asic_map)
 
+    slot_index = get_linecard_slot_index(hostname, chassis_linecards_info)
     # Get the local device node from DeviceMetadata
     local_devices = parse_asic_meta_get_devices(root)
 
     for child in root:
-        if asic_name is None:
+        if asic_hostname is None:
             if child.tag == str(QName(ns, "DpgDec")):
                 (intfs, lo_intfs, mvrf, mgmt_intf, voq_inband_intfs, vlans, vlan_members, dhcp_relay_table, pcs, pc_members, acls, acl_table_types, vni, tunnel_intfs, dpg_ecmp_content, static_routes, tunnel_intfs_qos_remap_config) = parse_dpg(child, hostname)
             elif child.tag == str(QName(ns, "CpgDec")):
@@ -1605,31 +2066,50 @@ def parse_xml(filename, platform=None, port_config_file=None, asic_name=None, hw
                 (port_speeds_default, port_descriptions, sys_ports) = parse_deviceinfo(child, hwsku)
         else:
             if child.tag == str(QName(ns, "DpgDec")):
-                (intfs, lo_intfs, mvrf, mgmt_intf, voq_inband_intfs, vlans, vlan_members, dhcp_relay_table, pcs, pc_members, acls, acl_table_types, vni, tunnel_intfs, dpg_ecmp_content, static_routes, tunnel_intfs_qos_remap_config) = parse_dpg(child, asic_name)
+                (intfs, lo_intfs, mvrf, mgmt_intf, voq_inband_intfs, vlans, vlan_members, dhcp_relay_table, pcs, pc_members, acls, acl_table_types, vni, tunnel_intfs, dpg_ecmp_content, static_routes, tunnel_intfs_qos_remap_config) = parse_dpg(child, asic_hostname)
                 host_lo_intfs = parse_host_loopback(child, hostname)
             elif child.tag == str(QName(ns, "CpgDec")):
-                (bgp_sessions, bgp_internal_sessions, bgp_voq_chassis_sessions, bgp_asn, bgp_peers_with_range, bgp_monitors, bgp_sentinel_sessions) = parse_cpg(child, asic_name, local_devices)
+                (bgp_sessions, bgp_internal_sessions, bgp_voq_chassis_sessions, bgp_asn, bgp_peers_with_range, bgp_monitors, bgp_sentinel_sessions) = parse_cpg(child, asic_hostname, local_devices)
             elif child.tag == str(QName(ns, "PngDec")):
-                (neighbors, devices, port_speed_png) = parse_asic_png(child, asic_name, hostname)
+                (neighbors, devices, port_speed_png) = parse_asic_png(child, asic_hostname, hostname)
             elif child.tag == str(QName(ns, "MetadataDeclaration")):
-                (sub_role, switch_id, switch_type, max_cores, deployment_id, macsec_profile) = parse_asic_meta(child, asic_name)
+                (sub_role, switch_id, switch_type, max_cores, deployment_id, macsec_profile) = parse_asic_meta(child, asic_hostname)
             elif child.tag == str(QName(ns, "LinkMetadataDeclaration")):
                 linkmetas = parse_linkmeta(child, hostname)
             elif child.tag == str(QName(ns, "DeviceInfos")):
                 (port_speeds_default, port_descriptions, sys_ports) = parse_deviceinfo(child, hwsku)
 
+        if chassis_hostname:
+            if child.tag == str(QName(ns, "DeviceInfos")):
+                if asic_hostname is not None:
+                    (sys_ports, chassis_port_alias, port_speeds_default) = parse_chassis_deviceinfo(child, chassis_linecards_info, chassis_hwsku, num_voq, chassis_type, voq_intf_attributes)
+            elif child.tag == str(QName(ns, "MetadataDeclaration")):
+                (syslog_servers, ntp_servers, tacacs_servers, mgmt_routes, erspan_dst, deployment_id, region, macsec_profile) = parse_chassis_meta(child, chassis_hostname)
+            elif child.tag == str(QName(ns, "LinkMetadataDeclaration")):
+                linkmetas = parse_linkmeta(child, chassis_hostname)
+
     select_mmu_profiles(qos_profile, platform, hwsku)
-    # set the host device type in asic metadata also
-    device_type = [devices[key]['type'] for key in devices if key.lower() == hostname.lower()][0]
-    if asic_name is None:
+    
+    # for chassis get the device type from chassis metadata not the asic or linecard type
+    if chassis_hostname:
+        device_type = devices.get(chassis_hostname, {}).get('type', None)
+        card_type = [devices[key]['type'] for key in devices if key.lower() == hostname.lower()][0]
+    else:
+        device_type = [devices[key]['type'] for key in devices if key.lower() == hostname.lower()][0]
+        
+    if asic_hostname is None:
         current_device = [devices[key] for key in devices if key.lower() == hostname.lower()][0]
     else:
         try:
             current_device = [devices[key] for key in devices if key.lower() == asic_name.lower()][0]
         except:
-            print("Warning: no asic configuration found for {} in minigraph".format(asic_name), file=sys.stderr)
             current_device = {}
 
+    # on single asic linecards, parse_dpg() will not get the mmanagement interface information
+    # check here and get the linecard managment interface information 
+    if chassis_hostname and not mgmt_intf:
+        mgmt_intf = parse_linecard_mgmt_ip(root, hostname)
+        
     results = {}
     results['DEVICE_METADATA'] = {'localhost': {
         'bgp_asn': bgp_asn,
@@ -1644,6 +2124,9 @@ def parse_xml(filename, platform=None, port_config_file=None, asic_name=None, hw
         }
     }
 
+    if chassis_hostname:
+        results['DEVICE_METADATA']['localhost']['chassis_hostname'] = chassis_hostname
+        
     if deployment_id is not None:
         results['DEVICE_METADATA']['localhost']['deployment_id'] = deployment_id
 
@@ -1685,27 +2168,49 @@ def parse_xml(filename, platform=None, port_config_file=None, asic_name=None, hw
 
     if len(system_defaults) > 0:
         results['SYSTEM_DEFAULTS'] = system_defaults
+   
+    if asic_name is not None:
+        results['DEVICE_METADATA']['localhost']['asic_name'] =  asic_name
+    
+    # for single asic Voq Linecards the asic_name needs to populated to "Asic0"
+    if switch_type == "voq" or chassis_type in [CHASSIS_CARD_VOQ]:
+        if not is_multi_asic():
+            results['DEVICE_METADATA']['localhost']['asic_name'] =  "Asic0"
 
-    # for this hostname, if sub_role is defined, add sub_role in
-    # device_metadata
     if sub_role is not None:
-        current_device['sub_role'] = sub_role
         results['DEVICE_METADATA']['localhost']['sub_role'] =  sub_role
-        results['DEVICE_METADATA']['localhost']['asic_name'] =  asic_name
-    elif switch_type == "voq":
-       # On Voq switches asic_name is mandatory even on single-asic devices
-       results['DEVICE_METADATA']['localhost']['asic_name'] = 'Asic0'
+    elif switch_type == "voq" or chassis_type in [CHASSIS_CARD_VOQ] and card_type == "Supervisor":
+        results['DEVICE_METADATA']['localhost']['sub_role'] = 'fabric'
+    elif chassis_type == "chassis-packet":
+        results['DEVICE_METADATA']['localhost']['sub_role'] =  BACKEND_ASIC_SUB_ROLE
+
+    if chassis_type == CHASSIS_CARD_VOQ and 'sub_role' in results['DEVICE_METADATA']['localhost'] and FABRIC_ASIC_SUB_ROLE.lower() == results['DEVICE_METADATA']['localhost']['sub_role'].lower():
+        results['DEVICE_METADATA']['localhost']['switch_type'] = 'fabric'
+    else:
+        # on Voq system each asic has a switch_type
+        if chassis_type is not None:
+            results['DEVICE_METADATA']['localhost']['switch_type'] = chassis_type.lower()
 
-    # on Voq system each asic has a switch_id
-    if switch_id is not None:
-        results['DEVICE_METADATA']['localhost']['switch_id'] = switch_id
     # on Voq system each asic has a switch_type
     if switch_type is not None:
         results['DEVICE_METADATA']['localhost']['switch_type'] = switch_type
+    # #voq switch_id for asic
+    # switch_id = chassis_metadata.get(asic_hostname, {}).get('asic_switch_id', None)
+    # on Voq system each asic has a switch_id
+    if switch_id is not None:
+        if sub_role is not None and  FRONTEND_ASIC_SUB_ROLE == sub_role:
+            if slot_index is not None:
+                switch_id = get_asic_switch_id(slot_index, asic_name)
+
+        results['DEVICE_METADATA']['localhost']['switch_id'] = switch_id
     # on Voq system each asic has a max_cores
     if max_cores is not None:
         results['DEVICE_METADATA']['localhost']['max_cores'] = max_cores
 
+    # on Voq system each asic has a max_cores
+    if max_num_cores is not None:
+        results['DEVICE_METADATA']['localhost']['max_cores'] = max_num_cores
+
     # Voq systems have an inband interface
     if voq_inband_intfs is not None:
         results['VOQ_INBAND_INTERFACE'] = {}
@@ -1822,6 +2327,15 @@ def parse_xml(filename, platform=None, port_config_file=None, asic_name=None, hw
     if sys_ports:
        results['SYSTEM_PORT'] = sys_ports
 
+    if chassis_port_alias:
+        slot_index = get_linecard_slot_index(hostname, chassis_linecards_info) 
+        for port in ports.keys():
+            # Try first to get Chassis port alias based on port bandwidth/configured speed and if exception use port default speed. 
+            try:
+                ports[port]['alias'] = chassis_port_alias.get(slot_index, {})[(port, port_speed_png[port])]
+            except KeyError:
+                ports[port]['alias'] = chassis_port_alias.get(slot_index, {}).get((port, ports[port]['speed']), ports[port]['alias'])
+
     for port_name in port_speeds_default:
         # ignore port not in port_config.ini
         if port_name not in ports:
@@ -1841,7 +2355,12 @@ def parse_xml(filename, platform=None, port_config_file=None, asic_name=None, hw
         if port_name in mgmt_alias_reverse_mapping.keys():
             continue
 
-        port_default_speed =  port_speeds_default.get(port_name, None)
+        # Get the port_default_speed based on chassis_type/switch_type is non None
+        if chassis_type:
+            slot_index = get_linecard_slot_index(hostname, chassis_linecards_info)
+            port_default_speed =  port_speeds_default.get(slot_index, {}).get(port_name, None)
+        else:
+            port_default_speed =  port_speeds_default.get(port_name, None)
         port_png_speed = port_speed_png[port_name]
 
         # set Port Speed before lane update
@@ -2071,36 +2590,37 @@ def parse_xml(filename, platform=None, port_config_file=None, asic_name=None, hw
                 print("Warning: ignore interface '%s' in DEVICE_NEIGHBOR as it is not in the port_config.ini" % nghbr, file=sys.stderr)
             del neighbors[nghbr]
     results['DEVICE_NEIGHBOR'] = neighbors
-    if asic_name is None:
+    if is_multi_asic() == False or asic_name is None:
         results['DEVICE_NEIGHBOR_METADATA'] = { key:devices[key] for key in devices if key.lower() != hostname.lower() }
     else:
         results['DEVICE_NEIGHBOR_METADATA'] = { key:devices[key] for key in devices if key in {device['name'] for device in neighbors.values()} }
-    results['SYSLOG_SERVER'] = dict((item, {}) for item in syslog_servers)
-    results['DHCP_SERVER'] = dict((item, {}) for item in dhcp_servers)
-    results['DHCP_RELAY'] = dhcp_relay_table
-    results['NTP_SERVER'] = dict((item, {}) for item in ntp_servers)
-    # Set default DNS nameserver from dns.j2
-    results['DNS_NAMESERVER'] = {}
-    if os.environ.get("CFGGEN_UNIT_TESTING", "0") == "2":
-        dns_conf = os.path.join(os.path.dirname(__file__), "tests/", "dns.j2")
-    else:
-        dns_conf = "/usr/share/sonic/templates/dns.j2"
-    if os.path.isfile(dns_conf):
-        text = ""
-        with open(dns_conf) as template_file:
-            # Semgrep does not allow to use jinja2 directly, but we do need jinja2 for SONiC
-            environment = jinja2.Environment(trim_blocks=True) # nosemgrep
-            dns_template = environment.from_string(template_file.read())
-            text = dns_template.render(results)
-        try:
-            dns_res = json.loads(text)
-        except ValueError as e:
-            sys.exit("Error: fail to load dns configuration, %s" % str(e))
+    if is_multi_asic() == False or asic_name is None:
+        results['SYSLOG_SERVER'] = dict((item, {}) for item in syslog_servers)
+        results['DHCP_SERVER'] = dict((item, {}) for item in dhcp_servers)
+        results['DHCP_RELAY'] = dhcp_relay_table
+        results['NTP_SERVER'] = dict((item, {}) for item in ntp_servers)
+        # Set default DNS nameserver from dns.j2
+        results['DNS_NAMESERVER'] = {}
+        if os.environ.get("CFGGEN_UNIT_TESTING", "0") == "2":
+            dns_conf = os.path.join(os.path.dirname(__file__), "tests/", "dns.j2")
         else:
-            dns_nameservers = dns_res.get('DNS_NAMESERVER', {})
-            for k in dns_nameservers.keys():
-                results['DNS_NAMESERVER'][str(k)] = {}
-    results['TACPLUS_SERVER'] = dict((item, {'priority': '1', 'tcp_port': '49'}) for item in tacacs_servers)
+            dns_conf = "/usr/share/sonic/templates/dns.j2"
+        if os.path.isfile(dns_conf):
+            text = ""
+            with open(dns_conf) as template_file:
+                # Semgrep does not allow to use jinja2 directly, but we do need jinja2 for SONiC
+                environment = jinja2.Environment(trim_blocks=True) # nosemgrep
+                dns_template = environment.from_string(template_file.read())
+                text = dns_template.render(results)
+            try:
+                dns_res = json.loads(text)
+            except ValueError as e:
+                sys.exit("Error: fail to load dns configuration, %s" % str(e))
+            else:
+                dns_nameservers = dns_res.get('DNS_NAMESERVER', {})
+                for k in dns_nameservers.keys():
+                    results['DNS_NAMESERVER'][str(k)] = {}
+        results['TACPLUS_SERVER'] = dict((item, {'priority': '1', 'tcp_port': '49'}) for item in tacacs_servers)
     if len(acl_table_types) > 0:
         results['ACL_TABLE_TYPE'] = acl_table_types
     results['ACL_TABLE'] = filter_acl_table_bindings(acls, neighbors, pcs, pc_members, sub_role, current_device['type'] if current_device else None, is_storage_device, vlan_members)
@@ -2359,6 +2879,36 @@ def parse_asic_meta_get_devices(root):
 
     return local_devices
 
+def parse_chassis_hwsku(root,chassis_hostname):
+    for child in root:
+        if child.tag == str(QName(ns, "PngDec")):
+            devices = child.find(str(QName(ns, "Devices")))
+            for device in devices.findall(str(QName(ns, "Device"))):
+                if chassis_hostname.lower() ==  device.find(str(QName(ns, "Hostname"))).text.lower():
+                    hwsku =  device.find(str(QName(ns, "HwSku"))).text
+                    return hwsku
+    return None
+
+def parse_mgmt_intf(child):
+    mgmt_intf = {}
+    for mgmtintf in child.find(str(QName(ns, "ManagementIPInterfaces"))).findall(str(QName(ns1, "ManagementIPInterface"))):
+        intfname = mgmtintf.find(str(QName(ns, "AttachTo"))).text
+        ipprefix = mgmtintf.find(str(QName(ns1, "PrefixStr"))).text
+        mgmtipn = ipaddress.ip_network(UNICODE_TYPE(ipprefix), False)
+        gwaddr = ipaddress.ip_address(next(mgmtipn.hosts()))
+        mgmt_intf[(intfname, ipprefix)] = {'gwaddr': gwaddr}
+    return mgmt_intf
+
+def parse_linecard_mgmt_ip(root, hname):
+    linecard_mgmt_intfs = {}
+    dpg = root.find(str(QName(ns, "DpgDec")))
+    for child in dpg:
+        hostname = child.find(str(QName(ns, "Hostname")))
+        if hostname.text.lower() != hname.lower():
+            continue
+        linecard_mgmt_intfs = parse_mgmt_intf(child)
+    return linecard_mgmt_intfs
+
 port_names_map = {}
 port_alias_map = {}
 port_alias_asic_map = {}
diff --git a/src/sonic-config-engine/tests/chassis_data/packet_chassis_data/packet-chassis-port-config-1.ini b/src/sonic-config-engine/tests/chassis_data/packet_chassis_data/packet-chassis-port-config-1.ini
new file mode 100644
index 000000000..2d8df25cb
--- /dev/null
+++ b/src/sonic-config-engine/tests/chassis_data/packet_chassis_data/packet-chassis-port-config-1.ini
@@ -0,0 +1,49 @@
+# name lanes alias index speed asic_port_name role
+Ethernet-BP0    0,1             Eth0-ASIC0      0       100000  Eth0-ASIC0      Int
+Ethernet-BP6    6,7             Eth6-ASIC0      3       100000  Eth6-ASIC0      Int
+Ethernet-BP8    8,9             Eth8-ASIC0      4       100000  Eth8-ASIC0      Int
+Ethernet-BP10   10,11           Eth10-ASIC0     5       100000  Eth10-ASIC0     Int
+Ethernet-BP26   258,259         Eth26-ASIC0     13      100000  Eth26-ASIC0     Int
+Ethernet-BP28   260,261         Eth28-ASIC0     14      100000  Eth28-ASIC0     Int
+Ethernet-BP32   264,265         Eth32-ASIC0     16      100000  Eth32-ASIC0     Int
+Ethernet-BP38   270,271         Eth38-ASIC0     19      100000  Eth38-ASIC0     Int
+Ethernet-BP48   512,513         Eth48-ASIC0     24      100000  Eth48-ASIC0     Int
+Ethernet-BP50   514,515         Eth50-ASIC0     25      100000  Eth50-ASIC0     Int
+Ethernet-BP58   522,523         Eth58-ASIC0     29      100000  Eth58-ASIC0     Int
+Ethernet-BP60   524,525         Eth60-ASIC0     30      100000  Eth60-ASIC0     Int
+Ethernet-BP72   768,769         Eth72-ASIC0     36      100000  Eth72-ASIC0     Int
+Ethernet-BP80   776,777         Eth80-ASIC0     40      100000  Eth80-ASIC0     Int
+Ethernet-BP82   778,779         Eth82-ASIC0     41      100000  Eth82-ASIC0     Int
+Ethernet-BP86   782,783         Eth86-ASIC0     43      100000  Eth86-ASIC0     Int
+Ethernet-BP90   1026,1027               Eth90-ASIC0     45      100000  Eth90-ASIC0     Int
+Ethernet-BP92   1028,1029               Eth92-ASIC0     46      100000  Eth92-ASIC0     Int
+Ethernet-BP96   1032,1033               Eth96-ASIC0     48      100000  Eth96-ASIC0     Int
+Ethernet-BP102  1038,1039               Eth102-ASIC0    51      100000  Eth102-ASIC0    Int
+Ethernet-BP104  1280,1281               Eth104-ASIC0    52      100000  Eth104-ASIC0    Int
+Ethernet-BP106  1282,1283               Eth106-ASIC0    53      100000  Eth106-ASIC0    Int
+Ethernet-BP114  1290,1291               Eth114-ASIC0    57      100000  Eth114-ASIC0    Int
+Ethernet-BP116  1292,1293               Eth116-ASIC0    58      100000  Eth116-ASIC0    Int
+Ethernet-BP128  1536,1537,1538,1539             Eth128-ASIC0    64      200000  Eth128-ASIC0    Int
+Ethernet-BP132  1540,1541,1542,1543             Eth132-ASIC0    66      200000  Eth132-ASIC0    Int
+Ethernet-BP136  1544,1545,1546,1547             Eth136-ASIC0    68      200000  Eth136-ASIC0    Int
+Ethernet-BP140  1548,1549,1550,1551             Eth140-ASIC0    70      200000  Eth140-ASIC0    Int
+Ethernet-BP154  1794,1795               Eth154-ASIC0    77      100000  Eth154-ASIC0    Int
+Ethernet-BP156  1796,1797               Eth156-ASIC0    78      100000  Eth156-ASIC0    Int
+Ethernet-BP160  1800,1801,1802,1803             Eth160-ASIC0    80      200000  Eth160-ASIC0    Int
+Ethernet-BP164  1804,1805,1806,1807             Eth164-ASIC0    82      200000  Eth164-ASIC0    Int
+Ethernet-BP168  2048,2049               Eth168-ASIC0    84      100000  Eth168-ASIC0    Int
+Ethernet-BP170  2050,2051               Eth170-ASIC0    85      100000  Eth170-ASIC0    Int
+Ethernet-BP178  2058,2059               Eth178-ASIC0    89      100000  Eth178-ASIC0    Int
+Ethernet-BP180  2060,2061               Eth180-ASIC0    90      100000  Eth180-ASIC0    Int
+Ethernet-BP184  2304,2305               Eth184-ASIC0    92      100000  Eth184-ASIC0    Int
+Ethernet-BP190  2310,2311               Eth190-ASIC0    95      100000  Eth190-ASIC0    Int
+Ethernet-BP192  2312,2313               Eth192-ASIC0    96      100000  Eth192-ASIC0    Int
+Ethernet-BP194  2314,2315               Eth194-ASIC0    97      100000  Eth194-ASIC0    Int
+Ethernet-BP208  2560,2561               Eth208-ASIC0    104     100000  Eth208-ASIC0    Int
+Ethernet-BP214  2566,2567               Eth214-ASIC0    107     100000  Eth214-ASIC0    Int
+Ethernet-BP218  2570,2571               Eth218-ASIC0    109     100000  Eth218-ASIC0    Int
+Ethernet-BP220  2572,2573               Eth220-ASIC0    110     100000  Eth220-ASIC0    Int
+Ethernet-BP232  2816,2817               Eth232-ASIC0    116     100000  Eth232-ASIC0    Int
+Ethernet-BP234  2818,2819               Eth234-ASIC0    117     100000  Eth234-ASIC0    Int
+Ethernet-BP242  2826,2827               Eth242-ASIC0    121     100000  Eth242-ASIC0    Int
+Ethernet-BP244  2828,2829               Eth244-ASIC0    122     100000  Eth244-ASIC0    Int
\ No newline at end of file
diff --git a/src/sonic-config-engine/tests/chassis_data/packet_chassis_data/packet_chassis_sup.xml b/src/sonic-config-engine/tests/chassis_data/packet_chassis_data/packet_chassis_sup.xml
new file mode 100644
index 000000000..798d498f1
--- /dev/null
+++ b/src/sonic-config-engine/tests/chassis_data/packet_chassis_data/packet_chassis_sup.xml
@@ -0,0 +1,53496 @@
+<?xml version="1.0"?>
+<DeviceMiniGraph xmlns="Microsoft.Search.Autopilot.Evolution" xmlns:i="http://www.w3.org/2001/XMLSchema-instance">
+  <CpgDec>
+    <IsisRouters xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+    <IsisSessions xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+    <PeeringSessions/>
+    <Routers xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+    <StaticRouters xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+  </CpgDec>
+  <DeviceInfos>
+    <DeviceInfo>
+      <AzClusterSku i:nil="true"/>
+      <BackendFabricInterfaces xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+      <BaseSku>Sonic-T2-base-sku</BaseSku>
+      <ClusterSku i:nil="true"/>
+      <EthernetInterfaces xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution">
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>FourHundredGigE0/0/0/0</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet0</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>2</Index>
+          <InterfaceName>HundredGigE0/0/0/0</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet0</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>3</Index>
+          <InterfaceName>FourHundredGigE0/0/0/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet8</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>4</Index>
+          <InterfaceName>HundredGigE0/0/0/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet8</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>5</Index>
+          <InterfaceName>FourHundredGigE0/0/0/2</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet16</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>6</Index>
+          <InterfaceName>HundredGigE0/0/0/2</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet16</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>7</Index>
+          <InterfaceName>FourHundredGigE0/0/0/3</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet24</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>8</Index>
+          <InterfaceName>HundredGigE0/0/0/3</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet24</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>9</Index>
+          <InterfaceName>FourHundredGigE0/0/0/4</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet32</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>10</Index>
+          <InterfaceName>HundredGigE0/0/0/4</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet32</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>11</Index>
+          <InterfaceName>FourHundredGigE0/0/0/5</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet40</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>12</Index>
+          <InterfaceName>HundredGigE0/0/0/5</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet40</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>13</Index>
+          <InterfaceName>FourHundredGigE0/0/0/6</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet48</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>14</Index>
+          <InterfaceName>HundredGigE0/0/0/6</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet48</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>15</Index>
+          <InterfaceName>FourHundredGigE0/0/0/7</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet56</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>16</Index>
+          <InterfaceName>HundredGigE0/0/0/7</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet56</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>17</Index>
+          <InterfaceName>FourHundredGigE0/0/0/8</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet64</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>18</Index>
+          <InterfaceName>HundredGigE0/0/0/8</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet64</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>19</Index>
+          <InterfaceName>FourHundredGigE0/0/0/9</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet72</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>20</Index>
+          <InterfaceName>HundredGigE0/0/0/9</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet72</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>21</Index>
+          <InterfaceName>FourHundredGigE0/0/0/10</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet80</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>22</Index>
+          <InterfaceName>HundredGigE0/0/0/10</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet80</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>23</Index>
+          <InterfaceName>FourHundredGigE0/0/0/11</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet88</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>24</Index>
+          <InterfaceName>HundredGigE0/0/0/11</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet88</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>25</Index>
+          <InterfaceName>FourHundredGigE0/0/0/12</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet96</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>26</Index>
+          <InterfaceName>HundredGigE0/0/0/12</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet96</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>27</Index>
+          <InterfaceName>FourHundredGigE0/0/0/13</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet104</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>28</Index>
+          <InterfaceName>HundredGigE0/0/0/13</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet104</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>29</Index>
+          <InterfaceName>FourHundredGigE0/0/0/14</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet112</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>30</Index>
+          <InterfaceName>HundredGigE0/0/0/14</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet112</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>31</Index>
+          <InterfaceName>FourHundredGigE0/0/0/15</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet120</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>32</Index>
+          <InterfaceName>HundredGigE0/0/0/15</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet120</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>33</Index>
+          <InterfaceName>FourHundredGigE0/0/0/16</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet128</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>34</Index>
+          <InterfaceName>HundredGigE0/0/0/16</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet128</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>35</Index>
+          <InterfaceName>FourHundredGigE0/0/0/17</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet136</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>36</Index>
+          <InterfaceName>HundredGigE0/0/0/17</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet136</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>37</Index>
+          <InterfaceName>FourHundredGigE0/0/0/18</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet144</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>38</Index>
+          <InterfaceName>HundredGigE0/0/0/18</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet144</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>39</Index>
+          <InterfaceName>FourHundredGigE0/0/0/19</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet152</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>40</Index>
+          <InterfaceName>HundredGigE0/0/0/19</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet152</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>41</Index>
+          <InterfaceName>FourHundredGigE0/0/0/20</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet160</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>42</Index>
+          <InterfaceName>HundredGigE0/0/0/20</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet160</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>43</Index>
+          <InterfaceName>FourHundredGigE0/0/0/21</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet168</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>44</Index>
+          <InterfaceName>HundredGigE0/0/0/21</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet168</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>45</Index>
+          <InterfaceName>FourHundredGigE0/0/0/22</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet176</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>46</Index>
+          <InterfaceName>HundredGigE0/0/0/22</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet176</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>47</Index>
+          <InterfaceName>FourHundredGigE0/0/0/23</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet184</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>48</Index>
+          <InterfaceName>HundredGigE0/0/0/23</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet184</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>49</Index>
+          <InterfaceName>FourHundredGigE0/0/0/24</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet192</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>50</Index>
+          <InterfaceName>HundredGigE0/0/0/24</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet192</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>51</Index>
+          <InterfaceName>FourHundredGigE0/0/0/25</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet200</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>52</Index>
+          <InterfaceName>HundredGigE0/0/0/25</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet200</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>53</Index>
+          <InterfaceName>FourHundredGigE0/0/0/26</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet208</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>54</Index>
+          <InterfaceName>HundredGigE0/0/0/26</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet208</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>55</Index>
+          <InterfaceName>FourHundredGigE0/0/0/27</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet216</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>56</Index>
+          <InterfaceName>HundredGigE0/0/0/27</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet216</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>57</Index>
+          <InterfaceName>FourHundredGigE0/0/0/28</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet224</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>58</Index>
+          <InterfaceName>HundredGigE0/0/0/28</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet224</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>59</Index>
+          <InterfaceName>FourHundredGigE0/0/0/29</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet232</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>60</Index>
+          <InterfaceName>HundredGigE0/0/0/29</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet232</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>61</Index>
+          <InterfaceName>FourHundredGigE0/0/0/30</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet240</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>62</Index>
+          <InterfaceName>HundredGigE0/0/0/30</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet240</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>63</Index>
+          <InterfaceName>FourHundredGigE0/0/0/31</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet248</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>64</Index>
+          <InterfaceName>HundredGigE0/0/0/31</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet248</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>65</Index>
+          <InterfaceName>FourHundredGigE0/0/0/32</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet256</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>66</Index>
+          <InterfaceName>HundredGigE0/0/0/32</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet256</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>67</Index>
+          <InterfaceName>FourHundredGigE0/0/0/33</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet264</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>68</Index>
+          <InterfaceName>HundredGigE0/0/0/33</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet264</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>69</Index>
+          <InterfaceName>FourHundredGigE0/0/0/34</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet272</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>70</Index>
+          <InterfaceName>HundredGigE0/0/0/34</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet272</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>71</Index>
+          <InterfaceName>FourHundredGigE0/0/0/35</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet280</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>72</Index>
+          <InterfaceName>HundredGigE0/0/0/35</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet280</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>73</Index>
+          <InterfaceName>HundredGigE0/1/0/0</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet0</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>74</Index>
+          <InterfaceName>FortyGigE0/1/0/0</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet0</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>75</Index>
+          <InterfaceName>HundredGigE0/1/0/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet4</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>76</Index>
+          <InterfaceName>FortyGigE0/1/0/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet4</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>77</Index>
+          <InterfaceName>HundredGigE0/1/0/2</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet8</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>78</Index>
+          <InterfaceName>FortyGigE0/1/0/2</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet8</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>79</Index>
+          <InterfaceName>HundredGigE0/1/0/3</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet12</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>80</Index>
+          <InterfaceName>FortyGigE0/1/0/3</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet12</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>81</Index>
+          <InterfaceName>HundredGigE0/1/0/4</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet16</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>82</Index>
+          <InterfaceName>FortyGigE0/1/0/4</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet16</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>83</Index>
+          <InterfaceName>HundredGigE0/1/0/5</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet20</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>84</Index>
+          <InterfaceName>FortyGigE0/1/0/5</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet20</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>85</Index>
+          <InterfaceName>HundredGigE0/1/0/6</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet24</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>86</Index>
+          <InterfaceName>FortyGigE0/1/0/6</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet24</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>87</Index>
+          <InterfaceName>HundredGigE0/1/0/7</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet28</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>88</Index>
+          <InterfaceName>FortyGigE0/1/0/7</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet28</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>89</Index>
+          <InterfaceName>HundredGigE0/1/0/8</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet32</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>90</Index>
+          <InterfaceName>FortyGigE0/1/0/8</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet32</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>91</Index>
+          <InterfaceName>HundredGigE0/1/0/9</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet36</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>92</Index>
+          <InterfaceName>FortyGigE0/1/0/9</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet36</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>93</Index>
+          <InterfaceName>HundredGigE0/1/0/10</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet40</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>94</Index>
+          <InterfaceName>FortyGigE0/1/0/10</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet40</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>95</Index>
+          <InterfaceName>HundredGigE0/1/0/11</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet44</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>96</Index>
+          <InterfaceName>FortyGigE0/1/0/11</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet44</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>97</Index>
+          <InterfaceName>HundredGigE0/1/0/12</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet48</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>98</Index>
+          <InterfaceName>FortyGigE0/1/0/12</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet48</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>99</Index>
+          <InterfaceName>HundredGigE0/1/0/13</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet52</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>100</Index>
+          <InterfaceName>FortyGigE0/1/0/13</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet52</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>101</Index>
+          <InterfaceName>HundredGigE0/1/0/14</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet56</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>102</Index>
+          <InterfaceName>FortyGigE0/1/0/14</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet56</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>103</Index>
+          <InterfaceName>HundredGigE0/1/0/15</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet60</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>104</Index>
+          <InterfaceName>FortyGigE0/1/0/15</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet60</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>105</Index>
+          <InterfaceName>HundredGigE0/1/0/16</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet64</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>106</Index>
+          <InterfaceName>FortyGigE0/1/0/16</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet64</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>107</Index>
+          <InterfaceName>HundredGigE0/1/0/17</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet68</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>108</Index>
+          <InterfaceName>FortyGigE0/1/0/17</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet68</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>109</Index>
+          <InterfaceName>HundredGigE0/1/0/18</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet72</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>110</Index>
+          <InterfaceName>FortyGigE0/1/0/18</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet72</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>111</Index>
+          <InterfaceName>HundredGigE0/1/0/19</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet76</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>112</Index>
+          <InterfaceName>FortyGigE0/1/0/19</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet76</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>113</Index>
+          <InterfaceName>HundredGigE0/1/0/20</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet80</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>114</Index>
+          <InterfaceName>FortyGigE0/1/0/20</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet80</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>115</Index>
+          <InterfaceName>HundredGigE0/1/0/21</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet84</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>116</Index>
+          <InterfaceName>FortyGigE0/1/0/21</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet84</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>117</Index>
+          <InterfaceName>HundredGigE0/1/0/22</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet88</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>118</Index>
+          <InterfaceName>FortyGigE0/1/0/22</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet88</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>119</Index>
+          <InterfaceName>HundredGigE0/1/0/23</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet92</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>120</Index>
+          <InterfaceName>FortyGigE0/1/0/23</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet92</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>121</Index>
+          <InterfaceName>HundredGigE0/1/0/24</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet96</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>122</Index>
+          <InterfaceName>FortyGigE0/1/0/24</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet96</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>123</Index>
+          <InterfaceName>HundredGigE0/1/0/25</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet100</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>124</Index>
+          <InterfaceName>FortyGigE0/1/0/25</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet100</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>125</Index>
+          <InterfaceName>HundredGigE0/1/0/26</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet104</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>126</Index>
+          <InterfaceName>FortyGigE0/1/0/26</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet104</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>127</Index>
+          <InterfaceName>HundredGigE0/1/0/27</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet108</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>128</Index>
+          <InterfaceName>FortyGigE0/1/0/27</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet108</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>129</Index>
+          <InterfaceName>HundredGigE0/1/0/28</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet112</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>130</Index>
+          <InterfaceName>FortyGigE0/1/0/28</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet112</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>131</Index>
+          <InterfaceName>HundredGigE0/1/0/29</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet116</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>132</Index>
+          <InterfaceName>FortyGigE0/1/0/29</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet116</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>133</Index>
+          <InterfaceName>HundredGigE0/1/0/30</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet120</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>134</Index>
+          <InterfaceName>FortyGigE0/1/0/30</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet120</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>135</Index>
+          <InterfaceName>HundredGigE0/1/0/31</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet124</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>136</Index>
+          <InterfaceName>FortyGigE0/1/0/31</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet124</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>137</Index>
+          <InterfaceName>HundredGigE0/1/0/32</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet128</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>138</Index>
+          <InterfaceName>FortyGigE0/1/0/32</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet128</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>139</Index>
+          <InterfaceName>HundredGigE0/1/0/33</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet132</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>140</Index>
+          <InterfaceName>FortyGigE0/1/0/33</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet132</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>141</Index>
+          <InterfaceName>HundredGigE0/1/0/34</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet136</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>142</Index>
+          <InterfaceName>FortyGigE0/1/0/34</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet136</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>143</Index>
+          <InterfaceName>HundredGigE0/1/0/35</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet140</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>144</Index>
+          <InterfaceName>FortyGigE0/1/0/35</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet140</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>145</Index>
+          <InterfaceName>HundredGigE0/1/0/36</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet144</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>146</Index>
+          <InterfaceName>FortyGigE0/1/0/36</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet144</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>147</Index>
+          <InterfaceName>HundredGigE0/1/0/37</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet148</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>148</Index>
+          <InterfaceName>FortyGigE0/1/0/37</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet148</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>149</Index>
+          <InterfaceName>HundredGigE0/1/0/38</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet152</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>150</Index>
+          <InterfaceName>FortyGigE0/1/0/38</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet152</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>151</Index>
+          <InterfaceName>HundredGigE0/1/0/39</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet156</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>152</Index>
+          <InterfaceName>FortyGigE0/1/0/39</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet156</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>153</Index>
+          <InterfaceName>HundredGigE0/1/0/40</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet160</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>154</Index>
+          <InterfaceName>FortyGigE0/1/0/40</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet160</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>155</Index>
+          <InterfaceName>HundredGigE0/1/0/41</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet164</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>156</Index>
+          <InterfaceName>FortyGigE0/1/0/41</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet164</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>157</Index>
+          <InterfaceName>HundredGigE0/1/0/42</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet168</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>158</Index>
+          <InterfaceName>FortyGigE0/1/0/42</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet168</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>159</Index>
+          <InterfaceName>HundredGigE0/1/0/43</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet172</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>160</Index>
+          <InterfaceName>FortyGigE0/1/0/43</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet172</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>161</Index>
+          <InterfaceName>HundredGigE0/1/0/44</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet176</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>162</Index>
+          <InterfaceName>FortyGigE0/1/0/44</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet176</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>163</Index>
+          <InterfaceName>HundredGigE0/1/0/45</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet180</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>164</Index>
+          <InterfaceName>FortyGigE0/1/0/45</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet180</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>165</Index>
+          <InterfaceName>HundredGigE0/1/0/46</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet184</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>166</Index>
+          <InterfaceName>FortyGigE0/1/0/46</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet184</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>167</Index>
+          <InterfaceName>HundredGigE0/1/0/47</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet188</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>168</Index>
+          <InterfaceName>FortyGigE0/1/0/47</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet188</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>169</Index>
+          <InterfaceName>HundredGigE0/2/0/0</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet0</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>170</Index>
+          <InterfaceName>FortyGigE0/2/0/0</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet0</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>171</Index>
+          <InterfaceName>HundredGigE0/2/0/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet4</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>172</Index>
+          <InterfaceName>FortyGigE0/2/0/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet4</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>173</Index>
+          <InterfaceName>HundredGigE0/2/0/2</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet8</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>174</Index>
+          <InterfaceName>FortyGigE0/2/0/2</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet8</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>175</Index>
+          <InterfaceName>HundredGigE0/2/0/3</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet12</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>176</Index>
+          <InterfaceName>FortyGigE0/2/0/3</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet12</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>177</Index>
+          <InterfaceName>HundredGigE0/2/0/4</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet16</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>178</Index>
+          <InterfaceName>FortyGigE0/2/0/4</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet16</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>179</Index>
+          <InterfaceName>HundredGigE0/2/0/5</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet20</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>180</Index>
+          <InterfaceName>FortyGigE0/2/0/5</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet20</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>181</Index>
+          <InterfaceName>HundredGigE0/2/0/6</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet24</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>182</Index>
+          <InterfaceName>FortyGigE0/2/0/6</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet24</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>183</Index>
+          <InterfaceName>HundredGigE0/2/0/7</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet28</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>184</Index>
+          <InterfaceName>FortyGigE0/2/0/7</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet28</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>185</Index>
+          <InterfaceName>HundredGigE0/2/0/8</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet32</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>186</Index>
+          <InterfaceName>FortyGigE0/2/0/8</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet32</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>187</Index>
+          <InterfaceName>HundredGigE0/2/0/9</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet36</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>188</Index>
+          <InterfaceName>FortyGigE0/2/0/9</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet36</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>189</Index>
+          <InterfaceName>HundredGigE0/2/0/10</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet40</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>190</Index>
+          <InterfaceName>FortyGigE0/2/0/10</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet40</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>191</Index>
+          <InterfaceName>HundredGigE0/2/0/11</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet44</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>192</Index>
+          <InterfaceName>FortyGigE0/2/0/11</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet44</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>193</Index>
+          <InterfaceName>HundredGigE0/2/0/12</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet48</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>194</Index>
+          <InterfaceName>FortyGigE0/2/0/12</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet48</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>195</Index>
+          <InterfaceName>HundredGigE0/2/0/13</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet52</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>196</Index>
+          <InterfaceName>FortyGigE0/2/0/13</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet52</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>197</Index>
+          <InterfaceName>HundredGigE0/2/0/14</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet56</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>198</Index>
+          <InterfaceName>FortyGigE0/2/0/14</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet56</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>199</Index>
+          <InterfaceName>HundredGigE0/2/0/15</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet60</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>200</Index>
+          <InterfaceName>FortyGigE0/2/0/15</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet60</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>201</Index>
+          <InterfaceName>HundredGigE0/2/0/16</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet64</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>202</Index>
+          <InterfaceName>FortyGigE0/2/0/16</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet64</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>203</Index>
+          <InterfaceName>HundredGigE0/2/0/17</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet68</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>204</Index>
+          <InterfaceName>FortyGigE0/2/0/17</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet68</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>205</Index>
+          <InterfaceName>HundredGigE0/2/0/18</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet72</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>206</Index>
+          <InterfaceName>FortyGigE0/2/0/18</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet72</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>207</Index>
+          <InterfaceName>HundredGigE0/2/0/19</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet76</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>208</Index>
+          <InterfaceName>FortyGigE0/2/0/19</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet76</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>209</Index>
+          <InterfaceName>HundredGigE0/2/0/20</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet80</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>210</Index>
+          <InterfaceName>FortyGigE0/2/0/20</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet80</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>211</Index>
+          <InterfaceName>HundredGigE0/2/0/21</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet84</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>212</Index>
+          <InterfaceName>FortyGigE0/2/0/21</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet84</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>213</Index>
+          <InterfaceName>HundredGigE0/2/0/22</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet88</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>214</Index>
+          <InterfaceName>FortyGigE0/2/0/22</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet88</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>215</Index>
+          <InterfaceName>HundredGigE0/2/0/23</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet92</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>216</Index>
+          <InterfaceName>FortyGigE0/2/0/23</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet92</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>217</Index>
+          <InterfaceName>HundredGigE0/2/0/24</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet96</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>218</Index>
+          <InterfaceName>FortyGigE0/2/0/24</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet96</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>219</Index>
+          <InterfaceName>HundredGigE0/2/0/25</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet100</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>220</Index>
+          <InterfaceName>FortyGigE0/2/0/25</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet100</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>221</Index>
+          <InterfaceName>HundredGigE0/2/0/26</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet104</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>222</Index>
+          <InterfaceName>FortyGigE0/2/0/26</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet104</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>223</Index>
+          <InterfaceName>HundredGigE0/2/0/27</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet108</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>224</Index>
+          <InterfaceName>FortyGigE0/2/0/27</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet108</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>225</Index>
+          <InterfaceName>HundredGigE0/2/0/28</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet112</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>226</Index>
+          <InterfaceName>FortyGigE0/2/0/28</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet112</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>227</Index>
+          <InterfaceName>HundredGigE0/2/0/29</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet116</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>228</Index>
+          <InterfaceName>FortyGigE0/2/0/29</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet116</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>229</Index>
+          <InterfaceName>HundredGigE0/2/0/30</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet120</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>230</Index>
+          <InterfaceName>FortyGigE0/2/0/30</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet120</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>231</Index>
+          <InterfaceName>HundredGigE0/2/0/31</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet124</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>232</Index>
+          <InterfaceName>FortyGigE0/2/0/31</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet124</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>233</Index>
+          <InterfaceName>HundredGigE0/2/0/32</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet128</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>234</Index>
+          <InterfaceName>FortyGigE0/2/0/32</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet128</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>235</Index>
+          <InterfaceName>HundredGigE0/2/0/33</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet132</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>236</Index>
+          <InterfaceName>FortyGigE0/2/0/33</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet132</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>237</Index>
+          <InterfaceName>HundredGigE0/2/0/34</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet136</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>238</Index>
+          <InterfaceName>FortyGigE0/2/0/34</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet136</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>239</Index>
+          <InterfaceName>HundredGigE0/2/0/35</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet140</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>240</Index>
+          <InterfaceName>FortyGigE0/2/0/35</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet140</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>241</Index>
+          <InterfaceName>HundredGigE0/2/0/36</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet144</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>242</Index>
+          <InterfaceName>FortyGigE0/2/0/36</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet144</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>243</Index>
+          <InterfaceName>HundredGigE0/2/0/37</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet148</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>244</Index>
+          <InterfaceName>FortyGigE0/2/0/37</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet148</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>245</Index>
+          <InterfaceName>HundredGigE0/2/0/38</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet152</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>246</Index>
+          <InterfaceName>FortyGigE0/2/0/38</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet152</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>247</Index>
+          <InterfaceName>HundredGigE0/2/0/39</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet156</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>248</Index>
+          <InterfaceName>FortyGigE0/2/0/39</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet156</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>249</Index>
+          <InterfaceName>HundredGigE0/2/0/40</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet160</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>250</Index>
+          <InterfaceName>FortyGigE0/2/0/40</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet160</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>251</Index>
+          <InterfaceName>HundredGigE0/2/0/41</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet164</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>252</Index>
+          <InterfaceName>FortyGigE0/2/0/41</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet164</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>253</Index>
+          <InterfaceName>HundredGigE0/2/0/42</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet168</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>254</Index>
+          <InterfaceName>FortyGigE0/2/0/42</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet168</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>255</Index>
+          <InterfaceName>HundredGigE0/2/0/43</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet172</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>256</Index>
+          <InterfaceName>FortyGigE0/2/0/43</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet172</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>257</Index>
+          <InterfaceName>HundredGigE0/2/0/44</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet176</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>258</Index>
+          <InterfaceName>FortyGigE0/2/0/44</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet176</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>259</Index>
+          <InterfaceName>HundredGigE0/2/0/45</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet180</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>260</Index>
+          <InterfaceName>FortyGigE0/2/0/45</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet180</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>261</Index>
+          <InterfaceName>HundredGigE0/2/0/46</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet184</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>262</Index>
+          <InterfaceName>FortyGigE0/2/0/46</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet184</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>263</Index>
+          <InterfaceName>HundredGigE0/2/0/47</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet188</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>264</Index>
+          <InterfaceName>FortyGigE0/2/0/47</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet188</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>265</Index>
+          <InterfaceName>HundredGigE0/3/0/0</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet0</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>266</Index>
+          <InterfaceName>FortyGigE0/3/0/0</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet0</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>267</Index>
+          <InterfaceName>FourHundredGigE0/3/0/0</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet0</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>268</Index>
+          <InterfaceName>HundredGigE0/3/0/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet8</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>269</Index>
+          <InterfaceName>FortyGigE0/3/0/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet8</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>270</Index>
+          <InterfaceName>FourHundredGigE0/3/0/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet8</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>271</Index>
+          <InterfaceName>HundredGigE0/3/0/2</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet16</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>272</Index>
+          <InterfaceName>FortyGigE0/3/0/2</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet16</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>273</Index>
+          <InterfaceName>FourHundredGigE0/3/0/2</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet16</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>274</Index>
+          <InterfaceName>HundredGigE0/3/0/3</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet24</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>275</Index>
+          <InterfaceName>FortyGigE0/3/0/3</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet24</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>276</Index>
+          <InterfaceName>FourHundredGigE0/3/0/3</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet24</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>277</Index>
+          <InterfaceName>HundredGigE0/3/0/4</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet32</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>278</Index>
+          <InterfaceName>FortyGigE0/3/0/4</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet32</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>279</Index>
+          <InterfaceName>FourHundredGigE0/3/0/4</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet32</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>280</Index>
+          <InterfaceName>HundredGigE0/3/0/5</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet40</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>281</Index>
+          <InterfaceName>FortyGigE0/3/0/5</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet40</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>282</Index>
+          <InterfaceName>FourHundredGigE0/3/0/5</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet40</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>283</Index>
+          <InterfaceName>HundredGigE0/3/0/6</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet48</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>284</Index>
+          <InterfaceName>FortyGigE0/3/0/6</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet48</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>285</Index>
+          <InterfaceName>FourHundredGigE0/3/0/6</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet48</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>286</Index>
+          <InterfaceName>HundredGigE0/3/0/7</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet56</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>287</Index>
+          <InterfaceName>FortyGigE0/3/0/7</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet56</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>288</Index>
+          <InterfaceName>FourHundredGigE0/3/0/7</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet56</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>289</Index>
+          <InterfaceName>HundredGigE0/3/0/8</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet64</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>290</Index>
+          <InterfaceName>FortyGigE0/3/0/8</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet64</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>291</Index>
+          <InterfaceName>FourHundredGigE0/3/0/8</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet64</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>292</Index>
+          <InterfaceName>HundredGigE0/3/0/9</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet72</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>293</Index>
+          <InterfaceName>FortyGigE0/3/0/9</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet72</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>294</Index>
+          <InterfaceName>FourHundredGigE0/3/0/9</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet72</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>295</Index>
+          <InterfaceName>HundredGigE0/3/0/10</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet80</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>296</Index>
+          <InterfaceName>FortyGigE0/3/0/10</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet80</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>297</Index>
+          <InterfaceName>FourHundredGigE0/3/0/10</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet80</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>298</Index>
+          <InterfaceName>HundredGigE0/3/0/11</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet88</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>299</Index>
+          <InterfaceName>FortyGigE0/3/0/11</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet88</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>300</Index>
+          <InterfaceName>FourHundredGigE0/3/0/11</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet88</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>301</Index>
+          <InterfaceName>HundredGigE0/3/0/12</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet96</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>302</Index>
+          <InterfaceName>FortyGigE0/3/0/12</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet96</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>303</Index>
+          <InterfaceName>FourHundredGigE0/3/0/12</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet96</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>304</Index>
+          <InterfaceName>HundredGigE0/3/0/13</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet104</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>305</Index>
+          <InterfaceName>FortyGigE0/3/0/13</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet104</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>306</Index>
+          <InterfaceName>FourHundredGigE0/3/0/13</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet104</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>307</Index>
+          <InterfaceName>HundredGigE0/3/0/14</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet112</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>308</Index>
+          <InterfaceName>FortyGigE0/3/0/14</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet112</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>309</Index>
+          <InterfaceName>FourHundredGigE0/3/0/14</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet112</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>310</Index>
+          <InterfaceName>HundredGigE0/3/0/15</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet120</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>311</Index>
+          <InterfaceName>FortyGigE0/3/0/15</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet120</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>312</Index>
+          <InterfaceName>FourHundredGigE0/3/0/15</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet120</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>313</Index>
+          <InterfaceName>HundredGigE0/3/0/16</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet128</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>314</Index>
+          <InterfaceName>FortyGigE0/3/0/16</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet128</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>315</Index>
+          <InterfaceName>FourHundredGigE0/3/0/16</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet128</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>316</Index>
+          <InterfaceName>HundredGigE0/3/0/17</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet136</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>317</Index>
+          <InterfaceName>FortyGigE0/3/0/17</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet136</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>318</Index>
+          <InterfaceName>FourHundredGigE0/3/0/17</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet136</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>319</Index>
+          <InterfaceName>HundredGigE0/3/0/18</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet144</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>320</Index>
+          <InterfaceName>FortyGigE0/3/0/18</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet144</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>321</Index>
+          <InterfaceName>FourHundredGigE0/3/0/18</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet144</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>322</Index>
+          <InterfaceName>HundredGigE0/3/0/19</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet152</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>323</Index>
+          <InterfaceName>FortyGigE0/3/0/19</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet152</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>324</Index>
+          <InterfaceName>FourHundredGigE0/3/0/19</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet152</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>325</Index>
+          <InterfaceName>HundredGigE0/3/0/20</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet160</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>326</Index>
+          <InterfaceName>FortyGigE0/3/0/20</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet160</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>327</Index>
+          <InterfaceName>FourHundredGigE0/3/0/20</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet160</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>328</Index>
+          <InterfaceName>HundredGigE0/3/0/21</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet168</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>329</Index>
+          <InterfaceName>FortyGigE0/3/0/21</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet168</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>330</Index>
+          <InterfaceName>FourHundredGigE0/3/0/21</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet168</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>331</Index>
+          <InterfaceName>HundredGigE0/3/0/22</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet176</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>332</Index>
+          <InterfaceName>FortyGigE0/3/0/22</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet176</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>333</Index>
+          <InterfaceName>FourHundredGigE0/3/0/22</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet176</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>334</Index>
+          <InterfaceName>HundredGigE0/3/0/23</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet184</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>335</Index>
+          <InterfaceName>FortyGigE0/3/0/23</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet184</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>336</Index>
+          <InterfaceName>FourHundredGigE0/3/0/23</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet184</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>337</Index>
+          <InterfaceName>HundredGigE0/3/0/24</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet192</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>338</Index>
+          <InterfaceName>FortyGigE0/3/0/24</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet192</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>339</Index>
+          <InterfaceName>FourHundredGigE0/3/0/24</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet192</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>340</Index>
+          <InterfaceName>HundredGigE0/3/0/25</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet200</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>341</Index>
+          <InterfaceName>FortyGigE0/3/0/25</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet200</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>342</Index>
+          <InterfaceName>FourHundredGigE0/3/0/25</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet200</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>343</Index>
+          <InterfaceName>HundredGigE0/3/0/26</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet208</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>344</Index>
+          <InterfaceName>FortyGigE0/3/0/26</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet208</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>345</Index>
+          <InterfaceName>FourHundredGigE0/3/0/26</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet208</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>346</Index>
+          <InterfaceName>HundredGigE0/3/0/27</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet216</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>347</Index>
+          <InterfaceName>FortyGigE0/3/0/27</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet216</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>348</Index>
+          <InterfaceName>FourHundredGigE0/3/0/27</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet216</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>349</Index>
+          <InterfaceName>HundredGigE0/3/0/28</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet224</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>350</Index>
+          <InterfaceName>FortyGigE0/3/0/28</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet224</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>351</Index>
+          <InterfaceName>FourHundredGigE0/3/0/28</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet224</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>352</Index>
+          <InterfaceName>HundredGigE0/3/0/29</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet232</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>353</Index>
+          <InterfaceName>FortyGigE0/3/0/29</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet232</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>354</Index>
+          <InterfaceName>FourHundredGigE0/3/0/29</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet232</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>355</Index>
+          <InterfaceName>HundredGigE0/3/0/30</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet240</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>356</Index>
+          <InterfaceName>FortyGigE0/3/0/30</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet240</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>357</Index>
+          <InterfaceName>FourHundredGigE0/3/0/30</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet240</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>358</Index>
+          <InterfaceName>HundredGigE0/3/0/31</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet248</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>359</Index>
+          <InterfaceName>FortyGigE0/3/0/31</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet248</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>360</Index>
+          <InterfaceName>FourHundredGigE0/3/0/31</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet248</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>361</Index>
+          <InterfaceName>HundredGigE0/3/0/32</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet256</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>362</Index>
+          <InterfaceName>FortyGigE0/3/0/32</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet256</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>363</Index>
+          <InterfaceName>FourHundredGigE0/3/0/32</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet256</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>364</Index>
+          <InterfaceName>HundredGigE0/3/0/33</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet264</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>365</Index>
+          <InterfaceName>FortyGigE0/3/0/33</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet264</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>366</Index>
+          <InterfaceName>FourHundredGigE0/3/0/33</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet264</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>367</Index>
+          <InterfaceName>HundredGigE0/3/0/34</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet272</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>368</Index>
+          <InterfaceName>FortyGigE0/3/0/34</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet272</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>369</Index>
+          <InterfaceName>FourHundredGigE0/3/0/34</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet272</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>370</Index>
+          <InterfaceName>HundredGigE0/3/0/35</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet280</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>371</Index>
+          <InterfaceName>FortyGigE0/3/0/35</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet280</SonicName>
+          <Speed>40000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>372</Index>
+          <InterfaceName>FourHundredGigE0/3/0/35</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet280</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>373</Index>
+          <InterfaceName>FourHundredGigE0/4/0/0</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet0</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>374</Index>
+          <InterfaceName>HundredGigE0/4/0/0</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet0</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>375</Index>
+          <InterfaceName>FourHundredGigE0/4/0/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet8</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>376</Index>
+          <InterfaceName>HundredGigE0/4/0/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet8</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>377</Index>
+          <InterfaceName>FourHundredGigE0/4/0/2</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet16</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>378</Index>
+          <InterfaceName>HundredGigE0/4/0/2</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet16</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>379</Index>
+          <InterfaceName>FourHundredGigE0/4/0/3</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet24</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>380</Index>
+          <InterfaceName>HundredGigE0/4/0/3</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet24</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>381</Index>
+          <InterfaceName>FourHundredGigE0/4/0/4</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet32</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>382</Index>
+          <InterfaceName>HundredGigE0/4/0/4</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet32</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>383</Index>
+          <InterfaceName>FourHundredGigE0/4/0/5</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet40</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>384</Index>
+          <InterfaceName>HundredGigE0/4/0/5</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet40</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>385</Index>
+          <InterfaceName>FourHundredGigE0/4/0/6</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet48</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>386</Index>
+          <InterfaceName>HundredGigE0/4/0/6</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet48</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>387</Index>
+          <InterfaceName>FourHundredGigE0/4/0/7</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet56</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>388</Index>
+          <InterfaceName>HundredGigE0/4/0/7</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet56</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>389</Index>
+          <InterfaceName>FourHundredGigE0/4/0/8</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet64</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>390</Index>
+          <InterfaceName>HundredGigE0/4/0/8</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet64</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>391</Index>
+          <InterfaceName>FourHundredGigE0/4/0/9</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet72</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>392</Index>
+          <InterfaceName>HundredGigE0/4/0/9</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet72</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>393</Index>
+          <InterfaceName>FourHundredGigE0/4/0/10</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet80</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>394</Index>
+          <InterfaceName>HundredGigE0/4/0/10</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet80</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>395</Index>
+          <InterfaceName>FourHundredGigE0/4/0/11</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet88</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>396</Index>
+          <InterfaceName>HundredGigE0/4/0/11</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet88</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>397</Index>
+          <InterfaceName>FourHundredGigE0/4/0/12</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet96</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>398</Index>
+          <InterfaceName>HundredGigE0/4/0/12</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet96</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>399</Index>
+          <InterfaceName>FourHundredGigE0/4/0/13</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet104</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>400</Index>
+          <InterfaceName>HundredGigE0/4/0/13</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet104</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>401</Index>
+          <InterfaceName>FourHundredGigE0/4/0/14</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet112</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>402</Index>
+          <InterfaceName>HundredGigE0/4/0/14</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet112</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>403</Index>
+          <InterfaceName>FourHundredGigE0/4/0/15</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet120</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>404</Index>
+          <InterfaceName>HundredGigE0/4/0/15</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet120</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>405</Index>
+          <InterfaceName>FourHundredGigE0/4/0/16</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet128</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>406</Index>
+          <InterfaceName>HundredGigE0/4/0/16</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet128</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>407</Index>
+          <InterfaceName>FourHundredGigE0/4/0/17</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet136</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>408</Index>
+          <InterfaceName>HundredGigE0/4/0/17</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet136</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>409</Index>
+          <InterfaceName>FourHundredGigE0/4/0/18</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet144</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>410</Index>
+          <InterfaceName>HundredGigE0/4/0/18</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet144</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>411</Index>
+          <InterfaceName>FourHundredGigE0/4/0/19</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet152</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>412</Index>
+          <InterfaceName>HundredGigE0/4/0/19</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet152</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>413</Index>
+          <InterfaceName>FourHundredGigE0/4/0/20</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet160</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>414</Index>
+          <InterfaceName>HundredGigE0/4/0/20</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet160</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>415</Index>
+          <InterfaceName>FourHundredGigE0/4/0/21</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet168</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>416</Index>
+          <InterfaceName>HundredGigE0/4/0/21</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet168</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>417</Index>
+          <InterfaceName>FourHundredGigE0/4/0/22</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet176</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>418</Index>
+          <InterfaceName>HundredGigE0/4/0/22</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet176</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>419</Index>
+          <InterfaceName>FourHundredGigE0/4/0/23</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet184</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>420</Index>
+          <InterfaceName>HundredGigE0/4/0/23</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet184</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>421</Index>
+          <InterfaceName>FourHundredGigE0/4/0/24</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet192</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>422</Index>
+          <InterfaceName>HundredGigE0/4/0/24</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet192</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>423</Index>
+          <InterfaceName>FourHundredGigE0/4/0/25</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet200</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>424</Index>
+          <InterfaceName>HundredGigE0/4/0/25</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet200</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>425</Index>
+          <InterfaceName>FourHundredGigE0/4/0/26</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet208</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>426</Index>
+          <InterfaceName>HundredGigE0/4/0/26</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet208</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>427</Index>
+          <InterfaceName>FourHundredGigE0/4/0/27</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet216</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>428</Index>
+          <InterfaceName>HundredGigE0/4/0/27</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet216</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>429</Index>
+          <InterfaceName>FourHundredGigE0/4/0/28</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet224</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>430</Index>
+          <InterfaceName>HundredGigE0/4/0/28</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet224</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>431</Index>
+          <InterfaceName>FourHundredGigE0/4/0/29</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet232</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>432</Index>
+          <InterfaceName>HundredGigE0/4/0/29</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet232</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>433</Index>
+          <InterfaceName>FourHundredGigE0/4/0/30</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet240</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>434</Index>
+          <InterfaceName>HundredGigE0/4/0/30</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet240</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>435</Index>
+          <InterfaceName>FourHundredGigE0/4/0/31</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet248</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>436</Index>
+          <InterfaceName>HundredGigE0/4/0/31</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet248</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>437</Index>
+          <InterfaceName>FourHundredGigE0/4/0/32</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet256</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>438</Index>
+          <InterfaceName>HundredGigE0/4/0/32</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet256</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>439</Index>
+          <InterfaceName>FourHundredGigE0/4/0/33</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet264</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>440</Index>
+          <InterfaceName>HundredGigE0/4/0/33</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet264</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>441</Index>
+          <InterfaceName>FourHundredGigE0/4/0/34</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet272</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>442</Index>
+          <InterfaceName>HundredGigE0/4/0/34</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet272</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>443</Index>
+          <InterfaceName>FourHundredGigE0/4/0/35</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet280</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>444</Index>
+          <InterfaceName>HundredGigE0/4/0/35</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet280</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+      </EthernetInterfaces>
+      <FlowControl>false</FlowControl>
+      <Height>0</Height>
+      <HwSku>Sonic-packet-chassis-sku</HwSku>
+      <InfinibandInterfaces xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+      <InterfaceMetadata xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution">
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/0/0/0</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:0:0:0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/0/0/0</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:0:0:0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/0/0/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:0:0:1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/0/0/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:0:0:1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/0/0/2</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:0:0:2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/0/0/2</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:0:0:2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/0/0/3</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:0:0:3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/0/0/3</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:0:0:3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/0/0/4</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:0:0:4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/0/0/4</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:0:0:4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/0/0/5</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:0:0:5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/0/0/5</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:0:0:5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/0/0/6</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:0:0:6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/0/0/6</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:0:0:6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/0/0/7</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:0:0:7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/0/0/7</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:0:0:7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/0/0/8</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:0:0:8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/0/0/8</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:0:0:8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/0/0/9</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:0:0:9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/0/0/9</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:0:0:9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/0/0/10</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:0:0:10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>11</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/0/0/10</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:0:0:10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>11</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/0/0/11</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>11</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:0:0:11</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/0/0/11</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>11</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:0:0:11</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/0/0/12</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:0:0:12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/0/0/12</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:0:0:12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/0/0/13</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>13</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:0:0:13</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/0/0/13</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>13</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:0:0:13</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/0/0/14</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>14</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:0:0:14</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/0/0/14</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>14</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:0:0:14</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/0/0/15</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>15</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:0:0:15</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/0/0/15</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>15</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:0:0:15</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/0/0/16</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:0:0:16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/0/0/16</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:0:0:16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/0/0/17</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>17</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:0:0:17</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/0/0/17</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>17</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:0:0:17</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/0/0/18</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>18</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:0:0:18</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/0/0/18</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>18</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:0:0:18</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/0/0/19</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>19</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:0:0:19</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/0/0/19</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>19</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:0:0:19</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/0/0/20</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:0:0:20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/0/0/20</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:0:0:20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/0/0/21</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>21</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:0:0:21</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/0/0/21</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>21</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:0:0:21</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/0/0/22</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>22</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:0:0:22</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>11</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/0/0/22</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>22</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:0:0:22</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>11</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/0/0/23</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>23</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:0:0:23</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/0/0/23</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>23</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:0:0:23</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/0/0/24</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:0:0:24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/0/0/24</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:0:0:24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/0/0/25</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>25</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:0:0:25</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/0/0/25</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>25</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:0:0:25</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/0/0/26</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>26</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:0:0:26</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/0/0/26</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>26</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:0:0:26</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/0/0/27</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>27</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:0:0:27</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/0/0/27</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>27</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:0:0:27</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/0/0/28</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:0:0:28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/0/0/28</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:0:0:28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/0/0/29</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>29</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:0:0:29</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/0/0/29</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>29</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:0:0:29</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/0/0/30</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>30</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:0:0:30</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/0/0/30</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>30</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:0:0:30</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/0/0/31</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>31</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:0:0:31</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/0/0/31</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>31</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:0:0:31</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/0/0/32</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:0:0:32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/0/0/32</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:0:0:32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/0/0/33</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>33</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:0:0:33</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/0/0/33</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>33</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:0:0:33</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/0/0/34</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>34</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:0:0:34</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>11</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/0/0/34</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>34</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:0:0:34</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>11</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/0/0/35</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>35</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:0:0:35</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/0/0/35</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>35</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:0:0:35</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/1/0/0</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:1:0:0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/1/0/0</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:1:0:0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/1/0/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:1:0:1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/1/0/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:1:0:1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/1/0/2</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:1:0:2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/1/0/2</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:1:0:2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/1/0/3</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:1:0:3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/1/0/3</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:1:0:3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/1/0/4</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:1:0:4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/1/0/4</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:1:0:4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/1/0/5</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:1:0:5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/1/0/5</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:1:0:5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/1/0/6</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:1:0:6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/1/0/6</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:1:0:6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/1/0/7</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:1:0:7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/1/0/7</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:1:0:7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/1/0/8</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:1:0:8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/1/0/8</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:1:0:8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/1/0/9</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:1:0:9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/1/0/9</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:1:0:9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/1/0/10</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:1:0:10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>11</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/1/0/10</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:1:0:10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>11</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/1/0/11</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>11</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:1:0:11</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/1/0/11</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>11</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:1:0:11</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/1/0/12</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:1:0:12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>13</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/1/0/12</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:1:0:12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>13</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/1/0/13</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>13</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:1:0:13</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/1/0/13</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>13</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:1:0:13</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/1/0/14</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>14</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:1:0:14</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/1/0/14</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>14</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:1:0:14</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/1/0/15</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>15</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:1:0:15</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>14</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/1/0/15</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>15</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:1:0:15</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>14</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/1/0/16</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:1:0:16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/1/0/16</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:1:0:16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/1/0/17</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>17</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:1:0:17</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/1/0/17</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>17</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:1:0:17</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/1/0/18</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>18</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:1:0:18</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>15</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/1/0/18</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>18</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:1:0:18</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>15</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/1/0/19</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>19</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:1:0:19</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/1/0/19</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>19</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:1:0:19</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/1/0/20</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:1:0:20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/1/0/20</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:1:0:20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/1/0/21</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>21</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:1:0:21</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/1/0/21</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>21</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:1:0:21</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/1/0/22</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>22</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:1:0:22</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/1/0/22</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>22</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:1:0:22</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/1/0/23</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>23</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:1:0:23</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/1/0/23</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>23</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:1:0:23</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/1/0/24</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:1:0:24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>17</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/1/0/24</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:1:0:24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>17</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/1/0/25</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>25</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:1:0:25</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/1/0/25</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>25</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:1:0:25</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/1/0/26</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>26</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:1:0:26</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/1/0/26</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>26</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:1:0:26</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/1/0/27</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>27</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:1:0:27</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>18</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/1/0/27</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>27</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:1:0:27</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>18</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/1/0/28</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:1:0:28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>11</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/1/0/28</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:1:0:28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>11</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/1/0/29</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>29</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:1:0:29</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/1/0/29</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>29</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:1:0:29</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/1/0/30</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>30</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:1:0:30</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>19</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/1/0/30</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>30</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:1:0:30</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>19</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/1/0/31</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>31</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:1:0:31</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>13</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/1/0/31</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>31</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:1:0:31</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>13</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/1/0/32</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:1:0:32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>14</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/1/0/32</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:1:0:32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>14</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/1/0/33</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>33</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:1:0:33</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/1/0/33</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>33</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:1:0:33</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/1/0/34</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>34</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:1:0:34</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>15</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/1/0/34</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>34</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:1:0:34</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>15</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/1/0/35</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>35</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:1:0:35</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/1/0/35</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>35</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:1:0:35</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/1/0/36</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:1:0:36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>21</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/1/0/36</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:1:0:36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>21</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/1/0/37</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>37</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:1:0:37</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>17</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/1/0/37</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>37</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:1:0:37</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>17</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/1/0/38</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>38</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:1:0:38</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>18</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/1/0/38</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>38</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:1:0:38</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>18</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/1/0/39</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>39</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:1:0:39</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>22</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/1/0/39</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>39</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:1:0:39</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>22</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/1/0/40</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>40</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:1:0:40</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>19</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/1/0/40</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>40</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:1:0:40</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>19</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/1/0/41</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>41</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:1:0:41</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/1/0/41</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>41</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:1:0:41</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/1/0/42</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>42</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:1:0:42</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>23</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/1/0/42</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>42</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:1:0:42</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>23</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/1/0/43</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>43</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:1:0:43</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>21</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/1/0/43</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>43</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:1:0:43</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>21</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/1/0/44</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>44</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:1:0:44</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>22</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/1/0/44</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>44</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:1:0:44</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>22</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/1/0/45</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>45</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:1:0:45</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/1/0/45</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>45</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:1:0:45</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/1/0/46</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>46</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:1:0:46</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>23</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/1/0/46</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>46</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:1:0:46</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>23</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/1/0/47</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>47</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:1:0:47</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/1/0/47</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>47</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:1:0:47</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/2/0/0</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:2:0:0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/2/0/0</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:2:0:0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/2/0/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:2:0:1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/2/0/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:2:0:1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/2/0/2</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:2:0:2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/2/0/2</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:2:0:2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/2/0/3</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:2:0:3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/2/0/3</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:2:0:3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/2/0/4</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:2:0:4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/2/0/4</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:2:0:4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/2/0/5</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:2:0:5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/2/0/5</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:2:0:5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/2/0/6</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:2:0:6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/2/0/6</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:2:0:6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/2/0/7</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:2:0:7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/2/0/7</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:2:0:7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/2/0/8</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:2:0:8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/2/0/8</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:2:0:8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/2/0/9</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:2:0:9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/2/0/9</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:2:0:9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/2/0/10</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:2:0:10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>11</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/2/0/10</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:2:0:10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>11</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/2/0/11</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>11</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:2:0:11</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/2/0/11</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>11</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:2:0:11</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/2/0/12</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:2:0:12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>13</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/2/0/12</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:2:0:12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>13</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/2/0/13</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>13</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:2:0:13</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/2/0/13</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>13</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:2:0:13</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/2/0/14</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>14</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:2:0:14</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/2/0/14</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>14</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:2:0:14</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/2/0/15</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>15</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:2:0:15</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>14</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/2/0/15</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>15</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:2:0:15</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>14</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/2/0/16</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:2:0:16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/2/0/16</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:2:0:16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/2/0/17</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>17</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:2:0:17</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/2/0/17</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>17</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:2:0:17</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/2/0/18</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>18</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:2:0:18</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>15</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/2/0/18</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>18</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:2:0:18</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>15</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/2/0/19</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>19</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:2:0:19</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/2/0/19</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>19</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:2:0:19</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/2/0/20</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:2:0:20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/2/0/20</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:2:0:20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/2/0/21</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>21</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:2:0:21</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/2/0/21</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>21</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:2:0:21</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/2/0/22</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>22</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:2:0:22</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/2/0/22</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>22</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:2:0:22</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/2/0/23</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>23</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:2:0:23</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/2/0/23</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>23</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:2:0:23</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/2/0/24</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:2:0:24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>17</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/2/0/24</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:2:0:24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>17</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/2/0/25</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>25</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:2:0:25</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/2/0/25</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>25</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:2:0:25</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/2/0/26</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>26</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:2:0:26</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/2/0/26</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>26</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:2:0:26</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/2/0/27</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>27</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:2:0:27</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>18</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/2/0/27</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>27</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:2:0:27</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>18</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/2/0/28</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:2:0:28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>11</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/2/0/28</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:2:0:28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>11</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/2/0/29</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>29</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:2:0:29</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/2/0/29</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>29</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:2:0:29</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/2/0/30</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>30</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:2:0:30</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>19</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/2/0/30</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>30</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:2:0:30</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>19</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/2/0/31</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>31</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:2:0:31</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>13</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/2/0/31</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>31</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:2:0:31</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>13</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/2/0/32</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:2:0:32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>14</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/2/0/32</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:2:0:32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>14</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/2/0/33</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>33</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:2:0:33</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/2/0/33</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>33</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:2:0:33</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/2/0/34</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>34</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:2:0:34</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>15</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/2/0/34</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>34</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:2:0:34</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>15</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/2/0/35</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>35</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:2:0:35</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/2/0/35</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>35</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:2:0:35</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/2/0/36</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:2:0:36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>21</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/2/0/36</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:2:0:36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>21</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/2/0/37</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>37</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:2:0:37</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>17</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/2/0/37</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>37</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:2:0:37</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>17</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/2/0/38</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>38</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:2:0:38</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>18</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/2/0/38</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>38</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:2:0:38</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>18</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/2/0/39</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>39</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:2:0:39</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>22</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/2/0/39</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>39</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:2:0:39</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>22</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/2/0/40</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>40</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:2:0:40</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>19</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/2/0/40</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>40</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:2:0:40</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>19</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/2/0/41</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>41</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:2:0:41</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/2/0/41</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>41</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:2:0:41</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/2/0/42</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>42</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:2:0:42</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>23</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/2/0/42</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>42</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:2:0:42</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>23</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/2/0/43</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>43</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:2:0:43</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>21</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/2/0/43</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>43</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:2:0:43</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>21</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/2/0/44</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>44</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:2:0:44</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>22</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/2/0/44</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>44</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:2:0:44</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>22</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/2/0/45</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>45</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:2:0:45</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/2/0/45</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>45</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:2:0:45</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/2/0/46</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>46</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:2:0:46</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>23</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/2/0/46</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>46</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:2:0:46</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>23</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/2/0/47</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>47</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:2:0:47</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/2/0/47</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-100g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>47</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:2:0:47</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/3/0/0</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/3/0/0</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/3/0/0</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/3/0/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/3/0/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/3/0/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/3/0/2</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/3/0/2</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/3/0/2</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/3/0/3</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/3/0/3</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/3/0/3</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/3/0/4</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/3/0/4</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/3/0/4</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/3/0/5</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/3/0/5</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/3/0/5</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/3/0/6</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/3/0/6</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/3/0/6</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/3/0/7</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/3/0/7</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/3/0/7</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/3/0/8</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/3/0/8</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/3/0/8</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/3/0/9</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/3/0/9</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/3/0/9</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/3/0/10</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>11</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/3/0/10</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>11</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/3/0/10</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>11</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/3/0/11</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>11</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:11</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/3/0/11</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>11</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:11</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/3/0/11</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>11</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:11</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/3/0/12</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/3/0/12</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/3/0/12</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/3/0/13</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>13</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:13</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/3/0/13</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>13</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:13</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/3/0/13</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>13</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:13</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/3/0/14</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>14</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:14</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/3/0/14</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>14</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:14</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/3/0/14</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>14</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:14</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/3/0/15</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>15</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:15</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/3/0/15</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>15</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:15</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/3/0/15</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>15</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:15</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/3/0/16</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/3/0/16</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/3/0/16</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/3/0/17</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>17</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:17</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/3/0/17</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>17</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:17</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/3/0/17</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>17</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:17</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/3/0/18</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>18</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:18</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/3/0/18</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>18</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:18</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/3/0/18</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>18</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:18</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/3/0/19</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>19</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:19</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/3/0/19</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>19</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:19</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/3/0/19</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>19</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:19</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/3/0/20</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/3/0/20</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/3/0/20</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/3/0/21</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>21</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:21</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/3/0/21</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>21</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:21</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/3/0/21</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>21</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:21</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/3/0/22</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>22</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:22</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>11</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/3/0/22</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>22</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:22</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>11</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/3/0/22</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>22</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:22</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>11</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/3/0/23</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>23</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:23</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/3/0/23</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>23</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:23</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/3/0/23</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>23</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:23</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/3/0/24</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/3/0/24</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/3/0/24</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/3/0/25</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>25</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:25</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/3/0/25</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>25</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:25</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/3/0/25</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>25</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:25</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/3/0/26</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>26</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:26</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/3/0/26</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>26</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:26</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/3/0/26</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>26</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:26</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/3/0/27</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>27</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:27</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/3/0/27</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>27</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:27</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/3/0/27</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>27</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:27</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/3/0/28</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/3/0/28</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/3/0/28</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/3/0/29</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>29</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:29</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/3/0/29</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>29</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:29</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/3/0/29</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>29</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:29</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/3/0/30</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>30</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:30</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/3/0/30</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>30</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:30</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/3/0/30</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>30</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:30</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/3/0/31</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>31</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:31</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/3/0/31</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>31</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:31</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/3/0/31</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>31</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:31</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/3/0/32</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/3/0/32</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/3/0/32</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/3/0/33</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>33</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:33</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/3/0/33</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>33</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:33</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/3/0/33</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>33</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:33</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/3/0/34</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>34</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:34</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>11</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/3/0/34</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>34</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:34</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>11</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/3/0/34</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>34</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:34</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>11</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/3/0/35</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>35</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:35</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FortyGigE0/3/0/35</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>35</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:35</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/3/0/35</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>35</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:35</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/4/0/0</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/4/0/0</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/4/0/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/4/0/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/4/0/2</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/4/0/2</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/4/0/3</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/4/0/3</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/4/0/4</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/4/0/4</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/4/0/5</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/4/0/5</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/4/0/6</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/4/0/6</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/4/0/7</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/4/0/7</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/4/0/8</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/4/0/8</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/4/0/9</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/4/0/9</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/4/0/10</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>11</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/4/0/10</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>11</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/4/0/11</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>11</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:11</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/4/0/11</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>11</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:11</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/4/0/12</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>13</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/4/0/12</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>13</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/4/0/13</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>13</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:13</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>13</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/4/0/13</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>13</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:13</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>13</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/4/0/14</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>14</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:14</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>13</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/4/0/14</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>14</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:14</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>13</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/4/0/15</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>15</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:15</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>13</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/4/0/15</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>15</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:15</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>13</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/4/0/16</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>13</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/4/0/16</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>13</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/4/0/17</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>17</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:17</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>13</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/4/0/17</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>17</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:17</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>13</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/4/0/18</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>18</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:18</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>13</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/4/0/18</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>18</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:18</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>13</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/4/0/19</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>19</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:19</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>13</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/4/0/19</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>19</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:19</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>13</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/4/0/20</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>13</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/4/0/20</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>13</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/4/0/21</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>21</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:21</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>13</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/4/0/21</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>21</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:21</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>13</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/4/0/22</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>22</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:22</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>13</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>11</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/4/0/22</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>22</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:22</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>13</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>11</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/4/0/23</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>23</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:23</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>13</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/4/0/23</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>23</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:23</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>13</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/4/0/24</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>14</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/4/0/24</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>14</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/4/0/25</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>25</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:25</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>14</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/4/0/25</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>25</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:25</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>14</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/4/0/26</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>26</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:26</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>14</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/4/0/26</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>26</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:26</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>14</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/4/0/27</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>27</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:27</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>14</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/4/0/27</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>27</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:27</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>14</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/4/0/28</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>14</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/4/0/28</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>14</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/4/0/29</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>29</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:29</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>14</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/4/0/29</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>29</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:29</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>14</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/4/0/30</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>30</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:30</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>14</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/4/0/30</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>30</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:30</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>14</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/4/0/31</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>31</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:31</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>14</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/4/0/31</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>31</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:31</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>14</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/4/0/32</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>14</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/4/0/32</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>14</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/4/0/33</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>33</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:33</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>14</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/4/0/33</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>33</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:33</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>14</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/4/0/34</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>34</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:34</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>14</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>11</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/4/0/34</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>34</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:34</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>14</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>11</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>FourHundredGigE0/4/0/35</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>35</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:35</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>14</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>HundredGigE0/4/0/35</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>35</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:35</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>14</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+      </InterfaceMetadata>
+      <ManagementInterfaces xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution">
+        <a:ManagementInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>MgmtEth0/RP0/CPU0/0</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>1000</Speed>
+        </a:ManagementInterface>
+      </ManagementInterfaces>
+      <OpticalInterfaces xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution">
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>FourHundredGigE0/0/0/0</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>2</Index>
+          <InterfaceName>FourHundredGigE0/0/0/0</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>3</Index>
+          <InterfaceName>FourHundredGigE0/0/0/0</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>4</Index>
+          <InterfaceName>HundredGigE0/0/0/0</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>5</Index>
+          <InterfaceName>HundredGigE0/0/0/0</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>6</Index>
+          <InterfaceName>HundredGigE0/0/0/0</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>7</Index>
+          <InterfaceName>FourHundredGigE0/0/0/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>8</Index>
+          <InterfaceName>FourHundredGigE0/0/0/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>9</Index>
+          <InterfaceName>FourHundredGigE0/0/0/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>10</Index>
+          <InterfaceName>HundredGigE0/0/0/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>11</Index>
+          <InterfaceName>HundredGigE0/0/0/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>12</Index>
+          <InterfaceName>HundredGigE0/0/0/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>13</Index>
+          <InterfaceName>FourHundredGigE0/0/0/2</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>14</Index>
+          <InterfaceName>FourHundredGigE0/0/0/2</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>15</Index>
+          <InterfaceName>FourHundredGigE0/0/0/2</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>16</Index>
+          <InterfaceName>HundredGigE0/0/0/2</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>17</Index>
+          <InterfaceName>HundredGigE0/0/0/2</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>18</Index>
+          <InterfaceName>HundredGigE0/0/0/2</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>19</Index>
+          <InterfaceName>FourHundredGigE0/0/0/3</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>20</Index>
+          <InterfaceName>FourHundredGigE0/0/0/3</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>21</Index>
+          <InterfaceName>FourHundredGigE0/0/0/3</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>22</Index>
+          <InterfaceName>HundredGigE0/0/0/3</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>23</Index>
+          <InterfaceName>HundredGigE0/0/0/3</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>24</Index>
+          <InterfaceName>HundredGigE0/0/0/3</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>25</Index>
+          <InterfaceName>FourHundredGigE0/0/0/4</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>26</Index>
+          <InterfaceName>FourHundredGigE0/0/0/4</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>27</Index>
+          <InterfaceName>FourHundredGigE0/0/0/4</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>28</Index>
+          <InterfaceName>HundredGigE0/0/0/4</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>29</Index>
+          <InterfaceName>HundredGigE0/0/0/4</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>30</Index>
+          <InterfaceName>HundredGigE0/0/0/4</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>31</Index>
+          <InterfaceName>FourHundredGigE0/0/0/5</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>32</Index>
+          <InterfaceName>FourHundredGigE0/0/0/5</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>33</Index>
+          <InterfaceName>FourHundredGigE0/0/0/5</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>34</Index>
+          <InterfaceName>HundredGigE0/0/0/5</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>35</Index>
+          <InterfaceName>HundredGigE0/0/0/5</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>36</Index>
+          <InterfaceName>HundredGigE0/0/0/5</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>37</Index>
+          <InterfaceName>FourHundredGigE0/0/0/6</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>38</Index>
+          <InterfaceName>FourHundredGigE0/0/0/6</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>39</Index>
+          <InterfaceName>FourHundredGigE0/0/0/6</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>40</Index>
+          <InterfaceName>HundredGigE0/0/0/6</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>41</Index>
+          <InterfaceName>HundredGigE0/0/0/6</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>42</Index>
+          <InterfaceName>HundredGigE0/0/0/6</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>43</Index>
+          <InterfaceName>FourHundredGigE0/0/0/7</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>44</Index>
+          <InterfaceName>FourHundredGigE0/0/0/7</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>45</Index>
+          <InterfaceName>FourHundredGigE0/0/0/7</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>46</Index>
+          <InterfaceName>HundredGigE0/0/0/7</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>47</Index>
+          <InterfaceName>HundredGigE0/0/0/7</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>48</Index>
+          <InterfaceName>HundredGigE0/0/0/7</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>49</Index>
+          <InterfaceName>FourHundredGigE0/0/0/8</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>50</Index>
+          <InterfaceName>FourHundredGigE0/0/0/8</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>51</Index>
+          <InterfaceName>FourHundredGigE0/0/0/8</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>52</Index>
+          <InterfaceName>HundredGigE0/0/0/8</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>53</Index>
+          <InterfaceName>HundredGigE0/0/0/8</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>54</Index>
+          <InterfaceName>HundredGigE0/0/0/8</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>55</Index>
+          <InterfaceName>FourHundredGigE0/0/0/9</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>56</Index>
+          <InterfaceName>FourHundredGigE0/0/0/9</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>57</Index>
+          <InterfaceName>FourHundredGigE0/0/0/9</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>58</Index>
+          <InterfaceName>HundredGigE0/0/0/9</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>59</Index>
+          <InterfaceName>HundredGigE0/0/0/9</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>60</Index>
+          <InterfaceName>HundredGigE0/0/0/9</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>61</Index>
+          <InterfaceName>FourHundredGigE0/0/0/10</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>62</Index>
+          <InterfaceName>FourHundredGigE0/0/0/10</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>63</Index>
+          <InterfaceName>FourHundredGigE0/0/0/10</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>64</Index>
+          <InterfaceName>HundredGigE0/0/0/10</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>65</Index>
+          <InterfaceName>HundredGigE0/0/0/10</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>66</Index>
+          <InterfaceName>HundredGigE0/0/0/10</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>67</Index>
+          <InterfaceName>FourHundredGigE0/0/0/11</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>68</Index>
+          <InterfaceName>FourHundredGigE0/0/0/11</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>69</Index>
+          <InterfaceName>FourHundredGigE0/0/0/11</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>70</Index>
+          <InterfaceName>HundredGigE0/0/0/11</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>71</Index>
+          <InterfaceName>HundredGigE0/0/0/11</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>72</Index>
+          <InterfaceName>HundredGigE0/0/0/11</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>73</Index>
+          <InterfaceName>FourHundredGigE0/0/0/12</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>74</Index>
+          <InterfaceName>FourHundredGigE0/0/0/12</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>75</Index>
+          <InterfaceName>FourHundredGigE0/0/0/12</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>76</Index>
+          <InterfaceName>HundredGigE0/0/0/12</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>77</Index>
+          <InterfaceName>HundredGigE0/0/0/12</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>78</Index>
+          <InterfaceName>HundredGigE0/0/0/12</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>79</Index>
+          <InterfaceName>FourHundredGigE0/0/0/13</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>80</Index>
+          <InterfaceName>FourHundredGigE0/0/0/13</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>81</Index>
+          <InterfaceName>FourHundredGigE0/0/0/13</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>82</Index>
+          <InterfaceName>HundredGigE0/0/0/13</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>83</Index>
+          <InterfaceName>HundredGigE0/0/0/13</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>84</Index>
+          <InterfaceName>HundredGigE0/0/0/13</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>85</Index>
+          <InterfaceName>FourHundredGigE0/0/0/14</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>86</Index>
+          <InterfaceName>FourHundredGigE0/0/0/14</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>87</Index>
+          <InterfaceName>FourHundredGigE0/0/0/14</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>88</Index>
+          <InterfaceName>HundredGigE0/0/0/14</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>89</Index>
+          <InterfaceName>HundredGigE0/0/0/14</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>90</Index>
+          <InterfaceName>HundredGigE0/0/0/14</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>91</Index>
+          <InterfaceName>FourHundredGigE0/0/0/15</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>92</Index>
+          <InterfaceName>FourHundredGigE0/0/0/15</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>93</Index>
+          <InterfaceName>FourHundredGigE0/0/0/15</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>94</Index>
+          <InterfaceName>HundredGigE0/0/0/15</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>95</Index>
+          <InterfaceName>HundredGigE0/0/0/15</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>96</Index>
+          <InterfaceName>HundredGigE0/0/0/15</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>97</Index>
+          <InterfaceName>FourHundredGigE0/0/0/16</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>98</Index>
+          <InterfaceName>FourHundredGigE0/0/0/16</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>99</Index>
+          <InterfaceName>FourHundredGigE0/0/0/16</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>100</Index>
+          <InterfaceName>HundredGigE0/0/0/16</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>101</Index>
+          <InterfaceName>HundredGigE0/0/0/16</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>102</Index>
+          <InterfaceName>HundredGigE0/0/0/16</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>103</Index>
+          <InterfaceName>FourHundredGigE0/0/0/17</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>104</Index>
+          <InterfaceName>FourHundredGigE0/0/0/17</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>105</Index>
+          <InterfaceName>FourHundredGigE0/0/0/17</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>106</Index>
+          <InterfaceName>HundredGigE0/0/0/17</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>107</Index>
+          <InterfaceName>HundredGigE0/0/0/17</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>108</Index>
+          <InterfaceName>HundredGigE0/0/0/17</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>109</Index>
+          <InterfaceName>FourHundredGigE0/0/0/18</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>110</Index>
+          <InterfaceName>FourHundredGigE0/0/0/18</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>111</Index>
+          <InterfaceName>FourHundredGigE0/0/0/18</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>112</Index>
+          <InterfaceName>HundredGigE0/0/0/18</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>113</Index>
+          <InterfaceName>HundredGigE0/0/0/18</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>114</Index>
+          <InterfaceName>HundredGigE0/0/0/18</InterfaceName>
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+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>115</Index>
+          <InterfaceName>FourHundredGigE0/0/0/19</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>116</Index>
+          <InterfaceName>FourHundredGigE0/0/0/19</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>117</Index>
+          <InterfaceName>FourHundredGigE0/0/0/19</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>118</Index>
+          <InterfaceName>HundredGigE0/0/0/19</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>119</Index>
+          <InterfaceName>HundredGigE0/0/0/19</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>120</Index>
+          <InterfaceName>HundredGigE0/0/0/19</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>121</Index>
+          <InterfaceName>FourHundredGigE0/0/0/20</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>122</Index>
+          <InterfaceName>FourHundredGigE0/0/0/20</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>123</Index>
+          <InterfaceName>FourHundredGigE0/0/0/20</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>124</Index>
+          <InterfaceName>HundredGigE0/0/0/20</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>125</Index>
+          <InterfaceName>HundredGigE0/0/0/20</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>126</Index>
+          <InterfaceName>HundredGigE0/0/0/20</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>127</Index>
+          <InterfaceName>FourHundredGigE0/0/0/21</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>128</Index>
+          <InterfaceName>FourHundredGigE0/0/0/21</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>129</Index>
+          <InterfaceName>FourHundredGigE0/0/0/21</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>130</Index>
+          <InterfaceName>HundredGigE0/0/0/21</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>131</Index>
+          <InterfaceName>HundredGigE0/0/0/21</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>132</Index>
+          <InterfaceName>HundredGigE0/0/0/21</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>133</Index>
+          <InterfaceName>FourHundredGigE0/0/0/22</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>134</Index>
+          <InterfaceName>FourHundredGigE0/0/0/22</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>135</Index>
+          <InterfaceName>FourHundredGigE0/0/0/22</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>136</Index>
+          <InterfaceName>HundredGigE0/0/0/22</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>137</Index>
+          <InterfaceName>HundredGigE0/0/0/22</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>138</Index>
+          <InterfaceName>HundredGigE0/0/0/22</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>139</Index>
+          <InterfaceName>FourHundredGigE0/0/0/23</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>140</Index>
+          <InterfaceName>FourHundredGigE0/0/0/23</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>141</Index>
+          <InterfaceName>FourHundredGigE0/0/0/23</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>142</Index>
+          <InterfaceName>HundredGigE0/0/0/23</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>143</Index>
+          <InterfaceName>HundredGigE0/0/0/23</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>144</Index>
+          <InterfaceName>HundredGigE0/0/0/23</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>145</Index>
+          <InterfaceName>FourHundredGigE0/0/0/24</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>146</Index>
+          <InterfaceName>FourHundredGigE0/0/0/24</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>147</Index>
+          <InterfaceName>FourHundredGigE0/0/0/24</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>148</Index>
+          <InterfaceName>HundredGigE0/0/0/24</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>149</Index>
+          <InterfaceName>HundredGigE0/0/0/24</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>150</Index>
+          <InterfaceName>HundredGigE0/0/0/24</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>151</Index>
+          <InterfaceName>FourHundredGigE0/0/0/25</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>152</Index>
+          <InterfaceName>FourHundredGigE0/0/0/25</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>153</Index>
+          <InterfaceName>FourHundredGigE0/0/0/25</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>154</Index>
+          <InterfaceName>HundredGigE0/0/0/25</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>155</Index>
+          <InterfaceName>HundredGigE0/0/0/25</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>156</Index>
+          <InterfaceName>HundredGigE0/0/0/25</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>157</Index>
+          <InterfaceName>FourHundredGigE0/0/0/26</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>158</Index>
+          <InterfaceName>FourHundredGigE0/0/0/26</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>159</Index>
+          <InterfaceName>FourHundredGigE0/0/0/26</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>160</Index>
+          <InterfaceName>HundredGigE0/0/0/26</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>161</Index>
+          <InterfaceName>HundredGigE0/0/0/26</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>162</Index>
+          <InterfaceName>HundredGigE0/0/0/26</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>163</Index>
+          <InterfaceName>FourHundredGigE0/0/0/27</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>164</Index>
+          <InterfaceName>FourHundredGigE0/0/0/27</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>165</Index>
+          <InterfaceName>FourHundredGigE0/0/0/27</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>166</Index>
+          <InterfaceName>HundredGigE0/0/0/27</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>167</Index>
+          <InterfaceName>HundredGigE0/0/0/27</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>168</Index>
+          <InterfaceName>HundredGigE0/0/0/27</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>169</Index>
+          <InterfaceName>FourHundredGigE0/0/0/28</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>170</Index>
+          <InterfaceName>FourHundredGigE0/0/0/28</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>171</Index>
+          <InterfaceName>FourHundredGigE0/0/0/28</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>172</Index>
+          <InterfaceName>HundredGigE0/0/0/28</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>173</Index>
+          <InterfaceName>HundredGigE0/0/0/28</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>174</Index>
+          <InterfaceName>HundredGigE0/0/0/28</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>175</Index>
+          <InterfaceName>FourHundredGigE0/0/0/29</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>176</Index>
+          <InterfaceName>FourHundredGigE0/0/0/29</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>177</Index>
+          <InterfaceName>FourHundredGigE0/0/0/29</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>178</Index>
+          <InterfaceName>HundredGigE0/0/0/29</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>179</Index>
+          <InterfaceName>HundredGigE0/0/0/29</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>180</Index>
+          <InterfaceName>HundredGigE0/0/0/29</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>181</Index>
+          <InterfaceName>FourHundredGigE0/0/0/30</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>182</Index>
+          <InterfaceName>FourHundredGigE0/0/0/30</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>183</Index>
+          <InterfaceName>FourHundredGigE0/0/0/30</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>184</Index>
+          <InterfaceName>HundredGigE0/0/0/30</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>185</Index>
+          <InterfaceName>HundredGigE0/0/0/30</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>186</Index>
+          <InterfaceName>HundredGigE0/0/0/30</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>187</Index>
+          <InterfaceName>FourHundredGigE0/0/0/31</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>188</Index>
+          <InterfaceName>FourHundredGigE0/0/0/31</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>189</Index>
+          <InterfaceName>FourHundredGigE0/0/0/31</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>190</Index>
+          <InterfaceName>HundredGigE0/0/0/31</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>191</Index>
+          <InterfaceName>HundredGigE0/0/0/31</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>192</Index>
+          <InterfaceName>HundredGigE0/0/0/31</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>193</Index>
+          <InterfaceName>FourHundredGigE0/0/0/32</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>194</Index>
+          <InterfaceName>FourHundredGigE0/0/0/32</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>195</Index>
+          <InterfaceName>FourHundredGigE0/0/0/32</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>196</Index>
+          <InterfaceName>HundredGigE0/0/0/32</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>197</Index>
+          <InterfaceName>HundredGigE0/0/0/32</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>198</Index>
+          <InterfaceName>HundredGigE0/0/0/32</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>199</Index>
+          <InterfaceName>FourHundredGigE0/0/0/33</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>200</Index>
+          <InterfaceName>FourHundredGigE0/0/0/33</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>201</Index>
+          <InterfaceName>FourHundredGigE0/0/0/33</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>202</Index>
+          <InterfaceName>HundredGigE0/0/0/33</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>203</Index>
+          <InterfaceName>HundredGigE0/0/0/33</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>204</Index>
+          <InterfaceName>HundredGigE0/0/0/33</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>205</Index>
+          <InterfaceName>FourHundredGigE0/0/0/34</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>206</Index>
+          <InterfaceName>FourHundredGigE0/0/0/34</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>207</Index>
+          <InterfaceName>FourHundredGigE0/0/0/34</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>208</Index>
+          <InterfaceName>HundredGigE0/0/0/34</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>209</Index>
+          <InterfaceName>HundredGigE0/0/0/34</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>210</Index>
+          <InterfaceName>HundredGigE0/0/0/34</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>211</Index>
+          <InterfaceName>FourHundredGigE0/0/0/35</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>212</Index>
+          <InterfaceName>FourHundredGigE0/0/0/35</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>213</Index>
+          <InterfaceName>FourHundredGigE0/0/0/35</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>214</Index>
+          <InterfaceName>HundredGigE0/0/0/35</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>215</Index>
+          <InterfaceName>HundredGigE0/0/0/35</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>216</Index>
+          <InterfaceName>HundredGigE0/0/0/35</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>217</Index>
+          <InterfaceName>HundredGigE0/1/0/0</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>218</Index>
+          <InterfaceName>HundredGigE0/1/0/0</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>219</Index>
+          <InterfaceName>HundredGigE0/1/0/0</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>220</Index>
+          <InterfaceName>FortyGigE0/1/0/0</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>221</Index>
+          <InterfaceName>FortyGigE0/1/0/0</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>222</Index>
+          <InterfaceName>FortyGigE0/1/0/0</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>223</Index>
+          <InterfaceName>HundredGigE0/1/0/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>224</Index>
+          <InterfaceName>HundredGigE0/1/0/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>225</Index>
+          <InterfaceName>HundredGigE0/1/0/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>226</Index>
+          <InterfaceName>FortyGigE0/1/0/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>227</Index>
+          <InterfaceName>FortyGigE0/1/0/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>228</Index>
+          <InterfaceName>FortyGigE0/1/0/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>229</Index>
+          <InterfaceName>HundredGigE0/1/0/2</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>230</Index>
+          <InterfaceName>HundredGigE0/1/0/2</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>231</Index>
+          <InterfaceName>HundredGigE0/1/0/2</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>232</Index>
+          <InterfaceName>FortyGigE0/1/0/2</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>233</Index>
+          <InterfaceName>FortyGigE0/1/0/2</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>234</Index>
+          <InterfaceName>FortyGigE0/1/0/2</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>235</Index>
+          <InterfaceName>HundredGigE0/1/0/3</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>236</Index>
+          <InterfaceName>HundredGigE0/1/0/3</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>237</Index>
+          <InterfaceName>HundredGigE0/1/0/3</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>238</Index>
+          <InterfaceName>FortyGigE0/1/0/3</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>239</Index>
+          <InterfaceName>FortyGigE0/1/0/3</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>240</Index>
+          <InterfaceName>FortyGigE0/1/0/3</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>241</Index>
+          <InterfaceName>HundredGigE0/1/0/4</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>242</Index>
+          <InterfaceName>HundredGigE0/1/0/4</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>243</Index>
+          <InterfaceName>HundredGigE0/1/0/4</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>244</Index>
+          <InterfaceName>FortyGigE0/1/0/4</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>245</Index>
+          <InterfaceName>FortyGigE0/1/0/4</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>246</Index>
+          <InterfaceName>FortyGigE0/1/0/4</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>247</Index>
+          <InterfaceName>HundredGigE0/1/0/5</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>248</Index>
+          <InterfaceName>HundredGigE0/1/0/5</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>249</Index>
+          <InterfaceName>HundredGigE0/1/0/5</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>250</Index>
+          <InterfaceName>FortyGigE0/1/0/5</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>251</Index>
+          <InterfaceName>FortyGigE0/1/0/5</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>252</Index>
+          <InterfaceName>FortyGigE0/1/0/5</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>253</Index>
+          <InterfaceName>HundredGigE0/1/0/6</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>254</Index>
+          <InterfaceName>HundredGigE0/1/0/6</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>255</Index>
+          <InterfaceName>HundredGigE0/1/0/6</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>256</Index>
+          <InterfaceName>FortyGigE0/1/0/6</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>257</Index>
+          <InterfaceName>FortyGigE0/1/0/6</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>258</Index>
+          <InterfaceName>FortyGigE0/1/0/6</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>259</Index>
+          <InterfaceName>HundredGigE0/1/0/7</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>260</Index>
+          <InterfaceName>HundredGigE0/1/0/7</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>261</Index>
+          <InterfaceName>HundredGigE0/1/0/7</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>262</Index>
+          <InterfaceName>FortyGigE0/1/0/7</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>263</Index>
+          <InterfaceName>FortyGigE0/1/0/7</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>264</Index>
+          <InterfaceName>FortyGigE0/1/0/7</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>265</Index>
+          <InterfaceName>HundredGigE0/1/0/8</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>266</Index>
+          <InterfaceName>HundredGigE0/1/0/8</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>267</Index>
+          <InterfaceName>HundredGigE0/1/0/8</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>268</Index>
+          <InterfaceName>FortyGigE0/1/0/8</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>269</Index>
+          <InterfaceName>FortyGigE0/1/0/8</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>270</Index>
+          <InterfaceName>FortyGigE0/1/0/8</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>271</Index>
+          <InterfaceName>HundredGigE0/1/0/9</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>272</Index>
+          <InterfaceName>HundredGigE0/1/0/9</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>273</Index>
+          <InterfaceName>HundredGigE0/1/0/9</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>274</Index>
+          <InterfaceName>FortyGigE0/1/0/9</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>275</Index>
+          <InterfaceName>FortyGigE0/1/0/9</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>276</Index>
+          <InterfaceName>FortyGigE0/1/0/9</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>277</Index>
+          <InterfaceName>HundredGigE0/1/0/10</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>278</Index>
+          <InterfaceName>HundredGigE0/1/0/10</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>279</Index>
+          <InterfaceName>HundredGigE0/1/0/10</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>280</Index>
+          <InterfaceName>FortyGigE0/1/0/10</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>281</Index>
+          <InterfaceName>FortyGigE0/1/0/10</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>282</Index>
+          <InterfaceName>FortyGigE0/1/0/10</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>283</Index>
+          <InterfaceName>HundredGigE0/1/0/11</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>284</Index>
+          <InterfaceName>HundredGigE0/1/0/11</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>285</Index>
+          <InterfaceName>HundredGigE0/1/0/11</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>286</Index>
+          <InterfaceName>FortyGigE0/1/0/11</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>287</Index>
+          <InterfaceName>FortyGigE0/1/0/11</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>288</Index>
+          <InterfaceName>FortyGigE0/1/0/11</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>289</Index>
+          <InterfaceName>HundredGigE0/1/0/12</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>290</Index>
+          <InterfaceName>HundredGigE0/1/0/12</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>291</Index>
+          <InterfaceName>HundredGigE0/1/0/12</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>292</Index>
+          <InterfaceName>FortyGigE0/1/0/12</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>293</Index>
+          <InterfaceName>FortyGigE0/1/0/12</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>294</Index>
+          <InterfaceName>FortyGigE0/1/0/12</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>295</Index>
+          <InterfaceName>HundredGigE0/1/0/13</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>296</Index>
+          <InterfaceName>HundredGigE0/1/0/13</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>297</Index>
+          <InterfaceName>HundredGigE0/1/0/13</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>298</Index>
+          <InterfaceName>FortyGigE0/1/0/13</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>299</Index>
+          <InterfaceName>FortyGigE0/1/0/13</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>300</Index>
+          <InterfaceName>FortyGigE0/1/0/13</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>301</Index>
+          <InterfaceName>HundredGigE0/1/0/14</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>302</Index>
+          <InterfaceName>HundredGigE0/1/0/14</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>303</Index>
+          <InterfaceName>HundredGigE0/1/0/14</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>304</Index>
+          <InterfaceName>FortyGigE0/1/0/14</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>305</Index>
+          <InterfaceName>FortyGigE0/1/0/14</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>306</Index>
+          <InterfaceName>FortyGigE0/1/0/14</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>307</Index>
+          <InterfaceName>HundredGigE0/1/0/15</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>308</Index>
+          <InterfaceName>HundredGigE0/1/0/15</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>309</Index>
+          <InterfaceName>HundredGigE0/1/0/15</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>310</Index>
+          <InterfaceName>FortyGigE0/1/0/15</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>311</Index>
+          <InterfaceName>FortyGigE0/1/0/15</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>312</Index>
+          <InterfaceName>FortyGigE0/1/0/15</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>313</Index>
+          <InterfaceName>HundredGigE0/1/0/16</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>314</Index>
+          <InterfaceName>HundredGigE0/1/0/16</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>315</Index>
+          <InterfaceName>HundredGigE0/1/0/16</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>316</Index>
+          <InterfaceName>FortyGigE0/1/0/16</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>317</Index>
+          <InterfaceName>FortyGigE0/1/0/16</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>318</Index>
+          <InterfaceName>FortyGigE0/1/0/16</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>319</Index>
+          <InterfaceName>HundredGigE0/1/0/17</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>320</Index>
+          <InterfaceName>HundredGigE0/1/0/17</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>321</Index>
+          <InterfaceName>HundredGigE0/1/0/17</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>322</Index>
+          <InterfaceName>FortyGigE0/1/0/17</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>323</Index>
+          <InterfaceName>FortyGigE0/1/0/17</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>324</Index>
+          <InterfaceName>FortyGigE0/1/0/17</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>325</Index>
+          <InterfaceName>HundredGigE0/1/0/18</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>326</Index>
+          <InterfaceName>HundredGigE0/1/0/18</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>327</Index>
+          <InterfaceName>HundredGigE0/1/0/18</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>328</Index>
+          <InterfaceName>FortyGigE0/1/0/18</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>329</Index>
+          <InterfaceName>FortyGigE0/1/0/18</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>330</Index>
+          <InterfaceName>FortyGigE0/1/0/18</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>331</Index>
+          <InterfaceName>HundredGigE0/1/0/19</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>332</Index>
+          <InterfaceName>HundredGigE0/1/0/19</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>333</Index>
+          <InterfaceName>HundredGigE0/1/0/19</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>334</Index>
+          <InterfaceName>FortyGigE0/1/0/19</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>335</Index>
+          <InterfaceName>FortyGigE0/1/0/19</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>336</Index>
+          <InterfaceName>FortyGigE0/1/0/19</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>337</Index>
+          <InterfaceName>HundredGigE0/1/0/20</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>338</Index>
+          <InterfaceName>HundredGigE0/1/0/20</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>339</Index>
+          <InterfaceName>HundredGigE0/1/0/20</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>340</Index>
+          <InterfaceName>FortyGigE0/1/0/20</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>341</Index>
+          <InterfaceName>FortyGigE0/1/0/20</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>342</Index>
+          <InterfaceName>FortyGigE0/1/0/20</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>343</Index>
+          <InterfaceName>HundredGigE0/1/0/21</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>344</Index>
+          <InterfaceName>HundredGigE0/1/0/21</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>345</Index>
+          <InterfaceName>HundredGigE0/1/0/21</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>346</Index>
+          <InterfaceName>FortyGigE0/1/0/21</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>347</Index>
+          <InterfaceName>FortyGigE0/1/0/21</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
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+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>349</Index>
+          <InterfaceName>HundredGigE0/1/0/22</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>350</Index>
+          <InterfaceName>HundredGigE0/1/0/22</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>351</Index>
+          <InterfaceName>HundredGigE0/1/0/22</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>352</Index>
+          <InterfaceName>FortyGigE0/1/0/22</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
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+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
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+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>353</Index>
+          <InterfaceName>FortyGigE0/1/0/22</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
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+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>HundredGigE0/1/0/23</InterfaceName>
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+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
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+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>356</Index>
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+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>FortyGigE0/1/0/23</InterfaceName>
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+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>FortyGigE0/1/0/23</InterfaceName>
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+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
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+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>HundredGigE0/1/0/24</InterfaceName>
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+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
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+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <SonicName i:nil="true"/>
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+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>HundredGigE0/1/0/24</InterfaceName>
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+          <PortName i:nil="true"/>
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+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
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+          <a:SlotIndex>0</a:SlotIndex>
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+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>364</Index>
+          <InterfaceName>FortyGigE0/1/0/24</InterfaceName>
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+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
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+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>FortyGigE0/1/0/24</InterfaceName>
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+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
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+          <a:OpticalAddDropType i:nil="true"/>
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+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>366</Index>
+          <InterfaceName>FortyGigE0/1/0/24</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>HundredGigE0/1/0/25</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
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+          <a:SlotIndex>0</a:SlotIndex>
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+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>HundredGigE0/1/0/25</InterfaceName>
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+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
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+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>369</Index>
+          <InterfaceName>HundredGigE0/1/0/25</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>370</Index>
+          <InterfaceName>FortyGigE0/1/0/25</InterfaceName>
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+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
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+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>371</Index>
+          <InterfaceName>FortyGigE0/1/0/25</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
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+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>FortyGigE0/1/0/25</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
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+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
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+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>373</Index>
+          <InterfaceName>HundredGigE0/1/0/26</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
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+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
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+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>374</Index>
+          <InterfaceName>HundredGigE0/1/0/26</InterfaceName>
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+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>HundredGigE0/1/0/26</InterfaceName>
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+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
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+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
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+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>FortyGigE0/1/0/26</InterfaceName>
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+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>FortyGigE0/1/0/26</InterfaceName>
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+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>FortyGigE0/1/0/26</InterfaceName>
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+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
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+          <EnableFlowControl>false</EnableFlowControl>
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+          <a:OpticalAddDropType i:nil="true"/>
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+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>HundredGigE0/1/0/27</InterfaceName>
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+          <a:Dwdm>none</a:Dwdm>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>381</Index>
+          <InterfaceName>HundredGigE0/1/0/27</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>382</Index>
+          <InterfaceName>FortyGigE0/1/0/27</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>383</Index>
+          <InterfaceName>FortyGigE0/1/0/27</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>384</Index>
+          <InterfaceName>FortyGigE0/1/0/27</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>385</Index>
+          <InterfaceName>HundredGigE0/1/0/28</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>386</Index>
+          <InterfaceName>HundredGigE0/1/0/28</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>387</Index>
+          <InterfaceName>HundredGigE0/1/0/28</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>388</Index>
+          <InterfaceName>FortyGigE0/1/0/28</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>389</Index>
+          <InterfaceName>FortyGigE0/1/0/28</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>390</Index>
+          <InterfaceName>FortyGigE0/1/0/28</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>391</Index>
+          <InterfaceName>HundredGigE0/1/0/29</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>392</Index>
+          <InterfaceName>HundredGigE0/1/0/29</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>393</Index>
+          <InterfaceName>HundredGigE0/1/0/29</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>394</Index>
+          <InterfaceName>FortyGigE0/1/0/29</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>395</Index>
+          <InterfaceName>FortyGigE0/1/0/29</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>396</Index>
+          <InterfaceName>FortyGigE0/1/0/29</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>397</Index>
+          <InterfaceName>HundredGigE0/1/0/30</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>398</Index>
+          <InterfaceName>HundredGigE0/1/0/30</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>399</Index>
+          <InterfaceName>HundredGigE0/1/0/30</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>400</Index>
+          <InterfaceName>FortyGigE0/1/0/30</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>401</Index>
+          <InterfaceName>FortyGigE0/1/0/30</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>402</Index>
+          <InterfaceName>FortyGigE0/1/0/30</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>403</Index>
+          <InterfaceName>HundredGigE0/1/0/31</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>404</Index>
+          <InterfaceName>HundredGigE0/1/0/31</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>405</Index>
+          <InterfaceName>HundredGigE0/1/0/31</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>406</Index>
+          <InterfaceName>FortyGigE0/1/0/31</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>407</Index>
+          <InterfaceName>FortyGigE0/1/0/31</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>408</Index>
+          <InterfaceName>FortyGigE0/1/0/31</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>409</Index>
+          <InterfaceName>HundredGigE0/1/0/32</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>HundredGigE0/1/0/32</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>411</Index>
+          <InterfaceName>HundredGigE0/1/0/32</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>412</Index>
+          <InterfaceName>FortyGigE0/1/0/32</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
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+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>FortyGigE0/1/0/32</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <MultiPortsInterface>false</MultiPortsInterface>
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+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>415</Index>
+          <InterfaceName>HundredGigE0/1/0/33</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
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+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>416</Index>
+          <InterfaceName>HundredGigE0/1/0/33</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>417</Index>
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+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>418</Index>
+          <InterfaceName>FortyGigE0/1/0/33</InterfaceName>
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+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>419</Index>
+          <InterfaceName>FortyGigE0/1/0/33</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
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+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
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+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>422</Index>
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+          <MultiPortsInterface>false</MultiPortsInterface>
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+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <MultiPortsInterface>false</MultiPortsInterface>
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+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <MultiPortsInterface>false</MultiPortsInterface>
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+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>FortyGigE0/1/0/35</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
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+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>FortyGigE0/1/0/35</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
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+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>432</Index>
+          <InterfaceName>FortyGigE0/1/0/35</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>433</Index>
+          <InterfaceName>HundredGigE0/1/0/36</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>434</Index>
+          <InterfaceName>HundredGigE0/1/0/36</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>435</Index>
+          <InterfaceName>HundredGigE0/1/0/36</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>436</Index>
+          <InterfaceName>FortyGigE0/1/0/36</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
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+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>437</Index>
+          <InterfaceName>FortyGigE0/1/0/36</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
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+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>FortyGigE0/1/0/36</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>439</Index>
+          <InterfaceName>HundredGigE0/1/0/37</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>440</Index>
+          <InterfaceName>HundredGigE0/1/0/37</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
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+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>HundredGigE0/1/0/37</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
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+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>442</Index>
+          <InterfaceName>FortyGigE0/1/0/37</InterfaceName>
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+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
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+          <a:OpticalAddDropType i:nil="true"/>
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+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>443</Index>
+          <InterfaceName>FortyGigE0/1/0/37</InterfaceName>
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+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
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+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>FortyGigE0/1/0/37</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
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+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
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+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>HundredGigE0/1/0/38</InterfaceName>
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+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
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+          <a:SlotIndex>0</a:SlotIndex>
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+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>446</Index>
+          <InterfaceName>HundredGigE0/1/0/38</InterfaceName>
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+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>447</Index>
+          <InterfaceName>HundredGigE0/1/0/38</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>448</Index>
+          <InterfaceName>FortyGigE0/1/0/38</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>449</Index>
+          <InterfaceName>FortyGigE0/1/0/38</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>450</Index>
+          <InterfaceName>FortyGigE0/1/0/38</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>451</Index>
+          <InterfaceName>HundredGigE0/1/0/39</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>452</Index>
+          <InterfaceName>HundredGigE0/1/0/39</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>453</Index>
+          <InterfaceName>HundredGigE0/1/0/39</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>454</Index>
+          <InterfaceName>FortyGigE0/1/0/39</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>455</Index>
+          <InterfaceName>FortyGigE0/1/0/39</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>456</Index>
+          <InterfaceName>FortyGigE0/1/0/39</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>457</Index>
+          <InterfaceName>HundredGigE0/1/0/40</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>458</Index>
+          <InterfaceName>HundredGigE0/1/0/40</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>462</Index>
+          <InterfaceName>FortyGigE0/1/0/40</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>463</Index>
+          <InterfaceName>HundredGigE0/1/0/41</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>464</Index>
+          <InterfaceName>HundredGigE0/1/0/41</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>465</Index>
+          <InterfaceName>HundredGigE0/1/0/41</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>FortyGigE0/1/0/41</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>467</Index>
+          <InterfaceName>FortyGigE0/1/0/41</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>468</Index>
+          <InterfaceName>FortyGigE0/1/0/41</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>469</Index>
+          <InterfaceName>HundredGigE0/1/0/42</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>470</Index>
+          <InterfaceName>HundredGigE0/1/0/42</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
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+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>HundredGigE0/1/0/42</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>FortyGigE0/1/0/42</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>FortyGigE0/1/0/42</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
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+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>FortyGigE0/1/0/42</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>HundredGigE0/1/0/43</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
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+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
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+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>476</Index>
+          <InterfaceName>HundredGigE0/1/0/43</InterfaceName>
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+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
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+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>HundredGigE0/1/0/43</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
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+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>FortyGigE0/1/0/43</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
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+          <SonicName i:nil="true"/>
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+          <a:Direction>egress</a:Direction>
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+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
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+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>479</Index>
+          <InterfaceName>FortyGigE0/1/0/43</InterfaceName>
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+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
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+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>480</Index>
+          <InterfaceName>FortyGigE0/1/0/43</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>481</Index>
+          <InterfaceName>HundredGigE0/1/0/44</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>482</Index>
+          <InterfaceName>HundredGigE0/1/0/44</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>483</Index>
+          <InterfaceName>HundredGigE0/1/0/44</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>484</Index>
+          <InterfaceName>FortyGigE0/1/0/44</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>485</Index>
+          <InterfaceName>FortyGigE0/1/0/44</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>486</Index>
+          <InterfaceName>FortyGigE0/1/0/44</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>487</Index>
+          <InterfaceName>HundredGigE0/1/0/45</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>488</Index>
+          <InterfaceName>HundredGigE0/1/0/45</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>489</Index>
+          <InterfaceName>HundredGigE0/1/0/45</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>490</Index>
+          <InterfaceName>FortyGigE0/1/0/45</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>491</Index>
+          <InterfaceName>FortyGigE0/1/0/45</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>492</Index>
+          <InterfaceName>FortyGigE0/1/0/45</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>493</Index>
+          <InterfaceName>HundredGigE0/1/0/46</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>494</Index>
+          <InterfaceName>HundredGigE0/1/0/46</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>495</Index>
+          <InterfaceName>HundredGigE0/1/0/46</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>496</Index>
+          <InterfaceName>FortyGigE0/1/0/46</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>497</Index>
+          <InterfaceName>FortyGigE0/1/0/46</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>498</Index>
+          <InterfaceName>FortyGigE0/1/0/46</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>499</Index>
+          <InterfaceName>HundredGigE0/1/0/47</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>500</Index>
+          <InterfaceName>HundredGigE0/1/0/47</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>501</Index>
+          <InterfaceName>HundredGigE0/1/0/47</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>502</Index>
+          <InterfaceName>FortyGigE0/1/0/47</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>503</Index>
+          <InterfaceName>FortyGigE0/1/0/47</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>504</Index>
+          <InterfaceName>FortyGigE0/1/0/47</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>505</Index>
+          <InterfaceName>HundredGigE0/2/0/0</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>506</Index>
+          <InterfaceName>HundredGigE0/2/0/0</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>507</Index>
+          <InterfaceName>HundredGigE0/2/0/0</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>508</Index>
+          <InterfaceName>FortyGigE0/2/0/0</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>509</Index>
+          <InterfaceName>FortyGigE0/2/0/0</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>510</Index>
+          <InterfaceName>FortyGigE0/2/0/0</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>511</Index>
+          <InterfaceName>HundredGigE0/2/0/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>512</Index>
+          <InterfaceName>HundredGigE0/2/0/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>513</Index>
+          <InterfaceName>HundredGigE0/2/0/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>514</Index>
+          <InterfaceName>FortyGigE0/2/0/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>515</Index>
+          <InterfaceName>FortyGigE0/2/0/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>516</Index>
+          <InterfaceName>FortyGigE0/2/0/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>517</Index>
+          <InterfaceName>HundredGigE0/2/0/2</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>518</Index>
+          <InterfaceName>HundredGigE0/2/0/2</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>519</Index>
+          <InterfaceName>HundredGigE0/2/0/2</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>520</Index>
+          <InterfaceName>FortyGigE0/2/0/2</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>521</Index>
+          <InterfaceName>FortyGigE0/2/0/2</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>522</Index>
+          <InterfaceName>FortyGigE0/2/0/2</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>523</Index>
+          <InterfaceName>HundredGigE0/2/0/3</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>524</Index>
+          <InterfaceName>HundredGigE0/2/0/3</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>525</Index>
+          <InterfaceName>HundredGigE0/2/0/3</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>526</Index>
+          <InterfaceName>FortyGigE0/2/0/3</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>527</Index>
+          <InterfaceName>FortyGigE0/2/0/3</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>528</Index>
+          <InterfaceName>FortyGigE0/2/0/3</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>529</Index>
+          <InterfaceName>HundredGigE0/2/0/4</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>530</Index>
+          <InterfaceName>HundredGigE0/2/0/4</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>531</Index>
+          <InterfaceName>HundredGigE0/2/0/4</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>532</Index>
+          <InterfaceName>FortyGigE0/2/0/4</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>533</Index>
+          <InterfaceName>FortyGigE0/2/0/4</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>534</Index>
+          <InterfaceName>FortyGigE0/2/0/4</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>535</Index>
+          <InterfaceName>HundredGigE0/2/0/5</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>536</Index>
+          <InterfaceName>HundredGigE0/2/0/5</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>537</Index>
+          <InterfaceName>HundredGigE0/2/0/5</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>538</Index>
+          <InterfaceName>FortyGigE0/2/0/5</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>539</Index>
+          <InterfaceName>FortyGigE0/2/0/5</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>540</Index>
+          <InterfaceName>FortyGigE0/2/0/5</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>541</Index>
+          <InterfaceName>HundredGigE0/2/0/6</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>542</Index>
+          <InterfaceName>HundredGigE0/2/0/6</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>543</Index>
+          <InterfaceName>HundredGigE0/2/0/6</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>544</Index>
+          <InterfaceName>FortyGigE0/2/0/6</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>545</Index>
+          <InterfaceName>FortyGigE0/2/0/6</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>546</Index>
+          <InterfaceName>FortyGigE0/2/0/6</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>547</Index>
+          <InterfaceName>HundredGigE0/2/0/7</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>548</Index>
+          <InterfaceName>HundredGigE0/2/0/7</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>549</Index>
+          <InterfaceName>HundredGigE0/2/0/7</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>550</Index>
+          <InterfaceName>FortyGigE0/2/0/7</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>551</Index>
+          <InterfaceName>FortyGigE0/2/0/7</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>552</Index>
+          <InterfaceName>FortyGigE0/2/0/7</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>553</Index>
+          <InterfaceName>HundredGigE0/2/0/8</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>554</Index>
+          <InterfaceName>HundredGigE0/2/0/8</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>555</Index>
+          <InterfaceName>HundredGigE0/2/0/8</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>556</Index>
+          <InterfaceName>FortyGigE0/2/0/8</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>FortyGigE0/2/0/8</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>558</Index>
+          <InterfaceName>FortyGigE0/2/0/8</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>HundredGigE0/2/0/9</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>560</Index>
+          <InterfaceName>HundredGigE0/2/0/9</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>561</Index>
+          <InterfaceName>HundredGigE0/2/0/9</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>562</Index>
+          <InterfaceName>FortyGigE0/2/0/9</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>563</Index>
+          <InterfaceName>FortyGigE0/2/0/9</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>564</Index>
+          <InterfaceName>FortyGigE0/2/0/9</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>565</Index>
+          <InterfaceName>HundredGigE0/2/0/10</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>566</Index>
+          <InterfaceName>HundredGigE0/2/0/10</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>567</Index>
+          <InterfaceName>HundredGigE0/2/0/10</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>568</Index>
+          <InterfaceName>FortyGigE0/2/0/10</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>569</Index>
+          <InterfaceName>FortyGigE0/2/0/10</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>570</Index>
+          <InterfaceName>FortyGigE0/2/0/10</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>571</Index>
+          <InterfaceName>HundredGigE0/2/0/11</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>572</Index>
+          <InterfaceName>HundredGigE0/2/0/11</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>573</Index>
+          <InterfaceName>HundredGigE0/2/0/11</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>FortyGigE0/2/0/11</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
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+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
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+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>FortyGigE0/2/0/11</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
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+          <SonicName i:nil="true"/>
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+          <a:Direction>ingress</a:Direction>
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+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>FortyGigE0/2/0/11</InterfaceName>
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+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>HundredGigE0/2/0/12</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
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+          <SonicName i:nil="true"/>
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+          <a:OpticalAddDropType i:nil="true"/>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>HundredGigE0/2/0/12</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
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+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
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+          <Index>579</Index>
+          <InterfaceName>HundredGigE0/2/0/12</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>580</Index>
+          <InterfaceName>FortyGigE0/2/0/12</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>581</Index>
+          <InterfaceName>FortyGigE0/2/0/12</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>582</Index>
+          <InterfaceName>FortyGigE0/2/0/12</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>583</Index>
+          <InterfaceName>HundredGigE0/2/0/13</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>584</Index>
+          <InterfaceName>HundredGigE0/2/0/13</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>585</Index>
+          <InterfaceName>HundredGigE0/2/0/13</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>586</Index>
+          <InterfaceName>FortyGigE0/2/0/13</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>587</Index>
+          <InterfaceName>FortyGigE0/2/0/13</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>588</Index>
+          <InterfaceName>FortyGigE0/2/0/13</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>589</Index>
+          <InterfaceName>HundredGigE0/2/0/14</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>HundredGigE0/2/0/14</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>HundredGigE0/2/0/14</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>FortyGigE0/2/0/14</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>FortyGigE0/2/0/14</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>FortyGigE0/2/0/14</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>HundredGigE0/2/0/15</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>HundredGigE0/2/0/15</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>FortyGigE0/2/0/15</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>FortyGigE0/2/0/15</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
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+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>600</Index>
+          <InterfaceName>FortyGigE0/2/0/15</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
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+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>HundredGigE0/2/0/16</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
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+          <a:DwdmChannel>0</a:DwdmChannel>
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+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>HundredGigE0/2/0/16</InterfaceName>
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+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
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+          <a:DwdmChannel>0</a:DwdmChannel>
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+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>HundredGigE0/2/0/16</InterfaceName>
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+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
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+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
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+          <EnableFlowControl>false</EnableFlowControl>
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+          <EnableFlowControl>false</EnableFlowControl>
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+          <Speed>0</Speed>
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+          <EnableFlowControl>false</EnableFlowControl>
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+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>612</Index>
+          <InterfaceName>FortyGigE0/2/0/17</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>613</Index>
+          <InterfaceName>HundredGigE0/2/0/18</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>614</Index>
+          <InterfaceName>HundredGigE0/2/0/18</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>615</Index>
+          <InterfaceName>HundredGigE0/2/0/18</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>616</Index>
+          <InterfaceName>FortyGigE0/2/0/18</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>617</Index>
+          <InterfaceName>FortyGigE0/2/0/18</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>618</Index>
+          <InterfaceName>FortyGigE0/2/0/18</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>619</Index>
+          <InterfaceName>HundredGigE0/2/0/19</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>620</Index>
+          <InterfaceName>HundredGigE0/2/0/19</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>621</Index>
+          <InterfaceName>HundredGigE0/2/0/19</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>FortyGigE0/2/0/19</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>FortyGigE0/2/0/19</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>FortyGigE0/2/0/19</InterfaceName>
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+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>HundredGigE0/2/0/20</InterfaceName>
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+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>HundredGigE0/2/0/20</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>627</Index>
+          <InterfaceName>HundredGigE0/2/0/20</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>FortyGigE0/2/0/20</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>FortyGigE0/2/0/20</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>FortyGigE0/2/0/20</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>HundredGigE0/2/0/21</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
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+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>HundredGigE0/2/0/21</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>FortyGigE0/2/0/21</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>FortyGigE0/2/0/21</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>636</Index>
+          <InterfaceName>FortyGigE0/2/0/21</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>HundredGigE0/2/0/22</InterfaceName>
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+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
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+          <a:OpticalAddDropType i:nil="true"/>
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+          <EnableFlowControl>false</EnableFlowControl>
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+          <PortName i:nil="true"/>
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+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
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+          <a:OpticalAddDropType i:nil="true"/>
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+          <EnableFlowControl>false</EnableFlowControl>
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+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
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+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
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+          <a:DwdmChannel>0</a:DwdmChannel>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>HundredGigE0/2/0/23</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>646</Index>
+          <InterfaceName>FortyGigE0/2/0/23</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
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+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>647</Index>
+          <InterfaceName>FortyGigE0/2/0/23</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
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+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
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+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <PortName i:nil="true"/>
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+          <a:Dwdm>none</a:Dwdm>
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+          <a:OpticalAddDropType i:nil="true"/>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>649</Index>
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+          <PortName i:nil="true"/>
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+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>650</Index>
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+          <SonicName i:nil="true"/>
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+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
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+          <a:OpticalAddDropType i:nil="true"/>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>HundredGigE0/2/0/24</InterfaceName>
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+          <a:Direction>Bidirectional</a:Direction>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <EnableFlowControl>false</EnableFlowControl>
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+          <a:Dwdm>none</a:Dwdm>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <a:DwdmChannel>0</a:DwdmChannel>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <a:Dwdm>none</a:Dwdm>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <a:Direction>ingress</a:Direction>
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+          <EnableFlowControl>false</EnableFlowControl>
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+          <Speed>0</Speed>
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+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
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+          <EnableFlowControl>false</EnableFlowControl>
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+          <Speed>0</Speed>
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+          <a:Dwdm>none</a:Dwdm>
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+          <EnableFlowControl>false</EnableFlowControl>
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+          <EnableFlowControl>false</EnableFlowControl>
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+          <a:Direction>ingress</a:Direction>
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+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
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+          <EnableFlowControl>false</EnableFlowControl>
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+          <a:Direction>Bidirectional</a:Direction>
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+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
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+          <EnableFlowControl>false</EnableFlowControl>
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+          <Speed>0</Speed>
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+          <EnableFlowControl>false</EnableFlowControl>
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+          <MultiPortsInterface>false</MultiPortsInterface>
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+          <EnableFlowControl>false</EnableFlowControl>
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+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
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+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
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+          <EnableFlowControl>false</EnableFlowControl>
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+          <EnableFlowControl>false</EnableFlowControl>
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+          <a:Direction>Bidirectional</a:Direction>
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+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>FortyGigE0/2/0/28</InterfaceName>
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+          <SonicName i:nil="true"/>
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+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>679</Index>
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+          <SonicName i:nil="true"/>
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+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <AlternateSpeeds i:nil="true"/>
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+          <a:Dwdm>none</a:Dwdm>
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+          <EnableFlowControl>false</EnableFlowControl>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>711</Index>
+          <InterfaceName>HundredGigE0/2/0/34</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>712</Index>
+          <InterfaceName>FortyGigE0/2/0/34</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>713</Index>
+          <InterfaceName>FortyGigE0/2/0/34</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>714</Index>
+          <InterfaceName>FortyGigE0/2/0/34</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>715</Index>
+          <InterfaceName>HundredGigE0/2/0/35</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>716</Index>
+          <InterfaceName>HundredGigE0/2/0/35</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>717</Index>
+          <InterfaceName>HundredGigE0/2/0/35</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>718</Index>
+          <InterfaceName>FortyGigE0/2/0/35</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>FortyGigE0/2/0/35</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>720</Index>
+          <InterfaceName>FortyGigE0/2/0/35</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>HundredGigE0/2/0/36</InterfaceName>
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+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>HundredGigE0/2/0/36</InterfaceName>
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+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>HundredGigE0/2/0/36</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>FortyGigE0/2/0/36</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>FortyGigE0/2/0/36</InterfaceName>
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+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>FortyGigE0/2/0/36</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>727</Index>
+          <InterfaceName>HundredGigE0/2/0/37</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
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+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
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+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>728</Index>
+          <InterfaceName>HundredGigE0/2/0/37</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>729</Index>
+          <InterfaceName>HundredGigE0/2/0/37</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>730</Index>
+          <InterfaceName>FortyGigE0/2/0/37</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
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+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>FortyGigE0/2/0/37</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
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+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>732</Index>
+          <InterfaceName>FortyGigE0/2/0/37</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>HundredGigE0/2/0/38</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
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+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
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+          <a:SlotIndex>0</a:SlotIndex>
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+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>HundredGigE0/2/0/38</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
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+          <a:Direction>ingress</a:Direction>
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+          <a:DwdmChannel>0</a:DwdmChannel>
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+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>HundredGigE0/2/0/38</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
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+          <a:Direction>Bidirectional</a:Direction>
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+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
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+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>FortyGigE0/2/0/38</InterfaceName>
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+          <PortName i:nil="true"/>
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+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
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+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>737</Index>
+          <InterfaceName>FortyGigE0/2/0/38</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
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+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
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+          <a:OpticalAddDropType i:nil="true"/>
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+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
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+          <EnableFlowControl>false</EnableFlowControl>
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+          <EnableFlowControl>false</EnableFlowControl>
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+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>745</Index>
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+          <a:Direction>egress</a:Direction>
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+          <a:OpticalAddDropType i:nil="true"/>
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+          <EnableFlowControl>false</EnableFlowControl>
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+          <EnableFlowControl>false</EnableFlowControl>
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+          <EnableFlowControl>false</EnableFlowControl>
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+          <EnableFlowControl>false</EnableFlowControl>
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+          <EnableFlowControl>false</EnableFlowControl>
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+          <EnableFlowControl>false</EnableFlowControl>
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+          <EnableFlowControl>false</EnableFlowControl>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>777</Index>
+          <InterfaceName>HundredGigE0/2/0/45</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>778</Index>
+          <InterfaceName>FortyGigE0/2/0/45</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>779</Index>
+          <InterfaceName>FortyGigE0/2/0/45</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>780</Index>
+          <InterfaceName>FortyGigE0/2/0/45</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>781</Index>
+          <InterfaceName>HundredGigE0/2/0/46</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>782</Index>
+          <InterfaceName>HundredGigE0/2/0/46</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>783</Index>
+          <InterfaceName>HundredGigE0/2/0/46</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>784</Index>
+          <InterfaceName>FortyGigE0/2/0/46</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>FortyGigE0/2/0/46</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>FortyGigE0/2/0/46</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>HundredGigE0/2/0/47</InterfaceName>
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+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
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+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>HundredGigE0/3/0/0</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>HundredGigE0/3/0/0</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>HundredGigE0/3/0/0</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
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+          <EnableFlowControl>false</EnableFlowControl>
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+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>FortyGigE0/3/0/0</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
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+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
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+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>FortyGigE0/3/0/0</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <PortName i:nil="true"/>
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+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
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+          <EnableFlowControl>false</EnableFlowControl>
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+          <a:Direction>ingress</a:Direction>
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+          <a:DwdmChannel>0</a:DwdmChannel>
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+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
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+          <EnableFlowControl>false</EnableFlowControl>
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+          <Speed>0</Speed>
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+          <EnableFlowControl>false</EnableFlowControl>
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+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>810</Index>
+          <InterfaceName>FourHundredGigE0/3/0/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>811</Index>
+          <InterfaceName>HundredGigE0/3/0/2</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>812</Index>
+          <InterfaceName>HundredGigE0/3/0/2</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>813</Index>
+          <InterfaceName>HundredGigE0/3/0/2</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>814</Index>
+          <InterfaceName>FortyGigE0/3/0/2</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>815</Index>
+          <InterfaceName>FortyGigE0/3/0/2</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>816</Index>
+          <InterfaceName>FortyGigE0/3/0/2</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>817</Index>
+          <InterfaceName>FourHundredGigE0/3/0/2</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>818</Index>
+          <InterfaceName>FourHundredGigE0/3/0/2</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>819</Index>
+          <InterfaceName>FourHundredGigE0/3/0/2</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>820</Index>
+          <InterfaceName>HundredGigE0/3/0/3</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>821</Index>
+          <InterfaceName>HundredGigE0/3/0/3</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>822</Index>
+          <InterfaceName>HundredGigE0/3/0/3</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>823</Index>
+          <InterfaceName>FortyGigE0/3/0/3</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>824</Index>
+          <InterfaceName>FortyGigE0/3/0/3</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>825</Index>
+          <InterfaceName>FortyGigE0/3/0/3</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>826</Index>
+          <InterfaceName>FourHundredGigE0/3/0/3</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>827</Index>
+          <InterfaceName>FourHundredGigE0/3/0/3</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>828</Index>
+          <InterfaceName>FourHundredGigE0/3/0/3</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>829</Index>
+          <InterfaceName>HundredGigE0/3/0/4</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>830</Index>
+          <InterfaceName>HundredGigE0/3/0/4</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>831</Index>
+          <InterfaceName>HundredGigE0/3/0/4</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>832</Index>
+          <InterfaceName>FortyGigE0/3/0/4</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>833</Index>
+          <InterfaceName>FortyGigE0/3/0/4</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>834</Index>
+          <InterfaceName>FortyGigE0/3/0/4</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>835</Index>
+          <InterfaceName>FourHundredGigE0/3/0/4</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>836</Index>
+          <InterfaceName>FourHundredGigE0/3/0/4</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>837</Index>
+          <InterfaceName>FourHundredGigE0/3/0/4</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>838</Index>
+          <InterfaceName>HundredGigE0/3/0/5</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>839</Index>
+          <InterfaceName>HundredGigE0/3/0/5</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>840</Index>
+          <InterfaceName>HundredGigE0/3/0/5</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>841</Index>
+          <InterfaceName>FortyGigE0/3/0/5</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>842</Index>
+          <InterfaceName>FortyGigE0/3/0/5</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>843</Index>
+          <InterfaceName>FortyGigE0/3/0/5</InterfaceName>
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+          <SonicName i:nil="true"/>
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+          <a:DwdmChannel>0</a:DwdmChannel>
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+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>844</Index>
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+          <SonicName i:nil="true"/>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <SonicName i:nil="true"/>
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+          <EnableFlowControl>false</EnableFlowControl>
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+          <SonicName i:nil="true"/>
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+          <EnableFlowControl>false</EnableFlowControl>
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+          <SonicName i:nil="true"/>
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+          <SonicName i:nil="true"/>
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+          <EnableFlowControl>false</EnableFlowControl>
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+          <EnableFlowControl>false</EnableFlowControl>
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+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>876</Index>
+          <InterfaceName>HundredGigE0/3/0/9</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>877</Index>
+          <InterfaceName>FortyGigE0/3/0/9</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>878</Index>
+          <InterfaceName>FortyGigE0/3/0/9</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>879</Index>
+          <InterfaceName>FortyGigE0/3/0/9</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>880</Index>
+          <InterfaceName>FourHundredGigE0/3/0/9</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>881</Index>
+          <InterfaceName>FourHundredGigE0/3/0/9</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>882</Index>
+          <InterfaceName>FourHundredGigE0/3/0/9</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>883</Index>
+          <InterfaceName>HundredGigE0/3/0/10</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>884</Index>
+          <InterfaceName>HundredGigE0/3/0/10</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>885</Index>
+          <InterfaceName>HundredGigE0/3/0/10</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>FortyGigE0/3/0/10</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>FortyGigE0/3/0/10</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>FortyGigE0/3/0/10</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>FourHundredGigE0/3/0/10</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>FourHundredGigE0/3/0/10</InterfaceName>
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+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>FourHundredGigE0/3/0/10</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>HundredGigE0/3/0/11</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>HundredGigE0/3/0/11</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>HundredGigE0/3/0/11</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>FortyGigE0/3/0/11</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>FortyGigE0/3/0/11</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>898</Index>
+          <InterfaceName>FourHundredGigE0/3/0/11</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <EnableFlowControl>false</EnableFlowControl>
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+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <EnableFlowControl>false</EnableFlowControl>
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+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
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+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>HundredGigE0/3/0/12</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
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+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>902</Index>
+          <InterfaceName>HundredGigE0/3/0/12</InterfaceName>
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+          <Speed>0</Speed>
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+          <a:OpticalAddDropType i:nil="true"/>
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+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>HundredGigE0/3/0/12</InterfaceName>
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+          <PortName i:nil="true"/>
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+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
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+          <a:OpticalAddDropType i:nil="true"/>
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+          <PortName i:nil="true"/>
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+          <EnableFlowControl>false</EnableFlowControl>
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+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
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+          <EnableFlowControl>false</EnableFlowControl>
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+          <PortName i:nil="true"/>
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+          <EnableFlowControl>false</EnableFlowControl>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <SonicName i:nil="true"/>
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+          <a:DwdmChannel>0</a:DwdmChannel>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <SonicName i:nil="true"/>
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+          <a:DwdmChannel>0</a:DwdmChannel>
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+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <EnableFlowControl>false</EnableFlowControl>
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+          <SonicName i:nil="true"/>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>974</Index>
+          <InterfaceName>HundredGigE0/3/0/20</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>975</Index>
+          <InterfaceName>HundredGigE0/3/0/20</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>976</Index>
+          <InterfaceName>FortyGigE0/3/0/20</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>977</Index>
+          <InterfaceName>FortyGigE0/3/0/20</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>978</Index>
+          <InterfaceName>FortyGigE0/3/0/20</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>979</Index>
+          <InterfaceName>FourHundredGigE0/3/0/20</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>980</Index>
+          <InterfaceName>FourHundredGigE0/3/0/20</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>981</Index>
+          <InterfaceName>FourHundredGigE0/3/0/20</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>982</Index>
+          <InterfaceName>HundredGigE0/3/0/21</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>983</Index>
+          <InterfaceName>HundredGigE0/3/0/21</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>984</Index>
+          <InterfaceName>HundredGigE0/3/0/21</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>985</Index>
+          <InterfaceName>FortyGigE0/3/0/21</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>986</Index>
+          <InterfaceName>FortyGigE0/3/0/21</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>987</Index>
+          <InterfaceName>FortyGigE0/3/0/21</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>988</Index>
+          <InterfaceName>FourHundredGigE0/3/0/21</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>989</Index>
+          <InterfaceName>FourHundredGigE0/3/0/21</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>990</Index>
+          <InterfaceName>FourHundredGigE0/3/0/21</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>991</Index>
+          <InterfaceName>HundredGigE0/3/0/22</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>992</Index>
+          <InterfaceName>HundredGigE0/3/0/22</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>993</Index>
+          <InterfaceName>HundredGigE0/3/0/22</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>994</Index>
+          <InterfaceName>FortyGigE0/3/0/22</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>995</Index>
+          <InterfaceName>FortyGigE0/3/0/22</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>996</Index>
+          <InterfaceName>FortyGigE0/3/0/22</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>997</Index>
+          <InterfaceName>FourHundredGigE0/3/0/22</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>998</Index>
+          <InterfaceName>FourHundredGigE0/3/0/22</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>999</Index>
+          <InterfaceName>FourHundredGigE0/3/0/22</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1000</Index>
+          <InterfaceName>HundredGigE0/3/0/23</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1001</Index>
+          <InterfaceName>HundredGigE0/3/0/23</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1002</Index>
+          <InterfaceName>HundredGigE0/3/0/23</InterfaceName>
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+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
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+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
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+          <ElementType>DeviceInterface</ElementType>
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+          <EnableFlowControl>false</EnableFlowControl>
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+          <PortName i:nil="true"/>
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+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
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+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>FortyGigE0/3/0/23</InterfaceName>
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+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
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+          <a:Direction>ingress</a:Direction>
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+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <EnableFlowControl>false</EnableFlowControl>
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+          <MultiPortsInterface>false</MultiPortsInterface>
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+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
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+          <a:DwdmChannel>0</a:DwdmChannel>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>FourHundredGigE0/3/0/23</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1007</Index>
+          <InterfaceName>FourHundredGigE0/3/0/23</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1008</Index>
+          <InterfaceName>FourHundredGigE0/3/0/23</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1009</Index>
+          <InterfaceName>HundredGigE0/3/0/24</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1010</Index>
+          <InterfaceName>HundredGigE0/3/0/24</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1011</Index>
+          <InterfaceName>HundredGigE0/3/0/24</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1012</Index>
+          <InterfaceName>FortyGigE0/3/0/24</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1013</Index>
+          <InterfaceName>FortyGigE0/3/0/24</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1014</Index>
+          <InterfaceName>FortyGigE0/3/0/24</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1015</Index>
+          <InterfaceName>FourHundredGigE0/3/0/24</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1016</Index>
+          <InterfaceName>FourHundredGigE0/3/0/24</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1017</Index>
+          <InterfaceName>FourHundredGigE0/3/0/24</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1018</Index>
+          <InterfaceName>HundredGigE0/3/0/25</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1019</Index>
+          <InterfaceName>HundredGigE0/3/0/25</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1020</Index>
+          <InterfaceName>HundredGigE0/3/0/25</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1021</Index>
+          <InterfaceName>FortyGigE0/3/0/25</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1022</Index>
+          <InterfaceName>FortyGigE0/3/0/25</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1023</Index>
+          <InterfaceName>FortyGigE0/3/0/25</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1024</Index>
+          <InterfaceName>FourHundredGigE0/3/0/25</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1025</Index>
+          <InterfaceName>FourHundredGigE0/3/0/25</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1026</Index>
+          <InterfaceName>FourHundredGigE0/3/0/25</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1027</Index>
+          <InterfaceName>HundredGigE0/3/0/26</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1028</Index>
+          <InterfaceName>HundredGigE0/3/0/26</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1029</Index>
+          <InterfaceName>HundredGigE0/3/0/26</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1030</Index>
+          <InterfaceName>FortyGigE0/3/0/26</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1031</Index>
+          <InterfaceName>FortyGigE0/3/0/26</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1032</Index>
+          <InterfaceName>FortyGigE0/3/0/26</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1033</Index>
+          <InterfaceName>FourHundredGigE0/3/0/26</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1034</Index>
+          <InterfaceName>FourHundredGigE0/3/0/26</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1035</Index>
+          <InterfaceName>FourHundredGigE0/3/0/26</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>HundredGigE0/3/0/27</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1037</Index>
+          <InterfaceName>HundredGigE0/3/0/27</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1038</Index>
+          <InterfaceName>HundredGigE0/3/0/27</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>FortyGigE0/3/0/27</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
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+          <MultiPortsInterface>false</MultiPortsInterface>
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+          <EnableFlowControl>false</EnableFlowControl>
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+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
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+          <a:Direction>Bidirectional</a:Direction>
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+          <a:DwdmChannel>0</a:DwdmChannel>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
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+          <SonicName i:nil="true"/>
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+          <EnableFlowControl>false</EnableFlowControl>
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+          <a:DwdmChannel>0</a:DwdmChannel>
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+          <SonicName i:nil="true"/>
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+          <SonicName i:nil="true"/>
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+          <a:Direction>egress</a:Direction>
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+          <a:Dwdm>none</a:Dwdm>
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+          <Speed>0</Speed>
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+          <EnableFlowControl>false</EnableFlowControl>
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+          <a:Direction>Bidirectional</a:Direction>
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+          <a:DwdmChannel>0</a:DwdmChannel>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1073</Index>
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+          <MultiPortsInterface>false</MultiPortsInterface>
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+          <Speed>0</Speed>
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+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1074</Index>
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+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
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+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
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+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
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+          <EnableFlowControl>false</EnableFlowControl>
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+          <EnableFlowControl>false</EnableFlowControl>
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+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
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+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
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+          <a:OpticalAddDropType i:nil="true"/>
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+          <PortName i:nil="true"/>
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+          <a:Direction>ingress</a:Direction>
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+          <a:OpticalAddDropType i:nil="true"/>
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+          <EnableFlowControl>false</EnableFlowControl>
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+          <SonicName i:nil="true"/>
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+          <a:Direction>Bidirectional</a:Direction>
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+          <SonicName i:nil="true"/>
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+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
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+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1106</Index>
+          <InterfaceName>FourHundredGigE0/3/0/34</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1107</Index>
+          <InterfaceName>FourHundredGigE0/3/0/34</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1108</Index>
+          <InterfaceName>HundredGigE0/3/0/35</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1109</Index>
+          <InterfaceName>HundredGigE0/3/0/35</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1110</Index>
+          <InterfaceName>HundredGigE0/3/0/35</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1111</Index>
+          <InterfaceName>FortyGigE0/3/0/35</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1112</Index>
+          <InterfaceName>FortyGigE0/3/0/35</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1113</Index>
+          <InterfaceName>FortyGigE0/3/0/35</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1114</Index>
+          <InterfaceName>FourHundredGigE0/3/0/35</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1115</Index>
+          <InterfaceName>FourHundredGigE0/3/0/35</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1116</Index>
+          <InterfaceName>FourHundredGigE0/3/0/35</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1117</Index>
+          <InterfaceName>FourHundredGigE0/4/0/0</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1118</Index>
+          <InterfaceName>FourHundredGigE0/4/0/0</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1119</Index>
+          <InterfaceName>FourHundredGigE0/4/0/0</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1120</Index>
+          <InterfaceName>HundredGigE0/4/0/0</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1121</Index>
+          <InterfaceName>HundredGigE0/4/0/0</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1122</Index>
+          <InterfaceName>HundredGigE0/4/0/0</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1123</Index>
+          <InterfaceName>FourHundredGigE0/4/0/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1124</Index>
+          <InterfaceName>FourHundredGigE0/4/0/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1125</Index>
+          <InterfaceName>FourHundredGigE0/4/0/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1126</Index>
+          <InterfaceName>HundredGigE0/4/0/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1127</Index>
+          <InterfaceName>HundredGigE0/4/0/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1128</Index>
+          <InterfaceName>HundredGigE0/4/0/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1129</Index>
+          <InterfaceName>FourHundredGigE0/4/0/2</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1130</Index>
+          <InterfaceName>FourHundredGigE0/4/0/2</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1131</Index>
+          <InterfaceName>FourHundredGigE0/4/0/2</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1132</Index>
+          <InterfaceName>HundredGigE0/4/0/2</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1133</Index>
+          <InterfaceName>HundredGigE0/4/0/2</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1134</Index>
+          <InterfaceName>HundredGigE0/4/0/2</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1135</Index>
+          <InterfaceName>FourHundredGigE0/4/0/3</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1136</Index>
+          <InterfaceName>FourHundredGigE0/4/0/3</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1137</Index>
+          <InterfaceName>FourHundredGigE0/4/0/3</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1138</Index>
+          <InterfaceName>HundredGigE0/4/0/3</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1139</Index>
+          <InterfaceName>HundredGigE0/4/0/3</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1140</Index>
+          <InterfaceName>HundredGigE0/4/0/3</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1141</Index>
+          <InterfaceName>FourHundredGigE0/4/0/4</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1142</Index>
+          <InterfaceName>FourHundredGigE0/4/0/4</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1143</Index>
+          <InterfaceName>FourHundredGigE0/4/0/4</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1144</Index>
+          <InterfaceName>HundredGigE0/4/0/4</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1145</Index>
+          <InterfaceName>HundredGigE0/4/0/4</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1146</Index>
+          <InterfaceName>HundredGigE0/4/0/4</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1147</Index>
+          <InterfaceName>FourHundredGigE0/4/0/5</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1148</Index>
+          <InterfaceName>FourHundredGigE0/4/0/5</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1149</Index>
+          <InterfaceName>FourHundredGigE0/4/0/5</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1150</Index>
+          <InterfaceName>HundredGigE0/4/0/5</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1151</Index>
+          <InterfaceName>HundredGigE0/4/0/5</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1152</Index>
+          <InterfaceName>HundredGigE0/4/0/5</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1153</Index>
+          <InterfaceName>FourHundredGigE0/4/0/6</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1154</Index>
+          <InterfaceName>FourHundredGigE0/4/0/6</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1155</Index>
+          <InterfaceName>FourHundredGigE0/4/0/6</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1156</Index>
+          <InterfaceName>HundredGigE0/4/0/6</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1157</Index>
+          <InterfaceName>HundredGigE0/4/0/6</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1158</Index>
+          <InterfaceName>HundredGigE0/4/0/6</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1159</Index>
+          <InterfaceName>FourHundredGigE0/4/0/7</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1160</Index>
+          <InterfaceName>FourHundredGigE0/4/0/7</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1161</Index>
+          <InterfaceName>FourHundredGigE0/4/0/7</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1162</Index>
+          <InterfaceName>HundredGigE0/4/0/7</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1163</Index>
+          <InterfaceName>HundredGigE0/4/0/7</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1164</Index>
+          <InterfaceName>HundredGigE0/4/0/7</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1165</Index>
+          <InterfaceName>FourHundredGigE0/4/0/8</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>FourHundredGigE0/4/0/8</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1167</Index>
+          <InterfaceName>FourHundredGigE0/4/0/8</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
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+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1168</Index>
+          <InterfaceName>HundredGigE0/4/0/8</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
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+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1169</Index>
+          <InterfaceName>HundredGigE0/4/0/8</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
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+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>HundredGigE0/4/0/8</InterfaceName>
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+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1171</Index>
+          <InterfaceName>FourHundredGigE0/4/0/9</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
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+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
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+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1172</Index>
+          <InterfaceName>FourHundredGigE0/4/0/9</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1173</Index>
+          <InterfaceName>FourHundredGigE0/4/0/9</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1174</Index>
+          <InterfaceName>HundredGigE0/4/0/9</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
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+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>FourHundredGigE0/4/0/10</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>FourHundredGigE0/4/0/10</InterfaceName>
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+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>FourHundredGigE0/4/0/10</InterfaceName>
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+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <MultiPortsInterface>false</MultiPortsInterface>
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+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
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+          <EnableFlowControl>false</EnableFlowControl>
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+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
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+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
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+          <EnableFlowControl>false</EnableFlowControl>
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+          <EnableFlowControl>false</EnableFlowControl>
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+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1204</Index>
+          <InterfaceName>HundredGigE0/4/0/14</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1205</Index>
+          <InterfaceName>HundredGigE0/4/0/14</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1206</Index>
+          <InterfaceName>HundredGigE0/4/0/14</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1207</Index>
+          <InterfaceName>FourHundredGigE0/4/0/15</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1208</Index>
+          <InterfaceName>FourHundredGigE0/4/0/15</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1209</Index>
+          <InterfaceName>FourHundredGigE0/4/0/15</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1210</Index>
+          <InterfaceName>HundredGigE0/4/0/15</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1211</Index>
+          <InterfaceName>HundredGigE0/4/0/15</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1212</Index>
+          <InterfaceName>HundredGigE0/4/0/15</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1213</Index>
+          <InterfaceName>FourHundredGigE0/4/0/16</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>FourHundredGigE0/4/0/16</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>FourHundredGigE0/4/0/16</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>HundredGigE0/4/0/16</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>HundredGigE0/4/0/16</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>HundredGigE0/4/0/16</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>FourHundredGigE0/4/0/17</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>FourHundredGigE0/4/0/17</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1221</Index>
+          <InterfaceName>FourHundredGigE0/4/0/17</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>HundredGigE0/4/0/17</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1223</Index>
+          <InterfaceName>HundredGigE0/4/0/17</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1224</Index>
+          <InterfaceName>HundredGigE0/4/0/17</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1225</Index>
+          <InterfaceName>FourHundredGigE0/4/0/18</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1226</Index>
+          <InterfaceName>FourHundredGigE0/4/0/18</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1227</Index>
+          <InterfaceName>FourHundredGigE0/4/0/18</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1228</Index>
+          <InterfaceName>HundredGigE0/4/0/18</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1229</Index>
+          <InterfaceName>HundredGigE0/4/0/18</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>HundredGigE0/4/0/18</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>FourHundredGigE0/4/0/19</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>FourHundredGigE0/4/0/19</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>FourHundredGigE0/4/0/19</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1234</Index>
+          <InterfaceName>HundredGigE0/4/0/19</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1235</Index>
+          <InterfaceName>HundredGigE0/4/0/19</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <a:DwdmChannel>0</a:DwdmChannel>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
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+          <a:Direction>ingress</a:Direction>
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+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
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+          <a:Direction>Bidirectional</a:Direction>
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+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
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+          <PortName i:nil="true"/>
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+          <Speed>0</Speed>
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+          <AlternateSpeeds i:nil="true"/>
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+          <a:Direction>Bidirectional</a:Direction>
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+          <a:DwdmChannel>0</a:DwdmChannel>
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+          <a:Direction>egress</a:Direction>
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+          <EnableFlowControl>false</EnableFlowControl>
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+          <MultiPortsInterface>false</MultiPortsInterface>
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+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
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+          <SonicName i:nil="true"/>
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+          <a:Direction>Bidirectional</a:Direction>
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+          <a:DwdmChannel>0</a:DwdmChannel>
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+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
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+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
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+          <MultiPortsInterface>false</MultiPortsInterface>
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+          <Speed>0</Speed>
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+          <a:DwdmChannel>0</a:DwdmChannel>
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+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
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+          <MultiPortsInterface>false</MultiPortsInterface>
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+          <SonicName i:nil="true"/>
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+          <a:Direction>ingress</a:Direction>
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+          <a:DwdmChannel>0</a:DwdmChannel>
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+          <a:SlotIndex>0</a:SlotIndex>
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+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
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+          <a:DwdmChannel>0</a:DwdmChannel>
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+          <Speed>0</Speed>
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+          <a:DwdmChannel>0</a:DwdmChannel>
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+          <EnableFlowControl>false</EnableFlowControl>
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+          <Speed>0</Speed>
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+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
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+          <EnableFlowControl>false</EnableFlowControl>
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+          <Speed>0</Speed>
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+          <a:Dwdm>none</a:Dwdm>
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+          <MultiPortsInterface>false</MultiPortsInterface>
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+          <Speed>0</Speed>
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+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
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+          <a:DwdmChannel>0</a:DwdmChannel>
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+          <a:SlotIndex>0</a:SlotIndex>
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+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
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+          <a:DwdmChannel>0</a:DwdmChannel>
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+          <a:DwdmChannel>0</a:DwdmChannel>
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+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1269</Index>
+          <InterfaceName>FourHundredGigE0/4/0/25</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1270</Index>
+          <InterfaceName>HundredGigE0/4/0/25</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1271</Index>
+          <InterfaceName>HundredGigE0/4/0/25</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1272</Index>
+          <InterfaceName>HundredGigE0/4/0/25</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1273</Index>
+          <InterfaceName>FourHundredGigE0/4/0/26</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1274</Index>
+          <InterfaceName>FourHundredGigE0/4/0/26</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1275</Index>
+          <InterfaceName>FourHundredGigE0/4/0/26</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1276</Index>
+          <InterfaceName>HundredGigE0/4/0/26</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1277</Index>
+          <InterfaceName>HundredGigE0/4/0/26</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>HundredGigE0/4/0/26</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
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+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
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+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <MultiPortsInterface>false</MultiPortsInterface>
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+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
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+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
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+          <EnableFlowControl>false</EnableFlowControl>
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+          <EnableFlowControl>false</EnableFlowControl>
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+          <a:Direction>Bidirectional</a:Direction>
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+          <EnableFlowControl>false</EnableFlowControl>
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+          <MultiPortsInterface>false</MultiPortsInterface>
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+          <SonicName i:nil="true"/>
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+          <EnableFlowControl>false</EnableFlowControl>
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+          <InterfaceName>FourHundredGigE0/4/0/28</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
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+          <EnableFlowControl>false</EnableFlowControl>
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+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
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+          <EnableFlowControl>false</EnableFlowControl>
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+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
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+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
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+          <EnableFlowControl>false</EnableFlowControl>
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+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
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+          <MultiPortsInterface>false</MultiPortsInterface>
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+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
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+          <a:DwdmChannel>0</a:DwdmChannel>
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+          <EnableFlowControl>false</EnableFlowControl>
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+          <MultiPortsInterface>false</MultiPortsInterface>
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+          <Speed>0</Speed>
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+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1302</Index>
+          <InterfaceName>HundredGigE0/4/0/30</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1303</Index>
+          <InterfaceName>FourHundredGigE0/4/0/31</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1304</Index>
+          <InterfaceName>FourHundredGigE0/4/0/31</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1305</Index>
+          <InterfaceName>FourHundredGigE0/4/0/31</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1306</Index>
+          <InterfaceName>HundredGigE0/4/0/31</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1307</Index>
+          <InterfaceName>HundredGigE0/4/0/31</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1308</Index>
+          <InterfaceName>HundredGigE0/4/0/31</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1309</Index>
+          <InterfaceName>FourHundredGigE0/4/0/32</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1310</Index>
+          <InterfaceName>FourHundredGigE0/4/0/32</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1311</Index>
+          <InterfaceName>FourHundredGigE0/4/0/32</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1312</Index>
+          <InterfaceName>HundredGigE0/4/0/32</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1313</Index>
+          <InterfaceName>HundredGigE0/4/0/32</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1314</Index>
+          <InterfaceName>HundredGigE0/4/0/32</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1315</Index>
+          <InterfaceName>FourHundredGigE0/4/0/33</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1316</Index>
+          <InterfaceName>FourHundredGigE0/4/0/33</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1317</Index>
+          <InterfaceName>FourHundredGigE0/4/0/33</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1318</Index>
+          <InterfaceName>HundredGigE0/4/0/33</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1319</Index>
+          <InterfaceName>HundredGigE0/4/0/33</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1320</Index>
+          <InterfaceName>HundredGigE0/4/0/33</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1321</Index>
+          <InterfaceName>FourHundredGigE0/4/0/34</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1322</Index>
+          <InterfaceName>FourHundredGigE0/4/0/34</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1323</Index>
+          <InterfaceName>FourHundredGigE0/4/0/34</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1324</Index>
+          <InterfaceName>HundredGigE0/4/0/34</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1325</Index>
+          <InterfaceName>HundredGigE0/4/0/34</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1326</Index>
+          <InterfaceName>HundredGigE0/4/0/34</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1327</Index>
+          <InterfaceName>FourHundredGigE0/4/0/35</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1328</Index>
+          <InterfaceName>FourHundredGigE0/4/0/35</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1329</Index>
+          <InterfaceName>FourHundredGigE0/4/0/35</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1330</Index>
+          <InterfaceName>HundredGigE0/4/0/35</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1331</Index>
+          <InterfaceName>HundredGigE0/4/0/35</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1332</Index>
+          <InterfaceName>HundredGigE0/4/0/35</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+      </OpticalInterfaces>
+      <PowerInterfaces xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution">
+        <a:PowerInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>power0</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Phase i:nil="true"/>
+          <a:PortType>C19</a:PortType>
+          <a:PortTypeStr>C19</a:PortTypeStr>
+          <a:Redundant>true</a:Redundant>
+        </a:PowerInterface>
+        <a:PowerInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>2</Index>
+          <InterfaceName>power1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Phase i:nil="true"/>
+          <a:PortType>C19</a:PortType>
+          <a:PortTypeStr>C19</a:PortTypeStr>
+          <a:Redundant>true</a:Redundant>
+        </a:PowerInterface>
+        <a:PowerInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>3</Index>
+          <InterfaceName>power0</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Phase i:nil="true"/>
+          <a:PortType>C19</a:PortType>
+          <a:PortTypeStr>C19</a:PortTypeStr>
+          <a:Redundant>true</a:Redundant>
+        </a:PowerInterface>
+        <a:PowerInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>4</Index>
+          <InterfaceName>power1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Phase i:nil="true"/>
+          <a:PortType>C19</a:PortType>
+          <a:PortTypeStr>C19</a:PortTypeStr>
+          <a:Redundant>true</a:Redundant>
+        </a:PowerInterface>
+        <a:PowerInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>5</Index>
+          <InterfaceName>power0</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Phase i:nil="true"/>
+          <a:PortType>C19</a:PortType>
+          <a:PortTypeStr>C19</a:PortTypeStr>
+          <a:Redundant>true</a:Redundant>
+        </a:PowerInterface>
+        <a:PowerInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>6</Index>
+          <InterfaceName>power1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Phase i:nil="true"/>
+          <a:PortType>C19</a:PortType>
+          <a:PortTypeStr>C19</a:PortTypeStr>
+          <a:Redundant>true</a:Redundant>
+        </a:PowerInterface>
+        <a:PowerInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>7</Index>
+          <InterfaceName>power0</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Phase i:nil="true"/>
+          <a:PortType>C19</a:PortType>
+          <a:PortTypeStr>C19</a:PortTypeStr>
+          <a:Redundant>true</a:Redundant>
+        </a:PowerInterface>
+        <a:PowerInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>8</Index>
+          <InterfaceName>power1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Phase i:nil="true"/>
+          <a:PortType>C19</a:PortType>
+          <a:PortTypeStr>C19</a:PortTypeStr>
+          <a:Redundant>true</a:Redundant>
+        </a:PowerInterface>
+        <a:PowerInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>9</Index>
+          <InterfaceName>power0</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Phase i:nil="true"/>
+          <a:PortType>C19</a:PortType>
+          <a:PortTypeStr>C19</a:PortTypeStr>
+          <a:Redundant>true</a:Redundant>
+        </a:PowerInterface>
+        <a:PowerInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>10</Index>
+          <InterfaceName>power1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Phase i:nil="true"/>
+          <a:PortType>C19</a:PortType>
+          <a:PortTypeStr>C19</a:PortTypeStr>
+          <a:Redundant>true</a:Redundant>
+        </a:PowerInterface>
+        <a:PowerInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>11</Index>
+          <InterfaceName>power0</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Phase i:nil="true"/>
+          <a:PortType>C19</a:PortType>
+          <a:PortTypeStr>C19</a:PortTypeStr>
+          <a:Redundant>true</a:Redundant>
+        </a:PowerInterface>
+        <a:PowerInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>12</Index>
+          <InterfaceName>power1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Phase i:nil="true"/>
+          <a:PortType>C19</a:PortType>
+          <a:PortTypeStr>C19</a:PortTypeStr>
+          <a:Redundant>true</a:Redundant>
+        </a:PowerInterface>
+      </PowerInterfaces>
+      <Properties/>
+      <SerialInterfaces xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution">
+        <a:SerialInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>rp0-console0</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>console</PortName>
+          <SonicName i:nil="true"/>
+          <Speed>115200</Speed>
+          <a:Logical>false</a:Logical>
+          <a:TcpPortName i:nil="true"/>
+        </a:SerialInterface>
+        <a:SerialInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>2</Index>
+          <InterfaceName>logical0</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>logical0</PortName>
+          <SonicName i:nil="true"/>
+          <Speed>115200</Speed>
+          <a:Logical>true</a:Logical>
+          <a:TcpPortName>0</a:TcpPortName>
+        </a:SerialInterface>
+        <a:SerialInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>3</Index>
+          <InterfaceName>logical1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>logical1</PortName>
+          <SonicName i:nil="true"/>
+          <Speed>115200</Speed>
+          <a:Logical>true</a:Logical>
+          <a:TcpPortName>1</a:TcpPortName>
+        </a:SerialInterface>
+        <a:SerialInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>4</Index>
+          <InterfaceName>logical2</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>logical2</PortName>
+          <SonicName i:nil="true"/>
+          <Speed>115200</Speed>
+          <a:Logical>true</a:Logical>
+          <a:TcpPortName>2</a:TcpPortName>
+        </a:SerialInterface>
+        <a:SerialInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>5</Index>
+          <InterfaceName>logical3</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>logical3</PortName>
+          <SonicName i:nil="true"/>
+          <Speed>115200</Speed>
+          <a:Logical>true</a:Logical>
+          <a:TcpPortName>3</a:TcpPortName>
+        </a:SerialInterface>
+        <a:SerialInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>6</Index>
+          <InterfaceName>logical4</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>logical4</PortName>
+          <SonicName i:nil="true"/>
+          <Speed>115200</Speed>
+          <a:Logical>true</a:Logical>
+          <a:TcpPortName>4</a:TcpPortName>
+        </a:SerialInterface>
+        <a:SerialInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>7</Index>
+          <InterfaceName>logical5</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>logical5</PortName>
+          <SonicName i:nil="true"/>
+          <Speed>115200</Speed>
+          <a:Logical>true</a:Logical>
+          <a:TcpPortName>5</a:TcpPortName>
+        </a:SerialInterface>
+        <a:SerialInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>8</Index>
+          <InterfaceName>logical6</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>logical6</PortName>
+          <SonicName i:nil="true"/>
+          <Speed>115200</Speed>
+          <a:Logical>true</a:Logical>
+          <a:TcpPortName>6</a:TcpPortName>
+        </a:SerialInterface>
+        <a:SerialInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>9</Index>
+          <InterfaceName>logical7</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>logical7</PortName>
+          <SonicName i:nil="true"/>
+          <Speed>115200</Speed>
+          <a:Logical>true</a:Logical>
+          <a:TcpPortName>7</a:TcpPortName>
+        </a:SerialInterface>
+        <a:SerialInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>10</Index>
+          <InterfaceName>logical8</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>logical8</PortName>
+          <SonicName i:nil="true"/>
+          <Speed>115200</Speed>
+          <a:Logical>true</a:Logical>
+          <a:TcpPortName>8</a:TcpPortName>
+        </a:SerialInterface>
+        <a:SerialInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>11</Index>
+          <InterfaceName>logical9</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>logical9</PortName>
+          <SonicName i:nil="true"/>
+          <Speed>115200</Speed>
+          <a:Logical>true</a:Logical>
+          <a:TcpPortName>9</a:TcpPortName>
+        </a:SerialInterface>
+        <a:SerialInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>12</Index>
+          <InterfaceName>logical10</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>logical10</PortName>
+          <SonicName i:nil="true"/>
+          <Speed>115200</Speed>
+          <a:Logical>true</a:Logical>
+          <a:TcpPortName>10</a:TcpPortName>
+        </a:SerialInterface>
+        <a:SerialInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>13</Index>
+          <InterfaceName>logical11</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>logical11</PortName>
+          <SonicName i:nil="true"/>
+          <Speed>115200</Speed>
+          <a:Logical>true</a:Logical>
+          <a:TcpPortName>11</a:TcpPortName>
+        </a:SerialInterface>
+        <a:SerialInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>14</Index>
+          <InterfaceName>logical12</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>logical12</PortName>
+          <SonicName i:nil="true"/>
+          <Speed>115200</Speed>
+          <a:Logical>true</a:Logical>
+          <a:TcpPortName>12</a:TcpPortName>
+        </a:SerialInterface>
+      </SerialInterfaces>
+      <VPNTunnelInterfaces xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+      <VendorStr>Sonic</VendorStr>
+    </DeviceInfo>
+  </DeviceInfos>
+  <DpgDec>
+    <DeviceDataPlaneInfo>
+      <IPSecTunnels/>
+      <LoopbackIPInterfaces xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+      <ManagementIPInterfaces xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+      <ManagementVIPInterfaces xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+      <MplsInterfaces/>
+      <MplsTeInterfaces/>
+      <RsvpInterfaces/>
+      <Hostname>str-sonic-sup00-ASIC00</Hostname>
+      <PortChannelInterfaces>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5001</Name>
+          <AttachTo>Eth96;Eth100</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5002</Name>
+          <AttachTo>Eth104;Eth108</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5003</Name>
+          <AttachTo>Eth112;Eth116</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5004</Name>
+          <AttachTo>Eth128;Eth132</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5005</Name>
+          <AttachTo>Eth136;Eth140</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5006</Name>
+          <AttachTo>Eth154;Eth168;Eth178</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5007</Name>
+          <AttachTo>Eth156;Eth170;Eth180</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5008</Name>
+          <AttachTo>Eth160;Eth164</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5009</Name>
+          <AttachTo>Eth184;Eth194;Eth220</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5010</Name>
+          <AttachTo>Eth190;Eth192;Eth218</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5011</Name>
+          <AttachTo>Eth208;Eth212</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5012</Name>
+          <AttachTo>Eth232;Eth236</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5013</Name>
+          <AttachTo>Eth240;Eth244</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+      </PortChannelInterfaces>
+      <SubInterfaces/>
+      <VlanInterfaces>
+        <VlanInterface>
+          <ElementType>VlanInterface</ElementType>
+          <Name>Vlan2</Name>
+          <AttachTo>PortChannel5001;PortChannel5002;PortChannel5003;PortChannel5004;PortChannel5005;PortChannel5006;PortChannel5007;PortChannel5008;PortChannel5009;PortChannel5010;PortChannel5011;PortChannel5012;PortChannel5013</AttachTo>
+          <FhrpProtoType i:nil="true"/>
+          <Type>UnTagged</Type>
+          <VlanID>2</VlanID>
+          <Tag>2</Tag>
+          <Subnets>10.235.96.0/25;fc00:34::a:eb60:1/113</Subnets>
+          <MacAddress i:nil="true"/>
+          <SecondarySubnets/>
+        </VlanInterface>
+      </VlanInterfaces>
+      <IPInterfaces/>
+      <DataAcls/>
+      <AclInterfaces/>
+      <NatInterfaces xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+      <DownstreamSummaries/>
+      <DownstreamSummarySet xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+    </DeviceDataPlaneInfo>
+    <DeviceDataPlaneInfo>
+      <IPSecTunnels/>
+      <LoopbackIPInterfaces xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+      <ManagementIPInterfaces xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+      <ManagementVIPInterfaces xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+      <MplsInterfaces/>
+      <MplsTeInterfaces/>
+      <RsvpInterfaces/>
+      <Hostname>str-sonic-sup00-ASIC01</Hostname>
+      <PortChannelInterfaces>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5014</Name>
+          <AttachTo>Eth96;Eth100</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5015</Name>
+          <AttachTo>Eth104;Eth108</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5016</Name>
+          <AttachTo>Eth112;Eth116</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5017</Name>
+          <AttachTo>Eth128;Eth132</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5018</Name>
+          <AttachTo>Eth136;Eth140</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5019</Name>
+          <AttachTo>Eth152;Eth156</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5020</Name>
+          <AttachTo>Eth160;Eth164</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5021</Name>
+          <AttachTo>Eth168;Eth172</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5022</Name>
+          <AttachTo>Eth176;Eth180</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5023</Name>
+          <AttachTo>Eth184;Eth188;Eth194;Eth216</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5024</Name>
+          <AttachTo>Eth190;Eth192;Eth196;Eth222</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5025</Name>
+          <AttachTo>Eth208;Eth212;Eth234;Eth244</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5026</Name>
+          <AttachTo>Eth214;Eth232;Eth236;Eth242</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+      </PortChannelInterfaces>
+      <SubInterfaces/>
+      <VlanInterfaces>
+        <VlanInterface>
+          <ElementType>VlanInterface</ElementType>
+          <Name>Vlan2</Name>
+          <AttachTo>PortChannel5014;PortChannel5015;PortChannel5016;PortChannel5017;PortChannel5018;PortChannel5019;PortChannel5020;PortChannel5021;PortChannel5022;PortChannel5023;PortChannel5024;PortChannel5025;PortChannel5026</AttachTo>
+          <FhrpProtoType i:nil="true"/>
+          <Type>UnTagged</Type>
+          <VlanID>2</VlanID>
+          <Tag>2</Tag>
+          <Subnets>10.235.96.128/25;fc00:34::a:eb60:8001/113</Subnets>
+          <MacAddress i:nil="true"/>
+          <SecondarySubnets/>
+        </VlanInterface>
+      </VlanInterfaces>
+      <IPInterfaces/>
+      <DataAcls/>
+      <AclInterfaces/>
+      <NatInterfaces xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+      <DownstreamSummaries/>
+      <DownstreamSummarySet xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+    </DeviceDataPlaneInfo>
+    <DeviceDataPlaneInfo>
+      <IPSecTunnels/>
+      <LoopbackIPInterfaces xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+      <ManagementIPInterfaces xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+      <ManagementVIPInterfaces xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+      <MplsInterfaces/>
+      <MplsTeInterfaces/>
+      <RsvpInterfaces/>
+      <Hostname>str-sonic-sup00-ASIC04</Hostname>
+      <PortChannelInterfaces>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5027</Name>
+          <AttachTo>Eth96;Eth100</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5028</Name>
+          <AttachTo>Eth104;Eth108</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5029</Name>
+          <AttachTo>Eth112;Eth116</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5030</Name>
+          <AttachTo>Eth128;Eth132</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5031</Name>
+          <AttachTo>Eth136;Eth140</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5032</Name>
+          <AttachTo>Eth154;Eth168;Eth178</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5033</Name>
+          <AttachTo>Eth156;Eth170;Eth180</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5034</Name>
+          <AttachTo>Eth160;Eth164</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5035</Name>
+          <AttachTo>Eth184;Eth194;Eth220</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5036</Name>
+          <AttachTo>Eth190;Eth192;Eth218</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5037</Name>
+          <AttachTo>Eth208;Eth212</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5038</Name>
+          <AttachTo>Eth232;Eth236</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5039</Name>
+          <AttachTo>Eth240;Eth244</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+      </PortChannelInterfaces>
+      <SubInterfaces/>
+      <VlanInterfaces>
+        <VlanInterface>
+          <ElementType>VlanInterface</ElementType>
+          <Name>Vlan2</Name>
+          <AttachTo>PortChannel5027;PortChannel5028;PortChannel5029;PortChannel5030;PortChannel5031;PortChannel5032;PortChannel5033;PortChannel5034;PortChannel5035;PortChannel5036;PortChannel5037;PortChannel5038;PortChannel5039</AttachTo>
+          <FhrpProtoType i:nil="true"/>
+          <Type>UnTagged</Type>
+          <VlanID>2</VlanID>
+          <Tag>2</Tag>
+          <Subnets>10.235.97.0/25;fc00:34::a:eb61:1/113</Subnets>
+          <MacAddress i:nil="true"/>
+          <SecondarySubnets/>
+        </VlanInterface>
+      </VlanInterfaces>
+      <IPInterfaces/>
+      <DataAcls/>
+      <AclInterfaces/>
+      <NatInterfaces xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+      <DownstreamSummaries/>
+      <DownstreamSummarySet xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+    </DeviceDataPlaneInfo>
+    <DeviceDataPlaneInfo>
+      <IPSecTunnels/>
+      <LoopbackIPInterfaces xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+      <ManagementIPInterfaces xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+      <ManagementVIPInterfaces xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+      <MplsInterfaces/>
+      <MplsTeInterfaces/>
+      <RsvpInterfaces/>
+      <Hostname>str-sonic-sup00-ASIC05</Hostname>
+      <PortChannelInterfaces>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5040</Name>
+          <AttachTo>Eth96;Eth100</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5041</Name>
+          <AttachTo>Eth104;Eth108</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5042</Name>
+          <AttachTo>Eth112;Eth116</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5043</Name>
+          <AttachTo>Eth128;Eth132</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5044</Name>
+          <AttachTo>Eth136;Eth140</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5045</Name>
+          <AttachTo>Eth152;Eth156</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5046</Name>
+          <AttachTo>Eth160;Eth164</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5047</Name>
+          <AttachTo>Eth168;Eth172</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5048</Name>
+          <AttachTo>Eth176;Eth180</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5049</Name>
+          <AttachTo>Eth184;Eth188;Eth194;Eth216</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5050</Name>
+          <AttachTo>Eth190;Eth192;Eth196;Eth222</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5051</Name>
+          <AttachTo>Eth208;Eth212;Eth234;Eth244</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5052</Name>
+          <AttachTo>Eth214;Eth232;Eth236;Eth242</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+      </PortChannelInterfaces>
+      <SubInterfaces/>
+      <VlanInterfaces>
+        <VlanInterface>
+          <ElementType>VlanInterface</ElementType>
+          <Name>Vlan2</Name>
+          <AttachTo>PortChannel5040;PortChannel5041;PortChannel5042;PortChannel5043;PortChannel5044;PortChannel5045;PortChannel5046;PortChannel5047;PortChannel5048;PortChannel5049;PortChannel5050;PortChannel5051;PortChannel5052</AttachTo>
+          <FhrpProtoType i:nil="true"/>
+          <Type>UnTagged</Type>
+          <VlanID>2</VlanID>
+          <Tag>2</Tag>
+          <Subnets>10.235.97.128/25;fc00:34::a:eb61:8001/113</Subnets>
+          <MacAddress i:nil="true"/>
+          <SecondarySubnets/>
+        </VlanInterface>
+      </VlanInterfaces>
+      <IPInterfaces/>
+      <DataAcls/>
+      <AclInterfaces/>
+      <NatInterfaces xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+      <DownstreamSummaries/>
+      <DownstreamSummarySet xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+    </DeviceDataPlaneInfo>
+    <DeviceDataPlaneInfo>
+      <IPSecTunnels/>
+      <LoopbackIPInterfaces xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+      <ManagementIPInterfaces xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+      <ManagementVIPInterfaces xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+      <MplsInterfaces/>
+      <MplsTeInterfaces/>
+      <RsvpInterfaces/>
+      <Hostname>str-sonic-sup00-ASIC08</Hostname>
+      <PortChannelInterfaces>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5053</Name>
+          <AttachTo>Eth96;Eth100</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5054</Name>
+          <AttachTo>Eth104;Eth108</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5055</Name>
+          <AttachTo>Eth112;Eth116</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5056</Name>
+          <AttachTo>Eth128;Eth132</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5057</Name>
+          <AttachTo>Eth136;Eth140</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5058</Name>
+          <AttachTo>Eth154;Eth168;Eth178</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5059</Name>
+          <AttachTo>Eth156;Eth170;Eth180</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5060</Name>
+          <AttachTo>Eth160;Eth164</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5061</Name>
+          <AttachTo>Eth184;Eth194;Eth220</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5062</Name>
+          <AttachTo>Eth190;Eth192;Eth218</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5063</Name>
+          <AttachTo>Eth208;Eth212</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5064</Name>
+          <AttachTo>Eth232;Eth236</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5065</Name>
+          <AttachTo>Eth240;Eth244</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+      </PortChannelInterfaces>
+      <SubInterfaces/>
+      <VlanInterfaces>
+        <VlanInterface>
+          <ElementType>VlanInterface</ElementType>
+          <Name>Vlan2</Name>
+          <AttachTo>PortChannel5053;PortChannel5054;PortChannel5055;PortChannel5056;PortChannel5057;PortChannel5058;PortChannel5059;PortChannel5060;PortChannel5061;PortChannel5062;PortChannel5063;PortChannel5064;PortChannel5065</AttachTo>
+          <FhrpProtoType i:nil="true"/>
+          <Type>UnTagged</Type>
+          <VlanID>2</VlanID>
+          <Tag>2</Tag>
+          <Subnets>10.235.98.0/25;fc00:34::a:eb62:1/113</Subnets>
+          <MacAddress i:nil="true"/>
+          <SecondarySubnets/>
+        </VlanInterface>
+      </VlanInterfaces>
+      <IPInterfaces/>
+      <DataAcls/>
+      <AclInterfaces/>
+      <NatInterfaces xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+      <DownstreamSummaries/>
+      <DownstreamSummarySet xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+    </DeviceDataPlaneInfo>
+    <DeviceDataPlaneInfo>
+      <IPSecTunnels/>
+      <LoopbackIPInterfaces xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+      <ManagementIPInterfaces xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+      <ManagementVIPInterfaces xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+      <MplsInterfaces/>
+      <MplsTeInterfaces/>
+      <RsvpInterfaces/>
+      <Hostname>str-sonic-sup00-ASIC09</Hostname>
+      <PortChannelInterfaces>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5066</Name>
+          <AttachTo>Eth96;Eth100</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5067</Name>
+          <AttachTo>Eth104;Eth108</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5068</Name>
+          <AttachTo>Eth112;Eth116</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5069</Name>
+          <AttachTo>Eth128;Eth132</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5070</Name>
+          <AttachTo>Eth136;Eth140</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5071</Name>
+          <AttachTo>Eth152;Eth156</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5072</Name>
+          <AttachTo>Eth160;Eth164</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5073</Name>
+          <AttachTo>Eth168;Eth172</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5074</Name>
+          <AttachTo>Eth176;Eth180</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5075</Name>
+          <AttachTo>Eth184;Eth188;Eth194;Eth216</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5076</Name>
+          <AttachTo>Eth190;Eth192;Eth196;Eth222</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5077</Name>
+          <AttachTo>Eth208;Eth212;Eth234;Eth244</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5078</Name>
+          <AttachTo>Eth214;Eth232;Eth236;Eth242</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+      </PortChannelInterfaces>
+      <SubInterfaces/>
+      <VlanInterfaces>
+        <VlanInterface>
+          <ElementType>VlanInterface</ElementType>
+          <Name>Vlan2</Name>
+          <AttachTo>PortChannel5066;PortChannel5067;PortChannel5068;PortChannel5069;PortChannel5070;PortChannel5071;PortChannel5072;PortChannel5073;PortChannel5074;PortChannel5075;PortChannel5076;PortChannel5077;PortChannel5078</AttachTo>
+          <FhrpProtoType i:nil="true"/>
+          <Type>UnTagged</Type>
+          <VlanID>2</VlanID>
+          <Tag>2</Tag>
+          <Subnets>10.235.98.128/25;fc00:34::a:eb62:8001/113</Subnets>
+          <MacAddress i:nil="true"/>
+          <SecondarySubnets/>
+        </VlanInterface>
+      </VlanInterfaces>
+      <IPInterfaces/>
+      <DataAcls/>
+      <AclInterfaces/>
+      <NatInterfaces xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+      <DownstreamSummaries/>
+      <DownstreamSummarySet xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+    </DeviceDataPlaneInfo>
+    <DeviceDataPlaneInfo>
+      <IPSecTunnels/>
+      <LoopbackIPInterfaces xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+      <ManagementIPInterfaces xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+      <ManagementVIPInterfaces xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+      <MplsInterfaces/>
+      <MplsTeInterfaces/>
+      <RsvpInterfaces/>
+      <Hostname>str-sonic-sup00-ASIC10</Hostname>
+      <PortChannelInterfaces>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5079</Name>
+          <AttachTo>Eth96;Eth100</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5080</Name>
+          <AttachTo>Eth104;Eth108</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5081</Name>
+          <AttachTo>Eth112;Eth116</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5082</Name>
+          <AttachTo>Eth128;Eth132</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5083</Name>
+          <AttachTo>Eth136;Eth140</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5084</Name>
+          <AttachTo>Eth154;Eth168;Eth178</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5085</Name>
+          <AttachTo>Eth156;Eth170;Eth180</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5086</Name>
+          <AttachTo>Eth160;Eth164</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5087</Name>
+          <AttachTo>Eth184;Eth194;Eth220</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5088</Name>
+          <AttachTo>Eth190;Eth192;Eth218</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5089</Name>
+          <AttachTo>Eth208;Eth212</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5090</Name>
+          <AttachTo>Eth232;Eth236</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5091</Name>
+          <AttachTo>Eth240;Eth244</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+      </PortChannelInterfaces>
+      <SubInterfaces/>
+      <VlanInterfaces>
+        <VlanInterface>
+          <ElementType>VlanInterface</ElementType>
+          <Name>Vlan2</Name>
+          <AttachTo>PortChannel5079;PortChannel5080;PortChannel5081;PortChannel5082;PortChannel5083;PortChannel5084;PortChannel5085;PortChannel5086;PortChannel5087;PortChannel5088;PortChannel5089;PortChannel5090;PortChannel5091</AttachTo>
+          <FhrpProtoType i:nil="true"/>
+          <Type>UnTagged</Type>
+          <VlanID>2</VlanID>
+          <Tag>2</Tag>
+          <Subnets>10.235.99.0/25;fc00:34::a:eb63:1/113</Subnets>
+          <MacAddress i:nil="true"/>
+          <SecondarySubnets/>
+        </VlanInterface>
+      </VlanInterfaces>
+      <IPInterfaces/>
+      <DataAcls/>
+      <AclInterfaces/>
+      <NatInterfaces xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+      <DownstreamSummaries/>
+      <DownstreamSummarySet xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+    </DeviceDataPlaneInfo>
+    <DeviceDataPlaneInfo>
+      <IPSecTunnels/>
+      <LoopbackIPInterfaces xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+      <ManagementIPInterfaces xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+      <ManagementVIPInterfaces xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+      <MplsInterfaces/>
+      <MplsTeInterfaces/>
+      <RsvpInterfaces/>
+      <Hostname>str-sonic-sup00-ASIC11</Hostname>
+      <PortChannelInterfaces>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5092</Name>
+          <AttachTo>Eth96;Eth100</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5093</Name>
+          <AttachTo>Eth104;Eth108</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5094</Name>
+          <AttachTo>Eth112;Eth116</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5095</Name>
+          <AttachTo>Eth128;Eth132</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5096</Name>
+          <AttachTo>Eth136;Eth140</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5097</Name>
+          <AttachTo>Eth152;Eth156</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5098</Name>
+          <AttachTo>Eth160;Eth164</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5099</Name>
+          <AttachTo>Eth168;Eth172</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5100</Name>
+          <AttachTo>Eth176;Eth180</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5101</Name>
+          <AttachTo>Eth184;Eth188;Eth194;Eth216</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5102</Name>
+          <AttachTo>Eth190;Eth192;Eth196;Eth222</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5103</Name>
+          <AttachTo>Eth208;Eth212;Eth234;Eth244</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5104</Name>
+          <AttachTo>Eth214;Eth232;Eth236;Eth242</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+      </PortChannelInterfaces>
+      <SubInterfaces/>
+      <VlanInterfaces>
+        <VlanInterface>
+          <ElementType>VlanInterface</ElementType>
+          <Name>Vlan2</Name>
+          <AttachTo>PortChannel5092;PortChannel5093;PortChannel5094;PortChannel5095;PortChannel5096;PortChannel5097;PortChannel5098;PortChannel5099;PortChannel5100;PortChannel5101;PortChannel5102;PortChannel5103;PortChannel5104</AttachTo>
+          <FhrpProtoType i:nil="true"/>
+          <Type>UnTagged</Type>
+          <VlanID>2</VlanID>
+          <Tag>2</Tag>
+          <Subnets>10.235.99.128/25;fc00:34::a:eb63:8001/113</Subnets>
+          <MacAddress i:nil="true"/>
+          <SecondarySubnets/>
+        </VlanInterface>
+      </VlanInterfaces>
+      <IPInterfaces/>
+      <DataAcls/>
+      <AclInterfaces/>
+      <NatInterfaces xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+      <DownstreamSummaries/>
+      <DownstreamSummarySet xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+    </DeviceDataPlaneInfo>
+    <DeviceDataPlaneInfo>
+      <IPSecTunnels/>
+      <LoopbackIPInterfaces xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+      <ManagementIPInterfaces xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+      <ManagementVIPInterfaces xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+      <MplsInterfaces/>
+      <MplsTeInterfaces/>
+      <RsvpInterfaces/>
+      <Hostname>str-sonic-sup00-ASIC12</Hostname>
+      <PortChannelInterfaces>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5105</Name>
+          <AttachTo>Eth96;Eth100</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5106</Name>
+          <AttachTo>Eth104;Eth108</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5107</Name>
+          <AttachTo>Eth112;Eth116</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5108</Name>
+          <AttachTo>Eth128;Eth132</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5109</Name>
+          <AttachTo>Eth136;Eth140</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5110</Name>
+          <AttachTo>Eth154;Eth168;Eth178</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5111</Name>
+          <AttachTo>Eth156;Eth170;Eth180</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5112</Name>
+          <AttachTo>Eth160;Eth164</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5113</Name>
+          <AttachTo>Eth184;Eth194;Eth220</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5114</Name>
+          <AttachTo>Eth190;Eth192;Eth218</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5115</Name>
+          <AttachTo>Eth208;Eth212</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5116</Name>
+          <AttachTo>Eth232;Eth236</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5117</Name>
+          <AttachTo>Eth240;Eth244</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+      </PortChannelInterfaces>
+      <SubInterfaces/>
+      <VlanInterfaces>
+        <VlanInterface>
+          <ElementType>VlanInterface</ElementType>
+          <Name>Vlan2</Name>
+          <AttachTo>PortChannel5105;PortChannel5106;PortChannel5107;PortChannel5108;PortChannel5109;PortChannel5110;PortChannel5111;PortChannel5112;PortChannel5113;PortChannel5114;PortChannel5115;PortChannel5116;PortChannel5117</AttachTo>
+          <FhrpProtoType i:nil="true"/>
+          <Type>UnTagged</Type>
+          <VlanID>2</VlanID>
+          <Tag>2</Tag>
+          <Subnets>10.235.100.0/25;fc00:34::a:eb64:1/113</Subnets>
+          <MacAddress i:nil="true"/>
+          <SecondarySubnets/>
+        </VlanInterface>
+      </VlanInterfaces>
+      <IPInterfaces/>
+      <DataAcls/>
+      <AclInterfaces/>
+      <NatInterfaces xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+      <DownstreamSummaries/>
+      <DownstreamSummarySet xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+    </DeviceDataPlaneInfo>
+    <DeviceDataPlaneInfo>
+      <IPSecTunnels/>
+      <LoopbackIPInterfaces xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+      <ManagementIPInterfaces xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+      <ManagementVIPInterfaces xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+      <MplsInterfaces/>
+      <MplsTeInterfaces/>
+      <RsvpInterfaces/>
+      <Hostname>str-sonic-sup00-ASIC13</Hostname>
+      <PortChannelInterfaces>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5118</Name>
+          <AttachTo>Eth96;Eth100</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5119</Name>
+          <AttachTo>Eth104;Eth108</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5120</Name>
+          <AttachTo>Eth112;Eth116</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5121</Name>
+          <AttachTo>Eth128;Eth132</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5122</Name>
+          <AttachTo>Eth136;Eth140</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5123</Name>
+          <AttachTo>Eth152;Eth156</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5124</Name>
+          <AttachTo>Eth160;Eth164</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5125</Name>
+          <AttachTo>Eth168;Eth172</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5126</Name>
+          <AttachTo>Eth176;Eth180</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5127</Name>
+          <AttachTo>Eth184;Eth188;Eth194;Eth216</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5128</Name>
+          <AttachTo>Eth190;Eth192;Eth196;Eth222</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5129</Name>
+          <AttachTo>Eth208;Eth212;Eth234;Eth244</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel5130</Name>
+          <AttachTo>Eth214;Eth232;Eth236;Eth242</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+      </PortChannelInterfaces>
+      <SubInterfaces/>
+      <VlanInterfaces>
+        <VlanInterface>
+          <ElementType>VlanInterface</ElementType>
+          <Name>Vlan2</Name>
+          <AttachTo>PortChannel5118;PortChannel5119;PortChannel5120;PortChannel5121;PortChannel5122;PortChannel5123;PortChannel5124;PortChannel5125;PortChannel5126;PortChannel5127;PortChannel5128;PortChannel5129;PortChannel5130</AttachTo>
+          <FhrpProtoType i:nil="true"/>
+          <Type>UnTagged</Type>
+          <VlanID>2</VlanID>
+          <Tag>2</Tag>
+          <Subnets>10.235.100.128/25;fc00:34::a:eb64:8001/113</Subnets>
+          <MacAddress i:nil="true"/>
+          <SecondarySubnets/>
+        </VlanInterface>
+      </VlanInterfaces>
+      <IPInterfaces/>
+      <DataAcls/>
+      <AclInterfaces/>
+      <NatInterfaces xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+      <DownstreamSummaries/>
+      <DownstreamSummarySet xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+    </DeviceDataPlaneInfo>
+    <DeviceDataPlaneInfo>
+      <IPSecTunnels/>
+      <LoopbackIPInterfaces xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution">
+        <a:LoopbackIPInterface>
+          <ElementType>LoopbackInterface</ElementType>
+          <Name>HostIP</Name>
+          <AttachTo>Loopback0</AttachTo>
+          <a:Prefix xmlns:b="Microsoft.Search.Autopilot.NetMux">
+            <b:IPPrefix>10.3.0.5/32</b:IPPrefix>
+          </a:Prefix>
+          <a:PrefixStr>10.3.0.5/32</a:PrefixStr>
+        </a:LoopbackIPInterface>
+        <a:LoopbackIPInterface>
+          <ElementType>LoopbackInterface</ElementType>
+          <Name>HostIP1</Name>
+          <AttachTo>Loopback0</AttachTo>
+          <a:Prefix xmlns:b="Microsoft.Search.Autopilot.NetMux">
+            <b:IPPrefix>fc00:34::1/128</b:IPPrefix>
+          </a:Prefix>
+          <a:PrefixStr>fc00:34::1/128</a:PrefixStr>
+        </a:LoopbackIPInterface>
+      </LoopbackIPInterfaces>
+      <ManagementIPInterfaces xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution">
+        <a:ManagementIPInterface>
+          <ElementType>ManagementInterface</ElementType>
+          <Name>ManagementIP</Name>
+          <AttachTo>Management1/1</AttachTo>
+          <a:Prefix xmlns:b="Microsoft.Search.Autopilot.NetMux">
+            <b:IPPrefix>10.3.146.198/24</b:IPPrefix>
+          </a:Prefix>
+          <a:PrefixStr>10.3.146.198/24</a:PrefixStr>
+          <a:ReuseScopeStr i:nil="true"/>
+        </a:ManagementIPInterface>
+        <a:ManagementIPInterface>
+          <ElementType>ManagementInterface</ElementType>
+          <Name>v6ManagementIP</Name>
+          <AttachTo>Management1/1</AttachTo>
+          <a:Prefix xmlns:b="Microsoft.Search.Autopilot.NetMux">
+            <b:IPPrefix>2a01:111:e210:3000::a03:92c6/64</b:IPPrefix>
+          </a:Prefix>
+          <a:PrefixStr>2a01:111:e210:3000::a03:92c6/64</a:PrefixStr>
+          <a:ReuseScopeStr i:nil="true"/>
+        </a:ManagementIPInterface>
+      </ManagementIPInterfaces>
+      <ManagementVIPInterfaces xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+      <MplsInterfaces/>
+      <MplsTeInterfaces/>
+      <RsvpInterfaces/>
+      <Hostname>str-sonic-sup00</Hostname>
+      <PortChannelInterfaces/>
+      <SubInterfaces/>
+      <VlanInterfaces/>
+      <IPInterfaces/>
+      <DataAcls/>
+      <AclInterfaces/>
+      <NatInterfaces xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+      <DownstreamSummaries/>
+      <DownstreamSummarySet xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+    </DeviceDataPlaneInfo>
+  </DpgDec>
+  <LinkMetadataDeclaration>
+    <Link xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution">
+      <a:LinkMetadata>
+        <a:Name>str-sonic-sup00:console;str-console-194:port 27</a:Name>
+        <a:Properties>
+          <a:DeviceProperty>
+            <a:Name>FlowControl</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>False</a:Value>
+          </a:DeviceProperty>
+        </a:Properties>
+        <a:Key>str-sonic:rp0-console0;str-console-194:port 27</a:Key>
+      </a:LinkMetadata>
+    </Link>
+    <Properties xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+  </LinkMetadataDeclaration>
+  <MetadataDeclaration>
+    <Devices xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution">
+      <a:DeviceMetadata>
+        <a:Name>str-sonic-sup00-ASIC00</a:Name>
+        <a:Properties>
+          <a:DeviceProperty>
+            <a:Name>ForwardingMethod</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>chassis-packet</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>ParentHardwareFabricSkuName</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>sonic-sup-sku</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>SubRole</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>BackEnd</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>ProviderLineCard</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str-sonic-fc00</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>ParentRouter</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str-sonic-sup00</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Group</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str-sonic</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>DcCode</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>STR</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>CloudType</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Public</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Location</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>TBD</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Function</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>LabTest</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>DeploymentId</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>3</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>SonicEnabled</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>True</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Region</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>test</a:Value>
+          </a:DeviceProperty>
+        </a:Properties>
+      </a:DeviceMetadata>
+      <a:DeviceMetadata>
+        <a:Name>str-sonic-sup00-ASIC01</a:Name>
+        <a:Properties>
+          <a:DeviceProperty>
+            <a:Name>ForwardingMethod</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>chassis-packet</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>ParentHardwareFabricSkuName</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>sonic-sup-sku</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>SubRole</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>BackEnd</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>ProviderLineCard</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str-sonic-fc00</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>ParentRouter</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str-sonic-sup00</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Group</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str-sonic</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>DcCode</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>STR</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>CloudType</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Public</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Location</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>TBD</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Function</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>LabTest</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>DeploymentId</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>3</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>SonicEnabled</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>True</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Region</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>test</a:Value>
+          </a:DeviceProperty>
+        </a:Properties>
+      </a:DeviceMetadata>
+      <a:DeviceMetadata>
+        <a:Name>str-sonic-sup00-ASIC04</a:Name>
+        <a:Properties>
+          <a:DeviceProperty>
+            <a:Name>ForwardingMethod</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>chassis-packet</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>ParentHardwareFabricSkuName</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>sonic-sup-sku</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>SubRole</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>BackEnd</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>AsicSwitchId</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>8</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>ProviderLineCard</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str-sonic-fc02</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>ParentRouter</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str-sonic-sup00</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Group</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str-sonic</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>DcCode</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>STR</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>CloudType</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Public</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Location</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>TBD</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Function</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>LabTest</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>DeploymentId</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>3</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>SonicEnabled</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>True</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Region</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>test</a:Value>
+          </a:DeviceProperty>
+        </a:Properties>
+      </a:DeviceMetadata>
+      <a:DeviceMetadata>
+        <a:Name>str-sonic-sup00-ASIC05</a:Name>
+        <a:Properties>
+          <a:DeviceProperty>
+            <a:Name>ForwardingMethod</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>chassis-packet</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>ParentHardwareFabricSkuName</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>sonic-sup-sku</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>SubRole</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>BackEnd</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>AsicSwitchId</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>9</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>ProviderLineCard</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str-sonic-fc02</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>ParentRouter</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str-sonic-sup00</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Group</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str-sonic</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>DcCode</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>STR</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>CloudType</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Public</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Location</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>TBD</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Function</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>LabTest</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>DeploymentId</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>3</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>SonicEnabled</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>True</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Region</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>test</a:Value>
+          </a:DeviceProperty>
+        </a:Properties>
+      </a:DeviceMetadata>
+      <a:DeviceMetadata>
+        <a:Name>str-sonic-sup00-ASIC08</a:Name>
+        <a:Properties>
+          <a:DeviceProperty>
+            <a:Name>ForwardingMethod</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>chassis-packet</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>ParentHardwareFabricSkuName</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>sonic-sup-sku</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>SubRole</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>BackEnd</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>AsicSwitchId</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>20</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>ProviderLineCard</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str-sonic-fc04</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>ParentRouter</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str-sonic-sup00</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Group</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str-sonic</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>DcCode</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>STR</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>CloudType</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Public</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Location</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>TBD</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Function</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>LabTest</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>DeploymentId</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>3</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>SonicEnabled</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>True</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Region</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>test</a:Value>
+          </a:DeviceProperty>
+        </a:Properties>
+      </a:DeviceMetadata>
+      <a:DeviceMetadata>
+        <a:Name>str-sonic-sup00-ASIC09</a:Name>
+        <a:Properties>
+          <a:DeviceProperty>
+            <a:Name>ForwardingMethod</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>chassis-packet</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>ParentHardwareFabricSkuName</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>sonic-sup-sku</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>SubRole</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>BackEnd</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>AsicSwitchId</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>21</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>ProviderLineCard</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str-sonic-fc04</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>ParentRouter</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str-sonic-sup00</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Group</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str-sonic</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>DcCode</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>STR</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>CloudType</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Public</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Location</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>TBD</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Function</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>LabTest</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>DeploymentId</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>3</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>SonicEnabled</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>True</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Region</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>test</a:Value>
+          </a:DeviceProperty>
+        </a:Properties>
+      </a:DeviceMetadata>
+      <a:DeviceMetadata>
+        <a:Name>str-sonic-sup00-ASIC10</a:Name>
+        <a:Properties>
+          <a:DeviceProperty>
+            <a:Name>ForwardingMethod</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>chassis-packet</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>ParentHardwareFabricSkuName</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>sonic-sup-sku</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>SubRole</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>BackEnd</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>AsicSwitchId</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>26</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>ProviderLineCard</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str-sonic-fc05</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>ParentRouter</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str-sonic-sup00</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Group</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str-sonic</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>DcCode</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>STR</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>CloudType</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Public</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Location</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>TBD</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Function</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>LabTest</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>DeploymentId</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>3</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>SonicEnabled</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>True</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Region</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>test</a:Value>
+          </a:DeviceProperty>
+        </a:Properties>
+      </a:DeviceMetadata>
+      <a:DeviceMetadata>
+        <a:Name>str-sonic-sup00-ASIC11</a:Name>
+        <a:Properties>
+          <a:DeviceProperty>
+            <a:Name>ForwardingMethod</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>chassis-packet</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>ParentHardwareFabricSkuName</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>sonic-sup-sku</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>SubRole</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>BackEnd</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>AsicSwitchId</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>27</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>ProviderLineCard</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str-sonic-fc05</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>ParentRouter</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str-sonic-sup00</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Group</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str-sonic</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>DcCode</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>STR</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>CloudType</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Public</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Location</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>TBD</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Function</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>LabTest</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>DeploymentId</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>3</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>SonicEnabled</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>True</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Region</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>test</a:Value>
+          </a:DeviceProperty>
+        </a:Properties>
+      </a:DeviceMetadata>
+      <a:DeviceMetadata>
+        <a:Name>str-sonic-sup00-ASIC12</a:Name>
+        <a:Properties>
+          <a:DeviceProperty>
+            <a:Name>ForwardingMethod</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>chassis-packet</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>ParentHardwareFabricSkuName</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>sonic-sup-sku</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>SubRole</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>BackEnd</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>AsicSwitchId</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>32</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>ProviderLineCard</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str-sonic-fc06</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>ParentRouter</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str-sonic-sup00</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Group</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str-sonic</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>DcCode</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>STR</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>CloudType</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Public</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Location</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>TBD</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Function</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>LabTest</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>DeploymentId</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>3</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>SonicEnabled</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>True</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Region</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>test</a:Value>
+          </a:DeviceProperty>
+        </a:Properties>
+      </a:DeviceMetadata>
+      <a:DeviceMetadata>
+        <a:Name>str-sonic-sup00-ASIC13</a:Name>
+        <a:Properties>
+          <a:DeviceProperty>
+            <a:Name>ForwardingMethod</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>chassis-packet</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>ParentHardwareFabricSkuName</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>sonic-sup-sku</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>SubRole</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>BackEnd</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>AsicSwitchId</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>33</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>ProviderLineCard</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str-sonic-fc06</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>ParentRouter</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str-sonic-sup00</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Group</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str-sonic</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>DcCode</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>STR</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>CloudType</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Public</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Location</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>TBD</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Function</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>LabTest</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>DeploymentId</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>3</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>SonicEnabled</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>True</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Region</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>test</a:Value>
+          </a:DeviceProperty>
+        </a:Properties>
+      </a:DeviceMetadata>
+      <a:DeviceMetadata>
+        <a:Name>str-sonic-sup00</a:Name>
+        <a:Properties>
+          <a:DeviceProperty>
+            <a:Name>FirmwareProfile</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>SONiC-sonic-sup-sku-sup</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>ForwardingMethod</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>chassis-packet</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>OsVersion</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>SONiC.20220532.45</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>ParentRouter</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str-sonic</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>SubDevices</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str-sonic-sup00-ASIC00;str-sonic-sup00-ASIC01;str-sonic-sup00-ASIC04;str-sonic-sup00-ASIC05;str-sonic-sup00-ASIC08;str-sonic-sup00-ASIC09;str-sonic-sup00-ASIC10;str-sonic-sup00-ASIC11;str-sonic-sup00-ASIC12;str-sonic-sup00-ASIC13</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Group</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str-sonic</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>DcCode</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>STR</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>CloudType</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Public</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Location</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>TBD</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Function</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>LabTest</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>DeploymentId</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>3</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>SonicEnabled</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>True</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Region</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>test</a:Value>
+          </a:DeviceProperty>
+        </a:Properties>
+      </a:DeviceMetadata>
+      <a:DeviceMetadata>
+        <a:Name>str-sonic</a:Name>
+        <a:Properties>
+          <a:DeviceProperty>
+            <a:Name>CloudType</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Public</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>ConfigDbAclFile</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>SonicNativeAcl.liquid</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>ConfigTemplateFile</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Sonic.xml</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>DNSServers</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>10.64.5.5;10.64.6.6;10.64.6.7</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>DcCode</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>STR</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>DeploymentId</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>3</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>ErspanDestinationIpv4</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>10.20.6.4</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>FirmwareProfile</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>SONiC-sonic-sup-sku-sup</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Function</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>LabTest</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Group</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str:-1848794319</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>InitConfigTemplateFile</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Sonic.init.xml</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Location</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>TBD</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Loopback0Ipv4</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>10.3.0.1/32;10.3.0.2/32;10.3.0.3/32;10.3.0.4/32;10.3.0.5/32</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Loopback0Ipv6</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>fc00:30::1/128;fc00:31::1/128;fc00:32::1/128;fc00:33::1/128;fc00:34::1/128</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Loopback4096Ipv4</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>192.0.0.1/32;192.0.0.2/32;192.0.0.3/32;192.0.0.4/32;192.0.0.5/32;192.0.0.6/32;192.0.0.7/32;192.0.0.8/32;192.0.0.9/32;192.0.0.10/32;192.0.0.11/32;192.0.0.12/32;192.0.0.13/32</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Loopback4096Ipv6</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>2603:10e2:400::1/128;2603:10e2:400::2/128;2603:10e2:400::3/128;2603:10e2:400::4/128;2603:10e2:400::5/128;2603:10e2:400::6/128;2603:10e2:400::7/128;2603:10e2:400::8/128;2603:10e2:400::9/128;2603:10e2:400::a/128;2603:10e2:400::b/128;2603:10e2:400::c/128;2603:10e2:400::d/128</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>MacSecEnabled</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>True</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>MacSecProfile</a:Name>
+            <a:Reference>usstagee.Sonic.MacSec</a:Reference>
+            <a:Value>PrimaryKey="macsec-profile-two" FallbackKey="macsec-profile" MacsecPolicy=""</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>ManagementIpv4</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>10.3.146.199/24;10.3.146.200/24;10.3.146.201/24;10.3.146.205/24;10.3.146.214/24</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>ManagementIpv6</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>2a01:111:e210:3000::a03:92c7/64;2a01:111:e210:3000::a03:92c8/64;2a01:111:e210:3000::a03:92c9/64;2a01:111:e210:3000::a03:92cd/64;2a01:111:e210:3000::a03:92d6/64</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>MaxCountOfCores</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>64</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>NtpResources</a:Name>
+            <a:Reference>Public.Ntp</a:Reference>
+            <a:Value>17.39.1.129;17.39.1.130</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>QosProfile</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>VerlaineLongHaul</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>RemoteAuthenticationProtocol</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Tacacs</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>SnmpResources</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>10.52.180.161;10.3.157.12</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>SonicConfigTemplateFile</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Sonic.xml</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>SonicEnabled</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>True</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>SyslogResources</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>10.52.180.161;10.3.157.12</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>SyslogServer</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>10.20.4.167;10.20.7.33;10.20.6.16;10.20.6.84</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>TacacsKey</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>$Secrets.TacacsKey</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>TacacsSecurityLevel</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>7</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>TacacsServer</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>123.46.98.21</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>OsVersion</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>SONiC.20220532.45</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Region</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>test</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>ChassisEnabled</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>true</a:Value>
+          </a:DeviceProperty>
+        </a:Properties>
+      </a:DeviceMetadata>
+    </Devices>
+    <Properties xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+  </MetadataDeclaration>
+  <PngDec>
+    <DeviceInterfaceLinks>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC00</EndDevice>
+        <EndPort>Eth96</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth396</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC00</EndDevice>
+        <EndPort>Eth100</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth392</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC00</EndDevice>
+        <EndPort>Eth104</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC01</StartDevice>
+        <StartPort>Eth404</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC00</EndDevice>
+        <EndPort>Eth108</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC01</StartDevice>
+        <StartPort>Eth400</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC00</EndDevice>
+        <EndPort>Eth112</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC02</StartDevice>
+        <StartPort>Eth392</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC00</EndDevice>
+        <EndPort>Eth116</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC02</StartDevice>
+        <StartPort>Eth396</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC00</EndDevice>
+        <EndPort>Eth128</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth396</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC00</EndDevice>
+        <EndPort>Eth132</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth392</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC00</EndDevice>
+        <EndPort>Eth136</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth404</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC00</EndDevice>
+        <EndPort>Eth140</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth400</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC00</EndDevice>
+        <EndPort>Eth154</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc02-ASIC01</StartDevice>
+        <StartPort>Eth288</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC00</EndDevice>
+        <EndPort>Eth156</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc02-ASIC00</StartDevice>
+        <StartPort>Eth294</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC00</EndDevice>
+        <EndPort>Eth160</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC02</StartDevice>
+        <StartPort>Eth396</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC00</EndDevice>
+        <EndPort>Eth164</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC02</StartDevice>
+        <StartPort>Eth392</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC00</EndDevice>
+        <EndPort>Eth168</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc02-ASIC01</StartDevice>
+        <StartPort>Eth292</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC00</EndDevice>
+        <EndPort>Eth170</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc02-ASIC00</StartDevice>
+        <StartPort>Eth290</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC00</EndDevice>
+        <EndPort>Eth178</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc02-ASIC01</StartDevice>
+        <StartPort>Eth294</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC00</EndDevice>
+        <EndPort>Eth180</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc02-ASIC00</StartDevice>
+        <StartPort>Eth292</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC00</EndDevice>
+        <EndPort>Eth184</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc01-ASIC00</StartDevice>
+        <StartPort>Eth294</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC00</EndDevice>
+        <EndPort>Eth190</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc01-ASIC01</StartDevice>
+        <StartPort>Eth288</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC00</EndDevice>
+        <EndPort>Eth192</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc01-ASIC01</StartDevice>
+        <StartPort>Eth292</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC00</EndDevice>
+        <EndPort>Eth194</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc01-ASIC00</StartDevice>
+        <StartPort>Eth290</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC00</EndDevice>
+        <EndPort>Eth208</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc00-ASIC00</StartDevice>
+        <StartPort>Eth396</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC00</EndDevice>
+        <EndPort>Eth212</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc00-ASIC00</StartDevice>
+        <StartPort>Eth392</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC00</EndDevice>
+        <EndPort>Eth218</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc01-ASIC01</StartDevice>
+        <StartPort>Eth294</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC00</EndDevice>
+        <EndPort>Eth220</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc01-ASIC00</StartDevice>
+        <StartPort>Eth292</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC00</EndDevice>
+        <EndPort>Eth232</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc00-ASIC01</StartDevice>
+        <StartPort>Eth404</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC00</EndDevice>
+        <EndPort>Eth236</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc00-ASIC01</StartDevice>
+        <StartPort>Eth400</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC00</EndDevice>
+        <EndPort>Eth240</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc00-ASIC02</StartDevice>
+        <StartPort>Eth392</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC00</EndDevice>
+        <EndPort>Eth244</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc00-ASIC02</StartDevice>
+        <StartPort>Eth396</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC01</EndDevice>
+        <EndPort>Eth96</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth404</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC01</EndDevice>
+        <EndPort>Eth100</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth400</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC01</EndDevice>
+        <EndPort>Eth104</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC01</StartDevice>
+        <StartPort>Eth396</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC01</EndDevice>
+        <EndPort>Eth108</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC01</StartDevice>
+        <StartPort>Eth392</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC01</EndDevice>
+        <EndPort>Eth112</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC02</StartDevice>
+        <StartPort>Eth400</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC01</EndDevice>
+        <EndPort>Eth116</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC02</StartDevice>
+        <StartPort>Eth404</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC01</EndDevice>
+        <EndPort>Eth128</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth404</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC01</EndDevice>
+        <EndPort>Eth132</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth400</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC01</EndDevice>
+        <EndPort>Eth136</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth396</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC01</EndDevice>
+        <EndPort>Eth140</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth392</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC01</EndDevice>
+        <EndPort>Eth152</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc00-ASIC02</StartDevice>
+        <StartPort>Eth400</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC01</EndDevice>
+        <EndPort>Eth156</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc00-ASIC02</StartDevice>
+        <StartPort>Eth404</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC01</EndDevice>
+        <EndPort>Eth160</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC02</StartDevice>
+        <StartPort>Eth400</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC01</EndDevice>
+        <EndPort>Eth164</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC02</StartDevice>
+        <StartPort>Eth404</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC01</EndDevice>
+        <EndPort>Eth168</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc00-ASIC00</StartDevice>
+        <StartPort>Eth404</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC01</EndDevice>
+        <EndPort>Eth172</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc00-ASIC00</StartDevice>
+        <StartPort>Eth400</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC01</EndDevice>
+        <EndPort>Eth176</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc00-ASIC01</StartDevice>
+        <StartPort>Eth396</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC01</EndDevice>
+        <EndPort>Eth180</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc00-ASIC01</StartDevice>
+        <StartPort>Eth392</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC01</EndDevice>
+        <EndPort>Eth184</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc02-ASIC00</StartDevice>
+        <StartPort>Eth286</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC01</EndDevice>
+        <EndPort>Eth188</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc02-ASIC00</StartDevice>
+        <StartPort>Eth288</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC01</EndDevice>
+        <EndPort>Eth190</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc02-ASIC01</StartDevice>
+        <StartPort>Eth192</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC01</EndDevice>
+        <EndPort>Eth192</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc02-ASIC01</StartDevice>
+        <StartPort>Eth302</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC01</EndDevice>
+        <EndPort>Eth194</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc02-ASIC00</StartDevice>
+        <StartPort>Eth192</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC01</EndDevice>
+        <EndPort>Eth196</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc02-ASIC01</StartDevice>
+        <StartPort>Eth290</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC01</EndDevice>
+        <EndPort>Eth208</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc01-ASIC00</StartDevice>
+        <StartPort>Eth286</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC01</EndDevice>
+        <EndPort>Eth212</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc01-ASIC00</StartDevice>
+        <StartPort>Eth288</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC01</EndDevice>
+        <EndPort>Eth214</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc01-ASIC01</StartDevice>
+        <StartPort>Eth192</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC01</EndDevice>
+        <EndPort>Eth216</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc02-ASIC00</StartDevice>
+        <StartPort>Eth302</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC01</EndDevice>
+        <EndPort>Eth222</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc02-ASIC01</StartDevice>
+        <StartPort>Eth286</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC01</EndDevice>
+        <EndPort>Eth232</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc01-ASIC01</StartDevice>
+        <StartPort>Eth302</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC01</EndDevice>
+        <EndPort>Eth234</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc01-ASIC00</StartDevice>
+        <StartPort>Eth192</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC01</EndDevice>
+        <EndPort>Eth236</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc01-ASIC01</StartDevice>
+        <StartPort>Eth290</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC01</EndDevice>
+        <EndPort>Eth242</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc01-ASIC01</StartDevice>
+        <StartPort>Eth286</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC01</EndDevice>
+        <EndPort>Eth244</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc01-ASIC00</StartDevice>
+        <StartPort>Eth302</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth96</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth380</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth100</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth376</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth104</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC01</StartDevice>
+        <StartPort>Eth380</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth108</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC01</StartDevice>
+        <StartPort>Eth376</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth112</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC02</StartDevice>
+        <StartPort>Eth376</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth116</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC02</StartDevice>
+        <StartPort>Eth380</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth128</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth380</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth132</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth376</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth136</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth380</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth140</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth376</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth154</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc02-ASIC01</StartDevice>
+        <StartPort>Eth282</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth156</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc02-ASIC00</StartDevice>
+        <StartPort>Eth264</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth160</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC02</StartDevice>
+        <StartPort>Eth380</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth164</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC02</StartDevice>
+        <StartPort>Eth376</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth168</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc02-ASIC01</StartDevice>
+        <StartPort>Eth266</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth170</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc02-ASIC00</StartDevice>
+        <StartPort>Eth282</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth178</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc02-ASIC01</StartDevice>
+        <StartPort>Eth264</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth180</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc02-ASIC00</StartDevice>
+        <StartPort>Eth266</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth184</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc01-ASIC00</StartDevice>
+        <StartPort>Eth264</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth190</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc01-ASIC01</StartDevice>
+        <StartPort>Eth282</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth192</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc01-ASIC01</StartDevice>
+        <StartPort>Eth266</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth194</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc01-ASIC00</StartDevice>
+        <StartPort>Eth282</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth208</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc00-ASIC00</StartDevice>
+        <StartPort>Eth380</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth212</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc00-ASIC00</StartDevice>
+        <StartPort>Eth376</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth218</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc01-ASIC01</StartDevice>
+        <StartPort>Eth264</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth220</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc01-ASIC00</StartDevice>
+        <StartPort>Eth266</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth232</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc00-ASIC01</StartDevice>
+        <StartPort>Eth380</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth236</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc00-ASIC01</StartDevice>
+        <StartPort>Eth376</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth240</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc00-ASIC02</StartDevice>
+        <StartPort>Eth376</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth244</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc00-ASIC02</StartDevice>
+        <StartPort>Eth380</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth96</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth388</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth100</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth384</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth104</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC01</StartDevice>
+        <StartPort>Eth388</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth108</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC01</StartDevice>
+        <StartPort>Eth384</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth112</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC02</StartDevice>
+        <StartPort>Eth384</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth116</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC02</StartDevice>
+        <StartPort>Eth388</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth128</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth388</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth132</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth384</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth136</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth388</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth140</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth384</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth152</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc00-ASIC02</StartDevice>
+        <StartPort>Eth384</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth156</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc00-ASIC02</StartDevice>
+        <StartPort>Eth388</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth160</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC02</StartDevice>
+        <StartPort>Eth384</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth164</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC02</StartDevice>
+        <StartPort>Eth388</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth168</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc00-ASIC00</StartDevice>
+        <StartPort>Eth388</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth172</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc00-ASIC00</StartDevice>
+        <StartPort>Eth384</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth176</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc00-ASIC01</StartDevice>
+        <StartPort>Eth388</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth180</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc00-ASIC01</StartDevice>
+        <StartPort>Eth384</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth184</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc02-ASIC00</StartDevice>
+        <StartPort>Eth280</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth188</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc02-ASIC00</StartDevice>
+        <StartPort>Eth284</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth190</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc02-ASIC01</StartDevice>
+        <StartPort>Eth276</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth192</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc02-ASIC01</StartDevice>
+        <StartPort>Eth278</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth194</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc02-ASIC00</StartDevice>
+        <StartPort>Eth276</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth196</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc02-ASIC01</StartDevice>
+        <StartPort>Eth284</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth208</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc01-ASIC00</StartDevice>
+        <StartPort>Eth280</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth212</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc01-ASIC00</StartDevice>
+        <StartPort>Eth284</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth214</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc01-ASIC01</StartDevice>
+        <StartPort>Eth276</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth216</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc02-ASIC00</StartDevice>
+        <StartPort>Eth278</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth222</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc02-ASIC01</StartDevice>
+        <StartPort>Eth280</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth232</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc01-ASIC01</StartDevice>
+        <StartPort>Eth278</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth234</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc01-ASIC00</StartDevice>
+        <StartPort>Eth276</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth236</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc01-ASIC01</StartDevice>
+        <StartPort>Eth284</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth242</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc01-ASIC01</StartDevice>
+        <StartPort>Eth280</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth244</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc01-ASIC00</StartDevice>
+        <StartPort>Eth278</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth96</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth364</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth100</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth360</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth104</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC01</StartDevice>
+        <StartPort>Eth364</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth108</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC01</StartDevice>
+        <StartPort>Eth360</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth112</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC02</StartDevice>
+        <StartPort>Eth360</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth116</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC02</StartDevice>
+        <StartPort>Eth364</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth128</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth364</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth132</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth360</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth136</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth364</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth140</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth360</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth154</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc02-ASIC01</StartDevice>
+        <StartPort>Eth242</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth156</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc02-ASIC00</StartDevice>
+        <StartPort>Eth236</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth160</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC02</StartDevice>
+        <StartPort>Eth364</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth164</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC02</StartDevice>
+        <StartPort>Eth360</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth168</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc02-ASIC01</StartDevice>
+        <StartPort>Eth238</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth170</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc02-ASIC00</StartDevice>
+        <StartPort>Eth242</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth178</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc02-ASIC01</StartDevice>
+        <StartPort>Eth236</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth180</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc02-ASIC00</StartDevice>
+        <StartPort>Eth238</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth184</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc01-ASIC00</StartDevice>
+        <StartPort>Eth236</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth190</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc01-ASIC01</StartDevice>
+        <StartPort>Eth242</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth192</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc01-ASIC01</StartDevice>
+        <StartPort>Eth238</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth194</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc01-ASIC00</StartDevice>
+        <StartPort>Eth242</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth208</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc00-ASIC00</StartDevice>
+        <StartPort>Eth364</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth212</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc00-ASIC00</StartDevice>
+        <StartPort>Eth360</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth218</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc01-ASIC01</StartDevice>
+        <StartPort>Eth236</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth220</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc01-ASIC00</StartDevice>
+        <StartPort>Eth238</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth232</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc00-ASIC01</StartDevice>
+        <StartPort>Eth364</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth236</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc00-ASIC01</StartDevice>
+        <StartPort>Eth360</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth240</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc00-ASIC02</StartDevice>
+        <StartPort>Eth360</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth244</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc00-ASIC02</StartDevice>
+        <StartPort>Eth364</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth96</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth328</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth100</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth332</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth104</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC01</StartDevice>
+        <StartPort>Eth328</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth108</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC01</StartDevice>
+        <StartPort>Eth332</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth112</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC02</StartDevice>
+        <StartPort>Eth328</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth116</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC02</StartDevice>
+        <StartPort>Eth332</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth128</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth328</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth132</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth332</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth136</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth328</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth140</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth332</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth152</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc00-ASIC02</StartDevice>
+        <StartPort>Eth328</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth156</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc00-ASIC02</StartDevice>
+        <StartPort>Eth332</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth160</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC02</StartDevice>
+        <StartPort>Eth328</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth164</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC02</StartDevice>
+        <StartPort>Eth332</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth168</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc00-ASIC00</StartDevice>
+        <StartPort>Eth328</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth172</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc00-ASIC00</StartDevice>
+        <StartPort>Eth332</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth176</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc00-ASIC01</StartDevice>
+        <StartPort>Eth328</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth180</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc00-ASIC01</StartDevice>
+        <StartPort>Eth332</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth184</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc02-ASIC00</StartDevice>
+        <StartPort>Eth244</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth188</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc02-ASIC00</StartDevice>
+        <StartPort>Eth240</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth190</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc02-ASIC01</StartDevice>
+        <StartPort>Eth248</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth192</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc02-ASIC01</StartDevice>
+        <StartPort>Eth246</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth194</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc02-ASIC00</StartDevice>
+        <StartPort>Eth248</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth196</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc02-ASIC01</StartDevice>
+        <StartPort>Eth240</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth208</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc01-ASIC00</StartDevice>
+        <StartPort>Eth244</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth212</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc01-ASIC00</StartDevice>
+        <StartPort>Eth240</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth214</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc01-ASIC01</StartDevice>
+        <StartPort>Eth248</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth216</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc02-ASIC00</StartDevice>
+        <StartPort>Eth246</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth222</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc02-ASIC01</StartDevice>
+        <StartPort>Eth244</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth232</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc01-ASIC01</StartDevice>
+        <StartPort>Eth246</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth234</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc01-ASIC00</StartDevice>
+        <StartPort>Eth248</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth236</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc01-ASIC01</StartDevice>
+        <StartPort>Eth240</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth242</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc01-ASIC01</StartDevice>
+        <StartPort>Eth244</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth244</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc01-ASIC00</StartDevice>
+        <StartPort>Eth246</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth96</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth336</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth100</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth340</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth104</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC01</StartDevice>
+        <StartPort>Eth336</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth108</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC01</StartDevice>
+        <StartPort>Eth340</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth112</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC02</StartDevice>
+        <StartPort>Eth336</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth116</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC02</StartDevice>
+        <StartPort>Eth340</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth128</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth336</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth132</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth340</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth136</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth336</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth140</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth340</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth154</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc02-ASIC01</StartDevice>
+        <StartPort>Eth218</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth156</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc02-ASIC00</StartDevice>
+        <StartPort>Eth222</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth160</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC02</StartDevice>
+        <StartPort>Eth340</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth164</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC02</StartDevice>
+        <StartPort>Eth336</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth168</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc02-ASIC01</StartDevice>
+        <StartPort>Eth214</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth170</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc02-ASIC00</StartDevice>
+        <StartPort>Eth218</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth178</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc02-ASIC01</StartDevice>
+        <StartPort>Eth222</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth180</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc02-ASIC00</StartDevice>
+        <StartPort>Eth214</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth184</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc01-ASIC00</StartDevice>
+        <StartPort>Eth222</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth190</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc01-ASIC01</StartDevice>
+        <StartPort>Eth218</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth192</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc01-ASIC01</StartDevice>
+        <StartPort>Eth214</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth194</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc01-ASIC00</StartDevice>
+        <StartPort>Eth218</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth208</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc00-ASIC00</StartDevice>
+        <StartPort>Eth336</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth212</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc00-ASIC00</StartDevice>
+        <StartPort>Eth340</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth218</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc01-ASIC01</StartDevice>
+        <StartPort>Eth222</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth220</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc01-ASIC00</StartDevice>
+        <StartPort>Eth214</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth232</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc00-ASIC01</StartDevice>
+        <StartPort>Eth336</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth236</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc00-ASIC01</StartDevice>
+        <StartPort>Eth340</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth240</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc00-ASIC02</StartDevice>
+        <StartPort>Eth336</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth244</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc00-ASIC02</StartDevice>
+        <StartPort>Eth340</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth96</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth316</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth100</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth312</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth104</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC01</StartDevice>
+        <StartPort>Eth316</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth108</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC01</StartDevice>
+        <StartPort>Eth312</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth112</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC02</StartDevice>
+        <StartPort>Eth312</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth116</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC02</StartDevice>
+        <StartPort>Eth316</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth128</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth316</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth132</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth312</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth136</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth316</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth140</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth312</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth152</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc00-ASIC02</StartDevice>
+        <StartPort>Eth312</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth156</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc00-ASIC02</StartDevice>
+        <StartPort>Eth316</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth160</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC02</StartDevice>
+        <StartPort>Eth312</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth164</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC02</StartDevice>
+        <StartPort>Eth316</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth168</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc00-ASIC00</StartDevice>
+        <StartPort>Eth316</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth172</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc00-ASIC00</StartDevice>
+        <StartPort>Eth312</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth176</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc00-ASIC01</StartDevice>
+        <StartPort>Eth316</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth180</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc00-ASIC01</StartDevice>
+        <StartPort>Eth312</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth184</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc02-ASIC00</StartDevice>
+        <StartPort>Eth220</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth188</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc02-ASIC00</StartDevice>
+        <StartPort>Eth216</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth190</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc02-ASIC01</StartDevice>
+        <StartPort>Eth234</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth192</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc02-ASIC01</StartDevice>
+        <StartPort>Eth232</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth194</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc02-ASIC00</StartDevice>
+        <StartPort>Eth234</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth196</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc02-ASIC01</StartDevice>
+        <StartPort>Eth216</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth208</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc01-ASIC00</StartDevice>
+        <StartPort>Eth220</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth212</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc01-ASIC00</StartDevice>
+        <StartPort>Eth216</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth214</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc01-ASIC01</StartDevice>
+        <StartPort>Eth234</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth216</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc02-ASIC00</StartDevice>
+        <StartPort>Eth232</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth222</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc02-ASIC01</StartDevice>
+        <StartPort>Eth220</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth232</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc01-ASIC01</StartDevice>
+        <StartPort>Eth232</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth234</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc01-ASIC00</StartDevice>
+        <StartPort>Eth234</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth236</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc01-ASIC01</StartDevice>
+        <StartPort>Eth216</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth242</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc01-ASIC01</StartDevice>
+        <StartPort>Eth220</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth244</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc01-ASIC00</StartDevice>
+        <StartPort>Eth232</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC12</EndDevice>
+        <EndPort>Eth96</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth320</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC12</EndDevice>
+        <EndPort>Eth100</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth324</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC12</EndDevice>
+        <EndPort>Eth104</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC01</StartDevice>
+        <StartPort>Eth324</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC12</EndDevice>
+        <EndPort>Eth108</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC01</StartDevice>
+        <StartPort>Eth320</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC12</EndDevice>
+        <EndPort>Eth112</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC02</StartDevice>
+        <StartPort>Eth320</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC12</EndDevice>
+        <EndPort>Eth116</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC02</StartDevice>
+        <StartPort>Eth324</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC12</EndDevice>
+        <EndPort>Eth128</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth320</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC12</EndDevice>
+        <EndPort>Eth132</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth324</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC12</EndDevice>
+        <EndPort>Eth136</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth324</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC12</EndDevice>
+        <EndPort>Eth140</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth320</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC12</EndDevice>
+        <EndPort>Eth154</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc02-ASIC01</StartDevice>
+        <StartPort>Eth204</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC12</EndDevice>
+        <EndPort>Eth156</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc02-ASIC00</StartDevice>
+        <StartPort>Eth208</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC12</EndDevice>
+        <EndPort>Eth160</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC02</StartDevice>
+        <StartPort>Eth324</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC12</EndDevice>
+        <EndPort>Eth164</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC02</StartDevice>
+        <StartPort>Eth320</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC12</EndDevice>
+        <EndPort>Eth168</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc02-ASIC01</StartDevice>
+        <StartPort>Eth206</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC12</EndDevice>
+        <EndPort>Eth170</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc02-ASIC00</StartDevice>
+        <StartPort>Eth230</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC12</EndDevice>
+        <EndPort>Eth178</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc02-ASIC01</StartDevice>
+        <StartPort>Eth208</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC12</EndDevice>
+        <EndPort>Eth180</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc02-ASIC00</StartDevice>
+        <StartPort>Eth206</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC12</EndDevice>
+        <EndPort>Eth184</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc01-ASIC00</StartDevice>
+        <StartPort>Eth208</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC12</EndDevice>
+        <EndPort>Eth190</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc01-ASIC01</StartDevice>
+        <StartPort>Eth204</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC12</EndDevice>
+        <EndPort>Eth192</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc01-ASIC01</StartDevice>
+        <StartPort>Eth206</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC12</EndDevice>
+        <EndPort>Eth194</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc01-ASIC00</StartDevice>
+        <StartPort>Eth230</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC12</EndDevice>
+        <EndPort>Eth208</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc00-ASIC00</StartDevice>
+        <StartPort>Eth320</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC12</EndDevice>
+        <EndPort>Eth212</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc00-ASIC00</StartDevice>
+        <StartPort>Eth324</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC12</EndDevice>
+        <EndPort>Eth218</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc01-ASIC01</StartDevice>
+        <StartPort>Eth208</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC12</EndDevice>
+        <EndPort>Eth220</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc01-ASIC00</StartDevice>
+        <StartPort>Eth206</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC12</EndDevice>
+        <EndPort>Eth232</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc00-ASIC01</StartDevice>
+        <StartPort>Eth324</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC12</EndDevice>
+        <EndPort>Eth236</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc00-ASIC01</StartDevice>
+        <StartPort>Eth320</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC12</EndDevice>
+        <EndPort>Eth240</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc00-ASIC02</StartDevice>
+        <StartPort>Eth320</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC12</EndDevice>
+        <EndPort>Eth244</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc00-ASIC02</StartDevice>
+        <StartPort>Eth324</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC13</EndDevice>
+        <EndPort>Eth96</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth292</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC13</EndDevice>
+        <EndPort>Eth100</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth288</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC13</EndDevice>
+        <EndPort>Eth104</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC01</StartDevice>
+        <StartPort>Eth292</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC13</EndDevice>
+        <EndPort>Eth108</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC01</StartDevice>
+        <StartPort>Eth288</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC13</EndDevice>
+        <EndPort>Eth112</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC02</StartDevice>
+        <StartPort>Eth288</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC13</EndDevice>
+        <EndPort>Eth116</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC02</StartDevice>
+        <StartPort>Eth292</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC13</EndDevice>
+        <EndPort>Eth128</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth292</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC13</EndDevice>
+        <EndPort>Eth132</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth288</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC13</EndDevice>
+        <EndPort>Eth136</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth292</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC13</EndDevice>
+        <EndPort>Eth140</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth288</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC13</EndDevice>
+        <EndPort>Eth152</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc00-ASIC02</StartDevice>
+        <StartPort>Eth288</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC13</EndDevice>
+        <EndPort>Eth156</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc00-ASIC02</StartDevice>
+        <StartPort>Eth292</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC13</EndDevice>
+        <EndPort>Eth160</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC02</StartDevice>
+        <StartPort>Eth288</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC13</EndDevice>
+        <EndPort>Eth164</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC02</StartDevice>
+        <StartPort>Eth292</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC13</EndDevice>
+        <EndPort>Eth168</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc00-ASIC00</StartDevice>
+        <StartPort>Eth292</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC13</EndDevice>
+        <EndPort>Eth172</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc00-ASIC00</StartDevice>
+        <StartPort>Eth288</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC13</EndDevice>
+        <EndPort>Eth176</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc00-ASIC01</StartDevice>
+        <StartPort>Eth292</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>200000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC13</EndDevice>
+        <EndPort>Eth180</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc00-ASIC01</StartDevice>
+        <StartPort>Eth288</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC13</EndDevice>
+        <EndPort>Eth184</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc02-ASIC00</StartDevice>
+        <StartPort>Eth228</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC13</EndDevice>
+        <EndPort>Eth188</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc02-ASIC00</StartDevice>
+        <StartPort>Eth204</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC13</EndDevice>
+        <EndPort>Eth190</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc02-ASIC01</StartDevice>
+        <StartPort>Eth224</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC13</EndDevice>
+        <EndPort>Eth192</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc02-ASIC01</StartDevice>
+        <StartPort>Eth226</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC13</EndDevice>
+        <EndPort>Eth194</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc02-ASIC00</StartDevice>
+        <StartPort>Eth224</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC13</EndDevice>
+        <EndPort>Eth196</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc02-ASIC01</StartDevice>
+        <StartPort>Eth230</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC13</EndDevice>
+        <EndPort>Eth208</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc01-ASIC00</StartDevice>
+        <StartPort>Eth228</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC13</EndDevice>
+        <EndPort>Eth212</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc01-ASIC00</StartDevice>
+        <StartPort>Eth204</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC13</EndDevice>
+        <EndPort>Eth214</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc01-ASIC01</StartDevice>
+        <StartPort>Eth224</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC13</EndDevice>
+        <EndPort>Eth216</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc02-ASIC00</StartDevice>
+        <StartPort>Eth226</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC13</EndDevice>
+        <EndPort>Eth222</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc02-ASIC01</StartDevice>
+        <StartPort>Eth228</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC13</EndDevice>
+        <EndPort>Eth232</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc01-ASIC01</StartDevice>
+        <StartPort>Eth226</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC13</EndDevice>
+        <EndPort>Eth234</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc01-ASIC00</StartDevice>
+        <StartPort>Eth224</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC13</EndDevice>
+        <EndPort>Eth236</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc01-ASIC01</StartDevice>
+        <StartPort>Eth230</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC13</EndDevice>
+        <EndPort>Eth242</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc01-ASIC01</StartDevice>
+        <StartPort>Eth228</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC13</EndDevice>
+        <EndPort>Eth244</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc01-ASIC00</StartDevice>
+        <StartPort>Eth226</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="DeviceSerialLink">
+        <ElementType>DeviceSerialLink</ElementType>
+        <Bandwidth>115200</Bandwidth>
+        <ChassisInternal>true</ChassisInternal>
+        <EndDevice>str-console-194</EndDevice>
+        <EndPort>port 27</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-sup00</StartDevice>
+        <StartPort>console</StartPort>
+        <Validate>true</Validate>
+        <TcpPortName>27</TcpPortName>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="DeviceSerialLink">
+        <ElementType>DeviceSerialLink</ElementType>
+        <Bandwidth>115200</Bandwidth>
+        <ChassisInternal>true</ChassisInternal>
+        <EndDevice>str-sonic-sup00</EndDevice>
+        <EndPort>logical0</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc00</StartDevice>
+        <StartPort>console</StartPort>
+        <Validate>true</Validate>
+        <TcpPortName>0</TcpPortName>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="DeviceSerialLink">
+        <ElementType>DeviceSerialLink</ElementType>
+        <Bandwidth>115200</Bandwidth>
+        <ChassisInternal>true</ChassisInternal>
+        <EndDevice>str-sonic-sup00</EndDevice>
+        <EndPort>logical1</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc01</StartDevice>
+        <StartPort>console</StartPort>
+        <Validate>true</Validate>
+        <TcpPortName>1</TcpPortName>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="DeviceSerialLink">
+        <ElementType>DeviceSerialLink</ElementType>
+        <Bandwidth>115200</Bandwidth>
+        <ChassisInternal>true</ChassisInternal>
+        <EndDevice>str-sonic-sup00</EndDevice>
+        <EndPort>logical2</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc02</StartDevice>
+        <StartPort>console</StartPort>
+        <Validate>true</Validate>
+        <TcpPortName>2</TcpPortName>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="DeviceSerialLink">
+        <ElementType>DeviceSerialLink</ElementType>
+        <Bandwidth>115200</Bandwidth>
+        <ChassisInternal>true</ChassisInternal>
+        <EndDevice>str-sonic-sup00</EndDevice>
+        <EndPort>logical3</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03</StartDevice>
+        <StartPort>console</StartPort>
+        <Validate>true</Validate>
+        <TcpPortName>3</TcpPortName>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="DeviceSerialLink">
+        <ElementType>DeviceSerialLink</ElementType>
+        <Bandwidth>115200</Bandwidth>
+        <ChassisInternal>true</ChassisInternal>
+        <EndDevice>str-sonic-sup00</EndDevice>
+        <EndPort>logical4</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04</StartDevice>
+        <StartPort>console</StartPort>
+        <Validate>true</Validate>
+        <TcpPortName>4</TcpPortName>
+      </DeviceLinkBase>
+    </DeviceInterfaceLinks>
+    <Devices>
+      <Device i:type="FabricAsic">
+        <ElementType>FabricAsic</ElementType>
+        <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+        </Address>
+        <AddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>::/0</a:IPPrefix>
+        </AddressV6>
+        <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
+        <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+        <AssociatedTagsStr/>
+        <ChassisInternalDevices/>
+        <ClusterName>TestbedForstr-sonic</ClusterName>
+        <DeploymentId>3</DeploymentId>
+        <DeviceLocation i:nil="true"/>
+        <HomeDatacenter>STARLab</HomeDatacenter>
+        <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+        </ManagementAddress>
+        <ManagementAddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>::/0</a:IPPrefix>
+        </ManagementAddressV6>
+        <NodeId i:nil="true"/>
+        <SerialNumber i:nil="true"/>
+        <Hostname>str-sonic-sup00-ASIC00</Hostname>
+        <HwSku>sonic-fabric-asic-sku</HwSku>
+      </Device>
+      <Device i:type="LinecardAsic">
+        <ElementType>LinecardAsic</ElementType>
+        <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>10.3.0.5/32</a:IPPrefix>
+        </Address>
+        <AddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>fc00:34::1/128</a:IPPrefix>
+        </AddressV6>
+        <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
+        <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+        <AssociatedTagsStr/>
+        <ChassisInternalDevices/>
+        <ClusterName>TestbedForstr-sonic</ClusterName>
+        <DeploymentId>3</DeploymentId>
+        <DeviceLocation i:nil="true"/>
+        <HomeDatacenter>STARLab</HomeDatacenter>
+        <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+        </ManagementAddress>
+        <ManagementAddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>::/0</a:IPPrefix>
+        </ManagementAddressV6>
+        <NodeId i:nil="true"/>
+        <SerialNumber i:nil="true"/>
+        <Hostname>str-sonic-lc04-ASIC00</Hostname>
+        <HwSku>sonic-lc-asic</HwSku>
+      </Device>
+      <Device i:type="LinecardAsic">
+        <ElementType>LinecardAsic</ElementType>
+        <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>10.3.0.5/32</a:IPPrefix>
+        </Address>
+        <AddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>fc00:34::1/128</a:IPPrefix>
+        </AddressV6>
+        <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
+        <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+        <AssociatedTagsStr/>
+        <ChassisInternalDevices/>
+        <ClusterName>TestbedForstr-sonic</ClusterName>
+        <DeploymentId>3</DeploymentId>
+        <DeviceLocation i:nil="true"/>
+        <HomeDatacenter>STARLab</HomeDatacenter>
+        <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+        </ManagementAddress>
+        <ManagementAddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>::/0</a:IPPrefix>
+        </ManagementAddressV6>
+        <NodeId i:nil="true"/>
+        <SerialNumber i:nil="true"/>
+        <Hostname>str-sonic-lc04-ASIC01</Hostname>
+        <HwSku>sonic-lc-asic</HwSku>
+      </Device>
+      <Device i:type="LinecardAsic">
+        <ElementType>LinecardAsic</ElementType>
+        <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>10.3.0.5/32</a:IPPrefix>
+        </Address>
+        <AddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>fc00:34::1/128</a:IPPrefix>
+        </AddressV6>
+        <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
+        <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+        <AssociatedTagsStr/>
+        <ChassisInternalDevices/>
+        <ClusterName>TestbedForstr-sonic</ClusterName>
+        <DeploymentId>3</DeploymentId>
+        <DeviceLocation i:nil="true"/>
+        <HomeDatacenter>STARLab</HomeDatacenter>
+        <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+        </ManagementAddress>
+        <ManagementAddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>::/0</a:IPPrefix>
+        </ManagementAddressV6>
+        <NodeId i:nil="true"/>
+        <SerialNumber i:nil="true"/>
+        <Hostname>str-sonic-lc04-ASIC02</Hostname>
+        <HwSku>sonic-lc-asic</HwSku>
+      </Device>
+      <Device i:type="LinecardAsic">
+        <ElementType>LinecardAsic</ElementType>
+        <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>10.3.0.4/32</a:IPPrefix>
+        </Address>
+        <AddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>fc00:33::1/128</a:IPPrefix>
+        </AddressV6>
+        <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
+        <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+        <AssociatedTagsStr/>
+        <ChassisInternalDevices/>
+        <ClusterName>TestbedForstr-sonic</ClusterName>
+        <DeploymentId>3</DeploymentId>
+        <DeviceLocation i:nil="true"/>
+        <HomeDatacenter>STARLab</HomeDatacenter>
+        <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+        </ManagementAddress>
+        <ManagementAddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>::/0</a:IPPrefix>
+        </ManagementAddressV6>
+        <NodeId i:nil="true"/>
+        <SerialNumber i:nil="true"/>
+        <Hostname>str-sonic-lc03-ASIC00</Hostname>
+        <HwSku>sonic-lc-asic</HwSku>
+      </Device>
+      <Device i:type="LinecardAsic">
+        <ElementType>LinecardAsic</ElementType>
+        <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>10.3.0.4/32</a:IPPrefix>
+        </Address>
+        <AddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>fc00:33::1/128</a:IPPrefix>
+        </AddressV6>
+        <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
+        <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+        <AssociatedTagsStr/>
+        <ChassisInternalDevices/>
+        <ClusterName>TestbedForstr-sonic</ClusterName>
+        <DeploymentId>3</DeploymentId>
+        <DeviceLocation i:nil="true"/>
+        <HomeDatacenter>STARLab</HomeDatacenter>
+        <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+        </ManagementAddress>
+        <ManagementAddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>::/0</a:IPPrefix>
+        </ManagementAddressV6>
+        <NodeId i:nil="true"/>
+        <SerialNumber i:nil="true"/>
+        <Hostname>str-sonic-lc03-ASIC01</Hostname>
+        <HwSku>sonic-lc-asic</HwSku>
+      </Device>
+      <Device i:type="LinecardAsic">
+        <ElementType>LinecardAsic</ElementType>
+        <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>10.3.0.3/32</a:IPPrefix>
+        </Address>
+        <AddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>fc00:32::1/128</a:IPPrefix>
+        </AddressV6>
+        <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
+        <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+        <AssociatedTagsStr/>
+        <ChassisInternalDevices/>
+        <ClusterName>TestbedForstr-sonic</ClusterName>
+        <DeploymentId>3</DeploymentId>
+        <DeviceLocation i:nil="true"/>
+        <HomeDatacenter>STARLab</HomeDatacenter>
+        <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+        </ManagementAddress>
+        <ManagementAddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>::/0</a:IPPrefix>
+        </ManagementAddressV6>
+        <NodeId i:nil="true"/>
+        <SerialNumber i:nil="true"/>
+        <Hostname>str-sonic-lc02-ASIC01</Hostname>
+        <HwSku>sonic-lc-asic</HwSku>
+      </Device>
+      <Device i:type="LinecardAsic">
+        <ElementType>LinecardAsic</ElementType>
+        <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>10.3.0.3/32</a:IPPrefix>
+        </Address>
+        <AddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>fc00:32::1/128</a:IPPrefix>
+        </AddressV6>
+        <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
+        <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+        <AssociatedTagsStr/>
+        <ChassisInternalDevices/>
+        <ClusterName>TestbedForstr-sonic</ClusterName>
+        <DeploymentId>3</DeploymentId>
+        <DeviceLocation i:nil="true"/>
+        <HomeDatacenter>STARLab</HomeDatacenter>
+        <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+        </ManagementAddress>
+        <ManagementAddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>::/0</a:IPPrefix>
+        </ManagementAddressV6>
+        <NodeId i:nil="true"/>
+        <SerialNumber i:nil="true"/>
+        <Hostname>str-sonic-lc02-ASIC00</Hostname>
+        <HwSku>sonic-lc-asic</HwSku>
+      </Device>
+      <Device i:type="LinecardAsic">
+        <ElementType>LinecardAsic</ElementType>
+        <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>10.3.0.4/32</a:IPPrefix>
+        </Address>
+        <AddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>fc00:33::1/128</a:IPPrefix>
+        </AddressV6>
+        <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
+        <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+        <AssociatedTagsStr/>
+        <ChassisInternalDevices/>
+        <ClusterName>TestbedForstr-sonic</ClusterName>
+        <DeploymentId>3</DeploymentId>
+        <DeviceLocation i:nil="true"/>
+        <HomeDatacenter>STARLab</HomeDatacenter>
+        <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+        </ManagementAddress>
+        <ManagementAddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>::/0</a:IPPrefix>
+        </ManagementAddressV6>
+        <NodeId i:nil="true"/>
+        <SerialNumber i:nil="true"/>
+        <Hostname>str-sonic-lc03-ASIC02</Hostname>
+        <HwSku>sonic-lc-asic</HwSku>
+      </Device>
+      <Device i:type="LinecardAsic">
+        <ElementType>LinecardAsic</ElementType>
+        <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>10.3.0.2/32</a:IPPrefix>
+        </Address>
+        <AddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>fc00:31::1/128</a:IPPrefix>
+        </AddressV6>
+        <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
+        <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+        <AssociatedTagsStr/>
+        <ChassisInternalDevices/>
+        <ClusterName>TestbedForstr-sonic</ClusterName>
+        <DeploymentId>3</DeploymentId>
+        <DeviceLocation i:nil="true"/>
+        <HomeDatacenter>STARLab</HomeDatacenter>
+        <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+        </ManagementAddress>
+        <ManagementAddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>::/0</a:IPPrefix>
+        </ManagementAddressV6>
+        <NodeId i:nil="true"/>
+        <SerialNumber i:nil="true"/>
+        <Hostname>str-sonic-lc01-ASIC00</Hostname>
+        <HwSku>sonic-lc-asic</HwSku>
+      </Device>
+      <Device i:type="LinecardAsic">
+        <ElementType>LinecardAsic</ElementType>
+        <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>10.3.0.2/32</a:IPPrefix>
+        </Address>
+        <AddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>fc00:31::1/128</a:IPPrefix>
+        </AddressV6>
+        <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
+        <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+        <AssociatedTagsStr/>
+        <ChassisInternalDevices/>
+        <ClusterName>TestbedForstr-sonic</ClusterName>
+        <DeploymentId>3</DeploymentId>
+        <DeviceLocation i:nil="true"/>
+        <HomeDatacenter>STARLab</HomeDatacenter>
+        <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+        </ManagementAddress>
+        <ManagementAddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>::/0</a:IPPrefix>
+        </ManagementAddressV6>
+        <NodeId i:nil="true"/>
+        <SerialNumber i:nil="true"/>
+        <Hostname>str-sonic-lc01-ASIC01</Hostname>
+        <HwSku>sonic-lc-asic</HwSku>
+      </Device>
+      <Device i:type="LinecardAsic">
+        <ElementType>LinecardAsic</ElementType>
+        <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>10.3.0.1/32</a:IPPrefix>
+        </Address>
+        <AddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>fc00:30::1/128</a:IPPrefix>
+        </AddressV6>
+        <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
+        <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+        <AssociatedTagsStr/>
+        <ChassisInternalDevices/>
+        <ClusterName>TestbedForstr-sonic</ClusterName>
+        <DeploymentId>3</DeploymentId>
+        <DeviceLocation i:nil="true"/>
+        <HomeDatacenter>STARLab</HomeDatacenter>
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+          <a:IPPrefix>10.3.0.5/32</a:IPPrefix>
+        </Address>
+        <AddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>fc00:34::1/128</a:IPPrefix>
+        </AddressV6>
+        <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
+        <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+        <AssociatedTagsStr/>
+        <ChassisInternalDevices/>
+        <ClusterName>TestbedForstr-sonic</ClusterName>
+        <DeploymentId>3</DeploymentId>
+        <DeviceLocation i:nil="true"/>
+        <HomeDatacenter>STARLab</HomeDatacenter>
+        <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>10.3.146.214/24</a:IPPrefix>
+        </ManagementAddress>
+        <ManagementAddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>2a01:111:e210:3000::a03:92d6/64</a:IPPrefix>
+        </ManagementAddressV6>
+        <NodeId i:nil="true"/>
+        <SerialNumber i:nil="true"/>
+        <Hostname>str-sonic-lc04</Hostname>
+        <HwSku>sonic-400g-lc-sku</HwSku>
+      </Device>
+      <Device i:type="SpineRouter">
+        <ElementType>SpineRouter</ElementType>
+        <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>10.3.0.5/32</a:IPPrefix>
+        </Address>
+        <AddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>fc00:34::1/128</a:IPPrefix>
+        </AddressV6>
+        <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
+        <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+        <AssociatedTagsStr>None</AssociatedTagsStr>
+        <ChassisInternalDevices/>
+        <ClusterName>TestbedForstr-sonic</ClusterName>
+        <DeploymentId>3</DeploymentId>
+        <DeviceLocation i:nil="true"/>
+        <HomeDatacenter>STARLab</HomeDatacenter>
+        <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>10.3.146.198/24</a:IPPrefix>
+        </ManagementAddress>
+        <ManagementAddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>2a01:111:e210:3000::a03:92c6/64</a:IPPrefix>
+        </ManagementAddressV6>
+        <NodeId i:nil="true"/>
+        <SerialNumber i:nil="true"/>
+        <Hostname>str-sonic</Hostname>
+        <HwSku>Sonic-packet-chassis-sku</HwSku>
+        <Index>0</Index>
+      </Device>
+    </Devices>
+  </PngDec>
+  <Hostname>str-sonic-sup00</Hostname>
+  <HwSku>sonic-sup-sku</HwSku>
+  <Version>1.0.1388.35303&#xD;
+</Version>
+</DeviceMiniGraph>
diff --git a/src/sonic-config-engine/tests/chassis_data/voq_chassis_data/system_ports.json b/src/sonic-config-engine/tests/chassis_data/voq_chassis_data/system_ports.json
new file mode 100644
index 000000000..0cb7e777b
--- /dev/null
+++ b/src/sonic-config-engine/tests/chassis_data/voq_chassis_data/system_ports.json
@@ -0,0 +1,3170 @@
+{
+    "str-sonic-lc03|ASIC0|Ethernet0": {
+        "system_port_id": 1,
+        "switch_id": 8,
+        "core_index": "1",
+        "core_port_index": "1",
+        "speed": "400000",
+        "num_voq": "8"
+    },
+    "str-sonic-lc03|ASIC0|Ethernet8": {
+        "system_port_id": 2,
+        "switch_id": 8,
+        "core_index": "1",
+        "core_port_index": "2",
+        "speed": "400000",
+        "num_voq": "8"
+    },
+    "str-sonic-lc03|ASIC0|Ethernet16": {
+        "system_port_id": 3,
+        "switch_id": 8,
+        "core_index": "1",
+        "core_port_index": "3",
+        "speed": "400000",
+        "num_voq": "8"
+    },
+    "str-sonic-lc03|ASIC0|Ethernet24": {
+        "system_port_id": 4,
+        "switch_id": 8,
+        "core_index": "1",
+        "core_port_index": "4",
+        "speed": "400000",
+        "num_voq": "8"
+    },
+    "str-sonic-lc03|ASIC0|Ethernet32": {
+        "system_port_id": 5,
+        "switch_id": 8,
+        "core_index": "1",
+        "core_port_index": "5",
+        "speed": "400000",
+        "num_voq": "8"
+    },
+    "str-sonic-lc03|ASIC0|Ethernet40": {
+        "system_port_id": 6,
+        "switch_id": 8,
+        "core_index": "1",
+        "core_port_index": "6",
+        "speed": "400000",
+        "num_voq": "8"
+    },
+    "str-sonic-lc03|ASIC0|Ethernet48": {
+        "system_port_id": 7,
+        "switch_id": 8,
+        "core_index": "1",
+        "core_port_index": "7",
+        "speed": "400000",
+        "num_voq": "8"
+    },
+    "str-sonic-lc03|ASIC0|Ethernet56": {
+        "system_port_id": 8,
+        "switch_id": 8,
+        "core_index": "1",
+        "core_port_index": "8",
+        "speed": "400000",
+        "num_voq": "8"
+    },
+    "str-sonic-lc03|ASIC0|Ethernet64": {
+        "system_port_id": 9,
+        "switch_id": 8,
+        "core_index": "1",
+        "core_port_index": "9",
+        "speed": "400000",
+        "num_voq": "8"
+    },
+    "str-sonic-lc03|ASIC0|Ethernet72": {
+        "system_port_id": 10,
+        "switch_id": 8,
+        "core_index": "0",
+        "core_port_index": "10",
+        "speed": "400000",
+        "num_voq": "8"
+    },
+    "str-sonic-lc03|ASIC0|Ethernet80": {
+        "system_port_id": 11,
+        "switch_id": 8,
+        "core_index": "0",
+        "core_port_index": "11",
+        "speed": "400000",
+        "num_voq": "8"
+    },
+    "str-sonic-lc03|ASIC0|Ethernet88": {
+        "system_port_id": 12,
+        "switch_id": 8,
+        "core_index": "0",
+        "core_port_index": "12",
+        "speed": "400000",
+        "num_voq": "8"
+    },
+    "str-sonic-lc03|ASIC0|Ethernet96": {
+        "system_port_id": 13,
+        "switch_id": 8,
+        "core_index": "0",
+        "core_port_index": "13",
+        "speed": "400000",
+        "num_voq": "8"
+    },
+    "str-sonic-lc03|ASIC0|Ethernet104": {
+        "system_port_id": 14,
+        "switch_id": 8,
+        "core_index": "0",
+        "core_port_index": "14",
+        "speed": "400000",
+        "num_voq": "8"
+    },
+    "str-sonic-lc03|ASIC0|Ethernet112": {
+        "system_port_id": 15,
+        "switch_id": 8,
+        "core_index": "0",
+        "core_port_index": "15",
+        "speed": "400000",
+        "num_voq": "8"
+    },
+    "str-sonic-lc03|ASIC0|Ethernet120": {
+        "system_port_id": 16,
+        "switch_id": 8,
+        "core_index": "0",
+        "core_port_index": "16",
+        "speed": "400000",
+        "num_voq": "8"
+    },
+    "str-sonic-lc03|ASIC0|Ethernet128": {
+        "system_port_id": 17,
+        "switch_id": 8,
+        "core_index": "0",
+        "core_port_index": "17",
+        "speed": "400000",
+        "num_voq": "8"
+    },
+    "str-sonic-lc03|ASIC0|Ethernet136": {
+        "system_port_id": 18,
+        "switch_id": 8,
+        "core_index": "0",
+        "core_port_index": "18",
+        "speed": "400000",
+        "num_voq": "8"
+    },
+    "str-sonic-lc03|ASIC1|Ethernet144": {
+        "system_port_id": 19,
+        "switch_id": 10,
+        "core_index": "1",
+        "core_port_index": "1",
+        "speed": "400000",
+        "num_voq": "8"
+    },
+    "str-sonic-lc03|ASIC1|Ethernet152": {
+        "system_port_id": 20,
+        "switch_id": 10,
+        "core_index": "1",
+        "core_port_index": "2",
+        "speed": "400000",
+        "num_voq": "8"
+    },
+    "str-sonic-lc03|ASIC1|Ethernet160": {
+        "system_port_id": 21,
+        "switch_id": 10,
+        "core_index": "1",
+        "core_port_index": "3",
+        "speed": "400000",
+        "num_voq": "8"
+    },
+    "str-sonic-lc03|ASIC1|Ethernet168": {
+        "system_port_id": 22,
+        "switch_id": 10,
+        "core_index": "1",
+        "core_port_index": "4",
+        "speed": "400000",
+        "num_voq": "8"
+    },
+    "str-sonic-lc03|ASIC1|Ethernet176": {
+        "system_port_id": 23,
+        "switch_id": 10,
+        "core_index": "1",
+        "core_port_index": "5",
+        "speed": "400000",
+        "num_voq": "8"
+    },
+    "str-sonic-lc03|ASIC1|Ethernet184": {
+        "system_port_id": 24,
+        "switch_id": 10,
+        "core_index": "1",
+        "core_port_index": "6",
+        "speed": "400000",
+        "num_voq": "8"
+    },
+    "str-sonic-lc03|ASIC1|Ethernet192": {
+        "system_port_id": 25,
+        "switch_id": 10,
+        "core_index": "1",
+        "core_port_index": "7",
+        "speed": "400000",
+        "num_voq": "8"
+    },
+    "str-sonic-lc03|ASIC1|Ethernet200": {
+        "system_port_id": 26,
+        "switch_id": 10,
+        "core_index": "1",
+        "core_port_index": "8",
+        "speed": "400000",
+        "num_voq": "8"
+    },
+    "str-sonic-lc03|ASIC1|Ethernet208": {
+        "system_port_id": 27,
+        "switch_id": 10,
+        "core_index": "1",
+        "core_port_index": "9",
+        "speed": "400000",
+        "num_voq": "8"
+    },
+    "str-sonic-lc03|ASIC1|Ethernet216": {
+        "system_port_id": 28,
+        "switch_id": 10,
+        "core_index": "0",
+        "core_port_index": "10",
+        "speed": "400000",
+        "num_voq": "8"
+    },
+    "str-sonic-lc03|ASIC1|Ethernet224": {
+        "system_port_id": 29,
+        "switch_id": 10,
+        "core_index": "0",
+        "core_port_index": "11",
+        "speed": "400000",
+        "num_voq": "8"
+    },
+    "str-sonic-lc03|ASIC1|Ethernet232": {
+        "system_port_id": 30,
+        "switch_id": 10,
+        "core_index": "0",
+        "core_port_index": "12",
+        "speed": "400000",
+        "num_voq": "8"
+    },
+    "str-sonic-lc03|ASIC1|Ethernet240": {
+        "system_port_id": 31,
+        "switch_id": 10,
+        "core_index": "0",
+        "core_port_index": "13",
+        "speed": "400000",
+        "num_voq": "8"
+    },
+    "str-sonic-lc03|ASIC1|Ethernet248": {
+        "system_port_id": 32,
+        "switch_id": 10,
+        "core_index": "0",
+        "core_port_index": "14",
+        "speed": "400000",
+        "num_voq": "8"
+    },
+    "str-sonic-lc03|ASIC1|Ethernet256": {
+        "system_port_id": 33,
+        "switch_id": 10,
+        "core_index": "0",
+        "core_port_index": "15",
+        "speed": "400000",
+        "num_voq": "8"
+    },
+    "str-sonic-lc03|ASIC1|Ethernet264": {
+        "system_port_id": 34,
+        "switch_id": 10,
+        "core_index": "0",
+        "core_port_index": "16",
+        "speed": "400000",
+        "num_voq": "8"
+    },
+    "str-sonic-lc03|ASIC1|Ethernet272": {
+        "system_port_id": 35,
+        "switch_id": 10,
+        "core_index": "0",
+        "core_port_index": "17",
+        "speed": "400000",
+        "num_voq": "8"
+    },
+    "str-sonic-lc03|ASIC1|Ethernet280": {
+        "system_port_id": 36,
+        "switch_id": 10,
+        "core_index": "0",
+        "core_port_index": "18",
+        "speed": "400000",
+        "num_voq": "8"
+    },
+    "str-sonic-lc03|ASIC0|cpu0": {
+        "system_port_id": 37,
+        "switch_id": 8,
+        "core_index": 0,
+        "core_port_index": 0,
+        "speed": "10000",
+        "num_voq": "8"
+    },
+    "str-sonic-lc03|ASIC1|cpu1": {
+        "system_port_id": 38,
+        "switch_id": 10,
+        "core_index": 0,
+        "core_port_index": 0,
+        "speed": "10000",
+        "num_voq": "8"
+    },
+    "str-sonic-lc03|ASIC0|Ethernet-Rec0": {
+        "system_port_id": 39,
+        "switch_id": 8,
+        "core_index": "0",
+        "core_port_index": "49",
+        "speed": "400000",
+        "num_voq": "8"
+    },
+    "str-sonic-lc03|ASIC1|Ethernet-Rec1": {
+        "system_port_id": 40,
+        "switch_id": 10,
+        "core_index": "0",
+        "core_port_index": "49",
+        "speed": "400000",
+        "num_voq": "8"
+    },
+    "str-sonic-lc03|ASIC0|Ethernet-IB0": {
+        "system_port_id": 41,
+        "switch_id": 8,
+        "core_index": "1",
+        "core_port_index": "50",
+        "speed": "400000",
+        "num_voq": "8"
+    },
+    "str-sonic-lc03|ASIC1|Ethernet-IB1": {
+        "system_port_id": 42,
+        "switch_id": 10,
+        "core_index": "1",
+        "core_port_index": "50",
+        "speed": "400000",
+        "num_voq": "8"
+    },
+    "str-sonic-lc04|ASIC0|Ethernet0": {
+        "system_port_id": 43,
+        "switch_id": 12,
+        "core_index": "0",
+        "core_port_index": "1",
+        "speed": "100000",
+        "num_voq": "8"
+    },
+    "str-sonic-lc04|ASIC0|Ethernet4": {
+        "system_port_id": 44,
+        "switch_id": 12,
+        "core_index": "0",
+        "core_port_index": "2",
+        "speed": "100000",
+        "num_voq": "8"
+    },
+    "str-sonic-lc04|ASIC0|Ethernet8": {
+        "system_port_id": 45,
+        "switch_id": 12,
+        "core_index": "0",
+        "core_port_index": "3",
+        "speed": "100000",
+        "num_voq": "8"
+    },
+    "str-sonic-lc04|ASIC0|Ethernet12": {
+        "system_port_id": 46,
+        "switch_id": 12,
+        "core_index": "0",
+        "core_port_index": "4",
+        "speed": "100000",
+        "num_voq": "8"
+    },
+    "str-sonic-lc04|ASIC0|Ethernet16": {
+        "system_port_id": 47,
+        "switch_id": 12,
+        "core_index": "0",
+        "core_port_index": "5",
+        "speed": "100000",
+        "num_voq": "8"
+    },
+    "str-sonic-lc04|ASIC0|Ethernet20": {
+        "system_port_id": 48,
+        "switch_id": 12,
+        "core_index": "0",
+        "core_port_index": "6",
+        "speed": "100000",
+        "num_voq": "8"
+    },
+    "str-sonic-lc04|ASIC0|Ethernet24": {
+        "system_port_id": 49,
+        "switch_id": 12,
+        "core_index": "0",
+        "core_port_index": "7",
+        "speed": "100000",
+        "num_voq": "8"
+    },
+    "str-sonic-lc04|ASIC0|Ethernet28": {
+        "system_port_id": 50,
+        "switch_id": 12,
+        "core_index": "0",
+        "core_port_index": "8",
+        "speed": "100000",
+        "num_voq": "8"
+    },
+    "str-sonic-lc04|ASIC0|Ethernet32": {
+        "system_port_id": 51,
+        "switch_id": 12,
+        "core_index": "0",
+        "core_port_index": "9",
+        "speed": "100000",
+        "num_voq": "8"
+    },
+    "str-sonic-lc04|ASIC0|Ethernet36": {
+        "system_port_id": 52,
+        "switch_id": 12,
+        "core_index": "0",
+        "core_port_index": "10",
+        "speed": "100000",
+        "num_voq": "8"
+    },
+    "str-sonic-lc04|ASIC0|Ethernet40": {
+        "system_port_id": 53,
+        "switch_id": 12,
+        "core_index": "0",
+        "core_port_index": "11",
+        "speed": "100000",
+        "num_voq": "8"
+    },
+    "str-sonic-lc04|ASIC0|Ethernet44": {
+        "system_port_id": 54,
+        "switch_id": 12,
+        "core_index": "0",
+        "core_port_index": "12",
+        "speed": "100000",
+        "num_voq": "8"
+    },
+    "str-sonic-lc04|ASIC0|Ethernet48": {
+        "system_port_id": 55,
+        "switch_id": 12,
+        "core_index": "0",
+        "core_port_index": "13",
+        "speed": "100000",
+        "num_voq": "8"
+    },
+    "str-sonic-lc04|ASIC0|Ethernet52": {
+        "system_port_id": 56,
+        "switch_id": 12,
+        "core_index": "0",
+        "core_port_index": "14",
+        "speed": "100000",
+        "num_voq": "8"
+    },
+    "str-sonic-lc04|ASIC0|Ethernet56": {
+        "system_port_id": 57,
+        "switch_id": 12,
+        "core_index": "0",
+        "core_port_index": "15",
+        "speed": "100000",
+        "num_voq": "8"
+    },
+    "str-sonic-lc04|ASIC0|Ethernet60": {
+        "system_port_id": 58,
+        "switch_id": 12,
+        "core_index": "0",
+        "core_port_index": "16",
+        "speed": "100000",
+        "num_voq": "8"
+    },
+    "str-sonic-lc04|ASIC0|Ethernet64": {
+        "system_port_id": 59,
+        "switch_id": 12,
+        "core_index": "0",
+        "core_port_index": "17",
+        "speed": "100000",
+        "num_voq": "8"
+    },
+    "str-sonic-lc04|ASIC0|Ethernet68": {
+        "system_port_id": 60,
+        "switch_id": 12,
+        "core_index": "0",
+        "core_port_index": "18",
+        "speed": "100000",
+        "num_voq": "8"
+    },
+    "str-sonic-lc04|ASIC0|Ethernet72": {
+        "system_port_id": 61,
+        "switch_id": 12,
+        "core_index": "0",
+        "core_port_index": "19",
+        "speed": "100000",
+        "num_voq": "8"
+    },
+    "str-sonic-lc04|ASIC0|Ethernet76": {
+        "system_port_id": 62,
+        "switch_id": 12,
+        "core_index": "0",
+        "core_port_index": "20",
+        "speed": "100000",
+        "num_voq": "8"
+    },
+    "str-sonic-lc04|ASIC0|Ethernet80": {
+        "system_port_id": 63,
+        "switch_id": 12,
+        "core_index": "0",
+        "core_port_index": "21",
+        "speed": "100000",
+        "num_voq": "8"
+    },
+    "str-sonic-lc04|ASIC0|Ethernet84": {
+        "system_port_id": 64,
+        "switch_id": 12,
+        "core_index": "0",
+        "core_port_index": "22",
+        "speed": "100000",
+        "num_voq": "8"
+    },
+    "str-sonic-lc04|ASIC0|Ethernet88": {
+        "system_port_id": 65,
+        "switch_id": 12,
+        "core_index": "0",
+        "core_port_index": "23",
+        "speed": "100000",
+        "num_voq": "8"
+    },
+    "str-sonic-lc04|ASIC0|Ethernet92": {
+        "system_port_id": 66,
+        "switch_id": 12,
+        "core_index": "0",
+        "core_port_index": "24",
+        "speed": "100000",
+        "num_voq": "8"
+    },
+    "str-sonic-lc04|ASIC0|Ethernet96": {
+        "system_port_id": 67,
+        "switch_id": 12,
+        "core_index": "1",
+        "core_port_index": "25",
+        "speed": "100000",
+        "num_voq": "8"
+    },
+    "str-sonic-lc04|ASIC0|Ethernet100": {
+        "system_port_id": 68,
+        "switch_id": 12,
+        "core_index": "1",
+        "core_port_index": "26",
+        "speed": "100000",
+        "num_voq": "8"
+    },
+    "str-sonic-lc04|ASIC0|Ethernet104": {
+        "system_port_id": 69,
+        "switch_id": 12,
+        "core_index": "1",
+        "core_port_index": "27",
+        "speed": "100000",
+        "num_voq": "8"
+    },
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+        "speed": "10000",
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+        "speed": "400000",
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+        "speed": "100000",
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+        "speed": "100000",
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+        "speed": "100000",
+        "num_voq": "8"
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+        "speed": "100000",
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+        "switch_id": 20,
+        "core_index": "0",
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+        "num_voq": "8"
+    },
+    "str-sonic-lc10|ASIC0|Ethernet188": {
+        "system_port_id": 393,
+        "switch_id": 36,
+        "core_index": "1",
+        "core_port_index": "48",
+        "speed": "100000",
+        "num_voq": "8"
+    },
+    "str-sonic-lc10|ASIC0|cpu0": {
+        "system_port_id": 394,
+        "switch_id": 36,
+        "core_index": 0,
+        "core_port_index": 0,
+        "speed": "10000",
+        "num_voq": "8"
+    },
+    "str-sonic-lc10|ASIC0|Ethernet-Rec0": {
+        "system_port_id": 395,
+        "switch_id": 36,
+        "core_index": "0",
+        "core_port_index": "49",
+        "speed": "400000",
+        "num_voq": "8"
+    },
+    "str-sonic-lc10|ASIC0|Ethernet-IB0": {
+        "system_port_id": 396,
+        "switch_id": 36,
+        "core_index": "1",
+        "core_port_index": "50",
+        "speed": "400000",
+        "num_voq": "8"
+    }
+}
diff --git a/src/sonic-config-engine/tests/chassis_data/voq_chassis_data/voq-sample-port-config-1.ini b/src/sonic-config-engine/tests/chassis_data/voq_chassis_data/voq-sample-port-config-1.ini
new file mode 100644
index 000000000..0accaf107
--- /dev/null
+++ b/src/sonic-config-engine/tests/chassis_data/voq_chassis_data/voq-sample-port-config-1.ini
@@ -0,0 +1,51 @@
+# name              lanes     alias               index  role   speed    asic_port_name     core_id     core_port_id     num_voq
+Ethernet0           6,7       Ethernet1/1         1      Ext   100000    Eth0               0          1              8
+Ethernet4           2,3       Ethernet2/1         2      Ext   100000    Eth4               0          2              8
+Ethernet8           4,5       Ethernet3/1         3      Ext   100000    Eth8               0          3              8
+Ethernet12          0,1       Ethernet4/1         4      Ext   100000    Eth12              0          4              8
+Ethernet16          14,15     Ethernet5/1         5      Ext   100000    Eth16              0          5              8
+Ethernet20          10,11     Ethernet6/1         6      Ext   100000    Eth20              0          6              8
+Ethernet24          12,13     Ethernet7/1         7      Ext   100000    Eth24              0          7              8
+Ethernet28          8,9       Ethernet8/1         8      Ext   100000    Eth28              0          8              8
+Ethernet32          22,23     Ethernet9/1         9      Ext   100000    Eth32              0          9              8
+Ethernet36          18,19     Ethernet10/1        10     Ext   100000    Eth36              0          10             8
+Ethernet40          20,21     Ethernet11/1        11     Ext   100000    Eth40              0          11             8
+Ethernet44          16,17     Ethernet12/1        12     Ext   100000    Eth44              0          12             8
+Ethernet48          30,31     Ethernet13/1        13     Ext   100000    Eth48              0          13             8
+Ethernet52          26,27     Ethernet14/1        14     Ext   100000    Eth52              0          14             8
+Ethernet56          28,29     Ethernet15/1        15     Ext   100000    Eth56              0          15             8
+Ethernet60          24,25     Ethernet16/1        16     Ext   100000    Eth60              0          16             8
+Ethernet64          38,39     Ethernet17/1        17     Ext   100000    Eth64              0          17             8
+Ethernet68          34,35     Ethernet18/1        18     Ext   100000    Eth68              0          18             8
+Ethernet72          36,37     Ethernet19/1        19     Ext   100000    Eth72              0          19             8
+Ethernet76          32,33     Ethernet20/1        20     Ext   100000    Eth76              0          20             8
+Ethernet80          46,47     Ethernet21/1        21     Ext   100000    Eth80              0          21             8
+Ethernet84          42,43     Ethernet22/1        22     Ext   100000    Eth84              0          22             8
+Ethernet88          44,45     Ethernet23/1        23     Ext   100000    Eth88              0          23             8
+Ethernet92          40,41     Ethernet24/1        24     Ext   100000    Eth92              0          24             8
+Ethernet96          94,95     Ethernet25/1        25     Ext   100000    Eth96              1          25             8
+Ethernet100         90,91     Ethernet26/1        26     Ext   100000    Eth100             1          26             8
+Ethernet104         92,93     Ethernet27/1        27     Ext   100000    Eth104             1          27             8
+Ethernet108         88,89     Ethernet28/1        28     Ext   100000    Eth108             1          28             8
+Ethernet112         86,87     Ethernet29/1        29     Ext   100000    Eth112             1          29             8
+Ethernet116         82,83     Ethernet30/1        30     Ext   100000    Eth116             1          30             8
+Ethernet120         84,85     Ethernet31/1        31     Ext   100000    Eth120             1          31             8
+Ethernet124         80,81     Ethernet32/1        32     Ext   100000    Eth124             1          32             8
+Ethernet128         78,79     Ethernet33/1        33     Ext   100000    Eth128             1          33             8
+Ethernet132         74,75     Ethernet34/1        34     Ext   100000    Eth132             1          34             8
+Ethernet136         76,77     Ethernet35/1        35     Ext   100000    Eth136             1          35             8
+Ethernet140         72,73     Ethernet36/1        36     Ext   100000    Eth140             1          36             8
+Ethernet144         70,71     Ethernet37/1        37     Ext   100000    Eth144             1          37             8
+Ethernet148         66,67     Ethernet38/1        38     Ext   100000    Eth148             1          38             8
+Ethernet152         68,69     Ethernet39/1        39     Ext   100000    Eth152             1          39             8
+Ethernet156         64,65     Ethernet40/1        40     Ext   100000    Eth156             1          40             8
+Ethernet160         62,63     Ethernet41/1        41     Ext   100000    Eth160             1          41             8
+Ethernet164         58,59     Ethernet42/1        42     Ext   100000    Eth164             1          42             8
+Ethernet168         60,61     Ethernet43/1        43     Ext   100000    Eth168             1          43             8
+Ethernet172         56,57     Ethernet44/1        44     Ext   100000    Eth172             1          44             8
+Ethernet176         54,55     Ethernet45/1        45     Ext   100000    Eth176             1          45             8
+Ethernet180         50,51     Ethernet46/1        46     Ext   100000    Eth180             1          46             8
+Ethernet184         52,53     Ethernet47/1        47     Ext   100000    Eth184             1          47             8
+Ethernet188         48,49     Ethernet48/1        48     Ext   100000    Eth188             1          48             8
+Ethernet-Rec0       249       Recirc0/0           51     Rec   400000    Rcy0               0          49             8
+Ethernet-IB0        250       Recirc0/1           52     Inb   400000    Rcy1               1          50             8
\ No newline at end of file
diff --git a/src/sonic-config-engine/tests/chassis_data/voq_chassis_data/voq-sample-port-config-2.ini b/src/sonic-config-engine/tests/chassis_data/voq_chassis_data/voq-sample-port-config-2.ini
new file mode 100644
index 000000000..223eb915a
--- /dev/null
+++ b/src/sonic-config-engine/tests/chassis_data/voq_chassis_data/voq-sample-port-config-2.ini
@@ -0,0 +1,21 @@
+# name         lanes                             alias        index  role       speed       asic_port_name     core_id      core_port_id      num_voq
+Ethernet0      72,73,74,75,76,77,78,79           Ethernet1/1  1      Ext        400000      Eth0               1           1               8
+Ethernet8      80,81,82,83,84,85,86,87           Ethernet2/1  2      Ext        400000      Eth8               1           2               8
+Ethernet16     88,89,90,91,92,93,94,95           Ethernet3/1  3      Ext        400000      Eth16              1           3               8
+Ethernet24     96,97,98,99,100,101,102,103       Ethernet4/1  4      Ext        400000      Eth24              1           4               8
+Ethernet32     104,105,106,107,108,109,110,111   Ethernet5/1  5      Ext        400000      Eth32              1           5               8
+Ethernet40     112,113,114,115,116,117,118,119   Ethernet6/1  6      Ext        400000      Eth40              1           6               8
+Ethernet48     120,121,122,123,124,125,126,127   Ethernet7/1  7      Ext        400000      Eth48              1           7               8
+Ethernet56     128,129,130,131,132,133,134,135   Ethernet8/1  8      Ext        400000      Eth56              1           8               8
+Ethernet64     136,137,138,139,140,141,142,143   Ethernet9/1  9      Ext        400000      Eth64              1           9               8
+Ethernet72     64,65,66,67,68,69,70,71           Ethernet10/1 10     Ext        400000      Eth72              0           10              8
+Ethernet80     56,57,58,59,60,61,62,63           Ethernet11/1 11     Ext        400000      Eth80              0           11              8
+Ethernet88     48,49,50,51,52,53,54,55           Ethernet12/1 12     Ext        400000      Eth88              0           12              8
+Ethernet96     40,41,42,43,44,45,46,47           Ethernet13/1 13     Ext        400000      Eth96              0           13              8
+Ethernet104    32,33,34,35,36,37,38,39           Ethernet14/1 14     Ext        400000      Eth104             0           14              8
+Ethernet112    24,25,26,27,28,29,30,31           Ethernet15/1 15     Ext        400000      Eth112             0           15              8
+Ethernet120    16,17,18,19,20,21,22,23           Ethernet16/1 16     Ext        400000      Eth120             0           16              8
+Ethernet128    8,9,10,11,12,13,14,15             Ethernet17/1 17     Ext        400000      Eth128             0           17              8
+Ethernet136    0,1,2,3,4,5,6,7                   Ethernet18/1 18     Ext        400000      Eth136             0           18              8
+Ethernet-Rec0  249                               Recirc0/0    37     Rec        400000      Rcy0               0           49              8
+Ethernet-IB0   250                               Recirc0/1    38     Inb        400000      Rcy1               1           50              8
\ No newline at end of file
diff --git a/src/sonic-config-engine/tests/chassis_data/voq_chassis_data/voq_chassis_lc_multi_asic.xml b/src/sonic-config-engine/tests/chassis_data/voq_chassis_data/voq_chassis_lc_multi_asic.xml
new file mode 100644
index 000000000..2bbf8868d
--- /dev/null
+++ b/src/sonic-config-engine/tests/chassis_data/voq_chassis_data/voq_chassis_lc_multi_asic.xml
@@ -0,0 +1,48338 @@
+<?xml version="1.0"?>
+<DeviceMiniGraph xmlns="Microsoft.Search.Autopilot.Evolution"
+    xmlns:i="http://www.w3.org/2001/XMLSchema-instance">
+    <CpgDec>
+        <IsisRouters
+            xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution" />
+        <IsisSessions
+            xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution" />
+        <PeeringSessions>
+            <BGPSession>
+                <ElementType>BGPSession</ElementType>
+                <BgpGroup>
+                    <Start>VoQ</Start>
+                    <End>VoQ</End>
+                </BgpGroup>
+                <MacSec>false</MacSec>
+                <StartRouter>str-sonic-lc03-ASIC00</StartRouter>
+                <StartPeer>10.241.88.0</StartPeer>
+                <EndRouter>str-sonic-lc03-ASIC01</EndRouter>
+                <EndPeer>10.241.88.1</EndPeer>
+                <Multihop>1</Multihop>
+                <HoldTime>0</HoldTime>
+                <KeepAliveTime>0</KeepAliveTime>
+            </BGPSession>
+            <BGPSession>
+                <ElementType>BGPSession</ElementType>
+                <BgpGroup>
+                    <Start>VoQ</Start>
+                    <End>VoQ</End>
+                </BgpGroup>
+                <MacSec>false</MacSec>
+                <StartRouter>str-sonic-lc03-ASIC00</StartRouter>
+                <StartPeer>2a01:111:e210:5e:0:a:f158:0</StartPeer>
+                <EndRouter>str-sonic-lc03-ASIC01</EndRouter>
+                <EndPeer>2a01:111:e210:5e:0:a:f158:100</EndPeer>
+                <Multihop>1</Multihop>
+                <HoldTime>0</HoldTime>
+                <KeepAliveTime>0</KeepAliveTime>
+            </BGPSession>
+            <BGPSession>
+                <ElementType>BGPSession</ElementType>
+                <BgpGroup>
+                    <Start>VoQ</Start>
+                    <End>VoQ</End>
+                </BgpGroup>
+                <MacSec>false</MacSec>
+                <StartRouter>str-sonic-lc03-ASIC00</StartRouter>
+                <StartPeer>10.241.88.0</StartPeer>
+                <EndRouter>str-sonic-lc04-ASIC00</EndRouter>
+                <EndPeer>10.241.88.2</EndPeer>
+                <Multihop>1</Multihop>
+                <HoldTime>0</HoldTime>
+                <KeepAliveTime>0</KeepAliveTime>
+            </BGPSession>
+            <BGPSession>
+                <ElementType>BGPSession</ElementType>
+                <BgpGroup>
+                    <Start>VoQ</Start>
+                    <End>VoQ</End>
+                </BgpGroup>
+                <MacSec>false</MacSec>
+                <StartRouter>str-sonic-lc03-ASIC00</StartRouter>
+                <StartPeer>2a01:111:e210:5e:0:a:f158:0</StartPeer>
+                <EndRouter>str-sonic-lc04-ASIC00</EndRouter>
+                <EndPeer>2a01:111:e210:5e:0:a:f158:200</EndPeer>
+                <Multihop>1</Multihop>
+                <HoldTime>0</HoldTime>
+                <KeepAliveTime>0</KeepAliveTime>
+            </BGPSession>
+            <BGPSession>
+                <ElementType>BGPSession</ElementType>
+                <BgpGroup>
+                    <Start>VoQ</Start>
+                    <End>VoQ</End>
+                </BgpGroup>
+                <MacSec>false</MacSec>
+                <StartRouter>str-sonic-lc03-ASIC00</StartRouter>
+                <StartPeer>10.241.88.0</StartPeer>
+                <EndRouter>str-sonic-lc05-ASIC00</EndRouter>
+                <EndPeer>10.241.88.3</EndPeer>
+                <Multihop>1</Multihop>
+                <HoldTime>0</HoldTime>
+                <KeepAliveTime>0</KeepAliveTime>
+            </BGPSession>
+            <BGPSession>
+                <ElementType>BGPSession</ElementType>
+                <BgpGroup>
+                    <Start>VoQ</Start>
+                    <End>VoQ</End>
+                </BgpGroup>
+                <MacSec>false</MacSec>
+                <StartRouter>str-sonic-lc03-ASIC00</StartRouter>
+                <StartPeer>2a01:111:e210:5e:0:a:f158:0</StartPeer>
+                <EndRouter>str-sonic-lc05-ASIC00</EndRouter>
+                <EndPeer>2a01:111:e210:5e:0:a:f158:300</EndPeer>
+                <Multihop>1</Multihop>
+                <HoldTime>0</HoldTime>
+                <KeepAliveTime>0</KeepAliveTime>
+            </BGPSession>
+            <BGPSession>
+                <ElementType>BGPSession</ElementType>
+                <BgpGroup>
+                    <Start>VoQ</Start>
+                    <End>VoQ</End>
+                </BgpGroup>
+                <MacSec>false</MacSec>
+                <StartRouter>str-sonic-lc03-ASIC00</StartRouter>
+                <StartPeer>10.241.88.0</StartPeer>
+                <EndRouter>str-sonic-lc06-ASIC00</EndRouter>
+                <EndPeer>10.241.88.4</EndPeer>
+                <Multihop>1</Multihop>
+                <HoldTime>0</HoldTime>
+                <KeepAliveTime>0</KeepAliveTime>
+            </BGPSession>
+            <BGPSession>
+                <ElementType>BGPSession</ElementType>
+                <BgpGroup>
+                    <Start>VoQ</Start>
+                    <End>VoQ</End>
+                </BgpGroup>
+                <MacSec>false</MacSec>
+                <StartRouter>str-sonic-lc03-ASIC00</StartRouter>
+                <StartPeer>2a01:111:e210:5e:0:a:f158:0</StartPeer>
+                <EndRouter>str-sonic-lc06-ASIC00</EndRouter>
+                <EndPeer>2a01:111:e210:5e:0:a:f158:400</EndPeer>
+                <Multihop>1</Multihop>
+                <HoldTime>0</HoldTime>
+                <KeepAliveTime>0</KeepAliveTime>
+            </BGPSession>
+            <BGPSession>
+                <ElementType>BGPSession</ElementType>
+                <BgpGroup>
+                    <Start>VoQ</Start>
+                    <End>VoQ</End>
+                </BgpGroup>
+                <MacSec>false</MacSec>
+                <StartRouter>str-sonic-lc03-ASIC00</StartRouter>
+                <StartPeer>10.241.88.0</StartPeer>
+                <EndRouter>str-sonic-lc07-ASIC00</EndRouter>
+                <EndPeer>10.241.88.5</EndPeer>
+                <Multihop>1</Multihop>
+                <HoldTime>0</HoldTime>
+                <KeepAliveTime>0</KeepAliveTime>
+            </BGPSession>
+            <BGPSession>
+                <ElementType>BGPSession</ElementType>
+                <BgpGroup>
+                    <Start>VoQ</Start>
+                    <End>VoQ</End>
+                </BgpGroup>
+                <MacSec>false</MacSec>
+                <StartRouter>str-sonic-lc03-ASIC00</StartRouter>
+                <StartPeer>2a01:111:e210:5e:0:a:f158:0</StartPeer>
+                <EndRouter>str-sonic-lc07-ASIC00</EndRouter>
+                <EndPeer>2a01:111:e210:5e:0:a:f158:500</EndPeer>
+                <Multihop>1</Multihop>
+                <HoldTime>0</HoldTime>
+                <KeepAliveTime>0</KeepAliveTime>
+            </BGPSession>
+            <BGPSession>
+                <ElementType>BGPSession</ElementType>
+                <BgpGroup>
+                    <Start>VoQ</Start>
+                    <End>VoQ</End>
+                </BgpGroup>
+                <MacSec>false</MacSec>
+                <StartRouter>str-sonic-lc03-ASIC00</StartRouter>
+                <StartPeer>10.241.88.0</StartPeer>
+                <EndRouter>str-sonic-lc08-ASIC00</EndRouter>
+                <EndPeer>10.241.88.6</EndPeer>
+                <Multihop>1</Multihop>
+                <HoldTime>0</HoldTime>
+                <KeepAliveTime>0</KeepAliveTime>
+            </BGPSession>
+            <BGPSession>
+                <ElementType>BGPSession</ElementType>
+                <BgpGroup>
+                    <Start>VoQ</Start>
+                    <End>VoQ</End>
+                </BgpGroup>
+                <MacSec>false</MacSec>
+                <StartRouter>str-sonic-lc03-ASIC00</StartRouter>
+                <StartPeer>2a01:111:e210:5e:0:a:f158:0</StartPeer>
+                <EndRouter>str-sonic-lc08-ASIC00</EndRouter>
+                <EndPeer>2a01:111:e210:5e:0:a:f158:600</EndPeer>
+                <Multihop>1</Multihop>
+                <HoldTime>0</HoldTime>
+                <KeepAliveTime>0</KeepAliveTime>
+            </BGPSession>
+            <BGPSession>
+                <ElementType>BGPSession</ElementType>
+                <BgpGroup>
+                    <Start>VoQ</Start>
+                    <End>VoQ</End>
+                </BgpGroup>
+                <MacSec>false</MacSec>
+                <StartRouter>str-sonic-lc03-ASIC00</StartRouter>
+                <StartPeer>10.241.88.0</StartPeer>
+                <EndRouter>str-sonic-lc09-ASIC00</EndRouter>
+                <EndPeer>10.241.88.7</EndPeer>
+                <Multihop>1</Multihop>
+                <HoldTime>0</HoldTime>
+                <KeepAliveTime>0</KeepAliveTime>
+            </BGPSession>
+            <BGPSession>
+                <ElementType>BGPSession</ElementType>
+                <BgpGroup>
+                    <Start>VoQ</Start>
+                    <End>VoQ</End>
+                </BgpGroup>
+                <MacSec>false</MacSec>
+                <StartRouter>str-sonic-lc03-ASIC00</StartRouter>
+                <StartPeer>2a01:111:e210:5e:0:a:f158:0</StartPeer>
+                <EndRouter>str-sonic-lc09-ASIC00</EndRouter>
+                <EndPeer>2a01:111:e210:5e:0:a:f158:700</EndPeer>
+                <Multihop>1</Multihop>
+                <HoldTime>0</HoldTime>
+                <KeepAliveTime>0</KeepAliveTime>
+            </BGPSession>
+            <BGPSession>
+                <ElementType>BGPSession</ElementType>
+                <BgpGroup>
+                    <Start>VoQ</Start>
+                    <End>VoQ</End>
+                </BgpGroup>
+                <MacSec>false</MacSec>
+                <StartRouter>str-sonic-lc03-ASIC00</StartRouter>
+                <StartPeer>10.241.88.0</StartPeer>
+                <EndRouter>str-sonic-lc10-ASIC00</EndRouter>
+                <EndPeer>10.241.88.8</EndPeer>
+                <Multihop>1</Multihop>
+                <HoldTime>0</HoldTime>
+                <KeepAliveTime>0</KeepAliveTime>
+            </BGPSession>
+            <BGPSession>
+                <ElementType>BGPSession</ElementType>
+                <BgpGroup>
+                    <Start>VoQ</Start>
+                    <End>VoQ</End>
+                </BgpGroup>
+                <MacSec>false</MacSec>
+                <StartRouter>str-sonic-lc03-ASIC00</StartRouter>
+                <StartPeer>2a01:111:e210:5e:0:a:f158:0</StartPeer>
+                <EndRouter>str-sonic-lc10-ASIC00</EndRouter>
+                <EndPeer>2a01:111:e210:5e:0:a:f158:800</EndPeer>
+                <Multihop>1</Multihop>
+                <HoldTime>0</HoldTime>
+                <KeepAliveTime>0</KeepAliveTime>
+            </BGPSession>
+            <BGPSession>
+                <ElementType>BGPSession</ElementType>
+                <MacSec>false</MacSec>
+                <StartRouter>str-sonic-lc03-ASIC00</StartRouter>
+                <StartPeer>10.0.0.0</StartPeer>
+                <EndRouter>ARISTA91T3</EndRouter>
+                <EndPeer>10.0.0.1</EndPeer>
+                <Multihop>1</Multihop>
+                <HoldTime>10</HoldTime>
+                <KeepAliveTime>3</KeepAliveTime>
+            </BGPSession>
+            <BGPSession>
+                <ElementType>BGPSession</ElementType>
+                <MacSec>false</MacSec>
+                <StartRouter>str-sonic-lc03-ASIC00</StartRouter>
+                <StartPeer>10.0.0.4</StartPeer>
+                <EndRouter>ARISTA93T3</EndRouter>
+                <EndPeer>10.0.0.5</EndPeer>
+                <Multihop>1</Multihop>
+                <HoldTime>10</HoldTime>
+                <KeepAliveTime>3</KeepAliveTime>
+            </BGPSession>
+            <BGPSession>
+                <ElementType>BGPSession</ElementType>
+                <MacSec>false</MacSec>
+                <StartRouter>str-sonic-lc03-ASIC00</StartRouter>
+                <StartPeer>10.0.0.8</StartPeer>
+                <EndRouter>ARISTA05T3</EndRouter>
+                <EndPeer>10.0.0.9</EndPeer>
+                <Multihop>1</Multihop>
+                <HoldTime>10</HoldTime>
+                <KeepAliveTime>3</KeepAliveTime>
+            </BGPSession>
+            <BGPSession>
+                <ElementType>BGPSession</ElementType>
+                <MacSec>false</MacSec>
+                <StartRouter>str-sonic-lc03-ASIC00</StartRouter>
+                <StartPeer>10.0.0.12</StartPeer>
+                <EndRouter>ARISTA07T3</EndRouter>
+                <EndPeer>10.0.0.13</EndPeer>
+                <Multihop>1</Multihop>
+                <HoldTime>10</HoldTime>
+                <KeepAliveTime>3</KeepAliveTime>
+            </BGPSession>
+            <BGPSession>
+                <ElementType>BGPSession</ElementType>
+                <MacSec>false</MacSec>
+                <StartRouter>str-sonic-lc03-ASIC00</StartRouter>
+                <StartPeer>10.0.0.16</StartPeer>
+                <EndRouter>ARISTA09T3</EndRouter>
+                <EndPeer>10.0.0.17</EndPeer>
+                <Multihop>1</Multihop>
+                <HoldTime>10</HoldTime>
+                <KeepAliveTime>3</KeepAliveTime>
+            </BGPSession>
+            <BGPSession>
+                <ElementType>BGPSession</ElementType>
+                <MacSec>false</MacSec>
+                <StartRouter>str-sonic-lc03-ASIC00</StartRouter>
+                <StartPeer>10.0.0.20</StartPeer>
+                <EndRouter>ARISTA11T3</EndRouter>
+                <EndPeer>10.0.0.21</EndPeer>
+                <Multihop>1</Multihop>
+                <HoldTime>10</HoldTime>
+                <KeepAliveTime>3</KeepAliveTime>
+            </BGPSession>
+            <BGPSession>
+                <ElementType>BGPSession</ElementType>
+                <MacSec>false</MacSec>
+                <StartRouter>str-sonic-lc03-ASIC00</StartRouter>
+                <StartPeer>10.0.0.24</StartPeer>
+                <EndRouter>ARISTA18T3</EndRouter>
+                <EndPeer>10.0.0.25</EndPeer>
+                <Multihop>1</Multihop>
+                <HoldTime>10</HoldTime>
+                <KeepAliveTime>3</KeepAliveTime>
+            </BGPSession>
+            <BGPSession>
+                <ElementType>BGPSession</ElementType>
+                <MacSec>false</MacSec>
+                <StartRouter>str-sonic-lc03-ASIC00</StartRouter>
+                <StartPeer>10.0.0.28</StartPeer>
+                <EndRouter>ARISTA15T3</EndRouter>
+                <EndPeer>10.0.0.29</EndPeer>
+                <Multihop>1</Multihop>
+                <HoldTime>10</HoldTime>
+                <KeepAliveTime>3</KeepAliveTime>
+            </BGPSession>
+            <BGPSession>
+                <ElementType>BGPSession</ElementType>
+                <MacSec>false</MacSec>
+                <StartRouter>str-sonic-lc03-ASIC00</StartRouter>
+                <StartPeer>fc00::1</StartPeer>
+                <EndRouter>ARISTA91T3</EndRouter>
+                <EndPeer>fc00::2</EndPeer>
+                <Multihop>1</Multihop>
+                <HoldTime>10</HoldTime>
+                <KeepAliveTime>3</KeepAliveTime>
+            </BGPSession>
+            <BGPSession>
+                <ElementType>BGPSession</ElementType>
+                <MacSec>false</MacSec>
+                <StartRouter>str-sonic-lc03-ASIC00</StartRouter>
+                <StartPeer>fc00::9</StartPeer>
+                <EndRouter>ARISTA93T3</EndRouter>
+                <EndPeer>fc00::a</EndPeer>
+                <Multihop>1</Multihop>
+                <HoldTime>10</HoldTime>
+                <KeepAliveTime>3</KeepAliveTime>
+            </BGPSession>
+            <BGPSession>
+                <ElementType>BGPSession</ElementType>
+                <MacSec>false</MacSec>
+                <StartRouter>str-sonic-lc03-ASIC00</StartRouter>
+                <StartPeer>fc00::11</StartPeer>
+                <EndRouter>ARISTA05T3</EndRouter>
+                <EndPeer>fc00::12</EndPeer>
+                <Multihop>1</Multihop>
+                <HoldTime>10</HoldTime>
+                <KeepAliveTime>3</KeepAliveTime>
+            </BGPSession>
+            <BGPSession>
+                <ElementType>BGPSession</ElementType>
+                <MacSec>false</MacSec>
+                <StartRouter>str-sonic-lc03-ASIC00</StartRouter>
+                <StartPeer>fc00::19</StartPeer>
+                <EndRouter>ARISTA07T3</EndRouter>
+                <EndPeer>fc00::1a</EndPeer>
+                <Multihop>1</Multihop>
+                <HoldTime>10</HoldTime>
+                <KeepAliveTime>3</KeepAliveTime>
+            </BGPSession>
+            <BGPSession>
+                <ElementType>BGPSession</ElementType>
+                <MacSec>false</MacSec>
+                <StartRouter>str-sonic-lc03-ASIC00</StartRouter>
+                <StartPeer>fc00::21</StartPeer>
+                <EndRouter>ARISTA09T3</EndRouter>
+                <EndPeer>fc00::22</EndPeer>
+                <Multihop>1</Multihop>
+                <HoldTime>10</HoldTime>
+                <KeepAliveTime>3</KeepAliveTime>
+            </BGPSession>
+            <BGPSession>
+                <ElementType>BGPSession</ElementType>
+                <MacSec>false</MacSec>
+                <StartRouter>str-sonic-lc03-ASIC00</StartRouter>
+                <StartPeer>fc00::29</StartPeer>
+                <EndRouter>ARISTA11T3</EndRouter>
+                <EndPeer>fc00::2a</EndPeer>
+                <Multihop>1</Multihop>
+                <HoldTime>10</HoldTime>
+                <KeepAliveTime>3</KeepAliveTime>
+            </BGPSession>
+            <BGPSession>
+                <ElementType>BGPSession</ElementType>
+                <MacSec>false</MacSec>
+                <StartRouter>str-sonic-lc03-ASIC00</StartRouter>
+                <StartPeer>fc00::31</StartPeer>
+                <EndRouter>ARISTA18T3</EndRouter>
+                <EndPeer>fc00::32</EndPeer>
+                <Multihop>1</Multihop>
+                <HoldTime>10</HoldTime>
+                <KeepAliveTime>3</KeepAliveTime>
+            </BGPSession>
+            <BGPSession>
+                <ElementType>BGPSession</ElementType>
+                <MacSec>false</MacSec>
+                <StartRouter>str-sonic-lc03-ASIC00</StartRouter>
+                <StartPeer>fc00::39</StartPeer>
+                <EndRouter>ARISTA15T3</EndRouter>
+                <EndPeer>fc00::3a</EndPeer>
+                <Multihop>1</Multihop>
+                <HoldTime>10</HoldTime>
+                <KeepAliveTime>3</KeepAliveTime>
+            </BGPSession>
+            <BGPSession>
+                <ElementType>BGPSession</ElementType>
+                <BgpGroup>
+                    <Start>VoQ</Start>
+                    <End>VoQ</End>
+                </BgpGroup>
+                <MacSec>false</MacSec>
+                <StartRouter>str-sonic-lc03-ASIC01</StartRouter>
+                <StartPeer>10.241.88.1</StartPeer>
+                <EndRouter>str-sonic-lc04-ASIC00</EndRouter>
+                <EndPeer>10.241.88.2</EndPeer>
+                <Multihop>1</Multihop>
+                <HoldTime>0</HoldTime>
+                <KeepAliveTime>0</KeepAliveTime>
+            </BGPSession>
+            <BGPSession>
+                <ElementType>BGPSession</ElementType>
+                <BgpGroup>
+                    <Start>VoQ</Start>
+                    <End>VoQ</End>
+                </BgpGroup>
+                <MacSec>false</MacSec>
+                <StartRouter>str-sonic-lc03-ASIC01</StartRouter>
+                <StartPeer>2a01:111:e210:5e:0:a:f158:100</StartPeer>
+                <EndRouter>str-sonic-lc04-ASIC00</EndRouter>
+                <EndPeer>2a01:111:e210:5e:0:a:f158:200</EndPeer>
+                <Multihop>1</Multihop>
+                <HoldTime>0</HoldTime>
+                <KeepAliveTime>0</KeepAliveTime>
+            </BGPSession>
+            <BGPSession>
+                <ElementType>BGPSession</ElementType>
+                <BgpGroup>
+                    <Start>VoQ</Start>
+                    <End>VoQ</End>
+                </BgpGroup>
+                <MacSec>false</MacSec>
+                <StartRouter>str-sonic-lc03-ASIC01</StartRouter>
+                <StartPeer>10.241.88.1</StartPeer>
+                <EndRouter>str-sonic-lc05-ASIC00</EndRouter>
+                <EndPeer>10.241.88.3</EndPeer>
+                <Multihop>1</Multihop>
+                <HoldTime>0</HoldTime>
+                <KeepAliveTime>0</KeepAliveTime>
+            </BGPSession>
+            <BGPSession>
+                <ElementType>BGPSession</ElementType>
+                <BgpGroup>
+                    <Start>VoQ</Start>
+                    <End>VoQ</End>
+                </BgpGroup>
+                <MacSec>false</MacSec>
+                <StartRouter>str-sonic-lc03-ASIC01</StartRouter>
+                <StartPeer>2a01:111:e210:5e:0:a:f158:100</StartPeer>
+                <EndRouter>str-sonic-lc05-ASIC00</EndRouter>
+                <EndPeer>2a01:111:e210:5e:0:a:f158:300</EndPeer>
+                <Multihop>1</Multihop>
+                <HoldTime>0</HoldTime>
+                <KeepAliveTime>0</KeepAliveTime>
+            </BGPSession>
+            <BGPSession>
+                <ElementType>BGPSession</ElementType>
+                <BgpGroup>
+                    <Start>VoQ</Start>
+                    <End>VoQ</End>
+                </BgpGroup>
+                <MacSec>false</MacSec>
+                <StartRouter>str-sonic-lc03-ASIC01</StartRouter>
+                <StartPeer>10.241.88.1</StartPeer>
+                <EndRouter>str-sonic-lc06-ASIC00</EndRouter>
+                <EndPeer>10.241.88.4</EndPeer>
+                <Multihop>1</Multihop>
+                <HoldTime>0</HoldTime>
+                <KeepAliveTime>0</KeepAliveTime>
+            </BGPSession>
+            <BGPSession>
+                <ElementType>BGPSession</ElementType>
+                <BgpGroup>
+                    <Start>VoQ</Start>
+                    <End>VoQ</End>
+                </BgpGroup>
+                <MacSec>false</MacSec>
+                <StartRouter>str-sonic-lc03-ASIC01</StartRouter>
+                <StartPeer>2a01:111:e210:5e:0:a:f158:100</StartPeer>
+                <EndRouter>str-sonic-lc06-ASIC00</EndRouter>
+                <EndPeer>2a01:111:e210:5e:0:a:f158:400</EndPeer>
+                <Multihop>1</Multihop>
+                <HoldTime>0</HoldTime>
+                <KeepAliveTime>0</KeepAliveTime>
+            </BGPSession>
+            <BGPSession>
+                <ElementType>BGPSession</ElementType>
+                <BgpGroup>
+                    <Start>VoQ</Start>
+                    <End>VoQ</End>
+                </BgpGroup>
+                <MacSec>false</MacSec>
+                <StartRouter>str-sonic-lc03-ASIC01</StartRouter>
+                <StartPeer>10.241.88.1</StartPeer>
+                <EndRouter>str-sonic-lc07-ASIC00</EndRouter>
+                <EndPeer>10.241.88.5</EndPeer>
+                <Multihop>1</Multihop>
+                <HoldTime>0</HoldTime>
+                <KeepAliveTime>0</KeepAliveTime>
+            </BGPSession>
+            <BGPSession>
+                <ElementType>BGPSession</ElementType>
+                <BgpGroup>
+                    <Start>VoQ</Start>
+                    <End>VoQ</End>
+                </BgpGroup>
+                <MacSec>false</MacSec>
+                <StartRouter>str-sonic-lc03-ASIC01</StartRouter>
+                <StartPeer>2a01:111:e210:5e:0:a:f158:100</StartPeer>
+                <EndRouter>str-sonic-lc07-ASIC00</EndRouter>
+                <EndPeer>2a01:111:e210:5e:0:a:f158:500</EndPeer>
+                <Multihop>1</Multihop>
+                <HoldTime>0</HoldTime>
+                <KeepAliveTime>0</KeepAliveTime>
+            </BGPSession>
+            <BGPSession>
+                <ElementType>BGPSession</ElementType>
+                <BgpGroup>
+                    <Start>VoQ</Start>
+                    <End>VoQ</End>
+                </BgpGroup>
+                <MacSec>false</MacSec>
+                <StartRouter>str-sonic-lc03-ASIC01</StartRouter>
+                <StartPeer>10.241.88.1</StartPeer>
+                <EndRouter>str-sonic-lc08-ASIC00</EndRouter>
+                <EndPeer>10.241.88.6</EndPeer>
+                <Multihop>1</Multihop>
+                <HoldTime>0</HoldTime>
+                <KeepAliveTime>0</KeepAliveTime>
+            </BGPSession>
+            <BGPSession>
+                <ElementType>BGPSession</ElementType>
+                <BgpGroup>
+                    <Start>VoQ</Start>
+                    <End>VoQ</End>
+                </BgpGroup>
+                <MacSec>false</MacSec>
+                <StartRouter>str-sonic-lc03-ASIC01</StartRouter>
+                <StartPeer>2a01:111:e210:5e:0:a:f158:100</StartPeer>
+                <EndRouter>str-sonic-lc08-ASIC00</EndRouter>
+                <EndPeer>2a01:111:e210:5e:0:a:f158:600</EndPeer>
+                <Multihop>1</Multihop>
+                <HoldTime>0</HoldTime>
+                <KeepAliveTime>0</KeepAliveTime>
+            </BGPSession>
+            <BGPSession>
+                <ElementType>BGPSession</ElementType>
+                <BgpGroup>
+                    <Start>VoQ</Start>
+                    <End>VoQ</End>
+                </BgpGroup>
+                <MacSec>false</MacSec>
+                <StartRouter>str-sonic-lc03-ASIC01</StartRouter>
+                <StartPeer>10.241.88.1</StartPeer>
+                <EndRouter>str-sonic-lc09-ASIC00</EndRouter>
+                <EndPeer>10.241.88.7</EndPeer>
+                <Multihop>1</Multihop>
+                <HoldTime>0</HoldTime>
+                <KeepAliveTime>0</KeepAliveTime>
+            </BGPSession>
+            <BGPSession>
+                <ElementType>BGPSession</ElementType>
+                <BgpGroup>
+                    <Start>VoQ</Start>
+                    <End>VoQ</End>
+                </BgpGroup>
+                <MacSec>false</MacSec>
+                <StartRouter>str-sonic-lc03-ASIC01</StartRouter>
+                <StartPeer>2a01:111:e210:5e:0:a:f158:100</StartPeer>
+                <EndRouter>str-sonic-lc09-ASIC00</EndRouter>
+                <EndPeer>2a01:111:e210:5e:0:a:f158:700</EndPeer>
+                <Multihop>1</Multihop>
+                <HoldTime>0</HoldTime>
+                <KeepAliveTime>0</KeepAliveTime>
+            </BGPSession>
+            <BGPSession>
+                <ElementType>BGPSession</ElementType>
+                <BgpGroup>
+                    <Start>VoQ</Start>
+                    <End>VoQ</End>
+                </BgpGroup>
+                <MacSec>false</MacSec>
+                <StartRouter>str-sonic-lc03-ASIC01</StartRouter>
+                <StartPeer>10.241.88.1</StartPeer>
+                <EndRouter>str-sonic-lc10-ASIC00</EndRouter>
+                <EndPeer>10.241.88.8</EndPeer>
+                <Multihop>1</Multihop>
+                <HoldTime>0</HoldTime>
+                <KeepAliveTime>0</KeepAliveTime>
+            </BGPSession>
+            <BGPSession>
+                <ElementType>BGPSession</ElementType>
+                <BgpGroup>
+                    <Start>VoQ</Start>
+                    <End>VoQ</End>
+                </BgpGroup>
+                <MacSec>false</MacSec>
+                <StartRouter>str-sonic-lc03-ASIC01</StartRouter>
+                <StartPeer>2a01:111:e210:5e:0:a:f158:100</StartPeer>
+                <EndRouter>str-sonic-lc10-ASIC00</EndRouter>
+                <EndPeer>2a01:111:e210:5e:0:a:f158:800</EndPeer>
+                <Multihop>1</Multihop>
+                <HoldTime>0</HoldTime>
+                <KeepAliveTime>0</KeepAliveTime>
+            </BGPSession>
+        </PeeringSessions>
+        <Routers
+            xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution">
+            <a:BGPRouterDeclaration>
+                <a:ASN>65100</a:ASN>
+                <a:BgpGroups>
+                    <BgpGroup>
+                        <ElementType>BGPGroup</ElementType>
+                        <AttachTo>10.241.88.0;2a01:111:e210:5e:0:a:f158:0</AttachTo>
+                        <BgpType>eBGP</BgpType>
+                        <ClusterIpAddress />
+                        <Description i:nil="true" />
+                        <ExportPoliciesStr />
+                        <FamilyTypeStr />
+                        <ImportPoliciesStr />
+                        <LocalAsn>0</LocalAsn>
+                        <LocalIpAddress />
+                        <Multipath>false</Multipath>
+                        <MultipathAs>false</MultipathAs>
+                        <Name>VoQ</Name>
+                        <PrefixLimitMaximum>0</PrefixLimitMaximum>
+                        <PrefixLimitTeardown>0</PrefixLimitTeardown>
+                        <PrefixLimitTeardownIdleTimeout>0</PrefixLimitTeardownIdleTimeout>
+                    </BgpGroup>
+                </a:BgpGroups>
+                <a:BgpTemplates />
+                <a:Hostname>str-sonic-lc03-ASIC00</a:Hostname>
+                <a:Peers>
+                    <BGPPeer>
+                        <ElementType>BGPPeer</ElementType>
+                        <Address>10.241.88.0</Address>
+                        <RouteMapIn i:nil="true" />
+                        <RouteMapOut i:nil="true" />
+                        <Vrf i:nil="true" />
+                    </BGPPeer>
+                    <BGPPeer>
+                        <ElementType>BGPPeer</ElementType>
+                        <Address>2a01:111:e210:5e:0:a:f158:0</Address>
+                        <RouteMapIn i:nil="true" />
+                        <RouteMapOut i:nil="true" />
+                        <Vrf i:nil="true" />
+                    </BGPPeer>
+                    <BGPPeer>
+                        <ElementType>BGPPeer</ElementType>
+                        <Address>10.0.0.0</Address>
+                        <RouteMapIn i:nil="true" />
+                        <RouteMapOut i:nil="true" />
+                        <Vrf i:nil="true" />
+                    </BGPPeer>
+                    <BGPPeer>
+                        <ElementType>BGPPeer</ElementType>
+                        <Address>10.0.0.4</Address>
+                        <RouteMapIn i:nil="true" />
+                        <RouteMapOut i:nil="true" />
+                        <Vrf i:nil="true" />
+                    </BGPPeer>
+                    <BGPPeer>
+                        <ElementType>BGPPeer</ElementType>
+                        <Address>10.0.0.8</Address>
+                        <RouteMapIn i:nil="true" />
+                        <RouteMapOut i:nil="true" />
+                        <Vrf i:nil="true" />
+                    </BGPPeer>
+                    <BGPPeer>
+                        <ElementType>BGPPeer</ElementType>
+                        <Address>10.0.0.12</Address>
+                        <RouteMapIn i:nil="true" />
+                        <RouteMapOut i:nil="true" />
+                        <Vrf i:nil="true" />
+                    </BGPPeer>
+                    <BGPPeer>
+                        <ElementType>BGPPeer</ElementType>
+                        <Address>10.0.0.16</Address>
+                        <RouteMapIn i:nil="true" />
+                        <RouteMapOut i:nil="true" />
+                        <Vrf i:nil="true" />
+                    </BGPPeer>
+                    <BGPPeer>
+                        <ElementType>BGPPeer</ElementType>
+                        <Address>10.0.0.20</Address>
+                        <RouteMapIn i:nil="true" />
+                        <RouteMapOut i:nil="true" />
+                        <Vrf i:nil="true" />
+                    </BGPPeer>
+                    <BGPPeer>
+                        <ElementType>BGPPeer</ElementType>
+                        <Address>10.0.0.24</Address>
+                        <RouteMapIn i:nil="true" />
+                        <RouteMapOut i:nil="true" />
+                        <Vrf i:nil="true" />
+                    </BGPPeer>
+                    <BGPPeer>
+                        <ElementType>BGPPeer</ElementType>
+                        <Address>10.0.0.28</Address>
+                        <RouteMapIn i:nil="true" />
+                        <RouteMapOut i:nil="true" />
+                        <Vrf i:nil="true" />
+                    </BGPPeer>
+                    <BGPPeer>
+                        <ElementType>BGPPeer</ElementType>
+                        <Address>fc00::1</Address>
+                        <RouteMapIn i:nil="true" />
+                        <RouteMapOut i:nil="true" />
+                        <Vrf i:nil="true" />
+                    </BGPPeer>
+                    <BGPPeer>
+                        <ElementType>BGPPeer</ElementType>
+                        <Address>fc00::9</Address>
+                        <RouteMapIn i:nil="true" />
+                        <RouteMapOut i:nil="true" />
+                        <Vrf i:nil="true" />
+                    </BGPPeer>
+                    <BGPPeer>
+                        <ElementType>BGPPeer</ElementType>
+                        <Address>fc00::11</Address>
+                        <RouteMapIn i:nil="true" />
+                        <RouteMapOut i:nil="true" />
+                        <Vrf i:nil="true" />
+                    </BGPPeer>
+                    <BGPPeer>
+                        <ElementType>BGPPeer</ElementType>
+                        <Address>fc00::19</Address>
+                        <RouteMapIn i:nil="true" />
+                        <RouteMapOut i:nil="true" />
+                        <Vrf i:nil="true" />
+                    </BGPPeer>
+                    <BGPPeer>
+                        <ElementType>BGPPeer</ElementType>
+                        <Address>fc00::21</Address>
+                        <RouteMapIn i:nil="true" />
+                        <RouteMapOut i:nil="true" />
+                        <Vrf i:nil="true" />
+                    </BGPPeer>
+                    <BGPPeer>
+                        <ElementType>BGPPeer</ElementType>
+                        <Address>fc00::29</Address>
+                        <RouteMapIn i:nil="true" />
+                        <RouteMapOut i:nil="true" />
+                        <Vrf i:nil="true" />
+                    </BGPPeer>
+                    <BGPPeer>
+                        <ElementType>BGPPeer</ElementType>
+                        <Address>fc00::31</Address>
+                        <RouteMapIn i:nil="true" />
+                        <RouteMapOut i:nil="true" />
+                        <Vrf i:nil="true" />
+                    </BGPPeer>
+                    <BGPPeer>
+                        <ElementType>BGPPeer</ElementType>
+                        <Address>fc00::39</Address>
+                        <RouteMapIn i:nil="true" />
+                        <RouteMapOut i:nil="true" />
+                        <Vrf i:nil="true" />
+                    </BGPPeer>
+                </a:Peers>
+                <a:RouteMaps />
+                <a:RouterID i:nil="true" />
+            </a:BGPRouterDeclaration>
+            <a:BGPRouterDeclaration>
+                <a:ASN>65100</a:ASN>
+                <a:BgpGroups>
+                    <BgpGroup>
+                        <ElementType>BGPGroup</ElementType>
+                        <AttachTo>10.241.88.1;2a01:111:e210:5e:0:a:f158:100</AttachTo>
+                        <BgpType>eBGP</BgpType>
+                        <ClusterIpAddress />
+                        <Description i:nil="true" />
+                        <ExportPoliciesStr />
+                        <FamilyTypeStr />
+                        <ImportPoliciesStr />
+                        <LocalAsn>0</LocalAsn>
+                        <LocalIpAddress />
+                        <Multipath>false</Multipath>
+                        <MultipathAs>false</MultipathAs>
+                        <Name>VoQ</Name>
+                        <PrefixLimitMaximum>0</PrefixLimitMaximum>
+                        <PrefixLimitTeardown>0</PrefixLimitTeardown>
+                        <PrefixLimitTeardownIdleTimeout>0</PrefixLimitTeardownIdleTimeout>
+                    </BgpGroup>
+                </a:BgpGroups>
+                <a:BgpTemplates />
+                <a:Hostname>str-sonic-lc03-ASIC01</a:Hostname>
+                <a:Peers>
+                    <BGPPeer>
+                        <ElementType>BGPPeer</ElementType>
+                        <Address>10.241.88.1</Address>
+                        <RouteMapIn i:nil="true" />
+                        <RouteMapOut i:nil="true" />
+                        <Vrf i:nil="true" />
+                    </BGPPeer>
+                    <BGPPeer>
+                        <ElementType>BGPPeer</ElementType>
+                        <Address>2a01:111:e210:5e:0:a:f158:100</Address>
+                        <RouteMapIn i:nil="true" />
+                        <RouteMapOut i:nil="true" />
+                        <Vrf i:nil="true" />
+                    </BGPPeer>
+                </a:Peers>
+                <a:RouteMaps />
+                <a:RouterID i:nil="true" />
+            </a:BGPRouterDeclaration>
+            <a:BGPRouterDeclaration>
+                <a:ASN>65100</a:ASN>
+                <a:BgpGroups>
+                    <BgpGroup>
+                        <ElementType>BGPGroup</ElementType>
+                        <AttachTo>10.241.88.2;2a01:111:e210:5e:0:a:f158:200</AttachTo>
+                        <BgpType>eBGP</BgpType>
+                        <ClusterIpAddress />
+                        <Description i:nil="true" />
+                        <ExportPoliciesStr />
+                        <FamilyTypeStr />
+                        <ImportPoliciesStr />
+                        <LocalAsn>0</LocalAsn>
+                        <LocalIpAddress />
+                        <Multipath>false</Multipath>
+                        <MultipathAs>false</MultipathAs>
+                        <Name>VoQ</Name>
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+                    <BGPPeer>
+                        <ElementType>BGPPeer</ElementType>
+                        <Address>10.0.0.13</Address>
+                        <RouteMapIn i:nil="true" />
+                        <RouteMapOut i:nil="true" />
+                        <Vrf i:nil="true" />
+                    </BGPPeer>
+                    <BGPPeer>
+                        <ElementType>BGPPeer</ElementType>
+                        <Address>fc00::1a</Address>
+                        <RouteMapIn i:nil="true" />
+                        <RouteMapOut i:nil="true" />
+                        <Vrf i:nil="true" />
+                    </BGPPeer>
+                </a:Peers>
+                <a:RouteMaps />
+                <a:RouterID i:nil="true" />
+            </a:BGPRouterDeclaration>
+            <a:BGPRouterDeclaration>
+                <a:ASN>65207</a:ASN>
+                <a:BgpGroups />
+                <a:BgpTemplates />
+                <a:Hostname>ARISTA09T3</a:Hostname>
+                <a:Peers>
+                    <BGPPeer>
+                        <ElementType>BGPPeer</ElementType>
+                        <Address>10.0.0.17</Address>
+                        <RouteMapIn i:nil="true" />
+                        <RouteMapOut i:nil="true" />
+                        <Vrf i:nil="true" />
+                    </BGPPeer>
+                    <BGPPeer>
+                        <ElementType>BGPPeer</ElementType>
+                        <Address>fc00::22</Address>
+                        <RouteMapIn i:nil="true" />
+                        <RouteMapOut i:nil="true" />
+                        <Vrf i:nil="true" />
+                    </BGPPeer>
+                </a:Peers>
+                <a:RouteMaps />
+                <a:RouterID i:nil="true" />
+            </a:BGPRouterDeclaration>
+            <a:BGPRouterDeclaration>
+                <a:ASN>65208</a:ASN>
+                <a:BgpGroups />
+                <a:BgpTemplates />
+                <a:Hostname>ARISTA11T3</a:Hostname>
+                <a:Peers>
+                    <BGPPeer>
+                        <ElementType>BGPPeer</ElementType>
+                        <Address>10.0.0.21</Address>
+                        <RouteMapIn i:nil="true" />
+                        <RouteMapOut i:nil="true" />
+                        <Vrf i:nil="true" />
+                    </BGPPeer>
+                    <BGPPeer>
+                        <ElementType>BGPPeer</ElementType>
+                        <Address>fc00::2a</Address>
+                        <RouteMapIn i:nil="true" />
+                        <RouteMapOut i:nil="true" />
+                        <Vrf i:nil="true" />
+                    </BGPPeer>
+                </a:Peers>
+                <a:RouteMaps />
+                <a:RouterID i:nil="true" />
+            </a:BGPRouterDeclaration>
+            <a:BGPRouterDeclaration>
+                <a:ASN>65213</a:ASN>
+                <a:BgpGroups />
+                <a:BgpTemplates />
+                <a:Hostname>ARISTA18T3</a:Hostname>
+                <a:Peers>
+                    <BGPPeer>
+                        <ElementType>BGPPeer</ElementType>
+                        <Address>10.0.0.25</Address>
+                        <RouteMapIn i:nil="true" />
+                        <RouteMapOut i:nil="true" />
+                        <Vrf i:nil="true" />
+                    </BGPPeer>
+                    <BGPPeer>
+                        <ElementType>BGPPeer</ElementType>
+                        <Address>fc00::32</Address>
+                        <RouteMapIn i:nil="true" />
+                        <RouteMapOut i:nil="true" />
+                        <Vrf i:nil="true" />
+                    </BGPPeer>
+                </a:Peers>
+                <a:RouteMaps />
+                <a:RouterID i:nil="true" />
+            </a:BGPRouterDeclaration>
+            <a:BGPRouterDeclaration>
+                <a:ASN>65211</a:ASN>
+                <a:BgpGroups />
+                <a:BgpTemplates />
+                <a:Hostname>ARISTA15T3</a:Hostname>
+                <a:Peers>
+                    <BGPPeer>
+                        <ElementType>BGPPeer</ElementType>
+                        <Address>10.0.0.29</Address>
+                        <RouteMapIn i:nil="true" />
+                        <RouteMapOut i:nil="true" />
+                        <Vrf i:nil="true" />
+                    </BGPPeer>
+                    <BGPPeer>
+                        <ElementType>BGPPeer</ElementType>
+                        <Address>fc00::3a</Address>
+                        <RouteMapIn i:nil="true" />
+                        <RouteMapOut i:nil="true" />
+                        <Vrf i:nil="true" />
+                    </BGPPeer>
+                </a:Peers>
+                <a:RouteMaps />
+                <a:RouterID i:nil="true" />
+            </a:BGPRouterDeclaration>
+        </Routers>
+        <StaticRouters
+            xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution" />
+    </CpgDec>
+    <DeviceInfos>
+        <DeviceInfo>
+            <AzClusterSku i:nil="true" />
+            <BackendFabricInterfaces
+                xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution">
+                <a:BackendFabricInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1</Index>
+                    <InterfaceName>cpu3/0</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>cpu0</SonicName>
+                    <Speed>10000</Speed>
+                    <a:CountOfLanes i:nil="true" />
+                    <a:StartLaneIndex i:nil="true" />
+                </a:BackendFabricInterface>
+                <a:BackendFabricInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>2</Index>
+                    <InterfaceName>cpu3/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>cpu1</SonicName>
+                    <Speed>10000</Speed>
+                    <a:CountOfLanes i:nil="true" />
+                    <a:StartLaneIndex i:nil="true" />
+                </a:BackendFabricInterface>
+                <a:BackendFabricInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>3</Index>
+                    <InterfaceName>Recirc3/0/0</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet-Rec0</SonicName>
+                    <Speed>10000</Speed>
+                    <a:CountOfLanes i:nil="true" />
+                    <a:StartLaneIndex i:nil="true" />
+                </a:BackendFabricInterface>
+                <a:BackendFabricInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>4</Index>
+                    <InterfaceName>Recirc3/1/0</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet-Rec1</SonicName>
+                    <Speed>10000</Speed>
+                    <a:CountOfLanes i:nil="true" />
+                    <a:StartLaneIndex i:nil="true" />
+                </a:BackendFabricInterface>
+                <a:BackendFabricInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>5</Index>
+                    <InterfaceName>Recirc3/0/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet-IB0</SonicName>
+                    <Speed>10000</Speed>
+                    <a:CountOfLanes i:nil="true" />
+                    <a:StartLaneIndex i:nil="true" />
+                </a:BackendFabricInterface>
+                <a:BackendFabricInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>6</Index>
+                    <InterfaceName>Recirc3/1/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet-IB1</SonicName>
+                    <Speed>10000</Speed>
+                    <a:CountOfLanes i:nil="true" />
+                    <a:StartLaneIndex i:nil="true" />
+                </a:BackendFabricInterface>
+                <a:BackendFabricInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>7</Index>
+                    <InterfaceName>cpu4/0</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>cpu0</SonicName>
+                    <Speed>10000</Speed>
+                    <a:CountOfLanes i:nil="true" />
+                    <a:StartLaneIndex i:nil="true" />
+                </a:BackendFabricInterface>
+                <a:BackendFabricInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>8</Index>
+                    <InterfaceName>Recirc4/0/0</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet-Rec0</SonicName>
+                    <Speed>400000</Speed>
+                    <a:CountOfLanes i:nil="true" />
+                    <a:StartLaneIndex i:nil="true" />
+                </a:BackendFabricInterface>
+                <a:BackendFabricInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>9</Index>
+                    <InterfaceName>Recirc4/0/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet-IB0</SonicName>
+                    <Speed>400000</Speed>
+                    <a:CountOfLanes i:nil="true" />
+                    <a:StartLaneIndex i:nil="true" />
+                </a:BackendFabricInterface>
+                <a:BackendFabricInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>10</Index>
+                    <InterfaceName>cpu5/0</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>cpu0</SonicName>
+                    <Speed>10000</Speed>
+                    <a:CountOfLanes i:nil="true" />
+                    <a:StartLaneIndex i:nil="true" />
+                </a:BackendFabricInterface>
+                <a:BackendFabricInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>11</Index>
+                    <InterfaceName>Recirc5/0/0</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet-Rec0</SonicName>
+                    <Speed>400000</Speed>
+                    <a:CountOfLanes i:nil="true" />
+                    <a:StartLaneIndex i:nil="true" />
+                </a:BackendFabricInterface>
+                <a:BackendFabricInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>12</Index>
+                    <InterfaceName>Recirc5/0/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet-IB0</SonicName>
+                    <Speed>400000</Speed>
+                    <a:CountOfLanes i:nil="true" />
+                    <a:StartLaneIndex i:nil="true" />
+                </a:BackendFabricInterface>
+                <a:BackendFabricInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>13</Index>
+                    <InterfaceName>cpu6/0</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>cpu0</SonicName>
+                    <Speed>10000</Speed>
+                    <a:CountOfLanes i:nil="true" />
+                    <a:StartLaneIndex i:nil="true" />
+                </a:BackendFabricInterface>
+                <a:BackendFabricInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>14</Index>
+                    <InterfaceName>Recirc6/0/0</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet-Rec0</SonicName>
+                    <Speed>400000</Speed>
+                    <a:CountOfLanes i:nil="true" />
+                    <a:StartLaneIndex i:nil="true" />
+                </a:BackendFabricInterface>
+                <a:BackendFabricInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>15</Index>
+                    <InterfaceName>Recirc6/0/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet-IB0</SonicName>
+                    <Speed>400000</Speed>
+                    <a:CountOfLanes i:nil="true" />
+                    <a:StartLaneIndex i:nil="true" />
+                </a:BackendFabricInterface>
+                <a:BackendFabricInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>16</Index>
+                    <InterfaceName>cpu7/0</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>cpu0</SonicName>
+                    <Speed>10000</Speed>
+                    <a:CountOfLanes i:nil="true" />
+                    <a:StartLaneIndex i:nil="true" />
+                </a:BackendFabricInterface>
+                <a:BackendFabricInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>17</Index>
+                    <InterfaceName>Recirc7/0/0</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet-Rec0</SonicName>
+                    <Speed>400000</Speed>
+                    <a:CountOfLanes i:nil="true" />
+                    <a:StartLaneIndex i:nil="true" />
+                </a:BackendFabricInterface>
+                <a:BackendFabricInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>18</Index>
+                    <InterfaceName>Recirc7/0/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet-IB0</SonicName>
+                    <Speed>400000</Speed>
+                    <a:CountOfLanes i:nil="true" />
+                    <a:StartLaneIndex i:nil="true" />
+                </a:BackendFabricInterface>
+                <a:BackendFabricInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>19</Index>
+                    <InterfaceName>cpu8/0</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>cpu0</SonicName>
+                    <Speed>10000</Speed>
+                    <a:CountOfLanes i:nil="true" />
+                    <a:StartLaneIndex i:nil="true" />
+                </a:BackendFabricInterface>
+                <a:BackendFabricInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>20</Index>
+                    <InterfaceName>Recirc8/0/0</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet-Rec0</SonicName>
+                    <Speed>400000</Speed>
+                    <a:CountOfLanes i:nil="true" />
+                    <a:StartLaneIndex i:nil="true" />
+                </a:BackendFabricInterface>
+                <a:BackendFabricInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>21</Index>
+                    <InterfaceName>Recirc8/0/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet-IB0</SonicName>
+                    <Speed>400000</Speed>
+                    <a:CountOfLanes i:nil="true" />
+                    <a:StartLaneIndex i:nil="true" />
+                </a:BackendFabricInterface>
+                <a:BackendFabricInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>22</Index>
+                    <InterfaceName>cpu10/0</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>cpu0</SonicName>
+                    <Speed>10000</Speed>
+                    <a:CountOfLanes i:nil="true" />
+                    <a:StartLaneIndex i:nil="true" />
+                </a:BackendFabricInterface>
+                <a:BackendFabricInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>23</Index>
+                    <InterfaceName>Recirc10/0/0</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet-Rec0</SonicName>
+                    <Speed>400000</Speed>
+                    <a:CountOfLanes i:nil="true" />
+                    <a:StartLaneIndex i:nil="true" />
+                </a:BackendFabricInterface>
+                <a:BackendFabricInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>24</Index>
+                    <InterfaceName>Recirc10/0/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet-IB0</SonicName>
+                    <Speed>400000</Speed>
+                    <a:CountOfLanes i:nil="true" />
+                    <a:StartLaneIndex i:nil="true" />
+                </a:BackendFabricInterface>
+            </BackendFabricInterfaces>
+            <BaseSku>Sonic-T2-Base-sku</BaseSku>
+            <ClusterSku i:nil="true" />
+            <EthernetInterfaces
+                xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution">
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>100000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1</Index>
+                    <InterfaceName>Ethernet3/1/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet0</SonicName>
+                    <Speed>400000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>100000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>2</Index>
+                    <InterfaceName>Ethernet3/2/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet8</SonicName>
+                    <Speed>400000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>100000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>3</Index>
+                    <InterfaceName>Ethernet3/3/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet16</SonicName>
+                    <Speed>400000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>100000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>4</Index>
+                    <InterfaceName>Ethernet3/4/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet24</SonicName>
+                    <Speed>400000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>100000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>5</Index>
+                    <InterfaceName>Ethernet3/5/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet32</SonicName>
+                    <Speed>400000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>100000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>6</Index>
+                    <InterfaceName>Ethernet3/6/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet40</SonicName>
+                    <Speed>400000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>100000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>7</Index>
+                    <InterfaceName>Ethernet3/7/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet48</SonicName>
+                    <Speed>400000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>100000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>8</Index>
+                    <InterfaceName>Ethernet3/8/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet56</SonicName>
+                    <Speed>400000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>100000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>9</Index>
+                    <InterfaceName>Ethernet3/9/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet64</SonicName>
+                    <Speed>400000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>100000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>10</Index>
+                    <InterfaceName>Ethernet3/10/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet72</SonicName>
+                    <Speed>400000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>100000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>11</Index>
+                    <InterfaceName>Ethernet3/11/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet80</SonicName>
+                    <Speed>400000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>100000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>12</Index>
+                    <InterfaceName>Ethernet3/12/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet88</SonicName>
+                    <Speed>400000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>100000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>13</Index>
+                    <InterfaceName>Ethernet3/13/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet96</SonicName>
+                    <Speed>400000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>100000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>14</Index>
+                    <InterfaceName>Ethernet3/14/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet104</SonicName>
+                    <Speed>400000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>100000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>15</Index>
+                    <InterfaceName>Ethernet3/15/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet112</SonicName>
+                    <Speed>400000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>100000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>16</Index>
+                    <InterfaceName>Ethernet3/16/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet120</SonicName>
+                    <Speed>400000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>100000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>17</Index>
+                    <InterfaceName>Ethernet3/17/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet128</SonicName>
+                    <Speed>400000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>100000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>18</Index>
+                    <InterfaceName>Ethernet3/18/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet136</SonicName>
+                    <Speed>400000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>100000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>19</Index>
+                    <InterfaceName>Ethernet3/19/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet144</SonicName>
+                    <Speed>400000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>100000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>20</Index>
+                    <InterfaceName>Ethernet3/20/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet152</SonicName>
+                    <Speed>400000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>100000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>21</Index>
+                    <InterfaceName>Ethernet3/21/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet160</SonicName>
+                    <Speed>400000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>100000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>22</Index>
+                    <InterfaceName>Ethernet3/22/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet168</SonicName>
+                    <Speed>400000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>100000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>23</Index>
+                    <InterfaceName>Ethernet3/23/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet176</SonicName>
+                    <Speed>400000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>100000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>24</Index>
+                    <InterfaceName>Ethernet3/24/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet184</SonicName>
+                    <Speed>400000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>100000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>25</Index>
+                    <InterfaceName>Ethernet3/25/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet192</SonicName>
+                    <Speed>400000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>100000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>26</Index>
+                    <InterfaceName>Ethernet3/26/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet200</SonicName>
+                    <Speed>400000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>100000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>27</Index>
+                    <InterfaceName>Ethernet3/27/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet208</SonicName>
+                    <Speed>400000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>100000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>28</Index>
+                    <InterfaceName>Ethernet3/28/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet216</SonicName>
+                    <Speed>400000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>100000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>29</Index>
+                    <InterfaceName>Ethernet3/29/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet224</SonicName>
+                    <Speed>400000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>100000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>30</Index>
+                    <InterfaceName>Ethernet3/30/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet232</SonicName>
+                    <Speed>400000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>100000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>31</Index>
+                    <InterfaceName>Ethernet3/31/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet240</SonicName>
+                    <Speed>400000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>100000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>32</Index>
+                    <InterfaceName>Ethernet3/32/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet248</SonicName>
+                    <Speed>400000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>100000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>33</Index>
+                    <InterfaceName>Ethernet3/33/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet256</SonicName>
+                    <Speed>400000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>100000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>34</Index>
+                    <InterfaceName>Ethernet3/34/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet264</SonicName>
+                    <Speed>400000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>100000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>35</Index>
+                    <InterfaceName>Ethernet3/35/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet272</SonicName>
+                    <Speed>400000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>100000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>36</Index>
+                    <InterfaceName>Ethernet3/36/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet280</SonicName>
+                    <Speed>400000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>37</Index>
+                    <InterfaceName>Ethernet4/1/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet0</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>38</Index>
+                    <InterfaceName>Ethernet4/2/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet4</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>39</Index>
+                    <InterfaceName>Ethernet4/3/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet8</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>40</Index>
+                    <InterfaceName>Ethernet4/4/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet12</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>41</Index>
+                    <InterfaceName>Ethernet4/5/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet16</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>42</Index>
+                    <InterfaceName>Ethernet4/6/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet20</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>43</Index>
+                    <InterfaceName>Ethernet4/7/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet24</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>44</Index>
+                    <InterfaceName>Ethernet4/8/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet28</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>45</Index>
+                    <InterfaceName>Ethernet4/9/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet32</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>46</Index>
+                    <InterfaceName>Ethernet4/10/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet36</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>47</Index>
+                    <InterfaceName>Ethernet4/11/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet40</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>48</Index>
+                    <InterfaceName>Ethernet4/12/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet44</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>49</Index>
+                    <InterfaceName>Ethernet4/13/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet48</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>50</Index>
+                    <InterfaceName>Ethernet4/14/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet52</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>51</Index>
+                    <InterfaceName>Ethernet4/15/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet56</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>52</Index>
+                    <InterfaceName>Ethernet4/16/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet60</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>53</Index>
+                    <InterfaceName>Ethernet4/17/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet64</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>54</Index>
+                    <InterfaceName>Ethernet4/18/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet68</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>55</Index>
+                    <InterfaceName>Ethernet4/19/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet72</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>56</Index>
+                    <InterfaceName>Ethernet4/20/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet76</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>57</Index>
+                    <InterfaceName>Ethernet4/21/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet80</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>58</Index>
+                    <InterfaceName>Ethernet4/22/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet84</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>59</Index>
+                    <InterfaceName>Ethernet4/23/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet88</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>60</Index>
+                    <InterfaceName>Ethernet4/24/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet92</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>61</Index>
+                    <InterfaceName>Ethernet4/25/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet96</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>62</Index>
+                    <InterfaceName>Ethernet4/26/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet100</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>63</Index>
+                    <InterfaceName>Ethernet4/27/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet104</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>64</Index>
+                    <InterfaceName>Ethernet4/28/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet108</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>65</Index>
+                    <InterfaceName>Ethernet4/29/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet112</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>66</Index>
+                    <InterfaceName>Ethernet4/30/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet116</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>67</Index>
+                    <InterfaceName>Ethernet4/31/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet120</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>68</Index>
+                    <InterfaceName>Ethernet4/32/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet124</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>69</Index>
+                    <InterfaceName>Ethernet4/33/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet128</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>70</Index>
+                    <InterfaceName>Ethernet4/34/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet132</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>71</Index>
+                    <InterfaceName>Ethernet4/35/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet136</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>72</Index>
+                    <InterfaceName>Ethernet4/36/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet140</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>73</Index>
+                    <InterfaceName>Ethernet4/37/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet144</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>74</Index>
+                    <InterfaceName>Ethernet4/38/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet148</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>75</Index>
+                    <InterfaceName>Ethernet4/39/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet152</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>76</Index>
+                    <InterfaceName>Ethernet4/40/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet156</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>77</Index>
+                    <InterfaceName>Ethernet4/41/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet160</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>78</Index>
+                    <InterfaceName>Ethernet4/42/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet164</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>79</Index>
+                    <InterfaceName>Ethernet4/43/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet168</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>80</Index>
+                    <InterfaceName>Ethernet4/44/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet172</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>81</Index>
+                    <InterfaceName>Ethernet4/45/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet176</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>82</Index>
+                    <InterfaceName>Ethernet4/46/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet180</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>83</Index>
+                    <InterfaceName>Ethernet4/47/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet184</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>84</Index>
+                    <InterfaceName>Ethernet4/48/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet188</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>85</Index>
+                    <InterfaceName>Ethernet5/1/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet0</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>86</Index>
+                    <InterfaceName>Ethernet5/2/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet4</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>87</Index>
+                    <InterfaceName>Ethernet5/3/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet8</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>88</Index>
+                    <InterfaceName>Ethernet5/4/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet12</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>89</Index>
+                    <InterfaceName>Ethernet5/5/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet16</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>90</Index>
+                    <InterfaceName>Ethernet5/6/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet20</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>91</Index>
+                    <InterfaceName>Ethernet5/7/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet24</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>92</Index>
+                    <InterfaceName>Ethernet5/8/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet28</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>93</Index>
+                    <InterfaceName>Ethernet5/9/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet32</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>94</Index>
+                    <InterfaceName>Ethernet5/10/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet36</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>95</Index>
+                    <InterfaceName>Ethernet5/11/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet40</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>96</Index>
+                    <InterfaceName>Ethernet5/12/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet44</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>97</Index>
+                    <InterfaceName>Ethernet5/13/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet48</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>98</Index>
+                    <InterfaceName>Ethernet5/14/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet52</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>99</Index>
+                    <InterfaceName>Ethernet5/15/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet56</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>100</Index>
+                    <InterfaceName>Ethernet5/16/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet60</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>101</Index>
+                    <InterfaceName>Ethernet5/17/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet64</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>102</Index>
+                    <InterfaceName>Ethernet5/18/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet68</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>103</Index>
+                    <InterfaceName>Ethernet5/19/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet72</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>104</Index>
+                    <InterfaceName>Ethernet5/20/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet76</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>105</Index>
+                    <InterfaceName>Ethernet5/21/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet80</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>106</Index>
+                    <InterfaceName>Ethernet5/22/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet84</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>107</Index>
+                    <InterfaceName>Ethernet5/23/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet88</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>108</Index>
+                    <InterfaceName>Ethernet5/24/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet92</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>109</Index>
+                    <InterfaceName>Ethernet5/25/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet96</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>110</Index>
+                    <InterfaceName>Ethernet5/26/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet100</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>111</Index>
+                    <InterfaceName>Ethernet5/27/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet104</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>112</Index>
+                    <InterfaceName>Ethernet5/28/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet108</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>113</Index>
+                    <InterfaceName>Ethernet5/29/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet112</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>114</Index>
+                    <InterfaceName>Ethernet5/30/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet116</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>115</Index>
+                    <InterfaceName>Ethernet5/31/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet120</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>116</Index>
+                    <InterfaceName>Ethernet5/32/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet124</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>117</Index>
+                    <InterfaceName>Ethernet5/33/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet128</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>118</Index>
+                    <InterfaceName>Ethernet5/34/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet132</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>119</Index>
+                    <InterfaceName>Ethernet5/35/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet136</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>120</Index>
+                    <InterfaceName>Ethernet5/36/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet140</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>121</Index>
+                    <InterfaceName>Ethernet5/37/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet144</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>122</Index>
+                    <InterfaceName>Ethernet5/38/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet148</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>123</Index>
+                    <InterfaceName>Ethernet5/39/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet152</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>124</Index>
+                    <InterfaceName>Ethernet5/40/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet156</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>125</Index>
+                    <InterfaceName>Ethernet5/41/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet160</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>126</Index>
+                    <InterfaceName>Ethernet5/42/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet164</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>127</Index>
+                    <InterfaceName>Ethernet5/43/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet168</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>128</Index>
+                    <InterfaceName>Ethernet5/44/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet172</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>129</Index>
+                    <InterfaceName>Ethernet5/45/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet176</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>130</Index>
+                    <InterfaceName>Ethernet5/46/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet180</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>131</Index>
+                    <InterfaceName>Ethernet5/47/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet184</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>132</Index>
+                    <InterfaceName>Ethernet5/48/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet188</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>133</Index>
+                    <InterfaceName>Ethernet6/1/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet0</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>134</Index>
+                    <InterfaceName>Ethernet6/2/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet4</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>135</Index>
+                    <InterfaceName>Ethernet6/3/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet8</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>136</Index>
+                    <InterfaceName>Ethernet6/4/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet12</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>137</Index>
+                    <InterfaceName>Ethernet6/5/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet16</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>138</Index>
+                    <InterfaceName>Ethernet6/6/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet20</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>139</Index>
+                    <InterfaceName>Ethernet6/7/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet24</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>140</Index>
+                    <InterfaceName>Ethernet6/8/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet28</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>141</Index>
+                    <InterfaceName>Ethernet6/9/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet32</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>142</Index>
+                    <InterfaceName>Ethernet6/10/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet36</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>143</Index>
+                    <InterfaceName>Ethernet6/11/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet40</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>144</Index>
+                    <InterfaceName>Ethernet6/12/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet44</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>145</Index>
+                    <InterfaceName>Ethernet6/13/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet48</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>146</Index>
+                    <InterfaceName>Ethernet6/14/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet52</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>147</Index>
+                    <InterfaceName>Ethernet6/15/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet56</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>148</Index>
+                    <InterfaceName>Ethernet6/16/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet60</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>149</Index>
+                    <InterfaceName>Ethernet6/17/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet64</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>150</Index>
+                    <InterfaceName>Ethernet6/18/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet68</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>151</Index>
+                    <InterfaceName>Ethernet6/19/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet72</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>152</Index>
+                    <InterfaceName>Ethernet6/20/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet76</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>153</Index>
+                    <InterfaceName>Ethernet6/21/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet80</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>154</Index>
+                    <InterfaceName>Ethernet6/22/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet84</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>155</Index>
+                    <InterfaceName>Ethernet6/23/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet88</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>156</Index>
+                    <InterfaceName>Ethernet6/24/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet92</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>157</Index>
+                    <InterfaceName>Ethernet6/25/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet96</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>158</Index>
+                    <InterfaceName>Ethernet6/26/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet100</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>159</Index>
+                    <InterfaceName>Ethernet6/27/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet104</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>160</Index>
+                    <InterfaceName>Ethernet6/28/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet108</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>161</Index>
+                    <InterfaceName>Ethernet6/29/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet112</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>162</Index>
+                    <InterfaceName>Ethernet6/30/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet116</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>163</Index>
+                    <InterfaceName>Ethernet6/31/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet120</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>164</Index>
+                    <InterfaceName>Ethernet6/32/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet124</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>165</Index>
+                    <InterfaceName>Ethernet6/33/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet128</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>166</Index>
+                    <InterfaceName>Ethernet6/34/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet132</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>167</Index>
+                    <InterfaceName>Ethernet6/35/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet136</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>168</Index>
+                    <InterfaceName>Ethernet6/36/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet140</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>169</Index>
+                    <InterfaceName>Ethernet6/37/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet144</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>170</Index>
+                    <InterfaceName>Ethernet6/38/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet148</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>171</Index>
+                    <InterfaceName>Ethernet6/39/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet152</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>172</Index>
+                    <InterfaceName>Ethernet6/40/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet156</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>173</Index>
+                    <InterfaceName>Ethernet6/41/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet160</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>174</Index>
+                    <InterfaceName>Ethernet6/42/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet164</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>175</Index>
+                    <InterfaceName>Ethernet6/43/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet168</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>176</Index>
+                    <InterfaceName>Ethernet6/44/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet172</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>177</Index>
+                    <InterfaceName>Ethernet6/45/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet176</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>178</Index>
+                    <InterfaceName>Ethernet6/46/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet180</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>179</Index>
+                    <InterfaceName>Ethernet6/47/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet184</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>180</Index>
+                    <InterfaceName>Ethernet6/48/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet188</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>181</Index>
+                    <InterfaceName>Ethernet7/1/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet0</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>182</Index>
+                    <InterfaceName>Ethernet7/2/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet4</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>183</Index>
+                    <InterfaceName>Ethernet7/3/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet8</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>184</Index>
+                    <InterfaceName>Ethernet7/4/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet12</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>185</Index>
+                    <InterfaceName>Ethernet7/5/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet16</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>186</Index>
+                    <InterfaceName>Ethernet7/6/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet20</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>187</Index>
+                    <InterfaceName>Ethernet7/7/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet24</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>188</Index>
+                    <InterfaceName>Ethernet7/8/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet28</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>189</Index>
+                    <InterfaceName>Ethernet7/9/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet32</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>190</Index>
+                    <InterfaceName>Ethernet7/10/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet36</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>191</Index>
+                    <InterfaceName>Ethernet7/11/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet40</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>192</Index>
+                    <InterfaceName>Ethernet7/12/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet44</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>193</Index>
+                    <InterfaceName>Ethernet7/13/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet48</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>194</Index>
+                    <InterfaceName>Ethernet7/14/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet52</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>195</Index>
+                    <InterfaceName>Ethernet7/15/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet56</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>196</Index>
+                    <InterfaceName>Ethernet7/16/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet60</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>197</Index>
+                    <InterfaceName>Ethernet7/17/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet64</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>198</Index>
+                    <InterfaceName>Ethernet7/18/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet68</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>199</Index>
+                    <InterfaceName>Ethernet7/19/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet72</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>200</Index>
+                    <InterfaceName>Ethernet7/20/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet76</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>201</Index>
+                    <InterfaceName>Ethernet7/21/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet80</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>202</Index>
+                    <InterfaceName>Ethernet7/22/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet84</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>203</Index>
+                    <InterfaceName>Ethernet7/23/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet88</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>204</Index>
+                    <InterfaceName>Ethernet7/24/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet92</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>205</Index>
+                    <InterfaceName>Ethernet7/25/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet96</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>206</Index>
+                    <InterfaceName>Ethernet7/26/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet100</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>207</Index>
+                    <InterfaceName>Ethernet7/27/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet104</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>208</Index>
+                    <InterfaceName>Ethernet7/28/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet108</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>209</Index>
+                    <InterfaceName>Ethernet7/29/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet112</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>210</Index>
+                    <InterfaceName>Ethernet7/30/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet116</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>211</Index>
+                    <InterfaceName>Ethernet7/31/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet120</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>212</Index>
+                    <InterfaceName>Ethernet7/32/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet124</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>213</Index>
+                    <InterfaceName>Ethernet7/33/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet128</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>214</Index>
+                    <InterfaceName>Ethernet7/34/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet132</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>215</Index>
+                    <InterfaceName>Ethernet7/35/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet136</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>216</Index>
+                    <InterfaceName>Ethernet7/36/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet140</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>217</Index>
+                    <InterfaceName>Ethernet7/37/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet144</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>218</Index>
+                    <InterfaceName>Ethernet7/38/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet148</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>219</Index>
+                    <InterfaceName>Ethernet7/39/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet152</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>220</Index>
+                    <InterfaceName>Ethernet7/40/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet156</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>221</Index>
+                    <InterfaceName>Ethernet7/41/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet160</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>222</Index>
+                    <InterfaceName>Ethernet7/42/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet164</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>223</Index>
+                    <InterfaceName>Ethernet7/43/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet168</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>224</Index>
+                    <InterfaceName>Ethernet7/44/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet172</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>225</Index>
+                    <InterfaceName>Ethernet7/45/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet176</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>226</Index>
+                    <InterfaceName>Ethernet7/46/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet180</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>227</Index>
+                    <InterfaceName>Ethernet7/47/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet184</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>228</Index>
+                    <InterfaceName>Ethernet7/48/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet188</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>229</Index>
+                    <InterfaceName>Ethernet8/1/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet0</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>230</Index>
+                    <InterfaceName>Ethernet8/2/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet4</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>231</Index>
+                    <InterfaceName>Ethernet8/3/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet8</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>232</Index>
+                    <InterfaceName>Ethernet8/4/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet12</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>233</Index>
+                    <InterfaceName>Ethernet8/5/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet16</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>234</Index>
+                    <InterfaceName>Ethernet8/6/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet20</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>235</Index>
+                    <InterfaceName>Ethernet8/7/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet24</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>236</Index>
+                    <InterfaceName>Ethernet8/8/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet28</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>237</Index>
+                    <InterfaceName>Ethernet8/9/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet32</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>238</Index>
+                    <InterfaceName>Ethernet8/10/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet36</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>239</Index>
+                    <InterfaceName>Ethernet8/11/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet40</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>240</Index>
+                    <InterfaceName>Ethernet8/12/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet44</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>241</Index>
+                    <InterfaceName>Ethernet8/13/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet48</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>242</Index>
+                    <InterfaceName>Ethernet8/14/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet52</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>243</Index>
+                    <InterfaceName>Ethernet8/15/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet56</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>244</Index>
+                    <InterfaceName>Ethernet8/16/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet60</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>245</Index>
+                    <InterfaceName>Ethernet8/17/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet64</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>246</Index>
+                    <InterfaceName>Ethernet8/18/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet68</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>247</Index>
+                    <InterfaceName>Ethernet8/19/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet72</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>248</Index>
+                    <InterfaceName>Ethernet8/20/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet76</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>249</Index>
+                    <InterfaceName>Ethernet8/21/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet80</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>250</Index>
+                    <InterfaceName>Ethernet8/22/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet84</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>251</Index>
+                    <InterfaceName>Ethernet8/23/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet88</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>252</Index>
+                    <InterfaceName>Ethernet8/24/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet92</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>253</Index>
+                    <InterfaceName>Ethernet8/25/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet96</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>254</Index>
+                    <InterfaceName>Ethernet8/26/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet100</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>255</Index>
+                    <InterfaceName>Ethernet8/27/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet104</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>256</Index>
+                    <InterfaceName>Ethernet8/28/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet108</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>257</Index>
+                    <InterfaceName>Ethernet8/29/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet112</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>258</Index>
+                    <InterfaceName>Ethernet8/30/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet116</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>259</Index>
+                    <InterfaceName>Ethernet8/31/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet120</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>260</Index>
+                    <InterfaceName>Ethernet8/32/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet124</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>261</Index>
+                    <InterfaceName>Ethernet8/33/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet128</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>262</Index>
+                    <InterfaceName>Ethernet8/34/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet132</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>263</Index>
+                    <InterfaceName>Ethernet8/35/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet136</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>264</Index>
+                    <InterfaceName>Ethernet8/36/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet140</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>265</Index>
+                    <InterfaceName>Ethernet8/37/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet144</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>266</Index>
+                    <InterfaceName>Ethernet8/38/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet148</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>267</Index>
+                    <InterfaceName>Ethernet8/39/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet152</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>268</Index>
+                    <InterfaceName>Ethernet8/40/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet156</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>269</Index>
+                    <InterfaceName>Ethernet8/41/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet160</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>270</Index>
+                    <InterfaceName>Ethernet8/42/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet164</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>271</Index>
+                    <InterfaceName>Ethernet8/43/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet168</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>272</Index>
+                    <InterfaceName>Ethernet8/44/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet172</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>273</Index>
+                    <InterfaceName>Ethernet8/45/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet176</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>274</Index>
+                    <InterfaceName>Ethernet8/46/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet180</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>275</Index>
+                    <InterfaceName>Ethernet8/47/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet184</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>276</Index>
+                    <InterfaceName>Ethernet8/48/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet188</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>277</Index>
+                    <InterfaceName>Ethernet9/1/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet0</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>278</Index>
+                    <InterfaceName>Ethernet9/2/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet4</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>279</Index>
+                    <InterfaceName>Ethernet9/3/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet8</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>280</Index>
+                    <InterfaceName>Ethernet9/4/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet12</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>281</Index>
+                    <InterfaceName>Ethernet9/5/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet16</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>282</Index>
+                    <InterfaceName>Ethernet9/6/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet20</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>283</Index>
+                    <InterfaceName>Ethernet9/7/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet24</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>284</Index>
+                    <InterfaceName>Ethernet9/8/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet28</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>285</Index>
+                    <InterfaceName>Ethernet9/9/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet32</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>286</Index>
+                    <InterfaceName>Ethernet9/10/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet36</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>287</Index>
+                    <InterfaceName>Ethernet9/11/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet40</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>288</Index>
+                    <InterfaceName>Ethernet9/12/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet44</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>289</Index>
+                    <InterfaceName>Ethernet9/13/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet48</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>290</Index>
+                    <InterfaceName>Ethernet9/14/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet52</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>291</Index>
+                    <InterfaceName>Ethernet9/15/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet56</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>292</Index>
+                    <InterfaceName>Ethernet9/16/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet60</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>293</Index>
+                    <InterfaceName>Ethernet9/17/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet64</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>294</Index>
+                    <InterfaceName>Ethernet9/18/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet68</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>295</Index>
+                    <InterfaceName>Ethernet9/19/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet72</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>296</Index>
+                    <InterfaceName>Ethernet9/20/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet76</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>297</Index>
+                    <InterfaceName>Ethernet9/21/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet80</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>298</Index>
+                    <InterfaceName>Ethernet9/22/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet84</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>299</Index>
+                    <InterfaceName>Ethernet9/23/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet88</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>300</Index>
+                    <InterfaceName>Ethernet9/24/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet92</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>301</Index>
+                    <InterfaceName>Ethernet9/25/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet96</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>302</Index>
+                    <InterfaceName>Ethernet9/26/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet100</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>303</Index>
+                    <InterfaceName>Ethernet9/27/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet104</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>304</Index>
+                    <InterfaceName>Ethernet9/28/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet108</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>305</Index>
+                    <InterfaceName>Ethernet9/29/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet112</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>306</Index>
+                    <InterfaceName>Ethernet9/30/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet116</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>307</Index>
+                    <InterfaceName>Ethernet9/31/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet120</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>308</Index>
+                    <InterfaceName>Ethernet9/32/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet124</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>309</Index>
+                    <InterfaceName>Ethernet9/33/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet128</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>310</Index>
+                    <InterfaceName>Ethernet9/34/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet132</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>311</Index>
+                    <InterfaceName>Ethernet9/35/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet136</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>312</Index>
+                    <InterfaceName>Ethernet9/36/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet140</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>313</Index>
+                    <InterfaceName>Ethernet9/37/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet144</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>314</Index>
+                    <InterfaceName>Ethernet9/38/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet148</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>315</Index>
+                    <InterfaceName>Ethernet9/39/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet152</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>316</Index>
+                    <InterfaceName>Ethernet9/40/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet156</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>317</Index>
+                    <InterfaceName>Ethernet9/41/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet160</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>318</Index>
+                    <InterfaceName>Ethernet9/42/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet164</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>319</Index>
+                    <InterfaceName>Ethernet9/43/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet168</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>320</Index>
+                    <InterfaceName>Ethernet9/44/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet172</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>321</Index>
+                    <InterfaceName>Ethernet9/45/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet176</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>322</Index>
+                    <InterfaceName>Ethernet9/46/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet180</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>323</Index>
+                    <InterfaceName>Ethernet9/47/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet184</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>324</Index>
+                    <InterfaceName>Ethernet9/48/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet188</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>325</Index>
+                    <InterfaceName>Ethernet10/1/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet0</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>326</Index>
+                    <InterfaceName>Ethernet10/2/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet4</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>327</Index>
+                    <InterfaceName>Ethernet10/3/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet8</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>328</Index>
+                    <InterfaceName>Ethernet10/4/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet12</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>329</Index>
+                    <InterfaceName>Ethernet10/5/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet16</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>330</Index>
+                    <InterfaceName>Ethernet10/6/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet20</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>331</Index>
+                    <InterfaceName>Ethernet10/7/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet24</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>332</Index>
+                    <InterfaceName>Ethernet10/8/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet28</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>333</Index>
+                    <InterfaceName>Ethernet10/9/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet32</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>334</Index>
+                    <InterfaceName>Ethernet10/10/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet36</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>335</Index>
+                    <InterfaceName>Ethernet10/11/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet40</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>336</Index>
+                    <InterfaceName>Ethernet10/12/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet44</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>337</Index>
+                    <InterfaceName>Ethernet10/13/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet48</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>338</Index>
+                    <InterfaceName>Ethernet10/14/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet52</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>339</Index>
+                    <InterfaceName>Ethernet10/15/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet56</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>340</Index>
+                    <InterfaceName>Ethernet10/16/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet60</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>341</Index>
+                    <InterfaceName>Ethernet10/17/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet64</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>342</Index>
+                    <InterfaceName>Ethernet10/18/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet68</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>343</Index>
+                    <InterfaceName>Ethernet10/19/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet72</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>344</Index>
+                    <InterfaceName>Ethernet10/20/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet76</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>345</Index>
+                    <InterfaceName>Ethernet10/21/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet80</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>346</Index>
+                    <InterfaceName>Ethernet10/22/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet84</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>347</Index>
+                    <InterfaceName>Ethernet10/23/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet88</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>348</Index>
+                    <InterfaceName>Ethernet10/24/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet92</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>349</Index>
+                    <InterfaceName>Ethernet10/25/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet96</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>350</Index>
+                    <InterfaceName>Ethernet10/26/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet100</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>351</Index>
+                    <InterfaceName>Ethernet10/27/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet104</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>352</Index>
+                    <InterfaceName>Ethernet10/28/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet108</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>353</Index>
+                    <InterfaceName>Ethernet10/29/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet112</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>354</Index>
+                    <InterfaceName>Ethernet10/30/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet116</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>355</Index>
+                    <InterfaceName>Ethernet10/31/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet120</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>356</Index>
+                    <InterfaceName>Ethernet10/32/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet124</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>357</Index>
+                    <InterfaceName>Ethernet10/33/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet128</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>358</Index>
+                    <InterfaceName>Ethernet10/34/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet132</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>359</Index>
+                    <InterfaceName>Ethernet10/35/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet136</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>360</Index>
+                    <InterfaceName>Ethernet10/36/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet140</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>361</Index>
+                    <InterfaceName>Ethernet10/37/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet144</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>362</Index>
+                    <InterfaceName>Ethernet10/38/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet148</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>363</Index>
+                    <InterfaceName>Ethernet10/39/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet152</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>364</Index>
+                    <InterfaceName>Ethernet10/40/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet156</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>365</Index>
+                    <InterfaceName>Ethernet10/41/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet160</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>366</Index>
+                    <InterfaceName>Ethernet10/42/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet164</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>367</Index>
+                    <InterfaceName>Ethernet10/43/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet168</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>368</Index>
+                    <InterfaceName>Ethernet10/44/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet172</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>369</Index>
+                    <InterfaceName>Ethernet10/45/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet176</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>370</Index>
+                    <InterfaceName>Ethernet10/46/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet180</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>371</Index>
+                    <InterfaceName>Ethernet10/47/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet184</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+                <a:EthernetInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds>40000</AlternateSpeeds>
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>372</Index>
+                    <InterfaceName>Ethernet10/48/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName>Ethernet188</SonicName>
+                    <Speed>100000</Speed>
+                </a:EthernetInterface>
+            </EthernetInterfaces>
+            <FlowControl>true</FlowControl>
+            <Height>0</Height>
+            <HwSku>Sonic-Chassis-sku</HwSku>
+            <InfinibandInterfaces
+                xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution" />
+            <InterfaceMetadata
+                xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution">
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet3/1/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-400g-lc-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>3</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:3:0:1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>MacSecEnabled</a:Name>
+                            <a:Value>True</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>8</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet3/2/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-400g-lc-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>3</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>2</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:3:0:2</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>MacSecEnabled</a:Name>
+                            <a:Value>True</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>8</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>2</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet3/3/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-400g-lc-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>3</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>3</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:3:0:3</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>MacSecEnabled</a:Name>
+                            <a:Value>True</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>8</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>3</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet3/4/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-400g-lc-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>3</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>4</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:3:0:4</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>MacSecEnabled</a:Name>
+                            <a:Value>True</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>8</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>4</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet3/5/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-400g-lc-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>3</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>5</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:3:0:5</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>MacSecEnabled</a:Name>
+                            <a:Value>True</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>8</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>5</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet3/6/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-400g-lc-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>3</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>6</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:3:0:6</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>MacSecEnabled</a:Name>
+                            <a:Value>True</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>8</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>6</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet3/7/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-400g-lc-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>3</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>7</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:3:0:7</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>MacSecEnabled</a:Name>
+                            <a:Value>True</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>8</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>7</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet3/8/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-400g-lc-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>3</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>8</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:3:0:8</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>MacSecEnabled</a:Name>
+                            <a:Value>True</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>8</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>8</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet3/9/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-400g-lc-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>3</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>9</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:3:0:9</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>MacSecEnabled</a:Name>
+                            <a:Value>True</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>8</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>9</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet3/10/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-400g-lc-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>3</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>10</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:3:0:10</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>MacSecEnabled</a:Name>
+                            <a:Value>True</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>8</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>10</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet3/11/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-400g-lc-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>3</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>11</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:3:0:11</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>MacSecEnabled</a:Name>
+                            <a:Value>True</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>8</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>11</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet3/12/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-400g-lc-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>3</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>12</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:3:0:12</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>MacSecEnabled</a:Name>
+                            <a:Value>True</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>8</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>12</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet3/13/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-400g-lc-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>3</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>13</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:3:0:13</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>MacSecEnabled</a:Name>
+                            <a:Value>True</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>8</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>13</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet3/14/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-400g-lc-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>3</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>14</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:3:0:14</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>MacSecEnabled</a:Name>
+                            <a:Value>True</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>8</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>14</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet3/15/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-400g-lc-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>3</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>15</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:3:0:15</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>MacSecEnabled</a:Name>
+                            <a:Value>True</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>8</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>15</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet3/16/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-400g-lc-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>3</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>16</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:3:0:16</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>MacSecEnabled</a:Name>
+                            <a:Value>True</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>8</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>16</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet3/17/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-400g-lc-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>3</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>17</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:3:0:17</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>MacSecEnabled</a:Name>
+                            <a:Value>True</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>8</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>17</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet3/18/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-400g-lc-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>3</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>18</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:3:0:18</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>MacSecEnabled</a:Name>
+                            <a:Value>True</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>8</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>18</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet3/19/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-400g-lc-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>3</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>19</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:3:0:19</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>MacSecEnabled</a:Name>
+                            <a:Value>True</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>9</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet3/20/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-400g-lc-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>3</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>20</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:3:0:20</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>MacSecEnabled</a:Name>
+                            <a:Value>True</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>9</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>2</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet3/21/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-400g-lc-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>3</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>21</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:3:0:21</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>MacSecEnabled</a:Name>
+                            <a:Value>True</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>9</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>3</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet3/22/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-400g-lc-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>3</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>22</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:3:0:22</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>MacSecEnabled</a:Name>
+                            <a:Value>True</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>9</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>4</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet3/23/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-400g-lc-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>3</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>23</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:3:0:23</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>MacSecEnabled</a:Name>
+                            <a:Value>True</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>9</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>5</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet3/24/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-400g-lc-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>3</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>24</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:3:0:24</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>MacSecEnabled</a:Name>
+                            <a:Value>True</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>9</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>6</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet3/25/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-400g-lc-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>3</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>25</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:3:0:25</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>MacSecEnabled</a:Name>
+                            <a:Value>True</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>9</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>7</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet3/26/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-400g-lc-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>3</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>26</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:3:0:26</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>MacSecEnabled</a:Name>
+                            <a:Value>True</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>9</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>8</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet3/27/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-400g-lc-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>3</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>27</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:3:0:27</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>MacSecEnabled</a:Name>
+                            <a:Value>True</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>9</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>9</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet3/28/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-400g-lc-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>3</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>28</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:3:0:28</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>MacSecEnabled</a:Name>
+                            <a:Value>True</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>9</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>10</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet3/29/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-400g-lc-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>3</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>29</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:3:0:29</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>MacSecEnabled</a:Name>
+                            <a:Value>True</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>9</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>11</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet3/30/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-400g-lc-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>3</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>30</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:3:0:30</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>MacSecEnabled</a:Name>
+                            <a:Value>True</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>9</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>12</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet3/31/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-400g-lc-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>3</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>31</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:3:0:31</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>MacSecEnabled</a:Name>
+                            <a:Value>True</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>9</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>13</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet3/32/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-400g-lc-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>3</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>32</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:3:0:32</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>MacSecEnabled</a:Name>
+                            <a:Value>True</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>9</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>14</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet3/33/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-400g-lc-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>3</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>33</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:3:0:33</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>MacSecEnabled</a:Name>
+                            <a:Value>True</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>9</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>15</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet3/34/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-400g-lc-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>3</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>34</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:3:0:34</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>MacSecEnabled</a:Name>
+                            <a:Value>True</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>9</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>16</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet3/35/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-400g-lc-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>3</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>35</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:3:0:35</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>MacSecEnabled</a:Name>
+                            <a:Value>True</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>9</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>17</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet3/36/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-400g-lc-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>3</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>36</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:3:0:36</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>MacSecEnabled</a:Name>
+                            <a:Value>True</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>9</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>18</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>cpu3/0</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-400g-lc-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>3</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>37</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:3:0:37</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>8</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>19</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>cpu3/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-400g-lc-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>3</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>37</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:3:0:37</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>8</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>19</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Recirc3/0/0</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-400g-lc-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>3</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>38</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:3:0:38</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>8</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>20</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Recirc3/1/0</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-400g-lc-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>3</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>38</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:3:0:38</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>8</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>20</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Recirc3/0/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-400g-lc-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>3</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>39</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:3:0:39</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>9</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>19</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Recirc3/1/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-400g-lc-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>3</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>39</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:3:0:39</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>9</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>19</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet4/1/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>4</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:4:0:1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>12</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet4/2/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>4</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>2</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:4:0:2</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>12</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>2</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet4/3/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>4</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>3</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:4:0:3</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>12</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>3</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet4/4/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>4</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>4</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:4:0:4</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>12</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>4</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet4/5/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>4</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>5</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:4:0:5</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>12</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>5</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet4/6/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>4</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>6</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:4:0:6</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>12</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>6</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet4/7/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>4</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>7</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:4:0:7</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>12</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>7</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet4/8/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>4</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>8</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:4:0:8</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>12</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>8</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet4/9/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>4</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>9</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:4:0:9</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>12</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>9</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet4/10/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>4</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>10</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:4:0:10</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>12</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>10</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet4/11/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>4</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>11</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:4:0:11</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>12</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>11</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet4/12/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>4</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>12</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:4:0:12</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>12</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>12</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet4/13/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>4</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>13</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:4:0:13</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>12</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>13</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet4/14/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>4</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>14</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:4:0:14</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>12</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>14</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet4/15/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>4</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>15</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:4:0:15</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>12</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>15</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet4/16/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>4</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>16</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:4:0:16</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>12</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>16</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet4/17/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>4</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>17</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:4:0:17</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>12</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>17</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet4/18/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>4</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>18</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:4:0:18</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>12</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>18</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet4/19/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>4</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>19</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:4:0:19</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>12</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>19</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet4/20/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>4</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>20</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:4:0:20</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>12</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>20</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet4/21/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>4</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>21</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:4:0:21</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>12</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>21</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet4/22/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>4</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>22</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:4:0:22</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>12</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>22</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet4/23/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>4</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>23</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:4:0:23</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>12</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>23</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet4/24/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>4</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>24</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:4:0:24</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>12</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>24</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet4/25/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>4</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>25</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:4:0:25</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>12</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>25</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet4/26/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>4</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>26</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:4:0:26</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>12</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>26</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet4/27/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>4</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>27</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:4:0:27</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>12</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>27</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet4/28/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>4</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>28</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:4:0:28</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>12</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>28</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet4/29/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>4</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>29</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:4:0:29</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>12</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>29</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet4/30/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>4</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>30</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:4:0:30</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>12</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>30</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet4/31/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>4</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>31</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:4:0:31</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>12</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>31</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet4/32/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>4</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>32</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:4:0:32</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>12</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>32</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet4/33/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>4</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>33</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:4:0:33</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>12</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>33</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet4/34/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>4</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>34</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:4:0:34</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>12</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>34</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet4/35/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>4</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>35</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:4:0:35</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>12</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>35</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet4/36/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>4</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>36</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:4:0:36</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>12</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>36</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet4/37/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>4</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>37</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:4:0:37</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>12</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>37</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet4/38/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>4</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>38</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:4:0:38</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>12</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>38</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet4/39/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>4</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>39</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:4:0:39</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>12</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>39</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet4/40/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>4</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>40</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:4:0:40</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>12</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>40</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet4/41/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>4</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>41</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:4:0:41</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>12</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>41</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet4/42/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>4</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>42</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:4:0:42</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>12</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>42</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet4/43/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>4</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>43</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:4:0:43</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>12</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>43</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet4/44/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>4</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>44</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:4:0:44</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>12</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>44</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet4/45/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>4</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>45</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:4:0:45</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>12</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>45</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet4/46/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>4</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>46</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:4:0:46</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>12</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>46</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet4/47/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>4</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>47</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:4:0:47</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>12</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>47</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet4/48/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>4</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>48</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:4:0:48</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>12</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>48</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>cpu4/0</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>4</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>49</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:4:0:49</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>12</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>49</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Recirc4/0/0</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>4</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>50</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:4:0:50</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>12</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>50</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Recirc4/0/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>4</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>51</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:4:0:51</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>12</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>51</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet5/1/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>5</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:5:0:1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>16</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet5/2/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>5</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>2</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:5:0:2</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>16</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>2</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet5/3/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>5</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>3</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:5:0:3</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>16</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>3</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet5/4/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>5</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>4</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:5:0:4</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>16</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>4</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet5/5/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>5</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>5</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:5:0:5</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>16</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>5</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet5/6/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>5</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>6</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:5:0:6</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>16</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>6</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet5/7/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>5</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>7</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:5:0:7</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>16</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>7</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet5/8/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>5</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>8</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:5:0:8</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>16</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>8</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet5/9/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>5</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>9</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:5:0:9</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>16</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>9</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet5/10/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>5</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>10</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:5:0:10</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>16</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>10</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet5/11/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>5</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>11</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:5:0:11</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>16</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>11</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet5/12/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>5</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>12</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:5:0:12</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>16</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>12</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet5/13/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>5</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>13</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:5:0:13</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>16</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>13</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet5/14/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>5</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>14</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:5:0:14</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>16</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>14</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet5/15/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>5</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>15</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:5:0:15</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>16</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>15</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet5/16/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>5</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>16</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:5:0:16</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>16</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>16</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet5/17/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>5</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>17</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:5:0:17</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>16</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>17</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet5/18/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>5</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>18</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:5:0:18</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>16</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>18</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet5/19/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>5</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>19</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:5:0:19</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>16</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>19</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet5/20/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>5</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>20</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:5:0:20</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>16</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>20</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet5/21/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>5</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>21</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:5:0:21</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>16</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>21</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet5/22/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>5</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>22</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:5:0:22</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>16</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>22</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet5/23/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>5</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>23</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:5:0:23</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>16</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>23</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet5/24/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>5</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>24</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:5:0:24</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>16</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>24</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet5/25/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>5</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>25</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:5:0:25</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>16</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>25</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet5/26/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>5</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>26</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:5:0:26</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>16</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>26</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet5/27/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>5</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>27</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:5:0:27</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>16</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>27</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet5/28/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>5</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>28</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:5:0:28</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>16</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>28</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet5/29/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>5</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>29</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:5:0:29</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>16</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>29</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet5/30/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>5</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>30</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:5:0:30</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>16</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>30</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet5/31/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>5</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>31</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:5:0:31</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>16</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>31</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet5/32/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>5</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>32</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:5:0:32</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>16</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>32</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet5/33/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>5</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>33</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:5:0:33</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>16</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>33</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet5/34/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>5</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>34</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:5:0:34</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>16</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>34</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet5/35/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>5</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>35</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:5:0:35</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>16</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>35</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet5/36/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>5</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>36</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:5:0:36</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>16</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>36</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet5/37/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>5</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>37</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:5:0:37</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>16</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>37</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet5/38/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>5</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>38</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:5:0:38</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>16</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>38</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet5/39/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>5</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>39</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:5:0:39</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>16</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>39</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet5/40/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>5</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>40</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:5:0:40</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>16</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>40</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet5/41/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>5</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>41</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:5:0:41</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>16</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>41</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet5/42/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>5</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>42</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:5:0:42</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>16</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>42</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet5/43/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>5</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>43</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:5:0:43</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>16</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>43</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet5/44/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>5</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>44</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:5:0:44</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>16</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>44</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet5/45/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>5</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>45</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:5:0:45</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>16</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>45</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet5/46/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>5</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>46</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:5:0:46</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>16</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>46</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet5/47/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>5</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>47</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:5:0:47</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>16</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>47</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet5/48/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>5</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>48</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:5:0:48</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>16</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>48</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>cpu5/0</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>5</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>49</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:5:0:49</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>16</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>49</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Recirc5/0/0</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>5</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>50</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:5:0:50</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>16</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>50</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Recirc5/0/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>5</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>51</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:5:0:51</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>16</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>51</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet6/1/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>6</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:6:0:1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>20</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet6/2/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>6</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>2</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:6:0:2</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>20</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>2</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet6/3/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>6</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>3</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:6:0:3</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>20</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>3</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet6/4/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>6</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>4</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:6:0:4</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>20</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>4</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet6/5/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>6</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>5</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:6:0:5</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>20</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>5</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet6/6/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>6</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>6</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:6:0:6</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>20</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>6</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet6/7/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>6</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>7</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:6:0:7</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>20</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>7</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet6/8/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>6</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>8</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:6:0:8</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>20</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>8</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet6/9/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>6</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>9</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:6:0:9</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>20</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>9</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet6/10/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>6</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>10</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:6:0:10</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>20</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>10</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet6/11/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>6</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>11</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:6:0:11</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>20</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>11</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet6/12/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>6</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>12</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:6:0:12</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>20</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>12</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet6/13/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>6</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>13</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:6:0:13</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>20</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>13</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet6/14/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>6</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>14</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:6:0:14</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>20</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>14</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet6/15/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>6</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>15</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:6:0:15</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>20</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>15</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet6/16/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>6</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>16</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:6:0:16</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>20</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>16</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet6/17/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>6</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>17</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:6:0:17</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>20</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>17</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet6/18/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>6</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>18</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:6:0:18</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>20</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>18</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet6/19/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>6</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>19</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:6:0:19</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>20</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>19</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet6/20/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>6</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>20</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:6:0:20</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>20</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>20</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet6/21/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>6</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>21</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:6:0:21</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>20</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>21</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet6/22/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>6</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>22</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:6:0:22</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>20</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>22</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet6/23/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>6</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>23</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:6:0:23</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>20</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>23</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet6/24/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>6</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>24</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:6:0:24</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>20</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>24</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet6/25/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>6</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>25</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:6:0:25</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>20</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>25</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet6/26/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>6</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>26</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:6:0:26</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>20</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>26</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet6/27/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>6</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>27</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:6:0:27</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>20</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>27</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet6/28/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>6</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>28</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:6:0:28</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>20</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>28</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet6/29/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>6</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>29</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:6:0:29</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>20</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>29</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet6/30/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>6</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>30</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:6:0:30</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>20</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>30</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet6/31/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>6</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>31</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:6:0:31</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>20</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>31</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet6/32/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>6</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>32</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:6:0:32</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>20</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>32</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet6/33/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>6</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>33</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:6:0:33</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>20</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>33</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet6/34/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>6</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>34</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:6:0:34</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>20</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>34</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet6/35/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>6</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>35</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:6:0:35</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>20</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>35</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet6/36/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>6</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>36</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:6:0:36</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>20</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>36</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet6/37/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>6</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>37</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:6:0:37</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>20</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>37</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet6/38/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>6</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>38</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:6:0:38</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>20</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>38</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet6/39/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>6</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>39</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:6:0:39</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>20</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>39</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet6/40/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>6</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>40</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:6:0:40</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>20</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>40</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet6/41/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>6</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>41</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:6:0:41</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>20</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>41</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet6/42/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>6</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>42</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:6:0:42</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>20</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>42</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet6/43/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>6</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>43</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:6:0:43</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>20</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>43</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet6/44/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>6</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>44</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:6:0:44</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>20</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>44</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet6/45/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>6</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>45</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:6:0:45</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>20</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>45</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet6/46/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>6</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>46</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:6:0:46</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>20</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>46</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet6/47/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>6</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>47</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:6:0:47</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>20</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>47</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet6/48/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>6</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>48</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:6:0:48</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>20</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>48</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>cpu6/0</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>6</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>49</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:6:0:49</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>20</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>49</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Recirc6/0/0</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>6</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>50</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:6:0:50</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>20</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>50</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Recirc6/0/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>6</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>51</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:6:0:51</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>20</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>51</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet7/1/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>7</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:7:0:1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>24</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet7/2/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>7</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>2</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:7:0:2</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>24</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>2</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet7/3/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>7</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>3</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:7:0:3</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>24</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>3</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet7/4/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>7</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>4</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:7:0:4</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>24</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>4</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet7/5/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>7</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>5</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:7:0:5</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>24</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>5</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet7/6/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>7</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>6</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:7:0:6</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>24</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>6</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet7/7/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>7</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>7</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:7:0:7</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>24</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>7</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet7/8/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>7</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>8</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:7:0:8</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>24</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>8</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet7/9/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>7</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>9</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:7:0:9</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>24</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>9</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet7/10/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>7</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>10</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:7:0:10</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>24</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>10</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet7/11/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>7</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>11</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:7:0:11</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>24</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>11</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet7/12/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>7</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>12</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:7:0:12</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>24</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>12</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet7/13/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>7</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>13</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:7:0:13</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>24</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>13</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet7/14/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>7</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>14</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:7:0:14</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>24</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>14</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet7/15/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>7</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>15</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:7:0:15</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>24</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>15</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet7/16/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>7</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>16</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:7:0:16</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>24</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>16</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet7/17/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>7</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>17</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:7:0:17</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>24</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>17</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet7/18/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>7</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>18</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:7:0:18</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>24</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>18</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet7/19/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>7</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>19</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:7:0:19</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>24</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>19</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet7/20/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>7</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>20</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:7:0:20</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>24</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>20</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet7/21/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>7</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>21</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:7:0:21</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>24</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>21</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet7/22/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>7</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>22</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:7:0:22</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>24</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>22</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet7/23/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>7</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>23</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:7:0:23</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>24</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>23</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet7/24/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>7</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>24</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:7:0:24</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>24</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>24</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet7/25/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>7</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>25</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:7:0:25</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>24</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>25</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet7/26/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>7</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>26</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:7:0:26</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>24</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>26</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet7/27/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>7</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>27</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:7:0:27</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>24</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>27</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet7/28/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>7</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>28</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:7:0:28</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>24</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>28</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet7/29/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>7</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>29</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:7:0:29</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>24</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>29</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet7/30/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>7</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>30</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:7:0:30</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>24</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>30</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet7/31/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>7</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>31</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:7:0:31</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>24</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>31</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet7/32/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>7</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>32</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:7:0:32</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>24</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>32</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet7/33/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>7</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>33</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:7:0:33</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>24</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>33</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet7/34/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>7</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>34</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:7:0:34</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>24</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>34</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet7/35/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>7</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>35</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:7:0:35</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>24</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>35</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet7/36/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>7</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>36</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:7:0:36</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>24</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>36</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet7/37/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>7</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>37</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:7:0:37</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>24</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>37</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet7/38/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>7</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>38</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:7:0:38</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>24</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>38</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet7/39/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>7</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>39</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:7:0:39</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>24</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>39</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet7/40/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>7</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>40</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:7:0:40</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>24</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>40</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet7/41/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>7</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>41</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:7:0:41</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>24</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>41</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet7/42/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>7</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>42</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:7:0:42</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>24</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>42</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet7/43/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>7</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>43</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:7:0:43</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>24</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>43</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet7/44/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>7</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>44</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:7:0:44</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>24</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>44</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet7/45/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>7</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>45</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:7:0:45</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>24</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>45</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet7/46/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>7</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>46</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:7:0:46</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>24</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>46</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet7/47/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>7</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>47</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:7:0:47</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>24</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>47</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet7/48/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>7</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>48</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:7:0:48</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>24</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>48</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>cpu7/0</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>7</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>49</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:7:0:49</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>24</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>49</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Recirc7/0/0</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>7</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>50</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:7:0:50</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>24</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>50</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Recirc7/0/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>7</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>51</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:7:0:51</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>24</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>51</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet8/1/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>8</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:8:0:1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>28</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet8/2/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>8</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>2</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:8:0:2</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>28</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>2</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet8/3/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>8</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>3</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:8:0:3</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>28</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>3</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet8/4/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>8</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>4</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:8:0:4</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>28</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>4</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet8/5/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>8</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>5</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:8:0:5</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>28</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>5</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet8/6/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>8</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>6</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:8:0:6</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>28</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>6</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet8/7/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>8</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>7</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:8:0:7</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>28</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>7</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet8/8/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>8</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>8</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:8:0:8</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>28</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>8</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet8/9/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>8</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>9</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:8:0:9</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>28</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>9</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet8/10/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>8</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>10</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:8:0:10</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>28</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>10</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet8/11/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>8</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>11</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:8:0:11</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>28</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>11</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet8/12/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>8</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>12</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:8:0:12</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>28</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>12</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet8/13/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>8</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>13</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:8:0:13</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>28</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>13</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet8/14/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>8</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>14</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:8:0:14</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>28</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>14</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet8/15/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>8</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>15</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:8:0:15</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>28</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>15</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet8/16/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>8</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>16</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:8:0:16</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>28</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>16</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet8/17/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>8</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>17</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:8:0:17</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>28</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>17</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet8/18/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>8</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>18</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:8:0:18</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>28</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>18</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet8/19/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>8</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>19</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:8:0:19</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>28</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>19</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet8/20/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>8</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>20</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:8:0:20</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>28</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>20</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet8/21/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>8</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>21</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:8:0:21</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>28</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>21</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet8/22/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>8</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>22</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:8:0:22</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>28</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>22</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet8/23/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>8</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>23</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:8:0:23</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>28</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>23</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet8/24/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>8</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>24</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:8:0:24</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>28</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>24</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet8/25/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>8</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>25</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:8:0:25</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>28</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>25</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet8/26/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>8</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>26</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:8:0:26</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>28</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>26</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet8/27/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>8</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>27</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:8:0:27</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>28</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>27</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet8/28/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>8</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>28</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:8:0:28</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>28</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>28</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet8/29/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>8</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>29</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:8:0:29</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>28</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>29</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet8/30/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>8</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>30</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:8:0:30</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>28</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>30</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet8/31/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>8</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>31</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:8:0:31</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>28</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>31</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet8/32/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>8</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>32</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:8:0:32</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>28</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>32</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet8/33/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>8</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>33</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:8:0:33</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>28</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>33</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet8/34/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>8</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>34</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:8:0:34</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>28</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>34</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet8/35/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>8</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>35</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:8:0:35</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>28</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>35</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet8/36/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>8</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>36</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:8:0:36</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>28</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>36</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet8/37/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>8</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>37</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:8:0:37</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>28</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>37</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet8/38/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>8</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>38</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:8:0:38</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>28</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>38</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet8/39/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>8</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>39</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:8:0:39</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>28</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>39</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet8/40/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>8</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>40</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:8:0:40</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>28</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>40</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet8/41/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>8</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>41</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:8:0:41</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>28</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>41</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet8/42/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>8</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>42</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:8:0:42</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>28</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>42</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet8/43/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>8</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>43</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:8:0:43</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>28</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>43</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet8/44/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>8</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>44</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:8:0:44</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>28</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>44</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet8/45/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>8</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>45</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:8:0:45</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>28</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>45</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet8/46/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>8</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>46</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:8:0:46</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>28</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>46</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet8/47/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>8</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>47</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:8:0:47</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>28</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>47</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet8/48/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>8</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>48</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:8:0:48</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>28</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>48</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>cpu8/0</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>8</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>49</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:8:0:49</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>28</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>49</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Recirc8/0/0</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>8</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>50</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:8:0:50</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>28</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>50</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Recirc8/0/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>8</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>51</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:8:0:51</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>28</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>51</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet9/1/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>9</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:9:0:1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>32</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet9/2/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>9</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>2</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:9:0:2</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>32</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>2</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet9/3/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>9</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>3</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:9:0:3</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>32</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>3</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet9/4/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>9</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>4</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:9:0:4</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>32</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>4</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet9/5/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>9</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>5</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:9:0:5</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>32</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>5</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet9/6/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>9</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>6</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:9:0:6</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>32</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>6</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet9/7/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>9</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>7</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:9:0:7</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>32</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>7</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet9/8/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>9</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>8</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:9:0:8</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>32</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>8</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet9/9/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>9</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>9</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:9:0:9</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>32</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>9</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet9/10/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>9</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>10</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:9:0:10</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>32</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>10</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet9/11/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>9</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>11</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:9:0:11</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>32</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>11</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet9/12/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>9</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>12</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:9:0:12</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>32</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>12</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet9/13/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>9</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>13</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:9:0:13</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>32</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>13</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet9/14/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>9</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>14</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:9:0:14</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>32</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>14</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet9/15/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>9</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>15</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:9:0:15</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>32</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>15</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet9/16/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>9</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>16</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:9:0:16</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>32</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>16</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet9/17/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>9</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>17</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:9:0:17</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>32</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>17</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet9/18/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>9</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>18</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:9:0:18</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>32</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>18</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet9/19/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>9</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>19</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:9:0:19</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>32</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>19</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet9/20/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>9</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>20</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:9:0:20</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>32</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>20</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet9/21/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>9</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>21</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:9:0:21</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>32</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>21</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet9/22/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>9</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>22</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:9:0:22</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>32</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>22</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet9/23/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>9</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>23</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:9:0:23</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>32</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>23</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet9/24/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>9</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>24</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:9:0:24</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>32</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>24</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet9/25/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>9</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>25</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:9:0:25</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>32</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>25</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet9/26/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>9</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>26</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:9:0:26</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>32</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>26</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet9/27/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>9</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>27</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:9:0:27</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>32</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>27</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet9/28/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>9</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>28</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:9:0:28</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>32</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>28</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet9/29/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>9</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>29</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:9:0:29</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>32</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>29</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet9/30/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>9</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>30</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:9:0:30</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>32</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>30</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet9/31/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>9</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>31</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:9:0:31</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>32</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>31</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet9/32/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>9</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>32</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:9:0:32</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>32</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>32</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet9/33/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>9</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>33</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:9:0:33</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>32</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>33</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet9/34/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>9</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>34</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:9:0:34</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>32</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>34</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet9/35/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>9</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>35</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:9:0:35</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>32</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>35</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet9/36/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>9</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>36</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:9:0:36</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>32</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>36</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet9/37/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>9</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>37</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:9:0:37</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>32</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>37</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet9/38/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>9</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>38</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:9:0:38</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>32</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>38</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet9/39/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>9</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>39</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:9:0:39</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>32</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>39</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet9/40/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>9</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>40</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:9:0:40</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>32</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>40</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet9/41/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>9</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>41</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:9:0:41</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>32</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>41</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet9/42/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>9</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>42</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:9:0:42</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>32</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>42</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet9/43/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>9</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>43</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:9:0:43</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>32</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>43</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet9/44/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>9</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>44</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:9:0:44</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>32</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>44</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet9/45/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>9</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>45</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:9:0:45</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>32</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>45</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet9/46/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>9</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>46</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:9:0:46</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>32</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>46</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet9/47/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>9</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>47</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:9:0:47</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>32</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>47</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet9/48/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>9</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>48</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:9:0:48</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>32</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>48</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet10/1/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>10</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:10:0:1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>36</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet10/2/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>10</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>2</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:10:0:2</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>36</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>2</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet10/3/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>10</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>3</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:10:0:3</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>36</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>3</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet10/4/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>10</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>4</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:10:0:4</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>36</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>4</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet10/5/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>10</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>5</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:10:0:5</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>36</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>5</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet10/6/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>10</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>6</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:10:0:6</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>36</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>6</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet10/7/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>10</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>7</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:10:0:7</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>36</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>7</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet10/8/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>10</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>8</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:10:0:8</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>36</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>8</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet10/9/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>10</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>9</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:10:0:9</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>36</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>9</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet10/10/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>10</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>10</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:10:0:10</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>36</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>10</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet10/11/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>10</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>11</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:10:0:11</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>36</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>11</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet10/12/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>10</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>12</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:10:0:12</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>36</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>12</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet10/13/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>10</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>13</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:10:0:13</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>36</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>13</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet10/14/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>10</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>14</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:10:0:14</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>36</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>14</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet10/15/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>10</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>15</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:10:0:15</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>36</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>15</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet10/16/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>10</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>16</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:10:0:16</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>36</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>16</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet10/17/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>10</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>17</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:10:0:17</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>36</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>17</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet10/18/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>10</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>18</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:10:0:18</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>36</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>18</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet10/19/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>10</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>19</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:10:0:19</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>36</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>19</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet10/20/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>10</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>20</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:10:0:20</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>36</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>20</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet10/21/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>10</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>21</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:10:0:21</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>36</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>21</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet10/22/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>10</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>22</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:10:0:22</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>36</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>22</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet10/23/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>10</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>23</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:10:0:23</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>36</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>23</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet10/24/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>10</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>24</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:10:0:24</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>36</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>24</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet10/25/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>10</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>25</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:10:0:25</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>36</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>25</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet10/26/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>10</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>26</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:10:0:26</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>36</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>26</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet10/27/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>10</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>27</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:10:0:27</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>36</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>27</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet10/28/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>10</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>28</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:10:0:28</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>36</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>28</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet10/29/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>10</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>29</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:10:0:29</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>36</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>29</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet10/30/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>10</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>30</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:10:0:30</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>36</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>30</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet10/31/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>10</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>31</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:10:0:31</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>36</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>31</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet10/32/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>10</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>32</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:10:0:32</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>36</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>32</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet10/33/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>10</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>33</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:10:0:33</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>36</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>33</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet10/34/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>10</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>34</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:10:0:34</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>36</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>34</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet10/35/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>10</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>35</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:10:0:35</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>36</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>35</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet10/36/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>10</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>36</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:10:0:36</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>36</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>36</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet10/37/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>10</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>37</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:10:0:37</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>36</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>37</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet10/38/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>10</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>38</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:10:0:38</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>36</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>38</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet10/39/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>10</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>39</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:10:0:39</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>36</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>39</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet10/40/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>10</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>40</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:10:0:40</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>36</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>40</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet10/41/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>10</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>41</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:10:0:41</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>36</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>41</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet10/42/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>10</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>42</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:10:0:42</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>36</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>42</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet10/43/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>10</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>43</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:10:0:43</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>36</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>43</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet10/44/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>10</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>44</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:10:0:44</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>36</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>44</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet10/45/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>10</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>45</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:10:0:45</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>36</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>45</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet10/46/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>10</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>46</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:10:0:46</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>36</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>46</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet10/47/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>10</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>47</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:10:0:47</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>36</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>47</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Ethernet10/48/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>10</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>48</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:10:0:48</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>36</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>48</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>cpu10/0</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>10</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>49</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:10:0:49</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>36</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>49</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Recirc10/0/0</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>10</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>50</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:10:0:50</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>36</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>50</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+                <a:DeviceInterfaceMetadata>
+                    <a:InterfaceName>Recirc10/0/1</a:InterfaceName>
+                    <a:Properties>
+                        <a:InterfaceProperty>
+                            <a:Name>LineCardSku</a:Name>
+                            <a:Value>Sonic-lc-100g-sku</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>SlotIndex</a:Name>
+                            <a:Value>10</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ChassisIndex</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>PortIndex</a:Name>
+                            <a:Value>51</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceGroupIndex</a:Name>
+                            <a:Value>0:10:0:51</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>InterfaceSubGroupIndex</a:Name>
+                            <a:Value>1</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>ProviderChipName</a:Name>
+                            <a:Value>ASIC0</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicSwitchId</a:Name>
+                            <a:Value>36</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>AsicInterfaceIndex</a:Name>
+                            <a:Value>51</a:Value>
+                        </a:InterfaceProperty>
+                        <a:InterfaceProperty>
+                            <a:Name>CoreId</a:Name>
+                            <a:Value>0</a:Value>
+                        </a:InterfaceProperty>
+                    </a:Properties>
+                </a:DeviceInterfaceMetadata>
+            </InterfaceMetadata>
+            <ManagementInterfaces
+                xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution">
+                <a:ManagementInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1</Index>
+                    <InterfaceName>Management1/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>1000</Speed>
+                </a:ManagementInterface>
+            </ManagementInterfaces>
+            <OpticalInterfaces
+                xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution">
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1</Index>
+                    <InterfaceName>Ethernet3/1/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>2</Index>
+                    <InterfaceName>Ethernet3/1/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>3</Index>
+                    <InterfaceName>Ethernet3/1/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>4</Index>
+                    <InterfaceName>Ethernet3/2/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>5</Index>
+                    <InterfaceName>Ethernet3/2/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>6</Index>
+                    <InterfaceName>Ethernet3/2/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>7</Index>
+                    <InterfaceName>Ethernet3/3/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>8</Index>
+                    <InterfaceName>Ethernet3/3/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>9</Index>
+                    <InterfaceName>Ethernet3/3/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>10</Index>
+                    <InterfaceName>Ethernet3/4/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>11</Index>
+                    <InterfaceName>Ethernet3/4/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>12</Index>
+                    <InterfaceName>Ethernet3/4/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>13</Index>
+                    <InterfaceName>Ethernet3/5/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>14</Index>
+                    <InterfaceName>Ethernet3/5/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>15</Index>
+                    <InterfaceName>Ethernet3/5/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>16</Index>
+                    <InterfaceName>Ethernet3/6/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>17</Index>
+                    <InterfaceName>Ethernet3/6/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>18</Index>
+                    <InterfaceName>Ethernet3/6/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>19</Index>
+                    <InterfaceName>Ethernet3/7/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>20</Index>
+                    <InterfaceName>Ethernet3/7/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>21</Index>
+                    <InterfaceName>Ethernet3/7/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>22</Index>
+                    <InterfaceName>Ethernet3/8/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>23</Index>
+                    <InterfaceName>Ethernet3/8/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>24</Index>
+                    <InterfaceName>Ethernet3/8/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>25</Index>
+                    <InterfaceName>Ethernet3/9/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>26</Index>
+                    <InterfaceName>Ethernet3/9/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>27</Index>
+                    <InterfaceName>Ethernet3/9/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>28</Index>
+                    <InterfaceName>Ethernet3/10/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>29</Index>
+                    <InterfaceName>Ethernet3/10/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>30</Index>
+                    <InterfaceName>Ethernet3/10/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>31</Index>
+                    <InterfaceName>Ethernet3/11/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>32</Index>
+                    <InterfaceName>Ethernet3/11/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>33</Index>
+                    <InterfaceName>Ethernet3/11/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>34</Index>
+                    <InterfaceName>Ethernet3/12/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>35</Index>
+                    <InterfaceName>Ethernet3/12/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>36</Index>
+                    <InterfaceName>Ethernet3/12/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>37</Index>
+                    <InterfaceName>Ethernet3/13/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>38</Index>
+                    <InterfaceName>Ethernet3/13/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>39</Index>
+                    <InterfaceName>Ethernet3/13/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>40</Index>
+                    <InterfaceName>Ethernet3/14/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>41</Index>
+                    <InterfaceName>Ethernet3/14/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>42</Index>
+                    <InterfaceName>Ethernet3/14/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>43</Index>
+                    <InterfaceName>Ethernet3/15/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>44</Index>
+                    <InterfaceName>Ethernet3/15/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>45</Index>
+                    <InterfaceName>Ethernet3/15/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>46</Index>
+                    <InterfaceName>Ethernet3/16/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>47</Index>
+                    <InterfaceName>Ethernet3/16/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>48</Index>
+                    <InterfaceName>Ethernet3/16/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>49</Index>
+                    <InterfaceName>Ethernet3/17/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>50</Index>
+                    <InterfaceName>Ethernet3/17/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>51</Index>
+                    <InterfaceName>Ethernet3/17/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>52</Index>
+                    <InterfaceName>Ethernet3/18/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>53</Index>
+                    <InterfaceName>Ethernet3/18/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>54</Index>
+                    <InterfaceName>Ethernet3/18/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>55</Index>
+                    <InterfaceName>Ethernet3/19/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>56</Index>
+                    <InterfaceName>Ethernet3/19/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>57</Index>
+                    <InterfaceName>Ethernet3/19/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>58</Index>
+                    <InterfaceName>Ethernet3/20/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>59</Index>
+                    <InterfaceName>Ethernet3/20/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>60</Index>
+                    <InterfaceName>Ethernet3/20/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>61</Index>
+                    <InterfaceName>Ethernet3/21/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>62</Index>
+                    <InterfaceName>Ethernet3/21/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>63</Index>
+                    <InterfaceName>Ethernet3/21/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>64</Index>
+                    <InterfaceName>Ethernet3/22/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>65</Index>
+                    <InterfaceName>Ethernet3/22/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>66</Index>
+                    <InterfaceName>Ethernet3/22/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>67</Index>
+                    <InterfaceName>Ethernet3/23/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>68</Index>
+                    <InterfaceName>Ethernet3/23/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>69</Index>
+                    <InterfaceName>Ethernet3/23/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>70</Index>
+                    <InterfaceName>Ethernet3/24/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>71</Index>
+                    <InterfaceName>Ethernet3/24/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>72</Index>
+                    <InterfaceName>Ethernet3/24/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>73</Index>
+                    <InterfaceName>Ethernet3/25/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>74</Index>
+                    <InterfaceName>Ethernet3/25/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>75</Index>
+                    <InterfaceName>Ethernet3/25/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>76</Index>
+                    <InterfaceName>Ethernet3/26/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>77</Index>
+                    <InterfaceName>Ethernet3/26/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>78</Index>
+                    <InterfaceName>Ethernet3/26/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>79</Index>
+                    <InterfaceName>Ethernet3/27/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>80</Index>
+                    <InterfaceName>Ethernet3/27/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>81</Index>
+                    <InterfaceName>Ethernet3/27/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>82</Index>
+                    <InterfaceName>Ethernet3/28/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>83</Index>
+                    <InterfaceName>Ethernet3/28/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>84</Index>
+                    <InterfaceName>Ethernet3/28/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>85</Index>
+                    <InterfaceName>Ethernet3/29/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>86</Index>
+                    <InterfaceName>Ethernet3/29/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>87</Index>
+                    <InterfaceName>Ethernet3/29/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>88</Index>
+                    <InterfaceName>Ethernet3/30/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>89</Index>
+                    <InterfaceName>Ethernet3/30/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>90</Index>
+                    <InterfaceName>Ethernet3/30/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>91</Index>
+                    <InterfaceName>Ethernet3/31/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>92</Index>
+                    <InterfaceName>Ethernet3/31/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>93</Index>
+                    <InterfaceName>Ethernet3/31/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>94</Index>
+                    <InterfaceName>Ethernet3/32/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>95</Index>
+                    <InterfaceName>Ethernet3/32/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>96</Index>
+                    <InterfaceName>Ethernet3/32/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>97</Index>
+                    <InterfaceName>Ethernet3/33/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>98</Index>
+                    <InterfaceName>Ethernet3/33/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>99</Index>
+                    <InterfaceName>Ethernet3/33/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>100</Index>
+                    <InterfaceName>Ethernet3/34/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>101</Index>
+                    <InterfaceName>Ethernet3/34/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>102</Index>
+                    <InterfaceName>Ethernet3/34/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>103</Index>
+                    <InterfaceName>Ethernet3/35/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>104</Index>
+                    <InterfaceName>Ethernet3/35/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>105</Index>
+                    <InterfaceName>Ethernet3/35/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>106</Index>
+                    <InterfaceName>Ethernet3/36/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>107</Index>
+                    <InterfaceName>Ethernet3/36/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>108</Index>
+                    <InterfaceName>Ethernet3/36/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>109</Index>
+                    <InterfaceName>Ethernet4/1/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>110</Index>
+                    <InterfaceName>Ethernet4/1/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>111</Index>
+                    <InterfaceName>Ethernet4/1/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>112</Index>
+                    <InterfaceName>Ethernet4/2/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>113</Index>
+                    <InterfaceName>Ethernet4/2/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>114</Index>
+                    <InterfaceName>Ethernet4/2/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>115</Index>
+                    <InterfaceName>Ethernet4/3/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>116</Index>
+                    <InterfaceName>Ethernet4/3/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>117</Index>
+                    <InterfaceName>Ethernet4/3/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>118</Index>
+                    <InterfaceName>Ethernet4/4/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>119</Index>
+                    <InterfaceName>Ethernet4/4/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>120</Index>
+                    <InterfaceName>Ethernet4/4/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>121</Index>
+                    <InterfaceName>Ethernet4/5/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>122</Index>
+                    <InterfaceName>Ethernet4/5/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>123</Index>
+                    <InterfaceName>Ethernet4/5/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>124</Index>
+                    <InterfaceName>Ethernet4/6/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>125</Index>
+                    <InterfaceName>Ethernet4/6/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>126</Index>
+                    <InterfaceName>Ethernet4/6/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>127</Index>
+                    <InterfaceName>Ethernet4/7/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>128</Index>
+                    <InterfaceName>Ethernet4/7/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>129</Index>
+                    <InterfaceName>Ethernet4/7/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>130</Index>
+                    <InterfaceName>Ethernet4/8/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>131</Index>
+                    <InterfaceName>Ethernet4/8/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>132</Index>
+                    <InterfaceName>Ethernet4/8/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>133</Index>
+                    <InterfaceName>Ethernet4/9/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>134</Index>
+                    <InterfaceName>Ethernet4/9/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>135</Index>
+                    <InterfaceName>Ethernet4/9/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>136</Index>
+                    <InterfaceName>Ethernet4/10/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>137</Index>
+                    <InterfaceName>Ethernet4/10/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>138</Index>
+                    <InterfaceName>Ethernet4/10/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>139</Index>
+                    <InterfaceName>Ethernet4/11/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>140</Index>
+                    <InterfaceName>Ethernet4/11/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>141</Index>
+                    <InterfaceName>Ethernet4/11/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>142</Index>
+                    <InterfaceName>Ethernet4/12/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>143</Index>
+                    <InterfaceName>Ethernet4/12/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>144</Index>
+                    <InterfaceName>Ethernet4/12/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>145</Index>
+                    <InterfaceName>Ethernet4/13/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>146</Index>
+                    <InterfaceName>Ethernet4/13/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>147</Index>
+                    <InterfaceName>Ethernet4/13/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>148</Index>
+                    <InterfaceName>Ethernet4/14/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>149</Index>
+                    <InterfaceName>Ethernet4/14/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>150</Index>
+                    <InterfaceName>Ethernet4/14/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>151</Index>
+                    <InterfaceName>Ethernet4/15/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>152</Index>
+                    <InterfaceName>Ethernet4/15/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>153</Index>
+                    <InterfaceName>Ethernet4/15/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>154</Index>
+                    <InterfaceName>Ethernet4/16/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>155</Index>
+                    <InterfaceName>Ethernet4/16/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>156</Index>
+                    <InterfaceName>Ethernet4/16/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>157</Index>
+                    <InterfaceName>Ethernet4/17/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>158</Index>
+                    <InterfaceName>Ethernet4/17/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>159</Index>
+                    <InterfaceName>Ethernet4/17/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>160</Index>
+                    <InterfaceName>Ethernet4/18/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>161</Index>
+                    <InterfaceName>Ethernet4/18/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>162</Index>
+                    <InterfaceName>Ethernet4/18/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>163</Index>
+                    <InterfaceName>Ethernet4/19/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>164</Index>
+                    <InterfaceName>Ethernet4/19/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>165</Index>
+                    <InterfaceName>Ethernet4/19/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>166</Index>
+                    <InterfaceName>Ethernet4/20/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>167</Index>
+                    <InterfaceName>Ethernet4/20/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>168</Index>
+                    <InterfaceName>Ethernet4/20/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>169</Index>
+                    <InterfaceName>Ethernet4/21/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>170</Index>
+                    <InterfaceName>Ethernet4/21/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>171</Index>
+                    <InterfaceName>Ethernet4/21/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>172</Index>
+                    <InterfaceName>Ethernet4/22/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>173</Index>
+                    <InterfaceName>Ethernet4/22/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>174</Index>
+                    <InterfaceName>Ethernet4/22/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>175</Index>
+                    <InterfaceName>Ethernet4/23/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>176</Index>
+                    <InterfaceName>Ethernet4/23/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>177</Index>
+                    <InterfaceName>Ethernet4/23/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>178</Index>
+                    <InterfaceName>Ethernet4/24/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>179</Index>
+                    <InterfaceName>Ethernet4/24/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>180</Index>
+                    <InterfaceName>Ethernet4/24/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>181</Index>
+                    <InterfaceName>Ethernet4/25/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>182</Index>
+                    <InterfaceName>Ethernet4/25/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>183</Index>
+                    <InterfaceName>Ethernet4/25/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>184</Index>
+                    <InterfaceName>Ethernet4/26/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>185</Index>
+                    <InterfaceName>Ethernet4/26/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>186</Index>
+                    <InterfaceName>Ethernet4/26/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>187</Index>
+                    <InterfaceName>Ethernet4/27/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>188</Index>
+                    <InterfaceName>Ethernet4/27/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>189</Index>
+                    <InterfaceName>Ethernet4/27/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>190</Index>
+                    <InterfaceName>Ethernet4/28/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>191</Index>
+                    <InterfaceName>Ethernet4/28/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>192</Index>
+                    <InterfaceName>Ethernet4/28/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>193</Index>
+                    <InterfaceName>Ethernet4/29/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>194</Index>
+                    <InterfaceName>Ethernet4/29/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>195</Index>
+                    <InterfaceName>Ethernet4/29/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>196</Index>
+                    <InterfaceName>Ethernet4/30/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>197</Index>
+                    <InterfaceName>Ethernet4/30/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>198</Index>
+                    <InterfaceName>Ethernet4/30/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>199</Index>
+                    <InterfaceName>Ethernet4/31/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>200</Index>
+                    <InterfaceName>Ethernet4/31/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>201</Index>
+                    <InterfaceName>Ethernet4/31/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>202</Index>
+                    <InterfaceName>Ethernet4/32/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>203</Index>
+                    <InterfaceName>Ethernet4/32/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>204</Index>
+                    <InterfaceName>Ethernet4/32/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>205</Index>
+                    <InterfaceName>Ethernet4/33/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>206</Index>
+                    <InterfaceName>Ethernet4/33/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>207</Index>
+                    <InterfaceName>Ethernet4/33/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>208</Index>
+                    <InterfaceName>Ethernet4/34/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>209</Index>
+                    <InterfaceName>Ethernet4/34/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>210</Index>
+                    <InterfaceName>Ethernet4/34/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>211</Index>
+                    <InterfaceName>Ethernet4/35/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>212</Index>
+                    <InterfaceName>Ethernet4/35/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>213</Index>
+                    <InterfaceName>Ethernet4/35/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>214</Index>
+                    <InterfaceName>Ethernet4/36/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>215</Index>
+                    <InterfaceName>Ethernet4/36/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>216</Index>
+                    <InterfaceName>Ethernet4/36/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>217</Index>
+                    <InterfaceName>Ethernet4/37/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>218</Index>
+                    <InterfaceName>Ethernet4/37/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>219</Index>
+                    <InterfaceName>Ethernet4/37/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>220</Index>
+                    <InterfaceName>Ethernet4/38/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>221</Index>
+                    <InterfaceName>Ethernet4/38/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>222</Index>
+                    <InterfaceName>Ethernet4/38/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>223</Index>
+                    <InterfaceName>Ethernet4/39/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>224</Index>
+                    <InterfaceName>Ethernet4/39/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>225</Index>
+                    <InterfaceName>Ethernet4/39/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>226</Index>
+                    <InterfaceName>Ethernet4/40/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>227</Index>
+                    <InterfaceName>Ethernet4/40/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>228</Index>
+                    <InterfaceName>Ethernet4/40/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>229</Index>
+                    <InterfaceName>Ethernet4/41/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>230</Index>
+                    <InterfaceName>Ethernet4/41/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>231</Index>
+                    <InterfaceName>Ethernet4/41/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>232</Index>
+                    <InterfaceName>Ethernet4/42/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>233</Index>
+                    <InterfaceName>Ethernet4/42/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>234</Index>
+                    <InterfaceName>Ethernet4/42/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>235</Index>
+                    <InterfaceName>Ethernet4/43/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>236</Index>
+                    <InterfaceName>Ethernet4/43/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>237</Index>
+                    <InterfaceName>Ethernet4/43/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>238</Index>
+                    <InterfaceName>Ethernet4/44/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>239</Index>
+                    <InterfaceName>Ethernet4/44/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>240</Index>
+                    <InterfaceName>Ethernet4/44/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>241</Index>
+                    <InterfaceName>Ethernet4/45/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>242</Index>
+                    <InterfaceName>Ethernet4/45/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>243</Index>
+                    <InterfaceName>Ethernet4/45/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>244</Index>
+                    <InterfaceName>Ethernet4/46/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>245</Index>
+                    <InterfaceName>Ethernet4/46/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>246</Index>
+                    <InterfaceName>Ethernet4/46/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>247</Index>
+                    <InterfaceName>Ethernet4/47/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>248</Index>
+                    <InterfaceName>Ethernet4/47/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>249</Index>
+                    <InterfaceName>Ethernet4/47/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>250</Index>
+                    <InterfaceName>Ethernet4/48/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>251</Index>
+                    <InterfaceName>Ethernet4/48/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>252</Index>
+                    <InterfaceName>Ethernet4/48/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>253</Index>
+                    <InterfaceName>Ethernet5/1/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>254</Index>
+                    <InterfaceName>Ethernet5/1/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>255</Index>
+                    <InterfaceName>Ethernet5/1/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>256</Index>
+                    <InterfaceName>Ethernet5/2/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>257</Index>
+                    <InterfaceName>Ethernet5/2/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>258</Index>
+                    <InterfaceName>Ethernet5/2/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>259</Index>
+                    <InterfaceName>Ethernet5/3/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>260</Index>
+                    <InterfaceName>Ethernet5/3/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>261</Index>
+                    <InterfaceName>Ethernet5/3/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>262</Index>
+                    <InterfaceName>Ethernet5/4/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>263</Index>
+                    <InterfaceName>Ethernet5/4/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>264</Index>
+                    <InterfaceName>Ethernet5/4/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>265</Index>
+                    <InterfaceName>Ethernet5/5/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>266</Index>
+                    <InterfaceName>Ethernet5/5/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>267</Index>
+                    <InterfaceName>Ethernet5/5/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>268</Index>
+                    <InterfaceName>Ethernet5/6/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>269</Index>
+                    <InterfaceName>Ethernet5/6/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>270</Index>
+                    <InterfaceName>Ethernet5/6/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>271</Index>
+                    <InterfaceName>Ethernet5/7/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>272</Index>
+                    <InterfaceName>Ethernet5/7/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>273</Index>
+                    <InterfaceName>Ethernet5/7/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>274</Index>
+                    <InterfaceName>Ethernet5/8/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>275</Index>
+                    <InterfaceName>Ethernet5/8/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>276</Index>
+                    <InterfaceName>Ethernet5/8/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>277</Index>
+                    <InterfaceName>Ethernet5/9/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>278</Index>
+                    <InterfaceName>Ethernet5/9/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>279</Index>
+                    <InterfaceName>Ethernet5/9/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>280</Index>
+                    <InterfaceName>Ethernet5/10/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>281</Index>
+                    <InterfaceName>Ethernet5/10/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>282</Index>
+                    <InterfaceName>Ethernet5/10/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>283</Index>
+                    <InterfaceName>Ethernet5/11/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>284</Index>
+                    <InterfaceName>Ethernet5/11/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>285</Index>
+                    <InterfaceName>Ethernet5/11/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>286</Index>
+                    <InterfaceName>Ethernet5/12/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>287</Index>
+                    <InterfaceName>Ethernet5/12/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>288</Index>
+                    <InterfaceName>Ethernet5/12/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>289</Index>
+                    <InterfaceName>Ethernet5/13/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>290</Index>
+                    <InterfaceName>Ethernet5/13/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>291</Index>
+                    <InterfaceName>Ethernet5/13/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>292</Index>
+                    <InterfaceName>Ethernet5/14/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>293</Index>
+                    <InterfaceName>Ethernet5/14/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>294</Index>
+                    <InterfaceName>Ethernet5/14/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>295</Index>
+                    <InterfaceName>Ethernet5/15/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>296</Index>
+                    <InterfaceName>Ethernet5/15/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>297</Index>
+                    <InterfaceName>Ethernet5/15/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>298</Index>
+                    <InterfaceName>Ethernet5/16/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>299</Index>
+                    <InterfaceName>Ethernet5/16/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>300</Index>
+                    <InterfaceName>Ethernet5/16/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>301</Index>
+                    <InterfaceName>Ethernet5/17/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>302</Index>
+                    <InterfaceName>Ethernet5/17/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>303</Index>
+                    <InterfaceName>Ethernet5/17/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>304</Index>
+                    <InterfaceName>Ethernet5/18/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>305</Index>
+                    <InterfaceName>Ethernet5/18/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>306</Index>
+                    <InterfaceName>Ethernet5/18/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>307</Index>
+                    <InterfaceName>Ethernet5/19/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>308</Index>
+                    <InterfaceName>Ethernet5/19/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>309</Index>
+                    <InterfaceName>Ethernet5/19/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>310</Index>
+                    <InterfaceName>Ethernet5/20/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>311</Index>
+                    <InterfaceName>Ethernet5/20/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>312</Index>
+                    <InterfaceName>Ethernet5/20/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>313</Index>
+                    <InterfaceName>Ethernet5/21/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>314</Index>
+                    <InterfaceName>Ethernet5/21/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>315</Index>
+                    <InterfaceName>Ethernet5/21/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>316</Index>
+                    <InterfaceName>Ethernet5/22/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>317</Index>
+                    <InterfaceName>Ethernet5/22/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>318</Index>
+                    <InterfaceName>Ethernet5/22/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>319</Index>
+                    <InterfaceName>Ethernet5/23/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>320</Index>
+                    <InterfaceName>Ethernet5/23/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>321</Index>
+                    <InterfaceName>Ethernet5/23/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>322</Index>
+                    <InterfaceName>Ethernet5/24/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>323</Index>
+                    <InterfaceName>Ethernet5/24/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>324</Index>
+                    <InterfaceName>Ethernet5/24/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>325</Index>
+                    <InterfaceName>Ethernet5/25/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>326</Index>
+                    <InterfaceName>Ethernet5/25/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>327</Index>
+                    <InterfaceName>Ethernet5/25/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>328</Index>
+                    <InterfaceName>Ethernet5/26/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>329</Index>
+                    <InterfaceName>Ethernet5/26/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>330</Index>
+                    <InterfaceName>Ethernet5/26/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>331</Index>
+                    <InterfaceName>Ethernet5/27/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>332</Index>
+                    <InterfaceName>Ethernet5/27/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>333</Index>
+                    <InterfaceName>Ethernet5/27/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>334</Index>
+                    <InterfaceName>Ethernet5/28/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>335</Index>
+                    <InterfaceName>Ethernet5/28/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>336</Index>
+                    <InterfaceName>Ethernet5/28/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>337</Index>
+                    <InterfaceName>Ethernet5/29/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>338</Index>
+                    <InterfaceName>Ethernet5/29/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>339</Index>
+                    <InterfaceName>Ethernet5/29/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>340</Index>
+                    <InterfaceName>Ethernet5/30/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>341</Index>
+                    <InterfaceName>Ethernet5/30/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>342</Index>
+                    <InterfaceName>Ethernet5/30/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>343</Index>
+                    <InterfaceName>Ethernet5/31/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>344</Index>
+                    <InterfaceName>Ethernet5/31/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>345</Index>
+                    <InterfaceName>Ethernet5/31/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>346</Index>
+                    <InterfaceName>Ethernet5/32/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>347</Index>
+                    <InterfaceName>Ethernet5/32/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>348</Index>
+                    <InterfaceName>Ethernet5/32/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>349</Index>
+                    <InterfaceName>Ethernet5/33/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>350</Index>
+                    <InterfaceName>Ethernet5/33/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>351</Index>
+                    <InterfaceName>Ethernet5/33/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>352</Index>
+                    <InterfaceName>Ethernet5/34/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>353</Index>
+                    <InterfaceName>Ethernet5/34/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>354</Index>
+                    <InterfaceName>Ethernet5/34/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>355</Index>
+                    <InterfaceName>Ethernet5/35/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>356</Index>
+                    <InterfaceName>Ethernet5/35/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>357</Index>
+                    <InterfaceName>Ethernet5/35/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>358</Index>
+                    <InterfaceName>Ethernet5/36/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>359</Index>
+                    <InterfaceName>Ethernet5/36/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>360</Index>
+                    <InterfaceName>Ethernet5/36/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>361</Index>
+                    <InterfaceName>Ethernet5/37/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>362</Index>
+                    <InterfaceName>Ethernet5/37/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>363</Index>
+                    <InterfaceName>Ethernet5/37/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>364</Index>
+                    <InterfaceName>Ethernet5/38/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>365</Index>
+                    <InterfaceName>Ethernet5/38/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>366</Index>
+                    <InterfaceName>Ethernet5/38/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>367</Index>
+                    <InterfaceName>Ethernet5/39/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>368</Index>
+                    <InterfaceName>Ethernet5/39/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>369</Index>
+                    <InterfaceName>Ethernet5/39/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>370</Index>
+                    <InterfaceName>Ethernet5/40/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>371</Index>
+                    <InterfaceName>Ethernet5/40/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>372</Index>
+                    <InterfaceName>Ethernet5/40/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>373</Index>
+                    <InterfaceName>Ethernet5/41/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>374</Index>
+                    <InterfaceName>Ethernet5/41/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>375</Index>
+                    <InterfaceName>Ethernet5/41/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>376</Index>
+                    <InterfaceName>Ethernet5/42/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>377</Index>
+                    <InterfaceName>Ethernet5/42/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>378</Index>
+                    <InterfaceName>Ethernet5/42/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>379</Index>
+                    <InterfaceName>Ethernet5/43/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>380</Index>
+                    <InterfaceName>Ethernet5/43/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>381</Index>
+                    <InterfaceName>Ethernet5/43/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>382</Index>
+                    <InterfaceName>Ethernet5/44/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>383</Index>
+                    <InterfaceName>Ethernet5/44/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>384</Index>
+                    <InterfaceName>Ethernet5/44/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>385</Index>
+                    <InterfaceName>Ethernet5/45/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>386</Index>
+                    <InterfaceName>Ethernet5/45/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>387</Index>
+                    <InterfaceName>Ethernet5/45/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>388</Index>
+                    <InterfaceName>Ethernet5/46/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>389</Index>
+                    <InterfaceName>Ethernet5/46/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>390</Index>
+                    <InterfaceName>Ethernet5/46/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>391</Index>
+                    <InterfaceName>Ethernet5/47/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>392</Index>
+                    <InterfaceName>Ethernet5/47/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>393</Index>
+                    <InterfaceName>Ethernet5/47/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>394</Index>
+                    <InterfaceName>Ethernet5/48/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>395</Index>
+                    <InterfaceName>Ethernet5/48/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>396</Index>
+                    <InterfaceName>Ethernet5/48/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>397</Index>
+                    <InterfaceName>Ethernet6/1/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>398</Index>
+                    <InterfaceName>Ethernet6/1/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>399</Index>
+                    <InterfaceName>Ethernet6/1/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>400</Index>
+                    <InterfaceName>Ethernet6/2/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>401</Index>
+                    <InterfaceName>Ethernet6/2/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>402</Index>
+                    <InterfaceName>Ethernet6/2/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>403</Index>
+                    <InterfaceName>Ethernet6/3/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>404</Index>
+                    <InterfaceName>Ethernet6/3/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>405</Index>
+                    <InterfaceName>Ethernet6/3/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>406</Index>
+                    <InterfaceName>Ethernet6/4/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>407</Index>
+                    <InterfaceName>Ethernet6/4/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>408</Index>
+                    <InterfaceName>Ethernet6/4/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>409</Index>
+                    <InterfaceName>Ethernet6/5/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>410</Index>
+                    <InterfaceName>Ethernet6/5/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>411</Index>
+                    <InterfaceName>Ethernet6/5/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>412</Index>
+                    <InterfaceName>Ethernet6/6/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>413</Index>
+                    <InterfaceName>Ethernet6/6/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>414</Index>
+                    <InterfaceName>Ethernet6/6/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>415</Index>
+                    <InterfaceName>Ethernet6/7/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>416</Index>
+                    <InterfaceName>Ethernet6/7/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>417</Index>
+                    <InterfaceName>Ethernet6/7/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>418</Index>
+                    <InterfaceName>Ethernet6/8/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>419</Index>
+                    <InterfaceName>Ethernet6/8/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>420</Index>
+                    <InterfaceName>Ethernet6/8/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>421</Index>
+                    <InterfaceName>Ethernet6/9/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>422</Index>
+                    <InterfaceName>Ethernet6/9/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>423</Index>
+                    <InterfaceName>Ethernet6/9/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>424</Index>
+                    <InterfaceName>Ethernet6/10/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>425</Index>
+                    <InterfaceName>Ethernet6/10/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>426</Index>
+                    <InterfaceName>Ethernet6/10/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>427</Index>
+                    <InterfaceName>Ethernet6/11/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>428</Index>
+                    <InterfaceName>Ethernet6/11/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>429</Index>
+                    <InterfaceName>Ethernet6/11/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>430</Index>
+                    <InterfaceName>Ethernet6/12/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>431</Index>
+                    <InterfaceName>Ethernet6/12/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>432</Index>
+                    <InterfaceName>Ethernet6/12/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>433</Index>
+                    <InterfaceName>Ethernet6/13/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>434</Index>
+                    <InterfaceName>Ethernet6/13/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>435</Index>
+                    <InterfaceName>Ethernet6/13/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>436</Index>
+                    <InterfaceName>Ethernet6/14/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>437</Index>
+                    <InterfaceName>Ethernet6/14/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>438</Index>
+                    <InterfaceName>Ethernet6/14/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>439</Index>
+                    <InterfaceName>Ethernet6/15/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>440</Index>
+                    <InterfaceName>Ethernet6/15/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>441</Index>
+                    <InterfaceName>Ethernet6/15/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>442</Index>
+                    <InterfaceName>Ethernet6/16/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>443</Index>
+                    <InterfaceName>Ethernet6/16/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>444</Index>
+                    <InterfaceName>Ethernet6/16/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>445</Index>
+                    <InterfaceName>Ethernet6/17/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>446</Index>
+                    <InterfaceName>Ethernet6/17/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>447</Index>
+                    <InterfaceName>Ethernet6/17/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>448</Index>
+                    <InterfaceName>Ethernet6/18/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>449</Index>
+                    <InterfaceName>Ethernet6/18/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>450</Index>
+                    <InterfaceName>Ethernet6/18/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>451</Index>
+                    <InterfaceName>Ethernet6/19/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>452</Index>
+                    <InterfaceName>Ethernet6/19/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>453</Index>
+                    <InterfaceName>Ethernet6/19/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>454</Index>
+                    <InterfaceName>Ethernet6/20/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>455</Index>
+                    <InterfaceName>Ethernet6/20/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>456</Index>
+                    <InterfaceName>Ethernet6/20/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>457</Index>
+                    <InterfaceName>Ethernet6/21/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>458</Index>
+                    <InterfaceName>Ethernet6/21/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>459</Index>
+                    <InterfaceName>Ethernet6/21/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>460</Index>
+                    <InterfaceName>Ethernet6/22/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>461</Index>
+                    <InterfaceName>Ethernet6/22/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>462</Index>
+                    <InterfaceName>Ethernet6/22/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>463</Index>
+                    <InterfaceName>Ethernet6/23/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>464</Index>
+                    <InterfaceName>Ethernet6/23/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>465</Index>
+                    <InterfaceName>Ethernet6/23/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>466</Index>
+                    <InterfaceName>Ethernet6/24/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>467</Index>
+                    <InterfaceName>Ethernet6/24/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>468</Index>
+                    <InterfaceName>Ethernet6/24/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>469</Index>
+                    <InterfaceName>Ethernet6/25/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>470</Index>
+                    <InterfaceName>Ethernet6/25/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>471</Index>
+                    <InterfaceName>Ethernet6/25/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>472</Index>
+                    <InterfaceName>Ethernet6/26/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>473</Index>
+                    <InterfaceName>Ethernet6/26/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>474</Index>
+                    <InterfaceName>Ethernet6/26/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>475</Index>
+                    <InterfaceName>Ethernet6/27/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>476</Index>
+                    <InterfaceName>Ethernet6/27/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>477</Index>
+                    <InterfaceName>Ethernet6/27/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>478</Index>
+                    <InterfaceName>Ethernet6/28/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>479</Index>
+                    <InterfaceName>Ethernet6/28/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>480</Index>
+                    <InterfaceName>Ethernet6/28/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>481</Index>
+                    <InterfaceName>Ethernet6/29/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>482</Index>
+                    <InterfaceName>Ethernet6/29/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>483</Index>
+                    <InterfaceName>Ethernet6/29/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>484</Index>
+                    <InterfaceName>Ethernet6/30/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>485</Index>
+                    <InterfaceName>Ethernet6/30/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>486</Index>
+                    <InterfaceName>Ethernet6/30/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>487</Index>
+                    <InterfaceName>Ethernet6/31/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>488</Index>
+                    <InterfaceName>Ethernet6/31/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>489</Index>
+                    <InterfaceName>Ethernet6/31/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>490</Index>
+                    <InterfaceName>Ethernet6/32/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>491</Index>
+                    <InterfaceName>Ethernet6/32/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>492</Index>
+                    <InterfaceName>Ethernet6/32/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>493</Index>
+                    <InterfaceName>Ethernet6/33/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>494</Index>
+                    <InterfaceName>Ethernet6/33/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>495</Index>
+                    <InterfaceName>Ethernet6/33/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>496</Index>
+                    <InterfaceName>Ethernet6/34/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>497</Index>
+                    <InterfaceName>Ethernet6/34/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>498</Index>
+                    <InterfaceName>Ethernet6/34/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>499</Index>
+                    <InterfaceName>Ethernet6/35/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>500</Index>
+                    <InterfaceName>Ethernet6/35/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>501</Index>
+                    <InterfaceName>Ethernet6/35/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>502</Index>
+                    <InterfaceName>Ethernet6/36/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>503</Index>
+                    <InterfaceName>Ethernet6/36/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>504</Index>
+                    <InterfaceName>Ethernet6/36/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>505</Index>
+                    <InterfaceName>Ethernet6/37/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>506</Index>
+                    <InterfaceName>Ethernet6/37/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>507</Index>
+                    <InterfaceName>Ethernet6/37/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>508</Index>
+                    <InterfaceName>Ethernet6/38/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>509</Index>
+                    <InterfaceName>Ethernet6/38/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>510</Index>
+                    <InterfaceName>Ethernet6/38/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>511</Index>
+                    <InterfaceName>Ethernet6/39/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>512</Index>
+                    <InterfaceName>Ethernet6/39/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>513</Index>
+                    <InterfaceName>Ethernet6/39/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>514</Index>
+                    <InterfaceName>Ethernet6/40/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>515</Index>
+                    <InterfaceName>Ethernet6/40/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>516</Index>
+                    <InterfaceName>Ethernet6/40/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>517</Index>
+                    <InterfaceName>Ethernet6/41/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>518</Index>
+                    <InterfaceName>Ethernet6/41/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>519</Index>
+                    <InterfaceName>Ethernet6/41/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>520</Index>
+                    <InterfaceName>Ethernet6/42/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>521</Index>
+                    <InterfaceName>Ethernet6/42/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>522</Index>
+                    <InterfaceName>Ethernet6/42/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>523</Index>
+                    <InterfaceName>Ethernet6/43/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>524</Index>
+                    <InterfaceName>Ethernet6/43/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>525</Index>
+                    <InterfaceName>Ethernet6/43/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>526</Index>
+                    <InterfaceName>Ethernet6/44/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>527</Index>
+                    <InterfaceName>Ethernet6/44/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>528</Index>
+                    <InterfaceName>Ethernet6/44/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>529</Index>
+                    <InterfaceName>Ethernet6/45/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>530</Index>
+                    <InterfaceName>Ethernet6/45/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>531</Index>
+                    <InterfaceName>Ethernet6/45/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>532</Index>
+                    <InterfaceName>Ethernet6/46/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>533</Index>
+                    <InterfaceName>Ethernet6/46/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>534</Index>
+                    <InterfaceName>Ethernet6/46/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>535</Index>
+                    <InterfaceName>Ethernet6/47/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>536</Index>
+                    <InterfaceName>Ethernet6/47/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>537</Index>
+                    <InterfaceName>Ethernet6/47/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>538</Index>
+                    <InterfaceName>Ethernet6/48/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>539</Index>
+                    <InterfaceName>Ethernet6/48/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>540</Index>
+                    <InterfaceName>Ethernet6/48/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>541</Index>
+                    <InterfaceName>Ethernet7/1/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>542</Index>
+                    <InterfaceName>Ethernet7/1/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>543</Index>
+                    <InterfaceName>Ethernet7/1/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>544</Index>
+                    <InterfaceName>Ethernet7/2/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>545</Index>
+                    <InterfaceName>Ethernet7/2/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>546</Index>
+                    <InterfaceName>Ethernet7/2/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>547</Index>
+                    <InterfaceName>Ethernet7/3/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>548</Index>
+                    <InterfaceName>Ethernet7/3/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>549</Index>
+                    <InterfaceName>Ethernet7/3/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>550</Index>
+                    <InterfaceName>Ethernet7/4/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>551</Index>
+                    <InterfaceName>Ethernet7/4/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>552</Index>
+                    <InterfaceName>Ethernet7/4/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>553</Index>
+                    <InterfaceName>Ethernet7/5/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>554</Index>
+                    <InterfaceName>Ethernet7/5/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>555</Index>
+                    <InterfaceName>Ethernet7/5/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>556</Index>
+                    <InterfaceName>Ethernet7/6/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>557</Index>
+                    <InterfaceName>Ethernet7/6/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>558</Index>
+                    <InterfaceName>Ethernet7/6/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>559</Index>
+                    <InterfaceName>Ethernet7/7/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>560</Index>
+                    <InterfaceName>Ethernet7/7/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>561</Index>
+                    <InterfaceName>Ethernet7/7/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>562</Index>
+                    <InterfaceName>Ethernet7/8/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>563</Index>
+                    <InterfaceName>Ethernet7/8/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>564</Index>
+                    <InterfaceName>Ethernet7/8/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>565</Index>
+                    <InterfaceName>Ethernet7/9/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>566</Index>
+                    <InterfaceName>Ethernet7/9/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>567</Index>
+                    <InterfaceName>Ethernet7/9/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>568</Index>
+                    <InterfaceName>Ethernet7/10/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>569</Index>
+                    <InterfaceName>Ethernet7/10/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>570</Index>
+                    <InterfaceName>Ethernet7/10/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>571</Index>
+                    <InterfaceName>Ethernet7/11/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>572</Index>
+                    <InterfaceName>Ethernet7/11/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>573</Index>
+                    <InterfaceName>Ethernet7/11/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>574</Index>
+                    <InterfaceName>Ethernet7/12/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>575</Index>
+                    <InterfaceName>Ethernet7/12/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>576</Index>
+                    <InterfaceName>Ethernet7/12/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>577</Index>
+                    <InterfaceName>Ethernet7/13/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>578</Index>
+                    <InterfaceName>Ethernet7/13/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>579</Index>
+                    <InterfaceName>Ethernet7/13/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>580</Index>
+                    <InterfaceName>Ethernet7/14/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>581</Index>
+                    <InterfaceName>Ethernet7/14/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>582</Index>
+                    <InterfaceName>Ethernet7/14/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>583</Index>
+                    <InterfaceName>Ethernet7/15/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>584</Index>
+                    <InterfaceName>Ethernet7/15/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>585</Index>
+                    <InterfaceName>Ethernet7/15/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>586</Index>
+                    <InterfaceName>Ethernet7/16/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>587</Index>
+                    <InterfaceName>Ethernet7/16/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>588</Index>
+                    <InterfaceName>Ethernet7/16/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>589</Index>
+                    <InterfaceName>Ethernet7/17/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>590</Index>
+                    <InterfaceName>Ethernet7/17/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>591</Index>
+                    <InterfaceName>Ethernet7/17/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>592</Index>
+                    <InterfaceName>Ethernet7/18/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>593</Index>
+                    <InterfaceName>Ethernet7/18/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>594</Index>
+                    <InterfaceName>Ethernet7/18/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>595</Index>
+                    <InterfaceName>Ethernet7/19/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>596</Index>
+                    <InterfaceName>Ethernet7/19/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>597</Index>
+                    <InterfaceName>Ethernet7/19/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>598</Index>
+                    <InterfaceName>Ethernet7/20/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>599</Index>
+                    <InterfaceName>Ethernet7/20/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>600</Index>
+                    <InterfaceName>Ethernet7/20/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>601</Index>
+                    <InterfaceName>Ethernet7/21/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>602</Index>
+                    <InterfaceName>Ethernet7/21/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>603</Index>
+                    <InterfaceName>Ethernet7/21/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>604</Index>
+                    <InterfaceName>Ethernet7/22/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>605</Index>
+                    <InterfaceName>Ethernet7/22/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>606</Index>
+                    <InterfaceName>Ethernet7/22/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>607</Index>
+                    <InterfaceName>Ethernet7/23/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>608</Index>
+                    <InterfaceName>Ethernet7/23/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>609</Index>
+                    <InterfaceName>Ethernet7/23/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>610</Index>
+                    <InterfaceName>Ethernet7/24/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>611</Index>
+                    <InterfaceName>Ethernet7/24/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>612</Index>
+                    <InterfaceName>Ethernet7/24/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>613</Index>
+                    <InterfaceName>Ethernet7/25/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>614</Index>
+                    <InterfaceName>Ethernet7/25/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>615</Index>
+                    <InterfaceName>Ethernet7/25/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>616</Index>
+                    <InterfaceName>Ethernet7/26/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>617</Index>
+                    <InterfaceName>Ethernet7/26/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>618</Index>
+                    <InterfaceName>Ethernet7/26/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>619</Index>
+                    <InterfaceName>Ethernet7/27/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>620</Index>
+                    <InterfaceName>Ethernet7/27/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>621</Index>
+                    <InterfaceName>Ethernet7/27/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>622</Index>
+                    <InterfaceName>Ethernet7/28/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>623</Index>
+                    <InterfaceName>Ethernet7/28/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>624</Index>
+                    <InterfaceName>Ethernet7/28/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>625</Index>
+                    <InterfaceName>Ethernet7/29/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>626</Index>
+                    <InterfaceName>Ethernet7/29/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>627</Index>
+                    <InterfaceName>Ethernet7/29/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>628</Index>
+                    <InterfaceName>Ethernet7/30/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>629</Index>
+                    <InterfaceName>Ethernet7/30/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>630</Index>
+                    <InterfaceName>Ethernet7/30/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>631</Index>
+                    <InterfaceName>Ethernet7/31/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>632</Index>
+                    <InterfaceName>Ethernet7/31/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>633</Index>
+                    <InterfaceName>Ethernet7/31/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>634</Index>
+                    <InterfaceName>Ethernet7/32/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>635</Index>
+                    <InterfaceName>Ethernet7/32/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>636</Index>
+                    <InterfaceName>Ethernet7/32/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>637</Index>
+                    <InterfaceName>Ethernet7/33/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>638</Index>
+                    <InterfaceName>Ethernet7/33/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>639</Index>
+                    <InterfaceName>Ethernet7/33/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>640</Index>
+                    <InterfaceName>Ethernet7/34/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>641</Index>
+                    <InterfaceName>Ethernet7/34/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>642</Index>
+                    <InterfaceName>Ethernet7/34/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>643</Index>
+                    <InterfaceName>Ethernet7/35/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>644</Index>
+                    <InterfaceName>Ethernet7/35/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>645</Index>
+                    <InterfaceName>Ethernet7/35/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>646</Index>
+                    <InterfaceName>Ethernet7/36/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>647</Index>
+                    <InterfaceName>Ethernet7/36/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>648</Index>
+                    <InterfaceName>Ethernet7/36/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>649</Index>
+                    <InterfaceName>Ethernet7/37/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>650</Index>
+                    <InterfaceName>Ethernet7/37/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>651</Index>
+                    <InterfaceName>Ethernet7/37/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>652</Index>
+                    <InterfaceName>Ethernet7/38/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>653</Index>
+                    <InterfaceName>Ethernet7/38/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>654</Index>
+                    <InterfaceName>Ethernet7/38/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>655</Index>
+                    <InterfaceName>Ethernet7/39/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>656</Index>
+                    <InterfaceName>Ethernet7/39/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>657</Index>
+                    <InterfaceName>Ethernet7/39/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>658</Index>
+                    <InterfaceName>Ethernet7/40/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>659</Index>
+                    <InterfaceName>Ethernet7/40/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>660</Index>
+                    <InterfaceName>Ethernet7/40/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>661</Index>
+                    <InterfaceName>Ethernet7/41/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>662</Index>
+                    <InterfaceName>Ethernet7/41/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>663</Index>
+                    <InterfaceName>Ethernet7/41/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>664</Index>
+                    <InterfaceName>Ethernet7/42/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>665</Index>
+                    <InterfaceName>Ethernet7/42/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>666</Index>
+                    <InterfaceName>Ethernet7/42/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>667</Index>
+                    <InterfaceName>Ethernet7/43/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>668</Index>
+                    <InterfaceName>Ethernet7/43/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>669</Index>
+                    <InterfaceName>Ethernet7/43/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>670</Index>
+                    <InterfaceName>Ethernet7/44/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>671</Index>
+                    <InterfaceName>Ethernet7/44/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>672</Index>
+                    <InterfaceName>Ethernet7/44/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>673</Index>
+                    <InterfaceName>Ethernet7/45/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>674</Index>
+                    <InterfaceName>Ethernet7/45/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>675</Index>
+                    <InterfaceName>Ethernet7/45/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>676</Index>
+                    <InterfaceName>Ethernet7/46/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>677</Index>
+                    <InterfaceName>Ethernet7/46/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>678</Index>
+                    <InterfaceName>Ethernet7/46/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>679</Index>
+                    <InterfaceName>Ethernet7/47/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>680</Index>
+                    <InterfaceName>Ethernet7/47/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>681</Index>
+                    <InterfaceName>Ethernet7/47/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>682</Index>
+                    <InterfaceName>Ethernet7/48/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>683</Index>
+                    <InterfaceName>Ethernet7/48/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>684</Index>
+                    <InterfaceName>Ethernet7/48/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>685</Index>
+                    <InterfaceName>Ethernet8/1/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>686</Index>
+                    <InterfaceName>Ethernet8/1/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>687</Index>
+                    <InterfaceName>Ethernet8/1/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>688</Index>
+                    <InterfaceName>Ethernet8/2/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>689</Index>
+                    <InterfaceName>Ethernet8/2/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>690</Index>
+                    <InterfaceName>Ethernet8/2/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>691</Index>
+                    <InterfaceName>Ethernet8/3/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>692</Index>
+                    <InterfaceName>Ethernet8/3/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>693</Index>
+                    <InterfaceName>Ethernet8/3/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>694</Index>
+                    <InterfaceName>Ethernet8/4/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>695</Index>
+                    <InterfaceName>Ethernet8/4/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>696</Index>
+                    <InterfaceName>Ethernet8/4/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>697</Index>
+                    <InterfaceName>Ethernet8/5/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>698</Index>
+                    <InterfaceName>Ethernet8/5/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>699</Index>
+                    <InterfaceName>Ethernet8/5/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>700</Index>
+                    <InterfaceName>Ethernet8/6/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>701</Index>
+                    <InterfaceName>Ethernet8/6/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>702</Index>
+                    <InterfaceName>Ethernet8/6/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>703</Index>
+                    <InterfaceName>Ethernet8/7/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>704</Index>
+                    <InterfaceName>Ethernet8/7/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>705</Index>
+                    <InterfaceName>Ethernet8/7/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>706</Index>
+                    <InterfaceName>Ethernet8/8/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>707</Index>
+                    <InterfaceName>Ethernet8/8/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>708</Index>
+                    <InterfaceName>Ethernet8/8/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>709</Index>
+                    <InterfaceName>Ethernet8/9/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>710</Index>
+                    <InterfaceName>Ethernet8/9/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>711</Index>
+                    <InterfaceName>Ethernet8/9/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>712</Index>
+                    <InterfaceName>Ethernet8/10/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>713</Index>
+                    <InterfaceName>Ethernet8/10/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>714</Index>
+                    <InterfaceName>Ethernet8/10/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>715</Index>
+                    <InterfaceName>Ethernet8/11/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>716</Index>
+                    <InterfaceName>Ethernet8/11/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>717</Index>
+                    <InterfaceName>Ethernet8/11/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>718</Index>
+                    <InterfaceName>Ethernet8/12/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>719</Index>
+                    <InterfaceName>Ethernet8/12/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>720</Index>
+                    <InterfaceName>Ethernet8/12/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>721</Index>
+                    <InterfaceName>Ethernet8/13/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>722</Index>
+                    <InterfaceName>Ethernet8/13/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>723</Index>
+                    <InterfaceName>Ethernet8/13/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>724</Index>
+                    <InterfaceName>Ethernet8/14/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>725</Index>
+                    <InterfaceName>Ethernet8/14/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>726</Index>
+                    <InterfaceName>Ethernet8/14/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>727</Index>
+                    <InterfaceName>Ethernet8/15/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>728</Index>
+                    <InterfaceName>Ethernet8/15/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>729</Index>
+                    <InterfaceName>Ethernet8/15/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>730</Index>
+                    <InterfaceName>Ethernet8/16/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>731</Index>
+                    <InterfaceName>Ethernet8/16/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>732</Index>
+                    <InterfaceName>Ethernet8/16/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>733</Index>
+                    <InterfaceName>Ethernet8/17/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>734</Index>
+                    <InterfaceName>Ethernet8/17/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>735</Index>
+                    <InterfaceName>Ethernet8/17/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>736</Index>
+                    <InterfaceName>Ethernet8/18/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>737</Index>
+                    <InterfaceName>Ethernet8/18/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>738</Index>
+                    <InterfaceName>Ethernet8/18/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>739</Index>
+                    <InterfaceName>Ethernet8/19/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>740</Index>
+                    <InterfaceName>Ethernet8/19/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>741</Index>
+                    <InterfaceName>Ethernet8/19/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>742</Index>
+                    <InterfaceName>Ethernet8/20/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>743</Index>
+                    <InterfaceName>Ethernet8/20/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>744</Index>
+                    <InterfaceName>Ethernet8/20/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>745</Index>
+                    <InterfaceName>Ethernet8/21/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>746</Index>
+                    <InterfaceName>Ethernet8/21/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>747</Index>
+                    <InterfaceName>Ethernet8/21/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>748</Index>
+                    <InterfaceName>Ethernet8/22/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>749</Index>
+                    <InterfaceName>Ethernet8/22/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>750</Index>
+                    <InterfaceName>Ethernet8/22/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>751</Index>
+                    <InterfaceName>Ethernet8/23/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>752</Index>
+                    <InterfaceName>Ethernet8/23/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>753</Index>
+                    <InterfaceName>Ethernet8/23/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>754</Index>
+                    <InterfaceName>Ethernet8/24/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>755</Index>
+                    <InterfaceName>Ethernet8/24/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>756</Index>
+                    <InterfaceName>Ethernet8/24/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>757</Index>
+                    <InterfaceName>Ethernet8/25/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>758</Index>
+                    <InterfaceName>Ethernet8/25/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>759</Index>
+                    <InterfaceName>Ethernet8/25/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>760</Index>
+                    <InterfaceName>Ethernet8/26/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>761</Index>
+                    <InterfaceName>Ethernet8/26/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>762</Index>
+                    <InterfaceName>Ethernet8/26/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>763</Index>
+                    <InterfaceName>Ethernet8/27/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>764</Index>
+                    <InterfaceName>Ethernet8/27/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>765</Index>
+                    <InterfaceName>Ethernet8/27/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>766</Index>
+                    <InterfaceName>Ethernet8/28/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>767</Index>
+                    <InterfaceName>Ethernet8/28/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>768</Index>
+                    <InterfaceName>Ethernet8/28/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>769</Index>
+                    <InterfaceName>Ethernet8/29/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>770</Index>
+                    <InterfaceName>Ethernet8/29/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>771</Index>
+                    <InterfaceName>Ethernet8/29/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>772</Index>
+                    <InterfaceName>Ethernet8/30/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>773</Index>
+                    <InterfaceName>Ethernet8/30/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>774</Index>
+                    <InterfaceName>Ethernet8/30/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>775</Index>
+                    <InterfaceName>Ethernet8/31/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>776</Index>
+                    <InterfaceName>Ethernet8/31/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>777</Index>
+                    <InterfaceName>Ethernet8/31/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>778</Index>
+                    <InterfaceName>Ethernet8/32/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>779</Index>
+                    <InterfaceName>Ethernet8/32/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>780</Index>
+                    <InterfaceName>Ethernet8/32/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>781</Index>
+                    <InterfaceName>Ethernet8/33/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>782</Index>
+                    <InterfaceName>Ethernet8/33/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>783</Index>
+                    <InterfaceName>Ethernet8/33/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>784</Index>
+                    <InterfaceName>Ethernet8/34/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>785</Index>
+                    <InterfaceName>Ethernet8/34/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>786</Index>
+                    <InterfaceName>Ethernet8/34/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>787</Index>
+                    <InterfaceName>Ethernet8/35/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>788</Index>
+                    <InterfaceName>Ethernet8/35/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>789</Index>
+                    <InterfaceName>Ethernet8/35/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>790</Index>
+                    <InterfaceName>Ethernet8/36/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>791</Index>
+                    <InterfaceName>Ethernet8/36/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>792</Index>
+                    <InterfaceName>Ethernet8/36/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>793</Index>
+                    <InterfaceName>Ethernet8/37/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>794</Index>
+                    <InterfaceName>Ethernet8/37/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>795</Index>
+                    <InterfaceName>Ethernet8/37/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>796</Index>
+                    <InterfaceName>Ethernet8/38/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>797</Index>
+                    <InterfaceName>Ethernet8/38/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>798</Index>
+                    <InterfaceName>Ethernet8/38/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>799</Index>
+                    <InterfaceName>Ethernet8/39/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>800</Index>
+                    <InterfaceName>Ethernet8/39/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>801</Index>
+                    <InterfaceName>Ethernet8/39/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>802</Index>
+                    <InterfaceName>Ethernet8/40/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>803</Index>
+                    <InterfaceName>Ethernet8/40/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>804</Index>
+                    <InterfaceName>Ethernet8/40/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>805</Index>
+                    <InterfaceName>Ethernet8/41/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>806</Index>
+                    <InterfaceName>Ethernet8/41/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>807</Index>
+                    <InterfaceName>Ethernet8/41/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>808</Index>
+                    <InterfaceName>Ethernet8/42/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>809</Index>
+                    <InterfaceName>Ethernet8/42/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>810</Index>
+                    <InterfaceName>Ethernet8/42/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>811</Index>
+                    <InterfaceName>Ethernet8/43/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>812</Index>
+                    <InterfaceName>Ethernet8/43/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>813</Index>
+                    <InterfaceName>Ethernet8/43/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>814</Index>
+                    <InterfaceName>Ethernet8/44/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>815</Index>
+                    <InterfaceName>Ethernet8/44/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>816</Index>
+                    <InterfaceName>Ethernet8/44/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>817</Index>
+                    <InterfaceName>Ethernet8/45/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>818</Index>
+                    <InterfaceName>Ethernet8/45/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>819</Index>
+                    <InterfaceName>Ethernet8/45/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>820</Index>
+                    <InterfaceName>Ethernet8/46/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>821</Index>
+                    <InterfaceName>Ethernet8/46/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>822</Index>
+                    <InterfaceName>Ethernet8/46/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>823</Index>
+                    <InterfaceName>Ethernet8/47/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>824</Index>
+                    <InterfaceName>Ethernet8/47/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>825</Index>
+                    <InterfaceName>Ethernet8/47/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>826</Index>
+                    <InterfaceName>Ethernet8/48/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>827</Index>
+                    <InterfaceName>Ethernet8/48/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>828</Index>
+                    <InterfaceName>Ethernet8/48/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>829</Index>
+                    <InterfaceName>Ethernet9/1/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>830</Index>
+                    <InterfaceName>Ethernet9/1/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>831</Index>
+                    <InterfaceName>Ethernet9/1/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>832</Index>
+                    <InterfaceName>Ethernet9/2/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>833</Index>
+                    <InterfaceName>Ethernet9/2/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>834</Index>
+                    <InterfaceName>Ethernet9/2/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>835</Index>
+                    <InterfaceName>Ethernet9/3/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>836</Index>
+                    <InterfaceName>Ethernet9/3/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>837</Index>
+                    <InterfaceName>Ethernet9/3/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>838</Index>
+                    <InterfaceName>Ethernet9/4/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>839</Index>
+                    <InterfaceName>Ethernet9/4/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>840</Index>
+                    <InterfaceName>Ethernet9/4/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>841</Index>
+                    <InterfaceName>Ethernet9/5/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>842</Index>
+                    <InterfaceName>Ethernet9/5/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>843</Index>
+                    <InterfaceName>Ethernet9/5/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>844</Index>
+                    <InterfaceName>Ethernet9/6/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>845</Index>
+                    <InterfaceName>Ethernet9/6/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>846</Index>
+                    <InterfaceName>Ethernet9/6/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>847</Index>
+                    <InterfaceName>Ethernet9/7/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>848</Index>
+                    <InterfaceName>Ethernet9/7/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>849</Index>
+                    <InterfaceName>Ethernet9/7/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>850</Index>
+                    <InterfaceName>Ethernet9/8/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>851</Index>
+                    <InterfaceName>Ethernet9/8/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>852</Index>
+                    <InterfaceName>Ethernet9/8/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>853</Index>
+                    <InterfaceName>Ethernet9/9/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>854</Index>
+                    <InterfaceName>Ethernet9/9/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>855</Index>
+                    <InterfaceName>Ethernet9/9/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>856</Index>
+                    <InterfaceName>Ethernet9/10/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>857</Index>
+                    <InterfaceName>Ethernet9/10/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>858</Index>
+                    <InterfaceName>Ethernet9/10/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>859</Index>
+                    <InterfaceName>Ethernet9/11/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>860</Index>
+                    <InterfaceName>Ethernet9/11/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>861</Index>
+                    <InterfaceName>Ethernet9/11/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>862</Index>
+                    <InterfaceName>Ethernet9/12/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>863</Index>
+                    <InterfaceName>Ethernet9/12/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>864</Index>
+                    <InterfaceName>Ethernet9/12/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>865</Index>
+                    <InterfaceName>Ethernet9/13/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>866</Index>
+                    <InterfaceName>Ethernet9/13/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>867</Index>
+                    <InterfaceName>Ethernet9/13/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>868</Index>
+                    <InterfaceName>Ethernet9/14/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>869</Index>
+                    <InterfaceName>Ethernet9/14/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>870</Index>
+                    <InterfaceName>Ethernet9/14/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>871</Index>
+                    <InterfaceName>Ethernet9/15/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>872</Index>
+                    <InterfaceName>Ethernet9/15/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>873</Index>
+                    <InterfaceName>Ethernet9/15/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>874</Index>
+                    <InterfaceName>Ethernet9/16/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>875</Index>
+                    <InterfaceName>Ethernet9/16/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>876</Index>
+                    <InterfaceName>Ethernet9/16/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>877</Index>
+                    <InterfaceName>Ethernet9/17/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>878</Index>
+                    <InterfaceName>Ethernet9/17/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>879</Index>
+                    <InterfaceName>Ethernet9/17/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>880</Index>
+                    <InterfaceName>Ethernet9/18/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>881</Index>
+                    <InterfaceName>Ethernet9/18/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>882</Index>
+                    <InterfaceName>Ethernet9/18/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>883</Index>
+                    <InterfaceName>Ethernet9/19/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>884</Index>
+                    <InterfaceName>Ethernet9/19/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>885</Index>
+                    <InterfaceName>Ethernet9/19/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>886</Index>
+                    <InterfaceName>Ethernet9/20/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>887</Index>
+                    <InterfaceName>Ethernet9/20/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>888</Index>
+                    <InterfaceName>Ethernet9/20/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>889</Index>
+                    <InterfaceName>Ethernet9/21/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>890</Index>
+                    <InterfaceName>Ethernet9/21/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>891</Index>
+                    <InterfaceName>Ethernet9/21/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>892</Index>
+                    <InterfaceName>Ethernet9/22/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>893</Index>
+                    <InterfaceName>Ethernet9/22/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>894</Index>
+                    <InterfaceName>Ethernet9/22/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>895</Index>
+                    <InterfaceName>Ethernet9/23/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>896</Index>
+                    <InterfaceName>Ethernet9/23/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>897</Index>
+                    <InterfaceName>Ethernet9/23/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>898</Index>
+                    <InterfaceName>Ethernet9/24/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>899</Index>
+                    <InterfaceName>Ethernet9/24/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>900</Index>
+                    <InterfaceName>Ethernet9/24/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>901</Index>
+                    <InterfaceName>Ethernet9/25/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>902</Index>
+                    <InterfaceName>Ethernet9/25/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>903</Index>
+                    <InterfaceName>Ethernet9/25/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>904</Index>
+                    <InterfaceName>Ethernet9/26/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>905</Index>
+                    <InterfaceName>Ethernet9/26/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>906</Index>
+                    <InterfaceName>Ethernet9/26/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>907</Index>
+                    <InterfaceName>Ethernet9/27/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>908</Index>
+                    <InterfaceName>Ethernet9/27/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>909</Index>
+                    <InterfaceName>Ethernet9/27/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>910</Index>
+                    <InterfaceName>Ethernet9/28/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>911</Index>
+                    <InterfaceName>Ethernet9/28/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>912</Index>
+                    <InterfaceName>Ethernet9/28/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>913</Index>
+                    <InterfaceName>Ethernet9/29/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>914</Index>
+                    <InterfaceName>Ethernet9/29/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>915</Index>
+                    <InterfaceName>Ethernet9/29/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>916</Index>
+                    <InterfaceName>Ethernet9/30/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>917</Index>
+                    <InterfaceName>Ethernet9/30/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>918</Index>
+                    <InterfaceName>Ethernet9/30/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>919</Index>
+                    <InterfaceName>Ethernet9/31/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>920</Index>
+                    <InterfaceName>Ethernet9/31/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>921</Index>
+                    <InterfaceName>Ethernet9/31/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>922</Index>
+                    <InterfaceName>Ethernet9/32/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>923</Index>
+                    <InterfaceName>Ethernet9/32/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>924</Index>
+                    <InterfaceName>Ethernet9/32/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>925</Index>
+                    <InterfaceName>Ethernet9/33/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>926</Index>
+                    <InterfaceName>Ethernet9/33/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>927</Index>
+                    <InterfaceName>Ethernet9/33/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>928</Index>
+                    <InterfaceName>Ethernet9/34/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>929</Index>
+                    <InterfaceName>Ethernet9/34/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>930</Index>
+                    <InterfaceName>Ethernet9/34/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>931</Index>
+                    <InterfaceName>Ethernet9/35/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>932</Index>
+                    <InterfaceName>Ethernet9/35/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>933</Index>
+                    <InterfaceName>Ethernet9/35/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>934</Index>
+                    <InterfaceName>Ethernet9/36/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>935</Index>
+                    <InterfaceName>Ethernet9/36/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>936</Index>
+                    <InterfaceName>Ethernet9/36/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>937</Index>
+                    <InterfaceName>Ethernet9/37/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>938</Index>
+                    <InterfaceName>Ethernet9/37/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>939</Index>
+                    <InterfaceName>Ethernet9/37/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>940</Index>
+                    <InterfaceName>Ethernet9/38/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>941</Index>
+                    <InterfaceName>Ethernet9/38/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>942</Index>
+                    <InterfaceName>Ethernet9/38/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>943</Index>
+                    <InterfaceName>Ethernet9/39/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>944</Index>
+                    <InterfaceName>Ethernet9/39/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>945</Index>
+                    <InterfaceName>Ethernet9/39/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>946</Index>
+                    <InterfaceName>Ethernet9/40/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>947</Index>
+                    <InterfaceName>Ethernet9/40/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>948</Index>
+                    <InterfaceName>Ethernet9/40/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>949</Index>
+                    <InterfaceName>Ethernet9/41/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>950</Index>
+                    <InterfaceName>Ethernet9/41/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>951</Index>
+                    <InterfaceName>Ethernet9/41/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>952</Index>
+                    <InterfaceName>Ethernet9/42/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>953</Index>
+                    <InterfaceName>Ethernet9/42/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>954</Index>
+                    <InterfaceName>Ethernet9/42/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>955</Index>
+                    <InterfaceName>Ethernet9/43/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>956</Index>
+                    <InterfaceName>Ethernet9/43/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>957</Index>
+                    <InterfaceName>Ethernet9/43/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>958</Index>
+                    <InterfaceName>Ethernet9/44/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>959</Index>
+                    <InterfaceName>Ethernet9/44/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>960</Index>
+                    <InterfaceName>Ethernet9/44/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>961</Index>
+                    <InterfaceName>Ethernet9/45/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>962</Index>
+                    <InterfaceName>Ethernet9/45/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>963</Index>
+                    <InterfaceName>Ethernet9/45/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>964</Index>
+                    <InterfaceName>Ethernet9/46/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>965</Index>
+                    <InterfaceName>Ethernet9/46/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>966</Index>
+                    <InterfaceName>Ethernet9/46/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>967</Index>
+                    <InterfaceName>Ethernet9/47/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>968</Index>
+                    <InterfaceName>Ethernet9/47/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>969</Index>
+                    <InterfaceName>Ethernet9/47/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>970</Index>
+                    <InterfaceName>Ethernet9/48/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>971</Index>
+                    <InterfaceName>Ethernet9/48/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>972</Index>
+                    <InterfaceName>Ethernet9/48/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>973</Index>
+                    <InterfaceName>Ethernet10/1/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>974</Index>
+                    <InterfaceName>Ethernet10/1/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>975</Index>
+                    <InterfaceName>Ethernet10/1/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>976</Index>
+                    <InterfaceName>Ethernet10/2/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>977</Index>
+                    <InterfaceName>Ethernet10/2/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>978</Index>
+                    <InterfaceName>Ethernet10/2/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>979</Index>
+                    <InterfaceName>Ethernet10/3/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>980</Index>
+                    <InterfaceName>Ethernet10/3/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>981</Index>
+                    <InterfaceName>Ethernet10/3/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>982</Index>
+                    <InterfaceName>Ethernet10/4/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>983</Index>
+                    <InterfaceName>Ethernet10/4/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>984</Index>
+                    <InterfaceName>Ethernet10/4/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>985</Index>
+                    <InterfaceName>Ethernet10/5/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>986</Index>
+                    <InterfaceName>Ethernet10/5/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>987</Index>
+                    <InterfaceName>Ethernet10/5/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>988</Index>
+                    <InterfaceName>Ethernet10/6/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>989</Index>
+                    <InterfaceName>Ethernet10/6/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>990</Index>
+                    <InterfaceName>Ethernet10/6/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>991</Index>
+                    <InterfaceName>Ethernet10/7/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>992</Index>
+                    <InterfaceName>Ethernet10/7/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>993</Index>
+                    <InterfaceName>Ethernet10/7/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>994</Index>
+                    <InterfaceName>Ethernet10/8/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>995</Index>
+                    <InterfaceName>Ethernet10/8/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>996</Index>
+                    <InterfaceName>Ethernet10/8/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>997</Index>
+                    <InterfaceName>Ethernet10/9/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>998</Index>
+                    <InterfaceName>Ethernet10/9/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>999</Index>
+                    <InterfaceName>Ethernet10/9/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1000</Index>
+                    <InterfaceName>Ethernet10/10/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1001</Index>
+                    <InterfaceName>Ethernet10/10/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1002</Index>
+                    <InterfaceName>Ethernet10/10/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1003</Index>
+                    <InterfaceName>Ethernet10/11/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1004</Index>
+                    <InterfaceName>Ethernet10/11/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1005</Index>
+                    <InterfaceName>Ethernet10/11/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1006</Index>
+                    <InterfaceName>Ethernet10/12/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1007</Index>
+                    <InterfaceName>Ethernet10/12/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1008</Index>
+                    <InterfaceName>Ethernet10/12/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1009</Index>
+                    <InterfaceName>Ethernet10/13/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1010</Index>
+                    <InterfaceName>Ethernet10/13/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1011</Index>
+                    <InterfaceName>Ethernet10/13/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1012</Index>
+                    <InterfaceName>Ethernet10/14/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1013</Index>
+                    <InterfaceName>Ethernet10/14/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1014</Index>
+                    <InterfaceName>Ethernet10/14/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1015</Index>
+                    <InterfaceName>Ethernet10/15/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1016</Index>
+                    <InterfaceName>Ethernet10/15/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1017</Index>
+                    <InterfaceName>Ethernet10/15/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1018</Index>
+                    <InterfaceName>Ethernet10/16/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1019</Index>
+                    <InterfaceName>Ethernet10/16/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1020</Index>
+                    <InterfaceName>Ethernet10/16/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1021</Index>
+                    <InterfaceName>Ethernet10/17/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1022</Index>
+                    <InterfaceName>Ethernet10/17/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1023</Index>
+                    <InterfaceName>Ethernet10/17/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1024</Index>
+                    <InterfaceName>Ethernet10/18/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1025</Index>
+                    <InterfaceName>Ethernet10/18/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1026</Index>
+                    <InterfaceName>Ethernet10/18/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1027</Index>
+                    <InterfaceName>Ethernet10/19/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1028</Index>
+                    <InterfaceName>Ethernet10/19/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1029</Index>
+                    <InterfaceName>Ethernet10/19/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1030</Index>
+                    <InterfaceName>Ethernet10/20/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1031</Index>
+                    <InterfaceName>Ethernet10/20/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1032</Index>
+                    <InterfaceName>Ethernet10/20/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1033</Index>
+                    <InterfaceName>Ethernet10/21/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1034</Index>
+                    <InterfaceName>Ethernet10/21/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1035</Index>
+                    <InterfaceName>Ethernet10/21/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1036</Index>
+                    <InterfaceName>Ethernet10/22/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1037</Index>
+                    <InterfaceName>Ethernet10/22/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1038</Index>
+                    <InterfaceName>Ethernet10/22/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1039</Index>
+                    <InterfaceName>Ethernet10/23/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1040</Index>
+                    <InterfaceName>Ethernet10/23/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1041</Index>
+                    <InterfaceName>Ethernet10/23/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1042</Index>
+                    <InterfaceName>Ethernet10/24/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1043</Index>
+                    <InterfaceName>Ethernet10/24/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1044</Index>
+                    <InterfaceName>Ethernet10/24/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1045</Index>
+                    <InterfaceName>Ethernet10/25/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1046</Index>
+                    <InterfaceName>Ethernet10/25/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1047</Index>
+                    <InterfaceName>Ethernet10/25/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1048</Index>
+                    <InterfaceName>Ethernet10/26/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1049</Index>
+                    <InterfaceName>Ethernet10/26/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1050</Index>
+                    <InterfaceName>Ethernet10/26/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1051</Index>
+                    <InterfaceName>Ethernet10/27/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1052</Index>
+                    <InterfaceName>Ethernet10/27/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1053</Index>
+                    <InterfaceName>Ethernet10/27/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1054</Index>
+                    <InterfaceName>Ethernet10/28/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1055</Index>
+                    <InterfaceName>Ethernet10/28/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1056</Index>
+                    <InterfaceName>Ethernet10/28/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1057</Index>
+                    <InterfaceName>Ethernet10/29/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1058</Index>
+                    <InterfaceName>Ethernet10/29/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1059</Index>
+                    <InterfaceName>Ethernet10/29/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1060</Index>
+                    <InterfaceName>Ethernet10/30/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1061</Index>
+                    <InterfaceName>Ethernet10/30/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1062</Index>
+                    <InterfaceName>Ethernet10/30/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1063</Index>
+                    <InterfaceName>Ethernet10/31/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1064</Index>
+                    <InterfaceName>Ethernet10/31/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1065</Index>
+                    <InterfaceName>Ethernet10/31/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1066</Index>
+                    <InterfaceName>Ethernet10/32/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1067</Index>
+                    <InterfaceName>Ethernet10/32/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1068</Index>
+                    <InterfaceName>Ethernet10/32/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1069</Index>
+                    <InterfaceName>Ethernet10/33/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1070</Index>
+                    <InterfaceName>Ethernet10/33/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1071</Index>
+                    <InterfaceName>Ethernet10/33/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1072</Index>
+                    <InterfaceName>Ethernet10/34/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1073</Index>
+                    <InterfaceName>Ethernet10/34/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1074</Index>
+                    <InterfaceName>Ethernet10/34/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1075</Index>
+                    <InterfaceName>Ethernet10/35/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1076</Index>
+                    <InterfaceName>Ethernet10/35/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1077</Index>
+                    <InterfaceName>Ethernet10/35/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1078</Index>
+                    <InterfaceName>Ethernet10/36/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1079</Index>
+                    <InterfaceName>Ethernet10/36/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1080</Index>
+                    <InterfaceName>Ethernet10/36/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1081</Index>
+                    <InterfaceName>Ethernet10/37/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1082</Index>
+                    <InterfaceName>Ethernet10/37/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1083</Index>
+                    <InterfaceName>Ethernet10/37/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1084</Index>
+                    <InterfaceName>Ethernet10/38/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1085</Index>
+                    <InterfaceName>Ethernet10/38/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1086</Index>
+                    <InterfaceName>Ethernet10/38/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1087</Index>
+                    <InterfaceName>Ethernet10/39/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1088</Index>
+                    <InterfaceName>Ethernet10/39/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1089</Index>
+                    <InterfaceName>Ethernet10/39/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1090</Index>
+                    <InterfaceName>Ethernet10/40/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1091</Index>
+                    <InterfaceName>Ethernet10/40/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1092</Index>
+                    <InterfaceName>Ethernet10/40/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1093</Index>
+                    <InterfaceName>Ethernet10/41/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1094</Index>
+                    <InterfaceName>Ethernet10/41/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1095</Index>
+                    <InterfaceName>Ethernet10/41/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1096</Index>
+                    <InterfaceName>Ethernet10/42/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1097</Index>
+                    <InterfaceName>Ethernet10/42/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1098</Index>
+                    <InterfaceName>Ethernet10/42/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1099</Index>
+                    <InterfaceName>Ethernet10/43/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1100</Index>
+                    <InterfaceName>Ethernet10/43/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1101</Index>
+                    <InterfaceName>Ethernet10/43/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1102</Index>
+                    <InterfaceName>Ethernet10/44/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1103</Index>
+                    <InterfaceName>Ethernet10/44/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1104</Index>
+                    <InterfaceName>Ethernet10/44/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1105</Index>
+                    <InterfaceName>Ethernet10/45/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1106</Index>
+                    <InterfaceName>Ethernet10/45/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1107</Index>
+                    <InterfaceName>Ethernet10/45/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1108</Index>
+                    <InterfaceName>Ethernet10/46/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1109</Index>
+                    <InterfaceName>Ethernet10/46/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1110</Index>
+                    <InterfaceName>Ethernet10/46/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1111</Index>
+                    <InterfaceName>Ethernet10/47/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1112</Index>
+                    <InterfaceName>Ethernet10/47/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1113</Index>
+                    <InterfaceName>Ethernet10/47/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1114</Index>
+                    <InterfaceName>Ethernet10/48/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>egress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1115</Index>
+                    <InterfaceName>Ethernet10/48/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>ingress</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+                <a:OpticalInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1116</Index>
+                    <InterfaceName>Ethernet10/48/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Direction>Bidirectional</a:Direction>
+                    <a:Dwdm>none</a:Dwdm>
+                    <a:DwdmChannel>0</a:DwdmChannel>
+                    <a:OpticalAddDropType i:nil="true" />
+                    <a:SlotIndex>0</a:SlotIndex>
+                </a:OpticalInterface>
+            </OpticalInterfaces>
+            <PowerInterfaces
+                xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution">
+                <a:PowerInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1</Index>
+                    <InterfaceName>power1/0</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Phase i:nil="true" />
+                    <a:PortType>C19</a:PortType>
+                    <a:PortTypeStr>C19</a:PortTypeStr>
+                    <a:Redundant>false</a:Redundant>
+                </a:PowerInterface>
+                <a:PowerInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>2</Index>
+                    <InterfaceName>power1/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Phase i:nil="true" />
+                    <a:PortType>C19</a:PortType>
+                    <a:PortTypeStr>C19</a:PortTypeStr>
+                    <a:Redundant>true</a:Redundant>
+                </a:PowerInterface>
+                <a:PowerInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>3</Index>
+                    <InterfaceName>power2/0</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Phase i:nil="true" />
+                    <a:PortType>C19</a:PortType>
+                    <a:PortTypeStr>C19</a:PortTypeStr>
+                    <a:Redundant>false</a:Redundant>
+                </a:PowerInterface>
+                <a:PowerInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>4</Index>
+                    <InterfaceName>power2/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Phase i:nil="true" />
+                    <a:PortType>C19</a:PortType>
+                    <a:PortTypeStr>C19</a:PortTypeStr>
+                    <a:Redundant>true</a:Redundant>
+                </a:PowerInterface>
+                <a:PowerInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>5</Index>
+                    <InterfaceName>power3/0</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Phase i:nil="true" />
+                    <a:PortType>C19</a:PortType>
+                    <a:PortTypeStr>C19</a:PortTypeStr>
+                    <a:Redundant>false</a:Redundant>
+                </a:PowerInterface>
+                <a:PowerInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>6</Index>
+                    <InterfaceName>power3/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Phase i:nil="true" />
+                    <a:PortType>C19</a:PortType>
+                    <a:PortTypeStr>C19</a:PortTypeStr>
+                    <a:Redundant>true</a:Redundant>
+                </a:PowerInterface>
+                <a:PowerInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>7</Index>
+                    <InterfaceName>power4/0</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Phase i:nil="true" />
+                    <a:PortType>C19</a:PortType>
+                    <a:PortTypeStr>C19</a:PortTypeStr>
+                    <a:Redundant>false</a:Redundant>
+                </a:PowerInterface>
+                <a:PowerInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>8</Index>
+                    <InterfaceName>power4/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Phase i:nil="true" />
+                    <a:PortType>C19</a:PortType>
+                    <a:PortTypeStr>C19</a:PortTypeStr>
+                    <a:Redundant>true</a:Redundant>
+                </a:PowerInterface>
+                <a:PowerInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>9</Index>
+                    <InterfaceName>power7/0</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Phase i:nil="true" />
+                    <a:PortType>C19</a:PortType>
+                    <a:PortTypeStr>C19</a:PortTypeStr>
+                    <a:Redundant>false</a:Redundant>
+                </a:PowerInterface>
+                <a:PowerInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>10</Index>
+                    <InterfaceName>power7/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Phase i:nil="true" />
+                    <a:PortType>C19</a:PortType>
+                    <a:PortTypeStr>C19</a:PortTypeStr>
+                    <a:Redundant>true</a:Redundant>
+                </a:PowerInterface>
+                <a:PowerInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>11</Index>
+                    <InterfaceName>power8/0</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Phase i:nil="true" />
+                    <a:PortType>C19</a:PortType>
+                    <a:PortTypeStr>C19</a:PortTypeStr>
+                    <a:Redundant>false</a:Redundant>
+                </a:PowerInterface>
+                <a:PowerInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>12</Index>
+                    <InterfaceName>power8/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Phase i:nil="true" />
+                    <a:PortType>C19</a:PortType>
+                    <a:PortTypeStr>C19</a:PortTypeStr>
+                    <a:Redundant>true</a:Redundant>
+                </a:PowerInterface>
+                <a:PowerInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>13</Index>
+                    <InterfaceName>power9/0</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Phase i:nil="true" />
+                    <a:PortType>C19</a:PortType>
+                    <a:PortTypeStr>C19</a:PortTypeStr>
+                    <a:Redundant>false</a:Redundant>
+                </a:PowerInterface>
+                <a:PowerInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>14</Index>
+                    <InterfaceName>power9/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Phase i:nil="true" />
+                    <a:PortType>C19</a:PortType>
+                    <a:PortTypeStr>C19</a:PortTypeStr>
+                    <a:Redundant>true</a:Redundant>
+                </a:PowerInterface>
+                <a:PowerInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>15</Index>
+                    <InterfaceName>power10/0</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Phase i:nil="true" />
+                    <a:PortType>C19</a:PortType>
+                    <a:PortTypeStr>C19</a:PortTypeStr>
+                    <a:Redundant>false</a:Redundant>
+                </a:PowerInterface>
+                <a:PowerInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>16</Index>
+                    <InterfaceName>power10/1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName i:nil="true" />
+                    <SonicName i:nil="true" />
+                    <Speed>0</Speed>
+                    <a:Phase i:nil="true" />
+                    <a:PortType>C19</a:PortType>
+                    <a:PortTypeStr>C19</a:PortTypeStr>
+                    <a:Redundant>true</a:Redundant>
+                </a:PowerInterface>
+            </PowerInterfaces>
+            <Properties />
+            <SerialInterfaces
+                xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution">
+                <a:SerialInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>true</EnableFlowControl>
+                    <Index>1</Index>
+                    <InterfaceName>console</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName>console</PortName>
+                    <SonicName i:nil="true" />
+                    <Speed>9600</Speed>
+                    <a:Logical>false</a:Logical>
+                    <a:TcpPortName i:nil="true" />
+                </a:SerialInterface>
+                <a:SerialInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>false</EnableFlowControl>
+                    <Index>2</Index>
+                    <InterfaceName>logical1</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName>logical1</PortName>
+                    <SonicName i:nil="true" />
+                    <Speed>9600</Speed>
+                    <a:Logical>true</a:Logical>
+                    <a:TcpPortName>1</a:TcpPortName>
+                </a:SerialInterface>
+                <a:SerialInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>false</EnableFlowControl>
+                    <Index>3</Index>
+                    <InterfaceName>logical2</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName>logical2</PortName>
+                    <SonicName i:nil="true" />
+                    <Speed>9600</Speed>
+                    <a:Logical>true</a:Logical>
+                    <a:TcpPortName>2</a:TcpPortName>
+                </a:SerialInterface>
+                <a:SerialInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>false</EnableFlowControl>
+                    <Index>4</Index>
+                    <InterfaceName>logical3</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName>logical3</PortName>
+                    <SonicName i:nil="true" />
+                    <Speed>9600</Speed>
+                    <a:Logical>true</a:Logical>
+                    <a:TcpPortName>3</a:TcpPortName>
+                </a:SerialInterface>
+                <a:SerialInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>false</EnableFlowControl>
+                    <Index>5</Index>
+                    <InterfaceName>logical4</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName>logical4</PortName>
+                    <SonicName i:nil="true" />
+                    <Speed>9600</Speed>
+                    <a:Logical>true</a:Logical>
+                    <a:TcpPortName>4</a:TcpPortName>
+                </a:SerialInterface>
+                <a:SerialInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>false</EnableFlowControl>
+                    <Index>6</Index>
+                    <InterfaceName>logical5</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName>logical5</PortName>
+                    <SonicName i:nil="true" />
+                    <Speed>9600</Speed>
+                    <a:Logical>true</a:Logical>
+                    <a:TcpPortName>5</a:TcpPortName>
+                </a:SerialInterface>
+                <a:SerialInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>false</EnableFlowControl>
+                    <Index>7</Index>
+                    <InterfaceName>logical6</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName>logical6</PortName>
+                    <SonicName i:nil="true" />
+                    <Speed>9600</Speed>
+                    <a:Logical>true</a:Logical>
+                    <a:TcpPortName>6</a:TcpPortName>
+                </a:SerialInterface>
+                <a:SerialInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>false</EnableFlowControl>
+                    <Index>8</Index>
+                    <InterfaceName>logical7</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName>logical7</PortName>
+                    <SonicName i:nil="true" />
+                    <Speed>9600</Speed>
+                    <a:Logical>true</a:Logical>
+                    <a:TcpPortName>7</a:TcpPortName>
+                </a:SerialInterface>
+                <a:SerialInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>false</EnableFlowControl>
+                    <Index>9</Index>
+                    <InterfaceName>logical8</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName>logical8</PortName>
+                    <SonicName i:nil="true" />
+                    <Speed>9600</Speed>
+                    <a:Logical>true</a:Logical>
+                    <a:TcpPortName>8</a:TcpPortName>
+                </a:SerialInterface>
+                <a:SerialInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>false</EnableFlowControl>
+                    <Index>10</Index>
+                    <InterfaceName>logical9</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName>logical9</PortName>
+                    <SonicName i:nil="true" />
+                    <Speed>9600</Speed>
+                    <a:Logical>true</a:Logical>
+                    <a:TcpPortName>9</a:TcpPortName>
+                </a:SerialInterface>
+                <a:SerialInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>false</EnableFlowControl>
+                    <Index>11</Index>
+                    <InterfaceName>logical10</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName>logical10</PortName>
+                    <SonicName i:nil="true" />
+                    <Speed>9600</Speed>
+                    <a:Logical>true</a:Logical>
+                    <a:TcpPortName>10</a:TcpPortName>
+                </a:SerialInterface>
+                <a:SerialInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>false</EnableFlowControl>
+                    <Index>12</Index>
+                    <InterfaceName>logical11</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName>logical11</PortName>
+                    <SonicName i:nil="true" />
+                    <Speed>9600</Speed>
+                    <a:Logical>true</a:Logical>
+                    <a:TcpPortName>11</a:TcpPortName>
+                </a:SerialInterface>
+                <a:SerialInterface>
+                    <ElementType>DeviceInterface</ElementType>
+                    <AlternateSpeeds i:nil="true" />
+                    <EnableFlowControl>false</EnableFlowControl>
+                    <Index>13</Index>
+                    <InterfaceName>logical12</InterfaceName>
+                    <MultiPortsInterface>false</MultiPortsInterface>
+                    <PortName>logical12</PortName>
+                    <SonicName i:nil="true" />
+                    <Speed>9600</Speed>
+                    <a:Logical>true</a:Logical>
+                    <a:TcpPortName>12</a:TcpPortName>
+                </a:SerialInterface>
+            </SerialInterfaces>
+            <VPNTunnelInterfaces
+                xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution" />
+            <VendorStr>Arista</VendorStr>
+        </DeviceInfo>
+    </DeviceInfos>
+    <DpgDec>
+        <DeviceDataPlaneInfo>
+            <IPSecTunnels />
+            <LoopbackIPInterfaces
+                xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution">
+                <a:LoopbackIPInterface>
+                    <ElementType>LoopbackInterface</ElementType>
+                    <Name>HostIP</Name>
+                    <AttachTo>Loopback0</AttachTo>
+                    <a:Prefix xmlns:b="Microsoft.Search.Autopilot.NetMux">
+                        <b:IPPrefix>10.2.0.1/32</b:IPPrefix>
+                    </a:Prefix>
+                    <a:PrefixStr>10.2.0.1/32</a:PrefixStr>
+                </a:LoopbackIPInterface>
+                <a:LoopbackIPInterface>
+                    <ElementType>LoopbackInterface</ElementType>
+                    <Name>HostIP1</Name>
+                    <AttachTo>Loopback0</AttachTo>
+                    <a:Prefix xmlns:b="Microsoft.Search.Autopilot.NetMux">
+                        <b:IPPrefix>fc00:20::1/128</b:IPPrefix>
+                    </a:Prefix>
+                    <a:PrefixStr>fc00:20::1/128</a:PrefixStr>
+                </a:LoopbackIPInterface>
+                <a:LoopbackIPInterface>
+                    <ElementType>LoopbackInterface</ElementType>
+                    <Name>Loopback4096</Name>
+                    <AttachTo>Loopback4096</AttachTo>
+                    <a:Prefix xmlns:b="Microsoft.Search.Autopilot.NetMux">
+                        <b:IPPrefix>192.0.0.1/32</b:IPPrefix>
+                    </a:Prefix>
+                    <a:PrefixStr>192.0.0.1/32</a:PrefixStr>
+                </a:LoopbackIPInterface>
+                <a:LoopbackIPInterface>
+                    <ElementType>LoopbackInterface</ElementType>
+                    <Name>v6Loopback4096</Name>
+                    <AttachTo>Loopback4096</AttachTo>
+                    <a:Prefix xmlns:b="Microsoft.Search.Autopilot.NetMux">
+                        <b:IPPrefix>2603:10e2:400::1/128</b:IPPrefix>
+                    </a:Prefix>
+                    <a:PrefixStr>2603:10e2:400::1/128</a:PrefixStr>
+                </a:LoopbackIPInterface>
+            </LoopbackIPInterfaces>
+            <ManagementIPInterfaces
+                xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution" />
+            <ManagementVIPInterfaces
+                xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution" />
+            <MplsInterfaces />
+            <MplsTeInterfaces />
+            <RsvpInterfaces />
+            <Hostname>str-sonic-lc03-ASIC00</Hostname>
+            <PortChannelInterfaces>
+                <PortChannel>
+                    <ElementType>PortChannelInterface</ElementType>
+                    <Name>PortChannel102</Name>
+                    <AttachTo>Eth0;Eth8</AttachTo>
+                    <SubInterface />
+                </PortChannel>
+                <PortChannel>
+                    <ElementType>PortChannelInterface</ElementType>
+                    <Name>PortChannel104</Name>
+                    <AttachTo>Eth16;Eth24</AttachTo>
+                    <SubInterface />
+                </PortChannel>
+                <PortChannel>
+                    <ElementType>PortChannelInterface</ElementType>
+                    <Name>PortChannel106</Name>
+                    <AttachTo>Eth32;Eth40</AttachTo>
+                    <SubInterface />
+                </PortChannel>
+                <PortChannel>
+                    <ElementType>PortChannelInterface</ElementType>
+                    <Name>PortChannel108</Name>
+                    <AttachTo>Eth48;Eth56</AttachTo>
+                    <SubInterface />
+                </PortChannel>
+                <PortChannel>
+                    <ElementType>PortChannelInterface</ElementType>
+                    <Name>PortChannel1010</Name>
+                    <AttachTo>Eth72;Eth64</AttachTo>
+                    <SubInterface />
+                </PortChannel>
+                <PortChannel>
+                    <ElementType>PortChannelInterface</ElementType>
+                    <Name>PortChannel1012</Name>
+                    <AttachTo>Eth80;Eth88</AttachTo>
+                    <SubInterface />
+                </PortChannel>
+                <PortChannel>
+                    <ElementType>PortChannelInterface</ElementType>
+                    <Name>PortChannel1016</Name>
+                    <AttachTo>Eth104;Eth112</AttachTo>
+                    <SubInterface />
+                </PortChannel>
+                <PortChannel>
+                    <ElementType>PortChannelInterface</ElementType>
+                    <Name>PortChannel1020</Name>
+                    <AttachTo>Eth128;Eth136</AttachTo>
+                    <SubInterface />
+                </PortChannel>
+            </PortChannelInterfaces>
+            <SubInterfaces />
+            <VlanInterfaces />
+            <IPInterfaces>
+                <IPInterface>
+                    <ElementType>IPInterface</ElementType>
+                    <Name>VoqInband</Name>
+                    <AttachTo>Ethernet-IB0</AttachTo>
+                    <Prefix>10.241.88.0/32</Prefix>
+                </IPInterface>
+                <IPInterface>
+                    <ElementType>IPInterface</ElementType>
+                    <Name>v6VoqInband</Name>
+                    <AttachTo>Ethernet-IB0</AttachTo>
+                    <Prefix>2a01:111:e210:5e:0:a:f158:0/128</Prefix>
+                </IPInterface>
+                <IPInterface>
+                    <ElementType>IPInterface</ElementType>
+                    <Name i:nil="true" />
+                    <AttachTo>PortChannel102</AttachTo>
+                    <Prefix>10.0.0.0/31</Prefix>
+                </IPInterface>
+                <IPInterface>
+                    <ElementType>IPInterface</ElementType>
+                    <Name i:nil="true" />
+                    <AttachTo>PortChannel102</AttachTo>
+                    <Prefix>fc00::1/126</Prefix>
+                </IPInterface>
+                <IPInterface>
+                    <ElementType>IPInterface</ElementType>
+                    <Name i:nil="true" />
+                    <AttachTo>PortChannel104</AttachTo>
+                    <Prefix>10.0.0.4/31</Prefix>
+                </IPInterface>
+                <IPInterface>
+                    <ElementType>IPInterface</ElementType>
+                    <Name i:nil="true" />
+                    <AttachTo>PortChannel104</AttachTo>
+                    <Prefix>fc00::9/126</Prefix>
+                </IPInterface>
+                <IPInterface>
+                    <ElementType>IPInterface</ElementType>
+                    <Name i:nil="true" />
+                    <AttachTo>PortChannel106</AttachTo>
+                    <Prefix>10.0.0.8/31</Prefix>
+                </IPInterface>
+                <IPInterface>
+                    <ElementType>IPInterface</ElementType>
+                    <Name i:nil="true" />
+                    <AttachTo>PortChannel106</AttachTo>
+                    <Prefix>fc00::11/126</Prefix>
+                </IPInterface>
+                <IPInterface>
+                    <ElementType>IPInterface</ElementType>
+                    <Name i:nil="true" />
+                    <AttachTo>PortChannel108</AttachTo>
+                    <Prefix>10.0.0.12/31</Prefix>
+                </IPInterface>
+                <IPInterface>
+                    <ElementType>IPInterface</ElementType>
+                    <Name i:nil="true" />
+                    <AttachTo>PortChannel108</AttachTo>
+                    <Prefix>fc00::19/126</Prefix>
+                </IPInterface>
+                <IPInterface>
+                    <ElementType>IPInterface</ElementType>
+                    <Name i:nil="true" />
+                    <AttachTo>PortChannel1010</AttachTo>
+                    <Prefix>10.0.0.16/31</Prefix>
+                </IPInterface>
+                <IPInterface>
+                    <ElementType>IPInterface</ElementType>
+                    <Name i:nil="true" />
+                    <AttachTo>PortChannel1010</AttachTo>
+                    <Prefix>fc00::21/126</Prefix>
+                </IPInterface>
+                <IPInterface>
+                    <ElementType>IPInterface</ElementType>
+                    <Name i:nil="true" />
+                    <AttachTo>PortChannel1012</AttachTo>
+                    <Prefix>10.0.0.20/31</Prefix>
+                </IPInterface>
+                <IPInterface>
+                    <ElementType>IPInterface</ElementType>
+                    <Name i:nil="true" />
+                    <AttachTo>PortChannel1012</AttachTo>
+                    <Prefix>fc00::29/126</Prefix>
+                </IPInterface>
+                <IPInterface>
+                    <ElementType>IPInterface</ElementType>
+                    <Name i:nil="true" />
+                    <AttachTo>PortChannel1016</AttachTo>
+                    <Prefix>10.0.0.28/31</Prefix>
+                </IPInterface>
+                <IPInterface>
+                    <ElementType>IPInterface</ElementType>
+                    <Name i:nil="true" />
+                    <AttachTo>PortChannel1016</AttachTo>
+                    <Prefix>fc00::39/126</Prefix>
+                </IPInterface>
+                <IPInterface>
+                    <ElementType>IPInterface</ElementType>
+                    <Name i:nil="true" />
+                    <AttachTo>PortChannel1020</AttachTo>
+                    <Prefix>10.0.0.24/31</Prefix>
+                </IPInterface>
+                <IPInterface>
+                    <ElementType>IPInterface</ElementType>
+                    <Name i:nil="true" />
+                    <AttachTo>PortChannel1020</AttachTo>
+                    <Prefix>fc00::31/126</Prefix>
+                </IPInterface>
+            </IPInterfaces>
+            <DataAcls />
+            <AclInterfaces />
+            <NatInterfaces
+                xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution" />
+            <DownstreamSummaries />
+            <DownstreamSummarySet
+                xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution" />
+        </DeviceDataPlaneInfo>
+        <DeviceDataPlaneInfo>
+            <IPSecTunnels />
+            <LoopbackIPInterfaces
+                xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution">
+                <a:LoopbackIPInterface>
+                    <ElementType>LoopbackInterface</ElementType>
+                    <Name>HostIP</Name>
+                    <AttachTo>Loopback0</AttachTo>
+                    <a:Prefix xmlns:b="Microsoft.Search.Autopilot.NetMux">
+                        <b:IPPrefix>10.2.0.1/32</b:IPPrefix>
+                    </a:Prefix>
+                    <a:PrefixStr>10.2.0.1/32</a:PrefixStr>
+                </a:LoopbackIPInterface>
+                <a:LoopbackIPInterface>
+                    <ElementType>LoopbackInterface</ElementType>
+                    <Name>HostIP1</Name>
+                    <AttachTo>Loopback0</AttachTo>
+                    <a:Prefix xmlns:b="Microsoft.Search.Autopilot.NetMux">
+                        <b:IPPrefix>fc00:20::1/128</b:IPPrefix>
+                    </a:Prefix>
+                    <a:PrefixStr>fc00:20::1/128</a:PrefixStr>
+                </a:LoopbackIPInterface>
+                <a:LoopbackIPInterface>
+                    <ElementType>LoopbackInterface</ElementType>
+                    <Name>Loopback4096</Name>
+                    <AttachTo>Loopback4096</AttachTo>
+                    <a:Prefix xmlns:b="Microsoft.Search.Autopilot.NetMux">
+                        <b:IPPrefix>192.0.0.2/32</b:IPPrefix>
+                    </a:Prefix>
+                    <a:PrefixStr>192.0.0.2/32</a:PrefixStr>
+                </a:LoopbackIPInterface>
+                <a:LoopbackIPInterface>
+                    <ElementType>LoopbackInterface</ElementType>
+                    <Name>v6Loopback4096</Name>
+                    <AttachTo>Loopback4096</AttachTo>
+                    <a:Prefix xmlns:b="Microsoft.Search.Autopilot.NetMux">
+                        <b:IPPrefix>2603:10e2:400::2/128</b:IPPrefix>
+                    </a:Prefix>
+                    <a:PrefixStr>2603:10e2:400::2/128</a:PrefixStr>
+                </a:LoopbackIPInterface>
+            </LoopbackIPInterfaces>
+            <ManagementIPInterfaces
+                xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution" />
+            <ManagementVIPInterfaces
+                xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution" />
+            <MplsInterfaces />
+            <MplsTeInterfaces />
+            <RsvpInterfaces />
+            <Hostname>str-sonic-lc03-ASIC01</Hostname>
+            <PortChannelInterfaces />
+            <SubInterfaces />
+            <VlanInterfaces />
+            <IPInterfaces>
+                <IPInterface>
+                    <ElementType>IPInterface</ElementType>
+                    <Name>VoqInband</Name>
+                    <AttachTo>Ethernet-IB1</AttachTo>
+                    <Prefix>10.241.88.1/32</Prefix>
+                </IPInterface>
+                <IPInterface>
+                    <ElementType>IPInterface</ElementType>
+                    <Name>v6VoqInband</Name>
+                    <AttachTo>Ethernet-IB1</AttachTo>
+                    <Prefix>2a01:111:e210:5e:0:a:f158:100/128</Prefix>
+                </IPInterface>
+            </IPInterfaces>
+            <DataAcls />
+            <AclInterfaces />
+            <NatInterfaces
+                xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution" />
+            <DownstreamSummaries />
+            <DownstreamSummarySet
+                xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution" />
+        </DeviceDataPlaneInfo>
+        <DeviceDataPlaneInfo>
+            <IPSecTunnels />
+            <LoopbackIPInterfaces
+                xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution">
+                <a:LoopbackIPInterface>
+                    <ElementType>LoopbackInterface</ElementType>
+                    <Name>HostIP</Name>
+                    <AttachTo>Loopback0</AttachTo>
+                    <a:Prefix xmlns:b="Microsoft.Search.Autopilot.NetMux">
+                        <b:IPPrefix>10.2.0.1/32</b:IPPrefix>
+                    </a:Prefix>
+                    <a:PrefixStr>10.2.0.1/32</a:PrefixStr>
+                </a:LoopbackIPInterface>
+                <a:LoopbackIPInterface>
+                    <ElementType>LoopbackInterface</ElementType>
+                    <Name>HostIP1</Name>
+                    <AttachTo>Loopback0</AttachTo>
+                    <a:Prefix xmlns:b="Microsoft.Search.Autopilot.NetMux">
+                        <b:IPPrefix>fc00:20::1/128</b:IPPrefix>
+                    </a:Prefix>
+                    <a:PrefixStr>fc00:20::1/128</a:PrefixStr>
+                </a:LoopbackIPInterface>
+            </LoopbackIPInterfaces>
+            <ManagementIPInterfaces
+                xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution">
+                <a:ManagementIPInterface>
+                    <ElementType>ManagementInterface</ElementType>
+                    <Name>ManagementIP</Name>
+                    <AttachTo>Management1/1</AttachTo>
+                    <a:Prefix xmlns:b="Microsoft.Search.Autopilot.NetMux">
+                        <b:IPPrefix>10.3.146.58/24</b:IPPrefix>
+                    </a:Prefix>
+                    <a:PrefixStr>10.3.146.58/24</a:PrefixStr>
+                    <a:ReuseScopeStr i:nil="true" />
+                </a:ManagementIPInterface>
+                <a:ManagementIPInterface>
+                    <ElementType>ManagementInterface</ElementType>
+                    <Name>v6ManagementIP</Name>
+                    <AttachTo>Management1/1</AttachTo>
+                    <a:Prefix xmlns:b="Microsoft.Search.Autopilot.NetMux">
+                        <b:IPPrefix>2a01:111:e210:3000::a03:923a/64</b:IPPrefix>
+                    </a:Prefix>
+                    <a:PrefixStr>2a01:111:e210:3000::a03:923a/64</a:PrefixStr>
+                    <a:ReuseScopeStr i:nil="true" />
+                </a:ManagementIPInterface>
+            </ManagementIPInterfaces>
+            <ManagementVIPInterfaces
+                xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution" />
+            <MplsInterfaces />
+            <MplsTeInterfaces />
+            <RsvpInterfaces />
+            <Hostname>str-sonic-lc03</Hostname>
+            <PortChannelInterfaces />
+            <SubInterfaces />
+            <VlanInterfaces />
+            <IPInterfaces />
+            <DataAcls />
+            <AclInterfaces />
+            <NatInterfaces
+                xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution" />
+            <DownstreamSummaries />
+            <DownstreamSummarySet
+                xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution" />
+        </DeviceDataPlaneInfo>
+    </DpgDec>
+    <LinkMetadataDeclaration>
+        <Link xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution">
+            <a:LinkMetadata>
+                <a:Name>str-sonic-lc03-ASIC00:Eth0;ARISTA91T3:Ethernet1</a:Name>
+                <a:Properties>
+                    <a:DeviceProperty>
+                        <a:Name>EndItfKey</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>Ethernet1#0:1:0:1#1</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>StartItfKey</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>Ethernet3/1/1#0:3:0:1#1</a:Value>
+                    </a:DeviceProperty>
+                </a:Properties>
+                <a:Key>str-sonic:Ethernet3/1/1;ARISTA91T3:Ethernet1</a:Key>
+            </a:LinkMetadata>
+            <a:LinkMetadata>
+                <a:Name>str-sonic-lc03-ASIC00:Eth8;ARISTA91T3:Ethernet2</a:Name>
+                <a:Properties>
+                    <a:DeviceProperty>
+                        <a:Name>EndItfKey</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>Ethernet2#0:1:0:2#1</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>StartItfKey</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>Ethernet3/2/1#0:3:0:2#1</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>EndOpticalTerminalDevice</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>Sonic-OMT</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>FiberDistance</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>20.3</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>Frequency</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>196.025</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>MacSecEnabled</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>True</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>Modulation</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>16QAM</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>OpticSkuA</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>optic-sku-01</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>OpticSkuZ</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>optic-sku-02</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>OpticalCircuitID</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>optical-circuit-01</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>RxPower</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>-6</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>SolutionId</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>span01</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>Speed</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>400000</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>StartOpticalTerminalDevice</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>optical-sku-01</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>TxPower</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>-10</a:Value>
+                    </a:DeviceProperty>
+                </a:Properties>
+                <a:Key>str-sonic:Ethernet3/2/1;ARISTA91T3:Ethernet2</a:Key>
+            </a:LinkMetadata>
+            <a:LinkMetadata>
+                <a:Name>str-sonic-lc03-ASIC00:Eth16;ARISTA93T3:Ethernet1</a:Name>
+                <a:Properties>
+                    <a:DeviceProperty>
+                        <a:Name>EndItfKey</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>Ethernet1#0:1:0:1#1</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>StartItfKey</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>Ethernet3/3/1#0:3:0:3#1</a:Value>
+                    </a:DeviceProperty>
+                </a:Properties>
+                <a:Key>str-sonic:Ethernet3/3/1;ARISTA93T3:Ethernet1</a:Key>
+            </a:LinkMetadata>
+            <a:LinkMetadata>
+                <a:Name>str-sonic-lc03-ASIC00:Eth24;ARISTA93T3:Ethernet2</a:Name>
+                <a:Properties>
+                    <a:DeviceProperty>
+                        <a:Name>EndItfKey</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>Ethernet2#0:1:0:2#1</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>StartItfKey</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>Ethernet3/4/1#0:3:0:4#1</a:Value>
+                    </a:DeviceProperty>
+                </a:Properties>
+                <a:Key>str-sonic:Ethernet3/4/1;ARISTA93T3:Ethernet2</a:Key>
+            </a:LinkMetadata>
+            <a:LinkMetadata>
+                <a:Name>str-sonic-lc03-ASIC00:Eth32;ARISTA05T3:Ethernet1</a:Name>
+                <a:Properties>
+                    <a:DeviceProperty>
+                        <a:Name>EndItfKey</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>Ethernet1#0:1:0:1#1</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>StartItfKey</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>Ethernet3/5/1#0:3:0:5#1</a:Value>
+                    </a:DeviceProperty>
+                </a:Properties>
+                <a:Key>str-sonic:Ethernet3/5/1;ARISTA05T3:Ethernet1</a:Key>
+            </a:LinkMetadata>
+            <a:LinkMetadata>
+                <a:Name>str-sonic-lc03-ASIC00:Eth40;ARISTA05T3:Ethernet2</a:Name>
+                <a:Properties>
+                    <a:DeviceProperty>
+                        <a:Name>EndItfKey</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>Ethernet2#0:1:0:2#1</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>StartItfKey</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>Ethernet3/6/1#0:3:0:6#1</a:Value>
+                    </a:DeviceProperty>
+                </a:Properties>
+                <a:Key>str-sonic:Ethernet3/6/1;ARISTA05T3:Ethernet2</a:Key>
+            </a:LinkMetadata>
+            <a:LinkMetadata>
+                <a:Name>str-sonic-lc03-ASIC00:Eth48;ARISTA07T3:Ethernet1</a:Name>
+                <a:Properties>
+                    <a:DeviceProperty>
+                        <a:Name>EndItfKey</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>Ethernet1#0:1:0:1#1</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>StartItfKey</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>Ethernet3/7/1#0:3:0:7#1</a:Value>
+                    </a:DeviceProperty>
+                </a:Properties>
+                <a:Key>str-sonic:Ethernet3/7/1;ARISTA07T3:Ethernet1</a:Key>
+            </a:LinkMetadata>
+            <a:LinkMetadata>
+                <a:Name>str-sonic-lc03-ASIC00:Eth56;ARISTA07T3:Ethernet2</a:Name>
+                <a:Properties>
+                    <a:DeviceProperty>
+                        <a:Name>EndItfKey</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>Ethernet2#0:1:0:2#1</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>StartItfKey</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>Ethernet3/8/1#0:3:0:8#1</a:Value>
+                    </a:DeviceProperty>
+                </a:Properties>
+                <a:Key>str-sonic:Ethernet3/8/1;ARISTA07T3:Ethernet2</a:Key>
+            </a:LinkMetadata>
+            <a:LinkMetadata>
+                <a:Name>str-sonic-lc03-ASIC00:Eth64;ARISTA09T3:Ethernet1</a:Name>
+                <a:Properties>
+                    <a:DeviceProperty>
+                        <a:Name>EndItfKey</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>Ethernet1#0:1:0:1#1</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>StartItfKey</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>Ethernet3/9/1#0:3:0:9#1</a:Value>
+                    </a:DeviceProperty>
+                </a:Properties>
+                <a:Key>str-sonic:Ethernet3/9/1;ARISTA09T3:Ethernet1</a:Key>
+            </a:LinkMetadata>
+            <a:LinkMetadata>
+                <a:Name>str-sonic-lc03-ASIC00:Eth72;ARISTA09T3:Ethernet2</a:Name>
+                <a:Properties>
+                    <a:DeviceProperty>
+                        <a:Name>EndItfKey</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>Ethernet2#0:1:0:2#1</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>StartItfKey</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>Ethernet3/10/1#0:3:0:10#1</a:Value>
+                    </a:DeviceProperty>
+                </a:Properties>
+                <a:Key>str-sonic:Ethernet3/10/1;ARISTA09T3:Ethernet2</a:Key>
+            </a:LinkMetadata>
+            <a:LinkMetadata>
+                <a:Name>str-sonic-lc03-ASIC00:Eth80;ARISTA11T3:Ethernet1</a:Name>
+                <a:Properties>
+                    <a:DeviceProperty>
+                        <a:Name>EndItfKey</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>Ethernet1#0:1:0:1#1</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>StartItfKey</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>Ethernet3/11/1#0:3:0:11#1</a:Value>
+                    </a:DeviceProperty>
+                </a:Properties>
+                <a:Key>str-sonic:Ethernet3/11/1;ARISTA11T3:Ethernet1</a:Key>
+            </a:LinkMetadata>
+            <a:LinkMetadata>
+                <a:Name>str-sonic-lc03-ASIC00:Eth88;ARISTA11T3:Ethernet2</a:Name>
+                <a:Properties>
+                    <a:DeviceProperty>
+                        <a:Name>EndItfKey</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>Ethernet2#0:1:0:2#1</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>StartItfKey</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>Ethernet3/12/1#0:3:0:12#1</a:Value>
+                    </a:DeviceProperty>
+                </a:Properties>
+                <a:Key>str-sonic:Ethernet3/12/1;ARISTA11T3:Ethernet2</a:Key>
+            </a:LinkMetadata>
+            <a:LinkMetadata>
+                <a:Name>str-sonic-lc03-ASIC00:Eth96;ARISTA13T3:Ethernet1</a:Name>
+                <a:Properties>
+                    <a:DeviceProperty>
+                        <a:Name>EndItfKey</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>Ethernet1#0:1:0:1#1</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>StartItfKey</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>Ethernet3/13/1#0:3:0:13#1</a:Value>
+                    </a:DeviceProperty>
+                </a:Properties>
+                <a:Key>str-sonic:Ethernet3/13/1;ARISTA13T3:Ethernet1</a:Key>
+            </a:LinkMetadata>
+            <a:LinkMetadata>
+                <a:Name>str-sonic-lc03-ASIC00:Eth104;ARISTA15T3:Ethernet1</a:Name>
+                <a:Properties>
+                    <a:DeviceProperty>
+                        <a:Name>EndItfKey</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>Ethernet1#0:1:0:1#1</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>StartItfKey</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>Ethernet3/14/1#0:3:0:14#1</a:Value>
+                    </a:DeviceProperty>
+                </a:Properties>
+                <a:Key>str-sonic:Ethernet3/14/1;ARISTA15T3:Ethernet1</a:Key>
+            </a:LinkMetadata>
+            <a:LinkMetadata>
+                <a:Name>str-sonic-lc03-ASIC00:Eth112;ARISTA15T3:Ethernet2</a:Name>
+                <a:Properties>
+                    <a:DeviceProperty>
+                        <a:Name>EndItfKey</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>Ethernet2#0:1:0:2#1</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>StartItfKey</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>Ethernet3/15/1#0:3:0:15#1</a:Value>
+                    </a:DeviceProperty>
+                </a:Properties>
+                <a:Key>str-sonic:Ethernet3/15/1;ARISTA15T3:Ethernet2</a:Key>
+            </a:LinkMetadata>
+            <a:LinkMetadata>
+                <a:Name>str-sonic-lc03-ASIC00:Eth120;ARISTA17T3:Ethernet1</a:Name>
+                <a:Properties>
+                    <a:DeviceProperty>
+                        <a:Name>EndItfKey</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>Ethernet1#0:1:0:1#1</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>StartItfKey</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>Ethernet3/16/1#0:3:0:16#1</a:Value>
+                    </a:DeviceProperty>
+                </a:Properties>
+                <a:Key>str-sonic:Ethernet3/16/1;ARISTA17T3:Ethernet1</a:Key>
+            </a:LinkMetadata>
+            <a:LinkMetadata>
+                <a:Name>str-sonic-lc03-ASIC00:Eth128;ARISTA18T3:Ethernet1</a:Name>
+                <a:Properties>
+                    <a:DeviceProperty>
+                        <a:Name>EndItfKey</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>Ethernet1#0:1:0:1#1</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>StartItfKey</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>Ethernet3/17/1#0:3:0:17#1</a:Value>
+                    </a:DeviceProperty>
+                </a:Properties>
+                <a:Key>str-sonic:Ethernet3/17/1;ARISTA18T3:Ethernet1</a:Key>
+            </a:LinkMetadata>
+            <a:LinkMetadata>
+                <a:Name>str-sonic-lc03-ASIC00:Eth136;ARISTA18T3:Ethernet2</a:Name>
+                <a:Properties>
+                    <a:DeviceProperty>
+                        <a:Name>EndItfKey</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>Ethernet2#0:1:0:2#1</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>StartItfKey</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>Ethernet3/18/1#0:3:0:18#1</a:Value>
+                    </a:DeviceProperty>
+                </a:Properties>
+                <a:Key>str-sonic:Ethernet3/18/1;ARISTA18T3:Ethernet2</a:Key>
+            </a:LinkMetadata>
+            <a:LinkMetadata>
+                <a:Name>str-sonic-lc03-ASIC01:Eth0;ARISTA19T3:Ethernet1</a:Name>
+                <a:Properties>
+                    <a:DeviceProperty>
+                        <a:Name>EndItfKey</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>Ethernet1#0:1:0:1#1</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>StartItfKey</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>Ethernet3/19/1#0:3:0:19#1</a:Value>
+                    </a:DeviceProperty>
+                </a:Properties>
+                <a:Key>str-sonic:Ethernet3/19/1;ARISTA19T3:Ethernet1</a:Key>
+            </a:LinkMetadata>
+            <a:LinkMetadata>
+                <a:Name>str-sonic-lc03-ASIC01:Eth8;ARISTA20T3:Ethernet1</a:Name>
+                <a:Properties>
+                    <a:DeviceProperty>
+                        <a:Name>EndItfKey</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>Ethernet1#0:1:0:1#1</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>StartItfKey</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>Ethernet3/20/1#0:3:0:20#1</a:Value>
+                    </a:DeviceProperty>
+                </a:Properties>
+                <a:Key>str-sonic:Ethernet3/20/1;ARISTA20T3:Ethernet1</a:Key>
+            </a:LinkMetadata>
+            <a:LinkMetadata>
+                <a:Name>str-sonic-lc03-ASIC01:Eth16;ARISTA21T3:Ethernet1</a:Name>
+                <a:Properties>
+                    <a:DeviceProperty>
+                        <a:Name>EndItfKey</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>Ethernet1#0:1:0:1#1</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>StartItfKey</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>Ethernet3/21/1#0:3:0:21#1</a:Value>
+                    </a:DeviceProperty>
+                </a:Properties>
+                <a:Key>str-sonic:Ethernet3/21/1;ARISTA21T3:Ethernet1</a:Key>
+            </a:LinkMetadata>
+            <a:LinkMetadata>
+                <a:Name>str-sonic-lc03-ASIC01:Eth24;ARISTA22T3:Ethernet1</a:Name>
+                <a:Properties>
+                    <a:DeviceProperty>
+                        <a:Name>EndItfKey</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>Ethernet1#0:1:0:1#1</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>StartItfKey</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>Ethernet3/22/1#0:3:0:22#1</a:Value>
+                    </a:DeviceProperty>
+                </a:Properties>
+                <a:Key>str-sonic:Ethernet3/22/1;ARISTA22T3:Ethernet1</a:Key>
+            </a:LinkMetadata>
+            <a:LinkMetadata>
+                <a:Name>str-sonic-lc03-ASIC01:Eth32;ARISTA23T3:Ethernet1</a:Name>
+                <a:Properties>
+                    <a:DeviceProperty>
+                        <a:Name>EndItfKey</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>Ethernet1#0:1:0:1#1</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>StartItfKey</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>Ethernet3/23/1#0:3:0:23#1</a:Value>
+                    </a:DeviceProperty>
+                </a:Properties>
+                <a:Key>str-sonic:Ethernet3/23/1;ARISTA23T3:Ethernet1</a:Key>
+            </a:LinkMetadata>
+            <a:LinkMetadata>
+                <a:Name>str-sonic-lc03-ASIC01:Eth40;ARISTA24T3:Ethernet1</a:Name>
+                <a:Properties>
+                    <a:DeviceProperty>
+                        <a:Name>EndItfKey</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>Ethernet1#0:1:0:1#1</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>StartItfKey</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>Ethernet3/24/1#0:3:0:24#1</a:Value>
+                    </a:DeviceProperty>
+                </a:Properties>
+                <a:Key>str-sonic:Ethernet3/24/1;ARISTA24T3:Ethernet1</a:Key>
+            </a:LinkMetadata>
+            <a:LinkMetadata>
+                <a:Name>str-sonic-lc03-ASIC01:Eth48;ARISTA25T3:Ethernet1</a:Name>
+                <a:Properties>
+                    <a:DeviceProperty>
+                        <a:Name>EndItfKey</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>Ethernet1#0:1:0:1#1</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>StartItfKey</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>Ethernet3/25/1#0:3:0:25#1</a:Value>
+                    </a:DeviceProperty>
+                </a:Properties>
+                <a:Key>str-sonic:Ethernet3/25/1;ARISTA25T3:Ethernet1</a:Key>
+            </a:LinkMetadata>
+            <a:LinkMetadata>
+                <a:Name>str-sonic-lc03-ASIC01:Eth56;ARISTA26T3:Ethernet1</a:Name>
+                <a:Properties>
+                    <a:DeviceProperty>
+                        <a:Name>EndItfKey</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>Ethernet1#0:1:0:1#1</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>StartItfKey</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>Ethernet3/26/1#0:3:0:26#1</a:Value>
+                    </a:DeviceProperty>
+                </a:Properties>
+                <a:Key>str-sonic:Ethernet3/26/1;ARISTA26T3:Ethernet1</a:Key>
+            </a:LinkMetadata>
+            <a:LinkMetadata>
+                <a:Name>str-sonic-lc03-ASIC01:Eth64;ARISTA27T3:Ethernet1</a:Name>
+                <a:Properties>
+                    <a:DeviceProperty>
+                        <a:Name>EndItfKey</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>Ethernet1#0:1:0:1#1</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>StartItfKey</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>Ethernet3/27/1#0:3:0:27#1</a:Value>
+                    </a:DeviceProperty>
+                </a:Properties>
+                <a:Key>str-sonic:Ethernet3/27/1;ARISTA27T3:Ethernet1</a:Key>
+            </a:LinkMetadata>
+            <a:LinkMetadata>
+                <a:Name>str-sonic-lc03-ASIC01:Eth72;ARISTA28T3:Ethernet1</a:Name>
+                <a:Properties>
+                    <a:DeviceProperty>
+                        <a:Name>EndItfKey</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>Ethernet1#0:1:0:1#1</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>StartItfKey</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>Ethernet3/28/1#0:3:0:28#1</a:Value>
+                    </a:DeviceProperty>
+                </a:Properties>
+                <a:Key>str-sonic:Ethernet3/28/1;ARISTA28T3:Ethernet1</a:Key>
+            </a:LinkMetadata>
+            <a:LinkMetadata>
+                <a:Name>str-sonic-lc03-ASIC01:Eth80;ARISTA29T3:Ethernet1</a:Name>
+                <a:Properties>
+                    <a:DeviceProperty>
+                        <a:Name>EndItfKey</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>Ethernet1#0:1:0:1#1</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>StartItfKey</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>Ethernet3/29/1#0:3:0:29#1</a:Value>
+                    </a:DeviceProperty>
+                </a:Properties>
+                <a:Key>str-sonic:Ethernet3/29/1;ARISTA29T3:Ethernet1</a:Key>
+            </a:LinkMetadata>
+            <a:LinkMetadata>
+                <a:Name>str-sonic-lc03-ASIC01:Eth88;ARISTA30T3:Ethernet1</a:Name>
+                <a:Properties>
+                    <a:DeviceProperty>
+                        <a:Name>EndItfKey</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>Ethernet1#0:1:0:1#1</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>StartItfKey</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>Ethernet3/30/1#0:3:0:30#1</a:Value>
+                    </a:DeviceProperty>
+                </a:Properties>
+                <a:Key>str-sonic:Ethernet3/30/1;ARISTA30T3:Ethernet1</a:Key>
+            </a:LinkMetadata>
+            <a:LinkMetadata>
+                <a:Name>str-sonic-lc03-ASIC01:Eth96;ARISTA31T3:Ethernet1</a:Name>
+                <a:Properties>
+                    <a:DeviceProperty>
+                        <a:Name>EndItfKey</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>Ethernet1#0:1:0:1#1</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>StartItfKey</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>Ethernet3/31/1#0:3:0:31#1</a:Value>
+                    </a:DeviceProperty>
+                </a:Properties>
+                <a:Key>str-sonic:Ethernet3/31/1;ARISTA31T3:Ethernet1</a:Key>
+            </a:LinkMetadata>
+            <a:LinkMetadata>
+                <a:Name>str-sonic-lc03-ASIC01:Eth104;ARISTA32T3:Ethernet1</a:Name>
+                <a:Properties>
+                    <a:DeviceProperty>
+                        <a:Name>EndItfKey</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>Ethernet1#0:1:0:1#1</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>StartItfKey</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>Ethernet3/32/1#0:3:0:32#1</a:Value>
+                    </a:DeviceProperty>
+                </a:Properties>
+                <a:Key>str-sonic:Ethernet3/32/1;ARISTA32T3:Ethernet1</a:Key>
+            </a:LinkMetadata>
+        </Link>
+        <Properties
+            xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution" />
+    </LinkMetadataDeclaration>
+    <MetadataDeclaration>
+        <Devices
+            xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution">
+            <a:DeviceMetadata>
+                <a:Name>str-sonic-lc04</a:Name>
+                <a:Properties>
+                    <a:DeviceProperty>
+                        <a:Name>FirmwareProfile</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>Sonic-lc-100g-sku</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>ForwardingMethod</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>VoQ</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>SlotIndex</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>4</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>TotalCountOfVoQ</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>8</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>MaxCountOfCores</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>64</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>MacSecEnabled</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>False</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>OsVersion</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>SONiC.20220532.60</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>ParentRouter</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>str-sonic</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>SubDevices</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>str-sonic-lc04-ASIC00</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>SiblingLineCards</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>
+                            str-sonic-lc03;str-sonic-lc05;str-sonic-lc06;str-sonic-lc07;str-sonic-lc08;str-sonic-lc09;str-sonic-lc10</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>Group</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>str-sonic</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>DcCode</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>STR</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>CloudType</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>Public</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>Location</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>TBD</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>Function</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>LabTest</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>DeploymentId</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>3</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>SonicEnabled</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>True</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>Region</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>test</a:Value>
+                    </a:DeviceProperty>
+                </a:Properties>
+            </a:DeviceMetadata>
+            <a:DeviceMetadata>
+                <a:Name>str-sonic-lc05</a:Name>
+                <a:Properties>
+                    <a:DeviceProperty>
+                        <a:Name>FirmwareProfile</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>Sonic-lc-100g-sku</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>ForwardingMethod</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>VoQ</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>SlotIndex</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>5</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>TotalCountOfVoQ</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>8</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>MaxCountOfCores</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>64</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>MacSecEnabled</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>False</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>OsVersion</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>SONiC.20220532.60</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>ParentRouter</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>str-sonic</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>SubDevices</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>str-sonic-lc05-ASIC00</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>SiblingLineCards</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>
+                            str-sonic-lc03;str-sonic-lc04;str-sonic-lc06;str-sonic-lc07;str-sonic-lc08;str-sonic-lc09;str-sonic-lc10</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>Group</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>str-sonic</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>DcCode</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>STR</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>CloudType</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>Public</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>Location</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>TBD</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>Function</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>LabTest</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>DeploymentId</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>3</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>SonicEnabled</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>True</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>Region</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>test</a:Value>
+                    </a:DeviceProperty>
+                </a:Properties>
+            </a:DeviceMetadata>
+            <a:DeviceMetadata>
+                <a:Name>str-sonic-lc06</a:Name>
+                <a:Properties>
+                    <a:DeviceProperty>
+                        <a:Name>FirmwareProfile</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>Sonic-lc-100g-sku</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>ForwardingMethod</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>VoQ</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>SlotIndex</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>6</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>TotalCountOfVoQ</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>8</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>MaxCountOfCores</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>64</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>MacSecEnabled</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>False</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>OsVersion</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>SONiC.20220532.60</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>ParentRouter</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>str-sonic</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>SubDevices</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>str-sonic-lc06-ASIC00</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>SiblingLineCards</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>
+                            str-sonic-lc03;str-sonic-lc04;str-sonic-lc05;str-sonic-lc07;str-sonic-lc08;str-sonic-lc09;str-sonic-lc10</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>Group</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>str-sonic</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>DcCode</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>STR</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>CloudType</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>Public</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>Location</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>TBD</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>Function</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>LabTest</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>DeploymentId</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>3</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>SonicEnabled</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>True</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>Region</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>test</a:Value>
+                    </a:DeviceProperty>
+                </a:Properties>
+            </a:DeviceMetadata>
+            <a:DeviceMetadata>
+                <a:Name>str-sonic-lc07</a:Name>
+                <a:Properties>
+                    <a:DeviceProperty>
+                        <a:Name>FirmwareProfile</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>Sonic-lc-100g-sku</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>ForwardingMethod</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>VoQ</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>SlotIndex</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>7</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>TotalCountOfVoQ</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>8</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>MaxCountOfCores</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>64</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>MacSecEnabled</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>False</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>OsVersion</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>SONiC.20220532.60</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>ParentRouter</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>str-sonic</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>SubDevices</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>str-sonic-lc07-ASIC00</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>SiblingLineCards</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>
+                            str-sonic-lc03;str-sonic-lc04;str-sonic-lc05;str-sonic-lc06;str-sonic-lc08;str-sonic-lc09;str-sonic-lc10</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>Group</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>str-sonic</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>DcCode</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>STR</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>CloudType</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>Public</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>Location</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>TBD</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>Function</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>LabTest</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>DeploymentId</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>3</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>SonicEnabled</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>True</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>Region</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>test</a:Value>
+                    </a:DeviceProperty>
+                </a:Properties>
+            </a:DeviceMetadata>
+            <a:DeviceMetadata>
+                <a:Name>str-sonic-lc08</a:Name>
+                <a:Properties>
+                    <a:DeviceProperty>
+                        <a:Name>FirmwareProfile</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>Sonic-lc-100g-sku</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>ForwardingMethod</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>VoQ</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>SlotIndex</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>8</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>TotalCountOfVoQ</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>8</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>MaxCountOfCores</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>64</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>MacSecEnabled</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>False</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>OsVersion</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>SONiC.20220532.60</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>ParentRouter</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>str-sonic</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>SubDevices</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>str-sonic-lc08-ASIC00</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>SiblingLineCards</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>
+                            str-sonic-lc03;str-sonic-lc04;str-sonic-lc05;str-sonic-lc06;str-sonic-lc07;str-sonic-lc09;str-sonic-lc10</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>Group</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>str-sonic</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>DcCode</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>STR</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>CloudType</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>Public</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>Location</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>TBD</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>Function</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>LabTest</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>DeploymentId</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>3</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>SonicEnabled</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>True</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>Region</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>test</a:Value>
+                    </a:DeviceProperty>
+                </a:Properties>
+            </a:DeviceMetadata>
+            <a:DeviceMetadata>
+                <a:Name>str-sonic-lc09</a:Name>
+                <a:Properties>
+                    <a:DeviceProperty>
+                        <a:Name>FirmwareProfile</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>Sonic-lc-400g-sku</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>ForwardingMethod</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>VoQ</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>SlotIndex</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>9</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>TotalCountOfVoQ</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>8</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>MaxCountOfCores</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>64</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>MacSecEnabled</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>False</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>ParentRouter</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>str-sonic</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>SubDevices</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>str-sonic-lc09-ASIC00</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>SiblingLineCards</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>
+                            str-sonic-lc03;str-sonic-lc04;str-sonic-lc05;str-sonic-lc06;str-sonic-lc07;str-sonic-lc08;str-sonic-lc10</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>Group</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>str-sonic</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>DcCode</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>STR</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>CloudType</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>Public</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>Location</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>TBD</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>Function</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>LabTest</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>DeploymentId</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>3</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>SonicEnabled</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>True</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>Region</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>test</a:Value>
+                    </a:DeviceProperty>
+                </a:Properties>
+            </a:DeviceMetadata>
+            <a:DeviceMetadata>
+                <a:Name>str-sonic-lc10</a:Name>
+                <a:Properties>
+                    <a:DeviceProperty>
+                        <a:Name>FirmwareProfile</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>Sonic-lc-100g-sku</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>ForwardingMethod</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>VoQ</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>SlotIndex</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>10</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>TotalCountOfVoQ</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>8</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>MaxCountOfCores</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>64</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>MacSecEnabled</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>False</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>OsVersion</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>SONiC.20220532.60</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>ParentRouter</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>str-sonic</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>SubDevices</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>str-sonic-lc10-ASIC00</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>SiblingLineCards</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>
+                            str-sonic-lc03;str-sonic-lc04;str-sonic-lc05;str-sonic-lc06;str-sonic-lc07;str-sonic-lc08;str-sonic-lc09</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>Group</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>str-sonic</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>DcCode</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>STR</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>CloudType</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>Public</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>Location</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>TBD</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>Function</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>LabTest</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>DeploymentId</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>3</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>SonicEnabled</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>True</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>Region</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>test</a:Value>
+                    </a:DeviceProperty>
+                </a:Properties>
+            </a:DeviceMetadata>
+            <a:DeviceMetadata>
+                <a:Name>str-sonic-lc03-ASIC00</a:Name>
+                <a:Properties>
+                    <a:DeviceProperty>
+                        <a:Name>ForwardingMethod</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>VoQ</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>SubRole</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>FrontEnd</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>AsicSwitchId</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>8</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>ProviderLineCard</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>str-sonic-lc03</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>Group</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>str-sonic</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>DcCode</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>STR</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>CloudType</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>Public</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>Location</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>TBD</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>Function</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>LabTest</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>DeploymentId</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>3</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>SonicEnabled</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>True</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>Region</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>test</a:Value>
+                    </a:DeviceProperty>
+                </a:Properties>
+            </a:DeviceMetadata>
+            <a:DeviceMetadata>
+                <a:Name>str-sonic-lc03-ASIC01</a:Name>
+                <a:Properties>
+                    <a:DeviceProperty>
+                        <a:Name>ForwardingMethod</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>VoQ</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>SubRole</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>FrontEnd</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>AsicSwitchId</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>9</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>ProviderLineCard</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>str-sonic-lc03</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>Group</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>str-sonic</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>DcCode</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>STR</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>CloudType</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>Public</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>Location</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>TBD</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>Function</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>LabTest</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>DeploymentId</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>3</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>SonicEnabled</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>True</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>Region</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>test</a:Value>
+                    </a:DeviceProperty>
+                </a:Properties>
+            </a:DeviceMetadata>
+            <a:DeviceMetadata>
+                <a:Name>str-sonic-lc03</a:Name>
+                <a:Properties>
+                    <a:DeviceProperty>
+                        <a:Name>FirmwareProfile</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>SONiC-Sonic-400g-lc-sku-lc</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>ForwardingMethod</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>VoQ</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>SlotIndex</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>3</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>TotalCountOfVoQ</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>8</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>MaxCountOfCores</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>64</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>MacSecEnabled</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>True</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>OsVersion</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>SONiC.20220532.60</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>ParentRouter</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>str-sonic</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>SubDevices</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>str-sonic-lc03-ASIC00;str-sonic-lc03-ASIC01</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>SiblingLineCards</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>
+                            str-sonic-lc04;str-sonic-lc05;str-sonic-lc06;str-sonic-lc07;str-sonic-lc08;str-sonic-lc09;str-sonic-lc10</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>Group</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>str-sonic</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>DcCode</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>STR</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>CloudType</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>Public</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>Location</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>TBD</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>Function</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>LabTest</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>DeploymentId</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>3</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>SonicEnabled</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>True</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>Region</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>test</a:Value>
+                    </a:DeviceProperty>
+                </a:Properties>
+            </a:DeviceMetadata>
+            <a:DeviceMetadata>
+                <a:Name>str-sonic</a:Name>
+                <a:Properties>
+                    <a:DeviceProperty>
+                        <a:Name>CloudType</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>Public</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>ConfigDbAclFile</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>SonicNativeAcl.liquid</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>ConfigTemplateFile</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>Sonic.xml</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>DNSServers</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>10.64.5.5;10.64.6.6;10.64.6.7</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>DcCode</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>STR</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>DeploymentId</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>3</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>EnableStreamingTelemetry</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>true</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>ErspanDestinationIpv4</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>10.20.6.4</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>FirmwareProfile</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>Sonic-sup-sku</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>Function</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>LabTest</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>Group</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>str:542907040</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>InitConfigTemplateFile</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>Sonic.init.xml</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>Location</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>TBD</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>Loopback0Ipv4</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>10.2.0.1/32;10.2.0.2/32;10.2.0.3/32;10.2.0.4/32</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>Loopback0Ipv6</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>fc00:20::1/128;fc00:21::1/128;fc00:22::1/128;fc00:23::1/128</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>Loopback4096Ipv4</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>192.0.0.1/32;192.0.0.2/32;192.0.0.8/32;192.0.0.9/32</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>Loopback4096Ipv6</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>
+                            2603:10e2:400::1/128;2603:10e2:400::2/128;2603:10e2:400::8/128;2603:10e2:400::9/128</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>MacSecEnabled</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>True</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>MacSecProfile</a:Name>
+                        <a:Reference>usstagee.Sonic.MacSec</a:Reference>
+                        <a:Value>PrimaryKey="macsec-profile-two" FallbackKey="macsec-profile"
+                            MacsecPolicy=""</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>ManagementIpv4</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>
+                            10.3.146.58/24;10.3.146.71/24;10.3.146.72/24;10.3.146.74/24;10.3.146.75/24;10.3.146.80/24;10.3.146.81/24;10.3.146.83/24</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>ManagementIpv6</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>
+                            2a01:111:e210:3000::a03:923a/64;2a01:111:e210:3000::a03:9247/64;2a01:111:e210:3000::a03:9248/64;2a01:111:e210:3000::a03:924a/64;2a01:111:e210:3000::a03:924b/64;2a01:111:e210:3000::a03:9250/64;2a01:111:e210:3000::a03:9251/64;2a01:111:e210:3000::a03:9253/64</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>MaxCountOfCores</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>64</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>NtpResources</a:Name>
+                        <a:Reference>Public.Ntp</a:Reference>
+                        <a:Value>17.39.1.129;17.39.1.130</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>QosProfile</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>VerlaineLongHaul</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>RemoteAuthenticationProtocol</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>Tacacs</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>SnmpResources</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>10.52.180.161;10.3.157.12</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>SonicConfigTemplateFile</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>Sonic.xml</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>SonicEnabled</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>True</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>SyslogResources</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>10.52.180.161;10.3.157.12</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>SyslogServer</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>10.20.4.167;10.20.7.33;10.20.6.16;10.20.6.84</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>TacacsKey</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>$Secrets.TacacsKey</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>TacacsSecurityLevel</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>7</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>TacacsServer</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>123.46.98.21</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>TotalCountOfVoQ</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>8</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>Region</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>test</a:Value>
+                    </a:DeviceProperty>
+                    <a:DeviceProperty>
+                        <a:Name>ChassisEnabled</a:Name>
+                        <a:Reference i:nil="true" />
+                        <a:Value>true</a:Value>
+                    </a:DeviceProperty>
+                </a:Properties>
+            </a:DeviceMetadata>
+        </Devices>
+        <Properties
+            xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution" />
+    </MetadataDeclaration>
+    <PngDec>
+        <DeviceInterfaceLinks>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+                <EndPort>Eth81</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth384</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+                <EndPort>Eth45</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth385</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+                <EndPort>Eth42</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth386</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+                <EndPort>Eth88</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth387</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+                <EndPort>Eth33</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth388</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+                <EndPort>Eth45</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth389</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+                <EndPort>Eth39</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth390</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+                <EndPort>Eth33</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth391</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+                <EndPort>Eth27</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth392</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+                <EndPort>Eth31</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth393</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+                <EndPort>Eth24</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth394</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+                <EndPort>Eth27</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth395</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+                <EndPort>Eth34</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth396</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+                <EndPort>Eth28</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth397</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+                <EndPort>Eth36</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth398</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+                <EndPort>Eth36</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth399</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+                <EndPort>Eth44</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth400</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+                <EndPort>Eth82</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth401</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+                <EndPort>Eth25</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth402</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+                <EndPort>Eth46</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth403</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+                <EndPort>Eth89</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth404</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+                <EndPort>Eth46</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth405</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+                <EndPort>Eth44</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth406</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+                <EndPort>Eth42</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth407</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+                <EndPort>Eth40</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth416</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+                <EndPort>Eth21</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth417</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+                <EndPort>Eth88</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth418</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+                <EndPort>Eth22</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth419</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+                <EndPort>Eth20</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth420</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+                <EndPort>Eth82</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth421</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+                <EndPort>Eth94</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth422</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+                <EndPort>Eth81</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth423</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+                <EndPort>Eth28</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth424</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+                <EndPort>Eth39</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth425</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+                <EndPort>Eth31</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth426</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+                <EndPort>Eth24</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth427</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+                <EndPort>Eth94</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth428</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+                <EndPort>Eth43</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth429</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+                <EndPort>Eth41</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth430</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+                <EndPort>Eth89</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth431</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+                <EndPort>Eth20</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth432</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+                <EndPort>Eth21</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth433</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+                <EndPort>Eth33</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth434</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+                <EndPort>Eth36</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth435</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+                <EndPort>Eth43</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth436</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+                <EndPort>Eth45</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth437</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+                <EndPort>Eth34</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth438</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+                <EndPort>Eth81</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth439</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+                <EndPort>Eth40</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth440</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+                <EndPort>Eth42</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth441</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+                <EndPort>Eth24</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth442</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+                <EndPort>Eth46</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth443</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+                <EndPort>Eth88</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth444</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+                <EndPort>Eth27</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth445</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+                <EndPort>Eth44</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth446</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+                <EndPort>Eth82</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth447</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+                <EndPort>Eth89</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth456</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+                <EndPort>Eth36</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth457</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+                <EndPort>Eth25</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth458</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+                <EndPort>Eth94</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth459</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+                <EndPort>Eth33</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth460</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+                <EndPort>Eth27</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth461</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+                <EndPort>Eth20</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth462</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+                <EndPort>Eth45</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth463</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+                <EndPort>Eth22</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth464</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+                <EndPort>Eth21</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth465</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+                <EndPort>Eth42</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth466</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+                <EndPort>Eth40</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth467</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+                <EndPort>Eth41</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth468</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+                <EndPort>Eth46</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth469</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+                <EndPort>Eth43</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth470</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+                <EndPort>Eth40</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth471</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+                <EndPort>Eth44</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth472</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+                <EndPort>Eth24</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth473</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+                <EndPort>Eth41</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth474</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+                <EndPort>Eth28</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth475</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+                <EndPort>Eth81</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth476</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+                <EndPort>Eth36</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth477</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+                <EndPort>Eth27</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth478</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+                <EndPort>Eth31</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth479</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+                <EndPort>Eth25</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth497</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+                <EndPort>Eth31</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth512</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+                <EndPort>Eth28</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth513</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+                <EndPort>Eth39</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth515</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+                <EndPort>Eth34</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth516</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+                <EndPort>Eth22</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth518</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+                <EndPort>Eth22</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth530</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+                <EndPort>Eth25</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth531</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+                <EndPort>Eth41</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth533</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+                <EndPort>Eth39</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth534</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+                <EndPort>Eth28</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth535</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+                <EndPort>Eth34</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth537</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+                <EndPort>Eth31</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth539</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+                <EndPort>Eth40</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth540</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+                <EndPort>Eth43</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth542</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+                <EndPort>Eth24</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth543</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+                <EndPort>Eth82</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth552</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+                <EndPort>Eth43</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth553</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+                <EndPort>Eth94</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth554</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+                <EndPort>Eth20</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth555</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+                <EndPort>Eth41</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth556</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+                <EndPort>Eth25</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth557</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+                <EndPort>Eth21</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth558</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+                <EndPort>Eth21</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth559</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+                <EndPort>Eth89</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth560</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+                <EndPort>Eth46</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth561</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+                <EndPort>Eth20</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth562</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+                <EndPort>Eth88</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth563</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+                <EndPort>Eth42</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth564</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+                <EndPort>Eth94</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth565</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+                <EndPort>Eth81</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth566</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+                <EndPort>Eth45</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth567</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+                <EndPort>Eth89</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth568</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+                <EndPort>Eth44</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth569</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+                <EndPort>Eth33</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth570</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+                <EndPort>Eth88</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth571</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+                <EndPort>Eth82</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth572</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+                <EndPort>Eth34</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth573</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+                <EndPort>Eth39</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth574</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+                <EndPort>Eth22</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth575</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="DeviceInterfaceLink">
+                <ElementType>DeviceInterfaceLink</ElementType>
+                <Bandwidth>100000</Bandwidth>
+                <ChassisInternal>true</ChassisInternal>
+                <EndDevice>ARISTA91T3</EndDevice>
+                <EndPort>Ethernet1</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth0</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="DeviceInterfaceLink">
+                <ElementType>DeviceInterfaceLink</ElementType>
+                <Bandwidth>100000</Bandwidth>
+                <ChassisInternal>true</ChassisInternal>
+                <EndDevice>ARISTA91T3</EndDevice>
+                <EndPort>Ethernet2</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth8</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="DeviceInterfaceLink">
+                <ElementType>DeviceInterfaceLink</ElementType>
+                <Bandwidth>100000</Bandwidth>
+                <ChassisInternal>true</ChassisInternal>
+                <EndDevice>ARISTA93T3</EndDevice>
+                <EndPort>Ethernet1</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth16</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="DeviceInterfaceLink">
+                <ElementType>DeviceInterfaceLink</ElementType>
+                <Bandwidth>100000</Bandwidth>
+                <ChassisInternal>true</ChassisInternal>
+                <EndDevice>ARISTA93T3</EndDevice>
+                <EndPort>Ethernet2</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth24</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="DeviceInterfaceLink">
+                <ElementType>DeviceInterfaceLink</ElementType>
+                <Bandwidth>100000</Bandwidth>
+                <ChassisInternal>true</ChassisInternal>
+                <EndDevice>ARISTA05T3</EndDevice>
+                <EndPort>Ethernet1</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth32</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="DeviceInterfaceLink">
+                <ElementType>DeviceInterfaceLink</ElementType>
+                <Bandwidth>100000</Bandwidth>
+                <ChassisInternal>true</ChassisInternal>
+                <EndDevice>ARISTA05T3</EndDevice>
+                <EndPort>Ethernet2</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth40</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="DeviceInterfaceLink">
+                <ElementType>DeviceInterfaceLink</ElementType>
+                <Bandwidth>100000</Bandwidth>
+                <ChassisInternal>true</ChassisInternal>
+                <EndDevice>ARISTA07T3</EndDevice>
+                <EndPort>Ethernet1</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth48</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="DeviceInterfaceLink">
+                <ElementType>DeviceInterfaceLink</ElementType>
+                <Bandwidth>100000</Bandwidth>
+                <ChassisInternal>true</ChassisInternal>
+                <EndDevice>ARISTA07T3</EndDevice>
+                <EndPort>Ethernet2</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth56</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="DeviceInterfaceLink">
+                <ElementType>DeviceInterfaceLink</ElementType>
+                <Bandwidth>100000</Bandwidth>
+                <ChassisInternal>true</ChassisInternal>
+                <EndDevice>ARISTA09T3</EndDevice>
+                <EndPort>Ethernet1</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth64</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="DeviceInterfaceLink">
+                <ElementType>DeviceInterfaceLink</ElementType>
+                <Bandwidth>100000</Bandwidth>
+                <ChassisInternal>true</ChassisInternal>
+                <EndDevice>ARISTA09T3</EndDevice>
+                <EndPort>Ethernet2</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth72</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="DeviceInterfaceLink">
+                <ElementType>DeviceInterfaceLink</ElementType>
+                <Bandwidth>100000</Bandwidth>
+                <ChassisInternal>true</ChassisInternal>
+                <EndDevice>ARISTA11T3</EndDevice>
+                <EndPort>Ethernet1</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth80</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="DeviceInterfaceLink">
+                <ElementType>DeviceInterfaceLink</ElementType>
+                <Bandwidth>100000</Bandwidth>
+                <ChassisInternal>true</ChassisInternal>
+                <EndDevice>ARISTA11T3</EndDevice>
+                <EndPort>Ethernet2</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth88</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="DeviceInterfaceLink">
+                <ElementType>DeviceInterfaceLink</ElementType>
+                <Bandwidth>100000</Bandwidth>
+                <ChassisInternal>true</ChassisInternal>
+                <EndDevice>ARISTA13T3</EndDevice>
+                <EndPort>Ethernet1</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth96</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="DeviceInterfaceLink">
+                <ElementType>DeviceInterfaceLink</ElementType>
+                <Bandwidth>100000</Bandwidth>
+                <ChassisInternal>true</ChassisInternal>
+                <EndDevice>ARISTA15T3</EndDevice>
+                <EndPort>Ethernet1</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth104</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="DeviceInterfaceLink">
+                <ElementType>DeviceInterfaceLink</ElementType>
+                <Bandwidth>100000</Bandwidth>
+                <ChassisInternal>true</ChassisInternal>
+                <EndDevice>ARISTA15T3</EndDevice>
+                <EndPort>Ethernet2</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth112</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="DeviceInterfaceLink">
+                <ElementType>DeviceInterfaceLink</ElementType>
+                <Bandwidth>100000</Bandwidth>
+                <ChassisInternal>true</ChassisInternal>
+                <EndDevice>ARISTA17T3</EndDevice>
+                <EndPort>Ethernet1</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth120</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="DeviceInterfaceLink">
+                <ElementType>DeviceInterfaceLink</ElementType>
+                <Bandwidth>100000</Bandwidth>
+                <ChassisInternal>true</ChassisInternal>
+                <EndDevice>ARISTA18T3</EndDevice>
+                <EndPort>Ethernet1</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth128</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="DeviceInterfaceLink">
+                <ElementType>DeviceInterfaceLink</ElementType>
+                <Bandwidth>100000</Bandwidth>
+                <ChassisInternal>true</ChassisInternal>
+                <EndDevice>ARISTA18T3</EndDevice>
+                <EndPort>Ethernet2</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+                <StartPort>Eth136</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+                <EndPort>Eth32</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth392</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+                <EndPort>Eth29</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth393</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+                <EndPort>Eth25</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth394</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+                <EndPort>Eth30</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth395</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+                <EndPort>Eth38</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth396</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+                <EndPort>Eth45</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth397</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+                <EndPort>Eth37</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth398</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+                <EndPort>Eth42</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth399</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+                <EndPort>Eth29</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth400</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+                <EndPort>Eth32</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth401</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+                <EndPort>Eth45</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth402</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+                <EndPort>Eth35</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth403</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+                <EndPort>Eth44</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth404</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+                <EndPort>Eth26</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth405</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+                <EndPort>Eth39</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth406</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+                <EndPort>Eth35</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth407</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+                <EndPort>Eth35</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth416</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+                <EndPort>Eth25</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth417</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+                <EndPort>Eth47</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth418</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+                <EndPort>Eth44</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth419</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+                <EndPort>Eth39</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth420</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+                <EndPort>Eth40</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth421</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+                <EndPort>Eth42</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth422</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+                <EndPort>Eth43</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth423</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+                <EndPort>Eth90</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth428</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+                <EndPort>Eth29</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth429</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+                <EndPort>Eth32</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth430</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+                <EndPort>Eth41</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth431</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+                <EndPort>Eth91</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth432</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+                <EndPort>Eth83</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth433</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+                <EndPort>Eth44</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth434</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+                <EndPort>Eth42</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth435</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+                <EndPort>Eth95</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth436</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+                <EndPort>Eth45</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth437</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+                <EndPort>Eth25</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth438</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+                <EndPort>Eth39</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth439</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+                <EndPort>Eth35</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth444</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+                <EndPort>Eth24</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth445</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+                <EndPort>Eth38</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth446</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+                <EndPort>Eth29</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth447</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+                <EndPort>Eth47</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth448</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+                <EndPort>Eth32</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth449</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+                <EndPort>Eth46</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth450</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+                <EndPort>Eth46</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth451</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+                <EndPort>Eth35</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth452</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+                <EndPort>Eth26</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth453</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+                <EndPort>Eth40</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth454</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+                <EndPort>Eth37</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth455</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+                <EndPort>Eth47</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth456</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+                <EndPort>Eth30</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth457</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+                <EndPort>Eth47</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth458</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+                <EndPort>Eth90</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth459</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+                <EndPort>Eth38</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth460</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+                <EndPort>Eth43</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth461</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+                <EndPort>Eth95</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth462</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+                <EndPort>Eth37</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth463</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+                <EndPort>Eth41</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth464</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+                <EndPort>Eth24</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth465</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+                <EndPort>Eth26</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth466</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+                <EndPort>Eth91</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth467</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+                <EndPort>Eth45</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth468</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+                <EndPort>Eth35</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth469</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+                <EndPort>Eth83</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth470</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+                <EndPort>Eth44</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth471</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+                <EndPort>Eth24</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth482</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+                <EndPort>Eth47</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth485</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+                <EndPort>Eth46</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth487</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+                <EndPort>Eth91</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth496</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+                <EndPort>Eth95</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth501</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+                <EndPort>Eth83</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth502</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+                <EndPort>Eth90</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth507</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+                <EndPort>Eth41</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth508</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+                <EndPort>Eth43</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth514</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+                <EndPort>Eth40</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth517</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+                <EndPort>Eth47</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth519</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+                <EndPort>Eth39</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth520</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+                <EndPort>Eth42</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth521</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+                <EndPort>Eth35</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth523</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+                <EndPort>Eth26</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth524</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+                <EndPort>Eth35</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth527</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+                <EndPort>Eth37</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth528</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+                <EndPort>Eth38</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth529</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+                <EndPort>Eth47</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth530</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+                <EndPort>Eth46</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth531</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+                <EndPort>Eth30</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth532</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+                <EndPort>Eth83</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth533</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+                <EndPort>Eth44</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth534</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+                <EndPort>Eth45</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth535</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+                <EndPort>Eth46</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth536</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+                <EndPort>Eth91</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth537</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+                <EndPort>Eth47</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth538</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+                <EndPort>Eth47</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth539</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+                <EndPort>Eth24</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth540</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+                <EndPort>Eth24</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth541</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+                <EndPort>Eth40</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth542</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+                <EndPort>Eth95</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth543</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+                <EndPort>Eth32</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth552</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+                <EndPort>Eth95</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth553</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+                <EndPort>Eth90</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth554</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+                <EndPort>Eth26</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth555</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+                <EndPort>Eth83</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth556</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+                <EndPort>Eth41</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth557</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+                <EndPort>Eth38</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth558</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+                <EndPort>Eth91</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth559</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+                <EndPort>Eth43</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth560</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+                <EndPort>Eth29</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth561</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+                <EndPort>Eth90</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth562</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+                <EndPort>Eth35</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth563</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+                <EndPort>Eth25</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth564</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+                <EndPort>Eth41</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth565</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+                <EndPort>Eth37</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth566</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+                <EndPort>Eth35</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth567</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+                <EndPort>Eth47</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth568</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+                <EndPort>Eth30</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth569</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+                <EndPort>Eth40</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth570</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+                <EndPort>Eth39</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth571</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+                <EndPort>Eth42</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth572</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+                <EndPort>Eth30</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth573</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+                <EndPort>Eth43</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth574</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="BackendFabricLink">
+                <ElementType>BackendFabricLink</ElementType>
+                <Bandwidth>50000</Bandwidth>
+                <ChassisInternal>false</ChassisInternal>
+                <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+                <EndPort>Eth25</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth575</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="DeviceInterfaceLink">
+                <ElementType>DeviceInterfaceLink</ElementType>
+                <Bandwidth>100000</Bandwidth>
+                <ChassisInternal>true</ChassisInternal>
+                <EndDevice>ARISTA19T3</EndDevice>
+                <EndPort>Ethernet1</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth0</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="DeviceInterfaceLink">
+                <ElementType>DeviceInterfaceLink</ElementType>
+                <Bandwidth>100000</Bandwidth>
+                <ChassisInternal>true</ChassisInternal>
+                <EndDevice>ARISTA20T3</EndDevice>
+                <EndPort>Ethernet1</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth8</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="DeviceInterfaceLink">
+                <ElementType>DeviceInterfaceLink</ElementType>
+                <Bandwidth>100000</Bandwidth>
+                <ChassisInternal>true</ChassisInternal>
+                <EndDevice>ARISTA21T3</EndDevice>
+                <EndPort>Ethernet1</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth16</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="DeviceInterfaceLink">
+                <ElementType>DeviceInterfaceLink</ElementType>
+                <Bandwidth>100000</Bandwidth>
+                <ChassisInternal>true</ChassisInternal>
+                <EndDevice>ARISTA22T3</EndDevice>
+                <EndPort>Ethernet1</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth24</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="DeviceInterfaceLink">
+                <ElementType>DeviceInterfaceLink</ElementType>
+                <Bandwidth>100000</Bandwidth>
+                <ChassisInternal>true</ChassisInternal>
+                <EndDevice>ARISTA23T3</EndDevice>
+                <EndPort>Ethernet1</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth32</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="DeviceInterfaceLink">
+                <ElementType>DeviceInterfaceLink</ElementType>
+                <Bandwidth>100000</Bandwidth>
+                <ChassisInternal>true</ChassisInternal>
+                <EndDevice>ARISTA24T3</EndDevice>
+                <EndPort>Ethernet1</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth40</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="DeviceInterfaceLink">
+                <ElementType>DeviceInterfaceLink</ElementType>
+                <Bandwidth>100000</Bandwidth>
+                <ChassisInternal>true</ChassisInternal>
+                <EndDevice>ARISTA25T3</EndDevice>
+                <EndPort>Ethernet1</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth48</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="DeviceInterfaceLink">
+                <ElementType>DeviceInterfaceLink</ElementType>
+                <Bandwidth>100000</Bandwidth>
+                <ChassisInternal>true</ChassisInternal>
+                <EndDevice>ARISTA26T3</EndDevice>
+                <EndPort>Ethernet1</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth56</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="DeviceInterfaceLink">
+                <ElementType>DeviceInterfaceLink</ElementType>
+                <Bandwidth>100000</Bandwidth>
+                <ChassisInternal>true</ChassisInternal>
+                <EndDevice>ARISTA27T3</EndDevice>
+                <EndPort>Ethernet1</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth64</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="DeviceInterfaceLink">
+                <ElementType>DeviceInterfaceLink</ElementType>
+                <Bandwidth>100000</Bandwidth>
+                <ChassisInternal>true</ChassisInternal>
+                <EndDevice>ARISTA28T3</EndDevice>
+                <EndPort>Ethernet1</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth72</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="DeviceInterfaceLink">
+                <ElementType>DeviceInterfaceLink</ElementType>
+                <Bandwidth>100000</Bandwidth>
+                <ChassisInternal>true</ChassisInternal>
+                <EndDevice>ARISTA29T3</EndDevice>
+                <EndPort>Ethernet1</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth80</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="DeviceInterfaceLink">
+                <ElementType>DeviceInterfaceLink</ElementType>
+                <Bandwidth>100000</Bandwidth>
+                <ChassisInternal>true</ChassisInternal>
+                <EndDevice>ARISTA30T3</EndDevice>
+                <EndPort>Ethernet1</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth88</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="DeviceInterfaceLink">
+                <ElementType>DeviceInterfaceLink</ElementType>
+                <Bandwidth>100000</Bandwidth>
+                <ChassisInternal>true</ChassisInternal>
+                <EndDevice>ARISTA31T3</EndDevice>
+                <EndPort>Ethernet1</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth96</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="DeviceInterfaceLink">
+                <ElementType>DeviceInterfaceLink</ElementType>
+                <Bandwidth>100000</Bandwidth>
+                <ChassisInternal>true</ChassisInternal>
+                <EndDevice>ARISTA32T3</EndDevice>
+                <EndPort>Ethernet1</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+                <StartPort>Eth104</StartPort>
+                <Validate>true</Validate>
+            </DeviceLinkBase>
+            <DeviceLinkBase i:type="DeviceSerialLink">
+                <ElementType>DeviceSerialLink</ElementType>
+                <Bandwidth>9600</Bandwidth>
+                <ChassisInternal>true</ChassisInternal>
+                <EndDevice>str-sonic-sup00</EndDevice>
+                <EndPort>logical3</EndPort>
+                <FlowControl>true</FlowControl>
+                <StartDevice>str-sonic-lc03</StartDevice>
+                <StartPort>logical</StartPort>
+                <Validate>true</Validate>
+                <TcpPortName>3</TcpPortName>
+            </DeviceLinkBase>
+        </DeviceInterfaceLinks>
+        <Devices>
+            <Device i:type="LinecardAsic">
+                <ElementType>LinecardAsic</ElementType>
+                <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>10.2.0.1/32</a:IPPrefix>
+                </Address>
+                <AddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>fc00:20::1/128</a:IPPrefix>
+                </AddressV6>
+                <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
+                <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+                <AssociatedTagsStr />
+                <ChassisInternalDevices />
+                <ClusterName>TestbedForstr-sonic</ClusterName>
+                <DeploymentId>3</DeploymentId>
+                <DeviceLocation i:nil="true" />
+                <HomeDatacenter>STARLab</HomeDatacenter>
+                <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+                </ManagementAddress>
+                <ManagementAddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>::/0</a:IPPrefix>
+                </ManagementAddressV6>
+                <NodeId i:nil="true" />
+                <SerialNumber i:nil="true" />
+                <Hostname>str-sonic-lc03-ASIC00</Hostname>
+                <HwSku>Broadcom-Jericho2cplus</HwSku>
+            </Device>
+            <Device i:type="FabricAsic">
+                <ElementType>FabricAsic</ElementType>
+                <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+                </Address>
+                <AddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>::/0</a:IPPrefix>
+                </AddressV6>
+                <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
+                <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+                <AssociatedTagsStr />
+                <ChassisInternalDevices />
+                <ClusterName>TestbedForstr-sonic</ClusterName>
+                <DeploymentId>3</DeploymentId>
+                <DeviceLocation i:nil="true" />
+                <HomeDatacenter>STARLab</HomeDatacenter>
+                <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+                </ManagementAddress>
+                <ManagementAddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>::/0</a:IPPrefix>
+                </ManagementAddressV6>
+                <NodeId i:nil="true" />
+                <SerialNumber i:nil="true" />
+                <Hostname>str-sonic-sup00-ASIC02</Hostname>
+                <HwSku>Broadcom-Ramon</HwSku>
+            </Device>
+            <Device i:type="FabricAsic">
+                <ElementType>FabricAsic</ElementType>
+                <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+                </Address>
+                <AddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>::/0</a:IPPrefix>
+                </AddressV6>
+                <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
+                <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+                <AssociatedTagsStr />
+                <ChassisInternalDevices />
+                <ClusterName>TestbedForstr-sonic</ClusterName>
+                <DeploymentId>3</DeploymentId>
+                <DeviceLocation i:nil="true" />
+                <HomeDatacenter>STARLab</HomeDatacenter>
+                <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+                </ManagementAddress>
+                <ManagementAddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>::/0</a:IPPrefix>
+                </ManagementAddressV6>
+                <NodeId i:nil="true" />
+                <SerialNumber i:nil="true" />
+                <Hostname>str-sonic-sup00-ASIC03</Hostname>
+                <HwSku>Broadcom-Ramon</HwSku>
+            </Device>
+            <Device i:type="FabricAsic">
+                <ElementType>FabricAsic</ElementType>
+                <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+                </Address>
+                <AddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>::/0</a:IPPrefix>
+                </AddressV6>
+                <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
+                <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+                <AssociatedTagsStr />
+                <ChassisInternalDevices />
+                <ClusterName>TestbedForstr-sonic</ClusterName>
+                <DeploymentId>3</DeploymentId>
+                <DeviceLocation i:nil="true" />
+                <HomeDatacenter>STARLab</HomeDatacenter>
+                <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+                </ManagementAddress>
+                <ManagementAddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>::/0</a:IPPrefix>
+                </ManagementAddressV6>
+                <NodeId i:nil="true" />
+                <SerialNumber i:nil="true" />
+                <Hostname>str-sonic-sup00-ASIC09</Hostname>
+                <HwSku>Broadcom-Ramon</HwSku>
+            </Device>
+            <Device i:type="FabricAsic">
+                <ElementType>FabricAsic</ElementType>
+                <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+                </Address>
+                <AddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>::/0</a:IPPrefix>
+                </AddressV6>
+                <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
+                <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+                <AssociatedTagsStr />
+                <ChassisInternalDevices />
+                <ClusterName>TestbedForstr-sonic</ClusterName>
+                <DeploymentId>3</DeploymentId>
+                <DeviceLocation i:nil="true" />
+                <HomeDatacenter>STARLab</HomeDatacenter>
+                <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+                </ManagementAddress>
+                <ManagementAddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>::/0</a:IPPrefix>
+                </ManagementAddressV6>
+                <NodeId i:nil="true" />
+                <SerialNumber i:nil="true" />
+                <Hostname>str-sonic-sup00-ASIC08</Hostname>
+                <HwSku>Broadcom-Ramon</HwSku>
+            </Device>
+            <Device i:type="FabricAsic">
+                <ElementType>FabricAsic</ElementType>
+                <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+                </Address>
+                <AddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>::/0</a:IPPrefix>
+                </AddressV6>
+                <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
+                <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+                <AssociatedTagsStr />
+                <ChassisInternalDevices />
+                <ClusterName>TestbedForstr-sonic</ClusterName>
+                <DeploymentId>3</DeploymentId>
+                <DeviceLocation i:nil="true" />
+                <HomeDatacenter>STARLab</HomeDatacenter>
+                <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+                </ManagementAddress>
+                <ManagementAddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>::/0</a:IPPrefix>
+                </ManagementAddressV6>
+                <NodeId i:nil="true" />
+                <SerialNumber i:nil="true" />
+                <Hostname>str-sonic-sup00-ASIC05</Hostname>
+                <HwSku>Broadcom-Ramon</HwSku>
+            </Device>
+            <Device i:type="FabricAsic">
+                <ElementType>FabricAsic</ElementType>
+                <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+                </Address>
+                <AddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>::/0</a:IPPrefix>
+                </AddressV6>
+                <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
+                <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+                <AssociatedTagsStr />
+                <ChassisInternalDevices />
+                <ClusterName>TestbedForstr-sonic</ClusterName>
+                <DeploymentId>3</DeploymentId>
+                <DeviceLocation i:nil="true" />
+                <HomeDatacenter>STARLab</HomeDatacenter>
+                <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+                </ManagementAddress>
+                <ManagementAddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>::/0</a:IPPrefix>
+                </ManagementAddressV6>
+                <NodeId i:nil="true" />
+                <SerialNumber i:nil="true" />
+                <Hostname>str-sonic-sup00-ASIC04</Hostname>
+                <HwSku>Broadcom-Ramon</HwSku>
+            </Device>
+            <Device i:type="FabricAsic">
+                <ElementType>FabricAsic</ElementType>
+                <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+                </Address>
+                <AddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>::/0</a:IPPrefix>
+                </AddressV6>
+                <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
+                <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+                <AssociatedTagsStr />
+                <ChassisInternalDevices />
+                <ClusterName>TestbedForstr-sonic</ClusterName>
+                <DeploymentId>3</DeploymentId>
+                <DeviceLocation i:nil="true" />
+                <HomeDatacenter>STARLab</HomeDatacenter>
+                <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+                </ManagementAddress>
+                <ManagementAddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>::/0</a:IPPrefix>
+                </ManagementAddressV6>
+                <NodeId i:nil="true" />
+                <SerialNumber i:nil="true" />
+                <Hostname>str-sonic-sup00-ASIC10</Hostname>
+                <HwSku>Broadcom-Ramon</HwSku>
+            </Device>
+            <Device i:type="FabricAsic">
+                <ElementType>FabricAsic</ElementType>
+                <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+                </Address>
+                <AddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>::/0</a:IPPrefix>
+                </AddressV6>
+                <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
+                <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+                <AssociatedTagsStr />
+                <ChassisInternalDevices />
+                <ClusterName>TestbedForstr-sonic</ClusterName>
+                <DeploymentId>3</DeploymentId>
+                <DeviceLocation i:nil="true" />
+                <HomeDatacenter>STARLab</HomeDatacenter>
+                <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+                </ManagementAddress>
+                <ManagementAddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>::/0</a:IPPrefix>
+                </ManagementAddressV6>
+                <NodeId i:nil="true" />
+                <SerialNumber i:nil="true" />
+                <Hostname>str-sonic-sup00-ASIC11</Hostname>
+                <HwSku>Broadcom-Ramon</HwSku>
+            </Device>
+            <Device i:type="FabricAsic">
+                <ElementType>FabricAsic</ElementType>
+                <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+                </Address>
+                <AddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>::/0</a:IPPrefix>
+                </AddressV6>
+                <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
+                <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+                <AssociatedTagsStr />
+                <ChassisInternalDevices />
+                <ClusterName>TestbedForstr-sonic</ClusterName>
+                <DeploymentId>3</DeploymentId>
+                <DeviceLocation i:nil="true" />
+                <HomeDatacenter>STARLab</HomeDatacenter>
+                <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+                </ManagementAddress>
+                <ManagementAddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>::/0</a:IPPrefix>
+                </ManagementAddressV6>
+                <NodeId i:nil="true" />
+                <SerialNumber i:nil="true" />
+                <Hostname>str-sonic-sup00-ASIC06</Hostname>
+                <HwSku>Broadcom-Ramon</HwSku>
+            </Device>
+            <Device i:type="FabricAsic">
+                <ElementType>FabricAsic</ElementType>
+                <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+                </Address>
+                <AddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>::/0</a:IPPrefix>
+                </AddressV6>
+                <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
+                <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+                <AssociatedTagsStr />
+                <ChassisInternalDevices />
+                <ClusterName>TestbedForstr-sonic</ClusterName>
+                <DeploymentId>3</DeploymentId>
+                <DeviceLocation i:nil="true" />
+                <HomeDatacenter>STARLab</HomeDatacenter>
+                <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+                </ManagementAddress>
+                <ManagementAddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>::/0</a:IPPrefix>
+                </ManagementAddressV6>
+                <NodeId i:nil="true" />
+                <SerialNumber i:nil="true" />
+                <Hostname>str-sonic-sup00-ASIC07</Hostname>
+                <HwSku>Broadcom-Ramon</HwSku>
+            </Device>
+            <Device i:type="RegionalHub">
+                <ElementType>RegionalHub</ElementType>
+                <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+                </Address>
+                <AddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>::/0</a:IPPrefix>
+                </AddressV6>
+                <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
+                <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+                <AssociatedTagsStr>None</AssociatedTagsStr>
+                <ChassisInternalDevices />
+                <ClusterName>TestbedForstr-sonic</ClusterName>
+                <DeploymentId>3</DeploymentId>
+                <DeviceLocation i:nil="true" />
+                <HomeDatacenter>STARLab</HomeDatacenter>
+                <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>172.16.191.10/17</a:IPPrefix>
+                </ManagementAddress>
+                <ManagementAddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>::/0</a:IPPrefix>
+                </ManagementAddressV6>
+                <NodeId i:nil="true" />
+                <SerialNumber i:nil="true" />
+                <Hostname>ARISTA91T3</Hostname>
+                <HwSku>Sonic-T3-sku</HwSku>
+            </Device>
+            <Device i:type="RegionalHub">
+                <ElementType>RegionalHub</ElementType>
+                <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+                </Address>
+                <AddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>::/0</a:IPPrefix>
+                </AddressV6>
+                <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
+                <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+                <AssociatedTagsStr>None</AssociatedTagsStr>
+                <ChassisInternalDevices />
+                <ClusterName>TestbedForstr-sonic</ClusterName>
+                <DeploymentId>3</DeploymentId>
+                <DeviceLocation i:nil="true" />
+                <HomeDatacenter>STARLab</HomeDatacenter>
+                <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>172.16.191.11/17</a:IPPrefix>
+                </ManagementAddress>
+                <ManagementAddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>::/0</a:IPPrefix>
+                </ManagementAddressV6>
+                <NodeId i:nil="true" />
+                <SerialNumber i:nil="true" />
+                <Hostname>ARISTA93T3</Hostname>
+                <HwSku>Sonic-T3-sku</HwSku>
+            </Device>
+            <Device i:type="RegionalHub">
+                <ElementType>RegionalHub</ElementType>
+                <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+                </Address>
+                <AddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>::/0</a:IPPrefix>
+                </AddressV6>
+                <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
+                <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+                <AssociatedTagsStr>None</AssociatedTagsStr>
+                <ChassisInternalDevices />
+                <ClusterName>TestbedForstr-sonic</ClusterName>
+                <DeploymentId>3</DeploymentId>
+                <DeviceLocation i:nil="true" />
+                <HomeDatacenter>STARLab</HomeDatacenter>
+                <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>172.16.191.12/17</a:IPPrefix>
+                </ManagementAddress>
+                <ManagementAddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>::/0</a:IPPrefix>
+                </ManagementAddressV6>
+                <NodeId i:nil="true" />
+                <SerialNumber i:nil="true" />
+                <Hostname>ARISTA05T3</Hostname>
+                <HwSku>Sonic-T3-sku</HwSku>
+            </Device>
+            <Device i:type="AZNGHub">
+                <ElementType>AZNGHub</ElementType>
+                <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+                </Address>
+                <AddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>::/0</a:IPPrefix>
+                </AddressV6>
+                <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
+                <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+                <AssociatedTagsStr>None</AssociatedTagsStr>
+                <ChassisInternalDevices />
+                <ClusterName>TestbedForstr-sonic</ClusterName>
+                <DeploymentId>3</DeploymentId>
+                <DeviceLocation i:nil="true" />
+                <HomeDatacenter>STARLab</HomeDatacenter>
+                <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>172.16.191.13/17</a:IPPrefix>
+                </ManagementAddress>
+                <ManagementAddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>::/0</a:IPPrefix>
+                </ManagementAddressV6>
+                <NodeId i:nil="true" />
+                <SerialNumber i:nil="true" />
+                <Hostname>ARISTA07T3</Hostname>
+                <HwSku>Sonic-T3-sku</HwSku>
+            </Device>
+            <Device i:type="RegionalHub">
+                <ElementType>RegionalHub</ElementType>
+                <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+                </Address>
+                <AddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>::/0</a:IPPrefix>
+                </AddressV6>
+                <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
+                <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+                <AssociatedTagsStr>None</AssociatedTagsStr>
+                <ChassisInternalDevices />
+                <ClusterName>TestbedForstr-sonic</ClusterName>
+                <DeploymentId>3</DeploymentId>
+                <DeviceLocation i:nil="true" />
+                <HomeDatacenter>STARLab</HomeDatacenter>
+                <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>172.16.191.14/17</a:IPPrefix>
+                </ManagementAddress>
+                <ManagementAddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>::/0</a:IPPrefix>
+                </ManagementAddressV6>
+                <NodeId i:nil="true" />
+                <SerialNumber i:nil="true" />
+                <Hostname>ARISTA09T3</Hostname>
+                <HwSku>Sonic-T3-sku</HwSku>
+            </Device>
+            <Device i:type="RegionalHub">
+                <ElementType>RegionalHub</ElementType>
+                <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+                </Address>
+                <AddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>::/0</a:IPPrefix>
+                </AddressV6>
+                <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
+                <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+                <AssociatedTagsStr>None</AssociatedTagsStr>
+                <ChassisInternalDevices />
+                <ClusterName>TestbedForstr-sonic</ClusterName>
+                <DeploymentId>3</DeploymentId>
+                <DeviceLocation i:nil="true" />
+                <HomeDatacenter>STARLab</HomeDatacenter>
+                <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>172.16.191.15/17</a:IPPrefix>
+                </ManagementAddress>
+                <ManagementAddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>::/0</a:IPPrefix>
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+                <NodeId i:nil="true" />
+                <SerialNumber i:nil="true" />
+                <Hostname>ARISTA11T3</Hostname>
+                <HwSku>Sonic-T3-sku</HwSku>
+            </Device>
+            <Device i:type="RegionalHub">
+                <ElementType>RegionalHub</ElementType>
+                <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+                </Address>
+                <AddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>::/0</a:IPPrefix>
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+                <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
+                <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+                <AssociatedTagsStr>None</AssociatedTagsStr>
+                <ChassisInternalDevices />
+                <ClusterName>TestbedForstr-sonic</ClusterName>
+                <DeploymentId>3</DeploymentId>
+                <DeviceLocation i:nil="true" />
+                <HomeDatacenter>STARLab</HomeDatacenter>
+                <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>172.16.191.16/17</a:IPPrefix>
+                </ManagementAddress>
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+                    <a:IPPrefix>::/0</a:IPPrefix>
+                </ManagementAddressV6>
+                <NodeId i:nil="true" />
+                <SerialNumber i:nil="true" />
+                <Hostname>ARISTA13T3</Hostname>
+                <HwSku>Sonic-T3-sku</HwSku>
+            </Device>
+            <Device i:type="RegionalHub">
+                <ElementType>RegionalHub</ElementType>
+                <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+                </Address>
+                <AddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>::/0</a:IPPrefix>
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+                <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
+                <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+                <AssociatedTagsStr>None</AssociatedTagsStr>
+                <ChassisInternalDevices />
+                <ClusterName>TestbedForstr-sonic</ClusterName>
+                <DeploymentId>3</DeploymentId>
+                <DeviceLocation i:nil="true" />
+                <HomeDatacenter>STARLab</HomeDatacenter>
+                <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>172.16.191.17/17</a:IPPrefix>
+                </ManagementAddress>
+                <ManagementAddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>::/0</a:IPPrefix>
+                </ManagementAddressV6>
+                <NodeId i:nil="true" />
+                <SerialNumber i:nil="true" />
+                <Hostname>ARISTA15T3</Hostname>
+                <HwSku>Sonic-T3-sku</HwSku>
+            </Device>
+            <Device i:type="RegionalHub">
+                <ElementType>RegionalHub</ElementType>
+                <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+                </Address>
+                <AddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>::/0</a:IPPrefix>
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+                <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
+                <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+                <AssociatedTagsStr>None</AssociatedTagsStr>
+                <ChassisInternalDevices />
+                <ClusterName>TestbedForstr-sonic</ClusterName>
+                <DeploymentId>3</DeploymentId>
+                <DeviceLocation i:nil="true" />
+                <HomeDatacenter>STARLab</HomeDatacenter>
+                <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>172.16.191.18/17</a:IPPrefix>
+                </ManagementAddress>
+                <ManagementAddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>::/0</a:IPPrefix>
+                </ManagementAddressV6>
+                <NodeId i:nil="true" />
+                <SerialNumber i:nil="true" />
+                <Hostname>ARISTA17T3</Hostname>
+                <HwSku>Sonic-T3-sku</HwSku>
+            </Device>
+            <Device i:type="AZNGHub">
+                <ElementType>AZNGHub</ElementType>
+                <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+                </Address>
+                <AddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>::/0</a:IPPrefix>
+                </AddressV6>
+                <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
+                <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+                <AssociatedTagsStr>None</AssociatedTagsStr>
+                <ChassisInternalDevices />
+                <ClusterName>TestbedForstr-sonic</ClusterName>
+                <DeploymentId>3</DeploymentId>
+                <DeviceLocation i:nil="true" />
+                <HomeDatacenter>STARLab</HomeDatacenter>
+                <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>172.16.191.19/17</a:IPPrefix>
+                </ManagementAddress>
+                <ManagementAddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>::/0</a:IPPrefix>
+                </ManagementAddressV6>
+                <NodeId i:nil="true" />
+                <SerialNumber i:nil="true" />
+                <Hostname>ARISTA18T3</Hostname>
+                <HwSku>Sonic-T3-sku</HwSku>
+            </Device>
+            <Device i:type="LinecardAsic">
+                <ElementType>LinecardAsic</ElementType>
+                <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>10.2.0.1/32</a:IPPrefix>
+                </Address>
+                <AddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>fc00:20::1/128</a:IPPrefix>
+                </AddressV6>
+                <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
+                <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+                <AssociatedTagsStr />
+                <ChassisInternalDevices />
+                <ClusterName>TestbedForstr-sonic</ClusterName>
+                <DeploymentId>3</DeploymentId>
+                <DeviceLocation i:nil="true" />
+                <HomeDatacenter>STARLab</HomeDatacenter>
+                <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+                </ManagementAddress>
+                <ManagementAddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>::/0</a:IPPrefix>
+                </ManagementAddressV6>
+                <NodeId i:nil="true" />
+                <SerialNumber i:nil="true" />
+                <Hostname>str-sonic-lc03-ASIC01</Hostname>
+                <HwSku>Broadcom-Jericho2cplus</HwSku>
+            </Device>
+            <Device i:type="AZNGHub">
+                <ElementType>AZNGHub</ElementType>
+                <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+                </Address>
+                <AddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>::/0</a:IPPrefix>
+                </AddressV6>
+                <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
+                <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+                <AssociatedTagsStr>None</AssociatedTagsStr>
+                <ChassisInternalDevices />
+                <ClusterName>TestbedForstr-sonic</ClusterName>
+                <DeploymentId>3</DeploymentId>
+                <DeviceLocation i:nil="true" />
+                <HomeDatacenter>STARLab</HomeDatacenter>
+                <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>172.16.191.20/17</a:IPPrefix>
+                </ManagementAddress>
+                <ManagementAddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>::/0</a:IPPrefix>
+                </ManagementAddressV6>
+                <NodeId i:nil="true" />
+                <SerialNumber i:nil="true" />
+                <Hostname>ARISTA19T3</Hostname>
+                <HwSku>Sonic-T3-sku</HwSku>
+            </Device>
+            <Device i:type="AZNGHub">
+                <ElementType>AZNGHub</ElementType>
+                <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+                </Address>
+                <AddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>::/0</a:IPPrefix>
+                </AddressV6>
+                <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
+                <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+                <AssociatedTagsStr>None</AssociatedTagsStr>
+                <ChassisInternalDevices />
+                <ClusterName>TestbedForstr-sonic</ClusterName>
+                <DeploymentId>3</DeploymentId>
+                <DeviceLocation i:nil="true" />
+                <HomeDatacenter>STARLab</HomeDatacenter>
+                <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>172.16.191.21/17</a:IPPrefix>
+                </ManagementAddress>
+                <ManagementAddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>::/0</a:IPPrefix>
+                </ManagementAddressV6>
+                <NodeId i:nil="true" />
+                <SerialNumber i:nil="true" />
+                <Hostname>ARISTA20T3</Hostname>
+                <HwSku>Sonic-T3-sku</HwSku>
+            </Device>
+            <Device i:type="AZNGHub">
+                <ElementType>AZNGHub</ElementType>
+                <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+                </Address>
+                <AddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>::/0</a:IPPrefix>
+                </AddressV6>
+                <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
+                <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+                <AssociatedTagsStr>None</AssociatedTagsStr>
+                <ChassisInternalDevices />
+                <ClusterName>TestbedForstr-sonic</ClusterName>
+                <DeploymentId>3</DeploymentId>
+                <DeviceLocation i:nil="true" />
+                <HomeDatacenter>STARLab</HomeDatacenter>
+                <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>172.16.191.22/17</a:IPPrefix>
+                </ManagementAddress>
+                <ManagementAddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>::/0</a:IPPrefix>
+                </ManagementAddressV6>
+                <NodeId i:nil="true" />
+                <SerialNumber i:nil="true" />
+                <Hostname>ARISTA21T3</Hostname>
+                <HwSku>Sonic-T3-sku</HwSku>
+            </Device>
+            <Device i:type="AZNGHub">
+                <ElementType>AZNGHub</ElementType>
+                <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+                </Address>
+                <AddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>::/0</a:IPPrefix>
+                </AddressV6>
+                <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
+                <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+                <AssociatedTagsStr>None</AssociatedTagsStr>
+                <ChassisInternalDevices />
+                <ClusterName>TestbedForstr-sonic</ClusterName>
+                <DeploymentId>3</DeploymentId>
+                <DeviceLocation i:nil="true" />
+                <HomeDatacenter>STARLab</HomeDatacenter>
+                <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>172.16.191.23/17</a:IPPrefix>
+                </ManagementAddress>
+                <ManagementAddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>::/0</a:IPPrefix>
+                </ManagementAddressV6>
+                <NodeId i:nil="true" />
+                <SerialNumber i:nil="true" />
+                <Hostname>ARISTA22T3</Hostname>
+                <HwSku>Sonic-T3-sku</HwSku>
+            </Device>
+            <Device i:type="AZNGHub">
+                <ElementType>AZNGHub</ElementType>
+                <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+                </Address>
+                <AddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>::/0</a:IPPrefix>
+                </AddressV6>
+                <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
+                <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+                <AssociatedTagsStr>None</AssociatedTagsStr>
+                <ChassisInternalDevices />
+                <ClusterName>TestbedForstr-sonic</ClusterName>
+                <DeploymentId>3</DeploymentId>
+                <DeviceLocation i:nil="true" />
+                <HomeDatacenter>STARLab</HomeDatacenter>
+                <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>172.16.191.24/17</a:IPPrefix>
+                </ManagementAddress>
+                <ManagementAddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>::/0</a:IPPrefix>
+                </ManagementAddressV6>
+                <NodeId i:nil="true" />
+                <SerialNumber i:nil="true" />
+                <Hostname>ARISTA23T3</Hostname>
+                <HwSku>Sonic-T3-sku</HwSku>
+            </Device>
+            <Device i:type="AZNGHub">
+                <ElementType>AZNGHub</ElementType>
+                <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+                </Address>
+                <AddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>::/0</a:IPPrefix>
+                </AddressV6>
+                <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
+                <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+                <AssociatedTagsStr>None</AssociatedTagsStr>
+                <ChassisInternalDevices />
+                <ClusterName>TestbedForstr-sonic</ClusterName>
+                <DeploymentId>3</DeploymentId>
+                <DeviceLocation i:nil="true" />
+                <HomeDatacenter>STARLab</HomeDatacenter>
+                <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>172.16.191.25/17</a:IPPrefix>
+                </ManagementAddress>
+                <ManagementAddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>::/0</a:IPPrefix>
+                </ManagementAddressV6>
+                <NodeId i:nil="true" />
+                <SerialNumber i:nil="true" />
+                <Hostname>ARISTA24T3</Hostname>
+                <HwSku>Sonic-T3-sku</HwSku>
+            </Device>
+            <Device i:type="RegionalHub">
+                <ElementType>RegionalHub</ElementType>
+                <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+                </Address>
+                <AddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>::/0</a:IPPrefix>
+                </AddressV6>
+                <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
+                <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+                <AssociatedTagsStr>None</AssociatedTagsStr>
+                <ChassisInternalDevices />
+                <ClusterName>TestbedForstr-sonic</ClusterName>
+                <DeploymentId>3</DeploymentId>
+                <DeviceLocation i:nil="true" />
+                <HomeDatacenter>STARLab</HomeDatacenter>
+                <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>172.16.191.26/17</a:IPPrefix>
+                </ManagementAddress>
+                <ManagementAddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>::/0</a:IPPrefix>
+                </ManagementAddressV6>
+                <NodeId i:nil="true" />
+                <SerialNumber i:nil="true" />
+                <Hostname>ARISTA25T3</Hostname>
+                <HwSku>Sonic-T3-sku</HwSku>
+            </Device>
+            <Device i:type="RegionalHub">
+                <ElementType>RegionalHub</ElementType>
+                <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+                </Address>
+                <AddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>::/0</a:IPPrefix>
+                </AddressV6>
+                <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
+                <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+                <AssociatedTagsStr>None</AssociatedTagsStr>
+                <ChassisInternalDevices />
+                <ClusterName>TestbedForstr-sonic</ClusterName>
+                <DeploymentId>3</DeploymentId>
+                <DeviceLocation i:nil="true" />
+                <HomeDatacenter>STARLab</HomeDatacenter>
+                <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>172.16.191.27/17</a:IPPrefix>
+                </ManagementAddress>
+                <ManagementAddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>::/0</a:IPPrefix>
+                </ManagementAddressV6>
+                <NodeId i:nil="true" />
+                <SerialNumber i:nil="true" />
+                <Hostname>ARISTA26T3</Hostname>
+                <HwSku>Sonic-T3-sku</HwSku>
+            </Device>
+            <Device i:type="RegionalHub">
+                <ElementType>RegionalHub</ElementType>
+                <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+                </Address>
+                <AddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>::/0</a:IPPrefix>
+                </AddressV6>
+                <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
+                <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+                <AssociatedTagsStr>None</AssociatedTagsStr>
+                <ChassisInternalDevices />
+                <ClusterName>TestbedForstr-sonic</ClusterName>
+                <DeploymentId>3</DeploymentId>
+                <DeviceLocation i:nil="true" />
+                <HomeDatacenter>STARLab</HomeDatacenter>
+                <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>172.16.191.28/17</a:IPPrefix>
+                </ManagementAddress>
+                <ManagementAddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>::/0</a:IPPrefix>
+                </ManagementAddressV6>
+                <NodeId i:nil="true" />
+                <SerialNumber i:nil="true" />
+                <Hostname>ARISTA27T3</Hostname>
+                <HwSku>Sonic-T3-sku</HwSku>
+            </Device>
+            <Device i:type="RegionalHub">
+                <ElementType>RegionalHub</ElementType>
+                <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+                </Address>
+                <AddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>::/0</a:IPPrefix>
+                </AddressV6>
+                <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
+                <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+                <AssociatedTagsStr>None</AssociatedTagsStr>
+                <ChassisInternalDevices />
+                <ClusterName>TestbedForstr-sonic</ClusterName>
+                <DeploymentId>3</DeploymentId>
+                <DeviceLocation i:nil="true" />
+                <HomeDatacenter>STARLab</HomeDatacenter>
+                <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>172.16.191.29/17</a:IPPrefix>
+                </ManagementAddress>
+                <ManagementAddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>::/0</a:IPPrefix>
+                </ManagementAddressV6>
+                <NodeId i:nil="true" />
+                <SerialNumber i:nil="true" />
+                <Hostname>ARISTA28T3</Hostname>
+                <HwSku>Sonic-T3-sku</HwSku>
+            </Device>
+            <Device i:type="AZNGHub">
+                <ElementType>AZNGHub</ElementType>
+                <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+                </Address>
+                <AddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>::/0</a:IPPrefix>
+                </AddressV6>
+                <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
+                <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+                <AssociatedTagsStr>None</AssociatedTagsStr>
+                <ChassisInternalDevices />
+                <ClusterName>TestbedForstr-sonic</ClusterName>
+                <DeploymentId>3</DeploymentId>
+                <DeviceLocation i:nil="true" />
+                <HomeDatacenter>STARLab</HomeDatacenter>
+                <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>172.16.191.30/17</a:IPPrefix>
+                </ManagementAddress>
+                <ManagementAddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>::/0</a:IPPrefix>
+                </ManagementAddressV6>
+                <NodeId i:nil="true" />
+                <SerialNumber i:nil="true" />
+                <Hostname>ARISTA29T3</Hostname>
+                <HwSku>Sonic-T3-sku</HwSku>
+            </Device>
+            <Device i:type="AZNGHub">
+                <ElementType>AZNGHub</ElementType>
+                <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
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+                <AddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>::/0</a:IPPrefix>
+                </AddressV6>
+                <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
+                <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+                <AssociatedTagsStr>None</AssociatedTagsStr>
+                <ChassisInternalDevices />
+                <ClusterName>TestbedForstr-sonic</ClusterName>
+                <DeploymentId>3</DeploymentId>
+                <DeviceLocation i:nil="true" />
+                <HomeDatacenter>STARLab</HomeDatacenter>
+                <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>172.16.191.31/17</a:IPPrefix>
+                </ManagementAddress>
+                <ManagementAddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>::/0</a:IPPrefix>
+                </ManagementAddressV6>
+                <NodeId i:nil="true" />
+                <SerialNumber i:nil="true" />
+                <Hostname>ARISTA30T3</Hostname>
+                <HwSku>Sonic-T3-sku</HwSku>
+            </Device>
+            <Device i:type="AZNGHub">
+                <ElementType>AZNGHub</ElementType>
+                <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+                </Address>
+                <AddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>::/0</a:IPPrefix>
+                </AddressV6>
+                <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
+                <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+                <AssociatedTagsStr>None</AssociatedTagsStr>
+                <ChassisInternalDevices />
+                <ClusterName>TestbedForstr-sonic</ClusterName>
+                <DeploymentId>3</DeploymentId>
+                <DeviceLocation i:nil="true" />
+                <HomeDatacenter>STARLab</HomeDatacenter>
+                <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>172.16.191.32/17</a:IPPrefix>
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+                    <a:IPPrefix>::/0</a:IPPrefix>
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+                <NodeId i:nil="true" />
+                <SerialNumber i:nil="true" />
+                <Hostname>ARISTA31T3</Hostname>
+                <HwSku>Sonic-T3-sku</HwSku>
+            </Device>
+            <Device i:type="AZNGHub">
+                <ElementType>AZNGHub</ElementType>
+                <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
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+                    <a:IPPrefix>::/0</a:IPPrefix>
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+                <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
+                <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+                <AssociatedTagsStr>None</AssociatedTagsStr>
+                <ChassisInternalDevices />
+                <ClusterName>TestbedForstr-sonic</ClusterName>
+                <DeploymentId>3</DeploymentId>
+                <DeviceLocation i:nil="true" />
+                <HomeDatacenter>STARLab</HomeDatacenter>
+                <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>172.16.191.33/17</a:IPPrefix>
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+                    <a:IPPrefix>::/0</a:IPPrefix>
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+                <NodeId i:nil="true" />
+                <SerialNumber i:nil="true" />
+                <Hostname>ARISTA32T3</Hostname>
+                <HwSku>Sonic-T3-sku</HwSku>
+            </Device>
+            <Device i:type="Linecard">
+                <ElementType>Linecard</ElementType>
+                <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>10.2.0.1/32</a:IPPrefix>
+                </Address>
+                <AddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>fc00:20::1/128</a:IPPrefix>
+                </AddressV6>
+                <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
+                <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+                <AssociatedTagsStr />
+                <ChassisInternalDevices />
+                <ClusterName>TestbedForstr-sonic</ClusterName>
+                <DeploymentId>3</DeploymentId>
+                <DeviceLocation i:nil="true" />
+                <HomeDatacenter>STARLab</HomeDatacenter>
+                <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>10.3.146.58/24</a:IPPrefix>
+                </ManagementAddress>
+                <ManagementAddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>2a01:111:e210:3000::a03:923a/64</a:IPPrefix>
+                </ManagementAddressV6>
+                <NodeId i:nil="true" />
+                <SerialNumber i:nil="true" />
+                <Hostname>str-sonic-lc03</Hostname>
+                <HwSku>Sonic-400g-lc-sku</HwSku>
+            </Device>
+            <Device i:type="Supervisor">
+                <ElementType>Supervisor</ElementType>
+                <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>10.152.0.46/32</a:IPPrefix>
+                </Address>
+                <AddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>2a01:111:e210:5e::/128</a:IPPrefix>
+                </AddressV6>
+                <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
+                <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+                <AssociatedTagsStr />
+                <ChassisInternalDevices />
+                <ClusterName>TestbedForstr-sonic</ClusterName>
+                <DeploymentId>3</DeploymentId>
+                <DeviceLocation i:nil="true" />
+                <HomeDatacenter>STARLab</HomeDatacenter>
+                <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>10.3.146.111/24</a:IPPrefix>
+                </ManagementAddress>
+                <ManagementAddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>2a01:111:e210:3000::a03:926f/64</a:IPPrefix>
+                </ManagementAddressV6>
+                <NodeId i:nil="true" />
+                <SerialNumber i:nil="true" />
+                <Hostname>str-sonic-sup00</Hostname>
+                <HwSku>sonic-sup-sku</HwSku>
+            </Device>
+            <Device i:type="SpineRouter">
+                <ElementType>SpineRouter</ElementType>
+                <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>10.152.0.46/32</a:IPPrefix>
+                </Address>
+                <AddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>2a01:111:e210:5e::/128</a:IPPrefix>
+                </AddressV6>
+                <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
+                <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+                <AssociatedTagsStr>None</AssociatedTagsStr>
+                <ChassisInternalDevices />
+                <ClusterName>TestbedForstr-sonic</ClusterName>
+                <DeploymentId>3</DeploymentId>
+                <DeviceLocation i:nil="true" />
+                <HomeDatacenter>STARLab</HomeDatacenter>
+                <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>10.3.146.111/24</a:IPPrefix>
+                </ManagementAddress>
+                <ManagementAddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+                    <a:IPPrefix>2a01:111:e210:3000::a03:926f/64</a:IPPrefix>
+                </ManagementAddressV6>
+                <NodeId i:nil="true" />
+                <SerialNumber i:nil="true" />
+                <Hostname>str-sonic</Hostname>
+                <HwSku>Sonic-Chassis-sku</HwSku>
+                <Index>0</Index>
+            </Device>
+        </Devices>
+    </PngDec>
+    <Hostname>str-sonic-lc03</Hostname>
+    <HwSku>Sonic-400g-lc-sku</HwSku>
+    <Version>1.0.1388.35297&#xD;
+</Version>
+</DeviceMiniGraph>
\ No newline at end of file
diff --git a/src/sonic-config-engine/tests/chassis_data/voq_chassis_data/voq_chassis_lc_single_asic.xml b/src/sonic-config-engine/tests/chassis_data/voq_chassis_data/voq_chassis_lc_single_asic.xml
new file mode 100644
index 000000000..1e80a5bcb
--- /dev/null
+++ b/src/sonic-config-engine/tests/chassis_data/voq_chassis_data/voq_chassis_lc_single_asic.xml
@@ -0,0 +1,46215 @@
+<?xml version="1.0"?>
+<DeviceMiniGraph xmlns="Microsoft.Search.Autopilot.Evolution" xmlns:i="http://www.w3.org/2001/XMLSchema-instance">
+  <CpgDec>
+    <IsisRouters xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+    <IsisSessions xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+    <PeeringSessions>
+      <BGPSession>
+        <ElementType>BGPSession</ElementType>
+        <BgpGroup>
+          <Start>VoQ</Start>
+          <End>VoQ</End>
+        </BgpGroup>
+        <MacSec>false</MacSec>
+        <StartRouter>str-sonic-lc06-ASIC00</StartRouter>
+        <StartPeer>10.241.88.4</StartPeer>
+        <EndRouter>str-sonic-lc07-ASIC00</EndRouter>
+        <EndPeer>10.241.88.5</EndPeer>
+        <Multihop>1</Multihop>
+        <HoldTime>0</HoldTime>
+        <KeepAliveTime>0</KeepAliveTime>
+      </BGPSession>
+      <BGPSession>
+        <ElementType>BGPSession</ElementType>
+        <BgpGroup>
+          <Start>VoQ</Start>
+          <End>VoQ</End>
+        </BgpGroup>
+        <MacSec>false</MacSec>
+        <StartRouter>str-sonic-lc06-ASIC00</StartRouter>
+        <StartPeer>2a01:111:e210:5e:0:a:f158:400</StartPeer>
+        <EndRouter>str-sonic-lc07-ASIC00</EndRouter>
+        <EndPeer>2a01:111:e210:5e:0:a:f158:500</EndPeer>
+        <Multihop>1</Multihop>
+        <HoldTime>0</HoldTime>
+        <KeepAliveTime>0</KeepAliveTime>
+      </BGPSession>
+      <BGPSession>
+        <ElementType>BGPSession</ElementType>
+        <BgpGroup>
+          <Start>VoQ</Start>
+          <End>VoQ</End>
+        </BgpGroup>
+        <MacSec>false</MacSec>
+        <StartRouter>str-sonic-lc06-ASIC00</StartRouter>
+        <StartPeer>10.241.88.4</StartPeer>
+        <EndRouter>str-sonic-lc08-ASIC00</EndRouter>
+        <EndPeer>10.241.88.6</EndPeer>
+        <Multihop>1</Multihop>
+        <HoldTime>0</HoldTime>
+        <KeepAliveTime>0</KeepAliveTime>
+      </BGPSession>
+      <BGPSession>
+        <ElementType>BGPSession</ElementType>
+        <BgpGroup>
+          <Start>VoQ</Start>
+          <End>VoQ</End>
+        </BgpGroup>
+        <MacSec>false</MacSec>
+        <StartRouter>str-sonic-lc06-ASIC00</StartRouter>
+        <StartPeer>2a01:111:e210:5e:0:a:f158:400</StartPeer>
+        <EndRouter>str-sonic-lc08-ASIC00</EndRouter>
+        <EndPeer>2a01:111:e210:5e:0:a:f158:600</EndPeer>
+        <Multihop>1</Multihop>
+        <HoldTime>0</HoldTime>
+        <KeepAliveTime>0</KeepAliveTime>
+      </BGPSession>
+      <BGPSession>
+        <ElementType>BGPSession</ElementType>
+        <BgpGroup>
+          <Start>VoQ</Start>
+          <End>VoQ</End>
+        </BgpGroup>
+        <MacSec>false</MacSec>
+        <StartRouter>str-sonic-lc06-ASIC00</StartRouter>
+        <StartPeer>10.241.88.4</StartPeer>
+        <EndRouter>str-sonic-lc09-ASIC00</EndRouter>
+        <EndPeer>10.241.88.7</EndPeer>
+        <Multihop>1</Multihop>
+        <HoldTime>0</HoldTime>
+        <KeepAliveTime>0</KeepAliveTime>
+      </BGPSession>
+      <BGPSession>
+        <ElementType>BGPSession</ElementType>
+        <BgpGroup>
+          <Start>VoQ</Start>
+          <End>VoQ</End>
+        </BgpGroup>
+        <MacSec>false</MacSec>
+        <StartRouter>str-sonic-lc06-ASIC00</StartRouter>
+        <StartPeer>2a01:111:e210:5e:0:a:f158:400</StartPeer>
+        <EndRouter>str-sonic-lc09-ASIC00</EndRouter>
+        <EndPeer>2a01:111:e210:5e:0:a:f158:700</EndPeer>
+        <Multihop>1</Multihop>
+        <HoldTime>0</HoldTime>
+        <KeepAliveTime>0</KeepAliveTime>
+      </BGPSession>
+      <BGPSession>
+        <ElementType>BGPSession</ElementType>
+        <BgpGroup>
+          <Start>VoQ</Start>
+          <End>VoQ</End>
+        </BgpGroup>
+        <MacSec>false</MacSec>
+        <StartRouter>str-sonic-lc06-ASIC00</StartRouter>
+        <StartPeer>10.241.88.4</StartPeer>
+        <EndRouter>str-sonic-lc10-ASIC00</EndRouter>
+        <EndPeer>10.241.88.8</EndPeer>
+        <Multihop>1</Multihop>
+        <HoldTime>0</HoldTime>
+        <KeepAliveTime>0</KeepAliveTime>
+      </BGPSession>
+      <BGPSession>
+        <ElementType>BGPSession</ElementType>
+        <BgpGroup>
+          <Start>VoQ</Start>
+          <End>VoQ</End>
+        </BgpGroup>
+        <MacSec>false</MacSec>
+        <StartRouter>str-sonic-lc06-ASIC00</StartRouter>
+        <StartPeer>2a01:111:e210:5e:0:a:f158:400</StartPeer>
+        <EndRouter>str-sonic-lc10-ASIC00</EndRouter>
+        <EndPeer>2a01:111:e210:5e:0:a:f158:800</EndPeer>
+        <Multihop>1</Multihop>
+        <HoldTime>0</HoldTime>
+        <KeepAliveTime>0</KeepAliveTime>
+      </BGPSession>
+      <BGPSession>
+        <ElementType>BGPSession</ElementType>
+        <BgpGroup>
+          <Start>VoQ</Start>
+          <End>VoQ</End>
+        </BgpGroup>
+        <MacSec>false</MacSec>
+        <StartRouter>str-sonic-lc03-ASIC00</StartRouter>
+        <StartPeer>10.241.88.0</StartPeer>
+        <EndRouter>str-sonic-lc06-ASIC00</EndRouter>
+        <EndPeer>10.241.88.4</EndPeer>
+        <Multihop>1</Multihop>
+        <HoldTime>0</HoldTime>
+        <KeepAliveTime>0</KeepAliveTime>
+      </BGPSession>
+      <BGPSession>
+        <ElementType>BGPSession</ElementType>
+        <BgpGroup>
+          <Start>VoQ</Start>
+          <End>VoQ</End>
+        </BgpGroup>
+        <MacSec>false</MacSec>
+        <StartRouter>str-sonic-lc03-ASIC00</StartRouter>
+        <StartPeer>2a01:111:e210:5e:0:a:f158:0</StartPeer>
+        <EndRouter>str-sonic-lc06-ASIC00</EndRouter>
+        <EndPeer>2a01:111:e210:5e:0:a:f158:400</EndPeer>
+        <Multihop>1</Multihop>
+        <HoldTime>0</HoldTime>
+        <KeepAliveTime>0</KeepAliveTime>
+      </BGPSession>
+      <BGPSession>
+        <ElementType>BGPSession</ElementType>
+        <BgpGroup>
+          <Start>VoQ</Start>
+          <End>VoQ</End>
+        </BgpGroup>
+        <MacSec>false</MacSec>
+        <StartRouter>str-sonic-lc03-ASIC01</StartRouter>
+        <StartPeer>10.241.88.1</StartPeer>
+        <EndRouter>str-sonic-lc06-ASIC00</EndRouter>
+        <EndPeer>10.241.88.4</EndPeer>
+        <Multihop>1</Multihop>
+        <HoldTime>0</HoldTime>
+        <KeepAliveTime>0</KeepAliveTime>
+      </BGPSession>
+      <BGPSession>
+        <ElementType>BGPSession</ElementType>
+        <BgpGroup>
+          <Start>VoQ</Start>
+          <End>VoQ</End>
+        </BgpGroup>
+        <MacSec>false</MacSec>
+        <StartRouter>str-sonic-lc03-ASIC01</StartRouter>
+        <StartPeer>2a01:111:e210:5e:0:a:f158:100</StartPeer>
+        <EndRouter>str-sonic-lc06-ASIC00</EndRouter>
+        <EndPeer>2a01:111:e210:5e:0:a:f158:400</EndPeer>
+        <Multihop>1</Multihop>
+        <HoldTime>0</HoldTime>
+        <KeepAliveTime>0</KeepAliveTime>
+      </BGPSession>
+      <BGPSession>
+        <ElementType>BGPSession</ElementType>
+        <BgpGroup>
+          <Start>VoQ</Start>
+          <End>VoQ</End>
+        </BgpGroup>
+        <MacSec>false</MacSec>
+        <StartRouter>str-sonic-lc04-ASIC00</StartRouter>
+        <StartPeer>10.241.88.2</StartPeer>
+        <EndRouter>str-sonic-lc06-ASIC00</EndRouter>
+        <EndPeer>10.241.88.4</EndPeer>
+        <Multihop>1</Multihop>
+        <HoldTime>0</HoldTime>
+        <KeepAliveTime>0</KeepAliveTime>
+      </BGPSession>
+      <BGPSession>
+        <ElementType>BGPSession</ElementType>
+        <BgpGroup>
+          <Start>VoQ</Start>
+          <End>VoQ</End>
+        </BgpGroup>
+        <MacSec>false</MacSec>
+        <StartRouter>str-sonic-lc04-ASIC00</StartRouter>
+        <StartPeer>2a01:111:e210:5e:0:a:f158:200</StartPeer>
+        <EndRouter>str-sonic-lc06-ASIC00</EndRouter>
+        <EndPeer>2a01:111:e210:5e:0:a:f158:400</EndPeer>
+        <Multihop>1</Multihop>
+        <HoldTime>0</HoldTime>
+        <KeepAliveTime>0</KeepAliveTime>
+      </BGPSession>
+      <BGPSession>
+        <ElementType>BGPSession</ElementType>str-soni
+        <BgpGroup>
+          <Start>VoQ</Start>
+          <End>VoQ</End>
+        </BgpGroup>
+        <MacSec>false</MacSec>
+        <StartRouter>str-sonic-lc05-ASIC00</StartRouter>
+        <StartPeer>10.241.88.3</StartPeer>
+        <EndRouter>str-sonic-lc06-ASIC00</EndRouter>
+        <EndPeer>10.241.88.4</EndPeer>
+        <Multihop>1</Multihop>
+        <HoldTime>0</HoldTime>
+        <KeepAliveTime>0</KeepAliveTime>
+      </BGPSession>
+      <BGPSession>
+        <ElementType>BGPSession</ElementType>
+        <BgpGroup>
+          <Start>VoQ</Start>
+          <End>VoQ</End>
+        </BgpGroup>
+        <MacSec>false</MacSec>
+        <StartRouter>str-sonic-lc05-ASIC00</StartRouter>
+        <StartPeer>2a01:111:e210:5e:0:a:f158:300</StartPeer>
+        <EndRouter>str-sonic-lc06-ASIC00</EndRouter>
+        <EndPeer>2a01:111:e210:5e:0:a:f158:400</EndPeer>
+        <Multihop>1</Multihop>
+        <HoldTime>0</HoldTime>
+        <KeepAliveTime>0</KeepAliveTime>
+      </BGPSession>
+      <BGPSession>
+        <ElementType>BGPSession</ElementType>
+        <MacSec>false</MacSec>
+        <StartRouter>ARISTA33T1</StartRouter>
+        <StartPeer>10.0.0.129</StartPeer>
+        <EndRouter>str-sonic-lc06-ASIC00</EndRouter>
+        <EndPeer>10.0.0.128</EndPeer>
+        <Multihop>1</Multihop>
+        <HoldTime>10</HoldTime>
+        <KeepAliveTime>3</KeepAliveTime>
+      </BGPSession>
+      <BGPSession>
+        <ElementType>BGPSession</ElementType>
+        <MacSec>false</MacSec>
+        <StartRouter>ARISTA33T1</StartRouter>
+        <StartPeer>fc00::102</StartPeer>
+        <EndRouter>str-sonic-lc06-ASIC00</EndRouter>
+        <EndPeer>fc00::101</EndPeer>
+        <Multihop>1</Multihop>
+        <HoldTime>10</HoldTime>
+        <KeepAliveTime>3</KeepAliveTime>
+      </BGPSession>
+      <BGPSession>
+        <ElementType>BGPSession</ElementType>
+        <MacSec>false</MacSec>
+        <StartRouter>ARISTA35T1</StartRouter>
+        <StartPeer>10.0.0.133</StartPeer>
+        <EndRouter>str-sonic-lc06-ASIC00</EndRouter>
+        <EndPeer>10.0.0.132</EndPeer>
+        <Multihop>1</Multihop>
+        <HoldTime>10</HoldTime>
+        <KeepAliveTime>3</KeepAliveTime>
+      </BGPSession>
+      <BGPSession>
+        <ElementType>BGPSession</ElementType>
+        <MacSec>false</MacSec>
+        <StartRouter>ARISTA35T1</StartRouter>
+        <StartPeer>fc00::10a</StartPeer>
+        <EndRouter>str-sonic-lc06-ASIC00</EndRouter>
+        <EndPeer>fc00::109</EndPeer>
+        <Multihop>1</Multihop>
+        <HoldTime>10</HoldTime>
+        <KeepAliveTime>3</KeepAliveTime>
+      </BGPSession>
+      <BGPSession>
+        <ElementType>BGPSession</ElementType>
+        <MacSec>false</MacSec>
+        <StartRouter>ARISTA37T1</StartRouter>
+        <StartPeer>10.0.0.137</StartPeer>
+        <EndRouter>str-sonic-lc06-ASIC00</EndRouter>
+        <EndPeer>10.0.0.136</EndPeer>
+        <Multihop>1</Multihop>
+        <HoldTime>10</HoldTime>
+        <KeepAliveTime>3</KeepAliveTime>
+      </BGPSession>
+      <BGPSession>
+        <ElementType>BGPSession</ElementType>
+        <MacSec>false</MacSec>
+        <StartRouter>ARISTA37T1</StartRouter>
+        <StartPeer>fc00::112</StartPeer>
+        <EndRouter>str-sonic-lc06-ASIC00</EndRouter>
+        <EndPeer>fc00::111</EndPeer>
+        <Multihop>1</Multihop>
+        <HoldTime>10</HoldTime>
+        <KeepAliveTime>3</KeepAliveTime>
+      </BGPSession>
+      <BGPSession>
+        <ElementType>BGPSession</ElementType>
+        <MacSec>false</MacSec>
+        <StartRouter>ARISTA39T1</StartRouter>
+        <StartPeer>10.0.0.141</StartPeer>
+        <EndRouter>str-sonic-lc06-ASIC00</EndRouter>
+        <EndPeer>10.0.0.140</EndPeer>
+        <Multihop>1</Multihop>
+        <HoldTime>10</HoldTime>
+        <KeepAliveTime>3</KeepAliveTime>
+      </BGPSession>
+      <BGPSession>
+        <ElementType>BGPSession</ElementType>
+        <MacSec>false</MacSec>
+        <StartRouter>ARISTA39T1</StartRouter>
+        <StartPeer>fc00::11a</StartPeer>
+        <EndRouter>str-sonic-lc06-ASIC00</EndRouter>
+        <EndPeer>fc00::119</EndPeer>
+        <Multihop>1</Multihop>
+        <HoldTime>10</HoldTime>
+        <KeepAliveTime>3</KeepAliveTime>
+      </BGPSession>
+      <BGPSession>
+        <ElementType>BGPSession</ElementType>
+        <MacSec>false</MacSec>
+        <StartRouter>ARISTA41T1</StartRouter>
+        <StartPeer>10.0.0.145</StartPeer>
+        <EndRouter>str-sonic-lc06-ASIC00</EndRouter>
+        <EndPeer>10.0.0.144</EndPeer>
+        <Multihop>1</Multihop>
+        <HoldTime>10</HoldTime>
+        <KeepAliveTime>3</KeepAliveTime>
+      </BGPSession>
+      <BGPSession>
+        <ElementType>BGPSession</ElementType>
+        <MacSec>false</MacSec>
+        <StartRouter>ARISTA41T1</StartRouter>
+        <StartPeer>fc00::122</StartPeer>
+        <EndRouter>str-sonic-lc06-ASIC00</EndRouter>
+        <EndPeer>fc00::121</EndPeer>
+        <Multihop>1</Multihop>
+        <HoldTime>10</HoldTime>
+        <KeepAliveTime>3</KeepAliveTime>
+      </BGPSession>
+      <BGPSession>
+        <ElementType>BGPSession</ElementType>
+        <MacSec>false</MacSec>
+        <StartRouter>ARISTA43T1</StartRouter>
+        <StartPeer>10.0.0.149</StartPeer>
+        <EndRouter>str-sonic-lc06-ASIC00</EndRouter>
+        <EndPeer>10.0.0.148</EndPeer>
+        <Multihop>1</Multihop>
+        <HoldTime>10</HoldTime>
+        <KeepAliveTime>3</KeepAliveTime>
+      </BGPSession>
+      <BGPSession>
+        <ElementType>BGPSession</ElementType>
+        <MacSec>false</MacSec>
+        <StartRouter>ARISTA43T1</StartRouter>
+        <StartPeer>fc00::12a</StartPeer>
+        <EndRouter>str-sonic-lc06-ASIC00</EndRouter>
+        <EndPeer>fc00::129</EndPeer>
+        <Multihop>1</Multihop>
+        <HoldTime>10</HoldTime>
+        <KeepAliveTime>3</KeepAliveTime>
+      </BGPSession>
+      <BGPSession>
+        <ElementType>BGPSession</ElementType>
+        <MacSec>false</MacSec>
+        <StartRouter>ARISTA47T1</StartRouter>
+        <StartPeer>10.0.0.153</StartPeer>
+        <EndRouter>str-sonic-lc06-ASIC00</EndRouter>
+        <EndPeer>10.0.0.152</EndPeer>
+        <Multihop>1</Multihop>
+        <HoldTime>10</HoldTime>
+        <KeepAliveTime>3</KeepAliveTime>
+      </BGPSession>
+      <BGPSession>
+        <ElementType>BGPSession</ElementType>
+        <MacSec>false</MacSec>
+        <StartRouter>ARISTA47T1</StartRouter>
+        <StartPeer>fc00::132</StartPeer>
+        <EndRouter>str-sonic-lc06-ASIC00</EndRouter>
+        <EndPeer>fc00::131</EndPeer>
+        <Multihop>1</Multihop>
+        <HoldTime>10</HoldTime>
+        <KeepAliveTime>3</KeepAliveTime>
+      </BGPSession>
+      <BGPSession>
+        <ElementType>BGPSession</ElementType>
+        <MacSec>false</MacSec>
+        <StartRouter>ARISTA50T1</StartRouter>
+        <StartPeer>10.0.0.157</StartPeer>
+        <EndRouter>str-sonic-lc06-ASIC00</EndRouter>
+        <EndPeer>10.0.0.156</EndPeer>
+        <Multihop>1</Multihop>
+        <HoldTime>10</HoldTime>
+        <KeepAliveTime>3</KeepAliveTime>
+      </BGPSession>
+      <BGPSession>
+        <ElementType>BGPSession</ElementType>
+        <MacSec>false</MacSec>
+        <StartRouter>ARISTA50T1</StartRouter>
+        <StartPeer>fc00::13a</StartPeer>
+        <EndRouter>str-sonic-lc06-ASIC00</EndRouter>
+        <EndPeer>fc00::139</EndPeer>
+        <Multihop>1</Multihop>
+        <HoldTime>10</HoldTime>
+        <KeepAliveTime>3</KeepAliveTime>
+      </BGPSession>
+    </PeeringSessions>
+    <Routers xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution">
+      <a:BGPRouterDeclaration>
+        <a:ASN>65100</a:ASN>
+        <a:BgpGroups>
+          <BgpGroup>
+            <ElementType>BGPGroup</ElementType>
+            <AttachTo>10.241.88.4;2a01:111:e210:5e:0:a:f158:400</AttachTo>
+            <BgpType>eBGP</BgpType>
+            <ClusterIpAddress/>
+            <Description i:nil="true"/>
+            <ExportPoliciesStr/>
+            <FamilyTypeStr/>
+            <ImportPoliciesStr/>
+            <LocalAsn>0</LocalAsn>
+            <LocalIpAddress/>
+            <Multipath>false</Multipath>
+            <MultipathAs>false</MultipathAs>
+            <Name>VoQ</Name>
+            <PrefixLimitMaximum>0</PrefixLimitMaximum>
+            <PrefixLimitTeardown>0</PrefixLimitTeardown>
+            <PrefixLimitTeardownIdleTimeout>0</PrefixLimitTeardownIdleTimeout>
+          </BgpGroup>
+        </a:BgpGroups>
+        <a:BgpTemplates/>
+        <a:Hostname>str-sonic-lc06-ASIC00</a:Hostname>
+        <a:Peers>
+          <BGPPeer>
+            <ElementType>BGPPeer</ElementType>
+            <Address>10.241.88.4</Address>
+            <RouteMapIn i:nil="true"/>
+            <RouteMapOut i:nil="true"/>
+            <Vrf i:nil="true"/>
+          </BGPPeer>
+          <BGPPeer>
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+            <PrefixLimitTeardownIdleTimeout>0</PrefixLimitTeardownIdleTimeout>
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+            <PrefixLimitTeardown>0</PrefixLimitTeardown>
+            <PrefixLimitTeardownIdleTimeout>0</PrefixLimitTeardownIdleTimeout>
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+            <PrefixLimitTeardown>0</PrefixLimitTeardown>
+            <PrefixLimitTeardownIdleTimeout>0</PrefixLimitTeardownIdleTimeout>
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+            <PrefixLimitTeardownIdleTimeout>0</PrefixLimitTeardownIdleTimeout>
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+            <Name>VoQ</Name>
+            <PrefixLimitMaximum>0</PrefixLimitMaximum>
+            <PrefixLimitTeardown>0</PrefixLimitTeardown>
+            <PrefixLimitTeardownIdleTimeout>0</PrefixLimitTeardownIdleTimeout>
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+            <Name>VoQ</Name>
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+            <PrefixLimitTeardownIdleTimeout>0</PrefixLimitTeardownIdleTimeout>
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+            <PrefixLimitTeardownIdleTimeout>0</PrefixLimitTeardownIdleTimeout>
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+            <Name>VoQ</Name>
+            <PrefixLimitMaximum>0</PrefixLimitMaximum>
+            <PrefixLimitTeardown>0</PrefixLimitTeardown>
+            <PrefixLimitTeardownIdleTimeout>0</PrefixLimitTeardownIdleTimeout>
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+        <a:Peers>
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+          </BGPPeer>
+          <BGPPeer>
+            <ElementType>BGPPeer</ElementType>
+            <Address>fc00::99</Address>
+            <RouteMapIn i:nil="true"/>
+            <RouteMapOut i:nil="true"/>
+            <Vrf i:nil="true"/>
+          </BGPPeer>
+          <BGPPeer>
+            <ElementType>BGPPeer</ElementType>
+            <Address>10.0.0.80</Address>
+            <RouteMapIn i:nil="true"/>
+            <RouteMapOut i:nil="true"/>
+            <Vrf i:nil="true"/>
+          </BGPPeer>
+          <BGPPeer>
+            <ElementType>BGPPeer</ElementType>
+            <Address>fc00::a1</Address>
+            <RouteMapIn i:nil="true"/>
+            <RouteMapOut i:nil="true"/>
+            <Vrf i:nil="true"/>
+          </BGPPeer>
+          <BGPPeer>
+            <ElementType>BGPPeer</ElementType>
+            <Address>10.0.0.84</Address>
+            <RouteMapIn i:nil="true"/>
+            <RouteMapOut i:nil="true"/>
+            <Vrf i:nil="true"/>
+          </BGPPeer>
+          <BGPPeer>
+            <ElementType>BGPPeer</ElementType>
+            <Address>fc00::a9</Address>
+            <RouteMapIn i:nil="true"/>
+            <RouteMapOut i:nil="true"/>
+            <Vrf i:nil="true"/>
+          </BGPPeer>
+          <BGPPeer>
+            <ElementType>BGPPeer</ElementType>
+            <Address>10.0.0.88</Address>
+            <RouteMapIn i:nil="true"/>
+            <RouteMapOut i:nil="true"/>
+            <Vrf i:nil="true"/>
+          </BGPPeer>
+          <BGPPeer>
+            <ElementType>BGPPeer</ElementType>
+            <Address>fc00::b1</Address>
+            <RouteMapIn i:nil="true"/>
+            <RouteMapOut i:nil="true"/>
+            <Vrf i:nil="true"/>
+          </BGPPeer>
+          <BGPPeer>
+            <ElementType>BGPPeer</ElementType>
+            <Address>10.0.0.92</Address>
+            <RouteMapIn i:nil="true"/>
+            <RouteMapOut i:nil="true"/>
+            <Vrf i:nil="true"/>
+          </BGPPeer>
+          <BGPPeer>
+            <ElementType>BGPPeer</ElementType>
+            <Address>fc00::b9</Address>
+            <RouteMapIn i:nil="true"/>
+            <RouteMapOut i:nil="true"/>
+            <Vrf i:nil="true"/>
+          </BGPPeer>
+          <BGPPeer>
+            <ElementType>BGPPeer</ElementType>
+            <Address>10.0.0.64</Address>
+            <RouteMapIn i:nil="true"/>
+            <RouteMapOut i:nil="true"/>
+            <Vrf i:nil="true"/>
+          </BGPPeer>
+          <BGPPeer>
+            <ElementType>BGPPeer</ElementType>
+            <Address>fc00::81</Address>
+            <RouteMapIn i:nil="true"/>
+            <RouteMapOut i:nil="true"/>
+            <Vrf i:nil="true"/>
+          </BGPPeer>
+          <BGPPeer>
+            <ElementType>BGPPeer</ElementType>
+            <Address>10.0.0.68</Address>
+            <RouteMapIn i:nil="true"/>
+            <RouteMapOut i:nil="true"/>
+            <Vrf i:nil="true"/>
+          </BGPPeer>
+          <BGPPeer>
+            <ElementType>BGPPeer</ElementType>
+            <Address>fc00::89</Address>
+            <RouteMapIn i:nil="true"/>
+            <RouteMapOut i:nil="true"/>
+            <Vrf i:nil="true"/>
+          </BGPPeer>
+        </a:Peers>
+        <a:RouteMaps/>
+        <a:RouterID i:nil="true"/>
+      </a:BGPRouterDeclaration>
+      <a:BGPRouterDeclaration>
+        <a:ASN>65338</a:ASN>
+        <a:BgpGroups/>
+        <a:BgpTemplates/>
+        <a:Hostname>ARISTA33T1</a:Hostname>
+        <a:Peers>
+          <BGPPeer>
+            <ElementType>BGPPeer</ElementType>
+            <Address>10.0.0.129</Address>
+            <RouteMapIn i:nil="true"/>
+            <RouteMapOut i:nil="true"/>
+            <Vrf i:nil="true"/>
+          </BGPPeer>
+          <BGPPeer>
+            <ElementType>BGPPeer</ElementType>
+            <Address>fc00::102</Address>
+            <RouteMapIn i:nil="true"/>
+            <RouteMapOut i:nil="true"/>
+            <Vrf i:nil="true"/>
+          </BGPPeer>
+        </a:Peers>
+        <a:RouteMaps/>
+        <a:RouterID i:nil="true"/>
+      </a:BGPRouterDeclaration>
+      <a:BGPRouterDeclaration>
+        <a:ASN>65339</a:ASN>
+        <a:BgpGroups/>
+        <a:BgpTemplates/>
+        <a:Hostname>ARISTA35T1</a:Hostname>
+        <a:Peers>
+          <BGPPeer>
+            <ElementType>BGPPeer</ElementType>
+            <Address>10.0.0.133</Address>
+            <RouteMapIn i:nil="true"/>
+            <RouteMapOut i:nil="true"/>
+            <Vrf i:nil="true"/>
+          </BGPPeer>
+          <BGPPeer>
+            <ElementType>BGPPeer</ElementType>
+            <Address>fc00::10a</Address>
+            <RouteMapIn i:nil="true"/>
+            <RouteMapOut i:nil="true"/>
+            <Vrf i:nil="true"/>
+          </BGPPeer>
+        </a:Peers>
+        <a:RouteMaps/>
+        <a:RouterID i:nil="true"/>
+      </a:BGPRouterDeclaration>
+      <a:BGPRouterDeclaration>
+        <a:ASN>65340</a:ASN>
+        <a:BgpGroups/>
+        <a:BgpTemplates/>
+        <a:Hostname>ARISTA37T1</a:Hostname>
+        <a:Peers>
+          <BGPPeer>
+            <ElementType>BGPPeer</ElementType>
+            <Address>10.0.0.137</Address>
+            <RouteMapIn i:nil="true"/>
+            <RouteMapOut i:nil="true"/>
+            <Vrf i:nil="true"/>
+          </BGPPeer>
+          <BGPPeer>
+            <ElementType>BGPPeer</ElementType>
+            <Address>fc00::112</Address>
+            <RouteMapIn i:nil="true"/>
+            <RouteMapOut i:nil="true"/>
+            <Vrf i:nil="true"/>
+          </BGPPeer>
+        </a:Peers>
+        <a:RouteMaps/>
+        <a:RouterID i:nil="true"/>
+      </a:BGPRouterDeclaration>
+      <a:BGPRouterDeclaration>
+        <a:ASN>65341</a:ASN>
+        <a:BgpGroups/>
+        <a:BgpTemplates/>
+        <a:Hostname>ARISTA39T1</a:Hostname>
+        <a:Peers>
+          <BGPPeer>
+            <ElementType>BGPPeer</ElementType>
+            <Address>10.0.0.141</Address>
+            <RouteMapIn i:nil="true"/>
+            <RouteMapOut i:nil="true"/>
+            <Vrf i:nil="true"/>
+          </BGPPeer>
+          <BGPPeer>
+            <ElementType>BGPPeer</ElementType>
+            <Address>fc00::11a</Address>
+            <RouteMapIn i:nil="true"/>
+            <RouteMapOut i:nil="true"/>
+            <Vrf i:nil="true"/>
+          </BGPPeer>
+        </a:Peers>
+        <a:RouteMaps/>
+        <a:RouterID i:nil="true"/>
+      </a:BGPRouterDeclaration>
+      <a:BGPRouterDeclaration>
+        <a:ASN>65342</a:ASN>
+        <a:BgpGroups/>
+        <a:BgpTemplates/>
+        <a:Hostname>ARISTA41T1</a:Hostname>
+        <a:Peers>
+          <BGPPeer>
+            <ElementType>BGPPeer</ElementType>
+            <Address>10.0.0.145</Address>
+            <RouteMapIn i:nil="true"/>
+            <RouteMapOut i:nil="true"/>
+            <Vrf i:nil="true"/>
+          </BGPPeer>
+          <BGPPeer>
+            <ElementType>BGPPeer</ElementType>
+            <Address>fc00::122</Address>
+            <RouteMapIn i:nil="true"/>
+            <RouteMapOut i:nil="true"/>
+            <Vrf i:nil="true"/>
+          </BGPPeer>
+        </a:Peers>
+        <a:RouteMaps/>
+        <a:RouterID i:nil="true"/>
+      </a:BGPRouterDeclaration>
+      <a:BGPRouterDeclaration>
+        <a:ASN>65343</a:ASN>
+        <a:BgpGroups/>
+        <a:BgpTemplates/>
+        <a:Hostname>ARISTA43T1</a:Hostname>
+        <a:Peers>
+          <BGPPeer>
+            <ElementType>BGPPeer</ElementType>
+            <Address>10.0.0.149</Address>
+            <RouteMapIn i:nil="true"/>
+            <RouteMapOut i:nil="true"/>
+            <Vrf i:nil="true"/>
+          </BGPPeer>
+          <BGPPeer>
+            <ElementType>BGPPeer</ElementType>
+            <Address>fc00::12a</Address>
+            <RouteMapIn i:nil="true"/>
+            <RouteMapOut i:nil="true"/>
+            <Vrf i:nil="true"/>
+          </BGPPeer>
+        </a:Peers>
+        <a:RouteMaps/>
+        <a:RouterID i:nil="true"/>
+      </a:BGPRouterDeclaration>
+      <a:BGPRouterDeclaration>
+        <a:ASN>65345</a:ASN>
+        <a:BgpGroups/>
+        <a:BgpTemplates/>
+        <a:Hostname>ARISTA47T1</a:Hostname>
+        <a:Peers>
+          <BGPPeer>
+            <ElementType>BGPPeer</ElementType>
+            <Address>10.0.0.153</Address>
+            <RouteMapIn i:nil="true"/>
+            <RouteMapOut i:nil="true"/>
+            <Vrf i:nil="true"/>
+          </BGPPeer>
+          <BGPPeer>
+            <ElementType>BGPPeer</ElementType>
+            <Address>fc00::132</Address>
+            <RouteMapIn i:nil="true"/>
+            <RouteMapOut i:nil="true"/>
+            <Vrf i:nil="true"/>
+          </BGPPeer>
+        </a:Peers>
+        <a:RouteMaps/>
+        <a:RouterID i:nil="true"/>
+      </a:BGPRouterDeclaration>
+      <a:BGPRouterDeclaration>
+        <a:ASN>65347</a:ASN>
+        <a:BgpGroups/>
+        <a:BgpTemplates/>
+        <a:Hostname>ARISTA50T1</a:Hostname>
+        <a:Peers>
+          <BGPPeer>
+            <ElementType>BGPPeer</ElementType>
+            <Address>10.0.0.157</Address>
+            <RouteMapIn i:nil="true"/>
+            <RouteMapOut i:nil="true"/>
+            <Vrf i:nil="true"/>
+          </BGPPeer>
+          <BGPPeer>
+            <ElementType>BGPPeer</ElementType>
+            <Address>fc00::13a</Address>
+            <RouteMapIn i:nil="true"/>
+            <RouteMapOut i:nil="true"/>
+            <Vrf i:nil="true"/>
+          </BGPPeer>
+        </a:Peers>
+        <a:RouteMaps/>
+        <a:RouterID i:nil="true"/>
+      </a:BGPRouterDeclaration>
+    </Routers>
+    <StaticRouters xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+  </CpgDec>
+  <DeviceInfos>
+    <DeviceInfo>
+      <AzClusterSku i:nil="true"/>
+      <BackendFabricInterfaces xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution">
+        <a:BackendFabricInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>cpu3/0</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>cpu0</SonicName>
+          <Speed>10000</Speed>
+          <a:CountOfLanes i:nil="true"/>
+          <a:StartLaneIndex i:nil="true"/>
+        </a:BackendFabricInterface>
+        <a:BackendFabricInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>2</Index>
+          <InterfaceName>cpu3/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>cpu1</SonicName>
+          <Speed>10000</Speed>
+          <a:CountOfLanes i:nil="true"/>
+          <a:StartLaneIndex i:nil="true"/>
+        </a:BackendFabricInterface>
+        <a:BackendFabricInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>3</Index>
+          <InterfaceName>Recirc3/0/0</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet-Rec0</SonicName>
+          <Speed>10000</Speed>
+          <a:CountOfLanes i:nil="true"/>
+          <a:StartLaneIndex i:nil="true"/>
+        </a:BackendFabricInterface>
+        <a:BackendFabricInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>4</Index>
+          <InterfaceName>Recirc3/1/0</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet-Rec1</SonicName>
+          <Speed>10000</Speed>
+          <a:CountOfLanes i:nil="true"/>
+          <a:StartLaneIndex i:nil="true"/>
+        </a:BackendFabricInterface>
+        <a:BackendFabricInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>5</Index>
+          <InterfaceName>Recirc3/0/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet-IB0</SonicName>
+          <Speed>10000</Speed>
+          <a:CountOfLanes i:nil="true"/>
+          <a:StartLaneIndex i:nil="true"/>
+        </a:BackendFabricInterface>
+        <a:BackendFabricInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>6</Index>
+          <InterfaceName>Recirc3/1/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet-IB1</SonicName>
+          <Speed>10000</Speed>
+          <a:CountOfLanes i:nil="true"/>
+          <a:StartLaneIndex i:nil="true"/>
+        </a:BackendFabricInterface>
+        <a:BackendFabricInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>7</Index>
+          <InterfaceName>cpu4/0</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>cpu0</SonicName>
+          <Speed>10000</Speed>
+          <a:CountOfLanes i:nil="true"/>
+          <a:StartLaneIndex i:nil="true"/>
+        </a:BackendFabricInterface>
+        <a:BackendFabricInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>8</Index>
+          <InterfaceName>Recirc4/0/0</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet-Rec0</SonicName>
+          <Speed>400000</Speed>
+          <a:CountOfLanes i:nil="true"/>
+          <a:StartLaneIndex i:nil="true"/>
+        </a:BackendFabricInterface>
+        <a:BackendFabricInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>9</Index>
+          <InterfaceName>Recirc4/0/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet-IB0</SonicName>
+          <Speed>400000</Speed>
+          <a:CountOfLanes i:nil="true"/>
+          <a:StartLaneIndex i:nil="true"/>
+        </a:BackendFabricInterface>
+        <a:BackendFabricInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>10</Index>
+          <InterfaceName>cpu5/0</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>cpu0</SonicName>
+          <Speed>10000</Speed>
+          <a:CountOfLanes i:nil="true"/>
+          <a:StartLaneIndex i:nil="true"/>
+        </a:BackendFabricInterface>
+        <a:BackendFabricInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>11</Index>
+          <InterfaceName>Recirc5/0/0</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet-Rec0</SonicName>
+          <Speed>400000</Speed>
+          <a:CountOfLanes i:nil="true"/>
+          <a:StartLaneIndex i:nil="true"/>
+        </a:BackendFabricInterface>
+        <a:BackendFabricInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>12</Index>
+          <InterfaceName>Recirc5/0/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet-IB0</SonicName>
+          <Speed>400000</Speed>
+          <a:CountOfLanes i:nil="true"/>
+          <a:StartLaneIndex i:nil="true"/>
+        </a:BackendFabricInterface>
+        <a:BackendFabricInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>13</Index>
+          <InterfaceName>cpu6/0</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>cpu0</SonicName>
+          <Speed>10000</Speed>
+          <a:CountOfLanes i:nil="true"/>
+          <a:StartLaneIndex i:nil="true"/>
+        </a:BackendFabricInterface>
+        <a:BackendFabricInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>14</Index>
+          <InterfaceName>Recirc6/0/0</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet-Rec0</SonicName>
+          <Speed>400000</Speed>
+          <a:CountOfLanes i:nil="true"/>
+          <a:StartLaneIndex i:nil="true"/>
+        </a:BackendFabricInterface>
+        <a:BackendFabricInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>15</Index>
+          <InterfaceName>Recirc6/0/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet-IB0</SonicName>
+          <Speed>400000</Speed>
+          <a:CountOfLanes i:nil="true"/>
+          <a:StartLaneIndex i:nil="true"/>
+        </a:BackendFabricInterface>
+        <a:BackendFabricInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>16</Index>
+          <InterfaceName>cpu7/0</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>cpu0</SonicName>
+          <Speed>10000</Speed>
+          <a:CountOfLanes i:nil="true"/>
+          <a:StartLaneIndex i:nil="true"/>
+        </a:BackendFabricInterface>
+        <a:BackendFabricInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>17</Index>
+          <InterfaceName>Recirc7/0/0</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet-Rec0</SonicName>
+          <Speed>400000</Speed>
+          <a:CountOfLanes i:nil="true"/>
+          <a:StartLaneIndex i:nil="true"/>
+        </a:BackendFabricInterface>
+        <a:BackendFabricInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>18</Index>
+          <InterfaceName>Recirc7/0/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet-IB0</SonicName>
+          <Speed>400000</Speed>
+          <a:CountOfLanes i:nil="true"/>
+          <a:StartLaneIndex i:nil="true"/>
+        </a:BackendFabricInterface>
+        <a:BackendFabricInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>19</Index>
+          <InterfaceName>cpu8/0</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>cpu0</SonicName>
+          <Speed>10000</Speed>
+          <a:CountOfLanes i:nil="true"/>
+          <a:StartLaneIndex i:nil="true"/>
+        </a:BackendFabricInterface>
+        <a:BackendFabricInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>20</Index>
+          <InterfaceName>Recirc8/0/0</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet-Rec0</SonicName>
+          <Speed>400000</Speed>
+          <a:CountOfLanes i:nil="true"/>
+          <a:StartLaneIndex i:nil="true"/>
+        </a:BackendFabricInterface>
+        <a:BackendFabricInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>21</Index>
+          <InterfaceName>Recirc8/0/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet-IB0</SonicName>
+          <Speed>400000</Speed>
+          <a:CountOfLanes i:nil="true"/>
+          <a:StartLaneIndex i:nil="true"/>
+        </a:BackendFabricInterface>
+        <a:BackendFabricInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>22</Index>
+          <InterfaceName>cpu10/0</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>cpu0</SonicName>
+          <Speed>10000</Speed>
+          <a:CountOfLanes i:nil="true"/>
+          <a:StartLaneIndex i:nil="true"/>
+        </a:BackendFabricInterface>
+        <a:BackendFabricInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>23</Index>
+          <InterfaceName>Recirc10/0/0</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet-Rec0</SonicName>
+          <Speed>400000</Speed>
+          <a:CountOfLanes i:nil="true"/>
+          <a:StartLaneIndex i:nil="true"/>
+        </a:BackendFabricInterface>
+        <a:BackendFabricInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>24</Index>
+          <InterfaceName>Recirc10/0/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet-IB0</SonicName>
+          <Speed>400000</Speed>
+          <a:CountOfLanes i:nil="true"/>
+          <a:StartLaneIndex i:nil="true"/>
+        </a:BackendFabricInterface>
+      </BackendFabricInterfaces>
+      <BaseSku>Sonic-T2-Base-sku</BaseSku>
+      <ClusterSku i:nil="true"/>
+      <EthernetInterfaces xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution">
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>100000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>Ethernet3/1/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet0</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>100000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>2</Index>
+          <InterfaceName>Ethernet3/2/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet8</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>100000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>3</Index>
+          <InterfaceName>Ethernet3/3/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet16</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>100000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>4</Index>
+          <InterfaceName>Ethernet3/4/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet24</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>100000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>5</Index>
+          <InterfaceName>Ethernet3/5/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet32</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>100000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>6</Index>
+          <InterfaceName>Ethernet3/6/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet40</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>100000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>7</Index>
+          <InterfaceName>Ethernet3/7/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet48</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>100000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>8</Index>
+          <InterfaceName>Ethernet3/8/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet56</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>100000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>9</Index>
+          <InterfaceName>Ethernet3/9/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet64</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>100000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>10</Index>
+          <InterfaceName>Ethernet3/10/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet72</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>100000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>11</Index>
+          <InterfaceName>Ethernet3/11/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet80</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>100000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>12</Index>
+          <InterfaceName>Ethernet3/12/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet88</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>100000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>13</Index>
+          <InterfaceName>Ethernet3/13/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet96</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>100000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>14</Index>
+          <InterfaceName>Ethernet3/14/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet104</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>100000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>15</Index>
+          <InterfaceName>Ethernet3/15/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet112</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>100000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>16</Index>
+          <InterfaceName>Ethernet3/16/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet120</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>100000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>17</Index>
+          <InterfaceName>Ethernet3/17/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet128</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>100000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>18</Index>
+          <InterfaceName>Ethernet3/18/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet136</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>100000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>19</Index>
+          <InterfaceName>Ethernet3/19/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet144</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>100000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>20</Index>
+          <InterfaceName>Ethernet3/20/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet152</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>100000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>21</Index>
+          <InterfaceName>Ethernet3/21/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet160</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>100000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>22</Index>
+          <InterfaceName>Ethernet3/22/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet168</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>100000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>23</Index>
+          <InterfaceName>Ethernet3/23/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet176</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>100000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>24</Index>
+          <InterfaceName>Ethernet3/24/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet184</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>100000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>25</Index>
+          <InterfaceName>Ethernet3/25/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet192</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>100000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>26</Index>
+          <InterfaceName>Ethernet3/26/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet200</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>100000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>27</Index>
+          <InterfaceName>Ethernet3/27/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet208</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>100000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>28</Index>
+          <InterfaceName>Ethernet3/28/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet216</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>100000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>29</Index>
+          <InterfaceName>Ethernet3/29/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet224</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>100000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>30</Index>
+          <InterfaceName>Ethernet3/30/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet232</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>100000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>31</Index>
+          <InterfaceName>Ethernet3/31/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet240</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>100000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>32</Index>
+          <InterfaceName>Ethernet3/32/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet248</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>100000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>33</Index>
+          <InterfaceName>Ethernet3/33/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet256</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>100000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>34</Index>
+          <InterfaceName>Ethernet3/34/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet264</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>100000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>35</Index>
+          <InterfaceName>Ethernet3/35/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet272</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>100000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>36</Index>
+          <InterfaceName>Ethernet3/36/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet280</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>37</Index>
+          <InterfaceName>Ethernet4/1/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet0</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>38</Index>
+          <InterfaceName>Ethernet4/2/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet4</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>39</Index>
+          <InterfaceName>Ethernet4/3/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet8</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>40</Index>
+          <InterfaceName>Ethernet4/4/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet12</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>41</Index>
+          <InterfaceName>Ethernet4/5/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet16</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>42</Index>
+          <InterfaceName>Ethernet4/6/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet20</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>43</Index>
+          <InterfaceName>Ethernet4/7/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet24</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>44</Index>
+          <InterfaceName>Ethernet4/8/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet28</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>45</Index>
+          <InterfaceName>Ethernet4/9/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet32</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>46</Index>
+          <InterfaceName>Ethernet4/10/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet36</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>47</Index>
+          <InterfaceName>Ethernet4/11/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet40</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>48</Index>
+          <InterfaceName>Ethernet4/12/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet44</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>49</Index>
+          <InterfaceName>Ethernet4/13/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet48</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>50</Index>
+          <InterfaceName>Ethernet4/14/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet52</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>51</Index>
+          <InterfaceName>Ethernet4/15/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet56</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>52</Index>
+          <InterfaceName>Ethernet4/16/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet60</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>53</Index>
+          <InterfaceName>Ethernet4/17/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet64</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>54</Index>
+          <InterfaceName>Ethernet4/18/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet68</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>55</Index>
+          <InterfaceName>Ethernet4/19/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet72</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>56</Index>
+          <InterfaceName>Ethernet4/20/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet76</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>57</Index>
+          <InterfaceName>Ethernet4/21/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet80</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>58</Index>
+          <InterfaceName>Ethernet4/22/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet84</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>59</Index>
+          <InterfaceName>Ethernet4/23/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet88</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>60</Index>
+          <InterfaceName>Ethernet4/24/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet92</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>61</Index>
+          <InterfaceName>Ethernet4/25/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet96</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>62</Index>
+          <InterfaceName>Ethernet4/26/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet100</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>63</Index>
+          <InterfaceName>Ethernet4/27/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet104</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>64</Index>
+          <InterfaceName>Ethernet4/28/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet108</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>65</Index>
+          <InterfaceName>Ethernet4/29/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet112</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>66</Index>
+          <InterfaceName>Ethernet4/30/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet116</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>67</Index>
+          <InterfaceName>Ethernet4/31/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet120</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>68</Index>
+          <InterfaceName>Ethernet4/32/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet124</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>69</Index>
+          <InterfaceName>Ethernet4/33/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet128</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>70</Index>
+          <InterfaceName>Ethernet4/34/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet132</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>71</Index>
+          <InterfaceName>Ethernet4/35/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet136</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>72</Index>
+          <InterfaceName>Ethernet4/36/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet140</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>73</Index>
+          <InterfaceName>Ethernet4/37/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet144</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>74</Index>
+          <InterfaceName>Ethernet4/38/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet148</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>75</Index>
+          <InterfaceName>Ethernet4/39/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet152</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>76</Index>
+          <InterfaceName>Ethernet4/40/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet156</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>77</Index>
+          <InterfaceName>Ethernet4/41/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet160</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>78</Index>
+          <InterfaceName>Ethernet4/42/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet164</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>79</Index>
+          <InterfaceName>Ethernet4/43/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet168</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>80</Index>
+          <InterfaceName>Ethernet4/44/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet172</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>81</Index>
+          <InterfaceName>Ethernet4/45/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet176</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>82</Index>
+          <InterfaceName>Ethernet4/46/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet180</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>83</Index>
+          <InterfaceName>Ethernet4/47/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet184</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>84</Index>
+          <InterfaceName>Ethernet4/48/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet188</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>85</Index>
+          <InterfaceName>Ethernet5/1/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet0</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>86</Index>
+          <InterfaceName>Ethernet5/2/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet4</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>87</Index>
+          <InterfaceName>Ethernet5/3/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet8</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>88</Index>
+          <InterfaceName>Ethernet5/4/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet12</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>89</Index>
+          <InterfaceName>Ethernet5/5/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet16</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>90</Index>
+          <InterfaceName>Ethernet5/6/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet20</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>91</Index>
+          <InterfaceName>Ethernet5/7/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet24</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>92</Index>
+          <InterfaceName>Ethernet5/8/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet28</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>93</Index>
+          <InterfaceName>Ethernet5/9/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet32</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>94</Index>
+          <InterfaceName>Ethernet5/10/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet36</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>95</Index>
+          <InterfaceName>Ethernet5/11/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet40</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>96</Index>
+          <InterfaceName>Ethernet5/12/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet44</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>97</Index>
+          <InterfaceName>Ethernet5/13/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet48</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>98</Index>
+          <InterfaceName>Ethernet5/14/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet52</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>99</Index>
+          <InterfaceName>Ethernet5/15/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet56</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>100</Index>
+          <InterfaceName>Ethernet5/16/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet60</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>101</Index>
+          <InterfaceName>Ethernet5/17/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet64</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>102</Index>
+          <InterfaceName>Ethernet5/18/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet68</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>103</Index>
+          <InterfaceName>Ethernet5/19/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet72</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>104</Index>
+          <InterfaceName>Ethernet5/20/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet76</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>105</Index>
+          <InterfaceName>Ethernet5/21/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet80</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>106</Index>
+          <InterfaceName>Ethernet5/22/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet84</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>107</Index>
+          <InterfaceName>Ethernet5/23/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet88</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>108</Index>
+          <InterfaceName>Ethernet5/24/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet92</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>109</Index>
+          <InterfaceName>Ethernet5/25/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet96</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>110</Index>
+          <InterfaceName>Ethernet5/26/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet100</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>111</Index>
+          <InterfaceName>Ethernet5/27/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet104</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>112</Index>
+          <InterfaceName>Ethernet5/28/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet108</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>113</Index>
+          <InterfaceName>Ethernet5/29/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet112</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>114</Index>
+          <InterfaceName>Ethernet5/30/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet116</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>115</Index>
+          <InterfaceName>Ethernet5/31/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet120</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>116</Index>
+          <InterfaceName>Ethernet5/32/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet124</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>117</Index>
+          <InterfaceName>Ethernet5/33/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet128</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>118</Index>
+          <InterfaceName>Ethernet5/34/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet132</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>119</Index>
+          <InterfaceName>Ethernet5/35/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet136</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>120</Index>
+          <InterfaceName>Ethernet5/36/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet140</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>121</Index>
+          <InterfaceName>Ethernet5/37/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet144</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>122</Index>
+          <InterfaceName>Ethernet5/38/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet148</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>123</Index>
+          <InterfaceName>Ethernet5/39/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet152</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>124</Index>
+          <InterfaceName>Ethernet5/40/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet156</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>125</Index>
+          <InterfaceName>Ethernet5/41/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet160</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>126</Index>
+          <InterfaceName>Ethernet5/42/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet164</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>127</Index>
+          <InterfaceName>Ethernet5/43/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet168</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>128</Index>
+          <InterfaceName>Ethernet5/44/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet172</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>129</Index>
+          <InterfaceName>Ethernet5/45/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet176</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>130</Index>
+          <InterfaceName>Ethernet5/46/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet180</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>131</Index>
+          <InterfaceName>Ethernet5/47/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet184</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>132</Index>
+          <InterfaceName>Ethernet5/48/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet188</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>133</Index>
+          <InterfaceName>Ethernet6/1/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet0</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>134</Index>
+          <InterfaceName>Ethernet6/2/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet4</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>135</Index>
+          <InterfaceName>Ethernet6/3/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet8</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>136</Index>
+          <InterfaceName>Ethernet6/4/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet12</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>137</Index>
+          <InterfaceName>Ethernet6/5/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet16</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>138</Index>
+          <InterfaceName>Ethernet6/6/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet20</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>139</Index>
+          <InterfaceName>Ethernet6/7/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet24</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>140</Index>
+          <InterfaceName>Ethernet6/8/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet28</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>141</Index>
+          <InterfaceName>Ethernet6/9/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet32</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>142</Index>
+          <InterfaceName>Ethernet6/10/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet36</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>143</Index>
+          <InterfaceName>Ethernet6/11/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet40</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>144</Index>
+          <InterfaceName>Ethernet6/12/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet44</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>145</Index>
+          <InterfaceName>Ethernet6/13/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet48</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>146</Index>
+          <InterfaceName>Ethernet6/14/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet52</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>147</Index>
+          <InterfaceName>Ethernet6/15/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet56</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>148</Index>
+          <InterfaceName>Ethernet6/16/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet60</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>149</Index>
+          <InterfaceName>Ethernet6/17/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet64</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>150</Index>
+          <InterfaceName>Ethernet6/18/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet68</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>151</Index>
+          <InterfaceName>Ethernet6/19/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet72</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>152</Index>
+          <InterfaceName>Ethernet6/20/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet76</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>153</Index>
+          <InterfaceName>Ethernet6/21/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet80</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>154</Index>
+          <InterfaceName>Ethernet6/22/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet84</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>155</Index>
+          <InterfaceName>Ethernet6/23/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet88</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>156</Index>
+          <InterfaceName>Ethernet6/24/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet92</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>157</Index>
+          <InterfaceName>Ethernet6/25/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet96</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>158</Index>
+          <InterfaceName>Ethernet6/26/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet100</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>159</Index>
+          <InterfaceName>Ethernet6/27/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet104</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>160</Index>
+          <InterfaceName>Ethernet6/28/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet108</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>161</Index>
+          <InterfaceName>Ethernet6/29/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet112</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>162</Index>
+          <InterfaceName>Ethernet6/30/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet116</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>163</Index>
+          <InterfaceName>Ethernet6/31/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet120</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>164</Index>
+          <InterfaceName>Ethernet6/32/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet124</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>165</Index>
+          <InterfaceName>Ethernet6/33/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet128</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>166</Index>
+          <InterfaceName>Ethernet6/34/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet132</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>167</Index>
+          <InterfaceName>Ethernet6/35/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet136</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>168</Index>
+          <InterfaceName>Ethernet6/36/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet140</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>169</Index>
+          <InterfaceName>Ethernet6/37/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet144</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>170</Index>
+          <InterfaceName>Ethernet6/38/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet148</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>171</Index>
+          <InterfaceName>Ethernet6/39/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet152</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>172</Index>
+          <InterfaceName>Ethernet6/40/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet156</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>173</Index>
+          <InterfaceName>Ethernet6/41/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet160</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>174</Index>
+          <InterfaceName>Ethernet6/42/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet164</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>175</Index>
+          <InterfaceName>Ethernet6/43/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet168</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>176</Index>
+          <InterfaceName>Ethernet6/44/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet172</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>177</Index>
+          <InterfaceName>Ethernet6/45/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet176</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>178</Index>
+          <InterfaceName>Ethernet6/46/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet180</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>179</Index>
+          <InterfaceName>Ethernet6/47/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet184</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>180</Index>
+          <InterfaceName>Ethernet6/48/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet188</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>181</Index>
+          <InterfaceName>Ethernet7/1/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet0</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>182</Index>
+          <InterfaceName>Ethernet7/2/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet4</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>183</Index>
+          <InterfaceName>Ethernet7/3/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet8</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>184</Index>
+          <InterfaceName>Ethernet7/4/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet12</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>185</Index>
+          <InterfaceName>Ethernet7/5/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet16</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>186</Index>
+          <InterfaceName>Ethernet7/6/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet20</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>187</Index>
+          <InterfaceName>Ethernet7/7/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet24</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>188</Index>
+          <InterfaceName>Ethernet7/8/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet28</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>189</Index>
+          <InterfaceName>Ethernet7/9/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet32</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>190</Index>
+          <InterfaceName>Ethernet7/10/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet36</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>191</Index>
+          <InterfaceName>Ethernet7/11/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet40</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>192</Index>
+          <InterfaceName>Ethernet7/12/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet44</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>193</Index>
+          <InterfaceName>Ethernet7/13/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet48</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>194</Index>
+          <InterfaceName>Ethernet7/14/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet52</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>195</Index>
+          <InterfaceName>Ethernet7/15/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet56</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>196</Index>
+          <InterfaceName>Ethernet7/16/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet60</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>197</Index>
+          <InterfaceName>Ethernet7/17/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet64</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>198</Index>
+          <InterfaceName>Ethernet7/18/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet68</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>199</Index>
+          <InterfaceName>Ethernet7/19/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet72</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>200</Index>
+          <InterfaceName>Ethernet7/20/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet76</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>201</Index>
+          <InterfaceName>Ethernet7/21/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet80</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>202</Index>
+          <InterfaceName>Ethernet7/22/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet84</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>203</Index>
+          <InterfaceName>Ethernet7/23/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet88</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>204</Index>
+          <InterfaceName>Ethernet7/24/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet92</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>205</Index>
+          <InterfaceName>Ethernet7/25/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet96</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>206</Index>
+          <InterfaceName>Ethernet7/26/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet100</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>207</Index>
+          <InterfaceName>Ethernet7/27/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet104</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>208</Index>
+          <InterfaceName>Ethernet7/28/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet108</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>209</Index>
+          <InterfaceName>Ethernet7/29/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet112</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>210</Index>
+          <InterfaceName>Ethernet7/30/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet116</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>211</Index>
+          <InterfaceName>Ethernet7/31/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet120</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>212</Index>
+          <InterfaceName>Ethernet7/32/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet124</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>213</Index>
+          <InterfaceName>Ethernet7/33/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet128</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>214</Index>
+          <InterfaceName>Ethernet7/34/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet132</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>215</Index>
+          <InterfaceName>Ethernet7/35/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet136</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>216</Index>
+          <InterfaceName>Ethernet7/36/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet140</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>217</Index>
+          <InterfaceName>Ethernet7/37/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet144</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>218</Index>
+          <InterfaceName>Ethernet7/38/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet148</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>219</Index>
+          <InterfaceName>Ethernet7/39/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet152</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>220</Index>
+          <InterfaceName>Ethernet7/40/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet156</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>221</Index>
+          <InterfaceName>Ethernet7/41/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet160</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>222</Index>
+          <InterfaceName>Ethernet7/42/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet164</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>223</Index>
+          <InterfaceName>Ethernet7/43/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet168</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>224</Index>
+          <InterfaceName>Ethernet7/44/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet172</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>225</Index>
+          <InterfaceName>Ethernet7/45/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet176</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>226</Index>
+          <InterfaceName>Ethernet7/46/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet180</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>227</Index>
+          <InterfaceName>Ethernet7/47/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet184</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>228</Index>
+          <InterfaceName>Ethernet7/48/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet188</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>229</Index>
+          <InterfaceName>Ethernet8/1/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet0</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>230</Index>
+          <InterfaceName>Ethernet8/2/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet4</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>231</Index>
+          <InterfaceName>Ethernet8/3/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet8</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>232</Index>
+          <InterfaceName>Ethernet8/4/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet12</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>233</Index>
+          <InterfaceName>Ethernet8/5/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet16</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>234</Index>
+          <InterfaceName>Ethernet8/6/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet20</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>235</Index>
+          <InterfaceName>Ethernet8/7/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet24</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>236</Index>
+          <InterfaceName>Ethernet8/8/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet28</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>237</Index>
+          <InterfaceName>Ethernet8/9/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet32</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>238</Index>
+          <InterfaceName>Ethernet8/10/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet36</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>239</Index>
+          <InterfaceName>Ethernet8/11/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet40</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>240</Index>
+          <InterfaceName>Ethernet8/12/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet44</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>241</Index>
+          <InterfaceName>Ethernet8/13/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet48</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>242</Index>
+          <InterfaceName>Ethernet8/14/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet52</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>243</Index>
+          <InterfaceName>Ethernet8/15/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet56</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>244</Index>
+          <InterfaceName>Ethernet8/16/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet60</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>245</Index>
+          <InterfaceName>Ethernet8/17/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet64</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>246</Index>
+          <InterfaceName>Ethernet8/18/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet68</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>247</Index>
+          <InterfaceName>Ethernet8/19/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet72</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>248</Index>
+          <InterfaceName>Ethernet8/20/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet76</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>249</Index>
+          <InterfaceName>Ethernet8/21/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet80</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>250</Index>
+          <InterfaceName>Ethernet8/22/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet84</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>251</Index>
+          <InterfaceName>Ethernet8/23/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet88</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>252</Index>
+          <InterfaceName>Ethernet8/24/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet92</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>253</Index>
+          <InterfaceName>Ethernet8/25/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet96</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>254</Index>
+          <InterfaceName>Ethernet8/26/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet100</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>255</Index>
+          <InterfaceName>Ethernet8/27/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet104</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>256</Index>
+          <InterfaceName>Ethernet8/28/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet108</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>257</Index>
+          <InterfaceName>Ethernet8/29/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet112</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>258</Index>
+          <InterfaceName>Ethernet8/30/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet116</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>259</Index>
+          <InterfaceName>Ethernet8/31/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet120</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>260</Index>
+          <InterfaceName>Ethernet8/32/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet124</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>261</Index>
+          <InterfaceName>Ethernet8/33/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet128</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>262</Index>
+          <InterfaceName>Ethernet8/34/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet132</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>263</Index>
+          <InterfaceName>Ethernet8/35/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet136</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>264</Index>
+          <InterfaceName>Ethernet8/36/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet140</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>265</Index>
+          <InterfaceName>Ethernet8/37/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet144</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>266</Index>
+          <InterfaceName>Ethernet8/38/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet148</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>267</Index>
+          <InterfaceName>Ethernet8/39/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet152</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>268</Index>
+          <InterfaceName>Ethernet8/40/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet156</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>269</Index>
+          <InterfaceName>Ethernet8/41/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet160</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>270</Index>
+          <InterfaceName>Ethernet8/42/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet164</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>271</Index>
+          <InterfaceName>Ethernet8/43/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet168</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>272</Index>
+          <InterfaceName>Ethernet8/44/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet172</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>273</Index>
+          <InterfaceName>Ethernet8/45/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet176</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>274</Index>
+          <InterfaceName>Ethernet8/46/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet180</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>275</Index>
+          <InterfaceName>Ethernet8/47/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet184</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>276</Index>
+          <InterfaceName>Ethernet8/48/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet188</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>277</Index>
+          <InterfaceName>Ethernet9/1/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet0</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>278</Index>
+          <InterfaceName>Ethernet9/2/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet4</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>279</Index>
+          <InterfaceName>Ethernet9/3/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet8</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>280</Index>
+          <InterfaceName>Ethernet9/4/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet12</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>281</Index>
+          <InterfaceName>Ethernet9/5/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet16</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>282</Index>
+          <InterfaceName>Ethernet9/6/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet20</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>283</Index>
+          <InterfaceName>Ethernet9/7/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet24</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>284</Index>
+          <InterfaceName>Ethernet9/8/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet28</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>285</Index>
+          <InterfaceName>Ethernet9/9/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet32</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>286</Index>
+          <InterfaceName>Ethernet9/10/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet36</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>287</Index>
+          <InterfaceName>Ethernet9/11/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet40</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>288</Index>
+          <InterfaceName>Ethernet9/12/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet44</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>289</Index>
+          <InterfaceName>Ethernet9/13/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet48</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>290</Index>
+          <InterfaceName>Ethernet9/14/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet52</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>291</Index>
+          <InterfaceName>Ethernet9/15/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet56</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>292</Index>
+          <InterfaceName>Ethernet9/16/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet60</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>293</Index>
+          <InterfaceName>Ethernet9/17/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet64</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>294</Index>
+          <InterfaceName>Ethernet9/18/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet68</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>295</Index>
+          <InterfaceName>Ethernet9/19/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet72</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>296</Index>
+          <InterfaceName>Ethernet9/20/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet76</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>297</Index>
+          <InterfaceName>Ethernet9/21/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet80</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>298</Index>
+          <InterfaceName>Ethernet9/22/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet84</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>299</Index>
+          <InterfaceName>Ethernet9/23/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet88</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>300</Index>
+          <InterfaceName>Ethernet9/24/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet92</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>301</Index>
+          <InterfaceName>Ethernet9/25/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet96</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>302</Index>
+          <InterfaceName>Ethernet9/26/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet100</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>303</Index>
+          <InterfaceName>Ethernet9/27/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet104</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>304</Index>
+          <InterfaceName>Ethernet9/28/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet108</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>305</Index>
+          <InterfaceName>Ethernet9/29/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet112</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>306</Index>
+          <InterfaceName>Ethernet9/30/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet116</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>307</Index>
+          <InterfaceName>Ethernet9/31/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet120</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>308</Index>
+          <InterfaceName>Ethernet9/32/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet124</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>309</Index>
+          <InterfaceName>Ethernet9/33/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet128</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>310</Index>
+          <InterfaceName>Ethernet9/34/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet132</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>311</Index>
+          <InterfaceName>Ethernet9/35/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet136</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>312</Index>
+          <InterfaceName>Ethernet9/36/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet140</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>313</Index>
+          <InterfaceName>Ethernet9/37/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet144</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>314</Index>
+          <InterfaceName>Ethernet9/38/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet148</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>315</Index>
+          <InterfaceName>Ethernet9/39/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet152</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>316</Index>
+          <InterfaceName>Ethernet9/40/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet156</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>317</Index>
+          <InterfaceName>Ethernet9/41/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet160</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>318</Index>
+          <InterfaceName>Ethernet9/42/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet164</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>319</Index>
+          <InterfaceName>Ethernet9/43/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet168</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>320</Index>
+          <InterfaceName>Ethernet9/44/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet172</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>321</Index>
+          <InterfaceName>Ethernet9/45/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet176</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>322</Index>
+          <InterfaceName>Ethernet9/46/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet180</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>323</Index>
+          <InterfaceName>Ethernet9/47/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet184</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>324</Index>
+          <InterfaceName>Ethernet9/48/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet188</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>325</Index>
+          <InterfaceName>Ethernet10/1/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet0</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>326</Index>
+          <InterfaceName>Ethernet10/2/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet4</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>327</Index>
+          <InterfaceName>Ethernet10/3/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet8</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>328</Index>
+          <InterfaceName>Ethernet10/4/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet12</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>329</Index>
+          <InterfaceName>Ethernet10/5/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet16</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>330</Index>
+          <InterfaceName>Ethernet10/6/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet20</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>331</Index>
+          <InterfaceName>Ethernet10/7/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet24</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>332</Index>
+          <InterfaceName>Ethernet10/8/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet28</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>333</Index>
+          <InterfaceName>Ethernet10/9/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet32</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>334</Index>
+          <InterfaceName>Ethernet10/10/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet36</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>335</Index>
+          <InterfaceName>Ethernet10/11/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet40</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>336</Index>
+          <InterfaceName>Ethernet10/12/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet44</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>337</Index>
+          <InterfaceName>Ethernet10/13/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet48</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>338</Index>
+          <InterfaceName>Ethernet10/14/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet52</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>339</Index>
+          <InterfaceName>Ethernet10/15/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet56</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>340</Index>
+          <InterfaceName>Ethernet10/16/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet60</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>341</Index>
+          <InterfaceName>Ethernet10/17/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet64</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>342</Index>
+          <InterfaceName>Ethernet10/18/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet68</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>343</Index>
+          <InterfaceName>Ethernet10/19/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet72</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>344</Index>
+          <InterfaceName>Ethernet10/20/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet76</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>345</Index>
+          <InterfaceName>Ethernet10/21/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet80</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>346</Index>
+          <InterfaceName>Ethernet10/22/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet84</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>347</Index>
+          <InterfaceName>Ethernet10/23/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet88</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>348</Index>
+          <InterfaceName>Ethernet10/24/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet92</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>349</Index>
+          <InterfaceName>Ethernet10/25/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet96</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>350</Index>
+          <InterfaceName>Ethernet10/26/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet100</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>351</Index>
+          <InterfaceName>Ethernet10/27/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet104</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>352</Index>
+          <InterfaceName>Ethernet10/28/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet108</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>353</Index>
+          <InterfaceName>Ethernet10/29/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet112</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>354</Index>
+          <InterfaceName>Ethernet10/30/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet116</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>355</Index>
+          <InterfaceName>Ethernet10/31/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet120</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>356</Index>
+          <InterfaceName>Ethernet10/32/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet124</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>357</Index>
+          <InterfaceName>Ethernet10/33/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet128</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>358</Index>
+          <InterfaceName>Ethernet10/34/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet132</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>359</Index>
+          <InterfaceName>Ethernet10/35/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet136</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>360</Index>
+          <InterfaceName>Ethernet10/36/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet140</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>361</Index>
+          <InterfaceName>Ethernet10/37/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet144</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>362</Index>
+          <InterfaceName>Ethernet10/38/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet148</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>363</Index>
+          <InterfaceName>Ethernet10/39/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet152</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>364</Index>
+          <InterfaceName>Ethernet10/40/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet156</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>365</Index>
+          <InterfaceName>Ethernet10/41/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet160</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>366</Index>
+          <InterfaceName>Ethernet10/42/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet164</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>367</Index>
+          <InterfaceName>Ethernet10/43/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet168</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>368</Index>
+          <InterfaceName>Ethernet10/44/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet172</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>369</Index>
+          <InterfaceName>Ethernet10/45/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet176</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>370</Index>
+          <InterfaceName>Ethernet10/46/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet180</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>371</Index>
+          <InterfaceName>Ethernet10/47/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet184</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>372</Index>
+          <InterfaceName>Ethernet10/48/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet188</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+      </EthernetInterfaces>
+      <FlowControl>true</FlowControl>
+      <Height>0</Height>
+      <HwSku>Sonic-Chassis-sku</HwSku>
+      <InfinibandInterfaces xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+      <InterfaceMetadata xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution">
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet3/1/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet3/2/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet3/3/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet3/4/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet3/5/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet3/6/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet3/7/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet3/8/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet3/9/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet3/10/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet3/11/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>11</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:11</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>11</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet3/12/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet3/13/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>13</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:13</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>13</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet3/14/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>14</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:14</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>14</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet3/15/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>15</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:15</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>15</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet3/16/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet3/17/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>17</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:17</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>17</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet3/18/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>18</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:18</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>18</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet3/19/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>19</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:19</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet3/20/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet3/21/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>21</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:21</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet3/22/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>22</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:22</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet3/23/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>23</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:23</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet3/24/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet3/25/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>25</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:25</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet3/26/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>26</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:26</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet3/27/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>27</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:27</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet3/28/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet3/29/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>29</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:29</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>11</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet3/30/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>30</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:30</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet3/31/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>31</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:31</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>13</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet3/32/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>14</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet3/33/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>33</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:33</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>15</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet3/34/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>34</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:34</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet3/35/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>35</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:35</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>17</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet3/36/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>18</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>cpu3/0</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>37</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:37</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>19</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>cpu3/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>37</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:37</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>19</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Recirc3/0/0</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>38</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:38</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Recirc3/1/0</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>38</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:38</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Recirc3/0/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>39</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:39</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>19</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Recirc3/1/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-400g-lc-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>39</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:39</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>19</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet4/1/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet4/2/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet4/3/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet4/4/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet4/5/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet4/6/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet4/7/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet4/8/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet4/9/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet4/10/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet4/11/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>11</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:11</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>11</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet4/12/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet4/13/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>13</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:13</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>13</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet4/14/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>14</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:14</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>14</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet4/15/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>15</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:15</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>15</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet4/16/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet4/17/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>17</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:17</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>17</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet4/18/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>18</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:18</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>18</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet4/19/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>19</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:19</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>19</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet4/20/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet4/21/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>21</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:21</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>21</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet4/22/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>22</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:22</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>22</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet4/23/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>23</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:23</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>23</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet4/24/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet4/25/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>25</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:25</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>25</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet4/26/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>26</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:26</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>26</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet4/27/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>27</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:27</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>27</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet4/28/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet4/29/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>29</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:29</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>29</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet4/30/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>30</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:30</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>30</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet4/31/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>31</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:31</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>31</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet4/32/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet4/33/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>33</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:33</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>33</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet4/34/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>34</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:34</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>34</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet4/35/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>35</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:35</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>35</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet4/36/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet4/37/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>37</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:37</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>37</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet4/38/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>38</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:38</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>38</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet4/39/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>39</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:39</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>39</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet4/40/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>40</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:40</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>40</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet4/41/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>41</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:41</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>41</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet4/42/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>42</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:42</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>42</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet4/43/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>43</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:43</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>43</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet4/44/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>44</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:44</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>44</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet4/45/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>45</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:45</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>45</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet4/46/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>46</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:46</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>46</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet4/47/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>47</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:47</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>47</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet4/48/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>48</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:48</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>48</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>cpu4/0</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>49</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:49</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>49</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Recirc4/0/0</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>50</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:50</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>50</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Recirc4/0/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>51</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:51</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>51</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet5/1/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:5:0:1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet5/2/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:5:0:2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet5/3/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:5:0:3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet5/4/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:5:0:4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet5/5/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:5:0:5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet5/6/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:5:0:6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet5/7/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:5:0:7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet5/8/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:5:0:8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet5/9/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:5:0:9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet5/10/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:5:0:10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet5/11/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>11</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:5:0:11</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>11</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet5/12/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:5:0:12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet5/13/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>13</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:5:0:13</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>13</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet5/14/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>14</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:5:0:14</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>14</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet5/15/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>15</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:5:0:15</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>15</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet5/16/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:5:0:16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet5/17/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>17</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:5:0:17</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>17</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet5/18/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>18</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:5:0:18</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>18</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet5/19/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>19</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:5:0:19</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>19</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet5/20/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:5:0:20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet5/21/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>21</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:5:0:21</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>21</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet5/22/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>22</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:5:0:22</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>22</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet5/23/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>23</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:5:0:23</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>23</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet5/24/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:5:0:24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet5/25/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>25</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:5:0:25</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>25</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet5/26/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>26</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:5:0:26</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>26</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet5/27/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>27</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:5:0:27</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>27</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet5/28/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:5:0:28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet5/29/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>29</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:5:0:29</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>29</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet5/30/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>30</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:5:0:30</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>30</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet5/31/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>31</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:5:0:31</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>31</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet5/32/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:5:0:32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet5/33/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>33</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:5:0:33</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>33</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet5/34/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>34</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:5:0:34</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>34</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet5/35/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>35</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:5:0:35</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>35</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet5/36/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:5:0:36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet5/37/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>37</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:5:0:37</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>37</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet5/38/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>38</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:5:0:38</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>38</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet5/39/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>39</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:5:0:39</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>39</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet5/40/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>40</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:5:0:40</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>40</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet5/41/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>41</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:5:0:41</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>41</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet5/42/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>42</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:5:0:42</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>42</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet5/43/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>43</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:5:0:43</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>43</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet5/44/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>44</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:5:0:44</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>44</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet5/45/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>45</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:5:0:45</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>45</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet5/46/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>46</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:5:0:46</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>46</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet5/47/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>47</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:5:0:47</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>47</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet5/48/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>48</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:5:0:48</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>48</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>cpu5/0</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>49</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:5:0:49</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>49</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Recirc5/0/0</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>50</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:5:0:50</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>50</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Recirc5/0/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>51</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:5:0:51</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>51</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet6/1/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:6:0:1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet6/2/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:6:0:2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet6/3/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:6:0:3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet6/4/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:6:0:4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet6/5/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:6:0:5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet6/6/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:6:0:6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet6/7/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:6:0:7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet6/8/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:6:0:8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet6/9/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:6:0:9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet6/10/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:6:0:10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet6/11/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>11</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:6:0:11</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>11</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet6/12/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:6:0:12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet6/13/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>13</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:6:0:13</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>13</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet6/14/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>14</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:6:0:14</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>14</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet6/15/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>15</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:6:0:15</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>15</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet6/16/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:6:0:16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet6/17/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>17</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:6:0:17</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>17</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet6/18/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>18</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:6:0:18</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>18</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet6/19/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>19</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:6:0:19</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>19</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet6/20/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:6:0:20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet6/21/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>21</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:6:0:21</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>21</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet6/22/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>22</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:6:0:22</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>22</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet6/23/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>23</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:6:0:23</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>23</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet6/24/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:6:0:24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet6/25/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>25</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:6:0:25</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>25</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet6/26/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>26</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:6:0:26</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>26</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet6/27/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>27</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:6:0:27</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>27</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet6/28/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:6:0:28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet6/29/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>29</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:6:0:29</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>29</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet6/30/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>30</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:6:0:30</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>30</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet6/31/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>31</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:6:0:31</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>31</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet6/32/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:6:0:32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet6/33/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>33</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:6:0:33</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>33</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet6/34/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>34</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:6:0:34</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>34</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet6/35/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>35</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:6:0:35</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>35</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet6/36/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:6:0:36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet6/37/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>37</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:6:0:37</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>37</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet6/38/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>38</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:6:0:38</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>38</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet6/39/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>39</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:6:0:39</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>39</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet6/40/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>40</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:6:0:40</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>40</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet6/41/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>41</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:6:0:41</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>41</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet6/42/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>42</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:6:0:42</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>42</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet6/43/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>43</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:6:0:43</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>43</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet6/44/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>44</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:6:0:44</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>44</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet6/45/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>45</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:6:0:45</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>45</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet6/46/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>46</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:6:0:46</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>46</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet6/47/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>47</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:6:0:47</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>47</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet6/48/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>48</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:6:0:48</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>48</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>cpu6/0</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>49</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:6:0:49</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>49</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Recirc6/0/0</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>50</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:6:0:50</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>50</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Recirc6/0/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>51</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:6:0:51</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>51</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet7/1/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:7:0:1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet7/2/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:7:0:2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet7/3/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:7:0:3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet7/4/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:7:0:4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet7/5/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:7:0:5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet7/6/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:7:0:6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet7/7/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:7:0:7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet7/8/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:7:0:8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet7/9/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:7:0:9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet7/10/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:7:0:10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet7/11/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>11</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:7:0:11</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>11</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet7/12/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:7:0:12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet7/13/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>13</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:7:0:13</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>13</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet7/14/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>14</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:7:0:14</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>14</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet7/15/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>15</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:7:0:15</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>15</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet7/16/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:7:0:16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet7/17/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>17</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:7:0:17</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>17</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet7/18/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>18</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:7:0:18</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>18</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet7/19/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>19</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:7:0:19</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>19</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet7/20/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:7:0:20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet7/21/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>21</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:7:0:21</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>21</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet7/22/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>22</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:7:0:22</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>22</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet7/23/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>23</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:7:0:23</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>23</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet7/24/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:7:0:24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet7/25/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>25</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:7:0:25</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>25</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet7/26/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>26</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:7:0:26</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>26</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet7/27/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>27</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:7:0:27</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>27</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet7/28/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:7:0:28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet7/29/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>29</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:7:0:29</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>29</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet7/30/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>30</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:7:0:30</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>30</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet7/31/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>31</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:7:0:31</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>31</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet7/32/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:7:0:32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet7/33/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>33</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:7:0:33</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>33</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet7/34/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>34</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:7:0:34</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>34</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet7/35/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>35</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:7:0:35</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>35</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet7/36/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:7:0:36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet7/37/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>37</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:7:0:37</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>37</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet7/38/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>38</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:7:0:38</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>38</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet7/39/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>39</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:7:0:39</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>39</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet7/40/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>40</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:7:0:40</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>40</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet7/41/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>41</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:7:0:41</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>41</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet7/42/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>42</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:7:0:42</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>42</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet7/43/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>43</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:7:0:43</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>43</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet7/44/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>44</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:7:0:44</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>44</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet7/45/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>45</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:7:0:45</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>45</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet7/46/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>46</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:7:0:46</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>46</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet7/47/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>47</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:7:0:47</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>47</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet7/48/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>48</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:7:0:48</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>48</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>cpu7/0</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>49</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:7:0:49</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>49</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Recirc7/0/0</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>50</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:7:0:50</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>50</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Recirc7/0/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>51</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:7:0:51</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>51</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet8/1/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:8:0:1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet8/2/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:8:0:2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet8/3/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:8:0:3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet8/4/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:8:0:4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet8/5/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:8:0:5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet8/6/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:8:0:6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet8/7/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:8:0:7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet8/8/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:8:0:8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet8/9/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:8:0:9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet8/10/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:8:0:10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet8/11/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>11</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:8:0:11</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>11</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet8/12/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:8:0:12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet8/13/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>13</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:8:0:13</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>13</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet8/14/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>14</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:8:0:14</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>14</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet8/15/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>15</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:8:0:15</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>15</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet8/16/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:8:0:16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet8/17/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>17</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:8:0:17</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>17</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet8/18/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>18</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:8:0:18</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>18</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet8/19/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>19</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:8:0:19</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>19</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet8/20/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:8:0:20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet8/21/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>21</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:8:0:21</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>21</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet8/22/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>22</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:8:0:22</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>22</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet8/23/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>23</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:8:0:23</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>23</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet8/24/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:8:0:24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet8/25/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>25</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:8:0:25</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>25</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet8/26/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>26</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:8:0:26</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>26</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet8/27/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>27</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:8:0:27</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>27</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet8/28/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:8:0:28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet8/29/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>29</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:8:0:29</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>29</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet8/30/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>30</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:8:0:30</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>30</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet8/31/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>31</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:8:0:31</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>31</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet8/32/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:8:0:32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet8/33/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>33</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:8:0:33</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>33</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet8/34/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>34</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:8:0:34</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>34</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet8/35/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>35</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:8:0:35</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>35</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet8/36/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:8:0:36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet8/37/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>37</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:8:0:37</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>37</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet8/38/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>38</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:8:0:38</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>38</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet8/39/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>39</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:8:0:39</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>39</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet8/40/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>40</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:8:0:40</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>40</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet8/41/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>41</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:8:0:41</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>41</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet8/42/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>42</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:8:0:42</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>42</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet8/43/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>43</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:8:0:43</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>43</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet8/44/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>44</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:8:0:44</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>44</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet8/45/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>45</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:8:0:45</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>45</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet8/46/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>46</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:8:0:46</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>46</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet8/47/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>47</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:8:0:47</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>47</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet8/48/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>48</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:8:0:48</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>48</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>cpu8/0</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>49</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:8:0:49</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>49</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Recirc8/0/0</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>50</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:8:0:50</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>50</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Recirc8/0/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>51</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:8:0:51</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>51</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet9/1/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:9:0:1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet9/2/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:9:0:2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet9/3/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:9:0:3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet9/4/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:9:0:4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet9/5/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:9:0:5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet9/6/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:9:0:6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet9/7/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:9:0:7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet9/8/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:9:0:8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet9/9/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:9:0:9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet9/10/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:9:0:10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet9/11/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>11</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:9:0:11</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>11</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet9/12/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:9:0:12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet9/13/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>13</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:9:0:13</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>13</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet9/14/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>14</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:9:0:14</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>14</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet9/15/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>15</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:9:0:15</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>15</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet9/16/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:9:0:16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet9/17/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>17</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:9:0:17</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>17</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet9/18/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>18</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:9:0:18</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>18</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet9/19/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>19</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:9:0:19</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>19</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet9/20/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:9:0:20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet9/21/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>21</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:9:0:21</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>21</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet9/22/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>22</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:9:0:22</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>22</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet9/23/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>23</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:9:0:23</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>23</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet9/24/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:9:0:24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet9/25/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>25</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:9:0:25</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>25</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet9/26/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>26</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:9:0:26</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>26</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet9/27/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>27</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:9:0:27</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>27</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet9/28/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:9:0:28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet9/29/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>29</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:9:0:29</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>29</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet9/30/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>30</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:9:0:30</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>30</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet9/31/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>31</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:9:0:31</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>31</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet9/32/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:9:0:32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet9/33/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>33</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:9:0:33</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>33</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet9/34/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>34</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:9:0:34</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>34</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet9/35/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>35</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:9:0:35</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>35</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet9/36/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:9:0:36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet9/37/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>37</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:9:0:37</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>37</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet9/38/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>38</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:9:0:38</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>38</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet9/39/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>39</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:9:0:39</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>39</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet9/40/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>40</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:9:0:40</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>40</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet9/41/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>41</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:9:0:41</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>41</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet9/42/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>42</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:9:0:42</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>42</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet9/43/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>43</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:9:0:43</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>43</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet9/44/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>44</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:9:0:44</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>44</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet9/45/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>45</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:9:0:45</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>45</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet9/46/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>46</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:9:0:46</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>46</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet9/47/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>47</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:9:0:47</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>47</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet9/48/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>48</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:9:0:48</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>48</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet10/1/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:10:0:1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet10/2/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:10:0:2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet10/3/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:10:0:3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet10/4/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:10:0:4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet10/5/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:10:0:5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet10/6/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:10:0:6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet10/7/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:10:0:7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet10/8/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:10:0:8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet10/9/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:10:0:9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet10/10/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:10:0:10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet10/11/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>11</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:10:0:11</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>11</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet10/12/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:10:0:12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet10/13/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>13</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:10:0:13</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>13</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet10/14/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>14</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:10:0:14</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>14</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet10/15/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>15</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:10:0:15</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>15</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet10/16/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:10:0:16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet10/17/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>17</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:10:0:17</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>17</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet10/18/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>18</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:10:0:18</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>18</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet10/19/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>19</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:10:0:19</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>19</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet10/20/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:10:0:20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet10/21/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>21</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:10:0:21</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>21</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet10/22/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>22</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:10:0:22</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>22</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet10/23/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>23</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:10:0:23</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>23</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet10/24/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:10:0:24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet10/25/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>25</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:10:0:25</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>25</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet10/26/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>26</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:10:0:26</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>26</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet10/27/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>27</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:10:0:27</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>27</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet10/28/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:10:0:28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet10/29/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>29</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:10:0:29</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>29</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet10/30/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>30</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:10:0:30</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>30</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet10/31/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>31</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:10:0:31</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>31</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet10/32/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:10:0:32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet10/33/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>33</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:10:0:33</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>33</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet10/34/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>34</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:10:0:34</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>34</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet10/35/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>35</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:10:0:35</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>35</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet10/36/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:10:0:36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet10/37/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>37</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:10:0:37</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>37</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet10/38/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>38</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:10:0:38</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>38</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet10/39/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>39</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:10:0:39</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>39</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet10/40/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>40</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:10:0:40</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>40</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet10/41/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>41</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:10:0:41</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>41</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet10/42/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>42</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:10:0:42</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>42</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet10/43/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>43</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:10:0:43</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>43</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet10/44/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>44</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:10:0:44</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>44</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet10/45/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>45</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:10:0:45</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>45</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet10/46/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>46</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:10:0:46</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>46</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet10/47/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>47</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:10:0:47</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>47</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet10/48/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>48</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:10:0:48</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>48</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>cpu10/0</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>49</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:10:0:49</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>49</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Recirc10/0/0</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>50</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:10:0:50</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>50</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Recirc10/0/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-lc-100g-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>51</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:10:0:51</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>51</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+      </InterfaceMetadata>
+      <ManagementInterfaces xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution">
+        <a:ManagementInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>Management1/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>1000</Speed>
+        </a:ManagementInterface>
+      </ManagementInterfaces>
+      <OpticalInterfaces xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution">
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>Ethernet3/1/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>2</Index>
+          <InterfaceName>Ethernet3/1/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>3</Index>
+          <InterfaceName>Ethernet3/1/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>4</Index>
+          <InterfaceName>Ethernet3/2/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>5</Index>
+          <InterfaceName>Ethernet3/2/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>6</Index>
+          <InterfaceName>Ethernet3/2/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>7</Index>
+          <InterfaceName>Ethernet3/3/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>8</Index>
+          <InterfaceName>Ethernet3/3/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>9</Index>
+          <InterfaceName>Ethernet3/3/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>10</Index>
+          <InterfaceName>Ethernet3/4/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>11</Index>
+          <InterfaceName>Ethernet3/4/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>12</Index>
+          <InterfaceName>Ethernet3/4/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>13</Index>
+          <InterfaceName>Ethernet3/5/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>14</Index>
+          <InterfaceName>Ethernet3/5/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>15</Index>
+          <InterfaceName>Ethernet3/5/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>16</Index>
+          <InterfaceName>Ethernet3/6/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>17</Index>
+          <InterfaceName>Ethernet3/6/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>18</Index>
+          <InterfaceName>Ethernet3/6/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>19</Index>
+          <InterfaceName>Ethernet3/7/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>20</Index>
+          <InterfaceName>Ethernet3/7/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>21</Index>
+          <InterfaceName>Ethernet3/7/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>22</Index>
+          <InterfaceName>Ethernet3/8/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>23</Index>
+          <InterfaceName>Ethernet3/8/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>24</Index>
+          <InterfaceName>Ethernet3/8/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>25</Index>
+          <InterfaceName>Ethernet3/9/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>26</Index>
+          <InterfaceName>Ethernet3/9/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>27</Index>
+          <InterfaceName>Ethernet3/9/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>28</Index>
+          <InterfaceName>Ethernet3/10/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>29</Index>
+          <InterfaceName>Ethernet3/10/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>30</Index>
+          <InterfaceName>Ethernet3/10/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>31</Index>
+          <InterfaceName>Ethernet3/11/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>32</Index>
+          <InterfaceName>Ethernet3/11/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>33</Index>
+          <InterfaceName>Ethernet3/11/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>34</Index>
+          <InterfaceName>Ethernet3/12/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>35</Index>
+          <InterfaceName>Ethernet3/12/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>36</Index>
+          <InterfaceName>Ethernet3/12/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>37</Index>
+          <InterfaceName>Ethernet3/13/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>38</Index>
+          <InterfaceName>Ethernet3/13/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>39</Index>
+          <InterfaceName>Ethernet3/13/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>40</Index>
+          <InterfaceName>Ethernet3/14/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>41</Index>
+          <InterfaceName>Ethernet3/14/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>42</Index>
+          <InterfaceName>Ethernet3/14/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>43</Index>
+          <InterfaceName>Ethernet3/15/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>44</Index>
+          <InterfaceName>Ethernet3/15/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>45</Index>
+          <InterfaceName>Ethernet3/15/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>46</Index>
+          <InterfaceName>Ethernet3/16/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>47</Index>
+          <InterfaceName>Ethernet3/16/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>48</Index>
+          <InterfaceName>Ethernet3/16/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>49</Index>
+          <InterfaceName>Ethernet3/17/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>50</Index>
+          <InterfaceName>Ethernet3/17/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>51</Index>
+          <InterfaceName>Ethernet3/17/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>52</Index>
+          <InterfaceName>Ethernet3/18/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>53</Index>
+          <InterfaceName>Ethernet3/18/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>54</Index>
+          <InterfaceName>Ethernet3/18/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>55</Index>
+          <InterfaceName>Ethernet3/19/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>56</Index>
+          <InterfaceName>Ethernet3/19/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>57</Index>
+          <InterfaceName>Ethernet3/19/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>58</Index>
+          <InterfaceName>Ethernet3/20/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>59</Index>
+          <InterfaceName>Ethernet3/20/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>60</Index>
+          <InterfaceName>Ethernet3/20/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>61</Index>
+          <InterfaceName>Ethernet3/21/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>62</Index>
+          <InterfaceName>Ethernet3/21/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>63</Index>
+          <InterfaceName>Ethernet3/21/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>64</Index>
+          <InterfaceName>Ethernet3/22/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>65</Index>
+          <InterfaceName>Ethernet3/22/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>66</Index>
+          <InterfaceName>Ethernet3/22/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>67</Index>
+          <InterfaceName>Ethernet3/23/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>68</Index>
+          <InterfaceName>Ethernet3/23/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>69</Index>
+          <InterfaceName>Ethernet3/23/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>70</Index>
+          <InterfaceName>Ethernet3/24/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>71</Index>
+          <InterfaceName>Ethernet3/24/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>72</Index>
+          <InterfaceName>Ethernet3/24/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>73</Index>
+          <InterfaceName>Ethernet3/25/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>74</Index>
+          <InterfaceName>Ethernet3/25/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>75</Index>
+          <InterfaceName>Ethernet3/25/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>76</Index>
+          <InterfaceName>Ethernet3/26/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>77</Index>
+          <InterfaceName>Ethernet3/26/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>78</Index>
+          <InterfaceName>Ethernet3/26/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>79</Index>
+          <InterfaceName>Ethernet3/27/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>80</Index>
+          <InterfaceName>Ethernet3/27/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>81</Index>
+          <InterfaceName>Ethernet3/27/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>82</Index>
+          <InterfaceName>Ethernet3/28/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>83</Index>
+          <InterfaceName>Ethernet3/28/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>84</Index>
+          <InterfaceName>Ethernet3/28/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>85</Index>
+          <InterfaceName>Ethernet3/29/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>86</Index>
+          <InterfaceName>Ethernet3/29/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>87</Index>
+          <InterfaceName>Ethernet3/29/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>88</Index>
+          <InterfaceName>Ethernet3/30/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>89</Index>
+          <InterfaceName>Ethernet3/30/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>90</Index>
+          <InterfaceName>Ethernet3/30/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>91</Index>
+          <InterfaceName>Ethernet3/31/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>92</Index>
+          <InterfaceName>Ethernet3/31/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>93</Index>
+          <InterfaceName>Ethernet3/31/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>94</Index>
+          <InterfaceName>Ethernet3/32/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>95</Index>
+          <InterfaceName>Ethernet3/32/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>96</Index>
+          <InterfaceName>Ethernet3/32/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>97</Index>
+          <InterfaceName>Ethernet3/33/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>98</Index>
+          <InterfaceName>Ethernet3/33/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>99</Index>
+          <InterfaceName>Ethernet3/33/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>100</Index>
+          <InterfaceName>Ethernet3/34/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>101</Index>
+          <InterfaceName>Ethernet3/34/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>102</Index>
+          <InterfaceName>Ethernet3/34/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>103</Index>
+          <InterfaceName>Ethernet3/35/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>104</Index>
+          <InterfaceName>Ethernet3/35/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>105</Index>
+          <InterfaceName>Ethernet3/35/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>106</Index>
+          <InterfaceName>Ethernet3/36/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>107</Index>
+          <InterfaceName>Ethernet3/36/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>108</Index>
+          <InterfaceName>Ethernet3/36/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>109</Index>
+          <InterfaceName>Ethernet4/1/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>110</Index>
+          <InterfaceName>Ethernet4/1/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>111</Index>
+          <InterfaceName>Ethernet4/1/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>112</Index>
+          <InterfaceName>Ethernet4/2/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>113</Index>
+          <InterfaceName>Ethernet4/2/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>114</Index>
+          <InterfaceName>Ethernet4/2/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>115</Index>
+          <InterfaceName>Ethernet4/3/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>116</Index>
+          <InterfaceName>Ethernet4/3/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>117</Index>
+          <InterfaceName>Ethernet4/3/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>118</Index>
+          <InterfaceName>Ethernet4/4/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>119</Index>
+          <InterfaceName>Ethernet4/4/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>120</Index>
+          <InterfaceName>Ethernet4/4/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>121</Index>
+          <InterfaceName>Ethernet4/5/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>122</Index>
+          <InterfaceName>Ethernet4/5/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>123</Index>
+          <InterfaceName>Ethernet4/5/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>124</Index>
+          <InterfaceName>Ethernet4/6/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>125</Index>
+          <InterfaceName>Ethernet4/6/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>126</Index>
+          <InterfaceName>Ethernet4/6/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>127</Index>
+          <InterfaceName>Ethernet4/7/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>128</Index>
+          <InterfaceName>Ethernet4/7/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>129</Index>
+          <InterfaceName>Ethernet4/7/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>130</Index>
+          <InterfaceName>Ethernet4/8/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>131</Index>
+          <InterfaceName>Ethernet4/8/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>132</Index>
+          <InterfaceName>Ethernet4/8/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>133</Index>
+          <InterfaceName>Ethernet4/9/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>134</Index>
+          <InterfaceName>Ethernet4/9/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>135</Index>
+          <InterfaceName>Ethernet4/9/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>136</Index>
+          <InterfaceName>Ethernet4/10/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>137</Index>
+          <InterfaceName>Ethernet4/10/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>138</Index>
+          <InterfaceName>Ethernet4/10/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>139</Index>
+          <InterfaceName>Ethernet4/11/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>140</Index>
+          <InterfaceName>Ethernet4/11/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>141</Index>
+          <InterfaceName>Ethernet4/11/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>142</Index>
+          <InterfaceName>Ethernet4/12/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>143</Index>
+          <InterfaceName>Ethernet4/12/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>144</Index>
+          <InterfaceName>Ethernet4/12/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>145</Index>
+          <InterfaceName>Ethernet4/13/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>146</Index>
+          <InterfaceName>Ethernet4/13/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>147</Index>
+          <InterfaceName>Ethernet4/13/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>148</Index>
+          <InterfaceName>Ethernet4/14/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>149</Index>
+          <InterfaceName>Ethernet4/14/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>150</Index>
+          <InterfaceName>Ethernet4/14/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>151</Index>
+          <InterfaceName>Ethernet4/15/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>152</Index>
+          <InterfaceName>Ethernet4/15/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>153</Index>
+          <InterfaceName>Ethernet4/15/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>154</Index>
+          <InterfaceName>Ethernet4/16/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>155</Index>
+          <InterfaceName>Ethernet4/16/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>156</Index>
+          <InterfaceName>Ethernet4/16/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>157</Index>
+          <InterfaceName>Ethernet4/17/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>158</Index>
+          <InterfaceName>Ethernet4/17/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>159</Index>
+          <InterfaceName>Ethernet4/17/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>160</Index>
+          <InterfaceName>Ethernet4/18/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>161</Index>
+          <InterfaceName>Ethernet4/18/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>162</Index>
+          <InterfaceName>Ethernet4/18/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>163</Index>
+          <InterfaceName>Ethernet4/19/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>164</Index>
+          <InterfaceName>Ethernet4/19/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>165</Index>
+          <InterfaceName>Ethernet4/19/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>166</Index>
+          <InterfaceName>Ethernet4/20/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>167</Index>
+          <InterfaceName>Ethernet4/20/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>168</Index>
+          <InterfaceName>Ethernet4/20/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>169</Index>
+          <InterfaceName>Ethernet4/21/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>170</Index>
+          <InterfaceName>Ethernet4/21/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>171</Index>
+          <InterfaceName>Ethernet4/21/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>172</Index>
+          <InterfaceName>Ethernet4/22/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>173</Index>
+          <InterfaceName>Ethernet4/22/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>174</Index>
+          <InterfaceName>Ethernet4/22/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>175</Index>
+          <InterfaceName>Ethernet4/23/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>176</Index>
+          <InterfaceName>Ethernet4/23/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>177</Index>
+          <InterfaceName>Ethernet4/23/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>178</Index>
+          <InterfaceName>Ethernet4/24/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>179</Index>
+          <InterfaceName>Ethernet4/24/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>180</Index>
+          <InterfaceName>Ethernet4/24/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>181</Index>
+          <InterfaceName>Ethernet4/25/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>182</Index>
+          <InterfaceName>Ethernet4/25/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>183</Index>
+          <InterfaceName>Ethernet4/25/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>184</Index>
+          <InterfaceName>Ethernet4/26/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>185</Index>
+          <InterfaceName>Ethernet4/26/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>186</Index>
+          <InterfaceName>Ethernet4/26/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>187</Index>
+          <InterfaceName>Ethernet4/27/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>188</Index>
+          <InterfaceName>Ethernet4/27/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>189</Index>
+          <InterfaceName>Ethernet4/27/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>190</Index>
+          <InterfaceName>Ethernet4/28/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>191</Index>
+          <InterfaceName>Ethernet4/28/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>192</Index>
+          <InterfaceName>Ethernet4/28/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>193</Index>
+          <InterfaceName>Ethernet4/29/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>194</Index>
+          <InterfaceName>Ethernet4/29/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>195</Index>
+          <InterfaceName>Ethernet4/29/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>196</Index>
+          <InterfaceName>Ethernet4/30/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>197</Index>
+          <InterfaceName>Ethernet4/30/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>198</Index>
+          <InterfaceName>Ethernet4/30/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>199</Index>
+          <InterfaceName>Ethernet4/31/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>200</Index>
+          <InterfaceName>Ethernet4/31/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>201</Index>
+          <InterfaceName>Ethernet4/31/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>202</Index>
+          <InterfaceName>Ethernet4/32/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>203</Index>
+          <InterfaceName>Ethernet4/32/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>204</Index>
+          <InterfaceName>Ethernet4/32/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>205</Index>
+          <InterfaceName>Ethernet4/33/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>206</Index>
+          <InterfaceName>Ethernet4/33/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>207</Index>
+          <InterfaceName>Ethernet4/33/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>208</Index>
+          <InterfaceName>Ethernet4/34/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>209</Index>
+          <InterfaceName>Ethernet4/34/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>210</Index>
+          <InterfaceName>Ethernet4/34/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>211</Index>
+          <InterfaceName>Ethernet4/35/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>212</Index>
+          <InterfaceName>Ethernet4/35/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>213</Index>
+          <InterfaceName>Ethernet4/35/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>214</Index>
+          <InterfaceName>Ethernet4/36/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>215</Index>
+          <InterfaceName>Ethernet4/36/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>216</Index>
+          <InterfaceName>Ethernet4/36/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>217</Index>
+          <InterfaceName>Ethernet4/37/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>218</Index>
+          <InterfaceName>Ethernet4/37/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>219</Index>
+          <InterfaceName>Ethernet4/37/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>220</Index>
+          <InterfaceName>Ethernet4/38/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>221</Index>
+          <InterfaceName>Ethernet4/38/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>222</Index>
+          <InterfaceName>Ethernet4/38/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>223</Index>
+          <InterfaceName>Ethernet4/39/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>224</Index>
+          <InterfaceName>Ethernet4/39/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>225</Index>
+          <InterfaceName>Ethernet4/39/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>226</Index>
+          <InterfaceName>Ethernet4/40/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>227</Index>
+          <InterfaceName>Ethernet4/40/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>228</Index>
+          <InterfaceName>Ethernet4/40/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>229</Index>
+          <InterfaceName>Ethernet4/41/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>230</Index>
+          <InterfaceName>Ethernet4/41/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>231</Index>
+          <InterfaceName>Ethernet4/41/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>232</Index>
+          <InterfaceName>Ethernet4/42/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>233</Index>
+          <InterfaceName>Ethernet4/42/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>234</Index>
+          <InterfaceName>Ethernet4/42/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>235</Index>
+          <InterfaceName>Ethernet4/43/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>236</Index>
+          <InterfaceName>Ethernet4/43/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>237</Index>
+          <InterfaceName>Ethernet4/43/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>238</Index>
+          <InterfaceName>Ethernet4/44/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>239</Index>
+          <InterfaceName>Ethernet4/44/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>240</Index>
+          <InterfaceName>Ethernet4/44/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>241</Index>
+          <InterfaceName>Ethernet4/45/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>242</Index>
+          <InterfaceName>Ethernet4/45/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>243</Index>
+          <InterfaceName>Ethernet4/45/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>244</Index>
+          <InterfaceName>Ethernet4/46/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>245</Index>
+          <InterfaceName>Ethernet4/46/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>246</Index>
+          <InterfaceName>Ethernet4/46/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>247</Index>
+          <InterfaceName>Ethernet4/47/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>248</Index>
+          <InterfaceName>Ethernet4/47/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>249</Index>
+          <InterfaceName>Ethernet4/47/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>250</Index>
+          <InterfaceName>Ethernet4/48/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>251</Index>
+          <InterfaceName>Ethernet4/48/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>252</Index>
+          <InterfaceName>Ethernet4/48/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>253</Index>
+          <InterfaceName>Ethernet5/1/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>254</Index>
+          <InterfaceName>Ethernet5/1/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>255</Index>
+          <InterfaceName>Ethernet5/1/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>256</Index>
+          <InterfaceName>Ethernet5/2/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>257</Index>
+          <InterfaceName>Ethernet5/2/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>258</Index>
+          <InterfaceName>Ethernet5/2/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>259</Index>
+          <InterfaceName>Ethernet5/3/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>260</Index>
+          <InterfaceName>Ethernet5/3/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>261</Index>
+          <InterfaceName>Ethernet5/3/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>262</Index>
+          <InterfaceName>Ethernet5/4/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>263</Index>
+          <InterfaceName>Ethernet5/4/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>264</Index>
+          <InterfaceName>Ethernet5/4/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>265</Index>
+          <InterfaceName>Ethernet5/5/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>266</Index>
+          <InterfaceName>Ethernet5/5/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>267</Index>
+          <InterfaceName>Ethernet5/5/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>268</Index>
+          <InterfaceName>Ethernet5/6/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>269</Index>
+          <InterfaceName>Ethernet5/6/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>270</Index>
+          <InterfaceName>Ethernet5/6/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>271</Index>
+          <InterfaceName>Ethernet5/7/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>272</Index>
+          <InterfaceName>Ethernet5/7/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>273</Index>
+          <InterfaceName>Ethernet5/7/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>274</Index>
+          <InterfaceName>Ethernet5/8/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>275</Index>
+          <InterfaceName>Ethernet5/8/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>276</Index>
+          <InterfaceName>Ethernet5/8/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>277</Index>
+          <InterfaceName>Ethernet5/9/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>278</Index>
+          <InterfaceName>Ethernet5/9/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>279</Index>
+          <InterfaceName>Ethernet5/9/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>280</Index>
+          <InterfaceName>Ethernet5/10/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>281</Index>
+          <InterfaceName>Ethernet5/10/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>282</Index>
+          <InterfaceName>Ethernet5/10/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>283</Index>
+          <InterfaceName>Ethernet5/11/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>284</Index>
+          <InterfaceName>Ethernet5/11/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>285</Index>
+          <InterfaceName>Ethernet5/11/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>286</Index>
+          <InterfaceName>Ethernet5/12/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>287</Index>
+          <InterfaceName>Ethernet5/12/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>288</Index>
+          <InterfaceName>Ethernet5/12/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>289</Index>
+          <InterfaceName>Ethernet5/13/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>290</Index>
+          <InterfaceName>Ethernet5/13/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>291</Index>
+          <InterfaceName>Ethernet5/13/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>292</Index>
+          <InterfaceName>Ethernet5/14/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>293</Index>
+          <InterfaceName>Ethernet5/14/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>294</Index>
+          <InterfaceName>Ethernet5/14/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>295</Index>
+          <InterfaceName>Ethernet5/15/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>296</Index>
+          <InterfaceName>Ethernet5/15/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>297</Index>
+          <InterfaceName>Ethernet5/15/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>298</Index>
+          <InterfaceName>Ethernet5/16/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>299</Index>
+          <InterfaceName>Ethernet5/16/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>300</Index>
+          <InterfaceName>Ethernet5/16/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>301</Index>
+          <InterfaceName>Ethernet5/17/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>302</Index>
+          <InterfaceName>Ethernet5/17/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>303</Index>
+          <InterfaceName>Ethernet5/17/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>304</Index>
+          <InterfaceName>Ethernet5/18/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>305</Index>
+          <InterfaceName>Ethernet5/18/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>306</Index>
+          <InterfaceName>Ethernet5/18/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>307</Index>
+          <InterfaceName>Ethernet5/19/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>308</Index>
+          <InterfaceName>Ethernet5/19/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>309</Index>
+          <InterfaceName>Ethernet5/19/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>310</Index>
+          <InterfaceName>Ethernet5/20/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>311</Index>
+          <InterfaceName>Ethernet5/20/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>312</Index>
+          <InterfaceName>Ethernet5/20/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>313</Index>
+          <InterfaceName>Ethernet5/21/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>314</Index>
+          <InterfaceName>Ethernet5/21/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>315</Index>
+          <InterfaceName>Ethernet5/21/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>316</Index>
+          <InterfaceName>Ethernet5/22/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>317</Index>
+          <InterfaceName>Ethernet5/22/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>318</Index>
+          <InterfaceName>Ethernet5/22/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>319</Index>
+          <InterfaceName>Ethernet5/23/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>320</Index>
+          <InterfaceName>Ethernet5/23/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>321</Index>
+          <InterfaceName>Ethernet5/23/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>322</Index>
+          <InterfaceName>Ethernet5/24/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>323</Index>
+          <InterfaceName>Ethernet5/24/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>324</Index>
+          <InterfaceName>Ethernet5/24/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>325</Index>
+          <InterfaceName>Ethernet5/25/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>326</Index>
+          <InterfaceName>Ethernet5/25/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>327</Index>
+          <InterfaceName>Ethernet5/25/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>328</Index>
+          <InterfaceName>Ethernet5/26/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>329</Index>
+          <InterfaceName>Ethernet5/26/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>330</Index>
+          <InterfaceName>Ethernet5/26/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>331</Index>
+          <InterfaceName>Ethernet5/27/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>332</Index>
+          <InterfaceName>Ethernet5/27/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>333</Index>
+          <InterfaceName>Ethernet5/27/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>334</Index>
+          <InterfaceName>Ethernet5/28/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>335</Index>
+          <InterfaceName>Ethernet5/28/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>336</Index>
+          <InterfaceName>Ethernet5/28/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>337</Index>
+          <InterfaceName>Ethernet5/29/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>338</Index>
+          <InterfaceName>Ethernet5/29/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>339</Index>
+          <InterfaceName>Ethernet5/29/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>340</Index>
+          <InterfaceName>Ethernet5/30/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>341</Index>
+          <InterfaceName>Ethernet5/30/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>342</Index>
+          <InterfaceName>Ethernet5/30/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>343</Index>
+          <InterfaceName>Ethernet5/31/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>344</Index>
+          <InterfaceName>Ethernet5/31/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>345</Index>
+          <InterfaceName>Ethernet5/31/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>346</Index>
+          <InterfaceName>Ethernet5/32/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>347</Index>
+          <InterfaceName>Ethernet5/32/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>348</Index>
+          <InterfaceName>Ethernet5/32/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>349</Index>
+          <InterfaceName>Ethernet5/33/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>350</Index>
+          <InterfaceName>Ethernet5/33/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>351</Index>
+          <InterfaceName>Ethernet5/33/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>352</Index>
+          <InterfaceName>Ethernet5/34/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>353</Index>
+          <InterfaceName>Ethernet5/34/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>354</Index>
+          <InterfaceName>Ethernet5/34/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>355</Index>
+          <InterfaceName>Ethernet5/35/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>356</Index>
+          <InterfaceName>Ethernet5/35/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>357</Index>
+          <InterfaceName>Ethernet5/35/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>358</Index>
+          <InterfaceName>Ethernet5/36/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>359</Index>
+          <InterfaceName>Ethernet5/36/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>360</Index>
+          <InterfaceName>Ethernet5/36/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>361</Index>
+          <InterfaceName>Ethernet5/37/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>362</Index>
+          <InterfaceName>Ethernet5/37/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>363</Index>
+          <InterfaceName>Ethernet5/37/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>364</Index>
+          <InterfaceName>Ethernet5/38/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>365</Index>
+          <InterfaceName>Ethernet5/38/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>366</Index>
+          <InterfaceName>Ethernet5/38/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>367</Index>
+          <InterfaceName>Ethernet5/39/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>368</Index>
+          <InterfaceName>Ethernet5/39/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>369</Index>
+          <InterfaceName>Ethernet5/39/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>370</Index>
+          <InterfaceName>Ethernet5/40/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>371</Index>
+          <InterfaceName>Ethernet5/40/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>372</Index>
+          <InterfaceName>Ethernet5/40/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>373</Index>
+          <InterfaceName>Ethernet5/41/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>374</Index>
+          <InterfaceName>Ethernet5/41/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>375</Index>
+          <InterfaceName>Ethernet5/41/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>376</Index>
+          <InterfaceName>Ethernet5/42/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>377</Index>
+          <InterfaceName>Ethernet5/42/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>378</Index>
+          <InterfaceName>Ethernet5/42/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>379</Index>
+          <InterfaceName>Ethernet5/43/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>380</Index>
+          <InterfaceName>Ethernet5/43/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>381</Index>
+          <InterfaceName>Ethernet5/43/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>382</Index>
+          <InterfaceName>Ethernet5/44/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>383</Index>
+          <InterfaceName>Ethernet5/44/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>384</Index>
+          <InterfaceName>Ethernet5/44/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>385</Index>
+          <InterfaceName>Ethernet5/45/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>386</Index>
+          <InterfaceName>Ethernet5/45/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>387</Index>
+          <InterfaceName>Ethernet5/45/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>388</Index>
+          <InterfaceName>Ethernet5/46/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>389</Index>
+          <InterfaceName>Ethernet5/46/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>390</Index>
+          <InterfaceName>Ethernet5/46/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>391</Index>
+          <InterfaceName>Ethernet5/47/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>392</Index>
+          <InterfaceName>Ethernet5/47/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>393</Index>
+          <InterfaceName>Ethernet5/47/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>394</Index>
+          <InterfaceName>Ethernet5/48/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>395</Index>
+          <InterfaceName>Ethernet5/48/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>396</Index>
+          <InterfaceName>Ethernet5/48/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>397</Index>
+          <InterfaceName>Ethernet6/1/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>398</Index>
+          <InterfaceName>Ethernet6/1/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>399</Index>
+          <InterfaceName>Ethernet6/1/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>400</Index>
+          <InterfaceName>Ethernet6/2/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>401</Index>
+          <InterfaceName>Ethernet6/2/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>402</Index>
+          <InterfaceName>Ethernet6/2/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>403</Index>
+          <InterfaceName>Ethernet6/3/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>404</Index>
+          <InterfaceName>Ethernet6/3/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>405</Index>
+          <InterfaceName>Ethernet6/3/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>406</Index>
+          <InterfaceName>Ethernet6/4/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>407</Index>
+          <InterfaceName>Ethernet6/4/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>408</Index>
+          <InterfaceName>Ethernet6/4/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>409</Index>
+          <InterfaceName>Ethernet6/5/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>410</Index>
+          <InterfaceName>Ethernet6/5/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>411</Index>
+          <InterfaceName>Ethernet6/5/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>412</Index>
+          <InterfaceName>Ethernet6/6/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>413</Index>
+          <InterfaceName>Ethernet6/6/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>414</Index>
+          <InterfaceName>Ethernet6/6/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>415</Index>
+          <InterfaceName>Ethernet6/7/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>416</Index>
+          <InterfaceName>Ethernet6/7/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>417</Index>
+          <InterfaceName>Ethernet6/7/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>418</Index>
+          <InterfaceName>Ethernet6/8/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>419</Index>
+          <InterfaceName>Ethernet6/8/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>420</Index>
+          <InterfaceName>Ethernet6/8/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>421</Index>
+          <InterfaceName>Ethernet6/9/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>422</Index>
+          <InterfaceName>Ethernet6/9/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>423</Index>
+          <InterfaceName>Ethernet6/9/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>424</Index>
+          <InterfaceName>Ethernet6/10/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>425</Index>
+          <InterfaceName>Ethernet6/10/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>426</Index>
+          <InterfaceName>Ethernet6/10/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>427</Index>
+          <InterfaceName>Ethernet6/11/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>428</Index>
+          <InterfaceName>Ethernet6/11/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>429</Index>
+          <InterfaceName>Ethernet6/11/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>430</Index>
+          <InterfaceName>Ethernet6/12/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>431</Index>
+          <InterfaceName>Ethernet6/12/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>432</Index>
+          <InterfaceName>Ethernet6/12/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>433</Index>
+          <InterfaceName>Ethernet6/13/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>434</Index>
+          <InterfaceName>Ethernet6/13/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>435</Index>
+          <InterfaceName>Ethernet6/13/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>436</Index>
+          <InterfaceName>Ethernet6/14/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>437</Index>
+          <InterfaceName>Ethernet6/14/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>438</Index>
+          <InterfaceName>Ethernet6/14/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>439</Index>
+          <InterfaceName>Ethernet6/15/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>440</Index>
+          <InterfaceName>Ethernet6/15/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>441</Index>
+          <InterfaceName>Ethernet6/15/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>442</Index>
+          <InterfaceName>Ethernet6/16/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>443</Index>
+          <InterfaceName>Ethernet6/16/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>444</Index>
+          <InterfaceName>Ethernet6/16/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>445</Index>
+          <InterfaceName>Ethernet6/17/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>446</Index>
+          <InterfaceName>Ethernet6/17/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>447</Index>
+          <InterfaceName>Ethernet6/17/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>448</Index>
+          <InterfaceName>Ethernet6/18/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>449</Index>
+          <InterfaceName>Ethernet6/18/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>450</Index>
+          <InterfaceName>Ethernet6/18/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>451</Index>
+          <InterfaceName>Ethernet6/19/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>452</Index>
+          <InterfaceName>Ethernet6/19/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>453</Index>
+          <InterfaceName>Ethernet6/19/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>454</Index>
+          <InterfaceName>Ethernet6/20/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>455</Index>
+          <InterfaceName>Ethernet6/20/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>456</Index>
+          <InterfaceName>Ethernet6/20/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>457</Index>
+          <InterfaceName>Ethernet6/21/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>458</Index>
+          <InterfaceName>Ethernet6/21/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>459</Index>
+          <InterfaceName>Ethernet6/21/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>460</Index>
+          <InterfaceName>Ethernet6/22/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>461</Index>
+          <InterfaceName>Ethernet6/22/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>462</Index>
+          <InterfaceName>Ethernet6/22/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>463</Index>
+          <InterfaceName>Ethernet6/23/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>464</Index>
+          <InterfaceName>Ethernet6/23/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>465</Index>
+          <InterfaceName>Ethernet6/23/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>466</Index>
+          <InterfaceName>Ethernet6/24/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>467</Index>
+          <InterfaceName>Ethernet6/24/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>468</Index>
+          <InterfaceName>Ethernet6/24/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>469</Index>
+          <InterfaceName>Ethernet6/25/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>470</Index>
+          <InterfaceName>Ethernet6/25/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>471</Index>
+          <InterfaceName>Ethernet6/25/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>472</Index>
+          <InterfaceName>Ethernet6/26/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>473</Index>
+          <InterfaceName>Ethernet6/26/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>474</Index>
+          <InterfaceName>Ethernet6/26/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>475</Index>
+          <InterfaceName>Ethernet6/27/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>476</Index>
+          <InterfaceName>Ethernet6/27/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>477</Index>
+          <InterfaceName>Ethernet6/27/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>478</Index>
+          <InterfaceName>Ethernet6/28/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>479</Index>
+          <InterfaceName>Ethernet6/28/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>480</Index>
+          <InterfaceName>Ethernet6/28/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>481</Index>
+          <InterfaceName>Ethernet6/29/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>482</Index>
+          <InterfaceName>Ethernet6/29/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>483</Index>
+          <InterfaceName>Ethernet6/29/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>484</Index>
+          <InterfaceName>Ethernet6/30/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>485</Index>
+          <InterfaceName>Ethernet6/30/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>486</Index>
+          <InterfaceName>Ethernet6/30/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>487</Index>
+          <InterfaceName>Ethernet6/31/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>488</Index>
+          <InterfaceName>Ethernet6/31/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>489</Index>
+          <InterfaceName>Ethernet6/31/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>490</Index>
+          <InterfaceName>Ethernet6/32/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>491</Index>
+          <InterfaceName>Ethernet6/32/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>492</Index>
+          <InterfaceName>Ethernet6/32/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>493</Index>
+          <InterfaceName>Ethernet6/33/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>494</Index>
+          <InterfaceName>Ethernet6/33/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>495</Index>
+          <InterfaceName>Ethernet6/33/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>496</Index>
+          <InterfaceName>Ethernet6/34/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>497</Index>
+          <InterfaceName>Ethernet6/34/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>498</Index>
+          <InterfaceName>Ethernet6/34/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>499</Index>
+          <InterfaceName>Ethernet6/35/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>500</Index>
+          <InterfaceName>Ethernet6/35/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>501</Index>
+          <InterfaceName>Ethernet6/35/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>502</Index>
+          <InterfaceName>Ethernet6/36/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>503</Index>
+          <InterfaceName>Ethernet6/36/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>504</Index>
+          <InterfaceName>Ethernet6/36/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>505</Index>
+          <InterfaceName>Ethernet6/37/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>506</Index>
+          <InterfaceName>Ethernet6/37/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>507</Index>
+          <InterfaceName>Ethernet6/37/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>508</Index>
+          <InterfaceName>Ethernet6/38/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>509</Index>
+          <InterfaceName>Ethernet6/38/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>510</Index>
+          <InterfaceName>Ethernet6/38/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>511</Index>
+          <InterfaceName>Ethernet6/39/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>512</Index>
+          <InterfaceName>Ethernet6/39/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>513</Index>
+          <InterfaceName>Ethernet6/39/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>514</Index>
+          <InterfaceName>Ethernet6/40/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>515</Index>
+          <InterfaceName>Ethernet6/40/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>516</Index>
+          <InterfaceName>Ethernet6/40/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>517</Index>
+          <InterfaceName>Ethernet6/41/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>518</Index>
+          <InterfaceName>Ethernet6/41/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>519</Index>
+          <InterfaceName>Ethernet6/41/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>520</Index>
+          <InterfaceName>Ethernet6/42/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>521</Index>
+          <InterfaceName>Ethernet6/42/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>522</Index>
+          <InterfaceName>Ethernet6/42/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>523</Index>
+          <InterfaceName>Ethernet6/43/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>524</Index>
+          <InterfaceName>Ethernet6/43/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>525</Index>
+          <InterfaceName>Ethernet6/43/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>526</Index>
+          <InterfaceName>Ethernet6/44/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>527</Index>
+          <InterfaceName>Ethernet6/44/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>528</Index>
+          <InterfaceName>Ethernet6/44/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>529</Index>
+          <InterfaceName>Ethernet6/45/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>530</Index>
+          <InterfaceName>Ethernet6/45/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>531</Index>
+          <InterfaceName>Ethernet6/45/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>532</Index>
+          <InterfaceName>Ethernet6/46/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>533</Index>
+          <InterfaceName>Ethernet6/46/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>534</Index>
+          <InterfaceName>Ethernet6/46/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>535</Index>
+          <InterfaceName>Ethernet6/47/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>536</Index>
+          <InterfaceName>Ethernet6/47/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>537</Index>
+          <InterfaceName>Ethernet6/47/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>538</Index>
+          <InterfaceName>Ethernet6/48/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>539</Index>
+          <InterfaceName>Ethernet6/48/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>540</Index>
+          <InterfaceName>Ethernet6/48/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>541</Index>
+          <InterfaceName>Ethernet7/1/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>542</Index>
+          <InterfaceName>Ethernet7/1/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>543</Index>
+          <InterfaceName>Ethernet7/1/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>544</Index>
+          <InterfaceName>Ethernet7/2/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>545</Index>
+          <InterfaceName>Ethernet7/2/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>546</Index>
+          <InterfaceName>Ethernet7/2/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>547</Index>
+          <InterfaceName>Ethernet7/3/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>548</Index>
+          <InterfaceName>Ethernet7/3/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>549</Index>
+          <InterfaceName>Ethernet7/3/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>550</Index>
+          <InterfaceName>Ethernet7/4/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>551</Index>
+          <InterfaceName>Ethernet7/4/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>552</Index>
+          <InterfaceName>Ethernet7/4/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>553</Index>
+          <InterfaceName>Ethernet7/5/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>554</Index>
+          <InterfaceName>Ethernet7/5/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>555</Index>
+          <InterfaceName>Ethernet7/5/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>556</Index>
+          <InterfaceName>Ethernet7/6/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>557</Index>
+          <InterfaceName>Ethernet7/6/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>558</Index>
+          <InterfaceName>Ethernet7/6/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>559</Index>
+          <InterfaceName>Ethernet7/7/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>560</Index>
+          <InterfaceName>Ethernet7/7/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>561</Index>
+          <InterfaceName>Ethernet7/7/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>562</Index>
+          <InterfaceName>Ethernet7/8/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>563</Index>
+          <InterfaceName>Ethernet7/8/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>564</Index>
+          <InterfaceName>Ethernet7/8/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>565</Index>
+          <InterfaceName>Ethernet7/9/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>566</Index>
+          <InterfaceName>Ethernet7/9/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>567</Index>
+          <InterfaceName>Ethernet7/9/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>568</Index>
+          <InterfaceName>Ethernet7/10/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>569</Index>
+          <InterfaceName>Ethernet7/10/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>570</Index>
+          <InterfaceName>Ethernet7/10/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>571</Index>
+          <InterfaceName>Ethernet7/11/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>572</Index>
+          <InterfaceName>Ethernet7/11/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>573</Index>
+          <InterfaceName>Ethernet7/11/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>574</Index>
+          <InterfaceName>Ethernet7/12/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>575</Index>
+          <InterfaceName>Ethernet7/12/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>576</Index>
+          <InterfaceName>Ethernet7/12/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>577</Index>
+          <InterfaceName>Ethernet7/13/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>578</Index>
+          <InterfaceName>Ethernet7/13/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>579</Index>
+          <InterfaceName>Ethernet7/13/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>580</Index>
+          <InterfaceName>Ethernet7/14/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>581</Index>
+          <InterfaceName>Ethernet7/14/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>582</Index>
+          <InterfaceName>Ethernet7/14/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>583</Index>
+          <InterfaceName>Ethernet7/15/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>584</Index>
+          <InterfaceName>Ethernet7/15/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>585</Index>
+          <InterfaceName>Ethernet7/15/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>586</Index>
+          <InterfaceName>Ethernet7/16/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>587</Index>
+          <InterfaceName>Ethernet7/16/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>588</Index>
+          <InterfaceName>Ethernet7/16/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>589</Index>
+          <InterfaceName>Ethernet7/17/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>590</Index>
+          <InterfaceName>Ethernet7/17/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>591</Index>
+          <InterfaceName>Ethernet7/17/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>592</Index>
+          <InterfaceName>Ethernet7/18/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>593</Index>
+          <InterfaceName>Ethernet7/18/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>594</Index>
+          <InterfaceName>Ethernet7/18/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>595</Index>
+          <InterfaceName>Ethernet7/19/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>596</Index>
+          <InterfaceName>Ethernet7/19/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>597</Index>
+          <InterfaceName>Ethernet7/19/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>598</Index>
+          <InterfaceName>Ethernet7/20/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>599</Index>
+          <InterfaceName>Ethernet7/20/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>600</Index>
+          <InterfaceName>Ethernet7/20/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>601</Index>
+          <InterfaceName>Ethernet7/21/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>602</Index>
+          <InterfaceName>Ethernet7/21/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>603</Index>
+          <InterfaceName>Ethernet7/21/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>604</Index>
+          <InterfaceName>Ethernet7/22/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>605</Index>
+          <InterfaceName>Ethernet7/22/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>606</Index>
+          <InterfaceName>Ethernet7/22/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>607</Index>
+          <InterfaceName>Ethernet7/23/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>608</Index>
+          <InterfaceName>Ethernet7/23/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>609</Index>
+          <InterfaceName>Ethernet7/23/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>610</Index>
+          <InterfaceName>Ethernet7/24/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>611</Index>
+          <InterfaceName>Ethernet7/24/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>612</Index>
+          <InterfaceName>Ethernet7/24/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>613</Index>
+          <InterfaceName>Ethernet7/25/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>614</Index>
+          <InterfaceName>Ethernet7/25/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>615</Index>
+          <InterfaceName>Ethernet7/25/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>616</Index>
+          <InterfaceName>Ethernet7/26/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>617</Index>
+          <InterfaceName>Ethernet7/26/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>618</Index>
+          <InterfaceName>Ethernet7/26/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>619</Index>
+          <InterfaceName>Ethernet7/27/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>620</Index>
+          <InterfaceName>Ethernet7/27/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>621</Index>
+          <InterfaceName>Ethernet7/27/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>622</Index>
+          <InterfaceName>Ethernet7/28/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>623</Index>
+          <InterfaceName>Ethernet7/28/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>624</Index>
+          <InterfaceName>Ethernet7/28/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>625</Index>
+          <InterfaceName>Ethernet7/29/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>626</Index>
+          <InterfaceName>Ethernet7/29/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>627</Index>
+          <InterfaceName>Ethernet7/29/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>628</Index>
+          <InterfaceName>Ethernet7/30/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>629</Index>
+          <InterfaceName>Ethernet7/30/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>630</Index>
+          <InterfaceName>Ethernet7/30/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>631</Index>
+          <InterfaceName>Ethernet7/31/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>632</Index>
+          <InterfaceName>Ethernet7/31/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>633</Index>
+          <InterfaceName>Ethernet7/31/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>634</Index>
+          <InterfaceName>Ethernet7/32/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>635</Index>
+          <InterfaceName>Ethernet7/32/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>636</Index>
+          <InterfaceName>Ethernet7/32/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>637</Index>
+          <InterfaceName>Ethernet7/33/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>638</Index>
+          <InterfaceName>Ethernet7/33/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>639</Index>
+          <InterfaceName>Ethernet7/33/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>640</Index>
+          <InterfaceName>Ethernet7/34/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>641</Index>
+          <InterfaceName>Ethernet7/34/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>642</Index>
+          <InterfaceName>Ethernet7/34/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>643</Index>
+          <InterfaceName>Ethernet7/35/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>644</Index>
+          <InterfaceName>Ethernet7/35/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>645</Index>
+          <InterfaceName>Ethernet7/35/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>646</Index>
+          <InterfaceName>Ethernet7/36/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>647</Index>
+          <InterfaceName>Ethernet7/36/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>648</Index>
+          <InterfaceName>Ethernet7/36/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>649</Index>
+          <InterfaceName>Ethernet7/37/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>650</Index>
+          <InterfaceName>Ethernet7/37/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>651</Index>
+          <InterfaceName>Ethernet7/37/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>652</Index>
+          <InterfaceName>Ethernet7/38/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>653</Index>
+          <InterfaceName>Ethernet7/38/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>654</Index>
+          <InterfaceName>Ethernet7/38/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>655</Index>
+          <InterfaceName>Ethernet7/39/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>656</Index>
+          <InterfaceName>Ethernet7/39/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>657</Index>
+          <InterfaceName>Ethernet7/39/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>658</Index>
+          <InterfaceName>Ethernet7/40/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>659</Index>
+          <InterfaceName>Ethernet7/40/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>660</Index>
+          <InterfaceName>Ethernet7/40/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>661</Index>
+          <InterfaceName>Ethernet7/41/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>662</Index>
+          <InterfaceName>Ethernet7/41/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>663</Index>
+          <InterfaceName>Ethernet7/41/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>664</Index>
+          <InterfaceName>Ethernet7/42/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>665</Index>
+          <InterfaceName>Ethernet7/42/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>666</Index>
+          <InterfaceName>Ethernet7/42/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>667</Index>
+          <InterfaceName>Ethernet7/43/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>668</Index>
+          <InterfaceName>Ethernet7/43/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>669</Index>
+          <InterfaceName>Ethernet7/43/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>670</Index>
+          <InterfaceName>Ethernet7/44/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>671</Index>
+          <InterfaceName>Ethernet7/44/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>672</Index>
+          <InterfaceName>Ethernet7/44/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>673</Index>
+          <InterfaceName>Ethernet7/45/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>674</Index>
+          <InterfaceName>Ethernet7/45/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>675</Index>
+          <InterfaceName>Ethernet7/45/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>676</Index>
+          <InterfaceName>Ethernet7/46/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>677</Index>
+          <InterfaceName>Ethernet7/46/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>678</Index>
+          <InterfaceName>Ethernet7/46/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>679</Index>
+          <InterfaceName>Ethernet7/47/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>680</Index>
+          <InterfaceName>Ethernet7/47/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>681</Index>
+          <InterfaceName>Ethernet7/47/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>682</Index>
+          <InterfaceName>Ethernet7/48/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>683</Index>
+          <InterfaceName>Ethernet7/48/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>684</Index>
+          <InterfaceName>Ethernet7/48/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>685</Index>
+          <InterfaceName>Ethernet8/1/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>686</Index>
+          <InterfaceName>Ethernet8/1/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>687</Index>
+          <InterfaceName>Ethernet8/1/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>688</Index>
+          <InterfaceName>Ethernet8/2/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>689</Index>
+          <InterfaceName>Ethernet8/2/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>690</Index>
+          <InterfaceName>Ethernet8/2/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>691</Index>
+          <InterfaceName>Ethernet8/3/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>692</Index>
+          <InterfaceName>Ethernet8/3/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>693</Index>
+          <InterfaceName>Ethernet8/3/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>694</Index>
+          <InterfaceName>Ethernet8/4/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>695</Index>
+          <InterfaceName>Ethernet8/4/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>696</Index>
+          <InterfaceName>Ethernet8/4/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>697</Index>
+          <InterfaceName>Ethernet8/5/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>698</Index>
+          <InterfaceName>Ethernet8/5/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>699</Index>
+          <InterfaceName>Ethernet8/5/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>700</Index>
+          <InterfaceName>Ethernet8/6/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>701</Index>
+          <InterfaceName>Ethernet8/6/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>702</Index>
+          <InterfaceName>Ethernet8/6/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>703</Index>
+          <InterfaceName>Ethernet8/7/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>704</Index>
+          <InterfaceName>Ethernet8/7/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>705</Index>
+          <InterfaceName>Ethernet8/7/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>706</Index>
+          <InterfaceName>Ethernet8/8/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>707</Index>
+          <InterfaceName>Ethernet8/8/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>708</Index>
+          <InterfaceName>Ethernet8/8/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>709</Index>
+          <InterfaceName>Ethernet8/9/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>710</Index>
+          <InterfaceName>Ethernet8/9/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>711</Index>
+          <InterfaceName>Ethernet8/9/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>712</Index>
+          <InterfaceName>Ethernet8/10/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>713</Index>
+          <InterfaceName>Ethernet8/10/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>714</Index>
+          <InterfaceName>Ethernet8/10/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>715</Index>
+          <InterfaceName>Ethernet8/11/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>716</Index>
+          <InterfaceName>Ethernet8/11/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>717</Index>
+          <InterfaceName>Ethernet8/11/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>718</Index>
+          <InterfaceName>Ethernet8/12/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>719</Index>
+          <InterfaceName>Ethernet8/12/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>720</Index>
+          <InterfaceName>Ethernet8/12/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>721</Index>
+          <InterfaceName>Ethernet8/13/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>722</Index>
+          <InterfaceName>Ethernet8/13/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>723</Index>
+          <InterfaceName>Ethernet8/13/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>724</Index>
+          <InterfaceName>Ethernet8/14/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>725</Index>
+          <InterfaceName>Ethernet8/14/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>726</Index>
+          <InterfaceName>Ethernet8/14/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>727</Index>
+          <InterfaceName>Ethernet8/15/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>728</Index>
+          <InterfaceName>Ethernet8/15/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>729</Index>
+          <InterfaceName>Ethernet8/15/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>730</Index>
+          <InterfaceName>Ethernet8/16/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>731</Index>
+          <InterfaceName>Ethernet8/16/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>732</Index>
+          <InterfaceName>Ethernet8/16/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>733</Index>
+          <InterfaceName>Ethernet8/17/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>734</Index>
+          <InterfaceName>Ethernet8/17/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>735</Index>
+          <InterfaceName>Ethernet8/17/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>736</Index>
+          <InterfaceName>Ethernet8/18/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>737</Index>
+          <InterfaceName>Ethernet8/18/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>738</Index>
+          <InterfaceName>Ethernet8/18/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>739</Index>
+          <InterfaceName>Ethernet8/19/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>740</Index>
+          <InterfaceName>Ethernet8/19/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>741</Index>
+          <InterfaceName>Ethernet8/19/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>742</Index>
+          <InterfaceName>Ethernet8/20/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>743</Index>
+          <InterfaceName>Ethernet8/20/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>744</Index>
+          <InterfaceName>Ethernet8/20/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>745</Index>
+          <InterfaceName>Ethernet8/21/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>746</Index>
+          <InterfaceName>Ethernet8/21/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>747</Index>
+          <InterfaceName>Ethernet8/21/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>748</Index>
+          <InterfaceName>Ethernet8/22/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>749</Index>
+          <InterfaceName>Ethernet8/22/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>750</Index>
+          <InterfaceName>Ethernet8/22/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>751</Index>
+          <InterfaceName>Ethernet8/23/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>752</Index>
+          <InterfaceName>Ethernet8/23/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>753</Index>
+          <InterfaceName>Ethernet8/23/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>754</Index>
+          <InterfaceName>Ethernet8/24/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>755</Index>
+          <InterfaceName>Ethernet8/24/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>756</Index>
+          <InterfaceName>Ethernet8/24/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>757</Index>
+          <InterfaceName>Ethernet8/25/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>758</Index>
+          <InterfaceName>Ethernet8/25/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>759</Index>
+          <InterfaceName>Ethernet8/25/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>760</Index>
+          <InterfaceName>Ethernet8/26/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>761</Index>
+          <InterfaceName>Ethernet8/26/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>762</Index>
+          <InterfaceName>Ethernet8/26/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>763</Index>
+          <InterfaceName>Ethernet8/27/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>764</Index>
+          <InterfaceName>Ethernet8/27/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>765</Index>
+          <InterfaceName>Ethernet8/27/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>766</Index>
+          <InterfaceName>Ethernet8/28/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>767</Index>
+          <InterfaceName>Ethernet8/28/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>768</Index>
+          <InterfaceName>Ethernet8/28/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>769</Index>
+          <InterfaceName>Ethernet8/29/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>770</Index>
+          <InterfaceName>Ethernet8/29/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>771</Index>
+          <InterfaceName>Ethernet8/29/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>772</Index>
+          <InterfaceName>Ethernet8/30/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>773</Index>
+          <InterfaceName>Ethernet8/30/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>774</Index>
+          <InterfaceName>Ethernet8/30/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>775</Index>
+          <InterfaceName>Ethernet8/31/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>776</Index>
+          <InterfaceName>Ethernet8/31/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>777</Index>
+          <InterfaceName>Ethernet8/31/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>778</Index>
+          <InterfaceName>Ethernet8/32/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>779</Index>
+          <InterfaceName>Ethernet8/32/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>780</Index>
+          <InterfaceName>Ethernet8/32/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>781</Index>
+          <InterfaceName>Ethernet8/33/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>782</Index>
+          <InterfaceName>Ethernet8/33/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>783</Index>
+          <InterfaceName>Ethernet8/33/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>784</Index>
+          <InterfaceName>Ethernet8/34/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>785</Index>
+          <InterfaceName>Ethernet8/34/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>786</Index>
+          <InterfaceName>Ethernet8/34/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>787</Index>
+          <InterfaceName>Ethernet8/35/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>788</Index>
+          <InterfaceName>Ethernet8/35/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>789</Index>
+          <InterfaceName>Ethernet8/35/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>790</Index>
+          <InterfaceName>Ethernet8/36/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>791</Index>
+          <InterfaceName>Ethernet8/36/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>792</Index>
+          <InterfaceName>Ethernet8/36/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>793</Index>
+          <InterfaceName>Ethernet8/37/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>794</Index>
+          <InterfaceName>Ethernet8/37/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>795</Index>
+          <InterfaceName>Ethernet8/37/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>796</Index>
+          <InterfaceName>Ethernet8/38/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>797</Index>
+          <InterfaceName>Ethernet8/38/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>798</Index>
+          <InterfaceName>Ethernet8/38/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>799</Index>
+          <InterfaceName>Ethernet8/39/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>800</Index>
+          <InterfaceName>Ethernet8/39/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>801</Index>
+          <InterfaceName>Ethernet8/39/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>802</Index>
+          <InterfaceName>Ethernet8/40/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>803</Index>
+          <InterfaceName>Ethernet8/40/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>804</Index>
+          <InterfaceName>Ethernet8/40/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>805</Index>
+          <InterfaceName>Ethernet8/41/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>806</Index>
+          <InterfaceName>Ethernet8/41/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>807</Index>
+          <InterfaceName>Ethernet8/41/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>808</Index>
+          <InterfaceName>Ethernet8/42/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>809</Index>
+          <InterfaceName>Ethernet8/42/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>810</Index>
+          <InterfaceName>Ethernet8/42/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>811</Index>
+          <InterfaceName>Ethernet8/43/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>812</Index>
+          <InterfaceName>Ethernet8/43/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>813</Index>
+          <InterfaceName>Ethernet8/43/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>814</Index>
+          <InterfaceName>Ethernet8/44/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>815</Index>
+          <InterfaceName>Ethernet8/44/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>816</Index>
+          <InterfaceName>Ethernet8/44/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>817</Index>
+          <InterfaceName>Ethernet8/45/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>818</Index>
+          <InterfaceName>Ethernet8/45/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>819</Index>
+          <InterfaceName>Ethernet8/45/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>820</Index>
+          <InterfaceName>Ethernet8/46/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>821</Index>
+          <InterfaceName>Ethernet8/46/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>822</Index>
+          <InterfaceName>Ethernet8/46/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>823</Index>
+          <InterfaceName>Ethernet8/47/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>824</Index>
+          <InterfaceName>Ethernet8/47/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>825</Index>
+          <InterfaceName>Ethernet8/47/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>826</Index>
+          <InterfaceName>Ethernet8/48/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>827</Index>
+          <InterfaceName>Ethernet8/48/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>828</Index>
+          <InterfaceName>Ethernet8/48/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>829</Index>
+          <InterfaceName>Ethernet9/1/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>830</Index>
+          <InterfaceName>Ethernet9/1/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>831</Index>
+          <InterfaceName>Ethernet9/1/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>832</Index>
+          <InterfaceName>Ethernet9/2/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>833</Index>
+          <InterfaceName>Ethernet9/2/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>834</Index>
+          <InterfaceName>Ethernet9/2/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>835</Index>
+          <InterfaceName>Ethernet9/3/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>836</Index>
+          <InterfaceName>Ethernet9/3/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>837</Index>
+          <InterfaceName>Ethernet9/3/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>838</Index>
+          <InterfaceName>Ethernet9/4/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>839</Index>
+          <InterfaceName>Ethernet9/4/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>840</Index>
+          <InterfaceName>Ethernet9/4/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>841</Index>
+          <InterfaceName>Ethernet9/5/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>842</Index>
+          <InterfaceName>Ethernet9/5/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>843</Index>
+          <InterfaceName>Ethernet9/5/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>844</Index>
+          <InterfaceName>Ethernet9/6/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>845</Index>
+          <InterfaceName>Ethernet9/6/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>846</Index>
+          <InterfaceName>Ethernet9/6/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>847</Index>
+          <InterfaceName>Ethernet9/7/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>848</Index>
+          <InterfaceName>Ethernet9/7/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>849</Index>
+          <InterfaceName>Ethernet9/7/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>850</Index>
+          <InterfaceName>Ethernet9/8/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>851</Index>
+          <InterfaceName>Ethernet9/8/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>852</Index>
+          <InterfaceName>Ethernet9/8/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>853</Index>
+          <InterfaceName>Ethernet9/9/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>854</Index>
+          <InterfaceName>Ethernet9/9/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>855</Index>
+          <InterfaceName>Ethernet9/9/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>856</Index>
+          <InterfaceName>Ethernet9/10/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>857</Index>
+          <InterfaceName>Ethernet9/10/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>858</Index>
+          <InterfaceName>Ethernet9/10/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>859</Index>
+          <InterfaceName>Ethernet9/11/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>860</Index>
+          <InterfaceName>Ethernet9/11/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>861</Index>
+          <InterfaceName>Ethernet9/11/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>862</Index>
+          <InterfaceName>Ethernet9/12/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>863</Index>
+          <InterfaceName>Ethernet9/12/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>864</Index>
+          <InterfaceName>Ethernet9/12/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>865</Index>
+          <InterfaceName>Ethernet9/13/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>866</Index>
+          <InterfaceName>Ethernet9/13/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>867</Index>
+          <InterfaceName>Ethernet9/13/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>868</Index>
+          <InterfaceName>Ethernet9/14/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>869</Index>
+          <InterfaceName>Ethernet9/14/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>870</Index>
+          <InterfaceName>Ethernet9/14/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>871</Index>
+          <InterfaceName>Ethernet9/15/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>872</Index>
+          <InterfaceName>Ethernet9/15/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>873</Index>
+          <InterfaceName>Ethernet9/15/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>874</Index>
+          <InterfaceName>Ethernet9/16/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>875</Index>
+          <InterfaceName>Ethernet9/16/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>876</Index>
+          <InterfaceName>Ethernet9/16/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>877</Index>
+          <InterfaceName>Ethernet9/17/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>878</Index>
+          <InterfaceName>Ethernet9/17/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>879</Index>
+          <InterfaceName>Ethernet9/17/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>880</Index>
+          <InterfaceName>Ethernet9/18/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>881</Index>
+          <InterfaceName>Ethernet9/18/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>882</Index>
+          <InterfaceName>Ethernet9/18/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>883</Index>
+          <InterfaceName>Ethernet9/19/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>884</Index>
+          <InterfaceName>Ethernet9/19/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>885</Index>
+          <InterfaceName>Ethernet9/19/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>886</Index>
+          <InterfaceName>Ethernet9/20/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>887</Index>
+          <InterfaceName>Ethernet9/20/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>888</Index>
+          <InterfaceName>Ethernet9/20/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>889</Index>
+          <InterfaceName>Ethernet9/21/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>890</Index>
+          <InterfaceName>Ethernet9/21/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>891</Index>
+          <InterfaceName>Ethernet9/21/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>892</Index>
+          <InterfaceName>Ethernet9/22/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>893</Index>
+          <InterfaceName>Ethernet9/22/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>894</Index>
+          <InterfaceName>Ethernet9/22/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>895</Index>
+          <InterfaceName>Ethernet9/23/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>896</Index>
+          <InterfaceName>Ethernet9/23/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>897</Index>
+          <InterfaceName>Ethernet9/23/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>898</Index>
+          <InterfaceName>Ethernet9/24/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>899</Index>
+          <InterfaceName>Ethernet9/24/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>900</Index>
+          <InterfaceName>Ethernet9/24/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>901</Index>
+          <InterfaceName>Ethernet9/25/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>902</Index>
+          <InterfaceName>Ethernet9/25/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>903</Index>
+          <InterfaceName>Ethernet9/25/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>904</Index>
+          <InterfaceName>Ethernet9/26/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>905</Index>
+          <InterfaceName>Ethernet9/26/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>906</Index>
+          <InterfaceName>Ethernet9/26/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>907</Index>
+          <InterfaceName>Ethernet9/27/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>908</Index>
+          <InterfaceName>Ethernet9/27/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>909</Index>
+          <InterfaceName>Ethernet9/27/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>910</Index>
+          <InterfaceName>Ethernet9/28/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>911</Index>
+          <InterfaceName>Ethernet9/28/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>912</Index>
+          <InterfaceName>Ethernet9/28/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>913</Index>
+          <InterfaceName>Ethernet9/29/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>914</Index>
+          <InterfaceName>Ethernet9/29/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>915</Index>
+          <InterfaceName>Ethernet9/29/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>916</Index>
+          <InterfaceName>Ethernet9/30/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>917</Index>
+          <InterfaceName>Ethernet9/30/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>918</Index>
+          <InterfaceName>Ethernet9/30/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>919</Index>
+          <InterfaceName>Ethernet9/31/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>920</Index>
+          <InterfaceName>Ethernet9/31/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>921</Index>
+          <InterfaceName>Ethernet9/31/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>922</Index>
+          <InterfaceName>Ethernet9/32/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>923</Index>
+          <InterfaceName>Ethernet9/32/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>924</Index>
+          <InterfaceName>Ethernet9/32/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>925</Index>
+          <InterfaceName>Ethernet9/33/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>926</Index>
+          <InterfaceName>Ethernet9/33/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>927</Index>
+          <InterfaceName>Ethernet9/33/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>928</Index>
+          <InterfaceName>Ethernet9/34/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>929</Index>
+          <InterfaceName>Ethernet9/34/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>930</Index>
+          <InterfaceName>Ethernet9/34/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>931</Index>
+          <InterfaceName>Ethernet9/35/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>932</Index>
+          <InterfaceName>Ethernet9/35/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>933</Index>
+          <InterfaceName>Ethernet9/35/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>934</Index>
+          <InterfaceName>Ethernet9/36/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>935</Index>
+          <InterfaceName>Ethernet9/36/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>936</Index>
+          <InterfaceName>Ethernet9/36/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>937</Index>
+          <InterfaceName>Ethernet9/37/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>938</Index>
+          <InterfaceName>Ethernet9/37/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>939</Index>
+          <InterfaceName>Ethernet9/37/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>940</Index>
+          <InterfaceName>Ethernet9/38/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>941</Index>
+          <InterfaceName>Ethernet9/38/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>942</Index>
+          <InterfaceName>Ethernet9/38/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>943</Index>
+          <InterfaceName>Ethernet9/39/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>944</Index>
+          <InterfaceName>Ethernet9/39/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>945</Index>
+          <InterfaceName>Ethernet9/39/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>946</Index>
+          <InterfaceName>Ethernet9/40/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>947</Index>
+          <InterfaceName>Ethernet9/40/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>948</Index>
+          <InterfaceName>Ethernet9/40/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>949</Index>
+          <InterfaceName>Ethernet9/41/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>950</Index>
+          <InterfaceName>Ethernet9/41/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>951</Index>
+          <InterfaceName>Ethernet9/41/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>952</Index>
+          <InterfaceName>Ethernet9/42/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>953</Index>
+          <InterfaceName>Ethernet9/42/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>954</Index>
+          <InterfaceName>Ethernet9/42/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>955</Index>
+          <InterfaceName>Ethernet9/43/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>956</Index>
+          <InterfaceName>Ethernet9/43/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>957</Index>
+          <InterfaceName>Ethernet9/43/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>958</Index>
+          <InterfaceName>Ethernet9/44/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>959</Index>
+          <InterfaceName>Ethernet9/44/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>960</Index>
+          <InterfaceName>Ethernet9/44/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>961</Index>
+          <InterfaceName>Ethernet9/45/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>962</Index>
+          <InterfaceName>Ethernet9/45/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>963</Index>
+          <InterfaceName>Ethernet9/45/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>964</Index>
+          <InterfaceName>Ethernet9/46/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>965</Index>
+          <InterfaceName>Ethernet9/46/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>966</Index>
+          <InterfaceName>Ethernet9/46/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>967</Index>
+          <InterfaceName>Ethernet9/47/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>968</Index>
+          <InterfaceName>Ethernet9/47/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>969</Index>
+          <InterfaceName>Ethernet9/47/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>970</Index>
+          <InterfaceName>Ethernet9/48/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>971</Index>
+          <InterfaceName>Ethernet9/48/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>972</Index>
+          <InterfaceName>Ethernet9/48/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>973</Index>
+          <InterfaceName>Ethernet10/1/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>974</Index>
+          <InterfaceName>Ethernet10/1/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>975</Index>
+          <InterfaceName>Ethernet10/1/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>976</Index>
+          <InterfaceName>Ethernet10/2/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>977</Index>
+          <InterfaceName>Ethernet10/2/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>978</Index>
+          <InterfaceName>Ethernet10/2/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>979</Index>
+          <InterfaceName>Ethernet10/3/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>980</Index>
+          <InterfaceName>Ethernet10/3/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>981</Index>
+          <InterfaceName>Ethernet10/3/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>982</Index>
+          <InterfaceName>Ethernet10/4/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>983</Index>
+          <InterfaceName>Ethernet10/4/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>984</Index>
+          <InterfaceName>Ethernet10/4/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>985</Index>
+          <InterfaceName>Ethernet10/5/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>986</Index>
+          <InterfaceName>Ethernet10/5/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>987</Index>
+          <InterfaceName>Ethernet10/5/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>988</Index>
+          <InterfaceName>Ethernet10/6/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>989</Index>
+          <InterfaceName>Ethernet10/6/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>990</Index>
+          <InterfaceName>Ethernet10/6/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>991</Index>
+          <InterfaceName>Ethernet10/7/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>992</Index>
+          <InterfaceName>Ethernet10/7/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>993</Index>
+          <InterfaceName>Ethernet10/7/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>994</Index>
+          <InterfaceName>Ethernet10/8/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>995</Index>
+          <InterfaceName>Ethernet10/8/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>996</Index>
+          <InterfaceName>Ethernet10/8/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>997</Index>
+          <InterfaceName>Ethernet10/9/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>998</Index>
+          <InterfaceName>Ethernet10/9/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>999</Index>
+          <InterfaceName>Ethernet10/9/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1000</Index>
+          <InterfaceName>Ethernet10/10/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1001</Index>
+          <InterfaceName>Ethernet10/10/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1002</Index>
+          <InterfaceName>Ethernet10/10/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1003</Index>
+          <InterfaceName>Ethernet10/11/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1004</Index>
+          <InterfaceName>Ethernet10/11/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1005</Index>
+          <InterfaceName>Ethernet10/11/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1006</Index>
+          <InterfaceName>Ethernet10/12/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1007</Index>
+          <InterfaceName>Ethernet10/12/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1008</Index>
+          <InterfaceName>Ethernet10/12/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1009</Index>
+          <InterfaceName>Ethernet10/13/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1010</Index>
+          <InterfaceName>Ethernet10/13/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1011</Index>
+          <InterfaceName>Ethernet10/13/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1012</Index>
+          <InterfaceName>Ethernet10/14/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1013</Index>
+          <InterfaceName>Ethernet10/14/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1014</Index>
+          <InterfaceName>Ethernet10/14/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1015</Index>
+          <InterfaceName>Ethernet10/15/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1016</Index>
+          <InterfaceName>Ethernet10/15/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1017</Index>
+          <InterfaceName>Ethernet10/15/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1018</Index>
+          <InterfaceName>Ethernet10/16/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1019</Index>
+          <InterfaceName>Ethernet10/16/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1020</Index>
+          <InterfaceName>Ethernet10/16/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1021</Index>
+          <InterfaceName>Ethernet10/17/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1022</Index>
+          <InterfaceName>Ethernet10/17/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1023</Index>
+          <InterfaceName>Ethernet10/17/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1024</Index>
+          <InterfaceName>Ethernet10/18/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1025</Index>
+          <InterfaceName>Ethernet10/18/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1026</Index>
+          <InterfaceName>Ethernet10/18/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1027</Index>
+          <InterfaceName>Ethernet10/19/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1028</Index>
+          <InterfaceName>Ethernet10/19/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1029</Index>
+          <InterfaceName>Ethernet10/19/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1030</Index>
+          <InterfaceName>Ethernet10/20/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1031</Index>
+          <InterfaceName>Ethernet10/20/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1032</Index>
+          <InterfaceName>Ethernet10/20/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1033</Index>
+          <InterfaceName>Ethernet10/21/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1034</Index>
+          <InterfaceName>Ethernet10/21/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1035</Index>
+          <InterfaceName>Ethernet10/21/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1036</Index>
+          <InterfaceName>Ethernet10/22/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1037</Index>
+          <InterfaceName>Ethernet10/22/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1038</Index>
+          <InterfaceName>Ethernet10/22/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1039</Index>
+          <InterfaceName>Ethernet10/23/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1040</Index>
+          <InterfaceName>Ethernet10/23/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1041</Index>
+          <InterfaceName>Ethernet10/23/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1042</Index>
+          <InterfaceName>Ethernet10/24/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1043</Index>
+          <InterfaceName>Ethernet10/24/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1044</Index>
+          <InterfaceName>Ethernet10/24/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1045</Index>
+          <InterfaceName>Ethernet10/25/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1046</Index>
+          <InterfaceName>Ethernet10/25/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1047</Index>
+          <InterfaceName>Ethernet10/25/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1048</Index>
+          <InterfaceName>Ethernet10/26/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1049</Index>
+          <InterfaceName>Ethernet10/26/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1050</Index>
+          <InterfaceName>Ethernet10/26/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1051</Index>
+          <InterfaceName>Ethernet10/27/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1052</Index>
+          <InterfaceName>Ethernet10/27/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1053</Index>
+          <InterfaceName>Ethernet10/27/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1054</Index>
+          <InterfaceName>Ethernet10/28/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1055</Index>
+          <InterfaceName>Ethernet10/28/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1056</Index>
+          <InterfaceName>Ethernet10/28/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1057</Index>
+          <InterfaceName>Ethernet10/29/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1058</Index>
+          <InterfaceName>Ethernet10/29/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1059</Index>
+          <InterfaceName>Ethernet10/29/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1060</Index>
+          <InterfaceName>Ethernet10/30/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1061</Index>
+          <InterfaceName>Ethernet10/30/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1062</Index>
+          <InterfaceName>Ethernet10/30/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1063</Index>
+          <InterfaceName>Ethernet10/31/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1064</Index>
+          <InterfaceName>Ethernet10/31/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1065</Index>
+          <InterfaceName>Ethernet10/31/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1066</Index>
+          <InterfaceName>Ethernet10/32/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1067</Index>
+          <InterfaceName>Ethernet10/32/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1068</Index>
+          <InterfaceName>Ethernet10/32/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1069</Index>
+          <InterfaceName>Ethernet10/33/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1070</Index>
+          <InterfaceName>Ethernet10/33/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1071</Index>
+          <InterfaceName>Ethernet10/33/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1072</Index>
+          <InterfaceName>Ethernet10/34/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1073</Index>
+          <InterfaceName>Ethernet10/34/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1074</Index>
+          <InterfaceName>Ethernet10/34/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1075</Index>
+          <InterfaceName>Ethernet10/35/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1076</Index>
+          <InterfaceName>Ethernet10/35/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1077</Index>
+          <InterfaceName>Ethernet10/35/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1078</Index>
+          <InterfaceName>Ethernet10/36/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1079</Index>
+          <InterfaceName>Ethernet10/36/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1080</Index>
+          <InterfaceName>Ethernet10/36/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1081</Index>
+          <InterfaceName>Ethernet10/37/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1082</Index>
+          <InterfaceName>Ethernet10/37/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1083</Index>
+          <InterfaceName>Ethernet10/37/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1084</Index>
+          <InterfaceName>Ethernet10/38/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1085</Index>
+          <InterfaceName>Ethernet10/38/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1086</Index>
+          <InterfaceName>Ethernet10/38/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1087</Index>
+          <InterfaceName>Ethernet10/39/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1088</Index>
+          <InterfaceName>Ethernet10/39/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1089</Index>
+          <InterfaceName>Ethernet10/39/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1090</Index>
+          <InterfaceName>Ethernet10/40/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1091</Index>
+          <InterfaceName>Ethernet10/40/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1092</Index>
+          <InterfaceName>Ethernet10/40/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1093</Index>
+          <InterfaceName>Ethernet10/41/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1094</Index>
+          <InterfaceName>Ethernet10/41/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1095</Index>
+          <InterfaceName>Ethernet10/41/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1096</Index>
+          <InterfaceName>Ethernet10/42/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1097</Index>
+          <InterfaceName>Ethernet10/42/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1098</Index>
+          <InterfaceName>Ethernet10/42/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1099</Index>
+          <InterfaceName>Ethernet10/43/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1100</Index>
+          <InterfaceName>Ethernet10/43/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1101</Index>
+          <InterfaceName>Ethernet10/43/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1102</Index>
+          <InterfaceName>Ethernet10/44/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1103</Index>
+          <InterfaceName>Ethernet10/44/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1104</Index>
+          <InterfaceName>Ethernet10/44/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1105</Index>
+          <InterfaceName>Ethernet10/45/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1106</Index>
+          <InterfaceName>Ethernet10/45/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1107</Index>
+          <InterfaceName>Ethernet10/45/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1108</Index>
+          <InterfaceName>Ethernet10/46/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1109</Index>
+          <InterfaceName>Ethernet10/46/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1110</Index>
+          <InterfaceName>Ethernet10/46/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1111</Index>
+          <InterfaceName>Ethernet10/47/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1112</Index>
+          <InterfaceName>Ethernet10/47/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1113</Index>
+          <InterfaceName>Ethernet10/47/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1114</Index>
+          <InterfaceName>Ethernet10/48/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1115</Index>
+          <InterfaceName>Ethernet10/48/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1116</Index>
+          <InterfaceName>Ethernet10/48/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+      </OpticalInterfaces>
+      <PowerInterfaces xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution">
+        <a:PowerInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>power1/0</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Phase i:nil="true"/>
+          <a:PortType>C19</a:PortType>
+          <a:PortTypeStr>C19</a:PortTypeStr>
+          <a:Redundant>false</a:Redundant>
+        </a:PowerInterface>
+        <a:PowerInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>2</Index>
+          <InterfaceName>power1/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Phase i:nil="true"/>
+          <a:PortType>C19</a:PortType>
+          <a:PortTypeStr>C19</a:PortTypeStr>
+          <a:Redundant>true</a:Redundant>
+        </a:PowerInterface>
+        <a:PowerInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>3</Index>
+          <InterfaceName>power2/0</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Phase i:nil="true"/>
+          <a:PortType>C19</a:PortType>
+          <a:PortTypeStr>C19</a:PortTypeStr>
+          <a:Redundant>false</a:Redundant>
+        </a:PowerInterface>
+        <a:PowerInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>4</Index>
+          <InterfaceName>power2/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Phase i:nil="true"/>
+          <a:PortType>C19</a:PortType>
+          <a:PortTypeStr>C19</a:PortTypeStr>
+          <a:Redundant>true</a:Redundant>
+        </a:PowerInterface>
+        <a:PowerInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>5</Index>
+          <InterfaceName>power3/0</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Phase i:nil="true"/>
+          <a:PortType>C19</a:PortType>
+          <a:PortTypeStr>C19</a:PortTypeStr>
+          <a:Redundant>false</a:Redundant>
+        </a:PowerInterface>
+        <a:PowerInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>6</Index>
+          <InterfaceName>power3/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Phase i:nil="true"/>
+          <a:PortType>C19</a:PortType>
+          <a:PortTypeStr>C19</a:PortTypeStr>
+          <a:Redundant>true</a:Redundant>
+        </a:PowerInterface>
+        <a:PowerInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>7</Index>
+          <InterfaceName>power4/0</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Phase i:nil="true"/>
+          <a:PortType>C19</a:PortType>
+          <a:PortTypeStr>C19</a:PortTypeStr>
+          <a:Redundant>false</a:Redundant>
+        </a:PowerInterface>
+        <a:PowerInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>8</Index>
+          <InterfaceName>power4/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Phase i:nil="true"/>
+          <a:PortType>C19</a:PortType>
+          <a:PortTypeStr>C19</a:PortTypeStr>
+          <a:Redundant>true</a:Redundant>
+        </a:PowerInterface>
+        <a:PowerInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>9</Index>
+          <InterfaceName>power7/0</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Phase i:nil="true"/>
+          <a:PortType>C19</a:PortType>
+          <a:PortTypeStr>C19</a:PortTypeStr>
+          <a:Redundant>false</a:Redundant>
+        </a:PowerInterface>
+        <a:PowerInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>10</Index>
+          <InterfaceName>power7/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Phase i:nil="true"/>
+          <a:PortType>C19</a:PortType>
+          <a:PortTypeStr>C19</a:PortTypeStr>
+          <a:Redundant>true</a:Redundant>
+        </a:PowerInterface>
+        <a:PowerInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>11</Index>
+          <InterfaceName>power8/0</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Phase i:nil="true"/>
+          <a:PortType>C19</a:PortType>
+          <a:PortTypeStr>C19</a:PortTypeStr>
+          <a:Redundant>false</a:Redundant>
+        </a:PowerInterface>
+        <a:PowerInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>12</Index>
+          <InterfaceName>power8/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Phase i:nil="true"/>
+          <a:PortType>C19</a:PortType>
+          <a:PortTypeStr>C19</a:PortTypeStr>
+          <a:Redundant>true</a:Redundant>
+        </a:PowerInterface>
+        <a:PowerInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>13</Index>
+          <InterfaceName>power9/0</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Phase i:nil="true"/>
+          <a:PortType>C19</a:PortType>
+          <a:PortTypeStr>C19</a:PortTypeStr>
+          <a:Redundant>false</a:Redundant>
+        </a:PowerInterface>
+        <a:PowerInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>14</Index>
+          <InterfaceName>power9/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Phase i:nil="true"/>
+          <a:PortType>C19</a:PortType>
+          <a:PortTypeStr>C19</a:PortTypeStr>
+          <a:Redundant>true</a:Redundant>
+        </a:PowerInterface>
+        <a:PowerInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>15</Index>
+          <InterfaceName>power10/0</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Phase i:nil="true"/>
+          <a:PortType>C19</a:PortType>
+          <a:PortTypeStr>C19</a:PortTypeStr>
+          <a:Redundant>false</a:Redundant>
+        </a:PowerInterface>
+        <a:PowerInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>16</Index>
+          <InterfaceName>power10/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Phase i:nil="true"/>
+          <a:PortType>C19</a:PortType>
+          <a:PortTypeStr>C19</a:PortTypeStr>
+          <a:Redundant>true</a:Redundant>
+        </a:PowerInterface>
+      </PowerInterfaces>
+      <Properties/>
+      <SerialInterfaces xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution">
+        <a:SerialInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>console</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>console</PortName>
+          <SonicName i:nil="true"/>
+          <Speed>9600</Speed>
+          <a:Logical>false</a:Logical>
+          <a:TcpPortName i:nil="true"/>
+        </a:SerialInterface>
+        <a:SerialInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>2</Index>
+          <InterfaceName>logical1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>logical1</PortName>
+          <SonicName i:nil="true"/>
+          <Speed>9600</Speed>
+          <a:Logical>true</a:Logical>
+          <a:TcpPortName>1</a:TcpPortName>
+        </a:SerialInterface>
+        <a:SerialInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>3</Index>
+          <InterfaceName>logical2</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>logical2</PortName>
+          <SonicName i:nil="true"/>
+          <Speed>9600</Speed>
+          <a:Logical>true</a:Logical>
+          <a:TcpPortName>2</a:TcpPortName>
+        </a:SerialInterface>
+        <a:SerialInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>4</Index>
+          <InterfaceName>logical3</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>logical3</PortName>
+          <SonicName i:nil="true"/>
+          <Speed>9600</Speed>
+          <a:Logical>true</a:Logical>
+          <a:TcpPortName>3</a:TcpPortName>
+        </a:SerialInterface>
+        <a:SerialInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>5</Index>
+          <InterfaceName>logical4</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>logical4</PortName>
+          <SonicName i:nil="true"/>
+          <Speed>9600</Speed>
+          <a:Logical>true</a:Logical>
+          <a:TcpPortName>4</a:TcpPortName>
+        </a:SerialInterface>
+        <a:SerialInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>6</Index>
+          <InterfaceName>logical5</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>logical5</PortName>
+          <SonicName i:nil="true"/>
+          <Speed>9600</Speed>
+          <a:Logical>true</a:Logical>
+          <a:TcpPortName>5</a:TcpPortName>
+        </a:SerialInterface>
+        <a:SerialInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>7</Index>
+          <InterfaceName>logical6</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>logical6</PortName>
+          <SonicName i:nil="true"/>
+          <Speed>9600</Speed>
+          <a:Logical>true</a:Logical>
+          <a:TcpPortName>6</a:TcpPortName>
+        </a:SerialInterface>
+        <a:SerialInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>8</Index>
+          <InterfaceName>logical7</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>logical7</PortName>
+          <SonicName i:nil="true"/>
+          <Speed>9600</Speed>
+          <a:Logical>true</a:Logical>
+          <a:TcpPortName>7</a:TcpPortName>
+        </a:SerialInterface>
+        <a:SerialInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>9</Index>
+          <InterfaceName>logical8</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>logical8</PortName>
+          <SonicName i:nil="true"/>
+          <Speed>9600</Speed>
+          <a:Logical>true</a:Logical>
+          <a:TcpPortName>8</a:TcpPortName>
+        </a:SerialInterface>
+        <a:SerialInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>10</Index>
+          <InterfaceName>logical9</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>logical9</PortName>
+          <SonicName i:nil="true"/>
+          <Speed>9600</Speed>
+          <a:Logical>true</a:Logical>
+          <a:TcpPortName>9</a:TcpPortName>
+        </a:SerialInterface>
+        <a:SerialInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>11</Index>
+          <InterfaceName>logical10</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>logical10</PortName>
+          <SonicName i:nil="true"/>
+          <Speed>9600</Speed>
+          <a:Logical>true</a:Logical>
+          <a:TcpPortName>10</a:TcpPortName>
+        </a:SerialInterface>
+        <a:SerialInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>12</Index>
+          <InterfaceName>logical11</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>logical11</PortName>
+          <SonicName i:nil="true"/>
+          <Speed>9600</Speed>
+          <a:Logical>true</a:Logical>
+          <a:TcpPortName>11</a:TcpPortName>
+        </a:SerialInterface>
+        <a:SerialInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>13</Index>
+          <InterfaceName>logical12</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>logical12</PortName>
+          <SonicName i:nil="true"/>
+          <Speed>9600</Speed>
+          <a:Logical>true</a:Logical>
+          <a:TcpPortName>12</a:TcpPortName>
+        </a:SerialInterface>
+      </SerialInterfaces>
+      <VPNTunnelInterfaces xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+      <VendorStr>Arista</VendorStr>
+    </DeviceInfo>
+  </DeviceInfos>
+  <DpgDec>
+    <DeviceDataPlaneInfo>
+      <IPSecTunnels/>
+      <LoopbackIPInterfaces xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+      <ManagementIPInterfaces xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+      <ManagementVIPInterfaces xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+      <MplsInterfaces/>
+      <MplsTeInterfaces/>
+      <RsvpInterfaces/>
+      <Hostname>str-sonic-lc06-ASIC00</Hostname>
+      <PortChannelInterfaces>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel1049</Name>
+          <AttachTo>Eth0;Eth4</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel1050</Name>
+          <AttachTo>Eth8;Eth12</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel1051</Name>
+          <AttachTo>Eth16;Eth20</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel1052</Name>
+          <AttachTo>Eth24;Eth28</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel1053</Name>
+          <AttachTo>Eth36;Eth32</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel1054</Name>
+          <AttachTo>Eth40;Eth44</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel1056</Name>
+          <AttachTo>Eth52;Eth56</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <ElementType>PortChannelInterface</ElementType>
+          <Name>PortChannel1058</Name>
+          <AttachTo>Eth64;Eth68</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+      </PortChannelInterfaces>
+      <SubInterfaces/>
+      <VlanInterfaces/>
+      <IPInterfaces>
+        <IPInterface>
+          <ElementType>IPInterface</ElementType>
+          <Name>VoqInband</Name>
+          <AttachTo>Ethernet-IB0</AttachTo>
+          <Prefix>10.241.88.4/32</Prefix>
+        </IPInterface>
+        <IPInterface>
+          <ElementType>IPInterface</ElementType>
+          <Name>v6VoqInband</Name>
+          <AttachTo>Ethernet-IB0</AttachTo>
+          <Prefix>2a01:111:e210:5e:0:a:f158:400/128</Prefix>
+        </IPInterface>
+        <IPInterface>
+          <ElementType>IPInterface</ElementType>
+          <Name i:nil="true"/>
+          <AttachTo>PortChannel1049</AttachTo>
+          <Prefix>10.0.0.128/31</Prefix>
+        </IPInterface>
+        <IPInterface>
+          <ElementType>IPInterface</ElementType>
+          <Name i:nil="true"/>
+          <AttachTo>PortChannel1049</AttachTo>
+          <Prefix>fc00::101/126</Prefix>
+        </IPInterface>
+        <IPInterface>
+          <ElementType>IPInterface</ElementType>
+          <Name i:nil="true"/>
+          <AttachTo>PortChannel1050</AttachTo>
+          <Prefix>10.0.0.132/31</Prefix>
+        </IPInterface>
+        <IPInterface>
+          <ElementType>IPInterface</ElementType>
+          <Name i:nil="true"/>
+          <AttachTo>PortChannel1050</AttachTo>
+          <Prefix>fc00::109/126</Prefix>
+        </IPInterface>
+        <IPInterface>
+          <ElementType>IPInterface</ElementType>
+          <Name i:nil="true"/>
+          <AttachTo>PortChannel1051</AttachTo>
+          <Prefix>10.0.0.136/31</Prefix>
+        </IPInterface>
+        <IPInterface>
+          <ElementType>IPInterface</ElementType>
+          <Name i:nil="true"/>
+          <AttachTo>PortChannel1051</AttachTo>
+          <Prefix>fc00::111/126</Prefix>
+        </IPInterface>
+        <IPInterface>
+          <ElementType>IPInterface</ElementType>
+          <Name i:nil="true"/>
+          <AttachTo>PortChannel1052</AttachTo>
+          <Prefix>10.0.0.140/31</Prefix>
+        </IPInterface>
+        <IPInterface>
+          <ElementType>IPInterface</ElementType>
+          <Name i:nil="true"/>
+          <AttachTo>PortChannel1052</AttachTo>
+          <Prefix>fc00::119/126</Prefix>
+        </IPInterface>
+        <IPInterface>
+          <ElementType>IPInterface</ElementType>
+          <Name i:nil="true"/>
+          <AttachTo>PortChannel1053</AttachTo>
+          <Prefix>10.0.0.144/31</Prefix>
+        </IPInterface>
+        <IPInterface>
+          <ElementType>IPInterface</ElementType>
+          <Name i:nil="true"/>
+          <AttachTo>PortChannel1053</AttachTo>
+          <Prefix>fc00::121/126</Prefix>
+        </IPInterface>
+        <IPInterface>
+          <ElementType>IPInterface</ElementType>
+          <Name i:nil="true"/>
+          <AttachTo>PortChannel1054</AttachTo>
+          <Prefix>10.0.0.148/31</Prefix>
+        </IPInterface>
+        <IPInterface>
+          <ElementType>IPInterface</ElementType>
+          <Name i:nil="true"/>
+          <AttachTo>PortChannel1054</AttachTo>
+          <Prefix>fc00::129/126</Prefix>
+        </IPInterface>
+        <IPInterface>
+          <ElementType>IPInterface</ElementType>
+          <Name i:nil="true"/>
+          <AttachTo>PortChannel1056</AttachTo>
+          <Prefix>10.0.0.152/31</Prefix>
+        </IPInterface>
+        <IPInterface>
+          <ElementType>IPInterface</ElementType>
+          <Name i:nil="true"/>
+          <AttachTo>PortChannel1056</AttachTo>
+          <Prefix>fc00::131/126</Prefix>
+        </IPInterface>
+        <IPInterface>
+          <ElementType>IPInterface</ElementType>
+          <Name i:nil="true"/>
+          <AttachTo>PortChannel1058</AttachTo>
+          <Prefix>10.0.0.156/31</Prefix>
+        </IPInterface>
+        <IPInterface>
+          <ElementType>IPInterface</ElementType>
+          <Name i:nil="true"/>
+          <AttachTo>PortChannel1058</AttachTo>
+          <Prefix>fc00::139/126</Prefix>
+        </IPInterface>
+      </IPInterfaces>
+      <DataAcls/>
+      <AclInterfaces/>
+      <NatInterfaces xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+      <DownstreamSummaries/>
+      <DownstreamSummarySet xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+    </DeviceDataPlaneInfo>
+    <DeviceDataPlaneInfo>
+      <IPSecTunnels/>
+      <LoopbackIPInterfaces xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution">
+        <a:LoopbackIPInterface>
+          <ElementType>LoopbackInterface</ElementType>
+          <Name>HostIP</Name>
+          <AttachTo>Loopback0</AttachTo>
+          <a:Prefix xmlns:b="Microsoft.Search.Autopilot.NetMux">
+            <b:IPPrefix>10.2.0.4/32</b:IPPrefix>
+          </a:Prefix>
+          <a:PrefixStr>10.2.0.4/32</a:PrefixStr>
+        </a:LoopbackIPInterface>
+        <a:LoopbackIPInterface>
+          <ElementType>LoopbackInterface</ElementType>
+          <Name>HostIP1</Name>
+          <AttachTo>Loopback0</AttachTo>
+          <a:Prefix xmlns:b="Microsoft.Search.Autopilot.NetMux">
+            <b:IPPrefix>fc00:23::1/128</b:IPPrefix>
+          </a:Prefix>
+          <a:PrefixStr>fc00:23::1/128</a:PrefixStr>
+        </a:LoopbackIPInterface>
+      </LoopbackIPInterfaces>
+      <ManagementIPInterfaces xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution">
+        <a:ManagementIPInterface>
+          <ElementType>ManagementInterface</ElementType>
+          <Name>ManagementIP</Name>
+          <AttachTo>Management1/1</AttachTo>
+          <a:Prefix xmlns:b="Microsoft.Search.Autopilot.NetMux">
+            <b:IPPrefix>10.3.146.74/24</b:IPPrefix>
+          </a:Prefix>
+          <a:PrefixStr>10.3.146.74/24</a:PrefixStr>
+          <a:ReuseScopeStr i:nil="true"/>
+        </a:ManagementIPInterface>
+        <a:ManagementIPInterface>
+          <ElementType>ManagementInterface</ElementType>
+          <Name>v6ManagementIP</Name>
+          <AttachTo>Management1/1</AttachTo>
+          <a:Prefix xmlns:b="Microsoft.Search.Autopilot.NetMux">
+            <b:IPPrefix>2a01:111:e210:3000::a03:924a/64</b:IPPrefix>
+          </a:Prefix>
+          <a:PrefixStr>2a01:111:e210:3000::a03:924a/64</a:PrefixStr>
+          <a:ReuseScopeStr i:nil="true"/>
+        </a:ManagementIPInterface>
+      </ManagementIPInterfaces>
+      <ManagementVIPInterfaces xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+      <MplsInterfaces/>
+      <MplsTeInterfaces/>
+      <RsvpInterfaces/>
+      <Hostname>str-sonic-lc06</Hostname>
+      <PortChannelInterfaces/>
+      <SubInterfaces/>
+      <VlanInterfaces/>
+      <IPInterfaces/>
+      <DataAcls/>
+      <AclInterfaces/>
+      <NatInterfaces xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+      <DownstreamSummaries/>
+      <DownstreamSummarySet xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+    </DeviceDataPlaneInfo>
+  </DpgDec>
+  <LinkMetadataDeclaration>
+    <Link xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution">
+      <a:LinkMetadata>
+        <a:Name>ARISTA33T1:Ethernet1;str-sonic-lc06-ASIC00:Eth0</a:Name>
+        <a:Properties>
+          <a:DeviceProperty>
+            <a:Name>EndItfKey</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Ethernet6/1/1#0:6:0:1#1</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>StartItfKey</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Ethernet1#0:1:0:1#1</a:Value>
+          </a:DeviceProperty>
+        </a:Properties>
+        <a:Key>ARISTA33T1:Ethernet1;str-sonic:Ethernet6/1/1</a:Key>
+      </a:LinkMetadata>
+      <a:LinkMetadata>
+        <a:Name>ARISTA33T1:Ethernet2;str-sonic-lc06-ASIC00:Eth4</a:Name>
+        <a:Properties>
+          <a:DeviceProperty>
+            <a:Name>EndItfKey</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Ethernet6/2/1#0:6:0:2#1</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>StartItfKey</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Ethernet2#0:1:0:2#1</a:Value>
+          </a:DeviceProperty>
+        </a:Properties>
+        <a:Key>ARISTA33T1:Ethernet2;str-sonic:Ethernet6/2/1</a:Key>
+      </a:LinkMetadata>
+      <a:LinkMetadata>
+        <a:Name>ARISTA35T1:Ethernet1;str-sonic-lc06-ASIC00:Eth8</a:Name>
+        <a:Properties>
+          <a:DeviceProperty>
+            <a:Name>EndItfKey</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Ethernet6/3/1#0:6:0:3#1</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>StartItfKey</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Ethernet1#0:1:0:1#1</a:Value>
+          </a:DeviceProperty>
+        </a:Properties>
+        <a:Key>ARISTA35T1:Ethernet1;str-sonic:Ethernet6/3/1</a:Key>
+      </a:LinkMetadata>
+      <a:LinkMetadata>
+        <a:Name>ARISTA35T1:Ethernet2;str-sonic-lc06-ASIC00:Eth12</a:Name>
+        <a:Properties>
+          <a:DeviceProperty>
+            <a:Name>EndItfKey</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Ethernet6/4/1#0:6:0:4#1</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>StartItfKey</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Ethernet2#0:1:0:2#1</a:Value>
+          </a:DeviceProperty>
+        </a:Properties>
+        <a:Key>ARISTA35T1:Ethernet2;str-sonic:Ethernet6/4/1</a:Key>
+      </a:LinkMetadata>
+      <a:LinkMetadata>
+        <a:Name>ARISTA37T1:Ethernet1;str-sonic-lc06-ASIC00:Eth16</a:Name>
+        <a:Properties>
+          <a:DeviceProperty>
+            <a:Name>EndItfKey</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Ethernet6/5/1#0:6:0:5#1</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>StartItfKey</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Ethernet1#0:1:0:1#1</a:Value>
+          </a:DeviceProperty>
+        </a:Properties>
+        <a:Key>ARISTA37T1:Ethernet1;str-sonic:Ethernet6/5/1</a:Key>
+      </a:LinkMetadata>
+      <a:LinkMetadata>
+        <a:Name>ARISTA37T1:Ethernet2;str-sonic-lc06-ASIC00:Eth20</a:Name>
+        <a:Properties>
+          <a:DeviceProperty>
+            <a:Name>EndItfKey</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Ethernet6/6/1#0:6:0:6#1</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>StartItfKey</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Ethernet2#0:1:0:2#1</a:Value>
+          </a:DeviceProperty>
+        </a:Properties>
+        <a:Key>ARISTA37T1:Ethernet2;str-sonic:Ethernet6/6/1</a:Key>
+      </a:LinkMetadata>
+      <a:LinkMetadata>
+        <a:Name>ARISTA39T1:Ethernet1;str-sonic-lc06-ASIC00:Eth24</a:Name>
+        <a:Properties>
+          <a:DeviceProperty>
+            <a:Name>EndItfKey</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Ethernet6/7/1#0:6:0:7#1</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>StartItfKey</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Ethernet1#0:1:0:1#1</a:Value>
+          </a:DeviceProperty>
+        </a:Properties>
+        <a:Key>ARISTA39T1:Ethernet1;str-sonic:Ethernet6/7/1</a:Key>
+      </a:LinkMetadata>
+      <a:LinkMetadata>
+        <a:Name>ARISTA39T1:Ethernet2;str-sonic-lc06-ASIC00:Eth28</a:Name>
+        <a:Properties>
+          <a:DeviceProperty>
+            <a:Name>EndItfKey</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Ethernet6/8/1#0:6:0:8#1</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>StartItfKey</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Ethernet2#0:1:0:2#1</a:Value>
+          </a:DeviceProperty>
+        </a:Properties>
+        <a:Key>ARISTA39T1:Ethernet2;str-sonic:Ethernet6/8/1</a:Key>
+      </a:LinkMetadata>
+      <a:LinkMetadata>
+        <a:Name>ARISTA41T1:Ethernet1;str-sonic-lc06-ASIC00:Eth32</a:Name>
+        <a:Properties>
+          <a:DeviceProperty>
+            <a:Name>EndItfKey</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Ethernet6/9/1#0:6:0:9#1</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>StartItfKey</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Ethernet1#0:1:0:1#1</a:Value>
+          </a:DeviceProperty>
+        </a:Properties>
+        <a:Key>ARISTA41T1:Ethernet1;str-sonic:Ethernet6/9/1</a:Key>
+      </a:LinkMetadata>
+      <a:LinkMetadata>
+        <a:Name>ARISTA41T1:Ethernet2;str-sonic-lc06-ASIC00:Eth36</a:Name>
+        <a:Properties>
+          <a:DeviceProperty>
+            <a:Name>EndItfKey</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Ethernet6/10/1#0:6:0:10#1</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>StartItfKey</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Ethernet2#0:1:0:2#1</a:Value>
+          </a:DeviceProperty>
+        </a:Properties>
+        <a:Key>ARISTA41T1:Ethernet2;str-sonic:Ethernet6/10/1</a:Key>
+      </a:LinkMetadata>
+      <a:LinkMetadata>
+        <a:Name>ARISTA43T1:Ethernet1;str-sonic-lc06-ASIC00:Eth40</a:Name>
+        <a:Properties>
+          <a:DeviceProperty>
+            <a:Name>EndItfKey</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Ethernet6/11/1#0:6:0:11#1</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>StartItfKey</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Ethernet1#0:1:0:1#1</a:Value>
+          </a:DeviceProperty>
+        </a:Properties>
+        <a:Key>ARISTA43T1:Ethernet1;str-sonic:Ethernet6/11/1</a:Key>
+      </a:LinkMetadata>
+      <a:LinkMetadata>
+        <a:Name>ARISTA43T1:Ethernet2;str-sonic-lc06-ASIC00:Eth44</a:Name>
+        <a:Properties>
+          <a:DeviceProperty>
+            <a:Name>EndItfKey</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Ethernet6/12/1#0:6:0:12#1</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>StartItfKey</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Ethernet2#0:1:0:2#1</a:Value>
+          </a:DeviceProperty>
+        </a:Properties>
+        <a:Key>ARISTA43T1:Ethernet2;str-sonic:Ethernet6/12/1</a:Key>
+      </a:LinkMetadata>
+      <a:LinkMetadata>
+        <a:Name>ARISTA45T1:Ethernet1;str-sonic-lc06-ASIC00:Eth48</a:Name>
+        <a:Properties>
+          <a:DeviceProperty>
+            <a:Name>EndItfKey</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Ethernet6/13/1#0:6:0:13#1</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>StartItfKey</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Ethernet1#0:1:0:1#1</a:Value>
+          </a:DeviceProperty>
+        </a:Properties>
+        <a:Key>ARISTA45T1:Ethernet1;str-sonic:Ethernet6/13/1</a:Key>
+      </a:LinkMetadata>
+      <a:LinkMetadata>
+        <a:Name>ARISTA47T1:Ethernet1;str-sonic-lc06-ASIC00:Eth52</a:Name>
+        <a:Properties>
+          <a:DeviceProperty>
+            <a:Name>EndItfKey</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Ethernet6/14/1#0:6:0:14#1</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>StartItfKey</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Ethernet1#0:1:0:1#1</a:Value>
+          </a:DeviceProperty>
+        </a:Properties>
+        <a:Key>ARISTA47T1:Ethernet1;str-sonic:Ethernet6/14/1</a:Key>
+      </a:LinkMetadata>
+      <a:LinkMetadata>
+        <a:Name>ARISTA47T1:Ethernet2;str-sonic-lc06-ASIC00:Eth56</a:Name>
+        <a:Properties>
+          <a:DeviceProperty>
+            <a:Name>EndItfKey</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Ethernet6/15/1#0:6:0:15#1</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>StartItfKey</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Ethernet2#0:1:0:2#1</a:Value>
+          </a:DeviceProperty>
+        </a:Properties>
+        <a:Key>ARISTA47T1:Ethernet2;str-sonic:Ethernet6/15/1</a:Key>
+      </a:LinkMetadata>
+      <a:LinkMetadata>
+        <a:Name>ARISTA49T1:Ethernet1;str-sonic-lc06-ASIC00:Eth60</a:Name>
+        <a:Properties>
+          <a:DeviceProperty>
+            <a:Name>EndItfKey</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Ethernet6/16/1#0:6:0:16#1</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>StartItfKey</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Ethernet1#0:1:0:1#1</a:Value>
+          </a:DeviceProperty>
+        </a:Properties>
+        <a:Key>ARISTA49T1:Ethernet1;str-sonic:Ethernet6/16/1</a:Key>
+      </a:LinkMetadata>
+      <a:LinkMetadata>
+        <a:Name>ARISTA50T1:Ethernet1;str-sonic-lc06-ASIC00:Eth64</a:Name>
+        <a:Properties>
+          <a:DeviceProperty>
+            <a:Name>EndItfKey</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Ethernet6/17/1#0:6:0:17#1</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>StartItfKey</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Ethernet1#0:1:0:1#1</a:Value>
+          </a:DeviceProperty>
+        </a:Properties>
+        <a:Key>ARISTA50T1:Ethernet1;str-sonic:Ethernet6/17/1</a:Key>
+      </a:LinkMetadata>
+      <a:LinkMetadata>
+        <a:Name>ARISTA50T1:Ethernet2;str-sonic-lc06-ASIC00:Eth68</a:Name>
+        <a:Properties>
+          <a:DeviceProperty>
+            <a:Name>EndItfKey</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Ethernet6/18/1#0:6:0:18#1</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>StartItfKey</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Ethernet2#0:1:0:2#1</a:Value>
+          </a:DeviceProperty>
+        </a:Properties>
+        <a:Key>ARISTA50T1:Ethernet2;str-sonic:Ethernet6/18/1</a:Key>
+      </a:LinkMetadata>
+      <a:LinkMetadata>
+        <a:Name>ARISTA51T1:Ethernet1;str-sonic-lc06-ASIC00:Eth72</a:Name>
+        <a:Properties>
+          <a:DeviceProperty>
+            <a:Name>EndItfKey</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Ethernet6/19/1#0:6:0:19#1</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>StartItfKey</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Ethernet1#0:1:0:1#1</a:Value>
+          </a:DeviceProperty>
+        </a:Properties>
+        <a:Key>ARISTA51T1:Ethernet1;str-sonic:Ethernet6/19/1</a:Key>
+      </a:LinkMetadata>
+      <a:LinkMetadata>
+        <a:Name>ARISTA52T1:Ethernet1;str-sonic-lc06-ASIC00:Eth76</a:Name>
+        <a:Properties>
+          <a:DeviceProperty>
+            <a:Name>EndItfKey</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Ethernet6/20/1#0:6:0:20#1</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>StartItfKey</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Ethernet1#0:1:0:1#1</a:Value>
+          </a:DeviceProperty>
+        </a:Properties>
+        <a:Key>ARISTA52T1:Ethernet1;str-sonic:Ethernet6/20/1</a:Key>
+      </a:LinkMetadata>
+      <a:LinkMetadata>
+        <a:Name>ARISTA53T1:Ethernet1;str-sonic-lc06-ASIC00:Eth80</a:Name>
+        <a:Properties>
+          <a:DeviceProperty>
+            <a:Name>EndItfKey</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Ethernet6/21/1#0:6:0:21#1</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>StartItfKey</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Ethernet1#0:1:0:1#1</a:Value>
+          </a:DeviceProperty>
+        </a:Properties>
+        <a:Key>ARISTA53T1:Ethernet1;str-sonic:Ethernet6/21/1</a:Key>
+      </a:LinkMetadata>
+      <a:LinkMetadata>
+        <a:Name>ARISTA54T1:Ethernet1;str-sonic-lc06-ASIC00:Eth84</a:Name>
+        <a:Properties>
+          <a:DeviceProperty>
+            <a:Name>EndItfKey</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Ethernet6/22/1#0:6:0:22#1</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>StartItfKey</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Ethernet1#0:1:0:1#1</a:Value>
+          </a:DeviceProperty>
+        </a:Properties>
+        <a:Key>ARISTA54T1:Ethernet1;str-sonic:Ethernet6/22/1</a:Key>
+      </a:LinkMetadata>
+      <a:LinkMetadata>
+        <a:Name>ARISTA55T1:Ethernet1;str-sonic-lc06-ASIC00:Eth88</a:Name>
+        <a:Properties>
+          <a:DeviceProperty>
+            <a:Name>EndItfKey</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Ethernet6/23/1#0:6:0:23#1</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>StartItfKey</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Ethernet1#0:1:0:1#1</a:Value>
+          </a:DeviceProperty>
+        </a:Properties>
+        <a:Key>ARISTA55T1:Ethernet1;str-sonic:Ethernet6/23/1</a:Key>
+      </a:LinkMetadata>
+      <a:LinkMetadata>
+        <a:Name>ARISTA56T1:Ethernet1;str-sonic-lc06-ASIC00:Eth92</a:Name>
+        <a:Properties>
+          <a:DeviceProperty>
+            <a:Name>EndItfKey</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Ethernet6/24/1#0:6:0:24#1</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>StartItfKey</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Ethernet1#0:1:0:1#1</a:Value>
+          </a:DeviceProperty>
+        </a:Properties>
+        <a:Key>ARISTA56T1:Ethernet1;str-sonic:Ethernet6/24/1</a:Key>
+      </a:LinkMetadata>
+      <a:LinkMetadata>
+        <a:Name>ARISTA57T1:Ethernet1;str-sonic-lc06-ASIC00:Eth96</a:Name>
+        <a:Properties>
+          <a:DeviceProperty>
+            <a:Name>EndItfKey</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Ethernet6/25/1#0:6:0:25#1</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>StartItfKey</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Ethernet1#0:1:0:1#1</a:Value>
+          </a:DeviceProperty>
+        </a:Properties>
+        <a:Key>ARISTA57T1:Ethernet1;str-sonic:Ethernet6/25/1</a:Key>
+      </a:LinkMetadata>
+      <a:LinkMetadata>
+        <a:Name>ARISTA58T1:Ethernet1;str-sonic-lc06-ASIC00:Eth100</a:Name>
+        <a:Properties>
+          <a:DeviceProperty>
+            <a:Name>EndItfKey</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Ethernet6/26/1#0:6:0:26#1</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>StartItfKey</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Ethernet1#0:1:0:1#1</a:Value>
+          </a:DeviceProperty>
+        </a:Properties>
+        <a:Key>ARISTA58T1:Ethernet1;str-sonic:Ethernet6/26/1</a:Key>
+      </a:LinkMetadata>
+      <a:LinkMetadata>
+        <a:Name>ARISTA59T1:Ethernet1;str-sonic-lc06-ASIC00:Eth104</a:Name>
+        <a:Properties>
+          <a:DeviceProperty>
+            <a:Name>EndItfKey</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Ethernet6/27/1#0:6:0:27#1</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>StartItfKey</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Ethernet1#0:1:0:1#1</a:Value>
+          </a:DeviceProperty>
+        </a:Properties>
+        <a:Key>ARISTA59T1:Ethernet1;str-sonic:Ethernet6/27/1</a:Key>
+      </a:LinkMetadata>
+      <a:LinkMetadata>
+        <a:Name>ARISTA60T1:Ethernet1;str-sonic-lc06-ASIC00:Eth108</a:Name>
+        <a:Properties>
+          <a:DeviceProperty>
+            <a:Name>EndItfKey</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Ethernet6/28/1#0:6:0:28#1</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>StartItfKey</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Ethernet1#0:1:0:1#1</a:Value>
+          </a:DeviceProperty>
+        </a:Properties>
+        <a:Key>ARISTA60T1:Ethernet1;str-sonic:Ethernet6/28/1</a:Key>
+      </a:LinkMetadata>
+      <a:LinkMetadata>
+        <a:Name>ARISTA61T1:Ethernet1;str-sonic-lc06-ASIC00:Eth112</a:Name>
+        <a:Properties>
+          <a:DeviceProperty>
+            <a:Name>EndItfKey</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Ethernet6/29/1#0:6:0:29#1</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>StartItfKey</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Ethernet1#0:1:0:1#1</a:Value>
+          </a:DeviceProperty>
+        </a:Properties>
+        <a:Key>ARISTA61T1:Ethernet1;str-sonic:Ethernet6/29/1</a:Key>
+      </a:LinkMetadata>
+      <a:LinkMetadata>
+        <a:Name>ARISTA62T1:Ethernet1;str-sonic-lc06-ASIC00:Eth116</a:Name>
+        <a:Properties>
+          <a:DeviceProperty>
+            <a:Name>EndItfKey</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Ethernet6/30/1#0:6:0:30#1</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>StartItfKey</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Ethernet1#0:1:0:1#1</a:Value>
+          </a:DeviceProperty>
+        </a:Properties>
+        <a:Key>ARISTA62T1:Ethernet1;str-sonic:Ethernet6/30/1</a:Key>
+      </a:LinkMetadata>
+      <a:LinkMetadata>
+        <a:Name>ARISTA63T1:Ethernet1;str-sonic-lc06-ASIC00:Eth120</a:Name>
+        <a:Properties>
+          <a:DeviceProperty>
+            <a:Name>EndItfKey</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Ethernet6/31/1#0:6:0:31#1</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>StartItfKey</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Ethernet1#0:1:0:1#1</a:Value>
+          </a:DeviceProperty>
+        </a:Properties>
+        <a:Key>ARISTA63T1:Ethernet1;str-sonic:Ethernet6/31/1</a:Key>
+      </a:LinkMetadata>
+      <a:LinkMetadata>
+        <a:Name>ARISTA64T1:Ethernet1;str-sonic-lc06-ASIC00:Eth124</a:Name>
+        <a:Properties>
+          <a:DeviceProperty>
+            <a:Name>EndItfKey</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Ethernet6/32/1#0:6:0:32#1</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>StartItfKey</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Ethernet1#0:1:0:1#1</a:Value>
+          </a:DeviceProperty>
+        </a:Properties>
+        <a:Key>ARISTA64T1:Ethernet1;str-sonic:Ethernet6/32/1</a:Key>
+      </a:LinkMetadata>
+    </Link>
+    <Properties xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+  </LinkMetadataDeclaration>
+  <MetadataDeclaration>
+    <Devices xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution">
+      <a:DeviceMetadata>
+        <a:Name>str-sonic-lc03</a:Name>
+        <a:Properties>
+          <a:DeviceProperty>
+            <a:Name>FirmwareProfile</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>SONiC-Sonic-400g-lc-sku-lc</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>ForwardingMethod</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>VoQ</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>SlotIndex</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>3</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>TotalCountOfVoQ</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>8</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>MaxCountOfCores</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>64</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>MacSecEnabled</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>True</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>OsVersion</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>SONiC.20220532.60</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>ParentRouter</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str-sonic</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>SubDevices</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str-sonic-lc03-ASIC00;str-sonic-lc03-ASIC01</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>SiblingLineCards</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str-sonic-lc04;str-sonic-lc05;str-sonic-lc06;str-sonic-lc07;str-sonic-lc08;str-sonic-lc09;str-sonic-lc10</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Group</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str-sonic</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>DcCode</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>STR</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>CloudType</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Public</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Location</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>TBD</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Function</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>LabTest</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>DeploymentId</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>3</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>SonicEnabled</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>True</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Region</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>test</a:Value>
+          </a:DeviceProperty>
+        </a:Properties>
+      </a:DeviceMetadata>
+      <a:DeviceMetadata>
+        <a:Name>str-sonic-lc04</a:Name>
+        <a:Properties>
+          <a:DeviceProperty>
+            <a:Name>FirmwareProfile</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>SONiC-Sonic-lc-100g-sku-lc</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>ForwardingMethod</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>VoQ</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>SlotIndex</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>4</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>TotalCountOfVoQ</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>8</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>MaxCountOfCores</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>64</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>MacSecEnabled</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>False</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>OsVersion</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>SONiC.20220532.60</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>ParentRouter</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str-sonic</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>SubDevices</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str-sonic-lc04-ASIC00</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>SiblingLineCards</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str-sonic-lc03;str-sonic-lc05;str-sonic-lc06;str-sonic-lc07;str-sonic-lc08;str-sonic-lc09;str-sonic-lc10</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Group</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str-sonic</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>DcCode</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>STR</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>CloudType</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Public</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Location</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>TBD</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Function</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>LabTest</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>DeploymentId</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>3</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>SonicEnabled</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>True</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Region</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>test</a:Value>
+          </a:DeviceProperty>
+        </a:Properties>
+      </a:DeviceMetadata>
+      <a:DeviceMetadata>
+        <a:Name>str-sonic-lc05</a:Name>
+        <a:Properties>
+          <a:DeviceProperty>
+            <a:Name>FirmwareProfile</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>SONiC-Sonic-lc-100g-sku-lc</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>ForwardingMethod</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>VoQ</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>SlotIndex</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>5</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>TotalCountOfVoQ</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>8</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>MaxCountOfCores</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>64</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>MacSecEnabled</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>False</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>OsVersion</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>SONiC.20220532.60</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>ParentRouter</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str-sonic</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>SubDevices</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str-sonic-lc05-ASIC00</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>SiblingLineCards</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str-sonic-lc03;str-sonic-lc04;str-sonic-lc06;str-sonic-lc07;str-sonic-lc08;str-sonic-lc09;str-sonic-lc10</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Group</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str-sonic</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>DcCode</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>STR</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>CloudType</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Public</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Location</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>TBD</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Function</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>LabTest</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>DeploymentId</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>3</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>SonicEnabled</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>True</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Region</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>test</a:Value>
+          </a:DeviceProperty>
+        </a:Properties>
+      </a:DeviceMetadata>
+      <a:DeviceMetadata>
+        <a:Name>str-sonic-lc07</a:Name>
+        <a:Properties>
+          <a:DeviceProperty>
+            <a:Name>FirmwareProfile</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>SONiC-Sonic-lc-100g-sku-lc</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>ForwardingMethod</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>VoQ</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>SlotIndex</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>7</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>TotalCountOfVoQ</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>8</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>MaxCountOfCores</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>64</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>MacSecEnabled</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>False</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>OsVersion</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>SONiC.20220532.60</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>ParentRouter</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str-sonic</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>SubDevices</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str-sonic-lc07-ASIC00</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>SiblingLineCards</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str-sonic-lc03;str-sonic-lc04;str-sonic-lc05;str-sonic-lc06;str-sonic-lc08;str-sonic-lc09;str-sonic-lc10</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Group</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str-sonic</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>DcCode</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>STR</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>CloudType</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Public</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Location</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>TBD</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Function</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>LabTest</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>DeploymentId</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>3</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>SonicEnabled</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>True</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Region</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>test</a:Value>
+          </a:DeviceProperty>
+        </a:Properties>
+      </a:DeviceMetadata>
+      <a:DeviceMetadata>
+        <a:Name>str-sonic-lc08</a:Name>
+        <a:Properties>
+          <a:DeviceProperty>
+            <a:Name>FirmwareProfile</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>SONiC-Sonic-lc-100g-sku-lc</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>ForwardingMethod</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>VoQ</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>SlotIndex</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>8</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>TotalCountOfVoQ</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>8</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>MaxCountOfCores</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>64</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>MacSecEnabled</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>False</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>OsVersion</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>SONiC.20220532.60</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>ParentRouter</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str-sonic</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>SubDevices</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str-sonic-lc08-ASIC00</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>SiblingLineCards</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str-sonic-lc03;str-sonic-lc04;str-sonic-lc05;str-sonic-lc06;str-sonic-lc07;str-sonic-lc09;str-sonic-lc10</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Group</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str-sonic</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>DcCode</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>STR</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>CloudType</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Public</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Location</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>TBD</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Function</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>LabTest</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>DeploymentId</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>3</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>SonicEnabled</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>True</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Region</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>test</a:Value>
+          </a:DeviceProperty>
+        </a:Properties>
+      </a:DeviceMetadata>
+      <a:DeviceMetadata>
+        <a:Name>str-sonic-lc09</a:Name>
+        <a:Properties>
+          <a:DeviceProperty>
+            <a:Name>FirmwareProfile</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>SONiC-Sonic-lc-100g-sku-lc</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>ForwardingMethod</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>VoQ</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>SlotIndex</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>9</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>TotalCountOfVoQ</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>8</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>MaxCountOfCores</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>64</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>MacSecEnabled</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>False</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>ParentRouter</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str-sonic</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>SubDevices</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str-sonic-lc09-ASIC00</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>SiblingLineCards</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str-sonic-lc03;str-sonic-lc04;str-sonic-lc05;str-sonic-lc06;str-sonic-lc07;str-sonic-lc08;str-sonic-lc10</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Group</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str-sonic</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>DcCode</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>STR</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>CloudType</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Public</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Location</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>TBD</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Function</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>LabTest</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>DeploymentId</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>3</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>SonicEnabled</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>True</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Region</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>test</a:Value>
+          </a:DeviceProperty>
+        </a:Properties>
+      </a:DeviceMetadata>
+      <a:DeviceMetadata>
+        <a:Name>str-sonic-lc10</a:Name>
+        <a:Properties>
+          <a:DeviceProperty>
+            <a:Name>FirmwareProfile</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>SONiC-Sonic-lc-100g-sku-lc</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>ForwardingMethod</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>VoQ</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>SlotIndex</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>10</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>TotalCountOfVoQ</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>8</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>MaxCountOfCores</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>64</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>MacSecEnabled</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>False</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>OsVersion</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>SONiC.20220532.60</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>ParentRouter</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str-sonic</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>SubDevices</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str-sonic-lc10-ASIC00</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>SiblingLineCards</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str-sonic-lc03;str-sonic-lc04;str-sonic-lc05;str-sonic-lc06;str-sonic-lc07;str-sonic-lc08;str-sonic-lc09</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Group</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str-sonic</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>DcCode</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>STR</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>CloudType</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Public</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Location</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>TBD</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Function</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>LabTest</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>DeploymentId</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>3</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>SonicEnabled</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>True</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Region</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>test</a:Value>
+          </a:DeviceProperty>
+        </a:Properties>
+      </a:DeviceMetadata>
+      <a:DeviceMetadata>
+        <a:Name>str-sonic-lc06-ASIC00</a:Name>
+        <a:Properties>
+          <a:DeviceProperty>
+            <a:Name>ForwardingMethod</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>VoQ</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>SubRole</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>FrontEnd</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>AsicSwitchId</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>20</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>ProviderLineCard</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str-sonic-lc06</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Group</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str-sonic</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>DcCode</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>STR</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>CloudType</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Public</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Location</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>TBD</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Function</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>LabTest</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>DeploymentId</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>3</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>SonicEnabled</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>True</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Region</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>test</a:Value>
+          </a:DeviceProperty>
+        </a:Properties>
+      </a:DeviceMetadata>
+      <a:DeviceMetadata>
+        <a:Name>str-sonic-lc06</a:Name>
+        <a:Properties>
+          <a:DeviceProperty>
+            <a:Name>FirmwareProfile</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>SONiC-Sonic-lc-100g-sku-lc</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>ForwardingMethod</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>VoQ</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>SlotIndex</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>6</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>TotalCountOfVoQ</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>8</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>MaxCountOfCores</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>64</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>MacSecEnabled</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>False</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>OsVersion</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>SONiC.20220532.60</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>ParentRouter</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str-sonic</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>SubDevices</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str-sonic-lc06-ASIC00</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>SiblingLineCards</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str-sonic-lc03;str-sonic-lc04;str-sonic-lc05;str-sonic-lc07;str-sonic-lc08;str-sonic-lc09;str-sonic-lc10</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Group</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str-sonic</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>DcCode</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>STR</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>CloudType</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Public</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Location</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>TBD</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Function</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>LabTest</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>DeploymentId</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>3</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>SonicEnabled</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>True</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Region</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>test</a:Value>
+          </a:DeviceProperty>
+        </a:Properties>
+      </a:DeviceMetadata>
+      <a:DeviceMetadata>
+        <a:Name>str-sonic</a:Name>
+        <a:Properties>
+          <a:DeviceProperty>
+            <a:Name>CloudType</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Public</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>ConfigDbAclFile</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>SonicNativeAcl.liquid</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>ConfigTemplateFile</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Sonic.xml</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>DNSServers</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>10.64.5.5;10.64.6.6;10.64.6.7</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>DcCode</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>STR</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>DeploymentId</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>3</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>EnableStreamingTelemetry</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>true</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>ErspanDestinationIpv4</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>10.20.6.4</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>FirmwareProfile</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>sonic-T2-profile</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Function</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>LabTest</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Group</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str:542907040</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>InitConfigTemplateFile</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Sonic.init.xml</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Location</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>TBD</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Loopback0Ipv4</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>10.2.0.1/32;10.2.0.2/32;10.2.0.3/32;10.2.0.4/32</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Loopback0Ipv6</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>fc00:20::1/128;fc00:21::1/128;fc00:22::1/128;fc00:23::1/128</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Loopback4096Ipv4</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>192.0.0.1/32;192.0.0.2/32;192.0.0.8/32;192.0.0.9/32</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Loopback4096Ipv6</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>2603:10e2:400::1/128;2603:10e2:400::2/128;2603:10e2:400::8/128;2603:10e2:400::9/128</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>MacSecEnabled</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>True</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>MacSecProfile</a:Name>
+            <a:Reference>usstagee.Sonic.MacSec</a:Reference>
+            <a:Value>PrimaryKey="macsec-profile-two" FallbackKey="macsec-profile" MacsecPolicy=""</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>ManagementIpv4</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>10.3.146.58/24;10.3.146.71/24;10.3.146.72/24;10.3.146.74/24;10.3.146.75/24;10.3.146.80/24;10.3.146.81/24;10.3.146.83/24</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>ManagementIpv6</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>2a01:111:e210:3000::a03:923a/64;2a01:111:e210:3000::a03:9247/64;2a01:111:e210:3000::a03:9248/64;2a01:111:e210:3000::a03:924a/64;2a01:111:e210:3000::a03:924b/64;2a01:111:e210:3000::a03:9250/64;2a01:111:e210:3000::a03:9251/64;2a01:111:e210:3000::a03:9253/64</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>MaxCountOfCores</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>64</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>NtpResources</a:Name>
+            <a:Reference>Public.Ntp</a:Reference>
+            <a:Value>17.39.1.130;17.39.1.129</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>QosProfile</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>VerlaineLongHaul</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>RemoteAuthenticationProtocol</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Tacacs</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>SnmpResources</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>10.52.180.161;10.3.157.12</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>SonicConfigTemplateFile</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Sonic.xml</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>SonicEnabled</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>True</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>SyslogResources</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>10.52.180.161;10.3.157.12</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>SyslogServer</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>10.20.4.167;10.20.7.33;10.20.6.16;10.20.6.84</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>TacacsKey</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>$Secrets.TacacsKey</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>TacacsSecurityLevel</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>7</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>TacacsServer</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>123.46.98.21</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>TotalCountOfVoQ</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>8</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Region</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>test</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>ChassisEnabled</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>true</a:Value>
+          </a:DeviceProperty>
+        </a:Properties>
+      </a:DeviceMetadata>
+    </Devices>
+    <Properties xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+  </MetadataDeclaration>
+  <PngDec>
+    <DeviceInterfaceLinks>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth184</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth384</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth178</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth385</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth172</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth386</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth186</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth387</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+        <EndPort>Eth186</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth388</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+        <EndPort>Eth172</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth389</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+        <EndPort>Eth184</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth390</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+        <EndPort>Eth178</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth391</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth151</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth392</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth169</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth393</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth179</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth394</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth168</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth395</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+        <EndPort>Eth179</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth396</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+        <EndPort>Eth164</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth397</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+        <EndPort>Eth169</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth398</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+        <EndPort>Eth170</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth399</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth169</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth400</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth181</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth401</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth164</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth402</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth160</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth403</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+        <EndPort>Eth182</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth404</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+        <EndPort>Eth172</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth405</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+        <EndPort>Eth160</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth406</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+        <EndPort>Eth181</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth407</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth177</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth408</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth173</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth409</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth182</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth410</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth172</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth411</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+        <EndPort>Eth169</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth412</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+        <EndPort>Eth177</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth413</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+        <EndPort>Eth173</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth414</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+        <EndPort>Eth188</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth415</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth178</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth416</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth187</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth417</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth184</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth418</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth188</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth419</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+        <EndPort>Eth187</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth420</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth184</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth421</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+        <EndPort>Eth184</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth422</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth178</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth423</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth184</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth424</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth186</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth425</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth172</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth426</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth169</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth427</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth172</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth428</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth170</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth429</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth186</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth430</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth169</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth431</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth173</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth432</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth179</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth433</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth160</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth434</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth151</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth435</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth164</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth436</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth179</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth437</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth151</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth438</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth160</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth439</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+        <EndPort>Eth177</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth440</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+        <EndPort>Eth188</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth441</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+        <EndPort>Eth187</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth442</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+        <EndPort>Eth184</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth443</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+        <EndPort>Eth182</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth444</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+        <EndPort>Eth169</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth445</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+        <EndPort>Eth173</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth446</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+        <EndPort>Eth172</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth447</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth179</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth448</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth160</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth449</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth164</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth450</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth181</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth451</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth169</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth464</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth168</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth465</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth151</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth466</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth172</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth467</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth178</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth472</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth184</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth473</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth186</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth474</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth184</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth475</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth187</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth476</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth184</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth479</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth177</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth480</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth187</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth481</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth182</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth482</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth188</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth483</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth188</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth484</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth177</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth485</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth182</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth486</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth173</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth487</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth181</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth488</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth173</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth489</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth172</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth490</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth169</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth491</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth172</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth492</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth164</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth493</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth169</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth494</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth181</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth495</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="DeviceInterfaceLink">
+        <ElementType>DeviceInterfaceLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>true</ChassisInternal>
+        <EndDevice>str-sonic-lc06-ASIC00</EndDevice>
+        <EndPort>Eth0</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>ARISTA33T1</StartDevice>
+        <StartPort>Ethernet1</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="DeviceInterfaceLink">
+        <ElementType>DeviceInterfaceLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>true</ChassisInternal>
+        <EndDevice>str-sonic-lc06-ASIC00</EndDevice>
+        <EndPort>Eth4</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>ARISTA33T1</StartDevice>
+        <StartPort>Ethernet2</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="DeviceInterfaceLink">
+        <ElementType>DeviceInterfaceLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>true</ChassisInternal>
+        <EndDevice>str-sonic-lc06-ASIC00</EndDevice>
+        <EndPort>Eth8</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>ARISTA35T1</StartDevice>
+        <StartPort>Ethernet1</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="DeviceInterfaceLink">
+        <ElementType>DeviceInterfaceLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>true</ChassisInternal>
+        <EndDevice>str-sonic-lc06-ASIC00</EndDevice>
+        <EndPort>Eth12</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>ARISTA35T1</StartDevice>
+        <StartPort>Ethernet2</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="DeviceInterfaceLink">
+        <ElementType>DeviceInterfaceLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>true</ChassisInternal>
+        <EndDevice>str-sonic-lc06-ASIC00</EndDevice>
+        <EndPort>Eth16</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>ARISTA37T1</StartDevice>
+        <StartPort>Ethernet1</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="DeviceInterfaceLink">
+        <ElementType>DeviceInterfaceLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>true</ChassisInternal>
+        <EndDevice>str-sonic-lc06-ASIC00</EndDevice>
+        <EndPort>Eth20</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>ARISTA37T1</StartDevice>
+        <StartPort>Ethernet2</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="DeviceInterfaceLink">
+        <ElementType>DeviceInterfaceLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>true</ChassisInternal>
+        <EndDevice>str-sonic-lc06-ASIC00</EndDevice>
+        <EndPort>Eth24</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>ARISTA39T1</StartDevice>
+        <StartPort>Ethernet1</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="DeviceInterfaceLink">
+        <ElementType>DeviceInterfaceLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>true</ChassisInternal>
+        <EndDevice>str-sonic-lc06-ASIC00</EndDevice>
+        <EndPort>Eth28</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>ARISTA39T1</StartDevice>
+        <StartPort>Ethernet2</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="DeviceInterfaceLink">
+        <ElementType>DeviceInterfaceLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>true</ChassisInternal>
+        <EndDevice>str-sonic-lc06-ASIC00</EndDevice>
+        <EndPort>Eth32</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>ARISTA41T1</StartDevice>
+        <StartPort>Ethernet1</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="DeviceInterfaceLink">
+        <ElementType>DeviceInterfaceLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>true</ChassisInternal>
+        <EndDevice>str-sonic-lc06-ASIC00</EndDevice>
+        <EndPort>Eth36</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>ARISTA41T1</StartDevice>
+        <StartPort>Ethernet2</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="DeviceInterfaceLink">
+        <ElementType>DeviceInterfaceLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>true</ChassisInternal>
+        <EndDevice>str-sonic-lc06-ASIC00</EndDevice>
+        <EndPort>Eth40</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>ARISTA43T1</StartDevice>
+        <StartPort>Ethernet1</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="DeviceInterfaceLink">
+        <ElementType>DeviceInterfaceLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>true</ChassisInternal>
+        <EndDevice>str-sonic-lc06-ASIC00</EndDevice>
+        <EndPort>Eth44</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>ARISTA43T1</StartDevice>
+        <StartPort>Ethernet2</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="DeviceInterfaceLink">
+        <ElementType>DeviceInterfaceLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>true</ChassisInternal>
+        <EndDevice>str-sonic-lc06-ASIC00</EndDevice>
+        <EndPort>Eth48</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>ARISTA45T1</StartDevice>
+        <StartPort>Ethernet1</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="DeviceInterfaceLink">
+        <ElementType>DeviceInterfaceLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>true</ChassisInternal>
+        <EndDevice>str-sonic-lc06-ASIC00</EndDevice>
+        <EndPort>Eth52</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>ARISTA47T1</StartDevice>
+        <StartPort>Ethernet1</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="DeviceInterfaceLink">
+        <ElementType>DeviceInterfaceLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>true</ChassisInternal>
+        <EndDevice>str-sonic-lc06-ASIC00</EndDevice>
+        <EndPort>Eth56</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>ARISTA47T1</StartDevice>
+        <StartPort>Ethernet2</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="DeviceInterfaceLink">
+        <ElementType>DeviceInterfaceLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>true</ChassisInternal>
+        <EndDevice>str-sonic-lc06-ASIC00</EndDevice>
+        <EndPort>Eth60</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>ARISTA49T1</StartDevice>
+        <StartPort>Ethernet1</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="DeviceInterfaceLink">
+        <ElementType>DeviceInterfaceLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>true</ChassisInternal>
+        <EndDevice>str-sonic-lc06-ASIC00</EndDevice>
+        <EndPort>Eth64</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>ARISTA50T1</StartDevice>
+        <StartPort>Ethernet1</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="DeviceInterfaceLink">
+        <ElementType>DeviceInterfaceLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>true</ChassisInternal>
+        <EndDevice>str-sonic-lc06-ASIC00</EndDevice>
+        <EndPort>Eth68</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>ARISTA50T1</StartDevice>
+        <StartPort>Ethernet2</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="DeviceInterfaceLink">
+        <ElementType>DeviceInterfaceLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>true</ChassisInternal>
+        <EndDevice>str-sonic-lc06-ASIC00</EndDevice>
+        <EndPort>Eth72</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>ARISTA51T1</StartDevice>
+        <StartPort>Ethernet1</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="DeviceInterfaceLink">
+        <ElementType>DeviceInterfaceLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>true</ChassisInternal>
+        <EndDevice>str-sonic-lc06-ASIC00</EndDevice>
+        <EndPort>Eth76</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>ARISTA52T1</StartDevice>
+        <StartPort>Ethernet1</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="DeviceInterfaceLink">
+        <ElementType>DeviceInterfaceLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>true</ChassisInternal>
+        <EndDevice>str-sonic-lc06-ASIC00</EndDevice>
+        <EndPort>Eth80</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>ARISTA53T1</StartDevice>
+        <StartPort>Ethernet1</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="DeviceInterfaceLink">
+        <ElementType>DeviceInterfaceLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>true</ChassisInternal>
+        <EndDevice>str-sonic-lc06-ASIC00</EndDevice>
+        <EndPort>Eth84</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>ARISTA54T1</StartDevice>
+        <StartPort>Ethernet1</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="DeviceInterfaceLink">
+        <ElementType>DeviceInterfaceLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>true</ChassisInternal>
+        <EndDevice>str-sonic-lc06-ASIC00</EndDevice>
+        <EndPort>Eth88</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>ARISTA55T1</StartDevice>
+        <StartPort>Ethernet1</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="DeviceInterfaceLink">
+        <ElementType>DeviceInterfaceLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>true</ChassisInternal>
+        <EndDevice>str-sonic-lc06-ASIC00</EndDevice>
+        <EndPort>Eth92</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>ARISTA56T1</StartDevice>
+        <StartPort>Ethernet1</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="DeviceInterfaceLink">
+        <ElementType>DeviceInterfaceLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>true</ChassisInternal>
+        <EndDevice>str-sonic-lc06-ASIC00</EndDevice>
+        <EndPort>Eth96</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>ARISTA57T1</StartDevice>
+        <StartPort>Ethernet1</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="DeviceInterfaceLink">
+        <ElementType>DeviceInterfaceLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>true</ChassisInternal>
+        <EndDevice>str-sonic-lc06-ASIC00</EndDevice>
+        <EndPort>Eth100</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>ARISTA58T1</StartDevice>
+        <StartPort>Ethernet1</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="DeviceInterfaceLink">
+        <ElementType>DeviceInterfaceLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>true</ChassisInternal>
+        <EndDevice>str-sonic-lc06-ASIC00</EndDevice>
+        <EndPort>Eth104</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>ARISTA59T1</StartDevice>
+        <StartPort>Ethernet1</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="DeviceInterfaceLink">
+        <ElementType>DeviceInterfaceLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>true</ChassisInternal>
+        <EndDevice>str-sonic-lc06-ASIC00</EndDevice>
+        <EndPort>Eth108</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>ARISTA60T1</StartDevice>
+        <StartPort>Ethernet1</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="DeviceInterfaceLink">
+        <ElementType>DeviceInterfaceLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>true</ChassisInternal>
+        <EndDevice>str-sonic-lc06-ASIC00</EndDevice>
+        <EndPort>Eth112</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>ARISTA61T1</StartDevice>
+        <StartPort>Ethernet1</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="DeviceInterfaceLink">
+        <ElementType>DeviceInterfaceLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>true</ChassisInternal>
+        <EndDevice>str-sonic-lc06-ASIC00</EndDevice>
+        <EndPort>Eth116</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>ARISTA62T1</StartDevice>
+        <StartPort>Ethernet1</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="DeviceInterfaceLink">
+        <ElementType>DeviceInterfaceLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>true</ChassisInternal>
+        <EndDevice>str-sonic-lc06-ASIC00</EndDevice>
+        <EndPort>Eth120</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>ARISTA63T1</StartDevice>
+        <StartPort>Ethernet1</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="DeviceInterfaceLink">
+        <ElementType>DeviceInterfaceLink</ElementType>
+        <Bandwidth>100000</Bandwidth>
+        <ChassisInternal>true</ChassisInternal>
+        <EndDevice>str-sonic-lc06-ASIC00</EndDevice>
+        <EndPort>Eth124</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>ARISTA64T1</StartDevice>
+        <StartPort>Ethernet1</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="DeviceSerialLink">
+        <ElementType>DeviceSerialLink</ElementType>
+        <Bandwidth>9600</Bandwidth>
+        <ChassisInternal>true</ChassisInternal>
+        <EndDevice>str-sonic-sup00</EndDevice>
+        <EndPort>logical6</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06</StartDevice>
+        <StartPort>logical</StartPort>
+        <Validate>true</Validate>
+        <TcpPortName>6</TcpPortName>
+      </DeviceLinkBase>
+    </DeviceInterfaceLinks>
+    <Devices>
+      <Device i:type="LinecardAsic">
+        <ElementType>LinecardAsic</ElementType>
+        <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+        </Address>
+        <AddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>::/0</a:IPPrefix>
+        </AddressV6>
+        <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
+        <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+        <AssociatedTagsStr/>
+        <ChassisInternalDevices/>
+        <ClusterName>TestbedForstr-sonic</ClusterName>
+        <DeploymentId>3</DeploymentId>
+        <DeviceLocation i:nil="true"/>
+        <HomeDatacenter>STARLab</HomeDatacenter>
+        <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+        </ManagementAddress>
+        <ManagementAddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>::/0</a:IPPrefix>
+        </ManagementAddressV6>
+        <NodeId i:nil="true"/>
+        <SerialNumber i:nil="true"/>
+        <Hostname>str-sonic-lc06-ASIC00</Hostname>
+        <HwSku>Broadcom-Jericho2</HwSku>
+      </Device>
+      <Device i:type="FabricAsic">
+        <ElementType>FabricAsic</ElementType>
+        <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+        </Address>
+        <AddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>::/0</a:IPPrefix>
+        </AddressV6>
+        <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
+        <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+        <AssociatedTagsStr/>
+        <ChassisInternalDevices/>
+        <ClusterName>TestbedForstr-sonic</ClusterName>
+        <DeploymentId>3</DeploymentId>
+        <DeviceLocation i:nil="true"/>
+        <HomeDatacenter>STARLab</HomeDatacenter>
+        <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+        </ManagementAddress>
+        <ManagementAddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>::/0</a:IPPrefix>
+        </ManagementAddressV6>
+        <NodeId i:nil="true"/>
+        <SerialNumber i:nil="true"/>
+        <Hostname>str-sonic-sup00-ASIC08</Hostname>
+        <HwSku>Broadcom-Ramon</HwSku>
+      </Device>
+      <Device i:type="FabricAsic">
+        <ElementType>FabricAsic</ElementType>
+        <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+        </Address>
+        <AddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>::/0</a:IPPrefix>
+        </AddressV6>
+        <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
+        <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+        <AssociatedTagsStr/>
+        <ChassisInternalDevices/>
+        <ClusterName>TestbedForstr-sonic</ClusterName>
+        <DeploymentId>3</DeploymentId>
+        <DeviceLocation i:nil="true"/>
+        <HomeDatacenter>STARLab</HomeDatacenter>
+        <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+        </ManagementAddress>
+        <ManagementAddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>::/0</a:IPPrefix>
+        </ManagementAddressV6>
+        <NodeId i:nil="true"/>
+        <SerialNumber i:nil="true"/>
+        <Hostname>str-sonic-sup00-ASIC02</Hostname>
+        <HwSku>Broadcom-Ramon</HwSku>
+      </Device>
+      <Device i:type="FabricAsic">
+        <ElementType>FabricAsic</ElementType>
+        <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+        </Address>
+        <AddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>::/0</a:IPPrefix>
+        </AddressV6>
+        <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
+        <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+        <AssociatedTagsStr/>
+        <ChassisInternalDevices/>
+        <ClusterName>TestbedForstr-sonic</ClusterName>
+        <DeploymentId>3</DeploymentId>
+        <DeviceLocation i:nil="true"/>
+        <HomeDatacenter>STARLab</HomeDatacenter>
+        <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+        </ManagementAddress>
+        <ManagementAddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>::/0</a:IPPrefix>
+        </ManagementAddressV6>
+        <NodeId i:nil="true"/>
+        <SerialNumber i:nil="true"/>
+        <Hostname>str-sonic-sup00-ASIC09</Hostname>
+        <HwSku>Broadcom-Ramon</HwSku>
+      </Device>
+      <Device i:type="FabricAsic">
+        <ElementType>FabricAsic</ElementType>
+        <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+        </Address>
+        <AddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>::/0</a:IPPrefix>
+        </AddressV6>
+        <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
+        <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+        <AssociatedTagsStr/>
+        <ChassisInternalDevices/>
+        <ClusterName>TestbedForstr-sonic</ClusterName>
+        <DeploymentId>3</DeploymentId>
+        <DeviceLocation i:nil="true"/>
+        <HomeDatacenter>STARLab</HomeDatacenter>
+        <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+        </ManagementAddress>
+        <ManagementAddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>::/0</a:IPPrefix>
+        </ManagementAddressV6>
+        <NodeId i:nil="true"/>
+        <SerialNumber i:nil="true"/>
+        <Hostname>str-sonic-sup00-ASIC03</Hostname>
+        <HwSku>Broadcom-Ramon</HwSku>
+      </Device>
+      <Device i:type="FabricAsic">
+        <ElementType>FabricAsic</ElementType>
+        <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+        </Address>
+        <AddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>::/0</a:IPPrefix>
+        </AddressV6>
+        <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
+        <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+        <AssociatedTagsStr/>
+        <ChassisInternalDevices/>
+        <ClusterName>TestbedForstr-sonic</ClusterName>
+        <DeploymentId>3</DeploymentId>
+        <DeviceLocation i:nil="true"/>
+        <HomeDatacenter>STARLab</HomeDatacenter>
+        <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+        </ManagementAddress>
+        <ManagementAddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>::/0</a:IPPrefix>
+        </ManagementAddressV6>
+        <NodeId i:nil="true"/>
+        <SerialNumber i:nil="true"/>
+        <Hostname>str-sonic-sup00-ASIC10</Hostname>
+        <HwSku>Broadcom-Ramon</HwSku>
+      </Device>
+      <Device i:type="FabricAsic">
+        <ElementType>FabricAsic</ElementType>
+        <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+        </Address>
+        <AddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>::/0</a:IPPrefix>
+        </AddressV6>
+        <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
+        <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+        <AssociatedTagsStr/>
+        <ChassisInternalDevices/>
+        <ClusterName>TestbedForstr-sonic</ClusterName>
+        <DeploymentId>3</DeploymentId>
+        <DeviceLocation i:nil="true"/>
+        <HomeDatacenter>STARLab</HomeDatacenter>
+        <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+        </ManagementAddress>
+        <ManagementAddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>::/0</a:IPPrefix>
+        </ManagementAddressV6>
+        <NodeId i:nil="true"/>
+        <SerialNumber i:nil="true"/>
+        <Hostname>str-sonic-sup00-ASIC04</Hostname>
+        <HwSku>Broadcom-Ramon</HwSku>
+      </Device>
+      <Device i:type="FabricAsic">
+        <ElementType>FabricAsic</ElementType>
+        <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+        </Address>
+        <AddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>::/0</a:IPPrefix>
+        </AddressV6>
+        <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
+        <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+        <AssociatedTagsStr/>
+        <ChassisInternalDevices/>
+        <ClusterName>TestbedForstr-sonic</ClusterName>
+        <DeploymentId>3</DeploymentId>
+        <DeviceLocation i:nil="true"/>
+        <HomeDatacenter>STARLab</HomeDatacenter>
+        <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+        </ManagementAddress>
+        <ManagementAddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>::/0</a:IPPrefix>
+        </ManagementAddressV6>
+        <NodeId i:nil="true"/>
+        <SerialNumber i:nil="true"/>
+        <Hostname>str-sonic-sup00-ASIC07</Hostname>
+        <HwSku>Broadcom-Ramon</HwSku>
+      </Device>
+      <Device i:type="FabricAsic">
+        <ElementType>FabricAsic</ElementType>
+        <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+        </Address>
+        <AddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>::/0</a:IPPrefix>
+        </AddressV6>
+        <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
+        <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+        <AssociatedTagsStr/>
+        <ChassisInternalDevices/>
+        <ClusterName>TestbedForstr-sonic</ClusterName>
+        <DeploymentId>3</DeploymentId>
+        <DeviceLocation i:nil="true"/>
+        <HomeDatacenter>STARLab</HomeDatacenter>
+        <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+        </ManagementAddress>
+        <ManagementAddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>::/0</a:IPPrefix>
+        </ManagementAddressV6>
+        <NodeId i:nil="true"/>
+        <SerialNumber i:nil="true"/>
+        <Hostname>str-sonic-sup00-ASIC06</Hostname>
+        <HwSku>Broadcom-Ramon</HwSku>
+      </Device>
+      <Device i:type="FabricAsic">
+        <ElementType>FabricAsic</ElementType>
+        <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+        </Address>
+        <AddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>::/0</a:IPPrefix>
+        </AddressV6>
+        <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
+        <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+        <AssociatedTagsStr/>
+        <ChassisInternalDevices/>
+        <ClusterName>TestbedForstr-sonic</ClusterName>
+        <DeploymentId>3</DeploymentId>
+        <DeviceLocation i:nil="true"/>
+        <HomeDatacenter>STARLab</HomeDatacenter>
+        <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+        </ManagementAddress>
+        <ManagementAddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>::/0</a:IPPrefix>
+        </ManagementAddressV6>
+        <NodeId i:nil="true"/>
+        <SerialNumber i:nil="true"/>
+        <Hostname>str-sonic-sup00-ASIC05</Hostname>
+        <HwSku>Broadcom-Ramon</HwSku>
+      </Device>
+      <Device i:type="FabricAsic">
+        <ElementType>FabricAsic</ElementType>
+        <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+        </Address>
+        <AddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>::/0</a:IPPrefix>
+        </AddressV6>
+        <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
+        <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+        <AssociatedTagsStr/>
+        <ChassisInternalDevices/>
+        <ClusterName>TestbedForstr-sonic</ClusterName>
+        <DeploymentId>3</DeploymentId>
+        <DeviceLocation i:nil="true"/>
+        <HomeDatacenter>STARLab</HomeDatacenter>
+        <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+        </ManagementAddress>
+        <ManagementAddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>::/0</a:IPPrefix>
+        </ManagementAddressV6>
+        <NodeId i:nil="true"/>
+        <SerialNumber i:nil="true"/>
+        <Hostname>str-sonic-sup00-ASIC11</Hostname>
+        <HwSku>Broadcom-Ramon</HwSku>
+      </Device>
+      <Device i:type="LeafRouter">
+        <ElementType>LeafRouter</ElementType>
+        <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+        </Address>
+        <AddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>::/0</a:IPPrefix>
+        </AddressV6>
+        <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
+        <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+        <AssociatedTagsStr>None</AssociatedTagsStr>
+        <ChassisInternalDevices/>
+        <ClusterName>TestbedForstr-sonic</ClusterName>
+        <DeploymentId>3</DeploymentId>
+        <DeviceLocation i:nil="true"/>
+        <HomeDatacenter>STARLab</HomeDatacenter>
+        <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>172.16.191.58/17</a:IPPrefix>
+        </ManagementAddress>
+        <ManagementAddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>::/0</a:IPPrefix>
+        </ManagementAddressV6>
+        <NodeId i:nil="true"/>
+        <SerialNumber i:nil="true"/>
+        <Hostname>ARISTA33T1</Hostname>
+        <HwSku>Sonic-T1-sku</HwSku>
+      </Device>
+      <Device i:type="LeafRouter">
+        <ElementType>LeafRouter</ElementType>
+        <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+        </Address>
+        <AddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>::/0</a:IPPrefix>
+        </AddressV6>
+        <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
+        <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+        <AssociatedTagsStr>None</AssociatedTagsStr>
+        <ChassisInternalDevices/>
+        <ClusterName>TestbedForstr-sonic</ClusterName>
+        <DeploymentId>3</DeploymentId>
+        <DeviceLocation i:nil="true"/>
+        <HomeDatacenter>STARLab</HomeDatacenter>
+        <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>172.16.191.59/17</a:IPPrefix>
+        </ManagementAddress>
+        <ManagementAddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>::/0</a:IPPrefix>
+        </ManagementAddressV6>
+        <NodeId i:nil="true"/>
+        <SerialNumber i:nil="true"/>
+        <Hostname>ARISTA35T1</Hostname>
+        <HwSku>Sonic-T1-sku</HwSku>
+      </Device>
+      <Device i:type="LeafRouter">
+        <ElementType>LeafRouter</ElementType>
+        <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+        </Address>
+        <AddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>::/0</a:IPPrefix>
+        </AddressV6>
+        <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
+        <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+        <AssociatedTagsStr>None</AssociatedTagsStr>
+        <ChassisInternalDevices/>
+        <ClusterName>TestbedForstr-sonic</ClusterName>
+        <DeploymentId>3</DeploymentId>
+        <DeviceLocation i:nil="true"/>
+        <HomeDatacenter>STARLab</HomeDatacenter>
+        <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>172.16.191.60/17</a:IPPrefix>
+        </ManagementAddress>
+        <ManagementAddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>::/0</a:IPPrefix>
+        </ManagementAddressV6>
+        <NodeId i:nil="true"/>
+        <SerialNumber i:nil="true"/>
+        <Hostname>ARISTA37T1</Hostname>
+        <HwSku>Sonic-T1-sku</HwSku>
+      </Device>
+      <Device i:type="LeafRouter">
+        <ElementType>LeafRouter</ElementType>
+        <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+        </Address>
+        <AddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>::/0</a:IPPrefix>
+        </AddressV6>
+        <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
+        <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+        <AssociatedTagsStr>None</AssociatedTagsStr>
+        <ChassisInternalDevices/>
+        <ClusterName>TestbedForstr-sonic</ClusterName>
+        <DeploymentId>3</DeploymentId>
+        <DeviceLocation i:nil="true"/>
+        <HomeDatacenter>STARLab</HomeDatacenter>
+        <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>172.16.191.61/17</a:IPPrefix>
+        </ManagementAddress>
+        <ManagementAddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>::/0</a:IPPrefix>
+        </ManagementAddressV6>
+        <NodeId i:nil="true"/>
+        <SerialNumber i:nil="true"/>
+        <Hostname>ARISTA39T1</Hostname>
+        <HwSku>Sonic-T1-sku</HwSku>
+      </Device>
+      <Device i:type="LeafRouter">
+        <ElementType>LeafRouter</ElementType>
+        <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+        </Address>
+        <AddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>::/0</a:IPPrefix>
+        </AddressV6>
+        <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
+        <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+        <AssociatedTagsStr>None</AssociatedTagsStr>
+        <ChassisInternalDevices/>
+        <ClusterName>TestbedForstr-sonic</ClusterName>
+        <DeploymentId>3</DeploymentId>
+        <DeviceLocation i:nil="true"/>
+        <HomeDatacenter>STARLab</HomeDatacenter>
+        <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>172.16.191.62/17</a:IPPrefix>
+        </ManagementAddress>
+        <ManagementAddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>::/0</a:IPPrefix>
+        </ManagementAddressV6>
+        <NodeId i:nil="true"/>
+        <SerialNumber i:nil="true"/>
+        <Hostname>ARISTA41T1</Hostname>
+        <HwSku>Sonic-T1-sku</HwSku>
+      </Device>
+      <Device i:type="LeafRouter">
+        <ElementType>LeafRouter</ElementType>
+        <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+        </Address>
+        <AddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>::/0</a:IPPrefix>
+        </AddressV6>
+        <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
+        <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+        <AssociatedTagsStr>None</AssociatedTagsStr>
+        <ChassisInternalDevices/>
+        <ClusterName>TestbedForstr-sonic</ClusterName>
+        <DeploymentId>3</DeploymentId>
+        <DeviceLocation i:nil="true"/>
+        <HomeDatacenter>STARLab</HomeDatacenter>
+        <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>172.16.191.63/17</a:IPPrefix>
+        </ManagementAddress>
+        <ManagementAddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>::/0</a:IPPrefix>
+        </ManagementAddressV6>
+        <NodeId i:nil="true"/>
+        <SerialNumber i:nil="true"/>
+        <Hostname>ARISTA43T1</Hostname>
+        <HwSku>Sonic-T1-sku</HwSku>
+      </Device>
+      <Device i:type="LeafRouter">
+        <ElementType>LeafRouter</ElementType>
+        <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+        </Address>
+        <AddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>::/0</a:IPPrefix>
+        </AddressV6>
+        <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
+        <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+        <AssociatedTagsStr>None</AssociatedTagsStr>
+        <ChassisInternalDevices/>
+        <ClusterName>TestbedForstr-sonic</ClusterName>
+        <DeploymentId>3</DeploymentId>
+        <DeviceLocation i:nil="true"/>
+        <HomeDatacenter>STARLab</HomeDatacenter>
+        <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>172.16.191.64/17</a:IPPrefix>
+        </ManagementAddress>
+        <ManagementAddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>::/0</a:IPPrefix>
+        </ManagementAddressV6>
+        <NodeId i:nil="true"/>
+        <SerialNumber i:nil="true"/>
+        <Hostname>ARISTA45T1</Hostname>
+        <HwSku>Sonic-T1-sku</HwSku>
+      </Device>
+      <Device i:type="LeafRouter">
+        <ElementType>LeafRouter</ElementType>
+        <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+        </Address>
+        <AddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>::/0</a:IPPrefix>
+        </AddressV6>
+        <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
+        <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+        <AssociatedTagsStr>None</AssociatedTagsStr>
+        <ChassisInternalDevices/>
+        <ClusterName>TestbedForstr-sonic</ClusterName>
+        <DeploymentId>3</DeploymentId>
+        <DeviceLocation i:nil="true"/>
+        <HomeDatacenter>STARLab</HomeDatacenter>
+        <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>172.16.191.65/17</a:IPPrefix>
+        </ManagementAddress>
+        <ManagementAddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>::/0</a:IPPrefix>
+        </ManagementAddressV6>
+        <NodeId i:nil="true"/>
+        <SerialNumber i:nil="true"/>
+        <Hostname>ARISTA47T1</Hostname>
+        <HwSku>Sonic-T1-sku</HwSku>
+      </Device>
+      <Device i:type="LeafRouter">
+        <ElementType>LeafRouter</ElementType>
+        <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+        </Address>
+        <AddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>::/0</a:IPPrefix>
+        </AddressV6>
+        <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
+        <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+        <AssociatedTagsStr>None</AssociatedTagsStr>
+        <ChassisInternalDevices/>
+        <ClusterName>TestbedForstr-sonic</ClusterName>
+        <DeploymentId>3</DeploymentId>
+        <DeviceLocation i:nil="true"/>
+        <HomeDatacenter>STARLab</HomeDatacenter>
+        <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>172.16.191.66/17</a:IPPrefix>
+        </ManagementAddress>
+        <ManagementAddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>::/0</a:IPPrefix>
+        </ManagementAddressV6>
+        <NodeId i:nil="true"/>
+        <SerialNumber i:nil="true"/>
+        <Hostname>ARISTA49T1</Hostname>
+        <HwSku>Sonic-T1-sku</HwSku>
+      </Device>
+      <Device i:type="LeafRouter">
+        <ElementType>LeafRouter</ElementType>
+        <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+        </Address>
+        <AddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>::/0</a:IPPrefix>
+        </AddressV6>
+        <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
+        <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+        <AssociatedTagsStr>None</AssociatedTagsStr>
+        <ChassisInternalDevices/>
+        <ClusterName>TestbedForstr-sonic</ClusterName>
+        <DeploymentId>3</DeploymentId>
+        <DeviceLocation i:nil="true"/>
+        <HomeDatacenter>STARLab</HomeDatacenter>
+        <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>172.16.191.67/17</a:IPPrefix>
+        </ManagementAddress>
+        <ManagementAddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>::/0</a:IPPrefix>
+        </ManagementAddressV6>
+        <NodeId i:nil="true"/>
+        <SerialNumber i:nil="true"/>
+        <Hostname>ARISTA50T1</Hostname>
+        <HwSku>Sonic-T1-sku</HwSku>
+      </Device>
+      <Device i:type="LeafRouter">
+        <ElementType>LeafRouter</ElementType>
+        <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+        </Address>
+        <AddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>::/0</a:IPPrefix>
+        </AddressV6>
+        <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
+        <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+        <AssociatedTagsStr>None</AssociatedTagsStr>
+        <ChassisInternalDevices/>
+        <ClusterName>TestbedForstr-sonic</ClusterName>
+        <DeploymentId>3</DeploymentId>
+        <DeviceLocation i:nil="true"/>
+        <HomeDatacenter>STARLab</HomeDatacenter>
+        <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>172.16.191.68/17</a:IPPrefix>
+        </ManagementAddress>
+        <ManagementAddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>::/0</a:IPPrefix>
+        </ManagementAddressV6>
+        <NodeId i:nil="true"/>
+        <SerialNumber i:nil="true"/>
+        <Hostname>ARISTA51T1</Hostname>
+        <HwSku>Sonic-T1-sku</HwSku>
+      </Device>
+      <Device i:type="LeafRouter">
+        <ElementType>LeafRouter</ElementType>
+        <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+        </Address>
+        <AddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>::/0</a:IPPrefix>
+        </AddressV6>
+        <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
+        <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+        <AssociatedTagsStr>None</AssociatedTagsStr>
+        <ChassisInternalDevices/>
+        <ClusterName>TestbedForstr-sonic</ClusterName>
+        <DeploymentId>3</DeploymentId>
+        <DeviceLocation i:nil="true"/>
+        <HomeDatacenter>STARLab</HomeDatacenter>
+        <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>172.16.191.69/17</a:IPPrefix>
+        </ManagementAddress>
+        <ManagementAddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>::/0</a:IPPrefix>
+        </ManagementAddressV6>
+        <NodeId i:nil="true"/>
+        <SerialNumber i:nil="true"/>
+        <Hostname>ARISTA52T1</Hostname>
+        <HwSku>Sonic-T1-sku</HwSku>
+      </Device>
+      <Device i:type="LeafRouter">
+        <ElementType>LeafRouter</ElementType>
+        <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+        </Address>
+        <AddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>::/0</a:IPPrefix>
+        </AddressV6>
+        <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
+        <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+        <AssociatedTagsStr>None</AssociatedTagsStr>
+        <ChassisInternalDevices/>
+        <ClusterName>TestbedForstr-sonic</ClusterName>
+        <DeploymentId>3</DeploymentId>
+        <DeviceLocation i:nil="true"/>
+        <HomeDatacenter>STARLab</HomeDatacenter>
+        <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>172.16.191.70/17</a:IPPrefix>
+        </ManagementAddress>
+        <ManagementAddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>::/0</a:IPPrefix>
+        </ManagementAddressV6>
+        <NodeId i:nil="true"/>
+        <SerialNumber i:nil="true"/>
+        <Hostname>ARISTA53T1</Hostname>
+        <HwSku>Sonic-T1-sku</HwSku>
+      </Device>
+      <Device i:type="LeafRouter">
+        <ElementType>LeafRouter</ElementType>
+        <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+        </Address>
+        <AddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>::/0</a:IPPrefix>
+        </AddressV6>
+        <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
+        <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+        <AssociatedTagsStr>None</AssociatedTagsStr>
+        <ChassisInternalDevices/>
+        <ClusterName>TestbedForstr-sonic</ClusterName>
+        <DeploymentId>3</DeploymentId>
+        <DeviceLocation i:nil="true"/>
+        <HomeDatacenter>STARLab</HomeDatacenter>
+        <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>172.16.191.71/17</a:IPPrefix>
+        </ManagementAddress>
+        <ManagementAddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>::/0</a:IPPrefix>
+        </ManagementAddressV6>
+        <NodeId i:nil="true"/>
+        <SerialNumber i:nil="true"/>
+        <Hostname>ARISTA54T1</Hostname>
+        <HwSku>Sonic-T1-sku</HwSku>
+      </Device>
+      <Device i:type="LeafRouter">
+        <ElementType>LeafRouter</ElementType>
+        <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+        </Address>
+        <AddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>::/0</a:IPPrefix>
+        </AddressV6>
+        <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
+        <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+        <AssociatedTagsStr>None</AssociatedTagsStr>
+        <ChassisInternalDevices/>
+        <ClusterName>TestbedForstr-sonic</ClusterName>
+        <DeploymentId>3</DeploymentId>
+        <DeviceLocation i:nil="true"/>
+        <HomeDatacenter>STARLab</HomeDatacenter>
+        <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>172.16.191.72/17</a:IPPrefix>
+        </ManagementAddress>
+        <ManagementAddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>::/0</a:IPPrefix>
+        </ManagementAddressV6>
+        <NodeId i:nil="true"/>
+        <SerialNumber i:nil="true"/>
+        <Hostname>ARISTA55T1</Hostname>
+        <HwSku>Sonic-T1-sku</HwSku>
+      </Device>
+      <Device i:type="LeafRouter">
+        <ElementType>LeafRouter</ElementType>
+        <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+        </Address>
+        <AddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>::/0</a:IPPrefix>
+        </AddressV6>
+        <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
+        <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+        <AssociatedTagsStr>None</AssociatedTagsStr>
+        <ChassisInternalDevices/>
+        <ClusterName>TestbedForstr-sonic</ClusterName>
+        <DeploymentId>3</DeploymentId>
+        <DeviceLocation i:nil="true"/>
+        <HomeDatacenter>STARLab</HomeDatacenter>
+        <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>172.16.191.73/17</a:IPPrefix>
+        </ManagementAddress>
+        <ManagementAddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>::/0</a:IPPrefix>
+        </ManagementAddressV6>
+        <NodeId i:nil="true"/>
+        <SerialNumber i:nil="true"/>
+        <Hostname>ARISTA56T1</Hostname>
+        <HwSku>Sonic-T1-sku</HwSku>
+      </Device>
+      <Device i:type="LeafRouter">
+        <ElementType>LeafRouter</ElementType>
+        <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+        </Address>
+        <AddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>::/0</a:IPPrefix>
+        </AddressV6>
+        <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
+        <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+        <AssociatedTagsStr>None</AssociatedTagsStr>
+        <ChassisInternalDevices/>
+        <ClusterName>TestbedForstr-sonic</ClusterName>
+        <DeploymentId>3</DeploymentId>
+        <DeviceLocation i:nil="true"/>
+        <HomeDatacenter>STARLab</HomeDatacenter>
+        <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>172.16.191.74/17</a:IPPrefix>
+        </ManagementAddress>
+        <ManagementAddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>::/0</a:IPPrefix>
+        </ManagementAddressV6>
+        <NodeId i:nil="true"/>
+        <SerialNumber i:nil="true"/>
+        <Hostname>ARISTA57T1</Hostname>
+        <HwSku>Sonic-T1-sku</HwSku>
+      </Device>
+      <Device i:type="LeafRouter">
+        <ElementType>LeafRouter</ElementType>
+        <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+        </Address>
+        <AddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>::/0</a:IPPrefix>
+        </AddressV6>
+        <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
+        <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+        <AssociatedTagsStr>None</AssociatedTagsStr>
+        <ChassisInternalDevices/>
+        <ClusterName>TestbedForstr-sonic</ClusterName>
+        <DeploymentId>3</DeploymentId>
+        <DeviceLocation i:nil="true"/>
+        <HomeDatacenter>STARLab</HomeDatacenter>
+        <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>172.16.191.75/17</a:IPPrefix>
+        </ManagementAddress>
+        <ManagementAddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>::/0</a:IPPrefix>
+        </ManagementAddressV6>
+        <NodeId i:nil="true"/>
+        <SerialNumber i:nil="true"/>
+        <Hostname>ARISTA58T1</Hostname>
+        <HwSku>Sonic-T1-sku</HwSku>
+      </Device>
+      <Device i:type="LeafRouter">
+        <ElementType>LeafRouter</ElementType>
+        <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+        </Address>
+        <AddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>::/0</a:IPPrefix>
+        </AddressV6>
+        <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
+        <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+        <AssociatedTagsStr>None</AssociatedTagsStr>
+        <ChassisInternalDevices/>
+        <ClusterName>TestbedForstr-sonic</ClusterName>
+        <DeploymentId>3</DeploymentId>
+        <DeviceLocation i:nil="true"/>
+        <HomeDatacenter>STARLab</HomeDatacenter>
+        <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>172.16.191.76/17</a:IPPrefix>
+        </ManagementAddress>
+        <ManagementAddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>::/0</a:IPPrefix>
+        </ManagementAddressV6>
+        <NodeId i:nil="true"/>
+        <SerialNumber i:nil="true"/>
+        <Hostname>ARISTA59T1</Hostname>
+        <HwSku>Sonic-T1-sku</HwSku>
+      </Device>
+      <Device i:type="LeafRouter">
+        <ElementType>LeafRouter</ElementType>
+        <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+        </Address>
+        <AddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>::/0</a:IPPrefix>
+        </AddressV6>
+        <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
+        <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+        <AssociatedTagsStr>None</AssociatedTagsStr>
+        <ChassisInternalDevices/>
+        <ClusterName>TestbedForstr-sonic</ClusterName>
+        <DeploymentId>3</DeploymentId>
+        <DeviceLocation i:nil="true"/>
+        <HomeDatacenter>STARLab</HomeDatacenter>
+        <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>172.16.191.77/17</a:IPPrefix>
+        </ManagementAddress>
+        <ManagementAddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>::/0</a:IPPrefix>
+        </ManagementAddressV6>
+        <NodeId i:nil="true"/>
+        <SerialNumber i:nil="true"/>
+        <Hostname>ARISTA60T1</Hostname>
+        <HwSku>Sonic-T1-sku</HwSku>
+      </Device>
+      <Device i:type="LeafRouter">
+        <ElementType>LeafRouter</ElementType>
+        <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+        </Address>
+        <AddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>::/0</a:IPPrefix>
+        </AddressV6>
+        <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
+        <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+        <AssociatedTagsStr>None</AssociatedTagsStr>
+        <ChassisInternalDevices/>
+        <ClusterName>TestbedForstr-sonic</ClusterName>
+        <DeploymentId>3</DeploymentId>
+        <DeviceLocation i:nil="true"/>
+        <HomeDatacenter>STARLab</HomeDatacenter>
+        <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>172.16.191.78/17</a:IPPrefix>
+        </ManagementAddress>
+        <ManagementAddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>::/0</a:IPPrefix>
+        </ManagementAddressV6>
+        <NodeId i:nil="true"/>
+        <SerialNumber i:nil="true"/>
+        <Hostname>ARISTA61T1</Hostname>
+        <HwSku>Sonic-T1-sku</HwSku>
+      </Device>
+      <Device i:type="LeafRouter">
+        <ElementType>LeafRouter</ElementType>
+        <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+        </Address>
+        <AddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>::/0</a:IPPrefix>
+        </AddressV6>
+        <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
+        <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+        <AssociatedTagsStr>None</AssociatedTagsStr>
+        <ChassisInternalDevices/>
+        <ClusterName>TestbedForstr-sonic</ClusterName>
+        <DeploymentId>3</DeploymentId>
+        <DeviceLocation i:nil="true"/>
+        <HomeDatacenter>STARLab</HomeDatacenter>
+        <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>172.16.191.79/17</a:IPPrefix>
+        </ManagementAddress>
+        <ManagementAddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>::/0</a:IPPrefix>
+        </ManagementAddressV6>
+        <NodeId i:nil="true"/>
+        <SerialNumber i:nil="true"/>
+        <Hostname>ARISTA62T1</Hostname>
+        <HwSku>Sonic-T1-sku</HwSku>
+      </Device>
+      <Device i:type="LeafRouter">
+        <ElementType>LeafRouter</ElementType>
+        <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+        </Address>
+        <AddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>::/0</a:IPPrefix>
+        </AddressV6>
+        <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
+        <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+        <AssociatedTagsStr>None</AssociatedTagsStr>
+        <ChassisInternalDevices/>
+        <ClusterName>TestbedForstr-sonic</ClusterName>
+        <DeploymentId>3</DeploymentId>
+        <DeviceLocation i:nil="true"/>
+        <HomeDatacenter>STARLab</HomeDatacenter>
+        <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>172.16.191.80/17</a:IPPrefix>
+        </ManagementAddress>
+        <ManagementAddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>::/0</a:IPPrefix>
+        </ManagementAddressV6>
+        <NodeId i:nil="true"/>
+        <SerialNumber i:nil="true"/>
+        <Hostname>ARISTA63T1</Hostname>
+        <HwSku>Sonic-T1-sku</HwSku>
+      </Device>
+      <Device i:type="LeafRouter">
+        <ElementType>LeafRouter</ElementType>
+        <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+        </Address>
+        <AddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>::/0</a:IPPrefix>
+        </AddressV6>
+        <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
+        <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+        <AssociatedTagsStr>None</AssociatedTagsStr>
+        <ChassisInternalDevices/>
+        <ClusterName>TestbedForstr-sonic</ClusterName>
+        <DeploymentId>3</DeploymentId>
+        <DeviceLocation i:nil="true"/>
+        <HomeDatacenter>STARLab</HomeDatacenter>
+        <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>172.16.191.81/17</a:IPPrefix>
+        </ManagementAddress>
+        <ManagementAddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>::/0</a:IPPrefix>
+        </ManagementAddressV6>
+        <NodeId i:nil="true"/>
+        <SerialNumber i:nil="true"/>
+        <Hostname>ARISTA64T1</Hostname>
+        <HwSku>Sonic-T1-sku</HwSku>
+      </Device>
+      <Device i:type="Linecard">
+        <ElementType>Linecard</ElementType>
+        <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>10.2.0.4/32</a:IPPrefix>
+        </Address>
+        <AddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>fc00:23::1/128</a:IPPrefix>
+        </AddressV6>
+        <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
+        <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+        <AssociatedTagsStr/>
+        <ChassisInternalDevices/>
+        <ClusterName>TestbedForstr-sonic</ClusterName>
+        <DeploymentId>3</DeploymentId>
+        <DeviceLocation i:nil="true"/>
+        <HomeDatacenter>STARLab</HomeDatacenter>
+        <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>10.3.146.74/24</a:IPPrefix>
+        </ManagementAddress>
+        <ManagementAddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>2a01:111:e210:3000::a03:924a/64</a:IPPrefix>
+        </ManagementAddressV6>
+        <NodeId i:nil="true"/>
+        <SerialNumber i:nil="true"/>
+        <Hostname>str-sonic-lc06</Hostname>
+        <HwSku>Sonic-lc-100g-sku</HwSku>
+      </Device>
+      <Device i:type="Supervisor">
+        <ElementType>Supervisor</ElementType>
+        <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>10.152.0.46/32</a:IPPrefix>
+        </Address>
+        <AddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>2a01:111:e210:5e::/128</a:IPPrefix>
+        </AddressV6>
+        <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
+        <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+        <AssociatedTagsStr/>
+        <ChassisInternalDevices/>
+        <ClusterName>TestbedForstr-sonic</ClusterName>
+        <DeploymentId>3</DeploymentId>
+        <DeviceLocation i:nil="true"/>
+        <HomeDatacenter>STARLab</HomeDatacenter>
+        <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>10.3.146.111/24</a:IPPrefix>
+        </ManagementAddress>
+        <ManagementAddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>2a01:111:e210:3000::a03:926f/64</a:IPPrefix>
+        </ManagementAddressV6>
+        <NodeId i:nil="true"/>
+        <SerialNumber i:nil="true"/>
+        <Hostname>str-sonic-sup00</Hostname>
+        <HwSku>Sonic-sup-sku</HwSku>
+      </Device>
+      <Device i:type="SpineRouter">
+        <ElementType>SpineRouter</ElementType>
+        <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>10.152.0.46/32</a:IPPrefix>
+        </Address>
+        <AddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>2a01:111:e210:5e::/128</a:IPPrefix>
+        </AddressV6>
+        <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
+        <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+        <AssociatedTagsStr>None</AssociatedTagsStr>
+        <ChassisInternalDevices/>
+        <ClusterName>TestbedForstr-sonic</ClusterName>
+        <DeploymentId>3</DeploymentId>
+        <DeviceLocation i:nil="true"/>
+        <HomeDatacenter>STARLab</HomeDatacenter>
+        <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>10.3.146.111/24</a:IPPrefix>
+        </ManagementAddress>
+        <ManagementAddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>2a01:111:e210:3000::a03:926f/64</a:IPPrefix>
+        </ManagementAddressV6>
+        <NodeId i:nil="true"/>
+        <SerialNumber i:nil="true"/>
+        <Hostname>str-sonic</Hostname>
+        <HwSku>Sonic-Chassis-sku</HwSku>
+        <Index>0</Index>
+      </Device>
+    </Devices>
+  </PngDec>
+  <Hostname>str-sonic-lc06</Hostname>
+  <HwSku>Sonic-lc-100g-sku</HwSku>
+  <Version>1.0.1388.35294&#xD;
+</Version>
+</DeviceMiniGraph>
diff --git a/src/sonic-config-engine/tests/chassis_data/voq_chassis_data/voq_chassis_sup.xml b/src/sonic-config-engine/tests/chassis_data/voq_chassis_data/voq_chassis_sup.xml
new file mode 100644
index 000000000..1b4599924
--- /dev/null
+++ b/src/sonic-config-engine/tests/chassis_data/voq_chassis_data/voq_chassis_sup.xml
@@ -0,0 +1,52726 @@
+<?xml version="1.0"?>
+<DeviceMiniGraph xmlns="Microsoft.Search.Autopilot.Evolution" xmlns:i="http://www.w3.org/2001/XMLSchema-instance">
+  <CpgDec>
+    <IsisRouters xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+    <IsisSessions xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+    <PeeringSessions/>
+    <Routers xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+    <StaticRouters xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+  </CpgDec>
+  <DeviceInfos>
+    <DeviceInfo>
+      <AzClusterSku i:nil="true"/>
+      <BackendFabricInterfaces xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution">
+        <a:BackendFabricInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>cpu3/0</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>cpu0</SonicName>
+          <Speed>10000</Speed>
+          <a:CountOfLanes i:nil="true"/>
+          <a:StartLaneIndex i:nil="true"/>
+        </a:BackendFabricInterface>
+        <a:BackendFabricInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>2</Index>
+          <InterfaceName>cpu3/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>cpu1</SonicName>
+          <Speed>10000</Speed>
+          <a:CountOfLanes i:nil="true"/>
+          <a:StartLaneIndex i:nil="true"/>
+        </a:BackendFabricInterface>
+        <a:BackendFabricInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>3</Index>
+          <InterfaceName>Recirc3/0/0</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet-Rec0</SonicName>
+          <Speed>10000</Speed>
+          <a:CountOfLanes i:nil="true"/>
+          <a:StartLaneIndex i:nil="true"/>
+        </a:BackendFabricInterface>
+        <a:BackendFabricInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>4</Index>
+          <InterfaceName>Recirc3/1/0</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet-Rec1</SonicName>
+          <Speed>10000</Speed>
+          <a:CountOfLanes i:nil="true"/>
+          <a:StartLaneIndex i:nil="true"/>
+        </a:BackendFabricInterface>
+        <a:BackendFabricInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>5</Index>
+          <InterfaceName>Recirc3/0/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet-IB0</SonicName>
+          <Speed>10000</Speed>
+          <a:CountOfLanes i:nil="true"/>
+          <a:StartLaneIndex i:nil="true"/>
+        </a:BackendFabricInterface>
+        <a:BackendFabricInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>6</Index>
+          <InterfaceName>Recirc3/1/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet-IB1</SonicName>
+          <Speed>10000</Speed>
+          <a:CountOfLanes i:nil="true"/>
+          <a:StartLaneIndex i:nil="true"/>
+        </a:BackendFabricInterface>
+        <a:BackendFabricInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>7</Index>
+          <InterfaceName>cpu4/0</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>cpu0</SonicName>
+          <Speed>10000</Speed>
+          <a:CountOfLanes i:nil="true"/>
+          <a:StartLaneIndex i:nil="true"/>
+        </a:BackendFabricInterface>
+        <a:BackendFabricInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>8</Index>
+          <InterfaceName>Recirc4/0/0</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet-Rec0</SonicName>
+          <Speed>400000</Speed>
+          <a:CountOfLanes i:nil="true"/>
+          <a:StartLaneIndex i:nil="true"/>
+        </a:BackendFabricInterface>
+        <a:BackendFabricInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>9</Index>
+          <InterfaceName>Recirc4/0/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet-IB0</SonicName>
+          <Speed>400000</Speed>
+          <a:CountOfLanes i:nil="true"/>
+          <a:StartLaneIndex i:nil="true"/>
+        </a:BackendFabricInterface>
+        <a:BackendFabricInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>10</Index>
+          <InterfaceName>cpu5/0</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>cpu0</SonicName>
+          <Speed>10000</Speed>
+          <a:CountOfLanes i:nil="true"/>
+          <a:StartLaneIndex i:nil="true"/>
+        </a:BackendFabricInterface>
+        <a:BackendFabricInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>11</Index>
+          <InterfaceName>Recirc5/0/0</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet-Rec0</SonicName>
+          <Speed>400000</Speed>
+          <a:CountOfLanes i:nil="true"/>
+          <a:StartLaneIndex i:nil="true"/>
+        </a:BackendFabricInterface>
+        <a:BackendFabricInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>12</Index>
+          <InterfaceName>Recirc5/0/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet-IB0</SonicName>
+          <Speed>400000</Speed>
+          <a:CountOfLanes i:nil="true"/>
+          <a:StartLaneIndex i:nil="true"/>
+        </a:BackendFabricInterface>
+        <a:BackendFabricInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>13</Index>
+          <InterfaceName>cpu6/0</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>cpu0</SonicName>
+          <Speed>10000</Speed>
+          <a:CountOfLanes i:nil="true"/>
+          <a:StartLaneIndex i:nil="true"/>
+        </a:BackendFabricInterface>
+        <a:BackendFabricInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>14</Index>
+          <InterfaceName>Recirc6/0/0</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet-Rec0</SonicName>
+          <Speed>400000</Speed>
+          <a:CountOfLanes i:nil="true"/>
+          <a:StartLaneIndex i:nil="true"/>
+        </a:BackendFabricInterface>
+        <a:BackendFabricInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>15</Index>
+          <InterfaceName>Recirc6/0/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet-IB0</SonicName>
+          <Speed>400000</Speed>
+          <a:CountOfLanes i:nil="true"/>
+          <a:StartLaneIndex i:nil="true"/>
+        </a:BackendFabricInterface>
+        <a:BackendFabricInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>16</Index>
+          <InterfaceName>cpu7/0</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>cpu0</SonicName>
+          <Speed>10000</Speed>
+          <a:CountOfLanes i:nil="true"/>
+          <a:StartLaneIndex i:nil="true"/>
+        </a:BackendFabricInterface>
+        <a:BackendFabricInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>17</Index>
+          <InterfaceName>Recirc7/0/0</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet-Rec0</SonicName>
+          <Speed>400000</Speed>
+          <a:CountOfLanes i:nil="true"/>
+          <a:StartLaneIndex i:nil="true"/>
+        </a:BackendFabricInterface>
+        <a:BackendFabricInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>18</Index>
+          <InterfaceName>Recirc7/0/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet-IB0</SonicName>
+          <Speed>400000</Speed>
+          <a:CountOfLanes i:nil="true"/>
+          <a:StartLaneIndex i:nil="true"/>
+        </a:BackendFabricInterface>
+        <a:BackendFabricInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>19</Index>
+          <InterfaceName>cpu8/0</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>cpu0</SonicName>
+          <Speed>10000</Speed>
+          <a:CountOfLanes i:nil="true"/>
+          <a:StartLaneIndex i:nil="true"/>
+        </a:BackendFabricInterface>
+        <a:BackendFabricInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>20</Index>
+          <InterfaceName>Recirc8/0/0</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet-Rec0</SonicName>
+          <Speed>400000</Speed>
+          <a:CountOfLanes i:nil="true"/>
+          <a:StartLaneIndex i:nil="true"/>
+        </a:BackendFabricInterface>
+        <a:BackendFabricInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>21</Index>
+          <InterfaceName>Recirc8/0/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet-IB0</SonicName>
+          <Speed>400000</Speed>
+          <a:CountOfLanes i:nil="true"/>
+          <a:StartLaneIndex i:nil="true"/>
+        </a:BackendFabricInterface>
+        <a:BackendFabricInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>22</Index>
+          <InterfaceName>cpu10/0</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>cpu0</SonicName>
+          <Speed>10000</Speed>
+          <a:CountOfLanes i:nil="true"/>
+          <a:StartLaneIndex i:nil="true"/>
+        </a:BackendFabricInterface>
+        <a:BackendFabricInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>23</Index>
+          <InterfaceName>Recirc10/0/0</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet-Rec0</SonicName>
+          <Speed>400000</Speed>
+          <a:CountOfLanes i:nil="true"/>
+          <a:StartLaneIndex i:nil="true"/>
+        </a:BackendFabricInterface>
+        <a:BackendFabricInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>24</Index>
+          <InterfaceName>Recirc10/0/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet-IB0</SonicName>
+          <Speed>400000</Speed>
+          <a:CountOfLanes i:nil="true"/>
+          <a:StartLaneIndex i:nil="true"/>
+        </a:BackendFabricInterface>
+      </BackendFabricInterfaces>
+      <BaseSku>Sonic-T2-Base-sku</BaseSku>
+      <ClusterSku i:nil="true"/>
+      <EthernetInterfaces xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution">
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>100000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>Ethernet3/1/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet0</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>100000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>2</Index>
+          <InterfaceName>Ethernet3/2/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet8</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>100000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>3</Index>
+          <InterfaceName>Ethernet3/3/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet16</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>100000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>4</Index>
+          <InterfaceName>Ethernet3/4/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet24</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>100000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>5</Index>
+          <InterfaceName>Ethernet3/5/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet32</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>100000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>6</Index>
+          <InterfaceName>Ethernet3/6/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet40</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>100000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>7</Index>
+          <InterfaceName>Ethernet3/7/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet48</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>100000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>8</Index>
+          <InterfaceName>Ethernet3/8/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet56</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>100000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>9</Index>
+          <InterfaceName>Ethernet3/9/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet64</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>100000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>10</Index>
+          <InterfaceName>Ethernet3/10/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet72</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>100000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>11</Index>
+          <InterfaceName>Ethernet3/11/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet80</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>100000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>12</Index>
+          <InterfaceName>Ethernet3/12/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet88</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>100000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>13</Index>
+          <InterfaceName>Ethernet3/13/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet96</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>100000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>14</Index>
+          <InterfaceName>Ethernet3/14/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet104</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>100000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>15</Index>
+          <InterfaceName>Ethernet3/15/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet112</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>100000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>16</Index>
+          <InterfaceName>Ethernet3/16/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet120</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>100000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>17</Index>
+          <InterfaceName>Ethernet3/17/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet128</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>100000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>18</Index>
+          <InterfaceName>Ethernet3/18/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet136</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>100000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>19</Index>
+          <InterfaceName>Ethernet3/19/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet144</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>100000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>20</Index>
+          <InterfaceName>Ethernet3/20/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet152</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>100000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>21</Index>
+          <InterfaceName>Ethernet3/21/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet160</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>100000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>22</Index>
+          <InterfaceName>Ethernet3/22/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet168</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>100000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>23</Index>
+          <InterfaceName>Ethernet3/23/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet176</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>100000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>24</Index>
+          <InterfaceName>Ethernet3/24/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet184</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>100000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>25</Index>
+          <InterfaceName>Ethernet3/25/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet192</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>100000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>26</Index>
+          <InterfaceName>Ethernet3/26/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet200</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>100000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>27</Index>
+          <InterfaceName>Ethernet3/27/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet208</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>100000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>28</Index>
+          <InterfaceName>Ethernet3/28/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet216</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>100000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>29</Index>
+          <InterfaceName>Ethernet3/29/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet224</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>100000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>30</Index>
+          <InterfaceName>Ethernet3/30/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet232</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>100000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>31</Index>
+          <InterfaceName>Ethernet3/31/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet240</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>100000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>32</Index>
+          <InterfaceName>Ethernet3/32/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet248</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>100000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>33</Index>
+          <InterfaceName>Ethernet3/33/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet256</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>100000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>34</Index>
+          <InterfaceName>Ethernet3/34/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet264</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>100000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>35</Index>
+          <InterfaceName>Ethernet3/35/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet272</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>100000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>36</Index>
+          <InterfaceName>Ethernet3/36/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet280</SonicName>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>37</Index>
+          <InterfaceName>Ethernet4/1/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet0</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>38</Index>
+          <InterfaceName>Ethernet4/2/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet4</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>39</Index>
+          <InterfaceName>Ethernet4/3/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet8</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>40</Index>
+          <InterfaceName>Ethernet4/4/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet12</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>41</Index>
+          <InterfaceName>Ethernet4/5/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet16</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>42</Index>
+          <InterfaceName>Ethernet4/6/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet20</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>43</Index>
+          <InterfaceName>Ethernet4/7/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet24</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>44</Index>
+          <InterfaceName>Ethernet4/8/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet28</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>45</Index>
+          <InterfaceName>Ethernet4/9/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet32</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>46</Index>
+          <InterfaceName>Ethernet4/10/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet36</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>47</Index>
+          <InterfaceName>Ethernet4/11/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet40</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>48</Index>
+          <InterfaceName>Ethernet4/12/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet44</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>49</Index>
+          <InterfaceName>Ethernet4/13/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet48</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>50</Index>
+          <InterfaceName>Ethernet4/14/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet52</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>51</Index>
+          <InterfaceName>Ethernet4/15/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet56</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>52</Index>
+          <InterfaceName>Ethernet4/16/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet60</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>53</Index>
+          <InterfaceName>Ethernet4/17/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet64</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>54</Index>
+          <InterfaceName>Ethernet4/18/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet68</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>55</Index>
+          <InterfaceName>Ethernet4/19/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet72</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>56</Index>
+          <InterfaceName>Ethernet4/20/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet76</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>57</Index>
+          <InterfaceName>Ethernet4/21/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet80</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>58</Index>
+          <InterfaceName>Ethernet4/22/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet84</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>59</Index>
+          <InterfaceName>Ethernet4/23/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet88</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>60</Index>
+          <InterfaceName>Ethernet4/24/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet92</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>61</Index>
+          <InterfaceName>Ethernet4/25/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet96</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>62</Index>
+          <InterfaceName>Ethernet4/26/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet100</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>63</Index>
+          <InterfaceName>Ethernet4/27/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet104</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>64</Index>
+          <InterfaceName>Ethernet4/28/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet108</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>65</Index>
+          <InterfaceName>Ethernet4/29/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet112</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>66</Index>
+          <InterfaceName>Ethernet4/30/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet116</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>67</Index>
+          <InterfaceName>Ethernet4/31/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet120</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>68</Index>
+          <InterfaceName>Ethernet4/32/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet124</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>69</Index>
+          <InterfaceName>Ethernet4/33/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet128</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>70</Index>
+          <InterfaceName>Ethernet4/34/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet132</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>71</Index>
+          <InterfaceName>Ethernet4/35/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet136</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>72</Index>
+          <InterfaceName>Ethernet4/36/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet140</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>73</Index>
+          <InterfaceName>Ethernet4/37/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet144</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>74</Index>
+          <InterfaceName>Ethernet4/38/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet148</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>75</Index>
+          <InterfaceName>Ethernet4/39/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet152</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>76</Index>
+          <InterfaceName>Ethernet4/40/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet156</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>77</Index>
+          <InterfaceName>Ethernet4/41/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet160</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>78</Index>
+          <InterfaceName>Ethernet4/42/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet164</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>79</Index>
+          <InterfaceName>Ethernet4/43/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet168</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>80</Index>
+          <InterfaceName>Ethernet4/44/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet172</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>81</Index>
+          <InterfaceName>Ethernet4/45/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet176</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>82</Index>
+          <InterfaceName>Ethernet4/46/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet180</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>83</Index>
+          <InterfaceName>Ethernet4/47/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet184</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>84</Index>
+          <InterfaceName>Ethernet4/48/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet188</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>85</Index>
+          <InterfaceName>Ethernet5/1/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet0</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>86</Index>
+          <InterfaceName>Ethernet5/2/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet4</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>87</Index>
+          <InterfaceName>Ethernet5/3/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet8</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>88</Index>
+          <InterfaceName>Ethernet5/4/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet12</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>89</Index>
+          <InterfaceName>Ethernet5/5/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet16</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>90</Index>
+          <InterfaceName>Ethernet5/6/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet20</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>91</Index>
+          <InterfaceName>Ethernet5/7/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet24</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>92</Index>
+          <InterfaceName>Ethernet5/8/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet28</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>93</Index>
+          <InterfaceName>Ethernet5/9/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet32</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>94</Index>
+          <InterfaceName>Ethernet5/10/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet36</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>95</Index>
+          <InterfaceName>Ethernet5/11/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet40</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>96</Index>
+          <InterfaceName>Ethernet5/12/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet44</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>97</Index>
+          <InterfaceName>Ethernet5/13/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet48</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>98</Index>
+          <InterfaceName>Ethernet5/14/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet52</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>99</Index>
+          <InterfaceName>Ethernet5/15/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet56</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>100</Index>
+          <InterfaceName>Ethernet5/16/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet60</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>101</Index>
+          <InterfaceName>Ethernet5/17/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet64</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>102</Index>
+          <InterfaceName>Ethernet5/18/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet68</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>103</Index>
+          <InterfaceName>Ethernet5/19/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet72</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>104</Index>
+          <InterfaceName>Ethernet5/20/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet76</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>105</Index>
+          <InterfaceName>Ethernet5/21/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet80</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>106</Index>
+          <InterfaceName>Ethernet5/22/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet84</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>107</Index>
+          <InterfaceName>Ethernet5/23/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet88</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>108</Index>
+          <InterfaceName>Ethernet5/24/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet92</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>109</Index>
+          <InterfaceName>Ethernet5/25/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet96</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>110</Index>
+          <InterfaceName>Ethernet5/26/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet100</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>111</Index>
+          <InterfaceName>Ethernet5/27/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet104</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>112</Index>
+          <InterfaceName>Ethernet5/28/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet108</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>113</Index>
+          <InterfaceName>Ethernet5/29/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet112</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>114</Index>
+          <InterfaceName>Ethernet5/30/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet116</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>115</Index>
+          <InterfaceName>Ethernet5/31/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet120</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>116</Index>
+          <InterfaceName>Ethernet5/32/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet124</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>117</Index>
+          <InterfaceName>Ethernet5/33/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet128</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>118</Index>
+          <InterfaceName>Ethernet5/34/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet132</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>119</Index>
+          <InterfaceName>Ethernet5/35/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet136</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>120</Index>
+          <InterfaceName>Ethernet5/36/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet140</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>121</Index>
+          <InterfaceName>Ethernet5/37/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet144</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>122</Index>
+          <InterfaceName>Ethernet5/38/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet148</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>123</Index>
+          <InterfaceName>Ethernet5/39/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet152</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>124</Index>
+          <InterfaceName>Ethernet5/40/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet156</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>125</Index>
+          <InterfaceName>Ethernet5/41/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet160</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>126</Index>
+          <InterfaceName>Ethernet5/42/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet164</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>127</Index>
+          <InterfaceName>Ethernet5/43/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet168</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>128</Index>
+          <InterfaceName>Ethernet5/44/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet172</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>129</Index>
+          <InterfaceName>Ethernet5/45/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet176</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>130</Index>
+          <InterfaceName>Ethernet5/46/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet180</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>131</Index>
+          <InterfaceName>Ethernet5/47/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet184</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>132</Index>
+          <InterfaceName>Ethernet5/48/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet188</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>133</Index>
+          <InterfaceName>Ethernet6/1/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet0</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>134</Index>
+          <InterfaceName>Ethernet6/2/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet4</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>135</Index>
+          <InterfaceName>Ethernet6/3/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet8</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>136</Index>
+          <InterfaceName>Ethernet6/4/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet12</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>137</Index>
+          <InterfaceName>Ethernet6/5/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet16</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>138</Index>
+          <InterfaceName>Ethernet6/6/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet20</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>139</Index>
+          <InterfaceName>Ethernet6/7/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet24</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>140</Index>
+          <InterfaceName>Ethernet6/8/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet28</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>141</Index>
+          <InterfaceName>Ethernet6/9/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet32</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>142</Index>
+          <InterfaceName>Ethernet6/10/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet36</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>143</Index>
+          <InterfaceName>Ethernet6/11/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet40</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>144</Index>
+          <InterfaceName>Ethernet6/12/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet44</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>145</Index>
+          <InterfaceName>Ethernet6/13/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet48</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>146</Index>
+          <InterfaceName>Ethernet6/14/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet52</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>147</Index>
+          <InterfaceName>Ethernet6/15/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet56</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>148</Index>
+          <InterfaceName>Ethernet6/16/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet60</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>149</Index>
+          <InterfaceName>Ethernet6/17/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet64</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>150</Index>
+          <InterfaceName>Ethernet6/18/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet68</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>151</Index>
+          <InterfaceName>Ethernet6/19/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet72</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>152</Index>
+          <InterfaceName>Ethernet6/20/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet76</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>153</Index>
+          <InterfaceName>Ethernet6/21/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet80</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>154</Index>
+          <InterfaceName>Ethernet6/22/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet84</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>155</Index>
+          <InterfaceName>Ethernet6/23/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet88</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>156</Index>
+          <InterfaceName>Ethernet6/24/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet92</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>157</Index>
+          <InterfaceName>Ethernet6/25/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet96</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>158</Index>
+          <InterfaceName>Ethernet6/26/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet100</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>159</Index>
+          <InterfaceName>Ethernet6/27/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet104</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>160</Index>
+          <InterfaceName>Ethernet6/28/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet108</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>161</Index>
+          <InterfaceName>Ethernet6/29/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet112</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>162</Index>
+          <InterfaceName>Ethernet6/30/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet116</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>163</Index>
+          <InterfaceName>Ethernet6/31/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet120</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>164</Index>
+          <InterfaceName>Ethernet6/32/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet124</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>165</Index>
+          <InterfaceName>Ethernet6/33/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet128</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>166</Index>
+          <InterfaceName>Ethernet6/34/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet132</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>167</Index>
+          <InterfaceName>Ethernet6/35/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet136</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>168</Index>
+          <InterfaceName>Ethernet6/36/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet140</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>169</Index>
+          <InterfaceName>Ethernet6/37/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet144</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>170</Index>
+          <InterfaceName>Ethernet6/38/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet148</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>171</Index>
+          <InterfaceName>Ethernet6/39/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet152</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>172</Index>
+          <InterfaceName>Ethernet6/40/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet156</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>173</Index>
+          <InterfaceName>Ethernet6/41/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet160</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>174</Index>
+          <InterfaceName>Ethernet6/42/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet164</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>175</Index>
+          <InterfaceName>Ethernet6/43/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet168</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>176</Index>
+          <InterfaceName>Ethernet6/44/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet172</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>177</Index>
+          <InterfaceName>Ethernet6/45/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet176</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>178</Index>
+          <InterfaceName>Ethernet6/46/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet180</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>179</Index>
+          <InterfaceName>Ethernet6/47/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet184</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>180</Index>
+          <InterfaceName>Ethernet6/48/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet188</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>181</Index>
+          <InterfaceName>Ethernet7/1/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet0</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>182</Index>
+          <InterfaceName>Ethernet7/2/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet4</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>183</Index>
+          <InterfaceName>Ethernet7/3/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet8</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>184</Index>
+          <InterfaceName>Ethernet7/4/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet12</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>185</Index>
+          <InterfaceName>Ethernet7/5/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet16</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>186</Index>
+          <InterfaceName>Ethernet7/6/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet20</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>187</Index>
+          <InterfaceName>Ethernet7/7/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet24</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>188</Index>
+          <InterfaceName>Ethernet7/8/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet28</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>189</Index>
+          <InterfaceName>Ethernet7/9/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet32</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>190</Index>
+          <InterfaceName>Ethernet7/10/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet36</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>191</Index>
+          <InterfaceName>Ethernet7/11/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet40</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>192</Index>
+          <InterfaceName>Ethernet7/12/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet44</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>193</Index>
+          <InterfaceName>Ethernet7/13/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet48</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>194</Index>
+          <InterfaceName>Ethernet7/14/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet52</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>195</Index>
+          <InterfaceName>Ethernet7/15/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet56</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>196</Index>
+          <InterfaceName>Ethernet7/16/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet60</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>197</Index>
+          <InterfaceName>Ethernet7/17/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet64</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>198</Index>
+          <InterfaceName>Ethernet7/18/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet68</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>199</Index>
+          <InterfaceName>Ethernet7/19/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet72</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>200</Index>
+          <InterfaceName>Ethernet7/20/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet76</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>201</Index>
+          <InterfaceName>Ethernet7/21/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet80</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>202</Index>
+          <InterfaceName>Ethernet7/22/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet84</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>203</Index>
+          <InterfaceName>Ethernet7/23/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet88</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>204</Index>
+          <InterfaceName>Ethernet7/24/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet92</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>205</Index>
+          <InterfaceName>Ethernet7/25/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet96</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>206</Index>
+          <InterfaceName>Ethernet7/26/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet100</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>207</Index>
+          <InterfaceName>Ethernet7/27/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet104</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>208</Index>
+          <InterfaceName>Ethernet7/28/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet108</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>209</Index>
+          <InterfaceName>Ethernet7/29/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet112</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>210</Index>
+          <InterfaceName>Ethernet7/30/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet116</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>211</Index>
+          <InterfaceName>Ethernet7/31/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet120</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>212</Index>
+          <InterfaceName>Ethernet7/32/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet124</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>213</Index>
+          <InterfaceName>Ethernet7/33/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet128</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>214</Index>
+          <InterfaceName>Ethernet7/34/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet132</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>215</Index>
+          <InterfaceName>Ethernet7/35/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet136</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>216</Index>
+          <InterfaceName>Ethernet7/36/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet140</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>217</Index>
+          <InterfaceName>Ethernet7/37/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet144</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>218</Index>
+          <InterfaceName>Ethernet7/38/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet148</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>219</Index>
+          <InterfaceName>Ethernet7/39/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet152</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>220</Index>
+          <InterfaceName>Ethernet7/40/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet156</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>221</Index>
+          <InterfaceName>Ethernet7/41/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet160</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>222</Index>
+          <InterfaceName>Ethernet7/42/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet164</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>223</Index>
+          <InterfaceName>Ethernet7/43/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet168</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>224</Index>
+          <InterfaceName>Ethernet7/44/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet172</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>225</Index>
+          <InterfaceName>Ethernet7/45/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet176</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>226</Index>
+          <InterfaceName>Ethernet7/46/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet180</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>227</Index>
+          <InterfaceName>Ethernet7/47/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet184</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>228</Index>
+          <InterfaceName>Ethernet7/48/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet188</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>229</Index>
+          <InterfaceName>Ethernet8/1/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet0</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>230</Index>
+          <InterfaceName>Ethernet8/2/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet4</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>231</Index>
+          <InterfaceName>Ethernet8/3/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet8</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>232</Index>
+          <InterfaceName>Ethernet8/4/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet12</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>233</Index>
+          <InterfaceName>Ethernet8/5/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet16</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>234</Index>
+          <InterfaceName>Ethernet8/6/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet20</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>235</Index>
+          <InterfaceName>Ethernet8/7/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet24</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>236</Index>
+          <InterfaceName>Ethernet8/8/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet28</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>237</Index>
+          <InterfaceName>Ethernet8/9/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet32</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>238</Index>
+          <InterfaceName>Ethernet8/10/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet36</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>239</Index>
+          <InterfaceName>Ethernet8/11/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet40</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>240</Index>
+          <InterfaceName>Ethernet8/12/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet44</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>241</Index>
+          <InterfaceName>Ethernet8/13/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet48</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>242</Index>
+          <InterfaceName>Ethernet8/14/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet52</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>243</Index>
+          <InterfaceName>Ethernet8/15/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet56</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>244</Index>
+          <InterfaceName>Ethernet8/16/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet60</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>245</Index>
+          <InterfaceName>Ethernet8/17/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet64</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>246</Index>
+          <InterfaceName>Ethernet8/18/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet68</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>247</Index>
+          <InterfaceName>Ethernet8/19/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet72</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>248</Index>
+          <InterfaceName>Ethernet8/20/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet76</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>249</Index>
+          <InterfaceName>Ethernet8/21/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet80</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>250</Index>
+          <InterfaceName>Ethernet8/22/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet84</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>251</Index>
+          <InterfaceName>Ethernet8/23/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet88</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>252</Index>
+          <InterfaceName>Ethernet8/24/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet92</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>253</Index>
+          <InterfaceName>Ethernet8/25/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet96</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>254</Index>
+          <InterfaceName>Ethernet8/26/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet100</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>255</Index>
+          <InterfaceName>Ethernet8/27/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet104</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>256</Index>
+          <InterfaceName>Ethernet8/28/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet108</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>257</Index>
+          <InterfaceName>Ethernet8/29/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet112</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>258</Index>
+          <InterfaceName>Ethernet8/30/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet116</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>259</Index>
+          <InterfaceName>Ethernet8/31/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet120</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>260</Index>
+          <InterfaceName>Ethernet8/32/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet124</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>261</Index>
+          <InterfaceName>Ethernet8/33/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet128</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>262</Index>
+          <InterfaceName>Ethernet8/34/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet132</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>263</Index>
+          <InterfaceName>Ethernet8/35/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet136</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>264</Index>
+          <InterfaceName>Ethernet8/36/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet140</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>265</Index>
+          <InterfaceName>Ethernet8/37/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet144</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>266</Index>
+          <InterfaceName>Ethernet8/38/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet148</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>267</Index>
+          <InterfaceName>Ethernet8/39/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet152</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>268</Index>
+          <InterfaceName>Ethernet8/40/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet156</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>269</Index>
+          <InterfaceName>Ethernet8/41/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet160</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>270</Index>
+          <InterfaceName>Ethernet8/42/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet164</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>271</Index>
+          <InterfaceName>Ethernet8/43/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet168</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>272</Index>
+          <InterfaceName>Ethernet8/44/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet172</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>273</Index>
+          <InterfaceName>Ethernet8/45/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet176</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>274</Index>
+          <InterfaceName>Ethernet8/46/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet180</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>275</Index>
+          <InterfaceName>Ethernet8/47/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet184</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>276</Index>
+          <InterfaceName>Ethernet8/48/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet188</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>277</Index>
+          <InterfaceName>Ethernet9/1/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet0</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>278</Index>
+          <InterfaceName>Ethernet9/2/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet4</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>279</Index>
+          <InterfaceName>Ethernet9/3/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet8</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>280</Index>
+          <InterfaceName>Ethernet9/4/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet12</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>281</Index>
+          <InterfaceName>Ethernet9/5/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet16</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>282</Index>
+          <InterfaceName>Ethernet9/6/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet20</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>283</Index>
+          <InterfaceName>Ethernet9/7/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet24</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>284</Index>
+          <InterfaceName>Ethernet9/8/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet28</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>285</Index>
+          <InterfaceName>Ethernet9/9/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet32</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>286</Index>
+          <InterfaceName>Ethernet9/10/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet36</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>287</Index>
+          <InterfaceName>Ethernet9/11/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet40</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>288</Index>
+          <InterfaceName>Ethernet9/12/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet44</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>289</Index>
+          <InterfaceName>Ethernet9/13/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet48</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>290</Index>
+          <InterfaceName>Ethernet9/14/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet52</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>291</Index>
+          <InterfaceName>Ethernet9/15/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet56</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>292</Index>
+          <InterfaceName>Ethernet9/16/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet60</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>293</Index>
+          <InterfaceName>Ethernet9/17/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet64</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>294</Index>
+          <InterfaceName>Ethernet9/18/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet68</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>295</Index>
+          <InterfaceName>Ethernet9/19/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet72</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>296</Index>
+          <InterfaceName>Ethernet9/20/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet76</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>297</Index>
+          <InterfaceName>Ethernet9/21/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet80</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>298</Index>
+          <InterfaceName>Ethernet9/22/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet84</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>299</Index>
+          <InterfaceName>Ethernet9/23/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet88</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>300</Index>
+          <InterfaceName>Ethernet9/24/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet92</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>301</Index>
+          <InterfaceName>Ethernet9/25/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet96</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>302</Index>
+          <InterfaceName>Ethernet9/26/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet100</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>303</Index>
+          <InterfaceName>Ethernet9/27/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet104</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>304</Index>
+          <InterfaceName>Ethernet9/28/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet108</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>305</Index>
+          <InterfaceName>Ethernet9/29/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet112</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>306</Index>
+          <InterfaceName>Ethernet9/30/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet116</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>307</Index>
+          <InterfaceName>Ethernet9/31/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet120</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>308</Index>
+          <InterfaceName>Ethernet9/32/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet124</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>309</Index>
+          <InterfaceName>Ethernet9/33/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet128</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>310</Index>
+          <InterfaceName>Ethernet9/34/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet132</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>311</Index>
+          <InterfaceName>Ethernet9/35/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet136</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>312</Index>
+          <InterfaceName>Ethernet9/36/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet140</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>313</Index>
+          <InterfaceName>Ethernet9/37/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet144</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>314</Index>
+          <InterfaceName>Ethernet9/38/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet148</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>315</Index>
+          <InterfaceName>Ethernet9/39/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet152</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>316</Index>
+          <InterfaceName>Ethernet9/40/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet156</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>317</Index>
+          <InterfaceName>Ethernet9/41/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet160</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>318</Index>
+          <InterfaceName>Ethernet9/42/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet164</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>319</Index>
+          <InterfaceName>Ethernet9/43/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet168</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>320</Index>
+          <InterfaceName>Ethernet9/44/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet172</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>321</Index>
+          <InterfaceName>Ethernet9/45/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet176</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>322</Index>
+          <InterfaceName>Ethernet9/46/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet180</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>323</Index>
+          <InterfaceName>Ethernet9/47/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet184</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>324</Index>
+          <InterfaceName>Ethernet9/48/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet188</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>325</Index>
+          <InterfaceName>Ethernet10/1/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet0</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>326</Index>
+          <InterfaceName>Ethernet10/2/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet4</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>327</Index>
+          <InterfaceName>Ethernet10/3/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet8</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>328</Index>
+          <InterfaceName>Ethernet10/4/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet12</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>329</Index>
+          <InterfaceName>Ethernet10/5/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet16</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>330</Index>
+          <InterfaceName>Ethernet10/6/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet20</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>331</Index>
+          <InterfaceName>Ethernet10/7/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet24</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>332</Index>
+          <InterfaceName>Ethernet10/8/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet28</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>333</Index>
+          <InterfaceName>Ethernet10/9/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet32</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>334</Index>
+          <InterfaceName>Ethernet10/10/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet36</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>335</Index>
+          <InterfaceName>Ethernet10/11/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet40</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>336</Index>
+          <InterfaceName>Ethernet10/12/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet44</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>337</Index>
+          <InterfaceName>Ethernet10/13/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet48</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>338</Index>
+          <InterfaceName>Ethernet10/14/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet52</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>339</Index>
+          <InterfaceName>Ethernet10/15/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet56</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>340</Index>
+          <InterfaceName>Ethernet10/16/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet60</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>341</Index>
+          <InterfaceName>Ethernet10/17/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet64</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>342</Index>
+          <InterfaceName>Ethernet10/18/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet68</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>343</Index>
+          <InterfaceName>Ethernet10/19/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet72</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>344</Index>
+          <InterfaceName>Ethernet10/20/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet76</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>345</Index>
+          <InterfaceName>Ethernet10/21/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet80</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>346</Index>
+          <InterfaceName>Ethernet10/22/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet84</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>347</Index>
+          <InterfaceName>Ethernet10/23/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet88</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>348</Index>
+          <InterfaceName>Ethernet10/24/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet92</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>349</Index>
+          <InterfaceName>Ethernet10/25/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet96</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>350</Index>
+          <InterfaceName>Ethernet10/26/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet100</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>351</Index>
+          <InterfaceName>Ethernet10/27/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet104</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>352</Index>
+          <InterfaceName>Ethernet10/28/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet108</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>353</Index>
+          <InterfaceName>Ethernet10/29/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet112</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>354</Index>
+          <InterfaceName>Ethernet10/30/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet116</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>355</Index>
+          <InterfaceName>Ethernet10/31/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet120</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>356</Index>
+          <InterfaceName>Ethernet10/32/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet124</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>357</Index>
+          <InterfaceName>Ethernet10/33/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet128</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>358</Index>
+          <InterfaceName>Ethernet10/34/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet132</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>359</Index>
+          <InterfaceName>Ethernet10/35/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet136</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>360</Index>
+          <InterfaceName>Ethernet10/36/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet140</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>361</Index>
+          <InterfaceName>Ethernet10/37/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet144</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>362</Index>
+          <InterfaceName>Ethernet10/38/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet148</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>363</Index>
+          <InterfaceName>Ethernet10/39/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet152</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>364</Index>
+          <InterfaceName>Ethernet10/40/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet156</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>365</Index>
+          <InterfaceName>Ethernet10/41/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet160</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>366</Index>
+          <InterfaceName>Ethernet10/42/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet164</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>367</Index>
+          <InterfaceName>Ethernet10/43/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet168</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>368</Index>
+          <InterfaceName>Ethernet10/44/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet172</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>369</Index>
+          <InterfaceName>Ethernet10/45/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet176</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>370</Index>
+          <InterfaceName>Ethernet10/46/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet180</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>371</Index>
+          <InterfaceName>Ethernet10/47/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet184</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds>40000</AlternateSpeeds>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>372</Index>
+          <InterfaceName>Ethernet10/48/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName>Ethernet188</SonicName>
+          <Speed>100000</Speed>
+        </a:EthernetInterface>
+      </EthernetInterfaces>
+      <FlowControl>true</FlowControl>
+      <Height>0</Height>
+      <HwSku>Sonic-T2-sku</HwSku>
+      <InfinibandInterfaces xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+      <InterfaceMetadata xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution">
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet3/1/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-400G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet3/2/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-400G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet3/3/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-400G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet3/4/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-400G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet3/5/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-400G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet3/6/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-400G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet3/7/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-400G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet3/8/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-400G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet3/9/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-400G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet3/10/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-400G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet3/11/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-400G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>11</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:11</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>11</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet3/12/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-400G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet3/13/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-400G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>13</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:13</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>13</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet3/14/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-400G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>14</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:14</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>14</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet3/15/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-400G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>15</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:15</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>15</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet3/16/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-400G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet3/17/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-400G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>17</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:17</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>17</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet3/18/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-400G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>18</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:18</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>18</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet3/19/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-400G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>19</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:19</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet3/20/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-400G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet3/21/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-400G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>21</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:21</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet3/22/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-400G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>22</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:22</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet3/23/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-400G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>23</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:23</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet3/24/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-400G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet3/25/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-400G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>25</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:25</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet3/26/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-400G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>26</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:26</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet3/27/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-400G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>27</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:27</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet3/28/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-400G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet3/29/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-400G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>29</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:29</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>11</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet3/30/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-400G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>30</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:30</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet3/31/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-400G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>31</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:31</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>13</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet3/32/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-400G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>14</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet3/33/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-400G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>33</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:33</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>15</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet3/34/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-400G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>34</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:34</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet3/35/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-400G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>35</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:35</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>17</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet3/36/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-400G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>MacSecEnabled</a:Name>
+              <a:Value>True</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>18</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>cpu3/0</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-400G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>37</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:37</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>19</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>cpu3/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-400G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>37</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:37</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>19</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Recirc3/0/0</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-400G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>38</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:38</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Recirc3/1/0</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-400G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>38</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:38</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Recirc3/0/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-400G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>39</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:39</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>19</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Recirc3/1/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-400G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>39</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:3:0:39</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>19</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet4/1/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet4/2/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet4/3/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet4/4/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet4/5/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet4/6/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet4/7/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet4/8/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet4/9/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet4/10/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet4/11/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>11</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:11</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>11</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet4/12/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet4/13/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>13</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:13</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>13</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet4/14/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>14</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:14</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>14</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet4/15/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>15</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:15</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>15</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet4/16/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet4/17/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>17</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:17</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>17</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet4/18/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>18</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:18</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>18</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet4/19/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>19</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:19</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>19</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet4/20/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet4/21/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>21</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:21</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>21</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet4/22/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>22</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:22</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>22</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet4/23/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>23</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:23</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>23</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet4/24/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet4/25/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>25</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:25</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>25</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet4/26/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>26</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:26</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>26</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet4/27/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>27</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:27</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>27</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet4/28/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet4/29/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>29</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:29</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>29</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet4/30/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>30</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:30</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>30</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet4/31/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>31</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:31</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>31</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet4/32/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet4/33/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>33</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:33</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>33</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet4/34/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>34</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:34</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>34</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet4/35/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>35</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:35</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>35</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet4/36/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet4/37/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>37</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:37</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>37</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet4/38/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>38</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:38</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>38</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet4/39/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>39</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:39</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>39</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet4/40/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>40</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:40</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>40</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet4/41/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>41</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:41</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>41</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet4/42/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>42</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:42</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>42</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet4/43/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>43</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:43</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>43</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet4/44/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>44</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:44</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>44</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet4/45/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>45</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:45</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>45</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet4/46/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>46</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:46</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>46</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet4/47/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>47</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:47</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>47</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet4/48/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>48</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:48</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>48</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>cpu4/0</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>49</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:49</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>49</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Recirc4/0/0</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>50</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:50</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>50</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Recirc4/0/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>51</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:4:0:51</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>51</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet5/1/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:5:0:1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet5/2/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:5:0:2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet5/3/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:5:0:3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet5/4/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:5:0:4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet5/5/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:5:0:5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet5/6/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:5:0:6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet5/7/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:5:0:7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet5/8/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:5:0:8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet5/9/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:5:0:9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet5/10/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:5:0:10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet5/11/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>11</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:5:0:11</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>11</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet5/12/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:5:0:12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet5/13/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>13</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:5:0:13</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>13</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet5/14/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>14</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:5:0:14</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>14</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet5/15/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>15</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:5:0:15</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>15</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet5/16/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:5:0:16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet5/17/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>17</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:5:0:17</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>17</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet5/18/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>18</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:5:0:18</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>18</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet5/19/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>19</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:5:0:19</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>19</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet5/20/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:5:0:20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet5/21/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>21</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:5:0:21</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>21</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet5/22/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>22</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:5:0:22</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>22</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet5/23/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>23</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:5:0:23</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>23</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet5/24/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:5:0:24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet5/25/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>25</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:5:0:25</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>25</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet5/26/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>26</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:5:0:26</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>26</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet5/27/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>27</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:5:0:27</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>27</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet5/28/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:5:0:28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet5/29/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>29</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:5:0:29</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>29</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet5/30/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>30</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:5:0:30</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>30</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet5/31/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>31</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:5:0:31</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>31</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet5/32/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:5:0:32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet5/33/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>33</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:5:0:33</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>33</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet5/34/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>34</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:5:0:34</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>34</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet5/35/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>35</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:5:0:35</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>35</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet5/36/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:5:0:36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet5/37/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>37</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:5:0:37</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>37</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet5/38/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>38</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:5:0:38</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>38</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet5/39/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>39</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:5:0:39</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>39</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet5/40/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>40</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:5:0:40</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>40</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet5/41/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>41</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:5:0:41</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>41</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet5/42/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>42</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:5:0:42</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>42</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet5/43/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>43</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:5:0:43</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>43</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet5/44/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>44</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:5:0:44</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>44</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet5/45/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>45</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:5:0:45</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>45</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet5/46/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>46</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:5:0:46</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>46</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet5/47/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>47</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:5:0:47</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>47</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet5/48/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>48</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:5:0:48</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>48</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>cpu5/0</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>49</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:5:0:49</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>49</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Recirc5/0/0</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>50</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:5:0:50</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>50</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Recirc5/0/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>51</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:5:0:51</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>51</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet6/1/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:6:0:1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet6/2/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:6:0:2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet6/3/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:6:0:3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet6/4/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:6:0:4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet6/5/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:6:0:5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet6/6/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:6:0:6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet6/7/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:6:0:7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet6/8/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:6:0:8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet6/9/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:6:0:9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet6/10/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:6:0:10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet6/11/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>11</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:6:0:11</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>11</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet6/12/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:6:0:12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet6/13/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>13</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:6:0:13</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>13</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet6/14/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>14</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:6:0:14</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>14</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet6/15/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>15</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:6:0:15</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>15</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet6/16/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:6:0:16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet6/17/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>17</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:6:0:17</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>17</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet6/18/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>18</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:6:0:18</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>18</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet6/19/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>19</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:6:0:19</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>19</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet6/20/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:6:0:20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet6/21/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>21</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:6:0:21</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>21</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet6/22/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>22</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:6:0:22</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>22</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet6/23/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>23</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:6:0:23</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>23</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet6/24/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:6:0:24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet6/25/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>25</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:6:0:25</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>25</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet6/26/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>26</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:6:0:26</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>26</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet6/27/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>27</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:6:0:27</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>27</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet6/28/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:6:0:28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet6/29/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>29</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:6:0:29</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>29</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet6/30/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>30</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:6:0:30</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>30</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet6/31/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>31</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:6:0:31</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>31</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet6/32/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:6:0:32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet6/33/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>33</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:6:0:33</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>33</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet6/34/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>34</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:6:0:34</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>34</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet6/35/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>35</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:6:0:35</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>35</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet6/36/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:6:0:36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet6/37/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>37</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:6:0:37</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>37</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet6/38/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>38</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:6:0:38</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>38</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet6/39/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>39</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:6:0:39</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>39</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet6/40/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>40</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:6:0:40</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>40</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet6/41/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>41</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:6:0:41</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>41</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet6/42/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>42</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:6:0:42</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>42</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet6/43/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>43</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:6:0:43</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>43</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet6/44/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>44</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:6:0:44</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>44</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet6/45/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>45</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:6:0:45</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>45</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet6/46/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>46</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:6:0:46</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>46</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet6/47/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>47</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:6:0:47</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>47</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet6/48/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>48</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:6:0:48</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>48</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>cpu6/0</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>49</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:6:0:49</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>49</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Recirc6/0/0</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>50</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:6:0:50</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>50</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Recirc6/0/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>51</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:6:0:51</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>51</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet7/1/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:7:0:1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet7/2/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>2</a:Value>
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+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:7:0:2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet7/3/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:7:0:3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet7/4/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:7:0:4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet7/5/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:7:0:5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet7/6/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:7:0:6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet7/7/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:7:0:7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet7/8/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:7:0:8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet7/9/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:7:0:9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet7/10/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:7:0:10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet7/11/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>11</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:7:0:11</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>11</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet7/12/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:7:0:12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet7/13/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>13</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:7:0:13</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>13</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet7/14/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>14</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:7:0:14</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>14</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet7/15/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>15</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:7:0:15</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>15</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet7/16/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:7:0:16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet7/17/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>17</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:7:0:17</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>17</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet7/18/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>18</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:7:0:18</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>18</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet7/19/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>19</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:7:0:19</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>19</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet7/20/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:7:0:20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet7/21/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>21</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:7:0:21</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>21</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet7/22/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>22</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:7:0:22</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>22</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet7/23/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>23</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:7:0:23</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>23</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet7/24/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:7:0:24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet7/25/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>25</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:7:0:25</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>25</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet7/26/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>26</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:7:0:26</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>26</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet7/27/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>27</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:7:0:27</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>27</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet7/28/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:7:0:28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet7/29/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>29</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:7:0:29</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>29</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet7/30/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>30</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:7:0:30</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>30</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet7/31/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>31</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:7:0:31</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>31</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet7/32/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:7:0:32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet7/33/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>33</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:7:0:33</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>33</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet7/34/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>34</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:7:0:34</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>34</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet7/35/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>35</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:7:0:35</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>35</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet7/36/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:7:0:36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet7/37/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>37</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:7:0:37</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>37</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet7/38/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>38</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:7:0:38</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>38</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet7/39/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>39</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:7:0:39</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>39</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet7/40/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>40</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:7:0:40</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>40</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet7/41/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>41</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:7:0:41</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>41</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet7/42/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
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+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>42</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:7:0:42</a:Value>
+            </a:InterfaceProperty>
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+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
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+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>42</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
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+          <a:InterfaceName>Ethernet7/43/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>43</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:7:0:43</a:Value>
+            </a:InterfaceProperty>
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+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>43</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet7/44/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>44</a:Value>
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+              <a:Name>InterfaceGroupIndex</a:Name>
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+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>44</a:Value>
+            </a:InterfaceProperty>
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+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
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+          <a:InterfaceName>Ethernet7/45/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>45</a:Value>
+            </a:InterfaceProperty>
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+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:7:0:45</a:Value>
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+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>45</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet7/46/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>46</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:7:0:46</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>46</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet7/47/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>47</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:7:0:47</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>47</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet7/48/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>48</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:7:0:48</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>48</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>cpu7/0</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>49</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:7:0:49</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>49</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Recirc7/0/0</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>50</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:7:0:50</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>50</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Recirc7/0/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>51</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:7:0:51</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>51</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet8/1/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:8:0:1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet8/2/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:8:0:2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet8/3/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:8:0:3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet8/4/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:8:0:4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet8/5/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:8:0:5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet8/6/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:8:0:6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet8/7/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:8:0:7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet8/8/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:8:0:8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet8/9/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:8:0:9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet8/10/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:8:0:10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet8/11/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>11</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:8:0:11</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>11</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet8/12/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:8:0:12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet8/13/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>13</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:8:0:13</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>13</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet8/14/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>14</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:8:0:14</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>14</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet8/15/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>15</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:8:0:15</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>15</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet8/16/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:8:0:16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet8/17/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>17</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:8:0:17</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>17</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet8/18/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>18</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:8:0:18</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>18</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet8/19/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>19</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:8:0:19</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>19</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet8/20/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:8:0:20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet8/21/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>21</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:8:0:21</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>21</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet8/22/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>22</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:8:0:22</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>22</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet8/23/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>23</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:8:0:23</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>23</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet8/24/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:8:0:24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet8/25/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>25</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:8:0:25</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>25</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet8/26/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>26</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:8:0:26</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>26</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet8/27/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>27</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:8:0:27</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>27</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet8/28/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:8:0:28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet8/29/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>29</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:8:0:29</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>29</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet8/30/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>30</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:8:0:30</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>30</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet8/31/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>31</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:8:0:31</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>31</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet8/32/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:8:0:32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet8/33/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>33</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:8:0:33</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>33</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet8/34/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>34</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:8:0:34</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>34</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet8/35/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>35</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:8:0:35</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>35</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet8/36/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:8:0:36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet8/37/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>37</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:8:0:37</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>37</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet8/38/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>38</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:8:0:38</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>38</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet8/39/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>39</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:8:0:39</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>39</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet8/40/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>40</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:8:0:40</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>40</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet8/41/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>41</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:8:0:41</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>41</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet8/42/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>42</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:8:0:42</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>42</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet8/43/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>43</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:8:0:43</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>43</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet8/44/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>44</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:8:0:44</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>44</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet8/45/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>45</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:8:0:45</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>45</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet8/46/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>46</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:8:0:46</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>46</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet8/47/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>47</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:8:0:47</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>47</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet8/48/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>48</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:8:0:48</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>48</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>cpu8/0</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>49</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:8:0:49</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>49</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Recirc8/0/0</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>50</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:8:0:50</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>50</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Recirc8/0/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>51</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:8:0:51</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>51</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet9/1/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:9:0:1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet9/2/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:9:0:2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet9/3/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:9:0:3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet9/4/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:9:0:4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet9/5/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:9:0:5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet9/6/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:9:0:6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet9/7/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:9:0:7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet9/8/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:9:0:8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet9/9/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:9:0:9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet9/10/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:9:0:10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet9/11/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>11</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:9:0:11</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>11</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet9/12/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:9:0:12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet9/13/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>13</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:9:0:13</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>13</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet9/14/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>14</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:9:0:14</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>14</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet9/15/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>15</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:9:0:15</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>15</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet9/16/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:9:0:16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet9/17/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>17</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:9:0:17</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>17</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet9/18/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>18</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:9:0:18</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>18</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet9/19/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>19</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:9:0:19</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>19</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet9/20/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:9:0:20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet9/21/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>21</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:9:0:21</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>21</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet9/22/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>22</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:9:0:22</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>22</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet9/23/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>23</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:9:0:23</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>23</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet9/24/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:9:0:24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet9/25/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>25</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:9:0:25</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>25</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet9/26/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>26</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:9:0:26</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>26</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet9/27/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>27</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:9:0:27</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>27</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet9/28/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:9:0:28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet9/29/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>29</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:9:0:29</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>29</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet9/30/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>30</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:9:0:30</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>30</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet9/31/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>31</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:9:0:31</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>31</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet9/32/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:9:0:32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet9/33/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>33</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:9:0:33</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>33</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet9/34/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>34</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:9:0:34</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>34</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet9/35/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>35</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:9:0:35</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>35</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet9/36/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:9:0:36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet9/37/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>37</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:9:0:37</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>37</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet9/38/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>38</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:9:0:38</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>38</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet9/39/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>39</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:9:0:39</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>39</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet9/40/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>40</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:9:0:40</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>40</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet9/41/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>41</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:9:0:41</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>41</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet9/42/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>42</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:9:0:42</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>42</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet9/43/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>43</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:9:0:43</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>43</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet9/44/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>44</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:9:0:44</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>44</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet9/45/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>45</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:9:0:45</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>45</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet9/46/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>46</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:9:0:46</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>46</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet9/47/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>47</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:9:0:47</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>47</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet9/48/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>48</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:9:0:48</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>48</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet10/1/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:10:0:1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet10/2/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:10:0:2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>2</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet10/3/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:10:0:3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>3</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet10/4/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:10:0:4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>4</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet10/5/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:10:0:5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>5</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet10/6/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:10:0:6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>6</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet10/7/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:10:0:7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>7</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet10/8/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:10:0:8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>8</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet10/9/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:10:0:9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>9</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet10/10/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:10:0:10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet10/11/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>11</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:10:0:11</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>11</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet10/12/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:10:0:12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>12</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet10/13/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>13</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:10:0:13</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>13</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet10/14/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>14</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:10:0:14</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>14</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet10/15/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>15</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:10:0:15</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>15</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet10/16/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:10:0:16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>16</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet10/17/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>17</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:10:0:17</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>17</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet10/18/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>18</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:10:0:18</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>18</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet10/19/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>19</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:10:0:19</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>19</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet10/20/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:10:0:20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>20</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet10/21/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>21</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:10:0:21</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>21</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet10/22/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>22</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:10:0:22</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>22</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet10/23/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>23</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:10:0:23</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>23</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet10/24/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:10:0:24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>24</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet10/25/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>25</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:10:0:25</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>25</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet10/26/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>26</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:10:0:26</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>26</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet10/27/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>27</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:10:0:27</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>27</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet10/28/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:10:0:28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>28</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet10/29/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>29</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:10:0:29</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>29</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet10/30/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>30</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:10:0:30</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>30</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet10/31/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>31</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:10:0:31</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>31</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet10/32/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:10:0:32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>32</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet10/33/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>33</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:10:0:33</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>33</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet10/34/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>34</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:10:0:34</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>34</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet10/35/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>35</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:10:0:35</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>35</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet10/36/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:10:0:36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet10/37/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>37</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:10:0:37</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>37</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet10/38/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>38</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:10:0:38</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>38</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet10/39/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>39</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:10:0:39</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>39</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet10/40/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>40</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:10:0:40</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>40</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet10/41/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>41</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:10:0:41</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>41</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet10/42/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>42</a:Value>
+            </a:InterfaceProperty>
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+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:10:0:42</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>42</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet10/43/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>43</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:10:0:43</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>43</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet10/44/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>44</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:10:0:44</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>44</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet10/45/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>45</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:10:0:45</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>45</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet10/46/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>46</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:10:0:46</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>46</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet10/47/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>47</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:10:0:47</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>47</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Ethernet10/48/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>48</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:10:0:48</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>48</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>cpu10/0</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>49</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:10:0:49</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>49</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Recirc10/0/0</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>50</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:10:0:50</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>50</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+        <a:DeviceInterfaceMetadata>
+          <a:InterfaceName>Recirc10/0/1</a:InterfaceName>
+          <a:Properties>
+            <a:InterfaceProperty>
+              <a:Name>LineCardSku</a:Name>
+              <a:Value>Sonic-100G-sku</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>SlotIndex</a:Name>
+              <a:Value>10</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ChassisIndex</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>PortIndex</a:Name>
+              <a:Value>51</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceGroupIndex</a:Name>
+              <a:Value>0:10:0:51</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>InterfaceSubGroupIndex</a:Name>
+              <a:Value>1</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>ProviderChipName</a:Name>
+              <a:Value>ASIC0</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicSwitchId</a:Name>
+              <a:Value>36</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>AsicInterfaceIndex</a:Name>
+              <a:Value>51</a:Value>
+            </a:InterfaceProperty>
+            <a:InterfaceProperty>
+              <a:Name>CoreId</a:Name>
+              <a:Value>0</a:Value>
+            </a:InterfaceProperty>
+          </a:Properties>
+        </a:DeviceInterfaceMetadata>
+      </InterfaceMetadata>
+      <ManagementInterfaces xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution">
+        <a:ManagementInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>Management1/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>1000</Speed>
+        </a:ManagementInterface>
+      </ManagementInterfaces>
+      <OpticalInterfaces xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution">
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>Ethernet3/1/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>2</Index>
+          <InterfaceName>Ethernet3/1/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>3</Index>
+          <InterfaceName>Ethernet3/1/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>4</Index>
+          <InterfaceName>Ethernet3/2/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>5</Index>
+          <InterfaceName>Ethernet3/2/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>6</Index>
+          <InterfaceName>Ethernet3/2/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>7</Index>
+          <InterfaceName>Ethernet3/3/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>8</Index>
+          <InterfaceName>Ethernet3/3/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>9</Index>
+          <InterfaceName>Ethernet3/3/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>10</Index>
+          <InterfaceName>Ethernet3/4/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>11</Index>
+          <InterfaceName>Ethernet3/4/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>12</Index>
+          <InterfaceName>Ethernet3/4/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>13</Index>
+          <InterfaceName>Ethernet3/5/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>14</Index>
+          <InterfaceName>Ethernet3/5/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>15</Index>
+          <InterfaceName>Ethernet3/5/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>16</Index>
+          <InterfaceName>Ethernet3/6/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>17</Index>
+          <InterfaceName>Ethernet3/6/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>18</Index>
+          <InterfaceName>Ethernet3/6/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>19</Index>
+          <InterfaceName>Ethernet3/7/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>20</Index>
+          <InterfaceName>Ethernet3/7/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>21</Index>
+          <InterfaceName>Ethernet3/7/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>22</Index>
+          <InterfaceName>Ethernet3/8/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>23</Index>
+          <InterfaceName>Ethernet3/8/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>24</Index>
+          <InterfaceName>Ethernet3/8/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>25</Index>
+          <InterfaceName>Ethernet3/9/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>26</Index>
+          <InterfaceName>Ethernet3/9/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>27</Index>
+          <InterfaceName>Ethernet3/9/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>28</Index>
+          <InterfaceName>Ethernet3/10/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>29</Index>
+          <InterfaceName>Ethernet3/10/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>30</Index>
+          <InterfaceName>Ethernet3/10/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>31</Index>
+          <InterfaceName>Ethernet3/11/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>32</Index>
+          <InterfaceName>Ethernet3/11/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>33</Index>
+          <InterfaceName>Ethernet3/11/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>34</Index>
+          <InterfaceName>Ethernet3/12/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>35</Index>
+          <InterfaceName>Ethernet3/12/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>36</Index>
+          <InterfaceName>Ethernet3/12/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>37</Index>
+          <InterfaceName>Ethernet3/13/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>38</Index>
+          <InterfaceName>Ethernet3/13/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>39</Index>
+          <InterfaceName>Ethernet3/13/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>40</Index>
+          <InterfaceName>Ethernet3/14/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>41</Index>
+          <InterfaceName>Ethernet3/14/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>42</Index>
+          <InterfaceName>Ethernet3/14/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>43</Index>
+          <InterfaceName>Ethernet3/15/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>44</Index>
+          <InterfaceName>Ethernet3/15/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>45</Index>
+          <InterfaceName>Ethernet3/15/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>46</Index>
+          <InterfaceName>Ethernet3/16/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>47</Index>
+          <InterfaceName>Ethernet3/16/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>48</Index>
+          <InterfaceName>Ethernet3/16/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>49</Index>
+          <InterfaceName>Ethernet3/17/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>50</Index>
+          <InterfaceName>Ethernet3/17/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>51</Index>
+          <InterfaceName>Ethernet3/17/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>52</Index>
+          <InterfaceName>Ethernet3/18/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>53</Index>
+          <InterfaceName>Ethernet3/18/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>54</Index>
+          <InterfaceName>Ethernet3/18/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>55</Index>
+          <InterfaceName>Ethernet3/19/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>56</Index>
+          <InterfaceName>Ethernet3/19/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>57</Index>
+          <InterfaceName>Ethernet3/19/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>58</Index>
+          <InterfaceName>Ethernet3/20/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>59</Index>
+          <InterfaceName>Ethernet3/20/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>60</Index>
+          <InterfaceName>Ethernet3/20/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>61</Index>
+          <InterfaceName>Ethernet3/21/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>62</Index>
+          <InterfaceName>Ethernet3/21/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>63</Index>
+          <InterfaceName>Ethernet3/21/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>64</Index>
+          <InterfaceName>Ethernet3/22/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>65</Index>
+          <InterfaceName>Ethernet3/22/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>66</Index>
+          <InterfaceName>Ethernet3/22/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>67</Index>
+          <InterfaceName>Ethernet3/23/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>68</Index>
+          <InterfaceName>Ethernet3/23/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>69</Index>
+          <InterfaceName>Ethernet3/23/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>70</Index>
+          <InterfaceName>Ethernet3/24/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>71</Index>
+          <InterfaceName>Ethernet3/24/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>72</Index>
+          <InterfaceName>Ethernet3/24/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>73</Index>
+          <InterfaceName>Ethernet3/25/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>74</Index>
+          <InterfaceName>Ethernet3/25/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>75</Index>
+          <InterfaceName>Ethernet3/25/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>76</Index>
+          <InterfaceName>Ethernet3/26/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>77</Index>
+          <InterfaceName>Ethernet3/26/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>78</Index>
+          <InterfaceName>Ethernet3/26/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>79</Index>
+          <InterfaceName>Ethernet3/27/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>80</Index>
+          <InterfaceName>Ethernet3/27/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>81</Index>
+          <InterfaceName>Ethernet3/27/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>82</Index>
+          <InterfaceName>Ethernet3/28/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>83</Index>
+          <InterfaceName>Ethernet3/28/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>84</Index>
+          <InterfaceName>Ethernet3/28/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>85</Index>
+          <InterfaceName>Ethernet3/29/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>86</Index>
+          <InterfaceName>Ethernet3/29/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>87</Index>
+          <InterfaceName>Ethernet3/29/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>88</Index>
+          <InterfaceName>Ethernet3/30/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>89</Index>
+          <InterfaceName>Ethernet3/30/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>90</Index>
+          <InterfaceName>Ethernet3/30/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>91</Index>
+          <InterfaceName>Ethernet3/31/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>92</Index>
+          <InterfaceName>Ethernet3/31/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>93</Index>
+          <InterfaceName>Ethernet3/31/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>94</Index>
+          <InterfaceName>Ethernet3/32/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>95</Index>
+          <InterfaceName>Ethernet3/32/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>96</Index>
+          <InterfaceName>Ethernet3/32/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>97</Index>
+          <InterfaceName>Ethernet3/33/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>98</Index>
+          <InterfaceName>Ethernet3/33/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>99</Index>
+          <InterfaceName>Ethernet3/33/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>100</Index>
+          <InterfaceName>Ethernet3/34/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>101</Index>
+          <InterfaceName>Ethernet3/34/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>102</Index>
+          <InterfaceName>Ethernet3/34/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>103</Index>
+          <InterfaceName>Ethernet3/35/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>104</Index>
+          <InterfaceName>Ethernet3/35/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>105</Index>
+          <InterfaceName>Ethernet3/35/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>106</Index>
+          <InterfaceName>Ethernet3/36/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>107</Index>
+          <InterfaceName>Ethernet3/36/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>108</Index>
+          <InterfaceName>Ethernet3/36/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>109</Index>
+          <InterfaceName>Ethernet4/1/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>110</Index>
+          <InterfaceName>Ethernet4/1/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>111</Index>
+          <InterfaceName>Ethernet4/1/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>112</Index>
+          <InterfaceName>Ethernet4/2/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>113</Index>
+          <InterfaceName>Ethernet4/2/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>114</Index>
+          <InterfaceName>Ethernet4/2/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>115</Index>
+          <InterfaceName>Ethernet4/3/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>116</Index>
+          <InterfaceName>Ethernet4/3/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>117</Index>
+          <InterfaceName>Ethernet4/3/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>118</Index>
+          <InterfaceName>Ethernet4/4/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>119</Index>
+          <InterfaceName>Ethernet4/4/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>120</Index>
+          <InterfaceName>Ethernet4/4/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>121</Index>
+          <InterfaceName>Ethernet4/5/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>122</Index>
+          <InterfaceName>Ethernet4/5/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>123</Index>
+          <InterfaceName>Ethernet4/5/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>124</Index>
+          <InterfaceName>Ethernet4/6/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>125</Index>
+          <InterfaceName>Ethernet4/6/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>126</Index>
+          <InterfaceName>Ethernet4/6/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>127</Index>
+          <InterfaceName>Ethernet4/7/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>128</Index>
+          <InterfaceName>Ethernet4/7/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>129</Index>
+          <InterfaceName>Ethernet4/7/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>130</Index>
+          <InterfaceName>Ethernet4/8/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>131</Index>
+          <InterfaceName>Ethernet4/8/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>132</Index>
+          <InterfaceName>Ethernet4/8/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>133</Index>
+          <InterfaceName>Ethernet4/9/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>134</Index>
+          <InterfaceName>Ethernet4/9/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>135</Index>
+          <InterfaceName>Ethernet4/9/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>136</Index>
+          <InterfaceName>Ethernet4/10/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>137</Index>
+          <InterfaceName>Ethernet4/10/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>138</Index>
+          <InterfaceName>Ethernet4/10/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>139</Index>
+          <InterfaceName>Ethernet4/11/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>140</Index>
+          <InterfaceName>Ethernet4/11/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>141</Index>
+          <InterfaceName>Ethernet4/11/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>142</Index>
+          <InterfaceName>Ethernet4/12/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>143</Index>
+          <InterfaceName>Ethernet4/12/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>144</Index>
+          <InterfaceName>Ethernet4/12/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>145</Index>
+          <InterfaceName>Ethernet4/13/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>146</Index>
+          <InterfaceName>Ethernet4/13/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>147</Index>
+          <InterfaceName>Ethernet4/13/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>148</Index>
+          <InterfaceName>Ethernet4/14/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>149</Index>
+          <InterfaceName>Ethernet4/14/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>150</Index>
+          <InterfaceName>Ethernet4/14/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>151</Index>
+          <InterfaceName>Ethernet4/15/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>152</Index>
+          <InterfaceName>Ethernet4/15/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>153</Index>
+          <InterfaceName>Ethernet4/15/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>154</Index>
+          <InterfaceName>Ethernet4/16/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>155</Index>
+          <InterfaceName>Ethernet4/16/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>156</Index>
+          <InterfaceName>Ethernet4/16/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>157</Index>
+          <InterfaceName>Ethernet4/17/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>158</Index>
+          <InterfaceName>Ethernet4/17/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>159</Index>
+          <InterfaceName>Ethernet4/17/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>160</Index>
+          <InterfaceName>Ethernet4/18/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>161</Index>
+          <InterfaceName>Ethernet4/18/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>162</Index>
+          <InterfaceName>Ethernet4/18/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>163</Index>
+          <InterfaceName>Ethernet4/19/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>164</Index>
+          <InterfaceName>Ethernet4/19/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>165</Index>
+          <InterfaceName>Ethernet4/19/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>166</Index>
+          <InterfaceName>Ethernet4/20/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>167</Index>
+          <InterfaceName>Ethernet4/20/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>168</Index>
+          <InterfaceName>Ethernet4/20/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>169</Index>
+          <InterfaceName>Ethernet4/21/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>170</Index>
+          <InterfaceName>Ethernet4/21/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>171</Index>
+          <InterfaceName>Ethernet4/21/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>172</Index>
+          <InterfaceName>Ethernet4/22/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>173</Index>
+          <InterfaceName>Ethernet4/22/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>174</Index>
+          <InterfaceName>Ethernet4/22/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>175</Index>
+          <InterfaceName>Ethernet4/23/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>176</Index>
+          <InterfaceName>Ethernet4/23/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>177</Index>
+          <InterfaceName>Ethernet4/23/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>178</Index>
+          <InterfaceName>Ethernet4/24/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>179</Index>
+          <InterfaceName>Ethernet4/24/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>180</Index>
+          <InterfaceName>Ethernet4/24/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>181</Index>
+          <InterfaceName>Ethernet4/25/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>182</Index>
+          <InterfaceName>Ethernet4/25/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>183</Index>
+          <InterfaceName>Ethernet4/25/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>184</Index>
+          <InterfaceName>Ethernet4/26/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>185</Index>
+          <InterfaceName>Ethernet4/26/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>186</Index>
+          <InterfaceName>Ethernet4/26/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>187</Index>
+          <InterfaceName>Ethernet4/27/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>188</Index>
+          <InterfaceName>Ethernet4/27/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>189</Index>
+          <InterfaceName>Ethernet4/27/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>190</Index>
+          <InterfaceName>Ethernet4/28/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>191</Index>
+          <InterfaceName>Ethernet4/28/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>192</Index>
+          <InterfaceName>Ethernet4/28/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>193</Index>
+          <InterfaceName>Ethernet4/29/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>194</Index>
+          <InterfaceName>Ethernet4/29/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>195</Index>
+          <InterfaceName>Ethernet4/29/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>196</Index>
+          <InterfaceName>Ethernet4/30/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>197</Index>
+          <InterfaceName>Ethernet4/30/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>198</Index>
+          <InterfaceName>Ethernet4/30/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>199</Index>
+          <InterfaceName>Ethernet4/31/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>200</Index>
+          <InterfaceName>Ethernet4/31/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>201</Index>
+          <InterfaceName>Ethernet4/31/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>202</Index>
+          <InterfaceName>Ethernet4/32/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>203</Index>
+          <InterfaceName>Ethernet4/32/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>204</Index>
+          <InterfaceName>Ethernet4/32/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>205</Index>
+          <InterfaceName>Ethernet4/33/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>206</Index>
+          <InterfaceName>Ethernet4/33/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>207</Index>
+          <InterfaceName>Ethernet4/33/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>208</Index>
+          <InterfaceName>Ethernet4/34/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>209</Index>
+          <InterfaceName>Ethernet4/34/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>210</Index>
+          <InterfaceName>Ethernet4/34/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>211</Index>
+          <InterfaceName>Ethernet4/35/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>212</Index>
+          <InterfaceName>Ethernet4/35/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>213</Index>
+          <InterfaceName>Ethernet4/35/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>214</Index>
+          <InterfaceName>Ethernet4/36/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>215</Index>
+          <InterfaceName>Ethernet4/36/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>216</Index>
+          <InterfaceName>Ethernet4/36/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>217</Index>
+          <InterfaceName>Ethernet4/37/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>218</Index>
+          <InterfaceName>Ethernet4/37/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>219</Index>
+          <InterfaceName>Ethernet4/37/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>220</Index>
+          <InterfaceName>Ethernet4/38/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>221</Index>
+          <InterfaceName>Ethernet4/38/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>222</Index>
+          <InterfaceName>Ethernet4/38/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>223</Index>
+          <InterfaceName>Ethernet4/39/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>224</Index>
+          <InterfaceName>Ethernet4/39/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>225</Index>
+          <InterfaceName>Ethernet4/39/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>226</Index>
+          <InterfaceName>Ethernet4/40/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>227</Index>
+          <InterfaceName>Ethernet4/40/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>228</Index>
+          <InterfaceName>Ethernet4/40/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>229</Index>
+          <InterfaceName>Ethernet4/41/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>230</Index>
+          <InterfaceName>Ethernet4/41/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>231</Index>
+          <InterfaceName>Ethernet4/41/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>232</Index>
+          <InterfaceName>Ethernet4/42/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>233</Index>
+          <InterfaceName>Ethernet4/42/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>234</Index>
+          <InterfaceName>Ethernet4/42/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>235</Index>
+          <InterfaceName>Ethernet4/43/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>236</Index>
+          <InterfaceName>Ethernet4/43/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>237</Index>
+          <InterfaceName>Ethernet4/43/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>238</Index>
+          <InterfaceName>Ethernet4/44/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>239</Index>
+          <InterfaceName>Ethernet4/44/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>240</Index>
+          <InterfaceName>Ethernet4/44/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>241</Index>
+          <InterfaceName>Ethernet4/45/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>242</Index>
+          <InterfaceName>Ethernet4/45/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>243</Index>
+          <InterfaceName>Ethernet4/45/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>244</Index>
+          <InterfaceName>Ethernet4/46/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>245</Index>
+          <InterfaceName>Ethernet4/46/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>246</Index>
+          <InterfaceName>Ethernet4/46/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>247</Index>
+          <InterfaceName>Ethernet4/47/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>248</Index>
+          <InterfaceName>Ethernet4/47/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>249</Index>
+          <InterfaceName>Ethernet4/47/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>250</Index>
+          <InterfaceName>Ethernet4/48/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>251</Index>
+          <InterfaceName>Ethernet4/48/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>252</Index>
+          <InterfaceName>Ethernet4/48/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>253</Index>
+          <InterfaceName>Ethernet5/1/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>254</Index>
+          <InterfaceName>Ethernet5/1/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>255</Index>
+          <InterfaceName>Ethernet5/1/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>256</Index>
+          <InterfaceName>Ethernet5/2/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>257</Index>
+          <InterfaceName>Ethernet5/2/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>258</Index>
+          <InterfaceName>Ethernet5/2/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>259</Index>
+          <InterfaceName>Ethernet5/3/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>260</Index>
+          <InterfaceName>Ethernet5/3/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>261</Index>
+          <InterfaceName>Ethernet5/3/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>262</Index>
+          <InterfaceName>Ethernet5/4/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>263</Index>
+          <InterfaceName>Ethernet5/4/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>264</Index>
+          <InterfaceName>Ethernet5/4/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>265</Index>
+          <InterfaceName>Ethernet5/5/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>266</Index>
+          <InterfaceName>Ethernet5/5/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>267</Index>
+          <InterfaceName>Ethernet5/5/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>268</Index>
+          <InterfaceName>Ethernet5/6/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>269</Index>
+          <InterfaceName>Ethernet5/6/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>270</Index>
+          <InterfaceName>Ethernet5/6/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>271</Index>
+          <InterfaceName>Ethernet5/7/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>272</Index>
+          <InterfaceName>Ethernet5/7/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>273</Index>
+          <InterfaceName>Ethernet5/7/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>274</Index>
+          <InterfaceName>Ethernet5/8/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>275</Index>
+          <InterfaceName>Ethernet5/8/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>276</Index>
+          <InterfaceName>Ethernet5/8/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>277</Index>
+          <InterfaceName>Ethernet5/9/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>278</Index>
+          <InterfaceName>Ethernet5/9/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>279</Index>
+          <InterfaceName>Ethernet5/9/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>280</Index>
+          <InterfaceName>Ethernet5/10/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>281</Index>
+          <InterfaceName>Ethernet5/10/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>282</Index>
+          <InterfaceName>Ethernet5/10/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>283</Index>
+          <InterfaceName>Ethernet5/11/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>284</Index>
+          <InterfaceName>Ethernet5/11/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>285</Index>
+          <InterfaceName>Ethernet5/11/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>286</Index>
+          <InterfaceName>Ethernet5/12/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>287</Index>
+          <InterfaceName>Ethernet5/12/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>288</Index>
+          <InterfaceName>Ethernet5/12/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>289</Index>
+          <InterfaceName>Ethernet5/13/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>290</Index>
+          <InterfaceName>Ethernet5/13/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>291</Index>
+          <InterfaceName>Ethernet5/13/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>292</Index>
+          <InterfaceName>Ethernet5/14/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>293</Index>
+          <InterfaceName>Ethernet5/14/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>294</Index>
+          <InterfaceName>Ethernet5/14/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>295</Index>
+          <InterfaceName>Ethernet5/15/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>296</Index>
+          <InterfaceName>Ethernet5/15/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>297</Index>
+          <InterfaceName>Ethernet5/15/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>298</Index>
+          <InterfaceName>Ethernet5/16/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>299</Index>
+          <InterfaceName>Ethernet5/16/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>300</Index>
+          <InterfaceName>Ethernet5/16/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>301</Index>
+          <InterfaceName>Ethernet5/17/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>302</Index>
+          <InterfaceName>Ethernet5/17/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>303</Index>
+          <InterfaceName>Ethernet5/17/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>304</Index>
+          <InterfaceName>Ethernet5/18/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>305</Index>
+          <InterfaceName>Ethernet5/18/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>306</Index>
+          <InterfaceName>Ethernet5/18/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>307</Index>
+          <InterfaceName>Ethernet5/19/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>308</Index>
+          <InterfaceName>Ethernet5/19/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>309</Index>
+          <InterfaceName>Ethernet5/19/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>310</Index>
+          <InterfaceName>Ethernet5/20/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>311</Index>
+          <InterfaceName>Ethernet5/20/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>312</Index>
+          <InterfaceName>Ethernet5/20/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>313</Index>
+          <InterfaceName>Ethernet5/21/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>314</Index>
+          <InterfaceName>Ethernet5/21/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>315</Index>
+          <InterfaceName>Ethernet5/21/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>316</Index>
+          <InterfaceName>Ethernet5/22/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>317</Index>
+          <InterfaceName>Ethernet5/22/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>318</Index>
+          <InterfaceName>Ethernet5/22/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>319</Index>
+          <InterfaceName>Ethernet5/23/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>320</Index>
+          <InterfaceName>Ethernet5/23/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>321</Index>
+          <InterfaceName>Ethernet5/23/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>322</Index>
+          <InterfaceName>Ethernet5/24/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>323</Index>
+          <InterfaceName>Ethernet5/24/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>324</Index>
+          <InterfaceName>Ethernet5/24/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>325</Index>
+          <InterfaceName>Ethernet5/25/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>326</Index>
+          <InterfaceName>Ethernet5/25/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>327</Index>
+          <InterfaceName>Ethernet5/25/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>328</Index>
+          <InterfaceName>Ethernet5/26/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>329</Index>
+          <InterfaceName>Ethernet5/26/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>330</Index>
+          <InterfaceName>Ethernet5/26/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>331</Index>
+          <InterfaceName>Ethernet5/27/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>332</Index>
+          <InterfaceName>Ethernet5/27/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>333</Index>
+          <InterfaceName>Ethernet5/27/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>334</Index>
+          <InterfaceName>Ethernet5/28/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>335</Index>
+          <InterfaceName>Ethernet5/28/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>336</Index>
+          <InterfaceName>Ethernet5/28/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>337</Index>
+          <InterfaceName>Ethernet5/29/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>338</Index>
+          <InterfaceName>Ethernet5/29/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>339</Index>
+          <InterfaceName>Ethernet5/29/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>340</Index>
+          <InterfaceName>Ethernet5/30/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>341</Index>
+          <InterfaceName>Ethernet5/30/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>342</Index>
+          <InterfaceName>Ethernet5/30/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>343</Index>
+          <InterfaceName>Ethernet5/31/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>344</Index>
+          <InterfaceName>Ethernet5/31/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>345</Index>
+          <InterfaceName>Ethernet5/31/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>346</Index>
+          <InterfaceName>Ethernet5/32/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>347</Index>
+          <InterfaceName>Ethernet5/32/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>348</Index>
+          <InterfaceName>Ethernet5/32/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>349</Index>
+          <InterfaceName>Ethernet5/33/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>350</Index>
+          <InterfaceName>Ethernet5/33/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>351</Index>
+          <InterfaceName>Ethernet5/33/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>352</Index>
+          <InterfaceName>Ethernet5/34/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>353</Index>
+          <InterfaceName>Ethernet5/34/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>354</Index>
+          <InterfaceName>Ethernet5/34/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>355</Index>
+          <InterfaceName>Ethernet5/35/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>356</Index>
+          <InterfaceName>Ethernet5/35/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>357</Index>
+          <InterfaceName>Ethernet5/35/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>358</Index>
+          <InterfaceName>Ethernet5/36/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>359</Index>
+          <InterfaceName>Ethernet5/36/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>360</Index>
+          <InterfaceName>Ethernet5/36/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>361</Index>
+          <InterfaceName>Ethernet5/37/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>362</Index>
+          <InterfaceName>Ethernet5/37/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>363</Index>
+          <InterfaceName>Ethernet5/37/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>364</Index>
+          <InterfaceName>Ethernet5/38/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>365</Index>
+          <InterfaceName>Ethernet5/38/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>366</Index>
+          <InterfaceName>Ethernet5/38/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>367</Index>
+          <InterfaceName>Ethernet5/39/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>368</Index>
+          <InterfaceName>Ethernet5/39/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>369</Index>
+          <InterfaceName>Ethernet5/39/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>370</Index>
+          <InterfaceName>Ethernet5/40/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>371</Index>
+          <InterfaceName>Ethernet5/40/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>372</Index>
+          <InterfaceName>Ethernet5/40/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>373</Index>
+          <InterfaceName>Ethernet5/41/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>374</Index>
+          <InterfaceName>Ethernet5/41/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>375</Index>
+          <InterfaceName>Ethernet5/41/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>376</Index>
+          <InterfaceName>Ethernet5/42/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>377</Index>
+          <InterfaceName>Ethernet5/42/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>378</Index>
+          <InterfaceName>Ethernet5/42/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>379</Index>
+          <InterfaceName>Ethernet5/43/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>380</Index>
+          <InterfaceName>Ethernet5/43/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>381</Index>
+          <InterfaceName>Ethernet5/43/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>382</Index>
+          <InterfaceName>Ethernet5/44/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>383</Index>
+          <InterfaceName>Ethernet5/44/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>384</Index>
+          <InterfaceName>Ethernet5/44/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>385</Index>
+          <InterfaceName>Ethernet5/45/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>386</Index>
+          <InterfaceName>Ethernet5/45/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>387</Index>
+          <InterfaceName>Ethernet5/45/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>388</Index>
+          <InterfaceName>Ethernet5/46/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>389</Index>
+          <InterfaceName>Ethernet5/46/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>390</Index>
+          <InterfaceName>Ethernet5/46/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>391</Index>
+          <InterfaceName>Ethernet5/47/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>392</Index>
+          <InterfaceName>Ethernet5/47/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>393</Index>
+          <InterfaceName>Ethernet5/47/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>394</Index>
+          <InterfaceName>Ethernet5/48/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>395</Index>
+          <InterfaceName>Ethernet5/48/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>396</Index>
+          <InterfaceName>Ethernet5/48/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>397</Index>
+          <InterfaceName>Ethernet6/1/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>398</Index>
+          <InterfaceName>Ethernet6/1/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>399</Index>
+          <InterfaceName>Ethernet6/1/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>400</Index>
+          <InterfaceName>Ethernet6/2/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>401</Index>
+          <InterfaceName>Ethernet6/2/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>402</Index>
+          <InterfaceName>Ethernet6/2/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>403</Index>
+          <InterfaceName>Ethernet6/3/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>404</Index>
+          <InterfaceName>Ethernet6/3/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>405</Index>
+          <InterfaceName>Ethernet6/3/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>406</Index>
+          <InterfaceName>Ethernet6/4/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>407</Index>
+          <InterfaceName>Ethernet6/4/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>408</Index>
+          <InterfaceName>Ethernet6/4/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>409</Index>
+          <InterfaceName>Ethernet6/5/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>410</Index>
+          <InterfaceName>Ethernet6/5/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>411</Index>
+          <InterfaceName>Ethernet6/5/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>412</Index>
+          <InterfaceName>Ethernet6/6/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>413</Index>
+          <InterfaceName>Ethernet6/6/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>414</Index>
+          <InterfaceName>Ethernet6/6/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>415</Index>
+          <InterfaceName>Ethernet6/7/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>416</Index>
+          <InterfaceName>Ethernet6/7/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>417</Index>
+          <InterfaceName>Ethernet6/7/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>418</Index>
+          <InterfaceName>Ethernet6/8/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>419</Index>
+          <InterfaceName>Ethernet6/8/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>420</Index>
+          <InterfaceName>Ethernet6/8/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>421</Index>
+          <InterfaceName>Ethernet6/9/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>422</Index>
+          <InterfaceName>Ethernet6/9/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>423</Index>
+          <InterfaceName>Ethernet6/9/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>424</Index>
+          <InterfaceName>Ethernet6/10/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>425</Index>
+          <InterfaceName>Ethernet6/10/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>426</Index>
+          <InterfaceName>Ethernet6/10/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>427</Index>
+          <InterfaceName>Ethernet6/11/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>428</Index>
+          <InterfaceName>Ethernet6/11/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>429</Index>
+          <InterfaceName>Ethernet6/11/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>430</Index>
+          <InterfaceName>Ethernet6/12/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>431</Index>
+          <InterfaceName>Ethernet6/12/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>432</Index>
+          <InterfaceName>Ethernet6/12/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>433</Index>
+          <InterfaceName>Ethernet6/13/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>434</Index>
+          <InterfaceName>Ethernet6/13/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>435</Index>
+          <InterfaceName>Ethernet6/13/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>436</Index>
+          <InterfaceName>Ethernet6/14/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>437</Index>
+          <InterfaceName>Ethernet6/14/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>438</Index>
+          <InterfaceName>Ethernet6/14/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>439</Index>
+          <InterfaceName>Ethernet6/15/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>440</Index>
+          <InterfaceName>Ethernet6/15/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>441</Index>
+          <InterfaceName>Ethernet6/15/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>442</Index>
+          <InterfaceName>Ethernet6/16/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>443</Index>
+          <InterfaceName>Ethernet6/16/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>444</Index>
+          <InterfaceName>Ethernet6/16/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>445</Index>
+          <InterfaceName>Ethernet6/17/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>446</Index>
+          <InterfaceName>Ethernet6/17/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>447</Index>
+          <InterfaceName>Ethernet6/17/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>448</Index>
+          <InterfaceName>Ethernet6/18/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>449</Index>
+          <InterfaceName>Ethernet6/18/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>450</Index>
+          <InterfaceName>Ethernet6/18/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>451</Index>
+          <InterfaceName>Ethernet6/19/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>452</Index>
+          <InterfaceName>Ethernet6/19/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>453</Index>
+          <InterfaceName>Ethernet6/19/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>454</Index>
+          <InterfaceName>Ethernet6/20/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>455</Index>
+          <InterfaceName>Ethernet6/20/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>456</Index>
+          <InterfaceName>Ethernet6/20/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>457</Index>
+          <InterfaceName>Ethernet6/21/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>458</Index>
+          <InterfaceName>Ethernet6/21/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>459</Index>
+          <InterfaceName>Ethernet6/21/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>460</Index>
+          <InterfaceName>Ethernet6/22/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>461</Index>
+          <InterfaceName>Ethernet6/22/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>462</Index>
+          <InterfaceName>Ethernet6/22/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>463</Index>
+          <InterfaceName>Ethernet6/23/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>464</Index>
+          <InterfaceName>Ethernet6/23/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>465</Index>
+          <InterfaceName>Ethernet6/23/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>466</Index>
+          <InterfaceName>Ethernet6/24/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>467</Index>
+          <InterfaceName>Ethernet6/24/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>468</Index>
+          <InterfaceName>Ethernet6/24/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>469</Index>
+          <InterfaceName>Ethernet6/25/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>470</Index>
+          <InterfaceName>Ethernet6/25/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>471</Index>
+          <InterfaceName>Ethernet6/25/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>472</Index>
+          <InterfaceName>Ethernet6/26/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>473</Index>
+          <InterfaceName>Ethernet6/26/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>474</Index>
+          <InterfaceName>Ethernet6/26/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>475</Index>
+          <InterfaceName>Ethernet6/27/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>476</Index>
+          <InterfaceName>Ethernet6/27/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>477</Index>
+          <InterfaceName>Ethernet6/27/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>478</Index>
+          <InterfaceName>Ethernet6/28/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>479</Index>
+          <InterfaceName>Ethernet6/28/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>480</Index>
+          <InterfaceName>Ethernet6/28/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>481</Index>
+          <InterfaceName>Ethernet6/29/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>482</Index>
+          <InterfaceName>Ethernet6/29/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>483</Index>
+          <InterfaceName>Ethernet6/29/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>484</Index>
+          <InterfaceName>Ethernet6/30/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>485</Index>
+          <InterfaceName>Ethernet6/30/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>486</Index>
+          <InterfaceName>Ethernet6/30/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>487</Index>
+          <InterfaceName>Ethernet6/31/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>488</Index>
+          <InterfaceName>Ethernet6/31/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>489</Index>
+          <InterfaceName>Ethernet6/31/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>490</Index>
+          <InterfaceName>Ethernet6/32/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>491</Index>
+          <InterfaceName>Ethernet6/32/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>492</Index>
+          <InterfaceName>Ethernet6/32/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>493</Index>
+          <InterfaceName>Ethernet6/33/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>494</Index>
+          <InterfaceName>Ethernet6/33/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>495</Index>
+          <InterfaceName>Ethernet6/33/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>496</Index>
+          <InterfaceName>Ethernet6/34/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>497</Index>
+          <InterfaceName>Ethernet6/34/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>498</Index>
+          <InterfaceName>Ethernet6/34/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>499</Index>
+          <InterfaceName>Ethernet6/35/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>500</Index>
+          <InterfaceName>Ethernet6/35/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>501</Index>
+          <InterfaceName>Ethernet6/35/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>502</Index>
+          <InterfaceName>Ethernet6/36/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>503</Index>
+          <InterfaceName>Ethernet6/36/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>504</Index>
+          <InterfaceName>Ethernet6/36/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>505</Index>
+          <InterfaceName>Ethernet6/37/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>506</Index>
+          <InterfaceName>Ethernet6/37/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>507</Index>
+          <InterfaceName>Ethernet6/37/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>508</Index>
+          <InterfaceName>Ethernet6/38/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>509</Index>
+          <InterfaceName>Ethernet6/38/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>510</Index>
+          <InterfaceName>Ethernet6/38/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>511</Index>
+          <InterfaceName>Ethernet6/39/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>512</Index>
+          <InterfaceName>Ethernet6/39/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>513</Index>
+          <InterfaceName>Ethernet6/39/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>514</Index>
+          <InterfaceName>Ethernet6/40/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>515</Index>
+          <InterfaceName>Ethernet6/40/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>516</Index>
+          <InterfaceName>Ethernet6/40/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>517</Index>
+          <InterfaceName>Ethernet6/41/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>518</Index>
+          <InterfaceName>Ethernet6/41/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>519</Index>
+          <InterfaceName>Ethernet6/41/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>520</Index>
+          <InterfaceName>Ethernet6/42/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>521</Index>
+          <InterfaceName>Ethernet6/42/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>522</Index>
+          <InterfaceName>Ethernet6/42/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>523</Index>
+          <InterfaceName>Ethernet6/43/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>524</Index>
+          <InterfaceName>Ethernet6/43/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>525</Index>
+          <InterfaceName>Ethernet6/43/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>526</Index>
+          <InterfaceName>Ethernet6/44/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>527</Index>
+          <InterfaceName>Ethernet6/44/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>528</Index>
+          <InterfaceName>Ethernet6/44/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>529</Index>
+          <InterfaceName>Ethernet6/45/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>530</Index>
+          <InterfaceName>Ethernet6/45/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>531</Index>
+          <InterfaceName>Ethernet6/45/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>532</Index>
+          <InterfaceName>Ethernet6/46/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>533</Index>
+          <InterfaceName>Ethernet6/46/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>534</Index>
+          <InterfaceName>Ethernet6/46/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>535</Index>
+          <InterfaceName>Ethernet6/47/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>536</Index>
+          <InterfaceName>Ethernet6/47/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>537</Index>
+          <InterfaceName>Ethernet6/47/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>538</Index>
+          <InterfaceName>Ethernet6/48/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>539</Index>
+          <InterfaceName>Ethernet6/48/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>540</Index>
+          <InterfaceName>Ethernet6/48/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>541</Index>
+          <InterfaceName>Ethernet7/1/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>542</Index>
+          <InterfaceName>Ethernet7/1/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>543</Index>
+          <InterfaceName>Ethernet7/1/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>544</Index>
+          <InterfaceName>Ethernet7/2/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>545</Index>
+          <InterfaceName>Ethernet7/2/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>546</Index>
+          <InterfaceName>Ethernet7/2/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>547</Index>
+          <InterfaceName>Ethernet7/3/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>548</Index>
+          <InterfaceName>Ethernet7/3/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>549</Index>
+          <InterfaceName>Ethernet7/3/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>550</Index>
+          <InterfaceName>Ethernet7/4/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>551</Index>
+          <InterfaceName>Ethernet7/4/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>552</Index>
+          <InterfaceName>Ethernet7/4/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>553</Index>
+          <InterfaceName>Ethernet7/5/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>554</Index>
+          <InterfaceName>Ethernet7/5/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>555</Index>
+          <InterfaceName>Ethernet7/5/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>556</Index>
+          <InterfaceName>Ethernet7/6/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>557</Index>
+          <InterfaceName>Ethernet7/6/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>558</Index>
+          <InterfaceName>Ethernet7/6/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>559</Index>
+          <InterfaceName>Ethernet7/7/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>560</Index>
+          <InterfaceName>Ethernet7/7/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>561</Index>
+          <InterfaceName>Ethernet7/7/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>562</Index>
+          <InterfaceName>Ethernet7/8/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>563</Index>
+          <InterfaceName>Ethernet7/8/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>564</Index>
+          <InterfaceName>Ethernet7/8/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>565</Index>
+          <InterfaceName>Ethernet7/9/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>566</Index>
+          <InterfaceName>Ethernet7/9/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>567</Index>
+          <InterfaceName>Ethernet7/9/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>568</Index>
+          <InterfaceName>Ethernet7/10/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>569</Index>
+          <InterfaceName>Ethernet7/10/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>570</Index>
+          <InterfaceName>Ethernet7/10/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>571</Index>
+          <InterfaceName>Ethernet7/11/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>572</Index>
+          <InterfaceName>Ethernet7/11/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>573</Index>
+          <InterfaceName>Ethernet7/11/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>574</Index>
+          <InterfaceName>Ethernet7/12/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>575</Index>
+          <InterfaceName>Ethernet7/12/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>576</Index>
+          <InterfaceName>Ethernet7/12/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>577</Index>
+          <InterfaceName>Ethernet7/13/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>578</Index>
+          <InterfaceName>Ethernet7/13/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>579</Index>
+          <InterfaceName>Ethernet7/13/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>580</Index>
+          <InterfaceName>Ethernet7/14/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>581</Index>
+          <InterfaceName>Ethernet7/14/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>582</Index>
+          <InterfaceName>Ethernet7/14/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>583</Index>
+          <InterfaceName>Ethernet7/15/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>584</Index>
+          <InterfaceName>Ethernet7/15/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>585</Index>
+          <InterfaceName>Ethernet7/15/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>586</Index>
+          <InterfaceName>Ethernet7/16/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>587</Index>
+          <InterfaceName>Ethernet7/16/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>588</Index>
+          <InterfaceName>Ethernet7/16/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>589</Index>
+          <InterfaceName>Ethernet7/17/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>590</Index>
+          <InterfaceName>Ethernet7/17/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>591</Index>
+          <InterfaceName>Ethernet7/17/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>592</Index>
+          <InterfaceName>Ethernet7/18/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>593</Index>
+          <InterfaceName>Ethernet7/18/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>594</Index>
+          <InterfaceName>Ethernet7/18/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>595</Index>
+          <InterfaceName>Ethernet7/19/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>596</Index>
+          <InterfaceName>Ethernet7/19/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>597</Index>
+          <InterfaceName>Ethernet7/19/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>598</Index>
+          <InterfaceName>Ethernet7/20/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>599</Index>
+          <InterfaceName>Ethernet7/20/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>600</Index>
+          <InterfaceName>Ethernet7/20/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>601</Index>
+          <InterfaceName>Ethernet7/21/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>602</Index>
+          <InterfaceName>Ethernet7/21/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>603</Index>
+          <InterfaceName>Ethernet7/21/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>604</Index>
+          <InterfaceName>Ethernet7/22/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>605</Index>
+          <InterfaceName>Ethernet7/22/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>606</Index>
+          <InterfaceName>Ethernet7/22/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>607</Index>
+          <InterfaceName>Ethernet7/23/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>608</Index>
+          <InterfaceName>Ethernet7/23/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>609</Index>
+          <InterfaceName>Ethernet7/23/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>610</Index>
+          <InterfaceName>Ethernet7/24/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>611</Index>
+          <InterfaceName>Ethernet7/24/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>612</Index>
+          <InterfaceName>Ethernet7/24/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>613</Index>
+          <InterfaceName>Ethernet7/25/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>614</Index>
+          <InterfaceName>Ethernet7/25/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>615</Index>
+          <InterfaceName>Ethernet7/25/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>616</Index>
+          <InterfaceName>Ethernet7/26/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>617</Index>
+          <InterfaceName>Ethernet7/26/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>618</Index>
+          <InterfaceName>Ethernet7/26/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>619</Index>
+          <InterfaceName>Ethernet7/27/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>620</Index>
+          <InterfaceName>Ethernet7/27/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>621</Index>
+          <InterfaceName>Ethernet7/27/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>622</Index>
+          <InterfaceName>Ethernet7/28/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>623</Index>
+          <InterfaceName>Ethernet7/28/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>624</Index>
+          <InterfaceName>Ethernet7/28/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>625</Index>
+          <InterfaceName>Ethernet7/29/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>626</Index>
+          <InterfaceName>Ethernet7/29/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>627</Index>
+          <InterfaceName>Ethernet7/29/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>628</Index>
+          <InterfaceName>Ethernet7/30/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>629</Index>
+          <InterfaceName>Ethernet7/30/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>630</Index>
+          <InterfaceName>Ethernet7/30/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>631</Index>
+          <InterfaceName>Ethernet7/31/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>632</Index>
+          <InterfaceName>Ethernet7/31/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>633</Index>
+          <InterfaceName>Ethernet7/31/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>634</Index>
+          <InterfaceName>Ethernet7/32/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>635</Index>
+          <InterfaceName>Ethernet7/32/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>636</Index>
+          <InterfaceName>Ethernet7/32/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>637</Index>
+          <InterfaceName>Ethernet7/33/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>638</Index>
+          <InterfaceName>Ethernet7/33/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>639</Index>
+          <InterfaceName>Ethernet7/33/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>640</Index>
+          <InterfaceName>Ethernet7/34/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>641</Index>
+          <InterfaceName>Ethernet7/34/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>642</Index>
+          <InterfaceName>Ethernet7/34/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>643</Index>
+          <InterfaceName>Ethernet7/35/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>644</Index>
+          <InterfaceName>Ethernet7/35/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>645</Index>
+          <InterfaceName>Ethernet7/35/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>646</Index>
+          <InterfaceName>Ethernet7/36/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>647</Index>
+          <InterfaceName>Ethernet7/36/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>648</Index>
+          <InterfaceName>Ethernet7/36/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>649</Index>
+          <InterfaceName>Ethernet7/37/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>650</Index>
+          <InterfaceName>Ethernet7/37/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>651</Index>
+          <InterfaceName>Ethernet7/37/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>652</Index>
+          <InterfaceName>Ethernet7/38/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>653</Index>
+          <InterfaceName>Ethernet7/38/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>654</Index>
+          <InterfaceName>Ethernet7/38/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>655</Index>
+          <InterfaceName>Ethernet7/39/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>656</Index>
+          <InterfaceName>Ethernet7/39/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>657</Index>
+          <InterfaceName>Ethernet7/39/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>658</Index>
+          <InterfaceName>Ethernet7/40/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>659</Index>
+          <InterfaceName>Ethernet7/40/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>660</Index>
+          <InterfaceName>Ethernet7/40/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>661</Index>
+          <InterfaceName>Ethernet7/41/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>662</Index>
+          <InterfaceName>Ethernet7/41/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>663</Index>
+          <InterfaceName>Ethernet7/41/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>664</Index>
+          <InterfaceName>Ethernet7/42/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>665</Index>
+          <InterfaceName>Ethernet7/42/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>666</Index>
+          <InterfaceName>Ethernet7/42/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>667</Index>
+          <InterfaceName>Ethernet7/43/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>668</Index>
+          <InterfaceName>Ethernet7/43/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>669</Index>
+          <InterfaceName>Ethernet7/43/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>670</Index>
+          <InterfaceName>Ethernet7/44/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>671</Index>
+          <InterfaceName>Ethernet7/44/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>672</Index>
+          <InterfaceName>Ethernet7/44/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>673</Index>
+          <InterfaceName>Ethernet7/45/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>674</Index>
+          <InterfaceName>Ethernet7/45/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>675</Index>
+          <InterfaceName>Ethernet7/45/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>676</Index>
+          <InterfaceName>Ethernet7/46/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>677</Index>
+          <InterfaceName>Ethernet7/46/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>678</Index>
+          <InterfaceName>Ethernet7/46/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>679</Index>
+          <InterfaceName>Ethernet7/47/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>680</Index>
+          <InterfaceName>Ethernet7/47/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>681</Index>
+          <InterfaceName>Ethernet7/47/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>682</Index>
+          <InterfaceName>Ethernet7/48/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>683</Index>
+          <InterfaceName>Ethernet7/48/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>684</Index>
+          <InterfaceName>Ethernet7/48/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>685</Index>
+          <InterfaceName>Ethernet8/1/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>686</Index>
+          <InterfaceName>Ethernet8/1/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>687</Index>
+          <InterfaceName>Ethernet8/1/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>688</Index>
+          <InterfaceName>Ethernet8/2/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>689</Index>
+          <InterfaceName>Ethernet8/2/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>690</Index>
+          <InterfaceName>Ethernet8/2/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>691</Index>
+          <InterfaceName>Ethernet8/3/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>692</Index>
+          <InterfaceName>Ethernet8/3/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>693</Index>
+          <InterfaceName>Ethernet8/3/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>694</Index>
+          <InterfaceName>Ethernet8/4/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>695</Index>
+          <InterfaceName>Ethernet8/4/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>696</Index>
+          <InterfaceName>Ethernet8/4/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>697</Index>
+          <InterfaceName>Ethernet8/5/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>698</Index>
+          <InterfaceName>Ethernet8/5/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>699</Index>
+          <InterfaceName>Ethernet8/5/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>700</Index>
+          <InterfaceName>Ethernet8/6/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>701</Index>
+          <InterfaceName>Ethernet8/6/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>702</Index>
+          <InterfaceName>Ethernet8/6/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>703</Index>
+          <InterfaceName>Ethernet8/7/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>704</Index>
+          <InterfaceName>Ethernet8/7/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>705</Index>
+          <InterfaceName>Ethernet8/7/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>706</Index>
+          <InterfaceName>Ethernet8/8/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>707</Index>
+          <InterfaceName>Ethernet8/8/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>708</Index>
+          <InterfaceName>Ethernet8/8/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>709</Index>
+          <InterfaceName>Ethernet8/9/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>710</Index>
+          <InterfaceName>Ethernet8/9/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>711</Index>
+          <InterfaceName>Ethernet8/9/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>712</Index>
+          <InterfaceName>Ethernet8/10/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>713</Index>
+          <InterfaceName>Ethernet8/10/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>714</Index>
+          <InterfaceName>Ethernet8/10/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>715</Index>
+          <InterfaceName>Ethernet8/11/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>716</Index>
+          <InterfaceName>Ethernet8/11/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>717</Index>
+          <InterfaceName>Ethernet8/11/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>718</Index>
+          <InterfaceName>Ethernet8/12/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>719</Index>
+          <InterfaceName>Ethernet8/12/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>720</Index>
+          <InterfaceName>Ethernet8/12/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>721</Index>
+          <InterfaceName>Ethernet8/13/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>722</Index>
+          <InterfaceName>Ethernet8/13/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>723</Index>
+          <InterfaceName>Ethernet8/13/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>724</Index>
+          <InterfaceName>Ethernet8/14/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>725</Index>
+          <InterfaceName>Ethernet8/14/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>726</Index>
+          <InterfaceName>Ethernet8/14/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>727</Index>
+          <InterfaceName>Ethernet8/15/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>728</Index>
+          <InterfaceName>Ethernet8/15/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>729</Index>
+          <InterfaceName>Ethernet8/15/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>730</Index>
+          <InterfaceName>Ethernet8/16/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>731</Index>
+          <InterfaceName>Ethernet8/16/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>732</Index>
+          <InterfaceName>Ethernet8/16/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>733</Index>
+          <InterfaceName>Ethernet8/17/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>734</Index>
+          <InterfaceName>Ethernet8/17/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>735</Index>
+          <InterfaceName>Ethernet8/17/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>736</Index>
+          <InterfaceName>Ethernet8/18/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>737</Index>
+          <InterfaceName>Ethernet8/18/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>738</Index>
+          <InterfaceName>Ethernet8/18/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>739</Index>
+          <InterfaceName>Ethernet8/19/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>740</Index>
+          <InterfaceName>Ethernet8/19/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>741</Index>
+          <InterfaceName>Ethernet8/19/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>742</Index>
+          <InterfaceName>Ethernet8/20/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>743</Index>
+          <InterfaceName>Ethernet8/20/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>744</Index>
+          <InterfaceName>Ethernet8/20/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>745</Index>
+          <InterfaceName>Ethernet8/21/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>746</Index>
+          <InterfaceName>Ethernet8/21/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>747</Index>
+          <InterfaceName>Ethernet8/21/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>748</Index>
+          <InterfaceName>Ethernet8/22/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>749</Index>
+          <InterfaceName>Ethernet8/22/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>750</Index>
+          <InterfaceName>Ethernet8/22/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>751</Index>
+          <InterfaceName>Ethernet8/23/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>752</Index>
+          <InterfaceName>Ethernet8/23/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>753</Index>
+          <InterfaceName>Ethernet8/23/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>754</Index>
+          <InterfaceName>Ethernet8/24/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>755</Index>
+          <InterfaceName>Ethernet8/24/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>756</Index>
+          <InterfaceName>Ethernet8/24/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>757</Index>
+          <InterfaceName>Ethernet8/25/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>758</Index>
+          <InterfaceName>Ethernet8/25/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>759</Index>
+          <InterfaceName>Ethernet8/25/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>760</Index>
+          <InterfaceName>Ethernet8/26/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>761</Index>
+          <InterfaceName>Ethernet8/26/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>762</Index>
+          <InterfaceName>Ethernet8/26/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>763</Index>
+          <InterfaceName>Ethernet8/27/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>764</Index>
+          <InterfaceName>Ethernet8/27/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>765</Index>
+          <InterfaceName>Ethernet8/27/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>766</Index>
+          <InterfaceName>Ethernet8/28/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>767</Index>
+          <InterfaceName>Ethernet8/28/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>768</Index>
+          <InterfaceName>Ethernet8/28/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>769</Index>
+          <InterfaceName>Ethernet8/29/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>770</Index>
+          <InterfaceName>Ethernet8/29/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>771</Index>
+          <InterfaceName>Ethernet8/29/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>772</Index>
+          <InterfaceName>Ethernet8/30/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>773</Index>
+          <InterfaceName>Ethernet8/30/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>774</Index>
+          <InterfaceName>Ethernet8/30/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>775</Index>
+          <InterfaceName>Ethernet8/31/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>776</Index>
+          <InterfaceName>Ethernet8/31/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>777</Index>
+          <InterfaceName>Ethernet8/31/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>778</Index>
+          <InterfaceName>Ethernet8/32/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>779</Index>
+          <InterfaceName>Ethernet8/32/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>780</Index>
+          <InterfaceName>Ethernet8/32/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>781</Index>
+          <InterfaceName>Ethernet8/33/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>782</Index>
+          <InterfaceName>Ethernet8/33/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>783</Index>
+          <InterfaceName>Ethernet8/33/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>784</Index>
+          <InterfaceName>Ethernet8/34/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>785</Index>
+          <InterfaceName>Ethernet8/34/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>786</Index>
+          <InterfaceName>Ethernet8/34/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>787</Index>
+          <InterfaceName>Ethernet8/35/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>788</Index>
+          <InterfaceName>Ethernet8/35/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>789</Index>
+          <InterfaceName>Ethernet8/35/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>790</Index>
+          <InterfaceName>Ethernet8/36/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>791</Index>
+          <InterfaceName>Ethernet8/36/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>792</Index>
+          <InterfaceName>Ethernet8/36/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>793</Index>
+          <InterfaceName>Ethernet8/37/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>794</Index>
+          <InterfaceName>Ethernet8/37/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>795</Index>
+          <InterfaceName>Ethernet8/37/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>796</Index>
+          <InterfaceName>Ethernet8/38/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>797</Index>
+          <InterfaceName>Ethernet8/38/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>798</Index>
+          <InterfaceName>Ethernet8/38/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>799</Index>
+          <InterfaceName>Ethernet8/39/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>800</Index>
+          <InterfaceName>Ethernet8/39/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>801</Index>
+          <InterfaceName>Ethernet8/39/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>802</Index>
+          <InterfaceName>Ethernet8/40/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>803</Index>
+          <InterfaceName>Ethernet8/40/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>804</Index>
+          <InterfaceName>Ethernet8/40/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>805</Index>
+          <InterfaceName>Ethernet8/41/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>806</Index>
+          <InterfaceName>Ethernet8/41/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>807</Index>
+          <InterfaceName>Ethernet8/41/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>808</Index>
+          <InterfaceName>Ethernet8/42/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>809</Index>
+          <InterfaceName>Ethernet8/42/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>810</Index>
+          <InterfaceName>Ethernet8/42/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>811</Index>
+          <InterfaceName>Ethernet8/43/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>812</Index>
+          <InterfaceName>Ethernet8/43/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>813</Index>
+          <InterfaceName>Ethernet8/43/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>814</Index>
+          <InterfaceName>Ethernet8/44/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>815</Index>
+          <InterfaceName>Ethernet8/44/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>816</Index>
+          <InterfaceName>Ethernet8/44/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>817</Index>
+          <InterfaceName>Ethernet8/45/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>818</Index>
+          <InterfaceName>Ethernet8/45/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>819</Index>
+          <InterfaceName>Ethernet8/45/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>820</Index>
+          <InterfaceName>Ethernet8/46/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>821</Index>
+          <InterfaceName>Ethernet8/46/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>822</Index>
+          <InterfaceName>Ethernet8/46/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>823</Index>
+          <InterfaceName>Ethernet8/47/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>824</Index>
+          <InterfaceName>Ethernet8/47/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>825</Index>
+          <InterfaceName>Ethernet8/47/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>826</Index>
+          <InterfaceName>Ethernet8/48/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>827</Index>
+          <InterfaceName>Ethernet8/48/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>828</Index>
+          <InterfaceName>Ethernet8/48/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>829</Index>
+          <InterfaceName>Ethernet9/1/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>830</Index>
+          <InterfaceName>Ethernet9/1/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>831</Index>
+          <InterfaceName>Ethernet9/1/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>832</Index>
+          <InterfaceName>Ethernet9/2/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>833</Index>
+          <InterfaceName>Ethernet9/2/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>834</Index>
+          <InterfaceName>Ethernet9/2/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>835</Index>
+          <InterfaceName>Ethernet9/3/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>836</Index>
+          <InterfaceName>Ethernet9/3/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>837</Index>
+          <InterfaceName>Ethernet9/3/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>838</Index>
+          <InterfaceName>Ethernet9/4/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>839</Index>
+          <InterfaceName>Ethernet9/4/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>840</Index>
+          <InterfaceName>Ethernet9/4/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>841</Index>
+          <InterfaceName>Ethernet9/5/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>842</Index>
+          <InterfaceName>Ethernet9/5/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>843</Index>
+          <InterfaceName>Ethernet9/5/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>844</Index>
+          <InterfaceName>Ethernet9/6/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>845</Index>
+          <InterfaceName>Ethernet9/6/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>846</Index>
+          <InterfaceName>Ethernet9/6/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>847</Index>
+          <InterfaceName>Ethernet9/7/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>848</Index>
+          <InterfaceName>Ethernet9/7/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>849</Index>
+          <InterfaceName>Ethernet9/7/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>850</Index>
+          <InterfaceName>Ethernet9/8/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>851</Index>
+          <InterfaceName>Ethernet9/8/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>852</Index>
+          <InterfaceName>Ethernet9/8/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>853</Index>
+          <InterfaceName>Ethernet9/9/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>854</Index>
+          <InterfaceName>Ethernet9/9/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>855</Index>
+          <InterfaceName>Ethernet9/9/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>856</Index>
+          <InterfaceName>Ethernet9/10/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>857</Index>
+          <InterfaceName>Ethernet9/10/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>858</Index>
+          <InterfaceName>Ethernet9/10/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>859</Index>
+          <InterfaceName>Ethernet9/11/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>860</Index>
+          <InterfaceName>Ethernet9/11/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>861</Index>
+          <InterfaceName>Ethernet9/11/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>862</Index>
+          <InterfaceName>Ethernet9/12/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>863</Index>
+          <InterfaceName>Ethernet9/12/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>864</Index>
+          <InterfaceName>Ethernet9/12/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>865</Index>
+          <InterfaceName>Ethernet9/13/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>866</Index>
+          <InterfaceName>Ethernet9/13/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>867</Index>
+          <InterfaceName>Ethernet9/13/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>868</Index>
+          <InterfaceName>Ethernet9/14/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>869</Index>
+          <InterfaceName>Ethernet9/14/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>870</Index>
+          <InterfaceName>Ethernet9/14/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>871</Index>
+          <InterfaceName>Ethernet9/15/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>872</Index>
+          <InterfaceName>Ethernet9/15/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>873</Index>
+          <InterfaceName>Ethernet9/15/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>874</Index>
+          <InterfaceName>Ethernet9/16/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>875</Index>
+          <InterfaceName>Ethernet9/16/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>876</Index>
+          <InterfaceName>Ethernet9/16/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>877</Index>
+          <InterfaceName>Ethernet9/17/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>878</Index>
+          <InterfaceName>Ethernet9/17/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>879</Index>
+          <InterfaceName>Ethernet9/17/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>880</Index>
+          <InterfaceName>Ethernet9/18/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>881</Index>
+          <InterfaceName>Ethernet9/18/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>882</Index>
+          <InterfaceName>Ethernet9/18/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>883</Index>
+          <InterfaceName>Ethernet9/19/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>884</Index>
+          <InterfaceName>Ethernet9/19/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>885</Index>
+          <InterfaceName>Ethernet9/19/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>886</Index>
+          <InterfaceName>Ethernet9/20/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>887</Index>
+          <InterfaceName>Ethernet9/20/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>888</Index>
+          <InterfaceName>Ethernet9/20/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>889</Index>
+          <InterfaceName>Ethernet9/21/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>890</Index>
+          <InterfaceName>Ethernet9/21/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>891</Index>
+          <InterfaceName>Ethernet9/21/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>892</Index>
+          <InterfaceName>Ethernet9/22/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>893</Index>
+          <InterfaceName>Ethernet9/22/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>894</Index>
+          <InterfaceName>Ethernet9/22/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>895</Index>
+          <InterfaceName>Ethernet9/23/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>896</Index>
+          <InterfaceName>Ethernet9/23/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>897</Index>
+          <InterfaceName>Ethernet9/23/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>898</Index>
+          <InterfaceName>Ethernet9/24/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>899</Index>
+          <InterfaceName>Ethernet9/24/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>900</Index>
+          <InterfaceName>Ethernet9/24/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>901</Index>
+          <InterfaceName>Ethernet9/25/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>902</Index>
+          <InterfaceName>Ethernet9/25/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>903</Index>
+          <InterfaceName>Ethernet9/25/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>904</Index>
+          <InterfaceName>Ethernet9/26/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>905</Index>
+          <InterfaceName>Ethernet9/26/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>906</Index>
+          <InterfaceName>Ethernet9/26/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>907</Index>
+          <InterfaceName>Ethernet9/27/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>908</Index>
+          <InterfaceName>Ethernet9/27/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>909</Index>
+          <InterfaceName>Ethernet9/27/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>910</Index>
+          <InterfaceName>Ethernet9/28/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>911</Index>
+          <InterfaceName>Ethernet9/28/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>912</Index>
+          <InterfaceName>Ethernet9/28/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>913</Index>
+          <InterfaceName>Ethernet9/29/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>914</Index>
+          <InterfaceName>Ethernet9/29/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>915</Index>
+          <InterfaceName>Ethernet9/29/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>916</Index>
+          <InterfaceName>Ethernet9/30/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>917</Index>
+          <InterfaceName>Ethernet9/30/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>918</Index>
+          <InterfaceName>Ethernet9/30/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>919</Index>
+          <InterfaceName>Ethernet9/31/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>920</Index>
+          <InterfaceName>Ethernet9/31/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>921</Index>
+          <InterfaceName>Ethernet9/31/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>922</Index>
+          <InterfaceName>Ethernet9/32/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>923</Index>
+          <InterfaceName>Ethernet9/32/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>924</Index>
+          <InterfaceName>Ethernet9/32/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>925</Index>
+          <InterfaceName>Ethernet9/33/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>926</Index>
+          <InterfaceName>Ethernet9/33/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>927</Index>
+          <InterfaceName>Ethernet9/33/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>928</Index>
+          <InterfaceName>Ethernet9/34/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>929</Index>
+          <InterfaceName>Ethernet9/34/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>930</Index>
+          <InterfaceName>Ethernet9/34/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>931</Index>
+          <InterfaceName>Ethernet9/35/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>932</Index>
+          <InterfaceName>Ethernet9/35/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>933</Index>
+          <InterfaceName>Ethernet9/35/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>934</Index>
+          <InterfaceName>Ethernet9/36/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>935</Index>
+          <InterfaceName>Ethernet9/36/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
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+          <InterfaceName>Ethernet9/36/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>937</Index>
+          <InterfaceName>Ethernet9/37/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>938</Index>
+          <InterfaceName>Ethernet9/37/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>939</Index>
+          <InterfaceName>Ethernet9/37/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>940</Index>
+          <InterfaceName>Ethernet9/38/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>941</Index>
+          <InterfaceName>Ethernet9/38/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>942</Index>
+          <InterfaceName>Ethernet9/38/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
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+          <InterfaceName>Ethernet9/39/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>944</Index>
+          <InterfaceName>Ethernet9/39/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>945</Index>
+          <InterfaceName>Ethernet9/39/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>946</Index>
+          <InterfaceName>Ethernet9/40/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>947</Index>
+          <InterfaceName>Ethernet9/40/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>948</Index>
+          <InterfaceName>Ethernet9/40/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
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+          <InterfaceName>Ethernet9/41/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>950</Index>
+          <InterfaceName>Ethernet9/41/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>951</Index>
+          <InterfaceName>Ethernet9/41/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>952</Index>
+          <InterfaceName>Ethernet9/42/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>953</Index>
+          <InterfaceName>Ethernet9/42/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>954</Index>
+          <InterfaceName>Ethernet9/42/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>955</Index>
+          <InterfaceName>Ethernet9/43/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>956</Index>
+          <InterfaceName>Ethernet9/43/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>957</Index>
+          <InterfaceName>Ethernet9/43/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>958</Index>
+          <InterfaceName>Ethernet9/44/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>959</Index>
+          <InterfaceName>Ethernet9/44/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>960</Index>
+          <InterfaceName>Ethernet9/44/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>961</Index>
+          <InterfaceName>Ethernet9/45/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>962</Index>
+          <InterfaceName>Ethernet9/45/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>963</Index>
+          <InterfaceName>Ethernet9/45/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>964</Index>
+          <InterfaceName>Ethernet9/46/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>965</Index>
+          <InterfaceName>Ethernet9/46/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>966</Index>
+          <InterfaceName>Ethernet9/46/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>967</Index>
+          <InterfaceName>Ethernet9/47/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>968</Index>
+          <InterfaceName>Ethernet9/47/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>969</Index>
+          <InterfaceName>Ethernet9/47/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>970</Index>
+          <InterfaceName>Ethernet9/48/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>971</Index>
+          <InterfaceName>Ethernet9/48/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>972</Index>
+          <InterfaceName>Ethernet9/48/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>973</Index>
+          <InterfaceName>Ethernet10/1/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>974</Index>
+          <InterfaceName>Ethernet10/1/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>975</Index>
+          <InterfaceName>Ethernet10/1/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>976</Index>
+          <InterfaceName>Ethernet10/2/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>977</Index>
+          <InterfaceName>Ethernet10/2/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>978</Index>
+          <InterfaceName>Ethernet10/2/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>979</Index>
+          <InterfaceName>Ethernet10/3/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>980</Index>
+          <InterfaceName>Ethernet10/3/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>981</Index>
+          <InterfaceName>Ethernet10/3/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>982</Index>
+          <InterfaceName>Ethernet10/4/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>983</Index>
+          <InterfaceName>Ethernet10/4/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>984</Index>
+          <InterfaceName>Ethernet10/4/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>985</Index>
+          <InterfaceName>Ethernet10/5/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>986</Index>
+          <InterfaceName>Ethernet10/5/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>987</Index>
+          <InterfaceName>Ethernet10/5/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>988</Index>
+          <InterfaceName>Ethernet10/6/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>989</Index>
+          <InterfaceName>Ethernet10/6/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>990</Index>
+          <InterfaceName>Ethernet10/6/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>991</Index>
+          <InterfaceName>Ethernet10/7/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>992</Index>
+          <InterfaceName>Ethernet10/7/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>993</Index>
+          <InterfaceName>Ethernet10/7/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>994</Index>
+          <InterfaceName>Ethernet10/8/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>995</Index>
+          <InterfaceName>Ethernet10/8/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>996</Index>
+          <InterfaceName>Ethernet10/8/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>997</Index>
+          <InterfaceName>Ethernet10/9/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>998</Index>
+          <InterfaceName>Ethernet10/9/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>999</Index>
+          <InterfaceName>Ethernet10/9/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1000</Index>
+          <InterfaceName>Ethernet10/10/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1001</Index>
+          <InterfaceName>Ethernet10/10/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1002</Index>
+          <InterfaceName>Ethernet10/10/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1003</Index>
+          <InterfaceName>Ethernet10/11/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1004</Index>
+          <InterfaceName>Ethernet10/11/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1005</Index>
+          <InterfaceName>Ethernet10/11/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1006</Index>
+          <InterfaceName>Ethernet10/12/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1007</Index>
+          <InterfaceName>Ethernet10/12/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1008</Index>
+          <InterfaceName>Ethernet10/12/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1009</Index>
+          <InterfaceName>Ethernet10/13/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1010</Index>
+          <InterfaceName>Ethernet10/13/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1011</Index>
+          <InterfaceName>Ethernet10/13/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1012</Index>
+          <InterfaceName>Ethernet10/14/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1013</Index>
+          <InterfaceName>Ethernet10/14/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1014</Index>
+          <InterfaceName>Ethernet10/14/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1015</Index>
+          <InterfaceName>Ethernet10/15/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1016</Index>
+          <InterfaceName>Ethernet10/15/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1017</Index>
+          <InterfaceName>Ethernet10/15/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1018</Index>
+          <InterfaceName>Ethernet10/16/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1019</Index>
+          <InterfaceName>Ethernet10/16/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1020</Index>
+          <InterfaceName>Ethernet10/16/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1021</Index>
+          <InterfaceName>Ethernet10/17/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1022</Index>
+          <InterfaceName>Ethernet10/17/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1023</Index>
+          <InterfaceName>Ethernet10/17/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1024</Index>
+          <InterfaceName>Ethernet10/18/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1025</Index>
+          <InterfaceName>Ethernet10/18/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1026</Index>
+          <InterfaceName>Ethernet10/18/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1027</Index>
+          <InterfaceName>Ethernet10/19/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1028</Index>
+          <InterfaceName>Ethernet10/19/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1029</Index>
+          <InterfaceName>Ethernet10/19/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1030</Index>
+          <InterfaceName>Ethernet10/20/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1031</Index>
+          <InterfaceName>Ethernet10/20/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1032</Index>
+          <InterfaceName>Ethernet10/20/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1033</Index>
+          <InterfaceName>Ethernet10/21/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1034</Index>
+          <InterfaceName>Ethernet10/21/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1035</Index>
+          <InterfaceName>Ethernet10/21/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1036</Index>
+          <InterfaceName>Ethernet10/22/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1037</Index>
+          <InterfaceName>Ethernet10/22/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1038</Index>
+          <InterfaceName>Ethernet10/22/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1039</Index>
+          <InterfaceName>Ethernet10/23/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1040</Index>
+          <InterfaceName>Ethernet10/23/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1041</Index>
+          <InterfaceName>Ethernet10/23/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1042</Index>
+          <InterfaceName>Ethernet10/24/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1043</Index>
+          <InterfaceName>Ethernet10/24/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1044</Index>
+          <InterfaceName>Ethernet10/24/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1045</Index>
+          <InterfaceName>Ethernet10/25/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1046</Index>
+          <InterfaceName>Ethernet10/25/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1047</Index>
+          <InterfaceName>Ethernet10/25/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1048</Index>
+          <InterfaceName>Ethernet10/26/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1049</Index>
+          <InterfaceName>Ethernet10/26/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1050</Index>
+          <InterfaceName>Ethernet10/26/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1051</Index>
+          <InterfaceName>Ethernet10/27/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1052</Index>
+          <InterfaceName>Ethernet10/27/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1053</Index>
+          <InterfaceName>Ethernet10/27/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1054</Index>
+          <InterfaceName>Ethernet10/28/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1055</Index>
+          <InterfaceName>Ethernet10/28/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
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+        </a:OpticalInterface>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1056</Index>
+          <InterfaceName>Ethernet10/28/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1057</Index>
+          <InterfaceName>Ethernet10/29/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1058</Index>
+          <InterfaceName>Ethernet10/29/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1059</Index>
+          <InterfaceName>Ethernet10/29/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
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+          <InterfaceName>Ethernet10/30/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
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+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1061</Index>
+          <InterfaceName>Ethernet10/30/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
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+          <InterfaceName>Ethernet10/30/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
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+          <InterfaceName>Ethernet10/31/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
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+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
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+          <InterfaceName>Ethernet10/31/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
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+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
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+          <InterfaceName>Ethernet10/31/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
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+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
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+          <InterfaceName>Ethernet10/32/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
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+          <SonicName i:nil="true"/>
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+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
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+          <EnableFlowControl>true</EnableFlowControl>
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+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
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+          <EnableFlowControl>true</EnableFlowControl>
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+          <InterfaceName>Ethernet10/32/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
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+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
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+          <EnableFlowControl>true</EnableFlowControl>
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+          <InterfaceName>Ethernet10/33/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
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+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
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+          <EnableFlowControl>true</EnableFlowControl>
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+          <InterfaceName>Ethernet10/33/1</InterfaceName>
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+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
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+          <EnableFlowControl>true</EnableFlowControl>
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+          <InterfaceName>Ethernet10/33/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
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+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
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+          <EnableFlowControl>true</EnableFlowControl>
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+          <InterfaceName>Ethernet10/34/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
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+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
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+          <EnableFlowControl>true</EnableFlowControl>
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+          <InterfaceName>Ethernet10/34/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
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+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
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+          <EnableFlowControl>true</EnableFlowControl>
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+          <InterfaceName>Ethernet10/34/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
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+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
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+          <EnableFlowControl>true</EnableFlowControl>
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+          <InterfaceName>Ethernet10/35/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
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+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
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+          <EnableFlowControl>true</EnableFlowControl>
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+          <InterfaceName>Ethernet10/35/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
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+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
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+          <EnableFlowControl>true</EnableFlowControl>
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+          <InterfaceName>Ethernet10/35/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
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+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
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+          <a:SlotIndex>0</a:SlotIndex>
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+          <EnableFlowControl>true</EnableFlowControl>
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+          <InterfaceName>Ethernet10/36/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
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+          <Speed>0</Speed>
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+          <EnableFlowControl>true</EnableFlowControl>
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+          <InterfaceName>Ethernet10/36/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
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+          <a:Direction>ingress</a:Direction>
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+          <a:DwdmChannel>0</a:DwdmChannel>
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+          <EnableFlowControl>true</EnableFlowControl>
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+          <InterfaceName>Ethernet10/36/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
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+          <SonicName i:nil="true"/>
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+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
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+          <EnableFlowControl>true</EnableFlowControl>
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+          <InterfaceName>Ethernet10/37/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
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+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
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+          <a:OpticalAddDropType i:nil="true"/>
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+          <EnableFlowControl>true</EnableFlowControl>
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+          <InterfaceName>Ethernet10/37/1</InterfaceName>
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+          <a:Dwdm>none</a:Dwdm>
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+          <EnableFlowControl>true</EnableFlowControl>
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+          <InterfaceName>Ethernet10/37/1</InterfaceName>
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+          <InterfaceName>Ethernet10/38/1</InterfaceName>
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+          <EnableFlowControl>true</EnableFlowControl>
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+          <InterfaceName>Ethernet10/38/1</InterfaceName>
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+          <InterfaceName>Ethernet10/39/1</InterfaceName>
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+          <InterfaceName>Ethernet10/39/1</InterfaceName>
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+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1089</Index>
+          <InterfaceName>Ethernet10/39/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1090</Index>
+          <InterfaceName>Ethernet10/40/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1091</Index>
+          <InterfaceName>Ethernet10/40/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1092</Index>
+          <InterfaceName>Ethernet10/40/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1093</Index>
+          <InterfaceName>Ethernet10/41/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1094</Index>
+          <InterfaceName>Ethernet10/41/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1095</Index>
+          <InterfaceName>Ethernet10/41/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1096</Index>
+          <InterfaceName>Ethernet10/42/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1097</Index>
+          <InterfaceName>Ethernet10/42/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1098</Index>
+          <InterfaceName>Ethernet10/42/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1099</Index>
+          <InterfaceName>Ethernet10/43/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1100</Index>
+          <InterfaceName>Ethernet10/43/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1101</Index>
+          <InterfaceName>Ethernet10/43/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1102</Index>
+          <InterfaceName>Ethernet10/44/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1103</Index>
+          <InterfaceName>Ethernet10/44/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1104</Index>
+          <InterfaceName>Ethernet10/44/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1105</Index>
+          <InterfaceName>Ethernet10/45/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1106</Index>
+          <InterfaceName>Ethernet10/45/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1107</Index>
+          <InterfaceName>Ethernet10/45/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1108</Index>
+          <InterfaceName>Ethernet10/46/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1109</Index>
+          <InterfaceName>Ethernet10/46/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1110</Index>
+          <InterfaceName>Ethernet10/46/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1111</Index>
+          <InterfaceName>Ethernet10/47/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1112</Index>
+          <InterfaceName>Ethernet10/47/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1113</Index>
+          <InterfaceName>Ethernet10/47/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1114</Index>
+          <InterfaceName>Ethernet10/48/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>egress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1115</Index>
+          <InterfaceName>Ethernet10/48/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>ingress</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+        <a:OpticalInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1116</Index>
+          <InterfaceName>Ethernet10/48/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Direction>Bidirectional</a:Direction>
+          <a:Dwdm>none</a:Dwdm>
+          <a:DwdmChannel>0</a:DwdmChannel>
+          <a:OpticalAddDropType i:nil="true"/>
+          <a:SlotIndex>0</a:SlotIndex>
+        </a:OpticalInterface>
+      </OpticalInterfaces>
+      <PowerInterfaces xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution">
+        <a:PowerInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>power1/0</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Phase i:nil="true"/>
+          <a:PortType>C19</a:PortType>
+          <a:PortTypeStr>C19</a:PortTypeStr>
+          <a:Redundant>false</a:Redundant>
+        </a:PowerInterface>
+        <a:PowerInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>2</Index>
+          <InterfaceName>power1/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Phase i:nil="true"/>
+          <a:PortType>C19</a:PortType>
+          <a:PortTypeStr>C19</a:PortTypeStr>
+          <a:Redundant>true</a:Redundant>
+        </a:PowerInterface>
+        <a:PowerInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>3</Index>
+          <InterfaceName>power2/0</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Phase i:nil="true"/>
+          <a:PortType>C19</a:PortType>
+          <a:PortTypeStr>C19</a:PortTypeStr>
+          <a:Redundant>false</a:Redundant>
+        </a:PowerInterface>
+        <a:PowerInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>4</Index>
+          <InterfaceName>power2/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Phase i:nil="true"/>
+          <a:PortType>C19</a:PortType>
+          <a:PortTypeStr>C19</a:PortTypeStr>
+          <a:Redundant>true</a:Redundant>
+        </a:PowerInterface>
+        <a:PowerInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>5</Index>
+          <InterfaceName>power3/0</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Phase i:nil="true"/>
+          <a:PortType>C19</a:PortType>
+          <a:PortTypeStr>C19</a:PortTypeStr>
+          <a:Redundant>false</a:Redundant>
+        </a:PowerInterface>
+        <a:PowerInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>6</Index>
+          <InterfaceName>power3/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Phase i:nil="true"/>
+          <a:PortType>C19</a:PortType>
+          <a:PortTypeStr>C19</a:PortTypeStr>
+          <a:Redundant>true</a:Redundant>
+        </a:PowerInterface>
+        <a:PowerInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>7</Index>
+          <InterfaceName>power4/0</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Phase i:nil="true"/>
+          <a:PortType>C19</a:PortType>
+          <a:PortTypeStr>C19</a:PortTypeStr>
+          <a:Redundant>false</a:Redundant>
+        </a:PowerInterface>
+        <a:PowerInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>8</Index>
+          <InterfaceName>power4/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Phase i:nil="true"/>
+          <a:PortType>C19</a:PortType>
+          <a:PortTypeStr>C19</a:PortTypeStr>
+          <a:Redundant>true</a:Redundant>
+        </a:PowerInterface>
+        <a:PowerInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>9</Index>
+          <InterfaceName>power7/0</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Phase i:nil="true"/>
+          <a:PortType>C19</a:PortType>
+          <a:PortTypeStr>C19</a:PortTypeStr>
+          <a:Redundant>false</a:Redundant>
+        </a:PowerInterface>
+        <a:PowerInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>10</Index>
+          <InterfaceName>power7/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Phase i:nil="true"/>
+          <a:PortType>C19</a:PortType>
+          <a:PortTypeStr>C19</a:PortTypeStr>
+          <a:Redundant>true</a:Redundant>
+        </a:PowerInterface>
+        <a:PowerInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>11</Index>
+          <InterfaceName>power8/0</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Phase i:nil="true"/>
+          <a:PortType>C19</a:PortType>
+          <a:PortTypeStr>C19</a:PortTypeStr>
+          <a:Redundant>false</a:Redundant>
+        </a:PowerInterface>
+        <a:PowerInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>12</Index>
+          <InterfaceName>power8/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Phase i:nil="true"/>
+          <a:PortType>C19</a:PortType>
+          <a:PortTypeStr>C19</a:PortTypeStr>
+          <a:Redundant>true</a:Redundant>
+        </a:PowerInterface>
+        <a:PowerInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>13</Index>
+          <InterfaceName>power9/0</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Phase i:nil="true"/>
+          <a:PortType>C19</a:PortType>
+          <a:PortTypeStr>C19</a:PortTypeStr>
+          <a:Redundant>false</a:Redundant>
+        </a:PowerInterface>
+        <a:PowerInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>14</Index>
+          <InterfaceName>power9/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Phase i:nil="true"/>
+          <a:PortType>C19</a:PortType>
+          <a:PortTypeStr>C19</a:PortTypeStr>
+          <a:Redundant>true</a:Redundant>
+        </a:PowerInterface>
+        <a:PowerInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>15</Index>
+          <InterfaceName>power10/0</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Phase i:nil="true"/>
+          <a:PortType>C19</a:PortType>
+          <a:PortTypeStr>C19</a:PortTypeStr>
+          <a:Redundant>false</a:Redundant>
+        </a:PowerInterface>
+        <a:PowerInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>16</Index>
+          <InterfaceName>power10/1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName i:nil="true"/>
+          <SonicName i:nil="true"/>
+          <Speed>0</Speed>
+          <a:Phase i:nil="true"/>
+          <a:PortType>C19</a:PortType>
+          <a:PortTypeStr>C19</a:PortTypeStr>
+          <a:Redundant>true</a:Redundant>
+        </a:PowerInterface>
+      </PowerInterfaces>
+      <Properties/>
+      <SerialInterfaces xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution">
+        <a:SerialInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>console</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>console</PortName>
+          <SonicName i:nil="true"/>
+          <Speed>9600</Speed>
+          <a:Logical>false</a:Logical>
+          <a:TcpPortName i:nil="true"/>
+        </a:SerialInterface>
+        <a:SerialInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>2</Index>
+          <InterfaceName>logical1</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>logical1</PortName>
+          <SonicName i:nil="true"/>
+          <Speed>9600</Speed>
+          <a:Logical>true</a:Logical>
+          <a:TcpPortName>1</a:TcpPortName>
+        </a:SerialInterface>
+        <a:SerialInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>3</Index>
+          <InterfaceName>logical2</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>logical2</PortName>
+          <SonicName i:nil="true"/>
+          <Speed>9600</Speed>
+          <a:Logical>true</a:Logical>
+          <a:TcpPortName>2</a:TcpPortName>
+        </a:SerialInterface>
+        <a:SerialInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>4</Index>
+          <InterfaceName>logical3</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>logical3</PortName>
+          <SonicName i:nil="true"/>
+          <Speed>9600</Speed>
+          <a:Logical>true</a:Logical>
+          <a:TcpPortName>3</a:TcpPortName>
+        </a:SerialInterface>
+        <a:SerialInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>5</Index>
+          <InterfaceName>logical4</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>logical4</PortName>
+          <SonicName i:nil="true"/>
+          <Speed>9600</Speed>
+          <a:Logical>true</a:Logical>
+          <a:TcpPortName>4</a:TcpPortName>
+        </a:SerialInterface>
+        <a:SerialInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>6</Index>
+          <InterfaceName>logical5</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>logical5</PortName>
+          <SonicName i:nil="true"/>
+          <Speed>9600</Speed>
+          <a:Logical>true</a:Logical>
+          <a:TcpPortName>5</a:TcpPortName>
+        </a:SerialInterface>
+        <a:SerialInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>7</Index>
+          <InterfaceName>logical6</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>logical6</PortName>
+          <SonicName i:nil="true"/>
+          <Speed>9600</Speed>
+          <a:Logical>true</a:Logical>
+          <a:TcpPortName>6</a:TcpPortName>
+        </a:SerialInterface>
+        <a:SerialInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>8</Index>
+          <InterfaceName>logical7</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>logical7</PortName>
+          <SonicName i:nil="true"/>
+          <Speed>9600</Speed>
+          <a:Logical>true</a:Logical>
+          <a:TcpPortName>7</a:TcpPortName>
+        </a:SerialInterface>
+        <a:SerialInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>9</Index>
+          <InterfaceName>logical8</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>logical8</PortName>
+          <SonicName i:nil="true"/>
+          <Speed>9600</Speed>
+          <a:Logical>true</a:Logical>
+          <a:TcpPortName>8</a:TcpPortName>
+        </a:SerialInterface>
+        <a:SerialInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>10</Index>
+          <InterfaceName>logical9</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>logical9</PortName>
+          <SonicName i:nil="true"/>
+          <Speed>9600</Speed>
+          <a:Logical>true</a:Logical>
+          <a:TcpPortName>9</a:TcpPortName>
+        </a:SerialInterface>
+        <a:SerialInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>11</Index>
+          <InterfaceName>logical10</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>logical10</PortName>
+          <SonicName i:nil="true"/>
+          <Speed>9600</Speed>
+          <a:Logical>true</a:Logical>
+          <a:TcpPortName>10</a:TcpPortName>
+        </a:SerialInterface>
+        <a:SerialInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>12</Index>
+          <InterfaceName>logical11</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>logical11</PortName>
+          <SonicName i:nil="true"/>
+          <Speed>9600</Speed>
+          <a:Logical>true</a:Logical>
+          <a:TcpPortName>11</a:TcpPortName>
+        </a:SerialInterface>
+        <a:SerialInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableFlowControl>false</EnableFlowControl>
+          <Index>13</Index>
+          <InterfaceName>logical12</InterfaceName>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>logical12</PortName>
+          <SonicName i:nil="true"/>
+          <Speed>9600</Speed>
+          <a:Logical>true</a:Logical>
+          <a:TcpPortName>12</a:TcpPortName>
+        </a:SerialInterface>
+      </SerialInterfaces>
+      <VPNTunnelInterfaces xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+      <VendorStr>Sonic</VendorStr>
+    </DeviceInfo>
+  </DeviceInfos>
+  <DpgDec>
+    <DeviceDataPlaneInfo>
+      <IPSecTunnels/>
+      <LoopbackIPInterfaces xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution">
+        <a:LoopbackIPInterface>
+          <ElementType>LoopbackInterface</ElementType>
+          <Name>HostIP</Name>
+          <AttachTo>Loopback0</AttachTo>
+          <a:Prefix xmlns:b="Microsoft.Search.Autopilot.NetMux">
+            <b:IPPrefix>10.152.0.46/32</b:IPPrefix>
+          </a:Prefix>
+          <a:PrefixStr>10.152.0.46/32</a:PrefixStr>
+        </a:LoopbackIPInterface>
+        <a:LoopbackIPInterface>
+          <ElementType>LoopbackInterface</ElementType>
+          <Name>HostIP1</Name>
+          <AttachTo>Loopback0</AttachTo>
+          <a:Prefix xmlns:b="Microsoft.Search.Autopilot.NetMux">
+            <b:IPPrefix>2a01:111:e210:5e::/128</b:IPPrefix>
+          </a:Prefix>
+          <a:PrefixStr>2a01:111:e210:5e::/128</a:PrefixStr>
+        </a:LoopbackIPInterface>
+      </LoopbackIPInterfaces>
+      <ManagementIPInterfaces xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution">
+        <a:ManagementIPInterface>
+          <ElementType>ManagementInterface</ElementType>
+          <Name>ManagementIP</Name>
+          <AttachTo>Management1/1</AttachTo>
+          <a:Prefix xmlns:b="Microsoft.Search.Autopilot.NetMux">
+            <b:IPPrefix>10.3.146.111/24</b:IPPrefix>
+          </a:Prefix>
+          <a:PrefixStr>10.3.146.111/24</a:PrefixStr>
+          <a:ReuseScopeStr i:nil="true"/>
+        </a:ManagementIPInterface>
+        <a:ManagementIPInterface>
+          <ElementType>ManagementInterface</ElementType>
+          <Name>v6ManagementIP</Name>
+          <AttachTo>Management1/1</AttachTo>
+          <a:Prefix xmlns:b="Microsoft.Search.Autopilot.NetMux">
+            <b:IPPrefix>2a01:111:e210:3000::a03:926f/64</b:IPPrefix>
+          </a:Prefix>
+          <a:PrefixStr>2a01:111:e210:3000::a03:926f/64</a:PrefixStr>
+          <a:ReuseScopeStr i:nil="true"/>
+        </a:ManagementIPInterface>
+      </ManagementIPInterfaces>
+      <ManagementVIPInterfaces xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+      <MplsInterfaces/>
+      <MplsTeInterfaces/>
+      <RsvpInterfaces/>
+      <Hostname>str-sonic-sup00</Hostname>
+      <PortChannelInterfaces/>
+      <SubInterfaces/>
+      <VlanInterfaces/>
+      <IPInterfaces/>
+      <DataAcls/>
+      <AclInterfaces/>
+      <NatInterfaces xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+      <DownstreamSummaries/>
+      <DownstreamSummarySet xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+    </DeviceDataPlaneInfo>
+  </DpgDec>
+  <LinkMetadataDeclaration>
+    <Link xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution">
+      <a:LinkMetadata>
+        <a:Name>str-sonic-sup00:console;str-console-197:port 10</a:Name>
+        <a:Properties>
+          <a:DeviceProperty>
+            <a:Name>FlowControl</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>False</a:Value>
+          </a:DeviceProperty>
+        </a:Properties>
+        <a:Key>str-sonic:console;str-console-197:port 10</a:Key>
+      </a:LinkMetadata>
+    </Link>
+    <Properties xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+  </LinkMetadataDeclaration>
+  <MetadataDeclaration>
+    <Devices xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution">
+      <a:DeviceMetadata>
+        <a:Name>str-sonic-sup00-ASIC00</a:Name>
+        <a:Properties>
+          <a:DeviceProperty>
+            <a:Name>ForwardingMethod</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>VoQ</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>ParentHardwareFabricSkuName</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Sonic-supvisor-sku</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>SubRole</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Fabric</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>ProviderLineCard</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str-sonic-fc00</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>ParentRouter</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str-sonic-sup00</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Group</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str-sonic</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>DcCode</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>STR</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>CloudType</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Public</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Location</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>TBD</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Function</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>LabTest</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>DeploymentId</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>3</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>SonicEnabled</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>True</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Region</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>test</a:Value>
+          </a:DeviceProperty>
+        </a:Properties>
+      </a:DeviceMetadata>
+      <a:DeviceMetadata>
+        <a:Name>str-sonic-sup00-ASIC01</a:Name>
+        <a:Properties>
+          <a:DeviceProperty>
+            <a:Name>ForwardingMethod</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>VoQ</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>ParentHardwareFabricSkuName</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Sonic-supvisor-sku</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>SubRole</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Fabric</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>ProviderLineCard</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str-sonic-fc00</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>ParentRouter</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str-sonic-sup00</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Group</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str-sonic</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>DcCode</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>STR</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>CloudType</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Public</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Location</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>TBD</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Function</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>LabTest</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>DeploymentId</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>3</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>SonicEnabled</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>True</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Region</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>test</a:Value>
+          </a:DeviceProperty>
+        </a:Properties>
+      </a:DeviceMetadata>
+      <a:DeviceMetadata>
+        <a:Name>str-sonic-sup00-ASIC02</a:Name>
+        <a:Properties>
+          <a:DeviceProperty>
+            <a:Name>ForwardingMethod</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>VoQ</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>ParentHardwareFabricSkuName</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Sonic-supvisor-sku</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>SubRole</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Fabric</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>AsicSwitchId</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>2</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>ProviderLineCard</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str-sonic-fc01</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>ParentRouter</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str-sonic-sup00</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Group</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str-sonic</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>DcCode</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>STR</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>CloudType</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Public</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Location</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>TBD</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Function</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>LabTest</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>DeploymentId</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>3</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>SonicEnabled</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>True</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Region</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>test</a:Value>
+          </a:DeviceProperty>
+        </a:Properties>
+      </a:DeviceMetadata>
+      <a:DeviceMetadata>
+        <a:Name>str-sonic-sup00-ASIC03</a:Name>
+        <a:Properties>
+          <a:DeviceProperty>
+            <a:Name>ForwardingMethod</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>VoQ</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>ParentHardwareFabricSkuName</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Sonic-supvisor-sku</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>SubRole</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Fabric</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>AsicSwitchId</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>3</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>ProviderLineCard</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str-sonic-fc01</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>ParentRouter</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str-sonic-sup00</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Group</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str-sonic</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>DcCode</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>STR</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>CloudType</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Public</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Location</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>TBD</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Function</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>LabTest</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>DeploymentId</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>3</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>SonicEnabled</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>True</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Region</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>test</a:Value>
+          </a:DeviceProperty>
+        </a:Properties>
+      </a:DeviceMetadata>
+      <a:DeviceMetadata>
+        <a:Name>str-sonic-sup00-ASIC04</a:Name>
+        <a:Properties>
+          <a:DeviceProperty>
+            <a:Name>ForwardingMethod</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>VoQ</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>ParentHardwareFabricSkuName</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Sonic-supvisor-sku</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>SubRole</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Fabric</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>AsicSwitchId</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>8</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>ProviderLineCard</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str-sonic-fc02</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>ParentRouter</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str-sonic-sup00</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Group</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str-sonic</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>DcCode</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>STR</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>CloudType</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Public</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Location</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>TBD</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Function</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>LabTest</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>DeploymentId</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>3</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>SonicEnabled</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>True</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Region</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>test</a:Value>
+          </a:DeviceProperty>
+        </a:Properties>
+      </a:DeviceMetadata>
+      <a:DeviceMetadata>
+        <a:Name>str-sonic-sup00-ASIC05</a:Name>
+        <a:Properties>
+          <a:DeviceProperty>
+            <a:Name>ForwardingMethod</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>VoQ</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>ParentHardwareFabricSkuName</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Sonic-supvisor-sku</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>SubRole</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Fabric</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>AsicSwitchId</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>9</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>ProviderLineCard</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str-sonic-fc02</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>ParentRouter</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str-sonic-sup00</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Group</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str-sonic</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>DcCode</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>STR</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>CloudType</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Public</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Location</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>TBD</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Function</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>LabTest</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>DeploymentId</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>3</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>SonicEnabled</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>True</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Region</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>test</a:Value>
+          </a:DeviceProperty>
+        </a:Properties>
+      </a:DeviceMetadata>
+      <a:DeviceMetadata>
+        <a:Name>str-sonic-sup00-ASIC06</a:Name>
+        <a:Properties>
+          <a:DeviceProperty>
+            <a:Name>ForwardingMethod</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>VoQ</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>ParentHardwareFabricSkuName</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Sonic-supvisor-sku</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>SubRole</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Fabric</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>AsicSwitchId</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>14</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>ProviderLineCard</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str-sonic-fc03</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>ParentRouter</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str-sonic-sup00</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Group</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str-sonic</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>DcCode</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>STR</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>CloudType</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Public</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Location</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>TBD</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Function</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>LabTest</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>DeploymentId</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>3</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>SonicEnabled</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>True</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Region</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>test</a:Value>
+          </a:DeviceProperty>
+        </a:Properties>
+      </a:DeviceMetadata>
+      <a:DeviceMetadata>
+        <a:Name>str-sonic-sup00-ASIC07</a:Name>
+        <a:Properties>
+          <a:DeviceProperty>
+            <a:Name>ForwardingMethod</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>VoQ</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>ParentHardwareFabricSkuName</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Sonic-supvisor-sku</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>SubRole</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Fabric</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>AsicSwitchId</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>15</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>ProviderLineCard</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str-sonic-fc03</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>ParentRouter</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str-sonic-sup00</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Group</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str-sonic</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>DcCode</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>STR</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>CloudType</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Public</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Location</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>TBD</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Function</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>LabTest</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>DeploymentId</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>3</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>SonicEnabled</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>True</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Region</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>test</a:Value>
+          </a:DeviceProperty>
+        </a:Properties>
+      </a:DeviceMetadata>
+      <a:DeviceMetadata>
+        <a:Name>str-sonic-sup00-ASIC08</a:Name>
+        <a:Properties>
+          <a:DeviceProperty>
+            <a:Name>ForwardingMethod</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>VoQ</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>ParentHardwareFabricSkuName</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Sonic-supvisor-sku</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>SubRole</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Fabric</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>AsicSwitchId</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>20</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>ProviderLineCard</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str-sonic-fc04</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>ParentRouter</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str-sonic-sup00</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Group</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str-sonic</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>DcCode</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>STR</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>CloudType</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Public</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Location</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>TBD</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Function</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>LabTest</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>DeploymentId</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>3</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>SonicEnabled</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>True</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Region</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>test</a:Value>
+          </a:DeviceProperty>
+        </a:Properties>
+      </a:DeviceMetadata>
+      <a:DeviceMetadata>
+        <a:Name>str-sonic-sup00-ASIC09</a:Name>
+        <a:Properties>
+          <a:DeviceProperty>
+            <a:Name>ForwardingMethod</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>VoQ</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>ParentHardwareFabricSkuName</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Sonic-supvisor-sku</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>SubRole</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Fabric</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>AsicSwitchId</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>21</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>ProviderLineCard</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str-sonic-fc04</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>ParentRouter</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str-sonic-sup00</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Group</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str-sonic</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>DcCode</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>STR</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>CloudType</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Public</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Location</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>TBD</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Function</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>LabTest</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>DeploymentId</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>3</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>SonicEnabled</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>True</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Region</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>test</a:Value>
+          </a:DeviceProperty>
+        </a:Properties>
+      </a:DeviceMetadata>
+      <a:DeviceMetadata>
+        <a:Name>str-sonic-sup00-ASIC10</a:Name>
+        <a:Properties>
+          <a:DeviceProperty>
+            <a:Name>ForwardingMethod</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>VoQ</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>ParentHardwareFabricSkuName</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Sonic-supvisor-sku</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>SubRole</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Fabric</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>AsicSwitchId</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>26</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>ProviderLineCard</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str-sonic-fc05</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>ParentRouter</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str-sonic-sup00</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Group</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str-sonic</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>DcCode</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>STR</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>CloudType</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Public</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Location</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>TBD</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Function</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>LabTest</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>DeploymentId</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>3</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>SonicEnabled</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>True</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Region</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>test</a:Value>
+          </a:DeviceProperty>
+        </a:Properties>
+      </a:DeviceMetadata>
+      <a:DeviceMetadata>
+        <a:Name>str-sonic-sup00-ASIC11</a:Name>
+        <a:Properties>
+          <a:DeviceProperty>
+            <a:Name>ForwardingMethod</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>VoQ</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>ParentHardwareFabricSkuName</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Sonic-supvisor-sku</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>SubRole</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Fabric</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>AsicSwitchId</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>27</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>ProviderLineCard</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str-sonic-fc05</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>ParentRouter</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str-sonic-sup00</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Group</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str-sonic</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>DcCode</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>STR</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>CloudType</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Public</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Location</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>TBD</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Function</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>LabTest</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>DeploymentId</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>3</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>SonicEnabled</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>True</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Region</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>test</a:Value>
+          </a:DeviceProperty>
+        </a:Properties>
+      </a:DeviceMetadata>
+      <a:DeviceMetadata>
+        <a:Name>str-sonic-sup00</a:Name>
+        <a:Properties>
+          <a:DeviceProperty>
+            <a:Name>FirmwareProfile</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>SONiC-Sonic-supvisor-sku-sup</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>ForwardingMethod</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>VoQ</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>OsVersion</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>SONiC.20220532.60</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>ParentRouter</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str-sonic</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>SubDevices</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str-sonic-sup00-ASIC00;str-sonic-sup00-ASIC01;str-sonic-sup00-ASIC02;str-sonic-sup00-ASIC03;str-sonic-sup00-ASIC04;str-sonic-sup00-ASIC05;str-sonic-sup00-ASIC06;str-sonic-sup00-ASIC07;str-sonic-sup00-ASIC08;str-sonic-sup00-ASIC09;str-sonic-sup00-ASIC10;str-sonic-sup00-ASIC11</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Group</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str-sonic</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>DcCode</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>STR</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>CloudType</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Public</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Location</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>TBD</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Function</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>LabTest</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>DeploymentId</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>3</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>SonicEnabled</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>True</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Region</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>test</a:Value>
+          </a:DeviceProperty>
+        </a:Properties>
+      </a:DeviceMetadata>
+      <a:DeviceMetadata>
+        <a:Name>str-sonic</a:Name>
+        <a:Properties>
+          <a:DeviceProperty>
+            <a:Name>CloudType</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Public</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>ConfigDbAclFile</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>SonicNativeAcl.liquid</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>ConfigTemplateFile</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Sonic.xml</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>DNSServers</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>10.64.5.5;10.64.6.6;10.64.6.7</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>DcCode</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>STR</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>DeploymentId</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>3</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>EnableStreamingTelemetry</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>true</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>ErspanDestinationIpv4</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>10.20.6.4</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Function</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>LabTest</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Group</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>str:542907040</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>InitConfigTemplateFile</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Sonic.init.xml</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Location</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>TBD</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Loopback0Ipv4</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>10.2.0.1/32;10.2.0.2/32;10.2.0.3/32;10.2.0.4/32</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Loopback0Ipv6</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>fc00:20::1/128;fc00:21::1/128;fc00:22::1/128;fc00:23::1/128</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Loopback4096Ipv4</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>192.0.0.1/32;192.0.0.2/32;192.0.0.8/32;192.0.0.9/32</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Loopback4096Ipv6</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>2603:10e2:400::1/128;2603:10e2:400::2/128;2603:10e2:400::8/128;2603:10e2:400::9/128</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>MacSecEnabled</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>True</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>MacSecProfile</a:Name>
+            <a:Reference>usstagee.Sonic.MacSec</a:Reference>
+            <a:Value>PrimaryKey="macsec-profile-two" FallbackKey="macsec-profile" MacsecPolicy=""</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>ManagementIpv4</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>10.3.146.58/24;10.3.146.71/24;10.3.146.72/24;10.3.146.74/24;10.3.146.75/24;10.3.146.80/24;10.3.146.81/24;10.3.146.83/24</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>ManagementIpv6</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>2a01:111:e210:3000::a03:923a/64;2a01:111:e210:3000::a03:9247/64;2a01:111:e210:3000::a03:9248/64;2a01:111:e210:3000::a03:924a/64;2a01:111:e210:3000::a03:924b/64;2a01:111:e210:3000::a03:9250/64;2a01:111:e210:3000::a03:9251/64;2a01:111:e210:3000::a03:9253/64</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>MaxCountOfCores</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>64</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>NtpResources</a:Name>
+            <a:Reference>Public.Ntp</a:Reference>
+            <a:Value>17.39.1.129;17.39.1.130</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>QosProfile</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>VerlaineLongHaul</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>RemoteAuthenticationProtocol</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Tacacs</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>SnmpResources</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>10.52.180.161;10.3.157.12</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>SonicConfigTemplateFile</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Sonic.xml</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>SonicEnabled</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>True</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>SyslogResources</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>10.52.180.161;10.3.157.12</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>SyslogServer</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>10.20.4.167;10.20.7.33;10.20.6.16;10.20.6.84</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>TacacsKey</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>$Secrets.TacacsKey</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>TacacsSecurityLevel</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>7</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>TacacsServer</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>123.46.98.21</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>TotalCountOfVoQ</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>8</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>Region</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>test</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>ChassisEnabled</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>true</a:Value>
+          </a:DeviceProperty>
+        </a:Properties>
+      </a:DeviceMetadata>
+    </Devices>
+    <Properties xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+  </MetadataDeclaration>
+  <PngDec>
+    <DeviceInterfaceLinks>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+        <EndPort>Eth0</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc05-ASIC00</StartDevice>
+        <StartPort>Eth406</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+        <EndPort>Eth2</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc05-ASIC00</StartDevice>
+        <StartPort>Eth399</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+        <EndPort>Eth5</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc05-ASIC00</StartDevice>
+        <StartPort>Eth397</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+        <EndPort>Eth12</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth407</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+        <EndPort>Eth13</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth396</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+        <EndPort>Eth14</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth391</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+        <EndPort>Eth17</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth389</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+        <EndPort>Eth18</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth398</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+        <EndPort>Eth20</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth420</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+        <EndPort>Eth21</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth417</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+        <EndPort>Eth22</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth419</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+        <EndPort>Eth24</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth445</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+        <EndPort>Eth25</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth402</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+        <EndPort>Eth26</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth399</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+        <EndPort>Eth29</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth406</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+        <EndPort>Eth33</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc10-ASIC00</StartDevice>
+        <StartPort>Eth388</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+        <EndPort>Eth34</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc10-ASIC00</StartDevice>
+        <StartPort>Eth390</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+        <EndPort>Eth35</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth403</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+        <EndPort>Eth37</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth397</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+        <EndPort>Eth39</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth406</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+        <EndPort>Eth40</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth416</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+        <EndPort>Eth41</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth430</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+        <EndPort>Eth42</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth399</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+        <EndPort>Eth43</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth429</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+        <EndPort>Eth44</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth404</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+        <EndPort>Eth45</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth397</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+        <EndPort>Eth46</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth451</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+        <EndPort>Eth47</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth448</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+        <EndPort>Eth49</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc09-ASIC00</StartDevice>
+        <StartPort>Eth398</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+        <EndPort>Eth50</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc08-ASIC00</StartDevice>
+        <StartPort>Eth388</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+        <EndPort>Eth52</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc09-ASIC00</StartDevice>
+        <StartPort>Eth389</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+        <EndPort>Eth54</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc08-ASIC00</StartDevice>
+        <StartPort>Eth390</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+        <EndPort>Eth55</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc09-ASIC00</StartDevice>
+        <StartPort>Eth407</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+        <EndPort>Eth57</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc09-ASIC00</StartDevice>
+        <StartPort>Eth396</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+        <EndPort>Eth59</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc09-ASIC00</StartDevice>
+        <StartPort>Eth391</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+        <EndPort>Eth64</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc10-ASIC00</StartDevice>
+        <StartPort>Eth398</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+        <EndPort>Eth65</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc10-ASIC00</StartDevice>
+        <StartPort>Eth399</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+        <EndPort>Eth66</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc10-ASIC00</StartDevice>
+        <StartPort>Eth406</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+        <EndPort>Eth72</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc10-ASIC00</StartDevice>
+        <StartPort>Eth407</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+        <EndPort>Eth74</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc10-ASIC00</StartDevice>
+        <StartPort>Eth389</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+        <EndPort>Eth75</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc10-ASIC00</StartDevice>
+        <StartPort>Eth397</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+        <EndPort>Eth80</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc09-ASIC00</StartDevice>
+        <StartPort>Eth388</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+        <EndPort>Eth81</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth384</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+        <EndPort>Eth82</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth401</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+        <EndPort>Eth83</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth433</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+        <EndPort>Eth84</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc10-ASIC00</StartDevice>
+        <StartPort>Eth391</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+        <EndPort>Eth86</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc10-ASIC00</StartDevice>
+        <StartPort>Eth396</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+        <EndPort>Eth88</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth387</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+        <EndPort>Eth89</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth404</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+        <EndPort>Eth90</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth428</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+        <EndPort>Eth91</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth432</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+        <EndPort>Eth92</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc09-ASIC00</StartDevice>
+        <StartPort>Eth390</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+        <EndPort>Eth94</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth422</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+        <EndPort>Eth95</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth436</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+        <EndPort>Eth96</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc09-ASIC00</StartDevice>
+        <StartPort>Eth406</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+        <EndPort>Eth98</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc09-ASIC00</StartDevice>
+        <StartPort>Eth399</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+        <EndPort>Eth103</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc09-ASIC00</StartDevice>
+        <StartPort>Eth397</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+        <EndPort>Eth108</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc08-ASIC00</StartDevice>
+        <StartPort>Eth391</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+        <EndPort>Eth109</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc08-ASIC00</StartDevice>
+        <StartPort>Eth396</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+        <EndPort>Eth113</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc08-ASIC00</StartDevice>
+        <StartPort>Eth406</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+        <EndPort>Eth114</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc08-ASIC00</StartDevice>
+        <StartPort>Eth398</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+        <EndPort>Eth115</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc08-ASIC00</StartDevice>
+        <StartPort>Eth389</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+        <EndPort>Eth116</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc08-ASIC00</StartDevice>
+        <StartPort>Eth399</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+        <EndPort>Eth121</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc08-ASIC00</StartDevice>
+        <StartPort>Eth397</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+        <EndPort>Eth125</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc07-ASIC00</StartDevice>
+        <StartPort>Eth396</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+        <EndPort>Eth126</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc08-ASIC00</StartDevice>
+        <StartPort>Eth407</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+        <EndPort>Eth127</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc07-ASIC00</StartDevice>
+        <StartPort>Eth391</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+        <EndPort>Eth129</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc07-ASIC00</StartDevice>
+        <StartPort>Eth389</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+        <EndPort>Eth131</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc07-ASIC00</StartDevice>
+        <StartPort>Eth399</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+        <EndPort>Eth132</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc07-ASIC00</StartDevice>
+        <StartPort>Eth390</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+        <EndPort>Eth136</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc07-ASIC00</StartDevice>
+        <StartPort>Eth398</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+        <EndPort>Eth138</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc07-ASIC00</StartDevice>
+        <StartPort>Eth407</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+        <EndPort>Eth141</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc07-ASIC00</StartDevice>
+        <StartPort>Eth406</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+        <EndPort>Eth143</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc07-ASIC00</StartDevice>
+        <StartPort>Eth388</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+        <EndPort>Eth145</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc05-ASIC00</StartDevice>
+        <StartPort>Eth398</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+        <EndPort>Eth147</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc05-ASIC00</StartDevice>
+        <StartPort>Eth389</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+        <EndPort>Eth148</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc05-ASIC00</StartDevice>
+        <StartPort>Eth407</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+        <EndPort>Eth153</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth388</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+        <EndPort>Eth154</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth390</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+        <EndPort>Eth156</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc05-ASIC00</StartDevice>
+        <StartPort>Eth391</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+        <EndPort>Eth157</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc05-ASIC00</StartDevice>
+        <StartPort>Eth396</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+        <EndPort>Eth160</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth406</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+        <EndPort>Eth161</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc05-ASIC00</StartDevice>
+        <StartPort>Eth388</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+        <EndPort>Eth164</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth397</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+        <EndPort>Eth169</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth398</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+        <EndPort>Eth170</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth399</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+        <EndPort>Eth171</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc05-ASIC00</StartDevice>
+        <StartPort>Eth390</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+        <EndPort>Eth172</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth389</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+        <EndPort>Eth178</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth391</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+        <EndPort>Eth179</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth396</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+        <EndPort>Eth181</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth407</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+        <EndPort>Eth184</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth390</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+        <EndPort>Eth186</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth388</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC02</EndDevice>
+        <EndPort>Eth190</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc07-ASIC00</StartDevice>
+        <StartPort>Eth397</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+        <EndPort>Eth3</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth415</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+        <EndPort>Eth6</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth420</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+        <EndPort>Eth7</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth422</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+        <EndPort>Eth9</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth404</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+        <EndPort>Eth13</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth413</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+        <EndPort>Eth17</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth412</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+        <EndPort>Eth19</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth405</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+        <EndPort>Eth22</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth414</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+        <EndPort>Eth24</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth394</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+        <EndPort>Eth25</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth394</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+        <EndPort>Eth26</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth405</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+        <EndPort>Eth27</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth392</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+        <EndPort>Eth28</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth397</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+        <EndPort>Eth29</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth393</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+        <EndPort>Eth30</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth395</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+        <EndPort>Eth31</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth393</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+        <EndPort>Eth32</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth392</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+        <EndPort>Eth33</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth388</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+        <EndPort>Eth34</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth396</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+        <EndPort>Eth35</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth407</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+        <EndPort>Eth36</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth399</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+        <EndPort>Eth37</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth398</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+        <EndPort>Eth38</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth396</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+        <EndPort>Eth39</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth390</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+        <EndPort>Eth40</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth421</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+        <EndPort>Eth41</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth431</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+        <EndPort>Eth42</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth407</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+        <EndPort>Eth43</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth423</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+        <EndPort>Eth44</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth400</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+        <EndPort>Eth45</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth385</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+        <EndPort>Eth46</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth403</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+        <EndPort>Eth47</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth418</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+        <EndPort>Eth49</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc09-ASIC00</StartDevice>
+        <StartPort>Eth405</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+        <EndPort>Eth50</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc09-ASIC00</StartDevice>
+        <StartPort>Eth412</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+        <EndPort>Eth54</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc09-ASIC00</StartDevice>
+        <StartPort>Eth414</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+        <EndPort>Eth59</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc09-ASIC00</StartDevice>
+        <StartPort>Eth413</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+        <EndPort>Eth61</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc09-ASIC00</StartDevice>
+        <StartPort>Eth404</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+        <EndPort>Eth67</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc09-ASIC00</StartDevice>
+        <StartPort>Eth415</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+        <EndPort>Eth68</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc09-ASIC00</StartDevice>
+        <StartPort>Eth422</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+        <EndPort>Eth71</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc09-ASIC00</StartDevice>
+        <StartPort>Eth420</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+        <EndPort>Eth72</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc10-ASIC00</StartDevice>
+        <StartPort>Eth405</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+        <EndPort>Eth73</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc10-ASIC00</StartDevice>
+        <StartPort>Eth412</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+        <EndPort>Eth77</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc10-ASIC00</StartDevice>
+        <StartPort>Eth414</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+        <EndPort>Eth81</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc10-ASIC00</StartDevice>
+        <StartPort>Eth413</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+        <EndPort>Eth87</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc10-ASIC00</StartDevice>
+        <StartPort>Eth404</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+        <EndPort>Eth88</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc10-ASIC00</StartDevice>
+        <StartPort>Eth422</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+        <EndPort>Eth90</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc10-ASIC00</StartDevice>
+        <StartPort>Eth420</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+        <EndPort>Eth94</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc10-ASIC00</StartDevice>
+        <StartPort>Eth415</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+        <EndPort>Eth98</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc08-ASIC00</StartDevice>
+        <StartPort>Eth415</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+        <EndPort>Eth100</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc08-ASIC00</StartDevice>
+        <StartPort>Eth422</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+        <EndPort>Eth101</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc08-ASIC00</StartDevice>
+        <StartPort>Eth420</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+        <EndPort>Eth107</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc08-ASIC00</StartDevice>
+        <StartPort>Eth404</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+        <EndPort>Eth111</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc08-ASIC00</StartDevice>
+        <StartPort>Eth413</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+        <EndPort>Eth112</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc08-ASIC00</StartDevice>
+        <StartPort>Eth405</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+        <EndPort>Eth113</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc08-ASIC00</StartDevice>
+        <StartPort>Eth412</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+        <EndPort>Eth116</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc08-ASIC00</StartDevice>
+        <StartPort>Eth414</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+        <EndPort>Eth123</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc07-ASIC00</StartDevice>
+        <StartPort>Eth415</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+        <EndPort>Eth124</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc07-ASIC00</StartDevice>
+        <StartPort>Eth422</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+        <EndPort>Eth125</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc07-ASIC00</StartDevice>
+        <StartPort>Eth420</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+        <EndPort>Eth129</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc07-ASIC00</StartDevice>
+        <StartPort>Eth404</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+        <EndPort>Eth134</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc07-ASIC00</StartDevice>
+        <StartPort>Eth413</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+        <EndPort>Eth139</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc07-ASIC00</StartDevice>
+        <StartPort>Eth414</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+        <EndPort>Eth140</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc07-ASIC00</StartDevice>
+        <StartPort>Eth412</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+        <EndPort>Eth143</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc07-ASIC00</StartDevice>
+        <StartPort>Eth405</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+        <EndPort>Eth144</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc05-ASIC00</StartDevice>
+        <StartPort>Eth412</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+        <EndPort>Eth145</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc05-ASIC00</StartDevice>
+        <StartPort>Eth405</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+        <EndPort>Eth149</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc05-ASIC00</StartDevice>
+        <StartPort>Eth414</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+        <EndPort>Eth154</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc05-ASIC00</StartDevice>
+        <StartPort>Eth413</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+        <EndPort>Eth158</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc05-ASIC00</StartDevice>
+        <StartPort>Eth404</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+        <EndPort>Eth163</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc05-ASIC00</StartDevice>
+        <StartPort>Eth415</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+        <EndPort>Eth164</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc05-ASIC00</StartDevice>
+        <StartPort>Eth422</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+        <EndPort>Eth167</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc05-ASIC00</StartDevice>
+        <StartPort>Eth420</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+        <EndPort>Eth169</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth412</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+        <EndPort>Eth172</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth405</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+        <EndPort>Eth173</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth414</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+        <EndPort>Eth177</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth413</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+        <EndPort>Eth182</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth404</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+        <EndPort>Eth184</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth422</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+        <EndPort>Eth187</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth420</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC03</EndDevice>
+        <EndPort>Eth188</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth415</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth0</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc05-ASIC00</StartDevice>
+        <StartPort>Eth439</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth2</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc05-ASIC00</StartDevice>
+        <StartPort>Eth429</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth5</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc05-ASIC00</StartDevice>
+        <StartPort>Eth436</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth12</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth488</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth13</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth437</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth14</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth423</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth15</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc05-ASIC00</StartDevice>
+        <StartPort>Eth438</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth17</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth428</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth18</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth431</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth20</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth462</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth21</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth465</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth22</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth464</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth24</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth541</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth25</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth458</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth26</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth429</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth29</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth439</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth33</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc10-ASIC00</StartDevice>
+        <StartPort>Eth430</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth34</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc10-ASIC00</StartDevice>
+        <StartPort>Eth421</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth35</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth416</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth37</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth436</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth38</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth438</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth39</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth420</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth40</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth467</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth41</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth468</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth42</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth422</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth43</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth470</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth44</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth419</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth45</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth402</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth46</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth536</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth47</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth538</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth49</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc09-ASIC00</StartDevice>
+        <StartPort>Eth431</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth50</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc08-ASIC00</StartDevice>
+        <StartPort>Eth430</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth52</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc09-ASIC00</StartDevice>
+        <StartPort>Eth428</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth54</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc08-ASIC00</StartDevice>
+        <StartPort>Eth421</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth55</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc09-ASIC00</StartDevice>
+        <StartPort>Eth488</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth57</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc09-ASIC00</StartDevice>
+        <StartPort>Eth437</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth58</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc10-ASIC00</StartDevice>
+        <StartPort>Eth438</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth59</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc09-ASIC00</StartDevice>
+        <StartPort>Eth423</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth64</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc10-ASIC00</StartDevice>
+        <StartPort>Eth431</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth65</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc10-ASIC00</StartDevice>
+        <StartPort>Eth429</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth66</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc10-ASIC00</StartDevice>
+        <StartPort>Eth439</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth72</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc10-ASIC00</StartDevice>
+        <StartPort>Eth488</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth74</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc10-ASIC00</StartDevice>
+        <StartPort>Eth428</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth75</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc10-ASIC00</StartDevice>
+        <StartPort>Eth436</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth80</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc09-ASIC00</StartDevice>
+        <StartPort>Eth430</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth81</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth439</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth82</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth447</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth83</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth556</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth84</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc10-ASIC00</StartDevice>
+        <StartPort>Eth423</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth86</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc10-ASIC00</StartDevice>
+        <StartPort>Eth437</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth88</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth444</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth89</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth456</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth90</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth562</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth91</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth559</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth92</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc09-ASIC00</StartDevice>
+        <StartPort>Eth421</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth94</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth459</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth95</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth553</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth96</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc09-ASIC00</StartDevice>
+        <StartPort>Eth439</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth98</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc09-ASIC00</StartDevice>
+        <StartPort>Eth429</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth100</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc09-ASIC00</StartDevice>
+        <StartPort>Eth438</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth103</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc09-ASIC00</StartDevice>
+        <StartPort>Eth436</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth108</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc08-ASIC00</StartDevice>
+        <StartPort>Eth423</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth109</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc08-ASIC00</StartDevice>
+        <StartPort>Eth437</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth113</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc08-ASIC00</StartDevice>
+        <StartPort>Eth439</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth114</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc08-ASIC00</StartDevice>
+        <StartPort>Eth431</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth115</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc08-ASIC00</StartDevice>
+        <StartPort>Eth428</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth116</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc08-ASIC00</StartDevice>
+        <StartPort>Eth429</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth121</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc08-ASIC00</StartDevice>
+        <StartPort>Eth436</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth125</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc07-ASIC00</StartDevice>
+        <StartPort>Eth437</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth126</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc08-ASIC00</StartDevice>
+        <StartPort>Eth488</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth127</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc07-ASIC00</StartDevice>
+        <StartPort>Eth423</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth129</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc07-ASIC00</StartDevice>
+        <StartPort>Eth428</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth131</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc07-ASIC00</StartDevice>
+        <StartPort>Eth429</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth132</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc07-ASIC00</StartDevice>
+        <StartPort>Eth421</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth135</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc08-ASIC00</StartDevice>
+        <StartPort>Eth438</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth136</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc07-ASIC00</StartDevice>
+        <StartPort>Eth431</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth138</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc07-ASIC00</StartDevice>
+        <StartPort>Eth488</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth141</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc07-ASIC00</StartDevice>
+        <StartPort>Eth439</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth143</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc07-ASIC00</StartDevice>
+        <StartPort>Eth430</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth145</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc05-ASIC00</StartDevice>
+        <StartPort>Eth431</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth147</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc05-ASIC00</StartDevice>
+        <StartPort>Eth428</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth148</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc05-ASIC00</StartDevice>
+        <StartPort>Eth488</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth151</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth438</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth153</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth430</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth154</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth421</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth156</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc05-ASIC00</StartDevice>
+        <StartPort>Eth423</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth157</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc05-ASIC00</StartDevice>
+        <StartPort>Eth437</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth160</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth439</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth161</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc05-ASIC00</StartDevice>
+        <StartPort>Eth430</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth164</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth436</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth169</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth431</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth170</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth429</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth171</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc05-ASIC00</StartDevice>
+        <StartPort>Eth421</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth172</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth428</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth178</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth423</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth179</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth437</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth181</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth488</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth184</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth421</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth186</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth430</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth187</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc07-ASIC00</StartDevice>
+        <StartPort>Eth438</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC04</EndDevice>
+        <EndPort>Eth190</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc07-ASIC00</StartDevice>
+        <StartPort>Eth436</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth3</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth483</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth6</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth481</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth7</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth475</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth9</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth482</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth13</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth480</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth17</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth491</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth19</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth490</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth22</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth489</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth24</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth427</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth25</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth417</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth26</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth466</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth27</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth461</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth28</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth424</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth29</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth400</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth30</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth457</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth31</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth426</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth32</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth401</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth33</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth434</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth34</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth438</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth35</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth469</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth36</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth435</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth37</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth463</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth38</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth460</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth39</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth425</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth40</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth570</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth41</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth565</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth42</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth441</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth43</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth574</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth44</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth446</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth45</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth437</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth46</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth443</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth47</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth568</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth49</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc09-ASIC00</StartDevice>
+        <StartPort>Eth490</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth50</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc09-ASIC00</StartDevice>
+        <StartPort>Eth491</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth54</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc09-ASIC00</StartDevice>
+        <StartPort>Eth489</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth59</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc09-ASIC00</StartDevice>
+        <StartPort>Eth480</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth61</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc09-ASIC00</StartDevice>
+        <StartPort>Eth482</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth67</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc09-ASIC00</StartDevice>
+        <StartPort>Eth483</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth68</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc09-ASIC00</StartDevice>
+        <StartPort>Eth475</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth71</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc09-ASIC00</StartDevice>
+        <StartPort>Eth481</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth72</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc10-ASIC00</StartDevice>
+        <StartPort>Eth490</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth73</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc10-ASIC00</StartDevice>
+        <StartPort>Eth491</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth77</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc10-ASIC00</StartDevice>
+        <StartPort>Eth489</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth81</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc10-ASIC00</StartDevice>
+        <StartPort>Eth480</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth87</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc10-ASIC00</StartDevice>
+        <StartPort>Eth482</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth88</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc10-ASIC00</StartDevice>
+        <StartPort>Eth475</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth90</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc10-ASIC00</StartDevice>
+        <StartPort>Eth481</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth94</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc10-ASIC00</StartDevice>
+        <StartPort>Eth483</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth98</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc08-ASIC00</StartDevice>
+        <StartPort>Eth483</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth100</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc08-ASIC00</StartDevice>
+        <StartPort>Eth475</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth101</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc08-ASIC00</StartDevice>
+        <StartPort>Eth481</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth107</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc08-ASIC00</StartDevice>
+        <StartPort>Eth482</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth111</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc08-ASIC00</StartDevice>
+        <StartPort>Eth480</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth112</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc08-ASIC00</StartDevice>
+        <StartPort>Eth490</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth113</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc08-ASIC00</StartDevice>
+        <StartPort>Eth491</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth116</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc08-ASIC00</StartDevice>
+        <StartPort>Eth489</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth123</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc07-ASIC00</StartDevice>
+        <StartPort>Eth483</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth124</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc07-ASIC00</StartDevice>
+        <StartPort>Eth475</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth125</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc07-ASIC00</StartDevice>
+        <StartPort>Eth481</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth129</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc07-ASIC00</StartDevice>
+        <StartPort>Eth482</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth134</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc07-ASIC00</StartDevice>
+        <StartPort>Eth480</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth139</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc07-ASIC00</StartDevice>
+        <StartPort>Eth489</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth140</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc07-ASIC00</StartDevice>
+        <StartPort>Eth491</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth143</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc07-ASIC00</StartDevice>
+        <StartPort>Eth490</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth144</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc05-ASIC00</StartDevice>
+        <StartPort>Eth491</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth145</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc05-ASIC00</StartDevice>
+        <StartPort>Eth490</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth149</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc05-ASIC00</StartDevice>
+        <StartPort>Eth489</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth154</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc05-ASIC00</StartDevice>
+        <StartPort>Eth480</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth158</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc05-ASIC00</StartDevice>
+        <StartPort>Eth482</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth163</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc05-ASIC00</StartDevice>
+        <StartPort>Eth483</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth164</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc05-ASIC00</StartDevice>
+        <StartPort>Eth475</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth167</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc05-ASIC00</StartDevice>
+        <StartPort>Eth481</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth169</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth491</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth172</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth490</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth173</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth489</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth177</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth480</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth182</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth482</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth184</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth475</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth187</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth481</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC05</EndDevice>
+        <EndPort>Eth188</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth483</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth0</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc05-ASIC00</StartDevice>
+        <StartPort>Eth449</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth1</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc05-ASIC00</StartDevice>
+        <StartPort>Eth465</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth5</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc05-ASIC00</StartDevice>
+        <StartPort>Eth450</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth12</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth451</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth13</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth448</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth14</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth472</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth15</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc05-ASIC00</StartDevice>
+        <StartPort>Eth466</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth17</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth467</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth18</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth464</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth20</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth555</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth21</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth558</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth22</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth575</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth24</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth482</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth25</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth557</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth27</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth465</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth29</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth449</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth33</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc10-ASIC00</StartDevice>
+        <StartPort>Eth474</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth34</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc10-ASIC00</StartDevice>
+        <StartPort>Eth473</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth35</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth444</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth37</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth450</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth38</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth466</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth39</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth439</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth40</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth471</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth41</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth474</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth42</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth435</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth43</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth542</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth44</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth434</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth45</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth437</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth46</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth487</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth47</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth485</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth49</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc09-ASIC00</StartDevice>
+        <StartPort>Eth464</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth50</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc08-ASIC00</StartDevice>
+        <StartPort>Eth474</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth51</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc09-ASIC00</StartDevice>
+        <StartPort>Eth465</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth52</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc09-ASIC00</StartDevice>
+        <StartPort>Eth467</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth54</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc08-ASIC00</StartDevice>
+        <StartPort>Eth473</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth55</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc09-ASIC00</StartDevice>
+        <StartPort>Eth451</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth57</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc09-ASIC00</StartDevice>
+        <StartPort>Eth448</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth58</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc10-ASIC00</StartDevice>
+        <StartPort>Eth466</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth59</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc09-ASIC00</StartDevice>
+        <StartPort>Eth472</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth64</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc10-ASIC00</StartDevice>
+        <StartPort>Eth464</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth66</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc10-ASIC00</StartDevice>
+        <StartPort>Eth449</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth69</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc10-ASIC00</StartDevice>
+        <StartPort>Eth465</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth72</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc10-ASIC00</StartDevice>
+        <StartPort>Eth451</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth74</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc10-ASIC00</StartDevice>
+        <StartPort>Eth467</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth75</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc10-ASIC00</StartDevice>
+        <StartPort>Eth450</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth80</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc09-ASIC00</StartDevice>
+        <StartPort>Eth474</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth81</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth566</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth82</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth552</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth83</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth502</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth84</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc10-ASIC00</StartDevice>
+        <StartPort>Eth472</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth86</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc10-ASIC00</StartDevice>
+        <StartPort>Eth448</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth88</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth563</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth89</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth560</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth90</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth507</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth91</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth496</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth92</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc09-ASIC00</StartDevice>
+        <StartPort>Eth473</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth94</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth554</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth95</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth501</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth96</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc09-ASIC00</StartDevice>
+        <StartPort>Eth449</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth100</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc09-ASIC00</StartDevice>
+        <StartPort>Eth466</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth103</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc09-ASIC00</StartDevice>
+        <StartPort>Eth450</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth108</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc08-ASIC00</StartDevice>
+        <StartPort>Eth472</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth109</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc08-ASIC00</StartDevice>
+        <StartPort>Eth448</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth113</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc08-ASIC00</StartDevice>
+        <StartPort>Eth449</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth114</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc08-ASIC00</StartDevice>
+        <StartPort>Eth464</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth115</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc08-ASIC00</StartDevice>
+        <StartPort>Eth467</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth118</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc08-ASIC00</StartDevice>
+        <StartPort>Eth465</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth121</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc08-ASIC00</StartDevice>
+        <StartPort>Eth450</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth125</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc07-ASIC00</StartDevice>
+        <StartPort>Eth448</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth126</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc08-ASIC00</StartDevice>
+        <StartPort>Eth451</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth127</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc07-ASIC00</StartDevice>
+        <StartPort>Eth472</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth129</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc07-ASIC00</StartDevice>
+        <StartPort>Eth467</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth132</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc07-ASIC00</StartDevice>
+        <StartPort>Eth473</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth135</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc08-ASIC00</StartDevice>
+        <StartPort>Eth466</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth136</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc07-ASIC00</StartDevice>
+        <StartPort>Eth464</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth138</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc07-ASIC00</StartDevice>
+        <StartPort>Eth451</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth139</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc07-ASIC00</StartDevice>
+        <StartPort>Eth465</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth141</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc07-ASIC00</StartDevice>
+        <StartPort>Eth449</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth143</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc07-ASIC00</StartDevice>
+        <StartPort>Eth474</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth145</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc05-ASIC00</StartDevice>
+        <StartPort>Eth464</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth147</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc05-ASIC00</StartDevice>
+        <StartPort>Eth467</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth148</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc05-ASIC00</StartDevice>
+        <StartPort>Eth451</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth151</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth466</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth153</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth474</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth154</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth473</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth156</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc05-ASIC00</StartDevice>
+        <StartPort>Eth472</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth157</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc05-ASIC00</StartDevice>
+        <StartPort>Eth448</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth160</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth449</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth161</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc05-ASIC00</StartDevice>
+        <StartPort>Eth474</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth164</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth450</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth168</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth465</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth169</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth464</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth171</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc05-ASIC00</StartDevice>
+        <StartPort>Eth473</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth172</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth467</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth178</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth472</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth179</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth448</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth181</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth451</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth184</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth473</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth186</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth474</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth187</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc07-ASIC00</StartDevice>
+        <StartPort>Eth466</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC06</EndDevice>
+        <EndPort>Eth190</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc07-ASIC00</StartDevice>
+        <StartPort>Eth450</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+        <EndPort>Eth3</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth441</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+        <EndPort>Eth6</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth442</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+        <EndPort>Eth7</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth443</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+        <EndPort>Eth9</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth444</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+        <EndPort>Eth13</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth440</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+        <EndPort>Eth17</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth445</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+        <EndPort>Eth19</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth447</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+        <EndPort>Eth22</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth446</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+        <EndPort>Eth24</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth473</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+        <EndPort>Eth25</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth438</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+        <EndPort>Eth26</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth524</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+        <EndPort>Eth27</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth478</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+        <EndPort>Eth28</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth475</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+        <EndPort>Eth29</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth429</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+        <EndPort>Eth30</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth532</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+        <EndPort>Eth31</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth479</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+        <EndPort>Eth32</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth430</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+        <EndPort>Eth33</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth570</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+        <EndPort>Eth34</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth573</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+        <EndPort>Eth35</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth527</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+        <EndPort>Eth36</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth477</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+        <EndPort>Eth37</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth528</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+        <EndPort>Eth38</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth529</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+        <EndPort>Eth39</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth574</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+        <EndPort>Eth40</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth517</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+        <EndPort>Eth41</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth508</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+        <EndPort>Eth42</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth564</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+        <EndPort>Eth43</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth514</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+        <EndPort>Eth44</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth569</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+        <EndPort>Eth45</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth567</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+        <EndPort>Eth46</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth561</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+        <EndPort>Eth47</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth519</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+        <EndPort>Eth49</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc09-ASIC00</StartDevice>
+        <StartPort>Eth447</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+        <EndPort>Eth50</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc09-ASIC00</StartDevice>
+        <StartPort>Eth445</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+        <EndPort>Eth54</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc09-ASIC00</StartDevice>
+        <StartPort>Eth446</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+        <EndPort>Eth59</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc09-ASIC00</StartDevice>
+        <StartPort>Eth440</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+        <EndPort>Eth61</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc09-ASIC00</StartDevice>
+        <StartPort>Eth444</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+        <EndPort>Eth67</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc09-ASIC00</StartDevice>
+        <StartPort>Eth441</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+        <EndPort>Eth68</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc09-ASIC00</StartDevice>
+        <StartPort>Eth443</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+        <EndPort>Eth71</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc09-ASIC00</StartDevice>
+        <StartPort>Eth442</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+        <EndPort>Eth72</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc10-ASIC00</StartDevice>
+        <StartPort>Eth447</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+        <EndPort>Eth73</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc10-ASIC00</StartDevice>
+        <StartPort>Eth445</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+        <EndPort>Eth77</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc10-ASIC00</StartDevice>
+        <StartPort>Eth446</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+        <EndPort>Eth81</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc10-ASIC00</StartDevice>
+        <StartPort>Eth440</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+        <EndPort>Eth87</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc10-ASIC00</StartDevice>
+        <StartPort>Eth444</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+        <EndPort>Eth88</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc10-ASIC00</StartDevice>
+        <StartPort>Eth443</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+        <EndPort>Eth90</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc10-ASIC00</StartDevice>
+        <StartPort>Eth442</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+        <EndPort>Eth94</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc10-ASIC00</StartDevice>
+        <StartPort>Eth441</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+        <EndPort>Eth98</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc08-ASIC00</StartDevice>
+        <StartPort>Eth441</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+        <EndPort>Eth100</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc08-ASIC00</StartDevice>
+        <StartPort>Eth443</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+        <EndPort>Eth101</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc08-ASIC00</StartDevice>
+        <StartPort>Eth442</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+        <EndPort>Eth107</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc08-ASIC00</StartDevice>
+        <StartPort>Eth444</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+        <EndPort>Eth111</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc08-ASIC00</StartDevice>
+        <StartPort>Eth440</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+        <EndPort>Eth112</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc08-ASIC00</StartDevice>
+        <StartPort>Eth447</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+        <EndPort>Eth113</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc08-ASIC00</StartDevice>
+        <StartPort>Eth445</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+        <EndPort>Eth116</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc08-ASIC00</StartDevice>
+        <StartPort>Eth446</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+        <EndPort>Eth123</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc07-ASIC00</StartDevice>
+        <StartPort>Eth441</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+        <EndPort>Eth124</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc07-ASIC00</StartDevice>
+        <StartPort>Eth443</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+        <EndPort>Eth125</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc07-ASIC00</StartDevice>
+        <StartPort>Eth442</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+        <EndPort>Eth129</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc07-ASIC00</StartDevice>
+        <StartPort>Eth444</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+        <EndPort>Eth134</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc07-ASIC00</StartDevice>
+        <StartPort>Eth440</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+        <EndPort>Eth139</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc07-ASIC00</StartDevice>
+        <StartPort>Eth446</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+        <EndPort>Eth140</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc07-ASIC00</StartDevice>
+        <StartPort>Eth445</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+        <EndPort>Eth143</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc07-ASIC00</StartDevice>
+        <StartPort>Eth447</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+        <EndPort>Eth144</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc05-ASIC00</StartDevice>
+        <StartPort>Eth445</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+        <EndPort>Eth145</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc05-ASIC00</StartDevice>
+        <StartPort>Eth447</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+        <EndPort>Eth149</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc05-ASIC00</StartDevice>
+        <StartPort>Eth446</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+        <EndPort>Eth154</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc05-ASIC00</StartDevice>
+        <StartPort>Eth440</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+        <EndPort>Eth158</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc05-ASIC00</StartDevice>
+        <StartPort>Eth444</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+        <EndPort>Eth163</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc05-ASIC00</StartDevice>
+        <StartPort>Eth441</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+        <EndPort>Eth164</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc05-ASIC00</StartDevice>
+        <StartPort>Eth443</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+        <EndPort>Eth167</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc05-ASIC00</StartDevice>
+        <StartPort>Eth442</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+        <EndPort>Eth169</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth445</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+        <EndPort>Eth172</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth447</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+        <EndPort>Eth173</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth446</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+        <EndPort>Eth177</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth440</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+        <EndPort>Eth182</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth444</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+        <EndPort>Eth184</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth443</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+        <EndPort>Eth187</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth442</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC07</EndDevice>
+        <EndPort>Eth188</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth441</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth0</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc05-ASIC00</StartDevice>
+        <StartPort>Eth403</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth1</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc05-ASIC00</StartDevice>
+        <StartPort>Eth395</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth5</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc05-ASIC00</StartDevice>
+        <StartPort>Eth402</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth12</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth401</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth13</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth394</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth14</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth385</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth15</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc05-ASIC00</StartDevice>
+        <StartPort>Eth392</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth17</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth386</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth18</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth393</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth20</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth432</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth21</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth433</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth22</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth530</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth24</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth465</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth25</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth531</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth27</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth395</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth29</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth403</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth33</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc10-ASIC00</StartDevice>
+        <StartPort>Eth387</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth34</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc10-ASIC00</StartDevice>
+        <StartPort>Eth384</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth35</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth567</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth37</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth402</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth38</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth392</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth39</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth571</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth40</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth540</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth41</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth533</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth42</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth572</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth43</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth436</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth44</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth471</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth45</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth468</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth46</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth450</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth47</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth458</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth49</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc09-ASIC00</StartDevice>
+        <StartPort>Eth393</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth50</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc08-ASIC00</StartDevice>
+        <StartPort>Eth387</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth51</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc09-ASIC00</StartDevice>
+        <StartPort>Eth395</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth52</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc09-ASIC00</StartDevice>
+        <StartPort>Eth386</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth54</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc08-ASIC00</StartDevice>
+        <StartPort>Eth384</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth55</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc09-ASIC00</StartDevice>
+        <StartPort>Eth401</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth57</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc09-ASIC00</StartDevice>
+        <StartPort>Eth394</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth58</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc10-ASIC00</StartDevice>
+        <StartPort>Eth392</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth59</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc09-ASIC00</StartDevice>
+        <StartPort>Eth385</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth64</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc10-ASIC00</StartDevice>
+        <StartPort>Eth393</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth66</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc10-ASIC00</StartDevice>
+        <StartPort>Eth403</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth69</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc10-ASIC00</StartDevice>
+        <StartPort>Eth395</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth72</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc10-ASIC00</StartDevice>
+        <StartPort>Eth401</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth74</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc10-ASIC00</StartDevice>
+        <StartPort>Eth386</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth75</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc10-ASIC00</StartDevice>
+        <StartPort>Eth402</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth80</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc09-ASIC00</StartDevice>
+        <StartPort>Eth387</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth81</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth423</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth82</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth421</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth83</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth470</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth84</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc10-ASIC00</StartDevice>
+        <StartPort>Eth385</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth86</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc10-ASIC00</StartDevice>
+        <StartPort>Eth394</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth88</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth418</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth89</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth431</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth90</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth459</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth91</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth467</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth92</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc09-ASIC00</StartDevice>
+        <StartPort>Eth384</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth94</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth428</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth95</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth462</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth96</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc09-ASIC00</StartDevice>
+        <StartPort>Eth403</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth100</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc09-ASIC00</StartDevice>
+        <StartPort>Eth392</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth103</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc09-ASIC00</StartDevice>
+        <StartPort>Eth402</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth108</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc08-ASIC00</StartDevice>
+        <StartPort>Eth385</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth109</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc08-ASIC00</StartDevice>
+        <StartPort>Eth394</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth113</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc08-ASIC00</StartDevice>
+        <StartPort>Eth403</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth114</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc08-ASIC00</StartDevice>
+        <StartPort>Eth393</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth115</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc08-ASIC00</StartDevice>
+        <StartPort>Eth386</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth118</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc08-ASIC00</StartDevice>
+        <StartPort>Eth395</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth121</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc08-ASIC00</StartDevice>
+        <StartPort>Eth402</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth125</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc07-ASIC00</StartDevice>
+        <StartPort>Eth394</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth126</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc08-ASIC00</StartDevice>
+        <StartPort>Eth401</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth127</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc07-ASIC00</StartDevice>
+        <StartPort>Eth385</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth129</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc07-ASIC00</StartDevice>
+        <StartPort>Eth386</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth132</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc07-ASIC00</StartDevice>
+        <StartPort>Eth384</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth135</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc08-ASIC00</StartDevice>
+        <StartPort>Eth392</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth136</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc07-ASIC00</StartDevice>
+        <StartPort>Eth393</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth138</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc07-ASIC00</StartDevice>
+        <StartPort>Eth401</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth139</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc07-ASIC00</StartDevice>
+        <StartPort>Eth395</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth141</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc07-ASIC00</StartDevice>
+        <StartPort>Eth403</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth143</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc07-ASIC00</StartDevice>
+        <StartPort>Eth387</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth145</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc05-ASIC00</StartDevice>
+        <StartPort>Eth393</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth147</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc05-ASIC00</StartDevice>
+        <StartPort>Eth386</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth148</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc05-ASIC00</StartDevice>
+        <StartPort>Eth401</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth151</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth392</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth153</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth387</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth154</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth384</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth156</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc05-ASIC00</StartDevice>
+        <StartPort>Eth385</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth157</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc05-ASIC00</StartDevice>
+        <StartPort>Eth394</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth160</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth403</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth161</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc05-ASIC00</StartDevice>
+        <StartPort>Eth387</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth164</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth402</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth168</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth395</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth169</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth393</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth171</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc05-ASIC00</StartDevice>
+        <StartPort>Eth384</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth172</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth386</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth178</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth385</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth179</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth394</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth181</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth401</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth184</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth384</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth186</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth387</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth187</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc07-ASIC00</StartDevice>
+        <StartPort>Eth392</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC08</EndDevice>
+        <EndPort>Eth190</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc07-ASIC00</StartDevice>
+        <StartPort>Eth402</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth3</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth419</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth6</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth417</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth7</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth418</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth9</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth410</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth13</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth408</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth17</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth400</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth19</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth411</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth22</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth409</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth24</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth543</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth25</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth575</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth26</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth453</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth27</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth395</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth28</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth535</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth29</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth447</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth30</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth573</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth31</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth539</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth32</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth449</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth33</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth391</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth34</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth537</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth35</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth452</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth36</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth398</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth37</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth455</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth38</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth446</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth39</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth534</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth40</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth454</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth41</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth464</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth42</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth386</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth43</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth461</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth44</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth406</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth45</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth389</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth46</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth405</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth47</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth456</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth49</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc09-ASIC00</StartDevice>
+        <StartPort>Eth411</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth50</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc09-ASIC00</StartDevice>
+        <StartPort>Eth400</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth54</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc09-ASIC00</StartDevice>
+        <StartPort>Eth409</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth59</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc09-ASIC00</StartDevice>
+        <StartPort>Eth408</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth61</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc09-ASIC00</StartDevice>
+        <StartPort>Eth410</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth67</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc09-ASIC00</StartDevice>
+        <StartPort>Eth419</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth68</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc09-ASIC00</StartDevice>
+        <StartPort>Eth418</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth71</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc09-ASIC00</StartDevice>
+        <StartPort>Eth417</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth72</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc10-ASIC00</StartDevice>
+        <StartPort>Eth411</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth73</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc10-ASIC00</StartDevice>
+        <StartPort>Eth400</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth77</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc10-ASIC00</StartDevice>
+        <StartPort>Eth409</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth81</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc10-ASIC00</StartDevice>
+        <StartPort>Eth408</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth87</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc10-ASIC00</StartDevice>
+        <StartPort>Eth410</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth88</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc10-ASIC00</StartDevice>
+        <StartPort>Eth418</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth90</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc10-ASIC00</StartDevice>
+        <StartPort>Eth417</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth94</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc10-ASIC00</StartDevice>
+        <StartPort>Eth419</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth98</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc08-ASIC00</StartDevice>
+        <StartPort>Eth419</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth100</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc08-ASIC00</StartDevice>
+        <StartPort>Eth418</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth101</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc08-ASIC00</StartDevice>
+        <StartPort>Eth417</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth107</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc08-ASIC00</StartDevice>
+        <StartPort>Eth410</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth111</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc08-ASIC00</StartDevice>
+        <StartPort>Eth408</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth112</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc08-ASIC00</StartDevice>
+        <StartPort>Eth411</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth113</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc08-ASIC00</StartDevice>
+        <StartPort>Eth400</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth116</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc08-ASIC00</StartDevice>
+        <StartPort>Eth409</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth123</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc07-ASIC00</StartDevice>
+        <StartPort>Eth419</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth124</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc07-ASIC00</StartDevice>
+        <StartPort>Eth418</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth125</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc07-ASIC00</StartDevice>
+        <StartPort>Eth417</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth129</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc07-ASIC00</StartDevice>
+        <StartPort>Eth410</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth134</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc07-ASIC00</StartDevice>
+        <StartPort>Eth408</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth139</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc07-ASIC00</StartDevice>
+        <StartPort>Eth409</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth140</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc07-ASIC00</StartDevice>
+        <StartPort>Eth400</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth143</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc07-ASIC00</StartDevice>
+        <StartPort>Eth411</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth144</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc05-ASIC00</StartDevice>
+        <StartPort>Eth400</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth145</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc05-ASIC00</StartDevice>
+        <StartPort>Eth411</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth149</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc05-ASIC00</StartDevice>
+        <StartPort>Eth409</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth154</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc05-ASIC00</StartDevice>
+        <StartPort>Eth408</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth158</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc05-ASIC00</StartDevice>
+        <StartPort>Eth410</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth163</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc05-ASIC00</StartDevice>
+        <StartPort>Eth419</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth164</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc05-ASIC00</StartDevice>
+        <StartPort>Eth418</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth167</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc05-ASIC00</StartDevice>
+        <StartPort>Eth417</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth169</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth400</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth172</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth411</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth173</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth409</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth177</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth408</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth182</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth410</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth184</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth418</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth187</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth417</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC09</EndDevice>
+        <EndPort>Eth188</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth419</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth0</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc05-ASIC00</StartDevice>
+        <StartPort>Eth434</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth5</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc05-ASIC00</StartDevice>
+        <StartPort>Eth493</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth12</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth495</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth13</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth433</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth14</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth416</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth15</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc05-ASIC00</StartDevice>
+        <StartPort>Eth435</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth17</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth426</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth18</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth427</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth20</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth562</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth21</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth559</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth22</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth518</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth23</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth432</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth24</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth540</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth25</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth497</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth29</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth434</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth33</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc10-ASIC00</StartDevice>
+        <StartPort>Eth425</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth34</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc10-ASIC00</StartDevice>
+        <StartPort>Eth424</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth35</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth523</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth37</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth493</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth38</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth435</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth39</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth520</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth40</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth440</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth41</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth556</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth42</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth521</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth43</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth553</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth44</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth534</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth45</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth535</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth46</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth531</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth47</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth530</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth49</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc09-ASIC00</StartDevice>
+        <StartPort>Eth427</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth50</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc08-ASIC00</StartDevice>
+        <StartPort>Eth425</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth52</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc09-ASIC00</StartDevice>
+        <StartPort>Eth426</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth54</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc08-ASIC00</StartDevice>
+        <StartPort>Eth424</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth55</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc09-ASIC00</StartDevice>
+        <StartPort>Eth495</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth57</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc09-ASIC00</StartDevice>
+        <StartPort>Eth433</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth58</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc10-ASIC00</StartDevice>
+        <StartPort>Eth435</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth59</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc09-ASIC00</StartDevice>
+        <StartPort>Eth416</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth64</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc10-ASIC00</StartDevice>
+        <StartPort>Eth427</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth66</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc10-ASIC00</StartDevice>
+        <StartPort>Eth434</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth72</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc10-ASIC00</StartDevice>
+        <StartPort>Eth495</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth74</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc10-ASIC00</StartDevice>
+        <StartPort>Eth426</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth75</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc10-ASIC00</StartDevice>
+        <StartPort>Eth493</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth80</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc09-ASIC00</StartDevice>
+        <StartPort>Eth425</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth81</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth476</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth82</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth572</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth83</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth533</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth84</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc10-ASIC00</StartDevice>
+        <StartPort>Eth416</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth86</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc10-ASIC00</StartDevice>
+        <StartPort>Eth433</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth87</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc09-ASIC00</StartDevice>
+        <StartPort>Eth432</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth88</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth571</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth89</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth568</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth90</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth554</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth91</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth537</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth92</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc09-ASIC00</StartDevice>
+        <StartPort>Eth424</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth93</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc10-ASIC00</StartDevice>
+        <StartPort>Eth432</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth94</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth565</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth95</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth543</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth96</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc09-ASIC00</StartDevice>
+        <StartPort>Eth434</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth100</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc09-ASIC00</StartDevice>
+        <StartPort>Eth435</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth103</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc09-ASIC00</StartDevice>
+        <StartPort>Eth493</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth105</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc08-ASIC00</StartDevice>
+        <StartPort>Eth432</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth108</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc08-ASIC00</StartDevice>
+        <StartPort>Eth416</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth109</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc08-ASIC00</StartDevice>
+        <StartPort>Eth433</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth113</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc08-ASIC00</StartDevice>
+        <StartPort>Eth434</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth114</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc08-ASIC00</StartDevice>
+        <StartPort>Eth427</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth115</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc08-ASIC00</StartDevice>
+        <StartPort>Eth426</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth121</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc08-ASIC00</StartDevice>
+        <StartPort>Eth493</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth125</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc07-ASIC00</StartDevice>
+        <StartPort>Eth433</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth126</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc08-ASIC00</StartDevice>
+        <StartPort>Eth495</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth127</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc07-ASIC00</StartDevice>
+        <StartPort>Eth416</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth129</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc07-ASIC00</StartDevice>
+        <StartPort>Eth426</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth132</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc07-ASIC00</StartDevice>
+        <StartPort>Eth424</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth135</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc08-ASIC00</StartDevice>
+        <StartPort>Eth435</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth136</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc07-ASIC00</StartDevice>
+        <StartPort>Eth427</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth138</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc07-ASIC00</StartDevice>
+        <StartPort>Eth495</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth141</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc07-ASIC00</StartDevice>
+        <StartPort>Eth434</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth143</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc07-ASIC00</StartDevice>
+        <StartPort>Eth425</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth145</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc05-ASIC00</StartDevice>
+        <StartPort>Eth427</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth147</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc05-ASIC00</StartDevice>
+        <StartPort>Eth426</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth148</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc05-ASIC00</StartDevice>
+        <StartPort>Eth495</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth151</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth435</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth153</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth425</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth154</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth424</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth155</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc05-ASIC00</StartDevice>
+        <StartPort>Eth432</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth156</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc05-ASIC00</StartDevice>
+        <StartPort>Eth416</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth157</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc05-ASIC00</StartDevice>
+        <StartPort>Eth433</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth160</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth434</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth161</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc05-ASIC00</StartDevice>
+        <StartPort>Eth425</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth164</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth493</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth169</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth427</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth171</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc05-ASIC00</StartDevice>
+        <StartPort>Eth424</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth172</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth426</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth173</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth432</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth178</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth416</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth179</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth433</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth181</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth495</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth184</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth424</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth185</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc07-ASIC00</StartDevice>
+        <StartPort>Eth432</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth186</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth425</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth187</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc07-ASIC00</StartDevice>
+        <StartPort>Eth435</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC10</EndDevice>
+        <EndPort>Eth190</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc07-ASIC00</StartDevice>
+        <StartPort>Eth493</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth3</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth484</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth6</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth476</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth7</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth479</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth9</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth486</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth13</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth485</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth17</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth494</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth19</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth492</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth22</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04-ASIC00</StartDevice>
+        <StartPort>Eth487</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth24</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth442</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth25</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth564</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth26</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth555</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth27</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth445</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth28</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth513</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth29</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth561</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth30</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth569</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth31</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth512</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth32</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth552</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth33</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth460</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth34</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth516</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth35</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth563</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth36</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth457</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth37</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth566</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth38</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth558</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth39</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth515</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth40</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth542</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth41</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth557</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth42</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth466</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth43</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth560</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth44</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth472</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth45</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth463</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth46</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC00</StartDevice>
+        <StartPort>Eth469</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth47</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03-ASIC01</StartDevice>
+        <StartPort>Eth539</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth49</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc09-ASIC00</StartDevice>
+        <StartPort>Eth492</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth50</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc09-ASIC00</StartDevice>
+        <StartPort>Eth494</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth54</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc09-ASIC00</StartDevice>
+        <StartPort>Eth487</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth59</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc09-ASIC00</StartDevice>
+        <StartPort>Eth485</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth61</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc09-ASIC00</StartDevice>
+        <StartPort>Eth486</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth67</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc09-ASIC00</StartDevice>
+        <StartPort>Eth484</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth68</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc09-ASIC00</StartDevice>
+        <StartPort>Eth479</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth71</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc09-ASIC00</StartDevice>
+        <StartPort>Eth476</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth72</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc10-ASIC00</StartDevice>
+        <StartPort>Eth492</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth73</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc10-ASIC00</StartDevice>
+        <StartPort>Eth494</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth77</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc10-ASIC00</StartDevice>
+        <StartPort>Eth487</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth81</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc10-ASIC00</StartDevice>
+        <StartPort>Eth485</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth87</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc10-ASIC00</StartDevice>
+        <StartPort>Eth486</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth88</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc10-ASIC00</StartDevice>
+        <StartPort>Eth479</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth90</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc10-ASIC00</StartDevice>
+        <StartPort>Eth476</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth94</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc10-ASIC00</StartDevice>
+        <StartPort>Eth484</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth98</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc08-ASIC00</StartDevice>
+        <StartPort>Eth484</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth100</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc08-ASIC00</StartDevice>
+        <StartPort>Eth479</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth101</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc08-ASIC00</StartDevice>
+        <StartPort>Eth476</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth107</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc08-ASIC00</StartDevice>
+        <StartPort>Eth486</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth111</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc08-ASIC00</StartDevice>
+        <StartPort>Eth485</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth112</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc08-ASIC00</StartDevice>
+        <StartPort>Eth492</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth113</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc08-ASIC00</StartDevice>
+        <StartPort>Eth494</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth116</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc08-ASIC00</StartDevice>
+        <StartPort>Eth487</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth123</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc07-ASIC00</StartDevice>
+        <StartPort>Eth484</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth124</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc07-ASIC00</StartDevice>
+        <StartPort>Eth479</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth125</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc07-ASIC00</StartDevice>
+        <StartPort>Eth476</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth129</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc07-ASIC00</StartDevice>
+        <StartPort>Eth486</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth134</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc07-ASIC00</StartDevice>
+        <StartPort>Eth485</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth139</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc07-ASIC00</StartDevice>
+        <StartPort>Eth487</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth140</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc07-ASIC00</StartDevice>
+        <StartPort>Eth494</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth143</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc07-ASIC00</StartDevice>
+        <StartPort>Eth492</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth144</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc05-ASIC00</StartDevice>
+        <StartPort>Eth494</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth145</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc05-ASIC00</StartDevice>
+        <StartPort>Eth492</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth149</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc05-ASIC00</StartDevice>
+        <StartPort>Eth487</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth154</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc05-ASIC00</StartDevice>
+        <StartPort>Eth485</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth158</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc05-ASIC00</StartDevice>
+        <StartPort>Eth486</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth163</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc05-ASIC00</StartDevice>
+        <StartPort>Eth484</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth164</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc05-ASIC00</StartDevice>
+        <StartPort>Eth479</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth167</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc05-ASIC00</StartDevice>
+        <StartPort>Eth476</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth169</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth494</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth172</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth492</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth173</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth487</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth177</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth485</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth182</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth486</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth184</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth479</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth187</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth476</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="BackendFabricLink">
+        <ElementType>BackendFabricLink</ElementType>
+        <Bandwidth>50000</Bandwidth>
+        <ChassisInternal>false</ChassisInternal>
+        <EndDevice>str-sonic-sup00-ASIC11</EndDevice>
+        <EndPort>Eth188</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06-ASIC00</StartDevice>
+        <StartPort>Eth484</StartPort>
+        <Validate>true</Validate>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="DeviceSerialLink">
+        <ElementType>DeviceSerialLink</ElementType>
+        <Bandwidth>9600</Bandwidth>
+        <ChassisInternal>true</ChassisInternal>
+        <EndDevice>str-console-197</EndDevice>
+        <EndPort>port 10</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-sup00</StartDevice>
+        <StartPort>console</StartPort>
+        <Validate>true</Validate>
+        <TcpPortName>10</TcpPortName>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="DeviceSerialLink">
+        <ElementType>DeviceSerialLink</ElementType>
+        <Bandwidth>9600</Bandwidth>
+        <ChassisInternal>true</ChassisInternal>
+        <EndDevice>str-sonic-sup00</EndDevice>
+        <EndPort>logical3</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc03</StartDevice>
+        <StartPort>logical</StartPort>
+        <Validate>true</Validate>
+        <TcpPortName>3</TcpPortName>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="DeviceSerialLink">
+        <ElementType>DeviceSerialLink</ElementType>
+        <Bandwidth>9600</Bandwidth>
+        <ChassisInternal>true</ChassisInternal>
+        <EndDevice>str-sonic-sup00</EndDevice>
+        <EndPort>logical4</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc04</StartDevice>
+        <StartPort>logical</StartPort>
+        <Validate>true</Validate>
+        <TcpPortName>4</TcpPortName>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="DeviceSerialLink">
+        <ElementType>DeviceSerialLink</ElementType>
+        <Bandwidth>9600</Bandwidth>
+        <ChassisInternal>true</ChassisInternal>
+        <EndDevice>str-sonic-sup00</EndDevice>
+        <EndPort>logical5</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc05</StartDevice>
+        <StartPort>logical</StartPort>
+        <Validate>true</Validate>
+        <TcpPortName>5</TcpPortName>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="DeviceSerialLink">
+        <ElementType>DeviceSerialLink</ElementType>
+        <Bandwidth>9600</Bandwidth>
+        <ChassisInternal>true</ChassisInternal>
+        <EndDevice>str-sonic-sup00</EndDevice>
+        <EndPort>logical6</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc06</StartDevice>
+        <StartPort>logical</StartPort>
+        <Validate>true</Validate>
+        <TcpPortName>6</TcpPortName>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="DeviceSerialLink">
+        <ElementType>DeviceSerialLink</ElementType>
+        <Bandwidth>9600</Bandwidth>
+        <ChassisInternal>true</ChassisInternal>
+        <EndDevice>str-sonic-sup00</EndDevice>
+        <EndPort>logical7</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc07</StartDevice>
+        <StartPort>logical</StartPort>
+        <Validate>true</Validate>
+        <TcpPortName>7</TcpPortName>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="DeviceSerialLink">
+        <ElementType>DeviceSerialLink</ElementType>
+        <Bandwidth>9600</Bandwidth>
+        <ChassisInternal>true</ChassisInternal>
+        <EndDevice>str-sonic-sup00</EndDevice>
+        <EndPort>logical8</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc08</StartDevice>
+        <StartPort>logical</StartPort>
+        <Validate>true</Validate>
+        <TcpPortName>8</TcpPortName>
+      </DeviceLinkBase>
+      <DeviceLinkBase i:type="DeviceSerialLink">
+        <ElementType>DeviceSerialLink</ElementType>
+        <Bandwidth>9600</Bandwidth>
+        <ChassisInternal>true</ChassisInternal>
+        <EndDevice>str-sonic-sup00</EndDevice>
+        <EndPort>logical10</EndPort>
+        <FlowControl>true</FlowControl>
+        <StartDevice>str-sonic-lc10</StartDevice>
+        <StartPort>logical</StartPort>
+        <Validate>true</Validate>
+        <TcpPortName>10</TcpPortName>
+      </DeviceLinkBase>
+    </DeviceInterfaceLinks>
+    <Devices>
+      <Device i:type="FabricAsic">
+        <ElementType>FabricAsic</ElementType>
+        <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+        </Address>
+        <AddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>::/0</a:IPPrefix>
+        </AddressV6>
+        <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
+        <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+        <AssociatedTagsStr/>
+        <ChassisInternalDevices/>
+        <ClusterName>TestbedForstr-sonic</ClusterName>
+        <DeploymentId>3</DeploymentId>
+        <DeviceLocation i:nil="true"/>
+        <HomeDatacenter>STARLab</HomeDatacenter>
+        <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+        </ManagementAddress>
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+        <SerialNumber i:nil="true"/>
+        <Hostname>str-sonic-sup00-ASIC00</Hostname>
+        <HwSku>Broadcom-Ramon</HwSku>
+      </Device>
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+        <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
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+          <a:IPPrefix>::/0</a:IPPrefix>
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+        <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
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+        <DeviceLocation i:nil="true"/>
+        <HomeDatacenter>STARLab</HomeDatacenter>
+        <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
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+        </ManagementAddress>
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+        <SerialNumber i:nil="true"/>
+        <Hostname>str-sonic-sup00-ASIC01</Hostname>
+        <HwSku>Broadcom-Ramon</HwSku>
+      </Device>
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+        <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
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+          <a:IPPrefix>::/0</a:IPPrefix>
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+        <ClusterName>TestbedForstr-sonic</ClusterName>
+        <DeploymentId>3</DeploymentId>
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+        <Hostname>str-sonic-sup00-ASIC02</Hostname>
+        <HwSku>Broadcom-Ramon</HwSku>
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+      <Device i:type="LinecardAsic">
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+        <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
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+          <a:IPPrefix>fc00:22::1/128</a:IPPrefix>
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+        <HomeDatacenter>STARLab</HomeDatacenter>
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+        <Hostname>str-sonic-lc05-ASIC00</Hostname>
+        <HwSku>Broadcom-Jericho2</HwSku>
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+        <HomeDatacenter>STARLab</HomeDatacenter>
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+        <Hostname>str-sonic-lc04-ASIC00</Hostname>
+        <HwSku>Broadcom-Jericho2</HwSku>
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+        <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
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+        <HomeDatacenter>STARLab</HomeDatacenter>
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+        <Hostname>str-sonic-lc03-ASIC00</Hostname>
+        <HwSku>Broadcom-Jericho2cplus</HwSku>
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+        <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
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+        <AddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>fc00:20::1/128</a:IPPrefix>
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+        <DeviceLocation i:nil="true"/>
+        <HomeDatacenter>STARLab</HomeDatacenter>
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+          <a:IPPrefix>::/0</a:IPPrefix>
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+        <Hostname>str-sonic-lc03-ASIC01</Hostname>
+        <HwSku>Broadcom-Jericho2cplus</HwSku>
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+      <Device i:type="LinecardAsic">
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+        <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
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+          <a:IPPrefix>::/0</a:IPPrefix>
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+        <HomeDatacenter>STARLab</HomeDatacenter>
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+        <Hostname>str-sonic-lc10-ASIC00</Hostname>
+        <HwSku>Broadcom-Jericho2</HwSku>
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+        <HomeDatacenter>STARLab</HomeDatacenter>
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+        <HomeDatacenter>STARLab</HomeDatacenter>
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+        <Hostname>str-sonic-lc08-ASIC00</Hostname>
+        <HwSku>Broadcom-Jericho2</HwSku>
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+        <HomeDatacenter>STARLab</HomeDatacenter>
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+        <HwSku>Broadcom-Jericho2</HwSku>
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+        <HomeDatacenter>STARLab</HomeDatacenter>
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+        <HwSku>Broadcom-Jericho2</HwSku>
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+        <HomeDatacenter>STARLab</HomeDatacenter>
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+        <HwSku>Broadcom-Ramon</HwSku>
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+        <HomeDatacenter>STARLab</HomeDatacenter>
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+        <HwSku>Broadcom-Ramon</HwSku>
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+        <ChassisInternalDevices/>
+        <ClusterName>TestbedForstr-sonic</ClusterName>
+        <DeploymentId>3</DeploymentId>
+        <DeviceLocation i:nil="true"/>
+        <HomeDatacenter>STARLab</HomeDatacenter>
+        <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+        </ManagementAddress>
+        <ManagementAddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>::/0</a:IPPrefix>
+        </ManagementAddressV6>
+        <NodeId i:nil="true"/>
+        <SerialNumber i:nil="true"/>
+        <Hostname>str-sonic-sup00-ASIC09</Hostname>
+        <HwSku>Broadcom-Ramon</HwSku>
+      </Device>
+      <Device i:type="FabricAsic">
+        <ElementType>FabricAsic</ElementType>
+        <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+        </Address>
+        <AddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>::/0</a:IPPrefix>
+        </AddressV6>
+        <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
+        <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+        <AssociatedTagsStr/>
+        <ChassisInternalDevices/>
+        <ClusterName>TestbedForstr-sonic</ClusterName>
+        <DeploymentId>3</DeploymentId>
+        <DeviceLocation i:nil="true"/>
+        <HomeDatacenter>STARLab</HomeDatacenter>
+        <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+        </ManagementAddress>
+        <ManagementAddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>::/0</a:IPPrefix>
+        </ManagementAddressV6>
+        <NodeId i:nil="true"/>
+        <SerialNumber i:nil="true"/>
+        <Hostname>str-sonic-sup00-ASIC10</Hostname>
+        <HwSku>Broadcom-Ramon</HwSku>
+      </Device>
+      <Device i:type="FabricAsic">
+        <ElementType>FabricAsic</ElementType>
+        <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+        </Address>
+        <AddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>::/0</a:IPPrefix>
+        </AddressV6>
+        <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
+        <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+        <AssociatedTagsStr/>
+        <ChassisInternalDevices/>
+        <ClusterName>TestbedForstr-sonic</ClusterName>
+        <DeploymentId>3</DeploymentId>
+        <DeviceLocation i:nil="true"/>
+        <HomeDatacenter>STARLab</HomeDatacenter>
+        <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+        </ManagementAddress>
+        <ManagementAddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>::/0</a:IPPrefix>
+        </ManagementAddressV6>
+        <NodeId i:nil="true"/>
+        <SerialNumber i:nil="true"/>
+        <Hostname>str-sonic-sup00-ASIC11</Hostname>
+        <HwSku>Broadcom-Ramon</HwSku>
+      </Device>
+      <Device i:type="Supervisor">
+        <ElementType>Supervisor</ElementType>
+        <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>10.152.0.46/32</a:IPPrefix>
+        </Address>
+        <AddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>2a01:111:e210:5e::/128</a:IPPrefix>
+        </AddressV6>
+        <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
+        <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+        <AssociatedTagsStr/>
+        <ChassisInternalDevices/>
+        <ClusterName>TestbedForstr-sonic</ClusterName>
+        <DeploymentId>3</DeploymentId>
+        <DeviceLocation i:nil="true"/>
+        <HomeDatacenter>STARLab</HomeDatacenter>
+        <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>10.3.146.111/24</a:IPPrefix>
+        </ManagementAddress>
+        <ManagementAddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>2a01:111:e210:3000::a03:926f/64</a:IPPrefix>
+        </ManagementAddressV6>
+        <NodeId i:nil="true"/>
+        <SerialNumber i:nil="true"/>
+        <Hostname>str-sonic-sup00</Hostname>
+        <HwSku>Sonic-supvisor-sku</HwSku>
+      </Device>
+      <Device i:type="ConsoleServer">
+        <ElementType>ConsoleServer</ElementType>
+        <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+        </Address>
+        <AddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>::/0</a:IPPrefix>
+        </AddressV6>
+        <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
+        <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+        <AssociatedTagsStr>None</AssociatedTagsStr>
+        <ChassisInternalDevices/>
+        <ClusterName>TestbedForstr-sonic</ClusterName>
+        <DeploymentId>3</DeploymentId>
+        <DeviceLocation i:nil="true"/>
+        <HomeDatacenter>STARLab</HomeDatacenter>
+        <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+        </ManagementAddress>
+        <ManagementAddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>::/0</a:IPPrefix>
+        </ManagementAddressV6>
+        <NodeId i:nil="true"/>
+        <SerialNumber i:nil="true"/>
+        <Hostname>str-console-197</Hostname>
+        <HwSku>Digi-CM48</HwSku>
+      </Device>
+      <Device i:type="Linecard">
+        <ElementType>Linecard</ElementType>
+        <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>10.2.0.1/32</a:IPPrefix>
+        </Address>
+        <AddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>fc00:20::1/128</a:IPPrefix>
+        </AddressV6>
+        <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
+        <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+        <AssociatedTagsStr/>
+        <ChassisInternalDevices/>
+        <ClusterName>TestbedForstr-sonic</ClusterName>
+        <DeploymentId>3</DeploymentId>
+        <DeviceLocation i:nil="true"/>
+        <HomeDatacenter>STARLab</HomeDatacenter>
+        <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>10.3.146.58/24</a:IPPrefix>
+        </ManagementAddress>
+        <ManagementAddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>2a01:111:e210:3000::a03:923a/64</a:IPPrefix>
+        </ManagementAddressV6>
+        <NodeId i:nil="true"/>
+        <SerialNumber i:nil="true"/>
+        <Hostname>str-sonic-lc03</Hostname>
+        <HwSku>Sonic-400G-sku</HwSku>
+      </Device>
+      <Device i:type="Linecard">
+        <ElementType>Linecard</ElementType>
+        <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>10.2.0.2/32</a:IPPrefix>
+        </Address>
+        <AddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>fc00:21::1/128</a:IPPrefix>
+        </AddressV6>
+        <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
+        <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+        <AssociatedTagsStr/>
+        <ChassisInternalDevices/>
+        <ClusterName>TestbedForstr-sonic</ClusterName>
+        <DeploymentId>3</DeploymentId>
+        <DeviceLocation i:nil="true"/>
+        <HomeDatacenter>STARLab</HomeDatacenter>
+        <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>10.3.146.71/24</a:IPPrefix>
+        </ManagementAddress>
+        <ManagementAddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>2a01:111:e210:3000::a03:9247/64</a:IPPrefix>
+        </ManagementAddressV6>
+        <NodeId i:nil="true"/>
+        <SerialNumber i:nil="true"/>
+        <Hostname>str-sonic-lc04</Hostname>
+        <HwSku>Sonic-100G-sku</HwSku>
+      </Device>
+      <Device i:type="Linecard">
+        <ElementType>Linecard</ElementType>
+        <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>10.2.0.3/32</a:IPPrefix>
+        </Address>
+        <AddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>fc00:22::1/128</a:IPPrefix>
+        </AddressV6>
+        <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
+        <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+        <AssociatedTagsStr/>
+        <ChassisInternalDevices/>
+        <ClusterName>TestbedForstr-sonic</ClusterName>
+        <DeploymentId>3</DeploymentId>
+        <DeviceLocation i:nil="true"/>
+        <HomeDatacenter>STARLab</HomeDatacenter>
+        <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>10.3.146.72/24</a:IPPrefix>
+        </ManagementAddress>
+        <ManagementAddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>2a01:111:e210:3000::a03:9248/64</a:IPPrefix>
+        </ManagementAddressV6>
+        <NodeId i:nil="true"/>
+        <SerialNumber i:nil="true"/>
+        <Hostname>str-sonic-lc05</Hostname>
+        <HwSku>Sonic-100G-sku</HwSku>
+      </Device>
+      <Device i:type="Linecard">
+        <ElementType>Linecard</ElementType>
+        <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>10.2.0.4/32</a:IPPrefix>
+        </Address>
+        <AddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>fc00:23::1/128</a:IPPrefix>
+        </AddressV6>
+        <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
+        <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+        <AssociatedTagsStr/>
+        <ChassisInternalDevices/>
+        <ClusterName>TestbedForstr-sonic</ClusterName>
+        <DeploymentId>3</DeploymentId>
+        <DeviceLocation i:nil="true"/>
+        <HomeDatacenter>STARLab</HomeDatacenter>
+        <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>10.3.146.74/24</a:IPPrefix>
+        </ManagementAddress>
+        <ManagementAddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>2a01:111:e210:3000::a03:924a/64</a:IPPrefix>
+        </ManagementAddressV6>
+        <NodeId i:nil="true"/>
+        <SerialNumber i:nil="true"/>
+        <Hostname>str-sonic-lc06</Hostname>
+        <HwSku>Sonic-100G-sku</HwSku>
+      </Device>
+      <Device i:type="Linecard">
+        <ElementType>Linecard</ElementType>
+        <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+        </Address>
+        <AddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>::/0</a:IPPrefix>
+        </AddressV6>
+        <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
+        <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+        <AssociatedTagsStr/>
+        <ChassisInternalDevices/>
+        <ClusterName>TestbedForstr-sonic</ClusterName>
+        <DeploymentId>3</DeploymentId>
+        <DeviceLocation i:nil="true"/>
+        <HomeDatacenter>STARLab</HomeDatacenter>
+        <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+        </ManagementAddress>
+        <ManagementAddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>::/0</a:IPPrefix>
+        </ManagementAddressV6>
+        <NodeId i:nil="true"/>
+        <SerialNumber i:nil="true"/>
+        <Hostname>str-sonic-lc07</Hostname>
+        <HwSku>Sonic-100G-sku</HwSku>
+      </Device>
+      <Device i:type="Linecard">
+        <ElementType>Linecard</ElementType>
+        <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+        </Address>
+        <AddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>::/0</a:IPPrefix>
+        </AddressV6>
+        <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
+        <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+        <AssociatedTagsStr/>
+        <ChassisInternalDevices/>
+        <ClusterName>TestbedForstr-sonic</ClusterName>
+        <DeploymentId>3</DeploymentId>
+        <DeviceLocation i:nil="true"/>
+        <HomeDatacenter>STARLab</HomeDatacenter>
+        <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+        </ManagementAddress>
+        <ManagementAddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>::/0</a:IPPrefix>
+        </ManagementAddressV6>
+        <NodeId i:nil="true"/>
+        <SerialNumber i:nil="true"/>
+        <Hostname>str-sonic-lc08</Hostname>
+        <HwSku>Sonic-100G-sku</HwSku>
+      </Device>
+      <Device i:type="Linecard">
+        <ElementType>Linecard</ElementType>
+        <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+        </Address>
+        <AddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>::/0</a:IPPrefix>
+        </AddressV6>
+        <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
+        <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+        <AssociatedTagsStr/>
+        <ChassisInternalDevices/>
+        <ClusterName>TestbedForstr-sonic</ClusterName>
+        <DeploymentId>3</DeploymentId>
+        <DeviceLocation i:nil="true"/>
+        <HomeDatacenter>STARLab</HomeDatacenter>
+        <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>0.0.0.0/0</a:IPPrefix>
+        </ManagementAddress>
+        <ManagementAddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>::/0</a:IPPrefix>
+        </ManagementAddressV6>
+        <NodeId i:nil="true"/>
+        <SerialNumber i:nil="true"/>
+        <Hostname>str-sonic-lc10</Hostname>
+        <HwSku>Sonic-100G-sku</HwSku>
+      </Device>
+      <Device i:type="SpineRouter">
+        <ElementType>SpineRouter</ElementType>
+        <Address xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>10.152.0.46/32</a:IPPrefix>
+        </Address>
+        <AddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>2a01:111:e210:5e::/128</a:IPPrefix>
+        </AddressV6>
+        <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
+        <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+        <AssociatedTagsStr>None</AssociatedTagsStr>
+        <ChassisInternalDevices/>
+        <ClusterName>TestbedForstr-sonic</ClusterName>
+        <DeploymentId>3</DeploymentId>
+        <DeviceLocation i:nil="true"/>
+        <HomeDatacenter>STARLab</HomeDatacenter>
+        <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>10.3.146.111/24</a:IPPrefix>
+        </ManagementAddress>
+        <ManagementAddressV6 xmlns:a="Microsoft.Search.Autopilot.NetMux">
+          <a:IPPrefix>2a01:111:e210:3000::a03:926f/64</a:IPPrefix>
+        </ManagementAddressV6>
+        <NodeId i:nil="true"/>
+        <SerialNumber i:nil="true"/>
+        <Hostname>str-sonic</Hostname>
+        <HwSku>Sonic-T2-sku</HwSku>
+        <Index>0</Index>
+      </Device>
+    </Devices>
+  </PngDec>
+  <Hostname>str-sonic-sup00</Hostname>
+  <HwSku>Sonic-supvisor-sku</HwSku>
+  <Version>1.0.1388.35297&#xD;
+</Version>
+</DeviceMiniGraph>
diff --git a/src/sonic-config-engine/tests/test_chassis_cfggen.py b/src/sonic-config-engine/tests/test_chassis_cfggen.py
new file mode 100644
index 000000000..b4cd571bd
--- /dev/null
+++ b/src/sonic-config-engine/tests/test_chassis_cfggen.py
@@ -0,0 +1,1159 @@
+import json
+import os
+import subprocess
+import yaml
+import tests.common_utils as utils
+
+from unittest import TestCase
+from sonic_py_common.general import getstatusoutput_noshell
+
+
+class TestChassis(TestCase):
+
+    def setUp(self):
+        self.yang = utils.YangWrapper()
+        self.test_dir = os.path.dirname(os.path.realpath(__file__))
+        self.script_file = [utils.PYTHON_INTERPRETTER,
+                            os.path.join(self.test_dir, '..', 'sonic-cfggen')]
+        self.output_file = os.path.join(self.test_dir, 'output')
+        self.macsec_profile = os.path.join(
+            self.test_dir, 'macsec_profile.json')
+
+    def run_script(self, argument, check_stderr=True, output_file=None, validateYang=True, ignore_warning=False):
+        print('\n    Running sonic-cfggen ' + ' '.join(argument))
+        # if validateYang:
+        # self.assertTrue(self.yang.validate(argument))
+        if check_stderr:
+            output = subprocess.check_output(
+                self.script_file + argument, stderr=subprocess.STDOUT)
+        else:
+            output = subprocess.check_output(self.script_file + argument)
+
+        if utils.PY3x:
+            output = output.decode()
+        if output_file:
+            with open(output_file, 'w') as f:
+                f.write(output)
+
+        if ignore_warning:
+            output_without_warning = []
+            for line in output.split('\n'):
+                if line.startswith("Warning"):
+                    continue
+                output_without_warning.append(line)
+            output = '\n'.join(output_without_warning)
+            
+        linecount = output.strip().count('\n')
+        if linecount <= 0:
+            print('    Output: ' + output.strip())
+        else:
+            print('    Output: ({0} lines, {1} bytes)'.format(
+                linecount + 1, len(output)))
+        
+        return output
+
+    def run_diff(self, file1, file2):
+        _, output = getstatusoutput_noshell(['diff', '-u', file1, file2])
+        return output
+
+
+class TestVoqChassisSingleAsic(TestChassis):
+    def setUp(self):
+        super().setUp()
+        self.test_data_dir = os.path.join(
+            self.test_dir,  'chassis_data/voq_chassis_data')
+        self.sample_graph = os.path.join(
+            self.test_data_dir, 'voq_chassis_lc_single_asic.xml')
+        self.sample_port_config = os.path.join(
+            self.test_data_dir, 'voq-sample-port-config-1.ini')
+        os.environ['CFGGEN_UNIT_TESTING'] = '2'
+
+    def test_dummy_run(self):
+        argument = []
+        output = self.run_script(argument)
+        self.assertEqual(output, '')
+
+    def test_print_data(self):
+        argument = ['-m', self.sample_graph, '-p',
+                    self.sample_port_config, '--print-data']
+        output = self.run_script(argument)
+        self.assertGreater(len(output.strip()), 0)
+
+    def test_read_yaml(self):
+        argument = ['-v', 'yml_item', '-y',
+                    os.path.join(self.test_dir, 'test.yml')]
+        output = yaml.safe_load(self.run_script(argument))
+        self.assertListEqual(output, ['value1', 'value2'])
+
+    def test_render_template(self):
+        argument = ['-y', os.path.join(self.test_dir, 'test.yml'),
+                    '-t', os.path.join(self.test_dir, 'test.j2')]
+        output = self.run_script(argument)
+        self.assertEqual(output.strip(), 'value1\nvalue2')
+
+    def test_tacacs(self):
+        argument = ['-m', self.sample_graph, '-p',
+                    self.sample_port_config, '--var-json', 'TACPLUS_SERVER']
+        output = json.loads(self.run_script(argument))
+        self.assertDictEqual(
+            output, {'123.46.98.21': {'priority': '1', 'tcp_port': '49'}})
+        # TACPLUS_SERVER not present in the asic configuration.
+        argument = ['-m', self.sample_graph, '--var-json', 'TACPLUS_SERVER']
+
+    def test_ntp(self):
+        argument = ['-m', self.sample_graph, '-p',
+                    self.sample_port_config, '--var-json', 'NTP_SERVER']
+        output = json.loads(self.run_script(argument))
+        self.assertDictEqual(output, {'17.39.1.130': {}, '17.39.1.129': {}})
+        # NTP data is present only in the host config
+        argument = ['-m', self.sample_graph, '--var-json', 'NTP_SERVER']
+
+    def test_mgmt_port(self):
+        argument = ['-m', self.sample_graph, '-p',
+                    self.sample_port_config, '--var-json', 'MGMT_PORT']
+        output = json.loads(self.run_script(argument))
+        self.assertDictEqual(
+            output, {'eth0': {'alias': 'Management1/1', 'admin_status': 'up'}})
+
+    def test_device_metadata(self):
+        argument = ['-m', self.sample_graph, '-p',
+                    self.sample_port_config, '--var-json', 'DEVICE_METADATA']
+        output = json.loads(self.run_script(argument))
+        print(output['localhost'])
+        self.assertDictEqual(output['localhost'], {
+            'bgp_asn': '65100',
+            'region': 'test',
+            'cloudtype': None,
+            'docker_routing_config_mode': 'separated',
+            'hostname': 'str-sonic-lc06',
+            'hwsku': 'Sonic-lc-100g-sku',
+            'type': 'SpineRouter',
+            'synchronous_mode': 'enable',
+            'yang_config_validation': 'disable',
+            'chassis_hostname': 'str-sonic',
+            'deployment_id': '3',
+            'cluster': 'TestbedForstr-sonic',
+            'asic_name': 'Asic0',
+            'sub_role': 'FrontEnd',
+            'switch_type': 'voq',
+            'switch_id': 20,
+            'max_cores': 64})
+
+    def test_port(self):
+        argument = ['-m', self.sample_graph, '-p',
+                    self.sample_port_config, '-v', "PORT[\'Ethernet0\']"]
+        output = self.run_script(argument)
+        print(output)
+        self.assertEqual(
+            utils.to_dict(output.strip()),
+            utils.to_dict("{'lanes': '6,7',\
+                'alias': 'Ethernet6/1/1',\
+                'index': '1',\
+                'role': 'Ext',\
+                'speed': '100000', \
+                'asic_port_name': 'Eth0',\
+                'core_id': '0', \
+                'core_port_id': '1',\
+                'num_voq': '8', \
+                'fec': 'rs', \
+                'description': 'ARISTA33T1:Ethernet1',\
+                'mtu': '9100',\
+                'tpid': '0x8100',\
+                'pfc_asym': 'off',\
+                'admin_status': 'up'\
+            }")
+        )
+
+    def test_voq_inband_intf(self):
+        argument = ['-m', self.sample_graph, '-p',
+                    self.sample_port_config, '--var-json', 'VOQ_INBAND_INTERFACE']
+        output = self.run_script(argument)
+        print(output)
+        self.assertEqual(
+            utils.to_dict(output.strip()),
+            utils.to_dict("{'Ethernet-IB0': {'inband_type': 'Port'},\
+                'Ethernet-IB0|10.241.88.4/32': {},\
+                'Ethernet-IB0|2a01:111:e210:5e:0:a:f158:400/128': {}}"))
+
+    def test_system_port(self):
+        argument = ['-m', self.sample_graph, '-p',
+                    self.sample_port_config, '--var-json', 'SYSTEM_PORT']
+        expected_output_file = os.path.join(
+            self.test_data_dir, 'system_ports.json')
+        self.run_script(argument, output_file=self.output_file)
+        self.assertTrue(self.run_diff(expected_output_file, self.output_file))
+        if os.path.exists(self.output_file):
+            os.remove(self.output_file)
+
+    def test_device_neighbor(self):
+        argument = ['-m', self.sample_graph, '-p',
+                    self.sample_port_config, '--var-json', 'DEVICE_NEIGHBOR']
+        output = self.run_script(argument)
+        print(output)
+        self.assertEqual(
+            utils.to_dict(output.strip()),
+            utils.to_dict("{'Ethernet0': {'name': 'ARISTA33T1', 'port':'Ethernet1'},\
+                            'Ethernet4': {'name': 'ARISTA33T1', 'port':'Ethernet2'},\
+                            'Ethernet8': {'name': 'ARISTA35T1', 'port':'Ethernet1'},\
+                            'Ethernet12': {'name': 'ARISTA35T1', 'port':'Ethernet2'},\
+                            'Ethernet16': {'name': 'ARISTA37T1', 'port':'Ethernet1'},\
+                            'Ethernet20': {'name': 'ARISTA37T1', 'port':'Ethernet2'},\
+                            'Ethernet24': {'name': 'ARISTA39T1', 'port':'Ethernet1'},\
+                            'Ethernet28': {'name': 'ARISTA39T1', 'port':'Ethernet2'},\
+                            'Ethernet32': {'name': 'ARISTA41T1', 'port':'Ethernet1'},\
+                            'Ethernet36': {'name': 'ARISTA41T1', 'port':'Ethernet2'},\
+                            'Ethernet40': {'name': 'ARISTA43T1', 'port':'Ethernet1'},\
+                            'Ethernet44': {'name': 'ARISTA43T1', 'port':'Ethernet2'},\
+                            'Ethernet48': {'name': 'ARISTA45T1', 'port':'Ethernet1'},\
+                            'Ethernet52': {'name': 'ARISTA47T1', 'port':'Ethernet1'},\
+                            'Ethernet56': {'name': 'ARISTA47T1', 'port':'Ethernet2'},\
+                            'Ethernet60': {'name': 'ARISTA49T1', 'port':'Ethernet1'},\
+                            'Ethernet64': {'name': 'ARISTA50T1', 'port':'Ethernet1'},\
+                            'Ethernet68': {'name': 'ARISTA50T1', 'port':'Ethernet2'},\
+                            'Ethernet72': {'name': 'ARISTA51T1', 'port':'Ethernet1'},\
+                            'Ethernet76': {'name': 'ARISTA52T1', 'port':'Ethernet1'},\
+                            'Ethernet80': {'name': 'ARISTA53T1', 'port':'Ethernet1'},\
+                            'Ethernet84': {'name': 'ARISTA54T1', 'port':'Ethernet1'},\
+                            'Ethernet88': {'name': 'ARISTA55T1', 'port':'Ethernet1'},\
+                            'Ethernet92': {'name': 'ARISTA56T1', 'port':'Ethernet1'},\
+                            'Ethernet96': {'name': 'ARISTA57T1', 'port':'Ethernet1'},\
+                            'Ethernet100': {'name': 'ARISTA58T1', 'port':'Ethernet1'},\
+                            'Ethernet104': {'name': 'ARISTA59T1', 'port':'Ethernet1'},\
+                            'Ethernet108': {'name': 'ARISTA60T1', 'port':'Ethernet1'},\
+                            'Ethernet112': {'name': 'ARISTA61T1', 'port':'Ethernet1'},\
+                            'Ethernet116': {'name': 'ARISTA62T1', 'port':'Ethernet1'},\
+                            'Ethernet120': {'name': 'ARISTA63T1', 'port':'Ethernet1'},\
+                            'Ethernet124': {'name': 'ARISTA64T1', 'port': 'Ethernet1'}}"))
+
+    def test_device_neighbor_metadata(self):
+        argument = ['-m', self.sample_graph, '-p',
+                    self.sample_port_config, '-v', "DEVICE_NEIGHBOR_METADATA[\'ARISTA33T1\']"]
+        output = self.run_script(argument)
+        print(output)
+        self.assertEqual(
+            utils.to_dict(output.strip()),
+            utils.to_dict("{'hwsku': 'Sonic-T1-sku',\
+                'cluster': 'TestbedForstr-sonic',\
+                'deployment_id': '3',\
+                'lo_addr': '0.0.0.0/0',\
+                'lo_addr_v6': '::/0',\
+                'mgmt_addr': '172.16.191.58/17',\
+                'mgmt_addr_v6': '::/0',\
+                'type': 'LeafRouter'}"))
+
+    def test_bgp_neighbors(self):
+        argument = ['-m', self.sample_graph, '-p',
+                    self.sample_port_config, '-v', 'BGP_NEIGHBOR']
+        output = self.run_script(argument)
+        print(output)
+        self.assertEqual(
+            utils.to_dict(output.strip()),
+            utils.to_dict("{'10.0.0.129': {'name': 'ARISTA33T1', 'local_addr': '10.0.0.128', 'rrclient': 0, 'holdtime': '10', 'keepalive': '3', 'nhopself': 0, 'asn': '65338'},\
+                'fc00::102': {'name': 'ARISTA33T1', 'local_addr': 'fc00::101', 'rrclient': 0, 'holdtime': '10', 'keepalive': '3', 'nhopself': 0, 'asn': '65338'},\
+                '10.0.0.133': {'name': 'ARISTA35T1', 'local_addr': '10.0.0.132', 'rrclient': 0, 'holdtime': '10', 'keepalive': '3', 'nhopself': 0, 'asn': '65339'},\
+                'fc00::10a': {'name': 'ARISTA35T1', 'local_addr': 'fc00::109', 'rrclient': 0, 'holdtime': '10', 'keepalive': '3', 'nhopself': 0, 'asn': '65339'},\
+                '10.0.0.137': {'name': 'ARISTA37T1', 'local_addr': '10.0.0.136', 'rrclient': 0, 'holdtime': '10', 'keepalive': '3', 'nhopself': 0, 'asn': '65340'},\
+                'fc00::112': {'name': 'ARISTA37T1', 'local_addr': 'fc00::111', 'rrclient': 0, 'holdtime': '10', 'keepalive': '3', 'nhopself': 0, 'asn': '65340'},\
+                '10.0.0.141': {'name': 'ARISTA39T1', 'local_addr': '10.0.0.140', 'rrclient': 0, 'holdtime': '10', 'keepalive': '3', 'nhopself': 0, 'asn': '65341'},\
+                'fc00::11a': {'name': 'ARISTA39T1', 'local_addr': 'fc00::119', 'rrclient': 0, 'holdtime': '10', 'keepalive': '3', 'nhopself': 0, 'asn': '65341'},\
+                '10.0.0.145': {'name': 'ARISTA41T1', 'local_addr': '10.0.0.144', 'rrclient': 0, 'holdtime': '10', 'keepalive': '3', 'nhopself': 0, 'asn': '65342'},\
+                'fc00::122': {'name': 'ARISTA41T1', 'local_addr': 'fc00::121', 'rrclient': 0, 'holdtime': '10', 'keepalive': '3', 'nhopself': 0, 'asn': '65342'},\
+                '10.0.0.149': {'name': 'ARISTA43T1', 'local_addr': '10.0.0.148', 'rrclient': 0, 'holdtime': '10', 'keepalive': '3', 'nhopself': 0, 'asn': '65343'},\
+                'fc00::12a': {'name': 'ARISTA43T1', 'local_addr': 'fc00::129', 'rrclient': 0, 'holdtime': '10', 'keepalive': '3', 'nhopself': 0, 'asn': '65343'},\
+                '10.0.0.153': {'name': 'ARISTA47T1', 'local_addr': '10.0.0.152', 'rrclient': 0, 'holdtime': '10', 'keepalive': '3', 'nhopself': 0, 'asn': '65345'},\
+                'fc00::132': {'name': 'ARISTA47T1', 'local_addr': 'fc00::131', 'rrclient': 0, 'holdtime': '10', 'keepalive': '3', 'nhopself': 0, 'asn': '65345'},\
+                '10.0.0.157': {'name': 'ARISTA50T1', 'local_addr': '10.0.0.156', 'rrclient': 0, 'holdtime': '10', 'keepalive': '3', 'nhopself': 0, 'asn': '65347'},\
+                'fc00::13a': {'name': 'ARISTA50T1', 'local_addr': 'fc00::139', 'rrclient': 0, 'holdtime': '10', 'keepalive': '3', 'nhopself': 0, 'asn': '65347'}}"))
+
+    def test_voq_bgp_neighbors(self):
+        argument = ['-m', self.sample_graph, '-p',
+                    self.sample_port_config, '-v', 'BGP_VOQ_CHASSIS_NEIGHBOR']
+        output = self.run_script(argument)
+        print(output)
+        self.assertEqual(
+            utils.to_dict(output.strip()),
+            utils.to_dict(
+                "{'10.241.88.5': {'name': 'str-sonic-lc07-ASIC00', 'local_addr': '10.241.88.4', 'rrclient': 0, 'holdtime': '0', 'keepalive': '0', 'nhopself': 0, 'admin_status': 'up', 'asn': '65100'}, "
+                "'2a01:111:e210:5e:0:a:f158:500': {'name': 'str-sonic-lc07-ASIC00', 'local_addr': '2a01:111:e210:5e:0:a:f158:400', 'rrclient': 0, 'holdtime': '0', 'keepalive': '0', 'nhopself': 0, 'admin_status': 'up', 'asn': '65100'}, "
+                "'10.241.88.6': {'name': 'str-sonic-lc08-ASIC00', 'local_addr': '10.241.88.4', 'rrclient': 0, 'holdtime': '0', 'keepalive': '0', 'nhopself': 0, 'admin_status': 'up', 'asn': '65100'}, "
+                "'2a01:111:e210:5e:0:a:f158:600': {'name': 'str-sonic-lc08-ASIC00', 'local_addr': '2a01:111:e210:5e:0:a:f158:400', 'rrclient': 0, 'holdtime': '0', 'keepalive': '0', 'nhopself': 0, 'admin_status': 'up', 'asn': '65100'}, "
+                "'10.241.88.7': {'name': 'str-sonic-lc09-ASIC00', 'local_addr': '10.241.88.4', 'rrclient': 0, 'holdtime': '0', 'keepalive': '0', 'nhopself': 0, 'admin_status': 'up', 'asn': '65100'}, "
+                "'2a01:111:e210:5e:0:a:f158:700': {'name': 'str-sonic-lc09-ASIC00', 'local_addr': '2a01:111:e210:5e:0:a:f158:400', 'rrclient': 0, 'holdtime': '0', 'keepalive': '0', 'nhopself': 0, 'admin_status': 'up', 'asn': '65100'}, "
+                "'10.241.88.8': {'name': 'str-sonic-lc10-ASIC00', 'local_addr': '10.241.88.4', 'rrclient': 0, 'holdtime': '0', 'keepalive': '0', 'nhopself': 0, 'admin_status': 'up', 'asn': '65100'}, "
+                "'2a01:111:e210:5e:0:a:f158:800': {'name': 'str-sonic-lc10-ASIC00', 'local_addr': '2a01:111:e210:5e:0:a:f158:400', 'rrclient': 0, 'holdtime': '0', 'keepalive': '0', 'nhopself': 0, 'admin_status': 'up', 'asn': '65100'}, "
+                "'10.241.88.0': {'name': 'str-sonic-lc03-ASIC00', 'local_addr': '10.241.88.4', 'rrclient': 0, 'holdtime': '0', 'keepalive': '0', 'nhopself': 0, 'admin_status': 'up', 'asn': '65100'}, "
+                "'2a01:111:e210:5e:0:a:f158:0': {'name': 'str-sonic-lc03-ASIC00', 'local_addr': '2a01:111:e210:5e:0:a:f158:400', 'rrclient': 0, 'holdtime': '0', 'keepalive': '0', 'nhopself': 0, 'admin_status': 'up', 'asn': '65100'}, "
+                "'10.241.88.1': {'name': 'str-sonic-lc03-ASIC01', 'local_addr': '10.241.88.4', 'rrclient': 0, 'holdtime': '0', 'keepalive': '0', 'nhopself': 0, 'admin_status': 'up', 'asn': '65100'}, "
+                "'2a01:111:e210:5e:0:a:f158:100': {'name': 'str-sonic-lc03-ASIC01', 'local_addr': '2a01:111:e210:5e:0:a:f158:400', 'rrclient': 0, 'holdtime': '0', 'keepalive': '0', 'nhopself': 0, 'admin_status': 'up', 'asn': '65100'}, "
+                "'10.241.88.2': {'name': 'str-sonic-lc04-ASIC00', 'local_addr': '10.241.88.4', 'rrclient': 0, 'holdtime': '0', 'keepalive': '0', 'nhopself': 0, 'admin_status': 'up', 'asn': '65100'}, "
+                "'2a01:111:e210:5e:0:a:f158:200': {'name': 'str-sonic-lc04-ASIC00', 'local_addr': '2a01:111:e210:5e:0:a:f158:400', 'rrclient': 0, 'holdtime': '0', 'keepalive': '0', 'nhopself': 0, 'admin_status': 'up', 'asn': '65100'}, "
+                "'10.241.88.3': {'name': 'str-sonic-lc05-ASIC00', 'local_addr': '10.241.88.4', 'rrclient': 0, 'holdtime': '0', 'keepalive': '0', 'nhopself': 0, 'admin_status': 'up', 'asn': '65100'}, "
+                "'2a01:111:e210:5e:0:a:f158:300': {'name': 'str-sonic-lc05-ASIC00', 'local_addr': '2a01:111:e210:5e:0:a:f158:400', 'rrclient': 0, 'holdtime': '0', 'keepalive': '0', 'nhopself': 0, 'admin_status': 'up', 'asn': '65100'}}")
+        )
+
+    def test_port_channel(self):
+        argument = ['-m', self.sample_graph, '-p',
+                    self.sample_port_config, '-v', "PORTCHANNEL[\'PortChannel1058\']"]
+        output = self.run_script(argument)
+        print(output)
+        self.assertEqual(
+            utils.to_dict(output.strip()),
+            utils.to_dict("{'min_links': '2', 'lacp_key': 'auto', 'mtu': '9100', 'tpid': '0x8100', 'admin_status': 'up'}"))
+
+    def test_port_channel_member(self):
+        argument = ['-m', self.sample_graph, '-p',
+                    self.sample_port_config, '-v', "PORTCHANNEL_MEMBER.keys()|list"]
+        output = self.run_script(argument)
+        print(output)
+        self.assertEqual(
+            utils.liststr_to_dict(output.strip()),
+            utils.liststr_to_dict("[('PortChannel1049', 'Ethernet0'),\
+                ('PortChannel1049', 'Ethernet4'),\
+                ('PortChannel1050', 'Ethernet8'),\
+                ('PortChannel1050', 'Ethernet12'),\
+                ('PortChannel1051', 'Ethernet16'),\
+                ('PortChannel1051', 'Ethernet20'),\
+                ('PortChannel1052', 'Ethernet24'),\
+                ('PortChannel1052', 'Ethernet28'),\
+                ('PortChannel1053', 'Ethernet36'),\
+                ('PortChannel1053', 'Ethernet32'),\
+                ('PortChannel1054', 'Ethernet40'),\
+                ('PortChannel1054', 'Ethernet44'),\
+                ('PortChannel1056', 'Ethernet52'),\
+                ('PortChannel1056', 'Ethernet56'),\
+                ('PortChannel1058', 'Ethernet64'),\
+                ('PortChannel1058', 'Ethernet68')]")
+        )
+
+    def test_port_channel_interface(self):
+        argument = ['-m', self.sample_graph, '-p',
+                    self.sample_port_config, '-v', "PORTCHANNEL_INTERFACE.keys()|list"]
+        output = self.run_script(argument)
+        print(output)
+        self.assertEqual(
+            utils.liststr_to_dict(output.strip()),
+            utils.liststr_to_dict("\
+                [('PortChannel1049', '10.0.0.128/31'),\
+                'PortChannel1049',\
+                ('PortChannel1049', 'fc00::101/126'),\
+                ('PortChannel1050', '10.0.0.132/31'),\
+                'PortChannel1050',\
+                ('PortChannel1050', 'fc00::109/126'),\
+                ('PortChannel1051', '10.0.0.136/31'),\
+                'PortChannel1051',\
+                ('PortChannel1051', 'fc00::111/126'),\
+                ('PortChannel1052', '10.0.0.140/31'),\
+                'PortChannel1052',\
+                ('PortChannel1052', 'fc00::119/126'),\
+                ('PortChannel1053', '10.0.0.144/31'),\
+                'PortChannel1053',\
+                ('PortChannel1053', 'fc00::121/126'),\
+                ('PortChannel1054', '10.0.0.148/31'),\
+                'PortChannel1054',\
+                ('PortChannel1054', 'fc00::129/126'),\
+                ('PortChannel1056', '10.0.0.152/31'),\
+                'PortChannel1056',\
+                ('PortChannel1056', 'fc00::131/126'),\
+                ('PortChannel1058', '10.0.0.156/31'),\
+                'PortChannel1058',\
+                ('PortChannel1058', 'fc00::139/126')\
+                ]")
+        )
+
+    def tearDown(self):
+        os.environ['CFGGEN_UNIT_TESTING'] = ''
+        if os.path.exists(self.output_file):
+            os.remove(self.output_file)
+
+
+class TestVoqChassisMultiAsic(TestChassis):
+
+    def setUp(self):
+        super().setUp()
+        self.test_data_dir = os.path.join(
+            self.test_dir,  'chassis_data/voq_chassis_data')
+        self.sample_graph = os.path.join(
+            self.test_data_dir, 'voq_chassis_lc_multi_asic.xml')
+        self.sample_port_config = os.path.join(
+            self.test_data_dir, 'voq-sample-port-config-2.ini')
+        os.environ['CFGGEN_UNIT_TESTING'] = '2'
+        os.environ["CFGGEN_UNIT_TESTING_TOPOLOGY"] = "multi_asic"
+
+    def test_dummy_run(self):
+        argument = []
+        output = self.run_script(argument)
+        self.assertEqual(output, '')
+
+    def test_print_data(self):
+        argument = ['-m', self.sample_graph, '-p',
+                    self.sample_port_config, '--print-data']
+        output = self.run_script(argument)
+        self.assertGreater(len(output.strip()), 0)
+
+    def test_read_yaml(self):
+        argument = ['-v', 'yml_item', '-y',
+                    os.path.join(self.test_dir, 'test.yml')]
+        output = yaml.safe_load(self.run_script(argument))
+        self.assertListEqual(output, ['value1', 'value2'])
+
+    def test_render_template(self):
+        argument = ['-y', os.path.join(self.test_dir, 'test.yml'),
+                    '-t', os.path.join(self.test_dir, 'test.j2')]
+        output = self.run_script(argument)
+        self.assertEqual(output.strip(), 'value1\nvalue2')
+
+    def test_tacacs(self):
+        argument = ['-m', self.sample_graph, '-p',
+                    self.sample_port_config, '--var-json', 'TACPLUS_SERVER']
+        output = json.loads(self.run_script(argument))
+        self.assertDictEqual(
+            output, {'123.46.98.21': {'priority': '1', 'tcp_port': '49'}})
+        # TACPLUS_SERVER not present in the asic configuration.
+        argument = ['-m', self.sample_graph, '--var-json', 'TACPLUS_SERVER']
+
+    def test_ntp(self):
+        argument = ['-m', self.sample_graph, '-p',
+                    self.sample_port_config, '--var-json', 'NTP_SERVER']
+        output = json.loads(self.run_script(argument))
+        self.assertDictEqual(output, {'17.39.1.130': {}, '17.39.1.129': {}})
+        # NTP data is present only in the host config
+        argument = ['-m', self.sample_graph, '--var-json', 'NTP_SERVER']
+
+    def test_mgmt_port(self):
+        argument = ['-m', self.sample_graph, '-p',
+                    self.sample_port_config, '--var-json', 'MGMT_PORT']
+        output = json.loads(self.run_script(argument))
+        self.assertDictEqual(
+            output, {'eth0': {'alias': 'Management1/1', 'admin_status': 'up'}})
+
+    def test_device_metadata(self):
+        argument = ['-m', self.sample_graph, '-p',
+                    self.sample_port_config, '--var-json', 'DEVICE_METADATA']
+        output = json.loads(self.run_script(argument))
+        print(output['localhost'])
+        self.assertDictEqual(output['localhost'], {
+            'bgp_asn': None,
+            'region': 'test',
+            'cloudtype': 'Public',
+            'docker_routing_config_mode': 'separated',
+            'hostname': 'str-sonic-lc03',
+            'hwsku': 'Sonic-400g-lc-sku',
+            'type': 'SpineRouter',
+            'synchronous_mode': 'enable',
+            'yang_config_validation': 'disable',
+            'chassis_hostname': 'str-sonic',
+            'deployment_id': '3',
+            'cluster': 'TestbedForstr-sonic',
+            'switch_type': 'voq',
+            'max_cores': 64})
+
+    def test_device_metadata_for_namespace(self):
+        argument = [
+            '-m', self.sample_graph,
+            '-p', self.sample_port_config,
+            '-n', 'asic0',
+            '--var-json', 'DEVICE_METADATA'
+        ]
+        output = json.loads(self.run_script(argument))
+        print(output['localhost'])
+        self.assertDictEqual(output['localhost'], {
+            'bgp_asn': '65100',
+            'region': 'test',
+            'cloudtype': None,
+            'docker_routing_config_mode': 'separated',
+            'hostname': 'str-sonic-lc03',
+            'hwsku': 'Sonic-400g-lc-sku',
+            'type': 'SpineRouter',
+            'synchronous_mode': 'enable',
+            'yang_config_validation': 'disable',
+            'chassis_hostname': 'str-sonic',
+            'deployment_id': '3', 'cluster':
+            'TestbedForstr-sonic',
+            'sub_role': 'FrontEnd',
+            'asic_name': 'asic0',
+            'switch_type': 'voq',
+            'switch_id': 8,
+            'max_cores': 64})
+
+    def test_system_port(self):
+        argument = ['-m', self.sample_graph,
+                    '-p', self.sample_port_config,
+                    '-n', 'asic0',
+                    '--var-json', 'DEVICE_METADATA']
+        expected_output_file = os.path.join(
+            self.test_data_dir, 'system_ports.json')
+        self.run_script(argument, output_file=self.output_file)
+        self.assertTrue(self.run_diff(expected_output_file, self.output_file))
+        if os.path.exists(self.output_file):
+            os.remove(self.output_file)
+
+    def test_port(self):
+        argument = [
+            '-j', self.macsec_profile,
+            '-m', self.sample_graph,
+            '-p', self.sample_port_config,
+            '-n', 'asic0',
+            '-v', "PORT[\'Ethernet8\']"
+        ]
+        output = self.run_script(argument)
+        print(output)
+        self.assertEqual(
+            utils.to_dict(output.strip()),
+            utils.to_dict("{"
+                          "'lanes': '80,81,82,83', "
+                          "'alias': 'Ethernet3/2/1', "
+                          "'index': '2', "
+                          "'role': 'Ext', "
+                          "'speed': '100000', "
+                          "'asic_port_name': 'Eth8', "
+                          "'core_id': '1', "
+                          "'core_port_id': '2', "
+                          "'num_voq': '8', "
+                          "'fec': 'rs', "
+                          "'macsec': 'macsec-profile-two', "
+                          "'tx_power': '-10', "
+                          "'laser_freq': 196025, "
+                          "'description': 'ARISTA91T3:Ethernet2', "
+                          "'mtu': '9100', "
+                          "'tpid': '0x8100', "
+                          "'pfc_asym': 'off', "
+                          "'admin_status': 'up'"
+                          "}"
+                          )
+        )
+
+    def test_voq_inband_intf(self):
+        argument = [
+            '-j', self.macsec_profile,
+            '-m', self.sample_graph,
+            '-p', self.sample_port_config,
+            '-n', 'asic1',
+            '--var-json', 'VOQ_INBAND_INTERFACE'
+        ]
+        output = self.run_script(argument)
+        print(output)
+        self.assertEqual(
+            utils.to_dict(output.strip()),
+            utils.to_dict("{'Ethernet-IB1': {'inband_type': 'Port'},\
+                'Ethernet-IB1|10.241.88.1/32': {},\
+                'Ethernet-IB1|2a01:111:e210:5e:0:a:f158:100/128': {}}"))
+
+    def test_voq_bgp_neighbors(self):
+        argument = [
+            '-m', self.sample_graph,
+            '-p', self.sample_port_config,
+            '-n', 'asic0',
+            '--var-json', 'BGP_VOQ_CHASSIS_NEIGHBOR'
+        ]
+        output = json.loads(self.run_script(argument))
+        print(output)
+        self.assertDictEqual(output,
+            {
+                "10.241.88.1": {
+                    "name": "str-sonic-lc03-ASIC01",
+                    "local_addr": "10.241.88.0",
+                    "rrclient": 0,
+                    "holdtime": "0",
+                    "keepalive": "0",
+                    "nhopself": 0,
+                    "admin_status": "up",
+                    "asn": "65100"
+                },
+                "2a01:111:e210:5e:0:a:f158:100": {
+                    "name": "str-sonic-lc03-ASIC01",
+                    "local_addr": "2a01:111:e210:5e:0:a:f158:0",
+                    "rrclient": 0,
+                    "holdtime": "0",
+                    "keepalive": "0",
+                    "nhopself": 0,
+                    "admin_status": "up",
+                    "asn": "65100"
+                },
+                "10.241.88.2": {
+                    "name": "str-sonic-lc04-ASIC00",
+                    "local_addr": "10.241.88.0",
+                    "rrclient": 0,
+                    "holdtime": "0",
+                    "keepalive": "0",
+                    "nhopself": 0,
+                    "admin_status": "up",
+                    "asn": "65100"
+                },
+                "2a01:111:e210:5e:0:a:f158:200": {
+                    "name": "str-sonic-lc04-ASIC00",
+                    "local_addr": "2a01:111:e210:5e:0:a:f158:0",
+                    "rrclient": 0,
+                    "holdtime": "0",
+                    "keepalive": "0",
+                    "nhopself": 0,
+                    "admin_status": "up",
+                    "asn": "65100"
+                },
+                "10.241.88.3": {
+                    "name": "str-sonic-lc05-ASIC00",
+                    "local_addr": "10.241.88.0",
+                    "rrclient": 0,
+                    "holdtime": "0",
+                    "keepalive": "0",
+                    "nhopself": 0,
+                    "admin_status": "up",
+                    "asn": "65100"
+                },
+                "2a01:111:e210:5e:0:a:f158:300": {
+                    "name": "str-sonic-lc05-ASIC00",
+                    "local_addr": "2a01:111:e210:5e:0:a:f158:0",
+                    "rrclient": 0,
+                    "holdtime": "0",
+                    "keepalive": "0",
+                    "nhopself": 0,
+                    "admin_status": "up",
+                    "asn": "65100"
+                },
+                "10.241.88.4": {
+                    "name": "str-sonic-lc06-ASIC00",
+                    "local_addr": "10.241.88.0",
+                    "rrclient": 0,
+                    "holdtime": "0",
+                    "keepalive": "0",
+                    "nhopself": 0,
+                    "admin_status": "up",
+                    "asn": "65100"
+                },
+                "2a01:111:e210:5e:0:a:f158:400": {
+                    "name": "str-sonic-lc06-ASIC00",
+                    "local_addr": "2a01:111:e210:5e:0:a:f158:0",
+                    "rrclient": 0,
+                    "holdtime": "0",
+                    "keepalive": "0",
+                    "nhopself": 0,
+                    "admin_status": "up",
+                    "asn": "65100"
+                },
+                "10.241.88.5": {
+                    "name": "str-sonic-lc07-ASIC00",
+                    "local_addr": "10.241.88.0",
+                    "rrclient": 0,
+                    "holdtime": "0",
+                    "keepalive": "0",
+                    "nhopself": 0,
+                    "admin_status": "up",
+                    "asn": "65100"
+                },
+                "2a01:111:e210:5e:0:a:f158:500": {
+                    "name": "str-sonic-lc07-ASIC00",
+                    "local_addr": "2a01:111:e210:5e:0:a:f158:0",
+                    "rrclient": 0,
+                    "holdtime": "0",
+                    "keepalive": "0",
+                    "nhopself": 0,
+                    "admin_status": "up",
+                    "asn": "65100"
+                },
+                "10.241.88.6": {
+                    "name": "str-sonic-lc08-ASIC00",
+                    "local_addr": "10.241.88.0",
+                    "rrclient": 0,
+                    "holdtime": "0",
+                    "keepalive": "0",
+                    "nhopself": 0,
+                    "admin_status": "up",
+                    "asn": "65100"
+                },
+                "2a01:111:e210:5e:0:a:f158:600": {
+                    "name": "str-sonic-lc08-ASIC00",
+                    "local_addr": "2a01:111:e210:5e:0:a:f158:0",
+                    "rrclient": 0,
+                    "holdtime": "0",
+                    "keepalive": "0",
+                    "nhopself": 0,
+                    "admin_status": "up",
+                    "asn": "65100"
+                },
+                "10.241.88.7": {
+                    "name": "str-sonic-lc09-ASIC00",
+                    "local_addr": "10.241.88.0",
+                    "rrclient": 0,
+                    "holdtime": "0",
+                    "keepalive": "0",
+                    "nhopself": 0,
+                    "admin_status": "up",
+                    "asn": "65100"
+                },
+                "2a01:111:e210:5e:0:a:f158:700": {
+                    "name": "str-sonic-lc09-ASIC00",
+                    "local_addr": "2a01:111:e210:5e:0:a:f158:0",
+                    "rrclient": 0,
+                    "holdtime": "0",
+                    "keepalive": "0",
+                    "nhopself": 0,
+                    "admin_status": "up",
+                    "asn": "65100"
+                },
+                "10.241.88.8": {
+                    "name": "str-sonic-lc10-ASIC00",
+                    "local_addr": "10.241.88.0",
+                    "rrclient": 0,
+                    "holdtime": "0",
+                    "keepalive": "0",
+                    "nhopself": 0,
+                    "admin_status": "up",
+                    "asn": "65100"
+                },
+                "2a01:111:e210:5e:0:a:f158:800": {
+                    "name": "str-sonic-lc10-ASIC00",
+                    "local_addr": "2a01:111:e210:5e:0:a:f158:0",
+                    "rrclient": 0,
+                    "holdtime": "0",
+                    "keepalive": "0",
+                    "nhopself": 0,
+                    "admin_status": "up",
+                    "asn": "65100"
+                }
+            })
+
+
+    def test_device_neighbor(self):
+        argument = [
+            '-m', self.sample_graph, 
+            '-p', self.sample_port_config,
+            '-n', 'asic0',
+            '-v', "DEVICE_NEIGHBOR[\'Ethernet0\']"]
+        
+        output = self.run_script(argument)
+        print(output)
+        self.assertEqual(
+            utils.to_dict(output.strip()),
+            utils.to_dict("{'name': 'ARISTA91T3', 'port': 'Ethernet1'}"))
+
+    def test_device_neighbor_metadata(self):
+        argument = [
+            '-m', self.sample_graph, 
+            '-p', self.sample_port_config,
+            '-n', 'asic0',
+            '-v', "DEVICE_NEIGHBOR_METADATA['ARISTA91T3']"
+        ]
+        output = self.run_script(argument)
+        print(output)
+        self.assertEqual(
+            utils.to_dict(output.strip()),
+            utils.to_dict(
+                "{'hwsku': 'Sonic-T3-sku', 'cluster': 'TestbedForstr-sonic', "
+                "'deployment_id': '3', 'lo_addr': '0.0.0.0/0', "
+                "'lo_addr_v6': '::/0', 'mgmt_addr': '172.16.191.10/17', "
+                "'mgmt_addr_v6': '::/0', 'type': 'RegionalHub'}"
+            )
+        )
+
+    def test_port_channel(self):
+        argument = [
+            '-m', self.sample_graph, 
+            '-p', self.sample_port_config,
+            '-n', 'asic0',
+            '-v', "PORTCHANNEL[\'PortChannel102\']"
+        ]
+        output = self.run_script(argument)
+        print(output)
+        self.assertEqual(
+            utils.to_dict(output.strip()),
+            utils.to_dict("{'min_links': '2', 'lacp_key': 'auto', 'mtu': '9100', 'tpid': '0x8100', 'admin_status': 'up'}"))
+
+    def test_port_channel_member(self):
+        argument = [
+            '-m', self.sample_graph, 
+            '-p', self.sample_port_config,
+            '-n', 'asic0',
+            '-v', "PORTCHANNEL_MEMBER.keys()|list"
+        ]
+        output = self.run_script(argument)
+        print(output)
+        self.assertEqual(
+            utils.liststr_to_dict(output.strip()),
+            utils.liststr_to_dict("[('PortChannel102', 'Ethernet0'),\
+                ('PortChannel102', 'Ethernet8'),\
+                ('PortChannel104', 'Ethernet16'),\
+                ('PortChannel104', 'Ethernet24'),\
+                ('PortChannel106', 'Ethernet32'),\
+                ('PortChannel106', 'Ethernet40'),\
+                ('PortChannel108', 'Ethernet48'),\
+                ('PortChannel108', 'Ethernet56'),\
+                ('PortChannel1010', 'Ethernet72'),\
+                ('PortChannel1010', 'Ethernet64'),\
+                ('PortChannel1012', 'Ethernet80'),\
+                ('PortChannel1012', 'Ethernet88'),\
+                ('PortChannel1016', 'Ethernet104'),\
+                ('PortChannel1016', 'Ethernet112'),\
+                ('PortChannel1020', 'Ethernet128'),\
+                ('PortChannel1020', 'Ethernet136')]")
+        )
+
+    def test_port_channel_interface(self):
+        argument = [
+            '-m', self.sample_graph, 
+            '-p', self.sample_port_config,
+            '-n', 'asic0',
+            '-v', "PORTCHANNEL_INTERFACE.keys()|list"
+            ]
+        output = self.run_script(argument)
+        print(output)
+        self.assertEqual(
+            utils.liststr_to_dict(output.strip()),
+            utils.liststr_to_dict("[('PortChannel102', '10.0.0.0/31'),\
+                'PortChannel102',\
+                ('PortChannel102', 'fc00::1/126'),\
+                ('PortChannel104', '10.0.0.4/31'),\
+                'PortChannel104',\
+                ('PortChannel104', 'fc00::9/126'),\
+                ('PortChannel106', '10.0.0.8/31'),\
+                'PortChannel106',\
+                ('PortChannel106','fc00::11/126'),\
+                ('PortChannel108', '10.0.0.12/31'),\
+                'PortChannel108',\
+                ('PortChannel108', 'fc00::19/126'),\
+                ('PortChannel1010', '10.0.0.16/31'),\
+                'PortChannel1010',\
+                ('PortChannel1010', 'fc00::21/126'),\
+                ('PortChannel1012', '10.0.0.20/31'),\
+                'PortChannel1012',\
+                ('PortChannel1012', 'fc00::29/126'),\
+                ('PortChannel1016', '10.0.0.28/31'),\
+                'PortChannel1016', \
+                ('PortChannel1016', 'fc00::39/126'),\
+                ('PortChannel1020', '10.0.0.24/31'),\
+                'PortChannel1020',\
+                ('PortChannel1020', 'fc00::31/126')]")
+        )
+    def tearDown(self):
+        os.environ['CFGGEN_UNIT_TESTING'] = ''
+        os.environ["CFGGEN_UNIT_TESTING_TOPOLOGY"] = ""
+        if os.path.exists(self.output_file):
+            os.remove(self.output_file)
+
+
+class TestVoqChassisSup(TestChassis):
+
+    def setUp(self):
+        super().setUp()
+        self.test_data_dir = os.path.join(
+            self.test_dir,  'chassis_data/voq_chassis_data')
+        self.sample_graph = os.path.join(
+            self.test_data_dir, 'voq_chassis_sup.xml')
+        self.sample_port_config = ""
+        os.environ['CFGGEN_UNIT_TESTING'] = '2'
+        os.environ["CFGGEN_UNIT_TESTING_TOPOLOGY"] = "multi_asic"
+
+    def test_dummy_run(self):
+        argument = []
+        output = self.run_script(argument)
+        self.assertEqual(output, '')
+
+    def test_print_data(self):
+        argument = [
+            '-m', self.sample_graph, 
+            '-p', self.sample_port_config,
+            '--print-data'
+        ]
+        output = self.run_script(argument)
+        self.assertGreater(len(output.strip()), 0)
+
+    def test_read_yaml(self):
+        argument = ['-v', 'yml_item', '-y',
+                    os.path.join(self.test_dir, 'test.yml')]
+        output = yaml.safe_load(self.run_script(argument))
+        self.assertListEqual(output, ['value1', 'value2'])
+
+    def test_render_template(self):
+        argument = ['-y', os.path.join(self.test_dir, 'test.yml'),
+                    '-t', os.path.join(self.test_dir, 'test.j2')]
+        output = self.run_script(argument)
+        self.assertEqual(output.strip(), 'value1\nvalue2')
+
+    def test_tacacs(self):
+        argument = [
+            '-m', self.sample_graph,
+            '-p', self.sample_port_config,
+            '--var-json', 'TACPLUS_SERVER'
+        ]
+        output = json.loads(self.run_script(argument))
+        self.assertDictEqual(
+            output, {'123.46.98.21': {'priority': '1', 'tcp_port': '49'}})
+
+    def test_ntp(self):
+        argument = [
+            '-m', self.sample_graph,
+            '-p', self.sample_port_config,
+            '--var-json', 'NTP_SERVER'
+        ]
+        output = json.loads(self.run_script(argument))
+        self.assertDictEqual(output, {'17.39.1.130': {}, '17.39.1.129': {}})
+
+
+    def test_mgmt_port(self):
+        argument = [
+            '-m', self.sample_graph,
+            '-p', self.sample_port_config,
+            '--var-json', 'MGMT_PORT'
+        ]
+        output = json.loads(self.run_script(argument))
+        self.assertDictEqual(
+            output, {'eth0': {'alias': 'Management1/1', 'admin_status': 'up'}})
+
+    def test_device_metadata(self):
+        argument = [
+            '-m', self.sample_graph,
+            '-p', self.sample_port_config,
+            '--var-json', 'DEVICE_METADATA'
+        ]
+        out =(self.run_script(argument))
+        print(out)
+        output = json.loads(out)
+        print(output['localhost'])
+        self.assertDictEqual(output['localhost'], 
+            {
+                "bgp_asn": None,
+                "region": "test",
+                "cloudtype": "Public",
+                "docker_routing_config_mode": "separated",
+                "hostname": "str-sonic-sup00",
+                "hwsku": "Sonic-supvisor-sku",
+                "type": "SpineRouter",
+                "synchronous_mode": "enable",
+                "yang_config_validation": "disable",
+                "chassis_hostname": "str-sonic",
+                "deployment_id": "3",
+                "cluster": "TestbedForstr-sonic",
+                "switch_type": "fabric",
+                "sub_role": "fabric",
+                "max_cores": 64
+            }
+        )
+
+    def test_device_metadata_for_namespace(self):
+        argument = [
+            '-m', self.sample_graph,
+            '-n', 'asic0',
+            '--var-json', 'DEVICE_METADATA'
+        ]
+        output = json.loads(self.run_script(argument))
+        print(output['localhost'])
+        self.assertDictEqual(output['localhost'], 
+            {
+                "bgp_asn": None,
+                "region": "test",
+                "cloudtype": None,
+                "docker_routing_config_mode": "separated",
+                "hostname": "str-sonic-sup00",
+                "hwsku": "Sonic-supvisor-sku",
+                "type": "SpineRouter",
+                "synchronous_mode": "enable",
+                "yang_config_validation": "disable",
+                "chassis_hostname": "str-sonic",
+                "deployment_id": "3",
+                "cluster": "TestbedForstr-sonic",
+                "sub_role": "Fabric",
+                "asic_name": "asic0",
+                "switch_type": "fabric",
+                "max_cores": 64
+            }
+        )
+
+    
+    def tearDown(self):
+        os.environ['CFGGEN_UNIT_TESTING'] = ''
+        os.environ['CFGGEN_UNIT_TESTING_TOPOLOGY'] = ''
+        if os.path.exists(self.output_file):
+            os.remove(self.output_file)
+
+
+class TestPacketChassisSup(TestChassis):
+
+    def setUp(self):
+        super().setUp()
+        self.test_data_dir = os.path.join(
+            self.test_dir,  'chassis_data/packet_chassis_data')
+        self.sample_graph = os.path.join(
+            self.test_data_dir, 'packet_chassis_sup.xml')
+        self.sample_port_config = os.path.join(
+            self.test_data_dir, 'packet-chassis-port-config-1.ini')
+        os.environ['CFGGEN_UNIT_TESTING'] = '2'
+        os.environ["CFGGEN_UNIT_TESTING_TOPOLOGY"] = "multi_asic"
+
+    def test_dummy_run(self):
+        argument = []
+        output = self.run_script(argument)
+        self.assertEqual(output, '')
+
+    def test_print_data(self):
+        argument = [
+            '-m', self.sample_graph, 
+            '-p', self.sample_port_config,    
+            '--print-data']
+        output = self.run_script(argument)
+        self.assertGreater(len(output.strip()), 0)
+
+    def test_read_yaml(self):
+        argument = ['-v', 'yml_item', '-y',
+                    os.path.join(self.test_dir, 'test.yml')]
+        output = yaml.safe_load(self.run_script(argument))
+        self.assertListEqual(output, ['value1', 'value2'])
+
+    def test_render_template(self):
+        argument = ['-y', os.path.join(self.test_dir, 'test.yml'),
+                    '-t', os.path.join(self.test_dir, 'test.j2')]
+        output = self.run_script(argument)
+        self.assertEqual(output.strip(), 'value1\nvalue2')
+
+    def test_tacacs(self):
+        argument = [
+            '-m', self.sample_graph,
+            '-p', self.sample_port_config,
+            '--var-json', 'TACPLUS_SERVER'
+        ]
+        output = json.loads(self.run_script(argument))
+        self.assertDictEqual(
+            output, {'123.46.98.21': {'priority': '1', 'tcp_port': '49'}})
+        # TACPLUS_SERVER not present in the asic configuration.
+        argument = ['-m', self.sample_graph, '--var-json', 'TACPLUS_SERVER']
+
+    def test_ntp(self):
+        argument = [
+            '-m', self.sample_graph,
+            '-p', self.sample_port_config,
+            '--var-json', 'NTP_SERVER'
+        ]
+        output = json.loads(self.run_script(argument))
+        self.assertDictEqual(output, {'17.39.1.130': {}, '17.39.1.129': {}})
+        # NTP data is present only in the host config
+        argument = ['-m', self.sample_graph, '--var-json', 'NTP_SERVER']
+
+    def test_mgmt_port(self):
+        argument = [
+            '-m', self.sample_graph,
+            '-p', self.sample_port_config, 
+            '--var-json', 'MGMT_PORT'
+        ]
+        output = json.loads(self.run_script(argument))
+        self.assertDictEqual(
+            output, {'eth0': {'alias': 'Management1/1', 'admin_status': 'up'}})
+
+    def test_device_metadata(self):
+        argument = [
+            '-m', self.sample_graph,
+            '-p', self.sample_port_config,
+            '--var-json', 'DEVICE_METADATA'
+        ]
+        output = json.loads(self.run_script(argument))
+        print(output['localhost'])
+        self.assertDictEqual(output['localhost'], 
+            {
+                "bgp_asn": None,
+                "region": "test",
+                "cloudtype": "Public",
+                "docker_routing_config_mode": "separated",
+                "hostname": "str-sonic-sup00",
+                "hwsku": "sonic-sup-sku",
+                "type": "SpineRouter",
+                "synchronous_mode": "enable",
+                "yang_config_validation": "disable",
+                "chassis_hostname": "str-sonic",
+                "deployment_id": "3",
+                "cluster": "TestbedForstr-sonic",
+                "switch_type": "chassis-packet",
+                "sub_role": "BackEnd",
+                "max_cores": 64
+            }
+        )
+
+    def test_device_metadata_for_namespace(self):
+        argument = [
+            '-m', self.sample_graph,
+            '-n', 'asic0',
+            '--var-json', 'DEVICE_METADATA'
+        ]
+        output = json.loads(self.run_script(argument))
+        print(output['localhost'])
+        self.assertDictEqual(output['localhost'], 
+            {
+                "bgp_asn": None,
+                "region": "test",
+                "cloudtype": None,
+                "docker_routing_config_mode": "separated",
+                "hostname": "str-sonic-sup00",
+                "hwsku": "sonic-sup-sku",
+                "type": "SpineRouter",
+                "synchronous_mode": "enable",
+                "yang_config_validation": "disable",
+                "chassis_hostname": "str-sonic",
+                "deployment_id": "3",
+                "cluster": "TestbedForstr-sonic",
+                "sub_role": "BackEnd",
+                "asic_name": "asic0",
+                "switch_type": "chassis-packet",
+                "max_cores": 64
+            }
+        )
+
+    def test_port(self):
+        argument = [
+            '-m', self.sample_graph,
+            '-p', self.sample_port_config,
+            '-n', 'asic0',
+            '-v', "PORT[\'Ethernet-BP244\']"
+        ]
+        output = self.run_script(argument, ignore_warning=True)
+        print(output)
+        self.assertEqual(
+           output.strip(),
+           "{'lanes': '2828,2829', 'alias': 'Eth244-ASIC0', 'index': '122', 'speed': '100000', 'asic_port_name': 'Eth244-ASIC0', 'role': 'Int', 'fec': 'rs', 'description': 'Eth244-ASIC0', 'mtu': '9100', 'tpid': '0x8100', 'pfc_asym': 'off', 'admin_status': 'up'}"
+        )
+
+    def test_port_channel(self):
+        argument = [
+            '-m', self.sample_graph, 
+            '-p', self.sample_port_config,
+            '-n', 'asic0',
+            '-v', "PORTCHANNEL[\'PortChannel5004\']"
+        ]
+        output = self.run_script(argument, ignore_warning=True)
+        print(output)
+        self.assertEqual(
+            output.strip(),
+            """{'min_links': '2', 'lacp_key': 'auto', 'mtu': '9100', 'tpid': '0x8100', 'admin_status': 'up'}""")
+    
+    def test_port_channel_member(self):
+        argument = [
+            '-m', self.sample_graph,
+            '-p', self.sample_port_config,
+            '-n', 'asic0',
+            '-v', "PORTCHANNEL_MEMBER.keys()|list"
+        ]
+        output = self.run_script(argument, ignore_warning=True)
+        print(output)
+        self.assertEqual(
+            utils.liststr_to_dict(output.strip()),
+            utils.liststr_to_dict(
+                "[('PortChannel5004', 'Ethernet-BP128'), "
+                "('PortChannel5004', 'Ethernet-BP132'), "
+                "('PortChannel5005', 'Ethernet-BP136'), "
+                "('PortChannel5005', 'Ethernet-BP140'), "
+                "('PortChannel5006', 'Ethernet-BP154'), "
+                "('PortChannel5006', 'Ethernet-BP168'), "
+                "('PortChannel5006', 'Ethernet-BP178'), "
+                "('PortChannel5007', 'Ethernet-BP156'), "
+                "('PortChannel5007', 'Ethernet-BP170'), "
+                "('PortChannel5007', 'Ethernet-BP180'), "
+                "('PortChannel5008', 'Ethernet-BP160'), "
+                "('PortChannel5008', 'Ethernet-BP164'), "
+                "('PortChannel5009', 'Ethernet-BP184'), "
+                "('PortChannel5009', 'Ethernet-BP194'), "
+                "('PortChannel5009', 'Ethernet-BP220'), "
+                "('PortChannel5010', 'Ethernet-BP190'), "
+                "('PortChannel5010', 'Ethernet-BP192'), "
+                "('PortChannel5010', 'Ethernet-BP218')]"
+            )
+        )
+
+    def tearDown(self):
+        os.environ['CFGGEN_UNIT_TESTING'] = ''
+        os.environ['CFGGEN_UNIT_TESTING_TOPOLOGY'] = ''
+        if os.path.exists(self.output_file):
+            os.remove(self.output_file)
\ No newline at end of file
diff --git a/src/sonic-config-engine/tests/test_multinpu_cfggen.py b/src/sonic-config-engine/tests/test_multinpu_cfggen.py
index 665f2b971..bba0adeae 100644
--- a/src/sonic-config-engine/tests/test_multinpu_cfggen.py
+++ b/src/sonic-config-engine/tests/test_multinpu_cfggen.py
@@ -7,6 +7,7 @@
 import unittest
 import yaml
 import tests.common_utils as utils
+from unittest import mock
 
 from unittest import TestCase
 from sonic_py_common.general import getstatusoutput_noshell
@@ -16,6 +17,7 @@
 else:
     import mock
 
+
 SKU = 'multi-npu-01'
 ASIC_SKU = 'multi-npu-asic'
 NUM_ASIC = 4
@@ -39,6 +41,7 @@ def setUp(self):
         self.sample_no_asic_port_config = os.path.join(self.test_data_dir, 'sample_port_config-4.ini')
         self.output_file = os.path.join(self.test_dir, 'output')
         os.environ["CFGGEN_UNIT_TESTING"] = "2"
+        os.environ["CFGGEN_UNIT_TESTING_TOPOLOGY"] = "multi_asic"
 
     def run_script(self, argument, check_stderr=True, output_file=None, validateYang=True):
         print('\n    Running sonic-cfggen ' + ' '.join(argument))
@@ -142,8 +145,8 @@ def test_metadata_tacacs(self):
         #TACPLUS_SERVER not present in the asic configuration.
         argument = ['-m', self.sample_graph, '--var-json', "TACPLUS_SERVER"]
         for asic in range(NUM_ASIC):
-            output = json.loads(self.run_script_for_asic(argument, asic, self.port_config[asic]))
-            self.assertDictEqual(output, {})
+            output = self.run_script_for_asic(argument, asic, self.port_config[asic])
+            self.assertEqual(output.strip(), '')
 
     def test_metadata_ntp(self):
         argument = ['-m', self.sample_graph, '-p', self.sample_port_config, '--var-json', "NTP_SERVER"]
@@ -152,9 +155,9 @@ def test_metadata_ntp(self):
         #NTP data is present only in the host config
         argument = ['-m', self.sample_graph, '--var-json', "NTP_SERVER"]
         for asic in range(NUM_ASIC):
-            output = json.loads(self.run_script_for_asic(argument, asic, self.port_config[asic]))
-            print("Log:asic{} sku {}".format(asic,output))
-            self.assertDictEqual(output, {})
+            output = self.run_script_for_asic(argument, asic, self.port_config[asic])
+            self.assertEqual(output.strip(), '')
+
 
     def test_mgmt_port(self):
         argument = ['-m', self.sample_graph, '-p', self.sample_port_config, '--var-json', "MGMT_PORT"]
@@ -174,12 +177,14 @@ def test_frontend_asic_portchannels(self):
                  'PortChannel4002': {'admin_status': 'up', 'min_links': '2', 'mtu': '9100', 'tpid': '0x8100', 'lacp_key': 'auto'}})
 
     def test_backend_asic_portchannels(self):
+
         argument = ["-m", self.sample_graph, "-p", self.port_config[3], "-n", "asic3", "--var-json", "PORTCHANNEL"]
         output = json.loads(self.run_script(argument))
         self.assertDictEqual(output, \
                 {'PortChannel4013': {'admin_status': 'up', 'min_links': '2', 'mtu': '9100', 'tpid': '0x8100', 'lacp_key': 'auto'},
-                 'PortChannel4014': {'admin_status': 'up', 'min_links': '2', 'mtu': '9100', 'tpid': '0x8100', 'lacp_key': 'auto'}})
+                'PortChannel4014': {'admin_status': 'up', 'min_links': '2', 'mtu': '9100', 'tpid': '0x8100', 'lacp_key': 'auto'}})
 
+        
     def test_frontend_asic_portchannel_mem(self):
         argument = ["-m", self.sample_graph, "-p", self.port_config[0], "-n", "asic0", "-v", "PORTCHANNEL_MEMBER.keys()|list"]
         output = self.run_script(argument)
@@ -293,6 +298,8 @@ def test_backend_asic_device_neigh(self):
             'Ethernet-BP392': {'name': 'ASIC1', 'port': 'Eth6-ASIC1'},
             'Ethernet-BP388': {'name': 'ASIC0', 'port': 'Eth7-ASIC0'}})
 
+
+    #@mock.patch("sonic_py_common.multi_asic.is_multi_asic", mock.MagicMock(return_value=True))
     def test_backend_device_neigh_metadata(self):
         argument = ["-m", self.sample_graph, "-p", self.port_config[3], "-n", "asic3", "--var-json", "DEVICE_NEIGHBOR_METADATA"]
         output = json.loads(self.run_script(argument))
@@ -575,3 +582,4 @@ def test_no_asic_in_graph(self):
 
     def tearDown(self):
         os.environ["CFGGEN_UNIT_TESTING"] = ""
+        os.environ["CFGGEN_UNIT_TESTING_TOPOLOGY"] = ""

From a55bb32f743256c01275174553f3a7fb3ced5094 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Wed, 29 May 2024 16:02:33 +0800
Subject: [PATCH 0665/1115] [submodule] Update submodule sonic-mgmt-common to
 the latest HEAD automatically (#19119)

#### Why I did it
src/sonic-mgmt-common
```
* 8b18795 - (HEAD -> master, origin/master, origin/HEAD) fix for the nil check in the subscribe request (#141) (6 hours ago) [Balachandar Mani]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-mgmt-common | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-mgmt-common b/src/sonic-mgmt-common
index 1e1274415..8b1879532 160000
--- a/src/sonic-mgmt-common
+++ b/src/sonic-mgmt-common
@@ -1 +1 @@
-Subproject commit 1e127441522a2fab99fc5d102853baed209131d4
+Subproject commit 8b18795325b2b47f8863ab9497fa844501a2f08c

From b385b1b4b4333583801fa75f484f1b92f03d9ffc Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Wed, 29 May 2024 16:02:38 +0800
Subject: [PATCH 0666/1115] [submodule] Update submodule sonic-host-services to
 the latest HEAD automatically (#19118)

#### Why I did it
src/sonic-host-services
```
* 36e410d - (HEAD -> master, origin/master, origin/HEAD) Made Global and ASIC Scope Handling only for multi-asic only. (#130) (5 hours ago) [abdosi]
* fd638d4 - Added support to render Feature Table has_global_scope field. (#120) (7 days ago) [abdosi]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-host-services | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-host-services b/src/sonic-host-services
index 246f2d2e6..36e410d24 160000
--- a/src/sonic-host-services
+++ b/src/sonic-host-services
@@ -1 +1 @@
-Subproject commit 246f2d2e629947c1f77a9caa8fd6bfd0725b1a77
+Subproject commit 36e410d24e66ab717c3c83e95630436cc6efb729

From c198057fad0caed1a908c775842a33cb4911c7f4 Mon Sep 17 00:00:00 2001
From: Junchao-Mellanox <57339448+Junchao-Mellanox@users.noreply.github.com>
Date: Wed, 29 May 2024 18:30:36 +0800
Subject: [PATCH 0667/1115] [Mellanox] enlarge the eeprom ready timeout from 20
 to 60 (#18983)

- Why I did it
Service like ZTP accesses EEPROM very early at the boot stage. It could cause an issue that EEPROM is not ready. The PR enlarge EEPROM ready timeout from 20s to 60s.

- How I did it
Enlarge EEPROM ready timeout from 20s to 60s.

- How to verify it
Manual test
---
 platform/mellanox/mlnx-platform-api/sonic_platform/eeprom.py | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/eeprom.py b/platform/mellanox/mlnx-platform-api/sonic_platform/eeprom.py
index b273afb9c..8bf632de2 100644
--- a/platform/mellanox/mlnx-platform-api/sonic_platform/eeprom.py
+++ b/platform/mellanox/mlnx-platform-api/sonic_platform/eeprom.py
@@ -52,7 +52,7 @@
             os.makedirs(os.path.dirname(EEPROM_SYMLINK))
         subprocess.check_call(['/usr/bin/xxd', '-r', '-p', 'syseeprom.hex', EEPROM_SYMLINK], cwd=platform_path)
 
-WAIT_EEPROM_READY_SEC = 20
+WAIT_EEPROM_READY_SEC = 60
 
 
 class Eeprom(eeprom_tlvinfo.TlvInfoDecoder):

From 180d5f9cb272bc15fb6513783e77ebfedfb51477 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Wed, 29 May 2024 19:01:01 +0800
Subject: [PATCH 0668/1115] [submodule] Update submodule sonic-swss to the
 latest HEAD automatically (#19120)

#### Why I did it
src/sonic-swss
```
* 835e576d - (HEAD -> master, origin/master, origin/HEAD) [tests] mark suppress-fib-pending VS test as expected to fail (6 hours ago) [Stepan Blyshchak]
* 353ab92c - [subnet_decap] Add subnet decap (#3117) (10 hours ago) [Longxiang Lyu]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-swss | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-swss b/src/sonic-swss
index 3ee73618d..835e576db 160000
--- a/src/sonic-swss
+++ b/src/sonic-swss
@@ -1 +1 @@
-Subproject commit 3ee73618d41052ff24234a34e75551f12b5ba940
+Subproject commit 835e576dbaca4391277002f1856db629f91d783f

From 5d43adb3648ab6c0c43d0fbfdd997039a58f8f5a Mon Sep 17 00:00:00 2001
From: Philo <135693886+philo-micas@users.noreply.github.com>
Date: Thu, 30 May 2024 00:49:20 +0800
Subject: [PATCH 0669/1115] [Micas]: Add new centec platform m2-w6010 (#16088)

Why I did it
Add new platform m2-w6010(Centec)
ASIC Vendor: Centec
Switch ASIC: Centec
Port Config: 48x1G+4x10G

Work item tracking
Microsoft ADO (number only):
How I did it
Provide device and platform related files.

How to verify it
show platform fan
show platform ssdhealth
show platform psustatus
show platform summary
show platform syseeprom
show platform temperature
show interface status

Signed-off-by: philo <philo@micasnetworks.com>
---
 .../M2-w6010-48gt4x-fa-board.json             |  868 ++++++++
 .../M2-w6010-48gt4x-fa-p-chip-profile.txt     |   96 +
 .../M2-w6010-48gt4x-fa-p-datapath.txt         |  281 +++
 .../M2-W6010-48GT4X-FA/default_sku            |    1 +
 .../M2-W6010-48GT4X-FA/phy_mapping.cfg        |  198 ++
 .../M2-W6010-48GT4X-FA/platform_asic          |    1 +
 .../M2-W6010-48GT4X-FA/port_config.ini        |   53 +
 .../M2-W6010-48GT4X-FA/sai.profile            |    4 +
 .../M2-W6010-48GT4X-FA/start_up.cfg           |   48 +
 .../default_sku                               |    1 +
 .../installer.conf                            |    9 +
 .../platform.json                             |  173 ++
 .../platform_asic                             |    1 +
 .../plugins/sfputil.py                        |  428 ++++
 .../plugins/ssd_util.py                       |  112 +
 .../pmon_daemon_control.json                  |    7 +
 .../system_health_monitoring_config.json      |    0
 .../M2-w6010-48gt4x-ra-board.json             |  868 ++++++++
 .../M2-w6010-48gt4x-ra-p-chip-profile.txt     |   96 +
 .../M2-w6010-48gt4x-ra-p-datapath.txt         |  281 +++
 .../M2-W6010-48GT4X-RA/default_sku            |    1 +
 .../M2-W6010-48GT4X-RA/phy_mapping.cfg        |  198 ++
 .../M2-W6010-48GT4X-RA/platform_asic          |    1 +
 .../M2-W6010-48GT4X-RA/port_config.ini        |   53 +
 .../M2-W6010-48GT4X-RA/sai.profile            |    4 +
 .../M2-W6010-48GT4X-RA/start_up.cfg           |   48 +
 .../default_sku                               |    1 +
 .../installer.conf                            |    9 +
 .../platform.json                             |  173 ++
 .../platform_asic                             |    1 +
 .../plugins/sfputil.py                        |  428 ++++
 .../plugins/ssd_util.py                       |  112 +
 .../pmon_daemon_control.json                  |    7 +
 .../system_health_monitoring_config.json      |    0
 .../centec-arm64/platform-modules-micas.dep   |    9 +
 .../centec-arm64/platform-modules-micas.mk    |    9 +
 .../sonic-platform-modules-micas/LICENSE      |   15 +
 .../sonic-platform-modules-micas/README.md    |    1 +
 .../common/Makefile                           |   49 +
 .../common/app/Makefile                       |   26 +
 .../common/lib/eepromutil/__init__.py         |    0
 .../common/lib/eepromutil/fantlv.py           |  210 ++
 .../common/lib/eepromutil/fru.py              |  957 ++++++++
 .../common/lib/wbutil/__init__.py             |    0
 .../common/lib/wbutil/baseutil.py             |   23 +
 .../common/lib/wbutil/logutil.py              |   67 +
 .../common/lib/wbutil/smbus.py                |  774 +++++++
 .../common/modules/COPYING                    |   20 +
 .../common/modules/GPL-2.0                    |  359 +++
 .../common/modules/Makefile                   |   23 +
 .../common/modules/dfd_tlveeprom.c            |  521 +++++
 .../common/modules/dfd_tlveeprom.h            |  121 ++
 .../common/modules/platform.h                 |  155 ++
 .../common/modules/platform_common_module.c   |  210 ++
 .../common/modules/wb_platform.c              |   79 +
 .../common/script/device_i2c.py               |  283 +++
 .../common/script/fancontrol.py               |  495 +++++
 .../common/script/interface.py                |   77 +
 .../common/script/platform_common.py          | 1303 +++++++++++
 .../common/script/platform_config.py          |  196 ++
 .../common/script/platform_sensors.py         |   92 +
 .../common/script/platform_util.py            | 1934 +++++++++++++++++
 .../common/script/sensors                     |    8 +
 .../common/service/device_i2c.service         |   15 +
 .../common/service/fancontrol.service         |   12 +
 .../common_custom/common_micas/Makefile       |   24 +
 .../common_micas/lib/logutil/__init__.py      |    0
 .../common_micas/lib/logutil/logutil.py       |   64 +
 .../lib/redfishutil/redfish_api.py            |  304 +++
 .../common_micas/lib/sonic_fwmgr/__init__.py  |    0
 .../lib/sonic_fwmgr/fwgmr_base.py             |  141 ++
 .../common_micas/lib/wbutil/__init__.py       |    0
 .../common_micas/lib/wbutil/platformutil.py   |  290 +++
 .../common_custom/common_micas/script/ctccmd  |    3 +
 .../common_micas/script/privatenetwork.py     |   50 +
 .../common_micas/script/privatenetwork.sh     |   26 +
 .../script/update_machine_config.sh           |   24 +
 .../service/privatenetwork.service            |   13 +
 .../debian/changelog                          |    6 +
 .../debian/compat                             |    1 +
 .../debian/control                            |   14 +
 ...form-modules-micas-m2-w6010-48gt4x-fa.init |   61 +
 ...m-modules-micas-m2-w6010-48gt4x-fa.install |    2 +
 ...-modules-micas-m2-w6010-48gt4x-fa.postinst |    8 +
 ...form-modules-micas-m2-w6010-48gt4x-ra.init |   61 +
 ...m-modules-micas-m2-w6010-48gt4x-ra.install |    2 +
 ...-modules-micas-m2-w6010-48gt4x-ra.postinst |    8 +
 .../sonic-platform-modules-micas/debian/rules |  114 +
 ...rm64_micas_m2_w6010_48gt4x_fa_r0_config.py |   89 +
 .../config/fan_ctrl_cfg.json                  |   40 +
 .../service/m2-w6010-48gt4x_platform.service  |   13 +
 .../m2-w6010-48gt4x-fa/setup.py               |   15 +
 .../sonic_platform/__init__.py                |    3 +
 .../sonic_platform/chassis.py                 |  444 ++++
 .../sonic_platform/component.py               |   93 +
 .../sonic_platform/eeprom.py                  |   38 +
 .../m2-w6010-48gt4x-fa/sonic_platform/fan.py  |  178 ++
 .../sonic_platform/fan_drawer.py              |  124 ++
 .../sonic_platform/hwaccess.py                |   46 +
 .../sonic_platform/platform.py                |   15 +
 .../m2-w6010-48gt4x-fa/sonic_platform/psu.py  |  231 ++
 .../sonic_platform/redfish_api.py             |  304 +++
 .../m2-w6010-48gt4x-fa/sonic_platform/sfp.py  |  325 +++
 .../sonic_platform/thermal.py                 |  172 ++
 ...rm64_micas_m2_w6010_48gt4x_ra_r0_config.py |   90 +
 .../config/fan_ctrl_cfg.json                  |   40 +
 .../service/m2-w6010-48gt4x_platform.service  |   13 +
 .../m2-w6010-48gt4x-ra/setup.py               |   15 +
 .../sonic_platform/__init__.py                |    3 +
 .../sonic_platform/chassis.py                 |  444 ++++
 .../sonic_platform/component.py               |   93 +
 .../sonic_platform/eeprom.py                  |   38 +
 .../m2-w6010-48gt4x-ra/sonic_platform/fan.py  |  178 ++
 .../sonic_platform/fan_drawer.py              |  125 ++
 .../sonic_platform/hwaccess.py                |   46 +
 .../sonic_platform/platform.py                |   15 +
 .../m2-w6010-48gt4x-ra/sonic_platform/psu.py  |  231 ++
 .../sonic_platform/redfish_api.py             |  304 +++
 .../m2-w6010-48gt4x-ra/sonic_platform/sfp.py  |  325 +++
 .../sonic_platform/thermal.py                 |  172 ++
 platform/centec-arm64/sonic_fit.its           |   24 +
 .../centec-arm64/tsingma-bsp/debian/rules     |    2 +
 .../tsingma-bsp/debian/tsingma-bsp.install    |    1 +
 .../tsingma-bsp/src/m2-w6010-48gt4x/Makefile  |    5 +
 .../tsingma-bsp/src/m2-w6010-48gt4x/arm-gic.h |   23 +
 .../src/m2-w6010-48gt4x/ctc5236-clks.h        |   25 +
 .../src/m2-w6010-48gt4x/ctc5236-clock.dtsi    |   63 +
 .../src/m2-w6010-48gt4x/ctc5236.dtsi          |  428 ++++
 .../tsingma-bsp/src/m2-w6010-48gt4x/irq.h     |   20 +
 .../m2-w6010-48gt4x/m2-w6010-48gt4x-r0.dts    |  331 +++
 130 files changed, 19005 insertions(+)
 create mode 100644 device/micas/arm64-micas_m2-w6010-48gt4x-fa-r0/M2-W6010-48GT4X-FA/M2-w6010-48gt4x-fa-board.json
 create mode 100644 device/micas/arm64-micas_m2-w6010-48gt4x-fa-r0/M2-W6010-48GT4X-FA/M2-w6010-48gt4x-fa-p-chip-profile.txt
 create mode 100644 device/micas/arm64-micas_m2-w6010-48gt4x-fa-r0/M2-W6010-48GT4X-FA/M2-w6010-48gt4x-fa-p-datapath.txt
 create mode 100644 device/micas/arm64-micas_m2-w6010-48gt4x-fa-r0/M2-W6010-48GT4X-FA/default_sku
 create mode 100644 device/micas/arm64-micas_m2-w6010-48gt4x-fa-r0/M2-W6010-48GT4X-FA/phy_mapping.cfg
 create mode 100644 device/micas/arm64-micas_m2-w6010-48gt4x-fa-r0/M2-W6010-48GT4X-FA/platform_asic
 create mode 100644 device/micas/arm64-micas_m2-w6010-48gt4x-fa-r0/M2-W6010-48GT4X-FA/port_config.ini
 create mode 100644 device/micas/arm64-micas_m2-w6010-48gt4x-fa-r0/M2-W6010-48GT4X-FA/sai.profile
 create mode 100644 device/micas/arm64-micas_m2-w6010-48gt4x-fa-r0/M2-W6010-48GT4X-FA/start_up.cfg
 create mode 100644 device/micas/arm64-micas_m2-w6010-48gt4x-fa-r0/default_sku
 create mode 100644 device/micas/arm64-micas_m2-w6010-48gt4x-fa-r0/installer.conf
 create mode 100644 device/micas/arm64-micas_m2-w6010-48gt4x-fa-r0/platform.json
 create mode 100644 device/micas/arm64-micas_m2-w6010-48gt4x-fa-r0/platform_asic
 create mode 100644 device/micas/arm64-micas_m2-w6010-48gt4x-fa-r0/plugins/sfputil.py
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diff --git a/device/micas/arm64-micas_m2-w6010-48gt4x-fa-r0/M2-W6010-48GT4X-FA/M2-w6010-48gt4x-fa-board.json b/device/micas/arm64-micas_m2-w6010-48gt4x-fa-r0/M2-W6010-48GT4X-FA/M2-w6010-48gt4x-fa-board.json
new file mode 100644
index 000000000..80fb22238
--- /dev/null
+++ b/device/micas/arm64-micas_m2-w6010-48gt4x-fa-r0/M2-W6010-48GT4X-FA/M2-w6010-48gt4x-fa-board.json
@@ -0,0 +1,868 @@
+{
+    "macleds" : {
+        "polarity" : 1,
+        "freq"     : 2500,
+        "interval" : 50000000,
+        "maps" : [
+            {
+                "port_id" : 0,
+                "lchip"   : 0,
+                "ctl_id"  : 0,
+                "mode"    : "LED_MODE_1_RXLNK_BIACT",
+                "fixed"   : 0,
+                "sysfs_path" : "/sys/class/leds/port1/brightness"
+            },
+            {
+                "port_id" : 1,
+                "lchip"   : 0,
+                "ctl_id"  : 0,
+                "mode"    : "LED_MODE_1_RXLNK_BIACT",
+                "fixed"   : 0,
+                "sysfs_path" : "/sys/class/leds/port2/brightness"
+            },
+            {
+                "port_id" : 2,
+                "lchip"   : 0,
+                "ctl_id"  : 0,
+                "mode"    : "LED_MODE_1_RXLNK_BIACT",
+                "fixed"   : 0,
+                "sysfs_path" : "/sys/class/leds/port3/brightness"
+            },
+            {
+                "port_id" : 3,
+                "lchip"   : 0,
+                "ctl_id"  : 0,
+                "mode"    : "LED_MODE_1_RXLNK_BIACT",
+                "fixed"   : 0,
+                "sysfs_path" : "/sys/class/leds/port4/brightness"
+            },
+            {
+                "port_id" : 4,
+                "lchip"   : 0,
+                "ctl_id"  : 0,
+                "mode"    : "LED_MODE_1_RXLNK_BIACT",
+                "fixed"   : 0,
+                "sysfs_path" : "/sys/class/leds/port5/brightness"
+            },
+            {
+                "port_id" : 5,
+                "lchip"   : 0,
+                "ctl_id"  : 0,
+                "mode"    : "LED_MODE_1_RXLNK_BIACT",
+                "fixed"   : 0,
+                "sysfs_path" : "/sys/class/leds/port6/brightness"
+            },
+            {
+                "port_id" : 6,
+                "lchip"   : 0,
+                "ctl_id"  : 0,
+                "mode"    : "LED_MODE_1_RXLNK_BIACT",
+                "fixed"   : 0,
+                "sysfs_path" : "/sys/class/leds/port7/brightness"
+            },
+            {
+                "port_id" : 7,
+                "lchip"   : 0,
+                "ctl_id"  : 0,
+                "mode"    : "LED_MODE_1_RXLNK_BIACT",
+                "fixed"   : 0,
+                "sysfs_path" : "/sys/class/leds/port8/brightness"
+            },
+            {
+                "port_id" : 16,
+                "lchip"   : 0,
+                "ctl_id"  : 0,
+                "mode"    : "LED_MODE_1_RXLNK_BIACT",
+                "fixed"   : 0,
+                "sysfs_path" : "/sys/class/leds/port9/brightness"
+            },
+            {
+                "port_id" : 17,
+                "lchip"   : 0,
+                "ctl_id"  : 0,
+                "mode"    : "LED_MODE_1_RXLNK_BIACT",
+                "fixed"   : 0,
+                "sysfs_path" : "/sys/class/leds/port10/brightness"
+            },
+            {
+                "port_id" : 18,
+                "lchip"   : 0,
+                "ctl_id"  : 0,
+                "mode"    : "LED_MODE_1_RXLNK_BIACT",
+                "fixed"   : 0,
+                "sysfs_path" : "/sys/class/leds/port11/brightness"
+            },
+            {
+                "port_id" : 19,
+                "lchip"   : 0,
+                "ctl_id"  : 0,
+                "mode"    : "LED_MODE_1_RXLNK_BIACT",
+                "fixed"   : 0,
+                "sysfs_path" : "/sys/class/leds/port12/brightness"
+            },
+            {
+                "port_id" : 20,
+                "lchip"   : 0,
+                "ctl_id"  : 0,
+                "mode"    : "LED_MODE_1_RXLNK_BIACT",
+                "fixed"   : 0,
+                "sysfs_path" : "/sys/class/leds/port13/brightness"
+            },
+            {
+                "port_id" : 21,
+                "lchip"   : 0,
+                "ctl_id"  : 0,
+                "mode"    : "LED_MODE_1_RXLNK_BIACT",
+                "fixed"   : 0,
+                "sysfs_path" : "/sys/class/leds/port14/brightness"
+            },
+            {
+                "port_id" : 22,
+                "lchip"   : 0,
+                "ctl_id"  : 0,
+                "mode"    : "LED_MODE_1_RXLNK_BIACT",
+                "fixed"   : 0,
+                "sysfs_path" : "/sys/class/leds/port15/brightness"
+            },
+            {
+                "port_id" : 23,
+                "lchip"   : 0,
+                "ctl_id"  : 0,
+                "mode"    : "LED_MODE_1_RXLNK_BIACT",
+                "fixed"   : 0,
+                "sysfs_path" : "/sys/class/leds/port16/brightness"
+            },
+            {
+                "port_id" : 8,
+                "lchip"   : 0,
+                "ctl_id"  : 0,
+                "mode"    : "LED_MODE_1_RXLNK_BIACT",
+                "fixed"   : 0,
+                "sysfs_path" : "/sys/class/leds/port17/brightness"
+            },
+            {
+                "port_id" : 9,
+                "lchip"   : 0,
+                "ctl_id"  : 0,
+                "mode"    : "LED_MODE_1_RXLNK_BIACT",
+                "fixed"   : 0,
+                "sysfs_path" : "/sys/class/leds/port18/brightness"
+            },
+            {
+                "port_id" : 10,
+                "lchip"   : 0,
+                "ctl_id"  : 0,
+                "mode"    : "LED_MODE_1_RXLNK_BIACT",
+                "fixed"   : 0,
+                "sysfs_path" : "/sys/class/leds/port19/brightness"
+            },
+            {
+                "port_id" : 11,
+                "lchip"   : 0,
+                "ctl_id"  : 0,
+                "mode"    : "LED_MODE_1_RXLNK_BIACT",
+                "fixed"   : 0,
+                "sysfs_path" : "/sys/class/leds/port20/brightness"
+            },
+            {
+                "port_id" : 32,
+                "lchip"   : 0,
+                "ctl_id"  : 0,
+                "mode"    : "LED_MODE_1_RXLNK_BIACT",
+                "fixed"   : 0,
+                "sysfs_path" : "/sys/class/leds/port21/brightness"
+            },
+            {
+                "port_id" : 33,
+                "lchip"   : 0,
+                "ctl_id"  : 0,
+                "mode"    : "LED_MODE_1_RXLNK_BIACT",
+                "fixed"   : 0,
+                "sysfs_path" : "/sys/class/leds/port22/brightness"
+            },
+            {
+                "port_id" : 34,
+                "lchip"   : 0,
+                "ctl_id"  : 0,
+                "mode"    : "LED_MODE_1_RXLNK_BIACT",
+                "fixed"   : 0,
+                "sysfs_path" : "/sys/class/leds/port23/brightness"
+            },
+            {
+                "port_id" : 35,
+                "lchip"   : 0,
+                "ctl_id"  : 0,
+                "mode"    : "LED_MODE_1_RXLNK_BIACT",
+                "fixed"   : 0,
+                "sysfs_path" : "/sys/class/leds/port24/brightness"
+            },
+            {
+                "port_id" : 36,
+                "lchip"   : 0,
+                "ctl_id"  : 0,
+                "mode"    : "LED_MODE_1_RXLNK_BIACT",
+                "fixed"   : 0,
+                "sysfs_path" : "/sys/class/leds/port25/brightness"
+            },
+            {
+                "port_id" : 37,
+                "lchip"   : 0,
+                "ctl_id"  : 0,
+                "mode"    : "LED_MODE_1_RXLNK_BIACT",
+                "fixed"   : 0,
+                "sysfs_path" : "/sys/class/leds/port26/brightness"
+            },
+            {
+                "port_id" : 38,
+                "lchip"   : 0,
+                "ctl_id"  : 0,
+                "mode"    : "LED_MODE_1_RXLNK_BIACT",
+                "fixed"   : 0,
+                "sysfs_path" : "/sys/class/leds/port27/brightness"
+            },
+            {
+                "port_id" : 39,
+                "lchip"   : 0,
+                "ctl_id"  : 0,
+                "mode"    : "LED_MODE_1_RXLNK_BIACT",
+                "fixed"   : 0,
+                "sysfs_path" : "/sys/class/leds/port28/brightness"
+            },
+            {
+                "port_id" : 40,
+                "lchip"   : 0,
+                "ctl_id"  : 0,
+                "mode"    : "LED_MODE_1_RXLNK_BIACT",
+                "fixed"   : 0,
+                "sysfs_path" : "/sys/class/leds/port29/brightness"
+            },
+            {
+                "port_id" : 41,
+                "lchip"   : 0,
+                "ctl_id"  : 0,
+                "mode"    : "LED_MODE_1_RXLNK_BIACT",
+                "fixed"   : 0,
+                "sysfs_path" : "/sys/class/leds/port30/brightness"
+            },
+            {
+                "port_id" : 42,
+                "lchip"   : 0,
+                "ctl_id"  : 0,
+                "mode"    : "LED_MODE_1_RXLNK_BIACT",
+                "fixed"   : 0,
+                "sysfs_path" : "/sys/class/leds/port31/brightness"
+            },
+            {
+                "port_id" : 43,
+                "lchip"   : 0,
+                "ctl_id"  : 0,
+                "mode"    : "LED_MODE_1_RXLNK_BIACT",
+                "fixed"   : 0,
+                "sysfs_path" : "/sys/class/leds/port32/brightness"
+            },
+            {
+                "port_id" : 24,
+                "lchip"   : 0,
+                "ctl_id"  : 0,
+                "mode"    : "LED_MODE_1_RXLNK_BIACT",
+                "fixed"   : 0,
+                "sysfs_path" : "/sys/class/leds/port33/brightness"
+            },
+            {
+                "port_id" : 25,
+                "lchip"   : 0,
+                "ctl_id"  : 0,
+                "mode"    : "LED_MODE_1_RXLNK_BIACT",
+                "fixed"   : 0,
+                "sysfs_path" : "/sys/class/leds/port34/brightness"
+            },
+            {
+                "port_id" : 26,
+                "lchip"   : 0,
+                "ctl_id"  : 0,
+                "mode"    : "LED_MODE_1_RXLNK_BIACT",
+                "fixed"   : 0,
+                "sysfs_path" : "/sys/class/leds/port35/brightness"
+            },
+            {
+                "port_id" : 27,
+                "lchip"   : 0,
+                "ctl_id"  : 0,
+                "mode"    : "LED_MODE_1_RXLNK_BIACT",
+                "fixed"   : 0,
+                "sysfs_path" : "/sys/class/leds/port36/brightness"
+            },
+            {
+                "port_id" : 48,
+                "lchip"   : 0,
+                "ctl_id"  : 0,
+                "mode"    : "LED_MODE_1_RXLNK_BIACT",
+                "fixed"   : 0,
+                "sysfs_path" : "/sys/class/leds/port37/brightness"
+            },
+            {
+                "port_id" : 49,
+                "lchip"   : 0,
+                "ctl_id"  : 0,
+                "mode"    : "LED_MODE_1_RXLNK_BIACT",
+                "fixed"   : 0,
+                "sysfs_path" : "/sys/class/leds/port38/brightness"
+            },
+            {
+                "port_id" : 50,
+                "lchip"   : 0,
+                "ctl_id"  : 0,
+                "mode"    : "LED_MODE_1_RXLNK_BIACT",
+                "fixed"   : 0,
+                "sysfs_path" : "/sys/class/leds/port39/brightness"
+            },
+            {
+                "port_id" : 51,
+                "lchip"   : 0,
+                "ctl_id"  : 0,
+                "mode"    : "LED_MODE_1_RXLNK_BIACT",
+                "fixed"   : 0,
+                "sysfs_path" : "/sys/class/leds/port40/brightness"
+            },
+            {
+                "port_id" : 52,
+                "lchip"   : 0,
+                "ctl_id"  : 0,
+                "mode"    : "LED_MODE_1_RXLNK_BIACT",
+                "fixed"   : 0,
+                "sysfs_path" : "/sys/class/leds/port41/brightness"
+            },
+            {
+                "port_id" : 53,
+                "lchip"   : 0,
+                "ctl_id"  : 0,
+                "mode"    : "LED_MODE_1_RXLNK_BIACT",
+                "fixed"   : 0,
+                "sysfs_path" : "/sys/class/leds/port42/brightness"
+            },
+            {
+                "port_id" : 54,
+                "lchip"   : 0,
+                "ctl_id"  : 0,
+                "mode"    : "LED_MODE_1_RXLNK_BIACT",
+                "fixed"   : 0,
+                "sysfs_path" : "/sys/class/leds/port43/brightness"
+            },
+            {
+                "port_id" : 55,
+                "lchip"   : 0,
+                "ctl_id"  : 0,
+                "mode"    : "LED_MODE_1_RXLNK_BIACT",
+                "fixed"   : 0,
+                "sysfs_path" : "/sys/class/leds/port44/brightness"
+            },
+            {
+                "port_id" : 56,
+                "lchip"   : 0,
+                "ctl_id"  : 0,
+                "mode"    : "LED_MODE_1_RXLNK_BIACT",
+                "fixed"   : 0,
+                "sysfs_path" : "/sys/class/leds/port45/brightness"
+            },
+            {
+                "port_id" : 57,
+                "lchip"   : 0,
+                "ctl_id"  : 0,
+                "mode"    : "LED_MODE_1_RXLNK_BIACT",
+                "fixed"   : 0,
+                "sysfs_path" : "/sys/class/leds/port46/brightness"
+            },
+            {
+                "port_id" : 58,
+                "lchip"   : 0,
+                "ctl_id"  : 0,
+                "mode"    : "LED_MODE_1_RXLNK_BIACT",
+                "fixed"   : 0,
+                "sysfs_path" : "/sys/class/leds/port47/brightness"
+            },
+            {
+                "port_id" : 59,
+                "lchip"   : 0,
+                "ctl_id"  : 0,
+                "mode"    : "LED_MODE_1_RXLNK_BIACT",
+                "fixed"   : 0,
+                "sysfs_path" : "/sys/class/leds/port48/brightness"
+            },
+            {
+                "port_id" : 12,
+                "lchip"   : 0,
+                "ctl_id"  : 0,
+                "mode"    : "LED_MODE_1_RXLNK_BIACT",
+                "fixed"   : 0,
+                "sysfs_path" : "/sys/class/leds/port49/brightness"
+            },
+            {
+                "port_id" : 13,
+                "lchip"   : 0,
+                "ctl_id"  : 0,
+                "mode"    : "LED_MODE_1_RXLNK_BIACT",
+                "fixed"   : 0,
+                "sysfs_path" : "/sys/class/leds/port50/brightness"
+            },
+            {
+                "port_id" : 14,
+                "lchip"   : 0,
+                "ctl_id"  : 0,
+                "mode"    : "LED_MODE_1_RXLNK_BIACT",
+                "fixed"   : 0,
+                "sysfs_path" : "/sys/class/leds/port51/brightness"
+            },
+            {
+                "port_id" : 15,
+                "lchip"   : 0,
+                "ctl_id"  : 0,
+                "mode"    : "LED_MODE_1_RXLNK_BIACT",
+                "fixed"   : 0,
+                "sysfs_path" : "/sys/class/leds/port52/brightness"
+            }
+        ]
+    },
+    "phys" : [
+        {
+            "macid" : 0,
+            "busid" : 0,
+            "addr"  : 0,
+            "base_port": 1,
+            "last_port": 4
+        },
+        {
+            "macid" : 1,
+            "busid" : 0,
+            "addr"  : 1,
+            "base_port": 1,
+            "last_port": 4
+        },
+        {
+            "macid" : 2,
+            "busid" : 0,
+            "addr"  : 2,
+            "base_port": 1,
+            "last_port": 4
+        },
+        {
+            "macid" : 3,
+            "busid" : 0,
+            "addr"  : 3,
+            "base_port": 1,
+            "last_port": 4
+        },
+        {
+            "macid" : 4,
+            "busid" : 0,
+            "addr"  : 4,
+            "base_port": 1,
+            "last_port": 4
+        },
+        {
+            "macid" : 5,
+            "busid" : 0,
+            "addr"  : 5,
+            "base_port": 1,
+            "last_port": 4
+        },
+        {
+            "macid" : 6,
+            "busid" : 0,
+            "addr"  : 6,
+            "base_port": 1,
+            "last_port": 4
+        },
+        {
+            "macid" : 7,
+            "busid" : 0,
+            "addr"  : 7,
+            "base_port": 1,
+            "last_port": 4
+        },
+        {
+            "macid" : 16,
+            "busid" : 0,
+            "addr"  : 8,
+            "base_port": 1,
+            "last_port": 4
+        },
+        {
+            "macid" : 17,
+            "busid" : 0,
+            "addr"  : 9,
+            "base_port": 1,
+            "last_port": 4
+        },
+        {
+            "macid" : 18,
+            "busid" : 0,
+            "addr"  : 10,
+            "base_port": 1,
+            "last_port": 4
+        },
+        {
+            "macid" : 19,
+            "busid" : 0,
+            "addr"  : 11,
+            "base_port": 1,
+            "last_port": 4
+        },
+        {
+            "macid" : 20,
+            "busid" : 0,
+            "addr"  : 12,
+            "base_port": 1,
+            "last_port": 4
+        },
+        {
+            "macid" : 21,
+            "busid" : 0,
+            "addr"  : 13,
+            "base_port": 1,
+            "last_port": 4
+        },
+        {
+            "macid" : 22,
+            "busid" : 0,
+            "addr"  : 14,
+            "base_port": 1,
+            "last_port": 4
+        },
+        {
+            "macid" : 23,
+            "busid" : 0,
+            "addr"  : 15,
+            "base_port": 1,
+            "last_port": 4
+        },
+        {
+            "macid" : 8,
+            "busid" : 0,
+            "addr"  : 16,
+            "base_port": 1,
+            "last_port": 4
+        },
+        {
+            "macid" : 9,
+            "busid" : 0,
+            "addr"  : 17,
+            "base_port": 1,
+            "last_port": 4
+        },
+        {
+            "macid" : 10,
+            "busid" : 0,
+            "addr"  : 18,
+            "base_port": 1,
+            "last_port": 4
+        },
+        {
+            "macid" : 11,
+            "busid" : 0,
+            "addr"  : 19,
+            "base_port": 1,
+            "last_port": 4
+        },
+        {
+            "macid" : 32,
+            "busid" : 0,
+            "addr"  : 20,
+            "base_port": 1,
+            "last_port": 4
+        },
+        {
+            "macid" : 33,
+            "busid" : 0,
+            "addr"  : 21,
+            "base_port": 1,
+            "last_port": 4
+        },
+        {
+            "macid" : 34,
+            "busid" : 0,
+            "addr"  : 22,
+            "base_port": 1,
+            "last_port": 4
+        },
+        {
+            "macid" : 35,
+            "busid" : 0,
+            "addr"  : 23,
+            "base_port": 1,
+            "last_port": 4
+        },
+        {
+            "macid" : 36,
+            "busid" : 1,
+            "addr"  : 0,
+            "base_port": 1,
+            "last_port": 4
+        },
+        {
+            "macid" : 37,
+            "busid" : 1,
+            "addr"  : 1,
+            "base_port": 1,
+            "last_port": 4
+        },
+        {
+            "macid" : 38,
+            "busid" : 1,
+            "addr"  : 2,
+            "base_port": 1,
+            "last_port": 4
+        },
+        {
+            "macid" : 39,
+            "busid" : 1,
+            "addr"  : 3,
+            "base_port": 1,
+            "last_port": 4
+        },
+        {
+            "macid" : 40,
+            "busid" : 1,
+            "addr"  : 4,
+            "base_port": 1,
+            "last_port": 4
+        },
+        {
+            "macid" : 41,
+            "busid" : 1,
+            "addr"  : 5,
+            "base_port": 1,
+            "last_port": 4
+        },
+        {
+            "macid" : 42,
+            "busid" : 1,
+            "addr"  : 6,
+            "base_port": 1,
+            "last_port": 4
+        },
+        {
+            "macid" : 43,
+            "busid" : 1,
+            "addr"  : 7,
+            "base_port": 1,
+            "last_port": 4
+        },
+        {
+            "macid" : 24,
+            "busid" : 1,
+            "addr"  : 8,
+            "base_port": 1,
+            "last_port": 4
+        },
+        {
+            "macid" : 25,
+            "busid" : 1,
+            "addr"  : 9,
+            "base_port": 1,
+            "last_port": 4
+        },
+        {
+            "macid" : 26,
+            "busid" : 1,
+            "addr"  : 10,
+            "base_port": 1,
+            "last_port": 4
+        },
+        {
+            "macid" : 27,
+            "busid" : 1,
+            "addr"  : 11,
+            "base_port": 1,
+            "last_port": 4
+        },
+        {
+            "macid" : 48,
+            "busid" : 1,
+            "addr"  : 12,
+            "base_port": 1,
+            "last_port": 4
+        },
+        {
+            "macid" : 49,
+            "busid" : 1,
+            "addr"  : 13,
+            "base_port": 1,
+            "last_port": 4
+        },
+        {
+            "macid" : 50,
+            "busid" : 1,
+            "addr"  : 14,
+            "base_port": 1,
+            "last_port": 4
+        },
+        {
+            "macid" : 51,
+            "busid" : 1,
+            "addr"  : 15,
+            "base_port": 1,
+            "last_port": 4
+        },
+        {
+            "macid" : 52,
+            "busid" : 1,
+            "addr"  : 16,
+            "base_port": 1,
+            "last_port": 4
+        },
+        {
+            "macid" : 53,
+            "busid" : 1,
+            "addr"  : 17,
+            "base_port": 1,
+            "last_port": 4
+        },
+        {
+            "macid" : 54,
+            "busid" : 1,
+            "addr"  : 18,
+            "base_port": 1,
+            "last_port": 4
+        },
+        {
+            "macid" : 55,
+            "busid" : 1,
+            "addr"  : 19,
+            "base_port": 1,
+            "last_port": 4
+        },
+        {
+            "macid" : 56,
+            "busid" : 1,
+            "addr"  : 20,
+            "base_port": 1,
+            "last_port": 4
+        },
+        {
+            "macid" : 57,
+            "busid" : 1,
+            "addr"  : 21,
+            "base_port": 1,
+            "last_port": 4
+        },
+        {
+            "macid" : 58,
+            "busid" : 1,
+            "addr"  : 22,
+            "base_port": 1,
+            "last_port": 4
+        },
+        {
+            "macid" : 59,
+            "busid" : 1,
+            "addr"  : 23,
+            "base_port": 1,
+            "last_port": 4
+        }
+    ],
+    "ffe" : {
+        "board_material" : "BOARD_MATERIAL_M4",
+        "config" : [
+            {
+                "serdes_id" : [0],
+                "is_dac"    : 0,
+                "speed"     : [1000],
+                "mode"      : "CTC_CHIP_SERDES_FFE_MODE_DEFINE",
+                "cfg"       : [0, 255, 10, 0]
+            },
+            {
+                "serdes_id" : [1],
+                "is_dac"    : 0,
+                "speed"     : [1000],
+                "mode"      : "CTC_CHIP_SERDES_FFE_MODE_DEFINE",
+                "cfg"       : [0, 240, 10, 0]
+            },
+            {
+                "serdes_id" : [2],
+                "is_dac"    : 0,
+                "speed"     : [1000],
+                "mode"      : "CTC_CHIP_SERDES_FFE_MODE_DEFINE",
+                "cfg"       : [0, 230, 10, 0]
+            },
+            {
+                "serdes_id" : [3],
+                "is_dac"    : 0,
+                "speed"     : [1000],
+                "mode"      : "CTC_CHIP_SERDES_FFE_MODE_DEFINE",
+                "cfg"       : [0, 220, 7, 0]
+            },
+            {
+                "serdes_id" : [4],
+                "is_dac"    : 0,
+                "speed"     : [1000],
+                "mode"      : "CTC_CHIP_SERDES_FFE_MODE_DEFINE",
+                "cfg"       : [0, 220, 8, 0]
+            },
+            {
+                "serdes_id" : [5],
+                "is_dac"    : 0,
+                "speed"     : [1000],
+                "mode"      : "CTC_CHIP_SERDES_FFE_MODE_DEFINE",
+                "cfg"       : [0, 210, 6, 0]
+            },
+            {
+                "serdes_id" : [6],
+                "is_dac"    : 0,
+                "speed"     : [1000],
+                "mode"      : "CTC_CHIP_SERDES_FFE_MODE_DEFINE",
+                "cfg"       : [0, 180, 6, 0]
+            },
+            {
+                "serdes_id" : [7],
+                "is_dac"    : 0,
+                "speed"     : [1000],
+                "mode"      : "CTC_CHIP_SERDES_FFE_MODE_DEFINE",
+                "cfg"       : [0, 180, 5, 0]
+            },
+            {
+                "serdes_id" : [8],
+                "is_dac"    : 0,
+                "speed"     : [1000],
+                "mode"      : "CTC_CHIP_SERDES_FFE_MODE_DEFINE",
+                "cfg"       : [2, 160, 4, 0]
+            },
+            {
+                "serdes_id" : [9],
+                "is_dac"    : 0,
+                "speed"     : [1000],
+                "mode"      : "CTC_CHIP_SERDES_FFE_MODE_DEFINE",
+                "cfg"       : [2, 160, 4, 0]
+            },
+            {
+                "serdes_id" : [10],
+                "is_dac"    : 0,
+                "speed"     : [1000],
+                "mode"      : "CTC_CHIP_SERDES_FFE_MODE_DEFINE",
+                "cfg"       : [3, 140, 9, 0]
+            },
+            {
+                "serdes_id" : [11],
+                "is_dac"    : 0,
+                "speed"     : [1000],
+                "mode"      : "CTC_CHIP_SERDES_FFE_MODE_DEFINE",
+                "cfg"       : [3, 140, 5, 0]
+            },
+            {
+                "serdes_id" : [12, 13, 14, 15],
+                "is_dac"    : 0,
+                "speed"     : [10000],
+                "mode"      : "CTC_CHIP_SERDES_FFE_MODE_DEFINE",
+                "cfg"       : [3, 94, 15, 0]
+            }
+        ]
+    },
+    "ctle" : {
+       "config" : [
+           {
+             "serdes_id" : [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11],
+             "auto-en"   : 0,
+             "cfg"       : [6, 14, 2]
+           }
+       ]
+    }
+}
diff --git a/device/micas/arm64-micas_m2-w6010-48gt4x-fa-r0/M2-W6010-48GT4X-FA/M2-w6010-48gt4x-fa-p-chip-profile.txt b/device/micas/arm64-micas_m2-w6010-48gt4x-fa-r0/M2-W6010-48GT4X-FA/M2-w6010-48gt4x-fa-p-chip-profile.txt
new file mode 100644
index 000000000..2373e27f5
--- /dev/null
+++ b/device/micas/arm64-micas_m2-w6010-48gt4x-fa-r0/M2-W6010-48GT4X-FA/M2-w6010-48gt4x-fa-p-chip-profile.txt
@@ -0,0 +1,96 @@
+#-----------------  SDK Feature Support --------------
+[MPLS_SUPPORT]     = 1;
+[APS_SUPPORT]      = 1;
+[OAM_SUPPORT]      = 1;
+[PTP_SUPPORT]      = 0;
+[SYNCE_SUPPORT]    = 0;
+[STACKING_SUPPORT] = 1;
+[BPE_SUPPORT]      = 0;
+[IPFIX_SUPPORT]    = 1;
+[MONITOR_SUPPORT]  = 1;
+[OVERLAY_SUPPORT]  = 1;
+[EFD_SUPPORT]      = 1;
+[FCOE_SUPPORT]     = 0;
+[TRILL_SUPPORT]    = 0;
+[WLAN_SUPPORT]     = 1;
+[NPM_SUPPORT]      = 1;
+[DOT1AE_SUPPORT]   = 1;
+
+#-----------------  Chip Init Parameter --------------
+#Local chip number and global chip id
+[Local chip_num] = 1
+[Local chip0]    = 0
+[Local chip1]    = 1
+
+#Cut through mode 0: Disable; 1:10/40/100G; 2:1/10/100G; 3:1/10/40G; other:Flex, refer to CUT_THROUGH_BITMAP
+[CUT_THROUGH_SPEED]  = 0
+#Flex cut through mode, speed enable by bitmap, refer to ctc_port_speed_t, Notice: 10M/100M/1G treat as the same speed
+[CUT_THROUGH_BITMAP]  = 0
+
+#Network cpu port
+[CPU_NETWORK_PORT_EN] = 0
+[CPU_NETWORK_PORT_ID] = 47
+
+#Enable parity error and multi-bit ecc recover
+[ECC_RECOVER_EN] = 0
+[TCAM_SCAN_EN] = 0
+
+#-----------------  Interrupt Init Parameter --------------
+#0: pin, 1: msi
+[Interrupt_mode] = 0
+[IRQ]            = 69
+
+#-----------------  NextHop Init Parameter --------------
+#0: SDK work in pizzbox (single chip system), 1: SDK work in multi-chip system
+[Nexthop Edit Mode]       = 0
+[External Nexthop Number] = 16384
+[MPLS Tunnel Number]      = 1024
+
+#-----------------  L2 Init Parameter --------------
+[FDB Hw Learning] = 1
+[Logic Port Num] = 1024
+#0: 128 instance per port, 1: 64 instance per port, 2: 32 instance per port
+[STP MODE] = 0
+[MAX_FID_NUM] = 5120
+
+#-----------------  Stats Init Parameter --------------
+[STATS_PORT_EN]         = 0
+[STATS_ECMP_EN]         = 0
+
+#-----------------  BPE Init Parameter --------------
+[BPE_BR_PORT_EXTENDER_EN]  = 0
+[BPE_BR_UC_MAX_ECID]       = 1024
+[BPE_BR_MC_MAX_ECID]       = 4096
+[BPE_BR_PORT_BASE]         = 0
+
+#-----------------  Ipuc Init Parameter --------------
+#0: tcam use prefix 16; 1: tcam use prefix 8
+[IPUC_TCAM_PREFIX_8] = 1
+
+#-----------------  QoS Init Parameter --------------
+#QoS policer number support 1K/2K/4K/8K, default 4K
+[QOS_POLICER_NUM] = 4096
+#QoS port queue number support 16/8/8 BPE/4 BPE,
+#When resrc_profile.cfg exist, queue number valid,
+#Default 8 queue mode
+#8 queue = 8
+#16 queue = 16
+#4 queue BPE = 17
+#8 queue BPE = 18
+[QOS_PORT_QUEUE_NUM] = 8
+#QoS port extend queue number support 0/4, default 0
+[QOS_PORT_EXT_QUEUE_NUM] = 0
+#QoS CPU reason queue number support 128/64/32, default 128
+[QOS_CPU_QUEUE_NUM] = 128
+[QOS_INGRESS_VLAN_POLICER_NUM] = 0
+[QOS_EGRESS_VLAN_POLICER_NUM] = 0
+[QOS_POLICER_MERGE_MODE] = 0
+#QOS service queue mode, default 0,0:logic scr port + dstport enq 1:service id + dstport enq
+[QOS_SERVICE_QUEUE_MODE] = 0
+#Global enable logic dst port + dstport enq
+[QOS_SERVICE_QUEUE_EGRESS_EN] = 0
+
+#-----------------  Stacking Init Parameter --------------
+#0: normal mode; 1: spine-leaf mode
+[FABRIC MODE] = 0
+[STACKING VERSION] = 1
diff --git a/device/micas/arm64-micas_m2-w6010-48gt4x-fa-r0/M2-W6010-48GT4X-FA/M2-w6010-48gt4x-fa-p-datapath.txt b/device/micas/arm64-micas_m2-w6010-48gt4x-fa-r0/M2-W6010-48GT4X-FA/M2-w6010-48gt4x-fa-p-datapath.txt
new file mode 100644
index 000000000..959b97a15
--- /dev/null
+++ b/device/micas/arm64-micas_m2-w6010-48gt4x-fa-r0/M2-W6010-48GT4X-FA/M2-w6010-48gt4x-fa-p-datapath.txt
@@ -0,0 +1,281 @@
+#Generated by 'CTC DataPath Tools' on Fri Dec 18 19:15:31 2020 
+#Version 1.0, Supported by TsingMa SDK 
+ 
+
+#SERDES_MODE   : 0-NONE, 1-XFI, 2-SGMII, 3-Not Support, 4-QSGMII, 5-XAUI, 6-DXAUI, 7-XLG, 8-CG, 9-SGMII2G5
+#                10-USXGMII-S, 11-USXGMII-M2G5, 12-USXGMII-M5G, 13-XXVG, 14-LG, 15-100BASE-FX
+#SERDES_RX_POLY: 0-Normal, 1-Inverse
+#SERDES_SWITCH : 0-Not Support Dynamic Switch, 1-Support Dynamic Switch
+
+[WLAN_ENABLE] = 1
+[DOT1AE_ENABLE] = 1
+
+[CORE_PLLA] = 600
+#{
+[SERDES_ITEM]
+#repeat 32 step 6
+[SERDES_ID] = 0
+[SERDES_MODE] = 4
+[SERDES_RX_POLY] = 1
+[SERDES_TX_POLY] = 1
+[SERDES_SWITCH] = 0
+[SERDES_GROUP] = 0
+
+[SERDES_ID] = 1
+[SERDES_MODE] = 4
+[SERDES_RX_POLY] = 0
+[SERDES_TX_POLY] = 0
+[SERDES_SWITCH] = 0
+[SERDES_GROUP] = 0
+
+[SERDES_ID] = 2
+[SERDES_MODE] = 4
+[SERDES_RX_POLY] = 1
+[SERDES_TX_POLY] = 1
+[SERDES_SWITCH] = 0
+[SERDES_GROUP] = 0
+
+[SERDES_ID] = 3
+[SERDES_MODE] = 4
+[SERDES_RX_POLY] = 0
+[SERDES_TX_POLY] = 0
+[SERDES_SWITCH] = 0
+[SERDES_GROUP] = 0
+
+[SERDES_ID] = 4
+[SERDES_MODE] = 4
+[SERDES_RX_POLY] = 0
+[SERDES_TX_POLY] = 0
+[SERDES_SWITCH] = 0
+[SERDES_GROUP] = 0
+
+[SERDES_ID] = 5
+[SERDES_MODE] = 4
+[SERDES_RX_POLY] = 0
+[SERDES_TX_POLY] = 0
+[SERDES_SWITCH] = 0
+[SERDES_GROUP] = 0
+
+[SERDES_ID] = 6
+[SERDES_MODE] = 4
+[SERDES_RX_POLY] = 0
+[SERDES_TX_POLY] = 0
+[SERDES_SWITCH] = 0
+[SERDES_GROUP] = 0
+
+[SERDES_ID] = 7
+[SERDES_MODE] = 4
+[SERDES_RX_POLY] = 1
+[SERDES_TX_POLY] = 1
+[SERDES_SWITCH] = 0
+[SERDES_GROUP] = 0
+
+[SERDES_ID] = 8
+[SERDES_MODE] = 4
+[SERDES_RX_POLY] = 1
+[SERDES_TX_POLY] = 1
+[SERDES_SWITCH] = 0
+[SERDES_GROUP] = 0
+
+[SERDES_ID] = 9
+[SERDES_MODE] = 4
+[SERDES_RX_POLY] = 0
+[SERDES_TX_POLY] = 0
+[SERDES_SWITCH] = 0
+[SERDES_GROUP] = 0
+
+[SERDES_ID] = 10
+[SERDES_MODE] = 4
+[SERDES_RX_POLY] = 0
+[SERDES_TX_POLY] = 0
+[SERDES_SWITCH] = 0
+[SERDES_GROUP] = 0
+
+[SERDES_ID] = 11
+[SERDES_MODE] = 4
+[SERDES_RX_POLY] = 0
+[SERDES_TX_POLY] = 0
+[SERDES_SWITCH] = 0
+[SERDES_GROUP] = 0
+
+[SERDES_ID] = 12
+[SERDES_MODE] = 1
+[SERDES_RX_POLY] = 0
+[SERDES_TX_POLY] = 0
+[SERDES_SWITCH] = 1
+[SERDES_GROUP] = 0
+
+[SERDES_ID] = 13
+[SERDES_MODE] = 1
+[SERDES_RX_POLY] = 0
+[SERDES_TX_POLY] = 0
+[SERDES_SWITCH] = 1
+[SERDES_GROUP] = 0
+
+[SERDES_ID] = 14
+[SERDES_MODE] = 1
+[SERDES_RX_POLY] = 0
+[SERDES_TX_POLY] = 0
+[SERDES_SWITCH] = 1
+[SERDES_GROUP] = 0
+
+[SERDES_ID] = 15
+[SERDES_MODE] = 1
+[SERDES_RX_POLY] = 0
+[SERDES_TX_POLY] = 0
+[SERDES_SWITCH] = 1
+[SERDES_GROUP] = 0
+
+[SERDES_ID] = 16
+[SERDES_MODE] = 3
+[SERDES_RX_POLY] = 0
+[SERDES_TX_POLY] = 0
+[SERDES_SWITCH] = 0
+[SERDES_GROUP] = 0
+
+[SERDES_ID] = 17
+[SERDES_MODE] = 3
+[SERDES_RX_POLY] = 0
+[SERDES_TX_POLY] = 0
+[SERDES_SWITCH] = 0
+[SERDES_GROUP] = 0
+
+[SERDES_ID] = 18
+[SERDES_MODE] = 3
+[SERDES_RX_POLY] = 0
+[SERDES_TX_POLY] = 0
+[SERDES_SWITCH] = 0
+[SERDES_GROUP] = 0
+
+[SERDES_ID] = 19
+[SERDES_MODE] = 3
+[SERDES_RX_POLY] = 0
+[SERDES_TX_POLY] = 0
+[SERDES_SWITCH] = 0
+[SERDES_GROUP] = 0
+
+[SERDES_ID] = 20
+[SERDES_MODE] = 3
+[SERDES_RX_POLY] = 0
+[SERDES_TX_POLY] = 0
+[SERDES_SWITCH] = 0
+[SERDES_GROUP] = 0
+
+[SERDES_ID] = 21
+[SERDES_MODE] = 3
+[SERDES_RX_POLY] = 0
+[SERDES_TX_POLY] = 0
+[SERDES_SWITCH] = 0
+[SERDES_GROUP] = 0
+
+[SERDES_ID] = 22
+[SERDES_MODE] = 3
+[SERDES_RX_POLY] = 0
+[SERDES_TX_POLY] = 0
+[SERDES_SWITCH] = 0
+[SERDES_GROUP] = 0
+
+[SERDES_ID] = 23
+[SERDES_MODE] = 3
+[SERDES_RX_POLY] = 0
+[SERDES_TX_POLY] = 0
+[SERDES_SWITCH] = 0
+[SERDES_GROUP] = 0
+
+[SERDES_ID] = 24
+[SERDES_MODE] = 3
+[SERDES_RX_POLY] = 0
+[SERDES_TX_POLY] = 0
+[SERDES_SWITCH] = 0
+[SERDES_GROUP] = 0
+
+[SERDES_ID] = 25
+[SERDES_MODE] = 3
+[SERDES_RX_POLY] = 0
+[SERDES_TX_POLY] = 0
+[SERDES_SWITCH] = 0
+[SERDES_GROUP] = 0
+
+[SERDES_ID] = 26
+[SERDES_MODE] = 3
+[SERDES_RX_POLY] = 0
+[SERDES_TX_POLY] = 0
+[SERDES_SWITCH] = 0
+[SERDES_GROUP] = 1
+
+[SERDES_ID] = 27
+[SERDES_MODE] = 3
+[SERDES_RX_POLY] = 0
+[SERDES_TX_POLY] = 0
+[SERDES_SWITCH] = 0
+[SERDES_GROUP] = 1
+
+[SERDES_ID] = 28
+[SERDES_MODE] = 3
+[SERDES_RX_POLY] = 0
+[SERDES_TX_POLY] = 0
+[SERDES_SWITCH] = 0
+[SERDES_GROUP] = 0
+
+[SERDES_ID] = 29
+[SERDES_MODE] = 3
+[SERDES_RX_POLY] = 0
+[SERDES_TX_POLY] = 0
+[SERDES_SWITCH] = 0
+[SERDES_GROUP] = 0
+
+[SERDES_ID] = 30
+[SERDES_MODE] = 3
+[SERDES_RX_POLY] = 0
+[SERDES_TX_POLY] = 0
+[SERDES_SWITCH] = 0
+[SERDES_GROUP] = 1
+
+[SERDES_ID] = 31
+[SERDES_MODE] = 3
+[SERDES_RX_POLY] = 0
+[SERDES_TX_POLY] = 0
+[SERDES_SWITCH] = 0
+[SERDES_GROUP] = 1
+
+#repeat end
+#}
+
+
+#[SERDES_TO_LPORT]
+#{
+#         | QSGMII/USXGMII-M2G5 | USXGMII-M5G | USXGMII-S | 100BASE-FX | SGMII/SGMII2G5/XFI | XAUI/DXAUI | XLG | XXVG | LG | CG
+#---------|---------------------|-------------|-----------|------------|--------------------|------------|-----|------|----|---
+#serdes 0 |0 /1 /2 /3           |NA           |NA         |NA          |NA                  |NA          |NA   |NA    |NA  |NA
+#serdes 1 |4 /5 /6 /7           |NA           |NA         |NA          |NA                  |NA          |NA   |NA    |NA  |NA
+#serdes 2 |16/17/18/19          |NA           |NA         |NA          |NA                  |NA          |NA   |NA    |NA  |NA
+#serdes 3 |20/21/22/23          |NA           |NA         |NA          |NA                  |NA          |NA   |NA    |NA  |NA
+#serdes 4 |8 /9 /10/11          |NA           |NA         |NA          |NA                  |NA          |NA   |NA    |NA  |NA
+#serdes 5 |32/33/34/35          |NA           |NA         |NA          |NA                  |NA          |NA   |NA    |NA  |NA
+#serdes 6 |36/37/38/39          |NA           |NA         |NA          |NA                  |NA          |NA   |NA    |NA  |NA
+#serdes 7 |40/41/42/43          |NA           |NA         |NA          |NA                  |NA          |NA   |NA    |NA  |NA
+#serdes 8 |24/25/26/27          |NA           |NA         |NA          |NA                  |NA          |NA   |NA    |NA  |NA
+#serdes 9 |48/49/50/51          |NA           |NA         |NA          |NA                  |NA          |NA   |NA    |NA  |NA
+#serdes 10|52/53/54/55          |NA           |NA         |NA          |NA                  |NA          |NA   |NA    |NA  |NA
+#serdes 11|56/57/58/59          |NA           |NA         |NA          |NA                  |NA          |NA   |NA    |NA  |NA
+#serdes 12|NA                   |NA           |NA         |12          |12                  |12          |12   |NA    |NA  |NA  
+#serdes 13|NA                   |NA           |NA         |13          |13                  |12          |12   |NA    |NA  |NA  
+#serdes 14|NA                   |NA           |NA         |14          |14                  |12          |12   |NA    |NA  |NA  
+#serdes 15|NA                   |NA           |NA         |15          |15                  |12          |12   |NA    |NA  |NA  
+#serdes 16|NA                   |NA           |NA         |NA          |NA                  |NA          |NA   |NA    |NA  |NA
+#serdes 17|NA                   |NA           |NA         |NA          |NA                  |NA          |NA   |NA    |NA  |NA
+#serdes 18|NA                   |NA           |NA         |NA          |NA                  |NA          |NA   |NA    |NA  |NA
+#serdes 19|NA                   |NA           |NA         |NA          |NA                  |NA          |NA   |NA    |NA  |NA
+#serdes 20|NA                   |NA           |NA         |NA          |NA                  |NA          |NA   |NA    |NA  |NA
+#serdes 21|NA                   |NA           |NA         |NA          |NA                  |NA          |NA   |NA    |NA  |NA
+#serdes 22|NA                   |NA           |NA         |NA          |NA                  |NA          |NA   |NA    |NA  |NA
+#serdes 23|NA                   |NA           |NA         |NA          |NA                  |NA          |NA   |NA    |NA  |NA
+#serdes 24|NA                   |NA           |NA         |NA          |NA                  |NA          |NA   |NA    |NA  |NA
+#serdes 25|NA                   |NA           |NA         |NA          |NA                  |NA          |NA   |NA    |NA  |NA
+#serdes 26|NA                   |NA           |NA         |NA          |NA                  |NA          |NA   |NA    |NA  |NA
+#serdes 27|NA                   |NA           |NA         |NA          |NA                  |NA          |NA   |NA    |NA  |NA
+#serdes 28|NA                   |NA           |NA         |NA          |NA                  |NA          |NA   |NA    |NA  |NA
+#serdes 29|NA                   |NA           |NA         |NA          |NA                  |NA          |NA   |NA    |NA  |NA
+#serdes 30|NA                   |NA           |NA         |NA          |NA                  |NA          |NA   |NA    |NA  |NA
+#serdes 31|NA                   |NA           |NA         |NA          |NA                  |NA          |NA   |NA    |NA  |NA
+#}
diff --git a/device/micas/arm64-micas_m2-w6010-48gt4x-fa-r0/M2-W6010-48GT4X-FA/default_sku b/device/micas/arm64-micas_m2-w6010-48gt4x-fa-r0/M2-W6010-48GT4X-FA/default_sku
new file mode 100644
index 000000000..c29b09ab9
--- /dev/null
+++ b/device/micas/arm64-micas_m2-w6010-48gt4x-fa-r0/M2-W6010-48GT4X-FA/default_sku
@@ -0,0 +1 @@
+M2-W6010-48GT4X-FA l1
diff --git a/device/micas/arm64-micas_m2-w6010-48gt4x-fa-r0/M2-W6010-48GT4X-FA/phy_mapping.cfg b/device/micas/arm64-micas_m2-w6010-48gt4x-fa-r0/M2-W6010-48GT4X-FA/phy_mapping.cfg
new file mode 100644
index 000000000..eefd67e9c
--- /dev/null
+++ b/device/micas/arm64-micas_m2-w6010-48gt4x-fa-r0/M2-W6010-48GT4X-FA/phy_mapping.cfg
@@ -0,0 +1,198 @@
+#######################PHY_MAPPING_48+4#######################
+
+#{
+[PHY_MAPPING_ITEM]
+
+[API_PORT] = 0
+[PHY_ADDR] = 0
+[MDIO_BUS] = 0
+
+[API_PORT] = 1
+[PHY_ADDR] = 1
+[MDIO_BUS] = 0
+
+[API_PORT] = 2
+[PHY_ADDR] = 2
+[MDIO_BUS] = 0
+
+[API_PORT] = 3
+[PHY_ADDR] = 3
+[MDIO_BUS] = 0
+
+[API_PORT] = 4
+[PHY_ADDR] = 4
+[MDIO_BUS] = 0
+
+[API_PORT] = 5
+[PHY_ADDR] = 5
+[MDIO_BUS] = 0
+
+[API_PORT] = 6
+[PHY_ADDR] = 6
+[MDIO_BUS] = 0
+
+[API_PORT] = 7
+[PHY_ADDR] = 7
+[MDIO_BUS] = 0
+
+[API_PORT] = 16
+[PHY_ADDR] = 8
+[MDIO_BUS] = 0
+
+[API_PORT] = 17
+[PHY_ADDR] = 9
+[MDIO_BUS] = 0
+
+[API_PORT] = 18
+[PHY_ADDR] = 10
+[MDIO_BUS] = 0
+
+[API_PORT] = 19
+[PHY_ADDR] = 11
+[MDIO_BUS] = 0
+
+[API_PORT] = 20
+[PHY_ADDR] = 12
+[MDIO_BUS] = 0
+
+[API_PORT] = 21
+[PHY_ADDR] = 13
+[MDIO_BUS] = 0
+
+[API_PORT] = 22
+[PHY_ADDR] = 14
+[MDIO_BUS] = 0
+
+[API_PORT] = 23
+[PHY_ADDR] = 15
+[MDIO_BUS] = 0
+
+[API_PORT] = 8
+[PHY_ADDR] = 16
+[MDIO_BUS] = 0
+
+[API_PORT] = 9
+[PHY_ADDR] = 17
+[MDIO_BUS] = 0
+
+[API_PORT] = 10
+[PHY_ADDR] = 18
+[MDIO_BUS] = 0
+
+[API_PORT] = 11
+[PHY_ADDR] = 19
+[MDIO_BUS] = 0
+
+[API_PORT] = 32
+[PHY_ADDR] = 20
+[MDIO_BUS] = 0
+
+[API_PORT] = 33
+[PHY_ADDR] = 21
+[MDIO_BUS] = 0
+
+[API_PORT] = 34
+[PHY_ADDR] = 22
+[MDIO_BUS] = 0
+
+[API_PORT] = 35
+[PHY_ADDR] = 23
+[MDIO_BUS] = 0
+
+[API_PORT] = 36
+[PHY_ADDR] = 0
+[MDIO_BUS] = 1
+
+[API_PORT] = 37
+[PHY_ADDR] = 1
+[MDIO_BUS] = 1
+
+[API_PORT] = 38
+[PHY_ADDR] = 2
+[MDIO_BUS] = 1
+
+[API_PORT] = 39
+[PHY_ADDR] = 3
+[MDIO_BUS] = 1
+
+[API_PORT] = 40
+[PHY_ADDR] = 4
+[MDIO_BUS] = 1
+
+[API_PORT] = 41
+[PHY_ADDR] = 5
+[MDIO_BUS] = 1
+
+[API_PORT] = 42
+[PHY_ADDR] = 6
+[MDIO_BUS] = 1
+
+[API_PORT] = 43
+[PHY_ADDR] = 7
+[MDIO_BUS] = 1
+
+[API_PORT] = 24
+[PHY_ADDR] = 8
+[MDIO_BUS] = 1
+
+[API_PORT] = 25
+[PHY_ADDR] = 9
+[MDIO_BUS] = 1
+
+[API_PORT] = 26
+[PHY_ADDR] = 10
+[MDIO_BUS] = 1
+
+[API_PORT] = 27
+[PHY_ADDR] = 11
+[MDIO_BUS] = 1
+
+[API_PORT] = 48
+[PHY_ADDR] = 12
+[MDIO_BUS] = 1
+
+[API_PORT] = 49
+[PHY_ADDR] = 13
+[MDIO_BUS] = 1
+
+[API_PORT] = 50
+[PHY_ADDR] = 14
+[MDIO_BUS] = 1
+
+[API_PORT] = 51
+[PHY_ADDR] = 15
+[MDIO_BUS] = 1
+
+[API_PORT] = 52
+[PHY_ADDR] = 16
+[MDIO_BUS] = 1
+
+[API_PORT] = 53
+[PHY_ADDR] = 17
+[MDIO_BUS] = 1
+
+[API_PORT] = 54
+[PHY_ADDR] = 18
+[MDIO_BUS] = 1
+
+[API_PORT] = 55
+[PHY_ADDR] = 19
+[MDIO_BUS] = 1
+
+[API_PORT] = 56
+[PHY_ADDR] = 20
+[MDIO_BUS] = 1
+
+[API_PORT] = 57
+[PHY_ADDR] = 21
+[MDIO_BUS] = 1
+
+[API_PORT] = 58
+[PHY_ADDR] = 22
+[MDIO_BUS] = 1
+
+[API_PORT] = 59
+[PHY_ADDR] = 23
+[MDIO_BUS] = 1
+
+#}
diff --git a/device/micas/arm64-micas_m2-w6010-48gt4x-fa-r0/M2-W6010-48GT4X-FA/platform_asic b/device/micas/arm64-micas_m2-w6010-48gt4x-fa-r0/M2-W6010-48GT4X-FA/platform_asic
new file mode 100644
index 000000000..0815c8a78
--- /dev/null
+++ b/device/micas/arm64-micas_m2-w6010-48gt4x-fa-r0/M2-W6010-48GT4X-FA/platform_asic
@@ -0,0 +1 @@
+centec-arm64
diff --git a/device/micas/arm64-micas_m2-w6010-48gt4x-fa-r0/M2-W6010-48GT4X-FA/port_config.ini b/device/micas/arm64-micas_m2-w6010-48gt4x-fa-r0/M2-W6010-48GT4X-FA/port_config.ini
new file mode 100644
index 000000000..cd9f488c5
--- /dev/null
+++ b/device/micas/arm64-micas_m2-w6010-48gt4x-fa-r0/M2-W6010-48GT4X-FA/port_config.ini
@@ -0,0 +1,53 @@
+# name            lanes          alias           index      speed       admin_status
+Ethernet1         0              eth-0-1         1          1000        up
+Ethernet2         1              eth-0-2         2          1000        up
+Ethernet3         2              eth-0-3         3          1000        up
+Ethernet4         3              eth-0-4         4          1000        up
+Ethernet5         4              eth-0-5         5          1000        up
+Ethernet6         5              eth-0-6         6          1000        up
+Ethernet7         6              eth-0-7         7          1000        up
+Ethernet8         7              eth-0-8         8          1000        up
+Ethernet9         16             eth-0-9         9          1000        up
+Ethernet10        17             eth-0-10        10         1000        up
+Ethernet11        18             eth-0-11        11         1000        up
+Ethernet12        19             eth-0-12        12         1000        up
+Ethernet13        20             eth-0-13        13         1000        up
+Ethernet14        21             eth-0-14        14         1000        up
+Ethernet15        22             eth-0-15        15         1000        up
+Ethernet16        23             eth-0-16        16         1000        up
+Ethernet17        8              eth-0-17        17         1000        up
+Ethernet18        9              eth-0-18        18         1000        up
+Ethernet19        10             eth-0-19        19         1000        up
+Ethernet20        11             eth-0-20        20         1000        up
+Ethernet21        32             eth-0-21        21         1000        up
+Ethernet22        33             eth-0-22        22         1000        up
+Ethernet23        34             eth-0-23        23         1000        up
+Ethernet24        35             eth-0-24        24         1000        up
+Ethernet25        36             eth-0-25        25         1000        up
+Ethernet26        37             eth-0-26        26         1000        up
+Ethernet27        38             eth-0-27        27         1000        up
+Ethernet28        39             eth-0-28        28         1000        up
+Ethernet29        40             eth-0-29        29         1000        up
+Ethernet30        41             eth-0-30        30         1000        up
+Ethernet31        42             eth-0-31        31         1000        up
+Ethernet32        43             eth-0-32        32         1000        up
+Ethernet33        24             eth-0-33        33         1000        up
+Ethernet34        25             eth-0-34        34         1000        up
+Ethernet35        26             eth-0-35        35         1000        up
+Ethernet36        27             eth-0-36        36         1000        up
+Ethernet37        48             eth-0-37        37         1000        up
+Ethernet38        49             eth-0-38        38         1000        up
+Ethernet39        50             eth-0-39        39         1000        up
+Ethernet40        51             eth-0-40        40         1000        up
+Ethernet41        52             eth-0-41        41         1000        up
+Ethernet42        53             eth-0-42        42         1000        up
+Ethernet43        54             eth-0-43        43         1000        up
+Ethernet44        55             eth-0-44        44         1000        up
+Ethernet45        56             eth-0-45        45         1000        up
+Ethernet46        57             eth-0-46        46         1000        up
+Ethernet47        58             eth-0-47        47         1000        up
+Ethernet48        59             eth-0-48        48         1000        up
+Ethernet49        12             eth-0-49        49         10000       up
+Ethernet50        13             eth-0-50        50         10000       up
+Ethernet51        14             eth-0-51        51         10000       up
+Ethernet52        15             eth-0-52        52         10000       up
diff --git a/device/micas/arm64-micas_m2-w6010-48gt4x-fa-r0/M2-W6010-48GT4X-FA/sai.profile b/device/micas/arm64-micas_m2-w6010-48gt4x-fa-r0/M2-W6010-48GT4X-FA/sai.profile
new file mode 100644
index 000000000..edeaddd8e
--- /dev/null
+++ b/device/micas/arm64-micas_m2-w6010-48gt4x-fa-r0/M2-W6010-48GT4X-FA/sai.profile
@@ -0,0 +1,4 @@
+SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/M2-w6010-48gt4x-fa-p-chip-profile.txt
+SAI_HW_PORT_PROFILE_ID_CONFIG_FILE=/usr/share/sonic/hwsku/M2-w6010-48gt4x-fa-p-datapath.txt
+SAI_PLATFORM_CFG_FILE=/usr/share/sonic/hwsku/M2-w6010-48gt4x-fa-board.json
+SAI_PHY_DRIVER_PATH=/usr/share/sonic/hwsku/phy_drv
\ No newline at end of file
diff --git a/device/micas/arm64-micas_m2-w6010-48gt4x-fa-r0/M2-W6010-48GT4X-FA/start_up.cfg b/device/micas/arm64-micas_m2-w6010-48gt4x-fa-r0/M2-W6010-48GT4X-FA/start_up.cfg
new file mode 100644
index 000000000..b012adedb
--- /dev/null
+++ b/device/micas/arm64-micas_m2-w6010-48gt4x-fa-r0/M2-W6010-48GT4X-FA/start_up.cfg
@@ -0,0 +1,48 @@
+
+chip set serdes 0  ffe mode user-define c0 0 c1 255 c2 10 c3 0 c4 0
+chip set serdes 1  ffe mode user-define c0 0 c1 240 c2 10 c3 0 c4 0
+chip set serdes 2  ffe mode user-define c0 0 c1 230 c2 10 c3 0 c4 0
+chip set serdes 3  ffe mode user-define c0 0 c1 220 c2 7  c3 0 c4 0
+chip set serdes 4  ffe mode user-define c0 0 c1 220 c2 8  c3 0 c4 0
+chip set serdes 5  ffe mode user-define c0 0 c1 210 c2 6  c3 0 c4 0
+chip set serdes 6  ffe mode user-define c0 0 c1 180 c2 6  c3 0 c4 0
+chip set serdes 7  ffe mode user-define c0 0 c1 180 c2 5  c3 0 c4 0
+chip set serdes 8  ffe mode user-define c0 2 c1 160 c2 4  c3 0 c4 0
+chip set serdes 9  ffe mode user-define c0 2 c1 160 c2 4  c3 0 c4 0
+chip set serdes 10 ffe mode user-define c0 3 c1 140 c2 9  c3 0 c4 0
+chip set serdes 11 ffe mode user-define c0 3 c1 140 c2 5  c3 0 c4 0
+chip set serdes 12 ffe mode user-define c0 3 c1 94 c2 15 c3 0 c4 0
+chip set serdes 13 ffe mode user-define c0 3 c1 94 c2 15 c3 0 c4 0
+chip set serdes 14 ffe mode user-define c0 3 c1 94 c2 15 c3 0 c4 0
+chip set serdes 15 ffe mode user-define c0 3 c1 94 c2 15 c3 0 c4 0
+
+
+chip set serdes 0  ctle 6 14 2
+chip set serdes 1  ctle 6 14 2
+chip set serdes 2  ctle 6 14 2
+chip set serdes 3  ctle 6 14 2
+chip set serdes 4  ctle 6 14 2
+chip set serdes 5  ctle 6 14 2
+chip set serdes 6  ctle 6 14 2
+chip set serdes 7  ctle 6 14 2
+chip set serdes 8  ctle 6 14 2
+chip set serdes 9  ctle 6 14 2
+chip set serdes 10 ctle 6 14 2
+chip set serdes 11 ctle 6 14 2
+
+
+
+# rtk eye param, post_amp|main_amp|pre_amp
+port 0  phy-attr type 2001 value 0x1c1e00
+port 4  phy-attr type 2001 value 0x101600
+port 16 phy-attr type 2001 value 0x111500
+port 20 phy-attr type 2001 value 0x0e1100
+port 8  phy-attr type 2001 value 0x0f1000
+port 32 phy-attr type 2001 value 0x0e0f00
+port 36 phy-attr type 2001 value 0x0a0a00
+port 40 phy-attr type 2001 value 0x0a0900
+port 24 phy-attr type 2001 value 0x000c00
+port 48 phy-attr type 2001 value 0x000b00
+port 52 phy-attr type 2001 value 0x000b00
+port 56 phy-attr type 2001 value 0x000a00
+
diff --git a/device/micas/arm64-micas_m2-w6010-48gt4x-fa-r0/default_sku b/device/micas/arm64-micas_m2-w6010-48gt4x-fa-r0/default_sku
new file mode 100644
index 000000000..c29b09ab9
--- /dev/null
+++ b/device/micas/arm64-micas_m2-w6010-48gt4x-fa-r0/default_sku
@@ -0,0 +1 @@
+M2-W6010-48GT4X-FA l1
diff --git a/device/micas/arm64-micas_m2-w6010-48gt4x-fa-r0/installer.conf b/device/micas/arm64-micas_m2-w6010-48gt4x-fa-r0/installer.conf
new file mode 100644
index 000000000..6e00c7ff7
--- /dev/null
+++ b/device/micas/arm64-micas_m2-w6010-48gt4x-fa-r0/installer.conf
@@ -0,0 +1,9 @@
+CONSOLE_SPEED=115200
+
+#fix env
+config_env(){
+    dd if=/dev/mtd1  of=env.bin
+    flashcp -v env.bin  /dev/mtd4
+}
+trap_push "config_env || true"
+
diff --git a/device/micas/arm64-micas_m2-w6010-48gt4x-fa-r0/platform.json b/device/micas/arm64-micas_m2-w6010-48gt4x-fa-r0/platform.json
new file mode 100644
index 000000000..36f541f1e
--- /dev/null
+++ b/device/micas/arm64-micas_m2-w6010-48gt4x-fa-r0/platform.json
@@ -0,0 +1,173 @@
+{
+    "chassis": {
+        "name": "M2-W6010-48GT4X-FA",
+        "thermal_manager": false,
+        "status_led": {
+            "controllable": false,
+            "colors": ["green", "blinking_green", "amber", "blinking_amber"]
+        },
+        "components": [
+            {
+                "name": "CPU CPLD"
+            },
+            {
+                "name": "MAC1 CPLD"
+            }
+        ],
+        "fans": [
+            {
+                "name": "Fantray1_1",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 30,
+                    "maximum": 99
+                },
+                "status_led": {
+                    "available": false,
+                    "colors": ["off", "red", "amber", "green"]
+                }
+            },
+            {
+                "name": "Fantray2_1",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 30,
+                    "maximum": 99
+                },
+                "status_led": {
+                    "available": false,
+                    "colors": ["off", "red", "amber", "green"]
+                }
+            }
+        ],
+        "fan_drawers":[
+            {
+                "name": "Fantray1",
+                "num_fans" : 1,
+                "status_led": {
+                    "controllable": false,
+                    "colors": ["amber", "green", "off"]
+                },
+                "fans": [
+                    {
+                        "name": "FanTray1_1",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 30,
+                            "maximum": 99
+                        },
+                        "status_led": {
+                            "available": false
+                        }
+                    }
+                ]
+            },
+            {
+                "name": "Fantray2",
+                "num_fans" : 1,
+                "status_led": {
+                    "controllable": false,
+                    "colors": ["amber", "green", "off"]
+                },
+                "fans": [
+                    {
+                        "name": "FanTray2_1",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 30,
+                            "maximum": 99
+                        },
+                        "status_led": {
+                            "available": false
+                        }
+                    }
+                ]
+            }
+        ],
+        "psus": [
+            {
+                "name": "PSU 1",
+                "voltage": true,
+                "current": true,
+                "power": true,
+                "max_power": false,
+                "voltage_high_threshold": true,
+                "voltage_low_threshold": true,
+                "temperature": true,
+                "fans_target_speed": false,
+                "status_led": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "PSU 2",
+                "voltage": true,
+                "current": true,
+                "power": true,
+                "max_power": false,
+                "voltage_high_threshold": true,
+                "voltage_low_threshold": true,
+                "temperature": true,
+                "fans_target_speed": false,
+                "status_led": {
+                    "controllable": false
+                }
+            }
+        ],
+        "thermals": [
+            {
+                "name": "ASIC_TEMP",
+                "controllable": false,
+                "low-crit-threshold": true,
+                "high-crit-threshold": true,
+                "low-threshold": true,
+                "high-threshold": true,
+                "minimum-recorded": true,
+                "maximum-recorded": true
+            },
+            {
+                "name": "CPU_TEMP",
+                "controllable": false,
+                "low-crit-threshold": true,
+                "high-crit-threshold": true,
+                "low-threshold": true,
+                "high-threshold": true,
+                "minimum-recorded": true,
+                "maximum-recorded": true
+            },
+            {
+                "name": "INLET_TEMP",
+                "controllable": false,
+                "low-crit-threshold": true,
+                "high-crit-threshold": true,
+                "low-threshold": true,
+                "high-threshold": true,
+                "minimum-recorded": true,
+                "maximum-recorded": true
+            },
+            {
+                "name": "OUTLET_TEMP",
+                "controllable": false,
+                "low-crit-threshold": true,
+                "high-crit-threshold": true,
+                "low-threshold": true,
+                "high-threshold": true,
+                "minimum-recorded": true,
+                "maximum-recorded": true
+            },
+            {
+                "name": "TPS53688_TEMP",
+                "controllable": false,
+                "low-crit-threshold": true,
+                "high-crit-threshold": true,
+                "low-threshold": true,
+                "high-threshold": true,
+                "minimum-recorded": true,
+                "maximum-recorded": true
+            }
+        ],
+        "modules": [],
+        "sfps": []
+    },
+    "interfaces": {}
+}
diff --git a/device/micas/arm64-micas_m2-w6010-48gt4x-fa-r0/platform_asic b/device/micas/arm64-micas_m2-w6010-48gt4x-fa-r0/platform_asic
new file mode 100644
index 000000000..0815c8a78
--- /dev/null
+++ b/device/micas/arm64-micas_m2-w6010-48gt4x-fa-r0/platform_asic
@@ -0,0 +1 @@
+centec-arm64
diff --git a/device/micas/arm64-micas_m2-w6010-48gt4x-fa-r0/plugins/sfputil.py b/device/micas/arm64-micas_m2-w6010-48gt4x-fa-r0/plugins/sfputil.py
new file mode 100644
index 000000000..c4fdbe2c3
--- /dev/null
+++ b/device/micas/arm64-micas_m2-w6010-48gt4x-fa-r0/plugins/sfputil.py
@@ -0,0 +1,428 @@
+# sfputil.py
+#
+# Platform-specific SFP transceiver interface for SONiC
+#
+
+try:
+    import time
+    import subprocess
+    import re
+    import os
+    import threading
+    from sonic_sfp.sfputilbase import SfpUtilBase
+except ImportError as e:
+    raise ImportError("%s - required module not found" % str(e))
+
+
+class SfpUtil(SfpUtilBase):
+    """Platform-specific SfpUtil class"""
+
+    PORT_START = 49
+    PORT_END = 52
+    PORTS_IN_BLOCK = 53
+    EEPROM_OFFSET = 9
+    SFP_DEVICE_TYPE = "optoe2"
+    QSFP_DEVICE_TYPE = "optoe1"
+    I2C_MAX_ATTEMPT = 3
+    
+    SFP_STATUS_INSERTED = '1'
+    SFP_STATUS_REMOVED = '0'
+
+    TXWRT_PROTECT = 0X4E
+    TXWRT_NO_PROTECT = 0X59
+    
+    _port_to_eeprom_mapping = {}
+    port_to_i2cbus_mapping ={}
+    port_dict = {}
+    port_presence_info = {}
+    port_reset_info = {}
+    port_txdis_info = {}
+    port_txwrt_info = {}
+    port_led_info = {}
+
+    port_rxlos_info = {}
+    port_txfault_info = {}
+    port_drop_info = {}
+    
+    @property
+    def port_start(self):
+        return self.PORT_START
+
+    @property
+    def port_end(self):
+        return self.PORT_END
+
+    @property
+    def sfp_ports(self):
+        return list(range(self.PORT_START, self.PORTS_IN_BLOCK))
+
+    @property
+    def qsfp_ports(self):
+        return []
+
+    @property
+    def port_to_eeprom_mapping(self):
+        return self._port_to_eeprom_mapping
+
+    def __init__(self):
+        for x in range(self.PORT_START, self.PORTS_IN_BLOCK):
+            self.port_to_i2cbus_mapping[x] = (x - self.PORT_START + self.EEPROM_OFFSET)
+        self.port_presence_info["/sys/bus/i2c/devices/3-0030/sfp_presence1"] = [49, 50, 51, 52]
+        self.port_txdis_info["/sys/bus/i2c/devices/3-0030/tx_disable"] = [49, 50, 51, 52]
+        self.port_txwrt_info["/sys/bus/i2c/devices/3-0030/tx_write_protect"] = [49, 50, 51, 52]
+        
+        # bit 1: los
+        self.port_rxlos_info["/sys/bus/i2c/devices/3-0030/sfp_rx_loss1"] = [49, 50, 51, 52]
+        
+        # bit 1: fault
+        self.port_txfault_info["/sys/bus/i2c/devices/3-0030/sfp_tx_fault1"] = [49, 50, 51, 52]
+        
+        # bit 1: drop
+        self.port_drop_info["/sys/bus/i2c/devices/3-0030/sfp_drop_record1"] = [49, 50, 51, 52]
+        
+        SfpUtilBase.__init__(self)
+
+    def _sfp_read_file_path(self, file_path, offset, num_bytes):
+        attempts = 0
+        while attempts < self.I2C_MAX_ATTEMPT:
+            try:
+                file_path.seek(offset)
+                read_buf = file_path.read(num_bytes)
+            except Exception:
+                attempts += 1
+                time.sleep(0.05)
+            else:
+                return True, read_buf
+        return False, None
+
+    def _sfp_eeprom_present(self, sysfs_sfp_i2c_client_eeprompath, offset):
+        """Tries to read the eeprom file to determine if the
+        device/sfp is present or not. If sfp present, the read returns
+        valid bytes. If not, read returns error 'Connection timed out"""
+
+        if not os.path.exists(sysfs_sfp_i2c_client_eeprompath):
+            return False
+        else:
+            with open(sysfs_sfp_i2c_client_eeprompath, "rb", buffering=0) as sysfsfile:
+                rv, buf = self._sfp_read_file_path(sysfsfile, offset, 1)
+                return rv
+
+    def _add_new_sfp_device(self, sysfs_sfp_i2c_adapter_path, devaddr, devtype):
+        try:
+            sysfs_nd_path = "%s/new_device" % sysfs_sfp_i2c_adapter_path
+
+            # Write device address to new_device file
+            nd_file = open(sysfs_nd_path, "w")
+            nd_str = "%s %s" % (devtype, hex(devaddr))
+            nd_file.write(nd_str)
+            nd_file.close()
+
+        except Exception as err:
+            print(("Error writing to new device file: %s" % str(err)))
+            return 1
+        else:
+            return 0
+
+    def _get_port_eeprom_path(self, port_num, devid):
+        if port_num in list(self.port_to_eeprom_mapping.keys()):
+            sysfs_sfp_i2c_client_eeprom_path = self.port_to_eeprom_mapping[port_num]
+        else:
+            sysfs_i2c_adapter_base_path = "/sys/class/i2c-adapter"
+
+            i2c_adapter_id = self._get_port_i2c_adapter_id(port_num)
+            if i2c_adapter_id is None:
+                print("Error getting i2c bus num")
+                return None
+
+            # Get i2c virtual bus path for the sfp
+            sysfs_sfp_i2c_adapter_path = "%s/i2c-%s" % (sysfs_i2c_adapter_base_path,
+                                                        str(i2c_adapter_id))
+
+            # If i2c bus for port does not exist
+            if not os.path.exists(sysfs_sfp_i2c_adapter_path):
+                print(("Could not find i2c bus %s. Driver not loaded?" % sysfs_sfp_i2c_adapter_path))
+                return None
+
+            sysfs_sfp_i2c_client_path = "%s/%s-00%s" % (sysfs_sfp_i2c_adapter_path,
+                                                        str(i2c_adapter_id),
+                                                        hex(devid)[-2:])
+
+            # If sfp device is not present on bus, Add it
+            if not os.path.exists(sysfs_sfp_i2c_client_path):
+                if port_num in self.qsfp_ports:
+                    ret = self._add_new_sfp_device(
+                            sysfs_sfp_i2c_adapter_path, devid, self.QSFP_DEVICE_TYPE)
+                else:
+                    ret = self._add_new_sfp_device(
+                            sysfs_sfp_i2c_adapter_path, devid, self.SFP_DEVICE_TYPE)
+                if ret != 0:
+                    print("Error adding sfp device")
+                    return None
+
+            sysfs_sfp_i2c_client_eeprom_path = "%s/eeprom" % sysfs_sfp_i2c_client_path
+        return sysfs_sfp_i2c_client_eeprom_path
+
+    def _read_eeprom_specific_bytes(self, sysfsfile_eeprom, offset, num_bytes):
+        eeprom_raw = []
+        for i in range(0, num_bytes):
+            eeprom_raw.append("0x00")
+
+        rv, raw = self._sfp_read_file_path(sysfsfile_eeprom, offset, num_bytes)
+        if rv == False:
+            return None
+
+        try:
+            if isinstance(raw, str):
+                for n in range(0, num_bytes):
+                    eeprom_raw[n] = hex(ord(raw[n]))[2:].zfill(2)
+            else:
+                for n in range(0, num_bytes):
+                    eeprom_raw[n] = hex(raw[n])[2:].zfill(2)
+        except Exception as err:
+            return None
+        return eeprom_raw
+
+    def get_eeprom_dom_raw(self, port_num):
+        if port_num in self.qsfp_ports:
+            # QSFP DOM EEPROM is also at addr 0x50 and thus also stored in eeprom_ifraw
+            return None
+        else:
+            # Read dom eeprom at addr 0x51
+            return self._read_eeprom_devid(port_num, self.IDENTITY_EEPROM_ADDR, 256)
+
+    def get_presence(self, port_num):
+        # Check for invalid port_num
+        if port_num < self.port_start or port_num > self.port_end:
+            return False
+
+        presence_path = None
+        for presence_key in self.port_presence_info:
+            if port_num in self.port_presence_info[presence_key]:
+                presence_path = presence_key
+                presence_offset = self.port_presence_info[presence_key].index(port_num)
+                break
+        if presence_path == None:
+            return False
+
+        try:
+            data = open(presence_path, "rb")
+        except IOError:
+            return False
+
+        presence_data = data.read(2)
+        if presence_data == "":
+            return False
+        result = int(presence_data, 16)
+        data.close()
+
+        # ModPrsL is active low
+        if result & (1 << presence_offset) == 0:
+            return True
+
+        return False
+
+    def get_low_power_mode(self, port_num):
+        return False
+
+    def set_low_power_mode(self, port_num, lpmode):
+        return False
+
+    def reset(self, port_num):
+        return False
+
+    def reset_all(self):
+        return False
+
+    def _do_write_file(self, file_handle, offset, value):
+        file_handle.seek(offset)
+        file_handle.write(hex(value))
+
+    def get_transceiver_change_event(self, timeout=0):
+
+        start_time = time.time()
+        currernt_port_dict = {}
+        forever = False
+
+        if timeout == 0:
+            forever = True
+        elif timeout > 0:
+            timeout = timeout / float(1000) # Convert to secs
+        else:
+            print(("get_transceiver_change_event:Invalid timeout value", timeout))
+            return False, {}
+
+        end_time = start_time + timeout
+        if start_time > end_time:
+            print(('get_transceiver_change_event:' \
+                       'time wrap / invalid timeout value', timeout))
+
+            return False, {} # Time wrap or possibly incorrect timeout
+
+        while timeout >= 0:
+            # Check for OIR events and return updated port_dict
+            for x in range(self.PORT_START, self.PORTS_IN_BLOCK):
+                if self.get_presence(x):
+                    currernt_port_dict[x] = self.SFP_STATUS_INSERTED
+                else:
+                    currernt_port_dict[x] = self.SFP_STATUS_REMOVED
+            if (currernt_port_dict == self.port_dict):
+                if forever:
+                    time.sleep(1)
+                else:
+                    timeout = end_time - time.time()
+                    if timeout >= 1:
+                        time.sleep(1) # We poll at 1 second granularity
+                    else:
+                        if timeout > 0:
+                            time.sleep(timeout)
+                        return True, {}
+            else:
+                # Update reg value
+                self.port_dict = currernt_port_dict
+                return True, self.port_dict
+        print ("get_transceiver_change_event: Should not reach here.")
+        return False, {}
+
+    def tx_disable(self, port_num, disable):
+        if not self.get_presence(port_num):
+            return False
+        
+        if port_num in self.sfp_ports:
+            txwrt_path = None
+            txdis_path = None
+            txdis_offset = 0
+            
+            for key in self.port_txwrt_info:
+                if port_num in self.port_txwrt_info[key]:
+                    txwrt_path = key
+                    break
+            if txwrt_path == None:
+                return False
+            
+            for key in self.port_txdis_info:
+                if port_num in self.port_txdis_info[key]:
+                    txdis_path = key
+                    txdis_offset = self.port_txdis_info[key].index(port_num)
+                    break
+            if txdis_path == None:
+                return False
+            
+            
+            try:
+                with open(txwrt_path, "r+") as sys_file:
+                    sres = hex(self.TXWRT_NO_PROTECT)[2:]
+                    sys_file.write(sres)
+                
+                with open(txdis_path, "r+") as sys_file:
+                    txdis_data = sys_file.read(2)
+                    if not txdis_data:
+                        return False
+                    result = int(txdis_data, 16)
+                    if disable:
+                        result = result | (1 << txdis_offset)
+                    else:
+                        result = result & (~(1 << txdis_offset))
+                    sys_file.seek(0)
+                    sres = hex(result)[2:]
+                    print(result,sres)
+                    sys_file.write(sres)
+                
+                with open(txwrt_path, "r+") as sys_file:
+                    sres = hex(self.TXWRT_PROTECT)[2:]
+                    sys_file.write(sres)
+            except Exception as err:
+                print(err)
+                return False
+            
+            return True
+        else:
+            return False
+
+########### sysdiag ###########
+    def _get_cpld_info(self, port_num, info):
+        path = None
+        offset = 0
+        for key in info:
+            if port_num in info[key]:
+                path = key
+                offset = info[key].index(port_num)
+                break
+        return path, offset
+
+    def get_tx_disable(self, port_num):
+        # cur only support sfp moudle
+        if port_num not in self.sfp_ports:
+            return False
+        
+        if not self.get_presence(port_num):
+            return False
+        
+        path, offset = self._get_cpld_info(port_num, self.port_txdis_info)
+        if path == None:
+            return False
+        
+        result = 0
+        try:
+            with open(path, "r") as sys_file:
+                data = sys_file.read(2)
+                result = int(data, 16)
+        except Exception as e:
+            print((str(e)))
+            return False
+        
+        # 1: disable
+        if result & (1 << offset):
+            return True
+        else:
+            return False
+    
+    def get_rx_los(self, port_num):
+        # cur only support sfp moudle
+        if port_num not in self.sfp_ports:
+            return False
+        
+        path, offset = self._get_cpld_info(port_num, self.port_rxlos_info)
+        if path == None:
+            return False
+        
+        result = 0
+        try:
+            with open(path, "r") as sys_file:
+                data = sys_file.read(2)
+                result = int(data, 16)
+        except Exception as e:
+            print((str(e)))
+            return False
+        
+        # 1: los
+        if result & (1 << offset):
+            return True
+        else:
+            return False
+    
+    def get_tx_fault(self, port_num):
+        # cur only support sfp moudle
+        if port_num not in self.sfp_ports:
+            return False
+        
+        if not self.get_presence(port_num):
+            return False
+        
+        path, offset = self._get_cpld_info(port_num, self.port_txfault_info)
+        if path == None:
+            return False
+        
+        result = 0
+        try:
+            with open(path, "r") as sys_file:
+                data = sys_file.read(2)
+                result = int(data, 16)
+        except Exception as e:
+            print((str(e)))
+            return False
+        
+        # 1: fault
+        if result & (1 << offset):
+            return True
+
+        return False
diff --git a/device/micas/arm64-micas_m2-w6010-48gt4x-fa-r0/plugins/ssd_util.py b/device/micas/arm64-micas_m2-w6010-48gt4x-fa-r0/plugins/ssd_util.py
new file mode 100644
index 000000000..95ca23e8b
--- /dev/null
+++ b/device/micas/arm64-micas_m2-w6010-48gt4x-fa-r0/plugins/ssd_util.py
@@ -0,0 +1,112 @@
+#
+# ssd_util.py
+#
+# Generic implementation of the SSD health API
+# SSD models supported:
+#  - InnoDisk
+#  - StorFly
+#  - Virtium
+
+try:
+    import subprocess
+    from sonic_platform_base.sonic_ssd.ssd_base import SsdBase
+except ImportError as e:
+    raise ImportError (str(e) + "- required module not found")
+
+HEALTH_CMD = "cat /sys/kernel/debug/mmc0/mmc0:0001/ext_csd | cut -c 537-538"
+SERIAL_CMD = "cat /sys/bus/mmc/devices/mmc0\\:0001/serial"
+FIRMWARE_CMD = "cat /sys/kernel/debug/mmc0/mmc0:0001/ext_csd | cut -c 509-522"
+NOT_AVAILABLE = "N/A"
+
+class SsdUtil(SsdBase):
+    """
+    Generic implementation of the SSD health API
+    """
+    def __init__(self, diskdev):
+        self.model = "KLMCG4JETD-B041"
+        self.temperature = NOT_AVAILABLE
+        self.vendor_ssd_info = "====No vendor information===="
+        self.health_list = [100,90,80,70,60,50,40,30,20,10,0]
+        try:
+            life_time = self._execute_shell(HEALTH_CMD)
+            if int(life_time) in range(1,12):
+                self.health = self.health_list[int(life_time) - 1]
+            else:
+                self.health = NOT_AVAILABLE
+        except Exception as e:
+            self.health = NOT_AVAILABLE
+
+        try:
+            self.firmware = self._execute_shell(FIRMWARE_CMD)
+        except Exception as e:
+            self.firmware = NOT_AVAILABLE
+
+        try:
+            serial = self._execute_shell(SERIAL_CMD)
+            self.serial = serial.replace("0x",'')
+        except Exception as e:
+            self.serial = NOT_AVAILABLE
+
+    def _execute_shell(self, cmd):
+        status, output = subprocess.getstatusoutput(cmd)
+        if status:
+            return None
+
+        return output
+
+    def get_health(self):
+        """
+        Retrieves current disk health in percentages
+
+        Returns:
+            A float number of current ssd health
+            e.g. 83.5
+        """
+        return self.health
+
+    def get_temperature(self):
+        """
+        Retrieves current disk temperature in Celsius
+
+        Returns:
+            A float number of current temperature in Celsius
+            e.g. 40.1
+        """
+        return self.temperature
+
+    def get_model(self):
+        """
+        Retrieves model for the given disk device
+
+        Returns:
+            A string holding disk model as provided by the manufacturer
+        """
+        return self.model
+
+    def get_firmware(self):
+        """
+        Retrieves firmware version for the given disk device
+
+        Returns:
+            A string holding disk firmware version as provided by the manufacturer
+        """
+        return self.firmware
+
+    def get_serial(self):
+        """
+        Retrieves serial number for the given disk device
+
+        Returns:
+            A string holding disk serial number as provided by the manufacturer
+        """
+        return self.serial
+
+    def get_vendor_output(self):
+        """
+        Retrieves vendor specific data for the given disk device
+
+        Returns:
+            A string holding some vendor specific disk information
+        """
+        return self.vendor_ssd_info
+
diff --git a/device/micas/arm64-micas_m2-w6010-48gt4x-fa-r0/pmon_daemon_control.json b/device/micas/arm64-micas_m2-w6010-48gt4x-fa-r0/pmon_daemon_control.json
new file mode 100644
index 000000000..5fdf83f1b
--- /dev/null
+++ b/device/micas/arm64-micas_m2-w6010-48gt4x-fa-r0/pmon_daemon_control.json
@@ -0,0 +1,7 @@
+{
+    "skip_ledd": true,
+    "skip_xcvrd": false,
+    "skip_syseepromd": false,
+    "skip_thermalctld": false,
+    "skip_psud": false
+}
diff --git a/device/micas/arm64-micas_m2-w6010-48gt4x-fa-r0/system_health_monitoring_config.json b/device/micas/arm64-micas_m2-w6010-48gt4x-fa-r0/system_health_monitoring_config.json
new file mode 100644
index 000000000..e69de29bb
diff --git a/device/micas/arm64-micas_m2-w6010-48gt4x-ra-r0/M2-W6010-48GT4X-RA/M2-w6010-48gt4x-ra-board.json b/device/micas/arm64-micas_m2-w6010-48gt4x-ra-r0/M2-W6010-48GT4X-RA/M2-w6010-48gt4x-ra-board.json
new file mode 100644
index 000000000..80fb22238
--- /dev/null
+++ b/device/micas/arm64-micas_m2-w6010-48gt4x-ra-r0/M2-W6010-48GT4X-RA/M2-w6010-48gt4x-ra-board.json
@@ -0,0 +1,868 @@
+{
+    "macleds" : {
+        "polarity" : 1,
+        "freq"     : 2500,
+        "interval" : 50000000,
+        "maps" : [
+            {
+                "port_id" : 0,
+                "lchip"   : 0,
+                "ctl_id"  : 0,
+                "mode"    : "LED_MODE_1_RXLNK_BIACT",
+                "fixed"   : 0,
+                "sysfs_path" : "/sys/class/leds/port1/brightness"
+            },
+            {
+                "port_id" : 1,
+                "lchip"   : 0,
+                "ctl_id"  : 0,
+                "mode"    : "LED_MODE_1_RXLNK_BIACT",
+                "fixed"   : 0,
+                "sysfs_path" : "/sys/class/leds/port2/brightness"
+            },
+            {
+                "port_id" : 2,
+                "lchip"   : 0,
+                "ctl_id"  : 0,
+                "mode"    : "LED_MODE_1_RXLNK_BIACT",
+                "fixed"   : 0,
+                "sysfs_path" : "/sys/class/leds/port3/brightness"
+            },
+            {
+                "port_id" : 3,
+                "lchip"   : 0,
+                "ctl_id"  : 0,
+                "mode"    : "LED_MODE_1_RXLNK_BIACT",
+                "fixed"   : 0,
+                "sysfs_path" : "/sys/class/leds/port4/brightness"
+            },
+            {
+                "port_id" : 4,
+                "lchip"   : 0,
+                "ctl_id"  : 0,
+                "mode"    : "LED_MODE_1_RXLNK_BIACT",
+                "fixed"   : 0,
+                "sysfs_path" : "/sys/class/leds/port5/brightness"
+            },
+            {
+                "port_id" : 5,
+                "lchip"   : 0,
+                "ctl_id"  : 0,
+                "mode"    : "LED_MODE_1_RXLNK_BIACT",
+                "fixed"   : 0,
+                "sysfs_path" : "/sys/class/leds/port6/brightness"
+            },
+            {
+                "port_id" : 6,
+                "lchip"   : 0,
+                "ctl_id"  : 0,
+                "mode"    : "LED_MODE_1_RXLNK_BIACT",
+                "fixed"   : 0,
+                "sysfs_path" : "/sys/class/leds/port7/brightness"
+            },
+            {
+                "port_id" : 7,
+                "lchip"   : 0,
+                "ctl_id"  : 0,
+                "mode"    : "LED_MODE_1_RXLNK_BIACT",
+                "fixed"   : 0,
+                "sysfs_path" : "/sys/class/leds/port8/brightness"
+            },
+            {
+                "port_id" : 16,
+                "lchip"   : 0,
+                "ctl_id"  : 0,
+                "mode"    : "LED_MODE_1_RXLNK_BIACT",
+                "fixed"   : 0,
+                "sysfs_path" : "/sys/class/leds/port9/brightness"
+            },
+            {
+                "port_id" : 17,
+                "lchip"   : 0,
+                "ctl_id"  : 0,
+                "mode"    : "LED_MODE_1_RXLNK_BIACT",
+                "fixed"   : 0,
+                "sysfs_path" : "/sys/class/leds/port10/brightness"
+            },
+            {
+                "port_id" : 18,
+                "lchip"   : 0,
+                "ctl_id"  : 0,
+                "mode"    : "LED_MODE_1_RXLNK_BIACT",
+                "fixed"   : 0,
+                "sysfs_path" : "/sys/class/leds/port11/brightness"
+            },
+            {
+                "port_id" : 19,
+                "lchip"   : 0,
+                "ctl_id"  : 0,
+                "mode"    : "LED_MODE_1_RXLNK_BIACT",
+                "fixed"   : 0,
+                "sysfs_path" : "/sys/class/leds/port12/brightness"
+            },
+            {
+                "port_id" : 20,
+                "lchip"   : 0,
+                "ctl_id"  : 0,
+                "mode"    : "LED_MODE_1_RXLNK_BIACT",
+                "fixed"   : 0,
+                "sysfs_path" : "/sys/class/leds/port13/brightness"
+            },
+            {
+                "port_id" : 21,
+                "lchip"   : 0,
+                "ctl_id"  : 0,
+                "mode"    : "LED_MODE_1_RXLNK_BIACT",
+                "fixed"   : 0,
+                "sysfs_path" : "/sys/class/leds/port14/brightness"
+            },
+            {
+                "port_id" : 22,
+                "lchip"   : 0,
+                "ctl_id"  : 0,
+                "mode"    : "LED_MODE_1_RXLNK_BIACT",
+                "fixed"   : 0,
+                "sysfs_path" : "/sys/class/leds/port15/brightness"
+            },
+            {
+                "port_id" : 23,
+                "lchip"   : 0,
+                "ctl_id"  : 0,
+                "mode"    : "LED_MODE_1_RXLNK_BIACT",
+                "fixed"   : 0,
+                "sysfs_path" : "/sys/class/leds/port16/brightness"
+            },
+            {
+                "port_id" : 8,
+                "lchip"   : 0,
+                "ctl_id"  : 0,
+                "mode"    : "LED_MODE_1_RXLNK_BIACT",
+                "fixed"   : 0,
+                "sysfs_path" : "/sys/class/leds/port17/brightness"
+            },
+            {
+                "port_id" : 9,
+                "lchip"   : 0,
+                "ctl_id"  : 0,
+                "mode"    : "LED_MODE_1_RXLNK_BIACT",
+                "fixed"   : 0,
+                "sysfs_path" : "/sys/class/leds/port18/brightness"
+            },
+            {
+                "port_id" : 10,
+                "lchip"   : 0,
+                "ctl_id"  : 0,
+                "mode"    : "LED_MODE_1_RXLNK_BIACT",
+                "fixed"   : 0,
+                "sysfs_path" : "/sys/class/leds/port19/brightness"
+            },
+            {
+                "port_id" : 11,
+                "lchip"   : 0,
+                "ctl_id"  : 0,
+                "mode"    : "LED_MODE_1_RXLNK_BIACT",
+                "fixed"   : 0,
+                "sysfs_path" : "/sys/class/leds/port20/brightness"
+            },
+            {
+                "port_id" : 32,
+                "lchip"   : 0,
+                "ctl_id"  : 0,
+                "mode"    : "LED_MODE_1_RXLNK_BIACT",
+                "fixed"   : 0,
+                "sysfs_path" : "/sys/class/leds/port21/brightness"
+            },
+            {
+                "port_id" : 33,
+                "lchip"   : 0,
+                "ctl_id"  : 0,
+                "mode"    : "LED_MODE_1_RXLNK_BIACT",
+                "fixed"   : 0,
+                "sysfs_path" : "/sys/class/leds/port22/brightness"
+            },
+            {
+                "port_id" : 34,
+                "lchip"   : 0,
+                "ctl_id"  : 0,
+                "mode"    : "LED_MODE_1_RXLNK_BIACT",
+                "fixed"   : 0,
+                "sysfs_path" : "/sys/class/leds/port23/brightness"
+            },
+            {
+                "port_id" : 35,
+                "lchip"   : 0,
+                "ctl_id"  : 0,
+                "mode"    : "LED_MODE_1_RXLNK_BIACT",
+                "fixed"   : 0,
+                "sysfs_path" : "/sys/class/leds/port24/brightness"
+            },
+            {
+                "port_id" : 36,
+                "lchip"   : 0,
+                "ctl_id"  : 0,
+                "mode"    : "LED_MODE_1_RXLNK_BIACT",
+                "fixed"   : 0,
+                "sysfs_path" : "/sys/class/leds/port25/brightness"
+            },
+            {
+                "port_id" : 37,
+                "lchip"   : 0,
+                "ctl_id"  : 0,
+                "mode"    : "LED_MODE_1_RXLNK_BIACT",
+                "fixed"   : 0,
+                "sysfs_path" : "/sys/class/leds/port26/brightness"
+            },
+            {
+                "port_id" : 38,
+                "lchip"   : 0,
+                "ctl_id"  : 0,
+                "mode"    : "LED_MODE_1_RXLNK_BIACT",
+                "fixed"   : 0,
+                "sysfs_path" : "/sys/class/leds/port27/brightness"
+            },
+            {
+                "port_id" : 39,
+                "lchip"   : 0,
+                "ctl_id"  : 0,
+                "mode"    : "LED_MODE_1_RXLNK_BIACT",
+                "fixed"   : 0,
+                "sysfs_path" : "/sys/class/leds/port28/brightness"
+            },
+            {
+                "port_id" : 40,
+                "lchip"   : 0,
+                "ctl_id"  : 0,
+                "mode"    : "LED_MODE_1_RXLNK_BIACT",
+                "fixed"   : 0,
+                "sysfs_path" : "/sys/class/leds/port29/brightness"
+            },
+            {
+                "port_id" : 41,
+                "lchip"   : 0,
+                "ctl_id"  : 0,
+                "mode"    : "LED_MODE_1_RXLNK_BIACT",
+                "fixed"   : 0,
+                "sysfs_path" : "/sys/class/leds/port30/brightness"
+            },
+            {
+                "port_id" : 42,
+                "lchip"   : 0,
+                "ctl_id"  : 0,
+                "mode"    : "LED_MODE_1_RXLNK_BIACT",
+                "fixed"   : 0,
+                "sysfs_path" : "/sys/class/leds/port31/brightness"
+            },
+            {
+                "port_id" : 43,
+                "lchip"   : 0,
+                "ctl_id"  : 0,
+                "mode"    : "LED_MODE_1_RXLNK_BIACT",
+                "fixed"   : 0,
+                "sysfs_path" : "/sys/class/leds/port32/brightness"
+            },
+            {
+                "port_id" : 24,
+                "lchip"   : 0,
+                "ctl_id"  : 0,
+                "mode"    : "LED_MODE_1_RXLNK_BIACT",
+                "fixed"   : 0,
+                "sysfs_path" : "/sys/class/leds/port33/brightness"
+            },
+            {
+                "port_id" : 25,
+                "lchip"   : 0,
+                "ctl_id"  : 0,
+                "mode"    : "LED_MODE_1_RXLNK_BIACT",
+                "fixed"   : 0,
+                "sysfs_path" : "/sys/class/leds/port34/brightness"
+            },
+            {
+                "port_id" : 26,
+                "lchip"   : 0,
+                "ctl_id"  : 0,
+                "mode"    : "LED_MODE_1_RXLNK_BIACT",
+                "fixed"   : 0,
+                "sysfs_path" : "/sys/class/leds/port35/brightness"
+            },
+            {
+                "port_id" : 27,
+                "lchip"   : 0,
+                "ctl_id"  : 0,
+                "mode"    : "LED_MODE_1_RXLNK_BIACT",
+                "fixed"   : 0,
+                "sysfs_path" : "/sys/class/leds/port36/brightness"
+            },
+            {
+                "port_id" : 48,
+                "lchip"   : 0,
+                "ctl_id"  : 0,
+                "mode"    : "LED_MODE_1_RXLNK_BIACT",
+                "fixed"   : 0,
+                "sysfs_path" : "/sys/class/leds/port37/brightness"
+            },
+            {
+                "port_id" : 49,
+                "lchip"   : 0,
+                "ctl_id"  : 0,
+                "mode"    : "LED_MODE_1_RXLNK_BIACT",
+                "fixed"   : 0,
+                "sysfs_path" : "/sys/class/leds/port38/brightness"
+            },
+            {
+                "port_id" : 50,
+                "lchip"   : 0,
+                "ctl_id"  : 0,
+                "mode"    : "LED_MODE_1_RXLNK_BIACT",
+                "fixed"   : 0,
+                "sysfs_path" : "/sys/class/leds/port39/brightness"
+            },
+            {
+                "port_id" : 51,
+                "lchip"   : 0,
+                "ctl_id"  : 0,
+                "mode"    : "LED_MODE_1_RXLNK_BIACT",
+                "fixed"   : 0,
+                "sysfs_path" : "/sys/class/leds/port40/brightness"
+            },
+            {
+                "port_id" : 52,
+                "lchip"   : 0,
+                "ctl_id"  : 0,
+                "mode"    : "LED_MODE_1_RXLNK_BIACT",
+                "fixed"   : 0,
+                "sysfs_path" : "/sys/class/leds/port41/brightness"
+            },
+            {
+                "port_id" : 53,
+                "lchip"   : 0,
+                "ctl_id"  : 0,
+                "mode"    : "LED_MODE_1_RXLNK_BIACT",
+                "fixed"   : 0,
+                "sysfs_path" : "/sys/class/leds/port42/brightness"
+            },
+            {
+                "port_id" : 54,
+                "lchip"   : 0,
+                "ctl_id"  : 0,
+                "mode"    : "LED_MODE_1_RXLNK_BIACT",
+                "fixed"   : 0,
+                "sysfs_path" : "/sys/class/leds/port43/brightness"
+            },
+            {
+                "port_id" : 55,
+                "lchip"   : 0,
+                "ctl_id"  : 0,
+                "mode"    : "LED_MODE_1_RXLNK_BIACT",
+                "fixed"   : 0,
+                "sysfs_path" : "/sys/class/leds/port44/brightness"
+            },
+            {
+                "port_id" : 56,
+                "lchip"   : 0,
+                "ctl_id"  : 0,
+                "mode"    : "LED_MODE_1_RXLNK_BIACT",
+                "fixed"   : 0,
+                "sysfs_path" : "/sys/class/leds/port45/brightness"
+            },
+            {
+                "port_id" : 57,
+                "lchip"   : 0,
+                "ctl_id"  : 0,
+                "mode"    : "LED_MODE_1_RXLNK_BIACT",
+                "fixed"   : 0,
+                "sysfs_path" : "/sys/class/leds/port46/brightness"
+            },
+            {
+                "port_id" : 58,
+                "lchip"   : 0,
+                "ctl_id"  : 0,
+                "mode"    : "LED_MODE_1_RXLNK_BIACT",
+                "fixed"   : 0,
+                "sysfs_path" : "/sys/class/leds/port47/brightness"
+            },
+            {
+                "port_id" : 59,
+                "lchip"   : 0,
+                "ctl_id"  : 0,
+                "mode"    : "LED_MODE_1_RXLNK_BIACT",
+                "fixed"   : 0,
+                "sysfs_path" : "/sys/class/leds/port48/brightness"
+            },
+            {
+                "port_id" : 12,
+                "lchip"   : 0,
+                "ctl_id"  : 0,
+                "mode"    : "LED_MODE_1_RXLNK_BIACT",
+                "fixed"   : 0,
+                "sysfs_path" : "/sys/class/leds/port49/brightness"
+            },
+            {
+                "port_id" : 13,
+                "lchip"   : 0,
+                "ctl_id"  : 0,
+                "mode"    : "LED_MODE_1_RXLNK_BIACT",
+                "fixed"   : 0,
+                "sysfs_path" : "/sys/class/leds/port50/brightness"
+            },
+            {
+                "port_id" : 14,
+                "lchip"   : 0,
+                "ctl_id"  : 0,
+                "mode"    : "LED_MODE_1_RXLNK_BIACT",
+                "fixed"   : 0,
+                "sysfs_path" : "/sys/class/leds/port51/brightness"
+            },
+            {
+                "port_id" : 15,
+                "lchip"   : 0,
+                "ctl_id"  : 0,
+                "mode"    : "LED_MODE_1_RXLNK_BIACT",
+                "fixed"   : 0,
+                "sysfs_path" : "/sys/class/leds/port52/brightness"
+            }
+        ]
+    },
+    "phys" : [
+        {
+            "macid" : 0,
+            "busid" : 0,
+            "addr"  : 0,
+            "base_port": 1,
+            "last_port": 4
+        },
+        {
+            "macid" : 1,
+            "busid" : 0,
+            "addr"  : 1,
+            "base_port": 1,
+            "last_port": 4
+        },
+        {
+            "macid" : 2,
+            "busid" : 0,
+            "addr"  : 2,
+            "base_port": 1,
+            "last_port": 4
+        },
+        {
+            "macid" : 3,
+            "busid" : 0,
+            "addr"  : 3,
+            "base_port": 1,
+            "last_port": 4
+        },
+        {
+            "macid" : 4,
+            "busid" : 0,
+            "addr"  : 4,
+            "base_port": 1,
+            "last_port": 4
+        },
+        {
+            "macid" : 5,
+            "busid" : 0,
+            "addr"  : 5,
+            "base_port": 1,
+            "last_port": 4
+        },
+        {
+            "macid" : 6,
+            "busid" : 0,
+            "addr"  : 6,
+            "base_port": 1,
+            "last_port": 4
+        },
+        {
+            "macid" : 7,
+            "busid" : 0,
+            "addr"  : 7,
+            "base_port": 1,
+            "last_port": 4
+        },
+        {
+            "macid" : 16,
+            "busid" : 0,
+            "addr"  : 8,
+            "base_port": 1,
+            "last_port": 4
+        },
+        {
+            "macid" : 17,
+            "busid" : 0,
+            "addr"  : 9,
+            "base_port": 1,
+            "last_port": 4
+        },
+        {
+            "macid" : 18,
+            "busid" : 0,
+            "addr"  : 10,
+            "base_port": 1,
+            "last_port": 4
+        },
+        {
+            "macid" : 19,
+            "busid" : 0,
+            "addr"  : 11,
+            "base_port": 1,
+            "last_port": 4
+        },
+        {
+            "macid" : 20,
+            "busid" : 0,
+            "addr"  : 12,
+            "base_port": 1,
+            "last_port": 4
+        },
+        {
+            "macid" : 21,
+            "busid" : 0,
+            "addr"  : 13,
+            "base_port": 1,
+            "last_port": 4
+        },
+        {
+            "macid" : 22,
+            "busid" : 0,
+            "addr"  : 14,
+            "base_port": 1,
+            "last_port": 4
+        },
+        {
+            "macid" : 23,
+            "busid" : 0,
+            "addr"  : 15,
+            "base_port": 1,
+            "last_port": 4
+        },
+        {
+            "macid" : 8,
+            "busid" : 0,
+            "addr"  : 16,
+            "base_port": 1,
+            "last_port": 4
+        },
+        {
+            "macid" : 9,
+            "busid" : 0,
+            "addr"  : 17,
+            "base_port": 1,
+            "last_port": 4
+        },
+        {
+            "macid" : 10,
+            "busid" : 0,
+            "addr"  : 18,
+            "base_port": 1,
+            "last_port": 4
+        },
+        {
+            "macid" : 11,
+            "busid" : 0,
+            "addr"  : 19,
+            "base_port": 1,
+            "last_port": 4
+        },
+        {
+            "macid" : 32,
+            "busid" : 0,
+            "addr"  : 20,
+            "base_port": 1,
+            "last_port": 4
+        },
+        {
+            "macid" : 33,
+            "busid" : 0,
+            "addr"  : 21,
+            "base_port": 1,
+            "last_port": 4
+        },
+        {
+            "macid" : 34,
+            "busid" : 0,
+            "addr"  : 22,
+            "base_port": 1,
+            "last_port": 4
+        },
+        {
+            "macid" : 35,
+            "busid" : 0,
+            "addr"  : 23,
+            "base_port": 1,
+            "last_port": 4
+        },
+        {
+            "macid" : 36,
+            "busid" : 1,
+            "addr"  : 0,
+            "base_port": 1,
+            "last_port": 4
+        },
+        {
+            "macid" : 37,
+            "busid" : 1,
+            "addr"  : 1,
+            "base_port": 1,
+            "last_port": 4
+        },
+        {
+            "macid" : 38,
+            "busid" : 1,
+            "addr"  : 2,
+            "base_port": 1,
+            "last_port": 4
+        },
+        {
+            "macid" : 39,
+            "busid" : 1,
+            "addr"  : 3,
+            "base_port": 1,
+            "last_port": 4
+        },
+        {
+            "macid" : 40,
+            "busid" : 1,
+            "addr"  : 4,
+            "base_port": 1,
+            "last_port": 4
+        },
+        {
+            "macid" : 41,
+            "busid" : 1,
+            "addr"  : 5,
+            "base_port": 1,
+            "last_port": 4
+        },
+        {
+            "macid" : 42,
+            "busid" : 1,
+            "addr"  : 6,
+            "base_port": 1,
+            "last_port": 4
+        },
+        {
+            "macid" : 43,
+            "busid" : 1,
+            "addr"  : 7,
+            "base_port": 1,
+            "last_port": 4
+        },
+        {
+            "macid" : 24,
+            "busid" : 1,
+            "addr"  : 8,
+            "base_port": 1,
+            "last_port": 4
+        },
+        {
+            "macid" : 25,
+            "busid" : 1,
+            "addr"  : 9,
+            "base_port": 1,
+            "last_port": 4
+        },
+        {
+            "macid" : 26,
+            "busid" : 1,
+            "addr"  : 10,
+            "base_port": 1,
+            "last_port": 4
+        },
+        {
+            "macid" : 27,
+            "busid" : 1,
+            "addr"  : 11,
+            "base_port": 1,
+            "last_port": 4
+        },
+        {
+            "macid" : 48,
+            "busid" : 1,
+            "addr"  : 12,
+            "base_port": 1,
+            "last_port": 4
+        },
+        {
+            "macid" : 49,
+            "busid" : 1,
+            "addr"  : 13,
+            "base_port": 1,
+            "last_port": 4
+        },
+        {
+            "macid" : 50,
+            "busid" : 1,
+            "addr"  : 14,
+            "base_port": 1,
+            "last_port": 4
+        },
+        {
+            "macid" : 51,
+            "busid" : 1,
+            "addr"  : 15,
+            "base_port": 1,
+            "last_port": 4
+        },
+        {
+            "macid" : 52,
+            "busid" : 1,
+            "addr"  : 16,
+            "base_port": 1,
+            "last_port": 4
+        },
+        {
+            "macid" : 53,
+            "busid" : 1,
+            "addr"  : 17,
+            "base_port": 1,
+            "last_port": 4
+        },
+        {
+            "macid" : 54,
+            "busid" : 1,
+            "addr"  : 18,
+            "base_port": 1,
+            "last_port": 4
+        },
+        {
+            "macid" : 55,
+            "busid" : 1,
+            "addr"  : 19,
+            "base_port": 1,
+            "last_port": 4
+        },
+        {
+            "macid" : 56,
+            "busid" : 1,
+            "addr"  : 20,
+            "base_port": 1,
+            "last_port": 4
+        },
+        {
+            "macid" : 57,
+            "busid" : 1,
+            "addr"  : 21,
+            "base_port": 1,
+            "last_port": 4
+        },
+        {
+            "macid" : 58,
+            "busid" : 1,
+            "addr"  : 22,
+            "base_port": 1,
+            "last_port": 4
+        },
+        {
+            "macid" : 59,
+            "busid" : 1,
+            "addr"  : 23,
+            "base_port": 1,
+            "last_port": 4
+        }
+    ],
+    "ffe" : {
+        "board_material" : "BOARD_MATERIAL_M4",
+        "config" : [
+            {
+                "serdes_id" : [0],
+                "is_dac"    : 0,
+                "speed"     : [1000],
+                "mode"      : "CTC_CHIP_SERDES_FFE_MODE_DEFINE",
+                "cfg"       : [0, 255, 10, 0]
+            },
+            {
+                "serdes_id" : [1],
+                "is_dac"    : 0,
+                "speed"     : [1000],
+                "mode"      : "CTC_CHIP_SERDES_FFE_MODE_DEFINE",
+                "cfg"       : [0, 240, 10, 0]
+            },
+            {
+                "serdes_id" : [2],
+                "is_dac"    : 0,
+                "speed"     : [1000],
+                "mode"      : "CTC_CHIP_SERDES_FFE_MODE_DEFINE",
+                "cfg"       : [0, 230, 10, 0]
+            },
+            {
+                "serdes_id" : [3],
+                "is_dac"    : 0,
+                "speed"     : [1000],
+                "mode"      : "CTC_CHIP_SERDES_FFE_MODE_DEFINE",
+                "cfg"       : [0, 220, 7, 0]
+            },
+            {
+                "serdes_id" : [4],
+                "is_dac"    : 0,
+                "speed"     : [1000],
+                "mode"      : "CTC_CHIP_SERDES_FFE_MODE_DEFINE",
+                "cfg"       : [0, 220, 8, 0]
+            },
+            {
+                "serdes_id" : [5],
+                "is_dac"    : 0,
+                "speed"     : [1000],
+                "mode"      : "CTC_CHIP_SERDES_FFE_MODE_DEFINE",
+                "cfg"       : [0, 210, 6, 0]
+            },
+            {
+                "serdes_id" : [6],
+                "is_dac"    : 0,
+                "speed"     : [1000],
+                "mode"      : "CTC_CHIP_SERDES_FFE_MODE_DEFINE",
+                "cfg"       : [0, 180, 6, 0]
+            },
+            {
+                "serdes_id" : [7],
+                "is_dac"    : 0,
+                "speed"     : [1000],
+                "mode"      : "CTC_CHIP_SERDES_FFE_MODE_DEFINE",
+                "cfg"       : [0, 180, 5, 0]
+            },
+            {
+                "serdes_id" : [8],
+                "is_dac"    : 0,
+                "speed"     : [1000],
+                "mode"      : "CTC_CHIP_SERDES_FFE_MODE_DEFINE",
+                "cfg"       : [2, 160, 4, 0]
+            },
+            {
+                "serdes_id" : [9],
+                "is_dac"    : 0,
+                "speed"     : [1000],
+                "mode"      : "CTC_CHIP_SERDES_FFE_MODE_DEFINE",
+                "cfg"       : [2, 160, 4, 0]
+            },
+            {
+                "serdes_id" : [10],
+                "is_dac"    : 0,
+                "speed"     : [1000],
+                "mode"      : "CTC_CHIP_SERDES_FFE_MODE_DEFINE",
+                "cfg"       : [3, 140, 9, 0]
+            },
+            {
+                "serdes_id" : [11],
+                "is_dac"    : 0,
+                "speed"     : [1000],
+                "mode"      : "CTC_CHIP_SERDES_FFE_MODE_DEFINE",
+                "cfg"       : [3, 140, 5, 0]
+            },
+            {
+                "serdes_id" : [12, 13, 14, 15],
+                "is_dac"    : 0,
+                "speed"     : [10000],
+                "mode"      : "CTC_CHIP_SERDES_FFE_MODE_DEFINE",
+                "cfg"       : [3, 94, 15, 0]
+            }
+        ]
+    },
+    "ctle" : {
+       "config" : [
+           {
+             "serdes_id" : [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11],
+             "auto-en"   : 0,
+             "cfg"       : [6, 14, 2]
+           }
+       ]
+    }
+}
diff --git a/device/micas/arm64-micas_m2-w6010-48gt4x-ra-r0/M2-W6010-48GT4X-RA/M2-w6010-48gt4x-ra-p-chip-profile.txt b/device/micas/arm64-micas_m2-w6010-48gt4x-ra-r0/M2-W6010-48GT4X-RA/M2-w6010-48gt4x-ra-p-chip-profile.txt
new file mode 100644
index 000000000..2373e27f5
--- /dev/null
+++ b/device/micas/arm64-micas_m2-w6010-48gt4x-ra-r0/M2-W6010-48GT4X-RA/M2-w6010-48gt4x-ra-p-chip-profile.txt
@@ -0,0 +1,96 @@
+#-----------------  SDK Feature Support --------------
+[MPLS_SUPPORT]     = 1;
+[APS_SUPPORT]      = 1;
+[OAM_SUPPORT]      = 1;
+[PTP_SUPPORT]      = 0;
+[SYNCE_SUPPORT]    = 0;
+[STACKING_SUPPORT] = 1;
+[BPE_SUPPORT]      = 0;
+[IPFIX_SUPPORT]    = 1;
+[MONITOR_SUPPORT]  = 1;
+[OVERLAY_SUPPORT]  = 1;
+[EFD_SUPPORT]      = 1;
+[FCOE_SUPPORT]     = 0;
+[TRILL_SUPPORT]    = 0;
+[WLAN_SUPPORT]     = 1;
+[NPM_SUPPORT]      = 1;
+[DOT1AE_SUPPORT]   = 1;
+
+#-----------------  Chip Init Parameter --------------
+#Local chip number and global chip id
+[Local chip_num] = 1
+[Local chip0]    = 0
+[Local chip1]    = 1
+
+#Cut through mode 0: Disable; 1:10/40/100G; 2:1/10/100G; 3:1/10/40G; other:Flex, refer to CUT_THROUGH_BITMAP
+[CUT_THROUGH_SPEED]  = 0
+#Flex cut through mode, speed enable by bitmap, refer to ctc_port_speed_t, Notice: 10M/100M/1G treat as the same speed
+[CUT_THROUGH_BITMAP]  = 0
+
+#Network cpu port
+[CPU_NETWORK_PORT_EN] = 0
+[CPU_NETWORK_PORT_ID] = 47
+
+#Enable parity error and multi-bit ecc recover
+[ECC_RECOVER_EN] = 0
+[TCAM_SCAN_EN] = 0
+
+#-----------------  Interrupt Init Parameter --------------
+#0: pin, 1: msi
+[Interrupt_mode] = 0
+[IRQ]            = 69
+
+#-----------------  NextHop Init Parameter --------------
+#0: SDK work in pizzbox (single chip system), 1: SDK work in multi-chip system
+[Nexthop Edit Mode]       = 0
+[External Nexthop Number] = 16384
+[MPLS Tunnel Number]      = 1024
+
+#-----------------  L2 Init Parameter --------------
+[FDB Hw Learning] = 1
+[Logic Port Num] = 1024
+#0: 128 instance per port, 1: 64 instance per port, 2: 32 instance per port
+[STP MODE] = 0
+[MAX_FID_NUM] = 5120
+
+#-----------------  Stats Init Parameter --------------
+[STATS_PORT_EN]         = 0
+[STATS_ECMP_EN]         = 0
+
+#-----------------  BPE Init Parameter --------------
+[BPE_BR_PORT_EXTENDER_EN]  = 0
+[BPE_BR_UC_MAX_ECID]       = 1024
+[BPE_BR_MC_MAX_ECID]       = 4096
+[BPE_BR_PORT_BASE]         = 0
+
+#-----------------  Ipuc Init Parameter --------------
+#0: tcam use prefix 16; 1: tcam use prefix 8
+[IPUC_TCAM_PREFIX_8] = 1
+
+#-----------------  QoS Init Parameter --------------
+#QoS policer number support 1K/2K/4K/8K, default 4K
+[QOS_POLICER_NUM] = 4096
+#QoS port queue number support 16/8/8 BPE/4 BPE,
+#When resrc_profile.cfg exist, queue number valid,
+#Default 8 queue mode
+#8 queue = 8
+#16 queue = 16
+#4 queue BPE = 17
+#8 queue BPE = 18
+[QOS_PORT_QUEUE_NUM] = 8
+#QoS port extend queue number support 0/4, default 0
+[QOS_PORT_EXT_QUEUE_NUM] = 0
+#QoS CPU reason queue number support 128/64/32, default 128
+[QOS_CPU_QUEUE_NUM] = 128
+[QOS_INGRESS_VLAN_POLICER_NUM] = 0
+[QOS_EGRESS_VLAN_POLICER_NUM] = 0
+[QOS_POLICER_MERGE_MODE] = 0
+#QOS service queue mode, default 0,0:logic scr port + dstport enq 1:service id + dstport enq
+[QOS_SERVICE_QUEUE_MODE] = 0
+#Global enable logic dst port + dstport enq
+[QOS_SERVICE_QUEUE_EGRESS_EN] = 0
+
+#-----------------  Stacking Init Parameter --------------
+#0: normal mode; 1: spine-leaf mode
+[FABRIC MODE] = 0
+[STACKING VERSION] = 1
diff --git a/device/micas/arm64-micas_m2-w6010-48gt4x-ra-r0/M2-W6010-48GT4X-RA/M2-w6010-48gt4x-ra-p-datapath.txt b/device/micas/arm64-micas_m2-w6010-48gt4x-ra-r0/M2-W6010-48GT4X-RA/M2-w6010-48gt4x-ra-p-datapath.txt
new file mode 100644
index 000000000..959b97a15
--- /dev/null
+++ b/device/micas/arm64-micas_m2-w6010-48gt4x-ra-r0/M2-W6010-48GT4X-RA/M2-w6010-48gt4x-ra-p-datapath.txt
@@ -0,0 +1,281 @@
+#Generated by 'CTC DataPath Tools' on Fri Dec 18 19:15:31 2020 
+#Version 1.0, Supported by TsingMa SDK 
+ 
+
+#SERDES_MODE   : 0-NONE, 1-XFI, 2-SGMII, 3-Not Support, 4-QSGMII, 5-XAUI, 6-DXAUI, 7-XLG, 8-CG, 9-SGMII2G5
+#                10-USXGMII-S, 11-USXGMII-M2G5, 12-USXGMII-M5G, 13-XXVG, 14-LG, 15-100BASE-FX
+#SERDES_RX_POLY: 0-Normal, 1-Inverse
+#SERDES_SWITCH : 0-Not Support Dynamic Switch, 1-Support Dynamic Switch
+
+[WLAN_ENABLE] = 1
+[DOT1AE_ENABLE] = 1
+
+[CORE_PLLA] = 600
+#{
+[SERDES_ITEM]
+#repeat 32 step 6
+[SERDES_ID] = 0
+[SERDES_MODE] = 4
+[SERDES_RX_POLY] = 1
+[SERDES_TX_POLY] = 1
+[SERDES_SWITCH] = 0
+[SERDES_GROUP] = 0
+
+[SERDES_ID] = 1
+[SERDES_MODE] = 4
+[SERDES_RX_POLY] = 0
+[SERDES_TX_POLY] = 0
+[SERDES_SWITCH] = 0
+[SERDES_GROUP] = 0
+
+[SERDES_ID] = 2
+[SERDES_MODE] = 4
+[SERDES_RX_POLY] = 1
+[SERDES_TX_POLY] = 1
+[SERDES_SWITCH] = 0
+[SERDES_GROUP] = 0
+
+[SERDES_ID] = 3
+[SERDES_MODE] = 4
+[SERDES_RX_POLY] = 0
+[SERDES_TX_POLY] = 0
+[SERDES_SWITCH] = 0
+[SERDES_GROUP] = 0
+
+[SERDES_ID] = 4
+[SERDES_MODE] = 4
+[SERDES_RX_POLY] = 0
+[SERDES_TX_POLY] = 0
+[SERDES_SWITCH] = 0
+[SERDES_GROUP] = 0
+
+[SERDES_ID] = 5
+[SERDES_MODE] = 4
+[SERDES_RX_POLY] = 0
+[SERDES_TX_POLY] = 0
+[SERDES_SWITCH] = 0
+[SERDES_GROUP] = 0
+
+[SERDES_ID] = 6
+[SERDES_MODE] = 4
+[SERDES_RX_POLY] = 0
+[SERDES_TX_POLY] = 0
+[SERDES_SWITCH] = 0
+[SERDES_GROUP] = 0
+
+[SERDES_ID] = 7
+[SERDES_MODE] = 4
+[SERDES_RX_POLY] = 1
+[SERDES_TX_POLY] = 1
+[SERDES_SWITCH] = 0
+[SERDES_GROUP] = 0
+
+[SERDES_ID] = 8
+[SERDES_MODE] = 4
+[SERDES_RX_POLY] = 1
+[SERDES_TX_POLY] = 1
+[SERDES_SWITCH] = 0
+[SERDES_GROUP] = 0
+
+[SERDES_ID] = 9
+[SERDES_MODE] = 4
+[SERDES_RX_POLY] = 0
+[SERDES_TX_POLY] = 0
+[SERDES_SWITCH] = 0
+[SERDES_GROUP] = 0
+
+[SERDES_ID] = 10
+[SERDES_MODE] = 4
+[SERDES_RX_POLY] = 0
+[SERDES_TX_POLY] = 0
+[SERDES_SWITCH] = 0
+[SERDES_GROUP] = 0
+
+[SERDES_ID] = 11
+[SERDES_MODE] = 4
+[SERDES_RX_POLY] = 0
+[SERDES_TX_POLY] = 0
+[SERDES_SWITCH] = 0
+[SERDES_GROUP] = 0
+
+[SERDES_ID] = 12
+[SERDES_MODE] = 1
+[SERDES_RX_POLY] = 0
+[SERDES_TX_POLY] = 0
+[SERDES_SWITCH] = 1
+[SERDES_GROUP] = 0
+
+[SERDES_ID] = 13
+[SERDES_MODE] = 1
+[SERDES_RX_POLY] = 0
+[SERDES_TX_POLY] = 0
+[SERDES_SWITCH] = 1
+[SERDES_GROUP] = 0
+
+[SERDES_ID] = 14
+[SERDES_MODE] = 1
+[SERDES_RX_POLY] = 0
+[SERDES_TX_POLY] = 0
+[SERDES_SWITCH] = 1
+[SERDES_GROUP] = 0
+
+[SERDES_ID] = 15
+[SERDES_MODE] = 1
+[SERDES_RX_POLY] = 0
+[SERDES_TX_POLY] = 0
+[SERDES_SWITCH] = 1
+[SERDES_GROUP] = 0
+
+[SERDES_ID] = 16
+[SERDES_MODE] = 3
+[SERDES_RX_POLY] = 0
+[SERDES_TX_POLY] = 0
+[SERDES_SWITCH] = 0
+[SERDES_GROUP] = 0
+
+[SERDES_ID] = 17
+[SERDES_MODE] = 3
+[SERDES_RX_POLY] = 0
+[SERDES_TX_POLY] = 0
+[SERDES_SWITCH] = 0
+[SERDES_GROUP] = 0
+
+[SERDES_ID] = 18
+[SERDES_MODE] = 3
+[SERDES_RX_POLY] = 0
+[SERDES_TX_POLY] = 0
+[SERDES_SWITCH] = 0
+[SERDES_GROUP] = 0
+
+[SERDES_ID] = 19
+[SERDES_MODE] = 3
+[SERDES_RX_POLY] = 0
+[SERDES_TX_POLY] = 0
+[SERDES_SWITCH] = 0
+[SERDES_GROUP] = 0
+
+[SERDES_ID] = 20
+[SERDES_MODE] = 3
+[SERDES_RX_POLY] = 0
+[SERDES_TX_POLY] = 0
+[SERDES_SWITCH] = 0
+[SERDES_GROUP] = 0
+
+[SERDES_ID] = 21
+[SERDES_MODE] = 3
+[SERDES_RX_POLY] = 0
+[SERDES_TX_POLY] = 0
+[SERDES_SWITCH] = 0
+[SERDES_GROUP] = 0
+
+[SERDES_ID] = 22
+[SERDES_MODE] = 3
+[SERDES_RX_POLY] = 0
+[SERDES_TX_POLY] = 0
+[SERDES_SWITCH] = 0
+[SERDES_GROUP] = 0
+
+[SERDES_ID] = 23
+[SERDES_MODE] = 3
+[SERDES_RX_POLY] = 0
+[SERDES_TX_POLY] = 0
+[SERDES_SWITCH] = 0
+[SERDES_GROUP] = 0
+
+[SERDES_ID] = 24
+[SERDES_MODE] = 3
+[SERDES_RX_POLY] = 0
+[SERDES_TX_POLY] = 0
+[SERDES_SWITCH] = 0
+[SERDES_GROUP] = 0
+
+[SERDES_ID] = 25
+[SERDES_MODE] = 3
+[SERDES_RX_POLY] = 0
+[SERDES_TX_POLY] = 0
+[SERDES_SWITCH] = 0
+[SERDES_GROUP] = 0
+
+[SERDES_ID] = 26
+[SERDES_MODE] = 3
+[SERDES_RX_POLY] = 0
+[SERDES_TX_POLY] = 0
+[SERDES_SWITCH] = 0
+[SERDES_GROUP] = 1
+
+[SERDES_ID] = 27
+[SERDES_MODE] = 3
+[SERDES_RX_POLY] = 0
+[SERDES_TX_POLY] = 0
+[SERDES_SWITCH] = 0
+[SERDES_GROUP] = 1
+
+[SERDES_ID] = 28
+[SERDES_MODE] = 3
+[SERDES_RX_POLY] = 0
+[SERDES_TX_POLY] = 0
+[SERDES_SWITCH] = 0
+[SERDES_GROUP] = 0
+
+[SERDES_ID] = 29
+[SERDES_MODE] = 3
+[SERDES_RX_POLY] = 0
+[SERDES_TX_POLY] = 0
+[SERDES_SWITCH] = 0
+[SERDES_GROUP] = 0
+
+[SERDES_ID] = 30
+[SERDES_MODE] = 3
+[SERDES_RX_POLY] = 0
+[SERDES_TX_POLY] = 0
+[SERDES_SWITCH] = 0
+[SERDES_GROUP] = 1
+
+[SERDES_ID] = 31
+[SERDES_MODE] = 3
+[SERDES_RX_POLY] = 0
+[SERDES_TX_POLY] = 0
+[SERDES_SWITCH] = 0
+[SERDES_GROUP] = 1
+
+#repeat end
+#}
+
+
+#[SERDES_TO_LPORT]
+#{
+#         | QSGMII/USXGMII-M2G5 | USXGMII-M5G | USXGMII-S | 100BASE-FX | SGMII/SGMII2G5/XFI | XAUI/DXAUI | XLG | XXVG | LG | CG
+#---------|---------------------|-------------|-----------|------------|--------------------|------------|-----|------|----|---
+#serdes 0 |0 /1 /2 /3           |NA           |NA         |NA          |NA                  |NA          |NA   |NA    |NA  |NA
+#serdes 1 |4 /5 /6 /7           |NA           |NA         |NA          |NA                  |NA          |NA   |NA    |NA  |NA
+#serdes 2 |16/17/18/19          |NA           |NA         |NA          |NA                  |NA          |NA   |NA    |NA  |NA
+#serdes 3 |20/21/22/23          |NA           |NA         |NA          |NA                  |NA          |NA   |NA    |NA  |NA
+#serdes 4 |8 /9 /10/11          |NA           |NA         |NA          |NA                  |NA          |NA   |NA    |NA  |NA
+#serdes 5 |32/33/34/35          |NA           |NA         |NA          |NA                  |NA          |NA   |NA    |NA  |NA
+#serdes 6 |36/37/38/39          |NA           |NA         |NA          |NA                  |NA          |NA   |NA    |NA  |NA
+#serdes 7 |40/41/42/43          |NA           |NA         |NA          |NA                  |NA          |NA   |NA    |NA  |NA
+#serdes 8 |24/25/26/27          |NA           |NA         |NA          |NA                  |NA          |NA   |NA    |NA  |NA
+#serdes 9 |48/49/50/51          |NA           |NA         |NA          |NA                  |NA          |NA   |NA    |NA  |NA
+#serdes 10|52/53/54/55          |NA           |NA         |NA          |NA                  |NA          |NA   |NA    |NA  |NA
+#serdes 11|56/57/58/59          |NA           |NA         |NA          |NA                  |NA          |NA   |NA    |NA  |NA
+#serdes 12|NA                   |NA           |NA         |12          |12                  |12          |12   |NA    |NA  |NA  
+#serdes 13|NA                   |NA           |NA         |13          |13                  |12          |12   |NA    |NA  |NA  
+#serdes 14|NA                   |NA           |NA         |14          |14                  |12          |12   |NA    |NA  |NA  
+#serdes 15|NA                   |NA           |NA         |15          |15                  |12          |12   |NA    |NA  |NA  
+#serdes 16|NA                   |NA           |NA         |NA          |NA                  |NA          |NA   |NA    |NA  |NA
+#serdes 17|NA                   |NA           |NA         |NA          |NA                  |NA          |NA   |NA    |NA  |NA
+#serdes 18|NA                   |NA           |NA         |NA          |NA                  |NA          |NA   |NA    |NA  |NA
+#serdes 19|NA                   |NA           |NA         |NA          |NA                  |NA          |NA   |NA    |NA  |NA
+#serdes 20|NA                   |NA           |NA         |NA          |NA                  |NA          |NA   |NA    |NA  |NA
+#serdes 21|NA                   |NA           |NA         |NA          |NA                  |NA          |NA   |NA    |NA  |NA
+#serdes 22|NA                   |NA           |NA         |NA          |NA                  |NA          |NA   |NA    |NA  |NA
+#serdes 23|NA                   |NA           |NA         |NA          |NA                  |NA          |NA   |NA    |NA  |NA
+#serdes 24|NA                   |NA           |NA         |NA          |NA                  |NA          |NA   |NA    |NA  |NA
+#serdes 25|NA                   |NA           |NA         |NA          |NA                  |NA          |NA   |NA    |NA  |NA
+#serdes 26|NA                   |NA           |NA         |NA          |NA                  |NA          |NA   |NA    |NA  |NA
+#serdes 27|NA                   |NA           |NA         |NA          |NA                  |NA          |NA   |NA    |NA  |NA
+#serdes 28|NA                   |NA           |NA         |NA          |NA                  |NA          |NA   |NA    |NA  |NA
+#serdes 29|NA                   |NA           |NA         |NA          |NA                  |NA          |NA   |NA    |NA  |NA
+#serdes 30|NA                   |NA           |NA         |NA          |NA                  |NA          |NA   |NA    |NA  |NA
+#serdes 31|NA                   |NA           |NA         |NA          |NA                  |NA          |NA   |NA    |NA  |NA
+#}
diff --git a/device/micas/arm64-micas_m2-w6010-48gt4x-ra-r0/M2-W6010-48GT4X-RA/default_sku b/device/micas/arm64-micas_m2-w6010-48gt4x-ra-r0/M2-W6010-48GT4X-RA/default_sku
new file mode 100644
index 000000000..c9a5806d0
--- /dev/null
+++ b/device/micas/arm64-micas_m2-w6010-48gt4x-ra-r0/M2-W6010-48GT4X-RA/default_sku
@@ -0,0 +1 @@
+M2-W6010-48GT4X-RA l1
diff --git a/device/micas/arm64-micas_m2-w6010-48gt4x-ra-r0/M2-W6010-48GT4X-RA/phy_mapping.cfg b/device/micas/arm64-micas_m2-w6010-48gt4x-ra-r0/M2-W6010-48GT4X-RA/phy_mapping.cfg
new file mode 100644
index 000000000..eefd67e9c
--- /dev/null
+++ b/device/micas/arm64-micas_m2-w6010-48gt4x-ra-r0/M2-W6010-48GT4X-RA/phy_mapping.cfg
@@ -0,0 +1,198 @@
+#######################PHY_MAPPING_48+4#######################
+
+#{
+[PHY_MAPPING_ITEM]
+
+[API_PORT] = 0
+[PHY_ADDR] = 0
+[MDIO_BUS] = 0
+
+[API_PORT] = 1
+[PHY_ADDR] = 1
+[MDIO_BUS] = 0
+
+[API_PORT] = 2
+[PHY_ADDR] = 2
+[MDIO_BUS] = 0
+
+[API_PORT] = 3
+[PHY_ADDR] = 3
+[MDIO_BUS] = 0
+
+[API_PORT] = 4
+[PHY_ADDR] = 4
+[MDIO_BUS] = 0
+
+[API_PORT] = 5
+[PHY_ADDR] = 5
+[MDIO_BUS] = 0
+
+[API_PORT] = 6
+[PHY_ADDR] = 6
+[MDIO_BUS] = 0
+
+[API_PORT] = 7
+[PHY_ADDR] = 7
+[MDIO_BUS] = 0
+
+[API_PORT] = 16
+[PHY_ADDR] = 8
+[MDIO_BUS] = 0
+
+[API_PORT] = 17
+[PHY_ADDR] = 9
+[MDIO_BUS] = 0
+
+[API_PORT] = 18
+[PHY_ADDR] = 10
+[MDIO_BUS] = 0
+
+[API_PORT] = 19
+[PHY_ADDR] = 11
+[MDIO_BUS] = 0
+
+[API_PORT] = 20
+[PHY_ADDR] = 12
+[MDIO_BUS] = 0
+
+[API_PORT] = 21
+[PHY_ADDR] = 13
+[MDIO_BUS] = 0
+
+[API_PORT] = 22
+[PHY_ADDR] = 14
+[MDIO_BUS] = 0
+
+[API_PORT] = 23
+[PHY_ADDR] = 15
+[MDIO_BUS] = 0
+
+[API_PORT] = 8
+[PHY_ADDR] = 16
+[MDIO_BUS] = 0
+
+[API_PORT] = 9
+[PHY_ADDR] = 17
+[MDIO_BUS] = 0
+
+[API_PORT] = 10
+[PHY_ADDR] = 18
+[MDIO_BUS] = 0
+
+[API_PORT] = 11
+[PHY_ADDR] = 19
+[MDIO_BUS] = 0
+
+[API_PORT] = 32
+[PHY_ADDR] = 20
+[MDIO_BUS] = 0
+
+[API_PORT] = 33
+[PHY_ADDR] = 21
+[MDIO_BUS] = 0
+
+[API_PORT] = 34
+[PHY_ADDR] = 22
+[MDIO_BUS] = 0
+
+[API_PORT] = 35
+[PHY_ADDR] = 23
+[MDIO_BUS] = 0
+
+[API_PORT] = 36
+[PHY_ADDR] = 0
+[MDIO_BUS] = 1
+
+[API_PORT] = 37
+[PHY_ADDR] = 1
+[MDIO_BUS] = 1
+
+[API_PORT] = 38
+[PHY_ADDR] = 2
+[MDIO_BUS] = 1
+
+[API_PORT] = 39
+[PHY_ADDR] = 3
+[MDIO_BUS] = 1
+
+[API_PORT] = 40
+[PHY_ADDR] = 4
+[MDIO_BUS] = 1
+
+[API_PORT] = 41
+[PHY_ADDR] = 5
+[MDIO_BUS] = 1
+
+[API_PORT] = 42
+[PHY_ADDR] = 6
+[MDIO_BUS] = 1
+
+[API_PORT] = 43
+[PHY_ADDR] = 7
+[MDIO_BUS] = 1
+
+[API_PORT] = 24
+[PHY_ADDR] = 8
+[MDIO_BUS] = 1
+
+[API_PORT] = 25
+[PHY_ADDR] = 9
+[MDIO_BUS] = 1
+
+[API_PORT] = 26
+[PHY_ADDR] = 10
+[MDIO_BUS] = 1
+
+[API_PORT] = 27
+[PHY_ADDR] = 11
+[MDIO_BUS] = 1
+
+[API_PORT] = 48
+[PHY_ADDR] = 12
+[MDIO_BUS] = 1
+
+[API_PORT] = 49
+[PHY_ADDR] = 13
+[MDIO_BUS] = 1
+
+[API_PORT] = 50
+[PHY_ADDR] = 14
+[MDIO_BUS] = 1
+
+[API_PORT] = 51
+[PHY_ADDR] = 15
+[MDIO_BUS] = 1
+
+[API_PORT] = 52
+[PHY_ADDR] = 16
+[MDIO_BUS] = 1
+
+[API_PORT] = 53
+[PHY_ADDR] = 17
+[MDIO_BUS] = 1
+
+[API_PORT] = 54
+[PHY_ADDR] = 18
+[MDIO_BUS] = 1
+
+[API_PORT] = 55
+[PHY_ADDR] = 19
+[MDIO_BUS] = 1
+
+[API_PORT] = 56
+[PHY_ADDR] = 20
+[MDIO_BUS] = 1
+
+[API_PORT] = 57
+[PHY_ADDR] = 21
+[MDIO_BUS] = 1
+
+[API_PORT] = 58
+[PHY_ADDR] = 22
+[MDIO_BUS] = 1
+
+[API_PORT] = 59
+[PHY_ADDR] = 23
+[MDIO_BUS] = 1
+
+#}
diff --git a/device/micas/arm64-micas_m2-w6010-48gt4x-ra-r0/M2-W6010-48GT4X-RA/platform_asic b/device/micas/arm64-micas_m2-w6010-48gt4x-ra-r0/M2-W6010-48GT4X-RA/platform_asic
new file mode 100644
index 000000000..0815c8a78
--- /dev/null
+++ b/device/micas/arm64-micas_m2-w6010-48gt4x-ra-r0/M2-W6010-48GT4X-RA/platform_asic
@@ -0,0 +1 @@
+centec-arm64
diff --git a/device/micas/arm64-micas_m2-w6010-48gt4x-ra-r0/M2-W6010-48GT4X-RA/port_config.ini b/device/micas/arm64-micas_m2-w6010-48gt4x-ra-r0/M2-W6010-48GT4X-RA/port_config.ini
new file mode 100644
index 000000000..cd9f488c5
--- /dev/null
+++ b/device/micas/arm64-micas_m2-w6010-48gt4x-ra-r0/M2-W6010-48GT4X-RA/port_config.ini
@@ -0,0 +1,53 @@
+# name            lanes          alias           index      speed       admin_status
+Ethernet1         0              eth-0-1         1          1000        up
+Ethernet2         1              eth-0-2         2          1000        up
+Ethernet3         2              eth-0-3         3          1000        up
+Ethernet4         3              eth-0-4         4          1000        up
+Ethernet5         4              eth-0-5         5          1000        up
+Ethernet6         5              eth-0-6         6          1000        up
+Ethernet7         6              eth-0-7         7          1000        up
+Ethernet8         7              eth-0-8         8          1000        up
+Ethernet9         16             eth-0-9         9          1000        up
+Ethernet10        17             eth-0-10        10         1000        up
+Ethernet11        18             eth-0-11        11         1000        up
+Ethernet12        19             eth-0-12        12         1000        up
+Ethernet13        20             eth-0-13        13         1000        up
+Ethernet14        21             eth-0-14        14         1000        up
+Ethernet15        22             eth-0-15        15         1000        up
+Ethernet16        23             eth-0-16        16         1000        up
+Ethernet17        8              eth-0-17        17         1000        up
+Ethernet18        9              eth-0-18        18         1000        up
+Ethernet19        10             eth-0-19        19         1000        up
+Ethernet20        11             eth-0-20        20         1000        up
+Ethernet21        32             eth-0-21        21         1000        up
+Ethernet22        33             eth-0-22        22         1000        up
+Ethernet23        34             eth-0-23        23         1000        up
+Ethernet24        35             eth-0-24        24         1000        up
+Ethernet25        36             eth-0-25        25         1000        up
+Ethernet26        37             eth-0-26        26         1000        up
+Ethernet27        38             eth-0-27        27         1000        up
+Ethernet28        39             eth-0-28        28         1000        up
+Ethernet29        40             eth-0-29        29         1000        up
+Ethernet30        41             eth-0-30        30         1000        up
+Ethernet31        42             eth-0-31        31         1000        up
+Ethernet32        43             eth-0-32        32         1000        up
+Ethernet33        24             eth-0-33        33         1000        up
+Ethernet34        25             eth-0-34        34         1000        up
+Ethernet35        26             eth-0-35        35         1000        up
+Ethernet36        27             eth-0-36        36         1000        up
+Ethernet37        48             eth-0-37        37         1000        up
+Ethernet38        49             eth-0-38        38         1000        up
+Ethernet39        50             eth-0-39        39         1000        up
+Ethernet40        51             eth-0-40        40         1000        up
+Ethernet41        52             eth-0-41        41         1000        up
+Ethernet42        53             eth-0-42        42         1000        up
+Ethernet43        54             eth-0-43        43         1000        up
+Ethernet44        55             eth-0-44        44         1000        up
+Ethernet45        56             eth-0-45        45         1000        up
+Ethernet46        57             eth-0-46        46         1000        up
+Ethernet47        58             eth-0-47        47         1000        up
+Ethernet48        59             eth-0-48        48         1000        up
+Ethernet49        12             eth-0-49        49         10000       up
+Ethernet50        13             eth-0-50        50         10000       up
+Ethernet51        14             eth-0-51        51         10000       up
+Ethernet52        15             eth-0-52        52         10000       up
diff --git a/device/micas/arm64-micas_m2-w6010-48gt4x-ra-r0/M2-W6010-48GT4X-RA/sai.profile b/device/micas/arm64-micas_m2-w6010-48gt4x-ra-r0/M2-W6010-48GT4X-RA/sai.profile
new file mode 100644
index 000000000..0194d4ecd
--- /dev/null
+++ b/device/micas/arm64-micas_m2-w6010-48gt4x-ra-r0/M2-W6010-48GT4X-RA/sai.profile
@@ -0,0 +1,4 @@
+SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/M2-w6010-48gt4x-ra-p-chip-profile.txt
+SAI_HW_PORT_PROFILE_ID_CONFIG_FILE=/usr/share/sonic/hwsku/M2-w6010-48gt4x-ra-p-datapath.txt
+SAI_PLATFORM_CFG_FILE=/usr/share/sonic/hwsku/M2-w6010-48gt4x-ra-board.json
+SAI_PHY_DRIVER_PATH=/usr/share/sonic/hwsku/phy_drv
\ No newline at end of file
diff --git a/device/micas/arm64-micas_m2-w6010-48gt4x-ra-r0/M2-W6010-48GT4X-RA/start_up.cfg b/device/micas/arm64-micas_m2-w6010-48gt4x-ra-r0/M2-W6010-48GT4X-RA/start_up.cfg
new file mode 100644
index 000000000..b012adedb
--- /dev/null
+++ b/device/micas/arm64-micas_m2-w6010-48gt4x-ra-r0/M2-W6010-48GT4X-RA/start_up.cfg
@@ -0,0 +1,48 @@
+
+chip set serdes 0  ffe mode user-define c0 0 c1 255 c2 10 c3 0 c4 0
+chip set serdes 1  ffe mode user-define c0 0 c1 240 c2 10 c3 0 c4 0
+chip set serdes 2  ffe mode user-define c0 0 c1 230 c2 10 c3 0 c4 0
+chip set serdes 3  ffe mode user-define c0 0 c1 220 c2 7  c3 0 c4 0
+chip set serdes 4  ffe mode user-define c0 0 c1 220 c2 8  c3 0 c4 0
+chip set serdes 5  ffe mode user-define c0 0 c1 210 c2 6  c3 0 c4 0
+chip set serdes 6  ffe mode user-define c0 0 c1 180 c2 6  c3 0 c4 0
+chip set serdes 7  ffe mode user-define c0 0 c1 180 c2 5  c3 0 c4 0
+chip set serdes 8  ffe mode user-define c0 2 c1 160 c2 4  c3 0 c4 0
+chip set serdes 9  ffe mode user-define c0 2 c1 160 c2 4  c3 0 c4 0
+chip set serdes 10 ffe mode user-define c0 3 c1 140 c2 9  c3 0 c4 0
+chip set serdes 11 ffe mode user-define c0 3 c1 140 c2 5  c3 0 c4 0
+chip set serdes 12 ffe mode user-define c0 3 c1 94 c2 15 c3 0 c4 0
+chip set serdes 13 ffe mode user-define c0 3 c1 94 c2 15 c3 0 c4 0
+chip set serdes 14 ffe mode user-define c0 3 c1 94 c2 15 c3 0 c4 0
+chip set serdes 15 ffe mode user-define c0 3 c1 94 c2 15 c3 0 c4 0
+
+
+chip set serdes 0  ctle 6 14 2
+chip set serdes 1  ctle 6 14 2
+chip set serdes 2  ctle 6 14 2
+chip set serdes 3  ctle 6 14 2
+chip set serdes 4  ctle 6 14 2
+chip set serdes 5  ctle 6 14 2
+chip set serdes 6  ctle 6 14 2
+chip set serdes 7  ctle 6 14 2
+chip set serdes 8  ctle 6 14 2
+chip set serdes 9  ctle 6 14 2
+chip set serdes 10 ctle 6 14 2
+chip set serdes 11 ctle 6 14 2
+
+
+
+# rtk eye param, post_amp|main_amp|pre_amp
+port 0  phy-attr type 2001 value 0x1c1e00
+port 4  phy-attr type 2001 value 0x101600
+port 16 phy-attr type 2001 value 0x111500
+port 20 phy-attr type 2001 value 0x0e1100
+port 8  phy-attr type 2001 value 0x0f1000
+port 32 phy-attr type 2001 value 0x0e0f00
+port 36 phy-attr type 2001 value 0x0a0a00
+port 40 phy-attr type 2001 value 0x0a0900
+port 24 phy-attr type 2001 value 0x000c00
+port 48 phy-attr type 2001 value 0x000b00
+port 52 phy-attr type 2001 value 0x000b00
+port 56 phy-attr type 2001 value 0x000a00
+
diff --git a/device/micas/arm64-micas_m2-w6010-48gt4x-ra-r0/default_sku b/device/micas/arm64-micas_m2-w6010-48gt4x-ra-r0/default_sku
new file mode 100644
index 000000000..c9a5806d0
--- /dev/null
+++ b/device/micas/arm64-micas_m2-w6010-48gt4x-ra-r0/default_sku
@@ -0,0 +1 @@
+M2-W6010-48GT4X-RA l1
diff --git a/device/micas/arm64-micas_m2-w6010-48gt4x-ra-r0/installer.conf b/device/micas/arm64-micas_m2-w6010-48gt4x-ra-r0/installer.conf
new file mode 100644
index 000000000..6e00c7ff7
--- /dev/null
+++ b/device/micas/arm64-micas_m2-w6010-48gt4x-ra-r0/installer.conf
@@ -0,0 +1,9 @@
+CONSOLE_SPEED=115200
+
+#fix env
+config_env(){
+    dd if=/dev/mtd1  of=env.bin
+    flashcp -v env.bin  /dev/mtd4
+}
+trap_push "config_env || true"
+
diff --git a/device/micas/arm64-micas_m2-w6010-48gt4x-ra-r0/platform.json b/device/micas/arm64-micas_m2-w6010-48gt4x-ra-r0/platform.json
new file mode 100644
index 000000000..53a47b144
--- /dev/null
+++ b/device/micas/arm64-micas_m2-w6010-48gt4x-ra-r0/platform.json
@@ -0,0 +1,173 @@
+{
+    "chassis": {
+        "name": "M2-W6010-48GT4X-RA",
+        "thermal_manager": false,
+        "status_led": {
+            "controllable": false,
+            "colors": ["green", "blinking_green", "amber", "blinking_amber"]
+        },
+        "components": [
+            {
+                "name": "CPU CPLD"
+            },
+            {
+                "name": "MAC1 CPLD"
+            }
+        ],
+        "fans": [
+            {
+                "name": "Fantray1_1",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 30,
+                    "maximum": 99
+                },
+                "status_led": {
+                    "available": false,
+                    "colors": ["off", "red", "amber", "green"]
+                }
+            },
+            {
+                "name": "Fantray2_1",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 30,
+                    "maximum": 99
+                },
+                "status_led": {
+                    "available": false,
+                    "colors": ["off", "red", "amber", "green"]
+                }
+            }
+        ],
+        "fan_drawers":[
+            {
+                "name": "Fantray1",
+                "num_fans" : 1,
+                "status_led": {
+                    "controllable": false,
+                    "colors": ["amber", "green", "off"]
+                },
+                "fans": [
+                    {
+                        "name": "FanTray1_1",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 30,
+                            "maximum": 99
+                        },
+                        "status_led": {
+                            "available": false
+                        }
+                    }
+                ]
+            },
+            {
+                "name": "Fantray2",
+                "num_fans" : 1,
+                "status_led": {
+                    "controllable": false,
+                    "colors": ["amber", "green", "off"]
+                },
+                "fans": [
+                    {
+                        "name": "FanTray2_1",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 30,
+                            "maximum": 99
+                        },
+                        "status_led": {
+                            "available": false
+                        }
+                    }
+                ]
+            }
+        ],
+        "psus": [
+            {
+                "name": "PSU 1",
+                "voltage": true,
+                "current": true,
+                "power": true,
+                "max_power": false,
+                "voltage_high_threshold": true,
+                "voltage_low_threshold": true,
+                "temperature": true,
+                "fans_target_speed": false,
+                "status_led": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "PSU 2",
+                "voltage": true,
+                "current": true,
+                "power": true,
+                "max_power": false,
+                "voltage_high_threshold": true,
+                "voltage_low_threshold": true,
+                "temperature": true,
+                "fans_target_speed": false,
+                "status_led": {
+                    "controllable": false
+                }
+            }
+        ],
+        "thermals": [
+            {
+                "name": "ASIC_TEMP",
+                "controllable": false,
+                "low-crit-threshold": true,
+                "high-crit-threshold": true,
+                "low-threshold": true,
+                "high-threshold": true,
+                "minimum-recorded": true,
+                "maximum-recorded": true
+            },
+            {
+                "name": "CPU_TEMP",
+                "controllable": false,
+                "low-crit-threshold": true,
+                "high-crit-threshold": true,
+                "low-threshold": true,
+                "high-threshold": true,
+                "minimum-recorded": true,
+                "maximum-recorded": true
+            },
+            {
+                "name": "INLET_TEMP",
+                "controllable": false,
+                "low-crit-threshold": true,
+                "high-crit-threshold": true,
+                "low-threshold": true,
+                "high-threshold": true,
+                "minimum-recorded": true,
+                "maximum-recorded": true
+            },
+            {
+                "name": "OUTLET_TEMP",
+                "controllable": false,
+                "low-crit-threshold": true,
+                "high-crit-threshold": true,
+                "low-threshold": true,
+                "high-threshold": true,
+                "minimum-recorded": true,
+                "maximum-recorded": true
+            },
+            {
+                "name": "TPS53688_TEMP",
+                "controllable": false,
+                "low-crit-threshold": true,
+                "high-crit-threshold": true,
+                "low-threshold": true,
+                "high-threshold": true,
+                "minimum-recorded": true,
+                "maximum-recorded": true
+            }
+        ],
+        "modules": [],
+        "sfps": []
+    },
+    "interfaces": {}
+}
diff --git a/device/micas/arm64-micas_m2-w6010-48gt4x-ra-r0/platform_asic b/device/micas/arm64-micas_m2-w6010-48gt4x-ra-r0/platform_asic
new file mode 100644
index 000000000..0815c8a78
--- /dev/null
+++ b/device/micas/arm64-micas_m2-w6010-48gt4x-ra-r0/platform_asic
@@ -0,0 +1 @@
+centec-arm64
diff --git a/device/micas/arm64-micas_m2-w6010-48gt4x-ra-r0/plugins/sfputil.py b/device/micas/arm64-micas_m2-w6010-48gt4x-ra-r0/plugins/sfputil.py
new file mode 100644
index 000000000..c4fdbe2c3
--- /dev/null
+++ b/device/micas/arm64-micas_m2-w6010-48gt4x-ra-r0/plugins/sfputil.py
@@ -0,0 +1,428 @@
+# sfputil.py
+#
+# Platform-specific SFP transceiver interface for SONiC
+#
+
+try:
+    import time
+    import subprocess
+    import re
+    import os
+    import threading
+    from sonic_sfp.sfputilbase import SfpUtilBase
+except ImportError as e:
+    raise ImportError("%s - required module not found" % str(e))
+
+
+class SfpUtil(SfpUtilBase):
+    """Platform-specific SfpUtil class"""
+
+    PORT_START = 49
+    PORT_END = 52
+    PORTS_IN_BLOCK = 53
+    EEPROM_OFFSET = 9
+    SFP_DEVICE_TYPE = "optoe2"
+    QSFP_DEVICE_TYPE = "optoe1"
+    I2C_MAX_ATTEMPT = 3
+    
+    SFP_STATUS_INSERTED = '1'
+    SFP_STATUS_REMOVED = '0'
+
+    TXWRT_PROTECT = 0X4E
+    TXWRT_NO_PROTECT = 0X59
+    
+    _port_to_eeprom_mapping = {}
+    port_to_i2cbus_mapping ={}
+    port_dict = {}
+    port_presence_info = {}
+    port_reset_info = {}
+    port_txdis_info = {}
+    port_txwrt_info = {}
+    port_led_info = {}
+
+    port_rxlos_info = {}
+    port_txfault_info = {}
+    port_drop_info = {}
+    
+    @property
+    def port_start(self):
+        return self.PORT_START
+
+    @property
+    def port_end(self):
+        return self.PORT_END
+
+    @property
+    def sfp_ports(self):
+        return list(range(self.PORT_START, self.PORTS_IN_BLOCK))
+
+    @property
+    def qsfp_ports(self):
+        return []
+
+    @property
+    def port_to_eeprom_mapping(self):
+        return self._port_to_eeprom_mapping
+
+    def __init__(self):
+        for x in range(self.PORT_START, self.PORTS_IN_BLOCK):
+            self.port_to_i2cbus_mapping[x] = (x - self.PORT_START + self.EEPROM_OFFSET)
+        self.port_presence_info["/sys/bus/i2c/devices/3-0030/sfp_presence1"] = [49, 50, 51, 52]
+        self.port_txdis_info["/sys/bus/i2c/devices/3-0030/tx_disable"] = [49, 50, 51, 52]
+        self.port_txwrt_info["/sys/bus/i2c/devices/3-0030/tx_write_protect"] = [49, 50, 51, 52]
+        
+        # bit 1: los
+        self.port_rxlos_info["/sys/bus/i2c/devices/3-0030/sfp_rx_loss1"] = [49, 50, 51, 52]
+        
+        # bit 1: fault
+        self.port_txfault_info["/sys/bus/i2c/devices/3-0030/sfp_tx_fault1"] = [49, 50, 51, 52]
+        
+        # bit 1: drop
+        self.port_drop_info["/sys/bus/i2c/devices/3-0030/sfp_drop_record1"] = [49, 50, 51, 52]
+        
+        SfpUtilBase.__init__(self)
+
+    def _sfp_read_file_path(self, file_path, offset, num_bytes):
+        attempts = 0
+        while attempts < self.I2C_MAX_ATTEMPT:
+            try:
+                file_path.seek(offset)
+                read_buf = file_path.read(num_bytes)
+            except Exception:
+                attempts += 1
+                time.sleep(0.05)
+            else:
+                return True, read_buf
+        return False, None
+
+    def _sfp_eeprom_present(self, sysfs_sfp_i2c_client_eeprompath, offset):
+        """Tries to read the eeprom file to determine if the
+        device/sfp is present or not. If sfp present, the read returns
+        valid bytes. If not, read returns error 'Connection timed out"""
+
+        if not os.path.exists(sysfs_sfp_i2c_client_eeprompath):
+            return False
+        else:
+            with open(sysfs_sfp_i2c_client_eeprompath, "rb", buffering=0) as sysfsfile:
+                rv, buf = self._sfp_read_file_path(sysfsfile, offset, 1)
+                return rv
+
+    def _add_new_sfp_device(self, sysfs_sfp_i2c_adapter_path, devaddr, devtype):
+        try:
+            sysfs_nd_path = "%s/new_device" % sysfs_sfp_i2c_adapter_path
+
+            # Write device address to new_device file
+            nd_file = open(sysfs_nd_path, "w")
+            nd_str = "%s %s" % (devtype, hex(devaddr))
+            nd_file.write(nd_str)
+            nd_file.close()
+
+        except Exception as err:
+            print(("Error writing to new device file: %s" % str(err)))
+            return 1
+        else:
+            return 0
+
+    def _get_port_eeprom_path(self, port_num, devid):
+        if port_num in list(self.port_to_eeprom_mapping.keys()):
+            sysfs_sfp_i2c_client_eeprom_path = self.port_to_eeprom_mapping[port_num]
+        else:
+            sysfs_i2c_adapter_base_path = "/sys/class/i2c-adapter"
+
+            i2c_adapter_id = self._get_port_i2c_adapter_id(port_num)
+            if i2c_adapter_id is None:
+                print("Error getting i2c bus num")
+                return None
+
+            # Get i2c virtual bus path for the sfp
+            sysfs_sfp_i2c_adapter_path = "%s/i2c-%s" % (sysfs_i2c_adapter_base_path,
+                                                        str(i2c_adapter_id))
+
+            # If i2c bus for port does not exist
+            if not os.path.exists(sysfs_sfp_i2c_adapter_path):
+                print(("Could not find i2c bus %s. Driver not loaded?" % sysfs_sfp_i2c_adapter_path))
+                return None
+
+            sysfs_sfp_i2c_client_path = "%s/%s-00%s" % (sysfs_sfp_i2c_adapter_path,
+                                                        str(i2c_adapter_id),
+                                                        hex(devid)[-2:])
+
+            # If sfp device is not present on bus, Add it
+            if not os.path.exists(sysfs_sfp_i2c_client_path):
+                if port_num in self.qsfp_ports:
+                    ret = self._add_new_sfp_device(
+                            sysfs_sfp_i2c_adapter_path, devid, self.QSFP_DEVICE_TYPE)
+                else:
+                    ret = self._add_new_sfp_device(
+                            sysfs_sfp_i2c_adapter_path, devid, self.SFP_DEVICE_TYPE)
+                if ret != 0:
+                    print("Error adding sfp device")
+                    return None
+
+            sysfs_sfp_i2c_client_eeprom_path = "%s/eeprom" % sysfs_sfp_i2c_client_path
+        return sysfs_sfp_i2c_client_eeprom_path
+
+    def _read_eeprom_specific_bytes(self, sysfsfile_eeprom, offset, num_bytes):
+        eeprom_raw = []
+        for i in range(0, num_bytes):
+            eeprom_raw.append("0x00")
+
+        rv, raw = self._sfp_read_file_path(sysfsfile_eeprom, offset, num_bytes)
+        if rv == False:
+            return None
+
+        try:
+            if isinstance(raw, str):
+                for n in range(0, num_bytes):
+                    eeprom_raw[n] = hex(ord(raw[n]))[2:].zfill(2)
+            else:
+                for n in range(0, num_bytes):
+                    eeprom_raw[n] = hex(raw[n])[2:].zfill(2)
+        except Exception as err:
+            return None
+        return eeprom_raw
+
+    def get_eeprom_dom_raw(self, port_num):
+        if port_num in self.qsfp_ports:
+            # QSFP DOM EEPROM is also at addr 0x50 and thus also stored in eeprom_ifraw
+            return None
+        else:
+            # Read dom eeprom at addr 0x51
+            return self._read_eeprom_devid(port_num, self.IDENTITY_EEPROM_ADDR, 256)
+
+    def get_presence(self, port_num):
+        # Check for invalid port_num
+        if port_num < self.port_start or port_num > self.port_end:
+            return False
+
+        presence_path = None
+        for presence_key in self.port_presence_info:
+            if port_num in self.port_presence_info[presence_key]:
+                presence_path = presence_key
+                presence_offset = self.port_presence_info[presence_key].index(port_num)
+                break
+        if presence_path == None:
+            return False
+
+        try:
+            data = open(presence_path, "rb")
+        except IOError:
+            return False
+
+        presence_data = data.read(2)
+        if presence_data == "":
+            return False
+        result = int(presence_data, 16)
+        data.close()
+
+        # ModPrsL is active low
+        if result & (1 << presence_offset) == 0:
+            return True
+
+        return False
+
+    def get_low_power_mode(self, port_num):
+        return False
+
+    def set_low_power_mode(self, port_num, lpmode):
+        return False
+
+    def reset(self, port_num):
+        return False
+
+    def reset_all(self):
+        return False
+
+    def _do_write_file(self, file_handle, offset, value):
+        file_handle.seek(offset)
+        file_handle.write(hex(value))
+
+    def get_transceiver_change_event(self, timeout=0):
+
+        start_time = time.time()
+        currernt_port_dict = {}
+        forever = False
+
+        if timeout == 0:
+            forever = True
+        elif timeout > 0:
+            timeout = timeout / float(1000) # Convert to secs
+        else:
+            print(("get_transceiver_change_event:Invalid timeout value", timeout))
+            return False, {}
+
+        end_time = start_time + timeout
+        if start_time > end_time:
+            print(('get_transceiver_change_event:' \
+                       'time wrap / invalid timeout value', timeout))
+
+            return False, {} # Time wrap or possibly incorrect timeout
+
+        while timeout >= 0:
+            # Check for OIR events and return updated port_dict
+            for x in range(self.PORT_START, self.PORTS_IN_BLOCK):
+                if self.get_presence(x):
+                    currernt_port_dict[x] = self.SFP_STATUS_INSERTED
+                else:
+                    currernt_port_dict[x] = self.SFP_STATUS_REMOVED
+            if (currernt_port_dict == self.port_dict):
+                if forever:
+                    time.sleep(1)
+                else:
+                    timeout = end_time - time.time()
+                    if timeout >= 1:
+                        time.sleep(1) # We poll at 1 second granularity
+                    else:
+                        if timeout > 0:
+                            time.sleep(timeout)
+                        return True, {}
+            else:
+                # Update reg value
+                self.port_dict = currernt_port_dict
+                return True, self.port_dict
+        print ("get_transceiver_change_event: Should not reach here.")
+        return False, {}
+
+    def tx_disable(self, port_num, disable):
+        if not self.get_presence(port_num):
+            return False
+        
+        if port_num in self.sfp_ports:
+            txwrt_path = None
+            txdis_path = None
+            txdis_offset = 0
+            
+            for key in self.port_txwrt_info:
+                if port_num in self.port_txwrt_info[key]:
+                    txwrt_path = key
+                    break
+            if txwrt_path == None:
+                return False
+            
+            for key in self.port_txdis_info:
+                if port_num in self.port_txdis_info[key]:
+                    txdis_path = key
+                    txdis_offset = self.port_txdis_info[key].index(port_num)
+                    break
+            if txdis_path == None:
+                return False
+            
+            
+            try:
+                with open(txwrt_path, "r+") as sys_file:
+                    sres = hex(self.TXWRT_NO_PROTECT)[2:]
+                    sys_file.write(sres)
+                
+                with open(txdis_path, "r+") as sys_file:
+                    txdis_data = sys_file.read(2)
+                    if not txdis_data:
+                        return False
+                    result = int(txdis_data, 16)
+                    if disable:
+                        result = result | (1 << txdis_offset)
+                    else:
+                        result = result & (~(1 << txdis_offset))
+                    sys_file.seek(0)
+                    sres = hex(result)[2:]
+                    print(result,sres)
+                    sys_file.write(sres)
+                
+                with open(txwrt_path, "r+") as sys_file:
+                    sres = hex(self.TXWRT_PROTECT)[2:]
+                    sys_file.write(sres)
+            except Exception as err:
+                print(err)
+                return False
+            
+            return True
+        else:
+            return False
+
+########### sysdiag ###########
+    def _get_cpld_info(self, port_num, info):
+        path = None
+        offset = 0
+        for key in info:
+            if port_num in info[key]:
+                path = key
+                offset = info[key].index(port_num)
+                break
+        return path, offset
+
+    def get_tx_disable(self, port_num):
+        # cur only support sfp moudle
+        if port_num not in self.sfp_ports:
+            return False
+        
+        if not self.get_presence(port_num):
+            return False
+        
+        path, offset = self._get_cpld_info(port_num, self.port_txdis_info)
+        if path == None:
+            return False
+        
+        result = 0
+        try:
+            with open(path, "r") as sys_file:
+                data = sys_file.read(2)
+                result = int(data, 16)
+        except Exception as e:
+            print((str(e)))
+            return False
+        
+        # 1: disable
+        if result & (1 << offset):
+            return True
+        else:
+            return False
+    
+    def get_rx_los(self, port_num):
+        # cur only support sfp moudle
+        if port_num not in self.sfp_ports:
+            return False
+        
+        path, offset = self._get_cpld_info(port_num, self.port_rxlos_info)
+        if path == None:
+            return False
+        
+        result = 0
+        try:
+            with open(path, "r") as sys_file:
+                data = sys_file.read(2)
+                result = int(data, 16)
+        except Exception as e:
+            print((str(e)))
+            return False
+        
+        # 1: los
+        if result & (1 << offset):
+            return True
+        else:
+            return False
+    
+    def get_tx_fault(self, port_num):
+        # cur only support sfp moudle
+        if port_num not in self.sfp_ports:
+            return False
+        
+        if not self.get_presence(port_num):
+            return False
+        
+        path, offset = self._get_cpld_info(port_num, self.port_txfault_info)
+        if path == None:
+            return False
+        
+        result = 0
+        try:
+            with open(path, "r") as sys_file:
+                data = sys_file.read(2)
+                result = int(data, 16)
+        except Exception as e:
+            print((str(e)))
+            return False
+        
+        # 1: fault
+        if result & (1 << offset):
+            return True
+
+        return False
diff --git a/device/micas/arm64-micas_m2-w6010-48gt4x-ra-r0/plugins/ssd_util.py b/device/micas/arm64-micas_m2-w6010-48gt4x-ra-r0/plugins/ssd_util.py
new file mode 100644
index 000000000..95ca23e8b
--- /dev/null
+++ b/device/micas/arm64-micas_m2-w6010-48gt4x-ra-r0/plugins/ssd_util.py
@@ -0,0 +1,112 @@
+#
+# ssd_util.py
+#
+# Generic implementation of the SSD health API
+# SSD models supported:
+#  - InnoDisk
+#  - StorFly
+#  - Virtium
+
+try:
+    import subprocess
+    from sonic_platform_base.sonic_ssd.ssd_base import SsdBase
+except ImportError as e:
+    raise ImportError (str(e) + "- required module not found")
+
+HEALTH_CMD = "cat /sys/kernel/debug/mmc0/mmc0:0001/ext_csd | cut -c 537-538"
+SERIAL_CMD = "cat /sys/bus/mmc/devices/mmc0\\:0001/serial"
+FIRMWARE_CMD = "cat /sys/kernel/debug/mmc0/mmc0:0001/ext_csd | cut -c 509-522"
+NOT_AVAILABLE = "N/A"
+
+class SsdUtil(SsdBase):
+    """
+    Generic implementation of the SSD health API
+    """
+    def __init__(self, diskdev):
+        self.model = "KLMCG4JETD-B041"
+        self.temperature = NOT_AVAILABLE
+        self.vendor_ssd_info = "====No vendor information===="
+        self.health_list = [100,90,80,70,60,50,40,30,20,10,0]
+        try:
+            life_time = self._execute_shell(HEALTH_CMD)
+            if int(life_time) in range(1,12):
+                self.health = self.health_list[int(life_time) - 1]
+            else:
+                self.health = NOT_AVAILABLE
+        except Exception as e:
+            self.health = NOT_AVAILABLE
+
+        try:
+            self.firmware = self._execute_shell(FIRMWARE_CMD)
+        except Exception as e:
+            self.firmware = NOT_AVAILABLE
+
+        try:
+            serial = self._execute_shell(SERIAL_CMD)
+            self.serial = serial.replace("0x",'')
+        except Exception as e:
+            self.serial = NOT_AVAILABLE
+
+    def _execute_shell(self, cmd):
+        status, output = subprocess.getstatusoutput(cmd)
+        if status:
+            return None
+
+        return output
+
+    def get_health(self):
+        """
+        Retrieves current disk health in percentages
+
+        Returns:
+            A float number of current ssd health
+            e.g. 83.5
+        """
+        return self.health
+
+    def get_temperature(self):
+        """
+        Retrieves current disk temperature in Celsius
+
+        Returns:
+            A float number of current temperature in Celsius
+            e.g. 40.1
+        """
+        return self.temperature
+
+    def get_model(self):
+        """
+        Retrieves model for the given disk device
+
+        Returns:
+            A string holding disk model as provided by the manufacturer
+        """
+        return self.model
+
+    def get_firmware(self):
+        """
+        Retrieves firmware version for the given disk device
+
+        Returns:
+            A string holding disk firmware version as provided by the manufacturer
+        """
+        return self.firmware
+
+    def get_serial(self):
+        """
+        Retrieves serial number for the given disk device
+
+        Returns:
+            A string holding disk serial number as provided by the manufacturer
+        """
+        return self.serial
+
+    def get_vendor_output(self):
+        """
+        Retrieves vendor specific data for the given disk device
+
+        Returns:
+            A string holding some vendor specific disk information
+        """
+        return self.vendor_ssd_info
+
diff --git a/device/micas/arm64-micas_m2-w6010-48gt4x-ra-r0/pmon_daemon_control.json b/device/micas/arm64-micas_m2-w6010-48gt4x-ra-r0/pmon_daemon_control.json
new file mode 100644
index 000000000..5fdf83f1b
--- /dev/null
+++ b/device/micas/arm64-micas_m2-w6010-48gt4x-ra-r0/pmon_daemon_control.json
@@ -0,0 +1,7 @@
+{
+    "skip_ledd": true,
+    "skip_xcvrd": false,
+    "skip_syseepromd": false,
+    "skip_thermalctld": false,
+    "skip_psud": false
+}
diff --git a/device/micas/arm64-micas_m2-w6010-48gt4x-ra-r0/system_health_monitoring_config.json b/device/micas/arm64-micas_m2-w6010-48gt4x-ra-r0/system_health_monitoring_config.json
new file mode 100644
index 000000000..e69de29bb
diff --git a/platform/centec-arm64/platform-modules-micas.dep b/platform/centec-arm64/platform-modules-micas.dep
new file mode 100644
index 000000000..ad741d08d
--- /dev/null
+++ b/platform/centec-arm64/platform-modules-micas.dep
@@ -0,0 +1,9 @@
+MPATH       := $($(MICAS_M2_W6010_48GT4X_PLATFORM_MODULE)_SRC_PATH)
+DEP_FILES   := $(SONIC_COMMON_FILES_LIST) platform/centec-arm64/platform-modules-micas.mk platform/centec-arm64/platform-modules-micas.dep
+DEP_FILES   += $(SONIC_COMMON_BASE_FILES_LIST)
+DEP_FILES += $(addprefix $(MPATH)/,$(shell cd $(MPATH) && git ls-files))
+
+$(MICAS_M2_W6010_48GT4X_PLATFORM_MODULE)_CACHE_MODE  := GIT_CONTENT_SHA 
+$(MICAS_M2_W6010_48GT4X_PLATFORM_MODULE)_DEP_FLAGS   := $(SONIC_COMMON_FLAGS_LIST)
+$(MICAS_M2_W6010_48GT4X_PLATFORM_MODULE)_DEP_FILES   := $(DEP_FILES)
+
diff --git a/platform/centec-arm64/platform-modules-micas.mk b/platform/centec-arm64/platform-modules-micas.mk
new file mode 100644
index 000000000..ad741d08d
--- /dev/null
+++ b/platform/centec-arm64/platform-modules-micas.mk
@@ -0,0 +1,9 @@
+MPATH       := $($(MICAS_M2_W6010_48GT4X_PLATFORM_MODULE)_SRC_PATH)
+DEP_FILES   := $(SONIC_COMMON_FILES_LIST) platform/centec-arm64/platform-modules-micas.mk platform/centec-arm64/platform-modules-micas.dep
+DEP_FILES   += $(SONIC_COMMON_BASE_FILES_LIST)
+DEP_FILES += $(addprefix $(MPATH)/,$(shell cd $(MPATH) && git ls-files))
+
+$(MICAS_M2_W6010_48GT4X_PLATFORM_MODULE)_CACHE_MODE  := GIT_CONTENT_SHA 
+$(MICAS_M2_W6010_48GT4X_PLATFORM_MODULE)_DEP_FLAGS   := $(SONIC_COMMON_FLAGS_LIST)
+$(MICAS_M2_W6010_48GT4X_PLATFORM_MODULE)_DEP_FILES   := $(DEP_FILES)
+
diff --git a/platform/centec-arm64/sonic-platform-modules-micas/LICENSE b/platform/centec-arm64/sonic-platform-modules-micas/LICENSE
new file mode 100644
index 000000000..2d14d2b77
--- /dev/null
+++ b/platform/centec-arm64/sonic-platform-modules-micas/LICENSE
@@ -0,0 +1,15 @@
+Copyright (C) 2019  Centec, Inc
+
+This program is free software; you can redistribute it and/or
+modify it under the terms of the GNU General Public License
+as published by the Free Software Foundation; either version 2
+of the License, or (at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
diff --git a/platform/centec-arm64/sonic-platform-modules-micas/README.md b/platform/centec-arm64/sonic-platform-modules-micas/README.md
new file mode 100644
index 000000000..a02f791fa
--- /dev/null
+++ b/platform/centec-arm64/sonic-platform-modules-micas/README.md
@@ -0,0 +1 @@
+Platform drivers for Centec E530 for the SONiC project.
diff --git a/platform/centec-arm64/sonic-platform-modules-micas/common/Makefile b/platform/centec-arm64/sonic-platform-modules-micas/common/Makefile
new file mode 100644
index 000000000..7d687765d
--- /dev/null
+++ b/platform/centec-arm64/sonic-platform-modules-micas/common/Makefile
@@ -0,0 +1,49 @@
+PWD		= $(shell pwd)
+CC ?=gcc
+INSTALL_MOD_DIR ?=extra
+KVERSION   ?= $(shell uname -r)
+KERNEL_SRC ?=  /lib/modules/$(KVERSION)
+EXTRA_CFLAGS:= -I$(M)/include
+EXTRA_CFLAGS+= -Wall
+ifdef ENABLE_GCOV
+ifeq ($(ENABLE_GCOV), y)
+EXTRA_CFLAGS+= -fprofile-arcs -ftest-coverage -lgcov
+endif
+endif # ENABLE_GCOV
+SUB_BUILD_DIR = $(PWD)/build
+DIR_KERNEL_SRC = $(PWD)/modules
+SCRIPT_DIR = $(PWD)/script
+SERVICE_DIR = $(PWD)/service
+BLACK_DRIVER_CONF_DIR = $(PWD)/modprobe_conf
+
+app_dir = $(PWD)/app
+app_build_dir = $(app_dir)/build
+modules_build_dir = $(DIR_KERNEL_SRC)/build
+
+INSTALL_MODULE_DIR = $(SUB_BUILD_DIR)/$(KERNEL_SRC)/$(INSTALL_MOD_DIR)
+INSTALL_SCRIPT_DIR = $(SUB_BUILD_DIR)/usr/local/bin
+INSTALL_SERVICE_DIR = $(SUB_BUILD_DIR)/lib/systemd/system
+INSTALL_LIB_DIR = $(SUB_BUILD_DIR)/usr/lib/python3.9/dist-packages
+INSTALL_BLACK_DRIVER = $(SUB_BUILD_DIR)/etc/modprobe.d
+CTC_48GT4X_PHY_DIR = $(SUB_BUILD_DIR)/usr/share/sonic/device/arm64-micas_m2-w6010-48gt4x-fa-r0/M2-W6010-48GT4X-FA
+CTC_48GT4X_R_PHY_DIR = $(SUB_BUILD_DIR)/usr/share/sonic/device/arm64-micas_m2-w6010-48gt4x-ra-r0/M2-W6010-48GT4X-RA
+
+all:
+	$(MAKE) -C $(app_dir)
+	$(MAKE) -C $(DIR_KERNEL_SRC)
+	@if [ ! -d ${INSTALL_MODULE_DIR} ]; then mkdir -p ${INSTALL_MODULE_DIR} ;fi
+	@if [ ! -d ${INSTALL_SCRIPT_DIR} ]; then mkdir -p ${INSTALL_SCRIPT_DIR} ;fi
+	@if [ ! -d ${INSTALL_SERVICE_DIR} ]; then mkdir -p ${INSTALL_SERVICE_DIR} ;fi
+	@if [ ! -d ${CTC_48GT4X_PHY_DIR} ]; then mkdir -p ${CTC_48GT4X_PHY_DIR}/phy_drv ;fi
+	@if [ ! -d ${CTC_48GT4X_R_PHY_DIR} ]; then mkdir -p ${CTC_48GT4X_R_PHY_DIR}/phy_drv ;fi
+	@if [ ! -d ${INSTALL_LIB_DIR} ]; then mkdir -p ${INSTALL_LIB_DIR} ;fi
+	@if [ -d $(PWD)/lib/ ]; then cp -r $(PWD)/lib/* ${INSTALL_LIB_DIR} ;fi
+	cp -r $(app_dir)/*.so $(CTC_48GT4X_PHY_DIR)/phy_drv
+	cp -r $(app_dir)/*.so $(CTC_48GT4X_R_PHY_DIR)/phy_drv
+	cp -r $(modules_build_dir)/*.ko $(INSTALL_MODULE_DIR)
+	cp -r $(app_dir)/build/app/*  $(INSTALL_SCRIPT_DIR)
+	if [ -d $(SCRIPT_DIR) ]; then cp -r $(SCRIPT_DIR)/*  $(INSTALL_SCRIPT_DIR) ;fi
+	if [ -d $(SERVICE_DIR) ]; then cp -r $(SERVICE_DIR)/*  $(INSTALL_SERVICE_DIR) ;fi
+	@if [ -d $(INSTALL_SCRIPT_DIR) ]; then chmod +x $(INSTALL_SCRIPT_DIR)/* ;fi
+clean:
+	rm -rf $(SUB_BUILD_DIR)
diff --git a/platform/centec-arm64/sonic-platform-modules-micas/common/app/Makefile b/platform/centec-arm64/sonic-platform-modules-micas/common/app/Makefile
new file mode 100644
index 000000000..2d86cdf4c
--- /dev/null
+++ b/platform/centec-arm64/sonic-platform-modules-micas/common/app/Makefile
@@ -0,0 +1,26 @@
+pes_parent_dir:=$(shell pwd)/$(lastword $(MAKEFILE_LIST))
+pes_parent_dir:=$(shell dirname $(pes_parent_dir))
+
+SUBDIRS=$(shell ls -l | grep ^d | awk '{if($$9 != "build") print $$9}')
+INC = -I./inc
+
+COMMON_OUT_PUT := $(shell pwd)/build
+common_out_put_dir := $(COMMON_OUT_PUT)/app
+common_module_dir := $(COMMON_OUT_PUT)/module/
+export common_out_put_dir common_module_dir
+
+all : CHECK $(SUBDIRS)
+CHECK :
+	@echo $(pes_parent_dir)
+
+$(SUBDIRS):ECHO
+# make all
+	#@echo $@
+	make -C $@
+
+ECHO:
+	@echo $(SUBDIRS)
+
+.PHONY : clean
+clean :
+	-rm  -rf $(COMMON_OUT_PUT)
diff --git a/platform/centec-arm64/sonic-platform-modules-micas/common/lib/eepromutil/__init__.py b/platform/centec-arm64/sonic-platform-modules-micas/common/lib/eepromutil/__init__.py
new file mode 100644
index 000000000..e69de29bb
diff --git a/platform/centec-arm64/sonic-platform-modules-micas/common/lib/eepromutil/fantlv.py b/platform/centec-arm64/sonic-platform-modules-micas/common/lib/eepromutil/fantlv.py
new file mode 100644
index 000000000..fa480bb50
--- /dev/null
+++ b/platform/centec-arm64/sonic-platform-modules-micas/common/lib/eepromutil/fantlv.py
@@ -0,0 +1,210 @@
+#!/usr/bin/python3
+# -*- coding: utf-8 -*-
+class FantlvException(Exception):
+    def __init__(self,  message='fantlverror', code=-100):
+        err = 'errcode: {0} message:{1}'.format(code, message)
+        Exception.__init__(self, err)
+        self.code = code
+        self.message = message
+
+class fan_tlv(object):
+    HEAD_INFO = "\x01\x7e\x01\xf1"
+    VERSION = 0x01                    # E2PROM file init version is 0x01
+    FLAG = 0x7E                       # new version E2PROM mark as 0x7E
+    HW_VER = 0X01                     # consists of master version and revised version
+    TYPE = 0xf1                       # hardware type define
+    TLV_LEN = 00                      # vaild data length(16bit)
+    _FAN_TLV_HDR_LEN = 6
+    _FAN_TLV_CRC_LEN = 2
+
+    _FAN_TLV_TYPE_NAME = 0x02
+    _FAN_TLV_TYPE_SN = 0x03
+    _FAN_TLV_TYPE_HW_INFO = 0x05
+    _FAN_TLV_TYPE_DEV_TYPE = 0x06
+
+    _fandecodetime = 0
+
+    @property
+    def dstatus(self):
+        return self._dstatus
+
+    @property
+    def typename(self):
+        return self._typename
+
+    @property
+    def typesn(self):
+        return self._typesn
+
+    @property
+    def typehwinfo(self):
+        return self._typehwinfo
+
+    @property
+    def typedevtype(self):
+        return self._typedevtype
+
+    @property
+    def fanbus(self):
+        return self._fanbus
+
+    @property
+    def fanloc(self):
+        return self._fanloc
+
+    @property
+    def fandecodetime(self):
+        return self._fandecodetime
+
+    def __init__(self):
+        self._typename = ""
+        self._typesn = ""
+        self._typehwinfo = ""
+        self._typedevtype = ""
+        self._dstatus = 0
+
+    def strtoarr(self, str):
+        s = []
+        if str is not None:
+            for index in range(len(str)):
+                s.append(str[index])
+        return s
+
+    def str_to_hex(self,rest_v):
+        value = 0
+        for index in range(len(rest_v)):
+            value |= ord(rest_v[index]) << ((len(rest_v) - index - 1) * 8)
+        return value
+
+    def hex_to_str(self,s):
+        len_t = len(s)
+        if len_t % 2 != 0:
+            return 0
+        ret = ""
+        for t in range(0, int(len_t / 2)):
+            ret += chr(int(s[2 * t:2 * t + 2], 16))
+        return ret
+
+    def generate_fan_value(self):
+        bin_buffer = [chr(0xff)] * 256
+        bin_buffer[0] = chr(self.VERSION)
+        bin_buffer[1] = chr(self.FLAG)
+        bin_buffer[2] = chr(self.HW_VER)
+        bin_buffer[3] = chr(self.TYPE)
+
+        temp_t = "%08x" % self.typedevtype  # handle devtype first
+        typedevtype_t = self.hex_to_str(temp_t)
+        total_len = len(self.typename) + len(self.typesn) + \
+            len(self.typehwinfo) + len(typedevtype_t) + 8
+
+        bin_buffer[4] = chr(total_len >> 8)
+        bin_buffer[5] = chr(total_len & 0x00FF)
+
+        index_start = 6
+        bin_buffer[index_start] = chr(self._FAN_TLV_TYPE_NAME)
+        bin_buffer[index_start + 1] = chr(len(self.typename))
+        bin_buffer[index_start + 2: index_start + 2 +
+                   len(self.typename)] = self.strtoarr(self.typename)
+        index_start = index_start + 2 + len(self.typename)
+
+        bin_buffer[index_start] = chr(self._FAN_TLV_TYPE_SN)
+        bin_buffer[index_start + 1] = chr(len(self.typesn))
+        bin_buffer[index_start + 2:index_start + 2 +
+                   len(self.typesn)] = self.strtoarr(self.typesn)
+        index_start = index_start + 2 + len(self.typesn)
+
+        bin_buffer[index_start] = chr(self._FAN_TLV_TYPE_HW_INFO)
+        bin_buffer[index_start + 1] = chr(len(self.typehwinfo))
+        bin_buffer[index_start + 2:index_start + 2 +
+                   len(self.typehwinfo)] = self.strtoarr(self.typehwinfo)
+        index_start = index_start + 2 + len(self.typehwinfo)
+
+        bin_buffer[index_start] = chr(self._FAN_TLV_TYPE_DEV_TYPE)
+        bin_buffer[index_start + 1] = chr(len(typedevtype_t))
+        bin_buffer[index_start + 2:index_start + 2 +
+                   len(typedevtype_t)] = self.strtoarr(typedevtype_t)
+        index_start = index_start + 2 + len(typedevtype_t)
+
+        crcs = fan_tlv.fancrc(''.join(bin_buffer[0:index_start]))  # 2bytes checking
+        bin_buffer[index_start] = chr(crcs >> 8)
+        bin_buffer[index_start + 1] = chr(crcs & 0x00ff)
+        # printvalue(bin_buffer)
+        return bin_buffer
+
+    def decode(self, e2):
+        if e2[0:4] != self.HEAD_INFO:
+            raise FantlvException("Fan tlv head info error,not fan tlv type", -10)
+        ret = []
+        self.VERSION = ord(e2[0])
+        self.FLAG = ord(e2[1])
+        self.HW_VER = ord(e2[2])
+        self.TYPE = ord(e2[3])
+        self.TLV_LEN = (ord(e2[4]) << 8) | ord(e2[5])
+
+        tlv_index = self._FAN_TLV_HDR_LEN
+        tlv_end = self._FAN_TLV_HDR_LEN + self.TLV_LEN
+
+        # check sum
+        if len(e2) < self._FAN_TLV_HDR_LEN + self.TLV_LEN + 2:
+            raise FantlvException("Fan tlv eeprom len error!", -2)
+        sumcrc = fan_tlv.fancrc(e2[0:self._FAN_TLV_HDR_LEN + self.TLV_LEN])
+        readcrc = ord(e2[self._FAN_TLV_HDR_LEN + self.TLV_LEN]
+                      ) << 8 | ord(e2[self._FAN_TLV_HDR_LEN + self.TLV_LEN + 1])
+        if sumcrc != readcrc:
+            raise FantlvException("Fan tlv eeprom checksum error!", -1)
+        else:
+            self._dstatus = 0
+        while (tlv_index + 2) < len(e2) and tlv_index < tlv_end:
+            s = self.decoder(
+                e2[tlv_index:tlv_index + 2 + ord(e2[tlv_index + 1])])
+            tlv_index += ord(e2[tlv_index + 1]) + 2
+            ret.append(s)
+
+        return ret
+
+    @staticmethod
+    def fancrc(t):
+        sum = 0
+        for index in range(len(t)):
+            sum += ord(t[index])
+        return sum
+
+    def decoder(self, t):
+        try:
+            name = ""
+            value = ""
+            _len = ord(t[1])
+            if ord(t[0]) == self._FAN_TLV_TYPE_NAME:
+                name = "Product Name"
+                value = t[2:2 + ord(t[1])]
+                self._typename = value
+            elif ord(t[0]) == self._FAN_TLV_TYPE_SN:
+                name = "serial Number"
+                value = t[2:2 + ord(t[1])]
+                self._typesn = value
+            elif ord(t[0]) == self._FAN_TLV_TYPE_HW_INFO:
+                name = "hardware info"
+                value = t[2:2 + ord(t[1])]
+                self._typehwinfo = value
+            elif ord(t[0]) == self._FAN_TLV_TYPE_DEV_TYPE:
+                name = "dev type"
+                value = "0x"
+                for c in t[2:2 + ord(t[1])]:
+                    value += "%02X" % (ord(c),)
+                self._typedevtype = int(value,16)
+            return {"name": name, "code": ord(t[0]), "value": value,"lens": _len}
+        except Exception as e:
+            print(e)
+            return None
+
+    def __str__(self):
+        formatstr = "VERSION     : 0x%02x  \n" \
+                    "   FLAG     : 0x%02x  \n" \
+                    " HW_VER     : 0x%02x  \n" \
+                    "   TYPE     : 0x%02x  \n" \
+                    "typename    : %s      \n" \
+                    "typesn      : %s      \n" \
+                    "typehwinfo  : %s      \n"
+        return formatstr % (self.VERSION, self.FLAG, self.HW_VER, self.TYPE, self.typename, self.typesn, self.typehwinfo)
+
+
diff --git a/platform/centec-arm64/sonic-platform-modules-micas/common/lib/eepromutil/fru.py b/platform/centec-arm64/sonic-platform-modules-micas/common/lib/eepromutil/fru.py
new file mode 100644
index 000000000..4848530a8
--- /dev/null
+++ b/platform/centec-arm64/sonic-platform-modules-micas/common/lib/eepromutil/fru.py
@@ -0,0 +1,957 @@
+#!/usr/bin/python3
+# -*- coding: utf-8 -*-
+import collections
+from bitarray import bitarray
+from datetime import datetime, timedelta
+import sys
+
+__all__ = ["FruException", "FruUtil", "BaseArea", "BoardInfoArea", "ProductInfoArea",
+           "MultiRecordArea", "Field", "ipmifru"]
+
+__DEBUG__ = "N"
+
+
+class FruException(Exception):
+    def __init__(self,  message='fruerror', code=-100):
+        err = 'errcode: {0} message:{1}'.format(code, message)
+        Exception.__init__(self, err)
+        self.code = code
+        self.message = message
+
+
+def e_print(err):
+    print("ERROR: " + err)
+
+
+def d_print(debug_info):
+    if(__DEBUG__ == "Y"):
+        print(debug_info)
+
+
+class FruUtil():
+    @staticmethod
+    def decodeLength(value):
+        a = bitarray(8)
+        a.setall(True)
+        a[0:1] = 0
+        a[1:2] = 0
+        x = ord(a.tobytes())
+        return x & ord(value)
+
+    @staticmethod
+    def minToData():
+        starttime = datetime(1996, 1, 1, 0, 0, 0)
+        endtime = datetime.now()
+        seconds = (endtime - starttime).total_seconds()
+        mins = seconds / 60
+        m = int(round(mins))
+        return m
+
+    @staticmethod
+    def getTimeFormat():
+        return datetime.now().strftime('%Y-%m-%d')
+
+    @staticmethod
+    def getTypeLength(value):
+        if value is None:
+            return 0
+        a = bitarray(8)
+        a.setall(False)
+        a[0:1] = 1
+        a[1:2] = 1
+        x = ord(a.tobytes())
+        return x | len(value)
+
+    @staticmethod
+    def checksum(b):
+        result = 0
+        for i in range(len(b)):
+            result += ord(b[i])
+        return (0x100 - (result & 0xff)) & 0xff
+
+
+class BaseArea(object):
+    SUGGESTED_SIZE_COMMON_HEADER = 8
+    SUGGESTED_SIZE_INTERNAL_USE_AREA = 72
+    SUGGESTED_SIZE_CHASSIS_INFO_AREA = 32
+    SUGGESTED_SIZE_BOARD_INFO_AREA = 80
+    SUGGESTED_SIZE_PRODUCT_INFO_AREA = 80
+
+    INITVALUE = b'\x00'
+    resultvalue = INITVALUE * 256
+    COMMON_HEAD_VERSION = b'\x01'
+    __childList = None
+
+    def __init__(self, name="", size=0, offset=0):
+        self.__childList = []
+        self._offset = offset
+        self.name = name
+        self._size = size
+        self._isPresent = False
+        self._data = b'\x00' * size
+        self.__dataoffset = 0
+
+    @property
+    def childList(self):
+        return self.__childList
+
+    @childList.setter
+    def childList(self, value):
+        self.__childList = value
+
+    @property
+    def offset(self):
+        return self._offset
+
+    @offset.setter
+    def offset(self, value):
+        self._offset = value
+
+    @property
+    def size(self):
+        return self._size
+
+    @size.setter
+    def size(self, value):
+        self._size = value
+
+    @property
+    def data(self):
+        return self._data
+
+    @data.setter
+    def data(self, value):
+        self._data = value
+
+    @property
+    def isPresent(self):
+        return self._isPresent
+
+    @isPresent.setter
+    def isPresent(self, value):
+        self._isPresent = value
+
+
+class InternalUseArea(BaseArea):
+    pass
+
+
+class ChassisInfoArea(BaseArea):
+    pass
+
+
+class BoardInfoArea(BaseArea):
+    _boardTime = None
+    _fields = None
+    _mfg_date = None
+
+    def __str__(self):
+        formatstr = "version             : %x\n" \
+                    "length              : %d \n" \
+                    "language            : %x \n" \
+                    "mfg_date            : %s \n" \
+                    "boardManufacturer   : %s \n" \
+                    "boardProductName    : %s \n" \
+                    "boardSerialNumber   : %s \n" \
+                    "boardPartNumber     : %s \n" \
+                    "fruFileId           : %s \n"
+
+        tmpstr = formatstr % (ord(self.boardversion), self.size,
+                              self.language, self.getMfgRealData(),
+                              self.boardManufacturer, self.boardProductName,
+                              self.boardSerialNumber, self.boardPartNumber,
+                              self.fruFileId)
+        for i in range(1, 11):
+            valtmp = "boardextra%d" % i
+            if hasattr(self, valtmp):
+                valtmpval = getattr(self, valtmp)
+                tmpstr += "boardextra%d         : %s \n" % (i, valtmpval)
+            else:
+                break
+
+        return tmpstr
+
+    def todict(self):
+        dic = collections.OrderedDict()
+        dic["boardversion"] = ord(self.boardversion)
+        dic["boardlength"] = self.size
+        dic["boardlanguage"] = self.language
+        dic["boardmfg_date"] = self.getMfgRealData()
+        dic["boardManufacturer"] = self.boardManufacturer
+        dic["boardProductName"] = self.boardProductName
+        dic["boardSerialNumber"] = self.boardSerialNumber
+        dic["boardPartNumber"] = self.boardPartNumber
+        dic["boardfruFileId"] = self.fruFileId
+        for i in range(1, 11):
+            valtmp = "boardextra%d" % i
+            if hasattr(self, valtmp):
+                valtmpval = getattr(self, valtmp)
+                dic[valtmp] = valtmpval
+            else:
+                break
+        return dic
+
+    def decodedata(self):
+        index = 0
+        self.areaversion = self.data[index]
+        index += 1
+        d_print("decode length :%d class size:%d" %
+                ((ord(self.data[index]) * 8), self.size))
+        index += 2
+
+        timetmp = self.data[index: index + 3]
+        self.mfg_date = ord(timetmp[0]) | (
+            ord(timetmp[1]) << 8) | (ord(timetmp[2]) << 16)
+        d_print("decode getMfgRealData :%s" % self.getMfgRealData())
+        index += 3
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.boardManufacturer = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode boardManufacturer:%s" % self.boardManufacturer)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.boardProductName = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode boardProductName:%s" % self.boardProductName)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.boardSerialNumber = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode boardSerialNumber:%s" % self.boardSerialNumber)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.boardPartNumber = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode boardPartNumber:%s" % self.boardPartNumber)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.fruFileId = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode fruFileId:%s" % self.fruFileId)
+
+
+        for i in range(1, 11):
+            valtmp = "boardextra%d" % i
+            if self.data[index] != chr(0xc1):
+                templen = FruUtil.decodeLength(self.data[index])
+                tmpval = self.data[index + 1: index + templen + 1]
+                setattr(self, valtmp, tmpval)
+                index += templen + 1
+                d_print("decode boardextra%d:%s" % (i, tmpval))
+            else:
+                break
+
+    def recalcute(self):
+        d_print("boardInfoArea version:%x" % ord(self.boardversion))
+        d_print("boardInfoArea length:%d" % self.size)
+        d_print("boardInfoArea language:%x" % self.language)
+        self.mfg_date = FruUtil.minToData()
+        d_print("boardInfoArea mfg_date:%x" % self.mfg_date)
+
+        self.data = chr(ord(self.boardversion)) + \
+            chr(self.size / 8) + chr(self.language)
+
+        self.data += chr(self.mfg_date & 0xFF)
+        self.data += chr((self.mfg_date >> 8) & 0xFF)
+        self.data += chr((self.mfg_date >> 16) & 0xFF)
+
+        d_print("boardInfoArea boardManufacturer:%s" % self.boardManufacturer)
+        typelength = FruUtil.getTypeLength(self.boardManufacturer)
+        self.data += chr(typelength)
+        self.data += self.boardManufacturer
+
+        d_print("boardInfoArea boardProductName:%s" % self.boardProductName)
+        self.data += chr(FruUtil.getTypeLength(self.boardProductName))
+        self.data += self.boardProductName
+
+        d_print("boardInfoArea boardSerialNumber:%s" % self.boardSerialNumber)
+        self.data += chr(FruUtil.getTypeLength(self.boardSerialNumber))
+        self.data += self.boardSerialNumber
+
+        d_print("boardInfoArea boardPartNumber:%s" % self.boardPartNumber)
+        self.data += chr(FruUtil.getTypeLength(self.boardPartNumber))
+        self.data += self.boardPartNumber
+
+        d_print("boardInfoArea fruFileId:%s" % self.fruFileId)
+        self.data += chr(FruUtil.getTypeLength(self.fruFileId))
+        self.data += self.fruFileId
+
+        for i in range(1, 11):
+            valtmp = "boardextra%d" % i
+            if hasattr(self, valtmp):
+                valtmpval = getattr(self, valtmp)
+                d_print("boardInfoArea boardextra%d:%s" % (i, valtmpval))
+                self.data += chr(FruUtil.getTypeLength(valtmpval))
+                if valtmpval is None:
+                    pass
+                else:
+                    self.data += valtmpval
+            else:
+                break
+
+        self.data += chr(0xc1)
+
+        if len(self.data) > (self.size - 1):
+            incr = (len(self.data) - self.size) / 8 + 1
+            self.size += incr * 8
+
+        self.data = self.data[0:1] + chr(self.size / 8) + self.data[2:]
+        d_print("self data:%d" % len(self.data))
+        d_print("self size:%d" % self.size)
+        d_print("adjust size:%d" % (self.size - len(self.data) - 1))
+        self.data = self.data.ljust((self.size - 1), self.INITVALUE)
+
+        # checksum
+        checksum = FruUtil.checksum(self.data)
+        d_print("board info checksum:%x" % checksum)
+        self.data += chr(checksum)
+
+    def getMfgRealData(self):
+        starttime = datetime(1996, 1, 1, 0, 0, 0)
+        mactime = starttime + timedelta(minutes=self.mfg_date)
+        return mactime
+
+    @property
+    def language(self):
+        self._language = 25
+        return self._language
+
+    @property
+    def mfg_date(self):
+        return self._mfg_date
+
+    @mfg_date.setter
+    def mfg_date(self, val):
+        self._mfg_date = val
+
+    @property
+    def boardversion(self):
+        self._boardversion = self.COMMON_HEAD_VERSION
+        return self._boardversion
+
+    @property
+    def fruFileId(self):
+        return self._FRUFileID
+
+    @fruFileId.setter
+    def fruFileId(self, val):
+        self._FRUFileID = val
+
+    @property
+    def boardPartNumber(self):
+        return self._boardPartNumber
+
+    @boardPartNumber.setter
+    def boardPartNumber(self, val):
+        self._boardPartNumber = val
+
+    @property
+    def boardSerialNumber(self):
+        return self._boardSerialNumber
+
+    @boardSerialNumber.setter
+    def boardSerialNumber(self, val):
+        self._boardSerialNumber = val
+
+    @property
+    def boardProductName(self):
+        return self._boradProductName
+
+    @boardProductName.setter
+    def boardProductName(self, val):
+        self._boradProductName = val
+
+    @property
+    def boardManufacturer(self):
+        return self._boardManufacturer
+
+    @boardManufacturer.setter
+    def boardManufacturer(self, val):
+        self._boardManufacturer = val
+
+    @property
+    def boardTime(self):
+        return self._boardTime
+
+    @boardTime.setter
+    def boardTime(self, val):
+        self._boardTime = val
+
+    @property
+    def fields(self):
+        return self._fields
+
+    @fields.setter
+    def fields(self, val):
+        self._fields = val
+
+
+class ProductInfoArea(BaseArea):
+    _productManufacturer = None
+    _productAssetTag = None
+    _FRUFileID = None
+
+    def __str__(self):
+        formatstr = "version             : %x\n" \
+                    "length              : %d \n" \
+                    "language            : %x \n" \
+                    "productManufacturer : %s \n" \
+                    "productName         : %s \n" \
+                    "productPartModelName: %s \n" \
+                    "productVersion      : %s \n" \
+                    "productSerialNumber : %s \n" \
+                    "productAssetTag     : %s \n" \
+                    "fruFileId           : %s \n"
+
+        tmpstr = formatstr % (ord(self.areaversion), self.size,
+                              self.language, self.productManufacturer,
+                              self.productName, self.productPartModelName,
+                              self.productVersion, self.productSerialNumber,
+                              self.productAssetTag, self.fruFileId)
+
+        for i in range(1, 11):
+            valtmp = "productextra%d" % i
+            if hasattr(self, valtmp):
+                valtmpval = getattr(self, valtmp)
+                tmpstr += "productextra%d       : %s \n" % (i, valtmpval)
+            else:
+                break
+
+        return tmpstr
+
+    def todict(self):
+        dic = collections.OrderedDict()
+        dic["productversion"] = ord(self.areaversion)
+        dic["productlength"] = self.size
+        dic["productlanguage"] = self.language
+        dic["productManufacturer"] = self.productManufacturer
+        dic["productName"] = self.productName
+        dic["productPartModelName"] = self.productPartModelName
+        dic["productVersion"] = int(self.productVersion, 16)
+        dic["productSerialNumber"] = self.productSerialNumber
+        dic["productAssetTag"] = self.productAssetTag
+        dic["productfruFileId"] = self.fruFileId
+        for i in range(1, 11):
+            valtmp = "productextra%d" % i
+            if hasattr(self, valtmp):
+                valtmpval = getattr(self, valtmp)
+                dic[valtmp] = valtmpval
+            else:
+                break
+        return dic
+
+    def decodedata(self):
+        index = 0
+        self.areaversion = self.data[index]  # 0
+        index += 1
+        d_print("decode length %d" % (ord(self.data[index]) * 8))
+        d_print("class size %d" % self.size)
+        index += 2
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.productManufacturer = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode productManufacturer:%s" % self.productManufacturer)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.productName = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode productName:%s" % self.productName)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.productPartModelName = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode productPartModelName:%s" % self.productPartModelName)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.productVersion = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode productVersion:%s" % self.productVersion)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.productSerialNumber = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode productSerialNumber:%s" % self.productSerialNumber)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.productAssetTag = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode productAssetTag:%s" % self.productAssetTag)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.fruFileId = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode fruFileId:%s" % self.fruFileId)
+
+        for i in range(1, 11):
+            valtmp = "productextra%d" % i
+            if self.data[index] != chr(0xc1) and index < self.size - 1:
+                templen = FruUtil.decodeLength(self.data[index])
+                if templen == 0:
+                    break
+                tmpval = self.data[index + 1: index + templen + 1]
+                d_print("decode boardextra%d:%s" % (i, tmpval))
+                setattr(self, valtmp, tmpval)
+                index += templen + 1
+            else:
+                break
+
+    @property
+    def productVersion(self):
+        return self._productVersion
+
+    @productVersion.setter
+    def productVersion(self, name):
+        self._productVersion = name
+
+    @property
+    def areaversion(self):
+        self._areaversion = self.COMMON_HEAD_VERSION
+        return self._areaversion
+
+    @areaversion.setter
+    def areaversion(self, name):
+        self._areaversion = name
+
+    @property
+    def language(self):
+        self._language = 25
+        return self._language
+
+    @property
+    def productManufacturer(self):
+        return self._productManufacturer
+
+    @productManufacturer.setter
+    def productManufacturer(self, name):
+        self._productManufacturer = name
+
+    @property
+    def productName(self):
+        return self._productName
+
+    @productName.setter
+    def productName(self, name):
+        self._productName = name
+
+    @property
+    def productPartModelName(self):
+        return self._productPartModelName
+
+    @productPartModelName.setter
+    def productPartModelName(self, name):
+        self._productPartModelName = name
+
+    @property
+    def productSerialNumber(self):
+        return self._productSerialNumber
+
+    @productSerialNumber.setter
+    def productSerialNumber(self, name):
+        self._productSerialNumber = name
+
+    @property
+    def productAssetTag(self):
+        return self._productAssetTag
+
+    @productAssetTag.setter
+    def productAssetTag(self, name):
+        self._productAssetTag = name
+
+    @property
+    def fruFileId(self):
+        return self._FRUFileID
+
+    @fruFileId.setter
+    def fruFileId(self, name):
+        self._FRUFileID = name
+
+    def recalcute(self):
+        d_print("product version:%x" % ord(self.areaversion))
+        d_print("product length:%d" % self.size)
+        d_print("product language:%x" % self.language)
+        self.data = chr(ord(self.areaversion)) + \
+            chr(self.size / 8) + chr(self.language)
+
+        typelength = FruUtil.getTypeLength(self.productManufacturer)
+        self.data += chr(typelength)
+        self.data += self.productManufacturer
+
+        self.data += chr(FruUtil.getTypeLength(self.productName))
+        self.data += self.productName
+
+        self.data += chr(FruUtil.getTypeLength(self.productPartModelName))
+        self.data += self.productPartModelName
+
+        self.data += chr(FruUtil.getTypeLength(self.productVersion))
+        self.data += self.productVersion
+
+        self.data += chr(FruUtil.getTypeLength(self.productSerialNumber))
+        self.data += self.productSerialNumber
+
+        self.data += chr(FruUtil.getTypeLength(self.productAssetTag))
+        if self.productAssetTag is not None:
+            self.data += self.productAssetTag
+
+        self.data += chr(FruUtil.getTypeLength(self.fruFileId))
+        self.data += self.fruFileId
+
+        # whether the extended field exists or not
+        for i in range(1, 11):
+            valtmp = "productextra%d" % i
+            if hasattr(self, valtmp):
+                valtmpval = getattr(self, valtmp)
+                d_print("boardInfoArea productextra%d:%s" % (i, valtmpval))
+                self.data += chr(FruUtil.getTypeLength(valtmpval))
+                if valtmpval is None:
+                    pass
+                else:
+                    self.data += valtmpval
+            else:
+                break
+
+        self.data += chr(0xc1)
+        if len(self.data) > (self.size - 1):
+            incr = (len(self.data) - self.size) / 8 + 1
+            self.size += incr * 8
+        d_print("self.data:%d" % len(self.data))
+        d_print("self.size:%d" % self.size)
+
+        self.data = self.data[0:1] + chr(self.size / 8) + self.data[2:]
+        self.data = self.data.ljust((self.size - 1), self.INITVALUE)
+        checksum = FruUtil.checksum(self.data)
+        d_print("board info checksum:%x" % checksum)
+        self.data += chr(checksum)
+
+
+class MultiRecordArea(BaseArea):
+    pass
+
+
+class Field(object):
+
+    def __init__(self, fieldType="ASCII", fieldData=""):
+        self.fieldData = fieldData
+        self.fieldType = fieldType
+
+    @property
+    def data(self):
+        return self._data
+
+    @property
+    def fieldType(self):
+        return self._fieldType
+
+    @property
+    def fieldData(self):
+        return self._fieldData
+
+
+class ipmifru(BaseArea):
+    _BoardInfoArea = None
+    _ProductInfoArea = None
+    _InternalUseArea = None
+    _ChassisInfoArea = None
+    _multiRecordArea = None
+    _productinfoAreaOffset = BaseArea.INITVALUE
+    _boardInfoAreaOffset = BaseArea.INITVALUE
+    _internalUserAreaOffset = BaseArea.INITVALUE
+    _chassicInfoAreaOffset = BaseArea.INITVALUE
+    _multiRecordAreaOffset = BaseArea.INITVALUE
+    _bindata = None
+    _bodybin = None
+    _version = BaseArea.COMMON_HEAD_VERSION
+    _zeroCheckSum = None
+    _frusize = 256
+
+    def __str__(self):
+        tmpstr = ""
+        if self.boardInfoArea.isPresent:
+            tmpstr += "\nboardinfoarea: \n"
+            tmpstr += self.boardInfoArea.__str__()
+        if self.productInfoArea.isPresent:
+            tmpstr += "\nproductinfoarea: \n"
+            tmpstr += self.productInfoArea.__str__()
+        return tmpstr
+
+    def decodeBin(self, eeprom):
+        commonHead = eeprom[0:8]
+        d_print("decode version %x" % ord(commonHead[0]))
+        if self.COMMON_HEAD_VERSION != commonHead[0]:
+            raise FruException("HEAD VERSION error,not Fru format!", -10)
+        if FruUtil.checksum(commonHead[0:7]) != ord(commonHead[7]):
+            strtemp = "check header checksum error [cal:%02x data:%02x]" % (
+                FruUtil.checksum(commonHead[0:7]), ord(commonHead[7]))
+            raise FruException(strtemp, -3)
+        if commonHead[1] != self.INITVALUE:
+            d_print("Internal Use Area is present")
+            self.internalUseArea = InternalUseArea(
+                name="Internal Use Area", size=self.SUGGESTED_SIZE_INTERNAL_USE_AREA)
+            self.internalUseArea.isPresent = True
+            self.internalUserAreaOffset = ord(commonHead[1])
+            self.internalUseArea.data = eeprom[self.internalUserAreaOffset * 8: (
+                self.internalUserAreaOffset * 8 + self.internalUseArea.size)]
+        if commonHead[2] != self.INITVALUE:
+            d_print("Chassis Info Area is present")
+            self.chassisInfoArea = ChassisInfoArea(
+                name="Chassis Info Area", size=self.SUGGESTED_SIZE_CHASSIS_INFO_AREA)
+            self.chassisInfoArea.isPresent = True
+            self.chassicInfoAreaOffset = ord(commonHead[2])
+            self.chassisInfoArea.data = eeprom[self.chassicInfoAreaOffset * 8: (
+                self.chassicInfoAreaOffset * 8 + self.chassisInfoArea.size)]
+        if commonHead[3] != self.INITVALUE:
+            self.boardInfoArea = BoardInfoArea(
+                name="Board Info Area", size=self.SUGGESTED_SIZE_BOARD_INFO_AREA)
+            self.boardInfoArea.isPresent = True
+            self.boardInfoAreaOffset = ord(commonHead[3])
+            self.boardInfoArea.size = ord(
+                eeprom[self.boardInfoAreaOffset * 8 + 1]) * 8
+            d_print("Board Info Area is present size:%d" %
+                    (self.boardInfoArea.size))
+            self.boardInfoArea.data = eeprom[self.boardInfoAreaOffset * 8: (
+                self.boardInfoAreaOffset * 8 + self.boardInfoArea.size)]
+            if FruUtil.checksum(self.boardInfoArea.data[:-1]) != ord(self.boardInfoArea.data[-1:]):
+                strtmp = "check boardInfoArea checksum error[cal:%02x data:%02x]" %  \
+                    (FruUtil.checksum(
+                        self.boardInfoArea.data[:-1]), ord(self.boardInfoArea.data[-1:]))
+                raise FruException(strtmp, -3)
+            self.boardInfoArea.decodedata()
+        if commonHead[4] != self.INITVALUE:
+            d_print("Product Info Area is present")
+            self.productInfoArea = ProductInfoArea(
+                name="Product Info Area ", size=self.SUGGESTED_SIZE_PRODUCT_INFO_AREA)
+            self.productInfoArea.isPresent = True
+            self.productinfoAreaOffset = ord(commonHead[4])
+            d_print("length offset value: %02x" %
+                    ord(eeprom[self.productinfoAreaOffset * 8 + 1]))
+            self.productInfoArea.size = ord(
+                eeprom[self.productinfoAreaOffset * 8 + 1]) * 8
+            d_print("Product Info Area is present size:%d" %
+                    (self.productInfoArea.size))
+
+            self.productInfoArea.data = eeprom[self.productinfoAreaOffset * 8: (
+                self.productinfoAreaOffset * 8 + self.productInfoArea.size)]
+            if FruUtil.checksum(self.productInfoArea.data[:-1]) != ord(self.productInfoArea.data[-1:]):
+                strtmp = "check productInfoArea checksum error [cal:%02x data:%02x]" % (
+                    FruUtil.checksum(self.productInfoArea.data[:-1]), ord(self.productInfoArea.data[-1:]))
+                raise FruException(strtmp, -3)
+            self.productInfoArea.decodedata()
+        if commonHead[5] != self.INITVALUE:
+            self.multiRecordArea = MultiRecordArea(
+                name="MultiRecord record Area ")
+            d_print("MultiRecord record present")
+            self.multiRecordArea.isPresent = True
+            self.multiRecordAreaOffset = ord(commonHead[5])
+            self.multiRecordArea.data = eeprom[self.multiRecordAreaOffset * 8: (
+                self.multiRecordAreaOffset * 8 + self.multiRecordArea.size)]
+
+    def initDefault(self):
+        self.version = self.COMMON_HEAD_VERSION
+        self.internalUserAreaOffset = self.INITVALUE
+        self.chassicInfoAreaOffset = self.INITVALUE
+        self.boardInfoAreaOffset = self.INITVALUE
+        self.productinfoAreaOffset = self.INITVALUE
+        self.multiRecordAreaOffset = self.INITVALUE
+        self.PAD = self.INITVALUE
+        self.zeroCheckSum = self.INITVALUE
+        self.offset = self.SUGGESTED_SIZE_COMMON_HEADER
+        self.productInfoArea = None
+        self.internalUseArea = None
+        self.boardInfoArea = None
+        self.chassisInfoArea = None
+        self.multiRecordArea = None
+        # self.recalcute()
+
+    @property
+    def version(self):
+        return self._version
+
+    @version.setter
+    def version(self, name):
+        self._version = name
+
+    @property
+    def internalUserAreaOffset(self):
+        return self._internalUserAreaOffset
+
+    @internalUserAreaOffset.setter
+    def internalUserAreaOffset(self, obj):
+        self._internalUserAreaOffset = obj
+
+    @property
+    def chassicInfoAreaOffset(self):
+        return self._chassicInfoAreaOffset
+
+    @chassicInfoAreaOffset.setter
+    def chassicInfoAreaOffset(self, obj):
+        self._chassicInfoAreaOffset = obj
+
+    @property
+    def productinfoAreaOffset(self):
+        return self._productinfoAreaOffset
+
+    @productinfoAreaOffset.setter
+    def productinfoAreaOffset(self, obj):
+        self._productinfoAreaOffset = obj
+
+    @property
+    def boardInfoAreaOffset(self):
+        return self._boardInfoAreaOffset
+
+    @boardInfoAreaOffset.setter
+    def boardInfoAreaOffset(self, obj):
+        self._boardInfoAreaOffset = obj
+
+    @property
+    def multiRecordAreaOffset(self):
+        return self._multiRecordAreaOffset
+
+    @multiRecordAreaOffset.setter
+    def multiRecordAreaOffset(self, obj):
+        self._multiRecordAreaOffset = obj
+
+    @property
+    def zeroCheckSum(self):
+        return self._zeroCheckSum
+
+    @zeroCheckSum.setter
+    def zeroCheckSum(self, obj):
+        self._zeroCheckSum = obj
+
+    @property
+    def productInfoArea(self):
+        return self._ProductInfoArea
+
+    @productInfoArea.setter
+    def productInfoArea(self, obj):
+        self._ProductInfoArea = obj
+
+    @property
+    def internalUseArea(self):
+        return self._InternalUseArea
+
+    @internalUseArea.setter
+    def internalUseArea(self, obj):
+        self.internalUseArea = obj
+
+    @property
+    def boardInfoArea(self):
+        return self._BoardInfoArea
+
+    @boardInfoArea.setter
+    def boardInfoArea(self, obj):
+        self._BoardInfoArea = obj
+
+    @property
+    def chassisInfoArea(self):
+        return self._ChassisInfoArea
+
+    @chassisInfoArea.setter
+    def chassisInfoArea(self, obj):
+        self._ChassisInfoArea = obj
+
+    @property
+    def multiRecordArea(self):
+        return self._multiRecordArea
+
+    @multiRecordArea.setter
+    def multiRecordArea(self, obj):
+        self._multiRecordArea = obj
+
+    @property
+    def bindata(self):
+        return self._bindata
+
+    @bindata.setter
+    def bindata(self, obj):
+        self._bindata = obj
+
+    @property
+    def bodybin(self):
+        return self._bodybin
+
+    @bodybin.setter
+    def bodybin(self, obj):
+        self._bodybin = obj
+
+    def recalcuteCommonHead(self):
+        self.bindata = ""
+        self.offset = self.SUGGESTED_SIZE_COMMON_HEADER
+        d_print("common Header %d" % self.offset)
+        d_print("fru eeprom size  %d" % self._frusize)
+        if self.internalUseArea is not None and self.internalUseArea.isPresent:
+            self.internalUserAreaOffset = self.offset / 8
+            self.offset += self.internalUseArea.size
+            d_print("internalUseArea is present offset:%d" % self.offset)
+
+        if self.chassisInfoArea is not None and self.chassisInfoArea.isPresent:
+            self.chassicInfoAreaOffset = self.offset / 8
+            self.offset += self.chassisInfoArea.size
+            d_print("chassisInfoArea is present offset:%d" % self.offset)
+
+        if self.boardInfoArea is not None and self.boardInfoArea.isPresent:
+            self.boardInfoAreaOffset = self.offset / 8
+            self.offset += self.boardInfoArea.size
+            d_print("boardInfoArea is present offset:%d" % self.offset)
+            d_print("boardInfoArea is present size:%d" %
+                    self.boardInfoArea.size)
+
+        if self.productInfoArea is not None and self.productInfoArea.isPresent:
+            self.productinfoAreaOffset = self.offset / 8
+            self.offset += self.productInfoArea.size
+            d_print("productInfoArea is present offset:%d" % self.offset)
+
+        if self.multiRecordArea is not None and self.multiRecordArea.isPresent:
+            self.multiRecordAreaOffset = self.offset / 8
+            d_print("multiRecordArea is present offset:%d" % self.offset)
+
+        if self.internalUserAreaOffset == self.INITVALUE:
+            self.internalUserAreaOffset = 0
+        if self.productinfoAreaOffset == self.INITVALUE:
+            self.productinfoAreaOffset = 0
+        if self.chassicInfoAreaOffset == self.INITVALUE:
+            self.chassicInfoAreaOffset = 0
+        if self.boardInfoAreaOffset == self.INITVALUE:
+            self.boardInfoAreaOffset = 0
+        if self.multiRecordAreaOffset == self.INITVALUE:
+            self.multiRecordAreaOffset = 0
+
+        self.zeroCheckSum = (0x100 - ord(self.version) - self.internalUserAreaOffset - self.chassicInfoAreaOffset - self.productinfoAreaOffset
+                             - self.boardInfoAreaOffset - self.multiRecordAreaOffset) & 0xff
+        d_print("zerochecksum:%x" % self.zeroCheckSum)
+        self.data = self.version + chr(self.internalUserAreaOffset) + chr(self.chassicInfoAreaOffset) + chr(
+            self.boardInfoAreaOffset) + chr(self.productinfoAreaOffset) + chr(self.multiRecordAreaOffset) + self.INITVALUE + chr(self.zeroCheckSum)
+
+        self.bindata = self.data + self.bodybin
+        totallen = len(self.bindata)
+        d_print("totallen %d" % totallen)
+        if (totallen < self._frusize):
+            self.bindata = self.bindata.ljust(self._frusize, self.INITVALUE)
+        else:
+            raise FruException('bin data more than %d' % self._frusize, -2)
+
+    def recalcutebin(self):
+        self.bodybin = ""
+        if self.internalUseArea is not None and self.internalUseArea.isPresent:
+            d_print("internalUseArea present")
+            self.bodybin += self.internalUseArea.data
+        if self.chassisInfoArea is not None and self.chassisInfoArea.isPresent:
+            d_print("chassisInfoArea present")
+            self.bodybin += self.chassisInfoArea.data
+        if self.boardInfoArea is not None and self.boardInfoArea.isPresent:
+            d_print("boardInfoArea present")
+            self.boardInfoArea.recalcute()
+            self.bodybin += self.boardInfoArea.data
+        if self.productInfoArea is not None and self.productInfoArea.isPresent:
+            d_print("productInfoAreapresent")
+            self.productInfoArea.recalcute()
+            self.bodybin += self.productInfoArea.data
+        if self.multiRecordArea is not None and self.multiRecordArea.isPresent:
+            d_print("multiRecordArea present")
+            self.bodybin += self.productInfoArea.data
+
+    def recalcute(self, fru_eeprom_size = 256):
+        self._frusize = fru_eeprom_size
+        self.recalcutebin()
+        self.recalcuteCommonHead()
diff --git a/platform/centec-arm64/sonic-platform-modules-micas/common/lib/wbutil/__init__.py b/platform/centec-arm64/sonic-platform-modules-micas/common/lib/wbutil/__init__.py
new file mode 100644
index 000000000..e69de29bb
diff --git a/platform/centec-arm64/sonic-platform-modules-micas/common/lib/wbutil/baseutil.py b/platform/centec-arm64/sonic-platform-modules-micas/common/lib/wbutil/baseutil.py
new file mode 100755
index 000000000..1cf74d32d
--- /dev/null
+++ b/platform/centec-arm64/sonic-platform-modules-micas/common/lib/wbutil/baseutil.py
@@ -0,0 +1,23 @@
+# -*- coding: UTF-8 -*-
+import os
+
+def get_machine_info():
+    if not os.path.isfile('/host/machine.conf'):
+        return None
+    machine_vars = {}
+    with open('/host/machine.conf') as machine_file:
+        for line in machine_file:
+            tokens = line.split('=')
+            if len(tokens) < 2:
+                continue
+            machine_vars[tokens[0]] = tokens[1].strip()
+    return machine_vars
+
+def get_platform_info(machine_info):
+    if machine_info != None:
+        if 'onie_platform' in machine_info:
+            return  machine_info['onie_platform']
+        elif 'aboot_platform' in machine_info:
+            return machine_info['aboot_platform']
+    return None
+
diff --git a/platform/centec-arm64/sonic-platform-modules-micas/common/lib/wbutil/logutil.py b/platform/centec-arm64/sonic-platform-modules-micas/common/lib/wbutil/logutil.py
new file mode 100755
index 000000000..2b001f21d
--- /dev/null
+++ b/platform/centec-arm64/sonic-platform-modules-micas/common/lib/wbutil/logutil.py
@@ -0,0 +1,67 @@
+# -*- coding: UTF-8 -*-
+
+import logging
+from syslog import (
+    syslog,
+    openlog,
+    LOG_WARNING,
+    LOG_CRIT,
+    LOG_DEBUG,
+    LOG_ERR,
+    LOG_PID,
+    LOG_INFO,
+)
+
+class Logger():
+    def __init__(self, prefix, filepath=None, syslog=False, dbg_mask=0x0):
+        self.logger = None
+        if syslog is False:
+            if filepath is None:
+                raise AttributeError("filepath needed")
+
+            # init logging
+            formatter = logging.Formatter( "%(asctime)s %(levelname)s %(filename)s[%(funcName)s][%(lineno)s]: %(message)s")
+            handler = logging.FileHandler(self.filepath)
+            handler.setFormatter(formatter)
+            self.logger = logging.getLogger(__name__)
+            self.logger.setLevel(logging.DEBUG)
+            self.logger.addHandler(handler)
+
+        self.prefix = prefix
+        self.use_syslog = syslog
+        self.dbg_mask = dbg_mask
+
+    def info(self, s):
+        if self.use_syslog:
+            self._syslog(s, LOG_INFO)
+        else:
+            self.logger.info(s)
+
+    def debug(self, dbg_lvl, s):
+        if dbg_lvl & self.dbg_mask:
+            if self.use_syslog:
+                self._syslog(s, LOG_DEBUG)
+            else:
+                self.logger.debug(s)
+
+    def warn(self, s):
+        if self.use_syslog:
+            self._syslog(s, LOG_WARNING)
+        else:
+            self.logger.warning(s)
+
+    def error(self, s):
+        if self.use_syslog:
+            self._syslog(s, LOG_ERR)
+        else:
+            self.logger.error(s)
+
+    def crit(self, s):
+        if self.use_syslog:
+            self._syslog(s, LOG_CRIT)
+        else:
+            self.logger.critical(s)
+
+    def _syslog(self, s, t):
+        openlog(self.prefix, LOG_PID)
+        syslog(t, s)
diff --git a/platform/centec-arm64/sonic-platform-modules-micas/common/lib/wbutil/smbus.py b/platform/centec-arm64/sonic-platform-modules-micas/common/lib/wbutil/smbus.py
new file mode 100755
index 000000000..cfef713c3
--- /dev/null
+++ b/platform/centec-arm64/sonic-platform-modules-micas/common/lib/wbutil/smbus.py
@@ -0,0 +1,774 @@
+"""smbus2 - A drop-in replacement for smbus-cffi/smbus-python"""
+# The MIT License (MIT)
+# Copyright (c) 2017 Karl-Petter Lindegaard
+#
+# Permission is hereby granted, free of charge, to any person obtaining a copy
+# of this software and associated documentation files (the "Software"), to deal
+# in the Software without restriction, including without limitation the rights
+# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+# copies of the Software, and to permit persons to whom the Software is
+# furnished to do so, subject to the following conditions:
+#
+# The above copyright notice and this permission notice shall be included in all
+# copies or substantial portions of the Software.
+#
+# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+# SOFTWARE.
+
+import os
+import sys
+from fcntl import ioctl
+from ctypes import c_uint32, c_uint8, c_uint16, c_char, POINTER, Structure, Array, Union, create_string_buffer, string_at
+
+
+# Commands from uapi/linux/i2c-dev.h
+I2C_SLAVE = 0x0703  # Use this slave address
+I2C_SLAVE_FORCE = 0x0706  # Use this slave address, even if it is already in use by a driver!
+I2C_FUNCS = 0x0705  # Get the adapter functionality mask
+I2C_RDWR = 0x0707  # Combined R/W transfer (one STOP only)
+I2C_SMBUS = 0x0720  # SMBus transfer. Takes pointer to i2c_smbus_ioctl_data
+I2C_PEC   = 0x0708
+
+# SMBus transfer read or write markers from uapi/linux/i2c.h
+I2C_SMBUS_WRITE = 0
+I2C_SMBUS_READ = 1
+
+# Size identifiers uapi/linux/i2c.h
+I2C_SMBUS_QUICK = 0
+I2C_SMBUS_BYTE = 1
+I2C_SMBUS_BYTE_DATA = 2
+I2C_SMBUS_WORD_DATA = 3
+I2C_SMBUS_PROC_CALL = 4
+I2C_SMBUS_BLOCK_DATA = 5  # This isn't supported by Pure-I2C drivers with SMBUS emulation, like those in RaspberryPi, OrangePi, etc :(
+I2C_SMBUS_BLOCK_PROC_CALL = 7  # Like I2C_SMBUS_BLOCK_DATA, it isn't supported by Pure-I2C drivers either.
+I2C_SMBUS_I2C_BLOCK_DATA = 8
+I2C_SMBUS_BLOCK_MAX = 32
+
+# To determine what functionality is present (uapi/linux/i2c.h)
+try:
+    from enum import IntFlag
+except ImportError:
+    IntFlag = int
+
+
+class I2cFunc(IntFlag):
+    """
+    These flags identify the operations supported by an I2C/SMBus device.
+
+    You can test these flags on your `smbus.funcs`
+
+    On newer python versions, I2cFunc is an IntFlag enum, but it
+    falls back to class with a bunch of int constants on older releases.
+    """
+    I2C = 0x00000001
+    ADDR_10BIT = 0x00000002
+    PROTOCOL_MANGLING = 0x00000004  # I2C_M_IGNORE_NAK etc.
+    SMBUS_PEC = 0x00000008
+    NOSTART = 0x00000010  # I2C_M_NOSTART
+    SLAVE = 0x00000020
+    SMBUS_BLOCK_PROC_CALL = 0x00008000  # SMBus 2.0
+    SMBUS_QUICK = 0x00010000
+    SMBUS_READ_BYTE = 0x00020000
+    SMBUS_WRITE_BYTE = 0x00040000
+    SMBUS_READ_BYTE_DATA = 0x00080000
+    SMBUS_WRITE_BYTE_DATA = 0x00100000
+    SMBUS_READ_WORD_DATA = 0x00200000
+    SMBUS_WRITE_WORD_DATA = 0x00400000
+    SMBUS_PROC_CALL = 0x00800000
+    SMBUS_READ_BLOCK_DATA = 0x01000000
+    SMBUS_WRITE_BLOCK_DATA = 0x02000000
+    SMBUS_READ_I2C_BLOCK = 0x04000000  # I2C-like block xfer
+    SMBUS_WRITE_I2C_BLOCK = 0x08000000  # w/ 1-byte reg. addr.
+    SMBUS_HOST_NOTIFY = 0x10000000
+
+    SMBUS_BYTE = 0x00060000
+    SMBUS_BYTE_DATA = 0x00180000
+    SMBUS_WORD_DATA = 0x00600000
+    SMBUS_BLOCK_DATA = 0x03000000
+    SMBUS_I2C_BLOCK = 0x0c000000
+    SMBUS_EMUL = 0x0eff0008
+
+
+# i2c_msg flags from uapi/linux/i2c.h
+I2C_M_RD = 0x0001
+
+# Pointer definitions
+LP_c_uint8 = POINTER(c_uint8)
+LP_c_uint16 = POINTER(c_uint16)
+LP_c_uint32 = POINTER(c_uint32)
+
+
+#############################################################
+# Type definitions as in i2c.h
+
+
+class i2c_smbus_data(Array):
+    """
+    Adaptation of the i2c_smbus_data union in ``i2c.h``.
+
+    Data for SMBus messages.
+    """
+    _length_ = I2C_SMBUS_BLOCK_MAX + 2
+    _type_ = c_uint8
+
+
+class union_i2c_smbus_data(Union):
+    _fields_ = [
+        ("byte", c_uint8),
+        ("word", c_uint16),
+        ("block", i2c_smbus_data)
+    ]
+
+
+union_pointer_type = POINTER(union_i2c_smbus_data)
+
+
+class i2c_smbus_ioctl_data(Structure):
+    """
+    As defined in ``i2c-dev.h``.
+    """
+    _fields_ = [
+        ('read_write', c_uint8),
+        ('command', c_uint8),
+        ('size', c_uint32),
+        ('data', union_pointer_type)]
+    __slots__ = [name for name, type in _fields_]
+
+    @staticmethod
+    def create(read_write=I2C_SMBUS_READ, command=0, size=I2C_SMBUS_BYTE_DATA):
+        u = union_i2c_smbus_data()
+        return i2c_smbus_ioctl_data(
+            read_write=read_write, command=command, size=size,
+            data=union_pointer_type(u))
+
+
+#############################################################
+# Type definitions for i2c_rdwr combined transactions
+
+
+class i2c_msg(Structure):
+    """
+    As defined in ``i2c.h``.
+    """
+    _fields_ = [
+        ('addr', c_uint16),
+        ('flags', c_uint16),
+        ('len', c_uint16),
+        ('buf', POINTER(c_char))]
+
+    def __iter__(self):
+        """ Iterator / Generator
+
+        :return: iterates over :py:attr:`buf`
+        :rtype: :py:class:`generator` which returns int values
+        """
+        idx = 0
+        while idx < self.len:
+            yield ord(self.buf[idx])
+            idx += 1
+
+    def __len__(self):
+        return self.len
+
+    def __bytes__(self):
+        return string_at(self.buf, self.len)
+
+    def __repr__(self):
+        return 'i2c_msg(%d,%d,%r)' % (self.addr, self.flags, self.__bytes__())
+
+    def __str__(self):
+        s = self.__bytes__()
+        if sys.version_info.major >= 3:
+            s = ''.join(map(chr, s))
+        return s
+
+    @staticmethod
+    def read(address, length):
+        """
+        Prepares an i2c read transaction.
+
+        :param address: Slave address.
+        :type: address: int
+        :param length: Number of bytes to read.
+        :type: length: int
+        :return: New :py:class:`i2c_msg` instance for read operation.
+        :rtype: :py:class:`i2c_msg`
+        """
+        arr = create_string_buffer(length)
+        return i2c_msg(
+            addr=address, flags=I2C_M_RD, len=length,
+            buf=arr)
+
+    @staticmethod
+    def write(address, buf):
+        """
+        Prepares an i2c write transaction.
+
+        :param address: Slave address.
+        :type address: int
+        :param buf: Bytes to write. Either list of values or str.
+        :type buf: list
+        :return: New :py:class:`i2c_msg` instance for write operation.
+        :rtype: :py:class:`i2c_msg`
+        """
+        if sys.version_info.major >= 3:
+            if type(buf) is str:
+                buf = bytes(map(ord, buf))
+            else:
+                buf = bytes(buf)
+        else:
+            if type(buf) is not str:
+                buf = ''.join([chr(x) for x in buf])
+        arr = create_string_buffer(buf, len(buf))
+        return i2c_msg(
+            addr=address, flags=0, len=len(arr),
+            buf=arr)
+
+
+class i2c_rdwr_ioctl_data(Structure):
+    """
+    As defined in ``i2c-dev.h``.
+    """
+    _fields_ = [
+        ('msgs', POINTER(i2c_msg)),
+        ('nmsgs', c_uint32)
+    ]
+    __slots__ = [name for name, type in _fields_]
+
+    @staticmethod
+    def create(*i2c_msg_instances):
+        """
+        Factory method for creating a i2c_rdwr_ioctl_data struct that can
+        be called with ``ioctl(fd, I2C_RDWR, data)``.
+
+        :param i2c_msg_instances: Up to 42 i2c_msg instances
+        :rtype: i2c_rdwr_ioctl_data
+        """
+        n_msg = len(i2c_msg_instances)
+        msg_array = (i2c_msg * n_msg)(*i2c_msg_instances)
+        return i2c_rdwr_ioctl_data(
+            msgs=msg_array,
+            nmsgs=n_msg
+        )
+
+
+#############################################################
+
+
+class SMBus(object):
+
+    def __init__(self, bus=None, force=False):
+        """
+        Initialize and (optionally) open an i2c bus connection.
+
+        :param bus: i2c bus number (e.g. 0 or 1)
+            or an absolute file path (e.g. `/dev/i2c-42`).
+            If not given, a subsequent  call to ``open()`` is required.
+        :type bus: int or str
+        :param force: force using the slave address even when driver is
+            already using it.
+        :type force: boolean
+        """
+        self.fd = None
+        self.funcs = I2cFunc(0)
+        if bus is not None:
+            self.open(bus)
+        self.address = None
+        self.force = force
+        self._force_last = None
+
+    def __enter__(self):
+        """Enter handler."""
+        return self
+
+    def __exit__(self, exc_type, exc_val, exc_tb):
+        """Exit handler."""
+        self.close()
+
+    def open(self, bus):
+        """
+        Open a given i2c bus.
+
+        :param bus: i2c bus number (e.g. 0 or 1)
+            or an absolute file path (e.g. '/dev/i2c-42').
+        :type bus: int or str
+        :raise TypeError: if type(bus) is not in (int, str)
+        """
+        if isinstance(bus, int):
+            filepath = "/dev/i2c-{}".format(bus)
+        elif isinstance(bus, str):
+            filepath = bus
+        else:
+            raise TypeError("Unexpected type(bus)={}".format(type(bus)))
+
+        self.fd = os.open(filepath, os.O_RDWR)
+        self.funcs = self._get_funcs()
+
+    def close(self):
+        """
+        Close the i2c connection.
+        """
+        if self.fd:
+            os.close(self.fd)
+            self.fd = None
+
+    def _set_address(self, address, force=None):
+        """
+        Set i2c slave address to use for subsequent calls.
+
+        :param address:
+        :type address: int
+        :param force:
+        :type force: Boolean
+        """
+        force = force if force is not None else self.force
+        if self.address != address or self._force_last != force:
+            if force is True:
+                ioctl(self.fd, I2C_SLAVE_FORCE, address)
+            else:
+                ioctl(self.fd, I2C_SLAVE, address)
+            self.address = address
+            self._force_last = force
+
+    def _get_funcs(self):
+        """
+        Returns a 32-bit value stating supported I2C functions.
+
+        :rtype: int
+        """
+        f = c_uint32()
+        ioctl(self.fd, I2C_FUNCS, f)
+        return f.value
+
+    def write_quick(self, i2c_addr, force=None):
+        """
+        Perform quick transaction. Throws IOError if unsuccessful.
+        :param i2c_addr: i2c address
+        :type i2c_addr: int
+        :param force:
+        :type force: Boolean
+        """
+        self._set_address(i2c_addr, force=force)
+        msg = i2c_smbus_ioctl_data.create(
+            read_write=I2C_SMBUS_WRITE, command=0, size=I2C_SMBUS_QUICK)
+        ioctl(self.fd, I2C_SMBUS, msg)
+
+    def read_byte(self, i2c_addr, force=None):
+        """
+        Read a single byte from a device.
+
+        :rtype: int
+        :param i2c_addr: i2c address
+        :type i2c_addr: int
+        :param force:
+        :type force: Boolean
+        :return: Read byte value
+        """
+        self._set_address(i2c_addr, force=force)
+        msg = i2c_smbus_ioctl_data.create(
+            read_write=I2C_SMBUS_READ, command=0, size=I2C_SMBUS_BYTE
+        )
+        ioctl(self.fd, I2C_SMBUS, msg)
+        return msg.data.contents.byte
+
+    def write_byte(self, i2c_addr, value, force=None):
+        """
+        Write a single byte to a device.
+
+        :param i2c_addr: i2c address
+        :type i2c_addr: int
+        :param value: value to write
+        :type value: int
+        :param force:
+        :type force: Boolean
+        """
+        self._set_address(i2c_addr, force=force)
+        msg = i2c_smbus_ioctl_data.create(
+            read_write=I2C_SMBUS_WRITE, command=value, size=I2C_SMBUS_BYTE
+        )
+        ioctl(self.fd, I2C_SMBUS, msg)
+
+    def read_byte_data(self, i2c_addr, register, force=None):
+        """
+        Read a single byte from a designated register.
+
+        :param i2c_addr: i2c address
+        :type i2c_addr: int
+        :param register: Register to read
+        :type register: int
+        :param force:
+        :type force: Boolean
+        :return: Read byte value
+        :rtype: int
+        """
+        val_t = -1
+        returnmsg=""
+        try:
+            self._set_address(i2c_addr, force=force)
+            msg = i2c_smbus_ioctl_data.create(
+                read_write=I2C_SMBUS_READ, command=register, size=I2C_SMBUS_BYTE_DATA
+            )
+            val_t = ioctl(self.fd, I2C_SMBUS, msg)
+        except Exception as e:
+            self.close()
+            returnmsg = str(e)
+        if val_t < 0:
+            return False, returnmsg
+        else:
+            return True, msg.data.contents.byte
+
+    def write_byte_data(self, i2c_addr, register, value, force=None):
+        """
+        Write a byte to a given register.
+
+        :param i2c_addr: i2c address
+        :type i2c_addr: int
+        :param register: Register to write to
+        :type register: int
+        :param value: Byte value to transmit
+        :type value: int
+        :param force:
+        :type force: Boolean
+        :rtype: None
+        """
+        val_t = -1
+        returnmsg = ""
+        try:
+            self._set_address(i2c_addr, force=force)
+            msg = i2c_smbus_ioctl_data.create(
+                read_write=I2C_SMBUS_WRITE, command=register, size=I2C_SMBUS_BYTE_DATA
+            )
+            msg.data.contents.byte = value
+            val_t = ioctl(self.fd, I2C_SMBUS, msg)
+        except Exception as e:
+            returnmsg = str(e)
+            self.close()
+        if val_t < 0:
+            return False, returnmsg or ""
+        else:
+            return True, ""
+
+    def write_byte_data_pec(self, i2c_addr, register, value, force=None):
+        """
+        Write a byte to a given register.
+
+        :param i2c_addr: i2c address
+        :type i2c_addr: int
+        :param register: Register to write to
+        :type register: int
+        :param value: Byte value to transmit
+        :type value: int
+        :param force:
+        :type force: Boolean
+        :rtype: None
+        """
+        val_t = -1
+        returnmsg = ""
+        try:
+            val_t = ioctl(self.fd, I2C_PEC, 1)
+            if val_t < 0:
+                raise Exception("set pec mod error")
+            self._set_address(i2c_addr, force=force)
+            msg = i2c_smbus_ioctl_data.create(
+                read_write=I2C_SMBUS_WRITE, command=register, size=I2C_SMBUS_BYTE_DATA
+            )
+            msg.data.contents.byte = value
+            val_t = ioctl(self.fd, I2C_SMBUS, msg)
+        except Exception as e:
+            returnmsg = str(e)
+            self.close()
+        if val_t < 0:
+            return False, returnmsg or ""
+        else:
+            return True, ""
+
+    def read_word_data(self, i2c_addr, register, force=None):
+        """
+        Read a single word (2 bytes) from a given register.
+
+        :param i2c_addr: i2c address
+        :type i2c_addr: int
+        :param register: Register to read
+        :type register: int
+        :param force:
+        :type force: Boolean
+        :return: 2-byte word
+        :rtype: int
+        """
+        val_t = -1
+        returnmsg = ""
+        try:
+            self._set_address(i2c_addr, force=force)
+            msg = i2c_smbus_ioctl_data.create(
+                read_write=I2C_SMBUS_READ, command=register, size=I2C_SMBUS_WORD_DATA
+            )
+            val_t = ioctl(self.fd, I2C_SMBUS, msg)
+        except Exception as e:
+            returnmsg = str(e)
+            self.close()
+        if val_t < 0:
+            return False, returnmsg or ""
+        else:
+            return True, msg.data.contents.word
+
+    def write_word_data_pec(self, i2c_addr, register, value, force=None):
+        """
+        Write a byte to a given register.
+
+        :param i2c_addr: i2c address
+        :type i2c_addr: int
+        :param register: Register to write to
+        :type register: int
+        :param value: Word value to transmit
+        :type value: int
+        :param force:
+        :type force: Boolean
+        :rtype: None
+        """
+        val_t = -1
+        returnmsg = ""
+        try:
+            val_t = ioctl(self.fd, I2C_PEC, 1)
+            if val_t < 0:
+                raise Exception("set pec mod error")
+            self._set_address(i2c_addr, force=force)
+            msg = i2c_smbus_ioctl_data.create(
+                read_write=I2C_SMBUS_WRITE, command=register, size=I2C_SMBUS_WORD_DATA
+            )
+            msg.data.contents.word = value
+            val_t = ioctl(self.fd, I2C_SMBUS, msg)
+        except Exception as e:
+            returnmsg = str(e)
+            self.close()
+        if val_t < 0:
+            return False, returnmsg or ""
+        else:
+            return True, ""
+
+    def write_word_data(self, i2c_addr, register, value, force=None):
+        """
+        Write a byte to a given register.
+
+        :param i2c_addr: i2c address
+        :type i2c_addr: int
+        :param register: Register to write to
+        :type register: int
+        :param value: Word value to transmit
+        :type value: int
+        :param force:
+        :type force: Boolean
+        :rtype: None
+        """
+        val_t = -1
+        returnmsg = ""
+        try:
+            self._set_address(i2c_addr, force=force)
+            msg = i2c_smbus_ioctl_data.create(
+                read_write=I2C_SMBUS_WRITE, command=register, size=I2C_SMBUS_WORD_DATA
+            )
+            msg.data.contents.word = value
+            val_t = ioctl(self.fd, I2C_SMBUS, msg)
+        except Exception as e:
+            returnmsg = str(e)
+            self.close()
+        if val_t < 0:
+            return False, returnmsg or ""
+        else:
+            return True, ""
+
+    def process_call(self, i2c_addr, register, value, force=None):
+        """
+        Executes a SMBus Process Call, sending a 16-bit value and receiving a 16-bit response
+
+        :param i2c_addr: i2c address
+        :type i2c_addr: int
+        :param register: Register to read/write to
+        :type register: int
+        :param value: Word value to transmit
+        :type value: int
+        :param force:
+        :type force: Boolean
+        :rtype: int
+        """
+        self._set_address(i2c_addr, force=force)
+        msg = i2c_smbus_ioctl_data.create(
+            read_write=I2C_SMBUS_WRITE, command=register, size=I2C_SMBUS_PROC_CALL
+        )
+        msg.data.contents.word = value
+        ioctl(self.fd, I2C_SMBUS, msg)
+        return msg.data.contents.word
+
+    def read_block_data(self, i2c_addr, register, force=None):
+        """
+        Read a block of up to 32-bytes from a given register.
+
+        :param i2c_addr: i2c address
+        :type i2c_addr: int
+        :param register: Start register
+        :type register: int
+        :param force:
+        :type force: Boolean
+        :return: List of bytes
+        :rtype: list
+        """
+        self._set_address(i2c_addr, force=force)
+        msg = i2c_smbus_ioctl_data.create(
+            read_write=I2C_SMBUS_READ, command=register, size=I2C_SMBUS_BLOCK_DATA
+        )
+        ioctl(self.fd, I2C_SMBUS, msg)
+        length = msg.data.contents.block[0]
+        return msg.data.contents.block[1:length + 1]
+
+    def write_block_data(self, i2c_addr, register, data, force=None):
+        """
+        Write a block of byte data to a given register.
+
+        :param i2c_addr: i2c address
+        :type i2c_addr: int
+        :param register: Start register
+        :type register: int
+        :param data: List of bytes
+        :type data: list
+        :param force:
+        :type force: Boolean
+        :rtype: None
+        """
+        length = len(data)
+        if length > I2C_SMBUS_BLOCK_MAX:
+            raise ValueError("Data length cannot exceed %d bytes" % I2C_SMBUS_BLOCK_MAX)
+        self._set_address(i2c_addr, force=force)
+        msg = i2c_smbus_ioctl_data.create(
+            read_write=I2C_SMBUS_WRITE, command=register, size=I2C_SMBUS_BLOCK_DATA
+        )
+        msg.data.contents.block[0] = length
+        msg.data.contents.block[1:length + 1] = data
+        ioctl(self.fd, I2C_SMBUS, msg)
+
+    def block_process_call(self, i2c_addr, register, data, force=None):
+        """
+        Executes a SMBus Block Process Call, sending a variable-size data
+        block and receiving another variable-size response
+
+        :param i2c_addr: i2c address
+        :type i2c_addr: int
+        :param register: Register to read/write to
+        :type register: int
+        :param data: List of bytes
+        :type data: list
+        :param force:
+        :type force: Boolean
+        :return: List of bytes
+        :rtype: list
+        """
+        length = len(data)
+        if length > I2C_SMBUS_BLOCK_MAX:
+            raise ValueError("Data length cannot exceed %d bytes" % I2C_SMBUS_BLOCK_MAX)
+        self._set_address(i2c_addr, force=force)
+        msg = i2c_smbus_ioctl_data.create(
+            read_write=I2C_SMBUS_WRITE, command=register, size=I2C_SMBUS_BLOCK_PROC_CALL
+        )
+        msg.data.contents.block[0] = length
+        msg.data.contents.block[1:length + 1] = data
+        ioctl(self.fd, I2C_SMBUS, msg)
+        length = msg.data.contents.block[0]
+        return msg.data.contents.block[1:length + 1]
+
+    def read_i2c_block_data(self, i2c_addr, register, length, force=None):
+        """
+        Read a block of byte data from a given register.
+
+        :param i2c_addr: i2c address
+        :type i2c_addr: int
+        :param register: Start register
+        :type register: int
+        :param length: Desired block length
+        :type length: int
+        :param force:
+        :type force: Boolean
+        :return: List of bytes
+        :rtype: list
+        """
+        if length > I2C_SMBUS_BLOCK_MAX:
+            raise ValueError("Desired block length over %d bytes" % I2C_SMBUS_BLOCK_MAX)
+        self._set_address(i2c_addr, force=force)
+        msg = i2c_smbus_ioctl_data.create(
+            read_write=I2C_SMBUS_READ, command=register, size=I2C_SMBUS_I2C_BLOCK_DATA
+        )
+        msg.data.contents.byte = length
+        ioctl(self.fd, I2C_SMBUS, msg)
+        return msg.data.contents.block[1:length + 1]
+
+    def write_i2c_block_data(self, i2c_addr, register, data, force=None):
+        """
+        Write a block of byte data to a given register.
+
+        :param i2c_addr: i2c address
+        :type i2c_addr: int
+        :param register: Start register
+        :type register: int
+        :param data: List of bytes
+        :type data: list
+        :param force:
+        :type force: Boolean
+        :rtype: None
+        """
+        length = len(data)
+        if length > I2C_SMBUS_BLOCK_MAX:
+            raise ValueError("Data length cannot exceed %d bytes" % I2C_SMBUS_BLOCK_MAX)
+        self._set_address(i2c_addr, force=force)
+        msg = i2c_smbus_ioctl_data.create(
+            read_write=I2C_SMBUS_WRITE, command=register, size=I2C_SMBUS_I2C_BLOCK_DATA
+        )
+        msg.data.contents.block[0] = length
+        msg.data.contents.block[1:length + 1] = data
+        ioctl(self.fd, I2C_SMBUS, msg)
+
+    def i2c_rdwr(self, *i2c_msgs):
+        """
+        Combine a series of i2c read and write operations in a single
+        transaction (with repeated start bits but no stop bits in between).
+
+        This method takes i2c_msg instances as input, which must be created
+        first with :py:meth:`i2c_msg.read` or :py:meth:`i2c_msg.write`.
+
+        :param i2c_msgs: One or more i2c_msg class instances.
+        :type i2c_msgs: i2c_msg
+        :rtype: None
+        """
+        ioctl_data = i2c_rdwr_ioctl_data.create(*i2c_msgs)
+        ioctl(self.fd, I2C_RDWR, ioctl_data)
+
+
+class SMBusWrapper:
+    """
+    Wrapper class around the SMBus.
+    Deprecated as of version 0.3.0. Please replace with :py:class:`SMBus`.
+
+    Enables the user to wrap access to the :py:class:`SMBus` class in a
+    "with" statement. If auto_cleanup is True (default), the
+    :py:class:`SMBus` handle will be automatically closed
+    upon exit of the ``with`` block.
+    """
+    def __init__(self, bus_number=0, auto_cleanup=True, force=False):
+        """
+        :param auto_cleanup: Close bus when leaving scope.
+        :type auto_cleanup: Boolean
+        :param force: Force using the slave address even when driver is already using it.
+        :type force: Boolean
+        """
+        self.bus_number = bus_number
+        self.auto_cleanup = auto_cleanup
+        self.force = force
+
+    def __enter__(self):
+        self.bus = SMBus(bus=self.bus_number, force=self.force)
+        return self.bus
+
+    def __exit__(self, exc_type, exc_val, exc_tb):
+        if self.auto_cleanup:
+            self.bus.close()
diff --git a/platform/centec-arm64/sonic-platform-modules-micas/common/modules/COPYING b/platform/centec-arm64/sonic-platform-modules-micas/common/modules/COPYING
new file mode 100644
index 000000000..a635a38ef
--- /dev/null
+++ b/platform/centec-arm64/sonic-platform-modules-micas/common/modules/COPYING
@@ -0,0 +1,20 @@
+The Linux Kernel is provided under:
+
+	SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note
+
+Being under the terms of the GNU General Public License version 2 only,
+according with:
+
+	LICENSES/preferred/GPL-2.0
+
+With an explicit syscall exception, as stated at:
+
+	LICENSES/exceptions/Linux-syscall-note
+
+In addition, other licenses may also apply. Please see:
+
+	Documentation/process/license-rules.rst
+
+for more details.
+
+All contributions to the Linux Kernel are subject to this COPYING file.
diff --git a/platform/centec-arm64/sonic-platform-modules-micas/common/modules/GPL-2.0 b/platform/centec-arm64/sonic-platform-modules-micas/common/modules/GPL-2.0
new file mode 100644
index 000000000..ff0812fd8
--- /dev/null
+++ b/platform/centec-arm64/sonic-platform-modules-micas/common/modules/GPL-2.0
@@ -0,0 +1,359 @@
+Valid-License-Identifier: GPL-2.0
+Valid-License-Identifier: GPL-2.0-only
+Valid-License-Identifier: GPL-2.0+
+Valid-License-Identifier: GPL-2.0-or-later
+SPDX-URL: https://spdx.org/licenses/GPL-2.0.html
+Usage-Guide:
+  To use this license in source code, put one of the following SPDX
+  tag/value pairs into a comment according to the placement
+  guidelines in the licensing rules documentation.
+  For 'GNU General Public License (GPL) version 2 only' use:
+    SPDX-License-Identifier: GPL-2.0
+  or
+    SPDX-License-Identifier: GPL-2.0-only
+  For 'GNU General Public License (GPL) version 2 or any later version' use:
+    SPDX-License-Identifier: GPL-2.0+
+  or
+    SPDX-License-Identifier: GPL-2.0-or-later
+License-Text:
+
+		    GNU GENERAL PUBLIC LICENSE
+		       Version 2, June 1991
+
+ Copyright (C) 1989, 1991 Free Software Foundation, Inc.
+                       51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ Everyone is permitted to copy and distribute verbatim copies
+ of this license document, but changing it is not allowed.
+
+			    Preamble
+
+  The licenses for most software are designed to take away your
+freedom to share and change it.  By contrast, the GNU General Public
+License is intended to guarantee your freedom to share and change free
+software--to make sure the software is free for all its users.  This
+General Public License applies to most of the Free Software
+Foundation's software and to any other program whose authors commit to
+using it.  (Some other Free Software Foundation software is covered by
+the GNU Library General Public License instead.)  You can apply it to
+your programs, too.
+
+  When we speak of free software, we are referring to freedom, not
+price.  Our General Public Licenses are designed to make sure that you
+have the freedom to distribute copies of free software (and charge for
+this service if you wish), that you receive source code or can get it
+if you want it, that you can change the software or use pieces of it
+in new free programs; and that you know you can do these things.
+
+  To protect your rights, we need to make restrictions that forbid
+anyone to deny you these rights or to ask you to surrender the rights.
+These restrictions translate to certain responsibilities for you if you
+distribute copies of the software, or if you modify it.
+
+  For example, if you distribute copies of such a program, whether
+gratis or for a fee, you must give the recipients all the rights that
+you have.  You must make sure that they, too, receive or can get the
+source code.  And you must show them these terms so they know their
+rights.
+
+  We protect your rights with two steps: (1) copyright the software, and
+(2) offer you this license which gives you legal permission to copy,
+distribute and/or modify the software.
+
+  Also, for each author's protection and ours, we want to make certain
+that everyone understands that there is no warranty for this free
+software.  If the software is modified by someone else and passed on, we
+want its recipients to know that what they have is not the original, so
+that any problems introduced by others will not reflect on the original
+authors' reputations.
+
+  Finally, any free program is threatened constantly by software
+patents.  We wish to avoid the danger that redistributors of a free
+program will individually obtain patent licenses, in effect making the
+program proprietary.  To prevent this, we have made it clear that any
+patent must be licensed for everyone's free use or not licensed at all.
+
+  The precise terms and conditions for copying, distribution and
+modification follow.
+
+		    GNU GENERAL PUBLIC LICENSE
+   TERMS AND CONDITIONS FOR COPYING, DISTRIBUTION AND MODIFICATION
+
+  0. This License applies to any program or other work which contains
+a notice placed by the copyright holder saying it may be distributed
+under the terms of this General Public License.  The "Program", below,
+refers to any such program or work, and a "work based on the Program"
+means either the Program or any derivative work under copyright law:
+that is to say, a work containing the Program or a portion of it,
+either verbatim or with modifications and/or translated into another
+language.  (Hereinafter, translation is included without limitation in
+the term "modification".)  Each licensee is addressed as "you".
+
+Activities other than copying, distribution and modification are not
+covered by this License; they are outside its scope.  The act of
+running the Program is not restricted, and the output from the Program
+is covered only if its contents constitute a work based on the
+Program (independent of having been made by running the Program).
+Whether that is true depends on what the Program does.
+
+  1. You may copy and distribute verbatim copies of the Program's
+source code as you receive it, in any medium, provided that you
+conspicuously and appropriately publish on each copy an appropriate
+copyright notice and disclaimer of warranty; keep intact all the
+notices that refer to this License and to the absence of any warranty;
+and give any other recipients of the Program a copy of this License
+along with the Program.
+
+You may charge a fee for the physical act of transferring a copy, and
+you may at your option offer warranty protection in exchange for a fee.
+
+  2. You may modify your copy or copies of the Program or any portion
+of it, thus forming a work based on the Program, and copy and
+distribute such modifications or work under the terms of Section 1
+above, provided that you also meet all of these conditions:
+
+    a) You must cause the modified files to carry prominent notices
+    stating that you changed the files and the date of any change.
+
+    b) You must cause any work that you distribute or publish, that in
+    whole or in part contains or is derived from the Program or any
+    part thereof, to be licensed as a whole at no charge to all third
+    parties under the terms of this License.
+
+    c) If the modified program normally reads commands interactively
+    when run, you must cause it, when started running for such
+    interactive use in the most ordinary way, to print or display an
+    announcement including an appropriate copyright notice and a
+    notice that there is no warranty (or else, saying that you provide
+    a warranty) and that users may redistribute the program under
+    these conditions, and telling the user how to view a copy of this
+    License.  (Exception: if the Program itself is interactive but
+    does not normally print such an announcement, your work based on
+    the Program is not required to print an announcement.)
+
+These requirements apply to the modified work as a whole.  If
+identifiable sections of that work are not derived from the Program,
+and can be reasonably considered independent and separate works in
+themselves, then this License, and its terms, do not apply to those
+sections when you distribute them as separate works.  But when you
+distribute the same sections as part of a whole which is a work based
+on the Program, the distribution of the whole must be on the terms of
+this License, whose permissions for other licensees extend to the
+entire whole, and thus to each and every part regardless of who wrote it.
+
+Thus, it is not the intent of this section to claim rights or contest
+your rights to work written entirely by you; rather, the intent is to
+exercise the right to control the distribution of derivative or
+collective works based on the Program.
+
+In addition, mere aggregation of another work not based on the Program
+with the Program (or with a work based on the Program) on a volume of
+a storage or distribution medium does not bring the other work under
+the scope of this License.
+
+  3. You may copy and distribute the Program (or a work based on it,
+under Section 2) in object code or executable form under the terms of
+Sections 1 and 2 above provided that you also do one of the following:
+
+    a) Accompany it with the complete corresponding machine-readable
+    source code, which must be distributed under the terms of Sections
+    1 and 2 above on a medium customarily used for software interchange; or,
+
+    b) Accompany it with a written offer, valid for at least three
+    years, to give any third party, for a charge no more than your
+    cost of physically performing source distribution, a complete
+    machine-readable copy of the corresponding source code, to be
+    distributed under the terms of Sections 1 and 2 above on a medium
+    customarily used for software interchange; or,
+
+    c) Accompany it with the information you received as to the offer
+    to distribute corresponding source code.  (This alternative is
+    allowed only for noncommercial distribution and only if you
+    received the program in object code or executable form with such
+    an offer, in accord with Subsection b above.)
+
+The source code for a work means the preferred form of the work for
+making modifications to it.  For an executable work, complete source
+code means all the source code for all modules it contains, plus any
+associated interface definition files, plus the scripts used to
+control compilation and installation of the executable.  However, as a
+special exception, the source code distributed need not include
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+form) with the major components (compiler, kernel, and so on) of the
+operating system on which the executable runs, unless that component
+itself accompanies the executable.
+
+If distribution of executable or object code is made by offering
+access to copy from a designated place, then offering equivalent
+access to copy the source code from the same place counts as
+distribution of the source code, even though third parties are not
+compelled to copy the source along with the object code.
+
+  4. You may not copy, modify, sublicense, or distribute the Program
+except as expressly provided under this License.  Any attempt
+otherwise to copy, modify, sublicense or distribute the Program is
+void, and will automatically terminate your rights under this License.
+However, parties who have received copies, or rights, from you under
+this License will not have their licenses terminated so long as such
+parties remain in full compliance.
+
+  5. You are not required to accept this License, since you have not
+signed it.  However, nothing else grants you permission to modify or
+distribute the Program or its derivative works.  These actions are
+prohibited by law if you do not accept this License.  Therefore, by
+modifying or distributing the Program (or any work based on the
+Program), you indicate your acceptance of this License to do so, and
+all its terms and conditions for copying, distributing or modifying
+the Program or works based on it.
+
+  6. Each time you redistribute the Program (or any work based on the
+Program), the recipient automatically receives a license from the
+original licensor to copy, distribute or modify the Program subject to
+these terms and conditions.  You may not impose any further
+restrictions on the recipients' exercise of the rights granted herein.
+You are not responsible for enforcing compliance by third parties to
+this License.
+
+  7. If, as a consequence of a court judgment or allegation of patent
+infringement or for any other reason (not limited to patent issues),
+conditions are imposed on you (whether by court order, agreement or
+otherwise) that contradict the conditions of this License, they do not
+excuse you from the conditions of this License.  If you cannot
+distribute so as to satisfy simultaneously your obligations under this
+License and any other pertinent obligations, then as a consequence you
+may not distribute the Program at all.  For example, if a patent
+license would not permit royalty-free redistribution of the Program by
+all those who receive copies directly or indirectly through you, then
+the only way you could satisfy both it and this License would be to
+refrain entirely from distribution of the Program.
+
+If any portion of this section is held invalid or unenforceable under
+any particular circumstance, the balance of the section is intended to
+apply and the section as a whole is intended to apply in other
+circumstances.
+
+It is not the purpose of this section to induce you to infringe any
+patents or other property right claims or to contest validity of any
+such claims; this section has the sole purpose of protecting the
+integrity of the free software distribution system, which is
+implemented by public license practices.  Many people have made
+generous contributions to the wide range of software distributed
+through that system in reliance on consistent application of that
+system; it is up to the author/donor to decide if he or she is willing
+to distribute software through any other system and a licensee cannot
+impose that choice.
+
+This section is intended to make thoroughly clear what is believed to
+be a consequence of the rest of this License.
+
+  8. If the distribution and/or use of the Program is restricted in
+certain countries either by patents or by copyrighted interfaces, the
+original copyright holder who places the Program under this License
+may add an explicit geographical distribution limitation excluding
+those countries, so that distribution is permitted only in or among
+countries not thus excluded.  In such case, this License incorporates
+the limitation as if written in the body of this License.
+
+  9. The Free Software Foundation may publish revised and/or new versions
+of the General Public License from time to time.  Such new versions will
+be similar in spirit to the present version, but may differ in detail to
+address new problems or concerns.
+
+Each version is given a distinguishing version number.  If the Program
+specifies a version number of this License which applies to it and "any
+later version", you have the option of following the terms and conditions
+either of that version or of any later version published by the Free
+Software Foundation.  If the Program does not specify a version number of
+this License, you may choose any version ever published by the Free Software
+Foundation.
+
+  10. If you wish to incorporate parts of the Program into other free
+programs whose distribution conditions are different, write to the author
+to ask for permission.  For software which is copyrighted by the Free
+Software Foundation, write to the Free Software Foundation; we sometimes
+make exceptions for this.  Our decision will be guided by the two goals
+of preserving the free status of all derivatives of our free software and
+of promoting the sharing and reuse of software generally.
+
+			    NO WARRANTY
+
+  11. BECAUSE THE PROGRAM IS LICENSED FREE OF CHARGE, THERE IS NO WARRANTY
+FOR THE PROGRAM, TO THE EXTENT PERMITTED BY APPLICABLE LAW.  EXCEPT WHEN
+OTHERWISE STATED IN WRITING THE COPYRIGHT HOLDERS AND/OR OTHER PARTIES
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+OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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+TO THE QUALITY AND PERFORMANCE OF THE PROGRAM IS WITH YOU.  SHOULD THE
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+REPAIR OR CORRECTION.
+
+  12. IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING
+WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MAY MODIFY AND/OR
+REDISTRIBUTE THE PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU FOR DAMAGES,
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+TO LOSS OF DATA OR DATA BEING RENDERED INACCURATE OR LOSSES SUSTAINED BY
+YOU OR THIRD PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER
+PROGRAMS), EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE
+POSSIBILITY OF SUCH DAMAGES.
+
+		     END OF TERMS AND CONDITIONS
+
+	    How to Apply These Terms to Your New Programs
+
+  If you develop a new program, and you want it to be of the greatest
+possible use to the public, the best way to achieve this is to make it
+free software which everyone can redistribute and change under these terms.
+
+  To do so, attach the following notices to the program.  It is safest
+to attach them to the start of each source file to most effectively
+convey the exclusion of warranty; and each file should have at least
+the "copyright" line and a pointer to where the full notice is found.
+
+    <one line to give the program's name and a brief idea of what it does.>
+    Copyright (C) <year>  <name of author>
+
+    This program is free software; you can redistribute it and/or modify
+    it under the terms of the GNU General Public License as published by
+    the Free Software Foundation; either version 2 of the License, or
+    (at your option) any later version.
+
+    This program is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+    GNU General Public License for more details.
+
+    You should have received a copy of the GNU General Public License
+    along with this program; if not, write to the Free Software
+    Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+
+
+Also add information on how to contact you by electronic and paper mail.
+
+If the program is interactive, make it output a short notice like this
+when it starts in an interactive mode:
+
+    Gnomovision version 69, Copyright (C) year name of author
+    Gnomovision comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
+    This is free software, and you are welcome to redistribute it
+    under certain conditions; type `show c' for details.
+
+The hypothetical commands `show w' and `show c' should show the appropriate
+parts of the General Public License.  Of course, the commands you use may
+be called something other than `show w' and `show c'; they could even be
+mouse-clicks or menu items--whatever suits your program.
+
+You should also get your employer (if you work as a programmer) or your
+school, if any, to sign a "copyright disclaimer" for the program, if
+necessary.  Here is a sample; alter the names:
+
+  Yoyodyne, Inc., hereby disclaims all copyright interest in the program
+  `Gnomovision' (which makes passes at compilers) written by James Hacker.
+
+  <signature of Ty Coon>, 1 April 1989
+  Ty Coon, President of Vice
+
+This General Public License does not permit incorporating your program into
+proprietary programs.  If your program is a subroutine library, you may
+consider it more useful to permit linking proprietary applications with the
+library.  If this is what you want to do, use the GNU Library General
+Public License instead of this License.
diff --git a/platform/centec-arm64/sonic-platform-modules-micas/common/modules/Makefile b/platform/centec-arm64/sonic-platform-modules-micas/common/modules/Makefile
new file mode 100644
index 000000000..66f388763
--- /dev/null
+++ b/platform/centec-arm64/sonic-platform-modules-micas/common/modules/Makefile
@@ -0,0 +1,23 @@
+PWD		= $(shell pwd)
+EXTRA_CFLAGS:= -I$(M)/include
+EXTRA_CFLAGS+= -Wall
+KVERSION   ?= $(shell uname -r)
+KERNEL_SRC ?=  /lib/modules/$(KVERSION)
+
+module_out_put_dir := $(PWD)/build
+export module_out_put_dir
+
+platform_common-objs := platform_common_module.o dfd_tlveeprom.o
+obj-m += wb_platform.o
+obj-m += platform_common.o
+
+all :
+	$(MAKE) -C $(KERNEL_SRC)/build M=$(PWD) modules
+	@if [ ! -d $(module_out_put_dir) ]; then mkdir -p $(module_out_put_dir) ;fi
+	cp -p  $(PWD)/*.ko $(module_out_put_dir)
+
+clean :
+	rm  -rf $(module_out_put_dir)
+	rm -f ${PWD}/*.o ${PWD}/*.ko ${PWD}/*.mod.c ${PWD}/.*.cmd ${PWD}/.*.o.d
+	rm -f ${PWD}/Module.markers ${PWD}/Module.symvers ${PWD}/modules.order
+	rm -rf ${PWD}/.tmp_versions
diff --git a/platform/centec-arm64/sonic-platform-modules-micas/common/modules/dfd_tlveeprom.c b/platform/centec-arm64/sonic-platform-modules-micas/common/modules/dfd_tlveeprom.c
new file mode 100644
index 000000000..f6f9df1f6
--- /dev/null
+++ b/platform/centec-arm64/sonic-platform-modules-micas/common/modules/dfd_tlveeprom.c
@@ -0,0 +1,521 @@
+/*
+ * Copyright (C) 2003-2014 FreeIPMI Core Team
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
+/*****************************************************************************\
+ *  Copyright (C) 2007-2014 Lawrence Livermore National Security, LLC.
+ *  Copyright (C) 2007 The Regents of the University of California.
+ *  Produced at Lawrence Livermore National Laboratory (cf, DISCLAIMER).
+ *  Written by Albert Chu <chu11@llnl.gov>
+ *  UCRL-CODE-232183
+ *
+ *  This file is part of Ipmi-fru, a tool used for retrieving
+ *  motherboard field replaceable unit (FRU) information. For details,
+ *  see http://www.llnl.gov/linux/.
+ *
+ *  Ipmi-fru is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by the
+ *  Free Software Foundation; either version 3 of the License, or (at your
+ *  option) any later version.
+ *
+ *  Ipmi-fru is distributed in the hope that it will be useful, but
+ *  WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ *  or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+ *  for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with Ipmi-fru.  If not, see <http://www.gnu.org/licenses/>.
+\*****************************************************************************/
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/slab.h>
+#include <linux/jiffies.h>
+#include <linux/i2c.h>
+#include <linux/hwmon.h>
+#include <linux/hwmon-sysfs.h>
+#include <linux/err.h>
+#include <linux/mutex.h>
+#include "platform.h"
+#include "dfd_tlveeprom.h"
+
+/* using in is_valid_tlvinfo_header */
+static u_int32_t eeprom_size;
+
+/*
+ *  List of TLV codes and names.
+ */
+static const struct tlv_code_desc tlv_code_list[] = {
+    { TLV_CODE_PRODUCT_NAME      , "Product Name"},
+    { TLV_CODE_PART_NUMBER       , "Part Number"},
+    { TLV_CODE_SERIAL_NUMBER     , "Serial Number"},
+    { TLV_CODE_MAC_BASE          , "Base MAC Address"},
+    { TLV_CODE_MANUF_DATE        , "Manufacture Date"},
+    { TLV_CODE_DEVICE_VERSION    , "Device Version"},
+    { TLV_CODE_LABEL_REVISION    , "Label Revision"},
+    { TLV_CODE_PLATFORM_NAME     , "Platform Name"},
+    { TLV_CODE_ONIE_VERSION      , "ONIE Version"},
+    { TLV_CODE_MAC_SIZE          , "MAC Addresses"},
+    { TLV_CODE_MANUF_NAME        , "Manufacturer"},
+    { TLV_CODE_MANUF_COUNTRY     , "Country Code"},
+    { TLV_CODE_VENDOR_NAME       , "Vendor Name"},
+    { TLV_CODE_DIAG_VERSION      , "Diag Version"},
+    { TLV_CODE_SERVICE_TAG       , "Service Tag"},
+    { TLV_CODE_VENDOR_EXT        , "Vendor Extension"},
+    { TLV_CODE_CRC_32            , "CRC-32"},
+};
+
+#if 0
+#define OPENBMC_VPD_KEY_INVAIL_VAL 0
+
+static const tlv_code_map_t tlv_code_map[] = {
+    { TLV_CODE_PRODUCT_NAME   , OPENBMC_VPD_KEY_PRODUCT_NAME},
+    { TLV_CODE_PART_NUMBER    , OPENBMC_VPD_KEY_PRODUCT_PART_MODEL_NUM},
+    { TLV_CODE_SERIAL_NUMBER  , OPENBMC_VPD_KEY_PRODUCT_SERIAL_NUM},
+    { TLV_CODE_MAC_BASE       , OPENBMC_VPD_KEY_INVAIL_VAL},
+    { TLV_CODE_MANUF_DATE     , OPENBMC_VPD_KEY_BOARD_MFG_DATE},
+    { TLV_CODE_DEVICE_VERSION , OPENBMC_VPD_KEY_PRODUCT_VER},
+    { TLV_CODE_LABEL_REVISION , OPENBMC_VPD_KEY_PRODUCT_CUSTOM7},
+    { TLV_CODE_PLATFORM_NAME  , OPENBMC_VPD_KEY_PRODUCT_CUSTOM1},
+    { TLV_CODE_ONIE_VERSION   , OPENBMC_VPD_KEY_PRODUCT_CUSTOM2},
+    { TLV_CODE_MAC_SIZE       , OPENBMC_VPD_KEY_INVAIL_VAL},
+    { TLV_CODE_MANUF_NAME     , OPENBMC_VPD_KEY_PRODUCT_MFR},
+    { TLV_CODE_MANUF_COUNTRY  , OPENBMC_VPD_KEY_PRODUCT_CUSTOM3},
+    { TLV_CODE_VENDOR_NAME    , OPENBMC_VPD_KEY_PRODUCT_CUSTOM4},
+    { TLV_CODE_DIAG_VERSION   , OPENBMC_VPD_KEY_PRODUCT_CUSTOM8},
+    { TLV_CODE_SERVICE_TAG    , OPENBMC_VPD_KEY_PRODUCT_CUSTOM5},
+    { TLV_CODE_VENDOR_EXT     , OPENBMC_VPD_KEY_PRODUCT_CUSTOM6},
+    { TLV_CODE_CRC_32         , OPENBMC_VPD_KEY_INVAIL_VAL},
+};
+#endif
+
+#define TLV_CODE_NUM (sizeof(tlv_code_list) / sizeof(tlv_code_list[0]))
+
+#if 0
+#define TLV_CODE_MAP_NUM (sizeof(tlv_code_map) / sizeof(tlv_code_map[0]))
+#endif
+
+const unsigned long crc_table[] = {
+    0x00000000, 0x77073096, 0xee0e612c, 0x990951ba, 0x076dc419, 0x706af48f, 0xe963a535, 0x9e6495a3,
+    0x0edb8832, 0x79dcb8a4, 0xe0d5e91e, 0x97d2d988, 0x09b64c2b, 0x7eb17cbd, 0xe7b82d07, 0x90bf1d91,
+    0x1db71064, 0x6ab020f2, 0xf3b97148, 0x84be41de, 0x1adad47d, 0x6ddde4eb, 0xf4d4b551, 0x83d385c7,
+    0x136c9856, 0x646ba8c0, 0xfd62f97a, 0x8a65c9ec, 0x14015c4f, 0x63066cd9, 0xfa0f3d63, 0x8d080df5,
+    0x3b6e20c8, 0x4c69105e, 0xd56041e4, 0xa2677172, 0x3c03e4d1, 0x4b04d447, 0xd20d85fd, 0xa50ab56b,
+    0x35b5a8fa, 0x42b2986c, 0xdbbbc9d6, 0xacbcf940, 0x32d86ce3, 0x45df5c75, 0xdcd60dcf, 0xabd13d59,
+    0x26d930ac, 0x51de003a, 0xc8d75180, 0xbfd06116, 0x21b4f4b5, 0x56b3c423, 0xcfba9599, 0xb8bda50f,
+    0x2802b89e, 0x5f058808, 0xc60cd9b2, 0xb10be924, 0x2f6f7c87, 0x58684c11, 0xc1611dab, 0xb6662d3d,
+    0x76dc4190, 0x01db7106, 0x98d220bc, 0xefd5102a, 0x71b18589, 0x06b6b51f, 0x9fbfe4a5, 0xe8b8d433,
+    0x7807c9a2, 0x0f00f934, 0x9609a88e, 0xe10e9818, 0x7f6a0dbb, 0x086d3d2d, 0x91646c97, 0xe6635c01,
+    0x6b6b51f4, 0x1c6c6162, 0x856530d8, 0xf262004e, 0x6c0695ed, 0x1b01a57b, 0x8208f4c1, 0xf50fc457,
+    0x65b0d9c6, 0x12b7e950, 0x8bbeb8ea, 0xfcb9887c, 0x62dd1ddf, 0x15da2d49, 0x8cd37cf3, 0xfbd44c65,
+    0x4db26158, 0x3ab551ce, 0xa3bc0074, 0xd4bb30e2, 0x4adfa541, 0x3dd895d7, 0xa4d1c46d, 0xd3d6f4fb,
+    0x4369e96a, 0x346ed9fc, 0xad678846, 0xda60b8d0, 0x44042d73, 0x33031de5, 0xaa0a4c5f, 0xdd0d7cc9,
+    0x5005713c, 0x270241aa, 0xbe0b1010, 0xc90c2086, 0x5768b525, 0x206f85b3, 0xb966d409, 0xce61e49f,
+    0x5edef90e, 0x29d9c998, 0xb0d09822, 0xc7d7a8b4, 0x59b33d17, 0x2eb40d81, 0xb7bd5c3b, 0xc0ba6cad,
+    0xedb88320, 0x9abfb3b6, 0x03b6e20c, 0x74b1d29a, 0xead54739, 0x9dd277af, 0x04db2615, 0x73dc1683,
+    0xe3630b12, 0x94643b84, 0x0d6d6a3e, 0x7a6a5aa8, 0xe40ecf0b, 0x9309ff9d, 0x0a00ae27, 0x7d079eb1,
+    0xf00f9344, 0x8708a3d2, 0x1e01f268, 0x6906c2fe, 0xf762575d, 0x806567cb, 0x196c3671, 0x6e6b06e7,
+    0xfed41b76, 0x89d32be0, 0x10da7a5a, 0x67dd4acc, 0xf9b9df6f, 0x8ebeeff9, 0x17b7be43, 0x60b08ed5,
+    0xd6d6a3e8, 0xa1d1937e, 0x38d8c2c4, 0x4fdff252, 0xd1bb67f1, 0xa6bc5767, 0x3fb506dd, 0x48b2364b,
+    0xd80d2bda, 0xaf0a1b4c, 0x36034af6, 0x41047a60, 0xdf60efc3, 0xa867df55, 0x316e8eef, 0x4669be79,
+    0xcb61b38c, 0xbc66831a, 0x256fd2a0, 0x5268e236, 0xcc0c7795, 0xbb0b4703, 0x220216b9, 0x5505262f,
+    0xc5ba3bbe, 0xb2bd0b28, 0x2bb45a92, 0x5cb36a04, 0xc2d7ffa7, 0xb5d0cf31, 0x2cd99e8b, 0x5bdeae1d,
+    0x9b64c2b0, 0xec63f226, 0x756aa39c, 0x026d930a, 0x9c0906a9, 0xeb0e363f, 0x72076785, 0x05005713,
+    0x95bf4a82, 0xe2b87a14, 0x7bb12bae, 0x0cb61b38, 0x92d28e9b, 0xe5d5be0d, 0x7cdcefb7, 0x0bdbdf21,
+    0x86d3d2d4, 0xf1d4e242, 0x68ddb3f8, 0x1fda836e, 0x81be16cd, 0xf6b9265b, 0x6fb077e1, 0x18b74777,
+    0x88085ae6, 0xff0f6a70, 0x66063bca, 0x11010b5c, 0x8f659eff, 0xf862ae69, 0x616bffd3, 0x166ccf45,
+    0xa00ae278, 0xd70dd2ee, 0x4e048354, 0x3903b3c2, 0xa7672661, 0xd06016f7, 0x4969474d, 0x3e6e77db,
+    0xaed16a4a, 0xd9d65adc, 0x40df0b66, 0x37d83bf0, 0xa9bcae53, 0xdebb9ec5, 0x47b2cf7f, 0x30b5ffe9,
+    0xbdbdf21c, 0xcabac28a, 0x53b39330, 0x24b4a3a6, 0xbad03605, 0xcdd70693, 0x54de5729, 0x23d967bf,
+    0xb3667a2e, 0xc4614ab8, 0x5d681b02, 0x2a6f2b94, 0xb40bbe37, 0xc30c8ea1, 0x5a05df1b, 0x2d02ef8d,
+};
+
+static unsigned long crc32(unsigned long crc, const unsigned char *buf, unsigned len)
+{
+    unsigned i;
+    if (len < 1)
+        return 0xffffffff;
+
+    for (i = 0; i != len; ++i)
+    {
+        crc = crc_table[(crc ^ buf[i]) & 0xff] ^ (crc >> 8);
+    }
+
+    crc = crc ^ 0xffffffff;
+
+    return crc;
+}
+
+/*
+ *  is_valid_tlv
+ *
+ *  Perform basic sanity checks on a TLV field. The TLV is pointed to
+ *  by the parameter provided.
+ *      1. The type code is not reserved (0x00 or 0xFF)
+ */
+static inline bool is_valid_tlv(tlvinfo_tlv_t *tlv)
+{
+    return ((tlv->type != 0x00) && (tlv->type != 0xFF));
+}
+
+/*
+ *  is_valid_tlvinfo_header
+ *
+ *  Perform sanity checks on the first 11 bytes of the TlvInfo EEPROM
+ *  data pointed to by the parameter:
+ *      1. First 8 bytes contain null-terminated ASCII string "TlvInfo"
+ *      2. Version byte is 1
+ *      3. Total length bytes contain value which is less than or equal
+ *         to the allowed maximum (2048-11)
+ *
+ */
+static inline bool is_valid_tlvinfo_header(tlvinfo_header_t *hdr)
+{
+    int max_size = eeprom_size;
+    return((strcmp(hdr->signature, TLV_INFO_ID_STRING) == 0) &&
+       (hdr->version == TLV_INFO_VERSION) &&
+       (be16_to_cpu(hdr->totallen) <= max_size) );
+}
+
+/*
+ *  decode_tlv_value
+ *
+ *  Decode a single TLV value into a string.
+
+ *  The validity of EEPROM contents and the TLV field have been verified
+ *  prior to calling this function.
+ */
+static void decode_tlv_value(tlvinfo_tlv_t *tlv, tlv_decode_value_t *decode_value)
+{
+    int i;
+    char *value;
+    u_int32_t length;
+
+    value = (char *)decode_value->value;
+
+    switch (tlv->type) {
+    case TLV_CODE_PRODUCT_NAME:
+    case TLV_CODE_PART_NUMBER:
+    case TLV_CODE_SERIAL_NUMBER:
+    case TLV_CODE_MANUF_DATE:
+    case TLV_CODE_LABEL_REVISION:
+    case TLV_CODE_PLATFORM_NAME:
+    case TLV_CODE_ONIE_VERSION:
+    case TLV_CODE_MANUF_NAME:
+    case TLV_CODE_MANUF_COUNTRY:
+    case TLV_CODE_VENDOR_NAME:
+    case TLV_CODE_DIAG_VERSION:
+    case TLV_CODE_SERVICE_TAG:
+    case TLV_CODE_VENDOR_EXT:
+        memcpy(value, tlv->value, tlv->length);
+        value[tlv->length] = 0;
+        length = tlv->length;
+        break;
+    case TLV_CODE_MAC_BASE:
+        length = sprintf(value, "%02X:%02X:%02X:%02X:%02X:%02X",
+                tlv->value[0], tlv->value[1], tlv->value[2],
+                tlv->value[3], tlv->value[4], tlv->value[5]);
+        break;
+    case TLV_CODE_DEVICE_VERSION:
+        length = sprintf(value, "%u", tlv->value[0]);
+        break;
+    case TLV_CODE_MAC_SIZE:
+        length = sprintf(value, "%u", (tlv->value[0] << 8) | tlv->value[1]);
+        break;
+    #if 0
+    case TLV_CODE_VENDOR_EXT:
+        value[0] = 0;
+        length = 0;
+        for (i = 0; (i < (TLV_DECODE_VALUE_MAX_LEN/5)) && (i < tlv->length); i++) {
+            length += sprintf(value, "%s 0x%02X", value, tlv->value[i]);
+        }
+        break;
+    #endif
+    case TLV_CODE_CRC_32:
+        length = sprintf(value, "0x%02X%02X%02X%02X", tlv->value[0],
+                tlv->value[1], tlv->value[2], tlv->value[3]);
+        break;
+    default:
+        value[0] = 0;
+        length = 0;
+        for (i = 0; (i < (TLV_DECODE_VALUE_MAX_LEN/5)) && (i < tlv->length); i++) {
+            length += sprintf(value, "%s 0x%02X", value, tlv->value[i]);
+        }
+        break;
+    }
+
+    decode_value->length = length;
+}
+
+/*
+ *  is_checksum_valid
+ *
+ *  Validate the checksum in the provided TlvInfo EEPROM data. First,
+ *  verify that the TlvInfo header is valid, then make sure the last
+ *  TLV is a CRC-32 TLV. Then calculate the CRC over the EEPROM data
+ *  and compare it to the value stored in the EEPROM CRC-32 TLV.
+ */
+static bool is_checksum_valid(u_int8_t *eeprom)
+{
+    tlvinfo_header_t *eeprom_hdr;
+    tlvinfo_tlv_t *eeprom_crc;
+    unsigned int calc_crc;
+    unsigned int stored_crc;
+
+    eeprom_hdr = (tlvinfo_header_t *) eeprom;
+
+    /* Is the eeprom header valid? */
+    if (!is_valid_tlvinfo_header(eeprom_hdr)) {
+        return false;
+    }
+
+    /* Is the last TLV a CRC? */
+    eeprom_crc = (tlvinfo_tlv_t *) &eeprom[sizeof(tlvinfo_header_t) +
+        be16_to_cpu(eeprom_hdr->totallen) - (sizeof(tlvinfo_tlv_t) + 4)];
+    if ((eeprom_crc->type != TLV_CODE_CRC_32) || (eeprom_crc->length != 4)) {
+        return false;
+    }
+
+    /* Calculate the checksum */
+    calc_crc = crc32(0xffffffffL, (const unsigned char *)eeprom, sizeof(tlvinfo_header_t) +
+             be16_to_cpu(eeprom_hdr->totallen) - 4);
+    stored_crc = ((eeprom_crc->value[0] << 24) | (eeprom_crc->value[1] << 16) |
+          (eeprom_crc->value[2] <<  8) | eeprom_crc->value[3]);
+
+    return (calc_crc == stored_crc);
+}
+
+/*
+ *  tlvinfo_find_tlv
+ *
+ *  This function finds the TLV with the supplied code in the EERPOM.
+ *  An offset from the beginning of the EEPROM is returned in the
+ *  eeprom_index parameter if the TLV is found.
+ */
+static bool tlvinfo_find_tlv(u_int8_t *eeprom, u_int8_t tcode, int *eeprom_index)
+{
+    tlvinfo_header_t *eeprom_hdr;
+    tlvinfo_tlv_t    *eeprom_tlv;
+    int eeprom_end;
+
+    eeprom_hdr = (tlvinfo_header_t *) eeprom;
+
+    /* Search through the TLVs, looking for the first one which matches the
+      supplied type code. */
+    *eeprom_index = sizeof(tlvinfo_header_t);
+    eeprom_end = sizeof(tlvinfo_header_t) + be16_to_cpu(eeprom_hdr->totallen);
+    while (*eeprom_index < eeprom_end) {
+        eeprom_tlv = (tlvinfo_tlv_t *) &eeprom[*eeprom_index];
+        if (!is_valid_tlv(eeprom_tlv)) {
+            return false;
+        }
+
+        if (eeprom_tlv->type == tcode) {
+            return true;
+        }
+
+        *eeprom_index += sizeof(tlvinfo_tlv_t) + eeprom_tlv->length;
+    }
+
+    return false;
+}
+
+/*
+ *  tlvinfo_decode_tlv
+ *
+ *  This function finds the TLV with the supplied code in the EERPOM
+ *  and decodes the value into the buffer provided.
+ */
+static bool tlvinfo_decode_tlv(u_int8_t *eeprom, u_int8_t tcode, tlv_decode_value_t *decode_value)
+{
+    int eeprom_index;
+    tlvinfo_tlv_t *eeprom_tlv;
+
+    /* Find the TLV and then decode it */
+    if (tlvinfo_find_tlv(eeprom, tcode, &eeprom_index)) {
+        eeprom_tlv = (tlvinfo_tlv_t *) &eeprom[eeprom_index];
+        decode_tlv_value(eeprom_tlv, decode_value);
+        return true;
+    }
+
+    return false;
+}
+
+/*
+ *  parse_tlv_eeprom
+ *
+ *  parse the EEPROM into memory, if it hasn't already been read.
+ */
+int parse_tlv_eeprom(u_int8_t *eeprom, u_int32_t size)
+{
+    unsigned int i;
+    bool ret;
+    tlvinfo_header_t *eeprom_hdr;
+    //tlv_info_vec_t tlv_info;
+    tlv_decode_value_t decode_value;
+    int j;
+
+    eeprom_hdr = (tlvinfo_header_t *) eeprom;
+    eeprom_size = size; /* eeprom real size */
+
+    if (!is_valid_tlvinfo_header(eeprom_hdr)) {
+        DBG_ERROR("Failed to check tlv header.\n");
+        return -1;
+    }
+
+    if (!is_checksum_valid(eeprom)) {
+        DBG_ERROR("Failed to check tlv crc.\n");
+        return -1;
+    }
+
+    for (i = 0; i < TLV_CODE_NUM; i++) {
+        mem_clear((void *)&decode_value, sizeof(tlv_decode_value_t));
+        ret = tlvinfo_decode_tlv(eeprom, tlv_code_list[i].m_code, &decode_value);
+        if (!ret) {
+            DBG_ERROR("No found type: %s\n", tlv_code_list[i].m_name);
+            continue;
+        }
+
+        DBG_DEBUG("i: %d,Found type: %s tlv[%d]:%s\n", i, tlv_code_list[i].m_name, tlv_code_list[i].m_code,
+            decode_value.value);
+        for (j = 0; j < decode_value.length; j++) {
+            if ((j % 16) == 0) {
+                DBG_DEBUG("\n");
+            }
+            DBG_DEBUG("%02x ", decode_value.value[j]);
+        }
+        DBG_DEBUG("\n\n");
+    }
+    return 0;
+}
+static int dfd_parse_tlv_eeprom(u_int8_t *eeprom, u_int32_t size, u_int8_t main_type, tlv_decode_value_t *decode_value)
+{
+    bool ret;
+    tlvinfo_header_t *eeprom_hdr;
+    /* tlv_info_vec_t tlv_info; */
+    int j;
+
+    eeprom_hdr = (tlvinfo_header_t *) eeprom;
+    eeprom_size = size; /* eeprom real size */
+
+    if (!is_valid_tlvinfo_header(eeprom_hdr)) {
+        DBG_ERROR("Failed to check tlv header.\n");
+        return -1;
+    }
+
+    if (!is_checksum_valid(eeprom)) {
+        DBG_ERROR("Failed to check tlv crc.\n");
+        return -1;
+    }
+
+    ret = tlvinfo_decode_tlv(eeprom, main_type, decode_value);
+    if (!ret) {
+        DBG_ERROR("No found type: %d\n", main_type);
+        return -1;
+    }
+
+    DBG_DEBUG("Found type: %d, value: %s\n", main_type,decode_value->value);
+    for (j = 0; j < decode_value->length; j++) {
+        if ((j % 16) == 0) {
+            DBG_DEBUG("\n");
+        }
+        DBG_DEBUG("%02x ", decode_value->value[j]);
+    }
+    DBG_DEBUG("\n\n");
+
+    return 0;
+}
+
+/* analyze the extended custom TLV format */
+static int tlvinfo_find_wb_ext_tlv(tlv_decode_value_t *ext_tlv_value, u_int8_t ext_type,
+    u_int8_t *buf, u_int8_t *buf_len)
+{
+    tlvinfo_tlv_t    *eeprom_tlv;
+    int eeprom_end, eeprom_index;
+
+    /* Search through the TLVs, looking for the first one which matches the
+     supplied type code. */
+    DBG_DEBUG("ext_tlv_value->length: %d.\n", ext_tlv_value->length);
+    for (eeprom_index = 0; eeprom_index < ext_tlv_value->length; eeprom_index++) {
+        if ((eeprom_index % 16) == 0) {
+            DBG_DEBUG("\n");
+        }
+        DBG_DEBUG("%02x ", ext_tlv_value->value[eeprom_index]);
+    }
+
+    DBG_DEBUG("\n");
+
+    eeprom_index = 0;
+    eeprom_end = ext_tlv_value->length;
+    while (eeprom_index < eeprom_end) {
+        eeprom_tlv = (tlvinfo_tlv_t *) &(ext_tlv_value->value[eeprom_index]);
+        if (!is_valid_tlv(eeprom_tlv)) {
+            DBG_ERROR("tlv is not valid, eeprom_tlv->type 0x%x.\n", eeprom_tlv->type);
+            return -1;
+        }
+
+        DBG_DEBUG("eeprom_tlv->length %d.\n", eeprom_tlv->length);
+        if (eeprom_tlv->type == ext_type) {
+            if (*buf_len >= eeprom_tlv->length) {
+                memcpy(buf, eeprom_tlv->value, eeprom_tlv->length);
+                DBG_DEBUG("eeprom_tlv->length %d.\n", eeprom_tlv->length);
+                *buf_len = eeprom_tlv->length;
+                return 0;
+            }
+            DBG_ERROR("buf_len %d small than info_len %d.\n", *buf_len, eeprom_tlv->length);
+            return -1;
+        }
+
+        eeprom_index += sizeof(tlvinfo_tlv_t) + eeprom_tlv->length;
+    }
+
+    DBG_ERROR("ext_type %d: tlv is not found.\n", ext_type);
+    return -1;
+}
+
+/* get EEPROM information */
+int dfd_tlvinfo_get_e2prom_info(u_int8_t *eeprom, u_int32_t size, dfd_tlv_type_t *tlv_type, u_int8_t* buf, u_int8_t *buf_len)
+{
+    tlv_decode_value_t decode_value;
+    int ret;
+
+    if (eeprom == NULL || tlv_type == NULL || buf == NULL) {
+        DBG_ERROR("Input para invalid.\n");
+        return -1;
+    }
+
+    mem_clear((void *)&decode_value, sizeof(tlv_decode_value_t));
+    ret = dfd_parse_tlv_eeprom(eeprom, size, tlv_type->main_type, &decode_value);
+    if (ret) {
+        DBG_ERROR("dfd_parse_tlv_eeprom failed ret %d.\n", ret);
+        return ret;
+    }
+
+    /* For non-extended types, return data directly */
+    if (tlv_type->main_type != TLV_CODE_VENDOR_EXT) {
+        if (*buf_len >= decode_value.length) {
+            memcpy(buf, decode_value.value, decode_value.length);
+            *buf_len = decode_value.length;
+            return 0;
+        }
+        DBG_ERROR("buf_len %d small than info_len %d.\n", *buf_len, decode_value.length);
+        return -1;
+    }
+    DBG_DEBUG("info_len %d.\n", decode_value.length);
+
+    /* For the extended type, continue with the secondary TLV analysis to obtain
+    the data corresponding to the sub-TLV type */
+    return tlvinfo_find_wb_ext_tlv(&decode_value, tlv_type->ext_type, buf, buf_len);
+}
diff --git a/platform/centec-arm64/sonic-platform-modules-micas/common/modules/dfd_tlveeprom.h b/platform/centec-arm64/sonic-platform-modules-micas/common/modules/dfd_tlveeprom.h
new file mode 100644
index 000000000..6c5b2e98b
--- /dev/null
+++ b/platform/centec-arm64/sonic-platform-modules-micas/common/modules/dfd_tlveeprom.h
@@ -0,0 +1,121 @@
+#ifndef DFD_OPENBMC_TLVEEPROM_H
+#define DFD_OPENBMC_TLVEEPROM_H
+
+#ifndef u_int8_t
+#define u_int8_t unsigned char
+#endif
+
+#ifndef u_int16_t
+#define u_int16_t unsigned short
+#endif
+
+#ifndef u_int32_t
+#define u_int32_t unsigned int
+#endif
+
+#ifndef be16_to_cpu
+#define be16_to_cpu(x)   ntohs(x)
+#endif
+
+#ifndef cpu_to_be16
+#define cpu_to_be16(x)   htons(x)
+#endif
+
+/**
+ *  The TLV Types.
+ *
+ *  Keep these in sync with tlv_code_list in cmd_sys_eeprom.c
+ */
+#define TLV_CODE_PRODUCT_NAME   0x21
+#define TLV_CODE_PART_NUMBER    0x22
+#define TLV_CODE_SERIAL_NUMBER  0x23
+#define TLV_CODE_MAC_BASE       0x24
+#define TLV_CODE_MANUF_DATE     0x25
+#define TLV_CODE_DEVICE_VERSION 0x26
+#define TLV_CODE_LABEL_REVISION 0x27
+#define TLV_CODE_PLATFORM_NAME  0x28
+#define TLV_CODE_ONIE_VERSION   0x29
+#define TLV_CODE_MAC_SIZE       0x2A
+#define TLV_CODE_MANUF_NAME     0x2B
+#define TLV_CODE_MANUF_COUNTRY  0x2C
+#define TLV_CODE_VENDOR_NAME    0x2D
+#define TLV_CODE_DIAG_VERSION   0x2E
+#define TLV_CODE_SERVICE_TAG    0x2F
+#define TLV_CODE_VENDOR_EXT     0xFD
+#define TLV_CODE_CRC_32         0xFE
+
+#define TLV_CODE_NAME_LEN 64
+/*
+ *  Struct for displaying the TLV codes and names.
+ */
+struct tlv_code_desc {
+    u_int8_t m_code;
+    char m_name[TLV_CODE_NAME_LEN];
+};
+/* ONIE TLV Type and Extended TLV Type Definition */
+typedef struct dfd_tlv_type_s {
+    u_int8_t main_type;/* ONIE standard TLV TYPE type */
+    u_int8_t ext_type; /* Extended TLV TYPE type */
+} dfd_tlv_type_t;
+
+/* Header Field Constants */
+#define TLV_INFO_ID_STRING      "TlvInfo"
+#define TLV_INFO_VERSION        0x01
+/*#define TLV_TOTAL_LEN_MAX       (XXXXXXXX - sizeof(tlvinfo_header_t))*/
+
+struct __attribute__ ((__packed__)) tlvinfo_header_s {
+    char    signature[8];   /* 0x00 - 0x07 EEPROM Tag "TlvInfo" */
+    u_int8_t      version;  /* 0x08        Structure version */
+    u_int16_t     totallen; /* 0x09 - 0x0A Length of all data which follows */
+};
+typedef struct tlvinfo_header_s tlvinfo_header_t;
+
+/*
+ * TlvInfo TLV: Layout of a TLV field
+ */
+struct __attribute__ ((__packed__)) tlvinfo_tlv_s {
+    u_int8_t  type;
+    u_int8_t  length;
+    u_int8_t  value[0];
+};
+typedef struct tlvinfo_tlv_s tlvinfo_tlv_t;
+
+#define TLV_VALUE_MAX_LEN        255
+/*
+ * The max decode value is currently for the 'raw' type or the 'vendor
+ * extension' type, both of which have the same decode format.  The
+ * max decode string size is computed as follows:
+ *
+ *   strlen(" 0xFF") * TLV_VALUE_MAX_LEN + 1
+ *
+ */
+#define TLV_DECODE_VALUE_MAX_LEN    ((5 * TLV_VALUE_MAX_LEN) + 1)
+
+typedef struct tlv_decode_value_s {
+    u_int8_t value[TLV_DECODE_VALUE_MAX_LEN];
+    u_int32_t length;
+} tlv_decode_value_t;
+
+typedef enum dfd_tlvinfo_ext_tlv_type_e {
+    DFD_TLVINFO_EXT_TLV_TYPE_DEV_TYPE   = 1,
+} dfd_tlvinfo_ext_tlv_type_t;
+
+#if 0
+#define TLV_TIME_LEN 64
+
+int ipmi_tlv_validate_fru_area(const uint8_t fruid, const char *fru_file_name,
+                           sd_bus *bus_type, const bool bmc_fru);
+
+extern const char *get_vpd_key_names(int key_id);
+extern std::string getService(sdbusplus::bus::bus& bus,
+                         const std::string& intf,
+                         const std::string& path);
+extern std::string getFRUValue(const std::string& section,
+                        const std::string& key,
+                        const std::string& delimiter,
+                        IPMIFruInfo& fruData);
+#endif
+
+int dfd_tlvinfo_get_e2prom_info(u_int8_t *eeprom, u_int32_t size, dfd_tlv_type_t *tlv_type, u_int8_t* buf, u_int8_t *buf_len);
+
+#endif /* endif DFD_OPENBMC_TLVEEPROM_H */
diff --git a/platform/centec-arm64/sonic-platform-modules-micas/common/modules/platform.h b/platform/centec-arm64/sonic-platform-modules-micas/common/modules/platform.h
new file mode 100644
index 000000000..869bc5322
--- /dev/null
+++ b/platform/centec-arm64/sonic-platform-modules-micas/common/modules/platform.h
@@ -0,0 +1,155 @@
+#ifndef __PLATFORM_H__
+#define __PLATFORM_H__
+
+#include<linux/kernel.h>
+#include <linux/module.h>
+#include <linux/i2c.h>
+#include <linux/string.h>
+
+#define mem_clear(data, size) memset((data), 0, (size))
+
+/* debug switch level */
+typedef enum {
+    DBG_START,
+    DBG_VERBOSE,
+    DBG_KEY,
+    DBG_WARN,
+    DBG_ERROR,
+    DBG_END,
+} dbg_level_t;
+
+typedef enum dfd_cpld_id {
+    BCM_CPLD0 = 0,
+    BCM_CPLD1,
+    CPLD0_MAC0,
+    CPLD0_MAC1,
+    CPLD1_MAC0,
+    CPLD2_MAC1,
+} dfd_cpld_id_t;
+
+ typedef enum dfd_cpld_bus {
+    SMBUS_BUS = 0 ,
+    GPIO_BUS = 1,
+    PCA9641_BUS = 2,
+} dfd_cpld_bus_t;
+
+ typedef struct dfd_i2c_dev_s {
+     int bus;        /* bus number */
+     int addr;       /* bus address */
+ } dfd_i2c_dev_t;
+
+ typedef enum dfd_cpld_addr {
+    CPLD_ADDR_MIN   = 0x31,
+    BCM_CPLD0_ADDR  = 0x32,   /* pca9641 up */
+    CPLD0_MAC0_ADDR = 0x33,   /* SMBUS down */
+    CPLD0_MAC1_ADDR = 0x34,
+    CPLD1_MAC0_ADDR = 0x35,
+    CPLD2_MAC1_ADDR = 0x36,
+    BCM_CPLD1_ADDR  = 0x37,
+    CPLD_ADDR_MAX,
+} dfd_cpld_addr_t;
+
+typedef struct dfd_dev_head_info_s {
+    uint8_t   ver;                       /* The version number defined by the E2PROM file, the initial version is 0x01  */
+    uint8_t   flag;                      /* The new version of E2PROM is identified as 0x7E */
+    uint8_t   hw_ver;                    /* It consists of two parts: the main version number and the revised version */
+    uint8_t   type;                      /* Hardware type definition information */
+    int16_t   tlv_len;                   /* Effective data length (16 bits) */
+} dfd_dev_head_info_t;
+
+typedef enum dfd_intf_e{
+    DFD_INTF_GET_FAN_HW_VERSION,
+    DFD_INTF_GET_FAN_STATUS,
+    DFD_INTF_GET_FAN_SPEED_LEVEL,
+    DFD_INTF_GET_FAN_SPEED,
+    DFD_INTF_GET_FAN_ATTRIBUTE,
+    DFD_INTF_GET_FAN_SN,
+    DFD_INTF_GET_FAN_TYPE,
+    DFD_INTF_SET_FAN_SPEED_LEVEL,
+    DFD_INTF_GET_FAN_SUB_NUM,
+    DFD_INTF_GET_FAN_FAIL_BITMAP,
+}dfd_intf_t;
+
+typedef struct dfd_dev_tlv_info_s {
+    uint8_t  type;                       /* the type of data */
+    uint8_t  len;                        /* the length of data */
+    uint8_t  data[0];                    /* data */
+} dfd_dev_tlv_info_t;
+
+typedef enum dfd_dev_info_type_e {
+    DFD_DEV_INFO_TYPE_MAC        = 1,
+    DFD_DEV_INFO_TYPE_NAME       = 2,
+    DFD_DEV_INFO_TYPE_SN         = 3,
+    DFD_DEV_INFO_TYPE_PWR_CONS   = 4,
+    DFD_DEV_INFO_TYPE_HW_INFO    = 5,
+    DFD_DEV_INFO_TYPE_DEV_TYPE   = 6,
+} dfd_dev_tlv_type_t;
+
+struct sfp_drivers_t{
+    /* addr = sff present bitmap addr, index from 0 */
+    void (*get_number) (unsigned int *number);
+    int (*get_port_start) (void);
+    int (*get_port_end) (void);
+    bool (*is_qsfp_port) (const unsigned int port_num);
+    bool (*get_present) (unsigned long *bitmap);
+    bool (*read_sfp_eeprom) (const unsigned int port,
+                const unsigned char addr,
+                const unsigned char offset,
+                const uint32_t count, char *buf);
+    bool (*write_sfp_eeprom) (const unsigned int port,
+                const unsigned char addr,
+                const unsigned char offset,
+                const unsigned char count,
+                const char *buf);
+    bool (*read_sysfs) (const unsigned int bus,
+                const unsigned char addr,
+                const unsigned char offset,
+                const uint32_t count, char *buf);
+    bool (*write_sysfs) (const unsigned int bus,
+                const unsigned char addr,
+                const unsigned char offset,
+                const unsigned char count,
+                const char *buf);
+    bool (*read_block_sysfs) (const unsigned int bus,
+                const unsigned char addr,
+                const unsigned char offset,
+                const uint32_t count, char *buf);
+};
+
+extern int debuglevel;
+extern int dfd_cpld_read_chipid(int cpldid , uint32_t addr, int32_t size, unsigned char *buf);
+extern int dfd_cpld_read(int32_t addr, uint8_t *val);
+extern int dfd_cpld_write(int32_t addr, uint8_t val);
+
+extern s32 platform_i2c_smbus_read_byte_data(const struct i2c_client *client, u8 command);
+extern s32 platform_i2c_smbus_read_i2c_block_data(const struct i2c_client *client,
+                u8 command, u8 length, u8 *values);
+extern s32 platform_i2c_smbus_read_word_data(const struct i2c_client *client, u8 command);
+
+extern int  sfp_drivers_register(struct sfp_drivers_t *drv);
+extern int  sfp_drivers_unregister(void);
+
+extern int sysfs_drivers_register(struct sfp_drivers_t *drv);
+extern int sysfs_drivers_unregister(void);
+
+#define DBG_DEBUG(fmt, arg...)  do { \
+    if ( debuglevel > DBG_START && debuglevel < DBG_ERROR) { \
+          printk(KERN_INFO "[DEBUG]:<%s, %d>:"fmt, __FUNCTION__, __LINE__, ##arg); \
+    } else if ( debuglevel >= DBG_ERROR ) {   \
+        printk(KERN_ERR "[DEBUG]:<%s, %d>:"fmt, __FUNCTION__, __LINE__, ##arg); \
+    } else {    } \
+} while (0)
+
+#define DBG_INFO(fmt, arg...)  do { \
+     if ( debuglevel > DBG_KEY) {  \
+        printk(KERN_INFO "[INFO]:<%s, %d>:"fmt, __FUNCTION__, __LINE__, ##arg); \
+       } \
+ } while (0)
+
+#define DBG_ERROR(fmt, arg...)  do { \
+     if ( debuglevel > DBG_START) {  \
+        printk(KERN_ERR "[ERROR]:<%s, %d>:"fmt, __FUNCTION__, __LINE__, ##arg); \
+       } \
+ } while (0)
+
+#endif
diff --git a/platform/centec-arm64/sonic-platform-modules-micas/common/modules/platform_common_module.c b/platform/centec-arm64/sonic-platform-modules-micas/common/modules/platform_common_module.c
new file mode 100644
index 000000000..14fc1a157
--- /dev/null
+++ b/platform/centec-arm64/sonic-platform-modules-micas/common/modules/platform_common_module.c
@@ -0,0 +1,210 @@
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/sysfs.h>
+#include <linux/slab.h>
+#include <linux/stat.h>
+#include <linux/uaccess.h>
+#include <linux/init.h>
+#include <linux/fs.h>
+#include <linux/i2c.h>
+#include <linux/i2c-mux.h>
+#include <linux/platform_data/i2c-mux-gpio.h>
+#include <linux/platform_device.h>
+#include <linux/delay.h>
+#include <linux/i2c-smbus.h>
+#include <linux/string.h>
+#include "platform.h"
+#include "dfd_tlveeprom.h"
+
+#define PLATFORM_I2C_RETRY_TIMES    3
+
+#define DFD_TLVEEPROM_I2C_BUS       (0)
+#define DFD_TLVEEPROM_I2C_ADDR      (0x56)
+#define DFD_E2PROM_MAX_LEN          (256)
+#define DFD_CARDTYPE_EXT_TLVLEN     (4)
+
+#define PLATFORM_CARDTYPE_RETRY_CNT      (10)
+#define PLATFORM_CARDTYPE_RETRY_TIMES    (1000)
+
+int debuglevel = 0;
+module_param(debuglevel, int, S_IRUGO | S_IWUSR);
+
+static int dfd_my_type = 0;
+module_param(dfd_my_type, int, S_IRUGO | S_IWUSR);
+
+int g_common_debug_error = 0;
+module_param(g_common_debug_error, int, S_IRUGO | S_IWUSR);
+
+int g_common_debug_verbose = 0;
+module_param(g_common_debug_verbose, int, S_IRUGO | S_IWUSR);
+
+uint32_t dfd_my_type_i2c_bus = 0;
+module_param(dfd_my_type_i2c_bus, int, S_IRUGO | S_IWUSR);
+
+uint32_t dfd_my_type_i2c_addr = 0;
+module_param(dfd_my_type_i2c_addr, int, S_IRUGO | S_IWUSR);
+
+#define WB_COMMON_DEBUG_VERBOSE(fmt, args...) do {                                        \
+    if (g_common_debug_verbose) { \
+        printk(KERN_ERR "[WB_COMMON][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define WB_COMMON_DEBUG_ERROR(fmt, args...) do {                                        \
+    if (g_common_debug_error) { \
+        printk(KERN_ERR "[WB_COMMON][ERROR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+static int32_t dfd_i2c_read(char *dev, uint32_t addr, uint32_t offset_addr, unsigned char *
+buf, int32_t size)
+{
+    struct file *fp;
+    mm_segment_t fs;
+    struct i2c_client client;
+    int i ,j ;
+    int rv;
+    s32 val_t;
+
+    val_t = -1;
+    rv = 0;
+    fp = filp_open(dev, O_RDWR, S_IRUSR | S_IWUSR);
+    if (IS_ERR(fp)) {
+        DBG_ERROR("i2c open fail.\n");
+        WB_COMMON_DEBUG_ERROR("i2c open fail.\n");
+        return -1;
+    }
+    memcpy(&client, fp->private_data, sizeof(struct i2c_client));
+    client.addr = addr;
+    fs = get_fs();
+    set_fs(KERNEL_DS);
+    for (j = 0 ;j < size ;j++){
+        for (i = 0; i < PLATFORM_I2C_RETRY_TIMES; i++) {
+          if ((val_t = i2c_smbus_read_byte_data(&client, (offset_addr + j))) < 0) {
+              DBG_DEBUG("read try(%d)time  offset_addr:%x \n", i, offset_addr);
+              continue;
+          }  else {
+              * (buf + j) = val_t;
+              break;
+          }
+        }
+        if (val_t < 0) {
+            rv = -1;
+            break;
+        }
+    }
+    filp_close(fp, NULL);
+    set_fs(fs);
+    return rv;
+}
+
+static int dfd_tlvinfo_get_cardtype(void)
+{
+    char i2c_path[16] = {0};
+    int ret;
+    int cardtype;
+    u_int8_t eeprom[DFD_E2PROM_MAX_LEN];
+    dfd_i2c_dev_t i2c_dev;
+    uint8_t buf[DFD_CARDTYPE_EXT_TLVLEN];
+    uint8_t len;
+    dfd_tlv_type_t tlv_type;
+
+    if (dfd_my_type_i2c_bus != 0) {
+        i2c_dev.bus = dfd_my_type_i2c_bus;
+    } else {
+        i2c_dev.bus = DFD_TLVEEPROM_I2C_BUS;
+    }
+
+    if (dfd_my_type_i2c_addr != 0) {
+        i2c_dev.addr = dfd_my_type_i2c_addr;
+    } else {
+        i2c_dev.addr = DFD_TLVEEPROM_I2C_ADDR;
+    }
+    snprintf(i2c_path, sizeof(i2c_path), "/dev/i2c-%d", i2c_dev.bus);
+    WB_COMMON_DEBUG_VERBOSE("Read device eeprom info:(dev:%s, addr:%02x).\n", i2c_path, i2c_dev.addr);
+
+    ret = dfd_i2c_read(i2c_path, i2c_dev.addr, 0, eeprom, DFD_E2PROM_MAX_LEN);
+    if (ret != 0) {
+        DBG_ERROR("Read eeprom info error(dev: %s, addr: %02x).\n", i2c_path, i2c_dev.addr);
+        WB_COMMON_DEBUG_ERROR("Read eeprom info error(dev: %s, addr: %02x).\n", i2c_path, i2c_dev.addr);
+        return ret;
+    }
+
+    tlv_type.main_type = TLV_CODE_VENDOR_EXT;
+    tlv_type.ext_type = DFD_TLVINFO_EXT_TLV_TYPE_DEV_TYPE;
+    len = sizeof(buf);
+    mem_clear(buf, len);
+    ret = dfd_tlvinfo_get_e2prom_info(eeprom, DFD_E2PROM_MAX_LEN, &tlv_type, buf, &len);
+    if (ret) {
+        DBG_ERROR("dfd_tlvinfo_get_e2prom_info failed ret %d.\n", ret);
+        return -1;
+    }
+    for (ret = 0; ret < 4; ret++) {
+        DBG_DEBUG("buf 0x%02x.\n", buf[ret]);
+    }
+
+    cardtype = ntohl(*((uint32_t *)buf));
+    DBG_DEBUG("cardtype 0x%x.\n", cardtype);
+    return cardtype;
+}
+
+static int __dfd_get_my_card_type(void)
+{
+    return dfd_tlvinfo_get_cardtype();
+}
+
+/* Get its own card type */
+int dfd_get_my_card_type(void)
+{
+    int type;
+    int cnt;
+
+    if (dfd_my_type != 0) {
+        DBG_DEBUG("my_type = 0x%x\r\n", dfd_my_type);
+        return dfd_my_type;
+    }
+
+    cnt = PLATFORM_CARDTYPE_RETRY_CNT;
+    while (cnt--) {
+        type = __dfd_get_my_card_type();
+        if (type < 0) {
+            WB_COMMON_DEBUG_ERROR("__dfd_get_my_card_type fail cnt %d, ret %d.\n", cnt, type);
+            msleep(PLATFORM_CARDTYPE_RETRY_TIMES);
+            continue;
+        }
+        WB_COMMON_DEBUG_VERBOSE("success to get type 0x%x.\n", type);
+        break;
+    }
+
+    dfd_my_type = type;
+    return dfd_my_type;
+}
+EXPORT_SYMBOL(dfd_get_my_card_type);
+
+static int __init wb_common_init(void)
+{
+    int ret;
+
+    WB_COMMON_DEBUG_VERBOSE("Enter.\n");
+    ret = dfd_get_my_card_type();
+    if (ret <= 0) {
+        WB_COMMON_DEBUG_ERROR("dfd_get_my_card_type failed, ret %d.\n", ret);
+        printk(KERN_ERR "Warning: Device type get failed, please check the TLV-EEPROM!\n");
+        return -1;
+    }
+
+    WB_COMMON_DEBUG_VERBOSE("Leave success type 0x%x.\n", ret);
+    return 0;
+}
+
+static void __exit wb_common_exit(void)
+{
+    WB_COMMON_DEBUG_VERBOSE("Exit.\n");
+}
+
+module_init(wb_common_init);
+module_exit(wb_common_exit);
+
+MODULE_DESCRIPTION("Platform Support");
+MODULE_AUTHOR("support <support>");
+MODULE_LICENSE("GPL");
diff --git a/platform/centec-arm64/sonic-platform-modules-micas/common/modules/wb_platform.c b/platform/centec-arm64/sonic-platform-modules-micas/common/modules/wb_platform.c
new file mode 100644
index 000000000..c7a976d45
--- /dev/null
+++ b/platform/centec-arm64/sonic-platform-modules-micas/common/modules/wb_platform.c
@@ -0,0 +1,79 @@
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/sysfs.h>
+#include <linux/slab.h>
+#include <linux/stat.h>
+#include <linux/uaccess.h>
+#include <linux/init.h>
+#include <linux/fs.h>
+#include <linux/i2c.h>
+#include <linux/i2c-mux.h>
+#include <linux/platform_data/i2c-gpio.h>
+#include <linux/platform_device.h>
+#include <linux/delay.h>
+#include <linux/i2c-smbus.h>
+#include <linux/string.h>
+#include "platform.h"
+
+#define PLATFORM_I2C_RETRY_TIMES    3
+
+s32 platform_i2c_smbus_read_byte_data(const struct i2c_client *client, u8 command)
+{
+    int try;
+    s32 ret;
+
+    ret = -1;
+    for (try = 0; try < PLATFORM_I2C_RETRY_TIMES; try++) {
+       if ((ret = i2c_smbus_read_byte_data(client, command)) >= 0 )
+            break;
+    }
+    return ret;
+
+}
+EXPORT_SYMBOL(platform_i2c_smbus_read_byte_data);
+
+s32 platform_i2c_smbus_read_i2c_block_data(const struct i2c_client *client,
+                u8 command, u8 length, u8 *values)
+{
+    int try;
+    s32 ret;
+
+    ret = -1;
+    for (try = 0; try < PLATFORM_I2C_RETRY_TIMES; try++) {
+       if ((ret = i2c_smbus_read_i2c_block_data(client, command, length, values)) >= 0 )
+            break;
+    }
+    return ret;
+}
+EXPORT_SYMBOL(platform_i2c_smbus_read_i2c_block_data);
+
+s32 platform_i2c_smbus_read_word_data(const struct i2c_client *client, u8 command)
+{
+    int try;
+    s32 ret;
+    
+    ret = -1;
+    for (try = 0; try < PLATFORM_I2C_RETRY_TIMES; try++) {
+       if ((ret = i2c_smbus_read_word_data(client, command)) >= 0 )
+            break;
+    }
+    return ret;
+}
+EXPORT_SYMBOL(platform_i2c_smbus_read_word_data);
+
+static int __init wb_platform_init(void)
+{
+    return 0;
+}
+
+static void __exit wb_platform_exit(void)
+{
+
+}
+
+module_init(wb_platform_init);
+module_exit(wb_platform_exit);
+
+MODULE_DESCRIPTION("Platform Support");
+MODULE_AUTHOR("support <support>");
+MODULE_LICENSE("GPL");
diff --git a/platform/centec-arm64/sonic-platform-modules-micas/common/script/device_i2c.py b/platform/centec-arm64/sonic-platform-modules-micas/common/script/device_i2c.py
new file mode 100644
index 000000000..a3787f76b
--- /dev/null
+++ b/platform/centec-arm64/sonic-platform-modules-micas/common/script/device_i2c.py
@@ -0,0 +1,283 @@
+#!/usr/bin/env python3
+# -*- coding: UTF-8 -*-
+import click
+import os
+import time
+from platform_config import GLOBALCONFIG, GLOBALINITPARAM, GLOBALINITCOMMAND, MAC_LED_RESET, STARTMODULE, i2ccheck_params
+from platform_util import wbpciwr, os_system
+
+CONTEXT_SETTINGS = dict(help_option_names=['-h', '--help'])
+
+class AliasedGroup(click.Group):
+    def get_command(self, ctx, cmd_name):
+        rv = click.Group.get_command(self, ctx, cmd_name)
+        if rv is not None:
+            return rv
+        matches = [x for x in self.list_commands(ctx)
+                   if x.startswith(cmd_name)]
+        if not matches:
+            return None
+        elif len(matches) == 1:
+            return click.Group.get_command(self, ctx, matches[0])
+        ctx.fail('Too many matches: %s' % ', '.join(sorted(matches)))
+
+def log_os_system(cmd):
+    u'''execute shell command'''
+    status, output = os_system(cmd)
+    if status:
+        print(output)
+    return  status, output
+
+def write_sysfs_value(reg_name, value):
+    u'''write sysfs file'''
+    mb_reg_file = "/sys/bus/i2c/devices/" + reg_name
+    if (not os.path.isfile(mb_reg_file)):
+        print(mb_reg_file,  'not found !')
+        return False
+    try:
+        with open(mb_reg_file, 'w') as fd:
+            fd.write(value)
+    except Exception as error:
+        return False
+    return True
+
+def check_driver():
+    u'''whether there is driver start with wb'''
+    status, output = log_os_system("lsmod | grep wb | wc -l")
+    #System execution error
+    if status:
+        return False
+    if output.isdigit() and int(output) > 0:
+        return True
+    else:
+        return False
+
+def get_pid(name):
+    ret = []
+    for dirname in os.listdir('/proc'):
+        if dirname == 'curproc':
+            continue
+        try:
+            with open('/proc/{}/cmdline'.format(dirname), mode='r') as fd:
+                content = fd.read()
+        except Exception:
+            continue
+        if name in content:
+            ret.append(dirname)
+    return ret
+
+def start_avs_ctrl():
+    if STARTMODULE.get("avscontrol", 0) == 1:
+        cmd = "nohup avscontrol.py start >/dev/null 2>&1 &"
+        rets = get_pid("avscontrol.py")
+        if len(rets) == 0:
+            log_os_system(cmd)
+
+def stop_avs_ctrl():
+    if STARTMODULE.get('avscontrol', 0) == 1:
+        rets = get_pid("avscontrol.py")  #
+        for ret in rets:
+            cmd = "kill "+ ret
+            log_os_system(cmd)
+
+def start_fan_ctrl():
+    if STARTMODULE.get('fancontrol', 0) == 1:
+        cmd = "nohup fancontrol.py start >/dev/null 2>&1 &"
+        rets = get_pid("fancontrol.py")
+        if len(rets) == 0:
+            log_os_system(cmd)
+
+def stop_fan_ctrl():
+    u'''disable fan timer service'''
+    if STARTMODULE.get('fancontrol', 0) == 1:
+        rets = get_pid("fancontrol.py")  #
+        for ret in rets:
+            cmd = "kill "+ ret
+            log_os_system(cmd)
+
+def rm_dev(bus, loc):
+    cmd = "echo  0x%02x > /sys/bus/i2c/devices/i2c-%d/delete_device" % (loc, bus)
+    devpath = "/sys/bus/i2c/devices/%d-%04x"%(bus, loc)
+    if os.path.exists(devpath):
+        log_os_system(cmd)
+
+def add_dev(name, bus, loc):
+    if name == "lm75":
+        time.sleep(0.1)
+    pdevpath = "/sys/bus/i2c/devices/i2c-%d/" % (bus)
+    for i in range(1, 100):#wait for mother-bus generation, maximum wait time is 10s
+        if os.path.exists(pdevpath) == True:
+            break
+        time.sleep(0.1)
+        if i % 10 == 0:
+            click.echo("%%DEVICE_I2C-INIT: %s not found, wait 0.1 second ! i %d " % (pdevpath,i))
+
+    cmd = "echo  %s 0x%02x > /sys/bus/i2c/devices/i2c-%d/new_device" % (name, loc, bus)
+    devpath = "/sys/bus/i2c/devices/%d-%04x"%(bus, loc)
+    if os.path.exists(devpath) == False:
+        log_os_system(cmd)
+
+def removedevs():
+    devs = GLOBALCONFIG["DEVS"]
+    for index in range(len(devs)-1, -1, -1 ):
+        rm_dev(devs[index]["bus"] , devs[index]["loc"])
+
+def adddevs():
+    devs = GLOBALCONFIG["DEVS"]
+    for dev in range(0, devs.__len__()):
+        add_dev(devs[dev]["name"], devs[dev]["bus"] , devs[dev]["loc"])
+
+def checksignaldriver(name):
+    modisexistcmd = "lsmod | grep %s | wc -l" % name
+    status, output = log_os_system(modisexistcmd)
+    #System execution error
+    if status:
+        return False
+    if output.isdigit() and int(output) > 0:
+        return True
+    else:
+        return False
+
+def adddriver(name, delay):
+    cmd = "modprobe %s" % name
+    if delay != 0:
+        time.sleep(delay)
+    if checksignaldriver(name) != True:
+        log_os_system(cmd)
+
+def removedriver(name, delay):
+    realname = name.lstrip().split(" ")[0];
+    cmd = "rmmod -f %s" % realname
+    if checksignaldriver(realname):
+        log_os_system(cmd)
+
+def removedrivers():
+    u'''remove all drivers'''
+    if GLOBALCONFIG is None:
+        click.echo("%%DEVICE_I2C-INIT: load global config failed.")
+        return
+    drivers = GLOBALCONFIG.get("DRIVERLISTS", None)
+    if drivers is None:
+        click.echo("%%DEVICE_I2C-INIT: load driver list failed.")
+        return
+    for index in range(len(drivers)-1, -1, -1 ):
+        delay = 0
+        name = ""
+        if type(drivers[index]) == dict and "delay" in drivers[index]:
+            name = drivers[index].get("name")
+            delay = drivers[index]["delay"]
+        else:
+            name = drivers[index]
+        removedriver(name, delay)
+
+def adddrivers():
+    u'''add drivers'''
+    if GLOBALCONFIG is None:
+        click.echo("%%DEVICE_I2C-INIT: load global config failed.")
+        return
+    drivers = GLOBALCONFIG.get("DRIVERLISTS", None)
+    if drivers is None:
+        click.echo("%%DEVICE_I2C-INIT: load driver list failed.")
+        return
+    for index in range(0 ,len(drivers)):
+        delay = 0
+        name = ""
+        if type(drivers[index]) == dict and "delay" in drivers[index]:
+            name = drivers[index].get("name")
+            delay = drivers[index]["delay"]
+        else:
+            name = drivers[index]
+        adddriver(name, delay)
+
+def otherinit():
+    for index in GLOBALINITPARAM:
+        delay = index.get('delay',0)
+        if delay !=0 :
+            time.sleep(1)
+        write_sysfs_value(index["loc"], index["value"])
+
+    for index in GLOBALINITCOMMAND:
+        log_os_system(index)
+
+def unload_driver():
+    u'''remove devices and drivers'''
+    stop_avs_ctrl() # disable avs-control
+    stop_fan_ctrl() # disable fan-control service
+    removedevs()    # remove other devices
+    removedrivers() # remove drivers
+
+def reload_driver():
+    u'''reload devices and drivers'''
+    removedevs()    # remove other devices
+    removedrivers() # remove drivers
+    time.sleep(1)
+    adddrivers()
+    adddevs()
+
+
+def i2c_check(bus,retrytime = 6):
+    try:
+        i2cpath = "/sys/bus/i2c/devices/" + bus
+        while retrytime and not os.path.exists(i2cpath):
+            click.echo("%%DEVICE_I2C-HA: i2c bus abnormal, last bus %s is not exist." % i2cpath)
+            reload_driver()
+            retrytime -= 1
+            time.sleep(1)
+    except Exception as e:
+        click.echo("%%DEVICE_I2C-HA: %s" % str(e))
+    return
+
+def set_mac_leds(data):
+    '''write pci register'''
+    pcibus = MAC_LED_RESET.get("pcibus")
+    slot = MAC_LED_RESET.get("slot")
+    fn = MAC_LED_RESET.get("fn")
+    bar = MAC_LED_RESET.get("bar")
+    offset = MAC_LED_RESET.get("offset")
+    val = MAC_LED_RESET.get(data, None)
+    if val is None:
+        click.echo("%%DEVICE_I2C-INIT: set_mac_leds wrong input")
+        return
+    wbpciwr(pcibus, slot, fn, bar, offset, val)
+
+def load_driver():
+    u'''load devices and drivers'''
+    adddrivers()
+    adddevs()
+    if STARTMODULE.get("i2ccheck",0) == 1: #i2c HA
+        busend = i2ccheck_params.get("busend")
+        retrytime = i2ccheck_params.get("retrytime")
+        i2c_check(busend,retrytime)
+    start_fan_ctrl() # enable fan
+    start_avs_ctrl() # avs voltage-adjustment
+    otherinit();    # other initialization, QSFP initialization
+    if STARTMODULE.get("macledreset", 0) == 1:
+        set_mac_leds("reset")
+
+@click.group(cls=AliasedGroup, context_settings=CONTEXT_SETTINGS)
+def main():
+    '''device operator'''
+    pass
+
+
+@main.command()
+def start():
+    '''load device '''
+    if check_driver():
+        unload_driver()
+    load_driver()
+
+@main.command()
+def stop():
+    '''stop device '''
+    unload_driver()
+
+@main.command()
+def restart():
+    '''restart device'''
+    unload_driver()
+    load_driver()
+
+if __name__ == '__main__':
+    u'''device_i2c operation'''
+    main()
diff --git a/platform/centec-arm64/sonic-platform-modules-micas/common/script/fancontrol.py b/platform/centec-arm64/sonic-platform-modules-micas/common/script/fancontrol.py
new file mode 100755
index 000000000..dbd2767ab
--- /dev/null
+++ b/platform/centec-arm64/sonic-platform-modules-micas/common/script/fancontrol.py
@@ -0,0 +1,495 @@
+#!/usr/bin/env python3.9
+# -*- coding: UTF-8 -*-
+import click
+import os
+import time
+import json
+import traceback
+from interface import Interface
+import logging.handlers
+from platform_util import CompressedRotatingFileHandler
+
+CONTEXT_SETTINGS = dict(help_option_names=['-h', '--help'])
+
+FILE_NAME = "/var/log/fancontrol.log"
+MAX_LOG_BYTES = 20*1024*1024
+BACKUP_COUNT = 9
+
+logger = logging.getLogger("fancontrol")
+logger.setLevel(logging.DEBUG)
+fanctrl_log = CompressedRotatingFileHandler(FILE_NAME, mode='a', maxBytes=MAX_LOG_BYTES, backupCount=BACKUP_COUNT, encoding=None, delay=0)
+formatter = logging.Formatter("%(asctime)s - %(levelname)s - %(message)s")
+fanctrl_log.setFormatter(formatter)
+logger.addHandler(fanctrl_log)
+
+DEBUG_FILE = "/etc/fancontrol_debug"
+FAN_CTRL_CFG_FILE = "/usr/local/bin/fan_ctrl_cfg.json"
+KEY_THERMAL = "Thermal"
+KEY_FAN = "Fans"
+KEY_PID = "PID"
+KEY_OPEN_LOOP = "OpenLoop"
+KEY_DEVICE = "Device"
+KEY_FAN_ERROR = "FanError"
+
+KEY_FANERROR_PWM_MAX = "Fan_Pwmmax"
+
+KEY_INLET_TEMP = "INLET_TEMP"
+KEY_OUTLET_TEMP = "OUTLET_TEMP"
+KEY_SWITCH_TEMP = "SWITCH_TEMP"
+KEY_TEMP = [KEY_INLET_TEMP, KEY_OUTLET_TEMP, KEY_SWITCH_TEMP]
+
+KEY_PID_PWM_MAX = "Pwm_Max"
+KEY_PID_PWM_MIN = "Pwm_Min"
+KEY_PID_SETPOINT = "SetPoint"
+KEY_PID_P = "P"
+KEY_PID_I = "I"
+KEY_PID_D = "D"
+KEY_PID_TEMP_MIN = "Temp_Min"
+KEY_PID_TEMP_MAX = "Temp_Max"
+
+KEY_OPENLOOP_A = "a"
+KEY_OPENLOOP_B = "b"
+KEY_OPENLOOP_C = "c"
+KEY_OPENLOOP_FIXUP = "fix_up"
+KEY_OPENLOOP_PWM_MAX = "pwmMax"
+KEY_OPENLOOP_PWM_MIN = "pwmMin"
+KEY_OPENLOOP_TEMP_MIN = "tempMin"
+
+STATUS_HIGH_CRIT = 1
+STATUS_MISS_CRIT = 2
+STATUS_BAD_FAN   = 4
+STATUS_LOW_FAN   = 8
+STATUS_MISS_ERR  = 16
+
+class AliasedGroup(click.Group):
+    def get_command(self, ctx, cmd_name):
+        rv = click.Group.get_command(self, ctx, cmd_name)
+        if rv is not None:
+            return rv
+        matches = [x for x in self.list_commands(ctx)
+                   if x.startswith(cmd_name)]
+        if not matches:
+            return None
+        elif len(matches) == 1:
+            return click.Group.get_command(self, ctx, matches[0])
+        ctx.fail('Too many matches: %s' % ', '.join(sorted(matches)))
+
+def fanctrl_debug_log(s):
+    # s = s.decode('utf-8').encode('gb2312')
+    if os.path.isfile(DEBUG_FILE):
+        logger.debug(s)
+
+class OpenLoop():
+    def __init__(self):
+        self.a = 0
+        self.b = 0
+        self.c = 0
+        self.fix_up = 0
+        self.pwmMax = 0
+        self.pwmMin = 0
+        self.temp = 0
+        self.tempMin = 0
+
+    def calcPwm(self):
+        if self.temp < self.tempMin:
+            return self.pwmMin
+        pwm = self.a * self.temp * self.temp + self.b * self.temp + self.c
+        pwm = (pwm / 2.56)
+        pwm = min(pwm, self.pwmMax)
+        pwm = max(pwm, self.pwmMin)
+        return pwm
+
+
+class FanPid():
+    def __init__(self):
+        self.pwmMin = 30
+        self.pwmMax = 100
+        self.SetPoint = 89
+        self.D = 0.196
+        self.I = 0.196
+        self.P = 1.176
+        self.tempMin = 28.0
+        self.tempMax = 45.0
+        self.pwms = [30, 30]
+        self.temps = [-1, -1, -1]
+        self.last_temp = -1
+        self.sensor = KEY_SWITCH_TEMP
+
+    def calcPwm(self):
+        temp_delta = self.temps[2] - self.last_temp
+        temp_sp_delta = self.temps[2] - self.SetPoint
+        temp_last_delta = ((self.temps[2] - self.temps[1]) - (self.temps[1] - self.temps[0]))
+
+        delta_pwm = self.P * temp_delta + self.I * temp_sp_delta + self.D * temp_last_delta
+
+        self.temps[0] = self.temps[1]
+        self.temps[1] = self.temps[2]
+        self.last_temp = self.temps[2]
+
+        self.pwms[0] = self.pwms[1]
+        self.pwms[1] = self.pwms[0] + delta_pwm
+        self.pwms[1] = max(self.pwms[1], self.pwmMin)
+        self.pwms[1] = min(self.pwms[1], self.pwmMax)
+
+        return self.pwms[1]
+
+class FanControl():
+
+    def __init__(self):
+        self.status = 0
+        self.fan_status = 0
+        self.error_time = 0
+        self.low_time = 0
+        self.fan_pwm = 40
+        self.fanerr_pwmmax = 0
+        self.interface = Interface()
+        self.temps = {}
+        self.tempsMax = {}
+        self.tempsMin = {}
+        self.tempStatus = {}
+        self.tempCritTime = {}
+        self.tempMissTime = {}
+
+        self.fans = {}
+        self.fanStatus = {}
+        self.fanErrTime = {}
+        self.fanLowTime = {}
+
+        self.fanPid = None
+        self.openloop = None
+
+        self.isBuildin = 0
+        self.isLiquid = 0
+        self.eeproms = {}
+        self.airflow = ""
+        self.pid_switch = 1
+        self.openloop_switch = 1
+
+    def doGetAirFlow(self):
+        if self.isLiquid == 1:
+            return "Liquid"
+        # PSU and Fan is buildin using Tlve2
+        if self.isBuildin == 1:
+            productName = self.interface.get_productname()
+            if productName != "":
+                tmp = productName.split("-")
+                fanairflow = tmp[-1]
+                if fanairflow == "R":
+                    return "exhaust"
+                else:
+                    return "intake"
+        elif self.isBuildin == 0:
+            return self.interface.get_airflow()
+
+        return ""
+
+    def doFanCtrlInit(self):
+        if os.path.isfile(FAN_CTRL_CFG_FILE):
+            fh = open(FAN_CTRL_CFG_FILE)
+            if not fh:
+                logger.error("Config file %s doesn't exist" % FAN_CTRL_CFG_FILE)
+                return False
+            cfg_json = json.load(fh)
+            if not cfg_json:
+                logger.error('Load config file %s failed' % FAN_CTRL_CFG_FILE)
+                fh.close()
+                return False
+
+            cfg_keys = [KEY_THERMAL, KEY_FAN, KEY_PID, KEY_OPEN_LOOP, KEY_DEVICE, KEY_FAN_ERROR]
+            for key in cfg_keys:
+                if key not in cfg_json:
+                    logger.error('Key %s not present in cfg file' % key)
+                    return False
+            thermal_json = cfg_json[KEY_THERMAL]
+            fan_json = cfg_json[KEY_FAN]
+            pid_json = cfg_json[KEY_PID]
+            openloop_json = cfg_json[KEY_OPEN_LOOP]
+            device_json = cfg_json[KEY_DEVICE]
+            fan_error_json = cfg_json[KEY_FAN_ERROR]
+
+            #init fanerror
+            self.fanerr_pwmmax = fan_error_json["Fan_Pwmmax"]
+
+            # Get Airflow
+            self.isBuildin = device_json["Buildin"]
+            self.isLiquid = device_json["Liquid"]
+            self.airflow = self.doGetAirFlow()
+            if self.airflow == "":
+                logger.warning("Cannot get airflow from device!")
+            self.pid_switch = device_json["PID"]
+            self.openloop_switch = device_json["OpenLoop"]
+            if self.pid_switch == 0 and self.openloop_switch == 0:
+                logger.warning("No PID and OpenLoop found!")
+            # Init openloop
+            self.openloop = OpenLoop()
+            self.openloop.a = openloop_json[KEY_OPENLOOP_A]
+            self.openloop.b = openloop_json[KEY_OPENLOOP_B]
+            self.openloop.c = openloop_json[KEY_OPENLOOP_C]
+            self.openloop.fix_up = openloop_json[KEY_OPENLOOP_FIXUP]
+            self.openloop.pwmMax = openloop_json[KEY_OPENLOOP_PWM_MAX]
+            self.openloop.pwmMin = openloop_json[KEY_OPENLOOP_PWM_MIN]
+            self.openloop.tempMin = openloop_json[KEY_OPENLOOP_TEMP_MIN]
+            # Init PID
+            self.fanPid = FanPid()
+            self.fanPid.pwmMax = pid_json[KEY_PID_PWM_MAX]
+            self.fanPid.pwmMin = pid_json[KEY_PID_PWM_MIN]
+            self.fanPid.SetPoint = pid_json[KEY_PID_SETPOINT]
+            self.fanPid.P = pid_json[KEY_PID_P]
+            self.fanPid.I = pid_json[KEY_PID_I]
+            self.fanPid.D = pid_json[KEY_PID_D]
+            self.fanPid.tempMin = pid_json[KEY_PID_TEMP_MIN]
+            self.fanPid.tempMax = pid_json[KEY_PID_TEMP_MAX]
+            # Init thermal setting
+            for key, item in list(thermal_json.items()):
+                fanctrl_debug_log("%s %s " % (key,item))
+                if key not in KEY_TEMP:
+                    logger.error('Key %s not present in cfg file' % key)
+                    return False
+                self.temps[item] = -1.0
+                self.tempsMax[item] = self.interface.get_thermal_temp_max(item)
+                self.tempsMin[item] = self.interface.get_thermal_temp_min(item)
+                self.tempStatus[item] = 0
+                self.tempMissTime[item] = [0, 0]
+                self.tempCritTime[item] = [0, 0]
+                if key == self.fanPid.sensor:
+                    self.fanPid.sensor = item
+
+            # Init fans setting
+            for key, item in list(fan_json.items()):
+                self.fans[key] = item
+                self.fanStatus[key] = 0
+                self.fanErrTime[key] = [0, 0]
+                self.fanLowTime[key] = [0, 0]
+            fh.close()
+        else:
+            logger.error('%s is not a file' % FAN_CTRL_CFG_FILE)
+            return False
+
+        fanctrl_debug_log("Device AirFlow: %s" % (self.airflow))
+        self.updateThermal()
+        self.fanPid.last_temp = self.temps[self.fanPid.sensor]
+        for i in range(3):
+            self.fanPid.temps[i] = self.temps[self.fanPid.sensor]
+        return True
+
+    def setFanSpeed(self, speed):
+        return self.interface.set_fan_speed_pwm(speed)
+
+    def updateThermal(self):
+        for key in self.temps:
+            self.temps[key] = self.interface.get_thermal_temp(key)
+            fanctrl_debug_log("%s temps %d C" % (key, self.temps[key]))
+
+        if self.temps[KEY_INLET_TEMP] >= self.tempsMax[KEY_INLET_TEMP] or self.temps[KEY_INLET_TEMP] <= -99999:
+            self.temps[KEY_INLET_TEMP] = self.tempsMax[KEY_INLET_TEMP]
+        self.openloop.temp = self.temps[KEY_INLET_TEMP]
+        self.fanPid.temps[2] = self.temps[KEY_INLET_TEMP]
+
+    def checkThermal(self):
+        thermal_cnt = 0
+        for key in self.temps:
+            if self.temps[key] <= -9999:
+                if self.tempStatus[key] & STATUS_MISS_CRIT != 0:
+                    self.tempMissTime[key][0] = time.time()
+                else:
+                    self.tempMissTime[key][1] = time.time()
+                self.tempStatus[key] = self.tempStatus[key] | STATUS_MISS_CRIT
+                if self.tempMissTime[key][1] - self.tempMissTime[key][0] > 15:
+                    logger.warning("%s Read Invaild Temperautre %d " % (key, self.temps[key]))
+                    self.tempStatus[key] = self.tempStatus[key] | STATUS_MISS_ERR
+            else:
+                self.tempStatus[key] = self.tempStatus[key] & ~(STATUS_MISS_CRIT | STATUS_MISS_ERR)
+
+            if self.temps[key] >= self.tempsMax[key]:
+                self.tempCritTime[key][0] = time.time()
+                self.tempStatus[key] = self.tempStatus[key] | STATUS_HIGH_CRIT
+                logger.warning("%s Temperautre %d >= High Threshold %d" % (key, self.temps[key], self.tempsMax[key]))
+            elif self.tempStatus[key] & (STATUS_HIGH_CRIT) != 0:
+                self.tempCritTime[key][1] = time.time()
+                logger.warning("%s Temperautre %d Recovery" % (key, self.temps[key]))
+                if self.tempCritTime[key][1] - self.tempCritTime[key][0] > 300:
+                    self.tempStatus[key] = self.tempStatus[key] & ~(STATUS_HIGH_CRIT)
+
+            if self.tempStatus[key] & ~(STATUS_MISS_CRIT) != 0:
+                thermal_cnt = thermal_cnt + 1
+
+        self.status = thermal_cnt
+        fanctrl_debug_log("Thermal error num %d" % self.status)
+
+    def checkFanSpeed(self):
+        fan_error_cnt = 0
+        for key, item in list(self.fans.items()):
+            speed = self.interface.get_fan_speed_rpm(item)
+            rpm_max = self.interface.get_fan_rpm_max()
+            if self.fan_pwm == 100 and speed < rpm_max * 0.7:
+                if self.fanStatus[key] & STATUS_BAD_FAN != 0:
+                    self.fanErrTime[key][0] = time.time()
+                else:
+                    self.fanErrTime[key][1] = time.time()
+
+                self.fanStatus[key] = self.fanStatus[key] | STATUS_BAD_FAN
+                if self.fanErrTime[key][1] - self.fanErrTime[key][0] >= 30:
+                    logger.warning("%s PWM is %d but Speed %d <= %d RPM" % (item, self.fan_pwm, speed, rpm_max * 0.7))
+            else:
+                self.fanStatus[key] = self.fanStatus[key] & ~(STATUS_BAD_FAN)
+
+            if speed < 1000:
+                if self.fanStatus[key] & STATUS_LOW_FAN != 0:
+                    self.fanLowTime[key][0] = time.time()
+                else:
+                    self.fanLowTime[key][1] = time.time()
+                self.fanStatus[key] = self.fanStatus[key] | STATUS_LOW_FAN
+                if self.fanLowTime[key][1] - self.fanLowTime[key][0] > 30:
+                    logger.warning("%s Speed %d <= %d RPM" % (item, speed, 1000))
+            else:
+                self.fanStatus[key] = self.fanStatus[key] & ~(STATUS_LOW_FAN)
+
+            fanctrl_debug_log("%s speed %d RPM" % (key, speed))
+
+            if self.fanStatus[key] != 0:
+                fan_error_cnt = fan_error_cnt + 1
+        self.fan_status = fan_error_cnt
+        fanctrl_debug_log("Fan error num %d" % fan_error_cnt)
+
+    def doApplyPolicy(self):
+        if self.isLiquid == 1:
+            return
+
+        self.fan_pwm = 0
+        if self.openloop_switch == 1:
+            openloop_pwm = int(self.openloop.calcPwm())
+            fanctrl_debug_log("OpenLoop pwm %d" % (openloop_pwm))
+            self.fan_pwm = max(self.fan_pwm, openloop_pwm)
+
+        if self.pid_switch == 1:
+            pid_pwm = int(self.fanPid.calcPwm())
+            fanctrl_debug_log("PID pwm %d" % (pid_pwm))
+            self.fan_pwm = max(self.fan_pwm, pid_pwm)
+
+        # Check fan presence
+        if self.interface.get_fan_presence() == False:
+            logger.warning("Fan presence check false, set fan pwm to 100")
+            self.fan_pwm = self.fanerr_pwmmax
+        if self.fan_status != 0 or self.status != 0:
+            self.fan_pwm = self.fanerr_pwmmax
+        fanctrl_debug_log("Fan Speed set to %d pwm" % self.fan_pwm)
+        for i in range(3):
+            ret = self.setFanSpeed(self.fan_pwm)
+            if ret == False:
+                logger.warning("Fan speed set %d pwm failed, retry %d times" % (self.fan_pwm, i + 1))
+                continue
+            break
+
+    def doBoardFanLedCtrl(self):
+        if self.interface.get_fan_status() != False and self.interface.get_fan_presence() != False and self.fan_status == 0:
+            fanctrl_debug_log("Fan status good setting LED to green")
+            self.interface.set_fan_board_led("green")
+        else:
+            fanctrl_debug_log("Fan status error setting LED to red")
+            self.interface.set_fan_board_led("red")
+
+    def doBoardPsuLedCtrl(self):
+        if self.interface.get_psu_status() != False:
+            fanctrl_debug_log("PSU status good setting LED to green")
+            self.interface.set_psu_board_led("green")
+        else:
+            fanctrl_debug_log("PSU status error setting LED to red")
+            self.interface.set_psu_board_led("red")
+
+    def doSysLedCtrl(self):
+        self.interface.set_sysled("green")
+
+def run(interval, fanCtrol):
+    loop = 0
+    # waitForDocker()
+    fanCtrol.setFanSpeed(fanCtrol.fan_pwm) #init set fan speed to 50 pwm
+    fanCtrol.doFanCtrlInit()
+    if fanCtrol.airflow == "Liquid":
+        logger.warning('Liquid device stopping fancontrol')
+        return True
+    while True:
+        try:
+            if loop % 5 == 0: # Fan speed control
+                try:
+                    fanCtrol.updateThermal()
+                except Exception as e:
+                    logger.error('Failed: Update Thermal, %s' % str(e))
+                    logger.error('%s' % traceback.format_exc())
+                    time.sleep(3)
+                    continue
+
+                try:
+                    fanCtrol.checkThermal()
+                except Exception as e:
+                    logger.error('Failed: Check Thermal, %s' % str(e))
+                    logger.error('%s' % traceback.format_exc())
+                    time.sleep(3)
+                    continue
+
+                try:
+                    fanCtrol.checkFanSpeed()
+                except Exception as e:
+                    logger.error('Failed: Check Fan Speed, %s' % str(e))
+                    logger.error('%s' % traceback.format_exc())
+                    time.sleep(3)
+                    continue
+
+                try:
+                    fanCtrol.doApplyPolicy()
+                except Exception as e:
+                    logger.error('Failed: Apply Policy, %s' % str(e))
+                    logger.error('%s' % traceback.format_exc())
+                    time.sleep(3)
+                    continue
+
+                try:
+                    fanCtrol.doBoardFanLedCtrl()
+                except Exception as e:
+                    logger.error('Failed: Led Control, %s' % str(e))
+                    logger.error('%s' % traceback.format_exc())
+                    time.sleep(3)
+                    continue
+
+                try:
+                    fanCtrol.doBoardPsuLedCtrl()
+                except Exception as e:
+                    logger.error('Failed: Led Control, %s' % str(e))
+                    logger.error('%s' % traceback.format_exc())
+                    time.sleep(3)
+                    continue
+
+                try:
+                    fanCtrol.doSysLedCtrl()
+                except Exception as e:
+                    logger.error('Failed: Led Control, %s' % str(e))
+                    logger.error('%s' % traceback.format_exc())
+                    time.sleep(3)
+                    continue
+
+            time.sleep(interval)
+            loop += interval
+        except Exception as e:
+            traceback.print_exc()
+            logger.error(str(e))
+
+@click.group(cls=AliasedGroup, context_settings=CONTEXT_SETTINGS)
+def main():
+    '''device operator'''
+    pass
+
+@main.command()
+def start():
+    '''start fan control'''
+    logger.info("FANCTROL start")
+    fanCtrol = FanControl()
+    interval = 1
+    run(interval, fanCtrol)
+
+@main.command()
+def stop():
+    '''stop fan control '''
+    logger.info("FANCTROL stop")
+
+# device_i2c operation
+if __name__ == '__main__':
+    main()
diff --git a/platform/centec-arm64/sonic-platform-modules-micas/common/script/interface.py b/platform/centec-arm64/sonic-platform-modules-micas/common/script/interface.py
new file mode 100644
index 000000000..140e09ec0
--- /dev/null
+++ b/platform/centec-arm64/sonic-platform-modules-micas/common/script/interface.py
@@ -0,0 +1,77 @@
+from sonic_platform.chassis import Chassis
+
+class Interface():
+    def __init__(self):
+        self.chassis = Chassis()
+        self.fan_list = self.chassis._fan_list
+        self.thermal_list = self.chassis._thermal_list
+        self.psu_list = self.chassis._psu_list
+    # Device
+    def get_productname(self):
+        return self.chassis.get_name()
+
+    def set_sysled(self, color):
+        return self.thermal_list[0].set_sys_led(color)
+
+    # Thermal
+    def get_thermal_temp_max(self, name):
+        for thermal in self.thermal_list:
+            if name == thermal.get_real_name():
+                return thermal.get_high_threshold()
+
+    def get_thermal_temp_min(self, name):
+        for thermal in self.thermal_list:
+            if name == thermal.get_real_name():
+                return thermal.get_low_threshold()
+
+    def get_thermal_temp(self, name):
+        for thermal in self.thermal_list:
+            if name == thermal.get_real_name():
+                return thermal.get_temperature()
+    # Fans
+    def set_fan_speed_pwm(self, speed):
+        return self.fan_list[0].set_speed_pwm(speed)
+
+    def get_fan_status(self):
+        for fan in self.fan_list:
+            if fan.get_status() == False:
+                return False
+        return True
+
+    def get_fan_presence(self):
+        for fan in self.fan_list:
+            if fan.get_presence() == False:
+                return False
+        return True
+
+    def set_fan_board_led(self, color):
+        return self.fan_list[0].set_status_led(color)
+
+    def get_fan_speed_rpm(self, name):
+        for fan in self.fan_list:
+            if name == fan.get_name():
+                return fan.get_speed_rpm()
+        return 0
+
+    def get_fan_rpm_max(self):
+        return self.fan_list[0].get_high_critical_threshold()
+
+    def get_airflow(self):
+        tmp1 = self.fan_list[0].get_direction()
+        tmp2 = self.fan_list[0].get_direction()
+        for fan in self.fan_list:
+            tmp1 = fan.get_direction()
+            if tmp1 != tmp2:
+                return "F2B"
+            tmp2 = tmp1
+        return tmp2
+    # Psus
+    def get_psu_status(self):
+        for psu in self.psu_list:
+            if psu.get_powergood_status == False:
+                return False
+        return True
+
+    def set_psu_board_led(self, color):
+        return self.psu_list[0].set_status_led(color)
+
diff --git a/platform/centec-arm64/sonic-platform-modules-micas/common/script/platform_common.py b/platform/centec-arm64/sonic-platform-modules-micas/common/script/platform_common.py
new file mode 100644
index 000000000..48bfe59fb
--- /dev/null
+++ b/platform/centec-arm64/sonic-platform-modules-micas/common/script/platform_common.py
@@ -0,0 +1,1303 @@
+#!/usr/bin/python3
+################################driver-load-adaption#######################################################
+#   need to export interface
+###################################################################################################
+
+__all__ = [
+    "fancontrol_loc",
+    "fancontrol_config_loc",
+    "GLOBALCONFIG",
+    "MONITOR_CONST",
+    "PLATFORM_PART_NUMBER",
+    "PLATFORM_LABEL_REVISION",
+    "PLATFORM_ONIE_VERSION",
+    "PLATFORM_MAC_SIZE",
+    "PLATFORM_MANUF_NAME",
+    "PLATFORM_MANUF_COUNTRY",
+    "PLATFORM_VENDOR_NAME",
+    "PLATFORM_DIAG_VERSION",
+    "PLATFORM_SERVICE_TAG",
+    "DEV_LEDS",
+    "MEM_SLOTS",
+    "LOCAL_LED_CONTROL",
+    "FIRMWARE_TOOLS",
+    "STARTMODULE",
+    "i2ccheck_params",
+    "FANS_DEF",
+    "factest_module",
+    "MONITOR_TEMP_MIN",
+    "MONITOR_K",
+    "MONITOR_MAC_IN",
+    "MONITOR_DEFAULT_SPEED",
+    "MONITOR_MAX_SPEED",
+    "MONITOR_MIN_SPEED",
+    "MONITOR_MAC_ERROR_SPEED",
+    "MONITOR_FAN_TOTAL_NUM",
+    "MONITOR_MAC_UP_TEMP",
+    "MONITOR_MAC_LOWER_TEMP",
+    "MONITOR_MAC_MAX_TEMP",
+    "MONITOR_FALL_TEMP",
+    "MONITOR_MAC_WARNING_THRESHOLD",
+    "MONITOR_OUTTEMP_WARNING_THRESHOLD",
+    "MONITOR_BOARDTEMP_WARNING_THRESHOLD",
+    "MONITOR_CPUTEMP_WARNING_THRESHOLD",
+    "MONITOR_INTEMP_WARNING_THRESHOLD",
+    "MONITOR_MAC_CRITICAL_THRESHOLD",
+    "MONITOR_OUTTEMP_CRITICAL_THRESHOLD",
+    "MONITOR_BOARDTEMP_CRITICAL_THRESHOLD",
+    "MONITOR_CPUTEMP_CRITICAL_THRESHOLD",
+    "MONITOR_INTEMP_CRITICAL_THRESHOLD",
+    "MONITOR_CRITICAL_NUM",
+    "MONITOR_SHAKE_TIME",
+    "MONITOR_INTERVAL",
+    "MONITOR_MAC_SOURCE_SYSFS",
+    "MONITOR_MAC_SOURCE_PATH",
+    "MAC_AVS_PARAM",
+    "MAC_DEFAULT_PARAM",
+    "MONITOR_SYS_LED",
+    "MONITOR_SYS_FAN_LED",
+    "MONITOR_FANS_LED",
+    "MONITOR_SYS_PSU_LED",
+    "MONITOR_FAN_STATUS",
+    "MONITOR_PSU_STATUS",
+    "MONITOR_DEV_STATUS",
+    "MONITOR_DEV_STATUS_DECODE",
+    "DEV_MONITOR_PARAM",
+    "SLOT_MONITOR_PARAM",
+    "fanloc",
+    "PCA9548START",
+    "PCA9548BUSEND",
+    "PLATFORM_CARDID",
+    "PLATFORM_PRODUCTNAME",
+    "FAN_PROTECT",
+    "wb_eeprom",
+    "E2_LOC",
+    "E2_PROTECT",
+    "MAC_LED_RESET",
+    "INIT_PARAM",
+    "INIT_COMMAND",
+    "CPLDVERSIONS",
+    "DRIVERLISTS",
+    "DEVICE",
+    "E2TYPE",
+    "FRULISTS",
+    "fanlevel_6510",
+    "fanlevel_6520",
+    "fanlevel",
+    "TEMPIDCHANGE",
+    "FACTESTMODULE",
+    "item1",
+    "test_sys_reload_item",
+    "test_sys_item",
+    "test_temp_item",
+    "test_mem_item",
+    "test_hd_item",
+    "test_rtc_item",
+    "test_i2c_item",
+    "test_cpld_item",
+    "test_portframe_item",
+    "test_sysled_item",
+    "test_fan_item",
+    "test_power_item",
+    "test_usb_item",
+    "test_prbs_item",
+    "test_portbroadcast_item",
+    "test_debug_level",
+    "test_log_level",
+    "test_setmac",
+    "test_setrtc",
+    "log_level_critical",
+    "log_level_debug",
+    "log_level_error",
+    "log_level_info",
+    "log_level_notset",
+    "log_level_warning",
+    "test_e2_setmac_item",
+    "test_bmc_setmac_item",
+    "test_fan_setmac_item",
+    "alltest",
+    "looptest",
+    "menuList",
+    "TESTCASE",
+    "PCIe_DEV_LIST",
+    "PCIe_SPEED_ITEM",
+]
+
+fancontrol_loc = "/usr/local/bin"
+fancontrol_config_loc = "/usr/local/bin"
+
+GLOBALCONFIG = "GLOBALCONFIG"
+MONITOR_CONST = "MONITOR_CONST"
+
+PLATFORM_CARDID      = 0x00004065
+PLATFORM_PRODUCTNAME = "M2-W6010-48GT4X"
+PLATFORM_PART_NUMBER    = "01016994"
+PLATFORM_LABEL_REVISION = "R01"
+PLATFORM_ONIE_VERSION   = "2018.05-rc1"
+PLATFORM_MAC_SIZE       = 3
+PLATFORM_MANUF_NAME     = "Micas"
+PLATFORM_MANUF_COUNTRY  = "USA"
+PLATFORM_VENDOR_NAME    = "Micas"
+PLATFORM_DIAG_VERSION   = "0.1.0.15"
+PLATFORM_SERVICE_TAG    = "www.micasnetworks.com"
+
+DEV_LEDS = {}
+MEM_SLOTS = []
+
+LOCAL_LED_CONTROL = {"CLOSE": {}, "OPEN": {}}
+
+FIRMWARE_TOOLS = {}
+# start-up module
+STARTMODULE = {"fancontrol": 1, "avscontrol": 1}
+
+i2ccheck_params = {"busend": "i2c-66", "retrytime": 6}
+
+###################################################################################################
+#####          fan board ID reference
+###################################################################################################
+FANS_DEF = {
+    0x8100: "M6500-FAN-F",
+    0x8101: "M6510-FAN-F",
+    0x8102: "M6520-FAN-F",
+    0x8103: "M6510-FAN-R",
+}
+
+factest_module = {
+    "sysinfo_showfanmsg": 1,
+    "sysinfo_showPsumsg": 1,
+    "sysinfo_showrestfanmsg": 0,
+    "sysinfo_showrestpsumsg": 0,
+}
+
+#################fan adjustment parameters ##############################
+MONITOR_TEMP_MIN = 38  # temperature before speed-adjustment
+MONITOR_K = 11  # adjustment algorithm
+MONITOR_MAC_IN = 35  # temperature difference between mac and chip(backup)
+MONITOR_DEFAULT_SPEED = 0x60  # default speed
+MONITOR_MAX_SPEED = 0xFF  # maximum speed
+MONITOR_MIN_SPEED = 0x33  # minimum speed
+MONITOR_MAC_ERROR_SPEED = 0xBB  # MAC abnormal speed
+MONITOR_FAN_TOTAL_NUM = 4  # 3+1 redundancy design, report to syslog if there is a error
+MONITOR_MAC_UP_TEMP = 50  # MAC compared with inlet up
+MONITOR_MAC_LOWER_TEMP = -50  # MAC compared with outlet down
+MONITOR_MAC_MAX_TEMP = 100  #
+
+MONITOR_FALL_TEMP = 4  # adjustment reduced temperature
+MONITOR_MAC_WARNING_THRESHOLD = 100  # 100
+MONITOR_OUTTEMP_WARNING_THRESHOLD = 85
+MONITOR_BOARDTEMP_WARNING_THRESHOLD = 85
+MONITOR_CPUTEMP_WARNING_THRESHOLD = 85
+MONITOR_INTEMP_WARNING_THRESHOLD = 70  # 70
+
+MONITOR_MAC_CRITICAL_THRESHOLD = 105  # 105
+MONITOR_OUTTEMP_CRITICAL_THRESHOLD = 90  # 90
+MONITOR_BOARDTEMP_CRITICAL_THRESHOLD = 90  # 90
+MONITOR_CPUTEMP_CRITICAL_THRESHOLD = 100  # 100
+MONITOR_INTEMP_CRITICAL_THRESHOLD = 80  # 80
+MONITOR_CRITICAL_NUM = 3  # retry times
+MONITOR_SHAKE_TIME = 20  # anti-shake times
+MONITOR_INTERVAL = 60
+
+# 1 get mac temperature from sysfs ,0 get mac temperature from bcmcmd
+MONITOR_MAC_SOURCE_SYSFS = (0)
+MONITOR_MAC_SOURCE_PATH = None  # sysfs path
+
+
+# default MAC AVS parameters
+MAC_AVS_PARAM = {
+    0x72: 0x0384,
+    0x73: 0x037E,
+    0x74: 0x0378,
+    0x75: 0x0372,
+    0x76: 0x036B,
+    0x77: 0x0365,
+    0x78: 0x035F,
+    0x79: 0x0359,
+    0x7A: 0x0352,
+    0x7B: 0x034C,
+    0x7C: 0x0346,
+    0x7D: 0x0340,
+    0x7E: 0x0339,
+    0x7F: 0x0333,
+    0x80: 0x032D,
+    0x81: 0x0327,
+    0x82: 0x0320,
+    0x83: 0x031A,
+    0x84: 0x0314,
+    0x85: 0x030E,
+    0x86: 0x0307,
+    0x87: 0x0301,
+    0x88: 0x02FB,
+    0x89: 0x02F5,
+    0x8A: 0x02EE,
+}
+
+# default 6520 configuration
+MAC_DEFAULT_PARAM = {
+    "type": 1,  # type 1 represents default if out of range / 0 represents no voltage-adjustment if out of range
+    "default": 0x74,  # should be used with type
+    "loopaddr": 0x00,  # AVS loop address
+    "loop": 0x00,  # AVS loop value
+    "open": 0x00,  # diasble write-protection value
+    "close": 0x40,  # enable write-protection value
+    "bus": 2,  # AVSI2C bus address
+    "devno": 0x60,  # AVS address
+    "addr": 0x21,  # AVS voltage-adjustment address
+    "protectaddr": 0x10,  # AVS write-protection address
+    "sdkreg": "DMU_PCU_OTP_CONFIG_8",  # SDK register name
+    "sdktype": 1,  # type 0 represents no shift operation / 1 represents shift operation
+    "macregloc": 24,  # shift operation
+    "mask": 0xFF,  # mask after shift
+}
+
+MONITOR_SYS_LED = [
+    {"bus": 2, "devno": 0x33, "addr": 0xB2, "yellow": 0x06, "red": 0x02, "green": 0x04},
+    {"bus": 2, "devno": 0x32, "addr": 0x72, "yellow": 0x06, "red": 0x02, "green": 0x04},
+]
+
+MONITOR_SYS_FAN_LED = [
+    {"bus": 2, "devno": 0x33, "addr": 0xB4, "yellow": 0x06, "red": 0x02, "green": 0x04},
+]
+
+MONITOR_FANS_LED = [
+    {"bus": 2, "devno": 0x32, "addr": 0x23, "green": 0x09, "red": 0x0A},
+    {"bus": 2, "devno": 0x32, "addr": 0x24, "green": 0x09, "red": 0x0A},
+    {"bus": 2, "devno": 0x32, "addr": 0x25, "green": 0x09, "red": 0x0A},
+    {"bus": 2, "devno": 0x32, "addr": 0x26, "green": 0x09, "red": 0x0A},
+]
+
+
+MONITOR_SYS_PSU_LED = [
+    {"bus": 2, "devno": 0x33, "addr": 0xB3, "yellow": 0x06, "red": 0x02, "green": 0x04},
+]
+
+MONITOR_FAN_STATUS = [
+    {"status": "green", "minOkNum": 4, "maxOkNum": 4},
+    {"status": "yellow", "minOkNum": 3, "maxOkNum": 3},
+    {"status": "red", "minOkNum": 0, "maxOkNum": 2},
+]
+
+MONITOR_PSU_STATUS = [
+    {"status": "green", "minOkNum": 2, "maxOkNum": 2},
+    {"status": "yellow", "minOkNum": 1, "maxOkNum": 1},
+    {"status": "red", "minOkNum": 0, "maxOkNum": 0},
+]
+
+MONITOR_DEV_STATUS = {}
+MONITOR_DEV_STATUS_DECODE = {}
+DEV_MONITOR_PARAM = {}
+SLOT_MONITOR_PARAM = {}
+
+
+fanloc = {"name": "fanset", "location": "0-0032/fan_speed_set"}
+#####################MAC-Voltage-Adjustment-Parameters####################################
+
+
+####================================Adaption-Area================================
+#### PLATFORM_COMMON common configuration head
+#### "platform"    specific configuration head
+####
+PCA9548START = 11
+PCA9548BUSEND = 74
+
+PLATFORM_CARDID = 0x00004040
+
+FAN_PROTECT = {"bus": 0, "devno": 0x32, "addr": 0x19, "open": 0x00, "close": 0x0F}
+wb_eeprom = "2-0057/eeprom"
+E2_LOC = {"bus": 2, "devno": 0x57}
+E2_PROTECT = {"bus": 2, "devno": 0x33, "addr": 0xB0, "open": 0, "close": 1}
+MAC_LED_RESET = {"pcibus": 8, "slot": 0, "fn": 0, "bar": 0, "offset": 64, "reset": 0x98}
+
+INIT_PARAM = [
+    {"loc": "1-0034/sfp_enable", "value": "01"},
+    {"loc": "2-0035/sfp_enable2", "value": "ff"},
+    {"loc": "2-0033/mac_led", "value": "ff"},
+    {"loc": "1-0034/sfp_txdis1", "value": "00"},
+    {"loc": "1-0034/sfp_txdis2", "value": "00"},
+    {"loc": "1-0034/sfp_txdis3", "value": "00"},
+    {"loc": "1-0036/sfp_txdis4", "value": "00"},
+    {"loc": "1-0036/sfp_txdis5", "value": "00"},
+    {"loc": "1-0036/sfp_txdis6", "value": "00"},
+    {"loc": fanloc["location"], "value": "80"},
+]
+
+INIT_COMMAND = []
+
+CPLDVERSIONS = [
+    {"loc": "2-0033/cpld_version", "des": "MAC Board CPLDA"},
+    {"loc": "2-0035/cpld_version", "des": "MAC Board CPLDB"},
+    {"loc": "2-0037/cpld_version", "des": "CPU Board CPLD"},
+]
+
+## Driver List
+##
+
+DRIVERLISTS = []
+DEVICE = []
+
+#####################FRU-Info-Adaption#################################
+E2TYPE = {
+    "1": "tlveeprom",
+    "2": "x86cpueeprom",
+    "3": "bmceeprom",
+    "4": "cpueeprom",
+    "5": "maceeprom",
+    "6": "sloteeprom",
+    "7": "fanconnecteeprom",
+    "8": "M1HFANI-F",
+    "9": "M1HFANI-R",
+    "A": "M2HFANI-F",
+    "B": "M2HFANI-R",
+    "C": "psu",
+}
+FRULISTS = []
+################################Manufacturing-Test-Adaption-Area#######################################################
+#   need to export interface
+fanlevel_6510 = {
+    "level": [51, 150, 255],
+    "low_speed": [500, 7500, 17000],
+    "high_speed": [11000, 22500, 28500],
+}
+
+fanlevel_6520 = {
+    "level": [75, 150, 255],
+    "low_speed": [750, 4250, 6750],
+    "high_speed": [4500, 7500, 10000],
+}
+
+fanlevel = fanlevel_6520
+
+TEMPIDCHANGE = {
+    "lm75in": "inlet",
+    "lm75out": "outlet",
+    "lm75hot": "hot-point",
+    "inlet": "lm75in",
+    "outlet": "lm75out",
+    "hot-point": "lm75hot",
+}
+
+#   Manufacturing-Test module
+FACTESTMODULE = {}
+
+##################################Manufacturing-Test-Menu
+item1 = {"name": "Single Test", "deal": "test_signal", "childid": 1}
+test_sys_reload_item = {"name": "reset-system", "deal": "test_sys_reload"}
+
+test_sys_item = {"name": "Product information test", "deal": "test_sysinfo"}
+test_temp_item = {"name": "temperature test", "deal": "test_tempinfo"}
+test_mem_item = {"name": "Memory test", "deal": "test_cpumemoryinfo"}
+test_hd_item = {"name": "Hard disk test", "deal": "test_hard"}
+test_rtc_item = {"name": "RTC test ", "deal": "test_rtc"}
+test_i2c_item = {"name": "I2c test ", "deal": "test_i2c"}
+test_cpld_item = {"name": "CPLD test", "deal": "test_cpld"}
+test_portframe_item = {
+    "name": "Port transmit-receive frame test",
+    "deal": "test_portframe",
+}
+test_sysled_item = {"name": "System led test", "deal": "test_led"}
+test_fan_item = {"name": "Fan status test", "deal": "test_fan"}
+test_power_item = {"name": "PSU status test", "deal": "test_power"}
+test_usb_item = {"name": "USB test", "deal": "test_usb"}
+test_prbs_item = {"name": "PRBS test", "deal": "test_prbs"}
+test_portbroadcast_item = {"name": "Port broadcast", "deal": "test_portbroadcast"}
+
+test_debug_level = {"name": "Change debug level", "deal": "test_setdebug"}
+test_log_level = {"name": "Log output level", "deal": "test_loginfolevel"}
+test_setmac = {"name": "setmac", "deal": "test_setmac"}
+test_setrtc = {"name": "Set RTC", "deal": "test_set_rtc"}
+
+log_level_critical = {"name": "CRITICAL", "deal": "test_log_critical"}
+log_level_debug = {"name": "DEBUG", "deal": "test_log_debug"}
+log_level_error = {"name": "ERROR", "deal": "test_log_error"}
+log_level_info = {"name": "INFO", "deal": "test_log_info"}
+log_level_notset = {"name": "NOTSET", "deal": "test_log_notset"}
+log_level_warning = {"name": "WARNING", "deal": "test_log_warning"}
+
+
+test_e2_setmac_item = {"name": "E2SETMAC", "deal": "test_e2_setmac"}
+test_bmc_setmac_item = {"name": "BMCSETMAC", "deal": "test_bmc_setmac"}
+test_fan_setmac_item = {"name": "fan SETMAC", "deal": "test_fan_setmac"}
+
+alltest = [
+    test_sys_item,
+    test_temp_item,
+    test_mem_item,
+    test_hd_item,
+    test_rtc_item,
+    test_i2c_item,
+    test_cpld_item,
+    test_portframe_item,
+    test_sysled_item,
+    test_fan_item,
+    test_power_item,
+    test_usb_item,
+    test_prbs_item,
+    test_portbroadcast_item,
+]
+
+looptest = [
+    test_sys_item,
+    test_temp_item,
+    test_mem_item,
+    test_hd_item,
+    test_rtc_item,
+    test_i2c_item,
+    test_cpld_item,
+    test_portframe_item,
+    test_fan_item,
+    test_power_item,
+    test_usb_item,
+    test_prbs_item,
+    test_portbroadcast_item,
+]
+
+menuList = [
+    {
+        "menuid": 0,
+        "value": [
+            {"name": "Single test", "deal": "test_signal", "childid": 1},
+            {"name": "All test", "deal": "test_all"},
+            {"name": "Loop test", "deal": "test_loop"},
+            # {"name":"Check loop-test result", "deal" :"test_loop_read"},
+            # {"name":"Delete loop-test result", "deal" :"test_loop_delete"},
+            #           {"name":"Load configuration", "deal" :"test_config"},
+            test_sys_reload_item,
+            {"name": "System Configuration", "deal": "test_sysconfig", "childid": 2},
+        ],
+    },
+    {
+        "menuid": 1,
+        "parentid": 0,
+        "value": [
+            test_sys_item,
+            test_temp_item,
+            test_mem_item,
+            test_hd_item,
+            test_rtc_item,
+            test_i2c_item,
+            test_cpld_item,
+            test_portframe_item,
+            test_sysled_item,
+            test_fan_item,
+            test_power_item,
+            test_usb_item,
+            test_prbs_item,
+            test_portbroadcast_item,
+        ],
+    },
+    {
+        "menuid": 2,
+        "parentid": 0,
+        "value": [test_debug_level, test_log_level, test_setmac, test_setrtc,],
+    },
+    {
+        "menuid": 3,
+        "parentid": 2,
+        "value": [
+            log_level_critical,
+            log_level_debug,
+            log_level_error,
+            log_level_info,
+            log_level_notset,
+            log_level_warning,
+        ],
+    },
+    {
+        "menuid": 4,
+        "parentid": 2,
+        "value": [test_e2_setmac_item, test_bmc_setmac_item, test_fan_setmac_item,],
+    },
+]
+
+
+TESTCASE = {
+    "CPLD": [
+        {
+            "name": "CONNECT BOARD CPLD-A",
+            "cases": [
+                {"name": "cpld32", "cmd": "grtd_test.py  cpld_check 0 0x32 0xAA"},
+                {"name": "cpld37", "cmd": "grtd_test.py  cpld_check 2 0x37 0xAC"},
+            ],
+        },
+        {
+            "name": "MAC BOARD CPLD-A",
+            "cases": [
+                {"name": "cpld33", "cmd": "grtd_test.py  cpld_check 2 0x33 0xAB"},
+                {"name": "cpld34", "cmd": "grtd_test.py  cpld_check 1 0x34 0xAA"},
+            ],
+        },
+        {
+            "name": "MAC BOARD CPLD-B",
+            "cases": [
+                {"name": "cpld36", "cmd": "grtd_test.py  cpld_check 1 0x36 0xAA"},
+                {"name": "cpld35", "cmd": "grtd_test.py  cpld_check 2 0x35 0xAB"},
+            ],
+        },
+    ],
+    "TEMPERATURE": [
+        {
+            "name": "-->temperature test",
+            "cases": [
+                {
+                    "name": "inlet",
+                    "cmd": "grtd_test.py  temp 2-0048/hwmon/hwmon1/temp1_input",
+                },
+                {
+                    "name": "outlet",
+                    "cmd": "grtd_test.py  temp 2-0049/hwmon/hwmon2/temp1_input",
+                },
+                {
+                    "name": "hot-point",
+                    "cmd": "grtd_test.py  temp 2-004a/hwmon/hwmon3/temp1_input",
+                },
+            ],
+        }
+    ],
+    "MEMTORY": {
+        "cases": [
+            {"name": "->memory test 1M", "cmd": "memtester 1M 1"},
+            {"name": "->memory test 2M", "cmd": "memtester 2M 1"},
+            {"name": "->memory test 8M", "cmd": "memtester 8M 1"},
+            #           {"name":"->memory test 16M","cmd":"memtester 16M 1"},
+            #           {"name":"->memory test 256M","cmd":"memtester 256M 1"},
+        ]
+    },
+    "SMARTCTLCMDS": {
+        "cases": [
+            {"name": "->Check Hard Disk Info", "cmd": "smartctl -i /dev/sda"},
+            {"name": "->Check Hard Disk Monitor Status", "cmd": "smartctl -H /dev/sda"},
+        ]
+    },
+    "LED": [
+        {
+            "name": "Light Port Led test",
+            "cases": [
+                {
+                    "name": "-> Red Led Off",
+                    "cmd": "grtd_test.py  led loc 1-0034/sfp_led1_red,1-0034/sfp_led2_red,1-0034/sfp_led3_red,1-0034/sfp_led8_red,1-0036/sfp_led4_red,1-0036/sfp_led5_red,1-0036/sfp_led6_red,1-0036/sfp_led7_red 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00",
+                },
+                {
+                    "name": "-> Red Led On",
+                    "cmd": "grtd_test.py  led loc 1-0034/sfp_led1_red,1-0034/sfp_led2_red,1-0034/sfp_led3_red,1-0034/sfp_led8_red,1-0036/sfp_led4_red,1-0036/sfp_led5_red,1-0036/sfp_led6_red,1-0036/sfp_led7_red 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff",
+                },
+                {
+                    "name": "-> Recovery Red Led Off",
+                    "cmd": "grtd_test.py  led loc 1-0034/sfp_led1_red,1-0034/sfp_led2_red,1-0034/sfp_led3_red,1-0034/sfp_led8_red,1-0036/sfp_led4_red,1-0036/sfp_led5_red,1-0036/sfp_led6_red,1-0036/sfp_led7_red 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00",
+                },
+                {
+                    "name": "-> Yellow Led Off",
+                    "cmd": "grtd_test.py  led loc 1-0034/sfp_led1_yellow,1-0034/sfp_led2_yellow,1-0034/sfp_led3_yellow,1-0034/sfp_led8_yellow,1-0036/sfp_led4_yellow,1-0036/sfp_led5_yellow,1-0036/sfp_led6_yellow,1-0036/sfp_led7_yellow 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00",
+                },
+                {
+                    "name": "-> Yellow Led On",
+                    "cmd": "grtd_test.py  led loc 1-0034/sfp_led1_yellow,1-0034/sfp_led2_yellow,1-0034/sfp_led3_yellow,1-0034/sfp_led8_yellow,1-0036/sfp_led4_yellow,1-0036/sfp_led5_yellow,1-0036/sfp_led6_yellow,1-0036/sfp_led7_yellow 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff",
+                },
+                {
+                    "name": "-> Recovery Yellow Led Off",
+                    "cmd": "grtd_test.py  led loc 1-0034/sfp_led1_yellow,1-0034/sfp_led2_yellow,1-0034/sfp_led3_yellow,1-0034/sfp_led8_yellow,1-0036/sfp_led4_yellow,1-0036/sfp_led5_yellow,1-0036/sfp_led6_yellow,1-0036/sfp_led7_yellow 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00",
+                },
+            ],
+        },
+        {
+            "name": "fan 1 Led",
+            "cases": [
+                {
+                    "name": "-> LedOff",
+                    "cmd": "grtd_test.py  led loc 0-0032/fan0_led 0x0b",
+                },
+                {
+                    "name": "-> Red Led ",
+                    "cmd": "grtd_test.py  led loc 0-0032/fan0_led 0x0a",
+                },
+                {
+                    "name": "-> Green Led ",
+                    "cmd": "grtd_test.py  led loc 0-0032/fan0_led 0x09",
+                },
+                {
+                    "name": "-> Yellow Led ",
+                    "cmd": "grtd_test.py  led loc 0-0032/fan0_led 0x08",
+                },
+                {
+                    "name": "-> Red Led Flashing",
+                    "cmd": "grtd_test.py  led loc 0-0032/fan0_led 0x0e",
+                },
+                {
+                    "name": "-> Green Led Flashing",
+                    "cmd": "grtd_test.py  led loc 0-0032/fan0_led 0x0d",
+                },
+                {
+                    "name": "-> Yellow Led Flashing",
+                    "cmd": "grtd_test.py  led loc 0-0032/fan0_led 0x0c",
+                },
+                {
+                    "name": "-> Recovery Green Led ",
+                    "cmd": "grtd_test.py  led loc 0-0032/fan0_led 0x09",
+                },
+            ],
+        },
+        {
+            "name": "fan 2 Led",
+            "cases": [
+                {
+                    "name": "-> LedOff",
+                    "cmd": "grtd_test.py  led loc 0-0032/fan1_led 0x0b",
+                },
+                {
+                    "name": "-> Red Led ",
+                    "cmd": "grtd_test.py  led loc 0-0032/fan1_led 0x0a",
+                },
+                {
+                    "name": "-> Green Led ",
+                    "cmd": "grtd_test.py  led loc 0-0032/fan1_led 0x09",
+                },
+                {
+                    "name": "-> Yellow Led ",
+                    "cmd": "grtd_test.py  led loc 0-0032/fan1_led 0x08",
+                },
+                {
+                    "name": "-> Red Led Flashing",
+                    "cmd": "grtd_test.py  led loc 0-0032/fan1_led 0x0e",
+                },
+                {
+                    "name": "-> Green Led Flashing",
+                    "cmd": "grtd_test.py  led loc 0-0032/fan1_led 0x0d",
+                },
+                {
+                    "name": "-> Yellow Led Flashing",
+                    "cmd": "grtd_test.py  led loc 0-0032/fan1_led 0x0c",
+                },
+                {
+                    "name": "-> Recovery Green Led ",
+                    "cmd": "grtd_test.py  led loc 0-0032/fan1_led 0x09",
+                },
+            ],
+        },
+        {
+            "name": "fan 3 Led",
+            "cases": [
+                {
+                    "name": "-> LedOff",
+                    "cmd": "grtd_test.py  led loc 0-0032/fan2_led 0x0b",
+                },
+                {
+                    "name": "-> Red Led ",
+                    "cmd": "grtd_test.py  led loc 0-0032/fan2_led 0x0a",
+                },
+                {
+                    "name": "-> Green Led ",
+                    "cmd": "grtd_test.py  led loc 0-0032/fan2_led 0x09",
+                },
+                {
+                    "name": "-> Yellow Led ",
+                    "cmd": "grtd_test.py  led loc 0-0032/fan2_led 0x08",
+                },
+                {
+                    "name": "-> Red Led Flashing",
+                    "cmd": "grtd_test.py  led loc 0-0032/fan2_led 0x0e",
+                },
+                {
+                    "name": "-> Green Led Flashing",
+                    "cmd": "grtd_test.py  led loc 0-0032/fan2_led 0x0d",
+                },
+                {
+                    "name": "-> Yellow Led Flashing",
+                    "cmd": "grtd_test.py  led loc 0-0032/fan2_led 0x0c",
+                },
+                {
+                    "name": "-> Recovery Green Led ",
+                    "cmd": "grtd_test.py  led loc 0-0032/fan2_led 0x09",
+                },
+            ],
+        },
+        {
+            "name": "Front panel CPU Led",
+            "cases": [
+                {
+                    "name": "-> LedOff",
+                    "cmd": "grtd_test.py  led loc 2-0035/broad_front_cpu 0x00",
+                },
+                {
+                    "name": "-> Green Led not Flashing",
+                    "cmd": "grtd_test.py  led loc 2-0035/broad_front_cpu 0x01",
+                },
+                {
+                    "name": "-> Red Led not Flashing",
+                    "cmd": "grtd_test.py  led loc 2-0035/broad_front_cpu 0x02",
+                },
+                {
+                    "name": "-> Yellow Led not Flashing",
+                    "cmd": "grtd_test.py  led loc 2-0035/broad_front_cpu 0x03",
+                },
+                {
+                    "name": "-> Green Led 1/4sFlashing  ",
+                    "cmd": "grtd_test.py  led loc 2-0035/broad_front_cpu 0x11",
+                },
+                {
+                    "name": "-> Green Led 1/2sFlashing  ",
+                    "cmd": "grtd_test.py  led loc 2-0035/broad_front_cpu 0x21",
+                },
+                {
+                    "name": "-> Green Led 1sFlashing    ",
+                    "cmd": "grtd_test.py  led loc 2-0035/broad_front_cpu 0x41",
+                },
+                {
+                    "name": "-> Green Led 2sFlashing    ",
+                    "cmd": "grtd_test.py  led loc 2-0035/broad_front_cpu 0x81",
+                },
+                {
+                    "name": "-> Red Led 1/4sFlashing  ",
+                    "cmd": "grtd_test.py  led loc 2-0035/broad_front_cpu 0x12",
+                },
+                {
+                    "name": "-> Red Led 1/2sFlashing  ",
+                    "cmd": "grtd_test.py  led loc 2-0035/broad_front_cpu 0x22",
+                },
+                {
+                    "name": "-> Red Led 1sFlashing    ",
+                    "cmd": "grtd_test.py  led loc 2-0035/broad_front_cpu 0x42",
+                },
+                {
+                    "name": "-> Red Led 2sFlashing    ",
+                    "cmd": "grtd_test.py  led loc 2-0035/broad_front_cpu 0x82",
+                },
+                {
+                    "name": "-> Yellow Led 1/4sFlashing  ",
+                    "cmd": "grtd_test.py  led loc 2-0035/broad_front_cpu 0x13",
+                },
+                {
+                    "name": "-> Yellow Led 1/2sFlashing  ",
+                    "cmd": "grtd_test.py  led loc 2-0035/broad_front_cpu 0x23",
+                },
+                {
+                    "name": "-> Yellow Led 1sFlashing    ",
+                    "cmd": "grtd_test.py  led loc 2-0035/broad_front_cpu 0x43",
+                },
+                {
+                    "name": "-> Yellow Led 2sFlashing    ",
+                    "cmd": "grtd_test.py  led loc 2-0035/broad_front_cpu 0x83",
+                },
+                {
+                    "name": "-> Recovery Green Led ",
+                    "cmd": "grtd_test.py  led loc 2-0035/broad_front_cpu 0x01",
+                },
+            ],
+        },
+        {
+            "name": "Front panel BMC Led",
+            "cases": [
+                {
+                    "name": "-> LedOff",
+                    "cmd": "grtd_test.py  led loc 2-0035/broad_front_bmc 0x00",
+                },
+                {
+                    "name": "-> Red Led Flashing",
+                    "cmd": "grtd_test.py  led loc 2-0035/broad_front_bmc 0x01",
+                },
+                {
+                    "name": "-> Red Led not Flashing",
+                    "cmd": "grtd_test.py  led loc 2-0035/broad_front_bmc 0x02",
+                },
+                {
+                    "name": "-> Green Led Flashing",
+                    "cmd": "grtd_test.py  led loc 2-0035/broad_front_bmc 0x03",
+                },
+                {
+                    "name": "-> Green Led not Flashing",
+                    "cmd": "grtd_test.py  led loc 2-0035/broad_front_bmc 0x04",
+                },
+                {
+                    "name": "-> Yellow Led Flashing",
+                    "cmd": "grtd_test.py  led loc 2-0035/broad_front_bmc 0x05",
+                },
+                {
+                    "name": "-> Yellow Led not Flashing",
+                    "cmd": "grtd_test.py  led loc 2-0035/broad_front_bmc 0x06",
+                },
+                {
+                    "name": "-> Recovery Green Led ",
+                    "cmd": "grtd_test.py  led loc 2-0035/broad_front_bmc 0x04",
+                },
+            ],
+        },
+        {
+            "name": "Front panel location Led",
+            "cases": [
+                {
+                    "name": "-> LedOff",
+                    "cmd": "grtd_test.py  led loc 2-0035/broad_front_lct 0xff",
+                },
+                {
+                    "name": "-> LedOn",
+                    "cmd": "grtd_test.py  led loc 2-0035/broad_front_lct 0xfe",
+                },
+                {
+                    "name": "->Recovery LedOff",
+                    "cmd": "grtd_test.py  led loc 2-0035/broad_front_lct 0xff",
+                },
+            ],
+        },
+        {
+            "name": "Front panel pwr Led",
+            "cases": [
+                {
+                    "name": "-> LedOff",
+                    "cmd": "grtd_test.py  led loc 2-0035/broad_front_pwr 0x00",
+                },
+                {
+                    "name": "-> Red Led Flashing",
+                    "cmd": "grtd_test.py  led loc 2-0035/broad_front_pwr 0x01",
+                },
+                {
+                    "name": "-> Red Led not Flashing",
+                    "cmd": "grtd_test.py  led loc 2-0035/broad_front_pwr 0x02",
+                },
+                {
+                    "name": "-> Green Led Flashing",
+                    "cmd": "grtd_test.py  led loc 2-0035/broad_front_pwr 0x03",
+                },
+                {
+                    "name": "-> Green Led not Flashing",
+                    "cmd": "grtd_test.py  led loc 2-0035/broad_front_pwr 0x04",
+                },
+                {
+                    "name": "-> Yellow Led Flashing",
+                    "cmd": "grtd_test.py  led loc 2-0035/broad_front_pwr 0x05",
+                },
+                {
+                    "name": "-> Yellow Led not Flashing",
+                    "cmd": "grtd_test.py  led loc 2-0035/broad_front_pwr 0x06",
+                },
+                {
+                    "name": "-> Recovery Green Led ",
+                    "cmd": "grtd_test.py  led loc 2-0035/broad_front_pwr 0x04",
+                },
+            ],
+        },
+        {
+            "name": "Front panel fan Led",
+            "cases": [
+                {
+                    "name": "-> LedOff",
+                    "cmd": "grtd_test.py  led loc 2-0035/broad_front_fan 0x00",
+                },
+                {
+                    "name": "-> Red Led Flashing",
+                    "cmd": "grtd_test.py  led loc 2-0035/broad_front_fan 0x01",
+                },
+                {
+                    "name": "-> Red Led not Flashing",
+                    "cmd": "grtd_test.py  led loc 2-0035/broad_front_fan 0x02",
+                },
+                {
+                    "name": "-> Green Led Flashing",
+                    "cmd": "grtd_test.py  led loc 2-0035/broad_front_fan 0x03",
+                },
+                {
+                    "name": "-> Green Led not Flashing",
+                    "cmd": "grtd_test.py  led loc 2-0035/broad_front_fan 0x04",
+                },
+                {
+                    "name": "-> Yellow Led Flashing",
+                    "cmd": "grtd_test.py  led loc 2-0035/broad_front_fan 0x05",
+                },
+                {
+                    "name": "-> Yellow Led not Flashing",
+                    "cmd": "grtd_test.py  led loc 2-0035/broad_front_fan 0x06",
+                },
+                {
+                    "name": "-> Recovery Green Led ",
+                    "cmd": "grtd_test.py  led loc 2-0035/broad_front_fan 0x04",
+                },
+            ],
+        },
+    ],
+    "I2C": [
+        ####type 1 represents value obtained compated with value
+        ####type 2 represents return True or False
+        {
+            "name": "I2C device test",
+            "cases": [
+                {
+                    "name": " PCA9641 test",
+                    "cmd": "grtd_test.py  dev_rd  0 10 0",
+                    "deal_type": 2,
+                },
+                {
+                    "name": " cpld32 test",
+                    "cmd": "grtd_test.py  dev_rd  0 32 0",
+                    "deal_type": 2,
+                },
+                {
+                    "name": " cpld33 test",
+                    "cmd": "grtd_test.py  dev_rd  0 32 0",
+                    "deal_type": 2,
+                },
+                {
+                    "name": " cpld34 test",
+                    "cmd": "grtd_test.py  dev_rd  0 32 0",
+                    "deal_type": 2,
+                },
+                {
+                    "name": " cpld35 test",
+                    "cmd": "grtd_test.py  dev_rd  0 32 0",
+                    "deal_type": 2,
+                },
+                {
+                    "name": " cpld36 test",
+                    "cmd": "grtd_test.py  dev_rd  0 32 0",
+                    "deal_type": 2,
+                },
+                {
+                    "name": " cpld37 test",
+                    "cmd": "grtd_test.py  dev_rd  0 32 0",
+                    "deal_type": 2,
+                },
+                {
+                    "name": " inlet LM75",
+                    "cmd": "grtd_test.py  dev_rd  0 32 0",
+                    "deal_type": 2,
+                },
+                {
+                    "name": " outlet LM75",
+                    "cmd": "grtd_test.py  dev_rd  0 32 0",
+                    "deal_type": 2,
+                },
+                {
+                    "name": " hot-point LM75",
+                    "cmd": "grtd_test.py  dev_rd  0 32 0",
+                    "deal_type": 2,
+                },
+                {
+                    "name": " EEPROM",
+                    "cmd": "grtd_test.py  dev_rd  0 32 0",
+                    "deal_type": 2,
+                },
+                {
+                    "name": " Port 1",
+                    "cmd": "grtd_test.py  dev_rd  11 0050 0",
+                    "deal_type": 2,
+                },
+                {
+                    "name": " Port 2",
+                    "cmd": "grtd_test.py  dev_rd  12 0050 0",
+                    "deal_type": 2,
+                },
+                {
+                    "name": " Port 3",
+                    "cmd": "grtd_test.py  dev_rd  13 0050 0",
+                    "deal_type": 2,
+                },
+                {
+                    "name": " Port 4",
+                    "cmd": "grtd_test.py  dev_rd  14 0050 0",
+                    "deal_type": 2,
+                },
+                {
+                    "name": " Port 5",
+                    "cmd": "grtd_test.py  dev_rd  15 0050 0",
+                    "deal_type": 2,
+                },
+                {
+                    "name": " Port 6",
+                    "cmd": "grtd_test.py  dev_rd  16 0050 0",
+                    "deal_type": 2,
+                },
+                {
+                    "name": " Port 7",
+                    "cmd": "grtd_test.py  dev_rd  17 0050 0",
+                    "deal_type": 2,
+                },
+                {
+                    "name": " Port 8",
+                    "cmd": "grtd_test.py  dev_rd  18 0050 0",
+                    "deal_type": 2,
+                },
+                {
+                    "name": " Port 9",
+                    "cmd": "grtd_test.py  dev_rd  19 0050 0",
+                    "deal_type": 2,
+                },
+                {
+                    "name": " Port 10",
+                    "cmd": "grtd_test.py  dev_rd  20 0050 0",
+                    "deal_type": 2,
+                },
+                {
+                    "name": " Port 11",
+                    "cmd": "grtd_test.py  dev_rd  21 0050 0",
+                    "deal_type": 2,
+                },
+                {
+                    "name": " Port 12",
+                    "cmd": "grtd_test.py  dev_rd  22 0050 0",
+                    "deal_type": 2,
+                },
+                {
+                    "name": " Port 13",
+                    "cmd": "grtd_test.py  dev_rd  23 0050 0",
+                    "deal_type": 2,
+                },
+                {
+                    "name": " Port 14",
+                    "cmd": "grtd_test.py  dev_rd  24 0050 0",
+                    "deal_type": 2,
+                },
+                {
+                    "name": " Port 15",
+                    "cmd": "grtd_test.py  dev_rd  25 0050 0",
+                    "deal_type": 2,
+                },
+                {
+                    "name": " Port 16",
+                    "cmd": "grtd_test.py  dev_rd  26 0050 0",
+                    "deal_type": 2,
+                },
+                {
+                    "name": " Port 17",
+                    "cmd": "grtd_test.py  dev_rd  27 0050 0",
+                    "deal_type": 2,
+                },
+                {
+                    "name": " Port 18",
+                    "cmd": "grtd_test.py  dev_rd  28 0050 0",
+                    "deal_type": 2,
+                },
+                {
+                    "name": " Port 19",
+                    "cmd": "grtd_test.py  dev_rd  29 0050 0",
+                    "deal_type": 2,
+                },
+                {
+                    "name": " Port 20",
+                    "cmd": "grtd_test.py  dev_rd  30 0050 0",
+                    "deal_type": 2,
+                },
+                {
+                    "name": " Port 21",
+                    "cmd": "grtd_test.py  dev_rd  31 0050 0",
+                    "deal_type": 2,
+                },
+                {
+                    "name": " Port 22",
+                    "cmd": "grtd_test.py  dev_rd  32 0050 0",
+                    "deal_type": 2,
+                },
+                {
+                    "name": " Port 23",
+                    "cmd": "grtd_test.py  dev_rd  33 0050 0",
+                    "deal_type": 2,
+                },
+                {
+                    "name": " Port 24",
+                    "cmd": "grtd_test.py  dev_rd  34 0050 0",
+                    "deal_type": 2,
+                },
+                {
+                    "name": " Port 25",
+                    "cmd": "grtd_test.py  dev_rd  35 0050 0",
+                    "deal_type": 2,
+                },
+                {
+                    "name": " Port 26",
+                    "cmd": "grtd_test.py  dev_rd  36 0050 0",
+                    "deal_type": 2,
+                },
+                {
+                    "name": " Port 27",
+                    "cmd": "grtd_test.py  dev_rd  37 0050 0",
+                    "deal_type": 2,
+                },
+                {
+                    "name": " Port 28",
+                    "cmd": "grtd_test.py  dev_rd  38 0050 0",
+                    "deal_type": 2,
+                },
+                {
+                    "name": " Port 29",
+                    "cmd": "grtd_test.py  dev_rd  39 0050 0",
+                    "deal_type": 2,
+                },
+                {
+                    "name": " Port 30",
+                    "cmd": "grtd_test.py  dev_rd  40 0050 0",
+                    "deal_type": 2,
+                },
+                {
+                    "name": " Port 31",
+                    "cmd": "grtd_test.py  dev_rd  41 0050 0",
+                    "deal_type": 2,
+                },
+                {
+                    "name": " Port 32",
+                    "cmd": "grtd_test.py  dev_rd  42 0050 0",
+                    "deal_type": 2,
+                },
+                {
+                    "name": " Port 33",
+                    "cmd": "grtd_test.py  dev_rd  43 0050 0",
+                    "deal_type": 2,
+                },
+                {
+                    "name": " Port 34",
+                    "cmd": "grtd_test.py  dev_rd  44 0050 0",
+                    "deal_type": 2,
+                },
+                {
+                    "name": " Port 35",
+                    "cmd": "grtd_test.py  dev_rd  45 0050 0",
+                    "deal_type": 2,
+                },
+                {
+                    "name": " Port 36",
+                    "cmd": "grtd_test.py  dev_rd  46 0050 0",
+                    "deal_type": 2,
+                },
+                {
+                    "name": " Port 37",
+                    "cmd": "grtd_test.py  dev_rd  47 0050 0",
+                    "deal_type": 2,
+                },
+                {
+                    "name": " Port 38",
+                    "cmd": "grtd_test.py  dev_rd  48 0050 0",
+                    "deal_type": 2,
+                },
+                {
+                    "name": " Port 39",
+                    "cmd": "grtd_test.py  dev_rd  49 0050 0",
+                    "deal_type": 2,
+                },
+                {
+                    "name": " Port 40",
+                    "cmd": "grtd_test.py  dev_rd  50 0050 0",
+                    "deal_type": 2,
+                },
+                {
+                    "name": " Port 41",
+                    "cmd": "grtd_test.py  dev_rd  51 0050 0",
+                    "deal_type": 2,
+                },
+                {
+                    "name": " Port 42",
+                    "cmd": "grtd_test.py  dev_rd  52 0050 0",
+                    "deal_type": 2,
+                },
+                {
+                    "name": " Port 43",
+                    "cmd": "grtd_test.py  dev_rd  53 0050 0",
+                    "deal_type": 2,
+                },
+                {
+                    "name": " Port 44",
+                    "cmd": "grtd_test.py  dev_rd  54 0050 0",
+                    "deal_type": 2,
+                },
+                {
+                    "name": " Port 45",
+                    "cmd": "grtd_test.py  dev_rd  55 0050 0",
+                    "deal_type": 2,
+                },
+                {
+                    "name": " Port 46",
+                    "cmd": "grtd_test.py  dev_rd  56 0050 0",
+                    "deal_type": 2,
+                },
+                {
+                    "name": " Port 47",
+                    "cmd": "grtd_test.py  dev_rd  57 0050 0",
+                    "deal_type": 2,
+                },
+                {
+                    "name": " Port 48",
+                    "cmd": "grtd_test.py  dev_rd  58 0050 0",
+                    "deal_type": 2,
+                },
+                {
+                    "name": " Port 49",
+                    "cmd": "grtd_test.py  dev_rd  59 0050 0",
+                    "deal_type": 2,
+                },
+                {
+                    "name": " Port 50",
+                    "cmd": "grtd_test.py  dev_rd  60 0050 0",
+                    "deal_type": 2,
+                },
+                {
+                    "name": " Port 51",
+                    "cmd": "grtd_test.py  dev_rd  61 0050 0",
+                    "deal_type": 2,
+                },
+                {
+                    "name": " Port 52",
+                    "cmd": "grtd_test.py  dev_rd  62 0050 0",
+                    "deal_type": 2,
+                },
+                {
+                    "name": " Port 53",
+                    "cmd": "grtd_test.py  dev_rd  63 0050 0",
+                    "deal_type": 2,
+                },
+                {
+                    "name": " Port 54",
+                    "cmd": "grtd_test.py  dev_rd  64 0050 0",
+                    "deal_type": 2,
+                },
+                {
+                    "name": " Port 55",
+                    "cmd": "grtd_test.py  dev_rd  65 0050 0",
+                    "deal_type": 2,
+                },
+                {
+                    "name": " Port 56",
+                    "cmd": "grtd_test.py  dev_rd  66 0050 0",
+                    "deal_type": 2,
+                },
+                {
+                    "name": " Port 57",
+                    "cmd": "grtd_test.py  dev_rd  67 0050 0",
+                    "deal_type": 2,
+                },
+                {
+                    "name": " Port 58",
+                    "cmd": "grtd_test.py  dev_rd  68 0050 0",
+                    "deal_type": 2,
+                },
+                {
+                    "name": " Port 59",
+                    "cmd": "grtd_test.py  dev_rd  69 0050 0",
+                    "deal_type": 2,
+                },
+                {
+                    "name": " Port 60",
+                    "cmd": "grtd_test.py  dev_rd  70 0050 0",
+                    "deal_type": 2,
+                },
+                {
+                    "name": " Port 61",
+                    "cmd": "grtd_test.py  dev_rd  71 0050 0",
+                    "deal_type": 2,
+                },
+                {
+                    "name": " Port 62",
+                    "cmd": "grtd_test.py  dev_rd  72 0050 0",
+                    "deal_type": 2,
+                },
+                {
+                    "name": " Port 63",
+                    "cmd": "grtd_test.py  dev_rd  73 0050 0",
+                    "deal_type": 2,
+                },
+                {
+                    "name": " Port 64",
+                    "cmd": "grtd_test.py  dev_rd  74 0050 0",
+                    "deal_type": 2,
+                },
+            ],
+        },
+    ],
+}
+
+PCIe_DEV_LIST = []
+PCIe_SPEED_ITEM = []
+
+################################Manufacturing-Test-Adaption-Area#######################################################
diff --git a/platform/centec-arm64/sonic-platform-modules-micas/common/script/platform_config.py b/platform/centec-arm64/sonic-platform-modules-micas/common/script/platform_config.py
new file mode 100644
index 000000000..64ae8567c
--- /dev/null
+++ b/platform/centec-arm64/sonic-platform-modules-micas/common/script/platform_config.py
@@ -0,0 +1,196 @@
+#!/usr/bin/python3
+
+import sys
+import os
+from wbutil.baseutil import get_machine_info
+from wbutil.baseutil import get_platform_info
+
+__all__ = [
+    "getdeviceplatform",
+    "MONITOR_CONST",
+    "MAILBOX_DIR",
+    "DEVICE",
+    "GLOBALCONFIG",
+    "GLOBALINITPARAM",
+    "GLOBALINITCOMMAND",
+    "MAC_LED_RESET",
+    "STARTMODULE",
+    "fanloc",
+    "PLATFORM_CARDID",
+    "PLATFORM_PRODUCTNAME",
+    "PLATFORM_PART_NUMBER",
+    "PLATFORM_LABEL_REVISION",
+    "PLATFORM_MAC_SIZE",
+    "PLATFORM_MANUF_NAME",
+    "PLATFORM_MANUF_COUNTRY",
+    "PLATFORM_VENDOR_NAME",
+    "PLATFORM_DIAG_VERSION",
+    "PLATFORM_SERVICE_TAG",
+    "E2_PROTECT",
+    "E2_LOC",
+    "FAN_PROTECT",
+    "FANS_DEF",
+    "MONITOR_FANS_LED",
+    "MONITOR_SYS_FAN_LED",
+    "MONITOR_SYS_PSU_LED",
+    "MONITOR_FAN_STATUS",
+    "MONITOR_PSU_STATUS",
+    "MONITOR_DEV_STATUS",
+    "MONITOR_DEV_STATUS_DECODE",
+    "DEV_LEDS",
+    "MAC_AVS_PARAM",
+    "MAC_DEFAULT_PARAM",
+    "FRULISTS",
+    "wb_eeprom",
+    "i2ccheck_params",
+    "FANCTROLDEBUG",
+    "DEVMONITORDEBUG",
+]
+
+
+def getdeviceplatform():
+    x = get_platform_info(get_machine_info())
+    if x != None:
+        filepath = "/usr/share/sonic/device/" + x
+        return filepath
+    return None
+
+
+platform = get_platform_info(get_machine_info())
+platformpath = getdeviceplatform()
+MAILBOX_DIR = "/sys/bus/i2c/devices/"
+grtd_productfile = (platform + "_config").replace("-", "_")
+common_productfile = "platform_common"
+configfile_pre = "/usr/local/bin/"
+
+sys.path.append(platformpath)
+sys.path.append(configfile_pre)
+
+############################################################################################
+##  if there is no specific file, use common file
+module_product = None
+if os.path.exists(configfile_pre + grtd_productfile + ".py"):
+    module_product = __import__(grtd_productfile, globals(), locals(), [], 0)
+elif os.path.exists(configfile_pre + common_productfile + ".py"):
+    module_product = __import__(common_productfile, globals(), locals(), [], 0)
+else:
+    print("No Configuration existed, quit")
+    exit(-1)
+############################################################################################
+
+DEVICE = module_product.DEVICE
+
+##########Driver loading needs parameters
+# get different product configuration
+PLATFORM_GLOBALCONFIG = {
+    "DRIVERLISTS": module_product.DRIVERLISTS,
+    "QSFP": {
+        "startbus": module_product.PCA9548START,
+        "endbus": module_product.PCA9548BUSEND,
+    },
+    "DEVS": DEVICE,
+}
+GLOBALCONFIG = PLATFORM_GLOBALCONFIG
+GLOBALINITPARAM = module_product.INIT_PARAM
+GLOBALINITCOMMAND = module_product.INIT_COMMAND
+
+fancontrol_loc = module_product.fancontrol_loc
+fancontrol_config_loc = module_product.fancontrol_config_loc
+MAC_LED_RESET = module_product.MAC_LED_RESET
+###########Stat-up module parameters
+STARTMODULE = module_product.STARTMODULE
+FIRMWARE_TOOLS = module_product.FIRMWARE_TOOLS
+
+
+##########Manufacturing-Test need parameters
+FACTESTMODULE = module_product.FACTESTMODULE
+TESTCASE = module_product.TESTCASE
+menuList = module_product.menuList
+alltest = module_product.alltest
+looptest = module_product.looptest
+fanloc = module_product.fanloc
+fanlevel = module_product.fanlevel  # fan adjustment level
+TEMPIDCHANGE = module_product.TEMPIDCHANGE
+CPLDVERSIONS = module_product.CPLDVERSIONS
+PLATFORM_CARDID = module_product.PLATFORM_CARDID
+PLATFORM_PRODUCTNAME = module_product.PLATFORM_PRODUCTNAME
+
+PLATFORM_PART_NUMBER = module_product.PLATFORM_PART_NUMBER
+PLATFORM_LABEL_REVISION = module_product.PLATFORM_LABEL_REVISION
+PLATFORM_ONIE_VERSION = module_product.PLATFORM_ONIE_VERSION
+PLATFORM_MAC_SIZE = module_product.PLATFORM_MAC_SIZE
+PLATFORM_MANUF_NAME = module_product.PLATFORM_MANUF_NAME
+PLATFORM_MANUF_COUNTRY = module_product.PLATFORM_MANUF_COUNTRY
+PLATFORM_VENDOR_NAME = module_product.PLATFORM_VENDOR_NAME
+PLATFORM_DIAG_VERSION = module_product.PLATFORM_DIAG_VERSION
+PLATFORM_SERVICE_TAG = module_product.PLATFORM_SERVICE_TAG
+
+E2_PROTECT = module_product.E2_PROTECT
+E2_LOC = module_product.E2_LOC
+FAN_PROTECT = module_product.FAN_PROTECT
+
+FANS_DEF = module_product.FANS_DEF
+MONITOR_SYS_LED = module_product.MONITOR_SYS_LED
+MONITOR_FANS_LED = module_product.MONITOR_FANS_LED
+MONITOR_SYS_FAN_LED = module_product.MONITOR_SYS_FAN_LED
+MONITOR_SYS_PSU_LED = module_product.MONITOR_SYS_PSU_LED
+MONITOR_FAN_STATUS = module_product.MONITOR_FAN_STATUS
+MONITOR_PSU_STATUS = module_product.MONITOR_PSU_STATUS
+MONITOR_DEV_STATUS = module_product.MONITOR_DEV_STATUS
+MONITOR_DEV_STATUS_DECODE = module_product.MONITOR_DEV_STATUS_DECODE
+DEV_MONITOR_PARAM = module_product.DEV_MONITOR_PARAM
+SLOT_MONITOR_PARAM = module_product.SLOT_MONITOR_PARAM
+
+
+DEV_LEDS = module_product.DEV_LEDS
+MEM_SLOTS = module_product.MEM_SLOTS
+
+MAC_AVS_PARAM = module_product.MAC_AVS_PARAM
+MAC_DEFAULT_PARAM = module_product.MAC_DEFAULT_PARAM
+E2TYPE = module_product.E2TYPE
+FRULISTS = module_product.FRULISTS
+wb_eeprom = "%d-%04x/eeprom" % (E2_LOC["bus"], E2_LOC["devno"])
+factest_module = module_product.factest_module
+
+LOCAL_LED_CONTROL = module_product.LOCAL_LED_CONTROL
+
+PCIe_DEV_LIST = module_product.PCIe_DEV_LIST
+PCIe_SPEED_ITEM = module_product.PCIe_SPEED_ITEM
+i2ccheck_params = module_product.i2ccheck_params
+
+
+class MONITOR_CONST:
+    TEMP_MIN = module_product.MONITOR_TEMP_MIN
+    K = module_product.MONITOR_K
+    MAC_IN = module_product.MONITOR_MAC_IN
+    DEFAULT_SPEED = module_product.MONITOR_DEFAULT_SPEED
+    MAX_SPEED = module_product.MONITOR_MAX_SPEED
+    MIN_SPEED = module_product.MONITOR_MIN_SPEED
+    MAC_ERROR_SPEED = module_product.MONITOR_MAC_ERROR_SPEED
+    FAN_TOTAL_NUM = module_product.MONITOR_FAN_TOTAL_NUM
+    MAC_UP_TEMP = module_product.MONITOR_MAC_UP_TEMP
+    MAC_LOWER_TEMP = module_product.MONITOR_MAC_LOWER_TEMP
+    MAC_MAX_TEMP = module_product.MONITOR_MAC_MAX_TEMP
+
+    MAC_WARNING_THRESHOLD = module_product.MONITOR_MAC_WARNING_THRESHOLD
+    OUTTEMP_WARNING_THRESHOLD = module_product.MONITOR_OUTTEMP_WARNING_THRESHOLD
+    BOARDTEMP_WARNING_THRESHOLD = module_product.MONITOR_BOARDTEMP_WARNING_THRESHOLD
+    CPUTEMP_WARNING_THRESHOLD = module_product.MONITOR_CPUTEMP_WARNING_THRESHOLD
+    INTEMP_WARNING_THRESHOLD = module_product.MONITOR_INTEMP_WARNING_THRESHOLD
+
+    MAC_CRITICAL_THRESHOLD = module_product.MONITOR_MAC_CRITICAL_THRESHOLD
+    OUTTEMP_CRITICAL_THRESHOLD = module_product.MONITOR_OUTTEMP_CRITICAL_THRESHOLD
+    BOARDTEMP_CRITICAL_THRESHOLD = module_product.MONITOR_BOARDTEMP_CRITICAL_THRESHOLD
+    CPUTEMP_CRITICAL_THRESHOLD = module_product.MONITOR_CPUTEMP_CRITICAL_THRESHOLD
+    INTEMP_CRITICAL_THRESHOLD = module_product.MONITOR_INTEMP_CRITICAL_THRESHOLD
+    CRITICAL_NUM = module_product.MONITOR_CRITICAL_NUM
+    SHAKE_TIME = module_product.MONITOR_SHAKE_TIME
+    MONITOR_INTERVAL = module_product.MONITOR_INTERVAL
+    MONITOR_FALL_TEMP = module_product.MONITOR_FALL_TEMP
+
+    MONITOR_MAC_SOURCE_SYSFS = module_product.MONITOR_MAC_SOURCE_SYSFS
+    MONITOR_MAC_SOURCE_PATH = module_product.MONITOR_MAC_SOURCE_PATH
+
+
+FANCTROLDEBUG = 0  # 1 means enable
+DEVMONITORDEBUG = 0  # 1 means enable
diff --git a/platform/centec-arm64/sonic-platform-modules-micas/common/script/platform_sensors.py b/platform/centec-arm64/sonic-platform-modules-micas/common/script/platform_sensors.py
new file mode 100644
index 000000000..9f8a7b466
--- /dev/null
+++ b/platform/centec-arm64/sonic-platform-modules-micas/common/script/platform_sensors.py
@@ -0,0 +1,92 @@
+#!/usr/bin/python3
+#   * onboard  sensors
+#
+import os
+import sys
+from sonic_platform.redfish_api import Redfish_Api
+
+def get_machine_info():
+    if not os.path.isfile('/host/machine.conf'):
+        return None
+    machine_vars = {}
+    with open('/host/machine.conf') as machine_file:
+        for line in machine_file:
+            tokens = line.split('=')
+            if len(tokens) < 2:
+                continue
+            machine_vars[tokens[0]] = tokens[1].strip()
+    return machine_vars
+
+def get_platform_info(machine_info):
+    if machine_info is not None:
+        if 'onie_platform' in machine_info:
+            return machine_info['onie_platform']
+        elif 'aboot_platform' in machine_info:
+            return machine_info['aboot_platform']
+    return None
+
+PLATFORM_ROOT_PATH = '/usr/share/sonic/device'
+platform = None
+
+def get_platform_name():
+    global platform
+    platform = get_platform_info(get_machine_info())
+    return platform
+
+val = get_platform_name()
+sys.path.append("/".join([PLATFORM_ROOT_PATH, platform]))
+
+def print_console(str):
+    print(str)
+
+def print_platform():
+    platform_info = get_platform_name()
+    print_console(platform_info)
+    print_console('Adapter: Platform Management Controller')
+    print_console("")
+
+def get_sensor():
+    sensor = Redfish_Api().get_thresholdSensors()
+    ctrl = sensor["Sensors"]
+    list_sensor =[]
+    for item in ctrl:
+        name = item.get("@odata.id").split("/",9)[9]
+        now = item.get("Reading")
+        min = item.get("Thresholds").get("LowerFatal").get("Reading")
+        max = item.get("Thresholds").get("UpperFatal").get("Reading")
+        unit = item.get("ReadingUnits")
+        if unit == "Amps":
+            unit = "A"
+            if min == (-1000):
+                min = (min/1000)
+        elif unit == "Volts":
+            unit = "V"
+        tmp = {}
+        tmp["name"]= name
+        tmp["now"] = ("%.3f" % now)
+        tmp["min"] = ("%.3f" % min)
+        tmp["max"] = ("%.3f" % max)
+        tmp["unit"] = unit
+        list_sensor.append(tmp)
+    return list_sensor
+
+def print_boarddcdc():
+    val_ret = get_sensor()
+    print_info_str = ""
+    toptile = "Onboard Sensors:"
+    errformat = "    {id:<26} : {errmsg}"
+    formatstr = "    {name:<26} : {now:<6} {unit:<1}  (Min = {min:<6} {unit:<1} , Max = {max:<6} {unit:<1} )"
+
+    if len(val_ret) != 0:
+        print_info_str += toptile + '\n'
+        for item in val_ret:
+            realformat = formatstr if item.get('errcode', 0) == 0 else errformat
+            print_info_str += realformat.format(**item) + '\n'
+        print_console(print_info_str)
+
+def getsensors():
+    print_platform()
+    print_boarddcdc()
+
+if __name__ == "__main__":
+    getsensors()
diff --git a/platform/centec-arm64/sonic-platform-modules-micas/common/script/platform_util.py b/platform/centec-arm64/sonic-platform-modules-micas/common/script/platform_util.py
new file mode 100644
index 000000000..68a2fd2f5
--- /dev/null
+++ b/platform/centec-arm64/sonic-platform-modules-micas/common/script/platform_util.py
@@ -0,0 +1,1934 @@
+#!/usr/bin/python3
+
+import sys
+
+if sys.version_info >= (3, 0):
+    import subprocess as commands
+else:
+    import commands
+import os
+import re
+import syslog
+import time
+import binascii
+import tty
+import termios
+import threading
+import click
+import mmap
+from platform_config import (
+    wb_eeprom,
+    FRULISTS,
+    MAC_DEFAULT_PARAM,
+    MAC_AVS_PARAM,
+    FANS_DEF,
+    FAN_PROTECT,
+    E2_LOC,
+    E2_PROTECT,
+    PLATFORM_SERVICE_TAG,
+    PLATFORM_DIAG_VERSION,
+    STARTMODULE,
+    PLATFORM_CARDID,
+    PLATFORM_PRODUCTNAME,
+    PLATFORM_PART_NUMBER,
+    PLATFORM_LABEL_REVISION,
+    PLATFORM_MAC_SIZE,
+    PLATFORM_MANUF_NAME,
+    PLATFORM_MANUF_COUNTRY,
+    PLATFORM_VENDOR_NAME,
+    MAILBOX_DIR,
+)
+
+try:
+    from eepromutil.fru import ipmifru
+except Exception or SystemExit:
+    print("error")
+
+import logging.handlers
+import shutil
+import gzip
+import glob
+
+__all__ = [
+    "MENUID",
+    "MENUPARENT",
+    "MENUVALUE",
+    "CHILDID",
+    "MENUITEMNAME",
+    "MENUITEMDEAL",
+    "GOBACK",
+    "GOQUIT",
+    "file_name",
+    "CRITICAL",
+    "FATAL",
+    "ERROR",
+    "WARNING",
+    "WARN",
+    "INFO",
+    "DEBUG",
+    "NOTSET",
+    "levelNames",
+    "TLV_INFO_ID_STRING",
+    "TLV_INFO_VERSION",
+    "TLV_INFO_LENGTH",
+    "TLV_INFO_LENGTH_VALUE",
+    "TLV_CODE_PRODUCT_NAME",
+    "TLV_CODE_PART_NUMBER",
+    "TLV_CODE_SERIAL_NUMBER",
+    "TLV_CODE_MAC_BASE",
+    "TLV_CODE_MANUF_DATE",
+    "TLV_CODE_DEVICE_VERSION",
+    "TLV_CODE_LABEL_REVISION",
+    "TLV_CODE_PLATFORM_NAME",
+    "TLV_CODE_ONIE_VERSION",
+    "TLV_CODE_MAC_SIZE",
+    "TLV_CODE_MANUF_NAME",
+    "TLV_CODE_MANUF_COUNTRY",
+    "TLV_CODE_VENDOR_NAME",
+    "TLV_CODE_DIAG_VERSION",
+    "TLV_CODE_SERVICE_TAG",
+    "TLV_CODE_VENDOR_EXT",
+    "TLV_CODE_CRC_32",
+    "_TLV_DISPLAY_VENDOR_EXT",
+    "TLV_CODE_CARID",
+    "_TLV_INFO_HDR_LEN",
+    "SYSLOG_IDENTIFIER",
+    "log_info",
+    "log_debug",
+    "log_warning",
+    "log_error",
+    "CompressedRotatingFileHandler",
+    "SETMACException",
+    "checkinput",
+    "checkinputproduct",
+    "getInputSetmac",
+    "fan_tlv",
+    "AVSUTIL",
+    "I2CUTIL",
+    "BMC",
+    "getSdkReg",
+    "getfilevalue",
+    "get_sysfs_value",
+    "write_sysfs_value",
+    "PRINTERR",
+    "strtoint",
+    "inttostr",
+    "str_to_hex",
+    "hex_to_str",
+    "str_to_bin",
+    "bin_to_str",
+    "get_mac_temp",
+    "get_mac_temp_sysfs",
+    "restartDockerService",
+    "wait_dhcp",
+    "wait_sdk",
+    "wait_docker",
+    "getTLV_BODY",
+    "_crc32",
+    "printvalue",
+    "generate_value",
+    "getsyseeprombyId",
+    "fac_init_cardidcheck",
+    "isValidMac",
+    "util_setmac",
+    "getInputCheck",
+    "getrawch",
+    "upper_input",
+    "astrcmp",
+    "generate_ext",
+    "wbi2cget",
+    "wbi2cset",
+    "wbpcird",
+    "wbpciwr",
+    "wbsysset",
+    "wbi2cget_word",
+    "wbi2cset_word",
+    "fan_setmac",
+    "checkfansninput",
+    "checkfanhwinput",
+    "util_show_fanse2",
+    "get_fane2_sysfs",
+    "util_show_fane2",
+    "getPid",
+    "fac_fans_setmac_tlv",
+    "fac_fan_setmac_fru",
+    "fac_fans_setmac",
+    "fac_fan_setmac",
+    "writeToEEprom",
+    "get_local_eth0_mac",
+    "getonieversion",
+    "createbmcMac",
+    "ipmi_set_mac",
+    "getInputValue",
+    "bmc_setmac",
+    "closeProtocol",
+    "checkSdkMem",
+    "getch",
+    "get_raw_input",
+    "getsysvalue",
+    "get_pmc_register",
+    "decoder",
+    "decode_eeprom",
+    "get_sys_eeprom",
+    "getCardId",
+    "getsysmeminfo",
+    "getsysmeminfo_detail",
+    "getDmiSysByType",
+    "gethwsys",
+    "getsysbios",
+    "searchDirByName",
+    "getUsbLocation",
+    "getusbinfo",
+    "get_cpu_info",
+    "io_rd",
+    "io_wr",
+]
+
+MENUID = "menuid"
+MENUPARENT = "parentid"
+MENUVALUE = "value"
+CHILDID = "childid"
+MENUITEMNAME = "name"
+MENUITEMDEAL = "deal"
+GOBACK = "goBack"
+GOQUIT = "quit"
+
+file_name = "/etc/init.d/opennsl-modules-3.16.0-5-amd64"
+##########################################################################
+# ERROR LOG LEVEL
+##########################################################################
+CRITICAL = 50
+FATAL = CRITICAL
+ERROR = 40
+WARNING = 30
+WARN = WARNING
+INFO = 20
+DEBUG = 10
+NOTSET = 0
+
+levelNames = {
+    CRITICAL: "CRITICAL",
+    ERROR: "ERROR",
+    WARNING: "WARNING",
+    INFO: "INFO",
+    DEBUG: "DEBUG",
+    NOTSET: "NOTSET",
+    "CRITICAL": CRITICAL,
+    "ERROR": ERROR,
+    "WARN": WARNING,
+    "WARNING": WARNING,
+    "INFO": INFO,
+    "DEBUG": DEBUG,
+    "NOTSET": NOTSET,
+}
+
+TLV_INFO_ID_STRING = "TlvInfo\x00"
+TLV_INFO_VERSION = 0x01
+TLV_INFO_LENGTH = 0x00
+TLV_INFO_LENGTH_VALUE = 0xBA
+
+##########################################################################
+# eeprom info
+##########################################################################
+TLV_CODE_PRODUCT_NAME = 0x21
+TLV_CODE_PART_NUMBER = 0x22
+TLV_CODE_SERIAL_NUMBER = 0x23
+TLV_CODE_MAC_BASE = 0x24
+TLV_CODE_MANUF_DATE = 0x25
+TLV_CODE_DEVICE_VERSION = 0x26
+TLV_CODE_LABEL_REVISION = 0x27
+TLV_CODE_PLATFORM_NAME = 0x28
+TLV_CODE_ONIE_VERSION = 0x29
+TLV_CODE_MAC_SIZE = 0x2A
+TLV_CODE_MANUF_NAME = 0x2B
+TLV_CODE_MANUF_COUNTRY = 0x2C
+TLV_CODE_VENDOR_NAME = 0x2D
+TLV_CODE_DIAG_VERSION = 0x2E
+TLV_CODE_SERVICE_TAG = 0x2F
+TLV_CODE_VENDOR_EXT = 0xFD
+TLV_CODE_CRC_32 = 0xFE
+_TLV_DISPLAY_VENDOR_EXT = 1
+TLV_CODE_CARID = 0x01
+_TLV_INFO_HDR_LEN = 11
+
+
+SYSLOG_IDENTIFIER = "UTILTOOL"
+
+# ========================== Syslog wrappers ==========================
+
+
+def log_info(msg, also_print_to_console=False):
+    syslog.openlog(SYSLOG_IDENTIFIER)
+    syslog.syslog(syslog.LOG_INFO, msg)
+    syslog.closelog()
+
+    if also_print_to_console:
+        click.echo(msg)
+
+
+def log_debug(msg, also_print_to_console=False):
+    try:
+        syslog.openlog(SYSLOG_IDENTIFIER)
+        syslog.syslog(syslog.LOG_DEBUG, msg)
+        syslog.closelog()
+
+        if also_print_to_console:
+            click.echo(msg)
+    except Exception as e:
+        print(str(e))
+
+
+def log_warning(msg, also_print_to_console=False):
+    syslog.openlog(SYSLOG_IDENTIFIER)
+    syslog.syslog(syslog.LOG_WARNING, msg)
+    syslog.closelog()
+
+    if also_print_to_console:
+        click.echo(msg)
+
+
+def log_error(msg, also_print_to_console=False):
+    syslog.openlog(SYSLOG_IDENTIFIER)
+    syslog.syslog(syslog.LOG_ERR, msg)
+    syslog.closelog()
+
+    if also_print_to_console:
+        click.echo(msg)
+
+
+class CompressedRotatingFileHandler(logging.handlers.RotatingFileHandler):
+    def doRollover(self):
+        """
+        Do a rollover, as described in __init__().
+        """
+        if self.stream:
+            self.stream.close()
+            self.stream = None
+        if self.backupCount > 0:
+            for i in range(self.backupCount - 1, 0, -1):
+                sfn = "%s.%d.gz" % (self.baseFilename, i)
+                dfn = "%s.%d.gz" % (self.baseFilename, i + 1)
+                if os.path.exists(sfn):
+                    if os.path.exists(dfn):
+                        os.remove(dfn)
+                    os.rename(sfn, dfn)
+            dfn = self.baseFilename + ".1.gz"
+            if os.path.exists(dfn):
+                os.remove(dfn)
+            # These two lines below are the only new lines. I commented out the os.rename(self.baseFilename, dfn) and
+            #  replaced it with these two lines.
+            with open(self.baseFilename, "rb") as f_in, gzip.open(dfn, "wb") as f_out:
+                shutil.copyfileobj(f_in, f_out)
+        self.mode = "w"
+        self.stream = self._open()
+
+
+class SETMACException(Exception):
+    def __init__(self, param="ERROR", errno="-1"):
+        err = "Setmac fail[%s]: %s" % (errno, param)
+        Exception.__init__(self, err)
+        self.param = param
+        self.errno = errno
+
+
+def checkinput(b):
+    if b.isdigit() == False:
+        raise Exception("Ivalid Number")
+    if int(b) > 0xFF or int(b) < 0:
+        raise Exception("Out of area")
+
+
+def checkinputproduct(b):
+    if b.isalnum() == False:
+        raise Exception("Invalid string")
+
+
+def getInputSetmac(val):
+    bia = val.boardInfoArea
+    pia = val.productInfoArea
+    if bia != None:
+        a = raw_input("[Board Card]Product Serial Number:")
+        if len(a) != 13:
+            raise Exception("Invalid Serial Number length")
+        checkinputproduct(a)
+        bia.boardSerialNumber = a
+        b = raw_input("[Board Card]Product Version:(from 1-255)")
+        checkinput(b)
+        b = "%0x" % int(b)
+        bia.boardextra1 = b.upper()
+    if pia != None:
+        a = raw_input("[Product Area]Product Serial Number:")
+        if len(a) != 13:
+            raise Exception("Invalid Serial Number")
+        checkinputproduct(a)
+        pia.productSerialNumber = a
+        b = raw_input("[Product Area]Product Version:(from 1-255)")
+        checkinput(b)
+        b = "%0x" % int(b)
+        pia.productVersion = b.upper()
+    return val
+
+
+class fan_tlv(object):
+    VERSION = 0x01  # E2PROM Version, start from 0x01
+    FLAG = 0x7E     # New E2PROM version flag is 0x7E
+    HW_VER = 0x01   # compose by master version and fixed version
+    TYPE = 0xF1     # hw type defination
+    TLV_LEN = 00    # data length (16bit)
+    _FAN_TLV_HDR_LEN = 6
+    _FAN_TLV_CRC_LEN = 2
+
+    _FAN_TLV_TYPE_NAME = 0x02
+    _FAN_TLV_TYPE_SN = 0x03
+    _FAN_TLV_TYPE_HW_INFO = 0x05
+    _FAN_TLV_TYPE_DEV_TYPE = 0x06
+
+    _fandecodetime = 0
+
+    @property
+    def dstatus(self):
+        return self._dstatus
+
+    @property
+    def typename(self):
+        return self._typename
+
+    @property
+    def typesn(self):
+        return self._typesn
+
+    @property
+    def typehwinfo(self):
+        return self._typehwinfo
+
+    @property
+    def typedevtype(self):
+        return self._typedevtype
+
+    @property
+    def fanbus(self):
+        return self._fanbus
+
+    @property
+    def fanloc(self):
+        return self._fanloc
+
+    @property
+    def fandecodetime(self):
+        return self._fandecodetime
+
+    def __init__(self):
+        self._typename = ""
+        self._typesn = ""
+        self._typehwinfo = ""
+        self._typedevtype = ""
+        self._dstatus = 0
+
+    def strtoarr(self, str):
+        s = []
+        if str is not None:
+            for index in range(len(str)):
+                s.append(str[index])
+        return s
+
+    def generate_fan_value(self):
+        bin_buffer = [chr(0xFF)] * 256
+        bin_buffer[0] = chr(self.VERSION)
+        bin_buffer[1] = chr(self.FLAG)
+        bin_buffer[2] = chr(self.HW_VER)
+        bin_buffer[3] = chr(self.TYPE)
+
+        temp_t = "%08x" % self.typedevtype  # handle devtype first
+        typedevtype_t = hex_to_str(temp_t)
+        total_len = (
+            len(self.typename)
+            + len(self.typesn)
+            + len(self.typehwinfo)
+            + len(typedevtype_t)
+            + 8
+        )
+
+        bin_buffer[4] = chr(total_len >> 8)
+        bin_buffer[5] = chr(total_len & 0x00FF)
+
+        index_start = 6
+        bin_buffer[index_start] = chr(self._FAN_TLV_TYPE_NAME)
+        bin_buffer[index_start + 1] = chr(len(self.typename))
+        bin_buffer[
+            index_start + 2 : index_start + 2 + len(self.typename)
+        ] = self.strtoarr(self.typename)
+        index_start = index_start + 2 + len(self.typename)
+
+        bin_buffer[index_start] = chr(self._FAN_TLV_TYPE_SN)
+        bin_buffer[index_start + 1] = chr(len(self.typesn))
+        bin_buffer[
+            index_start + 2 : index_start + 2 + len(self.typesn)
+        ] = self.strtoarr(self.typesn)
+        index_start = index_start + 2 + len(self.typesn)
+
+        bin_buffer[index_start] = chr(self._FAN_TLV_TYPE_HW_INFO)
+        bin_buffer[index_start + 1] = chr(len(self.typehwinfo))
+        bin_buffer[
+            index_start + 2 : index_start + 2 + len(self.typehwinfo)
+        ] = self.strtoarr(self.typehwinfo)
+        index_start = index_start + 2 + len(self.typehwinfo)
+
+        bin_buffer[index_start] = chr(self._FAN_TLV_TYPE_DEV_TYPE)
+        bin_buffer[index_start + 1] = chr(len(typedevtype_t))
+        bin_buffer[
+            index_start + 2 : index_start + 2 + len(typedevtype_t)
+        ] = self.strtoarr(typedevtype_t)
+        index_start = index_start + 2 + len(typedevtype_t)
+
+        crcs = fan_tlv.fancrc("".join(bin_buffer[0:index_start]))  # check 2bytes
+        bin_buffer[index_start] = chr(crcs >> 8)
+        bin_buffer[index_start + 1] = chr(crcs & 0x00FF)
+        return bin_buffer
+
+    def decode(self, e2):
+        ret = []
+        self.VERSION = ord(e2[0])
+        self.FLAG = ord(e2[1])
+        self.HW_VER = ord(e2[2])
+        self.TYPE = ord(e2[3])
+        self.TLV_LEN = (ord(e2[4]) << 8) | ord(e2[5])
+
+        tlv_index = self._FAN_TLV_HDR_LEN
+        tlv_end = self._FAN_TLV_HDR_LEN + self.TLV_LEN
+
+        # check checksum
+        if len(e2) < self._FAN_TLV_HDR_LEN + self.TLV_LEN + 2:
+            self._dstatus = -2
+            return ret
+        sumcrc = fan_tlv.fancrc(e2[0 : self._FAN_TLV_HDR_LEN + self.TLV_LEN])
+        readcrc = ord(e2[self._FAN_TLV_HDR_LEN + self.TLV_LEN]) << 8 | ord(
+            e2[self._FAN_TLV_HDR_LEN + self.TLV_LEN + 1]
+        )
+        if sumcrc != readcrc:
+            self._dstatus = -1
+            return ret
+        else:
+            self._dstatus = 0
+        while (tlv_index + 2) < len(e2) and tlv_index < tlv_end:
+            s = self.decoder(e2[tlv_index : tlv_index + 2 + ord(e2[tlv_index + 1])])
+            tlv_index += ord(e2[tlv_index + 1]) + 2
+            ret.append(s)
+
+        return ret
+
+    @staticmethod
+    def fancrc(t):
+        sum = 0
+        for index in range(len(t)):
+            sum += ord(t[index])
+        return sum
+
+    def decoder(self, t):
+        try:
+            name = ""
+            value = ""
+            if ord(t[0]) == self._FAN_TLV_TYPE_NAME:
+                name = "Product Name"
+                value = str(t[2 : 2 + ord(t[1])])
+                self._typename = value
+            elif ord(t[0]) == self._FAN_TLV_TYPE_SN:
+                name = "serial Number"
+                value = str(t[2 : 2 + ord(t[1])])
+                self._typesn = value
+            elif ord(t[0]) == self._FAN_TLV_TYPE_HW_INFO:
+                name = "hardware info"
+                value = str(t[2 : 2 + ord(t[1])])
+                self._typehwinfo = value
+            elif ord(t[0]) == self._FAN_TLV_TYPE_DEV_TYPE:
+                name = "dev type"
+                value = str(t[2 : 2 + ord(t[1])])
+                value = str_to_hex(value)
+                self._typedevtype = value
+                value = "0x08%x" % value
+        except Exception as e:
+            print(e)
+        return {"name": name, "code": ord(t[0]), "value": value}
+
+    def __str__(self):
+        formatstr = (
+            "VERSION     : 0x%02x  \n"
+            "   FLAG     : 0x%02x  \n"
+            " HW_VER     : 0x%02x  \n"
+            "   TYPE     : 0x%02x  \n"
+            "typename    : %s      \n"
+            "typesn      : %s      \n"
+            "typehwinfo  : %s      \n"
+        )
+        return formatstr % (
+            self.VERSION,
+            self.FLAG,
+            self.HW_VER,
+            self.TYPE,
+            self.typename,
+            self.typesn,
+            self.typehwinfo,
+        )
+
+
+class AVSUTIL:
+    @staticmethod
+    def mac_avs_chip(bus, devno, loc, open, close, loop, protectaddr, level, loopaddr):
+        # disable protection
+        wbi2cset(bus, devno, protectaddr, open)
+        wbi2cset(bus, devno, loopaddr, loop)
+        wbi2cset_word(bus, devno, loc, level)
+        ret, value = wbi2cget_word(bus, devno, loc)
+        if strtoint(value) == level:
+            ret = 0
+        # enable protection
+        wbi2cset(bus, devno, protectaddr, close)
+        if ret == 0:
+            return True
+        return False
+
+    @staticmethod
+    def macPressure_adj(macavs, avs_param, mac_def_param):
+        # check whether it within range
+        max_adj = max(avs_param.keys())
+        min_adj = min(avs_param.keys())
+        type = mac_def_param["type"]
+        level = 0
+        if type == 0:
+            if macavs not in range(min_adj, max_adj + 1):
+                return False
+            else:
+                level = macavs
+        else:
+            if macavs not in range(min_adj, max_adj + 1):
+                level = mac_def_param["default"]
+            else:
+                level = macavs
+        ret = AVSUTIL.mac_avs_chip(
+            mac_def_param["bus"],
+            mac_def_param["devno"],
+            mac_def_param["addr"],
+            mac_def_param["open"],
+            mac_def_param["close"],
+            mac_def_param["loop"],
+            mac_def_param["protectaddr"],
+            avs_param[level],
+            mac_def_param["loopaddr"],
+        )
+        return ret
+
+    @staticmethod
+    def mac_adj():
+        macavs = 0
+        name = MAC_DEFAULT_PARAM["sdkreg"]
+        ret, status = getSdkReg(name)
+        if ret == False:
+            return False
+        status = strtoint(status)
+        # shift operation
+        if MAC_DEFAULT_PARAM["sdktype"] != 0:
+            status = (status >> MAC_DEFAULT_PARAM["macregloc"]) & MAC_DEFAULT_PARAM[
+                "mask"
+            ]
+        macavs = status
+        ret = AVSUTIL.macPressure_adj(macavs, MAC_AVS_PARAM, MAC_DEFAULT_PARAM)
+        return ret
+
+
+class I2CUTIL:
+    @staticmethod
+    def getvaluefromdevice(name):
+        ret = []
+        for item in DEVICE:
+            if item["name"] == name:
+                ret.append(item)
+        return ret
+
+    @staticmethod
+    def openFanE2Protect():
+        wbi2cset(
+            FAN_PROTECT["bus"],
+            FAN_PROTECT["devno"],
+            FAN_PROTECT["addr"],
+            FAN_PROTECT["open"],
+        )
+
+    @staticmethod
+    def closeFanE2Protect():
+        wbi2cset(
+            FAN_PROTECT["bus"],
+            FAN_PROTECT["devno"],
+            FAN_PROTECT["addr"],
+            FAN_PROTECT["close"],
+        )
+
+    @staticmethod
+    def writeToFanE2(bus, loc, rst_arr):
+        index = 0
+        for item in rst_arr:
+            wbi2cset(bus, loc, index, ord(item))
+            index += 1
+
+    @staticmethod
+    def writeToE2(bus, loc, rst_arr):
+        index = 0
+        for item in rst_arr:
+            wbi2cset(bus, loc, index, ord(item))
+            index += 1
+
+    @staticmethod
+    def getE2File(bus, loc):
+        return "/sys/bus/i2c/devices/%d-00%02x/eeprom" % (bus, loc)
+
+
+class BMC():
+    _instance_lock = threading.Lock()
+
+    def __init__(self):
+        pass
+
+    def __new__(cls, *args, **kwargs):
+        if not hasattr(Singleton, "_instance"):
+            with Singleton._instance_lock:
+                if not hasattr(Singleton, "_instance"):
+                    Singleton._instance = object.__new__(cls)
+        return Singleton._instance
+
+
+#  Internal interface
+
+
+def getSdkReg(reg):
+    try:
+        cmd = "bcmcmd -t 1 'getr %s ' < /dev/null" % reg
+        ret, result = os_system(cmd)
+        result_t = result.strip().replace("\r", "").replace("\n", "")
+        if ret != 0 or "Error:" in result_t:
+            return False, result
+        patt = r"%s.(.*):(.*)>drivshell" % reg
+        rt = re.findall(patt, result_t, re.S)
+        test = re.findall("=(.*)", rt[0][0])[0]
+    except Exception as e:
+        return False, "getsdk register error"
+    return True, test
+
+
+def getfilevalue(location):
+    try:
+        with open(location, "r") as fd:
+            value = fd.read()
+        return True, value.strip()
+    except Exception as e:
+        return False, "error"
+
+
+def get_sysfs_value(location):
+    pos_t = str(location)
+    name = get_pmc_register(pos_t)
+    return name
+
+
+def write_sysfs_value(reg_name, value):
+    fileLoc = MAILBOX_DIR + reg_name
+    try:
+        if not os.path.isfile(fileLoc):
+            print(fileLoc, "not found !")
+            return False
+        with open(fileLoc, "w") as fd:
+            fd.write(value)
+    except Exception as error:
+        log_error("Unable to open " + fileLoc + "file !")
+        return False
+    return True
+
+
+def PRINTERR(str):
+    print("\033[0;31m%s\033[0m" % str)
+
+
+def strtoint(str):  # convert Hex string to int such as "4040"/"0x4040"/"0X4040" = 16448
+    value = 0
+    rest_v = str.replace("0X", "").replace("0x", "")
+    for index in range(len(rest_v)):
+        value |= int(rest_v[index], 16) << ((len(rest_v) - index - 1) * 4)
+    return value
+
+
+def inttostr(vl, len):  # convert int to string such as 0x3030 = 00
+    if type(vl) != int:
+        raise Exception(" type error")
+    index = 0
+    ret_t = ""
+    while index < len:
+        ret = 0xFF & (vl >> index * 8)
+        ret_t += chr(ret)
+        index += 1
+    return ret_t
+
+
+def str_to_hex(rest_v):
+    value = 0
+    for index in range(len(rest_v)):
+        value |= ord(rest_v[index]) << ((len(rest_v) - index - 1) * 8)
+    return value
+
+
+def hex_to_str(s):
+    len_t = len(s)
+    if len_t % 2 != 0:
+        return 0
+    ret = ""
+    for t in range(0, int(len_t / 2)):
+        ret += chr(int(s[2 * t : 2 * t + 2], 16))
+    return ret
+
+
+def str_to_bin(s):
+    return " ".join([bin(ord(c)).replace("0b", "") for c in s])
+
+
+def bin_to_str(s):
+    return "".join([chr(i) for i in [int(b, 2) for b in s.split(" ")]])
+
+
+def get_mac_temp():
+    result = {}
+    # wait_docker()
+    # exec twice, get the second result
+    os_system('bcmcmd -t 1 "show temp" < /dev/null')
+    ret, log = os_system('bcmcmd -t 1 "show temp" < /dev/null')
+    if ret:
+        return False, result
+    else:
+        # decode obtained info
+        logs = log.splitlines()
+        for line in logs:
+            if "average" in line:
+                b = re.findall(r"\d+.\d+", line)
+                result["average"] = b[0]
+            elif "maximum" in line:
+                b = re.findall(r"\d+.\d+", line)
+                result["maximum"] = b[0]
+    return True, result
+
+
+def get_mac_temp_sysfs(mactempconf):
+    try:
+        temp = -1000000
+        temp_list = []
+        mac_temp_loc = mactempconf.get("loc", [])
+        mac_temp_flag = mactempconf.get("flag", None)
+        if mac_temp_flag is not None:  # check mac temperature vaild flag
+            gettype = mac_temp_flag.get("gettype")
+            okbit = mac_temp_flag.get("okbit")
+            okval = mac_temp_flag.get("okval")
+            if gettype == "io":
+                io_addr = mac_temp_flag.get("io_addr")
+                val = io_rd(io_addr)
+                if val is None:
+                    raise Exception("get mac_flag by io failed.")
+            else:
+                bus = mac_temp_flag.get("bus")
+                loc = mac_temp_flag.get("loc")
+                offset = mac_temp_flag.get("offset")
+                ind, val = wbi2cget(bus, loc, offset)
+                if ind is not True:
+                    raise Exception("get mac_flag by i2c failed.")
+            val_t = (int(val, 16) & (1 << okbit)) >> okbit
+            if val_t != okval:
+                raise Exception("mac_flag invalid, val_t:%d." % val_t)
+        for loc in mac_temp_loc:
+            temp_s = get_sysfs_value(loc)
+            if isinstance(temp_s, str) and temp_s.startswith("ERR"):
+                raise Exception("get mac temp error. loc:%s" % loc)
+            temp_t = int(temp_s)
+            if temp_t == -1000000:
+                raise Exception("mac temp invalid.loc:%s" % loc)
+            temp_list.append(temp_t)
+        temp_list.sort(reverse=True)
+        temp = temp_list[0]
+    except Exception as e:
+        return False, temp
+    return True, temp
+
+
+def restartDockerService(force=False):
+    container_name = [
+        "database",
+        "snmp",
+        "syncd",
+        "swss",
+        "dhcp_relay",
+        "radv",
+        "teamd",
+        "pmon",
+    ]
+    ret, status = os_system("docker ps")
+    if ret == 0:
+        for tmpname in container_name:
+            if tmpname not in status:
+                if force == True:
+                    os_system("docker restart %s" % tmpname)
+                else:
+                    os_system("systemctl restart %s" % tmpname)
+
+
+def wait_dhcp(timeout):
+    time_cnt = 0
+    while True:
+        try:
+            ret, status = os_system("systemctl status dhcp_relay.service")
+            if (ret == 0 and "running" in status) or "SUCCESS" in status:
+                break
+            else:
+                sys.stdout.write(".")
+                sys.stdout.flush()
+                time_cnt = time_cnt + 1
+                if time_cnt > timeout:
+                    raise Exception("wait_dhcp timeout")
+                time.sleep(1)
+        except Exception as e:
+            return False
+    return True
+
+
+def wait_sdk(sdk_fpath, timeout):
+    time_cnt = 0
+    while True:
+        try:
+            if os.path.exists(sdk_fpath):
+                break
+            else:
+                sys.stdout.write(".")
+                sys.stdout.flush()
+                time_cnt = time_cnt + 1
+                if time_cnt > timeout:
+                    raise Exception("wait_sdk timeout")
+                time.sleep(1)
+        except Exception as e:
+            return False
+    return True
+
+
+def wait_docker(need_restart=False, timeout=180):
+    sdkcheck_params = STARTMODULE.get("sdkcheck", {})
+    if sdkcheck_params.get("checktype") == "file":  # pass file check
+        sdk_fpath = sdkcheck_params.get("sdk_fpath")
+        return wait_sdk(sdk_fpath, timeout)
+    return wait_dhcp(timeout)
+
+
+def getTLV_BODY(type, productname):
+    x = []
+    temp_t = ""
+    if type == TLV_CODE_MAC_BASE:
+        arr = productname.split(":")
+        for tt in arr:
+            temp_t += chr(int(tt, 16))
+    elif type == TLV_CODE_DEVICE_VERSION:
+        temp_t = chr(productname)
+    elif type == TLV_CODE_MAC_SIZE:
+        temp_t = chr(productname >> 8) + chr(productname & 0x00FF)
+    else:
+        temp_t = productname
+    x.append(chr(type))
+    x.append(chr(len(temp_t)))
+    for i in temp_t:
+        x.append(i)
+    return x
+
+
+def _crc32(v):
+    return "0x%08x" % (
+        binascii.crc32(v) & 0xFFFFFFFF
+    )  # get 8 bytes of crc32 %x return hex
+
+
+def printvalue(b):
+    index = 0
+    for i in range(0, len(b)):
+        if index % 16 == 0:
+            print(" ")
+        print("%02x " % ord(b[i]))
+        index += 1
+    print("\n")
+
+
+def generate_value(_t):
+    ret = []
+    for i in TLV_INFO_ID_STRING:
+        ret.append(i)
+    ret.append(chr(TLV_INFO_VERSION))
+    ret.append(chr(TLV_INFO_LENGTH))
+    ret.append(chr(TLV_INFO_LENGTH_VALUE))
+
+    total_len = 0
+    for key in _t:
+        x = getTLV_BODY(key, _t[key])
+        ret += x
+        total_len += len(x)
+    ret[10] = chr(total_len + 6)
+
+    ret.append(chr(0xFE))
+    ret.append(chr(0x04))
+    s = _crc32("".join(ret))
+    for t in range(0, 4):
+        ret.append(chr(int(s[2 * t + 2 : 2 * t + 4], 16)))
+    totallen = len(ret)
+    if totallen < 256:
+        for left_t in range(0, 256 - totallen):
+            ret.append(chr(0x00))
+    return (ret, True)
+
+
+def getsyseeprombyId(id):
+    ret = get_sys_eeprom()
+    for item in ret:
+        if item["code"] == id:
+            return item
+    return None
+
+
+def fac_init_cardidcheck():
+    rest = getsyseeprombyId(TLV_CODE_CARID)  # check cardId same or not
+    if rest is None:
+        print("need to program write bin file")
+        return False
+    else:
+        rest_v = rest["value"]
+        value = strtoint(rest_v)
+        if value == PLATFORM_CARDID:
+            log_debug("check card ID pass")
+        else:
+            log_debug("check card ID error")
+            return False
+    return True
+
+
+def isValidMac(mac):
+    if re.match(r"^\s*([0-9a-fA-F]{2,2}:){5,5}[0-9a-fA-F]{2,2}\s*$", mac):
+        return True
+    return False
+
+
+#  Internet cardsetmac
+
+
+def util_setmac(eth, mac):
+    rulefile = "/etc/udev/rules.d/70-persistent-net.rules"
+    if isValidMac(mac) == False:
+        return False, "MAC invaild"
+    cmd = "ethtool -e %s | grep 0x0010 | awk '{print \"0x\"$13$12$15$14}'" % eth
+    ret, log = os_system(cmd)
+    log_debug(log)
+    magic = ""
+    if ret == 0 and len(log):
+        magic = log
+    macs = mac.upper().split(":")
+
+    # chage ETH0 to value after setmac
+    ifconfigcmd = "ifconfig eth0 hw ether %s" % mac
+    log_debug(ifconfigcmd)
+    ret, status = os_system(ifconfigcmd)
+    if ret:
+        raise SETMACException("software set  Internet card MAC error")
+    index = 0
+    for item in macs:
+        cmd = "ethtool -E %s magic %s offset %d value 0x%s" % (eth, magic, index, item)
+        log_debug(cmd)
+        index += 1
+        ret, log = os_system(cmd)
+        if ret != 0:
+            raise SETMACException("set hardware Internet card MAC error")
+    # get value after setting
+    cmd_t = "ethtool -e eth0 offset 0 length 6"
+    ret, log = os_system(cmd_t)
+    m = re.split(":", log)[-1].strip().upper()
+    mac_result = m.upper().split(" ")
+
+    for ind, s in enumerate(macs):
+        if s != mac_result[ind]:
+            PRINTERR("MAC comparison error")
+    if os.path.exists(rulefile):
+        os.remove(rulefile)
+    print("MGMT MAC[%s]" % mac)
+    return True
+
+
+def getInputCheck(tips):
+    str = raw_input(tips)
+    if (
+        astrcmp(str, "y")
+        or astrcmp(str, "ye")
+        or astrcmp(str, "yes")
+        or astrcmp(str, "")
+    ):
+        return True
+    else:
+        return False
+
+
+def getrawch():
+    fd = sys.stdin.fileno()
+    old_settings = termios.tcgetattr(fd)
+    try:
+        tty.setraw(sys.stdin.fileno())
+        ch = sys.stdin.read(1)
+    finally:
+        termios.tcsetattr(fd, termios.TCSADRAIN, old_settings)
+    return ch
+
+
+def upper_input(tips):
+    sys.stdout.write(tips)
+    sys.stdout.flush()
+    passwd = []
+    while True:
+        ch = getrawch().upper()
+        if ch == "\r" or ch == "\n":
+            return "".join(passwd)
+        elif ch == "\b" or ord(ch) == 127:
+            if passwd:
+                del passwd[-1]
+                sys.stdout.write("\b \b")
+        else:
+            sys.stdout.write(ch)
+            passwd.append(ch)
+
+def astrcmp(str1, str2):
+    return str1.lower() == str2.lower()
+
+
+def generate_ext(cardid):
+    s = "%08x" % cardid
+    ret = ""
+    for t in range(0, 4):
+        ret += chr(int(s[2 * t : 2 * t + 2], 16))
+    ret = chr(0x01) + chr(len(ret)) + ret
+    return ret
+
+
+def wbi2cget(bus, devno, address):
+    command_line = "i2cget -f -y %d 0x%02x 0x%02x " % (bus, devno, address)
+    retrytime = 6
+    ret_t = ""
+    for i in range(retrytime):
+        ret, ret_t = os_system(command_line)
+        if ret == 0:
+            return True, ret_t
+        time.sleep(0.1)
+    return False, ret_t
+
+
+def wbi2cset(bus, devno, address, byte):
+    command_line = "i2cset -f -y %d 0x%02x 0x%02x 0x%02x" % (bus, devno, address, byte)
+    retrytime = 6
+    ret_t = ""
+    for i in range(retrytime):
+        ret, ret_t = os_system(command_line)
+        if ret == 0:
+            return True, ret_t
+    return False, ret_t
+
+
+def wbpcird(pcibus, slot, fn, bar, offset):
+    """read pci register"""
+    if offset % 4 != 0:
+        return False
+    filename = "/sys/bus/pci/devices/0000:%02x:%02x.%x/resource%d" % (int(pcibus), int(slot), int(fn), int(bar))
+    with open(filename, "r+") as file:
+        size = os.path.getsize(filename)
+        data = mmap.mmap(file.fileno(), size)
+        result = data[offset: offset + 4]
+        s = result[::-1]
+        val = 0
+        for i in range(0, len(s)):
+            val = val << 8  | ord(s[i])
+        data.close()
+    return "0x%08x" % val
+
+
+def wbpciwr(pcibus, slot, fn, bar, offset, data):
+    """write pci register"""
+    ret = inttostr(data, 4)
+    filename = "/sys/bus/pci/devices/0000:%02x:%02x.%x/resource%d" % (int(pcibus), int(slot), int(fn), int(bar))
+    with open(filename, "r+") as file:
+        size = os.path.getsize(filename)
+        data = mmap.mmap(file.fileno(), size)
+        data[offset: offset + 4] = ret
+        result = data[offset: offset + 4]
+        s = result[::-1]
+        val = 0
+        for i in range(0, len(s)):
+            val = val << 8  | ord(s[i])
+        data.close()
+
+
+def wbsysset(location, value):
+    command_line = "echo 0x%02x > %s" % (value, location)
+    retrytime = 6
+    ret_t = ""
+    for i in range(retrytime):
+        ret, ret_t = os_system(command_line)
+        if ret == 0:
+            return True, ret_t
+    return False, ret_t
+
+
+def wbi2cget_word(bus, devno, address):
+    command_line = "i2cget -f -y %d 0x%02x 0x%02x w" % (bus, devno, address)
+    retrytime = 3
+    ret_t = ""
+    for i in range(retrytime):
+        ret, ret_t = os_system(command_line)
+        if ret == 0:
+            return True, ret_t
+    return False, ret_t
+
+
+def wbi2cset_word(bus, devno, address, byte):
+    command_line = "i2cset -f -y %d 0x%02x 0x%02x 0x%x w" % (bus, devno, address, byte)
+    os_system(command_line)
+
+
+def fan_setmac():
+    wbi2cset(
+        FAN_PROTECT["bus"],
+        FAN_PROTECT["devno"],
+        FAN_PROTECT["addr"],
+        FAN_PROTECT["open"],
+    )
+    wbi2cset(
+        FAN_PROTECT["bus"],
+        FAN_PROTECT["devno"],
+        FAN_PROTECT["addr"],
+        FAN_PROTECT["close"],
+    )
+
+
+def checkfansninput(fan_sn, fansntemp):
+    if fan_sn in fansntemp:
+        PRINTERR("exist same Serial Number, please input again")
+        return False
+    if len(fan_sn) != 13:
+        PRINTERR("Serial Number length incorrect, please input again")
+        return False
+    return True
+
+
+# check hw version
+def checkfanhwinput(hw):
+    if len(hw) != 4:
+        PRINTERR("hardware version length incorrect, please input again")
+        return False
+    if hw.find(".") != 1:
+        PRINTERR("hardware version incorrect, please input again")
+        return False
+    return True
+
+
+def util_show_fanse2(fans):
+    formatstr = "%-8s  %-20s  %-20s  %-20s %-20s"
+    print(formatstr % ("id", "Name", "hardware version", "Serial Number", "Time"))
+    print(
+        formatstr
+        % ("------", "---------------", "---------------", "---------------", "----")
+    )
+    for fan in fans:
+        # print fan.dstatus
+        if fan.dstatus < 0:
+            print("%-8s" % ("FAN%d" % (fans.index(fan) + 1)))
+            PRINTERR("  decode e2 error")
+        else:
+            print(
+                formatstr
+                % (
+                    "FAN%d" % (fans.index(fan) + 1),
+                    fan.typename.replace(chr(0x00), ""),
+                    fan.typehwinfo.replace(chr(0x00), ""),
+                    fan.typesn.replace(chr(0x00), ""),
+                    fan.fandecodetime,
+                )
+            )
+
+
+def get_fane2_sysfs(bus, loc):
+    wb_fan_e2 = "%d-%04x/fan" % (bus, loc)
+    eeprom = get_sysfs_value(wb_fan_e2)
+    return eeprom
+
+
+def util_show_fane2():
+    ret = sorted(I2CUTIL.getvaluefromdevice("wb_fan"))
+    if len(ret) <= 0:
+        return None
+    fans = []
+    for index in range(len(ret)):
+        t1 = int(round(time.time() * 1000))
+        eeprom = get_fane2_sysfs(ret[index]["bus"], ret[index]["loc"])
+        t2 = int(round(time.time() * 1000))
+        fane2 = fan_tlv()
+        fane2.fandecodetime = t2 - t1
+        fane2.decode(eeprom)
+        fans.append(fane2)
+    util_show_fanse2(fans)
+
+
+def getPid(name):
+    ret = []
+    for dirname in os.listdir("/proc"):
+        if dirname == "curproc":
+            continue
+        try:
+            with open("/proc/{}/cmdline".format(dirname), mode="rb") as fd:
+                content = fd.read()
+        except Exception:
+            continue
+        if name in content:
+            ret.append(dirname)
+    return ret
+
+
+def fac_fans_setmac_tlv(ret):
+    if len(ret) <= 0:
+        return False
+    fans = []
+    fansntemp = []
+    for index in range(len(ret)):
+        item = ret[index]
+        log_debug(item)
+        eeprom = get_fane2_sysfs(item["bus"], item["loc"])
+        fane2 = fan_tlv()
+        fane2.decode(eeprom)
+        fane2.fanbus = item["bus"]
+        fane2.fanloc = item["loc"]
+        log_debug("decode eeprom success")
+
+        print("Fan[%d]-[%s]setmac" % ((index + 1), FANS_DEF[fane2.typedevtype]))
+        while True:
+            print("Please input[%s]:" % "Serial Number")
+            fan_sn = raw_input()
+            if checkfansninput(fan_sn, fansntemp) == False:
+                continue
+            fansntemp.append(fan_sn)
+            fan_sn = fan_sn + chr(0x00)
+            fane2.typesn = fan_sn + chr(0x00)
+            break
+        while True:
+            print("Please input[%s]:" % "hardware version")
+            hwinfo = raw_input()
+            if checkfanhwinput(hwinfo) == False:
+                continue
+            fan_hwinfo = hwinfo + chr(0x00)
+            fane2.typehwinfo = fan_hwinfo + chr(0x00)
+            break
+        log_debug(fane2.typedevtype)
+        fane2.typename = FANS_DEF[fane2.typedevtype] + chr(0x00)
+        fans.append(fane2)
+        print("\n")
+    print("\n*******************************\n")
+
+    util_show_fanse2(fans)
+    if getInputCheck("check input correctly or not(Yes/No):") == True:
+        for fan in fans:
+            log_debug("ouput fan")
+            fac_fan_setmac(fan)
+    else:
+        print("setmac quit")
+        return False
+
+
+def fac_fan_setmac_fru(ret):
+    fans = FRULISTS.get("fans")
+
+    fanfrus = {}
+    newfrus = {}
+
+    # getmsg
+    try:
+        for fan in fans:
+            print("===============%s ================getmessage" % fan.get("name"))
+            eeprom = getsysvalue(I2CUTIL.getE2File(fan.get("bus"), fan.get("loc")))
+            fru = ipmifru()
+            fru.decodeBin(eeprom)
+            fanfrus[fan.get("name")] = fru
+    except Exception as e:
+        print(str(e))
+        return False
+
+    # setmsg
+    for fan in fans:
+        print("===============%s ================setmac" % fan.get("name"))
+        fruold = fanfrus.get(fan.get("name"))
+        newfru = getInputSetmac(fruold)
+        newfru.recalcute()
+        newfrus[fan.get("name")] = newfru
+    # writemsg
+    for fan in fans:
+        print("===============%s ================writeToE2" % fan.get("name"))
+        ret_t = newfrus.get(fan.get("name"))
+        I2CUTIL.openFanE2Protect()
+        I2CUTIL.writeToFanE2(fan.get("bus"), fan.get("loc"), ret_t.bindata)
+        I2CUTIL.closeFanE2Protect()
+    # check
+    try:
+        for fan in fans:
+            print("===============%s ================getmessage" % fan.get("name"))
+            eeprom = getsysvalue(I2CUTIL.getE2File(fan.get("bus"), fan.get("loc")))
+            fru = ipmifru()
+            fru.decodeBin(eeprom)
+    except Exception as e:
+        print(str(e))
+        return False
+    return True
+
+
+def fac_fans_setmac():
+    ret = I2CUTIL.getvaluefromdevice("wb_fan")
+    if ret is not None and len(ret) > 0:
+        return fac_fans_setmac_tlv(ret)
+    fans = FRULISTS.get("fans", None)
+    if fans is not None and len(fans) > 0:
+        return fac_fan_setmac_fru(ret)
+    return False
+
+
+def fac_fan_setmac(item):
+    I2CUTIL.openFanE2Protect()
+    I2CUTIL.writeToFanE2(item.fanbus, item.fanloc, item.generate_fan_value())
+    I2CUTIL.closeFanE2Protect()
+
+
+def writeToEEprom(rst_arr):
+    dealtype = E2_PROTECT.get("gettype", None)
+    if dealtype is None:
+        wbi2cset(
+            E2_PROTECT["bus"],
+            E2_PROTECT["devno"],
+            E2_PROTECT["addr"],
+            E2_PROTECT["open"],
+        )
+    elif dealtype == "io":
+        io_wr(E2_PROTECT["io_addr"], E2_PROTECT["open"])
+    index = 0
+    for item in rst_arr:
+        wbi2cset(E2_LOC["bus"], E2_LOC["devno"], index, ord(item))
+        index += 1
+
+    if dealtype is None:
+        wbi2cset(
+            E2_PROTECT["bus"],
+            E2_PROTECT["devno"],
+            E2_PROTECT["addr"],
+            E2_PROTECT["close"],
+        )
+    elif dealtype == "io":
+        io_wr(E2_PROTECT["io_addr"], E2_PROTECT["close"])
+    # deal last drivers
+    os.system("rmmod at24 ")
+    os.system("modprobe at24 ")
+    os.system("rm -f /var/cache/sonic/decode-syseeprom/syseeprom_cache")
+
+
+def get_local_eth0_mac():
+    cmd = "ifconfig eth0 |grep HWaddr"
+    print(os_system(cmd))
+
+
+def getonieversion():
+    if not os.path.isfile("/host/machine.conf"):
+        return ""
+    machine_vars = {}
+    with open("/host/machine.conf") as machine_file:
+        for line in machine_file:
+            tokens = line.split("=")
+            if len(tokens) < 2:
+                continue
+            machine_vars[tokens[0]] = tokens[1].strip()
+    return machine_vars.get("onie_version")
+
+
+def createbmcMac(cpumac, num=2):
+    bcmvalue = strtoint(cpumac[cpumac.rindex(":") + 1 : len(cpumac)]) + num
+    # bmcmac =
+    t = cpumac.split(":")
+    t[5] = "%02x" % bcmvalue
+    bmcmac = ":".join(t)
+    return bmcmac.upper()
+
+def ipmi_set_mac(mac):
+    macs = mac.split(":")
+    cmdinit = "ipmitool raw 0x0c 0x01 0x01 0xc2 0x00"
+    cmdset = "ipmitool raw 0x0c 0x01 0x01 0x05"
+    for ind in range(len(macs)):
+        cmdset += " 0x%02x" % int(macs[ind], 16)
+    os_system(cmdinit)
+    ret, status = os_system(cmdset)
+    if ret:
+        PRINTERR("\n\n%s\n\n" % status)
+        return False
+    return True
+
+
+def getInputValue(title, tips):
+    print("Please input[%s]such as(%s):" % (title, tips))
+    name = raw_input()
+
+    return name
+
+
+def bmc_setmac():
+    tips = "BMC MAC"
+    print("Please input value you want to change[%s]:" % tips)
+    name = raw_input()
+    if len(name) != 12:
+        PRINTERR("\nMAC address invaild, try again\n")
+        return False
+    release_mac = ""
+    for i in range(int(len(name) / 2)):
+        if i == 0:
+            release_mac += name[i * 2 : i * 2 + 2]
+        else:
+            release_mac += ":" + name[i * 2 : i * 2 + 2]
+    if isValidMac(release_mac) == True:
+        if ipmi_set_mac(release_mac) == True:
+            return True
+    else:
+        PRINTERR("\nMAC address invaild, try again\n")
+    return False
+
+
+def closeProtocol():
+    # disable LLDP
+    log_info("disable LLDP")
+    sys.stdout.write(".")
+    sys.stdout.flush()
+    os_system("systemctl stop lldp.service")
+    log_info("disable lldp service")
+    sys.stdout.write(".")
+    sys.stdout.flush()
+    os_system("systemctl stop bgp.service")
+    log_info("disable bgp service")
+    sys.stdout.write(".")
+    sys.stdout.flush()
+    # ret, status = os_system('bcmcmd "port ce,xe stp=disable"')
+
+
+# check SDK memory must be 256M
+
+
+def checkSdkMem():
+    ind = 0
+    file_data = ""
+    with open(file_name, "r") as f:
+        for line in f:
+            if "dmasize=16M" in line:
+                line = line.replace("dmasize=16M", "dmasize=256M")
+                ind = -1
+            file_data += line
+    if ind == 0:
+        return
+    with open(file_name, "w") as f:
+        f.write(file_data)
+    print("change SDK memory to 256, reboot required")
+    os_system("sync")
+    os_system("reboot")
+
+
+##########################################################################
+# receives a character setting
+##########################################################################
+
+
+def getch(msg):
+    ret = ""
+    fd = sys.stdin.fileno()
+    old_ttyinfo = termios.tcgetattr(fd)
+    new_ttyinfo = old_ttyinfo[:]
+    new_ttyinfo[3] &= ~termios.ICANON
+    new_ttyinfo[3] &= ~termios.ECHO
+    sys.stdout.write(msg)
+    sys.stdout.flush()
+    try:
+        termios.tcsetattr(fd, termios.TCSANOW, new_ttyinfo)
+        ret = os.read(fd, 1)
+    finally:
+        # print "try to setting"
+        termios.tcsetattr(fd, termios.TCSANOW, old_ttyinfo)
+    return ret
+
+
+def get_raw_input():
+    ret = ""
+    fd = sys.stdin.fileno()
+    old_ttyinfo = termios.tcgetattr(fd)
+    new_ttyinfo = old_ttyinfo[:]
+    new_ttyinfo[3] &= ~termios.ICANON
+    new_ttyinfo[3] &= ~termios.ECHO
+    try:
+        termios.tcsetattr(fd, termios.TCSANOW, new_ttyinfo)
+        ret = raw_input("")
+    except Exception as e:
+        print(e)
+    finally:
+        termios.tcsetattr(fd, termios.TCSANOW, old_ttyinfo)
+    return ret
+
+
+def getsysvalue(location):
+    retval = None
+    mb_reg_file = location
+    if not os.path.isfile(mb_reg_file):
+        print(mb_reg_file, "not found !")
+        return retval
+    try:
+        if not os.path.isfile(mb_reg_file):
+            print(mb_reg_file, "not found !")
+            return retval
+        with open(mb_reg_file, "r") as fd:
+            retval = fd.read()
+    except Exception as error:
+        log_error("Unable to open " + mb_reg_file + "file !")
+    retval = retval.rstrip("\r\n")
+    retval = retval.lstrip(" ")
+    # log_debug(retval)
+    return retval
+
+
+# get file value
+
+
+def get_pmc_register(reg_name):
+    retval = "ERR"
+    mb_reg_file = MAILBOX_DIR + reg_name
+    filepath = glob.glob(mb_reg_file)
+    if len(filepath) == 0:
+        return "%s %s  notfound" % (retval, mb_reg_file)
+    mb_reg_file = filepath[0]
+    if not os.path.isfile(mb_reg_file):
+        return "%s %s  notfound" % (retval, mb_reg_file)
+    try:
+        with open(mb_reg_file, "r") as fd:
+            retval = fd.read()
+    except Exception as error:
+        print("error")
+    retval = retval.rstrip("\r\n")
+    retval = retval.lstrip(" ")
+    return retval
+
+
+# decode EEPROM
+
+
+def decoder(s, t):
+    if ord(t[0]) == TLV_CODE_PRODUCT_NAME:
+        name = "Product Name"
+        value = str(t[2 : 2 + ord(t[1])])
+    elif ord(t[0]) == TLV_CODE_PART_NUMBER:
+        name = "Part Number"
+        value = t[2 : 2 + ord(t[1])]
+    elif ord(t[0]) == TLV_CODE_SERIAL_NUMBER:
+        name = "Serial Number"
+        value = t[2 : 2 + ord(t[1])]
+    elif ord(t[0]) == TLV_CODE_MAC_BASE:
+        name = "Base MAC Address"
+        value = ":".join([binascii.b2a_hex(T) for T in t[2:8]]).upper()
+    elif ord(t[0]) == TLV_CODE_MANUF_DATE:
+        name = "Manufacture Date"
+        value = t[2 : 2 + ord(t[1])]
+    elif ord(t[0]) == TLV_CODE_DEVICE_VERSION:
+        name = "Device Version"
+        value = str(ord(t[2]))
+    elif ord(t[0]) == TLV_CODE_LABEL_REVISION:
+        name = "Label Revision"
+        value = t[2 : 2 + ord(t[1])]
+    elif ord(t[0]) == TLV_CODE_PLATFORM_NAME:
+        name = "Platform Name"
+        value = t[2 : 2 + ord(t[1])]
+    elif ord(t[0]) == TLV_CODE_ONIE_VERSION:
+        name = "ONIE Version"
+        value = t[2 : 2 + ord(t[1])]
+    elif ord(t[0]) == TLV_CODE_MAC_SIZE:
+        name = "MAC Addresses"
+        value = str((ord(t[2]) << 8) | ord(t[3]))
+    elif ord(t[0]) == TLV_CODE_MANUF_NAME:
+        name = "Manufacturer"
+        value = t[2 : 2 + ord(t[1])]
+    elif ord(t[0]) == TLV_CODE_MANUF_COUNTRY:
+        name = "Manufacture Country"
+        value = t[2 : 2 + ord(t[1])]
+    elif ord(t[0]) == TLV_CODE_VENDOR_NAME:
+        name = "Vendor Name"
+        value = t[2 : 2 + ord(t[1])]
+    elif ord(t[0]) == TLV_CODE_DIAG_VERSION:
+        name = "Diag Version"
+        value = t[2 : 2 + ord(t[1])]
+    elif ord(t[0]) == TLV_CODE_SERVICE_TAG:
+        name = "Service Tag"
+        value = t[2 : 2 + ord(t[1])]
+    elif ord(t[0]) == TLV_CODE_VENDOR_EXT:
+        name = "Vendor Extension"
+        value = ""
+        if _TLV_DISPLAY_VENDOR_EXT:
+            value = t[2 : 2 + ord(t[1])]
+    elif ord(t[0]) == TLV_CODE_CRC_32 and len(t) == 6:
+        name = "CRC-32"
+        value = "0x%08X" % (
+            ((ord(t[2]) << 24) | (ord(t[3]) << 16) | (ord(t[4]) << 8) | ord(t[5])),
+        )
+    elif ord(t[0]) == TLV_CODE_CARID:
+        name = "board_cardid"
+        value = ""
+        for c in t[2 : 2 + ord(t[1])]:
+            value += "%02X" % (ord(c),)
+    else:
+        name = "Unknown"
+        value = ""
+        for c in t[2 : 2 + ord(t[1])]:
+            value += "0x%02X " % (ord(c),)
+    return {"name": name, "code": ord(t[0]), "value": value}
+
+
+def decode_eeprom(e):
+    total_len = (ord(e[9]) << 8) | ord(e[10])
+    tlv_index = _TLV_INFO_HDR_LEN
+    tlv_end = _TLV_INFO_HDR_LEN + total_len
+    ret = []
+    while (tlv_index + 2) < len(e) and tlv_index < tlv_end:
+        rt = decoder(None, e[tlv_index : tlv_index + 2 + ord(e[tlv_index + 1])])
+        ret.append(rt)
+        if ord(e[tlv_index]) == TLV_CODE_CRC_32:
+            break
+        tlv_index += ord(e[tlv_index + 1]) + 2
+    for item in ret:
+        if item["code"] == TLV_CODE_VENDOR_EXT:
+            rt = decoder(None, item["value"][0 : 0 + 2 + ord(item["value"][0 + 1])])
+            ret.append(rt)
+    return ret
+
+
+def get_sys_eeprom():
+    eeprom = get_sysfs_value(wb_eeprom)
+    return decode_eeprom(eeprom)
+
+
+# get card ID
+def getCardId():
+    ret = get_sys_eeprom()
+    for item in ret:
+        if item["code"] == TLV_CODE_CARID:
+            return item.get("value", None)
+    return None
+
+
+# ====================================
+# execute shell command
+# ====================================
+def os_system(cmd):
+    status, output = commands.getstatusoutput(cmd)
+    return status, output
+
+
+###########################################
+# get memory slot and number via DMI command
+###########################################
+def getsysmeminfo():
+    ret, log = os_system("which dmidecode ")
+    if ret != 0 or len(log) <= 0:
+        error = "cmd find dmidecode"
+        return False, error
+    cmd = log + '|grep -P -A5 "Memory\s+Device"|grep Size|grep -v Range'
+    # get total number first
+    result = []
+    ret1, log1 = os_system(cmd)
+    if ret1 == 0 and len(log1):
+        log1 = log1.lstrip()
+        arr = log1.split("\n")
+        # total = len(arr)  # total slot number
+        for i in range(len(arr)):
+            val = re.sub("\D", "", arr[i])
+            if val == "":
+                val = arr[i].lstrip()
+                val = re.sub("Size:", "", val).lstrip()
+            # print val
+            result.append({"slot": i + 1, "size": val})
+        return True, result
+    return False, "error"
+
+
+###########################################
+# get memory slot and number via DMI command
+# return various arrays
+###########################################
+def getsysmeminfo_detail():
+    ret, log = os_system("which dmidecode ")
+    if ret != 0 or len(log) <= 0:
+        error = "cmd find dmidecode"
+        return False, error
+    cmd = log + ' -t 17 | grep  -A21 "Memory Device"'  # 17
+    # get total number
+    ret1, log1 = os_system(cmd)
+    if ret1 != 0 or len(log1) <= 0:
+        return False, "command execution error[%s]" % cmd
+    result_t = log1.split("--")
+    mem_rets = []
+    for item in result_t:
+        its = item.replace("\t", "").strip().split("\n")
+        ret = {}
+        for it in its:
+            if ":" in it:
+                key = it.split(":")[0].lstrip()
+                value = it.split(":")[1].lstrip()
+                ret[key] = value
+        mem_rets.append(ret)
+    return True, mem_rets
+
+
+###########################################
+# get BIOS info via DMI command
+###########################################
+def getDmiSysByType(type_t):
+    ret, log = os_system("which dmidecode ")
+    if ret != 0 or len(log) <= 0:
+        error = "cmd find dmidecode"
+        return False, error
+    cmd = log + " -t %s" % type_t
+    # get total number
+    ret1, log1 = os_system(cmd)
+    if ret1 != 0 or len(log1) <= 0:
+        return False, "command execution error[%s]" % cmd
+    its = log1.replace("\t", "").strip().split("\n")
+    ret = {}
+    for it in its:
+        if ":" in it:
+            key = it.split(":")[0].lstrip()
+            value = it.split(":")[1].lstrip()
+            ret[key] = value
+    return True, ret
+
+
+def gethwsys():
+    return getDmiSysByType(1)
+
+
+###########################################
+# get BIOS info via DMI command
+
+
+def getsysbios():
+    return getDmiSysByType(0)
+
+
+def searchDirByName(name, dir):
+    result = []
+    try:
+        files = os.listdir(dir)
+        for file in files:
+            if name in file:
+                result.append(os.path.join(dir, file))
+    except Exception as e:
+        print(str(e))
+    return result
+
+
+def getUsbLocation():
+    dir = "/sys/block/"
+    spect = "sd"
+    usbpath = ""
+    result = searchDirByName(spect, dir)
+    if len(result) <= 0:
+        return False, usbpath
+    for item in result:
+        with open(os.path.join(item, "removable"), "r") as fd:
+            value = fd.read()
+            if value.strip() == "1":  # U-Disk found
+                usbpath = item
+                break
+    if usbpath == "":  # no U-Disk found
+        log_debug("no usb found")
+        return False, usbpath
+    return True, usbpath
+
+
+# judge USB file
+def getusbinfo():
+    ret, path = getUsbLocation()
+    if ret == False:
+        return False, "not usb exists"
+    str = os.path.join(path, "size")
+    ret, value = getfilevalue(str)
+    if ret == True:
+        return (
+            True,
+            {
+                "id": os.path.basename(path),
+                "size": float(value) * 512 / 1024 / 1024 / 1024,
+            },
+        )
+    else:
+        return False, "Err"
+
+
+def get_cpu_info():
+    cmd = "cat /proc/cpuinfo |grep processor -A18"  # 17
+
+    ret, log1 = os_system(cmd)
+    if ret != 0 or len(log1) <= 0:
+        return False, "command execution error[%s]" % cmd
+    result_t = log1.split("--")
+    mem_rets = []
+    for item in result_t:
+        its = item.replace("\t", "").strip().split("\n")
+        ret = {}
+        for it in its:
+            if ":" in it:
+                key = it.split(":")[0].lstrip()
+                value = it.split(":")[1].lstrip()
+                ret[key] = value
+        mem_rets.append(ret)
+    return True, mem_rets
+
+def io_rd(reg_addr, size=1):
+    path = "/dev/port"
+    ret = ""
+    fd = None
+    try:
+        reg_addr = int(reg_addr)
+        fd = os.open(path, os.O_RDWR|os.O_CREAT)
+        for i in range(size):
+            os.lseek(fd, reg_addr+i, os.SEEK_SET)
+            ret+="{:02x}".format(ord(os.read(fd, 1).decode('latin-1')))
+        return ret
+    except Exception as e:
+        print(str(e))
+        return None
+    finally:
+        if fd: os.close(fd)
+
+
+def io_wr(reg_addr, reg_data):
+    u"""io write"""
+    fd = None
+    try:
+        regdata = 0
+        regaddr = 0
+        if type(reg_addr) == int:
+            regaddr = reg_addr
+        else:
+            regaddr = int(reg_addr, 16)
+        if type(reg_data) == int:
+            regdata = reg_data
+        else:
+            regdata = int(reg_data, 16)
+        devfile = "/dev/port"
+        fd = os.open(devfile, os.O_RDWR | os.O_CREAT)
+        os.lseek(fd, regaddr, os.SEEK_SET)
+        os.write(fd, regdata.to_bytes(2, 'little'))
+        return True
+    except ValueError as e:
+        print(e)
+        return False
+    except Exception as e:
+        print(e)
+        return False
+    finally:
+        if fd: os.close(fd)
diff --git a/platform/centec-arm64/sonic-platform-modules-micas/common/script/sensors b/platform/centec-arm64/sonic-platform-modules-micas/common/script/sensors
new file mode 100755
index 000000000..a2c72b123
--- /dev/null
+++ b/platform/centec-arm64/sonic-platform-modules-micas/common/script/sensors
@@ -0,0 +1,8 @@
+#!/bin/bash
+#docker exec -i pmon sensors "$@"
+
+
+#To probe sensors not part of lm-sensors
+if [ -r /usr/local/bin/platform_sensors.py ]; then
+        python /usr/local/bin/platform_sensors.py
+fi
diff --git a/platform/centec-arm64/sonic-platform-modules-micas/common/service/device_i2c.service b/platform/centec-arm64/sonic-platform-modules-micas/common/service/device_i2c.service
new file mode 100644
index 000000000..94ddaaad1
--- /dev/null
+++ b/platform/centec-arm64/sonic-platform-modules-micas/common/service/device_i2c.service
@@ -0,0 +1,15 @@
+[Unit]
+Description= Platform Global Initialize I2c drivers.
+After=local-fs.target
+Before=pmon.service ntp.service
+DefaultDependencies=no
+
+[Service]
+Type=oneshot
+ExecStart=/usr/local/bin/device_i2c.py start
+ExecStop=/usr/local/bin/device_i2c.py stop
+RemainAfterExit=yes
+
+[Install]
+WantedBy=multi-user.target
+
diff --git a/platform/centec-arm64/sonic-platform-modules-micas/common/service/fancontrol.service b/platform/centec-arm64/sonic-platform-modules-micas/common/service/fancontrol.service
new file mode 100644
index 000000000..aa686c9f9
--- /dev/null
+++ b/platform/centec-arm64/sonic-platform-modules-micas/common/service/fancontrol.service
@@ -0,0 +1,12 @@
+[Unit]
+Description= Fancontrol for Device.
+After=privatenetwork.service
+DefaultDependencies=no
+
+[Service]
+ExecStart=/usr/local/bin/fancontrol.py start
+Restart=on-failure
+
+[Install]
+WantedBy=multi-user.target
+
diff --git a/platform/centec-arm64/sonic-platform-modules-micas/common_custom/common_micas/Makefile b/platform/centec-arm64/sonic-platform-modules-micas/common_custom/common_micas/Makefile
new file mode 100644
index 000000000..320229073
--- /dev/null
+++ b/platform/centec-arm64/sonic-platform-modules-micas/common_custom/common_micas/Makefile
@@ -0,0 +1,24 @@
+PWD		= $(shell pwd)
+EXTRA_CFLAGS:= -I$(M)/include
+EXTRA_CFLAGS+= -Wall
+SUB_BUILD_DIR = $(PWD)/build
+SERVICE_DIR = $(PWD)/service
+INSTALL_DIR = $(SUB_BUILD_DIR)/$(KERNEL_SRC)/$(INSTALL_MOD_DIR)
+INSTALL_SCRIPT_DIR = $(SUB_BUILD_DIR)/usr/local/bin
+INSTALL_LIB_DIR = $(SUB_BUILD_DIR)/usr/lib/python3.9/dist-packages
+INSTALL_SERVICE_DIR = $(SUB_BUILD_DIR)/lib/systemd/system
+INSTALL_ETC_DIR = $(SUB_BUILD_DIR)/etc
+UNSUPPORT_KERVER = 4.9.189
+
+all:
+	@if [ ! -d ${INSTALL_LIB_DIR} ]; then mkdir -p ${INSTALL_LIB_DIR} ;fi
+	@if [ -d $(PWD)/lib/ ]; then cp -r $(PWD)/lib/* ${INSTALL_LIB_DIR} ;fi
+	@if [ ! -d ${INSTALL_SCRIPT_DIR} ]; then mkdir -p ${INSTALL_SCRIPT_DIR} ;fi
+	@if [ -d $(PWD)/script/ ]; then cp -r $(PWD)/script/* ${INSTALL_SCRIPT_DIR} ;fi
+	@if [ ! -d ${INSTALL_ETC_DIR} ]; then mkdir -p ${INSTALL_ETC_DIR} ;fi
+	@if [ -d $(INSTALL_SCRIPT_DIR) ]; then chmod +x $(INSTALL_SCRIPT_DIR)/* ;fi
+	@if [ ! -d ${INSTALL_SERVICE_DIR} ]; then mkdir -p ${INSTALL_SERVICE_DIR} ;fi
+	if [ -d $(SERVICE_DIR) ]; then cp -r $(SERVICE_DIR)/*  $(INSTALL_SERVICE_DIR) ;fi
+clean:
+	rm -rf $(SUB_BUILD_DIR)
+
diff --git a/platform/centec-arm64/sonic-platform-modules-micas/common_custom/common_micas/lib/logutil/__init__.py b/platform/centec-arm64/sonic-platform-modules-micas/common_custom/common_micas/lib/logutil/__init__.py
new file mode 100644
index 000000000..e69de29bb
diff --git a/platform/centec-arm64/sonic-platform-modules-micas/common_custom/common_micas/lib/logutil/logutil.py b/platform/centec-arm64/sonic-platform-modules-micas/common_custom/common_micas/lib/logutil/logutil.py
new file mode 100644
index 000000000..0d9f6ff94
--- /dev/null
+++ b/platform/centec-arm64/sonic-platform-modules-micas/common_custom/common_micas/lib/logutil/logutil.py
@@ -0,0 +1,64 @@
+#!/usr/bin/python
+# -*- coding: UTF-8 -*-
+import os
+import syslog
+import logging
+import subprocess
+import shlex
+
+SYSLOG_IDENTIFIER = "LOGUTIL"
+
+# ========================== Syslog wrappers ==========================
+
+def log_info(msg,log_type=SYSLOG_IDENTIFIER, also_print_to_console=False):
+    syslog.openlog(log_type)
+    syslog.syslog(syslog.LOG_INFO, msg)
+    syslog.closelog()
+
+    if also_print_to_console:
+        click.echo(msg)
+
+
+def log_debug(msg, log_type=SYSLOG_IDENTIFIER, also_print_to_console=False):
+    try:
+        syslog.openlog(log_type)
+        syslog.syslog(syslog.LOG_DEBUG, msg)
+        syslog.closelog()
+
+        if also_print_to_console:
+            click.echo(msg)
+    except Exception as e:
+        print(str(e))
+
+
+def log_warning(msg, log_type=SYSLOG_IDENTIFIER, also_print_to_console=False):
+    syslog.openlog(log_type)
+    syslog.syslog(syslog.LOG_WARNING, msg)
+    syslog.closelog()
+
+    if also_print_to_console:
+        click.echo(msg)
+
+def log_error(msg, log_type=SYSLOG_IDENTIFIER, also_print_to_console=False):
+    syslog.openlog(log_type)
+    syslog.syslog(syslog.LOG_ERR, msg)
+    syslog.closelog()
+
+    if also_print_to_console:
+        click.echo(msg)
+
+restful_logger_path = "/var/log/bmc_restful.log"
+def bmc_restful_logger(message):
+    if not os.path.isfile(restful_logger_path):
+        cmd = "sudo touch %s && sudo chmod +x %s" % (
+            restful_logger_path, restful_logger_path)
+        subprocess.Popen(
+            shlex.split(cmd), shell=False, stdout=subprocess.PIPE, stderr=subprocess.PIPE)
+
+    logging.basicConfig(filename=restful_logger_path,
+                        filemode='a',
+                        format='%(asctime)s,%(msecs)d %(name)s %(levelname)s %(message)s',
+                        datefmt='%H:%M:%S',
+                        level=logging.INFO)
+
+    logging.info(message)
diff --git a/platform/centec-arm64/sonic-platform-modules-micas/common_custom/common_micas/lib/redfishutil/redfish_api.py b/platform/centec-arm64/sonic-platform-modules-micas/common_custom/common_micas/lib/redfishutil/redfish_api.py
new file mode 100644
index 000000000..76b2c1ba6
--- /dev/null
+++ b/platform/centec-arm64/sonic-platform-modules-micas/common_custom/common_micas/lib/redfishutil/redfish_api.py
@@ -0,0 +1,304 @@
+#!/usr/bin/env python3
+# -*- coding: utf-8 -*-
+import shlex
+import datetime
+import os
+import ssl
+import subprocess
+import syslog
+
+class Redfish_Api():
+    BmcBaseUrl = 'http://240.1.1.1:8080'
+    ThermalUrl = '/redfish/v1/Chassis/1/Thermal'
+    PowerUrl = '/redfish/v1/Chassis/1/Power'
+    ThresholdSensorsUrl = '/redfish/v1/Chassis/1/ThresholdSensors'
+    FanSpeedUrl = '/redfish/v1/Chassis/1/Thermal/Actions/Oem/OpenBmc/Fan.SetSpeed'
+    BoardsUrl = '/redfish/v1/Chassis/1/Boards/'
+    BoardLedUrl = "/redfish/v1/Chassis/1/Boards/{}/Actions/Oem/OpenBmc/Boards.SetLED"
+
+    # Maximum time in seconds that you allow the connection to the server to take.
+    connect_timeout = 30
+    # Maximum  time  in seconds that you allow the whole operation to take
+    operation_timeout = 300
+
+    default_prefix='/redfish/v1/'
+    session = None
+    __DEBUG__ = "N"
+    __DUMP_RESP__ = "N"
+    RST_STATUS = "status"
+    RST_SUCCESS = "OK"
+    refish_logger = None
+
+    def redfish_log_debug(self, msg):
+        if (self.__DEBUG__ == "Y"):
+            syslog.openlog("redfis_api")
+            syslog.syslog(syslog.LOG_DEBUG, msg)
+            syslog.closelog()
+
+    def redfish_log_error(self, msg):
+        syslog.openlog("redfish_api")
+        syslog.syslog(syslog.LOG_ERR, msg)
+        syslog.closelog()
+
+    def __init__(self):
+        pass
+
+    def get_full_url(self, url):
+        return self.BmcBaseUrl + url
+
+    def _exec_cmd(self, cmd):
+        self.redfish_log_debug("Cmd: %s" % cmd)
+        p = subprocess.Popen(shlex.split(cmd), shell=False, stdout=subprocess.PIPE, stderr=subprocess.PIPE)
+        p.wait()
+        self.redfish_log_debug("Cmd return: %d" % p.returncode)
+        str_stdout = p.stdout.read().decode('utf-8')
+        str_stderr = p.stderr.read().decode('utf-8')
+        self.redfish_log_debug("Cmd stdout: %s" % str_stdout)
+        if p.returncode !=0:
+            self.redfish_log_error("Cmd: %s, failed! error msg:%s" % (cmd, str_stderr))
+            return None
+        else:
+            try:
+                ret = json.loads(str_stdout)
+                return ret
+            except Exception as e:
+                self.redfish_log_error("Cmd: %s, failed! stdout msg:%s" % (cmd, str_stdout))
+                return None
+
+    def _redfish_get(self, url):
+        self.redfish_log_debug("Get info from %s." % url)
+        result = None
+        try:
+            cmd_get="curl --connect-timeout %d -m %d -X GET %s" % (self.connect_timeout, self.operation_timeout, self.get_full_url(url))
+            result = self._exec_cmd(cmd_get)
+            return result
+        except Exception as e:
+            self.redfish_log_error("error_message: %s" % e)
+            return None
+
+    def _redfish_post(self, url, playload):
+        self.redfish_log_debug("post url: %s" % url)
+        self.redfish_log_debug("Playload: %s" % playload)
+
+        playload_json = json.dumps(playload)
+        result = False
+        try:
+            cmd_post="curl --connect-timeout %d -m %d -X POST %s -d \'%s\'" % (self.connect_timeout, self.operation_timeout, self.get_full_url(url), playload_json)
+            ret_msg = self._exec_cmd(cmd_post)
+            if ret_msg == None:
+                return False
+            elif ret_msg["success"] == False:
+                self.redfish_log_error("Url: '%s', Playload: '%s', Bmc return failed, error_message: %s" % (url, playload_json, ret_msg["Message"]))
+                result = False
+            else:
+                result = True
+            return result
+        except Exception as e:
+            self.redfish_log_error("error_message: %s" % e)
+            return False
+
+    def get_thermal(self):
+        """Get thermal info
+        :returns: class 'redfish.rest.v1.RestResponse' or None when failed
+        """
+        return self._redfish_get(self.ThermalUrl)
+
+    def get_power(self):
+        """Get power info
+        :returns: class 'redfish.rest.v1.RestResponse' or None when failed
+        """
+        return self._redfish_get(self.PowerUrl)
+
+    def get_thresholdSensors(self):
+        """Get thresholdSensors info
+        :returns: class 'redfish.rest.v1.RestResponse' or None when failed
+        """
+        return self._redfish_get(self.ThresholdSensorsUrl)
+
+    def post_odata(self, odata_id, playload):
+        """post odata info
+        :params odata_id: the specified odata_id path
+        :type odata_id: string
+        :playload: info to post
+        :type: dictionary
+        :returns: True or False
+        """
+        if odata_id is None or playload is None:
+            print("post failed: odata_id or playload is None")
+            return False
+        return self._redfish_post(odata_id, playload)
+
+    def get_odata(self, odata_id):
+        """Get odata info
+        :params odata_id: the specified odata_id path
+        :type odata_id: string
+        :returns: class 'redfish.rest.v1.RestResponse' or None when failed
+        """
+        if odata_id is None:
+            print("Get odata_id failed: odata_id is None")
+            return None
+        return self._redfish_get(odata_id)
+
+    def post_fanSpeed(self, playload):
+        """post odata info
+        :playload: info to post
+        :type: dictionary
+        :returns: True or False
+        """
+        if playload is None:
+            print("post failed: playload is None")
+            return False
+        return self._redfish_post(self.FanSpeedUrl, playload)
+
+    def get_board(self, board_name="indicatorboard"):
+        """Get board info
+        :board_name: name of board, default is "indicatorboard"
+        :type: string
+        :returns: class'redfish.rest.v1.RestResponse' or None when failed
+        """
+        if board_name is None :
+            print("get failed: board_name is None")
+            return None
+        return self._redfish_get(self.BoardsUrl + board_name)
+
+    def post_boardLed(self, playload, board_name="indicatorboard"):
+        """post boardLed info
+        :board_name: name of board, default is "indicatorboard"
+        :type: string
+        :playload: info to post
+        :type: dictionary
+        :returns: True or False
+        """
+        if board_name is None or playload is None:
+            print("post failed: playload is None")
+            return False
+        return self._redfish_post(self.BoardLedUrl.format(board_name), playload)
+
+    '''  not supported currently
+    def post_thermal(self, playload):
+        """post thermal info
+        :playload: info to post
+        :type: dictionary
+        :returns: True or False
+        """
+        if playload is None:
+            print("post_thermal failed: playload is None")
+            return None
+        return self._redfish_post(self.ThermalUrl, playload)
+
+    def post_power(self, playload):
+        """post power info
+        :playload: info to post
+        :type: dictionary
+        :returns: True or False
+        """
+        if playload is None:
+            print("post_power failed: playload is None")
+            return None
+        return self._redfish_post(self.PowerUrl, playload)
+
+    def post_thresholdSensors(self, playload):
+        """post thresholdSensors info
+        :playload: info to post
+        :type: dictionary
+        :returns: True or False
+        """
+        if playload is None:
+            print("post_thresholdSensors failed: playload is None")
+            return None
+        return self._redfish_post(self.ThresholdSensorsUrl, playload)
+
+    def get_fanSpeed(self):
+        """Get board led info
+        :returns: class'redfish.rest.v1.RestResponse' or None when failed
+        """
+        return self._redfish_get(self.FanSpeedUrl)
+
+    def post_board(self, playload, board_name="indicatorboard"):
+        """post board info
+        :board_name: name of board, default is "indicatorboard"
+        :type: string
+        :playload: info to post
+        :type: dictionary
+        :returns: True or False
+        """
+        if board_name is None or playload is None:
+            print("post failed: playload is None")
+            return False
+        return self._redfish_post(self.BoardsUrl + board_name, playload)
+
+    def get_boardLed(self, board_name="indicatorboard"):
+        """Get boardLed info
+        :board_name: name of board, default is "indicatorboard"
+        :type: string
+        :returns: class'redfish.rest.v1.RestResponse' or None when failed
+        """
+        if board_name is None :
+            print("get failed: board_name is None")
+            return None
+        return self._redfish_get(self.BoardsUrl % board_name)
+
+    '''
+
+'''
+if __name__ == '__main__':
+    redfish = Redfish_Api()
+
+    ### get
+    # boards
+    ret = redfish.get_board()
+    if ret is None:
+        print("get failed: board")
+    else:
+        print("get succeeded, board:%s" % ret)
+
+    ret = redfish.get_thresholdSensors()
+    if ret is None:
+        print("get failed: threshold")
+    else:
+        print("get succeeded, threshold:%s" % ret)
+
+    ret = redfish.get_power()
+    if ret is None:
+        print("get failed: power")
+    else:
+        print("get succeeded, power:%s" % ret)
+
+    ret = redfish.get_thermal()
+    if ret is None:
+        print("get failed:thermal")
+    else:
+        print("get succeeded,thermal:%s" % ret)
+
+    # get playload
+    resp = redfish.get_thresholdSensors()
+    if (resp != None):
+        print(resp["@odata.id"])
+        print(resp["@odata.type"])
+        print(resp["Id"])
+        print(resp["Name"])
+    else:
+        print("Failed: get_thresholdSensors")
+
+    ### post
+    # fanSpeed
+    playload = {}
+    playload["FanName"] = 'Fan0'
+    playload["FanSpeedLevelPercents"] = "70"
+    print("post fanSpeed:%s" % redfish.post_fanSpeed(playload))
+
+    #{"LEDs": [{"IndicatorLEDColor": "green","LEDType": "sys"},{"IndicatorLEDColor": "off","LEDType": "pwr"},{"IndicatorLEDColor": "green","LEDType": "fan"}]}
+    playload = {}
+    led = {}
+    led1 = {}
+    led_list = []
+    led["IndicatorLEDColor"] = "green"
+    led["LEDType"] = "sys"
+    led1["IndicatorLEDColor"] = "off"
+    led1["LEDType"] = "pwr"
+    led_list.append(led)
+    led_list.append(led1)
+    playload["LEDs"] = led_list
+    # boardsLed
+    print("post boardLed:%s" % redfish.post_boardLed(playload))
+'''
diff --git a/platform/centec-arm64/sonic-platform-modules-micas/common_custom/common_micas/lib/sonic_fwmgr/__init__.py b/platform/centec-arm64/sonic-platform-modules-micas/common_custom/common_micas/lib/sonic_fwmgr/__init__.py
new file mode 100644
index 000000000..e69de29bb
diff --git a/platform/centec-arm64/sonic-platform-modules-micas/common_custom/common_micas/lib/sonic_fwmgr/fwgmr_base.py b/platform/centec-arm64/sonic-platform-modules-micas/common_custom/common_micas/lib/sonic_fwmgr/fwgmr_base.py
new file mode 100644
index 000000000..50a4ca7bc
--- /dev/null
+++ b/platform/centec-arm64/sonic-platform-modules-micas/common_custom/common_micas/lib/sonic_fwmgr/fwgmr_base.py
@@ -0,0 +1,141 @@
+# fwgmr_base.py
+#
+# Base class for creating platform-specific firmware management interfaces for SONiC
+#
+try:
+    import abc
+except ImportError as e:
+    raise ImportError("%s - required module not found" % str(e))
+
+class FwMgrUtilBase(object):
+
+    """Base class for Platform-specific FwMgrUtil class"""
+    __metaclass__ = abc.ABCMeta
+
+    def __init__(self):
+        """TODO: to be defined1. """
+        pass
+
+    @abc.abstractmethod
+    def get_bmc_version(self):
+        """Get BMC version from SONiC
+        :returns: version string
+        """
+        return
+
+    @abc.abstractmethod
+    def get_cpld_version(self):
+        """Get CPLD version from SONiC
+        :returns: dict like {'CPLD_1': version_string, 'CPLD_2': version_string}
+        """
+        return
+
+    @abc.abstractmethod
+    def get_onie_version(self):
+        """Get ONiE version from SONiC
+        :returns: version string
+        """
+        return
+
+    @abc.abstractmethod
+    def get_uboot_version(self):
+        """Get UBOOT version from SONiC
+        :returns: version string
+        """
+        return
+
+    # @fw_type MANDATORY, firmware type, should be one of the strings: 'cpld', 'fpga', 'bios', 'bmc'
+    # @fw_path MANDATORY, target firmware file
+    # @fw_extra OPTIONAL, extra information string,
+    #           for fw_type 'cpld' and 'fpga': it can be used to indicate specific cpld, such as 'cpld1', 'cpld2', ...
+    #               or 'cpld_fan_come_board', etc. For fw_type 'bios' and 'bmc', value should be one of 'master'
+    #               or 'slave' or 'both'. For BMC, 'pingpong' stands for alternative upgrade policy.
+    @abc.abstractmethod
+    def firmware_upgrade(self, fw_type, fw_path, fw_extra):
+        return
+
+    # Get last firmware upgrade information, inlcudes:
+    # 1) FwType: cpld/fpga/bios/bmc(passed by method 'firmware_upgrade'), string
+    # 2) FwPath: path and file name of firmware(passed by method 'firmware_upgrade'), string
+    # 3) FwExtra: designated string, econdings of this string is determined by vendor(passed by method 'firmware_upgrade')
+    # 4) Result: indicates whether the upgrade action is performed and success/failure status if performed. Values should be one of: "DONE"/"FAILED"/"NOT_PERFORMED".
+    # dict object:
+    # {
+    # "FwType": "cpld",
+    # "FwExtra": "specific_encoded_string"
+    # "Result": "DONE"/"FAILED"/"NOT_PERFORMED"
+    # }
+    @abc.abstractmethod
+    def get_last_upgrade_result(self):
+        return
+
+    # Program FPGA and/or CPLD firmware only, but do not refresh them
+    #
+    # @param fw_type value can be: FPGA, CPLD
+    # @param fw_path a string of firmware file path, seperated by ':'
+    # @param fw_extra a string of firmware subtype, i.e CPU_CPLD, BOARD_CPLD,
+    #                 FAN_CPLD, LC_CPLD, etc. Subtypes are seperated by ':',
+    #                 the sequence should match the file nanmes in param @fw_path
+    # @return True when all required firmware is program succefully,
+    #         False otherwise.
+    #
+    # Example:
+    #     self.firmware_program("CPLD", "/cpu_cpld.vme:/lc_cpld", \
+    #                           "CPU_CPLD:LC_CPLD")
+    #     or
+    #     self.firmware_program("FPGA", "/fpga.bin", "FPGA")
+    @abc.abstractmethod
+    def firmware_program(self, fw_type, fw_path, fw_extra=None):
+        return
+
+    # Refresh firmware and take extra action when necessary.
+    # @param fpga_list a list of FPGA names
+    # @param cpld_list a list of CPLD names
+    # @return True if refresh succefully
+    #
+    # @Note extra action:
+    #       1) response OK to restful call
+    #       2) shutdown eth0.4088(keep eth0 working)
+    #       3) shutdown SFP power
+    #       4) power off all(CPU, switch, gearbox)
+    #       5) if power off fpga is supported:
+    #              power off fpga
+    #          else:
+    #              refresh fpga
+    #       6) refresh linecard cpld, fan cpld
+    #       7) refresh cpu cpld, baseboard cpld
+    #       8) power on all
+    #       9) bring up eth0.4088
+    #
+    # Example:
+    #    self.firmware_refresh(["FPGA"], ["CPU_CPLD", "LC_CPLD"], "/tmp/fw/refresh.vme")
+    #    or
+    #    self.firmware_refresh(["FPGA"], None, None)
+    #    or
+    #    self.firmware_refresh(None, ["FAN_CPLD", "LC1_CPLD", "BOARD_CPLD"], "/tmp/fw/refresh.vme")
+    @abc.abstractmethod
+    def firmware_refresh(self, fpga_list, cpld_list, fw_extra=None):
+        return
+
+    # Get booting flash of running BMC.
+    # @return a string, "master" or "slave"
+    @abc.abstractmethod
+    def get_running_bmc(self):
+        return
+
+    # Set booting flash of BMC
+    # @param flash should be "master" or "slave"
+    @abc.abstractmethod
+    def set_bmc_boot_flash(self, flash):
+        return
+
+    # Reboot BMC
+    @abc.abstractmethod
+    def reboot_bmc(self):
+        return
+
+    # Get booting uboot image of current running host OS
+    # @return a string, "master" or "slave"
+    @abc.abstractmethod
+    def get_current_uboot(self):
+        return
diff --git a/platform/centec-arm64/sonic-platform-modules-micas/common_custom/common_micas/lib/wbutil/__init__.py b/platform/centec-arm64/sonic-platform-modules-micas/common_custom/common_micas/lib/wbutil/__init__.py
new file mode 100644
index 000000000..e69de29bb
diff --git a/platform/centec-arm64/sonic-platform-modules-micas/common_custom/common_micas/lib/wbutil/platformutil.py b/platform/centec-arm64/sonic-platform-modules-micas/common_custom/common_micas/lib/wbutil/platformutil.py
new file mode 100644
index 000000000..d5c3e7a4e
--- /dev/null
+++ b/platform/centec-arm64/sonic-platform-modules-micas/common_custom/common_micas/lib/wbutil/platformutil.py
@@ -0,0 +1,290 @@
+#!/usr/bin/python
+# -*- coding: UTF-8 -*-
+
+import os
+import re
+import time
+import mmap
+configfile_pre   =  "/usr/local/bin/"
+import sys
+sys.path.append(configfile_pre)
+from platform_config import *
+import subprocess
+import pexpect
+import shlex
+
+SYSLOG_IDENTIFIER = "UTILTOOL"
+
+def os_system(cmd):
+    status, output = subprocess.getstatusoutput(cmd)
+    return status, output
+
+def get_machine_info():
+    if not os.path.isfile('/host/machine.conf'):
+        return None
+    machine_vars = {}
+    with open('/host/machine.conf') as machine_file:
+        for line in machine_file:
+            tokens = line.split('=')
+            if len(tokens) < 2:
+                continue
+            machine_vars[tokens[0]] = tokens[1].strip()
+    return machine_vars
+
+def get_platform_info(machine_info):
+    if machine_info != None:
+        if machine_info.__contains__('onie_platform'):
+            return  machine_info['onie_platform']
+        elif machine_info.__contains__('aboot_platform'):
+            return machine_info['aboot_platform']
+    return None
+
+'''
+def cpld_version_restful(url):
+    if url == "" or len(url) <=0:
+        print("invalid url")
+        return
+    bmc = BMCMessage()
+    value = bmc.getBmcValue(url)
+    json_dicts=json.dumps(value,indent=4)
+    return json_dicts
+'''
+
+def lpc_cpld_rd(reg_addr):
+    try:
+        regaddr = 0
+        if type(reg_addr) == int:
+            regaddr = reg_addr
+        else:
+            regaddr = int(reg_addr, 16)
+        devfile = "/dev/lpc_cpld"
+        fd = os.open(devfile, os.O_RDWR|os.O_CREAT)
+        os.lseek(fd, regaddr, os.SEEK_SET)
+        str = os.read(fd, 1)
+        os.close(fd)
+        return "%02x" % ord(str)
+    except ValueError:
+        return None
+    except Exception as e:
+        print (e)
+        return None
+
+
+def my_log(txt):
+    if DEBUG == True:
+        print ("[PLATFORM]:",)
+        print (txt)
+    return
+
+def log_os_system(cmd, show):
+    my_log ('         Run :'+ cmd)
+    status, output = subprocess.getstatusoutput(cmd)
+    my_log (" with result :" + str(status))
+    my_log ("      output :" + output)
+    if status:
+        log_error('Failed :%s msg:%s'%(cmd,output))
+        if show:
+            print ('Failed :'+ cmd)
+    return  status, output
+
+def password_command(cmd, password, exec_timeout=30):
+
+    newkey = 'continue connecting'
+    log_os_system("rm -rf ~/.ssh", 0)
+    msg = ""
+    try_times = 3
+    try_times_conter = try_times
+    while try_times_conter:
+        child = pexpect.spawn(cmd)
+        if try_times != try_times_conter:
+            time.sleep(5)
+        try_times_conter -= 1
+        try:
+            i = child.expect([pexpect.TIMEOUT, newkey, 'password: ',"refused",pexpect.EOF],timeout=30)
+            # If the login times out, print an error message and exit.
+            if i == 0: # Timeout
+                msg = 'connect to BMC timeout'
+                continue
+            # no public key
+            if i == 1:
+                child.sendline ('yes')
+                i = child.expect([pexpect.TIMEOUT, 'password: '],timeout=30)
+                if i == 0: # Timeout
+                    msg = 'connect to BMC timeout'
+                    continue
+                if i == 1:# Go below and enter the logic of the password
+                    i = 2
+            if i == 2: # Enter the password
+                child.sendline (password)
+                i = child.expect([pexpect.EOF, pexpect.TIMEOUT], exec_timeout)
+                if i == 0:
+                    return True,child.before
+                if i == 1:
+                    msg = str(child.before)+"\nBMC run commands timeout"
+                    return False,msg
+            if i == 3: # BMC Connection refused
+                msg =  'connect to BMC failed'
+                continue
+            if i == 4:
+                msg = child.before
+        except Exception as e:
+            msg = str(child.before)+"\nconnect to BMC failed"
+
+    return False,msg
+
+def password_command_realtime(ssh_header, ssh_cmd, password,key_words, exec_timeout=30):
+
+    key_word_end = key_words.get("key_word_end")
+    key_word_pass = key_words.get("key_word_pass")
+    key_word_noshow = key_words.get("key_word_noshow")
+    # Prevents waiting caused by BMC restart
+    key_word_exit = key_words.get("key_word_exit")
+
+    if None in [key_word_end,key_word_pass]:
+        print ("Missing parameters")
+        return False
+
+    newkey = 'continue connecting'
+    log_os_system("rm -rf ~/.ssh", 0)
+    msg = ""
+    try_times = 3
+    key_word_pass_flag = False
+    try_times_conter = try_times
+    child = pexpect.spawn(ssh_header)
+    try:
+        i = child.expect([pexpect.TIMEOUT,newkey, 'password: ',"refused",pexpect.EOF],timeout=30)
+        # If the login times out, print an error message and exit.
+        if i == 0: # Timeout
+            msg = 'connect to BMC timeout'
+        # no public key
+        if i == 1:
+            child.sendline ('yes')
+            i = child.expect([pexpect.TIMEOUT, 'password: '],timeout=30)
+            if i == 0: # Timeout
+                msg = 'connect to BMC timeout'
+            if i == 1:# Go below and enter the logic of the password
+                i = 2
+
+        if i == 2: # Enter the password
+            child.sendline (password)
+            i = child.expect([pexpect.EOF, "\r",pexpect.TIMEOUT], exec_timeout)
+            if i == 0:
+                print (child.before)
+                return key_word_pass_flag
+            if i == 1:
+                child.sendline(ssh_cmd)
+                # amount received is similar to root@switch2 in order to avoid misjudgment about the end of execution
+                usr_symble_first = True
+                bmc_str_tmp=""
+                while True:
+                    i = child.expect([pexpect.EOF,"\r","\n",key_word_end, pexpect.TIMEOUT], exec_timeout)
+                    if i == 0:
+                        return key_word_pass_flag
+                    elif i in [1,2]:
+                        if key_word_noshow == None or key_word_noshow not in child.before:
+                             bmc_str, times = re.subn("\r|\n","",child.before)
+                             if len(bmc_str) > 1:
+                                 print (bmc_str)
+                                 bmc_str_tmp=bmc_str_tmp + bmc_str
+                                # print bmc_str_tmp
+                       # if key_word_pass in child.before:
+                        if re.search(key_word_pass,bmc_str_tmp) != None:
+                            key_word_pass_flag = True
+                        if key_word_exit != None and key_word_exit in child.before:
+                            # Give the BMC time to execute the last command
+                            time.sleep(3)
+                            return key_word_pass_flag
+                    elif i == 3 :
+                        if usr_symble_first:
+                            usr_symble_first = False
+                        else:
+                            return key_word_pass_flag
+
+        if i == 3: # BMC Connection refused
+            msg =  'connect to BMC failed'
+        if i == 4:
+            msg = child.before
+    except Exception as e:
+        print (e)
+        msg = str(child.before)+"\nconnect to BMC error"
+        print (msg)
+
+    return False
+
+def get_sys_execute2(cmd, key_word_pass):
+    # key_word_pass_flag1 = False
+    key_word_pass_flag = False
+    filename = "/tmp/diag_excute_out"
+    cmd = cmd + "|tee %s" % filename
+    p =  subprocess.Popen(shlex.split(cmd), shell=False)
+    p.wait()
+    with open(filename, 'r') as f:
+        str1 = f.read()
+        if key_word_pass in str1:
+            key_word_pass_flag = True
+       # if key_word_pass_flag1 and "100%" in str1:
+          # key_word_pass_flag = True
+    log_os_system("rm %s"%filename,0)
+    return key_word_pass_flag
+
+
+BMC_PATH = "PATH=/usr/sbin/:/bin/:/usr/bin/:/sbin"
+RETURN_KEY1       = "code"
+RETURN_KEY2       = "msg"
+DEBUG             = False
+
+def wbi2cget(bus, devno, address):
+    command_line = "i2cget -f -y %d 0x%02x 0x%02x " % (bus, devno, address)
+    retrytime = 6
+    ret_t = ""
+    for i in range(retrytime):
+        ret, ret_t = os_system(command_line)
+        if ret == 0:
+            return True, ret_t
+        time.sleep(0.1)
+    return False, ret_t
+
+def strtoint(str):  # Hexadecimal string to int,"4040"/"0x4040"/"0X4040" = 16448
+    value = 0
+    rest_v = str.replace("0X", "").replace("0x", "")
+    for index in range(len(rest_v)):
+        value |= int(rest_v[index], 16) << ((len(rest_v) - index - 1) * 4)
+    return value
+
+def pci_read(pcibus, slot,  fn , bar, offset):
+    if offset % 4 != 0:
+        return None
+    filename = "/sys/bus/pci/devices/0000:%02x:%02x.%x/resource%d" % (int(pcibus), int(slot), int(fn), int(bar))
+    file = open(filename, "r+")
+    size = os.path.getsize(filename)
+    data = mmap.mmap(file.fileno(), size)
+    result = data[offset: offset + 4]
+    s = result[::-1]
+    val = 0
+    for i in range(0, len(s)):
+        val = val << 8  | ord(s[i])
+    data.close()
+    file.close()
+    return val
+
+###########################################
+# Run the DMI command to obtain the BIOS information
+###########################################
+def getDmiSysByType(type_t):
+    ret, log = os_system("which dmidecode ")
+    if ret != 0 or len(log) <= 0:
+        error = "cmd find dmidecode"
+        return False, error
+    cmd = log + " -t %s" % type_t
+    # Get the total first
+    ret1, log1 = os_system(cmd)
+    if ret != 0 or len(log1) <= 0:
+        return False, "Command error[%s]" % cmd
+    its = log1.replace("\t", "").strip().split("\n")
+    ret = {}
+    for it in its:
+        if ":" in it:
+            key = it.split(":")[0].lstrip()
+            value = it.split(":")[1].lstrip()
+            ret[key] = value
+    return True, ret
diff --git a/platform/centec-arm64/sonic-platform-modules-micas/common_custom/common_micas/script/ctccmd b/platform/centec-arm64/sonic-platform-modules-micas/common_custom/common_micas/script/ctccmd
new file mode 100755
index 000000000..2c4410a16
--- /dev/null
+++ b/platform/centec-arm64/sonic-platform-modules-micas/common_custom/common_micas/script/ctccmd
@@ -0,0 +1,3 @@
+#! /bin/bash
+
+docker exec -i syncd ctc_shell -e "$@"
\ No newline at end of file
diff --git a/platform/centec-arm64/sonic-platform-modules-micas/common_custom/common_micas/script/privatenetwork.py b/platform/centec-arm64/sonic-platform-modules-micas/common_custom/common_micas/script/privatenetwork.py
new file mode 100644
index 000000000..b498818b2
--- /dev/null
+++ b/platform/centec-arm64/sonic-platform-modules-micas/common_custom/common_micas/script/privatenetwork.py
@@ -0,0 +1,50 @@
+#!/usr/bin/python
+# -*- coding: UTF-8 -*-
+import sys
+import os
+import re
+try:
+    from sonic_platform import get_machine_info
+    from sonic_platform import get_platform_info
+except ImportError :
+    try:
+        from sonic_device_util import get_machine_info
+        from sonic_device_util import get_platform_info
+    except ImportError:
+        from sonic_py_common import device_info
+        def get_machine_info():
+            print("get_machine_info is null")
+            return False
+        def get_platform_info(x):
+            return device_info.get_platform()
+
+def start():
+    x = get_platform_info(get_machine_info())
+    print (x)
+    str = re.findall(r"-(.+?)_",x)
+    print (str[0])
+    if str[0] == 'micas':
+        print ("Start privatenetwork.sh")
+        os.system("/usr/local/bin/privatenetwork.sh start")
+    else:
+        print ("Not set private network.")
+def stop():
+    x = get_platform_info(get_machine_info())
+    print (x)
+    str = re.findall(r"-(.+?)_",x)
+    print (str[0])
+    if str[0] == 'micas':
+        print ("Stop privatenetwork.sh")
+        os.system("/usr/local/bin/privatenetwork.sh stop")
+    else:
+        print ("Not stop private network.")
+def main():
+    print (sys.argv[1])
+    if sys.argv[1]=='start':
+        start()
+    elif sys.argv[1]=='stop':
+        stop()
+    else:
+        print ("Error parameter!\nRequired parameters : start or stop.")
+if __name__ == '__main__':
+    main()
diff --git a/platform/centec-arm64/sonic-platform-modules-micas/common_custom/common_micas/script/privatenetwork.sh b/platform/centec-arm64/sonic-platform-modules-micas/common_custom/common_micas/script/privatenetwork.sh
new file mode 100644
index 000000000..4105dcbff
--- /dev/null
+++ b/platform/centec-arm64/sonic-platform-modules-micas/common_custom/common_micas/script/privatenetwork.sh
@@ -0,0 +1,26 @@
+#!/bin/bash
+
+function load_eth0.4088(){
+    try_times_remain=5
+    state_up=$(ip -d link show eth0.4088 | awk '/state UP/{print $2}')
+    while [ -z "$state_up" ] && [ $try_times_remain -ne 0 ]
+    do
+        ((try_times_remain-=1))
+        ip link add link eth0 name eth0.4088 type vlan id 4088 || true
+        ip addr add 240.1.1.2/30 brd 240.1.1.3 dev eth0.4088 || true
+        ip link set dev eth0.4088 up || true
+        state_up=$(ip -d link show eth0.4088 | awk '/state UP/{print $2}')
+        sleep 1
+    done
+}
+
+function unload_eth0.4088(){
+    ip link set dev eth0.4088 down
+    ip link del eth0.4088
+}
+
+if [ "$1" = "start" ];then
+    load_eth0.4088
+elif [ "$1" = "stop" ];then
+    unload_eth0.4088
+fi
diff --git a/platform/centec-arm64/sonic-platform-modules-micas/common_custom/common_micas/script/update_machine_config.sh b/platform/centec-arm64/sonic-platform-modules-micas/common_custom/common_micas/script/update_machine_config.sh
new file mode 100644
index 000000000..933e7cc35
--- /dev/null
+++ b/platform/centec-arm64/sonic-platform-modules-micas/common_custom/common_micas/script/update_machine_config.sh
@@ -0,0 +1,24 @@
+#!/bin/bash
+onie_dev=$(blkid | grep ONIE-BOOT | head -n 1 | awk '{print $1}' |  sed -e 's/:.*$//')
+mkdir -p /mnt/onie-boot
+mount $onie_dev /mnt/onie-boot
+onie_grub_cfg=/mnt/onie-boot/onie/grub/grub-machine.cfg
+
+if [ ! -e $onie_grub_cfg ]; then
+    echo "$onie_grub_cfg not found"
+else
+    oldoniebuilddate=`cat /host/machine.conf|grep "onie_build_date="`
+    oniebuilddate=`cat $onie_grub_cfg|grep "onie_build_date="|sed "s/\"//g"`
+    onieversion=`cat $onie_grub_cfg|grep "onie_version="`
+    oniekernelversion=`cat $onie_grub_cfg|grep "onie_kernel_version="`
+    if [ "$oldoniebuilddate" != "$oniebuilddate" ]; then
+        echo "update /home/machine.conf"
+        sed -i "s/onie_build_date=.*/$oniebuilddate/" /host/machine.conf
+        sed -i "s/onie_version=.*/$onieversion/" /host/machine.conf
+        sed -i "s/onie_kernel_version=.*/$oniekernelversion/" /host/machine.conf
+        sed -i "s/\"//g" /host/machine.conf
+    fi
+fi
+umount /mnt/onie-boot
+
+
diff --git a/platform/centec-arm64/sonic-platform-modules-micas/common_custom/common_micas/service/privatenetwork.service b/platform/centec-arm64/sonic-platform-modules-micas/common_custom/common_micas/service/privatenetwork.service
new file mode 100644
index 000000000..b73d00304
--- /dev/null
+++ b/platform/centec-arm64/sonic-platform-modules-micas/common_custom/common_micas/service/privatenetwork.service
@@ -0,0 +1,13 @@
+[Unit]
+Description=Update interfaces configuration for adding eth0 private subnetwork
+After=network.target m2-w6010-48gt4x_platform.service
+DefaultDependencies=no
+
+[Service]
+Type=oneshot
+ExecStart=/usr/local/bin/privatenetwork.py start
+ExecStop=/usr/local/bin/privatenetwork.py stop
+RemainAfterExit=yes
+
+[Install]
+WantedBy=multi-user.target
diff --git a/platform/centec-arm64/sonic-platform-modules-micas/debian/changelog b/platform/centec-arm64/sonic-platform-modules-micas/debian/changelog
new file mode 100755
index 000000000..ee4b9abf6
--- /dev/null
+++ b/platform/centec-arm64/sonic-platform-modules-micas/debian/changelog
@@ -0,0 +1,6 @@
+sonic-centec-platform-modules (1.3) unstable; urgency=low
+
+  * Add support for centec platform
+
+ -- sonic_rd <sonic>  Mon, 21 Sep 2020 13:34:33 +0800
+
diff --git a/platform/centec-arm64/sonic-platform-modules-micas/debian/compat b/platform/centec-arm64/sonic-platform-modules-micas/debian/compat
new file mode 100644
index 000000000..f599e28b8
--- /dev/null
+++ b/platform/centec-arm64/sonic-platform-modules-micas/debian/compat
@@ -0,0 +1 @@
+10
diff --git a/platform/centec-arm64/sonic-platform-modules-micas/debian/control b/platform/centec-arm64/sonic-platform-modules-micas/debian/control
new file mode 100644
index 000000000..776b15d4e
--- /dev/null
+++ b/platform/centec-arm64/sonic-platform-modules-micas/debian/control
@@ -0,0 +1,14 @@
+Source: sonic-centec-platform-modules
+Section: main
+Priority: extra
+Maintainer: shil <shil@centecnetworks.com>
+Build-Depends: debhelper (>= 8.0.0), bzip2
+Standards-Version: 3.9.3
+
+Package: platform-modules-micas-m2-w6010-48gt4x-fa
+Architecture: arm64
+Description: kernel modules for platform devices such as fan, led, sfp
+
+Package: platform-modules-micas-m2-w6010-48gt4x-ra
+Architecture: arm64
+Description: kernel modules for platform devices such as fan, led, sfp
diff --git a/platform/centec-arm64/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6010-48gt4x-fa.init b/platform/centec-arm64/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6010-48gt4x-fa.init
new file mode 100644
index 000000000..cd7d03667
--- /dev/null
+++ b/platform/centec-arm64/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6010-48gt4x-fa.init
@@ -0,0 +1,61 @@
+#!/bin/bash
+# This script load/unload centec kernel modules
+
+function install_python_api_package()
+{
+    device="/usr/share/sonic/device"
+    platform=$(/usr/local/bin/sonic-cfggen -H -v DEVICE_METADATA.localhost.platform)
+
+    rv=$(pip3 show sonic-platform > /dev/null 2>/dev/null)
+    if [ $? -ne 0 ]; then
+        echo -n "Install sonic_platform-1.0-py3-none-any.whl ..."
+        rv=$(pip3 install $device/$platform/sonic_platform-1.0-py3-none-any.whl)
+    fi
+}
+
+function load_kernel_modules()
+{
+    hwaddr=`fw_printenv ethaddr | awk -F = '{print $2}'`
+    if [ "$hwaddr" != "" ]; then
+        ifconfig eth0 hw ether $hwaddr
+    fi
+    depmod -a
+    modprobe dal
+    modprobe psample
+}
+
+function remove_kernel_modules()
+{
+    modprobe -r dal
+}
+
+case "$1" in
+start)
+    echo -n "Load Centec kernel modules... "
+
+    load_kernel_modules
+    install_python_api_package
+
+    echo "done."
+    ;;
+
+stop)
+    echo -n "Unload Centec kernel modules... "
+
+    remove_kernel_modules
+
+    echo "done."
+    ;;
+
+force-reload|restart)
+    echo "Not supported"
+    ;;
+
+*)
+    echo "Usage: /etc/init.d/platform-modules-micas-m2-w6010-48gt4x-fa {start|stop}"
+    exit 1
+    ;;
+esac
+
+exit 0
+
diff --git a/platform/centec-arm64/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6010-48gt4x-fa.install b/platform/centec-arm64/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6010-48gt4x-fa.install
new file mode 100644
index 000000000..918f5b872
--- /dev/null
+++ b/platform/centec-arm64/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6010-48gt4x-fa.install
@@ -0,0 +1,2 @@
+m2-w6010-48gt4x-fa/modules/sonic_platform-1.0-py3-none-any.whl usr/share/sonic/device/arm64-micas_m2-w6010-48gt4x-fa-r0
+
diff --git a/platform/centec-arm64/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6010-48gt4x-fa.postinst b/platform/centec-arm64/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6010-48gt4x-fa.postinst
new file mode 100644
index 000000000..67f1fe08e
--- /dev/null
+++ b/platform/centec-arm64/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6010-48gt4x-fa.postinst
@@ -0,0 +1,8 @@
+systemctl enable m2-w6010-48gt4x_platform.service
+systemctl start m2-w6010-48gt4x_platform.service
+systemctl enable device_i2c.service
+systemctl start device_i2c.service
+systemctl enable privatenetwork.service
+systemctl start privatenetwork.service
+systemctl enable fancontrol.service
+systemctl start fancontrol.service
diff --git a/platform/centec-arm64/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6010-48gt4x-ra.init b/platform/centec-arm64/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6010-48gt4x-ra.init
new file mode 100644
index 000000000..91dcc47dc
--- /dev/null
+++ b/platform/centec-arm64/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6010-48gt4x-ra.init
@@ -0,0 +1,61 @@
+#!/bin/bash
+# This script load/unload centec kernel modules
+
+function install_python_api_package()
+{
+    device="/usr/share/sonic/device"
+    platform=$(/usr/local/bin/sonic-cfggen -H -v DEVICE_METADATA.localhost.platform)
+
+    rv=$(pip3 show sonic-platform > /dev/null 2>/dev/null)
+    if [ $? -ne 0 ]; then
+        echo -n "Install sonic_platform-1.0-py3-none-any.whl ..."
+        rv=$(pip3 install $device/$platform/sonic_platform-1.0-py3-none-any.whl)
+    fi
+}
+
+function load_kernel_modules()
+{
+    hwaddr=`fw_printenv ethaddr | awk -F = '{print $2}'`
+    if [ "$hwaddr" != "" ]; then
+        ifconfig eth0 hw ether $hwaddr
+    fi
+    depmod -a
+    modprobe dal
+    modprobe psample
+}
+
+function remove_kernel_modules()
+{
+    modprobe -r dal
+}
+
+case "$1" in
+start)
+    echo -n "Load Centec kernel modules... "
+
+    load_kernel_modules
+    install_python_api_package
+
+    echo "done."
+    ;;
+
+stop)
+    echo -n "Unload Centec kernel modules... "
+
+    remove_kernel_modules
+
+    echo "done."
+    ;;
+
+force-reload|restart)
+    echo "Not supported"
+    ;;
+
+*)
+    echo "Usage: /etc/init.d/platform-modules-micas-m2-w6010-48gt4x-ra {start|stop}"
+    exit 1
+    ;;
+esac
+
+exit 0
+
diff --git a/platform/centec-arm64/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6010-48gt4x-ra.install b/platform/centec-arm64/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6010-48gt4x-ra.install
new file mode 100644
index 000000000..3700a6fc8
--- /dev/null
+++ b/platform/centec-arm64/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6010-48gt4x-ra.install
@@ -0,0 +1,2 @@
+m2-w6010-48gt4x-ra/modules/sonic_platform-1.0-py3-none-any.whl usr/share/sonic/device/arm64-micas_m2-w6010-48gt4x-ra-r0
+
diff --git a/platform/centec-arm64/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6010-48gt4x-ra.postinst b/platform/centec-arm64/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6010-48gt4x-ra.postinst
new file mode 100644
index 000000000..67f1fe08e
--- /dev/null
+++ b/platform/centec-arm64/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6010-48gt4x-ra.postinst
@@ -0,0 +1,8 @@
+systemctl enable m2-w6010-48gt4x_platform.service
+systemctl start m2-w6010-48gt4x_platform.service
+systemctl enable device_i2c.service
+systemctl start device_i2c.service
+systemctl enable privatenetwork.service
+systemctl start privatenetwork.service
+systemctl enable fancontrol.service
+systemctl start fancontrol.service
diff --git a/platform/centec-arm64/sonic-platform-modules-micas/debian/rules b/platform/centec-arm64/sonic-platform-modules-micas/debian/rules
new file mode 100755
index 000000000..b62824e82
--- /dev/null
+++ b/platform/centec-arm64/sonic-platform-modules-micas/debian/rules
@@ -0,0 +1,114 @@
+#!/usr/bin/make -f
+# -*- makefile -*-
+# Sample debian/rules that uses debhelper.
+# This file was originally written by Joey Hess and Craig Small.
+# As a special exception, when this file is copied by dh-make into a
+# dh-make output file, you may use that output file without restriction.
+# This special exception was added by Craig Small in version 0.37 of dh-make.
+
+include /usr/share/dpkg/pkg-info.mk
+
+# Uncomment this to turn on verbose mode.
+#export DH_VERBOSE=1
+
+export INSTALL_MOD_DIR:=extra
+
+PYTHON         = python3.9
+
+PACKAGE_PRE_NAME := platform-modules-micas
+KVERSION   ?= $(shell uname -r)
+KERNEL_SRC :=  /lib/modules/$(KVERSION)
+MOD_SRC_DIR:= $(shell pwd)
+MODULE_DIRS:= m2-w6010-48gt4x-fa
+MODULE_DIRS_R:= m2-w6010-48gt4x-ra
+MODULE_DIR := common
+CUSTOMS_DIRS := common_custom/common_micas
+SERVICE_DIR := service
+CLASSES_DIR := classes
+CONFIG_DIR := config
+KDAL_DIR := ../../centec/centec-dal/
+export  KERNEL_SRC
+
+
+
+clean:
+	dh_testdir
+	dh_testroot
+	dh_clean
+
+build:
+	#make modules -C $(KERNEL_SRC)/build M=$(MODULE_SRC)
+	(for mod in $(KDAL_DIR); do \
+		make modules -C $(KERNEL_SRC)/build M=$(MOD_SRC_DIR)/$${mod}/; \
+	done)
+	(for mod in $(MODULE_DIRS); do \
+		make modules -C $(KERNEL_SRC)/build M=$(MOD_SRC_DIR)/$${mod}/modules; \
+		cd $${mod}; $(PYTHON) setup.py bdist_wheel -d $(MOD_SRC_DIR)/$${mod}/modules; \
+		cd -; \
+	done)
+	(for mod in $(MODULE_DIRS_R); do \
+		make modules -C $(KERNEL_SRC)/build M=$(MOD_SRC_DIR)/$${mod}/modules; \
+		cd $${mod}; $(PYTHON) setup.py bdist_wheel -d $(MOD_SRC_DIR)/$${mod}/modules; \
+		cd -; \
+	done)
+	make  -C $(MODULE_DIR);
+	make  -C $(CUSTOMS_DIRS);
+
+binary: binary-arch binary-indep
+	# Nothing to do
+
+binary-arch:
+	# Nothing to do
+
+binary-indep:
+	dh_testdir
+	dh_installdirs
+
+	# Custom package commands
+	(for mod in $(MODULE_DIRS); do \
+		dh_installdirs -p$(PACKAGE_PRE_NAME)-$${mod} $(KERNEL_SRC)/$(INSTALL_MOD_DIR); \
+		dh_installdirs -p$(PACKAGE_PRE_NAME)-$${mod} lib/systemd/system; \
+		dh_installdirs -p$(PACKAGE_PRE_NAME)-$${mod} etc; \
+		dh_installdirs -p$(PACKAGE_PRE_NAME)-$${mod} boot; \
+		cp -r $(MOD_SRC_DIR)/$(MODULE_DIR)/build/* debian/$(PACKAGE_PRE_NAME)-$${mod}/; \
+		cp -r $(MOD_SRC_DIR)/$(CUSTOMS_DIRS)/build/* debian/$(PACKAGE_PRE_NAME)-$${mod}/; \
+		cp $(MOD_SRC_DIR)/$${mod}/config/* debian/$(PACKAGE_PRE_NAME)-$${mod}/usr/local/bin/; \
+		cp $(MOD_SRC_DIR)/$${mod}/modules/*.ko debian/$(PACKAGE_PRE_NAME)-$${mod}/$(KERNEL_SRC)/$(INSTALL_MOD_DIR); \
+		cp $(MOD_SRC_DIR)/$(KDAL_DIR)/*.ko debian/$(PACKAGE_PRE_NAME)-$${mod}/$(KERNEL_SRC)/$(INSTALL_MOD_DIR); \
+		#cp $(MOD_SRC_DIR)/$${mod}/$(MODULE_DIR)/*.ko debian/$(PACKAGE_PRE_NAME)-$${mod}/$(KERNEL_SRC)/$(INSTALL_MOD_DIR); \
+		cp $(MOD_SRC_DIR)/$${mod}/$(SERVICE_DIR)/*.service debian/$(PACKAGE_PRE_NAME)-$${mod}/lib/systemd/system/; \
+		#cp $(MOD_SRC_DIR)/${CONFIG_DIR}/* debian/$(PACKAGE_PRE_NAME)-$${mod}/etc/; \
+		cd -; \
+	done)
+	(for mod in $(MODULE_DIRS_R); do \
+		dh_installdirs -p$(PACKAGE_PRE_NAME)-$${mod} $(KERNEL_SRC)/$(INSTALL_MOD_DIR); \
+		dh_installdirs -p$(PACKAGE_PRE_NAME)-$${mod} lib/systemd/system; \
+		dh_installdirs -p$(PACKAGE_PRE_NAME)-$${mod} etc; \
+		dh_installdirs -p$(PACKAGE_PRE_NAME)-$${mod} boot; \
+		cp -r $(MOD_SRC_DIR)/$(MODULE_DIR)/build/* debian/$(PACKAGE_PRE_NAME)-$${mod}/; \
+		cp -r $(MOD_SRC_DIR)/$(CUSTOMS_DIRS)/build/* debian/$(PACKAGE_PRE_NAME)-$${mod}/; \
+		cp $(MOD_SRC_DIR)/$${mod}/config/* debian/$(PACKAGE_PRE_NAME)-$${mod}/usr/local/bin/; \
+		cp $(MOD_SRC_DIR)/$${mod}/modules/*.ko debian/$(PACKAGE_PRE_NAME)-$${mod}/$(KERNEL_SRC)/$(INSTALL_MOD_DIR); \
+		cp $(MOD_SRC_DIR)/$(KDAL_DIR)/*.ko debian/$(PACKAGE_PRE_NAME)-$${mod}/$(KERNEL_SRC)/$(INSTALL_MOD_DIR); \
+		#cp $(MOD_SRC_DIR)/$${mod}/$(MODULE_DIR)/*.ko debian/$(PACKAGE_PRE_NAME)-$${mod}/$(KERNEL_SRC)/$(INSTALL_MOD_DIR); \
+		cp $(MOD_SRC_DIR)/$${mod}/$(SERVICE_DIR)/*.service debian/$(PACKAGE_PRE_NAME)-$${mod}/lib/systemd/system/; \
+		#cp $(MOD_SRC_DIR)/${CONFIG_DIR}/* debian/$(PACKAGE_PRE_NAME)-$${mod}/etc/; \
+		cd -; \
+	done)
+	# Resuming debhelper scripts
+	dh_testroot
+	dh_install
+	dh_installchangelogs
+	dh_installdocs
+	dh_systemd_enable
+	dh_installinit
+	dh_systemd_start
+	dh_link
+	dh_fixperms
+	dh_compress
+	dh_strip
+	dh_installdeb
+	dh_gencontrol
+	dh_md5sums
+	dh_builddeb
+.PHONY: build binary binary-arch binary-indep clean
diff --git a/platform/centec-arm64/sonic-platform-modules-micas/m2-w6010-48gt4x-fa/config/arm64_micas_m2_w6010_48gt4x_fa_r0_config.py b/platform/centec-arm64/sonic-platform-modules-micas/m2-w6010-48gt4x-fa/config/arm64_micas_m2_w6010_48gt4x_fa_r0_config.py
new file mode 100755
index 000000000..7c295e139
--- /dev/null
+++ b/platform/centec-arm64/sonic-platform-modules-micas/m2-w6010-48gt4x-fa/config/arm64_micas_m2_w6010_48gt4x_fa_r0_config.py
@@ -0,0 +1,89 @@
+#!/usr/bin/python
+# -*- coding: UTF-8 -*-
+from platform_common import *
+PCA9548START  = -1
+PCA9548BUSEND = -2
+
+PLATFORM_CARDID      = 0x00004065
+PLATFORM_PRODUCTNAME = "M2-W6010-48GT4X-FA"
+PLATFORM_PART_NUMBER    = "01016994"
+PLATFORM_LABEL_REVISION = "R01"
+PLATFORM_ONIE_VERSION   = "2018.05-rc1"
+PLATFORM_MAC_SIZE       = 3
+PLATFORM_MANUF_NAME     = "Micas"
+PLATFORM_MANUF_COUNTRY  = "USA"
+PLATFORM_VENDOR_NAME    = "Micas"
+PLATFORM_DIAG_VERSION   = "0.1.0.15"
+PLATFORM_SERVICE_TAG    = "www.micasnetworks.com"
+
+LOCAL_LED_CONTROL = {
+    "CLOSE":{},
+    "OPEN":{}
+}
+
+MACLED_PARAMS = []
+
+# start system modules
+STARTMODULE  = {
+                "i2ccheck":0,
+                "fancontrol":0,
+                "avscontrol":0,
+                "avscontrol_restful":0,
+                "sfptempmodule":0,
+                "sfptempmodule_interval":3,
+                "macledreset": 0,
+                "macledreset_interval": 5,
+                "macledset_param":MACLED_PARAMS,
+                }
+
+FRULISTS = [
+            {"name":"mmceeprom","bus":5,"loc":0x50, "E2PRODUCT":'2', "E2TYPE":'5' , "CANRESET":'1'},
+            {"name":"cpueeprom","bus":5,"loc":0x57,"E2PRODUCT":'2', "E2TYPE":'4', "CANRESET":'1' },
+        ]
+
+# eeprom  = "1-0056/eeprom"
+E2_LOC = {"bus":1, "devno":0x56}
+E2_PROTECT = {}
+
+
+CPLDVERSIONS = [
+        {"bus":2, "devno":0x0d, "name":"CPU_CPLD"},
+		{"bus":3, "devno":0x30, "name":"MAC_BOARD_CPLD_1"},
+]
+
+FIRMWARE_TOOLS = {"cpld":  [{"channel":"0","cmd":"firmware_upgrade %s cpld %s cpld", "successtips":"CPLD Upgrade succeeded!"}
+                           ],
+              }
+
+# drivers list
+DRIVERLISTS = [
+        {"name":"i2c_dev", "delay":0},
+        {"name":"i2c_algo_bit","delay":0},
+        {"name":"spi-bitbang", "delay":0},
+        {"name":"i2c_mux", "delay":0},
+        {"name":"rtcpcf85063", "delay":0},
+        {"name":"i2c_mux_pca954x", "delay":0}, # force_deselect_on_exit=1
+        {"name":"platform_common dfd_my_type=0x4065", "delay":0},
+        {"name":"wb_cpld", "delay":0},
+        {"name":"wb_at24", "delay":0},
+        {"name":"optoe", "delay":0},
+]
+
+DEVICE = [
+        {"name":"rtcpcf85063","bus":1,"loc":0x51 },
+        {"name":"wb_24c02","bus":1,"loc":0x56 },
+        {"name":"wb_cpld","bus":3,"loc":0x30 },
+        {"name":"wb_24c02","bus":5,"loc":0x50 },
+        {"name":"wb_24c02","bus":5,"loc":0x57 },
+]
+
+INIT_PARAM = [
+    {"loc":"3-0030/tx_write_protect","value": "59","delay":1},
+    {"loc":"3-0030/tx_disable","value": "00"},
+    {"loc":"3-0030/tx_write_protect","value": "4e"},
+]
+
+INIT_COMMAND = [
+    "hwclock -s",
+]
+
diff --git a/platform/centec-arm64/sonic-platform-modules-micas/m2-w6010-48gt4x-fa/config/fan_ctrl_cfg.json b/platform/centec-arm64/sonic-platform-modules-micas/m2-w6010-48gt4x-fa/config/fan_ctrl_cfg.json
new file mode 100644
index 000000000..86fcf892f
--- /dev/null
+++ b/platform/centec-arm64/sonic-platform-modules-micas/m2-w6010-48gt4x-fa/config/fan_ctrl_cfg.json
@@ -0,0 +1,40 @@
+{
+    "Device": {
+        "Liquid": 0,
+        "Buildin": 1,
+        "PID": 0,
+        "OpenLoop": 1
+    },
+    "Thermal": {
+        "INLET_TEMP": "INLET_TEMP",
+        "OUTLET_TEMP": "OUTLET_TEMP",
+        "SWITCH_TEMP": "TPS53688_TEMP"
+    },
+    "Fans": {
+        "Fan1" : "Fantray1_1",
+        "Fan2" : "Fantray2_1"
+    },
+    "PID": {
+        "Pwm_Max": 99,
+        "Pwm_Min": 30,
+        "SetPoint" : 90,
+        "P": 1.5,
+        "I": 1,
+        "D": 0.3,
+        "Temp_Min": 28.0,
+        "Temp_Max": 45.0,
+        "Sensor": "TPS53688_TEMP"
+    },
+    "OpenLoop": {
+        "a": -0.06,
+        "b": 10.3,
+        "c": -142.0,
+        "fix_up": -8,
+        "pwmMax": 99,
+        "pwmMin": 30,
+        "tempMin": 25
+    },
+    "FanError": {
+        "Fan_Pwmmax":99
+    }
+}
\ No newline at end of file
diff --git a/platform/centec-arm64/sonic-platform-modules-micas/m2-w6010-48gt4x-fa/service/m2-w6010-48gt4x_platform.service b/platform/centec-arm64/sonic-platform-modules-micas/m2-w6010-48gt4x-fa/service/m2-w6010-48gt4x_platform.service
new file mode 100644
index 000000000..ca2bf9f2c
--- /dev/null
+++ b/platform/centec-arm64/sonic-platform-modules-micas/m2-w6010-48gt4x-fa/service/m2-w6010-48gt4x_platform.service
@@ -0,0 +1,13 @@
+[Unit]
+Description=Centec modules init
+After=local-fs.target
+Before=syncd.service
+
+[Service]
+Type=oneshot
+ExecStart=-/etc/init.d/platform-modules-micas-m2-w6010-48gt4x-fa start
+ExecStop=-/etc/init.d/platform-modules-micas-m2-w6010-48gt4x-fa stop
+RemainAfterExit=yes
+
+[Install]
+WantedBy=multi-user.target
diff --git a/platform/centec-arm64/sonic-platform-modules-micas/m2-w6010-48gt4x-fa/setup.py b/platform/centec-arm64/sonic-platform-modules-micas/m2-w6010-48gt4x-fa/setup.py
new file mode 100644
index 000000000..b8aab8203
--- /dev/null
+++ b/platform/centec-arm64/sonic-platform-modules-micas/m2-w6010-48gt4x-fa/setup.py
@@ -0,0 +1,15 @@
+#!/usr/bin/env python
+
+import os
+import sys
+from setuptools import setup
+
+setup(
+    name='sonic_platform',
+    version='1.0',
+    description='Module to initialize centec platforms',
+
+    packages=['sonic_platform'],
+    package_dir={'sonic_platform': 'sonic_platform'},
+)
+
diff --git a/platform/centec-arm64/sonic-platform-modules-micas/m2-w6010-48gt4x-fa/sonic_platform/__init__.py b/platform/centec-arm64/sonic-platform-modules-micas/m2-w6010-48gt4x-fa/sonic_platform/__init__.py
new file mode 100644
index 000000000..4bfefa0fb
--- /dev/null
+++ b/platform/centec-arm64/sonic-platform-modules-micas/m2-w6010-48gt4x-fa/sonic_platform/__init__.py
@@ -0,0 +1,3 @@
+__all__ = ["platform", "chassis"]
+from sonic_platform import *
+
diff --git a/platform/centec-arm64/sonic-platform-modules-micas/m2-w6010-48gt4x-fa/sonic_platform/chassis.py b/platform/centec-arm64/sonic-platform-modules-micas/m2-w6010-48gt4x-fa/sonic_platform/chassis.py
new file mode 100644
index 000000000..8cdf84cf3
--- /dev/null
+++ b/platform/centec-arm64/sonic-platform-modules-micas/m2-w6010-48gt4x-fa/sonic_platform/chassis.py
@@ -0,0 +1,444 @@
+
+#!/usr/bin/env python
+
+try:
+    import time
+    from sonic_platform_base.chassis_base import ChassisBase
+    from sonic_platform.eeprom import Eeprom
+    from sonic_platform.thermal import Thermal
+    from sonic_platform.fan_drawer import FanDrawer
+    from sonic_platform.sfp import Sfp
+    from sonic_platform.psu import Psu
+    from .component import Component
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+NUM_FAN_TRAY = 2
+NUM_FAN = 2
+NUM_THERMAL = 5
+NUM_PORT    = 52
+NUM_PSU = 2
+
+class Chassis(ChassisBase):
+
+    port_dict = {}
+    STATUS_INSERTED = "1"
+    STATUS_REMOVED = "0"
+
+    def __init__(self):
+        ChassisBase.__init__(self)
+        # Initialize EEPROM
+        self._eeprom = Eeprom()
+        #firmware
+        for i in range(0,2):
+            self._component_list.append(Component(i))
+        # Initialize FAN
+        for i in range(NUM_FAN_TRAY):
+            fandrawer = FanDrawer(i)
+            self._fan_drawer_list.append(fandrawer)
+            self._fan_list.extend(fandrawer._fan_list)
+        # Initialize THERMAL
+        for index in range(0, NUM_THERMAL):
+            thermal = Thermal(index)
+            self._thermal_list.append(thermal)
+        # Initialize SFP
+        for index in range(0, NUM_PORT + 1):
+            sfp = Sfp(index)
+            self._sfp_list.append(sfp)
+            if sfp.get_presence():
+                self.port_dict[index] = self.STATUS_INSERTED
+            else:
+                self.port_dict[index] = self.STATUS_REMOVED
+        # Initialize PSU
+        for index in range(0, NUM_PSU):
+            psu = Psu(index)
+            self._psu_list.append(psu)
+
+##############################################
+# Device methods
+##############################################
+
+    def get_name(self):
+        """
+        Retrieves the name of the chassis
+        Returns:
+            string: The name of the chassis
+        """
+        name = ''
+        sys_eeprom = self.get_eeprom()
+        if sys_eeprom is None:
+            return ''
+
+        e = sys_eeprom.read_eeprom()
+        name = sys_eeprom.modelstr(e)
+        if name is None:
+            return ''
+        return name
+
+    def get_presence(self):
+        """
+        Retrieves the presence of the chassis
+        Returns:
+            bool: True if chassis is present, False if not
+        """
+        return True
+
+    def get_model(self):
+        """
+        Retrieves the model number (or part number) of the chassis
+        Returns:
+            string: Model/part number of chassis
+        """
+        model = ''
+        sys_eeprom = self.get_eeprom()
+        if sys_eeprom is None:
+            return ''
+
+        e = sys_eeprom.read_eeprom()
+        model = sys_eeprom.modelnumber(e)
+        if model is None:
+            return ''
+        return model
+
+    def get_serial_number(self):
+        """
+        Retrieves the hardware serial number for the chassis
+
+        Returns:
+            A string containing the hardware serial number for this chassis.
+        """
+        serial_number = ''
+        sys_eeprom = self.get_eeprom()
+        if sys_eeprom is None:
+            return ''
+
+        e = sys_eeprom.read_eeprom()
+        serial_number = sys_eeprom.serial_number_str(e)
+        if serial_number is None:
+            return ''
+
+        return serial_number
+
+    def get_revision(self):
+        """
+        Retrieves the hardware revision of the device
+
+        Returns:
+            string: Revision value of device
+        """
+        device_version = ''
+        sys_eeprom = self.get_eeprom()
+        if sys_eeprom is None:
+            return ''
+
+        e = sys_eeprom.read_eeprom()
+        device_version = sys_eeprom.deviceversion(e)
+        if device_version is None:
+            return ''
+
+        return device_version
+
+    def get_serial(self):
+        """
+        Retrieves the serial number of the chassis (Service tag)
+        Returns:
+            string: Serial number of chassis
+        """
+        return self.get_serial_number()
+
+    def get_status(self):
+        """
+        Retrieves the operational status of the chassis
+        Returns:
+            bool: A boolean value, True if chassis is operating properly
+            False if not
+        """
+        return True
+
+    def get_position_in_parent(self):
+        """
+        Retrieves 1-based relative physical position in parent device. If the agent cannot determine the parent-relative position
+        for some reason, or if the associated value of entPhysicalContainedIn is '0', then the value '-1' is returned
+        Returns:
+            integer: The 1-based relative physical position in parent device or -1 if cannot determine the position
+        """
+        return -1
+
+    def is_replaceable(self):
+        """
+        Indicate whether this device is replaceable.
+        Returns:
+            bool: True if it is replaceable.
+        """
+        return False
+
+    def initizalize_system_led(self):
+        return True
+
+    def get_status_led(self):
+        """
+        Gets the state of the system LED
+
+        Returns:
+            A string, one of the valid LED color strings which could be vendor
+            specified.
+        """
+        return 'green'
+
+    def set_status_led(self, color):
+        return False
+##############################################
+# Chassis methods
+##############################################
+
+    def get_base_mac(self):
+        """
+        Retrieves the base MAC address for the chassis
+
+        Returns:
+            A string containing the MAC address in the format
+            'XX:XX:XX:XX:XX:XX'
+        """
+        base_mac = ''
+        sys_eeprom = self.get_eeprom()
+        if sys_eeprom is None:
+            return ''
+
+        e = sys_eeprom.read_eeprom()
+        base_mac = sys_eeprom.base_mac_addr(e)
+        if base_mac is None:
+            return ''
+
+        return base_mac.upper()
+
+    def get_system_eeprom_info(self):
+        """
+        Retrieves the full content of system EEPROM information for the chassis
+
+        Returns:
+            A dictionary where keys are the type code defined in
+            OCP ONIE TlvInfo EEPROM format and values are their corresponding
+            values.
+            Ex. { '0x21':'AG9064', '0x22':'V1.0', '0x23':'AG9064-0109867821',
+                  '0x24':'001c0f000fcd0a', '0x25':'02/03/2018 16:22:00',
+                  '0x26':'01', '0x27':'REV01', '0x28':'AG9064-C2358-16G'}
+        """
+        sys_eeprom_dict = dict()
+        sys_eeprom = self.get_eeprom()
+        if sys_eeprom is None:
+            return {}
+
+        e = sys_eeprom.read_eeprom()
+        if sys_eeprom._TLV_HDR_ENABLED:
+            if not sys_eeprom.is_valid_tlvinfo_header(e):
+                return {}
+            total_len = (e[9] << 8) | e[10]
+            tlv_index = sys_eeprom._TLV_INFO_HDR_LEN
+            tlv_end = sys_eeprom._TLV_INFO_HDR_LEN + total_len
+        else:
+            tlv_index = sys_eeprom.eeprom_start
+            tlv_end = sys_eeprom._TLV_INFO_MAX_LEN
+
+        while (tlv_index + 2) < len(e) and tlv_index < tlv_end:
+            if not sys_eeprom.is_valid_tlv(e[tlv_index:]):
+                break
+
+            tlv = e[tlv_index:tlv_index + 2 + e[tlv_index + 1]]
+            name, value = sys_eeprom.decoder(None, tlv)
+            sys_eeprom_dict[name] = value
+
+            if e[tlv_index] == sys_eeprom._TLV_CODE_QUANTA_CRC or \
+                    e[tlv_index] == sys_eeprom._TLV_CODE_CRC_32:
+                break
+            tlv_index += e[tlv_index + 1] + 2
+
+        return sys_eeprom_dict
+
+    def get_thermal_manager(self):
+        """
+        Retrieves thermal manager class on this chassis
+        :return: A class derived from ThermalManagerBase representing the
+        specified thermal manager. ThermalManagerBase is returned as default
+        """
+        return False
+
+    def get_reboot_cause(self):
+        """
+        Retrieves the cause of the previous reboot
+        Returns:
+            A tuple (string, string) where the first element is a string
+            containing the cause of the previous reboot. This string must be
+            one of the predefined strings in this class. If the first string
+            is "REBOOT_CAUSE_HARDWARE_OTHER", the second string can be used
+            to pass a description of the reboot cause.
+        """
+        return (None, None)
+
+    def get_module(self, index):
+        """
+        Retrieves module represented by (0-based) index <index>
+
+        Args:
+            index: An integer, the index (0-based) of the module to
+            retrieve
+
+        Returns:
+            An object dervied from ModuleBase representing the specified
+            module
+        """
+        module = None
+
+        try:
+            if self.get_num_modules():
+                module = self._module_list[index]
+        except IndexError:
+            sys.stderr.write("Module index {} out of range (0-{})\n".format(
+                             index, len(self._module_list)-1))
+
+        return module
+
+    def get_fan_drawer(self, index):
+        """
+        Retrieves fan drawers represented by (0-based) index <index>
+
+        Args:
+            index: An integer, the index (0-based) of the fan drawer to
+            retrieve
+
+        Returns:
+            An object dervied from FanDrawerBase representing the specified fan
+            drawer
+        """
+        fan_drawer = None
+
+        try:
+            if self.get_num_fan_drawers():
+                fan_drawer = self._fan_drawer_list[index]
+        except IndexError:
+            sys.stderr.write("Fan drawer index {} out of range (0-{})\n".format(
+                             index, len(self._fan_drawer_list)-1))
+
+        return fan_drawer
+
+    def get_change_event(self, timeout=0):
+        """
+        Returns a nested dictionary containing all devices which have
+        experienced a change at chassis level
+
+        Args:
+            timeout: Timeout in milliseconds (optional). If timeout == 0,
+                this method will block until a change is detected.
+
+        Returns:
+            (bool, dict):
+                - bool: True if call successful, False if not;
+                - dict: A nested dictionary where key is a device type,
+                        value is a dictionary with key:value pairs in the format of
+                        {'device_id':'device_event'}, where device_id is the device ID
+                        for this device and device_event.
+                        The known devices's device_id and device_event was defined as table below.
+                         -----------------------------------------------------------------
+                         device   |     device_id       |  device_event  |  annotate
+                         -----------------------------------------------------------------
+                         'fan'          '<fan number>'     '0'              Fan removed
+                                                           '1'              Fan inserted
+
+                         'sfp'          '<sfp number>'     '0'              Sfp removed
+                                                           '1'              Sfp inserted
+                                                           '2'              I2C bus stuck
+                                                           '3'              Bad eeprom
+                                                           '4'              Unsupported cable
+                                                           '5'              High Temperature
+                                                           '6'              Bad cable
+
+                         'voltage'      '<monitor point>'  '0'              Vout normal
+                                                           '1'              Vout abnormal
+                         --------------------------------------------------------------------
+                  Ex. {'fan':{'0':'0', '2':'1'}, 'sfp':{'11':'0', '12':'1'},
+                       'voltage':{'U20':'0', 'U21':'1'}}
+                  Indicates that:
+                     fan 0 has been removed, fan 2 has been inserted.
+                     sfp 11 has been removed, sfp 12 has been inserted.
+                     monitored voltage U20 became normal, voltage U21 became abnormal.
+                  Note: For sfp, when event 3-6 happened, the module will not be avalaible,
+                        XCVRD shall stop to read eeprom before SFP recovered from error status.
+        """
+
+        change_event_dict = {"fan": {}, "sfp": {}, "voltage": {}}
+
+        start_time = time.time()
+        forever = False
+
+        if timeout == 0:
+            forever = True
+        elif timeout > 0:
+            timeout = timeout / float(1000)  # Convert to secs
+        else:
+            print("get_change_event:Invalid timeout value", timeout)
+            return False, change_event_dict
+
+        end_time = start_time + timeout
+        if start_time > end_time:
+            print(
+                "get_change_event:" "time wrap / invalid timeout value",
+                timeout,
+            )
+            return False, change_event_dict  # Time wrap or possibly incorrect timeout
+        try:
+            while timeout >= 0:
+                # check for sfp
+                sfp_change_dict = self.get_transceiver_change_event()
+                # check for fan
+                # fan_change_dict = self.get_fan_change_event()
+                # check for voltage
+                # voltage_change_dict = self.get_voltage_change_event()
+
+                if sfp_change_dict:
+                    change_event_dict["sfp"] = sfp_change_dict
+                    # change_event_dict["fan"] = fan_change_dict
+                    # change_event_dict["voltage"] = voltage_change_dict
+                    return True, change_event_dict
+                if forever:
+                    time.sleep(1)
+                else:
+                    timeout = end_time - time.time()
+                    if timeout >= 1:
+                        time.sleep(1)  # We poll at 1 second granularity
+                    else:
+                        if timeout > 0:
+                            time.sleep(timeout)
+                        return True, change_event_dict
+        except Exception as e:
+            print(e)
+        print("get_change_event: Should not reach here.")
+        return False, change_event_dict
+
+    def get_transceiver_change_event(self):
+        current_port_dict = {}
+        ret_dict = {}
+
+        # Check for OIR events and return ret_dict
+        for index in range(0, NUM_PORT + 1):
+            if self._sfp_list[index].get_presence():
+                current_port_dict[index] = self.STATUS_INSERTED
+            else:
+                current_port_dict[index] = self.STATUS_REMOVED
+
+        if len(self.port_dict) == 0:       # first time
+            self.port_dict = current_port_dict
+            return {}
+
+        if current_port_dict == self.port_dict:
+            return {}
+
+        # Update reg value
+        for index, status in current_port_dict.items():
+            if self.port_dict[index] != status:
+                ret_dict[index] = status
+                #ret_dict[str(index)] = status
+        self.port_dict = current_port_dict
+        for index, status in ret_dict.items():
+            if int(status) == 1:
+                pass
+                #self._sfp_list[int(index)].check_sfp_optoe_type()
+        return ret_dict
diff --git a/platform/centec-arm64/sonic-platform-modules-micas/m2-w6010-48gt4x-fa/sonic_platform/component.py b/platform/centec-arm64/sonic-platform-modules-micas/m2-w6010-48gt4x-fa/sonic_platform/component.py
new file mode 100644
index 000000000..325c000ee
--- /dev/null
+++ b/platform/centec-arm64/sonic-platform-modules-micas/m2-w6010-48gt4x-fa/sonic_platform/component.py
@@ -0,0 +1,93 @@
+#!/usr/bin/env python
+
+try:
+    import subprocess
+    from sonic_platform_base.component_base import ComponentBase
+    import sonic_platform.hwaccess as hwaccess
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+def get_cpld_version(bus, i2caddr):
+    return '{}{}{}{}'.format(hwaccess.i2c_get(bus, i2caddr, 1),
+                          hwaccess.i2c_get(bus, i2caddr, 2),
+                          hwaccess.i2c_get(bus, i2caddr, 3),
+                          hwaccess.i2c_get(bus, i2caddr, 0)
+                          )
+
+def get_cpu_cpld_version():
+    return get_cpld_version(2, 0x0d)
+
+def get_cpld1_version():
+    return get_cpld_version(3, 0x30)
+
+COMPONENT_LIST= [
+        ['CPU CPLD',
+         'cpu board',
+         get_cpu_cpld_version
+         ],
+
+        ['MAC1 CPLD',
+         'mac1 board',
+         get_cpld1_version
+         ]
+    ]
+
+class Component(ComponentBase):
+    """Platform-specific Component class"""
+
+    def __init__(self, component_index=0):
+        ComponentBase.__init__(self)
+        self.index = component_index
+
+    def get_name(self):
+        """
+        Retrieves the name of the component
+
+        Returns:
+            A string containing the name of the component
+        """
+        return COMPONENT_LIST[self.index][0]
+
+    def get_description(self):
+        """
+        Retrieves the description of the component
+
+        Returns:
+            A string containing the description of the component
+        """
+        return COMPONENT_LIST[self.index][1]
+
+    def get_firmware_version(self):
+        """
+        Retrieves the firmware version of the component
+
+        Returns:
+            A string containing the firmware version of the component
+        """
+        return COMPONENT_LIST[self.index][2]()
+
+    def install_firmware(self, image_path):
+        """
+        Installs firmware to the component
+
+        Args:
+            image_path: A string, path to firmware image
+
+        Returns:
+            A boolean, True if install was successful, False if not
+        """
+        try:
+            successtips = "CPLD Upgrade succeeded!"
+            status, output = subprocess.getstatusoutput("which firmware_upgrade")
+            if status or len(output) <= 0:
+                logger.error("no upgrade tool.")
+                return False
+            cmdstr = "%s %s cpld %d cpld"%(output,image_path,self.slot)
+            ret, log = subprocess.getstatusoutput(cmdstr)
+            if ret == 0 and successtips in log:
+                return True
+            logger.error("upgrade failed. ret:%d, log:\n%s" % (ret, log))
+        except Exception as e:
+            logger.error(str(e))
+        return False
+
diff --git a/platform/centec-arm64/sonic-platform-modules-micas/m2-w6010-48gt4x-fa/sonic_platform/eeprom.py b/platform/centec-arm64/sonic-platform-modules-micas/m2-w6010-48gt4x-fa/sonic_platform/eeprom.py
new file mode 100644
index 000000000..af5da656b
--- /dev/null
+++ b/platform/centec-arm64/sonic-platform-modules-micas/m2-w6010-48gt4x-fa/sonic_platform/eeprom.py
@@ -0,0 +1,38 @@
+#!/usr/bin/env python
+
+try:
+    from sonic_eeprom import eeprom_tlvinfo
+    import binascii
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+class Eeprom(eeprom_tlvinfo.TlvInfoDecoder):
+    """Platform-specific Eeprom class"""
+
+    def __init__(self):
+        eeprom_path = "/sys/bus/i2c/devices/1-0056/eeprom"
+        if eeprom_path is None:
+            raise ValueError("get eeprom path failed")
+
+        super(Eeprom, self).__init__(eeprom_path, 0, "", True)
+
+
+    def modelnumber(self, e):
+        '''
+        Returns the value field of the model(part) number TLV as a string
+        '''
+        (is_valid, t) = self.get_tlv_field(e, self._TLV_CODE_PART_NUMBER)
+        if not is_valid:
+            return super(Eeprom, self).part_number_str(e)
+
+        return t[2].decode("ascii")
+
+    def deviceversion(self, e):
+        '''
+        Returns the value field of the Device Version as a string
+        '''
+        (is_valid, t) = self.get_tlv_field(e, self._TLV_CODE_DEVICE_VERSION)
+        if not is_valid:
+            return "N/A"
+
+        return str(ord(t[2]))
diff --git a/platform/centec-arm64/sonic-platform-modules-micas/m2-w6010-48gt4x-fa/sonic_platform/fan.py b/platform/centec-arm64/sonic-platform-modules-micas/m2-w6010-48gt4x-fa/sonic_platform/fan.py
new file mode 100644
index 000000000..ebbb38627
--- /dev/null
+++ b/platform/centec-arm64/sonic-platform-modules-micas/m2-w6010-48gt4x-fa/sonic_platform/fan.py
@@ -0,0 +1,178 @@
+#!/usr/bin/env python
+
+import time
+
+try:
+    from sonic_platform_base.fan_base import FanBase
+    from .redfish_api import Redfish_Api
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+FAN_NAME_LIST = ["1", "2"]
+
+class Fan(FanBase):
+    """Platform-specific Fan class"""
+
+    def __init__(self, fan_tray_index, fan_index=0):
+        self.fan_index = fan_index
+        self.fan_tray_index = fan_tray_index
+        self.redfish = Redfish_Api()
+        self.pinf = {}
+        self._fan_list = []
+        FanBase.__init__(self)
+        self.begin = time.time()
+
+    def get_power_3s(self):
+        self.elapsed = time.time()
+        if not self.pinf or self.elapsed - self.begin >= 3:
+            self.begin = time.time()
+            self.pinf = self.redfish.get_thermal()
+
+    def get_speed_pwm(self):
+        self.get_power_3s()
+        ctrl = self.pinf["Fans"]
+        output = ctrl[self.fan_tray_index]
+        speed = output.get("Oem").get("OpenBmc").get("FanSpeedLevelPercents")
+        return int(speed)
+
+    def get_speed_rpm(self):
+        self.get_power_3s()
+        ctrl = self.pinf["Fans"]
+        output = ctrl[self.fan_tray_index]
+        speed = output.get("Reading")
+        return int(speed)
+
+    def get_high_critical_threshold(self):
+        self.get_power_3s()
+        ctrl = self.pinf["Fans"]
+        output = ctrl[self.fan_tray_index]
+        high = output.get("UpperThresholdFatal")
+        return int(high)
+
+    def get_low_critical_threshold(self):
+        self.get_power_3s()
+        ctrl = self.pinf["Fans"]
+        output = ctrl[self.fan_tray_index]
+        low = output.get("LowerThresholdFatal")
+        return int(low)
+
+    def set_speed_pwm(self, speed):
+        post_url = '/redfish/v1/Chassis/1/Thermal/Actions/Oem/OpenBmc/Fan.SetSpeed'
+        playload = {}
+        playload["FanName"] = "Fan0"
+        playload["FanSpeedLevelPercents"] = str(speed)
+        return self.redfish.post_odata(post_url, playload)
+
+    def get_status_led(self):
+        self.get_power_3s()
+        ctrl = self.pinf["Fans"]
+        output = ctrl[self.fan_tray_index]
+        led = output.get("Oem").get("OpenBmc").get("IndicatorLEDColor")
+        return led
+
+    def set_status_led(self, color):
+        playload = {}
+        led = {}
+        led_list = []
+        led["IndicatorLEDColor"] = color
+        led["LEDType"] = "fan"
+        led_list.append(led)
+        playload["LEDs"] = led_list
+        # boardsLed
+        return self.redfish.post_boardLed(playload)
+
+    def get_direction(self):
+        return "intake"
+
+    def get_name(self):
+        fan_name = FAN_NAME_LIST[self.fan_index]
+        return "Fantray{}_{}".format(self.fan_tray_index+1, fan_name)
+
+    def get_model(self):
+        """
+        Retrieves the part number of the FAN
+        Returns:
+            string: Part number of FAN
+        """
+        return 'N/A'
+
+    def get_position_in_parent(self):
+        """
+        Retrieves 1-based relative physical position in parent device. If the agent cannot determine the parent-relative position
+        for some reason, or if the associated value of entPhysicalContainedIn is '0', then the value '-1' is returned
+        Returns:
+            integer: The 1-based relative physical position in parent device or -1 if cannot determine the position
+        """
+        return -1
+
+    def is_replaceable(self):
+        """
+        Indicate whether this device is replaceable.
+        Returns:
+            bool: True if it is replaceable.
+        """
+        return False
+
+    def get_revision(self):
+        """
+        Retrieves the hardware revision of the device
+
+        Returns:
+            string: Revision value of device
+        """
+        return 'N/A'
+
+    def get_serial(self):
+        """
+        Retrieves the serial number of the FAN
+        Returns:
+            string: Serial number of FAN
+        """
+        return 'N/A'
+
+    def get_presence(self):
+        self.get_power_3s()
+        ctrl = self.pinf["Fans"]
+        output = ctrl[self.fan_tray_index]
+        state = output.get("Status").get("Status").get("State")
+        if state == "Enabled" or state == "UnavailableOffline":
+            return True
+        return False
+
+    def get_status(self):
+        self.get_power_3s()
+        ctrl = self.pinf["Fans"]
+        output = ctrl[self.fan_tray_index]
+        if output.get("Status").get("Status").get("Health") == "OK":
+            return True
+        return False
+
+    def get_speed(self):
+        self.get_power_3s()
+        ctrl = self.pinf["Fans"]
+        output = ctrl[self.fan_tray_index]
+        speed = output.get("Reading")
+        speed_percentage = round((speed*100)/17500)
+        if speed_percentage > 100:
+            speed_percentage = 100
+            return speed_percentage
+        else:
+            return speed_percentage
+
+    def get_speed_tolerance(self):
+        """
+        Retrieves the speed tolerance of the fan
+        Returns:
+            An integer, the percentage of variance from target speed which is
+        considered tolerable
+        """
+        return 30
+
+    def get_target_speed(self):
+        """
+        Retrieves the target (expected) speed of the fan
+        Returns:
+            An integer, the percentage of full fan speed, in the range 0 (off)
+                 to 100 (full speed)
+        """
+        return self.get_speed_pwm()
diff --git a/platform/centec-arm64/sonic-platform-modules-micas/m2-w6010-48gt4x-fa/sonic_platform/fan_drawer.py b/platform/centec-arm64/sonic-platform-modules-micas/m2-w6010-48gt4x-fa/sonic_platform/fan_drawer.py
new file mode 100644
index 000000000..c86b85566
--- /dev/null
+++ b/platform/centec-arm64/sonic-platform-modules-micas/m2-w6010-48gt4x-fa/sonic_platform/fan_drawer.py
@@ -0,0 +1,124 @@
+#!/usr/bin/env python
+import time
+
+try:
+    from sonic_platform_base.fan_drawer_base import FanDrawerBase
+    from sonic_platform.fan import Fan
+    from .redfish_api import Redfish_Api
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+
+class FanDrawer(FanDrawerBase):
+
+    FANS_PER_FANTRAY = 1
+
+    def __init__(self, fantray_index=0):
+        FanDrawerBase.__init__(self)
+        self.fantrayindex = fantray_index
+        self.redfish = Redfish_Api()
+        self.pinf = {}
+        self.begin = time.time()
+        for i in range(self.FANS_PER_FANTRAY):
+            self._fan_list.append(Fan(fantray_index, i))
+
+    def get_power_3s(self):
+        self.elapsed = time.time()
+        if not self.pinf or self.elapsed - self.begin >= 3:
+            self.begin = time.time()
+            self.pinf = self.redfish.get_thermal()
+
+    def get_name(self):
+        return "FanTray{}".format(self.fantrayindex+1)
+
+    def get_presence(self):
+        self.get_power_3s()
+        ctrl = self.pinf["Fans"]
+        output = ctrl[self.fantrayindex]
+        state = output.get("Status").get("Status").get("State")
+        if state == "Enabled" or state == "UnavailableOffline":
+            return True
+        return False
+
+    def get_model(self):
+        """
+        Retrieves the part number of the FAN
+        Returns:
+            string: Part number of FAN
+        """
+        return 'N/A'
+
+    def get_serial(self):
+        """
+        Retrieves the serial number of the FAN
+        Returns:
+            string: Serial number of FAN
+        """
+        return 'N/A'
+
+    def get_revision(self):
+        """
+        Retrieves the hardware revision of the device
+
+        Returns:
+            string: Revision value of device
+        """
+        return 'N/A'
+
+    def get_status(self):
+        """
+        Retrieves the operational status of the FAN
+        Returns:
+            bool: True if FAN is operating properly, False if not
+        """
+        self.get_power_3s()
+        ctrl = self.pinf["Fans"]
+        output = ctrl[self.fantrayindex]
+        if output.get("Status").get("Status").get("Health") == "OK":
+            return True
+        return False
+
+    def get_position_in_parent(self):
+        """
+        Retrieves 1-based relative physical position in parent device. If the agent cannot determine the parent-relative position
+        for some reason, or if the associated value of entPhysicalContainedIn is '0', then the value '-1' is returned
+        Returns:
+            integer: The 1-based relative physical position in parent device or -1 if cannot determine the position
+        """
+        return -1
+
+    def is_replaceable(self):
+        """
+        Indicate whether this device is replaceable.
+        Returns:
+            bool: True if it is replaceable.
+        """
+        return False
+
+    def get_status_led(self):
+        self.get_power_3s()
+        ctrl = self.pinf["Fans"]
+        output = ctrl[self.fantrayindex]
+        led = output.get("Oem").get("OpenBmc").get("IndicatorLEDColor")
+        return led
+
+    def set_status_led(self, color):
+        playload = {}
+        led = {}
+        led_list = []
+        led["IndicatorLEDColor"] = color
+        led["LEDType"] = "fan"
+        led_list.append(led)
+        playload["LEDs"] = led_list
+        # boardsLed
+        return self.redfish.post_boardLed(playload)
+
+    def get_maximum_consumed_power(self):
+        """
+        Retrives the maximum power drawn by Fan Drawer
+
+        Returns:
+            A float, with value of the maximum consumable power of the
+            component.
+        """
+        return 'N/A'
diff --git a/platform/centec-arm64/sonic-platform-modules-micas/m2-w6010-48gt4x-fa/sonic_platform/hwaccess.py b/platform/centec-arm64/sonic-platform-modules-micas/m2-w6010-48gt4x-fa/sonic_platform/hwaccess.py
new file mode 100644
index 000000000..7a04e766a
--- /dev/null
+++ b/platform/centec-arm64/sonic-platform-modules-micas/m2-w6010-48gt4x-fa/sonic_platform/hwaccess.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+
+import struct
+import mmap
+import subprocess
+
+# Read PCI device
+
+def pci_mem_read(mm, offset):
+    mm.seek(offset)
+    read_data_stream = mm.read(4)
+    return struct.unpack('I',read_data_stream)[0]
+
+def pci_get_value(resource, offset):
+    with open(resource, 'r+b') as fd:
+        mm = mmap.mmap(fd.fileno(), 0)
+        val = pci_mem_read(mm, offset)
+        mm.close()
+    return val
+
+def pci_mem_write(memmap, offset, data):
+    """ Write PCI device """
+    memmap.seek(offset)
+    memmap.write(struct.pack('I', data))
+
+def pci_set_value(resource, val, offset):
+    """ Set a value to PCI device """
+    with open(resource, 'w+b') as filed:
+        memmap = None
+        try:
+            memmap = mmap.mmap(filed.fileno(), 0)
+            pci_mem_write(memmap, offset, val)
+        except EnvironmentError:
+            print("error")
+        if memmap is not None:
+            memmap.close()
+
+# Read I2C device
+
+def i2c_get(bus, i2caddr, ofs):
+    try:
+        valx = int(subprocess.check_output(['/usr/sbin/i2cget','-f', '-y', str(bus), str(i2caddr), str(ofs)]), 16)
+        return "{:02x}".format(valx)
+    except (FileNotFoundError, subprocess.CalledProcessError):
+        return -1
+
diff --git a/platform/centec-arm64/sonic-platform-modules-micas/m2-w6010-48gt4x-fa/sonic_platform/platform.py b/platform/centec-arm64/sonic-platform-modules-micas/m2-w6010-48gt4x-fa/sonic_platform/platform.py
new file mode 100644
index 000000000..7225a71b0
--- /dev/null
+++ b/platform/centec-arm64/sonic-platform-modules-micas/m2-w6010-48gt4x-fa/sonic_platform/platform.py
@@ -0,0 +1,15 @@
+#!/usr/bin/env python
+
+try:
+    from sonic_platform_base.platform_base import PlatformBase
+    from sonic_platform.chassis import Chassis
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+
+class Platform(PlatformBase):
+
+    def __init__(self):
+        PlatformBase.__init__(self)
+        self._chassis = Chassis()
+
diff --git a/platform/centec-arm64/sonic-platform-modules-micas/m2-w6010-48gt4x-fa/sonic_platform/psu.py b/platform/centec-arm64/sonic-platform-modules-micas/m2-w6010-48gt4x-fa/sonic_platform/psu.py
new file mode 100644
index 000000000..5176552c1
--- /dev/null
+++ b/platform/centec-arm64/sonic-platform-modules-micas/m2-w6010-48gt4x-fa/sonic_platform/psu.py
@@ -0,0 +1,231 @@
+#!/usr/bin/env python
+
+import time
+import imp
+import os
+import sys
+
+try:
+    from sonic_platform_base.psu_base import PsuBase
+    from .redfish_api import Redfish_Api
+except ImportError as e:
+    raise ImportError("%s - required module not found" % e)
+
+class Psu(PsuBase):
+    """Platform-specific Psu class"""
+
+    def __init__(self, index=0):
+        PsuBase.__init__(self)
+        self.redfish = Redfish_Api()
+        self.pinf = {}
+        self.psu_index = index
+        self._fan_list = []
+        self._thermal_list = []
+        self.begin = time.time()
+
+    def get_power_3s(self):
+        self.elapsed = time.time()
+        if not self.pinf or self.elapsed - self.begin >= 3:
+            self.begin = time.time()
+            self.pinf = self.redfish.get_power()
+
+    def get_presence(self):
+        return True
+
+    def get_fan(self, index):
+        """
+        Retrieves fan module represented by (0-based) index <index>
+
+        Args:
+            index: An integer, the index (0-based) of the fan module to
+            retrieve
+
+        Returns:
+            An object dervied from FanBase representing the specified fan
+            module
+        """
+        return None
+
+    def get_powergood_status(self):
+        self.get_power_3s()
+        ctrl = self.pinf["PowerSupplies"]
+        output = ctrl[self.psu_index]
+        if output.get("Status").get("Health") == "OK":
+            return True
+        else:
+            return False
+
+    def get_name(self):
+        """
+        Retrieves the name of the device
+
+        Returns:
+            string: The name of the device
+        """
+        return "PSU {}".format(self.psu_index + 1)
+
+    def get_serial(self):
+        self.get_power_3s()
+        ctrl = self.pinf["PowerSupplies"]
+        output = ctrl[self.psu_index]
+        serial = output.get("SerialNumber")
+        return serial
+
+    def get_model(self):
+        self.get_power_3s()
+        ctrl = self.pinf["PowerSupplies"]
+        output = ctrl[self.psu_index]
+        model = output.get("Model")
+        return model
+
+    def get_revision(self):
+        self.get_power_3s()
+        ctrl = self.pinf["PowerSupplies"]
+        output = ctrl[self.psu_index]
+        manufacturer = output.get("Manufacturer")
+        return manufacturer
+
+    def get_voltage(self):
+        self.get_power_3s()
+        ctrl = self.pinf["PowerSupplies"]
+        output = ctrl[self.psu_index]
+        voltage = output.get("Oem").get("OpenBmc").get("OutputVoltage")
+        return voltage
+
+    def get_input_current(self):
+        self.get_power_3s()
+        ctrl = self.pinf["PowerSupplies"]
+        output = ctrl[self.psu_index]
+        current = output.get("Oem").get("OpenBmc").get("OutputAmperage")
+        return current
+
+    def get_input_voltage(self):
+        self.get_power_3s()
+        ctrl = self.pinf["PowerSupplies"]
+        output = ctrl[self.psu_index]
+        voltage = output.get("Oem").get("OpenBmc").get("OutputVoltage")
+        return voltage
+
+    def get_current(self):
+        self.get_power_3s()
+        ctrl = self.pinf["PowerSupplies"]
+        output = ctrl[self.psu_index]
+        current = output.get("Oem").get("OpenBmc").get("OutputAmperage")
+        return current
+
+    def get_power(self):
+        self.get_power_3s()
+        ctrl = self.pinf["PowerSupplies"]
+        output = ctrl[self.psu_index]
+        current = output.get("Oem").get("OpenBmc").get("OutputAmperage")
+        voltage = output.get("Oem").get("OpenBmc").get("OutputVoltage")
+        power = float(current)*float(voltage)
+        return round(power,2)
+
+    def get_temperature(self):
+        """
+        Retrieves current temperature reading from PSU
+
+        Returns:
+            A float number of current temperature in Celsius up to nearest thousandth
+            of one degree Celsius, e.g. 30.125
+        """
+        # no temperature sensor
+        value = 35
+        return round(float(value), 1)
+
+    def get_status_led(self):
+        return "BuildIn"
+
+    def set_status_led(self, color):
+        playload = {}
+        led = {}
+        led_list = []
+        led["IndicatorLEDColor"] = color
+        led["LEDType"] = "pwr"
+        led_list.append(led)
+        playload["LEDs"] = led_list
+        # boardsLed
+        return self.redfish.post_boardLed(playload)
+
+    def get_maximum_supplied_power(self):
+        """
+        Retrieves the maximum supplied power by PSU
+
+        Returns:
+            A float number, the maximum power output in Watts.
+            e.g. 1200.1
+        """
+        return False
+
+    def get_position_in_parent(self):
+        """
+        Retrieves 1-based relative physical position in parent device. If the agent cannot determine the parent-relative position
+        for some reason, or if the associated value of entPhysicalContainedIn is '0', then the value '-1' is returned
+        Returns:
+            integer: The 1-based relative physical position in parent device or -1 if cannot determine the position
+        """
+        return -1
+
+    def is_replaceable(self):
+        """
+        Indicate whether this device is replaceable.
+        Returns:
+            bool: True if it is replaceable.
+        """
+        return False
+
+    def get_status(self):
+        """
+        Retrieves the operational status of the PSU
+
+        Returns:
+            bool: True if PSU is operating properly, False if not
+        """
+        return self.get_powergood_status()
+
+    def get_temperature_high_threshold(self):
+        """
+        Retrieves the high threshold temperature of PSU
+
+        Returns:
+            A float number, the high threshold temperature of PSU in Celsius
+            up to nearest thousandth of one degree Celsius, e.g. 30.125
+        """
+        value = 75
+        return round(float(value), 1)
+
+    def get_voltage_high_threshold(self):
+        """
+        Retrieves the high threshold PSU voltage output
+
+        Returns:
+            A float number, the high threshold output voltage in volts,
+            e.g. 12.1
+        """
+        value = 14.52
+        return str(round(float(value), 2))
+
+    def get_voltage_low_threshold(self):
+        """
+        Retrieves the low threshold PSU voltage output
+
+        Returns:
+            A float number, the low threshold output voltage in volts,
+            e.g. 12.1
+        """
+        value = 9.72
+        return str(round(float(value), 2))
+
+    def get_thermal(self, index):
+        """
+        Retrieves thermal unit represented by (0-based) index <index>
+
+        Args:
+            index: An integer, the index (0-based) of the thermal to
+            retrieve
+
+        Returns:
+            An object dervied from ThermalBase representing the specified thermal
+        """
+        return None
diff --git a/platform/centec-arm64/sonic-platform-modules-micas/m2-w6010-48gt4x-fa/sonic_platform/redfish_api.py b/platform/centec-arm64/sonic-platform-modules-micas/m2-w6010-48gt4x-fa/sonic_platform/redfish_api.py
new file mode 100644
index 000000000..9d3cdd314
--- /dev/null
+++ b/platform/centec-arm64/sonic-platform-modules-micas/m2-w6010-48gt4x-fa/sonic_platform/redfish_api.py
@@ -0,0 +1,304 @@
+#!/usr/bin/env python3
+# -*- coding: utf-8 -*-
+import shlex
+import json
+import os
+import ssl
+import subprocess
+import syslog
+
+class Redfish_Api():
+    BmcBaseUrl = 'http://240.1.1.1:8080'
+    ThermalUrl = '/redfish/v1/Chassis/1/Thermal'
+    PowerUrl = '/redfish/v1/Chassis/1/Power'
+    ThresholdSensorsUrl = '/redfish/v1/Chassis/1/ThresholdSensors'
+    FanSpeedUrl = '/redfish/v1/Chassis/1/Thermal/Actions/Oem/OpenBmc/Fan.SetSpeed'
+    BoardsUrl = '/redfish/v1/Chassis/1/Boards/'
+    BoardLedUrl = "/redfish/v1/Chassis/1/Boards/{}/Actions/Oem/OpenBmc/Boards.SetLED"
+
+    # Maximum time in seconds that you allow the connection to the server to take.
+    connect_timeout = 30
+    # Maximum  time  in seconds that you allow the whole operation to take
+    operation_timeout = 300
+
+    default_prefix='/redfish/v1/'
+    session = None
+    __DEBUG__ = "N"
+    __DUMP_RESP__ = "N"
+    RST_STATUS = "status"
+    RST_SUCCESS = "OK"
+    refish_logger = None
+
+    def redfish_log_debug(self, msg):
+        if (self.__DEBUG__ == "Y"):
+            syslog.openlog("redfis_api")
+            syslog.syslog(syslog.LOG_DEBUG, msg)
+            syslog.closelog()
+
+    def redfish_log_error(self, msg):
+        syslog.openlog("redfish_api")
+        syslog.syslog(syslog.LOG_ERR, msg)
+        syslog.closelog()
+
+    def __init__(self):
+        pass
+
+    def get_full_url(self, url):
+        return self.BmcBaseUrl + url
+
+    def _exec_cmd(self, cmd):
+        self.redfish_log_debug("Cmd: %s" % cmd)
+        p = subprocess.Popen(shlex.split(cmd), shell=False, stdout=subprocess.PIPE, stderr=subprocess.PIPE)
+        p.wait()
+        self.redfish_log_debug("Cmd return: %d" % p.returncode)
+        str_stdout = p.stdout.read().decode('utf-8')
+        str_stderr = p.stderr.read().decode('utf-8')
+        self.redfish_log_debug("Cmd stdout: %s" % str_stdout)
+        if p.returncode !=0:
+            self.redfish_log_error("Cmd: %s, failed! error msg:%s" % (cmd, str_stderr))
+            return None
+        else:
+            try:
+                ret = json.loads(str_stdout)
+                return ret
+            except Exception as e:
+                self.redfish_log_error("Cmd: %s, failed! stdout msg:%s" % (cmd, str_stdout))
+                return None
+
+    def _redfish_get(self, url):
+        self.redfish_log_debug("Get info from %s." % url)
+        result = None
+        try:
+            cmd_get="curl --connect-timeout %d -m %d -X GET %s" % (self.connect_timeout, self.operation_timeout, self.get_full_url(url))
+            result = self._exec_cmd(cmd_get)
+            return result
+        except Exception as e:
+            self.redfish_log_error("error_message: %s" % e)
+            return None
+
+    def _redfish_post(self, url, playload):
+        self.redfish_log_debug("post url: %s" % url)
+        self.redfish_log_debug("Playload: %s" % playload)
+
+        playload_json = json.dumps(playload)
+        result = False
+        try:
+            cmd_post="curl --connect-timeout %d -m %d -X POST %s -d \'%s\'" % (self.connect_timeout, self.operation_timeout, self.get_full_url(url), playload_json)
+            ret_msg = self._exec_cmd(cmd_post)
+            if ret_msg == None:
+                return False
+            elif ret_msg["success"] == False:
+                self.redfish_log_error("Url: '%s', Playload: '%s', Bmc return failed, error_message: %s" % (url, playload_json, ret_msg["Message"]))
+                result = False
+            else:
+                result = True
+            return result
+        except Exception as e:
+            self.redfish_log_error("error_message: %s" % e)
+            return False
+
+    def get_thermal(self):
+        """Get thermal info
+        :returns: class 'redfish.rest.v1.RestResponse' or None when failed
+        """
+        return self._redfish_get(self.ThermalUrl)
+
+    def get_power(self):
+        """Get power info
+        :returns: class 'redfish.rest.v1.RestResponse' or None when failed
+        """
+        return self._redfish_get(self.PowerUrl)
+
+    def get_thresholdSensors(self):
+        """Get thresholdSensors info
+        :returns: class 'redfish.rest.v1.RestResponse' or None when failed
+        """
+        return self._redfish_get(self.ThresholdSensorsUrl)
+
+    def post_odata(self, odata_id, playload):
+        """post odata info
+        :params odata_id: the specified odata_id path
+        :type odata_id: string
+        :playload: info to post
+        :type: dictionary
+        :returns: True or False
+        """
+        if odata_id is None or playload is None:
+            print("post failed: odata_id or playload is None")
+            return False
+        return self._redfish_post(odata_id, playload)
+
+    def get_odata(self, odata_id):
+        """Get odata info
+        :params odata_id: the specified odata_id path
+        :type odata_id: string
+        :returns: class 'redfish.rest.v1.RestResponse' or None when failed
+        """
+        if odata_id is None:
+            print("Get odata_id failed: odata_id is None")
+            return None
+        return self._redfish_get(odata_id)
+
+    def post_fanSpeed(self, playload):
+        """post odata info
+        :playload: info to post
+        :type: dictionary
+        :returns: True or False
+        """
+        if playload is None:
+            print("post failed: playload is None")
+            return False
+        return self._redfish_post(self.FanSpeedUrl, playload)
+
+    def get_board(self, board_name="indicatorboard"):
+        """Get board info
+        :board_name: name of board, default is "indicatorboard"
+        :type: string
+        :returns: class'redfish.rest.v1.RestResponse' or None when failed
+        """
+        if board_name is None :
+            print("get failed: board_name is None")
+            return None
+        return self._redfish_get(self.BoardsUrl + board_name)
+
+    def post_boardLed(self, playload, board_name="indicatorboard"):
+        """post boardLed info
+        :board_name: name of board, default is "indicatorboard"
+        :type: string
+        :playload: info to post
+        :type: dictionary
+        :returns: True or False
+        """
+        if board_name is None or playload is None:
+            print("post failed: playload is None")
+            return False
+        return self._redfish_post(self.BoardLedUrl.format(board_name), playload)
+
+    '''  not supported currently
+    def post_thermal(self, playload):
+        """post thermal info
+        :playload: info to post
+        :type: dictionary
+        :returns: True or False
+        """
+        if playload is None:
+            print("post_thermal failed: playload is None")
+            return None
+        return self._redfish_post(self.ThermalUrl, playload)
+
+    def post_power(self, playload):
+        """post power info
+        :playload: info to post
+        :type: dictionary
+        :returns: True or False
+        """
+        if playload is None:
+            print("post_power failed: playload is None")
+            return None
+        return self._redfish_post(self.PowerUrl, playload)
+
+    def post_thresholdSensors(self, playload):
+        """post thresholdSensors info
+        :playload: info to post
+        :type: dictionary
+        :returns: True or False
+        """
+        if playload is None:
+            print("post_thresholdSensors failed: playload is None")
+            return None
+        return self._redfish_post(self.ThresholdSensorsUrl, playload)
+
+    def get_fanSpeed(self):
+        """Get board led info
+        :returns: class'redfish.rest.v1.RestResponse' or None when failed
+        """
+        return self._redfish_get(self.FanSpeedUrl)
+
+    def post_board(self, playload, board_name="indicatorboard"):
+        """post board info
+        :board_name: name of board, default is "indicatorboard"
+        :type: string
+        :playload: info to post
+        :type: dictionary
+        :returns: True or False
+        """
+        if board_name is None or playload is None:
+            print("post failed: playload is None")
+            return False
+        return self._redfish_post(self.BoardsUrl + board_name, playload)
+
+    def get_boardLed(self, board_name="indicatorboard"):
+        """Get boardLed info
+        :board_name: name of board, default is "indicatorboard"
+        :type: string
+        :returns: class'redfish.rest.v1.RestResponse' or None when failed
+        """
+        if board_name is None :
+            print("get failed: board_name is None")
+            return None
+        return self._redfish_get(self.BoardsUrl % board_name)
+
+    '''
+
+'''
+if __name__ == '__main__':
+    redfish = Redfish_Api()
+
+    ### get
+    # boards
+    ret = redfish.get_board()
+    if ret is None:
+        print("get failed: board")
+    else:
+        print("get succeeded, board:%s" % ret)
+
+    ret = redfish.get_thresholdSensors()
+    if ret is None:
+        print("get failed: threshold")
+    else:
+        print("get succeeded, threshold:%s" % ret)
+
+    ret = redfish.get_power()
+    if ret is None:
+        print("get failed: power")
+    else:
+        print("get succeeded, power:%s" % ret)
+
+    ret = redfish.get_thermal()
+    if ret is None:
+        print("get failed:thermal")
+    else:
+        print("get succeeded,thermal:%s" % ret)
+
+    # get playload
+    resp = redfish.get_thresholdSensors()
+    if (resp != None):
+        print(resp["@odata.id"])
+        print(resp["@odata.type"])
+        print(resp["Id"])
+        print(resp["Name"])
+    else:
+        print("Failed: get_thresholdSensors")
+
+    ### post
+    # fanSpeed
+    playload = {}
+    playload["FanName"] = 'Fan0'
+    playload["FanSpeedLevelPercents"] = "70"
+    print("post fanSpeed:%s" % redfish.post_fanSpeed(playload))
+
+    #{"LEDs": [{"IndicatorLEDColor": "green","LEDType": "sys"},{"IndicatorLEDColor": "off","LEDType": "pwr"},{"IndicatorLEDColor": "green","LEDType": "fan"}]}
+    playload = {}
+    led = {}
+    led1 = {}
+    led_list = []
+    led["IndicatorLEDColor"] = "green"
+    led["LEDType"] = "sys"
+    led1["IndicatorLEDColor"] = "off"
+    led1["LEDType"] = "pwr"
+    led_list.append(led)
+    led_list.append(led1)
+    playload["LEDs"] = led_list
+    # boardsLed
+    print("post boardLed:%s" % redfish.post_boardLed(playload))
+'''
diff --git a/platform/centec-arm64/sonic-platform-modules-micas/m2-w6010-48gt4x-fa/sonic_platform/sfp.py b/platform/centec-arm64/sonic-platform-modules-micas/m2-w6010-48gt4x-fa/sonic_platform/sfp.py
new file mode 100644
index 000000000..29dd0cb07
--- /dev/null
+++ b/platform/centec-arm64/sonic-platform-modules-micas/m2-w6010-48gt4x-fa/sonic_platform/sfp.py
@@ -0,0 +1,325 @@
+#!/usr/bin/python
+# -*- coding: UTF-8 -*-
+
+#############################################################################
+#
+# Module contains an implementation of SONiC Platform Base API and
+# provides the platform information
+#
+#
+# *_device.py config version instruction:
+#      ver 1.0 - platform api:
+#           "presence_cpld": {
+#               "dev_id": {
+#                   [dev_id]: {
+#                       "offset": {
+#                           [offset]: [port_id]
+#                       }
+#                    }
+#                 }
+#              }
+#           "reset_cpld": {
+#               "dev_id": {
+#                   [dev_id]: {
+#                       "offset": {
+#                           [offset]: [port_id]
+#                       }
+#                    }
+#                 }
+#           }
+#      ver 2.0 - wb_plat:
+#               "presence_path": "/xx/wb_plat/xx[port_id]/present"
+#               "eeprom_path": "/sys/bus/i2c/devices/i2c-[bus]/[bus]-0050/eeprom"
+#               "reset_path": "/xx/wb_plat/xx[port_id]/reset"
+#############################################################################
+import sys
+import time
+import os
+import syslog
+import traceback
+from abc import abstractmethod
+
+configfile_pre = "/usr/local/bin/"
+sys.path.append(configfile_pre)
+
+try:
+    from sonic_platform_base.sonic_xcvr.sfp_optoe_base import SfpOptoeBase
+
+except ImportError as error:
+    raise ImportError(str(error) + "- required module not found") from error
+
+LOG_DEBUG_LEVEL = 1
+LOG_WARNING_LEVEL = 2
+LOG_ERROR_LEVEL = 3
+
+
+class Sfp(SfpOptoeBase):
+
+    OPTOE_DRV_TYPE1 = 1
+    OPTOE_DRV_TYPE2 = 2
+    OPTOE_DRV_TYPE3 = 3
+
+    # index must start at 1
+    def __init__(self, index):
+        SfpOptoeBase.__init__(self)
+        self.sfp_type = None
+        self.log_level_config = LOG_WARNING_LEVEL
+        # Init instance of SfpCust
+        self._sfp_api = SfpV2(index)
+
+    def get_eeprom_path(self):
+        return self._sfp_api._get_eeprom_path()
+
+    def read_eeprom(self, offset, num_bytes):
+        return self._sfp_api.read_eeprom(offset, num_bytes)
+
+    def write_eeprom(self, offset, num_bytes, write_buffer):
+        return self._sfp_api.write_eeprom(offset, num_bytes, write_buffer)
+
+    def get_presence(self):
+        return self._sfp_api.get_presence()
+
+    def get_transceiver_info(self):
+        # temporary solution for a sonic202111 bug
+        transceiver_info = super().get_transceiver_info()
+        try:
+            if transceiver_info["vendor_rev"] is not None:
+                transceiver_info["hardware_rev"] = transceiver_info["vendor_rev"]
+        except BaseException:
+            print(traceback.format_exc())
+            return None
+        return transceiver_info
+
+    def set_optoe_write_max(self, write_max):
+        """
+        This func is declared and implemented by SONiC but we're not supported
+        so override it as NotImplemented
+        """
+        self._sfplog(LOG_DEBUG_LEVEL, "set_optoe_write_max NotImplemented")
+
+    def refresh_xcvr_api(self):
+        """
+        Updates the XcvrApi associated with this SFP
+        """
+        self._xcvr_api = self._xcvr_api_factory.create_xcvr_api()
+        class_name = self._xcvr_api.__class__.__name__
+        optoe_type = None
+        # set sfp_type
+        if 'CmisApi' in class_name:
+            self.sfp_type = 'QSFP-DD'
+            optoe_type = self.OPTOE_DRV_TYPE3
+        elif 'Sff8472Api' in class_name:
+            self.sfp_type = 'SFP'
+            optoe_type = self.OPTOE_DRV_TYPE2
+        elif ('Sff8636Api' in class_name or 'Sff8436Api' in class_name):
+            self.sfp_type = 'QSFP'
+            optoe_type = self.OPTOE_DRV_TYPE1
+        # set optoe driver
+        if optoe_type is not None:
+            self._sfp_api.set_optoe_type(optoe_type)
+
+    def _sfplog(self, log_level, msg):
+        if log_level >= self.log_level_config:
+            try:
+                syslog.openlog("Sfp")
+                if log_level == LOG_DEBUG_LEVEL:
+                    syslog.syslog(syslog.LOG_DEBUG, msg)
+                elif log_level == LOG_WARNING_LEVEL:
+                    syslog.syslog(syslog.LOG_DEBUG, msg)
+                elif log_level == LOG_ERROR_LEVEL:
+                    syslog.syslog(syslog.LOG_ERR, msg)
+                syslog.closelog()
+
+            except BaseException:
+                print(traceback.format_exc())
+
+
+class SfpCust():
+    def __init__(self, index):
+        self.eeprom_path = None
+        self._init_config(index)
+
+    def _init_config(self, index):
+        self.log_level_config = LOG_WARNING_LEVEL
+        self._port_id = index
+        self.eeprom_retry_times = 5
+        self.eeprom_retry_break_sec = 0.2
+
+    def _get_eeprom_path(self):
+        return self.eeprom_path or None
+
+    @abstractmethod
+    def get_presence(self):
+        pass
+
+    def read_eeprom(self, offset, num_bytes):
+        try:
+            for i in range(self.eeprom_retry_times):
+                with open(self._get_eeprom_path(), mode='rb', buffering=0) as f:
+                    f.seek(offset)
+                    result = f.read(num_bytes)
+                    # temporary solution for a sonic202111 bug
+                    if len(result) < num_bytes:
+                        result = result[::-1].zfill(num_bytes)[::-1]
+                    if result is not None:
+                        return bytearray(result)
+                    time.sleep(self.eeprom_retry_break_sec)
+                    continue
+
+        except BaseException:
+            self._sfplog(LOG_ERROR_LEVEL, traceback.format_exc())
+        return None
+
+    def write_eeprom(self, offset, num_bytes, write_buffer):
+        try:
+            for i in range(self.eeprom_retry_times):
+                ret = SfpOptoeBase.write_eeprom(self, offset, num_bytes, write_buffer)
+                if ret is False:
+                    time.sleep(self.eeprom_retry_break_sec)
+                    continue
+                break
+
+            return ret
+        except BaseException:
+            self._sfplog(LOG_ERROR_LEVEL, traceback.format_exc())
+            return False
+
+    @abstractmethod
+    def set_optoe_type(self, optoe_type):
+        pass
+
+    @abstractmethod
+    def set_reset(self, reset):
+        pass
+
+    def _convert_str_range_to_int_arr(self, range_str):
+        if not range_str:
+            return []
+
+        int_range_strs = range_str.split(',')
+        range_res = []
+        for int_range_str in int_range_strs:
+            if '-' in int_range_str:
+                range_s = int(int_range_str.split('-')[0])
+                range_e = int(int_range_str.split('-')[1]) + 1
+            else:
+                range_s = int(int_range_str)
+                range_e = int(int_range_str) + 1
+
+            range_res = range_res + list(range(range_s, range_e))
+
+        return range_res
+
+    def _sfplog(self, log_level, msg):
+        if log_level >= self.log_level_config:
+            try:
+                syslog.openlog("SfpCust")
+                if log_level == LOG_DEBUG_LEVEL:
+                    syslog.syslog(syslog.LOG_DEBUG, msg)
+                elif log_level == LOG_WARNING_LEVEL:
+                    syslog.syslog(syslog.LOG_DEBUG, msg)
+                elif log_level == LOG_ERROR_LEVEL:
+                    syslog.syslog(syslog.LOG_ERR, msg)
+                syslog.closelog()
+
+            except BaseException:
+                print(traceback.format_exc())
+
+
+class SfpV2(SfpCust):
+    def _init_config(self, index):
+        super()._init_config(index)
+        # init eeprom path
+        sfp_pt2ee_path_list = [0] * 53
+        sfp_pt2ee_path_list[49:53] = [9, 10, 11, 12]
+
+        eeprom_path_config = "/sys/bus/i2c/devices/i2c-%d/%d-0050/eeprom"
+        eeprom_path_key = sfp_pt2ee_path_list[self._port_id]
+        self.eeprom_path = None if eeprom_path_config is None or eeprom_path_key == 0 else eeprom_path_config % (
+            eeprom_path_key, eeprom_path_key)
+        self._sfplog(LOG_DEBUG_LEVEL, "Done init eeprom path: %s" % self.eeprom_path)
+
+        # init presence path
+        self.presence_path = "/sys/bus/i2c/devices/3-0030/sfp_presence1"
+        self.presence_val_is_present = 0
+        self._sfplog(LOG_DEBUG_LEVEL, "Done init presence path: %s" % self.presence_path)
+
+        # init optoe driver path
+        optoe_driver_path = "/sys/bus/i2c/devices/i2c-%d/%d-0050/dev_class"
+        optoe_driver_key = sfp_pt2ee_path_list[self._port_id]
+        self.dev_class_path = None if optoe_driver_path is None or optoe_driver_key == 0 else optoe_driver_path % (
+            optoe_driver_key, optoe_driver_key)
+        self._sfplog(LOG_DEBUG_LEVEL, "Done init optoe driver path: %s" % self.dev_class_path)
+
+        # init reset path
+        self.reset_val_is_reset = 0
+
+        new_device_path = "/sys/bus/i2c/devices/i2c-%d/new_device"
+        new_device_key = sfp_pt2ee_path_list[self._port_id]
+        self.new_class_path = None if new_device_path is None or new_device_key == 0 else new_device_path % new_device_key
+        self._sfplog(LOG_DEBUG_LEVEL, "Done init new_class path: %s" % self.new_class_path)
+
+        if sfp_pt2ee_path_list[self._port_id] != 0:
+            self.add_new_sfp_device(self._port_id, 0x50)
+            self._sfplog(LOG_DEBUG_LEVEL, "Done add_new_sfp_device 0x50 port %d" % self._port_id)
+
+    def sfp_add_dev(self, new_device_path, devaddr, devtype):
+        try:
+            # Write device address to new_device file
+            nd_file = open(new_device_path, "w")
+            nd_str = "%s %s" % (devtype, hex(devaddr))
+            nd_file.write(nd_str)
+            nd_file.close()
+        except Exception as err:
+            self._sfplog(LOG_ERROR_LEVEL, ("Error writing to new device file: %s" % str(err)))
+            return 1
+        else:
+            return 0
+
+    def add_new_sfp_device(self, port_num, devid):
+        if os.path.exists(self.dev_class_path):
+            return
+
+        ret = self.sfp_add_dev(self.new_class_path, devid, "optoe2")
+        if ret != 0:
+            self._sfplog(LOG_ERROR_LEVEL, "Error adding sfp device")
+
+    def get_presence(self):
+        sfp_ls = [49, 50, 51, 52]
+        if self._port_id not in sfp_ls or self.presence_path is None:
+            self._sfplog(LOG_ERROR_LEVEL, "presence_path is None!")
+            return False
+        try:
+            with open(self.presence_path, "rb") as data:
+                presence_data = data.read(2)
+                if presence_data == "":
+                    return False
+                result = int(presence_data, 16)
+
+            # ModPrsL is active low
+            presence_offset = sfp_ls.index(self._port_id)
+            if result & (1 << presence_offset) == 0:
+                return True
+            return False
+        except BaseException:
+            self._sfplog(LOG_ERROR_LEVEL, traceback.format_exc())
+            return False
+
+    def set_reset(self, reset):
+        return True
+
+    def set_optoe_type(self, optoe_type):
+        if self.dev_class_path is None:
+            self._sfplog(LOG_ERROR_LEVEL, "dev_class_path is None!")
+            return False
+        try:
+            with open(self.dev_class_path, "r+") as dc_file:
+                dc_file_val = dc_file.read(1)
+                if int(dc_file_val) != optoe_type:
+                    dc_str = "%s" % str(optoe_type)
+                    dc_file.write(dc_str)
+                    # dc_file.close()
+        except BaseException:
+            self._sfplog(LOG_ERROR_LEVEL, traceback.format_exc())
+            return False
+        return True
diff --git a/platform/centec-arm64/sonic-platform-modules-micas/m2-w6010-48gt4x-fa/sonic_platform/thermal.py b/platform/centec-arm64/sonic-platform-modules-micas/m2-w6010-48gt4x-fa/sonic_platform/thermal.py
new file mode 100644
index 000000000..5fded8d9d
--- /dev/null
+++ b/platform/centec-arm64/sonic-platform-modules-micas/m2-w6010-48gt4x-fa/sonic_platform/thermal.py
@@ -0,0 +1,172 @@
+#!/usr/bin/env python
+
+import os
+import re
+import os.path
+import time
+
+try:
+    from sonic_platform_base.thermal_base import ThermalBase
+    from .redfish_api import Redfish_Api
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+
+class Thermal(ThermalBase):
+    """Platform-specific Thermal class"""
+
+    def __init__(self, thermal_index):
+        ThermalBase.__init__(self)
+        self.index = thermal_index
+        self.high_threshold = float(112)
+        self.redfish = Redfish_Api()
+        self.pinf = {}
+        self.begin = time.time()
+
+    def get_power_3s(self):
+        self.elapsed = time.time()
+        if not self.pinf or self.elapsed - self.begin >= 3:
+            self.begin = time.time()
+            self.pinf = self.redfish.get_thermal()
+
+    def get_temperature(self):
+        self.get_power_3s()
+        ctrl = self.pinf["Temperatures"]
+        output = ctrl[self.index]
+        temp = output.get("ReadingCelsius")
+        return temp
+
+    def get_high_threshold(self):
+        self.get_power_3s()
+        ctrl = self.pinf["Temperatures"]
+        output = ctrl[self.index]
+        temp = output.get("UpperThresholdFatal")
+        return temp
+
+    def get_low_threshold(self):
+        self.get_power_3s()
+        ctrl = self.pinf["Temperatures"]
+        output = ctrl[self.index]
+        temp = output.get("LowerThresholdFatal")
+        return temp
+
+    def get_high_critical_threshold(self):
+        self.get_power_3s()
+        ctrl = self.pinf["Temperatures"]
+        output = ctrl[self.index]
+        temp = output.get("UpperThresholdFatal")
+        return temp
+
+    def get_low_critical_threshold(self):
+        self.get_power_3s()
+        ctrl = self.pinf["Temperatures"]
+        output = ctrl[self.index]
+        temp = output.get("LowerThresholdFatal")
+        return temp
+
+    def get_name(self):
+        self.get_power_3s()
+        ctrl = self.pinf["Temperatures"]
+        output = ctrl[self.index].get("Name")
+        name = output.split("/",3)[2]
+        if name == "SWITCH_TEMP":
+            name = "ASIC_TEMP"
+        return "{}".format(name)
+
+    def get_real_name(self):
+        self.get_power_3s()
+        ctrl = self.pinf["Temperatures"]
+        output = ctrl[self.index].get("Name")
+        name = output.split("/",3)[2]
+        return "{}".format(name)
+
+    def get_presence(self):
+        self.get_power_3s()
+        ctrl = self.pinf["Temperatures"]
+        output = ctrl[self.index]
+        if output.get("Status").get("Status").get("State") == "Enabled":
+            return True
+        return False
+
+    def get_status(self):
+        self.get_power_3s()
+        ctrl = self.pinf["Temperatures"]
+        output = ctrl[self.index]
+        if output.get("Status").get("Status").get("Health") == "OK":
+            return True
+        return False
+
+    def set_sys_led(self, color):
+        playload = {}
+        led = {}
+        led_list = []
+        led["IndicatorLEDColor"] = color
+        led["LEDType"] = "sys"
+        led_list.append(led)
+        playload["LEDs"] = led_list
+        # boardsLed
+        return self.redfish.post_boardLed(playload)
+
+    def get_minimum_recorded(self):
+        """
+        Retrieves the minimum recorded temperature of thermal
+
+        Returns:
+            A float number, the minimum recorded temperature of thermal in Celsius
+            up to nearest thousandth of one degree Celsius, e.g. 30.125
+        """
+        return "N/A"
+
+    def get_maximum_recorded(self):
+        """
+        Retrieves the maximum recorded temperature of thermal
+
+        Returns:
+            A float number, the maximum recorded temperature of thermal in Celsius
+            up to nearest thousandth of one degree Celsius, e.g. 30.125
+        """
+        return "N/A"
+
+    def get_model(self):
+        """
+        Retrieves the model number (or part number) of the Thermal
+
+        Returns:
+            string: Model/part number of Thermal
+        """
+        return "N/A"
+
+    def get_serial(self):
+        """
+        Retrieves the serial number of the Thermal
+
+        Returns:
+            string: Serial number of Thermal
+        """
+        return "N/A"
+
+    def get_revision(self):
+        """
+        Retrieves the hardware revision of the device
+
+        Returns:
+            string: Revision value of device
+        """
+        return "N/A"
+
+    def get_position_in_parent(self):
+        """
+        Retrieves 1-based relative physical position in parent device. If the agent cannot determine the parent-relative position
+        for some reason, or if the associated value of entPhysicalContainedIn is '0', then the value '-1' is returned
+        Returns:
+            integer: The 1-based relative physical position in parent device or -1 if cannot determine the position
+        """
+        return -1
+
+    def is_replaceable(self):
+        """
+        Indicate whether this device is replaceable.
+        Returns:
+            bool: True if it is replaceable.
+        """
+        return False
diff --git a/platform/centec-arm64/sonic-platform-modules-micas/m2-w6010-48gt4x-ra/config/arm64_micas_m2_w6010_48gt4x_ra_r0_config.py b/platform/centec-arm64/sonic-platform-modules-micas/m2-w6010-48gt4x-ra/config/arm64_micas_m2_w6010_48gt4x_ra_r0_config.py
new file mode 100755
index 000000000..1cb395dd7
--- /dev/null
+++ b/platform/centec-arm64/sonic-platform-modules-micas/m2-w6010-48gt4x-ra/config/arm64_micas_m2_w6010_48gt4x_ra_r0_config.py
@@ -0,0 +1,90 @@
+#!/usr/bin/python
+# -*- coding: UTF-8 -*-
+from platform_common import *
+PCA9548START  = -1
+PCA9548BUSEND = -2
+
+PLATFORM_CARDID      = 0x00004065
+PLATFORM_PRODUCTNAME = "M2-W6010-48GT4X-RA"
+PLATFORM_PART_NUMBER    = "01017247"
+PLATFORM_LABEL_REVISION = "R01"
+PLATFORM_ONIE_VERSION   = "2018.05-rc1"
+PLATFORM_MAC_SIZE       = 3
+PLATFORM_MANUF_NAME     = "Micas"
+PLATFORM_MANUF_COUNTRY  = "USA"
+PLATFORM_VENDOR_NAME    = "Micas"
+PLATFORM_DIAG_VERSION   = "0.1.0.15"
+PLATFORM_SERVICE_TAG    = "www.micasnetworks.com"
+
+
+LOCAL_LED_CONTROL = {
+    "CLOSE":{},
+    "OPEN":{}
+}
+
+MACLED_PARAMS = []
+
+# start system modules
+STARTMODULE  = {
+                "i2ccheck":0,
+                "fancontrol":0,
+                "avscontrol":0,
+                "avscontrol_restful":0,
+                "sfptempmodule":0,
+                "sfptempmodule_interval":3,
+                "macledreset": 0,
+                "macledreset_interval": 5,
+                "macledset_param":MACLED_PARAMS,
+                }
+
+FRULISTS = [
+            {"name":"mmceeprom","bus":5,"loc":0x50, "E2PRODUCT":'2', "E2TYPE":'5' , "CANRESET":'1'},
+            {"name":"cpueeprom","bus":5,"loc":0x57,"E2PRODUCT":'2', "E2TYPE":'4', "CANRESET":'1' },
+        ]
+
+# eeprom  = "1-0056/eeprom"
+E2_LOC = {"bus":1, "devno":0x56}
+E2_PROTECT = {}
+
+
+CPLDVERSIONS = [
+        {"bus":2, "devno":0x0d, "name":"CPU_CPLD"},
+		{"bus":3, "devno":0x30, "name":"MAC_BOARD_CPLD_1"},
+]
+
+FIRMWARE_TOOLS = {"cpld":  [{"channel":"0","cmd":"firmware_upgrade %s cpld %s cpld", "successtips":"CPLD Upgrade succeeded!"}
+                           ],
+              }
+
+# drivers list
+DRIVERLISTS = [
+        {"name":"i2c_dev", "delay":0},
+        {"name":"i2c_algo_bit","delay":0},
+        {"name":"spi-bitbang", "delay":0},
+        {"name":"i2c_mux", "delay":0},
+        {"name":"rtcpcf85063", "delay":0},
+        {"name":"i2c_mux_pca954x", "delay":0}, # force_deselect_on_exit=1
+        {"name":"platform_common dfd_my_type=0x4065", "delay":0},
+        {"name":"wb_cpld", "delay":0},
+        {"name":"wb_at24", "delay":0},
+        {"name":"optoe", "delay":0},
+]
+
+DEVICE = [
+        {"name":"rtcpcf85063","bus":1,"loc":0x51 },
+        {"name":"wb_24c02","bus":1,"loc":0x56 },
+        {"name":"wb_cpld","bus":3,"loc":0x30 },
+        {"name":"wb_24c02","bus":5,"loc":0x50 },
+        {"name":"wb_24c02","bus":5,"loc":0x57 },
+]
+
+INIT_PARAM = [
+    {"loc":"3-0030/tx_write_protect","value": "59","delay":1},
+    {"loc":"3-0030/tx_disable","value": "00"},
+    {"loc":"3-0030/tx_write_protect","value": "4e"},
+]
+
+INIT_COMMAND = [
+    "hwclock -s",
+]
+
diff --git a/platform/centec-arm64/sonic-platform-modules-micas/m2-w6010-48gt4x-ra/config/fan_ctrl_cfg.json b/platform/centec-arm64/sonic-platform-modules-micas/m2-w6010-48gt4x-ra/config/fan_ctrl_cfg.json
new file mode 100644
index 000000000..86fcf892f
--- /dev/null
+++ b/platform/centec-arm64/sonic-platform-modules-micas/m2-w6010-48gt4x-ra/config/fan_ctrl_cfg.json
@@ -0,0 +1,40 @@
+{
+    "Device": {
+        "Liquid": 0,
+        "Buildin": 1,
+        "PID": 0,
+        "OpenLoop": 1
+    },
+    "Thermal": {
+        "INLET_TEMP": "INLET_TEMP",
+        "OUTLET_TEMP": "OUTLET_TEMP",
+        "SWITCH_TEMP": "TPS53688_TEMP"
+    },
+    "Fans": {
+        "Fan1" : "Fantray1_1",
+        "Fan2" : "Fantray2_1"
+    },
+    "PID": {
+        "Pwm_Max": 99,
+        "Pwm_Min": 30,
+        "SetPoint" : 90,
+        "P": 1.5,
+        "I": 1,
+        "D": 0.3,
+        "Temp_Min": 28.0,
+        "Temp_Max": 45.0,
+        "Sensor": "TPS53688_TEMP"
+    },
+    "OpenLoop": {
+        "a": -0.06,
+        "b": 10.3,
+        "c": -142.0,
+        "fix_up": -8,
+        "pwmMax": 99,
+        "pwmMin": 30,
+        "tempMin": 25
+    },
+    "FanError": {
+        "Fan_Pwmmax":99
+    }
+}
\ No newline at end of file
diff --git a/platform/centec-arm64/sonic-platform-modules-micas/m2-w6010-48gt4x-ra/service/m2-w6010-48gt4x_platform.service b/platform/centec-arm64/sonic-platform-modules-micas/m2-w6010-48gt4x-ra/service/m2-w6010-48gt4x_platform.service
new file mode 100644
index 000000000..988739214
--- /dev/null
+++ b/platform/centec-arm64/sonic-platform-modules-micas/m2-w6010-48gt4x-ra/service/m2-w6010-48gt4x_platform.service
@@ -0,0 +1,13 @@
+[Unit]
+Description=Centec modules init
+After=local-fs.target
+Before=syncd.service
+
+[Service]
+Type=oneshot
+ExecStart=-/etc/init.d/platform-modules-micas-m2-w6010-48gt4x-ra start
+ExecStop=-/etc/init.d/platform-modules-micas-m2-w6010-48gt4x-ra stop
+RemainAfterExit=yes
+
+[Install]
+WantedBy=multi-user.target
diff --git a/platform/centec-arm64/sonic-platform-modules-micas/m2-w6010-48gt4x-ra/setup.py b/platform/centec-arm64/sonic-platform-modules-micas/m2-w6010-48gt4x-ra/setup.py
new file mode 100644
index 000000000..b8aab8203
--- /dev/null
+++ b/platform/centec-arm64/sonic-platform-modules-micas/m2-w6010-48gt4x-ra/setup.py
@@ -0,0 +1,15 @@
+#!/usr/bin/env python
+
+import os
+import sys
+from setuptools import setup
+
+setup(
+    name='sonic_platform',
+    version='1.0',
+    description='Module to initialize centec platforms',
+
+    packages=['sonic_platform'],
+    package_dir={'sonic_platform': 'sonic_platform'},
+)
+
diff --git a/platform/centec-arm64/sonic-platform-modules-micas/m2-w6010-48gt4x-ra/sonic_platform/__init__.py b/platform/centec-arm64/sonic-platform-modules-micas/m2-w6010-48gt4x-ra/sonic_platform/__init__.py
new file mode 100644
index 000000000..4bfefa0fb
--- /dev/null
+++ b/platform/centec-arm64/sonic-platform-modules-micas/m2-w6010-48gt4x-ra/sonic_platform/__init__.py
@@ -0,0 +1,3 @@
+__all__ = ["platform", "chassis"]
+from sonic_platform import *
+
diff --git a/platform/centec-arm64/sonic-platform-modules-micas/m2-w6010-48gt4x-ra/sonic_platform/chassis.py b/platform/centec-arm64/sonic-platform-modules-micas/m2-w6010-48gt4x-ra/sonic_platform/chassis.py
new file mode 100644
index 000000000..8cdf84cf3
--- /dev/null
+++ b/platform/centec-arm64/sonic-platform-modules-micas/m2-w6010-48gt4x-ra/sonic_platform/chassis.py
@@ -0,0 +1,444 @@
+
+#!/usr/bin/env python
+
+try:
+    import time
+    from sonic_platform_base.chassis_base import ChassisBase
+    from sonic_platform.eeprom import Eeprom
+    from sonic_platform.thermal import Thermal
+    from sonic_platform.fan_drawer import FanDrawer
+    from sonic_platform.sfp import Sfp
+    from sonic_platform.psu import Psu
+    from .component import Component
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+NUM_FAN_TRAY = 2
+NUM_FAN = 2
+NUM_THERMAL = 5
+NUM_PORT    = 52
+NUM_PSU = 2
+
+class Chassis(ChassisBase):
+
+    port_dict = {}
+    STATUS_INSERTED = "1"
+    STATUS_REMOVED = "0"
+
+    def __init__(self):
+        ChassisBase.__init__(self)
+        # Initialize EEPROM
+        self._eeprom = Eeprom()
+        #firmware
+        for i in range(0,2):
+            self._component_list.append(Component(i))
+        # Initialize FAN
+        for i in range(NUM_FAN_TRAY):
+            fandrawer = FanDrawer(i)
+            self._fan_drawer_list.append(fandrawer)
+            self._fan_list.extend(fandrawer._fan_list)
+        # Initialize THERMAL
+        for index in range(0, NUM_THERMAL):
+            thermal = Thermal(index)
+            self._thermal_list.append(thermal)
+        # Initialize SFP
+        for index in range(0, NUM_PORT + 1):
+            sfp = Sfp(index)
+            self._sfp_list.append(sfp)
+            if sfp.get_presence():
+                self.port_dict[index] = self.STATUS_INSERTED
+            else:
+                self.port_dict[index] = self.STATUS_REMOVED
+        # Initialize PSU
+        for index in range(0, NUM_PSU):
+            psu = Psu(index)
+            self._psu_list.append(psu)
+
+##############################################
+# Device methods
+##############################################
+
+    def get_name(self):
+        """
+        Retrieves the name of the chassis
+        Returns:
+            string: The name of the chassis
+        """
+        name = ''
+        sys_eeprom = self.get_eeprom()
+        if sys_eeprom is None:
+            return ''
+
+        e = sys_eeprom.read_eeprom()
+        name = sys_eeprom.modelstr(e)
+        if name is None:
+            return ''
+        return name
+
+    def get_presence(self):
+        """
+        Retrieves the presence of the chassis
+        Returns:
+            bool: True if chassis is present, False if not
+        """
+        return True
+
+    def get_model(self):
+        """
+        Retrieves the model number (or part number) of the chassis
+        Returns:
+            string: Model/part number of chassis
+        """
+        model = ''
+        sys_eeprom = self.get_eeprom()
+        if sys_eeprom is None:
+            return ''
+
+        e = sys_eeprom.read_eeprom()
+        model = sys_eeprom.modelnumber(e)
+        if model is None:
+            return ''
+        return model
+
+    def get_serial_number(self):
+        """
+        Retrieves the hardware serial number for the chassis
+
+        Returns:
+            A string containing the hardware serial number for this chassis.
+        """
+        serial_number = ''
+        sys_eeprom = self.get_eeprom()
+        if sys_eeprom is None:
+            return ''
+
+        e = sys_eeprom.read_eeprom()
+        serial_number = sys_eeprom.serial_number_str(e)
+        if serial_number is None:
+            return ''
+
+        return serial_number
+
+    def get_revision(self):
+        """
+        Retrieves the hardware revision of the device
+
+        Returns:
+            string: Revision value of device
+        """
+        device_version = ''
+        sys_eeprom = self.get_eeprom()
+        if sys_eeprom is None:
+            return ''
+
+        e = sys_eeprom.read_eeprom()
+        device_version = sys_eeprom.deviceversion(e)
+        if device_version is None:
+            return ''
+
+        return device_version
+
+    def get_serial(self):
+        """
+        Retrieves the serial number of the chassis (Service tag)
+        Returns:
+            string: Serial number of chassis
+        """
+        return self.get_serial_number()
+
+    def get_status(self):
+        """
+        Retrieves the operational status of the chassis
+        Returns:
+            bool: A boolean value, True if chassis is operating properly
+            False if not
+        """
+        return True
+
+    def get_position_in_parent(self):
+        """
+        Retrieves 1-based relative physical position in parent device. If the agent cannot determine the parent-relative position
+        for some reason, or if the associated value of entPhysicalContainedIn is '0', then the value '-1' is returned
+        Returns:
+            integer: The 1-based relative physical position in parent device or -1 if cannot determine the position
+        """
+        return -1
+
+    def is_replaceable(self):
+        """
+        Indicate whether this device is replaceable.
+        Returns:
+            bool: True if it is replaceable.
+        """
+        return False
+
+    def initizalize_system_led(self):
+        return True
+
+    def get_status_led(self):
+        """
+        Gets the state of the system LED
+
+        Returns:
+            A string, one of the valid LED color strings which could be vendor
+            specified.
+        """
+        return 'green'
+
+    def set_status_led(self, color):
+        return False
+##############################################
+# Chassis methods
+##############################################
+
+    def get_base_mac(self):
+        """
+        Retrieves the base MAC address for the chassis
+
+        Returns:
+            A string containing the MAC address in the format
+            'XX:XX:XX:XX:XX:XX'
+        """
+        base_mac = ''
+        sys_eeprom = self.get_eeprom()
+        if sys_eeprom is None:
+            return ''
+
+        e = sys_eeprom.read_eeprom()
+        base_mac = sys_eeprom.base_mac_addr(e)
+        if base_mac is None:
+            return ''
+
+        return base_mac.upper()
+
+    def get_system_eeprom_info(self):
+        """
+        Retrieves the full content of system EEPROM information for the chassis
+
+        Returns:
+            A dictionary where keys are the type code defined in
+            OCP ONIE TlvInfo EEPROM format and values are their corresponding
+            values.
+            Ex. { '0x21':'AG9064', '0x22':'V1.0', '0x23':'AG9064-0109867821',
+                  '0x24':'001c0f000fcd0a', '0x25':'02/03/2018 16:22:00',
+                  '0x26':'01', '0x27':'REV01', '0x28':'AG9064-C2358-16G'}
+        """
+        sys_eeprom_dict = dict()
+        sys_eeprom = self.get_eeprom()
+        if sys_eeprom is None:
+            return {}
+
+        e = sys_eeprom.read_eeprom()
+        if sys_eeprom._TLV_HDR_ENABLED:
+            if not sys_eeprom.is_valid_tlvinfo_header(e):
+                return {}
+            total_len = (e[9] << 8) | e[10]
+            tlv_index = sys_eeprom._TLV_INFO_HDR_LEN
+            tlv_end = sys_eeprom._TLV_INFO_HDR_LEN + total_len
+        else:
+            tlv_index = sys_eeprom.eeprom_start
+            tlv_end = sys_eeprom._TLV_INFO_MAX_LEN
+
+        while (tlv_index + 2) < len(e) and tlv_index < tlv_end:
+            if not sys_eeprom.is_valid_tlv(e[tlv_index:]):
+                break
+
+            tlv = e[tlv_index:tlv_index + 2 + e[tlv_index + 1]]
+            name, value = sys_eeprom.decoder(None, tlv)
+            sys_eeprom_dict[name] = value
+
+            if e[tlv_index] == sys_eeprom._TLV_CODE_QUANTA_CRC or \
+                    e[tlv_index] == sys_eeprom._TLV_CODE_CRC_32:
+                break
+            tlv_index += e[tlv_index + 1] + 2
+
+        return sys_eeprom_dict
+
+    def get_thermal_manager(self):
+        """
+        Retrieves thermal manager class on this chassis
+        :return: A class derived from ThermalManagerBase representing the
+        specified thermal manager. ThermalManagerBase is returned as default
+        """
+        return False
+
+    def get_reboot_cause(self):
+        """
+        Retrieves the cause of the previous reboot
+        Returns:
+            A tuple (string, string) where the first element is a string
+            containing the cause of the previous reboot. This string must be
+            one of the predefined strings in this class. If the first string
+            is "REBOOT_CAUSE_HARDWARE_OTHER", the second string can be used
+            to pass a description of the reboot cause.
+        """
+        return (None, None)
+
+    def get_module(self, index):
+        """
+        Retrieves module represented by (0-based) index <index>
+
+        Args:
+            index: An integer, the index (0-based) of the module to
+            retrieve
+
+        Returns:
+            An object dervied from ModuleBase representing the specified
+            module
+        """
+        module = None
+
+        try:
+            if self.get_num_modules():
+                module = self._module_list[index]
+        except IndexError:
+            sys.stderr.write("Module index {} out of range (0-{})\n".format(
+                             index, len(self._module_list)-1))
+
+        return module
+
+    def get_fan_drawer(self, index):
+        """
+        Retrieves fan drawers represented by (0-based) index <index>
+
+        Args:
+            index: An integer, the index (0-based) of the fan drawer to
+            retrieve
+
+        Returns:
+            An object dervied from FanDrawerBase representing the specified fan
+            drawer
+        """
+        fan_drawer = None
+
+        try:
+            if self.get_num_fan_drawers():
+                fan_drawer = self._fan_drawer_list[index]
+        except IndexError:
+            sys.stderr.write("Fan drawer index {} out of range (0-{})\n".format(
+                             index, len(self._fan_drawer_list)-1))
+
+        return fan_drawer
+
+    def get_change_event(self, timeout=0):
+        """
+        Returns a nested dictionary containing all devices which have
+        experienced a change at chassis level
+
+        Args:
+            timeout: Timeout in milliseconds (optional). If timeout == 0,
+                this method will block until a change is detected.
+
+        Returns:
+            (bool, dict):
+                - bool: True if call successful, False if not;
+                - dict: A nested dictionary where key is a device type,
+                        value is a dictionary with key:value pairs in the format of
+                        {'device_id':'device_event'}, where device_id is the device ID
+                        for this device and device_event.
+                        The known devices's device_id and device_event was defined as table below.
+                         -----------------------------------------------------------------
+                         device   |     device_id       |  device_event  |  annotate
+                         -----------------------------------------------------------------
+                         'fan'          '<fan number>'     '0'              Fan removed
+                                                           '1'              Fan inserted
+
+                         'sfp'          '<sfp number>'     '0'              Sfp removed
+                                                           '1'              Sfp inserted
+                                                           '2'              I2C bus stuck
+                                                           '3'              Bad eeprom
+                                                           '4'              Unsupported cable
+                                                           '5'              High Temperature
+                                                           '6'              Bad cable
+
+                         'voltage'      '<monitor point>'  '0'              Vout normal
+                                                           '1'              Vout abnormal
+                         --------------------------------------------------------------------
+                  Ex. {'fan':{'0':'0', '2':'1'}, 'sfp':{'11':'0', '12':'1'},
+                       'voltage':{'U20':'0', 'U21':'1'}}
+                  Indicates that:
+                     fan 0 has been removed, fan 2 has been inserted.
+                     sfp 11 has been removed, sfp 12 has been inserted.
+                     monitored voltage U20 became normal, voltage U21 became abnormal.
+                  Note: For sfp, when event 3-6 happened, the module will not be avalaible,
+                        XCVRD shall stop to read eeprom before SFP recovered from error status.
+        """
+
+        change_event_dict = {"fan": {}, "sfp": {}, "voltage": {}}
+
+        start_time = time.time()
+        forever = False
+
+        if timeout == 0:
+            forever = True
+        elif timeout > 0:
+            timeout = timeout / float(1000)  # Convert to secs
+        else:
+            print("get_change_event:Invalid timeout value", timeout)
+            return False, change_event_dict
+
+        end_time = start_time + timeout
+        if start_time > end_time:
+            print(
+                "get_change_event:" "time wrap / invalid timeout value",
+                timeout,
+            )
+            return False, change_event_dict  # Time wrap or possibly incorrect timeout
+        try:
+            while timeout >= 0:
+                # check for sfp
+                sfp_change_dict = self.get_transceiver_change_event()
+                # check for fan
+                # fan_change_dict = self.get_fan_change_event()
+                # check for voltage
+                # voltage_change_dict = self.get_voltage_change_event()
+
+                if sfp_change_dict:
+                    change_event_dict["sfp"] = sfp_change_dict
+                    # change_event_dict["fan"] = fan_change_dict
+                    # change_event_dict["voltage"] = voltage_change_dict
+                    return True, change_event_dict
+                if forever:
+                    time.sleep(1)
+                else:
+                    timeout = end_time - time.time()
+                    if timeout >= 1:
+                        time.sleep(1)  # We poll at 1 second granularity
+                    else:
+                        if timeout > 0:
+                            time.sleep(timeout)
+                        return True, change_event_dict
+        except Exception as e:
+            print(e)
+        print("get_change_event: Should not reach here.")
+        return False, change_event_dict
+
+    def get_transceiver_change_event(self):
+        current_port_dict = {}
+        ret_dict = {}
+
+        # Check for OIR events and return ret_dict
+        for index in range(0, NUM_PORT + 1):
+            if self._sfp_list[index].get_presence():
+                current_port_dict[index] = self.STATUS_INSERTED
+            else:
+                current_port_dict[index] = self.STATUS_REMOVED
+
+        if len(self.port_dict) == 0:       # first time
+            self.port_dict = current_port_dict
+            return {}
+
+        if current_port_dict == self.port_dict:
+            return {}
+
+        # Update reg value
+        for index, status in current_port_dict.items():
+            if self.port_dict[index] != status:
+                ret_dict[index] = status
+                #ret_dict[str(index)] = status
+        self.port_dict = current_port_dict
+        for index, status in ret_dict.items():
+            if int(status) == 1:
+                pass
+                #self._sfp_list[int(index)].check_sfp_optoe_type()
+        return ret_dict
diff --git a/platform/centec-arm64/sonic-platform-modules-micas/m2-w6010-48gt4x-ra/sonic_platform/component.py b/platform/centec-arm64/sonic-platform-modules-micas/m2-w6010-48gt4x-ra/sonic_platform/component.py
new file mode 100644
index 000000000..325c000ee
--- /dev/null
+++ b/platform/centec-arm64/sonic-platform-modules-micas/m2-w6010-48gt4x-ra/sonic_platform/component.py
@@ -0,0 +1,93 @@
+#!/usr/bin/env python
+
+try:
+    import subprocess
+    from sonic_platform_base.component_base import ComponentBase
+    import sonic_platform.hwaccess as hwaccess
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+def get_cpld_version(bus, i2caddr):
+    return '{}{}{}{}'.format(hwaccess.i2c_get(bus, i2caddr, 1),
+                          hwaccess.i2c_get(bus, i2caddr, 2),
+                          hwaccess.i2c_get(bus, i2caddr, 3),
+                          hwaccess.i2c_get(bus, i2caddr, 0)
+                          )
+
+def get_cpu_cpld_version():
+    return get_cpld_version(2, 0x0d)
+
+def get_cpld1_version():
+    return get_cpld_version(3, 0x30)
+
+COMPONENT_LIST= [
+        ['CPU CPLD',
+         'cpu board',
+         get_cpu_cpld_version
+         ],
+
+        ['MAC1 CPLD',
+         'mac1 board',
+         get_cpld1_version
+         ]
+    ]
+
+class Component(ComponentBase):
+    """Platform-specific Component class"""
+
+    def __init__(self, component_index=0):
+        ComponentBase.__init__(self)
+        self.index = component_index
+
+    def get_name(self):
+        """
+        Retrieves the name of the component
+
+        Returns:
+            A string containing the name of the component
+        """
+        return COMPONENT_LIST[self.index][0]
+
+    def get_description(self):
+        """
+        Retrieves the description of the component
+
+        Returns:
+            A string containing the description of the component
+        """
+        return COMPONENT_LIST[self.index][1]
+
+    def get_firmware_version(self):
+        """
+        Retrieves the firmware version of the component
+
+        Returns:
+            A string containing the firmware version of the component
+        """
+        return COMPONENT_LIST[self.index][2]()
+
+    def install_firmware(self, image_path):
+        """
+        Installs firmware to the component
+
+        Args:
+            image_path: A string, path to firmware image
+
+        Returns:
+            A boolean, True if install was successful, False if not
+        """
+        try:
+            successtips = "CPLD Upgrade succeeded!"
+            status, output = subprocess.getstatusoutput("which firmware_upgrade")
+            if status or len(output) <= 0:
+                logger.error("no upgrade tool.")
+                return False
+            cmdstr = "%s %s cpld %d cpld"%(output,image_path,self.slot)
+            ret, log = subprocess.getstatusoutput(cmdstr)
+            if ret == 0 and successtips in log:
+                return True
+            logger.error("upgrade failed. ret:%d, log:\n%s" % (ret, log))
+        except Exception as e:
+            logger.error(str(e))
+        return False
+
diff --git a/platform/centec-arm64/sonic-platform-modules-micas/m2-w6010-48gt4x-ra/sonic_platform/eeprom.py b/platform/centec-arm64/sonic-platform-modules-micas/m2-w6010-48gt4x-ra/sonic_platform/eeprom.py
new file mode 100644
index 000000000..af5da656b
--- /dev/null
+++ b/platform/centec-arm64/sonic-platform-modules-micas/m2-w6010-48gt4x-ra/sonic_platform/eeprom.py
@@ -0,0 +1,38 @@
+#!/usr/bin/env python
+
+try:
+    from sonic_eeprom import eeprom_tlvinfo
+    import binascii
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+class Eeprom(eeprom_tlvinfo.TlvInfoDecoder):
+    """Platform-specific Eeprom class"""
+
+    def __init__(self):
+        eeprom_path = "/sys/bus/i2c/devices/1-0056/eeprom"
+        if eeprom_path is None:
+            raise ValueError("get eeprom path failed")
+
+        super(Eeprom, self).__init__(eeprom_path, 0, "", True)
+
+
+    def modelnumber(self, e):
+        '''
+        Returns the value field of the model(part) number TLV as a string
+        '''
+        (is_valid, t) = self.get_tlv_field(e, self._TLV_CODE_PART_NUMBER)
+        if not is_valid:
+            return super(Eeprom, self).part_number_str(e)
+
+        return t[2].decode("ascii")
+
+    def deviceversion(self, e):
+        '''
+        Returns the value field of the Device Version as a string
+        '''
+        (is_valid, t) = self.get_tlv_field(e, self._TLV_CODE_DEVICE_VERSION)
+        if not is_valid:
+            return "N/A"
+
+        return str(ord(t[2]))
diff --git a/platform/centec-arm64/sonic-platform-modules-micas/m2-w6010-48gt4x-ra/sonic_platform/fan.py b/platform/centec-arm64/sonic-platform-modules-micas/m2-w6010-48gt4x-ra/sonic_platform/fan.py
new file mode 100644
index 000000000..69cb80e53
--- /dev/null
+++ b/platform/centec-arm64/sonic-platform-modules-micas/m2-w6010-48gt4x-ra/sonic_platform/fan.py
@@ -0,0 +1,178 @@
+#!/usr/bin/env python
+
+import time
+
+try:
+    from sonic_platform_base.fan_base import FanBase
+    from .redfish_api import Redfish_Api
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+FAN_NAME_LIST = ["1", "2"]
+
+class Fan(FanBase):
+    """Platform-specific Fan class"""
+
+    def __init__(self, fan_tray_index, fan_index=0):
+        self.fan_index = fan_index
+        self.fan_tray_index = fan_tray_index
+        self.redfish = Redfish_Api()
+        self.pinf = {}
+        self._fan_list = []
+        FanBase.__init__(self)
+        self.begin = time.time()
+
+    def get_power_3s(self):
+        self.elapsed = time.time()
+        if not self.pinf or self.elapsed - self.begin >= 3:
+            self.begin = time.time()
+            self.pinf = self.redfish.get_thermal()
+
+    def get_speed_pwm(self):
+        self.get_power_3s()
+        ctrl = self.pinf["Fans"]
+        output = ctrl[self.fan_tray_index]
+        speed = output.get("Oem").get("OpenBmc").get("FanSpeedLevelPercents")
+        return int(speed)
+
+    def get_speed_rpm(self):
+        self.get_power_3s()
+        ctrl = self.pinf["Fans"]
+        output = ctrl[self.fan_tray_index]
+        speed = output.get("Reading")
+        return int(speed)
+
+    def get_high_critical_threshold(self):
+        self.get_power_3s()
+        ctrl = self.pinf["Fans"]
+        output = ctrl[self.fan_tray_index]
+        high = output.get("UpperThresholdFatal")
+        return int(high)
+
+    def get_low_critical_threshold(self):
+        self.get_power_3s()
+        ctrl = self.pinf["Fans"]
+        output = ctrl[self.fan_tray_index]
+        low = output.get("LowerThresholdFatal")
+        return int(low)
+
+    def set_speed_pwm(self, speed):
+        post_url = '/redfish/v1/Chassis/1/Thermal/Actions/Oem/OpenBmc/Fan.SetSpeed'
+        playload = {}
+        playload["FanName"] = "Fan0"
+        playload["FanSpeedLevelPercents"] = str(speed)
+        return self.redfish.post_odata(post_url, playload)
+
+    def get_status_led(self):
+        self.get_power_3s()
+        ctrl = self.pinf["Fans"]
+        output = ctrl[self.fan_tray_index]
+        led = output.get("Oem").get("OpenBmc").get("IndicatorLEDColor")
+        return led
+
+    def set_status_led(self, color):
+        playload = {}
+        led = {}
+        led_list = []
+        led["IndicatorLEDColor"] = color
+        led["LEDType"] = "fan"
+        led_list.append(led)
+        playload["LEDs"] = led_list
+        # boardsLed
+        return self.redfish.post_boardLed(playload)
+
+    def get_direction(self):
+        return "exhaust"
+
+    def get_name(self):
+        fan_name = FAN_NAME_LIST[self.fan_index]
+        return "Fantray{}_{}".format(self.fan_tray_index+1, fan_name)
+
+    def get_model(self):
+        """
+        Retrieves the part number of the FAN
+        Returns:
+            string: Part number of FAN
+        """
+        return 'N/A'
+
+    def get_position_in_parent(self):
+        """
+        Retrieves 1-based relative physical position in parent device. If the agent cannot determine the parent-relative position
+        for some reason, or if the associated value of entPhysicalContainedIn is '0', then the value '-1' is returned
+        Returns:
+            integer: The 1-based relative physical position in parent device or -1 if cannot determine the position
+        """
+        return -1
+
+    def is_replaceable(self):
+        """
+        Indicate whether this device is replaceable.
+        Returns:
+            bool: True if it is replaceable.
+        """
+        return False
+
+    def get_revision(self):
+        """
+        Retrieves the hardware revision of the device
+
+        Returns:
+            string: Revision value of device
+        """
+        return 'N/A'
+
+    def get_serial(self):
+        """
+        Retrieves the serial number of the FAN
+        Returns:
+            string: Serial number of FAN
+        """
+        return 'N/A'
+
+    def get_presence(self):
+        self.get_power_3s()
+        ctrl = self.pinf["Fans"]
+        output = ctrl[self.fan_tray_index]
+        state = output.get("Status").get("Status").get("State")
+        if state == "Enabled" or state == "UnavailableOffline":
+            return True
+        return False
+
+    def get_status(self):
+        self.get_power_3s()
+        ctrl = self.pinf["Fans"]
+        output = ctrl[self.fan_tray_index]
+        if output.get("Status").get("Status").get("Health") == "OK":
+            return True
+        return False
+
+    def get_speed(self):
+        self.get_power_3s()
+        ctrl = self.pinf["Fans"]
+        output = ctrl[self.fan_tray_index]
+        speed = output.get("Reading")
+        speed_percentage = round((speed*100)/17500)
+        if speed_percentage > 100:
+            speed_percentage = 100
+            return speed_percentage
+        else:
+            return speed_percentage
+
+    def get_speed_tolerance(self):
+        """
+        Retrieves the speed tolerance of the fan
+        Returns:
+            An integer, the percentage of variance from target speed which is
+        considered tolerable
+        """
+        return 30
+
+    def get_target_speed(self):
+        """
+        Retrieves the target (expected) speed of the fan
+        Returns:
+            An integer, the percentage of full fan speed, in the range 0 (off)
+                 to 100 (full speed)
+        """
+        return self.get_speed_pwm()
diff --git a/platform/centec-arm64/sonic-platform-modules-micas/m2-w6010-48gt4x-ra/sonic_platform/fan_drawer.py b/platform/centec-arm64/sonic-platform-modules-micas/m2-w6010-48gt4x-ra/sonic_platform/fan_drawer.py
new file mode 100644
index 000000000..fcf7d519c
--- /dev/null
+++ b/platform/centec-arm64/sonic-platform-modules-micas/m2-w6010-48gt4x-ra/sonic_platform/fan_drawer.py
@@ -0,0 +1,125 @@
+#!/usr/bin/env python
+
+import time
+
+try:
+    from sonic_platform_base.fan_drawer_base import FanDrawerBase
+    from sonic_platform.fan import Fan
+    from .redfish_api import Redfish_Api
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+
+class FanDrawer(FanDrawerBase):
+
+    FANS_PER_FANTRAY = 1
+
+    def __init__(self, fantray_index=0):
+        FanDrawerBase.__init__(self)
+        self.fantrayindex = fantray_index
+        self.redfish = Redfish_Api()
+        self.pinf = {}
+        self.begin = time.time()
+        for i in range(self.FANS_PER_FANTRAY):
+            self._fan_list.append(Fan(fantray_index, i))
+
+    def get_power_3s(self):
+        self.elapsed = time.time()
+        if not self.pinf or self.elapsed - self.begin >= 3:
+            self.begin = time.time()
+            self.pinf = self.redfish.get_thermal()
+
+    def get_name(self):
+        return "FanTray{}".format(self.fantrayindex+1)
+
+    def get_presence(self):
+        self.get_power_3s()
+        ctrl = self.pinf["Fans"]
+        output = ctrl[self.fantrayindex]
+        state = output.get("Status").get("Status").get("State")
+        if state == "Enabled" or state == "UnavailableOffline":
+            return True
+        return False
+
+    def get_model(self):
+        """
+        Retrieves the part number of the FAN
+        Returns:
+            string: Part number of FAN
+        """
+        return 'N/A'
+
+    def get_serial(self):
+        """
+        Retrieves the serial number of the FAN
+        Returns:
+            string: Serial number of FAN
+        """
+        return 'N/A'
+
+    def get_revision(self):
+        """
+        Retrieves the hardware revision of the device
+
+        Returns:
+            string: Revision value of device
+        """
+        return 'N/A'
+
+    def get_status(self):
+        """
+        Retrieves the operational status of the FAN
+        Returns:
+            bool: True if FAN is operating properly, False if not
+        """
+        self.get_power_3s()
+        ctrl = self.pinf["Fans"]
+        output = ctrl[self.fantrayindex]
+        if output.get("Status").get("Status").get("Health") == "OK":
+            return True
+        return False
+
+    def get_position_in_parent(self):
+        """
+        Retrieves 1-based relative physical position in parent device. If the agent cannot determine the parent-relative position
+        for some reason, or if the associated value of entPhysicalContainedIn is '0', then the value '-1' is returned
+        Returns:
+            integer: The 1-based relative physical position in parent device or -1 if cannot determine the position
+        """
+        return -1
+
+    def is_replaceable(self):
+        """
+        Indicate whether this device is replaceable.
+        Returns:
+            bool: True if it is replaceable.
+        """
+        return False
+
+    def get_status_led(self):
+        self.get_power_3s()
+        ctrl = self.pinf["Fans"]
+        output = ctrl[self.fantrayindex]
+        led = output.get("Oem").get("OpenBmc").get("IndicatorLEDColor")
+        return led
+
+    def set_status_led(self, color):
+        playload = {}
+        led = {}
+        led_list = []
+        led["IndicatorLEDColor"] = color
+        led["LEDType"] = "fan"
+        led_list.append(led)
+        playload["LEDs"] = led_list
+        # boardsLed
+        return self.redfish.post_boardLed(playload)
+
+    def get_maximum_consumed_power(self):
+        """
+        Retrives the maximum power drawn by Fan Drawer
+
+        Returns:
+            A float, with value of the maximum consumable power of the
+            component.
+        """
+        return 'N/A'
diff --git a/platform/centec-arm64/sonic-platform-modules-micas/m2-w6010-48gt4x-ra/sonic_platform/hwaccess.py b/platform/centec-arm64/sonic-platform-modules-micas/m2-w6010-48gt4x-ra/sonic_platform/hwaccess.py
new file mode 100644
index 000000000..7a04e766a
--- /dev/null
+++ b/platform/centec-arm64/sonic-platform-modules-micas/m2-w6010-48gt4x-ra/sonic_platform/hwaccess.py
@@ -0,0 +1,46 @@
+#!/usr/bin/env python
+
+import struct
+import mmap
+import subprocess
+
+# Read PCI device
+
+def pci_mem_read(mm, offset):
+    mm.seek(offset)
+    read_data_stream = mm.read(4)
+    return struct.unpack('I',read_data_stream)[0]
+
+def pci_get_value(resource, offset):
+    with open(resource, 'r+b') as fd:
+        mm = mmap.mmap(fd.fileno(), 0)
+        val = pci_mem_read(mm, offset)
+        mm.close()
+    return val
+
+def pci_mem_write(memmap, offset, data):
+    """ Write PCI device """
+    memmap.seek(offset)
+    memmap.write(struct.pack('I', data))
+
+def pci_set_value(resource, val, offset):
+    """ Set a value to PCI device """
+    with open(resource, 'w+b') as filed:
+        memmap = None
+        try:
+            memmap = mmap.mmap(filed.fileno(), 0)
+            pci_mem_write(memmap, offset, val)
+        except EnvironmentError:
+            print("error")
+        if memmap is not None:
+            memmap.close()
+
+# Read I2C device
+
+def i2c_get(bus, i2caddr, ofs):
+    try:
+        valx = int(subprocess.check_output(['/usr/sbin/i2cget','-f', '-y', str(bus), str(i2caddr), str(ofs)]), 16)
+        return "{:02x}".format(valx)
+    except (FileNotFoundError, subprocess.CalledProcessError):
+        return -1
+
diff --git a/platform/centec-arm64/sonic-platform-modules-micas/m2-w6010-48gt4x-ra/sonic_platform/platform.py b/platform/centec-arm64/sonic-platform-modules-micas/m2-w6010-48gt4x-ra/sonic_platform/platform.py
new file mode 100644
index 000000000..7225a71b0
--- /dev/null
+++ b/platform/centec-arm64/sonic-platform-modules-micas/m2-w6010-48gt4x-ra/sonic_platform/platform.py
@@ -0,0 +1,15 @@
+#!/usr/bin/env python
+
+try:
+    from sonic_platform_base.platform_base import PlatformBase
+    from sonic_platform.chassis import Chassis
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+
+class Platform(PlatformBase):
+
+    def __init__(self):
+        PlatformBase.__init__(self)
+        self._chassis = Chassis()
+
diff --git a/platform/centec-arm64/sonic-platform-modules-micas/m2-w6010-48gt4x-ra/sonic_platform/psu.py b/platform/centec-arm64/sonic-platform-modules-micas/m2-w6010-48gt4x-ra/sonic_platform/psu.py
new file mode 100644
index 000000000..5176552c1
--- /dev/null
+++ b/platform/centec-arm64/sonic-platform-modules-micas/m2-w6010-48gt4x-ra/sonic_platform/psu.py
@@ -0,0 +1,231 @@
+#!/usr/bin/env python
+
+import time
+import imp
+import os
+import sys
+
+try:
+    from sonic_platform_base.psu_base import PsuBase
+    from .redfish_api import Redfish_Api
+except ImportError as e:
+    raise ImportError("%s - required module not found" % e)
+
+class Psu(PsuBase):
+    """Platform-specific Psu class"""
+
+    def __init__(self, index=0):
+        PsuBase.__init__(self)
+        self.redfish = Redfish_Api()
+        self.pinf = {}
+        self.psu_index = index
+        self._fan_list = []
+        self._thermal_list = []
+        self.begin = time.time()
+
+    def get_power_3s(self):
+        self.elapsed = time.time()
+        if not self.pinf or self.elapsed - self.begin >= 3:
+            self.begin = time.time()
+            self.pinf = self.redfish.get_power()
+
+    def get_presence(self):
+        return True
+
+    def get_fan(self, index):
+        """
+        Retrieves fan module represented by (0-based) index <index>
+
+        Args:
+            index: An integer, the index (0-based) of the fan module to
+            retrieve
+
+        Returns:
+            An object dervied from FanBase representing the specified fan
+            module
+        """
+        return None
+
+    def get_powergood_status(self):
+        self.get_power_3s()
+        ctrl = self.pinf["PowerSupplies"]
+        output = ctrl[self.psu_index]
+        if output.get("Status").get("Health") == "OK":
+            return True
+        else:
+            return False
+
+    def get_name(self):
+        """
+        Retrieves the name of the device
+
+        Returns:
+            string: The name of the device
+        """
+        return "PSU {}".format(self.psu_index + 1)
+
+    def get_serial(self):
+        self.get_power_3s()
+        ctrl = self.pinf["PowerSupplies"]
+        output = ctrl[self.psu_index]
+        serial = output.get("SerialNumber")
+        return serial
+
+    def get_model(self):
+        self.get_power_3s()
+        ctrl = self.pinf["PowerSupplies"]
+        output = ctrl[self.psu_index]
+        model = output.get("Model")
+        return model
+
+    def get_revision(self):
+        self.get_power_3s()
+        ctrl = self.pinf["PowerSupplies"]
+        output = ctrl[self.psu_index]
+        manufacturer = output.get("Manufacturer")
+        return manufacturer
+
+    def get_voltage(self):
+        self.get_power_3s()
+        ctrl = self.pinf["PowerSupplies"]
+        output = ctrl[self.psu_index]
+        voltage = output.get("Oem").get("OpenBmc").get("OutputVoltage")
+        return voltage
+
+    def get_input_current(self):
+        self.get_power_3s()
+        ctrl = self.pinf["PowerSupplies"]
+        output = ctrl[self.psu_index]
+        current = output.get("Oem").get("OpenBmc").get("OutputAmperage")
+        return current
+
+    def get_input_voltage(self):
+        self.get_power_3s()
+        ctrl = self.pinf["PowerSupplies"]
+        output = ctrl[self.psu_index]
+        voltage = output.get("Oem").get("OpenBmc").get("OutputVoltage")
+        return voltage
+
+    def get_current(self):
+        self.get_power_3s()
+        ctrl = self.pinf["PowerSupplies"]
+        output = ctrl[self.psu_index]
+        current = output.get("Oem").get("OpenBmc").get("OutputAmperage")
+        return current
+
+    def get_power(self):
+        self.get_power_3s()
+        ctrl = self.pinf["PowerSupplies"]
+        output = ctrl[self.psu_index]
+        current = output.get("Oem").get("OpenBmc").get("OutputAmperage")
+        voltage = output.get("Oem").get("OpenBmc").get("OutputVoltage")
+        power = float(current)*float(voltage)
+        return round(power,2)
+
+    def get_temperature(self):
+        """
+        Retrieves current temperature reading from PSU
+
+        Returns:
+            A float number of current temperature in Celsius up to nearest thousandth
+            of one degree Celsius, e.g. 30.125
+        """
+        # no temperature sensor
+        value = 35
+        return round(float(value), 1)
+
+    def get_status_led(self):
+        return "BuildIn"
+
+    def set_status_led(self, color):
+        playload = {}
+        led = {}
+        led_list = []
+        led["IndicatorLEDColor"] = color
+        led["LEDType"] = "pwr"
+        led_list.append(led)
+        playload["LEDs"] = led_list
+        # boardsLed
+        return self.redfish.post_boardLed(playload)
+
+    def get_maximum_supplied_power(self):
+        """
+        Retrieves the maximum supplied power by PSU
+
+        Returns:
+            A float number, the maximum power output in Watts.
+            e.g. 1200.1
+        """
+        return False
+
+    def get_position_in_parent(self):
+        """
+        Retrieves 1-based relative physical position in parent device. If the agent cannot determine the parent-relative position
+        for some reason, or if the associated value of entPhysicalContainedIn is '0', then the value '-1' is returned
+        Returns:
+            integer: The 1-based relative physical position in parent device or -1 if cannot determine the position
+        """
+        return -1
+
+    def is_replaceable(self):
+        """
+        Indicate whether this device is replaceable.
+        Returns:
+            bool: True if it is replaceable.
+        """
+        return False
+
+    def get_status(self):
+        """
+        Retrieves the operational status of the PSU
+
+        Returns:
+            bool: True if PSU is operating properly, False if not
+        """
+        return self.get_powergood_status()
+
+    def get_temperature_high_threshold(self):
+        """
+        Retrieves the high threshold temperature of PSU
+
+        Returns:
+            A float number, the high threshold temperature of PSU in Celsius
+            up to nearest thousandth of one degree Celsius, e.g. 30.125
+        """
+        value = 75
+        return round(float(value), 1)
+
+    def get_voltage_high_threshold(self):
+        """
+        Retrieves the high threshold PSU voltage output
+
+        Returns:
+            A float number, the high threshold output voltage in volts,
+            e.g. 12.1
+        """
+        value = 14.52
+        return str(round(float(value), 2))
+
+    def get_voltage_low_threshold(self):
+        """
+        Retrieves the low threshold PSU voltage output
+
+        Returns:
+            A float number, the low threshold output voltage in volts,
+            e.g. 12.1
+        """
+        value = 9.72
+        return str(round(float(value), 2))
+
+    def get_thermal(self, index):
+        """
+        Retrieves thermal unit represented by (0-based) index <index>
+
+        Args:
+            index: An integer, the index (0-based) of the thermal to
+            retrieve
+
+        Returns:
+            An object dervied from ThermalBase representing the specified thermal
+        """
+        return None
diff --git a/platform/centec-arm64/sonic-platform-modules-micas/m2-w6010-48gt4x-ra/sonic_platform/redfish_api.py b/platform/centec-arm64/sonic-platform-modules-micas/m2-w6010-48gt4x-ra/sonic_platform/redfish_api.py
new file mode 100644
index 000000000..9d3cdd314
--- /dev/null
+++ b/platform/centec-arm64/sonic-platform-modules-micas/m2-w6010-48gt4x-ra/sonic_platform/redfish_api.py
@@ -0,0 +1,304 @@
+#!/usr/bin/env python3
+# -*- coding: utf-8 -*-
+import shlex
+import json
+import os
+import ssl
+import subprocess
+import syslog
+
+class Redfish_Api():
+    BmcBaseUrl = 'http://240.1.1.1:8080'
+    ThermalUrl = '/redfish/v1/Chassis/1/Thermal'
+    PowerUrl = '/redfish/v1/Chassis/1/Power'
+    ThresholdSensorsUrl = '/redfish/v1/Chassis/1/ThresholdSensors'
+    FanSpeedUrl = '/redfish/v1/Chassis/1/Thermal/Actions/Oem/OpenBmc/Fan.SetSpeed'
+    BoardsUrl = '/redfish/v1/Chassis/1/Boards/'
+    BoardLedUrl = "/redfish/v1/Chassis/1/Boards/{}/Actions/Oem/OpenBmc/Boards.SetLED"
+
+    # Maximum time in seconds that you allow the connection to the server to take.
+    connect_timeout = 30
+    # Maximum  time  in seconds that you allow the whole operation to take
+    operation_timeout = 300
+
+    default_prefix='/redfish/v1/'
+    session = None
+    __DEBUG__ = "N"
+    __DUMP_RESP__ = "N"
+    RST_STATUS = "status"
+    RST_SUCCESS = "OK"
+    refish_logger = None
+
+    def redfish_log_debug(self, msg):
+        if (self.__DEBUG__ == "Y"):
+            syslog.openlog("redfis_api")
+            syslog.syslog(syslog.LOG_DEBUG, msg)
+            syslog.closelog()
+
+    def redfish_log_error(self, msg):
+        syslog.openlog("redfish_api")
+        syslog.syslog(syslog.LOG_ERR, msg)
+        syslog.closelog()
+
+    def __init__(self):
+        pass
+
+    def get_full_url(self, url):
+        return self.BmcBaseUrl + url
+
+    def _exec_cmd(self, cmd):
+        self.redfish_log_debug("Cmd: %s" % cmd)
+        p = subprocess.Popen(shlex.split(cmd), shell=False, stdout=subprocess.PIPE, stderr=subprocess.PIPE)
+        p.wait()
+        self.redfish_log_debug("Cmd return: %d" % p.returncode)
+        str_stdout = p.stdout.read().decode('utf-8')
+        str_stderr = p.stderr.read().decode('utf-8')
+        self.redfish_log_debug("Cmd stdout: %s" % str_stdout)
+        if p.returncode !=0:
+            self.redfish_log_error("Cmd: %s, failed! error msg:%s" % (cmd, str_stderr))
+            return None
+        else:
+            try:
+                ret = json.loads(str_stdout)
+                return ret
+            except Exception as e:
+                self.redfish_log_error("Cmd: %s, failed! stdout msg:%s" % (cmd, str_stdout))
+                return None
+
+    def _redfish_get(self, url):
+        self.redfish_log_debug("Get info from %s." % url)
+        result = None
+        try:
+            cmd_get="curl --connect-timeout %d -m %d -X GET %s" % (self.connect_timeout, self.operation_timeout, self.get_full_url(url))
+            result = self._exec_cmd(cmd_get)
+            return result
+        except Exception as e:
+            self.redfish_log_error("error_message: %s" % e)
+            return None
+
+    def _redfish_post(self, url, playload):
+        self.redfish_log_debug("post url: %s" % url)
+        self.redfish_log_debug("Playload: %s" % playload)
+
+        playload_json = json.dumps(playload)
+        result = False
+        try:
+            cmd_post="curl --connect-timeout %d -m %d -X POST %s -d \'%s\'" % (self.connect_timeout, self.operation_timeout, self.get_full_url(url), playload_json)
+            ret_msg = self._exec_cmd(cmd_post)
+            if ret_msg == None:
+                return False
+            elif ret_msg["success"] == False:
+                self.redfish_log_error("Url: '%s', Playload: '%s', Bmc return failed, error_message: %s" % (url, playload_json, ret_msg["Message"]))
+                result = False
+            else:
+                result = True
+            return result
+        except Exception as e:
+            self.redfish_log_error("error_message: %s" % e)
+            return False
+
+    def get_thermal(self):
+        """Get thermal info
+        :returns: class 'redfish.rest.v1.RestResponse' or None when failed
+        """
+        return self._redfish_get(self.ThermalUrl)
+
+    def get_power(self):
+        """Get power info
+        :returns: class 'redfish.rest.v1.RestResponse' or None when failed
+        """
+        return self._redfish_get(self.PowerUrl)
+
+    def get_thresholdSensors(self):
+        """Get thresholdSensors info
+        :returns: class 'redfish.rest.v1.RestResponse' or None when failed
+        """
+        return self._redfish_get(self.ThresholdSensorsUrl)
+
+    def post_odata(self, odata_id, playload):
+        """post odata info
+        :params odata_id: the specified odata_id path
+        :type odata_id: string
+        :playload: info to post
+        :type: dictionary
+        :returns: True or False
+        """
+        if odata_id is None or playload is None:
+            print("post failed: odata_id or playload is None")
+            return False
+        return self._redfish_post(odata_id, playload)
+
+    def get_odata(self, odata_id):
+        """Get odata info
+        :params odata_id: the specified odata_id path
+        :type odata_id: string
+        :returns: class 'redfish.rest.v1.RestResponse' or None when failed
+        """
+        if odata_id is None:
+            print("Get odata_id failed: odata_id is None")
+            return None
+        return self._redfish_get(odata_id)
+
+    def post_fanSpeed(self, playload):
+        """post odata info
+        :playload: info to post
+        :type: dictionary
+        :returns: True or False
+        """
+        if playload is None:
+            print("post failed: playload is None")
+            return False
+        return self._redfish_post(self.FanSpeedUrl, playload)
+
+    def get_board(self, board_name="indicatorboard"):
+        """Get board info
+        :board_name: name of board, default is "indicatorboard"
+        :type: string
+        :returns: class'redfish.rest.v1.RestResponse' or None when failed
+        """
+        if board_name is None :
+            print("get failed: board_name is None")
+            return None
+        return self._redfish_get(self.BoardsUrl + board_name)
+
+    def post_boardLed(self, playload, board_name="indicatorboard"):
+        """post boardLed info
+        :board_name: name of board, default is "indicatorboard"
+        :type: string
+        :playload: info to post
+        :type: dictionary
+        :returns: True or False
+        """
+        if board_name is None or playload is None:
+            print("post failed: playload is None")
+            return False
+        return self._redfish_post(self.BoardLedUrl.format(board_name), playload)
+
+    '''  not supported currently
+    def post_thermal(self, playload):
+        """post thermal info
+        :playload: info to post
+        :type: dictionary
+        :returns: True or False
+        """
+        if playload is None:
+            print("post_thermal failed: playload is None")
+            return None
+        return self._redfish_post(self.ThermalUrl, playload)
+
+    def post_power(self, playload):
+        """post power info
+        :playload: info to post
+        :type: dictionary
+        :returns: True or False
+        """
+        if playload is None:
+            print("post_power failed: playload is None")
+            return None
+        return self._redfish_post(self.PowerUrl, playload)
+
+    def post_thresholdSensors(self, playload):
+        """post thresholdSensors info
+        :playload: info to post
+        :type: dictionary
+        :returns: True or False
+        """
+        if playload is None:
+            print("post_thresholdSensors failed: playload is None")
+            return None
+        return self._redfish_post(self.ThresholdSensorsUrl, playload)
+
+    def get_fanSpeed(self):
+        """Get board led info
+        :returns: class'redfish.rest.v1.RestResponse' or None when failed
+        """
+        return self._redfish_get(self.FanSpeedUrl)
+
+    def post_board(self, playload, board_name="indicatorboard"):
+        """post board info
+        :board_name: name of board, default is "indicatorboard"
+        :type: string
+        :playload: info to post
+        :type: dictionary
+        :returns: True or False
+        """
+        if board_name is None or playload is None:
+            print("post failed: playload is None")
+            return False
+        return self._redfish_post(self.BoardsUrl + board_name, playload)
+
+    def get_boardLed(self, board_name="indicatorboard"):
+        """Get boardLed info
+        :board_name: name of board, default is "indicatorboard"
+        :type: string
+        :returns: class'redfish.rest.v1.RestResponse' or None when failed
+        """
+        if board_name is None :
+            print("get failed: board_name is None")
+            return None
+        return self._redfish_get(self.BoardsUrl % board_name)
+
+    '''
+
+'''
+if __name__ == '__main__':
+    redfish = Redfish_Api()
+
+    ### get
+    # boards
+    ret = redfish.get_board()
+    if ret is None:
+        print("get failed: board")
+    else:
+        print("get succeeded, board:%s" % ret)
+
+    ret = redfish.get_thresholdSensors()
+    if ret is None:
+        print("get failed: threshold")
+    else:
+        print("get succeeded, threshold:%s" % ret)
+
+    ret = redfish.get_power()
+    if ret is None:
+        print("get failed: power")
+    else:
+        print("get succeeded, power:%s" % ret)
+
+    ret = redfish.get_thermal()
+    if ret is None:
+        print("get failed:thermal")
+    else:
+        print("get succeeded,thermal:%s" % ret)
+
+    # get playload
+    resp = redfish.get_thresholdSensors()
+    if (resp != None):
+        print(resp["@odata.id"])
+        print(resp["@odata.type"])
+        print(resp["Id"])
+        print(resp["Name"])
+    else:
+        print("Failed: get_thresholdSensors")
+
+    ### post
+    # fanSpeed
+    playload = {}
+    playload["FanName"] = 'Fan0'
+    playload["FanSpeedLevelPercents"] = "70"
+    print("post fanSpeed:%s" % redfish.post_fanSpeed(playload))
+
+    #{"LEDs": [{"IndicatorLEDColor": "green","LEDType": "sys"},{"IndicatorLEDColor": "off","LEDType": "pwr"},{"IndicatorLEDColor": "green","LEDType": "fan"}]}
+    playload = {}
+    led = {}
+    led1 = {}
+    led_list = []
+    led["IndicatorLEDColor"] = "green"
+    led["LEDType"] = "sys"
+    led1["IndicatorLEDColor"] = "off"
+    led1["LEDType"] = "pwr"
+    led_list.append(led)
+    led_list.append(led1)
+    playload["LEDs"] = led_list
+    # boardsLed
+    print("post boardLed:%s" % redfish.post_boardLed(playload))
+'''
diff --git a/platform/centec-arm64/sonic-platform-modules-micas/m2-w6010-48gt4x-ra/sonic_platform/sfp.py b/platform/centec-arm64/sonic-platform-modules-micas/m2-w6010-48gt4x-ra/sonic_platform/sfp.py
new file mode 100644
index 000000000..29dd0cb07
--- /dev/null
+++ b/platform/centec-arm64/sonic-platform-modules-micas/m2-w6010-48gt4x-ra/sonic_platform/sfp.py
@@ -0,0 +1,325 @@
+#!/usr/bin/python
+# -*- coding: UTF-8 -*-
+
+#############################################################################
+#
+# Module contains an implementation of SONiC Platform Base API and
+# provides the platform information
+#
+#
+# *_device.py config version instruction:
+#      ver 1.0 - platform api:
+#           "presence_cpld": {
+#               "dev_id": {
+#                   [dev_id]: {
+#                       "offset": {
+#                           [offset]: [port_id]
+#                       }
+#                    }
+#                 }
+#              }
+#           "reset_cpld": {
+#               "dev_id": {
+#                   [dev_id]: {
+#                       "offset": {
+#                           [offset]: [port_id]
+#                       }
+#                    }
+#                 }
+#           }
+#      ver 2.0 - wb_plat:
+#               "presence_path": "/xx/wb_plat/xx[port_id]/present"
+#               "eeprom_path": "/sys/bus/i2c/devices/i2c-[bus]/[bus]-0050/eeprom"
+#               "reset_path": "/xx/wb_plat/xx[port_id]/reset"
+#############################################################################
+import sys
+import time
+import os
+import syslog
+import traceback
+from abc import abstractmethod
+
+configfile_pre = "/usr/local/bin/"
+sys.path.append(configfile_pre)
+
+try:
+    from sonic_platform_base.sonic_xcvr.sfp_optoe_base import SfpOptoeBase
+
+except ImportError as error:
+    raise ImportError(str(error) + "- required module not found") from error
+
+LOG_DEBUG_LEVEL = 1
+LOG_WARNING_LEVEL = 2
+LOG_ERROR_LEVEL = 3
+
+
+class Sfp(SfpOptoeBase):
+
+    OPTOE_DRV_TYPE1 = 1
+    OPTOE_DRV_TYPE2 = 2
+    OPTOE_DRV_TYPE3 = 3
+
+    # index must start at 1
+    def __init__(self, index):
+        SfpOptoeBase.__init__(self)
+        self.sfp_type = None
+        self.log_level_config = LOG_WARNING_LEVEL
+        # Init instance of SfpCust
+        self._sfp_api = SfpV2(index)
+
+    def get_eeprom_path(self):
+        return self._sfp_api._get_eeprom_path()
+
+    def read_eeprom(self, offset, num_bytes):
+        return self._sfp_api.read_eeprom(offset, num_bytes)
+
+    def write_eeprom(self, offset, num_bytes, write_buffer):
+        return self._sfp_api.write_eeprom(offset, num_bytes, write_buffer)
+
+    def get_presence(self):
+        return self._sfp_api.get_presence()
+
+    def get_transceiver_info(self):
+        # temporary solution for a sonic202111 bug
+        transceiver_info = super().get_transceiver_info()
+        try:
+            if transceiver_info["vendor_rev"] is not None:
+                transceiver_info["hardware_rev"] = transceiver_info["vendor_rev"]
+        except BaseException:
+            print(traceback.format_exc())
+            return None
+        return transceiver_info
+
+    def set_optoe_write_max(self, write_max):
+        """
+        This func is declared and implemented by SONiC but we're not supported
+        so override it as NotImplemented
+        """
+        self._sfplog(LOG_DEBUG_LEVEL, "set_optoe_write_max NotImplemented")
+
+    def refresh_xcvr_api(self):
+        """
+        Updates the XcvrApi associated with this SFP
+        """
+        self._xcvr_api = self._xcvr_api_factory.create_xcvr_api()
+        class_name = self._xcvr_api.__class__.__name__
+        optoe_type = None
+        # set sfp_type
+        if 'CmisApi' in class_name:
+            self.sfp_type = 'QSFP-DD'
+            optoe_type = self.OPTOE_DRV_TYPE3
+        elif 'Sff8472Api' in class_name:
+            self.sfp_type = 'SFP'
+            optoe_type = self.OPTOE_DRV_TYPE2
+        elif ('Sff8636Api' in class_name or 'Sff8436Api' in class_name):
+            self.sfp_type = 'QSFP'
+            optoe_type = self.OPTOE_DRV_TYPE1
+        # set optoe driver
+        if optoe_type is not None:
+            self._sfp_api.set_optoe_type(optoe_type)
+
+    def _sfplog(self, log_level, msg):
+        if log_level >= self.log_level_config:
+            try:
+                syslog.openlog("Sfp")
+                if log_level == LOG_DEBUG_LEVEL:
+                    syslog.syslog(syslog.LOG_DEBUG, msg)
+                elif log_level == LOG_WARNING_LEVEL:
+                    syslog.syslog(syslog.LOG_DEBUG, msg)
+                elif log_level == LOG_ERROR_LEVEL:
+                    syslog.syslog(syslog.LOG_ERR, msg)
+                syslog.closelog()
+
+            except BaseException:
+                print(traceback.format_exc())
+
+
+class SfpCust():
+    def __init__(self, index):
+        self.eeprom_path = None
+        self._init_config(index)
+
+    def _init_config(self, index):
+        self.log_level_config = LOG_WARNING_LEVEL
+        self._port_id = index
+        self.eeprom_retry_times = 5
+        self.eeprom_retry_break_sec = 0.2
+
+    def _get_eeprom_path(self):
+        return self.eeprom_path or None
+
+    @abstractmethod
+    def get_presence(self):
+        pass
+
+    def read_eeprom(self, offset, num_bytes):
+        try:
+            for i in range(self.eeprom_retry_times):
+                with open(self._get_eeprom_path(), mode='rb', buffering=0) as f:
+                    f.seek(offset)
+                    result = f.read(num_bytes)
+                    # temporary solution for a sonic202111 bug
+                    if len(result) < num_bytes:
+                        result = result[::-1].zfill(num_bytes)[::-1]
+                    if result is not None:
+                        return bytearray(result)
+                    time.sleep(self.eeprom_retry_break_sec)
+                    continue
+
+        except BaseException:
+            self._sfplog(LOG_ERROR_LEVEL, traceback.format_exc())
+        return None
+
+    def write_eeprom(self, offset, num_bytes, write_buffer):
+        try:
+            for i in range(self.eeprom_retry_times):
+                ret = SfpOptoeBase.write_eeprom(self, offset, num_bytes, write_buffer)
+                if ret is False:
+                    time.sleep(self.eeprom_retry_break_sec)
+                    continue
+                break
+
+            return ret
+        except BaseException:
+            self._sfplog(LOG_ERROR_LEVEL, traceback.format_exc())
+            return False
+
+    @abstractmethod
+    def set_optoe_type(self, optoe_type):
+        pass
+
+    @abstractmethod
+    def set_reset(self, reset):
+        pass
+
+    def _convert_str_range_to_int_arr(self, range_str):
+        if not range_str:
+            return []
+
+        int_range_strs = range_str.split(',')
+        range_res = []
+        for int_range_str in int_range_strs:
+            if '-' in int_range_str:
+                range_s = int(int_range_str.split('-')[0])
+                range_e = int(int_range_str.split('-')[1]) + 1
+            else:
+                range_s = int(int_range_str)
+                range_e = int(int_range_str) + 1
+
+            range_res = range_res + list(range(range_s, range_e))
+
+        return range_res
+
+    def _sfplog(self, log_level, msg):
+        if log_level >= self.log_level_config:
+            try:
+                syslog.openlog("SfpCust")
+                if log_level == LOG_DEBUG_LEVEL:
+                    syslog.syslog(syslog.LOG_DEBUG, msg)
+                elif log_level == LOG_WARNING_LEVEL:
+                    syslog.syslog(syslog.LOG_DEBUG, msg)
+                elif log_level == LOG_ERROR_LEVEL:
+                    syslog.syslog(syslog.LOG_ERR, msg)
+                syslog.closelog()
+
+            except BaseException:
+                print(traceback.format_exc())
+
+
+class SfpV2(SfpCust):
+    def _init_config(self, index):
+        super()._init_config(index)
+        # init eeprom path
+        sfp_pt2ee_path_list = [0] * 53
+        sfp_pt2ee_path_list[49:53] = [9, 10, 11, 12]
+
+        eeprom_path_config = "/sys/bus/i2c/devices/i2c-%d/%d-0050/eeprom"
+        eeprom_path_key = sfp_pt2ee_path_list[self._port_id]
+        self.eeprom_path = None if eeprom_path_config is None or eeprom_path_key == 0 else eeprom_path_config % (
+            eeprom_path_key, eeprom_path_key)
+        self._sfplog(LOG_DEBUG_LEVEL, "Done init eeprom path: %s" % self.eeprom_path)
+
+        # init presence path
+        self.presence_path = "/sys/bus/i2c/devices/3-0030/sfp_presence1"
+        self.presence_val_is_present = 0
+        self._sfplog(LOG_DEBUG_LEVEL, "Done init presence path: %s" % self.presence_path)
+
+        # init optoe driver path
+        optoe_driver_path = "/sys/bus/i2c/devices/i2c-%d/%d-0050/dev_class"
+        optoe_driver_key = sfp_pt2ee_path_list[self._port_id]
+        self.dev_class_path = None if optoe_driver_path is None or optoe_driver_key == 0 else optoe_driver_path % (
+            optoe_driver_key, optoe_driver_key)
+        self._sfplog(LOG_DEBUG_LEVEL, "Done init optoe driver path: %s" % self.dev_class_path)
+
+        # init reset path
+        self.reset_val_is_reset = 0
+
+        new_device_path = "/sys/bus/i2c/devices/i2c-%d/new_device"
+        new_device_key = sfp_pt2ee_path_list[self._port_id]
+        self.new_class_path = None if new_device_path is None or new_device_key == 0 else new_device_path % new_device_key
+        self._sfplog(LOG_DEBUG_LEVEL, "Done init new_class path: %s" % self.new_class_path)
+
+        if sfp_pt2ee_path_list[self._port_id] != 0:
+            self.add_new_sfp_device(self._port_id, 0x50)
+            self._sfplog(LOG_DEBUG_LEVEL, "Done add_new_sfp_device 0x50 port %d" % self._port_id)
+
+    def sfp_add_dev(self, new_device_path, devaddr, devtype):
+        try:
+            # Write device address to new_device file
+            nd_file = open(new_device_path, "w")
+            nd_str = "%s %s" % (devtype, hex(devaddr))
+            nd_file.write(nd_str)
+            nd_file.close()
+        except Exception as err:
+            self._sfplog(LOG_ERROR_LEVEL, ("Error writing to new device file: %s" % str(err)))
+            return 1
+        else:
+            return 0
+
+    def add_new_sfp_device(self, port_num, devid):
+        if os.path.exists(self.dev_class_path):
+            return
+
+        ret = self.sfp_add_dev(self.new_class_path, devid, "optoe2")
+        if ret != 0:
+            self._sfplog(LOG_ERROR_LEVEL, "Error adding sfp device")
+
+    def get_presence(self):
+        sfp_ls = [49, 50, 51, 52]
+        if self._port_id not in sfp_ls or self.presence_path is None:
+            self._sfplog(LOG_ERROR_LEVEL, "presence_path is None!")
+            return False
+        try:
+            with open(self.presence_path, "rb") as data:
+                presence_data = data.read(2)
+                if presence_data == "":
+                    return False
+                result = int(presence_data, 16)
+
+            # ModPrsL is active low
+            presence_offset = sfp_ls.index(self._port_id)
+            if result & (1 << presence_offset) == 0:
+                return True
+            return False
+        except BaseException:
+            self._sfplog(LOG_ERROR_LEVEL, traceback.format_exc())
+            return False
+
+    def set_reset(self, reset):
+        return True
+
+    def set_optoe_type(self, optoe_type):
+        if self.dev_class_path is None:
+            self._sfplog(LOG_ERROR_LEVEL, "dev_class_path is None!")
+            return False
+        try:
+            with open(self.dev_class_path, "r+") as dc_file:
+                dc_file_val = dc_file.read(1)
+                if int(dc_file_val) != optoe_type:
+                    dc_str = "%s" % str(optoe_type)
+                    dc_file.write(dc_str)
+                    # dc_file.close()
+        except BaseException:
+            self._sfplog(LOG_ERROR_LEVEL, traceback.format_exc())
+            return False
+        return True
diff --git a/platform/centec-arm64/sonic-platform-modules-micas/m2-w6010-48gt4x-ra/sonic_platform/thermal.py b/platform/centec-arm64/sonic-platform-modules-micas/m2-w6010-48gt4x-ra/sonic_platform/thermal.py
new file mode 100644
index 000000000..5fded8d9d
--- /dev/null
+++ b/platform/centec-arm64/sonic-platform-modules-micas/m2-w6010-48gt4x-ra/sonic_platform/thermal.py
@@ -0,0 +1,172 @@
+#!/usr/bin/env python
+
+import os
+import re
+import os.path
+import time
+
+try:
+    from sonic_platform_base.thermal_base import ThermalBase
+    from .redfish_api import Redfish_Api
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+
+class Thermal(ThermalBase):
+    """Platform-specific Thermal class"""
+
+    def __init__(self, thermal_index):
+        ThermalBase.__init__(self)
+        self.index = thermal_index
+        self.high_threshold = float(112)
+        self.redfish = Redfish_Api()
+        self.pinf = {}
+        self.begin = time.time()
+
+    def get_power_3s(self):
+        self.elapsed = time.time()
+        if not self.pinf or self.elapsed - self.begin >= 3:
+            self.begin = time.time()
+            self.pinf = self.redfish.get_thermal()
+
+    def get_temperature(self):
+        self.get_power_3s()
+        ctrl = self.pinf["Temperatures"]
+        output = ctrl[self.index]
+        temp = output.get("ReadingCelsius")
+        return temp
+
+    def get_high_threshold(self):
+        self.get_power_3s()
+        ctrl = self.pinf["Temperatures"]
+        output = ctrl[self.index]
+        temp = output.get("UpperThresholdFatal")
+        return temp
+
+    def get_low_threshold(self):
+        self.get_power_3s()
+        ctrl = self.pinf["Temperatures"]
+        output = ctrl[self.index]
+        temp = output.get("LowerThresholdFatal")
+        return temp
+
+    def get_high_critical_threshold(self):
+        self.get_power_3s()
+        ctrl = self.pinf["Temperatures"]
+        output = ctrl[self.index]
+        temp = output.get("UpperThresholdFatal")
+        return temp
+
+    def get_low_critical_threshold(self):
+        self.get_power_3s()
+        ctrl = self.pinf["Temperatures"]
+        output = ctrl[self.index]
+        temp = output.get("LowerThresholdFatal")
+        return temp
+
+    def get_name(self):
+        self.get_power_3s()
+        ctrl = self.pinf["Temperatures"]
+        output = ctrl[self.index].get("Name")
+        name = output.split("/",3)[2]
+        if name == "SWITCH_TEMP":
+            name = "ASIC_TEMP"
+        return "{}".format(name)
+
+    def get_real_name(self):
+        self.get_power_3s()
+        ctrl = self.pinf["Temperatures"]
+        output = ctrl[self.index].get("Name")
+        name = output.split("/",3)[2]
+        return "{}".format(name)
+
+    def get_presence(self):
+        self.get_power_3s()
+        ctrl = self.pinf["Temperatures"]
+        output = ctrl[self.index]
+        if output.get("Status").get("Status").get("State") == "Enabled":
+            return True
+        return False
+
+    def get_status(self):
+        self.get_power_3s()
+        ctrl = self.pinf["Temperatures"]
+        output = ctrl[self.index]
+        if output.get("Status").get("Status").get("Health") == "OK":
+            return True
+        return False
+
+    def set_sys_led(self, color):
+        playload = {}
+        led = {}
+        led_list = []
+        led["IndicatorLEDColor"] = color
+        led["LEDType"] = "sys"
+        led_list.append(led)
+        playload["LEDs"] = led_list
+        # boardsLed
+        return self.redfish.post_boardLed(playload)
+
+    def get_minimum_recorded(self):
+        """
+        Retrieves the minimum recorded temperature of thermal
+
+        Returns:
+            A float number, the minimum recorded temperature of thermal in Celsius
+            up to nearest thousandth of one degree Celsius, e.g. 30.125
+        """
+        return "N/A"
+
+    def get_maximum_recorded(self):
+        """
+        Retrieves the maximum recorded temperature of thermal
+
+        Returns:
+            A float number, the maximum recorded temperature of thermal in Celsius
+            up to nearest thousandth of one degree Celsius, e.g. 30.125
+        """
+        return "N/A"
+
+    def get_model(self):
+        """
+        Retrieves the model number (or part number) of the Thermal
+
+        Returns:
+            string: Model/part number of Thermal
+        """
+        return "N/A"
+
+    def get_serial(self):
+        """
+        Retrieves the serial number of the Thermal
+
+        Returns:
+            string: Serial number of Thermal
+        """
+        return "N/A"
+
+    def get_revision(self):
+        """
+        Retrieves the hardware revision of the device
+
+        Returns:
+            string: Revision value of device
+        """
+        return "N/A"
+
+    def get_position_in_parent(self):
+        """
+        Retrieves 1-based relative physical position in parent device. If the agent cannot determine the parent-relative position
+        for some reason, or if the associated value of entPhysicalContainedIn is '0', then the value '-1' is returned
+        Returns:
+            integer: The 1-based relative physical position in parent device or -1 if cannot determine the position
+        """
+        return -1
+
+    def is_replaceable(self):
+        """
+        Indicate whether this device is replaceable.
+        Returns:
+            bool: True if it is replaceable.
+        """
+        return False
diff --git a/platform/centec-arm64/sonic_fit.its b/platform/centec-arm64/sonic_fit.its
index 9d1cd37e1..d7158e242 100644
--- a/platform/centec-arm64/sonic_fit.its
+++ b/platform/centec-arm64/sonic_fit.its
@@ -48,6 +48,18 @@
 				algo = "crc32";			
 			};
 		};
+                ctc_fdtw6010 {
+                        description = "dtb for m2-w6010-48gt4x-r0";
+                        data = /incbin/("./m2-w6010-48gt4x-r0.dtb");
+                        type = "flat_dt";
+                        arch = "arm64";
+                        os = "linux";
+                        compression = "none";
+                        load = <0x88000000>;
+                        hash {
+                                algo = "crc32";
+                        };
+                };
 	};
 	configurations {
 		default = "arm64-centec_e530_24x2c-r0";
@@ -86,5 +98,17 @@
 			ramdisk = "initramfs";
 			fdt = "ctc_fdt";
 			};
+                arm64-micas_m2-w6010-48gt4x-fa-r0 {
+                        description = "config for micas_m2-w6010-48gt4x-fa";
+                        kernel = "kernel_ctc";
+                        ramdisk = "initramfs";
+                        fdt = "ctc_fdtw6010";
+                        };
+                arm64-micas_m2-w6010-48gt4x-ra-r0 {
+                        description = "config for micas_m2-w6010-48gt4x-ra";
+                        kernel = "kernel_ctc";
+                        ramdisk = "initramfs";
+                        fdt = "ctc_fdtw6010";
+                        };
 	};
 };
diff --git a/platform/centec-arm64/tsingma-bsp/debian/rules b/platform/centec-arm64/tsingma-bsp/debian/rules
index 39744906e..65e564fce 100755
--- a/platform/centec-arm64/tsingma-bsp/debian/rules
+++ b/platform/centec-arm64/tsingma-bsp/debian/rules
@@ -17,6 +17,7 @@ KERNEL_SRC :=  /lib/modules/$(KVERSION)
 MOD_SRC_DIR:= $(shell pwd)
 MODULE_DIRS:= ctc5236-mc ctc5236_switch ctcmac ctc_wdt ehci-ctc gpio-ctc i2c-ctc pinctrl-ctc pwm-ctc rtc-sd2405 sdhci-ctc5236 spi-ctc-qspi ctc-phy
 DTS_DIR := ctc-dts
+DTS_DIR0 := m2-w6010-48gt4x
 MODULE_DIR := src
 UTILS_DIR := utils
 SERVICE_DIR := service
@@ -36,6 +37,7 @@ build:
 		make modules -C $(KERNEL_SRC)/build M=$(MOD_SRC_DIR)/$(MODULE_DIR)/$${mod}; \
 	done)
 	make -C $(MOD_SRC_DIR)/$(MODULE_DIR)/$(DTS_DIR)
+	make -C $(MOD_SRC_DIR)/$(MODULE_DIR)/$(DTS_DIR0)
 
 binary: binary-arch binary-indep
 	# Nothing to do
diff --git a/platform/centec-arm64/tsingma-bsp/debian/tsingma-bsp.install b/platform/centec-arm64/tsingma-bsp/debian/tsingma-bsp.install
index 01444d149..30757f33e 100644
--- a/platform/centec-arm64/tsingma-bsp/debian/tsingma-bsp.install
+++ b/platform/centec-arm64/tsingma-bsp/debian/tsingma-bsp.install
@@ -13,5 +13,6 @@ src/rtc-sd2405/rtc-sd2405.ko /lib/modules/6.1.0-11-2-arm64/kernel/extra
 src/sdhci-ctc5236/sdhci-ctc5236.ko /lib/modules/6.1.0-11-2-arm64/kernel/extra
 src/spi-ctc-qspi/spi-ctc-qspi.ko /lib/modules/6.1.0-11-2-arm64/kernel/extra
 src/ctc-dts/e530-ctc5236.dtb /boot/
+src/m2-w6010-48gt4x/m2-w6010-48gt4x-r0.dtb /boot/
 src/config/fw_env.config /etc/
 src/config/tsingma-bsp.service /lib/systemd/system
diff --git a/platform/centec-arm64/tsingma-bsp/src/m2-w6010-48gt4x/Makefile b/platform/centec-arm64/tsingma-bsp/src/m2-w6010-48gt4x/Makefile
new file mode 100755
index 000000000..5837924e3
--- /dev/null
+++ b/platform/centec-arm64/tsingma-bsp/src/m2-w6010-48gt4x/Makefile
@@ -0,0 +1,5 @@
+m2-w6010-48gt4x-r0.dtb: m2-w6010-48gt4x-r0.dts ctc5236.dtsi ctc5236-clock.dtsi
+	cpp -nostdinc -I. -undef -x assembler-with-cpp m2-w6010-48gt4x-r0.dts > tmp.dts
+	dtc -O dtb -o m2-w6010-48gt4x-r0.dtb tmp.dts
+	rm tmp.dts -rf
+	
diff --git a/platform/centec-arm64/tsingma-bsp/src/m2-w6010-48gt4x/arm-gic.h b/platform/centec-arm64/tsingma-bsp/src/m2-w6010-48gt4x/arm-gic.h
new file mode 100755
index 000000000..ef79498bd
--- /dev/null
+++ b/platform/centec-arm64/tsingma-bsp/src/m2-w6010-48gt4x/arm-gic.h
@@ -0,0 +1,23 @@
+/* SPDX-License-Identifier: GPL-2.0 OR MIT */
+/*
+ * This header provides constants for the ARM GIC.
+ */
+
+#ifndef _DT_BINDINGS_INTERRUPT_CONTROLLER_ARM_GIC_H
+#define _DT_BINDINGS_INTERRUPT_CONTROLLER_ARM_GIC_H
+
+#include "irq.h"
+
+/* interrupt specifier cell 0 */
+
+#define GIC_SPI 0
+#define GIC_PPI 1
+
+/*
+ * Interrupt specifier cell 2.
+ * The flags in irq.h are valid, plus those below.
+ */
+#define GIC_CPU_MASK_RAW(x) ((x) << 8)
+#define GIC_CPU_MASK_SIMPLE(num) GIC_CPU_MASK_RAW((1 << (num)) - 1)
+
+#endif
diff --git a/platform/centec-arm64/tsingma-bsp/src/m2-w6010-48gt4x/ctc5236-clks.h b/platform/centec-arm64/tsingma-bsp/src/m2-w6010-48gt4x/ctc5236-clks.h
new file mode 100755
index 000000000..56d91da31
--- /dev/null
+++ b/platform/centec-arm64/tsingma-bsp/src/m2-w6010-48gt4x/ctc5236-clks.h
@@ -0,0 +1,25 @@
+/*
+ * ctc5236 clock tree IDs
+ *
+ * (C) Copyright 2004-2017 Centec Networks (suzhou) Co., LTD.
+ *
+ * Jay Cao <caoj@centecnetworks.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __CTC5236_CLKS_H
+#define __CTC5236_CLKs_H
+
+#define CLKID_UNUSED		0
+#define CLKID_PLL_FIXED		1
+#define CLKID_UART0		2
+
+#endif /* __CTC5236_CLKS_H */
diff --git a/platform/centec-arm64/tsingma-bsp/src/m2-w6010-48gt4x/ctc5236-clock.dtsi b/platform/centec-arm64/tsingma-bsp/src/m2-w6010-48gt4x/ctc5236-clock.dtsi
new file mode 100755
index 000000000..ae6b00c00
--- /dev/null
+++ b/platform/centec-arm64/tsingma-bsp/src/m2-w6010-48gt4x/ctc5236-clock.dtsi
@@ -0,0 +1,63 @@
+/*
+ * dts file for Centec CTC5236(TsingMa) SoC
+ *
+ * (C) Copyright 2004-2017 Centec Networks (suzhou) Co., LTD.
+ *
+ * Jay Cao <caoj@centecnetworks.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ */
+
+	osc: oscillator {
+		#clock-cells = <0>;
+		compatible = "fixed-clock";
+		clock-frequency = <50000000>;
+        };
+
+	sup_clk: sup_clk_12m {
+		#clock-cells = <0>;
+		compatible = "fixed-clock";
+		clock-frequency = <1200000000>;
+		clock-output-names = "sup_clk";
+        };
+
+	uart_clk: uart_clk_20m {
+		#clock-cells = <0>;
+		compatible = "fixed-clock";
+		clock-frequency = <20000000>;
+		clock-output-names = "uart_clk";
+        };
+
+	i2c_clk: clkm {
+		#clock-cells = <0>;
+		compatible = "fixed-clock";
+		clock-frequency = <50000000>;
+		clock-output-names = "i2c_clk";
+        };
+	wdog_clk:wdog_clk{
+		#clock-cells = <0>;
+		compatible = "fixed-clock";
+		clock-frequency = <1000000>;
+		clock-output-names = "wdog_clk";
+	};	
+	timer_clk:timer_clk{
+		#clock-cells = <0>;
+		compatible = "fixed-clock";
+		clock-frequency = <500000000>;
+		clock-output-names = "timer_clk";
+	};
+	mmc_clk:mmc_clk{
+		#clock-cells = <0>;
+		compatible = "fixed-clock";
+		clock-frequency = <100000000>;
+		clock-output-names = "mmc_clk";
+	};
+	spi_clk:spi_clk{
+		#clock-cells = <0>;
+		compatible = "fixed-clock";
+		clock-frequency = <100000000>;
+		clock-output-names = "spi_clk";
+	};
diff --git a/platform/centec-arm64/tsingma-bsp/src/m2-w6010-48gt4x/ctc5236.dtsi b/platform/centec-arm64/tsingma-bsp/src/m2-w6010-48gt4x/ctc5236.dtsi
new file mode 100755
index 000000000..bacf2eb17
--- /dev/null
+++ b/platform/centec-arm64/tsingma-bsp/src/m2-w6010-48gt4x/ctc5236.dtsi
@@ -0,0 +1,428 @@
+/*
+ * dts file for Centec CTC5236(TsingMa) SoC
+ *
+ * (C) Copyright 2004-2017 Centec Networks (suzhou) Co., LTD.
+ *
+ * Jay Cao <caoj@centecnetworks.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ */
+
+#include "arm-gic.h"
+#include "ctc5236-clks.h"
+#include "../pinctrl-ctc/pinctrl-ctc.h"
+
+/ {
+	compatible = "centec,ctc5236";
+	#address-cells = <2>;
+	#size-cells = <2>;
+	interrupt-parent = <&gic>;
+
+	cpus {
+		#address-cells = <2>;
+		#size-cells = <0>;
+
+		cpu-map {
+			cluster0 {
+				core0 {
+					cpu = <&cpu0>;
+				};
+				core1 {
+					cpu = <&cpu1>;
+				};
+			};
+		};
+
+		cpu0: cpu@0 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a53", "arm,armv8";
+			reg = <0 0x000>;
+			enable-method = "spin-table";
+			cpu-release-addr = <0 0x0010fff0>;
+		};
+
+		cpu1: cpu@1 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a53", "arm,armv8";
+			reg = <0 0x001>;
+			enable-method = "spin-table";
+			cpu-release-addr = <0 0x0010fff0>;
+		};
+	};
+	
+	gic: interrupt-controller@31201000 {
+			compatible = "arm,gic-400";
+			#interrupt-cells = <3>;
+			interrupt-controller;
+			reg = <0x0 0x31201000 0 0x1000>,
+		  	      <0x0 0x31202000 0 0x2000>,
+			      <0x0 0x31204000 0 0x2000>,
+			      <0x0 0x31206000 0 0x2000>;
+			interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
+                };
+
+	timer {
+		compatible = "arm,armv8-timer";
+		interrupt-parent = <&gic>;
+		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
+			     <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
+			     <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
+			     <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
+	};
+
+	soc: soc {
+		compatible = "simple-bus";
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+		
+		#include "ctc5236-clock.dtsi"
+		ocram: sram@00100000 {
+			compatible = "mmio-sram";
+			reg = <0x0 0x00100000 0x0 0x10000>;
+		};
+
+                memory-controller@30600000 {
+                        compatible = "ctc,ctc5236-ddr-ctrl";
+                        reg = <0x0 0x30600000 0x0 0x100000>;
+                        interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 100 IRQ_TYPE_EDGE_RISING>,
+				<GIC_SPI 101 IRQ_TYPE_EDGE_RISING>,
+				<GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
+			ctc,sysctrl = <&sysctrl>;
+                };
+
+		sysctrl: sysctrl@33200000 {
+			compatible = "ctc,ctc5236-sysctrl", "syscon";
+			reg = <0x0 0x33200000 0x0 0x100000>;
+			little-endian;
+		};
+		
+		serial0: serial@33000000 {
+                        compatible = "arm,pl011","arm,primecell";
+                        reg = <0x0 0x33000000 0x0 0x1000>;
+                        interrupts = <GIC_SPI 25 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
+                        clocks = <&uart_clk>, <&sup_clk>;
+                        clock-names = "uart_clk", "apb_pclk";
+                        status="disabled";
+                };
+		serial1: serial@33001000 {
+                        compatible = "arm,pl011","arm,primecell";
+                        reg = <0x0 0x33001000 0x0 0x1000>;
+                        interrupts = <GIC_SPI 26 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
+                        clocks = <&uart_clk>, <&sup_clk>;
+                        clock-names = "uart_clk", "apb_pclk";
+                        status="disabled";
+                };
+		serial2: serial@33002000 {
+                        compatible = "arm,pl011","arm,primecell";
+                        reg = <0x0 0x33002000 0x0 0x1000>;
+                        interrupts = <GIC_SPI 27 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
+                        clocks = <&uart_clk>, <&sup_clk>;
+                        clock-names = "uart_clk", "apb_pclk";
+                        status="disabled";
+                };				
+		mdio: mdio@33620000 {
+			compatible = "ctc,mdio";
+			reg = <0x0 0x33620000 0x0 0x10000>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+		
+		enet0: ethernet@33410000 {
+			compatible = "ctc,mac";
+			device_type = "network";
+			#address-cells = <2>;
+			#size-cells = <2>;
+			interrupt-parent = <&gic>;
+			status = "disabled";
+			local-mac-address = [00 00 00 00 00 00];
+			index = <0x00>;
+			reg = <0x0 0x33410000 0x0 0x10000>,
+				<0x0 0x33400000 0x0 0x10000>;
+			interrupts = <GIC_SPI 40 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>,
+				<GIC_SPI 41 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>,
+				<GIC_SPI 44 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>,
+				<GIC_SPI 136 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>,
+				<GIC_SPI 102 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
+			ctc,sysctrl = <&sysctrl>;
+		};
+
+		enet1: ethernet@33420000 {
+			compatible = "ctc,mac";
+			device_type = "network";
+			#address-cells = <2>;
+			#size-cells = <2>;
+			interrupt-parent = <&gic>;
+			status = "disabled";
+			local-mac-address = [00 00 00 00 00 00];
+			index = <0x01>;
+			reg = <0x0 0x33420000 0x0 0x10000>,
+				<0x0 0x33400000 0x0 0x10000>;
+			interrupts = <GIC_SPI 42 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>,
+				<GIC_SPI 43 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>,
+				<GIC_SPI 44 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>,
+				<GIC_SPI 137 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>,
+				<GIC_SPI 103 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
+			ctc,sysctrl = <&sysctrl>;
+		};
+		
+		ehci0: usb@30500000 {
+			compatible = "ctc-ehci";
+			reg = <0x0 0x30500000 0x0 0x1000>;
+			interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
+			ctc,sysctrl = <&sysctrl>;
+			status = "disabled";
+		};
+		
+		ohci0: usb@30580000 {
+			compatible = "generic-ohci";
+			reg = <0x0 0x30580000 0x0 0x1000>;
+			interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
+			status = "disabled";
+		};
+		
+		spi: spi@33100000 {
+			compatible = "arm,pl022","arm,primecell";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x0 0x33100000 0x0 0x100000>;
+			clocks = <&spi_clk>, <&sup_clk>;
+			clock-names = "spi_clk", "apb_pclk";    
+			num-cs = <4>;   
+			interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
+			ctc,sysctrl = <&sysctrl>;
+			status ="disabled";
+		};
+		
+		qspi: qspi@10000000 {
+			compatible = "ctc, igdaxi001a-qspi";
+			#address-cells = <1>;	
+			#size-cells = <0>;
+			reg = <0x0 0x10000000 0x0 0x10000>; 
+			pclk = <500000000>;
+			num-cs = <2>;
+			idle-cycle = <2>;
+			post-cycle = <1>;
+			pre-cycle = <2>;
+			interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
+			status = "disabled";
+		};
+		switch: switch@31100000 {                      
+			compatible = "centec,dal-localbus";    
+			reg = <0x0 0x31100000 0x0 0x1000>,
+				 <0x0 0x33290000 0x0 0x10000>; 
+			interrupts = <GIC_SPI 128 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>,
+				<GIC_SPI 129 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>,
+				<GIC_SPI 130 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>,
+				<GIC_SPI 131 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>,
+				<GIC_SPI 132 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>,
+				<GIC_SPI 133 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>,
+				<GIC_SPI 134 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>,
+				<GIC_SPI 135 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
+			status ="disabled";                     
+		};  
+		switch1: switch1@31101000 {                      
+			compatible = "centec,switch";    
+			reg = <0x0 0x31101000 0x0 0x1000>; 
+			status ="disabled";                     
+		}; 
+		
+		i2c0: i2c0@33700000{
+			compatible = "ctc,i2c";
+			#address-cells = <1>;	
+			#size-cells = <0>;
+			reg = <0x0 0x33700000 0x0 0x1000>;
+			interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&i2c_clk>;
+			ctc,sysctrl = <&sysctrl>;
+			i2c-num = <0>;
+			status ="disabled";
+		};		
+		
+		i2c1: i2c1@33701000{
+			compatible = "ctc,i2c";
+			#address-cells = <1>;	
+			#size-cells = <0>;
+			reg = <0x0 0x33701000 0x0 0x1000>;
+			interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&i2c_clk>;
+			ctc,sysctrl = <&sysctrl>;
+			i2c-num = <1>;
+			status ="disabled";
+		};
+		
+		pcie: pcie@20000000 {
+			compatible = "centec,ctc5236-pcie";
+			reg =   <0x0 0x20000000 0x0 0x10000000
+				0x0 0x30000000 0x0 0x1000>;
+			reg-names = "cfg", "ctrl";
+			#address-cells = <3>;
+			#size-cells = <2>;
+			#interrupt-cells = <1>;
+			device_type = "pci";
+			interrupt-parent = <&gic>;
+			interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "msi","aer","pme";
+			msi-parent = <&pcie>;
+			bus-range = <0 0xff>;
+			ranges = <0x42000000 0 0x00000000 0  0x40000000 0 0x20000000
+                               0x02000000 0 0x20000000 0  0x60000000 0 0x20000000>;
+			num-lanes = <1>;
+			ctc,sysctrl = <&sysctrl>;
+			status ="disabled"; 
+		};
+
+		wtd0: wtd0@33500000{
+			compatible = "arm,sp805-wdt", "arm,primecell";
+			#address-cells = <1>;	
+			#size-cells = <0>;
+			reg = <0x0 0x33500000 0x0 0x1000>;
+			clocks = <&wdog_clk>, <&sup_clk>;
+			clock-names = "wdog_clk", "apb_pclk"; 
+			ctc,sysctrl = <&sysctrl>;
+			interrupts = <GIC_SPI 38 IRQ_TYPE_EDGE_RISING>;
+			status="disabled";
+		};
+		wtd1: wtd1@33501000{
+			compatible = "arm,sp805-wdt", "arm,primecell";
+			#address-cells = <1>;	
+			#size-cells = <0>;
+			reg = <0x0 0x33501000 0x0 0x1000>;
+			clocks = <&wdog_clk>, <&sup_clk>;
+			clock-names = "wdog_clk", "apb_pclk"; 
+			ctc,sysctrl = <&sysctrl>;
+			interrupts = <GIC_SPI 39 IRQ_TYPE_EDGE_RISING>;
+			status="disabled";
+		};
+
+		sdhci: sdhci@30400000 {
+			compatible = "centec,ctc5236-sdhci";
+			status = "disabled";
+			interrupt-parent = <&gic>;
+			interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&mmc_clk>;
+			clock-names = "mmc_clk";
+			ctc,sysctrl = <&sysctrl>;
+			reg = <0x0 0x30400000 0x0 0x1000>;
+                };	
+				
+		timer0: timer0@33600000{
+			compatible = "snps,dw-apb-timer";
+			reg = <0x0 0x33600000 0x0 0x20>;
+			clocks = <&timer_clk>;
+			clock-names = "timer";
+			interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
+			DivNum = <0x3c>;
+			status="disabled";
+		};		
+		timer1: timer1@33600020{
+			compatible = "snps,dw-apb-timer";
+			reg = <0x0 0x33600020 0x0 0x20>;
+			clocks = <&timer_clk>;
+			clock-names = "timer";
+			interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
+			DivNum = <0x3c>;
+			status="disabled";
+		};
+		
+		pwm: pwm@33200240{
+			compatible = "centec-pwm";
+			ctc,sysctrl = <&sysctrl>;
+			#pwm-cells = <2>;	
+			
+			status="disabled";
+		};
+
+		fan: fan-ctc5236 {
+		    compatible = "fan-ctc5236";
+		    pwms = <&pwm 0 1000000>,
+		           <&pwm 1 1000000>,
+		           <&pwm 2 1000000>,
+		           <&pwm 3 1000000>;
+		    pwm-names = "pwm1","pwm2","pwm3","pwm4";
+		};
+		
+		gpio0: gpio@33610000 {
+			compatible = "ctc,apb-gpio";
+			reg = <0x0 0x33610000 0x0 0x10000>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			ctc,sysctrl = <&sysctrl>;
+			
+			porta: gpio-port@0 {
+                		compatible = "ctc,apb-gpio-porta";
+                		gpio-controller;
+                		#gpio-cells = <2>;
+                		ctc,nr-gpios = <16>;
+                		reg = <0>;
+                		interrupt-controller;
+                		#interrupt-cells = <2>;
+                		interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
+			};
+			portb: gpio-port@1 {
+                		compatible = "ctc,apb-gpio-portb";
+               			gpio-controller;
+                		#gpio-cells = <2>;
+                		ctc,nr-gpios = <18>;
+                		reg = <1>;
+                		interrupt-controller;
+                		#interrupt-cells = <2>;
+                		interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>;
+			};
+		};
+		
+		pinctrl: pinctrl {
+			compatible = "ctc,ctc5236-pinctrl";
+			#address-cells = <0x2>;
+			#size-cells = <0x2>;
+			ctc,pinctrl-bank0 = <16>;
+			ctc,pinctrl-bank1 = <8>;
+			ctc,sysctrl = <&sysctrl>;
+			
+			spi {
+				spi_pin: spi_pin {
+					ctc,pins = <0 0 PIN_FUNC_SPI>,
+  					           <0 2 PIN_FUNC_SPI>,
+  					           <0 3 PIN_FUNC_SPI>,
+  					           <0 4 PIN_FUNC_SPI>,
+  					           <0 5 PIN_FUNC_SPI>,
+  					           <0 6 PIN_FUNC_SPI>,
+  					           <0 7 PIN_FUNC_SPI>;
+				};
+			};
+
+			uart2 {
+				uart2_pin: uart2_pin {
+					ctc,pins = <0 10 PIN_FUNC_UART>,
+  				     	       <0 11 PIN_FUNC_UART>,
+  				        	   <0 12 PIN_FUNC_UART>,
+ 				               <0 13 PIN_FUNC_UART>,
+ 				           	   <0 14 PIN_FUNC_UART>,
+						       <0 15 PIN_FUNC_UART>;
+				};
+			};	
+	
+			fc {
+				fc_pin: fc_pin {
+					ctc,pins = <1 0 PIN_FUNC_FC>,
+  				    	       <1 1 PIN_FUNC_FC>,
+  				        	   <1 2 PIN_FUNC_FC>,
+  				         	   <1 3 PIN_FUNC_FC>,
+							   <1 4 PIN_FUNC_FC>,
+							   <1 5 PIN_FUNC_FC>,
+							   <1 6 PIN_FUNC_FC>,
+							   <1 7 PIN_FUNC_FC>;
+				};
+			};
+		};
+	};
+   
+};
+  
diff --git a/platform/centec-arm64/tsingma-bsp/src/m2-w6010-48gt4x/irq.h b/platform/centec-arm64/tsingma-bsp/src/m2-w6010-48gt4x/irq.h
new file mode 100755
index 000000000..9e3d183e1
--- /dev/null
+++ b/platform/centec-arm64/tsingma-bsp/src/m2-w6010-48gt4x/irq.h
@@ -0,0 +1,20 @@
+/* SPDX-License-Identifier: GPL-2.0 OR MIT */
+/*
+ * This header provides constants for most IRQ bindings.
+ *
+ * Most IRQ bindings include a flags cell as part of the IRQ specifier.
+ * In most cases, the format of the flags cell uses the standard values
+ * defined in this header.
+ */
+
+#ifndef _DT_BINDINGS_INTERRUPT_CONTROLLER_IRQ_H
+#define _DT_BINDINGS_INTERRUPT_CONTROLLER_IRQ_H
+
+#define IRQ_TYPE_NONE		0
+#define IRQ_TYPE_EDGE_RISING	1
+#define IRQ_TYPE_EDGE_FALLING	2
+#define IRQ_TYPE_EDGE_BOTH	(IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING)
+#define IRQ_TYPE_LEVEL_HIGH	4
+#define IRQ_TYPE_LEVEL_LOW	8
+
+#endif
diff --git a/platform/centec-arm64/tsingma-bsp/src/m2-w6010-48gt4x/m2-w6010-48gt4x-r0.dts b/platform/centec-arm64/tsingma-bsp/src/m2-w6010-48gt4x/m2-w6010-48gt4x-r0.dts
new file mode 100755
index 000000000..acc4b2627
--- /dev/null
+++ b/platform/centec-arm64/tsingma-bsp/src/m2-w6010-48gt4x/m2-w6010-48gt4x-r0.dts
@@ -0,0 +1,331 @@
+/*
+ * dts file for Centec CTC5236(TsingMa) SoC E530-24X2C Board
+ *
+ * (C) Copyright 2004-2018 Centec Networks (suzhou) Co., LTD.
+ *
+ * liuht <liuht@centecnetworks.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ */
+
+/dts-v1/;
+#include "ctc5236.dtsi"
+
+/ {
+	model = " CTC5236(TsingMa) E530 Board";
+	compatible = "ctc5236,e530-ctc5236";
+
+	memory@0 {
+		device_type = "memory";
+		reg = <0 0x80000000 0x1 0x00000000>;
+	};
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+
+	aliases {
+		serial0 = &serial0;
+		serial1 = &serial1;
+		ethernet0 = &enet0;
+		ethernet1 = &enet1;
+
+		i2c0 = &i2c1;
+		/* 0 0x70 */
+		i2c1 = &imux1;
+		i2c2 = &imux2;
+		i2c3 = &imux3;
+		i2c4 = &imux4;
+		i2c5 = &imux5;
+		i2c6 = &imux6;
+		i2c7 = &imux7;
+		i2c8 = &imux8;
+		/* 8 0x74 */
+		i2c9 = &imux9;
+		i2c10 = &imux10;
+		i2c11 = &imux11;
+		i2c12 = &imux12;
+		i2c13 = &imux13;
+		i2c14 = &imux14;
+		i2c15 = &imux15;
+		i2c16 = &imux16;
+	};
+
+};
+
+&serial0 {
+	status = "okay";
+};
+
+&serial1 {
+	status = "okay";
+};
+
+&mdio {
+	status = "okay";
+	phy0: ethernet-phy@0 {
+		index = <0x00>;
+		reg = <0x00>;
+	};
+};
+
+&enet0 {
+	status = "okay";
+	auto-nego-mode= "sgmii-mac";
+        fixed-link {
+                speed = <1000>;
+                full-duplex;
+        };
+};
+
+&qspi {
+	status = "okay";
+		
+	qspiflash0: mx25u3235f@0 {
+		compatible = "jedec,spi-nor";
+		reg = <0x0>;
+		spi-cpha; 
+		spi-cpol;
+		spi-max-frequency = <25000000>;
+		
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				label = "u-boot";
+				reg = <0x0 0x300000>;
+			};
+			partition@300000 {
+				label = "uboot-env";
+				reg = <0x300000 0x10000>;
+			};
+			partition@310000 {
+				label = "onie";
+				reg = <0x310000 0x1cf0000>;
+			};
+		};
+	};
+
+	qspiflash1: mx25u3235f@1 {
+		compatible = "jedec,spi-nor";
+		reg = <0x1>;
+		spi-cpha; 
+		spi-cpol;
+		spi-max-frequency = <25000000>;
+		
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				label = "u-boot1";
+				reg = <0x0 0x300000>;
+			};
+			partition@300000 {
+				label = "uboot1-env";
+				reg = <0x300000 0x10000>;
+			};
+			partition@310000 {
+				label = "onie1";
+				reg = <0x310000 0x1cf0000>;
+			};
+		};
+	};
+};
+
+&spi {
+	status = "disabled";
+	pinctrl-names = "default";
+	pinctrl-0 = <&spi_pin>;
+
+	clock0: ad9559@1 {
+		compatible = "analog,ad9559";
+		reg = <1>;
+		spi-max-frequency = <25000000>;
+	};
+};
+
+&switch {
+	status = "okay";
+};
+
+&switch1 {
+	status = "okay";
+};
+
+
+&i2c1{
+	status = "okay";
+	clock-frequency = <95000>;
+
+	pca9548@70 {
+		compatible = "nxp,pca9548";
+		reg = <0x70>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		imux1:i2c@0 { 
+			reg = <0>; 
+		};
+		imux2:i2c@1 { 
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <1>; 
+		};
+		imux3:i2c@2 { 
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <2>; 
+		};
+		imux4:i2c@3 { 
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <3>; 
+		};
+		imux5:i2c@4 { 
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <4>; 
+		};
+		imux6:i2c@5 { 
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <5>; 
+		};
+		imux7:i2c@6 { 
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <6>; 
+		};
+		imux8:i2c@7 { 
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <7>; 
+			pca9548@74 {
+				#address-cells = <1>;
+				#size-cells = <0>;
+				compatible = "nxp,pca9548";
+				reg = <0x74>;
+				imux9:i2c@0 { 
+					#address-cells = <1>;
+					#size-cells = <0>;
+					reg = <0>; 
+				};
+				imux10:i2c@1 { 
+					#address-cells = <1>;
+					#size-cells = <0>;
+					reg = <1>; 
+				};
+				imux11:i2c@2 { 
+					#address-cells = <1>;
+					#size-cells = <0>;
+					reg = <2>; 
+				};
+				imux12:i2c@3 { 
+					#address-cells = <1>;
+					#size-cells = <0>;
+					reg = <3>; 
+				};
+				imux13:i2c@4 { 
+					#address-cells = <1>;
+					#size-cells = <0>;
+					reg = <4>; 
+				};
+				imux14:i2c@5 { 
+					#address-cells = <1>;
+					#size-cells = <0>;
+					reg = <5>; 
+				};
+				imux15:i2c@6 { 
+					#address-cells = <1>;
+					#size-cells = <0>;
+					reg = <6>; 
+				};
+				imux16:i2c@7 { 
+					#address-cells = <1>;
+					#size-cells = <0>;
+					reg = <7>; 
+				};
+			};
+		};
+	};
+};
+
+&ehci0 {
+	status = "okay";
+};
+
+&ohci0 {
+	status = "okay";
+};
+
+&wtd0{
+	status = "okay";
+};
+
+&wtd1{
+	status = "disabled";
+};
+
+&sdhci {
+	bus-width = <8>;
+	max-frequency = <100000000>;
+	non-removable;
+	no-sd;
+	no-sdio;
+	voltage-ranges = <3300 3300>;
+	status = "okay";
+};
+
+&timer0 {
+	status = "okay";
+};
+
+&soc {
+	ctc-irq {
+		compatible = "centec,ctc-irq";
+		device_type = "ctc-irq";
+		interrupt-parent=<&porta>;
+		interrupts = < 0 IRQ_TYPE_LEVEL_LOW>,
+			< 1 IRQ_TYPE_LEVEL_LOW>,
+			<15 IRQ_TYPE_LEVEL_LOW>,
+			< 6 IRQ_TYPE_LEVEL_HIGH>,
+			< 7 IRQ_TYPE_LEVEL_HIGH>;
+	};
+};
+
+&pwm {
+	status = "disabled";
+};
+
+
+&pinctrl {
+	spi {
+		spi_pin: spi_pin {
+			status = "disabled";
+			ctc,pins = <0 0 PIN_FUNC_SPI>,
+				<0 2 PIN_FUNC_SPI>,
+				<0 3 PIN_FUNC_SPI>,
+				<0 5 PIN_FUNC_SPI>;
+		};
+	};
+
+	pwm0 {
+		pwm0_pin: pwm0_pin {
+			ctc,pins = <0 8  PIN_FUNC_PWM>,
+  				<0 9  PIN_FUNC_PWM>,
+				<0 10 PIN_FUNC_PWM>,
+				<0 11 PIN_FUNC_PWM>,
+				<0 12 PIN_FUNC_PWM>,
+				<0 13 PIN_FUNC_PWM>,
+				<0 14 PIN_FUNC_PWM>,
+				<0 15 PIN_FUNC_PWM>;
+		};
+	};
+};

From 0e2bfc436d9b6aeec54d7ef39f73fde9fade1000 Mon Sep 17 00:00:00 2001
From: saksarav-nokia <sakthivadivu.saravanaraj@nokia.com>
Date: Wed, 29 May 2024 13:14:57 -0400
Subject: [PATCH 0670/1115]  Linecard startup-TSA-TSB (#18496)

* start a new service to configure TSA as soon as Linecard comes up, start a timer to configure TSB and configure TSB when the timer expires

* Update tsa-tsb service to use config-setup.service instaed of update-minigraph.service

---------

Signed-off-by: saksarav <sakthivadivu.saravanaraj@nokia.com>
---
 .../startup-tsa-tsb.conf                      |   1 +
 dockers/docker-fpm-frr/base_image_files/TS    |  14 ++
 dockers/docker-fpm-frr/base_image_files/TSA   |  11 +-
 dockers/docker-fpm-frr/base_image_files/TSB   |   9 +
 .../build_templates/sonic_debian_extension.j2 |   4 +
 files/build_templates/startup_tsa_tsb.service |  15 ++
 files/scripts/startup_tsa_tsb.py              | 156 ++++++++++++++++++
 7 files changed, 209 insertions(+), 1 deletion(-)
 create mode 100644 device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/startup-tsa-tsb.conf
 create mode 100644 files/build_templates/startup_tsa_tsb.service
 create mode 100644 files/scripts/startup_tsa_tsb.py

diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/startup-tsa-tsb.conf b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/startup-tsa-tsb.conf
new file mode 100644
index 000000000..150337493
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/startup-tsa-tsb.conf
@@ -0,0 +1 @@
+STARTUP_TSB_TIMER=900
diff --git a/dockers/docker-fpm-frr/base_image_files/TS b/dockers/docker-fpm-frr/base_image_files/TS
index e0e7ce0eb..fcff1f806 100755
--- a/dockers/docker-fpm-frr/base_image_files/TS
+++ b/dockers/docker-fpm-frr/base_image_files/TS
@@ -65,3 +65,17 @@ else
             docker exec -i bgp /usr/bin/$1
         fi
 fi
+
+# If TSA was issued by startup_tsa_tsb.service, show it
+if [[ $1 == "TSC" ]]; then
+   service='startup_tsa_tsb.service'
+   if [[ $(/bin/systemctl show $service --property ActiveState  --value) == "active" ]] && \
+      [[ $(/bin/systemctl show $service --property SubState  --value) == "running" ]]; then
+       TSA_TSB_CONF=/usr/share/sonic/device/$PLATFORM/startup-tsa-tsb.conf
+       [ -f $TSA_TSB_CONF ] && . $TSA_TSB_CONF
+       service_start_sec=$(date -d "$(systemctl show --property=ActiveEnterTimestamp $service --value)" +%s)
+       service_elapsed_sec=$(( $(date +%s) - service_start_sec))
+       tsb_time_remaining=$((STARTUP_TSB_TIMER - service_elapsed_sec))
+       echo "TSB  : Pending (Time Remaining:$tsb_time_remaining seconds,  service:$service)"
+   fi
+fi
diff --git a/dockers/docker-fpm-frr/base_image_files/TSA b/dockers/docker-fpm-frr/base_image_files/TSA
index 841b968fa..4b26b2d43 100755
--- a/dockers/docker-fpm-frr/base_image_files/TSA
+++ b/dockers/docker-fpm-frr/base_image_files/TSA
@@ -21,6 +21,15 @@ then
   sudo config mux mode standby all
 fi
 
+if [ -z "$STARTED_BY_TSA_TSB_SERVICE" ]; then
+  service='startup_tsa_tsb.service'
+  if [[ $(/bin/systemctl show $service --property ActiveState  --value) == "active" ]] && \
+     [[ $(/bin/systemctl show $service --property SubState  --value) == "running" ]]; then
+      echo "Stopping $service before configuring TSA"
+      systemctl stop $service
+  fi
+fi
+
 /usr/bin/TS TSA
 if [[ "$(sonic-cfggen -d -v DEVICE_METADATA.localhost.type)" == *"SpineRouter"* ]] ; then
   if [[ "$1" != "chassis" ]] ; then
@@ -29,4 +38,4 @@ if [[ "$(sonic-cfggen -d -v DEVICE_METADATA.localhost.type)" == *"SpineRouter"*
   fi
 else
   echo "Please execute 'sudo config save' to preserve System mode in Maintenance after reboot or config reload"
-fi
\ No newline at end of file
+fi
diff --git a/dockers/docker-fpm-frr/base_image_files/TSB b/dockers/docker-fpm-frr/base_image_files/TSB
index 11cac4939..ec353148a 100755
--- a/dockers/docker-fpm-frr/base_image_files/TSB
+++ b/dockers/docker-fpm-frr/base_image_files/TSB
@@ -21,6 +21,15 @@ then
   sudo config mux mode auto all
 fi
 
+if [ -z "$STARTED_BY_TSA_TSB_SERVICE" ]; then
+  service='startup_tsa_tsb.service'
+  if [[ $(/bin/systemctl show $service --property ActiveState  --value) == "active" ]] && \
+     [[ $(/bin/systemctl show $service --property SubState  --value) == "running" ]]; then
+      echo "Stopping $service before configuring TSB"
+      systemctl stop $service
+  fi
+fi
+
 /usr/bin/TS TSB
 if [[ "$(sonic-cfggen -d -v DEVICE_METADATA.localhost.type)" == *"SpineRouter"* ]] ; then
   if [[ "$1" != "chassis" ]] ; then
diff --git a/files/build_templates/sonic_debian_extension.j2 b/files/build_templates/sonic_debian_extension.j2
index b540f39d4..ece833119 100644
--- a/files/build_templates/sonic_debian_extension.j2
+++ b/files/build_templates/sonic_debian_extension.j2
@@ -1004,6 +1004,7 @@ sudo LANG=C cp $SCRIPTS_DIR/gnmi.sh $FILESYSTEM_ROOT/usr/local/bin/gnmi.sh
 sudo LANG=C cp $SCRIPTS_DIR/mgmt-framework.sh $FILESYSTEM_ROOT/usr/local/bin/mgmt-framework.sh
 sudo LANG=C cp $SCRIPTS_DIR/asic_status.sh $FILESYSTEM_ROOT/usr/local/bin/asic_status.sh
 sudo LANG=C cp $SCRIPTS_DIR/asic_status.py $FILESYSTEM_ROOT/usr/local/bin/asic_status.py
+sudo LANG=C cp $SCRIPTS_DIR/startup_tsa_tsb.py $FILESYSTEM_ROOT/usr/local/bin/startup_tsa_tsb.py
 
 # Copy sonic-netns-exec script
 sudo LANG=C cp $SCRIPTS_DIR/sonic-netns-exec $FILESYSTEM_ROOT/usr/bin/sonic-netns-exec
@@ -1014,6 +1015,9 @@ sudo LANG=C cp $SCRIPTS_DIR/write_standby.py $FILESYSTEM_ROOT/usr/local/bin/writ
 # Copy mark_dhcp_packet script
 sudo LANG=C cp $SCRIPTS_DIR/mark_dhcp_packet.py $FILESYSTEM_ROOT/usr/local/bin/mark_dhcp_packet.py
 
+sudo cp files/build_templates/startup_tsa_tsb.service $FILESYSTEM_ROOT_USR_LIB_SYSTEMD_SYSTEM/
+echo "startup_tsa_tsb.service" | sudo tee -a $GENERATED_SERVICE_FILE
+
 sudo cp $BUILD_TEMPLATES/sonic.target $FILESYSTEM_ROOT_USR_LIB_SYSTEMD_SYSTEM
 sudo LANG=C chroot $FILESYSTEM_ROOT systemctl enable sonic.target
 
diff --git a/files/build_templates/startup_tsa_tsb.service b/files/build_templates/startup_tsa_tsb.service
new file mode 100644
index 000000000..0557f4fc5
--- /dev/null
+++ b/files/build_templates/startup_tsa_tsb.service
@@ -0,0 +1,15 @@
+[Unit]
+Description= STARTUP TSA-TSB SERVICE
+Requires=config-setup.service database.service
+After=config-setup.service database.service
+Before=bgp.service
+ConditionPathExists=!/etc/sonic/chassisdb.conf
+
+[Service]
+Environment="STARTED_BY_TSA_TSB_SERVICE=1"
+ExecStart=/usr/bin/python3 -u /usr/local/bin/startup_tsa_tsb.py  start
+ExecStop=/usr/bin/python3 -u /usr/local/bin/startup_tsa_tsb.py stop
+RemainAfterExit=yes
+
+[Install]
+WantedBy=multi-user.target
diff --git a/files/scripts/startup_tsa_tsb.py b/files/scripts/startup_tsa_tsb.py
new file mode 100644
index 000000000..5d0495ead
--- /dev/null
+++ b/files/scripts/startup_tsa_tsb.py
@@ -0,0 +1,156 @@
+#!/usr/bin/env python3
+
+# Name: startup_tsa_tsb.py, version: 1.0
+#
+# Description: Module contains the definitions to the VOQ Startup TSA-TSB service
+from sonic_py_common import multi_asic, device_info
+from sonic_py_common.logger import Logger
+import subprocess
+import sys, getopt
+from threading import Timer
+import os
+
+# Global Logger class instance
+logger = Logger("startup_tsa_tsb")
+logger.set_min_log_priority_info()
+
+def get_tsb_timer_interval():
+    platform = device_info.get_platform()
+    conf_file = '/usr/share/sonic/device/{}/startup-tsa-tsb.conf'.format(platform)
+    file = open(conf_file, 'r')
+    Lines = file.readlines()
+    for line in Lines:
+        field = line.split('=')[0].strip()
+        if field == "STARTUP_TSB_TIMER":
+            return line.split('=')[1].strip()
+    return 0
+
+def get_sonic_config(ns, config_name):
+    if ns == "":
+        return subprocess.check_output(['sonic-cfggen', '-d', '-v', config_name.replace('"', "'"), ]).strip()
+    else:
+        return subprocess.check_output(['sonic-cfggen', '-d', '-v', config_name.replace('"', "'"), '-n', ns.replace('"', "'")]).strip()
+
+def get_sub_role(asic_ns):
+    sub_role_config = "DEVICE_METADATA['localhost']['sub_role']"
+    sub_role = (get_sonic_config(asic_ns, sub_role_config)).decode()
+    return sub_role
+
+def get_tsa_config(asic_ns):
+    tsa_config = 'BGP_DEVICE_GLOBAL.STATE.tsa_enabled'
+    tsa_ena = (get_sonic_config(asic_ns, tsa_config)).decode()
+    if asic_ns == "":
+        logger.log_info('CONFIG_DB.{} : {}'.format(tsa_config, tsa_ena))
+    else:
+        logger.log_info('{} - CONFIG_DB.{} : {}'.format(asic_ns, tsa_config, tsa_ena))
+    return tsa_ena
+
+def get_tsa_status(num_asics):
+    if num_asics > 1:
+        counter = 0
+        for asic_id in range(int(num_asics)):
+            asic_ns = 'asic{}'.format(asic_id)
+            sub_role = get_sub_role(asic_ns)
+            if sub_role == 'FrontEnd':
+                tsa_enabled = get_tsa_config(asic_ns)
+                if tsa_enabled == 'false':
+                    counter += 1
+        if counter == int(num_asics):
+            return True;
+    else:
+        tsa_enabled = get_tsa_config("")
+        if tsa_enabled == 'false':
+            return True;
+    return False;
+
+def config_tsa():
+    num_asics = multi_asic.get_num_asics()
+    tsa_ena = get_tsa_status(num_asics)
+    if tsa_ena == True:
+        logger.log_info("Configuring TSA")
+        subprocess.check_output(['TSA']).strip()
+    else:
+        if num_asics > 1:
+            logger.log_info("Either TSA is already configured or switch sub_role is not Frontend - not configuring TSA")
+        else:
+            logger.log_info("Either TSA is already configured - not configuring TSA")
+    return tsa_ena
+
+def config_tsb():
+    logger.log_info("Configuring TSB")
+    subprocess.check_output(['TSB']).strip()
+    tsb_issued = True
+    return
+
+def start_tsb_timer(interval):
+    global timer
+    logger.log_info("Starting timer with interval {} seconds to configure TSB".format(interval))
+    timer = Timer(int(interval), config_tsb)
+    timer.start()
+    timer.join()
+    return
+
+def print_usage():
+    logger.log_info("Usage: startup_tsa_tsb.py [options] command")
+    logger.log_info("options:")
+    logger.log_info("  -h | --help       : this help message")
+    logger.log_info("command:")
+    logger.log_info("start     : start the TSA/TSB")
+    logger.log_info("stop      : stop the TSA/TSB")
+    return
+
+def reset_env_variables():
+    logger.log_info("Resetting environment variable")
+    os.environ.pop('STARTED_BY_TSA_TSB_SERVICE')
+    return
+
+def start_tsa_tsb(timer):
+    #Configure TSA if it was not configured already in CONFIG_DB
+    tsa_enabled = config_tsa()
+    if tsa_enabled == True:
+        #Start the timer to configure TSB
+        start_tsb_timer(timer)
+    return
+
+def stop_tsa_tsb():
+    reset_env_variables()
+    return
+
+def main():
+    platform = device_info.get_platform()
+    conf_file = '/usr/share/sonic/device/{}/startup-tsa-tsb.conf'.format(platform)
+    #This check should be moved to service file or make this feature as configurable.
+    #Adding it here for now.
+    if not os.path.exists(conf_file):
+        logger.log_info("{} does not exist, exiting the service".format(conf_file))
+        return
+    if len(sys.argv) <= 1:
+        print_usage()
+        return
+
+    # parse command line options:
+    try:
+        opts, args = getopt.getopt(sys.argv[1:], 'h:', ['help' ])
+    except getopt.GetoptError:
+        print_usage()
+        return
+
+    for opt, arg in opts:
+        if opt in ("-h", "--help"):
+            print_usage()
+            return
+
+    for arg in args:
+        if arg == 'start':
+            tsb_timer = get_tsb_timer_interval()
+            start_tsa_tsb(tsb_timer)
+        elif arg == 'stop':
+            stop_tsa_tsb()
+        else:
+            print_usage()
+            return
+
+    return
+
+if __name__ == "__main__":
+    main()

From 6b26c2c12cb092af0ab6dc816a6938fc622110e1 Mon Sep 17 00:00:00 2001
From: abdosi <58047199+abdosi@users.noreply.github.com>
Date: Wed, 29 May 2024 11:00:13 -0700
Subject: [PATCH 0671/1115] [LLDP][T2] Advertise Chassis Hostname when present.
 (#19076)

Why I did:
For chassis Advertise Chassis Hostname instead of Line Card Hostname if available to LLDP peers.

---------

Signed-off-by: Abhishek Dosi <abdosi@microsoft.com>
---
 dockers/docker-lldp/lldpmgrd | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/dockers/docker-lldp/lldpmgrd b/dockers/docker-lldp/lldpmgrd
index 2ee9c897c..8d0333ab6 100755
--- a/dockers/docker-lldp/lldpmgrd
+++ b/dockers/docker-lldp/lldpmgrd
@@ -245,7 +245,10 @@ class LldpManager(daemon_base.DaemonBase):
         if not op in ["SET", "DEL"]:
             return
         self.log_info("Device Config Opcode: {} Dict {} Key {}".format(op, device_dict, key))
-        hostname = device_dict.get("hostname")
+        try:
+            hostname = device_dict["chassis_hostname"]
+        except:
+            hostname = device_dict.get("hostname")
         if not self.hostname == hostname:
             self.log_info("Hostname changed old {0}, new {1}".format(self.hostname, hostname))
             self.update_hostname(hostname)

From 27473fab874429ed39ec64f91e7b8122f0e8aca2 Mon Sep 17 00:00:00 2001
From: Ryan Lucus <mostlyharmless@google.com>
Date: Wed, 29 May 2024 11:10:06 -0700
Subject: [PATCH 0672/1115] add support for save-on-set to gnmi (#18481)

* add support for save-on-set to gnmi

https://github.com/sonic-net/SONiC/pull/1297

* leave default if not set

* move to telemetry.sh
---
 dockers/docker-sonic-telemetry/telemetry.sh | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/dockers/docker-sonic-telemetry/telemetry.sh b/dockers/docker-sonic-telemetry/telemetry.sh
index dadd226b8..061046d25 100755
--- a/dockers/docker-sonic-telemetry/telemetry.sh
+++ b/dockers/docker-sonic-telemetry/telemetry.sh
@@ -71,6 +71,14 @@ else
     TELEMETRY_ARGS+=" -v=2"
 fi
 
+# gNMI save-on-set behavior is disabled by default.
+# Save-on-set can be turned on by setting the "TELEMETRY|gnmi|save_on_set"
+# to "true".
+readonly SAVE_ON_SET=$(echo $GNMI | jq -r '.save_on_set // empty')
+if [ ! -z "$SAVE_ON_SET" ]; then
+    TELEMETRY_ARGS+=" --with-save-on-set=$SAVE_ON_SET"
+fi
+
 # Server will handle threshold connections consecutively
 THRESHOLD_CONNECTIONS=$(echo $GNMI | jq -r '.threshold')
 if [[ $THRESHOLD_CONNECTIONS =~ ^[0-9]+$ ]]; then

From 1af02ca3377be3759b9102d6edcfb9cedb2dd8c6 Mon Sep 17 00:00:00 2001
From: Liu Shilong <shilongliu@microsoft.com>
Date: Thu, 30 May 2024 10:37:25 +0800
Subject: [PATCH 0673/1115] [ci] Migrate ubuntu and sonicbld agent pool to fix
 S360 alert. (#19099)

Why I did it
Migrate agent pool to fix S360 ticket.

Work item tracking
Microsoft ADO (number only): 27889786
How I did it
How to verify it
---
 .azure-pipelines/azure-pipelines-Official.yml |  2 +-
 .../azure-pipelines-UpgrateVersion.yml        |  2 +-
 .azure-pipelines/build-template.yml           |  4 ++--
 .../docker-sonic-mgmt-py3-only.yml            |  2 +-
 .azure-pipelines/docker-sonic-mgmt.yml        |  2 +-
 .../docker-sonic-slave-template.yml           |  4 ++--
 .azure-pipelines/docker-sonic-slave.yml       |  2 +-
 .azure-pipelines/dpkg-cache-cleanup.yml       |  2 +-
 .azure-pipelines/official-build-cache.yml     |  2 +-
 .azure-pipelines/official-build.yml           |  2 +-
 .azure-pipelines/template-commonlib.yml       |  2 +-
 azure-pipelines.yml                           | 22 +++++++++----------
 12 files changed, 24 insertions(+), 24 deletions(-)

diff --git a/.azure-pipelines/azure-pipelines-Official.yml b/.azure-pipelines/azure-pipelines-Official.yml
index a5a08167c..56d88751f 100644
--- a/.azure-pipelines/azure-pipelines-Official.yml
+++ b/.azure-pipelines/azure-pipelines-Official.yml
@@ -14,7 +14,7 @@ schedules:
     - 202012
   always: true
 
-pool: sonicbld
+pool: sonicbld-1es
 
 stages:
 - stage: Build
diff --git a/.azure-pipelines/azure-pipelines-UpgrateVersion.yml b/.azure-pipelines/azure-pipelines-UpgrateVersion.yml
index cb1b0744c..b40a5d033 100644
--- a/.azure-pipelines/azure-pipelines-UpgrateVersion.yml
+++ b/.azure-pipelines/azure-pipelines-UpgrateVersion.yml
@@ -26,7 +26,7 @@ resources:
     ref: master
     endpoint: sonic-net
 
-pool: sonicbld
+pool: sonicbld-1es
 
 parameters:
 - name: 'jobFilters'
diff --git a/.azure-pipelines/build-template.yml b/.azure-pipelines/build-template.yml
index 355cfc7aa..813126792 100644
--- a/.azure-pipelines/build-template.yml
+++ b/.azure-pipelines/build-template.yml
@@ -35,9 +35,9 @@ parameters:
 - name: pool
   type: string
   values:
-  - sonicbld
+  - sonicbld-1es
   - sonicbld_8c
-  default: sonicbld
+  default: sonicbld-1es
 
 - name: dbg_image
   type: boolean
diff --git a/.azure-pipelines/docker-sonic-mgmt-py3-only.yml b/.azure-pipelines/docker-sonic-mgmt-py3-only.yml
index f31e069bb..8019e957f 100644
--- a/.azure-pipelines/docker-sonic-mgmt-py3-only.yml
+++ b/.azure-pipelines/docker-sonic-mgmt-py3-only.yml
@@ -32,7 +32,7 @@ stages:
 - stage: Build
   jobs:
   - job: Build
-    pool: sonicbld
+    pool: sonicbld-1es
     timeoutInMinutes: 360
     steps:
     - template: cleanup.yml
diff --git a/.azure-pipelines/docker-sonic-mgmt.yml b/.azure-pipelines/docker-sonic-mgmt.yml
index 207d8ee71..924e4230d 100644
--- a/.azure-pipelines/docker-sonic-mgmt.yml
+++ b/.azure-pipelines/docker-sonic-mgmt.yml
@@ -32,7 +32,7 @@ stages:
 - stage: Build
   jobs:
   - job: Build
-    pool: sonicbld
+    pool: sonicbld-1es
     timeoutInMinutes: 360
     steps:
     - template: cleanup.yml
diff --git a/.azure-pipelines/docker-sonic-slave-template.yml b/.azure-pipelines/docker-sonic-slave-template.yml
index 1ac8ce67f..8bf7540e1 100644
--- a/.azure-pipelines/docker-sonic-slave-template.yml
+++ b/.azure-pipelines/docker-sonic-slave-template.yml
@@ -29,9 +29,9 @@ parameters:
   default: sonicdev
 - name: pool
   type: string
-  default: sonicbld
+  default: sonicbld-1es
   values:
-  - sonicbld
+  - sonicbld-1es
   - sonicbld-arm64
   - sonicbld-armhf
 
diff --git a/.azure-pipelines/docker-sonic-slave.yml b/.azure-pipelines/docker-sonic-slave.yml
index acff1b858..9633c32f6 100644
--- a/.azure-pipelines/docker-sonic-slave.yml
+++ b/.azure-pipelines/docker-sonic-slave.yml
@@ -64,7 +64,7 @@ stages:
       - ${{ each arch in parameters.arches }}:
         - template: .azure-pipelines/docker-sonic-slave-template.yml@buildimage
           parameters:
-            pool: sonicbld
+            pool: sonicbld-1es
             arch: ${{ arch }}
             dist: ${{ dist }}
             ${{ if ne(arch, 'amd64') }}:
diff --git a/.azure-pipelines/dpkg-cache-cleanup.yml b/.azure-pipelines/dpkg-cache-cleanup.yml
index 50bb3a636..7bac6997e 100644
--- a/.azure-pipelines/dpkg-cache-cleanup.yml
+++ b/.azure-pipelines/dpkg-cache-cleanup.yml
@@ -16,7 +16,7 @@ pr: none
 
 jobs:
 - job: Amd
-  pool: sonicbld
+  pool: sonicbld-1es
   timeoutInMinutes: 5
   steps:
   - checkout: none
diff --git a/.azure-pipelines/official-build-cache.yml b/.azure-pipelines/official-build-cache.yml
index cc398bab7..0f7b34e9b 100644
--- a/.azure-pipelines/official-build-cache.yml
+++ b/.azure-pipelines/official-build-cache.yml
@@ -24,7 +24,7 @@ pr: none
 
 stages:
 - stage: Build
-  pool: sonicbld
+  pool: sonicbld-1es
   variables:
   - name: CACHE_MODE
     value: cache
diff --git a/.azure-pipelines/official-build.yml b/.azure-pipelines/official-build.yml
index 14308292f..ecc9bd89c 100644
--- a/.azure-pipelines/official-build.yml
+++ b/.azure-pipelines/official-build.yml
@@ -34,7 +34,7 @@ variables:
 
 stages:
 - stage: Build
-  pool: sonicbld
+  pool: sonicbld-1es
   variables:
   - name: CACHE_MODE
     value: wcache
diff --git a/.azure-pipelines/template-commonlib.yml b/.azure-pipelines/template-commonlib.yml
index cd7551d83..c821998ae 100644
--- a/.azure-pipelines/template-commonlib.yml
+++ b/.azure-pipelines/template-commonlib.yml
@@ -11,7 +11,7 @@ jobs:
   - job: Build_${{ arch }}
     timeoutInMinutes: 120
     ${{ if eq(arch,'amd64') }}:
-      pool: sonicbld
+      pool: sonicbld-1es
     ${{ else }}:
       pool: sonicbld-${{ arch }}
     variables:
diff --git a/azure-pipelines.yml b/azure-pipelines.yml
index 18ed0c58b..4144bf801 100644
--- a/azure-pipelines.yml
+++ b/azure-pipelines.yml
@@ -51,7 +51,7 @@ variables:
 
 stages:
 - stage: BuildVS
-  pool: sonicbld
+  pool: sonicbld-1es
   jobs:
   - template: .azure-pipelines/azure-pipelines-build.yml
     parameters:
@@ -60,7 +60,7 @@ stages:
       - name: vs
 
 - stage: Build
-  pool: sonicbld
+  pool: sonicbld-1es
   dependsOn: []
   jobs:
   - template: .azure-pipelines/azure-pipelines-build.yml
@@ -163,7 +163,7 @@ stages:
         testRunTitle: vstest
 
   - job: t0_elastictest
-    pool: ubuntu-20.04
+    pool: sonic-ubuntu-1c
     displayName: "kvmtest-t0 by Elastictest"
     timeoutInMinutes: 240
     continueOnError: false
@@ -176,7 +176,7 @@ stages:
         MGMT_BRANCH: $(BUILD_BRANCH)
 
   - job: t0_2vlans_elastictest
-    pool: ubuntu-20.04
+    pool: sonic-ubuntu-1c
     displayName: "kvmtest-t0-2vlans by Elastictest"
     timeoutInMinutes: 240
     continueOnError: false
@@ -191,7 +191,7 @@ stages:
         DEPLOY_MG_EXTRA_PARAMS: "-e vlan_config=two_vlan_a"
 
   - job: t1_lag_elastictest
-    pool: ubuntu-20.04
+    pool: sonic-ubuntu-1c
     displayName: "kvmtest-t1-lag by Elastictest"
     timeoutInMinutes: 240
     continueOnError: false
@@ -205,7 +205,7 @@ stages:
 
   - job: multi_asic_elastictest
     displayName: "kvmtest-multi-asic-t1-lag by Elastictest"
-    pool: ubuntu-20.04
+    pool: sonic-ubuntu-1c
     timeoutInMinutes: 240
     continueOnError: false
     steps:
@@ -219,7 +219,7 @@ stages:
           MGMT_BRANCH: $(BUILD_BRANCH)
 
   - job: dualtor_elastictest
-    pool: ubuntu-20.04
+    pool: sonic-ubuntu-1c
     displayName: "kvmtest-dualtor-t0 by Elastictest"
     timeoutInMinutes: 240
     continueOnError: false
@@ -234,7 +234,7 @@ stages:
 
   - job: sonic_t0_elastictest
     displayName: "kvmtest-t0-sonic by Elastictest"
-    pool: ubuntu-20.04
+    pool: sonic-ubuntu-1c
     timeoutInMinutes: 240
     continueOnError: false
     steps:
@@ -252,7 +252,7 @@ stages:
     displayName: "kvmtest-dpu by Elastictest"
     timeoutInMinutes: 240
     continueOnError: false
-    pool: ubuntu-20.04
+    pool: sonic-ubuntu-1c
     steps:
       - template: .azure-pipelines/run-test-elastictest-template.yml@sonic-mgmt
         parameters:
@@ -265,7 +265,7 @@ stages:
     displayName: "onboarding testcases by Elastictest"
     timeoutInMinutes: 240
     continueOnError: true
-    pool: ubuntu-20.04
+    pool: sonic-ubuntu-1c
     steps:
       - template: .azure-pipelines/run-test-elastictest-template.yml@sonic-mgmt
         parameters:
@@ -279,7 +279,7 @@ stages:
 
 #  - job: wan_elastictest
 #    displayName: "kvmtest-wan by Elastictest"
-#    pool: ubuntu-20.04
+#    pool: sonic-ubuntu-1c
 #    timeoutInMinutes: 240
 #    continueOnError: false
 #    steps:

From f5b20f888327bd9be406bc19e37bcb767bd5f98d Mon Sep 17 00:00:00 2001
From: abdosi <58047199+abdosi@users.noreply.github.com>
Date: Thu, 30 May 2024 12:21:05 -0700
Subject: [PATCH 0674/1115] Update init_cfg.json.j2 to handle global scope for
 lldp feature (#18808)

* Update init_cfg.json.j2 to handle global scope for lldp feature

* Update sonic-feature.yang
---
 files/build_templates/init_cfg.json.j2               | 3 ++-
 src/sonic-yang-models/yang-models/sonic-feature.yang | 2 +-
 2 files changed, 3 insertions(+), 2 deletions(-)

diff --git a/files/build_templates/init_cfg.json.j2 b/files/build_templates/init_cfg.json.j2
index f31b5a22f..31be59e35 100644
--- a/files/build_templates/init_cfg.json.j2
+++ b/files/build_templates/init_cfg.json.j2
@@ -71,10 +71,11 @@
         "{{feature}}": {
             "state": "{{state}}",
             "delayed" : {{delayed | lower()}},
-            "has_global_scope": {% if feature + '.service' in installer_services.split(' ') %}true{% else %}false{% endif %},
 {%- if feature in ["lldp"] %}
+            "has_global_scope": {% raw %}"{% if ('CHASSIS_METADATA' in DEVICE_RUNTIME_METADATA and DEVICE_RUNTIME_METADATA['CHASSIS_METADATA']['module_type'] in ['linecard']) %}False{% else %}True{% endif %}"{% endraw %},
             "has_per_asic_scope": {% raw %}"{% if not DEVICE_RUNTIME_METADATA['ETHERNET_PORTS_PRESENT'] or ('CHASSIS_METADATA' in DEVICE_RUNTIME_METADATA and DEVICE_RUNTIME_METADATA['CHASSIS_METADATA']['module_type'] in ['supervisor']) %}False{% else %}True{% endif %}"{% endraw %},
 {%- else %}
+            "has_global_scope": {% if feature + '.service' in installer_services.split(' ') %}true{% else %}false{% endif %},
             "has_per_asic_scope": {% if feature + '@.service' in installer_services.split(' ') %}"True"{% else %}"False"{% endif %},
 {%- endif %}
             "auto_restart": "{{autorestart}}",
diff --git a/src/sonic-yang-models/yang-models/sonic-feature.yang b/src/sonic-yang-models/yang-models/sonic-feature.yang
index 6f23135b6..3ca32ad6a 100644
--- a/src/sonic-yang-models/yang-models/sonic-feature.yang
+++ b/src/sonic-yang-models/yang-models/sonic-feature.yang
@@ -67,7 +67,7 @@ module sonic-feature{
                 leaf has_global_scope {
                     description "This configuration identicates there will only one service
                                 spawned for the device";
-                    type stypes:boolean_type;
+                    type feature-scope-status;
                     default "false";
                 }
 

From 0e3fbd9d860f11241719ae7637262039ea5add5b Mon Sep 17 00:00:00 2001
From: Michael Attig <7726374+mkeda@users.noreply.github.com>
Date: Thu, 30 May 2024 13:15:38 -0700
Subject: [PATCH 0675/1115] Update P4RT docker to Bookworm (#18886)

Signed-off-by: mkeda <mikeattig@google.com>
---
 dockers/docker-sonic-p4rt/Dockerfile.j2 |  2 +-
 rules/docker-p4rt.mk                    | 10 +++++-----
 src/sonic-p4rt/Makefile                 |  4 ++++
 3 files changed, 10 insertions(+), 6 deletions(-)

diff --git a/dockers/docker-sonic-p4rt/Dockerfile.j2 b/dockers/docker-sonic-p4rt/Dockerfile.j2
index 241f4724e..994bc3a5e 100644
--- a/dockers/docker-sonic-p4rt/Dockerfile.j2
+++ b/dockers/docker-sonic-p4rt/Dockerfile.j2
@@ -1,5 +1,5 @@
 {% from "dockers/dockerfile-macros.j2" import install_debian_packages, install_python_wheels, copy_files %}
-FROM docker-config-engine-bullseye-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}}
+FROM docker-config-engine-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}}
 
 ARG docker_container_name
 ARG git_commit
diff --git a/rules/docker-p4rt.mk b/rules/docker-p4rt.mk
index bc8d6b9fb..85cfb6755 100644
--- a/rules/docker-p4rt.mk
+++ b/rules/docker-p4rt.mk
@@ -7,12 +7,12 @@ DOCKER_P4RT_DBG = $(DOCKER_P4RT_STEM)-$(DBG_IMAGE_MARK).gz
 $(DOCKER_P4RT)_PATH = $(DOCKERS_PATH)/$(DOCKER_P4RT_STEM)
 
 $(DOCKER_P4RT)_DEPENDS += $(SONIC_P4RT)
-$(DOCKER_P4RT)_DBG_DEPENDS = $($(DOCKER_CONFIG_ENGINE_BULLSEYE)_DBG_DEPENDS)
+$(DOCKER_P4RT)_DBG_DEPENDS = $($(DOCKER_CONFIG_ENGINE_BOOKWORM)_DBG_DEPENDS)
 $(DOCKER_P4RT)_DBG_DEPENDS += $(SONIC_P4RT_DBG) $(LIBSWSSCOMMON_DBG)
 $(DOCKER_P4RT)_DBG_DEPENDS += $(LIBSAIREDIS_DBG)
-$(DOCKER_P4RT)_DBG_IMAGE_PACKAGES = $($(DOCKER_CONFIG_ENGINE_BULLSEYE)_DBG_IMAGE_PACKAGES)
+$(DOCKER_P4RT)_DBG_IMAGE_PACKAGES = $($(DOCKER_CONFIG_ENGINE_BOOKWORM)_DBG_IMAGE_PACKAGES)
 
-$(DOCKER_P4RT)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE_BULLSEYE)
+$(DOCKER_P4RT)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE_BOOKWORM)
 
 $(DOCKER_P4RT)_VERSION = 1.0.0
 $(DOCKER_P4RT)_PACKAGE_NAME = p4rt
@@ -21,9 +21,9 @@ $(DOCKER_P4RT)_FAST_SHUTDOWN_BEFORE = swss
 
 # TODO: Enable P4RT DBG
 SONIC_DOCKER_IMAGES += $(DOCKER_P4RT)
-SONIC_BULLSEYE_DOCKERS += $(DOCKER_P4RT)
+SONIC_BOOKWORM_DOCKERS += $(DOCKER_P4RT)
 # SONIC_DOCKER_DBG_IMAGES += $(DOCKER_P4RT_DBG)
-# SONIC_BULLSEYE_DBG_DOCKERS += $(DOCKER_P4RT_DBG)
+# SONIC_BOOKWORM_DBG_DOCKERS += $(DOCKER_P4RT_DBG)
 
 ifeq ($(INCLUDE_P4RT), y)
 SONIC_INSTALL_DOCKER_IMAGES += $(DOCKER_P4RT)
diff --git a/src/sonic-p4rt/Makefile b/src/sonic-p4rt/Makefile
index 191a94d45..5eeb135e9 100644
--- a/src/sonic-p4rt/Makefile
+++ b/src/sonic-p4rt/Makefile
@@ -11,6 +11,10 @@ BAZEL_BUILD_OPTS += --fission=yes --features=per_object_debug_info
 # Override sonic_swss_common to use the version specific to this buildimage.
 BAZEL_BUILD_OPTS += --override_repository=sonic_swss_common=/sonic/src/sonic-swss-common
 
+# Newer version of gcc has spurious warnings in boringssl package.
+BAZEL_BUILD_OPTS += --copt=-Wno-array-bounds
+BAZEL_BUILD_OPTS += --copt=-Wno-stringop-overflow
+
 # Build optimized, stripped binaries.
 BAZEL_BUILD_OPTS += -c opt
 

From bb659e513e5788b95bfb513b4cdd0445935b3522 Mon Sep 17 00:00:00 2001
From: Stepan Blyshchak <38952541+stepanblyschak@users.noreply.github.com>
Date: Fri, 31 May 2024 03:30:00 +0300
Subject: [PATCH 0676/1115] [Nvidia] Remove
 SAI_HOSTIF_OPER_STATUS_UPDATE_BY_APP, set it only for certain SKUs (#19066)

* Revert "[Mellanox] enable host interface control by orchagent (#18592)"

This reverts commit 3adf3082889dbba697cbec09846bb78ca879109e.

Signed-off-by: Stepan Blyschak <stepanb@nvidia.com>
---
 .../x86_64-nvidia_sn5600-r0/Mellanox-SN5600-O128/sai.profile     | 1 +
 platform/mellanox/docker-syncd-mlnx/sai-common.profile           | 1 -
 2 files changed, 1 insertion(+), 1 deletion(-)

diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-O128/sai.profile b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-O128/sai.profile
index a362513c8..73fbbd160 100644
--- a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-O128/sai.profile
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-O128/sai.profile
@@ -1 +1,2 @@
 SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_sn5600_128x400g_1x25g.xml
+SAI_HOSTIF_OPER_STATUS_UPDATE_BY_APP=1
diff --git a/platform/mellanox/docker-syncd-mlnx/sai-common.profile b/platform/mellanox/docker-syncd-mlnx/sai-common.profile
index d3b91a00e..3b9e6fe00 100644
--- a/platform/mellanox/docker-syncd-mlnx/sai-common.profile
+++ b/platform/mellanox/docker-syncd-mlnx/sai-common.profile
@@ -1,3 +1,2 @@
 SAI_DUMP_STORE_PATH=/var/log/mellanox/sdk-dumps
 SAI_DUMP_STORE_AMOUNT=10
-SAI_HOSTIF_OPER_STATUS_UPDATE_BY_APP=1

From 3387506f61fccd662cb5aa904fd60d33bc0c506c Mon Sep 17 00:00:00 2001
From: Tejaswini Chadaga <85581939+tjchadaga@users.noreply.github.com>
Date: Thu, 30 May 2024 17:47:53 -0700
Subject: [PATCH 0677/1115] [bgpcfgd]: Changes to support sequential IDF
 isolation (#19136)

Why I did it
In order to isolate an IDF sequentially (one device at a time), need a mechanism to perform downstream isolation on T2 device. Adding support for two kinds of isolation -

By setting no-export BGP community on all routes advertised to T1 (except loopback), so the routes are not advertised to T0s By withdrawing all routes from T1

How I did it

Added

1. New configuration to support the changes described by Yang model changes for Sequential IDF isolation #18597
Script to update configDB on each ASIC to configure no-export/withdraw-all isolation and unisolation of IDF. This is copied to host
2. BGPcfgd changes to handle configDB events and add/remove the required route-maps
3. UT cases and data file changes for BGPCfgd and jinja templates

How to verify it
Corresponding templates on T2 have to be updated to verify the functionality

Configuration options-

sudo idf_isolation withdraw_all
sudo idf_isolation no-export
sudo idf_isolation unisolated

Validate the routes on T1 are either withdrawn, tagged with no-export community or re-advertised based on the configuration
---
 .../base_image_files/idf_isolation            | 87 +++++++++++++++++++
 .../frr/bgpd/idf_isolate/idf_isolate.conf.j2  | 20 +++++
 .../bgpd/idf_isolate/idf_unisolate.conf.j2    |  6 ++
 rules/docker-fpm-frr.mk                       |  1 +
 src/sonic-bgpcfgd/bgpcfgd/managers_bgp.py     |  6 +-
 .../bgpcfgd/managers_device_global.py         | 51 +++++++++--
 .../result_all_idf_isolated_no_export.conf    | 34 ++++++++
 .../result_all_idf_isolated_withdraw_all.conf | 33 +++++++
 .../result_all_idf_unisolated.conf            | 27 ++++++
 .../peer-group.conf/result_idf_isolated.conf  | 12 +++
 .../idf_isolate/idf_isolated_no_export.conf   | 12 +++
 .../idf_isolate/idf_isolated_no_export.json   |  9 ++
 .../idf_isolated_withdraw_all.conf            | 12 +++
 .../idf_isolated_withdraw_all.json            |  9 ++
 .../idf_isolate/idf_unisolated.conf           |  6 ++
 .../idf_isolate/idf_unisolated.json           |  9 ++
 src/sonic-bgpcfgd/tests/test_device_global.py | 37 ++++++++
 src/sonic-bgpcfgd/tests/test_sonic-cfggen.py  | 18 ++++
 18 files changed, 382 insertions(+), 7 deletions(-)
 create mode 100755 dockers/docker-fpm-frr/base_image_files/idf_isolation
 create mode 100644 dockers/docker-fpm-frr/frr/bgpd/idf_isolate/idf_isolate.conf.j2
 create mode 100644 dockers/docker-fpm-frr/frr/bgpd/idf_isolate/idf_unisolate.conf.j2
 create mode 100644 src/sonic-bgpcfgd/tests/data/general/peer-group.conf/result_all_idf_isolated_no_export.conf
 create mode 100644 src/sonic-bgpcfgd/tests/data/general/peer-group.conf/result_all_idf_isolated_withdraw_all.conf
 create mode 100644 src/sonic-bgpcfgd/tests/data/general/peer-group.conf/result_all_idf_unisolated.conf
 create mode 100644 src/sonic-bgpcfgd/tests/data/general/peer-group.conf/result_idf_isolated.conf
 create mode 100644 src/sonic-bgpcfgd/tests/data/sonic-cfggen/idf_isolate/idf_isolated_no_export.conf
 create mode 100644 src/sonic-bgpcfgd/tests/data/sonic-cfggen/idf_isolate/idf_isolated_no_export.json
 create mode 100644 src/sonic-bgpcfgd/tests/data/sonic-cfggen/idf_isolate/idf_isolated_withdraw_all.conf
 create mode 100644 src/sonic-bgpcfgd/tests/data/sonic-cfggen/idf_isolate/idf_isolated_withdraw_all.json
 create mode 100644 src/sonic-bgpcfgd/tests/data/sonic-cfggen/idf_isolate/idf_unisolated.conf
 create mode 100644 src/sonic-bgpcfgd/tests/data/sonic-cfggen/idf_isolate/idf_unisolated.json

diff --git a/dockers/docker-fpm-frr/base_image_files/idf_isolation b/dockers/docker-fpm-frr/base_image_files/idf_isolation
new file mode 100755
index 000000000..7312b9964
--- /dev/null
+++ b/dockers/docker-fpm-frr/base_image_files/idf_isolation
@@ -0,0 +1,87 @@
+#!/bin/bash
+
+# Restrict command to sudo users
+if [ "$EUID" -ne 0 ] ; then
+    echo "Root priveleges are needed for this operation"
+    exit 1
+fi
+
+# Command is only supported on spine routers
+if [[ "$(sonic-cfggen -d -v DEVICE_METADATA.localhost.type)" != *"SpineRouter"* ]] ; then
+    echo "Operation is not supported on this platform"
+    exit 1
+fi
+
+# Skip operation on chassis supervisor
+if [ -f /etc/sonic/chassisdb.conf ]; then  
+    echo "Skipping Operation on chassis supervisor"
+    exit 0
+fi
+
+idf_isolation_states=("isolated_no_export" "isolated_withdraw_all" "unisolated" "status")
+valid=false
+for state in "${idf_isolation_states[@]}"; do
+    if [[ "$1" == "$state" ]]; then
+       valid=true
+       break
+    fi
+done
+if [ $valid == false ]; then
+    echo "Invalid parameter $1, Operation not supported"
+    echo ""
+    echo "Usage: sudo idf_isolation <isolated_no_export|isolated_withdraw_all|unisolated|status>"
+    exit 0
+fi
+
+IDF_ISOLATION_STATE="{\"BGP_DEVICE_GLOBAL\":{\"STATE\":{\"idf_isolation_state\": \"$1\"}}}"
+
+# read SONiC immutable variables
+[ -f /etc/sonic/sonic-environment ] && . /etc/sonic/sonic-environment
+
+PLATFORM=${PLATFORM:-`sonic-cfggen -H -v DEVICE_METADATA.localhost.platform`}
+
+# Parse the device specific asic conf file, if it exists
+ASIC_CONF=/usr/share/sonic/device/$PLATFORM/asic.conf
+[ -f $ASIC_CONF ] && . $ASIC_CONF
+
+if [[ ($NUM_ASIC -gt 1) ]]; then
+    asic=0
+    NAMESPACE_PREFIX='asic'
+
+    while [ $asic -lt $NUM_ASIC ]
+    do        
+        sub_role=`sonic-cfggen -d -v "DEVICE_METADATA['localhost']['sub_role']" -n $NAMESPACE_PREFIX$asic`
+        if [ $sub_role == 'FrontEnd' ] ; then
+            cur_idf_isolation_state="$(sonic-cfggen -d -v BGP_DEVICE_GLOBAL.STATE.idf_isolation_state -n $NAMESPACE_PREFIX$asic)"
+            if [ $1 == 'status' ] ; then
+                echo "BGP$asic: IDF isolation state: $cur_idf_isolation_state"
+            else
+                if [ $1 == $cur_idf_isolation_state ]; then
+                    echo "BGP$asic: IDF is already in $1 state"
+                else
+                    sonic-cfggen -a "$IDF_ISOLATION_STATE" -w -n $NAMESPACE_PREFIX$asic
+                    logger -t $1 -p user.info "IDF isolation state: $1"
+                    echo "BGP$asic: IDF isolation state: $1"
+                fi
+            fi
+        fi
+        asic=$[$asic+1]
+    done
+else
+    cur_idf_isolation_state="$(sonic-cfggen -d -v BGP_DEVICE_GLOBAL.STATE.idf_isolation_state)"
+    if [ $1 == 'status' ] ; then
+        echo "IDF isolation state: $cur_idf_isolation_state"
+    else
+        if [ $1 == $cur_idf_isolation_state ]; then
+            echo "IDF is already in $1 state"
+        else
+            sonic-cfggen -a "$IDF_ISOLATION_STATE" -w
+            logger -t $1 -p user.info "IDF isolation state: $1"
+            echo "IDF isolation state: $1"
+        fi
+    fi
+fi
+
+if [ $1 != 'status' ]; then
+    echo "Please execute 'sudo config save' to preserve IDF isolation state after reboot or config reload"
+fi
\ No newline at end of file
diff --git a/dockers/docker-fpm-frr/frr/bgpd/idf_isolate/idf_isolate.conf.j2 b/dockers/docker-fpm-frr/frr/bgpd/idf_isolate/idf_isolate.conf.j2
new file mode 100644
index 000000000..2ab76b128
--- /dev/null
+++ b/dockers/docker-fpm-frr/frr/bgpd/idf_isolate/idf_isolate.conf.j2
@@ -0,0 +1,20 @@
+route-map CHECK_IDF_ISOLATION permit 1
+    match ip address prefix-list PL_LoopbackV4
+    set community {{ constants.bgp.traffic_shift_community }}
+route-map CHECK_IDF_ISOLATION permit 2
+    match ipv6 address prefix-list PL_LoopbackV6
+    set community {{ constants.bgp.traffic_shift_community }}
+route-map CHECK_IDF_ISOLATION permit 3
+    match tag {{ constants.bgp.internal_community_match_tag }}
+    set community {{ constants.bgp.traffic_shift_community }}
+{# #}
+{%- if isolation_status == "isolated_withdraw_all" -%}
+    route-map CHECK_IDF_ISOLATION deny 4
+    route-map CHECK_IDF_ISOLATION permit 10
+        no set community no-export additive{# Added to clean up state, in case of transition from isolated_no_export (not expected) #}
+{%- elif isolation_status == "isolated_no_export" -%}
+    route-map CHECK_IDF_ISOLATION permit 10
+        set community no-export additive
+    no route-map CHECK_IDF_ISOLATION deny 4{# Added to clean up state, in case of transition from isolated_withdraw_all (not expected) #}
+{# #}
+{%- endif -%}
\ No newline at end of file
diff --git a/dockers/docker-fpm-frr/frr/bgpd/idf_isolate/idf_unisolate.conf.j2 b/dockers/docker-fpm-frr/frr/bgpd/idf_isolate/idf_unisolate.conf.j2
new file mode 100644
index 000000000..5454c92f8
--- /dev/null
+++ b/dockers/docker-fpm-frr/frr/bgpd/idf_isolate/idf_unisolate.conf.j2
@@ -0,0 +1,6 @@
+no route-map CHECK_IDF_ISOLATION permit 1
+no route-map CHECK_IDF_ISOLATION permit 2
+no route-map CHECK_IDF_ISOLATION permit 3
+no route-map CHECK_IDF_ISOLATION deny 4
+route-map CHECK_IDF_ISOLATION permit 10
+    no set community no-export additive
diff --git a/rules/docker-fpm-frr.mk b/rules/docker-fpm-frr.mk
index bcc293e02..b866960d6 100644
--- a/rules/docker-fpm-frr.mk
+++ b/rules/docker-fpm-frr.mk
@@ -40,6 +40,7 @@ $(DOCKER_FPM_FRR)_BASE_IMAGE_FILES += TSA:/usr/bin/TSA
 $(DOCKER_FPM_FRR)_BASE_IMAGE_FILES += TSB:/usr/bin/TSB
 $(DOCKER_FPM_FRR)_BASE_IMAGE_FILES += TSC:/usr/bin/TSC
 $(DOCKER_FPM_FRR)_BASE_IMAGE_FILES += TS:/usr/bin/TS
+$(DOCKER_FPM_FRR)_BASE_IMAGE_FILES += idf_isolation:/usr/bin/idf_isolation
 
 SONIC_BULLSEYE_DOCKERS += $(DOCKER_FPM_FRR)
 SONIC_BULLSEYE_DBG_DOCKERS += $(DOCKER_FPM_FRR_DBG)
diff --git a/src/sonic-bgpcfgd/bgpcfgd/managers_bgp.py b/src/sonic-bgpcfgd/bgpcfgd/managers_bgp.py
index de85a2f84..3708b5b30 100644
--- a/src/sonic-bgpcfgd/bgpcfgd/managers_bgp.py
+++ b/src/sonic-bgpcfgd/bgpcfgd/managers_bgp.py
@@ -59,14 +59,15 @@ def update_pg(self, name, **kwargs):
         try:
             pg = self.peergroup_template.render(**kwargs)
             tsa_rm = self.device_global_cfgmgr.check_state_and_get_tsa_routemaps(pg)
+            idf_isolation_rm = self.device_global_cfgmgr.check_state_and_get_idf_isolation_routemaps()
         except jinja2.TemplateError as e:
             log_err("Can't render peer-group template: '%s': %s" % (name, str(e)))
             return False
 
         if kwargs['vrf'] == 'default':
-            cmd = ('router bgp %s\n' % kwargs['bgp_asn']) + pg + tsa_rm
+            cmd = ('router bgp %s\n' % kwargs['bgp_asn']) + pg + tsa_rm + idf_isolation_rm
         else:
-            cmd = ('router bgp %s vrf %s\n' % (kwargs['bgp_asn'], kwargs['vrf'])) + pg + tsa_rm
+            cmd = ('router bgp %s vrf %s\n' % (kwargs['bgp_asn'], kwargs['vrf'])) + pg + tsa_rm + idf_isolation_rm
         self.update_entity(cmd, "Peer-group for peer '%s'" % name)
         return True
 
@@ -108,6 +109,7 @@ def __init__(self, common_objs, db_name, table_name, peer_type, check_neig_meta)
             ("CONFIG_DB", swsscommon.CFG_DEVICE_METADATA_TABLE_NAME, "localhost/bgp_asn"),
             ("CONFIG_DB", swsscommon.CFG_LOOPBACK_INTERFACE_TABLE_NAME, "Loopback0"),
             ("CONFIG_DB", swsscommon.CFG_BGP_DEVICE_GLOBAL_TABLE_NAME, "tsa_enabled"),
+            ("CONFIG_DB", swsscommon.CFG_BGP_DEVICE_GLOBAL_TABLE_NAME, "idf_isolation_state"),
             ("LOCAL", "local_addresses", ""),
             ("LOCAL", "interfaces", ""),
         ]
diff --git a/src/sonic-bgpcfgd/bgpcfgd/managers_device_global.py b/src/sonic-bgpcfgd/bgpcfgd/managers_device_global.py
index db2bcd989..5c42e4415 100644
--- a/src/sonic-bgpcfgd/bgpcfgd/managers_device_global.py
+++ b/src/sonic-bgpcfgd/bgpcfgd/managers_device_global.py
@@ -19,6 +19,8 @@ def __init__(self, common_objs, db, table):
         self.constants = common_objs['constants']
         self.tsa_template = common_objs['tf'].from_file("bgpd/tsa/bgpd.tsa.isolate.conf.j2")
         self.tsb_template = common_objs['tf'].from_file("bgpd/tsa/bgpd.tsa.unisolate.conf.j2")
+        self.idf_isolate_template = common_objs['tf'].from_file("bgpd/idf_isolate/idf_isolate.conf.j2")
+        self.idf_unisolate_template = common_objs['tf'].from_file("bgpd/idf_isolate/idf_unisolate.conf.j2")
         self.directory.subscribe([("CONFIG_DB", swsscommon.CFG_DEVICE_METADATA_TABLE_NAME, "localhost/switch_type"),], self.on_switch_type_change)
         super(DeviceGlobalCfgMgr, self).__init__(
             common_objs,
@@ -42,13 +44,31 @@ def set_handler(self, key, data):
             log_err("DeviceGlobalCfgMgr:: data is None")
             return False
 
+        tsa_status = "false"
+        idf_isolation_state = "unisolated"
+
+        if self.directory.path_exist("CONFIG_DB", swsscommon.CFG_BGP_DEVICE_GLOBAL_TABLE_NAME, "tsa_enabled"):
+            tsa_status = self.directory.get_slot("CONFIG_DB", swsscommon.CFG_BGP_DEVICE_GLOBAL_TABLE_NAME)["tsa_enabled"]
+        if self.directory.path_exist("CONFIG_DB", swsscommon.CFG_BGP_DEVICE_GLOBAL_TABLE_NAME, "idf_isolation_state"):
+            idf_isolation_state = self.directory.get_slot("CONFIG_DB", swsscommon.CFG_BGP_DEVICE_GLOBAL_TABLE_NAME)["idf_isolation_state"]
+
         if "tsa_enabled" in data:
-            self.cfg_mgr.commit()
-            self.cfg_mgr.update()
-            self.isolate_unisolate_device(data["tsa_enabled"])
             self.directory.put(self.db_name, self.table_name, "tsa_enabled", data["tsa_enabled"])
-            return True
-        return False
+            if tsa_status != data["tsa_enabled"]:
+                self.cfg_mgr.commit()
+                self.cfg_mgr.update()
+                self.isolate_unisolate_device(data["tsa_enabled"])
+
+            
+        if "idf_isolation_state" in data:
+            self.directory.put(self.db_name, self.table_name, "idf_isolation_state", data["idf_isolation_state"])
+            if idf_isolation_state != data["idf_isolation_state"]:
+                if self.switch_type and self.switch_type != "SpineRouter":
+                    log_debug("DeviceGlobalCfgMgr:: Skipping IDF isolation configuration on Switch type: %s" % self.switch_type)
+                    return True
+                self.downstream_isolate_unisolate(data["idf_isolation_state"])
+            
+        return True
 
     def del_handler(self, key):
         log_debug("DeviceGlobalCfgMgr:: del handler")
@@ -113,3 +133,24 @@ def __extract_out_route_map_names(self, cmds):
                 route_map_names.add(result.group(1))
         return route_map_names
 
+    def downstream_isolate_unisolate(self, idf_isolation_state):
+        cmd = "\n"
+        if idf_isolation_state == "unisolated":
+            cmd += self.idf_unisolate_template.render(constants=self.constants)
+            log_notice("DeviceGlobalCfgMgr:: IDF un-isolated")
+        else:
+            cmd += self.idf_isolate_template.render(isolation_status=idf_isolation_state, constants=self.constants)
+            log_notice("DeviceGlobalCfgMgr:: IDF isolated, {} policy applied".format(idf_isolation_state))
+
+        self.cfg_mgr.push(cmd)
+        log_debug("DeviceGlobalCfgMgr::Done")
+
+    def check_state_and_get_idf_isolation_routemaps(self):
+        """ API to get TSA route-maps if device is isolated"""
+        cmd = ""
+        if self.directory.path_exist("CONFIG_DB", swsscommon.CFG_BGP_DEVICE_GLOBAL_TABLE_NAME, "idf_isolation_state"):
+            idf_isolation_state = self.directory.get_slot("CONFIG_DB", swsscommon.CFG_BGP_DEVICE_GLOBAL_TABLE_NAME)["idf_isolation_state"]
+            if idf_isolation_state != "unisolated":                
+                log_notice("DeviceGlobalCfgMgr:: IDF is isolated. Applying required route-maps")
+                cmd = self.idf_isolate_template.render(isolation_status=idf_isolation_state, constants=self.constants)           
+        return cmd
\ No newline at end of file
diff --git a/src/sonic-bgpcfgd/tests/data/general/peer-group.conf/result_all_idf_isolated_no_export.conf b/src/sonic-bgpcfgd/tests/data/general/peer-group.conf/result_all_idf_isolated_no_export.conf
new file mode 100644
index 000000000..39d6866ad
--- /dev/null
+++ b/src/sonic-bgpcfgd/tests/data/general/peer-group.conf/result_all_idf_isolated_no_export.conf
@@ -0,0 +1,34 @@
+!
+! template: bgpd/templates/general/peer-group.conf.j2
+!
+  neighbor PEER_V4 peer-group
+  neighbor PEER_V6 peer-group
+  address-family ipv4
+    neighbor PEER_V4 allowas-in 1
+    neighbor PEER_V4 soft-reconfiguration inbound
+    neighbor PEER_V4 route-map FROM_BGP_PEER_V4 in
+    neighbor PEER_V4 route-map TO_BGP_PEER_V4 out
+  exit-address-family
+  address-family ipv6
+    neighbor PEER_V6 allowas-in 1
+    neighbor PEER_V6 soft-reconfiguration inbound
+    neighbor PEER_V6 route-map FROM_BGP_PEER_V6 in
+    neighbor PEER_V6 route-map TO_BGP_PEER_V6 out
+  exit-address-family
+!
+! end of template: bgpd/templates/general/peer-group.conf.j2
+!
+
+route-map CHECK_IDF_ISOLATION permit 1
+    match ip address prefix-list PL_LoopbackV4
+    set community 12345:12345
+route-map CHECK_IDF_ISOLATION permit 2
+    match ipv6 address prefix-list PL_LoopbackV6
+    set community 12345:12345
+route-map CHECK_IDF_ISOLATION permit 3
+    match tag 1001
+    set community 12345:12345
+route-map CHECK_IDF_ISOLATION permit 10
+        set community no-export additive
+    no route-map CHECK_IDF_ISOLATION deny 4
+
diff --git a/src/sonic-bgpcfgd/tests/data/general/peer-group.conf/result_all_idf_isolated_withdraw_all.conf b/src/sonic-bgpcfgd/tests/data/general/peer-group.conf/result_all_idf_isolated_withdraw_all.conf
new file mode 100644
index 000000000..cbf1c19b2
--- /dev/null
+++ b/src/sonic-bgpcfgd/tests/data/general/peer-group.conf/result_all_idf_isolated_withdraw_all.conf
@@ -0,0 +1,33 @@
+!
+! template: bgpd/templates/general/peer-group.conf.j2
+!
+  neighbor PEER_V4 peer-group
+  neighbor PEER_V6 peer-group
+  address-family ipv4
+    neighbor PEER_V4 allowas-in 1
+    neighbor PEER_V4 soft-reconfiguration inbound
+    neighbor PEER_V4 route-map FROM_BGP_PEER_V4 in
+    neighbor PEER_V4 route-map TO_BGP_PEER_V4 out
+  exit-address-family
+  address-family ipv6
+    neighbor PEER_V6 allowas-in 1
+    neighbor PEER_V6 soft-reconfiguration inbound
+    neighbor PEER_V6 route-map FROM_BGP_PEER_V6 in
+    neighbor PEER_V6 route-map TO_BGP_PEER_V6 out
+  exit-address-family
+!
+! end of template: bgpd/templates/general/peer-group.conf.j2
+!
+
+route-map CHECK_IDF_ISOLATION permit 1
+    match ip address prefix-list PL_LoopbackV4
+    set community 12345:12345
+route-map CHECK_IDF_ISOLATION permit 2
+    match ipv6 address prefix-list PL_LoopbackV6
+    set community 12345:12345
+route-map CHECK_IDF_ISOLATION permit 3
+    match tag 1001
+    set community 12345:12345
+route-map CHECK_IDF_ISOLATION deny 4
+    route-map CHECK_IDF_ISOLATION permit 10
+        no set community no-export additive
diff --git a/src/sonic-bgpcfgd/tests/data/general/peer-group.conf/result_all_idf_unisolated.conf b/src/sonic-bgpcfgd/tests/data/general/peer-group.conf/result_all_idf_unisolated.conf
new file mode 100644
index 000000000..075f97f5d
--- /dev/null
+++ b/src/sonic-bgpcfgd/tests/data/general/peer-group.conf/result_all_idf_unisolated.conf
@@ -0,0 +1,27 @@
+!
+! template: bgpd/templates/general/peer-group.conf.j2
+!
+  neighbor PEER_V4 peer-group
+  neighbor PEER_V6 peer-group
+  address-family ipv4
+    neighbor PEER_V4 allowas-in 1
+    neighbor PEER_V4 soft-reconfiguration inbound
+    neighbor PEER_V4 route-map FROM_BGP_PEER_V4 in
+    neighbor PEER_V4 route-map TO_BGP_PEER_V4 out
+  exit-address-family
+  address-family ipv6
+    neighbor PEER_V6 allowas-in 1
+    neighbor PEER_V6 soft-reconfiguration inbound
+    neighbor PEER_V6 route-map FROM_BGP_PEER_V6 in
+    neighbor PEER_V6 route-map TO_BGP_PEER_V6 out
+  exit-address-family
+!
+! end of template: bgpd/templates/general/peer-group.conf.j2
+!
+
+no route-map CHECK_IDF_ISOLATION permit 1
+no route-map CHECK_IDF_ISOLATION permit 2
+no route-map CHECK_IDF_ISOLATION permit 3
+no route-map CHECK_IDF_ISOLATION deny 4
+route-map CHECK_IDF_ISOLATION permit 10
+    no set community no-export additive
diff --git a/src/sonic-bgpcfgd/tests/data/general/peer-group.conf/result_idf_isolated.conf b/src/sonic-bgpcfgd/tests/data/general/peer-group.conf/result_idf_isolated.conf
new file mode 100644
index 000000000..838dd4e9c
--- /dev/null
+++ b/src/sonic-bgpcfgd/tests/data/general/peer-group.conf/result_idf_isolated.conf
@@ -0,0 +1,12 @@
+route-map CHECK_IDF_ISOLATION permit 1
+    match ip address prefix-list PL_LoopbackV4
+    set community 12345:12345
+route-map CHECK_IDF_ISOLATION permit 2
+    match ipv6 address prefix-list PL_LoopbackV6
+    set community 12345:12345
+route-map CHECK_IDF_ISOLATION permit 3
+    match tag 1001
+    set community 12345:12345
+route-map CHECK_IDF_ISOLATION permit 10
+        set community no-export additive
+    no route-map CHECK_IDF_ISOLATION deny 4
diff --git a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/idf_isolate/idf_isolated_no_export.conf b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/idf_isolate/idf_isolated_no_export.conf
new file mode 100644
index 000000000..fa269cd96
--- /dev/null
+++ b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/idf_isolate/idf_isolated_no_export.conf
@@ -0,0 +1,12 @@
+route-map CHECK_IDF_ISOLATION permit 1
+    match ip address prefix-list PL_LoopbackV4
+    set community 12345:555
+route-map CHECK_IDF_ISOLATION permit 2
+    match ipv6 address prefix-list PL_LoopbackV6
+    set community 12345:555
+route-map CHECK_IDF_ISOLATION permit 3
+    match tag 1002
+    set community 12345:555
+route-map CHECK_IDF_ISOLATION permit 10
+        set community no-export additive
+    no route-map CHECK_IDF_ISOLATION deny 4
\ No newline at end of file
diff --git a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/idf_isolate/idf_isolated_no_export.json b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/idf_isolate/idf_isolated_no_export.json
new file mode 100644
index 000000000..1c8f5191c
--- /dev/null
+++ b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/idf_isolate/idf_isolated_no_export.json
@@ -0,0 +1,9 @@
+{
+    "constants": {
+        "bgp": {
+            "traffic_shift_community": "12345:555",
+            "internal_community_match_tag": "1002"
+        }
+    },
+    "isolation_status": "isolated_no_export"
+}
\ No newline at end of file
diff --git a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/idf_isolate/idf_isolated_withdraw_all.conf b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/idf_isolate/idf_isolated_withdraw_all.conf
new file mode 100644
index 000000000..4cc312a72
--- /dev/null
+++ b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/idf_isolate/idf_isolated_withdraw_all.conf
@@ -0,0 +1,12 @@
+route-map CHECK_IDF_ISOLATION permit 1
+    match ip address prefix-list PL_LoopbackV4
+    set community 12345:555
+route-map CHECK_IDF_ISOLATION permit 2
+    match ipv6 address prefix-list PL_LoopbackV6
+    set community 12345:555
+route-map CHECK_IDF_ISOLATION permit 3
+    match tag 1002
+    set community 12345:555
+route-map CHECK_IDF_ISOLATION deny 4
+    route-map CHECK_IDF_ISOLATION permit 10
+        no set community no-export additive
\ No newline at end of file
diff --git a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/idf_isolate/idf_isolated_withdraw_all.json b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/idf_isolate/idf_isolated_withdraw_all.json
new file mode 100644
index 000000000..6e4dbc4f5
--- /dev/null
+++ b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/idf_isolate/idf_isolated_withdraw_all.json
@@ -0,0 +1,9 @@
+{
+    "constants": {
+        "bgp": {
+            "traffic_shift_community": "12345:555",
+            "internal_community_match_tag": "1002"
+        }
+    },
+    "isolation_status": "isolated_withdraw_all"
+}
\ No newline at end of file
diff --git a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/idf_isolate/idf_unisolated.conf b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/idf_isolate/idf_unisolated.conf
new file mode 100644
index 000000000..f9541f402
--- /dev/null
+++ b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/idf_isolate/idf_unisolated.conf
@@ -0,0 +1,6 @@
+no route-map CHECK_IDF_ISOLATION permit 1
+no route-map CHECK_IDF_ISOLATION permit 2
+no route-map CHECK_IDF_ISOLATION permit 3
+no route-map CHECK_IDF_ISOLATION deny 4
+route-map CHECK_IDF_ISOLATION permit 10
+    no set community no-export additive
\ No newline at end of file
diff --git a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/idf_isolate/idf_unisolated.json b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/idf_isolate/idf_unisolated.json
new file mode 100644
index 000000000..f11553e2d
--- /dev/null
+++ b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/idf_isolate/idf_unisolated.json
@@ -0,0 +1,9 @@
+{
+    "constants": {
+        "bgp": {
+            "traffic_shift_community": "12345:555",
+            "internal_community_match_tag": "1002"
+        }
+    },
+    "isolation_status": "unisolated"
+}
\ No newline at end of file
diff --git a/src/sonic-bgpcfgd/tests/test_device_global.py b/src/sonic-bgpcfgd/tests/test_device_global.py
index 396a72a23..12dd895f5 100644
--- a/src/sonic-bgpcfgd/tests/test_device_global.py
+++ b/src/sonic-bgpcfgd/tests/test_device_global.py
@@ -63,6 +63,31 @@ def test_isolate_device(mocked_log_info):
     mocked_log_info.assert_called_with("DeviceGlobalCfgMgr::Done")
     assert m.cfg_mgr.get_config() == get_string_from_file("/result_all_isolate.conf")
 
+@patch('bgpcfgd.managers_device_global.log_debug')
+def test_idf_isolation_no_export(mocked_log_info): 
+    m = constructor()
+    res = m.set_handler("STATE", {"idf_isolation_state": "isolated_no_export"})
+    assert res, "Expect True return value for set_handler"
+    mocked_log_info.assert_called_with("DeviceGlobalCfgMgr::Done")
+    assert m.cfg_mgr.get_config() == get_string_from_file("/result_all_idf_isolated_no_export.conf")
+
+@patch('bgpcfgd.managers_device_global.log_debug')
+def test_idf_isolation_withdraw_all(mocked_log_info): 
+    m = constructor()
+    res = m.set_handler("STATE", {"idf_isolation_state": "isolated_withdraw_all"})
+    assert res, "Expect True return value for set_handler"
+    mocked_log_info.assert_called_with("DeviceGlobalCfgMgr::Done")
+    assert m.cfg_mgr.get_config() == get_string_from_file("/result_all_idf_isolated_withdraw_all.conf")
+
+@patch('bgpcfgd.managers_device_global.log_debug')
+def test_idf_unisolation(mocked_log_info): 
+    m = constructor()
+    m.directory.put(m.db_name, m.table_name, "idf_isolation_state", "isolated_no_export")
+    res = m.set_handler("STATE", {"idf_isolation_state": "unisolated"})
+    assert res, "Expect True return value for set_handler"
+    mocked_log_info.assert_called_with("DeviceGlobalCfgMgr::Done")
+    assert m.cfg_mgr.get_config() == get_string_from_file("/result_all_idf_unisolated.conf")
+
 @patch('bgpcfgd.managers_device_global.log_debug')
 def test_isolate_device_internal_session(mocked_log_info):
     m = constructor(check_internal=True)
@@ -75,6 +100,7 @@ def test_isolate_device_internal_session(mocked_log_info):
 @patch('bgpcfgd.managers_device_global.log_debug')
 def test_unisolate_device(mocked_log_info):
     m = constructor()
+    m.directory.put(m.db_name, m.table_name, "tsa_enabled", "true")
     res = m.set_handler("STATE", {"tsa_enabled": "false"})
     assert res, "Expect True return value for set_handler"
     mocked_log_info.assert_called_with("DeviceGlobalCfgMgr::Done")
@@ -83,6 +109,7 @@ def test_unisolate_device(mocked_log_info):
 @patch('bgpcfgd.managers_device_global.log_debug')
 def test_unisolate_device_internal_session(mocked_log_info):
     m = constructor(check_internal=True)
+    m.directory.put(m.db_name, m.table_name, "tsa_enabled", "true")    
     res = m.set_handler("STATE", {"tsa_enabled": "false"})
     assert res, "Expect True return value for set_handler"
     mocked_log_info.assert_called_with("DeviceGlobalCfgMgr::Done")
@@ -99,6 +126,16 @@ def test_check_state_and_get_tsa_routemaps():
     res = m.check_state_and_get_tsa_routemaps(m.cfg_mgr.get_config())
     assert res == ""
 
+def test_check_state_and_get_idf_isolation_routemaps():
+    m = constructor()
+    m.set_handler("STATE", {"idf_isolation_state": "isolated_no_export"})
+    res = m.check_state_and_get_idf_isolation_routemaps()
+    assert res == get_string_from_file("/result_idf_isolated.conf")
+
+    m.set_handler("STATE", {"idf_isolation_state": "unisolated"})
+    res = m.check_state_and_get_idf_isolation_routemaps()
+    assert res == ""
+
 def test_get_tsa_routemaps():
     m = constructor()
     assert m.get_ts_routemaps([], m.tsa_template) == ""
diff --git a/src/sonic-bgpcfgd/tests/test_sonic-cfggen.py b/src/sonic-bgpcfgd/tests/test_sonic-cfggen.py
index acbd3b53c..908c4d802 100644
--- a/src/sonic-bgpcfgd/tests/test_sonic-cfggen.py
+++ b/src/sonic-bgpcfgd/tests/test_sonic-cfggen.py
@@ -63,6 +63,24 @@ def test_bgpd_lo_ipv6_conf_base():
              "bgpd.main.conf.j2/base.json",
              "bgpd.main.conf.j2/base.conf")
 
+def test_idf_isolated_no_export():
+    run_test("IDF isolation with no export",
+             "bgpd/idf_isolate/idf_isolate.conf.j2",
+             "idf_isolate/idf_isolated_no_export.json",
+             "idf_isolate/idf_isolated_no_export.conf")
+
+def test_idf_isolated_withdraw_all():
+    run_test("IDF isolation withdraw all",
+             "bgpd/idf_isolate/idf_isolate.conf.j2",
+             "idf_isolate/idf_isolated_withdraw_all.json",
+             "idf_isolate/idf_isolated_withdraw_all.conf")
+
+def test_idf_unisolated():
+    run_test("IDF unisolated",
+             "bgpd/idf_isolate/idf_unisolate.conf.j2",
+             "idf_isolate/idf_unisolated.json",
+             "idf_isolate/idf_unisolated.conf")
+
 def test_tsa_isolate():
     run_test("tsa/bgpd.tsa.isolate.conf.j2",
              "bgpd/tsa/bgpd.tsa.isolate.conf.j2",

From 77349ab6d00182a3213281cfa710c6236be6cf6c Mon Sep 17 00:00:00 2001
From: Kebo Liu <kebol@nvidia.com>
Date: Fri, 31 May 2024 08:49:19 +0800
Subject: [PATCH 0678/1115] [Mellanox] upgrade MFT tool to 4.28.0-96 (#19139)

Upgrade MFT tool to 4.28.0-96
---
 platform/mellanox/mft.mk | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/platform/mellanox/mft.mk b/platform/mellanox/mft.mk
index 4dbdf07cf..61e43e582 100644
--- a/platform/mellanox/mft.mk
+++ b/platform/mellanox/mft.mk
@@ -1,5 +1,5 @@
 #
-# Copyright (c) 2016-2023 NVIDIA CORPORATION & AFFILIATES.
+# Copyright (c) 2016-2024 NVIDIA CORPORATION & AFFILIATES.
 # Apache-2.0
 #
 # Licensed under the Apache License, Version 2.0 (the "License");
@@ -16,8 +16,8 @@
 #
 # Mellanox SAI
 
-MFT_VERSION = 4.27.0
-MFT_REVISION = 83
+MFT_VERSION = 4.28.0
+MFT_REVISION = 96
 
 MLNX_MFT_INTERNAL_SOURCE_BASE_URL =
 

From 4aea944c148529a9e0115b9fb9fa3d2b78126019 Mon Sep 17 00:00:00 2001
From: Sudharsan Dhamal Gopalarathnam <sudharsand@nvidia.com>
Date: Thu, 30 May 2024 17:51:57 -0700
Subject: [PATCH 0679/1115] [Mellanox]Passing the installed kernel headers
 during SDK compilation (#19115)

Passing the last installed kernel headers during SDK compilation. Without this the SDK does uname -r which gives the kernel version of the host machine in the slave docker. But these kernel headers are not installed in the slave docker leading to compilation failure.
---
 platform/mellanox/sdk-src/wjh-libs/Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/platform/mellanox/sdk-src/wjh-libs/Makefile b/platform/mellanox/sdk-src/wjh-libs/Makefile
index d5af48b7c..5e5786bef 100644
--- a/platform/mellanox/sdk-src/wjh-libs/Makefile
+++ b/platform/mellanox/sdk-src/wjh-libs/Makefile
@@ -20,7 +20,7 @@ $(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% :
 		./autogen.sh
 	fi
 
-	debuild -b -us -uc -j$(SONIC_CONFIG_MAKE_JOBS)
+	debuild -e 'KVERSION=$(shell ls -t /lib/modules |head -1)' -b -us -uc -j$(SONIC_CONFIG_MAKE_JOBS)
 
 	popd
 

From 4b91ea8a0c39fdfce5e71bfff0062603c475e612 Mon Sep 17 00:00:00 2001
From: Konstantin Vasin <126960927+k-v1@users.noreply.github.com>
Date: Fri, 31 May 2024 03:57:29 +0300
Subject: [PATCH 0680/1115] [build] use eatmydata for sonic-slave-bookworm
 (#19077)

Use eatmydata to reduce build time of sonic-slave-bookworm docker image.

More info in #15857
---
 sonic-slave-bookworm/Dockerfile.j2 | 68 +++++++++++++++---------------
 1 file changed, 34 insertions(+), 34 deletions(-)

diff --git a/sonic-slave-bookworm/Dockerfile.j2 b/sonic-slave-bookworm/Dockerfile.j2
index fd9184218..a254d3fab 100644
--- a/sonic-slave-bookworm/Dockerfile.j2
+++ b/sonic-slave-bookworm/Dockerfile.j2
@@ -38,9 +38,9 @@ ARG PYTHON_CROSS_PLATFORM=linux_aarch64
 {%- endif %}
 
 RUN dpkg --add-architecture $arch
-RUN apt-get update
-RUN apt-get install -y crossbuild-essential-$arch
-RUN apt-get install -y gcc-$gcc_arch
+RUN apt-get update && apt-get install -y eatmydata
+RUN eatmydata apt-get install -y crossbuild-essential-$arch
+RUN eatmydata apt-get install -y gcc-$gcc_arch
 
 RUN apt-mark hold g++-$gcc_arch
 RUN apt-mark hold g++-10-$gcc_arch
@@ -57,10 +57,10 @@ ENV DEBIAN_FRONTEND=noninteractive
 COPY ["pip.conf", "/etc/pip.conf"]
 
 {%- if CROSS_BUILD_ENVIRON == "y" %}
-RUN apt-get install -y python3 python3-pip
-RUN apt-get install -y python3-minimal:$arch python3.11:$arch python3:$arch python3-dev:$arch python3-setuptools:$arch
-RUN apt-get download python3-distutils && dpkg --force-all -i python3-distutils*
-RUN apt-get download python3-pip && dpkg --force-all -i python3-pip*
+RUN eatmydata apt-get install -y python3 python3-pip
+RUN eatmydata apt-get install -y python3-minimal:$arch python3.11:$arch python3:$arch python3-dev:$arch python3-setuptools:$arch
+RUN apt-get download python3-distutils && eatmydata dpkg --force-all -i python3-distutils*
+RUN apt-get download python3-pip && eatmydata dpkg --force-all -i python3-pip*
 RUN which pip3 && pip3 install enum34
 RUN pip3 install virtualenv
 
@@ -70,10 +70,10 @@ RUN cd /python_virtualenv && python3 -m virtualenv --copies -p /usr/bin/python3
 
 RUN PATH=/python_virtualenv/env3/bin/:$PATH pip3 install setuptools==66.1.1 setuptools-scm==8.0.4 setuptools-scm-git-archive==1.4.1 wheel==0.38.4 fastentrypoints pytest pytest-cov pytest-runner==5.2 nose==1.3.7 mockredispy==2.9.3 mock==3.0.5 PyYAML==6.0.1 redis==3.5.3 pexpect==4.8.0 Pympler==0.8 parameterized natsort==6.2.1 MarkupSafe==2.0.1 Jinja2==3.0.3 click tabulate netaddr netifaces pyroute2 pyfakefs sphinx && ln -s /python_virtualenv/env3/bin/pytest /python_virtualenv/env3/bin/pytest-3
 
-RUN apt-get --fix-broken install -y
+RUN eatmydata apt-get --fix-broken install -y
 RUN LIBPYTHON3_DEPS="`apt-cache depends libpython3-dev:$arch |grep Depends|awk {'print \$2;'}|tr "\n" " "`" && apt-get install -y libpython2.7-dev:$arch $LIBPYTHON3_DEPS libxml2-dev:$arch libxslt-dev:$arch libssl-dev:$arch libz-dev:$arch
 
-RUN apt-get install -y swig libssl-dev
+RUN eatmydata apt-get install -y swig libssl-dev
 
 RUN PATH=/python_virtualenv/env3/bin/:$PATH python3 -m pip install pyang==2.4.0
 RUN PATH=/python_virtualenv/env3/bin/:$PATH python3 -m pip install pyangbind==0.8.2
@@ -81,7 +81,7 @@ RUN PATH=/python_virtualenv/env3/bin/:$PATH python3 -m pip uninstall -y enum34
 RUN PATH=/python_virtualenv/env3/bin/:$PATH pip3 install --force-reinstall --no-cache-dir coverage
 {%- endif %}
 
-RUN apt-get update && apt-get install -y \
+RUN apt-get update && apt-get install -y eatmydata && eatmydata apt-get install -y \
         apt-utils \
         default-jre-headless \
         openssh-server \
@@ -452,7 +452,7 @@ RUN apt-get update && apt-get install -y \
         libzip-dev
 
 {%- if CONFIGURED_ARCH != "arm64" and CONFIGURED_ARCH != "armhf" %}
-RUN apt-get update && apt-get install -y \
+RUN eatmydata apt-get install -y \
 # For p4 libraries
         libgrpc++-dev \
         libgrpc-dev \
@@ -482,14 +482,14 @@ RUN apt-get update && apt-get install -y \
 {%- if CROSS_BUILD_ENVIRON == "y" %}
 # Arm vs. amd64 versions conflict - remove amd64 packages
 RUN apt-get remove -y libnl-3-200
-RUN apt-get install -y libpcre3:$arch
+RUN eatmydata apt-get install -y libpcre3:$arch
 {%- endif %}
 
-RUN apt-get -y build-dep openssh
+RUN eatmydata apt-get -y build-dep openssh
 
 # Build fix for ARM64 and ARMHF /etc/debian_version
 {%- if CONFIGURED_ARCH == "armhf" or CONFIGURED_ARCH == "arm64" %}
-RUN apt upgrade -y base-files libc-bin=$(dpkg-query -W -f '${Version}' libc-bin)
+RUN eatmydata apt upgrade -y base-files libc-bin=$(dpkg-query -W -f '${Version}' libc-bin)
 {%- endif %}
 
 ## Config dpkg
@@ -502,21 +502,21 @@ RUN sudo augtool --autosave "set /files/etc/dpkg/dpkg.cfg/force-confold"
 
 {%- if CROSS_BUILD_ENVIRON != "y" %}
 # For linux build
-RUN apt-get -y build-dep linux
+RUN eatmydata apt-get -y build-dep linux
 {%- else %}
-RUN apt-get install -y kernel-wedge
+RUN eatmydata apt-get install -y kernel-wedge
 {%- endif %}
 
 # For gobgp and telemetry build
-RUN apt-get install -y golang
+RUN eatmydata apt-get install -y golang
 {%- if INCLUDE_FIPS == "y" %}
 RUN wget -O golang-go.deb 'https://sonicstorage.blob.core.windows.net/public/fips/bookworm/{{ FIPS_VERSION }}/{{ CONFIGURED_ARCH }}/golang-1.19-go_{{ FIPS_GOLANG_VERSION }}_{{ CONFIGURED_ARCH }}.deb' \
  && wget -O golang-src.deb 'https://sonicstorage.blob.core.windows.net/public/fips/bookworm/{{ FIPS_VERSION }}/{{ CONFIGURED_ARCH }}/golang-1.19-src_{{ FIPS_GOLANG_VERSION }}_all.deb' \
- && dpkg -i golang-go.deb golang-src.deb \
+ && eatmydata dpkg -i golang-go.deb golang-src.deb \
  && ln -sf /usr/lib/go-1.19 /usr/local/go \
  && rm golang-go.deb golang-src.deb
 {%- else %}
-RUN apt-get install -y golang-go \
+RUN eatmydata apt-get install -y golang-go \
  && ln -sf /usr/lib/go-1.19 /usr/local/go
 {%- endif %}
 
@@ -578,16 +578,16 @@ RUN pip3 install mmh3==2.5.1
 # For ptf-py3 0.10.0
 RUN pip3 install setuptools==66.1.1 setuptools-scm==8.0.4 setuptools-scm-git-archive==1.4.1
 
-RUN apt-get install -y xsltproc
+RUN eatmydata apt-get install -y xsltproc
 
 # Install dependencies for isc-dhcp-relay build
-RUN apt-get -y build-dep isc-dhcp
+RUN eatmydata apt-get -y build-dep isc-dhcp
 
 # Install vim
-RUN apt-get install -y vim
+RUN eatmydata apt-get install -y vim
 
 # Install rsyslog
-RUN apt-get install -y rsyslog
+RUN eatmydata apt-get install -y rsyslog
 
 {%- if CROSS_BUILD_ENVIRON == "y" %}
 RUN cd /usr/src/gtest && CXX=$CROSS_CXX CC=$CROSS_CC cmake . && make -C /usr/src/gtest
@@ -600,7 +600,7 @@ EXPOSE 22
 
 # Install docker engine 24 inside docker and enable experimental feature
 RUN apt-get update
-RUN apt-get install -y \
+RUN eatmydata apt-get install -y \
            apt-transport-https \
            ca-certificates \
            curl \
@@ -619,15 +619,15 @@ RUN add-apt-repository \
            $(lsb_release -cs) \
            stable"
 RUN apt-get update
-RUN apt-get install -y docker-ce=5:24.0.2-1~debian.12~bookworm docker-ce-cli=5:24.0.2-1~debian.12~bookworm containerd.io=1.6.21-1 docker-buildx-plugin=0.10.5-1~debian.12~bookworm docker-compose-plugin=2.18.1-1~debian.12~bookworm
+RUN eatmydata apt-get install -y docker-ce=5:24.0.2-1~debian.12~bookworm docker-ce-cli=5:24.0.2-1~debian.12~bookworm containerd.io=1.6.21-1 docker-buildx-plugin=0.10.5-1~debian.12~bookworm docker-compose-plugin=2.18.1-1~debian.12~bookworm
 RUN echo "DOCKER_OPTS=\"--experimental --storage-driver=vfs {{ DOCKER_EXTRA_OPTS }}\"" >> /etc/default/docker
 RUN update-alternatives --set iptables /usr/sbin/iptables-legacy
 
 # Install m2crypto package, needed by SWI tools
-RUN apt-get install python3-m2crypto
+RUN eatmydata apt-get install python3-m2crypto
 
 # Install libthrift package needed by saithrift
-RUN apt-get install  libthrift-0.17 \
+RUN eatmydata apt-get install  libthrift-0.17 \
         libthrift-dev \
         thrift-compiler\
         python3-thrift
@@ -638,12 +638,12 @@ RUN pip3 install git+https://github.com/aristanetworks/swi-tools.git@bead66bf261
 {% if CONFIGURED_ARCH != "amd64" -%}
 # Install node.js for azure pipeline
 RUN curl -sL https://deb.nodesource.com/setup_14.x | bash -
-RUN apt-get install -y nodejs
+RUN eatmydata apt-get install -y nodejs
 
 {%- if CROSS_BUILD_ENVIRON == "y" %}
-RUN apt-get install -y rsync dh-python
+RUN eatmydata apt-get install -y rsync dh-python
 
-RUN apt-get install -y \
+RUN eatmydata apt-get install -y \
         libelf-dev:$arch \
         libdw-dev:$arch \
         libbz2-dev:$arch \
@@ -715,20 +715,20 @@ RUN apt-get install -y \
         libboost-filesystem-dev:$arch \
         libboost-program-options-dev:$arch
 
-RUN apt-get download libgirepository1.0-dev:$arch && dpkg --force-all -i libgirepository1.0-dev*
+RUN apt-get download libgirepository1.0-dev:$arch && eatmydata dpkg --force-all -i libgirepository1.0-dev*
 RUN PATH=/python_virtualenv/env3/bin/:$PATH pip3 install pycairo
 
 # Install libpcsclite-dev for wpasupplicant using download because regular install removes amd64 python package
-RUN apt-get download libpcsclite1:$arch && dpkg --force-all -i libpcsclite1* && apt-get download libpcsclite-dev:$arch && dpkg --force-all -i libpcsclite-dev*
+RUN apt-get download libpcsclite1:$arch && eatmydata dpkg --force-all -i libpcsclite1* && apt-get download libpcsclite-dev:$arch && eatmydata dpkg --force-all -i libpcsclite-dev*
 # Install python3-dev for frr (/usr/bin/python3-config for $arch) using download because regular install removes amd64 python package
-RUN apt-get download python3.11-dev:$arch && apt-get download python3-dev:$arch && dpkg --force-all -i python3*-dev*
+RUN apt-get download python3.11-dev:$arch && apt-get download python3-dev:$arch && eatmydata dpkg --force-all -i python3*-dev*
 {% endif %}
 
 # Tell azure pipeline to use node.js in the docker
 LABEL "com.azure.dev.pipelines.agent.handler.node.path"="/usr/bin/node"
 {% endif -%}
 
-RUN apt install -y python-is-python3
+RUN eatmydata apt install -y python-is-python3
 
 # Install Bazel build system (amd64 and arm64 architectures are supported using this method)
 # TODO(PINS): Remove once pre-build Bazel binaries are available for armhf (armv7l)

From 8e5049069533b2ed5932c2589a0069eca65ae129 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Fri, 31 May 2024 08:58:43 +0800
Subject: [PATCH 0681/1115] [ci/build]: Upgrade SONiC package versions (#19014)

---
 .../build-sonic-slave-bookworm/versions-py3   |  1 -
 files/build/versions/default/versions-git     |  6 ++--
 files/build/versions/default/versions-mirror  | 30 +++++++++----------
 .../docker-platform-monitor/versions-py3      |  1 +
 .../versions-py3-all-arm64                    |  1 +
 .../versions-py3-all-armhf                    |  1 +
 .../sonic-slave-buster/versions-deb-buster    | 30 +++++++++----------
 .../versions/host-image/versions-deb-bookworm |  3 ++
 8 files changed, 39 insertions(+), 34 deletions(-)

diff --git a/files/build/versions/build/build-sonic-slave-bookworm/versions-py3 b/files/build/versions/build/build-sonic-slave-bookworm/versions-py3
index 322deae41..eb8e16615 100644
--- a/files/build/versions/build/build-sonic-slave-bookworm/versions-py3
+++ b/files/build/versions/build/build-sonic-slave-bookworm/versions-py3
@@ -25,7 +25,6 @@ paramiko==2.11.0
 pexpect==4.9.0
 prefixed==0.7.1
 prettyprinter==0.18.0
-psutil==5.9.8
 ptyprocess==0.7.0
 pycairo==1.26.0
 pycparser==2.22
diff --git a/files/build/versions/default/versions-git b/files/build/versions/default/versions-git
index 4c9e43ea6..db1e94a1a 100644
--- a/files/build/versions/default/versions-git
+++ b/files/build/versions/default/versions-git
@@ -4,8 +4,8 @@ https://github.com/CESNET/libyang.git==4c733412e7173219166be7053940326a92699765
 https://github.com/daveolson53/audisp-tacplus.git==559c9f22edd4f2dea0ecedffb3ad9502b12a75b6
 https://github.com/daveolson53/libnss-tacplus.git==19008ab68d9d504aa58eb34d5f564755a1613b8b
 https://github.com/dyninc/OpenBFDD.git==e35f43ad8d2b3f084e96a84c392528a90d05a287
-https://github.com/flashrom/flashrom.git==643ae4d1fcb9b3bda6f35e8ff6f5b71b1104f600
-https://github.com/FreeRADIUS/freeradius-server.git==66cf26be5e195b56c70288c98a3e62680ff38154
+https://github.com/flashrom/flashrom.git==85b977151b8f5717ad00b7b7204521a823ac1ad2
+https://github.com/FreeRADIUS/freeradius-server.git==3310bf65f2912231fcb1dc59b1624d6894e3ca2a
 https://github.com/FreeRADIUS/pam_radius.git==d802da75cbfc3062ae1b18d0bf26ac2a030ffdaa
 https://github.com/jeroennijhof/pam_tacplus.git==b839c440e33c36eced9dcbc287fcfe6237c4c4ce
 https://github.com/lguohan/gnxi.git==3adf8b97755b49947e465b5a14645f11e79fa0cd
@@ -17,6 +17,6 @@ https://github.com/sflow/host-sflow==6edc82d62a1cf0f7fb821587af67e5520624f50d
 https://github.com/sflow/sflowtool==c42c49cb80b927a4c02e54fc26430417f18f4833
 https://github.com/sonic-net/DASH.git==2cb918fbe22eee60296c7326af530bd25b23398f
 https://github.com/thom311/libnl==49f7822961f5bc6b18cd2a2d3f3b8d2ab0896d3f
-https://salsa.debian.org/kernel-team/initramfs-tools.git==15311e6282434f184fb306c38d415f2217239214
+https://salsa.debian.org/kernel-team/initramfs-tools.git==b7f5a3ceaa306212aa5c7810d5fc5faf82bc4ffe
 https://salsa.debian.org/sk-guest/monit.git==c9da7ebb1f35dfba17b50b5969a6e75e29cbec0d
 https://salsa.debian.org/ssh-team/openssh.git==d150d0d69246f55c711684078f47f999a4bfd6bc
diff --git a/files/build/versions/default/versions-mirror b/files/build/versions/default/versions-mirror
index 9e406ee2f..9ed36688b 100644
--- a/files/build/versions/default/versions-mirror
+++ b/files/build/versions/default/versions-mirror
@@ -1,24 +1,24 @@
 archive.ubuntu.com_ubuntu_dists_focal==2020-04-23T17:33:17Z
 archive.ubuntu.com_ubuntu_dists_focal-backports==2023-11-13T00:36:10Z
-archive.ubuntu.com_ubuntu_dists_focal-updates==2024-05-18T01:45:17Z
+archive.ubuntu.com_ubuntu_dists_focal-updates==2024-05-20T01:41:38Z
 deb.nodesource.com_node%5f14.x_dists_bookworm==2023-02-17T00:35:29Z
 deb.nodesource.com_node%5f14.x_dists_bullseye==2023-02-17T00:35:28Z
 deb.nodesource.com_node%5f14.x_dists_buster==2023-02-17T00:35:28Z
-debian==20240517T000625Z
-debian-security==20240517T000237Z
+debian==20240519T000308Z
+debian-security==20240519T000258Z
 download.docker.com_linux_debian_dists_bookworm==2024-05-16T12:25:40Z
 download.docker.com_linux_debian_dists_bullseye==2024-05-16T12:25:40Z
 download.docker.com_linux_debian_dists_buster==2024-05-16T12:25:40Z
-packages.trafficmanager.net_snapshot_debian-security_20240517T000237Z_dists_bookworm-security==2024-05-16T19:15:13Z
-packages.trafficmanager.net_snapshot_debian-security_20240517T000237Z_dists_bullseye-security==2024-05-16T19:15:12Z
-packages.trafficmanager.net_snapshot_debian-security_20240517T000237Z_dists_buster_updates==2024-05-16T19:15:12Z
-packages.trafficmanager.net_snapshot_debian_20240517T000625Z_dists_bookworm==2024-02-10T11:07:25Z
-packages.trafficmanager.net_snapshot_debian_20240517T000625Z_dists_bookworm-backports==2024-05-16T20:19:56Z
-packages.trafficmanager.net_snapshot_debian_20240517T000625Z_dists_bookworm-updates==2024-05-16T20:19:56Z
-packages.trafficmanager.net_snapshot_debian_20240517T000625Z_dists_bullseye==2024-02-10T12:40:37Z
-packages.trafficmanager.net_snapshot_debian_20240517T000625Z_dists_bullseye-backports==2024-05-16T20:19:56Z
-packages.trafficmanager.net_snapshot_debian_20240517T000625Z_dists_bullseye-updates==2024-05-16T20:19:56Z
-packages.trafficmanager.net_snapshot_debian_20240517T000625Z_dists_buster==2023-06-10T08:53:33Z
-packages.trafficmanager.net_snapshot_debian_20240517T000625Z_dists_buster-backports==2024-03-09T20:54:54Z
-packages.trafficmanager.net_snapshot_debian_20240517T000625Z_dists_buster-updates==2023-06-10T08:55:10Z
+packages.trafficmanager.net_snapshot_debian-security_20240519T000258Z_dists_bookworm-security==2024-05-17T18:44:06Z
+packages.trafficmanager.net_snapshot_debian-security_20240519T000258Z_dists_bullseye-security==2024-05-17T18:44:06Z
+packages.trafficmanager.net_snapshot_debian-security_20240519T000258Z_dists_buster_updates==2024-05-17T18:44:07Z
+packages.trafficmanager.net_snapshot_debian_20240519T000308Z_dists_bookworm==2024-02-10T11:07:25Z
+packages.trafficmanager.net_snapshot_debian_20240519T000308Z_dists_bookworm-backports==2024-05-18T20:11:44Z
+packages.trafficmanager.net_snapshot_debian_20240519T000308Z_dists_bookworm-updates==2024-05-18T20:11:44Z
+packages.trafficmanager.net_snapshot_debian_20240519T000308Z_dists_bullseye==2024-02-10T12:40:37Z
+packages.trafficmanager.net_snapshot_debian_20240519T000308Z_dists_bullseye-backports==2024-05-18T20:11:44Z
+packages.trafficmanager.net_snapshot_debian_20240519T000308Z_dists_bullseye-updates==2024-05-18T20:11:43Z
+packages.trafficmanager.net_snapshot_debian_20240519T000308Z_dists_buster==2023-06-10T08:53:33Z
+packages.trafficmanager.net_snapshot_debian_20240519T000308Z_dists_buster-backports==2024-03-09T20:54:54Z
+packages.trafficmanager.net_snapshot_debian_20240519T000308Z_dists_buster-updates==2023-06-10T08:55:10Z
 security.ubuntu.com_ubuntu_dists_focal-security==2024-05-15T17:54:08Z
diff --git a/files/build/versions/dockers/docker-platform-monitor/versions-py3 b/files/build/versions/dockers/docker-platform-monitor/versions-py3
index 88a9dfbe9..40dd5328c 100644
--- a/files/build/versions/dockers/docker-platform-monitor/versions-py3
+++ b/files/build/versions/dockers/docker-platform-monitor/versions-py3
@@ -9,6 +9,7 @@ jsonschema==2.6.0
 libpci==0.2
 netifaces==0.11.0
 protobuf==4.25.3
+psutil==5.9.8
 pyrsistent==0.18.1
 python-sdk-api==4.6.3064
 requests==2.31.0
diff --git a/files/build/versions/dockers/sonic-slave-bookworm/versions-py3-all-arm64 b/files/build/versions/dockers/sonic-slave-bookworm/versions-py3-all-arm64
index 9a6fae8cb..980b0b50f 100644
--- a/files/build/versions/dockers/sonic-slave-bookworm/versions-py3-all-arm64
+++ b/files/build/versions/dockers/sonic-slave-bookworm/versions-py3-all-arm64
@@ -1 +1,2 @@
 protobuf==4.25.3
+psutil==5.9.8
diff --git a/files/build/versions/dockers/sonic-slave-bookworm/versions-py3-all-armhf b/files/build/versions/dockers/sonic-slave-bookworm/versions-py3-all-armhf
index 9a6fae8cb..980b0b50f 100644
--- a/files/build/versions/dockers/sonic-slave-bookworm/versions-py3-all-armhf
+++ b/files/build/versions/dockers/sonic-slave-bookworm/versions-py3-all-armhf
@@ -1 +1,2 @@
 protobuf==4.25.3
+psutil==5.9.8
diff --git a/files/build/versions/dockers/sonic-slave-buster/versions-deb-buster b/files/build/versions/dockers/sonic-slave-buster/versions-deb-buster
index 202bd02c0..cb3a5da28 100644
--- a/files/build/versions/dockers/sonic-slave-buster/versions-deb-buster
+++ b/files/build/versions/dockers/sonic-slave-buster/versions-deb-buster
@@ -23,7 +23,7 @@ autopoint==0.19.8.1-9
 autotools-dev==20180224.1
 bash-completion==1:2.8-6
 bc==1.07.1-2+b1
-bind9-host==1:9.11.5.P4+dfsg-5.1+deb10u10
+bind9-host==1:9.11.5.P4+dfsg-5.1+deb10u11
 binfmt-support==2.2.0-2
 binutils==2.31.1-16
 binutils-aarch64-linux-gnu==2.31.1-16
@@ -86,7 +86,7 @@ distro-info-data==0.41+deb10u9
 dkms==2.6.1-4
 dmeventd==2:1.02.155-3
 dmsetup==2:1.02.155-3
-dnsutils==1:9.11.5.P4+dfsg-5.1+deb10u10
+dnsutils==1:9.11.5.P4+dfsg-5.1+deb10u11
 docbook==4.5-6
 docbook-dsssl==1.79-9.1
 docbook-to-man==1:2.0.0-42
@@ -287,8 +287,8 @@ libbabeltrace-dev==1.5.6-2+deb10u1
 libbabeltrace1==1.5.6-2+deb10u1
 libbatik-java==1.10-2+deb10u3
 libbdplus0==0.1.2-3
-libbind-export-dev==1:9.11.5.P4+dfsg-5.1+deb10u10
-libbind9-161==1:9.11.5.P4+dfsg-5.1+deb10u10
+libbind-export-dev==1:9.11.5.P4+dfsg-5.1+deb10u11
+libbind9-161==1:9.11.5.P4+dfsg-5.1+deb10u11
 libbinutils==2.31.1-16
 libbison-dev==2:3.3.2.dfsg-1
 libbit-vector-perl==7.4-1+b5
@@ -453,8 +453,8 @@ libdist-checkconflicts-perl==0.11-1
 libdistro-info-perl==0.21+deb10u1
 libdjvulibre-text==3.5.27.1-10+deb10u1
 libdjvulibre21==3.5.27.1-10+deb10u1
-libdns-export1104==1:9.11.5.P4+dfsg-5.1+deb10u10
-libdns1104==1:9.11.5.P4+dfsg-5.1+deb10u10
+libdns-export1104==1:9.11.5.P4+dfsg-5.1+deb10u11
+libdns1104==1:9.11.5.P4+dfsg-5.1+deb10u11
 libdom4j-java==2.1.1-2
 libdouble-conversion1==3.1.0-3
 libdoxia-core-java==1.7-2
@@ -676,14 +676,14 @@ libipc-system-simple-perl==1.25-4
 libipt2==2.0-2
 libiptc-dev==1.8.2-4
 libiptc0==1.8.2-4
-libirs-export161==1:9.11.5.P4+dfsg-5.1+deb10u10
-libirs161==1:9.11.5.P4+dfsg-5.1+deb10u10
-libisc-export1100==1:9.11.5.P4+dfsg-5.1+deb10u10
-libisc1100==1:9.11.5.P4+dfsg-5.1+deb10u10
-libisccc-export161==1:9.11.5.P4+dfsg-5.1+deb10u10
-libisccc161==1:9.11.5.P4+dfsg-5.1+deb10u10
-libisccfg-export163==1:9.11.5.P4+dfsg-5.1+deb10u10
-libisccfg163==1:9.11.5.P4+dfsg-5.1+deb10u10
+libirs-export161==1:9.11.5.P4+dfsg-5.1+deb10u11
+libirs161==1:9.11.5.P4+dfsg-5.1+deb10u11
+libisc-export1100==1:9.11.5.P4+dfsg-5.1+deb10u11
+libisc1100==1:9.11.5.P4+dfsg-5.1+deb10u11
+libisccc-export161==1:9.11.5.P4+dfsg-5.1+deb10u11
+libisccc161==1:9.11.5.P4+dfsg-5.1+deb10u11
+libisccfg-export163==1:9.11.5.P4+dfsg-5.1+deb10u11
+libisccfg163==1:9.11.5.P4+dfsg-5.1+deb10u11
 libisl19==0.20-2
 libitext1-java==1.4-7
 libitm1==8.3.0-6
@@ -763,7 +763,7 @@ liblua5.1-0-dev==5.1.5-8.1+b2
 liblvm2cmd2.03==2.03.02-3
 liblwp-mediatypes-perl==6.02-1
 liblwp-protocol-https-perl==6.07-2
-liblwres161==1:9.11.5.P4+dfsg-5.1+deb10u10
+liblwres161==1:9.11.5.P4+dfsg-5.1+deb10u11
 liblzma-dev==5.2.4-1+deb10u1
 liblzo2-2==2.10-0.1
 liblzo2-dev==2.10-0.1
diff --git a/files/build/versions/host-image/versions-deb-bookworm b/files/build/versions/host-image/versions-deb-bookworm
index 242ff4bb7..d5af0316f 100644
--- a/files/build/versions/host-image/versions-deb-bookworm
+++ b/files/build/versions/host-image/versions-deb-bookworm
@@ -42,6 +42,7 @@ eatmydata==130-2
 ebtables==2.0.11-5
 efibootmgr==17-2
 efitools==1.9.2-3
+ethtool==1:6.1-1
 fdisk==2.38.1-5+deb12u1
 file==1:5.44-3
 firmware-amd-graphics==20230210-5
@@ -315,6 +316,7 @@ pciutils==1:3.9.0-4
 perl==5.36.0-7+deb12u1
 perl-modules-5.36==5.36.0-7+deb12u1
 picocom==3.1-4
+pigz==2.6-1
 pkgconf==1.8.1-1
 procps==2:4.0.2-3
 psmisc==23.6-1
@@ -390,6 +392,7 @@ vim-runtime==2:9.0.1378-2
 wireless-regdb==2022.06.06-1
 x11-common==1:7.7+23
 xml-core==0.18+nmu1
+xmlstarlet==1.6.1-3
 xxd==2:9.0.1378-2
 xz-utils==5.4.1-0.2
 zlib1g-dev==1:1.2.13.dfsg-1

From e336741be0db25d011cc429067c2e9f2bb4f1a62 Mon Sep 17 00:00:00 2001
From: Guohan Lu <lguohan@gmail.com>
Date: Thu, 30 May 2024 19:59:48 -0700
Subject: [PATCH 0682/1115] [doc]: add build badge for nvidia bluefield
 (#19148)

Signed-off-by: Guohan Lu <lguohan@gmail.com>
---
 README.md | 11 +++++++----
 1 file changed, 7 insertions(+), 4 deletions(-)

diff --git a/README.md b/README.md
index ae76a8937..9ea169542 100644
--- a/README.md
+++ b/README.md
@@ -8,7 +8,9 @@
 [![Marvell(armhf)](https://dev.azure.com/mssonic/build/_apis/build/status/marvell/Azure.sonic-buildimage.official.marvell-armhf?branchName=master&label=Marvell-armhf)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=141&branchName=master)
 [![Marvell(arm64)](https://dev.azure.com/mssonic/build/_apis/build/status/marvell/Azure.sonic-buildimage.official.marvell-arm64?branchName=master&label=Marvell-arm64)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=999&branchName=master)
 [![Nephos](https://dev.azure.com/mssonic/build/_apis/build/status/nephos/Azure.sonic-buildimage.official.nephos?branchName=master&label=Nephos)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=149&branchName=master)
+[![Nvidia-Bluefield](https://dev.azure.com/mssonic/build/_apis/build/status/nvidia/Azure.sonic-buildimage.official.nvidia-bluefield?branchName=master&label=Nvidia-Bluefield)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=1665&branchName=master)
 [![Pensando](https://dev.azure.com/mssonic/build/_apis/build/status/pensando/Azure.sonic-buildimage.official.pensando?branchName=master&label=Pensando)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=1366&branchName=master)
+
 [![VS](https://dev.azure.com/mssonic/build/_apis/build/status/vs/Azure.sonic-buildimage.official.vs?branchName=master&label=VS)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=142&branchName=master)
 
 *202311 builds*:
@@ -99,6 +101,10 @@
 [![Nephos](https://dev.azure.com/mssonic/build/_apis/build/status/nephos/Azure.sonic-buildimage.official.nephos?branchName=201811&label=Nephos)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=149&branchName=201811)
 [![VS](https://dev.azure.com/mssonic/build/_apis/build/status/vs/Azure.sonic-buildimage.official.vs?branchName=201811&label=VS)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=142&branchName=201811)
 
+## SONiC Image Azure Pipelines
+
+All SONiC project build pipeline could be found at [Download Portal for SONiC Images](https://sonic-build.azurewebsites.net)
+
 # sonic-buildimage
 
 ## Build SONiC Switch Images
@@ -194,6 +200,7 @@ The supported ASIC vendors are:
 * PLATFORM=cavium
 * PLATFORM=centec
 * PLATFORM=nephos
+* PLATFORM=nvidia-bluefield
 * PLATFORM=innovium
 * PLATFORM=vs
 
@@ -362,10 +369,6 @@ on the SAI version for each SONiC release.
     [managing, configuring and monitoring SONiC](https://github.com/sonic-net/sonic-mgmt)
     (gzip tar archive)
 
-## SONiC Image Azure Pipelines
-
-All SONiC project build pipeline could be found at [Download Portal for SONiC Images](https://sonic-build.azurewebsites.net)
-
 ## Contribution Guide
 
 All contributors must sign a contribution license agreement before contributions

From 6e43f99135d3adf6bb35ae30029e87a13d1be913 Mon Sep 17 00:00:00 2001
From: Sai Kiran <110003254+opcoder0@users.noreply.github.com>
Date: Fri, 31 May 2024 16:07:13 +1000
Subject: [PATCH 0683/1115] [docker-ptf]: Fix issue with Py3 environment
 (#19138)

This PR fixes a bug in the docker-ptf Dockerfile when executed with SONIC_PTF_ENV_PY_VER=py3 option.

Why I did it
Without this fix the docker-ptf image pushes all the required py3 packages into a virtual environment and prevents it from starting up.

How I did it
Fixed the jinja condition to initialize virtualenv only for mixed case.

How to verify it
Build, load and run the docker image

Build with - make SONIC_PTF_ENV_PY_VER=py3 SONIC_BUILD_JOBS=4 BUILD_MULTIASIC_KVM=y INCLUDE_DHCP_SERVER=y target/docker-ptf.gz
Load and run the image - docker load -i target/docker-ptf.gz
Run with - docker run -it --entrypoint bash docker-ptf:latest
Verified the packages are installed properly.


* Fixes incorrect condition that makes Py3 packages go into a virtual
environment when docker-ptf is built with 'py3'. When package is built
with 'py3' the packages do not need to be in a virtualenv.
---
 dockers/docker-ptf/Dockerfile.j2 | 14 +++++++++++---
 1 file changed, 11 insertions(+), 3 deletions(-)

diff --git a/dockers/docker-ptf/Dockerfile.j2 b/dockers/docker-ptf/Dockerfile.j2
index d026b708b..95a7cb9ee 100644
--- a/dockers/docker-ptf/Dockerfile.j2
+++ b/dockers/docker-ptf/Dockerfile.j2
@@ -73,6 +73,7 @@ RUN apt-get update          \
         python3-six         \
         libpcap-dev         \
 # TODO check if tacacs+ is required by tests
+# tacacs+ has been dropped from bullseye
 {% if PTF_ENV_PY_VER == "mixed" %}
         tacacs+             \
 {% endif %}
@@ -90,6 +91,7 @@ RUN apt-get update          \
 
 {% if PTF_ENV_PY_VER == "py3" %}
 RUN update-alternatives --install /usr/bin/python python /usr/bin/python3 1 \
+    && update-alternatives --install /usr/bin/pip pip /usr/bin/pip3 1 \
     && update-alternatives --install /usr/bin/pdb pdb /usr/bin/pdb3 1 \
     && update-alternatives --install /usr/bin/pydoc pydoc /usr/bin/pydoc3 1 \
     && update-alternatives --install /usr/bin/pygettext pygettext /usr/bin/pygettext3 1
@@ -113,6 +115,10 @@ RUN rm -rf /debs \
     && python setup.py install \
     && cd .. \
     && rm -fr scapy-vxlan \
+{% else %}
+    && wget --https-only https://bootstrap.pypa.io/pip/get-pip.py \
+    && python get-pip.py \
+    && rm -f get-pip.py \
 {% endif %}
     && git clone https://github.com/sflow/sflowtool \
     && cd sflowtool \
@@ -160,19 +166,19 @@ RUN rm -rf /debs \
     && cd /opt             \
     && wget https://raw.githubusercontent.com/p4lang/ptf/master/ptf_nn/ptf_nn_agent.py
 
+{% if PTF_ENV_PY_VER == "mixed" %}
 RUN python3 -m venv --system-site-packages env-python3
-
 # Activating a virtualenv. The virtualenv automatically works for RUN, ENV and CMD.
 ENV VIRTUAL_ENV=/root/env-python3
 ARG BACKUP_OF_PATH="$PATH"
 ENV PATH="$VIRTUAL_ENV/bin:$PATH"
-
 ENV LANG=C.UTF-8 LC_ALL=C.UTF-8 PYTHONIOENCODING=UTF-8
+{% endif %}
 
 {% if PTF_ENV_PY_VER == "mixed" %}
 RUN python3 -m pip install --upgrade --ignore-installed pip
 {% else %}
-RUN pip install --upgrade --ignore-installed pip
+RUN pip3 install --upgrade --ignore-installed pip
 {% endif %}
 
 # Install all python modules from pypi. python3-scapy is exception, ptf debian package requires python3-scapy
@@ -212,8 +218,10 @@ RUN pip3 install setuptools \
 {{ install_python_wheels(docker_ptf_whls.split(' ')) }}
 {% endif %}
 
+{% if PTF_ENV_PY_VER == "mixed" %}
 # Deactivating a virtualenv.
 ENV PATH="$BACKUP_OF_PATH"
+{% endif %}
 
 ## Adjust sshd settings
 RUN mkdir /var/run/sshd \

From ebac764f1444e0b68aaee6f840c357833c9dee21 Mon Sep 17 00:00:00 2001
From: Philo <135693886+philo-micas@users.noreply.github.com>
Date: Fri, 31 May 2024 15:33:44 +0800
Subject: [PATCH 0684/1115] [Micas/Platform]platform support M2-W6510 (#15888)

Why I did it
Add new platform m2-w6510(Trident 3)
ASIC Vendor: Broadcom
Switch ASIC: Trident 3
Port Config: 48x25G+8x100G

How I did it
Provide device and platform related files.

How to verify it
show platform fan
show platform ssdhealth
show platform psustatus
show platform summary
show platform syseeprom
show platform temperature
show interface status
---
 .../M2-W6510-48V8C/hwsku.json                 |  172 +
 .../M2-W6510-48V8C/port_config.ini            |   57 +
 .../M2-W6510-48V8C/sai.profile                |    1 +
 ...d3-m2-w6510-48v8c-48x25G+8x100G.config.bcm |  605 ++++
 .../custom_led.bin                            |  Bin 0 -> 236 bytes
 .../default_sku                               |    1 +
 .../x86_64-micas_m2-w6510-48v8c-r0/dev.xml    |  420 +++
 .../dev_exhaust.xml                           |  420 +++
 .../x86_64-micas_m2-w6510-48v8c-r0/fru.py     |  961 ++++++
 .../x86_64-micas_m2-w6510-48v8c-r0/hwsku.json |  172 +
 .../installer.conf                            |    2 +
 .../led_proc_init.soc                         |    7 +
 .../media_settings.json                       | 2020 ++++++++++++
 .../x86_64-micas_m2-w6510-48v8c-r0/monitor.py |  402 +++
 .../x86_64-micas_m2-w6510-48v8c-r0/pcie.yaml  |  440 +++
 .../platform.json                             |  819 +++++
 .../platform_asic                             |    1 +
 .../platform_components.json                  |   16 +
 .../plugins/sfputil.py                        |  243 ++
 .../plugins/ssd_util.py                       |  318 ++
 .../pmon_daemon_control.json                  |    3 +
 .../system_health_monitoring_config.json      |    0
 platform/broadcom/one-image.mk                |    3 +-
 platform/broadcom/platform-modules-micas.dep  |    9 +
 platform/broadcom/platform-modules-micas.mk   |   10 +
 platform/broadcom/rules.dep                   |    1 +
 platform/broadcom/rules.mk                    |    1 +
 .../sonic-platform-modules-micas/LICENSE      |   14 +
 .../common/Makefile                           |   41 +
 .../common/app/Makefile                       |   25 +
 .../common/app/dev_util/Makefile              |   30 +
 .../common/app/dev_util/dfd_debug.c           |   43 +
 .../common/app/dev_util/dfd_utest.c           | 2121 +++++++++++++
 .../common/app/dev_util/dfd_utest.h           |  109 +
 .../common/app/fw_upgrade/Makefile            |   18 +
 .../common/app/fw_upgrade/Rules.mk            |   42 +
 .../common/app/fw_upgrade/fw_upgrade/Makefile |   39 +
 .../app/fw_upgrade/fw_upgrade/fw_upgrade.c    | 1632 ++++++++++
 .../fw_upgrade/fw_upgrade/fw_upgrade_debug.c  |   51 +
 .../fw_upgrade/include/fw_upgrade.h           |  230 ++
 .../fw_upgrade/include/fw_upgrade_debug.h     |   25 +
 .../common/lib/algorithm/__init__.py          |    0
 .../common/lib/algorithm/hysteresis.py        |  169 +
 .../common/lib/algorithm/openloop.py          |  110 +
 .../common/lib/algorithm/pid.py               |  109 +
 .../common/lib/eepromutil/__init__.py         |    0
 .../common/lib/eepromutil/cust_fru.py         |  135 +
 .../common/lib/eepromutil/fantlv.py           |  192 ++
 .../common/lib/eepromutil/fru.py              |  961 ++++++
 .../common/lib/eepromutil/onietlv.py          |  441 +++
 .../common/lib/plat_hal/__init__.py           |    0
 .../common/lib/plat_hal/baseutil.py           |  169 +
 .../common/lib/plat_hal/chassisbase.py        |  318 ++
 .../common/lib/plat_hal/component.py          |   33 +
 .../common/lib/plat_hal/cpld.py               |   66 +
 .../common/lib/plat_hal/cpu.py                |   48 +
 .../common/lib/plat_hal/dcdc.py               |   11 +
 .../common/lib/plat_hal/devicebase.py         |  351 +++
 .../common/lib/plat_hal/fan.py                |  417 +++
 .../common/lib/plat_hal/interface.py          | 1339 ++++++++
 .../common/lib/plat_hal/led.py                |   52 +
 .../common/lib/plat_hal/onie_e2.py            |  127 +
 .../common/lib/plat_hal/osutil.py             |  440 +++
 .../common/lib/plat_hal/psu.py                |  701 +++++
 .../common/lib/plat_hal/rotor.py              |  149 +
 .../common/lib/plat_hal/sensor.py             |  274 ++
 .../common/lib/plat_hal/temp.py               |  139 +
 .../common/lib/restful_util/__init__.py       |    0
 .../common/lib/restful_util/restful_api.py    |   89 +
 .../common/lib/wbutil/__init__.py             |    0
 .../common/lib/wbutil/baseutil.py             |   38 +
 .../common/lib/wbutil/smbus.py                |  772 +++++
 .../kernel_drivers_blacklist.conf             |    3 +
 .../common/modules/COPYING                    |   20 +
 .../common/modules/GPL-2.0                    |  359 +++
 .../common/modules/Makefile                   |   52 +
 .../common/modules/dfd_tlveeprom.c            |  516 +++
 .../common/modules/dfd_tlveeprom.h            |  121 +
 .../common/modules/fpga_i2c.h                 |  133 +
 .../common/modules/hw_test.c                  |  608 ++++
 .../common/modules/hw_test.h                  |   31 +
 .../common/modules/linux/Makefile             |   36 +
 .../common/modules/linux/wb_csu550.c          |  236 ++
 .../common/modules/linux/wb_i2c_algo_bit.c    |  725 +++++
 .../common/modules/linux/wb_i2c_gpio.c        |  431 +++
 .../common/modules/linux/wb_i2c_gpio_device.c |  133 +
 .../common/modules/linux/wb_i2c_i801.c        | 2114 +++++++++++++
 .../common/modules/linux/wb_i2c_ismt.c        | 1131 +++++++
 .../common/modules/linux/wb_i2c_mux_pca954x.c | 1387 ++++++++
 .../common/modules/linux/wb_i2c_mux_pca954x.h |   68 +
 .../common/modules/linux/wb_i2c_mux_pca9641.c | 1410 +++++++++
 .../common/modules/linux/wb_i2c_mux_pca9641.h |   64 +
 .../common/modules/linux/wb_ina3221.c         | 1031 ++++++
 .../common/modules/linux/wb_isl68137.c        |  577 ++++
 .../common/modules/linux/wb_lm75.c            |  992 ++++++
 .../common/modules/linux/wb_lm75.h            |   40 +
 .../common/modules/linux/wb_pmbus.h           |  535 ++++
 .../common/modules/linux/wb_pmbus_core.c      | 2780 +++++++++++++++++
 .../common/modules/linux/wb_tmp401.c          | 1010 ++++++
 .../common/modules/linux/wb_tps53622.c        |  265 ++
 .../common/modules/linux/wb_ucd9000.c         |  720 +++++
 .../common/modules/linux/wb_xdpe12284.c       |  499 +++
 .../modules/linux/wb_xdpe132g5c_pmbus.c       |  512 +++
 .../common/modules/pinctrl/Makefile           |   17 +
 .../common/modules/pinctrl/core.h             |  249 ++
 .../common/modules/pinctrl/wb_gpio_c3000.c    |  452 +++
 .../modules/pinctrl/wb_gpio_c3000_device.c    |   69 +
 .../common/modules/pinctrl/wb_pinctrl_intel.c | 1829 +++++++++++
 .../common/modules/pinctrl/wb_pinctrl_intel.h |  275 ++
 .../common/modules/plat_sysfs/Makefile        |   20 +
 .../modules/plat_sysfs/dev_cfg/Makefile       |   25 +
 .../modules/plat_sysfs/dev_cfg/cfg/dfd_cfg.c  |  815 +++++
 .../plat_sysfs/dev_cfg/cfg/dfd_cfg_adapter.c  |  358 +++
 .../plat_sysfs/dev_cfg/cfg/dfd_cfg_file.c     |  236 ++
 .../plat_sysfs/dev_cfg/cfg/dfd_cfg_info.c     |  776 +++++
 .../plat_sysfs/dev_cfg/cfg/dfd_cfg_listnode.c |   82 +
 .../plat_sysfs/dev_cfg/dfd_fan_driver.c       |  201 ++
 .../modules/plat_sysfs/dev_cfg/dfd_module.c   |   95 +
 .../plat_sysfs/dev_cfg/dfd_psu_driver.c       |   70 +
 .../plat_sysfs/dev_cfg/dfd_sensors_driver.c   |  149 +
 .../plat_sysfs/dev_cfg/dfd_sff_driver.c       |   56 +
 .../plat_sysfs/dev_cfg/dfd_slot_driver.c      |   27 +
 .../plat_sysfs/dev_cfg/include/dfd_cfg.h      |   99 +
 .../dev_cfg/include/dfd_cfg_adapter.h         |   46 +
 .../plat_sysfs/dev_cfg/include/dfd_cfg_file.h |   37 +
 .../plat_sysfs/dev_cfg/include/dfd_cfg_info.h |  119 +
 .../dev_cfg/include/dfd_cfg_listnode.h        |   30 +
 .../dev_cfg/include/dfd_fan_driver.h          |   18 +
 .../plat_sysfs/dev_cfg/include/dfd_module.h   |   96 +
 .../dev_cfg/include/dfd_psu_driver.h          |   10 +
 .../dev_cfg/include/dfd_sensors_driver.h      |   10 +
 .../dev_cfg/include/dfd_sff_driver.h          |    8 +
 .../dev_cfg/include/dfd_slot_driver.h         |    6 +
 .../modules/plat_sysfs/dev_sysfs/Makefile     |   21 +
 .../dev_sysfs/include/plat_switch.h           |   86 +
 .../dev_sysfs/include/sysfs_common.h          |   90 +
 .../modules/plat_sysfs/dev_sysfs/plat_fan.c   |  501 +++
 .../modules/plat_sysfs/dev_sysfs/plat_psu.c   |  426 +++
 .../plat_sysfs/dev_sysfs/plat_sensor.c        |  452 +++
 .../modules/plat_sysfs/dev_sysfs/plat_sff.c   |  287 ++
 .../modules/plat_sysfs/dev_sysfs/plat_slot.c  |  663 ++++
 .../plat_sysfs/dev_sysfs/plat_switch.c        |  130 +
 .../common/modules/platform_common.h          |   74 +
 .../common/modules/platform_common_module.c   |  210 ++
 .../common/modules/wb_fpga_i2c_bus_drv.c      | 1135 +++++++
 .../common/modules/wb_fpga_pca954x_drv.c      |  542 ++++
 .../common/modules/wb_fpga_pcie.c             |  169 +
 .../common/modules/wb_gpio_d1500.c            |  367 +++
 .../common/modules/wb_gpio_device.c           |   54 +
 .../common/modules/wb_i2c_dev.c               |  843 +++++
 .../common/modules/wb_i2c_dev.h               |   20 +
 .../common/modules/wb_i2c_ocores.c            | 1179 +++++++
 .../common/modules/wb_i2c_ocores.h            |   30 +
 .../common/modules/wb_io_dev.c                |  598 ++++
 .../common/modules/wb_io_dev.h                |   21 +
 .../common/modules/wb_lpc_drv.c               |  166 +
 .../common/modules/wb_lpc_drv.h               |   18 +
 .../common/modules/wb_mac_bsc.c               |  867 +++++
 .../common/modules/wb_mdio_gpio_device.c      |  110 +
 .../common/modules/wb_pcie_dev.c              |  819 +++++
 .../common/modules/wb_pcie_dev.h              |   28 +
 .../common/modules/wb_platform_i2c_dev.c      |  749 +++++
 .../common/modules/wb_platform_i2c_dev.h      |   19 +
 .../common/modules/wb_spi_dev.c               |  711 +++++
 .../common/modules/wb_spi_dev.h               |   17 +
 .../common/modules/wb_spi_gpio_device.c       |  163 +
 .../common/modules/wb_spi_ocores.c            | 1039 ++++++
 .../common/modules/wb_spi_ocores.h            |   21 +
 .../common/modules/wb_uio_irq.c               |  282 ++
 .../common/modules/wb_wdt.c                   | 1202 +++++++
 .../common/modules/wb_wdt.h                   |   53 +
 .../common/modules/wb_xdpe132g5c.c            |  579 ++++
 .../common/script/auto_update.py              |  196 ++
 .../common/script/avscontrol.py               |  203 ++
 .../common/script/dev_monitor.py              |  303 ++
 .../common/script/drv_update.py               |  152 +
 .../common/script/generate_airflow.py         |  254 ++
 .../common/script/hal_fanctrl.py              | 1190 +++++++
 .../common/script/hal_ledctrl.py              |  830 +++++
 .../common/script/hal_pltfm.py                |  492 +++
 .../common/script/intelligent_monitor.py      |  144 +
 .../script/intelligent_monitor/monitor_fan.py |  285 ++
 .../common/script/platform_common.py          |  186 ++
 .../common/script/platform_config.py          |  192 ++
 .../common/script/platform_driver.py          |  258 ++
 .../common/script/platform_e2.py              |  444 +++
 .../common/script/platform_intf.py            |  389 +++
 .../common/script/platform_ipmi.py            |   92 +
 .../common/script/platform_manufacturer.py    |  562 ++++
 .../common/script/platform_process.py         |  413 +++
 .../common/script/platform_sensors.py         |  283 ++
 .../common/script/platform_test.py            |  142 +
 .../common/script/platform_util.py            |  838 +++++
 .../common/script/pmon_syslog.py              |  519 +++
 .../common/script/reboot_cause.py             |  183 ++
 .../common/script/reboot_ctrl.py              |  150 +
 .../common/script/sensors                     |    8 +
 .../common/script/set_eth_mac.py              |  274 ++
 .../common/script/sfp_highest_temperatue.py   |  148 +
 .../common/script/slot_monitor.py             |  253 ++
 .../common/script/ssdmon                      |   82 +
 .../common/script/subnetwork.py               |   59 +
 .../common/script/tty_console.py              |   91 +
 .../common/script/upgrade.py                  |  991 ++++++
 .../common/script/warm_upgrade.py             |  514 +++
 .../common/service/platform_driver.service    |   15 +
 .../common/service/platform_process.service   |   16 +
 .../common/service/subnetwork.service         |   13 +
 .../common/sonic_platform/__init__.py         |    2 +
 .../common/sonic_platform/chassis.py          |  530 ++++
 .../common/sonic_platform/component.py        |  226 ++
 .../common/sonic_platform/dcdc.py             |   85 +
 .../common/sonic_platform/eeprom.py           |   92 +
 .../common/sonic_platform/fan.py              |  310 ++
 .../common/sonic_platform/fan_drawer.py       |  167 +
 .../common/sonic_platform/pcie.py             |   21 +
 .../common/sonic_platform/platform.py         |   24 +
 .../common/sonic_platform/psu.py              |  388 +++
 .../common/sonic_platform/sfp.py              |  634 ++++
 .../common/sonic_platform/thermal.py          |  234 ++
 .../common/sonic_platform/watchdog.py         |  236 ++
 .../debian/changelog                          |    5 +
 .../debian/compat                             |    1 +
 .../debian/control                            |    9 +
 .../debian/copyright                          |   15 +
 ...tform-modules-micas-m2-w6510-48v8c.install |    1 +
 ...form-modules-micas-m2-w6510-48v8c.postinst |   10 +
 .../debian/rule.mk                            |    5 +
 .../sonic-platform-modules-micas/debian/rules |   98 +
 .../m2-w6510-48v8c/Makefile                   |   25 +
 .../x86_64_micas_m2_w6510_48v8c_r0_config.py  | 1106 +++++++
 ..._64_micas_m2_w6510_48v8c_r0_port_config.py |    7 +
 .../x86_64_micas_m2_w6510_48v8c_r0_device.py  | 1371 ++++++++
 ..._micas_m2_w6510_48v8c_r0_exhaust_device.py | 1371 ++++++++
 .../x86_64_micas_m2_w6510_48v8c_r0_monitor.py |  206 ++
 .../m2-w6510-48v8c/modules/driver/Makefile    |   12 +
 .../modules/driver/wb_i2c_dev_device.c        |  140 +
 .../driver/wb_i2c_mux_pca954x_device.c        |  296 ++
 .../modules/driver/wb_i2c_ocores_device.c     |  423 +++
 .../modules/driver/wb_io_dev_device.c         |  103 +
 .../modules/driver/wb_lpc_drv_device.c        |  130 +
 .../modules/driver/wb_pcie_dev_device.c       |   93 +
 .../plat_sysfs_cfg/WB_PLAT_CPLD.cfg           |   41 +
 .../plat_sysfs_cfg/WB_PLAT_FAN.cfg            |  304 ++
 .../plat_sysfs_cfg/WB_PLAT_PSU.cfg            |   64 +
 .../plat_sysfs_cfg/WB_PLAT_SFF.cfg            |  521 +++
 .../plat_sysfs_cfg/cfg_file_name              |    4 +
 .../m2-w6510-48v8c/setup.py                   |   39 +
 src/sonic-device-data/tests/permitted_list    |    4 +
 249 files changed, 79250 insertions(+), 1 deletion(-)
 create mode 100644 device/micas/x86_64-micas_m2-w6510-48v8c-r0/M2-W6510-48V8C/hwsku.json
 create mode 100755 device/micas/x86_64-micas_m2-w6510-48v8c-r0/M2-W6510-48V8C/port_config.ini
 create mode 100755 device/micas/x86_64-micas_m2-w6510-48v8c-r0/M2-W6510-48V8C/sai.profile
 create mode 100644 device/micas/x86_64-micas_m2-w6510-48v8c-r0/M2-W6510-48V8C/td3-m2-w6510-48v8c-48x25G+8x100G.config.bcm
 create mode 100644 device/micas/x86_64-micas_m2-w6510-48v8c-r0/custom_led.bin
 create mode 100644 device/micas/x86_64-micas_m2-w6510-48v8c-r0/default_sku
 create mode 100644 device/micas/x86_64-micas_m2-w6510-48v8c-r0/dev.xml
 create mode 100644 device/micas/x86_64-micas_m2-w6510-48v8c-r0/dev_exhaust.xml
 create mode 100644 device/micas/x86_64-micas_m2-w6510-48v8c-r0/fru.py
 create mode 100644 device/micas/x86_64-micas_m2-w6510-48v8c-r0/hwsku.json
 create mode 100644 device/micas/x86_64-micas_m2-w6510-48v8c-r0/installer.conf
 create mode 100755 device/micas/x86_64-micas_m2-w6510-48v8c-r0/led_proc_init.soc
 create mode 100644 device/micas/x86_64-micas_m2-w6510-48v8c-r0/media_settings.json
 create mode 100644 device/micas/x86_64-micas_m2-w6510-48v8c-r0/monitor.py
 create mode 100644 device/micas/x86_64-micas_m2-w6510-48v8c-r0/pcie.yaml
 create mode 100644 device/micas/x86_64-micas_m2-w6510-48v8c-r0/platform.json
 create mode 100644 device/micas/x86_64-micas_m2-w6510-48v8c-r0/platform_asic
 create mode 100644 device/micas/x86_64-micas_m2-w6510-48v8c-r0/platform_components.json
 create mode 100644 device/micas/x86_64-micas_m2-w6510-48v8c-r0/plugins/sfputil.py
 create mode 100755 device/micas/x86_64-micas_m2-w6510-48v8c-r0/plugins/ssd_util.py
 create mode 100644 device/micas/x86_64-micas_m2-w6510-48v8c-r0/pmon_daemon_control.json
 create mode 100755 device/micas/x86_64-micas_m2-w6510-48v8c-r0/system_health_monitoring_config.json
 create mode 100644 platform/broadcom/platform-modules-micas.dep
 create mode 100644 platform/broadcom/platform-modules-micas.mk
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/LICENSE
 create mode 100755 platform/broadcom/sonic-platform-modules-micas/common/Makefile
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/app/Makefile
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/app/dev_util/Makefile
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/app/dev_util/dfd_debug.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/app/dev_util/dfd_utest.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/app/dev_util/dfd_utest.h
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/app/fw_upgrade/Makefile
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/app/fw_upgrade/Rules.mk
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/app/fw_upgrade/fw_upgrade/Makefile
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/app/fw_upgrade/fw_upgrade/fw_upgrade.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/app/fw_upgrade/fw_upgrade/fw_upgrade_debug.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/app/fw_upgrade/fw_upgrade/include/fw_upgrade.h
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/app/fw_upgrade/fw_upgrade/include/fw_upgrade_debug.h
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/lib/algorithm/__init__.py
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/lib/algorithm/hysteresis.py
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/lib/algorithm/openloop.py
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/lib/algorithm/pid.py
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/lib/eepromutil/__init__.py
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/lib/eepromutil/cust_fru.py
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/lib/eepromutil/fantlv.py
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/lib/eepromutil/fru.py
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/lib/eepromutil/onietlv.py
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/__init__.py
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/baseutil.py
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/chassisbase.py
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/component.py
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/cpld.py
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/cpu.py
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/dcdc.py
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/devicebase.py
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/fan.py
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/interface.py
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/led.py
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/onie_e2.py
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/osutil.py
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/psu.py
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/rotor.py
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/sensor.py
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/temp.py
 create mode 100755 platform/broadcom/sonic-platform-modules-micas/common/lib/restful_util/__init__.py
 create mode 100755 platform/broadcom/sonic-platform-modules-micas/common/lib/restful_util/restful_api.py
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/lib/wbutil/__init__.py
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/lib/wbutil/baseutil.py
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/lib/wbutil/smbus.py
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modprobe_conf/kernel_drivers_blacklist.conf
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/COPYING
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/GPL-2.0
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/Makefile
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/dfd_tlveeprom.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/dfd_tlveeprom.h
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/fpga_i2c.h
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/hw_test.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/hw_test.h
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/linux/Makefile
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_csu550.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_algo_bit.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_gpio.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_gpio_device.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_i801.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_ismt.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_mux_pca954x.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_mux_pca954x.h
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_mux_pca9641.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_mux_pca9641.h
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_ina3221.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_isl68137.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_lm75.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_lm75.h
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_pmbus.h
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_pmbus_core.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_tmp401.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_tps53622.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_ucd9000.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_xdpe12284.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_xdpe132g5c_pmbus.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/pinctrl/Makefile
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/pinctrl/core.h
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/pinctrl/wb_gpio_c3000.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/pinctrl/wb_gpio_c3000_device.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/pinctrl/wb_pinctrl_intel.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/pinctrl/wb_pinctrl_intel.h
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/Makefile
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/Makefile
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 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/cfg/dfd_cfg_adapter.c
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 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/dfd_fan_driver.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/dfd_module.c
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 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/dfd_slot_driver.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_cfg.h
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_cfg_adapter.h
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 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_fan_driver.h
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 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_psu_driver.h
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 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_sff_driver.h
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_slot_driver.h
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/Makefile
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/include/plat_switch.h
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 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/plat_fan.c
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 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/plat_sensor.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/plat_sff.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/plat_slot.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/plat_switch.c
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 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/platform_common_module.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/wb_fpga_i2c_bus_drv.c
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 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/wb_fpga_pcie.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/wb_gpio_d1500.c
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 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_dev.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_dev.h
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_ocores.c
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 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/wb_io_dev.c
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 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/wb_lpc_drv.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/wb_lpc_drv.h
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/wb_mac_bsc.c
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 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/wb_pcie_dev.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/wb_pcie_dev.h
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/wb_platform_i2c_dev.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/wb_platform_i2c_dev.h
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spi_dev.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spi_dev.h
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spi_gpio_device.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spi_ocores.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spi_ocores.h
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/wb_uio_irq.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/wb_wdt.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/wb_wdt.h
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/wb_xdpe132g5c.c
 create mode 100755 platform/broadcom/sonic-platform-modules-micas/common/script/auto_update.py
 create mode 100755 platform/broadcom/sonic-platform-modules-micas/common/script/avscontrol.py
 create mode 100755 platform/broadcom/sonic-platform-modules-micas/common/script/dev_monitor.py
 create mode 100755 platform/broadcom/sonic-platform-modules-micas/common/script/drv_update.py
 create mode 100755 platform/broadcom/sonic-platform-modules-micas/common/script/generate_airflow.py
 create mode 100755 platform/broadcom/sonic-platform-modules-micas/common/script/hal_fanctrl.py
 create mode 100755 platform/broadcom/sonic-platform-modules-micas/common/script/hal_ledctrl.py
 create mode 100755 platform/broadcom/sonic-platform-modules-micas/common/script/hal_pltfm.py
 create mode 100755 platform/broadcom/sonic-platform-modules-micas/common/script/intelligent_monitor.py
 create mode 100755 platform/broadcom/sonic-platform-modules-micas/common/script/intelligent_monitor/monitor_fan.py
 create mode 100755 platform/broadcom/sonic-platform-modules-micas/common/script/platform_common.py
 create mode 100755 platform/broadcom/sonic-platform-modules-micas/common/script/platform_config.py
 create mode 100755 platform/broadcom/sonic-platform-modules-micas/common/script/platform_driver.py
 create mode 100755 platform/broadcom/sonic-platform-modules-micas/common/script/platform_e2.py
 create mode 100755 platform/broadcom/sonic-platform-modules-micas/common/script/platform_intf.py
 create mode 100755 platform/broadcom/sonic-platform-modules-micas/common/script/platform_ipmi.py
 create mode 100755 platform/broadcom/sonic-platform-modules-micas/common/script/platform_manufacturer.py
 create mode 100755 platform/broadcom/sonic-platform-modules-micas/common/script/platform_process.py
 create mode 100755 platform/broadcom/sonic-platform-modules-micas/common/script/platform_sensors.py
 create mode 100755 platform/broadcom/sonic-platform-modules-micas/common/script/platform_test.py
 create mode 100755 platform/broadcom/sonic-platform-modules-micas/common/script/platform_util.py
 create mode 100755 platform/broadcom/sonic-platform-modules-micas/common/script/pmon_syslog.py
 create mode 100755 platform/broadcom/sonic-platform-modules-micas/common/script/reboot_cause.py
 create mode 100755 platform/broadcom/sonic-platform-modules-micas/common/script/reboot_ctrl.py
 create mode 100755 platform/broadcom/sonic-platform-modules-micas/common/script/sensors
 create mode 100755 platform/broadcom/sonic-platform-modules-micas/common/script/set_eth_mac.py
 create mode 100755 platform/broadcom/sonic-platform-modules-micas/common/script/sfp_highest_temperatue.py
 create mode 100755 platform/broadcom/sonic-platform-modules-micas/common/script/slot_monitor.py
 create mode 100755 platform/broadcom/sonic-platform-modules-micas/common/script/ssdmon
 create mode 100755 platform/broadcom/sonic-platform-modules-micas/common/script/subnetwork.py
 create mode 100755 platform/broadcom/sonic-platform-modules-micas/common/script/tty_console.py
 create mode 100755 platform/broadcom/sonic-platform-modules-micas/common/script/upgrade.py
 create mode 100755 platform/broadcom/sonic-platform-modules-micas/common/script/warm_upgrade.py
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/service/platform_driver.service
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/service/platform_process.service
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/service/subnetwork.service
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/__init__.py
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/chassis.py
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/component.py
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/dcdc.py
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/eeprom.py
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/fan.py
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/fan_drawer.py
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/pcie.py
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/platform.py
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/psu.py
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/sfp.py
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/thermal.py
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/watchdog.py
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/debian/changelog
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/debian/compat
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/debian/control
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/debian/copyright
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6510-48v8c.install
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6510-48v8c.postinst
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/debian/rule.mk
 create mode 100755 platform/broadcom/sonic-platform-modules-micas/debian/rules
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/Makefile
 create mode 100755 platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/config/x86_64_micas_m2_w6510_48v8c_r0_config.py
 create mode 100755 platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/config/x86_64_micas_m2_w6510_48v8c_r0_port_config.py
 create mode 100755 platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/hal-config/x86_64_micas_m2_w6510_48v8c_r0_device.py
 create mode 100755 platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/hal-config/x86_64_micas_m2_w6510_48v8c_r0_exhaust_device.py
 create mode 100755 platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/hal-config/x86_64_micas_m2_w6510_48v8c_r0_monitor.py
 create mode 100755 platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/modules/driver/Makefile
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/modules/driver/wb_i2c_dev_device.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/modules/driver/wb_i2c_mux_pca954x_device.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/modules/driver/wb_i2c_ocores_device.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/modules/driver/wb_io_dev_device.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/modules/driver/wb_lpc_drv_device.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/modules/driver/wb_pcie_dev_device.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/plat_sysfs_cfg/WB_PLAT_CPLD.cfg
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/plat_sysfs_cfg/WB_PLAT_FAN.cfg
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/plat_sysfs_cfg/WB_PLAT_PSU.cfg
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/plat_sysfs_cfg/WB_PLAT_SFF.cfg
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/plat_sysfs_cfg/cfg_file_name
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/setup.py

diff --git a/device/micas/x86_64-micas_m2-w6510-48v8c-r0/M2-W6510-48V8C/hwsku.json b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/M2-W6510-48V8C/hwsku.json
new file mode 100644
index 000000000..9a5a4d2b6
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/M2-W6510-48V8C/hwsku.json
@@ -0,0 +1,172 @@
+{
+	"interfaces": {
+			"Ethernet1": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet2": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet3": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet4": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet5": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet6": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet7": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet8": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet9": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet10": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet11": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet12": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet13": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet14": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet15": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet16": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet17": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet18": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet19": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet20": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet21": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet22": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet23": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet24": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet25": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet26": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet27": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet28": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet29": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet30": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet31": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet32": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet33": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet34": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet35": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet36": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet37": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet38": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet39": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet40": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet41": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet42": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet43": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet44": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet45": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet46": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet47": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet48": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet49": {
+				"default_brkout_mode": "1x100G"
+			},
+			"Ethernet53": {
+				"default_brkout_mode": "1x100G"
+			},
+			"Ethernet57": {
+				"default_brkout_mode": "1x100G"
+			},
+			"Ethernet61": {
+				"default_brkout_mode": "1x100G"
+			},
+			"Ethernet65": {
+				"default_brkout_mode": "1x100G"
+			},
+			"Ethernet69": {
+				"default_brkout_mode": "1x100G"
+			},
+			"Ethernet73": {
+				"default_brkout_mode": "1x100G"
+			},
+			"Ethernet77": {
+				"default_brkout_mode": "1x100G"
+			}
+	}
+}
\ No newline at end of file
diff --git a/device/micas/x86_64-micas_m2-w6510-48v8c-r0/M2-W6510-48V8C/port_config.ini b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/M2-W6510-48V8C/port_config.ini
new file mode 100755
index 000000000..57d6132aa
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/M2-W6510-48V8C/port_config.ini
@@ -0,0 +1,57 @@
+# name           lanes                alias                  index      speed        admin_status
+Ethernet1        57                   twentyfiveGigE0/1      1          25000        up
+Ethernet2        58                   twentyfiveGigE0/2      2          25000        up
+Ethernet3        59                   twentyfiveGigE0/3      3          25000        up
+Ethernet4        60                   twentyfiveGigE0/4      4          25000        up
+Ethernet5        61                   twentyfiveGigE0/5      5          25000        up
+Ethernet6        62                   twentyfiveGigE0/6      6          25000        up
+Ethernet7        63                   twentyfiveGigE0/7      7          25000        up
+Ethernet8        64                   twentyfiveGigE0/8      8          25000        up
+Ethernet9        1                    twentyfiveGigE0/9      9          25000        up
+Ethernet10       2                    twentyfiveGigE0/10     10         25000        up
+Ethernet11       3                    twentyfiveGigE0/11     11         25000        up
+Ethernet12       4                    twentyfiveGigE0/12     12         25000        up
+Ethernet13       5                    twentyfiveGigE0/13     13         25000        up
+Ethernet14       6                    twentyfiveGigE0/14     14         25000        up
+Ethernet15       7                    twentyfiveGigE0/15     15         25000        up
+Ethernet16       8                    twentyfiveGigE0/16     16         25000        up
+Ethernet17       13                   twentyfiveGigE0/17     17         25000        up
+Ethernet18       14                   twentyfiveGigE0/18     18         25000        up
+Ethernet19       15                   twentyfiveGigE0/19     19         25000        up
+Ethernet20       16                   twentyfiveGigE0/20     20         25000        up
+Ethernet21       21                   twentyfiveGigE0/21     21         25000        up
+Ethernet22       22                   twentyfiveGigE0/22     22         25000        up
+Ethernet23       23                   twentyfiveGigE0/23     23         25000        up
+Ethernet24       24                   twentyfiveGigE0/24     24         25000        up
+Ethernet25       29                   twentyfiveGigE0/25     25         25000        up
+Ethernet26       30                   twentyfiveGigE0/26     26         25000        up
+Ethernet27       31                   twentyfiveGigE0/27     27         25000        up
+Ethernet28       32                   twentyfiveGigE0/28     28         25000        up
+Ethernet29       33                   twentyfiveGigE0/29     29         25000        up
+Ethernet30       34                   twentyfiveGigE0/30     30         25000        up
+Ethernet31       35                   twentyfiveGigE0/31     31         25000        up
+Ethernet32       36                   twentyfiveGigE0/32     32         25000        up
+Ethernet33       41                   twentyfiveGigE0/33     33         25000        up
+Ethernet34       42                   twentyfiveGigE0/34     34         25000        up
+Ethernet35       43                   twentyfiveGigE0/35     35         25000        up
+Ethernet36       44                   twentyfiveGigE0/36     36         25000        up
+Ethernet37       49                   twentyfiveGigE0/37     37         25000        up
+Ethernet38       50                   twentyfiveGigE0/38     38         25000        up
+Ethernet39       51                   twentyfiveGigE0/39     39         25000        up
+Ethernet40       52                   twentyfiveGigE0/40     40         25000        up
+Ethernet41       65                   twentyfiveGigE0/41     41         25000        up
+Ethernet42       66                   twentyfiveGigE0/42     42         25000        up
+Ethernet43       67                   twentyfiveGigE0/43     43         25000        up
+Ethernet44       68                   twentyfiveGigE0/44     44         25000        up
+Ethernet45       69                   twentyfiveGigE0/45     45         25000        up
+Ethernet46       70                   twentyfiveGigE0/46     46         25000        up
+Ethernet47       71                   twentyfiveGigE0/47     47         25000        up
+Ethernet48       72                   twentyfiveGigE0/48     48         25000        up
+Ethernet49       85,86,87,88          hundredGigE0/1         49         100000       up
+Ethernet53       77,78,79,80          hundredGigE0/2         50         100000       up
+Ethernet57       97,98,99,100         hundredGigE0/3         51         100000       up
+Ethernet61       93,94,95,96          hundredGigE0/4         52         100000       up
+Ethernet65       113,114,115,116      hundredGigE0/5         53         100000       up
+Ethernet69       105,106,107,108      hundredGigE0/6         54         100000       up
+Ethernet73       121,122,123,124      hundredGigE0/7         55         100000       up
+Ethernet77       125,126,127,128      hundredGigE0/8         56         100000       up
diff --git a/device/micas/x86_64-micas_m2-w6510-48v8c-r0/M2-W6510-48V8C/sai.profile b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/M2-W6510-48V8C/sai.profile
new file mode 100755
index 000000000..9dffa1046
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/M2-W6510-48V8C/sai.profile
@@ -0,0 +1 @@
+SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td3-m2-w6510-48v8c-48x25G+8x100G.config.bcm
diff --git a/device/micas/x86_64-micas_m2-w6510-48v8c-r0/M2-W6510-48V8C/td3-m2-w6510-48v8c-48x25G+8x100G.config.bcm b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/M2-W6510-48V8C/td3-m2-w6510-48v8c-48x25G+8x100G.config.bcm
new file mode 100644
index 000000000..559a49f4c
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/M2-W6510-48V8C/td3-m2-w6510-48v8c-48x25G+8x100G.config.bcm
@@ -0,0 +1,605 @@
+cancun_dir=/usr/share/sonic/platform/cancun/sdk_6.5.16/
+l2_mem_entries=32768
+l3_mem_entries=16384
+l3_alpm_enable=2
+ipv6_lpm_128b_enable=0x1
+l2xmsg_mode=0
+l3_max_ecmp_mode=1
+svi_my_station_optimization=1
+sai_nbr_bcast_ifp_optimized=2
+sai_stats_support_mask=0x1
+bcm_num_cos=8
+bcm_stat_interval=2000000
+cdma_timeout_usec=3000000
+core_clock_frequency=1525
+dpp_clock_ratio=2:3
+help_cli_enable=1
+ifp_inports_support_enable=1
+#lpm_scaling_enable=1
+max_vp_lags=0
+mem_cache_enable=0
+memlist_enable=1
+miim_intr_enable=0
+module_64ports=1
+oversubscribe_mode=1
+oversubscribe_mixed_sister_25_50_enable=1
+parity_enable=1
+parity_correction=1
+pbmp_gport_stack.0=0x0000000000000000000000000000000000000000000000000000000000000000
+#pbmp_xport_xe.0=0x00000000000000000000000000000000888ffffffffffff9fffffffffffffffe
+pbmp_xport_xe=0xffffffffffffffffffffffffffffffffffffffffe
+port_flex_enable=1
+phy_chain_tx_lane_map_physical{57.0}=0x0123
+phy_chain_tx_lane_map_physical{61.0}=0x0123
+phy_chain_tx_lane_map_physical{1.0}=0x0123
+phy_chain_tx_lane_map_physical{5.0}=0x0123
+phy_chain_tx_lane_map_physical{13.0}=0x0123
+phy_chain_tx_lane_map_physical{21.0}=0x0123
+phy_chain_tx_lane_map_physical{29.0}=0x0123
+phy_chain_tx_lane_map_physical{33.0}=0x0123
+phy_chain_tx_lane_map_physical{41.0}=0x0123
+phy_chain_tx_lane_map_physical{49.0}=0x0123
+phy_chain_tx_lane_map_physical{65.0}=0x3210
+phy_chain_tx_lane_map_physical{69.0}=0x3210
+phy_chain_tx_lane_map_physical{85.0}=0x3210
+phy_chain_tx_lane_map_physical{77.0}=0x0213
+phy_chain_tx_lane_map_physical{97.0}=0x3210
+phy_chain_tx_lane_map_physical{93.0}=0x0213
+phy_chain_tx_lane_map_physical{113.0}=0x3210
+phy_chain_tx_lane_map_physical{105.0}=0x0213
+phy_chain_tx_lane_map_physical{121.0}=0x3120
+phy_chain_tx_lane_map_physical{125.0}=0x1203
+
+phy_chain_rx_lane_map_physical{57.0}=0x1032
+phy_chain_rx_lane_map_physical{61.0}=0x1032
+phy_chain_rx_lane_map_physical{1.0}=0x1032
+phy_chain_rx_lane_map_physical{5.0}=0x1032
+phy_chain_rx_lane_map_physical{13.0}=0x1032
+phy_chain_rx_lane_map_physical{21.0}=0x1032
+phy_chain_rx_lane_map_physical{29.0}=0x1032
+phy_chain_rx_lane_map_physical{33.0}=0x1032
+phy_chain_rx_lane_map_physical{41.0}=0x1032
+phy_chain_rx_lane_map_physical{49.0}=0x1032
+phy_chain_rx_lane_map_physical{65.0}=0x2301
+phy_chain_rx_lane_map_physical{69.0}=0x2301
+phy_chain_rx_lane_map_physical{85.0}=0x1032
+phy_chain_rx_lane_map_physical{77.0}=0x1032
+phy_chain_rx_lane_map_physical{97.0}=0x1032
+phy_chain_rx_lane_map_physical{93.0}=0x1032
+phy_chain_rx_lane_map_physical{113.0}=0x1032
+phy_chain_rx_lane_map_physical{105.0}=0x1032
+phy_chain_rx_lane_map_physical{121.0}=0x2031
+phy_chain_rx_lane_map_physical{125.0}=0x1023
+
+portmap_57=57:25
+portmap_58=58:25
+portmap_59=59:25
+portmap_60=60:25
+portmap_61=61:25
+portmap_62=62:25
+portmap_63=63:25
+portmap_64=64:25
+portmap_1=1:25
+portmap_2=2:25
+portmap_3=3:25
+portmap_4=4:25
+portmap_5=5:25
+portmap_6=6:25
+portmap_7=7:25
+portmap_8=8:25
+portmap_13=13:25
+portmap_14=14:25
+portmap_15=15:25
+portmap_16=16:25
+portmap_21=21:25
+portmap_22=22:25
+portmap_23=23:25
+portmap_24=24:25
+portmap_29=29:25
+portmap_30=30:25
+portmap_31=31:25
+portmap_32=32:25
+portmap_33=33:25
+portmap_34=34:25
+portmap_35=35:25
+portmap_36=36:25
+portmap_41=41:25
+portmap_42=42:25
+portmap_43=43:25
+portmap_44=44:25
+portmap_49=49:25
+portmap_50=50:25
+portmap_51=51:25
+portmap_52=52:25
+portmap_67=65:25
+portmap_68=66:25
+portmap_69=67:25
+portmap_70=68:25
+portmap_71=69:25
+portmap_72=70:25
+portmap_73=71:25
+portmap_74=72:25
+portmap_87=85:100
+portmap_79=77:100
+portmap_99=97:100
+portmap_95=93:100
+portmap_115=113:100
+portmap_107=105:100
+portmap_123=121:100
+portmap_127=125:100
+
+dport_map_port_57=1
+dport_map_port_58=2
+dport_map_port_59=3
+dport_map_port_60=4
+dport_map_port_61=5
+dport_map_port_62=6
+dport_map_port_63=7
+dport_map_port_64=8
+dport_map_port_1=9
+dport_map_port_2=10
+dport_map_port_3=11
+dport_map_port_4=12
+dport_map_port_5=13
+dport_map_port_6=14
+dport_map_port_7=15
+dport_map_port_8=16
+dport_map_port_13=17
+dport_map_port_14=18
+dport_map_port_15=19
+dport_map_port_16=20
+dport_map_port_21=21
+dport_map_port_22=22
+dport_map_port_23=23
+dport_map_port_24=24
+dport_map_port_29=25
+dport_map_port_30=26
+dport_map_port_31=27
+dport_map_port_32=28
+dport_map_port_33=29
+dport_map_port_34=30
+dport_map_port_35=31
+dport_map_port_36=32
+dport_map_port_41=33
+dport_map_port_42=34
+dport_map_port_43=35
+dport_map_port_44=36
+dport_map_port_49=37
+dport_map_port_50=38
+dport_map_port_51=39
+dport_map_port_52=40
+dport_map_port_67=41
+dport_map_port_68=42
+dport_map_port_69=43
+dport_map_port_70=44
+dport_map_port_71=45
+dport_map_port_72=46
+dport_map_port_73=47
+dport_map_port_74=48
+dport_map_port_87=49
+dport_map_port_79=50
+dport_map_port_99=51
+dport_map_port_95=52
+dport_map_port_115=53
+dport_map_port_107=54
+dport_map_port_123=55
+dport_map_port_127=56
+
+phy_chain_tx_polarity_flip_physical{57.0}=0x1
+phy_chain_tx_polarity_flip_physical{58.0}=0x0
+phy_chain_tx_polarity_flip_physical{59.0}=0x1
+phy_chain_tx_polarity_flip_physical{60.0}=0x0
+phy_chain_tx_polarity_flip_physical{61.0}=0x1
+phy_chain_tx_polarity_flip_physical{62.0}=0x0
+phy_chain_tx_polarity_flip_physical{63.0}=0x1
+phy_chain_tx_polarity_flip_physical{64.0}=0x0
+phy_chain_tx_polarity_flip_physical{1.0}=0x0
+phy_chain_tx_polarity_flip_physical{2.0}=0x0
+phy_chain_tx_polarity_flip_physical{3.0}=0x0
+phy_chain_tx_polarity_flip_physical{4.0}=0x0
+phy_chain_tx_polarity_flip_physical{5.0}=0x0
+phy_chain_tx_polarity_flip_physical{6.0}=0x0
+phy_chain_tx_polarity_flip_physical{7.0}=0x0
+phy_chain_tx_polarity_flip_physical{8.0}=0x0
+phy_chain_tx_polarity_flip_physical{13.0}=0x0
+phy_chain_tx_polarity_flip_physical{14.0}=0x0
+phy_chain_tx_polarity_flip_physical{15.0}=0x0
+phy_chain_tx_polarity_flip_physical{16.0}=0x0
+phy_chain_tx_polarity_flip_physical{21.0}=0x0
+phy_chain_tx_polarity_flip_physical{22.0}=0x0
+phy_chain_tx_polarity_flip_physical{23.0}=0x0
+phy_chain_tx_polarity_flip_physical{24.0}=0x0
+phy_chain_tx_polarity_flip_physical{29.0}=0x0
+phy_chain_tx_polarity_flip_physical{30.0}=0x0
+phy_chain_tx_polarity_flip_physical{31.0}=0x0
+phy_chain_tx_polarity_flip_physical{32.0}=0x0
+phy_chain_tx_polarity_flip_physical{33.0}=0x0
+phy_chain_tx_polarity_flip_physical{34.0}=0x0
+phy_chain_tx_polarity_flip_physical{35.0}=0x0
+phy_chain_tx_polarity_flip_physical{36.0}=0x0
+phy_chain_tx_polarity_flip_physical{41.0}=0x0
+phy_chain_tx_polarity_flip_physical{42.0}=0x0
+phy_chain_tx_polarity_flip_physical{43.0}=0x0
+phy_chain_tx_polarity_flip_physical{44.0}=0x0
+phy_chain_tx_polarity_flip_physical{49.0}=0x0
+phy_chain_tx_polarity_flip_physical{50.0}=0x0
+phy_chain_tx_polarity_flip_physical{51.0}=0x0
+phy_chain_tx_polarity_flip_physical{52.0}=0x0
+phy_chain_tx_polarity_flip_physical{65.0}=0x0
+phy_chain_tx_polarity_flip_physical{66.0}=0x0
+phy_chain_tx_polarity_flip_physical{67.0}=0x0
+phy_chain_tx_polarity_flip_physical{68.0}=0x0
+phy_chain_tx_polarity_flip_physical{69.0}=0x0
+phy_chain_tx_polarity_flip_physical{70.0}=0x0
+phy_chain_tx_polarity_flip_physical{71.0}=0x0
+phy_chain_tx_polarity_flip_physical{72.0}=0x0
+phy_chain_tx_polarity_flip_physical{85.0}=0x0
+phy_chain_tx_polarity_flip_physical{86.0}=0x0
+phy_chain_tx_polarity_flip_physical{87.0}=0x1
+phy_chain_tx_polarity_flip_physical{88.0}=0x0
+phy_chain_tx_polarity_flip_physical{77.0}=0x1
+phy_chain_tx_polarity_flip_physical{78.0}=0x0
+phy_chain_tx_polarity_flip_physical{79.0}=0x1
+phy_chain_tx_polarity_flip_physical{80.0}=0x0
+phy_chain_tx_polarity_flip_physical{97.0}=0x0
+phy_chain_tx_polarity_flip_physical{98.0}=0x0
+phy_chain_tx_polarity_flip_physical{99.0}=0x1
+phy_chain_tx_polarity_flip_physical{100.0}=0x0
+phy_chain_tx_polarity_flip_physical{93.0}=0x0
+phy_chain_tx_polarity_flip_physical{94.0}=0x1
+phy_chain_tx_polarity_flip_physical{95.0}=0x1
+phy_chain_tx_polarity_flip_physical{96.0}=0x0
+phy_chain_tx_polarity_flip_physical{113.0}=0x0
+phy_chain_tx_polarity_flip_physical{114.0}=0x0
+phy_chain_tx_polarity_flip_physical{115.0}=0x1
+phy_chain_tx_polarity_flip_physical{116.0}=0x0
+phy_chain_tx_polarity_flip_physical{105.0}=0x0
+phy_chain_tx_polarity_flip_physical{106.0}=0x1
+phy_chain_tx_polarity_flip_physical{107.0}=0x1
+phy_chain_tx_polarity_flip_physical{108.0}=0x0
+phy_chain_tx_polarity_flip_physical{121.0}=0x1
+phy_chain_tx_polarity_flip_physical{122.0}=0x0
+phy_chain_tx_polarity_flip_physical{123.0}=0x1
+phy_chain_tx_polarity_flip_physical{124.0}=0x0
+phy_chain_tx_polarity_flip_physical{125.0}=0x1
+phy_chain_tx_polarity_flip_physical{126.0}=0x0
+phy_chain_tx_polarity_flip_physical{127.0}=0x1
+phy_chain_tx_polarity_flip_physical{128.0}=0x1
+
+phy_chain_rx_polarity_flip_physical{57.0}=0x0
+phy_chain_rx_polarity_flip_physical{58.0}=0x0
+phy_chain_rx_polarity_flip_physical{59.0}=0x0
+phy_chain_rx_polarity_flip_physical{60.0}=0x0
+phy_chain_rx_polarity_flip_physical{61.0}=0x1
+phy_chain_rx_polarity_flip_physical{62.0}=0x1
+phy_chain_rx_polarity_flip_physical{63.0}=0x1
+phy_chain_rx_polarity_flip_physical{64.0}=0x1
+phy_chain_rx_polarity_flip_physical{1.0}=0x1
+phy_chain_rx_polarity_flip_physical{2.0}=0x1
+phy_chain_rx_polarity_flip_physical{3.0}=0x1
+phy_chain_rx_polarity_flip_physical{4.0}=0x1
+phy_chain_rx_polarity_flip_physical{5.0}=0x0
+phy_chain_rx_polarity_flip_physical{6.0}=0x0
+phy_chain_rx_polarity_flip_physical{7.0}=0x0
+phy_chain_rx_polarity_flip_physical{8.0}=0x0
+phy_chain_rx_polarity_flip_physical{13.0}=0x0
+phy_chain_rx_polarity_flip_physical{14.0}=0x0
+phy_chain_rx_polarity_flip_physical{15.0}=0x0
+phy_chain_rx_polarity_flip_physical{16.0}=0x0
+phy_chain_rx_polarity_flip_physical{21.0}=0x0
+phy_chain_rx_polarity_flip_physical{22.0}=0x0
+phy_chain_rx_polarity_flip_physical{23.0}=0x0
+phy_chain_rx_polarity_flip_physical{24.0}=0x0
+phy_chain_rx_polarity_flip_physical{29.0}=0x0
+phy_chain_rx_polarity_flip_physical{30.0}=0x1
+phy_chain_rx_polarity_flip_physical{31.0}=0x0
+phy_chain_rx_polarity_flip_physical{32.0}=0x0
+phy_chain_rx_polarity_flip_physical{33.0}=0x1
+phy_chain_rx_polarity_flip_physical{34.0}=0x1
+phy_chain_rx_polarity_flip_physical{35.0}=0x1
+phy_chain_rx_polarity_flip_physical{36.0}=0x1
+phy_chain_rx_polarity_flip_physical{41.0}=0x1
+phy_chain_rx_polarity_flip_physical{42.0}=0x1
+phy_chain_rx_polarity_flip_physical{43.0}=0x1
+phy_chain_rx_polarity_flip_physical{44.0}=0x1
+phy_chain_rx_polarity_flip_physical{49.0}=0x1
+phy_chain_rx_polarity_flip_physical{50.0}=0x1
+phy_chain_rx_polarity_flip_physical{51.0}=0x1
+phy_chain_rx_polarity_flip_physical{52.0}=0x1
+phy_chain_rx_polarity_flip_physical{65.0}=0x1
+phy_chain_rx_polarity_flip_physical{66.0}=0x1
+phy_chain_rx_polarity_flip_physical{67.0}=0x1
+phy_chain_rx_polarity_flip_physical{68.0}=0x1
+phy_chain_rx_polarity_flip_physical{69.0}=0x0
+phy_chain_rx_polarity_flip_physical{70.0}=0x0
+phy_chain_rx_polarity_flip_physical{71.0}=0x0
+phy_chain_rx_polarity_flip_physical{72.0}=0x0
+phy_chain_rx_polarity_flip_physical{85.0}=0x1
+phy_chain_rx_polarity_flip_physical{86.0}=0x1
+phy_chain_rx_polarity_flip_physical{87.0}=0x1
+phy_chain_rx_polarity_flip_physical{88.0}=0x1
+phy_chain_rx_polarity_flip_physical{77.0}=0x0
+phy_chain_rx_polarity_flip_physical{78.0}=0x0
+phy_chain_rx_polarity_flip_physical{79.0}=0x0
+phy_chain_rx_polarity_flip_physical{80.0}=0x0
+phy_chain_rx_polarity_flip_physical{97.0}=0x0
+phy_chain_rx_polarity_flip_physical{98.0}=0x0
+phy_chain_rx_polarity_flip_physical{99.0}=0x0
+phy_chain_rx_polarity_flip_physical{100.0}=0x0
+phy_chain_rx_polarity_flip_physical{93.0}=0x0
+phy_chain_rx_polarity_flip_physical{94.0}=0x0
+phy_chain_rx_polarity_flip_physical{95.0}=0x0
+phy_chain_rx_polarity_flip_physical{96.0}=0x0
+phy_chain_rx_polarity_flip_physical{113.0}=0x1
+phy_chain_rx_polarity_flip_physical{114.0}=0x1
+phy_chain_rx_polarity_flip_physical{115.0}=0x1
+phy_chain_rx_polarity_flip_physical{116.0}=0x1
+phy_chain_rx_polarity_flip_physical{105.0}=0x0
+phy_chain_rx_polarity_flip_physical{106.0}=0x0
+phy_chain_rx_polarity_flip_physical{107.0}=0x0
+phy_chain_rx_polarity_flip_physical{108.0}=0x0
+phy_chain_rx_polarity_flip_physical{121.0}=0x1
+phy_chain_rx_polarity_flip_physical{122.0}=0x1
+phy_chain_rx_polarity_flip_physical{123.0}=0x0
+phy_chain_rx_polarity_flip_physical{124.0}=0x1
+phy_chain_rx_polarity_flip_physical{125.0}=0x1
+phy_chain_rx_polarity_flip_physical{126.0}=0x0
+phy_chain_rx_polarity_flip_physical{127.0}=0x0
+phy_chain_rx_polarity_flip_physical{128.0}=0x0
+
+serdes_preemphasis_lane0_57=0x0f480d
+serdes_preemphasis_lane1_57=0x0f480d
+serdes_preemphasis_lane2_57=0x0f480d
+serdes_preemphasis_lane3_57=0x0f480d
+serdes_preemphasis_lane0_58=0x0f480d
+serdes_preemphasis_lane1_58=0x0f480d
+serdes_preemphasis_lane2_58=0x0f480d
+serdes_preemphasis_lane3_58=0x0f480d
+serdes_preemphasis_lane0_59=0x0f480d
+serdes_preemphasis_lane1_59=0x0f480d
+serdes_preemphasis_lane2_59=0x0f480d
+serdes_preemphasis_lane3_59=0x0f480d
+serdes_preemphasis_lane0_60=0x0f480d
+serdes_preemphasis_lane1_60=0x0f480d
+serdes_preemphasis_lane2_60=0x0f480d
+serdes_preemphasis_lane3_60=0x0f480d
+serdes_preemphasis_lane0_61=0x0f480d
+serdes_preemphasis_lane1_61=0x0f480d
+serdes_preemphasis_lane2_61=0x0f480d
+serdes_preemphasis_lane3_61=0x0f480d
+serdes_preemphasis_lane0_62=0x0f480d
+serdes_preemphasis_lane1_62=0x0f480d
+serdes_preemphasis_lane2_62=0x0f480d
+serdes_preemphasis_lane3_62=0x0f480d
+serdes_preemphasis_lane0_63=0x0f480d
+serdes_preemphasis_lane1_63=0x0f480d
+serdes_preemphasis_lane2_63=0x0f480d
+serdes_preemphasis_lane3_63=0x0f480d
+serdes_preemphasis_lane0_64=0x0f480d
+serdes_preemphasis_lane1_64=0x0f480d
+serdes_preemphasis_lane2_64=0x0f480d
+serdes_preemphasis_lane3_64=0x0f480d
+serdes_preemphasis_lane0_1=0x0f480d
+serdes_preemphasis_lane1_1=0x0f480d
+serdes_preemphasis_lane2_1=0x0f480d
+serdes_preemphasis_lane3_1=0x0f480d
+serdes_preemphasis_lane0_2=0x0d4b0c
+serdes_preemphasis_lane1_2=0x0d4b0c
+serdes_preemphasis_lane2_2=0x0d4b0c
+serdes_preemphasis_lane3_2=0x0d4b0c
+serdes_preemphasis_lane0_3=0x0f480d
+serdes_preemphasis_lane1_3=0x0f480d
+serdes_preemphasis_lane2_3=0x0f480d
+serdes_preemphasis_lane3_3=0x0f480d
+serdes_preemphasis_lane0_4=0x0d4b0c
+serdes_preemphasis_lane1_4=0x0d4b0c
+serdes_preemphasis_lane2_4=0x0d4b0c
+serdes_preemphasis_lane3_4=0x0d4b0c
+serdes_preemphasis_lane0_5=0x0f480d
+serdes_preemphasis_lane1_5=0x0f480d
+serdes_preemphasis_lane2_5=0x0f480d
+serdes_preemphasis_lane3_5=0x0f480d
+serdes_preemphasis_lane0_6=0x0d4b0c
+serdes_preemphasis_lane1_6=0x0d4b0c
+serdes_preemphasis_lane2_6=0x0d4b0c
+serdes_preemphasis_lane3_6=0x0d4b0c
+serdes_preemphasis_lane0_7=0x0f480d
+serdes_preemphasis_lane1_7=0x0f480d
+serdes_preemphasis_lane2_7=0x0f480d
+serdes_preemphasis_lane3_7=0x0f480d
+serdes_preemphasis_lane0_8=0x0d4b0c
+serdes_preemphasis_lane1_8=0x0d4b0c
+serdes_preemphasis_lane2_8=0x0d4b0c
+serdes_preemphasis_lane3_8=0x0d4b0c
+serdes_preemphasis_lane0_13=0x0f480d
+serdes_preemphasis_lane1_13=0x0f480d
+serdes_preemphasis_lane2_13=0x0f480d
+serdes_preemphasis_lane3_13=0x0f480d
+serdes_preemphasis_lane0_14=0x0d4b0c
+serdes_preemphasis_lane1_14=0x0d4b0c
+serdes_preemphasis_lane2_14=0x0d4b0c
+serdes_preemphasis_lane3_14=0x0d4b0c
+serdes_preemphasis_lane0_15=0x0f480d
+serdes_preemphasis_lane1_15=0x0f480d
+serdes_preemphasis_lane2_15=0x0f480d
+serdes_preemphasis_lane3_15=0x0f480d
+serdes_preemphasis_lane0_16=0x0d4b0c
+serdes_preemphasis_lane1_16=0x0d4b0c
+serdes_preemphasis_lane2_16=0x0d4b0c
+serdes_preemphasis_lane3_16=0x0d4b0c
+serdes_preemphasis_lane0_21=0x0d4b0c
+serdes_preemphasis_lane1_21=0x0d4b0c
+serdes_preemphasis_lane2_21=0x0d4b0c
+serdes_preemphasis_lane3_21=0x0d4b0c
+serdes_preemphasis_lane0_22=0x0d4b0c
+serdes_preemphasis_lane1_22=0x0d4b0c
+serdes_preemphasis_lane2_22=0x0d4b0c
+serdes_preemphasis_lane3_22=0x0d4b0c
+serdes_preemphasis_lane0_23=0x0d4b0c
+serdes_preemphasis_lane1_23=0x0d4b0c
+serdes_preemphasis_lane2_23=0x0d4b0c
+serdes_preemphasis_lane3_23=0x0d4b0c
+serdes_preemphasis_lane0_24=0x0d4b0c
+serdes_preemphasis_lane1_24=0x0d4b0c
+serdes_preemphasis_lane2_24=0x0d4b0c
+serdes_preemphasis_lane3_24=0x0d4b0c
+serdes_preemphasis_lane0_29=0x0d4b0c
+serdes_preemphasis_lane1_29=0x0d4b0c
+serdes_preemphasis_lane2_29=0x0d4b0c
+serdes_preemphasis_lane3_29=0x0d4b0c
+serdes_preemphasis_lane0_30=0x0d4b0c
+serdes_preemphasis_lane1_30=0x0d4b0c
+serdes_preemphasis_lane2_30=0x0d4b0c
+serdes_preemphasis_lane3_30=0x0d4b0c
+serdes_preemphasis_lane0_31=0x0d4b0c
+serdes_preemphasis_lane1_31=0x0d4b0c
+serdes_preemphasis_lane2_31=0x0d4b0c
+serdes_preemphasis_lane3_31=0x0d4b0c
+serdes_preemphasis_lane0_32=0x0d4b0c
+serdes_preemphasis_lane1_32=0x0d4b0c
+serdes_preemphasis_lane2_32=0x0d4b0c
+serdes_preemphasis_lane3_32=0x0d4b0c
+serdes_preemphasis_lane0_33=0x0d4b0c
+serdes_preemphasis_lane1_33=0x0d4b0c
+serdes_preemphasis_lane2_33=0x0d4b0c
+serdes_preemphasis_lane3_33=0x0d4b0c
+serdes_preemphasis_lane0_34=0x0d4b0c
+serdes_preemphasis_lane1_34=0x0d4b0c
+serdes_preemphasis_lane2_34=0x0d4b0c
+serdes_preemphasis_lane3_34=0x0d4b0c
+serdes_preemphasis_lane0_35=0x0d4b0c
+serdes_preemphasis_lane1_35=0x0d4b0c
+serdes_preemphasis_lane2_35=0x0d4b0c
+serdes_preemphasis_lane3_35=0x0d4b0c
+serdes_preemphasis_lane0_36=0x0d4b0c
+serdes_preemphasis_lane1_36=0x0d4b0c
+serdes_preemphasis_lane2_36=0x0d4b0c
+serdes_preemphasis_lane3_36=0x0d4b0c
+serdes_preemphasis_lane0_41=0x0d4b0c
+serdes_preemphasis_lane1_41=0x0d4b0c
+serdes_preemphasis_lane2_41=0x0d4b0c
+serdes_preemphasis_lane3_41=0x0d4b0c
+serdes_preemphasis_lane0_42=0x0d4b0c
+serdes_preemphasis_lane1_42=0x0d4b0c
+serdes_preemphasis_lane2_42=0x0d4b0c
+serdes_preemphasis_lane3_42=0x0d4b0c
+serdes_preemphasis_lane0_43=0x0d4b0c
+serdes_preemphasis_lane1_43=0x0d4b0c
+serdes_preemphasis_lane2_43=0x0d4b0c
+serdes_preemphasis_lane3_43=0x0d4b0c
+serdes_preemphasis_lane0_44=0x0d4b0c
+serdes_preemphasis_lane1_44=0x0d4b0c
+serdes_preemphasis_lane2_44=0x0d4b0c
+serdes_preemphasis_lane3_44=0x0d4b0c
+serdes_preemphasis_lane0_49=0x0f480d
+serdes_preemphasis_lane1_49=0x0f480d
+serdes_preemphasis_lane2_49=0x0f480d
+serdes_preemphasis_lane3_49=0x0f480d
+serdes_preemphasis_lane0_50=0x0d4b0c
+serdes_preemphasis_lane1_50=0x0d4b0c
+serdes_preemphasis_lane2_50=0x0d4b0c
+serdes_preemphasis_lane3_50=0x0d4b0c
+serdes_preemphasis_lane0_51=0x0f480d
+serdes_preemphasis_lane1_51=0x0f480d
+serdes_preemphasis_lane2_51=0x0f480d
+serdes_preemphasis_lane3_51=0x0f480d
+serdes_preemphasis_lane0_52=0x0d4b0c
+serdes_preemphasis_lane1_52=0x0d4b0c
+serdes_preemphasis_lane2_52=0x0d4b0c
+serdes_preemphasis_lane3_52=0x0d4b0c
+serdes_preemphasis_lane0_67=0x0d4b0c
+serdes_preemphasis_lane1_67=0x0d4b0c
+serdes_preemphasis_lane2_67=0x0d4b0c
+serdes_preemphasis_lane3_67=0x0d4b0c
+serdes_preemphasis_lane0_68=0x0d4b0c
+serdes_preemphasis_lane1_68=0x0d4b0c
+serdes_preemphasis_lane2_68=0x0d4b0c
+serdes_preemphasis_lane3_68=0x0d4b0c
+serdes_preemphasis_lane0_69=0x0d4b0c
+serdes_preemphasis_lane1_69=0x0d4b0c
+serdes_preemphasis_lane2_69=0x0d4b0c
+serdes_preemphasis_lane3_69=0x0d4b0c
+serdes_preemphasis_lane0_70=0x0d4b0c
+serdes_preemphasis_lane1_70=0x0d4b0c
+serdes_preemphasis_lane2_70=0x0d4b0c
+serdes_preemphasis_lane3_70=0x0d4b0c
+serdes_preemphasis_lane0_71=0x0d4b0c
+serdes_preemphasis_lane1_71=0x0d4b0c
+serdes_preemphasis_lane2_71=0x0d4b0c
+serdes_preemphasis_lane3_71=0x0d4b0c
+serdes_preemphasis_lane0_72=0x0d4b0c
+serdes_preemphasis_lane1_72=0x0d4b0c
+serdes_preemphasis_lane2_72=0x0d4b0c
+serdes_preemphasis_lane3_72=0x0d4b0c
+serdes_preemphasis_lane0_73=0x0d4b0c
+serdes_preemphasis_lane1_73=0x0d4b0c
+serdes_preemphasis_lane2_73=0x0d4b0c
+serdes_preemphasis_lane3_73=0x0d4b0c
+serdes_preemphasis_lane0_74=0x0d4b0c
+serdes_preemphasis_lane1_74=0x0d4b0c
+serdes_preemphasis_lane2_74=0x0d4b0c
+serdes_preemphasis_lane3_74=0x0d4b0c
+serdes_preemphasis_lane0_87=0x0d4b0c
+serdes_preemphasis_lane1_87=0x0d4b0c
+serdes_preemphasis_lane2_87=0x0d4b0c
+serdes_preemphasis_lane3_87=0x0d4b0c
+serdes_preemphasis_lane0_79=0x0d4b0c
+serdes_preemphasis_lane1_79=0x0d4b0c
+serdes_preemphasis_lane2_79=0x0d4b0c
+serdes_preemphasis_lane3_79=0x0d4b0c
+serdes_preemphasis_lane0_99=0x0d4b0c
+serdes_preemphasis_lane1_99=0x0d4b0c
+serdes_preemphasis_lane2_99=0x0d4b0c
+serdes_preemphasis_lane3_99=0x0d4b0c
+serdes_preemphasis_lane0_95=0x0d4b0c
+serdes_preemphasis_lane1_95=0x0d4b0c
+serdes_preemphasis_lane2_95=0x0d4b0c
+serdes_preemphasis_lane3_95=0x0d4b0c
+serdes_preemphasis_lane0_115=0x0d4b0c
+serdes_preemphasis_lane1_115=0x0d4b0c
+serdes_preemphasis_lane2_115=0x0d4b0c
+serdes_preemphasis_lane3_115=0x0d4b0c
+serdes_preemphasis_lane0_107=0x0d4b0c
+serdes_preemphasis_lane1_107=0x0d4b0c
+serdes_preemphasis_lane2_107=0x0d4b0c
+serdes_preemphasis_lane3_107=0x0d4b0c
+serdes_preemphasis_lane0_123=0x14460a
+serdes_preemphasis_lane1_123=0x14460a
+serdes_preemphasis_lane2_123=0x14460a
+serdes_preemphasis_lane3_123=0x14460a
+serdes_preemphasis_lane0_127=0x14460a
+serdes_preemphasis_lane1_127=0x14460a
+serdes_preemphasis_lane2_127=0x14460a
+serdes_preemphasis_lane3_127=0x14460a
+
+
+reglist_enable=1
+scache_filename=/var/warmboot/wbscache
+schan_intr_enable=0
+stable_size=0x55000000
+stable_location=3
+warmboot_knet_shutdown_mode=1
+tdma_timeout_usec=3000000
+
+#vxlan flex flow mode
+flow_init_mode=1
+
+riot_enable=1
+riot_overlay_l3_intf_mem_size=4096
+riot_overlay_l3_egress_mem_size=32768
+riot_overlay_ecmp_resilient_hash_size=16384
+
+l3_ecmp_levels=2
+
+use_all_splithorizon_groups=1
+sai_tunnel_support=1
+
+#This property allows to enable L2 FDB entry to discard based on Source Mac
+sai_fdb_entry_l2_discard_src_enable=1
+
+#RDMA
+sai_pfc_defaults_disable=1
+sai_optimized_mmu=1
+
+#ACL wb count
+ctr_evict_enable=0
diff --git a/device/micas/x86_64-micas_m2-w6510-48v8c-r0/custom_led.bin b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/custom_led.bin
new file mode 100644
index 0000000000000000000000000000000000000000..e02f94e7ed87ffe60524721f4aec68d661880e7c
GIT binary patch
literal 236
zcmWN~%}N4M7=YpT%$NoC2ayV4HjWWfZN?-t`<XM<S0t?>f<Wj@Eo_%dp&(qjY@N5z
zN@`aS&J9dA(b`L>=LVkf$CZeDzh_uF%kr>I`FYKD`eLmXf;U;{tHuD;Ze7>$f@av%
zgCSlz(c*=6Vg!#wxw@UXuqvtQF#P>drO^$pZE}t_Ju@=OS5eW|Q7?+4_%^<q{(O;F
z8Gk+2pw12rcG+W}0|FElHYp}ZGszS)%reJ3i)6`>r@%5rR&XfcQvT1^*<cf&3R_gs
WgdB3jF~SL_Tyl<~MTdL3Jn;uTxG=K-

literal 0
HcmV?d00001

diff --git a/device/micas/x86_64-micas_m2-w6510-48v8c-r0/default_sku b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/default_sku
new file mode 100644
index 000000000..921c511b1
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/default_sku
@@ -0,0 +1 @@
+M2-W6510-48V8C t1
diff --git a/device/micas/x86_64-micas_m2-w6510-48v8c-r0/dev.xml b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/dev.xml
new file mode 100644
index 000000000..86a147b8f
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/dev.xml
@@ -0,0 +1,420 @@
+<?xml version="1.0" encoding="utf-8"?>
+<!--
+      ### type  1 result/1000
+          type  2 result/100
+          type  3 read bit
+     ### property need check must add int front
+-->
+<catalog>
+    <fans>
+        <fan id="fan1" >
+            <property name="present" location="/sys/wb_plat/fan/fan1/present"       type="4" decode="fanpresent" default="1"/>
+            <property name="status"  location="/sys/wb_plat/fan/fan1/motor0/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="status2" location="/sys/wb_plat/fan/fan1/motor1/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="fru" e2type="fru"  location="/sys/bus/i2c/devices/16-0050/eeprom"/>
+            <property name="rotor1_speed" location="/sys/wb_plat/fan/fan1/motor1/speed"/>
+            <property name="rotor2_speed" location="/sys/wb_plat/fan/fan1/motor0/speed"/>
+        </fan>
+        <fan id="fan2" >
+            <property name="present" location="/sys/wb_plat/fan/fan2/present"       type="4" decode="fanpresent" default="1"/>
+            <property name="status"  location="/sys/wb_plat/fan/fan2/motor0/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="status2" location="/sys/wb_plat/fan/fan2/motor1/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="fru" e2type="fru"  location="/sys/bus/i2c/devices/17-0050/eeprom"/>
+            <property name="rotor1_speed" location="/sys/wb_plat/fan/fan2/motor1/speed"/>
+            <property name="rotor2_speed" location="/sys/wb_plat/fan/fan2/motor0/speed"/>
+        </fan>
+        <fan id="fan3" >
+            <property name="present" location="/sys/wb_plat/fan/fan3/present"       type="4" decode="fanpresent" default="1"/>
+            <property name="status"  location="/sys/wb_plat/fan/fan3/motor0/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="status2" location="/sys/wb_plat/fan/fan3/motor1/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="fru" e2type="fru"  location="/sys/bus/i2c/devices/18-0050/eeprom"/>
+            <property name="rotor1_speed" location="/sys/wb_plat/fan/fan3/motor1/speed"/>
+            <property name="rotor2_speed" location="/sys/wb_plat/fan/fan3/motor0/speed"/>
+        </fan>
+        <fan id="fan4" >
+            <property name="present" location="/sys/wb_plat/fan/fan4/present"       type="4" decode="fanpresent" default="1"/>
+            <property name="status"  location="/sys/wb_plat/fan/fan4/motor0/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="status2" location="/sys/wb_plat/fan/fan4/motor1/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="fru" e2type="fru"  location="/sys/bus/i2c/devices/19-0050/eeprom"/>
+            <property name="rotor1_speed" location="/sys/wb_plat/fan/fan4/motor1/speed"/>
+            <property name="rotor2_speed" location="/sys/wb_plat/fan/fan4/motor0/speed"/>
+        </fan>
+    </fans>
+    <temps>
+        <temp id="INLET_TEMP" >
+            <property name="temp1_input" location="/sys/bus/i2c/devices/3-0048/hwmon/*/temp1_input" type="1" addend="-3"/>
+            <property name="temp1_max"   location="/sys/bus/i2c/devices/3-0048/hwmon/*/temp1_max" type="1" />
+            <property name="temp1_max_hyst"    location="/sys/bus/i2c/devices/3-0048/hwmon/*/temp1_max_hyst" type="1" />
+        </temp>
+        <temp id="OUTLET_TEMP" >
+            <property name="temp1_input" location="/sys/bus/i2c/devices/3-004c/hwmon/*/temp1_input" type="1"/>
+            <property name="temp1_max"   location="/sys/bus/i2c/devices/3-004c/hwmon/*/temp1_max" type="1" />
+            <property name="temp1_max_hyst"    location="/sys/bus/i2c/devices/3-004c/hwmon/*/temp1_max_hyst" type="1" />
+        </temp>
+        <temp id="MAC_IN_TEMP" >
+            <property name="temp1_input" location="/sys/bus/i2c/devices/3-0049/hwmon/*/temp1_input" type="1" />
+            <property name="temp1_max"   location="/sys/bus/i2c/devices/3-0049/hwmon/*/temp1_max" type="1" />
+            <property name="temp1_max_hyst"    location="/sys/bus/i2c/devices/3-0049/hwmon/*/temp1_max_hyst" type="1" />
+        </temp>
+        <temp id="MAC_OUT_TEMP" >
+            <property name="temp1_input" location="/sys/bus/i2c/devices/3-004a/hwmon/*/temp1_input" type="1"/>
+            <property name="temp1_max"   location="/sys/bus/i2c/devices/3-004a/hwmon/*/temp1_max" type="1"/>
+            <property name="temp1_max_hyst"    location="/sys/bus/i2c/devices/3-004a/hwmon/*/temp1_max_hyst" type="1"/>
+        </temp>
+    </temps>
+    <psus>
+        <psu id="psu1" >
+            <property name="present" location="/sys/wb_plat/psu/psu1/present" type="4" decode="psucheck"  default="1"/>
+            <property name="status"  location="/sys/wb_plat/psu/psu1/output"  type="4" decode="psustatus" default="1"/>
+            <property name="psu" e2type="fru"  location="/sys/bus/i2c/devices/24-0050/eeprom"/>
+            <property name="in_current"     location="/sys/bus/i2c/devices/24-0058/hwmon/*/curr1_input" type="1" />
+            <property name="in_voltage"     location="/sys/bus/i2c/devices/24-0058/hwmon/*/in1_input"  type="1"/>
+            <property name="out_voltage"    location="/sys/bus/i2c/devices/24-0058/hwmon/*/in2_input" type="1" />
+            <property name="out_current"    location="/sys/bus/i2c/devices/24-0058/hwmon/*/curr2_input" type="1" />
+            <property name="temp"    location="/sys/bus/i2c/devices/24-0058/hwmon/*/temp1_input" type="1"/>
+            <property name="fan_speed"     location="/sys/bus/i2c/devices/24-0058/hwmon/*/fan1_input" />
+            <property name="in_power"      location="/sys/bus/i2c/devices/24-0058/hwmon/*/power1_input"  type="5"/>
+            <property name="out_power"     location="/sys/bus/i2c/devices/24-0058/hwmon/*/power2_input"  type="5"/>
+        </psu>
+        <psu id="psu2" >
+            <property name="present" location="/sys/wb_plat/psu/psu2/present" type="4" decode="psucheck"  default="1"/>
+            <property name="status"  location="/sys/wb_plat/psu/psu2/output"  type="4" decode="psustatus" default="1"/>
+            <property name="psu" e2type="fru"  location="/sys/bus/i2c/devices/25-0050/eeprom"/>
+            <property name="in_current"     location="/sys/bus/i2c/devices/25-0058/hwmon/*/curr1_input" type="1" />
+            <property name="in_voltage"     location="/sys/bus/i2c/devices/25-0058/hwmon/*/in1_input"  type="1"/>
+            <property name="out_voltage"    location="/sys/bus/i2c/devices/25-0058/hwmon/*/in2_input" type="1" />
+            <property name="out_current"    location="/sys/bus/i2c/devices/25-0058/hwmon/*/curr2_input" type="1" />
+            <property name="temp"    location="/sys/bus/i2c/devices/25-0058/hwmon/*/temp1_input" type="1"/>
+            <property name="fan_speed"     location="/sys/bus/i2c/devices/25-0058/hwmon/*/fan1_input" />
+            <property name="in_power"      location="/sys/bus/i2c/devices/25-0058/hwmon/*/power1_input"  type="5"/>
+            <property name="out_power"     location="/sys/bus/i2c/devices/25-0058/hwmon/*/power2_input"  type="5"/>
+        </psu> 
+    </psus> 
+    <dcdcs>
+        <dcdc id="Switch_ZSFP1_3v3_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0040/hwmon/hwmon*/curr1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="22.000" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="Switch_QSFP1_3v3_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0040/hwmon/hwmon*/curr3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="22.000" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="Switch_5v0_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0040/hwmon/hwmon*/curr2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.000" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="Switch_ZSFP1_3v3_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0040/hwmon/hwmon*/in1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.960" />
+            <property name="dcdc_min"   gettype="config" value="2.640" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="Switch_QSFP1_3v3_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0040/hwmon/hwmon*/in3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.960" />
+            <property name="dcdc_min"   gettype="config" value="2.640" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="Switch_5v0_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0040/hwmon/hwmon*/in2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="6.000" />
+            <property name="dcdc_min"   gettype="config" value="4.000" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="Switch_1v2_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0041/hwmon/hwmon*/curr1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="2.000" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="Switch_3v3_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0041/hwmon/hwmon*/curr2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.000" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="Switch_Cpld_3v3_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0041/hwmon/hwmon*/curr3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="2.000" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="Switch_1v2_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0041/hwmon/hwmon*/in1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.440" />
+            <property name="dcdc_min"   gettype="config" value="0.960" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="Switch_3v3_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0041/hwmon/hwmon*/in2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.960" />
+            <property name="dcdc_min"   gettype="config" value="2.640" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="Switch_Cpld_3v3_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0041/hwmon/hwmon*/in3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.960" />
+            <property name="dcdc_min"   gettype="config" value="2.640" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="Con_1v2_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0042/hwmon/hwmon*/curr1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.300" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="Con_3v3_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0042/hwmon/hwmon*/curr2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="2.800" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="Con_SSD_3v3_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0042/hwmon/hwmon*/curr3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="4.500" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="Con_1v2_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0042/hwmon/hwmon*/in1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.440" />
+            <property name="dcdc_min"   gettype="config" value="0.960" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="Con_3v3_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0042/hwmon/hwmon*/in2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.960" />
+            <property name="dcdc_min"   gettype="config" value="2.640" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="Con_SSD_3v3_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0042/hwmon/hwmon*/in3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.960" />
+            <property name="dcdc_min"   gettype="config" value="2.640" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="Cpu_3v3_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0043/hwmon/hwmon*/curr1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="4.686" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="Cpu_5v_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0043/hwmon/hwmon*/curr2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="2.200" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="Cpu_1v7_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0043/hwmon/hwmon*/curr3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="2.200" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="Cpu_3v3_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0043/hwmon/hwmon*/in1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.960" />
+            <property name="dcdc_min"   gettype="config" value="2.640" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="Cpu_5v_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0043/hwmon/hwmon*/in2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="6.000" />
+            <property name="dcdc_min"   gettype="config" value="4.000" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="Cpu_1v7_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0043/hwmon/hwmon*/in3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="2.040" />
+            <property name="dcdc_min"   gettype="config" value="1.360" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="Cpu_CORE_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0060/hwmon/hwmon*/curr1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="47.300" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="Cpu_1v05_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0060/hwmon/hwmon*/curr2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="15.400" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="Cpu_CORE_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0060/hwmon/hwmon*/in2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="2.184" />
+            <property name="dcdc_min"   gettype="config" value="1.456" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="Cpu_1v05_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0060/hwmon/hwmon*/in3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.260" />
+            <property name="dcdc_min"   gettype="config" value="0.840" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="Switch_CORE_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0064/hwmon/hwmon*/curr2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="220.000" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="Switch_ANALOG_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0064/hwmon/hwmon*/curr3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="18.000" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="Switch_CORE_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0064/hwmon/hwmon*/in2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.200" />
+            <property name="dcdc_min"   gettype="config" value="0.600" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="Switch_ANALOG_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0064/hwmon/hwmon*/in3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="0.960" />
+            <property name="dcdc_min"   gettype="config" value="0.640" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="Cpu_1v2_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-006c/hwmon/hwmon*/curr1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="9.900" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="Cpu_2v23_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-006c/hwmon/hwmon*/curr2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="2.200" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="Cpu_1v2_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-006c/hwmon/hwmon*/in2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.440" />
+            <property name="dcdc_min"   gettype="config" value="0.960" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="Cpu_2v23_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-006c/hwmon/hwmon*/in3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="2.676" />
+            <property name="dcdc_min"   gettype="config" value="1.784" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+    </dcdcs>
+    <mactemps>
+        <mactemp id="MAC_DIE_0" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/3-0044/hwmon/hwmon*/temp1_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_1" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/3-0044/hwmon/hwmon*/temp2_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_2" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/3-0044/hwmon/hwmon*/temp3_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_3" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/3-0044/hwmon/hwmon*/temp4_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_4" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/3-0044/hwmon/hwmon*/temp5_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_5" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/3-0044/hwmon/hwmon*/temp6_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_6" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/3-0044/hwmon/hwmon*/temp7_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_7" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/3-0044/hwmon/hwmon*/temp8_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_8" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/3-0044/hwmon/hwmon*/temp9_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_9" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/3-0044/hwmon/hwmon*/temp10_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_10" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/3-0044/hwmon/hwmon*/temp11_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_11" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/3-0044/hwmon/hwmon*/temp12_input"  type="1"/>
+        </mactemp>
+    </mactemps>
+    <cpus location="/sys/class/hwmon/hwmon0"/>
+    <decode>
+    <fanpresent>
+        <code key="1" value="PRESENT"/>
+        <code key="0" value="ABSENT"/>
+    </fanpresent>
+    <fanstatus>
+        <code key="1" value="OK"/>
+        <code key="0" value="NOT OK"/>
+    </fanstatus>
+    <psucheck>
+        <code key="1" value="PRESENT"/>
+        <code key="0" value="ABSENT"/>
+    </psucheck>
+    <psustatus>
+        <code key="1" value="OK"/>
+        <code key="0" value="NOT OK"/>
+    </psustatus>
+    <psutype>
+        <code key="CSU550AP-3-500" value="PA550II-F"/>
+        <code key="DPS-550AB-39 A" value="PA550II-F"/>
+        <code key="GW-CRPS550N2C" value="PA550II-F"/>
+        <code key="CSU550AP-3-300" value="PA550II-F"/>
+        <code key="DPS-550AB-39 B" value="PA550II-F"/>
+        <code key="CSU550AP-3" value="PA550II-F"/>
+        <code key="CSU550AP-3-501" value="PA550II-R"/>
+        <code key="DPS-550AB-40 A" value="PA550II-R"/>
+        <code key="GW-CRPS550N2RC" value="PA550II-R"/>
+        <code key="U1D-D10800-DRB" value="PD800I-F"/>
+    </psutype>
+    <fan_display_name>
+        <code key="M1HFAN III-F" value="M1HFAN III-F"/>
+        <code key="M1HFAN III-R" value="M1HFAN III-R"/>
+    </fan_display_name>
+    </decode>
+</catalog>
+
diff --git a/device/micas/x86_64-micas_m2-w6510-48v8c-r0/dev_exhaust.xml b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/dev_exhaust.xml
new file mode 100644
index 000000000..86851af90
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/dev_exhaust.xml
@@ -0,0 +1,420 @@
+<?xml version="1.0" encoding="utf-8"?>
+<!--
+      ### type  1 result/1000
+          type  2 result/100
+          type  3 read bit
+     ### property need check must add int front
+-->
+<catalog>
+    <fans>
+        <fan id="fan1" >
+            <property name="present" location="/sys/wb_plat/fan/fan1/present"       type="4" decode="fanpresent" default="1"/>
+            <property name="status"  location="/sys/wb_plat/fan/fan1/motor0/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="status2" location="/sys/wb_plat/fan/fan1/motor1/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="fru" e2type="fru"  location="/sys/bus/i2c/devices/16-0050/eeprom"/>
+            <property name="rotor1_speed" location="/sys/wb_plat/fan/fan1/motor1/speed"/>
+            <property name="rotor2_speed" location="/sys/wb_plat/fan/fan1/motor0/speed"/>
+        </fan>
+        <fan id="fan2" >
+            <property name="present" location="/sys/wb_plat/fan/fan2/present"       type="4" decode="fanpresent" default="1"/>
+            <property name="status"  location="/sys/wb_plat/fan/fan2/motor0/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="status2" location="/sys/wb_plat/fan/fan2/motor1/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="fru" e2type="fru"  location="/sys/bus/i2c/devices/17-0050/eeprom"/>
+            <property name="rotor1_speed" location="/sys/wb_plat/fan/fan2/motor1/speed"/>
+            <property name="rotor2_speed" location="/sys/wb_plat/fan/fan2/motor0/speed"/>
+        </fan>
+        <fan id="fan3" >
+            <property name="present" location="/sys/wb_plat/fan/fan3/present"       type="4" decode="fanpresent" default="1"/>
+            <property name="status"  location="/sys/wb_plat/fan/fan3/motor0/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="status2" location="/sys/wb_plat/fan/fan3/motor1/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="fru" e2type="fru"  location="/sys/bus/i2c/devices/18-0050/eeprom"/>
+            <property name="rotor1_speed" location="/sys/wb_plat/fan/fan3/motor1/speed"/>
+            <property name="rotor2_speed" location="/sys/wb_plat/fan/fan3/motor0/speed"/>
+        </fan>
+        <fan id="fan4" >
+            <property name="present" location="/sys/wb_plat/fan/fan4/present"       type="4" decode="fanpresent" default="1"/>
+            <property name="status"  location="/sys/wb_plat/fan/fan4/motor0/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="status2" location="/sys/wb_plat/fan/fan4/motor1/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="fru" e2type="fru"  location="/sys/bus/i2c/devices/19-0050/eeprom"/>
+            <property name="rotor1_speed" location="/sys/wb_plat/fan/fan4/motor1/speed"/>
+            <property name="rotor2_speed" location="/sys/wb_plat/fan/fan4/motor0/speed"/>
+        </fan>
+    </fans>
+    <temps>
+        <temp id="INLET_TEMP" >
+            <property name="temp1_input" location="/sys/bus/i2c/devices/3-004c/hwmon/*/temp1_input" type="1" addend="-3"/>
+            <property name="temp1_max"   location="/sys/bus/i2c/devices/3-004c/hwmon/*/temp1_max" type="1" />
+            <property name="temp1_max_hyst"    location="/sys/bus/i2c/devices/3-004c/hwmon/*/temp1_max_hyst" type="1" />
+        </temp>
+        <temp id="OUTLET_TEMP" >
+            <property name="temp1_input" location="/sys/bus/i2c/devices/3-0048/hwmon/*/temp1_input" type="1"/>
+            <property name="temp1_max"   location="/sys/bus/i2c/devices/3-0048/hwmon/*/temp1_max" type="1" />
+            <property name="temp1_max_hyst"    location="/sys/bus/i2c/devices/3-0048/hwmon/*/temp1_max_hyst" type="1" />
+        </temp>
+        <temp id="MAC_IN_TEMP" >
+            <property name="temp1_input" location="/sys/bus/i2c/devices/3-004a/hwmon/*/temp1_input" type="1" />
+            <property name="temp1_max"   location="/sys/bus/i2c/devices/3-004a/hwmon/*/temp1_max" type="1" />
+            <property name="temp1_max_hyst"    location="/sys/bus/i2c/devices/3-004a/hwmon/*/temp1_max_hyst" type="1" />
+        </temp>
+        <temp id="MAC_OUT_TEMP" >
+            <property name="temp1_input" location="/sys/bus/i2c/devices/3-0049/hwmon/*/temp1_input" type="1"/>
+            <property name="temp1_max"   location="/sys/bus/i2c/devices/3-0049/hwmon/*/temp1_max" type="1"/>
+            <property name="temp1_max_hyst"    location="/sys/bus/i2c/devices/3-0049/hwmon/*/temp1_max_hyst" type="1"/>
+        </temp>
+    </temps>
+    <psus>
+        <psu id="psu1" >
+            <property name="present" location="/sys/wb_plat/psu/psu1/present" type="4" decode="psucheck"  default="1"/>
+            <property name="status"  location="/sys/wb_plat/psu/psu1/output"  type="4" decode="psustatus" default="1"/>
+            <property name="psu" e2type="fru"  location="/sys/bus/i2c/devices/24-0050/eeprom"/>
+            <property name="in_current"     location="/sys/bus/i2c/devices/24-0058/hwmon/*/curr1_input" type="1" />
+            <property name="in_voltage"     location="/sys/bus/i2c/devices/24-0058/hwmon/*/in1_input"  type="1"/>
+            <property name="out_voltage"    location="/sys/bus/i2c/devices/24-0058/hwmon/*/in2_input" type="1" />
+            <property name="out_current"    location="/sys/bus/i2c/devices/24-0058/hwmon/*/curr2_input" type="1" />
+            <property name="temp"    location="/sys/bus/i2c/devices/24-0058/hwmon/*/temp1_input" type="1"/>
+            <property name="fan_speed"     location="/sys/bus/i2c/devices/24-0058/hwmon/*/fan1_input" />
+            <property name="in_power"      location="/sys/bus/i2c/devices/24-0058/hwmon/*/power1_input"  type="5"/>
+            <property name="out_power"     location="/sys/bus/i2c/devices/24-0058/hwmon/*/power2_input"  type="5"/>
+        </psu>
+        <psu id="psu2" >
+            <property name="present" location="/sys/wb_plat/psu/psu2/present" type="4" decode="psucheck"  default="1"/>
+            <property name="status"  location="/sys/wb_plat/psu/psu2/output"  type="4" decode="psustatus" default="1"/>
+            <property name="psu" e2type="fru"  location="/sys/bus/i2c/devices/25-0050/eeprom"/>
+            <property name="in_current"     location="/sys/bus/i2c/devices/25-0058/hwmon/*/curr1_input" type="1" />
+            <property name="in_voltage"     location="/sys/bus/i2c/devices/25-0058/hwmon/*/in1_input"  type="1"/>
+            <property name="out_voltage"    location="/sys/bus/i2c/devices/25-0058/hwmon/*/in2_input" type="1" />
+            <property name="out_current"    location="/sys/bus/i2c/devices/25-0058/hwmon/*/curr2_input" type="1" />
+            <property name="temp"    location="/sys/bus/i2c/devices/25-0058/hwmon/*/temp1_input" type="1"/>
+            <property name="fan_speed"     location="/sys/bus/i2c/devices/25-0058/hwmon/*/fan1_input" />
+            <property name="in_power"      location="/sys/bus/i2c/devices/25-0058/hwmon/*/power1_input"  type="5"/>
+            <property name="out_power"     location="/sys/bus/i2c/devices/25-0058/hwmon/*/power2_input"  type="5"/>
+        </psu> 
+    </psus> 
+    <dcdcs>
+        <dcdc id="Switch_ZSFP1_3v3_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0040/hwmon/hwmon*/curr1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="22.000" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="Switch_QSFP1_3v3_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0040/hwmon/hwmon*/curr3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="22.000" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="Switch_5v0_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0040/hwmon/hwmon*/curr2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.000" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="Switch_ZSFP1_3v3_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0040/hwmon/hwmon*/in1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.960" />
+            <property name="dcdc_min"   gettype="config" value="2.640" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="Switch_QSFP1_3v3_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0040/hwmon/hwmon*/in3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.960" />
+            <property name="dcdc_min"   gettype="config" value="2.640" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="Switch_5v0_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0040/hwmon/hwmon*/in2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="6.000" />
+            <property name="dcdc_min"   gettype="config" value="4.000" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="Switch_1v2_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0041/hwmon/hwmon*/curr1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="2.000" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="Switch_3v3_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0041/hwmon/hwmon*/curr2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.000" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="Switch_Cpld_3v3_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0041/hwmon/hwmon*/curr3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="2.000" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="Switch_1v2_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0041/hwmon/hwmon*/in1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.440" />
+            <property name="dcdc_min"   gettype="config" value="0.960" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="Switch_3v3_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0041/hwmon/hwmon*/in2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.960" />
+            <property name="dcdc_min"   gettype="config" value="2.640" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="Switch_Cpld_3v3_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0041/hwmon/hwmon*/in3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.960" />
+            <property name="dcdc_min"   gettype="config" value="2.640" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="Con_1v2_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0042/hwmon/hwmon*/curr1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.300" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="Con_3v3_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0042/hwmon/hwmon*/curr2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="2.800" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="Con_SSD_3v3_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0042/hwmon/hwmon*/curr3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="4.500" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="Con_1v2_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0042/hwmon/hwmon*/in1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.440" />
+            <property name="dcdc_min"   gettype="config" value="0.960" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="Con_3v3_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0042/hwmon/hwmon*/in2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.960" />
+            <property name="dcdc_min"   gettype="config" value="2.640" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="Con_SSD_3v3_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0042/hwmon/hwmon*/in3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.960" />
+            <property name="dcdc_min"   gettype="config" value="2.640" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="Cpu_3v3_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0043/hwmon/hwmon*/curr1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="4.686" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="Cpu_5v_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0043/hwmon/hwmon*/curr2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="2.200" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="Cpu_1v7_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0043/hwmon/hwmon*/curr3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="2.200" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="Cpu_3v3_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0043/hwmon/hwmon*/in1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.960" />
+            <property name="dcdc_min"   gettype="config" value="2.640" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="Cpu_5v_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0043/hwmon/hwmon*/in2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="6.000" />
+            <property name="dcdc_min"   gettype="config" value="4.000" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="Cpu_1v7_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0043/hwmon/hwmon*/in3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="2.040" />
+            <property name="dcdc_min"   gettype="config" value="1.360" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="Cpu_CORE_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0060/hwmon/hwmon*/curr1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="47.300" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="Cpu_1v05_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0060/hwmon/hwmon*/curr2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="15.400" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="Cpu_CORE_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0060/hwmon/hwmon*/in2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="2.184" />
+            <property name="dcdc_min"   gettype="config" value="1.456" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="Cpu_1v05_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0060/hwmon/hwmon*/in3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.260" />
+            <property name="dcdc_min"   gettype="config" value="0.840" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="Switch_CORE_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0064/hwmon/hwmon*/curr2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="220.000" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="Switch_ANALOG_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0064/hwmon/hwmon*/curr3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="18.000" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="Switch_CORE_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0064/hwmon/hwmon*/in2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.200" />
+            <property name="dcdc_min"   gettype="config" value="0.600" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="Switch_ANALOG_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0064/hwmon/hwmon*/in3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="0.960" />
+            <property name="dcdc_min"   gettype="config" value="0.640" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="Cpu_1v2_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-006c/hwmon/hwmon*/curr1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="9.900" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="Cpu_2v23_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-006c/hwmon/hwmon*/curr2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="2.200" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="Cpu_1v2_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-006c/hwmon/hwmon*/in2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.440" />
+            <property name="dcdc_min"   gettype="config" value="0.960" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="Cpu_2v23_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-006c/hwmon/hwmon*/in3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="2.676" />
+            <property name="dcdc_min"   gettype="config" value="1.784" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+    </dcdcs>
+    <mactemps>
+        <mactemp id="MAC_DIE_0" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/3-0044/hwmon/hwmon*/temp1_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_1" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/3-0044/hwmon/hwmon*/temp2_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_2" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/3-0044/hwmon/hwmon*/temp3_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_3" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/3-0044/hwmon/hwmon*/temp4_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_4" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/3-0044/hwmon/hwmon*/temp5_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_5" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/3-0044/hwmon/hwmon*/temp6_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_6" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/3-0044/hwmon/hwmon*/temp7_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_7" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/3-0044/hwmon/hwmon*/temp8_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_8" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/3-0044/hwmon/hwmon*/temp9_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_9" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/3-0044/hwmon/hwmon*/temp10_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_10" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/3-0044/hwmon/hwmon*/temp11_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_11" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/3-0044/hwmon/hwmon*/temp12_input"  type="1"/>
+        </mactemp>
+    </mactemps>
+    <cpus location="/sys/class/hwmon/hwmon0"/>
+    <decode>
+    <fanpresent>
+        <code key="1" value="PRESENT"/>
+        <code key="0" value="ABSENT"/>
+    </fanpresent>
+    <fanstatus>
+        <code key="1" value="OK"/>
+        <code key="0" value="NOT OK"/>
+    </fanstatus>
+    <psucheck>
+        <code key="1" value="PRESENT"/>
+        <code key="0" value="ABSENT"/>
+    </psucheck>
+    <psustatus>
+        <code key="1" value="OK"/>
+        <code key="0" value="NOT OK"/>
+    </psustatus>
+    <psutype>
+        <code key="CSU550AP-3-500" value="PA550II-F"/>
+        <code key="DPS-550AB-39 A" value="PA550II-F"/>
+        <code key="GW-CRPS550N2C" value="PA550II-F"/>
+        <code key="CSU550AP-3-300" value="PA550II-F"/>
+        <code key="DPS-550AB-39 B" value="PA550II-F"/>
+        <code key="CSU550AP-3" value="PA550II-F"/>
+        <code key="CSU550AP-3-501" value="PA550II-R"/>
+        <code key="DPS-550AB-40 A" value="PA550II-R"/>
+        <code key="GW-CRPS550N2RC" value="PA550II-R"/>
+        <code key="U1D-D10800-DRB" value="PD800I-F"/>
+    </psutype>
+    <fan_display_name>
+        <code key="M1HFAN III-F" value="M1HFAN III-F"/>
+        <code key="M1HFAN III-R" value="M1HFAN III-R"/>
+    </fan_display_name>
+    </decode>
+</catalog>
+
diff --git a/device/micas/x86_64-micas_m2-w6510-48v8c-r0/fru.py b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/fru.py
new file mode 100644
index 000000000..f95164e03
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/fru.py
@@ -0,0 +1,961 @@
+#!/usr/bin/python3
+import collections
+from datetime import datetime, timedelta
+from bitarray import bitarray
+
+
+__DEBUG__ = "N"
+
+
+class FruException(Exception):
+    def __init__(self, message='fruerror', code=-100):
+        err = 'errcode: {0} message:{1}'.format(code, message)
+        Exception.__init__(self, err)
+        self.code = code
+        self.message = message
+
+
+def e_print(err):
+    print("ERROR: " + err)
+
+
+def d_print(debug_info):
+    if __DEBUG__ == "Y":
+        print(debug_info)
+
+
+class FruUtil():
+    @staticmethod
+    def decodeLength(value):
+        a = bitarray(8)
+        a.setall(True)
+        a[0:1] = 0
+        a[1:2] = 0
+        x = ord(a.tobytes())
+        return x & ord(value)
+
+    @staticmethod
+    def minToData():
+        starttime = datetime(1996, 1, 1, 0, 0, 0)
+        endtime = datetime.now()
+        seconds = (endtime - starttime).total_seconds()
+        mins = seconds // 60
+        m = int(round(mins))
+        return m
+
+    @staticmethod
+    def getTimeFormat():
+        return datetime.now().strftime('%Y-%m-%d')
+
+    @staticmethod
+    def getTypeLength(value):
+        if value is None or len(value) == 0:
+            return 0
+        a = bitarray(8)
+        a.setall(False)
+        a[0:1] = 1
+        a[1:2] = 1
+        x = ord(a.tobytes())
+        return x | len(value)
+
+    @staticmethod
+    def checksum(b):
+        result = 0
+        for item in b:
+            result += ord(item)
+        return (0x100 - (result & 0xff)) & 0xff
+
+
+class BaseArea(object):
+    SUGGESTED_SIZE_COMMON_HEADER = 8
+    SUGGESTED_SIZE_INTERNAL_USE_AREA = 72
+    SUGGESTED_SIZE_CHASSIS_INFO_AREA = 32
+    SUGGESTED_SIZE_BOARD_INFO_AREA = 80
+    SUGGESTED_SIZE_PRODUCT_INFO_AREA = 80
+
+    INITVALUE = b'\x00'
+    resultvalue = INITVALUE * 256
+    COMMON_HEAD_VERSION = b'\x01'
+    __childList = None
+
+    def __init__(self, name="", size=0, offset=0):
+        self.__childList = []
+        self._offset = offset
+        self.name = name
+        self._size = size
+        self._isPresent = False
+        self._data = b'\x00' * size
+
+    @property
+    def childList(self):
+        return self.__childList
+
+    @childList.setter
+    def childList(self, value):
+        self.__childList = value
+
+    @property
+    def offset(self):
+        return self._offset
+
+    @offset.setter
+    def offset(self, value):
+        self._offset = value
+
+    @property
+    def size(self):
+        return self._size
+
+    @size.setter
+    def size(self, value):
+        self._size = value
+
+    @property
+    def data(self):
+        return self._data
+
+    @data.setter
+    def data(self, value):
+        self._data = value
+
+    @property
+    def isPresent(self):
+        return self._isPresent
+
+    @isPresent.setter
+    def isPresent(self, value):
+        self._isPresent = value
+
+
+class InternalUseArea(BaseArea):
+    pass
+
+
+class ChassisInfoArea(BaseArea):
+    pass
+
+
+class BoardInfoArea(BaseArea):
+    _boardTime = None
+    _fields = None
+    _mfg_date = None
+    areaversion = None
+    _boardversion = None
+    _language = None
+
+    def __str__(self):
+        formatstr = "version             : %x\n" \
+                    "length              : %d \n" \
+                    "language            : %x \n" \
+                    "mfg_date            : %s \n" \
+                    "boardManufacturer   : %s \n" \
+                    "boardProductName    : %s \n" \
+                    "boardSerialNumber   : %s \n" \
+                    "boardPartNumber     : %s \n" \
+                    "fruFileId           : %s \n"
+
+        tmpstr = formatstr % (ord(self.boardversion), self.size,
+                              self.language, self.getMfgRealData(),
+                              self.boardManufacturer, self.boardProductName,
+                              self.boardSerialNumber, self.boardPartNumber,
+                              self.fruFileId)
+        for i in range(1, 11):
+            valtmp = "boardextra%d" % i
+            if hasattr(self, valtmp):
+                valtmpval = getattr(self, valtmp)
+                tmpstr += "boardextra%d         : %s \n" % (i, valtmpval)
+            else:
+                break
+
+        return tmpstr
+
+    def todict(self):
+        dic = collections.OrderedDict()
+        dic["boardversion"] = ord(self.boardversion)
+        dic["boardlength"] = self.size
+        dic["boardlanguage"] = self.language
+        dic["boardmfg_date"] = self.getMfgRealData()
+        dic["boardManufacturer"] = self.boardManufacturer
+        dic["boardProductName"] = self.boardProductName
+        dic["boardSerialNumber"] = self.boardSerialNumber
+        dic["boardPartNumber"] = self.boardPartNumber
+        dic["boardfruFileId"] = self.fruFileId
+        for i in range(1, 11):
+            valtmp = "boardextra%d" % i
+            if hasattr(self, valtmp):
+                valtmpval = getattr(self, valtmp)
+                dic[valtmp] = valtmpval
+            else:
+                break
+        return dic
+
+    def decodedata(self):
+        index = 0
+        self.areaversion = self.data[index]
+        index += 1
+        d_print("decode length :%d class size:%d" %
+                ((ord(self.data[index]) * 8), self.size))
+        index += 2
+
+        timetmp = self.data[index: index + 3]
+        self.mfg_date = ord(timetmp[0]) | (
+            ord(timetmp[1]) << 8) | (ord(timetmp[2]) << 16)
+        d_print("decode getMfgRealData :%s" % self.getMfgRealData())
+        index += 3
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.boardManufacturer = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode boardManufacturer:%s" % self.boardManufacturer)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.boardProductName = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode boardProductName:%s" % self.boardProductName)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.boardSerialNumber = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode boardSerialNumber:%s" % self.boardSerialNumber)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.boardPartNumber = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode boardPartNumber:%s" % self.boardPartNumber)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.fruFileId = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode fruFileId:%s" % self.fruFileId)
+
+        for i in range(1, 11):
+            valtmp = "boardextra%d" % i
+            if self.data[index] != chr(0xc1):
+                templen = FruUtil.decodeLength(self.data[index])
+                tmpval = self.data[index + 1: index + templen + 1]
+                setattr(self, valtmp, tmpval)
+                index += templen + 1
+                d_print("decode boardextra%d:%s" % (i, tmpval))
+            else:
+                break
+
+    def fruSetValue(self, field, value):
+        tmp_field = getattr(self, field, None)
+        if tmp_field is not None:
+            setattr(self, field, value)
+
+    def recalcute(self):
+        d_print("boardInfoArea version:%x" % ord(self.boardversion))
+        d_print("boardInfoArea length:%d" % self.size)
+        d_print("boardInfoArea language:%x" % self.language)
+        self.mfg_date = FruUtil.minToData()
+        d_print("boardInfoArea mfg_date:%x" % self.mfg_date)
+
+        self.data = chr(ord(self.boardversion)) + \
+            chr(self.size // 8) + chr(self.language)
+
+        self.data += chr(self.mfg_date & 0xFF)
+        self.data += chr((self.mfg_date >> 8) & 0xFF)
+        self.data += chr((self.mfg_date >> 16) & 0xFF)
+
+        d_print("boardInfoArea boardManufacturer:%s" % self.boardManufacturer)
+        typelength = FruUtil.getTypeLength(self.boardManufacturer)
+        self.data += chr(typelength)
+        self.data += self.boardManufacturer
+
+        d_print("boardInfoArea boardProductName:%s" % self.boardProductName)
+        self.data += chr(FruUtil.getTypeLength(self.boardProductName))
+        self.data += self.boardProductName
+
+        d_print("boardInfoArea boardSerialNumber:%s" % self.boardSerialNumber)
+        self.data += chr(FruUtil.getTypeLength(self.boardSerialNumber))
+        self.data += self.boardSerialNumber
+
+        d_print("boardInfoArea boardPartNumber:%s" % self.boardPartNumber)
+        self.data += chr(FruUtil.getTypeLength(self.boardPartNumber))
+        self.data += self.boardPartNumber
+
+        d_print("boardInfoArea fruFileId:%s" % self.fruFileId)
+        self.data += chr(FruUtil.getTypeLength(self.fruFileId))
+        self.data += self.fruFileId
+
+        for i in range(1, 11):
+            valtmp = "boardextra%d" % i
+            if hasattr(self, valtmp):
+                valtmpval = getattr(self, valtmp)
+                d_print("boardInfoArea boardextra%d:%s" % (i, valtmpval))
+                self.data += chr(FruUtil.getTypeLength(valtmpval))
+                if valtmpval is not None:
+                    self.data += valtmpval
+            else:
+                break
+
+        self.data += chr(0xc1)
+
+        if len(self.data) > (self.size - 1):
+            incr = (len(self.data) - self.size) // 8 + 1
+            self.size += incr * 8
+
+        self.data = self.data[0:1] + chr(self.size // 8) + self.data[2:]
+        d_print("self data:%d" % len(self.data))
+        d_print("self size:%d" % self.size)
+        d_print("adjust size:%d" % (self.size - len(self.data) - 1))
+        self.data = self.data.ljust((self.size - 1), chr(self.INITVALUE[0]))
+
+        # checksum
+        checksum = FruUtil.checksum(self.data)
+        d_print("board info checksum:%x" % checksum)
+        self.data += chr(checksum)
+
+    def getMfgRealData(self):
+        starttime = datetime(1996, 1, 1, 0, 0, 0)
+        mactime = starttime + timedelta(minutes=self.mfg_date)
+        return mactime
+
+    @property
+    def language(self):
+        self._language = 25
+        return self._language
+
+    @property
+    def mfg_date(self):
+        return self._mfg_date
+
+    @mfg_date.setter
+    def mfg_date(self, val):
+        self._mfg_date = val
+
+    @property
+    def boardversion(self):
+        self._boardversion = self.COMMON_HEAD_VERSION
+        return self._boardversion
+
+    @property
+    def fruFileId(self):
+        return self._FRUFileID
+
+    @fruFileId.setter
+    def fruFileId(self, val):
+        self._FRUFileID = val
+
+    @property
+    def boardPartNumber(self):
+        return self._boardPartNumber
+
+    @boardPartNumber.setter
+    def boardPartNumber(self, val):
+        self._boardPartNumber = val
+
+    @property
+    def boardSerialNumber(self):
+        return self._boardSerialNumber
+
+    @boardSerialNumber.setter
+    def boardSerialNumber(self, val):
+        self._boardSerialNumber = val
+
+    @property
+    def boardProductName(self):
+        return self._boradProductName
+
+    @boardProductName.setter
+    def boardProductName(self, val):
+        self._boradProductName = val
+
+    @property
+    def boardManufacturer(self):
+        return self._boardManufacturer
+
+    @boardManufacturer.setter
+    def boardManufacturer(self, val):
+        self._boardManufacturer = val
+
+    @property
+    def boardTime(self):
+        return self._boardTime
+
+    @boardTime.setter
+    def boardTime(self, val):
+        self._boardTime = val
+
+    @property
+    def fields(self):
+        return self._fields
+
+    @fields.setter
+    def fields(self, val):
+        self._fields = val
+
+
+class ProductInfoArea(BaseArea):
+    _productManufacturer = None
+    _productAssetTag = None
+    _FRUFileID = None
+    _language = None
+
+    def __str__(self):
+        formatstr = "version             : %x\n" \
+                    "length              : %d \n" \
+                    "language            : %x \n" \
+                    "productManufacturer : %s \n" \
+                    "productName         : %s \n" \
+                    "productPartModelName: %s \n" \
+                    "productVersion      : %s \n" \
+                    "productSerialNumber : %s \n" \
+                    "productAssetTag     : %s \n" \
+                    "fruFileId           : %s \n"
+
+        tmpstr = formatstr % (ord(self.areaversion), self.size,
+                              self.language, self.productManufacturer,
+                              self.productName, self.productPartModelName,
+                              self.productVersion, self.productSerialNumber,
+                              self.productAssetTag, self.fruFileId)
+
+        for i in range(1, 11):
+            valtmp = "productextra%d" % i
+            if hasattr(self, valtmp):
+                valtmpval = getattr(self, valtmp)
+                tmpstr += "productextra%d       : %s \n" % (i, valtmpval)
+            else:
+                break
+
+        return tmpstr
+
+    def todict(self):
+        dic = collections.OrderedDict()
+        dic["productversion"] = ord(self.areaversion)
+        dic["productlength"] = self.size
+        dic["productlanguage"] = self.language
+        dic["productManufacturer"] = self.productManufacturer
+        dic["productName"] = self.productName
+        dic["productPartModelName"] = self.productPartModelName
+        dic["productVersion"] = int(self.productVersion, 16)
+        dic["productSerialNumber"] = self.productSerialNumber
+        dic["productAssetTag"] = self.productAssetTag
+        dic["productfruFileId"] = self.fruFileId
+        for i in range(1, 11):
+            valtmp = "productextra%d" % i
+            if hasattr(self, valtmp):
+                valtmpval = getattr(self, valtmp)
+                dic[valtmp] = valtmpval
+            else:
+                break
+        return dic
+
+    def decodedata(self):
+        index = 0
+        self.areaversion = self.data[index]  # 0
+        index += 1
+        d_print("decode length %d" % (ord(self.data[index]) * 8))
+        d_print("class size %d" % self.size)
+        index += 2
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.productManufacturer = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode productManufacturer:%s" % self.productManufacturer)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.productName = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode productName:%s" % self.productName)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.productPartModelName = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode productPartModelName:%s" % self.productPartModelName)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.productVersion = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode productVersion:%s" % self.productVersion)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.productSerialNumber = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode productSerialNumber:%s" % self.productSerialNumber)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.productAssetTag = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode productAssetTag:%s" % self.productAssetTag)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.fruFileId = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode fruFileId:%s" % self.fruFileId)
+
+        for i in range(1, 11):
+            valtmp = "productextra%d" % i
+            if self.data[index] != chr(0xc1) and index < self.size - 1:
+                templen = FruUtil.decodeLength(self.data[index])
+                if templen == 0:
+                    break
+                tmpval = self.data[index + 1: index + templen + 1]
+                d_print("decode boardextra%d:%s" % (i, tmpval))
+                setattr(self, valtmp, tmpval)
+                index += templen + 1
+            else:
+                break
+
+    @property
+    def productVersion(self):
+        return self._productVersion
+
+    @productVersion.setter
+    def productVersion(self, name):
+        self._productVersion = name
+
+    @property
+    def areaversion(self):
+        self._areaversion = self.COMMON_HEAD_VERSION
+        return self._areaversion
+
+    @areaversion.setter
+    def areaversion(self, name):
+        self._areaversion = name
+
+    @property
+    def language(self):
+        self._language = 25
+        return self._language
+
+    @property
+    def productManufacturer(self):
+        return self._productManufacturer
+
+    @productManufacturer.setter
+    def productManufacturer(self, name):
+        self._productManufacturer = name
+
+    @property
+    def productName(self):
+        return self._productName
+
+    @productName.setter
+    def productName(self, name):
+        self._productName = name
+
+    @property
+    def productPartModelName(self):
+        return self._productPartModelName
+
+    @productPartModelName.setter
+    def productPartModelName(self, name):
+        self._productPartModelName = name
+
+    @property
+    def productSerialNumber(self):
+        return self._productSerialNumber
+
+    @productSerialNumber.setter
+    def productSerialNumber(self, name):
+        self._productSerialNumber = name
+
+    @property
+    def productAssetTag(self):
+        return self._productAssetTag
+
+    @productAssetTag.setter
+    def productAssetTag(self, name):
+        self._productAssetTag = name
+
+    @property
+    def fruFileId(self):
+        return self._FRUFileID
+
+    @fruFileId.setter
+    def fruFileId(self, name):
+        self._FRUFileID = name
+
+    def fruSetValue(self, field, value):
+        tmp_field = getattr(self, field, None)
+        if tmp_field is not None:
+            setattr(self, field, value)
+
+    def recalcute(self):
+        d_print("product version:%x" % ord(self.areaversion))
+        d_print("product length:%d" % self.size)
+        d_print("product language:%x" % self.language)
+        self.data = chr(ord(self.areaversion)) + \
+            chr(self.size // 8) + chr(self.language)
+
+        typelength = FruUtil.getTypeLength(self.productManufacturer)
+        self.data += chr(typelength)
+        self.data += self.productManufacturer
+
+        self.data += chr(FruUtil.getTypeLength(self.productName))
+        self.data += self.productName
+
+        self.data += chr(FruUtil.getTypeLength(self.productPartModelName))
+        self.data += self.productPartModelName
+
+        self.data += chr(FruUtil.getTypeLength(self.productVersion))
+        self.data += self.productVersion
+
+        self.data += chr(FruUtil.getTypeLength(self.productSerialNumber))
+        self.data += self.productSerialNumber
+
+        self.data += chr(FruUtil.getTypeLength(self.productAssetTag))
+        if self.productAssetTag is not None:
+            self.data += self.productAssetTag
+
+        self.data += chr(FruUtil.getTypeLength(self.fruFileId))
+        self.data += self.fruFileId
+
+        for i in range(1, 11):
+            valtmp = "productextra%d" % i
+            if hasattr(self, valtmp):
+                valtmpval = getattr(self, valtmp)
+                d_print("boardInfoArea productextra%d:%s" % (i, valtmpval))
+                self.data += chr(FruUtil.getTypeLength(valtmpval))
+                if valtmpval is not None:
+                    self.data += valtmpval
+            else:
+                break
+
+        self.data += chr(0xc1)
+        if len(self.data) > (self.size - 1):
+            incr = (len(self.data) - self.size) // 8 + 1
+            self.size += incr * 8
+        d_print("self.data:%d" % len(self.data))
+        d_print("self.size:%d" % self.size)
+
+        self.data = self.data[0:1] + chr(self.size // 8) + self.data[2:]
+        self.data = self.data.ljust((self.size - 1), chr(self.INITVALUE[0]))
+        checksum = FruUtil.checksum(self.data)
+        d_print("board info checksum:%x" % checksum)
+        self.data += chr(checksum)
+
+
+class MultiRecordArea(BaseArea):
+    pass
+
+
+class Field(object):
+
+    def __init__(self, fieldType="ASCII", fieldData=""):
+        self.fieldData = fieldData
+        self.fieldType = fieldType
+
+    @property
+    def fieldType(self):
+        return self.fieldType
+
+    @property
+    def fieldData(self):
+        return self.fieldData
+
+
+class ipmifru(BaseArea):
+    _BoardInfoArea = None
+    _ProductInfoArea = None
+    _InternalUseArea = None
+    _ChassisInfoArea = None
+    _multiRecordArea = None
+    _productinfoAreaOffset = BaseArea.INITVALUE
+    _boardInfoAreaOffset = BaseArea.INITVALUE
+    _internalUserAreaOffset = BaseArea.INITVALUE
+    _chassicInfoAreaOffset = BaseArea.INITVALUE
+    _multiRecordAreaOffset = BaseArea.INITVALUE
+    _bindata = None
+    _bodybin = None
+    _version = BaseArea.COMMON_HEAD_VERSION
+    _zeroCheckSum = None
+    _frusize = 256
+
+    def __str__(self):
+        tmpstr = ""
+        if self.boardInfoArea.isPresent:
+            tmpstr += "\nboardinfoarea: \n"
+            tmpstr += self.boardInfoArea.__str__()
+        if self.productInfoArea.isPresent:
+            tmpstr += "\nproductinfoarea: \n"
+            tmpstr += self.productInfoArea.__str__()
+        return tmpstr
+
+    def decodeBin(self, eeprom):
+        commonHead = eeprom[0:8]
+        d_print("decode version %x" % ord(commonHead[0]))
+        if ord(self.COMMON_HEAD_VERSION) != ord(commonHead[0]):
+            raise FruException("HEAD VERSION error,not Fru format!", -10)
+        if FruUtil.checksum(commonHead[0:7]) != ord(commonHead[7]):
+            strtemp = "check header checksum error [cal:%02x data:%02x]" % (
+                FruUtil.checksum(commonHead[0:7]), ord(commonHead[7]))
+            raise FruException(strtemp, -3)
+        if ord(commonHead[1]) != ord(self.INITVALUE):
+            d_print("Internal Use Area is present")
+            self.internalUseArea = InternalUseArea(
+                name="Internal Use Area", size=self.SUGGESTED_SIZE_INTERNAL_USE_AREA)
+            self.internalUseArea.isPresent = True
+            self.internalUserAreaOffset = ord(commonHead[1])
+            self.internalUseArea.data = eeprom[self.internalUserAreaOffset * 8: (
+                self.internalUserAreaOffset * 8 + self.internalUseArea.size)]
+        if ord(commonHead[2]) != ord(self.INITVALUE):
+            d_print("Chassis Info Area is present")
+            self.chassisInfoArea = ChassisInfoArea(
+                name="Chassis Info Area", size=self.SUGGESTED_SIZE_CHASSIS_INFO_AREA)
+            self.chassisInfoArea.isPresent = True
+            self.chassicInfoAreaOffset = ord(commonHead[2])
+            self.chassisInfoArea.data = eeprom[self.chassicInfoAreaOffset * 8: (
+                self.chassicInfoAreaOffset * 8 + self.chassisInfoArea.size)]
+        if ord(commonHead[3]) != ord(self.INITVALUE):
+            self.boardInfoArea = BoardInfoArea(
+                name="Board Info Area", size=self.SUGGESTED_SIZE_BOARD_INFO_AREA)
+            self.boardInfoArea.isPresent = True
+            self.boardInfoAreaOffset = ord(commonHead[3])
+            self.boardInfoArea.size = ord(
+                eeprom[self.boardInfoAreaOffset * 8 + 1]) * 8
+            d_print("Board Info Area is present size:%d" %
+                    (self.boardInfoArea.size))
+            self.boardInfoArea.data = eeprom[self.boardInfoAreaOffset * 8: (
+                self.boardInfoAreaOffset * 8 + self.boardInfoArea.size)]
+            if FruUtil.checksum(self.boardInfoArea.data[:-1]) != ord(self.boardInfoArea.data[-1:]):
+                strtmp = "check boardInfoArea checksum error[cal:%02x data:%02x]" %  \
+                    (FruUtil.checksum(
+                        self.boardInfoArea.data[:-1]), ord(self.boardInfoArea.data[-1:]))
+                raise FruException(strtmp, -3)
+            self.boardInfoArea.decodedata()
+        if ord(commonHead[4]) != ord(self.INITVALUE):
+            d_print("Product Info Area is present")
+            self.productInfoArea = ProductInfoArea(
+                name="Product Info Area ", size=self.SUGGESTED_SIZE_PRODUCT_INFO_AREA)
+            self.productInfoArea.isPresent = True
+            self.productinfoAreaOffset = ord(commonHead[4])
+            d_print("length offset value: %02x" %
+                    ord(eeprom[self.productinfoAreaOffset * 8 + 1]))
+            self.productInfoArea.size = ord(
+                eeprom[self.productinfoAreaOffset * 8 + 1]) * 8
+            d_print("Product Info Area is present size:%d" %
+                    (self.productInfoArea.size))
+
+            self.productInfoArea.data = eeprom[self.productinfoAreaOffset * 8: (
+                self.productinfoAreaOffset * 8 + self.productInfoArea.size)]
+            if FruUtil.checksum(self.productInfoArea.data[:-1]) != ord(self.productInfoArea.data[-1:]):
+                strtmp = "check productInfoArea checksum error [cal:%02x data:%02x]" % (
+                    FruUtil.checksum(self.productInfoArea.data[:-1]), ord(self.productInfoArea.data[-1:]))
+                raise FruException(strtmp, -3)
+            self.productInfoArea.decodedata()
+        if ord(commonHead[5]) != ord(self.INITVALUE):
+            self.multiRecordArea = MultiRecordArea(
+                name="MultiRecord record Area ")
+            d_print("MultiRecord record present")
+            self.multiRecordArea.isPresent = True
+            self.multiRecordAreaOffset = ord(commonHead[5])
+            self.multiRecordArea.data = eeprom[self.multiRecordAreaOffset * 8: (
+                self.multiRecordAreaOffset * 8 + self.multiRecordArea.size)]
+
+    def initDefault(self):
+        self.version = self.COMMON_HEAD_VERSION
+        self.internalUserAreaOffset = self.INITVALUE
+        self.chassicInfoAreaOffset = self.INITVALUE
+        self.boardInfoAreaOffset = self.INITVALUE
+        self.productinfoAreaOffset = self.INITVALUE
+        self.multiRecordAreaOffset = self.INITVALUE
+        self.zeroCheckSum = self.INITVALUE
+        self.offset = self.SUGGESTED_SIZE_COMMON_HEADER
+        self.productInfoArea = None
+        self.internalUseArea = None
+        self.boardInfoArea = None
+        self.chassisInfoArea = None
+        self.multiRecordArea = None
+        # self.recalcute()
+
+    @property
+    def version(self):
+        return self._version
+
+    @version.setter
+    def version(self, name):
+        self._version = name
+
+    @property
+    def internalUserAreaOffset(self):
+        return self._internalUserAreaOffset
+
+    @internalUserAreaOffset.setter
+    def internalUserAreaOffset(self, obj):
+        self._internalUserAreaOffset = obj
+
+    @property
+    def chassicInfoAreaOffset(self):
+        return self._chassicInfoAreaOffset
+
+    @chassicInfoAreaOffset.setter
+    def chassicInfoAreaOffset(self, obj):
+        self._chassicInfoAreaOffset = obj
+
+    @property
+    def productinfoAreaOffset(self):
+        return self._productinfoAreaOffset
+
+    @productinfoAreaOffset.setter
+    def productinfoAreaOffset(self, obj):
+        self._productinfoAreaOffset = obj
+
+    @property
+    def boardInfoAreaOffset(self):
+        return self._boardInfoAreaOffset
+
+    @boardInfoAreaOffset.setter
+    def boardInfoAreaOffset(self, obj):
+        self._boardInfoAreaOffset = obj
+
+    @property
+    def multiRecordAreaOffset(self):
+        return self._multiRecordAreaOffset
+
+    @multiRecordAreaOffset.setter
+    def multiRecordAreaOffset(self, obj):
+        self._multiRecordAreaOffset = obj
+
+    @property
+    def zeroCheckSum(self):
+        return self._zeroCheckSum
+
+    @zeroCheckSum.setter
+    def zeroCheckSum(self, obj):
+        self._zeroCheckSum = obj
+
+    @property
+    def productInfoArea(self):
+        return self._ProductInfoArea
+
+    @productInfoArea.setter
+    def productInfoArea(self, obj):
+        self._ProductInfoArea = obj
+
+    @property
+    def internalUseArea(self):
+        return self._InternalUseArea
+
+    @internalUseArea.setter
+    def internalUseArea(self, obj):
+        self.internalUseArea = obj
+
+    @property
+    def boardInfoArea(self):
+        return self._BoardInfoArea
+
+    @boardInfoArea.setter
+    def boardInfoArea(self, obj):
+        self._BoardInfoArea = obj
+
+    @property
+    def chassisInfoArea(self):
+        return self._ChassisInfoArea
+
+    @chassisInfoArea.setter
+    def chassisInfoArea(self, obj):
+        self._ChassisInfoArea = obj
+
+    @property
+    def multiRecordArea(self):
+        return self._multiRecordArea
+
+    @multiRecordArea.setter
+    def multiRecordArea(self, obj):
+        self._multiRecordArea = obj
+
+    @property
+    def bindata(self):
+        return self._bindata
+
+    @bindata.setter
+    def bindata(self, obj):
+        self._bindata = obj
+
+    @property
+    def bodybin(self):
+        return self._bodybin
+
+    @bodybin.setter
+    def bodybin(self, obj):
+        self._bodybin = obj
+
+    def recalcuteCommonHead(self):
+        self.bindata = ""
+        self.offset = self.SUGGESTED_SIZE_COMMON_HEADER
+        d_print("common Header %d" % self.offset)
+        d_print("fru eeprom size  %d" % self._frusize)
+        if self.internalUseArea is not None and self.internalUseArea.isPresent:
+            self.internalUserAreaOffset = self.offset // 8
+            self.offset += self.internalUseArea.size
+            d_print("internalUseArea is present offset:%d" % self.offset)
+
+        if self.chassisInfoArea is not None and self.chassisInfoArea.isPresent:
+            self.chassicInfoAreaOffset = self.offset // 8
+            self.offset += self.chassisInfoArea.size
+            d_print("chassisInfoArea is present offset:%d" % self.offset)
+
+        if self.boardInfoArea is not None and self.boardInfoArea.isPresent:
+            self.boardInfoAreaOffset = self.offset // 8
+            self.offset += self.boardInfoArea.size
+            d_print("boardInfoArea is present offset:%d" % self.offset)
+            d_print("boardInfoArea is present size:%d" %
+                    self.boardInfoArea.size)
+
+        if self.productInfoArea is not None and self.productInfoArea.isPresent:
+            self.productinfoAreaOffset = self.offset // 8
+            self.offset += self.productInfoArea.size
+            d_print("productInfoArea is present offset:%d" % self.offset)
+
+        if self.multiRecordArea is not None and self.multiRecordArea.isPresent:
+            self.multiRecordAreaOffset = self.offset // 8
+            d_print("multiRecordArea is present offset:%d" % self.offset)
+
+        if self.internalUserAreaOffset == self.INITVALUE:
+            self.internalUserAreaOffset = 0
+        if self.productinfoAreaOffset == self.INITVALUE:
+            self.productinfoAreaOffset = 0
+        if self.chassicInfoAreaOffset == self.INITVALUE:
+            self.chassicInfoAreaOffset = 0
+        if self.boardInfoAreaOffset == self.INITVALUE:
+            self.boardInfoAreaOffset = 0
+        if self.multiRecordAreaOffset == self.INITVALUE:
+            self.multiRecordAreaOffset = 0
+
+        self.zeroCheckSum = (0x100 - ord(self.version) - self.internalUserAreaOffset - self.chassicInfoAreaOffset - self.productinfoAreaOffset
+                             - self.boardInfoAreaOffset - self.multiRecordAreaOffset) & 0xff
+        d_print("zerochecksum:%x" % self.zeroCheckSum)
+        self.data = ""
+        self.data += chr(self.version[0]) + chr(self.internalUserAreaOffset) + chr(self.chassicInfoAreaOffset) + chr(
+            self.boardInfoAreaOffset) + chr(self.productinfoAreaOffset) + chr(self.multiRecordAreaOffset) + chr(self.INITVALUE[0]) + chr(self.zeroCheckSum)
+
+        self.bindata = self.data + self.bodybin
+        totallen = len(self.bindata)
+        d_print("totallen %d" % totallen)
+        if totallen < self._frusize:
+            self.bindata = self.bindata.ljust(self._frusize, chr(self.INITVALUE[0]))
+        else:
+            raise FruException('bin data more than %d' % self._frusize, -2)
+
+    def recalcutebin(self):
+        self.bodybin = ""
+        if self.internalUseArea is not None and self.internalUseArea.isPresent:
+            d_print("internalUseArea present")
+            self.bodybin += self.internalUseArea.data
+        if self.chassisInfoArea is not None and self.chassisInfoArea.isPresent:
+            d_print("chassisInfoArea present")
+            self.bodybin += self.chassisInfoArea.data
+        if self.boardInfoArea is not None and self.boardInfoArea.isPresent:
+            d_print("boardInfoArea present")
+            self.boardInfoArea.recalcute()
+            self.bodybin += self.boardInfoArea.data
+        if self.productInfoArea is not None and self.productInfoArea.isPresent:
+            d_print("productInfoAreapresent")
+            self.productInfoArea.recalcute()
+            self.bodybin += self.productInfoArea.data
+        if self.multiRecordArea is not None and self.multiRecordArea.isPresent:
+            d_print("multiRecordArea present")
+            self.bodybin += self.productInfoArea.data
+
+    def recalcute(self, fru_eeprom_size=256):
+        self._frusize = fru_eeprom_size
+        self.recalcutebin()
+        self.recalcuteCommonHead()
+
+    def setValue(self, area, field, value):
+        tmp_area = getattr(self, area, None)
+        if tmp_area is not None:
+            tmp_area.fruSetValue(field, value)
diff --git a/device/micas/x86_64-micas_m2-w6510-48v8c-r0/hwsku.json b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/hwsku.json
new file mode 100644
index 000000000..9a5a4d2b6
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/hwsku.json
@@ -0,0 +1,172 @@
+{
+	"interfaces": {
+			"Ethernet1": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet2": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet3": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet4": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet5": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet6": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet7": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet8": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet9": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet10": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet11": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet12": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet13": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet14": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet15": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet16": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet17": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet18": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet19": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet20": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet21": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet22": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet23": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet24": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet25": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet26": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet27": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet28": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet29": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet30": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet31": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet32": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet33": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet34": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet35": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet36": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet37": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet38": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet39": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet40": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet41": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet42": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet43": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet44": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet45": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet46": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet47": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet48": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet49": {
+				"default_brkout_mode": "1x100G"
+			},
+			"Ethernet53": {
+				"default_brkout_mode": "1x100G"
+			},
+			"Ethernet57": {
+				"default_brkout_mode": "1x100G"
+			},
+			"Ethernet61": {
+				"default_brkout_mode": "1x100G"
+			},
+			"Ethernet65": {
+				"default_brkout_mode": "1x100G"
+			},
+			"Ethernet69": {
+				"default_brkout_mode": "1x100G"
+			},
+			"Ethernet73": {
+				"default_brkout_mode": "1x100G"
+			},
+			"Ethernet77": {
+				"default_brkout_mode": "1x100G"
+			}
+	}
+}
\ No newline at end of file
diff --git a/device/micas/x86_64-micas_m2-w6510-48v8c-r0/installer.conf b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/installer.conf
new file mode 100644
index 000000000..2a5d7d83f
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/installer.conf
@@ -0,0 +1,2 @@
+CONSOLE_SPEED=115200
+ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="intel_idle.max_cstate=0 idle=poll modprobe.blacklist=spi_intel,spi_intel_platform,spi_intel_pci"
diff --git a/device/micas/x86_64-micas_m2-w6510-48v8c-r0/led_proc_init.soc b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/led_proc_init.soc
new file mode 100755
index 000000000..59238f5cd
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/led_proc_init.soc
@@ -0,0 +1,7 @@
+m0 load 0 0x3800 /usr/share/sonic/platform/custom_led.bin
+
+led auto on
+
+led start
+
+linkscan SwPortBitMap=xe,ce
diff --git a/device/micas/x86_64-micas_m2-w6510-48v8c-r0/media_settings.json b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/media_settings.json
new file mode 100644
index 000000000..e848307fd
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/media_settings.json
@@ -0,0 +1,2020 @@
+{
+    "PORT_MEDIA_SETTINGS": {
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+                    "lane1": "0x0000000D",
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+                "main": {
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+                "post1": {
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+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
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+            }
+        },
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+            "Default": {
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+                    "lane0": "0x0000000F"
+                }
+            },
+            "SFP-10G-": {
+                "pre1": {
+                    "lane0": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000003C"
+                },
+                "post1": {
+                    "lane0": "0x00000004"
+                }
+            },
+            "SFP-GB-": {
+                "pre1": {
+                    "lane0": "0x00000002"
+                },
+                "main": {
+                    "lane0": "0x0000005F"
+                },
+                "post1": {
+                    "lane0": "0x00000003"
+                }
+            }
+        },
+        "40": {
+            "Default": {
+                "pre1": {
+                    "lane0": "0x0000000C"
+                },
+                "main": {
+                    "lane0": "0x0000004B"
+                },
+                "post1": {
+                    "lane0": "0x0000000D"
+                }
+            },
+            "SFP-10G-": {
+                "pre1": {
+                    "lane0": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000003C"
+                },
+                "post1": {
+                    "lane0": "0x00000004"
+                }
+            },
+            "SFP-GB-": {
+                "pre1": {
+                    "lane0": "0x00000002"
+                },
+                "main": {
+                    "lane0": "0x0000005F"
+                },
+                "post1": {
+                    "lane0": "0x00000003"
+                }
+            }
+        },
+        "41": {
+            "Default": {
+                "pre1": {
+                    "lane0": "0x0000000C"
+                },
+                "main": {
+                    "lane0": "0x0000004B"
+                },
+                "post1": {
+                    "lane0": "0x0000000D"
+                }
+            },
+            "SFP-10G-": {
+                "pre1": {
+                    "lane0": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000003C"
+                },
+                "post1": {
+                    "lane0": "0x00000004"
+                }
+            },
+            "SFP-GB-": {
+                "pre1": {
+                    "lane0": "0x00000002"
+                },
+                "main": {
+                    "lane0": "0x0000005F"
+                },
+                "post1": {
+                    "lane0": "0x00000003"
+                }
+            }
+        },
+        "42": {
+            "Default": {
+                "pre1": {
+                    "lane0": "0x0000000C"
+                },
+                "main": {
+                    "lane0": "0x0000004B"
+                },
+                "post1": {
+                    "lane0": "0x0000000D"
+                }
+            },
+            "SFP-10G-": {
+                "pre1": {
+                    "lane0": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000003C"
+                },
+                "post1": {
+                    "lane0": "0x00000004"
+                }
+            },
+            "SFP-GB-": {
+                "pre1": {
+                    "lane0": "0x00000002"
+                },
+                "main": {
+                    "lane0": "0x0000005F"
+                },
+                "post1": {
+                    "lane0": "0x00000003"
+                }
+            }
+        },
+        "43": {
+            "Default": {
+                "pre1": {
+                    "lane0": "0x0000000C"
+                },
+                "main": {
+                    "lane0": "0x0000004B"
+                },
+                "post1": {
+                    "lane0": "0x0000000D"
+                }
+            },
+            "SFP-10G-": {
+                "pre1": {
+                    "lane0": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000003C"
+                },
+                "post1": {
+                    "lane0": "0x00000004"
+                }
+            },
+            "SFP-GB-": {
+                "pre1": {
+                    "lane0": "0x00000002"
+                },
+                "main": {
+                    "lane0": "0x0000005F"
+                },
+                "post1": {
+                    "lane0": "0x00000003"
+                }
+            }
+        },
+        "44": {
+            "Default": {
+                "pre1": {
+                    "lane0": "0x0000000C"
+                },
+                "main": {
+                    "lane0": "0x0000004B"
+                },
+                "post1": {
+                    "lane0": "0x0000000D"
+                }
+            },
+            "SFP-10G-": {
+                "pre1": {
+                    "lane0": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000003C"
+                },
+                "post1": {
+                    "lane0": "0x00000004"
+                }
+            },
+            "SFP-GB-": {
+                "pre1": {
+                    "lane0": "0x00000002"
+                },
+                "main": {
+                    "lane0": "0x0000005F"
+                },
+                "post1": {
+                    "lane0": "0x00000003"
+                }
+            }
+        },
+        "45": {
+            "Default": {
+                "pre1": {
+                    "lane0": "0x0000000C"
+                },
+                "main": {
+                    "lane0": "0x0000004B"
+                },
+                "post1": {
+                    "lane0": "0x0000000D"
+                }
+            },
+            "SFP-10G-": {
+                "pre1": {
+                    "lane0": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000003C"
+                },
+                "post1": {
+                    "lane0": "0x00000004"
+                }
+            },
+            "SFP-GB-": {
+                "pre1": {
+                    "lane0": "0x00000002"
+                },
+                "main": {
+                    "lane0": "0x0000005F"
+                },
+                "post1": {
+                    "lane0": "0x00000003"
+                }
+            }
+        },
+        "46": {
+            "Default": {
+                "pre1": {
+                    "lane0": "0x0000000C"
+                },
+                "main": {
+                    "lane0": "0x0000004B"
+                },
+                "post1": {
+                    "lane0": "0x0000000D"
+                }
+            },
+            "SFP-10G-": {
+                "pre1": {
+                    "lane0": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000003C"
+                },
+                "post1": {
+                    "lane0": "0x00000004"
+                }
+            },
+            "SFP-GB-": {
+                "pre1": {
+                    "lane0": "0x00000002"
+                },
+                "main": {
+                    "lane0": "0x0000005F"
+                },
+                "post1": {
+                    "lane0": "0x00000003"
+                }
+            }
+        },
+        "47": {
+            "Default": {
+                "pre1": {
+                    "lane0": "0x0000000C"
+                },
+                "main": {
+                    "lane0": "0x0000004B"
+                },
+                "post1": {
+                    "lane0": "0x0000000D"
+                }
+            },
+            "SFP-10G-": {
+                "pre1": {
+                    "lane0": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000003C"
+                },
+                "post1": {
+                    "lane0": "0x00000004"
+                }
+            },
+            "SFP-GB-": {
+                "pre1": {
+                    "lane0": "0x00000002"
+                },
+                "main": {
+                    "lane0": "0x0000005F"
+                },
+                "post1": {
+                    "lane0": "0x00000003"
+                }
+            }
+        },
+        "48": {
+            "Default": {
+                "pre1": {
+                    "lane0": "0x0000000C"
+                },
+                "main": {
+                    "lane0": "0x0000004B"
+                },
+                "post1": {
+                    "lane0": "0x0000000D"
+                }
+            },
+            "SFP-10G-": {
+                "pre1": {
+                    "lane0": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000003C"
+                },
+                "post1": {
+                    "lane0": "0x00000004"
+                }
+            },
+            "SFP-GB-": {
+                "pre1": {
+                    "lane0": "0x00000002"
+                },
+                "main": {
+                    "lane0": "0x0000005F"
+                },
+                "post1": {
+                    "lane0": "0x00000003"
+                }
+            }
+        }
+    }
+}
\ No newline at end of file
diff --git a/device/micas/x86_64-micas_m2-w6510-48v8c-r0/monitor.py b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/monitor.py
new file mode 100644
index 000000000..7a97218a2
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/monitor.py
@@ -0,0 +1,402 @@
+#!/usr/bin/python3
+#   * onboard temperature sensors
+#   * FAN trays
+#   * PSU
+#
+import os
+from lxml import etree as ET
+import glob
+import json
+from decimal import Decimal
+from fru import ipmifru
+
+
+MAILBOX_DIR = "/sys/bus/i2c/devices/"
+BOARD_ID_PATH = "/sys/module/platform_common/parameters/dfd_my_type"
+BOARD_AIRFLOW_PATH = "/etc/sonic/.airflow"
+
+
+CONFIG_NAME = "dev.xml"
+
+
+def byteTostr(val):
+    strtmp = ''
+    for value in val:
+        strtmp += chr(value)
+    return strtmp
+
+
+def typeTostr(val):
+    if isinstance(val, bytes):
+        strtmp = byteTostr(val)
+        return strtmp
+    return val
+
+
+def get_board_id():
+    if not os.path.exists(BOARD_ID_PATH):
+        return "NA"
+    with open(BOARD_ID_PATH) as fd:
+        id_str = fd.read().strip()
+    return "0x%x" % (int(id_str, 10))
+
+
+def getboardairflow():
+    if not os.path.exists(BOARD_AIRFLOW_PATH):
+        return "NA"
+    with open(BOARD_AIRFLOW_PATH) as fd:
+        airflow_str = fd.read().strip()
+    data = json.loads(airflow_str)
+    airflow = data.get("board", "NA")
+    return airflow
+
+
+boardid = get_board_id()
+boardairflow = getboardairflow()
+
+
+DEV_XML_FILE_LIST = [
+    "dev_" + boardid + "_" + boardairflow + ".xml",
+    "dev_" + boardid + ".xml",
+    "dev_" + boardairflow + ".xml",
+]
+
+
+def dev_file_read(path, offset, read_len):
+    retval = "ERR"
+    val_list = []
+    msg = ""
+    ret = ""
+    fd = -1
+
+    if not os.path.exists(path):
+        return False, "%s %s not found" % (retval, path)
+
+    try:
+        fd = os.open(path, os.O_RDONLY)
+        os.lseek(fd, offset, os.SEEK_SET)
+        ret = os.read(fd, read_len)
+        for item in ret:
+            val_list.append(item)
+    except Exception as e:
+        msg = str(e)
+        return False, "%s %s" % (retval, msg)
+    finally:
+        if fd > 0:
+            os.close(fd)
+    return True, val_list
+
+
+def getPMCreg(location):
+    retval = 'ERR'
+    if not os.path.isfile(location):
+        return "%s %s  notfound" % (retval, location)
+    try:
+        with open(location, 'r') as fd:
+            retval = fd.read()
+    except Exception as error:
+        return "ERR %s" % str(error)
+
+    retval = retval.rstrip('\r\n')
+    retval = retval.lstrip(" ")
+    return retval
+
+
+# Get a mailbox register
+def get_pmc_register(reg_name):
+    retval = 'ERR'
+    mb_reg_file = reg_name
+    filepath = glob.glob(mb_reg_file)
+    if len(filepath) == 0:
+        return "%s %s  notfound" % (retval, mb_reg_file)
+    mb_reg_file = filepath[0]
+    if not os.path.isfile(mb_reg_file):
+        # print mb_reg_file,  'not found !'
+        return "%s %s  notfound" % (retval, mb_reg_file)
+    try:
+        with open(mb_reg_file, 'rb') as fd:
+            retval = fd.read()
+        retval = typeTostr(retval)
+    except Exception as error:
+        retval = "%s %s read failed, msg: %s" % (retval, mb_reg_file, str(error))
+
+    retval = retval.rstrip('\r\n')
+    retval = retval.lstrip(" ")
+    return retval
+
+
+class checktype():
+    def __init__(self, test1):
+        self.test1 = test1
+
+    @staticmethod
+    def getValue(location, bit, data_type, coefficient=1, addend=0):
+        try:
+            value_t = get_pmc_register(location)
+            if value_t.startswith("ERR") or value_t.startswith("NA"):
+                return value_t
+            if data_type == 1:
+                return float('%.1f' % ((float(value_t) / 1000) + addend))
+            if data_type == 2:
+                return float('%.1f' % (float(value_t) / 100))
+            if data_type == 3:
+                psu_status = int(value_t, 16)
+                return (psu_status & (1 << bit)) >> bit
+            if data_type == 4:
+                return int(value_t, 10)
+            if data_type == 5:
+                return float('%.1f' % (float(value_t) / 1000 / 1000))
+            if data_type == 6:
+                return Decimal(float(value_t) * coefficient / 1000).quantize(Decimal('0.000'))
+            return value_t
+        except Exception as e:
+            value_t = "ERR %s" % str(e)
+            return value_t
+
+    # fanFRU
+    @staticmethod
+    def decodeBinByValue(retval):
+        fru = ipmifru()
+        fru.decodeBin(retval)
+        return fru
+
+    @staticmethod
+    def getfruValue(prob_t, root, val):
+        try:
+            ret, binval_bytes = dev_file_read(val, 0, 256)
+            if ret is False:
+                return binval_bytes
+            binval = byteTostr(binval_bytes)
+            fanpro = {}
+            ret = checktype.decodeBinByValue(binval)
+            fanpro['fan_type'] = ret.productInfoArea.productName
+            fanpro['hw_version'] = str(int(ret.productInfoArea.productVersion, 16))
+            fanpro['sn'] = ret.productInfoArea.productSerialNumber
+            fan_display_name_dict = status.getDecodValue(root, "fan_display_name")
+            fan_name = fanpro['fan_type'].strip()
+            if len(fan_display_name_dict) == 0:
+                return fanpro
+            if fan_name not in fan_display_name_dict:
+                prob_t['errcode'] = -1
+                prob_t['errmsg'] = '%s' % ("ERR fan name: %s not support" % fan_name)
+            else:
+                fanpro['fan_type'] = fan_display_name_dict[fan_name]
+            return fanpro
+        except Exception as error:
+            return "ERR " + str(error)
+
+    @staticmethod
+    def getslotfruValue(val):
+        try:
+            binval = checktype.getValue(val, 0, 0)
+            if binval.startswith("ERR"):
+                return binval
+            slotpro = {}
+            ret = checktype.decodeBinByValue(binval)
+            slotpro['slot_type'] = ret.boardInfoArea.boardProductName
+            slotpro['hw_version'] = ret.boardInfoArea.boardextra1
+            slotpro['sn'] = ret.boardInfoArea.boardSerialNumber
+            return slotpro
+        except Exception as error:
+            return "ERR " + str(error)
+
+    @staticmethod
+    def getpsufruValue(prob_t, root, val):
+        try:
+            psu_match = False
+            binval = checktype.getValue(val, 0, 0)
+            if binval.startswith("ERR"):
+                return binval
+            psupro = {}
+            ret = checktype.decodeBinByValue(binval)
+            psupro['type1'] = ret.productInfoArea.productPartModelName
+            psupro['sn'] = ret.productInfoArea.productSerialNumber
+            psupro['hw_version'] = ret.productInfoArea.productVersion
+            psu_dict = status.getDecodValue(root, "psutype")
+            psupro['type1'] = psupro['type1'].strip()
+            if len(psu_dict) == 0:
+                return psupro
+            for psu_name, display_name in psu_dict.items():
+                if psu_name.strip() == psupro['type1']:
+                    psupro['type1'] = display_name
+                    psu_match = True
+                    break
+            if psu_match is not True:
+                prob_t['errcode'] = -1
+                prob_t['errmsg'] = '%s' % ("ERR psu name: %s not support" % psupro['type1'])
+            return psupro
+        except Exception as error:
+            return "ERR " + str(error)
+
+
+class status():
+    def __init__(self, productname):
+        self.productname = productname
+
+    @staticmethod
+    def getETroot(filename):
+        tree = ET.parse(filename)
+        root = tree.getroot()
+        return root
+
+    @staticmethod
+    def getDecodValue(collection, decode):
+        decodes = collection.find('decode')
+        testdecode = decodes.find(decode)
+        test = {}
+        if testdecode is None:
+            return test
+        for neighbor in testdecode.iter('code'):
+            test[neighbor.attrib["key"]] = neighbor.attrib["value"]
+        return test
+
+    @staticmethod
+    def getfileValue(location):
+        return checktype.getValue(location, " ", " ")
+
+    @staticmethod
+    def getETValue(a, filename, tagname):
+        root = status.getETroot(filename)
+        for neighbor in root.iter(tagname):
+            prob_t = {}
+            prob_t.update(neighbor.attrib)
+            prob_t['errcode'] = 0
+            prob_t['errmsg'] = ''
+            for pros in neighbor.iter("property"):
+                ret = dict(list(neighbor.attrib.items()) + list(pros.attrib.items()))
+                if ret.get('e2type') == 'fru' and ret.get("name") == "fru":
+                    fruval = checktype.getfruValue(prob_t, root, ret["location"])
+                    if isinstance(fruval, str) and fruval.startswith("ERR"):
+                        prob_t['errcode'] = -1
+                        prob_t['errmsg'] = fruval
+                        break
+                    prob_t.update(fruval)
+                    continue
+
+                if ret.get("name") == "psu" and ret.get('e2type') == 'fru':
+                    psuval = checktype.getpsufruValue(prob_t, root, ret["location"])
+                    if isinstance(psuval, str) and psuval.startswith("ERR"):
+                        prob_t['errcode'] = -1
+                        prob_t['errmsg'] = psuval
+                        break
+                    prob_t.update(psuval)
+                    continue
+
+                if ret.get("gettype") == "config":
+                    prob_t[ret["name"]] = ret["value"]
+                    continue
+
+                if 'type' not in ret.keys():
+                    val = "0"
+                else:
+                    val = ret["type"]
+                if 'bit' not in ret.keys():
+                    bit = "0"
+                else:
+                    bit = ret["bit"]
+                if 'coefficient' not in ret.keys():
+                    coefficient = 1
+                else:
+                    coefficient = float(ret["coefficient"])
+                if 'addend' not in ret.keys():
+                    addend = 0
+                else:
+                    addend = float(ret["addend"])
+
+                s = checktype.getValue(ret["location"], int(bit), int(val), coefficient, addend)
+                if isinstance(s, str) and s.startswith("ERR"):
+                    prob_t['errcode'] = -1
+                    prob_t['errmsg'] = s
+                    break
+                if 'default' in ret.keys():
+                    rt = status.getDecodValue(root, ret['decode'])
+                    prob_t['errmsg'] = rt[str(s)]
+                    if str(s) != ret["default"]:
+                        prob_t['errcode'] = -1
+                        break
+                else:
+                    if 'decode' in ret.keys():
+                        rt = status.getDecodValue(root, ret['decode'])
+                        if (ret['decode'] == "psutype" and s.replace("\x00", "").rstrip() not in rt):
+                            prob_t['errcode'] = -1
+                            prob_t['errmsg'] = '%s' % ("ERR psu name: %s not support" %
+                                                       (s.replace("\x00", "").rstrip()))
+                        else:
+                            s = rt[str(s).replace("\x00", "").rstrip()]
+                name = ret["name"]
+                prob_t[name] = str(s)
+            a.append(prob_t)
+
+    @staticmethod
+    def getCPUValue(a, filename, tagname):
+        root = status.getETroot(filename)
+        for neighbor in root.iter(tagname):
+            location = neighbor.attrib["location"]
+        L = []
+        for dirpath, dirnames, filenames in os.walk(location):
+            for file in filenames:
+                if file.endswith("input"):
+                    L.append(os.path.join(dirpath, file))
+            L = sorted(L, reverse=False)
+        for i in range(len(L)):
+            prob_t = {}
+            prob_t["name"] = getPMCreg("%s/temp%d_label" % (location, i + 1))
+            prob_t["temp"] = float(getPMCreg("%s/temp%d_input" % (location, i + 1))) / 1000
+            prob_t["alarm"] = float(getPMCreg("%s/temp%d_crit_alarm" % (location, i + 1))) / 1000
+            prob_t["crit"] = float(getPMCreg("%s/temp%d_crit" % (location, i + 1))) / 1000
+            prob_t["max"] = float(getPMCreg("%s/temp%d_max" % (location, i + 1))) / 1000
+            a.append(prob_t)
+
+    @staticmethod
+    def getFileName():
+        fpath = os.path.dirname(os.path.realpath(__file__))
+        for file in DEV_XML_FILE_LIST:
+            xml = fpath + "/" + file
+            if os.path.exists(xml):
+                return xml
+        return fpath + "/" + CONFIG_NAME
+
+    @staticmethod
+    def checkFan(ret):
+        _filename = status.getFileName()
+       # _filename = "/usr/local/bin/" + status.getFileName()
+        _tagname = "fan"
+        status.getETValue(ret, _filename, _tagname)
+
+    @staticmethod
+    def getTemp(ret):
+        _filename = status.getFileName()
+       # _filename = "/usr/local/bin/" + status.getFileName()
+        _tagname = "temp"
+        status.getETValue(ret, _filename, _tagname)
+
+    @staticmethod
+    def getPsu(ret):
+        _filename = status.getFileName()
+       # _filename = "/usr/local/bin/" + status.getFileName()
+        _tagname = "psu"
+        status.getETValue(ret, _filename, _tagname)
+
+    @staticmethod
+    def getcputemp(ret):
+        _filename = status.getFileName()
+        _tagname = "cpus"
+        status.getCPUValue(ret, _filename, _tagname)
+
+    @staticmethod
+    def getDcdc(ret):
+        _filename = status.getFileName()
+        _tagname = "dcdc"
+        status.getETValue(ret, _filename, _tagname)
+
+    @staticmethod
+    def getmactemp(ret):
+        _filename = status.getFileName()
+        _tagname = "mactemp"
+        status.getETValue(ret, _filename, _tagname)
+
+    @staticmethod
+    def getmacpower(ret):
+        _filename = status.getFileName()
+        _tagname = "macpower"
+        status.getETValue(ret, _filename, _tagname)
diff --git a/device/micas/x86_64-micas_m2-w6510-48v8c-r0/pcie.yaml b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/pcie.yaml
new file mode 100644
index 000000000..7b026cec3
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/pcie.yaml
@@ -0,0 +1,440 @@
+- bus: '00'
+  dev: '00'
+  fn: '0'
+  id: 6f00
+  name: 'Host bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D DMI2
+    (rev 03)'
+- bus: '00'
+  dev: '01'
+  fn: '0'
+  id: 6f02
+  name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI
+    Express Root Port 1 (rev 03)'
+- bus: '00'
+  dev: '01'
+  fn: '1'
+  id: 6f03
+  name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI
+    Express Root Port 1 (rev 03)'
+- bus: '00'
+  dev: '02'
+  fn: '0'
+  id: 6f04
+  name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI
+    Express Root Port 2 (rev 03)'
+- bus: '00'
+  dev: '02'
+  fn: '2'
+  id: 6f06
+  name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI
+    Express Root Port 2 (rev 03)'
+- bus: '00'
+  dev: '03'
+  fn: '0'
+  id: 6f08
+  name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI
+    Express Root Port 3 (rev 03)'
+- bus: '00'
+  dev: '05'
+  fn: '0'
+  id: 6f28
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Map/VTd_Misc/System Management (rev 03)'
+- bus: '00'
+  dev: '05'
+  fn: '1'
+  id: 6f29
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D IIO Hot Plug (rev 03)'
+- bus: '00'
+  dev: '05'
+  fn: '2'
+  id: 6f2a
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D IIO RAS/Control Status/Global Errors (rev 03)'
+- bus: '00'
+  dev: '05'
+  fn: '4'
+  id: 6f2c
+  name: 'PIC: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D I/O APIC (rev
+    03)'
+- bus: '00'
+  dev: '14'
+  fn: '0'
+  id: 8c31
+  name: 'USB controller: Intel Corporation 8 Series/C220 Series Chipset Family USB
+    xHCI (rev 05)'
+- bus: '00'
+  dev: '16'
+  fn: '0'
+  id: 8c3a
+  name: 'Communication controller: Intel Corporation 8 Series/C220 Series Chipset
+    Family MEI Controller #1 (rev 04)'
+- bus: '00'
+  dev: '16'
+  fn: '1'
+  id: 8c3b
+  name: 'Communication controller: Intel Corporation 8 Series/C220 Series Chipset
+    Family MEI Controller #2 (rev 04)'
+- bus: '00'
+  dev: 1c
+  fn: '0'
+  id: 8c10
+  name: 'PCI bridge: Intel Corporation 8 Series/C220 Series Chipset Family PCI Express
+    Root Port #1 (rev d5)'
+- bus: '00'
+  dev: 1c
+  fn: '1'
+  id: 8c12
+  name: 'PCI bridge: Intel Corporation 8 Series/C220 Series Chipset Family PCI Express
+    Root Port #2 (rev d5)'
+- bus: '00'
+  dev: 1d
+  fn: '0'
+  id: 8c26
+  name: 'USB controller: Intel Corporation 8 Series/C220 Series Chipset Family USB
+    EHCI #1 (rev 05)'
+- bus: '00'
+  dev: 1f
+  fn: '0'
+  id: 8c54
+  name: 'ISA bridge: Intel Corporation C224 Series Chipset Family Server Standard
+    SKU LPC Controller (rev 05)'
+- bus: '00'
+  dev: 1f
+  fn: '2'
+  id: 8c02
+  name: 'SATA controller: Intel Corporation 8 Series/C220 Series Chipset Family 6-port
+    SATA Controller 1 [AHCI mode] (rev 05)'
+- bus: '00'
+  dev: 1f
+  fn: '3'
+  id: 8c22
+  name: 'SMBus: Intel Corporation 8 Series/C220 Series Chipset Family SMBus Controller
+    (rev 05)'
+- bus: '01'
+  dev: '00'
+  fn: '0'
+  id: b873
+  name: 'Ethernet controller: Broadcom Inc. and subsidiaries Device b873 (rev 01)'
+- bus: '03'
+  dev: '00'
+  fn: '0'
+  id: 6f50
+  name: 'System peripheral: Intel Corporation Xeon Processor D Family QuickData Technology
+    Register DMA Channel 0'
+- bus: '03'
+  dev: '00'
+  fn: '1'
+  id: 6f51
+  name: 'System peripheral: Intel Corporation Xeon Processor D Family QuickData Technology
+    Register DMA Channel 1'
+- bus: '03'
+  dev: '00'
+  fn: '2'
+  id: 6f52
+  name: 'System peripheral: Intel Corporation Xeon Processor D Family QuickData Technology
+    Register DMA Channel 2'
+- bus: '03'
+  dev: '00'
+  fn: '3'
+  id: 6f53
+  name: 'System peripheral: Intel Corporation Xeon Processor D Family QuickData Technology
+    Register DMA Channel 3'
+- bus: '04'
+  dev: '00'
+  fn: '0'
+  id: 15ab
+  name: 'Ethernet controller: Intel Corporation Ethernet Connection X552 10 GbE Backplane'
+- bus: '04'
+  dev: '00'
+  fn: '1'
+  id: 15ab
+  name: 'Ethernet controller: Intel Corporation Ethernet Connection X552 10 GbE Backplane'
+- bus: '07'
+  dev: '00'
+  fn: '0'
+  id: '1537'
+  name: 'Ethernet controller: Intel Corporation I210 Gigabit Backplane Connection
+    (rev 03)'
+- bus: 08
+  dev: '00'
+  fn: '0'
+  id: '7022'
+  name: 'Memory controller: Xilinx Corporation Device 7022'
+- bus: ff
+  dev: 0b
+  fn: '0'
+  id: 6f81
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D R3 QPI Link 0/1 (rev 03)'
+- bus: ff
+  dev: 0b
+  fn: '1'
+  id: 6f36
+  name: 'Performance counters: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D R3 QPI Link 0/1 (rev 03)'
+- bus: ff
+  dev: 0b
+  fn: '2'
+  id: 6f37
+  name: 'Performance counters: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D R3 QPI Link 0/1 (rev 03)'
+- bus: ff
+  dev: 0b
+  fn: '3'
+  id: 6f76
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D R3 QPI Link Debug (rev 03)'
+- bus: ff
+  dev: 0c
+  fn: '0'
+  id: 6fe0
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Caching Agent (rev 03)'
+- bus: ff
+  dev: 0c
+  fn: '1'
+  id: 6fe1
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Caching Agent (rev 03)'
+- bus: ff
+  dev: 0c
+  fn: '2'
+  id: 6fe2
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Caching Agent (rev 03)'
+- bus: ff
+  dev: 0c
+  fn: '3'
+  id: 6fe3
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Caching Agent (rev 03)'
+- bus: ff
+  dev: 0f
+  fn: '0'
+  id: 6ff8
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Caching Agent (rev 03)'
+- bus: ff
+  dev: 0f
+  fn: '4'
+  id: 6ffc
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Caching Agent (rev 03)'
+- bus: ff
+  dev: 0f
+  fn: '5'
+  id: 6ffd
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Caching Agent (rev 03)'
+- bus: ff
+  dev: 0f
+  fn: '6'
+  id: 6ffe
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Caching Agent (rev 03)'
+- bus: ff
+  dev: '10'
+  fn: '0'
+  id: 6f1d
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D R2PCIe Agent (rev 03)'
+- bus: ff
+  dev: '10'
+  fn: '1'
+  id: 6f34
+  name: 'Performance counters: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D R2PCIe Agent (rev 03)'
+- bus: ff
+  dev: '10'
+  fn: '5'
+  id: 6f1e
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Ubox (rev 03)'
+- bus: ff
+  dev: '10'
+  fn: '6'
+  id: 6f7d
+  name: 'Performance counters: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Ubox (rev 03)'
+- bus: ff
+  dev: '10'
+  fn: '7'
+  id: 6f1f
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Ubox (rev 03)'
+- bus: ff
+  dev: '12'
+  fn: '0'
+  id: 6fa0
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Home Agent 0 (rev 03)'
+- bus: ff
+  dev: '12'
+  fn: '1'
+  id: 6f30
+  name: 'Performance counters: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Home Agent 0 (rev 03)'
+- bus: ff
+  dev: '13'
+  fn: '0'
+  id: 6fa8
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Target Address/Thermal/RAS (rev 03)'
+- bus: ff
+  dev: '13'
+  fn: '1'
+  id: 6f71
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Target Address/Thermal/RAS (rev 03)'
+- bus: ff
+  dev: '13'
+  fn: '2'
+  id: 6faa
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel Target Address Decoder (rev 03)'
+- bus: ff
+  dev: '13'
+  fn: '3'
+  id: 6fab
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel Target Address Decoder (rev 03)'
+- bus: ff
+  dev: '13'
+  fn: '4'
+  id: 6fac
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel Target Address Decoder (rev 03)'
+- bus: ff
+  dev: '13'
+  fn: '5'
+  id: 6fad
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel Target Address Decoder (rev 03)'
+- bus: ff
+  dev: '13'
+  fn: '6'
+  id: 6fae
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D DDRIO Channel 0/1 Broadcast (rev 03)'
+- bus: ff
+  dev: '13'
+  fn: '7'
+  id: 6faf
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D DDRIO Global Broadcast (rev 03)'
+- bus: ff
+  dev: '14'
+  fn: '0'
+  id: 6fb0
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel 0 Thermal Control (rev 03)'
+- bus: ff
+  dev: '14'
+  fn: '1'
+  id: 6fb1
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel 1 Thermal Control (rev 03)'
+- bus: ff
+  dev: '14'
+  fn: '2'
+  id: 6fb2
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel 0 Error (rev 03)'
+- bus: ff
+  dev: '14'
+  fn: '3'
+  id: 6fb3
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel 1 Error (rev 03)'
+- bus: ff
+  dev: '14'
+  fn: '4'
+  id: 6fbc
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D DDRIO Channel 0/1 Interface (rev 03)'
+- bus: ff
+  dev: '14'
+  fn: '5'
+  id: 6fbd
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D DDRIO Channel 0/1 Interface (rev 03)'
+- bus: ff
+  dev: '14'
+  fn: '6'
+  id: 6fbe
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D DDRIO Channel 0/1 Interface (rev 03)'
+- bus: ff
+  dev: '14'
+  fn: '7'
+  id: 6fbf
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D DDRIO Channel 0/1 Interface (rev 03)'
+- bus: ff
+  dev: '15'
+  fn: '0'
+  id: 6fb4
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel 2 Thermal Control (rev 03)'
+- bus: ff
+  dev: '15'
+  fn: '1'
+  id: 6fb5
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel 3 Thermal Control (rev 03)'
+- bus: ff
+  dev: '15'
+  fn: '2'
+  id: 6fb6
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel 2 Error (rev 03)'
+- bus: ff
+  dev: '15'
+  fn: '3'
+  id: 6fb7
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel 3 Error (rev 03)'
+- bus: ff
+  dev: 1e
+  fn: '0'
+  id: 6f98
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Power Control Unit (rev 03)'
+- bus: ff
+  dev: 1e
+  fn: '1'
+  id: 6f99
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Power Control Unit (rev 03)'
+- bus: ff
+  dev: 1e
+  fn: '2'
+  id: 6f9a
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Power Control Unit (rev 03)'
+- bus: ff
+  dev: 1e
+  fn: '3'
+  id: 6fc0
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Power Control Unit (rev 03)'
+- bus: ff
+  dev: 1e
+  fn: '4'
+  id: 6f9c
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Power Control Unit (rev 03)'
+- bus: ff
+  dev: 1f
+  fn: '0'
+  id: 6f88
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Power Control Unit (rev 03)'
+- bus: ff
+  dev: 1f
+  fn: '2'
+  id: 6f8a
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Power Control Unit (rev 03)'
diff --git a/device/micas/x86_64-micas_m2-w6510-48v8c-r0/platform.json b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/platform.json
new file mode 100644
index 000000000..0fe70dd14
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/platform.json
@@ -0,0 +1,819 @@
+{
+    "chassis": {
+        "name": "M2-W6510-48V8C",
+        "thermal_manager": false,
+        "status_led": {
+            "controllable": false,
+            "colors": ["green", "blinking_green", "amber", "blinking_amber"]
+        },
+        "components": [
+            {
+                "name": "CPU_CPLD"
+            },
+            {
+                "name": "CONNECT_CPLD"
+            },
+            {
+                "name": "CONNECT_CPLD-FAN"
+            },
+            {
+                "name": "MAC_CPLD1"
+            },
+            {
+                "name": "MAC_CPLD2"
+            },
+            {
+                "name": "FPGA"
+            },
+            {
+                "name": "BIOS"
+            }
+        ],
+        "fans": [
+            {
+                "name": "Fantray1_1",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 50,
+                    "maximum": 100
+                },
+                "status_led": {
+                    "available": false,
+                    "colors": ["off", "red", "amber", "green"]
+                }
+            },
+            {
+                "name": "Fantray1_2",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 50,
+                    "maximum": 100
+                },
+                "status_led": {
+                    "available": false,
+                    "colors": ["off", "red", "amber", "green"]
+                }
+            },
+            {
+                "name": "Fantray2_1",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 50,
+                    "maximum": 100
+                },
+                "status_led": {
+                    "available": false,
+                    "colors": ["off", "red", "amber", "green"]
+                }
+            },
+            {
+                "name": "Fantray2_2",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 50,
+                    "maximum": 100
+                },
+                "status_led": {
+                    "available": false,
+                    "colors": ["off", "red", "amber", "green"]
+                }
+            },
+            {
+                "name": "Fantray3_1",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 50,
+                    "maximum": 100
+                },
+                "status_led": {
+                    "available": false,
+                    "colors": ["off", "red", "amber", "green"]
+                }
+            },
+            {
+                "name": "Fantray3_2",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 50,
+                    "maximum": 100
+                },
+                "status_led": {
+                    "available": false,
+                    "colors": ["off", "red", "amber", "green"]
+                }
+            },
+            {
+                "name": "Fantray4_1",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 50,
+                    "maximum": 100
+                },
+                "status_led": {
+                    "available": false,
+                    "colors": ["off", "red", "amber", "green"]
+                }
+            },
+            {
+                "name": "Fantray4_2",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 50,
+                    "maximum": 100
+                },
+                "status_led": {
+                    "available": false,
+                    "colors": ["off", "red", "amber", "green"]
+                }
+            }
+        ],
+        "fan_drawers":[
+            {
+                "name": "Fantray1",
+                "num_fans" : 2,
+                "status_led": {
+                    "controllable": false,
+                    "colors": ["amber", "green", "off"]
+                },
+                "fans": [
+                    {
+                        "name": "Fantray1_1",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 50,
+                            "maximum": 100
+                        },
+                        "status_led": {
+                            "available": false
+                        }
+                    },
+                    {
+                        "name": "Fantray1_2",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 50,
+                            "maximum": 100
+                        },
+                        "status_led": {
+                            "available": false
+                        }
+                    }
+                ]
+            },
+            {
+                "name": "Fantray2",
+                "num_fans" : 2,
+                "status_led": {
+                    "controllable": false,
+                    "colors": ["amber", "green", "off"]
+                },
+                "fans": [
+                    {
+                        "name": "Fantray2_1",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 50,
+                            "maximum": 100
+                        },
+                        "status_led": {
+                            "available": false
+                        }
+                    },
+                    {
+                        "name": "Fantray2_2",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 50,
+                            "maximum": 100
+                        },
+                        "status_led": {
+                            "available": false
+                        }
+                    }
+                ]
+            },
+            {
+                "name": "Fantray3",
+                "num_fans" : 2,
+                "status_led": {
+                    "controllable": false,
+                    "colors": ["amber", "green", "off"]
+                },
+                "fans": [
+                    {
+                        "name": "Fantray3_1",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 50,
+                            "maximum": 100
+                        },
+                        "status_led": {
+                            "available": false
+                        }
+                    },
+                    {
+                        "name": "Fantray3_2",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 50,
+                            "maximum": 100
+                        },
+                        "status_led": {
+                            "available": false
+                        }
+                    }
+                ]
+            },
+            {
+                "name": "Fantray4",
+                "num_fans" : 2,
+                "status_led": {
+                    "controllable": false,
+                    "colors": ["amber", "green", "off"]
+                },
+                "fans": [
+                    {
+                        "name": "Fantray4_1",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 50,
+                            "maximum": 100
+                        },
+                        "status_led": {
+                            "available": false
+                        }
+                    },
+                    {
+                        "name": "Fantray4_2",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 50,
+                            "maximum": 100
+                        },
+                        "status_led": {
+                            "available": false
+                        }
+                    }
+                ]
+            }
+        ],
+        "psus": [
+            {
+                "name": "Psu1",
+                "voltage": true,
+                "current": true,
+                "power": true,
+                "max_power": false,
+                "voltage_high_threshold": true,
+                "voltage_low_threshold": true,
+                "temperature": true,
+                "fans_target_speed": true,
+                "status_led": {
+                    "controllable": false
+                },
+                "fans": [
+                    {
+                        "name": "PSU1_FAN1",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 50,
+                            "maximum": 100
+                        },
+                        "status_led": {
+                            "available": false
+                        }
+                    }
+                ]
+            },
+            {
+                "name": "Psu2",
+                "voltage": true,
+                "current": true,
+                "power": true,
+                "max_power": false,
+                "voltage_high_threshold": true,
+                "voltage_low_threshold": true,
+                "temperature": true,
+                "fans_target_speed": true,
+                "status_led": {
+                    "controllable": false
+                },
+                "fans": [
+                    {
+                        "name": "PSU2_FAN1",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 50,
+                            "maximum": 100
+                        },
+                        "status_led": {
+                            "available": false
+                        }
+                    }
+                ]
+            }
+        ],
+        "thermals": [
+            {
+                "name": "ASIC_TEMP",
+                "controllable": false,
+                "low-crit-threshold": true,
+                "high-crit-threshold": true,
+                "low-threshold": true,
+                "high-threshold": true,
+                "minimum-recorded": true,
+                "maximum-recorded": true
+            },
+            {
+                "name": "CPU_TEMP",
+                "controllable": false,
+                "low-crit-threshold": true,
+                "high-crit-threshold": true,
+                "low-threshold": true,
+                "high-threshold": true,
+                "minimum-recorded": true,
+                "maximum-recorded": true
+            },
+            {
+                "name": "INLET_TEMP",
+                "controllable": false,
+                "low-crit-threshold": true,
+                "high-crit-threshold": true,
+                "low-threshold": true,
+                "high-threshold": true,
+                "minimum-recorded": true,
+                "maximum-recorded": true
+            },
+            {
+                "name": "OUTLET_TEMP",
+                "controllable": false,
+                "low-crit-threshold": true,
+                "high-crit-threshold": true,
+                "low-threshold": true,
+                "high-threshold": true,
+                "minimum-recorded": true,
+                "maximum-recorded": true
+            },
+            {
+                "name": "MAC_OUT_TEMP",
+                "controllable": false,
+                "low-crit-threshold": true,
+                "high-crit-threshold": true,
+                "low-threshold": true,
+                "high-threshold": true,
+                "minimum-recorded": true,
+                "maximum-recorded": true
+            },
+            {
+                "name": "MAC_IN_TEMP",
+                "controllable": false,
+                "low-crit-threshold": true,
+                "high-crit-threshold": true,
+                "low-threshold": true,
+                "high-threshold": true,
+                "minimum-recorded": true,
+                "maximum-recorded": true
+            },
+            {
+                "name": "PSU1_TEMP",
+                "controllable": false,
+                "low-crit-threshold": true,
+                "high-crit-threshold": true,
+                "low-threshold": true,
+                "high-threshold": true,
+                "minimum-recorded": true,
+                "maximum-recorded": true
+            },
+            {
+                "name": "PSU2_TEMP",
+                "controllable": false,
+                "low-crit-threshold": true,
+                "high-crit-threshold": true,
+                "low-threshold": true,
+                "high-threshold": true,
+                "minimum-recorded": true,
+                "maximum-recorded": true
+            }
+        ],
+        "modules": [],
+        "sfps": []
+    },
+    "interfaces": {
+        "Ethernet1": {
+            "index": "1",
+            "lanes": "57",
+            "breakout_modes": {
+                "1x25G": ["Eth1"]
+            }
+        },
+        "Ethernet2": {
+            "index": "2",
+            "lanes": "58",
+            "breakout_modes": {
+                "1x25G": ["Eth2"]
+            }
+        },
+        "Ethernet3": {
+            "index": "3",
+            "lanes": "59",
+            "breakout_modes": {
+                "1x25G": ["Eth3"]
+            }
+        },
+        "Ethernet4": {
+            "index": "4",
+            "lanes": "60",
+            "breakout_modes": {
+                "1x25G": ["Eth4"]
+            }
+        },
+        "Ethernet5": {
+            "index": "5",
+            "lanes": "61",
+            "breakout_modes": {
+                "1x25G": ["Eth5"]
+            }
+        },
+        "Ethernet6": {
+            "index": "6",
+            "lanes": "62",
+            "breakout_modes": {
+                "1x25G": ["Eth6"]
+            }
+        },
+        "Ethernet7": {
+            "index": "7",
+            "lanes": "63",
+            "breakout_modes": {
+                "1x25G": ["Eth7"]
+            }
+        },
+        "Ethernet8": {
+            "index": "8",
+            "lanes": "64",
+            "breakout_modes": {
+                "1x25G": ["Eth8"]
+            }
+        },
+        "Ethernet9": {
+            "index": "9",
+            "lanes": "1",
+            "breakout_modes": {
+                "1x25G": ["Eth9"]
+            }
+        },
+        "Ethernet10": {
+            "index": "10",
+            "lanes": "2",
+            "breakout_modes": {
+                "1x25G": ["Eth10"]
+            }
+        },
+        "Ethernet11": {
+            "index": "11",
+            "lanes": "3",
+            "breakout_modes": {
+                "1x25G": ["Eth11"]
+            }
+        },
+        "Ethernet12": {
+            "index": "12",
+            "lanes": "4",
+            "breakout_modes": {
+                "1x25G": ["Eth12"]
+            }
+        },
+        "Ethernet13": {
+            "index": "13",
+            "lanes": "5",
+            "breakout_modes": {
+                "1x25G": ["Eth13"]
+            }
+        },
+        "Ethernet14": {
+            "index": "14",
+            "lanes": "6",
+            "breakout_modes": {
+                "1x25G": ["Eth14"]
+            }
+        },
+        "Ethernet15": {
+            "index": "15",
+            "lanes": "7",
+            "breakout_modes": {
+                "1x25G": ["Eth15"]
+            }
+        },
+        "Ethernet16": {
+            "index": "16",
+            "lanes": "8",
+            "breakout_modes": {
+                "1x25G": ["Eth16"]
+            }
+        },
+         "Ethernet17": {
+            "index": "17",
+            "lanes": "13",
+            "breakout_modes": {
+                "1x25G": ["Eth17"]
+            }
+        },
+        "Ethernet18": {
+            "index": "18",
+            "lanes": "14",
+            "breakout_modes": {
+                "1x25G": ["Eth18"]
+            }
+        },
+        "Ethernet19": {
+            "index": "19",
+            "lanes": "15",
+            "breakout_modes": {
+                "1x25G": ["Eth19"]
+            }
+        },
+        "Ethernet20": {
+            "index": "20",
+            "lanes": "16",
+            "breakout_modes": {
+                "1x25G": ["Eth20"]
+            }
+        },
+        "Ethernet21": {
+            "index": "21",
+            "lanes": "21",
+            "breakout_modes": {
+                "1x25G": ["Eth21"]
+            }
+        },
+        "Ethernet22": {
+            "index": "22",
+            "lanes": "22",
+            "breakout_modes": {
+                "1x25G": ["Eth22"]
+            }
+        },
+        "Ethernet23": {
+            "index": "23",
+            "lanes": "23",
+            "breakout_modes": {
+                "1x25G": ["Eth23"]
+            }
+        },
+        "Ethernet24": {
+            "index": "24",
+            "lanes": "24",
+            "breakout_modes": {
+                "1x25G": ["Eth24"]
+            }
+        },
+        "Ethernet25": {
+            "index": "25",
+            "lanes": "29",
+            "breakout_modes": {
+                "1x25G": ["Eth25"]
+            }
+        },
+        "Ethernet26": {
+            "index": "26",
+            "lanes": "30",
+            "breakout_modes": {
+                "1x25G": ["Eth26"]
+            }
+        },
+        "Ethernet27": {
+            "index": "27",
+            "lanes": "31",
+            "breakout_modes": {
+                "1x25G": ["Eth27"]
+            }
+        },
+        "Ethernet28": {
+            "index": "28",
+            "lanes": "32",
+            "breakout_modes": {
+                "1x25G": ["Eth28"]
+            }
+        },
+        "Ethernet29": {
+            "index": "29",
+            "lanes": "33",
+            "breakout_modes": {
+                "1x25G": ["Eth29"]
+            }
+        },
+        "Ethernet30": {
+            "index": "30",
+            "lanes": "34",
+            "breakout_modes": {
+                "1x25G": ["Eth30"]
+            }
+        },
+        "Ethernet31": {
+            "index": "31",
+            "lanes": "35",
+            "breakout_modes": {
+                "1x25G": ["Eth31"]
+            }
+        },
+        "Ethernet32": {
+            "index": "32",
+            "lanes": "36",
+            "breakout_modes": {
+                "1x25G": ["Eth32"]
+            }
+        },
+        "Ethernet33": {
+            "index": "33",
+            "lanes": "41",
+            "breakout_modes": {
+                "1x25G": ["Eth33"]
+            }
+        },
+        "Ethernet34": {
+            "index": "34",
+            "lanes": "42",
+            "breakout_modes": {
+                "1x25G": ["Eth34"]
+            }
+        },
+        "Ethernet35": {
+            "index": "35",
+            "lanes": "43",
+            "breakout_modes": {
+                "1x25G": ["Eth35"]
+            }
+        },
+        "Ethernet36": {
+            "index": "36",
+            "lanes": "44",
+            "breakout_modes": {
+                "1x25G": ["Eth36"]
+            }
+        },
+        "Ethernet37": {
+            "index": "37",
+            "lanes": "49",
+            "breakout_modes": {
+                "1x25G": ["Eth37"]
+            }
+        },
+        "Ethernet38": {
+            "index": "38",
+            "lanes": "50",
+            "breakout_modes": {
+                "1x25G": ["Eth38"]
+            }
+        },
+        "Ethernet39": {
+            "index": "39",
+            "lanes": "51",
+            "breakout_modes": {
+                "1x25G": ["Eth39"]
+            }
+        },
+        "Ethernet40": {
+            "index": "40",
+            "lanes": "52",
+            "breakout_modes": {
+                "1x25G": ["Eth40"]
+            }
+        },
+        "Ethernet41": {
+            "index": "41",
+            "lanes": "65",
+            "breakout_modes": {
+                "1x25G": ["Eth41"]
+            }
+        },
+        "Ethernet42": {
+            "index": "42",
+            "lanes": "66",
+            "breakout_modes": {
+                "1x25G": ["Eth42"]
+            }
+        },
+        "Ethernet43": {
+            "index": "43",
+            "lanes": "67",
+            "breakout_modes": {
+                "1x25G": ["Eth43"]
+            }
+        },
+        "Ethernet44": {
+            "index": "44",
+            "lanes": "68",
+            "breakout_modes": {
+                "1x25G": ["Eth44"]
+            }
+        },
+        "Ethernet45": {
+            "index": "45",
+            "lanes": "69",
+            "breakout_modes": {
+                "1x25G": ["Eth45"]
+            }
+        },
+        "Ethernet46": {
+            "index": "46",
+            "lanes": "70",
+            "breakout_modes": {
+                "1x25G": ["Eth46"]
+            }
+        },
+        "Ethernet47": {
+            "index": "47",
+            "lanes": "71",
+            "breakout_modes": {
+                "1x25G": ["Eth47"]
+            }
+        },
+        "Ethernet48": {
+            "index": "48",
+            "lanes": "72",
+            "breakout_modes": {
+                "1x25G": ["Eth48"]
+            }
+        },
+        "Ethernet49": {
+            "index": "49,49,49,49",
+            "lanes": "85,86,87,88",
+            "breakout_modes": {
+                "1x100G": ["Eth49"],
+                "2x50G": ["Eth49/1", "Eth49/2"],
+                "4x25G[10G]": ["Eth49/1", "Eth49/2", "Eth49/3", "Eth49/4"],
+                "4x10G": ["Eth49/1", "Eth49/2", "Eth49/3", "Eth49/4"]
+            }
+        },
+        "Ethernet53": {
+            "index": "50,50,50,50",
+            "lanes": "77,78,79,80",
+            "breakout_modes": {
+                "1x100G": ["Eth50"],
+                "2x50G": ["Eth50/1", "Eth50/2"],
+                "4x25G[10G]": ["Eth50/1", "Eth50/2", "Eth50/3", "Eth50/4"],
+                "4x10G": ["Eth50/1", "Eth50/2", "Eth50/3", "Eth50/4"]
+            }
+        },
+        "Ethernet57": {
+            "index": "51,51,51,51",
+            "lanes": "97,98,99,100",
+            "breakout_modes": {
+                "1x100G": ["Eth51"],
+                "2x50G": ["Eth51/1", "Eth51/2"],
+                "4x25G[10G]": ["Eth51/1", "Eth51/2", "Eth51/3", "Eth51/4"],
+                "4x10G": ["Eth51/1", "Eth51/2", "Eth51/3", "Eth51/4"]
+            }
+        },
+        "Ethernet61": {
+            "index": "52,52,52,52",
+            "lanes": "93,94,95,96",
+            "breakout_modes": {
+                "1x100G": ["Eth52"],
+                "2x50G": ["Eth52/1", "Eth52/2"],
+                "4x25G[10G]": ["Eth52/1", "Eth52/2", "Eth52/3", "Eth52/4"],
+                "4x10G": ["Eth52/1", "Eth52/2", "Eth52/3", "Eth52/4"]
+            }
+        },
+        "Ethernet65": {
+            "index": "53,53,53,53",
+            "lanes": "113,114,115,116",
+            "breakout_modes": {
+                "1x100G": ["Eth53"],
+                "2x50G": ["Eth53/1", "Eth53/2"],
+                "4x25G[10G]": ["Eth53/1", "Eth53/2", "Eth53/3", "Eth53/4"],
+                "4x10G": ["Eth53/1", "Eth53/2", "Eth53/3", "Eth53/4"]
+            }
+        },
+        "Ethernet69": {
+            "index": "54,54,54,54",
+            "lanes": "105,106,107,108",
+            "breakout_modes": {
+                "1x100G": ["Eth54"],
+                "2x50G": ["Eth54/1","Eth54/2"],
+                "4x25G[10G]": ["Eth54/1", "Eth54/2", "Eth54/3", "Eth54/4"],
+                "4x10G": ["Eth54/1", "Eth54/2", "Eth54/3", "Eth54/4"]
+            }
+        },
+        "Ethernet73": {
+            "index": "55,55,55,55",
+            "lanes": "121,122,123,124",
+            "breakout_modes": {
+                "1x100G": ["Eth55"],
+                "2x50G": ["Eth55/1", "Eth55/2"],
+                "4x25G[10G]": ["Eth55/1", "Eth55/2", "Eth55/3", "Eth55/4"],
+                "4x10G": ["Eth55/1", "Eth55/2", "Eth55/3", "Eth55/4"]
+            }
+        },
+        "Ethernet77": {
+            "index": "56,56,56,56",
+            "lanes": "125,126,127,128",
+            "breakout_modes": {
+                "1x100G": ["Eth56"],
+                "2x50G": ["Eth56/1", "Eth56/2"],
+                "4x25G[10G]": ["Eth56/1", "Eth56/2", "Eth56/3", "Eth56/4"],
+                "4x10G": ["Eth56/1", "Eth56/2", "Eth56/3", "Eth56/4"]
+            }
+        }
+    }
+}
diff --git a/device/micas/x86_64-micas_m2-w6510-48v8c-r0/platform_asic b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/platform_asic
new file mode 100644
index 000000000..960467652
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/platform_asic
@@ -0,0 +1 @@
+broadcom
diff --git a/device/micas/x86_64-micas_m2-w6510-48v8c-r0/platform_components.json b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/platform_components.json
new file mode 100644
index 000000000..8040c1a26
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/platform_components.json
@@ -0,0 +1,16 @@
+{
+    "chassis": {
+        "M2-W6510-48V8C": {
+            "component": {
+                "CPU_CPLD": { },
+                "CONNECT_CPLD": { },
+                "CONNECT_CPLD-FAN": { },
+                "MAC_CPLD1": { },
+                "MAC_CPLD2": { },
+                "FPGA": { },
+                "BIOS": { }
+            }
+        }
+    }
+}
+
diff --git a/device/micas/x86_64-micas_m2-w6510-48v8c-r0/plugins/sfputil.py b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/plugins/sfputil.py
new file mode 100644
index 000000000..3e195a36f
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/plugins/sfputil.py
@@ -0,0 +1,243 @@
+# sfputil.py
+#
+# Platform-specific SFP transceiver interface for SONiC
+#
+
+try:
+    import time
+    import os
+    import traceback
+    from sonic_sfp.sfputilbase import SfpUtilBase
+except ImportError as e:
+    raise ImportError("%s - required module not found" % str(e))
+
+class SfpUtil(SfpUtilBase):
+    """Platform-specific SfpUtil class"""
+
+    PORT_START = 1
+    PORT_END = 56
+    PORTS_IN_BLOCK = 57
+
+    EEPROM_OFFSET = 32
+    SFP_DEVICE_TYPE = "optoe2"
+    QSFP_DEVICE_TYPE = "optoe1"
+    I2C_MAX_ATTEMPT = 3
+
+    _port_to_eeprom_mapping = {}
+    port_to_i2cbus_mapping ={}
+
+    @property
+    def port_start(self):
+        return self.PORT_START
+
+    @property
+    def port_end(self):
+        return self.PORT_END
+
+    @property
+    def qsfp_ports(self):
+        return range(49, self.PORTS_IN_BLOCK)
+
+    @property
+    def port_to_eeprom_mapping(self):
+        return self._port_to_eeprom_mapping
+
+    def __init__(self):
+        for x in range(self.PORT_START, self.PORTS_IN_BLOCK):
+            self.port_to_i2cbus_mapping[x] = x + self.EEPROM_OFFSET - 1
+        SfpUtilBase.__init__(self)
+
+    def _sfp_read_file_path(self, file_path, offset, num_bytes):
+        attempts = 0
+        while attempts < self.I2C_MAX_ATTEMPT:
+            try:
+                file_path.seek(offset)
+                read_buf = file_path.read(num_bytes)
+            except Exception:
+                attempts += 1
+                time.sleep(0.05)
+            return True, read_buf
+        return False, None
+
+    def _sfp_eeprom_present(self, sysfs_sfp_i2c_client_eeprompath, offset):
+        """Tries to read the eeprom file to determine if the
+        device/sfp is present or not. If sfp present, the read returns
+        valid bytes. If not, read returns error 'Connection timed out"""
+
+        if not os.path.exists(sysfs_sfp_i2c_client_eeprompath):
+            return False
+        with open(sysfs_sfp_i2c_client_eeprompath, "rb", buffering=0) as sysfsfile:
+            rv, buf = self._sfp_read_file_path(sysfsfile, offset, 1)
+            return rv
+
+    def _add_new_sfp_device(self, sysfs_sfp_i2c_adapter_path, devaddr, devtype):
+        try:
+            sysfs_nd_path = "%s/new_device" % sysfs_sfp_i2c_adapter_path
+
+            # Write device address to new_device file
+            nd_str = "%s %s" % (devtype, hex(devaddr))
+            with open(sysfs_nd_path, "w") as nd_file:
+                nd_file.write(nd_str)
+
+        except Exception as err:
+            print("Error writing to new device file: %s" % str(err))
+            return 1
+        else:
+            return 0
+
+    def _get_port_eeprom_path(self, port_num, devid):
+        sysfs_i2c_adapter_base_path = ""
+
+        if port_num in self.port_to_eeprom_mapping:
+            sysfs_sfp_i2c_client_eeprom_path = self.port_to_eeprom_mapping[port_num]
+        else:
+            sysfs_i2c_adapter_base_path = "/sys/class/i2c-adapter"
+
+            i2c_adapter_id = self._get_port_i2c_adapter_id(port_num)
+            if i2c_adapter_id is None:
+                print("Error getting i2c bus num")
+                return None
+
+            # Get i2c virtual bus path for the sfp
+            sysfs_sfp_i2c_adapter_path = "%s/i2c-%s" % (sysfs_i2c_adapter_base_path,
+                                                        str(i2c_adapter_id))
+
+            # If i2c bus for port does not exist
+            if not os.path.exists(sysfs_sfp_i2c_adapter_path):
+                print("Could not find i2c bus %s. Driver not loaded?" % sysfs_sfp_i2c_adapter_path)
+                return None
+
+            sysfs_sfp_i2c_client_path = "%s/%s-00%s" % (sysfs_sfp_i2c_adapter_path,
+                                                        str(i2c_adapter_id),
+                                                        hex(devid)[-2:])
+
+            # If sfp device is not present on bus, Add it
+            if not os.path.exists(sysfs_sfp_i2c_client_path):
+                if port_num in self.qsfp_ports:
+                    ret = self._add_new_sfp_device(
+                            sysfs_sfp_i2c_adapter_path, devid, self.QSFP_DEVICE_TYPE)
+                else:
+                    ret = self._add_new_sfp_device(
+                            sysfs_sfp_i2c_adapter_path, devid, self.SFP_DEVICE_TYPE)
+                if ret != 0:
+                    print("Error adding sfp device")
+                    return None
+
+            sysfs_sfp_i2c_client_eeprom_path = "%s/eeprom" % sysfs_sfp_i2c_client_path
+
+        return sysfs_sfp_i2c_client_eeprom_path
+
+    def _read_eeprom_specific_bytes(self, sysfsfile_eeprom, offset, num_bytes):
+        eeprom_raw = []
+        for i in range(0, num_bytes):
+            eeprom_raw.append("0x00")
+
+        rv, raw = self._sfp_read_file_path(sysfsfile_eeprom, offset, num_bytes)
+        if rv is False:
+            return None
+
+        try:
+            for n in range(0, num_bytes):
+                eeprom_raw[n] = hex(raw[n])[2:].zfill(2)
+        except Exception:
+            return None
+
+        return eeprom_raw
+
+    def get_eeprom_dom_raw(self, port_num):
+        if port_num in self.qsfp_ports:
+            # QSFP DOM EEPROM is also at addr 0x50 and thus also stored in eeprom_ifraw
+            return None
+        # Read dom eeprom at addr 0x51
+        return self._read_eeprom_devid(port_num, self.IDENTITY_EEPROM_ADDR, 256)
+
+    def get_presence(self, port_num):
+        # Check for invalid port_num
+        if port_num < self.port_start or port_num > self.port_end:
+            return False
+
+        presence_path = "/sys/wb_plat/sff/sff%d/present" % port_num
+
+        try:
+            with open(presence_path, "rb") as data:
+                presence_data = data.read(2)
+                if presence_data == "":
+                    return False
+                result = int(presence_data, 16)
+        except IOError:
+            return False
+
+        if result == 1:
+            return True
+        return False
+
+    def get_low_power_mode(self, port_num):
+        # Check for invalid port_num
+
+        return True
+
+    def set_low_power_mode(self, port_num, lpmode):
+        # Check for invalid port_num
+
+        return True
+
+    def reset(self, port_num):
+        # Check for invalid port_num
+        if port_num < self.port_start or port_num > self.port_end:
+            return False
+
+        return True
+
+    def get_transceiver_change_event(self, timeout=0):
+        return False, {}
+
+    def get_highest_temperature(self):
+        offset = 0
+        hightest_temperature = -9999
+
+        presence_flag = False
+        read_eeprom_flag = False
+        temperature_valid_flag = False
+
+        for port in range(49, self.PORTS_IN_BLOCK):
+            if self.get_presence(port) is False:
+                continue
+
+            presence_flag = True
+
+            if port in self.qsfp_ports:
+                offset = 22
+            else:
+                offset = 96
+
+            eeprom_path = self._get_port_eeprom_path(port, 0x50)
+            try:
+                with open(eeprom_path, mode="rb", buffering=0) as eeprom:
+                    read_eeprom_flag = True
+                    eeprom_raw = self._read_eeprom_specific_bytes(eeprom, offset, 2)
+                    msb = int(eeprom_raw[0], 16)
+                    lsb = int(eeprom_raw[1], 16)
+
+                    result = (msb << 8) | (lsb & 0xff)
+                    result = float(result / 256.0)
+                    if -50 <= result <= 200:
+                        temperature_valid_flag = True
+                        hightest_temperature = max(hightest_temperature, result)
+            except Exception:
+                print(traceback.format_exc())
+
+        # all port not presence
+        if presence_flag is False:
+            hightest_temperature = -10000
+
+        # all port read eeprom fail
+        elif read_eeprom_flag is False:
+            hightest_temperature = -9999
+
+        # all port temperature invalid
+        elif read_eeprom_flag is True and temperature_valid_flag is False:
+            hightest_temperature = -10000
+
+        hightest_temperature = round(hightest_temperature, 2)
+
+        return hightest_temperature
diff --git a/device/micas/x86_64-micas_m2-w6510-48v8c-r0/plugins/ssd_util.py b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/plugins/ssd_util.py
new file mode 100755
index 000000000..932867b34
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/plugins/ssd_util.py
@@ -0,0 +1,318 @@
+#
+# ssd_util.py
+#
+# Generic implementation of the SSD health API
+# SSD models supported:
+#  - InnoDisk
+#  - StorFly
+#  - Virtium
+
+try:
+    import re
+    import os
+    import subprocess
+    from sonic_platform_base.sonic_ssd.ssd_base import SsdBase
+except ImportError as e:
+    raise ImportError (str(e) + "- required module not found")
+
+SMARTCTL = "smartctl {} -a"
+INNODISK = "iSmart -d {}"
+VIRTIUM  = "SmartCmd -m {}"
+DISK_LIST_CMD = "fdisk -l -o Device"
+DISK_FREE_CMD = "df -h"
+MOUNT_CMD = "mount"
+
+NOT_AVAILABLE = "N/A"
+PE_CYCLE = 3000
+FAIL_PERCENT = 95
+
+# Set Vendor Specific IDs
+INNODISK_HEALTH_ID = 169
+INNODISK_TEMPERATURE_ID = 194
+
+class SsdUtil(SsdBase):
+    """
+    Generic implementation of the SSD health API
+    """
+    model = NOT_AVAILABLE
+    serial = NOT_AVAILABLE
+    firmware = NOT_AVAILABLE
+    temperature = NOT_AVAILABLE
+    health = NOT_AVAILABLE
+    remaining_life = NOT_AVAILABLE
+    sata_rate = NOT_AVAILABLE
+    ssd_info = NOT_AVAILABLE
+    vendor_ssd_info = NOT_AVAILABLE
+
+    def __init__(self, diskdev):
+        self.vendor_ssd_utility = {
+            "Generic"  : { "utility" : SMARTCTL, "parser" : self.parse_generic_ssd_info },
+            "InnoDisk" : { "utility" : INNODISK, "parser" : self.parse_innodisk_info },
+            "M.2"      : { "utility" : INNODISK, "parser" : self.parse_innodisk_info },
+            "StorFly"  : { "utility" : VIRTIUM,  "parser" : self.parse_virtium_info },
+            "Virtium"  : { "utility" : VIRTIUM,  "parser" : self.parse_virtium_info }
+        }
+
+        """
+        The dict model_attr keys relate the vendors
+        LITEON : "ER2-GD","AF2MA31DTDLT"
+        Intel  : "SSDSCKKB"
+        SMI    : "SM619GXC"
+        samsung: "MZNLH"
+        ADATA  : "IM2S3134N"
+        """
+        self.model_attr = {
+             "ER2-GD"       : { "temperature" : "\n190\s+(.+?)\n", "remainingLife" : "\n202\s+(.+?)\n" },
+             "AF2MA31DTDLT" : { "temperature" : "\n194\s+(.+?)\n", "remainingLife" : "\n202\s+(.+?)\n" },
+             "SSDSCK"       : { "temperature" : "\n194\s+(.+?)\n", "remainingLife" : "\n233\s+(.+?)\n" },
+             "SM619GXC"     : { "temperature" : "\n194\s+(.+?)\n", "remainingLife" : "\n169\s+(.+?)\n" },
+             "MZNLH"        : { "temperature" : "\n190\s+(.+?)\n", "remainingLife" : "\n245\s+(.+?)\n" },
+             "IM2S3134N"    : { "temperature" : "\n194\s+(.+?)\n", "remainingLife" : "\n231\s+(.+?)\n" },
+             "MTFDDAV240TCB-1AR1ZABAA"    : { "temperature" : "\n194\s+(.+?)\n", "remainingLife" : "\n202\s+(.+?)\n" }
+        }
+
+        self.key_list = list(self.model_attr.keys())
+        self.attr_info_rule = "[\s\S]*SMART Attributes Data Structure revision number: 1|SMART Error Log Version[\s\S]*"
+        self.dev = diskdev
+        # Generic part
+        self.fetch_generic_ssd_info(diskdev)
+        self.parse_generic_ssd_info()
+        self.fetch_vendor_ssd_info(diskdev, "Generic")
+        
+        # Known vendor part
+        if self.model:
+            model_short = self.model.split()[0]
+            if model_short in self.vendor_ssd_utility:
+                self.fetch_vendor_ssd_info(diskdev, model_short)
+                self.parse_vendor_ssd_info(model_short)
+            else:
+                # No handler registered for this disk model
+                pass
+        else:
+            # Failed to get disk model
+            self.model = "Unknown"
+
+    def _execute_shell(self, cmd):
+        process = subprocess.Popen(cmd.split(), universal_newlines=True, stdout=subprocess.PIPE)
+        output, error = process.communicate()
+        exit_code = process.returncode
+        if exit_code:
+            return None
+        return output
+
+    def _parse_re(self, pattern, buffer):
+        res_list = re.findall(pattern, str(buffer))
+        return res_list[0] if res_list else NOT_AVAILABLE
+
+    def fetch_generic_ssd_info(self, diskdev):
+        self.ssd_info = self._execute_shell(self.vendor_ssd_utility["Generic"]["utility"].format(diskdev))
+
+    # Health and temperature values may be overwritten with vendor specific data
+    def parse_generic_ssd_info(self):
+        if "nvme" in self.dev:
+            self.model = self._parse_re('Model Number:\s*(.+?)\n', self.ssd_info)
+
+            health_raw = self._parse_re('Percentage Used\s*(.+?)\n', self.ssd_info)
+            if health_raw == NOT_AVAILABLE:
+                self.health = NOT_AVAILABLE
+            else:
+                health_raw = health_raw.split()[-1]
+                self.health = 100 - float(health_raw.strip('%'))
+
+            temp_raw = self._parse_re('Temperature\s*(.+?)\n', self.ssd_info)
+            if temp_raw == NOT_AVAILABLE:
+                self.temperature = NOT_AVAILABLE
+            else:
+                temp_raw = temp_raw.split()[-2]
+                self.temperature = float(temp_raw)
+        else:
+            self.model = self._parse_re('Device Model:\s*(.+?)\n', self.ssd_info)
+            model_key = ""
+            for key in self.key_list:
+                if re.search(key, self.model):
+                    model_key = key
+                    break
+            if  model_key != "":
+                self.remaining_life = self._parse_re(self.model_attr[model_key]["remainingLife"], re.sub(self.attr_info_rule,"",self.ssd_info)).split()[2]
+                self.temperature = self._parse_re(self.model_attr[model_key]["temperature"], re.sub(self.attr_info_rule,"",self.ssd_info)).split()[8]
+                self.health = self.remaining_life
+            # Get the LITEON ssd health value by (PE CYCLE - AVG ERASE CYCLE )/(PE CYCLE)
+            if model_key in ["ER2-GD", "AF2MA31DTDLT"]:
+                avg_erase = int(self._parse_re('\n173\s+(.+?)\n' ,re.sub(self.attr_info_rule,"",self.ssd_info)).split()[-1])
+                self.health = int(round((PE_CYCLE - avg_erase)/PE_CYCLE*100,0))
+            if self.remaining_life != NOT_AVAILABLE and  int(self.remaining_life) < FAIL_PERCENT:
+                self.remaining_life = "Fail"
+        self.sata_rate = self._parse_re('SATA Version is:.*current: (.+?)\)\n', self.ssd_info)
+        self.serial = self._parse_re('Serial Number:\s*(.+?)\n', self.ssd_info)
+        self.firmware = self._parse_re('Firmware Version:\s*(.+?)\n', self.ssd_info)
+
+    def parse_innodisk_info(self):
+        if self.vendor_ssd_info:
+            self.health = self._parse_re('Health:\s*(.+?)%', self.vendor_ssd_info)
+            self.temperature = self._parse_re('Temperature\s*\[\s*(.+?)\]', self.vendor_ssd_info)
+        else:
+            if self.health == NOT_AVAILABLE:
+                health_raw = self.parse_id_number(INNODISK_HEALTH_ID)
+                self.health = health_raw.split()[-1]
+            if self.temperature == NOT_AVAILABLE:
+                temp_raw = self.parse_id_number(INNODISK_TEMPERATURE_ID)
+                self.temperature = temp_raw.split()[-6]
+
+    def parse_virtium_info(self):
+        if self.vendor_ssd_info:
+            self.temperature = self._parse_re('Temperature_Celsius\s*\d*\s*(\d+?)\s+', self.vendor_ssd_info)
+            nand_endurance = self._parse_re('NAND_Endurance\s*\d*\s*(\d+?)\s+', self.vendor_ssd_info)
+            avg_erase_count = self._parse_re('Average_Erase_Count\s*\d*\s*(\d+?)\s+', self.vendor_ssd_info)
+            try:
+                self.health = 100 - (float(avg_erase_count) * 100 / float(nand_endurance))
+            except (ValueError, ZeroDivisionError):
+                # Invalid avg_erase_count or nand_endurance.
+                pass
+
+    def fetch_vendor_ssd_info(self, diskdev, model):
+        self.vendor_ssd_info = self._execute_shell(self.vendor_ssd_utility[model]["utility"].format(diskdev))
+
+    def parse_vendor_ssd_info(self, model):
+        self.vendor_ssd_utility[model]["parser"]()
+
+    def check_readonly2(self, partition, filesystem):
+        # parse mount cmd output info
+        mount_info = self._execute_shell(MOUNT_CMD)
+        for line in mount_info.split('\n'):
+            column_list = line.split()
+            if line == '':
+                continue
+            if column_list[0] == partition and column_list[2] == filesystem:
+                if column_list[5].split(',')[0][1:] == "ro":
+                    return partition
+                else:
+                    return NOT_AVAILABLE
+        return NOT_AVAILABLE
+
+    def check_readonly(self, partition, filesystem):
+        ret = os.access(filesystem, os.W_OK)
+        if ret == False:
+            return partition
+        else:
+            return NOT_AVAILABLE
+        
+    def get_health(self):
+        """
+        Retrieves current disk health in percentages
+
+        Returns:
+            A float number of current ssd health
+            e.g. 83.5
+        """
+        if self.health == 'N/A':
+            return "NA"
+        else:
+            return float(self.health)
+
+    def get_temperature(self):
+        """
+        Retrieves current disk temperature in Celsius
+
+        Returns:
+            A float number of current temperature in Celsius
+            e.g. 40.1
+        """
+        if self.temperature == 'N/A':
+            return 'NA'
+        else:
+            return float(self.temperature)
+
+    def get_model(self):
+        """
+        Retrieves model for the given disk device
+
+        Returns:
+            A string holding disk model as provided by the manufacturer
+        """
+        return self.model
+
+    def get_firmware(self):
+        """
+        Retrieves firmware version for the given disk device
+
+        Returns:
+            A string holding disk firmware version as provided by the manufacturer
+        """
+        return self.firmware
+
+    def get_serial(self):
+        """
+        Retrieves serial number for the given disk device
+
+        Returns:
+            A string holding disk serial number as provided by the manufacturer
+        """
+        return self.serial
+    def get_sata_rate(self):
+        """
+        Retrieves SATA rate for the given disk device
+        Returns:
+            A string holding current SATA rate as provided by the manufacturer
+        """
+        return self.sata_rate
+    def get_remaining_life(self):
+        """
+        Retrieves remaining life for the given disk device
+        Returns:
+            A string holding disk remaining life as provided by the manufacturer
+        """
+        return self.remaining_life
+    def get_vendor_output(self):
+        """
+        Retrieves vendor specific data for the given disk device
+
+        Returns:
+            A string holding some vendor specific disk information
+        """
+        return self.vendor_ssd_info
+
+    def parse_id_number(self, id):
+        return self._parse_re('{}\s*(.+?)\n'.format(id), self.ssd_info)
+
+    def get_readonly_partition(self):
+        """
+        Check the partition mount filesystem is readonly status,then output the result.
+        Returns:
+            The readonly partition list
+        """
+
+        ro_partition_list = []
+        partition_list = []
+
+        # parse fdisk cmd output info
+        disk_info = self._execute_shell(DISK_LIST_CMD)
+        begin_flag = False
+        for line in disk_info.split('\n'):
+            if line == "Device":
+                begin_flag = True
+                continue
+            if begin_flag:
+                if line != "":
+                    partition_list.append(line)
+                else:
+                    break
+
+        # parse df cmd output info
+        disk_free = self._execute_shell(DISK_FREE_CMD)
+        disk_dict = {}
+        line_num = 0
+        for line in disk_free.split('\n'):
+            line_num = line_num + 1
+            if line_num == 1 or line == "":
+                continue
+            column_list = line.split()
+            disk_dict[column_list[0]] = column_list[5]
+
+        # get partition which is readonly
+        for partition in partition_list:
+            if partition in disk_dict:
+                ret = self.check_readonly(partition, disk_dict[partition])
+                if (ret != NOT_AVAILABLE):
+                    ro_partition_list.append(ret)
+
+        return ro_partition_list
diff --git a/device/micas/x86_64-micas_m2-w6510-48v8c-r0/pmon_daemon_control.json b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/pmon_daemon_control.json
new file mode 100644
index 000000000..94592fa8c
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/pmon_daemon_control.json
@@ -0,0 +1,3 @@
+{
+    "skip_ledd": true
+}
diff --git a/device/micas/x86_64-micas_m2-w6510-48v8c-r0/system_health_monitoring_config.json b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/system_health_monitoring_config.json
new file mode 100755
index 000000000..e69de29bb
diff --git a/platform/broadcom/one-image.mk b/platform/broadcom/one-image.mk
index f5a1f68f4..4e86423bd 100755
--- a/platform/broadcom/one-image.mk
+++ b/platform/broadcom/one-image.mk
@@ -89,7 +89,8 @@ $(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(DELL_S6000_PLATFORM_MODULE) \
                                $(UFISPACE_S9110_32X_PLATFORM_MODULE) \
                                $(UFISPACE_S8901_54XC_PLATFORM_MODULE) \
                                $(UFISPACE_S7801_54XS_PLATFORM_MODULE) \
-                               $(UFISPACE_S6301_56ST_PLATFORM_MODULE)
+                               $(UFISPACE_S6301_56ST_PLATFORM_MODULE) \
+                               $(MICAS_M2_W6510_48V8C_PLATFORM_MODULE)
 
 $(SONIC_ONE_IMAGE)_LAZY_BUILD_INSTALLS = $(BRCM_OPENNSL_KERNEL) $(BRCM_DNX_OPENNSL_KERNEL)
 ifeq ($(INSTALL_DEBUG_TOOLS),y)
diff --git a/platform/broadcom/platform-modules-micas.dep b/platform/broadcom/platform-modules-micas.dep
new file mode 100644
index 000000000..6ae59a668
--- /dev/null
+++ b/platform/broadcom/platform-modules-micas.dep
@@ -0,0 +1,9 @@
+MPATH       := $($(MICAS_M2_W6510_48V8C_PLATFORM_MODULE)_SRC_PATH)
+DEP_FILES   := $(SONIC_COMMON_FILES_LIST) platform/broadcom/platform-modules-micas.mk platform/broadcom/platform-modules-micas.dep   
+DEP_FILES   += $(SONIC_COMMON_BASE_FILES_LIST)
+DEP_FILES   += $(addprefix $(MPATH)/,$(shell cd $(MPATH) && git ls-files))
+
+
+$(MICAS_M2_W6510_48V8C_PLATFORM_MODULE)_CACHE_MODE  := GIT_CONTENT_SHA 
+$(MICAS_M2_W6510_48V8C_PLATFORM_MODULE)_DEP_FLAGS   := $(SONIC_COMMON_FLAGS_LIST)
+$(MICAS_M2_W6510_48V8C_PLATFORM_MODULE)_DEP_FILES   := $(DEP_FILES)
diff --git a/platform/broadcom/platform-modules-micas.mk b/platform/broadcom/platform-modules-micas.mk
new file mode 100644
index 000000000..7f2a95cad
--- /dev/null
+++ b/platform/broadcom/platform-modules-micas.mk
@@ -0,0 +1,10 @@
+## M2-W6510-48V8C
+MICAS_M2_W6510_48V8C_PLATFORM_MODULE_VERSION = 1.0
+export MICAS_M2_W6510_48V8C_PLATFORM_MODULE_VERSION
+
+MICAS_M2_W6510_48V8C_PLATFORM_MODULE = platform-modules-micas-m2-w6510-48v8c_$(MICAS_M2_W6510_48V8C_PLATFORM_MODULE_VERSION)_amd64.deb
+$(MICAS_M2_W6510_48V8C_PLATFORM_MODULE)_SRC_PATH = $(PLATFORM_PATH)/sonic-platform-modules-micas
+$(MICAS_M2_W6510_48V8C_PLATFORM_MODULE)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON) $(PDDF_PLATFORM_MODULE)
+$(MICAS_M2_W6510_48V8C_PLATFORM_MODULE)_PLATFORM = x86_64-micas_m2-w6510-48v8c-r0
+SONIC_DPKG_DEBS += $(MICAS_M2_W6510_48V8C_PLATFORM_MODULE)
+SONIC_STRETCH_DEBS += $(MICAS_M2_W6510_48V8C_PLATFORM_MODULE)
diff --git a/platform/broadcom/rules.dep b/platform/broadcom/rules.dep
index e27e370b9..51cca1baa 100644
--- a/platform/broadcom/rules.dep
+++ b/platform/broadcom/rules.dep
@@ -20,6 +20,7 @@ include $(PLATFORM_PATH)/platform-modules-quanta.dep
 #include $(PLATFORM_PATH)/platform-modules-ragile.dep
 include $(PLATFORM_PATH)/platform-modules-ruijie.dep
 include $(PLATFORM_PATH)/platform-modules-brcm-xlr-gts.dep
+include $(PLATFORM_PATH)/platform-modules-micas.dep
 include $(PLATFORM_PATH)/docker-syncd-brcm.dep
 include $(PLATFORM_PATH)/docker-syncd-brcm-rpc.dep
 include $(PLATFORM_PATH)/docker-saiserver-brcm.dep
diff --git a/platform/broadcom/rules.mk b/platform/broadcom/rules.mk
index 3f1d35c89..3349e6717 100755
--- a/platform/broadcom/rules.mk
+++ b/platform/broadcom/rules.mk
@@ -22,6 +22,7 @@ include $(PLATFORM_PATH)/platform-modules-quanta.mk
 #include $(PLATFORM_PATH)/platform-modules-ragile.mk
 #include $(PLATFORM_PATH)/platform-modules-tencent.mk
 #include $(PLATFORM_PATH)/platform-modules-ufispace.mk
+include $(PLATFORM_PATH)/platform-modules-micas.mk
 include $(PLATFORM_PATH)/docker-syncd-brcm.mk
 include $(PLATFORM_PATH)/docker-syncd-brcm-rpc.mk
 include $(PLATFORM_PATH)/docker-saiserver-brcm.mk
diff --git a/platform/broadcom/sonic-platform-modules-micas/LICENSE b/platform/broadcom/sonic-platform-modules-micas/LICENSE
new file mode 100644
index 000000000..5681cac34
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/LICENSE
@@ -0,0 +1,14 @@
+Copyright (C) 2016  Microsoft, Inc
+This program is free software; you can redistribute it and/or
+modify it under the terms of the GNU General Public License
+as published by the Free Software Foundation; either version 2
+of the License, or (at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/Makefile b/platform/broadcom/sonic-platform-modules-micas/common/Makefile
new file mode 100755
index 000000000..385dae088
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/Makefile
@@ -0,0 +1,41 @@
+PWD		= $(shell pwd)
+CC ?=gcc
+INSTALL_MOD_DIR ?=extra
+KVERSION   ?= $(shell uname -r)
+KERNEL_SRC ?=  /lib/modules/$(KVERSION)
+EXTRA_CFLAGS:= -I$(M)/include
+EXTRA_CFLAGS+= -Wall
+SUB_BUILD_DIR = $(PWD)/build
+DIR_KERNEL_SRC = $(PWD)/modules
+SCRIPT_DIR = $(PWD)/script
+SERVICE_DIR = $(PWD)/service
+BLACK_DRIVER_CONF_DIR = $(PWD)/modprobe_conf
+
+app_dir = $(PWD)/app
+app_build_dir = $(app_dir)/build
+modules_build_dir = $(DIR_KERNEL_SRC)/build
+
+INSTALL_MODULE_DIR = $(SUB_BUILD_DIR)/$(KERNEL_SRC)/$(INSTALL_MOD_DIR)
+INSTALL_SCRIPT_DIR = $(SUB_BUILD_DIR)/usr/local/bin
+INSTALL_SERVICE_DIR = $(SUB_BUILD_DIR)/lib/systemd/system
+INSTALL_LIB_DIR = $(SUB_BUILD_DIR)/usr/lib/python3/dist-packages
+INSTALL_BLACK_DRIVER = $(SUB_BUILD_DIR)/etc/modprobe.d
+
+all:
+	$(MAKE) -C $(app_dir)
+	$(MAKE) -C $(DIR_KERNEL_SRC)
+	@if [ ! -d ${INSTALL_MODULE_DIR} ]; then mkdir -p ${INSTALL_MODULE_DIR} ;fi
+	@if [ ! -d ${INSTALL_SCRIPT_DIR} ]; then mkdir -p ${INSTALL_SCRIPT_DIR} ;fi
+	@if [ ! -d ${INSTALL_SERVICE_DIR} ]; then mkdir -p ${INSTALL_SERVICE_DIR} ;fi
+	@if [ ! -d ${INSTALL_LIB_DIR} ]; then mkdir -p ${INSTALL_LIB_DIR} ;fi
+	@if [ -d $(PWD)/lib/ ]; then cp -r $(PWD)/lib/* ${INSTALL_LIB_DIR} ;fi
+	@if [ -d $(PWD)/sonic_platform/ ]; then cp -rf $(PWD)/sonic_platform ${INSTALL_LIB_DIR} ;fi
+	cp -r $(modules_build_dir)/*.ko $(INSTALL_MODULE_DIR)
+	cp -r $(app_dir)/build/app/*  $(INSTALL_SCRIPT_DIR)
+	cp -r $(SCRIPT_DIR)/*  $(INSTALL_SCRIPT_DIR)
+	cp -r $(SERVICE_DIR)/*  $(INSTALL_SERVICE_DIR)
+	@if [ -d $(INSTALL_SCRIPT_DIR) ]; then chmod +x $(INSTALL_SCRIPT_DIR)/* ;fi
+	@if [ ! -d ${INSTALL_BLACK_DRIVER} ]; then mkdir -p ${INSTALL_BLACK_DRIVER} ;fi
+	cp -r  $(BLACK_DRIVER_CONF_DIR)/*  $(INSTALL_BLACK_DRIVER)
+clean:
+	rm -rf $(SUB_BUILD_DIR)
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/Makefile b/platform/broadcom/sonic-platform-modules-micas/common/app/Makefile
new file mode 100644
index 000000000..25ba3c5a9
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/app/Makefile
@@ -0,0 +1,25 @@
+pes_parent_dir:=$(shell pwd)/$(lastword $(MAKEFILE_LIST))
+pes_parent_dir:=$(shell dirname $(pes_parent_dir))
+
+SUBDIRS=$(shell ls -l | grep ^d | awk '{if($$9 != "build") print $$9}')
+INC = -I./inc
+
+COMMON_OUT_PUT := $(shell pwd)/build
+common_out_put_dir := $(COMMON_OUT_PUT)/app
+common_module_dir := $(COMMON_OUT_PUT)/module/
+export common_out_put_dir common_module_dir
+
+all : CHECK $(SUBDIRS)
+CHECK :
+	@echo $(pes_parent_dir)
+
+$(SUBDIRS):ECHO
+	#@echo $@
+	make -C $@
+
+ECHO:
+	@echo $(SUBDIRS)
+
+.PHONY : clean
+clean :
+	-rm  -rf $(COMMON_OUT_PUT)
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/dev_util/Makefile b/platform/broadcom/sonic-platform-modules-micas/common/app/dev_util/Makefile
new file mode 100644
index 000000000..e4078716e
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/app/dev_util/Makefile
@@ -0,0 +1,30 @@
+top_srcdir:=$(shell pwd)
+#include $(top_srcdir)/Rules.mk
+DIR=$(shell pwd)
+BUILD_OUTPUT=$(DIR)/tmp
+SRCS=$(wildcard *.c)
+OBJS=$(patsubst %.c, $(BUILD_OUTPUT)/%.o, $(SRCS))
+DEPS=$(patsubst %.o, %.d, $(OBJS))
+CFLAGS+=-Wall -W -g -I$(DIR)/include
+LDFLAGS=
+PROGRAM=dfd_debug
+
+.PHONY: all
+
+all:$(OBJS)
+	$(CC)  $(OBJS) $(LDFLAGS) -o $(BUILD_OUTPUT)/$(PROGRAM)
+	@if [ ! -d ${common_out_put_dir} ]; then mkdir -p ${common_out_put_dir} ;fi
+	cp -p $(BUILD_OUTPUT)/$(PROGRAM) $(common_out_put_dir)
+
+$(OBJS):$(SRCS)
+	@if [ ! -d ${BUILD_OUTPUT} ]; then mkdir -p ${BUILD_OUTPUT} ;fi
+	$(CC)  -c $(CFLAGS) $(INCLUDE) $(*F).c -o $@
+
+.PHONY: install
+install:
+	@mkdir -p $(common_out_put_dir)
+	cp -p $(BUILD_OUTPUT)/$(PROGRAM) $(common_out_put_dir)
+
+rebuild: clean all
+clean:
+	@rm -rf $(BUILD_OUTPUT)/*
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/dev_util/dfd_debug.c b/platform/broadcom/sonic-platform-modules-micas/common/app/dev_util/dfd_debug.c
new file mode 100644
index 000000000..93ed6066e
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/app/dev_util/dfd_debug.c
@@ -0,0 +1,43 @@
+#include <stdlib.h>
+#include <stdio.h>
+#include <stdbool.h>
+#include <string.h>
+#include <unistd.h>
+#include <pthread.h>
+#include <errno.h>
+#include <fcntl.h>
+#include "dfd_utest.h"
+
+int g_dfd_debug_sw = 0;
+int g_dfd_debugpp_sw = 0;
+
+void dfd_debug_set_init(void)
+{
+    FILE *fp;
+    char buf[10];
+
+    mem_clear(buf, sizeof(buf));
+    fp = fopen(DFD_DEBUGP_DEBUG_FILE, "r");
+    if (fp != NULL) {
+
+        g_dfd_debug_sw = 1;
+        fclose(fp);
+    }
+
+    fp = fopen(DFD_DEBUGPP_DEBUG_FILE, "r");
+    if (fp != NULL) {
+
+        g_dfd_debugpp_sw = 1;
+        fclose(fp);
+    }
+
+    return;
+}
+
+int main(int argc, char* argv[])
+{
+    dfd_debug_set_init();
+    dfd_utest_cmd_main(argc, argv);
+
+    return 0;
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/dev_util/dfd_utest.c b/platform/broadcom/sonic-platform-modules-micas/common/app/dev_util/dfd_utest.c
new file mode 100644
index 000000000..c82b0baad
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/app/dev_util/dfd_utest.c
@@ -0,0 +1,2121 @@
+
+#include <errno.h>
+#include <stdlib.h>
+#include <stdio.h>
+#include <stdbool.h>
+#include <string.h>
+#include <stdlib.h>
+#include <unistd.h>
+#include <pthread.h>
+#include <errno.h>
+#include <fcntl.h>
+#include <sys/ioctl.h>
+#include <sys/types.h>
+#include <sys/stat.h>
+#include <sys/prctl.h>
+#include <stdint.h>
+#include <semaphore.h>
+#include <linux/version.h>
+#include <sys/mman.h>
+#include <time.h>
+#include "dfd_utest.h"
+
+#define DFD_UTEST_MAX_RDWR_NUM            (256)
+#define DFD_UTEST_DEFAULT_WR_NUM          (1)
+
+#define DEV_MEM_NAME                    "/dev/mem"
+#define DEV_KMEM_NAME                   "/dev/kmem"
+
+#define WIDTH_1Byte                       (1)
+#define WIDTH_2Byte                       (2)
+#define WIDTH_4Byte                       (4)
+#define DFD_UTEST_MAX_BIT_WIDTH           (4)
+
+struct phydev_user_info {
+    int phy_index;
+    uint32_t regnum;
+    uint32_t regval;
+};
+
+#define CMD_PHY_LIST                        _IOR('P', 0, struct phydev_user_info)
+#define CMD_PHY_READ                        _IOR('P', 1, struct phydev_user_info)
+#define CMD_PHY_WRITE                       _IOR('P', 2, struct phydev_user_info)
+
+struct mdio_dev_user_info {
+    int mdio_index;
+    int phyaddr;
+    uint32_t regnum;
+    uint32_t regval;
+};
+
+#define CMD_MDIO_LIST                        _IOR('M', 0, struct mdio_dev_user_info)
+#define CMD_MDIO_READ                        _IOR('M', 1, struct mdio_dev_user_info)
+#define CMD_MDIO_WRITE                       _IOR('M', 2, struct mdio_dev_user_info)
+
+#ifdef DFD_UTEST_ITEM
+#undef DFD_UTEST_ITEM
+#endif
+#define DFD_UTEST_ITEM(_id, _type_str, _help_info, _help_info_detail)    {_id, #_type_str, dfd_utest_##_type_str, _help_info, _help_info_detail},
+static dfd_utest_t g_dfd_unit_test[] = {
+    DFD_UTEST_ITEM_ALL
+};
+
+static int g_sys_page_size;
+#define SYS_PAGE_SIZE                   g_sys_page_size
+#define SYS_PAGE_MASK                   (~(SYS_PAGE_SIZE - 1))
+
+void dfd_utest_print_cmd(int argc, char* argv[])
+{
+    int i;
+
+    for (i = 1; i < argc; i++) {
+        if (i != 1) {
+            printf(" ");
+        }
+        printf("%s", argv[i]);
+    }
+    return;
+}
+
+void dfd_utest_print_all_help(void)
+{
+    int i, tbl_size;
+
+    tbl_size = sizeof(g_dfd_unit_test) / sizeof(g_dfd_unit_test[0]);
+
+    for (i = 0; i < tbl_size; i++) {
+        printf("%-20s\t\t\t%s\r\n", g_dfd_unit_test[i].type_str, g_dfd_unit_test[i].help_info);
+    }
+
+    return;
+}
+
+void dfd_utest_printf_single_help(int utest_type)
+{
+    int i, tbl_size;
+
+    tbl_size = sizeof(g_dfd_unit_test) / sizeof(g_dfd_unit_test[0]);
+    for (i = 0; i < tbl_size; i++) {
+        if (g_dfd_unit_test[i].utest_type == utest_type) {
+            printf("%-20s\t\t\t%s\r\n", g_dfd_unit_test[i].type_str, g_dfd_unit_test[i].help_info_detail);
+            return;
+        }
+    }
+
+    DFD_DEBUG_DBG("type: %d not match.\n", utest_type);
+    return;
+
+}
+
+void dfd_utest_printf_reg(uint8_t *buf, int buf_len, uint32_t offset_addr)
+{
+    int i, j, tmp;
+
+    j = offset_addr % 16;
+    tmp = j;
+    offset_addr -= j;
+    printf("\n            ");
+
+    for (i = 0; i < 16; i++) {
+        printf("%2x ", i);
+    }
+
+    for (i = 0; i < buf_len + j; i++) {
+        if ((i % 16) == 0) {
+            printf("\n0x%08x  ", offset_addr);
+            offset_addr = offset_addr + 16;
+        }
+        if (tmp) {
+            printf("   ");
+            tmp--;
+        } else {
+            printf("%02x ", buf[i-j]);
+        }
+    }
+
+    printf("\n");
+    return;
+}
+
+#define I2C_RETRIES 0x0701
+#define I2C_TIMEOUT 0x0702
+#define I2C_RDWR 0x0707
+
+#define I2C_SLAVE	0x0703	/* Use this slave address */
+
+#define I2C_SLAVE_FORCE	0x0706	/* Use this slave address, even if it
+				   is already in use by a driver! */
+#define I2C_PEC		0x0708	/* != 0 to use PEC with SMBus */
+#define I2C_SMBUS	0x0720	/* SMBus transfer */
+
+struct i2c_msg
+{
+ unsigned short addr;
+ unsigned short flags;
+#define I2C_M_TEN 0x0010
+#define I2C_M_RD 0x0001
+ unsigned short len;
+ unsigned char *buf;
+};
+
+struct i2c_rdwr_ioctl_data
+{
+ struct i2c_msg *msgs;
+ int nmsgs;
+
+};
+
+#define DFD_I2C_SHORT_ADDR_TYPE 0
+#define DFD_I2C_RETRY_SLEEP_TIME        (10000)   /* 10ms */
+#define DFD_I2C_RETRY_TIME              (50000 / DFD_I2C_RETRY_SLEEP_TIME)
+/* i2c_smbus_xfer read or write markers */
+#define I2C_SMBUS_READ	1
+#define I2C_SMBUS_WRITE	0
+
+/* SMBus transaction types (size parameter in the above functions)
+   Note: these no longer correspond to the (arbitrary) PIIX4 internal codes! */
+#define I2C_SMBUS_QUICK		    0
+#define I2C_SMBUS_BYTE		    1
+#define I2C_SMBUS_BYTE_DATA	    2
+#define I2C_SMBUS_WORD_DATA	    3
+#define I2C_SMBUS_PROC_CALL	    4
+#define I2C_SMBUS_BLOCK_DATA	    5
+#define I2C_SMBUS_I2C_BLOCK_BROKEN  6
+#define I2C_SMBUS_BLOCK_PROC_CALL   7		/* SMBus 2.0 */
+#define I2C_SMBUS_I2C_BLOCK_DATA    8
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(4,0,36)
+/*  fix tjm */
+
+#ifndef __ASSEMBLY__
+/*
+ * __xx is ok: it doesn't pollute the POSIX namespace. Use these in the
+ * header files exported to user space
+ */
+typedef __signed__ char __s8;
+typedef unsigned char __u8;
+
+typedef __signed__ short __s16;
+typedef unsigned short __u16;
+
+typedef __signed__ int __s32;
+typedef unsigned int __u32;
+
+typedef __signed__ long __s64;
+typedef unsigned long __u64;
+
+#endif /* __ASSEMBLY__ */
+
+#else
+/*  do noting add tjm */
+#endif
+
+/*
+ * Data for SMBus Messages
+ */
+#define I2C_SMBUS_BLOCK_MAX	32	/* As specified in SMBus standard */
+union i2c_smbus_data {
+	__u8 byte;
+	__u16 word;
+	__u8 block[I2C_SMBUS_BLOCK_MAX + 2]; /* block[0] is used for length */
+			       /* and one more for user-space compatibility */
+};
+
+/* This is the structure as used in the I2C_SMBUS ioctl call */
+struct i2c_smbus_ioctl_data {
+	__u8 read_write;
+	__u8 command;
+	__u32 size;
+	union i2c_smbus_data  *data;
+};
+int32_t dfd_read_port_i2c_one_time_smbus(char *i2c_name, uint16_t dev_addr, uint16_t offset_addr,
+                                   uint8_t *recv_buf, int32_t size, int addr_type)
+{
+     union i2c_smbus_data data;
+     struct i2c_smbus_ioctl_data ioctl_data;
+     unsigned long addr = dev_addr;
+     int fd;
+     int rc;
+     int rv;
+     int i;
+
+    mem_clear(&ioctl_data, sizeof(struct i2c_smbus_ioctl_data));
+    if (i2c_name == NULL || recv_buf == NULL) {
+            DFD_DEBUG_ERROR("i2c_num = NULL, recv_buf = NULL\r\n");
+            return -1;
+    }
+
+    DFD_DEBUG_DBG("i2c name: %s, dev_addr: 0x%x, offset_addr: 0x%x, size: %d, addr_type: %d.\n", i2c_name, dev_addr,
+        offset_addr, size, addr_type);
+
+    rv = 0;
+    fd = open(i2c_name, O_RDWR | O_SYNC);
+    if (fd < 0) {
+        DFD_DEBUG_ERROR("i2c open fail fd %d\n", fd);
+        rv = fd;
+        goto err;
+    }
+    if (ioctl(fd, I2C_SLAVE_FORCE , addr) < 0) {
+        DFD_DEBUG_ERROR("ioctl 2C_SLAVE_FORCE %d.\n", errno);
+        rv =-1;
+        goto fail;
+    }
+    for (i = 0 ;i < size; i++) {
+         data.byte = 0;
+         ioctl_data.read_write = I2C_SMBUS_READ;
+         ioctl_data.command = (offset_addr + i);
+         ioctl_data.size = I2C_SMBUS_BYTE_DATA;
+         ioctl_data.data= &data;
+
+         rc = ioctl(fd, I2C_SMBUS, &ioctl_data);
+         if (rc < 0) {
+             DFD_DEBUG_ERROR("read, I2C_SMBUS failed: %d.\n", errno);
+             rv = -1;
+             goto fail;
+         }
+         *(recv_buf + i) = data.byte;
+     }
+  fail:
+     close(fd);
+  err:
+     return rv;
+
+}
+
+int32_t dfd_read_port_i2c_one_time(char *i2c_name, uint16_t dev_addr, uint16_t offset_addr,
+                                   uint8_t *recv_buf, int32_t size, int addr_type)
+{
+
+        int32_t fd, rv;
+        struct i2c_rdwr_ioctl_data ioctl_data;
+        struct i2c_msg msgs[2];
+        uint8_t buf[2];
+
+        if (i2c_name == NULL || recv_buf == NULL) {
+            DFD_DEBUG_ERROR("i2c_num = NULL, recv_buf = NULL\r\n");
+            return -1;
+        }
+
+        DFD_DEBUG_DBG("i2c name %s, dev_addr 0x%x, offset_addr 0x%x, size %d, addr_type %d.\n", i2c_name, dev_addr,
+            offset_addr, size, addr_type);
+
+        rv = 0;
+        fd = open(i2c_name, O_RDWR | O_SYNC);
+        if (fd < 0) {
+            DFD_DEBUG_ERROR("i2c open fail fd %d\n", fd);
+            return -1;
+        }
+        mem_clear(&ioctl_data, sizeof(ioctl_data));
+        mem_clear(msgs, sizeof(msgs));
+        mem_clear(buf, sizeof(buf));
+        if (ioctl(fd, I2C_SLAVE, dev_addr) < 0) {
+
+            DFD_DEBUG_ERROR("%s %dioctl fail(ret:%d, errno:%s)!\r\n", __func__ , __LINE__, rv, strerror(errno));
+            rv = -1;
+            goto fail;
+        }
+
+         buf[0] = (uint8_t)(offset_addr);
+         msgs[0].addr= dev_addr;
+         msgs[0].len= 2;
+         msgs[0].buf= buf;
+         msgs[1].addr= dev_addr;
+         msgs[1].flags|= I2C_M_RD;
+         msgs[1].len= 1;
+         msgs[1].buf= recv_buf;
+         ioctl_data.nmsgs= 1;
+         ioctl_data.msgs= msgs;
+
+         rv = ioctl(fd, I2C_RDWR, &ioctl_data);
+        if(rv < 0) {
+            DFD_DEBUG_ERROR("%s %dioctl fail(ret:%d, errno:%s)!\r\n", __func__ , __LINE__, rv, strerror(errno));
+            goto fail;
+        }
+        ioctl_data.msgs= &msgs[1];
+        DFD_DEBUG_DBG("ioctlread, return :%d/n", ioctl(fd, I2C_RDWR, &ioctl_data));
+        DFD_DEBUG_DBG("dfd_read_port_i2c addr: 0x%X, offset: 0x%X, value: 0x%X\n", dev_addr, offset_addr, *recv_buf);
+    fail:
+        close(fd);
+        return rv;
+
+}
+
+int32_t dfd_read_port_i2c(char *i2c_name, uint16_t dev_addr, uint16_t offset_addr,
+                          uint8_t *recv_buf, int32_t size)
+{
+    int i;
+    int rv;
+
+    for (i = 0; i < DFD_I2C_RETRY_TIME; i++) {
+        rv = dfd_read_port_i2c_one_time_smbus(i2c_name, dev_addr, offset_addr, recv_buf, size, DFD_I2C_SHORT_ADDR_TYPE);
+        if (rv < 0) {
+            DFD_DEBUG_ERROR("(read times %d)i2c name %s, dev_addr 0x%X, offset_addr 0x%X, addr_type %d\n", i, i2c_name, dev_addr, offset_addr, DFD_I2C_SHORT_ADDR_TYPE);
+            usleep(DFD_I2C_RETRY_SLEEP_TIME);
+            continue;
+        }
+        break;
+    }
+
+    return rv;
+}
+
+int32_t dfd_write_port_i2c_one_time(char *i2c_name, uint16_t dev_addr, uint16_t offset_addr,
+                                    uint8_t *write_buf, int32_t size,int addr_type)
+{
+    int32_t fd, rv;
+    int index;
+    struct i2c_smbus_ioctl_data ioctl_data;
+    union  i2c_smbus_data data;
+    uint8_t addr_buf[2];
+    uint8_t write_buf_tmp[256];
+
+    if (i2c_name == NULL || write_buf == NULL ) {
+        DFD_DEBUG_ERROR("i2c_num = NULL \r\n");
+        return -1;
+    }
+
+    if (size <= 0) {
+        DFD_DEBUG_ERROR("error:size\n");
+        return -1;
+    }
+    DFD_DEBUG_DBG("i2c name %s, dev_addr 0x%x, offset_addr 0x%x, size %d, addr_type %d\n",i2c_name, dev_addr,
+        offset_addr, size, addr_type);
+    mem_clear(&ioctl_data, sizeof(ioctl_data));
+    mem_clear(addr_buf, sizeof(addr_buf));
+    mem_clear(write_buf_tmp, sizeof(write_buf_tmp));
+
+    rv = 0;
+
+    fd = open(i2c_name, O_RDWR | O_SYNC);
+    if (fd < 0) {
+        DFD_DEBUG_ERROR("i2c open fail fd %d\n", fd);
+        return -1;
+    }
+
+    if (ioctl(fd, I2C_SLAVE_FORCE, dev_addr) < 0) {
+        DFD_DEBUG_ERROR("ioctl, I2C_SLAVE failed: %d.\n", errno);
+        rv = -1;
+        goto fail;
+     }
+
+    for (index = 0; index < size; index++) {
+            data.byte = *(write_buf + index);
+            ioctl_data.read_write = I2C_SMBUS_WRITE;
+            ioctl_data.command = (offset_addr + index);
+            ioctl_data.size = I2C_SMBUS_BYTE_DATA;
+            ioctl_data.data= &data;
+            rv = ioctl(fd, I2C_SMBUS, (unsigned long)&ioctl_data);
+            if(rv < 0) {
+                DFD_DEBUG_ERROR("ioctl fail(ret:%d, errno:%s %d) !\r\n", rv, strerror(errno),errno);
+                break;
+            }
+            DFD_DEBUG_DBG("ret:%d  value:0x%02x\n", rv, data.byte);
+            usleep(5000);
+    }
+
+fail:
+    close(fd);
+    return rv;
+}
+
+int32_t dfd_write_port_i2c(char *i2c_name, uint16_t dev_addr, uint16_t offset_addr,
+                           uint8_t *write_buf, int32_t size)
+{
+    int i;
+    int rv;
+
+    for (i = 0; i < DFD_I2C_RETRY_TIME; i++) {
+        rv = dfd_write_port_i2c_one_time(i2c_name, dev_addr, offset_addr, write_buf,size, DFD_I2C_SHORT_ADDR_TYPE);
+        if (rv < 0) {
+            DFD_DEBUG_ERROR("(write times %d)i2c name %s, dev_addr 0x%X, offset_addr 0x%X, addr_type %d\n",
+                i, i2c_name, dev_addr, offset_addr, DFD_I2C_SHORT_ADDR_TYPE);
+            usleep(DFD_I2C_RETRY_SLEEP_TIME);
+            continue;
+        }
+        break;
+    }
+
+    return rv;
+}
+
+static int dfd_read_io_port(uint16_t offset_addr, uint8_t *recv_buf, int32_t size)
+{
+    int fd;
+    int ret;
+
+    fd = open("/dev/port", O_RDWR);
+    if (fd < 0) {
+        printf("open failed ret %d.\n", fd);
+        return -1;
+    }
+
+    ret = lseek(fd, offset_addr, SEEK_SET);
+    if (ret < 0) {
+        printf("lseek failed ret %d.\n", ret);
+        goto exit;
+    }
+
+    ret = read(fd, recv_buf, size);
+    if (ret != size) {
+        printf("read failed ret %d size %d.\n", ret, size);
+        ret = -1;
+        goto exit;
+    }
+
+exit:
+    close(fd);
+    return ret;
+}
+
+static int dfd_write_io_port(uint16_t offset_addr, uint8_t *write_buf, int32_t size)
+{
+    int fd;
+    int ret;
+
+    fd = open("/dev/port", O_RDWR);
+    if (fd < 0) {
+        printf("open failed ret %d.\n", fd);
+        return -1;
+    }
+
+    ret = lseek(fd, offset_addr, SEEK_SET);
+    if (ret < 0) {
+        printf("lseek failed ret %d.\n", ret);
+        goto exit;
+    }
+
+    ret = write(fd, write_buf, size);
+    if (ret != size) {
+        printf("write failed ret %d size %d.\n", ret, size);
+        ret = -1;
+        goto exit;
+    }
+
+exit:
+    close(fd);
+    return ret;
+}
+
+static int dfd_process_mem(char *dev_name, char is_wr, char width, off_t offset, uint8_t *buf, int32_t size)
+{
+    int mfd, ret = 0;
+    void *base;
+    int i, j;
+    unsigned int val;
+    off_t map_offset;
+    size_t map_size;
+
+    if (size & (width - 1)) {
+        printf("size %d invalid.\n", size);
+        return -1;
+    }
+
+    mfd = open(dev_name, O_RDWR);
+    if (mfd < 0) {
+        printf("Cannot open %s.\n", dev_name);
+        return -1;
+    }
+
+    g_sys_page_size = getpagesize();
+    map_offset = offset & SYS_PAGE_MASK;
+    map_size = size + offset - map_offset;
+    base = mmap(NULL, map_size, PROT_READ | PROT_WRITE, MAP_SHARED, mfd, map_offset);
+    if (base == MAP_FAILED) {
+        printf("mmap offset 0x%lx failed error(%s).\n", map_offset, strerror(errno));
+        close(mfd);
+        return -1;
+    }
+    printf("width %d map_offset 0x%lx, offset 0x%lx, mmap base %p, g_sys_page_size %d\n",
+        width, map_offset, offset, base, g_sys_page_size);
+
+    if (is_wr) {
+        for (i = 0; i < size; i = i + width) {
+            val = 0;
+            for (j = 0; j < width; j++) {
+                val |= buf[i + j] << (8 * j);
+            }
+            switch (width) {
+            case 1:
+                *((volatile unsigned char*)(base + i + offset - map_offset)) = val;
+                break;
+            case 2:
+                *((volatile unsigned short*)(base + i + offset - map_offset)) = val;
+                break;
+            case 4:
+                *((volatile unsigned int*)(base + i + offset - map_offset)) = val;
+                break;
+            default:
+                ret = -1;
+                printf("Not support width %d.\n", width);
+                goto exit;
+            }
+        }
+    } else {
+        for (i = 0; i < size; i = i + width) {
+            switch (width) {
+            case 1:
+                val = *((volatile unsigned char*)(base + i + offset - map_offset));
+                break;
+            case 2:
+                val = *((volatile unsigned short*)(base + i + offset - map_offset));
+                break;
+            case 4:
+                val = *((volatile unsigned int*)(base + i + offset - map_offset));
+                break;
+            default:
+                ret = -1;
+                printf("Not support width %d.\n", width);
+                goto exit;
+            }
+            for (j = 0; j < width; j++) {
+                buf[i + j] = (val >> (8 * j)) & 0xff;
+            }
+        }
+    }
+exit:
+    munmap(base, map_size);
+    close(mfd);
+    return ret;
+}
+
+int32_t dfd_i2c_gen_read_one_time(char *i2c_path, uint32_t dev_addr, uint32_t addr_bitwidth,
+                uint32_t offset_addr, uint8_t *recv_buf, int32_t rd_len)
+{
+    int32_t fd, rv, i;
+    struct i2c_rdwr_ioctl_data ioctl_data;
+    struct i2c_msg msgs[2];
+    uint8_t buf[DFD_UTEST_MAX_BIT_WIDTH];
+
+    fd = open(i2c_path, O_RDWR | O_SYNC);
+    if (fd < 0) {
+        DFD_DEBUG_ERROR("i2c open fail fd:%d\n", fd);
+        return -1;
+    }
+    mem_clear(&ioctl_data, sizeof(ioctl_data));
+    mem_clear(msgs, sizeof(msgs));
+    mem_clear(buf, sizeof(buf));
+
+    i = 0;
+
+    switch (addr_bitwidth) {
+    case WIDTH_4Byte:
+        buf[i++] = (offset_addr >> 24) & 0xFF;
+        buf[i++] = (offset_addr >> 16) & 0xFF;
+        buf[i++] = (offset_addr >> 8) & 0xFF;
+        buf[i++] = offset_addr & 0xFF;
+        break;
+    case WIDTH_2Byte:
+        buf[i++] = (offset_addr >> 8) & 0xFF;
+        buf[i++] = offset_addr & 0xFF;
+        break;
+    case WIDTH_1Byte:
+        buf[i++] = offset_addr & 0xFF;
+        break;
+    default:
+        DFD_DEBUG_ERROR("Only support 1,2,4 Byte Address Width,but set %u addr_bitwidth \n", addr_bitwidth);
+        rv = -1;
+        goto fail;
+    }
+
+    msgs[0].addr = dev_addr;
+    msgs[0].flags = 0;
+    msgs[0].len = addr_bitwidth;
+    msgs[0].buf = buf;
+    msgs[1].addr = dev_addr;
+    msgs[1].flags |= I2C_M_RD;
+    msgs[1].len = rd_len;
+    msgs[1].buf = recv_buf;
+    ioctl_data.nmsgs = 2;
+    ioctl_data.msgs = msgs;
+
+    rv = ioctl(fd, I2C_RDWR, &ioctl_data);
+    if(rv < 0) {
+        DFD_DEBUG_ERROR("%s %d Error: Sending messages failed:(ret:%d, errno:%s)!\n", __func__ , __LINE__, rv, strerror(errno));
+        goto fail;
+    }
+
+fail:
+    close(fd);
+    return rv;
+}
+
+int32_t dfd_i2c_gen_read(char *i2c_path, uint32_t dev_addr, uint32_t addr_bitwidth,
+                uint32_t offset_addr, uint8_t *recv_buf, int32_t rd_len)
+{
+    int i;
+    int rv;
+
+    for (i = 0; i < DFD_I2C_RETRY_TIME; i++) {
+        rv = dfd_i2c_gen_read_one_time(i2c_path, dev_addr, addr_bitwidth, offset_addr, recv_buf, rd_len);
+        if (rv < 0) {
+            DFD_DEBUG_ERROR("(read times:%d) i2c_path:%s, dev_addr:0x%x, addr_bitwidth:%u, offset_addr:0x%x, rd_len:%u\n",
+                i, i2c_path, dev_addr, addr_bitwidth, offset_addr, rd_len);
+            usleep(DFD_I2C_RETRY_SLEEP_TIME);
+            continue;
+        }
+        break;
+    }
+
+    return rv;
+}
+
+int dfd_utest_i2c_gen_rd(int argc, char* argv[])
+{
+    int ret;
+    uint32_t i2c_bus, dev_addr, addr_bitwidth, offset_addr, data_bitwidth, rd_len, i, j;
+    char *stopstring;
+    char i2c_path[32];
+    uint8_t tmp_value[DFD_UTEST_MAX_RDWR_NUM];
+    uint8_t rd_value[DFD_UTEST_MAX_RDWR_NUM];
+
+    if (argc != 8) {
+        DFD_DEBUG_ERROR("params error\n");
+        dfd_utest_printf_single_help(DFD_UTEST_ITEM_I2C_GEN_RD);
+        goto exit;
+    }
+
+    i2c_bus =  strtol(argv[2], &stopstring, 10);
+    dev_addr = strtol(argv[3], &stopstring, 16);
+    addr_bitwidth = strtol(argv[4], &stopstring, 10);
+    offset_addr = strtol(argv[5], &stopstring, 16);
+    data_bitwidth = strtol(argv[6], &stopstring, 10);
+    rd_len = strtol(argv[7], &stopstring, 10);
+
+    if (rd_len > DFD_UTEST_MAX_RDWR_NUM) {
+        DFD_DEBUG_ERROR("Input num %d exceed max.\n", rd_len);
+        dfd_utest_printf_single_help(DFD_UTEST_ITEM_I2C_GEN_RD);
+        goto exit;
+    }
+
+    dfd_utest_print_cmd(argc, argv);
+    printf(":\n");
+    snprintf(i2c_path, sizeof(i2c_path), "/dev/i2c-%d", i2c_bus);
+    mem_clear(tmp_value, sizeof(tmp_value));
+    ret = dfd_i2c_gen_read(i2c_path, dev_addr, addr_bitwidth, offset_addr, tmp_value, rd_len);
+    if (ret < 0) {
+        printf("read failed. ret:%d\n", ret);
+        goto exit;
+    }
+
+    mem_clear(rd_value, sizeof(rd_value));
+    if (data_bitwidth == WIDTH_1Byte) {
+        memcpy(rd_value, tmp_value, rd_len);
+    } else {
+        for (i = 0; i < rd_len; i += data_bitwidth) {
+            for (j = 0; (j < data_bitwidth) && (i + j < rd_len); j++) {
+                rd_value[i + data_bitwidth - j - 1] = tmp_value[i + j];
+            }
+        }
+    }
+
+    dfd_utest_printf_reg(rd_value, rd_len, offset_addr);
+
+exit:
+    return DFD_RV_MODE_NOTSUPPORT;
+}
+
+int32_t dfd_i2c_gen_write_one_time(char *i2c_path, uint32_t dev_addr, uint32_t addr_bitwidth,
+                uint32_t offset_addr, uint8_t *wr_value, uint32_t wr_len)
+{
+    int32_t fd, rv, i;
+    struct i2c_rdwr_ioctl_data ioctl_data;
+    struct i2c_msg msgs[1];
+    uint8_t buf[DFD_UTEST_MAX_BIT_WIDTH + DFD_UTEST_MAX_RDWR_NUM];
+
+    fd = open(i2c_path, O_RDWR | O_SYNC);
+    if (fd < 0) {
+        DFD_DEBUG_ERROR("i2c open fail fd %d\n", fd);
+        return -1;
+    }
+    mem_clear(&ioctl_data, sizeof(ioctl_data));
+    mem_clear(msgs, sizeof(msgs));
+    mem_clear(buf, sizeof(buf));
+
+    i = 0;
+
+    switch (addr_bitwidth) {
+    case WIDTH_4Byte:
+        buf[i++] = (offset_addr >> 24) & 0xFF;
+        buf[i++] = (offset_addr >> 16) & 0xFF;
+        buf[i++] = (offset_addr >> 8) & 0xFF;
+        buf[i++] = offset_addr & 0xFF;
+        break;
+    case WIDTH_2Byte:
+        buf[i++] = (offset_addr >> 8) & 0xFF;
+        buf[i++] = offset_addr & 0xFF;
+        break;
+    case WIDTH_1Byte:
+        buf[i++] = offset_addr & 0xFF;
+        break;
+    default:
+        DFD_DEBUG_ERROR("Only support 1,2,4 Byte Address Width,but set %u addr_bitwidth \r\n", addr_bitwidth);
+        rv = -1;
+        goto fail;
+    }
+
+    memcpy(buf + addr_bitwidth, wr_value, wr_len);
+
+    msgs[0].addr= dev_addr;
+    msgs[0].flags = 0;
+    msgs[0].len= addr_bitwidth + wr_len;
+    msgs[0].buf= buf;
+
+    ioctl_data.nmsgs= 1;
+    ioctl_data.msgs= msgs;
+
+    rv = ioctl(fd, I2C_RDWR, &ioctl_data);
+    if(rv < 0) {
+        DFD_DEBUG_ERROR("%s %dError: Sending messages failed:(ret:%d, errno:%s)!\n", __func__ , __LINE__, rv, strerror(errno));
+        goto fail;
+    } else if (rv < ioctl_data.nmsgs) {
+        DFD_DEBUG_ERROR("%s %dWarning: only %d/%d messages were sent\n", __func__ , __LINE__, rv, ioctl_data.nmsgs);
+    }
+
+fail:
+    close(fd);
+    return rv;
+}
+
+int32_t dfd_i2c_gen_write(char *i2c_path, uint32_t dev_addr, uint32_t addr_bitwidth,
+                uint32_t offset_addr, uint8_t *wr_value, uint32_t wr_len)
+{
+    int i;
+    int rv;
+
+    for (i = 0; i < DFD_I2C_RETRY_TIME; i++) {
+        rv = dfd_i2c_gen_write_one_time(i2c_path, dev_addr, addr_bitwidth, offset_addr, wr_value, wr_len);
+        if (rv < 0) {
+            DFD_DEBUG_ERROR("(write times:%d)i2c_path:%s, dev_addr:0x%x, addr_bitwidth:%u, offset_addr:0x%x, wr_len:%u\n",
+                i, i2c_path, dev_addr, addr_bitwidth, offset_addr, wr_len);
+            usleep(DFD_I2C_RETRY_SLEEP_TIME);
+            continue;
+        }
+        break;
+    }
+
+    return rv;
+}
+
+int dfd_utest_i2c_gen_wr(int argc, char* argv[])
+{
+    int ret;
+    uint32_t i2c_bus, dev_addr, addr_bitwidth, offset_addr, data_bitwidth, wr_len, tmp_data, para_len, i, j;
+    char *stopstring;
+    char i2c_path[32];
+    uint8_t wr_value[DFD_UTEST_MAX_RDWR_NUM];
+
+    if (argc < 8) {
+        DFD_DEBUG_ERROR("Input invalid.\n");
+        dfd_utest_printf_single_help(DFD_UTEST_ITEM_I2C_GEN_WR);
+        goto exit;
+    }
+
+    i2c_bus = strtol(argv[2], &stopstring, 10);
+    dev_addr = strtol(argv[3], &stopstring, 16);
+    addr_bitwidth = strtol(argv[4], &stopstring, 10);
+    offset_addr = strtol(argv[5], &stopstring, 16);
+    data_bitwidth = strtol(argv[6], &stopstring, 10);
+
+    para_len = argc - 7;
+    wr_len = para_len * data_bitwidth;
+
+    if (wr_len > DFD_UTEST_MAX_RDWR_NUM) {
+        DFD_DEBUG_ERROR("Input num %d exceed max.\n", wr_len);
+        dfd_utest_printf_single_help(DFD_UTEST_ITEM_I2C_GEN_WR);
+        goto exit;
+    }
+
+    if (data_bitwidth == WIDTH_1Byte) {
+        for (i = 0; i < para_len; i++) {
+            wr_value[i] = strtol(argv[7 + i], &stopstring, 16);
+            DFD_DEBUG_DBG(" index :%d value 0x%x\n", i , wr_value[i]);
+        }
+    } else {
+        for (i = 0; i < para_len; i++) {
+            tmp_data = strtol(argv[7 + i], &stopstring, 16);
+            DFD_DEBUG_DBG(" index :%d value 0x%x\n", i , tmp_data);
+            for (j = 0; j < data_bitwidth; j++) {
+                tmp_data = strtol(argv[7 + i], &stopstring, 16);
+                wr_value[j + i * data_bitwidth] = (tmp_data >> (24 - 8 * j)) & 0xFF;
+            }
+        }
+    }
+
+    dfd_utest_print_cmd(argc, argv);
+
+    printf(":\n");
+    snprintf(i2c_path, sizeof(i2c_path), "/dev/i2c-%d", i2c_bus);
+
+    ret = dfd_i2c_gen_write(i2c_path, dev_addr, addr_bitwidth, offset_addr, wr_value, wr_len);
+    if (ret < 0) {
+        printf("write failed. ret:%d\n", ret);
+    } else {
+        printf("write success\n");
+    }
+exit:
+    return DFD_RV_MODE_NOTSUPPORT;
+}
+
+int dfd_utest_i2c_rd(int argc, char* argv[])
+{
+    int ret;
+    uint8_t value[DFD_UTEST_MAX_RDWR_NUM];
+    uint16_t dev_addr, offset_addr;
+    char *stopstring;
+    int num, i2c_bus;
+    char i2c_path[32];
+
+    if (argc != 6) {
+        DFD_DEBUG_ERROR("params error\n");
+        dfd_utest_printf_single_help(DFD_UTEST_ITEM_I2C_RD);
+        goto exit;
+    }
+
+    i2c_bus =  strtol(argv[2], &stopstring, 10);
+    dev_addr = strtol(argv[3], &stopstring, 16);
+    offset_addr = strtol(argv[4], &stopstring, 16);
+    num = strtol(argv[5], &stopstring, 10);
+
+    if (num > DFD_UTEST_MAX_RDWR_NUM) {
+        DFD_DEBUG_ERROR("Input num %d exceed max.\n", num);
+        dfd_utest_printf_single_help(DFD_UTEST_ITEM_I2C_RD);
+        goto exit;
+    }
+
+    dfd_utest_print_cmd(argc, argv);
+    printf(":\n");
+    snprintf(i2c_path, sizeof(i2c_path), "/dev/i2c-%d", i2c_bus);
+    mem_clear(value, sizeof(value));
+    ret = dfd_read_port_i2c(i2c_path, dev_addr, offset_addr, value, num);
+    if (ret < 0) {
+        printf("failed ret %d\n", ret);
+        goto exit;
+    }
+
+    dfd_utest_printf_reg(value, num, offset_addr);
+
+exit:
+    return DFD_RV_MODE_NOTSUPPORT;
+
+}
+
+int dfd_utest_i2c_wr(int argc, char* argv[])
+{
+    int ret;
+    uint16_t dev_addr, offset_addr;
+    char *stopstring;
+    int i2c_bus;
+    char i2c_path[32];
+    uint8_t wr_len,i;
+    uint8_t wr_value[DFD_UTEST_MAX_RDWR_NUM];
+
+    if (argc < 6) {
+        DFD_DEBUG_ERROR("Input invalid.\n");
+        dfd_utest_printf_single_help(DFD_UTEST_ITEM_I2C_WR);
+        goto exit;
+    }
+
+    wr_len = argc - 5;
+    i2c_bus = strtol(argv[2], &stopstring, 10);
+    dev_addr = strtol(argv[3], &stopstring, 16);
+    offset_addr = strtol(argv[4], &stopstring, 16);
+
+    for (i = 0; i < wr_len; i++) {
+        wr_value[i] = strtol(argv[5+i], &stopstring, 16);
+        DFD_DEBUG_DBG(" index :%d value %x\n", i , wr_value[i]);
+    }
+
+    dfd_utest_print_cmd(argc, argv);
+
+    printf(":\n");
+    snprintf(i2c_path, sizeof(i2c_path), "/dev/i2c-%d", i2c_bus);
+
+    ret = dfd_write_port_i2c(i2c_path, dev_addr, offset_addr, wr_value, wr_len);
+    if (ret < 0) {
+        printf("failed ret %d\n", ret);
+    } else {
+        printf("success\n");
+    }
+exit:
+    return DFD_RV_MODE_NOTSUPPORT;
+}
+
+int dfd_utest_io_rd(int argc, char* argv[])
+{
+    int ret;
+    uint8_t value[DFD_UTEST_MAX_RDWR_NUM];
+    uint16_t offset_addr;
+    char *stopstring;
+    int num;
+
+    if (argc != 4) {
+        DFD_DEBUG_ERROR("params error\n");
+        dfd_utest_printf_single_help(DFD_UTEST_ITEM_IO_RD);
+        goto exit;
+    }
+
+    offset_addr = strtol(argv[2], &stopstring, 16);
+    num = strtol(argv[3], &stopstring, 10);
+
+    if (num > DFD_UTEST_MAX_RDWR_NUM) {
+        DFD_DEBUG_ERROR("Input num %d exceed max.\n", num);
+        dfd_utest_printf_single_help(DFD_UTEST_ITEM_IO_RD);
+        goto exit;
+    }
+
+    dfd_utest_print_cmd(argc, argv);
+    printf(":\n");
+    mem_clear(value, sizeof(value));
+    ret = dfd_read_io_port(offset_addr, value, num);
+    if (ret < 0) {
+        printf("failed ret %d\n", ret);
+        goto exit;
+    }
+
+    dfd_utest_printf_reg(value, num, offset_addr);
+
+exit:
+    return DFD_RV_MODE_NOTSUPPORT;
+}
+
+int dfd_utest_io_wr(int argc, char* argv[])
+{
+    int ret;
+    uint16_t offset_addr;
+    char *stopstring;
+    int32_t wr_len,i;
+    uint8_t wr_value[DFD_UTEST_MAX_RDWR_NUM];
+
+    if (argc < 4) {
+        DFD_DEBUG_ERROR("Input invalid.\n");
+        dfd_utest_printf_single_help(DFD_UTEST_ITEM_IO_WR);
+        goto exit;
+    }
+
+    wr_len = argc - 3;
+    if (wr_len > DFD_UTEST_MAX_RDWR_NUM) {
+        DFD_DEBUG_ERROR("Input num %d exceed max.\n", wr_len);
+        dfd_utest_printf_single_help(DFD_UTEST_ITEM_IO_WR);
+        goto exit;
+    }
+
+    offset_addr = strtol(argv[2], &stopstring, 16);
+
+    for (i = 0; i < wr_len; i++) {
+        wr_value[i] = strtol(argv[3 + i], &stopstring, 16);
+        DFD_DEBUG_DBG(" index :%d value %x\n", i , wr_value[i]);
+    }
+
+    dfd_utest_print_cmd(argc, argv);
+
+    printf(":\n");
+    ret = dfd_write_io_port(offset_addr, wr_value, wr_len);
+    if (ret < 0) {
+        printf("failed ret %d\n", ret);
+    } else {
+        printf("success\n");
+    }
+exit:
+    return DFD_RV_MODE_NOTSUPPORT;
+}
+
+int dfd_utest_phymem_rd(int argc, char* argv[])
+{
+    int ret, width;
+    uint8_t value[DFD_UTEST_MAX_RDWR_NUM];
+    off_t offset_addr;
+    char *stopstring;
+    int num;
+
+    if (argc != 5) {
+        DFD_DEBUG_ERROR("params error\n");
+        dfd_utest_printf_single_help(DFD_UTEST_ITEM_PHYMEM_RD);
+        goto exit;
+    }
+
+    width = strtol(argv[2], &stopstring, 10);
+    offset_addr = strtol(argv[3], &stopstring, 16);
+    num = strtol(argv[4], &stopstring, 10);
+
+    if (num > DFD_UTEST_MAX_RDWR_NUM) {
+        DFD_DEBUG_ERROR("Input num %d exceed max.\n", num);
+        dfd_utest_printf_single_help(DFD_UTEST_ITEM_PHYMEM_RD);
+        goto exit;
+    }
+
+    dfd_utest_print_cmd(argc, argv);
+    printf(":\n");
+    mem_clear(value, sizeof(value));
+    ret = dfd_process_mem(DEV_MEM_NAME, 0, width, offset_addr, value, num);
+    if (ret < 0) {
+        printf("failed ret %d\n", ret);
+        goto exit;
+    }
+
+    dfd_utest_printf_reg(value, num, offset_addr);
+
+exit:
+    return DFD_RV_MODE_NOTSUPPORT;
+}
+
+int dfd_utest_phymem_wr(int argc, char* argv[])
+{
+    int ret, width;
+    off_t offset_addr;
+    char *stopstring;
+    int32_t wr_len,i;
+    uint8_t wr_value[DFD_UTEST_MAX_RDWR_NUM];
+
+    if (argc < 5) {
+        DFD_DEBUG_ERROR("Input invalid.\n");
+        dfd_utest_printf_single_help(DFD_UTEST_ITEM_PHYMEM_WR);
+        goto exit;
+    }
+
+    wr_len = argc - 4;
+    if (wr_len > DFD_UTEST_MAX_RDWR_NUM) {
+        DFD_DEBUG_ERROR("Input num %d exceed max.\n", wr_len);
+        dfd_utest_printf_single_help(DFD_UTEST_ITEM_PHYMEM_WR);
+        goto exit;
+    }
+
+    width = strtol(argv[2], &stopstring, 10);
+    offset_addr = strtol(argv[3], &stopstring, 16);
+
+    for (i = 0; i < wr_len; i++) {
+        wr_value[i] = strtol(argv[4 + i], &stopstring, 16);
+        DFD_DEBUG_DBG(" index :%d value %x\n", i , wr_value[i]);
+    }
+
+    dfd_utest_print_cmd(argc, argv);
+
+    printf(":\n");
+    ret = dfd_process_mem(DEV_MEM_NAME, 1, width, offset_addr, wr_value, wr_len);
+    if (ret < 0) {
+        printf("failed ret %d\n", ret);
+    } else {
+        printf("success\n");
+    }
+exit:
+    return DFD_RV_MODE_NOTSUPPORT;
+}
+
+int dfd_utest_kmem_rd(int argc, char* argv[])
+{
+    int ret, width;
+    uint8_t value[DFD_UTEST_MAX_RDWR_NUM];
+    uint16_t offset_addr;
+    char *stopstring;
+    int num;
+
+    if (argc != 5) {
+        DFD_DEBUG_ERROR("params error\n");
+        dfd_utest_printf_single_help(DFD_UTEST_ITEM_KMEM_RD);
+        goto exit;
+    }
+
+    width = strtol(argv[2], &stopstring, 10);
+    offset_addr = strtol(argv[3], &stopstring, 16);
+    num = strtol(argv[4], &stopstring, 10);
+
+    if (num > DFD_UTEST_MAX_RDWR_NUM) {
+        DFD_DEBUG_ERROR("Input num %d exceed max.\n", num);
+        dfd_utest_printf_single_help(DFD_UTEST_ITEM_KMEM_RD);
+        goto exit;
+    }
+
+    dfd_utest_print_cmd(argc, argv);
+    printf(":\n");
+    mem_clear(value, sizeof(value));
+    ret = dfd_process_mem(DEV_KMEM_NAME, 0, width, offset_addr, value, num);
+    if (ret < 0) {
+        printf("failed ret %d\n", ret);
+        goto exit;
+    }
+
+    dfd_utest_printf_reg(value, num, offset_addr);
+
+exit:
+    return DFD_RV_MODE_NOTSUPPORT;
+}
+
+int dfd_utest_kmem_wr(int argc, char* argv[])
+{
+    int ret;
+    uint16_t offset_addr, width;
+    char *stopstring;
+    int32_t wr_len,i;
+    uint8_t wr_value[DFD_UTEST_MAX_RDWR_NUM];
+
+    if (argc < 5) {
+        DFD_DEBUG_ERROR("Input invalid.\n");
+        dfd_utest_printf_single_help(DFD_UTEST_ITEM_KMEM_WR);
+        goto exit;
+    }
+
+    wr_len = argc - 4;
+    if (wr_len > DFD_UTEST_MAX_RDWR_NUM) {
+        DFD_DEBUG_ERROR("Input num %d exceed max.\n", wr_len);
+        dfd_utest_printf_single_help(DFD_UTEST_ITEM_KMEM_WR);
+        goto exit;
+    }
+
+    width = strtol(argv[2], &stopstring, 10);
+    offset_addr = strtol(argv[3], &stopstring, 16);
+
+    for (i = 0; i < wr_len; i++) {
+        wr_value[i] = strtol(argv[4 + i], &stopstring, 16);
+        DFD_DEBUG_DBG(" index :%d value %x\n", i , wr_value[i]);
+    }
+
+    dfd_utest_print_cmd(argc, argv);
+
+    printf(":\n");
+    ret = dfd_process_mem(DEV_KMEM_NAME, 1, width, offset_addr, wr_value, wr_len);
+    if (ret < 0) {
+        printf("failed ret %d\n", ret);
+    } else {
+        printf("success\n");
+    }
+exit:
+    return DFD_RV_MODE_NOTSUPPORT;
+}
+
+static unsigned long dfd_utest_get_file_size(const char *path)
+{
+    unsigned long filesize;
+    struct stat statbuff;
+
+    if (stat(path, &statbuff) < 0) {
+        filesize = -1;
+    } else {
+        filesize = statbuff.st_size;
+    }
+
+    return filesize;
+}
+
+int dfd_utest_i2c_file_wr(int argc, char* argv[])
+{
+    int ret;
+    uint16_t dev_addr, offset_addr;
+    char *stopstring;
+    int i2c_bus;
+    char i2c_path[32];
+    char *file_name;
+    unsigned long filesize;
+    int fd;
+    uint8_t wr_buf[DFD_UTEST_MAX_RDWR_NUM];
+    int len;
+    int bpt;    /* byte per times*/
+    int page_left;
+
+    if (argc != 7) {
+        printf("Input invalid.\n");
+        dfd_utest_printf_single_help(DFD_UTEST_ITEM_I2C_FILE_WR);
+        goto exit;
+    }
+
+    i2c_bus = strtol(argv[2], &stopstring, 10);
+    dev_addr = strtol(argv[3], &stopstring, 16);
+    offset_addr = strtol(argv[4], &stopstring, 16);
+    bpt = strtol(argv[5], &stopstring, 10);
+    file_name = argv[6];
+
+    if ((bpt <= 0) || (bpt > DFD_UTEST_MAX_RDWR_NUM)) {
+        bpt = DFD_UTEST_MAX_RDWR_NUM;
+    }
+
+    if ((bpt & (bpt - 1)) != 0) {
+        printf("Bytes per times %d isn't power of two.\n",bpt);
+        goto exit;
+    }
+
+    filesize = dfd_utest_get_file_size(file_name);
+    if (filesize <= 0) {
+        printf("Input invalid file %s, filesize %lu.\n", file_name, filesize);
+        goto exit;
+    }
+
+    fd = open(file_name, O_RDONLY);
+    if (fd < 0) {
+        printf("open file[%s] fail.\n", file_name);
+        goto exit;
+    }
+
+    dfd_utest_print_cmd(argc, argv);
+
+    printf(":\n");
+    snprintf(i2c_path, sizeof(i2c_path), "/dev/i2c-%d", i2c_bus);
+
+    while (filesize > 0) {
+        mem_clear(wr_buf, DFD_UTEST_MAX_RDWR_NUM);
+        len = bpt;
+        if (offset_addr & (bpt - 1)) {
+            page_left = bpt - (offset_addr & (bpt - 1));
+            len  = len  > page_left ? page_left : len;
+        }
+
+        len = read(fd, wr_buf, len);
+
+        ret = dfd_write_port_i2c(i2c_path, dev_addr, offset_addr, wr_buf, len);
+        if (ret < 0) {
+            break;
+        }
+        offset_addr += len;
+        filesize -= len;
+    }
+
+    close(fd);
+
+    if (ret < 0) {
+        printf("failed ret %d\n", ret);
+    } else {
+        printf("success\n");
+    }
+
+exit:
+    return DFD_RV_MODE_NOTSUPPORT;
+
+}
+
+/* compare with sys_flie_wr, One more step is read back verification */
+int dfd_utest_sysfs_file_upg(int argc, char* argv[])
+{
+    int ret = 0;
+    uint32_t offset_addr;
+    char *file_name;
+    char *sysfs_loc;
+    char *stopstring;
+    unsigned long filesize;
+    int fd, file_fd;
+    uint8_t wr_buf[DFD_UTEST_MAX_RDWR_NUM];
+    int len, write_len, per_wr_len;
+    int i;
+    uint8_t reread_buf[DFD_UTEST_MAX_RDWR_NUM];
+    int reback_len, reread_len;
+    int j = 0;
+
+    if (argc != 5 && argc != 6) {
+        printf("Input invalid.\n");
+        dfd_utest_printf_single_help(DFD_UTEST_ITEM_SYSFS_FILE_UPG);
+        goto exit;
+    }
+
+    sysfs_loc = argv[2];
+    offset_addr = strtol(argv[3], &stopstring, 16);
+    file_name = argv[4];
+
+    if (argc == 6) {
+        per_wr_len = strtol(argv[5], &stopstring, 10);
+        if (per_wr_len > DFD_UTEST_MAX_RDWR_NUM || per_wr_len <= 0) {
+            printf("per_wr_byte %d invalid, not in range (0, 256]\n", per_wr_len);
+            goto exit;
+        }
+    } else {
+        per_wr_len = DFD_UTEST_DEFAULT_WR_NUM;
+    }
+    DFD_DEBUG_DBG("per_wr_byte: %d\n", per_wr_len);
+    filesize = dfd_utest_get_file_size(file_name);
+    if (filesize <= 0) {
+        printf("Input invalid file %s, filesize %lu.\n", file_name, filesize);
+        goto exit;
+    }
+
+    fd = open(sysfs_loc, O_RDWR | O_SYNC);
+    if (fd < 0) {
+        printf("open file[%s] fail.\n", sysfs_loc);
+        goto exit;
+    }
+
+    file_fd = open(file_name, O_RDONLY);
+    if (file_fd < 0) {
+        printf("open file[%s] fail.\n", file_name);
+        goto open_dev_err;
+    }
+
+    dfd_utest_print_cmd(argc, argv);
+
+    ret = lseek(fd, offset_addr, SEEK_SET);
+    if (ret < 0) {
+        printf("lseek file[%s offset=%d] fail,\n", sysfs_loc, offset_addr);
+        goto fail;
+    }
+
+    printf(":\n");
+    while (filesize > 0) {
+        if (filesize > (unsigned long)per_wr_len) {
+            len = per_wr_len;
+        } else {
+            len = filesize;
+        }
+
+        mem_clear(wr_buf, DFD_UTEST_MAX_RDWR_NUM);
+        for (i = 0; i < DFD_I2C_RETRY_TIME; i++) {
+            len = read(file_fd, wr_buf, len);
+            if (len < 0) {
+                DFD_DEBUG_ERROR("read file[%s] fail, offset = 0x%x retrytimes = %d ret = %d\n",
+                    sysfs_loc, offset_addr, i ,len);
+                usleep(DFD_I2C_RETRY_SLEEP_TIME);
+                continue;
+            }
+            break;
+        }
+        if (i == DFD_I2C_RETRY_TIME) {
+            printf("read file[%s] fail, offset = 0x%x, ret = %d\n", sysfs_loc, offset_addr, len);
+            goto fail;
+        }
+
+        for (i = 0; i < DFD_I2C_RETRY_TIME; i++) {
+            write_len = write(fd, wr_buf, len);
+            if (write_len != len) {
+                DFD_DEBUG_ERROR("write file[%s] fail,offset = 0x%x retrytimes = %d len = %d,write_len =%d\n",
+                    sysfs_loc, offset_addr, i ,len, write_len);
+                usleep(DFD_I2C_RETRY_SLEEP_TIME);
+                continue;
+            }
+            break;
+        }
+        if (i == DFD_I2C_RETRY_TIME) {
+            printf("write file[%s] fail, offset = 0x%x, len = %d,write_len =%d\n",
+                sysfs_loc, offset_addr, len, write_len);
+            goto fail;
+        }
+
+        reback_len = write_len;
+        ret = lseek(fd, -reback_len, SEEK_CUR);
+        if (ret < 0) {
+            printf("reread lseek file[%s offset=%d] fail,lseek len=%d\n",
+                sysfs_loc, offset_addr, reback_len);
+            goto fail;
+        }
+
+        mem_clear(reread_buf, DFD_UTEST_MAX_RDWR_NUM);
+        for (i = 0; i < DFD_I2C_RETRY_TIME; i++) {
+            reread_len = read(fd, reread_buf, reback_len);
+            if (reread_len != reback_len) {
+                DFD_DEBUG_ERROR("reread file[%s] fail,offset = 0x%x retrytimes = %d reread_len = %d,reback_len =%d\n",
+                    sysfs_loc, offset_addr, i ,reread_len, reback_len);
+                usleep(DFD_I2C_RETRY_SLEEP_TIME);
+                continue;
+            }
+            break;
+        }
+        if (i == DFD_I2C_RETRY_TIME) {
+            printf("reread file[%s] fail, offset = 0x%x, reread_len = %d,reback_len = %d\n",
+                sysfs_loc, offset_addr, reread_len, reback_len);
+            goto fail;
+        }
+
+        if (memcmp(reread_buf, wr_buf, reread_len) != 0) {
+            if (j < DFD_I2C_RETRY_TIME) {
+                DFD_DEBUG_ERROR("memcmp file[%s] fail,offset = 0x%x retrytimes = %d\n",
+                                    sysfs_loc, offset_addr, j);
+                j++;
+                ret = lseek(file_fd, -len, SEEK_CUR);
+                if (ret < 0) {
+                    printf("retry file_fd lseek fail,lseek len=%d\n", len);
+                    goto fail;
+                }
+                ret = lseek(fd, -write_len, SEEK_CUR);
+                if (ret < 0) {
+                    printf("retry fd lseek fail,lseek len=%d\n", write_len);
+                    goto fail;
+                }
+                continue;
+            }
+
+            printf("upgrade file[%s] fail, offset = 0x%x.\n", sysfs_loc, offset_addr);
+            printf("want to write buf :\n");
+            for (i = 0; i < reread_len; i++) {
+                printf("0x%x ", wr_buf[i]);
+            }
+            printf("\n");
+
+            printf("actually reread buf :\n");
+            for (i = 0; i < reread_len; i++) {
+                printf("0x%x ", reread_buf[i]);
+            }
+            printf("\n");
+
+            goto fail;
+        }
+
+        offset_addr += len;
+        filesize -= len;
+        usleep(5000);
+    }
+
+    printf("success\n");
+    close(file_fd);
+    close(fd);
+    return DFD_RV_OK;
+
+fail:
+    close(file_fd);
+open_dev_err:
+    close(fd);
+exit:
+    return DFD_RV_MODE_NOTSUPPORT;
+}
+
+int dfd_utest_sysfs_file_wr(int argc, char* argv[])
+{
+    int ret = 0;
+    uint32_t offset_addr;
+    char *file_name;
+    char *sysfs_loc;
+    char *stopstring;
+    unsigned long filesize;
+    int fd, file_fd;
+    uint8_t wr_buf[DFD_UTEST_MAX_RDWR_NUM];
+    int len, write_len, per_wr_len;
+    int i;
+
+    if (argc != 5 && argc != 6) {
+        printf("Input invalid.\n");
+        dfd_utest_printf_single_help(DFD_UTEST_ITEM_SYSFS_FILE_WR);
+        goto exit;
+    }
+
+    sysfs_loc = argv[2];
+    offset_addr = strtol(argv[3], &stopstring, 16);
+    file_name = argv[4];
+
+    if (argc == 6) {
+        per_wr_len = strtol(argv[5], &stopstring, 10);
+        if (per_wr_len > DFD_UTEST_MAX_RDWR_NUM || per_wr_len <= 0) {
+            printf("per_wr_byte %d invalid, not in range (0, 256]\n", per_wr_len);
+            goto exit;
+        }
+    } else {
+        per_wr_len = DFD_UTEST_DEFAULT_WR_NUM;
+    }
+    DFD_DEBUG_DBG("per_wr_byte: %d\n", per_wr_len);
+    filesize = dfd_utest_get_file_size(file_name);
+    if (filesize <= 0) {
+        printf("Input invalid file %s, filesize %lu.\n", file_name, filesize);
+        goto exit;
+    }
+
+    fd = open(sysfs_loc, O_RDWR | O_SYNC);
+    if (fd < 0) {
+        printf("open file[%s] fail.\n", sysfs_loc);
+        goto exit;
+    }
+
+    file_fd = open(file_name, O_RDONLY);
+    if (file_fd < 0) {
+        printf("open file[%s] fail.\n", file_name);
+        goto open_dev_err;
+    }
+
+    dfd_utest_print_cmd(argc, argv);
+
+    ret = lseek(fd, offset_addr, SEEK_SET);
+    if (ret < 0) {
+        printf("lseek file[%s offset=%d] fail,\n", sysfs_loc, offset_addr);
+        goto fail;
+    }
+
+    printf(":\n");
+    while (filesize > 0) {
+        if (filesize > (unsigned long)per_wr_len) {
+            len = per_wr_len;
+        } else {
+            len = filesize;
+        }
+
+        mem_clear(wr_buf, DFD_UTEST_MAX_RDWR_NUM);
+        for (i = 0; i < DFD_I2C_RETRY_TIME; i++) {
+            len = read(file_fd, wr_buf, len);
+            if (len < 0) {
+                DFD_DEBUG_ERROR("read file[%s] fail, offset = 0x%x retrytimes = %d ret = %d\n",
+                    sysfs_loc, offset_addr, i ,len);
+                usleep(DFD_I2C_RETRY_SLEEP_TIME);
+                continue;
+            }
+            break;
+        }
+        if (i == DFD_I2C_RETRY_TIME) {
+            printf("read file[%s] fail, offset = 0x%x, ret = %d\n", sysfs_loc, offset_addr, len);
+            goto fail;
+        }
+        for (i = 0; i < DFD_I2C_RETRY_TIME; i++) {
+            write_len = write(fd, wr_buf, len);
+            if (write_len != len) {
+                DFD_DEBUG_ERROR("write file[%s] fail,offset = 0x%x retrytimes = %d len = %d,write_len =%d\n", sysfs_loc, offset_addr, i ,len, write_len);
+                usleep(DFD_I2C_RETRY_SLEEP_TIME);
+                continue;
+            }
+            break;
+        }
+
+        if(i == DFD_I2C_RETRY_TIME) {
+            printf("write file[%s] fail, offset = 0x%x, len = %d,write_len =%d\n", sysfs_loc, offset_addr, len, write_len);
+            ret = -1;
+            goto fail;
+        }
+        offset_addr += len;
+        filesize -= len;
+        usleep(5000);
+    }
+
+    printf("success\n");
+    close(file_fd);
+    close(fd);
+    return DFD_RV_OK;
+
+fail:
+    close(file_fd);
+open_dev_err:
+    close(fd);
+exit:
+    return DFD_RV_MODE_NOTSUPPORT;
+}
+
+int dfd_utest_sysfs_file_rd(int argc, char* argv[])
+{
+    int ret = 0;
+    uint32_t offset_addr;
+    char *sysfs_loc;
+    char *stopstring;
+    int fd;
+    uint8_t rd_buf[DFD_UTEST_MAX_RDWR_NUM];
+    int len, read_len;;
+
+    if (argc != 5) {
+        printf("Input invalid.\n");
+        dfd_utest_printf_single_help(DFD_UTEST_ITEM_SYSFS_FILE_RD);
+        goto exit;
+    }
+
+    sysfs_loc = argv[2];
+    offset_addr = strtol(argv[3], &stopstring, 16);
+    len = strtol(argv[4], &stopstring, 10);
+
+    if (len > DFD_UTEST_MAX_RDWR_NUM) {
+        printf("Input num %d exceed max 256.\n", len);
+        goto exit;
+    }
+
+    fd = open(sysfs_loc, O_RDONLY);
+    if (fd < 0) {
+        printf("open file[%s] fail.\n", sysfs_loc);
+        goto exit;
+    }
+    dfd_utest_print_cmd(argc, argv);
+
+    printf(":\n");
+
+    ret = lseek(fd, offset_addr, SEEK_SET);
+    if (ret < 0) {
+        printf("lseek failed ret %d.\n", ret);
+        goto fail;
+    }
+
+    mem_clear(rd_buf, DFD_UTEST_MAX_RDWR_NUM);
+    read_len = read(fd, rd_buf, len);
+    if (read_len != len) {
+        printf("read failed read_len %d len %d.\n", read_len, len);
+        goto fail;
+    }
+    dfd_utest_printf_reg(rd_buf, read_len, offset_addr);
+    close(fd);
+    return DFD_RV_OK;
+
+fail:
+    close(fd);
+exit:
+    return DFD_RV_MODE_NOTSUPPORT;
+}
+
+int dfd_utest_msr_rd(int argc, char* argv[])
+{
+    int fd;
+    char msr_file_name[64];
+    uint64_t data;
+    uint64_t read_result;
+    char *stopstring;
+    uint8_t cpu_index, width;
+    uint64_t offset;
+
+    if (argc != 5) {
+        printf("rdmsr failed: Input invalid.\n");
+        dfd_utest_printf_single_help(DFD_UTEST_ITEM_MSR_RD);
+        goto exit;
+    }
+
+    cpu_index = strtol(argv[2], &stopstring, 10);
+    offset = strtol(argv[3], &stopstring, 16);
+    width = strtol(argv[4], &stopstring, 10);
+
+    if (width != 8 && width != 16 && width != 32 && width != 64) {
+        printf("rdmsr failed: width:%u Input invalid.only support 8 16 32 64\n", width);
+        goto exit;
+    }
+
+    mem_clear(msr_file_name, sizeof(msr_file_name));
+    sprintf(msr_file_name, "/dev/cpu/%u/msr", cpu_index);
+
+    fd = open(msr_file_name, O_RDONLY);
+    if (fd < 0) {
+        if (errno == ENXIO) {
+            fprintf(stderr, "rdmsr failed: No CPU %u\n", cpu_index);
+        } else if (errno == EIO) {
+            fprintf(stderr, "rdmsr failed: CPU %u doesn't support MSRs\n", cpu_index);
+        } else if (errno == ENOENT) {
+            fprintf(stderr, "rdmsr failed: can't find %s file, Please check if modprobe msr driver already\n", msr_file_name);
+        } else {
+            printf("rdmsr failed: %s open failed. errno:%d\n", msr_file_name, errno);
+        }
+        goto exit;
+    }
+
+    if (pread(fd, &data, sizeof(data), offset) != sizeof(data)) {
+        fprintf(stderr, "rdmsr failed: CPU:%u offset:0x%lx read failed\n", cpu_index, offset);
+        goto fail;
+    }
+
+    switch (width) {
+        case 8:
+            read_result = (volatile uint8_t)data;
+            break;
+        case 16:
+            read_result = (volatile uint16_t)data;
+            break;
+        case 32:
+            read_result = (volatile uint32_t)data;
+            break;
+        case 64:
+            read_result = (volatile uint64_t)data;
+            break;
+        default:
+            printf("rdmsr failed: width:%u illegal width.\n", width);
+            goto fail;
+    }
+
+    printf("0x%lx\n", read_result);
+    close(fd);
+    return DFD_RV_OK;
+
+fail:
+    close(fd);
+exit:
+    return DFD_RV_MODE_NOTSUPPORT;
+}
+
+int dfd_utest_sysfs_data_wr(int argc, char* argv[])
+{
+    uint32_t offset;
+    char *sysfs_loc;
+    char *stopstring;
+    uint8_t wr_buf[DFD_UTEST_MAX_RDWR_NUM];
+    int ret, i;
+    int fd, len, write_len, index;
+
+    if (argc < 5) {
+        DFD_DEBUG_ERROR("Input invalid.\n");
+        dfd_utest_printf_single_help(DFD_UTEST_ITEM_SYSFS_DATA_WR);
+        goto exit;
+    }
+
+    dfd_utest_print_cmd(argc, argv);
+    printf(":\n");
+
+    sysfs_loc = argv[2];
+    offset = strtol(argv[3], &stopstring, 16);
+    len = argc - 4;
+    mem_clear(wr_buf, sizeof(wr_buf));
+    for (i = 0; i < len; i++) {
+        wr_buf[i] = strtol(argv[4 + i], &stopstring, 16);
+        DFD_DEBUG_DBG("index :%d value %x\n", i , wr_buf[i]);
+    }
+
+    fd = open(sysfs_loc, O_RDWR | O_SYNC);
+    if (fd < 0) {
+        printf("open file[%s] fail.\n", sysfs_loc);
+        goto exit;
+    }
+
+    ret = lseek(fd, offset, SEEK_SET);
+    if (ret < 0) {
+        printf("lseek file[%s offset=%d] fail,\n", sysfs_loc, offset);
+        goto fail;
+    }
+    index = 0;
+    while (len > 0) {
+        for (i = 0; i < DFD_I2C_RETRY_TIME; i++) {
+            write_len = write(fd, &wr_buf[index], len);
+            if (write_len < 0) {
+                DFD_DEBUG_ERROR("write file[%s] fail, retrytimes: %d, offset: 0x%x, len: %d, write_len: %d\n",
+                    sysfs_loc, offset, i, len, write_len);
+                usleep(DFD_I2C_RETRY_SLEEP_TIME);
+                continue;
+            }
+            if (write_len == 0) {
+                DFD_DEBUG_ERROR("write file[%s] EOF, offset: 0x%x, len: %d, write_len: %d\n",
+                    sysfs_loc, offset, len, write_len);
+                goto fail;
+            }
+            break;
+        }
+        if(i == DFD_I2C_RETRY_TIME) {
+            printf("write file[%s] fail, offset: 0x%x, len: %d, write_len: %d\n",
+                sysfs_loc, offset, len, write_len);
+            goto fail;
+        }
+        offset += write_len;
+        index += write_len;
+        len -= write_len;
+        usleep(5000);
+    }
+    printf("success\n");
+    close(fd);
+    return DFD_RV_OK;
+fail:
+    close(fd);
+exit:
+    return DFD_RV_MODE_NOTSUPPORT;
+}
+
+static void phy_help(char *name)
+{
+    fprintf(stderr,
+            "Usage: %s  phy_index(dec) regnum(hex) [regval(hex)]                    \n"
+            "  phy_index     phydev index                                           \n"
+            "  regnum        phydev register address                                \n"
+            "  regval        phydev register value                                  \n",
+            name);
+    return;
+}
+
+static void mdio_help(char *name)
+{
+    fprintf(stderr,
+            "Usage: %s  mdio_index(dec) phyaddr(hex) regnum(hex) [regval(hex)]      \n"
+            "  mdio_index    mdiodev index                                          \n"
+            "  phyaddr       phydev address                                         \n"
+            "  regnum        phydev register address                                \n"
+            "  regval        phydev register value                                  \n",
+            name);
+    return;
+}
+
+static int phydev_arg_parse(int argc, char* argv[], int *phy_index, uint32_t *regnum, uint32_t *regval,
+               int num_arg)
+{
+
+    unsigned long index, regaddr, value;
+    char *end;
+
+    if (argc != num_arg) {
+        return -EINVAL;
+    }
+
+    index = strtoul(argv[2], &end, 0);
+    if (*end) {
+        fprintf(stderr, "Error: index invalid!\n");
+        return -EINVAL;
+    }
+
+    regaddr = strtoul(argv[3], &end, 0);
+    if (*end || regaddr > 0xffff) {
+        fprintf(stderr, "Error: regaddr invalid!\n");
+        return -EINVAL;
+    }
+
+    if (argc > 4) {
+        value = strtoul(argv[4], &end, 0);
+        if (*end || value > 0xffff) {
+            fprintf(stderr, "Error: reg data invalid!\n");
+            return -EINVAL;
+        }
+
+        *regval = (uint32_t)value;
+    }
+
+    *phy_index     =  (uint32_t)index;
+    *regnum        =  (uint32_t)regaddr;
+
+    return 0;
+}
+
+static int mdiodev_arg_parse(int argc, char* argv[], int *mdio_index, int *phyaddr, uint32_t *regnum,
+               uint32_t *regval, int num_arg)
+{
+
+    unsigned long index, addr, regaddr, value;
+    char *end;
+
+    if (argc != num_arg) {
+        return -EINVAL;
+    }
+
+    index = strtoul(argv[2], &end, 0);
+    if (*end) {
+        fprintf(stderr, "Error: index invalid!\n");
+        return -EINVAL;
+    }
+
+    addr = strtoul(argv[3], &end, 0);
+    if (*end || addr > 0x1f) {
+        fprintf(stderr, "Error: phyaddr invalid!\n");
+        return -EINVAL;
+    }
+
+    regaddr = strtoul(argv[4], &end, 0);
+    if (*end || regaddr > 0xffff) {
+        fprintf(stderr, "Error: regaddr invalid!\n");
+        return -EINVAL;
+    }
+
+    if (argc > 5) {
+        value = strtoul(argv[5], &end, 0);
+        if (*end || value > 0xffff) {
+            fprintf(stderr, "Error: reg data invalid!\n");
+            return -EINVAL;
+        }
+
+        *regval = (uint32_t)value;
+    }
+
+    *mdio_index    =  (uint32_t)index;
+    *phyaddr       =  (int)addr;
+    *regnum        =  (uint32_t)regaddr;
+
+    return 0;
+}
+
+int dfd_utest_phydev_list(int argc, char* argv[])
+{
+    int fd;
+
+    if (argc != 2) {
+        printf("Input invalid.\n");
+        dfd_utest_printf_single_help(DFD_UTEST_ITEM_PHYDEV_LIST);
+        return DFD_RV_MODE_NOTSUPPORT;
+    }
+
+    argv = argv;
+    fd = open("/dev/dram_test", O_RDWR, S_IRWXU | S_IRWXG | S_IRWXO);
+    if (fd < 0) {
+        fprintf(stderr, "Error: Could not open file "
+                "/dev/dram: %s\n", strerror(errno));
+        return -1;
+    }
+
+    (void)ioctl(fd, CMD_PHY_LIST, NULL);
+
+    close(fd);
+
+    return 0;
+}
+
+int dfd_utest_phydev_rd(int argc, char* argv[])
+{
+    struct phydev_user_info phy_info;
+    int fd;
+    long int ret;
+
+    ret = phydev_arg_parse(argc, argv, &phy_info.phy_index, &phy_info.regnum, &phy_info.regval, 4);
+    if (ret < 0) {
+        phy_help("phydev_rd");
+        return -1;
+    }
+
+    fd = open("/dev/dram_test", O_RDWR, S_IRWXU | S_IRWXG | S_IRWXO);
+    if (fd < 0) {
+        fprintf(stderr, "Error: Could not open file "
+                "/dev/dram: %s\n", strerror(errno));
+        return -1;
+    }
+
+    ret = ioctl(fd, CMD_PHY_READ, &phy_info);
+    if (ret < 0) {
+        fprintf(stderr, "Error: phy read error : %s\n", strerror(errno));
+        close(fd);
+        return  -1;
+    }
+
+    close(fd);
+
+    printf("Read success --- phydev%d regnum: 0x%x, value: 0x%x\n",phy_info.phy_index,
+        phy_info.regnum, phy_info.regval);
+
+    return 0;
+}
+
+int dfd_utest_phydev_wr(int argc, char* argv[])
+{
+    struct phydev_user_info  phy_info;
+    int fd;
+    long int ret;
+
+    ret = phydev_arg_parse(argc, argv, &phy_info.phy_index, &phy_info.regnum, &phy_info.regval, 5);
+    if (ret < 0) {
+        phy_help("phydev_wr");
+        return -1;
+    }
+
+    fd = open("/dev/dram_test", O_RDWR, S_IRWXU | S_IRWXG | S_IRWXO);
+    if (fd < 0) {
+        fprintf(stderr, "Error: Could not open file "
+                "/dev/dram: %s\n", strerror(errno));
+        return -1;
+    }
+
+    ret = ioctl(fd, CMD_PHY_WRITE, &phy_info);
+    if (ret < 0) {
+        fprintf(stderr, "Error: phy write error : %s\n", strerror(errno));
+        close(fd);
+        return  -1;
+    }
+
+    close(fd);
+
+    printf("write success --- phydev%d regnum: 0x%x, value: 0x%x\n",phy_info.phy_index,
+        phy_info.regnum, phy_info.regval);
+
+    return 0;
+}
+
+int dfd_utest_mdiodev_list(int argc, char* argv[])
+{
+    int fd;
+
+    if (argc != 2) {
+        printf("Input invalid.\n");
+        dfd_utest_printf_single_help(DFD_UTEST_ITEM_MDIODEV_LIST);
+        return DFD_RV_MODE_NOTSUPPORT;
+    }
+
+    argv = argv;
+    fd = open("/dev/dram_test", O_RDWR, S_IRWXU | S_IRWXG | S_IRWXO);
+    if (fd < 0) {
+        fprintf(stderr, "Error: Could not open file "
+                "/dev/dram: %s\n", strerror(errno));
+        return -1;
+    }
+
+    (void)ioctl(fd, CMD_MDIO_LIST, NULL);
+
+    close(fd);
+
+    return 0;
+}
+
+int dfd_utest_mdiodev_rd(int argc, char* argv[])
+{
+    struct mdio_dev_user_info mdio_info;
+    int fd;
+    long int ret;
+
+    ret = mdiodev_arg_parse(argc, argv, &mdio_info.mdio_index, &mdio_info.phyaddr,
+              &mdio_info.regnum, &mdio_info.regval, 5);
+    if (ret < 0) {
+        mdio_help("mdiodev_rd");
+        return -1;
+    }
+
+    fd = open("/dev/dram_test", O_RDWR, S_IRWXU | S_IRWXG | S_IRWXO);
+    if (fd < 0) {
+        fprintf(stderr, "Error: Could not open file "
+                "/dev/dram: %s\n", strerror(errno));
+        return -1;
+    }
+
+    ret = ioctl(fd, CMD_MDIO_READ, &mdio_info);
+    if (ret < 0) {
+        fprintf(stderr, "Error: mdio read error : %s\n", strerror(errno));
+        close(fd);
+        return  -1;
+    }
+
+    close(fd);
+
+    printf("Read success\n mdio_index  phyaddr     regnum      value\n");
+    printf("  %-10d  %#-10x  %#-10x  %#-10x\n", mdio_info.mdio_index, mdio_info.phyaddr,
+        mdio_info.regnum, mdio_info.regval);
+
+    return 0;
+}
+
+int dfd_utest_mdiodev_wr(int argc, char* argv[])
+{
+    struct mdio_dev_user_info mdio_info;
+    int fd;
+    long int ret;
+
+    ret = mdiodev_arg_parse(argc, argv, &mdio_info.mdio_index, &mdio_info.phyaddr,
+              &mdio_info.regnum, &mdio_info.regval, 6);
+    if (ret < 0) {
+        mdio_help("mdiodev_wr");
+        return -1;
+    }
+
+    fd = open("/dev/dram_test", O_RDWR, S_IRWXU | S_IRWXG | S_IRWXO);
+    if (fd < 0) {
+        fprintf(stderr, "Error: Could not open file "
+                "/dev/dram: %s\n", strerror(errno));
+        return -1;
+    }
+
+    ret = ioctl(fd, CMD_MDIO_WRITE, &mdio_info);
+    if (ret < 0) {
+        fprintf(stderr, "Error: mdio write error : %s\n", strerror(errno));
+        close(fd);
+        return  -1;
+    }
+
+    close(fd);
+
+    printf("write success\n mdio_index  phyaddr     regnum      value\n");
+    printf("  %-10d  %#-10x  %#-10x  %#-10x\n", mdio_info.mdio_index, mdio_info.phyaddr,
+        mdio_info.regnum, mdio_info.regval);
+
+    return 0;
+}
+
+dfd_utest_proc_fun dfd_utest_get_proc_func(char *type_str)
+{
+    int i, tbl_size;
+
+    tbl_size = sizeof(g_dfd_unit_test) / sizeof(g_dfd_unit_test[0]);
+
+    for (i = 0; i < tbl_size; i++) {
+        if (!strncmp(g_dfd_unit_test[i].type_str, type_str, strlen(g_dfd_unit_test[i].type_str))) {
+            return g_dfd_unit_test[i].utest_func;
+        }
+    }
+    DFD_DEBUG_DBG("type: %s not match.\n", type_str);
+    return NULL;
+}
+
+void dfd_utest_cmd_main(int argc, char* argv[])
+{
+    dfd_utest_proc_fun pfunc;
+    int ret;
+
+    if (argc < 2) {
+        dfd_utest_print_all_help();
+        return;
+    }
+
+    pfunc = dfd_utest_get_proc_func(argv[1]);
+    if (pfunc == NULL) {
+        DFD_DEBUG_DBG("utest type %s in not support.\n", argv[1]);
+        dfd_utest_print_all_help();
+        return;
+    }
+    ret = pfunc(argc, argv);
+    if ((ret != DFD_RV_MODE_NOTSUPPORT) && (ret != DFD_RV_INDEX_INVALID)) {
+        if (ret == DFD_RV_OK) {
+            DFD_DEBUG_DBG(" [SUCCESS]\n");
+        } else {
+            DFD_DEBUG_DBG(" [FAIL(%d)]\n", ret);
+        }
+    }
+
+    return;
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/dev_util/dfd_utest.h b/platform/broadcom/sonic-platform-modules-micas/common/app/dev_util/dfd_utest.h
new file mode 100644
index 000000000..1ae65148e
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/app/dev_util/dfd_utest.h
@@ -0,0 +1,109 @@
+/* monitor_utest.h */
+#ifndef __DFD_UTEST_H__
+#define __DFD_UTEST_H__
+
+#include <string.h>
+
+extern int g_dfd_debug_sw;
+extern int g_dfd_debugpp_sw;
+
+#define DFD_UTEST_TRUE_FALSE_STRING(flag)                   ((flag == true) ? "true" : "false")
+
+#define DFD_DEBUG_DBG(fmt, args...) do {                     \
+    if (g_dfd_debug_sw) {               \
+        printf("" fmt,\
+            ##args);  \
+    }                                                   \
+} while (0)
+
+#define DFD_DEBUG_ERROR(fmt, args...) do {                     \
+    if (g_dfd_debugpp_sw) {               \
+        printf("" fmt,\
+            ##args);  \
+    }                                                   \
+} while (0)
+
+#define mem_clear(data, size) memset((data), 0, (size))
+
+typedef enum dfd_rv_s {
+    DFD_RV_OK               = 0,
+    DFD_RV_INIT_ERR         = 1,
+    DFD_RV_SLOT_INVALID     = 2,
+    DFD_RV_MODE_INVALID     = 3,
+    DFD_RV_MODE_NOTSUPPORT  = 4,
+    DFD_RV_TYPE_ERR         = 5,
+    DFD_RV_DEV_NOTSUPPORT   = 6,
+    DFD_RV_DEV_FAIL         = 7,
+    DFD_RV_INDEX_INVALID    = 8,
+    DFD_RV_NO_INTF          = 9,
+    DFD_RV_NO_NODE          = 10,
+    DFD_RV_NODE_FAIL        = 11,
+} dfd_rv_t;
+
+#define DFD_DEBUG_BUF_LEN               (32)
+#define DFD_DEBUGP_DEBUG_FILE           "/sbin/.dfd_debugp_flag"
+#define DFD_DEBUGPP_DEBUG_FILE          "/sbin/.dfd_debugpp_flag"
+
+#define DFD_UTEST_MAX_PARA_NUM          (4)
+#define DFD_UTEST_TYPE_STRING_LEN       (64)
+#define DFD_UTEST_MATCH_STRING_LEN      (64)
+#define DFD_UTEST_HELP_STRING_LEN       (256)
+#define DFD_UTEST_INVALID_PARA          (-1)
+#define DFD_UTEST_BUFF_LEN              (64)
+
+typedef enum dfd_fpga_cpld_flag_e {
+    DFD_CPLD_RW_FLAG = 0x00,
+    DFD_FPGA_RW_FLAG = 0x01,
+} dfd_fpga_cpld_flag_t;
+
+typedef int (* dfd_utest_proc_fun)(int argc, char* argv[]);
+
+#define DFD_UTEST_ITEM_ALL \
+    DFD_UTEST_ITEM(DFD_UTEST_ITEM_I2C_RD, i2c_rd, "i2c_rd [i2c_bus] [slave_addr] [offset] [len]", "i2c_rd [i2c_bus] [slave_addr] [offset] [len]")    \
+    DFD_UTEST_ITEM(DFD_UTEST_ITEM_I2C_WR, i2c_wr, "i2c_wr [i2c_bus] [slave_addr] [offset] [data0] ... [dataN]", "i2c_wr [i2c_bus] [slave_addr] [offset] [data0] ... [dataN]")   \
+    DFD_UTEST_ITEM(DFD_UTEST_ITEM_IO_RD, io_rd, "io_rd [offset] [len]", "io_rd [offset] [len]")   \
+    DFD_UTEST_ITEM(DFD_UTEST_ITEM_IO_WR, io_wr, "io_wr [offset] [data0]... [dataN]", "io_wr [offset] [data0]... [dataN]")   \
+    DFD_UTEST_ITEM(DFD_UTEST_ITEM_PHYMEM_RD, phymem_rd, "phymem_rd [bit_width] [offset] [len]", "phymem_rd [bit_width] [offset] [len]")   \
+    DFD_UTEST_ITEM(DFD_UTEST_ITEM_PHYMEM_WR, phymem_wr, "phymem_wr [bit_width] [offset] [data0]... [dataN]", "phymem_wr [bit_width] [offset] [data0]... [dataN]")   \
+    DFD_UTEST_ITEM(DFD_UTEST_ITEM_KMEM_RD, kmem_rd, "kmem_rd [bit_width] [offset] [len]", "kmem_rd [bit_width] [offset] [len]")   \
+    DFD_UTEST_ITEM(DFD_UTEST_ITEM_KMEM_WR, kmem_wr, "kmem_wr [bit_width][offset] [data0]... [dataN]", "kmem_wr [bit_width] [offset] [data0]... [dataN]")   \
+    DFD_UTEST_ITEM(DFD_UTEST_ITEM_I2C_FILE_WR, i2c_file_wr, "i2c_file_wr [i2c_bus] [slave_addr] [offset] [bpt] [filename]", "i2c_file_wr [i2c_bus] [slave_addr] [offset] [bpt] [filename]\nbpt:bytes per times")   \
+    DFD_UTEST_ITEM(DFD_UTEST_ITEM_SYSFS_FILE_WR, sysfs_file_wr, "sysfs_file_wr [sysfs_loc] [offset] [filename] [per_wr_byte]", "sysfs_file_wr [sysfs_loc] [offset]  [filename] [per_wr_byte]")   \
+    DFD_UTEST_ITEM(DFD_UTEST_ITEM_SYSFS_FILE_RD, sysfs_file_rd, "sysfs_file_rd [sysfs_loc] [offset]  [len]", "sysfs_file_rd [sysfs_loc] [offset]  [len]")   \
+    DFD_UTEST_ITEM(DFD_UTEST_ITEM_SYSFS_FILE_UPG, sysfs_file_upg, "sysfs_file_upg [sysfs_loc] [offset] [filename] [per_wr_byte]", "sysfs_file_upg [sysfs_loc] [offset]  [filename] [per_wr_byte]")   \
+    DFD_UTEST_ITEM(DFD_UTEST_ITEM_I2C_GEN_RD, i2c_gen_rd, "i2c_gen_rd [i2c_bus] [slave_addr] [addr_bitwidth] [offset] [data_bitwidth] [len]", "i2c_gen_rd [i2c_bus] [slave_addr] [addr_bitwidth] [offset] [data_bitwidth] [len]")    \
+    DFD_UTEST_ITEM(DFD_UTEST_ITEM_I2C_GEN_WR, i2c_gen_wr, "i2c_gen_wr [i2c_bus] [slave_addr] [addr_bitwidth] [offset] [data_bitwidth] [data0]... [dataN]", "i2c_gen_wr [i2c_bus] [slave_addr] [addr_bitwidth] [offset] [data_bitwidth] [data0]... [dataN]")    \
+    DFD_UTEST_ITEM(DFD_UTEST_ITEM_MSR_RD, msr_rd, "msr_rd [cpu_index] [offset] [width]", "msr_rd [cpu_index] [offset] [width]")    \
+    DFD_UTEST_ITEM(DFD_UTEST_ITEM_SYSFS_DATA_WR, sysfs_data_wr, "sysfs_data_wr [sysfs_loc] [offset] [data0] ... [dataN]", "sysfs_data_wr [sysfs_loc] [offset] [data0] ... [dataN]]")   \
+    DFD_UTEST_ITEM(DFD_UTEST_ITEM_PHYDEV_LIST, phydev_list, "phydev_list", "phydev_list")   \
+    DFD_UTEST_ITEM(DFD_UTEST_ITEM_PHYDEV_RD, phydev_rd, "phydev_rd phy_index reg_addr", "phydev_rd phy_index reg_addr")   \
+    DFD_UTEST_ITEM(DFD_UTEST_ITEM_PHYDEV_WR, phydev_wr, "phydev_wr phy_index reg_addr reg_data", "phydev_wr phy_index reg_addr reg_data")   \
+    DFD_UTEST_ITEM(DFD_UTEST_ITEM_MDIODEV_LIST, mdiodev_list, "mdiodev_list", "mdiodev_list")   \
+    DFD_UTEST_ITEM(DFD_UTEST_ITEM_MDIODEV_RD, mdiodev_rd, "mdiodev_rd mdio_index phyaddr reg_addr", "mdiodev_rd mdio_index phyaddr reg_addr")   \
+    DFD_UTEST_ITEM(DFD_UTEST_ITEM_MDIODEV_WR, mdiodev_wr, "mdiodev_wr mdio_index phyaddr reg_addr reg_data", "mdiodev_wr mdio_index phyaddr reg_addr reg_data")   \
+
+#ifdef DFD_UTEST_ITEM
+#undef DFD_UTEST_ITEM
+#endif
+#define DFD_UTEST_ITEM(_id, _type_str, _help_info, _help_info_detail)    _id,
+typedef enum dfd_utest_item_id_s {
+    DFD_UTEST_ITEM_ALL
+} dfd_utest_item_id_t;
+
+typedef struct {
+    int utest_type;
+    char type_str[DFD_UTEST_TYPE_STRING_LEN];
+    dfd_utest_proc_fun utest_func;
+    char help_info[DFD_UTEST_HELP_STRING_LEN];
+    char help_info_detail[DFD_UTEST_HELP_STRING_LEN];
+} dfd_utest_t;
+
+void dfd_utest_cmd_main(int argc, char* argv[]);
+
+#ifdef DFD_UTEST_ITEM
+#undef DFD_UTEST_ITEM
+#endif
+#define DFD_UTEST_ITEM(_id, _type_str, _help_info, _help_info_detail)    int dfd_utest_##_type_str(int argc, char* argv[]);
+DFD_UTEST_ITEM_ALL
+
+#endif
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/fw_upgrade/Makefile b/platform/broadcom/sonic-platform-modules-micas/common/app/fw_upgrade/Makefile
new file mode 100644
index 000000000..1701b5f62
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/app/fw_upgrade/Makefile
@@ -0,0 +1,18 @@
+top_srcdir:=$(shell pwd)
+include $(top_srcdir)/Rules.mk
+
+firmware-y:=
+firmware-y += fw_upgrade
+
+.PHONY: all
+all: build
+
+.PHONY: build
+build: $(firmware-y)
+$(foreach dir,$(firmware-y),$(eval $(call compile_dirs,$(dir))))
+
+.PHONY: rpmpkg
+rpmpkg:
+ifeq ("$(CONFIG_CPLD_UPGRADE_ISPVME)", "y")
+	#$(RPMPKG) $(install_cpld_dir) firmware-cpld-ispvme.spec git
+endif
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/fw_upgrade/Rules.mk b/platform/broadcom/sonic-platform-modules-micas/common/app/fw_upgrade/Rules.mk
new file mode 100644
index 000000000..5fb5a09d3
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/app/fw_upgrade/Rules.mk
@@ -0,0 +1,42 @@
+CC ?= $(CROSS)gcc
+AR ?= $(CROSS)ar
+AS ?= $(CROSS)as
+LD ?= $(CROSS)ld
+STRIP ?= $(CROSS)strip
+
+install_root:=${top_srcdir}/images
+
+install_header_dir:=${install_root}/header
+install_adir:=$(install_root)/lib
+install_symbol_dir:=$(install_root)/symbol
+symbol_files:=$(shell find $(EXPORT_SYMBOL) -name 'Module.symvers')
+#
+# symbol_files += $(shell find $(install_symbol_dir) -name 'Module.symvers')
+# KBUILD_EXTRA_SYMBOLS += $(symbol_files)
+# export KBUILD_EXTRA_SYMBOLS
+
+# top root: install_rootfs_dir
+install_rootfs_dir:=$(install_root)/rootfs
+
+install_sodir:=$(install_rootfs_dir)/$(INSTALL_SODIR)
+
+install_usr_bin_dir:=$(install_rootfs_dir)/usr/bin
+install_sbin_dir:=$(install_rootfs_dir)/sbin
+install_etc_dir:=$(install_rootfs_dir)/etc
+
+export INSTALL_MOD_PATH:=$(ROOT)
+
+BUILD_CFLAGS:=$(CFLAGS) -I$(install_header_dir)
+BUILD_LDFLAGS:=$(LDFLAGS) -L/$(install_sodir) -L/$(install_adir)
+
+define compile_dirs
+.PHONY: $(1)
+$(1):
+	@echo;echo "building $(1)..."
+	@$(MAKE) -C ${1}
+endef
+
+compile.c = $(CC) $(BUILD_CFLAGS) -d -c -o $@ $<
+%.o: %.c
+	$(compile.c)
+
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/fw_upgrade/fw_upgrade/Makefile b/platform/broadcom/sonic-platform-modules-micas/common/app/fw_upgrade/fw_upgrade/Makefile
new file mode 100644
index 000000000..8b4bca739
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/app/fw_upgrade/fw_upgrade/Makefile
@@ -0,0 +1,39 @@
+include ../Rules.mk
+
+OBJ = fw_upgrade.o fw_upgrade_debug.o
+
+LIB += $(BUILD_CFALGS) $(BUILD_LDFLAGS) -lpthread
+ifdef ENABLE_GCOV
+ifeq ($(ENABLE_GCOV), y)
+LIB += -fprofile-arcs
+endif
+endif # ENABLE_GCOV
+
+APP = fw_upgrade
+BUILD_DIR = tmp
+ELF_FILE = $(BUILD_DIR)/$(APP)
+MAP_FILE = $(BUILD_DIR)/$(APP).map.sym
+INCLUDE = -Iinclude
+CFLAGS+=-Wall -W -g
+
+.PHONY: build
+build:make-dir $(addprefix $(BUILD_DIR)/,$(OBJ))
+	$(CC) -o $(ELF_FILE) $(addprefix $(BUILD_DIR)/,$(OBJ)) $(LINKFLAGS) $(LIB)
+
+	cp -p $(ELF_FILE) $(common_out_put_dir)
+
+.PHONY: make-dir
+make-dir:
+	@mkdir -p $(BUILD_DIR)
+
+$(BUILD_DIR)/%.o:%.c
+	$(CC) -c $(CFLAGS) $(INCLUDE) $< -o $@
+
+.PHONY: install
+install:
+	echo "fw_upgrade install success."
+	cp -p $(ELF_FILE) $(common_out_put_dir)
+
+.PHONY: clean
+clean:
+	rm -rf $(BUILD_DIR)
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/fw_upgrade/fw_upgrade/fw_upgrade.c b/platform/broadcom/sonic-platform-modules-micas/common/app/fw_upgrade/fw_upgrade/fw_upgrade.c
new file mode 100644
index 000000000..2045608d5
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/app/fw_upgrade/fw_upgrade/fw_upgrade.c
@@ -0,0 +1,1632 @@
+#include <sys/io.h>
+#include <unistd.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <sys/ioctl.h>
+#include <stdint.h>
+#include <time.h>
+#include <fcntl.h>
+#include <sys/mman.h>
+#include <string.h>
+#include <errno.h>
+#include "fw_upgrade.h"
+
+static flash_info_t flash_info[] = {
+    {
+        .flash_name = "M25L6433F",
+        .flash_size = M32,
+        .flash_type = SPI,
+        .page_size = BYTE_256,
+        .flash_id = MX25L6433F,
+        .block_size = STEP_64,
+        .full_erase = 1,
+        .erase_block_command = BLOCK_ERASE_64,
+        .page_program = COMMON_PAGE_PROGRAM,
+    },
+    {
+        .flash_name = "S25FL512S",
+        .flash_size = M64,
+        .flash_type = SPI,
+        .page_size = BYTE_256,
+        .flash_id = S25FL512S,
+        .block_size = STEP_256,
+        .full_erase = 0,
+        .erase_block_command = BLOCK_ERASE_64,
+        .page_program = COMMON_PAGE_PROGRAM,
+    },
+    {
+        .flash_name = "MX25l512",
+        .flash_size = M64,
+        .flash_type = SPI,
+        .page_size = BYTE_256,
+        .flash_id = MX25l512,
+        .block_size = STEP_64,
+        .full_erase = 1,
+        .erase_block_command = BLOCK_ERASE_64,
+        .page_program = COMMON_PAGE_PROGRAM,
+    },
+    {
+        .flash_name = "STM25P64",
+        .flash_size = M12,
+        .flash_type = SPI,
+        .page_size = BYTE_256,
+        .flash_id = STM25P64,
+        .block_size = STEP_256,
+        .full_erase = 1,
+        .erase_block_command = BLOCK_ERASE_64,
+        .page_program = COMMON_PAGE_PROGRAM,
+    },
+    {
+        .flash_name = "STM25P128",
+        .flash_size = M16,
+        .flash_type = SPI,
+        .page_size = BYTE_256,
+        .flash_id = STM25P128,
+        .block_size = STEP_256,
+        .full_erase = 1,
+        .erase_block_command = BLOCK_ERASE_64,
+        .page_program = COMMON_PAGE_PROGRAM,
+    },
+    {
+        .flash_name = "N25Q256",
+        .flash_size = M16,
+        .flash_type = SPI,
+        .page_size = BYTE_256,
+        .flash_id = N25Q256,
+        .block_size = STEP_256,
+        .full_erase = 1,
+        .erase_block_command = BLOCK_ERASE_64,
+        .page_program = COMMON_PAGE_PROGRAM,
+    },
+    {
+        .flash_name = "N25Q512",
+        .flash_size = M16,
+        .flash_type = SPI,
+        .page_size = BYTE_256,
+        .flash_id = N25Q512,
+        .block_size = STEP_256,
+        .full_erase = 1,
+        .erase_block_command = BLOCK_ERASE_64,
+        .page_program = COMMON_PAGE_PROGRAM,
+    },
+    {
+        .flash_name = "W25X16",
+        .flash_size = M3,
+        .flash_type = SPI,
+        .page_size = BYTE_256,
+        .flash_id = W25X16,
+        .block_size = STEP_256,
+        .full_erase = 1,
+        .erase_block_command = BLOCK_ERASE_64,
+        .page_program = COMMON_PAGE_PROGRAM,
+    },
+    {
+        .flash_name = "W25X64",
+        .flash_size = M12,
+        .flash_type = SPI,
+        .page_size = BYTE_256,
+        .flash_id = W25X64,
+        .block_size = STEP_256,
+        .full_erase = 1,
+        .erase_block_command = BLOCK_ERASE_64,
+        .page_program = COMMON_PAGE_PROGRAM,
+    },
+    {
+        .flash_name = "W25Q64BV",
+        .flash_size = M12,
+        .flash_type = SPI,
+        .page_size = BYTE_256,
+        .flash_id = W25Q64BV,
+        .block_size = STEP_256,
+        .full_erase = 1,
+        .erase_block_command = BLOCK_ERASE_64,
+        .page_program = COMMON_PAGE_PROGRAM,
+    },
+    {
+        .flash_name = "W25Q128BV",
+        .flash_size = M16,
+        .flash_type = SPI,
+        .page_size = BYTE_256,
+        .flash_id = W25Q128BV,
+        .block_size = STEP_256,
+        .full_erase = 1,
+        .erase_block_command = BLOCK_ERASE_64,
+        .page_program = COMMON_PAGE_PROGRAM,
+    },
+    {
+        .flash_name = "W25Q256FV",
+        .flash_size = M16,
+        .flash_type = SPI,
+        .page_size = BYTE_256,
+        .flash_id = W25Q256FV,
+        .block_size = STEP_256,
+        .full_erase = 1,
+        .erase_block_command = BLOCK_ERASE_64,
+        .page_program = COMMON_PAGE_PROGRAM,
+    },
+    {
+        .flash_name = "MX25L1605D",
+        .flash_size = M32,
+        .flash_type = SPI,
+        .page_size = BYTE_256,
+        .flash_id = MX25L1605D,
+        .block_size = STEP_256,
+        .full_erase = 1,
+        .erase_block_command = BLOCK_ERASE_64,
+        .page_program = COMMON_PAGE_PROGRAM,
+    },
+    {
+        .flash_name = "MX25L12805D",
+        .flash_size = M32,
+        .flash_type = SPI,
+        .page_size = BYTE_256,
+        .flash_id = MX25L12805D,
+        .block_size = STEP_256,
+        .full_erase = 1,
+        .erase_block_command = BLOCK_ERASE_64,
+        .page_program = COMMON_PAGE_PROGRAM,
+    },
+    {
+        .flash_name = "MX66L1G45G",
+        .flash_size = M128,
+        .flash_type = SPI,
+        .page_size = BYTE_256,
+        .flash_id = MX66L1G45G,
+        .block_size = STEP_256,
+        .full_erase = 1,
+        .erase_block_command = BLOCK_ERASE_64,
+        .page_program = COMMON_PAGE_PROGRAM,
+    },
+    {
+        .flash_name = "GD25Q256",
+        .flash_size = M16,
+        .flash_type = SPI,
+        .page_size = BYTE_256,
+        .flash_id = GD25Q256,
+        .block_size = STEP_256,
+        .full_erase = 1,
+        .erase_block_command = BLOCK_ERASE_64,
+        .page_program = COMMON_PAGE_PROGRAM,
+    },
+};
+
+static int debug_on;
+
+static void help(void)
+{
+    printf("------------------------------BMC Upgrade Tool--------------------------------\n");
+    printf("Program Flash:\n");
+    printf("\tfw_upgrade upgrade [file name] [chip select: 0 | 1 | 2] ");
+    printf("[erase type: full | block]\n");
+    printf("\t[file name] if file is not located at /home/admin, path should be added\n");
+    printf("\t[chip select] 0:master, 1:slave, 2:both\n");
+    printf("\t[erase type] choose a way to erase chip, full erase would be faster\n");
+    printf("Read BMC Reg:\n");
+    printf("\tfw_upgrade rd [address] [length]\n");
+    printf("\t[address(Hexadecimal)] register address of BMC\n");
+    printf("\t[length(decimal)] length of read data, should be times of 4\n");
+
+    return;
+}
+
+static int set_ioport_rw_access(void)
+{
+
+    if ( iopl(3) < 0) {
+        printf("Can't get access to /dev/port \n");
+        return -1;
+    }
+
+    return 0;
+}
+
+static int get_file_size(char *file_name)
+{
+    FILE * pFile;
+    int size;
+
+    pFile = fopen(file_name,"rb");
+    if (pFile == NULL) {
+        printf("Error opening file\n");
+        return -1;
+    }
+    fseek (pFile, 0, SEEK_END);
+    size = ftell(pFile);
+    fclose (pFile);
+    return size;
+}
+
+static uint8_t _read(uint16_t addr)
+{
+    return inb(addr);
+}
+
+static void _write(uint16_t addr, uint8_t val)
+{
+    outb(val, addr);
+
+    return;
+}
+
+static void write_addr_port(uint8_t addr_val, uint16_t addr_port)
+{
+    _write(addr_port, addr_val);
+
+    return;
+}
+
+static void write_data_port(uint8_t val, uint16_t data_port)
+{
+    _write(data_port, val);
+
+    return;
+}
+
+static uint8_t read_data_port(uint16_t data_port)
+{
+    return _read(data_port);
+}
+
+static void write_ilpc2ahb_addr(uint32_t addr)
+{
+    int i;
+
+    for (i = 0; i < 4; i++) {
+        write_addr_port(SUPERIO_REG0 + i, LPC_ADDR_PORT);
+        write_data_port((addr >> (8 * (3 - i))) & MASK, LPC_DATA_PORT);
+    }
+
+    return;
+}
+
+static void write_ilpc2ahb_data(uint32_t data)
+{
+    int i;
+
+    for (i = 0; i < 4; i++) {
+        write_addr_port(SUPERIO_REG4 + i, LPC_ADDR_PORT);
+        write_data_port((data >> (8 * (3 - i))) & MASK, LPC_DATA_PORT);
+    }
+
+    return;
+}
+
+static uint32_t read_ilpc2ahb_data(void)
+{
+    int i, tmp;
+    uint32_t res;
+
+    res = 0;
+    for (i = 0; i < 4; i++) {
+        write_addr_port(SUPERIO_REG4 + i, LPC_ADDR_PORT);
+        tmp = read_data_port(LPC_DATA_PORT);
+        res |= (tmp << (8 * (3 - i)));
+    }
+
+    return res;
+}
+
+static void trigger_ilpc2ahb_read(void)
+{
+    write_addr_port(SUPERIO_FE, LPC_ADDR_PORT);
+    read_data_port(LPC_DATA_PORT);
+
+    return;
+}
+
+static void trigger_ilpc2ahb_write(void)
+{
+    write_addr_port(SUPERIO_FE, LPC_ADDR_PORT);
+    write_data_port(TOGGLE_WRITE, LPC_DATA_PORT);
+
+    return;
+}
+
+static uint32_t read_bmc_reg(uint32_t addr)
+{
+    uint32_t res;
+
+    write_ilpc2ahb_addr(addr);
+    trigger_ilpc2ahb_read();
+    res = read_ilpc2ahb_data();
+
+    return res;
+}
+
+static void write_bmc_reg(uint32_t addr, uint32_t val)
+{
+    write_ilpc2ahb_addr(addr);
+    write_ilpc2ahb_data(val);
+    trigger_ilpc2ahb_write();
+
+    return;
+}
+
+static uint32_t read_bmc_flash_data(void)
+{
+    uint32_t res;
+
+    trigger_ilpc2ahb_read();
+    res = read_ilpc2ahb_data();
+
+    return res;
+}
+
+static void write_bmc_flash_data(uint32_t data)
+{
+    write_ilpc2ahb_data(data);
+    trigger_ilpc2ahb_write();
+
+    return;
+}
+
+static void write_bmc_flash_addr(uint32_t addr)
+{
+    int i;
+
+    for (i = 0; i < 4; i++) {
+        write_addr_port(SUPERIO_REG4 + i, LPC_ADDR_PORT);
+        write_data_port((addr >> (8 * i)) & MASK, LPC_DATA_PORT);
+    }
+
+    trigger_ilpc2ahb_write();
+
+    return;
+}
+
+static void enable_bytes(int byte)
+{
+    write_addr_port(SUPERIO_REG8, LPC_ADDR_PORT);
+    switch (byte) {
+    case BYTE1:
+        write_data_port(SUPERIO_A0 + BYTE1_VAL, LPC_DATA_PORT);
+        break;
+    case BYTE2:
+        write_data_port(SUPERIO_A0 + BYTE2_VAL, LPC_DATA_PORT);
+        break;
+    case BYTE4:
+        write_data_port(SUPERIO_A0 + BYTE4_VAL, LPC_DATA_PORT);
+        break;
+    default:
+        write_data_port(SUPERIO_A0 + BYTE_RESERVED, LPC_DATA_PORT);
+        break;
+    }
+
+    return;
+}
+
+static void pull_ce_down(flash_info_t* info)
+{
+    write_bmc_reg(info->ce_control_reg, USER_MODE_PULL_CE_DOWN);
+
+    return;
+}
+
+static void pull_ce_up(flash_info_t* info)
+{
+    write_bmc_reg(info->ce_control_reg, USER_MODE_PULL_CE_UP);
+
+    return;
+}
+
+static void send_cmd(uint32_t flash_base_addr, int cmd)
+{
+    write_ilpc2ahb_addr(flash_base_addr);
+    enable_bytes(1);
+    write_addr_port(SUPERIO_REG7, LPC_ADDR_PORT);
+    write_data_port(cmd & MASK, LPC_DATA_PORT);
+    trigger_ilpc2ahb_write();
+    enable_bytes(4);
+
+    return;
+}
+
+static void send_cmd_to_flash(flash_info_t* info, int cmd)
+{
+    pull_ce_down(info);
+    send_cmd(info->flash_base_addr, cmd);
+    pull_ce_up(info);
+
+    return;
+}
+
+static void check_data_length(void)
+{
+    uint8_t tmp;
+    /* Data length check, 4 bytes */
+    write_addr_port(SUPERIO_REG8, LPC_ADDR_PORT);
+    tmp = read_data_port(LPC_DATA_PORT);
+    if (tmp != SUPERIO_A2) {
+        write_data_port(SUPERIO_A2, LPC_DATA_PORT);
+    }
+
+    return;
+}
+
+static void enable_ilpc2ahb(void)
+{
+    /* Write 0xAA then write 0xA5 twice to enable super IO*/
+    write_addr_port(DISABLE_LPC, LPC_ADDR_PORT);
+    write_addr_port(ENABLE_LPC, LPC_ADDR_PORT);
+    write_addr_port(ENABLE_LPC, LPC_ADDR_PORT);
+
+    /* Enable iLPC2AHB */
+    write_addr_port(SUPERIO_07, LPC_ADDR_PORT);
+    write_data_port(LPC_TO_AHB, LPC_DATA_PORT);
+    write_addr_port(SUPERIO_30, LPC_ADDR_PORT);
+    write_data_port(ENABLE_LPC_TO_AHB, LPC_DATA_PORT);
+
+    /* Data length */
+    check_data_length();
+
+    return;
+}
+
+static void disable_ilpc2ahb(void)
+{
+    /* disable ilpc2ahb */
+    write_addr_port(SUPERIO_30, LPC_ADDR_PORT);
+    write_data_port(DISABLE_LPC_TO_AHB, LPC_DATA_PORT);
+    /* disable super IO */
+    write_addr_port(DISABLE_LPC, LPC_ADDR_PORT);
+
+    return;
+}
+
+/* Enable CPU */
+static void enable_cpu(void)
+{
+    /* unlock SCU register */
+    write_bmc_reg(SCU_ADDR, UNLOCK_SCU_KEY);
+    /* enable ARM */
+    write_bmc_reg(REBOOT_CPU_REGISTER, SET_BMC_CPU_BOOT);
+    /* lock SCU register */
+    write_bmc_reg(SCU_ADDR, LOCK_SCU_KEY);
+
+    return;
+}
+
+/* diasble CPU */
+static void disable_cpu(void)
+{
+    uint32_t scu_hw_strap_val;
+
+    /* unlock SCU register */
+    write_bmc_reg(SCU_ADDR, UNLOCK_SCU_KEY);
+    /* disable ARM */
+    scu_hw_strap_val = read_bmc_reg(HARDWARE_STRAP_REGISTER);
+    write_bmc_reg(HARDWARE_STRAP_REGISTER, scu_hw_strap_val |0x01);
+    /* lock SCU register */
+    write_bmc_reg(SCU_ADDR, LOCK_SCU_KEY);
+
+    return;
+}
+
+static void enable_upgrade(void)
+{
+
+    enable_ilpc2ahb();
+    /* diasble CPU */
+    disable_cpu();
+    /* init CE control register */
+    write_bmc_reg(CE0_CONTROL_REGISTER, 0);
+    write_bmc_reg(CE1_CONTROL_REGISTER, 0);
+    /* disable WDT2 */
+    write_bmc_reg(WATCHDOG2_CONTROL, DISABLE_WATCHDOG);
+
+    return;
+}
+
+static void disable_upgrade(void)
+{
+    enable_cpu();
+    dbg_print(debug_on, "DEBUG 0x%x\n", read_bmc_reg(HARDWARE_STRAP_REGISTER));
+    disable_ilpc2ahb();
+
+    return;
+}
+
+static void watchdog_status_debug(void)
+{
+    uint32_t watchdog_reg;
+
+    /* Watchdog Control Register */
+    watchdog_reg = read_bmc_reg(WATCHDOG2_CONTROL);
+    dbg_print(debug_on,"Watchdog Control Register: 0x%x\n", watchdog_reg);
+    dbg_print(debug_on,"Watchdog Enable Signal: 0x%x\n", watchdog_reg & BIT1);
+    dbg_print(debug_on,"Watchdog Reset SyS En: 0x%x\n", (watchdog_reg & BIT2) >> 1);
+    dbg_print(debug_on,"Watchdog Reset Mode: 0x%x\n", (watchdog_reg & (BIT6 | BIT7)) >> 5);
+    switch (watchdog_reg & (BIT6 | BIT7)) {
+    case SOC_SYS:
+        dbg_print(debug_on,"\tReset Mode En: SoC System\n");
+        break;
+    case FULL_CHIP:
+        dbg_print(debug_on,"\tReset Mode En: Full Chip\n");
+        break;
+    case ARM_CPU:
+        dbg_print(debug_on,"\tReset Mode En: ARM Cpu\n");
+        break;
+    default:
+        break;
+    }
+
+    /* Watchdog Timeout Status Register */
+    watchdog_reg = read_bmc_reg(WATCHDOG2_TSR);
+    dbg_print(debug_on,"Watchdog Timeout Occur: 0x%x\n", watchdog_reg & BIT1);
+    dbg_print(debug_on,"Watchdog Boot from: CD%d\n", watchdog_reg & BIT2);
+    dbg_print(debug_on,"Watchdog Interrupt Occur: 0x%x\n", watchdog_reg & BIT3);
+
+    return;
+}
+
+/* CE Type Setting Register */
+static void ce_type_setting_debug(void)
+{
+    uint32_t fmc_reg;
+
+    fmc_reg = read_bmc_reg(FMC_CE_TYPE_SETTING_REG);
+    if ((fmc_reg & CE0_SPI_TYPE) == SPI) {
+        dbg_print(debug_on,"CE0 Type Seeting: 0x%x, Type: SPI\n", fmc_reg & CE0_SPI_TYPE);
+    } else {
+        dbg_print(debug_on,"CE0 Type Seeting: 0x%x, Type: Unknown\n", fmc_reg & CE0_SPI_TYPE);
+    }
+    if (((fmc_reg & CE1_SPI_TYPE) >> BIT2) == SPI) {
+        dbg_print(debug_on,"CE1 Type Seeting: 0x%x, Type: SPI\n", (fmc_reg & CE1_SPI_TYPE) >> BIT2);
+    } else {
+        dbg_print(debug_on,"CE1 Type Seeting: 0x%x, Type: Unknown\n", (fmc_reg & CE1_SPI_TYPE) >> BIT2);
+    }
+
+    return;
+}
+/* CE Control Register */
+static void ce_control_debug(void)
+{
+    uint32_t fmc_reg;
+
+    fmc_reg = read_bmc_reg(CE_CONTROL_REGISTER);
+    dbg_print(debug_on,"CE0 Address Mode: 0x%x, Mode: %d Bytes\n",
+        fmc_reg & BIT1, (fmc_reg & BIT1) + 3);
+    dbg_print(debug_on,"CE1 Address Mode: 0x%x, Mode: %d Bytes\n",
+        (fmc_reg & BIT2) >> 1, ((fmc_reg & BIT2) >> 1)  + 3);
+
+    return;
+}
+
+/* Interrupt Control & Status Register */
+static void irq_control_status_debug(void)
+{
+    uint32_t fmc_reg;
+
+    fmc_reg = read_bmc_reg(INR_STATUS_CONTROL_REGISTER);
+    dbg_print(debug_on,"SPI Write Address Protected Interrupt EN: 0x%x\n", fmc_reg & BIT2);
+    dbg_print(debug_on,"SPI Command Abort Interrupt EN: 0x%x\n", fmc_reg & BIT3);
+    dbg_print(debug_on,"SPI Write Address Protected Status: 0x%x, Status: %s\n",
+        RIGHT_SHIFT_8(fmc_reg) & BIT2, (RIGHT_SHIFT_8(fmc_reg) & BIT2) == BIT2 ? "Occur" : "Normal");
+    dbg_print(debug_on,"SPI Command Abort Status: 0x%x, Status: %s\n",
+        RIGHT_SHIFT_8(fmc_reg) & BIT3, (RIGHT_SHIFT_8(fmc_reg) & BIT3) == BIT3 ? "Occur" : "Normal");
+    /*Clear Abnormal Status*/
+    if ((RIGHT_SHIFT_8(fmc_reg) & BIT3) || (RIGHT_SHIFT_8(fmc_reg) & BIT2)) {
+        write_bmc_reg(INR_STATUS_CONTROL_REGISTER, CLEAR_INR_STATUS_CONTROL);
+    }
+
+    return;
+}
+
+/* Command Control Register */
+static void command_control_debug(void)
+{
+    uint32_t fmc_reg;
+
+    fmc_reg = read_bmc_reg(COMMAND_CONTROL_REGISTER);
+    dbg_print(debug_on,"Data Byte Line 0: %s\n", ((fmc_reg & BIT4) != 0) ? "Disable" : "Enable");
+    dbg_print(debug_on,"Data Byte Line 1: %s\n", ((fmc_reg & BIT3) != 0) ? "Disable" : "Enable");
+    dbg_print(debug_on,"Data Byte Line 2: %s\n", ((fmc_reg & BIT2) != 0) ? "Disable" : "Enable");
+    dbg_print(debug_on,"Data Byte Line 3: %s\n", ((fmc_reg & BIT1) != 0) ? "Disable" : "Enable");
+
+    dbg_print(debug_on,"Address Byte Line 0: %s\n", ((fmc_reg & BIT8) != 0) ? "Disable" : "Enable");
+    dbg_print(debug_on,"Address Byte Line 1: %s\n", ((fmc_reg & BIT7) != 0) ? "Disable" : "Enable");
+    dbg_print(debug_on,"Address Byte Line 2: %s\n", ((fmc_reg & BIT6) != 0) ? "Disable" : "Enable");
+    dbg_print(debug_on,"Address Byte Line 3: %s\n", ((fmc_reg & BIT5) != 0) ? "Disable" : "Enable");
+
+    return;
+}
+
+static void ce_control_reg_debug(void)
+{
+    uint32_t fmc_reg;
+
+    /* CE0 Control Register */
+    fmc_reg = read_bmc_reg(CE0_CONTROL_REGISTER);
+    switch (fmc_reg & (BIT1 | BIT2)){
+    case NORMAL_READ:
+        dbg_print(debug_on,"CE0 Command Mode: Normal Read\n");
+        break;
+    case READ_MODE:
+        dbg_print(debug_on,"CE0 Command Mode: Read Command\n");
+        break;
+    case WRITE_MODE:
+        dbg_print(debug_on,"CE0 Command Mode: Write Command\n");
+        break;
+    case USER_MODE:
+        dbg_print(debug_on,"CE0 Command Mode: User Mode\n");
+        break;
+    default:
+        break;
+    }
+    switch((RIGHT_SHIFT_24(fmc_reg) & (BIT5 | BIT6 | BIT7))){
+    case 0:
+        dbg_print(debug_on,"CE0 IO Mode: Single Mode\n");
+        break;
+    case 2:
+    case 3:
+        dbg_print(debug_on,"CE0 IO Mode: Dual Mode\n");
+        break;
+    default:
+        break;
+    }
+
+    dbg_print(debug_on,"CE0 Inactive Pulse Width: %d HCLK\n",
+        DEFAULT_WIDTH - (RIGHT_SHIFT_24(fmc_reg) & (BIT1 | BIT2 | BIT3 | BIT4)));
+    dbg_print(debug_on,"CE0 Data Input Mode: %s Mode\n", (fmc_reg & BIT4) == 0 ? "Single" : "Dual");
+    dbg_print(debug_on,"CE0 MSB | LSB: %s First\n", (fmc_reg & BIT6) == 0 ? "MSB" : "LSB");
+
+    /* CE1 Control Register */
+    fmc_reg = read_bmc_reg(CE1_CONTROL_REGISTER);
+    switch (fmc_reg & (BIT1 | BIT2)){
+    case NORMAL_READ:
+        dbg_print(debug_on,"CE1 Command Mode: Normal Read\n");
+        break;
+    case READ_MODE:
+        dbg_print(debug_on,"CE1 Command Mode: Read Command\n");
+        break;
+    case WRITE_MODE:
+        dbg_print(debug_on,"CE1 Command Mode: Write Command\n");
+        break;
+    case USER_MODE:
+        dbg_print(debug_on,"CE1 Command Mode: User Mode\n");
+        break;
+    default:
+        break;
+    }
+    switch((RIGHT_SHIFT_24(fmc_reg) & (BIT5 | BIT6 | BIT7))){
+    case 0:
+        dbg_print(debug_on,"CE1 IO Mode: Single Mode\n");
+        break;
+    case 2:
+    case 3:
+        dbg_print(debug_on,"CE1 IO Mode: Dual Mode\n");
+        break;
+    default:
+        break;
+    }
+
+    dbg_print(debug_on,"CE1 Inactive Pulse Width: %d HCLK\n",
+        DEFAULT_WIDTH - (RIGHT_SHIFT_24(fmc_reg) & (BIT1 | BIT2 | BIT3 | BIT4)));
+    dbg_print(debug_on,"CE1 Data Input Mode: %s Mode\n", (fmc_reg & BIT4) == 0 ? "Single" : "Dual");
+    dbg_print(debug_on,"CE1 MSB | LSB: %s First\n", (fmc_reg & BIT6) == 0 ? "MSB" : "LSB");
+
+    return;
+}
+
+static void fmc_debug(void)
+{
+    ce_type_setting_debug();
+    ce_control_debug();
+    irq_control_status_debug();
+    command_control_debug();
+    ce_control_reg_debug();
+
+    return;
+}
+
+/* Enable WatchDog to reset BMC*/
+static void enable_watchdog(int cs)
+{
+    uint32_t enable_watch_cmd;
+
+    enable_watch_cmd = (cs == CE0) ? ENABLE_WATCHDOG : ENABLE_WATCHDOG | BOOT_DEFAULT_MASK;
+    write_bmc_reg(WATCHDOG2_CLEAR_STATUS, CLEAR_WATCHDOG_STATUS);
+    write_bmc_reg(WATCHDOG2_RESET_FUN_MASK, WATCHDOG_GATEMASK);
+    write_bmc_reg(WATCHDOG2_RELOAD_VALUE, WATCHDOG_NEW_COUNT);
+    write_bmc_reg(WATCHDOG2_COUNTER_RST, WATCHDOG_RELOAD_COUNTER);
+    write_bmc_reg(WATCHDOG2_CONTROL, enable_watch_cmd);
+
+    return;
+}
+
+static void bmc_reboot(int cs)
+{
+    enable_watchdog(cs);
+    watchdog_status_debug();
+    disable_upgrade();
+    printf("Upgrade-Complete, BMC rebooting...\n");
+
+    return;
+}
+
+static int get_current_bmc(void)
+{
+    return (read_bmc_reg(WATCHDOG2_TSR) & 0x02) >> 1;
+}
+
+static void get_flash_base_and_ce_ctrl(int current_bmc, int cs, uint32_t *flash_base_addr, uint32_t *ce_ctrl_addr)
+{
+    uint32_t ce0_addr_range_reg_val, ce0_decode_addr;
+    uint32_t ce1_addr_range_reg_val, ce1_decode_addr;
+
+    ce0_addr_range_reg_val = read_bmc_reg(CE0_ADDRESS_RANGE_REGISTER);
+    ce0_decode_addr = SEGMENT_ADDR_START(ce0_addr_range_reg_val);
+    ce1_addr_range_reg_val = read_bmc_reg(CE1_ADDRESS_RANGE_REGISTER);
+    ce1_decode_addr = SEGMENT_ADDR_START(ce1_addr_range_reg_val);
+    dbg_print(debug_on,"CE0 addr decode range reg value:0x%08x, decode addr:0x%08x.\n",
+        ce0_addr_range_reg_val, ce0_decode_addr);
+    dbg_print(debug_on,"CE1 addr decode range reg value:0x%08x, decode addr:0x%08x.\n",
+        ce1_addr_range_reg_val, ce1_decode_addr);
+
+    if (((current_bmc == CURRENT_MASTER) && (cs ==CE0)) || ((current_bmc == CURRENT_SLAVE) && (cs ==CE1))) {
+        *ce_ctrl_addr = CE0_CONTROL_REGISTER;
+        *flash_base_addr = ce0_decode_addr;
+    } else {
+        *ce_ctrl_addr = CE1_CONTROL_REGISTER;
+        *flash_base_addr = ce1_decode_addr;
+    }
+
+    return;
+}
+
+static int get_flash_id(uint32_t flash_base_addr, uint32_t ce_ctrl_addr)
+{
+    uint32_t origin_flash_id, flash_id;
+
+    write_bmc_reg(ce_ctrl_addr, USER_MODE_PULL_CE_DOWN);
+    send_cmd(flash_base_addr, READID);
+    origin_flash_id = read_bmc_flash_data();
+    write_bmc_reg(ce_ctrl_addr, USER_MODE_PULL_CE_UP);
+    flash_id = origin_flash_id & 0xFFFFFF;
+    dbg_print(debug_on,"origin flash id:0x%x, flash id:0x%x\n", origin_flash_id, flash_id);
+
+    return flash_id;
+}
+
+static uint8_t get_flash_status(flash_info_t* info)
+{
+    uint8_t flash_status;
+
+    pull_ce_down(info);
+
+    send_cmd(info->flash_base_addr, READ_FLASH_STATUS);
+
+    flash_status = read_bmc_flash_data() & MASK;
+    pull_ce_up(info);
+
+    dbg_print(debug_on,"get_flash_status:0x%x\n", flash_status);
+    return flash_status;
+}
+
+static int check_flash_write_enable(flash_info_t* info)
+{
+    uint8_t flash_status;
+    int i, count;
+
+    count = FLASH_WEL_TIMEOUT / FLASH_WEL_SLEEP_TIME;
+    for (i = 0; i <= count; i++) {
+        flash_status = get_flash_status(info);
+        if ((flash_status & FLASH_WRITE_ENABLE_MASK) != FLASH_WRITE_ENABLE_MASK) {
+            usleep(FLASH_WEL_SLEEP_TIME);
+        } else {
+            dbg_print(debug_on,"Check flash WEL success, RDSR:0x%x\n", flash_status);
+            return 0;
+        }
+    }
+    printf("Check flash WEL timeout, RDSR:0x%x\n", flash_status);
+    return -1;
+}
+
+static int check_flash_write_process(flash_info_t* info, int timeout, int sleep_time)
+{
+    int i, count;
+    uint8_t flash_status;
+
+    count = timeout / sleep_time;
+    for (i = 0; i <= count; i++) {
+        flash_status = get_flash_status(info);
+        if ((flash_status & FLASH_WIP_MASK) != 0) {
+            usleep(sleep_time);
+        } else {
+            dbg_print(debug_on,"Check flash WIP success, RDSR:0x%x\n", flash_status);
+            return 0;
+        }
+    }
+    printf("Check flash WIP timeout, RDSR:0x%x.\n", flash_status);
+    return -1;
+}
+
+static int flash_write_enable(flash_info_t* info)
+{
+    int ret;
+
+    send_cmd_to_flash(info, WRITE_ENABLE_FLASH);
+    ret = check_flash_write_enable(info);
+    if (ret < 0) {
+        return -1;
+    }
+    return 0;
+}
+
+static void send_block_erase_cmd(flash_info_t* info, uint32_t block_addr)
+{
+    pull_ce_down(info);
+    send_cmd(info->flash_base_addr, info->erase_block_command);
+    write_bmc_flash_addr(block_addr); /* Erase Block addr */
+    pull_ce_up(info);
+
+    return;
+}
+
+static void send_chip_erase_cmd(flash_info_t* info)
+{
+    send_cmd_to_flash(info, CHIP_ERASE_FLASH);
+
+    return;
+}
+
+static int write_bmc_flash_page(flash_info_t* info, uint32_t page_addr, uint8_t *p, int len)
+{
+    int pos;
+
+    if (len % 4) {
+        printf("Page size %d invalid.\n", len);
+        return -1;
+    }
+
+    pos = 0;
+    pull_ce_down(info);
+    send_cmd(info->flash_base_addr, info->page_program);
+    write_bmc_flash_addr(page_addr); /* page address */
+    while (len) {
+        write_bmc_flash_data((*(uint32_t *)(p + pos)));
+        pos += 4;
+        len -= 4;
+    }
+    pull_ce_up(info);
+
+    return 0;
+}
+
+static int erase_chip_full(flash_info_t* info)
+{
+    time_t timep;
+    int ret;
+
+    if (info->full_erase == 0) {
+        printf("Flash not support full erase function.\n");
+        return -1;
+    }
+
+    ret = flash_write_enable(info);
+    if(ret < 0) {
+        printf("Chip erase, enable flash write error.\n");
+        return -1;
+    }
+
+    time(&timep);
+    printf("Full chip erasing, please wait...\n");
+    dbg_print(debug_on,"Erase Start-%s\n",asctime(gmtime(&timep)));
+    send_chip_erase_cmd(info);
+    ret = check_flash_write_process(info, CHIP_ERASE_TIMEOUT, CHIP_ERASE_SLEEP_TIME);
+    if (ret < 0) {
+        printf("Chip erase timeout.\n");
+        return -1;
+    }
+    time(&timep);
+    dbg_print(debug_on,"Erase Finish-%s\n",asctime(gmtime(&timep)));
+    printf("Erase Finish\n");
+    printf("=========================================\n");
+    return 0;
+}
+
+static int erase_chip_block(flash_info_t* info)
+{
+    uint32_t block_addr, end_addr;
+    time_t timep;
+    int ret;
+
+    printf("Block erasing...\n");
+    time (&timep);
+    dbg_print(debug_on,"Erase-Start-%s\n", asctime(gmtime(&timep)));
+    end_addr = info->flash_base_addr + info->flash_size;
+    block_addr = info->flash_base_addr;
+    while (1) {
+        /* Enable write */
+        ret = flash_write_enable(info);
+        if(ret < 0) {
+            printf("Block erase, enable flash write error, block addr:0x%x\n", block_addr);
+            return -1;
+        }
+
+        send_block_erase_cmd(info, block_addr);
+        /* Erase Block(64KB) MAX time 650ms*/
+        ret = check_flash_write_process(info, BLOCK_ERASE_TIMEOUT, BLOCK_ERASE_SLEEP_TIME);
+        if (ret < 0) {
+            printf("Block erase, check write status error, block addr:0x%x\n", block_addr);
+            return -1;
+        }
+        printf("\r0x%x", block_addr);
+        fflush(stdout);
+        if (block_addr >= end_addr) {
+            time(&timep);
+            printf("\r\nErase Finish\n");
+            printf("=========================================\n");
+            dbg_print(debug_on,"\nEnd-Earse-%s\n",asctime(gmtime(&timep)));
+            break;
+        }
+        block_addr += info->block_size;
+    }
+    return 0;
+}
+
+static int program_chip(uint32_t file_size, uint8_t *p, flash_info_t* info)
+{
+    time_t timep;
+    uint32_t page_addr, end_addr;
+    int ret, page_size;
+
+    page_addr = info->flash_base_addr;
+    page_size = info->page_size;
+    end_addr = file_size + info->flash_base_addr;
+    time (&timep);
+    printf("Programming...\n");
+    dbg_print(debug_on,"Program Start-%s\n",asctime(gmtime(&timep)));
+    /* Debug info */
+    fmc_debug();
+    while (1) {
+        /* Write enable */
+        ret = flash_write_enable(info);
+        if(ret < 0) {
+            printf("Page program, enable flash write error, page addr:0x%x\n", page_addr);
+            return -1;
+        }
+        ret = write_bmc_flash_page(info, page_addr, p, page_size);
+        if (ret < 0) {
+             printf("Page program, write bmc flash page error, page addr:0x%x\n", page_addr);
+             return -1;
+         }
+        /* page program MAX time 1.5ms */
+        ret = check_flash_write_process(info, PAGE_PROGRAM_TIMEOUT, PAGE_PROGRAM_SLEEP_TIME);
+        if (ret < 0) {
+            printf("Page program, check write status error, page addr:0x%x\n", page_addr);
+            return -1;
+        }
+        page_addr += page_size;
+        p += page_size;
+        if ((page_addr % 0x10000) == 0) {
+            printf("\r0x%x", page_addr);
+            fflush(stdout);
+        }
+
+        if (page_addr >= end_addr) {
+            printf("\nProgram Finish\n");
+            printf("=========================================\n");
+            time(&timep);
+            dbg_print(debug_on,"\nProgram-End-%s\n",asctime(gmtime(&timep)));
+            break;
+        }
+    } /* End of while (1) */
+    return 0;
+}
+
+static int check_chip(uint32_t file_size, uint8_t *p, flash_info_t* info)
+{
+    time_t timep;
+    uint32_t offset_addr, rd_val, end_addr;
+    int pos;
+
+    offset_addr = info->flash_base_addr;
+    end_addr = file_size + info->flash_base_addr;
+    pos=0;
+    /* Checking */
+    time(&timep);
+    printf("Checking...\n");
+    dbg_print(debug_on,"Checking-Start-%s\n",asctime(gmtime(&timep)));
+
+    pull_ce_down(info);
+    send_cmd(info->flash_base_addr, COMMON_FLASH_READ);
+    write_bmc_flash_addr(info->flash_base_addr);
+    while (1) {
+        if (offset_addr >= end_addr) {
+            break;
+        }
+        rd_val = read_bmc_flash_data();
+        if (rd_val != (*(uint32_t *)(p + pos))) {
+            printf("Check Error at 0x%08x\n", offset_addr);
+            printf("READ:0x%08x VALUE:0x%08x\n", rd_val, (*(uint32_t *)(p + pos)));
+            pull_ce_up(info);
+            return -1;
+        }
+        if ((offset_addr % 0x10000) == 0) {
+            printf("\r0x%x ", offset_addr);
+            fflush(stdout);
+        }
+        offset_addr += 4;
+        pos += 4;
+    }
+    pull_ce_up(info);
+    printf("\r\nFlash Checked\n");
+    printf("=========================================\n");
+    time(&timep);
+    dbg_print(debug_on,"Checking-End-%s\n",asctime(gmtime(&timep)));
+    return 0;
+}
+
+flash_info_t* get_flash_info(int current_bmc, int cs)
+{
+    int i, size;
+    uint32_t flash_base_addr, ce_ctrl_addr, flash_id;
+
+    get_flash_base_and_ce_ctrl(current_bmc, cs, &flash_base_addr, &ce_ctrl_addr);
+
+    size = (sizeof(flash_info) / sizeof((flash_info)[0]));
+
+    flash_id = get_flash_id(flash_base_addr, ce_ctrl_addr);
+    for (i = 0; i < size; i++) {
+        if (flash_info[i].flash_id == flash_id) {
+            flash_info[i].flash_base_addr = flash_base_addr;
+            flash_info[i].ce_control_reg = ce_ctrl_addr;
+            flash_info[i].cs = cs;
+            return &flash_info[i];
+        }
+    }
+    printf("Cannot get flash info, cs:%d, flash base addr:0x%x, ce control addr:0x%x, flash_id:0x%x.\n",
+        cs, flash_base_addr, ce_ctrl_addr, flash_id);
+    return NULL;
+}
+
+static void init_flash(flash_info_t* info)
+{
+    send_cmd_to_flash(info, RSTEN);
+    send_cmd_to_flash(info, RST);
+    send_cmd_to_flash(info, EXIT_OTP);
+    send_cmd_to_flash(info, ENABLE_BYTE4);
+
+    return;
+}
+
+static int upgrade_bmc_core(char *file_name, int erase_type, flash_info_t* info)
+{
+    int file_size, fp, ret;
+    uint8_t *p;
+
+    file_size = get_file_size(file_name);
+    if (file_size < 0) {
+        printf("file size %d Error\n", file_size);
+        return -1;
+    }
+
+    fp = open(file_name, O_RDWR);
+    if (fp < 0) {
+        printf("Cannot open %s.\n", file_name);
+        return -1;
+    }
+
+    p = mmap(NULL, file_size, PROT_READ, MAP_SHARED, fp, 0);
+    if (p == MAP_FAILED) {
+        printf("Could not mmap %s, error(%s).\n", file_name, strerror(errno));
+        close(fp);
+        return -1;
+    }
+
+    printf("* CE%d FLASH TYPE: SPI FLASH\n", info->cs);
+    printf("* FLASH NAME: %s\n", info->flash_name);
+    printf("* File Size:%d, 0x%x\n", file_size, file_size);
+    printf("=========================================\n");
+
+    /* Select erase type */
+    switch (erase_type) {
+    case FULL_ERASE:
+        ret = erase_chip_full(info);
+        break;
+    case BLOCK_ERASE:
+        ret = erase_chip_block(info);
+        break;
+    default:
+        printf("Unsupport earse type:%d\n", erase_type);
+        goto exit;
+        break;
+    }
+
+    if (ret < 0) {
+        printf("Erase Chip Error\n");
+        goto exit;
+    }
+
+    /* Program the flash */
+    ret = program_chip(file_size, p, info);
+    if(ret < 0) {
+        printf("Program Chip Error\n");
+        goto exit;
+    }
+    /* Check */
+    ret = check_chip(file_size, p, info);
+    if(ret < 0) {
+        printf("Check Chip Error\n");
+        goto exit;
+    }
+
+    munmap(p, file_size);
+    close(fp);
+    return 0;
+exit:
+    munmap(p, file_size);
+    close(fp);
+    return -1;
+}
+
+static int upgrade_bmc_flash(char *filename, int current_bmc, int cs, int erase_type)
+{
+    int ret;
+    flash_info_t* info;
+
+    info = get_flash_info(current_bmc, cs);
+    if(info == NULL) {
+        return -1;
+    }
+
+    init_flash(info);
+
+    ret = upgrade_bmc_core(filename, erase_type, info);
+
+    return ret;
+}
+
+static int upgrade_both_flash(char *filename, int erase_type)
+{
+    int ret, current_bmc;
+
+    enable_upgrade();
+
+    current_bmc = get_current_bmc();
+    if (current_bmc == CURRENT_MASTER) {
+        printf("* Current Bmc Default Boot: CE0\n");
+    } else {
+        printf("* Current Bmc Default Boot: CE1\n");
+    }
+
+    ret = upgrade_bmc_flash(filename, current_bmc, CE0, erase_type);
+    if (ret < 0) {
+        printf("Upgrade master bmc flash failed, stop upgrade.\n");
+        goto err;
+    }
+    printf("Upgrade master bmc flash success.\n");
+
+    ret = upgrade_bmc_flash(filename, current_bmc, CE1, erase_type);
+    if (ret < 0) {
+        printf("Upgrade slave bmc flash failed.\n");
+        goto err;
+    }
+    printf("Upgrade slave bmc flash success.\n");
+
+    bmc_reboot(CE0);
+    return 0;
+err:
+    disable_upgrade();
+    return -1;
+}
+
+static int upgrade_single_flash(char *filename, int cs, int erase_type)
+{
+    int ret, current_bmc;
+
+    enable_upgrade();
+
+    current_bmc = get_current_bmc();
+    if (current_bmc == CURRENT_MASTER) {
+        printf("* Current Bmc Default Boot: CE0\n");
+    } else {
+        printf("* Current Bmc Default Boot: CE1\n");
+    }
+
+    ret = upgrade_bmc_flash(filename, current_bmc, cs, erase_type);
+    if (ret < 0) {
+        printf("Upgrade %s bmc flash failed.\n", cs == 0 ? "master":"slave");
+        goto err;
+    }
+    printf("Upgrade %s bmc flash success.\n", cs == 0 ? "master":"slave");
+
+    bmc_reboot(cs);
+    return 0;
+err:
+    disable_upgrade();
+    return -1;
+}
+
+static int upgrade_bmc(char *filename, int cs, int erase_type)
+{
+    int ret;
+
+    if (access(filename, F_OK) < 0) {
+        printf("Can't find file\n");
+        help();
+        return -1;
+    }
+
+    ret = set_ioport_rw_access();
+    if (ret < 0) {
+        printf("IO ERROR\n");
+        return -1;
+    }
+
+    switch(cs) {
+    /* Single */
+    case CE0:
+    case CE1:
+        ret = upgrade_single_flash(filename, cs, erase_type);
+        break;
+    /* Both */
+    case BOTHFLASH:
+        ret = upgrade_both_flash(filename, erase_type);
+        break;
+    default:
+        ret = -1;
+        printf("Unsupport cs:%d\n", cs);
+        break;
+    }
+
+    return ret;
+}
+
+static int read_single_bmc_flash(flash_info_t* info, uint32_t start_addr, int read_size, int is_print)
+{
+    uint32_t res, flash_start_addr, flash_end_addr;
+    char filename[MAX_FILENAME_LENGTH];
+    int fd, ret;
+
+    flash_start_addr = info->flash_base_addr + start_addr;
+    flash_end_addr = flash_start_addr + read_size;
+    ret = 0;
+    fd = 0;
+    if (!is_print) {
+        mem_clear(filename, MAX_FILENAME_LENGTH);
+        snprintf(filename, MAX_FILENAME_LENGTH, "/tmp/image-bmc%d", info->cs);
+        fd = open(filename, O_RDWR | O_CREAT | O_TRUNC, S_IRWXG|S_IRWXU|S_IRWXO);
+        if (fd < 0) {
+            printf("open file %s fail(err:%d)!\r\n", filename, errno);
+            return -1;
+        }
+    }
+
+    printf("* CE%d FLASH TYPE: SPI FLASH\n", info->cs);
+    printf("* FLASH NAME: %s\n", info->flash_name);
+    printf("* Read flash addr:0x%x, size:0x%x\n", flash_start_addr, read_size);
+    printf("=========================================\n");
+    printf("Reading...\n");
+
+    pull_ce_down(info);
+    send_cmd(info->flash_base_addr, COMMON_FLASH_READ);
+    write_bmc_flash_addr(flash_start_addr);
+    while (1) {
+        if (flash_start_addr >= flash_end_addr) {
+            break;
+        }
+        res = read_bmc_flash_data();
+        if (is_print) {
+            printf("addr:0x%08x, val:0x%08x\n", flash_start_addr, res);
+        } else {
+            ret = write(fd, &res, sizeof(res));
+            if (ret < 0) {
+                printf("write failed (errno: %d).\n", errno);
+                ret = -1;
+                goto exit;
+            }
+        }
+        if (((flash_start_addr % 0x10000) == 0) && (!is_print)) {
+            printf("\r0x%x ", flash_start_addr);
+            fflush(stdout);
+        }
+        flash_start_addr += 4;
+    }
+    printf("\r\nRead Finish\n");
+    printf("=========================================\n");
+exit:
+    pull_ce_up(info);
+    if (fd > 0) {
+        close(fd);
+    }
+    return ret;
+}
+
+static int read_bmc_flash(int cs, uint32_t start_addr, int read_size, int is_print)
+{
+    int ret, current_bmc;
+    flash_info_t* info;
+
+    ret = set_ioport_rw_access();
+    if (ret < 0) {
+        printf("IO ERROR\n");
+        return -1;
+    }
+
+    enable_upgrade();
+
+    current_bmc = get_current_bmc();
+    if (current_bmc == CURRENT_MASTER) {
+        printf("* Current Bmc Default Boot: CE0\n");
+    } else {
+        printf("* Current Bmc Default Boot: CE1\n");
+    }
+
+    info = get_flash_info(current_bmc, cs);
+    if(info == NULL) {
+        goto err;
+    }
+
+    if (start_addr >= info->flash_size) {
+        printf("start_addr 0x%x out of range.\n", start_addr);
+        goto err;
+    }
+
+    if ((start_addr + read_size) > info->flash_size) {
+        printf("read size %d exceed flash size.\n", read_size);
+        read_size = info->flash_size - start_addr;
+    }
+
+    init_flash(info);
+
+    ret = read_single_bmc_flash(info, start_addr, read_size, is_print);
+    if (ret < 0) {
+        printf("Read %s bmc flash failed.\n", cs == 0 ? "master" : "slave");
+        goto err;
+    }
+    disable_upgrade();
+    return 0;
+err:
+    disable_upgrade();
+    return -1;
+}
+
+static int read_bmc_reg_main(int argc, char* argv[])
+{
+    uint32_t start_addr, read_val;
+    int read_size, ret;
+    char *stopstring;
+
+    if (argc != 4) {
+        printf("Input invalid.\n");
+        help();
+        return -1;
+    }
+
+    start_addr = strtoul(argv[2], &stopstring, 16);
+    read_size = strtol(argv[3], &stopstring, 10);
+
+    if (read_size <= 0) {
+        printf("read length %d invalid\n", read_size);
+        return -1;
+    }
+
+    if (((start_addr % 4) != 0) || ((read_size % 4) != 0)) {
+        printf("Params invalid, start_addr:0x%08x, read_size:%d\n", start_addr, read_size);
+        printf("Please input address/length times of 4\n");
+        return -1;
+    }
+
+    ret = set_ioport_rw_access();
+    if (ret < 0) {
+        printf("IO ERROR\n");
+        return -1;
+    }
+
+    enable_ilpc2ahb();
+
+    printf("read bcm reg, start_addr:0x%08x, read length:%d\n", start_addr, read_size);
+    printf("===Addr=== | ===Cont===\n");
+    while (read_size) {
+        read_val = read_bmc_reg(start_addr);
+        printf("0x%08x | 0x%08x\n", start_addr, read_val);
+        start_addr += 4;
+        read_size -= 4;
+    }
+
+    disable_ilpc2ahb();
+    return 0;
+}
+
+static int write_bmc_reg_main(int argc, char* argv[])
+{
+    uint32_t addr, wr_val;
+    int ret;
+    char *stopstring;
+
+    if (argc != 4) {
+        printf("Input invalid.\n");
+        help();
+        return -1;
+    }
+
+    addr = strtoul(argv[2], &stopstring, 16);
+    wr_val = strtoul(argv[3], &stopstring, 16);
+
+    if (((addr & MASK_BYTE) != REGISTER_HEAD) || ((addr % 4) != 0)) {
+        printf("Address[0x%08x] invalid, address should be register address and times of 4.\n", addr);
+        return -1;
+    }
+
+    ret = set_ioport_rw_access();
+    if (ret < 0) {
+        printf("IO ERROR\n");
+        return -1;
+    }
+
+    printf("write bcm reg, addr:0x%08x, val:0x%08x\n", addr, wr_val);
+
+    enable_ilpc2ahb();
+    write_bmc_reg(addr, wr_val);
+    disable_ilpc2ahb();
+
+    return 0;
+}
+
+static int get_fmc_info_main(void)
+{
+    int ret;
+
+    ret = set_ioport_rw_access();
+    if (ret < 0) {
+        printf("IO ERROR\n");
+        return -1;
+    }
+
+    enable_ilpc2ahb();
+
+    debug_on = 3;
+    fmc_debug();
+    debug_on = 0;
+
+    disable_ilpc2ahb();
+    return 0;
+}
+
+static int program_flash_main(int argc, char* argv[])
+{
+    int cs, erase_way, ret;
+    char *stopstring;
+    char tmp[128];
+
+    if (argc != 5) {
+        printf("Input invalid.\n");
+        help();
+        return -1;
+    }
+
+    cs = strtol(argv[3], &stopstring, 10);
+    if ((strlen(stopstring) != 0) || cs < 0 || cs > 2) {
+        snprintf(tmp, sizeof(tmp), "%s", argv[3]);
+        printf("Incorrect chip select %s\n", tmp);
+        help();
+        return -1;
+    }
+
+    if (strcmp(argv[4], "full") == 0) {
+        erase_way = FULL_ERASE;
+    } else if (strcmp(argv[4], "block") == 0) {
+        erase_way = BLOCK_ERASE;
+    } else {
+        snprintf(tmp, sizeof(tmp), "%s", argv[4]);
+        printf("Incorrect erase type %s\n", tmp);
+        help();
+        return -1;
+    }
+
+    printf("============BMC Upgrade Tool=============\n");
+    ret = upgrade_bmc(argv[2], cs, erase_way);
+    return ret;
+}
+
+static int read_bmc_flash_main(int argc, char* argv[])
+{
+    int cs, ret, read_size, is_print;
+    uint32_t start_addr;
+    char *stopstring;
+    char tmp[128];
+
+    if (argc != 6) {
+        printf("Input invalid.\n");
+        help();
+        return -1;
+    }
+
+    cs = strtol(argv[2], &stopstring, 10);
+    if ((strlen(stopstring) != 0) || cs < 0 || cs > 1) {
+        snprintf(tmp, sizeof(tmp), "%s", argv[2]);
+        printf("Incorrect chip select %s\n", tmp);
+        help();
+        return -1;
+    }
+
+    start_addr = strtoul(argv[3], &stopstring, 16);
+    read_size = strtol(argv[4], &stopstring, 10);
+
+    if (read_size <= 0) {
+        printf("read length %d invalid\n", read_size);
+        return -1;
+    }
+
+    if (((start_addr % 4) != 0) || ((read_size % 4) != 0)) {
+        printf("Params invalid, start_addr:0x%08x, read_size:%d\n", start_addr, read_size);
+        printf("Please input address/length times of 4\n");
+        return -1;
+    }
+
+    if (strcmp(argv[5], "print") == 0) {
+        is_print = 1;
+    } else {
+        is_print = 0;
+    }
+
+    printf("============READ BMC FLASH=============\n");
+    ret = read_bmc_flash(cs, start_addr, read_size, is_print);
+    return ret;
+}
+
+int main(int argc, char *argv[])
+{
+    int ret;
+
+    debug_on = fw_upgrade_debug();
+
+    if (argc < 2) {
+        help();
+        return -1;
+    }
+
+    if (argc == 2) {
+        if (strcmp(argv[1], "-h") == 0 || strcmp(argv[1], "--help") == 0) {
+            help();
+            return 0;
+        }
+    }
+
+    if (strcmp(argv[1], "rd") == 0) {
+        ret = read_bmc_reg_main(argc, argv);
+        if (ret < 0) {
+            printf("Read Failed\n");
+        }
+        return ret;
+    }
+
+    if (strcmp(argv[1], "wr") == 0 && debug_on == 3) {
+        ret = write_bmc_reg_main(argc, argv);
+        if (ret < 0) {
+            printf("Write Failed\n");
+        }
+        return ret;
+    }
+
+    if (strcmp(argv[1], "info") == 0) {
+        ret = get_fmc_info_main();
+        if (ret < 0) {
+            printf("Get fmc info Failed\n");
+        }
+        return ret;
+    }
+
+    if (strcmp(argv[1], "upgrade") == 0) {
+        ret = program_flash_main(argc, argv);
+        if (ret < 0) {
+            printf("Upgrade BMC failed.\n");
+        }
+        return ret;
+    }
+
+    if (strcmp(argv[1], "read_bmc_flash") == 0) {
+        ret = read_bmc_flash_main(argc, argv);
+        if (ret < 0) {
+            printf("Read BMC flash failed.\n");
+        }
+        return ret;
+    }
+
+    printf("Input invalid.\n");
+    help();
+
+    return -1;
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/fw_upgrade/fw_upgrade/fw_upgrade_debug.c b/platform/broadcom/sonic-platform-modules-micas/common/app/fw_upgrade/fw_upgrade/fw_upgrade_debug.c
new file mode 100644
index 000000000..a7a78d011
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/app/fw_upgrade/fw_upgrade/fw_upgrade_debug.c
@@ -0,0 +1,51 @@
+#include <unistd.h>
+#include <fcntl.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <ctype.h>
+#include <string.h>
+#include <dirent.h>
+#include <ctype.h>
+#include "fw_upgrade_debug.h"
+
+int fw_upgrade_debug(void)
+{
+    int size;
+    FILE *fp;
+    char debug_info[DEBUG_INFO_LEN];
+
+    fp = fopen(DEBUG_FILE, "r");
+    if (fp == NULL) {
+        return DEBUG_IGNORE;
+    }
+
+    mem_clear(debug_info, DEBUG_INFO_LEN);
+    size = fread(debug_info, DEBUG_INFO_LEN - 1, 1, fp);
+    if (size < 0) {
+        fclose(fp);
+        return DEBUG_IGNORE;
+    }
+
+    if (strncmp(debug_info, DEBUG_ON_INFO, 1) == 0) {
+        fclose(fp);
+        return DEBUG_APP_ON;
+    }
+
+    if (strncmp(debug_info, DEBUG_ON_KERN, 1) == 0) {
+        fclose(fp);
+        return DEBUG_KERN_ON;
+    }
+
+    if (strncmp(debug_info, DEBUG_ON_ALL, 1) == 0) {
+        fclose(fp);
+        return DEBUG_ALL_ON;
+    }
+
+    if (strncmp(debug_info, DEBUG_OFF_INFO, 1) == 0) {
+        fclose(fp);
+        return DEBUG_OFF;
+    }
+
+    fclose(fp);
+    return DEBUG_IGNORE;
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/fw_upgrade/fw_upgrade/include/fw_upgrade.h b/platform/broadcom/sonic-platform-modules-micas/common/app/fw_upgrade/fw_upgrade/include/fw_upgrade.h
new file mode 100644
index 000000000..bd806a94b
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/app/fw_upgrade/fw_upgrade/include/fw_upgrade.h
@@ -0,0 +1,230 @@
+#ifndef _FW_UPGRADE_H_
+#define _FW_UPGRADE_H_
+
+#include "fw_upgrade_debug.h"
+
+#define dbg_print(debug, fmt, arg...)  \
+    if (debug == DEBUG_APP_ON || debug == DEBUG_ALL_ON) \
+        { do{printf(fmt,##arg);} while(0); }
+
+/* LPC Interface */
+#define LPC_ADDR_PORT               (0x4E)
+#define LPC_DATA_PORT               (0x4F)
+
+/* FMC REGISTER ADDR */
+#define FMC_BASE_ADDR               (0x1E620000)
+#define FMC_CE_TYPE_SETTING_REG     (FMC_BASE_ADDR + 0x00)
+#define CE_CONTROL_REGISTER         (FMC_BASE_ADDR + 0x04)
+#define INR_STATUS_CONTROL_REGISTER (FMC_BASE_ADDR + 0x08)
+#define COMMAND_CONTROL_REGISTER    (FMC_BASE_ADDR + 0x0C)
+#define CE0_CONTROL_REGISTER        (FMC_BASE_ADDR + 0x10)
+#define CE1_CONTROL_REGISTER        (FMC_BASE_ADDR + 0x14)
+#define CE0_ADDRESS_RANGE_REGISTER  (FMC_BASE_ADDR + 0x30)
+#define CE1_ADDRESS_RANGE_REGISTER  (FMC_BASE_ADDR + 0x34)
+
+/* SCU REGISTER ADDR */
+#define SCU_ADDR                    (0x1E6E2000)
+#define HARDWARE_STRAP_REGISTER     (SCU_ADDR + 0x70)
+#define REBOOT_CPU_REGISTER         (SCU_ADDR + 0x7C)
+
+/* SCU KEY */
+#define UNLOCK_SCU_KEY              (0x1688A8A8)
+#define LOCK_SCU_KEY                (0x11111111)
+
+/* WATCHDOG REGISTER ADDR */
+#define WATCHDOG_ADDR               (0x1E785000)
+#define WATCHDOG1_RELOAD_VALUE      (WATCHDOG_ADDR + 0x04)
+#define WATCHDOG1_COUNTER_RST       (WATCHDOG_ADDR + 0x08)
+#define WATCHDOG1_CONTROL           (WATCHDOG_ADDR + 0x0C)
+#define WATCHDOG1_TSR               (WATCHDOG_ADDR + 0x10)
+#define WATCHDOG1_CLEAR_STATUS      (WATCHDOG_ADDR + 0x14)
+#define WATCHDOG1_RESET_FUN_MASK    (WATCHDOG_ADDR + 0x1C)
+
+#define WATCHDOG2_RELOAD_VALUE      (WATCHDOG_ADDR + 0x24)
+#define WATCHDOG2_COUNTER_RST       (WATCHDOG_ADDR + 0x28)
+#define WATCHDOG2_CONTROL           (WATCHDOG_ADDR + 0x2C)
+#define WATCHDOG2_TSR               (WATCHDOG_ADDR + 0x30)
+#define WATCHDOG2_CLEAR_STATUS      (WATCHDOG_ADDR + 0x34)
+#define WATCHDOG2_RESET_FUN_MASK    (WATCHDOG_ADDR + 0x3C)
+
+/* User Mode Command */
+#define WRITE_STATUS                (0x01)
+#define COMMON_PAGE_PROGRAM         (0x02)
+#define COMMON_FLASH_READ           (0x03)
+#define WRITE_DISABLE_FLASH         (0x04)
+#define READ_FLASH_STATUS           (0x05)
+#define WRITE_ENABLE_FLASH          (0x06)
+#define PAGE_PROGRAM_FLASH          (0x12)
+#define SECTOR_ERASE                (0x20)
+#define CLEAR_FLAG                  (0x50)
+#define SUBBLOCK_ERASE              (0x52)
+#define CHIP_ERASE_FLASH            (0x60)
+#define BLOCK_ERASE_64              (0xD8)
+#define READID                      (0x9F)
+#define ENABLE_BYTE4                (0xB7)
+#define EXIT_OTP                    (0xC1)
+#define RSTEN                       (0x66)
+#define RST                         (0x99)
+
+#define BIT1                        (0x01)
+#define BIT2                        (0x02)
+#define BIT3                        (0x04)
+#define BIT4                        (0x08)
+#define BIT5                        (0x10)
+#define BIT6                        (0x20)
+#define BIT7                        (0x40)
+#define BIT8                        (0x80)
+#define RIGHT_SHIFT_8(reg)          (reg >> 8)
+#define RIGHT_SHIFT_16(reg)         (reg >> 16)
+#define RIGHT_SHIFT_24(reg)         (reg >> 24)
+#define MASK                        (0xFF)
+#define FLASH_TYPE_MASK             (BIT1 | BIT2)
+#define BOOT_DEFAULT_MASK           (BIT8)
+#define HEAD_MASK                   (0x00FFFF00)
+#define MASK_BYTE                   (0xFF000000)
+#define BYTE1                       (1)
+#define BYTE2                       (2)
+#define BYTE4                       (4)
+#define BYTE1_VAL                   (0)
+#define BYTE2_VAL                   (1)
+#define BYTE4_VAL                   (2)
+#define BYTE_RESERVED               (3)
+
+/* SuperIO */
+#define SUPERIO_07                  (0x07)
+#define SUPERIO_30                  (0x30)
+#define SUPERIO_A0                  (0xA0)
+#define SUPERIO_A2                  (0xA2)
+#define SUPERIO_REG0                (0xF0)
+#define SUPERIO_REG1                (0xF1)
+#define SUPERIO_REG2                (0xF2)
+#define SUPERIO_REG3                (0xF3)
+#define SUPERIO_REG4                (0xF4)
+#define SUPERIO_REG5                (0xF5)
+#define SUPERIO_REG6                (0xF6)
+#define SUPERIO_REG7                (0xF7)
+#define SUPERIO_REG8                (0xF8)
+#define SUPERIO_FE                  (0xFE)
+
+/* SPI Command */
+#define HIGH_CLOCK                  (0x00000000)
+#define NORMAL_READ                 (0x00000000)
+#define READ_MODE                   (0x00000001)
+#define WRITE_MODE                  (0x00000002)
+#define USER_MODE                   (0x00000003)
+#define PULL_DOWN                   (0x00000000)
+#define PULL_UP                     (0x00000004)
+
+#define CHIP_ERASE_TIME             (60)
+#define CHIP_ERASE_TIMEOUT          (300 * 1000 * 1000)
+#define CHIP_ERASE_SLEEP_TIME       (5 * 1000 * 1000)
+#define BLOCK_ERASE_TIMEOUT         (10 * 1000 * 1000)
+#define BLOCK_ERASE_SLEEP_TIME      (100 * 1000)
+#define PAGE_PROGRAM_TIMEOUT        (100 * 1000)
+#define PAGE_PROGRAM_SLEEP_TIME     (1000)
+#define FLASH_WEL_TIMEOUT           (100 * 1000)
+#define FLASH_WEL_SLEEP_TIME        (1000)
+#define FLASH_WIP_MASK              (0x00000001)
+#define FLASH_WRITE_ENABLE_MASK     (0x00000002)
+
+#define DATA_LENGTH_MASK            (0xA2)
+#define TOGGLE_WRITE                (0xCF)
+#define DISABLE_LPC                 (0xAA)
+#define ENABLE_LPC                  (0xA5)
+#define LPC_TO_AHB                  (0x0D)
+#define ENABLE_LPC_TO_AHB           (0x01)
+#define DISABLE_LPC_TO_AHB          (0x00)
+#define ENABLE_BMC_CPU_BOOT         (0xF10BD286)
+#define DISABLE_BMC_CPU_BOOT        (0xF10BD287)
+#define SET_BMC_CPU_BOOT            (0x01)
+#define CLEAR_WATCHDOG_STATUS       (0x01)
+#define DISABLE_WATCHDOG            (0x00000030)
+#define ENABLE_WATCHDOG             (0x00000033)
+#define WATCHDOG_GATEMASK           (0x033FFFF3)
+#define WATCHDOG_NEW_COUNT          (0x00050000)
+#define WATCHDOG_RELOAD_COUNTER     (0x4755)
+
+#define CE0_SPI_TYPE                (0x00000002)
+#define CE1_SPI_TYPE                (0x00000008)
+#define ERROR_COMMAND               (0x00000400)
+#define ADDRESS_PROTECT             (0x00000200)
+#define CLEAR_INR_STATUS_CONTROL    (ERROR_COMMAND | ADDRESS_PROTECT)
+#define USER_MODE_PULL_CE_DOWN      (HIGH_CLOCK | USER_MODE | PULL_DOWN)
+#define USER_MODE_PULL_CE_UP        (HIGH_CLOCK | USER_MODE | PULL_UP)
+
+#define STEP_64                     (64 * 1024)
+#define STEP_256                    (256 * 1024)
+#define BYTE_256                    (256)
+
+#define CE0                         (0)
+#define CE1                         (1)
+#define BOTHFLASH                   (2)
+#define SOC_SYS                     (0)
+#define FULL_CHIP                   (1)
+#define ARM_CPU                     (2)
+#define FULL_ERASE                  (0)
+#define BLOCK_ERASE                 (1)
+#define READ_ALL                    (2)
+#define CURRENT_SLAVE               (1)
+#define CURRENT_MASTER              (0)
+#define REGISTER_HEAD               (0x1e000000)
+#define DEFAULT_WIDTH               (16)
+#define MAX_FILENAME_LENGTH         (64)
+#define SEGMENT_ADDR_START(_r)      ((((_r) >> 16) & 0xFF) << 23)
+
+typedef struct flash_info {
+    uint32_t flash_size;
+    int cs;
+    int flash_type;
+    uint32_t flash_id;
+    int page_size;
+    char flash_name[64];
+    int erase_block_command;
+    int page_program;
+    int block_size;
+    int full_erase;
+    uint32_t ce_control_reg;
+    uint32_t flash_base_addr;
+} flash_info_t;
+
+typedef enum flash_id {
+    MX25L6433F = 0x1920c2,
+    S25FL512S = 0x200201,
+    MX25l512 = 0x1a20c2,
+    STM25P64 = 0x172020,
+    STM25P128 = 0x182020,
+    N25Q256 = 0x19ba20,
+    N25Q512 = 0x20ba20,
+    W25X16 = 0x1530ef,
+    W25X64 = 0x1730ef,
+    W25Q64BV = 0x1740ef,
+    W25Q128BV = 0x1840ef,
+    W25Q256FV = 0x1940ef,
+    MX25L1605D = 0x1520C2,
+    MX25L12805D = 0x1820C2,
+    MX66L1G45G = 0x1B20C2,
+    SST25VF016B	= 0x4125bf,
+    SST25VF064C = 0x4b25bf,
+    SST25VF040B	= 0x8d25bf,
+    AT25DF161 = 0x02461F,
+    AT25DF321 = 0x01471F,
+    GD25Q256 = 0X1940c8,
+} flash_id_t;
+
+typedef enum flash_type {
+    NOR = 0,
+    SPI = 2,
+} flash_type_t;
+
+typedef enum flash_size {
+    M1  = 0x00080000,
+    M3  = 0x00200000, /* 3M */
+    M6  = 0x00400000, /* 6M */
+    M12 = 0x00800000, /* 12M */
+    M16 = 0x01000000, /* 16M */
+    M32 = 0x02000000, /* 32M */
+    M64 = 0x04000000, /* 64M */
+    M128 = 0x08000000, /* 128M */
+} flash_size_t;
+
+#endif  /*_FW_UPGRADE_H_*/
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/fw_upgrade/fw_upgrade/include/fw_upgrade_debug.h b/platform/broadcom/sonic-platform-modules-micas/common/app/fw_upgrade/fw_upgrade/include/fw_upgrade_debug.h
new file mode 100644
index 000000000..05911da62
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/app/fw_upgrade/fw_upgrade/include/fw_upgrade_debug.h
@@ -0,0 +1,25 @@
+#ifndef __FW_UPGRADE_DEBUG_H__
+#define __FW_UPGRADE_DEBUG_H__
+
+#include <string.h>
+
+#define DEBUG_INFO_LEN  20
+#define DEBUG_FILE      "/tmp/.fw_upgrade_debug"
+#define DEBUG_ON_ALL    "3"
+#define DEBUG_ON_KERN   "2"
+#define DEBUG_ON_INFO   "1"
+#define DEBUG_OFF_INFO  "0"
+
+#define mem_clear(data, size) memset((data), 0, (size))
+
+enum debug_s {
+    DEBUG_OFF = 0,
+    DEBUG_APP_ON,
+    DEBUG_KERN_ON,
+    DEBUG_ALL_ON,
+    DEBUG_IGNORE,
+};
+
+extern int fw_upgrade_debug(void);
+
+#endif /* End of __FW_UPGRADE_DEBUG_H__ */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/algorithm/__init__.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/algorithm/__init__.py
new file mode 100644
index 000000000..e69de29bb
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/algorithm/hysteresis.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/algorithm/hysteresis.py
new file mode 100644
index 000000000..81fd596e7
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/lib/algorithm/hysteresis.py
@@ -0,0 +1,169 @@
+#!/usr/bin/env python3
+import os
+import syslog
+import copy
+
+from plat_hal.baseutil import baseutil
+
+HYST_DEBUG_FILE = "/etc/.hysteresis_debug_flag"
+
+HYSTERROR = 1
+HYSTDEBUG = 2
+
+debuglevel = 0
+
+
+def hyst_debug(s):
+    if HYSTDEBUG & debuglevel:
+        syslog.openlog("FANCONTROL-HYST", syslog.LOG_PID)
+        syslog.syslog(syslog.LOG_DEBUG, s)
+
+
+def hyst_error(s):
+    if HYSTERROR & debuglevel:
+        syslog.openlog("FANCONTROL-HYST", syslog.LOG_PID)
+        syslog.syslog(syslog.LOG_ERR, s)
+
+
+class hysteresis(object):
+    __config = None
+    __hyst_config = None
+
+    def __init__(self):
+        self.__config = baseutil.get_monitor_config()
+        self.__hyst_config = copy.deepcopy(self.__config.get("hyst", {}))
+        # init check
+        errcnt = 0
+        errmsg = ""
+        self.debug_init()
+        for temp_hyst_conf in self.__hyst_config.values():
+            if temp_hyst_conf["flag"] == 0:
+                continue
+            for i in range(temp_hyst_conf["temp_min"], temp_hyst_conf["temp_max"] + 1):
+                if i not in temp_hyst_conf["rising"]:
+                    errcnt -= 1
+                    msg = "%s hyst config error, temp value %d not in rising curve;" % (temp_hyst_conf["name"], i)
+                    hyst_error(msg)
+                    errmsg += msg
+                if i not in temp_hyst_conf["descending"]:
+                    errcnt -= 1
+                    msg = "%s hyst config error, temp value %d not in descending curve;" % (temp_hyst_conf["name"], i)
+                    hyst_error(msg)
+                    errmsg += msg
+        if errcnt < 0:
+            raise KeyError(errmsg)
+
+    def debug_init(self):
+        global debuglevel
+        if os.path.exists(HYST_DEBUG_FILE):
+            debuglevel = debuglevel | HYSTDEBUG | HYSTERROR
+        else:
+            debuglevel = debuglevel & ~(HYSTDEBUG | HYSTERROR)
+
+    def get_temp_hyst_conf(self, temp_name):
+        temp_hyst_conf = self.__hyst_config.get(temp_name)
+        return temp_hyst_conf
+
+    def get_temp_update(self, hyst_para, current_temp):
+        temp = hyst_para["value"]
+        if temp is None:
+            return None
+        temp.append(current_temp)
+        del temp[0]
+        return temp
+
+    def duty_to_pwm(self, duty):
+        pwm = int(round(float(duty) * 255 / 100))
+        return pwm
+
+    def pwm_to_duty(self, pwm):
+        duty = int(round(float(pwm) * 100 / 255))
+        return duty
+
+    def calc_hyst_val(self, temp_name, temp_list):
+
+        temp_hyst_conf = self.get_temp_hyst_conf(temp_name)
+        hyst_min = temp_hyst_conf["hyst_min"]
+        hyst_max = temp_hyst_conf["hyst_max"]
+        temp_min = temp_hyst_conf["temp_min"]
+        temp_max = temp_hyst_conf["temp_max"]
+        rising = temp_hyst_conf["rising"]
+        descending = temp_hyst_conf["descending"]
+        last_hyst_value = temp_hyst_conf["last_hyst_value"]
+        current_temp = temp_list[1]
+        last_temp = temp_list[0]
+
+        hyst_debug("calc_hyst_val, temp_name: %s, current_temp: %s, last_temp: %s, last_hyst_value: %s" %
+                   (temp_name, current_temp, last_temp, last_hyst_value))
+
+        if current_temp < temp_min:
+            hyst_debug("%s current_temp %s less than temp_min %s, set min hyst value: %s" %
+                       (temp_name, current_temp, temp_min, hyst_min))
+            return hyst_min
+
+        if current_temp > temp_max:
+            hyst_debug("%s current_temp %s more than temp_max %s, set max hyst value: %s" %
+                       (temp_name, current_temp, temp_max, hyst_max))
+            return hyst_max
+
+        if last_temp is None:  # first time
+            hyst_value = rising[current_temp]
+            hyst_debug("last_temp is None, it's first hysteresis, using rising hyst value: %s" % hyst_value)
+            return hyst_value
+
+        if current_temp == last_temp:  # temp unchanging
+            hyst_debug("current_temp equal last_temp, keep last hyst value: %s" % last_hyst_value)
+            return last_hyst_value
+
+        if current_temp > last_temp:
+            calc_hyst_value = rising[current_temp]
+            if calc_hyst_value < last_hyst_value:
+                hyst_value = last_hyst_value
+            else:
+                hyst_value = calc_hyst_value
+            hyst_debug("temp rising, last_hyst_value: %s, calc_hyst_value: %s, set hyst value: %s" %
+                       (last_hyst_value, calc_hyst_value, hyst_value))
+            return hyst_value
+
+        calc_hyst_value = descending[current_temp]
+        if calc_hyst_value > last_hyst_value:
+            hyst_value = last_hyst_value
+        else:
+            hyst_value = calc_hyst_value
+        hyst_debug("temp descending, last_hyst_value: %s, calc_hyst_value: %s, set hyst value: %s" %
+                   (last_hyst_value, calc_hyst_value, hyst_value))
+        return hyst_value
+
+    def cacl(self, temp_name, current_temp):
+        self.debug_init()
+        try:
+            temp_hyst_conf = self.get_temp_hyst_conf(temp_name)
+            if temp_hyst_conf is None:
+                hyst_debug("get %s hysteresis config failed" % temp_name)
+                return None
+
+            flag = temp_hyst_conf["flag"]
+            if flag != 1:
+                hyst_debug("%s hysteresis flag == 0, skip" % temp_name)
+                return None
+
+            temp = self.get_temp_update(temp_hyst_conf, current_temp)
+            if temp is None:
+                hyst_debug("get %s update failed" % temp_name)
+                return None
+
+            value = self.calc_hyst_val(temp_name, temp)
+
+            temp_hyst_conf["last_hyst_value"] = value
+
+            speed_type = temp_hyst_conf["type"]
+            if speed_type == "duty":
+                pwm = self.duty_to_pwm(value)
+            else:
+                pwm = value
+
+            hyst_debug("temp_name: %s, current_temp: %s, set pwm 0x%x" % (temp_name, current_temp, pwm))
+            return pwm
+        except Exception as e:
+            hyst_error("temp_name: %s calc hysteresis pwm error, msg: %s" % (temp_name, str(e)))
+            return None
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/algorithm/openloop.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/algorithm/openloop.py
new file mode 100644
index 000000000..3bb46b286
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/lib/algorithm/openloop.py
@@ -0,0 +1,110 @@
+#!/usr/bin/env python3
+import os
+import syslog
+
+from plat_hal.baseutil import baseutil
+
+OPENLOOP_DEBUG_FILE = "/etc/.openloop_debug_flag"
+
+OPENLOOPERROR = 1
+OPENLOOPDEBUG = 2
+
+debuglevel = 0
+
+
+def openloop_debug(s):
+    if OPENLOOPDEBUG & debuglevel:
+        syslog.openlog("FANCONTROL-OPENLOOP", syslog.LOG_PID)
+        syslog.syslog(syslog.LOG_DEBUG, s)
+
+
+def openloop_error(s):
+    if OPENLOOPERROR & debuglevel:
+        syslog.openlog("FANCONTROL-OPENLOOP", syslog.LOG_PID)
+        syslog.syslog(syslog.LOG_ERR, s)
+
+
+class openloop(object):
+    __config = None
+    __openloop_config = None
+
+    def __init__(self):
+        self.__config = baseutil.get_monitor_config()
+        self.__openloop_config = self.__config["openloop"]
+
+    def debug_init(self):
+        global debuglevel
+        if os.path.exists(OPENLOOP_DEBUG_FILE):
+            debuglevel = debuglevel | OPENLOOPDEBUG | OPENLOOPERROR
+        else:
+            debuglevel = debuglevel & ~(OPENLOOPDEBUG | OPENLOOPERROR)
+
+    def get_para(self, t):
+        para = self.__openloop_config.get(t)
+        return para
+
+    def linear_cacl(self, temp):
+        self.debug_init()
+        openloop_para = self.get_para("linear")
+        if openloop_para is None:
+            openloop_debug("linear openloop: get para failed")
+            return None
+
+        K = openloop_para["K"]
+        tin_min = openloop_para["tin_min"]
+        pwm_min = openloop_para["pwm_min"]
+        pwm_max = openloop_para["pwm_max"]
+        flag = openloop_para["flag"]
+
+        openloop_debug("linear openloop: flag: %s, k: %s, tin_min: %s, pwm_min: 0x%x, pwm_max: 0x%x"
+            % (flag, K, tin_min, pwm_min, pwm_max))
+
+        if flag != 1:
+            openloop_debug("linear openloop: flag == 0")
+            return None
+
+        if temp <= tin_min:
+            openloop_debug("linear openloop: temp = %d less than tin_min[%d]" % (temp, tin_min))
+            return pwm_min
+
+        pwm = int(pwm_min + (temp - tin_min) * K)
+        openloop_debug("linear openloop: cacl_pwm = 0x%x" % pwm)
+
+        pwm = min(pwm, pwm_max)
+        pwm = max(pwm, pwm_min)
+        openloop_debug("linear openloop: temp = %d, pwm = 0x%x" % (temp, pwm))
+        return pwm
+
+    def curve_cacl(self, temp):
+        self.debug_init()
+        openloop_para = self.get_para("curve")
+        if openloop_para is None:
+            openloop_debug("curve openloop: get para failed")
+            return None
+
+        a = openloop_para["a"]
+        b = openloop_para["b"]
+        c = openloop_para["c"]
+        tin_min = openloop_para["tin_min"]
+        pwm_min = openloop_para["pwm_min"]
+        pwm_max = openloop_para["pwm_max"]
+        flag = openloop_para["flag"]
+
+        openloop_debug("curve openloop: flag: %s, a: %s, b: %s, c: %s, tin_min: %s, pwm_min: 0x%x, pwm_max: 0x%x"
+            % (flag, a, b, c, tin_min, pwm_min, pwm_max))
+
+        if flag != 1:
+            openloop_debug("curve openloop: flag == 0")
+            return None
+
+        if temp <= tin_min:
+            openloop_debug("curve openloop: temp = %d less than tin_min[%d]" % (temp, tin_min))
+            return pwm_min
+
+        pwm = int(a * temp * temp + b * temp + c)
+        openloop_debug("curve openloop: cacl_pwm = 0x%x" % pwm)
+
+        pwm = min(pwm, pwm_max)
+        pwm = max(pwm, pwm_min)
+        openloop_debug("curve openloop: temp = %d, pwm = 0x%x" % (temp, pwm))
+        return pwm
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/algorithm/pid.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/algorithm/pid.py
new file mode 100644
index 000000000..25c2069fe
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/lib/algorithm/pid.py
@@ -0,0 +1,109 @@
+#!/usr/bin/env python3
+import os
+import syslog
+import copy
+
+from plat_hal.baseutil import baseutil
+
+PID_DEBUG_FILE = "/etc/.pid_debug_flag"
+
+PIDERROR = 1
+PIDDEBUG = 2
+
+debuglevel = 0
+
+
+def pid_debug(s):
+    if PIDDEBUG & debuglevel:
+        syslog.openlog("FANCONTROL-PID", syslog.LOG_PID)
+        syslog.syslog(syslog.LOG_DEBUG, s)
+
+
+def pid_error(s):
+    if PIDERROR & debuglevel:
+        syslog.openlog("FANCONTROL-PID", syslog.LOG_PID)
+        syslog.syslog(syslog.LOG_ERR, s)
+
+
+class pid(object):
+    __config = None
+    __pid_config = None
+
+    def __init__(self):
+        self.__config = baseutil.get_monitor_config()
+        self.__pid_config = copy.deepcopy(self.__config["pid"])
+
+    def debug_init(self):
+        global debuglevel
+        if os.path.exists(PID_DEBUG_FILE):
+            debuglevel = debuglevel | PIDDEBUG | PIDERROR
+        else:
+            debuglevel = debuglevel & ~(PIDDEBUG | PIDERROR)
+
+    def get_para(self, name):
+        para = self.__pid_config.get(name)
+        return para
+
+    def get_temp_update(self, pid_para, current_temp):
+        temp = pid_para["value"]
+        if temp is None:
+            return None
+        temp.append(current_temp)
+        del temp[0]
+        return temp
+
+    def cacl(self, last_pwm, name, current_temp):
+        delta_pwm = 0
+        self.debug_init()
+        pid_debug("last_pwm = %d" % last_pwm)
+
+        pid_para = self.get_para(name)
+        if pid_para is None:
+            pid_debug("get %s pid para failed" % name)
+            return None
+
+        temp = self.get_temp_update(pid_para, current_temp)
+        if temp is None:
+            pid_debug("get %s update failed" % name)
+            return None
+
+        speed_type = pid_para["type"]
+        Kp = pid_para["Kp"]
+        Ki = pid_para["Ki"]
+        Kd = pid_para["Kd"]
+        target = pid_para["target"]
+        pwm_min = pid_para["pwm_min"]
+        pwm_max = pid_para["pwm_max"]
+        flag = pid_para["flag"]
+
+        pid_debug("%s pid para: flag: %s, speed_type: %s, Kp: %s, Ki: %s, Kd: %s, target: %s, pwm_min: 0x%x, pwm_max: 0x%x"
+            % (name, flag, speed_type, Kp, Ki, Kd, target, pwm_min, pwm_max))
+
+        if flag != 1:
+            pid_debug("%s pid flag == 0" % name)
+            return None
+
+        if speed_type == "duty":
+            current_pwm = round(last_pwm * 100 / 255)
+        else:
+            current_pwm = last_pwm
+
+        if temp[2] is None:
+            tmp_pwm = current_pwm
+        elif ((temp[0] is None) or (temp[1] is None)):
+            delta_pwm = Ki * (temp[2] - target)
+            tmp_pwm = current_pwm + delta_pwm
+        else:
+            delta_pwm = Kp * (temp[2] - temp[1]) + Ki * (temp[2] - target) + Kd * (temp[2] - 2 * temp[1] + temp[0])
+            tmp_pwm = current_pwm + delta_pwm
+
+        pid_debug("delta_pwm = %d" % delta_pwm)
+        if speed_type == "duty":
+            pwm = round(tmp_pwm * 255 / 100)
+        else:
+            pwm = int(tmp_pwm)
+
+        pwm = min(pwm, pwm_max)
+        pwm = max(pwm, pwm_min)
+        pid_debug("last_pwm = 0x%x, pwm = 0x%x" % (last_pwm, pwm))
+        return pwm
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/eepromutil/__init__.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/eepromutil/__init__.py
new file mode 100644
index 000000000..e69de29bb
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/eepromutil/cust_fru.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/eepromutil/cust_fru.py
new file mode 100644
index 000000000..940c722ce
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/lib/eepromutil/cust_fru.py
@@ -0,0 +1,135 @@
+#!/usr/bin/python
+# -*- coding: utf-8 -*-
+import sys
+import os
+
+
+class CustFruException(Exception):
+    def __init__(self, message='custfrueerror', code=-100):
+        err = 'errcode: {0} message:{1}'.format(code, message)
+        Exception.__init__(self, err)
+        self.code = code
+        self.message = message
+
+
+class CustFru():
+    MAGIC_HEAD_INFO = 0x7a
+
+    _CUST_MAGIC_OFFSET = 0
+    _CUST_MAGIC_LEN = 1
+    _CUST_VERSION_OFFSET = 1
+    _CUST_VERSION_LEN = 6
+    _CUST_CRC_OFFSET = 7
+    _CUST_CRC_LEN = 1
+    _CUST_PRODUCT_NAME_OFFSET = 10
+    _CUST_PRODUCT_NAME_LEN = 17
+    _CUST_MANUFACTURER_OFFSET = 27
+    _CUST_MANUFACTURER_LEN = 7
+    _CUST_SERIAL_NUMBER_OFFSET = 34
+    _CUST_SERIAL_NUMBER_LEN = 25
+    _CUST_INPUT_TYPE_OFFSET = 78
+    _CUST_INPUT_TYPE_LEN = 2
+    _CUST_INPUT_OFFSET = 86
+    _CUST_INPUT_LEN = 15
+    _CUST_OUTPUT_OFFSET = 108
+    _CUST_OUTPUT_LEN = 11
+    _CUST_POWER_OFFSET = 200
+    _CUST_POWER_LEN = 10
+    _CUST_MANUFACTURER_DATE_OFFSET = 210
+    _CUST_MANUFACTURER_DATE_LEN = 3
+
+    def __init__(self):
+        self.magic = ""
+        self.version = ""
+        self.crc = ""
+        self.product_name = ""
+        self.manufacturer = ""
+        self.serial_number = ""
+        self.input_type = ""
+        self.input = ""
+        self.output = ""
+        self.power = ""
+        self.manufacturer_date = ""
+
+    def checksum(self, v):
+        result = 0
+        for item in v:
+            result += ord(item)
+        return (result & 0xff)
+
+    def decode(self, e2):
+        # header
+        e2_index = 0
+        head = ord(e2[0])
+        if head != self.MAGIC_HEAD_INFO:
+            raise CustFruException("Customization fru eeprom head info error, head:0x%x" % head, -10)
+        self.magic = "0x%02x" % self.MAGIC_HEAD_INFO
+
+        # version
+        version = "%s" % (e2[self._CUST_VERSION_OFFSET:self._CUST_VERSION_OFFSET + self._CUST_VERSION_LEN])
+        self.version = version.replace("\xff", "").strip()
+
+        # crc
+        crc_calc = self.checksum(e2[0:self._CUST_CRC_OFFSET])
+        if crc_calc != ord(e2[self._CUST_CRC_OFFSET]):
+            raise CustFruException("Customization fru eeprom crc check error, calc: 0x%x, read: 0x%x" % (crc_calc, ord(e2[self._CUST_CRC_OFFSET])), -10)
+        self.crc = crc_calc
+
+        # Product Name
+        product_name = "%s" % (e2[self._CUST_PRODUCT_NAME_OFFSET:self._CUST_PRODUCT_NAME_OFFSET + self._CUST_PRODUCT_NAME_LEN])
+        self.product_name = product_name.replace("\xff", "").strip()
+
+        # manufacturer
+        manufacturer = "%s" % (e2[self._CUST_MANUFACTURER_OFFSET:self._CUST_MANUFACTURER_OFFSET + self._CUST_MANUFACTURER_LEN])
+        self.manufacturer = manufacturer.strip()
+
+        # serial_number
+        serial_number = "%s" % (e2[self._CUST_SERIAL_NUMBER_OFFSET:self._CUST_SERIAL_NUMBER_OFFSET + self._CUST_SERIAL_NUMBER_LEN])
+        self.serial_number = serial_number.strip()
+
+        # input_type
+        input_type = "%s" % (e2[self._CUST_INPUT_TYPE_OFFSET:self._CUST_INPUT_TYPE_OFFSET + self._CUST_INPUT_TYPE_LEN])
+        self.input_type = input_type.strip()
+
+        # input
+        input = "%s" % (e2[self._CUST_INPUT_OFFSET:self._CUST_INPUT_OFFSET + self._CUST_INPUT_LEN])
+        self.input = input.strip()
+
+        # output
+        output = "%s" % (e2[self._CUST_OUTPUT_OFFSET:self._CUST_OUTPUT_OFFSET + self._CUST_OUTPUT_LEN])
+        self.output = output.strip()
+
+        # power
+        power = "%s" % (e2[self._CUST_POWER_OFFSET:self._CUST_POWER_OFFSET + self._CUST_POWER_LEN])
+        self.power = power.replace("\xff", "").strip()
+
+        # manufacturer_date
+        manufacturer_year = ord(e2[self._CUST_MANUFACTURER_DATE_OFFSET]) + 2000
+        manufacturer_month = ord(e2[self._CUST_MANUFACTURER_DATE_OFFSET + 1])
+        manufacturer_day = ord(e2[self._CUST_MANUFACTURER_DATE_OFFSET + 2])
+        self.manufacturer_date = "%04d-%02d-%02d" % (manufacturer_year, manufacturer_month, manufacturer_day)
+
+        return
+
+
+    def __str__(self):
+        formatstr = "Version            : %s      \n" \
+                    "Product Name       : %s      \n" \
+                    "Manufacturer       : %s      \n" \
+                    "Serial Number      : %s      \n" \
+                    "AC/DC Power Module : %s      \n" \
+                    "INPUT              : %s      \n" \
+                    "OUTPUT             : %s      \n" \
+                    "POWER              : %s      \n" \
+                    "Manufacturer Date  : %s      \n"
+        str_tmp = formatstr % (self.version,
+                            self.product_name,
+                            self.manufacturer,
+                            self.serial_number,
+                            self.input_type,
+                            self.input,
+                            self.output,
+                            self.power,
+                            self.manufacturer_date)
+        return str_tmp.replace("\x00","")
+
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/eepromutil/fantlv.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/eepromutil/fantlv.py
new file mode 100644
index 000000000..4be78e7fd
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/lib/eepromutil/fantlv.py
@@ -0,0 +1,192 @@
+#!/usr/bin/python3
+# -*- coding: utf-8 -*-
+
+class FantlvException(Exception):
+    def __init__(self, message='fantlverror', code=-100):
+        err = 'errcode: {0} message:{1}'.format(code, message)
+        Exception.__init__(self, err)
+        self.code = code
+        self.message = message
+
+
+class fan_tlv():
+    HEAD_INFO = "\x01\x7e\x01\xf1"
+    VERSION = 0x01
+    FLAG = 0x7E
+    HW_VER = 0X01
+    TYPE = 0xf1
+    TLV_LEN = 00
+    _FAN_TLV_HDR_LEN = 6
+    _FAN_TLV_CRC_LEN = 2
+
+    _FAN_TLV_TYPE_NAME = 0x02
+    _FAN_TLV_TYPE_SN = 0x03
+    _FAN_TLV_TYPE_HW_INFO = 0x05
+    _FAN_TLV_TYPE_DEV_TYPE = 0x06
+
+    @property
+    def dstatus(self):
+        return self._dstatus
+
+    @property
+    def typename(self):
+        return self._typename
+
+    @property
+    def typesn(self):
+        return self._typesn
+
+    @property
+    def typehwinfo(self):
+        return self._typehwinfo
+
+    @property
+    def typedevtype(self):
+        return self._typedevtype
+
+    def __init__(self):
+        self._typename = ""
+        self._typesn = ""
+        self._typehwinfo = ""
+        self._typedevtype = ""
+        self._dstatus = 0
+
+    def strtoarr(self, val):
+        s = []
+        if not isinstance(val, str):
+            return s
+        for index in val:
+            s.append(index)
+        return s
+
+    def hex_to_str(self, s):
+        len_t = len(s)
+        if len_t % 2 != 0:
+            return 0
+        ret = ""
+        for t in range(0, len_t / 2):
+            ret += chr(int(s[2 * t:2 * t + 2], 16))
+        return ret
+
+    def generate_fan_value(self):
+        bin_buffer = [chr(0xff)] * 256
+        bin_buffer[0] = chr(self.VERSION)
+        bin_buffer[1] = chr(self.FLAG)
+        bin_buffer[2] = chr(self.HW_VER)
+        bin_buffer[3] = chr(self.TYPE)
+
+        temp_t = "%08x" % self.typedevtype
+        typedevtype_t = self.hex_to_str(temp_t)
+        total_len = len(self.typename) + len(self.typesn) + \
+            len(self.typehwinfo) + len(typedevtype_t) + 8
+
+        bin_buffer[4] = chr(total_len >> 8)
+        bin_buffer[5] = chr(total_len & 0x00FF)
+
+        index_start = 6
+        bin_buffer[index_start] = chr(self._FAN_TLV_TYPE_NAME)
+        bin_buffer[index_start + 1] = chr(len(self.typename))
+        bin_buffer[index_start + 2: index_start + 2 +
+                   len(self.typename)] = self.strtoarr(self.typename)
+        index_start = index_start + 2 + len(self.typename)
+
+        bin_buffer[index_start] = chr(self._FAN_TLV_TYPE_SN)
+        bin_buffer[index_start + 1] = chr(len(self.typesn))
+        bin_buffer[index_start + 2:index_start + 2 +
+                   len(self.typesn)] = self.strtoarr(self.typesn)
+        index_start = index_start + 2 + len(self.typesn)
+
+        bin_buffer[index_start] = chr(self._FAN_TLV_TYPE_HW_INFO)
+        bin_buffer[index_start + 1] = chr(len(self.typehwinfo))
+        bin_buffer[index_start + 2:index_start + 2 +
+                   len(self.typehwinfo)] = self.strtoarr(self.typehwinfo)
+        index_start = index_start + 2 + len(self.typehwinfo)
+
+        bin_buffer[index_start] = chr(self._FAN_TLV_TYPE_DEV_TYPE)
+        bin_buffer[index_start + 1] = chr(len(typedevtype_t))
+        bin_buffer[index_start + 2:index_start + 2 +
+                   len(typedevtype_t)] = self.strtoarr(typedevtype_t)
+        index_start = index_start + 2 + len(typedevtype_t)
+
+        crcs = fan_tlv.fancrc(''.join(bin_buffer[0:index_start]))
+        bin_buffer[index_start] = chr(crcs >> 8)
+        bin_buffer[index_start + 1] = chr(crcs & 0x00ff)
+        return bin_buffer
+
+    def decode(self, e2):
+        if e2[0:4] != self.HEAD_INFO:
+            raise FantlvException("Fan tlv head info error,not fan tlv type", -10)
+        ret = []
+        self.VERSION = ord(e2[0])
+        self.FLAG = ord(e2[1])
+        self.HW_VER = ord(e2[2])
+        self.TYPE = ord(e2[3])
+        self.TLV_LEN = (ord(e2[4]) << 8) | ord(e2[5])
+
+        tlv_index = self._FAN_TLV_HDR_LEN
+        tlv_end = self._FAN_TLV_HDR_LEN + self.TLV_LEN
+
+        if len(e2) < self._FAN_TLV_HDR_LEN + self.TLV_LEN + 2:
+            raise FantlvException("Fan tlv eeprom len error!", -2)
+        sumcrc = fan_tlv.fancrc(e2[0:self._FAN_TLV_HDR_LEN + self.TLV_LEN])
+        readcrc = ord(e2[self._FAN_TLV_HDR_LEN + self.TLV_LEN]
+                      ) << 8 | ord(e2[self._FAN_TLV_HDR_LEN + self.TLV_LEN + 1])
+        if sumcrc != readcrc:
+            raise FantlvException("Fan tlv eeprom checksum error!", -1)
+        self._dstatus = 0
+        while (tlv_index + 2) < len(e2) and tlv_index < tlv_end:
+            s = self.decoder(
+                e2[tlv_index:tlv_index + 2 + ord(e2[tlv_index + 1])])
+            tlv_index += ord(e2[tlv_index + 1]) + 2
+            ret.append(s)
+
+        return ret
+
+    @staticmethod
+    def fancrc(t):
+        crc = 0
+        for item in t:
+            crc += ord(item)
+        return crc
+
+    def decoder(self, t):
+        try:
+            name = ""
+            value = ""
+            _len = 0
+            if ord(t[0]) == self._FAN_TLV_TYPE_NAME:
+                name = "Product Name"
+                _len = ord(t[1])
+                value = t[2:2 + ord(t[1])]
+                self._typename = value
+            elif ord(t[0]) == self._FAN_TLV_TYPE_SN:
+                name = "serial Number"
+                _len = ord(t[1])
+                value = t[2:2 + ord(t[1])]
+                self._typesn = value
+            elif ord(t[0]) == self._FAN_TLV_TYPE_HW_INFO:
+                name = "hardware info"
+                _len = ord(t[1])
+                value = t[2:2 + ord(t[1])]
+                self._typehwinfo = value
+            elif ord(t[0]) == self._FAN_TLV_TYPE_DEV_TYPE:
+                name = "dev type"
+                _len = ord(t[1])
+                value = "0x"
+                for c in t[2:2 + ord(t[1])]:
+                    value += "%02X" % (ord(c),)
+                self._typedevtype = int(value, 16)
+        except Exception as e:
+            print(e)
+        return {"name": name, "code": ord(t[0]), "value": value, "lens": _len}
+
+    def __str__(self):
+        formatstr = "VERSION     : 0x%02x  \n" \
+                    "   FLAG     : 0x%02x  \n" \
+                    " HW_VER     : 0x%02x  \n" \
+                    "   TYPE     : 0x%02x  \n" \
+                    "typename    : %s      \n" \
+                    "typesn      : %s      \n" \
+                    "typehwinfo  : %s      \n"
+        return formatstr % (self.VERSION, self.FLAG, self.HW_VER, self.TYPE,
+                            self.typename, self.typesn, self.typehwinfo)
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/eepromutil/fru.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/eepromutil/fru.py
new file mode 100644
index 000000000..f95164e03
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/lib/eepromutil/fru.py
@@ -0,0 +1,961 @@
+#!/usr/bin/python3
+import collections
+from datetime import datetime, timedelta
+from bitarray import bitarray
+
+
+__DEBUG__ = "N"
+
+
+class FruException(Exception):
+    def __init__(self, message='fruerror', code=-100):
+        err = 'errcode: {0} message:{1}'.format(code, message)
+        Exception.__init__(self, err)
+        self.code = code
+        self.message = message
+
+
+def e_print(err):
+    print("ERROR: " + err)
+
+
+def d_print(debug_info):
+    if __DEBUG__ == "Y":
+        print(debug_info)
+
+
+class FruUtil():
+    @staticmethod
+    def decodeLength(value):
+        a = bitarray(8)
+        a.setall(True)
+        a[0:1] = 0
+        a[1:2] = 0
+        x = ord(a.tobytes())
+        return x & ord(value)
+
+    @staticmethod
+    def minToData():
+        starttime = datetime(1996, 1, 1, 0, 0, 0)
+        endtime = datetime.now()
+        seconds = (endtime - starttime).total_seconds()
+        mins = seconds // 60
+        m = int(round(mins))
+        return m
+
+    @staticmethod
+    def getTimeFormat():
+        return datetime.now().strftime('%Y-%m-%d')
+
+    @staticmethod
+    def getTypeLength(value):
+        if value is None or len(value) == 0:
+            return 0
+        a = bitarray(8)
+        a.setall(False)
+        a[0:1] = 1
+        a[1:2] = 1
+        x = ord(a.tobytes())
+        return x | len(value)
+
+    @staticmethod
+    def checksum(b):
+        result = 0
+        for item in b:
+            result += ord(item)
+        return (0x100 - (result & 0xff)) & 0xff
+
+
+class BaseArea(object):
+    SUGGESTED_SIZE_COMMON_HEADER = 8
+    SUGGESTED_SIZE_INTERNAL_USE_AREA = 72
+    SUGGESTED_SIZE_CHASSIS_INFO_AREA = 32
+    SUGGESTED_SIZE_BOARD_INFO_AREA = 80
+    SUGGESTED_SIZE_PRODUCT_INFO_AREA = 80
+
+    INITVALUE = b'\x00'
+    resultvalue = INITVALUE * 256
+    COMMON_HEAD_VERSION = b'\x01'
+    __childList = None
+
+    def __init__(self, name="", size=0, offset=0):
+        self.__childList = []
+        self._offset = offset
+        self.name = name
+        self._size = size
+        self._isPresent = False
+        self._data = b'\x00' * size
+
+    @property
+    def childList(self):
+        return self.__childList
+
+    @childList.setter
+    def childList(self, value):
+        self.__childList = value
+
+    @property
+    def offset(self):
+        return self._offset
+
+    @offset.setter
+    def offset(self, value):
+        self._offset = value
+
+    @property
+    def size(self):
+        return self._size
+
+    @size.setter
+    def size(self, value):
+        self._size = value
+
+    @property
+    def data(self):
+        return self._data
+
+    @data.setter
+    def data(self, value):
+        self._data = value
+
+    @property
+    def isPresent(self):
+        return self._isPresent
+
+    @isPresent.setter
+    def isPresent(self, value):
+        self._isPresent = value
+
+
+class InternalUseArea(BaseArea):
+    pass
+
+
+class ChassisInfoArea(BaseArea):
+    pass
+
+
+class BoardInfoArea(BaseArea):
+    _boardTime = None
+    _fields = None
+    _mfg_date = None
+    areaversion = None
+    _boardversion = None
+    _language = None
+
+    def __str__(self):
+        formatstr = "version             : %x\n" \
+                    "length              : %d \n" \
+                    "language            : %x \n" \
+                    "mfg_date            : %s \n" \
+                    "boardManufacturer   : %s \n" \
+                    "boardProductName    : %s \n" \
+                    "boardSerialNumber   : %s \n" \
+                    "boardPartNumber     : %s \n" \
+                    "fruFileId           : %s \n"
+
+        tmpstr = formatstr % (ord(self.boardversion), self.size,
+                              self.language, self.getMfgRealData(),
+                              self.boardManufacturer, self.boardProductName,
+                              self.boardSerialNumber, self.boardPartNumber,
+                              self.fruFileId)
+        for i in range(1, 11):
+            valtmp = "boardextra%d" % i
+            if hasattr(self, valtmp):
+                valtmpval = getattr(self, valtmp)
+                tmpstr += "boardextra%d         : %s \n" % (i, valtmpval)
+            else:
+                break
+
+        return tmpstr
+
+    def todict(self):
+        dic = collections.OrderedDict()
+        dic["boardversion"] = ord(self.boardversion)
+        dic["boardlength"] = self.size
+        dic["boardlanguage"] = self.language
+        dic["boardmfg_date"] = self.getMfgRealData()
+        dic["boardManufacturer"] = self.boardManufacturer
+        dic["boardProductName"] = self.boardProductName
+        dic["boardSerialNumber"] = self.boardSerialNumber
+        dic["boardPartNumber"] = self.boardPartNumber
+        dic["boardfruFileId"] = self.fruFileId
+        for i in range(1, 11):
+            valtmp = "boardextra%d" % i
+            if hasattr(self, valtmp):
+                valtmpval = getattr(self, valtmp)
+                dic[valtmp] = valtmpval
+            else:
+                break
+        return dic
+
+    def decodedata(self):
+        index = 0
+        self.areaversion = self.data[index]
+        index += 1
+        d_print("decode length :%d class size:%d" %
+                ((ord(self.data[index]) * 8), self.size))
+        index += 2
+
+        timetmp = self.data[index: index + 3]
+        self.mfg_date = ord(timetmp[0]) | (
+            ord(timetmp[1]) << 8) | (ord(timetmp[2]) << 16)
+        d_print("decode getMfgRealData :%s" % self.getMfgRealData())
+        index += 3
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.boardManufacturer = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode boardManufacturer:%s" % self.boardManufacturer)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.boardProductName = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode boardProductName:%s" % self.boardProductName)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.boardSerialNumber = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode boardSerialNumber:%s" % self.boardSerialNumber)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.boardPartNumber = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode boardPartNumber:%s" % self.boardPartNumber)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.fruFileId = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode fruFileId:%s" % self.fruFileId)
+
+        for i in range(1, 11):
+            valtmp = "boardextra%d" % i
+            if self.data[index] != chr(0xc1):
+                templen = FruUtil.decodeLength(self.data[index])
+                tmpval = self.data[index + 1: index + templen + 1]
+                setattr(self, valtmp, tmpval)
+                index += templen + 1
+                d_print("decode boardextra%d:%s" % (i, tmpval))
+            else:
+                break
+
+    def fruSetValue(self, field, value):
+        tmp_field = getattr(self, field, None)
+        if tmp_field is not None:
+            setattr(self, field, value)
+
+    def recalcute(self):
+        d_print("boardInfoArea version:%x" % ord(self.boardversion))
+        d_print("boardInfoArea length:%d" % self.size)
+        d_print("boardInfoArea language:%x" % self.language)
+        self.mfg_date = FruUtil.minToData()
+        d_print("boardInfoArea mfg_date:%x" % self.mfg_date)
+
+        self.data = chr(ord(self.boardversion)) + \
+            chr(self.size // 8) + chr(self.language)
+
+        self.data += chr(self.mfg_date & 0xFF)
+        self.data += chr((self.mfg_date >> 8) & 0xFF)
+        self.data += chr((self.mfg_date >> 16) & 0xFF)
+
+        d_print("boardInfoArea boardManufacturer:%s" % self.boardManufacturer)
+        typelength = FruUtil.getTypeLength(self.boardManufacturer)
+        self.data += chr(typelength)
+        self.data += self.boardManufacturer
+
+        d_print("boardInfoArea boardProductName:%s" % self.boardProductName)
+        self.data += chr(FruUtil.getTypeLength(self.boardProductName))
+        self.data += self.boardProductName
+
+        d_print("boardInfoArea boardSerialNumber:%s" % self.boardSerialNumber)
+        self.data += chr(FruUtil.getTypeLength(self.boardSerialNumber))
+        self.data += self.boardSerialNumber
+
+        d_print("boardInfoArea boardPartNumber:%s" % self.boardPartNumber)
+        self.data += chr(FruUtil.getTypeLength(self.boardPartNumber))
+        self.data += self.boardPartNumber
+
+        d_print("boardInfoArea fruFileId:%s" % self.fruFileId)
+        self.data += chr(FruUtil.getTypeLength(self.fruFileId))
+        self.data += self.fruFileId
+
+        for i in range(1, 11):
+            valtmp = "boardextra%d" % i
+            if hasattr(self, valtmp):
+                valtmpval = getattr(self, valtmp)
+                d_print("boardInfoArea boardextra%d:%s" % (i, valtmpval))
+                self.data += chr(FruUtil.getTypeLength(valtmpval))
+                if valtmpval is not None:
+                    self.data += valtmpval
+            else:
+                break
+
+        self.data += chr(0xc1)
+
+        if len(self.data) > (self.size - 1):
+            incr = (len(self.data) - self.size) // 8 + 1
+            self.size += incr * 8
+
+        self.data = self.data[0:1] + chr(self.size // 8) + self.data[2:]
+        d_print("self data:%d" % len(self.data))
+        d_print("self size:%d" % self.size)
+        d_print("adjust size:%d" % (self.size - len(self.data) - 1))
+        self.data = self.data.ljust((self.size - 1), chr(self.INITVALUE[0]))
+
+        # checksum
+        checksum = FruUtil.checksum(self.data)
+        d_print("board info checksum:%x" % checksum)
+        self.data += chr(checksum)
+
+    def getMfgRealData(self):
+        starttime = datetime(1996, 1, 1, 0, 0, 0)
+        mactime = starttime + timedelta(minutes=self.mfg_date)
+        return mactime
+
+    @property
+    def language(self):
+        self._language = 25
+        return self._language
+
+    @property
+    def mfg_date(self):
+        return self._mfg_date
+
+    @mfg_date.setter
+    def mfg_date(self, val):
+        self._mfg_date = val
+
+    @property
+    def boardversion(self):
+        self._boardversion = self.COMMON_HEAD_VERSION
+        return self._boardversion
+
+    @property
+    def fruFileId(self):
+        return self._FRUFileID
+
+    @fruFileId.setter
+    def fruFileId(self, val):
+        self._FRUFileID = val
+
+    @property
+    def boardPartNumber(self):
+        return self._boardPartNumber
+
+    @boardPartNumber.setter
+    def boardPartNumber(self, val):
+        self._boardPartNumber = val
+
+    @property
+    def boardSerialNumber(self):
+        return self._boardSerialNumber
+
+    @boardSerialNumber.setter
+    def boardSerialNumber(self, val):
+        self._boardSerialNumber = val
+
+    @property
+    def boardProductName(self):
+        return self._boradProductName
+
+    @boardProductName.setter
+    def boardProductName(self, val):
+        self._boradProductName = val
+
+    @property
+    def boardManufacturer(self):
+        return self._boardManufacturer
+
+    @boardManufacturer.setter
+    def boardManufacturer(self, val):
+        self._boardManufacturer = val
+
+    @property
+    def boardTime(self):
+        return self._boardTime
+
+    @boardTime.setter
+    def boardTime(self, val):
+        self._boardTime = val
+
+    @property
+    def fields(self):
+        return self._fields
+
+    @fields.setter
+    def fields(self, val):
+        self._fields = val
+
+
+class ProductInfoArea(BaseArea):
+    _productManufacturer = None
+    _productAssetTag = None
+    _FRUFileID = None
+    _language = None
+
+    def __str__(self):
+        formatstr = "version             : %x\n" \
+                    "length              : %d \n" \
+                    "language            : %x \n" \
+                    "productManufacturer : %s \n" \
+                    "productName         : %s \n" \
+                    "productPartModelName: %s \n" \
+                    "productVersion      : %s \n" \
+                    "productSerialNumber : %s \n" \
+                    "productAssetTag     : %s \n" \
+                    "fruFileId           : %s \n"
+
+        tmpstr = formatstr % (ord(self.areaversion), self.size,
+                              self.language, self.productManufacturer,
+                              self.productName, self.productPartModelName,
+                              self.productVersion, self.productSerialNumber,
+                              self.productAssetTag, self.fruFileId)
+
+        for i in range(1, 11):
+            valtmp = "productextra%d" % i
+            if hasattr(self, valtmp):
+                valtmpval = getattr(self, valtmp)
+                tmpstr += "productextra%d       : %s \n" % (i, valtmpval)
+            else:
+                break
+
+        return tmpstr
+
+    def todict(self):
+        dic = collections.OrderedDict()
+        dic["productversion"] = ord(self.areaversion)
+        dic["productlength"] = self.size
+        dic["productlanguage"] = self.language
+        dic["productManufacturer"] = self.productManufacturer
+        dic["productName"] = self.productName
+        dic["productPartModelName"] = self.productPartModelName
+        dic["productVersion"] = int(self.productVersion, 16)
+        dic["productSerialNumber"] = self.productSerialNumber
+        dic["productAssetTag"] = self.productAssetTag
+        dic["productfruFileId"] = self.fruFileId
+        for i in range(1, 11):
+            valtmp = "productextra%d" % i
+            if hasattr(self, valtmp):
+                valtmpval = getattr(self, valtmp)
+                dic[valtmp] = valtmpval
+            else:
+                break
+        return dic
+
+    def decodedata(self):
+        index = 0
+        self.areaversion = self.data[index]  # 0
+        index += 1
+        d_print("decode length %d" % (ord(self.data[index]) * 8))
+        d_print("class size %d" % self.size)
+        index += 2
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.productManufacturer = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode productManufacturer:%s" % self.productManufacturer)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.productName = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode productName:%s" % self.productName)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.productPartModelName = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode productPartModelName:%s" % self.productPartModelName)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.productVersion = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode productVersion:%s" % self.productVersion)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.productSerialNumber = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode productSerialNumber:%s" % self.productSerialNumber)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.productAssetTag = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode productAssetTag:%s" % self.productAssetTag)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.fruFileId = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode fruFileId:%s" % self.fruFileId)
+
+        for i in range(1, 11):
+            valtmp = "productextra%d" % i
+            if self.data[index] != chr(0xc1) and index < self.size - 1:
+                templen = FruUtil.decodeLength(self.data[index])
+                if templen == 0:
+                    break
+                tmpval = self.data[index + 1: index + templen + 1]
+                d_print("decode boardextra%d:%s" % (i, tmpval))
+                setattr(self, valtmp, tmpval)
+                index += templen + 1
+            else:
+                break
+
+    @property
+    def productVersion(self):
+        return self._productVersion
+
+    @productVersion.setter
+    def productVersion(self, name):
+        self._productVersion = name
+
+    @property
+    def areaversion(self):
+        self._areaversion = self.COMMON_HEAD_VERSION
+        return self._areaversion
+
+    @areaversion.setter
+    def areaversion(self, name):
+        self._areaversion = name
+
+    @property
+    def language(self):
+        self._language = 25
+        return self._language
+
+    @property
+    def productManufacturer(self):
+        return self._productManufacturer
+
+    @productManufacturer.setter
+    def productManufacturer(self, name):
+        self._productManufacturer = name
+
+    @property
+    def productName(self):
+        return self._productName
+
+    @productName.setter
+    def productName(self, name):
+        self._productName = name
+
+    @property
+    def productPartModelName(self):
+        return self._productPartModelName
+
+    @productPartModelName.setter
+    def productPartModelName(self, name):
+        self._productPartModelName = name
+
+    @property
+    def productSerialNumber(self):
+        return self._productSerialNumber
+
+    @productSerialNumber.setter
+    def productSerialNumber(self, name):
+        self._productSerialNumber = name
+
+    @property
+    def productAssetTag(self):
+        return self._productAssetTag
+
+    @productAssetTag.setter
+    def productAssetTag(self, name):
+        self._productAssetTag = name
+
+    @property
+    def fruFileId(self):
+        return self._FRUFileID
+
+    @fruFileId.setter
+    def fruFileId(self, name):
+        self._FRUFileID = name
+
+    def fruSetValue(self, field, value):
+        tmp_field = getattr(self, field, None)
+        if tmp_field is not None:
+            setattr(self, field, value)
+
+    def recalcute(self):
+        d_print("product version:%x" % ord(self.areaversion))
+        d_print("product length:%d" % self.size)
+        d_print("product language:%x" % self.language)
+        self.data = chr(ord(self.areaversion)) + \
+            chr(self.size // 8) + chr(self.language)
+
+        typelength = FruUtil.getTypeLength(self.productManufacturer)
+        self.data += chr(typelength)
+        self.data += self.productManufacturer
+
+        self.data += chr(FruUtil.getTypeLength(self.productName))
+        self.data += self.productName
+
+        self.data += chr(FruUtil.getTypeLength(self.productPartModelName))
+        self.data += self.productPartModelName
+
+        self.data += chr(FruUtil.getTypeLength(self.productVersion))
+        self.data += self.productVersion
+
+        self.data += chr(FruUtil.getTypeLength(self.productSerialNumber))
+        self.data += self.productSerialNumber
+
+        self.data += chr(FruUtil.getTypeLength(self.productAssetTag))
+        if self.productAssetTag is not None:
+            self.data += self.productAssetTag
+
+        self.data += chr(FruUtil.getTypeLength(self.fruFileId))
+        self.data += self.fruFileId
+
+        for i in range(1, 11):
+            valtmp = "productextra%d" % i
+            if hasattr(self, valtmp):
+                valtmpval = getattr(self, valtmp)
+                d_print("boardInfoArea productextra%d:%s" % (i, valtmpval))
+                self.data += chr(FruUtil.getTypeLength(valtmpval))
+                if valtmpval is not None:
+                    self.data += valtmpval
+            else:
+                break
+
+        self.data += chr(0xc1)
+        if len(self.data) > (self.size - 1):
+            incr = (len(self.data) - self.size) // 8 + 1
+            self.size += incr * 8
+        d_print("self.data:%d" % len(self.data))
+        d_print("self.size:%d" % self.size)
+
+        self.data = self.data[0:1] + chr(self.size // 8) + self.data[2:]
+        self.data = self.data.ljust((self.size - 1), chr(self.INITVALUE[0]))
+        checksum = FruUtil.checksum(self.data)
+        d_print("board info checksum:%x" % checksum)
+        self.data += chr(checksum)
+
+
+class MultiRecordArea(BaseArea):
+    pass
+
+
+class Field(object):
+
+    def __init__(self, fieldType="ASCII", fieldData=""):
+        self.fieldData = fieldData
+        self.fieldType = fieldType
+
+    @property
+    def fieldType(self):
+        return self.fieldType
+
+    @property
+    def fieldData(self):
+        return self.fieldData
+
+
+class ipmifru(BaseArea):
+    _BoardInfoArea = None
+    _ProductInfoArea = None
+    _InternalUseArea = None
+    _ChassisInfoArea = None
+    _multiRecordArea = None
+    _productinfoAreaOffset = BaseArea.INITVALUE
+    _boardInfoAreaOffset = BaseArea.INITVALUE
+    _internalUserAreaOffset = BaseArea.INITVALUE
+    _chassicInfoAreaOffset = BaseArea.INITVALUE
+    _multiRecordAreaOffset = BaseArea.INITVALUE
+    _bindata = None
+    _bodybin = None
+    _version = BaseArea.COMMON_HEAD_VERSION
+    _zeroCheckSum = None
+    _frusize = 256
+
+    def __str__(self):
+        tmpstr = ""
+        if self.boardInfoArea.isPresent:
+            tmpstr += "\nboardinfoarea: \n"
+            tmpstr += self.boardInfoArea.__str__()
+        if self.productInfoArea.isPresent:
+            tmpstr += "\nproductinfoarea: \n"
+            tmpstr += self.productInfoArea.__str__()
+        return tmpstr
+
+    def decodeBin(self, eeprom):
+        commonHead = eeprom[0:8]
+        d_print("decode version %x" % ord(commonHead[0]))
+        if ord(self.COMMON_HEAD_VERSION) != ord(commonHead[0]):
+            raise FruException("HEAD VERSION error,not Fru format!", -10)
+        if FruUtil.checksum(commonHead[0:7]) != ord(commonHead[7]):
+            strtemp = "check header checksum error [cal:%02x data:%02x]" % (
+                FruUtil.checksum(commonHead[0:7]), ord(commonHead[7]))
+            raise FruException(strtemp, -3)
+        if ord(commonHead[1]) != ord(self.INITVALUE):
+            d_print("Internal Use Area is present")
+            self.internalUseArea = InternalUseArea(
+                name="Internal Use Area", size=self.SUGGESTED_SIZE_INTERNAL_USE_AREA)
+            self.internalUseArea.isPresent = True
+            self.internalUserAreaOffset = ord(commonHead[1])
+            self.internalUseArea.data = eeprom[self.internalUserAreaOffset * 8: (
+                self.internalUserAreaOffset * 8 + self.internalUseArea.size)]
+        if ord(commonHead[2]) != ord(self.INITVALUE):
+            d_print("Chassis Info Area is present")
+            self.chassisInfoArea = ChassisInfoArea(
+                name="Chassis Info Area", size=self.SUGGESTED_SIZE_CHASSIS_INFO_AREA)
+            self.chassisInfoArea.isPresent = True
+            self.chassicInfoAreaOffset = ord(commonHead[2])
+            self.chassisInfoArea.data = eeprom[self.chassicInfoAreaOffset * 8: (
+                self.chassicInfoAreaOffset * 8 + self.chassisInfoArea.size)]
+        if ord(commonHead[3]) != ord(self.INITVALUE):
+            self.boardInfoArea = BoardInfoArea(
+                name="Board Info Area", size=self.SUGGESTED_SIZE_BOARD_INFO_AREA)
+            self.boardInfoArea.isPresent = True
+            self.boardInfoAreaOffset = ord(commonHead[3])
+            self.boardInfoArea.size = ord(
+                eeprom[self.boardInfoAreaOffset * 8 + 1]) * 8
+            d_print("Board Info Area is present size:%d" %
+                    (self.boardInfoArea.size))
+            self.boardInfoArea.data = eeprom[self.boardInfoAreaOffset * 8: (
+                self.boardInfoAreaOffset * 8 + self.boardInfoArea.size)]
+            if FruUtil.checksum(self.boardInfoArea.data[:-1]) != ord(self.boardInfoArea.data[-1:]):
+                strtmp = "check boardInfoArea checksum error[cal:%02x data:%02x]" %  \
+                    (FruUtil.checksum(
+                        self.boardInfoArea.data[:-1]), ord(self.boardInfoArea.data[-1:]))
+                raise FruException(strtmp, -3)
+            self.boardInfoArea.decodedata()
+        if ord(commonHead[4]) != ord(self.INITVALUE):
+            d_print("Product Info Area is present")
+            self.productInfoArea = ProductInfoArea(
+                name="Product Info Area ", size=self.SUGGESTED_SIZE_PRODUCT_INFO_AREA)
+            self.productInfoArea.isPresent = True
+            self.productinfoAreaOffset = ord(commonHead[4])
+            d_print("length offset value: %02x" %
+                    ord(eeprom[self.productinfoAreaOffset * 8 + 1]))
+            self.productInfoArea.size = ord(
+                eeprom[self.productinfoAreaOffset * 8 + 1]) * 8
+            d_print("Product Info Area is present size:%d" %
+                    (self.productInfoArea.size))
+
+            self.productInfoArea.data = eeprom[self.productinfoAreaOffset * 8: (
+                self.productinfoAreaOffset * 8 + self.productInfoArea.size)]
+            if FruUtil.checksum(self.productInfoArea.data[:-1]) != ord(self.productInfoArea.data[-1:]):
+                strtmp = "check productInfoArea checksum error [cal:%02x data:%02x]" % (
+                    FruUtil.checksum(self.productInfoArea.data[:-1]), ord(self.productInfoArea.data[-1:]))
+                raise FruException(strtmp, -3)
+            self.productInfoArea.decodedata()
+        if ord(commonHead[5]) != ord(self.INITVALUE):
+            self.multiRecordArea = MultiRecordArea(
+                name="MultiRecord record Area ")
+            d_print("MultiRecord record present")
+            self.multiRecordArea.isPresent = True
+            self.multiRecordAreaOffset = ord(commonHead[5])
+            self.multiRecordArea.data = eeprom[self.multiRecordAreaOffset * 8: (
+                self.multiRecordAreaOffset * 8 + self.multiRecordArea.size)]
+
+    def initDefault(self):
+        self.version = self.COMMON_HEAD_VERSION
+        self.internalUserAreaOffset = self.INITVALUE
+        self.chassicInfoAreaOffset = self.INITVALUE
+        self.boardInfoAreaOffset = self.INITVALUE
+        self.productinfoAreaOffset = self.INITVALUE
+        self.multiRecordAreaOffset = self.INITVALUE
+        self.zeroCheckSum = self.INITVALUE
+        self.offset = self.SUGGESTED_SIZE_COMMON_HEADER
+        self.productInfoArea = None
+        self.internalUseArea = None
+        self.boardInfoArea = None
+        self.chassisInfoArea = None
+        self.multiRecordArea = None
+        # self.recalcute()
+
+    @property
+    def version(self):
+        return self._version
+
+    @version.setter
+    def version(self, name):
+        self._version = name
+
+    @property
+    def internalUserAreaOffset(self):
+        return self._internalUserAreaOffset
+
+    @internalUserAreaOffset.setter
+    def internalUserAreaOffset(self, obj):
+        self._internalUserAreaOffset = obj
+
+    @property
+    def chassicInfoAreaOffset(self):
+        return self._chassicInfoAreaOffset
+
+    @chassicInfoAreaOffset.setter
+    def chassicInfoAreaOffset(self, obj):
+        self._chassicInfoAreaOffset = obj
+
+    @property
+    def productinfoAreaOffset(self):
+        return self._productinfoAreaOffset
+
+    @productinfoAreaOffset.setter
+    def productinfoAreaOffset(self, obj):
+        self._productinfoAreaOffset = obj
+
+    @property
+    def boardInfoAreaOffset(self):
+        return self._boardInfoAreaOffset
+
+    @boardInfoAreaOffset.setter
+    def boardInfoAreaOffset(self, obj):
+        self._boardInfoAreaOffset = obj
+
+    @property
+    def multiRecordAreaOffset(self):
+        return self._multiRecordAreaOffset
+
+    @multiRecordAreaOffset.setter
+    def multiRecordAreaOffset(self, obj):
+        self._multiRecordAreaOffset = obj
+
+    @property
+    def zeroCheckSum(self):
+        return self._zeroCheckSum
+
+    @zeroCheckSum.setter
+    def zeroCheckSum(self, obj):
+        self._zeroCheckSum = obj
+
+    @property
+    def productInfoArea(self):
+        return self._ProductInfoArea
+
+    @productInfoArea.setter
+    def productInfoArea(self, obj):
+        self._ProductInfoArea = obj
+
+    @property
+    def internalUseArea(self):
+        return self._InternalUseArea
+
+    @internalUseArea.setter
+    def internalUseArea(self, obj):
+        self.internalUseArea = obj
+
+    @property
+    def boardInfoArea(self):
+        return self._BoardInfoArea
+
+    @boardInfoArea.setter
+    def boardInfoArea(self, obj):
+        self._BoardInfoArea = obj
+
+    @property
+    def chassisInfoArea(self):
+        return self._ChassisInfoArea
+
+    @chassisInfoArea.setter
+    def chassisInfoArea(self, obj):
+        self._ChassisInfoArea = obj
+
+    @property
+    def multiRecordArea(self):
+        return self._multiRecordArea
+
+    @multiRecordArea.setter
+    def multiRecordArea(self, obj):
+        self._multiRecordArea = obj
+
+    @property
+    def bindata(self):
+        return self._bindata
+
+    @bindata.setter
+    def bindata(self, obj):
+        self._bindata = obj
+
+    @property
+    def bodybin(self):
+        return self._bodybin
+
+    @bodybin.setter
+    def bodybin(self, obj):
+        self._bodybin = obj
+
+    def recalcuteCommonHead(self):
+        self.bindata = ""
+        self.offset = self.SUGGESTED_SIZE_COMMON_HEADER
+        d_print("common Header %d" % self.offset)
+        d_print("fru eeprom size  %d" % self._frusize)
+        if self.internalUseArea is not None and self.internalUseArea.isPresent:
+            self.internalUserAreaOffset = self.offset // 8
+            self.offset += self.internalUseArea.size
+            d_print("internalUseArea is present offset:%d" % self.offset)
+
+        if self.chassisInfoArea is not None and self.chassisInfoArea.isPresent:
+            self.chassicInfoAreaOffset = self.offset // 8
+            self.offset += self.chassisInfoArea.size
+            d_print("chassisInfoArea is present offset:%d" % self.offset)
+
+        if self.boardInfoArea is not None and self.boardInfoArea.isPresent:
+            self.boardInfoAreaOffset = self.offset // 8
+            self.offset += self.boardInfoArea.size
+            d_print("boardInfoArea is present offset:%d" % self.offset)
+            d_print("boardInfoArea is present size:%d" %
+                    self.boardInfoArea.size)
+
+        if self.productInfoArea is not None and self.productInfoArea.isPresent:
+            self.productinfoAreaOffset = self.offset // 8
+            self.offset += self.productInfoArea.size
+            d_print("productInfoArea is present offset:%d" % self.offset)
+
+        if self.multiRecordArea is not None and self.multiRecordArea.isPresent:
+            self.multiRecordAreaOffset = self.offset // 8
+            d_print("multiRecordArea is present offset:%d" % self.offset)
+
+        if self.internalUserAreaOffset == self.INITVALUE:
+            self.internalUserAreaOffset = 0
+        if self.productinfoAreaOffset == self.INITVALUE:
+            self.productinfoAreaOffset = 0
+        if self.chassicInfoAreaOffset == self.INITVALUE:
+            self.chassicInfoAreaOffset = 0
+        if self.boardInfoAreaOffset == self.INITVALUE:
+            self.boardInfoAreaOffset = 0
+        if self.multiRecordAreaOffset == self.INITVALUE:
+            self.multiRecordAreaOffset = 0
+
+        self.zeroCheckSum = (0x100 - ord(self.version) - self.internalUserAreaOffset - self.chassicInfoAreaOffset - self.productinfoAreaOffset
+                             - self.boardInfoAreaOffset - self.multiRecordAreaOffset) & 0xff
+        d_print("zerochecksum:%x" % self.zeroCheckSum)
+        self.data = ""
+        self.data += chr(self.version[0]) + chr(self.internalUserAreaOffset) + chr(self.chassicInfoAreaOffset) + chr(
+            self.boardInfoAreaOffset) + chr(self.productinfoAreaOffset) + chr(self.multiRecordAreaOffset) + chr(self.INITVALUE[0]) + chr(self.zeroCheckSum)
+
+        self.bindata = self.data + self.bodybin
+        totallen = len(self.bindata)
+        d_print("totallen %d" % totallen)
+        if totallen < self._frusize:
+            self.bindata = self.bindata.ljust(self._frusize, chr(self.INITVALUE[0]))
+        else:
+            raise FruException('bin data more than %d' % self._frusize, -2)
+
+    def recalcutebin(self):
+        self.bodybin = ""
+        if self.internalUseArea is not None and self.internalUseArea.isPresent:
+            d_print("internalUseArea present")
+            self.bodybin += self.internalUseArea.data
+        if self.chassisInfoArea is not None and self.chassisInfoArea.isPresent:
+            d_print("chassisInfoArea present")
+            self.bodybin += self.chassisInfoArea.data
+        if self.boardInfoArea is not None and self.boardInfoArea.isPresent:
+            d_print("boardInfoArea present")
+            self.boardInfoArea.recalcute()
+            self.bodybin += self.boardInfoArea.data
+        if self.productInfoArea is not None and self.productInfoArea.isPresent:
+            d_print("productInfoAreapresent")
+            self.productInfoArea.recalcute()
+            self.bodybin += self.productInfoArea.data
+        if self.multiRecordArea is not None and self.multiRecordArea.isPresent:
+            d_print("multiRecordArea present")
+            self.bodybin += self.productInfoArea.data
+
+    def recalcute(self, fru_eeprom_size=256):
+        self._frusize = fru_eeprom_size
+        self.recalcutebin()
+        self.recalcuteCommonHead()
+
+    def setValue(self, area, field, value):
+        tmp_area = getattr(self, area, None)
+        if tmp_area is not None:
+            tmp_area.fruSetValue(field, value)
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/eepromutil/onietlv.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/eepromutil/onietlv.py
new file mode 100644
index 000000000..a90f8f845
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/lib/eepromutil/onietlv.py
@@ -0,0 +1,441 @@
+#!/usr/bin/python3
+import binascii
+
+
+class OnietlvException(Exception):
+    def __init__(self, message='onietlverror', code=-100):
+        err = 'errcode: {0} message:{1}'.format(code, message)
+        Exception.__init__(self, err)
+        self.code = code
+        self.message = message
+
+
+class onie_tlv(object):
+    TLV_INFO_ID_STRING = "TlvInfo\x00"
+    TLV_INFO_INIA_ID = "\x00\x00\x13\x11"
+    TLV_INFO_VERSION = 0x01
+    TLV_INFO_LENGTH = 0x00
+    TLV_INFO_LENGTH_VALUE = 0xba
+
+    TLV_CODE_PRODUCT_NAME = 0x21
+    TLV_CODE_PART_NUMBER = 0x22
+    TLV_CODE_SERIAL_NUMBER = 0x23
+    TLV_CODE_MAC_BASE = 0x24
+    TLV_CODE_MANUF_DATE = 0x25
+    TLV_CODE_DEVICE_VERSION = 0x26
+    TLV_CODE_LABEL_REVISION = 0x27
+    TLV_CODE_PLATFORM_NAME = 0x28
+    TLV_CODE_ONIE_VERSION = 0x29
+    TLV_CODE_MAC_SIZE = 0x2A
+    TLV_CODE_MANUF_NAME = 0x2B
+    TLV_CODE_MANUF_COUNTRY = 0x2C
+    TLV_CODE_VENDOR_NAME = 0x2D
+    TLV_CODE_DIAG_VERSION = 0x2E
+    TLV_CODE_SERVICE_TAG = 0x2F
+    TLV_CODE_VENDOR_EXT = 0xFD
+    TLV_CODE_CRC_32 = 0xFE
+    _TLV_DISPLAY_VENDOR_EXT = 1
+    TLV_CODE_WB_CARID = 0x01
+    _TLV_INFO_HDR_LEN = 11
+    TLV_CODE_PRODUCT_ID = 0x40
+    TLV_CODE_HW_VERSION = 0x41
+    TLV_CODE_MAIN_FILENAME = 0x42
+    TLV_CODE_DTS_FINENAME = 0x43
+    TLV_CODE_SY_SERIAL0 = 0x44
+    TLV_CODE_SY_SERIAL1 = 0x45
+    TLV_CODE_SY_SERIAL2 = 0x46
+    TLV_CODE_SY_SERIAL3 = 0x47
+    TLV_CODE_PROJECT_ID = 0x48
+    TLV_CODE_SETMAC_VERSION = 0x49
+    TLV_CODE_EEPROM_TYPE = 0x4A
+
+    @property
+    def dstatus(self):
+        return self._dstatus
+
+    @property
+    def cardid(self):
+        return self._cardid
+
+    @property
+    def productname(self):
+        return self._productname
+
+    @property
+    def partnum(self):
+        return self._partnum
+
+    @property
+    def serialnum(self):
+        return self._serialnum
+
+    @property
+    def macbase(self):
+        return self._macbase
+
+    @property
+    def manufdate(self):
+        return self._manufdate
+
+    @property
+    def deviceversion(self):
+        return self._deviceversion
+
+    @property
+    def labelrevision(self):
+        return self._labelrevision
+
+    @property
+    def platformname(self):
+        return self._platformname
+
+    @property
+    def onieversion(self):
+        return self._onieversion
+
+    @property
+    def macsize(self):
+        return self._macsize
+
+    @property
+    def manufname(self):
+        return self._manufname
+
+    @property
+    def manufcountry(self):
+        return self._manufcountry
+
+    @property
+    def vendorname(self):
+        return self._vendorname
+
+    @property
+    def diagname(self):
+        return self._diagname
+
+    @property
+    def servicetag(self):
+        return self._servicetag
+
+    @property
+    def vendorext(self):
+        return self._vendorext
+
+    def __init__(self):
+        self._cardid = ""
+        self._productname = ""
+        self._partnum = ""
+        self._serialnum = ""
+        self._macbase = ""
+        self._manufdate = ""
+        self._deviceversion = ""
+        self._labelrevision = ""
+        self._platformname = ""
+        self._onieversion = ""
+        self._macsize = ""
+        self._manufname = ""
+        self._manufcountry = ""
+        self._vendorname = ""
+        self._diagname = ""
+        self._servicetag = ""
+        self._vendorext = ""
+        self._productid = ""
+        self._hwversion = ""
+        self._mainfilename = ""
+        self._dtsfilename = ""
+        self._syserial0 = ""
+        self._syserial1 = ""
+        self._syserial2 = ""
+        self._syserial3 = ""
+        self._projectid = ""
+        self._setmacversion = ""
+        self._eepromtype = ""
+        self._crc32 = ""
+        self._dstatus = 0
+
+    def oniecrc32(self, v):
+        data_array = bytearray()
+        for x in v:
+            data_array.append(ord(x))
+        return '0x%08x' % (binascii.crc32(bytes(data_array)) & 0xffffffff)
+
+    def getTLV_BODY(self, tlv_type, value):
+        x = []
+        temp_t = ""
+        if tlv_type == self.TLV_CODE_MAC_BASE:
+            arr = value.split(':')
+            for tt in arr:
+                temp_t += chr(int(tt, 16))
+        elif tlv_type == self.TLV_CODE_DEVICE_VERSION:
+            temp_t = chr(value)
+        elif tlv_type == self.TLV_CODE_MAC_SIZE:
+            temp_t = chr(value >> 8) + chr(value & 0x00ff)
+        else:
+            temp_t = value
+        x.append(chr(tlv_type))
+        x.append(chr(len(temp_t)))
+        for i in temp_t:
+            x.append(i)
+        return x
+
+    def generate_ext(self, cardid):
+        s = "%08x" % cardid
+        ret = ""
+        for t in range(0, 4):
+            ret += chr(int(s[2 * t:2 * t + 2], 16))
+        ret = chr(0x01) + chr(len(ret)) + ret
+        return ret
+
+    def generate_value(self, _t):
+        ret = []
+        for i in self.TLV_INFO_ID_STRING:
+            ret.append(i)
+        ret.append(chr(self.TLV_INFO_VERSION))
+        ret.append(chr(self.TLV_INFO_LENGTH))
+        ret.append(chr(self.TLV_INFO_LENGTH_VALUE))
+
+        total_len = 0
+        for key in _t:
+            x = self.getTLV_BODY(key, _t[key])
+            ret += x
+            total_len += len(x)
+        ret[10] = chr(total_len + 6)
+
+        ret.append(chr(0xFE))
+        ret.append(chr(0x04))
+        s = self.oniecrc32(''.join(ret))
+        for t in range(0, 4):
+            ret.append(chr(int(s[2 * t + 2:2 * t + 4], 16)))
+        totallen = len(ret)
+        if totallen < 256:
+            for left_t in range(0, 256 - totallen):
+                ret.append(chr(0x00))
+        return (ret, True)
+
+    def decode_tlv(self, e):
+        tlv_index = 0
+        tlv_end = len(e)
+        ret = []
+        while tlv_index < tlv_end and (tlv_index + 2 + ord(e[tlv_index + 1])) <= len(e):
+            rt = self.decoder(e[tlv_index:tlv_index + 2 + ord(e[tlv_index + 1])])
+            ret.append(rt)
+            if ord(e[tlv_index]) == self.TLV_CODE_CRC_32:
+                break
+            tlv_index += ord(e[tlv_index + 1]) + 2
+        return ret
+
+    def decode(self, e):
+        if e[0:8] != self.TLV_INFO_ID_STRING:
+            raise OnietlvException("ONIE tlv head info error,not onie tlv type", -1)
+        total_len = (ord(e[9]) << 8) | ord(e[10])
+        tlv_index = self._TLV_INFO_HDR_LEN
+        tlv_end = self._TLV_INFO_HDR_LEN + total_len
+        if tlv_end > len(e):
+            raise OnietlvException("ONIE tlv length error", -2)
+        ret = []
+        ret = self.decode_tlv(e[tlv_index:tlv_end])
+        for item in ret:
+            if item['code'] == self.TLV_CODE_VENDOR_EXT:
+                if item["value"][0:4] == self.TLV_INFO_INIA_ID:
+                    rt = self.decode_tlv(item["value"][4:])
+                else:
+                    rt = self.decode_tlv(item["value"][0:])
+                ret.extend(rt)
+        return ret
+
+    def decoder(self, t):
+        if ord(t[0]) == self.TLV_CODE_PRODUCT_NAME:
+            name = "Product Name"
+            _len = ord(t[1])
+            value = t[2:2 + ord(t[1])]
+            self._productname = value
+        elif ord(t[0]) == self.TLV_CODE_PART_NUMBER:
+            name = "Part Number"
+            _len = ord(t[1])
+            value = t[2:2 + ord(t[1])]
+            self._partnum = value
+        elif ord(t[0]) == self.TLV_CODE_SERIAL_NUMBER:
+            name = "Serial Number"
+            _len = ord(t[1])
+            value = t[2:2 + ord(t[1])]
+            self._serialnum = value
+        elif ord(t[0]) == self.TLV_CODE_MAC_BASE:
+            name = "Base MAC Address"
+            _len = ord(t[1])
+            value = ":".join(['%02X' % ord(T) for T in t[2:8]]).upper()
+            self._macbase = value
+        elif ord(t[0]) == self.TLV_CODE_MANUF_DATE:
+            name = "Manufacture Date"
+            _len = ord(t[1])
+            value = t[2:2 + ord(t[1])]
+            self._manufdate = value
+        elif ord(t[0]) == self.TLV_CODE_DEVICE_VERSION:
+            name = "Device Version"
+            _len = ord(t[1])
+            value = ord(t[2])
+            self._deviceversion = value
+        elif ord(t[0]) == self.TLV_CODE_LABEL_REVISION:
+            name = "Label Revision"
+            _len = ord(t[1])
+            value = t[2:2 + ord(t[1])]
+            self._labelrevision = value
+        elif ord(t[0]) == self.TLV_CODE_PLATFORM_NAME:
+            name = "Platform Name"
+            _len = ord(t[1])
+            value = t[2:2 + ord(t[1])]
+            self._platformname = value
+        elif ord(t[0]) == self.TLV_CODE_ONIE_VERSION:
+            name = "ONIE Version"
+            _len = ord(t[1])
+            value = t[2:2 + ord(t[1])]
+            self._onieversion = value
+        elif ord(t[0]) == self.TLV_CODE_MAC_SIZE:
+            name = "MAC Addresses"
+            _len = ord(t[1])
+            value = str((ord(t[2]) << 8) | ord(t[3]))
+            self._macsize = value
+        elif ord(t[0]) == self.TLV_CODE_MANUF_NAME:
+            name = "Manufacturer"
+            _len = ord(t[1])
+            value = t[2:2 + ord(t[1])]
+            self._manufname = value
+        elif ord(t[0]) == self.TLV_CODE_MANUF_COUNTRY:
+            name = "Manufacture Country"
+            _len = ord(t[1])
+            value = t[2:2 + ord(t[1])]
+            self._manufcountry = value
+        elif ord(t[0]) == self.TLV_CODE_VENDOR_NAME:
+            name = "Vendor Name"
+            _len = ord(t[1])
+            value = t[2:2 + ord(t[1])]
+            self._vendorname = value
+        elif ord(t[0]) == self.TLV_CODE_DIAG_VERSION:
+            name = "Diag Version"
+            _len = ord(t[1])
+            value = t[2:2 + ord(t[1])]
+            self._diagname = value
+        elif ord(t[0]) == self.TLV_CODE_SERVICE_TAG:
+            name = "Service Tag"
+            _len = ord(t[1])
+            value = t[2:2 + ord(t[1])]
+            self._servicetag = value
+        elif ord(t[0]) == self.TLV_CODE_VENDOR_EXT:
+            name = "Vendor Extension"
+            _len = ord(t[1])
+            value = ""
+            if self._TLV_DISPLAY_VENDOR_EXT:
+                value = t[2:2 + ord(t[1])]
+            self._vendorext = value
+        elif ord(t[0]) == self.TLV_CODE_CRC_32 and len(t) == 6:
+            name = "CRC-32"
+            _len = ord(t[1])
+            value = "0x%08X" % (((ord(t[2]) << 24) | (
+                ord(t[3]) << 16) | (ord(t[4]) << 8) | ord(t[5])),)
+            self._crc32 = value
+        elif ord(t[0]) == self.TLV_CODE_WB_CARID:
+            name = "Card id"
+            _len = ord(t[1])
+            value = ""
+            for c in t[2:2 + ord(t[1])]:
+                value += "%02X" % (ord(c),)
+            self._cardid = value
+        elif ord(t[0]) == self.TLV_CODE_PRODUCT_ID:
+            name = "Product id"
+            _len = ord(t[1])
+            value = t[2:2 + ord(t[1])]
+            self._productid = value
+        elif ord(t[0]) == self.TLV_CODE_HW_VERSION:
+            name = "Hardware Version"
+            _len = ord(t[1])
+            value = t[2:2 + ord(t[1])]
+            self._hwversion = value
+        elif ord(t[0]) == self.TLV_CODE_MAIN_FILENAME:
+            name = "Main File Name"
+            _len = ord(t[1])
+            value = t[2:2 + ord(t[1])]
+            self._mainfilename = value
+        elif ord(t[0]) == self.TLV_CODE_DTS_FINENAME:
+            name = "DTS File Name"
+            _len = ord(t[1])
+            value = t[2:2 + ord(t[1])]
+            self._dtsfilename = value
+        elif ord(t[0]) == self.TLV_CODE_SY_SERIAL0:
+            name = "SY Serial 0"
+            _len = ord(t[1])
+            value = t[2:2 + ord(t[1])]
+            self._syserial0 = value
+        elif ord(t[0]) == self.TLV_CODE_SY_SERIAL1:
+            name = "SY Serial 1"
+            _len = ord(t[1])
+            value = t[2:2 + ord(t[1])]
+            self._syserial1 = value
+        elif ord(t[0]) == self.TLV_CODE_SY_SERIAL2:
+            name = "SY Serial 2"
+            _len = ord(t[1])
+            value = t[2:2 + ord(t[1])]
+            self._syserial2 = value
+        elif ord(t[0]) == self.TLV_CODE_SY_SERIAL3:
+            name = "SY Serial 3"
+            _len = ord(t[1])
+            value = t[2:2 + ord(t[1])]
+            self._syserial3 = value
+        elif ord(t[0]) == self.TLV_CODE_PROJECT_ID:
+            name = "Project id"
+            _len = ord(t[1])
+            value = t[2:2 + ord(t[1])]
+            self._projectid = value
+        elif ord(t[0]) == self.TLV_CODE_SETMAC_VERSION:
+            name = "Setmac Version"
+            _len = ord(t[1])
+            value = t[2:2 + ord(t[1])]
+            self._setmacversion = value
+        elif ord(t[0]) == self.TLV_CODE_EEPROM_TYPE:
+            name = "EEPROM Type"
+            _len = ord(t[1])
+            value = ""
+            for c in t[2:2 + ord(t[1])]:
+                value += "%02X" % (ord(c),)
+            self._eepromtype = value
+        else:
+            name = "Unknown"
+            _len = ord(t[1])
+            value = ""
+            for c in t[2:2 + ord(t[1])]:
+                value += "0x%02X " % (ord(c),)
+        return {"name": name, "code": ord(t[0]), "value": value, "lens": _len}
+
+    def __str__(self):
+        formatstr = "Card id              : %s      \n" \
+                    "Product Name         : %s      \n" \
+                    "Part Number          : %s      \n" \
+                    "Serial Number        : %s      \n" \
+                    "Base MAC Address     : %s      \n" \
+                    "Manufacture Date     : %s      \n" \
+                    "Device Version       : %s      \n" \
+                    "Label Revision       : %s      \n" \
+                    "Platform Name        : %s      \n" \
+                    "ONIE Version         : %s      \n" \
+                    "MAC Addresses        : %s      \n" \
+                    "Manufacturer         : %s      \n" \
+                    "Manufacture Country  : %s      \n" \
+                    "Vendor Name          : %s      \n" \
+                    "Diag Version         : %s      \n" \
+                    "Service Tag          : %s      \n" \
+                    "CRC-32               : %s      \n"
+        return formatstr % (self._cardid,
+                            self._productname,
+                            self._partnum,
+                            self._serialnum,
+                            self._macbase,
+                            self._manufdate,
+                            self._deviceversion,
+                            self._labelrevision,
+                            self._platformname,
+                            self._onieversion,
+                            self._macsize,
+                            self._manufname,
+                            self._manufcountry,
+                            self._vendorname,
+                            self._diagname,
+                            self._servicetag,
+                            self._crc32)
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/__init__.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/__init__.py
new file mode 100644
index 000000000..e69de29bb
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/baseutil.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/baseutil.py
new file mode 100644
index 000000000..abf0ecf97
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/baseutil.py
@@ -0,0 +1,169 @@
+#!/usr/bin/env python3
+#######################################################
+#
+# baseutil.py
+# Python implementation of the Class baseutil
+#
+#######################################################
+import importlib.machinery
+import os
+import syslog
+import json
+import subprocess
+import glob
+from plat_hal.osutil import osutil
+
+SYSLOG_IDENTIFIER = "HAL"
+
+CONFIG_DB_PATH = "/etc/sonic/config_db.json"
+BOARD_ID_PATH = "/sys/module/platform_common/parameters/dfd_my_type"
+BOARD_AIRFLOW_PATH = "/etc/sonic/.airflow"
+
+
+def getonieplatform(path):
+    if not os.path.isfile(path):
+        return ""
+    machine_vars = {}
+    with open(path) as machine_file:
+        for line in machine_file:
+            tokens = line.split('=')
+            if len(tokens) < 2:
+                continue
+            machine_vars[tokens[0]] = tokens[1].strip()
+    return machine_vars.get("onie_platform")
+
+
+def getboardid():
+    if not os.path.exists(BOARD_ID_PATH):
+        return "NA"
+    with open(BOARD_ID_PATH) as fd:
+        id_str = fd.read().strip()
+    return "0x%x" % (int(id_str, 10))
+
+
+def getboardairflow():
+    if not os.path.exists(BOARD_AIRFLOW_PATH):
+        return "NA"
+    with open(BOARD_AIRFLOW_PATH) as fd:
+        airflow_str = fd.read().strip()
+    data = json.loads(airflow_str)
+    airflow = data.get("board", "NA")
+    return airflow
+
+
+def getplatform_config_db():
+    if not os.path.isfile(CONFIG_DB_PATH):
+        return ""
+    val = subprocess.check_output(["sonic-cfggen", "-j", CONFIG_DB_PATH, "-v", "DEVICE_METADATA.localhost.platform"]).decode().strip()
+    if len(val) <= 0:
+        return ""
+    return val
+
+
+def getplatform_name():
+    if os.path.isfile('/host/machine.conf'):
+        return getonieplatform('/host/machine.conf')
+    if os.path.isfile('/etc/sonic/machine.conf'):
+        return getonieplatform('/etc/sonic/machine.conf')
+    return getplatform_config_db()
+
+
+platform = (getplatform_name()).replace("-", "_")
+boardid = getboardid()
+boardairflow = getboardairflow()
+
+
+CONFIG_FILE_PATH_LIST = [
+    "/usr/lib/python3/dist-packages/",
+    "/usr/local/lib/*/dist-packages/hal-config/"
+]
+
+
+DEVICE_CONFIG_FILE_LIST = [
+    platform + "_" + boardid + "_" + boardairflow + "_device.py",
+    platform + "_" + boardid + "_device.py",
+    platform + "_" + boardairflow + "_device.py",
+    platform + "_device.py"
+]
+
+
+MONITOR_CONFIG_FILE_LIST = [
+    platform + "_" + boardid + "_" + boardairflow + "_monitor.py",
+    platform + "_" + boardid + "_monitor.py",
+    platform + "_" + boardairflow + "_monitor.py",
+    platform + "_monitor.py"
+]
+
+
+class baseutil:
+
+    CONFIG_NAME = 'devices'
+    MONITOR_CONFIG_NAME = 'monitor'
+    UBOOT_ENV_URL = '/etc/device/uboot_env'
+
+    @staticmethod
+    def get_config():
+        real_path = None
+        for configfile_path in CONFIG_FILE_PATH_LIST:
+            if "/*/" in configfile_path:
+                filepath = glob.glob(configfile_path)
+                if len(filepath) == 0:
+                    continue
+                configfile_path = filepath[0]
+            for config_file in DEVICE_CONFIG_FILE_LIST:
+                file = configfile_path + config_file
+                if os.path.exists(file):
+                    real_path = file
+                    break
+            if real_path is not None:
+                break
+
+        if real_path is None:
+            raise Exception("get hal device config error")
+        devices = importlib.machinery.SourceFileLoader(baseutil.CONFIG_NAME, real_path).load_module()
+        return devices.devices
+
+    @staticmethod
+    def get_monitor_config():
+        real_path = None
+        for configfile_path in CONFIG_FILE_PATH_LIST:
+            for config_file in MONITOR_CONFIG_FILE_LIST:
+                file = configfile_path + config_file
+                if os.path.exists(file):
+                    real_path = file
+                    break
+            if real_path is not None:
+                break
+
+        if real_path is None:
+            raise Exception("get hal monitor config error")
+        monitor = importlib.machinery.SourceFileLoader(baseutil.MONITOR_CONFIG_NAME, real_path).load_module()
+        return monitor.monitor
+
+    @staticmethod
+    def get_productname():
+        ret, val = osutil.command("cat %s |grep productname | awk -F\"=\" '{print $2;}'" % baseutil.UBOOT_ENV_URL)
+        tmp = val.lower().replace('-', '_')
+        if ret != 0 or len(val) <= 0:
+            raise Exception("get productname error")
+        return tmp
+
+    @staticmethod
+    def get_platform():
+        ret, val = osutil.command("cat %s |grep conffitname | awk -F\"=\" '{print $2;}'" % baseutil.UBOOT_ENV_URL)
+        if ret != 0 or len(val) <= 0:
+            raise Exception("get platform error")
+        return val
+
+    @staticmethod
+    def get_product_fullname():
+        ret, val = osutil.command("cat %s |grep productname | awk -F\"=\" '{print $2;}'" % baseutil.UBOOT_ENV_URL)
+        if ret != 0 or len(val) <= 0:
+            raise Exception("get productname error")
+        return val
+
+    @staticmethod
+    def logger_debug(msg):
+        syslog.openlog(SYSLOG_IDENTIFIER)
+        syslog.syslog(syslog.LOG_DEBUG, msg)
+        syslog.closelog()
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/chassisbase.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/chassisbase.py
new file mode 100644
index 000000000..767d6da34
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/chassisbase.py
@@ -0,0 +1,318 @@
+#!/usr/bin/env python3
+#######################################################
+#
+# chassisbase.py
+# Python implementation of the Class chassisbase
+#
+#######################################################
+from plat_hal.dcdc import dcdc
+from plat_hal.onie_e2 import onie_e2
+from plat_hal.psu import psu
+from plat_hal.led import led
+from plat_hal.temp import temp
+from plat_hal.fan import fan
+from plat_hal.cpld import cpld
+from plat_hal.component import component
+from plat_hal.cpu import cpu
+from plat_hal.baseutil import baseutil
+
+
+class chassisbase(object):
+    __onie_e2_list = []
+    __psu_list = []
+    __led_list = []
+    __temp_list = []
+    __fan_list = []
+    __card_list = []
+    __sensor_list = []
+    __dcdc_list = []
+    __cpld_list = []
+    __comp_list = []
+    __bios_list = []
+    __bmc_list = []
+    __cpu = None
+
+    def __init__(self, conftype=0, conf=None):
+        # type: (object, object, object) -> object
+        """
+        init chassisbase as order
+
+        type  = 0  use default conf, maybe auto find by platform
+        type  = 1  use given conf,  conf is not None
+
+        BITMAP
+              bit 16
+                      bit 0    PSU
+                      bit 1    LED
+                      bit 2    TEMP
+                      bit 3    fan
+                      bit 4    card
+                      bit 5    sensor
+        """
+        __confTemp = None
+
+        if conftype == 0:
+            # user
+            __confTemp = baseutil.get_config()
+        elif conftype == 1:
+            __confTemp = conf
+
+        # onie_e2
+        onie_e2temp = []
+        onie_e2config = __confTemp.get('onie_e2', [])
+        for item in onie_e2config:
+            onie_e2_1 = onie_e2(item)
+            onie_e2temp.append(onie_e2_1)
+        self.onie_e2_list = onie_e2temp
+
+        # psu
+        psutemp = []
+        psuconfig = __confTemp.get('psus', [])
+        for item in psuconfig:
+            psu1 = psu(item)
+            psutemp.append(psu1)
+        self.psu_list = psutemp
+
+        # led
+        ledtemp = []
+        ledconfig = __confTemp.get('leds', [])
+        for item in ledconfig:
+            led1 = led(item)
+            ledtemp.append(led1)
+        self.led_list = ledtemp
+
+        # temp
+        temptemp = []
+        tempconfig = __confTemp.get('temps', [])
+        for item in tempconfig:
+            temp1 = temp(item)
+            temptemp.append(temp1)
+        self.temp_list = temptemp
+
+        # fan
+        fantemp = []
+        fanconfig = __confTemp.get('fans', [])
+        for item in fanconfig:
+            fan1 = fan(item)
+            fantemp.append(fan1)
+        self.fan_list = fantemp
+
+        # dcdc
+        dcdctemp = []
+        dcdcconfig = __confTemp.get('dcdc', [])
+        for item in dcdcconfig:
+            dcdc1 = dcdc(item)
+            dcdctemp.append(dcdc1)
+        self.dcdc_list = dcdctemp
+
+        # cpld
+        cpldtemp = []
+        cpldconfig = __confTemp.get('cplds', [])
+        for item in cpldconfig:
+            cpld1 = cpld(item)
+            cpldtemp.append(cpld1)
+        self.cpld_list = cpldtemp
+
+        # compoment: cpld/fpga/bios
+        comptemp = []
+        compconfig = __confTemp.get('comp_cpld', [])
+        for item in compconfig:
+            comp1 = component(item)
+            comptemp.append(comp1)
+        self.comp_list = comptemp
+
+        compconfig = __confTemp.get('comp_fpga', [])
+        for item in compconfig:
+            comp1 = component(item)
+            self.comp_list.append(comp1)
+
+        compconfig = __confTemp.get('comp_bios', [])
+        for item in compconfig:
+            comp1 = component(item)
+            self.comp_list.append(comp1)
+
+        # cpu
+        cpuconfig = __confTemp.get('cpu', [])
+        if len(cpuconfig):
+            self.cpu = cpu(cpuconfig[0])
+
+    # dcdc
+    @property
+    def dcdc_list(self):
+        return self.__dcdc_list
+
+    @dcdc_list.setter
+    def dcdc_list(self, val):
+        self.__dcdc_list = val
+
+    # sensor
+    @property
+    def sensor_list(self):
+        return self.__sensor_list
+
+    @sensor_list.setter
+    def sensor_list(self, val):
+        self.__sensor_list = val
+
+    def get_sensor_byname(self, name):
+        tmp = self.sensor_list
+        for item in tmp:
+            if name == item.name:
+                return item
+        return None
+
+    # onie_e2
+    @property
+    def onie_e2_list(self):
+        return self.__onie_e2_list
+
+    @onie_e2_list.setter
+    def onie_e2_list(self, val):
+        self.__onie_e2_list = val
+
+    def get_onie_e2_byname(self, name):
+        tmp = self.onie_e2_list
+        for item in tmp:
+            if name == item.name:
+                return item
+        return None
+
+    # psu
+    @property
+    def psu_list(self):
+        return self.__psu_list
+
+    @psu_list.setter
+    def psu_list(self, val):
+        self.__psu_list = val
+
+    def get_psu_byname(self, name):
+        tmp = self.psu_list
+        for item in tmp:
+            if name == item.name:
+                return item
+        return None
+
+    # fan
+    @property
+    def fan_list(self):
+        return self.__fan_list
+
+    @fan_list.setter
+    def fan_list(self, val):
+        self.__fan_list = val
+
+    def get_fan_byname(self, name):
+        tmp = self.fan_list
+        for item in tmp:
+            if name == item.name:
+                return item
+        return None
+
+    # led
+
+    @property
+    def led_list(self):
+        return self.__led_list
+
+    @led_list.setter
+    def led_list(self, val):
+        self.__led_list = val
+
+    def get_led_byname(self, name):
+        tmp = self.led_list
+        for item in tmp:
+            if name == item.name:
+                return item
+        return None
+
+    # temp
+    @property
+    def temp_list(self):
+        return self.__temp_list
+
+    @temp_list.setter
+    def temp_list(self, val):
+        self.__temp_list = val
+
+    def get_temp_byname(self, name):
+        tmp = self.temp_list
+        for item in tmp:
+            if name == item.name:
+                return item
+        return None
+
+    # cpld
+    @property
+    def cpld_list(self):
+        return self.__cpld_list
+
+    @cpld_list.setter
+    def cpld_list(self, val):
+        self.__cpld_list = val
+
+    def get_cpld_byname(self, name):
+        tmp = self.cpld_list
+        for item in tmp:
+            if name == item.name:
+                return item
+        return None
+
+    @property
+    def comp_list(self):
+        return self.__comp_list
+
+    @comp_list.setter
+    def comp_list(self, val):
+        self.__comp_list = val
+
+    def get_comp_byname(self, name):
+        tmp = self.comp_list
+        for item in tmp:
+            if name == item.name:
+                return item
+        return None
+
+    # bios
+    @property
+    def bios_list(self):
+        return self.__bios_list
+
+    @bios_list.setter
+    def bios_list(self, val):
+        self.__bios_list = val
+
+    def get_bios_byname(self, name):
+        tmp = self.bios_list
+        for item in tmp:
+            if name == item.name:
+                return item
+        return None
+
+    # bmc
+    @property
+    def bmc_list(self):
+        return self.__bmc_list
+
+    @bmc_list.setter
+    def bmc_list(self, val):
+        self.__bmc_list = val
+
+    def get_bmc_byname(self, name):
+        tmp = self.bmc_list
+        for item in tmp:
+            if name == item.name:
+                return item
+        return None
+
+    # cpu
+    @property
+    def cpu(self):
+        return self.__cpu
+
+    @cpu.setter
+    def cpu(self, val):
+        self.__cpu = val
+
+    def get_cpu_byname(self, name):
+        return self.cpu
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/component.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/component.py
new file mode 100644
index 000000000..0f2ad2167
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/component.py
@@ -0,0 +1,33 @@
+#!/usr/bin/env python3
+#######################################################
+#
+# component.py
+# Python implementation of the Class fan
+#
+#######################################################
+from plat_hal.devicebase import devicebase
+from plat_hal.osutil import osutil
+
+
+class component(devicebase):
+    __user_reg = None
+
+    def __init__(self, conf=None):
+        if conf is not None:
+            self.name = conf.get('name', None)
+            self.version_file = conf.get('VersionFile', None)
+            self.comp_id = conf.get("comp_id", None)
+            self.desc = conf.get("desc", None)
+            self.slot = conf.get("slot", None)
+
+    def get_version(self):
+        version = "NA"
+        try:
+            ret, version = self.get_value(self.version_file)
+            if ret is False:
+                return version
+            pattern = self.version_file.get('pattern', None)
+            version = osutil.std_match(version, pattern)
+        except Exception:
+            return version
+        return version
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/cpld.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/cpld.py
new file mode 100644
index 000000000..09eed5f97
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/cpld.py
@@ -0,0 +1,66 @@
+#!/usr/bin/env python3
+#######################################################
+#
+# fan.py
+# Python implementation of the Class fan
+#
+#######################################################
+from plat_hal.devicebase import devicebase
+
+
+class cpld(devicebase):
+    __user_reg = None
+
+    def __init__(self, conf=None):
+        if conf is not None:
+            self.name = conf.get('name', None)
+            self.user_reg = conf.get('UserReg', None)
+            self.console_reg = conf.get('ConsoleReg', None)
+            self.console_reg_attrs = conf.get('ConsoleRegAttrs', None)
+            self.version_file = conf.get('VersionFile', None)
+            self.cpld_id = conf.get("cpld_id", None)
+            self.desc = conf.get("desc", None)
+            self.slot = conf.get("slot", None)
+            self.format = conf.get("format", "big_endian")
+            self.warm = conf.get("warm", None)
+            self.type = conf.get("type", None)
+
+    def get_user_reg(self):
+        if self.user_reg is None:
+            return False
+        ret, val = self.get_value(self.user_reg)
+        return val
+
+    def set_user_reg(self, value):
+        if self.user_reg is None:
+            return False
+        byte = value & 0xFF
+        ret, val = self.set_value(self.user_reg, byte)
+        return ret
+
+    def set_console_owner(self, owner):
+        ret = False
+
+        if self.console_reg is None:
+            return False
+        tmpattr = self.console_reg_attrs.get(owner, None)
+        if tmpattr is not None:
+            ret, val = self.set_value(self.console_reg, tmpattr)
+        return ret
+
+    def get_version(self):
+        ret, val = self.get_value(self.version_file)
+        if ret is False:
+            val = "N/A"
+            return val
+        if self.type == "str":
+            return val.strip('\n')
+        val = val.strip('\n').split(" ")
+        if len(val) < 4:
+            val = "N/A"
+            return val
+        if self.format == "little_endian":
+            cpld_version = "%s%s%s%s" % (val[3], val[2], val[1], val[0])
+        else:
+            cpld_version = "%s%s%s%s" % (val[0], val[1], val[2], val[3])
+        return cpld_version
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/cpu.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/cpu.py
new file mode 100644
index 000000000..c6bec1abd
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/cpu.py
@@ -0,0 +1,48 @@
+#!/usr/bin/env python3
+###############################################################################
+#
+# Hardware Abstraction Layer APIs -- CPU APIs.
+#
+###############################################################################
+from plat_hal.devicebase import devicebase
+
+
+class cpu(devicebase):
+
+    def __init__(self, conf=None):
+        if conf is not None:
+            self.name = conf.get('name', None)
+            self.cpu_reset_cnt_reg = conf.get('CpuResetCntReg', None)
+            self.reboot_cause_path = conf.get('reboot_cause_path', "/etc/sonic/.reboot/.previous-reboot-cause.txt")
+
+    def get_cpu_reset_num(self):
+        """
+        get cpu reset num.
+        @return cpu reset number, -1 for failure
+        """
+        ret = -1
+        if self.cpu_reset_cnt_reg is None:
+            self.logger_debug("ERR: no support get cpu reset num")
+            return ret
+        ret, reset_num = self.get_value(self.cpu_reset_cnt_reg)
+        if ret is False or reset_num is None:
+            self.logger_debug("ERR: i2c read cpu_reset_cnt_reg,result:%s" % reset_num)
+        else:
+            if isinstance(reset_num, str):
+                ret = int(reset_num, 16)
+            else:
+                ret = reset_num
+        return ret
+
+    def get_cpu_reboot_cause(self):
+        """
+        get_cpu_reboot_cause
+        @return cpu reset number, -1 for failure
+        """
+        try:
+            with open(self.reboot_cause_path) as fd:
+                reboot_cause = fd.read().strip()
+            return reboot_cause
+        except Exception:
+            return "Unknown reboot cause"
+
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/dcdc.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/dcdc.py
new file mode 100644
index 000000000..ba6049950
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/dcdc.py
@@ -0,0 +1,11 @@
+#!/usr/bin/env python3
+from plat_hal.devicebase import devicebase
+from plat_hal.sensor import sensor
+
+
+class dcdc(devicebase):
+    def __init__(self, conf=None):
+        if conf is not None:
+            self.name = conf.get('name', None)
+            self.dcdc_id = conf.get("dcdc_id", None)
+            self.sensor = sensor(conf)
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/devicebase.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/devicebase.py
new file mode 100644
index 000000000..001b4ee23
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/devicebase.py
@@ -0,0 +1,351 @@
+#!/usr/bin/env python3
+#######################################################
+#
+# devicebase.py
+# Python implementation of the Class devicebase
+#
+#######################################################
+import subprocess
+import shlex
+import ast
+from plat_hal.osutil import osutil
+from plat_hal.baseutil import baseutil
+
+class CodeVisitor(ast.NodeVisitor):
+
+    def __init__(self):
+        self.value = None
+
+    def get_value(self):
+        return self.value
+
+    def get_op_value(self, node):
+        if isinstance(node, ast.Call):       # node is func call
+            value = self.visit_Call(node)
+        elif isinstance(node, ast.BinOp):    # node is BinOp
+            value = self.visit_BinOp(node)
+        elif isinstance(node, ast.UnaryOp):  # node is UnaryOp
+            value = self.visit_UnaryOp(node)
+        elif isinstance(node, ast.Num):      # node is Num Constant
+            value = node.n
+        elif isinstance(node, ast.Str):      # node is Str Constant
+            value = node.s
+        else:
+            raise NotImplementedError("Unsupport operand type: %s" % type(node))
+        return value
+
+    def visit_UnaryOp(self, node):
+        '''
+        node.op: operand type, only support ast.UAdd/ast.USub
+        node.operand: only support ast.Call/ast.Constant(ast.Num/ast.Str)/ast.BinOp/ast.UnaryOp
+        '''
+
+        operand_value = self.get_op_value(node.operand)
+        if isinstance(node.op, ast.UAdd):
+            self.value = operand_value
+        elif isinstance(node.op, ast.USub):
+            self.value = 0 - operand_value
+        else:
+            raise NotImplementedError("Unsupport arithmetic methods %s" % type(node.op))
+        return self.value
+
+    def visit_BinOp(self, node):
+        '''
+        node.left: left operand,  only support ast.Call/ast.Constant(ast.Num)/ast.BinOp
+        node.op: operand type, only support ast.Add/ast.Sub/ast.Mult/ast.Div
+        node.right: right operan, only support ast.Call/ast.Constant(ast.Num/ast.Str)/ast.BinOp
+        '''
+        left_value = self.get_op_value(node.left)
+        right_value = self.get_op_value(node.right)
+
+        if isinstance(node.op, ast.Add):
+            self.value = left_value + right_value
+        elif isinstance(node.op, ast.Sub):
+            self.value = left_value - right_value
+        elif isinstance(node.op, ast.Mult):
+            self.value = left_value * right_value
+        elif isinstance(node.op, ast.Div):
+            self.value = left_value / right_value
+        else:
+            raise NotImplementedError("Unsupport arithmetic methods %s" % type(node.op))
+        return self.value
+
+    def visit_Call(self, node):
+        '''
+        node.func.id: func name, only support 'float', 'int', 'str'
+        node.args: func args list,only support ast.Constant(ast.Num/ast.Str)/ast.BinOp/ast.Call
+        str/float only support one parameter, eg: float(XXX), str(xxx)
+        int support one or two parameters, eg: int(xxx) or int(xxx, 16)
+        xxx can be ast.Call/ast.Constant(ast.Num/ast.Str)/ast.BinOp
+        '''
+        calc_tuple = ("float", "int", "str")
+
+        if node.func.id not in calc_tuple:
+            raise NotImplementedError("Unsupport function call type: %s" % node.func.id)
+
+        args_val_list = []
+        for item in node.args:
+            ret = self.get_op_value(item)
+            args_val_list.append(ret)
+
+        if node.func.id == "str":
+            if len(args_val_list) != 1:
+                raise TypeError("str() takes 1 positional argument but %s were given" % len(args_val_list))
+            value = str(args_val_list[0])
+            self.value = value
+            return value
+
+        if node.func.id == "float":
+            if len(args_val_list) != 1:
+                raise TypeError("float() takes 1 positional argument but %s were given" % len(args_val_list))
+            value = float(args_val_list[0])
+            self.value = value
+            return value
+        # int
+        if len(args_val_list) == 1:
+            value = int(args_val_list[0])
+            self.value = value
+            return value
+        if len(args_val_list) == 2:
+            value = int(args_val_list[0], args_val_list[1])
+            self.value = value
+            return value
+        raise TypeError("int() takes 1 or 2 arguments (%s given)" % len(args_val_list))
+
+
+class devicebase(object):
+    _name = None
+    __error_ret = -99999
+
+    @property
+    def name(self):
+        return self._name
+
+    @name.setter
+    def name(self, val):
+        self._name = val
+
+    def dumpValueByI2c(self, bus, loc):
+        value = ""
+        for i in range(256):
+            ret, val = self.get_i2c(bus, loc, i)
+            value += chr(val)
+        return value
+
+    def byteTostr(self, val):
+        strtmp = ''
+        for value in val:
+            strtmp += chr(value)
+        return strtmp
+
+    def get_eeprom_info(self, conf):
+        eeprom = ""
+        if conf.get('way') == 'sysfs':
+            ret, eeprom = self.get_value(conf)
+            if ret is False:
+                return None
+        elif conf.get('way') == 'devfile':
+            ret, eeprom_list = self.get_value(conf)
+            if ret is False:
+                return None
+            for item in eeprom_list:
+                eeprom += chr(item)
+        else:
+            eeprom = self.dumpValueByI2c(conf.get('bus'), conf.get('addr'))
+        return eeprom
+
+    def exec_os_cmd(self, cmd):
+        status, output = subprocess.getstatusoutput(cmd)
+        return status, output
+
+    def get_value(self, config):
+        '''
+            get value by config way
+            way  i2c/sysfs/lpc
+        '''
+        way = config.get("way")
+        if way == 'sysfs':
+            return self.get_sysfs(config.get("loc"), config.get("flock_path"))
+        if way == "i2c":
+            bus = config.get("bus")
+            addr = config.get("addr")
+            offset = config.get("offset")
+            return self.get_i2c(bus, addr, offset)
+        if way == "io":
+            io_addr = config.get('io_addr')
+            read_len = config.get('read_len', 1)
+            return self.get_io(io_addr, read_len)
+        if way == "i2cword":
+            bus = config.get("bus")
+            addr = config.get("addr")
+            offset = config.get("offset")
+            return self.get_i2cword(bus, addr, offset)
+        if way == "devmem":
+            addr = config.get("addr")
+            digit = config.get("digit")
+            mask = config.get("mask", None)
+            return self.get_devmem(addr, digit, mask)
+        if way == "sdk":
+            get_type = config.get("type")
+            if get_type == "bcm_temp":
+                return self.getbcmtemp()
+            if get_type == "bcm_reg":
+                reg = config.get("reg")
+                return self.getbcmreg(reg)
+            raise Exception("cannot found sdk type deal")
+        if way == "devfile":
+            loc = config.get("loc")
+            offset = config.get("offset")
+            length = config.get("len")
+            ret, val_list = self.devfile_read(loc, offset, length)
+            if ret is True:
+                if length == 1:
+                    val = val_list[0]
+                    return True, val
+                return True, val_list
+            return False, ("devfile read failed. path:%s, offset:0x%x, read_len:%d" % (loc, offset, length))
+        if way == "devfile_ascii":
+            loc = config.get("loc")
+            offset = config.get("offset")
+            length = config.get("len")
+            return self.devfile_read_ascii(loc, offset, length)
+        if way == 'cmd':
+            cmd = config.get("cmd")
+            ret, log = self.exec_os_cmd(cmd)
+            if ret:
+                return False, ("cmd write exec %s failed, log: %s" % (cmd, log))
+            return True, log
+        if way == 'config':
+            value = config.get("value")
+            return True, value
+        raise Exception("cannot found way deal")
+
+    def devfile_read(self, loc, offset, length):
+        return osutil.readdevfile(loc, offset, length)
+
+    def devfile_read_ascii(self, loc, offset, length):
+        return osutil.readdevfile_ascii(loc, offset, length)
+
+    def get_sysfs(self, loc, flock_path=None):
+        return self.getsysfs(loc, flock_path)
+
+    def getsysfs(self, loc, flock_path=None):
+        ret, val = osutil.readsysfs(loc, flock_path)
+        return ret, val
+
+    def get_devmem(self, addr, digit, mask):
+        return osutil.getdevmem(addr, digit, mask)
+
+    def get_i2cword(self, bus, addr, offset):
+        return self.geti2cword(bus, addr, offset)
+
+    def geti2cword(self, bus, addr, offset):
+        ret, val = osutil.geti2cword(bus, addr, offset)
+        return ret, val
+
+    def get_io(self, reg_addr, read_len):
+        return self.getio(reg_addr, read_len)
+
+    def getio(self, reg_addr, read_len):
+        ret, val = osutil.io_rd(reg_addr, read_len)
+        return ret, val
+
+    def get_i2c(self, bus, addr, offset):
+        return self.geti2c(bus, addr, offset)
+
+    def geti2c(self, bus, addr, offset):
+        ret, val = osutil.wbi2cget(bus, addr, offset)
+        return ret, val
+
+    def set_value(self, config, val):
+        '''
+            get value by config way
+            way  i2c/sysfs/lpc
+        '''
+        way = config.get("way")
+        if way == 'sysfs':
+            return self.set_sysfs(config.get("loc"), "0x%02x" % val)
+        if way == "i2c":
+            bus = config.get("bus")
+            addr = config.get("addr")
+            offset = config.get("offset")
+            return self.set_i2c(bus, addr, offset, val)
+        if way == "i2cpec":
+            bus = config.get("bus")
+            addr = config.get("addr")
+            offset = config.get("offset")
+            return self.seti2c_byte_pec(bus, addr, offset, val)
+        if way == 'i2cword':
+            bus = config.get("bus")
+            addr = config.get("addr")
+            offset = config.get("offset")
+            return self.set_i2cword(bus, addr, offset, val)
+        if way == "i2cwordpec":
+            bus = config.get("bus")
+            addr = config.get("addr")
+            offset = config.get("offset")
+            return self.set_i2cwordpec(bus, addr, offset, val)
+        if way == "devfile":
+            loc = config.get("loc")
+            offset = config.get("offset")
+            return self.devfile_write(loc, offset, val)
+        return False, "unsupport way: %s" % way
+
+    def set_sysfs(self, loc, value):
+        return self.setsysfs(loc, value)
+
+    def setsysfs(self, loc, value):
+        return osutil.writesysfs(loc, value)
+
+    def set_i2cword(self, bus, addr, offset, byte):
+        return self.seti2cword(bus, addr, offset, byte)
+
+    def seti2cword(self, bus, addr, offset, byte):
+        return osutil.seti2cword(bus, addr, offset, byte)
+
+    def set_i2cwordpec(self, bus, addr, offset, val):
+        return osutil.seti2cwordpec(bus, addr, offset, val)
+
+    def seti2c_byte_pec(self, bus, addr, offset, val):
+        return osutil.seti2c_byte_pec(bus, addr, offset, val)
+
+    def set_i2c(self, bus, addr, offset, byte):
+        return self.seti2c(bus, addr, offset, byte)
+
+    def seti2c(self, bus, addr, offset, byte):
+        ret, val = osutil.wbi2cset(bus, addr, offset, byte)
+        return ret, val
+
+    def devfile_write(self, loc, offset, val):
+        ret, val = osutil.writedevfile(loc, offset, val)
+        return ret, val
+
+    def getbcmtemp(self):
+        try:
+            sta, ret = osutil.getmactemp()
+            if sta is True:
+                mac_aver = float(ret.get("average", self.__error_ret))
+                mac_aver = mac_aver * 1000
+            else:
+                return False, ret
+        except AttributeError as e:
+            return False, str(e)
+        return True, mac_aver
+
+    def getbcmreg(self, reg):
+        ret, val = osutil.getsdkreg(reg)
+        return ret, val
+
+    def logger_debug(self, msg):
+        baseutil.logger_debug(msg)
+
+    def command(self, cmd):
+        ret, output = osutil.command(cmd)
+        return ret, output
+
+    def get_format_value(self, format_str):
+        ast_obj = ast.parse(format_str, mode='eval')
+        visitor = CodeVisitor()
+        visitor.visit(ast_obj)
+        ret = visitor.get_value()
+        return ret
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/fan.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/fan.py
new file mode 100644
index 000000000..5b33af025
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/fan.py
@@ -0,0 +1,417 @@
+#!/usr/bin/env python3
+#######################################################
+#
+# fan.py
+# Python implementation of the Class fan
+#
+#######################################################
+from eepromutil.fru import ipmifru
+from eepromutil.fantlv import fan_tlv
+from plat_hal.devicebase import devicebase
+from plat_hal.rotor import rotor
+
+
+class fan(devicebase):
+    __rotor_list = []
+    __pn = None
+    __raweeprom = None
+    __sn = None
+    __hw_version = None
+    __e2loc = None
+    __rotors = None
+    __AirFlow = None
+    __SpeedMin = None
+    __SpeedMax = None
+    __PowerMax = None
+    __productName = None
+    __productSerialNumber = None
+    __WatchdogStatus = None
+    __led_attrs_config = None
+    __led_config = None
+    __WatchdogStatus_config = None
+    __AirFlowconifg = None
+    __EnableWatchdogConf = None
+    __Rotor_config = None
+    __fan_display_name = None  # 'N/A'
+    __fan_display_name_conifg = None
+
+    def __init__(self, conf=None):
+        if conf is not None:
+            self.name = conf.get('name', None)
+            self.sn = conf.get('sn', None)
+            self.present = conf.get('present', None)
+            self.e2loc = conf.get('e2loc', None)
+            self.e2_type = conf.get('e2_type', "fru")
+            self.SpeedMin = conf.get('SpeedMin', None)
+            self.SpeedMax = conf.get('SpeedMax', None)
+            self.PowerMax = conf.get('PowerMax', None)
+            self.AirFlowconifg = conf.get("airflow", None)
+            self.WatchdogStatus_config = conf.get('WatchdogStatus', None)
+            self.EnableWatchdogConf = conf.get('EnableWatchdogConf', None)
+            self.led_attrs_config = conf.get('led_attrs', None)
+            self.led_config = conf.get('led', None)
+            self.Rotor_config = conf.get('Rotor', None)
+            self.fan_display_name_conifg = conf.get("fan_display_name", None)
+            rotor_tmp = []
+            for value in self.Rotor_config.values():
+                rotor_tmp.append(rotor(value))
+            rotor_tmp.sort(key=lambda x: x.name, reverse=False)
+            self.rotor_list = rotor_tmp
+            self.rotors = len(self.rotor_list)
+
+    @property
+    def EnableWatchdogConf(self):
+        return self.__EnableWatchdogConf
+
+    @EnableWatchdogConf.setter
+    def EnableWatchdogConf(self, val):
+        self.__EnableWatchdogConf = val
+
+    @property
+    def rotor_list(self):
+        return self.__rotor_list
+
+    @rotor_list.setter
+    def rotor_list(self, val):
+        self.__rotor_list = val
+
+    @property
+    def Rotor_config(self):
+        return self.__Rotor_config
+
+    @Rotor_config.setter
+    def Rotor_config(self, val):
+        self.__Rotor_config = val
+
+    @property
+    def productName(self):
+        return self.__productName
+
+    @productName.setter
+    def productName(self, val):
+        self.__productName = val
+
+    @property
+    def productSerialNumber(self):
+        return self.__productSerialNumber
+
+    @productSerialNumber.setter
+    def productSerialNumber(self, val):
+        self.__productSerialNumber = val
+
+    @property
+    def hw_version(self):
+        return self.__hw_version
+
+    @hw_version.setter
+    def hw_version(self, val):
+        self.__hw_version = val
+
+    @property
+    def sn(self):
+        return self.__sn
+
+    @sn.setter
+    def sn(self, val):
+        self.__sn = val
+
+    @property
+    def pn(self):
+        return self.__pn
+
+    @pn.setter
+    def pn(self, val):
+        self.__pn = val
+
+    @property
+    def raweeprom(self):
+        return self.__raweeprom
+
+    @raweeprom.setter
+    def raweeprom(self, val):
+        self.__raweeprom = val
+
+    @property
+    def SpeedMax(self):
+        return self.__SpeedMax
+
+    @SpeedMax.setter
+    def SpeedMax(self, val):
+        self.__SpeedMax = val
+
+    @property
+    def SpeedMin(self):
+        return self.__SpeedMin
+
+    @SpeedMin.setter
+    def SpeedMin(self, val):
+        self.__SpeedMin = val
+
+    @property
+    def PowerMax(self):
+        return self.__PowerMax
+
+    @PowerMax.setter
+    def PowerMax(self, val):
+        self.__PowerMax = val
+
+    @property
+    def rotors(self):
+        return self.__rotors
+
+    @property
+    def AirFlow(self):
+        return self.__AirFlow
+
+    @AirFlow.setter
+    def AirFlow(self, val):
+        self.__AirFlow = val
+
+    @rotors.setter
+    def rotors(self, val):
+        self.__rotors = val
+
+    @property
+    def fan_display_name_conifg(self):
+        return self.__fan_display_name_conifg
+
+    @fan_display_name_conifg.setter
+    def fan_display_name_conifg(self, val):
+        self.__fan_display_name_conifg = val
+
+    @property
+    def fan_display_name(self):
+        return self.__fan_display_name
+
+    @fan_display_name.setter
+    def fan_display_name(self, val):
+        self.__fan_display_name = val
+
+    def getspeed(self, conf):
+        tmp = None
+        if conf is None:
+            return -1
+        ret, val = self.get_value(conf)
+        if ret is True:
+            tmp = int(str(val), 10)
+        else:
+            val = None
+        if val is not None:
+            return int(15000000 / tmp)
+        return -1
+
+    def get_speed(self, rotor_index):
+        rotor_item = self.get_rotor_index(rotor_index)
+        if rotor_item is None:
+            return None
+        speed = rotor_item.rotor_Speed.Value
+        if speed is None:
+            return None
+        return int(speed)
+
+    def set_led(self, color):
+        status = self.led_attrs_config.get(color, None)
+        if status is None:
+            return False
+
+        mask = self.led_attrs_config.get('mask', 0xff)
+        ret, value = self.get_value(self.led_config)
+        if ret is False or value is None:
+            return False
+        setval = (int(value) & ~mask) | (status)
+        ret, val = self.set_value(self.led_config, setval)
+        return ret
+
+    def get_led(self):
+        mask = self.led_attrs_config.get('mask', 0xff)
+        ret, value = self.get_value(self.led_config)
+        if ret is False or value is None:
+            return False, 'N/A'
+        ledval = int(value) & mask
+        for key, val in self.led_attrs_config.items():
+            if (ledval == val) and (key != "mask"):
+                return True, key
+        return False, 'N/A'
+
+    def set_speed(self, rotor_index, level):
+        if level > 255 or level < 0:
+            return False
+        rotor_item = self.get_rotor_index(rotor_index)
+        if rotor_item is None:
+            return False
+        ret, val = self.set_value(rotor_item.Speedconfig, int(level))
+        return ret
+
+    def get_rotor_index(self, rotor_index):
+        if rotor_index > len(self.rotor_list):
+            return None
+        rotor_item = self.rotor_list[rotor_index - 1]
+        return rotor_item
+
+    def get_rotor_byname(self, rotor_index):
+        for rotor_item in self.rotor_list:
+            if rotor_item.name == rotor_index:
+                return rotor_item
+        return None
+
+    def get_presence(self):
+        ret, val = self.get_value(self.present)
+        if ret is False or val is None or val == "no_support":
+            return False
+        if isinstance(val, str):
+            value = int(val, 16)
+        else:
+            value = val
+        mask = self.present.get("mask")
+        flag = value & mask
+        okval = self.present.get("okval", 0)
+        if flag == okval:
+            return True
+        return False
+
+    def get_speed_pwm(self, rotor_index):
+        rotor_item = self.get_rotor_index(rotor_index)
+        if rotor_item is None:
+            return False
+        if rotor_item.i2c_speed is None:
+            return False
+        val = round(rotor_item.i2c_speed * 100 / 255)
+        return val
+
+    def feed_watchdog(self):
+        ret = False
+        for rotor_item in self.rotor_list:
+            ret, val = rotor_item.feed_watchdog()
+            if ret is False:
+                return ret
+        return ret
+
+    def get_fru_info(self):
+        try:
+            if self.get_presence() is False:
+                raise Exception("%s: not present" % self.name)
+            eeprom = self.get_eeprom_info(self.e2loc)
+            if eeprom is None:
+                raise Exception("%s: value is none" % self.name)
+            fru = ipmifru()
+            if isinstance(eeprom, bytes):
+                eeprom = self.byteTostr(eeprom)
+            fru.decodeBin(eeprom)
+            self.productName = fru.productInfoArea.productName.strip()  # PN
+            self.productSerialNumber = fru.productInfoArea.productSerialNumber.strip()  # SN
+            self.hw_version = fru.productInfoArea.productVersion.strip()  # HW
+        except Exception:
+            self.productName = None
+            self.productSerialNumber = None
+            self.hw_version = None
+            return False
+        return True
+
+    def get_tlv_info(self):
+        try:
+            if self.get_presence() is False:
+                raise Exception("%s: not present" % self.name)
+            eeprom = self.get_eeprom_info(self.e2loc)
+            if eeprom is None:
+                raise Exception("%s: value is none" % self.name)
+            tlv = fan_tlv()
+            rets = tlv.decode(eeprom)
+            for item in rets:
+                if item["name"] == "Product Name":
+                    self.productName = item["value"].replace("\x00", "").strip()
+                elif item["name"] == "serial Number":
+                    self.productSerialNumber = item["value"].replace("\x00", "").strip()
+                elif item["name"] == "hardware info":
+                    self.hw_version = item["value"].replace("\x00", "").strip()
+        except Exception:
+            self.productName = None
+            self.productSerialNumber = None
+            self.hw_version = None
+            return False
+        return True
+
+    def decode_eeprom_info(self):
+        '''get fan name, hw version, sn'''
+        if self.e2_type == "fru":
+            return self.get_fru_info()
+
+        if self.e2_type == "fantlv":
+            return self.get_tlv_info()
+
+        return False
+
+    def get_AirFlow(self):
+        if self.productName is None:
+            ret = self.decode_eeprom_info()
+            if ret is False:
+                self.AirFlow = None
+                return False
+        if self.AirFlowconifg is None:
+            self.AirFlow = None
+            return False
+        for i in self.AirFlowconifg:
+            if self.productName in self.AirFlowconifg[i]:
+                self.AirFlow = i
+                return True
+        self.AirFlow = None
+        return False
+
+    def enable_watchdog(self, enable):
+        ret = False
+        if enable is True:
+            byte = self.EnableWatchdogConf.get("enable_byte", None)
+            ret, val = self.set_value(self.EnableWatchdogConf, byte)
+        elif enable is False:
+            byte = self.EnableWatchdogConf.get("disable_byte", None)
+            ret, val = self.set_value(self.EnableWatchdogConf, byte)
+        return ret
+
+    def get_watchdog_status(self):
+        dic = {"support": None, "open": None, "work_full": None, "work_allow_set": None}
+        if self.WatchdogStatus_config is None:
+            return None
+        ret, val = self.get_value(self.WatchdogStatus_config)
+        if ret is False or val is None:
+            return None
+        support_watchdog_off = self.WatchdogStatus_config.get("support_watchdog_off", None)
+        is_open_off = self.WatchdogStatus_config.get("is_open_off", None)
+        full_running_off = self.WatchdogStatus_config.get("full_running_off", None)
+        running_setting_off = self.WatchdogStatus_config.get("running_setting_off", None)
+        if support_watchdog_off is not None:
+            if support_watchdog_off & val == self.WatchdogStatus_config.get("support_watchdog_mask", None):
+                dic["support"] = True
+            else:
+                dic["support"] = False
+                return dic
+        if is_open_off is not None:
+            if is_open_off & val == self.WatchdogStatus_config.get("is_open_mask", None):
+                dic["open"] = True
+            else:
+                dic["open"] = False
+        if full_running_off is not None:
+            if full_running_off & val == self.WatchdogStatus_config.get("full_running_mask", None):
+                dic["work_full"] = True
+            else:
+                dic["work_full"] = False
+        if running_setting_off is not None:
+            if running_setting_off & val == self.WatchdogStatus_config.get("running_setting_mask", None):
+                dic["work_allow_set"] = True
+            else:
+                dic["work_allow_set"] = False
+        return dic
+
+    def get_fan_display_name(self):
+        if self.productName is None:
+            ret = self.decode_eeprom_info()
+            if ret is False:
+                self.fan_display_name = None
+                return False
+        if self.fan_display_name_conifg is None:
+            self.fan_display_name = self.productName
+            return False
+        for i in self.fan_display_name_conifg:
+            if self.productName in self.fan_display_name_conifg[i]:
+                self.fan_display_name = i
+                return True
+        self.fan_display_name = self.productName
+        return False
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/interface.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/interface.py
new file mode 100644
index 000000000..88873a029
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/interface.py
@@ -0,0 +1,1339 @@
+#!/usr/bin/env python3
+#######################################################
+#
+# interface.py
+# Python implementation of the Class interface
+#
+#######################################################
+import collections
+from plat_hal.chassisbase import chassisbase
+from plat_hal.baseutil import baseutil
+from plat_hal.osutil import osutil
+
+
+def Singleton(cls):
+    _instance = {}
+
+    def _singleton(*args, **kargs):
+        if cls not in _instance:
+            _instance[cls] = cls(*args, **kargs)
+        return _instance[cls]
+
+    return _singleton
+
+
+@Singleton
+class interface(object):
+    __chas = None
+    __error_ret = None
+
+    def __init__(self):
+        self.chas = chassisbase()
+        self.__error_ret = -99999
+        self.__na_ret = 'N/A'
+
+    @property
+    def na_ret(self):
+        return self.__na_ret
+
+    @na_ret.setter
+    def na_ret(self, val):
+        self.__na_ret = val
+
+    @property
+    def error_ret(self):
+        return self.__error_ret
+
+    @error_ret.setter
+    def error_ret(self, val):
+        self.__error_ret = val
+
+    @property
+    def chas(self):
+        return self.__chas
+
+    @chas.setter
+    def chas(self, val):
+        self.__chas = val
+
+    # onie_e2
+    def get_onie_e2(self):
+        onie_e2_list = self.chas.onie_e2_list
+        return onie_e2_list
+
+    def get_onie_e2_path(self, name):
+        onie_e2 = self.chas.get_onie_e2_byname(name)
+        if onie_e2 is None:
+            return None
+        return onie_e2.e2_path
+
+    def get_device_airflow(self, name):
+        onie_e2 = self.chas.get_onie_e2_byname(name)
+        if onie_e2 is None:
+            return None
+        return onie_e2.airflow
+
+    def get_onie_e2_obj(self, name):
+        onie_e2 = self.chas.get_onie_e2_byname(name)
+        if onie_e2 is None:
+            return None
+        onie_e2.get_onie_e2_info()
+        return onie_e2
+
+    # temp
+    def get_temps(self):
+        templist = self.chas.temp_list
+        return templist
+
+    def get_temp_total_number(self):
+        templist = self.chas.temp_list
+        return len(templist)
+
+    def check_temp_id_exist(self, temp_id):
+        templist = self.chas.temp_list
+        for temp in templist:
+            if temp.temp_id == temp_id:
+                return True
+        return False
+
+    def get_temp_id_number(self):
+        templist = self.chas.temp_list
+        temp_num = 0
+        for i in range(len(templist)):
+            temp_id = "TEMP" + str(i + 1)
+            ret = self.check_temp_id_exist(temp_id)
+            if ret is True:
+                temp_num = temp_num + 1
+            else:
+                return temp_num
+        return temp_num
+
+    def get_temp_location(self, temp_name):
+        temp = self.chas.get_temp_byname(temp_name)
+        return temp.get_location()
+
+    def set_temp_location(self, temp_name, location):
+        temp = self.chas.get_temp_byname(temp_name)
+        return temp.set_location(location)
+
+    def set_temp_name(self, temp_name, name):
+        temp = self.chas.get_temp_byname(temp_name)
+        return temp.set_name(name)
+
+    def get_appoint_temp(self, temp_name):
+        temp = self.chas.get_led_byname(temp_name)
+        return temp.get_temp()
+
+    def set_appoint_temp(self, temp_name, val):
+        temp = self.chas.get_temp_byname(temp_name)
+        return temp.set_temp(val)
+
+    def get_temp_mintemp(self, temp_name):
+        temp = self.chas.get_temp_byname(temp_name)
+        return temp.get_mintemp()
+
+    def set_temp_mintemp(self, temp_name, val):
+        temp = self.chas.get_temp_byname(temp_name)
+        return temp.set_mintemp(val)
+
+    # led
+    def get_leds(self):
+        ledlist = self.chas.led_list
+        return ledlist
+
+    def get_led_total_number(self):
+        ledlist = self.chas.led_list
+        return len(ledlist)
+
+    def get_led_color(self, led_name):
+        led = self.chas.get_led_byname(led_name)
+        if led is None:
+            return -1
+        return led.get_color()
+
+    def get_led_color_by_type(self, led_type):
+        ledlist = self.chas.led_list
+        ledtmp = None
+        for temp in ledlist:
+            if temp.led_type == led_type:
+                ledtmp = temp
+                break
+        if ledtmp is None:
+            return -1
+        return ledtmp.get_color()
+
+    def set_led_color(self, led_name, color):
+        led = self.chas.get_led_byname(led_name)
+        if led is None:
+            return -1
+        return led.set_color(color)
+
+    # psu
+    def get_psu_total_number(self):
+        psulist = self.chas.psu_list
+        if psulist is None:
+            return -1
+        return len(psulist)
+
+    def get_psus(self):
+        psulist = self.chas.psu_list
+        return psulist
+
+    def get_psu_presence(self, psu_name):
+        psu = self.chas.get_psu_byname(psu_name)
+        if psu is None:
+            return -1
+        return psu.present
+
+    def get_psu_fru_info(self, psu_name):
+        '''
+                    {
+                    "Name": "PSU1",
+                    "SN": "serial_number_example",    # 'N/A'
+                    "PN": "part_number_example",      # 'N/A'
+                    "AirFlow": "B2F"                  # 'N/A'
+                }
+        '''
+        psu = self.chas.get_psu_byname(psu_name)
+        if psu is None:
+            return -1
+        psu.get_fru_info()
+        psu.get_AirFlow()
+        psu.get_psu_display_name()
+
+        dic = collections.OrderedDict()
+        dic["Name"] = psu.name
+        dic["SN"] = psu.productSerialNumber if (psu.productSerialNumber is not None) else self.na_ret
+        dic["PN"] = psu.productPartModelName if (psu.productPartModelName is not None) else self.na_ret
+        dic["DisplayName"] = psu.psu_display_name if (psu.psu_display_name is not None) else self.na_ret
+        dic["VENDOR"] = psu.productManufacturer if (psu.productManufacturer is not None) else self.na_ret
+        dic["HW"] = psu.productVersion if (psu.productVersion is not None) else self.na_ret
+        dic["AirFlow"] = psu.AirFlow if (psu.AirFlow is not None) else self.na_ret
+        return dic
+
+    def get_psu_input_output_status(self, psu_name):
+        psu = self.chas.get_psu_byname(psu_name)
+        if psu is None:
+            return -1
+        psu.InputsCurrent.Value  # just for clear faults
+        if psu.InputStatus is True and psu.OutputStatus is True:
+            return True
+        # only has outputstatus
+        if psu.InputStatus is None and psu.OutputStatus is True:
+            return True
+        return False
+
+    def get_psu_status(self, psu_name):
+        """
+        Get status of a specific PSU
+        @return dict of the specific PSU's status, None for failure
+                Example return value(all keys are mandatory)
+                {
+                    "Name": "PSU1",
+                    "InputType": "DC",    # "AC" or 'N/A'
+                    "InputStatus": True,  # H/W status bit
+                    "OutputStatus": True  # H/W status bit
+                    "FanSpeed": {
+                        "Value": 4000,    # -99999
+                        "Min": 2000,      # -99999
+                        "Max": 10000      # -99999
+                    },
+                    "Temperature": {
+                        "Value": 40.0,    # -99999.0
+                        "Min": -30.0,     # -99999.0
+                        "Max": 50.0       # -99999.0
+                    }
+                }
+        """
+        psu = self.chas.get_psu_byname(psu_name)
+        if psu is None:
+            return -1
+
+        if psu.get_threshold_by_model == 1:
+            psu.get_fru_info()
+
+        dic = collections.OrderedDict()
+        # psu.get_Temperature()
+        temp_dict = collections.OrderedDict()
+        temp_dict['Min'] = psu.Temperature.Min
+        temp_dict['Max'] = psu.Temperature.Max
+        temp_dict['Value'] = psu.Temperature.Value
+        temp_dict['Unit'] = psu.Temperature.Unit
+        dic["Temperature"] = temp_dict
+
+        # psu.get_FanSpeed()
+        fan_speed_dict = collections.OrderedDict()
+        fan_speed_dict['Min'] = psu.FanSpeed.Min
+        fan_speed_dict['Max'] = psu.FanSpeed.Max
+        fan_speed_dict['Tolerance'] = psu.FanSpeedTolerance
+        fan_speed_dict['Value'] = psu.FanSpeed.Value
+        fan_speed_dict['Unit'] = psu.FanSpeed.Unit
+        dic["FanSpeed"] = fan_speed_dict
+
+        dic["Name"] = psu.name
+        dic["InputType"] = psu.InputsType
+        dic["InputStatus"] = psu.InputStatus
+        dic["OutputStatus"] = psu.OutputStatus
+        dic["TempStatus"] = psu.TempStatus
+        dic["FanStatus"] = psu.FanStatus
+        return dic
+
+    def get_psu_power_status(self, psu_name):
+        """
+        Get power status of a specific PSU
+        @return dict of the specific PSU's power status, None for failure
+                Example return value
+                {
+                    "Name": "PSU1",
+                    "Inputs": {
+                        "Status": True, # H/W status bit
+                        "Type": "DC",   # or "AC" or "N/A"
+                        "Voltage": {
+                            "Value": 220,       # -1
+                            "LowAlarm": 200,    # -1
+                            "HighAlarm": 240,   # -1
+                            "Unit": "V"
+                        },
+                        "Current": {
+                            "Value": 6.0,       # -99999.0
+                            "LowAlarm": 0.2,    # -99999.0
+                            "HighAlarm": 7.0,   # -99999.0
+                            "Unit": "A"
+                        },
+                        "Power": {
+                            "Value": 1000,      # -99999
+                            "LowAlarm": -1,     # -99999
+                            "HighAlarm": 1400,  # -99999
+                            "Unit": "W"
+                       }
+                    },
+                    "Outputs": {
+                        "Status": True,
+                        "Voltage": {
+                            "Value": 220,
+                            "LowAlarm": 200,
+                            "HighAlarm": 240,
+                            "Unit": "V"
+                        },
+                        "Current": {
+                            "Value": 6.0,
+                            "LowAlarm": 0.2,
+                            "HighAlarm": 7.0,
+                            "Unit": "A"
+                        },
+                        "Power": {
+                            "Value": 1000,
+                            "LowAlarm": -1,  # Don't care
+                            "HighAlarm": 1400,
+                            "Unit": "W"
+                        }
+                    }
+                }
+        """
+        psu = self.chas.get_psu_byname(psu_name)
+        if psu is None:
+            return -1
+        if psu.get_threshold_by_model == 1:
+            psu.get_fru_info()
+        dic = collections.OrderedDict()
+        inputdic = collections.OrderedDict()
+        Outputsdic = collections.OrderedDict()
+        dic["Name"] = psu.name
+        inputdic["Status"] = psu.InputStatus
+        inputdic["Type"] = psu.InputsType
+
+        # psu.get_InputsVoltage()
+        inputdic_voltage = collections.OrderedDict()
+
+        inputdic_voltage["Value"] = psu.InputsVoltage.Value
+        inputdic_voltage["LowAlarm"] = psu.InputsVoltage.Min
+        inputdic_voltage["HighAlarm"] = psu.InputsVoltage.Max
+        inputdic_voltage["Unit"] = psu.InputsVoltage.Unit
+
+        inputdic["Voltage"] = inputdic_voltage
+        inputdic_current = collections.OrderedDict()
+        inputdic_current["Value"] = psu.InputsCurrent.Value
+        inputdic_current["LowAlarm"] = psu.InputsCurrent.Min
+        inputdic_current["HighAlarm"] = psu.InputsCurrent.Max
+        inputdic_current["Unit"] = psu.InputsCurrent.Unit
+        inputdic["Current"] = inputdic_current
+
+        inputdic_power = collections.OrderedDict()
+        inputdic_power["Value"] = psu.InputsPower.Value
+        inputdic_power["LowAlarm"] = psu.InputsPower.Min
+        inputdic_power["HighAlarm"] = psu.InputsPower.Max
+        inputdic_power["Unit"] = psu.InputsPower.Unit
+        inputdic["Power"] = inputdic_power
+        Outputsdic["Status"] = psu.InputStatus
+
+        outputdic_voltage = collections.OrderedDict()
+        outputdic_current = collections.OrderedDict()
+        outputdic_power = collections.OrderedDict()
+
+        outputdic_voltage["Value"] = psu.OutputsVoltage.Value
+        outputdic_voltage["LowAlarm"] = psu.OutputsVoltage.Min
+        outputdic_voltage["HighAlarm"] = psu.OutputsVoltage.Max
+        outputdic_voltage["Unit"] = psu.OutputsVoltage.Unit
+
+        outputdic_current["Value"] = psu.OutputsCurrent.Value
+        outputdic_current["LowAlarm"] = psu.OutputsCurrent.Min
+        outputdic_current["HighAlarm"] = psu.OutputsCurrent.Max
+        outputdic_current["Unit"] = psu.OutputsCurrent.Unit
+
+        outputdic_power["Value"] = psu.OutputsPower.Value
+        outputdic_power["LowAlarm"] = psu.OutputsPower.Min
+        outputdic_power["HighAlarm"] = psu.OutputsPower.Max
+        outputdic_power["Unit"] = psu.OutputsPower.Unit
+
+        Outputsdic["Voltage"] = outputdic_voltage
+        Outputsdic["Current"] = outputdic_current
+        Outputsdic["Power"] = outputdic_power
+
+        dic["Inputs"] = inputdic
+        dic["Outputs"] = Outputsdic
+
+        return dic
+
+    def set_psu_fan_speed_pwm(self, psu_name, pwm):
+        psu = self.chas.get_psu_byname(psu_name)
+        if psu is None:
+            return -1
+        return psu.set_fan_speed_pwm(pwm)
+
+    def get_psu_fan_speed_pwm(self, psu_name):
+        psu = self.chas.get_psu_byname(psu_name)
+        if psu is None:
+            return -1
+        return psu.get_fan_speed_pwm()
+
+    def get_psu_info_all(self):
+        """
+                        {
+                    "Number": 2,
+                    "PSU1": {
+                        "SN": "serial_number_example",  # 'N/A'
+                        "PN": "part_number_example",    # 'N/A'
+                        "AirFlow": "intake",            # 'N/A'
+
+                        "FanSpeed": {
+                            "Value": 4000,
+                            "Min": 2000,
+                            "Max": 30000
+                        },
+                        "Temperature": {
+                            "Value": 35.0,
+                            "Min": -20.0,
+                            "Max": 45.0
+                        },
+                        "Inputs": {
+                            "Status": True, # H/W status bit
+                            "Type": "DC",   # or "AC"
+                            "Voltage": {
+                                "Value": 220,
+                                "LowAlarm": 200,
+                                "HighAlarm": 240,
+                                "Unit": "V"
+                            },
+                            "Current": {
+                                "Value": 6.0,
+                                "LowAlarm": 0.2,
+                                "HighAlarm": 7.0,
+                                "Unit": "A"
+                            },
+                            "Power": {
+                                "Value": 1000,
+                                "LowAlarm": -1,
+                                "HighAlarm": 1400,
+                                "Unit": "W"
+                           }
+                        },
+                        "Outputs": {
+                            "Status": True,
+                            "Voltage": {
+                                "Value": 220,
+                                "LowAlarm": 200,
+                                "HighAlarm": 240,
+                                "Unit": "V"
+                            },
+                            "Current": {
+                                "Value": 6.0,
+                                "LowAlarm": 0.2,
+                                "HighAlarm": 7.0,
+                                "Unit": "A"
+                            },
+                            "Power": {
+                                "Value": 1000,
+                                "LowAlarm": -1,  # Don't care
+                                "HighAlarm": 1400,
+                                "Unit": "W"
+                            }
+                        }
+                    }
+                }
+        """
+
+        psus = self.get_psus()
+        psu_dict = collections.OrderedDict()
+        psu_dict['Number'] = len(psus)
+        for psu in psus:
+            dicttmp = self.get_psu_fru_info(psu.name)
+            dicttmp.update(self.get_psu_status(psu.name))
+            dicttmp.update(self.get_psu_power_status(psu.name))
+            if self.get_psu_presence(psu.name) is True:
+                dicttmp['Present'] = 'yes'
+            else:
+                dicttmp['Present'] = 'no'
+            psu_dict[psu.name] = dicttmp
+        return psu_dict
+
+    def get_fans(self):
+        fanlist = self.chas.fan_list
+        return fanlist
+
+    # fan
+    def get_fan_total_number(self):
+        fanlist = self.chas.fan_list
+        if fanlist is None:
+            return -1
+        return len(fanlist)
+
+    def get_fan_rotor_number(self, fan_name):
+        fan = self.chas.get_fan_byname(fan_name)
+        if fan is None:
+            return -1
+        ret = fan.rotors
+        if ret is None:
+            return -1
+        return ret
+
+    def get_fan_speed(self, fan_name, rotor_index):
+        fan = self.chas.get_fan_byname(fan_name)
+        if fan is None:
+            return -1
+        ret = fan.get_speed(rotor_index)
+        if ret is None:
+            return -1
+        return ret
+
+    def fan_speed_set_level(self, fan_name, rotor_index, level):
+        fan = self.chas.get_fan_byname(fan_name)
+        if fan is None:
+            return -1
+        ret = fan.set_speed(rotor_index, level)
+        if ret is True:
+            return 0
+        return -1
+
+    def get_fan_speed_pwm(self, fan_name, rotor_index):
+        fan = self.chas.get_fan_byname(fan_name)
+        if fan is None:
+            return -1
+        val = fan.get_speed_pwm(rotor_index)
+        if val is False:
+            return -1
+        return val
+
+    def set_fan_speed_pwm(self, fan_name, rotor_index, pwm):
+        fan = self.chas.get_fan_byname(fan_name)
+        if fan is None:
+            return -1
+        if isinstance(pwm, str):
+            rate = float(pwm.strip('%s'))
+            speed = round(rate * 255 / 100)
+        elif isinstance(pwm, int):
+            speed = round(pwm * 255 / 100)
+        elif isinstance(pwm, float):
+            speed = round(pwm * 255 / 100)
+        else:
+            return -1
+        ret = self.fan_speed_set_level(fan.name, rotor_index, speed)
+        if ret == 0:
+            return 0
+        return -1
+
+    def get_fan_watchdog_status(self):
+        fan = self.chas.fan_list[0]
+        dic = fan.get_watchdog_status()
+        if dic is None or dic["support"] is False:
+            return self.na_ret
+        if dic["open"] is False or dic["work_allow_set"] is True:
+            return "Normal"
+        if dic["work_full"] is True:
+            return "Abnormal"
+        return "Abnormal"
+
+    def enable_fan_watchdog(self, enable=True):
+        fan = self.chas.fan_list[0]
+        ret = fan.enable_watchdog(enable)
+        if ret is True:
+            return 0
+        return -1
+
+    def feed_fan_watchdog(self):
+        fan_list = self.chas.fan_list
+        if fan_list is None:
+            return -1
+        for fan in fan_list:
+            ret = fan.feed_watchdog()
+            if ret is False:
+                return -1
+        return 0
+
+    def set_fan_led(self, fan_name, color):
+        fan = self.chas.get_fan_byname(fan_name)
+        if fan is None:
+            return -1
+        ret = fan.set_led(color)
+        if ret is True:
+            return 0
+        return -1
+
+    def get_fan_led(self, fan_name):
+        fan = self.chas.get_fan_byname(fan_name)
+        if fan is None:
+            return False, 'N/A'
+        return fan.get_led()
+
+    def get_fan_presence(self, fan_name):
+        fan = self.chas.get_fan_byname(fan_name)
+        if fan is None:
+            return -1
+        return fan.get_presence()
+
+    def get_fan_fru_info(self, fan_name):
+        """
+        Get specific fan's information
+                    # Properties
+                    "Name": "FAN1",
+                    "SN": "serial_number_example",  # 'N/A'
+                    "PN": "part_number_exampple",   # 'N/A'
+                    "Rotors": 2,                    # -1
+                    "AirFlow": "intake",            # 'N/A'
+                    "SpeedMin": 2000,               # -1
+                    "SpeedMax": 30000               # -1
+        """
+        fan = self.chas.get_fan_byname(fan_name)
+        fan.decode_eeprom_info()
+        fan.get_AirFlow()
+        fan.get_fan_display_name()
+
+        dic = collections.OrderedDict()
+        dic["Name"] = fan.name
+        dic["SN"] = fan.productSerialNumber
+        if dic["SN"] is None:
+            dic["SN"] = self.na_ret
+        dic["PN"] = fan.productName
+        if dic["PN"] is None:
+            dic["PN"] = self.na_ret
+        dic["DisplayName"] = fan.fan_display_name
+        if dic["DisplayName"] is None:
+            dic["DisplayName"] = self.na_ret
+
+        dic["Rotors"] = fan.rotors
+        dic["AirFlow"] = fan.AirFlow
+        if dic["AirFlow"] is None:
+            dic["AirFlow"] = self.na_ret
+        dic["SpeedMin"] = fan.SpeedMin
+        dic["SpeedMax"] = fan.SpeedMax
+        return dic
+
+    def get_fan_eeprom_info(self, fan_name):
+        """
+        Get specific fan's information
+                    # Properties
+                    "Name": "M6510-FAN-F",          # 'N/A'
+                    "SN": "serial_number_example",  # 'N/A'
+                    "HW": "hw_version_exampple",    # 'N/A'
+        """
+        fan = self.chas.get_fan_byname(fan_name)
+        fan.decode_eeprom_info()
+        fan.get_fan_display_name()
+        dic = collections.OrderedDict()
+        dic["NAME"] = fan.productName
+        if dic["NAME"] is None:
+            dic["NAME"] = self.na_ret
+        dic["SN"] = fan.productSerialNumber
+        if dic["SN"] is None:
+            dic["SN"] = self.na_ret
+        dic["HW"] = fan.hw_version
+        if dic["HW"] is None:
+            dic["HW"] = self.na_ret
+        dic["DisplayName"] = fan.fan_display_name
+        if dic["DisplayName"] is None:
+            dic["DisplayName"] = self.na_ret
+        return dic
+
+    def get_product_fullname(self):
+        return baseutil.get_product_fullname()
+
+    def get_fan_status(self, fan_name):
+        fan = self.chas.get_fan_byname(fan_name)
+        if fan is None:
+            return -1
+        rotorlist = fan.rotor_list
+        dic = collections.OrderedDict()
+        for rotor in rotorlist:
+            dic_val = collections.OrderedDict()
+            if rotor.rotor_Running is True:
+                dic_val['Running'] = 'yes'
+            else:
+                dic_val['Running'] = 'no'
+            if rotor.rotor_HwAlarm is True:
+                dic_val['HwAlarm'] = 'yes'
+            else:
+                dic_val['HwAlarm'] = 'no'
+            dic_val['Speed'] = int(rotor.rotor_Speed.Value)
+            dic[rotor.name] = dic_val
+        return dic
+
+    def get_fan_rotor_status(self, fan_name, rotor_name):
+        fan = self.chas.get_fan_byname(fan_name)
+        if fan is None:
+            return -1
+        rotorlist = fan.rotor_list
+        for rotor in rotorlist:
+            if rotor_name == rotor.name:
+                if rotor.rotor_Running is True:
+                    return True
+                return False
+        return -1
+
+    def get_fan_roll_status(self, fan_name, rotor_index):
+        fan = self.chas.get_fan_byname(fan_name)
+        if fan is None:
+            return -1
+        rotor = fan.get_rotor_index(rotor_index)
+        if rotor is None:
+            return -1
+        if rotor.rotor_Running is True:
+            return True
+        return False
+
+    def get_fan_info_fru(self, fan_name):
+        fan = self.chas.get_fan_byname(fan_name)
+        fan.get_fru_info()
+        fan.get_AirFlow()
+        dic = collections.OrderedDict()
+        dic["Name"] = fan.name
+        dic["SN"] = fan.productSerialNumber
+        if dic["SN"] is None:
+            dic["SN"] = self.na_ret
+        dic["PN"] = fan.productPartModelName
+        if dic["PN"] is None:
+            dic["PN"] = self.na_ret
+        flag = self.get_fan_presence(fan_name)
+        if flag is True:
+            dic["Present"] = "yes"
+        elif flag is False:
+            dic["Present"] = "no"
+        else:
+            dic["Present"] = self.na_ret
+        dic["Rotors"] = fan.rotors
+        dic["AirFlow"] = fan.AirFlow
+        if dic["AirFlow"] is None:
+            dic["AirFlow"] = self.na_ret
+        return dic
+
+    # support TLV and FRU FAN E2
+    def get_fan_info(self, fan_name):
+        fan = self.chas.get_fan_byname(fan_name)
+        if fan is None:
+            return None
+        fan.get_AirFlow()
+        dic = self.get_fan_eeprom_info(fan_name)
+        flag = self.get_fan_presence(fan_name)
+        if flag is True:
+            dic["Present"] = "yes"
+        elif flag is False:
+            dic["Present"] = "no"
+        else:
+            dic["Present"] = self.na_ret
+        dic["Rotors"] = fan.rotors
+        dic["AirFlow"] = fan.AirFlow
+        if dic["AirFlow"] is None:
+            dic["AirFlow"] = self.na_ret
+        dic["PowerMax"] = fan.PowerMax
+        if dic["PowerMax"] is None:
+            dic["PowerMax"] = self.na_ret
+        return dic
+
+    def get_fan_info_rotor(self, fan_name):
+        fan = self.chas.get_fan_byname(fan_name)
+        if fan is None:
+            return -1
+        rotorlist = fan.rotor_list
+        dic = collections.OrderedDict()
+        for rotor in rotorlist:
+            dic_val = collections.OrderedDict()
+            if rotor.rotor_Running is True:
+                dic_val['Running'] = 'yes'
+            else:
+                dic_val['Running'] = 'no'
+            if rotor.rotor_HwAlarm is True:
+                dic_val['HwAlarm'] = 'yes'
+            else:
+                dic_val['HwAlarm'] = 'no'
+            speed_value = rotor.rotor_Speed.Value
+            if speed_value is None:
+                dic_val['Speed'] = self.error_ret
+            else:
+                dic_val['Speed'] = int(speed_value)
+            if rotor.SpeedMin is None:
+                dic_val['SpeedMin'] = self.error_ret
+            else:
+                dic_val['SpeedMin'] = rotor.SpeedMin
+            if rotor.SpeedMax is None:
+                dic_val['SpeedMax'] = self.error_ret
+            else:
+                dic_val['SpeedMax'] = rotor.SpeedMax
+            if rotor.Tolerance is None:
+                dic_val['Tolerance'] = self.error_ret
+            else:
+                dic_val['Tolerance'] = rotor.Tolerance
+
+            dic[rotor.name] = dic_val
+        return dic
+
+    def get_fan_info_all(self):
+        fanlist = self.chas.fan_list
+        dic = collections.OrderedDict()
+        dic['Number'] = len(fanlist)
+        dic['WatchdogStatus'] = self.get_fan_watchdog_status()
+        for fan in fanlist:
+            dic[fan.name] = self.get_fan_info(fan.name)
+            dic[fan.name].update(self.get_fan_info_rotor(fan.name))
+        return dic
+
+    def temp_test(self):
+        templist = self.chas.temp_list
+        dicret = collections.OrderedDict()
+
+        for temp in templist:
+            dic = collections.OrderedDict()
+            temp_value = temp.Value
+            dic["Value"] = temp_value if (temp_value is not None) else self.error_ret
+            dic["LowAlarm"] = temp.Min
+            dic["HighAlarm"] = temp.Max
+            dicret[temp.name] = dic
+        return dicret
+
+    # dcdc
+    def get_dcdc_total_number(self):
+        dcdclist = self.chas.dcdc_list
+        if dcdclist is None:
+            return -1
+        return len(dcdclist)
+
+    def get_dcdc_by_id(self, dcdc_id):
+        dcdclist = self.chas.dcdc_list
+        dcdctmp = None
+        for dcdc in dcdclist:
+            if dcdc.dcdc_id == dcdc_id:
+                dcdctmp = dcdc
+        dic = collections.OrderedDict()
+        if dcdctmp is None:
+            dic["Name"] = self.error_ret
+            dic["Min"] = self.error_ret
+            dic["Max"] = self.error_ret
+            dic["Low"] = self.error_ret
+            dic["High"] = self.error_ret
+            dic["Value"] = self.error_ret
+            dic["Unit"] = self.error_ret
+        else:
+            dic["Name"] = dcdctmp.name
+            dic["Min"] = dcdctmp.sensor.Min
+            dic["Max"] = dcdctmp.sensor.Max
+            dic["Low"] = dcdctmp.sensor.Low
+            dic["High"] = dcdctmp.sensor.High
+            tmp = dcdctmp.sensor.Value
+            if tmp is not None:
+                dic['Value'] = tmp
+            else:
+                dic['Value'] = self.error_ret
+            dic["Unit"] = dcdctmp.sensor.Unit
+        return dic
+
+    def get_dcdc_all_info(self):
+        val_list = collections.OrderedDict()
+        dcdclist = self.chas.dcdc_list
+        for dcdc in dcdclist:
+            dicttmp = {}
+            sensorname = "%s" % (dcdc.name)
+            dicttmp['Min'] = dcdc.sensor.Min
+            dicttmp['Max'] = dcdc.sensor.Max
+            tmp = dcdc.sensor.Value
+            if tmp is not None:
+                dicttmp['Value'] = tmp
+                if tmp > dicttmp['Max'] or tmp < dicttmp['Min']:
+                    dicttmp["Status"] = "NOT OK"
+                else:
+                    dicttmp["Status"] = "OK"
+            else:
+                dicttmp['Value'] = self.error_ret
+                dicttmp["Status"] = "NOT OK"
+            dicttmp['Unit'] = dcdc.sensor.Unit
+            val_list[sensorname] = dicttmp
+        return val_list
+
+    # sensors
+    def get_monitor_temp(self, name):
+        templist = self.chas.temp_list
+        temptmp = None
+        for temp in templist:
+            if temp.name == name:
+                temptmp = temp
+
+        dic = collections.OrderedDict()
+        if temptmp is None:
+            dic["Min"] = self.error_ret
+            dic["Max"] = self.error_ret
+            dic["Value"] = self.error_ret
+            dic["Unit"] = self.error_ret
+        else:
+            dic["Min"] = temptmp.Min
+            dic["Max"] = temptmp.Max
+            temp_value = temptmp.Value
+            dic["Value"] = temp_value if (temp_value is not None) else self.error_ret
+            dic["Unit"] = temptmp.Unit
+        return dic
+
+    def get_monitor_temp_by_id(self, temp_id):
+        templist = self.chas.temp_list
+        temptmp = None
+        for temp in templist:
+            if temp.temp_id == temp_id:
+                temptmp = temp
+
+        dic = collections.OrderedDict()
+        if temptmp is None:
+            dic["Name"] = self.error_ret
+            dic["Api_name"] = self.error_ret
+            dic["Min"] = self.error_ret
+            dic["Max"] = self.error_ret
+            dic["Low"] = self.error_ret
+            dic["High"] = self.error_ret
+            dic["Value"] = self.error_ret
+            dic["Unit"] = self.error_ret
+        else:
+            dic["Name"] = temptmp.name
+            dic["Api_name"] = temptmp.api_name
+            dic["Min"] = temptmp.Min
+            dic["Max"] = temptmp.Max
+            dic["Low"] = temptmp.Low
+            dic["High"] = temptmp.High
+            temp_value = temptmp.Value
+            dic["Value"] = temp_value if (temp_value is not None) else self.error_ret
+            dic["Unit"] = temptmp.Unit
+        return dic
+
+    def get_temp_info(self):
+        val_list = collections.OrderedDict()
+        # temp
+        templist = self.chas.temp_list
+        for temp in templist:
+            dic = collections.OrderedDict()
+            dic["Min"] = temp.Min
+            dic["Max"] = temp.Max
+            dic["Low"] = temp.Low
+            dic["High"] = temp.High
+            temp_value = temp.Value
+            dic["Value"] = temp_value if (temp_value is not None) else self.error_ret
+            dic["Unit"] = temp.Unit
+            val_list[temp.name] = dic
+        return val_list
+
+    def get_sensor_info(self):
+        val_list = collections.OrderedDict()
+        # temp
+        templist = self.chas.temp_list
+        for temp in templist:
+            dic = collections.OrderedDict()
+            dic["Min"] = temp.Min
+            dic["Max"] = temp.Max
+            dic["Low"] = temp.Low
+            dic["High"] = temp.High
+            temp_value = temp.Value
+            dic["Value"] = temp_value if (temp_value is not None) else self.error_ret
+            dic["Unit"] = temp.Unit
+            val_list[temp.name] = dic
+        # fan
+        fanlist = self.chas.fan_list
+        for fan in fanlist:
+            for rotor in fan.rotor_list:
+                sensorname = "%s%s" % (fan.name, rotor.name)
+                speed = collections.OrderedDict()
+                speed['Min'] = rotor.rotor_Speed.Min
+                speed['Max'] = rotor.rotor_Speed.Max
+                rotor_speed_Value = rotor.rotor_Speed.Value
+                speed['Value'] = rotor_speed_Value if (rotor_speed_Value is not None) else self.error_ret
+                speed['Unit'] = rotor.rotor_Speed.Unit
+                val_list[sensorname] = speed
+
+        val_list.update(self.get_dcdc_all_info())
+
+        # psu
+        psulist = self.chas.psu_list
+        for psu in psulist:
+            inputdic_voltage = collections.OrderedDict()
+            inputdic_current = collections.OrderedDict()
+            inputdic_power = collections.OrderedDict()
+            outputdic_voltage = collections.OrderedDict()
+            outputdic_current = collections.OrderedDict()
+            outputdic_power = collections.OrderedDict()
+            temperature = collections.OrderedDict()
+            fanspeed = collections.OrderedDict()
+
+            psu_temp_value = psu.Temperature.Value
+            temperature["Value"] = psu_temp_value if (psu_temp_value is not None) else self.error_ret
+            temperature["Min"] = psu.Temperature.Min
+            temperature["Max"] = psu.Temperature.Max
+            temperature["Unit"] = psu.Temperature.Unit
+
+            fanspeed["Value"] = psu.FanSpeed.Value
+            fanspeed["Min"] = psu.FanSpeed.Min
+            fanspeed["Max"] = psu.FanSpeed.Max
+            fanspeed["Unit"] = psu.FanSpeed.Unit
+
+            psu_inputvoltage_value = psu.InputsVoltage.Value
+            inputdic_voltage["Value"] = psu_inputvoltage_value if (
+                psu_inputvoltage_value is not None) else self.error_ret
+            inputdic_voltage["Min"] = psu.InputsVoltage.Min
+            inputdic_voltage["Max"] = psu.InputsVoltage.Max
+            inputdic_voltage["Unit"] = psu.InputsVoltage.Unit
+
+            psu_inputcurrent_value = psu.InputsCurrent.Value
+            inputdic_current["Value"] = psu_inputcurrent_value if (
+                psu_inputcurrent_value is not None) else self.error_ret
+            inputdic_current["Min"] = psu.InputsCurrent.Min
+            inputdic_current["Max"] = psu.InputsCurrent.Max
+            inputdic_current["Unit"] = psu.InputsCurrent.Unit
+
+            psu_inputpower_value = psu.InputsPower.Value
+            inputdic_power["Value"] = psu_inputpower_value if (psu_inputpower_value is not None) else self.error_ret
+            inputdic_power["Min"] = psu.InputsPower.Min
+            inputdic_power["Max"] = psu.InputsPower.Max
+            inputdic_power["Unit"] = psu.InputsPower.Unit
+
+            psu_outputvoltage_value = psu.OutputsVoltage.Value
+            outputdic_voltage["Value"] = psu_outputvoltage_value if (
+                psu_outputvoltage_value is not None) else self.error_ret
+            outputdic_voltage["Min"] = psu.OutputsVoltage.Min
+            outputdic_voltage["Max"] = psu.OutputsVoltage.Max
+            outputdic_voltage["Unit"] = psu.OutputsVoltage.Unit
+
+            psu_outputcurrent_value = psu.OutputsCurrent.Value
+            outputdic_current["Value"] = psu_outputcurrent_value if (
+                psu_outputcurrent_value is not None) else self.error_ret
+            outputdic_current["Min"] = psu.OutputsCurrent.Min
+            outputdic_current["Max"] = psu.OutputsCurrent.Max
+            outputdic_current["Unit"] = psu.OutputsCurrent.Unit
+
+            psu_outputpower_value = psu.OutputsPower.Value
+            outputdic_power["Value"] = psu_outputpower_value if (
+                psu_outputpower_value is not None) else self.error_ret
+            outputdic_power["Min"] = psu.OutputsPower.Min
+            outputdic_power["Max"] = psu.OutputsPower.Max
+            outputdic_power["Unit"] = psu.OutputsPower.Unit
+
+            val_list["%s%s" % (psu.name, "Vol_I")] = inputdic_voltage
+            val_list["%s%s" % (psu.name, "Curr_I")] = inputdic_current
+            val_list["%s%s" % (psu.name, "Power_I")] = inputdic_power
+            val_list["%s%s" % (psu.name, "Vol_O")] = outputdic_voltage
+            val_list["%s%s" % (psu.name, "Curr_O")] = outputdic_current
+            val_list["%s%s" % (psu.name, "Power_O")] = outputdic_power
+            val_list["%s%s" % (psu.name, "Fan")] = fanspeed
+            val_list["%s%s" % (psu.name, "Temp")] = temperature
+
+        return val_list
+
+    # cpld
+    def get_cpld_total_number(self):
+        cpldlist = self.chas.cpld_list
+        return len(cpldlist)
+
+    def get_cpld_user_reg(self):
+        cpld = self.chas.get_cpld_byname("BASE_CPLD")
+        if cpld is None:
+            return None
+        return cpld.get_user_reg()
+
+    def set_cpld_user_reg(self, value):
+        if isinstance(value, int) is False:
+            baseutil.logger_debug("value must int %s" % type(value))
+            return -1
+        if (int(value) < 0 or int(value) > 255):
+            baseutil.logger_debug("value must [0 - 255]")
+            return -1
+        cpld = self.chas.get_cpld_byname("BASE_CPLD")
+        if cpld is None:
+            baseutil.logger_debug("name BASE_CPLD not find")
+            return -1
+        if cpld.set_user_reg(value) is True:
+            return 0
+        return -1
+
+    def set_cpld_console_owner(self, owner):
+        """
+        Set console I/O owner
+
+        @param owner I/O owner of the console, either "cpu" or "bmc"
+
+        @return 0 for success, -1 for failure
+        """
+        if owner is None:
+            baseutil.logger_debug("owner is None")
+            return -1
+        owner_tuple = ("cpu", "bmc")
+        if owner not in owner_tuple:
+            baseutil.logger_debug("owner is %s, must cpu or bmc" % owner)
+            return -1
+        cpld = self.chas.get_cpld_byname("BASE_CPLD")
+        if cpld is None:
+            baseutil.logger_debug("name BASE_CPLD not find")
+            return -1
+        if cpld.set_console_owner(owner) is True:
+            return 0
+        return -1
+
+    def get_cpld_version_by_id(self, cpld_id):
+        cpldlist = self.chas.cpld_list
+        cpldtmp = None
+        for cpld in cpldlist:
+            if cpld.cpld_id == cpld_id:
+                cpldtmp = cpld
+
+        dic = collections.OrderedDict()
+        if cpldtmp is None:
+            dic["Name"] = self.na_ret
+            dic["Version"] = self.na_ret
+            dic["Desc"] = self.na_ret
+            dic["Slot"] = None
+            dic["Warm"] = None
+        else:
+            dic["Name"] = cpldtmp.name
+            dic["Version"] = cpldtmp.get_version()
+            dic["Desc"] = cpldtmp.desc
+            dic["Slot"] = cpldtmp.slot
+            dic["Warm"] = cpldtmp.warm
+        return dic
+
+    def get_cpld_all_version(self):
+        """
+        Get version of all CPLDs' that can be read from BMC
+
+        @return dict of CPLDs' version or None for failure.
+                example outputs:
+                {
+                    "BASE_CPLD": "0.1",     # or "N/A" for read failure
+                    "FAN_CPLD": "0.2"
+                }
+        """
+        cpld_version = {
+            "BASE_CPLD": "N/A",
+            "FAN_CPLD": "N/A"
+        }
+        for cpld_name in cpld_version:
+            cpld = self.chas.get_cpld_byname(cpld_name)
+            if cpld is None:
+                baseutil.logger_debug("name %s not find" % cpld_name)
+                continue
+            cpld_version[cpld_name] = cpld.get_version()
+        return cpld_version
+
+    # comp
+    def get_comp_total_number(self):
+        complist = self.chas.comp_list
+        return len(complist)
+
+    def get_comp_list(self):
+        return self.chas.comp_list
+
+    def get_comp_id(self, comp):
+        return comp.comp_id
+
+    def get_comp_version_by_id(self, comp_id):
+        comp_list = self.chas.comp_list
+        comptmp = None
+        for comp in comp_list:
+            if comp.comp_id == comp_id:
+                comptmp = comp
+                break
+
+        dic = collections.OrderedDict()
+        if comptmp is None:
+            dic["Name"] = self.na_ret
+            dic["Version"] = self.na_ret
+            dic["Desc"] = self.na_ret
+            dic["Slot"] = None
+        else:
+            dic["Name"] = comptmp.name
+            dic["Version"] = comptmp.get_version()
+            dic["Desc"] = comptmp.desc
+            dic["Slot"] = comptmp.slot
+        return dic
+
+    def get_bmc_productname(self):
+        """
+        Get product name
+
+        @return product name string, e.g. $(device name)-F-$(VENDOR_NAME), if error return "N/A"
+        """
+        bmc = self.chas.get_bmc_byname("master")
+        if bmc is None:
+            baseutil.logger_debug("name bmc(master) not find")
+            return self.na_ret
+        return bmc.get_productname()
+
+    def call_bmc_diagcmd(self, cmdstr):
+        """
+        Call BMC diag comman func
+
+        @return ret: 0 sucess , -1 fail
+                outmsg: if success is out msg, or fail is err msg
+        """
+        if (cmdstr is None or cmdstr == ""):
+            outmsg = "cmdstr is empty"
+            baseutil.logger_debug(outmsg)
+            return -1, outmsg
+        bmc = self.chas.get_bmc_byname("master")
+        if bmc is None:
+            outmsg = "name bmc(master) not find"
+            baseutil.logger_debug(outmsg)
+            return -1, outmsg
+        baseutil.logger_debug("call cmdstr %s" % cmdstr)
+        return bmc.call_diagcmd(cmdstr)
+
+    def write_bios_version(self, flash, version):
+        bios = self.chas.get_bios_byname("master")
+        if bios is None:
+            baseutil.logger_debug("name bios(master) not find")
+            return -1
+        return bios.set_bios_version(flash, version)
+
+    def get_bios_version(self):
+        bios = self.chas.get_bios_byname("master")
+        if bios is None:
+            baseutil.logger_debug("name bios(master) not find")
+            return -1
+        return bios.get_bios_version()
+
+    def get_bios_status(self):
+        bios = self.chas.get_bios_byname("master")
+        if bios is None:
+            baseutil.logger_debug("name bios(master) not find")
+            return -1
+        return bios.get_bios_boot_status()
+
+    def get_bmc_mac_rov(self):
+        """
+        Get BMC mac rov
+
+        @return ret: 0 sucess , -1 fail
+                outmsg: if success is out msg, or fail is err msg
+        """
+        bmc = self.chas.get_bmc_byname("master")
+        if bmc is None:
+            msg = "name master not find"
+            baseutil.logger_debug(msg)
+            return -1, msg
+        return bmc.get_mac_rov()
+
+    def get_bmc_next_boot(self):
+        """
+        Get next booting flash of BMC
+
+        @return 'master'/'slave' on success, "N/A" for failure
+        """
+        bmc = self.chas.get_bmc_byname("master")
+        if bmc is None:
+            baseutil.logger_debug("name master not find")
+            return self.na_ret
+        return bmc.get_next_boot()
+
+    def set_bmc_next_boot(self, flash):
+        """
+        Set flash from which next BMC boot
+
+        @param flash Booting flash of BMC, "master" or "slave"
+
+        @return 0 on success, -1 for failure
+        """
+        flash_status = ("master", "slave")
+        if flash is None or flash not in flash_status:
+            baseutil.logger_debug("parameter flash illegal, should be [master|slave]")
+            return -1
+        bmc = self.chas.get_bmc_byname("master")
+        if bmc is None:
+            baseutil.logger_debug("name master not find")
+            return -1
+        return bmc.set_next_boot(flash)
+
+    def reboot_bmc(self):
+        """
+        Reboot running BMC
+        """
+        bmc = self.chas.get_bmc_byname("master")
+        if bmc is None:
+            baseutil.logger_debug("name master not find")
+            return -1
+        return bmc.reboot()
+
+    def get_bmc_info(self):
+        """
+        Get BMC info
+
+        @return dict of BMC info or None for failure
+                    "Version": "1.1.1", # "N/A"
+                    "Flash": "master",  # "N/A"
+                    "Next": "master"    # "N/A"
+        """
+        bmc = self.chas.get_bmc_byname("master")
+        if bmc is None:
+            baseutil.logger_debug("name master not find")
+            return self.na_ret
+        return bmc.get_info()
+
+    def get_bmc_version_all(self):
+        """
+        @return dict of BMCs
+                {
+                    "MasterVersion": "1.1.1",   # "N/A"
+                    "SlaveVersion": "1.1.1"     # "N/A"
+                }
+        """
+        bmc = self.chas.get_bmc_byname("master")
+        if bmc is None:
+            baseutil.logger_debug("name master not find")
+            return self.na_ret
+        return bmc.get_version_all()
+
+    def bmc_execute_command(self, cmd_str):
+        ret, output = osutil.command(cmd_str)
+        if ret:
+            baseutil.logger_debug("execute %s command failed" % (cmd_str))
+        return ret, output
+
+    def get_cpu_reset_num(self):
+        """
+        Get CPU reset num
+        @return CPU reset num on success, -1 for failure
+        """
+        cpu = self.chas.get_cpu_byname("cpu")
+        if cpu is None:
+            msg = "name cpu not find"
+            baseutil.logger_debug(msg)
+            return -1
+        return cpu.get_cpu_reset_num()
+
+    def get_cpu_reboot_cause(self):
+        """
+        Get CPU reboot cause
+        @return string of cpu reboot reason
+        """
+        cpu = self.chas.get_cpu_byname("cpu")
+        if cpu is None:
+            msg = "name cpu not find"
+            baseutil.logger_debug(msg)
+            return "Unknown reboot cause"
+        return cpu.get_cpu_reboot_cause()
+
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/led.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/led.py
new file mode 100644
index 000000000..7fb869c74
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/led.py
@@ -0,0 +1,52 @@
+#!/usr/bin/env python3
+#######################################################
+#
+# led.py
+# Python implementation of the Class led
+#
+#######################################################
+from plat_hal.devicebase import devicebase
+
+
+class led(devicebase):
+    def __init__(self, conf=None):
+        if conf is not None:
+            self.name = conf.get('name', None)
+            self.led_type = conf.get('led_type', None)
+            self.led_attrs_config = conf.get('led_attrs', None)
+            self.led_config = conf.get('led', None)
+
+    def set_color(self, color):
+        status = self.led_attrs_config.get(color, None)
+        if status is None:
+            return False
+
+        mask = self.led_attrs_config.get('mask', 0xff)
+
+        if isinstance(self.led_config, list):
+            for led_config_index in self.led_config:
+                ret, value = self.get_value(led_config_index)
+                if (ret is False) or (value is None):
+                    return False
+                setval = (int(value) & ~mask) | (status)
+                ret, val = self.set_value(led_config_index, setval)
+                if ret is False:
+                    return ret
+        else:
+            ret, value = self.get_value(self.led_config)
+            if (ret is False) or (value is None):
+                return False
+            setval = (int(value) & ~mask) | (status)
+            ret, val = self.set_value(self.led_config, setval)
+        return ret
+
+    def get_color(self):
+        mask = self.led_attrs_config.get('mask', 0xff)
+        ret, value = self.get_value(self.led_config)
+        if ret is False or value is None:
+            return False, 'N/A'
+        ledval = int(value) & mask
+        for key, val in self.led_attrs_config.items():
+            if (ledval == val) and (key != "mask"):
+                return True, key
+        return False, 'N/A'
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/onie_e2.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/onie_e2.py
new file mode 100644
index 000000000..9ac32cace
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/onie_e2.py
@@ -0,0 +1,127 @@
+#!/usr/bin/env python3
+#######################################################
+#
+# onie_e2.py
+# Python implementation of the Class onie_e2
+#
+#######################################################
+from plat_hal.devicebase import devicebase
+from eepromutil.onietlv import onie_tlv
+
+
+class onie_e2(devicebase):
+
+    def __init__(self, conf=None):
+        self._cardid = ""
+        self._productname = ""
+        self._partnum = ""
+        self._serialnum = ""
+        self._macbase = ""
+        self._manufdate = ""
+        self._deviceversion = ""
+        self._labelrevision = ""
+        self._platformname = ""
+        self._onieversion = ""
+        self._macsize = ""
+        self._manufname = ""
+        self._manufcountry = ""
+        self._vendorname = ""
+        self._diagname = ""
+        self._servicetag = ""
+
+        if conf is not None:
+            self.name = conf.get('name', None)
+            self.e2loc = conf.get('e2loc', None)
+            self.e2_path = self.e2loc.get('loc', None)
+            self.airflow = conf.get('airflow', "intake")
+
+    @property
+    def cardid(self):
+        return self._cardid
+
+    @property
+    def productname(self):
+        return self._productname
+
+    @property
+    def partnum(self):
+        return self._partnum
+
+    @property
+    def serialnum(self):
+        return self._serialnum
+
+    @property
+    def macbase(self):
+        return self._macbase
+
+    @property
+    def manufdate(self):
+        return self._manufdate
+
+    @property
+    def deviceversion(self):
+        return self._deviceversion
+
+    @property
+    def labelrevision(self):
+        return self._labelrevision
+
+    @property
+    def platformname(self):
+        return self._platformname
+
+    @property
+    def onieversion(self):
+        return self._onieversion
+
+    @property
+    def macsize(self):
+        return self._macsize
+
+    @property
+    def manufname(self):
+        return self._manufname
+
+    @property
+    def manufcountry(self):
+        return self._manufcountry
+
+    @property
+    def vendorname(self):
+        return self._vendorname
+
+    @property
+    def diagname(self):
+        return self._diagname
+
+    @property
+    def servicetag(self):
+        return self._servicetag
+
+    def get_onie_e2_info(self):
+        try:
+            eeprom = self.get_eeprom_info(self.e2loc)
+            if eeprom is None:
+                raise Exception("%s: value is none" % self.name)
+            onietlv = onie_tlv()
+            onietlv.decode(eeprom)
+            self._cardid = onietlv.cardid
+            self._productname = onietlv.productname
+            self._partnum = onietlv.partnum
+            self._serialnum = onietlv.serialnum
+            self._macbase = onietlv.macbase
+            self._manufdate = onietlv.manufdate
+            self._deviceversion = onietlv.deviceversion
+            self._labelrevision = onietlv.labelrevision
+            self._platformname = onietlv.platformname
+            self._onieversion = onietlv.onieversion
+            self._macsize = onietlv.macsize
+            self._manufname = onietlv.manufname
+            self._manufcountry = onietlv.manufcountry
+            self._vendorname = onietlv.vendorname
+            self._diagname = onietlv.diagname
+            self._servicetag = onietlv.servicetag
+        except Exception:
+            return False
+        return True
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/osutil.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/osutil.py
new file mode 100644
index 000000000..684e26bb9
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/osutil.py
@@ -0,0 +1,440 @@
+#!/usr/bin/env python3
+#######################################################
+#
+# osutil.py
+# Python implementation of the Class osutil
+#
+#######################################################
+
+import os
+import glob
+import re
+import time
+import subprocess
+import fcntl
+import syslog
+from functools import wraps
+from wbutil.smbus import SMBus
+
+
+PLATFORM_HAL_DEBUG_FILE = "/etc/.platform_hal_debug_flag"
+
+
+def platform_hal_debug(s):
+    if os.path.exists(PLATFORM_HAL_DEBUG_FILE):
+        syslog.openlog("PLATFORM_HAL", syslog.LOG_PID)
+        syslog.syslog(syslog.LOG_DEBUG, s)
+
+
+def retry(maxretry=6, delay=0.01):
+    '''
+        maxretry:  max retry times
+        delay   :  interval after last retry
+    '''
+    def decorator(f):
+        @wraps(f)
+        def wrapper(*args, **kwargs):
+            time_retry = maxretry
+            time_delay = delay
+            result_msg = ""
+            while time_retry:
+                try:
+                    val, result_msg = f(*args, **kwargs)
+                    if val is True:
+                        return val, result_msg
+                    time_retry -= 1
+                    time.sleep(time_delay)
+                except Exception as e:
+                    time_retry -= 1
+                    result_msg = str(e)
+                    time.sleep(time_delay)
+            return False, "max time retry last errmsg is {}".format(result_msg)
+        return wrapper
+    return decorator
+
+
+pidfile = None
+
+
+def file_rw_lock(file_path):
+    global pidfile
+    pidfile = open(file_path, "r")
+    try:
+        fcntl.flock(pidfile, fcntl.LOCK_EX | fcntl.LOCK_NB)
+        platform_hal_debug("file_rw_lock success")
+        return True
+    except Exception:
+        if pidfile is not None:
+            pidfile.close()
+            pidfile = None
+        return False
+
+
+def file_rw_unlock():
+    try:
+        global pidfile
+
+        if pidfile is not None:
+            fcntl.flock(pidfile, fcntl.LOCK_UN)
+            pidfile.close()
+            pidfile = None
+            platform_hal_debug("file_rw_unlock success")
+        else:
+            platform_hal_debug("pidfile is invalid, do nothing")
+        return True
+    except Exception as e:
+        platform_hal_debug("file_rw_unlock err, msg: %s" % (str(e)))
+        return False
+
+
+def take_file_rw_lock(file_path):
+    loop = 1000
+    ret = False
+    for i in range(0, loop):
+        ret = file_rw_lock(file_path)
+        if ret is True:
+            break
+        time.sleep(0.001)
+    return ret
+
+
+class osutil(object):
+    """
+       osutil
+    """
+
+    @staticmethod
+    @retry(maxretry=6)
+    def wbi2cget_python(bus, addr, reg):
+        with SMBus(bus) as y:
+            val, ind = y.read_byte_data(addr, reg, True)
+        return val, ind
+
+    @staticmethod
+    @retry(maxretry=6)
+    def wbi2cset_python(bus, addr, reg, value):
+        with SMBus(bus) as y:
+            val, ind = y.write_byte_data(addr, reg, value, True)
+        return val, ind
+
+    @staticmethod
+    @retry(maxretry=6)
+    def wbi2cgetword_python(bus, addr, reg):
+        with SMBus(bus) as y:
+            val, ind = y.read_word_data(addr, reg, True)
+        return val, ind
+
+    @staticmethod
+    @retry(maxretry=6)
+    def wbi2csetword_python(bus, addr, reg, value):
+        with SMBus(bus) as y:
+            val, ind = y.write_word_data(addr, reg, value, True)
+        return val, ind
+
+    @staticmethod
+    @retry(maxretry=6)
+    def wbi2csetwordpec_python(bus, addr, reg, value):
+        with SMBus(bus) as y:
+            val, ind = y.write_word_data_pec(addr, reg, value, True)
+        return val, ind
+
+    @staticmethod
+    @retry(maxretry=6)
+    def wbi2cset_byte_pec_python(bus, addr, reg, value):
+        with SMBus(bus) as y:
+            val, ind = y.write_byte_data_pec(addr, reg, value, True)
+        return val, ind
+
+    @staticmethod
+    def command(cmdstr):
+        retcode, output = subprocess.getstatusoutput(cmdstr)
+        return retcode, output
+
+    @staticmethod
+    def geti2cword_i2ctool(bus, addr, offset):
+        command_line = "i2cget -f -y %d 0x%02x 0x%02x  wp" % (bus, addr, offset)
+        retrytime = 6
+        ret_t = ""
+        for i in range(retrytime):
+            ret, ret_t = osutil.command(command_line)
+            if ret == 0:
+                return True, int(ret_t, 16)
+            time.sleep(0.1)
+        return False, ret_t
+
+    @staticmethod
+    def seti2cword_i2ctool(bus, addr, offset, val):
+        command_line = "i2cset -f -y %d 0x%02x 0x%0x 0x%04x wp" % (bus, addr, offset, val)
+        retrytime = 6
+        ret_t = ""
+        for i in range(retrytime):
+            ret, ret_t = osutil.command(command_line)
+            if ret == 0:
+                return True, ret_t
+            time.sleep(0.1)
+        return False, ret_t
+
+    @staticmethod
+    def wbi2cget_i2ctool(bus, devno, address):
+        command_line = "i2cget -f -y %d 0x%02x 0x%02x " % (bus, devno, address)
+        retrytime = 6
+        ret_t = ""
+        for i in range(retrytime):
+            ret, ret_t = osutil.command(command_line)
+            if ret == 0:
+                return True, int(ret_t, 16)
+            time.sleep(0.1)
+        return False, ret_t
+
+    @staticmethod
+    def wbi2cset_i2ctool(bus, devno, address, byte):
+        command_line = "i2cset -f -y %d 0x%02x 0x%02x 0x%02x" % (
+            bus, devno, address, byte)
+        retrytime = 6
+        ret_t = ""
+        for i in range(retrytime):
+            ret, ret_t = osutil.command(command_line)
+            if ret == 0:
+                return True, ret_t
+        return False, ret_t
+
+    @staticmethod
+    def geti2cword(bus, addr, offset):
+        return osutil.wbi2cgetword_python(bus, addr, offset)
+
+    @staticmethod
+    def seti2cword(bus, addr, offset, val):
+        return osutil.wbi2csetword_python(bus, addr, offset, val)
+
+    @staticmethod
+    def seti2cwordpec(bus, addr, offset, val):
+        return osutil.wbi2csetwordpec_python(bus, addr, offset, val)
+
+    @staticmethod
+    def seti2c_byte_pec(bus, addr, offset, val):
+        return osutil.wbi2cset_byte_pec_python(bus, addr, offset, val)
+
+    @staticmethod
+    def wbi2cget(bus, devno, address):
+        return osutil.wbi2cget_python(bus, devno, address)
+
+    @staticmethod
+    def wbi2cset(bus, devno, address, byte):
+        return osutil.wbi2cset_python(bus, devno, address, byte)
+
+    @staticmethod
+    def byteTostr(val):
+        strtmp = ''
+        for value in val:
+            strtmp += chr(value)
+        return strtmp
+
+    @staticmethod
+    def io_rd(reg_addr, read_len=1):
+        try:
+            regaddr = 0
+            if isinstance(reg_addr, int):
+                regaddr = reg_addr
+            else:
+                regaddr = int(reg_addr, 16)
+            devfile = "/dev/port"
+            fd = os.open(devfile, os.O_RDWR | os.O_CREAT)
+            os.lseek(fd, regaddr, os.SEEK_SET)
+            val = os.read(fd, read_len)
+            return True, "".join(["%02x" % item for item in val])
+        except ValueError as e:
+            return False, str(e)
+        except Exception as e:
+            return False, str(e)
+        finally:
+            os.close(fd)
+
+    @staticmethod
+    def readsysfs(location, flock_path=None):
+        flock_path_tmp = None
+        platform_hal_debug("readsysfs, location:%s, flock_path:%s" % (location, flock_path))
+        try:
+            if flock_path is not None:
+                flock_paths = glob.glob(flock_path)
+                if len(flock_paths) != 0:
+                    flock_path_tmp = flock_paths[0]
+                    platform_hal_debug("try to get file lock, path:%s" % flock_path_tmp)
+                    ret = take_file_rw_lock(flock_path_tmp)
+                    if ret is False:
+                        platform_hal_debug("take file lock timeout, path:%s" % flock_path_tmp)
+                        return False, ("take file rw lock timeout, path:%s" % flock_path_tmp)
+                else:
+                    platform_hal_debug("config error, can't find flock_path:%s" % flock_path)
+
+            locations = glob.glob(location)
+            with open(locations[0], 'rb') as fd1:
+                retval = fd1.read()
+            retval = osutil.byteTostr(retval)
+            if flock_path_tmp is not None:
+                file_rw_unlock()
+
+            retval = retval.rstrip('\r\n')
+            retval = retval.lstrip(" ")
+        except Exception as e:
+            if flock_path_tmp is not None:
+                file_rw_unlock()
+            platform_hal_debug("readsysfs error, msg:%s" % str(e))
+            return False, (str(e) + " location[%s]" % location)
+        return True, retval
+
+    @staticmethod
+    def writesysfs(location, value):
+        try:
+            if not os.path.isfile(location):
+                print(location, 'not found !')
+                return False, ("location[%s] not found !" % location)
+            with open(location, 'w') as fd1:
+                fd1.write(value)
+        except Exception as e:
+            return False, (str(e) + " location[%s]" % location)
+        return True, ("set location[%s] %s success !" % (location, value))
+
+    @staticmethod
+    def getdevmem(addr, digit, mask):
+        command_line = "devmem 0x%02x %d" % (addr, digit)
+        retrytime = 6
+        ret_t = ""
+        for i in range(retrytime):
+            ret, ret_t = osutil.command(command_line)
+            if ret == 0:
+                if mask is not None:
+                    ret_t = str(int(ret_t, 16) & mask)
+            return True, ret_t
+        return False, ret_t
+
+    @staticmethod
+    def readdevfile_ascii(path, offset, length):
+        msg = ""
+        ret = ""
+        joinstr = ''
+        fd = -1
+
+        if not os.path.exists(path):
+            msg = path + " not found !"
+            return False, msg
+
+        try:
+            fd = os.open(path, os.O_RDONLY)
+            os.lseek(fd, offset, os.SEEK_SET)
+            ret = os.read(fd, length)
+            for item in ret:
+                joinstr += '%02x ' % item  # like sysfs, display in hex
+        except Exception as e:
+            msg = str(e)
+            return False, msg
+        finally:
+            if fd > 0:
+                os.close(fd)
+        return True, joinstr
+
+    @staticmethod
+    def readdevfile(path, offset, length):
+        msg = ""
+        ret = ""
+        fd = -1
+        val_list = []
+
+        if not os.path.exists(path):
+            msg = path + " not found !"
+            return False, msg
+
+        try:
+            fd = os.open(path, os.O_RDONLY)
+            os.lseek(fd, offset, os.SEEK_SET)
+            ret = os.read(fd, length)
+            for item in ret:
+                val_list.append(item)
+        except Exception as e:
+            msg = str(e)
+            return False, msg
+        finally:
+            if fd > 0:
+                os.close(fd)
+        return True, val_list
+
+    @staticmethod
+    def writedevfile(path, offset, buf):
+        msg = ""
+        fd = -1
+
+        if not os.path.exists(path):
+            msg = path + " not found !"
+            return False, msg
+
+        if isinstance(buf, list):
+            if len(buf) == 0:
+                msg = "buf:%s is NONE !" % buf
+                return False, msg
+        elif isinstance(buf, int):
+            buf = [buf]
+        else:
+            msg = "buf:%s is not list type or not int type !" % buf
+            return False, msg
+
+        try:
+            fd = os.open(path, os.O_WRONLY)
+            os.lseek(fd, offset, os.SEEK_SET)
+            ret = os.write(fd, bytes(buf))
+        except Exception as e:
+            msg = str(e)
+            return False, msg
+        finally:
+            if fd > 0:
+                os.close(fd)
+
+        return True, ret
+
+    @staticmethod
+    def wb_os_system(cmd):
+        status, output = subprocess.getstatusoutput(cmd)
+        return status, output
+
+    @staticmethod
+    def getsdkreg(reg):
+        try:
+            cmd = "bcmcmd -t 1 'getr %s ' < /dev/null" % reg
+            ret, result = osutil.wb_os_system(cmd)
+            result_t = result.strip().replace("\r", "").replace("\n", "")
+            if ret != 0 or "Error:" in result_t:
+                return False, result
+            patt = r"%s.(.*):(.*)>drivshell" % reg
+            rt = re.findall(patt, result_t, re.S)
+            test = re.findall("=(.*)", rt[0][0])[0]
+        except Exception as e:
+            return False, 'get sdk register error, msg: %s' % str(e)
+        return True, test
+
+    @staticmethod
+    def getmactemp():
+        try:
+            result = {}
+            # need to exec twice
+            osutil.wb_os_system("bcmcmd -t 1 \"show temp\" < /dev/null")
+            ret, log = osutil.wb_os_system("bcmcmd -t 1 \"show temp\" < /dev/null")
+            if ret:
+                return False, result
+            logs = log.splitlines()
+            for line in logs:
+                if "average" in line:
+                    b = re.findall(r'\d+.\d+', line)
+                    result["average"] = b[0]
+                elif "maximum" in line:
+                    b = re.findall(r'\d+.\d+', line)
+                    result["maximum"] = b[0]
+        except Exception as e:
+            return False, str(e)
+        return True, result
+
+    @staticmethod
+    def std_match(stdout, pattern):
+        if pattern is None:
+            return stdout.strip()
+        for line in stdout.splitlines():
+            if re.match(pattern, line):
+                return line.strip()
+        return None
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/psu.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/psu.py
new file mode 100644
index 000000000..a7fc90e0f
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/psu.py
@@ -0,0 +1,701 @@
+#!/usr/bin/env python3
+#######################################################
+#
+# psu.py
+# Python implementation of the Class psu
+#
+#######################################################
+from eepromutil.fru import ipmifru
+from eepromutil.cust_fru import CustFru
+from plat_hal.devicebase import devicebase
+from plat_hal.sensor import sensor
+
+
+class psu(devicebase):
+    __pmbus = None
+    __e2loc = None
+    __productManufacturer = None  # : ARTESYN
+    __productName = None  # : CRPS550W
+    __productPartModelName = None  # : CSU550AP-3-300
+    __productVersion = None  # : AB
+    __productSerialNumber = None  # : M623UZ00JYABL
+    __AirFlow = None  # 'N/A'
+    __AirFlowconifg = None
+    __psu_display_name = None  # 'N/A'
+    __psu_display_name_conifg = None
+    __psu_not_present_pwm = None
+    __InputStatus_config = None
+    __OutputStatus_config = None
+    __FanSpeed_config = None
+    __Temperature_config = None
+    __InputStatus = None
+    __OutputStatus = None
+    __FanSpeed = None
+    __Temperature = None
+    __FanSpeedMin = None
+    __FanSpeedMax = None
+    __FanSpeedTolerance = None
+    __InputsVoltage_config = None
+    __InputsCurrent_config = None
+    __InputsPower_config = None
+    __OutputsVoltage_config = None
+    __OutputsCurrent_config = None
+    __OutputsPower_config = None
+    __InputsVoltage = {}
+    __InputsCurrent = None
+    __InputsPower = None
+    __OutputsVoltage = None
+    __OutputsCurrent = None
+    __OutputsPower = None
+    __InputsType_config = None
+    __InputsType = None
+    __psu_sn_config = None
+    __psu_hw_config = None
+    __psu_pn_config = None
+    __psu_vendor_config = None
+    __TempStatus_config = None
+    __FanStatus_config = None
+    __TempStatus = None
+    __FanStatus = None
+
+    def __init__(self, conf=None):
+        self.pmbus = conf.get("pmbusloc", None)
+        self.e2loc = conf.get("e2loc", None)
+        self.e2_type = conf.get('e2_type', "fru")
+        self.__presentconfig = conf.get("present", None)
+        self.name = conf.get("name", None)
+        self.get_threshold_by_model = conf.get("get_threshold_by_model", 0)
+        self.AirFlowconifg = conf.get("airflow", None)
+        self.psu_display_name_conifg = conf.get("psu_display_name", None)
+        self.psu_not_present_pwm = conf.get("psu_not_present_pwm", 100)
+        self.Temperature_config = conf.get("Temperature", None)
+        self.Temperature = sensor(self.Temperature_config, self.get_psu_model)
+
+        self.FanSpeedTolerance = conf.get('psu_fan_tolerance', 30)
+        self.FanSpeed_config = conf.get("FanSpeed", None)
+        self.FanSpeed = sensor(self.FanSpeed_config, self.get_psu_model)
+
+        self.__InputsVoltage_config = conf.get("InputsVoltage", None)
+        self.generate_psu_input_vol(self.__InputsVoltage_config)
+        self.__InputsCurrent_config = conf.get("InputsCurrent", None)
+        self.InputsCurrent = sensor(self.__InputsCurrent_config, self.get_psu_model)
+        self.__InputsPower_config = conf.get("InputsPower", None)
+        self.InputsPower = sensor(self.__InputsPower_config, self.get_psu_model)
+        self.__OutputsVoltage_config = conf.get("OutputsVoltage", None)
+        self.OutputsVoltage = sensor(self.__OutputsVoltage_config, self.get_psu_model)
+        self.__OutputsCurrent_config = conf.get("OutputsCurrent", None)
+        self.OutputsCurrent = sensor(self.__OutputsCurrent_config, self.get_psu_model)
+        self.__OutputsPower_config = conf.get("OutputsPower", None)
+        self.OutputsPower = sensor(self.__OutputsPower_config, self.get_psu_model)
+
+        self.__InputStatus_config = conf.get("InputsStatus", None)
+        self.__OutputStatus_config = conf.get("OutputsStatus", None)
+        self.__InputsType_config = conf.get('InputsType', None)
+        self.__psu_sn_config = conf.get('psu_sn', None)
+        self.__psu_hw_config = conf.get('psu_hw', None)
+        self.__psu_pn_config = conf.get('psu_pn', None)
+        self.__psu_vendor_config = conf.get('psu_vendor', None)
+        self.__TempStatus_config = conf.get("TempStatus", None)
+        self.__FanStatus_config = conf.get("FanStatus", None)
+
+    def get_psu_model(self):
+        if self.productPartModelName is None:
+            ret = self.get_fru_info()
+            if ret is False:
+                return None
+        return self.productPartModelName
+
+    def generate_psu_input_vol(self, config):
+        tmp = {}
+        for (key, item) in config.items():
+            tmp.setdefault(key, sensor(item, self.get_psu_model))
+        self.__InputsVoltage = tmp
+
+    def get_psu_sensor_by_name(self, psutype):
+        return self.__InputsVoltage.get(psutype) or self.__InputsVoltage.get('other')
+
+    @property
+    def InputsVoltage(self):
+        psutype = self.InputsType
+        input_sensor = self.get_psu_sensor_by_name(psutype)
+        if input_sensor is None:
+            return None
+        return input_sensor
+
+    @InputsVoltage.setter
+    def InputsVoltage(self, val):
+        self.__InputsVoltage = val
+
+    @property
+    def InputsCurrent(self):
+        return self.__InputsCurrent
+
+    @InputsCurrent.setter
+    def InputsCurrent(self, val):
+        self.__InputsCurrent = val
+
+    @property
+    def InputsPower(self):
+        return self.__InputsPower
+
+    @InputsPower.setter
+    def InputsPower(self, val):
+        self.__InputsPower = val
+
+    @property
+    def OutputsVoltage(self):
+        return self.__OutputsVoltage
+
+    @OutputsVoltage.setter
+    def OutputsVoltage(self, val):
+        self.__OutputsVoltage = val
+
+    @property
+    def OutputsCurrent(self):
+        return self.__OutputsCurrent
+
+    @OutputsCurrent.setter
+    def OutputsCurrent(self, val):
+        self.__OutputsCurrent = val
+
+    @property
+    def OutputsPower(self):
+        return self.__OutputsPower
+
+    @OutputsPower.setter
+    def OutputsPower(self, val):
+        self.__OutputsPower = val
+
+    @property
+    def InputStatus(self):
+        if self.__InputStatus_config is None:
+            return None
+        if self.present is False:
+            self.__InputStatus = False
+        else:
+            ret, val = self.get_value(self.__InputStatus_config)
+            mask = self.__InputStatus_config.get("mask")
+            if ret is True:
+                if isinstance(val, str):
+                    value = int(val, 16)
+                else:
+                    value = val
+                ttt = value & mask
+                okval = self.__InputStatus_config.get("okval", 0)
+                if ttt == okval:
+                    self.__InputStatus = True
+                else:
+                    self.__InputStatus = False
+            else:
+                self.__InputStatus = False
+        return self.__InputStatus
+
+    @InputStatus.setter
+    def InputStatus(self, val):
+        self.__InputStatus = val
+
+    @property
+    def TempStatus(self):
+        if self.__TempStatus_config is None:
+            return None
+        if self.present is False:
+            self.__TempStatus = False
+        else:
+            ret, val = self.get_value(self.__TempStatus_config)
+            mask = self.__TempStatus_config.get("mask")
+            if ret is True:
+                if isinstance(val, str):
+                    value = int(val, 16)
+                else:
+                    value = val
+                ttt = value & mask
+                okval = self.__TempStatus_config.get("okval", 0)
+                if ttt == okval:
+                    self.__TempStatus = True
+                else:
+                    self.__TempStatus = False
+            else:
+                self.__TempStatus = False
+        return self.__TempStatus
+
+    @TempStatus.setter
+    def TempStatus(self, val):
+        self.__TempStatus = val
+
+    @property
+    def FanStatus(self):
+        if self.__FanStatus_config is None:
+            return None
+        if self.present is False:
+            self.__FanStatus = False
+        else:
+            ret, val = self.get_value(self.__FanStatus_config)
+            mask = self.__FanStatus_config.get("mask")
+            if ret is True:
+                if isinstance(val, str):
+                    value = int(val, 16)
+                else:
+                    value = val
+                ttt = value & mask
+                okval = self.__FanStatus_config.get("okval", 0)
+                if ttt == okval:
+                    self.__FanStatus = True
+                else:
+                    self.__FanStatus = False
+            else:
+                self.__FanStatus = False
+        return self.__FanStatus
+
+    @FanStatus.setter
+    def FanStatus(self, val):
+        self.__FanStatus = val
+
+    def get_input_type_pmbus(self):
+        psutypedecode = self.__InputsType_config.get('psutypedecode', {})
+        if self.present is False:
+            self.__InputsType = psutypedecode.get(0x00)
+        else:
+            ret, val = self.get_value(self.__InputsType_config)
+            self.__InputsType = self.__InputsType_config.get(val, None)
+            if self.__InputsType is not None:
+                return self.__InputsType
+            if ret is True and val in psutypedecode:
+                self.__InputsType = psutypedecode.get(val)
+            else:
+                self.__InputsType = psutypedecode.get(0x00)
+        return self.__InputsType
+
+    def get_input_type_fru(self):
+        self.__InputsType = 'N/A'
+        if self.productPartModelName is None:
+            ret = self.get_fru_info()
+            if ret is False:
+                return self.__InputsType
+        psutypedecode = self.__InputsType_config.get('psutypedecode', {})
+        for key, value in psutypedecode.items():
+            if self.productPartModelName in value:
+                self.__InputsType = key
+        return self.__InputsType
+
+    @property
+    def InputsType(self):
+        gettype = self.__InputsType_config.get('gettype', "pmbus")
+        if gettype == "pmbus":
+            return self.get_input_type_pmbus()
+
+        if gettype == "fru":
+            return self.get_input_type_fru()
+
+        self.__InputsType = 'N/A'
+        return self.__InputsType
+
+    @InputsType.setter
+    def InputsType(self, val):
+        self.__InputsType = val
+
+    @property
+    def FanSpeedMin(self):
+        return self.__FanSpeedMin
+
+    @FanSpeedMin.setter
+    def FanSpeedMin(self, val):
+        self.__FanSpeedMin = val
+
+    @property
+    def FanSpeedMax(self):
+        return self.__FanSpeedMax
+
+    @FanSpeedMax.setter
+    def FanSpeedMax(self, val):
+        self.__FanSpeedMax = val
+
+    @property
+    def FanSpeedTolerance(self):
+        return self.__FanSpeedTolerance
+
+    @FanSpeedTolerance.setter
+    def FanSpeedTolerance(self, val):
+        self.__FanSpeedTolerance = val
+
+    @property
+    def OutputStatus(self):
+        if self.__OutputStatus_config is None:
+            return None
+        if self.present is False:
+            self.__OutputStatus = False
+        else:
+            ret, val = self.get_value(self.__OutputStatus_config)
+            mask = self.__OutputStatus_config.get("mask")
+            if ret is True:
+                if isinstance(val, str):
+                    value = int(val, 16)
+                else:
+                    value = val
+                ttt = value & mask
+                okval = self.__OutputStatus_config.get("okval", 0)
+                if ttt == okval:
+                    self.__OutputStatus = True
+                else:
+                    self.__OutputStatus = False
+            else:
+                self.__OutputStatus = False
+        return self.__OutputStatus
+
+    @OutputStatus.setter
+    def OutputStatus(self, val):
+        self.__OutputStatus = val
+
+    @property
+    def FanSpeed(self):
+        return self.__FanSpeed
+
+    @FanSpeed.setter
+    def FanSpeed(self, val):
+        self.__FanSpeed = val
+
+    @property
+    def Temperature(self):
+        return self.__Temperature
+
+    @Temperature.setter
+    def Temperature(self, val):
+        self.__Temperature = val
+
+    @property
+    def Temperature_config(self):
+        return self.__Temperature_config
+
+    @Temperature_config.setter
+    def Temperature_config(self, val):
+        self.__Temperature_config = val
+
+    @property
+    def AirFlowconifg(self):
+        return self.__AirFlowconifg
+
+    @AirFlowconifg.setter
+    def AirFlowconifg(self, val):
+        self.__AirFlowconifg = val
+
+    @property
+    def psu_display_name_conifg(self):
+        return self.__psu_display_name_conifg
+
+    @psu_display_name_conifg.setter
+    def psu_display_name_conifg(self, val):
+        self.__psu_display_name_conifg = val
+
+    @property
+    def pmbus(self):
+        return self.__pmbus
+
+    @pmbus.setter
+    def pmbus(self, val):
+        self.__pmbus = val
+
+    @property
+    def e2loc(self):
+        return self.__e2loc
+
+    @e2loc.setter
+    def e2loc(self, val):
+        self.__e2loc = val
+
+    @property
+    def AirFlow(self):
+        return self.__AirFlow
+
+    @AirFlow.setter
+    def AirFlow(self, val):
+        self.__AirFlow = val
+
+    @property
+    def psu_display_name(self):
+        return self.__psu_display_name
+
+    @psu_display_name.setter
+    def psu_display_name(self, val):
+        self.__psu_display_name = val
+
+    @property
+    def psu_not_present_pwm(self):
+        return self.__psu_not_present_pwm
+
+    @psu_not_present_pwm.setter
+    def psu_not_present_pwm(self, val):
+        self.__psu_not_present_pwm = val
+
+    @property
+    def present(self):
+        ret, val = self.get_value(self.__presentconfig)
+        if ret is False or val is None or val == "no_support":
+            return False
+        mask = self.__presentconfig.get("mask")
+        if isinstance(val, str):
+            value = int(val, 16)
+        else:
+            value = val
+        ttt = value & mask
+        okval = self.__presentconfig.get("okval", 0)
+        if ttt == okval:
+            return True
+        return False
+
+    @property
+    def productManufacturer(self):
+        return self.__productManufacturer
+
+    @productManufacturer.setter
+    def productManufacturer(self, val):
+        self.__productManufacturer = val
+
+    @property
+    def productName(self):
+        return self.__productName
+
+    @productName.setter
+    def productName(self, val):
+        self.__productName = val
+
+    @property
+    def productPartModelName(self):
+        return self.__productPartModelName
+
+    @productPartModelName.setter
+    def productPartModelName(self, val):
+        self.__productPartModelName = val
+
+    @property
+    def productVersion(self):
+        return self.__productVersion
+
+    @productVersion.setter
+    def productVersion(self, val):
+        self.__productVersion = val
+
+    @property
+    def productSerialNumber(self):
+        return self.__productSerialNumber
+
+    @productSerialNumber.setter
+    def productSerialNumber(self, val):
+        self.__productSerialNumber = val
+
+    @property
+    def psu_sn_sysfs(self):
+        if self.__psu_sn_config is None:
+            return None
+        ret, val = self.get_value(self.__psu_sn_config)
+        if ret is False or val is None:
+            return None
+        return val
+
+    @property
+    def psu_hw_sysfs(self):
+        if self.__psu_hw_config is None:
+            return None
+        ret, val = self.get_value(self.__psu_hw_config)
+        if ret is False or val is None:
+            return None
+        return val
+
+    @property
+    def psu_pn_sysfs(self):
+        if self.__psu_pn_config is None:
+            return None
+        ret, val = self.get_value(self.__psu_pn_config)
+        if ret is False or val is None:
+            return None
+        return val
+
+    @property
+    def psu_vendor_sysfs(self):
+        if self.__psu_vendor_config is None:
+            return None
+        ret, val = self.get_value(self.__psu_vendor_config)
+        if ret is False or val is None:
+            return None
+        return val
+
+    def __str__(self):
+        formatstr =  \
+            "name                : %s \n" \
+            "productManufacturer : %s \n" \
+            "productName         : %s \n" \
+            "productPartModelName: %s \n" \
+            "productVersion      : %s \n" \
+            "productSerialNumber : %s \n" \
+            "AirFlow             : %s \n" \
+
+        tmpstr = formatstr % (self.name, self.productManufacturer,
+                              self.productName, self.productPartModelName,
+                              self.productVersion, self.productSerialNumber, self.AirFlow)
+        return tmpstr
+
+    def get_fan_speed_pwm(self):
+        if self.pmbus is None:
+            return None
+        if self.present is False:
+            return self.psu_not_present_pwm
+        selfconfig = {}
+        selfconfig['bus'] = self.pmbus['bus']
+        selfconfig['addr'] = self.pmbus['addr']
+        selfconfig['way'] = 'i2cword'
+        selfconfig['offset'] = 0x3b
+        ret, val = self.get_value(selfconfig)
+        if ret is True:
+            return val
+        return None
+
+    def set_fan_speed_pwm(self, pwm):
+        '''
+            pmbus
+                if duty:
+                 i2cset -f -y 0x3b 0x0064  wp
+        '''
+        if self.present is False:
+            return None
+
+        if self.pmbus is None:
+            return None
+
+        if 0 <= pwm <= 100:
+            # enable duty first
+            selfconfig = {}
+
+            selfconfig['bus'] = self.pmbus['bus']
+            selfconfig['addr'] = self.pmbus['addr']
+            selfconfig['way'] = 'i2cpec'
+            selfconfig['offset'] = 0x3a
+            self.set_value(selfconfig, 0x80)
+
+            selfconfig['way'] = 'i2cwordpec'
+            selfconfig['offset'] = 0x3b
+            bytetmp = pwm
+            ret, val = self.set_value(selfconfig, int(bytetmp))
+            if ret is True:
+                return True
+            return None
+        raise Exception("pwm not in range [0,100]")
+
+    def get_fru_info_by_sysfs(self):
+        try:
+            psu_sn = self.psu_sn_sysfs
+            psu_hw = self.psu_hw_sysfs
+            psu_pn = self.psu_pn_sysfs
+            psu_vendor = self.psu_vendor_sysfs
+            if psu_sn is None or psu_hw is None or psu_pn is None or psu_vendor is None:
+                return False
+            self.productSerialNumber = psu_sn.strip().replace(chr(0), "")
+            self.productVersion = psu_hw.strip()
+            self.productPartModelName = psu_pn.strip()
+            self.productManufacturer = psu_vendor.strip().replace(chr(0), "")
+        except Exception:
+            self.productSerialNumber = None
+            self.productVersion = None
+            self.productPartModelName = None
+            self.productManufacturer = None
+            return False
+        return True
+
+    def get_fru_info_by_decode(self):
+        try:
+            eeprom = self.get_eeprom_info(self.e2loc)
+            if eeprom is None:
+                raise Exception("%s:value is none" % self.name)
+            fru = ipmifru()
+            if isinstance(eeprom, bytes):
+                eeprom = self.byteTostr(eeprom)
+            fru.decodeBin(eeprom)
+            if fru.productInfoArea is not None:
+                self.productManufacturer = fru.productInfoArea.productManufacturer.strip()
+                self.productName = fru.productInfoArea.productName.strip()
+                self.productPartModelName = fru.productInfoArea.productPartModelName.strip()
+                self.productVersion = fru.productInfoArea.productVersion.strip()
+                self.productSerialNumber = fru.productInfoArea.productSerialNumber.strip().replace(chr(0), "")
+        except Exception:
+            self.productManufacturer = None
+            self.productName = None
+            self.productPartModelName = None
+            self.productVersion = None
+            self.productSerialNumber = None
+            return False
+        return True
+
+    def get_custfru_info_by_decode(self):
+        try:
+            eeprom = self.get_eeprom_info(self.e2loc)
+            if eeprom is None:
+                raise Exception("%s:value is none" % self.name)
+            custfru = CustFru()
+            if isinstance(eeprom, bytes):
+                eeprom = self.byteTostr(eeprom)
+            custfru.decode(eeprom)
+            self.productManufacturer = custfru.manufacturer.strip()
+            self.productName = custfru.product_name.strip()
+            self.productPartModelName = custfru.product_name.strip()
+            self.productVersion = custfru.version.strip()
+            self.productSerialNumber = custfru.serial_number.strip().replace(chr(0), "")
+        except Exception:
+            self.productManufacturer = None
+            self.productName = None
+            self.productPartModelName = None
+            self.productVersion = None
+            self.productSerialNumber = None
+            return False
+        return True
+
+    def get_fru_info(self):
+        try:
+            if self.present is not True:
+                raise Exception("%s: not present" % self.name)
+
+            if self.get_fru_info_by_sysfs() is True:
+                return True
+
+            if self.e2_type == "fru":
+                return self.get_fru_info_by_decode()
+
+            if self.e2_type == "custfru":
+                return self.get_custfru_info_by_decode()
+
+            raise Exception("%s: unsupport e2_type: %s" % (self.name, self.e2_type))
+        except Exception:
+            self.productManufacturer = None
+            self.productName = None
+            self.productPartModelName = None
+            self.productVersion = None
+            self.productSerialNumber = None
+            return False
+
+    def get_AirFlow(self):
+        if self.productPartModelName is None:
+            ret = self.get_fru_info()
+            if ret is False:
+                self.AirFlow = None
+                return False
+        if self.AirFlowconifg is None:
+            self.AirFlow = None
+            return False
+        for i in self.AirFlowconifg:
+            if self.productPartModelName in self.AirFlowconifg[i]:
+                self.AirFlow = i
+                return True
+        self.AirFlow = None
+        return False
+
+    def get_psu_display_name(self):
+        if self.productPartModelName is None:
+            ret = self.get_fru_info()
+            if ret is False:
+                self.psu_display_name = None
+                return False
+        if self.psu_display_name_conifg is None:
+            self.psu_display_name = self.productPartModelName
+            return False
+        for i in self.psu_display_name_conifg:
+            if self.productPartModelName in self.psu_display_name_conifg[i]:
+                self.psu_display_name = i
+                return True
+        self.psu_display_name = self.productPartModelName
+        return False
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/rotor.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/rotor.py
new file mode 100644
index 000000000..ff120cb47
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/rotor.py
@@ -0,0 +1,149 @@
+#!/usr/bin/env python3
+#######################################################
+#
+# rotor.py
+# Python implementation of the Class rotor
+#
+#######################################################
+from plat_hal.devicebase import devicebase
+from plat_hal.sensor import sensor
+
+
+class rotor(devicebase):
+    __rotor_Running = None
+    __rotor_HwAlarm_conf = None
+    __rotor_Speed = None
+    __rotor_run_conf = None
+    __Speedconfig = None
+    __i2c_speed = None
+    __SpeedMin = None
+    __SpeedMax = None
+    __SpeedTolerance = None
+
+    def __init__(self, conf=None):
+        self.name = conf.get('name', None)
+        self.rotor_HwAlarm_conf = conf.get('HwAlarm', None)
+        self.rotor_run_conf = conf.get('Running', None)
+        self.SpeedMin = conf.get('SpeedMin', None)
+        self.SpeedMax = conf.get('SpeedMax', None)
+        self.Tolerance = conf.get('tolerance', 30)
+        self.rotor_Speed = sensor(conf.get('Speed', None))
+        self.Speedconfig = conf.get('Set_speed', None)
+
+    def getRunning(self):
+        ret, val = self.get_value(self.rotor_run_conf)
+        if ret is False or val is None or val == "no_support":
+            return False
+        if isinstance(val, str):
+            value = int(val, 16)
+        else:
+            value = val
+        mask = self.rotor_run_conf.get("mask")
+        is_runing_value = self.rotor_run_conf.get("is_runing")
+        flag = value & mask
+        if flag == is_runing_value:
+            return True
+        return False
+
+    @property
+    def SpeedMin(self):
+        return self.__SpeedMin
+
+    @SpeedMin.setter
+    def SpeedMin(self, val):
+        self.__SpeedMin = val
+
+    @property
+    def SpeedMax(self):
+        return self.__SpeedMax
+
+    @SpeedMax.setter
+    def SpeedMax(self, val):
+        self.__SpeedMax = val
+
+    @property
+    def Tolerance(self):
+        return self.__SpeedTolerance
+
+    @Tolerance.setter
+    def Tolerance(self, val):
+        self.__SpeedTolerance = val
+
+    @property
+    def i2c_speed(self):
+        ret, val = self.get_value(self.Speedconfig)
+        if ret is False:
+            return None
+        if val is not None:
+            self.__i2c_speed = val
+        return self.__i2c_speed
+
+    def feed_watchdog(self):
+        ret, val = self.get_value(self.Speedconfig)
+        if ret is False:
+            return False, None
+        if val is not None:
+            ret, val = self.set_value(self.Speedconfig, val)
+            return ret, val
+        return False, None
+
+    @i2c_speed.setter
+    def i2c_speed(self, val):
+        self.__i2c_speed = val
+
+    @property
+    def Speedconfig(self):
+        return self.__Speedconfig
+
+    @Speedconfig.setter
+    def Speedconfig(self, val):
+        self.__Speedconfig = val
+
+    @property
+    def rotor_run_conf(self):
+        return self.__rotor_run_conf
+
+    @rotor_run_conf.setter
+    def rotor_run_conf(self, val):
+        self.__rotor_run_conf = val
+
+    @property
+    def rotor_Speed(self):
+        return self.__rotor_Speed
+
+    @rotor_Speed.setter
+    def rotor_Speed(self, val):
+        self.__rotor_Speed = val
+
+    @property
+    def rotor_HwAlarm(self):
+        ret, val = self.get_value(self.rotor_HwAlarm_conf)
+        mask = self.rotor_HwAlarm_conf.get("mask")
+        no_alarm_value = self.rotor_HwAlarm_conf.get("no_alarm")
+        if ret is False or val is None:
+            return False
+        if isinstance(val, str):
+            value = int(val, 16)
+        else:
+            value = val
+        flag = value & mask
+        if flag == no_alarm_value:
+            return False
+        return True
+
+    @property
+    def rotor_HwAlarm_conf(self):
+        return self.__rotor_HwAlarm_conf
+
+    @rotor_HwAlarm_conf.setter
+    def rotor_HwAlarm_conf(self, val):
+        self.__rotor_HwAlarm_conf = val
+
+    @property
+    def rotor_Running(self):
+        self.__rotor_Running = self.getRunning()
+        return self.__rotor_Running
+
+    @rotor_Running.setter
+    def rotor_Running(self, val):
+        self.__rotor_Running = val
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/sensor.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/sensor.py
new file mode 100644
index 000000000..af2a5384b
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/sensor.py
@@ -0,0 +1,274 @@
+#!/usr/bin/env python3
+#######################################################
+#
+# sensor.py
+# Python implementation of the Class sensor
+#
+#######################################################
+import time
+from plat_hal.devicebase import devicebase
+
+
+class sensor(devicebase):
+
+    __Value = None
+    __Min = None
+    __Max = None
+    __Low = None
+    __High = None
+    __ValueConfig = None
+    __Flag = None
+    __Unit = None
+    __format = None
+    __read_times = None
+
+    __Min_config = None
+    __Max_config = None
+    __Low_config = None
+    __High_config = None
+
+    @property
+    def Min_config(self):
+        return self.__Min_config
+
+    @Min_config.setter
+    def Min_config(self, val):
+        self.__Min_config = val
+
+    @property
+    def Max_config(self):
+        return self.__Max_config
+
+    @Max_config.setter
+    def Max_config(self, val):
+        self.__Max_config = val
+
+    @property
+    def Low_config(self):
+        return self.__Low_config
+
+    @Low_config.setter
+    def Low_config(self, val):
+        self.__Low_config = val
+
+    @property
+    def High_config(self):
+        return self.__High_config
+
+    @High_config.setter
+    def High_config(self, val):
+        self.__High_config = val
+
+    @property
+    def Unit(self):
+        return self.__Unit
+
+    @Unit.setter
+    def Unit(self, val):
+        self.__Unit = val
+
+    @property
+    def format(self):
+        return self.__format
+
+    @format.setter
+    def format(self, val):
+        self.__format = val
+
+    @property
+    def read_times(self):
+        return self.__read_times
+
+    @read_times.setter
+    def read_times(self, val):
+        self.__read_times = val
+
+    @property
+    def ValueConfig(self):
+        return self.__ValueConfig
+
+    @ValueConfig.setter
+    def ValueConfig(self, val):
+        self.__ValueConfig = val
+
+    @property
+    def Flag(self):
+        return self.__Flag
+
+    @Flag.setter
+    def Flag(self, val):
+        self.__Flag = val
+
+    def get_median(self, value_config, read_times):
+        val_list = []
+        for i in range(0, read_times):
+            ret, real_value = self.get_value(value_config)
+            if i != (read_times - 1):
+                time.sleep(0.01)
+            if ret is False or real_value is None:
+                continue
+            val_list.append(real_value)
+        val_list.sort()
+        if val_list:
+            return True, val_list[int((len(val_list) - 1) / 2)]
+        return False, None
+
+    @property
+    def Value(self):
+        try:
+            ret, val = self.get_median(self.ValueConfig, self.read_times)
+            if ret is False or val is None:
+                return None
+            if self.format is None:
+                self.__Value = int(val)
+            else:
+                self.__Value = self.get_format_value(self.format % val)
+            self.__Value = round(float(self.__Value), 3)
+        except Exception:
+            return None
+        return self.__Value
+
+    @Value.setter
+    def Value(self, val):
+        self.__Value = val
+
+    @property
+    def Min(self):
+        try:
+            if isinstance(self.Min_config, dict):
+                if self.call_back is None:
+                    self.__Min = self.Min_config.get("other")
+                else:
+                    ret = self.call_back()
+                    if ret not in self.Min_config:
+                        self.__Min = self.Min_config.get("other")
+                    else:
+                        self.__Min = self.Min_config[ret]
+            else:
+                self.__Min = self.Min_config
+
+            if self.__Min is None:
+                return None
+
+            if self.format is not None:
+                self.__Min = self.get_format_value(self.format % self.__Min)
+            self.__Min = round(float(self.__Min), 3)
+        except Exception:
+            return None
+        return self.__Min
+
+    @Min.setter
+    def Min(self, val):
+        self.__Min = val
+
+    @property
+    def Max(self):
+        try:
+            if isinstance(self.Max_config, dict):
+                if self.call_back is None:
+                    self.__Max = self.Max_config.get("other")
+                else:
+                    ret = self.call_back()
+                    if ret not in self.Max_config:
+                        self.__Max = self.Max_config.get("other")
+                    else:
+                        self.__Max = self.Max_config[ret]
+            else:
+                self.__Max = self.Max_config
+
+            if self.__Max is None:
+                return None
+
+            if self.format is not None:
+                self.__Max = self.get_format_value(self.format % self.__Max)
+            self.__Max = round(float(self.__Max), 3)
+        except Exception:
+            return None
+        return self.__Max
+
+    @Max.setter
+    def Max(self, val):
+        self.__Max = val
+
+    @property
+    def Low(self):
+        try:
+            if isinstance(self.Low_config, dict):
+                if self.call_back is None:
+                    self.__Low = self.Low_config.get("other")
+                else:
+                    ret = self.call_back()
+                    if ret not in self.Low_config:
+                        self.__Low = self.Low_config.get("other")
+                    else:
+                        self.__Low = self.Low_config[ret]
+            else:
+                self.__Low = self.Low_config
+
+            if self.__Low is None:
+                return None
+
+            if self.format is not None:
+                self.__Low = self.get_format_value(self.format % self.__Low)
+            self.__Low = round(float(self.__Low), 3)
+        except Exception:
+            return None
+        return self.__Low
+
+    @Low.setter
+    def Low(self, val):
+        self.__Low = val
+
+    @property
+    def High(self):
+        try:
+            if isinstance(self.High_config, dict):
+                if self.call_back is None:
+                    self.__High = self.High_config.get("other")
+                else:
+                    ret = self.call_back()
+                    if ret not in self.High_config:
+                        self.__High = self.High_config.get("other")
+                    else:
+                        self.__High = self.High_config[ret]
+            else:
+                self.__High = self.High_config
+
+            if self.__High is None:
+                return None
+
+            if self.format is not None:
+                self.__High = self.get_format_value(self.format % self.__High)
+            self.__High = round(float(self.__High), 3)
+        except Exception:
+            return None
+        return self.__High
+
+    @High.setter
+    def High(self, val):
+        self.__High = val
+
+    def __init__(self, conf=None, call_back=None):
+        self.ValueConfig = conf.get("value", None)
+        self.Flag = conf.get("flag", None)
+        self.Min_config = conf.get("Min", None)
+        self.Max_config = conf.get("Max", None)
+        self.Low_config = conf.get("Low", None)
+        self.High_config = conf.get("High", None)
+        self.Unit = conf.get('Unit', None)
+        self.format = conf.get('format', None)
+        self.read_times = conf.get('read_times', 1)
+        self.call_back = call_back
+
+    def __str__(self):
+        formatstr =  \
+            "ValueConfig:                : %s \n" \
+            "Min :          %s \n" \
+            "Max : %s \n" \
+            "Unit  : %s \n" \
+            "format:       : %s \n"
+
+        tmpstr = formatstr % (self.ValueConfig, self.Min,
+                              self.Max, self.Unit,
+                              self.format)
+        return tmpstr
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/temp.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/temp.py
new file mode 100644
index 000000000..a202c2033
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/temp.py
@@ -0,0 +1,139 @@
+#!/usr/bin/env python3
+#######################################################
+#
+# temp.py
+# Python implementation of the Class temp
+#
+#######################################################
+import os
+import syslog
+from plat_hal.sensor import sensor
+
+
+PLATFORM_HAL_TEMP_DEBUG_FILE = "/etc/.platform_hal_temp_debug_flag"
+
+
+def platform_hal_temp_debug(s):
+    if os.path.exists(PLATFORM_HAL_TEMP_DEBUG_FILE):
+        syslog.openlog("PLATFORM_HAL_TEPM", syslog.LOG_PID)
+        syslog.syslog(syslog.LOG_DEBUG, s)
+
+
+class temp(sensor):
+    def __init__(self, conf=None):
+        super(temp, self).__init__(conf.get('Temperature', None))
+        self.name = conf.get("name", None)
+        self.temp_id = conf.get("temp_id", None)
+        self.api_name = conf.get("api_name", self.name)
+        self.fix_value = conf.get("fix_value", None)
+        self.temp_invalid = conf.get("invalid", None)
+        self.temp_error = conf.get("error", None)
+
+    def temp_cali_by_fan_pwm(self, param, origin_value):
+        fan_pwm_conf = param.get("fan_pwm")
+        temp_fix_list = param.get("temp_fix_list")
+
+        ret, val = self.get_value(fan_pwm_conf)
+        if ret is False or val is None:
+            platform_hal_temp_debug("temp calibration get fan pwm failed, msg: %s, return None" % (val))
+            return None
+
+        fan_pwm = int(val)
+        for item in temp_fix_list:
+            if item["min"] <= fan_pwm <= item["max"]:
+                fix_value = origin_value + item["fix"]
+                platform_hal_temp_debug("temp calibration by fan pwm, origin_value: %s, pwm: %s, fix_value: %s" %
+                                        (origin_value, fan_pwm, fix_value))
+                return fix_value
+        platform_hal_temp_debug("temp calibration by fan pwm, origin_value: %s, pwm: %s, not match return None" %
+                                (origin_value, fan_pwm))
+        return None
+
+    def fix_temp_value(self, origin_value):
+        try:
+            fix_type = self.fix_value.get("fix_type")
+
+            if fix_type == "func":
+                func_name = self.fix_value.get("func_name")
+                func_param = self.fix_value.get("func_param")
+                func = getattr(self, func_name)
+                if func is None:
+                    platform_hal_temp_debug("function %s, not defined" % func_name)
+                    return None
+                value = func(func_param, origin_value)
+                return value
+
+            if fix_type == "config":
+                coefficient = self.fix_value.get("coefficient", 1)
+                addend = self.fix_value.get("addend", 0)
+                value = (origin_value + addend) * coefficient
+                platform_hal_temp_debug("temp calibration by config, coefficient: %s, addend: %s, origin_value: %s, fix_value: %s" %
+                                        (coefficient, addend, origin_value, value))
+                return value
+
+            platform_hal_temp_debug("unsupport fix type: %s, return origin value: %s" % (fix_type, origin_value))
+            return origin_value
+        except Exception as e:
+            platform_hal_temp_debug("fix_temp_value raise exception, msg: %s" % (str(e)))
+            return None
+
+    def get_max_value(self, conf):
+        try:
+            ret, val = self.get_value(conf)
+            if ret is False or val is None:
+                return None
+            return val
+        except Exception:
+            return None
+
+    def check_flag(self):
+        try:
+            okbit = self.Flag.get('okbit')
+            okval = self.Flag.get('okval')
+            ret, val = self.get_value(self.Flag)
+            if (ret is False) or (val is None):
+                return False
+            val_t = (int(val) & (1 << okbit)) >> okbit
+            if val_t != okval:
+                return False
+        except Exception:
+            return False
+        return True
+
+    @property
+    def Value(self):
+        try:
+            if self.Flag is not None:
+                if self.check_flag() is False:
+                    return None
+            if isinstance(self.ValueConfig, list):
+                max_val = None
+                for i in self.ValueConfig:
+                    tmp = self.get_max_value(i)
+                    if tmp is None:
+                        continue
+                    if max_val is None or max_val < tmp:
+                        max_val = tmp
+                if max_val is None:
+                    return None
+                if self.format is None:
+                    self.__Value = int(max_val)
+                else:
+                    self.__Value = self.get_format_value(self.format % max_val)
+            else:
+                ret, val = self.get_value(self.ValueConfig)
+                if ret is False or val is None:
+                    return None
+                if self.format is None:
+                    self.__Value = int(val)
+                else:
+                    self.__Value = self.get_format_value(self.format % val)
+        except Exception:
+            return None
+        if self.fix_value is not None and self.__Value != self.temp_invalid and self.__Value != self.temp_error:
+            self.__Value = self.fix_temp_value(self.__Value)
+        return self.__Value
+
+    @Value.setter
+    def Value(self, val):
+        self.__Value = val
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/restful_util/__init__.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/restful_util/__init__.py
new file mode 100755
index 000000000..e69de29bb
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/restful_util/restful_api.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/restful_util/restful_api.py
new file mode 100755
index 000000000..2cb7f5273
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/lib/restful_util/restful_api.py
@@ -0,0 +1,89 @@
+#!/usr/bin/env python3
+# -*- coding: utf-8 -*-
+
+import os
+import syslog
+
+import requests
+
+class RestfulApiClient():
+    Debug_file = "/tmp/restful_api_debug"
+    BmcBaseUrl = 'http://240.1.1.2:8080'
+    NetworkUrl = '/api/v1.0/network'
+    PowerUrl = '/api/v1.0/power'
+    HostnameUrl = '/api/v1.0/hostname'
+    EventsUrl = '/api/v1.0/events'
+    SensorsUrl = '/api/v1.0/sys_switch/sensors'
+    SyseepromUrl = '/api/v1.0/syseeprom'
+    FansUrl = '/api/v1.0/sys_switch/fans'
+    # FanUrl = '/api/v1.0/sys_switch/fan/fan1'
+    FanUrl = '/api/v1.0/sys_switch/fan/'
+    PsusUrl = '/api/v1.0/sys_switch/psus'
+    # PsuUrl = '/api/v1.0/sys_switch/psu/psu1'
+    PsuUrl = '/api/v1.0/sys_switch/psu/'
+    LEDsUrl = '/api/v1.0/sys_switch/leds'
+    FirmwaresUrl = '/api/v1.0/sys_switch/firmwares'
+    WatchdogsUrl = '/api/v1.0/watchdog-lambda-os'
+    UsersUrl = '/api/v1.0/users'
+    TimeUrl = '/api/v1.0/time'
+    TimezoneUrl = '/api/v1.0/timezone'
+    NtpUrl = '/api/v1.0/ntp'
+    PowerUrl = '/api/v1.0/power'
+
+    def restful_api_error_log(self, msg):
+        syslog.openlog("restful_api")
+        syslog.syslog(syslog.LOG_ERR, msg)
+        syslog.closelog()
+
+    def restful_api_debug_log(self, msg):
+        if os.path.exists(self.Debug_file):
+            syslog.openlog("restful_api")
+            syslog.syslog(syslog.LOG_DEBUG, msg)
+            syslog.closelog()
+
+    def get_request(self, url, time_out=(30, 30)):
+        try:
+            full_url = self.BmcBaseUrl + url
+            self.restful_api_debug_log("GET: %s" % full_url)
+            response = requests.get(full_url, timeout=time_out)
+            self.restful_api_debug_log("RET: %s" % str(response.json()))
+            return response.json()
+        except Exception as e:
+            self.restful_api_error_log(str(e))
+            return None
+
+    def post_request(self, url, data, time_out=(30, 30)):
+        try:
+            full_url = self.BmcBaseUrl + url
+            self.restful_api_debug_log("POST: %s -d %s" % (full_url, str(data)))
+            response = requests.post(full_url, json=data, timeout=time_out)
+            if response.status_code == 200:
+                self.restful_api_debug_log("RET: %s" % str(response.json()))
+                return response.json()
+            else:
+                self.restful_api_error_log("Post request failed. Status code {}".format(response.status_code))
+                return None
+        except Exception as e:
+            self.restful_api_error_log(str(e))
+            return None
+'''
+if __name__ == '__main__':
+    client = RestfulApiClient()
+
+    time_data = client.get_request(client.TimeUrl)
+    print("Current time:", time_data)
+
+    fans = client.get_request(client.FansUrl)
+    print("Current fans:", fans)
+
+    new_time = "2023-08-31 14:41:28 +0800"
+    response = client.post_request(client.TimeUrl, {"time": new_time})
+    print("Time set successfully:", response)
+
+    cmd = "bmc reset cold"
+    response = client.post_request(client.PowerUrl, {"cmd": cmd})
+    print("Time set successfully:", response)
+
+    #sensors = client.get_request(client.SensorsUrl)
+    #print("sensors:", sensors)
+'''
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/wbutil/__init__.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/wbutil/__init__.py
new file mode 100644
index 000000000..e69de29bb
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/wbutil/baseutil.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/wbutil/baseutil.py
new file mode 100644
index 000000000..340a1f7a7
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/lib/wbutil/baseutil.py
@@ -0,0 +1,38 @@
+#!/usr/bin/env python3
+import os
+
+
+def get_machine_info():
+    if not os.path.isfile('/host/machine.conf'):
+        return None
+    machine_vars = {}
+    with open('/host/machine.conf') as machine_file:
+        for line in machine_file:
+            tokens = line.split('=')
+            if len(tokens) < 2:
+                continue
+            machine_vars[tokens[0]] = tokens[1].strip()
+    return machine_vars
+
+
+def get_platform_info(machine_info):
+    if machine_info is not None:
+        if 'onie_platform' in machine_info:
+            return machine_info['onie_platform']
+        if 'aboot_platform' in machine_info:
+            return machine_info['aboot_platform']
+    return None
+
+
+def get_board_id(machine_info):
+    if machine_info is not None:
+        if 'onie_board_id' in machine_info:
+            return machine_info['onie_board_id'].lower()
+    return "NA"
+
+
+def get_onie_machine(machine_info):
+    if machine_info is not None:
+        if 'onie_machine' in machine_info:
+            return machine_info['onie_machine']
+    return None
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/wbutil/smbus.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/wbutil/smbus.py
new file mode 100644
index 000000000..5f1659b3b
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/lib/wbutil/smbus.py
@@ -0,0 +1,772 @@
+#!/usr/bin/env python3
+# smbus2 - A drop-in replacement for smbus-cffi/smbus-python
+# The MIT License (MIT)
+# Copyright (c) 2017 Karl-Petter Lindegaard
+#
+# Permission is hereby granted, free of charge, to any person obtaining a copy
+# of this software and associated documentation files (the "Software"), to deal
+# in the Software without restriction, including without limitation the rights
+# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+# copies of the Software, and to permit persons to whom the Software is
+# furnished to do so, subject to the following conditions:
+#
+# The above copyright notice and this permission notice shall be included in all
+# copies or substantial portions of the Software.
+#
+# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+# SOFTWARE.
+
+import os
+import sys
+from fcntl import ioctl
+from ctypes import c_uint32, c_uint8, c_uint16, c_char, POINTER, Structure, Array, Union, create_string_buffer, string_at
+
+
+# Commands from uapi/linux/i2c-dev.h
+I2C_SLAVE = 0x0703  # Use this slave address
+I2C_SLAVE_FORCE = 0x0706  # Use this slave address, even if it is already in use by a driver!
+I2C_FUNCS = 0x0705  # Get the adapter functionality mask
+I2C_RDWR = 0x0707  # Combined R/W transfer (one STOP only)
+I2C_SMBUS = 0x0720  # SMBus transfer. Takes pointer to i2c_smbus_ioctl_data
+I2C_PEC = 0x0708
+
+# SMBus transfer read or write markers from uapi/linux/i2c.h
+I2C_SMBUS_WRITE = 0
+I2C_SMBUS_READ = 1
+
+# Size identifiers uapi/linux/i2c.h
+I2C_SMBUS_QUICK = 0
+I2C_SMBUS_BYTE = 1
+I2C_SMBUS_BYTE_DATA = 2
+I2C_SMBUS_WORD_DATA = 3
+I2C_SMBUS_PROC_CALL = 4
+# This isn't supported by Pure-I2C drivers with SMBUS emulation, like those in RaspberryPi, OrangePi, etc :(
+I2C_SMBUS_BLOCK_DATA = 5
+I2C_SMBUS_BLOCK_PROC_CALL = 7  # Like I2C_SMBUS_BLOCK_DATA, it isn't supported by Pure-I2C drivers either.
+I2C_SMBUS_I2C_BLOCK_DATA = 8
+I2C_SMBUS_BLOCK_MAX = 32
+
+# To determine what functionality is present (uapi/linux/i2c.h)
+try:
+    from enum import IntFlag
+except ImportError:
+    IntFlag = int
+
+
+class I2cFunc(IntFlag):
+    """
+    These flags identify the operations supported by an I2C/SMBus device.
+
+    You can test these flags on your `smbus.funcs`
+
+    On newer python versions, I2cFunc is an IntFlag enum, but it
+    falls back to class with a bunch of int constants on older releases.
+    """
+    I2C = 0x00000001
+    ADDR_10BIT = 0x00000002
+    PROTOCOL_MANGLING = 0x00000004  # I2C_M_IGNORE_NAK etc.
+    SMBUS_PEC = 0x00000008
+    NOSTART = 0x00000010  # I2C_M_NOSTART
+    SLAVE = 0x00000020
+    SMBUS_BLOCK_PROC_CALL = 0x00008000  # SMBus 2.0
+    SMBUS_QUICK = 0x00010000
+    SMBUS_READ_BYTE = 0x00020000
+    SMBUS_WRITE_BYTE = 0x00040000
+    SMBUS_READ_BYTE_DATA = 0x00080000
+    SMBUS_WRITE_BYTE_DATA = 0x00100000
+    SMBUS_READ_WORD_DATA = 0x00200000
+    SMBUS_WRITE_WORD_DATA = 0x00400000
+    SMBUS_PROC_CALL = 0x00800000
+    SMBUS_READ_BLOCK_DATA = 0x01000000
+    SMBUS_WRITE_BLOCK_DATA = 0x02000000
+    SMBUS_READ_I2C_BLOCK = 0x04000000  # I2C-like block xfer
+    SMBUS_WRITE_I2C_BLOCK = 0x08000000  # w/ 1-byte reg. addr.
+    SMBUS_HOST_NOTIFY = 0x10000000
+
+    SMBUS_BYTE = 0x00060000
+    SMBUS_BYTE_DATA = 0x00180000
+    SMBUS_WORD_DATA = 0x00600000
+    SMBUS_BLOCK_DATA = 0x03000000
+    SMBUS_I2C_BLOCK = 0x0c000000
+    SMBUS_EMUL = 0x0eff0008
+
+
+# i2c_msg flags from uapi/linux/i2c.h
+I2C_M_RD = 0x0001
+
+# Pointer definitions
+LP_c_uint8 = POINTER(c_uint8)
+LP_c_uint16 = POINTER(c_uint16)
+LP_c_uint32 = POINTER(c_uint32)
+
+
+#############################################################
+# Type definitions as in i2c.h
+
+
+class i2c_smbus_data(Array):
+    """
+    Adaptation of the i2c_smbus_data union in ``i2c.h``.
+
+    Data for SMBus messages.
+    """
+    _length_ = I2C_SMBUS_BLOCK_MAX + 2
+    _type_ = c_uint8
+
+
+class union_i2c_smbus_data(Union):
+    _fields_ = [
+        ("byte", c_uint8),
+        ("word", c_uint16),
+        ("block", i2c_smbus_data)
+    ]
+
+
+union_pointer_type = POINTER(union_i2c_smbus_data)
+
+
+class i2c_smbus_ioctl_data(Structure):
+    """
+    As defined in ``i2c-dev.h``.
+    """
+    _fields_ = [
+        ('read_write', c_uint8),
+        ('command', c_uint8),
+        ('size', c_uint32),
+        ('data', union_pointer_type)]
+    __slots__ = [name for name, type in _fields_]
+
+    @staticmethod
+    def create(read_write=I2C_SMBUS_READ, command=0, size=I2C_SMBUS_BYTE_DATA):
+        u = union_i2c_smbus_data()
+        return i2c_smbus_ioctl_data(
+            read_write=read_write, command=command, size=size,
+            data=union_pointer_type(u))
+
+
+#############################################################
+# Type definitions for i2c_rdwr combined transactions
+
+
+class i2c_msg(Structure):
+    """
+    As defined in ``i2c.h``.
+    """
+    _fields_ = [
+        ('addr', c_uint16),
+        ('flags', c_uint16),
+        ('len', c_uint16),
+        ('buf', POINTER(c_char))]
+
+    def __iter__(self):
+        """ Iterator / Generator
+
+        :return: iterates over :py:attr:`buf`
+        :rtype: :py:class:`generator` which returns int values
+        """
+        idx = 0
+        while idx < self.len:
+            yield ord(self.buf[idx])
+            idx += 1
+
+    def __len__(self):
+        return self.len
+
+    def __bytes__(self):
+        return string_at(self.buf, self.len)
+
+    def __repr__(self):
+        return 'i2c_msg(%d,%d,%r)' % (self.addr, self.flags, self.__bytes__())
+
+    def __str__(self):
+        s = self.__bytes__()
+        if sys.version_info.major >= 3:
+            s = ''.join(map(chr, s))
+        return s
+
+    @staticmethod
+    def read(address, length):
+        """
+        Prepares an i2c read transaction.
+
+        :param address: Slave address.
+        :type: address: int
+        :param length: Number of bytes to read.
+        :type: length: int
+        :return: New :py:class:`i2c_msg` instance for read operation.
+        :rtype: :py:class:`i2c_msg`
+        """
+        arr = create_string_buffer(length)
+        return i2c_msg(
+            addr=address, flags=I2C_M_RD, len=length,
+            buf=arr)
+
+    @staticmethod
+    def write(address, buf):
+        """
+        Prepares an i2c write transaction.
+
+        :param address: Slave address.
+        :type address: int
+        :param buf: Bytes to write. Either list of values or str.
+        :type buf: list
+        :return: New :py:class:`i2c_msg` instance for write operation.
+        :rtype: :py:class:`i2c_msg`
+        """
+        if sys.version_info.major >= 3:
+            if isinstance(buf, str):
+                buf = bytes(map(ord, buf))
+            else:
+                buf = bytes(buf)
+        else:
+            if not isinstance(buf, str):
+                buf = ''.join([chr(x) for x in buf])
+        arr = create_string_buffer(buf, len(buf))
+        return i2c_msg(
+            addr=address, flags=0, len=len(arr),
+            buf=arr)
+
+
+class i2c_rdwr_ioctl_data(Structure):
+    """
+    As defined in ``i2c-dev.h``.
+    """
+    _fields_ = [
+        ('msgs', POINTER(i2c_msg)),
+        ('nmsgs', c_uint32)
+    ]
+    __slots__ = [name for name, type in _fields_]
+
+    @staticmethod
+    def create(*i2c_msg_instances):
+        """
+        Factory method for creating a i2c_rdwr_ioctl_data struct that can
+        be called with ``ioctl(fd, I2C_RDWR, data)``.
+
+        :param i2c_msg_instances: Up to 42 i2c_msg instances
+        :rtype: i2c_rdwr_ioctl_data
+        """
+        n_msg = len(i2c_msg_instances)
+        msg_array = (i2c_msg * n_msg)(*i2c_msg_instances)
+        return i2c_rdwr_ioctl_data(
+            msgs=msg_array,
+            nmsgs=n_msg
+        )
+
+
+#############################################################
+
+
+class SMBus(object):
+
+    def __init__(self, bus=None, force=False):
+        """
+        Initialize and (optionally) open an i2c bus connection.
+
+        :param bus: i2c bus number (e.g. 0 or 1)
+            or an absolute file path (e.g. `/dev/i2c-42`).
+            If not given, a subsequent  call to ``open()`` is required.
+        :type bus: int or str
+        :param force: force using the slave address even when driver is
+            already using it.
+        :type force: boolean
+        """
+        self.fd = None
+        self.funcs = I2cFunc(0)
+        if bus is not None:
+            self.open(bus)
+        self.address = None
+        self.force = force
+        self._force_last = None
+
+    def __enter__(self):
+        """Enter handler."""
+        return self
+
+    def __exit__(self, exc_type, exc_val, exc_tb):
+        """Exit handler."""
+        self.close()
+
+    def open(self, bus):
+        """
+        Open a given i2c bus.
+
+        :param bus: i2c bus number (e.g. 0 or 1)
+            or an absolute file path (e.g. '/dev/i2c-42').
+        :type bus: int or str
+        :raise TypeError: if type(bus) is not in (int, str)
+        """
+        if isinstance(bus, int):
+            filepath = "/dev/i2c-{}".format(bus)
+        elif isinstance(bus, str):
+            filepath = bus
+        else:
+            raise TypeError("Unexpected type(bus)={}".format(type(bus)))
+
+        self.fd = os.open(filepath, os.O_RDWR)
+        self.funcs = self._get_funcs()
+
+    def close(self):
+        """
+        Close the i2c connection.
+        """
+        if self.fd:
+            os.close(self.fd)
+            self.fd = None
+
+    def _set_address(self, address, force=None):
+        """
+        Set i2c slave address to use for subsequent calls.
+
+        :param address:
+        :type address: int
+        :param force:
+        :type force: Boolean
+        """
+        force = force if force is not None else self.force
+        if self.address != address or self._force_last != force:
+            if force is True:
+                ioctl(self.fd, I2C_SLAVE_FORCE, address)
+            else:
+                ioctl(self.fd, I2C_SLAVE, address)
+            self.address = address
+            self._force_last = force
+
+    def _get_funcs(self):
+        """
+        Returns a 32-bit value stating supported I2C functions.
+
+        :rtype: int
+        """
+        f = c_uint32()
+        ioctl(self.fd, I2C_FUNCS, f)
+        return f.value
+
+    def write_quick(self, i2c_addr, force=None):
+        """
+        Perform quick transaction. Throws IOError if unsuccessful.
+        :param i2c_addr: i2c address
+        :type i2c_addr: int
+        :param force:
+        :type force: Boolean
+        """
+        self._set_address(i2c_addr, force=force)
+        msg = i2c_smbus_ioctl_data.create(
+            read_write=I2C_SMBUS_WRITE, command=0, size=I2C_SMBUS_QUICK)
+        ioctl(self.fd, I2C_SMBUS, msg)
+
+    def read_byte(self, i2c_addr, force=None):
+        """
+        Read a single byte from a device.
+
+        :rtype: int
+        :param i2c_addr: i2c address
+        :type i2c_addr: int
+        :param force:
+        :type force: Boolean
+        :return: Read byte value
+        """
+        self._set_address(i2c_addr, force=force)
+        msg = i2c_smbus_ioctl_data.create(
+            read_write=I2C_SMBUS_READ, command=0, size=I2C_SMBUS_BYTE
+        )
+        ioctl(self.fd, I2C_SMBUS, msg)
+        return msg.data.contents.byte
+
+    def write_byte(self, i2c_addr, value, force=None):
+        """
+        Write a single byte to a device.
+
+        :param i2c_addr: i2c address
+        :type i2c_addr: int
+        :param value: value to write
+        :type value: int
+        :param force:
+        :type force: Boolean
+        """
+        self._set_address(i2c_addr, force=force)
+        msg = i2c_smbus_ioctl_data.create(
+            read_write=I2C_SMBUS_WRITE, command=value, size=I2C_SMBUS_BYTE
+        )
+        ioctl(self.fd, I2C_SMBUS, msg)
+
+    def read_byte_data(self, i2c_addr, register, force=None):
+        """
+        Read a single byte from a designated register.
+
+        :param i2c_addr: i2c address
+        :type i2c_addr: int
+        :param register: Register to read
+        :type register: int
+        :param force:
+        :type force: Boolean
+        :return: Read byte value
+        :rtype: int
+        """
+        val_t = -1
+        returnmsg = ""
+        try:
+            self._set_address(i2c_addr, force=force)
+            msg = i2c_smbus_ioctl_data.create(
+                read_write=I2C_SMBUS_READ, command=register, size=I2C_SMBUS_BYTE_DATA
+            )
+            val_t = ioctl(self.fd, I2C_SMBUS, msg)
+        except Exception as e:
+            self.close()
+            returnmsg = str(e)
+        if val_t < 0:
+            return False, returnmsg
+        return True, msg.data.contents.byte
+
+    def write_byte_data(self, i2c_addr, register, value, force=None):
+        """
+        Write a byte to a given register.
+
+        :param i2c_addr: i2c address
+        :type i2c_addr: int
+        :param register: Register to write to
+        :type register: int
+        :param value: Byte value to transmit
+        :type value: int
+        :param force:
+        :type force: Boolean
+        :rtype: None
+        """
+        val_t = -1
+        returnmsg = ""
+        try:
+            self._set_address(i2c_addr, force=force)
+            msg = i2c_smbus_ioctl_data.create(
+                read_write=I2C_SMBUS_WRITE, command=register, size=I2C_SMBUS_BYTE_DATA
+            )
+            msg.data.contents.byte = value
+            val_t = ioctl(self.fd, I2C_SMBUS, msg)
+        except Exception as e:
+            returnmsg = str(e)
+            self.close()
+        if val_t < 0:
+            return False, returnmsg or ""
+        return True, ""
+
+    def write_byte_data_pec(self, i2c_addr, register, value, force=None):
+        """
+        Write a byte to a given register.
+
+        :param i2c_addr: i2c address
+        :type i2c_addr: int
+        :param register: Register to write to
+        :type register: int
+        :param value: Byte value to transmit
+        :type value: int
+        :param force:
+        :type force: Boolean
+        :rtype: None
+        """
+        val_t = -1
+        returnmsg = ""
+        try:
+            val_t = ioctl(self.fd, I2C_PEC, 1)
+            if val_t < 0:
+                raise Exception("set pec mod error")
+            self._set_address(i2c_addr, force=force)
+            msg = i2c_smbus_ioctl_data.create(
+                read_write=I2C_SMBUS_WRITE, command=register, size=I2C_SMBUS_BYTE_DATA
+            )
+            msg.data.contents.byte = value
+            val_t = ioctl(self.fd, I2C_SMBUS, msg)
+        except Exception as e:
+            returnmsg = str(e)
+            self.close()
+        if val_t < 0:
+            return False, returnmsg or ""
+        return True, ""
+
+    def read_word_data(self, i2c_addr, register, force=None):
+        """
+        Read a single word (2 bytes) from a given register.
+
+        :param i2c_addr: i2c address
+        :type i2c_addr: int
+        :param register: Register to read
+        :type register: int
+        :param force:
+        :type force: Boolean
+        :return: 2-byte word
+        :rtype: int
+        """
+        val_t = -1
+        returnmsg = ""
+        try:
+            self._set_address(i2c_addr, force=force)
+            msg = i2c_smbus_ioctl_data.create(
+                read_write=I2C_SMBUS_READ, command=register, size=I2C_SMBUS_WORD_DATA
+            )
+            val_t = ioctl(self.fd, I2C_SMBUS, msg)
+        except Exception as e:
+            returnmsg = str(e)
+            self.close()
+        if val_t < 0:
+            return False, returnmsg or ""
+        return True, msg.data.contents.word
+
+    def write_word_data_pec(self, i2c_addr, register, value, force=None):
+        """
+        Write a byte to a given register.
+
+        :param i2c_addr: i2c address
+        :type i2c_addr: int
+        :param register: Register to write to
+        :type register: int
+        :param value: Word value to transmit
+        :type value: int
+        :param force:
+        :type force: Boolean
+        :rtype: None
+        """
+        val_t = -1
+        returnmsg = ""
+        try:
+            val_t = ioctl(self.fd, I2C_PEC, 1)
+            if val_t < 0:
+                raise Exception("set pec mod error")
+            self._set_address(i2c_addr, force=force)
+            msg = i2c_smbus_ioctl_data.create(
+                read_write=I2C_SMBUS_WRITE, command=register, size=I2C_SMBUS_WORD_DATA
+            )
+            msg.data.contents.word = value
+            val_t = ioctl(self.fd, I2C_SMBUS, msg)
+        except Exception as e:
+            returnmsg = str(e)
+            self.close()
+        if val_t < 0:
+            return False, returnmsg or ""
+        return True, ""
+
+    def write_word_data(self, i2c_addr, register, value, force=None):
+        """
+        Write a byte to a given register.
+
+        :param i2c_addr: i2c address
+        :type i2c_addr: int
+        :param register: Register to write to
+        :type register: int
+        :param value: Word value to transmit
+        :type value: int
+        :param force:
+        :type force: Boolean
+        :rtype: None
+        """
+        val_t = -1
+        returnmsg = ""
+        try:
+            self._set_address(i2c_addr, force=force)
+            msg = i2c_smbus_ioctl_data.create(
+                read_write=I2C_SMBUS_WRITE, command=register, size=I2C_SMBUS_WORD_DATA
+            )
+            msg.data.contents.word = value
+            val_t = ioctl(self.fd, I2C_SMBUS, msg)
+        except Exception as e:
+            returnmsg = str(e)
+            self.close()
+        if val_t < 0:
+            return False, returnmsg or ""
+        return True, ""
+
+    def process_call(self, i2c_addr, register, value, force=None):
+        """
+        Executes a SMBus Process Call, sending a 16-bit value and receiving a 16-bit response
+
+        :param i2c_addr: i2c address
+        :type i2c_addr: int
+        :param register: Register to read/write to
+        :type register: int
+        :param value: Word value to transmit
+        :type value: int
+        :param force:
+        :type force: Boolean
+        :rtype: int
+        """
+        self._set_address(i2c_addr, force=force)
+        msg = i2c_smbus_ioctl_data.create(
+            read_write=I2C_SMBUS_WRITE, command=register, size=I2C_SMBUS_PROC_CALL
+        )
+        msg.data.contents.word = value
+        ioctl(self.fd, I2C_SMBUS, msg)
+        return msg.data.contents.word
+
+    def read_block_data(self, i2c_addr, register, force=None):
+        """
+        Read a block of up to 32-bytes from a given register.
+
+        :param i2c_addr: i2c address
+        :type i2c_addr: int
+        :param register: Start register
+        :type register: int
+        :param force:
+        :type force: Boolean
+        :return: List of bytes
+        :rtype: list
+        """
+        self._set_address(i2c_addr, force=force)
+        msg = i2c_smbus_ioctl_data.create(
+            read_write=I2C_SMBUS_READ, command=register, size=I2C_SMBUS_BLOCK_DATA
+        )
+        ioctl(self.fd, I2C_SMBUS, msg)
+        length = msg.data.contents.block[0]
+        return msg.data.contents.block[1:length + 1]
+
+    def write_block_data(self, i2c_addr, register, data, force=None):
+        """
+        Write a block of byte data to a given register.
+
+        :param i2c_addr: i2c address
+        :type i2c_addr: int
+        :param register: Start register
+        :type register: int
+        :param data: List of bytes
+        :type data: list
+        :param force:
+        :type force: Boolean
+        :rtype: None
+        """
+        length = len(data)
+        if length > I2C_SMBUS_BLOCK_MAX:
+            raise ValueError("Data length cannot exceed %d bytes" % I2C_SMBUS_BLOCK_MAX)
+        self._set_address(i2c_addr, force=force)
+        msg = i2c_smbus_ioctl_data.create(
+            read_write=I2C_SMBUS_WRITE, command=register, size=I2C_SMBUS_BLOCK_DATA
+        )
+        msg.data.contents.block[0] = length
+        msg.data.contents.block[1:length + 1] = data
+        ioctl(self.fd, I2C_SMBUS, msg)
+
+    def block_process_call(self, i2c_addr, register, data, force=None):
+        """
+        Executes a SMBus Block Process Call, sending a variable-size data
+        block and receiving another variable-size response
+
+        :param i2c_addr: i2c address
+        :type i2c_addr: int
+        :param register: Register to read/write to
+        :type register: int
+        :param data: List of bytes
+        :type data: list
+        :param force:
+        :type force: Boolean
+        :return: List of bytes
+        :rtype: list
+        """
+        length = len(data)
+        if length > I2C_SMBUS_BLOCK_MAX:
+            raise ValueError("Data length cannot exceed %d bytes" % I2C_SMBUS_BLOCK_MAX)
+        self._set_address(i2c_addr, force=force)
+        msg = i2c_smbus_ioctl_data.create(
+            read_write=I2C_SMBUS_WRITE, command=register, size=I2C_SMBUS_BLOCK_PROC_CALL
+        )
+        msg.data.contents.block[0] = length
+        msg.data.contents.block[1:length + 1] = data
+        ioctl(self.fd, I2C_SMBUS, msg)
+        length = msg.data.contents.block[0]
+        return msg.data.contents.block[1:length + 1]
+
+    def read_i2c_block_data(self, i2c_addr, register, length, force=None):
+        """
+        Read a block of byte data from a given register.
+
+        :param i2c_addr: i2c address
+        :type i2c_addr: int
+        :param register: Start register
+        :type register: int
+        :param length: Desired block length
+        :type length: int
+        :param force:
+        :type force: Boolean
+        :return: List of bytes
+        :rtype: list
+        """
+        if length > I2C_SMBUS_BLOCK_MAX:
+            raise ValueError("Desired block length over %d bytes" % I2C_SMBUS_BLOCK_MAX)
+        self._set_address(i2c_addr, force=force)
+        msg = i2c_smbus_ioctl_data.create(
+            read_write=I2C_SMBUS_READ, command=register, size=I2C_SMBUS_I2C_BLOCK_DATA
+        )
+        msg.data.contents.byte = length
+        ioctl(self.fd, I2C_SMBUS, msg)
+        return msg.data.contents.block[1:length + 1]
+
+    def write_i2c_block_data(self, i2c_addr, register, data, force=None):
+        """
+        Write a block of byte data to a given register.
+
+        :param i2c_addr: i2c address
+        :type i2c_addr: int
+        :param register: Start register
+        :type register: int
+        :param data: List of bytes
+        :type data: list
+        :param force:
+        :type force: Boolean
+        :rtype: None
+        """
+        length = len(data)
+        if length > I2C_SMBUS_BLOCK_MAX:
+            raise ValueError("Data length cannot exceed %d bytes" % I2C_SMBUS_BLOCK_MAX)
+        self._set_address(i2c_addr, force=force)
+        msg = i2c_smbus_ioctl_data.create(
+            read_write=I2C_SMBUS_WRITE, command=register, size=I2C_SMBUS_I2C_BLOCK_DATA
+        )
+        msg.data.contents.block[0] = length
+        msg.data.contents.block[1:length + 1] = data
+        ioctl(self.fd, I2C_SMBUS, msg)
+
+    def i2c_rdwr(self, *i2c_msgs):
+        """
+        Combine a series of i2c read and write operations in a single
+        transaction (with repeated start bits but no stop bits in between).
+
+        This method takes i2c_msg instances as input, which must be created
+        first with :py:meth:`i2c_msg.read` or :py:meth:`i2c_msg.write`.
+
+        :param i2c_msgs: One or more i2c_msg class instances.
+        :type i2c_msgs: i2c_msg
+        :rtype: None
+        """
+        ioctl_data = i2c_rdwr_ioctl_data.create(*i2c_msgs)
+        ioctl(self.fd, I2C_RDWR, ioctl_data)
+
+
+class SMBusWrapper:
+    """
+    Wrapper class around the SMBus.
+    Deprecated as of version 0.3.0. Please replace with :py:class:`SMBus`.
+
+    Enables the user to wrap access to the :py:class:`SMBus` class in a
+    "with" statement. If auto_cleanup is True (default), the
+    :py:class:`SMBus` handle will be automatically closed
+    upon exit of the ``with`` block.
+    """
+
+    def __init__(self, bus_number=0, auto_cleanup=True, force=False):
+        """
+        :param auto_cleanup: Close bus when leaving scope.
+        :type auto_cleanup: Boolean
+        :param force: Force using the slave address even when driver is already using it.
+        :type force: Boolean
+        """
+        self.bus_number = bus_number
+        self.auto_cleanup = auto_cleanup
+        self.force = force
+        self.bus = None
+
+    def __enter__(self):
+        self.bus = SMBus(bus=self.bus_number, force=self.force)
+        return self.bus
+
+    def __exit__(self, exc_type, exc_val, exc_tb):
+        if self.auto_cleanup:
+            self.bus.close()
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modprobe_conf/kernel_drivers_blacklist.conf b/platform/broadcom/sonic-platform-modules-micas/common/modprobe_conf/kernel_drivers_blacklist.conf
new file mode 100644
index 000000000..a49166ab6
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modprobe_conf/kernel_drivers_blacklist.conf
@@ -0,0 +1,3 @@
+blacklist wb_fpga_pcie
+blacklist wb_i2c_i801
+blacklist wb_i2c_ismt
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/COPYING b/platform/broadcom/sonic-platform-modules-micas/common/modules/COPYING
new file mode 100644
index 000000000..a635a38ef
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/COPYING
@@ -0,0 +1,20 @@
+The Linux Kernel is provided under:
+
+	SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note
+
+Being under the terms of the GNU General Public License version 2 only,
+according with:
+
+	LICENSES/preferred/GPL-2.0
+
+With an explicit syscall exception, as stated at:
+
+	LICENSES/exceptions/Linux-syscall-note
+
+In addition, other licenses may also apply. Please see:
+
+	Documentation/process/license-rules.rst
+
+for more details.
+
+All contributions to the Linux Kernel are subject to this COPYING file.
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/GPL-2.0 b/platform/broadcom/sonic-platform-modules-micas/common/modules/GPL-2.0
new file mode 100644
index 000000000..ff0812fd8
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/GPL-2.0
@@ -0,0 +1,359 @@
+Valid-License-Identifier: GPL-2.0
+Valid-License-Identifier: GPL-2.0-only
+Valid-License-Identifier: GPL-2.0+
+Valid-License-Identifier: GPL-2.0-or-later
+SPDX-URL: https://spdx.org/licenses/GPL-2.0.html
+Usage-Guide:
+  To use this license in source code, put one of the following SPDX
+  tag/value pairs into a comment according to the placement
+  guidelines in the licensing rules documentation.
+  For 'GNU General Public License (GPL) version 2 only' use:
+    SPDX-License-Identifier: GPL-2.0
+  or
+    SPDX-License-Identifier: GPL-2.0-only
+  For 'GNU General Public License (GPL) version 2 or any later version' use:
+    SPDX-License-Identifier: GPL-2.0+
+  or
+    SPDX-License-Identifier: GPL-2.0-or-later
+License-Text:
+
+		    GNU GENERAL PUBLIC LICENSE
+		       Version 2, June 1991
+
+ Copyright (C) 1989, 1991 Free Software Foundation, Inc.
+                       51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ Everyone is permitted to copy and distribute verbatim copies
+ of this license document, but changing it is not allowed.
+
+			    Preamble
+
+  The licenses for most software are designed to take away your
+freedom to share and change it.  By contrast, the GNU General Public
+License is intended to guarantee your freedom to share and change free
+software--to make sure the software is free for all its users.  This
+General Public License applies to most of the Free Software
+Foundation's software and to any other program whose authors commit to
+using it.  (Some other Free Software Foundation software is covered by
+the GNU Library General Public License instead.)  You can apply it to
+your programs, too.
+
+  When we speak of free software, we are referring to freedom, not
+price.  Our General Public Licenses are designed to make sure that you
+have the freedom to distribute copies of free software (and charge for
+this service if you wish), that you receive source code or can get it
+if you want it, that you can change the software or use pieces of it
+in new free programs; and that you know you can do these things.
+
+  To protect your rights, we need to make restrictions that forbid
+anyone to deny you these rights or to ask you to surrender the rights.
+These restrictions translate to certain responsibilities for you if you
+distribute copies of the software, or if you modify it.
+
+  For example, if you distribute copies of such a program, whether
+gratis or for a fee, you must give the recipients all the rights that
+you have.  You must make sure that they, too, receive or can get the
+source code.  And you must show them these terms so they know their
+rights.
+
+  We protect your rights with two steps: (1) copyright the software, and
+(2) offer you this license which gives you legal permission to copy,
+distribute and/or modify the software.
+
+  Also, for each author's protection and ours, we want to make certain
+that everyone understands that there is no warranty for this free
+software.  If the software is modified by someone else and passed on, we
+want its recipients to know that what they have is not the original, so
+that any problems introduced by others will not reflect on the original
+authors' reputations.
+
+  Finally, any free program is threatened constantly by software
+patents.  We wish to avoid the danger that redistributors of a free
+program will individually obtain patent licenses, in effect making the
+program proprietary.  To prevent this, we have made it clear that any
+patent must be licensed for everyone's free use or not licensed at all.
+
+  The precise terms and conditions for copying, distribution and
+modification follow.
+
+		    GNU GENERAL PUBLIC LICENSE
+   TERMS AND CONDITIONS FOR COPYING, DISTRIBUTION AND MODIFICATION
+
+  0. This License applies to any program or other work which contains
+a notice placed by the copyright holder saying it may be distributed
+under the terms of this General Public License.  The "Program", below,
+refers to any such program or work, and a "work based on the Program"
+means either the Program or any derivative work under copyright law:
+that is to say, a work containing the Program or a portion of it,
+either verbatim or with modifications and/or translated into another
+language.  (Hereinafter, translation is included without limitation in
+the term "modification".)  Each licensee is addressed as "you".
+
+Activities other than copying, distribution and modification are not
+covered by this License; they are outside its scope.  The act of
+running the Program is not restricted, and the output from the Program
+is covered only if its contents constitute a work based on the
+Program (independent of having been made by running the Program).
+Whether that is true depends on what the Program does.
+
+  1. You may copy and distribute verbatim copies of the Program's
+source code as you receive it, in any medium, provided that you
+conspicuously and appropriately publish on each copy an appropriate
+copyright notice and disclaimer of warranty; keep intact all the
+notices that refer to this License and to the absence of any warranty;
+and give any other recipients of the Program a copy of this License
+along with the Program.
+
+You may charge a fee for the physical act of transferring a copy, and
+you may at your option offer warranty protection in exchange for a fee.
+
+  2. You may modify your copy or copies of the Program or any portion
+of it, thus forming a work based on the Program, and copy and
+distribute such modifications or work under the terms of Section 1
+above, provided that you also meet all of these conditions:
+
+    a) You must cause the modified files to carry prominent notices
+    stating that you changed the files and the date of any change.
+
+    b) You must cause any work that you distribute or publish, that in
+    whole or in part contains or is derived from the Program or any
+    part thereof, to be licensed as a whole at no charge to all third
+    parties under the terms of this License.
+
+    c) If the modified program normally reads commands interactively
+    when run, you must cause it, when started running for such
+    interactive use in the most ordinary way, to print or display an
+    announcement including an appropriate copyright notice and a
+    notice that there is no warranty (or else, saying that you provide
+    a warranty) and that users may redistribute the program under
+    these conditions, and telling the user how to view a copy of this
+    License.  (Exception: if the Program itself is interactive but
+    does not normally print such an announcement, your work based on
+    the Program is not required to print an announcement.)
+
+These requirements apply to the modified work as a whole.  If
+identifiable sections of that work are not derived from the Program,
+and can be reasonably considered independent and separate works in
+themselves, then this License, and its terms, do not apply to those
+sections when you distribute them as separate works.  But when you
+distribute the same sections as part of a whole which is a work based
+on the Program, the distribution of the whole must be on the terms of
+this License, whose permissions for other licensees extend to the
+entire whole, and thus to each and every part regardless of who wrote it.
+
+Thus, it is not the intent of this section to claim rights or contest
+your rights to work written entirely by you; rather, the intent is to
+exercise the right to control the distribution of derivative or
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+
+In addition, mere aggregation of another work not based on the Program
+with the Program (or with a work based on the Program) on a volume of
+a storage or distribution medium does not bring the other work under
+the scope of this License.
+
+  3. You may copy and distribute the Program (or a work based on it,
+under Section 2) in object code or executable form under the terms of
+Sections 1 and 2 above provided that you also do one of the following:
+
+    a) Accompany it with the complete corresponding machine-readable
+    source code, which must be distributed under the terms of Sections
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+
+    b) Accompany it with a written offer, valid for at least three
+    years, to give any third party, for a charge no more than your
+    cost of physically performing source distribution, a complete
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+    customarily used for software interchange; or,
+
+    c) Accompany it with the information you received as to the offer
+    to distribute corresponding source code.  (This alternative is
+    allowed only for noncommercial distribution and only if you
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+The source code for a work means the preferred form of the work for
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+distribution of the source code, even though third parties are not
+compelled to copy the source along with the object code.
+
+  4. You may not copy, modify, sublicense, or distribute the Program
+except as expressly provided under this License.  Any attempt
+otherwise to copy, modify, sublicense or distribute the Program is
+void, and will automatically terminate your rights under this License.
+However, parties who have received copies, or rights, from you under
+this License will not have their licenses terminated so long as such
+parties remain in full compliance.
+
+  5. You are not required to accept this License, since you have not
+signed it.  However, nothing else grants you permission to modify or
+distribute the Program or its derivative works.  These actions are
+prohibited by law if you do not accept this License.  Therefore, by
+modifying or distributing the Program (or any work based on the
+Program), you indicate your acceptance of this License to do so, and
+all its terms and conditions for copying, distributing or modifying
+the Program or works based on it.
+
+  6. Each time you redistribute the Program (or any work based on the
+Program), the recipient automatically receives a license from the
+original licensor to copy, distribute or modify the Program subject to
+these terms and conditions.  You may not impose any further
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+You are not responsible for enforcing compliance by third parties to
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+
+  7. If, as a consequence of a court judgment or allegation of patent
+infringement or for any other reason (not limited to patent issues),
+conditions are imposed on you (whether by court order, agreement or
+otherwise) that contradict the conditions of this License, they do not
+excuse you from the conditions of this License.  If you cannot
+distribute so as to satisfy simultaneously your obligations under this
+License and any other pertinent obligations, then as a consequence you
+may not distribute the Program at all.  For example, if a patent
+license would not permit royalty-free redistribution of the Program by
+all those who receive copies directly or indirectly through you, then
+the only way you could satisfy both it and this License would be to
+refrain entirely from distribution of the Program.
+
+If any portion of this section is held invalid or unenforceable under
+any particular circumstance, the balance of the section is intended to
+apply and the section as a whole is intended to apply in other
+circumstances.
+
+It is not the purpose of this section to induce you to infringe any
+patents or other property right claims or to contest validity of any
+such claims; this section has the sole purpose of protecting the
+integrity of the free software distribution system, which is
+implemented by public license practices.  Many people have made
+generous contributions to the wide range of software distributed
+through that system in reliance on consistent application of that
+system; it is up to the author/donor to decide if he or she is willing
+to distribute software through any other system and a licensee cannot
+impose that choice.
+
+This section is intended to make thoroughly clear what is believed to
+be a consequence of the rest of this License.
+
+  8. If the distribution and/or use of the Program is restricted in
+certain countries either by patents or by copyrighted interfaces, the
+original copyright holder who places the Program under this License
+may add an explicit geographical distribution limitation excluding
+those countries, so that distribution is permitted only in or among
+countries not thus excluded.  In such case, this License incorporates
+the limitation as if written in the body of this License.
+
+  9. The Free Software Foundation may publish revised and/or new versions
+of the General Public License from time to time.  Such new versions will
+be similar in spirit to the present version, but may differ in detail to
+address new problems or concerns.
+
+Each version is given a distinguishing version number.  If the Program
+specifies a version number of this License which applies to it and "any
+later version", you have the option of following the terms and conditions
+either of that version or of any later version published by the Free
+Software Foundation.  If the Program does not specify a version number of
+this License, you may choose any version ever published by the Free Software
+Foundation.
+
+  10. If you wish to incorporate parts of the Program into other free
+programs whose distribution conditions are different, write to the author
+to ask for permission.  For software which is copyrighted by the Free
+Software Foundation, write to the Free Software Foundation; we sometimes
+make exceptions for this.  Our decision will be guided by the two goals
+of preserving the free status of all derivatives of our free software and
+of promoting the sharing and reuse of software generally.
+
+			    NO WARRANTY
+
+  11. BECAUSE THE PROGRAM IS LICENSED FREE OF CHARGE, THERE IS NO WARRANTY
+FOR THE PROGRAM, TO THE EXTENT PERMITTED BY APPLICABLE LAW.  EXCEPT WHEN
+OTHERWISE STATED IN WRITING THE COPYRIGHT HOLDERS AND/OR OTHER PARTIES
+PROVIDE THE PROGRAM "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESSED
+OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE ENTIRE RISK AS
+TO THE QUALITY AND PERFORMANCE OF THE PROGRAM IS WITH YOU.  SHOULD THE
+PROGRAM PROVE DEFECTIVE, YOU ASSUME THE COST OF ALL NECESSARY SERVICING,
+REPAIR OR CORRECTION.
+
+  12. IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING
+WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MAY MODIFY AND/OR
+REDISTRIBUTE THE PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU FOR DAMAGES,
+INCLUDING ANY GENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING
+OUT OF THE USE OR INABILITY TO USE THE PROGRAM (INCLUDING BUT NOT LIMITED
+TO LOSS OF DATA OR DATA BEING RENDERED INACCURATE OR LOSSES SUSTAINED BY
+YOU OR THIRD PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER
+PROGRAMS), EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE
+POSSIBILITY OF SUCH DAMAGES.
+
+		     END OF TERMS AND CONDITIONS
+
+	    How to Apply These Terms to Your New Programs
+
+  If you develop a new program, and you want it to be of the greatest
+possible use to the public, the best way to achieve this is to make it
+free software which everyone can redistribute and change under these terms.
+
+  To do so, attach the following notices to the program.  It is safest
+to attach them to the start of each source file to most effectively
+convey the exclusion of warranty; and each file should have at least
+the "copyright" line and a pointer to where the full notice is found.
+
+    <one line to give the program's name and a brief idea of what it does.>
+    Copyright (C) <year>  <name of author>
+
+    This program is free software; you can redistribute it and/or modify
+    it under the terms of the GNU General Public License as published by
+    the Free Software Foundation; either version 2 of the License, or
+    (at your option) any later version.
+
+    This program is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+    GNU General Public License for more details.
+
+    You should have received a copy of the GNU General Public License
+    along with this program; if not, write to the Free Software
+    Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+
+
+Also add information on how to contact you by electronic and paper mail.
+
+If the program is interactive, make it output a short notice like this
+when it starts in an interactive mode:
+
+    Gnomovision version 69, Copyright (C) year name of author
+    Gnomovision comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
+    This is free software, and you are welcome to redistribute it
+    under certain conditions; type `show c' for details.
+
+The hypothetical commands `show w' and `show c' should show the appropriate
+parts of the General Public License.  Of course, the commands you use may
+be called something other than `show w' and `show c'; they could even be
+mouse-clicks or menu items--whatever suits your program.
+
+You should also get your employer (if you work as a programmer) or your
+school, if any, to sign a "copyright disclaimer" for the program, if
+necessary.  Here is a sample; alter the names:
+
+  Yoyodyne, Inc., hereby disclaims all copyright interest in the program
+  `Gnomovision' (which makes passes at compilers) written by James Hacker.
+
+  <signature of Ty Coon>, 1 April 1989
+  Ty Coon, President of Vice
+
+This General Public License does not permit incorporating your program into
+proprietary programs.  If your program is a subroutine library, you may
+consider it more useful to permit linking proprietary applications with the
+library.  If this is what you want to do, use the GNU Library General
+Public License instead of this License.
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/Makefile b/platform/broadcom/sonic-platform-modules-micas/common/modules/Makefile
new file mode 100644
index 000000000..bacb3839e
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/Makefile
@@ -0,0 +1,52 @@
+PWD		= $(shell pwd)
+EXTRA_CFLAGS:= -I$(M)/include
+EXTRA_CFLAGS+= -Wall
+KVERSION   ?= $(shell uname -r)
+KERNEL_SRC ?=  /lib/modules/$(KVERSION)
+
+module_out_put_dir := $(PWD)/build
+export module_out_put_dir
+
+KERNEL_MODULES_SRC = $(PWD)/linux
+
+PLAT_SYSFS_DIR = $(PWD)/plat_sysfs
+PINCTRL = $(PWD)/pinctrl
+
+export PLAT_SYSFS_DIR
+
+platform_common-objs := platform_common_module.o dfd_tlveeprom.o
+obj-m += platform_common.o
+obj-m += wb_mac_bsc.o
+obj-m += wb_fpga_pcie.o
+obj-m += wb_pcie_dev.o
+obj-m += wb_fpga_i2c_bus_drv.o
+obj-m += wb_fpga_pca954x_drv.o
+obj-m += wb_lpc_drv.o
+obj-m += wb_i2c_dev.o
+obj-m += wb_platform_i2c_dev.o
+obj-m += wb_io_dev.o
+obj-m += wb_gpio_d1500.o
+obj-m += wb_gpio_device.o
+obj-m += wb_i2c_ocores.o
+obj-m += wb_spi_ocores.o
+obj-m += wb_spi_dev.o
+obj-m += wb_wdt.o
+obj-m += wb_spi_gpio_device.o
+obj-m += wb_xdpe132g5c.o
+obj-m += wb_uio_irq.o
+obj-m += hw_test.o
+obj-m += wb_mdio_gpio_device.o
+
+all :
+	$(MAKE) -C $(KERNEL_MODULES_SRC)
+	$(MAKE) -C $(PLAT_SYSFS_DIR)
+	$(MAKE) -C $(PINCTRL)
+	$(MAKE) -C $(KERNEL_SRC)/build M=$(PWD) modules
+	@if [ ! -d $(module_out_put_dir) ]; then mkdir -p $(module_out_put_dir) ;fi
+	cp -p  $(PWD)/*.ko $(module_out_put_dir)
+
+clean :
+	rm  -rf $(module_out_put_dir)
+	rm -f ${PWD}/*.o ${PWD}/*.ko ${PWD}/*.mod.c ${PWD}/.*.cmd ${PWD}/.*.o.d ${PWD}/*.mod
+	rm -f ${PWD}/Module.markers ${PWD}/Module.symvers ${PWD}/modules.order
+	rm -rf ${PWD}/.tmp_versions
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/dfd_tlveeprom.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/dfd_tlveeprom.c
new file mode 100644
index 000000000..0d6f38ecc
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/dfd_tlveeprom.c
@@ -0,0 +1,516 @@
+/*
+ * Copyright (C) 2003-2014 FreeIPMI Core Team
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
+/*****************************************************************************\
+ *  Copyright (C) 2007-2014 Lawrence Livermore National Security, LLC.
+ *  Copyright (C) 2007 The Regents of the University of California.
+ *  Produced at Lawrence Livermore National Laboratory (cf, DISCLAIMER).
+ *  Written by Albert Chu <chu11@llnl.gov>
+ *  UCRL-CODE-232183
+ *
+ *  This file is part of Ipmi-fru, a tool used for retrieving
+ *  motherboard field replaceable unit (FRU) information. For details,
+ *  see http://www.llnl.gov/linux/.
+ *
+ *  Ipmi-fru is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by the
+ *  Free Software Foundation; either version 3 of the License, or (at your
+ *  option) any later version.
+ *
+ *  Ipmi-fru is distributed in the hope that it will be useful, but
+ *  WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ *  or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+ *  for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with Ipmi-fru.  If not, see <http://www.gnu.org/licenses/>.
+\*****************************************************************************/
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/slab.h>
+#include <linux/jiffies.h>
+#include <linux/i2c.h>
+#include <linux/hwmon.h>
+#include <linux/hwmon-sysfs.h>
+#include <linux/err.h>
+#include <linux/mutex.h>
+#include "platform_common.h"
+#include "dfd_tlveeprom.h"
+
+/* using in is_valid_tlvinfo_header */
+static u_int32_t eeprom_size;
+
+/*
+ *  List of TLV codes and names.
+ */
+static const struct tlv_code_desc tlv_code_list[] = {
+    { TLV_CODE_PRODUCT_NAME      , "Product Name"},
+    { TLV_CODE_PART_NUMBER       , "Part Number"},
+    { TLV_CODE_SERIAL_NUMBER     , "Serial Number"},
+    { TLV_CODE_MAC_BASE          , "Base MAC Address"},
+    { TLV_CODE_MANUF_DATE        , "Manufacture Date"},
+    { TLV_CODE_DEVICE_VERSION    , "Device Version"},
+    { TLV_CODE_LABEL_REVISION    , "Label Revision"},
+    { TLV_CODE_PLATFORM_NAME     , "Platform Name"},
+    { TLV_CODE_ONIE_VERSION      , "ONIE Version"},
+    { TLV_CODE_MAC_SIZE          , "MAC Addresses"},
+    { TLV_CODE_MANUF_NAME        , "Manufacturer"},
+    { TLV_CODE_MANUF_COUNTRY     , "Country Code"},
+    { TLV_CODE_VENDOR_NAME       , "Vendor Name"},
+    { TLV_CODE_DIAG_VERSION      , "Diag Version"},
+    { TLV_CODE_SERVICE_TAG       , "Service Tag"},
+    { TLV_CODE_VENDOR_EXT        , "Vendor Extension"},
+    { TLV_CODE_CRC_32            , "CRC-32"},
+};
+
+#if 0
+#define OPENBMC_VPD_KEY_INVAIL_VAL 0
+
+static const tlv_code_map_t tlv_code_map[] = {
+    { TLV_CODE_PRODUCT_NAME   , OPENBMC_VPD_KEY_PRODUCT_NAME},
+    { TLV_CODE_PART_NUMBER    , OPENBMC_VPD_KEY_PRODUCT_PART_MODEL_NUM},
+    { TLV_CODE_SERIAL_NUMBER  , OPENBMC_VPD_KEY_PRODUCT_SERIAL_NUM},
+    { TLV_CODE_MAC_BASE       , OPENBMC_VPD_KEY_INVAIL_VAL},
+    { TLV_CODE_MANUF_DATE     , OPENBMC_VPD_KEY_BOARD_MFG_DATE},
+    { TLV_CODE_DEVICE_VERSION , OPENBMC_VPD_KEY_PRODUCT_VER},
+    { TLV_CODE_LABEL_REVISION , OPENBMC_VPD_KEY_PRODUCT_CUSTOM7},
+    { TLV_CODE_PLATFORM_NAME  , OPENBMC_VPD_KEY_PRODUCT_CUSTOM1},
+    { TLV_CODE_ONIE_VERSION   , OPENBMC_VPD_KEY_PRODUCT_CUSTOM2},
+    { TLV_CODE_MAC_SIZE       , OPENBMC_VPD_KEY_INVAIL_VAL},
+    { TLV_CODE_MANUF_NAME     , OPENBMC_VPD_KEY_PRODUCT_MFR},
+    { TLV_CODE_MANUF_COUNTRY  , OPENBMC_VPD_KEY_PRODUCT_CUSTOM3},
+    { TLV_CODE_VENDOR_NAME    , OPENBMC_VPD_KEY_PRODUCT_CUSTOM4},
+    { TLV_CODE_DIAG_VERSION   , OPENBMC_VPD_KEY_PRODUCT_CUSTOM8},
+    { TLV_CODE_SERVICE_TAG    , OPENBMC_VPD_KEY_PRODUCT_CUSTOM5},
+    { TLV_CODE_VENDOR_EXT     , OPENBMC_VPD_KEY_PRODUCT_CUSTOM6},
+    { TLV_CODE_CRC_32         , OPENBMC_VPD_KEY_INVAIL_VAL},
+};
+#endif
+
+#define TLV_CODE_NUM (sizeof(tlv_code_list) / sizeof(tlv_code_list[0]))
+
+#if 0
+#define TLV_CODE_MAP_NUM (sizeof(tlv_code_map) / sizeof(tlv_code_map[0]))
+#endif
+
+const unsigned long crc_table[] = {
+    0x00000000, 0x77073096, 0xee0e612c, 0x990951ba, 0x076dc419, 0x706af48f, 0xe963a535, 0x9e6495a3,
+    0x0edb8832, 0x79dcb8a4, 0xe0d5e91e, 0x97d2d988, 0x09b64c2b, 0x7eb17cbd, 0xe7b82d07, 0x90bf1d91,
+    0x1db71064, 0x6ab020f2, 0xf3b97148, 0x84be41de, 0x1adad47d, 0x6ddde4eb, 0xf4d4b551, 0x83d385c7,
+    0x136c9856, 0x646ba8c0, 0xfd62f97a, 0x8a65c9ec, 0x14015c4f, 0x63066cd9, 0xfa0f3d63, 0x8d080df5,
+    0x3b6e20c8, 0x4c69105e, 0xd56041e4, 0xa2677172, 0x3c03e4d1, 0x4b04d447, 0xd20d85fd, 0xa50ab56b,
+    0x35b5a8fa, 0x42b2986c, 0xdbbbc9d6, 0xacbcf940, 0x32d86ce3, 0x45df5c75, 0xdcd60dcf, 0xabd13d59,
+    0x26d930ac, 0x51de003a, 0xc8d75180, 0xbfd06116, 0x21b4f4b5, 0x56b3c423, 0xcfba9599, 0xb8bda50f,
+    0x2802b89e, 0x5f058808, 0xc60cd9b2, 0xb10be924, 0x2f6f7c87, 0x58684c11, 0xc1611dab, 0xb6662d3d,
+    0x76dc4190, 0x01db7106, 0x98d220bc, 0xefd5102a, 0x71b18589, 0x06b6b51f, 0x9fbfe4a5, 0xe8b8d433,
+    0x7807c9a2, 0x0f00f934, 0x9609a88e, 0xe10e9818, 0x7f6a0dbb, 0x086d3d2d, 0x91646c97, 0xe6635c01,
+    0x6b6b51f4, 0x1c6c6162, 0x856530d8, 0xf262004e, 0x6c0695ed, 0x1b01a57b, 0x8208f4c1, 0xf50fc457,
+    0x65b0d9c6, 0x12b7e950, 0x8bbeb8ea, 0xfcb9887c, 0x62dd1ddf, 0x15da2d49, 0x8cd37cf3, 0xfbd44c65,
+    0x4db26158, 0x3ab551ce, 0xa3bc0074, 0xd4bb30e2, 0x4adfa541, 0x3dd895d7, 0xa4d1c46d, 0xd3d6f4fb,
+    0x4369e96a, 0x346ed9fc, 0xad678846, 0xda60b8d0, 0x44042d73, 0x33031de5, 0xaa0a4c5f, 0xdd0d7cc9,
+    0x5005713c, 0x270241aa, 0xbe0b1010, 0xc90c2086, 0x5768b525, 0x206f85b3, 0xb966d409, 0xce61e49f,
+    0x5edef90e, 0x29d9c998, 0xb0d09822, 0xc7d7a8b4, 0x59b33d17, 0x2eb40d81, 0xb7bd5c3b, 0xc0ba6cad,
+    0xedb88320, 0x9abfb3b6, 0x03b6e20c, 0x74b1d29a, 0xead54739, 0x9dd277af, 0x04db2615, 0x73dc1683,
+    0xe3630b12, 0x94643b84, 0x0d6d6a3e, 0x7a6a5aa8, 0xe40ecf0b, 0x9309ff9d, 0x0a00ae27, 0x7d079eb1,
+    0xf00f9344, 0x8708a3d2, 0x1e01f268, 0x6906c2fe, 0xf762575d, 0x806567cb, 0x196c3671, 0x6e6b06e7,
+    0xfed41b76, 0x89d32be0, 0x10da7a5a, 0x67dd4acc, 0xf9b9df6f, 0x8ebeeff9, 0x17b7be43, 0x60b08ed5,
+    0xd6d6a3e8, 0xa1d1937e, 0x38d8c2c4, 0x4fdff252, 0xd1bb67f1, 0xa6bc5767, 0x3fb506dd, 0x48b2364b,
+    0xd80d2bda, 0xaf0a1b4c, 0x36034af6, 0x41047a60, 0xdf60efc3, 0xa867df55, 0x316e8eef, 0x4669be79,
+    0xcb61b38c, 0xbc66831a, 0x256fd2a0, 0x5268e236, 0xcc0c7795, 0xbb0b4703, 0x220216b9, 0x5505262f,
+    0xc5ba3bbe, 0xb2bd0b28, 0x2bb45a92, 0x5cb36a04, 0xc2d7ffa7, 0xb5d0cf31, 0x2cd99e8b, 0x5bdeae1d,
+    0x9b64c2b0, 0xec63f226, 0x756aa39c, 0x026d930a, 0x9c0906a9, 0xeb0e363f, 0x72076785, 0x05005713,
+    0x95bf4a82, 0xe2b87a14, 0x7bb12bae, 0x0cb61b38, 0x92d28e9b, 0xe5d5be0d, 0x7cdcefb7, 0x0bdbdf21,
+    0x86d3d2d4, 0xf1d4e242, 0x68ddb3f8, 0x1fda836e, 0x81be16cd, 0xf6b9265b, 0x6fb077e1, 0x18b74777,
+    0x88085ae6, 0xff0f6a70, 0x66063bca, 0x11010b5c, 0x8f659eff, 0xf862ae69, 0x616bffd3, 0x166ccf45,
+    0xa00ae278, 0xd70dd2ee, 0x4e048354, 0x3903b3c2, 0xa7672661, 0xd06016f7, 0x4969474d, 0x3e6e77db,
+    0xaed16a4a, 0xd9d65adc, 0x40df0b66, 0x37d83bf0, 0xa9bcae53, 0xdebb9ec5, 0x47b2cf7f, 0x30b5ffe9,
+    0xbdbdf21c, 0xcabac28a, 0x53b39330, 0x24b4a3a6, 0xbad03605, 0xcdd70693, 0x54de5729, 0x23d967bf,
+    0xb3667a2e, 0xc4614ab8, 0x5d681b02, 0x2a6f2b94, 0xb40bbe37, 0xc30c8ea1, 0x5a05df1b, 0x2d02ef8d,
+};
+
+static unsigned long crc32(unsigned long crc, const unsigned char *buf, unsigned len)
+{
+    unsigned i;
+    if (len < 1)
+        return 0xffffffff;
+
+    for (i = 0; i != len; ++i)
+    {
+        crc = crc_table[(crc ^ buf[i]) & 0xff] ^ (crc >> 8);
+    }
+
+    crc = crc ^ 0xffffffff;
+
+    return crc;
+}
+
+/*
+ *  is_valid_tlv
+ *
+ *  Perform basic sanity checks on a TLV field. The TLV is pointed to
+ *  by the parameter provided.
+ *      1. The type code is not reserved (0x00 or 0xFF)
+ */
+static inline bool is_valid_tlv(tlvinfo_tlv_t *tlv)
+{
+    return ((tlv->type != 0x00) && (tlv->type != 0xFF));
+}
+
+/*
+ *  is_valid_tlvinfo_header
+ *
+ *  Perform sanity checks on the first 11 bytes of the TlvInfo EEPROM
+ *  data pointed to by the parameter:
+ *      1. First 8 bytes contain null-terminated ASCII string "TlvInfo"
+ *      2. Version byte is 1
+ *      3. Total length bytes contain value which is less than or equal
+ *         to the allowed maximum (2048-11)
+ *
+ */
+static inline bool is_valid_tlvinfo_header(tlvinfo_header_t *hdr)
+{
+    int max_size = eeprom_size;
+    return((strcmp(hdr->signature, TLV_INFO_ID_STRING) == 0) &&
+       (hdr->version == TLV_INFO_VERSION) &&
+       (be16_to_cpu(hdr->totallen) <= max_size) );
+}
+
+/*
+ *  decode_tlv_value
+ *
+ *  Decode a single TLV value into a string.
+
+ *  The validity of EEPROM contents and the TLV field have been verified
+ *  prior to calling this function.
+ */
+static void decode_tlv_value(tlvinfo_tlv_t *tlv, tlv_decode_value_t *decode_value)
+{
+    int i;
+    char *value;
+    u_int32_t length;
+
+    value = (char *)decode_value->value;
+
+    switch (tlv->type) {
+    case TLV_CODE_PRODUCT_NAME:
+    case TLV_CODE_PART_NUMBER:
+    case TLV_CODE_SERIAL_NUMBER:
+    case TLV_CODE_MANUF_DATE:
+    case TLV_CODE_LABEL_REVISION:
+    case TLV_CODE_PLATFORM_NAME:
+    case TLV_CODE_ONIE_VERSION:
+    case TLV_CODE_MANUF_NAME:
+    case TLV_CODE_MANUF_COUNTRY:
+    case TLV_CODE_VENDOR_NAME:
+    case TLV_CODE_DIAG_VERSION:
+    case TLV_CODE_SERVICE_TAG:
+    case TLV_CODE_VENDOR_EXT:
+        memcpy(value, tlv->value, tlv->length);
+        value[tlv->length] = 0;
+        length = tlv->length;
+        break;
+    case TLV_CODE_MAC_BASE:
+        length = sprintf(value, "%02X:%02X:%02X:%02X:%02X:%02X",
+                tlv->value[0], tlv->value[1], tlv->value[2],
+                tlv->value[3], tlv->value[4], tlv->value[5]);
+        break;
+    case TLV_CODE_DEVICE_VERSION:
+        length = sprintf(value, "%u", tlv->value[0]);
+        break;
+    case TLV_CODE_MAC_SIZE:
+        length = sprintf(value, "%u", (tlv->value[0] << 8) | tlv->value[1]);
+        break;
+    #if 0
+    case TLV_CODE_VENDOR_EXT:
+        value[0] = 0;
+        length = 0;
+        for (i = 0; (i < (TLV_DECODE_VALUE_MAX_LEN/5)) && (i < tlv->length); i++) {
+            length += sprintf(value, "%s 0x%02X", value, tlv->value[i]);
+        }
+        break;
+    #endif
+    case TLV_CODE_CRC_32:
+        length = sprintf(value, "0x%02X%02X%02X%02X", tlv->value[0],
+                tlv->value[1], tlv->value[2], tlv->value[3]);
+        break;
+    default:
+        value[0] = 0;
+        length = 0;
+        for (i = 0; (i < (TLV_DECODE_VALUE_MAX_LEN/5)) && (i < tlv->length); i++) {
+            length += sprintf(value, "%s 0x%02X", value, tlv->value[i]);
+        }
+        break;
+    }
+
+    decode_value->length = length;
+}
+
+/*
+ *  is_checksum_valid
+ *
+ *  Validate the checksum in the provided TlvInfo EEPROM data. First,
+ *  verify that the TlvInfo header is valid, then make sure the last
+ *  TLV is a CRC-32 TLV. Then calculate the CRC over the EEPROM data
+ *  and compare it to the value stored in the EEPROM CRC-32 TLV.
+ */
+static bool is_checksum_valid(u_int8_t *eeprom)
+{
+    tlvinfo_header_t *eeprom_hdr;
+    tlvinfo_tlv_t *eeprom_crc;
+    unsigned int calc_crc;
+    unsigned int stored_crc;
+
+    eeprom_hdr = (tlvinfo_header_t *) eeprom;
+
+    // Is the eeprom header valid?
+    if (!is_valid_tlvinfo_header(eeprom_hdr)) {
+        return false;
+    }
+
+    // Is the last TLV a CRC?
+    eeprom_crc = (tlvinfo_tlv_t *) &eeprom[sizeof(tlvinfo_header_t) +
+        be16_to_cpu(eeprom_hdr->totallen) - (sizeof(tlvinfo_tlv_t) + 4)];
+    if ((eeprom_crc->type != TLV_CODE_CRC_32) || (eeprom_crc->length != 4)) {
+        return false;
+    }
+
+    // Calculate the checksum
+    calc_crc = crc32(0xffffffffL, (const unsigned char *)eeprom, sizeof(tlvinfo_header_t) +
+             be16_to_cpu(eeprom_hdr->totallen) - 4);
+    stored_crc = ((eeprom_crc->value[0] << 24) | (eeprom_crc->value[1] << 16) |
+          (eeprom_crc->value[2] <<  8) | eeprom_crc->value[3]);
+
+    return (calc_crc == stored_crc);
+}
+
+/*
+ *  tlvinfo_find_tlv
+ *
+ *  This function finds the TLV with the supplied code in the EERPOM.
+ *  An offset from the beginning of the EEPROM is returned in the
+ *  eeprom_index parameter if the TLV is found.
+ */
+static bool tlvinfo_find_tlv(u_int8_t *eeprom, u_int8_t tcode, int *eeprom_index)
+{
+    tlvinfo_header_t *eeprom_hdr;
+    tlvinfo_tlv_t    *eeprom_tlv;
+    int eeprom_end;
+
+    eeprom_hdr = (tlvinfo_header_t *) eeprom;
+
+    // Search through the TLVs, looking for the first one which matches the
+    // supplied type code.
+    *eeprom_index = sizeof(tlvinfo_header_t);
+    eeprom_end = sizeof(tlvinfo_header_t) + be16_to_cpu(eeprom_hdr->totallen);
+    while (*eeprom_index < eeprom_end) {
+        eeprom_tlv = (tlvinfo_tlv_t *) &eeprom[*eeprom_index];
+        if (!is_valid_tlv(eeprom_tlv)) {
+            return false;
+        }
+
+        if (eeprom_tlv->type == tcode) {
+            return true;
+        }
+
+        *eeprom_index += sizeof(tlvinfo_tlv_t) + eeprom_tlv->length;
+    }
+
+    return false;
+}
+
+/*
+ *  tlvinfo_decode_tlv
+ *
+ *  This function finds the TLV with the supplied code in the EERPOM
+ *  and decodes the value into the buffer provided.
+ */
+static bool tlvinfo_decode_tlv(u_int8_t *eeprom, u_int8_t tcode, tlv_decode_value_t *decode_value)
+{
+    int eeprom_index;
+    tlvinfo_tlv_t *eeprom_tlv;
+
+    // Find the TLV and then decode it
+    if (tlvinfo_find_tlv(eeprom, tcode, &eeprom_index)) {
+        eeprom_tlv = (tlvinfo_tlv_t *) &eeprom[eeprom_index];
+        decode_tlv_value(eeprom_tlv, decode_value);
+        return true;
+    }
+
+    return false;
+}
+
+/*
+ *  parse_tlv_eeprom
+ *
+ *  parse the EEPROM into memory, if it hasn't already been read.
+ */
+int parse_tlv_eeprom(u_int8_t *eeprom, u_int32_t size)
+{
+    unsigned int i;
+    bool ret;
+    tlvinfo_header_t *eeprom_hdr;
+    //tlv_info_vec_t tlv_info;
+    tlv_decode_value_t decode_value;
+    int j;
+
+    eeprom_hdr = (tlvinfo_header_t *) eeprom;
+    eeprom_size = size; /* eeprom real size */
+
+    if (!is_valid_tlvinfo_header(eeprom_hdr)) {
+        DBG_ERROR("Failed to check tlv header.\n");
+        return -1;
+    }
+
+    if (!is_checksum_valid(eeprom)) {
+        DBG_ERROR("Failed to check tlv crc.\n");
+        return -1;
+    }
+
+    for (i = 0; i < TLV_CODE_NUM; i++) {
+        mem_clear((void *)&decode_value, sizeof(tlv_decode_value_t));
+        ret = tlvinfo_decode_tlv(eeprom, tlv_code_list[i].m_code, &decode_value);
+        if (!ret) {
+            DBG_ERROR("No found type: %s\n", tlv_code_list[i].m_name);
+            continue;
+        }
+
+        DBG_DEBUG("i: %d,Found type: %s tlv[%d]:%s\n", i, tlv_code_list[i].m_name, tlv_code_list[i].m_code,
+            decode_value.value);
+        for (j = 0; j < decode_value.length; j++) {
+            if ((j % 16) == 0) {
+                DBG_DEBUG("\n");
+            }
+            DBG_DEBUG("%02x ", decode_value.value[j]);
+        }
+        DBG_DEBUG("\n\n");
+    }
+    return 0;
+}
+static int dfd_parse_tlv_eeprom(u_int8_t *eeprom, u_int32_t size, u_int8_t main_type, tlv_decode_value_t *decode_value)
+{
+    bool ret;
+    tlvinfo_header_t *eeprom_hdr;
+    //tlv_info_vec_t tlv_info;
+    int j;
+
+    eeprom_hdr = (tlvinfo_header_t *) eeprom;
+    eeprom_size = size; /* eeprom real size */
+
+    if (!is_valid_tlvinfo_header(eeprom_hdr)) {
+        DBG_ERROR("Failed to check tlv header.\n");
+        return -1;
+    }
+
+    if (!is_checksum_valid(eeprom)) {
+        DBG_ERROR("Failed to check tlv crc.\n");
+        return -1;
+    }
+
+    ret = tlvinfo_decode_tlv(eeprom, main_type, decode_value);
+    if (!ret) {
+        DBG_ERROR("No found type: %d\n", main_type);
+        return -1;
+    }
+
+    DBG_DEBUG("Found type: %d, value: %s\n", main_type,decode_value->value);
+    for (j = 0; j < decode_value->length; j++) {
+        if ((j % 16) == 0) {
+            DBG_DEBUG("\n");
+        }
+        DBG_DEBUG("%02x ", decode_value->value[j]);
+    }
+    DBG_DEBUG("\n\n");
+
+    return 0;
+}
+
+static int tlvinfo_find_wb_ext_tlv(tlv_decode_value_t *ext_tlv_value, u_int8_t ext_type,
+    u_int8_t *buf, u_int8_t *buf_len)
+{
+    tlvinfo_tlv_t    *eeprom_tlv;
+    int eeprom_end, eeprom_index;
+
+    // Search through the TLVs, looking for the first one which matches the
+    // supplied type code.
+    DBG_DEBUG("ext_tlv_value->length: %d.\n", ext_tlv_value->length);
+    for (eeprom_index = 0; eeprom_index < ext_tlv_value->length; eeprom_index++) {
+        if ((eeprom_index % 16) == 0) {
+            DBG_DEBUG("\n");
+        }
+        DBG_DEBUG("%02x ", ext_tlv_value->value[eeprom_index]);
+    }
+
+    DBG_DEBUG("\n");
+
+    eeprom_index = 0;
+    eeprom_end = ext_tlv_value->length;
+    while (eeprom_index < eeprom_end) {
+        eeprom_tlv = (tlvinfo_tlv_t *) &(ext_tlv_value->value[eeprom_index]);
+        if (!is_valid_tlv(eeprom_tlv)) {
+            DBG_ERROR("tlv is not valid, eeprom_tlv->type 0x%x.\n", eeprom_tlv->type);
+            return -1;
+        }
+
+        DBG_DEBUG("eeprom_tlv->length %d.\n", eeprom_tlv->length);
+        if (eeprom_tlv->type == ext_type) {
+            if (*buf_len >= eeprom_tlv->length) {
+                memcpy(buf, eeprom_tlv->value, eeprom_tlv->length);
+                DBG_DEBUG("eeprom_tlv->length %d.\n", eeprom_tlv->length);
+                *buf_len = eeprom_tlv->length;
+                return 0;
+            }
+            DBG_ERROR("buf_len %d small than info_len %d.\n", *buf_len, eeprom_tlv->length);
+            return -1;
+        }
+
+        eeprom_index += sizeof(tlvinfo_tlv_t) + eeprom_tlv->length;
+    }
+
+    DBG_ERROR("ext_type %d: tlv is not found.\n", ext_type);
+    return -1;
+}
+
+int dfd_tlvinfo_get_e2prom_info(u_int8_t *eeprom, u_int32_t size, dfd_tlv_type_t *tlv_type, u_int8_t* buf, u_int8_t *buf_len)
+{
+    tlv_decode_value_t decode_value;
+    int ret;
+
+    if (eeprom == NULL || tlv_type == NULL || buf == NULL) {
+        DBG_ERROR("Input para invalid.\n");
+        return -1;
+    }
+
+    mem_clear((void *)&decode_value, sizeof(tlv_decode_value_t));
+    ret = dfd_parse_tlv_eeprom(eeprom, size, tlv_type->main_type, &decode_value);
+    if (ret) {
+        DBG_ERROR("dfd_parse_tlv_eeprom failed ret %d.\n", ret);
+        return ret;
+    }
+
+    if (tlv_type->main_type != TLV_CODE_VENDOR_EXT) {
+        if (*buf_len >= decode_value.length) {
+            memcpy(buf, decode_value.value, decode_value.length);
+            *buf_len = decode_value.length;
+            return 0;
+        }
+        DBG_ERROR("buf_len %d small than info_len %d.\n", *buf_len, decode_value.length);
+        return -1;
+    }
+    DBG_DEBUG("info_len %d.\n", decode_value.length);
+
+    return tlvinfo_find_wb_ext_tlv(&decode_value, tlv_type->ext_type, buf, buf_len);
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/dfd_tlveeprom.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/dfd_tlveeprom.h
new file mode 100644
index 000000000..6eaac5848
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/dfd_tlveeprom.h
@@ -0,0 +1,121 @@
+#ifndef DFD_OPENBMC_TLVEEPROM_H
+#define DFD_OPENBMC_TLVEEPROM_H
+
+#ifndef u_int8_t
+#define u_int8_t unsigned char
+#endif
+
+#ifndef u_int16_t
+#define u_int16_t unsigned short
+#endif
+
+#ifndef u_int32_t
+#define u_int32_t unsigned int
+#endif
+
+#ifndef be16_to_cpu
+#define be16_to_cpu(x)   ntohs(x)
+#endif
+
+#ifndef cpu_to_be16
+#define cpu_to_be16(x)   htons(x)
+#endif
+
+/**
+ *  The TLV Types.
+ *
+ *  Keep these in sync with tlv_code_list in cmd_sys_eeprom.c
+ */
+#define TLV_CODE_PRODUCT_NAME   0x21
+#define TLV_CODE_PART_NUMBER    0x22
+#define TLV_CODE_SERIAL_NUMBER  0x23
+#define TLV_CODE_MAC_BASE       0x24
+#define TLV_CODE_MANUF_DATE     0x25
+#define TLV_CODE_DEVICE_VERSION 0x26
+#define TLV_CODE_LABEL_REVISION 0x27
+#define TLV_CODE_PLATFORM_NAME  0x28
+#define TLV_CODE_ONIE_VERSION   0x29
+#define TLV_CODE_MAC_SIZE       0x2A
+#define TLV_CODE_MANUF_NAME     0x2B
+#define TLV_CODE_MANUF_COUNTRY  0x2C
+#define TLV_CODE_VENDOR_NAME    0x2D
+#define TLV_CODE_DIAG_VERSION   0x2E
+#define TLV_CODE_SERVICE_TAG    0x2F
+#define TLV_CODE_VENDOR_EXT     0xFD
+#define TLV_CODE_CRC_32         0xFE
+
+#define TLV_CODE_NAME_LEN 64
+/*
+ *  Struct for displaying the TLV codes and names.
+ */
+struct tlv_code_desc {
+    u_int8_t m_code;
+    char m_name[TLV_CODE_NAME_LEN];
+};
+
+typedef struct dfd_tlv_type_s {
+    u_int8_t main_type;
+    u_int8_t ext_type;
+} dfd_tlv_type_t;
+
+// Header Field Constants
+#define TLV_INFO_ID_STRING      "TlvInfo"
+#define TLV_INFO_VERSION        0x01
+/*#define TLV_TOTAL_LEN_MAX       (XXXXXXXX - sizeof(tlvinfo_header_t))*/
+
+struct __attribute__ ((__packed__)) tlvinfo_header_s {
+    char    signature[8];   /* 0x00 - 0x07 EEPROM Tag "TlvInfo" */
+    u_int8_t      version;  /* 0x08        Structure version */
+    u_int16_t     totallen; /* 0x09 - 0x0A Length of all data which follows */
+};
+typedef struct tlvinfo_header_s tlvinfo_header_t;
+
+/*
+ * TlvInfo TLV: Layout of a TLV field
+ */
+struct __attribute__ ((__packed__)) tlvinfo_tlv_s {
+    u_int8_t  type;
+    u_int8_t  length;
+    u_int8_t  value[0];
+};
+typedef struct tlvinfo_tlv_s tlvinfo_tlv_t;
+
+#define TLV_VALUE_MAX_LEN        255
+/*
+ * The max decode value is currently for the 'raw' type or the 'vendor
+ * extension' type, both of which have the same decode format.  The
+ * max decode string size is computed as follows:
+ *
+ *   strlen(" 0xFF") * TLV_VALUE_MAX_LEN + 1
+ *
+ */
+#define TLV_DECODE_VALUE_MAX_LEN    ((5 * TLV_VALUE_MAX_LEN) + 1)
+
+typedef struct tlv_decode_value_s {
+    u_int8_t value[TLV_DECODE_VALUE_MAX_LEN];
+    u_int32_t length;
+} tlv_decode_value_t;
+
+typedef enum dfd_tlvinfo_ext_tlv_type_e {
+    DFD_TLVINFO_EXT_TLV_TYPE_DEV_TYPE   = 1,
+} dfd_tlvinfo_ext_tlv_type_t;
+
+#if 0
+#define TLV_TIME_LEN 64
+
+int ipmi_tlv_validate_fru_area(const uint8_t fruid, const char *fru_file_name,
+                           sd_bus *bus_type, const bool bmc_fru);
+
+extern const char *get_vpd_key_names(int key_id);
+extern std::string getService(sdbusplus::bus::bus& bus,
+                         const std::string& intf,
+                         const std::string& path);
+extern std::string getFRUValue(const std::string& section,
+                        const std::string& key,
+                        const std::string& delimiter,
+                        IPMIFruInfo& fruData);
+#endif
+
+int dfd_tlvinfo_get_e2prom_info(u_int8_t *eeprom, u_int32_t size, dfd_tlv_type_t *tlv_type, u_int8_t* buf, u_int8_t *buf_len);
+
+#endif /* endif DFD_OPENBMC_TLVEEPROM_H */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/fpga_i2c.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/fpga_i2c.h
new file mode 100644
index 000000000..649a8452d
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/fpga_i2c.h
@@ -0,0 +1,133 @@
+#ifndef _FPGA_I2C_H
+#define _FPGA_I2C_H
+
+#include <linux/i2c.h>
+#include <linux/device.h>
+#include <linux/kallsyms.h>
+#include <linux/string.h>
+
+#define mem_clear(data, size) memset((data), 0, (size))
+
+#if 0
+
+#define FPGA_I2C_EXT_9548_ADDR        (0x00)
+#define FPGA_I2C_EXT_9548_CHAN        (0x04)
+#define FPGA_I2C_DEV_SLAVE_ADDR       (0x08)
+#define FPGA_I2C_DEV_REG_ADDR         (0x0C)
+#define FPGA_I2C_DEV_RDWR_LEN         (0x10)
+#define FPGA_I2C_CTRL_REG             (0x14)
+#define FPGA_I2C_STATUS_REG           (0x18)
+#define FPGA_I2C_SCALE_REG            (0x1C)
+#define FPGA_I2C_FILTER_REG           (0x20)
+#define FPGA_I2C_STRETCH_REG          (0x24)
+#define FPGA_I2C_EXT_9548_EXITS_FLAG  (0x28)
+#define FPGA_I2C_INTERNAL_9548_CHAN   (0x2C)
+#define FPGA_I2C_RDWR_DATA_BUF        (0x80)
+#endif
+#define FPGA_I2C_RDWR_MAX_LEN_DEFAULT (128)
+#define I2C_REG_MAX_WIDTH             (16)
+
+#define DEV_NAME_MAX_LEN              (64)
+
+#define FPGA_I2C_MAX_TIMES            (10)
+#define FPGA_I2C_XFER_TIME_OUT        (100000)
+#define FPGA_I2C_SLEEP_TIME           (40)
+
+typedef struct fpga_i2c_reg_s {
+    uint32_t i2c_scale;
+    uint32_t i2c_filter;
+    uint32_t i2c_stretch;
+    uint32_t i2c_ext_9548_exits_flag;
+    uint32_t i2c_ext_9548_addr;
+    uint32_t i2c_ext_9548_chan;
+    uint32_t i2c_in_9548_chan;
+    uint32_t i2c_slave;
+    uint32_t i2c_reg;
+    uint32_t i2c_reg_len;
+    uint32_t i2c_data_len;
+    uint32_t i2c_ctrl;
+    uint32_t i2c_status;
+    uint32_t i2c_err_vec;
+    uint32_t i2c_data_buf;
+    uint32_t i2c_data_buf_len;
+} fpga_i2c_reg_t;
+
+typedef struct fpga_i2c_reset_cfg_s {
+    uint32_t i2c_adap_reset_flag;
+    uint32_t reset_addr;
+    uint32_t reset_on;
+    uint32_t reset_off;
+    uint32_t reset_delay_b;
+    uint32_t reset_delay;
+    uint32_t reset_delay_a;
+} fpga_i2c_reset_cfg_t;
+
+typedef struct fpga_i2c_reg_addr_s {
+    uint8_t reg_addr_len;
+    uint8_t read_reg_addr[I2C_REG_MAX_WIDTH];
+} fpga_i2c_reg_addr_t;
+
+typedef struct fpga_i2c_dev_s {
+    fpga_i2c_reg_t reg;
+    fpga_i2c_reset_cfg_t reset_cfg;
+    fpga_i2c_reg_addr_t i2c_addr_desc;
+    const char *dev_name;
+    uint32_t i2c_scale_value;
+    uint32_t i2c_filter_value;
+    uint32_t i2c_stretch_value;
+    uint32_t i2c_timeout;
+    uint32_t i2c_func_mode;
+    wait_queue_head_t queue;
+    struct i2c_adapter adap;
+    int adap_nr;
+    struct device *dev;
+    bool i2c_params_check;
+} fpga_i2c_dev_t;
+
+typedef struct fpga_i2c_bus_device_s {
+    int i2c_timeout;
+    int i2c_scale;
+    int i2c_filter;
+    int i2c_stretch;
+    int i2c_ext_9548_exits_flag;
+    int i2c_ext_9548_addr;
+    int i2c_ext_9548_chan;
+    int i2c_in_9548_chan;
+    int i2c_slave;
+    int i2c_reg;
+    int i2c_reg_len;
+    int i2c_data_len;
+    int i2c_ctrl;
+    int i2c_status;
+    int i2c_err_vec;
+    int i2c_data_buf;
+    int i2c_data_buf_len;
+    char dev_name[DEV_NAME_MAX_LEN];
+    int adap_nr;
+    int i2c_scale_value;
+    int i2c_filter_value;
+    int i2c_stretch_value;
+    int i2c_func_mode;
+    int i2c_adap_reset_flag;
+    int i2c_reset_addr;
+    int i2c_reset_on;
+    int i2c_reset_off;
+    int i2c_rst_delay_b;        /* delay time before reset(us) */
+    int i2c_rst_delay;          /* reset time(us) */
+    int i2c_rst_delay_a;        /* delay time after reset(us) */
+    int device_flag;
+    bool i2c_params_check;
+    int i2c_data_buf_len_reg;
+    int i2c_offset_reg;
+} fpga_i2c_bus_device_t;
+
+typedef struct fpga_pca954x_device_s {
+    struct i2c_client *client;
+    uint32_t i2c_bus;
+    uint32_t i2c_addr;
+    uint32_t fpga_9548_flag;
+    uint32_t fpga_9548_reset_flag;
+    uint32_t pca9548_base_nr;
+} fpga_pca954x_device_t;
+
+#endif /* _FPGA_I2C_H */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/hw_test.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/hw_test.c
new file mode 100644
index 000000000..e74f4e800
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/hw_test.c
@@ -0,0 +1,608 @@
+/*
+ * hw_test.c
+ * Original Author : support, 2020-10-15
+ *
+ * History
+ *    v1.0    support  2020-10-15  Initial version.
+ */
+
+#include <linux/miscdevice.h>
+#include <linux/delay.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/mm.h>
+#include <linux/fs.h>
+#include <linux/types.h>
+#include <linux/delay.h>
+#include <linux/moduleparam.h>
+#include <linux/slab.h>
+#include <linux/errno.h>
+#include <linux/ioctl.h>
+#include <linux/cdev.h>
+#include <linux/string.h>
+#include <linux/list.h>
+#include <linux/pci.h>
+#include <linux/uaccess.h>
+#include <asm/atomic.h>
+#include <asm/unistd.h>
+#include <linux/major.h>
+#include <linux/device.h>
+#include <linux/miscdevice.h>
+#include <asm/irq.h>
+#include <linux/phy.h>
+#include <linux/list.h>
+#include <linux/slab.h>
+
+#include "hw_test.h"
+
+extern struct bus_type mdio_bus_type;
+
+struct board_mdio_dev {
+    struct list_head list;
+    struct mii_bus *mdio_bus;
+    int mdio_index;
+};
+
+struct board_phy_dev {
+    struct list_head list;
+    struct phy_device *phydev;
+    int phy_index;
+};
+
+static LIST_HEAD(mdio_dev_list);
+static LIST_HEAD(phydev_list);
+static struct class *class_mdio_bus = NULL;
+
+#define PRINT_BUF_SIZE         (256)
+#define INVALID_PHY_ADDR       (0xFF)
+#define MAX_MDIO_DEVICE_NUMS   (1000)
+#define MAX_PHY_DEVICE_NUMS    (1000)
+
+#define dram_debug(fmt, ...) \
+        printk(KERN_NOTICE pr_fmt(fmt), ##__VA_ARGS__)
+
+static ssize_t dram_dev_read (struct file *file, char __user *buf, size_t count,
+                              loff_t *offset)
+{
+    u8 value8;
+    u16 value16;
+    u32 value32;
+
+    if (file->private_data != NULL) {
+        return -EINVAL;
+    }
+
+    file->private_data = ioremap(file->f_pos, count);
+
+    if (!file->private_data) {
+        pr_notice("%s, %d\n", __FUNCTION__, __LINE__);
+        return -ENODEV;
+    }
+
+    rmb();
+    switch (count) {
+    case 1:
+        value8 = readb(file->private_data);
+        if (copy_to_user(buf, &value8, sizeof(u8))) {
+            return -EFAULT;
+        }
+        break;
+    case 2:
+        value16 = readw(file->private_data);
+        if (copy_to_user(buf, &value16, sizeof(u16))) {
+            return -EFAULT;
+        }
+        break;
+    case 4:
+        value32 = readl(file->private_data);
+        if (copy_to_user(buf, &value32, sizeof(u32))) {
+            return -EFAULT;
+        }
+        break;
+    default:
+        return -EINVAL;
+    }
+
+    iounmap(file->private_data);
+    file->private_data = NULL;
+    return count;
+
+}
+
+static ssize_t dram_dev_write (struct file *file, const char __user *buf, size_t count,
+                               loff_t *offset)
+{
+    u8 value8;
+    u16 value16;
+    u32 value32;
+
+    if (file->private_data != NULL) {
+        return -EINVAL;
+    }
+
+    file->private_data = ioremap(file->f_pos, count);
+
+    if (!file->private_data) {
+        pr_err("%s, %d\n", __FUNCTION__, __LINE__);
+        return -ENODEV;
+    }
+
+    switch (count) {
+    case 1:
+        if (copy_from_user(&value8, buf, sizeof(u8))) {
+            return -EFAULT;
+        }
+        writeb(value8, file->private_data);
+        break;
+    case 2:
+        if (copy_from_user(&value16, buf, sizeof(u16))) {
+            return -EFAULT;
+        }
+        writew(value16, file->private_data);
+        break;
+    case 4:
+        if (copy_from_user(&value32, buf, sizeof(u32))) {
+            return -EFAULT;
+        }
+        writel(value32, file->private_data);
+        break;
+    default:
+        return -EINVAL;
+    }
+
+    wmb();
+    iounmap(file->private_data);
+    file->private_data = NULL;
+    return count;
+}
+
+static loff_t dram_dev_llseek(struct file *file, loff_t offset, int origin)
+{
+    loff_t ret;
+
+    switch (origin) {
+        case 0:
+            file->f_pos = offset;
+            ret = file->f_pos;
+            break;
+        case 1:
+            file->f_pos += offset;
+            ret = file->f_pos;
+            break;
+        default:
+            ret = -EINVAL;
+    }
+    return ret;
+}
+
+static int temp_mdiobus_read(struct mii_bus *bus, int phy_addr, int regnum)
+{
+    return 0;
+}
+
+static int temp_mdiobus_write(struct mii_bus *bus, int phy_addr, int regnum, u16 value)
+{
+    return 0;
+}
+
+static int init_class_mdio_bus(void)
+{
+    struct mii_bus *bus;
+    int err = 0;
+
+    bus = mdiobus_alloc();
+
+	bus->name  = "temp_mdio_bus";
+    snprintf(bus->id, MII_BUS_ID_SIZE, "temp_mdio_bus0");
+    bus->read  = temp_mdiobus_read;
+	bus->write = temp_mdiobus_write;
+
+	err = mdiobus_register(bus);
+	if (err) {
+        printk(KERN_ERR "temp mdio bus register fail\n");
+        return -1;
+	}
+
+    class_mdio_bus = bus->dev.class;
+    mdiobus_unregister(bus);
+
+    return 0;
+}
+
+static int mdio_match_success(struct device *dev, const void * data)
+{
+
+    return 1;
+}
+
+static int add_all_mdio_devices_to_list(void)
+{
+    struct device *dev, *dev_start = NULL;
+    struct board_mdio_dev *mdio_dev = NULL;
+    int i = 0;
+    struct class *bus_class = class_mdio_bus;
+
+    for (i = 0; i < MAX_MDIO_DEVICE_NUMS; i++) {
+        dev = class_find_device(bus_class, dev_start, NULL, mdio_match_success);
+        if (dev != NULL) {
+            mdio_dev = kzalloc(sizeof(struct board_mdio_dev), GFP_KERNEL);
+            if (mdio_dev == NULL) {
+                printk(KERN_ERR "%s: alloc fail\n", __func__);
+                return -EFAULT;
+            }
+
+            mdio_dev->mdio_index = i;
+            mdio_dev->mdio_bus = to_mii_bus(dev);
+            list_add_tail(&mdio_dev->list, &mdio_dev_list);
+
+            dev_start = dev;
+        } else {
+            break;
+        }
+    }
+
+    printk(KERN_INFO "mdio dev numbers = %d\n", i);
+
+    return 0;
+}
+
+static void delete_all_mdio_devices_from_list(void)
+{
+    struct list_head *n, *pos;
+    struct board_mdio_dev *mdio_dev;
+
+    list_for_each_safe(pos, n, &mdio_dev_list) {
+        list_del(pos);
+        mdio_dev = list_entry(pos, struct board_mdio_dev, list);
+        kfree(mdio_dev);
+    }
+
+    return;
+}
+
+void list_all_mdio_devices_info(void)
+{
+    struct board_mdio_dev *mdio_dev;
+    unsigned char phyaddr[PHY_MAX_ADDR];
+    int i = 0, j = 0;
+    int phydev_num = 0;
+    char buf[PRINT_BUF_SIZE];
+    int len = 0;
+
+    printk(KERN_INFO "all the mdio devs info:\n");
+    printk(KERN_INFO "index        busid                 name                  phy_num     phyaddr \n");
+    list_for_each_entry(mdio_dev, &mdio_dev_list, list) {
+        i = 0;
+        j = 0;
+        phydev_num = 0;
+        mem_clear(phyaddr, INVALID_PHY_ADDR, sizeof(phyaddr));
+        mem_clear(buf, 0, sizeof(buf));
+
+        for (i = 0; i < PHY_MAX_ADDR; i++) {
+            if (mdio_dev->mdio_bus->mdio_map[i]) {
+                phydev_num++;
+                phyaddr[j] = (unsigned char)i;
+                j++;
+            }
+        }
+
+        len = snprintf(buf, sizeof(buf), "  %-10d  %-20s  %-20s  %-10d ", mdio_dev->mdio_index,
+                  mdio_dev->mdio_bus->id, mdio_dev->mdio_bus->name, phydev_num);
+
+        for (i = 0; i < PHY_MAX_ADDR; i++) {
+            if (phyaddr[i] == INVALID_PHY_ADDR) {
+                break;
+            }
+
+            len += snprintf(&buf[len], sizeof(buf) - len,  " %#x", phyaddr[i]);
+        }
+
+        printk(KERN_INFO "%s\n", buf);
+    }
+
+    return;
+}
+
+static struct mii_bus *get_mdio_dev_according_to_index(int mdio_index)
+{
+    struct board_mdio_dev *mdio_dev;
+    list_for_each_entry(mdio_dev, &mdio_dev_list, list) {
+        if (mdio_dev->mdio_index == mdio_index) {
+            return mdio_dev->mdio_bus;
+        }
+    }
+
+    printk(KERN_ERR "no exist the mdio dev it's mdio_index = %d, please exec cmd [hw_test.bin mdiodev_list] to view mdiodev info\n",
+        mdio_index);
+
+    return NULL;
+}
+
+int board_mdio_read(int mdio_index, int phyaddr, u32 regnum)
+{
+    struct mii_bus *bus;
+    int reg_val;
+
+    bus = get_mdio_dev_according_to_index(mdio_index);
+    if (bus == NULL) {
+        return -1;
+    }
+
+    reg_val = mdiobus_read(bus, phyaddr, regnum);
+
+    return reg_val;
+}
+
+int board_mdio_write(int mdio_index, int phyaddr, u32 regnum, u16 val)
+{
+    struct mii_bus *bus;
+    int ret;
+
+    bus = get_mdio_dev_according_to_index(mdio_index);
+    if (bus == NULL) {
+        return -1;
+    }
+
+    ret = mdiobus_write(bus, phyaddr, regnum, val);
+
+    return ret;
+}
+
+static int phy_match_success(struct device *dev, const void * data)
+{
+
+    return 1;
+}
+
+static int add_all_phydevs_to_list(void)
+{
+    struct device *dev, *dev_start = NULL;
+    struct board_phy_dev *board_phydev = NULL;
+    int i = 0;
+
+    for (i = 0; i < MAX_PHY_DEVICE_NUMS; i++) {
+        dev = bus_find_device(&mdio_bus_type, dev_start, NULL, phy_match_success);
+        if (dev != NULL) {
+            board_phydev = kzalloc(sizeof(struct board_phy_dev), GFP_KERNEL);
+            if (board_phydev == NULL) {
+                printk(KERN_ERR "%s: alloc fail\n", __func__);
+                return -EFAULT;
+            }
+
+            board_phydev->phy_index = i;
+            board_phydev->phydev = to_phy_device(dev);
+            list_add_tail(&board_phydev->list, &phydev_list);
+
+            dev_start = dev;
+        } else {
+            break;
+        }
+    }
+
+    printk(KERN_INFO "phydev num = %d\n", i);
+
+    return 0;
+}
+
+static void delete_all_phydevs_from_list(void)
+{
+    struct list_head *n, *pos;
+    struct board_phy_dev *board_phydev;
+
+    list_for_each_safe(pos, n, &phydev_list) {
+        list_del(pos);
+        board_phydev = list_entry(pos, struct board_phy_dev, list);
+        kfree(board_phydev);
+    }
+
+    return;
+}
+
+void list_all_phydevs_info(void)
+{
+    struct board_phy_dev *board_phydev;
+
+    printk(KERN_INFO "all the phydevs info:\n");
+    printk(KERN_INFO "index        phyaddr     phyId       phydev_name\n");
+    list_for_each_entry(board_phydev, &phydev_list, list) {
+        printk(KERN_INFO "  %-10d  %#-10x  %#-10x  %-20s\n", board_phydev->phy_index, board_phydev->phydev->mdio.addr,\
+              board_phydev->phydev->phy_id, dev_name(&board_phydev->phydev->mdio.dev));
+    }
+
+    return;
+}
+
+static struct phy_device *get_phy_dev_according_to_index(int phy_index)
+{
+    struct board_phy_dev *board_phydev;
+    list_for_each_entry(board_phydev, &phydev_list, list) {
+        if (board_phydev->phy_index == phy_index) {
+            return board_phydev->phydev;
+        }
+    }
+
+    printk(KERN_ERR "no exist the phydev it's phy_index = %d, please exec cmd [hw_test.bin phydev_list] to view phydev info\n", phy_index);
+
+    return NULL;
+}
+
+int board_phy_read(int phy_index, u32 regnum)
+{
+    struct phy_device *phydev;
+    int reg_val;
+
+    phydev = get_phy_dev_according_to_index(phy_index);
+    if (phydev == NULL) {
+        return -1;
+    }
+
+    reg_val = phy_read(phydev, regnum);
+
+    return reg_val;
+}
+
+int board_phy_write(int phy_index, u32 regnum, u16 val)
+{
+    struct phy_device *phydev;
+    int ret;
+
+    phydev = get_phy_dev_according_to_index(phy_index);
+    if (phydev == NULL) {
+        return -1;
+    }
+
+    ret = phy_write(phydev, regnum, val);
+
+    return ret;
+}
+
+static long dram_dev_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
+{
+    void __user *argp = (void __user *)arg;
+    int ret = 0;
+    struct phydev_user_info phy_user_info;
+    struct mdio_dev_user_info mdio_user_info;
+
+    switch (cmd) {
+    case CMD_PHY_LIST:
+        list_all_phydevs_info();
+        break;
+
+    case CMD_PHY_READ:
+        if (copy_from_user(&phy_user_info, argp, sizeof(struct phydev_user_info)))
+            return -EFAULT;
+
+        ret = board_phy_read(phy_user_info.phy_index, phy_user_info.regnum);
+        if (ret < 0) {
+            return -EFAULT;
+        }
+
+        phy_user_info.regval = (u32)ret;
+
+        if (copy_to_user(argp, &phy_user_info, sizeof(struct phydev_user_info)))
+            return -EFAULT;
+
+        break;
+
+    case CMD_PHY_WRITE:
+        if (copy_from_user(&phy_user_info, argp, sizeof(struct phydev_user_info)))
+            return -EFAULT;
+
+        ret = board_phy_write(phy_user_info.phy_index, phy_user_info.regnum, (u16)phy_user_info.regval);
+        if (ret < 0) {
+            return -EFAULT;
+        }
+
+        break;
+
+    case CMD_MDIO_LIST:
+        list_all_mdio_devices_info();
+        break;
+
+    case CMD_MDIO_READ:
+        if (copy_from_user(&mdio_user_info, argp, sizeof(struct mdio_dev_user_info)))
+            return -EFAULT;
+
+        ret = board_mdio_read(mdio_user_info.mdio_index, mdio_user_info.phyaddr, mdio_user_info.regnum);
+        if (ret < 0) {
+            return -EFAULT;
+        }
+
+        mdio_user_info.regval = (u32)ret;
+
+        if (copy_to_user(argp, &mdio_user_info, sizeof(struct mdio_dev_user_info)))
+            return -EFAULT;
+
+        break;
+
+    case CMD_MDIO_WRITE:
+        if (copy_from_user(&mdio_user_info, argp, sizeof(struct mdio_dev_user_info)))
+            return -EFAULT;
+
+        ret = board_mdio_write(mdio_user_info.mdio_index, mdio_user_info.phyaddr, mdio_user_info.regnum, (u16)mdio_user_info.regval);
+        if (ret < 0) {
+            return -EFAULT;
+        }
+
+        break;
+
+    default:
+        printk("unknown ioctl cmd\n");
+        break;
+    }
+
+    return 0;
+}
+
+static int dram_dev_open(struct inode *inode, struct file *file)
+{
+    file->private_data = NULL;
+    file->f_pos = 0;
+    return 0;
+
+}
+
+static int dram_dev_release(struct inode *inode, struct file *file)
+{
+    if (file->private_data) {
+        iounmap(file->private_data);
+    }
+    return 0;
+}
+
+static const struct file_operations dram_dev_fops = {
+    .owner      = THIS_MODULE,
+    .llseek     = dram_dev_llseek,
+    .read       = dram_dev_read,
+    .write      = dram_dev_write,
+    .unlocked_ioctl = dram_dev_ioctl,
+    .open       = dram_dev_open,
+    .release    = dram_dev_release,
+};
+
+static struct miscdevice dram_dev = {
+    .minor  = MISC_DYNAMIC_MINOR,
+    .name   = "dram_test",
+    .fops   = &dram_dev_fops,
+};
+
+static int __init dram_init(void)
+{
+    if (add_all_phydevs_to_list() != 0) {
+        printk(KERN_ERR "add all phydev to list fail\n");
+        delete_all_phydevs_from_list();
+        return -ENXIO;
+    }
+
+    if (init_class_mdio_bus() == 0) {
+        if (add_all_mdio_devices_to_list() == -EFAULT) {
+            printk(KERN_ERR "add all mdiodev to list fail\n");
+            delete_all_mdio_devices_from_list();
+            delete_all_phydevs_from_list();
+            return -ENXIO;
+        }
+    }
+
+    if (misc_register(&dram_dev) != 0) {
+        pr_notice("Register %s failed.\n", dram_dev.name);
+        delete_all_mdio_devices_from_list();
+        delete_all_phydevs_from_list();
+        return -ENXIO;
+    }
+
+    return 0;
+}
+
+static void __exit dram_exit(void)
+{
+    misc_deregister(&dram_dev);
+
+    delete_all_mdio_devices_from_list();
+    delete_all_phydevs_from_list();
+}
+
+module_init(dram_init);
+module_exit(dram_exit);
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/hw_test.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/hw_test.h
new file mode 100644
index 000000000..695fa336c
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/hw_test.h
@@ -0,0 +1,31 @@
+
+#ifndef _LINUX_DRAM_DRIVER_H
+#define _LINUX_DRAM_DRIVER_H
+
+#include <linux/types.h>
+#include <linux/compiler.h>
+
+#define mem_clear(data, val, size) memset((data), val, (size))
+
+struct phydev_user_info {
+    int phy_index;
+    u32 regnum;
+    u32 regval;
+};
+
+#define CMD_PHY_LIST                        _IOR('P', 0, struct phydev_user_info)
+#define CMD_PHY_READ                        _IOR('P', 1, struct phydev_user_info)
+#define CMD_PHY_WRITE                       _IOR('P', 2, struct phydev_user_info)
+
+struct mdio_dev_user_info {
+    int mdio_index;
+    int phyaddr;
+    u32 regnum;
+    u32 regval;
+};
+
+#define CMD_MDIO_LIST                        _IOR('M', 0, struct mdio_dev_user_info)
+#define CMD_MDIO_READ                        _IOR('M', 1, struct mdio_dev_user_info)
+#define CMD_MDIO_WRITE                       _IOR('M', 2, struct mdio_dev_user_info)
+
+#endif
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/Makefile b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/Makefile
new file mode 100644
index 000000000..a3da5aadf
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/Makefile
@@ -0,0 +1,36 @@
+PWD		= $(shell pwd)
+
+EXTRA_CFLAGS:= -I$(M)/include
+EXTRA_CFLAGS+= -Wall
+#ifdef ENABLE_GCOV
+#ifeq ($(ENABLE_GCOV), y)
+#EXTRA_CFLAGS+= -fprofile-arcs -ftest-coverage -lgcov
+#endif
+#endif # ENABLE_GCOV
+
+obj-m := wb_lm75.o
+obj-m += wb_tmp401.o
+obj-m += wb_i2c_mux_pca9641.o
+obj-m += wb_i2c_mux_pca954x.o
+obj-m += wb_i2c_i801.o
+obj-m += wb_i2c_algo_bit.o
+obj-m += wb_i2c_gpio.o
+obj-m += wb_i2c_gpio_device.o
+obj-m += wb_pmbus_core.o
+obj-m += wb_csu550.o
+obj-m += wb_ina3221.o
+obj-m += wb_isl68137.o
+obj-m += wb_tps53622.o
+obj-m += wb_ucd9000.o
+obj-m += wb_xdpe12284.o
+obj-m += wb_xdpe132g5c_pmbus.o
+obj-m += wb_i2c_ismt.o
+
+all:
+	$(MAKE) -C $(KERNEL_SRC)/build M=$(PWD) modules
+	@if [ ! -d $(module_out_put_dir) ]; then mkdir -p $(module_out_put_dir) ;fi
+	cp -p  $(PWD)/*.ko $(module_out_put_dir)
+clean:
+	rm -f $(PWD)/*.o $(PWD)/*.ko $(PWD)/*.mod.c $(PWD)/.*.cmd $(PWD)/*.mod
+	rm -f $(PWD)/Module.markers $(PWD)/Module.symvers $(PWD)/modules.order
+	rm -rf $(PWD)/.tmp_versions
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_csu550.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_csu550.c
new file mode 100644
index 000000000..36d07f071
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_csu550.c
@@ -0,0 +1,236 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Hardware monitoring driver for PMBus devices
+ *
+ * Copyright (c) 2010, 2011 Ericsson AB.
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/err.h>
+#include <linux/slab.h>
+#include <linux/mutex.h>
+#include <linux/i2c.h>
+#include <linux/pmbus.h>
+#include "wb_pmbus.h"
+
+struct pmbus_device_info {
+    int pages;
+    u32 flags;
+};
+
+static const struct i2c_device_id pmbus_id[];
+
+/*
+ * Find sensor groups and status registers on each page.
+ */
+static void pmbus_find_sensor_groups(struct i2c_client *client,
+                     struct pmbus_driver_info *info)
+{
+    int page;
+
+    /* Sensors detected on page 0 only */
+    if (wb_pmbus_check_word_register(client, 0, PMBUS_READ_VIN))
+        info->func[0] |= PMBUS_HAVE_VIN;
+    if (wb_pmbus_check_word_register(client, 0, PMBUS_READ_IIN))
+        info->func[0] |= PMBUS_HAVE_IIN;
+    if (wb_pmbus_check_word_register(client, 0, PMBUS_READ_PIN))
+        info->func[0] |= PMBUS_HAVE_PIN;
+    if (info->func[0]
+        && wb_pmbus_check_byte_register(client, 0, PMBUS_STATUS_INPUT))
+        info->func[0] |= PMBUS_HAVE_STATUS_INPUT;
+    if (wb_pmbus_check_byte_register(client, 0, PMBUS_FAN_CONFIG_12) &&
+        wb_pmbus_check_word_register(client, 0, PMBUS_READ_FAN_SPEED_1)) {
+        info->func[0] |= PMBUS_HAVE_FAN12;
+        if (wb_pmbus_check_byte_register(client, 0, PMBUS_STATUS_FAN_12))
+            info->func[0] |= PMBUS_HAVE_STATUS_FAN12;
+    }
+    if (wb_pmbus_check_byte_register(client, 0, PMBUS_FAN_CONFIG_34) &&
+        wb_pmbus_check_word_register(client, 0, PMBUS_READ_FAN_SPEED_3)) {
+        info->func[0] |= PMBUS_HAVE_FAN34;
+        if (wb_pmbus_check_byte_register(client, 0, PMBUS_STATUS_FAN_34))
+            info->func[0] |= PMBUS_HAVE_STATUS_FAN34;
+    }
+    if (wb_pmbus_check_word_register(client, 0, PMBUS_READ_TEMPERATURE_1))
+        info->func[0] |= PMBUS_HAVE_TEMP;
+    if (wb_pmbus_check_word_register(client, 0, PMBUS_READ_TEMPERATURE_2))
+        info->func[0] |= PMBUS_HAVE_TEMP2;
+    if (wb_pmbus_check_word_register(client, 0, PMBUS_READ_TEMPERATURE_3))
+        info->func[0] |= PMBUS_HAVE_TEMP3;
+    if (info->func[0] & (PMBUS_HAVE_TEMP | PMBUS_HAVE_TEMP2
+                 | PMBUS_HAVE_TEMP3)
+        && wb_pmbus_check_byte_register(client, 0,
+                     PMBUS_STATUS_TEMPERATURE))
+            info->func[0] |= PMBUS_HAVE_STATUS_TEMP;
+
+    /* Sensors detected on all pages */
+    for (page = 0; page < info->pages; page++) {
+        if (wb_pmbus_check_word_register(client, page, PMBUS_READ_VOUT)) {
+            info->func[page] |= PMBUS_HAVE_VOUT;
+            if (wb_pmbus_check_byte_register(client, page,
+                              PMBUS_STATUS_VOUT))
+                info->func[page] |= PMBUS_HAVE_STATUS_VOUT;
+        }
+        if (wb_pmbus_check_word_register(client, page, PMBUS_READ_IOUT)) {
+            info->func[page] |= PMBUS_HAVE_IOUT;
+            if (wb_pmbus_check_byte_register(client, 0,
+                              PMBUS_STATUS_IOUT))
+                info->func[page] |= PMBUS_HAVE_STATUS_IOUT;
+        }
+        if (wb_pmbus_check_word_register(client, page, PMBUS_READ_POUT))
+            info->func[page] |= PMBUS_HAVE_POUT;
+    }
+}
+
+/*
+ * Identify chip parameters.
+ */
+static int pmbus_identify(struct i2c_client *client,
+              struct pmbus_driver_info *info)
+{
+    int ret = 0;
+
+    if (!info->pages) {
+        /*
+         * Check if the PAGE command is supported. If it is,
+         * keep setting the page number until it fails or until the
+         * maximum number of pages has been reached. Assume that
+         * this is the number of pages supported by the chip.
+         */
+        if (wb_pmbus_check_byte_register(client, 0, PMBUS_PAGE)) {
+            int page;
+
+            for (page = 1; page < PMBUS_PAGES; page++) {
+                if (wb_pmbus_set_page(client, page, 0xff) < 0)
+                    break;
+            }
+            wb_pmbus_set_page(client, 0, 0xff);
+            info->pages = page;
+        } else {
+            info->pages = 1;
+        }
+
+        wb_pmbus_clear_faults(client);
+    }
+
+    if (wb_pmbus_check_byte_register(client, 0, PMBUS_VOUT_MODE)) {
+        int vout_mode, i;
+
+        vout_mode = wb_pmbus_read_byte_data(client, 0, PMBUS_VOUT_MODE);
+        if (vout_mode >= 0 && vout_mode != 0xff) {
+            switch (vout_mode >> 5) {
+            case 0:
+                break;
+            case 1:
+                info->format[PSC_VOLTAGE_OUT] = vid;
+                for (i = 0; i < info->pages; i++)
+                    info->vrm_version[i] = vr11;
+                break;
+            case 2:
+                info->format[PSC_VOLTAGE_OUT] = direct;
+                break;
+            default:
+                ret = -ENODEV;
+                goto abort;
+            }
+        }
+    }
+
+    /*
+     * We should check if the COEFFICIENTS register is supported.
+     * If it is, and the chip is configured for direct mode, we can read
+     * the coefficients from the chip, one set per group of sensor
+     * registers.
+     *
+     * To do this, we will need access to a chip which actually supports the
+     * COEFFICIENTS command, since the command is too complex to implement
+     * without testing it. Until then, abort if a chip configured for direct
+     * mode was detected.
+     */
+    if (info->format[PSC_VOLTAGE_OUT] == direct) {
+        ret = -ENODEV;
+        goto abort;
+    }
+
+    /* Try to find sensor groups  */
+    pmbus_find_sensor_groups(client, info);
+abort:
+    return ret;
+}
+
+static int pmbus_probe(struct i2c_client *client)
+{
+    struct pmbus_driver_info *info;
+    struct pmbus_platform_data *pdata = NULL;
+    struct device *dev = &client->dev;
+    struct pmbus_device_info *device_info;
+
+    info = devm_kzalloc(dev, sizeof(struct pmbus_driver_info), GFP_KERNEL);
+    if (!info)
+        return -ENOMEM;
+
+    device_info = (struct pmbus_device_info *)i2c_match_id(pmbus_id, client)->driver_data;
+    if (device_info->flags & PMBUS_SKIP_STATUS_CHECK) {
+        pdata = devm_kzalloc(dev, sizeof(struct pmbus_platform_data),
+                     GFP_KERNEL);
+        if (!pdata)
+            return -ENOMEM;
+
+        pdata->flags = PMBUS_SKIP_STATUS_CHECK;
+    }
+
+    info->pages = device_info->pages;
+    info->identify = pmbus_identify;
+    dev->platform_data = pdata;
+
+    return wb_pmbus_do_probe(client, info);
+}
+
+static const struct pmbus_device_info pmbus_info_one = {
+    .pages = 1,
+    .flags = 0
+};
+
+static const struct pmbus_device_info pmbus_info_zero = {
+    .pages = 0,
+    .flags = 0
+};
+
+static const struct pmbus_device_info pmbus_info_one_skip = {
+    .pages = 1,
+    .flags = PMBUS_SKIP_STATUS_CHECK
+};
+
+static const struct pmbus_device_info pmbus_info_zero_skip = {
+    .pages = 0,
+    .flags = PMBUS_SKIP_STATUS_CHECK
+};
+/*
+ * Use driver_data to set the number of pages supported by the chip.
+ */
+static const struct i2c_device_id pmbus_id[] = {
+    {"wb_csu550", (kernel_ulong_t)&pmbus_info_zero_skip},
+    {"wb_csu800", (kernel_ulong_t)&pmbus_info_one_skip},
+    {"wb_fsp1200", (kernel_ulong_t)&pmbus_info_one_skip},
+    {"wb_dps550", (kernel_ulong_t)&pmbus_info_one_skip},
+    {}
+};
+
+MODULE_DEVICE_TABLE(i2c, pmbus_id);
+
+/* This is the driver that will be inserted */
+static struct i2c_driver pmbus_driver = {
+    .driver = {
+           .name = "wb_pmbus",
+           },
+    .probe_new = pmbus_probe,
+    .remove = wb_pmbus_do_remove,
+    .id_table = pmbus_id,
+};
+
+module_i2c_driver(pmbus_driver);
+
+MODULE_AUTHOR("support");
+MODULE_DESCRIPTION("Generic PMBus driver");
+MODULE_LICENSE("GPL");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_algo_bit.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_algo_bit.c
new file mode 100644
index 000000000..c98ac7a1c
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_algo_bit.c
@@ -0,0 +1,725 @@
+/* -------------------------------------------------------------------------
+ * i2c-algo-bit.c i2c driver algorithms for bit-shift adapters
+ * -------------------------------------------------------------------------
+ *   Copyright (C) 1995-2000 Simon G. Vogl
+
+    This program is free software; you can redistribute it and/or modify
+    it under the terms of the GNU General Public License as published by
+    the Free Software Foundation; either version 2 of the License, or
+    (at your option) any later version.
+
+    This program is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+    GNU General Public License for more details.
+ * ------------------------------------------------------------------------- */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/delay.h>
+#include <linux/errno.h>
+#include <linux/sched.h>
+#include <linux/i2c.h>
+#include <linux/i2c-algo-bit.h>
+
+static int g_i2c_algo_bit_debug = 0;
+static int g_i2c_algo_bit_error = 0;
+
+module_param(g_i2c_algo_bit_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_i2c_algo_bit_error, int, S_IRUGO | S_IWUSR);
+
+#define I2C_ALGO_BIT_DEBUG(fmt, args...) do {                                        \
+    if (g_i2c_algo_bit_debug) { \
+        printk(KERN_INFO "[I2C_ALGO_BIT][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define I2C_ALGO_BIT_ERROR(fmt, args...) do {                                        \
+    if (g_i2c_algo_bit_error) { \
+        printk(KERN_ERR "[I2C_ALGO_BIT][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+/* ----- global defines ----------------------------------------------- */
+
+#ifdef DEBUG
+#define bit_dbg(level, dev, format, args...) \
+	do { \
+		if (i2c_debug >= level) \
+			dev_dbg(dev, format, ##args); \
+	} while (0)
+#else
+#define bit_dbg(level, dev, format, args...) \
+	do {} while (0)
+#endif /* DEBUG */
+
+/* ----- global variables ---------------------------------------------	*/
+
+static int bit_test;	/* see if the line-setting functions work	*/
+module_param(bit_test, int, S_IRUGO);
+MODULE_PARM_DESC(bit_test, "lines testing - 0 off; 1 report; 2 fail if stuck");
+
+#ifdef DEBUG
+static int i2c_debug = 1;
+module_param(i2c_debug, int, S_IRUGO | S_IWUSR);
+MODULE_PARM_DESC(i2c_debug,
+		 "debug level - 0 off; 1 normal; 2 verbose; 3 very verbose");
+#endif
+
+/* --- setting states on the bus with the right timing: ---------------	*/
+
+#define setsda(adap, val)	adap->setsda(adap->data, val)
+#define setscl(adap, val)	adap->setscl(adap->data, val)
+#define getsda(adap)		adap->getsda(adap->data)
+#define getscl(adap)		adap->getscl(adap->data)
+
+static inline void sdalo(struct i2c_algo_bit_data *adap)
+{
+	setsda(adap, 0);
+	udelay((adap->udelay + 1) / 2);
+}
+
+static inline void sdahi(struct i2c_algo_bit_data *adap)
+{
+	setsda(adap, 1);
+	udelay((adap->udelay + 1) / 2);
+}
+
+static inline void scllo(struct i2c_algo_bit_data *adap)
+{
+	setscl(adap, 0);
+	udelay(adap->udelay / 2);
+}
+
+/*
+ * Raise scl line, and do checking for delays. This is necessary for slower
+ * devices.
+ */
+static int sclhi(struct i2c_algo_bit_data *adap)
+{
+	unsigned long start;
+
+	setscl(adap, 1);
+
+	/* Not all adapters have scl sense line... */
+	if (!adap->getscl)
+		goto done;
+
+	start = jiffies;
+	while (!getscl(adap)) {
+		/* This hw knows how to read the clock line, so we wait
+		 * until it actually gets high.  This is safer as some
+		 * chips may hold it low ("clock stretching") while they
+		 * are processing data internally.
+		 */
+		if (time_after(jiffies, start + adap->timeout)) {
+			/* Test one last time, as we may have been preempted
+			 * between last check and timeout test.
+			 */
+			if (getscl(adap))
+				break;
+			return -ETIMEDOUT;
+		}
+		cpu_relax();
+	}
+#ifdef DEBUG
+	if (jiffies != start && i2c_debug >= 3)
+		pr_debug("i2c-algo-bit: needed %ld jiffies for SCL to go "
+			 "high\n", jiffies - start);
+#endif
+
+done:
+	udelay(adap->udelay);
+	return 0;
+}
+
+/* --- other auxiliary functions --------------------------------------	*/
+static void i2c_start(struct i2c_algo_bit_data *adap)
+{
+	/* assert: scl, sda are high */
+	setsda(adap, 0);
+	udelay(adap->udelay);
+	scllo(adap);
+}
+
+static void i2c_repstart(struct i2c_algo_bit_data *adap)
+{
+	/* assert: scl is low */
+	sdahi(adap);
+	sclhi(adap);
+	setsda(adap, 0);
+	udelay(adap->udelay);
+	scllo(adap);
+}
+
+static void i2c_stop(struct i2c_algo_bit_data *adap)
+{
+	/* assert: scl is low */
+	sdalo(adap);
+	sclhi(adap);
+	setsda(adap, 1);
+	udelay(adap->udelay);
+}
+
+/* send a byte without start cond., look for arbitration,
+   check ackn. from slave */
+/* returns:
+ * 1 if the device acknowledged
+ * 0 if the device did not ack
+ * -ETIMEDOUT if an error occurred (while raising the scl line)
+ */
+static int i2c_outb(struct i2c_adapter *i2c_adap, unsigned char c)
+{
+	int i;
+	int sb;
+	int ack;
+	struct i2c_algo_bit_data *adap = i2c_adap->algo_data;
+
+	/* assert: scl is low */
+	for (i = 7; i >= 0; i--) {
+		sb = (c >> i) & 1;
+		setsda(adap, sb);
+		udelay((adap->udelay + 1) / 2);
+		if (sclhi(adap) < 0) { /* timed out */
+			bit_dbg(1, &i2c_adap->dev, "i2c_outb: 0x%02x, "
+				"timeout at bit #%d\n", (int)c, i);
+			return -ETIMEDOUT;
+		}
+		/* FIXME do arbitration here:
+		 * if (sb && !getsda(adap)) -> ouch! Get out of here.
+		 *
+		 * Report a unique code, so higher level code can retry
+		 * the whole (combined) message and *NOT* issue STOP.
+		 */
+		scllo(adap);
+	}
+	sdahi(adap);
+	if (sclhi(adap) < 0) { /* timeout */
+		bit_dbg(1, &i2c_adap->dev, "i2c_outb: 0x%02x, "
+			"timeout at ack\n", (int)c);
+		return -ETIMEDOUT;
+	}
+
+	/* read ack: SDA should be pulled down by slave, or it may
+	 * NAK (usually to report problems with the data we wrote).
+	 */
+	ack = !getsda(adap);    /* ack: sda is pulled low -> success */
+	bit_dbg(2, &i2c_adap->dev, "i2c_outb: 0x%02x %s\n", (int)c,
+		ack ? "A" : "NA");
+
+	scllo(adap);
+	return ack;
+	/* assert: scl is low (sda undef) */
+}
+
+static int i2c_inb(struct i2c_adapter *i2c_adap)
+{
+	/* read byte via i2c port, without start/stop sequence	*/
+	/* acknowledge is sent in i2c_read.			*/
+	int i;
+	unsigned char indata = 0;
+	struct i2c_algo_bit_data *adap = i2c_adap->algo_data;
+
+	/* assert: scl is low */
+	sdahi(adap);
+	for (i = 0; i < 8; i++) {
+		if (sclhi(adap) < 0) { /* timeout */
+			bit_dbg(1, &i2c_adap->dev, "i2c_inb: timeout at bit "
+				"#%d\n", 7 - i);
+			return -ETIMEDOUT;
+		}
+		indata *= 2;
+		if (getsda(adap))
+			indata |= 0x01;
+		setscl(adap, 0);
+		udelay(i == 7 ? adap->udelay / 2 : adap->udelay);
+	}
+	/* assert: scl is low */
+	return indata;
+}
+
+/*
+ * Sanity check for the adapter hardware - check the reaction of
+ * the bus lines only if it seems to be idle.
+ */
+static int test_bus(struct i2c_adapter *i2c_adap)
+{
+	struct i2c_algo_bit_data *adap = i2c_adap->algo_data;
+	const char *name = i2c_adap->name;
+	int scl, sda, ret;
+
+	if (adap->pre_xfer) {
+		ret = adap->pre_xfer(i2c_adap);
+		if (ret < 0)
+			return -ENODEV;
+	}
+
+	if (adap->getscl == NULL)
+		pr_info("%s: Testing SDA only, SCL is not readable\n", name);
+
+	sda = getsda(adap);
+	scl = (adap->getscl == NULL) ? 1 : getscl(adap);
+	if (!scl || !sda) {
+		printk(KERN_WARNING
+		       "%s: bus seems to be busy (scl=%d, sda=%d)\n",
+		       name, scl, sda);
+		goto bailout;
+	}
+
+	sdalo(adap);
+	sda = getsda(adap);
+	scl = (adap->getscl == NULL) ? 1 : getscl(adap);
+	if (sda) {
+		printk(KERN_WARNING "%s: SDA stuck high!\n", name);
+		goto bailout;
+	}
+	if (!scl) {
+		printk(KERN_WARNING "%s: SCL unexpected low "
+		       "while pulling SDA low!\n", name);
+		goto bailout;
+	}
+
+	sdahi(adap);
+	sda = getsda(adap);
+	scl = (adap->getscl == NULL) ? 1 : getscl(adap);
+	if (!sda) {
+		printk(KERN_WARNING "%s: SDA stuck low!\n", name);
+		goto bailout;
+	}
+	if (!scl) {
+		printk(KERN_WARNING "%s: SCL unexpected low "
+		       "while pulling SDA high!\n", name);
+		goto bailout;
+	}
+
+	scllo(adap);
+	sda = getsda(adap);
+	scl = (adap->getscl == NULL) ? 0 : getscl(adap);
+	if (scl) {
+		printk(KERN_WARNING "%s: SCL stuck high!\n", name);
+		goto bailout;
+	}
+	if (!sda) {
+		printk(KERN_WARNING "%s: SDA unexpected low "
+		       "while pulling SCL low!\n", name);
+		goto bailout;
+	}
+
+	sclhi(adap);
+	sda = getsda(adap);
+	scl = (adap->getscl == NULL) ? 1 : getscl(adap);
+	if (!scl) {
+		printk(KERN_WARNING "%s: SCL stuck low!\n", name);
+		goto bailout;
+	}
+	if (!sda) {
+		printk(KERN_WARNING "%s: SDA unexpected low "
+		       "while pulling SCL high!\n", name);
+		goto bailout;
+	}
+
+	if (adap->post_xfer)
+		adap->post_xfer(i2c_adap);
+
+	pr_info("%s: Test OK\n", name);
+	return 0;
+bailout:
+	sdahi(adap);
+	sclhi(adap);
+
+	if (adap->post_xfer)
+		adap->post_xfer(i2c_adap);
+
+	return -ENODEV;
+}
+
+/* ----- Utility functions
+ */
+
+/* try_address tries to contact a chip for a number of
+ * times before it gives up.
+ * return values:
+ * 1 chip answered
+ * 0 chip did not answer
+ * -x transmission error
+ */
+static int try_address(struct i2c_adapter *i2c_adap,
+		       unsigned char addr, int retries)
+{
+	struct i2c_algo_bit_data *adap = i2c_adap->algo_data;
+	int i, ret = 0;
+
+	for (i = 0; i <= retries; i++) {
+		ret = i2c_outb(i2c_adap, addr);
+		if (ret == 1 || i == retries)
+			break;
+		bit_dbg(3, &i2c_adap->dev, "emitting stop condition\n");
+		i2c_stop(adap);
+		udelay(adap->udelay);
+		yield();
+		bit_dbg(3, &i2c_adap->dev, "emitting start condition\n");
+		i2c_start(adap);
+	}
+	if (i && ret)
+		bit_dbg(1, &i2c_adap->dev, "Used %d tries to %s client at "
+			"0x%02x: %s\n", i + 1,
+			addr & 1 ? "read from" : "write to", addr >> 1,
+			ret == 1 ? "success" : "failed, timeout?");
+	return ret;
+}
+
+static int sendbytes(struct i2c_adapter *i2c_adap, struct i2c_msg *msg)
+{
+	const unsigned char *temp = msg->buf;
+	int count = msg->len;
+	unsigned short nak_ok = msg->flags & I2C_M_IGNORE_NAK;
+	int retval;
+	int wrcount = 0;
+
+	while (count > 0) {
+		retval = i2c_outb(i2c_adap, *temp);
+
+		/* OK/ACK; or ignored NAK */
+		if ((retval > 0) || (nak_ok && (retval == 0))) {
+			count--;
+			temp++;
+			wrcount++;
+
+		/* A slave NAKing the master means the slave didn't like
+		 * something about the data it saw.  For example, maybe
+		 * the SMBus PEC was wrong.
+		 */
+		} else if (retval == 0) {
+			dev_err(&i2c_adap->dev, "sendbytes: NAK bailout.\n");
+			return -EIO;
+
+		/* Timeout; or (someday) lost arbitration
+		 *
+		 * FIXME Lost ARB implies retrying the transaction from
+		 * the first message, after the "winning" master issues
+		 * its STOP.  As a rule, upper layer code has no reason
+		 * to know or care about this ... it is *NOT* an error.
+		 */
+		} else {
+			dev_err(&i2c_adap->dev, "sendbytes: error %d\n",
+					retval);
+			return retval;
+		}
+	}
+	return wrcount;
+}
+
+static int acknak(struct i2c_adapter *i2c_adap, int is_ack)
+{
+	struct i2c_algo_bit_data *adap = i2c_adap->algo_data;
+
+	/* assert: sda is high */
+	if (is_ack)		/* send ack */
+		setsda(adap, 0);
+	udelay((adap->udelay + 1) / 2);
+	if (sclhi(adap) < 0) {	/* timeout */
+		dev_err(&i2c_adap->dev, "readbytes: ack/nak timeout\n");
+		return -ETIMEDOUT;
+	}
+	scllo(adap);
+	return 0;
+}
+
+static int readbytes(struct i2c_adapter *i2c_adap, struct i2c_msg *msg)
+{
+	int inval;
+	int rdcount = 0;	/* counts bytes read */
+	unsigned char *temp = msg->buf;
+	int count = msg->len;
+	const unsigned flags = msg->flags;
+
+	while (count > 0) {
+		inval = i2c_inb(i2c_adap);
+		if (inval >= 0) {
+			*temp = inval;
+			rdcount++;
+		} else {   /* read timed out */
+			break;
+		}
+
+		temp++;
+		count--;
+
+		/* Some SMBus transactions require that we receive the
+		   transaction length as the first read byte. */
+		if (rdcount == 1 && (flags & I2C_M_RECV_LEN)) {
+			if (inval <= 0 || inval > I2C_SMBUS_BLOCK_MAX) {
+				if (!(flags & I2C_M_NO_RD_ACK))
+					acknak(i2c_adap, 0);
+				dev_err(&i2c_adap->dev, "readbytes: invalid "
+					"block length (%d)\n", inval);
+				return -EPROTO;
+			}
+			/* The original count value accounts for the extra
+			   bytes, that is, either 1 for a regular transaction,
+			   or 2 for a PEC transaction. */
+			count += inval;
+			msg->len += inval;
+		}
+
+		bit_dbg(2, &i2c_adap->dev, "readbytes: 0x%02x %s\n",
+			inval,
+			(flags & I2C_M_NO_RD_ACK)
+				? "(no ack/nak)"
+				: (count ? "A" : "NA"));
+
+		if (!(flags & I2C_M_NO_RD_ACK)) {
+			inval = acknak(i2c_adap, count);
+			if (inval < 0)
+				return inval;
+		}
+	}
+	return rdcount;
+}
+
+/* doAddress initiates the transfer by generating the start condition (in
+ * try_address) and transmits the address in the necessary format to handle
+ * reads, writes as well as 10bit-addresses.
+ * returns:
+ *  0 everything went okay, the chip ack'ed, or IGNORE_NAK flag was set
+ * -x an error occurred (like: -ENXIO if the device did not answer, or
+ *	-ETIMEDOUT, for example if the lines are stuck...)
+ */
+static int bit_doAddress(struct i2c_adapter *i2c_adap, struct i2c_msg *msg)
+{
+	unsigned short flags = msg->flags;
+	unsigned short nak_ok = msg->flags & I2C_M_IGNORE_NAK;
+	struct i2c_algo_bit_data *adap = i2c_adap->algo_data;
+
+	unsigned char addr;
+	int ret, retries;
+
+	retries = nak_ok ? 0 : i2c_adap->retries;
+
+	if (flags & I2C_M_TEN) {
+		/* a ten bit address */
+		addr = 0xf0 | ((msg->addr >> 7) & 0x06);
+		bit_dbg(2, &i2c_adap->dev, "addr0: %d\n", addr);
+		/* try extended address code...*/
+		ret = try_address(i2c_adap, addr, retries);
+		if ((ret != 1) && !nak_ok)  {
+			dev_err(&i2c_adap->dev,
+				"died at extended address code\n");
+			return -ENXIO;
+		}
+		/* the remaining 8 bit address */
+		ret = i2c_outb(i2c_adap, msg->addr & 0xff);
+		if ((ret != 1) && !nak_ok) {
+			/* the chip did not ack / xmission error occurred */
+			dev_err(&i2c_adap->dev, "died at 2nd address code\n");
+			return -ENXIO;
+		}
+		if (flags & I2C_M_RD) {
+			bit_dbg(3, &i2c_adap->dev, "emitting repeated "
+				"start condition\n");
+			i2c_repstart(adap);
+			/* okay, now switch into reading mode */
+			addr |= 0x01;
+			ret = try_address(i2c_adap, addr, retries);
+			if ((ret != 1) && !nak_ok) {
+				dev_err(&i2c_adap->dev,
+					"died at repeated address code\n");
+				return -EIO;
+			}
+		}
+	} else {		/* normal 7bit address	*/
+		addr = msg->addr << 1;
+		if (flags & I2C_M_RD)
+			addr |= 1;
+		if (flags & I2C_M_REV_DIR_ADDR)
+			addr ^= 1;
+		ret = try_address(i2c_adap, addr, retries);
+		if ((ret != 1) && !nak_ok)
+			return -ENXIO;
+	}
+
+	return 0;
+}
+
+static void bit_i2c_unblock(struct i2c_adapter *i2c_adap)
+{
+    int i;
+    struct i2c_algo_bit_data *adap = i2c_adap->algo_data;
+
+    for (i = 0; i < 9; i++) {
+        setscl(adap, 0);
+        udelay(5);
+        setscl(adap, 1);
+        udelay(5);
+    }
+    setscl(adap, 0);
+    setsda(adap, 0);
+    udelay(5);
+    setscl(adap, 1);
+    udelay(5);
+    setsda(adap, 1);
+}
+
+static int check_bit_i2c_unblock(struct i2c_adapter *i2c_adap)
+{
+    struct i2c_algo_bit_data *adap = i2c_adap->algo_data;
+    int sda, scl;
+
+    sda = getsda(adap);
+    scl = getscl(adap);
+    if ((sda == 0) && scl) {
+        I2C_ALGO_BIT_ERROR("SCL is high and SDA is low, send 9 clock to device.\n");
+        bit_i2c_unblock(i2c_adap);
+    }
+
+    sda = getsda(adap);
+    scl = getscl(adap);
+    if (sda && scl) {
+        I2C_ALGO_BIT_DEBUG("SCL and SDA are both high, i2c level check ok.\n");
+        return 0;
+    }
+    dev_warn(&i2c_adap->dev, "Check i2c level failed, SCL %s, SDA %s.\n", scl ? "high" : "low", sda ? "high" : "low");
+    return -EIO;
+}
+
+static int bit_xfer(struct i2c_adapter *i2c_adap,
+		    struct i2c_msg msgs[], int num)
+{
+	struct i2c_msg *pmsg;
+	struct i2c_algo_bit_data *adap = i2c_adap->algo_data;
+	int i, ret;
+	unsigned short nak_ok;
+
+	if (adap->pre_xfer) {
+		ret = adap->pre_xfer(i2c_adap);
+		if (ret < 0)
+			return ret;
+	}
+
+    if (check_bit_i2c_unblock(i2c_adap) < 0) {
+        I2C_ALGO_BIT_ERROR("check i2c is block.\n");
+        return -EIO;
+    }
+
+	bit_dbg(3, &i2c_adap->dev, "emitting start condition\n");
+	i2c_start(adap);
+	for (i = 0; i < num; i++) {
+		pmsg = &msgs[i];
+		nak_ok = pmsg->flags & I2C_M_IGNORE_NAK;
+		if (!(pmsg->flags & I2C_M_NOSTART)) {
+			if (i) {
+				bit_dbg(3, &i2c_adap->dev, "emitting "
+					"repeated start condition\n");
+				i2c_repstart(adap);
+			}
+			ret = bit_doAddress(i2c_adap, pmsg);
+			if ((ret != 0) && !nak_ok) {
+				bit_dbg(1, &i2c_adap->dev, "NAK from "
+					"device addr 0x%02x msg #%d\n",
+					msgs[i].addr, i);
+				goto bailout;
+			}
+		}
+		if (pmsg->flags & I2C_M_RD) {
+			/* read bytes into buffer*/
+			ret = readbytes(i2c_adap, pmsg);
+			if (ret >= 1)
+				bit_dbg(2, &i2c_adap->dev, "read %d byte%s\n",
+					ret, ret == 1 ? "" : "s");
+			if (ret < pmsg->len) {
+				if (ret >= 0)
+					ret = -EIO;
+				goto bailout;
+			}
+		} else {
+			/* write bytes from buffer */
+			ret = sendbytes(i2c_adap, pmsg);
+			if (ret >= 1)
+				bit_dbg(2, &i2c_adap->dev, "wrote %d byte%s\n",
+					ret, ret == 1 ? "" : "s");
+			if (ret < pmsg->len) {
+				if (ret >= 0)
+					ret = -EIO;
+				goto bailout;
+			}
+		}
+	}
+	ret = i;
+
+bailout:
+	bit_dbg(3, &i2c_adap->dev, "emitting stop condition\n");
+	i2c_stop(adap);
+
+	if (adap->post_xfer)
+		adap->post_xfer(i2c_adap);
+	return ret;
+}
+
+static u32 bit_func(struct i2c_adapter *adap)
+{
+	return I2C_FUNC_I2C | I2C_FUNC_NOSTART | I2C_FUNC_SMBUS_EMUL |
+	       I2C_FUNC_SMBUS_READ_BLOCK_DATA |
+	       I2C_FUNC_SMBUS_BLOCK_PROC_CALL |
+	       I2C_FUNC_10BIT_ADDR | I2C_FUNC_PROTOCOL_MANGLING;
+}
+
+/* -----exported algorithm data: -------------------------------------	*/
+
+const struct i2c_algorithm wb_i2c_bit_algo = {
+	.master_xfer	= bit_xfer,
+	.functionality	= bit_func,
+};
+EXPORT_SYMBOL(wb_i2c_bit_algo);
+
+static const struct i2c_adapter_quirks i2c_bit_quirk_no_clk_stretch = {
+	.flags = I2C_AQ_NO_CLK_STRETCH,
+};
+
+/*
+ * registering functions to load algorithms at runtime
+ */
+static int __i2c_bit_add_bus(struct i2c_adapter *adap,
+			     int (*add_adapter)(struct i2c_adapter *))
+{
+	struct i2c_algo_bit_data *bit_adap = adap->algo_data;
+	int ret;
+
+	if (bit_test) {
+		ret = test_bus(adap);
+		if (bit_test >= 2 && ret < 0)
+			return -ENODEV;
+	}
+
+	/* register new adapter to i2c module... */
+	adap->algo = &wb_i2c_bit_algo;
+	adap->retries = 3;
+	if (bit_adap->getscl == NULL)
+		adap->quirks = &i2c_bit_quirk_no_clk_stretch;
+
+	ret = add_adapter(adap);
+	if (ret < 0)
+		return ret;
+
+	/* Complain if SCL can't be read */
+	if (bit_adap->getscl == NULL) {
+		dev_warn(&adap->dev, "Not I2C compliant: can't read SCL\n");
+		dev_warn(&adap->dev, "Bus may be unreliable\n");
+	}
+	return 0;
+}
+
+int wb_i2c_bit_add_bus(struct i2c_adapter *adap)
+{
+	return __i2c_bit_add_bus(adap, i2c_add_adapter);
+}
+EXPORT_SYMBOL(wb_i2c_bit_add_bus);
+
+int wb_i2c_bit_add_numbered_bus(struct i2c_adapter *adap)
+{
+	return __i2c_bit_add_bus(adap, i2c_add_numbered_adapter);
+}
+EXPORT_SYMBOL(wb_i2c_bit_add_numbered_bus);
+
+MODULE_AUTHOR("support");
+MODULE_DESCRIPTION("I2C-Bus bit-banging algorithm");
+MODULE_LICENSE("GPL");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_gpio.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_gpio.c
new file mode 100644
index 000000000..0362e905f
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_gpio.c
@@ -0,0 +1,431 @@
+/*
+ * Bitbanging I2C bus driver using the GPIO API
+ *
+ * Copyright (C) 2007 Atmel Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <linux/debugfs.h>
+#include <linux/delay.h>
+#include <linux/i2c.h>
+#include <linux/i2c-algo-bit.h>
+#include <linux/platform_data/i2c-gpio.h>
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/slab.h>
+#include <linux/platform_device.h>
+#include <linux/gpio/consumer.h>
+#include <linux/of.h>
+
+extern int wb_i2c_bit_add_numbered_bus(struct i2c_adapter *adap);
+
+struct i2c_gpio_private_data {
+	struct gpio_desc *sda;
+	struct gpio_desc *scl;
+	struct i2c_adapter adap;
+	struct i2c_algo_bit_data bit_data;
+	struct i2c_gpio_platform_data pdata;
+#ifdef CONFIG_I2C_GPIO_FAULT_INJECTOR
+	struct dentry *debug_dir;
+#endif
+};
+
+/*
+ * Toggle SDA by changing the output value of the pin. This is only
+ * valid for pins configured as open drain (i.e. setting the value
+ * high effectively turns off the output driver.)
+ */
+static void i2c_gpio_setsda_val(void *data, int state)
+{
+	struct i2c_gpio_private_data *priv = data;
+
+	gpiod_set_value_cansleep(priv->sda, state);
+}
+
+/*
+ * Toggle SCL by changing the output value of the pin. This is used
+ * for pins that are configured as open drain and for output-only
+ * pins. The latter case will break the i2c protocol, but it will
+ * often work in practice.
+ */
+static void i2c_gpio_setscl_val(void *data, int state)
+{
+	struct i2c_gpio_private_data *priv = data;
+
+	gpiod_set_value_cansleep(priv->scl, state);
+}
+
+static int i2c_gpio_getsda(void *data)
+{
+	struct i2c_gpio_private_data *priv = data;
+
+	return gpiod_get_value_cansleep(priv->sda);
+}
+
+static int i2c_gpio_getscl(void *data)
+{
+	struct i2c_gpio_private_data *priv = data;
+
+	return gpiod_get_value_cansleep(priv->scl);
+}
+
+#ifdef CONFIG_I2C_GPIO_FAULT_INJECTOR
+static struct dentry *i2c_gpio_debug_dir;
+
+#define setsda(bd, val)	((bd)->setsda((bd)->data, val))
+#define setscl(bd, val)	((bd)->setscl((bd)->data, val))
+#define getsda(bd)	((bd)->getsda((bd)->data))
+#define getscl(bd)	((bd)->getscl((bd)->data))
+
+#define WIRE_ATTRIBUTE(wire) \
+static int fops_##wire##_get(void *data, u64 *val)		\
+{								\
+	struct i2c_gpio_private_data *priv = data;		\
+								\
+	i2c_lock_bus(&priv->adap, I2C_LOCK_ROOT_ADAPTER);	\
+	*val = get##wire(&priv->bit_data);			\
+	i2c_unlock_bus(&priv->adap, I2C_LOCK_ROOT_ADAPTER);	\
+	return 0;						\
+}								\
+static int fops_##wire##_set(void *data, u64 val)		\
+{								\
+	struct i2c_gpio_private_data *priv = data;		\
+								\
+	i2c_lock_bus(&priv->adap, I2C_LOCK_ROOT_ADAPTER);	\
+	set##wire(&priv->bit_data, val);			\
+	i2c_unlock_bus(&priv->adap, I2C_LOCK_ROOT_ADAPTER);	\
+	return 0;						\
+}								\
+DEFINE_DEBUGFS_ATTRIBUTE(fops_##wire, fops_##wire##_get, fops_##wire##_set, "%llu\n")
+
+WIRE_ATTRIBUTE(scl);
+WIRE_ATTRIBUTE(sda);
+
+static void i2c_gpio_incomplete_transfer(struct i2c_gpio_private_data *priv,
+					u32 pattern, u8 pattern_size)
+{
+	struct i2c_algo_bit_data *bit_data = &priv->bit_data;
+	int i;
+
+	i2c_lock_bus(&priv->adap, I2C_LOCK_ROOT_ADAPTER);
+
+	/* START condition */
+	setsda(bit_data, 0);
+	udelay(bit_data->udelay);
+
+	/* Send pattern, request ACK, don't send STOP */
+	for (i = pattern_size - 1; i >= 0; i--) {
+		setscl(bit_data, 0);
+		udelay(bit_data->udelay / 2);
+		setsda(bit_data, (pattern >> i) & 1);
+		udelay((bit_data->udelay + 1) / 2);
+		setscl(bit_data, 1);
+		udelay(bit_data->udelay);
+	}
+
+	i2c_unlock_bus(&priv->adap, I2C_LOCK_ROOT_ADAPTER);
+}
+
+static int fops_incomplete_addr_phase_set(void *data, u64 addr)
+{
+	struct i2c_gpio_private_data *priv = data;
+	u32 pattern;
+
+	if (addr > 0x7f)
+		return -EINVAL;
+
+	/* ADDR (7 bit) + RD (1 bit) + Client ACK, keep SDA hi (1 bit) */
+	pattern = (addr << 2) | 3;
+
+	i2c_gpio_incomplete_transfer(priv, pattern, 9);
+
+	return 0;
+}
+DEFINE_DEBUGFS_ATTRIBUTE(fops_incomplete_addr_phase, NULL, fops_incomplete_addr_phase_set, "%llu\n");
+
+static int fops_incomplete_write_byte_set(void *data, u64 addr)
+{
+	struct i2c_gpio_private_data *priv = data;
+	u32 pattern;
+
+	if (addr > 0x7f)
+		return -EINVAL;
+
+	/* ADDR (7 bit) + WR (1 bit) + Client ACK (1 bit) */
+	pattern = (addr << 2) | 1;
+	/* 0x00 (8 bit) + Client ACK, keep SDA hi (1 bit) */
+	pattern = (pattern << 9) | 1;
+
+	i2c_gpio_incomplete_transfer(priv, pattern, 18);
+
+	return 0;
+}
+DEFINE_DEBUGFS_ATTRIBUTE(fops_incomplete_write_byte, NULL, fops_incomplete_write_byte_set, "%llu\n");
+
+static void i2c_gpio_fault_injector_init(struct platform_device *pdev)
+{
+	struct i2c_gpio_private_data *priv = platform_get_drvdata(pdev);
+
+	/*
+	 * If there will be a debugfs-dir per i2c adapter somewhen, put the
+	 * 'fault-injector' dir there. Until then, we have a global dir with
+	 * all adapters as subdirs.
+	 */
+	if (!i2c_gpio_debug_dir) {
+		i2c_gpio_debug_dir = debugfs_create_dir("i2c-fault-injector", NULL);
+		if (!i2c_gpio_debug_dir)
+			return;
+	}
+
+	priv->debug_dir = debugfs_create_dir(pdev->name, i2c_gpio_debug_dir);
+	if (!priv->debug_dir)
+		return;
+
+	debugfs_create_file_unsafe("scl", 0600, priv->debug_dir, priv, &fops_scl);
+	debugfs_create_file_unsafe("sda", 0600, priv->debug_dir, priv, &fops_sda);
+	debugfs_create_file_unsafe("incomplete_address_phase", 0200, priv->debug_dir,
+				   priv, &fops_incomplete_addr_phase);
+	debugfs_create_file_unsafe("incomplete_write_byte", 0200, priv->debug_dir,
+				   priv, &fops_incomplete_write_byte);
+}
+
+static void i2c_gpio_fault_injector_exit(struct platform_device *pdev)
+{
+	struct i2c_gpio_private_data *priv = platform_get_drvdata(pdev);
+
+	debugfs_remove_recursive(priv->debug_dir);
+}
+#else
+static inline void i2c_gpio_fault_injector_init(struct platform_device *pdev) {}
+static inline void i2c_gpio_fault_injector_exit(struct platform_device *pdev) {}
+#endif /* CONFIG_I2C_GPIO_FAULT_INJECTOR*/
+
+static void of_i2c_gpio_get_props(struct device_node *np,
+				  struct i2c_gpio_platform_data *pdata)
+{
+	u32 reg;
+
+	of_property_read_u32(np, "i2c-gpio,delay-us", &pdata->udelay);
+
+	if (!of_property_read_u32(np, "i2c-gpio,timeout-ms", &reg))
+		pdata->timeout = msecs_to_jiffies(reg);
+
+	pdata->sda_is_open_drain =
+		of_property_read_bool(np, "i2c-gpio,sda-open-drain");
+	pdata->scl_is_open_drain =
+		of_property_read_bool(np, "i2c-gpio,scl-open-drain");
+	pdata->scl_is_output_only =
+		of_property_read_bool(np, "i2c-gpio,scl-output-only");
+}
+
+static struct gpio_desc *i2c_gpio_get_desc(struct device *dev,
+					   const char *con_id,
+					   unsigned int index,
+					   enum gpiod_flags gflags)
+{
+	struct gpio_desc *retdesc;
+	int ret;
+
+	retdesc = devm_gpiod_get(dev, con_id, gflags);
+	if (!IS_ERR(retdesc)) {
+		dev_dbg(dev, "got GPIO from name %s\n", con_id);
+		return retdesc;
+	}
+
+	retdesc = devm_gpiod_get_index(dev, NULL, index, gflags);
+	if (!IS_ERR(retdesc)) {
+		dev_dbg(dev, "got GPIO from index %u\n", index);
+		return retdesc;
+	}
+
+	ret = PTR_ERR(retdesc);
+
+	/* FIXME: hack in the old code, is this really necessary? */
+	if (ret == -EINVAL)
+		retdesc = ERR_PTR(-EPROBE_DEFER);
+
+	/* This happens if the GPIO driver is not yet probed, let's defer */
+	if (ret == -ENOENT)
+		retdesc = ERR_PTR(-EPROBE_DEFER);
+
+	if (PTR_ERR(retdesc) != -EPROBE_DEFER)
+		dev_err(dev, "error trying to get descriptor: %d\n", ret);
+
+	return retdesc;
+}
+
+static int i2c_gpio_probe(struct platform_device *pdev)
+{
+	struct i2c_gpio_private_data *priv;
+	struct i2c_gpio_platform_data *pdata;
+	struct i2c_algo_bit_data *bit_data;
+	struct i2c_adapter *adap;
+	struct device *dev = &pdev->dev;
+	struct device_node *np = dev->of_node;
+	enum gpiod_flags gflags;
+	int ret;
+
+	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
+	if (!priv)
+		return -ENOMEM;
+
+	adap = &priv->adap;
+	bit_data = &priv->bit_data;
+	pdata = &priv->pdata;
+
+	if (np) {
+		of_i2c_gpio_get_props(np, pdata);
+	} else {
+		/*
+		 * If all platform data settings are zero it is OK
+		 * to not provide any platform data from the board.
+		 */
+		if (dev_get_platdata(dev))
+			memcpy(pdata, dev_get_platdata(dev), sizeof(*pdata));
+	}
+
+	/*
+	 * First get the GPIO pins; if it fails, we'll defer the probe.
+	 * If the SDA line is marked from platform data or device tree as
+	 * "open drain" it means something outside of our control is making
+	 * this line being handled as open drain, and we should just handle
+	 * it as any other output. Else we enforce open drain as this is
+	 * required for an I2C bus.
+	 */
+	if (pdata->sda_is_open_drain)
+		gflags = GPIOD_OUT_HIGH;
+	else
+		gflags = GPIOD_OUT_HIGH_OPEN_DRAIN;
+	priv->sda = i2c_gpio_get_desc(dev, "sda", 0, gflags);
+	if (IS_ERR(priv->sda))
+		return PTR_ERR(priv->sda);
+
+	/*
+	 * If the SCL line is marked from platform data or device tree as
+	 * "open drain" it means something outside of our control is making
+	 * this line being handled as open drain, and we should just handle
+	 * it as any other output. Else we enforce open drain as this is
+	 * required for an I2C bus.
+	 */
+	if (pdata->scl_is_open_drain)
+		gflags = GPIOD_OUT_HIGH;
+	else
+		gflags = GPIOD_OUT_HIGH_OPEN_DRAIN;
+	priv->scl = i2c_gpio_get_desc(dev, "scl", 1, gflags);
+	if (IS_ERR(priv->scl))
+		return PTR_ERR(priv->scl);
+
+	if (gpiod_cansleep(priv->sda) || gpiod_cansleep(priv->scl))
+		dev_warn(dev, "Slow GPIO pins might wreak havoc into I2C/SMBus bus timing");
+
+	bit_data->setsda = i2c_gpio_setsda_val;
+	bit_data->setscl = i2c_gpio_setscl_val;
+
+	if (!pdata->scl_is_output_only)
+		bit_data->getscl = i2c_gpio_getscl;
+	bit_data->getsda = i2c_gpio_getsda;
+
+	if (pdata->udelay)
+		bit_data->udelay = pdata->udelay;
+	else if (pdata->scl_is_output_only)
+		bit_data->udelay = 50;			/* 10 kHz */
+	else
+		bit_data->udelay = 5;			/* 100 kHz */
+
+	if (pdata->timeout)
+		bit_data->timeout = pdata->timeout;
+	else
+		bit_data->timeout = HZ / 10;		/* 100 ms */
+
+	bit_data->data = priv;
+
+	adap->owner = THIS_MODULE;
+	if (np)
+		strlcpy(adap->name, dev_name(dev), sizeof(adap->name));
+	else
+		snprintf(adap->name, sizeof(adap->name), "i2c-gpio%d", pdev->id);
+
+	adap->algo_data = bit_data;
+	adap->class = I2C_CLASS_HWMON | I2C_CLASS_SPD;
+	adap->dev.parent = dev;
+	adap->dev.of_node = np;
+
+	adap->nr = pdev->id;
+	ret = wb_i2c_bit_add_numbered_bus(adap);
+	if (ret)
+		return ret;
+
+	platform_set_drvdata(pdev, priv);
+
+	/*
+	 * FIXME: using global GPIO numbers is not helpful. If/when we
+	 * get accessors to get the actual name of the GPIO line,
+	 * from the descriptor, then provide that instead.
+	 */
+	dev_info(dev, "using lines %u (SDA) and %u (SCL%s)\n",
+		 desc_to_gpio(priv->sda), desc_to_gpio(priv->scl),
+		 pdata->scl_is_output_only
+		 ? ", no clock stretching" : "");
+
+	i2c_gpio_fault_injector_init(pdev);
+
+	return 0;
+}
+
+static int i2c_gpio_remove(struct platform_device *pdev)
+{
+	struct i2c_gpio_private_data *priv;
+	struct i2c_adapter *adap;
+
+	i2c_gpio_fault_injector_exit(pdev);
+
+	priv = platform_get_drvdata(pdev);
+	adap = &priv->adap;
+
+	i2c_del_adapter(adap);
+
+	return 0;
+}
+
+#if defined(CONFIG_OF)
+static const struct of_device_id i2c_gpio_dt_ids[] = {
+	{ .compatible = "wb-i2c-gpio", },
+	{ /* sentinel */ }
+};
+
+MODULE_DEVICE_TABLE(of, i2c_gpio_dt_ids);
+#endif
+
+static struct platform_driver i2c_gpio_driver = {
+	.driver		= {
+		.name	= "wb-i2c-gpio",
+		.of_match_table	= of_match_ptr(i2c_gpio_dt_ids),
+	},
+	.probe		= i2c_gpio_probe,
+	.remove		= i2c_gpio_remove,
+};
+
+static int __init i2c_gpio_init(void)
+{
+	int ret;
+
+	ret = platform_driver_register(&i2c_gpio_driver);
+	if (ret)
+		printk(KERN_ERR "i2c-gpio: probe failed: %d\n", ret);
+
+	return ret;
+}
+subsys_initcall(i2c_gpio_init);
+
+static void __exit i2c_gpio_exit(void)
+{
+	platform_driver_unregister(&i2c_gpio_driver);
+}
+module_exit(i2c_gpio_exit);
+
+MODULE_AUTHOR("support");
+MODULE_DESCRIPTION("Platform-independent bitbanging I2C driver");
+MODULE_LICENSE("GPL");
+MODULE_ALIAS("platform:i2c-gpio");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_gpio_device.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_gpio_device.c
new file mode 100644
index 000000000..1e1d815ee
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_gpio_device.c
@@ -0,0 +1,133 @@
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/io.h>
+#include <linux/errno.h>
+#include <linux/ioport.h>
+#include <linux/platform_device.h>
+#include <linux/i2c.h>
+#include <linux/platform_data/i2c-gpio.h>
+#include <linux/gpio.h>
+#include <linux/gpio/machine.h>
+#include <linux/delay.h>
+#include <asm/delay.h>
+#include <linux/miscdevice.h>
+
+#define I2C_GPIO_DEV_NAME_LEN (16)
+static char i2c_gpio_dev_name[I2C_GPIO_DEV_NAME_LEN] = {0};
+
+static int gpio_sda = 17;
+module_param(gpio_sda, int, S_IRUGO | S_IWUSR);
+
+static int gpio_scl = 1;
+module_param(gpio_scl, int, S_IRUGO | S_IWUSR);
+
+static int gpio_udelay = 2;
+module_param(gpio_udelay, int, S_IRUGO | S_IWUSR);
+
+static int bus_num = -1;
+module_param(bus_num, int, S_IRUGO | S_IWUSR);
+
+static char *gpio_chip_name = NULL;
+module_param(gpio_chip_name, charp, 0644);
+MODULE_PARM_DESC(str_var, "A string variable for GPIO controller");
+
+static int g_wb_i2c_gpio_device_debug = 0;
+static int g_wb_i2c_gpio_device_error = 0;
+
+module_param(g_wb_i2c_gpio_device_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_i2c_gpio_device_error, int, S_IRUGO | S_IWUSR);
+
+#define WB_I2C_GPIO_DEVICE_VERBOSE(fmt, args...) do {                                        \
+    if (g_wb_i2c_gpio_device_debug) { \
+        printk(KERN_INFO "[WB_I2C_GPIO_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define WB_I2C_GPIO_DEVICE_ERROR(fmt, args...) do {                                        \
+    if (g_wb_i2c_gpio_device_error) { \
+        printk(KERN_ERR "[WB_I2C_GPIO_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+/****************** i2c adapter with gpio ***********************/
+static struct i2c_gpio_platform_data i2c_pdata = {
+    .udelay = 2,
+    .scl_is_output_only = 0,
+    .sda_is_open_drain = 0,
+    .scl_is_open_drain = 0,
+};
+
+static void i2c_gpio_release(struct device *dev)
+{
+    return;
+}
+
+static struct platform_device wb_i2c_gpio_device = {
+    .name       = "wb-i2c-gpio",
+    .id     = -1,
+    .num_resources  = 0,
+    .resource   = NULL,
+    .dev        = {
+        .platform_data = &i2c_pdata,
+        .release = i2c_gpio_release,
+    },
+};
+
+/*
+ * i2c
+ */
+static struct gpiod_lookup_table wb_i2c_gpio_table = {
+    .dev_id = "wb-i2c-gpio",
+    .table = {
+        GPIO_LOOKUP("wb_gpio_d1500", 17, "sda",
+                GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
+        GPIO_LOOKUP("wb_gpio_d1500", 1, "scl",
+                GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
+        { },
+    },
+};
+
+static int __init wb_i2c_gpio_device_init(void)
+{
+    int err;
+
+    WB_I2C_GPIO_DEVICE_VERBOSE("wb_i2c_gpio_device_init enter!\n");
+    wb_i2c_gpio_table.table[0].chip_hwnum = gpio_sda;
+    wb_i2c_gpio_table.table[1].chip_hwnum = gpio_scl;
+    i2c_pdata.udelay = gpio_udelay;
+
+    if (gpio_chip_name) {
+        wb_i2c_gpio_table.table[0].key = gpio_chip_name;
+        wb_i2c_gpio_table.table[1].key = gpio_chip_name;
+    }
+
+    if (bus_num >= 0) {
+        wb_i2c_gpio_device.id = bus_num;
+        snprintf(i2c_gpio_dev_name, I2C_GPIO_DEV_NAME_LEN, "wb-i2c-gpio.%d", bus_num);
+        wb_i2c_gpio_table.dev_id = i2c_gpio_dev_name;
+    }
+
+    gpiod_add_lookup_table(&wb_i2c_gpio_table);
+
+    err = platform_device_register(&wb_i2c_gpio_device);
+    if (err < 0) {
+        printk(KERN_ERR "register i2c gpio device fail(%d). \n", err);
+        gpiod_remove_lookup_table(&wb_i2c_gpio_table);
+        return -1;
+    }
+    return 0;
+}
+
+static void __exit wb_i2c_gpio_device_exit(void)
+{
+    WB_I2C_GPIO_DEVICE_VERBOSE("wb_i2c_gpio_device_exit enter!\n");
+    platform_device_unregister(&wb_i2c_gpio_device);
+    gpiod_remove_lookup_table(&wb_i2c_gpio_table);
+}
+
+module_init(wb_i2c_gpio_device_init);
+module_exit(wb_i2c_gpio_device_exit);
+MODULE_DESCRIPTION("I2C GPIO Devices");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_i801.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_i801.c
new file mode 100644
index 000000000..a733c1154
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_i801.c
@@ -0,0 +1,2114 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+    Copyright (c) 1998 - 2002  Frodo Looijaard <frodol@dds.nl>,
+    Philip Edelbrock <phil@netroedge.com>, and Mark D. Studebaker
+    <mdsxyz123@yahoo.com>
+    Copyright (C) 2007 - 2014  Jean Delvare <jdelvare@suse.de>
+    Copyright (C) 2010         Intel Corporation,
+                               David Woodhouse <dwmw2@infradead.org>
+
+*/
+
+/*
+ * Supports the following Intel I/O Controller Hubs (ICH):
+ *
+ *					I/O			Block	I2C
+ *					region	SMBus	Block	proc.	block
+ * Chip name			PCI ID	size	PEC	buffer	call	read
+ * ---------------------------------------------------------------------------
+ * 82801AA (ICH)		0x2413	16	no	no	no	no
+ * 82801AB (ICH0)		0x2423	16	no	no	no	no
+ * 82801BA (ICH2)		0x2443	16	no	no	no	no
+ * 82801CA (ICH3)		0x2483	32	soft	no	no	no
+ * 82801DB (ICH4)		0x24c3	32	hard	yes	no	no
+ * 82801E (ICH5)		0x24d3	32	hard	yes	yes	yes
+ * 6300ESB			0x25a4	32	hard	yes	yes	yes
+ * 82801F (ICH6)		0x266a	32	hard	yes	yes	yes
+ * 6310ESB/6320ESB		0x269b	32	hard	yes	yes	yes
+ * 82801G (ICH7)		0x27da	32	hard	yes	yes	yes
+ * 82801H (ICH8)		0x283e	32	hard	yes	yes	yes
+ * 82801I (ICH9)		0x2930	32	hard	yes	yes	yes
+ * EP80579 (Tolapai)		0x5032	32	hard	yes	yes	yes
+ * ICH10			0x3a30	32	hard	yes	yes	yes
+ * ICH10			0x3a60	32	hard	yes	yes	yes
+ * 5/3400 Series (PCH)		0x3b30	32	hard	yes	yes	yes
+ * 6 Series (PCH)		0x1c22	32	hard	yes	yes	yes
+ * Patsburg (PCH)		0x1d22	32	hard	yes	yes	yes
+ * Patsburg (PCH) IDF		0x1d70	32	hard	yes	yes	yes
+ * Patsburg (PCH) IDF		0x1d71	32	hard	yes	yes	yes
+ * Patsburg (PCH) IDF		0x1d72	32	hard	yes	yes	yes
+ * DH89xxCC (PCH)		0x2330	32	hard	yes	yes	yes
+ * Panther Point (PCH)		0x1e22	32	hard	yes	yes	yes
+ * Lynx Point (PCH)		0x8c22	32	hard	yes	yes	yes
+ * Lynx Point-LP (PCH)		0x9c22	32	hard	yes	yes	yes
+ * Avoton (SOC)			0x1f3c	32	hard	yes	yes	yes
+ * Wellsburg (PCH)		0x8d22	32	hard	yes	yes	yes
+ * Wellsburg (PCH) MS		0x8d7d	32	hard	yes	yes	yes
+ * Wellsburg (PCH) MS		0x8d7e	32	hard	yes	yes	yes
+ * Wellsburg (PCH) MS		0x8d7f	32	hard	yes	yes	yes
+ * Coleto Creek (PCH)		0x23b0	32	hard	yes	yes	yes
+ * Wildcat Point (PCH)		0x8ca2	32	hard	yes	yes	yes
+ * Wildcat Point-LP (PCH)	0x9ca2	32	hard	yes	yes	yes
+ * BayTrail (SOC)		0x0f12	32	hard	yes	yes	yes
+ * Braswell (SOC)		0x2292	32	hard	yes	yes	yes
+ * Sunrise Point-H (PCH) 	0xa123  32	hard	yes	yes	yes
+ * Sunrise Point-LP (PCH)	0x9d23	32	hard	yes	yes	yes
+ * DNV (SOC)			0x19df	32	hard	yes	yes	yes
+ * Emmitsburg (PCH)		0x1bc9	32	hard	yes	yes	yes
+ * Broxton (SOC)		0x5ad4	32	hard	yes	yes	yes
+ * Lewisburg (PCH)		0xa1a3	32	hard	yes	yes	yes
+ * Lewisburg Supersku (PCH)	0xa223	32	hard	yes	yes	yes
+ * Kaby Lake PCH-H (PCH)	0xa2a3	32	hard	yes	yes	yes
+ * Gemini Lake (SOC)		0x31d4	32	hard	yes	yes	yes
+ * Cannon Lake-H (PCH)		0xa323	32	hard	yes	yes	yes
+ * Cannon Lake-LP (PCH)		0x9da3	32	hard	yes	yes	yes
+ * Cedar Fork (PCH)		0x18df	32	hard	yes	yes	yes
+ * Ice Lake-LP (PCH)		0x34a3	32	hard	yes	yes	yes
+ * Comet Lake (PCH)		0x02a3	32	hard	yes	yes	yes
+ * Comet Lake-H (PCH)		0x06a3	32	hard	yes	yes	yes
+ * Elkhart Lake (PCH)		0x4b23	32	hard	yes	yes	yes
+ * Tiger Lake-LP (PCH)		0xa0a3	32	hard	yes	yes	yes
+ * Tiger Lake-H (PCH)		0x43a3	32	hard	yes	yes	yes
+ * Jasper Lake (SOC)		0x4da3	32	hard	yes	yes	yes
+ * Comet Lake-V (PCH)		0xa3a3	32	hard	yes	yes	yes
+ * Alder Lake-S (PCH)		0x7aa3	32	hard	yes	yes	yes
+ *
+ * Features supported by this driver:
+ * Software PEC				no
+ * Hardware PEC				yes
+ * Block buffer				yes
+ * Block process call transaction	yes
+ * I2C block read transaction		yes (doesn't use the block buffer)
+ * Slave mode				no
+ * SMBus Host Notify			yes
+ * Interrupt processing			yes
+ *
+ * See the file Documentation/i2c/busses/i2c-i801.rst for details.
+ */
+
+#include <linux/interrupt.h>
+#include <linux/module.h>
+#include <linux/pci.h>
+#include <linux/kernel.h>
+#include <linux/stddef.h>
+#include <linux/delay.h>
+#include <linux/ioport.h>
+#include <linux/init.h>
+#include <linux/i2c.h>
+#include <linux/i2c-smbus.h>
+#include <linux/acpi.h>
+#include <linux/io.h>
+#include <linux/dmi.h>
+#include <linux/slab.h>
+#include <linux/string.h>
+#include <linux/wait.h>
+#include <linux/err.h>
+#include <linux/platform_device.h>
+#include <linux/platform_data/itco_wdt.h>
+#include <linux/pm_runtime.h>
+#include <linux/string.h>
+
+#if IS_ENABLED(CONFIG_I2C_MUX_GPIO) && defined CONFIG_DMI
+#include <linux/gpio/machine.h>
+#include <linux/platform_data/i2c-mux-gpio.h>
+#endif
+
+#define mem_clear(data, size) memset((data), 0, (size))
+
+/* I801 SMBus address offsets */
+#define SMBHSTSTS(p)	(0 + (p)->smba)
+#define SMBHSTCNT(p)	(2 + (p)->smba)
+#define SMBHSTCMD(p)	(3 + (p)->smba)
+#define SMBHSTADD(p)	(4 + (p)->smba)
+#define SMBHSTDAT0(p)	(5 + (p)->smba)
+#define SMBHSTDAT1(p)	(6 + (p)->smba)
+#define SMBBLKDAT(p)	(7 + (p)->smba)
+#define SMBPEC(p)	(8 + (p)->smba)		/* ICH3 and later */
+#define SMBAUXSTS(p)	(12 + (p)->smba)	/* ICH4 and later */
+#define SMBAUXCTL(p)	(13 + (p)->smba)	/* ICH4 and later */
+#define SMBSLVSTS(p)	(16 + (p)->smba)	/* ICH3 and later */
+#define SMBSLVCMD(p)	(17 + (p)->smba)	/* ICH3 and later */
+#define SMBNTFDADD(p)	(20 + (p)->smba)	/* ICH3 and later */
+#define SMBPINCTL(p)	(15 + (p)->smba)	/* SMBus Pin Control Register */
+
+/* PCI Address Constants */
+#define SMBBAR		4
+#define SMBPCICTL	0x004
+#define SMBPCISTS	0x006
+#define SMBHSTCFG	0x040
+#define TCOBASE		0x050
+#define TCOCTL		0x054
+
+#define SBREG_BAR		0x10
+#define SBREG_SMBCTRL		0xc6000c
+#define SBREG_SMBCTRL_DNV	0xcf000c
+
+/* Host status bits for SMBPCISTS */
+#define SMBPCISTS_INTS		BIT(3)
+
+/* Control bits for SMBPCICTL */
+#define SMBPCICTL_INTDIS	BIT(10)
+
+/* Host configuration bits for SMBHSTCFG */
+#define SMBHSTCFG_HST_EN	BIT(0)
+#define SMBHSTCFG_SMB_SMI_EN	BIT(1)
+#define SMBHSTCFG_I2C_EN	BIT(2)
+#define SMBHSTCFG_SSRESET	BIT(3)
+#define SSRESET_SLEEP_TIME  1   /* 1us */
+#define SSRESET_RETRY_TIME  (1000 / SSRESET_SLEEP_TIME)
+
+/* Pin status for SMBPINCTL */
+#define SMBPINCTL_CLK_STS	1       /* bit0 SMBCLK_CUR_STS*/
+#define SMBPINCTL_SDA_STS	2       /* bit1 SMBDATA_CUR_STS*/
+#define SMBPINCTL_CLK_CTL	4       /* bit2 SMBCLK_CTL */
+
+#define SMBHSTCFG_SPD_WD	BIT(4)
+
+/* TCO configuration bits for TCOCTL */
+#define TCOCTL_EN		BIT(8)
+
+/* Auxiliary status register bits, ICH4+ only */
+#define SMBAUXSTS_CRCE		BIT(0)
+#define SMBAUXSTS_STCO		BIT(1)
+
+/* Auxiliary control register bits, ICH4+ only */
+#define SMBAUXCTL_CRC		BIT(0)
+#define SMBAUXCTL_E32B		BIT(1)
+
+/* Other settings */
+#define MAX_RETRIES		400
+
+/* I801 command constants */
+#define I801_QUICK		0x00
+#define I801_BYTE		0x04
+#define I801_BYTE_DATA		0x08
+#define I801_WORD_DATA		0x0C
+#define I801_PROC_CALL		0x10	/* unimplemented */
+#define I801_BLOCK_DATA		0x14
+#define I801_I2C_BLOCK_DATA	0x18	/* ICH5 and later */
+#define I801_BLOCK_PROC_CALL	0x1C
+
+/* I801 Host Control register bits */
+#define SMBHSTCNT_INTREN	BIT(0)
+#define SMBHSTCNT_KILL		BIT(1)
+#define SMBHSTCNT_LAST_BYTE	BIT(5)
+#define SMBHSTCNT_START		BIT(6)
+#define SMBHSTCNT_PEC_EN	BIT(7)	/* ICH3 and later */
+
+/* I801 Hosts Status register bits */
+#define SMBHSTSTS_BYTE_DONE	BIT(7)
+#define SMBHSTSTS_INUSE_STS	BIT(6)
+#define SMBHSTSTS_SMBALERT_STS	BIT(5)
+#define SMBHSTSTS_FAILED	BIT(4)
+#define SMBHSTSTS_BUS_ERR	BIT(3)
+#define SMBHSTSTS_DEV_ERR	BIT(2)
+#define SMBHSTSTS_INTR		BIT(1)
+#define SMBHSTSTS_HOST_BUSY	BIT(0)
+
+/* Host Notify Status register bits */
+#define SMBSLVSTS_HST_NTFY_STS	BIT(0)
+
+/* Host Notify Command register bits */
+#define SMBSLVCMD_HST_NTFY_INTREN	BIT(0)
+
+#define STATUS_ERROR_FLAGS	(SMBHSTSTS_FAILED | SMBHSTSTS_BUS_ERR | \
+				 SMBHSTSTS_DEV_ERR)
+
+#define STATUS_FLAGS		(SMBHSTSTS_BYTE_DONE | SMBHSTSTS_INTR | \
+				 STATUS_ERROR_FLAGS)
+
+/* Older devices have their ID defined in <linux/pci_ids.h> */
+#define PCI_DEVICE_ID_INTEL_COMETLAKE_SMBUS		0x02a3
+#define PCI_DEVICE_ID_INTEL_COMETLAKE_H_SMBUS		0x06a3
+#define PCI_DEVICE_ID_INTEL_BAYTRAIL_SMBUS		0x0f12
+#define PCI_DEVICE_ID_INTEL_CDF_SMBUS			0x18df
+#define PCI_DEVICE_ID_INTEL_DNV_SMBUS			0x19df
+#define PCI_DEVICE_ID_INTEL_EBG_SMBUS			0x1bc9
+#define PCI_DEVICE_ID_INTEL_COUGARPOINT_SMBUS		0x1c22
+#define PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS		0x1d22
+/* Patsburg also has three 'Integrated Device Function' SMBus controllers */
+#define PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF0		0x1d70
+#define PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF1		0x1d71
+#define PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF2		0x1d72
+#define PCI_DEVICE_ID_INTEL_PANTHERPOINT_SMBUS		0x1e22
+#define PCI_DEVICE_ID_INTEL_AVOTON_SMBUS		0x1f3c
+#define PCI_DEVICE_ID_INTEL_BRASWELL_SMBUS		0x2292
+#define PCI_DEVICE_ID_INTEL_DH89XXCC_SMBUS		0x2330
+#define PCI_DEVICE_ID_INTEL_COLETOCREEK_SMBUS		0x23b0
+#define PCI_DEVICE_ID_INTEL_GEMINILAKE_SMBUS		0x31d4
+#define PCI_DEVICE_ID_INTEL_ICELAKE_LP_SMBUS		0x34a3
+#define PCI_DEVICE_ID_INTEL_5_3400_SERIES_SMBUS		0x3b30
+#define PCI_DEVICE_ID_INTEL_TIGERLAKE_H_SMBUS		0x43a3
+#define PCI_DEVICE_ID_INTEL_ELKHART_LAKE_SMBUS		0x4b23
+#define PCI_DEVICE_ID_INTEL_JASPER_LAKE_SMBUS		0x4da3
+#define PCI_DEVICE_ID_INTEL_BROXTON_SMBUS		0x5ad4
+#define PCI_DEVICE_ID_INTEL_ALDER_LAKE_S_SMBUS		0x7aa3
+#define PCI_DEVICE_ID_INTEL_LYNXPOINT_SMBUS		0x8c22
+#define PCI_DEVICE_ID_INTEL_WILDCATPOINT_SMBUS		0x8ca2
+#define PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS		0x8d22
+#define PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS0		0x8d7d
+#define PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS1		0x8d7e
+#define PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS2		0x8d7f
+#define PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_SMBUS		0x9c22
+#define PCI_DEVICE_ID_INTEL_WILDCATPOINT_LP_SMBUS	0x9ca2
+#define PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_SMBUS	0x9d23
+#define PCI_DEVICE_ID_INTEL_CANNONLAKE_LP_SMBUS		0x9da3
+#define PCI_DEVICE_ID_INTEL_TIGERLAKE_LP_SMBUS		0xa0a3
+#define PCI_DEVICE_ID_INTEL_SUNRISEPOINT_H_SMBUS	0xa123
+#define PCI_DEVICE_ID_INTEL_LEWISBURG_SMBUS		0xa1a3
+#define PCI_DEVICE_ID_INTEL_LEWISBURG_SSKU_SMBUS	0xa223
+#define PCI_DEVICE_ID_INTEL_KABYLAKE_PCH_H_SMBUS	0xa2a3
+#define PCI_DEVICE_ID_INTEL_CANNONLAKE_H_SMBUS		0xa323
+#define PCI_DEVICE_ID_INTEL_COMETLAKE_V_SMBUS		0xa3a3
+
+struct i801_mux_config {
+	char *gpio_chip;
+	unsigned values[3];
+	int n_values;
+	unsigned classes[3];
+	unsigned gpios[2];		/* Relative to gpio_chip->base */
+	int n_gpios;
+};
+
+struct i801_priv {
+	struct i2c_adapter adapter;
+	unsigned long smba;
+	unsigned char original_hstcfg;
+	unsigned char original_slvcmd;
+	struct pci_dev *pci_dev;
+	unsigned int features;
+
+	/* isr processing */
+	wait_queue_head_t waitq;
+	u8 status;
+
+	/* Command state used by isr for byte-by-byte block transactions */
+	u8 cmd;
+	bool is_read;
+	int count;
+	int len;
+	u8 *data;
+
+#if IS_ENABLED(CONFIG_I2C_MUX_GPIO) && defined CONFIG_DMI
+	const struct i801_mux_config *mux_drvdata;
+	struct platform_device *mux_pdev;
+	struct gpiod_lookup_table *lookup;
+#endif
+	struct platform_device *tco_pdev;
+
+	/*
+	 * If set to true the host controller registers are reserved for
+	 * ACPI AML use. Protected by acpi_lock.
+	 */
+	bool acpi_reserved;
+	struct mutex acpi_lock;
+};
+
+#define FEATURE_SMBUS_PEC	BIT(0)
+#define FEATURE_BLOCK_BUFFER	BIT(1)
+#define FEATURE_BLOCK_PROC	BIT(2)
+#define FEATURE_I2C_BLOCK_READ	BIT(3)
+#define FEATURE_IRQ		BIT(4)
+#define FEATURE_HOST_NOTIFY	BIT(5)
+/* Not really a feature, but it's convenient to handle it as such */
+#define FEATURE_IDF		BIT(15)
+#define FEATURE_TCO_SPT		BIT(16)
+#define FEATURE_TCO_CNL		BIT(17)
+
+static const char *i801_feature_names[] = {
+	"SMBus PEC",
+	"Block buffer",
+	"Block process call",
+	"I2C block read",
+	"Interrupt",
+	"SMBus Host Notify",
+};
+
+static unsigned int disable_features;
+module_param(disable_features, uint, S_IRUGO | S_IWUSR);
+MODULE_PARM_DESC(disable_features, "Disable selected driver features:\n"
+	"\t\t  0x01  disable SMBus PEC\n"
+	"\t\t  0x02  disable the block buffer\n"
+	"\t\t  0x08  disable the I2C block read functionality\n"
+	"\t\t  0x10  don't use interrupts\n"
+	"\t\t  0x20  disable SMBus Host Notify ");
+
+static void i801_setscl(struct i801_priv *priv, unsigned int level)
+{
+    int pin_status;
+    pin_status = inb_p(SMBPINCTL(priv));
+    if (level == 0) {
+        pin_status &= (~SMBPINCTL_CLK_CTL);
+    }
+    else {
+        pin_status |= SMBPINCTL_CLK_CTL;
+    }
+    outb_p(pin_status, SMBPINCTL(priv));
+	return;
+}
+
+static void i801_i2c_unblock(struct i801_priv *priv)
+{
+    int i;
+    for (i = 0; i < 10; i++) {
+        i801_setscl(priv, 0);
+        udelay(5);
+        i801_setscl(priv, 1);
+        udelay(5);
+    }
+	return;
+}
+
+static int i801_check_i2c_unblock(struct i801_priv *priv)
+{
+	int pin_status;
+
+	pin_status = inb_p(SMBPINCTL(priv));
+    if ( (!(pin_status & SMBPINCTL_SDA_STS) ) && (pin_status & SMBPINCTL_CLK_STS) ) {
+        dev_dbg(&priv->pci_dev->dev, "SDA is low, send 9 clock to device!\n");
+        i801_i2c_unblock(priv);
+    }
+    return 0;
+}
+
+static void i801_do_reset(struct i801_priv *priv)
+{
+    unsigned char tmp;
+    unsigned int retry_count = 0;
+
+    pci_read_config_byte(priv->pci_dev, SMBHSTCFG, &tmp);
+    tmp |= SMBHSTCFG_SSRESET;
+    pci_write_config_byte(priv->pci_dev, SMBHSTCFG, tmp);
+    pci_read_config_byte(priv->pci_dev, SMBHSTCFG, &tmp);
+
+    while( ((tmp & SMBHSTCFG_SSRESET) != 0) && (retry_count < SSRESET_RETRY_TIME)) {
+        usleep_range(SSRESET_SLEEP_TIME, SSRESET_SLEEP_TIME + 1);
+        retry_count++;
+        pci_read_config_byte(priv->pci_dev, SMBHSTCFG, &tmp);
+    }
+
+    return ;
+}
+
+static int i801_check_i2c_scl(struct i801_priv *priv)
+{
+	int pin_status;
+
+	pin_status = inb_p(SMBPINCTL(priv));
+    if ( (pin_status & SMBPINCTL_SDA_STS) && (pin_status & SMBPINCTL_CLK_STS) ) {
+        return 0;
+    }
+
+    dev_dbg(&priv->pci_dev->dev, "SDA or SCL is low, begin to reset SMBus adapter, pin_status: 0x%x\n",pin_status);
+    i801_do_reset(priv);
+    pin_status = inb_p(SMBPINCTL(priv));
+    if ( (pin_status & SMBPINCTL_SDA_STS) && (pin_status & SMBPINCTL_CLK_STS) ) {
+        return 0;
+    }
+    dev_warn(&priv->pci_dev->dev, "SDA or SCL is low.pin_status:0x%x\n",pin_status);
+    return -1;
+}
+
+/* Make sure the SMBus host is ready to start transmitting.
+   Return 0 if it is, -EBUSY if it is not. */
+static int i801_check_pre(struct i801_priv *priv)
+{
+	int status;
+
+	i801_check_i2c_unblock(priv);
+
+	if (i801_check_i2c_scl(priv)) {
+		return -EIO;
+	}
+
+	status = inb_p(SMBHSTSTS(priv));
+	if (status & SMBHSTSTS_HOST_BUSY) {
+		dev_dbg(&priv->pci_dev->dev, "SMBus is busy, begin to reset SMBus adapter!\n");
+
+		i801_do_reset(priv);
+
+		status = inb_p(SMBHSTSTS(priv));
+		if (status & SMBHSTSTS_HOST_BUSY) {
+			dev_err(&priv->pci_dev->dev, "SMBus is busy, can't use it!\n");
+			return -EBUSY;
+		}
+	}
+
+	status &= STATUS_FLAGS;
+	if (status) {
+		dev_dbg(&priv->pci_dev->dev, "Clearing status flags (%02x)\n",
+			status);
+		outb_p(status, SMBHSTSTS(priv));
+		status = inb_p(SMBHSTSTS(priv)) & STATUS_FLAGS;
+		if (status) {
+			dev_err(&priv->pci_dev->dev,
+				"Failed clearing status flags (%02x)\n",
+				status);
+			return -EBUSY;
+		}
+	}
+
+	/*
+	 * Clear CRC status if needed.
+	 * During normal operation, i801_check_post() takes care
+	 * of it after every operation.  We do it here only in case
+	 * the hardware was already in this state when the driver
+	 * started.
+	 */
+	if (priv->features & FEATURE_SMBUS_PEC) {
+		status = inb_p(SMBAUXSTS(priv)) & SMBAUXSTS_CRCE;
+		if (status) {
+			dev_dbg(&priv->pci_dev->dev,
+				"Clearing aux status flags (%02x)\n", status);
+			outb_p(status, SMBAUXSTS(priv));
+			status = inb_p(SMBAUXSTS(priv)) & SMBAUXSTS_CRCE;
+			if (status) {
+				dev_err(&priv->pci_dev->dev,
+					"Failed clearing aux status flags (%02x)\n",
+					status);
+				return -EBUSY;
+			}
+		}
+	}
+
+	return 0;
+}
+
+/*
+ * Convert the status register to an error code, and clear it.
+ * Note that status only contains the bits we want to clear, not the
+ * actual register value.
+ */
+static int i801_check_post(struct i801_priv *priv, int status)
+{
+	int result = 0;
+
+	/*
+	 * If the SMBus is still busy, we give up
+	 * Note: This timeout condition only happens when using polling
+	 * transactions.  For interrupt operation, NAK/timeout is indicated by
+	 * DEV_ERR.
+	 */
+	if (unlikely(status < 0)) {
+		dev_err(&priv->pci_dev->dev, "Transaction timeout\n");
+		/* try to stop the current command */
+		dev_dbg(&priv->pci_dev->dev, "Terminating the current operation\n");
+		outb_p(SMBHSTCNT_KILL, SMBHSTCNT(priv));
+		usleep_range(1000, 2000);
+		outb_p(0, SMBHSTCNT(priv));
+
+		/* Check if it worked */
+		status = inb_p(SMBHSTSTS(priv));
+		if ((status & SMBHSTSTS_HOST_BUSY) ||
+		    !(status & SMBHSTSTS_FAILED))
+			dev_err(&priv->pci_dev->dev,
+				"Failed terminating the transaction\n");
+		outb_p(STATUS_FLAGS, SMBHSTSTS(priv));
+		return -ETIMEDOUT;
+	}
+
+	if (status & SMBHSTSTS_FAILED) {
+		result = -EIO;
+		dev_err(&priv->pci_dev->dev, "Transaction failed\n");
+	}
+	if (status & SMBHSTSTS_DEV_ERR) {
+		/*
+		 * This may be a PEC error, check and clear it.
+		 *
+		 * AUXSTS is handled differently from HSTSTS.
+		 * For HSTSTS, i801_isr() or i801_wait_intr()
+		 * has already cleared the error bits in hardware,
+		 * and we are passed a copy of the original value
+		 * in "status".
+		 * For AUXSTS, the hardware register is left
+		 * for us to handle here.
+		 * This is asymmetric, slightly iffy, but safe,
+		 * since all this code is serialized and the CRCE
+		 * bit is harmless as long as it's cleared before
+		 * the next operation.
+		 */
+		if ((priv->features & FEATURE_SMBUS_PEC) &&
+		    (inb_p(SMBAUXSTS(priv)) & SMBAUXSTS_CRCE)) {
+			outb_p(SMBAUXSTS_CRCE, SMBAUXSTS(priv));
+			result = -EBADMSG;
+			dev_dbg(&priv->pci_dev->dev, "PEC error\n");
+		} else {
+			result = -ENXIO;
+			dev_dbg(&priv->pci_dev->dev, "No response\n");
+		}
+	}
+	if (status & SMBHSTSTS_BUS_ERR) {
+		result = -EAGAIN;
+		dev_dbg(&priv->pci_dev->dev, "Lost arbitration\n");
+	}
+
+	/* Clear status flags except BYTE_DONE, to be cleared by caller */
+	outb_p(status, SMBHSTSTS(priv));
+
+	return result;
+}
+
+/* Wait for BUSY being cleared and either INTR or an error flag being set */
+static int i801_wait_intr(struct i801_priv *priv)
+{
+	int timeout = 0;
+	int status;
+
+	/* We will always wait for a fraction of a second! */
+	do {
+		usleep_range(250, 500);
+		status = inb_p(SMBHSTSTS(priv));
+	} while (((status & SMBHSTSTS_HOST_BUSY) ||
+		  !(status & (STATUS_ERROR_FLAGS | SMBHSTSTS_INTR))) &&
+		 (timeout++ < MAX_RETRIES));
+
+	if (timeout > MAX_RETRIES) {
+		dev_dbg(&priv->pci_dev->dev, "INTR Timeout!\n");
+		return -ETIMEDOUT;
+	}
+	return status & (STATUS_ERROR_FLAGS | SMBHSTSTS_INTR);
+}
+
+/* Wait for either BYTE_DONE or an error flag being set */
+static int i801_wait_byte_done(struct i801_priv *priv)
+{
+	int timeout = 0;
+	int status;
+
+	/* We will always wait for a fraction of a second! */
+	do {
+		usleep_range(250, 500);
+		status = inb_p(SMBHSTSTS(priv));
+	} while (!(status & (STATUS_ERROR_FLAGS | SMBHSTSTS_BYTE_DONE)) &&
+		 (timeout++ < MAX_RETRIES));
+
+	if (timeout > MAX_RETRIES) {
+		dev_dbg(&priv->pci_dev->dev, "BYTE_DONE Timeout!\n");
+		return -ETIMEDOUT;
+	}
+	return status & STATUS_ERROR_FLAGS;
+}
+
+static int i801_transaction(struct i801_priv *priv, int xact)
+{
+	int status;
+	int result;
+	const struct i2c_adapter *adap = &priv->adapter;
+
+	result = i801_check_pre(priv);
+	if (result < 0)
+		return result;
+
+	if (priv->features & FEATURE_IRQ) {
+		outb_p(xact | SMBHSTCNT_INTREN | SMBHSTCNT_START,
+		       SMBHSTCNT(priv));
+		result = wait_event_timeout(priv->waitq,
+					    (status = priv->status),
+					    adap->timeout);
+		if (!result) {
+			status = -ETIMEDOUT;
+			dev_warn(&priv->pci_dev->dev,
+				 "Timeout waiting for interrupt!\n");
+		}
+		priv->status = 0;
+		return i801_check_post(priv, status);
+	}
+
+	/* the current contents of SMBHSTCNT can be overwritten, since PEC,
+	 * SMBSCMD are passed in xact */
+	outb_p(xact | SMBHSTCNT_START, SMBHSTCNT(priv));
+
+	status = i801_wait_intr(priv);
+	return i801_check_post(priv, status);
+}
+
+static int i801_block_transaction_by_block(struct i801_priv *priv,
+					   union i2c_smbus_data *data,
+					   char read_write, int command,
+					   int hwpec)
+{
+	int i, len;
+	int status;
+	int xact = hwpec ? SMBHSTCNT_PEC_EN : 0;
+
+	switch (command) {
+	case I2C_SMBUS_BLOCK_PROC_CALL:
+		xact |= I801_BLOCK_PROC_CALL;
+		break;
+	case I2C_SMBUS_BLOCK_DATA:
+		xact |= I801_BLOCK_DATA;
+		break;
+	default:
+		return -EOPNOTSUPP;
+	}
+
+	inb_p(SMBHSTCNT(priv)); /* reset the data buffer index */
+
+	/* Use 32-byte buffer to process this transaction */
+	if (read_write == I2C_SMBUS_WRITE) {
+		len = data->block[0];
+		outb_p(len, SMBHSTDAT0(priv));
+		for (i = 0; i < len; i++)
+			outb_p(data->block[i+1], SMBBLKDAT(priv));
+	}
+
+	status = i801_transaction(priv, xact);
+	if (status)
+		return status;
+
+	if (read_write == I2C_SMBUS_READ ||
+	    command == I2C_SMBUS_BLOCK_PROC_CALL) {
+		len = inb_p(SMBHSTDAT0(priv));
+		if (len < 1 || len > I2C_SMBUS_BLOCK_MAX)
+			return -EPROTO;
+
+		data->block[0] = len;
+		for (i = 0; i < len; i++)
+			data->block[i + 1] = inb_p(SMBBLKDAT(priv));
+	}
+	return 0;
+}
+
+static void i801_isr_byte_done(struct i801_priv *priv)
+{
+	if (priv->is_read) {
+		/* For SMBus block reads, length is received with first byte */
+		if (((priv->cmd & 0x1c) == I801_BLOCK_DATA) &&
+		    (priv->count == 0)) {
+			priv->len = inb_p(SMBHSTDAT0(priv));
+			if (priv->len < 1 || priv->len > I2C_SMBUS_BLOCK_MAX) {
+				dev_err(&priv->pci_dev->dev,
+					"Illegal SMBus block read size %d\n",
+					priv->len);
+				/* FIXME: Recover */
+				priv->len = I2C_SMBUS_BLOCK_MAX;
+			} else {
+				dev_dbg(&priv->pci_dev->dev,
+					"SMBus block read size is %d\n",
+					priv->len);
+			}
+			priv->data[-1] = priv->len;
+		}
+
+		/* Read next byte */
+		if (priv->count < priv->len)
+			priv->data[priv->count++] = inb(SMBBLKDAT(priv));
+		else
+			dev_dbg(&priv->pci_dev->dev,
+				"Discarding extra byte on block read\n");
+
+		/* Set LAST_BYTE for last byte of read transaction */
+		if (priv->count == priv->len - 1)
+			outb_p(priv->cmd | SMBHSTCNT_LAST_BYTE,
+			       SMBHSTCNT(priv));
+	} else if (priv->count < priv->len - 1) {
+		/* Write next byte, except for IRQ after last byte */
+		outb_p(priv->data[++priv->count], SMBBLKDAT(priv));
+	}
+
+	/* Clear BYTE_DONE to continue with next byte */
+	outb_p(SMBHSTSTS_BYTE_DONE, SMBHSTSTS(priv));
+}
+
+static irqreturn_t i801_host_notify_isr(struct i801_priv *priv)
+{
+	unsigned short addr;
+
+	addr = inb_p(SMBNTFDADD(priv)) >> 1;
+
+	/*
+	 * With the tested platforms, reading SMBNTFDDAT (22 + (p)->smba)
+	 * always returns 0. Our current implementation doesn't provide
+	 * data, so we just ignore it.
+	 */
+	i2c_handle_smbus_host_notify(&priv->adapter, addr);
+
+	/* clear Host Notify bit and return */
+	outb_p(SMBSLVSTS_HST_NTFY_STS, SMBSLVSTS(priv));
+	return IRQ_HANDLED;
+}
+
+/*
+ * There are three kinds of interrupts:
+ *
+ * 1) i801 signals transaction completion with one of these interrupts:
+ *      INTR - Success
+ *      DEV_ERR - Invalid command, NAK or communication timeout
+ *      BUS_ERR - SMI# transaction collision
+ *      FAILED - transaction was canceled due to a KILL request
+ *    When any of these occur, update ->status and wake up the waitq.
+ *    ->status must be cleared before kicking off the next transaction.
+ *
+ * 2) For byte-by-byte (I2C read/write) transactions, one BYTE_DONE interrupt
+ *    occurs for each byte of a byte-by-byte to prepare the next byte.
+ *
+ * 3) Host Notify interrupts
+ */
+static irqreturn_t i801_isr(int irq, void *dev_id)
+{
+	struct i801_priv *priv = dev_id;
+	u16 pcists;
+	u8 status;
+
+	/* Confirm this is our interrupt */
+	pci_read_config_word(priv->pci_dev, SMBPCISTS, &pcists);
+	if (!(pcists & SMBPCISTS_INTS))
+		return IRQ_NONE;
+
+	if (priv->features & FEATURE_HOST_NOTIFY) {
+		status = inb_p(SMBSLVSTS(priv));
+		if (status & SMBSLVSTS_HST_NTFY_STS)
+			return i801_host_notify_isr(priv);
+	}
+
+	status = inb_p(SMBHSTSTS(priv));
+	if (status & SMBHSTSTS_BYTE_DONE)
+		i801_isr_byte_done(priv);
+
+	/*
+	 * Clear irq sources and report transaction result.
+	 * ->status must be cleared before the next transaction is started.
+	 */
+	status &= SMBHSTSTS_INTR | STATUS_ERROR_FLAGS;
+	if (status) {
+		outb_p(status, SMBHSTSTS(priv));
+		priv->status = status;
+		wake_up(&priv->waitq);
+	}
+
+	return IRQ_HANDLED;
+}
+
+/*
+ * For "byte-by-byte" block transactions:
+ *   I2C write uses cmd=I801_BLOCK_DATA, I2C_EN=1
+ *   I2C read uses cmd=I801_I2C_BLOCK_DATA
+ */
+static int i801_block_transaction_byte_by_byte(struct i801_priv *priv,
+					       union i2c_smbus_data *data,
+					       char read_write, int command,
+					       int hwpec)
+{
+	int i, len;
+	int smbcmd;
+	int status;
+	int result;
+	const struct i2c_adapter *adap = &priv->adapter;
+
+	if (command == I2C_SMBUS_BLOCK_PROC_CALL)
+		return -EOPNOTSUPP;
+
+	result = i801_check_pre(priv);
+	if (result < 0)
+		return result;
+
+	len = data->block[0];
+
+	if (read_write == I2C_SMBUS_WRITE) {
+		outb_p(len, SMBHSTDAT0(priv));
+		outb_p(data->block[1], SMBBLKDAT(priv));
+	}
+
+	if (command == I2C_SMBUS_I2C_BLOCK_DATA &&
+	    read_write == I2C_SMBUS_READ)
+		smbcmd = I801_I2C_BLOCK_DATA;
+	else
+		smbcmd = I801_BLOCK_DATA;
+
+	if (priv->features & FEATURE_IRQ) {
+		priv->is_read = (read_write == I2C_SMBUS_READ);
+		if (len == 1 && priv->is_read)
+			smbcmd |= SMBHSTCNT_LAST_BYTE;
+		priv->cmd = smbcmd | SMBHSTCNT_INTREN;
+		priv->len = len;
+		priv->count = 0;
+		priv->data = &data->block[1];
+
+		outb_p(priv->cmd | SMBHSTCNT_START, SMBHSTCNT(priv));
+		result = wait_event_timeout(priv->waitq,
+					    (status = priv->status),
+					    adap->timeout);
+		if (!result) {
+			status = -ETIMEDOUT;
+			dev_warn(&priv->pci_dev->dev,
+				 "Timeout waiting for interrupt!\n");
+		}
+		priv->status = 0;
+		return i801_check_post(priv, status);
+	}
+
+	for (i = 1; i <= len; i++) {
+		if (i == len && read_write == I2C_SMBUS_READ)
+			smbcmd |= SMBHSTCNT_LAST_BYTE;
+		outb_p(smbcmd, SMBHSTCNT(priv));
+
+		if (i == 1)
+			outb_p(inb(SMBHSTCNT(priv)) | SMBHSTCNT_START,
+			       SMBHSTCNT(priv));
+
+		status = i801_wait_byte_done(priv);
+		if (status)
+			goto exit;
+
+		if (i == 1 && read_write == I2C_SMBUS_READ
+		 && command != I2C_SMBUS_I2C_BLOCK_DATA) {
+			len = inb_p(SMBHSTDAT0(priv));
+			if (len < 1 || len > I2C_SMBUS_BLOCK_MAX) {
+				dev_err(&priv->pci_dev->dev,
+					"Illegal SMBus block read size %d\n",
+					len);
+				/* Recover */
+				while (inb_p(SMBHSTSTS(priv)) &
+				       SMBHSTSTS_HOST_BUSY)
+					outb_p(SMBHSTSTS_BYTE_DONE,
+					       SMBHSTSTS(priv));
+				outb_p(SMBHSTSTS_INTR, SMBHSTSTS(priv));
+				return -EPROTO;
+			}
+			data->block[0] = len;
+		}
+
+		/* Retrieve/store value in SMBBLKDAT */
+		if (read_write == I2C_SMBUS_READ)
+			data->block[i] = inb_p(SMBBLKDAT(priv));
+		if (read_write == I2C_SMBUS_WRITE && i+1 <= len)
+			outb_p(data->block[i+1], SMBBLKDAT(priv));
+
+		/* signals SMBBLKDAT ready */
+		outb_p(SMBHSTSTS_BYTE_DONE, SMBHSTSTS(priv));
+	}
+
+	status = i801_wait_intr(priv);
+exit:
+	return i801_check_post(priv, status);
+}
+
+static int i801_set_block_buffer_mode(struct i801_priv *priv)
+{
+	outb_p(inb_p(SMBAUXCTL(priv)) | SMBAUXCTL_E32B, SMBAUXCTL(priv));
+	if ((inb_p(SMBAUXCTL(priv)) & SMBAUXCTL_E32B) == 0)
+		return -EIO;
+	return 0;
+}
+
+/* Block transaction function */
+static int i801_block_transaction(struct i801_priv *priv,
+				  union i2c_smbus_data *data, char read_write,
+				  int command, int hwpec)
+{
+	int result = 0;
+	unsigned char hostc;
+
+	if (command == I2C_SMBUS_I2C_BLOCK_DATA) {
+		if (read_write == I2C_SMBUS_WRITE) {
+			/* set I2C_EN bit in configuration register */
+			pci_read_config_byte(priv->pci_dev, SMBHSTCFG, &hostc);
+			pci_write_config_byte(priv->pci_dev, SMBHSTCFG,
+					      hostc | SMBHSTCFG_I2C_EN);
+		} else if (!(priv->features & FEATURE_I2C_BLOCK_READ)) {
+			dev_err(&priv->pci_dev->dev,
+				"I2C block read is unsupported!\n");
+			return -EOPNOTSUPP;
+		}
+	}
+
+	if (read_write == I2C_SMBUS_WRITE
+	 || command == I2C_SMBUS_I2C_BLOCK_DATA) {
+		if (data->block[0] < 1)
+			data->block[0] = 1;
+		if (data->block[0] > I2C_SMBUS_BLOCK_MAX)
+			data->block[0] = I2C_SMBUS_BLOCK_MAX;
+	} else {
+		data->block[0] = 32;	/* max for SMBus block reads */
+	}
+
+	/* Experience has shown that the block buffer can only be used for
+	   SMBus (not I2C) block transactions, even though the datasheet
+	   doesn't mention this limitation. */
+	if ((priv->features & FEATURE_BLOCK_BUFFER)
+	 && command != I2C_SMBUS_I2C_BLOCK_DATA
+	 && i801_set_block_buffer_mode(priv) == 0)
+		result = i801_block_transaction_by_block(priv, data,
+							 read_write,
+							 command, hwpec);
+	else
+		result = i801_block_transaction_byte_by_byte(priv, data,
+							     read_write,
+							     command, hwpec);
+
+	if (command == I2C_SMBUS_I2C_BLOCK_DATA
+	 && read_write == I2C_SMBUS_WRITE) {
+		/* restore saved configuration register value */
+		pci_write_config_byte(priv->pci_dev, SMBHSTCFG, hostc);
+	}
+	return result;
+}
+
+/* Return negative errno on error. */
+static s32 i801_access(struct i2c_adapter *adap, u16 addr,
+		       unsigned short flags, char read_write, u8 command,
+		       int size, union i2c_smbus_data *data)
+{
+	int hwpec;
+	int block = 0;
+	int ret = 0, xact = 0;
+	struct i801_priv *priv = i2c_get_adapdata(adap);
+
+	mutex_lock(&priv->acpi_lock);
+	if (priv->acpi_reserved) {
+		mutex_unlock(&priv->acpi_lock);
+		return -EBUSY;
+	}
+
+	pm_runtime_get_sync(&priv->pci_dev->dev);
+
+	hwpec = (priv->features & FEATURE_SMBUS_PEC) && (flags & I2C_CLIENT_PEC)
+		&& size != I2C_SMBUS_QUICK
+		&& size != I2C_SMBUS_I2C_BLOCK_DATA;
+
+	switch (size) {
+	case I2C_SMBUS_QUICK:
+		outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
+		       SMBHSTADD(priv));
+		xact = I801_QUICK;
+		break;
+	case I2C_SMBUS_BYTE:
+		outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
+		       SMBHSTADD(priv));
+		if (read_write == I2C_SMBUS_WRITE)
+			outb_p(command, SMBHSTCMD(priv));
+		xact = I801_BYTE;
+		break;
+	case I2C_SMBUS_BYTE_DATA:
+		outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
+		       SMBHSTADD(priv));
+		outb_p(command, SMBHSTCMD(priv));
+		if (read_write == I2C_SMBUS_WRITE)
+			outb_p(data->byte, SMBHSTDAT0(priv));
+		xact = I801_BYTE_DATA;
+		break;
+	case I2C_SMBUS_WORD_DATA:
+		outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
+		       SMBHSTADD(priv));
+		outb_p(command, SMBHSTCMD(priv));
+		if (read_write == I2C_SMBUS_WRITE) {
+			outb_p(data->word & 0xff, SMBHSTDAT0(priv));
+			outb_p((data->word & 0xff00) >> 8, SMBHSTDAT1(priv));
+		}
+		xact = I801_WORD_DATA;
+		break;
+	case I2C_SMBUS_BLOCK_DATA:
+		outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
+		       SMBHSTADD(priv));
+		outb_p(command, SMBHSTCMD(priv));
+		block = 1;
+		break;
+	case I2C_SMBUS_I2C_BLOCK_DATA:
+		/*
+		 * NB: page 240 of ICH5 datasheet shows that the R/#W
+		 * bit should be cleared here, even when reading.
+		 * However if SPD Write Disable is set (Lynx Point and later),
+		 * the read will fail if we don't set the R/#W bit.
+		 */
+		outb_p(((addr & 0x7f) << 1) |
+		       ((priv->original_hstcfg & SMBHSTCFG_SPD_WD) ?
+			(read_write & 0x01) : 0),
+		       SMBHSTADD(priv));
+		if (read_write == I2C_SMBUS_READ) {
+			/* NB: page 240 of ICH5 datasheet also shows
+			 * that DATA1 is the cmd field when reading */
+			outb_p(command, SMBHSTDAT1(priv));
+		} else
+			outb_p(command, SMBHSTCMD(priv));
+		block = 1;
+		break;
+	case I2C_SMBUS_BLOCK_PROC_CALL:
+		/*
+		 * Bit 0 of the slave address register always indicate a write
+		 * command.
+		 */
+		outb_p((addr & 0x7f) << 1, SMBHSTADD(priv));
+		outb_p(command, SMBHSTCMD(priv));
+		block = 1;
+		break;
+	default:
+		dev_err(&priv->pci_dev->dev, "Unsupported transaction %d\n",
+			size);
+		ret = -EOPNOTSUPP;
+		goto out;
+	}
+
+	if (hwpec)	/* enable/disable hardware PEC */
+		outb_p(inb_p(SMBAUXCTL(priv)) | SMBAUXCTL_CRC, SMBAUXCTL(priv));
+	else
+		outb_p(inb_p(SMBAUXCTL(priv)) & (~SMBAUXCTL_CRC),
+		       SMBAUXCTL(priv));
+
+	if (block)
+		ret = i801_block_transaction(priv, data, read_write, size,
+					     hwpec);
+	else
+		ret = i801_transaction(priv, xact);
+
+	/* Some BIOSes don't like it when PEC is enabled at reboot or resume
+	   time, so we forcibly disable it after every transaction. Turn off
+	   E32B for the same reason. */
+	if (hwpec || block)
+		outb_p(inb_p(SMBAUXCTL(priv)) &
+		       ~(SMBAUXCTL_CRC | SMBAUXCTL_E32B), SMBAUXCTL(priv));
+
+	if (block)
+		goto out;
+	if (ret)
+		goto out;
+	if ((read_write == I2C_SMBUS_WRITE) || (xact == I801_QUICK))
+		goto out;
+
+	switch (xact & 0x7f) {
+	case I801_BYTE:	/* Result put in SMBHSTDAT0 */
+	case I801_BYTE_DATA:
+		data->byte = inb_p(SMBHSTDAT0(priv));
+		break;
+	case I801_WORD_DATA:
+		data->word = inb_p(SMBHSTDAT0(priv)) +
+			     (inb_p(SMBHSTDAT1(priv)) << 8);
+		break;
+	}
+
+out:
+	pm_runtime_mark_last_busy(&priv->pci_dev->dev);
+	pm_runtime_put_autosuspend(&priv->pci_dev->dev);
+	mutex_unlock(&priv->acpi_lock);
+	return ret;
+}
+
+static u32 i801_func(struct i2c_adapter *adapter)
+{
+	struct i801_priv *priv = i2c_get_adapdata(adapter);
+
+	return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
+	       I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
+	       I2C_FUNC_SMBUS_BLOCK_DATA | I2C_FUNC_SMBUS_WRITE_I2C_BLOCK |
+	       ((priv->features & FEATURE_SMBUS_PEC) ? I2C_FUNC_SMBUS_PEC : 0) |
+	       ((priv->features & FEATURE_BLOCK_PROC) ?
+		I2C_FUNC_SMBUS_BLOCK_PROC_CALL : 0) |
+	       ((priv->features & FEATURE_I2C_BLOCK_READ) ?
+		I2C_FUNC_SMBUS_READ_I2C_BLOCK : 0) |
+	       ((priv->features & FEATURE_HOST_NOTIFY) ?
+		I2C_FUNC_SMBUS_HOST_NOTIFY : 0);
+}
+
+static void i801_enable_host_notify(struct i2c_adapter *adapter)
+{
+	struct i801_priv *priv = i2c_get_adapdata(adapter);
+
+	if (!(priv->features & FEATURE_HOST_NOTIFY))
+		return;
+
+	if (!(SMBSLVCMD_HST_NTFY_INTREN & priv->original_slvcmd))
+		outb_p(SMBSLVCMD_HST_NTFY_INTREN | priv->original_slvcmd,
+		       SMBSLVCMD(priv));
+
+	/* clear Host Notify bit to allow a new notification */
+	outb_p(SMBSLVSTS_HST_NTFY_STS, SMBSLVSTS(priv));
+}
+
+static void i801_disable_host_notify(struct i801_priv *priv)
+{
+	if (!(priv->features & FEATURE_HOST_NOTIFY))
+		return;
+
+	outb_p(priv->original_slvcmd, SMBSLVCMD(priv));
+}
+
+static const struct i2c_algorithm smbus_algorithm = {
+	.smbus_xfer	= i801_access,
+	.functionality	= i801_func,
+};
+
+static const struct pci_device_id i801_ids[] = {
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801AA_3) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801AB_3) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801BA_2) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801CA_3) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801DB_3) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801EB_3) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB_4) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH6_16) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH7_17) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB2_17) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH8_5) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH9_6) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_EP80579_1) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH10_4) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH10_5) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_5_3400_SERIES_SMBUS) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_COUGARPOINT_SMBUS) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF0) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF1) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF2) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_DH89XXCC_SMBUS) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PANTHERPOINT_SMBUS) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_LYNXPOINT_SMBUS) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_SMBUS) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_AVOTON_SMBUS) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS0) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS1) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS2) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_COLETOCREEK_SMBUS) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_GEMINILAKE_SMBUS) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_WILDCATPOINT_SMBUS) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_WILDCATPOINT_LP_SMBUS) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BAYTRAIL_SMBUS) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BRASWELL_SMBUS) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_SUNRISEPOINT_H_SMBUS) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_SMBUS) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CDF_SMBUS) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_DNV_SMBUS) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_EBG_SMBUS) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BROXTON_SMBUS) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_LEWISBURG_SMBUS) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_LEWISBURG_SSKU_SMBUS) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_KABYLAKE_PCH_H_SMBUS) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CANNONLAKE_H_SMBUS) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CANNONLAKE_LP_SMBUS) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICELAKE_LP_SMBUS) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_COMETLAKE_SMBUS) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_COMETLAKE_H_SMBUS) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_COMETLAKE_V_SMBUS) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ELKHART_LAKE_SMBUS) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_TIGERLAKE_LP_SMBUS) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_TIGERLAKE_H_SMBUS) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_JASPER_LAKE_SMBUS) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ALDER_LAKE_S_SMBUS) },
+	{ 0, }
+};
+
+MODULE_DEVICE_TABLE(pci, i801_ids);
+
+#if defined CONFIG_X86 && defined CONFIG_DMI
+static unsigned char apanel_addr;
+
+/* Scan the system ROM for the signature "FJKEYINF" */
+static __init const void __iomem *bios_signature(const void __iomem *bios)
+{
+	ssize_t offset;
+	const unsigned char signature[] = "FJKEYINF";
+
+	for (offset = 0; offset < 0x10000; offset += 0x10) {
+		if (check_signature(bios + offset, signature,
+				    sizeof(signature)-1))
+			return bios + offset;
+	}
+	return NULL;
+}
+
+static void __init input_apanel_init(void)
+{
+	void __iomem *bios;
+	const void __iomem *p;
+
+	bios = ioremap(0xF0000, 0x10000); /* Can't fail */
+	p = bios_signature(bios);
+	if (p) {
+		/* just use the first address */
+		apanel_addr = readb(p + 8 + 3) >> 1;
+	}
+	iounmap(bios);
+}
+
+struct dmi_onboard_device_info {
+	const char *name;
+	u8 type;
+	unsigned short i2c_addr;
+	const char *i2c_type;
+};
+
+static const struct dmi_onboard_device_info dmi_devices[] = {
+	{ "Syleus", DMI_DEV_TYPE_OTHER, 0x73, "fscsyl" },
+	{ "Hermes", DMI_DEV_TYPE_OTHER, 0x73, "fscher" },
+	{ "Hades",  DMI_DEV_TYPE_OTHER, 0x73, "fschds" },
+};
+
+static void dmi_check_onboard_device(u8 type, const char *name,
+				     struct i2c_adapter *adap)
+{
+	int i;
+	struct i2c_board_info info;
+
+	for (i = 0; i < ARRAY_SIZE(dmi_devices); i++) {
+		/* & ~0x80, ignore enabled/disabled bit */
+		if ((type & ~0x80) != dmi_devices[i].type)
+			continue;
+		if (strcasecmp(name, dmi_devices[i].name))
+			continue;
+
+		mem_clear(&info, sizeof(struct i2c_board_info));
+		info.addr = dmi_devices[i].i2c_addr;
+		strlcpy(info.type, dmi_devices[i].i2c_type, I2C_NAME_SIZE);
+		i2c_new_client_device(adap, &info);
+		break;
+	}
+}
+
+/* We use our own function to check for onboard devices instead of
+   dmi_find_device() as some buggy BIOS's have the devices we are interested
+   in marked as disabled */
+static void dmi_check_onboard_devices(const struct dmi_header *dm, void *adap)
+{
+	int i, count;
+
+	if (dm->type != 10)
+		return;
+
+	count = (dm->length - sizeof(struct dmi_header)) / 2;
+	for (i = 0; i < count; i++) {
+		const u8 *d = (char *)(dm + 1) + (i * 2);
+		const char *name = ((char *) dm) + dm->length;
+		u8 type = d[0];
+		u8 s = d[1];
+
+		if (!s)
+			continue;
+		s--;
+		while (s > 0 && name[0]) {
+			name += strlen(name) + 1;
+			s--;
+		}
+		if (name[0] == 0) /* Bogus string reference */
+			continue;
+
+		dmi_check_onboard_device(type, name, adap);
+	}
+}
+
+/* NOTE: Keep this list in sync with drivers/platform/x86/dell-smo8800.c */
+static const char *const acpi_smo8800_ids[] = {
+	"SMO8800",
+	"SMO8801",
+	"SMO8810",
+	"SMO8811",
+	"SMO8820",
+	"SMO8821",
+	"SMO8830",
+	"SMO8831",
+};
+
+static acpi_status check_acpi_smo88xx_device(acpi_handle obj_handle,
+					     u32 nesting_level,
+					     void *context,
+					     void **return_value)
+{
+	struct acpi_device_info *info;
+	acpi_status status;
+	char *hid;
+	int i;
+
+	status = acpi_get_object_info(obj_handle, &info);
+	if (ACPI_FAILURE(status))
+		return AE_OK;
+
+	if (!(info->valid & ACPI_VALID_HID))
+		goto smo88xx_not_found;
+
+	hid = info->hardware_id.string;
+	if (!hid)
+		goto smo88xx_not_found;
+
+	i = match_string(acpi_smo8800_ids, ARRAY_SIZE(acpi_smo8800_ids), hid);
+	if (i < 0)
+		goto smo88xx_not_found;
+
+	kfree(info);
+
+	*((bool *)return_value) = true;
+	return AE_CTRL_TERMINATE;
+
+smo88xx_not_found:
+	kfree(info);
+	return AE_OK;
+}
+
+static bool is_dell_system_with_lis3lv02d(void)
+{
+	bool found;
+	const char *vendor;
+
+	vendor = dmi_get_system_info(DMI_SYS_VENDOR);
+	if (!vendor || strcmp(vendor, "Dell Inc."))
+		return false;
+
+	/*
+	 * Check that ACPI device SMO88xx is present and is functioning.
+	 * Function acpi_get_devices() already filters all ACPI devices
+	 * which are not present or are not functioning.
+	 * ACPI device SMO88xx represents our ST microelectronics lis3lv02d
+	 * accelerometer but unfortunately ACPI does not provide any other
+	 * information (like I2C address).
+	 */
+	found = false;
+	acpi_get_devices(NULL, check_acpi_smo88xx_device, NULL,
+			 (void **)&found);
+
+	return found;
+}
+
+/*
+ * Accelerometer's I2C address is not specified in DMI nor ACPI,
+ * so it is needed to define mapping table based on DMI product names.
+ */
+static const struct {
+	const char *dmi_product_name;
+	unsigned short i2c_addr;
+} dell_lis3lv02d_devices[] = {
+	/*
+	 * Dell platform team told us that these Latitude devices have
+	 * ST microelectronics accelerometer at I2C address 0x29.
+	 */
+	{ "Latitude E5250",     0x29 },
+	{ "Latitude E5450",     0x29 },
+	{ "Latitude E5550",     0x29 },
+	{ "Latitude E6440",     0x29 },
+	{ "Latitude E6440 ATG", 0x29 },
+	{ "Latitude E6540",     0x29 },
+	/*
+	 * Additional individual entries were added after verification.
+	 */
+	{ "Latitude 5480",      0x29 },
+	{ "Vostro V131",        0x1d },
+};
+
+static void register_dell_lis3lv02d_i2c_device(struct i801_priv *priv)
+{
+	struct i2c_board_info info;
+	const char *dmi_product_name;
+	int i;
+
+	dmi_product_name = dmi_get_system_info(DMI_PRODUCT_NAME);
+	for (i = 0; i < ARRAY_SIZE(dell_lis3lv02d_devices); ++i) {
+		if (strcmp(dmi_product_name,
+			   dell_lis3lv02d_devices[i].dmi_product_name) == 0)
+			break;
+	}
+
+	if (i == ARRAY_SIZE(dell_lis3lv02d_devices)) {
+		dev_warn(&priv->pci_dev->dev,
+			 "Accelerometer lis3lv02d is present on SMBus but its"
+			 " address is unknown, skipping registration\n");
+		return;
+	}
+
+	mem_clear(&info, sizeof(struct i2c_board_info));
+	info.addr = dell_lis3lv02d_devices[i].i2c_addr;
+	strlcpy(info.type, "lis3lv02d", I2C_NAME_SIZE);
+	i2c_new_client_device(&priv->adapter, &info);
+}
+
+/* Register optional slaves */
+static void i801_probe_optional_slaves(struct i801_priv *priv)
+{
+	/* Only register slaves on main SMBus channel */
+	if (priv->features & FEATURE_IDF)
+		return;
+
+	if (apanel_addr) {
+		struct i2c_board_info info;
+
+		mem_clear(&info, sizeof(struct i2c_board_info));
+		info.addr = apanel_addr;
+		strlcpy(info.type, "fujitsu_apanel", I2C_NAME_SIZE);
+		i2c_new_client_device(&priv->adapter, &info);
+	}
+
+	if (dmi_name_in_vendors("FUJITSU"))
+		dmi_walk(dmi_check_onboard_devices, &priv->adapter);
+
+	if (is_dell_system_with_lis3lv02d())
+		register_dell_lis3lv02d_i2c_device(priv);
+
+	/* Instantiate SPD EEPROMs unless the SMBus is multiplexed */
+#if IS_ENABLED(CONFIG_I2C_MUX_GPIO)
+	if (!priv->mux_drvdata)
+#endif
+		i2c_register_spd(&priv->adapter);
+}
+#else
+static void __init input_apanel_init(void) {}
+static void i801_probe_optional_slaves(struct i801_priv *priv) {}
+#endif	/* CONFIG_X86 && CONFIG_DMI */
+
+#if IS_ENABLED(CONFIG_I2C_MUX_GPIO) && defined CONFIG_DMI
+static struct i801_mux_config i801_mux_config_asus_z8_d12 = {
+	.gpio_chip = "gpio_ich",
+	.values = { 0x02, 0x03 },
+	.n_values = 2,
+	.classes = { I2C_CLASS_SPD, I2C_CLASS_SPD },
+	.gpios = { 52, 53 },
+	.n_gpios = 2,
+};
+
+static struct i801_mux_config i801_mux_config_asus_z8_d18 = {
+	.gpio_chip = "gpio_ich",
+	.values = { 0x02, 0x03, 0x01 },
+	.n_values = 3,
+	.classes = { I2C_CLASS_SPD, I2C_CLASS_SPD, I2C_CLASS_SPD },
+	.gpios = { 52, 53 },
+	.n_gpios = 2,
+};
+
+static const struct dmi_system_id mux_dmi_table[] = {
+	{
+		.matches = {
+			DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
+			DMI_MATCH(DMI_BOARD_NAME, "Z8NA-D6(C)"),
+		},
+		.driver_data = &i801_mux_config_asus_z8_d12,
+	},
+	{
+		.matches = {
+			DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
+			DMI_MATCH(DMI_BOARD_NAME, "Z8P(N)E-D12(X)"),
+		},
+		.driver_data = &i801_mux_config_asus_z8_d12,
+	},
+	{
+		.matches = {
+			DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
+			DMI_MATCH(DMI_BOARD_NAME, "Z8NH-D12"),
+		},
+		.driver_data = &i801_mux_config_asus_z8_d12,
+	},
+	{
+		.matches = {
+			DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
+			DMI_MATCH(DMI_BOARD_NAME, "Z8PH-D12/IFB"),
+		},
+		.driver_data = &i801_mux_config_asus_z8_d12,
+	},
+	{
+		.matches = {
+			DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
+			DMI_MATCH(DMI_BOARD_NAME, "Z8NR-D12"),
+		},
+		.driver_data = &i801_mux_config_asus_z8_d12,
+	},
+	{
+		.matches = {
+			DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
+			DMI_MATCH(DMI_BOARD_NAME, "Z8P(N)H-D12"),
+		},
+		.driver_data = &i801_mux_config_asus_z8_d12,
+	},
+	{
+		.matches = {
+			DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
+			DMI_MATCH(DMI_BOARD_NAME, "Z8PG-D18"),
+		},
+		.driver_data = &i801_mux_config_asus_z8_d18,
+	},
+	{
+		.matches = {
+			DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
+			DMI_MATCH(DMI_BOARD_NAME, "Z8PE-D18"),
+		},
+		.driver_data = &i801_mux_config_asus_z8_d18,
+	},
+	{
+		.matches = {
+			DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
+			DMI_MATCH(DMI_BOARD_NAME, "Z8PS-D12"),
+		},
+		.driver_data = &i801_mux_config_asus_z8_d12,
+	},
+	{ }
+};
+
+/* Setup multiplexing if needed */
+static int i801_add_mux(struct i801_priv *priv)
+{
+	struct device *dev = &priv->adapter.dev;
+	const struct i801_mux_config *mux_config;
+	struct i2c_mux_gpio_platform_data gpio_data;
+	struct gpiod_lookup_table *lookup;
+	int err, i;
+
+	if (!priv->mux_drvdata)
+		return 0;
+	mux_config = priv->mux_drvdata;
+
+	/* Prepare the platform data */
+	mem_clear(&gpio_data, sizeof(struct i2c_mux_gpio_platform_data));
+	gpio_data.parent = priv->adapter.nr;
+	gpio_data.values = mux_config->values;
+	gpio_data.n_values = mux_config->n_values;
+	gpio_data.classes = mux_config->classes;
+	gpio_data.idle = I2C_MUX_GPIO_NO_IDLE;
+
+	/* Register GPIO descriptor lookup table */
+	lookup = devm_kzalloc(dev,
+			      struct_size(lookup, table, mux_config->n_gpios + 1),
+			      GFP_KERNEL);
+	if (!lookup)
+		return -ENOMEM;
+	lookup->dev_id = "i2c-mux-gpio";
+	for (i = 0; i < mux_config->n_gpios; i++) {
+		lookup->table[i] = (struct gpiod_lookup)
+			GPIO_LOOKUP(mux_config->gpio_chip,
+				    mux_config->gpios[i], "mux", 0);
+	}
+	gpiod_add_lookup_table(lookup);
+	priv->lookup = lookup;
+
+	/*
+	 * Register the mux device, we use PLATFORM_DEVID_NONE here
+	 * because since we are referring to the GPIO chip by name we are
+	 * anyways in deep trouble if there is more than one of these
+	 * devices, and there should likely only be one platform controller
+	 * hub.
+	 */
+	priv->mux_pdev = platform_device_register_data(dev, "i2c-mux-gpio",
+				PLATFORM_DEVID_NONE, &gpio_data,
+				sizeof(struct i2c_mux_gpio_platform_data));
+	if (IS_ERR(priv->mux_pdev)) {
+		err = PTR_ERR(priv->mux_pdev);
+		gpiod_remove_lookup_table(lookup);
+		priv->mux_pdev = NULL;
+		dev_err(dev, "Failed to register i2c-mux-gpio device\n");
+		return err;
+	}
+
+	return 0;
+}
+
+static void i801_del_mux(struct i801_priv *priv)
+{
+	if (priv->mux_pdev)
+		platform_device_unregister(priv->mux_pdev);
+	if (priv->lookup)
+		gpiod_remove_lookup_table(priv->lookup);
+}
+
+static unsigned int i801_get_adapter_class(struct i801_priv *priv)
+{
+	const struct dmi_system_id *id;
+	const struct i801_mux_config *mux_config;
+	unsigned int class = I2C_CLASS_HWMON | I2C_CLASS_SPD;
+	int i;
+
+	id = dmi_first_match(mux_dmi_table);
+	if (id) {
+		/* Remove branch classes from trunk */
+		mux_config = id->driver_data;
+		for (i = 0; i < mux_config->n_values; i++)
+			class &= ~mux_config->classes[i];
+
+		/* Remember for later */
+		priv->mux_drvdata = mux_config;
+	}
+
+	return class;
+}
+#else
+static inline int i801_add_mux(struct i801_priv *priv) { return 0; }
+static inline void i801_del_mux(struct i801_priv *priv) { }
+
+static inline unsigned int i801_get_adapter_class(struct i801_priv *priv)
+{
+	return I2C_CLASS_HWMON | I2C_CLASS_SPD;
+}
+#endif
+
+static const struct itco_wdt_platform_data spt_tco_platform_data = {
+	.name = "Intel PCH",
+	.version = 4,
+};
+
+static DEFINE_SPINLOCK(p2sb_spinlock);
+
+static struct platform_device *
+i801_add_tco_spt(struct i801_priv *priv, struct pci_dev *pci_dev,
+		 struct resource *tco_res)
+{
+	struct resource *res;
+	unsigned int devfn;
+	u64 base64_addr;
+	u32 base_addr;
+	u8 hidden;
+
+	/*
+	 * We must access the NO_REBOOT bit over the Primary to Sideband
+	 * bridge (P2SB). The BIOS prevents the P2SB device from being
+	 * enumerated by the PCI subsystem, so we need to unhide/hide it
+	 * to lookup the P2SB BAR.
+	 */
+	spin_lock(&p2sb_spinlock);
+
+	devfn = PCI_DEVFN(PCI_SLOT(pci_dev->devfn), 1);
+
+	/* Unhide the P2SB device, if it is hidden */
+	pci_bus_read_config_byte(pci_dev->bus, devfn, 0xe1, &hidden);
+	if (hidden)
+		pci_bus_write_config_byte(pci_dev->bus, devfn, 0xe1, 0x0);
+
+	pci_bus_read_config_dword(pci_dev->bus, devfn, SBREG_BAR, &base_addr);
+	base64_addr = base_addr & 0xfffffff0;
+
+	pci_bus_read_config_dword(pci_dev->bus, devfn, SBREG_BAR + 0x4, &base_addr);
+	base64_addr |= (u64)base_addr << 32;
+
+	/* Hide the P2SB device, if it was hidden before */
+	if (hidden)
+		pci_bus_write_config_byte(pci_dev->bus, devfn, 0xe1, hidden);
+	spin_unlock(&p2sb_spinlock);
+
+	res = &tco_res[1];
+	if (pci_dev->device == PCI_DEVICE_ID_INTEL_DNV_SMBUS)
+		res->start = (resource_size_t)base64_addr + SBREG_SMBCTRL_DNV;
+	else
+		res->start = (resource_size_t)base64_addr + SBREG_SMBCTRL;
+
+	res->end = res->start + 3;
+	res->flags = IORESOURCE_MEM;
+
+	return platform_device_register_resndata(&pci_dev->dev, "iTCO_wdt", -1,
+					tco_res, 2, &spt_tco_platform_data,
+					sizeof(spt_tco_platform_data));
+}
+
+static const struct itco_wdt_platform_data cnl_tco_platform_data = {
+	.name = "Intel PCH",
+	.version = 6,
+};
+
+static struct platform_device *
+i801_add_tco_cnl(struct i801_priv *priv, struct pci_dev *pci_dev,
+		 struct resource *tco_res)
+{
+	return platform_device_register_resndata(&pci_dev->dev,
+			"iTCO_wdt", -1, tco_res, 1, &cnl_tco_platform_data,
+			sizeof(cnl_tco_platform_data));
+}
+
+static void i801_add_tco(struct i801_priv *priv)
+{
+	struct pci_dev *pci_dev = priv->pci_dev;
+	struct resource tco_res[2], *res;
+	u32 tco_base, tco_ctl;
+
+	/* If we have ACPI based watchdog use that instead */
+	if (acpi_has_watchdog())
+		return;
+
+	if (!(priv->features & (FEATURE_TCO_SPT | FEATURE_TCO_CNL)))
+		return;
+
+	pci_read_config_dword(pci_dev, TCOBASE, &tco_base);
+	pci_read_config_dword(pci_dev, TCOCTL, &tco_ctl);
+	if (!(tco_ctl & TCOCTL_EN))
+		return;
+
+	mem_clear(tco_res, sizeof(tco_res));
+	/*
+	 * Always populate the main iTCO IO resource here. The second entry
+	 * for NO_REBOOT MMIO is filled by the SPT specific function.
+	 */
+	res = &tco_res[0];
+	res->start = tco_base & ~1;
+	res->end = res->start + 32 - 1;
+	res->flags = IORESOURCE_IO;
+
+	if (priv->features & FEATURE_TCO_CNL)
+		priv->tco_pdev = i801_add_tco_cnl(priv, pci_dev, tco_res);
+	else
+		priv->tco_pdev = i801_add_tco_spt(priv, pci_dev, tco_res);
+
+	if (IS_ERR(priv->tco_pdev))
+		dev_warn(&pci_dev->dev, "failed to create iTCO device\n");
+}
+
+#ifdef CONFIG_ACPI
+static bool i801_acpi_is_smbus_ioport(const struct i801_priv *priv,
+				      acpi_physical_address address)
+{
+	return address >= priv->smba &&
+	       address <= pci_resource_end(priv->pci_dev, SMBBAR);
+}
+
+static acpi_status
+i801_acpi_io_handler(u32 function, acpi_physical_address address, u32 bits,
+		     u64 *value, void *handler_context, void *region_context)
+{
+	struct i801_priv *priv = handler_context;
+	struct pci_dev *pdev = priv->pci_dev;
+	acpi_status status;
+
+	/*
+	 * Once BIOS AML code touches the OpRegion we warn and inhibit any
+	 * further access from the driver itself. This device is now owned
+	 * by the system firmware.
+	 */
+	mutex_lock(&priv->acpi_lock);
+
+	if (!priv->acpi_reserved && i801_acpi_is_smbus_ioport(priv, address)) {
+		priv->acpi_reserved = true;
+
+		dev_warn(&pdev->dev, "BIOS is accessing SMBus registers\n");
+		dev_warn(&pdev->dev, "Driver SMBus register access inhibited\n");
+
+		/*
+		 * BIOS is accessing the host controller so prevent it from
+		 * suspending automatically from now on.
+		 */
+		pm_runtime_get_sync(&pdev->dev);
+	}
+
+	if ((function & ACPI_IO_MASK) == ACPI_READ)
+		status = acpi_os_read_port(address, (u32 *)value, bits);
+	else
+		status = acpi_os_write_port(address, (u32)*value, bits);
+
+	mutex_unlock(&priv->acpi_lock);
+
+	return status;
+}
+
+static int i801_acpi_probe(struct i801_priv *priv)
+{
+	struct acpi_device *adev;
+	acpi_status status;
+
+	adev = ACPI_COMPANION(&priv->pci_dev->dev);
+	if (adev) {
+		status = acpi_install_address_space_handler(adev->handle,
+				ACPI_ADR_SPACE_SYSTEM_IO, i801_acpi_io_handler,
+				NULL, priv);
+		if (ACPI_SUCCESS(status))
+			return 0;
+	}
+
+	return acpi_check_resource_conflict(&priv->pci_dev->resource[SMBBAR]);
+}
+
+static void i801_acpi_remove(struct i801_priv *priv)
+{
+	struct acpi_device *adev;
+
+	adev = ACPI_COMPANION(&priv->pci_dev->dev);
+	if (!adev)
+		return;
+
+	acpi_remove_address_space_handler(adev->handle,
+		ACPI_ADR_SPACE_SYSTEM_IO, i801_acpi_io_handler);
+
+	mutex_lock(&priv->acpi_lock);
+	if (priv->acpi_reserved)
+		pm_runtime_put(&priv->pci_dev->dev);
+	mutex_unlock(&priv->acpi_lock);
+}
+#else
+static inline int i801_acpi_probe(struct i801_priv *priv) { return 0; }
+static inline void i801_acpi_remove(struct i801_priv *priv) { }
+#endif
+
+static unsigned char i801_setup_hstcfg(struct i801_priv *priv)
+{
+	unsigned char hstcfg = priv->original_hstcfg;
+
+	hstcfg &= ~SMBHSTCFG_I2C_EN;	/* SMBus timing */
+	hstcfg |= SMBHSTCFG_HST_EN;
+	pci_write_config_byte(priv->pci_dev, SMBHSTCFG, hstcfg);
+	return hstcfg;
+}
+
+static int i801_probe(struct pci_dev *dev, const struct pci_device_id *id)
+{
+	unsigned char temp;
+	int err, i;
+	struct i801_priv *priv;
+
+	priv = devm_kzalloc(&dev->dev, sizeof(*priv), GFP_KERNEL);
+	if (!priv)
+		return -ENOMEM;
+
+	i2c_set_adapdata(&priv->adapter, priv);
+	priv->adapter.owner = THIS_MODULE;
+	priv->adapter.class = i801_get_adapter_class(priv);
+	priv->adapter.algo = &smbus_algorithm;
+	priv->adapter.dev.parent = &dev->dev;
+	ACPI_COMPANION_SET(&priv->adapter.dev, ACPI_COMPANION(&dev->dev));
+	priv->adapter.retries = 3;
+	mutex_init(&priv->acpi_lock);
+
+	priv->pci_dev = dev;
+	switch (dev->device) {
+	case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_H_SMBUS:
+	case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_SMBUS:
+	case PCI_DEVICE_ID_INTEL_LEWISBURG_SMBUS:
+	case PCI_DEVICE_ID_INTEL_LEWISBURG_SSKU_SMBUS:
+	case PCI_DEVICE_ID_INTEL_DNV_SMBUS:
+	case PCI_DEVICE_ID_INTEL_KABYLAKE_PCH_H_SMBUS:
+	case PCI_DEVICE_ID_INTEL_COMETLAKE_V_SMBUS:
+		priv->features |= FEATURE_BLOCK_PROC;
+		priv->features |= FEATURE_I2C_BLOCK_READ;
+		priv->features |= FEATURE_IRQ;
+		priv->features |= FEATURE_SMBUS_PEC;
+		priv->features |= FEATURE_BLOCK_BUFFER;
+		priv->features |= FEATURE_TCO_SPT;
+		priv->features |= FEATURE_HOST_NOTIFY;
+		break;
+
+	case PCI_DEVICE_ID_INTEL_CANNONLAKE_H_SMBUS:
+	case PCI_DEVICE_ID_INTEL_CANNONLAKE_LP_SMBUS:
+	case PCI_DEVICE_ID_INTEL_CDF_SMBUS:
+	case PCI_DEVICE_ID_INTEL_ICELAKE_LP_SMBUS:
+	case PCI_DEVICE_ID_INTEL_COMETLAKE_SMBUS:
+	case PCI_DEVICE_ID_INTEL_COMETLAKE_H_SMBUS:
+	case PCI_DEVICE_ID_INTEL_ELKHART_LAKE_SMBUS:
+	case PCI_DEVICE_ID_INTEL_TIGERLAKE_LP_SMBUS:
+	case PCI_DEVICE_ID_INTEL_TIGERLAKE_H_SMBUS:
+	case PCI_DEVICE_ID_INTEL_JASPER_LAKE_SMBUS:
+	case PCI_DEVICE_ID_INTEL_EBG_SMBUS:
+	case PCI_DEVICE_ID_INTEL_ALDER_LAKE_S_SMBUS:
+		priv->features |= FEATURE_BLOCK_PROC;
+		priv->features |= FEATURE_I2C_BLOCK_READ;
+		priv->features |= FEATURE_IRQ;
+		priv->features |= FEATURE_SMBUS_PEC;
+		priv->features |= FEATURE_BLOCK_BUFFER;
+		priv->features |= FEATURE_TCO_CNL;
+		priv->features |= FEATURE_HOST_NOTIFY;
+		break;
+
+	case PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF0:
+	case PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF1:
+	case PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF2:
+	case PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS0:
+	case PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS1:
+	case PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS2:
+		priv->features |= FEATURE_IDF;
+		fallthrough;
+	default:
+		priv->features |= FEATURE_BLOCK_PROC;
+		priv->features |= FEATURE_I2C_BLOCK_READ;
+		priv->features |= FEATURE_IRQ;
+		fallthrough;
+	case PCI_DEVICE_ID_INTEL_82801DB_3:
+		priv->features |= FEATURE_SMBUS_PEC;
+		priv->features |= FEATURE_BLOCK_BUFFER;
+		fallthrough;
+	case PCI_DEVICE_ID_INTEL_82801CA_3:
+		priv->features |= FEATURE_HOST_NOTIFY;
+		fallthrough;
+	case PCI_DEVICE_ID_INTEL_82801BA_2:
+	case PCI_DEVICE_ID_INTEL_82801AB_3:
+	case PCI_DEVICE_ID_INTEL_82801AA_3:
+		break;
+	}
+
+	/* Disable features on user request */
+	for (i = 0; i < ARRAY_SIZE(i801_feature_names); i++) {
+		if (priv->features & disable_features & (1 << i))
+			dev_notice(&dev->dev, "%s disabled by user\n",
+				   i801_feature_names[i]);
+	}
+	priv->features &= ~disable_features;
+
+	err = pcim_enable_device(dev);
+	if (err) {
+		dev_err(&dev->dev, "Failed to enable SMBus PCI device (%d)\n",
+			err);
+		return err;
+	}
+	pcim_pin_device(dev);
+
+	/* Determine the address of the SMBus area */
+	priv->smba = pci_resource_start(dev, SMBBAR);
+	if (!priv->smba) {
+		dev_err(&dev->dev,
+			"SMBus base address uninitialized, upgrade BIOS\n");
+		return -ENODEV;
+	}
+
+	if (i801_acpi_probe(priv))
+		return -ENODEV;
+
+	err = pcim_iomap_regions(dev, 1 << SMBBAR,
+				 dev_driver_string(&dev->dev));
+	if (err) {
+		dev_err(&dev->dev,
+			"Failed to request SMBus region 0x%lx-0x%Lx\n",
+			priv->smba,
+			(unsigned long long)pci_resource_end(dev, SMBBAR));
+		i801_acpi_remove(priv);
+		return err;
+	}
+
+	pci_read_config_byte(priv->pci_dev, SMBHSTCFG, &priv->original_hstcfg);
+	temp = i801_setup_hstcfg(priv);
+	if (!(priv->original_hstcfg & SMBHSTCFG_HST_EN))
+		dev_info(&dev->dev, "Enabling SMBus device\n");
+
+	if (temp & SMBHSTCFG_SMB_SMI_EN) {
+		dev_dbg(&dev->dev, "SMBus using interrupt SMI#\n");
+		/* Disable SMBus interrupt feature if SMBus using SMI# */
+		priv->features &= ~FEATURE_IRQ;
+	}
+	if (temp & SMBHSTCFG_SPD_WD)
+		dev_info(&dev->dev, "SPD Write Disable is set\n");
+
+	/* Clear special mode bits */
+	if (priv->features & (FEATURE_SMBUS_PEC | FEATURE_BLOCK_BUFFER))
+		outb_p(inb_p(SMBAUXCTL(priv)) &
+		       ~(SMBAUXCTL_CRC | SMBAUXCTL_E32B), SMBAUXCTL(priv));
+
+	/* Remember original Host Notify setting */
+	if (priv->features & FEATURE_HOST_NOTIFY)
+		priv->original_slvcmd = inb_p(SMBSLVCMD(priv));
+
+	/* Default timeout in interrupt mode: 200 ms */
+	priv->adapter.timeout = HZ / 5;
+
+	if (dev->irq == IRQ_NOTCONNECTED)
+		priv->features &= ~FEATURE_IRQ;
+
+	if (priv->features & FEATURE_IRQ) {
+		u16 pcictl, pcists;
+
+		/* Complain if an interrupt is already pending */
+		pci_read_config_word(priv->pci_dev, SMBPCISTS, &pcists);
+		if (pcists & SMBPCISTS_INTS)
+			dev_warn(&dev->dev, "An interrupt is pending!\n");
+
+		/* Check if interrupts have been disabled */
+		pci_read_config_word(priv->pci_dev, SMBPCICTL, &pcictl);
+		if (pcictl & SMBPCICTL_INTDIS) {
+			dev_info(&dev->dev, "Interrupts are disabled\n");
+			priv->features &= ~FEATURE_IRQ;
+		}
+	}
+
+	if (priv->features & FEATURE_IRQ) {
+		init_waitqueue_head(&priv->waitq);
+
+		err = devm_request_irq(&dev->dev, dev->irq, i801_isr,
+				       IRQF_SHARED,
+				       dev_driver_string(&dev->dev), priv);
+		if (err) {
+			dev_err(&dev->dev, "Failed to allocate irq %d: %d\n",
+				dev->irq, err);
+			priv->features &= ~FEATURE_IRQ;
+		}
+	}
+	dev_info(&dev->dev, "SMBus using %s\n",
+		 priv->features & FEATURE_IRQ ? "PCI interrupt" : "polling");
+
+	i801_add_tco(priv);
+
+	snprintf(priv->adapter.name, sizeof(priv->adapter.name),
+		"SMBus I801 adapter at %04lx", priv->smba);
+	err = i2c_add_adapter(&priv->adapter);
+	if (err) {
+		i801_acpi_remove(priv);
+		return err;
+	}
+
+	i801_enable_host_notify(&priv->adapter);
+
+	i801_probe_optional_slaves(priv);
+	/* We ignore errors - multiplexing is optional */
+	i801_add_mux(priv);
+
+	pci_set_drvdata(dev, priv);
+
+	dev_pm_set_driver_flags(&dev->dev, DPM_FLAG_NO_DIRECT_COMPLETE);
+	pm_runtime_set_autosuspend_delay(&dev->dev, 1000);
+	pm_runtime_use_autosuspend(&dev->dev);
+	pm_runtime_put_autosuspend(&dev->dev);
+	pm_runtime_allow(&dev->dev);
+	dev_info(&dev->dev, "wb-i2c-i801 probe ok.\n");
+
+	return 0;
+}
+
+static void i801_remove(struct pci_dev *dev)
+{
+	struct i801_priv *priv = pci_get_drvdata(dev);
+
+	pm_runtime_forbid(&dev->dev);
+	pm_runtime_get_noresume(&dev->dev);
+
+	i801_disable_host_notify(priv);
+	i801_del_mux(priv);
+	i2c_del_adapter(&priv->adapter);
+	i801_acpi_remove(priv);
+	pci_write_config_byte(dev, SMBHSTCFG, priv->original_hstcfg);
+
+	platform_device_unregister(priv->tco_pdev);
+
+	/*
+	 * do not call pci_disable_device(dev) since it can cause hard hangs on
+	 * some systems during power-off (eg. Fujitsu-Siemens Lifebook E8010)
+	 */
+}
+
+static void i801_shutdown(struct pci_dev *dev)
+{
+	struct i801_priv *priv = pci_get_drvdata(dev);
+
+	/* Restore config registers to avoid hard hang on some systems */
+	i801_disable_host_notify(priv);
+	pci_write_config_byte(dev, SMBHSTCFG, priv->original_hstcfg);
+}
+
+#ifdef CONFIG_PM_SLEEP
+static int i801_suspend(struct device *dev)
+{
+	struct i801_priv *priv = dev_get_drvdata(dev);
+
+	pci_write_config_byte(priv->pci_dev, SMBHSTCFG, priv->original_hstcfg);
+	return 0;
+}
+
+static int i801_resume(struct device *dev)
+{
+	struct i801_priv *priv = dev_get_drvdata(dev);
+
+	i801_setup_hstcfg(priv);
+	i801_enable_host_notify(&priv->adapter);
+
+	return 0;
+}
+#endif
+
+static SIMPLE_DEV_PM_OPS(i801_pm_ops, i801_suspend, i801_resume);
+
+static struct pci_driver i801_driver = {
+	.name		= "wb_i801_smbus",
+	.id_table	= i801_ids,
+	.probe		= i801_probe,
+	.remove		= i801_remove,
+	.shutdown	= i801_shutdown,
+	.driver		= {
+		.pm	= &i801_pm_ops,
+	},
+};
+
+static int __init i2c_i801_init(void)
+{
+	if (dmi_name_in_vendors("FUJITSU"))
+		input_apanel_init();
+	return pci_register_driver(&i801_driver);
+}
+
+static void __exit i2c_i801_exit(void)
+{
+	pci_unregister_driver(&i801_driver);
+}
+
+MODULE_AUTHOR("support");
+MODULE_DESCRIPTION("I801 SMBus driver");
+MODULE_LICENSE("GPL");
+
+module_init(i2c_i801_init);
+module_exit(i2c_i801_exit);
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_ismt.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_ismt.c
new file mode 100644
index 000000000..94a3ed827
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_ismt.c
@@ -0,0 +1,1131 @@
+/*
+ * This file is provided under a dual BSD/GPLv2 license.  When using or
+ * redistributing this file, you may do so under either license.
+ *
+ * Copyright(c) 2012 Intel Corporation. All rights reserved.
+ *
+ * GPL LICENSE SUMMARY
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ * The full GNU General Public License is included in this distribution
+ * in the file called LICENSE.GPL.
+ *
+ * BSD LICENSE
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above copyright
+ *     notice, this list of conditions and the following disclaimer in
+ *     the documentation and/or other materials provided with the
+ *     distribution.
+ *   * Neither the name of Intel Corporation nor the names of its
+ *     contributors may be used to endorse or promote products derived
+ *     from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ *  Supports the SMBus Message Transport (SMT) in the Intel Atom Processor
+ *  S12xx Product Family.
+ *
+ *  Features supported by this driver:
+ *  Hardware PEC                     yes
+ *  Block buffer                     yes
+ *  Block process call transaction   yes
+ *  Slave mode                       no
+ */
+
+#include <linux/module.h>
+#include <linux/pci.h>
+#include <linux/kernel.h>
+#include <linux/stddef.h>
+#include <linux/completion.h>
+#include <linux/dma-mapping.h>
+#include <linux/i2c.h>
+#include <linux/acpi.h>
+#include <linux/interrupt.h>
+#include <linux/delay.h>
+
+#include <linux/io-64-nonatomic-lo-hi.h>
+#include <linux/string.h>
+
+#define mem_clear(data, size) memset((data), 0, (size))
+
+/* PCI Address Constants */
+#define SMBBAR		0
+
+#define ISMT_DBCTRL		0x388	/* ISMT PIN Control Register */
+#define ISMT_DBSTS		0X38C	/* ISMT PIN Status Register */
+
+#define ISMT_DBSTS_CLK_STS	(1<<9)	/* bit9 SMBCLK_CUR_STS */
+#define ISMT_DBSTS_SDA_STS	(1<<8)	/* bit8 SMBDATA_CUR_STS */
+#define ISMT_DBCTRL_CLK_CTL	(1<<1)	/* bit1 SMBCLK_CTL */
+#define ISMT_DBCTRL_ENABLE	(1<<31)	/* bit31 EN */
+
+/* PCI DIDs for the Intel SMBus Message Transport (SMT) Devices */
+#define PCI_DEVICE_ID_INTEL_S1200_SMT0	0x0c59
+#define PCI_DEVICE_ID_INTEL_S1200_SMT1	0x0c5a
+#define PCI_DEVICE_ID_INTEL_CDF_SMT	0x18ac
+#define PCI_DEVICE_ID_INTEL_DNV_SMT	0x19ac
+#define PCI_DEVICE_ID_INTEL_EBG_SMT	0x1bff
+#define PCI_DEVICE_ID_INTEL_AVOTON_SMT	0x1f15
+
+#define ISMT_DESC_ENTRIES	2	/* number of descriptor entries */
+#define ISMT_MAX_RETRIES	3	/* number of SMBus retries to attempt */
+#define ISMT_LOG_ENTRIES	3	/* number of interrupt cause log entries */
+
+/* Hardware Descriptor Constants - Control Field */
+#define ISMT_DESC_CWRL	0x01	/* Command/Write Length */
+#define ISMT_DESC_BLK	0X04	/* Perform Block Transaction */
+#define ISMT_DESC_FAIR	0x08	/* Set fairness flag upon successful arbit. */
+#define ISMT_DESC_PEC	0x10	/* Packet Error Code */
+#define ISMT_DESC_I2C	0x20	/* I2C Enable */
+#define ISMT_DESC_INT	0x40	/* Interrupt */
+#define ISMT_DESC_SOE	0x80	/* Stop On Error */
+
+/* Hardware Descriptor Constants - Status Field */
+#define ISMT_DESC_SCS	0x01	/* Success */
+#define ISMT_DESC_DLTO	0x04	/* Data Low Time Out */
+#define ISMT_DESC_NAK	0x08	/* NAK Received */
+#define ISMT_DESC_CRC	0x10	/* CRC Error */
+#define ISMT_DESC_CLTO	0x20	/* Clock Low Time Out */
+#define ISMT_DESC_COL	0x40	/* Collisions */
+#define ISMT_DESC_LPR	0x80	/* Large Packet Received */
+
+/* Macros */
+#define ISMT_DESC_ADDR_RW(addr, rw) (((addr) << 1) | (rw))
+
+/* iSMT General Register address offsets (SMBBAR + <addr>) */
+#define ISMT_GR_GCTRL		0x000	/* General Control */
+#define ISMT_GR_SMTICL		0x008	/* SMT Interrupt Cause Location */
+#define ISMT_GR_ERRINTMSK	0x010	/* Error Interrupt Mask */
+#define ISMT_GR_ERRAERMSK	0x014	/* Error AER Mask */
+#define ISMT_GR_ERRSTS		0x018	/* Error Status */
+#define ISMT_GR_ERRINFO		0x01c	/* Error Information */
+
+/* iSMT Master Registers */
+#define ISMT_MSTR_MDBA		0x100	/* Master Descriptor Base Address */
+#define ISMT_MSTR_MCTRL		0x108	/* Master Control */
+#define ISMT_MSTR_MSTS		0x10c	/* Master Status */
+#define ISMT_MSTR_MDS		0x110	/* Master Descriptor Size */
+#define ISMT_MSTR_RPOLICY	0x114	/* Retry Policy */
+
+/* iSMT Miscellaneous Registers */
+#define ISMT_SPGT	0x300	/* SMBus PHY Global Timing */
+
+/* General Control Register (GCTRL) bit definitions */
+#define ISMT_GCTRL_TRST	0x04	/* Target Reset */
+#define ISMT_GCTRL_KILL	0x08	/* Kill */
+#define ISMT_GCTRL_SRST	0x40	/* Soft Reset */
+
+/* Master Control Register (MCTRL) bit definitions */
+#define ISMT_MCTRL_SS	0x01		/* Start/Stop */
+#define ISMT_MCTRL_MEIE	0x10		/* Master Error Interrupt Enable */
+#define ISMT_MCTRL_FMHP	0x00ff0000	/* Firmware Master Head Ptr (FMHP) */
+
+/* Master Status Register (MSTS) bit definitions */
+#define ISMT_MSTS_HMTP	0xff0000	/* HW Master Tail Pointer (HMTP) */
+#define ISMT_MSTS_MIS	0x20		/* Master Interrupt Status (MIS) */
+#define ISMT_MSTS_MEIS	0x10		/* Master Error Int Status (MEIS) */
+#define ISMT_MSTS_IP	0x01		/* In Progress */
+
+/* Master Descriptor Size (MDS) bit definitions */
+#define ISMT_MDS_MASK	0xff	/* Master Descriptor Size mask (MDS) */
+
+/* SMBus PHY Global Timing Register (SPGT) bit definitions */
+#define ISMT_SPGT_SPD_MASK	0xc0000000	/* SMBus Speed mask */
+#define ISMT_SPGT_SPD_80K	0x00		/* 80 kHz */
+#define ISMT_SPGT_SPD_100K	(0x1 << 30)	/* 100 kHz */
+#define ISMT_SPGT_SPD_400K	(0x2U << 30)	/* 400 kHz */
+#define ISMT_SPGT_SPD_1M	(0x3U << 30)	/* 1 MHz */
+
+
+/* MSI Control Register (MSICTL) bit definitions */
+#define ISMT_MSICTL_MSIE	0x01	/* MSI Enable */
+
+/* iSMT Hardware Descriptor */
+struct ismt_desc {
+	u8 tgtaddr_rw;	/* target address & r/w bit */
+	u8 wr_len_cmd;	/* write length in bytes or a command */
+	u8 rd_len;	/* read length */
+	u8 control;	/* control bits */
+	u8 status;	/* status bits */
+	u8 retry;	/* collision retry and retry count */
+	u8 rxbytes;	/* received bytes */
+	u8 txbytes;	/* transmitted bytes */
+	u32 dptr_low;	/* lower 32 bit of the data pointer */
+	u32 dptr_high;	/* upper 32 bit of the data pointer */
+} __packed;
+
+struct ismt_priv {
+	struct i2c_adapter adapter;
+	void __iomem *smba;			/* PCI BAR */
+	struct pci_dev *pci_dev;
+	struct ismt_desc *hw;			/* descriptor virt base addr */
+	dma_addr_t io_rng_dma;			/* descriptor HW base addr */
+	u8 head;				/* ring buffer head pointer */
+	struct completion cmp;			/* interrupt completion */
+	u8 buffer[I2C_SMBUS_BLOCK_MAX + 16];	/* temp R/W data buffer */
+	dma_addr_t log_dma;
+	u32 *log;
+};
+
+static const struct pci_device_id ismt_ids[] = {
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_S1200_SMT0) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_S1200_SMT1) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CDF_SMT) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_DNV_SMT) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_EBG_SMT) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_AVOTON_SMT) },
+	{ 0, }
+};
+
+MODULE_DEVICE_TABLE(pci, ismt_ids);
+
+/* Bus speed control bits for slow debuggers - refer to the docs for usage */
+static unsigned int bus_speed;
+module_param(bus_speed, uint, S_IRUGO);
+MODULE_PARM_DESC(bus_speed, "Bus Speed in kHz (0 = BIOS default)");
+
+static unsigned int dma_reset_timeout = 1000;
+module_param(dma_reset_timeout, uint, S_IRUGO);
+
+static void ismt_hw_init(struct ismt_priv *priv);
+
+/**
+ * __ismt_desc_dump() - dump the contents of a specific descriptor
+ * @dev: the iSMT device
+ * @desc: the iSMT hardware descriptor
+ */
+static void __ismt_desc_dump(struct device *dev, const struct ismt_desc *desc)
+{
+
+	dev_dbg(dev, "Descriptor struct:  %p\n", desc);
+	dev_dbg(dev, "\ttgtaddr_rw=0x%02X\n", desc->tgtaddr_rw);
+	dev_dbg(dev, "\twr_len_cmd=0x%02X\n", desc->wr_len_cmd);
+	dev_dbg(dev, "\trd_len=    0x%02X\n", desc->rd_len);
+	dev_dbg(dev, "\tcontrol=   0x%02X\n", desc->control);
+	dev_dbg(dev, "\tstatus=    0x%02X\n", desc->status);
+	dev_dbg(dev, "\tretry=     0x%02X\n", desc->retry);
+	dev_dbg(dev, "\trxbytes=   0x%02X\n", desc->rxbytes);
+	dev_dbg(dev, "\ttxbytes=   0x%02X\n", desc->txbytes);
+	dev_dbg(dev, "\tdptr_low=  0x%08X\n", desc->dptr_low);
+	dev_dbg(dev, "\tdptr_high= 0x%08X\n", desc->dptr_high);
+}
+/**
+ * ismt_desc_dump() - dump the contents of a descriptor for debug purposes
+ * @priv: iSMT private data
+ */
+static void ismt_desc_dump(struct ismt_priv *priv)
+{
+	struct device *dev = &priv->pci_dev->dev;
+	struct ismt_desc *desc = &priv->hw[priv->head];
+
+	dev_dbg(dev, "Dump of the descriptor struct:  0x%X\n", priv->head);
+	__ismt_desc_dump(dev, desc);
+}
+
+static void ismt_reset_dma(struct ismt_priv *priv)
+{
+    uint val;
+    u16 ctrl;
+    struct pci_dev *pdev;
+    u32 addr_lo, addr_hi;
+
+    /* save msiaddr */
+    pdev = priv->pci_dev;
+    pci_read_config_dword(pdev, pdev->msi_cap + PCI_MSI_ADDRESS_LO, &addr_lo);
+    pci_read_config_dword(pdev, pdev->msi_cap + PCI_MSI_ADDRESS_HI, &addr_hi);
+
+    /* Clear the start bit */
+    val = readl(priv->smba + ISMT_MSTR_MCTRL);
+    val &= ~ISMT_MCTRL_SS;
+    writel(val, priv->smba + ISMT_MSTR_MCTRL);
+
+    val = readl(priv->smba + ISMT_GR_GCTRL);
+    writel(val | ISMT_GCTRL_KILL | ISMT_GCTRL_TRST | ISMT_GCTRL_SRST, priv->smba + ISMT_GR_GCTRL);
+
+    if (dma_reset_timeout > 0) {
+        usleep_range(dma_reset_timeout, dma_reset_timeout + 1);
+    }
+
+    ismt_hw_init(priv);
+    pci_write_config_dword(pdev, pdev->msi_cap + PCI_MSI_ADDRESS_LO, addr_lo);
+    pci_write_config_dword(pdev, pdev->msi_cap + PCI_MSI_ADDRESS_HI, addr_hi);
+    /* enable msi */
+    pci_read_config_word(pdev, pdev->msi_cap + PCI_MSI_FLAGS, &ctrl);
+    ctrl |= PCI_MSI_FLAGS_ENABLE;
+    pci_write_config_word(pdev, pdev->msi_cap + PCI_MSI_FLAGS, ctrl);
+}
+
+/**
+ * ismt_gen_reg_dump() - dump the iSMT General Registers
+ * @priv: iSMT private data
+ */
+static void ismt_gen_reg_dump(struct ismt_priv *priv)
+{
+	struct device *dev = &priv->pci_dev->dev;
+
+	dev_dbg(dev, "Dump of the iSMT General Registers\n");
+	dev_dbg(dev, "  GCTRL.... : (0x%p)=0x%X\n",
+		priv->smba + ISMT_GR_GCTRL,
+		readl(priv->smba + ISMT_GR_GCTRL));
+	dev_dbg(dev, "  SMTICL... : (0x%p)=0x%016llX\n",
+		priv->smba + ISMT_GR_SMTICL,
+		(long long unsigned int)readq(priv->smba + ISMT_GR_SMTICL));
+	dev_dbg(dev, "  ERRINTMSK : (0x%p)=0x%X\n",
+		priv->smba + ISMT_GR_ERRINTMSK,
+		readl(priv->smba + ISMT_GR_ERRINTMSK));
+	dev_dbg(dev, "  ERRAERMSK : (0x%p)=0x%X\n",
+		priv->smba + ISMT_GR_ERRAERMSK,
+		readl(priv->smba + ISMT_GR_ERRAERMSK));
+	dev_dbg(dev, "  ERRSTS... : (0x%p)=0x%X\n",
+		priv->smba + ISMT_GR_ERRSTS,
+		readl(priv->smba + ISMT_GR_ERRSTS));
+	dev_dbg(dev, "  ERRINFO.. : (0x%p)=0x%X\n",
+		priv->smba + ISMT_GR_ERRINFO,
+		readl(priv->smba + ISMT_GR_ERRINFO));
+}
+
+/**
+ * ismt_mstr_reg_dump() - dump the iSMT Master Registers
+ * @priv: iSMT private data
+ */
+static void ismt_mstr_reg_dump(struct ismt_priv *priv)
+{
+	struct device *dev = &priv->pci_dev->dev;
+
+	dev_dbg(dev, "Dump of the iSMT Master Registers\n");
+	dev_dbg(dev, "  MDBA..... : (0x%p)=0x%016llX\n",
+		priv->smba + ISMT_MSTR_MDBA,
+		(long long unsigned int)readq(priv->smba + ISMT_MSTR_MDBA));
+	dev_dbg(dev, "  MCTRL.... : (0x%p)=0x%X\n",
+		priv->smba + ISMT_MSTR_MCTRL,
+		readl(priv->smba + ISMT_MSTR_MCTRL));
+	dev_dbg(dev, "  MSTS..... : (0x%p)=0x%X\n",
+		priv->smba + ISMT_MSTR_MSTS,
+		readl(priv->smba + ISMT_MSTR_MSTS));
+	dev_dbg(dev, "  MDS...... : (0x%p)=0x%X\n",
+		priv->smba + ISMT_MSTR_MDS,
+		readl(priv->smba + ISMT_MSTR_MDS));
+	dev_dbg(dev, "  RPOLICY.. : (0x%p)=0x%X\n",
+		priv->smba + ISMT_MSTR_RPOLICY,
+		readl(priv->smba + ISMT_MSTR_RPOLICY));
+	dev_dbg(dev, "  SPGT..... : (0x%p)=0x%X\n",
+		priv->smba + ISMT_SPGT,
+		readl(priv->smba + ISMT_SPGT));
+}
+
+/**
+ * ismt_submit_desc() - add a descriptor to the ring
+ * @priv: iSMT private data
+ */
+static void ismt_submit_desc(struct ismt_priv *priv)
+{
+	uint fmhp;
+	uint val;
+
+	ismt_desc_dump(priv);
+	ismt_gen_reg_dump(priv);
+	ismt_mstr_reg_dump(priv);
+
+	/* Set the FMHP (Firmware Master Head Pointer)*/
+	fmhp = ((priv->head + 1) % ISMT_DESC_ENTRIES) << 16;
+	val = readl(priv->smba + ISMT_MSTR_MCTRL);
+	writel((val & ~ISMT_MCTRL_FMHP) | fmhp,
+	       priv->smba + ISMT_MSTR_MCTRL);
+
+	/* Set the start bit */
+	val = readl(priv->smba + ISMT_MSTR_MCTRL);
+	writel(val | ISMT_MCTRL_SS,
+	       priv->smba + ISMT_MSTR_MCTRL);
+}
+
+/**
+ * ismt_process_desc() - handle the completion of the descriptor
+ * @desc: the iSMT hardware descriptor
+ * @data: data buffer from the upper layer
+ * @priv: ismt_priv struct holding our dma buffer
+ * @size: SMBus transaction type
+ * @read_write: flag to indicate if this is a read or write
+ */
+static int ismt_process_desc(const struct ismt_desc *desc,
+			     union i2c_smbus_data *data,
+			     struct ismt_priv *priv, int size,
+			     char read_write)
+{
+	u8 *dma_buffer = PTR_ALIGN(&priv->buffer[0], 16);
+
+	dev_dbg(&priv->pci_dev->dev, "Processing completed descriptor\n");
+	__ismt_desc_dump(&priv->pci_dev->dev, desc);
+	ismt_gen_reg_dump(priv);
+	ismt_mstr_reg_dump(priv);
+
+	if (desc->status & ISMT_DESC_SCS) {
+		if (read_write == I2C_SMBUS_WRITE &&
+		    size != I2C_SMBUS_PROC_CALL &&
+		    size != I2C_SMBUS_BLOCK_PROC_CALL)
+			return 0;
+
+		switch (size) {
+		case I2C_SMBUS_BYTE:
+		case I2C_SMBUS_BYTE_DATA:
+			data->byte = dma_buffer[0];
+			break;
+		case I2C_SMBUS_WORD_DATA:
+		case I2C_SMBUS_PROC_CALL:
+			data->word = dma_buffer[0] | (dma_buffer[1] << 8);
+			break;
+		case I2C_SMBUS_BLOCK_DATA:
+		case I2C_SMBUS_BLOCK_PROC_CALL:
+			if (desc->rxbytes != dma_buffer[0] + 1)
+				return -EMSGSIZE;
+
+			memcpy(data->block, dma_buffer, desc->rxbytes);
+			break;
+		case I2C_SMBUS_I2C_BLOCK_DATA:
+			memcpy(&data->block[1], dma_buffer, desc->rxbytes);
+			data->block[0] = desc->rxbytes;
+			break;
+		}
+		return 0;
+	}
+
+	if (likely(desc->status & ISMT_DESC_NAK))
+		return -ENXIO;
+
+	if (desc->status & ISMT_DESC_CRC)
+		return -EBADMSG;
+
+	if (desc->status & ISMT_DESC_COL)
+		return -EAGAIN;
+
+	if (desc->status & ISMT_DESC_LPR)
+		return -EPROTO;
+
+	if (desc->status & (ISMT_DESC_DLTO | ISMT_DESC_CLTO))
+		return -ETIMEDOUT;
+
+	return -EIO;
+}
+
+static void ismt_setscl(struct ismt_priv *priv, unsigned int level)
+{
+    int pin_status;
+
+    pin_status = readl(priv->smba + ISMT_DBCTRL);
+    if (level == 0) {
+        pin_status &= (~ISMT_DBCTRL_CLK_CTL);
+    } else {
+        pin_status |= ISMT_DBCTRL_CLK_CTL;
+    }
+    writel(pin_status, priv->smba + ISMT_DBCTRL);
+    pin_status = readl(priv->smba + ISMT_DBCTRL);
+    dev_dbg(&priv->pci_dev->dev, "dbctrl status = 0x%04x\r\n", pin_status);
+    return;
+}
+
+static void ismt_i2c_unblock(struct ismt_priv *priv)
+{
+    int i;
+    int pin_status, ori_status;
+
+    pin_status = readl(priv->smba + ISMT_DBCTRL);
+    ori_status = pin_status;
+    if ((pin_status & ISMT_DBCTRL_ENABLE) == 0) {
+        pin_status |= ISMT_DBCTRL_ENABLE;
+        writel(pin_status, priv->smba + ISMT_DBCTRL);
+        pin_status = readl(priv->smba + ISMT_DBCTRL);
+        dev_dbg(&priv->pci_dev->dev, "enable dbctrl pin status = 0x%04x\r\n", pin_status);
+    }
+
+    for (i = 0; i < 10; i++) {
+        ismt_setscl(priv, 0);
+        udelay(5);
+        ismt_setscl(priv, 1);
+        udelay(5);
+    }
+
+    pin_status = readl(priv->smba + ISMT_DBCTRL);
+    if (pin_status != ori_status) {
+        writel(ori_status, priv->smba + ISMT_DBCTRL);
+        pin_status = readl(priv->smba + ISMT_DBCTRL);
+        dev_dbg(&priv->pci_dev->dev, "reback dbctrl pin status = 0x%04x\r\n", pin_status);
+    }
+
+    return;
+}
+
+static int ismt_check_i2c_unblock(struct ismt_priv *priv)
+{
+    int pin_status;
+
+    pin_status = readl(priv->smba + ISMT_DBSTS);
+
+    if ( (!(pin_status & ISMT_DBSTS_SDA_STS) ) && (pin_status & ISMT_DBSTS_CLK_STS) ) {
+        dev_dbg(&priv->pci_dev->dev, "SDA is low, send 9 clock to device!\n");
+        ismt_i2c_unblock(priv);
+    }
+    return 0;
+}
+
+static int ismt_check_i2c_scl(struct ismt_priv *priv)
+{
+    int pin_status;
+
+    pin_status = readl(priv->smba + ISMT_DBSTS);
+
+    if ( (pin_status & ISMT_DBSTS_SDA_STS) && (pin_status & ISMT_DBSTS_CLK_STS) ) {
+        return 0;
+    }
+
+    dev_warn(&priv->pci_dev->dev, "SDA or SCL is low.pin_status:0x%x\n", pin_status);
+    return -1;
+}
+
+/* Make sure the SMBus host is ready to start transmitting.
+   Return 0 if it is, -EIO if it is not. */
+static int ismt_check_pre(struct ismt_priv *priv)
+{
+    ismt_check_i2c_unblock(priv);
+
+    /* SDA or SCL is low, return -EIO */
+    if (ismt_check_i2c_scl(priv)) {
+        return -EIO;
+    }
+
+    return 0;
+}
+
+/**
+ * ismt_access() - process an SMBus command
+ * @adap: the i2c host adapter
+ * @addr: address of the i2c/SMBus target
+ * @flags: command options
+ * @read_write: read from or write to device
+ * @command: the i2c/SMBus command to issue
+ * @size: SMBus transaction type
+ * @data: read/write data buffer
+ */
+static int ismt_access(struct i2c_adapter *adap, u16 addr,
+		       unsigned short flags, char read_write, u8 command,
+		       int size, union i2c_smbus_data *data)
+{
+	int ret;
+	unsigned long time_left;
+	dma_addr_t dma_addr = 0; /* address of the data buffer */
+	u8 dma_size = 0;
+	enum dma_data_direction dma_direction = 0;
+	struct ismt_desc *desc;
+	struct ismt_priv *priv = i2c_get_adapdata(adap);
+	struct device *dev = &priv->pci_dev->dev;
+	u8 *dma_buffer = PTR_ALIGN(&priv->buffer[0], 16);
+
+	ret = ismt_check_pre(priv);
+	if (ret < 0) {
+		return ret;
+	}
+
+	desc = &priv->hw[priv->head];
+
+	/* Initialize the DMA buffer */
+	mem_clear(priv->buffer, sizeof(priv->buffer));
+
+	/* Initialize the descriptor */
+	mem_clear(desc, sizeof(struct ismt_desc));
+	desc->tgtaddr_rw = ISMT_DESC_ADDR_RW(addr, read_write);
+
+	/* Always clear the log entries */
+	mem_clear(priv->log, ISMT_LOG_ENTRIES * sizeof(u32));
+
+	/* Initialize common control bits */
+	if (likely(pci_dev_msi_enabled(priv->pci_dev)))
+		desc->control = ISMT_DESC_INT | ISMT_DESC_FAIR;
+	else
+		desc->control = ISMT_DESC_FAIR;
+
+	if ((flags & I2C_CLIENT_PEC) && (size != I2C_SMBUS_QUICK)
+	    && (size != I2C_SMBUS_I2C_BLOCK_DATA))
+		desc->control |= ISMT_DESC_PEC;
+
+	switch (size) {
+	case I2C_SMBUS_QUICK:
+		dev_dbg(dev, "I2C_SMBUS_QUICK\n");
+		break;
+
+	case I2C_SMBUS_BYTE:
+		if (read_write == I2C_SMBUS_WRITE) {
+			/*
+			 * Send Byte
+			 * The command field contains the write data
+			 */
+			dev_dbg(dev, "I2C_SMBUS_BYTE:  WRITE\n");
+			desc->control |= ISMT_DESC_CWRL;
+			desc->wr_len_cmd = command;
+		} else {
+			/* Receive Byte */
+			dev_dbg(dev, "I2C_SMBUS_BYTE:  READ\n");
+			dma_size = 1;
+			dma_direction = DMA_FROM_DEVICE;
+			desc->rd_len = 1;
+		}
+		break;
+
+	case I2C_SMBUS_BYTE_DATA:
+		if (read_write == I2C_SMBUS_WRITE) {
+			/*
+			 * Write Byte
+			 * Command plus 1 data byte
+			 */
+			dev_dbg(dev, "I2C_SMBUS_BYTE_DATA:  WRITE\n");
+			desc->wr_len_cmd = 2;
+			dma_size = 2;
+			dma_direction = DMA_TO_DEVICE;
+			dma_buffer[0] = command;
+			dma_buffer[1] = data->byte;
+		} else {
+			/* Read Byte */
+			dev_dbg(dev, "I2C_SMBUS_BYTE_DATA:  READ\n");
+			desc->control |= ISMT_DESC_CWRL;
+			desc->wr_len_cmd = command;
+			desc->rd_len = 1;
+			dma_size = 1;
+			dma_direction = DMA_FROM_DEVICE;
+		}
+		break;
+
+	case I2C_SMBUS_WORD_DATA:
+		if (read_write == I2C_SMBUS_WRITE) {
+			/* Write Word */
+			dev_dbg(dev, "I2C_SMBUS_WORD_DATA:  WRITE\n");
+			desc->wr_len_cmd = 3;
+			dma_size = 3;
+			dma_direction = DMA_TO_DEVICE;
+			dma_buffer[0] = command;
+			dma_buffer[1] = data->word & 0xff;
+			dma_buffer[2] = data->word >> 8;
+		} else {
+			/* Read Word */
+			dev_dbg(dev, "I2C_SMBUS_WORD_DATA:  READ\n");
+			desc->wr_len_cmd = command;
+			desc->control |= ISMT_DESC_CWRL;
+			desc->rd_len = 2;
+			dma_size = 2;
+			dma_direction = DMA_FROM_DEVICE;
+		}
+		break;
+
+	case I2C_SMBUS_PROC_CALL:
+		dev_dbg(dev, "I2C_SMBUS_PROC_CALL\n");
+		desc->wr_len_cmd = 3;
+		desc->rd_len = 2;
+		dma_size = 3;
+		dma_direction = DMA_BIDIRECTIONAL;
+		dma_buffer[0] = command;
+		dma_buffer[1] = data->word & 0xff;
+		dma_buffer[2] = data->word >> 8;
+		break;
+
+	case I2C_SMBUS_BLOCK_DATA:
+		if (read_write == I2C_SMBUS_WRITE) {
+			/* Block Write */
+			dev_dbg(dev, "I2C_SMBUS_BLOCK_DATA:  WRITE\n");
+			if (data->block[0] < 1 || data->block[0] > I2C_SMBUS_BLOCK_MAX)
+				return -EINVAL;
+
+			dma_size = data->block[0] + 1;
+			dma_direction = DMA_TO_DEVICE;
+			desc->wr_len_cmd = dma_size;
+			desc->control |= ISMT_DESC_BLK;
+			dma_buffer[0] = command;
+			memcpy(&dma_buffer[1], &data->block[1], dma_size - 1);
+		} else {
+			/* Block Read */
+			dev_dbg(dev, "I2C_SMBUS_BLOCK_DATA:  READ\n");
+			dma_size = I2C_SMBUS_BLOCK_MAX;
+			dma_direction = DMA_FROM_DEVICE;
+			desc->rd_len = dma_size;
+			desc->wr_len_cmd = command;
+			desc->control |= (ISMT_DESC_BLK | ISMT_DESC_CWRL);
+		}
+		break;
+
+	case I2C_SMBUS_BLOCK_PROC_CALL:
+		dev_dbg(dev, "I2C_SMBUS_BLOCK_PROC_CALL\n");
+		if (data->block[0] > I2C_SMBUS_BLOCK_MAX)
+			return -EINVAL;
+
+		dma_size = I2C_SMBUS_BLOCK_MAX;
+		desc->tgtaddr_rw = ISMT_DESC_ADDR_RW(addr, 1);
+		desc->wr_len_cmd = data->block[0] + 1;
+		desc->rd_len = dma_size;
+		desc->control |= ISMT_DESC_BLK;
+		dma_direction = DMA_BIDIRECTIONAL;
+		dma_buffer[0] = command;
+		memcpy(&dma_buffer[1], &data->block[1], data->block[0]);
+		break;
+
+	case I2C_SMBUS_I2C_BLOCK_DATA:
+		/* Make sure the length is valid */
+		if (data->block[0] < 1)
+			data->block[0] = 1;
+
+		if (data->block[0] > I2C_SMBUS_BLOCK_MAX)
+			data->block[0] = I2C_SMBUS_BLOCK_MAX;
+
+		if (read_write == I2C_SMBUS_WRITE) {
+			/* i2c Block Write */
+			dev_dbg(dev, "I2C_SMBUS_I2C_BLOCK_DATA:  WRITE\n");
+			dma_size = data->block[0] + 1;
+			dma_direction = DMA_TO_DEVICE;
+			desc->wr_len_cmd = dma_size;
+			desc->control |= ISMT_DESC_I2C;
+			dma_buffer[0] = command;
+			memcpy(&dma_buffer[1], &data->block[1], dma_size - 1);
+		} else {
+			/* i2c Block Read */
+			dev_dbg(dev, "I2C_SMBUS_I2C_BLOCK_DATA:  READ\n");
+			dma_size = data->block[0];
+			dma_direction = DMA_FROM_DEVICE;
+			desc->rd_len = dma_size;
+			desc->wr_len_cmd = command;
+			desc->control |= (ISMT_DESC_I2C | ISMT_DESC_CWRL);
+			/*
+			 * Per the "Table 15-15. I2C Commands",
+			 * in the External Design Specification (EDS),
+			 * (Document Number: 508084, Revision: 2.0),
+			 * the _rw bit must be 0
+			 */
+			desc->tgtaddr_rw = ISMT_DESC_ADDR_RW(addr, 0);
+		}
+		break;
+
+	default:
+		dev_err(dev, "Unsupported transaction %d\n",
+			size);
+		return -EOPNOTSUPP;
+	}
+
+	/* map the data buffer */
+	if (dma_size != 0) {
+		dev_dbg(dev, " dev=%p\n", dev);
+		dev_dbg(dev, " data=%p\n", data);
+		dev_dbg(dev, " dma_buffer=%p\n", dma_buffer);
+		dev_dbg(dev, " dma_size=%d\n", dma_size);
+		dev_dbg(dev, " dma_direction=%d\n", dma_direction);
+
+		dma_addr = dma_map_single(dev,
+				      dma_buffer,
+				      dma_size,
+				      dma_direction);
+
+		if (dma_mapping_error(dev, dma_addr)) {
+			dev_err(dev, "Error in mapping dma buffer %p\n",
+				dma_buffer);
+			return -EIO;
+		}
+
+		dev_dbg(dev, " dma_addr = %pad\n", &dma_addr);
+
+		desc->dptr_low = lower_32_bits(dma_addr);
+		desc->dptr_high = upper_32_bits(dma_addr);
+	}
+
+	reinit_completion(&priv->cmp);
+
+	/* Add the descriptor */
+	ismt_submit_desc(priv);
+
+	/* Now we wait for interrupt completion, 1s */
+	time_left = wait_for_completion_timeout(&priv->cmp, HZ*1);
+
+	/* unmap the data buffer */
+	if (dma_size != 0)
+		dma_unmap_single(dev, dma_addr, dma_size, dma_direction);
+
+	if (unlikely(!time_left)) {
+		dev_warn(dev, "completion wait timed out:addr[%d-0x%x], read_write[%d], command[0x%x], size[%d]\n",
+					adap->nr, addr, read_write, command, size);
+		ismt_reset_dma(priv);
+		ret = -ETIMEDOUT;
+		priv->head = 0;
+		return ret;
+	}
+
+	/* do any post processing of the descriptor here */
+	ret = ismt_process_desc(desc, data, priv, size, read_write);
+
+	/* Update the ring pointer */
+	priv->head++;
+	priv->head %= ISMT_DESC_ENTRIES;
+
+	return ret;
+}
+
+/**
+ * ismt_func() - report which i2c commands are supported by this adapter
+ * @adap: the i2c host adapter
+ */
+static u32 ismt_func(struct i2c_adapter *adap)
+{
+	return I2C_FUNC_SMBUS_QUICK		|
+	       I2C_FUNC_SMBUS_BYTE		|
+	       I2C_FUNC_SMBUS_BYTE_DATA		|
+	       I2C_FUNC_SMBUS_WORD_DATA		|
+	       I2C_FUNC_SMBUS_PROC_CALL		|
+	       I2C_FUNC_SMBUS_BLOCK_PROC_CALL	|
+	       I2C_FUNC_SMBUS_BLOCK_DATA	|
+	       I2C_FUNC_SMBUS_I2C_BLOCK		|
+	       I2C_FUNC_SMBUS_PEC;
+}
+
+static const struct i2c_algorithm smbus_algorithm = {
+	.smbus_xfer	= ismt_access,
+	.functionality	= ismt_func,
+};
+
+/**
+ * ismt_handle_isr() - interrupt handler bottom half
+ * @priv: iSMT private data
+ */
+static irqreturn_t ismt_handle_isr(struct ismt_priv *priv)
+{
+	complete(&priv->cmp);
+
+	return IRQ_HANDLED;
+}
+
+
+/**
+ * ismt_do_interrupt() - IRQ interrupt handler
+ * @vec: interrupt vector
+ * @data: iSMT private data
+ */
+static irqreturn_t ismt_do_interrupt(int vec, void *data)
+{
+	u32 val;
+	struct ismt_priv *priv = data;
+
+	/*
+	 * check to see it's our interrupt, return IRQ_NONE if not ours
+	 * since we are sharing interrupt
+	 */
+	val = readl(priv->smba + ISMT_MSTR_MSTS);
+
+	if (!(val & (ISMT_MSTS_MIS | ISMT_MSTS_MEIS)))
+		return IRQ_NONE;
+	else
+		writel(val | ISMT_MSTS_MIS | ISMT_MSTS_MEIS,
+		       priv->smba + ISMT_MSTR_MSTS);
+
+	return ismt_handle_isr(priv);
+}
+
+/**
+ * ismt_do_msi_interrupt() - MSI interrupt handler
+ * @vec: interrupt vector
+ * @data: iSMT private data
+ */
+static irqreturn_t ismt_do_msi_interrupt(int vec, void *data)
+{
+	return ismt_handle_isr(data);
+}
+
+/**
+ * ismt_hw_init() - initialize the iSMT hardware
+ * @priv: iSMT private data
+ */
+static void ismt_hw_init(struct ismt_priv *priv)
+{
+	u32 val;
+	struct device *dev = &priv->pci_dev->dev;
+
+	/* initialize the Master Descriptor Base Address (MDBA) */
+	writeq(priv->io_rng_dma, priv->smba + ISMT_MSTR_MDBA);
+
+	writeq(priv->log_dma, priv->smba + ISMT_GR_SMTICL);
+
+	/* initialize the Master Control Register (MCTRL) */
+	writel(ISMT_MCTRL_MEIE, priv->smba + ISMT_MSTR_MCTRL);
+
+	/* initialize the Master Status Register (MSTS) */
+	writel(0, priv->smba + ISMT_MSTR_MSTS);
+
+	/* initialize the Master Descriptor Size (MDS) */
+	val = readl(priv->smba + ISMT_MSTR_MDS);
+	writel((val & ~ISMT_MDS_MASK) | (ISMT_DESC_ENTRIES - 1),
+		priv->smba + ISMT_MSTR_MDS);
+
+	/*
+	 * Set the SMBus speed (could use this for slow HW debuggers)
+	 */
+
+	val = readl(priv->smba + ISMT_SPGT);
+
+	switch (bus_speed) {
+	case 0:
+		break;
+
+	case 80:
+		dev_dbg(dev, "Setting SMBus clock to 80 kHz\n");
+		writel(((val & ~ISMT_SPGT_SPD_MASK) | ISMT_SPGT_SPD_80K),
+			priv->smba + ISMT_SPGT);
+		break;
+
+	case 100:
+		dev_dbg(dev, "Setting SMBus clock to 100 kHz\n");
+		writel(((val & ~ISMT_SPGT_SPD_MASK) | ISMT_SPGT_SPD_100K),
+			priv->smba + ISMT_SPGT);
+		break;
+
+	case 400:
+		dev_dbg(dev, "Setting SMBus clock to 400 kHz\n");
+		writel(((val & ~ISMT_SPGT_SPD_MASK) | ISMT_SPGT_SPD_400K),
+			priv->smba + ISMT_SPGT);
+		break;
+
+	case 1000:
+		dev_dbg(dev, "Setting SMBus clock to 1000 kHz\n");
+		writel(((val & ~ISMT_SPGT_SPD_MASK) | ISMT_SPGT_SPD_1M),
+			priv->smba + ISMT_SPGT);
+		break;
+
+	default:
+		dev_warn(dev, "Invalid SMBus clock speed, only 0, 80, 100, 400, and 1000 are valid\n");
+		break;
+	}
+
+	val = readl(priv->smba + ISMT_SPGT);
+
+	switch (val & ISMT_SPGT_SPD_MASK) {
+	case ISMT_SPGT_SPD_80K:
+		bus_speed = 80;
+		break;
+	case ISMT_SPGT_SPD_100K:
+		bus_speed = 100;
+		break;
+	case ISMT_SPGT_SPD_400K:
+		bus_speed = 400;
+		break;
+	case ISMT_SPGT_SPD_1M:
+		bus_speed = 1000;
+		break;
+	}
+	dev_dbg(dev, "SMBus clock is running at %d kHz\n", bus_speed);
+}
+
+/**
+ * ismt_dev_init() - initialize the iSMT data structures
+ * @priv: iSMT private data
+ */
+static int ismt_dev_init(struct ismt_priv *priv)
+{
+	/* allocate memory for the descriptor */
+	priv->hw = dmam_alloc_coherent(&priv->pci_dev->dev,
+				       (ISMT_DESC_ENTRIES
+					       * sizeof(struct ismt_desc)),
+				       &priv->io_rng_dma,
+				       GFP_KERNEL);
+	if (!priv->hw)
+		return -ENOMEM;
+
+	priv->head = 0;
+	init_completion(&priv->cmp);
+
+	priv->log = dmam_alloc_coherent(&priv->pci_dev->dev,
+					ISMT_LOG_ENTRIES * sizeof(u32),
+					&priv->log_dma, GFP_KERNEL);
+	if (!priv->log)
+		return -ENOMEM;
+
+	return 0;
+}
+
+/**
+ * ismt_int_init() - initialize interrupts
+ * @priv: iSMT private data
+ */
+static int ismt_int_init(struct ismt_priv *priv)
+{
+	int err;
+
+	/* Try using MSI interrupts */
+	err = pci_enable_msi(priv->pci_dev);
+	if (err)
+		goto intx;
+
+	err = devm_request_irq(&priv->pci_dev->dev,
+			       priv->pci_dev->irq,
+			       ismt_do_msi_interrupt,
+			       0,
+			       "ismt-msi",
+			       priv);
+	if (err) {
+		pci_disable_msi(priv->pci_dev);
+		goto intx;
+	}
+
+	return 0;
+
+	/* Try using legacy interrupts */
+intx:
+	dev_warn(&priv->pci_dev->dev,
+		 "Unable to use MSI interrupts, falling back to legacy\n");
+
+	err = devm_request_irq(&priv->pci_dev->dev,
+			       priv->pci_dev->irq,
+			       ismt_do_interrupt,
+			       IRQF_SHARED,
+			       "ismt-intx",
+			       priv);
+	if (err) {
+		dev_err(&priv->pci_dev->dev, "no usable interrupts\n");
+		return err;
+	}
+
+	return 0;
+}
+
+static struct pci_driver ismt_driver;
+
+/**
+ * ismt_probe() - probe for iSMT devices
+ * @pdev: PCI-Express device
+ * @id: PCI-Express device ID
+ */
+static int
+ismt_probe(struct pci_dev *pdev, const struct pci_device_id *id)
+{
+	int err;
+	struct ismt_priv *priv;
+	unsigned long start, len;
+
+	priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
+	if (!priv)
+		return -ENOMEM;
+
+	pci_set_drvdata(pdev, priv);
+
+	i2c_set_adapdata(&priv->adapter, priv);
+	priv->adapter.owner = THIS_MODULE;
+	priv->adapter.class = I2C_CLASS_HWMON;
+	priv->adapter.algo = &smbus_algorithm;
+	priv->adapter.dev.parent = &pdev->dev;
+	ACPI_COMPANION_SET(&priv->adapter.dev, ACPI_COMPANION(&pdev->dev));
+	priv->adapter.retries = ISMT_MAX_RETRIES;
+
+	priv->pci_dev = pdev;
+
+	err = pcim_enable_device(pdev);
+	if (err) {
+		dev_err(&pdev->dev, "Failed to enable SMBus PCI device (%d)\n",
+			err);
+		return err;
+	}
+
+	/* enable bus mastering */
+	pci_set_master(pdev);
+
+	/* Determine the address of the SMBus area */
+	start = pci_resource_start(pdev, SMBBAR);
+	len = pci_resource_len(pdev, SMBBAR);
+	if (!start || !len) {
+		dev_err(&pdev->dev,
+			"SMBus base address uninitialized, upgrade BIOS\n");
+		return -ENODEV;
+	}
+
+	snprintf(priv->adapter.name, sizeof(priv->adapter.name),
+		 "SMBus iSMT adapter at %lx", start);
+
+	dev_dbg(&priv->pci_dev->dev, " start=0x%lX\n", start);
+	dev_dbg(&priv->pci_dev->dev, " len=0x%lX\n", len);
+
+	err = acpi_check_resource_conflict(&pdev->resource[SMBBAR]);
+	if (err) {
+		dev_err(&pdev->dev, "ACPI resource conflict!\n");
+		return err;
+	}
+
+	err = pci_request_region(pdev, SMBBAR, ismt_driver.name);
+	if (err) {
+		dev_err(&pdev->dev,
+			"Failed to request SMBus region 0x%lx-0x%lx\n",
+			start, start + len);
+		return err;
+	}
+
+	priv->smba = pcim_iomap(pdev, SMBBAR, len);
+	if (!priv->smba) {
+		dev_err(&pdev->dev, "Unable to ioremap SMBus BAR\n");
+		return -ENODEV;
+	}
+
+	err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
+	if (err) {
+		dev_err(&pdev->dev, "dma_set_mask fail\n");
+		return -ENODEV;
+	}
+
+	err = ismt_dev_init(priv);
+	if (err)
+		return err;
+
+	ismt_hw_init(priv);
+
+	err = ismt_int_init(priv);
+	if (err)
+		return err;
+
+	err = i2c_add_adapter(&priv->adapter);
+	if (err)
+		return -ENODEV;
+    dev_info(&pdev->dev, "wb-i2c-ismt probe ok.\n");
+	return 0;
+}
+
+/**
+ * ismt_remove() - release driver resources
+ * @pdev: PCI-Express device
+ */
+static void ismt_remove(struct pci_dev *pdev)
+{
+	struct ismt_priv *priv = pci_get_drvdata(pdev);
+
+	i2c_del_adapter(&priv->adapter);
+}
+
+static struct pci_driver ismt_driver = {
+	.name = "wb_ismt_smbus",
+	.id_table = ismt_ids,
+	.probe = ismt_probe,
+	.remove = ismt_remove,
+};
+
+module_pci_driver(ismt_driver);
+
+MODULE_LICENSE("Dual BSD/GPL");
+MODULE_AUTHOR("Bill E. Brown <bill.e.brown@intel.com>");
+MODULE_DESCRIPTION("Intel SMBus Message Transport (iSMT) driver");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_mux_pca954x.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_mux_pca954x.c
new file mode 100644
index 000000000..854675d9f
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_mux_pca954x.c
@@ -0,0 +1,1387 @@
+/*
+ * I2C multiplexer
+ *
+ * Copyright (c) 2008-2009 Rodolfo Giometti <giometti@linux.it>
+ * Copyright (c) 2008-2009 Eurotech S.p.A. <info@eurotech.it>
+ *
+ * This module supports the PCA954x series of I2C multiplexer/switch chips
+ * made by Philips Semiconductors.
+ * This includes the:
+ *     PCA9540, PCA9542, PCA9543, PCA9544, PCA9545, PCA9546, PCA9547
+ *     and PCA9548.
+ *
+ * These chips are all controlled via the I2C bus itself, and all have a
+ * single 8-bit register. The upstream "parent" bus fans out to two,
+ * four, or eight downstream busses or channels; which of these
+ * are selected is determined by the chip type and register contents. A
+ * mux can select only one sub-bus at a time; a switch can select any
+ * combination simultaneously.
+ *
+ * Based on:
+ *    pca954x.c from Kumar Gala <galak@kernel.crashing.org>
+ * Copyright (C) 2006
+ *
+ * Based on:
+ *    pca954x.c from Ken Harrenstien
+ * Copyright (C) 2004 Google, Inc. (Ken Harrenstien)
+ *
+ * Based on:
+ *    i2c-virtual_cb.c from Brian Kuschak <bkuschak@yahoo.com>
+ * and
+ *    pca9540.c from Jean Delvare <jdelvare@suse.de>.
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include <linux/version.h>
+#include <linux/device.h>
+#include <linux/gpio/consumer.h>
+#include <linux/i2c.h>
+#include <linux/i2c-mux.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/of_device.h>
+#include <linux/of_irq.h>
+#include <linux/pm.h>
+#include <linux/slab.h>
+#include <linux/spinlock.h>
+#include <linux/delay.h>
+#include <linux/gpio.h>
+#include <linux/i2c-smbus.h>
+#include <linux/fs.h>
+#include <linux/uaccess.h>
+#include <linux/uio.h>
+
+#include "wb_i2c_mux_pca954x.h"
+
+#define PCA954X_MAX_NCHANS 8
+#define PCA954X_IRQ_OFFSET 4
+
+#define I2C_RETRY_TIMES         5
+#define I2C_RETRY_WAIT_TIMES    10      /*delay 10ms*/
+
+#define WIDTH_1Byte          (1)
+#define WIDTH_4Byte          (4)
+
+typedef struct pca9548_cfg_info_s {
+    uint32_t pca9548_base_nr;
+    uint32_t pca9548_reset_type;
+    uint32_t rst_delay_b; /* delay time before reset(us) */
+    uint32_t rst_delay;   /* reset time(us) */
+    uint32_t rst_delay_a; /* delay time after reset(us) */
+    union {
+        i2c_attr_t i2c_attr;
+        gpio_attr_t gpio_attr;
+        io_attr_t io_attr;
+        file_attr_t file_attr;
+    } attr;
+    bool select_chan_check;
+    bool close_chan_force_reset;
+} pca9548_cfg_info_t;
+
+int g_pca954x_debug = 0;
+int g_pca954x_error = 0;
+
+module_param(g_pca954x_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_pca954x_error, int, S_IRUGO | S_IWUSR);
+
+#define PCA954X_DEBUG(fmt, args...) do {                                        \
+    if (g_pca954x_debug) { \
+        printk(KERN_INFO "[PCA95x][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define PCA954X_ERROR(fmt, args...) do {                                        \
+    if (g_pca954x_error) { \
+        printk(KERN_ERR "[PCA95x][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+extern int pca9641_setmuxflag(int nr, int flag);
+enum pca_type {
+    pca_9540,
+    pca_9542,
+    pca_9543,
+    pca_9544,
+    pca_9545,
+    pca_9546,
+    pca_9547,
+    pca_9548,
+};
+
+struct chip_desc {
+    u8 nchans;
+    u8 enable;    /* used for muxes only */
+    u8 has_irq;
+    enum muxtype {
+        pca954x_ismux = 0,
+        pca954x_isswi
+    } muxtype;
+};
+
+struct pca954x {
+    const struct chip_desc *chip;
+    u8 last_chan;        /* last register value */
+    u8 deselect;
+    struct i2c_client *client;
+    struct irq_domain *irq;
+    unsigned int irq_mask;
+    raw_spinlock_t lock;
+    pca9548_cfg_info_t pca9548_cfg_info; /* pca9548 reset cfg */
+};
+
+/* Provide specs for the PCA954x types we know about */
+static const struct chip_desc chips[] = {
+    [pca_9540] = {
+        .nchans = 2,
+        .enable = 0x4,
+        .muxtype = pca954x_ismux,
+    },
+    [pca_9542] = {
+        .nchans = 2,
+        .enable = 0x4,
+        .has_irq = 1,
+        .muxtype = pca954x_ismux,
+    },
+    [pca_9543] = {
+        .nchans = 2,
+        .has_irq = 1,
+        .muxtype = pca954x_isswi,
+    },
+    [pca_9544] = {
+        .nchans = 4,
+        .enable = 0x4,
+        .has_irq = 1,
+        .muxtype = pca954x_ismux,
+    },
+    [pca_9545] = {
+        .nchans = 4,
+        .has_irq = 1,
+        .muxtype = pca954x_isswi,
+    },
+    [pca_9546] = {
+        .nchans = 4,
+        .muxtype = pca954x_isswi,
+    },
+    [pca_9547] = {
+        .nchans = 8,
+        .enable = 0x8,
+        .muxtype = pca954x_ismux,
+    },
+    [pca_9548] = {
+        .nchans = 8,
+        .muxtype = pca954x_isswi,
+    },
+};
+
+static const struct i2c_device_id pca954x_id[] = {
+    { "wb_pca9540", pca_9540 },
+    { "wb_pca9542", pca_9542 },
+    { "wb_pca9543", pca_9543 },
+    { "wb_pca9544", pca_9544 },
+    { "wb_pca9545", pca_9545 },
+    { "wb_pca9546", pca_9546 },
+    { "wb_pca9547", pca_9547 },
+    { "wb_pca9548", pca_9548 },
+    { }
+};
+MODULE_DEVICE_TABLE(i2c, pca954x_id);
+
+#ifdef CONFIG_OF
+static const struct of_device_id pca954x_of_match[] = {
+    { .compatible = "nxp,wb_pca9540", .data = &chips[pca_9540] },
+    { .compatible = "nxp,wb_pca9542", .data = &chips[pca_9542] },
+    { .compatible = "nxp,wb_pca9543", .data = &chips[pca_9543] },
+    { .compatible = "nxp,wb_pca9544", .data = &chips[pca_9544] },
+    { .compatible = "nxp,wb_pca9545", .data = &chips[pca_9545] },
+    { .compatible = "nxp,wb_pca9546", .data = &chips[pca_9546] },
+    { .compatible = "nxp,wb_pca9547", .data = &chips[pca_9547] },
+    { .compatible = "nxp,wb_pca9548", .data = &chips[pca_9548] },
+    {}
+};
+MODULE_DEVICE_TABLE(of, pca954x_of_match);
+#endif
+
+/* Write to mux register. Don't use i2c_transfer()/i2c_smbus_xfer()
+   for this as they will try to lock adapter a second time */
+static int pca954x_reg_write(struct i2c_adapter *adap,
+                 struct i2c_client *client, u8 val)
+{
+    int ret = -ENODEV;
+
+    if (adap->algo->master_xfer) {
+        struct i2c_msg msg;
+        char buf[1];
+
+        msg.addr = client->addr;
+        msg.flags = 0;
+        msg.len = 1;
+        buf[0] = val;
+        msg.buf = buf;
+        ret = __i2c_transfer(adap, &msg, 1);
+
+        if (ret >= 0 && ret != 1)
+            ret = -EREMOTEIO;
+    } else {
+        union i2c_smbus_data data;
+        ret = adap->algo->smbus_xfer(adap, client->addr,
+                         client->flags,
+                         I2C_SMBUS_WRITE,
+                         val, I2C_SMBUS_BYTE, &data);
+    }
+    return ret;
+}
+
+static int pca954x_reg_read(struct i2c_adapter *adap,
+                 struct i2c_client *client, u8 *val)
+{
+    int ret = -ENODEV;
+    u8 tmp_val;
+
+    if (adap->algo->master_xfer) {
+        struct i2c_msg msg;
+
+        msg.addr = client->addr;
+        msg.flags = I2C_M_RD;
+        msg.len = 1;
+        msg.buf = &tmp_val;
+        ret = __i2c_transfer(adap, &msg, 1);
+
+        if (ret >= 0 && ret != 1) {
+            ret = -EREMOTEIO;
+        } else {
+            *val = tmp_val;
+        }
+    } else {
+        union i2c_smbus_data data;
+        ret = adap->algo->smbus_xfer(adap, client->addr,
+                         client->flags,
+                         I2C_SMBUS_READ,
+                         0, I2C_SMBUS_BYTE, &data);
+
+        if (!ret) {
+            tmp_val = data.byte;
+            *val = tmp_val;
+        }
+    }
+
+    return ret;
+}
+
+static int pca954x_setmuxflag(struct i2c_client *client, int flag)
+{
+    int ret;
+    struct i2c_adapter *adap = to_i2c_adapter(client->dev.parent);
+
+    ret = pca9641_setmuxflag(adap->nr, flag);
+    return ret;
+}
+
+static int pca9548_gpio_init(gpio_attr_t *gpio_attr)
+{
+    int err;
+
+    if (gpio_attr->gpio_init) {
+        PCA954X_DEBUG("gpio%d already init, do nothing.\n", gpio_attr->gpio);
+        return 0;
+    }
+
+    PCA954X_DEBUG("gpio%d init.\n", gpio_attr->gpio);
+    err = gpio_request(gpio_attr->gpio, "pca9548_reset");
+    if (err) {
+        goto error;
+    }
+    err = gpio_direction_output(gpio_attr->gpio, gpio_attr->reset_off);
+    if (err) {
+        gpio_free(gpio_attr->gpio);
+        goto error;
+    }
+    gpio_attr->gpio_init = 1;
+    return 0;
+error:
+    PCA954X_ERROR("pca9548_gpio_init failed, ret:%d.\n", err);
+    return err;
+}
+
+static void pca9548_gpio_free(gpio_attr_t *gpio_attr)
+{
+    if (gpio_attr->gpio_init == 1) {
+        PCA954X_DEBUG("gpio%d release.\n", gpio_attr->gpio);
+        gpio_free(gpio_attr->gpio);
+        gpio_attr->gpio_init = 0;
+    }
+}
+
+static int pca954x_reset_file_read(const char *path, uint32_t pos, uint8_t *val, size_t size)
+{
+    int ret;
+    struct file *filp;
+    loff_t tmp_pos;
+
+    struct kvec iov = {
+        .iov_base = val,
+        .iov_len = min_t(size_t, size, MAX_RW_COUNT),
+    };
+    struct iov_iter iter;
+
+    filp = filp_open(path, O_RDONLY, 0);
+    if (IS_ERR(filp)) {
+        PCA954X_ERROR("read open failed errno = %ld\r\n", -PTR_ERR(filp));
+        filp = NULL;
+        goto exit;
+    }
+
+    tmp_pos = (loff_t)pos;
+    iov_iter_kvec(&iter, ITER_DEST, &iov, 1, iov.iov_len);
+    ret = vfs_iter_read(filp, &iter, &tmp_pos, 0);
+    if (ret < 0) {
+        PCA954X_ERROR("vfs_iter_read failed, path=%s, addr=0x%x, size=%ld, ret=%d\r\n", path, pos, size, ret);
+        goto exit;
+    }
+
+    filp_close(filp, NULL);
+
+    return ret;
+
+exit:
+    if (filp != NULL) {
+        filp_close(filp, NULL);
+    }
+
+    return -1;
+}
+
+static int pca954x_reset_file_write(const char *path, uint32_t pos, uint8_t *val, size_t size)
+{
+    int ret;
+    struct file *filp;
+    loff_t tmp_pos;
+
+    struct kvec iov = {
+        .iov_base = val,
+        .iov_len = min_t(size_t, size, MAX_RW_COUNT),
+    };
+    struct iov_iter iter;
+
+    filp = filp_open(path, O_RDWR, 777);
+    if (IS_ERR(filp)) {
+        PCA954X_ERROR("write open failed errno = %ld\r\n", -PTR_ERR(filp));
+        filp = NULL;
+        goto exit;
+    }
+
+    tmp_pos = (loff_t)pos;
+    iov_iter_kvec(&iter, ITER_SOURCE, &iov, 1, iov.iov_len);
+    ret = vfs_iter_write(filp, &iter, &tmp_pos, 0);
+    if (ret < 0) {
+        PCA954X_ERROR("vfs_iter_write failed, path=%s, addr=0x%x, size=%ld, ret=%d\r\n", path, pos, size, ret);
+        goto exit;
+    }
+
+    vfs_fsync(filp, 1);
+    filp_close(filp, NULL);
+
+    return ret;
+
+exit:
+    if (filp != NULL) {
+        filp_close(filp, NULL);
+    }
+
+    return -1;
+}
+
+static int pca954x_reset_i2c_read(uint32_t bus, uint32_t addr, uint32_t offset_addr,
+            unsigned char *buf, uint32_t size)
+{
+    struct file *fp;
+    struct i2c_client client;
+    char i2c_path[32];
+    int i ,j ;
+    int rv;
+
+    rv = 0;
+    mem_clear(i2c_path, sizeof(i2c_path));
+    snprintf(i2c_path, sizeof(i2c_path), "/dev/i2c-%d", bus);
+    fp = filp_open(i2c_path, O_RDWR, S_IRUSR | S_IWUSR);
+    if (IS_ERR(fp)) {
+        PCA954X_ERROR("i2c open fail.\n");
+        return -1;
+    }
+    memcpy(&client, fp->private_data, sizeof(struct i2c_client));
+    client.addr = addr;
+    for (j = 0 ;j < size ;j++) {
+        for (i = 0; i < I2C_RETRY_TIMES; i++) {
+            rv = i2c_smbus_read_byte_data(&client, (offset_addr + j));
+            if (rv < 0) {
+                PCA954X_ERROR("i2c read failed, try again.\n");
+                msleep(I2C_RETRY_WAIT_TIMES);
+                if (i >= (I2C_RETRY_TIMES - 1)) {
+                    goto out;
+                }
+                continue;
+          }
+          *(buf + j) = (unsigned char)rv;
+          break;
+        }
+    }
+out:
+    filp_close(fp, NULL);
+    return rv;
+}
+
+static int pca954x_reset_i2c_write(uint32_t bus, uint32_t dev_addr, uint32_t offset_addr,
+            uint8_t write_buf)
+{
+    struct file *fp;
+    struct i2c_client client;
+    char i2c_path[32];
+    int i;
+    int rv;
+
+    rv = 0;
+    mem_clear(i2c_path, sizeof(i2c_path));
+    snprintf(i2c_path, sizeof(i2c_path), "/dev/i2c-%d", bus);
+    fp = filp_open(i2c_path, O_RDWR, S_IRUSR | S_IWUSR);
+    if (IS_ERR(fp)) {
+        PCA954X_ERROR("i2c open fail.\n");
+        return -1;
+    }
+    memcpy(&client, fp->private_data, sizeof(struct i2c_client));
+    client.addr = dev_addr;
+    for (i = 0; i < I2C_RETRY_TIMES; i++) {
+        rv = i2c_smbus_write_byte_data(&client, offset_addr, write_buf);
+        if (rv < 0) {
+            PCA954X_ERROR("i2c write failed, try again.\n");
+            msleep(I2C_RETRY_WAIT_TIMES);
+            if (i >= (I2C_RETRY_TIMES - 1)) {
+                goto out;
+            }
+            continue;
+        }
+        break;
+    }
+out:
+    filp_close(fp, NULL);
+    return rv;
+}
+
+static int pca954x_do_file_reset(struct i2c_mux_core *muxc)
+{
+    int ret, timeout, err;
+    struct pca954x *data;
+    pca9548_cfg_info_t *reset_cfg;
+    file_attr_t *file_attr;
+    int udelay_cnt;
+    uint8_t read_value[4], write_reset_on_value[4], write_reset_off_value[4];
+    uint8_t tmp_read8;
+    uint32_t tmp_read32, tmp_write32;
+
+
+    data = i2c_mux_priv(muxc);
+    reset_cfg = &data->pca9548_cfg_info;
+    file_attr = &reset_cfg->attr.file_attr;
+    ret = -1;
+
+    PCA954X_DEBUG("rst_delay_b:%u, rst_delay:%u, rst_delay_a:%u.\n",
+        reset_cfg->rst_delay_b, reset_cfg->rst_delay, reset_cfg->rst_delay_a);
+    PCA954X_DEBUG("dev_name:%s, offset:0x%x, mask:0x%x, on:0x%x, off:0x%x, width: %u\n",
+        file_attr->dev_name, file_attr->offset, file_attr->mask,
+        file_attr->reset_on, file_attr->reset_off, file_attr->width);
+
+    if (reset_cfg->rst_delay_b) {
+        usleep_range(reset_cfg->rst_delay_b, reset_cfg->rst_delay_b + 1);
+    }
+
+    mem_clear(read_value, sizeof(read_value));
+    mem_clear(write_reset_on_value, sizeof(write_reset_on_value));
+    mem_clear(write_reset_off_value, sizeof(write_reset_off_value));
+    err = pca954x_reset_file_read(file_attr->dev_name, file_attr->offset, read_value, file_attr->width);
+    if (err < 0) {
+        goto out;
+    }
+
+    if (file_attr->width == WIDTH_1Byte) {
+        tmp_read8 = read_value[0];
+        write_reset_on_value[0] = ((tmp_read8 & (~file_attr->mask)) | file_attr->reset_on) & 0xFF;
+        write_reset_off_value[0] = ((tmp_read8 & (~file_attr->mask)) | file_attr->reset_off) & 0xFF;
+        PCA954X_DEBUG("1 byte write reset on val[0]: 0x%x, write reset off valu[0]: 0x%x\n",
+            write_reset_on_value[0], write_reset_off_value[0]);
+    } else {
+        memcpy((uint8_t *)&tmp_read32, read_value, 4);
+        tmp_write32 = (tmp_read32 & (~file_attr->mask)) | file_attr->reset_on;
+        memcpy(write_reset_on_value, (uint8_t *)&tmp_write32, 4);
+        tmp_write32 = (tmp_read32 & (~file_attr->mask)) | file_attr->reset_off;
+        memcpy(write_reset_off_value, (uint8_t *)&tmp_write32, 4);
+        PCA954X_DEBUG("4 byte write reset on val[0]:0x%x, val[1]:0x%x, val[2]:0x%x, val[3]:0x%x",
+            write_reset_on_value[0], write_reset_on_value[1], write_reset_on_value[2], write_reset_on_value[3]);
+        PCA954X_DEBUG("4 byte write reset off val[0]:0x%x, val[1]:0x%x, val[2]:0x%x, val[3]:0x%x",
+            write_reset_off_value[0], write_reset_off_value[1], write_reset_off_value[2], write_reset_off_value[3]);
+    }
+
+    err = pca954x_reset_file_write(file_attr->dev_name, file_attr->offset, write_reset_on_value, file_attr->width);
+    if (err < 0) {
+        goto out;
+    }
+
+    if (reset_cfg->rst_delay) {
+        usleep_range(reset_cfg->rst_delay, reset_cfg->rst_delay + 1);
+    }
+
+    err = pca954x_reset_file_write(file_attr->dev_name, file_attr->offset, write_reset_off_value, file_attr->width);
+    if (err < 0) {
+        goto out;
+    }
+
+    udelay_cnt = 0;
+    timeout = reset_cfg->rst_delay_a;
+    while (timeout > 0) {
+        usleep_range(1, 2);
+        err = pca954x_reset_file_read(file_attr->dev_name, file_attr->offset, read_value, file_attr->width);
+        if (err < 0) {
+            goto out;
+        }
+        if (file_attr->width == WIDTH_1Byte) {
+            tmp_read32 = read_value[0];
+        } else {
+            memcpy((uint8_t *)&tmp_read32, read_value, 4);
+        }
+        tmp_read32 &= (file_attr->mask);
+        if (tmp_read32 == file_attr->reset_off) {
+            ret = 0;
+            PCA954X_DEBUG("pca954x_do_file_reset success.\n");
+            break;
+        }
+        udelay_cnt++;
+        if ((udelay_cnt % 1000) == 0) {
+            /* 1MS schedule*/
+            schedule();
+        }
+        timeout--;
+    }
+    if (ret < 0) {
+        PCA954X_ERROR("pca954x_do_file_reset timeout.\n");
+    }
+out:
+    if (err < 0) {
+        PCA954X_ERROR("pca954x_do_file_reset file rd/wr failed, ret:%d.\n", err);
+    }
+
+    return ret;
+}
+
+static int pca954x_do_io_reset(struct i2c_mux_core *muxc)
+{
+    int ret, timeout;
+    struct pca954x *data;
+    pca9548_cfg_info_t *reset_cfg;
+    io_attr_t *io_attr;
+    u8 val;
+    int udelay_cnt;
+
+    data = i2c_mux_priv(muxc);
+    reset_cfg = &data->pca9548_cfg_info;
+    io_attr = &reset_cfg->attr.io_attr;
+
+    PCA954X_DEBUG("rst_delay_b:%u, rst_delay:%u, rst_delay_a:%u.\n",
+        reset_cfg->rst_delay_b, reset_cfg->rst_delay, reset_cfg->rst_delay_a);
+    PCA954X_DEBUG("io_addr:0x%x, mask:0x%x, on:0x%x, off:0x%x.\n",
+        io_attr->io_addr, io_attr->mask, io_attr->reset_on, io_attr->reset_off);
+
+    if (reset_cfg->rst_delay_b) {
+        usleep_range(reset_cfg->rst_delay_b, reset_cfg->rst_delay_b + 1);
+    }
+
+    val = inb(io_attr->io_addr);
+    val &= ~(io_attr->mask);
+    val |= io_attr->reset_on;
+    outb(val, io_attr->io_addr);
+
+    if (reset_cfg->rst_delay) {
+        usleep_range(reset_cfg->rst_delay, reset_cfg->rst_delay + 1);
+    }
+
+    val &= ~(io_attr->mask);
+    val |= io_attr->reset_off;
+    outb(val, io_attr->io_addr);
+
+    ret = -1;
+    udelay_cnt = 0;
+    timeout = reset_cfg->rst_delay_a;
+    while (timeout > 0) {
+        usleep_range(1, 2);
+        val = inb(io_attr->io_addr);
+        val &= (io_attr->mask);
+        if (val == io_attr->reset_off) {
+            ret = 0;
+            PCA954X_DEBUG("pca954x_do_io_reset success.\n");
+            break;
+        }
+        udelay_cnt++;
+        if ((udelay_cnt % 1000) == 0) {
+            /* 1MS schedule*/
+            schedule();
+        }
+        timeout--;
+    }
+
+    if (ret < 0) {
+        PCA954X_ERROR("pca954x_do_io_reset timeout.\n");
+    }
+
+    return ret;
+}
+
+static int pca954x_do_gpio_reset(struct i2c_mux_core *muxc)
+{
+    int ret, timeout;
+    struct pca954x *data;
+    pca9548_cfg_info_t *reset_cfg;
+    gpio_attr_t *gpio_attr;
+    u8 val;
+    int udelay_cnt;
+
+    data = i2c_mux_priv(muxc);
+    reset_cfg = &data->pca9548_cfg_info;
+    gpio_attr = &reset_cfg->attr.gpio_attr;
+
+    ret = pca9548_gpio_init(gpio_attr);
+    if (ret) {
+        return -1;
+    }
+
+    if (reset_cfg->rst_delay_b) {
+        usleep_range(reset_cfg->rst_delay_b, reset_cfg->rst_delay_b + 1);
+    }
+
+    /* reset on */
+    __gpio_set_value(gpio_attr->gpio, gpio_attr->reset_on);
+
+    if (reset_cfg->rst_delay) {
+        usleep_range(reset_cfg->rst_delay, reset_cfg->rst_delay + 1);
+    }
+
+    /* reset off */
+    __gpio_set_value(gpio_attr->gpio, gpio_attr->reset_off);
+    ret = -1;
+    udelay_cnt = 0;
+    timeout = reset_cfg->rst_delay_a;
+    while (timeout > 0) {
+        usleep_range(1, 2);
+        val = __gpio_get_value(gpio_attr->gpio);
+        if (val == gpio_attr->reset_off) {
+            ret = 0;
+            PCA954X_DEBUG("pca954x_do_gpio_reset success.\n");
+            break;
+        }
+        udelay_cnt++;
+        if ((udelay_cnt % 1000) == 0) {
+            /* 1MS schedule*/
+            schedule();
+        }
+        timeout--;
+    }
+
+    if (ret < 0) {
+        PCA954X_ERROR("pca954x_do_gpio_reset timeout.\n");
+    }
+
+    pca9548_gpio_free(gpio_attr);
+    return ret;
+}
+
+static int pca954x_do_i2c_reset(struct i2c_mux_core *muxc)
+{
+    int ret, timeout, err;
+    struct pca954x *data;
+    pca9548_cfg_info_t *reset_cfg;
+    i2c_attr_t *i2c_attr;
+    u8 val;
+    int udelay_cnt;
+
+    data = i2c_mux_priv(muxc);
+    reset_cfg = &data->pca9548_cfg_info;
+    i2c_attr = &reset_cfg->attr.i2c_attr;
+    ret = -1;
+
+    PCA954X_DEBUG("rst_delay_b:%u, rst_delay:%u, rst_delay_a:%u.\n",
+        reset_cfg->rst_delay_b, reset_cfg->rst_delay, reset_cfg->rst_delay_a);
+    PCA954X_DEBUG("bus:0x%x, addr:0x%x, reg:0x%x, mask:0x%x, on:0x%x, off:0x%x.\n",
+        i2c_attr->i2c_bus, i2c_attr->i2c_addr, i2c_attr->reg_offset,
+        i2c_attr->mask, i2c_attr->reset_on, i2c_attr->reset_off);
+
+    if (reset_cfg->rst_delay_b) {
+        usleep_range(reset_cfg->rst_delay_b, reset_cfg->rst_delay_b + 1);
+    }
+
+    err = pca954x_reset_i2c_read(i2c_attr->i2c_bus, i2c_attr->i2c_addr,
+              i2c_attr->reg_offset, &val, sizeof(val));
+    if (err < 0) {
+        goto out;
+    }
+    val &= ~(i2c_attr->mask);
+    val |= i2c_attr->reset_on;
+    err = pca954x_reset_i2c_write(i2c_attr->i2c_bus, i2c_attr->i2c_addr,
+              i2c_attr->reg_offset, val);
+    if (err < 0) {
+        goto out;
+    }
+
+    if (reset_cfg->rst_delay) {
+        usleep_range(reset_cfg->rst_delay, reset_cfg->rst_delay + 1);
+    }
+
+    val &= ~(i2c_attr->mask);
+    val |= i2c_attr->reset_off;
+    err = pca954x_reset_i2c_write(i2c_attr->i2c_bus, i2c_attr->i2c_addr,
+              i2c_attr->reg_offset, val);
+    if (err < 0) {
+        goto out;
+    }
+
+    udelay_cnt = 0;
+    timeout = reset_cfg->rst_delay_a;
+    while (timeout > 0) {
+        usleep_range(1, 2);
+        err = pca954x_reset_i2c_read(i2c_attr->i2c_bus, i2c_attr->i2c_addr,
+                  i2c_attr->reg_offset, &val, sizeof(val));
+        if (err < 0) {
+            goto out;
+        }
+        val &= (i2c_attr->mask);
+        if (val == i2c_attr->reset_off) {
+            ret = 0;
+            PCA954X_DEBUG("pca954x_do_i2c_reset success.\n");
+            break;
+        }
+        udelay_cnt++;
+        if ((udelay_cnt % 1000) == 0) {
+            /* 1MS schedule*/
+            schedule();
+        }
+        timeout--;
+    }
+    if (ret < 0) {
+        PCA954X_ERROR("pca954x_do_i2c_reset timeout.\n");
+    }
+out:
+    if (err < 0) {
+        PCA954X_ERROR("pca954x_do_i2c_reset i2c op failed, ret:%d.\n", err);
+    }
+    return ret;
+}
+
+static int pca954x_do_reset(struct i2c_mux_core *muxc)
+{
+    int ret;
+    struct pca954x *data;
+
+    data = i2c_mux_priv(muxc);
+    if (data->pca9548_cfg_info.pca9548_reset_type == PCA9548_RESET_NONE) {
+        ret = -1;
+        PCA954X_DEBUG("Don't need to reset.\n");
+    } else if (data->pca9548_cfg_info.pca9548_reset_type == PCA9548_RESET_I2C) {
+        ret = pca954x_do_i2c_reset(muxc);
+    } else if (data->pca9548_cfg_info.pca9548_reset_type == PCA9548_RESET_GPIO) {
+        ret = pca954x_do_gpio_reset(muxc);
+    } else if (data->pca9548_cfg_info.pca9548_reset_type == PCA9548_RESET_IO) {
+        ret = pca954x_do_io_reset(muxc);
+    } else if (data->pca9548_cfg_info.pca9548_reset_type == PCA9548_RESET_FILE) {
+        ret = pca954x_do_file_reset(muxc);
+    } else {
+        ret = -1;
+        PCA954X_ERROR("Unsupport reset type:0x%x.\n",
+            data->pca9548_cfg_info.pca9548_reset_type);
+    }
+
+    if (ret < 0) {
+        PCA954X_ERROR("pca9548_reset_ctrl failed, reset type:%u, ret:%d.\n",
+            data->pca9548_cfg_info.pca9548_reset_type, ret);
+    }
+    return ret;
+}
+
+static int pca954x_select_chan(struct i2c_mux_core *muxc, u32 chan)
+{
+    struct pca954x *data = i2c_mux_priv(muxc);
+    struct i2c_client *client = data->client;
+    const struct chip_desc *chip = data->chip;
+    u8 regval;
+    int ret = 0;
+    u8 read_val = 0;
+    int rv;
+
+    /* we make switches look like muxes, not sure how to be smarter */
+    if (chip->muxtype == pca954x_ismux)
+        regval = chan | chip->enable;
+    else
+        regval = 1 << chan;
+
+    /* Only select the channel if its different from the last channel */
+    if (data->last_chan != regval) {
+        pca954x_setmuxflag(client, 0);
+        ret = pca954x_reg_write(muxc->parent, client, regval);
+        data->last_chan = ret < 0 ? 0 : regval;
+    }
+
+    if (data->pca9548_cfg_info.select_chan_check) { /* check chan */
+        ret = pca954x_reg_read(muxc->parent, client, &read_val);
+        /* read failed or chan not open, reset pca9548 */
+        if ((ret < 0) || (read_val != data->last_chan)) {
+            dev_warn(&client->dev, "pca954x open channle %u failed, do reset.\n", chan);
+            PCA954X_DEBUG("ret = %d, read_val = %d, last_chan = %d.\n", ret, read_val, data->last_chan);
+            rv = pca954x_do_reset(muxc);
+            if (rv >= 0) {
+                PCA954X_DEBUG("pca954x_do_reset success, rv = %d.\n", rv);
+            } else {
+                PCA954X_DEBUG("pca954x_do_reset failed, rv = %d.\n", rv);
+            }
+            if (ret >= 0) {
+                ret = -EIO; /* chan not match, return IO error */
+            }
+        }
+    }
+
+    return ret;
+}
+
+static int pca954x_deselect_mux(struct i2c_mux_core *muxc, u32 chan)
+{
+    struct pca954x *data = i2c_mux_priv(muxc);
+    struct i2c_client *client = data->client;
+    int ret, rv;
+
+    /* Deselect active channel */
+    data->last_chan = 0;
+    if (data->pca9548_cfg_info.close_chan_force_reset) {
+        ret = pca954x_do_reset(muxc);
+    } else {
+        ret = pca954x_reg_write(muxc->parent, client, data->last_chan);
+        if (ret < 0 ) {
+            dev_warn(&client->dev, "pca954x close channel %u failed, do reset.\n", chan);
+            rv = pca954x_do_reset(muxc);
+            if (rv == 0) {
+                ret = 0;
+            }
+        }
+    }
+
+    rv = pca954x_setmuxflag(client, 1);
+    if (rv == 0) {
+        PCA954X_DEBUG("match 9641, close 9548 channel to deselect 9641.\n");
+        (void)pca954x_reg_write(muxc->parent, client, data->last_chan);
+    } else {
+        PCA954X_DEBUG("dismatch 9641, do nothing.\n");
+    }
+
+    return ret;
+
+}
+
+static irqreturn_t pca954x_irq_handler(int irq, void *dev_id)
+{
+    struct pca954x *data = dev_id;
+    unsigned int child_irq;
+    int ret, i, handled = 0;
+
+    ret = i2c_smbus_read_byte(data->client);
+    if (ret < 0)
+        return IRQ_NONE;
+
+    for (i = 0; i < data->chip->nchans; i++) {
+        if (ret & BIT(PCA954X_IRQ_OFFSET + i)) {
+            child_irq = irq_linear_revmap(data->irq, i);
+            handle_nested_irq(child_irq);
+            handled++;
+        }
+    }
+    return handled ? IRQ_HANDLED : IRQ_NONE;
+}
+
+static void pca954x_irq_mask(struct irq_data *idata)
+{
+    struct pca954x *data = irq_data_get_irq_chip_data(idata);
+    unsigned int pos = idata->hwirq;
+    unsigned long flags;
+
+    raw_spin_lock_irqsave(&data->lock, flags);
+
+    data->irq_mask &= ~BIT(pos);
+    if (!data->irq_mask)
+        disable_irq(data->client->irq);
+
+    raw_spin_unlock_irqrestore(&data->lock, flags);
+}
+
+static void pca954x_irq_unmask(struct irq_data *idata)
+{
+    struct pca954x *data = irq_data_get_irq_chip_data(idata);
+    unsigned int pos = idata->hwirq;
+    unsigned long flags;
+
+    raw_spin_lock_irqsave(&data->lock, flags);
+
+    if (!data->irq_mask)
+        enable_irq(data->client->irq);
+    data->irq_mask |= BIT(pos);
+
+    raw_spin_unlock_irqrestore(&data->lock, flags);
+}
+
+static int pca954x_irq_set_type(struct irq_data *idata, unsigned int type)
+{
+    if ((type & IRQ_TYPE_SENSE_MASK) != IRQ_TYPE_LEVEL_LOW)
+        return -EINVAL;
+    return 0;
+}
+
+static struct irq_chip pca954x_irq_chip = {
+    .name = "i2c-mux-pca954x",
+    .irq_mask = pca954x_irq_mask,
+    .irq_unmask = pca954x_irq_unmask,
+    .irq_set_type = pca954x_irq_set_type,
+};
+
+static int of_pca954x_irq_setup(struct i2c_mux_core *muxc)
+{
+    struct pca954x *data = i2c_mux_priv(muxc);
+    struct i2c_client *client = data->client;
+    int c, err, irq;
+
+    if (!data->chip->has_irq || client->irq <= 0)
+        return 0;
+
+    raw_spin_lock_init(&data->lock);
+
+    data->irq = irq_domain_add_linear(client->dev.of_node,
+                      data->chip->nchans,
+                      &irq_domain_simple_ops, data);
+    if (!data->irq)
+        return -ENODEV;
+
+    for (c = 0; c < data->chip->nchans; c++) {
+        irq = irq_create_mapping(data->irq, c);
+        irq_set_chip_data(irq, data);
+        irq_set_chip_and_handler(irq, &pca954x_irq_chip,
+            handle_simple_irq);
+    }
+
+    err = devm_request_threaded_irq(&client->dev, data->client->irq, NULL,
+                    pca954x_irq_handler,
+                    IRQF_ONESHOT | IRQF_SHARED,
+                    "pca954x", data);
+    if (err)
+        goto err_req_irq;
+
+    disable_irq(data->client->irq);
+
+    return 0;
+err_req_irq:
+    for (c = 0; c < data->chip->nchans; c++) {
+        irq = irq_find_mapping(data->irq, c);
+        irq_dispose_mapping(irq);
+    }
+    irq_domain_remove(data->irq);
+
+    return err;
+}
+
+static int pca954x_irq_setup(struct i2c_mux_core *muxc)
+{
+    return 0;
+}
+
+static int of_pca954x_reset_data_init(struct pca954x *data)
+{
+    int err, rv;
+    struct device *dev = &data->client->dev;
+    pca9548_cfg_info_t *reset_cfg;
+
+    reset_cfg = &data->pca9548_cfg_info;
+    if (dev == NULL || dev->of_node == NULL) {
+        PCA954X_DEBUG("dev or dev->of_node is NUll, no reset.\n");
+        reset_cfg->pca9548_reset_type = PCA9548_RESET_NONE;
+        return 0;
+    }
+
+    reset_cfg->select_chan_check = of_property_read_bool(dev->of_node, "select_chan_check");
+    reset_cfg->close_chan_force_reset = of_property_read_bool(dev->of_node, "close_chan_force_reset");
+    PCA954X_DEBUG("select_chan_check:%d, close_chan_force_reset:%d.\n", reset_cfg->select_chan_check,
+        reset_cfg->close_chan_force_reset);
+
+    if (of_property_read_u32(dev->of_node, "pca9548_reset_type", &reset_cfg->pca9548_reset_type)) {
+
+        PCA954X_DEBUG("pca9548_reset_type not found, no reset.\n");
+        reset_cfg->pca9548_reset_type = PCA9548_RESET_NONE;
+        return 0;
+    }
+    err = of_property_read_u32(dev->of_node, "rst_delay_b", &reset_cfg->rst_delay_b);
+    err |= of_property_read_u32(dev->of_node, "rst_delay", &reset_cfg->rst_delay);
+    err |= of_property_read_u32(dev->of_node, "rst_delay_a", &reset_cfg->rst_delay_a);
+
+    if (err) {
+        goto dts_config_err;
+    }
+    PCA954X_DEBUG("reset_type:0x%x, rst_delay_b:0x%x, rst_delay:0x%x, rst_delay_a:0x%x.\n",
+        reset_cfg->pca9548_reset_type, reset_cfg->rst_delay_b,
+        reset_cfg->rst_delay, reset_cfg->rst_delay_a);
+
+    if (reset_cfg->pca9548_reset_type == PCA9548_RESET_I2C) {
+        PCA954X_DEBUG("reset by i2c.\n");
+        err = of_property_read_u32(dev->of_node, "i2c_bus", &reset_cfg->attr.i2c_attr.i2c_bus);
+        err |=of_property_read_u32(dev->of_node, "i2c_addr", &reset_cfg->attr.i2c_attr.i2c_addr);
+        err |=of_property_read_u32(dev->of_node, "reg_offset", &reset_cfg->attr.i2c_attr.reg_offset);
+        err |=of_property_read_u32(dev->of_node, "mask", &reset_cfg->attr.i2c_attr.mask);
+        err |=of_property_read_u32(dev->of_node, "reset_on", &reset_cfg->attr.i2c_attr.reset_on);
+        err |=of_property_read_u32(dev->of_node, "reset_off", &reset_cfg->attr.i2c_attr.reset_off);
+        if (err) {
+            goto dts_config_err;
+        }
+        PCA954X_DEBUG("bus:%u, addr:0x%x, offset:0x%x, mask:0x%x, on:0x%x, off:0x%x.\n",
+            reset_cfg->attr.i2c_attr.i2c_bus, reset_cfg->attr.i2c_attr.i2c_addr,
+            reset_cfg->attr.i2c_attr.reg_offset, reset_cfg->attr.i2c_attr.mask,
+            reset_cfg->attr.i2c_attr.reset_on, reset_cfg->attr.i2c_attr.reset_off);
+    } else if (reset_cfg->pca9548_reset_type == PCA9548_RESET_GPIO) {
+        PCA954X_DEBUG("reset by gpio.\n");
+        err = of_property_read_u32(dev->of_node, "gpio", &reset_cfg->attr.gpio_attr.gpio);
+        err |=of_property_read_u32(dev->of_node, "reset_on", &reset_cfg->attr.gpio_attr.reset_on);
+        err |=of_property_read_u32(dev->of_node, "reset_off", &reset_cfg->attr.gpio_attr.reset_off);
+        if (err) {
+            goto dts_config_err;
+        }
+        PCA954X_DEBUG("gpio number:%u, reset_on:0x%x, reset_off:0x%x.\n",
+            reset_cfg->attr.gpio_attr.gpio, reset_cfg->attr.gpio_attr.reset_on,
+            reset_cfg->attr.gpio_attr.reset_off);
+        reset_cfg->attr.gpio_attr.gpio_init = 0;
+    } else if (reset_cfg->pca9548_reset_type == PCA9548_RESET_IO) {
+        PCA954X_DEBUG("reset by io.\n");
+        err = of_property_read_u32(dev->of_node, "io_addr", &reset_cfg->attr.io_attr.io_addr);
+        err |=of_property_read_u32(dev->of_node, "mask", &reset_cfg->attr.io_attr.mask);
+        err |=of_property_read_u32(dev->of_node, "reset_on", &reset_cfg->attr.io_attr.reset_on);
+        err |=of_property_read_u32(dev->of_node, "reset_off", &reset_cfg->attr.io_attr.reset_off);
+        if (err) {
+            goto dts_config_err;
+        }
+        PCA954X_DEBUG("io_addr:0x%x, mask:0x%x, reset_on:0x%x, reset_off:0x%x.\n",
+            reset_cfg->attr.io_attr.io_addr, reset_cfg->attr.io_attr.mask,
+            reset_cfg->attr.io_attr.reset_on, reset_cfg->attr.io_attr.reset_off);
+    } else if (reset_cfg->pca9548_reset_type == PCA9548_RESET_FILE) {
+        PCA954X_DEBUG("reset by file.\n");
+        err = of_property_read_string(dev->of_node, "dev_name", &reset_cfg->attr.file_attr.dev_name);
+        err |=of_property_read_u32(dev->of_node, "offset", &reset_cfg->attr.file_attr.offset);
+        err |=of_property_read_u32(dev->of_node, "mask", &reset_cfg->attr.file_attr.mask);
+        err |=of_property_read_u32(dev->of_node, "reset_on", &reset_cfg->attr.file_attr.reset_on);
+        err |=of_property_read_u32(dev->of_node, "reset_off", &reset_cfg->attr.file_attr.reset_off);
+        if (err) {
+            goto dts_config_err;
+        }
+        rv = of_property_read_u32(dev->of_node, "width", &reset_cfg->attr.file_attr.width);
+        if (rv == 0) {
+            if ((reset_cfg->attr.file_attr.width != WIDTH_1Byte) && (reset_cfg->attr.file_attr.width != WIDTH_4Byte)) {
+                PCA954X_ERROR("9548 reset config error, witdh: %u not support.\n", reset_cfg->attr.file_attr.width);
+                return -EINVAL;
+            }
+        } else {
+            reset_cfg->attr.file_attr.width = 1;
+        }
+        PCA954X_DEBUG("dev_name:%s, mask:0x%x, reset_on:0x%x, reset_off:0x%x, width: %u\n",
+            reset_cfg->attr.file_attr.dev_name, reset_cfg->attr.file_attr.mask,
+            reset_cfg->attr.file_attr.reset_on, reset_cfg->attr.file_attr.reset_off, reset_cfg->attr.file_attr.width);
+    } else {
+        PCA954X_ERROR("Unsupport reset type:%d.\n", reset_cfg->pca9548_reset_type);
+        goto dts_config_err;
+    }
+    return 0;
+dts_config_err:
+    PCA954X_ERROR("dts config error, ret:%d.\n", err);
+    return -EINVAL;
+}
+
+static int pca954x_reset_data_init(struct pca954x *data)
+{
+    pca9548_cfg_info_t *reset_cfg;
+    i2c_mux_pca954x_device_t *i2c_mux_pca954x_device;
+
+    if (data->client->dev.platform_data == NULL) {
+        PCA954X_DEBUG("pca954x has no reset platform data config.\n");
+        return 0;
+    }
+    reset_cfg = &data->pca9548_cfg_info;
+    i2c_mux_pca954x_device = data->client->dev.platform_data;
+    reset_cfg->select_chan_check = i2c_mux_pca954x_device->select_chan_check;
+    reset_cfg->close_chan_force_reset = i2c_mux_pca954x_device->close_chan_force_reset;
+    PCA954X_DEBUG("select_chan_check:%d, close_chan_force_reset:%d.\n", reset_cfg->select_chan_check,
+        reset_cfg->close_chan_force_reset);
+
+    reset_cfg->pca9548_reset_type = i2c_mux_pca954x_device->pca9548_reset_type;
+    if (reset_cfg->pca9548_reset_type == PCA9548_RESET_NONE) {
+        PCA954X_DEBUG("pca9548_reset_type not found, no reset.\n");
+        return 0;
+    }
+
+    reset_cfg->rst_delay_b = i2c_mux_pca954x_device->rst_delay_b;
+    reset_cfg->rst_delay = i2c_mux_pca954x_device->rst_delay;
+    reset_cfg->rst_delay_a = i2c_mux_pca954x_device->rst_delay_a;
+    PCA954X_DEBUG("reset_type:0x%x, rst_delay_b:0x%x, rst_delay:0x%x, rst_delay_a:0x%x.\n",
+        reset_cfg->pca9548_reset_type, reset_cfg->rst_delay_b,
+        reset_cfg->rst_delay, reset_cfg->rst_delay_a);
+
+    if (reset_cfg->pca9548_reset_type == PCA9548_RESET_I2C) {
+        PCA954X_DEBUG("reset by i2c.\n");
+        reset_cfg->attr.i2c_attr.i2c_bus = i2c_mux_pca954x_device->attr.i2c_attr.i2c_bus;
+        reset_cfg->attr.i2c_attr.i2c_addr = i2c_mux_pca954x_device->attr.i2c_attr.i2c_addr;
+        reset_cfg->attr.i2c_attr.reg_offset = i2c_mux_pca954x_device->attr.i2c_attr.reg_offset;
+        reset_cfg->attr.i2c_attr.mask = i2c_mux_pca954x_device->attr.i2c_attr.mask;
+        reset_cfg->attr.i2c_attr.reset_on = i2c_mux_pca954x_device->attr.i2c_attr.reset_on;
+        reset_cfg->attr.i2c_attr.reset_off = i2c_mux_pca954x_device->attr.i2c_attr.reset_off;
+        PCA954X_DEBUG("bus:%u, addr:0x%x, offset:0x%x, mask:0x%x, on:0x%x, off:0x%x.\n",
+            reset_cfg->attr.i2c_attr.i2c_bus, reset_cfg->attr.i2c_attr.i2c_addr,
+            reset_cfg->attr.i2c_attr.reg_offset, reset_cfg->attr.i2c_attr.mask,
+            reset_cfg->attr.i2c_attr.reset_on, reset_cfg->attr.i2c_attr.reset_off);
+    } else if (reset_cfg->pca9548_reset_type == PCA9548_RESET_GPIO) {
+        PCA954X_DEBUG("reset by gpio.\n");
+        reset_cfg->attr.gpio_attr.gpio = i2c_mux_pca954x_device->attr.gpio_attr.gpio;
+        reset_cfg->attr.gpio_attr.reset_on = i2c_mux_pca954x_device->attr.gpio_attr.reset_on;
+        reset_cfg->attr.gpio_attr.reset_off = i2c_mux_pca954x_device->attr.gpio_attr.reset_off;
+        PCA954X_DEBUG("gpio number:%u, reset_on:0x%x, reset_off:0x%x.\n",
+            reset_cfg->attr.gpio_attr.gpio, reset_cfg->attr.gpio_attr.reset_on,
+            reset_cfg->attr.gpio_attr.reset_off);
+        reset_cfg->attr.gpio_attr.gpio_init = 0;
+    } else if (reset_cfg->pca9548_reset_type == PCA9548_RESET_IO) {
+        PCA954X_DEBUG("reset by io.\n");
+        reset_cfg->attr.io_attr.io_addr = i2c_mux_pca954x_device->attr.io_attr.io_addr;
+        reset_cfg->attr.io_attr.mask = i2c_mux_pca954x_device->attr.io_attr.mask;
+        reset_cfg->attr.io_attr.reset_on = i2c_mux_pca954x_device->attr.io_attr.reset_on;
+        reset_cfg->attr.io_attr.reset_off = i2c_mux_pca954x_device->attr.io_attr.reset_off;
+        PCA954X_DEBUG("io_addr:0x%x, mask:0x%x, reset_on:0x%x, reset_off:0x%x.\n",
+            reset_cfg->attr.io_attr.io_addr, reset_cfg->attr.io_attr.mask,
+            reset_cfg->attr.io_attr.reset_on, reset_cfg->attr.io_attr.reset_off);
+    } else if (reset_cfg->pca9548_reset_type == PCA9548_RESET_FILE) {
+        PCA954X_DEBUG("reset by file.\n");
+        reset_cfg->attr.file_attr.dev_name = i2c_mux_pca954x_device->attr.file_attr.dev_name;
+        reset_cfg->attr.file_attr.offset = i2c_mux_pca954x_device->attr.file_attr.offset;
+        reset_cfg->attr.file_attr.mask = i2c_mux_pca954x_device->attr.file_attr.mask;
+        reset_cfg->attr.file_attr.reset_on = i2c_mux_pca954x_device->attr.file_attr.reset_on;
+        reset_cfg->attr.file_attr.reset_off = i2c_mux_pca954x_device->attr.file_attr.reset_off;
+        reset_cfg->attr.file_attr.width = i2c_mux_pca954x_device->attr.file_attr.width;
+        if (reset_cfg->attr.file_attr.width > 0) {
+            if ((reset_cfg->attr.file_attr.width != WIDTH_1Byte) && (reset_cfg->attr.file_attr.width != WIDTH_4Byte)) {
+                PCA954X_ERROR("9548 reset config error, witdh: %u not support.\n", reset_cfg->attr.file_attr.width);
+                return -EINVAL;
+            }
+        } else {
+            reset_cfg->attr.file_attr.width = 1;
+        }
+        PCA954X_DEBUG("dev_name:%s, mask:0x%x, reset_on:0x%x, reset_off:0x%x, width: %u\n",
+            reset_cfg->attr.file_attr.dev_name, reset_cfg->attr.file_attr.mask,
+            reset_cfg->attr.file_attr.reset_on, reset_cfg->attr.file_attr.reset_off, reset_cfg->attr.file_attr.width);
+    } else {
+        PCA954X_ERROR("Unsupport reset type:%d.\n", reset_cfg->pca9548_reset_type);
+        return -EINVAL;
+    }
+    return 0;
+}
+
+/*
+ * I2C init/probing/exit functions
+ */
+static int pca954x_probe(struct i2c_client *client,
+             const struct i2c_device_id *id)
+{
+    struct i2c_adapter *adap = to_i2c_adapter(client->dev.parent);
+    struct device_node *of_node = client->dev.of_node;
+    bool idle_disconnect_dt;
+    struct gpio_desc *gpio;
+    int num, force, class;
+    struct i2c_mux_core *muxc;
+    struct pca954x *data;
+    const struct of_device_id *match;
+    unsigned int probe_disable;
+    int ret, dynamic_nr;
+    i2c_mux_pca954x_device_t *i2c_mux_pca954x_device;
+
+    PCA954X_DEBUG("pca954x_probe, parent bus: %d, 9548 addr:0x%x.\n", adap->nr, client->addr);
+
+    if (!i2c_check_functionality(adap, I2C_FUNC_SMBUS_BYTE))
+        return -ENODEV;
+
+    muxc = i2c_mux_alloc(adap, &client->dev,
+                 PCA954X_MAX_NCHANS, sizeof(*data), 0,
+                 pca954x_select_chan, pca954x_deselect_mux);
+    if (!muxc)
+        return -ENOMEM;
+    data = i2c_mux_priv(muxc);
+
+    i2c_set_clientdata(client, muxc);
+    data->client = client;
+
+    /* Get the mux out of reset if a reset GPIO is specified. */
+    gpio = devm_gpiod_get_optional(&client->dev, "reset", GPIOD_OUT_LOW);
+    if (IS_ERR(gpio))
+        return PTR_ERR(gpio);
+
+    /* check device connection status */
+
+    if (client->dev.of_node == NULL) {
+        if (client->dev.platform_data == NULL) {
+            probe_disable = 1;
+            PCA954X_DEBUG("has no platform data config, set probe_disable = 1.\n");
+        } else {
+            i2c_mux_pca954x_device = client->dev.platform_data;
+            probe_disable = i2c_mux_pca954x_device->probe_disable;
+        }
+    } else {
+        probe_disable = of_property_read_bool(of_node, "probe_disable");
+    }
+
+    /* Write the mux register at addr to verify
+     * that the mux is in fact present. This also
+     * initializes the mux to disconnected state.
+     */
+    if (!probe_disable && (i2c_smbus_write_byte(client, 0) < 0)) {
+        dev_warn(&client->dev, "probe failed\n");
+        return -ENODEV;
+    }
+
+    match = of_match_device(of_match_ptr(pca954x_of_match), &client->dev);
+    if (match)
+        data->chip = of_device_get_match_data(&client->dev);
+    else
+        data->chip = &chips[id->driver_data];
+
+    data->last_chan = 0;           /* force the first selection */
+
+    if (client->dev.of_node == NULL) {
+        idle_disconnect_dt = false;
+    } else {
+        idle_disconnect_dt = of_node &&
+            of_property_read_bool(of_node, "i2c-mux-idle-disconnect");
+    }
+
+    if (client->dev.of_node) {
+        ret= of_pca954x_reset_data_init(data);
+    } else {
+        ret= pca954x_reset_data_init(data);
+    }
+    if (ret < 0) {
+        dev_err(&client->dev, "pca954x reset config err, ret:%d.\n", ret);
+        return ret;
+    }
+
+    if (client->dev.of_node) {
+        ret = of_pca954x_irq_setup(muxc);
+    } else {
+        ret = pca954x_irq_setup(muxc);
+    }
+    if (ret) {
+        goto fail_del_adapters;
+    }
+
+    if (client->dev.of_node == NULL) {
+        if (client->dev.platform_data == NULL) {
+            dynamic_nr = 1;
+            PCA954X_DEBUG("platform data is NULL, use dynamic adap number.\n");
+        } else {
+            i2c_mux_pca954x_device = client->dev.platform_data;
+            data->pca9548_cfg_info.pca9548_base_nr = i2c_mux_pca954x_device->pca9548_base_nr;
+            if (data->pca9548_cfg_info.pca9548_base_nr == 0) {
+                dynamic_nr = 1;
+                PCA954X_DEBUG("pca9548_base_nr = 0, use dynamic adap number.\n");
+            } else {
+                dynamic_nr = 0;
+                PCA954X_DEBUG("pca9548_base_nr:%u.\n", data->pca9548_cfg_info.pca9548_base_nr);
+            }
+        }
+    } else {
+        if (of_property_read_u32(of_node, "pca9548_base_nr", &data->pca9548_cfg_info.pca9548_base_nr)) {
+
+            dynamic_nr = 1;
+            PCA954X_DEBUG("pca9548_base_nr not found, use dynamic adap number");
+        } else {
+            dynamic_nr = 0;
+            PCA954X_DEBUG("pca9548_base_nr:%u.\n", data->pca9548_cfg_info.pca9548_base_nr);
+        }
+    }
+
+    /* Now create an adapter for each channel */
+    for (num = 0; num < data->chip->nchans; num++) {
+        bool idle_disconnect_pd = false;
+        if (dynamic_nr == 1) {
+            force = 0;              /* dynamic adap number */
+        } else {
+            force = data->pca9548_cfg_info.pca9548_base_nr + num;
+        }
+
+        class = 0;              /* no class by default */
+        data->deselect |= (idle_disconnect_pd ||
+                   idle_disconnect_dt) << num;
+
+        ret = i2c_mux_add_adapter(muxc, force, num, class);
+        if (ret)
+            goto fail_del_adapters;
+    }
+
+    dev_info(&client->dev,
+         "registered %d multiplexed busses for I2C %s %s\n",
+         num, data->chip->muxtype == pca954x_ismux
+                ? "mux" : "switch", client->name);
+
+    return 0;
+
+fail_del_adapters:
+    i2c_mux_del_adapters(muxc);
+    return ret;
+}
+
+static void pca954x_remove(struct i2c_client *client)
+{
+    struct i2c_mux_core *muxc = i2c_get_clientdata(client);
+    struct pca954x *data = i2c_mux_priv(muxc);
+    int c, irq;
+
+    if (data->irq) {
+        for (c = 0; c < data->chip->nchans; c++) {
+            irq = irq_find_mapping(data->irq, c);
+            irq_dispose_mapping(irq);
+        }
+        irq_domain_remove(data->irq);
+    }
+
+    i2c_mux_del_adapters(muxc);
+    return;
+}
+
+#ifdef CONFIG_PM_SLEEP
+static int pca954x_resume(struct device *dev)
+{
+    struct i2c_client *client = to_i2c_client(dev);
+    struct i2c_mux_core *muxc = i2c_get_clientdata(client);
+    struct pca954x *data = i2c_mux_priv(muxc);
+
+    data->last_chan = 0;
+    return i2c_smbus_write_byte(client, 0);
+}
+#endif
+
+static SIMPLE_DEV_PM_OPS(pca954x_pm, NULL, pca954x_resume);
+
+static struct i2c_driver pca954x_driver = {
+    .driver        = {
+        .name    = "wb_pca954x",
+        .pm    = &pca954x_pm,
+        .of_match_table = of_match_ptr(pca954x_of_match),
+    },
+    .probe        = pca954x_probe,
+    .remove        = pca954x_remove,
+    .id_table    = pca954x_id,
+};
+
+module_i2c_driver(pca954x_driver);
+
+MODULE_AUTHOR("support");
+MODULE_DESCRIPTION("PCA954x I2C mux/switch driver");
+MODULE_LICENSE("GPL");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_mux_pca954x.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_mux_pca954x.h
new file mode 100644
index 000000000..beed9b2f9
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_mux_pca954x.h
@@ -0,0 +1,68 @@
+#ifndef __WB_I2C_MUX_PCA954X_H__
+#define __WB_I2C_MUX_PCA954X_H__
+
+#include <linux/string.h>
+
+#define mem_clear(data, size) memset((data), 0, (size))
+
+typedef enum pca9548_reset_type_s {
+    PCA9548_RESET_NONE = 0,
+    PCA9548_RESET_I2C = 1,
+    PCA9548_RESET_GPIO = 2,
+    PCA9548_RESET_IO = 3,
+    PCA9548_RESET_FILE = 4,
+} pca9548_reset_type_t;
+
+typedef struct i2c_attr_s {
+    uint32_t i2c_bus;
+    uint32_t i2c_addr;
+    uint32_t reg_offset;
+    uint32_t mask;
+    uint32_t reset_on;
+    uint32_t reset_off;
+} i2c_attr_t;
+
+typedef struct io_attr_s {
+    uint32_t io_addr;
+    uint32_t mask;
+    uint32_t reset_on;
+    uint32_t reset_off;
+} io_attr_t;
+
+typedef struct file_attr_s {
+    const char *dev_name;
+    uint32_t offset;
+    uint32_t mask;
+    uint32_t reset_on;
+    uint32_t reset_off;
+    uint32_t width;
+} file_attr_t;
+
+typedef struct gpio_attr_s {
+    int gpio_init;
+    uint32_t gpio;
+    uint32_t reset_on;
+    uint32_t reset_off;
+} gpio_attr_t;
+
+typedef struct i2c_mux_pca954x_device_s {
+    struct i2c_client *client;
+    uint32_t i2c_bus;
+    uint32_t i2c_addr;
+    uint32_t pca9548_base_nr;
+    uint32_t pca9548_reset_type;
+    uint32_t rst_delay_b;                   /* delay time before reset(us) */
+    uint32_t rst_delay;                     /* reset time(us) */
+    uint32_t rst_delay_a;                   /* delay time after reset(us) */
+    bool probe_disable;
+    bool select_chan_check;
+    bool close_chan_force_reset;
+    union {
+        i2c_attr_t i2c_attr;
+        gpio_attr_t gpio_attr;
+        io_attr_t io_attr;
+        file_attr_t file_attr;
+    } attr;
+} i2c_mux_pca954x_device_t;
+
+#endif
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_mux_pca9641.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_mux_pca9641.c
new file mode 100644
index 000000000..a3ae9f4b2
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_mux_pca9641.c
@@ -0,0 +1,1410 @@
+/*
+ * I2C multiplexer driver for PCA9541 bus master selector
+ *
+ * Copyright (c) 2010 Ericsson AB.
+ *
+ * Author: Guenter Roeck <linux@roeck-us.net>
+ *
+ * Derived from:
+ *  pca954x.c
+ *
+ *  Copyright (c) 2008-2009 Rodolfo Giometti <giometti@linux.it>
+ *  Copyright (c) 2008-2009 Eurotech S.p.A. <info@eurotech.it>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include <linux/version.h>
+#include <linux/module.h>
+#include <linux/jiffies.h>
+#include <linux/delay.h>
+#include <linux/slab.h>
+#include <linux/device.h>
+#include <linux/i2c.h>
+#include <linux/i2c-mux.h>
+#include <linux/gpio/consumer.h>
+#include <linux/gpio.h>
+#include <linux/fs.h>
+#include <linux/uaccess.h>
+#include <linux/uio.h>
+
+#include "wb_i2c_mux_pca9641.h"
+
+/*
+ * The PCA9541 is a bus master selector. It supports two I2C masters connected
+ * to a single slave bus.
+ *
+ * Before each bus transaction, a master has to acquire bus ownership. After the
+ * transaction is complete, bus ownership has to be released. This fits well
+ * into the I2C multiplexer framework, which provides select and release
+ * functions for this purpose. For this reason, this driver is modeled as
+ * single-channel I2C bus multiplexer.
+ *
+ * This driver assumes that the two bus masters are controlled by two different
+ * hosts. If a single host controls both masters, platform code has to ensure
+ * that only one of the masters is instantiated at any given time.
+ */
+
+#define PCA9541_CONTROL		0x01
+#define PCA9541_ISTAT		0x02
+
+#define PCA9541_CTL_MYBUS	(1 << 0)
+#define PCA9541_CTL_NMYBUS	(1 << 1)
+#define PCA9541_CTL_BUSON	(1 << 2)
+#define PCA9541_CTL_NBUSON	(1 << 3)
+#define PCA9541_CTL_BUSINIT	(1 << 4)
+#define PCA9541_CTL_TESTON	(1 << 6)
+#define PCA9541_CTL_NTESTON	(1 << 7)
+#define PCA9541_ISTAT_INTIN	(1 << 0)
+#define PCA9541_ISTAT_BUSINIT	(1 << 1)
+#define PCA9541_ISTAT_BUSOK	(1 << 2)
+#define PCA9541_ISTAT_BUSLOST	(1 << 3)
+#define PCA9541_ISTAT_MYTEST	(1 << 6)
+#define PCA9541_ISTAT_NMYTEST	(1 << 7)
+#define PCA9641_ID             0x00
+#define PCA9641_ID_MAGIC       0x38
+#define PCA9641_CONTROL        0x01
+#define PCA9641_STATUS         0x02
+#define PCA9641_TIME           0x03
+#define PCA9641_CTL_LOCK_REQ           BIT(0)
+#define PCA9641_CTL_LOCK_GRANT         BIT(1)
+#define PCA9641_CTL_BUS_CONNECT        BIT(2)
+#define PCA9641_CTL_BUS_INIT           BIT(3)
+#define PCA9641_CTL_SMBUS_SWRST        BIT(4)
+#define PCA9641_CTL_IDLE_TIMER_DIS     BIT(5)
+#define PCA9641_CTL_SMBUS_DIS          BIT(6)
+#define PCA9641_CTL_PRIORITY           BIT(7)
+#define PCA9641_STS_OTHER_LOCK         BIT(0)
+#define PCA9641_STS_BUS_INIT_FAIL      BIT(1)
+#define PCA9641_STS_BUS_HUNG           BIT(2)
+#define PCA9641_STS_MBOX_EMPTY         BIT(3)
+#define PCA9641_STS_MBOX_FULL          BIT(4)
+#define PCA9641_STS_TEST_INT           BIT(5)
+#define PCA9641_STS_SCL_IO             BIT(6)
+#define PCA9641_STS_SDA_IO             BIT(7)
+#define PCA9641_RES_TIME       0x03
+#define BUSON		(PCA9541_CTL_BUSON | PCA9541_CTL_NBUSON)
+#define MYBUS		(PCA9541_CTL_MYBUS | PCA9541_CTL_NMYBUS)
+#define mybus(x)	(!((x) & MYBUS) || ((x) & MYBUS) == MYBUS)
+#define busoff(x)	(!((x) & BUSON) || ((x) & BUSON) == BUSON)
+#define BUSOFF(x, y)   (!((x) & PCA9641_CTL_LOCK_GRANT) && \
+                       !((y) & PCA9641_STS_OTHER_LOCK))
+#define other_lock(x)  ((x) & PCA9641_STS_OTHER_LOCK)
+#define lock_grant(x)  ((x) & PCA9641_CTL_LOCK_GRANT)
+
+#define PCA9641_RETRY_TIME     (8)
+#define PCA9641_RESET_DELAY    (150)
+
+typedef struct i2c_muxs_struct_flag
+{
+	int nr;
+	char name[48];
+	struct mutex	update_lock;
+	int flag;
+}i2c_mux_flag;
+
+i2c_mux_flag pca_flag = {
+	.nr = -1,
+	.flag = -1,
+};
+
+int pca9641_setmuxflag(int nr, int flag)
+{
+	if (pca_flag.nr == nr) {
+	    pca_flag.flag = flag;
+        return 0;
+	}
+	return -1;
+}
+EXPORT_SYMBOL(pca9641_setmuxflag);
+
+static int g_debug_info = 0;
+static int g_debug_err = 0;
+
+module_param(g_debug_info, int, S_IRUGO | S_IWUSR);
+module_param(g_debug_err, int, S_IRUGO | S_IWUSR);
+
+#define PCA_DEBUG(fmt, args...) do {                                        \
+    if (g_debug_info) { \
+        printk(KERN_INFO "[pca9641][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define PCA_DEBUG_ERR(fmt, args...) do {                                        \
+    if (g_debug_err) { \
+        printk(KERN_ERR "[pca9641][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+/* arbitration timeouts, in jiffies */
+#define ARB_TIMEOUT	(HZ / 8)	/* 125 ms until forcing bus ownership */
+#define ARB2_TIMEOUT	(HZ / 4)	/* 250 ms until acquisition failure */
+
+/* arbitration retry delays, in us */
+#define SELECT_DELAY_SHORT	50
+#define SELECT_DELAY_LONG	1000
+#define I2C_RETRY_TIMES         (5)
+#define I2C_RETRY_WAIT_TIMES    (10)      /*delay 10ms*/
+
+typedef struct pca9641_cfg_info_s {
+    uint32_t pca9641_reset_type;
+    uint32_t rst_delay_b; /* delay time before reset(us) */
+    uint32_t rst_delay;   /* reset time(us) */
+    uint32_t rst_delay_a; /* delay time after reset(us) */
+    union {
+        i2c_attr_t i2c_attr;
+        gpio_attr_t gpio_attr;
+        io_attr_t io_attr;
+        file_attr_t file_attr;
+    } attr;
+} pca9641_cfg_info_t;
+
+struct pca9541 {
+	struct i2c_client *client;
+	unsigned long select_timeout;
+	unsigned long arb_timeout;
+    uint32_t pca9641_nr;
+    pca9641_cfg_info_t pca9641_cfg_info; /* pca9641 reset cfg */
+};
+
+static const struct i2c_device_id pca9541_id[] = {
+	{"wb_pca9541", 0},
+	{"wb_pca9641", 1},
+	{}
+};
+
+MODULE_DEVICE_TABLE(i2c, pca9541_id);
+
+#ifdef CONFIG_OF
+static const struct of_device_id pca9541_of_match[] = {
+    { .compatible = "nxp,wb_pca9541" },
+    { .compatible = "nxp,wb_pca9641" },
+    {}
+};
+MODULE_DEVICE_TABLE(of, pca9541_of_match);
+#endif
+
+static int pca9641_gpio_init(gpio_attr_t *gpio_attr)
+{
+    int err;
+
+    if (gpio_attr->gpio_init) {
+        PCA_DEBUG("gpio%d already init, do nothing.\n", gpio_attr->gpio);
+        return 0;
+    }
+
+    PCA_DEBUG("gpio%d init.\n", gpio_attr->gpio);
+    err = gpio_request(gpio_attr->gpio, "pca9641_reset");
+    if (err) {
+        goto error;
+    }
+    err = gpio_direction_output(gpio_attr->gpio, gpio_attr->reset_off);
+    if (err) {
+        gpio_free(gpio_attr->gpio);
+        goto error;
+    }
+    gpio_attr->gpio_init = 1;
+    return 0;
+error:
+    PCA_DEBUG_ERR("pca9641_gpio_init failed, ret:%d.\n", err);
+    return err;
+}
+
+static void pca9641_gpio_free(gpio_attr_t *gpio_attr)
+{
+    if (gpio_attr->gpio_init == 1) {
+        PCA_DEBUG("gpio%d release.\n", gpio_attr->gpio);
+        gpio_free(gpio_attr->gpio);
+        gpio_attr->gpio_init = 0;
+    }
+    return;
+}
+
+static int pca9641_reset_file_read(const char *path, uint32_t pos, uint8_t *val, size_t size)
+{
+    int ret;
+    struct file *filp;
+    loff_t tmp_pos;
+
+    struct kvec iov = {
+        .iov_base = val,
+        .iov_len = min_t(size_t, size, MAX_RW_COUNT),
+    };
+    struct iov_iter iter;
+
+    filp = filp_open(path, O_RDONLY, 0);
+    if (IS_ERR(filp)) {
+        PCA_DEBUG_ERR("read open failed errno = %ld\r\n", -PTR_ERR(filp));
+        filp = NULL;
+        goto exit;
+    }
+
+    tmp_pos = (loff_t)pos;
+    iov_iter_kvec(&iter, ITER_DEST, &iov, 1, iov.iov_len);
+    ret = vfs_iter_read(filp, &iter, &tmp_pos, 0);
+    if (ret < 0) {
+        PCA_DEBUG_ERR("vfs_iter_read failed, path=%s, addr=0x%x, size=%ld, ret=%d\r\n", path, pos, size, ret);
+        goto exit;
+    }
+
+    filp_close(filp, NULL);
+
+    return ret;
+
+exit:
+    if (filp != NULL) {
+        filp_close(filp, NULL);
+    }
+
+    return -1;
+}
+
+static int pca9641_reset_file_write(const char *path, uint32_t pos, uint8_t *val, size_t size)
+{
+    int ret;
+    struct file *filp;
+    loff_t tmp_pos;
+
+    struct kvec iov = {
+        .iov_base = val,
+        .iov_len = min_t(size_t, size, MAX_RW_COUNT),
+    };
+    struct iov_iter iter;
+
+    filp = filp_open(path, O_RDWR, 777);
+    if (IS_ERR(filp)) {
+        PCA_DEBUG_ERR("write open failed errno = %ld\r\n", -PTR_ERR(filp));
+        filp = NULL;
+        goto exit;
+    }
+
+    tmp_pos = (loff_t)pos;
+    iov_iter_kvec(&iter, ITER_SOURCE, &iov, 1, iov.iov_len);
+    ret = vfs_iter_write(filp, &iter, &tmp_pos, 0);
+    if (ret < 0) {
+        PCA_DEBUG_ERR("vfs_iter_write failed, path=%s, addr=0x%x, size=%ld, ret=%d\r\n", path, pos, size, ret);
+        goto exit;
+    }
+
+    vfs_fsync(filp, 1);
+    filp_close(filp, NULL);
+
+    return ret;
+
+exit:
+    if (filp != NULL) {
+        filp_close(filp, NULL);
+    }
+
+    return -1;
+}
+
+static int pca9641_reset_i2c_read(uint32_t bus, uint32_t addr, uint32_t offset_addr,
+               unsigned char *buf, uint32_t size)
+{
+    struct file *fp;
+    struct i2c_client client;
+    char i2c_path[32];
+    int i, j;
+    int rv;
+
+    rv = 0;
+    mem_clear(i2c_path, sizeof(i2c_path));
+    snprintf(i2c_path, sizeof(i2c_path), "/dev/i2c-%d", bus);
+    fp = filp_open(i2c_path, O_RDWR, S_IRUSR | S_IWUSR);
+    if (IS_ERR(fp)) {
+        PCA_DEBUG_ERR("i2c open fail.\n");
+        return -1;
+    }
+    memcpy(&client, fp->private_data, sizeof(struct i2c_client));
+    client.addr = addr;
+    for (j = 0; j < size; j++) {
+        for (i = 0; i < I2C_RETRY_TIMES; i++) {
+            rv = i2c_smbus_read_byte_data(&client, (offset_addr + j));
+            if (rv < 0) {
+                PCA_DEBUG_ERR("i2c read failed, try again.\n");
+                msleep(I2C_RETRY_WAIT_TIMES);
+                if (i >= (I2C_RETRY_TIMES - 1)) {
+                    goto out;
+                }
+                continue;
+          }
+          *(buf + j) = (unsigned char)rv;
+          break;
+        }
+    }
+out:
+    filp_close(fp, NULL);
+    return rv;
+}
+
+static int pca9641_reset_i2c_write(uint32_t bus, uint32_t dev_addr, uint32_t offset_addr,
+               uint8_t write_buf)
+{
+    struct file *fp;
+    struct i2c_client client;
+    char i2c_path[32];
+    int i;
+    int rv;
+
+    rv = 0;
+    mem_clear(i2c_path, sizeof(i2c_path));
+    snprintf(i2c_path, sizeof(i2c_path), "/dev/i2c-%d", bus);
+    fp = filp_open(i2c_path, O_RDWR, S_IRUSR | S_IWUSR);
+    if (IS_ERR(fp)) {
+        PCA_DEBUG_ERR("i2c open fail.\n");
+        return -1;
+    }
+    memcpy(&client, fp->private_data, sizeof(struct i2c_client));
+    client.addr = dev_addr;
+    for (i = 0; i < I2C_RETRY_TIMES; i++) {
+        rv = i2c_smbus_write_byte_data(&client, offset_addr, write_buf);
+        if (rv < 0) {
+            PCA_DEBUG_ERR("i2c write failed, try again.\n");
+            msleep(I2C_RETRY_WAIT_TIMES);
+            if (i >= (I2C_RETRY_TIMES - 1)) {
+                goto out;
+            }
+            continue;
+        }
+        break;
+    }
+out:
+    filp_close(fp, NULL);
+    return rv;
+}
+
+static int pca9641_do_file_reset(struct i2c_mux_core *muxc)
+{
+    int ret, timeout, err;
+    struct pca9541 *data;
+    pca9641_cfg_info_t *reset_cfg;
+    file_attr_t *file_attr;
+    u8 val;
+    int udelay_cnt;
+
+    data = i2c_mux_priv(muxc);
+    reset_cfg = &data->pca9641_cfg_info;
+    file_attr = &reset_cfg->attr.file_attr;
+    ret = -1;
+
+    PCA_DEBUG("rst_delay_b:%u, rst_delay:%u, rst_delay_a:%u.\n",
+        reset_cfg->rst_delay_b, reset_cfg->rst_delay, reset_cfg->rst_delay_a);
+    PCA_DEBUG("dev_name:%s, offset:0x%x, mask:0x%x, on:0x%x, off:0x%x.\n",
+        file_attr->dev_name, file_attr->offset, file_attr->mask,
+        file_attr->reset_on, file_attr->reset_off);
+
+    if (reset_cfg->rst_delay_b) {
+        usleep_range(reset_cfg->rst_delay_b, reset_cfg->rst_delay_b + 1);
+    }
+
+    err = pca9641_reset_file_read(file_attr->dev_name, file_attr->offset, &val, sizeof(val));
+    if (err < 0) {
+        goto out;
+    }
+
+    val &= ~(file_attr->mask);
+    val |= file_attr->reset_on;
+    err = pca9641_reset_file_write(file_attr->dev_name, file_attr->offset, &val, sizeof(val));
+    if (err < 0) {
+        goto out;
+    }
+
+    if (reset_cfg->rst_delay) {
+        usleep_range(reset_cfg->rst_delay, reset_cfg->rst_delay + 1);
+    }
+
+    val &= ~(file_attr->mask);
+    val |= file_attr->reset_off;
+    err = pca9641_reset_file_write(file_attr->dev_name, file_attr->offset, &val, sizeof(val));
+    if (err < 0) {
+        goto out;
+    }
+
+    udelay_cnt = 0;
+    timeout = reset_cfg->rst_delay_a;
+    while (timeout > 0) {
+        usleep_range(1, 2);
+        err = pca9641_reset_file_read(file_attr->dev_name, file_attr->offset, &val, sizeof(val));
+        if (err < 0) {
+            goto out;
+        }
+        val &= (file_attr->mask);
+        if (val == file_attr->reset_off) {
+            ret = 0;
+            PCA_DEBUG("pca9641_do_file_reset success.\n");
+            break;
+        }
+        udelay_cnt++;
+        if ((udelay_cnt % 1000) == 0) {
+            /* 1MS schedule*/
+            schedule();
+        }
+        timeout--;
+    }
+    if (ret < 0) {
+        PCA_DEBUG_ERR("pca9641_do_file_reset timeout.\n");
+    }
+out:
+    if (err < 0) {
+        PCA_DEBUG_ERR("pca9641_do_file_reset file rd/wr failed, ret:%d.\n", err);
+    }
+
+    return ret;
+}
+
+static int pca9641_do_io_reset(struct i2c_mux_core *muxc)
+{
+    int ret, timeout;
+    struct pca9541 *data;
+    pca9641_cfg_info_t *reset_cfg;
+    io_attr_t *io_attr;
+    u8 val;
+    int udelay_cnt;
+
+    data = i2c_mux_priv(muxc);
+    reset_cfg = &data->pca9641_cfg_info;
+    io_attr = &reset_cfg->attr.io_attr;
+
+    PCA_DEBUG("rst_delay_b:%u, rst_delay:%u, rst_delay_a:%u.\n",
+        reset_cfg->rst_delay_b, reset_cfg->rst_delay, reset_cfg->rst_delay_a);
+    PCA_DEBUG("io_addr:0x%x, mask:0x%x, on:0x%x, off:0x%x.\n",
+        io_attr->io_addr, io_attr->mask, io_attr->reset_on, io_attr->reset_off);
+
+    if (reset_cfg->rst_delay_b) {
+        usleep_range(reset_cfg->rst_delay_b, reset_cfg->rst_delay_b + 1);
+    }
+
+    val = inb(io_attr->io_addr);
+    val &= ~(io_attr->mask);
+    val |= io_attr->reset_on;
+    outb(val, io_attr->io_addr);
+
+    if (reset_cfg->rst_delay) {
+        usleep_range(reset_cfg->rst_delay, reset_cfg->rst_delay + 1);
+    }
+
+    val &= ~(io_attr->mask);
+    val |= io_attr->reset_off;
+    outb(val, io_attr->io_addr);
+
+    ret = -1;
+    udelay_cnt = 0;
+    timeout = reset_cfg->rst_delay_a;
+    while (timeout > 0) {
+        usleep_range(1, 2);
+        val = inb(io_attr->io_addr);
+        val &= (io_attr->mask);
+        if (val == io_attr->reset_off) {
+            ret = 0;
+            PCA_DEBUG("pca9641_do_io_reset success.\n");
+            break;
+        }
+        udelay_cnt++;
+        if ((udelay_cnt % 1000) == 0) {
+            /* 1MS schedule*/
+            schedule();
+        }
+        timeout--;
+    }
+
+    if (ret < 0) {
+        PCA_DEBUG_ERR("pca9641_do_io_reset timeout.\n");
+    }
+
+    return ret;
+}
+
+static int pca9641_do_gpio_reset(struct i2c_mux_core *muxc)
+{
+    int ret, timeout;
+    struct pca9541 *data;
+    pca9641_cfg_info_t *reset_cfg;
+    gpio_attr_t *gpio_attr;
+    u8 val;
+    int udelay_cnt;
+
+    data = i2c_mux_priv(muxc);
+    reset_cfg = &data->pca9641_cfg_info;
+    gpio_attr = &reset_cfg->attr.gpio_attr;
+
+    ret = pca9641_gpio_init(gpio_attr);
+    if (ret) {
+        return -1;
+    }
+
+    if (reset_cfg->rst_delay_b) {
+        usleep_range(reset_cfg->rst_delay_b, reset_cfg->rst_delay_b + 1);
+    }
+
+    __gpio_set_value(gpio_attr->gpio, gpio_attr->reset_on);
+
+    if (reset_cfg->rst_delay) {
+        usleep_range(reset_cfg->rst_delay, reset_cfg->rst_delay + 1);
+    }
+
+    __gpio_set_value(gpio_attr->gpio, gpio_attr->reset_off);
+    ret = -1;
+    udelay_cnt = 0;
+    timeout = reset_cfg->rst_delay_a;
+    while (timeout > 0) {
+        usleep_range(1, 2);
+        val = __gpio_get_value(gpio_attr->gpio);
+        if (val == gpio_attr->reset_off) {
+            ret = 0;
+            PCA_DEBUG("pca9641_do_gpio_reset success.\n");
+            break;
+        }
+        udelay_cnt++;
+        if ((udelay_cnt % 1000) == 0) {
+            /* 1MS schedule*/
+            schedule();
+        }
+        timeout--;
+    }
+
+    if (ret < 0) {
+        PCA_DEBUG_ERR("pca9641_do_gpio_reset timeout.\n");
+    }
+
+    pca9641_gpio_free(gpio_attr);
+    return ret;
+}
+
+static int pca9641_do_i2c_reset(struct i2c_mux_core *muxc)
+{
+    int ret, timeout, err;
+    struct pca9541 *data;
+    pca9641_cfg_info_t *reset_cfg;
+    i2c_attr_t *i2c_attr;
+    u8 val;
+    int udelay_cnt;
+
+    data = i2c_mux_priv(muxc);
+    reset_cfg = &data->pca9641_cfg_info;
+    i2c_attr = &reset_cfg->attr.i2c_attr;
+    ret = -1;
+
+    PCA_DEBUG("rst_delay_b:%u, rst_delay:%u, rst_delay_a:%u.\n",
+        reset_cfg->rst_delay_b, reset_cfg->rst_delay, reset_cfg->rst_delay_a);
+    PCA_DEBUG("bus:0x%x, addr:0x%x, reg:0x%x, mask:0x%x, on:0x%x, off:0x%x.\n",
+        i2c_attr->i2c_bus, i2c_attr->i2c_addr, i2c_attr->reg_offset,
+        i2c_attr->mask, i2c_attr->reset_on, i2c_attr->reset_off);
+
+    if (reset_cfg->rst_delay_b) {
+        usleep_range(reset_cfg->rst_delay_b, reset_cfg->rst_delay_b + 1);
+    }
+
+    err = pca9641_reset_i2c_read(i2c_attr->i2c_bus, i2c_attr->i2c_addr,
+              i2c_attr->reg_offset, &val, sizeof(val));
+    if (err < 0) {
+        goto out;
+    }
+
+    val &= ~(i2c_attr->mask);
+    val |= i2c_attr->reset_on;
+    err = pca9641_reset_i2c_write(i2c_attr->i2c_bus, i2c_attr->i2c_addr,
+              i2c_attr->reg_offset, val);
+    if (err < 0) {
+        goto out;
+    }
+
+    if (reset_cfg->rst_delay) {
+        usleep_range(reset_cfg->rst_delay, reset_cfg->rst_delay + 1);
+    }
+
+    val &= ~(i2c_attr->mask);
+    val |= i2c_attr->reset_off;
+    err = pca9641_reset_i2c_write(i2c_attr->i2c_bus, i2c_attr->i2c_addr,
+              i2c_attr->reg_offset, val);
+    if (err < 0) {
+        goto out;
+    }
+
+    udelay_cnt = 0;
+    timeout = reset_cfg->rst_delay_a;
+    while (timeout > 0) {
+        usleep_range(1, 2);
+        err = pca9641_reset_i2c_read(i2c_attr->i2c_bus, i2c_attr->i2c_addr,
+                  i2c_attr->reg_offset, &val, sizeof(val));
+        if (err < 0) {
+            goto out;
+        }
+        val &= (i2c_attr->mask);
+        if (val == i2c_attr->reset_off) {
+            ret = 0;
+            PCA_DEBUG("pca9641_do_i2c_reset success.\n");
+            break;
+        }
+        udelay_cnt++;
+        if ((udelay_cnt % 1000) == 0) {
+            /* 1MS schedule*/
+            schedule();
+        }
+        timeout--;
+    }
+    if (ret < 0) {
+        PCA_DEBUG_ERR("pca9641_do_i2c_reset timeout.\n");
+    }
+out:
+    if (err < 0) {
+        PCA_DEBUG_ERR("pca9641_do_i2c_reset i2c op failed, ret:%d.\n", err);
+    }
+    return ret;
+}
+
+static int pca9641_do_reset(struct i2c_mux_core *muxc)
+{
+    int ret;
+    struct pca9541 *data;
+
+    data = i2c_mux_priv(muxc);
+    if (data->pca9641_cfg_info.pca9641_reset_type == PCA9641_RESET_NONE) {
+        ret = -1;
+        PCA_DEBUG("Don't need to reset.\n");
+    } else if (data->pca9641_cfg_info.pca9641_reset_type == PCA9641_RESET_I2C) {
+        ret = pca9641_do_i2c_reset(muxc);
+    } else if (data->pca9641_cfg_info.pca9641_reset_type == PCA9641_RESET_GPIO) {
+        ret = pca9641_do_gpio_reset(muxc);
+    } else if (data->pca9641_cfg_info.pca9641_reset_type == PCA9641_RESET_IO) {
+        ret = pca9641_do_io_reset(muxc);
+    } else if (data->pca9641_cfg_info.pca9641_reset_type == PCA9641_RESET_FILE) {
+        ret = pca9641_do_file_reset(muxc);
+    } else {
+        ret = -1;
+        PCA_DEBUG_ERR("Unsupport reset type:0x%x.\n",
+            data->pca9641_cfg_info.pca9641_reset_type);
+    }
+
+    if (ret < 0) {
+        PCA_DEBUG_ERR("pca9641_reset_ctrl failed, reset type:%u, ret:%d.\n",
+            data->pca9641_cfg_info.pca9641_reset_type, ret);
+    } else {
+        usleep_range(PCA9641_RESET_DELAY, PCA9641_RESET_DELAY + 1);
+    }
+    return ret;
+}
+
+/*
+ * Write to chip register. Don't use i2c_transfer()/i2c_smbus_xfer()
+ * as they will try to lock the adapter a second time.
+ */
+static int pca9541_reg_write(struct i2c_client *client, u8 command, u8 val)
+{
+	struct i2c_adapter *adap = client->adapter;
+	int ret;
+
+	if (adap->algo->master_xfer) {
+		struct i2c_msg msg;
+		char buf[2];
+
+		msg.addr = client->addr;
+		msg.flags = 0;
+		msg.len = 2;
+		buf[0] = command;
+		buf[1] = val;
+		msg.buf = buf;
+		ret = __i2c_transfer(adap, &msg, 1);
+	} else {
+		union i2c_smbus_data data;
+
+		data.byte = val;
+		ret = adap->algo->smbus_xfer(adap, client->addr,
+					     client->flags,
+					     I2C_SMBUS_WRITE,
+					     command,
+					     I2C_SMBUS_BYTE_DATA, &data);
+	}
+
+	return ret;
+}
+
+/*
+ * Read from chip register. Don't use i2c_transfer()/i2c_smbus_xfer()
+ * as they will try to lock adapter a second time.
+ */
+static int pca9541_reg_read(struct i2c_client *client, u8 command)
+{
+	struct i2c_adapter *adap = client->adapter;
+	int ret;
+	u8 val;
+
+	if (adap->algo->master_xfer) {
+		struct i2c_msg msg[2] = {
+			{
+				.addr = client->addr,
+				.flags = 0,
+				.len = 1,
+				.buf = &command
+			},
+			{
+				.addr = client->addr,
+				.flags = I2C_M_RD,
+				.len = 1,
+				.buf = &val
+			}
+		};
+		ret = __i2c_transfer(adap, msg, 2);
+		if (ret == 2)
+			ret = val;
+		else if (ret >= 0)
+			ret = -EIO;
+	} else {
+		union i2c_smbus_data data;
+
+		ret = adap->algo->smbus_xfer(adap, client->addr,
+					     client->flags,
+					     I2C_SMBUS_READ,
+					     command,
+					     I2C_SMBUS_BYTE_DATA, &data);
+		if (!ret)
+			ret = data.byte;
+	}
+	return ret;
+}
+
+/*
+ * Arbitration management functions
+ */
+
+/* Release bus. Also reset NTESTON and BUSINIT if it was set. */
+static void pca9541_release_bus(struct i2c_client *client)
+{
+	int reg;
+
+	reg = pca9541_reg_read(client, PCA9541_CONTROL);
+	if (reg >= 0 && !busoff(reg) && mybus(reg))
+		pca9541_reg_write(client, PCA9541_CONTROL,
+				  (reg & PCA9541_CTL_NBUSON) >> 1);
+}
+
+/*
+ * Arbitration is defined as a two-step process. A bus master can only activate
+ * the slave bus if it owns it; otherwise it has to request ownership first.
+ * This multi-step process ensures that access contention is resolved
+ * gracefully.
+ *
+ * Bus	Ownership	Other master	Action
+ * state		requested access
+ * ----------------------------------------------------
+ * off	-		yes		wait for arbitration timeout or
+ *					for other master to drop request
+ * off	no		no		take ownership
+ * off	yes		no		turn on bus
+ * on	yes		-		done
+ * on	no		-		wait for arbitration timeout or
+ *					for other master to release bus
+ *
+ * The main contention point occurs if the slave bus is off and both masters
+ * request ownership at the same time. In this case, one master will turn on
+ * the slave bus, believing that it owns it. The other master will request
+ * bus ownership. Result is that the bus is turned on, and master which did
+ * _not_ own the slave bus before ends up owning it.
+ */
+
+/* Control commands per PCA9541 datasheet */
+static const u8 pca9541_control[16] = {
+	4, 0, 1, 5, 4, 4, 5, 5, 0, 0, 1, 1, 0, 4, 5, 1
+};
+
+/*
+ * Channel arbitration
+ *
+ * Return values:
+ *  <0: error
+ *  0 : bus not acquired
+ *  1 : bus acquired
+ */
+static int pca9541_arbitrate(struct i2c_client *client)
+{
+	struct i2c_mux_core *muxc = i2c_get_clientdata(client);
+	struct pca9541 *data = i2c_mux_priv(muxc);
+	int reg;
+
+	reg = pca9541_reg_read(client, PCA9541_CONTROL);
+	if (reg < 0)
+		return reg;
+
+	if (busoff(reg)) {
+		int istat;
+		/*
+		 * Bus is off. Request ownership or turn it on unless
+		 * other master requested ownership.
+		 */
+		istat = pca9541_reg_read(client, PCA9541_ISTAT);
+		if (!(istat & PCA9541_ISTAT_NMYTEST)
+		    || time_is_before_eq_jiffies(data->arb_timeout)) {
+			/*
+			 * Other master did not request ownership,
+			 * or arbitration timeout expired. Take the bus.
+			 */
+			pca9541_reg_write(client,
+					  PCA9541_CONTROL,
+					  pca9541_control[reg & 0x0f]
+					  | PCA9541_CTL_NTESTON);
+			data->select_timeout = SELECT_DELAY_SHORT;
+		} else {
+			/*
+			 * Other master requested ownership.
+			 * Set extra long timeout to give it time to acquire it.
+			 */
+			data->select_timeout = SELECT_DELAY_LONG * 2;
+		}
+	} else if (mybus(reg)) {
+		/*
+		 * Bus is on, and we own it. We are done with acquisition.
+		 * Reset NTESTON and BUSINIT, then return success.
+		 */
+		if (reg & (PCA9541_CTL_NTESTON | PCA9541_CTL_BUSINIT))
+			pca9541_reg_write(client,
+					  PCA9541_CONTROL,
+					  reg & ~(PCA9541_CTL_NTESTON
+						  | PCA9541_CTL_BUSINIT));
+		return 1;
+	} else {
+		/*
+		 * Other master owns the bus.
+		 * If arbitration timeout has expired, force ownership.
+		 * Otherwise request it.
+		 */
+		data->select_timeout = SELECT_DELAY_LONG;
+		if (time_is_before_eq_jiffies(data->arb_timeout)) {
+			/* Time is up, take the bus and reset it. */
+			pca9541_reg_write(client,
+					  PCA9541_CONTROL,
+					  pca9541_control[reg & 0x0f]
+					  | PCA9541_CTL_BUSINIT
+					  | PCA9541_CTL_NTESTON);
+		} else {
+			/* Request bus ownership if needed */
+			if (!(reg & PCA9541_CTL_NTESTON))
+				pca9541_reg_write(client,
+						  PCA9541_CONTROL,
+						  reg | PCA9541_CTL_NTESTON);
+		}
+	}
+	return 0;
+}
+
+static int pca9541_select_chan(struct i2c_mux_core *muxc, u32 chan)
+{
+	struct pca9541 *data = i2c_mux_priv(muxc);
+	struct i2c_client *client = data->client;
+	int ret;
+	unsigned long timeout = jiffies + ARB2_TIMEOUT;
+		/* give up after this time */
+
+	data->arb_timeout = jiffies + ARB_TIMEOUT;
+		/* force bus ownership after this time */
+
+	do {
+		ret = pca9541_arbitrate(client);
+		if (ret)
+			return ret < 0 ? ret : 0;
+
+		if (data->select_timeout == SELECT_DELAY_SHORT)
+			udelay(data->select_timeout);
+		else
+			msleep(data->select_timeout / 1000);
+	} while (time_is_after_eq_jiffies(timeout));
+
+    dev_warn(&client->dev, "pca9541 select channel timeout.\n");
+	return -ETIMEDOUT;
+}
+
+static int pca9541_release_chan(struct i2c_mux_core *muxc, u32 chan)
+{
+    struct pca9541 *data = i2c_mux_priv(muxc);
+	struct i2c_client *client = data->client;
+	pca9541_release_bus(client);
+	return 0;
+}
+
+/*
+* Arbitration management functions
+*/
+static void pca9641_release_bus(struct i2c_client *client)
+{
+   pca9541_reg_write(client, PCA9641_CONTROL, 0x80); //master 0x80
+}
+
+/*
+* Channel arbitration
+*
+* Return values:
+*  <0: error
+*  0 : bus not acquired
+*  1 : bus acquired
+*/
+static int pca9641_arbitrate(struct i2c_client *client)
+{
+    struct i2c_mux_core *muxc = i2c_get_clientdata(client);
+    struct pca9541 *data = i2c_mux_priv(muxc);
+    int reg_ctl, reg_sts;
+
+    reg_ctl = pca9541_reg_read(client, PCA9641_CONTROL);
+    if (reg_ctl < 0) {
+        PCA_DEBUG_ERR("pca9641 read control register failed, ret:%d.\n", reg_ctl);
+        return reg_ctl;
+    }
+
+    reg_sts = pca9541_reg_read(client, PCA9641_STATUS);
+    if (reg_sts < 0) {
+        PCA_DEBUG_ERR("pca9641 read status register failed, ret:%d.\n", reg_sts);
+        return reg_sts;
+    }
+
+    if (BUSOFF(reg_ctl, reg_sts)) {
+        /*
+         * Bus is off. Request ownership or turn it on unless
+         * other master requested ownership.
+         */
+        reg_ctl |= PCA9641_CTL_LOCK_REQ;
+        pca9541_reg_write(client, PCA9641_CONTROL, reg_ctl);
+        reg_ctl = pca9541_reg_read(client, PCA9641_CONTROL);
+        if (reg_ctl < 0) {
+            PCA_DEBUG_ERR("Bus is off, but read control register failed, ret:%d.\n", reg_ctl);
+            return reg_ctl;
+        }
+
+        if (lock_grant(reg_ctl)) {
+            /*
+            * Other master did not request ownership,
+            * or arbitration timeout expired. Take the bus.
+            */
+            PCA_DEBUG("Bus is off, get pca9641 arbitration success.\n");
+            reg_ctl |= PCA9641_CTL_BUS_CONNECT | PCA9641_CTL_LOCK_REQ;
+            pca9541_reg_write(client, PCA9641_CONTROL, reg_ctl);
+            return 1;
+        } else {
+            /*
+            * Other master requested ownership.
+            * Set extra long timeout to give it time to acquire it.
+            */
+            PCA_DEBUG("Bus is off, but get pca9641 arbitration failed.\n");
+            data->select_timeout = SELECT_DELAY_LONG * 2;
+        }
+    } else if (lock_grant(reg_ctl)) {
+        /*
+        * Bus is on, and we own it. We are done with acquisition.
+        */
+        PCA_DEBUG("Bus is on, get pca9641 arbitration success.\n");
+        reg_ctl |= PCA9641_CTL_BUS_CONNECT | PCA9641_CTL_LOCK_REQ;
+        pca9541_reg_write(client, PCA9641_CONTROL, reg_ctl);
+        return 1;
+    } else if (other_lock(reg_sts)) {
+        /*
+        * Other master owns the bus.
+        * If arbitration timeout has expired, force ownership.
+        * Otherwise request it.
+        */
+        PCA_DEBUG("Other master owns the bus, try to request it.\n");
+        data->select_timeout = SELECT_DELAY_LONG;
+        reg_ctl |= PCA9641_CTL_LOCK_REQ;
+        pca9541_reg_write(client, PCA9641_CONTROL, reg_ctl);
+    }
+    return 0;
+}
+
+int pca9641_select_chan_single(struct i2c_mux_core *muxc, u32 chan)
+{
+	struct pca9541 *data = i2c_mux_priv(muxc);
+    struct i2c_client *client = data->client;
+    int ret;
+    int result;
+    unsigned long msleep_time;
+    unsigned long timeout = jiffies + ARB2_TIMEOUT;
+    /* give up after this time */
+    data->arb_timeout = jiffies + ARB_TIMEOUT;
+    /* force bus ownership after this time */
+   	for (result = 0 ; result < PCA9641_RETRY_TIME ; result ++) {
+   	   do {
+   		   ret = pca9641_arbitrate(client);
+           if (ret) {
+               return ret < 0 ? -EIO : 0;
+           }
+           msleep_time = data->select_timeout / 1000;
+           if (msleep_time < 1) {
+               msleep(1);
+           } else {
+               msleep(msleep_time);
+           }
+   	   } while (time_is_after_eq_jiffies(timeout));
+       timeout = jiffies + ARB2_TIMEOUT;
+   	}
+    dev_warn(&client->dev, "pca9641 select channel timeout.\n");
+    return -ETIMEDOUT;
+}
+
+static int pca9641_select_chan(struct i2c_mux_core *muxc, u32 chan)
+{
+    int ret, rv;
+
+    ret = pca9641_select_chan_single(muxc, chan);
+    if (ret < 0) {
+        PCA_DEBUG_ERR("pca9641 select channel failed, ret:%d, try to reset pca9641.\n", ret);
+        rv = pca9641_do_reset(muxc);
+
+        if (rv < 0) {
+            PCA_DEBUG_ERR("pca9641 reset failed, rv:%d.\n", rv);
+            return ret;
+        }
+
+        ret = pca9641_select_chan_single(muxc, chan);
+        if (ret < 0) {
+            PCA_DEBUG_ERR("after pca9641 reset, select channel still failed, ret:%d.\n", ret);
+        }
+    }
+    return ret;
+}
+
+static int pca9641_release_chan(struct i2c_mux_core *muxc, u32 chan)
+{
+	struct pca9541 *data = i2c_mux_priv(muxc);
+	struct i2c_client *client = data->client;
+	if (pca_flag.flag) {
+		pca9641_release_bus(client);
+	}
+	return 0;
+}
+
+static int pca9641_detect_id(struct i2c_client *client)
+{
+#if 0
+   int reg;
+
+   reg = pca9541_reg_read(client, PCA9641_ID);
+   if (reg == PCA9641_ID_MAGIC)
+           return 1;
+   else
+           return 0;
+#endif
+    /* only support pca9641 */
+    return 1;
+}
+
+static int pca9641_recordflag(struct i2c_adapter *adap) {
+    if (pca_flag.flag != -1) {
+        pr_err(" %s %d has init already!!!", __func__, __LINE__);
+        return -1 ;
+    }
+    pca_flag.nr = adap->nr;
+	PCA_DEBUG(" adap->nr:%d\n",  adap->nr);
+	snprintf(pca_flag.name, sizeof(pca_flag.name),adap->name);
+    return 0;
+}
+
+static int of_pca9641_reset_data_init(struct pca9541 *data)
+{
+    int err;
+    struct device *dev = &data->client->dev;
+    pca9641_cfg_info_t *reset_cfg;
+
+    reset_cfg = &data->pca9641_cfg_info;
+    if (dev == NULL || dev->of_node == NULL) {
+        PCA_DEBUG("dev or dev->of_node is NUll, no reset.\n");
+        reset_cfg->pca9641_reset_type = PCA9641_RESET_NONE;
+        return 0;
+    }
+
+    if (of_property_read_u32(dev->of_node, "pca9641_reset_type", &reset_cfg->pca9641_reset_type)) {
+
+        PCA_DEBUG("pca9641_reset_type not found, no reset.\n");
+        reset_cfg->pca9641_reset_type = PCA9641_RESET_NONE;
+        return 0;
+    }
+    err = of_property_read_u32(dev->of_node, "rst_delay_b", &reset_cfg->rst_delay_b);
+    err |= of_property_read_u32(dev->of_node, "rst_delay", &reset_cfg->rst_delay);
+    err |= of_property_read_u32(dev->of_node, "rst_delay_a", &reset_cfg->rst_delay_a);
+
+    if (err) {
+        goto dts_config_err;
+    }
+    PCA_DEBUG("reset_type:0x%x, rst_delay_b:0x%x, rst_delay:0x%x, rst_delay_a:0x%x.\n",
+        reset_cfg->pca9641_reset_type, reset_cfg->rst_delay_b,
+        reset_cfg->rst_delay, reset_cfg->rst_delay_a);
+
+    if (reset_cfg->pca9641_reset_type == PCA9641_RESET_I2C) {
+
+        PCA_DEBUG("reset by i2c.\n");
+        err = of_property_read_u32(dev->of_node, "i2c_bus", &reset_cfg->attr.i2c_attr.i2c_bus);
+        err |=of_property_read_u32(dev->of_node, "i2c_addr", &reset_cfg->attr.i2c_attr.i2c_addr);
+        err |=of_property_read_u32(dev->of_node, "reg_offset", &reset_cfg->attr.i2c_attr.reg_offset);
+        err |=of_property_read_u32(dev->of_node, "mask", &reset_cfg->attr.i2c_attr.mask);
+        err |=of_property_read_u32(dev->of_node, "reset_on", &reset_cfg->attr.i2c_attr.reset_on);
+        err |=of_property_read_u32(dev->of_node, "reset_off", &reset_cfg->attr.i2c_attr.reset_off);
+        if (err) {
+            goto dts_config_err;
+        }
+        PCA_DEBUG("bus:%u, addr:0x%x, offset:0x%x, mask:0x%x, on:0x%x, off:0x%x.\n",
+            reset_cfg->attr.i2c_attr.i2c_bus, reset_cfg->attr.i2c_attr.i2c_addr,
+            reset_cfg->attr.i2c_attr.reg_offset, reset_cfg->attr.i2c_attr.mask,
+            reset_cfg->attr.i2c_attr.reset_on, reset_cfg->attr.i2c_attr.reset_off);
+    } else if (reset_cfg->pca9641_reset_type == PCA9641_RESET_GPIO) {
+
+        PCA_DEBUG("reset by gpio.\n");
+        err = of_property_read_u32(dev->of_node, "gpio", &reset_cfg->attr.gpio_attr.gpio);
+        err |=of_property_read_u32(dev->of_node, "reset_on", &reset_cfg->attr.gpio_attr.reset_on);
+        err |=of_property_read_u32(dev->of_node, "reset_off", &reset_cfg->attr.gpio_attr.reset_off);
+        if (err) {
+            goto dts_config_err;
+        }
+        PCA_DEBUG("gpio number:%u, reset_on:0x%x, reset_off:0x%x.\n",
+            reset_cfg->attr.gpio_attr.gpio, reset_cfg->attr.gpio_attr.reset_on,
+            reset_cfg->attr.gpio_attr.reset_off);
+        reset_cfg->attr.gpio_attr.gpio_init = 0;
+    } else if (reset_cfg->pca9641_reset_type == PCA9641_RESET_IO) {
+
+        PCA_DEBUG("reset by io.\n");
+        err = of_property_read_u32(dev->of_node, "io_addr", &reset_cfg->attr.io_attr.io_addr);
+        err |=of_property_read_u32(dev->of_node, "mask", &reset_cfg->attr.io_attr.mask);
+        err |=of_property_read_u32(dev->of_node, "reset_on", &reset_cfg->attr.io_attr.reset_on);
+        err |=of_property_read_u32(dev->of_node, "reset_off", &reset_cfg->attr.io_attr.reset_off);
+        if (err) {
+            goto dts_config_err;
+        }
+        PCA_DEBUG("io_addr:0x%x, mask:0x%x, reset_on:0x%x, reset_off:0x%x.\n",
+            reset_cfg->attr.io_attr.io_addr, reset_cfg->attr.io_attr.mask,
+            reset_cfg->attr.io_attr.reset_on, reset_cfg->attr.io_attr.reset_off);
+    } else if (reset_cfg->pca9641_reset_type == PCA9641_RESET_FILE) {
+
+        PCA_DEBUG("reset by file.\n");
+        err = of_property_read_string(dev->of_node, "dev_name", &reset_cfg->attr.file_attr.dev_name);
+        err |=of_property_read_u32(dev->of_node, "offset", &reset_cfg->attr.file_attr.offset);
+        err |=of_property_read_u32(dev->of_node, "mask", &reset_cfg->attr.file_attr.mask);
+        err |=of_property_read_u32(dev->of_node, "reset_on", &reset_cfg->attr.file_attr.reset_on);
+        err |=of_property_read_u32(dev->of_node, "reset_off", &reset_cfg->attr.file_attr.reset_off);
+        if (err) {
+            goto dts_config_err;
+        }
+        PCA_DEBUG("dev_name:%s, mask:0x%x, reset_on:0x%x, reset_off:0x%x.\n",
+            reset_cfg->attr.file_attr.dev_name, reset_cfg->attr.file_attr.mask,
+            reset_cfg->attr.file_attr.reset_on, reset_cfg->attr.file_attr.reset_off);
+    } else {
+        PCA_DEBUG_ERR("Unsupport reset type:%d.\n", reset_cfg->pca9641_reset_type);
+        goto dts_config_err;
+    }
+    return 0;
+dts_config_err:
+    PCA_DEBUG_ERR("dts config error, ret:%d.\n", err);
+    return -EINVAL;
+}
+
+static int pca9641_reset_data_init(struct pca9541 *data)
+{
+    pca9641_cfg_info_t *reset_cfg;
+    i2c_mux_pca9641_device_t *i2c_mux_pca9641_device;
+
+    if (data->client->dev.platform_data == NULL) {
+        PCA_DEBUG("pca9641 has no reset platform data config.\n");
+        return 0;
+    }
+    reset_cfg = &data->pca9641_cfg_info;
+    i2c_mux_pca9641_device = data->client->dev.platform_data;
+    reset_cfg->pca9641_reset_type = i2c_mux_pca9641_device->pca9641_reset_type;
+    if (reset_cfg->pca9641_reset_type == PCA9641_RESET_NONE) {
+        PCA_DEBUG("pca9641 has no reset function.\n");
+        return 0;
+    }
+
+    reset_cfg->rst_delay_b = i2c_mux_pca9641_device->rst_delay_b;
+    reset_cfg->rst_delay = i2c_mux_pca9641_device->rst_delay;
+    reset_cfg->rst_delay_a = i2c_mux_pca9641_device->rst_delay_a;
+    PCA_DEBUG("reset_type:0x%x, rst_delay_b:0x%x, rst_delay:0x%x, rst_delay_a:0x%x.\n",
+        reset_cfg->pca9641_reset_type, reset_cfg->rst_delay_b,
+        reset_cfg->rst_delay, reset_cfg->rst_delay_a);
+
+    if (reset_cfg->pca9641_reset_type == PCA9641_RESET_I2C) {
+
+        PCA_DEBUG("reset by i2c.\n");
+        reset_cfg->attr.i2c_attr.i2c_bus = i2c_mux_pca9641_device->attr.i2c_attr.i2c_bus;
+        reset_cfg->attr.i2c_attr.i2c_addr = i2c_mux_pca9641_device->attr.i2c_attr.i2c_addr;
+        reset_cfg->attr.i2c_attr.reg_offset = i2c_mux_pca9641_device->attr.i2c_attr.reg_offset;
+        reset_cfg->attr.i2c_attr.mask = i2c_mux_pca9641_device->attr.i2c_attr.mask;
+        reset_cfg->attr.i2c_attr.reset_on = i2c_mux_pca9641_device->attr.i2c_attr.reset_on;
+        reset_cfg->attr.i2c_attr.reset_off = i2c_mux_pca9641_device->attr.i2c_attr.reset_off;
+        PCA_DEBUG("bus:%u, addr:0x%x, offset:0x%x, mask:0x%x, on:0x%x, off:0x%x.\n",
+            reset_cfg->attr.i2c_attr.i2c_bus, reset_cfg->attr.i2c_attr.i2c_addr,
+            reset_cfg->attr.i2c_attr.reg_offset, reset_cfg->attr.i2c_attr.mask,
+            reset_cfg->attr.i2c_attr.reset_on, reset_cfg->attr.i2c_attr.reset_off);
+    } else if (reset_cfg->pca9641_reset_type == PCA9641_RESET_GPIO) {
+
+        PCA_DEBUG("reset by gpio.\n");
+        reset_cfg->attr.gpio_attr.gpio = i2c_mux_pca9641_device->attr.gpio_attr.gpio;
+        reset_cfg->attr.gpio_attr.reset_on = i2c_mux_pca9641_device->attr.gpio_attr.reset_on;
+        reset_cfg->attr.gpio_attr.reset_off = i2c_mux_pca9641_device->attr.gpio_attr.reset_off;
+        PCA_DEBUG("gpio number:%u, reset_on:0x%x, reset_off:0x%x.\n",
+            reset_cfg->attr.gpio_attr.gpio, reset_cfg->attr.gpio_attr.reset_on,
+            reset_cfg->attr.gpio_attr.reset_off);
+        reset_cfg->attr.gpio_attr.gpio_init = 0;
+    } else if (reset_cfg->pca9641_reset_type == PCA9641_RESET_IO) {
+
+        PCA_DEBUG("reset by io.\n");
+        reset_cfg->attr.io_attr.io_addr = i2c_mux_pca9641_device->attr.io_attr.io_addr;
+        reset_cfg->attr.io_attr.mask = i2c_mux_pca9641_device->attr.io_attr.mask;
+        reset_cfg->attr.io_attr.reset_on = i2c_mux_pca9641_device->attr.io_attr.reset_on;
+        reset_cfg->attr.io_attr.reset_off = i2c_mux_pca9641_device->attr.io_attr.reset_off;
+        PCA_DEBUG("io_addr:0x%x, mask:0x%x, reset_on:0x%x, reset_off:0x%x.\n",
+            reset_cfg->attr.io_attr.io_addr, reset_cfg->attr.io_attr.mask,
+            reset_cfg->attr.io_attr.reset_on, reset_cfg->attr.io_attr.reset_off);
+    } else if (reset_cfg->pca9641_reset_type == PCA9641_RESET_FILE) {
+
+        PCA_DEBUG("reset by file.\n");
+        reset_cfg->attr.file_attr.dev_name = i2c_mux_pca9641_device->attr.file_attr.dev_name;
+        reset_cfg->attr.file_attr.offset = i2c_mux_pca9641_device->attr.file_attr.offset;
+        reset_cfg->attr.file_attr.mask = i2c_mux_pca9641_device->attr.file_attr.mask;
+        reset_cfg->attr.file_attr.reset_on = i2c_mux_pca9641_device->attr.file_attr.reset_on;
+        reset_cfg->attr.file_attr.reset_off = i2c_mux_pca9641_device->attr.file_attr.reset_off;
+        PCA_DEBUG("dev_name:%s, mask:0x%x, reset_on:0x%x, reset_off:0x%x.\n",
+            reset_cfg->attr.file_attr.dev_name, reset_cfg->attr.file_attr.mask,
+            reset_cfg->attr.file_attr.reset_on, reset_cfg->attr.file_attr.reset_off);
+    } else {
+        PCA_DEBUG_ERR("Unsupport reset type:%d.\n", reset_cfg->pca9641_reset_type);
+        return -EINVAL;
+    }
+    return 0;
+}
+
+/*
+ * I2C init/probing/exit functions
+ */
+static int pca9541_probe(struct i2c_client *client, const struct i2c_device_id *id)
+{
+    struct i2c_adapter *adap = client->adapter;
+    struct i2c_mux_core *muxc;
+    struct pca9541 *data;
+    int force;
+    int ret = -ENODEV;
+    int detect_id;
+    i2c_mux_pca9641_device_t *i2c_mux_pca9641_device;
+
+    if (!i2c_check_functionality(adap, I2C_FUNC_SMBUS_BYTE_DATA))
+        return -ENODEV;
+
+    detect_id = pca9641_detect_id(client);
+
+    /*
+     * I2C accesses are unprotected here.
+     * We have to lock the adapter before releasing the bus.
+     */
+    if (detect_id == 0) {
+        i2c_lock_bus(adap, I2C_LOCK_ROOT_ADAPTER);
+        pca9541_release_bus(client);
+        i2c_unlock_bus(adap, I2C_LOCK_ROOT_ADAPTER);
+    } else {
+        i2c_lock_bus(adap, I2C_LOCK_ROOT_ADAPTER);
+        pca9641_release_bus(client);
+        i2c_unlock_bus(adap, I2C_LOCK_ROOT_ADAPTER);
+    }
+
+    if (detect_id == 0) { /* pca9541 */
+        muxc = i2c_mux_alloc(adap, &client->dev, 1, sizeof(*data),
+                     I2C_MUX_ARBITRATOR,
+                     pca9541_select_chan, pca9541_release_chan);
+        if (!muxc)
+            return -ENOMEM;
+
+        data = i2c_mux_priv(muxc);
+        data->client = client;
+
+        i2c_set_clientdata(client, muxc);
+        /* Create mux adapter */
+        if (of_property_read_u32(client->dev.of_node, "pca9641_nr", &data->pca9641_nr)) {
+
+            force = 0;
+            PCA_DEBUG("pca9641_nr not found, use dynamic adap number.\n");
+        } else {
+            force = data->pca9641_nr;
+            PCA_DEBUG("pca9641_nr: %d.\n", force);
+        }
+
+        ret = i2c_mux_add_adapter(muxc, force, 0, 0);
+        if (ret)
+            return ret;
+    } else {
+        muxc = i2c_mux_alloc(adap, &client->dev, 1, sizeof(*data), I2C_MUX_ARBITRATOR,
+                   pca9641_select_chan, pca9641_release_chan);
+        if (!muxc) {
+            dev_err(&client->dev, "i2c_mux_alloc failed, out of memory.\n");
+            return -ENOMEM;
+        }
+
+        data = i2c_mux_priv(muxc);
+        data->client = client;
+
+        i2c_set_clientdata(client, muxc);
+
+        if (client->dev.of_node) {
+            ret= of_pca9641_reset_data_init(data);
+        } else {
+            ret= pca9641_reset_data_init(data);
+        }
+        if (ret < 0) {
+            dev_err(&client->dev, "pca9641 reset config err, ret:%d.\n", ret);
+            return ret;
+        }
+
+        if (client->dev.of_node == NULL) {
+            if (client->dev.platform_data == NULL) {
+                force = 0;
+                PCA_DEBUG("platform data is NULL, use dynamic adap number.\n");
+            } else {
+                i2c_mux_pca9641_device = client->dev.platform_data;
+                data->pca9641_nr = i2c_mux_pca9641_device->pca9641_nr;
+                if (data->pca9641_nr == 0) {
+                    force = 0;
+                    PCA_DEBUG("pca9641_nr = 0, use dynamic adap number.\n");
+                } else {
+                    force = data->pca9641_nr;
+                    PCA_DEBUG("pca9641_nr: %d.\n", force);
+                }
+            }
+        } else {
+            /* Create mux adapter */
+            if (of_property_read_u32(client->dev.of_node, "pca9641_nr", &data->pca9641_nr)) {
+
+                force = 0;
+                PCA_DEBUG("pca9641_nr not found, use dynamic adap number.\n");
+            } else {
+                force = data->pca9641_nr;
+                PCA_DEBUG("pca9641_nr: %d.\n", force);
+            }
+        }
+
+        ret = i2c_mux_add_adapter(muxc, force, 0, 0);
+        if (ret) {
+            dev_err(&client->dev, "Failed to register master selector.\n");
+            return ret;
+        }
+    }
+    pca9641_recordflag(muxc->adapter[0]);
+
+    dev_info(&client->dev, "registered master selector for I2C %s\n", client->name);
+
+    return 0;
+}
+
+static void pca9541_remove(struct i2c_client *client)
+{
+	struct i2c_mux_core *muxc = i2c_get_clientdata(client);
+
+	i2c_mux_del_adapters(muxc);
+	return;
+}
+
+static struct i2c_driver pca9641_driver = {
+	.driver = {
+		   .name = "wb_pca9641",
+           .of_match_table = of_match_ptr(pca9541_of_match),
+		   },
+	.probe = pca9541_probe,
+	.remove = pca9541_remove,
+	.id_table = pca9541_id,
+};
+
+module_i2c_driver(pca9641_driver);
+MODULE_AUTHOR("support");
+MODULE_DESCRIPTION("PCA9541 I2C master selector driver");
+MODULE_LICENSE("GPL v2");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_mux_pca9641.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_mux_pca9641.h
new file mode 100644
index 000000000..b87f75855
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_mux_pca9641.h
@@ -0,0 +1,64 @@
+#ifndef __WB_I2C_MUX_PCA9641_H__
+#define __WB_I2C_MUX_PCA9641_H__
+
+#include <linux/string.h>
+
+#define mem_clear(data, size) memset((data), 0, (size))
+
+typedef enum pca9641_reset_type_s {
+    PCA9641_RESET_NONE = 0,
+    PCA9641_RESET_I2C = 1,
+    PCA9641_RESET_GPIO = 2,
+    PCA9641_RESET_IO = 3,
+    PCA9641_RESET_FILE = 4,
+} pca9641_reset_type_t;
+
+typedef struct i2c_attr_s {
+    uint32_t i2c_bus;
+    uint32_t i2c_addr;
+    uint32_t reg_offset;
+    uint32_t mask;
+    uint32_t reset_on;
+    uint32_t reset_off;
+} i2c_attr_t;
+
+typedef struct io_attr_s {
+    uint32_t io_addr;
+    uint32_t mask;
+    uint32_t reset_on;
+    uint32_t reset_off;
+} io_attr_t;
+
+typedef struct file_attr_s {
+    const char *dev_name;
+    uint32_t offset;
+    uint32_t mask;
+    uint32_t reset_on;
+    uint32_t reset_off;
+} file_attr_t;
+
+typedef struct gpio_attr_s {
+    int gpio_init;
+    uint32_t gpio;
+    uint32_t reset_on;
+    uint32_t reset_off;
+} gpio_attr_t;
+
+typedef struct i2c_mux_pca9641_device_s {
+    struct i2c_client *client;
+    uint32_t i2c_bus;
+    uint32_t i2c_addr;
+    uint32_t pca9641_nr;
+    uint32_t pca9641_reset_type;
+    uint32_t rst_delay_b;                   /* delay time before reset(us) */
+    uint32_t rst_delay;                     /* reset time(us) */
+    uint32_t rst_delay_a;                   /* delay time after reset(us) */
+    union {
+        i2c_attr_t i2c_attr;
+        gpio_attr_t gpio_attr;
+        io_attr_t io_attr;
+        file_attr_t file_attr;
+    } attr;
+} i2c_mux_pca9641_device_t;
+
+#endif
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_ina3221.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_ina3221.c
new file mode 100644
index 000000000..05b6da028
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_ina3221.c
@@ -0,0 +1,1031 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * INA3221 Triple Current/Voltage Monitor
+ *
+ * Copyright (C) 2016 Texas Instruments Incorporated - https://www.ti.com/
+ *    Andrew F. Davis <afd@ti.com>
+ */
+
+#include <linux/hwmon.h>
+#include <linux/hwmon-sysfs.h>
+#include <linux/i2c.h>
+#include <linux/module.h>
+#include <linux/mutex.h>
+#include <linux/of.h>
+#include <linux/pm_runtime.h>
+#include <linux/regmap.h>
+#include <linux/util_macros.h>
+
+#define INA3221_DRIVER_NAME        "wb_ina3221"
+
+#define INA3221_CONFIG             0x00
+#define INA3221_SHUNT1             0x01
+#define INA3221_BUS1               0x02
+#define INA3221_SHUNT2             0x03
+#define INA3221_BUS2               0x04
+#define INA3221_SHUNT3             0x05
+#define INA3221_BUS3               0x06
+#define INA3221_CRIT1              0x07
+#define INA3221_WARN1              0x08
+#define INA3221_CRIT2              0x09
+#define INA3221_WARN2              0x0a
+#define INA3221_CRIT3              0x0b
+#define INA3221_WARN3              0x0c
+#define INA3221_SHUNT_SUM          0x0d
+#define INA3221_CRIT_SUM           0x0e
+#define INA3221_MASK_ENABLE        0x0f
+
+#define INA3221_CONFIG_MODE_MASK    GENMASK(2, 0)
+#define INA3221_CONFIG_MODE_POWERDOWN    0
+#define INA3221_CONFIG_MODE_SHUNT    BIT(0)
+#define INA3221_CONFIG_MODE_BUS        BIT(1)
+#define INA3221_CONFIG_MODE_CONTINUOUS    BIT(2)
+#define INA3221_CONFIG_VSH_CT_SHIFT    3
+#define INA3221_CONFIG_VSH_CT_MASK    GENMASK(5, 3)
+#define INA3221_CONFIG_VSH_CT(x)    (((x) & GENMASK(5, 3)) >> 3)
+#define INA3221_CONFIG_VBUS_CT_SHIFT    6
+#define INA3221_CONFIG_VBUS_CT_MASK    GENMASK(8, 6)
+#define INA3221_CONFIG_VBUS_CT(x)    (((x) & GENMASK(8, 6)) >> 6)
+#define INA3221_CONFIG_AVG_SHIFT    9
+#define INA3221_CONFIG_AVG_MASK        GENMASK(11, 9)
+#define INA3221_CONFIG_AVG(x)        (((x) & GENMASK(11, 9)) >> 9)
+#define INA3221_CONFIG_CHs_EN_MASK    GENMASK(14, 12)
+#define INA3221_CONFIG_CHx_EN(x)    BIT(14 - (x))
+
+#define INA3221_MASK_ENABLE_SCC_MASK    GENMASK(14, 12)
+
+#define INA3221_CONFIG_DEFAULT        0x7127
+#define INA3221_RSHUNT_DEFAULT        10000
+
+enum ina3221_fields {
+    /* Configuration */
+    F_RST,
+
+    /* Status Flags */
+    F_CVRF,
+
+    /* Warning Flags */
+    F_WF3, F_WF2, F_WF1,
+
+    /* Alert Flags: SF is the summation-alert flag */
+    F_SF, F_CF3, F_CF2, F_CF1,
+
+    /* sentinel */
+    F_MAX_FIELDS
+};
+
+static const struct reg_field ina3221_reg_fields[] = {
+    [F_RST] = REG_FIELD(INA3221_CONFIG, 15, 15),
+
+    [F_CVRF] = REG_FIELD(INA3221_MASK_ENABLE, 0, 0),
+    [F_WF3] = REG_FIELD(INA3221_MASK_ENABLE, 3, 3),
+    [F_WF2] = REG_FIELD(INA3221_MASK_ENABLE, 4, 4),
+    [F_WF1] = REG_FIELD(INA3221_MASK_ENABLE, 5, 5),
+    [F_SF] = REG_FIELD(INA3221_MASK_ENABLE, 6, 6),
+    [F_CF3] = REG_FIELD(INA3221_MASK_ENABLE, 7, 7),
+    [F_CF2] = REG_FIELD(INA3221_MASK_ENABLE, 8, 8),
+    [F_CF1] = REG_FIELD(INA3221_MASK_ENABLE, 9, 9),
+};
+
+enum ina3221_channels {
+    INA3221_CHANNEL1,
+    INA3221_CHANNEL2,
+    INA3221_CHANNEL3,
+    INA3221_NUM_CHANNELS
+};
+
+/**
+ * struct ina3221_input - channel input source specific information
+ * @label: label of channel input source
+ * @shunt_resistor: shunt resistor value of channel input source
+ * @disconnected: connection status of channel input source
+ */
+struct ina3221_input {
+    const char *label;
+    int shunt_resistor;
+    bool disconnected;
+};
+
+/**
+ * struct ina3221_data - device specific information
+ * @pm_dev: Device pointer for pm runtime
+ * @regmap: Register map of the device
+ * @fields: Register fields of the device
+ * @inputs: Array of channel input source specific structures
+ * @lock: mutex lock to serialize sysfs attribute accesses
+ * @reg_config: Register value of INA3221_CONFIG
+ * @summation_shunt_resistor: equivalent shunt resistor value for summation
+ * @single_shot: running in single-shot operating mode
+ */
+struct ina3221_data {
+    struct device *pm_dev;
+    struct regmap *regmap;
+    struct regmap_field *fields[F_MAX_FIELDS];
+    struct ina3221_input inputs[INA3221_NUM_CHANNELS];
+    struct mutex lock;
+    u32 reg_config;
+    int summation_shunt_resistor;
+
+    bool single_shot;
+};
+
+static inline bool ina3221_is_enabled(struct ina3221_data *ina, int channel)
+{
+    /* Summation channel checks shunt resistor values */
+    if (channel > INA3221_CHANNEL3)
+        return ina->summation_shunt_resistor != 0;
+
+    return pm_runtime_active(ina->pm_dev) &&
+           (ina->reg_config & INA3221_CONFIG_CHx_EN(channel));
+}
+
+/**
+ * Helper function to return the resistor value for current summation.
+ *
+ * There is a condition to calculate current summation -- all the shunt
+ * resistor values should be the same, so as to simply fit the formula:
+ *     current summation = shunt voltage summation / shunt resistor
+ *
+ * Returns the equivalent shunt resistor value on success or 0 on failure
+ */
+static inline int ina3221_summation_shunt_resistor(struct ina3221_data *ina)
+{
+    struct ina3221_input *input = ina->inputs;
+    int i, shunt_resistor = 0;
+
+    for (i = 0; i < INA3221_NUM_CHANNELS; i++) {
+        if (input[i].disconnected || !input[i].shunt_resistor)
+            continue;
+        if (!shunt_resistor) {
+            /* Found the reference shunt resistor value */
+            shunt_resistor = input[i].shunt_resistor;
+        } else {
+            /* No summation if resistor values are different */
+            if (shunt_resistor != input[i].shunt_resistor)
+                return 0;
+        }
+    }
+
+    return shunt_resistor;
+}
+
+/* Lookup table for Bus and Shunt conversion times in usec */
+static const u16 ina3221_conv_time[] = {
+    140, 204, 332, 588, 1100, 2116, 4156, 8244,
+};
+
+/* Lookup table for number of samples using in averaging mode */
+static const int ina3221_avg_samples[] = {
+    1, 4, 16, 64, 128, 256, 512, 1024,
+};
+
+/* Converting update_interval in msec to conversion time in usec */
+static inline u32 ina3221_interval_ms_to_conv_time(u16 config, int interval)
+{
+    u32 channels = hweight16(config & INA3221_CONFIG_CHs_EN_MASK);
+    u32 samples_idx = INA3221_CONFIG_AVG(config);
+    u32 samples = ina3221_avg_samples[samples_idx];
+
+    /* Bisect the result to Bus and Shunt conversion times */
+    return DIV_ROUND_CLOSEST(interval * 1000 / 2, channels * samples);
+}
+
+/* Converting CONFIG register value to update_interval in usec */
+static inline u32 ina3221_reg_to_interval_us(u16 config)
+{
+    u32 channels = hweight16(config & INA3221_CONFIG_CHs_EN_MASK);
+    u32 vbus_ct_idx = INA3221_CONFIG_VBUS_CT(config);
+    u32 vsh_ct_idx = INA3221_CONFIG_VSH_CT(config);
+    u32 samples_idx = INA3221_CONFIG_AVG(config);
+    u32 samples = ina3221_avg_samples[samples_idx];
+    u32 vbus_ct = ina3221_conv_time[vbus_ct_idx];
+    u32 vsh_ct = ina3221_conv_time[vsh_ct_idx];
+
+    /* Calculate total conversion time */
+    return channels * (vbus_ct + vsh_ct) * samples;
+}
+
+static inline int ina3221_wait_for_data(struct ina3221_data *ina)
+{
+    u32 wait, cvrf;
+
+    wait = ina3221_reg_to_interval_us(ina->reg_config);
+
+    /* Polling the CVRF bit to make sure read data is ready */
+    return regmap_field_read_poll_timeout(ina->fields[F_CVRF],
+                          cvrf, cvrf, wait, wait * 2);
+}
+
+static int ina3221_read_value(struct ina3221_data *ina, unsigned int reg,
+                  int *val)
+{
+    unsigned int regval;
+    int ret;
+
+    ret = regmap_read(ina->regmap, reg, &regval);
+    if (ret)
+        return ret;
+
+    /*
+     * Shunt Voltage Sum register has 14-bit value with 1-bit shift
+     * Other Shunt Voltage registers have 12 bits with 3-bit shift
+     */
+    if (reg == INA3221_SHUNT_SUM)
+        *val = sign_extend32(regval >> 1, 14);
+    else
+        *val = sign_extend32(regval >> 3, 12);
+
+    return 0;
+}
+
+static const u8 ina3221_in_reg[] = {
+    INA3221_BUS1,
+    INA3221_BUS2,
+    INA3221_BUS3,
+    INA3221_SHUNT1,
+    INA3221_SHUNT2,
+    INA3221_SHUNT3,
+    INA3221_SHUNT_SUM,
+};
+
+static int ina3221_read_chip(struct device *dev, u32 attr, long *val)
+{
+    struct ina3221_data *ina = dev_get_drvdata(dev);
+    int regval;
+
+    switch (attr) {
+    case hwmon_chip_samples:
+        regval = INA3221_CONFIG_AVG(ina->reg_config);
+        *val = ina3221_avg_samples[regval];
+        return 0;
+    case hwmon_chip_update_interval:
+        /* Return in msec */
+        *val = ina3221_reg_to_interval_us(ina->reg_config);
+        *val = DIV_ROUND_CLOSEST(*val, 1000);
+        return 0;
+    default:
+        return -EOPNOTSUPP;
+    }
+}
+
+static int ina3221_read_in(struct device *dev, u32 attr, int channel, long *val)
+{
+    const bool is_shunt = channel > INA3221_CHANNEL3;
+    struct ina3221_data *ina = dev_get_drvdata(dev);
+    u8 reg = ina3221_in_reg[channel];
+    int regval, ret;
+
+    /*
+     * Translate shunt channel index to sensor channel index except
+     * the 7th channel (6 since being 0-aligned) is for summation.
+     */
+    if (channel != 6)
+        channel %= INA3221_NUM_CHANNELS;
+
+    switch (attr) {
+    case hwmon_in_input:
+        if (!ina3221_is_enabled(ina, channel))
+            return -ENODATA;
+
+        /* Write CONFIG register to trigger a single-shot measurement */
+        if (ina->single_shot)
+            regmap_write(ina->regmap, INA3221_CONFIG,
+                     ina->reg_config);
+
+        ret = ina3221_wait_for_data(ina);
+        if (ret)
+            return ret;
+
+        ret = ina3221_read_value(ina, reg, &regval);
+        if (ret)
+            return ret;
+
+        /*
+         * Scale of shunt voltage (uV): LSB is 40uV
+         * Scale of bus voltage (mV): LSB is 8mV
+         */
+        *val = regval * (is_shunt ? 40 : 8);
+        return 0;
+    case hwmon_in_enable:
+        *val = ina3221_is_enabled(ina, channel);
+        return 0;
+    default:
+        return -EOPNOTSUPP;
+    }
+}
+
+static const u8 ina3221_curr_reg[][INA3221_NUM_CHANNELS + 1] = {
+    [hwmon_curr_input] = { INA3221_SHUNT1, INA3221_SHUNT2,
+                   INA3221_SHUNT3, INA3221_SHUNT_SUM },
+    [hwmon_curr_max] = { INA3221_WARN1, INA3221_WARN2, INA3221_WARN3, 0 },
+    [hwmon_curr_crit] = { INA3221_CRIT1, INA3221_CRIT2,
+                  INA3221_CRIT3, INA3221_CRIT_SUM },
+    [hwmon_curr_max_alarm] = { F_WF1, F_WF2, F_WF3, 0 },
+    [hwmon_curr_crit_alarm] = { F_CF1, F_CF2, F_CF3, F_SF },
+};
+
+static int ina3221_read_curr(struct device *dev, u32 attr,
+                 int channel, long *val)
+{
+    struct ina3221_data *ina = dev_get_drvdata(dev);
+    struct ina3221_input *input = ina->inputs;
+    u8 reg = ina3221_curr_reg[attr][channel];
+    int resistance_uo, voltage_nv;
+    int regval, ret;
+
+    if (channel > INA3221_CHANNEL3)
+        resistance_uo = ina->summation_shunt_resistor;
+    else
+        resistance_uo = input[channel].shunt_resistor;
+
+    switch (attr) {
+    case hwmon_curr_input:
+        if (!ina3221_is_enabled(ina, channel))
+            return -ENODATA;
+
+        /* Write CONFIG register to trigger a single-shot measurement */
+        if (ina->single_shot)
+            regmap_write(ina->regmap, INA3221_CONFIG,
+                     ina->reg_config);
+
+        ret = ina3221_wait_for_data(ina);
+        if (ret)
+            return ret;
+
+        fallthrough;
+    case hwmon_curr_crit:
+    case hwmon_curr_max:
+        if (!resistance_uo)
+            return -ENODATA;
+
+        ret = ina3221_read_value(ina, reg, &regval);
+        if (ret)
+            return ret;
+
+        /* Scale of shunt voltage: LSB is 40uV (40000nV) */
+        voltage_nv = regval * 40000;
+        /* Return current in mA */
+        *val = DIV_ROUND_CLOSEST(voltage_nv, resistance_uo);
+        return 0;
+    case hwmon_curr_crit_alarm:
+    case hwmon_curr_max_alarm:
+        /* No actual register read if channel is disabled */
+        if (!ina3221_is_enabled(ina, channel)) {
+            /* Return 0 for alert flags */
+            *val = 0;
+            return 0;
+        }
+        ret = regmap_field_read(ina->fields[reg], &regval);
+        if (ret)
+            return ret;
+        *val = regval;
+        return 0;
+    default:
+        return -EOPNOTSUPP;
+    }
+}
+
+static int ina3221_write_chip(struct device *dev, u32 attr, long val)
+{
+    struct ina3221_data *ina = dev_get_drvdata(dev);
+    int ret, idx;
+    u32 tmp;
+
+    switch (attr) {
+    case hwmon_chip_samples:
+        idx = find_closest(val, ina3221_avg_samples,
+                   ARRAY_SIZE(ina3221_avg_samples));
+
+        tmp = (ina->reg_config & ~INA3221_CONFIG_AVG_MASK) |
+              (idx << INA3221_CONFIG_AVG_SHIFT);
+        ret = regmap_write(ina->regmap, INA3221_CONFIG, tmp);
+        if (ret)
+            return ret;
+
+        /* Update reg_config accordingly */
+        ina->reg_config = tmp;
+        return 0;
+    case hwmon_chip_update_interval:
+        tmp = ina3221_interval_ms_to_conv_time(ina->reg_config, val);
+        idx = find_closest(tmp, ina3221_conv_time,
+                   ARRAY_SIZE(ina3221_conv_time));
+
+        /* Update Bus and Shunt voltage conversion times */
+        tmp = INA3221_CONFIG_VBUS_CT_MASK | INA3221_CONFIG_VSH_CT_MASK;
+        tmp = (ina->reg_config & ~tmp) |
+              (idx << INA3221_CONFIG_VBUS_CT_SHIFT) |
+              (idx << INA3221_CONFIG_VSH_CT_SHIFT);
+        ret = regmap_write(ina->regmap, INA3221_CONFIG, tmp);
+        if (ret)
+            return ret;
+
+        /* Update reg_config accordingly */
+        ina->reg_config = tmp;
+        return 0;
+    default:
+        return -EOPNOTSUPP;
+    }
+}
+
+static int ina3221_write_curr(struct device *dev, u32 attr,
+                  int channel, long val)
+{
+    struct ina3221_data *ina = dev_get_drvdata(dev);
+    struct ina3221_input *input = ina->inputs;
+    u8 reg = ina3221_curr_reg[attr][channel];
+    int resistance_uo, current_ma, voltage_uv;
+    int regval;
+
+    if (channel > INA3221_CHANNEL3)
+        resistance_uo = ina->summation_shunt_resistor;
+    else
+        resistance_uo = input[channel].shunt_resistor;
+
+    if (!resistance_uo)
+        return -EOPNOTSUPP;
+
+    /* clamp current */
+    current_ma = clamp_val(val,
+                   INT_MIN / resistance_uo,
+                   INT_MAX / resistance_uo);
+
+    voltage_uv = DIV_ROUND_CLOSEST(current_ma * resistance_uo, 1000);
+
+    /* clamp voltage */
+    voltage_uv = clamp_val(voltage_uv, -163800, 163800);
+
+    /*
+     * Formula to convert voltage_uv to register value:
+     *     regval = (voltage_uv / scale) << shift
+     * Note:
+     *     The scale is 40uV for all shunt voltage registers
+     *     Shunt Voltage Sum register left-shifts 1 bit
+     *     All other Shunt Voltage registers shift 3 bits
+     * Results:
+     *     SHUNT_SUM: (1 / 40uV) << 1 = 1 / 20uV
+     *     SHUNT[1-3]: (1 / 40uV) << 3 = 1 / 5uV
+     */
+    if (reg == INA3221_SHUNT_SUM)
+        regval = DIV_ROUND_CLOSEST(voltage_uv, 20) & 0xfffe;
+    else
+        regval = DIV_ROUND_CLOSEST(voltage_uv, 5) & 0xfff8;
+
+    return regmap_write(ina->regmap, reg, regval);
+}
+
+static int ina3221_write_enable(struct device *dev, int channel, bool enable)
+{
+    struct ina3221_data *ina = dev_get_drvdata(dev);
+    u16 config, mask = INA3221_CONFIG_CHx_EN(channel);
+    u16 config_old = ina->reg_config & mask;
+    u32 tmp;
+    int ret;
+
+    config = enable ? mask : 0;
+
+    /* Bypass if enable status is not being changed */
+    if (config_old == config)
+        return 0;
+
+    /* For enabling routine, increase refcount and resume() at first */
+    if (enable) {
+        ret = pm_runtime_resume_and_get(ina->pm_dev);
+        if (ret < 0) {
+            dev_err(dev, "Failed to get PM runtime\n");
+            return ret;
+        }
+    }
+
+    /* Enable or disable the channel */
+    tmp = (ina->reg_config & ~mask) | (config & mask);
+    ret = regmap_write(ina->regmap, INA3221_CONFIG, tmp);
+    if (ret)
+        goto fail;
+
+    /* Cache the latest config register value */
+    ina->reg_config = tmp;
+
+    /* For disabling routine, decrease refcount or suspend() at last */
+    if (!enable)
+        pm_runtime_put_sync(ina->pm_dev);
+
+    return 0;
+
+fail:
+    if (enable) {
+        dev_err(dev, "Failed to enable channel %d: error %d\n",
+            channel, ret);
+        pm_runtime_put_sync(ina->pm_dev);
+    }
+
+    return ret;
+}
+
+static int ina3221_read(struct device *dev, enum hwmon_sensor_types type,
+            u32 attr, int channel, long *val)
+{
+    struct ina3221_data *ina = dev_get_drvdata(dev);
+    int ret;
+
+    mutex_lock(&ina->lock);
+
+    switch (type) {
+    case hwmon_chip:
+        ret = ina3221_read_chip(dev, attr, val);
+        break;
+    case hwmon_in:
+        /* 0-align channel ID */
+        ret = ina3221_read_in(dev, attr, channel - 1, val);
+        break;
+    case hwmon_curr:
+        ret = ina3221_read_curr(dev, attr, channel, val);
+        break;
+    default:
+        ret = -EOPNOTSUPP;
+        break;
+    }
+
+    mutex_unlock(&ina->lock);
+
+    return ret;
+}
+
+static int ina3221_write(struct device *dev, enum hwmon_sensor_types type,
+             u32 attr, int channel, long val)
+{
+    struct ina3221_data *ina = dev_get_drvdata(dev);
+    int ret;
+
+    mutex_lock(&ina->lock);
+
+    switch (type) {
+    case hwmon_chip:
+        ret = ina3221_write_chip(dev, attr, val);
+        break;
+    case hwmon_in:
+        /* 0-align channel ID */
+        ret = ina3221_write_enable(dev, channel - 1, val);
+        break;
+    case hwmon_curr:
+        ret = ina3221_write_curr(dev, attr, channel, val);
+        break;
+    default:
+        ret = -EOPNOTSUPP;
+        break;
+    }
+
+    mutex_unlock(&ina->lock);
+
+    return ret;
+}
+
+static int ina3221_read_string(struct device *dev, enum hwmon_sensor_types type,
+                   u32 attr, int channel, const char **str)
+{
+    struct ina3221_data *ina = dev_get_drvdata(dev);
+    int index = channel - 1;
+
+    if (channel == 7)
+        *str = "sum of shunt voltages";
+    else
+        *str = ina->inputs[index].label;
+
+    return 0;
+}
+
+static umode_t ina3221_is_visible(const void *drvdata,
+                  enum hwmon_sensor_types type,
+                  u32 attr, int channel)
+{
+    const struct ina3221_data *ina = drvdata;
+    const struct ina3221_input *input = NULL;
+
+    switch (type) {
+    case hwmon_chip:
+        switch (attr) {
+        case hwmon_chip_samples:
+        case hwmon_chip_update_interval:
+            return 0644;
+        default:
+            return 0;
+        }
+    case hwmon_in:
+        /* Ignore in0_ */
+        if (channel == 0)
+            return 0;
+
+        switch (attr) {
+        case hwmon_in_label:
+            if (channel - 1 <= INA3221_CHANNEL3)
+                input = &ina->inputs[channel - 1];
+            else if (channel == 7)
+                return 0444;
+            /* Hide label node if label is not provided */
+            return (input && input->label) ? 0444 : 0;
+        case hwmon_in_input:
+            return 0444;
+        case hwmon_in_enable:
+            return 0644;
+        default:
+            return 0;
+        }
+    case hwmon_curr:
+        switch (attr) {
+        case hwmon_curr_input:
+        case hwmon_curr_crit_alarm:
+        case hwmon_curr_max_alarm:
+            return 0444;
+        case hwmon_curr_crit:
+        case hwmon_curr_max:
+            return 0644;
+        default:
+            return 0;
+        }
+    default:
+        return 0;
+    }
+}
+
+#define INA3221_HWMON_CURR_CONFIG (HWMON_C_INPUT | \
+                   HWMON_C_CRIT | HWMON_C_CRIT_ALARM | \
+                   HWMON_C_MAX | HWMON_C_MAX_ALARM)
+
+static const struct hwmon_channel_info *ina3221_info[] = {
+    HWMON_CHANNEL_INFO(chip,
+               HWMON_C_SAMPLES,
+               HWMON_C_UPDATE_INTERVAL),
+    HWMON_CHANNEL_INFO(in,
+               /* 0: dummy, skipped in is_visible */
+               HWMON_I_INPUT,
+               /* 1-3: input voltage Channels */
+               HWMON_I_INPUT | HWMON_I_ENABLE | HWMON_I_LABEL,
+               HWMON_I_INPUT | HWMON_I_ENABLE | HWMON_I_LABEL,
+               HWMON_I_INPUT | HWMON_I_ENABLE | HWMON_I_LABEL,
+               /* 4-6: shunt voltage Channels */
+               HWMON_I_INPUT,
+               HWMON_I_INPUT,
+               HWMON_I_INPUT,
+               /* 7: summation of shunt voltage channels */
+               HWMON_I_INPUT | HWMON_I_LABEL),
+    HWMON_CHANNEL_INFO(curr,
+               /* 1-3: current channels*/
+               INA3221_HWMON_CURR_CONFIG,
+               INA3221_HWMON_CURR_CONFIG,
+               INA3221_HWMON_CURR_CONFIG,
+               /* 4: summation of current channels */
+               HWMON_C_INPUT | HWMON_C_CRIT | HWMON_C_CRIT_ALARM),
+    NULL
+};
+
+static const struct hwmon_ops ina3221_hwmon_ops = {
+    .is_visible = ina3221_is_visible,
+    .read_string = ina3221_read_string,
+    .read = ina3221_read,
+    .write = ina3221_write,
+};
+
+static const struct hwmon_chip_info ina3221_chip_info = {
+    .ops = &ina3221_hwmon_ops,
+    .info = ina3221_info,
+};
+
+/* Extra attribute groups */
+static ssize_t ina3221_shunt_show(struct device *dev,
+                  struct device_attribute *attr, char *buf)
+{
+    struct sensor_device_attribute *sd_attr = to_sensor_dev_attr(attr);
+    struct ina3221_data *ina = dev_get_drvdata(dev);
+    unsigned int channel = sd_attr->index;
+    struct ina3221_input *input = &ina->inputs[channel];
+
+    return snprintf(buf, PAGE_SIZE, "%d\n", input->shunt_resistor);
+}
+
+static ssize_t ina3221_shunt_store(struct device *dev,
+                   struct device_attribute *attr,
+                   const char *buf, size_t count)
+{
+    struct sensor_device_attribute *sd_attr = to_sensor_dev_attr(attr);
+    struct ina3221_data *ina = dev_get_drvdata(dev);
+    unsigned int channel = sd_attr->index;
+    struct ina3221_input *input = &ina->inputs[channel];
+    int val;
+    int ret;
+
+    ret = kstrtoint(buf, 0, &val);
+    if (ret)
+        return ret;
+
+    val = clamp_val(val, 1, INT_MAX);
+
+    input->shunt_resistor = val;
+
+    /* Update summation_shunt_resistor for summation channel */
+    ina->summation_shunt_resistor = ina3221_summation_shunt_resistor(ina);
+
+    return count;
+}
+
+/* shunt resistance */
+static SENSOR_DEVICE_ATTR_RW(shunt1_resistor, ina3221_shunt, INA3221_CHANNEL1);
+static SENSOR_DEVICE_ATTR_RW(shunt2_resistor, ina3221_shunt, INA3221_CHANNEL2);
+static SENSOR_DEVICE_ATTR_RW(shunt3_resistor, ina3221_shunt, INA3221_CHANNEL3);
+
+static struct attribute *ina3221_attrs[] = {
+    &sensor_dev_attr_shunt1_resistor.dev_attr.attr,
+    &sensor_dev_attr_shunt2_resistor.dev_attr.attr,
+    &sensor_dev_attr_shunt3_resistor.dev_attr.attr,
+    NULL,
+};
+ATTRIBUTE_GROUPS(ina3221);
+
+static const struct regmap_range ina3221_yes_ranges[] = {
+    regmap_reg_range(INA3221_CONFIG, INA3221_BUS3),
+    regmap_reg_range(INA3221_SHUNT_SUM, INA3221_SHUNT_SUM),
+    regmap_reg_range(INA3221_MASK_ENABLE, INA3221_MASK_ENABLE),
+};
+
+static const struct regmap_access_table ina3221_volatile_table = {
+    .yes_ranges = ina3221_yes_ranges,
+    .n_yes_ranges = ARRAY_SIZE(ina3221_yes_ranges),
+};
+
+static const struct regmap_config ina3221_regmap_config = {
+    .reg_bits = 8,
+    .val_bits = 16,
+
+    .cache_type = REGCACHE_RBTREE,
+    .volatile_table = &ina3221_volatile_table,
+};
+
+static int ina3221_probe_child_from_dt(struct device *dev,
+                       struct device_node *child,
+                       struct ina3221_data *ina)
+{
+    struct ina3221_input *input;
+    u32 val;
+    int ret;
+
+    ret = of_property_read_u32(child, "reg", &val);
+    if (ret) {
+        dev_err(dev, "missing reg property of %pOFn\n", child);
+        return ret;
+    } else if (val > INA3221_CHANNEL3) {
+        dev_err(dev, "invalid reg %d of %pOFn\n", val, child);
+        return ret;
+    }
+
+    input = &ina->inputs[val];
+
+    /* Log the disconnected channel input */
+    if (!of_device_is_available(child)) {
+        input->disconnected = true;
+        return 0;
+    }
+
+    /* Save the connected input label if available */
+    of_property_read_string(child, "label", &input->label);
+
+    /* Overwrite default shunt resistor value optionally */
+    if (!of_property_read_u32(child, "shunt-resistor-micro-ohms", &val)) {
+        if (val < 1 || val > INT_MAX) {
+            dev_err(dev, "invalid shunt resistor value %u of %pOFn\n",
+                val, child);
+            return -EINVAL;
+        }
+        input->shunt_resistor = val;
+    }
+
+    return 0;
+}
+
+static int ina3221_probe_from_dt(struct device *dev, struct ina3221_data *ina)
+{
+    const struct device_node *np = dev->of_node;
+    struct device_node *child;
+    int ret;
+
+    /* Compatible with non-DT platforms */
+    if (!np)
+        return 0;
+
+    ina->single_shot = of_property_read_bool(np, "ti,single-shot");
+
+    for_each_child_of_node(np, child) {
+        ret = ina3221_probe_child_from_dt(dev, child, ina);
+        if (ret) {
+            of_node_put(child);
+            return ret;
+        }
+    }
+
+    return 0;
+}
+
+static int ina3221_probe(struct i2c_client *client)
+{
+    struct device *dev = &client->dev;
+    struct ina3221_data *ina;
+    struct device *hwmon_dev;
+    int i, ret;
+
+    ina = devm_kzalloc(dev, sizeof(*ina), GFP_KERNEL);
+    if (!ina)
+        return -ENOMEM;
+
+    ina->regmap = devm_regmap_init_i2c(client, &ina3221_regmap_config);
+    if (IS_ERR(ina->regmap)) {
+        dev_err(dev, "Unable to allocate register map\n");
+        return PTR_ERR(ina->regmap);
+    }
+
+    for (i = 0; i < F_MAX_FIELDS; i++) {
+        ina->fields[i] = devm_regmap_field_alloc(dev,
+                             ina->regmap,
+                             ina3221_reg_fields[i]);
+        if (IS_ERR(ina->fields[i])) {
+            dev_err(dev, "Unable to allocate regmap fields\n");
+            return PTR_ERR(ina->fields[i]);
+        }
+    }
+
+    for (i = 0; i < INA3221_NUM_CHANNELS; i++)
+        ina->inputs[i].shunt_resistor = INA3221_RSHUNT_DEFAULT;
+
+    ret = ina3221_probe_from_dt(dev, ina);
+    if (ret) {
+        dev_err(dev, "Unable to probe from device tree\n");
+        return ret;
+    }
+
+    /* The driver will be reset, so use reset value */
+    ina->reg_config = INA3221_CONFIG_DEFAULT;
+
+    /* Clear continuous bit to use single-shot mode */
+    if (ina->single_shot)
+        ina->reg_config &= ~INA3221_CONFIG_MODE_CONTINUOUS;
+
+    /* Disable channels if their inputs are disconnected */
+    for (i = 0; i < INA3221_NUM_CHANNELS; i++) {
+        if (ina->inputs[i].disconnected)
+            ina->reg_config &= ~INA3221_CONFIG_CHx_EN(i);
+    }
+
+    /* Initialize summation_shunt_resistor for summation channel control */
+    ina->summation_shunt_resistor = ina3221_summation_shunt_resistor(ina);
+
+    ina->pm_dev = dev;
+    mutex_init(&ina->lock);
+    dev_set_drvdata(dev, ina);
+
+    /* Enable PM runtime -- status is suspended by default */
+    pm_runtime_enable(ina->pm_dev);
+
+    /* Initialize (resume) the device */
+    for (i = 0; i < INA3221_NUM_CHANNELS; i++) {
+        if (ina->inputs[i].disconnected)
+            continue;
+        /* Match the refcount with number of enabled channels */
+        ret = pm_runtime_get_sync(ina->pm_dev);
+        if (ret < 0)
+            goto fail;
+    }
+
+    hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name, ina,
+                             &ina3221_chip_info,
+                             ina3221_groups);
+    if (IS_ERR(hwmon_dev)) {
+        dev_err(dev, "Unable to register hwmon device\n");
+        ret = PTR_ERR(hwmon_dev);
+        goto fail;
+    }
+
+    return 0;
+
+fail:
+    pm_runtime_disable(ina->pm_dev);
+    pm_runtime_set_suspended(ina->pm_dev);
+    /* pm_runtime_put_noidle() will decrease the PM refcount until 0 */
+    for (i = 0; i < INA3221_NUM_CHANNELS; i++)
+        pm_runtime_put_noidle(ina->pm_dev);
+    mutex_destroy(&ina->lock);
+
+    return ret;
+}
+
+static void ina3221_remove(struct i2c_client *client)
+{
+    struct ina3221_data *ina = dev_get_drvdata(&client->dev);
+    int i;
+
+    pm_runtime_disable(ina->pm_dev);
+    pm_runtime_set_suspended(ina->pm_dev);
+
+    /* pm_runtime_put_noidle() will decrease the PM refcount until 0 */
+    for (i = 0; i < INA3221_NUM_CHANNELS; i++)
+        pm_runtime_put_noidle(ina->pm_dev);
+
+    mutex_destroy(&ina->lock);
+
+    return;
+}
+
+static int __maybe_unused ina3221_suspend(struct device *dev)
+{
+    struct ina3221_data *ina = dev_get_drvdata(dev);
+    int ret;
+
+    /* Save config register value and enable cache-only */
+    ret = regmap_read(ina->regmap, INA3221_CONFIG, &ina->reg_config);
+    if (ret)
+        return ret;
+
+    /* Set to power-down mode for power saving */
+    ret = regmap_update_bits(ina->regmap, INA3221_CONFIG,
+                 INA3221_CONFIG_MODE_MASK,
+                 INA3221_CONFIG_MODE_POWERDOWN);
+    if (ret)
+        return ret;
+
+    regcache_cache_only(ina->regmap, true);
+    regcache_mark_dirty(ina->regmap);
+
+    return 0;
+}
+
+static int __maybe_unused ina3221_resume(struct device *dev)
+{
+    struct ina3221_data *ina = dev_get_drvdata(dev);
+    int ret;
+
+    regcache_cache_only(ina->regmap, false);
+
+    /* Software reset the chip */
+    ret = regmap_field_write(ina->fields[F_RST], true);
+    if (ret) {
+        dev_err(dev, "Unable to reset device\n");
+        return ret;
+    }
+
+    /* Restore cached register values to hardware */
+    ret = regcache_sync(ina->regmap);
+    if (ret)
+        return ret;
+
+    /* Restore config register value to hardware */
+    ret = regmap_write(ina->regmap, INA3221_CONFIG, ina->reg_config);
+    if (ret)
+        return ret;
+
+    /* Initialize summation channel control */
+    if (ina->summation_shunt_resistor) {
+        /*
+         * Take all three channels into summation by default
+         * Shunt measurements of disconnected channels should
+         * be 0, so it does not matter for summation.
+         */
+        ret = regmap_update_bits(ina->regmap, INA3221_MASK_ENABLE,
+                     INA3221_MASK_ENABLE_SCC_MASK,
+                     INA3221_MASK_ENABLE_SCC_MASK);
+        if (ret) {
+            dev_err(dev, "Unable to control summation channel\n");
+            return ret;
+        }
+    }
+
+    return 0;
+}
+
+static const struct dev_pm_ops ina3221_pm = {
+    SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
+                pm_runtime_force_resume)
+    SET_RUNTIME_PM_OPS(ina3221_suspend, ina3221_resume, NULL)
+};
+
+static const struct of_device_id ina3221_of_match_table[] = {
+    { .compatible = "ti,wb_ina3221", },
+    { /* sentinel */ }
+};
+MODULE_DEVICE_TABLE(of, ina3221_of_match_table);
+
+static const struct i2c_device_id ina3221_ids[] = {
+    { "wb_ina3221", 0 },
+    { /* sentinel */ }
+};
+MODULE_DEVICE_TABLE(i2c, ina3221_ids);
+
+static struct i2c_driver ina3221_i2c_driver = {
+    .probe_new = ina3221_probe,
+    .remove = ina3221_remove,
+    .driver = {
+        .name = INA3221_DRIVER_NAME,
+        .of_match_table = ina3221_of_match_table,
+        .pm = &ina3221_pm,
+    },
+    .id_table = ina3221_ids,
+};
+module_i2c_driver(ina3221_i2c_driver);
+
+MODULE_AUTHOR("support");
+MODULE_DESCRIPTION("Texas Instruments INA3221 HWMon Driver");
+MODULE_LICENSE("GPL v2");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_isl68137.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_isl68137.c
new file mode 100644
index 000000000..648020435
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_isl68137.c
@@ -0,0 +1,577 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Hardware monitoring driver for Renesas Digital Multiphase Voltage Regulators
+ *
+ * Copyright (c) 2017 Google Inc
+ * Copyright (c) 2020 Renesas Electronics America
+ *
+ */
+
+#include <linux/err.h>
+#include <linux/hwmon-sysfs.h>
+#include <linux/i2c.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/string.h>
+#include <linux/sysfs.h>
+
+#include "wb_pmbus.h"
+
+#define ISL68137_VOUT_AVS       (0x30)
+#define RAA_DMPVR2_READ_VMON    (0xc8)
+#define WRITE_PROTECT_CLOSE     (0x00)
+#define WRITE_PROTECT_OPEN      (0x40)
+
+static int g_wb_isl68137_debug = 0;
+static int g_wb_isl68137_error = 0;
+
+module_param(g_wb_isl68137_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_isl68137_error, int, S_IRUGO | S_IWUSR);
+
+#define WB_ISL68137_VERBOSE(fmt, args...) do {                                        \
+    if (g_wb_isl68137_debug) { \
+        printk(KERN_INFO "[WB_ISL68137][VER][func:%s line:%d]\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define WB_ISL68137_ERROR(fmt, args...) do {                                        \
+    if (g_wb_isl68137_error) { \
+        printk(KERN_ERR "[WB_ISL68137][ERR][func:%s line:%d]\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+enum chips {
+    isl68137,
+    isl68220,
+    isl68221,
+    isl68222,
+    isl68223,
+    isl68224,
+    isl68225,
+    isl68226,
+    isl68227,
+    isl68229,
+    isl68233,
+    isl68239,
+    isl69222,
+    isl69223,
+    isl69224,
+    isl69225,
+    isl69227,
+    isl69228,
+    isl69234,
+    isl69236,
+    isl69239,
+    isl69242,
+    isl69243,
+    isl69247,
+    isl69248,
+    isl69254,
+    isl69255,
+    isl69256,
+    isl69259,
+    isl69260,
+    isl69268,
+    isl69269,
+    isl69298,
+    raa228000,
+    raa228004,
+    raa228006,
+    raa228228,
+    raa229001,
+    raa229004,
+};
+
+enum variants {
+    raa_dmpvr1_2rail,
+    raa_dmpvr2_1rail,
+    raa_dmpvr2_2rail,
+    raa_dmpvr2_2rail_nontc,
+    raa_dmpvr2_3rail,
+    raa_dmpvr2_hv,
+};
+
+static const struct i2c_device_id raa_dmpvr_id[];
+
+static ssize_t isl68137_avs_enable_show_page(struct i2c_client *client,
+                         int page,
+                         char *buf)
+{
+    int val = wb_pmbus_read_byte_data(client, page, PMBUS_OPERATION);
+
+    return sprintf(buf, "%d\n",
+               (val & ISL68137_VOUT_AVS) == ISL68137_VOUT_AVS ? 1 : 0);
+}
+
+static ssize_t isl68137_avs_enable_store_page(struct i2c_client *client,
+                          int page,
+                          const char *buf, size_t count)
+{
+    int rc, op_val;
+    bool result;
+
+    rc = kstrtobool(buf, &result);
+    if (rc)
+        return rc;
+
+    op_val = result ? ISL68137_VOUT_AVS : 0;
+
+    /*
+     * Writes to VOUT setpoint over AVSBus will persist after the VRM is
+     * switched to PMBus control. Switching back to AVSBus control
+     * restores this persisted setpoint rather than re-initializing to
+     * PMBus VOUT_COMMAND. Writing VOUT_COMMAND first over PMBus before
+     * enabling AVS control is the workaround.
+     */
+    if (op_val == ISL68137_VOUT_AVS) {
+        rc = wb_pmbus_read_word_data(client, page, 0xff,
+                      PMBUS_VOUT_COMMAND);
+        if (rc < 0)
+            return rc;
+
+        rc = wb_pmbus_write_word_data(client, page, PMBUS_VOUT_COMMAND,
+                       rc);
+        if (rc < 0)
+            return rc;
+    }
+
+    rc = wb_pmbus_update_byte_data(client, page, PMBUS_OPERATION,
+                    ISL68137_VOUT_AVS, op_val);
+
+    return (rc < 0) ? rc : count;
+}
+
+static ssize_t isl68137_avs_enable_show(struct device *dev,
+                    struct device_attribute *devattr,
+                    char *buf)
+{
+    struct i2c_client *client = to_i2c_client(dev->parent);
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
+
+    return isl68137_avs_enable_show_page(client, attr->index, buf);
+}
+
+static ssize_t isl68137_avs_enable_store(struct device *dev,
+                struct device_attribute *devattr,
+                const char *buf, size_t count)
+{
+    struct i2c_client *client = to_i2c_client(dev->parent);
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
+
+    return isl68137_avs_enable_store_page(client, attr->index, buf, count);
+}
+
+static ssize_t isl68137_avs_vout_show(struct device *dev, struct device_attribute *devattr,
+                   char *buf)
+{
+    struct i2c_client *client = to_i2c_client(dev->parent);
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
+    struct pmbus_data *data = i2c_get_clientdata(client);
+    int vout_cmd, vout;
+
+    mutex_lock(&data->update_lock);
+    vout_cmd = wb_pmbus_read_word_data(client, attr->index, 0xff, PMBUS_VOUT_COMMAND);
+    if (vout_cmd < 0) {
+        WB_ISL68137_ERROR("%d-%04x: read page%d vout command reg: 0x%x failed, ret: %d\n",
+            client->adapter->nr, client->addr, attr->index, PMBUS_VOUT_COMMAND, vout_cmd);
+        mutex_unlock(&data->update_lock);
+        return vout_cmd;
+    }
+    vout = vout_cmd * 1000;
+    WB_ISL68137_VERBOSE("%d-%04x: page%d, vout: %d, vout_cmd: 0x%x\n", client->adapter->nr,
+        client->addr, attr->index, vout, vout_cmd);
+    mutex_unlock(&data->update_lock);
+    return snprintf(buf, PAGE_SIZE, "%d\n", vout);
+}
+
+static ssize_t isl68137_avs_vout_store(struct device *dev, struct device_attribute *devattr,
+                   const char *buf, size_t count)
+{
+    struct i2c_client *client = to_i2c_client(dev->parent);
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
+    struct pmbus_data *data = i2c_get_clientdata(client);
+    int vout, vout_max, vout_min;
+    int ret, vout_cmd, vout_cmd_set;
+
+    if ((attr->index < 0) || (attr->index >= PMBUS_PAGES)) {
+        WB_ISL68137_ERROR("%d-%04x: invalid index: %d \n", client->adapter->nr, client->addr,
+            attr->index);
+        return -EINVAL;
+    }
+
+    ret = kstrtoint(buf, 0, &vout);
+    if (ret) {
+        WB_ISL68137_ERROR("%d-%04x: invalid value: %s \n", client->adapter->nr, client->addr, buf);
+        return -EINVAL;
+    }
+
+    if (vout <= 0) {
+        WB_ISL68137_ERROR("%d-%04x: invalid value: %d \n", client->adapter->nr, client->addr, vout);
+        return -EINVAL;
+    }
+
+    vout_max = data->vout_max[attr->index];
+    vout_min = data->vout_min[attr->index];
+    if ((vout > vout_max) || (vout < vout_min)) {
+        WB_ISL68137_ERROR("%d-%04x: vout value: %d, out of range [%d, %d] \n", client->adapter->nr,
+            client->addr, vout, vout_min, vout_max);
+        return -EINVAL;
+    }
+
+    /* calc VOUT_COMMAND set value */
+    vout_cmd_set = vout / 1000;
+    if (vout_cmd_set > 0xffff) {
+        WB_ISL68137_ERROR("%d-%04x: invalid value, vout %d, vout_cmd_set: 0x%x\n",
+            client->adapter->nr, client->addr, vout, vout_cmd_set);
+        return -EINVAL;
+    }
+
+    mutex_lock(&data->update_lock);
+
+    /* close write protect */
+    ret = wb_pmbus_write_byte_data(client, attr->index, PMBUS_WRITE_PROTECT, WRITE_PROTECT_CLOSE);
+    if (ret < 0) {
+        WB_ISL68137_ERROR("%d-%04x: close page%d write protect failed, ret: %d\n", client->adapter->nr,
+            client->addr, attr->index, ret);
+        mutex_unlock(&data->update_lock);
+        return ret;
+    }
+
+    /* set VOUT_COMMAND */
+    ret = wb_pmbus_write_word_data(client, attr->index, PMBUS_VOUT_COMMAND, vout_cmd_set);
+    if (ret < 0) {
+        WB_ISL68137_ERROR("%d-%04x: set page%d vout cmd reg: 0x%x, value: 0x%x failed, ret: %d\n",
+            client->adapter->nr, client->addr, attr->index, PMBUS_VOUT_COMMAND, vout_cmd_set, ret);
+        goto error;
+    }
+
+    /* read back VOUT_COMMAND */
+    vout_cmd = wb_pmbus_read_word_data(client, attr->index, 0xff, PMBUS_VOUT_COMMAND);
+    if (vout_cmd < 0) {
+        ret = vout_cmd;
+        WB_ISL68137_ERROR("%d-%04x: read page%d vout command reg: 0x%x failed, ret: %d\n",
+            client->adapter->nr, client->addr, attr->index, PMBUS_VOUT_COMMAND, ret);
+        goto error;
+    }
+
+    /* compare vout_cmd and vout_cmd_set */
+    if (vout_cmd != vout_cmd_set) {
+        ret = -EIO;
+        WB_ISL68137_ERROR("%d-%04x: vout cmd value check error, vout cmd read: 0x%x, vout cmd set: 0x%x\n",
+            client->adapter->nr, client->addr, vout_cmd, vout_cmd_set);
+        goto error;
+    }
+
+    /* open write protect */
+    wb_pmbus_write_byte_data(client, attr->index, PMBUS_WRITE_PROTECT, WRITE_PROTECT_OPEN);
+    mutex_unlock(&data->update_lock);
+    WB_ISL68137_VERBOSE("%d-%04x: set page%d vout cmd success, vout %d, vout_cmd_set: 0x%x\n",
+        client->adapter->nr, client->addr, attr->index, vout, vout_cmd_set);
+    return count;
+error:
+    wb_pmbus_write_byte_data(client, attr->index, PMBUS_WRITE_PROTECT, WRITE_PROTECT_OPEN);
+    mutex_unlock(&data->update_lock);
+    return ret;
+}
+
+static ssize_t isl68137_avs_vout_max_store(struct device *dev,
+                   struct device_attribute *devattr, const char *buf, size_t count)
+{
+    struct i2c_client *client = to_i2c_client(dev->parent);
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
+    struct pmbus_data *data = i2c_get_clientdata(client);
+    int ret, vout_threshold;
+
+    if ((attr->index < 0) || (attr->index >= PMBUS_PAGES)) {
+        WB_ISL68137_ERROR("%d-%04x: invalid index: %d \n", client->adapter->nr, client->addr,
+            attr->index);
+        return -EINVAL;
+    }
+
+    ret = kstrtoint(buf, 0, &vout_threshold);
+    if (ret) {
+        WB_ISL68137_ERROR("%d-%04x: invalid value: %s \n", client->adapter->nr, client->addr, buf);
+        return -EINVAL;
+    }
+
+    WB_ISL68137_VERBOSE("%d-%04x: vout%d max threshold: %d", client->adapter->nr, client->addr,
+        attr->index, vout_threshold);
+
+    data->vout_max[attr->index] = vout_threshold;
+    return count;
+}
+
+static ssize_t isl68137_avs_vout_max_show(struct device *dev,
+                   struct device_attribute *devattr, char *buf)
+{
+    struct i2c_client *client = to_i2c_client(dev->parent);
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
+    struct pmbus_data *data = i2c_get_clientdata(client);
+
+    if ((attr->index < 0) || (attr->index >= PMBUS_PAGES)) {
+        WB_ISL68137_ERROR("%d-%04x: invalid index: %d \n", client->adapter->nr, client->addr,
+            attr->index);
+        return -EINVAL;
+    }
+
+    return snprintf(buf, PAGE_SIZE, "%d\n", data->vout_max[attr->index]);
+}
+
+static ssize_t isl68137_avs_vout_min_store(struct device *dev,
+                   struct device_attribute *devattr, const char *buf, size_t count)
+{
+    struct i2c_client *client = to_i2c_client(dev->parent);
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
+    struct pmbus_data *data = i2c_get_clientdata(client);
+    int ret, vout_threshold;
+
+    if ((attr->index < 0) || (attr->index >= PMBUS_PAGES)) {
+        WB_ISL68137_ERROR("%d-%04x: invalid index: %d \n", client->adapter->nr, client->addr,
+            attr->index);
+        return -EINVAL;
+    }
+
+    ret = kstrtoint(buf, 0, &vout_threshold);
+    if (ret) {
+        WB_ISL68137_ERROR("%d-%04x: invalid value: %s \n", client->adapter->nr, client->addr, buf);
+        return -EINVAL;
+    }
+
+    WB_ISL68137_VERBOSE("%d-%04x: vout%d min threshold: %d", client->adapter->nr, client->addr,
+        attr->index, vout_threshold);
+
+    data->vout_min[attr->index] = vout_threshold;
+    return count;
+}
+
+static ssize_t isl68137_avs_vout_min_show(struct device *dev,
+                   struct device_attribute *devattr, char *buf)
+{
+    struct i2c_client *client = to_i2c_client(dev->parent);
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
+    struct pmbus_data *data = i2c_get_clientdata(client);
+
+    if ((attr->index < 0) || (attr->index >= PMBUS_PAGES)) {
+        WB_ISL68137_ERROR("%d-%04x: invalid index: %d \n", client->adapter->nr, client->addr,
+            attr->index);
+        return -EINVAL;
+    }
+
+    return snprintf(buf, PAGE_SIZE, "%d\n", data->vout_min[attr->index]);
+}
+
+static SENSOR_DEVICE_ATTR_RW(avs0_enable, isl68137_avs_enable, 0);
+static SENSOR_DEVICE_ATTR_RW(avs1_enable, isl68137_avs_enable, 1);
+
+static SENSOR_DEVICE_ATTR_RW(avs0_vout, isl68137_avs_vout, 0);
+static SENSOR_DEVICE_ATTR_RW(avs1_vout, isl68137_avs_vout, 1);
+static SENSOR_DEVICE_ATTR_RW(avs0_vout_max, isl68137_avs_vout_max, 0);
+static SENSOR_DEVICE_ATTR_RW(avs0_vout_min, isl68137_avs_vout_min, 0);
+static SENSOR_DEVICE_ATTR_RW(avs1_vout_max, isl68137_avs_vout_max, 1);
+static SENSOR_DEVICE_ATTR_RW(avs1_vout_min, isl68137_avs_vout_min, 1);
+
+static struct attribute *enable_attrs[] = {
+    &sensor_dev_attr_avs0_enable.dev_attr.attr,
+    &sensor_dev_attr_avs1_enable.dev_attr.attr,
+    NULL,
+};
+
+static struct attribute *avs_ctrl_attrs[] = {
+    &sensor_dev_attr_avs0_vout.dev_attr.attr,
+    &sensor_dev_attr_avs1_vout.dev_attr.attr,
+    &sensor_dev_attr_avs0_vout_max.dev_attr.attr,
+    &sensor_dev_attr_avs0_vout_min.dev_attr.attr,
+    &sensor_dev_attr_avs1_vout_max.dev_attr.attr,
+    &sensor_dev_attr_avs1_vout_min.dev_attr.attr,
+    NULL,
+};
+
+static const struct attribute_group enable_group = {
+    .attrs = enable_attrs,
+};
+
+static const struct attribute_group avs_ctrl_group = {
+    .attrs = avs_ctrl_attrs,
+};
+
+static const struct attribute_group *isl68137_attribute_groups[] = {
+    &enable_group,
+    &avs_ctrl_group,
+    NULL,
+};
+
+static int raa_dmpvr2_read_word_data(struct i2c_client *client, int page,
+                     int phase, int reg)
+{
+    int ret;
+
+    switch (reg) {
+    case PMBUS_VIRT_READ_VMON:
+        ret = wb_pmbus_read_word_data(client, page, phase,
+                       RAA_DMPVR2_READ_VMON);
+        break;
+    default:
+        ret = -ENODATA;
+        break;
+    }
+
+    return ret;
+}
+
+static struct pmbus_driver_info raa_dmpvr_info = {
+    .pages = 3,
+    .format[PSC_VOLTAGE_IN] = direct,
+    .format[PSC_VOLTAGE_OUT] = direct,
+    .format[PSC_CURRENT_IN] = direct,
+    .format[PSC_CURRENT_OUT] = direct,
+    .format[PSC_POWER] = direct,
+    .format[PSC_TEMPERATURE] = direct,
+    .m[PSC_VOLTAGE_IN] = 1,
+    .b[PSC_VOLTAGE_IN] = 0,
+    .R[PSC_VOLTAGE_IN] = 2,
+    .m[PSC_VOLTAGE_OUT] = 1,
+    .b[PSC_VOLTAGE_OUT] = 0,
+    .R[PSC_VOLTAGE_OUT] = 3,
+    .m[PSC_CURRENT_IN] = 1,
+    .b[PSC_CURRENT_IN] = 0,
+    .R[PSC_CURRENT_IN] = 2,
+    .m[PSC_CURRENT_OUT] = 1,
+    .b[PSC_CURRENT_OUT] = 0,
+    .R[PSC_CURRENT_OUT] = 1,
+    .m[PSC_POWER] = 1,
+    .b[PSC_POWER] = 0,
+    .R[PSC_POWER] = 0,
+    .m[PSC_TEMPERATURE] = 1,
+    .b[PSC_TEMPERATURE] = 0,
+    .R[PSC_TEMPERATURE] = 0,
+    .func[0] = PMBUS_HAVE_VIN | PMBUS_HAVE_IIN | PMBUS_HAVE_PIN
+        | PMBUS_HAVE_STATUS_INPUT | PMBUS_HAVE_TEMP | PMBUS_HAVE_TEMP2
+        | PMBUS_HAVE_TEMP3 | PMBUS_HAVE_STATUS_TEMP
+        | PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT
+        | PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT | PMBUS_HAVE_POUT
+        | PMBUS_HAVE_VMON,
+    .func[1] = PMBUS_HAVE_IIN | PMBUS_HAVE_PIN | PMBUS_HAVE_STATUS_INPUT
+        | PMBUS_HAVE_TEMP | PMBUS_HAVE_TEMP3 | PMBUS_HAVE_STATUS_TEMP
+        | PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT | PMBUS_HAVE_IOUT
+        | PMBUS_HAVE_STATUS_IOUT | PMBUS_HAVE_POUT,
+    .func[2] = PMBUS_HAVE_IIN | PMBUS_HAVE_PIN | PMBUS_HAVE_STATUS_INPUT
+        | PMBUS_HAVE_TEMP | PMBUS_HAVE_TEMP3 | PMBUS_HAVE_STATUS_TEMP
+        | PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT | PMBUS_HAVE_IOUT
+        | PMBUS_HAVE_STATUS_IOUT | PMBUS_HAVE_POUT,
+};
+
+static int isl68137_probe(struct i2c_client *client)
+{
+    struct pmbus_driver_info *info;
+
+    info = devm_kzalloc(&client->dev, sizeof(*info), GFP_KERNEL);
+    if (!info)
+        return -ENOMEM;
+    memcpy(info, &raa_dmpvr_info, sizeof(*info));
+
+    switch (i2c_match_id(raa_dmpvr_id, client)->driver_data) {
+    case raa_dmpvr1_2rail:
+        info->pages = 2;
+        info->R[PSC_VOLTAGE_IN] = 3;
+        info->func[0] &= ~PMBUS_HAVE_VMON;
+        info->func[1] = PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT
+            | PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT
+            | PMBUS_HAVE_POUT;
+        info->groups = isl68137_attribute_groups;
+        break;
+    case raa_dmpvr2_1rail:
+        info->pages = 1;
+        info->read_word_data = raa_dmpvr2_read_word_data;
+        break;
+    case raa_dmpvr2_2rail_nontc:
+        info->func[0] &= ~PMBUS_HAVE_TEMP3;
+        info->func[1] &= ~PMBUS_HAVE_TEMP3;
+        fallthrough;
+    case raa_dmpvr2_2rail:
+        info->pages = 2;
+        info->read_word_data = raa_dmpvr2_read_word_data;
+        break;
+    case raa_dmpvr2_3rail:
+        info->read_word_data = raa_dmpvr2_read_word_data;
+        break;
+    case raa_dmpvr2_hv:
+        info->pages = 1;
+        info->R[PSC_VOLTAGE_IN] = 1;
+        info->m[PSC_VOLTAGE_OUT] = 2;
+        info->R[PSC_VOLTAGE_OUT] = 2;
+        info->m[PSC_CURRENT_IN] = 2;
+        info->m[PSC_POWER] = 2;
+        info->R[PSC_POWER] = -1;
+        info->read_word_data = raa_dmpvr2_read_word_data;
+        break;
+    default:
+        return -ENODEV;
+    }
+
+    return wb_pmbus_do_probe(client, info);
+}
+
+static const struct i2c_device_id raa_dmpvr_id[] = {
+    {"wb_isl68127", raa_dmpvr1_2rail},
+    {"wb_isl68137", raa_dmpvr1_2rail},
+    {"wb_isl68220", raa_dmpvr2_2rail},
+    {"wb_isl68221", raa_dmpvr2_3rail},
+    {"wb_isl68222", raa_dmpvr2_2rail},
+    {"wb_isl68223", raa_dmpvr2_2rail},
+    {"wb_isl68224", raa_dmpvr2_3rail},
+    {"wb_isl68225", raa_dmpvr2_2rail},
+    {"wb_isl68226", raa_dmpvr2_3rail},
+    {"wb_isl68227", raa_dmpvr2_1rail},
+    {"wb_isl68229", raa_dmpvr2_3rail},
+    {"wb_isl68233", raa_dmpvr2_2rail},
+    {"wb_isl68239", raa_dmpvr2_3rail},
+
+    {"wb_isl69222", raa_dmpvr2_2rail},
+    {"wb_isl69223", raa_dmpvr2_3rail},
+    {"wb_isl69224", raa_dmpvr2_2rail},
+    {"wb_isl69225", raa_dmpvr2_2rail},
+    {"wb_isl69227", raa_dmpvr2_3rail},
+    {"wb_isl69228", raa_dmpvr2_3rail},
+    {"wb_isl69234", raa_dmpvr2_2rail},
+    {"wb_isl69236", raa_dmpvr2_2rail},
+    {"wb_isl69239", raa_dmpvr2_3rail},
+    {"wb_isl69242", raa_dmpvr2_2rail},
+    {"wb_isl69243", raa_dmpvr2_1rail},
+    {"wb_isl69247", raa_dmpvr2_2rail},
+    {"wb_isl69248", raa_dmpvr2_2rail},
+    {"wb_isl69254", raa_dmpvr2_2rail},
+    {"wb_isl69255", raa_dmpvr2_2rail},
+    {"wb_isl69256", raa_dmpvr2_2rail},
+    {"wb_isl69259", raa_dmpvr2_2rail},
+    {"wb_isl69260", raa_dmpvr2_2rail},
+    {"wb_isl69268", raa_dmpvr2_2rail},
+    {"wb_isl69269", raa_dmpvr2_3rail},
+    {"wb_isl69298", raa_dmpvr2_2rail},
+
+    {"wb_raa228000", raa_dmpvr2_hv},
+    {"wb_raa228004", raa_dmpvr2_hv},
+    {"wb_raa228006", raa_dmpvr2_hv},
+    {"wb_raa228228", raa_dmpvr2_2rail_nontc},
+    {"wb_raa229001", raa_dmpvr2_2rail},
+    {"wb_raa229004", raa_dmpvr2_2rail},
+    {}
+};
+
+MODULE_DEVICE_TABLE(i2c, raa_dmpvr_id);
+
+/* This is the driver that will be inserted */
+static struct i2c_driver isl68137_driver = {
+    .driver = {
+           .name = "wb_isl68137",
+           },
+    .probe_new = isl68137_probe,
+    .remove = wb_pmbus_do_remove,
+    .id_table = raa_dmpvr_id,
+};
+
+module_i2c_driver(isl68137_driver);
+
+MODULE_AUTHOR("support");
+MODULE_DESCRIPTION("PMBus driver for Renesas digital multiphase voltage regulators");
+MODULE_LICENSE("GPL");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_lm75.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_lm75.c
new file mode 100644
index 000000000..0386cfb0b
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_lm75.c
@@ -0,0 +1,992 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * lm75.c - Part of lm_sensors, Linux kernel modules for hardware
+ *	 monitoring
+ * Copyright (c) 1998, 1999  Frodo Looijaard <frodol@dds.nl>
+ */
+
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/slab.h>
+#include <linux/jiffies.h>
+#include <linux/i2c.h>
+#include <linux/hwmon.h>
+#include <linux/hwmon-sysfs.h>
+#include <linux/err.h>
+#include <linux/of_device.h>
+#include <linux/of.h>
+#include <linux/regmap.h>
+#include <linux/util_macros.h>
+#include <linux/regulator/consumer.h>
+#include <linux/delay.h>
+#include "wb_lm75.h"
+
+/*
+ * This driver handles the LM75 and compatible digital temperature sensors.
+ */
+
+enum lm75_type {		/* keep sorted in alphabetical order */
+	adt75,
+	ds1775,
+	ds75,
+	ds7505,
+	g751,
+	lm75,
+	lm75a,
+	lm75b,
+	max6625,
+	max6626,
+	max31725,
+	mcp980x,
+	pct2075,
+	stds75,
+	stlm75,
+	tcn75,
+	tmp100,
+	tmp101,
+	tmp105,
+	tmp112,
+	tmp175,
+	tmp275,
+	tmp75,
+	tmp75b,
+	tmp75c,
+};
+
+/**
+ * struct lm75_params - lm75 configuration parameters.
+ * @set_mask:		Bits to set in configuration register when configuring
+ *			the chip.
+ * @clr_mask:		Bits to clear in configuration register when configuring
+ *			the chip.
+ * @default_resolution:	Default number of bits to represent the temperature
+ *			value.
+ * @resolution_limits:	Limit register resolution. Optional. Should be set if
+ *			the resolution of limit registers does not match the
+ *			resolution of the temperature register.
+ * @resolutions:	List of resolutions associated with sample times.
+ *			Optional. Should be set if num_sample_times is larger
+ *			than 1, and if the resolution changes with sample times.
+ *			If set, number of entries must match num_sample_times.
+ * @default_sample_time:Sample time to be set by default.
+ * @num_sample_times:	Number of possible sample times to be set. Optional.
+ *			Should be set if the number of sample times is larger
+ *			than one.
+ * @sample_times:	All the possible sample times to be set. Mandatory if
+ *			num_sample_times is larger than 1. If set, number of
+ *			entries must match num_sample_times.
+ */
+
+struct lm75_params {
+	u8			set_mask;
+	u8			clr_mask;
+	u8			default_resolution;
+	u8			resolution_limits;
+	const u8		*resolutions;
+	unsigned int		default_sample_time;
+	u8			num_sample_times;
+	const unsigned int	*sample_times;
+};
+#if 0
+/* Addresses scanned */
+static const unsigned short normal_i2c[] = { 0x48, 0x49, 0x4a, 0x4b, 0x4c,
+					0x4d, 0x4e, 0x4f, I2C_CLIENT_END };
+#endif
+/* The LM75 registers */
+#define LM75_REG_TEMP		0x00
+#define LM75_REG_CONF		0x01
+#define LM75_REG_HYST		0x02
+#define LM75_REG_MAX		0x03
+#define PCT2075_REG_IDLE	0x04
+#define LM75_TEMP_INVALID_RETRY_TIMES    (3)
+
+/* Each client has this additional data */
+struct lm75_data {
+	struct i2c_client		*client;
+	struct regmap			*regmap;
+	struct regulator		*vs;
+	u8				orig_conf;
+	u8				current_conf;
+	u8				resolution;	/* In bits, 9 to 16 */
+	unsigned int			sample_time;	/* In ms */
+	enum lm75_type			kind;
+	const struct lm75_params	*params;
+};
+
+/*-----------------------------------------------------------------------*/
+
+static const u8 lm75_sample_set_masks[] = { 0 << 5, 1 << 5, 2 << 5, 3 << 5 };
+
+#define LM75_SAMPLE_CLEAR_MASK	(3 << 5)
+
+/* The structure below stores the configuration values of the supported devices.
+ * In case of being supported multiple configurations, the default one must
+ * always be the first element of the array
+ */
+static const struct lm75_params device_params[] = {
+	[adt75] = {
+		.clr_mask = 1 << 5,	/* not one-shot mode */
+		.default_resolution = 12,
+		.default_sample_time = MSEC_PER_SEC / 10,
+	},
+	[ds1775] = {
+		.clr_mask = 3 << 5,
+		.set_mask = 2 << 5,	/* 11-bit mode */
+		.default_resolution = 11,
+		.default_sample_time = 500,
+		.num_sample_times = 4,
+		.sample_times = (unsigned int []){ 125, 250, 500, 1000 },
+		.resolutions = (u8 []) {9, 10, 11, 12 },
+	},
+	[ds75] = {
+		.clr_mask = 3 << 5,
+		.set_mask = 2 << 5,	/* 11-bit mode */
+		.default_resolution = 11,
+		.default_sample_time = 600,
+		.num_sample_times = 4,
+		.sample_times = (unsigned int []){ 150, 300, 600, 1200 },
+		.resolutions = (u8 []) {9, 10, 11, 12 },
+	},
+	[stds75] = {
+		.clr_mask = 3 << 5,
+		.set_mask = 2 << 5,	/* 11-bit mode */
+		.default_resolution = 11,
+		.default_sample_time = 600,
+		.num_sample_times = 4,
+		.sample_times = (unsigned int []){ 150, 300, 600, 1200 },
+		.resolutions = (u8 []) {9, 10, 11, 12 },
+	},
+	[stlm75] = {
+		.default_resolution = 9,
+		.default_sample_time = MSEC_PER_SEC / 6,
+	},
+	[ds7505] = {
+		.set_mask = 3 << 5,	/* 12-bit mode*/
+		.default_resolution = 12,
+		.default_sample_time = 200,
+		.num_sample_times = 4,
+		.sample_times = (unsigned int []){ 25, 50, 100, 200 },
+		.resolutions = (u8 []) {9, 10, 11, 12 },
+	},
+	[g751] = {
+		.default_resolution = 9,
+		.default_sample_time = MSEC_PER_SEC / 10,
+	},
+	[lm75] = {
+		.default_resolution = 9,
+		.default_sample_time = MSEC_PER_SEC / 10,
+	},
+	[lm75a] = {
+		.default_resolution = 9,
+		.default_sample_time = MSEC_PER_SEC / 10,
+	},
+	[lm75b] = {
+		.default_resolution = 11,
+		.default_sample_time = MSEC_PER_SEC / 10,
+	},
+	[max6625] = {
+		.default_resolution = 9,
+		.default_sample_time = MSEC_PER_SEC / 7,
+	},
+	[max6626] = {
+		.default_resolution = 12,
+		.default_sample_time = MSEC_PER_SEC / 7,
+		.resolution_limits = 9,
+	},
+	[max31725] = {
+		.default_resolution = 16,
+		.default_sample_time = MSEC_PER_SEC / 20,
+	},
+	[tcn75] = {
+		.default_resolution = 9,
+		.default_sample_time = MSEC_PER_SEC / 18,
+	},
+	[pct2075] = {
+		.default_resolution = 11,
+		.default_sample_time = MSEC_PER_SEC / 10,
+		.num_sample_times = 31,
+		.sample_times = (unsigned int []){ 100, 200, 300, 400, 500, 600,
+		700, 800, 900, 1000, 1100, 1200, 1300, 1400, 1500, 1600, 1700,
+		1800, 1900, 2000, 2100, 2200, 2300, 2400, 2500, 2600, 2700,
+		2800, 2900, 3000, 3100 },
+	},
+	[mcp980x] = {
+		.set_mask = 3 << 5,	/* 12-bit mode */
+		.clr_mask = 1 << 7,	/* not one-shot mode */
+		.default_resolution = 12,
+		.resolution_limits = 9,
+		.default_sample_time = 240,
+		.num_sample_times = 4,
+		.sample_times = (unsigned int []){ 30, 60, 120, 240 },
+		.resolutions = (u8 []) {9, 10, 11, 12 },
+	},
+	[tmp100] = {
+		.set_mask = 3 << 5,	/* 12-bit mode */
+		.clr_mask = 1 << 7,	/* not one-shot mode */
+		.default_resolution = 12,
+		.default_sample_time = 320,
+		.num_sample_times = 4,
+		.sample_times = (unsigned int []){ 40, 80, 160, 320 },
+		.resolutions = (u8 []) {9, 10, 11, 12 },
+	},
+	[tmp101] = {
+		.set_mask = 3 << 5,	/* 12-bit mode */
+		.clr_mask = 1 << 7,	/* not one-shot mode */
+		.default_resolution = 12,
+		.default_sample_time = 320,
+		.num_sample_times = 4,
+		.sample_times = (unsigned int []){ 40, 80, 160, 320 },
+		.resolutions = (u8 []) {9, 10, 11, 12 },
+	},
+	[tmp105] = {
+		.set_mask = 3 << 5,	/* 12-bit mode */
+		.clr_mask = 1 << 7,	/* not one-shot mode*/
+		.default_resolution = 12,
+		.default_sample_time = 220,
+		.num_sample_times = 4,
+		.sample_times = (unsigned int []){ 28, 55, 110, 220 },
+		.resolutions = (u8 []) {9, 10, 11, 12 },
+	},
+	[tmp112] = {
+		.set_mask = 3 << 5,	/* 8 samples / second */
+		.clr_mask = 1 << 7,	/* no one-shot mode*/
+		.default_resolution = 12,
+		.default_sample_time = 125,
+		.num_sample_times = 4,
+		.sample_times = (unsigned int []){ 125, 250, 1000, 4000 },
+	},
+	[tmp175] = {
+		.set_mask = 3 << 5,	/* 12-bit mode */
+		.clr_mask = 1 << 7,	/* not one-shot mode*/
+		.default_resolution = 12,
+		.default_sample_time = 220,
+		.num_sample_times = 4,
+		.sample_times = (unsigned int []){ 28, 55, 110, 220 },
+		.resolutions = (u8 []) {9, 10, 11, 12 },
+	},
+	[tmp275] = {
+		.set_mask = 3 << 5,	/* 12-bit mode */
+		.clr_mask = 1 << 7,	/* not one-shot mode*/
+		.default_resolution = 12,
+		.default_sample_time = 220,
+		.num_sample_times = 4,
+		.sample_times = (unsigned int []){ 28, 55, 110, 220 },
+		.resolutions = (u8 []) {9, 10, 11, 12 },
+	},
+	[tmp75] = {
+		.set_mask = 3 << 5,	/* 12-bit mode */
+		.clr_mask = 1 << 7,	/* not one-shot mode*/
+		.default_resolution = 12,
+		.default_sample_time = 220,
+		.num_sample_times = 4,
+		.sample_times = (unsigned int []){ 28, 55, 110, 220 },
+		.resolutions = (u8 []) {9, 10, 11, 12 },
+	},
+	[tmp75b] = { /* not one-shot mode, Conversion rate 37Hz */
+		.clr_mask = 1 << 7 | 3 << 5,
+		.default_resolution = 12,
+		.default_sample_time = MSEC_PER_SEC / 37,
+		.sample_times = (unsigned int []){ MSEC_PER_SEC / 37,
+			MSEC_PER_SEC / 18,
+			MSEC_PER_SEC / 9, MSEC_PER_SEC / 4 },
+		.num_sample_times = 4,
+	},
+	[tmp75c] = {
+		.clr_mask = 1 << 5,	/*not one-shot mode*/
+		.default_resolution = 12,
+		.default_sample_time = MSEC_PER_SEC / 12,
+	}
+};
+
+/* input temp threshold check */
+typedef struct lm75_temp_threshold_s {
+    int chip_type;
+    int temp_max;
+    int temp_min;
+} lm75_temp_threshold_t;
+
+static lm75_temp_threshold_t g_lm75_temp_threshold_info[] = {
+    {
+        .chip_type = lm75,
+        .temp_max = 125000,
+        .temp_min = -55000,
+    },
+    {
+        .chip_type = tmp275,
+        .temp_max = 125000,
+        .temp_min = -40000,
+    },
+};
+
+/*-----------------------------------------------------------------------*/
+static int lm75_input_temp_check(struct lm75_data *data, int input_val)
+{
+    int i, size;
+
+    size = ARRAY_SIZE(g_lm75_temp_threshold_info);
+
+    for (i = 0; i < size; i++) {
+        if (g_lm75_temp_threshold_info[i].chip_type == data->kind) {
+            if ((input_val > g_lm75_temp_threshold_info[i].temp_max)
+                    || (input_val < g_lm75_temp_threshold_info[i].temp_min)) {
+                dev_dbg(&data->client->dev, "input temp: %d not in range[%d, %d]\n",
+                    input_val, g_lm75_temp_threshold_info[i].temp_min,
+                    g_lm75_temp_threshold_info[i].temp_max);
+                return -EINVAL;
+            }
+            dev_dbg(&data->client->dev, "input temp: %d in range[%d, %d]", input_val,
+                g_lm75_temp_threshold_info[i].temp_min, g_lm75_temp_threshold_info[i].temp_max);
+            return 0;
+        }
+    }
+    return 0;
+}
+
+static inline long lm75_reg_to_mc(s16 temp, u8 resolution)
+{
+	return ((temp >> (16 - resolution)) * 1000) >> (resolution - 8);
+}
+
+static int lm75_write_config(struct lm75_data *data, u8 set_mask,
+			     u8 clr_mask)
+{
+	u8 value;
+
+	clr_mask |= LM75_SHUTDOWN;
+	value = data->current_conf & ~clr_mask;
+	value |= set_mask;
+
+	if (data->current_conf != value) {
+		s32 err;
+
+		err = i2c_smbus_write_byte_data(data->client, LM75_REG_CONF,
+						value);
+		if (err)
+			return err;
+		data->current_conf = value;
+	}
+	return 0;
+}
+
+static int lm75_read(struct device *dev, enum hwmon_sensor_types type, u32 attr, int channel,
+               long *val)
+{
+    struct lm75_data *data = dev_get_drvdata(dev);
+    unsigned int regval;
+    int err, reg, i, ret;
+
+    switch (type) {
+    case hwmon_chip:
+        switch (attr) {
+        case hwmon_chip_update_interval:
+            *val = data->sample_time;
+            break;
+        default:
+            return -EINVAL;
+        }
+        break;
+    case hwmon_temp:
+        switch (attr) {
+        case hwmon_temp_input:
+            reg = LM75_REG_TEMP;
+            break;
+        case hwmon_temp_max:
+            reg = LM75_REG_MAX;
+            break;
+        case hwmon_temp_max_hyst:
+            reg = LM75_REG_HYST;
+            break;
+        default:
+            return -EINVAL;
+        }
+        for (i = 0; i < LM75_TEMP_INVALID_RETRY_TIMES; i++) {
+            err = regmap_read(data->regmap, reg, &regval);
+            if (err < 0) {
+                return err;
+            }
+            *val = lm75_reg_to_mc(regval, data->resolution);
+            if (reg != LM75_REG_TEMP) {
+                return 0;
+            }
+            /* do input_temp_check */
+            ret = lm75_input_temp_check(data, *val);
+            if (ret == 0) { /* input temp check ok */
+               return 0;
+            }
+            if ((i + 1) < LM75_TEMP_INVALID_RETRY_TIMES) {
+                msleep(data->sample_time);
+            }
+        }
+        dev_info(&data->client->dev, "temp_input value: %ld invalid\n", *val);
+        return -EINVAL;
+    default:
+        return -EINVAL;
+    }
+    return 0;
+}
+
+static int lm75_write_temp(struct device *dev, u32 attr, long temp)
+{
+	struct lm75_data *data = dev_get_drvdata(dev);
+	u8 resolution;
+	int reg;
+
+	switch (attr) {
+	case hwmon_temp_max:
+		reg = LM75_REG_MAX;
+		break;
+	case hwmon_temp_max_hyst:
+		reg = LM75_REG_HYST;
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	/*
+	 * Resolution of limit registers is assumed to be the same as the
+	 * temperature input register resolution unless given explicitly.
+	 */
+	if (data->params->resolution_limits)
+		resolution = data->params->resolution_limits;
+	else
+		resolution = data->resolution;
+
+	temp = clamp_val(temp, LM75_TEMP_MIN, LM75_TEMP_MAX);
+	temp = DIV_ROUND_CLOSEST(temp  << (resolution - 8),
+				 1000) << (16 - resolution);
+
+	return regmap_write(data->regmap, reg, (u16)temp);
+}
+
+static int lm75_update_interval(struct device *dev, long val)
+{
+	struct lm75_data *data = dev_get_drvdata(dev);
+	unsigned int reg;
+	u8 index;
+	s32 err;
+
+	index = find_closest(val, data->params->sample_times,
+			     (int)data->params->num_sample_times);
+
+	switch (data->kind) {
+	default:
+		err = lm75_write_config(data, lm75_sample_set_masks[index],
+					LM75_SAMPLE_CLEAR_MASK);
+		if (err)
+			return err;
+
+		data->sample_time = data->params->sample_times[index];
+		if (data->params->resolutions)
+			data->resolution = data->params->resolutions[index];
+		break;
+	case tmp112:
+		err = regmap_read(data->regmap, LM75_REG_CONF, &reg);
+		if (err < 0)
+			return err;
+		reg &= ~0x00c0;
+		reg |= (3 - index) << 6;
+		err = regmap_write(data->regmap, LM75_REG_CONF, reg);
+		if (err < 0)
+			return err;
+		data->sample_time = data->params->sample_times[index];
+		break;
+	case pct2075:
+		err = i2c_smbus_write_byte_data(data->client, PCT2075_REG_IDLE,
+						index + 1);
+		if (err)
+			return err;
+		data->sample_time = data->params->sample_times[index];
+		break;
+	}
+	return 0;
+}
+
+static int lm75_write_chip(struct device *dev, u32 attr, long val)
+{
+	switch (attr) {
+	case hwmon_chip_update_interval:
+		return lm75_update_interval(dev, val);
+	default:
+		return -EINVAL;
+	}
+	return 0;
+}
+
+static int lm75_write(struct device *dev, enum hwmon_sensor_types type,
+		      u32 attr, int channel, long val)
+{
+	switch (type) {
+	case hwmon_chip:
+		return lm75_write_chip(dev, attr, val);
+	case hwmon_temp:
+		return lm75_write_temp(dev, attr, val);
+	default:
+		return -EINVAL;
+	}
+	return 0;
+}
+
+static umode_t lm75_is_visible(const void *data, enum hwmon_sensor_types type,
+			       u32 attr, int channel)
+{
+	const struct lm75_data *config_data = data;
+
+	switch (type) {
+	case hwmon_chip:
+		switch (attr) {
+		case hwmon_chip_update_interval:
+			if (config_data->params->num_sample_times > 1)
+				return 0644;
+			return 0444;
+		}
+		break;
+	case hwmon_temp:
+		switch (attr) {
+		case hwmon_temp_input:
+			return 0444;
+		case hwmon_temp_max:
+		case hwmon_temp_max_hyst:
+			return 0644;
+		}
+		break;
+	default:
+		break;
+	}
+	return 0;
+}
+
+static const struct hwmon_channel_info *lm75_info[] = {
+	HWMON_CHANNEL_INFO(chip,
+			   HWMON_C_REGISTER_TZ | HWMON_C_UPDATE_INTERVAL),
+	HWMON_CHANNEL_INFO(temp,
+			   HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_MAX_HYST),
+	NULL
+};
+
+static const struct hwmon_ops lm75_hwmon_ops = {
+	.is_visible = lm75_is_visible,
+	.read = lm75_read,
+	.write = lm75_write,
+};
+
+static const struct hwmon_chip_info lm75_chip_info = {
+	.ops = &lm75_hwmon_ops,
+	.info = lm75_info,
+};
+
+static bool lm75_is_writeable_reg(struct device *dev, unsigned int reg)
+{
+	return reg != LM75_REG_TEMP;
+}
+
+static bool lm75_is_volatile_reg(struct device *dev, unsigned int reg)
+{
+	return reg == LM75_REG_TEMP || reg == LM75_REG_CONF;
+}
+
+static const struct regmap_config lm75_regmap_config = {
+	.reg_bits = 8,
+	.val_bits = 16,
+	.max_register = PCT2075_REG_IDLE,
+	.writeable_reg = lm75_is_writeable_reg,
+	.volatile_reg = lm75_is_volatile_reg,
+	.val_format_endian = REGMAP_ENDIAN_BIG,
+	.cache_type = REGCACHE_RBTREE,
+	.use_single_read = true,
+	.use_single_write = true,
+};
+
+static void lm75_disable_regulator(void *data)
+{
+	struct lm75_data *lm75 = data;
+
+	regulator_disable(lm75->vs);
+}
+
+static void lm75_remove(void *data)
+{
+	struct lm75_data *lm75 = data;
+	struct i2c_client *client = lm75->client;
+
+	i2c_smbus_write_byte_data(client, LM75_REG_CONF, lm75->orig_conf);
+}
+
+static const struct i2c_device_id lm75_ids[];
+
+static int lm75_probe(struct i2c_client *client)
+{
+	struct device *dev = &client->dev;
+	struct device *hwmon_dev;
+	struct lm75_data *data;
+	int status, err;
+	enum lm75_type kind;
+
+	if (client->dev.of_node)
+		kind = (enum lm75_type)of_device_get_match_data(&client->dev);
+	else
+		kind = i2c_match_id(lm75_ids, client)->driver_data;
+
+	if (!i2c_check_functionality(client->adapter,
+			I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA))
+		return -EIO;
+
+	data = devm_kzalloc(dev, sizeof(struct lm75_data), GFP_KERNEL);
+	if (!data)
+		return -ENOMEM;
+
+	data->client = client;
+	data->kind = kind;
+
+	data->vs = devm_regulator_get(dev, "vs");
+	if (IS_ERR(data->vs))
+		return PTR_ERR(data->vs);
+
+	data->regmap = devm_regmap_init_i2c(client, &lm75_regmap_config);
+	if (IS_ERR(data->regmap))
+		return PTR_ERR(data->regmap);
+
+	/* Set to LM75 resolution (9 bits, 1/2 degree C) and range.
+	 * Then tweak to be more precise when appropriate.
+	 */
+
+	data->params = &device_params[data->kind];
+
+	/* Save default sample time and resolution*/
+	data->sample_time = data->params->default_sample_time;
+	data->resolution = data->params->default_resolution;
+
+	/* Enable the power */
+	err = regulator_enable(data->vs);
+	if (err) {
+		dev_err(dev, "failed to enable regulator: %d\n", err);
+		return err;
+	}
+
+	err = devm_add_action_or_reset(dev, lm75_disable_regulator, data);
+	if (err)
+		return err;
+
+	/* Cache original configuration */
+	status = i2c_smbus_read_byte_data(client, LM75_REG_CONF);
+	if (status < 0) {
+		dev_dbg(dev, "Can't read config? %d\n", status);
+		return status;
+	}
+	data->orig_conf = status;
+	data->current_conf = status;
+
+	err = lm75_write_config(data, data->params->set_mask,
+				data->params->clr_mask);
+	if (err)
+		return err;
+
+	err = devm_add_action_or_reset(dev, lm75_remove, data);
+	if (err)
+		return err;
+
+	hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name,
+							 data, &lm75_chip_info,
+							 NULL);
+	if (IS_ERR(hwmon_dev))
+		return PTR_ERR(hwmon_dev);
+
+	dev_info(dev, "%s: sensor '%s'\n", dev_name(hwmon_dev), client->name);
+
+	return 0;
+}
+
+static const struct i2c_device_id lm75_ids[] = {
+	{ "wb_adt75", adt75, },
+	{ "wb_ds1775", ds1775, },
+	{ "wb_ds75", ds75, },
+	{ "wb_ds7505", ds7505, },
+	{ "wb_g751", g751, },
+	{ "wb_lm75", lm75, },
+	{ "wb_lm75a", lm75a, },
+	{ "wb_lm75b", lm75b, },
+	{ "wb_max6625", max6625, },
+	{ "wb_max6626", max6626, },
+	{ "wb_max31725", max31725, },
+	{ "wb_max31726", max31725, },
+	{ "wb_mcp980x", mcp980x, },
+	{ "wb_pct2075", pct2075, },
+	{ "wb_stds75", stds75, },
+	{ "wb_stlm75", stlm75, },
+	{ "wb_tcn75", tcn75, },
+	{ "wb_tmp100", tmp100, },
+	{ "wb_tmp101", tmp101, },
+	{ "wb_tmp105", tmp105, },
+	{ "wb_tmp112", tmp112, },
+	{ "wb_tmp175", tmp175, },
+	{ "wb_tmp275", tmp275, },
+	{ "wb_tmp75", tmp75, },
+	{ "wb_tmp75b", tmp75b, },
+	{ "wb_tmp75c", tmp75c, },
+	{ /* LIST END */ }
+};
+MODULE_DEVICE_TABLE(i2c, lm75_ids);
+
+static const struct of_device_id __maybe_unused lm75_of_match[] = {
+	{
+		.compatible = "adi,adt75",
+		.data = (void *)adt75
+	},
+	{
+		.compatible = "dallas,ds1775",
+		.data = (void *)ds1775
+	},
+	{
+		.compatible = "dallas,ds75",
+		.data = (void *)ds75
+	},
+	{
+		.compatible = "dallas,ds7505",
+		.data = (void *)ds7505
+	},
+	{
+		.compatible = "gmt,g751",
+		.data = (void *)g751
+	},
+	{
+		.compatible = "national,lm75",
+		.data = (void *)lm75
+	},
+	{
+		.compatible = "national,lm75a",
+		.data = (void *)lm75a
+	},
+	{
+		.compatible = "national,lm75b",
+		.data = (void *)lm75b
+	},
+	{
+		.compatible = "maxim,max6625",
+		.data = (void *)max6625
+	},
+	{
+		.compatible = "maxim,max6626",
+		.data = (void *)max6626
+	},
+	{
+		.compatible = "maxim,max31725",
+		.data = (void *)max31725
+	},
+	{
+		.compatible = "maxim,max31726",
+		.data = (void *)max31725
+	},
+	{
+		.compatible = "maxim,mcp980x",
+		.data = (void *)mcp980x
+	},
+	{
+		.compatible = "nxp,pct2075",
+		.data = (void *)pct2075
+	},
+	{
+		.compatible = "st,stds75",
+		.data = (void *)stds75
+	},
+	{
+		.compatible = "st,stlm75",
+		.data = (void *)stlm75
+	},
+	{
+		.compatible = "microchip,tcn75",
+		.data = (void *)tcn75
+	},
+	{
+		.compatible = "ti,tmp100",
+		.data = (void *)tmp100
+	},
+	{
+		.compatible = "ti,tmp101",
+		.data = (void *)tmp101
+	},
+	{
+		.compatible = "ti,tmp105",
+		.data = (void *)tmp105
+	},
+	{
+		.compatible = "ti,tmp112",
+		.data = (void *)tmp112
+	},
+	{
+		.compatible = "ti,tmp175",
+		.data = (void *)tmp175
+	},
+	{
+		.compatible = "ti,tmp275",
+		.data = (void *)tmp275
+	},
+	{
+		.compatible = "ti,tmp75",
+		.data = (void *)tmp75
+	},
+	{
+		.compatible = "ti,tmp75b",
+		.data = (void *)tmp75b
+	},
+	{
+		.compatible = "ti,tmp75c",
+		.data = (void *)tmp75c
+	},
+	{ },
+};
+MODULE_DEVICE_TABLE(of, lm75_of_match);
+
+#define LM75A_ID 0xA1
+#if 0
+/* Return 0 if detection is successful, -ENODEV otherwise */
+static int lm75_detect(struct i2c_client *new_client,
+		       struct i2c_board_info *info)
+{
+	struct i2c_adapter *adapter = new_client->adapter;
+	int i;
+	int conf, hyst, os;
+	bool is_lm75a = 0;
+
+	if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA |
+				     I2C_FUNC_SMBUS_WORD_DATA))
+		return -ENODEV;
+
+	/*
+	 * Now, we do the remaining detection. There is no identification-
+	 * dedicated register so we have to rely on several tricks:
+	 * unused bits, registers cycling over 8-address boundaries,
+	 * addresses 0x04-0x07 returning the last read value.
+	 * The cycling+unused addresses combination is not tested,
+	 * since it would significantly slow the detection down and would
+	 * hardly add any value.
+	 *
+	 * The National Semiconductor LM75A is different than earlier
+	 * LM75s.  It has an ID byte of 0xaX (where X is the chip
+	 * revision, with 1 being the only revision in existence) in
+	 * register 7, and unused registers return 0xff rather than the
+	 * last read value.
+	 *
+	 * Note that this function only detects the original National
+	 * Semiconductor LM75 and the LM75A. Clones from other vendors
+	 * aren't detected, on purpose, because they are typically never
+	 * found on PC hardware. They are found on embedded designs where
+	 * they can be instantiated explicitly so detection is not needed.
+	 * The absence of identification registers on all these clones
+	 * would make their exhaustive detection very difficult and weak,
+	 * and odds are that the driver would bind to unsupported devices.
+	 */
+
+	/* Unused bits */
+	conf = i2c_smbus_read_byte_data(new_client, 1);
+	if (conf & 0xe0)
+		return -ENODEV;
+
+	/* First check for LM75A */
+	if (i2c_smbus_read_byte_data(new_client, 7) == LM75A_ID) {
+		/*
+		 * LM75A returns 0xff on unused registers so
+		 * just to be sure we check for that too.
+		 */
+		if (i2c_smbus_read_byte_data(new_client, 4) != 0xff
+		 || i2c_smbus_read_byte_data(new_client, 5) != 0xff
+		 || i2c_smbus_read_byte_data(new_client, 6) != 0xff)
+			return -ENODEV;
+		is_lm75a = 1;
+		hyst = i2c_smbus_read_byte_data(new_client, 2);
+		os = i2c_smbus_read_byte_data(new_client, 3);
+	} else { /* Traditional style LM75 detection */
+		/* Unused addresses */
+		hyst = i2c_smbus_read_byte_data(new_client, 2);
+		if (i2c_smbus_read_byte_data(new_client, 4) != hyst
+		 || i2c_smbus_read_byte_data(new_client, 5) != hyst
+		 || i2c_smbus_read_byte_data(new_client, 6) != hyst
+		 || i2c_smbus_read_byte_data(new_client, 7) != hyst)
+			return -ENODEV;
+		os = i2c_smbus_read_byte_data(new_client, 3);
+		if (i2c_smbus_read_byte_data(new_client, 4) != os
+		 || i2c_smbus_read_byte_data(new_client, 5) != os
+		 || i2c_smbus_read_byte_data(new_client, 6) != os
+		 || i2c_smbus_read_byte_data(new_client, 7) != os)
+			return -ENODEV;
+	}
+	/*
+	 * It is very unlikely that this is a LM75 if both
+	 * hysteresis and temperature limit registers are 0.
+	 */
+	if (hyst == 0 && os == 0)
+		return -ENODEV;
+
+	/* Addresses cycling */
+	for (i = 8; i <= 248; i += 40) {
+		if (i2c_smbus_read_byte_data(new_client, i + 1) != conf
+		 || i2c_smbus_read_byte_data(new_client, i + 2) != hyst
+		 || i2c_smbus_read_byte_data(new_client, i + 3) != os)
+			return -ENODEV;
+		if (is_lm75a && i2c_smbus_read_byte_data(new_client, i + 7)
+				!= LM75A_ID)
+			return -ENODEV;
+	}
+
+	strlcpy(info->type, is_lm75a ? "lm75a" : "lm75", I2C_NAME_SIZE);
+
+	return 0;
+}
+#endif
+
+#ifdef CONFIG_PM
+static int lm75_suspend(struct device *dev)
+{
+	int status;
+	struct i2c_client *client = to_i2c_client(dev);
+
+	status = i2c_smbus_read_byte_data(client, LM75_REG_CONF);
+	if (status < 0) {
+		dev_dbg(&client->dev, "Can't read config? %d\n", status);
+		return status;
+	}
+	status = status | LM75_SHUTDOWN;
+	i2c_smbus_write_byte_data(client, LM75_REG_CONF, status);
+	return 0;
+}
+
+static int lm75_resume(struct device *dev)
+{
+	int status;
+	struct i2c_client *client = to_i2c_client(dev);
+
+	status = i2c_smbus_read_byte_data(client, LM75_REG_CONF);
+	if (status < 0) {
+		dev_dbg(&client->dev, "Can't read config? %d\n", status);
+		return status;
+	}
+	status = status & ~LM75_SHUTDOWN;
+	i2c_smbus_write_byte_data(client, LM75_REG_CONF, status);
+	return 0;
+}
+
+static const struct dev_pm_ops lm75_dev_pm_ops = {
+	.suspend	= lm75_suspend,
+	.resume		= lm75_resume,
+};
+#define LM75_DEV_PM_OPS (&lm75_dev_pm_ops)
+#else
+#define LM75_DEV_PM_OPS NULL
+#endif /* CONFIG_PM */
+
+static struct i2c_driver lm75_driver = {
+	.class		= I2C_CLASS_HWMON,
+	.driver = {
+		.name	= "wb_lm75",
+		.of_match_table = of_match_ptr(lm75_of_match),
+		.pm	= LM75_DEV_PM_OPS,
+	},
+	.probe_new	= lm75_probe,
+	.id_table	= lm75_ids,
+	/* .detect		= lm75_detect, */
+	/* .address_list	= normal_i2c, */
+};
+
+module_i2c_driver(lm75_driver);
+
+MODULE_AUTHOR("support");
+MODULE_DESCRIPTION("LM75 driver");
+MODULE_LICENSE("GPL");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_lm75.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_lm75.h
new file mode 100644
index 000000000..a39817116
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_lm75.h
@@ -0,0 +1,40 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/*
+ * lm75.h - Part of lm_sensors, Linux kernel modules for hardware monitoring
+ * Copyright (c) 2003 Mark M. Hoffman <mhoffman@lightlink.com>
+ */
+
+/*
+ * This file contains common code for encoding/decoding LM75 type
+ * temperature readings, which are emulated by many of the chips
+ * we support.  As the user is unlikely to load more than one driver
+ * which contains this code, we don't worry about the wasted space.
+ */
+
+#include <linux/kernel.h>
+
+/* straight from the datasheet */
+#define LM75_TEMP_MIN (-55000)
+#define LM75_TEMP_MAX 125000
+#define LM75_SHUTDOWN 0x01
+
+/*
+ * TEMP: 0.001C/bit (-55C to +125C)
+ * REG: (0.5C/bit, two's complement) << 7
+ */
+static inline u16 LM75_TEMP_TO_REG(long temp)
+{
+	int ntemp = clamp_val(temp, LM75_TEMP_MIN, LM75_TEMP_MAX);
+
+	ntemp += (ntemp < 0 ? -250 : 250);
+	return (u16)((ntemp / 500) << 7);
+}
+
+static inline int LM75_TEMP_FROM_REG(u16 reg)
+{
+	/*
+	 * use integer division instead of equivalent right shift to
+	 * guarantee arithmetic shift and preserve the sign
+	 */
+	return ((s16)reg / 128) * 500;
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_pmbus.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_pmbus.h
new file mode 100644
index 000000000..781f2ee07
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_pmbus.h
@@ -0,0 +1,535 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/*
+ * wb_pmbus.h - Common defines and structures for PMBus devices
+ *
+ * Copyright (c) 2010, 2011 Ericsson AB.
+ * Copyright (c) 2012 Guenter Roeck
+ */
+
+#ifndef WB_PMBUS_H
+#define WB_PMBUS_H
+
+#include <linux/bitops.h>
+#include <linux/regulator/driver.h>
+#include <linux/string.h>
+
+#define mem_clear(data, size) memset((data), 0, (size))
+
+/*
+ * Registers
+ */
+enum pmbus_regs {
+    PMBUS_PAGE            = 0x00,
+    PMBUS_OPERATION            = 0x01,
+    PMBUS_ON_OFF_CONFIG        = 0x02,
+    PMBUS_CLEAR_FAULTS        = 0x03,
+    PMBUS_PHASE            = 0x04,
+
+    PMBUS_WRITE_PROTECT        = 0x10,
+
+    PMBUS_CAPABILITY        = 0x19,
+    PMBUS_QUERY            = 0x1A,
+
+    PMBUS_VOUT_MODE            = 0x20,
+    PMBUS_VOUT_COMMAND        = 0x21,
+    PMBUS_VOUT_TRIM            = 0x22,
+    PMBUS_VOUT_CAL_OFFSET        = 0x23,
+    PMBUS_VOUT_MAX            = 0x24,
+    PMBUS_VOUT_MARGIN_HIGH        = 0x25,
+    PMBUS_VOUT_MARGIN_LOW        = 0x26,
+    PMBUS_VOUT_TRANSITION_RATE    = 0x27,
+    PMBUS_VOUT_DROOP        = 0x28,
+    PMBUS_VOUT_SCALE_LOOP        = 0x29,
+    PMBUS_VOUT_SCALE_MONITOR    = 0x2A,
+
+    PMBUS_COEFFICIENTS        = 0x30,
+    PMBUS_POUT_MAX            = 0x31,
+
+    PMBUS_FAN_CONFIG_12        = 0x3A,
+    PMBUS_FAN_COMMAND_1        = 0x3B,
+    PMBUS_FAN_COMMAND_2        = 0x3C,
+    PMBUS_FAN_CONFIG_34        = 0x3D,
+    PMBUS_FAN_COMMAND_3        = 0x3E,
+    PMBUS_FAN_COMMAND_4        = 0x3F,
+
+    PMBUS_VOUT_OV_FAULT_LIMIT    = 0x40,
+    PMBUS_VOUT_OV_FAULT_RESPONSE    = 0x41,
+    PMBUS_VOUT_OV_WARN_LIMIT    = 0x42,
+    PMBUS_VOUT_UV_WARN_LIMIT    = 0x43,
+    PMBUS_VOUT_UV_FAULT_LIMIT    = 0x44,
+    PMBUS_VOUT_UV_FAULT_RESPONSE    = 0x45,
+    PMBUS_IOUT_OC_FAULT_LIMIT    = 0x46,
+    PMBUS_IOUT_OC_FAULT_RESPONSE    = 0x47,
+    PMBUS_IOUT_OC_LV_FAULT_LIMIT    = 0x48,
+    PMBUS_IOUT_OC_LV_FAULT_RESPONSE    = 0x49,
+    PMBUS_IOUT_OC_WARN_LIMIT    = 0x4A,
+    PMBUS_IOUT_UC_FAULT_LIMIT    = 0x4B,
+    PMBUS_IOUT_UC_FAULT_RESPONSE    = 0x4C,
+
+    PMBUS_OT_FAULT_LIMIT        = 0x4F,
+    PMBUS_OT_FAULT_RESPONSE        = 0x50,
+    PMBUS_OT_WARN_LIMIT        = 0x51,
+    PMBUS_UT_WARN_LIMIT        = 0x52,
+    PMBUS_UT_FAULT_LIMIT        = 0x53,
+    PMBUS_UT_FAULT_RESPONSE        = 0x54,
+    PMBUS_VIN_OV_FAULT_LIMIT    = 0x55,
+    PMBUS_VIN_OV_FAULT_RESPONSE    = 0x56,
+    PMBUS_VIN_OV_WARN_LIMIT        = 0x57,
+    PMBUS_VIN_UV_WARN_LIMIT        = 0x58,
+    PMBUS_VIN_UV_FAULT_LIMIT    = 0x59,
+
+    PMBUS_IIN_OC_FAULT_LIMIT    = 0x5B,
+    PMBUS_IIN_OC_WARN_LIMIT        = 0x5D,
+
+    PMBUS_POUT_OP_FAULT_LIMIT    = 0x68,
+    PMBUS_POUT_OP_WARN_LIMIT    = 0x6A,
+    PMBUS_PIN_OP_WARN_LIMIT        = 0x6B,
+
+    PMBUS_STATUS_BYTE        = 0x78,
+    PMBUS_STATUS_WORD        = 0x79,
+    PMBUS_STATUS_VOUT        = 0x7A,
+    PMBUS_STATUS_IOUT        = 0x7B,
+    PMBUS_STATUS_INPUT        = 0x7C,
+    PMBUS_STATUS_TEMPERATURE    = 0x7D,
+    PMBUS_STATUS_CML        = 0x7E,
+    PMBUS_STATUS_OTHER        = 0x7F,
+    PMBUS_STATUS_MFR_SPECIFIC    = 0x80,
+    PMBUS_STATUS_FAN_12        = 0x81,
+    PMBUS_STATUS_FAN_34        = 0x82,
+
+    PMBUS_READ_VIN            = 0x88,
+    PMBUS_READ_IIN            = 0x89,
+    PMBUS_READ_VCAP            = 0x8A,
+    PMBUS_READ_VOUT            = 0x8B,
+    PMBUS_READ_IOUT            = 0x8C,
+    PMBUS_READ_TEMPERATURE_1    = 0x8D,
+    PMBUS_READ_TEMPERATURE_2    = 0x8E,
+    PMBUS_READ_TEMPERATURE_3    = 0x8F,
+    PMBUS_READ_FAN_SPEED_1        = 0x90,
+    PMBUS_READ_FAN_SPEED_2        = 0x91,
+    PMBUS_READ_FAN_SPEED_3        = 0x92,
+    PMBUS_READ_FAN_SPEED_4        = 0x93,
+    PMBUS_READ_DUTY_CYCLE        = 0x94,
+    PMBUS_READ_FREQUENCY        = 0x95,
+    PMBUS_READ_POUT            = 0x96,
+    PMBUS_READ_PIN            = 0x97,
+
+    PMBUS_REVISION            = 0x98,
+    PMBUS_MFR_ID            = 0x99,
+    PMBUS_MFR_MODEL            = 0x9A,
+    PMBUS_MFR_REVISION        = 0x9B,
+    PMBUS_MFR_LOCATION        = 0x9C,
+    PMBUS_MFR_DATE            = 0x9D,
+    PMBUS_MFR_SERIAL        = 0x9E,
+
+    PMBUS_MFR_VIN_MIN        = 0xA0,
+    PMBUS_MFR_VIN_MAX        = 0xA1,
+    PMBUS_MFR_IIN_MAX        = 0xA2,
+    PMBUS_MFR_PIN_MAX        = 0xA3,
+    PMBUS_MFR_VOUT_MIN        = 0xA4,
+    PMBUS_MFR_VOUT_MAX        = 0xA5,
+    PMBUS_MFR_IOUT_MAX        = 0xA6,
+    PMBUS_MFR_POUT_MAX        = 0xA7,
+
+    PMBUS_IC_DEVICE_ID        = 0xAD,
+    PMBUS_IC_DEVICE_REV        = 0xAE,
+
+    PMBUS_MFR_MAX_TEMP_1        = 0xC0,
+    PMBUS_MFR_MAX_TEMP_2        = 0xC1,
+    PMBUS_MFR_MAX_TEMP_3        = 0xC2,
+
+/*
+ * Virtual registers.
+ * Useful to support attributes which are not supported by standard PMBus
+ * registers but exist as manufacturer specific registers on individual chips.
+ * Must be mapped to real registers in device specific code.
+ *
+ * Semantics:
+ * Virtual registers are all word size.
+ * READ registers are read-only; writes are either ignored or return an error.
+ * RESET registers are read/write. Reading reset registers returns zero
+ * (used for detection), writing any value causes the associated history to be
+ * reset.
+ * Virtual registers have to be handled in device specific driver code. Chip
+ * driver code returns non-negative register values if a virtual register is
+ * supported, or a negative error code if not. The chip driver may return
+ * -ENODATA or any other error code in this case, though an error code other
+ * than -ENODATA is handled more efficiently and thus preferred. Either case,
+ * the calling PMBus core code will abort if the chip driver returns an error
+ * code when reading or writing virtual registers.
+ */
+    PMBUS_VIRT_BASE            = 0x100,
+    PMBUS_VIRT_READ_TEMP_AVG,
+    PMBUS_VIRT_READ_TEMP_MIN,
+    PMBUS_VIRT_READ_TEMP_MAX,
+    PMBUS_VIRT_RESET_TEMP_HISTORY,
+    PMBUS_VIRT_READ_VIN_AVG,
+    PMBUS_VIRT_READ_VIN_MIN,
+    PMBUS_VIRT_READ_VIN_MAX,
+    PMBUS_VIRT_RESET_VIN_HISTORY,
+    PMBUS_VIRT_READ_IIN_AVG,
+    PMBUS_VIRT_READ_IIN_MIN,
+    PMBUS_VIRT_READ_IIN_MAX,
+    PMBUS_VIRT_RESET_IIN_HISTORY,
+    PMBUS_VIRT_READ_PIN_AVG,
+    PMBUS_VIRT_READ_PIN_MIN,
+    PMBUS_VIRT_READ_PIN_MAX,
+    PMBUS_VIRT_RESET_PIN_HISTORY,
+    PMBUS_VIRT_READ_POUT_AVG,
+    PMBUS_VIRT_READ_POUT_MIN,
+    PMBUS_VIRT_READ_POUT_MAX,
+    PMBUS_VIRT_RESET_POUT_HISTORY,
+    PMBUS_VIRT_READ_VOUT_AVG,
+    PMBUS_VIRT_READ_VOUT_MIN,
+    PMBUS_VIRT_READ_VOUT_MAX,
+    PMBUS_VIRT_RESET_VOUT_HISTORY,
+    PMBUS_VIRT_READ_IOUT_AVG,
+    PMBUS_VIRT_READ_IOUT_MIN,
+    PMBUS_VIRT_READ_IOUT_MAX,
+    PMBUS_VIRT_RESET_IOUT_HISTORY,
+    PMBUS_VIRT_READ_TEMP2_AVG,
+    PMBUS_VIRT_READ_TEMP2_MIN,
+    PMBUS_VIRT_READ_TEMP2_MAX,
+    PMBUS_VIRT_RESET_TEMP2_HISTORY,
+
+    PMBUS_VIRT_READ_VMON,
+    PMBUS_VIRT_VMON_UV_WARN_LIMIT,
+    PMBUS_VIRT_VMON_OV_WARN_LIMIT,
+    PMBUS_VIRT_VMON_UV_FAULT_LIMIT,
+    PMBUS_VIRT_VMON_OV_FAULT_LIMIT,
+    PMBUS_VIRT_STATUS_VMON,
+
+    /*
+     * RPM and PWM Fan control
+     *
+     * Drivers wanting to expose PWM control must define the behaviour of
+     * PMBUS_VIRT_PWM_[1-4] and PMBUS_VIRT_PWM_ENABLE_[1-4] in the
+     * {read,write}_word_data callback.
+     *
+     * pmbus core provides a default implementation for
+     * PMBUS_VIRT_FAN_TARGET_[1-4].
+     *
+     * TARGET, PWM and PWM_ENABLE members must be defined sequentially;
+     * pmbus core uses the difference between the provided register and
+     * it's _1 counterpart to calculate the FAN/PWM ID.
+     */
+    PMBUS_VIRT_FAN_TARGET_1,
+    PMBUS_VIRT_FAN_TARGET_2,
+    PMBUS_VIRT_FAN_TARGET_3,
+    PMBUS_VIRT_FAN_TARGET_4,
+    PMBUS_VIRT_PWM_1,
+    PMBUS_VIRT_PWM_2,
+    PMBUS_VIRT_PWM_3,
+    PMBUS_VIRT_PWM_4,
+    PMBUS_VIRT_PWM_ENABLE_1,
+    PMBUS_VIRT_PWM_ENABLE_2,
+    PMBUS_VIRT_PWM_ENABLE_3,
+    PMBUS_VIRT_PWM_ENABLE_4,
+
+    /* Samples for average
+     *
+     * Drivers wanting to expose functionality for changing the number of
+     * samples used for average values should implement support in
+     * {read,write}_word_data callback for either PMBUS_VIRT_SAMPLES if it
+     * applies to all types of measurements, or any number of specific
+     * PMBUS_VIRT_*_SAMPLES registers to allow for individual control.
+     */
+    PMBUS_VIRT_SAMPLES,
+    PMBUS_VIRT_IN_SAMPLES,
+    PMBUS_VIRT_CURR_SAMPLES,
+    PMBUS_VIRT_POWER_SAMPLES,
+    PMBUS_VIRT_TEMP_SAMPLES,
+};
+
+/*
+ * OPERATION
+ */
+#define PB_OPERATION_CONTROL_ON        BIT(7)
+
+/*
+ * WRITE_PROTECT
+ */
+#define PB_WP_ALL    BIT(7)    /* all but WRITE_PROTECT */
+#define PB_WP_OP    BIT(6)    /* all but WP, OPERATION, PAGE */
+#define PB_WP_VOUT    BIT(5)    /* all but WP, OPERATION, PAGE, VOUT, ON_OFF */
+
+#define PB_WP_ANY    (PB_WP_ALL | PB_WP_OP | PB_WP_VOUT)
+
+/*
+ * CAPABILITY
+ */
+#define PB_CAPABILITY_SMBALERT        BIT(4)
+#define PB_CAPABILITY_ERROR_CHECK    BIT(7)
+
+/*
+ * VOUT_MODE
+ */
+#define PB_VOUT_MODE_MODE_MASK        0xe0
+#define PB_VOUT_MODE_PARAM_MASK        0x1f
+
+#define PB_VOUT_MODE_LINEAR        0x00
+#define PB_VOUT_MODE_VID        0x20
+#define PB_VOUT_MODE_DIRECT        0x40
+
+/*
+ * Fan configuration
+ */
+#define PB_FAN_2_PULSE_MASK        (BIT(0) | BIT(1))
+#define PB_FAN_2_RPM            BIT(2)
+#define PB_FAN_2_INSTALLED        BIT(3)
+#define PB_FAN_1_PULSE_MASK        (BIT(4) | BIT(5))
+#define PB_FAN_1_RPM            BIT(6)
+#define PB_FAN_1_INSTALLED        BIT(7)
+
+enum pmbus_fan_mode { percent = 0, rpm };
+
+/*
+ * STATUS_BYTE, STATUS_WORD (lower)
+ */
+#define PB_STATUS_NONE_ABOVE        BIT(0)
+#define PB_STATUS_CML            BIT(1)
+#define PB_STATUS_TEMPERATURE        BIT(2)
+#define PB_STATUS_VIN_UV        BIT(3)
+#define PB_STATUS_IOUT_OC        BIT(4)
+#define PB_STATUS_VOUT_OV        BIT(5)
+#define PB_STATUS_OFF            BIT(6)
+#define PB_STATUS_BUSY            BIT(7)
+
+/*
+ * STATUS_WORD (upper)
+ */
+#define PB_STATUS_UNKNOWN        BIT(8)
+#define PB_STATUS_OTHER            BIT(9)
+#define PB_STATUS_FANS            BIT(10)
+#define PB_STATUS_POWER_GOOD_N        BIT(11)
+#define PB_STATUS_WORD_MFR        BIT(12)
+#define PB_STATUS_INPUT            BIT(13)
+#define PB_STATUS_IOUT_POUT        BIT(14)
+#define PB_STATUS_VOUT            BIT(15)
+
+/*
+ * STATUS_IOUT
+ */
+#define PB_POUT_OP_WARNING        BIT(0)
+#define PB_POUT_OP_FAULT        BIT(1)
+#define PB_POWER_LIMITING        BIT(2)
+#define PB_CURRENT_SHARE_FAULT        BIT(3)
+#define PB_IOUT_UC_FAULT        BIT(4)
+#define PB_IOUT_OC_WARNING        BIT(5)
+#define PB_IOUT_OC_LV_FAULT        BIT(6)
+#define PB_IOUT_OC_FAULT        BIT(7)
+
+/*
+ * STATUS_VOUT, STATUS_INPUT
+ */
+#define PB_VOLTAGE_UV_FAULT        BIT(4)
+#define PB_VOLTAGE_UV_WARNING        BIT(5)
+#define PB_VOLTAGE_OV_WARNING        BIT(6)
+#define PB_VOLTAGE_OV_FAULT        BIT(7)
+
+/*
+ * STATUS_INPUT
+ */
+#define PB_PIN_OP_WARNING        BIT(0)
+#define PB_IIN_OC_WARNING        BIT(1)
+#define PB_IIN_OC_FAULT            BIT(2)
+
+/*
+ * STATUS_TEMPERATURE
+ */
+#define PB_TEMP_UT_FAULT        BIT(4)
+#define PB_TEMP_UT_WARNING        BIT(5)
+#define PB_TEMP_OT_WARNING        BIT(6)
+#define PB_TEMP_OT_FAULT        BIT(7)
+
+/*
+ * STATUS_FAN
+ */
+#define PB_FAN_AIRFLOW_WARNING        BIT(0)
+#define PB_FAN_AIRFLOW_FAULT        BIT(1)
+#define PB_FAN_FAN2_SPEED_OVERRIDE    BIT(2)
+#define PB_FAN_FAN1_SPEED_OVERRIDE    BIT(3)
+#define PB_FAN_FAN2_WARNING        BIT(4)
+#define PB_FAN_FAN1_WARNING        BIT(5)
+#define PB_FAN_FAN2_FAULT        BIT(6)
+#define PB_FAN_FAN1_FAULT        BIT(7)
+
+/*
+ * CML_FAULT_STATUS
+ */
+#define PB_CML_FAULT_OTHER_MEM_LOGIC    BIT(0)
+#define PB_CML_FAULT_OTHER_COMM        BIT(1)
+#define PB_CML_FAULT_PROCESSOR        BIT(3)
+#define PB_CML_FAULT_MEMORY        BIT(4)
+#define PB_CML_FAULT_PACKET_ERROR    BIT(5)
+#define PB_CML_FAULT_INVALID_DATA    BIT(6)
+#define PB_CML_FAULT_INVALID_COMMAND    BIT(7)
+
+enum pmbus_sensor_classes {
+    PSC_VOLTAGE_IN = 0,
+    PSC_VOLTAGE_OUT,
+    PSC_CURRENT_IN,
+    PSC_CURRENT_OUT,
+    PSC_POWER,
+    PSC_TEMPERATURE,
+    PSC_FAN,
+    PSC_PWM,
+    PSC_NUM_CLASSES        /* Number of power sensor classes */
+};
+
+#define PMBUS_PAGES    32    /* Per PMBus specification */
+#define PMBUS_PHASES    8    /* Maximum number of phases per page */
+
+/* Functionality bit mask */
+#define PMBUS_HAVE_VIN        BIT(0)
+#define PMBUS_HAVE_VCAP        BIT(1)
+#define PMBUS_HAVE_VOUT        BIT(2)
+#define PMBUS_HAVE_IIN        BIT(3)
+#define PMBUS_HAVE_IOUT        BIT(4)
+#define PMBUS_HAVE_PIN        BIT(5)
+#define PMBUS_HAVE_POUT        BIT(6)
+#define PMBUS_HAVE_FAN12    BIT(7)
+#define PMBUS_HAVE_FAN34    BIT(8)
+#define PMBUS_HAVE_TEMP        BIT(9)
+#define PMBUS_HAVE_TEMP2    BIT(10)
+#define PMBUS_HAVE_TEMP3    BIT(11)
+#define PMBUS_HAVE_STATUS_VOUT    BIT(12)
+#define PMBUS_HAVE_STATUS_IOUT    BIT(13)
+#define PMBUS_HAVE_STATUS_INPUT    BIT(14)
+#define PMBUS_HAVE_STATUS_TEMP    BIT(15)
+#define PMBUS_HAVE_STATUS_FAN12    BIT(16)
+#define PMBUS_HAVE_STATUS_FAN34    BIT(17)
+#define PMBUS_HAVE_VMON        BIT(18)
+#define PMBUS_HAVE_STATUS_VMON    BIT(19)
+#define PMBUS_HAVE_PWM12    BIT(20)
+#define PMBUS_HAVE_PWM34    BIT(21)
+#define PMBUS_HAVE_SAMPLES    BIT(22)
+
+#define PMBUS_PHASE_VIRTUAL    BIT(30)    /* Phases on this page are virtual */
+#define PMBUS_PAGE_VIRTUAL    BIT(31)    /* Page is virtual */
+
+enum pmbus_data_format { linear = 0, direct, vid };
+enum vrm_version { vr11 = 0, vr12, vr13, imvp9, amd625mv };
+
+struct pmbus_driver_info {
+    int pages;        /* Total number of pages */
+    u8 phases[PMBUS_PAGES];    /* Number of phases per page */
+    enum pmbus_data_format format[PSC_NUM_CLASSES];
+    enum vrm_version vrm_version[PMBUS_PAGES]; /* vrm version per page */
+    /*
+     * Support one set of coefficients for each sensor type
+     * Used for chips providing data in direct mode.
+     */
+    int m[PSC_NUM_CLASSES];    /* mantissa for direct data format */
+    int b[PSC_NUM_CLASSES];    /* offset */
+    int R[PSC_NUM_CLASSES];    /* exponent */
+
+    u32 func[PMBUS_PAGES];    /* Functionality, per page */
+    u32 pfunc[PMBUS_PHASES];/* Functionality, per phase */
+    /*
+     * The following functions map manufacturing specific register values
+     * to PMBus standard register values. Specify only if mapping is
+     * necessary.
+     * Functions return the register value (read) or zero (write) if
+     * successful. A return value of -ENODATA indicates that there is no
+     * manufacturer specific register, but that a standard PMBus register
+     * may exist. Any other negative return value indicates that the
+     * register does not exist, and that no attempt should be made to read
+     * the standard register.
+     */
+    int (*read_byte_data)(struct i2c_client *client, int page, int reg);
+    int (*read_word_data)(struct i2c_client *client, int page, int phase,
+                  int reg);
+    int (*write_word_data)(struct i2c_client *client, int page, int reg,
+                   u16 word);
+    int (*write_byte)(struct i2c_client *client, int page, u8 value);
+    /*
+     * The identify function determines supported PMBus functionality.
+     * This function is only necessary if a chip driver supports multiple
+     * chips, and the chip functionality is not pre-determined.
+     */
+    int (*identify)(struct i2c_client *client,
+            struct pmbus_driver_info *info);
+
+    /* Regulator functionality, if supported by this chip driver. */
+    int num_regulators;
+    const struct regulator_desc *reg_desc;
+
+    /* custom attributes */
+    const struct attribute_group **groups;
+};
+
+/* Regulator ops */
+
+extern const struct regulator_ops wb_pmbus_regulator_ops;
+
+/* Macro for filling in array of struct regulator_desc */
+#define PMBUS_REGULATOR(_name, _id)                \
+    [_id] = {                        \
+        .name = (_name # _id),                \
+        .id = (_id),                    \
+        .of_match = of_match_ptr(_name # _id),        \
+        .regulators_node = of_match_ptr("regulators"),    \
+        .ops = &wb_pmbus_regulator_ops,            \
+        .type = REGULATOR_VOLTAGE,            \
+        .owner = THIS_MODULE,                \
+    }
+
+struct pmbus_data {
+    struct device *dev;
+    struct device *hwmon_dev;
+
+    u32 flags;        /* from platform data */
+
+    int exponent[PMBUS_PAGES]; /* linear mode: exponent for output voltages */
+
+    const struct pmbus_driver_info *info;
+
+    int max_attributes;
+    int num_attributes;
+    struct attribute_group group;
+    const struct attribute_group **groups;
+    struct dentry *debugfs;        /* debugfs device directory */
+
+    struct pmbus_sensor *sensors;
+
+    struct mutex update_lock;
+
+    bool has_status_word;        /* device uses STATUS_WORD register */
+    int (*read_status)(struct i2c_client *client, int page);
+
+    s16 currpage;     /* current page, -1 for unknown/unset */
+    s16 currphase;    /* current phase, 0xff for all, -1 for unknown/unset */
+    int vout_max[PMBUS_PAGES];    /* pmbus maximum output voltage */
+    int vout_min[PMBUS_PAGES];    /* pmbus minimum output voltage */
+};
+
+/* Function declarations */
+void wb_pmbus_clear_cache(struct i2c_client *client);
+int wb_pmbus_set_page(struct i2c_client *client, int page, int phase);
+int wb_pmbus_read_word_data(struct i2c_client *client, int page, int phase,
+             u8 reg);
+int wb_pmbus_write_word_data(struct i2c_client *client, int page, u8 reg,
+              u16 word);
+int wb_pmbus_read_byte_data(struct i2c_client *client, int page, u8 reg);
+int wb_pmbus_write_byte(struct i2c_client *client, int page, u8 value);
+int wb_pmbus_write_byte_data(struct i2c_client *client, int page, u8 reg,
+              u8 value);
+int wb_pmbus_update_byte_data(struct i2c_client *client, int page, u8 reg,
+               u8 mask, u8 value);
+void wb_pmbus_clear_faults(struct i2c_client *client);
+bool wb_pmbus_check_byte_register(struct i2c_client *client, int page, int reg);
+bool wb_pmbus_check_word_register(struct i2c_client *client, int page, int reg);
+int wb_pmbus_do_probe(struct i2c_client *client, struct pmbus_driver_info *info);
+void wb_pmbus_do_remove(struct i2c_client *client);
+const struct pmbus_driver_info *wb_pmbus_get_driver_info(struct i2c_client
+                              *client);
+int wb_pmbus_get_fan_rate_device(struct i2c_client *client, int page, int id,
+                  enum pmbus_fan_mode mode);
+int wb_pmbus_get_fan_rate_cached(struct i2c_client *client, int page, int id,
+                  enum pmbus_fan_mode mode);
+int wb_pmbus_update_fan(struct i2c_client *client, int page, int id,
+             u8 config, u8 mask, u16 command);
+struct dentry *wb_pmbus_get_debugfs_dir(struct i2c_client *client);
+
+#endif /* WB_PMBUS_H */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_pmbus_core.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_pmbus_core.c
new file mode 100644
index 000000000..3a86ade43
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_pmbus_core.c
@@ -0,0 +1,2780 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Hardware monitoring driver for PMBus devices
+ *
+ * Copyright (c) 2010, 2011 Ericsson AB.
+ * Copyright (c) 2012 Guenter Roeck
+ */
+
+#include <linux/debugfs.h>
+#include <linux/kernel.h>
+#include <linux/math64.h>
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/err.h>
+#include <linux/slab.h>
+#include <linux/i2c.h>
+#include <linux/hwmon.h>
+#include <linux/hwmon-sysfs.h>
+#include <linux/pmbus.h>
+#include <linux/regulator/driver.h>
+#include <linux/regulator/machine.h>
+#include <linux/delay.h>
+#include "wb_pmbus.h"
+
+/*
+ * Number of additional attribute pointers to allocate
+ * with each call to krealloc
+ */
+#define PMBUS_ATTR_ALLOC_SIZE    (32)
+#define PMBUS_NAME_SIZE          (24)
+#define PMBUS_RETRY_SLEEP_TIME   (10000)   /* 10ms */
+#define PMBUS_RETRY_TIME         (3)
+
+struct pmbus_sensor {
+    struct pmbus_sensor *next;
+    char name[PMBUS_NAME_SIZE];    /* sysfs sensor name */
+    struct device_attribute attribute;
+    u8 page;        /* page number */
+    u8 phase;        /* phase number, 0xff for all phases */
+    u16 reg;        /* register */
+    enum pmbus_sensor_classes class;    /* sensor class */
+    bool update;        /* runtime sensor update needed */
+    bool convert;        /* Whether or not to apply linear/vid/direct */
+    int data;        /* Sensor data.
+                   Negative if there was a read error */
+};
+#define to_pmbus_sensor(_attr) \
+    container_of(_attr, struct pmbus_sensor, attribute)
+
+struct pmbus_boolean {
+    char name[PMBUS_NAME_SIZE];    /* sysfs boolean name */
+    struct sensor_device_attribute attribute;
+    struct pmbus_sensor *s1;
+    struct pmbus_sensor *s2;
+};
+#define to_pmbus_boolean(_attr) \
+    container_of(_attr, struct pmbus_boolean, attribute)
+
+struct pmbus_label {
+    char name[PMBUS_NAME_SIZE];    /* sysfs label name */
+    struct device_attribute attribute;
+    char label[PMBUS_NAME_SIZE];    /* label */
+};
+#define to_pmbus_label(_attr) \
+    container_of(_attr, struct pmbus_label, attribute)
+
+/* Macros for converting between sensor index and register/page/status mask */
+
+#define PB_STATUS_MASK    0xffff
+#define PB_REG_SHIFT    16
+#define PB_REG_MASK    0x3ff
+#define PB_PAGE_SHIFT    26
+#define PB_PAGE_MASK    0x3f
+
+#define pb_reg_to_index(page, reg, mask)    (((page) << PB_PAGE_SHIFT) | \
+                         ((reg) << PB_REG_SHIFT) | (mask))
+
+#define pb_index_to_page(index)            (((index) >> PB_PAGE_SHIFT) & PB_PAGE_MASK)
+#define pb_index_to_reg(index)            (((index) >> PB_REG_SHIFT) & PB_REG_MASK)
+#define pb_index_to_mask(index)            ((index) & PB_STATUS_MASK)
+
+struct pmbus_debugfs_entry {
+    struct i2c_client *client;
+    u8 page;
+    u8 reg;
+};
+
+static const int pmbus_fan_rpm_mask[] = {
+    PB_FAN_1_RPM,
+    PB_FAN_2_RPM,
+    PB_FAN_1_RPM,
+    PB_FAN_2_RPM,
+};
+
+static const int pmbus_fan_config_registers[] = {
+    PMBUS_FAN_CONFIG_12,
+    PMBUS_FAN_CONFIG_12,
+    PMBUS_FAN_CONFIG_34,
+    PMBUS_FAN_CONFIG_34
+};
+
+static const int pmbus_fan_command_registers[] = {
+    PMBUS_FAN_COMMAND_1,
+    PMBUS_FAN_COMMAND_2,
+    PMBUS_FAN_COMMAND_3,
+    PMBUS_FAN_COMMAND_4,
+};
+
+void wb_pmbus_clear_cache(struct i2c_client *client)
+{
+    struct pmbus_data *data = i2c_get_clientdata(client);
+    struct pmbus_sensor *sensor;
+
+    for (sensor = data->sensors; sensor; sensor = sensor->next)
+        sensor->data = -ENODATA;
+}
+EXPORT_SYMBOL_GPL(wb_pmbus_clear_cache);
+
+static int wb_pmbus_set_page_tmp(struct i2c_client *client, int page, int phase)
+{
+    struct pmbus_data *data = i2c_get_clientdata(client);
+    int rv;
+
+    if (page < 0)
+        return 0;
+
+    if (!(data->info->func[page] & PMBUS_PAGE_VIRTUAL) &&
+        data->info->pages > 1 && page != data->currpage) {
+        rv = i2c_smbus_write_byte_data(client, PMBUS_PAGE, page);
+        if (rv < 0)
+            return rv;
+
+        rv = i2c_smbus_read_byte_data(client, PMBUS_PAGE);
+        if (rv < 0)
+            return rv;
+
+        if (rv != page)
+            return -EIO;
+    }
+    data->currpage = page;
+
+    if (data->info->phases[page] && data->currphase != phase &&
+        !(data->info->func[page] & PMBUS_PHASE_VIRTUAL)) {
+        rv = i2c_smbus_write_byte_data(client, PMBUS_PHASE,
+                           phase);
+        if (rv)
+            return rv;
+    }
+    data->currphase = phase;
+
+    return 0;
+}
+
+int wb_pmbus_set_page(struct i2c_client *client, int page, int phase)
+{
+    int rv, i;
+    struct device *dev = &client->dev;
+
+    for (i = 0; i < PMBUS_RETRY_TIME; i++) {
+        rv = wb_pmbus_set_page_tmp(client, page, phase);
+        if(rv >= 0){
+            return rv;
+        }
+        if ((i + 1) < PMBUS_RETRY_TIME) {
+            usleep_range(PMBUS_RETRY_SLEEP_TIME, PMBUS_RETRY_SLEEP_TIME + 1);
+        }
+    }
+    dev_dbg(dev, "wb_pmbus_set_page failed, page=%d, phase=%d, rv=%d\n",
+        page, phase, rv);
+    return rv;
+}
+EXPORT_SYMBOL_GPL(wb_pmbus_set_page);
+
+static int wb_pmbus_write_byte_tmp(struct i2c_client *client, int page, u8 value)
+{
+    int rv;
+
+    rv = wb_pmbus_set_page(client, page, 0xff);
+    if (rv < 0)
+        return rv;
+
+    return i2c_smbus_write_byte(client, value);
+}
+
+int wb_pmbus_write_byte(struct i2c_client *client, int page, u8 value)
+{
+    int rv, i;
+    struct device *dev = &client->dev;
+
+    for (i = 0; i < PMBUS_RETRY_TIME; i++) {
+        rv = wb_pmbus_write_byte_tmp(client, page, value);
+        if(rv >= 0){
+            return rv;
+        }
+        if ((i + 1) < PMBUS_RETRY_TIME) {
+            usleep_range(PMBUS_RETRY_SLEEP_TIME, PMBUS_RETRY_SLEEP_TIME + 1);
+        }
+    }
+    dev_dbg(dev, "wb_pmbus_write_byte failed, page=%d, value=0x%x, rv: %d\n",
+        page, value, rv);
+    return rv;
+}
+
+EXPORT_SYMBOL_GPL(wb_pmbus_write_byte);
+
+/*
+ * _pmbus_write_byte() is similar to pmbus_write_byte(), but checks if
+ * a device specific mapping function exists and calls it if necessary.
+ */
+static int _pmbus_write_byte(struct i2c_client *client, int page, u8 value)
+{
+    struct pmbus_data *data = i2c_get_clientdata(client);
+    const struct pmbus_driver_info *info = data->info;
+    int status;
+
+    if (info->write_byte) {
+        status = info->write_byte(client, page, value);
+        if (status != -ENODATA)
+            return status;
+    }
+    return wb_pmbus_write_byte(client, page, value);
+}
+
+static int wb_pmbus_write_word_data_tmp(struct i2c_client *client, int page, u8 reg,
+              u16 word)
+{
+    int rv;
+
+    rv = wb_pmbus_set_page(client, page, 0xff);
+    if (rv < 0)
+        return rv;
+
+    return i2c_smbus_write_word_data(client, reg, word);
+}
+
+int wb_pmbus_write_word_data(struct i2c_client *client, int page, u8 reg,
+              u16 word)
+{
+    int rv, i;
+    struct device *dev = &client->dev;
+
+    for (i = 0; i < PMBUS_RETRY_TIME; i++) {
+        rv = wb_pmbus_write_word_data_tmp(client, page, reg, word);
+        if(rv >= 0){
+            return rv;
+        }
+        if ((i + 1) < PMBUS_RETRY_TIME) {
+            usleep_range(PMBUS_RETRY_SLEEP_TIME, PMBUS_RETRY_SLEEP_TIME + 1);
+        }
+    }
+    dev_dbg(dev, "wb_pmbus_write_word_data failed, page: %d, reg: 0x%x, value: 0x%x, rv: %d\n",
+        page, reg, word, rv);
+    return rv;
+
+}
+EXPORT_SYMBOL_GPL(wb_pmbus_write_word_data);
+
+static int pmbus_write_virt_reg(struct i2c_client *client, int page, int reg,
+                u16 word)
+{
+    int bit;
+    int id;
+    int rv;
+
+    switch (reg) {
+    case PMBUS_VIRT_FAN_TARGET_1 ... PMBUS_VIRT_FAN_TARGET_4:
+        id = reg - PMBUS_VIRT_FAN_TARGET_1;
+        bit = pmbus_fan_rpm_mask[id];
+        rv = wb_pmbus_update_fan(client, page, id, bit, bit, word);
+        break;
+    default:
+        rv = -ENXIO;
+        break;
+    }
+
+    return rv;
+}
+
+/*
+ * _pmbus_write_word_data() is similar to pmbus_write_word_data(), but checks if
+ * a device specific mapping function exists and calls it if necessary.
+ */
+static int _pmbus_write_word_data(struct i2c_client *client, int page, int reg,
+                  u16 word)
+{
+    struct pmbus_data *data = i2c_get_clientdata(client);
+    const struct pmbus_driver_info *info = data->info;
+    int status;
+
+    if (info->write_word_data) {
+        status = info->write_word_data(client, page, reg, word);
+        if (status != -ENODATA)
+            return status;
+    }
+
+    if (reg >= PMBUS_VIRT_BASE)
+        return pmbus_write_virt_reg(client, page, reg, word);
+
+    return wb_pmbus_write_word_data(client, page, reg, word);
+}
+
+int wb_pmbus_update_fan(struct i2c_client *client, int page, int id,
+             u8 config, u8 mask, u16 command)
+{
+    int from;
+    int rv;
+    u8 to;
+
+    from = wb_pmbus_read_byte_data(client, page,
+                    pmbus_fan_config_registers[id]);
+    if (from < 0)
+        return from;
+
+    to = (from & ~mask) | (config & mask);
+    if (to != from) {
+        rv = wb_pmbus_write_byte_data(client, page,
+                       pmbus_fan_config_registers[id], to);
+        if (rv < 0)
+            return rv;
+    }
+
+    return _pmbus_write_word_data(client, page,
+                      pmbus_fan_command_registers[id], command);
+}
+EXPORT_SYMBOL_GPL(wb_pmbus_update_fan);
+
+static int wb_pmbus_read_word_data_tmp(struct i2c_client *client, int page, int phase, u8 reg)
+{
+    int rv;
+
+    rv = wb_pmbus_set_page(client, page, phase);
+    if (rv < 0)
+        return rv;
+
+    return i2c_smbus_read_word_data(client, reg);
+}
+
+int wb_pmbus_read_word_data(struct i2c_client *client, int page, int phase, u8 reg)
+{
+    int rv, i;
+    struct device *dev = &client->dev;
+
+    for (i = 0; i < PMBUS_RETRY_TIME; i++) {
+        rv = wb_pmbus_read_word_data_tmp(client, page, phase, reg);
+        if(rv >= 0){
+            return rv;
+        }
+        if ((i + 1) < PMBUS_RETRY_TIME) {
+            usleep_range(PMBUS_RETRY_SLEEP_TIME, PMBUS_RETRY_SLEEP_TIME + 1);
+        }
+    }
+    dev_dbg(dev, "wb_pmbus_read_word_data failed, page: %d, phase: %d, reg: 0x%x, rv: %d\n",
+        page, phase, reg, rv);
+    return rv;
+}
+EXPORT_SYMBOL_GPL(wb_pmbus_read_word_data);
+
+static int pmbus_read_virt_reg(struct i2c_client *client, int page, int reg)
+{
+    int rv;
+    int id;
+
+    switch (reg) {
+    case PMBUS_VIRT_FAN_TARGET_1 ... PMBUS_VIRT_FAN_TARGET_4:
+        id = reg - PMBUS_VIRT_FAN_TARGET_1;
+        rv = wb_pmbus_get_fan_rate_device(client, page, id, rpm);
+        break;
+    default:
+        rv = -ENXIO;
+        break;
+    }
+
+    return rv;
+}
+
+/*
+ * _pmbus_read_word_data() is similar to wb_pmbus_read_word_data(), but checks if
+ * a device specific mapping function exists and calls it if necessary.
+ */
+static int _pmbus_read_word_data(struct i2c_client *client, int page,
+                 int phase, int reg)
+{
+    struct pmbus_data *data = i2c_get_clientdata(client);
+    const struct pmbus_driver_info *info = data->info;
+    int status;
+
+    if (info->read_word_data) {
+        status = info->read_word_data(client, page, phase, reg);
+        if (status != -ENODATA)
+            return status;
+    }
+
+    if (reg >= PMBUS_VIRT_BASE)
+        return pmbus_read_virt_reg(client, page, reg);
+
+    return wb_pmbus_read_word_data(client, page, phase, reg);
+}
+
+/* Same as above, but without phase parameter, for use in check functions */
+static int __pmbus_read_word_data(struct i2c_client *client, int page, int reg)
+{
+    return _pmbus_read_word_data(client, page, 0xff, reg);
+}
+
+static int wb_pmbus_read_byte_data_tmp(struct i2c_client *client, int page, u8 reg)
+{
+    int rv;
+
+    rv = wb_pmbus_set_page(client, page, 0xff);
+    if (rv < 0)
+        return rv;
+
+    return i2c_smbus_read_byte_data(client, reg);
+}
+
+int wb_pmbus_read_byte_data(struct i2c_client *client, int page, u8 reg)
+{
+    int rv, i;
+    struct device *dev = &client->dev;
+
+    for (i = 0; i < PMBUS_RETRY_TIME; i++) {
+        rv = wb_pmbus_read_byte_data_tmp(client, page, reg);
+        if(rv >= 0){
+            return rv;
+        }
+        if ((i + 1) < PMBUS_RETRY_TIME) {
+            usleep_range(PMBUS_RETRY_SLEEP_TIME, PMBUS_RETRY_SLEEP_TIME + 1);
+        }
+    }
+    dev_dbg(dev, "wb_pmbus_read_byte_data failed, page: %d, reg: 0x%x, rv: %d\n",
+        page, reg, rv);
+    return rv;
+}
+EXPORT_SYMBOL_GPL(wb_pmbus_read_byte_data);
+
+static int wb_pmbus_write_byte_data_tmp(struct i2c_client *client, int page, u8 reg, u8 value)
+{
+    int rv;
+
+    rv = wb_pmbus_set_page(client, page, 0xff);
+    if (rv < 0)
+        return rv;
+
+    return i2c_smbus_write_byte_data(client, reg, value);
+}
+
+int wb_pmbus_write_byte_data(struct i2c_client *client, int page, u8 reg, u8 value)
+{
+    int rv, i;
+    struct device *dev = &client->dev;
+
+    for (i = 0; i < PMBUS_RETRY_TIME; i++) {
+        rv = wb_pmbus_write_byte_data_tmp(client, page, reg, value);
+        if(rv >= 0){
+            return rv;
+        }
+        if ((i + 1) < PMBUS_RETRY_TIME) {
+            usleep_range(PMBUS_RETRY_SLEEP_TIME, PMBUS_RETRY_SLEEP_TIME + 1);
+        }
+    }
+    dev_dbg(dev, "wb_pmbus_write_byte_data failed, page: %d, reg: 0x%x, value: 0x%x, rv: %d\n",
+        page, reg, value, rv);
+    return rv;
+}
+EXPORT_SYMBOL_GPL(wb_pmbus_write_byte_data);
+
+int wb_pmbus_update_byte_data(struct i2c_client *client, int page, u8 reg,
+               u8 mask, u8 value)
+{
+    unsigned int tmp;
+    int rv;
+
+    rv = wb_pmbus_read_byte_data(client, page, reg);
+    if (rv < 0)
+        return rv;
+
+    tmp = (rv & ~mask) | (value & mask);
+
+    if (tmp != rv)
+        rv = wb_pmbus_write_byte_data(client, page, reg, tmp);
+
+    return rv;
+}
+EXPORT_SYMBOL_GPL(wb_pmbus_update_byte_data);
+
+/*
+ * _pmbus_read_byte_data() is similar to wb_pmbus_read_byte_data(), but checks if
+ * a device specific mapping function exists and calls it if necessary.
+ */
+static int _pmbus_read_byte_data(struct i2c_client *client, int page, int reg)
+{
+    struct pmbus_data *data = i2c_get_clientdata(client);
+    const struct pmbus_driver_info *info = data->info;
+    int status;
+
+    if (info->read_byte_data) {
+        status = info->read_byte_data(client, page, reg);
+        if (status != -ENODATA)
+            return status;
+    }
+    return wb_pmbus_read_byte_data(client, page, reg);
+}
+
+static struct pmbus_sensor *pmbus_find_sensor(struct pmbus_data *data, int page,
+                          int reg)
+{
+    struct pmbus_sensor *sensor;
+
+    for (sensor = data->sensors; sensor; sensor = sensor->next) {
+        if (sensor->page == page && sensor->reg == reg)
+            return sensor;
+    }
+
+    return ERR_PTR(-EINVAL);
+}
+
+static int pmbus_get_fan_rate(struct i2c_client *client, int page, int id,
+                  enum pmbus_fan_mode mode,
+                  bool from_cache)
+{
+    struct pmbus_data *data = i2c_get_clientdata(client);
+    bool want_rpm, have_rpm;
+    struct pmbus_sensor *s;
+    int config;
+    int reg;
+
+    want_rpm = (mode == rpm);
+
+    if (from_cache) {
+        reg = want_rpm ? PMBUS_VIRT_FAN_TARGET_1 : PMBUS_VIRT_PWM_1;
+        s = pmbus_find_sensor(data, page, reg + id);
+        if (IS_ERR(s))
+            return PTR_ERR(s);
+
+        return s->data;
+    }
+
+    config = wb_pmbus_read_byte_data(client, page,
+                      pmbus_fan_config_registers[id]);
+    if (config < 0)
+        return config;
+
+    have_rpm = !!(config & pmbus_fan_rpm_mask[id]);
+    if (want_rpm == have_rpm)
+        return wb_pmbus_read_word_data(client, page, 0xff,
+                        pmbus_fan_command_registers[id]);
+
+    /* Can't sensibly map between RPM and PWM, just return zero */
+    return 0;
+}
+
+int wb_pmbus_get_fan_rate_device(struct i2c_client *client, int page, int id,
+                  enum pmbus_fan_mode mode)
+{
+    return pmbus_get_fan_rate(client, page, id, mode, false);
+}
+EXPORT_SYMBOL_GPL(wb_pmbus_get_fan_rate_device);
+
+int wb_pmbus_get_fan_rate_cached(struct i2c_client *client, int page, int id,
+                  enum pmbus_fan_mode mode)
+{
+    return pmbus_get_fan_rate(client, page, id, mode, true);
+}
+EXPORT_SYMBOL_GPL(wb_pmbus_get_fan_rate_cached);
+
+static void pmbus_clear_fault_page(struct i2c_client *client, int page)
+{
+    _pmbus_write_byte(client, page, PMBUS_CLEAR_FAULTS);
+}
+
+void wb_pmbus_clear_faults(struct i2c_client *client)
+{
+    struct pmbus_data *data = i2c_get_clientdata(client);
+    int i;
+
+    for (i = 0; i < data->info->pages; i++)
+        pmbus_clear_fault_page(client, i);
+}
+EXPORT_SYMBOL_GPL(wb_pmbus_clear_faults);
+
+static int pmbus_check_status_cml(struct i2c_client *client)
+{
+    struct pmbus_data *data = i2c_get_clientdata(client);
+    int status, status2;
+
+    status = data->read_status(client, -1);
+    if (status < 0 || (status & PB_STATUS_CML)) {
+        status2 = _pmbus_read_byte_data(client, -1, PMBUS_STATUS_CML);
+        if (status2 < 0 || (status2 & PB_CML_FAULT_INVALID_COMMAND))
+            return -EIO;
+    }
+    return 0;
+}
+
+static bool pmbus_check_register(struct i2c_client *client,
+                 int (*func)(struct i2c_client *client,
+                         int page, int reg),
+                 int page, int reg)
+{
+    int rv;
+    struct pmbus_data *data = i2c_get_clientdata(client);
+
+    rv = func(client, page, reg);
+    if (rv >= 0 && !(data->flags & PMBUS_SKIP_STATUS_CHECK))
+        rv = pmbus_check_status_cml(client);
+    pmbus_clear_fault_page(client, -1);
+    return rv >= 0;
+}
+
+static bool pmbus_check_status_register(struct i2c_client *client, int page)
+{
+    int status;
+    struct pmbus_data *data = i2c_get_clientdata(client);
+
+    status = data->read_status(client, page);
+    if (status >= 0 && !(data->flags & PMBUS_SKIP_STATUS_CHECK) &&
+        (status & PB_STATUS_CML)) {
+        status = _pmbus_read_byte_data(client, -1, PMBUS_STATUS_CML);
+        if (status < 0 || (status & PB_CML_FAULT_INVALID_COMMAND))
+            status = -EIO;
+    }
+
+    pmbus_clear_fault_page(client, -1);
+    return status >= 0;
+}
+
+bool wb_pmbus_check_byte_register(struct i2c_client *client, int page, int reg)
+{
+    return pmbus_check_register(client, _pmbus_read_byte_data, page, reg);
+}
+EXPORT_SYMBOL_GPL(wb_pmbus_check_byte_register);
+
+bool wb_pmbus_check_word_register(struct i2c_client *client, int page, int reg)
+{
+    return pmbus_check_register(client, __pmbus_read_word_data, page, reg);
+}
+EXPORT_SYMBOL_GPL(wb_pmbus_check_word_register);
+
+const struct pmbus_driver_info *wb_pmbus_get_driver_info(struct i2c_client *client)
+{
+    struct pmbus_data *data = i2c_get_clientdata(client);
+
+    return data->info;
+}
+EXPORT_SYMBOL_GPL(wb_pmbus_get_driver_info);
+
+static int pmbus_read_status_byte(struct i2c_client *client, int page)
+{
+    return _pmbus_read_byte_data(client, page, PMBUS_STATUS_BYTE);
+}
+
+static int pmbus_read_status_word(struct i2c_client *client, int page)
+{
+    return _pmbus_read_word_data(client, page, 0xff, PMBUS_STATUS_WORD);
+}
+
+static int pmbus_get_status(struct i2c_client *client, int page, int reg)
+{
+    struct pmbus_data *data = i2c_get_clientdata(client);
+    int status;
+
+    switch (reg) {
+    case PMBUS_STATUS_WORD:
+        status = data->read_status(client, page);
+        if ((status < 0) || (data->has_status_word && (status == 0xffff))
+            || (!data->has_status_word && (status == 0xff))) {
+            if (data->has_status_word) {
+                data->read_status = pmbus_read_status_byte;
+            } else {
+                data->read_status = pmbus_read_status_word;
+            }
+            data->has_status_word = !data->has_status_word;
+            status = data->read_status(client, page);
+        }
+        break;
+    default:
+        status = _pmbus_read_byte_data(client, page, reg);
+        break;
+    }
+    if (status < 0)
+        wb_pmbus_clear_faults(client);
+    return status;
+}
+
+static void pmbus_update_sensor_data(struct i2c_client *client, struct pmbus_sensor *sensor)
+{
+    if (sensor->data < 0 || sensor->update)
+        sensor->data = _pmbus_read_word_data(client, sensor->page,
+                             sensor->phase, sensor->reg);
+}
+
+/*
+ * Convert linear sensor values to milli- or micro-units
+ * depending on sensor type.
+ */
+static s64 pmbus_reg2data_linear(struct pmbus_data *data,
+                 struct pmbus_sensor *sensor)
+{
+    s16 exponent;
+    s32 mantissa;
+    s64 val;
+
+    if (sensor->class == PSC_VOLTAGE_OUT) {    /* LINEAR16 */
+        exponent = data->exponent[sensor->page];
+        mantissa = (u16) sensor->data;
+    } else {                /* LINEAR11 */
+        exponent = ((s16)sensor->data) >> 11;
+        mantissa = ((s16)((sensor->data & 0x7ff) << 5)) >> 5;
+    }
+
+    val = mantissa;
+
+    /* scale result to milli-units for all sensors except fans */
+    if (sensor->class != PSC_FAN)
+        val = val * 1000LL;
+
+    /* scale result to micro-units for power sensors */
+    if (sensor->class == PSC_POWER)
+        val = val * 1000LL;
+
+    if (exponent >= 0)
+        val <<= exponent;
+    else
+        val >>= -exponent;
+
+    return val;
+}
+
+/*
+ * Convert direct sensor values to milli- or micro-units
+ * depending on sensor type.
+ */
+static s64 pmbus_reg2data_direct(struct pmbus_data *data,
+                 struct pmbus_sensor *sensor)
+{
+    s64 b, val = (s16)sensor->data;
+    s32 m, R;
+
+    m = data->info->m[sensor->class];
+    b = data->info->b[sensor->class];
+    R = data->info->R[sensor->class];
+
+    if (m == 0)
+        return 0;
+
+    /* X = 1/m * (Y * 10^-R - b) */
+    R = -R;
+    /* scale result to milli-units for everything but fans */
+    if (!(sensor->class == PSC_FAN || sensor->class == PSC_PWM)) {
+        R += 3;
+        b *= 1000;
+    }
+
+    /* scale result to micro-units for power sensors */
+    if (sensor->class == PSC_POWER) {
+        R += 3;
+        b *= 1000;
+    }
+
+    while (R > 0) {
+        val *= 10;
+        R--;
+    }
+    while (R < 0) {
+        val = div_s64(val + 5LL, 10L);  /* round closest */
+        R++;
+    }
+
+    val = div_s64(val - b, m);
+    return val;
+}
+
+/*
+ * Convert VID sensor values to milli- or micro-units
+ * depending on sensor type.
+ */
+static s64 pmbus_reg2data_vid(struct pmbus_data *data,
+                  struct pmbus_sensor *sensor)
+{
+    long val = sensor->data;
+    long rv = 0;
+
+    switch (data->info->vrm_version[sensor->page]) {
+    case vr11:
+        if (val >= 0x02 && val <= 0xb2)
+            rv = DIV_ROUND_CLOSEST(160000 - (val - 2) * 625, 100);
+        break;
+    case vr12:
+        if (val >= 0x01)
+            rv = 250 + (val - 1) * 5;
+        break;
+    case vr13:
+        if (val >= 0x01)
+            rv = 500 + (val - 1) * 10;
+        break;
+    case imvp9:
+        if (val >= 0x01)
+            rv = 200 + (val - 1) * 10;
+        break;
+    case amd625mv:
+        if (val >= 0x0 && val <= 0xd8)
+            rv = DIV_ROUND_CLOSEST(155000 - val * 625, 100);
+        break;
+    }
+    return rv;
+}
+
+static s64 pmbus_reg2data(struct pmbus_data *data, struct pmbus_sensor *sensor)
+{
+    s64 val;
+
+    if (!sensor->convert)
+        return sensor->data;
+
+    switch (data->info->format[sensor->class]) {
+    case direct:
+        val = pmbus_reg2data_direct(data, sensor);
+        break;
+    case vid:
+        val = pmbus_reg2data_vid(data, sensor);
+        break;
+    case linear:
+    default:
+        val = pmbus_reg2data_linear(data, sensor);
+        break;
+    }
+    return val;
+}
+
+#define MAX_MANTISSA    (1023 * 1000)
+#define MIN_MANTISSA    (511 * 1000)
+
+static u16 pmbus_data2reg_linear(struct pmbus_data *data,
+                 struct pmbus_sensor *sensor, s64 val)
+{
+    s16 exponent = 0, mantissa;
+    bool negative = false;
+
+    /* simple case */
+    if (val == 0)
+        return 0;
+
+    if (sensor->class == PSC_VOLTAGE_OUT) {
+        /* LINEAR16 does not support negative voltages */
+        if (val < 0)
+            return 0;
+
+        /*
+         * For a static exponents, we don't have a choice
+         * but to adjust the value to it.
+         */
+        if (data->exponent[sensor->page] < 0)
+            val <<= -data->exponent[sensor->page];
+        else
+            val >>= data->exponent[sensor->page];
+        val = DIV_ROUND_CLOSEST_ULL(val, 1000);
+        return clamp_val(val, 0, 0xffff);
+    }
+
+    if (val < 0) {
+        negative = true;
+        val = -val;
+    }
+
+    /* Power is in uW. Convert to mW before converting. */
+    if (sensor->class == PSC_POWER)
+        val = DIV_ROUND_CLOSEST_ULL(val, 1000);
+
+    /*
+     * For simplicity, convert fan data to milli-units
+     * before calculating the exponent.
+     */
+    if (sensor->class == PSC_FAN)
+        val = val * 1000LL;
+
+    /* Reduce large mantissa until it fits into 10 bit */
+    while (val >= MAX_MANTISSA && exponent < 15) {
+        exponent++;
+        val >>= 1;
+    }
+    /* Increase small mantissa to improve precision */
+    while (val < MIN_MANTISSA && exponent > -15) {
+        exponent--;
+        val <<= 1;
+    }
+
+    /* Convert mantissa from milli-units to units */
+    mantissa = clamp_val(DIV_ROUND_CLOSEST_ULL(val, 1000), 0, 0x3ff);
+
+    /* restore sign */
+    if (negative)
+        mantissa = -mantissa;
+
+    /* Convert to 5 bit exponent, 11 bit mantissa */
+    return (mantissa & 0x7ff) | ((exponent << 11) & 0xf800);
+}
+
+static u16 pmbus_data2reg_direct(struct pmbus_data *data,
+                 struct pmbus_sensor *sensor, s64 val)
+{
+    s64 b;
+    s32 m, R;
+
+    m = data->info->m[sensor->class];
+    b = data->info->b[sensor->class];
+    R = data->info->R[sensor->class];
+
+    /* Power is in uW. Adjust R and b. */
+    if (sensor->class == PSC_POWER) {
+        R -= 3;
+        b *= 1000;
+    }
+
+    /* Calculate Y = (m * X + b) * 10^R */
+    if (!(sensor->class == PSC_FAN || sensor->class == PSC_PWM)) {
+        R -= 3;        /* Adjust R and b for data in milli-units */
+        b *= 1000;
+    }
+    val = val * m + b;
+
+    while (R > 0) {
+        val *= 10;
+        R--;
+    }
+    while (R < 0) {
+        val = div_s64(val + 5LL, 10L);  /* round closest */
+        R++;
+    }
+
+    return (u16)clamp_val(val, S16_MIN, S16_MAX);
+}
+
+static u16 pmbus_data2reg_vid(struct pmbus_data *data,
+                  struct pmbus_sensor *sensor, s64 val)
+{
+    val = clamp_val(val, 500, 1600);
+
+    return 2 + DIV_ROUND_CLOSEST_ULL((1600LL - val) * 100LL, 625);
+}
+
+static u16 pmbus_data2reg(struct pmbus_data *data,
+              struct pmbus_sensor *sensor, s64 val)
+{
+    u16 regval;
+
+    if (!sensor->convert)
+        return val;
+
+    switch (data->info->format[sensor->class]) {
+    case direct:
+        regval = pmbus_data2reg_direct(data, sensor, val);
+        break;
+    case vid:
+        regval = pmbus_data2reg_vid(data, sensor, val);
+        break;
+    case linear:
+    default:
+        regval = pmbus_data2reg_linear(data, sensor, val);
+        break;
+    }
+    return regval;
+}
+
+/*
+ * Return boolean calculated from converted data.
+ * <index> defines a status register index and mask.
+ * The mask is in the lower 8 bits, the register index is in bits 8..23.
+ *
+ * The associated pmbus_boolean structure contains optional pointers to two
+ * sensor attributes. If specified, those attributes are compared against each
+ * other to determine if a limit has been exceeded.
+ *
+ * If the sensor attribute pointers are NULL, the function returns true if
+ * (status[reg] & mask) is true.
+ *
+ * If sensor attribute pointers are provided, a comparison against a specified
+ * limit has to be performed to determine the boolean result.
+ * In this case, the function returns true if v1 >= v2 (where v1 and v2 are
+ * sensor values referenced by sensor attribute pointers s1 and s2).
+ *
+ * To determine if an object exceeds upper limits, specify <s1,s2> = <v,limit>.
+ * To determine if an object exceeds lower limits, specify <s1,s2> = <limit,v>.
+ *
+ * If a negative value is stored in any of the referenced registers, this value
+ * reflects an error code which will be returned.
+ */
+static int pmbus_get_boolean(struct i2c_client *client, struct pmbus_boolean *b,
+                 int index)
+{
+    struct pmbus_data *data = i2c_get_clientdata(client);
+    struct pmbus_sensor *s1 = b->s1;
+    struct pmbus_sensor *s2 = b->s2;
+    u16 mask = pb_index_to_mask(index);
+    u8 page = pb_index_to_page(index);
+    u16 reg = pb_index_to_reg(index);
+    int ret, status;
+    u16 regval;
+
+    mutex_lock(&data->update_lock);
+    status = pmbus_get_status(client, page, reg);
+    if (status < 0) {
+        ret = status;
+        goto unlock;
+    }
+
+    if (s1)
+        pmbus_update_sensor_data(client, s1);
+    if (s2)
+        pmbus_update_sensor_data(client, s2);
+
+    regval = status & mask;
+    if (s1 && s2) {
+        s64 v1, v2;
+
+        if (s1->data < 0) {
+            ret = s1->data;
+            goto unlock;
+        }
+        if (s2->data < 0) {
+            ret = s2->data;
+            goto unlock;
+        }
+
+        v1 = pmbus_reg2data(data, s1);
+        v2 = pmbus_reg2data(data, s2);
+        ret = !!(regval && v1 >= v2);
+    } else {
+        ret = !!regval;
+    }
+unlock:
+    mutex_unlock(&data->update_lock);
+    return ret;
+}
+
+static ssize_t pmbus_show_boolean(struct device *dev,
+                  struct device_attribute *da, char *buf)
+{
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
+    struct pmbus_boolean *boolean = to_pmbus_boolean(attr);
+    struct i2c_client *client = to_i2c_client(dev->parent);
+    int val;
+
+    val = pmbus_get_boolean(client, boolean, attr->index);
+    if (val < 0)
+        return val;
+    return snprintf(buf, PAGE_SIZE, "%d\n", val);
+}
+
+static ssize_t pmbus_show_sensor(struct device *dev,
+                 struct device_attribute *devattr, char *buf)
+{
+    struct i2c_client *client = to_i2c_client(dev->parent);
+    struct pmbus_sensor *sensor = to_pmbus_sensor(devattr);
+    struct pmbus_data *data = i2c_get_clientdata(client);
+    ssize_t ret;
+
+    mutex_lock(&data->update_lock);
+    pmbus_update_sensor_data(client, sensor);
+    if (sensor->data < 0)
+        ret = sensor->data;
+    else
+        ret = snprintf(buf, PAGE_SIZE, "%lld\n", pmbus_reg2data(data, sensor));
+    mutex_unlock(&data->update_lock);
+    return ret;
+}
+
+static ssize_t pmbus_set_sensor(struct device *dev,
+                struct device_attribute *devattr,
+                const char *buf, size_t count)
+{
+    struct i2c_client *client = to_i2c_client(dev->parent);
+    struct pmbus_data *data = i2c_get_clientdata(client);
+    struct pmbus_sensor *sensor = to_pmbus_sensor(devattr);
+    ssize_t rv = count;
+    s64 val;
+    int ret;
+    u16 regval;
+
+    if (kstrtos64(buf, 10, &val) < 0)
+        return -EINVAL;
+
+    mutex_lock(&data->update_lock);
+    regval = pmbus_data2reg(data, sensor, val);
+    ret = _pmbus_write_word_data(client, sensor->page, sensor->reg, regval);
+    if (ret < 0)
+        rv = ret;
+    else
+        sensor->data = regval;
+    mutex_unlock(&data->update_lock);
+    return rv;
+}
+
+static ssize_t pmbus_show_label(struct device *dev,
+                struct device_attribute *da, char *buf)
+{
+    struct pmbus_label *label = to_pmbus_label(da);
+
+    return snprintf(buf, PAGE_SIZE, "%s\n", label->label);
+}
+
+static int pmbus_add_attribute(struct pmbus_data *data, struct attribute *attr)
+{
+    if (data->num_attributes >= data->max_attributes - 1) {
+        int new_max_attrs = data->max_attributes + PMBUS_ATTR_ALLOC_SIZE;
+        void *new_attrs = devm_krealloc(data->dev, data->group.attrs,
+                        new_max_attrs * sizeof(void *),
+                        GFP_KERNEL);
+        if (!new_attrs)
+            return -ENOMEM;
+        data->group.attrs = new_attrs;
+        data->max_attributes = new_max_attrs;
+    }
+
+    data->group.attrs[data->num_attributes++] = attr;
+    data->group.attrs[data->num_attributes] = NULL;
+    return 0;
+}
+
+static void pmbus_dev_attr_init(struct device_attribute *dev_attr,
+                const char *name,
+                umode_t mode,
+                ssize_t (*show)(struct device *dev,
+                        struct device_attribute *attr,
+                        char *buf),
+                ssize_t (*store)(struct device *dev,
+                         struct device_attribute *attr,
+                         const char *buf, size_t count))
+{
+    sysfs_attr_init(&dev_attr->attr);
+    dev_attr->attr.name = name;
+    dev_attr->attr.mode = mode;
+    dev_attr->show = show;
+    dev_attr->store = store;
+}
+
+static void pmbus_attr_init(struct sensor_device_attribute *a,
+                const char *name,
+                umode_t mode,
+                ssize_t (*show)(struct device *dev,
+                        struct device_attribute *attr,
+                        char *buf),
+                ssize_t (*store)(struct device *dev,
+                         struct device_attribute *attr,
+                         const char *buf, size_t count),
+                int idx)
+{
+    pmbus_dev_attr_init(&a->dev_attr, name, mode, show, store);
+    a->index = idx;
+}
+
+static int pmbus_add_boolean(struct pmbus_data *data,
+                 const char *name, const char *type, int seq,
+                 struct pmbus_sensor *s1,
+                 struct pmbus_sensor *s2,
+                 u8 page, u16 reg, u16 mask)
+{
+    struct pmbus_boolean *boolean;
+    struct sensor_device_attribute *a;
+
+    if (WARN((s1 && !s2) || (!s1 && s2), "Bad s1/s2 parameters\n"))
+        return -EINVAL;
+
+    boolean = devm_kzalloc(data->dev, sizeof(*boolean), GFP_KERNEL);
+    if (!boolean)
+        return -ENOMEM;
+
+    a = &boolean->attribute;
+
+    snprintf(boolean->name, sizeof(boolean->name), "%s%d_%s",
+         name, seq, type);
+    boolean->s1 = s1;
+    boolean->s2 = s2;
+    pmbus_attr_init(a, boolean->name, 0444, pmbus_show_boolean, NULL,
+            pb_reg_to_index(page, reg, mask));
+
+    return pmbus_add_attribute(data, &a->dev_attr.attr);
+}
+
+static struct pmbus_sensor *pmbus_add_sensor(struct pmbus_data *data,
+                         const char *name, const char *type,
+                         int seq, int page, int phase,
+                         int reg,
+                         enum pmbus_sensor_classes class,
+                         bool update, bool readonly,
+                         bool convert)
+{
+    struct pmbus_sensor *sensor;
+    struct device_attribute *a;
+
+    sensor = devm_kzalloc(data->dev, sizeof(*sensor), GFP_KERNEL);
+    if (!sensor)
+        return NULL;
+    a = &sensor->attribute;
+
+    if (type)
+        snprintf(sensor->name, sizeof(sensor->name), "%s%d_%s",
+             name, seq, type);
+    else
+        snprintf(sensor->name, sizeof(sensor->name), "%s%d",
+             name, seq);
+
+    if (data->flags & PMBUS_WRITE_PROTECTED)
+        readonly = true;
+
+    sensor->page = page;
+    sensor->phase = phase;
+    sensor->reg = reg;
+    sensor->class = class;
+    sensor->update = update;
+    sensor->convert = convert;
+    sensor->data = -ENODATA;
+    pmbus_dev_attr_init(a, sensor->name,
+                readonly ? 0444 : 0644,
+                pmbus_show_sensor, pmbus_set_sensor);
+
+    if (pmbus_add_attribute(data, &a->attr))
+        return NULL;
+
+    sensor->next = data->sensors;
+    data->sensors = sensor;
+
+    return sensor;
+}
+
+static int pmbus_add_label(struct pmbus_data *data,
+               const char *name, int seq,
+               const char *lstring, int index, int phase)
+{
+    struct pmbus_label *label;
+    struct device_attribute *a;
+
+    label = devm_kzalloc(data->dev, sizeof(*label), GFP_KERNEL);
+    if (!label)
+        return -ENOMEM;
+
+    a = &label->attribute;
+
+    snprintf(label->name, sizeof(label->name), "%s%d_label", name, seq);
+    if (!index) {
+        if (phase == 0xff)
+            strlcpy(label->label, lstring,
+                sizeof(label->label));
+        else
+            snprintf(label->label, sizeof(label->label), "%s.%d",
+                 lstring, phase);
+    } else {
+        if (phase == 0xff)
+            snprintf(label->label, sizeof(label->label), "%s%d",
+                 lstring, index);
+        else
+            snprintf(label->label, sizeof(label->label), "%s%d.%d",
+                 lstring, index, phase);
+    }
+
+    pmbus_dev_attr_init(a, label->name, 0444, pmbus_show_label, NULL);
+    return pmbus_add_attribute(data, &a->attr);
+}
+
+/*
+ * Search for attributes. Allocate sensors, booleans, and labels as needed.
+ */
+
+/*
+ * The pmbus_limit_attr structure describes a single limit attribute
+ * and its associated alarm attribute.
+ */
+struct pmbus_limit_attr {
+    u16 reg;        /* Limit register */
+    u16 sbit;        /* Alarm attribute status bit */
+    bool update;        /* True if register needs updates */
+    bool low;        /* True if low limit; for limits with compare
+                   functions only */
+    const char *attr;    /* Attribute name */
+    const char *alarm;    /* Alarm attribute name */
+};
+
+/*
+ * The pmbus_sensor_attr structure describes one sensor attribute. This
+ * description includes a reference to the associated limit attributes.
+ */
+struct pmbus_sensor_attr {
+    u16 reg;            /* sensor register */
+    u16 gbit;            /* generic status bit */
+    u8 nlimit;            /* # of limit registers */
+    enum pmbus_sensor_classes class;/* sensor class */
+    const char *label;        /* sensor label */
+    bool paged;            /* true if paged sensor */
+    bool update;            /* true if update needed */
+    bool compare;            /* true if compare function needed */
+    u32 func;            /* sensor mask */
+    u32 sfunc;            /* sensor status mask */
+    int sreg;            /* status register */
+    const struct pmbus_limit_attr *limit;/* limit registers */
+};
+
+/*
+ * Add a set of limit attributes and, if supported, the associated
+ * alarm attributes.
+ * returns 0 if no alarm register found, 1 if an alarm register was found,
+ * < 0 on errors.
+ */
+static int pmbus_add_limit_attrs(struct i2c_client *client,
+                 struct pmbus_data *data,
+                 const struct pmbus_driver_info *info,
+                 const char *name, int index, int page,
+                 struct pmbus_sensor *base,
+                 const struct pmbus_sensor_attr *attr)
+{
+    const struct pmbus_limit_attr *l = attr->limit;
+    int nlimit = attr->nlimit;
+    int have_alarm = 0;
+    int i, ret;
+    struct pmbus_sensor *curr;
+
+    for (i = 0; i < nlimit; i++) {
+        if (wb_pmbus_check_word_register(client, page, l->reg)) {
+            curr = pmbus_add_sensor(data, name, l->attr, index,
+                        page, 0xff, l->reg, attr->class,
+                        attr->update || l->update,
+                        false, true);
+            if (!curr)
+                return -ENOMEM;
+            if (l->sbit && (info->func[page] & attr->sfunc)) {
+                ret = pmbus_add_boolean(data, name,
+                    l->alarm, index,
+                    attr->compare ?  l->low ? curr : base
+                              : NULL,
+                    attr->compare ? l->low ? base : curr
+                              : NULL,
+                    page, attr->sreg, l->sbit);
+                if (ret)
+                    return ret;
+                have_alarm = 1;
+            }
+        }
+        l++;
+    }
+    return have_alarm;
+}
+
+static int pmbus_add_sensor_attrs_one(struct i2c_client *client,
+                      struct pmbus_data *data,
+                      const struct pmbus_driver_info *info,
+                      const char *name,
+                      int index, int page, int phase,
+                      const struct pmbus_sensor_attr *attr,
+                      bool paged)
+{
+    struct pmbus_sensor *base;
+    bool upper = !!(attr->gbit & 0xff00);    /* need to check STATUS_WORD */
+    int ret;
+
+    if (attr->label) {
+        ret = pmbus_add_label(data, name, index, attr->label,
+                      paged ? page + 1 : 0, phase);
+        if (ret)
+            return ret;
+    }
+    base = pmbus_add_sensor(data, name, "input", index, page, phase,
+                attr->reg, attr->class, true, true, true);
+    if (!base)
+        return -ENOMEM;
+    /* No limit and alarm attributes for phase specific sensors */
+    if (attr->sfunc && phase == 0xff) {
+        ret = pmbus_add_limit_attrs(client, data, info, name,
+                        index, page, base, attr);
+        if (ret < 0)
+            return ret;
+        /*
+         * Add generic alarm attribute only if there are no individual
+         * alarm attributes, if there is a global alarm bit, and if
+         * the generic status register (word or byte, depending on
+         * which global bit is set) for this page is accessible.
+         */
+        if (!ret && attr->gbit &&
+            (!upper || (upper && data->has_status_word)) &&
+            pmbus_check_status_register(client, page)) {
+            ret = pmbus_add_boolean(data, name, "alarm", index,
+                        NULL, NULL,
+                        page, PMBUS_STATUS_WORD,
+                        attr->gbit);
+            if (ret)
+                return ret;
+        }
+    }
+    return 0;
+}
+
+static bool pmbus_sensor_is_paged(const struct pmbus_driver_info *info,
+                  const struct pmbus_sensor_attr *attr)
+{
+    int p;
+
+    if (attr->paged)
+        return true;
+
+    /*
+     * Some attributes may be present on more than one page despite
+     * not being marked with the paged attribute. If that is the case,
+     * then treat the sensor as being paged and add the page suffix to the
+     * attribute name.
+     * We don't just add the paged attribute to all such attributes, in
+     * order to maintain the un-suffixed labels in the case where the
+     * attribute is only on page 0.
+     */
+    for (p = 1; p < info->pages; p++) {
+        if (info->func[p] & attr->func)
+            return true;
+    }
+    return false;
+}
+
+static int pmbus_add_sensor_attrs(struct i2c_client *client,
+                  struct pmbus_data *data,
+                  const char *name,
+                  const struct pmbus_sensor_attr *attrs,
+                  int nattrs)
+{
+    const struct pmbus_driver_info *info = data->info;
+    int index, i;
+    int ret;
+
+    index = 1;
+    for (i = 0; i < nattrs; i++) {
+        int page, pages;
+        bool paged = pmbus_sensor_is_paged(info, attrs);
+
+        pages = paged ? info->pages : 1;
+        for (page = 0; page < pages; page++) {
+            if (!(info->func[page] & attrs->func))
+                continue;
+            ret = pmbus_add_sensor_attrs_one(client, data, info,
+                             name, index, page,
+                             0xff, attrs, paged);
+            if (ret)
+                return ret;
+            index++;
+            if (info->phases[page]) {
+                int phase;
+
+                for (phase = 0; phase < info->phases[page];
+                     phase++) {
+                    if (!(info->pfunc[phase] & attrs->func))
+                        continue;
+                    ret = pmbus_add_sensor_attrs_one(client,
+                        data, info, name, index, page,
+                        phase, attrs, paged);
+                    if (ret)
+                        return ret;
+                    index++;
+                }
+            }
+        }
+        attrs++;
+    }
+    return 0;
+}
+
+static const struct pmbus_limit_attr vin_limit_attrs[] = {
+    {
+        .reg = PMBUS_VIN_UV_WARN_LIMIT,
+        .attr = "min",
+        .alarm = "min_alarm",
+        .sbit = PB_VOLTAGE_UV_WARNING,
+    }, {
+        .reg = PMBUS_VIN_UV_FAULT_LIMIT,
+        .attr = "lcrit",
+        .alarm = "lcrit_alarm",
+        .sbit = PB_VOLTAGE_UV_FAULT,
+    }, {
+        .reg = PMBUS_VIN_OV_WARN_LIMIT,
+        .attr = "max",
+        .alarm = "max_alarm",
+        .sbit = PB_VOLTAGE_OV_WARNING,
+    }, {
+        .reg = PMBUS_VIN_OV_FAULT_LIMIT,
+        .attr = "crit",
+        .alarm = "crit_alarm",
+        .sbit = PB_VOLTAGE_OV_FAULT,
+    }, {
+        .reg = PMBUS_VIRT_READ_VIN_AVG,
+        .update = true,
+        .attr = "average",
+    }, {
+        .reg = PMBUS_VIRT_READ_VIN_MIN,
+        .update = true,
+        .attr = "lowest",
+    }, {
+        .reg = PMBUS_VIRT_READ_VIN_MAX,
+        .update = true,
+        .attr = "highest",
+    }, {
+        .reg = PMBUS_VIRT_RESET_VIN_HISTORY,
+        .attr = "reset_history",
+    }, {
+        .reg = PMBUS_MFR_VIN_MIN,
+        .attr = "rated_min",
+    }, {
+        .reg = PMBUS_MFR_VIN_MAX,
+        .attr = "rated_max",
+    },
+};
+
+static const struct pmbus_limit_attr vmon_limit_attrs[] = {
+    {
+        .reg = PMBUS_VIRT_VMON_UV_WARN_LIMIT,
+        .attr = "min",
+        .alarm = "min_alarm",
+        .sbit = PB_VOLTAGE_UV_WARNING,
+    }, {
+        .reg = PMBUS_VIRT_VMON_UV_FAULT_LIMIT,
+        .attr = "lcrit",
+        .alarm = "lcrit_alarm",
+        .sbit = PB_VOLTAGE_UV_FAULT,
+    }, {
+        .reg = PMBUS_VIRT_VMON_OV_WARN_LIMIT,
+        .attr = "max",
+        .alarm = "max_alarm",
+        .sbit = PB_VOLTAGE_OV_WARNING,
+    }, {
+        .reg = PMBUS_VIRT_VMON_OV_FAULT_LIMIT,
+        .attr = "crit",
+        .alarm = "crit_alarm",
+        .sbit = PB_VOLTAGE_OV_FAULT,
+    }
+};
+
+static const struct pmbus_limit_attr vout_limit_attrs[] = {
+    {
+        .reg = PMBUS_VOUT_UV_WARN_LIMIT,
+        .attr = "min",
+        .alarm = "min_alarm",
+        .sbit = PB_VOLTAGE_UV_WARNING,
+    }, {
+        .reg = PMBUS_VOUT_UV_FAULT_LIMIT,
+        .attr = "lcrit",
+        .alarm = "lcrit_alarm",
+        .sbit = PB_VOLTAGE_UV_FAULT,
+    }, {
+        .reg = PMBUS_VOUT_OV_WARN_LIMIT,
+        .attr = "max",
+        .alarm = "max_alarm",
+        .sbit = PB_VOLTAGE_OV_WARNING,
+    }, {
+        .reg = PMBUS_VOUT_OV_FAULT_LIMIT,
+        .attr = "crit",
+        .alarm = "crit_alarm",
+        .sbit = PB_VOLTAGE_OV_FAULT,
+    }, {
+        .reg = PMBUS_VIRT_READ_VOUT_AVG,
+        .update = true,
+        .attr = "average",
+    }, {
+        .reg = PMBUS_VIRT_READ_VOUT_MIN,
+        .update = true,
+        .attr = "lowest",
+    }, {
+        .reg = PMBUS_VIRT_READ_VOUT_MAX,
+        .update = true,
+        .attr = "highest",
+    }, {
+        .reg = PMBUS_VIRT_RESET_VOUT_HISTORY,
+        .attr = "reset_history",
+    }, {
+        .reg = PMBUS_MFR_VOUT_MIN,
+        .attr = "rated_min",
+    }, {
+        .reg = PMBUS_MFR_VOUT_MAX,
+        .attr = "rated_max",
+    },
+};
+
+static const struct pmbus_sensor_attr voltage_attributes[] = {
+    {
+        .reg = PMBUS_READ_VIN,
+        .class = PSC_VOLTAGE_IN,
+        .label = "vin",
+        .func = PMBUS_HAVE_VIN,
+        .sfunc = PMBUS_HAVE_STATUS_INPUT,
+        .sreg = PMBUS_STATUS_INPUT,
+        .gbit = PB_STATUS_VIN_UV,
+        .limit = vin_limit_attrs,
+        .nlimit = 0,
+    }, {
+        .reg = PMBUS_VIRT_READ_VMON,
+        .class = PSC_VOLTAGE_IN,
+        .label = "vmon",
+        .func = PMBUS_HAVE_VMON,
+        .sfunc = PMBUS_HAVE_STATUS_VMON,
+        .sreg = PMBUS_VIRT_STATUS_VMON,
+        .limit = vmon_limit_attrs,
+        .nlimit = 0,
+    }, {
+        .reg = PMBUS_READ_VCAP,
+        .class = PSC_VOLTAGE_IN,
+        .label = "vcap",
+        .func = PMBUS_HAVE_VCAP,
+    }, {
+        .reg = PMBUS_READ_VOUT,
+        .class = PSC_VOLTAGE_OUT,
+        .label = "vout",
+        .paged = true,
+        .func = PMBUS_HAVE_VOUT,
+        .sfunc = PMBUS_HAVE_STATUS_VOUT,
+        .sreg = PMBUS_STATUS_VOUT,
+        .gbit = PB_STATUS_VOUT_OV,
+        .limit = vout_limit_attrs,
+        .nlimit = 0,
+    }
+};
+
+/* Current attributes */
+
+static const struct pmbus_limit_attr iin_limit_attrs[] = {
+    {
+        .reg = PMBUS_IIN_OC_WARN_LIMIT,
+        .attr = "max",
+        .alarm = "max_alarm",
+        .sbit = PB_IIN_OC_WARNING,
+    }, {
+        .reg = PMBUS_IIN_OC_FAULT_LIMIT,
+        .attr = "crit",
+        .alarm = "crit_alarm",
+        .sbit = PB_IIN_OC_FAULT,
+    }, {
+        .reg = PMBUS_VIRT_READ_IIN_AVG,
+        .update = true,
+        .attr = "average",
+    }, {
+        .reg = PMBUS_VIRT_READ_IIN_MIN,
+        .update = true,
+        .attr = "lowest",
+    }, {
+        .reg = PMBUS_VIRT_READ_IIN_MAX,
+        .update = true,
+        .attr = "highest",
+    }, {
+        .reg = PMBUS_VIRT_RESET_IIN_HISTORY,
+        .attr = "reset_history",
+    }, {
+        .reg = PMBUS_MFR_IIN_MAX,
+        .attr = "rated_max",
+    },
+};
+
+static const struct pmbus_limit_attr iout_limit_attrs[] = {
+    {
+        .reg = PMBUS_IOUT_OC_WARN_LIMIT,
+        .attr = "max",
+        .alarm = "max_alarm",
+        .sbit = PB_IOUT_OC_WARNING,
+    }, {
+        .reg = PMBUS_IOUT_UC_FAULT_LIMIT,
+        .attr = "lcrit",
+        .alarm = "lcrit_alarm",
+        .sbit = PB_IOUT_UC_FAULT,
+    }, {
+        .reg = PMBUS_IOUT_OC_FAULT_LIMIT,
+        .attr = "crit",
+        .alarm = "crit_alarm",
+        .sbit = PB_IOUT_OC_FAULT,
+    }, {
+        .reg = PMBUS_VIRT_READ_IOUT_AVG,
+        .update = true,
+        .attr = "average",
+    }, {
+        .reg = PMBUS_VIRT_READ_IOUT_MIN,
+        .update = true,
+        .attr = "lowest",
+    }, {
+        .reg = PMBUS_VIRT_READ_IOUT_MAX,
+        .update = true,
+        .attr = "highest",
+    }, {
+        .reg = PMBUS_VIRT_RESET_IOUT_HISTORY,
+        .attr = "reset_history",
+    }, {
+        .reg = PMBUS_MFR_IOUT_MAX,
+        .attr = "rated_max",
+    },
+};
+
+static const struct pmbus_sensor_attr current_attributes[] = {
+    {
+        .reg = PMBUS_READ_IIN,
+        .class = PSC_CURRENT_IN,
+        .label = "iin",
+        .func = PMBUS_HAVE_IIN,
+        .sfunc = PMBUS_HAVE_STATUS_INPUT,
+        .sreg = PMBUS_STATUS_INPUT,
+        .gbit = PB_STATUS_INPUT,
+        .limit = iin_limit_attrs,
+        .nlimit = 0,
+    }, {
+        .reg = PMBUS_READ_IOUT,
+        .class = PSC_CURRENT_OUT,
+        .label = "iout",
+        .paged = true,
+        .func = PMBUS_HAVE_IOUT,
+        .sfunc = PMBUS_HAVE_STATUS_IOUT,
+        .sreg = PMBUS_STATUS_IOUT,
+        .gbit = PB_STATUS_IOUT_OC,
+        .limit = iout_limit_attrs,
+        .nlimit = 0,
+    }
+};
+
+/* Power attributes */
+
+static const struct pmbus_limit_attr pin_limit_attrs[] = {
+    {
+        .reg = PMBUS_PIN_OP_WARN_LIMIT,
+        .attr = "max",
+        .alarm = "alarm",
+        .sbit = PB_PIN_OP_WARNING,
+    }, {
+        .reg = PMBUS_VIRT_READ_PIN_AVG,
+        .update = true,
+        .attr = "average",
+    }, {
+        .reg = PMBUS_VIRT_READ_PIN_MIN,
+        .update = true,
+        .attr = "input_lowest",
+    }, {
+        .reg = PMBUS_VIRT_READ_PIN_MAX,
+        .update = true,
+        .attr = "input_highest",
+    }, {
+        .reg = PMBUS_VIRT_RESET_PIN_HISTORY,
+        .attr = "reset_history",
+    }, {
+        .reg = PMBUS_MFR_PIN_MAX,
+        .attr = "rated_max",
+    },
+};
+
+static const struct pmbus_limit_attr pout_limit_attrs[] = {
+    {
+        .reg = PMBUS_POUT_MAX,
+        .attr = "cap",
+        .alarm = "cap_alarm",
+        .sbit = PB_POWER_LIMITING,
+    }, {
+        .reg = PMBUS_POUT_OP_WARN_LIMIT,
+        .attr = "max",
+        .alarm = "max_alarm",
+        .sbit = PB_POUT_OP_WARNING,
+    }, {
+        .reg = PMBUS_POUT_OP_FAULT_LIMIT,
+        .attr = "crit",
+        .alarm = "crit_alarm",
+        .sbit = PB_POUT_OP_FAULT,
+    }, {
+        .reg = PMBUS_VIRT_READ_POUT_AVG,
+        .update = true,
+        .attr = "average",
+    }, {
+        .reg = PMBUS_VIRT_READ_POUT_MIN,
+        .update = true,
+        .attr = "input_lowest",
+    }, {
+        .reg = PMBUS_VIRT_READ_POUT_MAX,
+        .update = true,
+        .attr = "input_highest",
+    }, {
+        .reg = PMBUS_VIRT_RESET_POUT_HISTORY,
+        .attr = "reset_history",
+    }, {
+        .reg = PMBUS_MFR_POUT_MAX,
+        .attr = "rated_max",
+    },
+};
+
+static const struct pmbus_sensor_attr power_attributes[] = {
+    {
+        .reg = PMBUS_READ_PIN,
+        .class = PSC_POWER,
+        .label = "pin",
+        .func = PMBUS_HAVE_PIN,
+        .sfunc = PMBUS_HAVE_STATUS_INPUT,
+        .sreg = PMBUS_STATUS_INPUT,
+        .gbit = PB_STATUS_INPUT,
+        .limit = pin_limit_attrs,
+        .nlimit = 0,
+    }, {
+        .reg = PMBUS_READ_POUT,
+        .class = PSC_POWER,
+        .label = "pout",
+        .paged = true,
+        .func = PMBUS_HAVE_POUT,
+        .sfunc = PMBUS_HAVE_STATUS_IOUT,
+        .sreg = PMBUS_STATUS_IOUT,
+        .limit = pout_limit_attrs,
+        .nlimit = 0,
+    }
+};
+
+/* Temperature atributes */
+
+static const struct pmbus_limit_attr temp_limit_attrs[] = {
+    {
+        .reg = PMBUS_UT_WARN_LIMIT,
+        .low = true,
+        .attr = "min",
+        .alarm = "min_alarm",
+        .sbit = PB_TEMP_UT_WARNING,
+    }, {
+        .reg = PMBUS_UT_FAULT_LIMIT,
+        .low = true,
+        .attr = "lcrit",
+        .alarm = "lcrit_alarm",
+        .sbit = PB_TEMP_UT_FAULT,
+    }, {
+        .reg = PMBUS_OT_WARN_LIMIT,
+        .attr = "max",
+        .alarm = "max_alarm",
+        .sbit = PB_TEMP_OT_WARNING,
+    }, {
+        .reg = PMBUS_OT_FAULT_LIMIT,
+        .attr = "crit",
+        .alarm = "crit_alarm",
+        .sbit = PB_TEMP_OT_FAULT,
+    }, {
+        .reg = PMBUS_VIRT_READ_TEMP_MIN,
+        .attr = "lowest",
+    }, {
+        .reg = PMBUS_VIRT_READ_TEMP_AVG,
+        .attr = "average",
+    }, {
+        .reg = PMBUS_VIRT_READ_TEMP_MAX,
+        .attr = "highest",
+    }, {
+        .reg = PMBUS_VIRT_RESET_TEMP_HISTORY,
+        .attr = "reset_history",
+    }, {
+        .reg = PMBUS_MFR_MAX_TEMP_1,
+        .attr = "rated_max",
+    },
+};
+
+static const struct pmbus_limit_attr temp_limit_attrs2[] = {
+    {
+        .reg = PMBUS_UT_WARN_LIMIT,
+        .low = true,
+        .attr = "min",
+        .alarm = "min_alarm",
+        .sbit = PB_TEMP_UT_WARNING,
+    }, {
+        .reg = PMBUS_UT_FAULT_LIMIT,
+        .low = true,
+        .attr = "lcrit",
+        .alarm = "lcrit_alarm",
+        .sbit = PB_TEMP_UT_FAULT,
+    }, {
+        .reg = PMBUS_OT_WARN_LIMIT,
+        .attr = "max",
+        .alarm = "max_alarm",
+        .sbit = PB_TEMP_OT_WARNING,
+    }, {
+        .reg = PMBUS_OT_FAULT_LIMIT,
+        .attr = "crit",
+        .alarm = "crit_alarm",
+        .sbit = PB_TEMP_OT_FAULT,
+    }, {
+        .reg = PMBUS_VIRT_READ_TEMP2_MIN,
+        .attr = "lowest",
+    }, {
+        .reg = PMBUS_VIRT_READ_TEMP2_AVG,
+        .attr = "average",
+    }, {
+        .reg = PMBUS_VIRT_READ_TEMP2_MAX,
+        .attr = "highest",
+    }, {
+        .reg = PMBUS_VIRT_RESET_TEMP2_HISTORY,
+        .attr = "reset_history",
+    }, {
+        .reg = PMBUS_MFR_MAX_TEMP_2,
+        .attr = "rated_max",
+    },
+};
+
+static const struct pmbus_limit_attr temp_limit_attrs3[] = {
+    {
+        .reg = PMBUS_UT_WARN_LIMIT,
+        .low = true,
+        .attr = "min",
+        .alarm = "min_alarm",
+        .sbit = PB_TEMP_UT_WARNING,
+    }, {
+        .reg = PMBUS_UT_FAULT_LIMIT,
+        .low = true,
+        .attr = "lcrit",
+        .alarm = "lcrit_alarm",
+        .sbit = PB_TEMP_UT_FAULT,
+    }, {
+        .reg = PMBUS_OT_WARN_LIMIT,
+        .attr = "max",
+        .alarm = "max_alarm",
+        .sbit = PB_TEMP_OT_WARNING,
+    }, {
+        .reg = PMBUS_OT_FAULT_LIMIT,
+        .attr = "crit",
+        .alarm = "crit_alarm",
+        .sbit = PB_TEMP_OT_FAULT,
+    }, {
+        .reg = PMBUS_MFR_MAX_TEMP_3,
+        .attr = "rated_max",
+    },
+};
+
+static const struct pmbus_sensor_attr temp_attributes[] = {
+    {
+        .reg = PMBUS_READ_TEMPERATURE_1,
+        .class = PSC_TEMPERATURE,
+        .paged = true,
+        .update = true,
+        .compare = true,
+        .func = PMBUS_HAVE_TEMP,
+        .sfunc = PMBUS_HAVE_STATUS_TEMP,
+        .sreg = PMBUS_STATUS_TEMPERATURE,
+        .gbit = PB_STATUS_TEMPERATURE,
+        .limit = temp_limit_attrs,
+        .nlimit = 0,
+    }, {
+        .reg = PMBUS_READ_TEMPERATURE_2,
+        .class = PSC_TEMPERATURE,
+        .paged = true,
+        .update = true,
+        .compare = true,
+        .func = PMBUS_HAVE_TEMP2,
+        .sfunc = PMBUS_HAVE_STATUS_TEMP,
+        .sreg = PMBUS_STATUS_TEMPERATURE,
+        .gbit = PB_STATUS_TEMPERATURE,
+        .limit = temp_limit_attrs2,
+        .nlimit = 0,
+    }, {
+        .reg = PMBUS_READ_TEMPERATURE_3,
+        .class = PSC_TEMPERATURE,
+        .paged = true,
+        .update = true,
+        .compare = true,
+        .func = PMBUS_HAVE_TEMP3,
+        .sfunc = PMBUS_HAVE_STATUS_TEMP,
+        .sreg = PMBUS_STATUS_TEMPERATURE,
+        .gbit = PB_STATUS_TEMPERATURE,
+        .limit = temp_limit_attrs3,
+        .nlimit = 0,
+    }
+};
+
+static const int pmbus_fan_registers[] = {
+    PMBUS_READ_FAN_SPEED_1,
+    PMBUS_READ_FAN_SPEED_2,
+    PMBUS_READ_FAN_SPEED_3,
+    PMBUS_READ_FAN_SPEED_4
+};
+
+static const int pmbus_fan_status_registers[] = {
+    PMBUS_STATUS_FAN_12,
+    PMBUS_STATUS_FAN_12,
+    PMBUS_STATUS_FAN_34,
+    PMBUS_STATUS_FAN_34
+};
+
+static const u32 pmbus_fan_flags[] = {
+    PMBUS_HAVE_FAN12,
+    PMBUS_HAVE_FAN12,
+    PMBUS_HAVE_FAN34,
+    PMBUS_HAVE_FAN34
+};
+
+static const u32 pmbus_fan_status_flags[] = {
+    PMBUS_HAVE_STATUS_FAN12,
+    PMBUS_HAVE_STATUS_FAN12,
+    PMBUS_HAVE_STATUS_FAN34,
+    PMBUS_HAVE_STATUS_FAN34
+};
+
+/* Fans */
+
+/* Precondition: FAN_CONFIG_x_y and FAN_COMMAND_x must exist for the fan ID */
+static int pmbus_add_fan_ctrl(struct i2c_client *client,
+        struct pmbus_data *data, int index, int page, int id,
+        u8 config)
+{
+    struct pmbus_sensor *sensor;
+
+    sensor = pmbus_add_sensor(data, "fan", "target", index, page,
+                  0xff, PMBUS_VIRT_FAN_TARGET_1 + id, PSC_FAN,
+                  false, false, true);
+
+    if (!sensor)
+        return -ENOMEM;
+
+    if (!((data->info->func[page] & PMBUS_HAVE_PWM12) ||
+            (data->info->func[page] & PMBUS_HAVE_PWM34)))
+        return 0;
+
+    sensor = pmbus_add_sensor(data, "pwm", NULL, index, page,
+                  0xff, PMBUS_VIRT_PWM_1 + id, PSC_PWM,
+                  false, false, true);
+
+    if (!sensor)
+        return -ENOMEM;
+
+    sensor = pmbus_add_sensor(data, "pwm", "enable", index, page,
+                  0xff, PMBUS_VIRT_PWM_ENABLE_1 + id, PSC_PWM,
+                  true, false, false);
+
+    if (!sensor)
+        return -ENOMEM;
+
+    return 0;
+}
+
+static int pmbus_add_fan_attributes(struct i2c_client *client,
+                    struct pmbus_data *data)
+{
+    const struct pmbus_driver_info *info = data->info;
+    int index = 1;
+    int page;
+    int ret;
+
+    for (page = 0; page < info->pages; page++) {
+        int f;
+
+        for (f = 0; f < ARRAY_SIZE(pmbus_fan_registers); f++) {
+            int regval;
+
+            if (!(info->func[page] & pmbus_fan_flags[f]))
+                break;
+
+            if (!wb_pmbus_check_word_register(client, page,
+                               pmbus_fan_registers[f]))
+                break;
+
+            /*
+             * Skip fan if not installed.
+             * Each fan configuration register covers multiple fans,
+             * so we have to do some magic.
+             */
+            regval = _pmbus_read_byte_data(client, page,
+                pmbus_fan_config_registers[f]);
+            if (regval < 0 ||
+                (!(regval & (PB_FAN_1_INSTALLED >> ((f & 1) * 4)))))
+                continue;
+
+            if (pmbus_add_sensor(data, "fan", "input", index,
+                         page, 0xff, pmbus_fan_registers[f],
+                         PSC_FAN, true, true, true) == NULL)
+                return -ENOMEM;
+
+            /* Fan control */
+            if (wb_pmbus_check_word_register(client, page,
+                    pmbus_fan_command_registers[f])) {
+                ret = pmbus_add_fan_ctrl(client, data, index,
+                             page, f, regval);
+                if (ret < 0)
+                    return ret;
+            }
+
+            /*
+             * Each fan status register covers multiple fans,
+             * so we have to do some magic.
+             */
+            if ((info->func[page] & pmbus_fan_status_flags[f]) &&
+                wb_pmbus_check_byte_register(client,
+                    page, pmbus_fan_status_registers[f])) {
+                int reg;
+
+                if (f > 1)    /* fan 3, 4 */
+                    reg = PMBUS_STATUS_FAN_34;
+                else
+                    reg = PMBUS_STATUS_FAN_12;
+                ret = pmbus_add_boolean(data, "fan",
+                    "alarm", index, NULL, NULL, page, reg,
+                    PB_FAN_FAN1_WARNING >> (f & 1));
+                if (ret)
+                    return ret;
+                ret = pmbus_add_boolean(data, "fan",
+                    "fault", index, NULL, NULL, page, reg,
+                    PB_FAN_FAN1_FAULT >> (f & 1));
+                if (ret)
+                    return ret;
+            }
+            index++;
+        }
+    }
+    return 0;
+}
+
+struct pmbus_samples_attr {
+    int reg;
+    char *name;
+};
+
+struct pmbus_samples_reg {
+    int page;
+    struct pmbus_samples_attr *attr;
+    struct device_attribute dev_attr;
+};
+
+static struct pmbus_samples_attr pmbus_samples_registers[] = {
+    {
+        .reg = PMBUS_VIRT_SAMPLES,
+        .name = "samples",
+    }, {
+        .reg = PMBUS_VIRT_IN_SAMPLES,
+        .name = "in_samples",
+    }, {
+        .reg = PMBUS_VIRT_CURR_SAMPLES,
+        .name = "curr_samples",
+    }, {
+        .reg = PMBUS_VIRT_POWER_SAMPLES,
+        .name = "power_samples",
+    }, {
+        .reg = PMBUS_VIRT_TEMP_SAMPLES,
+        .name = "temp_samples",
+    }
+};
+
+#define to_samples_reg(x) container_of(x, struct pmbus_samples_reg, dev_attr)
+
+static ssize_t pmbus_show_samples(struct device *dev,
+                  struct device_attribute *devattr, char *buf)
+{
+    int val;
+    struct i2c_client *client = to_i2c_client(dev->parent);
+    struct pmbus_samples_reg *reg = to_samples_reg(devattr);
+    struct pmbus_data *data = i2c_get_clientdata(client);
+
+    mutex_lock(&data->update_lock);
+    val = _pmbus_read_word_data(client, reg->page, 0xff, reg->attr->reg);
+    mutex_unlock(&data->update_lock);
+    if (val < 0)
+        return val;
+
+    return snprintf(buf, PAGE_SIZE, "%d\n", val);
+}
+
+static ssize_t pmbus_set_samples(struct device *dev,
+                 struct device_attribute *devattr,
+                 const char *buf, size_t count)
+{
+    int ret;
+    long val;
+    struct i2c_client *client = to_i2c_client(dev->parent);
+    struct pmbus_samples_reg *reg = to_samples_reg(devattr);
+    struct pmbus_data *data = i2c_get_clientdata(client);
+
+    if (kstrtol(buf, 0, &val) < 0)
+        return -EINVAL;
+
+    mutex_lock(&data->update_lock);
+    ret = _pmbus_write_word_data(client, reg->page, reg->attr->reg, val);
+    mutex_unlock(&data->update_lock);
+
+    return ret ? : count;
+}
+
+static int pmbus_add_samples_attr(struct pmbus_data *data, int page,
+                  struct pmbus_samples_attr *attr)
+{
+    struct pmbus_samples_reg *reg;
+
+    reg = devm_kzalloc(data->dev, sizeof(*reg), GFP_KERNEL);
+    if (!reg)
+        return -ENOMEM;
+
+    reg->attr = attr;
+    reg->page = page;
+
+    pmbus_dev_attr_init(&reg->dev_attr, attr->name, 0644,
+                pmbus_show_samples, pmbus_set_samples);
+
+    return pmbus_add_attribute(data, &reg->dev_attr.attr);
+}
+
+static int pmbus_add_samples_attributes(struct i2c_client *client,
+                    struct pmbus_data *data)
+{
+    const struct pmbus_driver_info *info = data->info;
+    int s;
+
+    if (!(info->func[0] & PMBUS_HAVE_SAMPLES))
+        return 0;
+
+    for (s = 0; s < ARRAY_SIZE(pmbus_samples_registers); s++) {
+        struct pmbus_samples_attr *attr;
+        int ret;
+
+        attr = &pmbus_samples_registers[s];
+        if (!wb_pmbus_check_word_register(client, 0, attr->reg))
+            continue;
+
+        ret = pmbus_add_samples_attr(data, 0, attr);
+        if (ret)
+            return ret;
+    }
+
+    return 0;
+}
+
+static int pmbus_find_attributes(struct i2c_client *client,
+                 struct pmbus_data *data)
+{
+    int ret;
+
+    /* Voltage sensors */
+    ret = pmbus_add_sensor_attrs(client, data, "in", voltage_attributes,
+                     ARRAY_SIZE(voltage_attributes));
+    if (ret)
+        return ret;
+
+    /* Current sensors */
+    ret = pmbus_add_sensor_attrs(client, data, "curr", current_attributes,
+                     ARRAY_SIZE(current_attributes));
+    if (ret)
+        return ret;
+
+    /* Power sensors */
+    ret = pmbus_add_sensor_attrs(client, data, "power", power_attributes,
+                     ARRAY_SIZE(power_attributes));
+    if (ret)
+        return ret;
+
+    /* Temperature sensors */
+    ret = pmbus_add_sensor_attrs(client, data, "temp", temp_attributes,
+                     ARRAY_SIZE(temp_attributes));
+    if (ret)
+        return ret;
+
+    /* Fans */
+    ret = pmbus_add_fan_attributes(client, data);
+    if (ret)
+        return ret;
+
+    ret = pmbus_add_samples_attributes(client, data);
+    return ret;
+}
+
+/*
+ * Identify chip parameters.
+ * This function is called for all chips.
+ */
+static int pmbus_identify_common(struct i2c_client *client,
+                 struct pmbus_data *data, int page)
+{
+    int vout_mode = -1;
+
+    if (wb_pmbus_check_byte_register(client, page, PMBUS_VOUT_MODE))
+        vout_mode = _pmbus_read_byte_data(client, page,
+                          PMBUS_VOUT_MODE);
+    if (vout_mode >= 0 && vout_mode != 0xff) {
+        /*
+         * Not all chips support the VOUT_MODE command,
+         * so a failure to read it is not an error.
+         */
+        switch (vout_mode >> 5) {
+        case 0:    /* linear mode      */
+            if (data->info->format[PSC_VOLTAGE_OUT] != linear)
+                return -ENODEV;
+
+            data->exponent[page] = ((s8)(vout_mode << 3)) >> 3;
+            break;
+        case 1: /* VID mode         */
+            if (data->info->format[PSC_VOLTAGE_OUT] != vid)
+                return -ENODEV;
+            break;
+        case 2:    /* direct mode      */
+            if (data->info->format[PSC_VOLTAGE_OUT] != direct)
+                return -ENODEV;
+            break;
+        default:
+            return -ENODEV;
+        }
+    }
+
+    pmbus_clear_fault_page(client, page);
+    return 0;
+}
+
+static int pmbus_init_common(struct i2c_client *client, struct pmbus_data *data,
+                 struct pmbus_driver_info *info)
+{
+    struct device *dev = &client->dev;
+    int page, ret, i;
+
+    /*
+     * Some PMBus chips don't support PMBUS_STATUS_WORD, so try
+     * to use PMBUS_STATUS_BYTE instead if that is the case.
+     * Bail out if both registers are not supported.
+     */
+    for(i = 0; i < PMBUS_RETRY_TIME; i++) {
+        data->read_status = pmbus_read_status_word;
+        ret = i2c_smbus_read_word_data(client, PMBUS_STATUS_WORD);
+        if (ret < 0 || ret == 0xffff) {
+            data->read_status = pmbus_read_status_byte;
+            ret = i2c_smbus_read_byte_data(client, PMBUS_STATUS_BYTE);
+            if (ret < 0 || ret == 0xff) {
+                usleep_range(PMBUS_RETRY_SLEEP_TIME, PMBUS_RETRY_SLEEP_TIME + 1);
+                continue;
+            }
+        } else {
+            data->has_status_word = true;
+        }
+        break;
+    }
+
+    if(i == PMBUS_RETRY_TIME) {
+        dev_err(dev, "PMBus status register not found\n");
+        return -ENODEV;
+    }
+
+    /* Enable PEC if the controller supports it */
+    for(i = 0; i < PMBUS_RETRY_TIME; i++) {
+        ret = i2c_smbus_read_byte_data(client, PMBUS_CAPABILITY);
+        if (ret >= 0) {
+            break;
+        }
+        usleep_range(PMBUS_RETRY_SLEEP_TIME, PMBUS_RETRY_SLEEP_TIME + 1);
+    }
+
+    if (ret >= 0 && (ret & PB_CAPABILITY_ERROR_CHECK))
+        client->flags |= I2C_CLIENT_PEC;
+
+    /*
+     * Check if the chip is write protected. If it is, we can not clear
+     * faults, and we should not try it. Also, in that case, writes into
+     * limit registers need to be disabled.
+     */
+    for(i = 0; i < PMBUS_RETRY_TIME; i++) {
+        ret = i2c_smbus_read_byte_data(client, PMBUS_WRITE_PROTECT);
+        if (ret >= 0) {
+            break;
+        }
+        usleep_range(PMBUS_RETRY_SLEEP_TIME, PMBUS_RETRY_SLEEP_TIME + 1);
+    }
+
+    if (ret > 0 && (ret & PB_WP_ANY))
+        data->flags |= PMBUS_WRITE_PROTECTED | PMBUS_SKIP_STATUS_CHECK;
+
+    if (data->info->pages)
+        wb_pmbus_clear_faults(client);
+    else
+        pmbus_clear_fault_page(client, -1);
+
+    if (info->identify) {
+        ret = (*info->identify)(client, info);
+        if (ret < 0) {
+            dev_err(dev, "Chip identification failed\n");
+            return ret;
+        }
+    }
+
+    if (info->pages <= 0 || info->pages > PMBUS_PAGES) {
+        dev_err(dev, "Bad number of PMBus pages: %d\n", info->pages);
+        return -ENODEV;
+    }
+
+    for (page = 0; page < info->pages; page++) {
+        ret = pmbus_identify_common(client, data, page);
+        if (ret < 0) {
+            dev_err(dev, "Failed to identify chip capabilities\n");
+            return ret;
+        }
+    }
+    return 0;
+}
+
+#if IS_ENABLED(CONFIG_REGULATOR)
+static int pmbus_regulator_is_enabled(struct regulator_dev *rdev)
+{
+    struct device *dev = rdev_get_dev(rdev);
+    struct i2c_client *client = to_i2c_client(dev->parent);
+    u8 page = rdev_get_id(rdev);
+    int ret;
+
+    ret = wb_pmbus_read_byte_data(client, page, PMBUS_OPERATION);
+    if (ret < 0)
+        return ret;
+
+    return !!(ret & PB_OPERATION_CONTROL_ON);
+}
+
+static int _pmbus_regulator_on_off(struct regulator_dev *rdev, bool enable)
+{
+    struct device *dev = rdev_get_dev(rdev);
+    struct i2c_client *client = to_i2c_client(dev->parent);
+    u8 page = rdev_get_id(rdev);
+
+    return wb_pmbus_update_byte_data(client, page, PMBUS_OPERATION,
+                      PB_OPERATION_CONTROL_ON,
+                      enable ? PB_OPERATION_CONTROL_ON : 0);
+}
+
+static int pmbus_regulator_enable(struct regulator_dev *rdev)
+{
+    return _pmbus_regulator_on_off(rdev, 1);
+}
+
+static int pmbus_regulator_disable(struct regulator_dev *rdev)
+{
+    return _pmbus_regulator_on_off(rdev, 0);
+}
+
+const struct regulator_ops wb_pmbus_regulator_ops = {
+    .enable = pmbus_regulator_enable,
+    .disable = pmbus_regulator_disable,
+    .is_enabled = pmbus_regulator_is_enabled,
+};
+EXPORT_SYMBOL_GPL(wb_pmbus_regulator_ops);
+
+static int pmbus_regulator_register(struct pmbus_data *data)
+{
+    struct device *dev = data->dev;
+    const struct pmbus_driver_info *info = data->info;
+    const struct pmbus_platform_data *pdata = dev_get_platdata(dev);
+    struct regulator_dev *rdev;
+    int i;
+
+    for (i = 0; i < info->num_regulators; i++) {
+        struct regulator_config config = { };
+
+        config.dev = dev;
+        config.driver_data = data;
+
+        if (pdata && pdata->reg_init_data)
+            config.init_data = &pdata->reg_init_data[i];
+
+        rdev = devm_regulator_register(dev, &info->reg_desc[i],
+                           &config);
+        if (IS_ERR(rdev)) {
+            dev_err(dev, "Failed to register %s regulator\n",
+                info->reg_desc[i].name);
+            return PTR_ERR(rdev);
+        }
+    }
+
+    return 0;
+}
+#else
+static int pmbus_regulator_register(struct pmbus_data *data)
+{
+    return 0;
+}
+#endif
+
+static struct dentry *pmbus_debugfs_dir;    /* pmbus debugfs directory */
+
+#if IS_ENABLED(CONFIG_DEBUG_FS)
+static int pmbus_debugfs_get(void *data, u64 *val)
+{
+    int rc;
+    struct pmbus_debugfs_entry *entry = data;
+
+    rc = _pmbus_read_byte_data(entry->client, entry->page, entry->reg);
+    if (rc < 0)
+        return rc;
+
+    *val = rc;
+
+    return 0;
+}
+DEFINE_DEBUGFS_ATTRIBUTE(pmbus_debugfs_ops, pmbus_debugfs_get, NULL,
+             "0x%02llx\n");
+
+static int pmbus_debugfs_get_status(void *data, u64 *val)
+{
+    int rc;
+    struct pmbus_debugfs_entry *entry = data;
+    struct pmbus_data *pdata = i2c_get_clientdata(entry->client);
+
+    rc = pdata->read_status(entry->client, entry->page);
+    if (rc < 0)
+        return rc;
+
+    *val = rc;
+
+    return 0;
+}
+DEFINE_DEBUGFS_ATTRIBUTE(pmbus_debugfs_ops_status, pmbus_debugfs_get_status,
+             NULL, "0x%04llx\n");
+
+static int pmbus_debugfs_get_pec(void *data, u64 *val)
+{
+    struct i2c_client *client = data;
+
+    *val = !!(client->flags & I2C_CLIENT_PEC);
+
+    return 0;
+}
+
+static int pmbus_debugfs_set_pec(void *data, u64 val)
+{
+    int rc;
+    struct i2c_client *client = data;
+
+    if (!val) {
+        client->flags &= ~I2C_CLIENT_PEC;
+        return 0;
+    }
+
+    if (val != 1)
+        return -EINVAL;
+
+    rc = i2c_smbus_read_byte_data(client, PMBUS_CAPABILITY);
+    if (rc < 0)
+        return rc;
+
+    if (!(rc & PB_CAPABILITY_ERROR_CHECK))
+        return -EOPNOTSUPP;
+
+    client->flags |= I2C_CLIENT_PEC;
+
+    return 0;
+}
+DEFINE_DEBUGFS_ATTRIBUTE(pmbus_debugfs_ops_pec, pmbus_debugfs_get_pec,
+             pmbus_debugfs_set_pec, "%llu\n");
+
+static int pmbus_init_debugfs(struct i2c_client *client,
+                  struct pmbus_data *data)
+{
+    int i, idx = 0;
+    char name[PMBUS_NAME_SIZE];
+    struct pmbus_debugfs_entry *entries;
+
+    if (!pmbus_debugfs_dir)
+        return -ENODEV;
+
+    /*
+     * Create the debugfs directory for this device. Use the hwmon device
+     * name to avoid conflicts (hwmon numbers are globally unique).
+     */
+    data->debugfs = debugfs_create_dir(dev_name(data->hwmon_dev),
+                       pmbus_debugfs_dir);
+    if (IS_ERR_OR_NULL(data->debugfs)) {
+        data->debugfs = NULL;
+        return -ENODEV;
+    }
+
+    /* Allocate the max possible entries we need. */
+    entries = devm_kcalloc(data->dev,
+                   data->info->pages * 10, sizeof(*entries),
+                   GFP_KERNEL);
+    if (!entries)
+        return -ENOMEM;
+
+    debugfs_create_file("pec", 0664, data->debugfs, client,
+                &pmbus_debugfs_ops_pec);
+
+    for (i = 0; i < data->info->pages; ++i) {
+        /* Check accessibility of status register if it's not page 0 */
+        if (!i || pmbus_check_status_register(client, i)) {
+            /* No need to set reg as we have special read op. */
+            entries[idx].client = client;
+            entries[idx].page = i;
+            scnprintf(name, PMBUS_NAME_SIZE, "status%d", i);
+            debugfs_create_file(name, 0444, data->debugfs,
+                        &entries[idx++],
+                        &pmbus_debugfs_ops_status);
+        }
+
+        if (data->info->func[i] & PMBUS_HAVE_STATUS_VOUT) {
+            entries[idx].client = client;
+            entries[idx].page = i;
+            entries[idx].reg = PMBUS_STATUS_VOUT;
+            scnprintf(name, PMBUS_NAME_SIZE, "status%d_vout", i);
+            debugfs_create_file(name, 0444, data->debugfs,
+                        &entries[idx++],
+                        &pmbus_debugfs_ops);
+        }
+
+        if (data->info->func[i] & PMBUS_HAVE_STATUS_IOUT) {
+            entries[idx].client = client;
+            entries[idx].page = i;
+            entries[idx].reg = PMBUS_STATUS_IOUT;
+            scnprintf(name, PMBUS_NAME_SIZE, "status%d_iout", i);
+            debugfs_create_file(name, 0444, data->debugfs,
+                        &entries[idx++],
+                        &pmbus_debugfs_ops);
+        }
+
+        if (data->info->func[i] & PMBUS_HAVE_STATUS_INPUT) {
+            entries[idx].client = client;
+            entries[idx].page = i;
+            entries[idx].reg = PMBUS_STATUS_INPUT;
+            scnprintf(name, PMBUS_NAME_SIZE, "status%d_input", i);
+            debugfs_create_file(name, 0444, data->debugfs,
+                        &entries[idx++],
+                        &pmbus_debugfs_ops);
+        }
+
+        if (data->info->func[i] & PMBUS_HAVE_STATUS_TEMP) {
+            entries[idx].client = client;
+            entries[idx].page = i;
+            entries[idx].reg = PMBUS_STATUS_TEMPERATURE;
+            scnprintf(name, PMBUS_NAME_SIZE, "status%d_temp", i);
+            debugfs_create_file(name, 0444, data->debugfs,
+                        &entries[idx++],
+                        &pmbus_debugfs_ops);
+        }
+
+        if (wb_pmbus_check_byte_register(client, i, PMBUS_STATUS_CML)) {
+            entries[idx].client = client;
+            entries[idx].page = i;
+            entries[idx].reg = PMBUS_STATUS_CML;
+            scnprintf(name, PMBUS_NAME_SIZE, "status%d_cml", i);
+            debugfs_create_file(name, 0444, data->debugfs,
+                        &entries[idx++],
+                        &pmbus_debugfs_ops);
+        }
+
+        if (wb_pmbus_check_byte_register(client, i, PMBUS_STATUS_OTHER)) {
+            entries[idx].client = client;
+            entries[idx].page = i;
+            entries[idx].reg = PMBUS_STATUS_OTHER;
+            scnprintf(name, PMBUS_NAME_SIZE, "status%d_other", i);
+            debugfs_create_file(name, 0444, data->debugfs,
+                        &entries[idx++],
+                        &pmbus_debugfs_ops);
+        }
+
+        if (wb_pmbus_check_byte_register(client, i,
+                          PMBUS_STATUS_MFR_SPECIFIC)) {
+            entries[idx].client = client;
+            entries[idx].page = i;
+            entries[idx].reg = PMBUS_STATUS_MFR_SPECIFIC;
+            scnprintf(name, PMBUS_NAME_SIZE, "status%d_mfr", i);
+            debugfs_create_file(name, 0444, data->debugfs,
+                        &entries[idx++],
+                        &pmbus_debugfs_ops);
+        }
+
+        if (data->info->func[i] & PMBUS_HAVE_STATUS_FAN12) {
+            entries[idx].client = client;
+            entries[idx].page = i;
+            entries[idx].reg = PMBUS_STATUS_FAN_12;
+            scnprintf(name, PMBUS_NAME_SIZE, "status%d_fan12", i);
+            debugfs_create_file(name, 0444, data->debugfs,
+                        &entries[idx++],
+                        &pmbus_debugfs_ops);
+        }
+
+        if (data->info->func[i] & PMBUS_HAVE_STATUS_FAN34) {
+            entries[idx].client = client;
+            entries[idx].page = i;
+            entries[idx].reg = PMBUS_STATUS_FAN_34;
+            scnprintf(name, PMBUS_NAME_SIZE, "status%d_fan34", i);
+            debugfs_create_file(name, 0444, data->debugfs,
+                        &entries[idx++],
+                        &pmbus_debugfs_ops);
+        }
+    }
+
+    return 0;
+}
+#else
+static int pmbus_init_debugfs(struct i2c_client *client,
+                  struct pmbus_data *data)
+{
+    return 0;
+}
+#endif    /* IS_ENABLED(CONFIG_DEBUG_FS) */
+
+int wb_pmbus_do_probe(struct i2c_client *client, struct pmbus_driver_info *info)
+{
+    struct device *dev = &client->dev;
+    const struct pmbus_platform_data *pdata = dev_get_platdata(dev);
+    struct pmbus_data *data;
+    size_t groups_num = 0;
+    int ret;
+
+    if (!info)
+        return -ENODEV;
+
+    if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_WRITE_BYTE
+                     | I2C_FUNC_SMBUS_BYTE_DATA
+                     | I2C_FUNC_SMBUS_WORD_DATA))
+        return -ENODEV;
+
+    data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
+    if (!data)
+        return -ENOMEM;
+
+    if (info->groups)
+        while (info->groups[groups_num])
+            groups_num++;
+
+    data->groups = devm_kcalloc(dev, groups_num + 2, sizeof(void *),
+                    GFP_KERNEL);
+    if (!data->groups)
+        return -ENOMEM;
+
+    i2c_set_clientdata(client, data);
+    mutex_init(&data->update_lock);
+    data->dev = dev;
+
+    if (pdata)
+        data->flags = pdata->flags;
+    data->info = info;
+    data->currpage = -1;
+    data->currphase = -1;
+
+    ret = pmbus_init_common(client, data, info);
+    if (ret < 0)
+        return ret;
+
+    ret = pmbus_find_attributes(client, data);
+    if (ret)
+        return ret;
+
+    /*
+     * If there are no attributes, something is wrong.
+     * Bail out instead of trying to register nothing.
+     */
+    if (!data->num_attributes) {
+        dev_err(dev, "No attributes found\n");
+        return -ENODEV;
+    }
+
+    data->groups[0] = &data->group;
+    memcpy(data->groups + 1, info->groups, sizeof(void *) * groups_num);
+    data->hwmon_dev = devm_hwmon_device_register_with_groups(dev,
+                    client->name, data, data->groups);
+    if (IS_ERR(data->hwmon_dev)) {
+        dev_err(dev, "Failed to register hwmon device\n");
+        return PTR_ERR(data->hwmon_dev);
+    }
+
+    ret = pmbus_regulator_register(data);
+    if (ret)
+        return ret;
+
+    ret = pmbus_init_debugfs(client, data);
+    if (ret)
+        dev_warn(dev, "Failed to register debugfs\n");
+
+    return 0;
+}
+EXPORT_SYMBOL_GPL(wb_pmbus_do_probe);
+
+void wb_pmbus_do_remove(struct i2c_client *client)
+{
+    struct pmbus_data *data = i2c_get_clientdata(client);
+
+    debugfs_remove_recursive(data->debugfs);
+
+    return;
+}
+EXPORT_SYMBOL_GPL(wb_pmbus_do_remove);
+
+struct dentry *wb_pmbus_get_debugfs_dir(struct i2c_client *client)
+{
+    struct pmbus_data *data = i2c_get_clientdata(client);
+
+    return data->debugfs;
+}
+EXPORT_SYMBOL_GPL(wb_pmbus_get_debugfs_dir);
+
+static int __init pmbus_core_init(void)
+{
+    pmbus_debugfs_dir = debugfs_create_dir("pmbus", NULL);
+    if (IS_ERR(pmbus_debugfs_dir))
+        pmbus_debugfs_dir = NULL;
+
+    return 0;
+}
+
+static void __exit pmbus_core_exit(void)
+{
+    debugfs_remove_recursive(pmbus_debugfs_dir);
+}
+
+module_init(pmbus_core_init);
+module_exit(pmbus_core_exit);
+
+MODULE_AUTHOR("support");
+MODULE_DESCRIPTION("PMBus core driver");
+MODULE_LICENSE("GPL");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_tmp401.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_tmp401.c
new file mode 100644
index 000000000..b8d3a024f
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_tmp401.c
@@ -0,0 +1,1010 @@
+/* tmp401.c
+ *
+ * Copyright (C) 2007,2008 Hans de Goede <hdegoede@redhat.com>
+ * Preliminary tmp411 support by:
+ * Gabriel Konat, Sander Leget, Wouter Willems
+ * Copyright (C) 2009 Andre Prendel <andre.prendel@gmx.de>
+ *
+ * Cleanup and support for TMP431 and TMP432 by Guenter Roeck
+ * Copyright (c) 2013 Guenter Roeck <linux@roeck-us.net>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+/*
+ * Driver for the Texas Instruments TMP401 SMBUS temperature sensor IC.
+ *
+ * Note this IC is in some aspect similar to the LM90, but it has quite a
+ * few differences too, for example the local temp has a higher resolution
+ * and thus has 16 bits registers for its value and limit instead of 8 bits.
+ */
+
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/bitops.h>
+#include <linux/slab.h>
+#include <linux/jiffies.h>
+#include <linux/i2c.h>
+#include <linux/hwmon.h>
+#include <linux/hwmon-sysfs.h>
+#include <linux/err.h>
+#include <linux/mutex.h>
+#include <linux/sysfs.h>
+#include <linux/delay.h>
+
+/* Addresses to scan */
+/* static const unsigned short normal_i2c[] = { 0x48, 0x49, 0x4a, 0x4c, 0x4d,
+	0x4e, 0x4f, I2C_CLIENT_END }; */
+
+enum chips { tmp401, tmp411, tmp431, tmp432, tmp435, tmp461 };
+
+/*
+ * The TMP401 registers, note some registers have different addresses for
+ * reading and writing
+ */
+#define TMP401_STATUS                   (0x02)
+#define TMP401_CONFIG_READ              (0x03)
+#define TMP401_CONFIG_WRITE             (0x09)
+#define TMP401_CONVERSION_RATE_READ     (0x04)
+#define TMP401_CONVERSION_RATE_WRITE    (0x0A)
+#define TMP401_TEMP_CRIT_HYST           (0x21)
+#define TMP401_MANUFACTURER_ID_REG      (0xFE)
+#define TMP401_DEVICE_ID_REG            (0xFF)
+#define TMP401_DEVICE_CAR_REG           (0x22) /* Consecutive Alert Register */
+
+static const u8 TMP401_TEMP_MSB_READ[7][2] = {
+	{ 0x00, 0x01 },	/* temp */
+	{ 0x06, 0x08 },	/* low limit */
+	{ 0x05, 0x07 },	/* high limit */
+	{ 0x20, 0x19 },	/* therm (crit) limit */
+	{ 0x30, 0x34 },	/* lowest */
+	{ 0x32, 0x36 },	/* highest */
+	{ 0, 0x11 },	/* offset */
+};
+
+static const u8 TMP401_TEMP_MSB_WRITE[7][2] = {
+	{ 0, 0 },	/* temp (unused) */
+	{ 0x0C, 0x0E },	/* low limit */
+	{ 0x0B, 0x0D },	/* high limit */
+	{ 0x20, 0x19 },	/* therm (crit) limit */
+	{ 0x30, 0x34 },	/* lowest */
+	{ 0x32, 0x36 },	/* highest */
+	{ 0, 0x11 },	/* offset */
+};
+
+static const u8 TMP401_TEMP_LSB[7][2] = {
+	{ 0x15, 0x10 },	/* temp */
+	{ 0x17, 0x14 },	/* low limit */
+	{ 0x16, 0x13 },	/* high limit */
+	{ 0, 0 },	/* therm (crit) limit (unused) */
+	{ 0x31, 0x35 },	/* lowest */
+	{ 0x33, 0x37 },	/* highest */
+	{ 0, 0x12 },	/* offset */
+};
+
+static const u8 TMP432_TEMP_MSB_READ[4][3] = {
+	{ 0x00, 0x01, 0x23 },	/* temp */
+	{ 0x06, 0x08, 0x16 },	/* low limit */
+	{ 0x05, 0x07, 0x15 },	/* high limit */
+	{ 0x20, 0x19, 0x1A },	/* therm (crit) limit */
+};
+
+static const u8 TMP432_TEMP_MSB_WRITE[4][3] = {
+	{ 0, 0, 0 },		/* temp  - unused */
+	{ 0x0C, 0x0E, 0x16 },	/* low limit */
+	{ 0x0B, 0x0D, 0x15 },	/* high limit */
+	{ 0x20, 0x19, 0x1A },	/* therm (crit) limit */
+};
+
+static const u8 TMP432_TEMP_LSB[3][3] = {
+	{ 0x29, 0x10, 0x24 },	/* temp */
+	{ 0x3E, 0x14, 0x18 },	/* low limit */
+	{ 0x3D, 0x13, 0x17 },	/* high limit */
+};
+
+/* [0] = fault, [1] = low, [2] = high, [3] = therm/crit */
+static const u8 TMP432_STATUS_REG[] = {
+	0x1b, 0x36, 0x35, 0x37 };
+
+/* Flags */
+#define TMP401_CONFIG_RANGE             BIT(2)
+#define TMP401_CONFIG_SHUTDOWN          BIT(6)
+#define TMP401_STATUS_LOCAL_CRIT        BIT(0)
+#define TMP401_STATUS_REMOTE_CRIT       BIT(1)
+#define TMP401_STATUS_REMOTE_OPEN       BIT(2)
+#define TMP401_STATUS_REMOTE_LOW        BIT(3)
+#define TMP401_STATUS_REMOTE_HIGH       BIT(4)
+#define TMP401_STATUS_LOCAL_LOW         BIT(5)
+#define TMP401_STATUS_LOCAL_HIGH        BIT(6)
+
+/* On TMP432, each status has its own register */
+#define TMP432_STATUS_LOCAL             BIT(0)
+#define TMP432_STATUS_REMOTE1           BIT(1)
+#define TMP432_STATUS_REMOTE2           BIT(2)
+
+/* Manufacturer / Device ID's */
+#define TMP401_MANUFACTURER_ID      (0x55)
+#define TMP401_DEVICE_ID            (0x11)
+#define TMP411A_DEVICE_ID           (0x12)
+#define TMP411B_DEVICE_ID           (0x13)
+#define TMP411C_DEVICE_ID           (0x10)
+#define TMP431_DEVICE_ID            (0x31)
+#define TMP432_DEVICE_ID            (0x32)
+#define TMP435_DEVICE_ID            (0x35)
+
+/* Timeout function bit */
+#define TIMEOUT_STATE_BIT                  (7)   /* 1:enable 0:disable */
+#define TIMEOUT_STATE_EN                   (1)   /* 1:enable  */
+#define TIMEOUT_STATE_IEN                  (0)   /* 0:disable */
+#define TIMEOUT_STATE_NA                   "NA"
+#define TMP401_TEMP_INVALID_RETRY_TIMES    (3)
+
+/* input temp threshold check */
+typedef struct tmp401_temp_threshold_s {
+    int chip_type;
+    int temp_max;
+    int temp_min;
+} tmp401_temp_threshold_t;
+
+static tmp401_temp_threshold_t g_tmp401_input_threshold_info[] = {
+    {
+        .chip_type = tmp411,
+        .temp_max = 127000,
+        .temp_min = -55000,
+    },
+};
+
+/*
+ * Driver data (common to all clients)
+ */
+
+static const struct i2c_device_id tmp401_id[] = {
+	{ "wb_tmp401", tmp401 },
+	{ "wb_tmp411", tmp411 },
+	{ "wb_tmp431", tmp431 },
+	{ "wb_tmp432", tmp432 },
+	{ "wb_tmp435", tmp435 },
+	{ "wb_tmp461", tmp461 },
+	{ }
+};
+MODULE_DEVICE_TABLE(i2c, tmp401_id);
+
+/*
+ * Client data (each client gets its own)
+ */
+
+struct tmp401_data {
+	struct i2c_client *client;
+	const struct attribute_group *groups[3];
+	struct mutex update_lock;
+	char valid; /* zero until following fields are valid */
+	unsigned long last_updated; /* in jiffies */
+	enum chips kind;
+
+	unsigned int update_interval;	/* in milliseconds */
+
+	/* register values */
+	u8 status[4];
+	u8 config;
+	u16 temp[7][3];
+	u8 temp_crit_hyst;
+};
+
+/*
+ * Sysfs attr show / store functions
+ */
+
+static int tmp401_register_to_temp(u16 reg, u8 config)
+{
+	int temp = reg;
+
+	if (config & TMP401_CONFIG_RANGE)
+		temp -= 64 * 256;
+
+	return DIV_ROUND_CLOSEST(temp * 125, 32);
+}
+
+static u16 tmp401_temp_to_register(long temp, u8 config, int zbits)
+{
+	if (config & TMP401_CONFIG_RANGE) {
+		temp = clamp_val(temp, -64000, 191000);
+		temp += 64000;
+	} else
+		temp = clamp_val(temp, 0, 127000);
+
+	return DIV_ROUND_CLOSEST(temp * (1 << (8 - zbits)), 1000) << zbits;
+}
+
+static int tmp401_update_device_reg16(struct i2c_client *client,
+				      struct tmp401_data *data)
+{
+	int i, j, val;
+	int num_regs = data->kind == tmp411 ? 6 : 4;
+	int num_sensors = data->kind == tmp432 ? 3 : 2;
+
+	for (i = 0; i < num_sensors; i++) {		/* local / r1 / r2 */
+		for (j = 0; j < num_regs; j++) {	/* temp / low / ... */
+			u8 regaddr;
+			/*
+			 * High byte must be read first immediately followed
+			 * by the low byte
+			 */
+			regaddr = data->kind == tmp432 ?
+						TMP432_TEMP_MSB_READ[j][i] :
+						TMP401_TEMP_MSB_READ[j][i];
+			val = i2c_smbus_read_byte_data(client, regaddr);
+			if (val < 0)
+				return val;
+			data->temp[j][i] = val << 8;
+			if (j == 3)		/* crit is msb only */
+				continue;
+			regaddr = data->kind == tmp432 ? TMP432_TEMP_LSB[j][i]
+						       : TMP401_TEMP_LSB[j][i];
+			val = i2c_smbus_read_byte_data(client, regaddr);
+			if (val < 0)
+				return val;
+			data->temp[j][i] |= val;
+		}
+	}
+	return 0;
+}
+
+static struct tmp401_data *tmp401_update_device(struct device *dev)
+{
+	struct tmp401_data *data = dev_get_drvdata(dev);
+	struct i2c_client *client = data->client;
+	struct tmp401_data *ret = data;
+	int i, val;
+	unsigned long next_update;
+
+	mutex_lock(&data->update_lock);
+
+	next_update = data->last_updated +
+		      msecs_to_jiffies(data->update_interval);
+	if (time_after(jiffies, next_update) || !data->valid) {
+		if (data->kind != tmp432) {
+			/*
+			 * The driver uses the TMP432 status format internally.
+			 * Convert status to TMP432 format for other chips.
+			 */
+			val = i2c_smbus_read_byte_data(client, TMP401_STATUS);
+			if (val < 0) {
+				ret = ERR_PTR(val);
+				goto abort;
+			}
+			data->status[0] =
+			  (val & TMP401_STATUS_REMOTE_OPEN) >> 1;
+			data->status[1] =
+			  ((val & TMP401_STATUS_REMOTE_LOW) >> 2) |
+			  ((val & TMP401_STATUS_LOCAL_LOW) >> 5);
+			data->status[2] =
+			  ((val & TMP401_STATUS_REMOTE_HIGH) >> 3) |
+			  ((val & TMP401_STATUS_LOCAL_HIGH) >> 6);
+			data->status[3] = val & (TMP401_STATUS_LOCAL_CRIT
+						| TMP401_STATUS_REMOTE_CRIT);
+		} else {
+			for (i = 0; i < ARRAY_SIZE(data->status); i++) {
+				val = i2c_smbus_read_byte_data(client,
+							TMP432_STATUS_REG[i]);
+				if (val < 0) {
+					ret = ERR_PTR(val);
+					goto abort;
+				}
+				data->status[i] = val;
+			}
+		}
+
+		val = i2c_smbus_read_byte_data(client, TMP401_CONFIG_READ);
+		if (val < 0) {
+			ret = ERR_PTR(val);
+			goto abort;
+		}
+		data->config = val;
+		val = tmp401_update_device_reg16(client, data);
+		if (val < 0) {
+			ret = ERR_PTR(val);
+			goto abort;
+		}
+		val = i2c_smbus_read_byte_data(client, TMP401_TEMP_CRIT_HYST);
+		if (val < 0) {
+			ret = ERR_PTR(val);
+			goto abort;
+		}
+		data->temp_crit_hyst = val;
+
+		data->last_updated = jiffies;
+		data->valid = 1;
+	}
+
+abort:
+	mutex_unlock(&data->update_lock);
+	return ret;
+}
+
+static int tmp401_input_temp_check(struct tmp401_data *data, int input_val)
+{
+    int i, size;
+
+    size = ARRAY_SIZE(g_tmp401_input_threshold_info);
+
+    for (i = 0; i < size; i++) {
+        if (g_tmp401_input_threshold_info[i].chip_type == data->kind) {
+            if ((input_val > g_tmp401_input_threshold_info[i].temp_max)
+                    || (input_val < g_tmp401_input_threshold_info[i].temp_min)) {
+                dev_dbg(&data->client->dev, "input temp: %d not in range[%d, %d]\n",
+                    input_val, g_tmp401_input_threshold_info[i].temp_min,
+                    g_tmp401_input_threshold_info[i].temp_max);
+                return -EINVAL;
+            }
+            dev_dbg(&data->client->dev, "input temp: %d in range[%d, %d]", input_val,
+                g_tmp401_input_threshold_info[i].temp_min, g_tmp401_input_threshold_info[i].temp_max);
+            return 0;
+        }
+    }
+    return 0;
+}
+
+static ssize_t show_temp(struct device *dev, struct device_attribute *devattr, char *buf)
+{
+    int nr, index, i, value, ret;
+    struct tmp401_data *data;
+    struct i2c_client *client;
+
+    data = dev_get_drvdata(dev);
+    client = data->client;
+
+    nr = to_sensor_dev_attr_2(devattr)->nr;
+    index = to_sensor_dev_attr_2(devattr)->index;
+
+    for (i = 0; i < TMP401_TEMP_INVALID_RETRY_TIMES; i++) {
+        data = tmp401_update_device(dev);
+        if (IS_ERR(data)) {
+            return PTR_ERR(data);
+        }
+        value = tmp401_register_to_temp(data->temp[nr][index], data->config);
+        if (nr != 0) {  /* not input temp, return value */
+            return sprintf(buf, "%d\n", value);
+        }
+        /* nr == 0 is temp input, do input_temp_check */
+        ret = tmp401_input_temp_check(data, value);
+        if (ret == 0) { /* input temp check ok */
+           return sprintf(buf, "%d\n", value);
+        }
+        if ((i + 1) < TMP401_TEMP_INVALID_RETRY_TIMES) {
+            msleep(data->update_interval);
+        }
+    }
+    dev_info(&client->dev, "temp%d_input value: %d invalid\n", index + 1, value);
+    return -EINVAL;
+}
+
+static ssize_t show_temp_crit_hyst(struct device *dev,
+	struct device_attribute *devattr, char *buf)
+{
+	int temp, index = to_sensor_dev_attr(devattr)->index;
+	struct tmp401_data *data = tmp401_update_device(dev);
+
+	if (IS_ERR(data))
+		return PTR_ERR(data);
+
+	mutex_lock(&data->update_lock);
+	temp = tmp401_register_to_temp(data->temp[3][index], data->config);
+	temp -= data->temp_crit_hyst * 1000;
+	mutex_unlock(&data->update_lock);
+
+	return sprintf(buf, "%d\n", temp);
+}
+
+static ssize_t show_status(struct device *dev,
+	struct device_attribute *devattr, char *buf)
+{
+	int nr = to_sensor_dev_attr_2(devattr)->nr;
+	int mask = to_sensor_dev_attr_2(devattr)->index;
+	struct tmp401_data *data = tmp401_update_device(dev);
+
+	if (IS_ERR(data))
+		return PTR_ERR(data);
+
+	return sprintf(buf, "%d\n", !!(data->status[nr] & mask));
+}
+
+static ssize_t store_temp(struct device *dev, struct device_attribute *devattr,
+			  const char *buf, size_t count)
+{
+	int nr = to_sensor_dev_attr_2(devattr)->nr;
+	int index = to_sensor_dev_attr_2(devattr)->index;
+	struct tmp401_data *data = dev_get_drvdata(dev);
+	struct i2c_client *client = data->client;
+	long val;
+	u16 reg;
+	u8 regaddr;
+
+	if (kstrtol(buf, 10, &val))
+		return -EINVAL;
+
+	reg = tmp401_temp_to_register(val, data->config, nr == 3 ? 8 : 4);
+
+	mutex_lock(&data->update_lock);
+
+	regaddr = data->kind == tmp432 ? TMP432_TEMP_MSB_WRITE[nr][index]
+				       : TMP401_TEMP_MSB_WRITE[nr][index];
+	i2c_smbus_write_byte_data(client, regaddr, reg >> 8);
+	if (nr != 3) {
+		regaddr = data->kind == tmp432 ? TMP432_TEMP_LSB[nr][index]
+					       : TMP401_TEMP_LSB[nr][index];
+		i2c_smbus_write_byte_data(client, regaddr, reg & 0xFF);
+	}
+	data->temp[nr][index] = reg;
+
+	mutex_unlock(&data->update_lock);
+
+	return count;
+}
+
+static ssize_t store_temp_crit_hyst(struct device *dev, struct device_attribute
+	*devattr, const char *buf, size_t count)
+{
+	int temp, index = to_sensor_dev_attr(devattr)->index;
+	struct tmp401_data *data = tmp401_update_device(dev);
+	long val;
+	u8 reg;
+
+	if (IS_ERR(data))
+		return PTR_ERR(data);
+
+	if (kstrtol(buf, 10, &val))
+		return -EINVAL;
+
+	if (data->config & TMP401_CONFIG_RANGE)
+		val = clamp_val(val, -64000, 191000);
+	else
+		val = clamp_val(val, 0, 127000);
+
+	mutex_lock(&data->update_lock);
+	temp = tmp401_register_to_temp(data->temp[3][index], data->config);
+	val = clamp_val(val, temp - 255000, temp);
+	reg = ((temp - val) + 500) / 1000;
+
+	i2c_smbus_write_byte_data(data->client, TMP401_TEMP_CRIT_HYST,
+				  reg);
+
+	data->temp_crit_hyst = reg;
+
+	mutex_unlock(&data->update_lock);
+
+	return count;
+}
+
+/*
+ * Resets the historical measurements of minimum and maximum temperatures.
+ * This is done by writing any value to any of the minimum/maximum registers
+ * (0x30-0x37).
+ */
+static ssize_t reset_temp_history(struct device *dev,
+	struct device_attribute	*devattr, const char *buf, size_t count)
+{
+	struct tmp401_data *data = dev_get_drvdata(dev);
+	struct i2c_client *client = data->client;
+	long val;
+
+	if (kstrtol(buf, 10, &val))
+		return -EINVAL;
+
+	if (val != 1) {
+		dev_err(dev,
+			"temp_reset_history value %ld not supported. Use 1 to reset the history!\n",
+			val);
+		return -EINVAL;
+	}
+	mutex_lock(&data->update_lock);
+	i2c_smbus_write_byte_data(client, TMP401_TEMP_MSB_WRITE[5][0], val);
+	data->valid = 0;
+	mutex_unlock(&data->update_lock);
+
+	return count;
+}
+
+static ssize_t show_update_interval(struct device *dev,
+				    struct device_attribute *attr, char *buf)
+{
+	struct tmp401_data *data = dev_get_drvdata(dev);
+
+	return sprintf(buf, "%u\n", data->update_interval);
+}
+
+static ssize_t set_update_interval(struct device *dev,
+				   struct device_attribute *attr,
+				   const char *buf, size_t count)
+{
+	struct tmp401_data *data = dev_get_drvdata(dev);
+	struct i2c_client *client = data->client;
+	unsigned long val;
+	int err, rate;
+
+	err = kstrtoul(buf, 10, &val);
+	if (err)
+		return err;
+
+	/*
+	 * For valid rates, interval can be calculated as
+	 *	interval = (1 << (7 - rate)) * 125;
+	 * Rounded rate is therefore
+	 *	rate = 7 - __fls(interval * 4 / (125 * 3));
+	 * Use clamp_val() to avoid overflows, and to ensure valid input
+	 * for __fls.
+	 */
+	val = clamp_val(val, 125, 16000);
+	rate = 7 - __fls(val * 4 / (125 * 3));
+	mutex_lock(&data->update_lock);
+	i2c_smbus_write_byte_data(client, TMP401_CONVERSION_RATE_WRITE, rate);
+	data->update_interval = (1 << (7 - rate)) * 125;
+	mutex_unlock(&data->update_lock);
+
+	return count;
+}
+
+/*
+ * Enable/disable the state of the timeout function
+ * @dev: device info
+ * @state: 1:enable 0:disable
+ */
+static int timeout_cfg(struct device *dev, int state)
+{
+    int rv, chip_type;
+    u8 reg_value;
+    struct tmp401_data *data;
+    struct i2c_client *client;
+
+    data = dev_get_drvdata(dev);
+    client = data->client;
+
+    /* get chip type */
+    chip_type = data->kind;
+    dev_dbg(&client->dev, "set timeout. chip:%d, state:%d\n", chip_type, state);
+
+    /* chip type check */
+    if(chip_type != tmp401 && chip_type != tmp411)  {
+        dev_info(&client->dev,
+            "Chip type: %d, not support timeout config.!\n", chip_type);
+        return -EPERM;
+    }
+
+    /* parameter check */
+    if(state != TIMEOUT_STATE_EN && state != TIMEOUT_STATE_IEN) {
+        dev_err(&client->dev,
+            "Parameter check error. state: %d not supported.!\n", state);
+        return -EINVAL;
+    }
+
+    mutex_lock(&data->update_lock);
+    /* read the Consecutive alert register */
+    reg_value = i2c_smbus_read_byte_data(client, TMP401_DEVICE_CAR_REG);
+    if (reg_value < 0) {
+        dev_err(&client->dev, "Failed to read. reg:0x%0x, value:%d\n", TMP401_DEVICE_CAR_REG, reg_value);
+        mutex_unlock(&data->update_lock);
+        return -EIO;
+    }
+    dev_dbg(&client->dev, "get register value. reg:0x%0x, value:0x%0x\n", TMP401_DEVICE_CAR_REG, reg_value);
+
+    /* same value case, do not write */
+    if((u8)state == (reg_value >> TIMEOUT_STATE_BIT)) {
+        mutex_unlock(&data->update_lock);
+        dev_info(&client->dev, "timeout config has been set and the current state is %d.\n", state);
+        return 0;
+    }
+
+    /* calculate the register value */
+    reg_value = (reg_value & ~(1 << TIMEOUT_STATE_BIT)) | (state << TIMEOUT_STATE_BIT);
+
+    /* set the Consecutive alert register */
+    dev_dbg(&client->dev, "set register value. reg:0x%0x, value:0x%0x\n", TMP401_DEVICE_CAR_REG, reg_value);
+    rv = i2c_smbus_write_byte_data(client, TMP401_DEVICE_CAR_REG, reg_value);
+    if (rv < 0) {
+        dev_err(&client->dev,
+            "set the register Error. reg:0x%0x, value:%d\n", TMP401_DEVICE_CAR_REG, reg_value);
+        mutex_unlock(&data->update_lock);
+        return -EIO;
+    }
+    mutex_unlock(&data->update_lock);
+
+    dev_info(&client->dev, "set bus timeout success. reg:0x%0x, value:0x%0x\n", TMP401_DEVICE_CAR_REG, reg_value);
+
+    return 0;
+}
+
+static ssize_t set_timeout_en(struct device *dev,
+                   struct device_attribute *attr,
+                   const char *buf, size_t count)
+{
+    int val, err;
+    struct i2c_client *client;
+    struct tmp401_data *data;
+
+    data = dev_get_drvdata(dev);
+    client = data->client;
+
+    err = kstrtoint(buf, 0, &val);
+    if (err) {
+        dev_err(&client->dev,
+            "kstrtoint error: %d.\n", err);
+        return err;
+    }
+
+    err = timeout_cfg(dev, val);
+    if(err < 0) {
+        dev_err(&client->dev,
+            "set bus timeout error: %d. value:%d!\n", err, val);
+        return err;
+    }
+
+    return count;
+}
+
+static ssize_t show_timeout_en(struct device *dev,
+    struct device_attribute *devattr, char *buf)
+{
+    int chip_type;
+    u8 reg_value;
+    struct tmp401_data *data;
+    struct i2c_client *client;
+
+    data = dev_get_drvdata(dev);
+    client = data->client;
+
+    /* get chip type */
+    chip_type = data->kind;
+    dev_dbg(&client->dev, "get timeout. chip:%d\n", chip_type);
+
+    /* chip type check */
+    if(chip_type != tmp401 && chip_type != tmp411)  {
+        dev_info(&client->dev,
+            "Chip type: %d, not support timeout config.!\n", chip_type);
+        /* not support, return NA */
+        return (ssize_t)snprintf(buf, PAGE_SIZE, "%s\n", TIMEOUT_STATE_NA);
+    }
+
+    /* read the Consecutive alert register */
+    reg_value = i2c_smbus_read_byte_data(client, TMP401_DEVICE_CAR_REG);
+    if (reg_value < 0) {
+        dev_err(&client->dev, "Failed to read. reg:0x%0x, value:%d\n", TMP401_DEVICE_CAR_REG, reg_value);
+        return -EIO;
+    }
+    dev_dbg(&client->dev, "get register value. reg:0x%0x, value:0x%0x\n", TMP401_DEVICE_CAR_REG, reg_value);
+
+    /* decode the register value */
+    reg_value = reg_value >> TIMEOUT_STATE_BIT;
+
+    return (ssize_t)snprintf(buf, PAGE_SIZE, "%d\n", reg_value);
+}
+
+static SENSOR_DEVICE_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0);
+static SENSOR_DEVICE_ATTR_2(temp1_min, S_IWUSR | S_IRUGO, show_temp,
+			    store_temp, 1, 0);
+static SENSOR_DEVICE_ATTR_2(temp1_max, S_IWUSR | S_IRUGO, show_temp,
+			    store_temp, 2, 0);
+static SENSOR_DEVICE_ATTR_2(temp1_crit, S_IWUSR | S_IRUGO, show_temp,
+			    store_temp, 3, 0);
+static SENSOR_DEVICE_ATTR(temp1_crit_hyst, S_IWUSR | S_IRUGO,
+			  show_temp_crit_hyst, store_temp_crit_hyst, 0);
+static SENSOR_DEVICE_ATTR_2(temp1_min_alarm, S_IRUGO, show_status, NULL,
+			    1, TMP432_STATUS_LOCAL);
+static SENSOR_DEVICE_ATTR_2(temp1_max_alarm, S_IRUGO, show_status, NULL,
+			    2, TMP432_STATUS_LOCAL);
+static SENSOR_DEVICE_ATTR_2(temp1_crit_alarm, S_IRUGO, show_status, NULL,
+			    3, TMP432_STATUS_LOCAL);
+static SENSOR_DEVICE_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 0, 1);
+static SENSOR_DEVICE_ATTR_2(temp2_min, S_IWUSR | S_IRUGO, show_temp,
+			    store_temp, 1, 1);
+static SENSOR_DEVICE_ATTR_2(temp2_max, S_IWUSR | S_IRUGO, show_temp,
+			    store_temp, 2, 1);
+static SENSOR_DEVICE_ATTR_2(temp2_crit, S_IWUSR | S_IRUGO, show_temp,
+			    store_temp, 3, 1);
+static SENSOR_DEVICE_ATTR(temp2_crit_hyst, S_IRUGO, show_temp_crit_hyst,
+			  NULL, 1);
+static SENSOR_DEVICE_ATTR_2(temp2_fault, S_IRUGO, show_status, NULL,
+			    0, TMP432_STATUS_REMOTE1);
+static SENSOR_DEVICE_ATTR_2(temp2_min_alarm, S_IRUGO, show_status, NULL,
+			    1, TMP432_STATUS_REMOTE1);
+static SENSOR_DEVICE_ATTR_2(temp2_max_alarm, S_IRUGO, show_status, NULL,
+			    2, TMP432_STATUS_REMOTE1);
+static SENSOR_DEVICE_ATTR_2(temp2_crit_alarm, S_IRUGO, show_status, NULL,
+			    3, TMP432_STATUS_REMOTE1);
+
+static DEVICE_ATTR(update_interval, S_IRUGO | S_IWUSR, show_update_interval,
+		   set_update_interval);
+static DEVICE_ATTR(timeout_en, S_IRUGO | S_IWUSR, show_timeout_en, set_timeout_en);
+
+static struct attribute *tmp401_attributes[] = {
+	&sensor_dev_attr_temp1_input.dev_attr.attr,
+	&sensor_dev_attr_temp1_min.dev_attr.attr,
+	&sensor_dev_attr_temp1_max.dev_attr.attr,
+	&sensor_dev_attr_temp1_crit.dev_attr.attr,
+	&sensor_dev_attr_temp1_crit_hyst.dev_attr.attr,
+	&sensor_dev_attr_temp1_max_alarm.dev_attr.attr,
+	&sensor_dev_attr_temp1_min_alarm.dev_attr.attr,
+	&sensor_dev_attr_temp1_crit_alarm.dev_attr.attr,
+
+	&sensor_dev_attr_temp2_input.dev_attr.attr,
+	&sensor_dev_attr_temp2_min.dev_attr.attr,
+	&sensor_dev_attr_temp2_max.dev_attr.attr,
+	&sensor_dev_attr_temp2_crit.dev_attr.attr,
+	&sensor_dev_attr_temp2_crit_hyst.dev_attr.attr,
+	&sensor_dev_attr_temp2_fault.dev_attr.attr,
+	&sensor_dev_attr_temp2_max_alarm.dev_attr.attr,
+	&sensor_dev_attr_temp2_min_alarm.dev_attr.attr,
+	&sensor_dev_attr_temp2_crit_alarm.dev_attr.attr,
+
+	&dev_attr_update_interval.attr,
+	&dev_attr_timeout_en.attr,
+
+	NULL
+};
+
+static const struct attribute_group tmp401_group = {
+	.attrs = tmp401_attributes,
+};
+
+/*
+ * Additional features of the TMP411 chip.
+ * The TMP411 stores the minimum and maximum
+ * temperature measured since power-on, chip-reset, or
+ * minimum and maximum register reset for both the local
+ * and remote channels.
+ */
+static SENSOR_DEVICE_ATTR_2(temp1_lowest, S_IRUGO, show_temp, NULL, 4, 0);
+static SENSOR_DEVICE_ATTR_2(temp1_highest, S_IRUGO, show_temp, NULL, 5, 0);
+static SENSOR_DEVICE_ATTR_2(temp2_lowest, S_IRUGO, show_temp, NULL, 4, 1);
+static SENSOR_DEVICE_ATTR_2(temp2_highest, S_IRUGO, show_temp, NULL, 5, 1);
+static SENSOR_DEVICE_ATTR(temp_reset_history, S_IWUSR, NULL, reset_temp_history,
+			  0);
+
+static struct attribute *tmp411_attributes[] = {
+	&sensor_dev_attr_temp1_highest.dev_attr.attr,
+	&sensor_dev_attr_temp1_lowest.dev_attr.attr,
+	&sensor_dev_attr_temp2_highest.dev_attr.attr,
+	&sensor_dev_attr_temp2_lowest.dev_attr.attr,
+	&sensor_dev_attr_temp_reset_history.dev_attr.attr,
+	NULL
+};
+
+static const struct attribute_group tmp411_group = {
+	.attrs = tmp411_attributes,
+};
+
+static SENSOR_DEVICE_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 0, 2);
+static SENSOR_DEVICE_ATTR_2(temp3_min, S_IWUSR | S_IRUGO, show_temp,
+			    store_temp, 1, 2);
+static SENSOR_DEVICE_ATTR_2(temp3_max, S_IWUSR | S_IRUGO, show_temp,
+			    store_temp, 2, 2);
+static SENSOR_DEVICE_ATTR_2(temp3_crit, S_IWUSR | S_IRUGO, show_temp,
+			    store_temp, 3, 2);
+static SENSOR_DEVICE_ATTR(temp3_crit_hyst, S_IRUGO, show_temp_crit_hyst,
+			  NULL, 2);
+static SENSOR_DEVICE_ATTR_2(temp3_fault, S_IRUGO, show_status, NULL,
+			    0, TMP432_STATUS_REMOTE2);
+static SENSOR_DEVICE_ATTR_2(temp3_min_alarm, S_IRUGO, show_status, NULL,
+			    1, TMP432_STATUS_REMOTE2);
+static SENSOR_DEVICE_ATTR_2(temp3_max_alarm, S_IRUGO, show_status, NULL,
+			    2, TMP432_STATUS_REMOTE2);
+static SENSOR_DEVICE_ATTR_2(temp3_crit_alarm, S_IRUGO, show_status, NULL,
+			    3, TMP432_STATUS_REMOTE2);
+
+static struct attribute *tmp432_attributes[] = {
+	&sensor_dev_attr_temp3_input.dev_attr.attr,
+	&sensor_dev_attr_temp3_min.dev_attr.attr,
+	&sensor_dev_attr_temp3_max.dev_attr.attr,
+	&sensor_dev_attr_temp3_crit.dev_attr.attr,
+	&sensor_dev_attr_temp3_crit_hyst.dev_attr.attr,
+	&sensor_dev_attr_temp3_fault.dev_attr.attr,
+	&sensor_dev_attr_temp3_max_alarm.dev_attr.attr,
+	&sensor_dev_attr_temp3_min_alarm.dev_attr.attr,
+	&sensor_dev_attr_temp3_crit_alarm.dev_attr.attr,
+
+	NULL
+};
+
+static const struct attribute_group tmp432_group = {
+	.attrs = tmp432_attributes,
+};
+
+/*
+ * Additional features of the TMP461 chip.
+ * The TMP461 temperature offset for the remote channel.
+ */
+static SENSOR_DEVICE_ATTR_2(temp2_offset, S_IWUSR | S_IRUGO, show_temp,
+			    store_temp, 6, 1);
+
+static struct attribute *tmp461_attributes[] = {
+	&sensor_dev_attr_temp2_offset.dev_attr.attr,
+	NULL
+};
+
+static const struct attribute_group tmp461_group = {
+	.attrs = tmp461_attributes,
+};
+
+/*
+ * Begin non sysfs callback code (aka Real code)
+ */
+
+static int tmp401_init_client(struct tmp401_data *data,
+			      struct i2c_client *client)
+{
+	int config, config_orig, status = 0;
+
+	/* Set the conversion rate to 2 Hz */
+	i2c_smbus_write_byte_data(client, TMP401_CONVERSION_RATE_WRITE, 5);
+	data->update_interval = 500;
+
+	/* Start conversions (disable shutdown if necessary) */
+	config = i2c_smbus_read_byte_data(client, TMP401_CONFIG_READ);
+	if (config < 0)
+		return config;
+
+	config_orig = config;
+	config &= ~TMP401_CONFIG_SHUTDOWN;
+
+	if (config != config_orig)
+		status = i2c_smbus_write_byte_data(client,
+						   TMP401_CONFIG_WRITE,
+						   config);
+
+	return status;
+}
+
+#if 0
+static int tmp401_detect(struct i2c_client *client,
+			 struct i2c_board_info *info)
+{
+	enum chips kind;
+	struct i2c_adapter *adapter = client->adapter;
+	u8 reg;
+
+	if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
+		return -ENODEV;
+
+	/* Detect and identify the chip */
+	reg = i2c_smbus_read_byte_data(client, TMP401_MANUFACTURER_ID_REG);
+	if (reg != TMP401_MANUFACTURER_ID)
+		return -ENODEV;
+
+	reg = i2c_smbus_read_byte_data(client, TMP401_DEVICE_ID_REG);
+
+	switch (reg) {
+	case TMP401_DEVICE_ID:
+		if (client->addr != 0x4c)
+			return -ENODEV;
+		kind = tmp401;
+		break;
+	case TMP411A_DEVICE_ID:
+		if (client->addr != 0x4c)
+			return -ENODEV;
+		kind = tmp411;
+		break;
+	case TMP411B_DEVICE_ID:
+		if (client->addr != 0x4d)
+			return -ENODEV;
+		kind = tmp411;
+		break;
+	case TMP411C_DEVICE_ID:
+		if (client->addr != 0x4e)
+			return -ENODEV;
+		kind = tmp411;
+		break;
+	case TMP431_DEVICE_ID:
+		if (client->addr != 0x4c && client->addr != 0x4d)
+			return -ENODEV;
+		kind = tmp431;
+		break;
+	case TMP432_DEVICE_ID:
+		if (client->addr != 0x4c && client->addr != 0x4d)
+			return -ENODEV;
+		kind = tmp432;
+		break;
+	case TMP435_DEVICE_ID:
+		kind = tmp435;
+		break;
+	default:
+		return -ENODEV;
+	}
+
+	reg = i2c_smbus_read_byte_data(client, TMP401_CONFIG_READ);
+	if (reg & 0x1b)
+		return -ENODEV;
+
+	reg = i2c_smbus_read_byte_data(client, TMP401_CONVERSION_RATE_READ);
+	/* Datasheet says: 0x1-0x6 */
+	if (reg > 15)
+		return -ENODEV;
+
+	strlcpy(info->type, tmp401_id[kind].name, I2C_NAME_SIZE);
+
+	return 0;
+}
+#endif
+
+static int tmp401_probe(struct i2c_client *client,
+			const struct i2c_device_id *id)
+{
+	static const char * const names[] = {
+		"TMP401", "TMP411", "TMP431", "TMP432", "TMP435", "TMP461"
+	};
+	struct device *dev = &client->dev;
+	struct device *hwmon_dev;
+	struct tmp401_data *data;
+	int groups = 0, status;
+
+	data = devm_kzalloc(dev, sizeof(struct tmp401_data), GFP_KERNEL);
+	if (!data)
+		return -ENOMEM;
+
+	data->client = client;
+	mutex_init(&data->update_lock);
+	data->kind = id->driver_data;
+
+	/* Initialize the TMP401 chip */
+	status = tmp401_init_client(data, client);
+	if (status < 0)
+		return status;
+
+	/* Register sysfs hooks */
+	data->groups[groups++] = &tmp401_group;
+
+	/* Register additional tmp411 sysfs hooks */
+	if (data->kind == tmp411)
+		data->groups[groups++] = &tmp411_group;
+
+	/* Register additional tmp432 sysfs hooks */
+	if (data->kind == tmp432)
+		data->groups[groups++] = &tmp432_group;
+
+	if (data->kind == tmp461)
+		data->groups[groups++] = &tmp461_group;
+
+	hwmon_dev = devm_hwmon_device_register_with_groups(dev, client->name,
+							   data, data->groups);
+	if (IS_ERR(hwmon_dev))
+		return PTR_ERR(hwmon_dev);
+
+    /* disable the timeout function */
+    status = timeout_cfg(hwmon_dev, TIMEOUT_STATE_IEN);
+    if((status < 0) && (status != -EPERM)) {
+        dev_err(dev,
+            "set bus timeout error when probing: %d.!\n", status);
+        /* here, no need call devm_hwmon_device_unregister, device managed. */
+        return status;
+    }
+
+	dev_info(dev, "Detected TI %s chip\n", names[data->kind]);
+
+	return 0;
+}
+
+static struct i2c_driver tmp401_driver = {
+	.class		= I2C_CLASS_HWMON,
+	.driver = {
+		.name	= "wb_tmp401",
+	},
+	.probe		= tmp401_probe,
+	.id_table	= tmp401_id,
+	/* .detect		= tmp401_detect, */
+	/* .address_list	= normal_i2c, */
+};
+
+module_i2c_driver(tmp401_driver);
+
+MODULE_AUTHOR("support");
+MODULE_DESCRIPTION("Texas Instruments TMP401 temperature sensor driver");
+MODULE_LICENSE("GPL");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_tps53622.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_tps53622.c
new file mode 100644
index 000000000..b68196d9f
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_tps53622.c
@@ -0,0 +1,265 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Hardware monitoring driver for Texas Instruments TPS53679
+ *
+ * Copyright (c) 2017 Mellanox Technologies. All rights reserved.
+ * Copyright (c) 2017 Vadim Pasternak <vadimp@mellanox.com>
+ */
+
+#include <linux/bits.h>
+#include <linux/err.h>
+#include <linux/i2c.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/of_device.h>
+#include "wb_pmbus.h"
+
+enum chips {
+    tps53647, tps53667, tps53679, tps53681, tps53688, tps53622
+};
+
+#define TPS53647_PAGE_NUM             1
+
+#define TPS53679_PROT_VR12_5MV        0x01 /* VR12.0 mode, 5-mV DAC */
+#define TPS53679_PROT_VR12_5_10MV     0x02 /* VR12.5 mode, 10-mV DAC */
+#define TPS53679_PROT_VR13_10MV       0x04 /* VR13.0 mode, 10-mV DAC */
+#define TPS53679_PROT_IMVP8_5MV       0x05 /* IMVP8 mode, 5-mV DAC */
+#define TPS53679_PROT_VR13_5MV        0x07 /* VR13.0 mode, 5-mV DAC */
+#define TPS53679_PAGE_NUM             2
+
+#define TPS53681_DEVICE_ID            0x81
+
+#define TPS53681_PMBUS_REVISION       0x33
+
+#define TPS53681_MFR_SPECIFIC_20      0xe4    /* Number of phases, per page */
+
+static const struct i2c_device_id tps53679_id[];
+
+static int tps53679_identify_mode(struct i2c_client *client,
+                  struct pmbus_driver_info *info)
+{
+    u8 vout_params;
+    int i, ret;
+
+    for (i = 0; i < info->pages; i++) {
+        /* Read the register with VOUT scaling value.*/
+        ret = wb_pmbus_read_byte_data(client, i, PMBUS_VOUT_MODE);
+        if (ret < 0)
+            return ret;
+
+        vout_params = ret & GENMASK(4, 0);
+
+        switch (vout_params) {
+        case TPS53679_PROT_VR13_10MV:
+        case TPS53679_PROT_VR12_5_10MV:
+            info->vrm_version[i] = vr13;
+            break;
+        case TPS53679_PROT_VR13_5MV:
+        case TPS53679_PROT_VR12_5MV:
+        case TPS53679_PROT_IMVP8_5MV:
+            info->vrm_version[i] = vr12;
+            break;
+        default:
+            return -EINVAL;
+        }
+    }
+
+    return 0;
+}
+
+static int tps53679_identify_phases(struct i2c_client *client,
+                    struct pmbus_driver_info *info)
+{
+    int ret;
+
+    /* On TPS53681, only channel A provides per-phase output current */
+    ret = wb_pmbus_read_byte_data(client, 0, TPS53681_MFR_SPECIFIC_20);
+    if (ret < 0)
+        return ret;
+    info->phases[0] = (ret & 0x07) + 1;
+
+    return 0;
+}
+
+static int tps53679_identify_chip(struct i2c_client *client,
+                  u8 revision, u16 id)
+{
+    u8 buf[I2C_SMBUS_BLOCK_MAX];
+    int ret;
+
+    ret = wb_pmbus_read_byte_data(client, 0, PMBUS_REVISION);
+    if (ret < 0)
+        return ret;
+    if (ret != revision) {
+        dev_err(&client->dev, "Unexpected PMBus revision 0x%x\n", ret);
+        return -ENODEV;
+    }
+
+    ret = i2c_smbus_read_block_data(client, PMBUS_IC_DEVICE_ID, buf);
+    if (ret < 0)
+        return ret;
+    if (ret != 1 || buf[0] != id) {
+        dev_err(&client->dev, "Unexpected device ID 0x%x\n", buf[0]);
+        return -ENODEV;
+    }
+    return 0;
+}
+
+/*
+ * Common identification function for chips with multi-phase support.
+ * Since those chips have special configuration registers, we want to have
+ * some level of reassurance that we are really talking with the chip
+ * being probed. Check PMBus revision and chip ID.
+ */
+static int tps53679_identify_multiphase(struct i2c_client *client,
+                    struct pmbus_driver_info *info,
+                    int pmbus_rev, int device_id)
+{
+    int ret;
+
+    ret = tps53679_identify_chip(client, pmbus_rev, device_id);
+    if (ret < 0)
+        return ret;
+
+    ret = tps53679_identify_mode(client, info);
+    if (ret < 0)
+        return ret;
+
+    return tps53679_identify_phases(client, info);
+}
+
+static int tps53679_identify(struct i2c_client *client,
+                 struct pmbus_driver_info *info)
+{
+    return tps53679_identify_mode(client, info);
+}
+
+static int tps53681_identify(struct i2c_client *client,
+                 struct pmbus_driver_info *info)
+{
+    return tps53679_identify_multiphase(client, info,
+                        TPS53681_PMBUS_REVISION,
+                        TPS53681_DEVICE_ID);
+}
+
+static int tps53681_read_word_data(struct i2c_client *client, int page,
+                   int phase, int reg)
+{
+    /*
+     * For reading the total output current (READ_IOUT) for all phases,
+     * the chip datasheet is a bit vague. It says "PHASE must be set to
+     * FFh to access all phases simultaneously. PHASE may also be set to
+     * 80h readack (!) the total phase current".
+     * Experiments show that the command does _not_ report the total
+     * current for all phases if the phase is set to 0xff. Instead, it
+     * appears to report the current of one of the phases. Override phase
+     * parameter with 0x80 when reading the total output current on page 0.
+     */
+    if (reg == PMBUS_READ_IOUT && page == 0 && phase == 0xff)
+        return wb_pmbus_read_word_data(client, page, 0x80, reg);
+    return -ENODATA;
+}
+
+static struct pmbus_driver_info tps53679_info = {
+    .format[PSC_VOLTAGE_IN] = linear,
+    .format[PSC_VOLTAGE_OUT] = vid,
+    .format[PSC_TEMPERATURE] = linear,
+    .format[PSC_CURRENT_OUT] = linear,
+    .format[PSC_POWER] = linear,
+    .func[0] = PMBUS_HAVE_VIN | PMBUS_HAVE_IIN | PMBUS_HAVE_PIN |
+        PMBUS_HAVE_STATUS_INPUT |
+        PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT |
+        PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT |
+        PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP |
+        PMBUS_HAVE_POUT,
+    .func[1] = PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT |
+        PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT |
+        PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP |
+        PMBUS_HAVE_POUT,
+    .pfunc[0] = PMBUS_HAVE_IOUT,
+    .pfunc[1] = PMBUS_HAVE_IOUT,
+    .pfunc[2] = PMBUS_HAVE_IOUT,
+    .pfunc[3] = PMBUS_HAVE_IOUT,
+    .pfunc[4] = PMBUS_HAVE_IOUT,
+    .pfunc[5] = PMBUS_HAVE_IOUT,
+};
+
+static int tps53679_probe(struct i2c_client *client)
+{
+    struct device *dev = &client->dev;
+    struct pmbus_driver_info *info;
+    enum chips chip_id;
+
+    if (dev->of_node)
+        chip_id = (enum chips)of_device_get_match_data(dev);
+    else
+        chip_id = i2c_match_id(tps53679_id, client)->driver_data;
+
+    info = devm_kmemdup(dev, &tps53679_info, sizeof(*info), GFP_KERNEL);
+    if (!info)
+        return -ENOMEM;
+
+    switch (chip_id) {
+    case tps53647:
+    case tps53667:
+        info->pages = TPS53647_PAGE_NUM;
+        info->identify = tps53679_identify;
+        break;
+    case tps53679:
+    case tps53688:
+	case tps53622:
+        info->pages = TPS53679_PAGE_NUM;
+        info->identify = tps53679_identify;
+        break;
+    case tps53681:
+        info->pages = TPS53679_PAGE_NUM;
+        info->phases[0] = 6;
+        info->identify = tps53681_identify;
+        info->read_word_data = tps53681_read_word_data;
+        break;
+    default:
+        return -ENODEV;
+    }
+
+    return wb_pmbus_do_probe(client, info);
+}
+
+static const struct i2c_device_id tps53679_id[] = {
+    {"wb_tps53647", tps53647},
+    {"wb_tps53667", tps53667},
+    {"wb_tps53679", tps53679},
+    {"wb_tps53681", tps53681},
+    {"wb_tps53688", tps53688},
+    {"wb_tps53622", tps53622},
+    {}
+};
+
+MODULE_DEVICE_TABLE(i2c, tps53679_id);
+
+static const struct of_device_id __maybe_unused tps53679_of_match[] = {
+    {.compatible = "ti,wb_tps53647", .data = (void *)tps53647},
+    {.compatible = "ti,wb_tps53667", .data = (void *)tps53667},
+    {.compatible = "ti,wb_tps53679", .data = (void *)tps53679},
+    {.compatible = "ti,wb_tps53681", .data = (void *)tps53681},
+    {.compatible = "ti,wb_tps53688", .data = (void *)tps53688},
+    {.compatible = "ti,wb_tps53622", .data = (void *)tps53622},
+    {}
+};
+MODULE_DEVICE_TABLE(of, tps53679_of_match);
+
+static struct i2c_driver tps53679_driver = {
+    .driver = {
+        .name = "wb_tps53622",
+        .of_match_table = of_match_ptr(tps53679_of_match),
+    },
+    .probe_new = tps53679_probe,
+    .remove = wb_pmbus_do_remove,
+    .id_table = tps53679_id,
+};
+
+module_i2c_driver(tps53679_driver);
+
+MODULE_AUTHOR("support");
+MODULE_DESCRIPTION("PMBus driver for Texas Instruments TPS53679");
+MODULE_LICENSE("GPL");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_ucd9000.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_ucd9000.c
new file mode 100644
index 000000000..6d60b9d87
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_ucd9000.c
@@ -0,0 +1,720 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Hardware monitoring driver for UCD90xxx Sequencer and System Health
+ * Controller series
+ *
+ * Copyright (C) 2011 Ericsson AB.
+ */
+
+#include <linux/debugfs.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/of_device.h>
+#include <linux/init.h>
+#include <linux/err.h>
+#include <linux/slab.h>
+#include <linux/i2c.h>
+#include <linux/pmbus.h>
+#include <linux/gpio/driver.h>
+#include <linux/delay.h>
+#include "wb_pmbus.h"
+
+#define mem_clear(data, size) memset((data), 0, (size))
+
+enum chips { ucd9000, ucd90120, ucd90124, ucd90160, ucd90320, ucd9090,
+         ucd90910 };
+
+#define UCD9000_MONITOR_CONFIG      0xd5
+#define UCD9000_NUM_PAGES           0xd6
+#define UCD9000_FAN_CONFIG_INDEX    0xe7
+#define UCD9000_FAN_CONFIG          0xe8
+#define UCD9000_MFR_STATUS          0xf3
+#define UCD9000_GPIO_SELECT         0xfa
+#define UCD9000_GPIO_CONFIG         0xfb
+#define UCD9000_DEVICE_ID           0xfd
+
+/* GPIO CONFIG bits */
+#define UCD9000_GPIO_CONFIG_ENABLE        BIT(0)
+#define UCD9000_GPIO_CONFIG_OUT_ENABLE    BIT(1)
+#define UCD9000_GPIO_CONFIG_OUT_VALUE     BIT(2)
+#define UCD9000_GPIO_CONFIG_STATUS        BIT(3)
+#define UCD9000_GPIO_INPUT        0
+#define UCD9000_GPIO_OUTPUT       1
+
+#define UCD9000_MON_TYPE(x)       (((x) >> 5) & 0x07)
+#define UCD9000_MON_PAGE(x)       ((x) & 0x1f)
+
+#define UCD9000_MON_VOLTAGE       1
+#define UCD9000_MON_TEMPERATURE   2
+#define UCD9000_MON_CURRENT       3
+#define UCD9000_MON_VOLTAGE_HW    4
+
+#define UCD9000_NUM_FAN           4
+
+#define UCD9000_GPIO_NAME_LEN     16
+#define UCD9090_NUM_GPIOS         23
+#define UCD901XX_NUM_GPIOS        26
+#define UCD90320_NUM_GPIOS        84
+#define UCD90910_NUM_GPIOS        26
+
+#define UCD9000_DEBUGFS_NAME_LEN  24
+#define UCD9000_GPI_COUNT         8
+#define UCD90320_GPI_COUNT        32
+
+#define UCD9000_RETRY_SLEEP_TIME          (10000)   /* 10ms */
+#define UCD9000_RETRY_TIME                (3)
+#define WB_DEV_NAME_MAX_LEN               (64)
+
+static int g_wb_ucd9000_debug = 0;
+static int g_wb_ucd9000_error = 0;
+
+module_param(g_wb_ucd9000_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_ucd9000_error, int, S_IRUGO | S_IWUSR);
+
+#define WB_UDC9000_VERBOSE(fmt, args...) do {                                        \
+    if (g_wb_ucd9000_debug) { \
+        printk(KERN_INFO "[WB_UCD9000][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define WB_UDC9000_ERROR(fmt, args...) do {                                        \
+    if (g_wb_ucd9000_error) { \
+        printk(KERN_ERR "[WB_UCD9000][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+struct ucd9000_data {
+    u8 fan_data[UCD9000_NUM_FAN][I2C_SMBUS_BLOCK_MAX];
+    struct pmbus_driver_info info;
+#ifdef CONFIG_GPIOLIB
+    struct gpio_chip gpio;
+#endif
+    struct dentry *debugfs;
+};
+#define to_ucd9000_data(_info) container_of(_info, struct ucd9000_data, info)
+
+struct ucd9000_debugfs_entry {
+    struct i2c_client *client;
+    u8 index;
+};
+
+static int wb_i2c_smbus_read_block_data_tmp(const struct i2c_client *client, u8 command, u8 *values)
+{
+
+    struct i2c_msg msg[2];
+    int status;
+    u8 read_buf[I2C_SMBUS_BLOCK_MAX + 1];
+    int read_len, val_len;
+
+    val_len = i2c_smbus_read_byte_data(client, command);
+    if (val_len < 0) {
+        WB_UDC9000_ERROR("read byte failed. nr:%d, addr:0x%x, reg:0x%x, ret:%d.\n",
+            client->adapter->nr, client->addr, command, val_len);
+        return -ENXIO;
+    }
+    read_len = val_len + 1;
+    if (read_len > sizeof(read_buf)) {
+        WB_UDC9000_ERROR("Out of memory, val_len: %d, read length: %d, read buf len: %lu.\n",
+            val_len, read_len, sizeof(read_buf));
+        return -ENOMEM;
+    }
+
+    mem_clear(msg, sizeof(msg));
+    msg[0].addr = client->addr;
+    msg[0].buf = &command;
+    msg[0].len = 1;
+
+    msg[1].addr = client->addr;
+    msg[1].flags = I2C_M_RD;
+    msg[1].buf = read_buf;
+    msg[1].len = read_len;
+
+    status = i2c_transfer(client->adapter, msg, 2);
+    if (status != 2) {
+        WB_UDC9000_ERROR("i2c_transfer failed. nr:%d, addr:0x%x, reg:0x%x, read len:%d, status:%d.\n",
+            client->adapter->nr, client->addr, command, read_len, status);
+        return -EIO;
+    }
+    WB_UDC9000_VERBOSE("read_block_data success. nr:%d, addr:0x%x, reg:0x%x, read len:%d",
+        client->adapter->nr, client->addr, command, read_len);
+    memcpy(values, &read_buf[1], val_len);
+    return val_len;
+}
+
+static int wb_i2c_smbus_read_block_data(const struct i2c_client *client, u8 command, u8 *values)
+{
+    int rv, i;
+
+    for(i = 0; i < UCD9000_RETRY_TIME; i++) {
+        rv = wb_i2c_smbus_read_block_data_tmp(client, command, values);
+        if(rv >= 0){
+            return rv;
+        }
+        usleep_range(UCD9000_RETRY_SLEEP_TIME, UCD9000_RETRY_SLEEP_TIME + 1);
+    }
+    WB_UDC9000_ERROR("read_block_data failed. nr:  %d, addr: 0x%x, reg: 0x%x, rv: %d\n",
+        client->adapter->nr, client->addr, command, rv);
+    return rv;
+}
+
+static int ucd9000_get_fan_config(struct i2c_client *client, int fan)
+{
+    int fan_config = 0;
+    struct ucd9000_data *data
+      = to_ucd9000_data(wb_pmbus_get_driver_info(client));
+
+    if (data->fan_data[fan][3] & 1)
+        fan_config |= PB_FAN_2_INSTALLED;   /* Use lower bit position */
+
+    /* Pulses/revolution */
+    fan_config |= (data->fan_data[fan][3] & 0x06) >> 1;
+
+    return fan_config;
+}
+
+static int ucd9000_read_byte_data(struct i2c_client *client, int page, int reg)
+{
+    int ret = 0;
+    int fan_config;
+
+    switch (reg) {
+    case PMBUS_FAN_CONFIG_12:
+        if (page > 0)
+            return -ENXIO;
+
+        ret = ucd9000_get_fan_config(client, 0);
+        if (ret < 0)
+            return ret;
+        fan_config = ret << 4;
+        ret = ucd9000_get_fan_config(client, 1);
+        if (ret < 0)
+            return ret;
+        fan_config |= ret;
+        ret = fan_config;
+        break;
+    case PMBUS_FAN_CONFIG_34:
+        if (page > 0)
+            return -ENXIO;
+
+        ret = ucd9000_get_fan_config(client, 2);
+        if (ret < 0)
+            return ret;
+        fan_config = ret << 4;
+        ret = ucd9000_get_fan_config(client, 3);
+        if (ret < 0)
+            return ret;
+        fan_config |= ret;
+        ret = fan_config;
+        break;
+    default:
+        ret = -ENODATA;
+        break;
+    }
+    return ret;
+}
+
+static const struct i2c_device_id ucd9000_id[] = {
+    {"wb_ucd9000", ucd9000},
+    {"wb_ucd90120", ucd90120},
+    {"wb_ucd90124", ucd90124},
+    {"wb_ucd90160", ucd90160},
+    {"wb_ucd90320", ucd90320},
+    {"wb_ucd9090", ucd9090},
+    {"wb_ucd90910", ucd90910},
+    {}
+};
+MODULE_DEVICE_TABLE(i2c, ucd9000_id);
+
+static const struct of_device_id __maybe_unused ucd9000_of_match[] = {
+    {
+        .compatible = "ti,wb_ucd9000",
+        .data = (void *)ucd9000
+    },
+    {
+        .compatible = "ti,wb_ucd90120",
+        .data = (void *)ucd90120
+    },
+    {
+        .compatible = "ti,wb_ucd90124",
+        .data = (void *)ucd90124
+    },
+    {
+        .compatible = "ti,wb_ucd90160",
+        .data = (void *)ucd90160
+    },
+    {
+        .compatible = "ti,wb_ucd90320",
+        .data = (void *)ucd90320
+    },
+    {
+        .compatible = "ti,wb_ucd9090",
+        .data = (void *)ucd9090
+    },
+    {
+        .compatible = "ti,wb_ucd90910",
+        .data = (void *)ucd90910
+    },
+    { },
+};
+MODULE_DEVICE_TABLE(of, ucd9000_of_match);
+
+#ifdef CONFIG_GPIOLIB
+static int ucd9000_gpio_read_config(struct i2c_client *client,
+                    unsigned int offset)
+{
+    int ret;
+
+    /* No page set required */
+    ret = i2c_smbus_write_byte_data(client, UCD9000_GPIO_SELECT, offset);
+    if (ret < 0)
+        return ret;
+
+    return i2c_smbus_read_byte_data(client, UCD9000_GPIO_CONFIG);
+}
+
+static int ucd9000_gpio_get(struct gpio_chip *gc, unsigned int offset)
+{
+    struct i2c_client *client  = gpiochip_get_data(gc);
+    int ret;
+
+    ret = ucd9000_gpio_read_config(client, offset);
+    if (ret < 0)
+        return ret;
+
+    return !!(ret & UCD9000_GPIO_CONFIG_STATUS);
+}
+
+static void ucd9000_gpio_set(struct gpio_chip *gc, unsigned int offset,
+                 int value)
+{
+    struct i2c_client *client = gpiochip_get_data(gc);
+    int ret;
+
+    ret = ucd9000_gpio_read_config(client, offset);
+    if (ret < 0) {
+        dev_dbg(&client->dev, "failed to read GPIO %d config: %d\n",
+            offset, ret);
+        return;
+    }
+
+    if (value) {
+        if (ret & UCD9000_GPIO_CONFIG_STATUS)
+            return;
+
+        ret |= UCD9000_GPIO_CONFIG_STATUS;
+    } else {
+        if (!(ret & UCD9000_GPIO_CONFIG_STATUS))
+            return;
+
+        ret &= ~UCD9000_GPIO_CONFIG_STATUS;
+    }
+
+    ret |= UCD9000_GPIO_CONFIG_ENABLE;
+
+    /* Page set not required */
+    ret = i2c_smbus_write_byte_data(client, UCD9000_GPIO_CONFIG, ret);
+    if (ret < 0) {
+        dev_dbg(&client->dev, "Failed to write GPIO %d config: %d\n",
+            offset, ret);
+        return;
+    }
+
+    ret &= ~UCD9000_GPIO_CONFIG_ENABLE;
+
+    ret = i2c_smbus_write_byte_data(client, UCD9000_GPIO_CONFIG, ret);
+    if (ret < 0)
+        dev_dbg(&client->dev, "Failed to write GPIO %d config: %d\n",
+            offset, ret);
+}
+
+static int ucd9000_gpio_get_direction(struct gpio_chip *gc,
+                      unsigned int offset)
+{
+    struct i2c_client *client = gpiochip_get_data(gc);
+    int ret;
+
+    ret = ucd9000_gpio_read_config(client, offset);
+    if (ret < 0)
+        return ret;
+
+    return !(ret & UCD9000_GPIO_CONFIG_OUT_ENABLE);
+}
+
+static int ucd9000_gpio_set_direction(struct gpio_chip *gc,
+                      unsigned int offset, bool direction_out,
+                      int requested_out)
+{
+    struct i2c_client *client = gpiochip_get_data(gc);
+    int ret, config, out_val;
+
+    ret = ucd9000_gpio_read_config(client, offset);
+    if (ret < 0)
+        return ret;
+
+    if (direction_out) {
+        out_val = requested_out ? UCD9000_GPIO_CONFIG_OUT_VALUE : 0;
+
+        if (ret & UCD9000_GPIO_CONFIG_OUT_ENABLE) {
+            if ((ret & UCD9000_GPIO_CONFIG_OUT_VALUE) == out_val)
+                return 0;
+        } else {
+            ret |= UCD9000_GPIO_CONFIG_OUT_ENABLE;
+        }
+
+        if (out_val)
+            ret |= UCD9000_GPIO_CONFIG_OUT_VALUE;
+        else
+            ret &= ~UCD9000_GPIO_CONFIG_OUT_VALUE;
+
+    } else {
+        if (!(ret & UCD9000_GPIO_CONFIG_OUT_ENABLE))
+            return 0;
+
+        ret &= ~UCD9000_GPIO_CONFIG_OUT_ENABLE;
+    }
+
+    ret |= UCD9000_GPIO_CONFIG_ENABLE;
+    config = ret;
+
+    /* Page set not required */
+    ret = i2c_smbus_write_byte_data(client, UCD9000_GPIO_CONFIG, config);
+    if (ret < 0)
+        return ret;
+
+    config &= ~UCD9000_GPIO_CONFIG_ENABLE;
+
+    return i2c_smbus_write_byte_data(client, UCD9000_GPIO_CONFIG, config);
+}
+
+static int ucd9000_gpio_direction_input(struct gpio_chip *gc,
+                    unsigned int offset)
+{
+    return ucd9000_gpio_set_direction(gc, offset, UCD9000_GPIO_INPUT, 0);
+}
+
+static int ucd9000_gpio_direction_output(struct gpio_chip *gc,
+                     unsigned int offset, int val)
+{
+    return ucd9000_gpio_set_direction(gc, offset, UCD9000_GPIO_OUTPUT,
+                      val);
+}
+
+static void ucd9000_probe_gpio(struct i2c_client *client,
+                   const struct i2c_device_id *mid,
+                   struct ucd9000_data *data)
+{
+    int rc;
+
+    switch (mid->driver_data) {
+    case ucd9090:
+        data->gpio.ngpio = UCD9090_NUM_GPIOS;
+        break;
+    case ucd90120:
+    case ucd90124:
+    case ucd90160:
+        data->gpio.ngpio = UCD901XX_NUM_GPIOS;
+        break;
+    case ucd90320:
+        data->gpio.ngpio = UCD90320_NUM_GPIOS;
+        break;
+    case ucd90910:
+        data->gpio.ngpio = UCD90910_NUM_GPIOS;
+        break;
+    default:
+        return; /* GPIO support is optional. */
+    }
+
+    /*
+     * Pinmux support has not been added to the new gpio_chip.
+     * This support should be added when possible given the mux
+     * behavior of these IO devices.
+     */
+    data->gpio.label = client->name;
+    data->gpio.get_direction = ucd9000_gpio_get_direction;
+    data->gpio.direction_input = ucd9000_gpio_direction_input;
+    data->gpio.direction_output = ucd9000_gpio_direction_output;
+    data->gpio.get = ucd9000_gpio_get;
+    data->gpio.set = ucd9000_gpio_set;
+    data->gpio.can_sleep = true;
+    data->gpio.base = -1;
+    data->gpio.parent = &client->dev;
+
+    rc = devm_gpiochip_add_data(&client->dev, &data->gpio, client);
+    if (rc)
+        dev_warn(&client->dev, "Could not add gpiochip: %d\n", rc);
+}
+#else
+static void ucd9000_probe_gpio(struct i2c_client *client,
+                   const struct i2c_device_id *mid,
+                   struct ucd9000_data *data)
+{
+}
+#endif /* CONFIG_GPIOLIB */
+
+#ifdef CONFIG_DEBUG_FS
+static int ucd9000_get_mfr_status(struct i2c_client *client, u8 *buffer)
+{
+    int ret = wb_pmbus_set_page(client, 0, 0xff);
+
+    if (ret < 0)
+        return ret;
+
+    return wb_i2c_smbus_read_block_data(client, UCD9000_MFR_STATUS, buffer);
+}
+
+static int ucd9000_debugfs_show_mfr_status_bit(void *data, u64 *val)
+{
+    struct ucd9000_debugfs_entry *entry = data;
+    struct i2c_client *client = entry->client;
+    u8 buffer[I2C_SMBUS_BLOCK_MAX];
+    int ret, i;
+
+    ret = ucd9000_get_mfr_status(client, buffer);
+    if (ret < 0)
+        return ret;
+
+    /*
+     * GPI fault bits are in sets of 8, two bytes from end of response.
+     */
+    i = ret - 3 - entry->index / 8;
+    if (i >= 0)
+        *val = !!(buffer[i] & BIT(entry->index % 8));
+
+    return 0;
+}
+DEFINE_DEBUGFS_ATTRIBUTE(ucd9000_debugfs_mfr_status_bit,
+             ucd9000_debugfs_show_mfr_status_bit, NULL, "%1lld\n");
+
+static ssize_t ucd9000_debugfs_read_mfr_status(struct file *file,
+                           char __user *buf, size_t count,
+                           loff_t *ppos)
+{
+    struct i2c_client *client = file->private_data;
+    u8 buffer[I2C_SMBUS_BLOCK_MAX];
+    char str[(I2C_SMBUS_BLOCK_MAX * 2) + 2];
+    char *res;
+    int rc;
+
+    rc = ucd9000_get_mfr_status(client, buffer);
+    if (rc < 0)
+        return rc;
+
+    res = bin2hex(str, buffer, min(rc, I2C_SMBUS_BLOCK_MAX));
+    *res++ = '\n';
+    *res = 0;
+
+    return simple_read_from_buffer(buf, count, ppos, str, res - str);
+}
+
+static const struct file_operations ucd9000_debugfs_show_mfr_status_fops = {
+    .llseek = noop_llseek,
+    .read = ucd9000_debugfs_read_mfr_status,
+    .open = simple_open,
+};
+
+static int ucd9000_init_debugfs(struct i2c_client *client,
+                const struct i2c_device_id *mid,
+                struct ucd9000_data *data)
+{
+    struct dentry *debugfs;
+    struct ucd9000_debugfs_entry *entries;
+    int i, gpi_count;
+    char name[UCD9000_DEBUGFS_NAME_LEN];
+
+    debugfs = wb_pmbus_get_debugfs_dir(client);
+    if (!debugfs)
+        return -ENOENT;
+
+    data->debugfs = debugfs_create_dir(client->name, debugfs);
+    if (!data->debugfs)
+        return -ENOENT;
+
+    /*
+     * Of the chips this driver supports, only the UCD9090, UCD90160,
+     * UCD90320, and UCD90910 report GPI faults in their MFR_STATUS
+     * register, so only create the GPI fault debugfs attributes for those
+     * chips.
+     */
+    if (mid->driver_data == ucd9090 || mid->driver_data == ucd90160 ||
+        mid->driver_data == ucd90320 || mid->driver_data == ucd90910) {
+        gpi_count = mid->driver_data == ucd90320 ? UCD90320_GPI_COUNT
+                             : UCD9000_GPI_COUNT;
+        entries = devm_kcalloc(&client->dev,
+                       gpi_count, sizeof(*entries),
+                       GFP_KERNEL);
+        if (!entries)
+            return -ENOMEM;
+
+        for (i = 0; i < gpi_count; i++) {
+            entries[i].client = client;
+            entries[i].index = i;
+            scnprintf(name, UCD9000_DEBUGFS_NAME_LEN,
+                  "gpi%d_alarm", i + 1);
+            debugfs_create_file(name, 0444, data->debugfs,
+                        &entries[i],
+                        &ucd9000_debugfs_mfr_status_bit);
+        }
+    }
+
+    scnprintf(name, UCD9000_DEBUGFS_NAME_LEN, "mfr_status");
+    debugfs_create_file(name, 0444, data->debugfs, client,
+                &ucd9000_debugfs_show_mfr_status_fops);
+
+    return 0;
+}
+#else
+static int ucd9000_init_debugfs(struct i2c_client *client,
+                const struct i2c_device_id *mid,
+                struct ucd9000_data *data)
+{
+    return 0;
+}
+#endif /* CONFIG_DEBUG_FS */
+
+static int ucd9000_probe(struct i2c_client *client)
+{
+    u8 block_buffer[I2C_SMBUS_BLOCK_MAX + 1];
+    char wb_device_name[WB_DEV_NAME_MAX_LEN];
+    struct ucd9000_data *data;
+    struct pmbus_driver_info *info;
+    const struct i2c_device_id *mid;
+    enum chips chip;
+    int i, ret;
+
+    if (!i2c_check_functionality(client->adapter,
+                     I2C_FUNC_SMBUS_BYTE_DATA))
+        return -ENODEV;
+
+    ret = wb_i2c_smbus_read_block_data(client, UCD9000_DEVICE_ID,
+                    block_buffer);
+    if (ret < 0) {
+        dev_err(&client->dev, "Failed to read device ID\n");
+        return ret;
+    }
+    block_buffer[ret] = '\0';
+    dev_info(&client->dev, "Device ID %s\n", block_buffer);
+
+    mem_clear(wb_device_name, sizeof(wb_device_name));
+    snprintf(wb_device_name, sizeof(wb_device_name), "wb_%s", block_buffer);
+
+    for (mid = ucd9000_id; mid->name[0]; mid++) {
+        if (!strncasecmp(mid->name, wb_device_name, strlen(mid->name)))
+            break;
+    }
+    if (!mid->name[0]) {
+        dev_err(&client->dev, "Unsupported device\n");
+        return -ENODEV;
+    }
+
+    if (client->dev.of_node)
+        chip = (enum chips)of_device_get_match_data(&client->dev);
+    else
+        chip = mid->driver_data;
+
+    if (chip != ucd9000 && strcmp(client->name, mid->name) != 0)
+        dev_notice(&client->dev,
+               "Device mismatch: Configured %s, detected %s\n",
+               client->name, mid->name);
+
+    data = devm_kzalloc(&client->dev, sizeof(struct ucd9000_data),
+                GFP_KERNEL);
+    if (!data)
+        return -ENOMEM;
+    info = &data->info;
+
+    ret = i2c_smbus_read_byte_data(client, UCD9000_NUM_PAGES);
+    if (ret < 0) {
+        dev_err(&client->dev,
+            "Failed to read number of active pages\n");
+        return ret;
+    }
+    info->pages = ret;
+    if (!info->pages) {
+        dev_err(&client->dev, "No pages configured\n");
+        return -ENODEV;
+    }
+
+    /* The internal temperature sensor is always active */
+    /* ucd90160 have no temperature */
+    /* info->func[0] = PMBUS_HAVE_TEMP; */
+
+    /* Everything else is configurable */
+    ret = wb_i2c_smbus_read_block_data(client, UCD9000_MONITOR_CONFIG,
+                    block_buffer);
+    if (ret <= 0) {
+        dev_err(&client->dev, "Failed to read configuration data\n");
+        return -ENODEV;
+    }
+    for (i = 0; i < ret; i++) {
+        int page = UCD9000_MON_PAGE(block_buffer[i]);
+
+        if (page >= info->pages)
+            continue;
+
+        switch (UCD9000_MON_TYPE(block_buffer[i])) {
+        case UCD9000_MON_VOLTAGE:
+        case UCD9000_MON_VOLTAGE_HW:
+            info->func[page] |= PMBUS_HAVE_VOUT
+              | PMBUS_HAVE_STATUS_VOUT;
+            break;
+        case UCD9000_MON_TEMPERATURE:
+            info->func[page] |= PMBUS_HAVE_TEMP2
+              | PMBUS_HAVE_STATUS_TEMP;
+            break;
+        case UCD9000_MON_CURRENT:
+            info->func[page] |= PMBUS_HAVE_IOUT
+              | PMBUS_HAVE_STATUS_IOUT;
+            break;
+        default:
+            break;
+        }
+    }
+
+    /* Fan configuration */
+    if (mid->driver_data == ucd90124) {
+        for (i = 0; i < UCD9000_NUM_FAN; i++) {
+            i2c_smbus_write_byte_data(client,
+                          UCD9000_FAN_CONFIG_INDEX, i);
+            ret = wb_i2c_smbus_read_block_data(client,
+                            UCD9000_FAN_CONFIG,
+                            data->fan_data[i]);
+            if (ret < 0)
+                return ret;
+        }
+        i2c_smbus_write_byte_data(client, UCD9000_FAN_CONFIG_INDEX, 0);
+
+        info->read_byte_data = ucd9000_read_byte_data;
+        info->func[0] |= PMBUS_HAVE_FAN12 | PMBUS_HAVE_STATUS_FAN12
+          | PMBUS_HAVE_FAN34 | PMBUS_HAVE_STATUS_FAN34;
+    }
+
+    ucd9000_probe_gpio(client, mid, data);
+
+    ret = wb_pmbus_do_probe(client, info);
+    if (ret)
+        return ret;
+
+    ret = ucd9000_init_debugfs(client, mid, data);
+    if (ret)
+        dev_warn(&client->dev, "Failed to register debugfs: %d\n",
+             ret);
+
+    return 0;
+}
+
+/* This is the driver that will be inserted */
+static struct i2c_driver ucd9000_driver = {
+    .driver = {
+        .name = "wb_ucd9000",
+        .of_match_table = of_match_ptr(ucd9000_of_match),
+    },
+    .probe_new = ucd9000_probe,
+    .remove = wb_pmbus_do_remove,
+    .id_table = ucd9000_id,
+};
+
+module_i2c_driver(ucd9000_driver);
+
+MODULE_AUTHOR("support");
+MODULE_DESCRIPTION("PMBus driver for TI UCD90xxx");
+MODULE_LICENSE("GPL");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_xdpe12284.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_xdpe12284.c
new file mode 100644
index 000000000..f45d683e3
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_xdpe12284.c
@@ -0,0 +1,499 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Hardware monitoring driver for Infineon Multi-phase Digital VR Controllers
+ *
+ * Copyright (c) 2020 Mellanox Technologies. All rights reserved.
+ */
+
+#include <linux/err.h>
+#include <linux/hwmon-sysfs.h>
+#include <linux/i2c.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/sysfs.h>
+#include "wb_pmbus.h"
+
+#define XDPE122_PROT_VR12_5MV        (0x01) /* VR12.0 mode, 5-mV DAC */
+#define XDPE122_PROT_VR12_5_10MV     (0x02) /* VR12.5 mode, 10-mV DAC */
+#define XDPE122_PROT_IMVP9_10MV      (0x03) /* IMVP9 mode, 10-mV DAC */
+#define XDPE122_AMD_625MV            (0x10) /* AMD mode 6.25mV */
+#define XDPE122_PAGE_NUM             (2)
+#define XDPE122_WRITE_PROTECT_CLOSE  (0x00)
+#define XDPE122_WRITE_PROTECT_OPEN   (0x40)
+
+static int g_wb_xdpe122_debug = 0;
+static int g_wb_xdpe122_error = 0;
+
+module_param(g_wb_xdpe122_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_xdpe122_error, int, S_IRUGO | S_IWUSR);
+
+#define WB_XDPE122_VERBOSE(fmt, args...) do {                                        \
+    if (g_wb_xdpe122_debug) { \
+        printk(KERN_INFO "[WB_XDPE122][VER][func:%s line:%d]\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define WB_XDPE122_ERROR(fmt, args...) do {                                        \
+    if (g_wb_xdpe122_error) { \
+        printk(KERN_ERR "[WB_XDPE122][ERR][func:%s line:%d]\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+static int xdpe122_data2reg_vid(struct pmbus_data *data, int page, long val)
+{
+    int vrm_version;
+
+    vrm_version = data->info->vrm_version[page];
+    WB_XDPE122_VERBOSE("page%d, vrm_version: %d, data_val: %ld\n",
+        page, vrm_version, val);
+    /* Convert data to VID register. */
+    switch (vrm_version) {
+    case vr13:
+        if (val >= 500) {
+            return 1 + DIV_ROUND_CLOSEST(val - 500, 10);
+        }
+        return 0;
+    case vr12:
+        if (val >= 250) {
+            return 1 + DIV_ROUND_CLOSEST(val - 250, 5);
+        }
+        return 0;
+    case imvp9:
+        if (val >= 200) {
+            return 1 + DIV_ROUND_CLOSEST(val - 200, 10);
+        }
+        return 0;
+    case amd625mv:
+        if (val >= 200 && val <= 1550) {
+            return DIV_ROUND_CLOSEST((1550 - val) * 100, 625);
+        }
+        return 0;
+    default:
+        WB_XDPE122_ERROR("Unsupport vrm_version, page%d, vrm_version: %d\n",
+            page, vrm_version);
+        return -EINVAL;
+    }
+    return 0;
+}
+
+/*
+ * Convert VID sensor values to milli- or micro-units
+ * depending on sensor type.
+ */
+static s64 xdpe122_reg2data_vid(struct pmbus_data *data, int page, long val)
+{
+
+    long rv;
+    int vrm_version;
+
+    rv = 0;
+    vrm_version = data->info->vrm_version[page];
+    switch (vrm_version) {
+    case vr11:
+        if (val >= 0x02 && val <= 0xb2)
+            rv = DIV_ROUND_CLOSEST(160000 - (val - 2) * 625, 100);
+        break;
+    case vr12:
+        if (val >= 0x01)
+            rv = 250 + (val - 1) * 5;
+        break;
+    case vr13:
+        if (val >= 0x01)
+            rv = 500 + (val - 1) * 10;
+        break;
+    case imvp9:
+        if (val >= 0x01)
+            rv = 200 + (val - 1) * 10;
+        break;
+    case amd625mv:
+        if (val >= 0x0 && val <= 0xd8)
+            rv = DIV_ROUND_CLOSEST(155000 - val * 625, 100);
+        break;
+    }
+    WB_XDPE122_VERBOSE("page%d, vrm_version: %d, reg_val: 0x%lx, data_val: %ld\n",
+        page, vrm_version, val, rv);
+    return rv;
+}
+
+static ssize_t xdpe122_avs_vout_show(struct device *dev, struct device_attribute *devattr,
+                   char *buf)
+{
+    struct i2c_client *client = to_i2c_client(dev->parent);
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
+    struct pmbus_data *data = i2c_get_clientdata(client);
+    int vout_cmd, vout;
+
+    mutex_lock(&data->update_lock);
+    vout_cmd = wb_pmbus_read_word_data(client, attr->index, 0xff, PMBUS_VOUT_COMMAND);
+    if (vout_cmd < 0) {
+        WB_XDPE122_ERROR("%d-%04x: read page%d, vout command reg: 0x%x failed, ret: %d\n",
+            client->adapter->nr, client->addr, attr->index, PMBUS_VOUT_COMMAND, vout_cmd);
+        mutex_unlock(&data->update_lock);
+        return vout_cmd;
+    }
+
+    vout = xdpe122_reg2data_vid(data, attr->index, vout_cmd);
+    vout = vout * 1000;
+    WB_XDPE122_VERBOSE("%d-%04x: page%d, vout command reg_val: 0x%x, vout: %d uV\n",
+        client->adapter->nr, client->addr, attr->index, vout_cmd, vout);
+
+    mutex_unlock(&data->update_lock);
+    return snprintf(buf, PAGE_SIZE, "%d\n", vout);
+}
+
+static ssize_t xdpe122_avs_vout_store(struct device *dev, struct device_attribute *devattr,
+                   const char *buf, size_t count)
+{
+    struct i2c_client *client = to_i2c_client(dev->parent);
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
+    struct pmbus_data *data = i2c_get_clientdata(client);
+    int vout, vout_max, vout_min, vout_mv;
+    int ret, vout_cmd, vout_cmd_set;
+
+    if ((attr->index < 0) || (attr->index >= PMBUS_PAGES)) {
+        WB_XDPE122_ERROR("%d-%04x: invalid index: %d \n", client->adapter->nr, client->addr,
+            attr->index);
+        return -EINVAL;
+    }
+
+    ret = kstrtoint(buf, 0, &vout);
+    if (ret) {
+        WB_XDPE122_ERROR("%d-%04x: invalid value: %s \n", client->adapter->nr, client->addr, buf);
+        return -EINVAL;
+    }
+
+    if (vout <= 0) {
+        WB_XDPE122_ERROR("%d-%04x: invalid value: %d \n", client->adapter->nr, client->addr, vout);
+        return -EINVAL;
+    }
+
+    vout_max = data->vout_max[attr->index];
+    vout_min = data->vout_min[attr->index];
+    if ((vout > vout_max) || (vout < vout_min)) {
+        WB_XDPE122_ERROR("%d-%04x: vout value: %d, out of range [%d, %d] \n", client->adapter->nr,
+            client->addr, vout, vout_min, vout_max);
+        return -EINVAL;
+    }
+
+    /* calc VOUT_COMMAND set value Unit must be mV*/
+    vout_mv = vout / 1000;
+    vout_cmd_set = xdpe122_data2reg_vid(data, attr->index, vout_mv);
+    if ((vout_cmd_set < 0) || (vout_cmd_set > 0xffff)) {
+        WB_XDPE122_ERROR("%d-%04x: invalid value, vout %d uV, vout_cmd_set: %d\n",
+            client->adapter->nr, client->addr, vout, vout_cmd_set);
+        return -EINVAL;
+    }
+
+    mutex_lock(&data->update_lock);
+
+    /* close write protect */
+    ret = wb_pmbus_write_byte_data(client, attr->index, PMBUS_WRITE_PROTECT, XDPE122_WRITE_PROTECT_CLOSE);
+    if (ret < 0) {
+        WB_XDPE122_ERROR("%d-%04x: close page%d write protect failed, ret: %d\n", client->adapter->nr,
+            client->addr, attr->index, ret);
+        mutex_unlock(&data->update_lock);
+        return ret;
+    }
+
+    /* set VOUT_COMMAND */
+    ret = wb_pmbus_write_word_data(client, attr->index, PMBUS_VOUT_COMMAND, vout_cmd_set);
+    if (ret < 0) {
+        WB_XDPE122_ERROR("%d-%04x: set page%d vout cmd reg: 0x%x, value: 0x%x failed, ret: %d\n",
+            client->adapter->nr, client->addr, attr->index, PMBUS_VOUT_COMMAND, vout_cmd_set, ret);
+        goto error;
+    }
+
+    /* read back VOUT_COMMAND */
+    vout_cmd = wb_pmbus_read_word_data(client, attr->index, 0xff, PMBUS_VOUT_COMMAND);
+    if (vout_cmd < 0) {
+        ret = vout_cmd;
+        WB_XDPE122_ERROR("%d-%04x: read page%d vout command reg: 0x%x failed, ret: %d\n",
+            client->adapter->nr, client->addr, attr->index, PMBUS_VOUT_COMMAND, ret);
+        goto error;
+    }
+
+    /* compare vout_cmd and vout_cmd_set */
+    if (vout_cmd != vout_cmd_set) {
+        ret = -EIO;
+        WB_XDPE122_ERROR("%d-%04x: vout cmd value check error, vout cmd read: 0x%x, vout cmd set: 0x%x\n",
+            client->adapter->nr, client->addr, vout_cmd, vout_cmd_set);
+        goto error;
+    }
+
+    /* open write protect */
+    wb_pmbus_write_byte_data(client, attr->index, PMBUS_WRITE_PROTECT, XDPE122_WRITE_PROTECT_OPEN);
+    mutex_unlock(&data->update_lock);
+    WB_XDPE122_VERBOSE("%d-%04x: set page%d vout cmd success, vout %d uV, vout_cmd_set: 0x%x\n",
+        client->adapter->nr, client->addr, attr->index, vout, vout_cmd_set);
+    return count;
+error:
+    wb_pmbus_write_byte_data(client, attr->index, PMBUS_WRITE_PROTECT, XDPE122_WRITE_PROTECT_OPEN);
+    mutex_unlock(&data->update_lock);
+    return ret;
+}
+
+static ssize_t xdpe122_avs_vout_max_store(struct device *dev,
+                   struct device_attribute *devattr, const char *buf, size_t count)
+{
+    struct i2c_client *client = to_i2c_client(dev->parent);
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
+    struct pmbus_data *data = i2c_get_clientdata(client);
+    int ret, vout_threshold;
+
+    if ((attr->index < 0) || (attr->index >= PMBUS_PAGES)) {
+        WB_XDPE122_ERROR("%d-%04x: invalid index: %d \n", client->adapter->nr, client->addr,
+            attr->index);
+        return -EINVAL;
+    }
+
+    ret = kstrtoint(buf, 0, &vout_threshold);
+    if (ret) {
+        WB_XDPE122_ERROR("%d-%04x: invalid value: %s \n", client->adapter->nr, client->addr, buf);
+        return -EINVAL;
+    }
+
+    WB_XDPE122_VERBOSE("%d-%04x: vout%d max threshold: %d", client->adapter->nr, client->addr,
+        attr->index, vout_threshold);
+
+    data->vout_max[attr->index] = vout_threshold;
+    return count;
+}
+
+static ssize_t xdpe122_avs_vout_max_show(struct device *dev,
+                   struct device_attribute *devattr, char *buf)
+{
+    struct i2c_client *client = to_i2c_client(dev->parent);
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
+    struct pmbus_data *data = i2c_get_clientdata(client);
+
+    if ((attr->index < 0) || (attr->index >= PMBUS_PAGES)) {
+        WB_XDPE122_ERROR("%d-%04x: invalid index: %d \n", client->adapter->nr, client->addr,
+            attr->index);
+        return -EINVAL;
+    }
+
+    return snprintf(buf, PAGE_SIZE, "%d\n", data->vout_max[attr->index]);
+}
+
+static ssize_t xdpe122_avs_vout_min_store(struct device *dev,
+                   struct device_attribute *devattr, const char *buf, size_t count)
+{
+    struct i2c_client *client = to_i2c_client(dev->parent);
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
+    struct pmbus_data *data = i2c_get_clientdata(client);
+    int ret, vout_threshold;
+
+    if ((attr->index < 0) || (attr->index >= PMBUS_PAGES)) {
+        WB_XDPE122_ERROR("%d-%04x: invalid index: %d \n", client->adapter->nr, client->addr,
+            attr->index);
+        return -EINVAL;
+    }
+
+    ret = kstrtoint(buf, 0, &vout_threshold);
+    if (ret) {
+        WB_XDPE122_ERROR("%d-%04x: invalid value: %s \n", client->adapter->nr, client->addr, buf);
+        return -EINVAL;
+    }
+
+    WB_XDPE122_VERBOSE("%d-%04x: vout%d min threshold: %d", client->adapter->nr, client->addr,
+        attr->index, vout_threshold);
+
+    data->vout_min[attr->index] = vout_threshold;
+    return count;
+}
+
+static ssize_t xdpe122_avs_vout_min_show(struct device *dev,
+                   struct device_attribute *devattr, char *buf)
+{
+    struct i2c_client *client = to_i2c_client(dev->parent);
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
+    struct pmbus_data *data = i2c_get_clientdata(client);
+
+    if ((attr->index < 0) || (attr->index >= PMBUS_PAGES)) {
+        WB_XDPE122_ERROR("%d-%04x: invalid index: %d \n", client->adapter->nr, client->addr,
+            attr->index);
+        return -EINVAL;
+    }
+
+    return snprintf(buf, PAGE_SIZE, "%d\n", data->vout_min[attr->index]);
+}
+
+static SENSOR_DEVICE_ATTR_RW(avs0_vout, xdpe122_avs_vout, 0);
+static SENSOR_DEVICE_ATTR_RW(avs1_vout, xdpe122_avs_vout, 1);
+static SENSOR_DEVICE_ATTR_RW(avs0_vout_max, xdpe122_avs_vout_max, 0);
+static SENSOR_DEVICE_ATTR_RW(avs0_vout_min, xdpe122_avs_vout_min, 0);
+static SENSOR_DEVICE_ATTR_RW(avs1_vout_max, xdpe122_avs_vout_max, 1);
+static SENSOR_DEVICE_ATTR_RW(avs1_vout_min, xdpe122_avs_vout_min, 1);
+
+static struct attribute *avs_ctrl_attrs[] = {
+    &sensor_dev_attr_avs0_vout.dev_attr.attr,
+    &sensor_dev_attr_avs1_vout.dev_attr.attr,
+    &sensor_dev_attr_avs0_vout_max.dev_attr.attr,
+    &sensor_dev_attr_avs0_vout_min.dev_attr.attr,
+    &sensor_dev_attr_avs1_vout_max.dev_attr.attr,
+    &sensor_dev_attr_avs1_vout_min.dev_attr.attr,
+    NULL,
+};
+
+static const struct attribute_group avs_ctrl_group = {
+    .attrs = avs_ctrl_attrs,
+};
+
+static const struct attribute_group *xdpe122_attribute_groups[] = {
+    &avs_ctrl_group,
+    NULL,
+};
+
+static int xdpe122_read_word_data(struct i2c_client *client, int page,
+				  int phase, int reg)
+{
+	const struct pmbus_driver_info *info = wb_pmbus_get_driver_info(client);
+	long val;
+	s16 exponent;
+	s32 mantissa;
+	int ret;
+
+	switch (reg) {
+	case PMBUS_VOUT_OV_FAULT_LIMIT:
+	case PMBUS_VOUT_UV_FAULT_LIMIT:
+		ret = wb_pmbus_read_word_data(client, page, phase, reg);
+		if (ret < 0)
+			return ret;
+
+		/* Convert register value to LINEAR11 data. */
+		exponent = ((s16)ret) >> 11;
+		mantissa = ((s16)((ret & GENMASK(10, 0)) << 5)) >> 5;
+		val = mantissa * 1000L;
+		if (exponent >= 0)
+			val <<= exponent;
+		else
+			val >>= -exponent;
+
+		/* Convert data to VID register. */
+		switch (info->vrm_version[page]) {
+		case vr13:
+			if (val >= 500)
+				return 1 + DIV_ROUND_CLOSEST(val - 500, 10);
+			return 0;
+		case vr12:
+			if (val >= 250)
+				return 1 + DIV_ROUND_CLOSEST(val - 250, 5);
+			return 0;
+		case imvp9:
+			if (val >= 200)
+				return 1 + DIV_ROUND_CLOSEST(val - 200, 10);
+			return 0;
+		case amd625mv:
+			if (val >= 200 && val <= 1550)
+				return DIV_ROUND_CLOSEST((1550 - val) * 100,
+							 625);
+			return 0;
+		default:
+			return -EINVAL;
+		}
+	default:
+		return -ENODATA;
+	}
+
+	return 0;
+}
+
+static int xdpe122_identify(struct i2c_client *client,
+			    struct pmbus_driver_info *info)
+{
+	u8 vout_params;
+	int i, ret;
+
+	for (i = 0; i < XDPE122_PAGE_NUM; i++) {
+		/* Read the register with VOUT scaling value.*/
+		ret = wb_pmbus_read_byte_data(client, i, PMBUS_VOUT_MODE);
+		if (ret < 0)
+			return ret;
+
+		vout_params = ret & GENMASK(4, 0);
+
+		switch (vout_params) {
+		case XDPE122_PROT_VR12_5_10MV:
+			info->vrm_version[i] = vr13;
+			break;
+		case XDPE122_PROT_VR12_5MV:
+			info->vrm_version[i] = vr12;
+			break;
+		case XDPE122_PROT_IMVP9_10MV:
+			info->vrm_version[i] = imvp9;
+			break;
+		case XDPE122_AMD_625MV:
+			info->vrm_version[i] = amd625mv;
+			break;
+		default:
+			return -EINVAL;
+		}
+	}
+
+	return 0;
+}
+
+static struct pmbus_driver_info xdpe122_info = {
+	.pages = XDPE122_PAGE_NUM,
+	.format[PSC_VOLTAGE_IN] = linear,
+	.format[PSC_VOLTAGE_OUT] = vid,
+	.format[PSC_TEMPERATURE] = linear,
+	.format[PSC_CURRENT_IN] = linear,
+	.format[PSC_CURRENT_OUT] = linear,
+	.format[PSC_POWER] = linear,
+	.func[0] = PMBUS_HAVE_VIN | PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT |
+		PMBUS_HAVE_IIN | PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT |
+		PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP |
+		PMBUS_HAVE_POUT | PMBUS_HAVE_PIN | PMBUS_HAVE_STATUS_INPUT,
+	.func[1] = PMBUS_HAVE_VIN | PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT |
+		PMBUS_HAVE_IIN | PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT |
+		PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP |
+		PMBUS_HAVE_POUT | PMBUS_HAVE_PIN | PMBUS_HAVE_STATUS_INPUT,
+	.groups = xdpe122_attribute_groups,
+	.identify = xdpe122_identify,
+	.read_word_data = xdpe122_read_word_data,
+};
+
+static int xdpe122_probe(struct i2c_client *client)
+{
+	struct pmbus_driver_info *info;
+
+	info = devm_kmemdup(&client->dev, &xdpe122_info, sizeof(*info),
+			    GFP_KERNEL);
+	if (!info)
+		return -ENOMEM;
+
+	return wb_pmbus_do_probe(client, info);
+}
+
+static const struct i2c_device_id xdpe122_id[] = {
+	{"wb_xdpe12254", 0},
+	{"wb_xdpe12284", 0},
+	{}
+};
+
+MODULE_DEVICE_TABLE(i2c, xdpe122_id);
+
+static const struct of_device_id __maybe_unused xdpe122_of_match[] = {
+	{.compatible = "infineon,wb_xdpe12254"},
+	{.compatible = "infineon,wb_xdpe12284"},
+	{}
+};
+MODULE_DEVICE_TABLE(of, xdpe122_of_match);
+
+static struct i2c_driver xdpe122_driver = {
+	.driver = {
+		.name = "wb_xdpe12284",
+		.of_match_table = of_match_ptr(xdpe122_of_match),
+	},
+	.probe_new = xdpe122_probe,
+	.remove = wb_pmbus_do_remove,
+	.id_table = xdpe122_id,
+};
+
+module_i2c_driver(xdpe122_driver);
+
+MODULE_AUTHOR("Vadim Pasternak <vadimp@mellanox.com>");
+MODULE_DESCRIPTION("PMBus driver for Infineon XDPE122 family");
+MODULE_LICENSE("GPL");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_xdpe132g5c_pmbus.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_xdpe132g5c_pmbus.c
new file mode 100644
index 000000000..dd7a97afb
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_xdpe132g5c_pmbus.c
@@ -0,0 +1,512 @@
+#include <linux/err.h>
+#include <linux/i2c.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/hwmon-sysfs.h>
+#include <linux/string.h>
+#include <linux/sysfs.h>
+#include <linux/delay.h>
+#include <linux/mutex.h>
+#include "wb_pmbus.h"
+
+static int g_wb_xdpe132g5_pmbus_debug = 0;
+static int g_wb_xdpe132g5_pmbus_error = 0;
+
+module_param(g_wb_xdpe132g5_pmbus_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_xdpe132g5_pmbus_error, int, S_IRUGO | S_IWUSR);
+
+#define WB_XDPE132G5_PMBUS_DEBUG(fmt, args...) do {                                        \
+    if (g_wb_xdpe132g5_pmbus_debug) { \
+        printk(KERN_INFO "[WB_XDPE132G5_PMBUS][INFO][func:%s line:%d]\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define WB_XDPE132G5_PMBUS_ERROR(fmt, args...) do {                                        \
+    if (g_wb_xdpe132g5_pmbus_error) { \
+        printk(KERN_ERR "[WB_XDPE132G5_PMBUS][ERR][func:%s line:%d]\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define BUF_SIZE                    (256)
+#define XDPE132G5C_PAGE_NUM         (2)
+#define XDPE132G5C_PROT_VR12_5MV    (0x01) /* VR12.0 mode, 5-mV DAC */
+#define XDPE132G5C_PROT_VR12_5_10MV (0x02) /* VR12.5 mode, 10-mV DAC */
+#define XDPE132G5C_PROT_IMVP9_10MV  (0x03) /* IMVP9 mode, 10-mV DAC */
+#define XDPE132G5C_PROT_VR13_10MV   (0x04) /* VR13.0 mode, 10-mV DAC */
+#define XDPE132G5C_PROT_IMVP8_5MV   (0x05) /* IMVP8 mode, 5-mV DAC */
+#define XDPE132G5C_PROT_VR13_5MV    (0x07) /* VR13.0 mode, 5-mV DAC */
+#define RETRY_TIME                  (15)
+
+typedef struct xdpe_vout_data_s {
+    u8 vout_mode;
+    int vout_precision;
+} xdpe_vout_data_t;
+
+static xdpe_vout_data_t g_xdpe_vout_group[] = {
+    {.vout_mode = 0x18, .vout_precision = 256},
+    {.vout_mode = 0x17, .vout_precision = 512},
+    {.vout_mode = 0x16, .vout_precision = 1024},
+    {.vout_mode = 0x15, .vout_precision = 2048},
+    {.vout_mode = 0x14, .vout_precision = 4096},
+};
+
+static ssize_t set_xdpe132g5c_avs(struct device *dev, struct device_attribute *da, const char *buf, size_t count)
+{
+    int ret;
+    unsigned long val;
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
+    struct i2c_client *client = to_i2c_client(dev);
+    struct pmbus_data *data;
+
+    data = i2c_get_clientdata(client);
+    ret = kstrtoul(buf, 0, &val);
+    if (ret){
+        return ret;
+    }
+    mutex_lock(&data->update_lock);
+    /* set value */
+    ret = wb_pmbus_write_word_data(client, attr->index, PMBUS_VOUT_COMMAND, (u16)val);
+    if (ret < 0) {
+        WB_XDPE132G5_PMBUS_ERROR("set pmbus_vout_command fail\n");
+        goto finish_set;
+    }
+finish_set:
+    wb_pmbus_clear_faults(client);
+    mutex_unlock(&data->update_lock);
+    return (ret < 0) ? ret : count;
+
+}
+
+static ssize_t show_xdpe132g5c_avs(struct device *dev, struct device_attribute *da, char *buf)
+{
+    int val;
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
+    struct i2c_client *client = to_i2c_client(dev);
+    struct pmbus_data *data;
+
+    data = i2c_get_clientdata(client);
+    mutex_lock(&data->update_lock);
+    val = wb_pmbus_read_word_data(client, attr->index, 0xff, PMBUS_VOUT_COMMAND);
+    if (val < 0) {
+        WB_XDPE132G5_PMBUS_ERROR("fail val = %d\n", val);
+        goto finish_show;
+    }
+finish_show:
+    wb_pmbus_clear_faults(client);
+    mutex_unlock(&data->update_lock);
+    return snprintf(buf, BUF_SIZE, "0x%04x\n", val);
+}
+
+static int xdpe_get_vout_precision(struct i2c_client *client, int page, int *vout_precision)
+{
+    int i, vout_mode, a_size;
+
+    vout_mode = wb_pmbus_read_byte_data(client, page, PMBUS_VOUT_MODE);
+    if (vout_mode < 0) {
+        WB_XDPE132G5_PMBUS_ERROR("%d-%04x: read xdpe page%d vout mode reg: 0x%x failed, ret: %d\n",
+            client->adapter->nr, client->addr, page, PMBUS_VOUT_MODE, vout_mode);
+        return vout_mode;
+    }
+
+    a_size = ARRAY_SIZE(g_xdpe_vout_group);
+    for (i = 0; i < a_size; i++) {
+        if (g_xdpe_vout_group[i].vout_mode == vout_mode) {
+            *vout_precision = g_xdpe_vout_group[i].vout_precision;
+            WB_XDPE132G5_PMBUS_DEBUG("%d-%04x: match, page%d, vout mode: 0x%x, precision: %d\n",
+                client->adapter->nr, client->addr, page, vout_mode, *vout_precision);
+            break;
+        }
+    }
+    if (i == a_size) {
+        WB_XDPE132G5_PMBUS_ERROR("%d-%04x: invalid, page%d, vout mode: 0x%x\n",client->adapter->nr, client->addr,
+            page, vout_mode);
+        return -EINVAL;
+    }
+    return 0;
+}
+
+static ssize_t xdpe132g5_avs_vout_show(struct device *dev, struct device_attribute *devattr,
+                   char *buf)
+{
+    struct i2c_client *client = to_i2c_client(dev->parent);
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
+    struct pmbus_data *data = i2c_get_clientdata(client);
+    int vout_cmd, ret, vout_precision;
+    long vout;
+
+    mutex_lock(&data->update_lock);
+    ret = xdpe_get_vout_precision(client, attr->index, &vout_precision);
+    if (ret < 0) {
+        WB_XDPE132G5_PMBUS_ERROR("%d-%04x: get xdpe avs%d vout precision failed, ret: %d\n",
+            client->adapter->nr, client->addr, attr->index, ret);
+        mutex_unlock(&data->update_lock);
+        return ret;
+    }
+
+    vout_cmd = wb_pmbus_read_word_data(client, attr->index, 0xff, PMBUS_VOUT_COMMAND);
+    if (vout_cmd < 0) {
+        WB_XDPE132G5_PMBUS_ERROR("%d-%04x: read page%d, vout command reg: 0x%x failed, ret: %d\n",
+            client->adapter->nr, client->addr, attr->index, PMBUS_VOUT_COMMAND, vout_cmd);
+        mutex_unlock(&data->update_lock);
+        return vout_cmd;
+    }
+
+    mutex_unlock(&data->update_lock);
+    vout = vout_cmd * 1000L * 1000L / vout_precision;
+    WB_XDPE132G5_PMBUS_DEBUG("%d-%04x: page%d vout: %ld, vout_cmd: 0x%x, precision: %d\n", client->adapter->nr,
+        client->addr, attr->index, vout, vout_cmd, vout_precision);
+    return snprintf(buf, PAGE_SIZE, "%ld\n", vout);
+}
+
+static ssize_t xdpe132g5_avs_vout_store(struct device *dev, struct device_attribute *devattr,
+                   const char *buf, size_t count)
+{
+    struct i2c_client *client = to_i2c_client(dev->parent);
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
+    struct pmbus_data *data = i2c_get_clientdata(client);
+    int vout_max, vout_min;
+    int ret, vout_cmd, vout_cmd_set;
+    int vout_precision;
+    long vout;
+
+    if ((attr->index < 0) || (attr->index >= PMBUS_PAGES)) {
+        WB_XDPE132G5_PMBUS_ERROR("%d-%04x: invalid index: %d \n", client->adapter->nr, client->addr,
+            attr->index);
+        return -EINVAL;
+    }
+
+    ret = kstrtol(buf, 0, &vout);
+    if (ret) {
+        WB_XDPE132G5_PMBUS_ERROR("%d-%04x: invalid value: %s \n", client->adapter->nr, client->addr, buf);
+        return -EINVAL;
+    }
+
+    if (vout <= 0) {
+        WB_XDPE132G5_PMBUS_ERROR("%d-%04x: invalid value: %ld \n", client->adapter->nr, client->addr, vout);
+        return -EINVAL;
+    }
+
+    vout_max = data->vout_max[attr->index];
+    vout_min = data->vout_min[attr->index];
+    if ((vout > vout_max) || (vout < vout_min)) {
+        WB_XDPE132G5_PMBUS_ERROR("%d-%04x: vout value: %ld, out of range [%d, %d] \n", client->adapter->nr,
+            client->addr, vout, vout_min, vout_max);
+        return -EINVAL;
+    }
+
+    mutex_lock(&data->update_lock);
+    ret = xdpe_get_vout_precision(client, attr->index, &vout_precision);
+    if (ret < 0) {
+        WB_XDPE132G5_PMBUS_ERROR("%d-%04x: get xdpe avs%d vout precision failed, ret: %d\n",
+            client->adapter->nr, client->addr, attr->index, ret);
+        mutex_unlock(&data->update_lock);
+        return ret;
+    }
+
+    vout_cmd_set = (vout * vout_precision) / (1000L * 1000L);
+    if (vout_cmd_set > 0xffff) {
+        WB_XDPE132G5_PMBUS_ERROR("%d-%04x: invalid value, page%d, vout: %ld, vout_precision: %d, vout_cmd_set: 0x%x\n",
+            client->adapter->nr, client->addr, attr->index, vout, vout_precision, vout_cmd_set);
+        mutex_unlock(&data->update_lock);
+        return -EINVAL;
+    }
+
+    /* set VOUT_COMMAND */
+    ret = wb_pmbus_write_word_data(client, attr->index, PMBUS_VOUT_COMMAND, (u16)vout_cmd_set);
+    if (ret < 0) {
+        WB_XDPE132G5_PMBUS_ERROR("%d-%04x: set xdpe page%d vout cmd reg: 0x%x, value: 0x%x failed, ret: %d\n",
+            client->adapter->nr, client->addr, attr->index, PMBUS_VOUT_COMMAND, vout_cmd_set, ret);
+        mutex_unlock(&data->update_lock);
+        return ret;
+    }
+
+    /* read back VOUT_COMMAND */
+    vout_cmd = wb_pmbus_read_word_data(client, attr->index, 0xff, PMBUS_VOUT_COMMAND);
+    if (vout_cmd < 0) {
+        WB_XDPE132G5_PMBUS_ERROR("%d-%04x: read page%d, vout command reg: 0x%x failed, ret: %d\n",
+            client->adapter->nr, client->addr, attr->index, PMBUS_VOUT_COMMAND, vout_cmd);
+        mutex_unlock(&data->update_lock);
+        return vout_cmd;
+    }
+
+    if (vout_cmd != vout_cmd_set) {
+        WB_XDPE132G5_PMBUS_ERROR("%d-%04x: page%d vout cmd value check error, vout cmd read: 0x%x, vout cmd set: 0x%x\n",
+            client->adapter->nr, client->addr, attr->index, vout_cmd, vout_cmd_set);
+        mutex_unlock(&data->update_lock);
+        return -EIO;
+    }
+    mutex_unlock(&data->update_lock);
+    WB_XDPE132G5_PMBUS_DEBUG("%d-%04x: set page%d vout cmd success, vout: %ld uV, vout_cmd_set: 0x%x\n",
+        client->adapter->nr, client->addr, attr->index, vout, vout_cmd_set);
+    return count;
+}
+
+static ssize_t xdpe132g5_avs_vout_max_store(struct device *dev,
+                   struct device_attribute *devattr, const char *buf, size_t count)
+{
+    struct i2c_client *client = to_i2c_client(dev->parent);
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
+    struct pmbus_data *data = i2c_get_clientdata(client);
+    int ret, vout_threshold;
+
+    if ((attr->index < 0) || (attr->index >= PMBUS_PAGES)) {
+        WB_XDPE132G5_PMBUS_ERROR("%d-%04x: invalid index: %d \n", client->adapter->nr, client->addr,
+            attr->index);
+        return -EINVAL;
+    }
+
+    ret = kstrtoint(buf, 0, &vout_threshold);
+    if (ret) {
+        WB_XDPE132G5_PMBUS_ERROR("%d-%04x: invalid value: %s \n", client->adapter->nr, client->addr, buf);
+        return -EINVAL;
+    }
+
+    WB_XDPE132G5_PMBUS_DEBUG("%d-%04x: vout%d max threshold: %d", client->adapter->nr, client->addr,
+        attr->index, vout_threshold);
+
+    data->vout_max[attr->index] = vout_threshold;
+    return count;
+}
+
+static ssize_t xdpe132g5_avs_vout_max_show(struct device *dev,
+                   struct device_attribute *devattr, char *buf)
+{
+    struct i2c_client *client = to_i2c_client(dev->parent);
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
+    struct pmbus_data *data = i2c_get_clientdata(client);
+
+    if ((attr->index < 0) || (attr->index >= PMBUS_PAGES)) {
+        WB_XDPE132G5_PMBUS_ERROR("%d-%04x: invalid index: %d \n", client->adapter->nr, client->addr,
+            attr->index);
+        return -EINVAL;
+    }
+
+    return snprintf(buf, PAGE_SIZE, "%d\n", data->vout_max[attr->index]);
+}
+
+static ssize_t xdpe132g5_avs_vout_min_store(struct device *dev,
+                   struct device_attribute *devattr, const char *buf, size_t count)
+{
+    struct i2c_client *client = to_i2c_client(dev->parent);
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
+    struct pmbus_data *data = i2c_get_clientdata(client);
+    int ret, vout_threshold;
+
+    if ((attr->index < 0) || (attr->index >= PMBUS_PAGES)) {
+        WB_XDPE132G5_PMBUS_ERROR("%d-%04x: invalid index: %d \n", client->adapter->nr, client->addr,
+            attr->index);
+        return -EINVAL;
+    }
+
+    ret = kstrtoint(buf, 0, &vout_threshold);
+    if (ret) {
+        WB_XDPE132G5_PMBUS_ERROR("%d-%04x: invalid value: %s \n", client->adapter->nr, client->addr, buf);
+        return -EINVAL;
+    }
+
+    WB_XDPE132G5_PMBUS_DEBUG("%d-%04x: vout%d min threshold: %d", client->adapter->nr, client->addr,
+        attr->index, vout_threshold);
+
+    data->vout_min[attr->index] = vout_threshold;
+    return count;
+}
+
+static ssize_t xdpe132g5_avs_vout_min_show(struct device *dev,
+                   struct device_attribute *devattr, char *buf)
+{
+    struct i2c_client *client = to_i2c_client(dev->parent);
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
+    struct pmbus_data *data = i2c_get_clientdata(client);
+
+    if ((attr->index < 0) || (attr->index >= PMBUS_PAGES)) {
+        WB_XDPE132G5_PMBUS_ERROR("%d-%04x: invalid index: %d \n", client->adapter->nr, client->addr,
+            attr->index);
+        return -EINVAL;
+    }
+
+    return snprintf(buf, PAGE_SIZE, "%d\n", data->vout_min[attr->index]);
+}
+
+static SENSOR_DEVICE_ATTR_RW(avs0_vout, xdpe132g5_avs_vout, 0);
+static SENSOR_DEVICE_ATTR_RW(avs1_vout, xdpe132g5_avs_vout, 1);
+static SENSOR_DEVICE_ATTR_RW(avs0_vout_max, xdpe132g5_avs_vout_max, 0);
+static SENSOR_DEVICE_ATTR_RW(avs0_vout_min, xdpe132g5_avs_vout_min, 0);
+static SENSOR_DEVICE_ATTR_RW(avs1_vout_max, xdpe132g5_avs_vout_max, 1);
+static SENSOR_DEVICE_ATTR_RW(avs1_vout_min, xdpe132g5_avs_vout_min, 1);
+
+static struct attribute *avs_ctrl_attrs[] = {
+    &sensor_dev_attr_avs0_vout.dev_attr.attr,
+    &sensor_dev_attr_avs1_vout.dev_attr.attr,
+    &sensor_dev_attr_avs0_vout_max.dev_attr.attr,
+    &sensor_dev_attr_avs0_vout_min.dev_attr.attr,
+    &sensor_dev_attr_avs1_vout_max.dev_attr.attr,
+    &sensor_dev_attr_avs1_vout_min.dev_attr.attr,
+    NULL,
+};
+
+static const struct attribute_group avs_ctrl_group = {
+    .attrs = avs_ctrl_attrs,
+};
+
+static const struct attribute_group *xdpe132g5_attribute_groups[] = {
+    &avs_ctrl_group,
+    NULL,
+};
+
+static SENSOR_DEVICE_ATTR(avs0_vout_command, S_IRUGO | S_IWUSR, show_xdpe132g5c_avs, set_xdpe132g5c_avs, 0);
+static SENSOR_DEVICE_ATTR(avs1_vout_command, S_IRUGO | S_IWUSR, show_xdpe132g5c_avs, set_xdpe132g5c_avs, 1);
+
+static struct attribute *xdpe132g5c_sysfs_attrs[] = {
+    &sensor_dev_attr_avs0_vout_command.dev_attr.attr,
+    &sensor_dev_attr_avs1_vout_command.dev_attr.attr,
+    NULL,
+};
+
+static const struct attribute_group xdpe132g5c_sysfs_attrs_group = {
+    .attrs = xdpe132g5c_sysfs_attrs,
+};
+
+static int xdpe132g5c_identify(struct i2c_client *client, struct pmbus_driver_info *info)
+{
+    u8 vout_params;
+    int ret, i, retry;
+
+    /* Read the register with VOUT scaling value.*/
+    for (i = 0; i < XDPE132G5C_PAGE_NUM; i++) {
+        for (retry = 0; retry < RETRY_TIME; retry++) {
+            ret = wb_pmbus_read_byte_data(client, i, PMBUS_VOUT_MODE);
+            if (ret < 0 || ret == 0xff) {
+                msleep(5);
+                continue;
+            } else {
+                break;
+            }
+        }
+        if (ret < 0) {
+            return ret;
+        }
+
+        switch (ret >> 5) {
+        case 0: /* linear mode      */
+            if (info->format[PSC_VOLTAGE_OUT] != linear) {
+                return -ENODEV;
+            }
+            break;
+        case 1: /* VID mode         */
+            if (info->format[PSC_VOLTAGE_OUT] != vid) {
+                return -ENODEV;
+            }
+            vout_params = ret & GENMASK(4, 0);
+            switch (vout_params) {
+            case XDPE132G5C_PROT_VR13_10MV:
+            case XDPE132G5C_PROT_VR12_5_10MV:
+                info->vrm_version[i] = vr13;
+                break;
+            case XDPE132G5C_PROT_VR13_5MV:
+            case XDPE132G5C_PROT_VR12_5MV:
+            case XDPE132G5C_PROT_IMVP8_5MV:
+                info->vrm_version[i] = vr12;
+                break;
+            case XDPE132G5C_PROT_IMVP9_10MV:
+                info->vrm_version[i] = imvp9;
+                break;
+            default:
+                return -EINVAL;
+            }
+            break;
+        case 2: /* direct mode      */
+            if (info->format[PSC_VOLTAGE_OUT] != direct) {
+                return -ENODEV;
+            }
+            break;
+        default:
+            return -ENODEV;
+        }
+    }
+
+    return 0;
+}
+
+static struct pmbus_driver_info xdpe132g5c_info = {
+    .pages = XDPE132G5C_PAGE_NUM,
+    .format[PSC_VOLTAGE_IN] = linear,
+    .format[PSC_VOLTAGE_OUT] = linear,
+    .format[PSC_TEMPERATURE] = linear,
+    .format[PSC_CURRENT_IN] = linear,
+    .format[PSC_CURRENT_OUT] = linear,
+    .format[PSC_POWER] = linear,
+    .func[0] = PMBUS_HAVE_VIN | PMBUS_HAVE_IIN | PMBUS_HAVE_PIN
+        | PMBUS_HAVE_STATUS_INPUT | PMBUS_HAVE_TEMP
+        | PMBUS_HAVE_STATUS_TEMP
+        | PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT
+        | PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT | PMBUS_HAVE_POUT,
+    .func[1] = PMBUS_HAVE_VIN | PMBUS_HAVE_IIN | PMBUS_HAVE_PIN
+        | PMBUS_HAVE_STATUS_INPUT
+        | PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT
+        | PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT | PMBUS_HAVE_POUT,
+    .groups = xdpe132g5_attribute_groups,
+    .identify = xdpe132g5c_identify,
+};
+
+static int xdpe132g5c_probe(struct i2c_client *client,
+             const struct i2c_device_id *id)
+{
+    int status;
+    struct pmbus_driver_info *info;
+
+    info = devm_kmemdup(&client->dev, &xdpe132g5c_info, sizeof(*info), GFP_KERNEL);
+    if (!info) {
+        return -ENOMEM;
+    }
+
+    status = wb_pmbus_do_probe(client, &xdpe132g5c_info);
+    if (status != 0) {
+        WB_XDPE132G5_PMBUS_ERROR("pmbus probe error %d\n", status);
+        return status;
+    }
+
+    status = sysfs_create_group(&client->dev.kobj, &xdpe132g5c_sysfs_attrs_group);
+    if (status != 0) {
+        WB_XDPE132G5_PMBUS_ERROR("sysfs_create_group error %d\n", status);
+        return status;
+    }
+
+    return status;
+}
+
+static void xdpe132g5c_remove(struct i2c_client *client)
+{
+    sysfs_remove_group(&client->dev.kobj, &xdpe132g5c_sysfs_attrs_group);
+    wb_pmbus_do_remove(client);
+    return;
+}
+
+static const struct i2c_device_id xdpe132g5c_id[] = {
+    {"wb_xdpe132g5c_pmbus", 0},
+    {}
+};
+
+MODULE_DEVICE_TABLE(i2c, xdpe132g5c_id);
+
+static const struct of_device_id __maybe_unused xdpe132g5c_of_match[] = {
+    {.compatible = "infineon,wb_xdpe132g5c_pmbus"},
+    {}
+};
+MODULE_DEVICE_TABLE(of, xdpe132g5c_of_match);
+
+static struct i2c_driver xdpe132g5c_driver = {
+    .driver = {
+        .name = "wb_xdpe132g5c_pmbus",
+        .of_match_table = of_match_ptr(xdpe132g5c_of_match),
+    },
+    .probe = xdpe132g5c_probe,
+    .remove = xdpe132g5c_remove,
+    .id_table = xdpe132g5c_id,
+};
+
+module_i2c_driver(xdpe132g5c_driver);
+
+MODULE_AUTHOR("support");
+MODULE_DESCRIPTION("PMBus driver for Infineon XDPE132g5 family");
+MODULE_LICENSE("GPL");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/pinctrl/Makefile b/platform/broadcom/sonic-platform-modules-micas/common/modules/pinctrl/Makefile
new file mode 100644
index 000000000..295934ca4
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/pinctrl/Makefile
@@ -0,0 +1,17 @@
+PWD		= $(shell pwd)
+
+EXTRA_CFLAGS:= -I$(M)/include
+EXTRA_CFLAGS+= -Wall
+
+obj-m := wb_pinctrl_intel.o
+obj-m += wb_gpio_c3000.o
+obj-m += wb_gpio_c3000_device.o
+
+all:
+	$(MAKE) -C $(KERNEL_SRC)/build M=$(PWD) modules
+	@if [ ! -d $(module_out_put_dir) ]; then mkdir -p $(module_out_put_dir) ;fi
+	cp -p  $(PWD)/*.ko $(module_out_put_dir)
+clean:
+	rm -f $(PWD)/*.o $(PWD)/*.ko $(PWD)/*.mod.c $(PWD)/.*.cmd $(PWD)/*.mod
+	rm -f $(PWD)/Module.markers $(PWD)/Module.symvers $(PWD)/modules.order
+	rm -rf $(PWD)/.tmp_versions
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/pinctrl/core.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/pinctrl/core.h
new file mode 100644
index 000000000..840103c40
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/pinctrl/core.h
@@ -0,0 +1,249 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * Core private header for the pin control subsystem
+ *
+ * Copyright (C) 2011 ST-Ericsson SA
+ * Written on behalf of Linaro for ST-Ericsson
+ *
+ * Author: Linus Walleij <linus.walleij@linaro.org>
+ */
+
+#include <linux/kref.h>
+#include <linux/mutex.h>
+#include <linux/radix-tree.h>
+#include <linux/pinctrl/pinconf.h>
+#include <linux/pinctrl/machine.h>
+
+struct pinctrl_gpio_range;
+
+/**
+ * struct pinctrl_dev - pin control class device
+ * @node: node to include this pin controller in the global pin controller list
+ * @desc: the pin controller descriptor supplied when initializing this pin
+ *	controller
+ * @pin_desc_tree: each pin descriptor for this pin controller is stored in
+ *	this radix tree
+ * @pin_group_tree: optionally each pin group can be stored in this radix tree
+ * @num_groups: optionally number of groups can be kept here
+ * @pin_function_tree: optionally each function can be stored in this radix tree
+ * @num_functions: optionally number of functions can be kept here
+ * @gpio_ranges: a list of GPIO ranges that is handled by this pin controller,
+ *	ranges are added to this list at runtime
+ * @dev: the device entry for this pin controller
+ * @owner: module providing the pin controller, used for refcounting
+ * @driver_data: driver data for drivers registering to the pin controller
+ *	subsystem
+ * @p: result of pinctrl_get() for this device
+ * @hog_default: default state for pins hogged by this device
+ * @hog_sleep: sleep state for pins hogged by this device
+ * @mutex: mutex taken on each pin controller specific action
+ * @device_root: debugfs root for this device
+ */
+struct pinctrl_dev {
+	struct list_head node;
+	struct pinctrl_desc *desc;
+	struct radix_tree_root pin_desc_tree;
+#ifdef CONFIG_GENERIC_PINCTRL_GROUPS
+	struct radix_tree_root pin_group_tree;
+	unsigned int num_groups;
+#endif
+#ifdef CONFIG_GENERIC_PINMUX_FUNCTIONS
+	struct radix_tree_root pin_function_tree;
+	unsigned int num_functions;
+#endif
+	struct list_head gpio_ranges;
+	struct device *dev;
+	struct module *owner;
+	void *driver_data;
+	struct pinctrl *p;
+	struct pinctrl_state *hog_default;
+	struct pinctrl_state *hog_sleep;
+	struct mutex mutex;
+#ifdef CONFIG_DEBUG_FS
+	struct dentry *device_root;
+#endif
+};
+
+/**
+ * struct pinctrl - per-device pin control state holder
+ * @node: global list node
+ * @dev: the device using this pin control handle
+ * @states: a list of states for this device
+ * @state: the current state
+ * @dt_maps: the mapping table chunks dynamically parsed from device tree for
+ *	this device, if any
+ * @users: reference count
+ */
+struct pinctrl {
+	struct list_head node;
+	struct device *dev;
+	struct list_head states;
+	struct pinctrl_state *state;
+	struct list_head dt_maps;
+	struct kref users;
+};
+
+/**
+ * struct pinctrl_state - a pinctrl state for a device
+ * @node: list node for struct pinctrl's @states field
+ * @name: the name of this state
+ * @settings: a list of settings for this state
+ */
+struct pinctrl_state {
+	struct list_head node;
+	const char *name;
+	struct list_head settings;
+};
+
+/**
+ * struct pinctrl_setting_mux - setting data for MAP_TYPE_MUX_GROUP
+ * @group: the group selector to program
+ * @func: the function selector to program
+ */
+struct pinctrl_setting_mux {
+	unsigned group;
+	unsigned func;
+};
+
+/**
+ * struct pinctrl_setting_configs - setting data for MAP_TYPE_CONFIGS_*
+ * @group_or_pin: the group selector or pin ID to program
+ * @configs: a pointer to an array of config parameters/values to program into
+ *	hardware. Each individual pin controller defines the format and meaning
+ *	of config parameters.
+ * @num_configs: the number of entries in array @configs
+ */
+struct pinctrl_setting_configs {
+	unsigned group_or_pin;
+	unsigned long *configs;
+	unsigned num_configs;
+};
+
+/**
+ * struct pinctrl_setting - an individual mux or config setting
+ * @node: list node for struct pinctrl_settings's @settings field
+ * @type: the type of setting
+ * @pctldev: pin control device handling to be programmed. Not used for
+ *   PIN_MAP_TYPE_DUMMY_STATE.
+ * @dev_name: the name of the device using this state
+ * @data: Data specific to the setting type
+ */
+struct pinctrl_setting {
+	struct list_head node;
+	enum pinctrl_map_type type;
+	struct pinctrl_dev *pctldev;
+	const char *dev_name;
+	union {
+		struct pinctrl_setting_mux mux;
+		struct pinctrl_setting_configs configs;
+	} data;
+};
+
+/**
+ * struct pin_desc - pin descriptor for each physical pin in the arch
+ * @pctldev: corresponding pin control device
+ * @name: a name for the pin, e.g. the name of the pin/pad/finger on a
+ *	datasheet or such
+ * @dynamic_name: if the name of this pin was dynamically allocated
+ * @drv_data: driver-defined per-pin data. pinctrl core does not touch this
+ * @mux_usecount: If zero, the pin is not claimed, and @owner should be NULL.
+ *	If non-zero, this pin is claimed by @owner. This field is an integer
+ *	rather than a boolean, since pinctrl_get() might process multiple
+ *	mapping table entries that refer to, and hence claim, the same group
+ *	or pin, and each of these will increment the @usecount.
+ * @mux_owner: The name of device that called pinctrl_get().
+ * @mux_setting: The most recent selected mux setting for this pin, if any.
+ * @gpio_owner: If pinctrl_gpio_request() was called for this pin, this is
+ *	the name of the GPIO that "owns" this pin.
+ */
+struct pin_desc {
+	struct pinctrl_dev *pctldev;
+	const char *name;
+	bool dynamic_name;
+	void *drv_data;
+	/* These fields only added when supporting pinmux drivers */
+#ifdef CONFIG_PINMUX
+	unsigned mux_usecount;
+	const char *mux_owner;
+	const struct pinctrl_setting_mux *mux_setting;
+	const char *gpio_owner;
+#endif
+};
+
+/**
+ * struct pinctrl_maps - a list item containing part of the mapping table
+ * @node: mapping table list node
+ * @maps: array of mapping table entries
+ * @num_maps: the number of entries in @maps
+ */
+struct pinctrl_maps {
+	struct list_head node;
+	const struct pinctrl_map *maps;
+	unsigned num_maps;
+};
+
+#ifdef CONFIG_GENERIC_PINCTRL_GROUPS
+
+/**
+ * struct group_desc - generic pin group descriptor
+ * @name: name of the pin group
+ * @pins: array of pins that belong to the group
+ * @num_pins: number of pins in the group
+ * @data: pin controller driver specific data
+ */
+struct group_desc {
+	const char *name;
+	int *pins;
+	int num_pins;
+	void *data;
+};
+
+int pinctrl_generic_get_group_count(struct pinctrl_dev *pctldev);
+
+const char *pinctrl_generic_get_group_name(struct pinctrl_dev *pctldev,
+					   unsigned int group_selector);
+
+int pinctrl_generic_get_group_pins(struct pinctrl_dev *pctldev,
+				   unsigned int group_selector,
+				   const unsigned int **pins,
+				   unsigned int *npins);
+
+struct group_desc *pinctrl_generic_get_group(struct pinctrl_dev *pctldev,
+					     unsigned int group_selector);
+
+int pinctrl_generic_add_group(struct pinctrl_dev *pctldev, const char *name,
+			      int *gpins, int ngpins, void *data);
+
+int pinctrl_generic_remove_group(struct pinctrl_dev *pctldev,
+				 unsigned int group_selector);
+
+#endif	/* CONFIG_GENERIC_PINCTRL_GROUPS */
+
+struct pinctrl_dev *get_pinctrl_dev_from_devname(const char *dev_name);
+struct pinctrl_dev *get_pinctrl_dev_from_of_node(struct device_node *np);
+int pin_get_from_name(struct pinctrl_dev *pctldev, const char *name);
+const char *pin_get_name(struct pinctrl_dev *pctldev, const unsigned pin);
+int pinctrl_get_group_selector(struct pinctrl_dev *pctldev,
+			       const char *pin_group);
+
+static inline struct pin_desc *pin_desc_get(struct pinctrl_dev *pctldev,
+					    unsigned int pin)
+{
+	return radix_tree_lookup(&pctldev->pin_desc_tree, pin);
+}
+
+extern struct pinctrl_gpio_range *
+pinctrl_find_gpio_range_from_pin_nolock(struct pinctrl_dev *pctldev,
+					unsigned int pin);
+
+extern int pinctrl_force_sleep(struct pinctrl_dev *pctldev);
+extern int pinctrl_force_default(struct pinctrl_dev *pctldev);
+
+extern struct mutex pinctrl_maps_mutex;
+extern struct list_head pinctrl_maps;
+
+#define for_each_maps(_maps_node_, _i_, _map_) \
+	list_for_each_entry(_maps_node_, &pinctrl_maps, node) \
+		for (_i_ = 0, _map_ = &_maps_node_->maps[_i_]; \
+			_i_ < _maps_node_->num_maps; \
+			_i_++, _map_ = &_maps_node_->maps[_i_])
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/pinctrl/wb_gpio_c3000.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/pinctrl/wb_gpio_c3000.c
new file mode 100644
index 000000000..753c8a061
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/pinctrl/wb_gpio_c3000.c
@@ -0,0 +1,452 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Intel Denverton SoC pinctrl/GPIO driver
+ *
+ * Copyright (C) 2017, Intel Corporation
+ * Author: Mika Westerberg <mika.westerberg@linux.intel.com>
+ */
+
+#include <linux/mod_devicetable.h>
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/platform_device.h>
+#include <linux/pinctrl/pinctrl.h>
+#include <linux/slab.h>
+#include <linux/device.h>
+#include <linux/pci.h>
+
+#include "wb_pinctrl_intel.h"
+
+static int g_c3000_gpio_debug = 0;
+static int g_c3000_gpio_error = 0;
+module_param(g_c3000_gpio_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_c3000_gpio_error, int, S_IRUGO | S_IWUSR);
+
+#define C3000_GPIO_VERBOSE(fmt, args...) do {                                        \
+    if (g_c3000_gpio_debug) { \
+        printk(KERN_INFO "[GPIO_PCIE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define C3000_GPIO_ERROR(fmt, args...) do {                                        \
+    if (g_c3000_gpio_error) { \
+        printk(KERN_ERR "[GPIO_PCIE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define DNV_PAD_OWN	0x020
+#define DNV_PADCFGLOCK	0x090
+#define DNV_HOSTSW_OWN	0x0C0
+#define DNV_GPI_IS	0x100
+#define DNV_GPI_IE	0x120
+
+#define DNV_GPP(n, s, e)				\
+	{						\
+		.reg_num = (n),				\
+		.base = (s),				\
+		.size = ((e) - (s) + 1),		\
+	}
+
+#define DNV_COMMUNITY(b, s, e, g, d)			\
+	{						\
+		.barno = (b),				\
+		.padown_offset = DNV_PAD_OWN,		\
+		.padcfglock_offset = DNV_PADCFGLOCK,	\
+		.hostown_offset = DNV_HOSTSW_OWN,	\
+		.is_offset = DNV_GPI_IS,		\
+		.ie_offset = DNV_GPI_IE,		\
+		.pin_base = (s),			\
+		.npins = ((e) - (s) + 1),		\
+		.gpps = (g),				\
+		.ngpps = ARRAY_SIZE(g),			\
+		.dw_base = (d),				\
+	}
+
+/* Denverton */
+static const struct pinctrl_pin_desc dnv_pins[] = {
+	/* North ALL */
+	PINCTRL_PIN(0, "GBE0_SDP0"),
+	PINCTRL_PIN(1, "GBE1_SDP0"),
+	PINCTRL_PIN(2, "GBE0_SDP1"),
+	PINCTRL_PIN(3, "GBE1_SDP1"),
+	PINCTRL_PIN(4, "GBE0_SDP2"),
+	PINCTRL_PIN(5, "GBE1_SDP2"),
+	PINCTRL_PIN(6, "GBE0_SDP3"),
+	PINCTRL_PIN(7, "GBE1_SDP3"),
+	PINCTRL_PIN(8, "GBE2_LED0"),
+	PINCTRL_PIN(9, "GBE2_LED1"),
+	PINCTRL_PIN(10, "GBE0_I2C_CLK"),
+	PINCTRL_PIN(11, "GBE0_I2C_DATA"),
+	PINCTRL_PIN(12, "GBE1_I2C_CLK"),
+	PINCTRL_PIN(13, "GBE1_I2C_DATA"),
+	PINCTRL_PIN(14, "NCSI_RXD0"),
+	PINCTRL_PIN(15, "NCSI_CLK_IN"),
+	PINCTRL_PIN(16, "NCSI_RXD1"),
+	PINCTRL_PIN(17, "NCSI_CRS_DV"),
+	PINCTRL_PIN(18, "NCSI_ARB_IN"),
+	PINCTRL_PIN(19, "NCSI_TX_EN"),
+	PINCTRL_PIN(20, "NCSI_TXD0"),
+	PINCTRL_PIN(21, "NCSI_TXD1"),
+	PINCTRL_PIN(22, "NCSI_ARB_OUT"),
+	PINCTRL_PIN(23, "GBE0_LED0"),
+	PINCTRL_PIN(24, "GBE0_LED1"),
+	PINCTRL_PIN(25, "GBE1_LED0"),
+	PINCTRL_PIN(26, "GBE1_LED1"),
+	PINCTRL_PIN(27, "GPIO0"),
+	PINCTRL_PIN(28, "PCIE_CLKREQ0_N"),
+	PINCTRL_PIN(29, "PCIE_CLKREQ1_N"),
+	PINCTRL_PIN(30, "PCIE_CLKREQ2_N"),
+	PINCTRL_PIN(31, "PCIE_CLKREQ3_N"),
+	PINCTRL_PIN(32, "PCIE_CLKREQ4_N"),
+	PINCTRL_PIN(33, "GPIO1"),
+	PINCTRL_PIN(34, "GPIO2"),
+	PINCTRL_PIN(35, "SVID_ALERT_N"),
+	PINCTRL_PIN(36, "SVID_DATA"),
+	PINCTRL_PIN(37, "SVID_CLK"),
+	PINCTRL_PIN(38, "THERMTRIP_N"),
+	PINCTRL_PIN(39, "PROCHOT_N"),
+	PINCTRL_PIN(40, "MEMHOT_N"),
+	/* South DFX */
+	PINCTRL_PIN(41, "DFX_PORT_CLK0"),
+	PINCTRL_PIN(42, "DFX_PORT_CLK1"),
+	PINCTRL_PIN(43, "DFX_PORT0"),
+	PINCTRL_PIN(44, "DFX_PORT1"),
+	PINCTRL_PIN(45, "DFX_PORT2"),
+	PINCTRL_PIN(46, "DFX_PORT3"),
+	PINCTRL_PIN(47, "DFX_PORT4"),
+	PINCTRL_PIN(48, "DFX_PORT5"),
+	PINCTRL_PIN(49, "DFX_PORT6"),
+	PINCTRL_PIN(50, "DFX_PORT7"),
+	PINCTRL_PIN(51, "DFX_PORT8"),
+	PINCTRL_PIN(52, "DFX_PORT9"),
+	PINCTRL_PIN(53, "DFX_PORT10"),
+	PINCTRL_PIN(54, "DFX_PORT11"),
+	PINCTRL_PIN(55, "DFX_PORT12"),
+	PINCTRL_PIN(56, "DFX_PORT13"),
+	PINCTRL_PIN(57, "DFX_PORT14"),
+	PINCTRL_PIN(58, "DFX_PORT15"),
+	/* South GPP0 */
+	PINCTRL_PIN(59, "GPIO12"),
+	PINCTRL_PIN(60, "SMB5_GBE_ALRT_N"),
+	PINCTRL_PIN(61, "PCIE_CLKREQ5_N"),
+	PINCTRL_PIN(62, "PCIE_CLKREQ6_N"),
+	PINCTRL_PIN(63, "PCIE_CLKREQ7_N"),
+	PINCTRL_PIN(64, "UART0_RXD"),
+	PINCTRL_PIN(65, "UART0_TXD"),
+	PINCTRL_PIN(66, "SMB5_GBE_CLK"),
+	PINCTRL_PIN(67, "SMB5_GBE_DATA"),
+	PINCTRL_PIN(68, "ERROR2_N"),
+	PINCTRL_PIN(69, "ERROR1_N"),
+	PINCTRL_PIN(70, "ERROR0_N"),
+	PINCTRL_PIN(71, "IERR_N"),
+	PINCTRL_PIN(72, "MCERR_N"),
+	PINCTRL_PIN(73, "SMB0_LEG_CLK"),
+	PINCTRL_PIN(74, "SMB0_LEG_DATA"),
+	PINCTRL_PIN(75, "SMB0_LEG_ALRT_N"),
+	PINCTRL_PIN(76, "SMB1_HOST_DATA"),
+	PINCTRL_PIN(77, "SMB1_HOST_CLK"),
+	PINCTRL_PIN(78, "SMB2_PECI_DATA"),
+	PINCTRL_PIN(79, "SMB2_PECI_CLK"),
+	PINCTRL_PIN(80, "SMB4_CSME0_DATA"),
+	PINCTRL_PIN(81, "SMB4_CSME0_CLK"),
+	PINCTRL_PIN(82, "SMB4_CSME0_ALRT_N"),
+	PINCTRL_PIN(83, "USB_OC0_N"),
+	PINCTRL_PIN(84, "FLEX_CLK_SE0"),
+	PINCTRL_PIN(85, "FLEX_CLK_SE1"),
+	PINCTRL_PIN(86, "GPIO4"),
+	PINCTRL_PIN(87, "GPIO5"),
+	PINCTRL_PIN(88, "GPIO6"),
+	PINCTRL_PIN(89, "GPIO7"),
+	PINCTRL_PIN(90, "SATA0_LED_N"),
+	PINCTRL_PIN(91, "SATA1_LED_N"),
+	PINCTRL_PIN(92, "SATA_PDETECT0"),
+	PINCTRL_PIN(93, "SATA_PDETECT1"),
+	PINCTRL_PIN(94, "SATA0_SDOUT"),
+	PINCTRL_PIN(95, "SATA1_SDOUT"),
+	PINCTRL_PIN(96, "UART1_RXD"),
+	PINCTRL_PIN(97, "UART1_TXD"),
+	PINCTRL_PIN(98, "GPIO8"),
+	PINCTRL_PIN(99, "GPIO9"),
+	PINCTRL_PIN(100, "TCK"),
+	PINCTRL_PIN(101, "TRST_N"),
+	PINCTRL_PIN(102, "TMS"),
+	PINCTRL_PIN(103, "TDI"),
+	PINCTRL_PIN(104, "TDO"),
+	PINCTRL_PIN(105, "CX_PRDY_N"),
+	PINCTRL_PIN(106, "CX_PREQ_N"),
+	PINCTRL_PIN(107, "CTBTRIGINOUT"),
+	PINCTRL_PIN(108, "CTBTRIGOUT"),
+	PINCTRL_PIN(109, "DFX_SPARE2"),
+	PINCTRL_PIN(110, "DFX_SPARE3"),
+	PINCTRL_PIN(111, "DFX_SPARE4"),
+	/* South GPP1 */
+	PINCTRL_PIN(112, "SUSPWRDNACK"),
+	PINCTRL_PIN(113, "PMU_SUSCLK"),
+	PINCTRL_PIN(114, "ADR_TRIGGER"),
+	PINCTRL_PIN(115, "PMU_SLP_S45_N"),
+	PINCTRL_PIN(116, "PMU_SLP_S3_N"),
+	PINCTRL_PIN(117, "PMU_WAKE_N"),
+	PINCTRL_PIN(118, "PMU_PWRBTN_N"),
+	PINCTRL_PIN(119, "PMU_RESETBUTTON_N"),
+	PINCTRL_PIN(120, "PMU_PLTRST_N"),
+	PINCTRL_PIN(121, "SUS_STAT_N"),
+	PINCTRL_PIN(122, "SLP_S0IX_N"),
+	PINCTRL_PIN(123, "SPI_CS0_N"),
+	PINCTRL_PIN(124, "SPI_CS1_N"),
+	PINCTRL_PIN(125, "SPI_MOSI_IO0"),
+	PINCTRL_PIN(126, "SPI_MISO_IO1"),
+	PINCTRL_PIN(127, "SPI_IO2"),
+	PINCTRL_PIN(128, "SPI_IO3"),
+	PINCTRL_PIN(129, "SPI_CLK"),
+	PINCTRL_PIN(130, "SPI_CLK_LOOPBK"),
+	PINCTRL_PIN(131, "ESPI_IO0"),
+	PINCTRL_PIN(132, "ESPI_IO1"),
+	PINCTRL_PIN(133, "ESPI_IO2"),
+	PINCTRL_PIN(134, "ESPI_IO3"),
+	PINCTRL_PIN(135, "ESPI_CS0_N"),
+	PINCTRL_PIN(136, "ESPI_CLK"),
+	PINCTRL_PIN(137, "ESPI_RST_N"),
+	PINCTRL_PIN(138, "ESPI_ALRT0_N"),
+	PINCTRL_PIN(139, "GPIO10"),
+	PINCTRL_PIN(140, "GPIO11"),
+	PINCTRL_PIN(141, "ESPI_CLK_LOOPBK"),
+	PINCTRL_PIN(142, "EMMC_CMD"),
+	PINCTRL_PIN(143, "EMMC_STROBE"),
+	PINCTRL_PIN(144, "EMMC_CLK"),
+	PINCTRL_PIN(145, "EMMC_D0"),
+	PINCTRL_PIN(146, "EMMC_D1"),
+	PINCTRL_PIN(147, "EMMC_D2"),
+	PINCTRL_PIN(148, "EMMC_D3"),
+	PINCTRL_PIN(149, "EMMC_D4"),
+	PINCTRL_PIN(150, "EMMC_D5"),
+	PINCTRL_PIN(151, "EMMC_D6"),
+	PINCTRL_PIN(152, "EMMC_D7"),
+	PINCTRL_PIN(153, "GPIO3"),
+};
+
+static const unsigned int dnv_uart0_pins[] = { 60, 61, 64, 65 };
+static const unsigned int dnv_uart0_modes[] = { 2, 3, 1, 1 };
+static const unsigned int dnv_uart1_pins[] = { 94, 95, 96, 97 };
+static const unsigned int dnv_uart2_pins[] = { 60, 61, 62, 63 };
+static const unsigned int dnv_uart2_modes[] = { 1, 2, 2, 2 };
+static const unsigned int dnv_emmc_pins[] = {
+	142, 143, 144, 145, 146, 147, 148, 149, 150, 151, 152,
+};
+
+static const struct intel_pingroup dnv_groups[] = {
+	PIN_GROUP("uart0_grp", dnv_uart0_pins, dnv_uart0_modes),
+	PIN_GROUP("uart1_grp", dnv_uart1_pins, 1),
+	PIN_GROUP("uart2_grp", dnv_uart2_pins, dnv_uart2_modes),
+	PIN_GROUP("emmc_grp", dnv_emmc_pins, 1),
+};
+
+static const char * const dnv_uart0_groups[] = { "uart0_grp" };
+static const char * const dnv_uart1_groups[] = { "uart1_grp" };
+static const char * const dnv_uart2_groups[] = { "uart2_grp" };
+static const char * const dnv_emmc_groups[] = { "emmc_grp" };
+
+static const struct intel_function dnv_functions[] = {
+	FUNCTION("uart0", dnv_uart0_groups),
+	FUNCTION("uart1", dnv_uart1_groups),
+	FUNCTION("uart2", dnv_uart2_groups),
+	FUNCTION("emmc", dnv_emmc_groups),
+};
+
+static const struct intel_padgroup dnv_north_gpps[] = {
+	DNV_GPP(0, 0, 31),	/* North ALL_0 */
+	DNV_GPP(1, 32, 40),	/* North ALL_1 */
+};
+
+static const struct intel_padgroup dnv_south_gpps[] = {
+	DNV_GPP(0, 41, 58),	/* South DFX */
+	DNV_GPP(1, 59, 90),	/* South GPP0_0 */
+	DNV_GPP(2, 91, 111),	/* South GPP0_1 */
+	DNV_GPP(3, 112, 143),	/* South GPP1_0 */
+	DNV_GPP(4, 144, 153),	/* South GPP1_1 */
+};
+
+static const struct intel_community dnv_communities[] = {
+	DNV_COMMUNITY(0, 0, 40, dnv_north_gpps, 0xc20000),
+	DNV_COMMUNITY(1, 41, 153, dnv_south_gpps, 0xc50000),
+};
+
+static const struct intel_pinctrl_soc_data dnv_soc_data = {
+	.pins = dnv_pins,
+	.npins = ARRAY_SIZE(dnv_pins),
+	.groups = dnv_groups,
+	.ngroups = ARRAY_SIZE(dnv_groups),
+	.functions = dnv_functions,
+	.nfunctions = ARRAY_SIZE(dnv_functions),
+	.communities = dnv_communities,
+	.ncommunities = ARRAY_SIZE(dnv_communities),
+};
+
+static INTEL_PINCTRL_PM_OPS(dnv_pinctrl_pm_ops);
+
+static int pci_dev_init(wb_gpio_data_t *wb_gpio_data, struct pci_dev *pci_dev)
+{
+    int err, i;
+    void __iomem *base;
+
+    C3000_GPIO_VERBOSE("Enter vendor 0x%x, device 0x%x.\n",
+        pci_dev->vendor, pci_dev->device);
+
+    C3000_GPIO_VERBOSE("start pci_enable_device!\n");
+    err = pci_enable_device(pci_dev);
+    if (err) {
+        dev_err(&pci_dev->dev, "Failed to enable pci device, ret:%d.\n", err);
+        return err;
+    }
+
+    err = pci_request_region(pci_dev, 0, "P2SB");
+    if (err) {
+        dev_err(&pci_dev->dev, "Requesting C3000 P2SB BAR0 region failed, ret: %d\n", err);
+        goto err_disable;
+    }
+
+    C3000_GPIO_VERBOSE("start pci_set_master!\n");
+    pci_set_master(pci_dev);
+
+    base = pci_iomap(pci_dev, wb_gpio_data->pci_bar, 0);
+    if (!base) {
+        dev_err(&pci_dev->dev, "pci_iomap bar: %d failed\n", wb_gpio_data->pci_bar);
+        err = -ENOMEM;
+        goto err_release;
+    }
+    wb_gpio_data->pci_mem_base = base;
+
+    for (i = 0; i < dnv_soc_data.ncommunities; i++) {
+        wb_gpio_data->res[i] = base + dnv_soc_data.communities[i].dw_base;
+    }
+    return 0;
+err_release:
+    pci_release_region(pci_dev, wb_gpio_data->pci_bar);
+err_disable:
+    pci_disable_device(pci_dev);
+    return err;
+}
+
+static void pci_dev_release(wb_gpio_data_t *wb_gpio_data)
+{
+    struct pci_dev *pci_dev;
+
+    pci_dev = wb_gpio_data->pci_dev;
+    if (wb_gpio_data->pci_mem_base) {
+        pci_iounmap(pci_dev, wb_gpio_data->pci_mem_base);
+    }
+    pci_release_region(pci_dev, wb_gpio_data->pci_bar);
+    pci_disable_device(pci_dev);
+    return;
+}
+
+static int wb_gpio_driver_probe(struct platform_device *plat_dev)
+{
+    int ret, devfn;
+    wb_gpio_data_t *wb_gpio_data;
+    wb_gpio_data_t *c3000_gpio_device;
+    struct pci_dev *pci_dev;
+
+    if (dnv_soc_data.ncommunities > GPIO_RES_MAX) {
+        dev_err(&plat_dev->dev, "GPIO ncommunities %lu is more than GPIO resource number: %d\n",
+            dnv_soc_data.ncommunities, GPIO_RES_MAX);
+        return -EINVAL;
+    }
+
+    wb_gpio_data = devm_kzalloc(&plat_dev->dev, sizeof(wb_gpio_data_t), GFP_KERNEL);
+    if (!wb_gpio_data) {
+        dev_err(&plat_dev->dev, "devm_kzalloc failed.\n");
+        ret = -ENOMEM;
+        return ret;
+    }
+
+    if (plat_dev->dev.of_node) {
+        ret = 0;
+        ret += of_property_read_u32(plat_dev->dev.of_node, "pci_domain", &wb_gpio_data->pci_domain);
+        ret += of_property_read_u32(plat_dev->dev.of_node, "pci_bus", &wb_gpio_data->pci_bus);
+        ret += of_property_read_u32(plat_dev->dev.of_node, "pci_slot", &wb_gpio_data->pci_slot);
+        ret += of_property_read_u32(plat_dev->dev.of_node, "pci_fn", &wb_gpio_data->pci_fn);
+        ret += of_property_read_u32(plat_dev->dev.of_node, "pci_bar", &wb_gpio_data->pci_bar);
+        ret += of_property_read_u32(plat_dev->dev.of_node, "irq", &wb_gpio_data->irq);
+        if (ret != 0) {
+            dev_err(&plat_dev->dev, "Failed to get dts config, ret:%d.\n", ret);
+            return -ENXIO;
+        }
+    } else {
+        if (plat_dev->dev.platform_data == NULL) {
+            dev_err(&plat_dev->dev, "Failed to get platform data config.\n");
+            return -ENXIO;
+        }
+        c3000_gpio_device = plat_dev->dev.platform_data;
+        wb_gpio_data->pci_domain = c3000_gpio_device->pci_domain;
+        wb_gpio_data->pci_bus = c3000_gpio_device->pci_bus;
+        wb_gpio_data->pci_slot = c3000_gpio_device->pci_slot;
+        wb_gpio_data->pci_fn = c3000_gpio_device->pci_fn;
+        wb_gpio_data->pci_bar = c3000_gpio_device->pci_bar;
+        wb_gpio_data->irq = c3000_gpio_device->irq;
+    }
+
+    C3000_GPIO_VERBOSE("domain:0x%04x, bus:0x%02x, slot:0x%02x, fn:%u, bar:%u, irq: %d\n",
+        wb_gpio_data->pci_domain, wb_gpio_data->pci_bus, wb_gpio_data->pci_slot, wb_gpio_data->pci_fn,
+        wb_gpio_data->pci_bar, wb_gpio_data->irq);
+
+    devfn = PCI_DEVFN(wb_gpio_data->pci_slot, wb_gpio_data->pci_fn);
+    pci_dev = pci_get_domain_bus_and_slot(wb_gpio_data->pci_domain, wb_gpio_data->pci_bus, devfn);
+    if (pci_dev == NULL) {
+        dev_err(&plat_dev->dev, "Failed to find pci_dev, domain:0x%04x, bus:0x%02x, devfn:0x%x\n",
+            wb_gpio_data->pci_domain, wb_gpio_data->pci_bus, devfn);
+        return -ENXIO;
+    }
+    wb_gpio_data->pci_dev = pci_dev;
+    ret = pci_dev_init(wb_gpio_data, pci_dev);
+    if (ret != 0) {
+        dev_err(&plat_dev->dev, "Failed to get pci bar address.\n");
+        return ret;
+    }
+    C3000_GPIO_VERBOSE("pci_dev_init success, pci_mem_bae: 0x%pK, res0: 0x%pK, res1: 0x%pK\n",
+        wb_gpio_data->pci_mem_base, wb_gpio_data->res[0], wb_gpio_data->res[1]);
+
+    platform_set_drvdata(plat_dev, wb_gpio_data);
+
+    ret = wb_pinctrl_probe(plat_dev, &dnv_soc_data);
+    if (ret) {
+        dev_err(&plat_dev->dev, "C3000 gpio pinctrl probe failed, ret:%d\n", ret);
+        pci_dev_release(wb_gpio_data);
+        return ret;
+    }
+    dev_info(&plat_dev->dev, "C3000 gpio pinctrl probe success.\n");
+    return 0;
+}
+
+static int wb_gpio_driver_remove(struct platform_device *plat_dev)
+{
+    wb_gpio_data_t *wb_gpio_data;
+
+    C3000_GPIO_VERBOSE("c3000_gpio_pcie_remove.\n");
+
+    wb_gpio_data = platform_get_drvdata(plat_dev);
+    pci_dev_release(wb_gpio_data);
+    return 0;
+}
+
+static const struct of_device_id gpio_c3000_match[] = {
+	{
+		.compatible = "wb_gpio_c3000",
+	},
+	{},
+};
+MODULE_DEVICE_TABLE(of, gpio_c3000_match);
+
+static struct platform_driver wb_gpio_c3000_driver = {
+	.driver = {
+		.name		= "wb_gpio_c3000",
+		.of_match_table = gpio_c3000_match,
+	},
+	.probe = wb_gpio_driver_probe,
+	.remove = wb_gpio_driver_remove,
+};
+
+module_platform_driver(wb_gpio_c3000_driver);
+
+MODULE_DESCRIPTION("C3000 GPIO Controller driver");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/pinctrl/wb_gpio_c3000_device.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/pinctrl/wb_gpio_c3000_device.c
new file mode 100644
index 000000000..33ab19a5a
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/pinctrl/wb_gpio_c3000_device.c
@@ -0,0 +1,69 @@
+#include <linux/module.h>
+#include <linux/io.h>
+#include <linux/device.h>
+#include <linux/delay.h>
+#include <linux/platform_device.h>
+
+#include "wb_pinctrl_intel.h"
+
+static int g_wb_c300_gpio_device_debug = 0;
+static int g_wb_c300_gpio_device_error = 0;
+
+module_param(g_wb_c300_gpio_device_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_c300_gpio_device_error, int, S_IRUGO | S_IWUSR);
+
+#define WB_C3000_GPIO_DEVICE_DEBUG(fmt, args...) do {                                        \
+    if (g_wb_c300_gpio_device_debug) { \
+        printk(KERN_INFO "[WB_C3000_GPIO_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define WB_C3000_GPIO_DEVICE_ERROR(fmt, args...) do {                                        \
+    if (g_wb_c300_gpio_device_error) { \
+        printk(KERN_ERR "[WB_C3000_GPIO_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+static wb_gpio_data_t c3000_gpio_device_data = {
+    .irq = 15,
+    .pci_domain = 0x0000,
+    .pci_bus = 0x00,
+    .pci_slot = 0x1f,
+    .pci_fn = 1,
+    .pci_bar = 0,
+};
+
+static void wb_c3000_gpio_device_release(struct device *dev)
+{
+    return;
+}
+
+static struct platform_device c3000_gpio_device = {
+    .name   = "wb_gpio_c3000",
+    .id = -1,
+    .dev    = {
+        .platform_data = &c3000_gpio_device_data,
+        .release = wb_c3000_gpio_device_release,
+    },
+};
+
+static int __init wb_c3000_gpio_device_init(void)
+{
+    WB_C3000_GPIO_DEVICE_DEBUG("wb_c3000_gpio_device_init enter!\n");
+    return platform_device_register(&c3000_gpio_device);
+
+}
+
+static void __exit wb_c3000_gpio_device_exit(void)
+{
+
+    WB_C3000_GPIO_DEVICE_DEBUG("wb_c3000_gpio_device_exit enter!\n");
+    platform_device_unregister(&c3000_gpio_device);
+    return;
+}
+
+module_init(wb_c3000_gpio_device_init);
+module_exit(wb_c3000_gpio_device_exit);
+MODULE_DESCRIPTION("C3000 GPIO Controller device");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/pinctrl/wb_pinctrl_intel.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/pinctrl/wb_pinctrl_intel.c
new file mode 100644
index 000000000..7a52f17ac
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/pinctrl/wb_pinctrl_intel.c
@@ -0,0 +1,1829 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Intel pinctrl/GPIO core driver.
+ *
+ * Copyright (C) 2015, Intel Corporation
+ * Authors: Mathias Nyman <mathias.nyman@linux.intel.com>
+ *          Mika Westerberg <mika.westerberg@linux.intel.com>
+ */
+
+#include <linux/acpi.h>
+#include <linux/gpio/driver.h>
+#include <linux/interrupt.h>
+#include <linux/log2.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/property.h>
+#include <linux/time.h>
+
+#include <linux/pinctrl/pinctrl.h>
+#include <linux/pinctrl/pinmux.h>
+#include <linux/pinctrl/pinconf.h>
+#include <linux/pinctrl/pinconf-generic.h>
+
+#include "core.h"
+#include "wb_pinctrl_intel.h"
+
+/* Offset from regs */
+#define REVID				0x000
+#define REVID_SHIFT			16
+#define REVID_MASK			GENMASK(31, 16)
+
+#define PADBAR				0x00c
+
+#define PADOWN_BITS			4
+#define PADOWN_SHIFT(p)			((p) % 8 * PADOWN_BITS)
+#define PADOWN_MASK(p)			(GENMASK(3, 0) << PADOWN_SHIFT(p))
+#define PADOWN_GPP(p)			((p) / 8)
+
+/* Offset from pad_regs */
+#define PADCFG0				0x000
+#define PADCFG0_RXEVCFG_SHIFT		25
+#define PADCFG0_RXEVCFG_MASK		GENMASK(26, 25)
+#define PADCFG0_RXEVCFG_LEVEL		0
+#define PADCFG0_RXEVCFG_EDGE		1
+#define PADCFG0_RXEVCFG_DISABLED	2
+#define PADCFG0_RXEVCFG_EDGE_BOTH	3
+#define PADCFG0_PREGFRXSEL		BIT(24)
+#define PADCFG0_RXINV			BIT(23)
+#define PADCFG0_GPIROUTIOXAPIC		BIT(20)
+#define PADCFG0_GPIROUTSCI		BIT(19)
+#define PADCFG0_GPIROUTSMI		BIT(18)
+#define PADCFG0_GPIROUTNMI		BIT(17)
+#define PADCFG0_PMODE_SHIFT		10
+#define PADCFG0_PMODE_MASK		GENMASK(13, 10)
+#define PADCFG0_PMODE_GPIO		0
+#define PADCFG0_GPIORXDIS		BIT(9)
+#define PADCFG0_GPIOTXDIS		BIT(8)
+#define PADCFG0_GPIORXSTATE		BIT(1)
+#define PADCFG0_GPIOTXSTATE		BIT(0)
+
+#define PADCFG1				0x004
+#define PADCFG1_TERM_UP			BIT(13)
+#define PADCFG1_TERM_SHIFT		10
+#define PADCFG1_TERM_MASK		GENMASK(12, 10)
+#define PADCFG1_TERM_20K		BIT(2)
+#define PADCFG1_TERM_5K			BIT(1)
+#define PADCFG1_TERM_1K			BIT(0)
+#define PADCFG1_TERM_833		(BIT(1) | BIT(0))
+
+#define PADCFG2				0x008
+#define PADCFG2_DEBEN			BIT(0)
+#define PADCFG2_DEBOUNCE_SHIFT		1
+#define PADCFG2_DEBOUNCE_MASK		GENMASK(4, 1)
+
+#define DEBOUNCE_PERIOD_NSEC		31250
+
+struct intel_pad_context {
+	u32 padcfg0;
+	u32 padcfg1;
+	u32 padcfg2;
+};
+
+struct intel_community_context {
+	u32 *intmask;
+	u32 *hostown;
+};
+
+#define pin_to_padno(c, p)	((p) - (c)->pin_base)
+#define padgroup_offset(g, p)	((p) - (g)->base)
+
+static struct intel_community *intel_get_community(struct intel_pinctrl *pctrl,
+						   unsigned int pin)
+{
+	struct intel_community *community;
+	int i;
+
+	for (i = 0; i < pctrl->ncommunities; i++) {
+		community = &pctrl->communities[i];
+		if (pin >= community->pin_base &&
+		    pin < community->pin_base + community->npins)
+			return community;
+	}
+
+	dev_warn(pctrl->dev, "failed to find community for pin %u\n", pin);
+	return NULL;
+}
+
+static const struct intel_padgroup *
+intel_community_get_padgroup(const struct intel_community *community,
+			     unsigned int pin)
+{
+	int i;
+
+	for (i = 0; i < community->ngpps; i++) {
+		const struct intel_padgroup *padgrp = &community->gpps[i];
+
+		if (pin >= padgrp->base && pin < padgrp->base + padgrp->size)
+			return padgrp;
+	}
+
+	return NULL;
+}
+
+static void __iomem *intel_get_padcfg(struct intel_pinctrl *pctrl,
+				      unsigned int pin, unsigned int reg)
+{
+	const struct intel_community *community;
+	unsigned int padno;
+	size_t nregs;
+
+	community = intel_get_community(pctrl, pin);
+	if (!community)
+		return NULL;
+
+	padno = pin_to_padno(community, pin);
+	nregs = (community->features & PINCTRL_FEATURE_DEBOUNCE) ? 4 : 2;
+
+	if (reg >= nregs * 4)
+		return NULL;
+
+	return community->pad_regs + reg + padno * nregs * 4;
+}
+
+static bool intel_pad_owned_by_host(struct intel_pinctrl *pctrl, unsigned int pin)
+{
+	const struct intel_community *community;
+	const struct intel_padgroup *padgrp;
+	unsigned int gpp, offset, gpp_offset;
+	void __iomem *padown;
+
+	community = intel_get_community(pctrl, pin);
+	if (!community)
+		return false;
+	if (!community->padown_offset)
+		return true;
+
+	padgrp = intel_community_get_padgroup(community, pin);
+	if (!padgrp)
+		return false;
+
+	gpp_offset = padgroup_offset(padgrp, pin);
+	gpp = PADOWN_GPP(gpp_offset);
+	offset = community->padown_offset + padgrp->padown_num * 4 + gpp * 4;
+	padown = community->regs + offset;
+
+	return !(readl(padown) & PADOWN_MASK(gpp_offset));
+}
+
+static bool intel_pad_set_acpi_mode(struct intel_pinctrl *pctrl,
+                unsigned pin, bool acpi_mode)
+{
+	const struct intel_community *community;
+	const struct intel_padgroup *padgrp;
+	unsigned int offset, gpp_offset;
+	void __iomem *hostown;
+	uint32_t value;
+
+	community = intel_get_community(pctrl, pin);
+	if (!community)
+		return true;
+	if (!community->hostown_offset)
+		return false;
+
+	padgrp = intel_community_get_padgroup(community, pin);
+	if (!padgrp)
+		return true;
+
+	gpp_offset = padgroup_offset(padgrp, pin);
+	offset = community->hostown_offset + padgrp->reg_num * 4;
+	hostown = community->regs + offset;
+
+	value = readl(hostown);
+	if (acpi_mode) {
+		/* ACPI mode */
+		value &= ~BIT(gpp_offset);
+	} else {
+		/* GPIO mode */
+		value |= BIT(gpp_offset);
+	}
+
+	writel(value, hostown);
+
+	return !(readl(hostown) & BIT(gpp_offset));
+}
+
+static bool intel_pad_acpi_mode(struct intel_pinctrl *pctrl, unsigned int pin)
+{
+	const struct intel_community *community;
+	const struct intel_padgroup *padgrp;
+	unsigned int offset, gpp_offset;
+	void __iomem *hostown;
+
+	community = intel_get_community(pctrl, pin);
+	if (!community)
+		return true;
+	if (!community->hostown_offset)
+		return false;
+
+	padgrp = intel_community_get_padgroup(community, pin);
+	if (!padgrp)
+		return true;
+
+	gpp_offset = padgroup_offset(padgrp, pin);
+	offset = community->hostown_offset + padgrp->reg_num * 4;
+	hostown = community->regs + offset;
+
+	return !(readl(hostown) & BIT(gpp_offset));
+}
+
+/**
+ * enum - Locking variants of the pad configuration
+ *
+ * @PAD_UNLOCKED:	pad is fully controlled by the configuration registers
+ * @PAD_LOCKED:		pad configuration registers, except TX state, are locked
+ * @PAD_LOCKED_TX:	pad configuration TX state is locked
+ * @PAD_LOCKED_FULL:	pad configuration registers are locked completely
+ *
+ * Locking is considered as read-only mode for corresponding registers and
+ * their respective fields. That said, TX state bit is locked separately from
+ * the main locking scheme.
+ */
+enum {
+	PAD_UNLOCKED	= 0,
+	PAD_LOCKED	= 1,
+	PAD_LOCKED_TX	= 2,
+	PAD_LOCKED_FULL	= PAD_LOCKED | PAD_LOCKED_TX,
+};
+
+static int intel_pad_locked(struct intel_pinctrl *pctrl, unsigned int pin)
+{
+	struct intel_community *community;
+	const struct intel_padgroup *padgrp;
+	unsigned int offset, gpp_offset;
+	u32 value;
+	int ret = PAD_UNLOCKED;
+
+	community = intel_get_community(pctrl, pin);
+	if (!community)
+		return PAD_LOCKED_FULL;
+	if (!community->padcfglock_offset)
+		return PAD_UNLOCKED;
+
+	padgrp = intel_community_get_padgroup(community, pin);
+	if (!padgrp)
+		return PAD_LOCKED_FULL;
+
+	gpp_offset = padgroup_offset(padgrp, pin);
+
+	/*
+	 * If PADCFGLOCK and PADCFGLOCKTX bits are both clear for this pad,
+	 * the pad is considered unlocked. Any other case means that it is
+	 * either fully or partially locked.
+	 */
+	offset = community->padcfglock_offset + 0 + padgrp->reg_num * 8;
+	value = readl(community->regs + offset);
+	if (value & BIT(gpp_offset))
+		ret |= PAD_LOCKED;
+
+	offset = community->padcfglock_offset + 4 + padgrp->reg_num * 8;
+	value = readl(community->regs + offset);
+	if (value & BIT(gpp_offset))
+		ret |= PAD_LOCKED_TX;
+
+	return ret;
+}
+
+static bool intel_pad_is_unlocked(struct intel_pinctrl *pctrl, unsigned int pin)
+{
+	return (intel_pad_locked(pctrl, pin) & PAD_LOCKED) == PAD_UNLOCKED;
+}
+
+static bool intel_pad_usable(struct intel_pinctrl *pctrl, unsigned int pin)
+{
+	return intel_pad_owned_by_host(pctrl, pin) && intel_pad_is_unlocked(pctrl, pin);
+}
+
+static int intel_get_groups_count(struct pinctrl_dev *pctldev)
+{
+	struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
+
+	return pctrl->soc->ngroups;
+}
+
+static const char *intel_get_group_name(struct pinctrl_dev *pctldev,
+				      unsigned int group)
+{
+	struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
+
+	return pctrl->soc->groups[group].name;
+}
+
+static int intel_get_group_pins(struct pinctrl_dev *pctldev, unsigned int group,
+			      const unsigned int **pins, unsigned int *npins)
+{
+	struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
+
+	*pins = pctrl->soc->groups[group].pins;
+	*npins = pctrl->soc->groups[group].npins;
+	return 0;
+}
+
+static void intel_pin_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s,
+			       unsigned int pin)
+{
+	struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
+	void __iomem *padcfg;
+	u32 cfg0, cfg1, mode;
+	int locked;
+	bool acpi;
+
+	if (!intel_pad_owned_by_host(pctrl, pin)) {
+		seq_puts(s, "not available");
+		return;
+	}
+
+	cfg0 = readl(intel_get_padcfg(pctrl, pin, PADCFG0));
+	cfg1 = readl(intel_get_padcfg(pctrl, pin, PADCFG1));
+
+	mode = (cfg0 & PADCFG0_PMODE_MASK) >> PADCFG0_PMODE_SHIFT;
+	if (mode == PADCFG0_PMODE_GPIO)
+		seq_puts(s, "GPIO ");
+	else
+		seq_printf(s, "mode %d ", mode);
+
+	seq_printf(s, "0x%08x 0x%08x", cfg0, cfg1);
+
+	/* Dump the additional PADCFG registers if available */
+	padcfg = intel_get_padcfg(pctrl, pin, PADCFG2);
+	if (padcfg)
+		seq_printf(s, " 0x%08x", readl(padcfg));
+
+	locked = intel_pad_locked(pctrl, pin);
+	acpi = intel_pad_acpi_mode(pctrl, pin);
+
+	if (locked || acpi) {
+		seq_puts(s, " [");
+		if (locked)
+			seq_puts(s, "LOCKED");
+		if ((locked & PAD_LOCKED_FULL) == PAD_LOCKED_TX)
+			seq_puts(s, " tx");
+		else if ((locked & PAD_LOCKED_FULL) == PAD_LOCKED_FULL)
+			seq_puts(s, " full");
+
+		if (locked && acpi)
+			seq_puts(s, ", ");
+
+		if (acpi)
+			seq_puts(s, "ACPI");
+		seq_puts(s, "]");
+	}
+}
+
+static const struct pinctrl_ops intel_pinctrl_ops = {
+	.get_groups_count = intel_get_groups_count,
+	.get_group_name = intel_get_group_name,
+	.get_group_pins = intel_get_group_pins,
+	.pin_dbg_show = intel_pin_dbg_show,
+};
+
+static int intel_get_functions_count(struct pinctrl_dev *pctldev)
+{
+	struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
+
+	return pctrl->soc->nfunctions;
+}
+
+static const char *intel_get_function_name(struct pinctrl_dev *pctldev,
+					   unsigned int function)
+{
+	struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
+
+	return pctrl->soc->functions[function].name;
+}
+
+static int intel_get_function_groups(struct pinctrl_dev *pctldev,
+				     unsigned int function,
+				     const char * const **groups,
+				     unsigned int * const ngroups)
+{
+	struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
+
+	*groups = pctrl->soc->functions[function].groups;
+	*ngroups = pctrl->soc->functions[function].ngroups;
+	return 0;
+}
+
+static int intel_pinmux_set_mux(struct pinctrl_dev *pctldev,
+				unsigned int function, unsigned int group)
+{
+	struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
+	const struct intel_pingroup *grp = &pctrl->soc->groups[group];
+	unsigned long flags;
+	int i;
+
+	raw_spin_lock_irqsave(&pctrl->lock, flags);
+
+	/*
+	 * All pins in the groups needs to be accessible and writable
+	 * before we can enable the mux for this group.
+	 */
+	for (i = 0; i < grp->npins; i++) {
+		if (!intel_pad_usable(pctrl, grp->pins[i])) {
+			raw_spin_unlock_irqrestore(&pctrl->lock, flags);
+			return -EBUSY;
+		}
+	}
+
+	/* Now enable the mux setting for each pin in the group */
+	for (i = 0; i < grp->npins; i++) {
+		void __iomem *padcfg0;
+		u32 value;
+
+		padcfg0 = intel_get_padcfg(pctrl, grp->pins[i], PADCFG0);
+		value = readl(padcfg0);
+
+		value &= ~PADCFG0_PMODE_MASK;
+
+		if (grp->modes)
+			value |= grp->modes[i] << PADCFG0_PMODE_SHIFT;
+		else
+			value |= grp->mode << PADCFG0_PMODE_SHIFT;
+
+		writel(value, padcfg0);
+	}
+
+	raw_spin_unlock_irqrestore(&pctrl->lock, flags);
+
+	return 0;
+}
+
+static void __intel_gpio_set_direction(void __iomem *padcfg0, bool input)
+{
+	u32 value;
+
+	value = readl(padcfg0);
+	if (input) {
+		value &= ~PADCFG0_GPIORXDIS;
+		value |= PADCFG0_GPIOTXDIS;
+	} else {
+		value &= ~PADCFG0_GPIOTXDIS;
+		value |= PADCFG0_GPIORXDIS;
+	}
+	writel(value, padcfg0);
+}
+
+static int intel_gpio_get_gpio_mode(void __iomem *padcfg0)
+{
+	return (readl(padcfg0) & PADCFG0_PMODE_MASK) >> PADCFG0_PMODE_SHIFT;
+}
+
+static void intel_gpio_set_gpio_mode(void __iomem *padcfg0)
+{
+	u32 value;
+
+	value = readl(padcfg0);
+
+	/* Put the pad into GPIO mode */
+	value &= ~PADCFG0_PMODE_MASK;
+	value |= PADCFG0_PMODE_GPIO;
+
+	/* Disable input and output buffers */
+	value |= PADCFG0_GPIORXDIS;
+	value |= PADCFG0_GPIOTXDIS;
+
+	/* Disable SCI/SMI/NMI generation */
+	value &= ~(PADCFG0_GPIROUTIOXAPIC | PADCFG0_GPIROUTSCI);
+	value &= ~(PADCFG0_GPIROUTSMI | PADCFG0_GPIROUTNMI);
+
+	writel(value, padcfg0);
+}
+
+static int intel_gpio_request_enable(struct pinctrl_dev *pctldev,
+				     struct pinctrl_gpio_range *range,
+				     unsigned int pin)
+{
+	struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
+	void __iomem *padcfg0;
+	unsigned long flags;
+
+	padcfg0 = intel_get_padcfg(pctrl, pin, PADCFG0);
+
+	raw_spin_lock_irqsave(&pctrl->lock, flags);
+
+	if (!intel_pad_owned_by_host(pctrl, pin)) {
+		raw_spin_unlock_irqrestore(&pctrl->lock, flags);
+		return -EBUSY;
+	}
+
+	if (!intel_pad_is_unlocked(pctrl, pin)) {
+		raw_spin_unlock_irqrestore(&pctrl->lock, flags);
+		return 0;
+	}
+
+	/*
+	 * If pin is already configured in GPIO mode, we assume that
+	 * firmware provides correct settings. In such case we avoid
+	 * potential glitches on the pin. Otherwise, for the pin in
+	 * alternative mode, consumer has to supply respective flags.
+	 */
+	if (intel_gpio_get_gpio_mode(padcfg0) == PADCFG0_PMODE_GPIO) {
+		raw_spin_unlock_irqrestore(&pctrl->lock, flags);
+		return 0;
+	}
+
+	intel_gpio_set_gpio_mode(padcfg0);
+
+	/* Disable TX buffer and enable RX (this will be input) */
+	__intel_gpio_set_direction(padcfg0, true);
+
+	raw_spin_unlock_irqrestore(&pctrl->lock, flags);
+
+	return 0;
+}
+
+static int intel_gpio_set_direction(struct pinctrl_dev *pctldev,
+				    struct pinctrl_gpio_range *range,
+				    unsigned int pin, bool input)
+{
+	struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
+	void __iomem *padcfg0;
+	unsigned long flags;
+
+	padcfg0 = intel_get_padcfg(pctrl, pin, PADCFG0);
+
+	raw_spin_lock_irqsave(&pctrl->lock, flags);
+	__intel_gpio_set_direction(padcfg0, input);
+	raw_spin_unlock_irqrestore(&pctrl->lock, flags);
+
+	return 0;
+}
+
+static const struct pinmux_ops intel_pinmux_ops = {
+	.get_functions_count = intel_get_functions_count,
+	.get_function_name = intel_get_function_name,
+	.get_function_groups = intel_get_function_groups,
+	.set_mux = intel_pinmux_set_mux,
+	.gpio_request_enable = intel_gpio_request_enable,
+	.gpio_set_direction = intel_gpio_set_direction,
+};
+
+static int intel_config_get_pull(struct intel_pinctrl *pctrl, unsigned int pin,
+				 enum pin_config_param param, u32 *arg)
+{
+	const struct intel_community *community;
+	void __iomem *padcfg1;
+	unsigned long flags;
+	u32 value, term;
+
+	community = intel_get_community(pctrl, pin);
+	padcfg1 = intel_get_padcfg(pctrl, pin, PADCFG1);
+
+	raw_spin_lock_irqsave(&pctrl->lock, flags);
+	value = readl(padcfg1);
+	raw_spin_unlock_irqrestore(&pctrl->lock, flags);
+
+	term = (value & PADCFG1_TERM_MASK) >> PADCFG1_TERM_SHIFT;
+
+	switch (param) {
+	case PIN_CONFIG_BIAS_DISABLE:
+		if (term)
+			return -EINVAL;
+		break;
+
+	case PIN_CONFIG_BIAS_PULL_UP:
+		if (!term || !(value & PADCFG1_TERM_UP))
+			return -EINVAL;
+
+		switch (term) {
+		case PADCFG1_TERM_833:
+			*arg = 833;
+			break;
+		case PADCFG1_TERM_1K:
+			*arg = 1000;
+			break;
+		case PADCFG1_TERM_5K:
+			*arg = 5000;
+			break;
+		case PADCFG1_TERM_20K:
+			*arg = 20000;
+			break;
+		}
+
+		break;
+
+	case PIN_CONFIG_BIAS_PULL_DOWN:
+		if (!term || value & PADCFG1_TERM_UP)
+			return -EINVAL;
+
+		switch (term) {
+		case PADCFG1_TERM_833:
+			if (!(community->features & PINCTRL_FEATURE_1K_PD))
+				return -EINVAL;
+			*arg = 833;
+			break;
+		case PADCFG1_TERM_1K:
+			if (!(community->features & PINCTRL_FEATURE_1K_PD))
+				return -EINVAL;
+			*arg = 1000;
+			break;
+		case PADCFG1_TERM_5K:
+			*arg = 5000;
+			break;
+		case PADCFG1_TERM_20K:
+			*arg = 20000;
+			break;
+		}
+
+		break;
+
+	default:
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
+static int intel_config_get_debounce(struct intel_pinctrl *pctrl, unsigned int pin,
+				     enum pin_config_param param, u32 *arg)
+{
+	void __iomem *padcfg2;
+	unsigned long flags;
+	unsigned long v;
+	u32 value2;
+
+	padcfg2 = intel_get_padcfg(pctrl, pin, PADCFG2);
+	if (!padcfg2)
+		return -ENOTSUPP;
+
+	raw_spin_lock_irqsave(&pctrl->lock, flags);
+	value2 = readl(padcfg2);
+	raw_spin_unlock_irqrestore(&pctrl->lock, flags);
+	if (!(value2 & PADCFG2_DEBEN))
+		return -EINVAL;
+
+	v = (value2 & PADCFG2_DEBOUNCE_MASK) >> PADCFG2_DEBOUNCE_SHIFT;
+	*arg = BIT(v) * DEBOUNCE_PERIOD_NSEC / NSEC_PER_USEC;
+
+	return 0;
+}
+
+static int intel_config_get(struct pinctrl_dev *pctldev, unsigned int pin,
+			    unsigned long *config)
+{
+	struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
+	enum pin_config_param param = pinconf_to_config_param(*config);
+	u32 arg = 0;
+	int ret;
+
+	if (!intel_pad_owned_by_host(pctrl, pin))
+		return -ENOTSUPP;
+
+	switch (param) {
+	case PIN_CONFIG_BIAS_DISABLE:
+	case PIN_CONFIG_BIAS_PULL_UP:
+	case PIN_CONFIG_BIAS_PULL_DOWN:
+		ret = intel_config_get_pull(pctrl, pin, param, &arg);
+		if (ret)
+			return ret;
+		break;
+
+	case PIN_CONFIG_INPUT_DEBOUNCE:
+		ret = intel_config_get_debounce(pctrl, pin, param, &arg);
+		if (ret)
+			return ret;
+		break;
+
+	default:
+		return -ENOTSUPP;
+	}
+
+	*config = pinconf_to_config_packed(param, arg);
+	return 0;
+}
+
+static int intel_config_set_pull(struct intel_pinctrl *pctrl, unsigned int pin,
+				 unsigned long config)
+{
+	unsigned int param = pinconf_to_config_param(config);
+	unsigned int arg = pinconf_to_config_argument(config);
+	const struct intel_community *community;
+	void __iomem *padcfg1;
+	unsigned long flags;
+	int ret = 0;
+	u32 value;
+
+	community = intel_get_community(pctrl, pin);
+	padcfg1 = intel_get_padcfg(pctrl, pin, PADCFG1);
+
+	raw_spin_lock_irqsave(&pctrl->lock, flags);
+
+	value = readl(padcfg1);
+
+	switch (param) {
+	case PIN_CONFIG_BIAS_DISABLE:
+		value &= ~(PADCFG1_TERM_MASK | PADCFG1_TERM_UP);
+		break;
+
+	case PIN_CONFIG_BIAS_PULL_UP:
+		value &= ~PADCFG1_TERM_MASK;
+
+		value |= PADCFG1_TERM_UP;
+
+		/* Set default strength value in case none is given */
+		if (arg == 1)
+			arg = 5000;
+
+		switch (arg) {
+		case 20000:
+			value |= PADCFG1_TERM_20K << PADCFG1_TERM_SHIFT;
+			break;
+		case 5000:
+			value |= PADCFG1_TERM_5K << PADCFG1_TERM_SHIFT;
+			break;
+		case 1000:
+			value |= PADCFG1_TERM_1K << PADCFG1_TERM_SHIFT;
+			break;
+		case 833:
+			value |= PADCFG1_TERM_833 << PADCFG1_TERM_SHIFT;
+			break;
+		default:
+			ret = -EINVAL;
+		}
+
+		break;
+
+	case PIN_CONFIG_BIAS_PULL_DOWN:
+		value &= ~(PADCFG1_TERM_UP | PADCFG1_TERM_MASK);
+
+		/* Set default strength value in case none is given */
+		if (arg == 1)
+			arg = 5000;
+
+		switch (arg) {
+		case 20000:
+			value |= PADCFG1_TERM_20K << PADCFG1_TERM_SHIFT;
+			break;
+		case 5000:
+			value |= PADCFG1_TERM_5K << PADCFG1_TERM_SHIFT;
+			break;
+		case 1000:
+			if (!(community->features & PINCTRL_FEATURE_1K_PD)) {
+				ret = -EINVAL;
+				break;
+			}
+			value |= PADCFG1_TERM_1K << PADCFG1_TERM_SHIFT;
+			break;
+		case 833:
+			if (!(community->features & PINCTRL_FEATURE_1K_PD)) {
+				ret = -EINVAL;
+				break;
+			}
+			value |= PADCFG1_TERM_833 << PADCFG1_TERM_SHIFT;
+			break;
+		default:
+			ret = -EINVAL;
+		}
+
+		break;
+	}
+
+	if (!ret)
+		writel(value, padcfg1);
+
+	raw_spin_unlock_irqrestore(&pctrl->lock, flags);
+
+	return ret;
+}
+
+static int intel_config_set_debounce(struct intel_pinctrl *pctrl,
+				     unsigned int pin, unsigned int debounce)
+{
+	void __iomem *padcfg0, *padcfg2;
+	unsigned long flags;
+	u32 value0, value2;
+
+	padcfg2 = intel_get_padcfg(pctrl, pin, PADCFG2);
+	if (!padcfg2)
+		return -ENOTSUPP;
+
+	padcfg0 = intel_get_padcfg(pctrl, pin, PADCFG0);
+
+	raw_spin_lock_irqsave(&pctrl->lock, flags);
+
+	value0 = readl(padcfg0);
+	value2 = readl(padcfg2);
+
+	/* Disable glitch filter and debouncer */
+	value0 &= ~PADCFG0_PREGFRXSEL;
+	value2 &= ~(PADCFG2_DEBEN | PADCFG2_DEBOUNCE_MASK);
+
+	if (debounce) {
+		unsigned long v;
+
+		v = order_base_2(debounce * NSEC_PER_USEC / DEBOUNCE_PERIOD_NSEC);
+		if (v < 3 || v > 15) {
+			raw_spin_unlock_irqrestore(&pctrl->lock, flags);
+			return -EINVAL;
+		}
+
+		/* Enable glitch filter and debouncer */
+		value0 |= PADCFG0_PREGFRXSEL;
+		value2 |= v << PADCFG2_DEBOUNCE_SHIFT;
+		value2 |= PADCFG2_DEBEN;
+	}
+
+	writel(value0, padcfg0);
+	writel(value2, padcfg2);
+
+	raw_spin_unlock_irqrestore(&pctrl->lock, flags);
+
+	return 0;
+}
+
+static int intel_config_set(struct pinctrl_dev *pctldev, unsigned int pin,
+			  unsigned long *configs, unsigned int nconfigs)
+{
+	struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
+	int i, ret;
+
+	if (!intel_pad_usable(pctrl, pin))
+		return -ENOTSUPP;
+
+	for (i = 0; i < nconfigs; i++) {
+		switch (pinconf_to_config_param(configs[i])) {
+		case PIN_CONFIG_BIAS_DISABLE:
+		case PIN_CONFIG_BIAS_PULL_UP:
+		case PIN_CONFIG_BIAS_PULL_DOWN:
+			ret = intel_config_set_pull(pctrl, pin, configs[i]);
+			if (ret)
+				return ret;
+			break;
+
+		case PIN_CONFIG_INPUT_DEBOUNCE:
+			ret = intel_config_set_debounce(pctrl, pin,
+				pinconf_to_config_argument(configs[i]));
+			if (ret)
+				return ret;
+			break;
+
+		default:
+			return -ENOTSUPP;
+		}
+	}
+
+	return 0;
+}
+
+static const struct pinconf_ops intel_pinconf_ops = {
+	.is_generic = true,
+	.pin_config_get = intel_config_get,
+	.pin_config_set = intel_config_set,
+};
+
+static const struct pinctrl_desc intel_pinctrl_desc = {
+	.pctlops = &intel_pinctrl_ops,
+	.pmxops = &intel_pinmux_ops,
+	.confops = &intel_pinconf_ops,
+	.owner = THIS_MODULE,
+};
+
+/**
+ * intel_gpio_to_pin() - Translate from GPIO offset to pin number
+ * @pctrl: Pinctrl structure
+ * @offset: GPIO offset from gpiolib
+ * @community: Community is filled here if not %NULL
+ * @padgrp: Pad group is filled here if not %NULL
+ *
+ * When coming through gpiolib irqchip, the GPIO offset is not
+ * automatically translated to pinctrl pin number. This function can be
+ * used to find out the corresponding pinctrl pin.
+ */
+static int intel_gpio_to_pin(struct intel_pinctrl *pctrl, unsigned int offset,
+			     const struct intel_community **community,
+			     const struct intel_padgroup **padgrp)
+{
+	int i;
+
+	for (i = 0; i < pctrl->ncommunities; i++) {
+		const struct intel_community *comm = &pctrl->communities[i];
+		int j;
+
+		for (j = 0; j < comm->ngpps; j++) {
+			const struct intel_padgroup *pgrp = &comm->gpps[j];
+
+			if (pgrp->gpio_base == INTEL_GPIO_BASE_NOMAP)
+				continue;
+
+			if (offset >= pgrp->gpio_base &&
+			    offset < pgrp->gpio_base + pgrp->size) {
+				int pin;
+
+				pin = pgrp->base + offset - pgrp->gpio_base;
+				if (community)
+					*community = comm;
+				if (padgrp)
+					*padgrp = pgrp;
+
+				return pin;
+			}
+		}
+	}
+
+	return -EINVAL;
+}
+
+/**
+ * intel_pin_to_gpio() - Translate from pin number to GPIO offset
+ * @pctrl: Pinctrl structure
+ * @pin: pin number
+ *
+ * Translate the pin number of pinctrl to GPIO offset
+ */
+static __maybe_unused int intel_pin_to_gpio(struct intel_pinctrl *pctrl, int pin)
+{
+	const struct intel_community *community;
+	const struct intel_padgroup *padgrp;
+
+	community = intel_get_community(pctrl, pin);
+	if (!community)
+		return -EINVAL;
+
+	padgrp = intel_community_get_padgroup(community, pin);
+	if (!padgrp)
+		return -EINVAL;
+
+	return pin - padgrp->base + padgrp->gpio_base;
+}
+
+static int intel_gpio_get(struct gpio_chip *chip, unsigned int offset)
+{
+	struct intel_pinctrl *pctrl = gpiochip_get_data(chip);
+	void __iomem *reg;
+	u32 padcfg0;
+	int pin;
+
+	pin = intel_gpio_to_pin(pctrl, offset, NULL, NULL);
+	if (pin < 0)
+		return -EINVAL;
+
+	reg = intel_get_padcfg(pctrl, pin, PADCFG0);
+	if (!reg)
+		return -EINVAL;
+
+	padcfg0 = readl(reg);
+	if (!(padcfg0 & PADCFG0_GPIOTXDIS))
+		return !!(padcfg0 & PADCFG0_GPIOTXSTATE);
+
+	return !!(padcfg0 & PADCFG0_GPIORXSTATE);
+}
+
+static void intel_gpio_set(struct gpio_chip *chip, unsigned int offset,
+			   int value)
+{
+	struct intel_pinctrl *pctrl = gpiochip_get_data(chip);
+	unsigned long flags;
+	void __iomem *reg;
+	u32 padcfg0;
+	int pin;
+
+	pin = intel_gpio_to_pin(pctrl, offset, NULL, NULL);
+	if (pin < 0)
+		return;
+
+	reg = intel_get_padcfg(pctrl, pin, PADCFG0);
+	if (!reg)
+		return;
+
+	raw_spin_lock_irqsave(&pctrl->lock, flags);
+	padcfg0 = readl(reg);
+	if (value)
+		padcfg0 |= PADCFG0_GPIOTXSTATE;
+	else
+		padcfg0 &= ~PADCFG0_GPIOTXSTATE;
+	writel(padcfg0, reg);
+	raw_spin_unlock_irqrestore(&pctrl->lock, flags);
+}
+
+static int intel_gpio_get_direction(struct gpio_chip *chip, unsigned int offset)
+{
+	struct intel_pinctrl *pctrl = gpiochip_get_data(chip);
+	unsigned long flags;
+	void __iomem *reg;
+	u32 padcfg0;
+	int pin;
+
+	pin = intel_gpio_to_pin(pctrl, offset, NULL, NULL);
+	if (pin < 0)
+		return -EINVAL;
+
+	reg = intel_get_padcfg(pctrl, pin, PADCFG0);
+	if (!reg)
+		return -EINVAL;
+
+	raw_spin_lock_irqsave(&pctrl->lock, flags);
+	padcfg0 = readl(reg);
+	raw_spin_unlock_irqrestore(&pctrl->lock, flags);
+	if (padcfg0 & PADCFG0_PMODE_MASK)
+		return -EINVAL;
+
+	if (padcfg0 & PADCFG0_GPIOTXDIS)
+		return GPIO_LINE_DIRECTION_IN;
+
+	return GPIO_LINE_DIRECTION_OUT;
+}
+
+static int intel_gpio_direction_input(struct gpio_chip *chip, unsigned int offset)
+{
+	return pinctrl_gpio_direction_input(chip->base + offset);
+}
+
+static int intel_gpio_direction_output(struct gpio_chip *chip, unsigned int offset,
+				       int value)
+{
+	intel_gpio_set(chip, offset, value);
+	return pinctrl_gpio_direction_output(chip->base + offset);
+}
+
+static const struct gpio_chip intel_gpio_chip = {
+	.owner = THIS_MODULE,
+	.request = gpiochip_generic_request,
+	.free = gpiochip_generic_free,
+	.get_direction = intel_gpio_get_direction,
+	.direction_input = intel_gpio_direction_input,
+	.direction_output = intel_gpio_direction_output,
+	.get = intel_gpio_get,
+	.set = intel_gpio_set,
+	.set_config = gpiochip_generic_config,
+};
+
+static void intel_gpio_irq_ack(struct irq_data *d)
+{
+	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
+	struct intel_pinctrl *pctrl = gpiochip_get_data(gc);
+	const struct intel_community *community;
+	const struct intel_padgroup *padgrp;
+	int pin;
+
+	pin = intel_gpio_to_pin(pctrl, irqd_to_hwirq(d), &community, &padgrp);
+	if (pin >= 0) {
+		unsigned int gpp, gpp_offset, is_offset;
+
+		gpp = padgrp->reg_num;
+		gpp_offset = padgroup_offset(padgrp, pin);
+		is_offset = community->is_offset + gpp * 4;
+
+		raw_spin_lock(&pctrl->lock);
+		writel(BIT(gpp_offset), community->regs + is_offset);
+		raw_spin_unlock(&pctrl->lock);
+	}
+}
+
+static void intel_gpio_irq_mask_unmask(struct irq_data *d, bool mask)
+{
+	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
+	struct intel_pinctrl *pctrl = gpiochip_get_data(gc);
+	const struct intel_community *community;
+	const struct intel_padgroup *padgrp;
+	int pin;
+
+	pin = intel_gpio_to_pin(pctrl, irqd_to_hwirq(d), &community, &padgrp);
+	if (pin >= 0) {
+		unsigned int gpp, gpp_offset;
+		unsigned long flags;
+		void __iomem *reg, *is;
+		u32 value;
+
+		gpp = padgrp->reg_num;
+		gpp_offset = padgroup_offset(padgrp, pin);
+
+		reg = community->regs + community->ie_offset + gpp * 4;
+		is = community->regs + community->is_offset + gpp * 4;
+
+		raw_spin_lock_irqsave(&pctrl->lock, flags);
+
+		/* Clear interrupt status first to avoid unexpected interrupt */
+		writel(BIT(gpp_offset), is);
+
+		value = readl(reg);
+		if (mask)
+			value &= ~BIT(gpp_offset);
+		else
+			value |= BIT(gpp_offset);
+		writel(value, reg);
+		raw_spin_unlock_irqrestore(&pctrl->lock, flags);
+	}
+}
+
+static void intel_gpio_irq_mask(struct irq_data *d)
+{
+	intel_gpio_irq_mask_unmask(d, true);
+}
+
+static void intel_gpio_irq_unmask(struct irq_data *d)
+{
+	intel_gpio_irq_mask_unmask(d, false);
+}
+
+static int intel_gpio_irq_type(struct irq_data *d, unsigned int type)
+{
+	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
+	struct intel_pinctrl *pctrl = gpiochip_get_data(gc);
+	unsigned int pin = intel_gpio_to_pin(pctrl, irqd_to_hwirq(d), NULL, NULL);
+	unsigned long flags;
+	void __iomem *reg;
+	u32 value;
+
+	reg = intel_get_padcfg(pctrl, pin, PADCFG0);
+	if (!reg)
+		return -EINVAL;
+
+	/* set not ACPI mode */
+	intel_pad_set_acpi_mode(pctrl, pin, false);
+
+	/*
+	 * If the pin is in ACPI mode it is still usable as a GPIO but it
+	 * cannot be used as IRQ because GPI_IS status bit will not be
+	 * updated by the host controller hardware.
+	 */
+	if (intel_pad_acpi_mode(pctrl, pin)) {
+		dev_warn(pctrl->dev, "pin %u cannot be used as IRQ\n", pin);
+		return -EPERM;
+	}
+
+	raw_spin_lock_irqsave(&pctrl->lock, flags);
+
+	intel_gpio_set_gpio_mode(reg);
+
+	/* Disable TX buffer and enable RX (this will be input) */
+	__intel_gpio_set_direction(reg, true);
+
+	value = readl(reg);
+
+	value &= ~(PADCFG0_RXEVCFG_MASK | PADCFG0_RXINV);
+
+	if ((type & IRQ_TYPE_EDGE_BOTH) == IRQ_TYPE_EDGE_BOTH) {
+		value |= PADCFG0_RXEVCFG_EDGE_BOTH << PADCFG0_RXEVCFG_SHIFT;
+	} else if (type & IRQ_TYPE_EDGE_FALLING) {
+		value |= PADCFG0_RXEVCFG_EDGE << PADCFG0_RXEVCFG_SHIFT;
+		value |= PADCFG0_RXINV;
+	} else if (type & IRQ_TYPE_EDGE_RISING) {
+		value |= PADCFG0_RXEVCFG_EDGE << PADCFG0_RXEVCFG_SHIFT;
+	} else if (type & IRQ_TYPE_LEVEL_MASK) {
+		if (type & IRQ_TYPE_LEVEL_LOW)
+			value |= PADCFG0_RXINV;
+	} else {
+		value |= PADCFG0_RXEVCFG_DISABLED << PADCFG0_RXEVCFG_SHIFT;
+	}
+
+	writel(value, reg);
+
+	if (type & IRQ_TYPE_EDGE_BOTH)
+		irq_set_handler_locked(d, handle_edge_irq);
+	else if (type & IRQ_TYPE_LEVEL_MASK)
+		irq_set_handler_locked(d, handle_level_irq);
+
+	raw_spin_unlock_irqrestore(&pctrl->lock, flags);
+
+	return 0;
+}
+
+static int intel_gpio_irq_wake(struct irq_data *d, unsigned int on)
+{
+	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
+	struct intel_pinctrl *pctrl = gpiochip_get_data(gc);
+	unsigned int pin = intel_gpio_to_pin(pctrl, irqd_to_hwirq(d), NULL, NULL);
+
+	if (on)
+		enable_irq_wake(pctrl->irq);
+	else
+		disable_irq_wake(pctrl->irq);
+
+	dev_dbg(pctrl->dev, "%sable wake for pin %u\n", on ? "en" : "dis", pin);
+	return 0;
+}
+
+static int intel_gpio_community_irq_handler(struct intel_pinctrl *pctrl,
+					    const struct intel_community *community)
+{
+	struct gpio_chip *gc = &pctrl->chip;
+	unsigned int gpp;
+	int ret = 0;
+
+	for (gpp = 0; gpp < community->ngpps; gpp++) {
+		const struct intel_padgroup *padgrp = &community->gpps[gpp];
+		unsigned long pending, enabled, gpp_offset;
+		unsigned long flags;
+
+		raw_spin_lock_irqsave(&pctrl->lock, flags);
+
+		pending = readl(community->regs + community->is_offset +
+				padgrp->reg_num * 4);
+		enabled = readl(community->regs + community->ie_offset +
+				padgrp->reg_num * 4);
+
+		raw_spin_unlock_irqrestore(&pctrl->lock, flags);
+
+		/* Only interrupts that are enabled */
+		pending &= enabled;
+
+		for_each_set_bit(gpp_offset, &pending, padgrp->size) {
+			unsigned int irq;
+
+			irq = irq_find_mapping(gc->irq.domain,
+					       padgrp->gpio_base + gpp_offset);
+			generic_handle_irq(irq);
+		}
+
+		ret += pending ? 1 : 0;
+	}
+
+	return ret;
+}
+
+static irqreturn_t intel_gpio_irq(int irq, void *data)
+{
+	const struct intel_community *community;
+	struct intel_pinctrl *pctrl = data;
+	unsigned int i;
+	int ret = 0;
+
+	/* Need to check all communities for pending interrupts */
+	for (i = 0; i < pctrl->ncommunities; i++) {
+		community = &pctrl->communities[i];
+		ret += intel_gpio_community_irq_handler(pctrl, community);
+	}
+
+	return IRQ_RETVAL(ret);
+}
+
+static int intel_gpio_add_community_ranges(struct intel_pinctrl *pctrl,
+				const struct intel_community *community)
+{
+	int ret = 0, i;
+
+	for (i = 0; i < community->ngpps; i++) {
+		const struct intel_padgroup *gpp = &community->gpps[i];
+
+		if (gpp->gpio_base == INTEL_GPIO_BASE_NOMAP)
+			continue;
+
+		ret = gpiochip_add_pin_range(&pctrl->chip, dev_name(pctrl->dev),
+					     gpp->gpio_base, gpp->base,
+					     gpp->size);
+		if (ret)
+			return ret;
+	}
+
+	return ret;
+}
+
+static int intel_gpio_add_pin_ranges(struct gpio_chip *gc)
+{
+	struct intel_pinctrl *pctrl = gpiochip_get_data(gc);
+	int ret, i;
+
+	for (i = 0; i < pctrl->ncommunities; i++) {
+		struct intel_community *community = &pctrl->communities[i];
+
+		ret = intel_gpio_add_community_ranges(pctrl, community);
+		if (ret) {
+			dev_err(pctrl->dev, "failed to add GPIO pin range\n");
+			return ret;
+		}
+	}
+
+	return 0;
+}
+
+static unsigned int intel_gpio_ngpio(const struct intel_pinctrl *pctrl)
+{
+	const struct intel_community *community;
+	unsigned int ngpio = 0;
+	int i, j;
+
+	for (i = 0; i < pctrl->ncommunities; i++) {
+		community = &pctrl->communities[i];
+		for (j = 0; j < community->ngpps; j++) {
+			const struct intel_padgroup *gpp = &community->gpps[j];
+
+			if (gpp->gpio_base == INTEL_GPIO_BASE_NOMAP)
+				continue;
+
+			if (gpp->gpio_base + gpp->size > ngpio)
+				ngpio = gpp->gpio_base + gpp->size;
+		}
+	}
+
+	return ngpio;
+}
+
+static int intel_gpio_probe(struct intel_pinctrl *pctrl, int irq)
+{
+	int ret;
+	struct gpio_irq_chip *girq;
+
+	pctrl->chip = intel_gpio_chip;
+
+	/* Setup GPIO chip */
+	pctrl->chip.ngpio = intel_gpio_ngpio(pctrl);
+	pctrl->chip.label = dev_name(pctrl->dev);
+	pctrl->chip.parent = pctrl->dev;
+	pctrl->chip.base = 0;
+	pctrl->chip.add_pin_ranges = intel_gpio_add_pin_ranges;
+	pctrl->irq = irq;
+
+	/* Setup IRQ chip */
+	pctrl->irqchip.name = dev_name(pctrl->dev);
+	pctrl->irqchip.irq_ack = intel_gpio_irq_ack;
+	pctrl->irqchip.irq_mask = intel_gpio_irq_mask;
+	pctrl->irqchip.irq_unmask = intel_gpio_irq_unmask;
+	pctrl->irqchip.irq_set_type = intel_gpio_irq_type;
+	pctrl->irqchip.irq_set_wake = intel_gpio_irq_wake;
+	pctrl->irqchip.flags = IRQCHIP_MASK_ON_SUSPEND;
+
+	/*
+	 * On some platforms several GPIO controllers share the same interrupt
+	 * line.
+	 */
+	ret = devm_request_irq(pctrl->dev, irq, intel_gpio_irq,
+			       IRQF_SHARED | IRQF_NO_THREAD,
+			       dev_name(pctrl->dev), pctrl);
+	if (ret) {
+		dev_err(pctrl->dev, "failed to request interrupt\n");
+		return ret;
+	}
+
+	girq = &pctrl->chip.irq;
+	girq->chip = &pctrl->irqchip;
+	/* This will let us handle the IRQ in the driver */
+	girq->parent_handler = NULL;
+	girq->num_parents = 0;
+	girq->default_type = IRQ_TYPE_NONE;
+	girq->handler = handle_bad_irq;
+
+	ret = devm_gpiochip_add_data(pctrl->dev, &pctrl->chip, pctrl);
+	if (ret) {
+		dev_err(pctrl->dev, "failed to register gpiochip\n");
+		return ret;
+	}
+
+	return 0;
+}
+
+static int intel_pinctrl_add_padgroups(struct intel_pinctrl *pctrl,
+				       struct intel_community *community)
+{
+	struct intel_padgroup *gpps;
+	unsigned int npins = community->npins;
+	unsigned int padown_num = 0;
+	size_t ngpps, i;
+
+	if (community->gpps)
+		ngpps = community->ngpps;
+	else
+		ngpps = DIV_ROUND_UP(community->npins, community->gpp_size);
+
+	gpps = devm_kcalloc(pctrl->dev, ngpps, sizeof(*gpps), GFP_KERNEL);
+	if (!gpps)
+		return -ENOMEM;
+
+	for (i = 0; i < ngpps; i++) {
+		if (community->gpps) {
+			gpps[i] = community->gpps[i];
+		} else {
+			unsigned int gpp_size = community->gpp_size;
+
+			gpps[i].reg_num = i;
+			gpps[i].base = community->pin_base + i * gpp_size;
+			gpps[i].size = min(gpp_size, npins);
+			npins -= gpps[i].size;
+		}
+
+		if (gpps[i].size > 32)
+			return -EINVAL;
+
+		/* Special treatment for GPIO base */
+		switch (gpps[i].gpio_base) {
+			case INTEL_GPIO_BASE_MATCH:
+				gpps[i].gpio_base = gpps[i].base;
+				break;
+			case INTEL_GPIO_BASE_ZERO:
+				gpps[i].gpio_base = 0;
+				break;
+			case INTEL_GPIO_BASE_NOMAP:
+			default:
+				break;
+		}
+
+		gpps[i].padown_num = padown_num;
+
+		/*
+		 * In older hardware the number of padown registers per
+		 * group is fixed regardless of the group size.
+		 */
+		if (community->gpp_num_padown_regs)
+			padown_num += community->gpp_num_padown_regs;
+		else
+			padown_num += DIV_ROUND_UP(gpps[i].size * 4, 32);
+	}
+
+	community->ngpps = ngpps;
+	community->gpps = gpps;
+
+	return 0;
+}
+
+static int intel_pinctrl_pm_init(struct intel_pinctrl *pctrl)
+{
+#ifdef CONFIG_PM_SLEEP
+	const struct intel_pinctrl_soc_data *soc = pctrl->soc;
+	struct intel_community_context *communities;
+	struct intel_pad_context *pads;
+	int i;
+
+	pads = devm_kcalloc(pctrl->dev, soc->npins, sizeof(*pads), GFP_KERNEL);
+	if (!pads)
+		return -ENOMEM;
+
+	communities = devm_kcalloc(pctrl->dev, pctrl->ncommunities,
+				   sizeof(*communities), GFP_KERNEL);
+	if (!communities)
+		return -ENOMEM;
+
+	for (i = 0; i < pctrl->ncommunities; i++) {
+		struct intel_community *community = &pctrl->communities[i];
+		u32 *intmask, *hostown;
+
+		intmask = devm_kcalloc(pctrl->dev, community->ngpps,
+				       sizeof(*intmask), GFP_KERNEL);
+		if (!intmask)
+			return -ENOMEM;
+
+		communities[i].intmask = intmask;
+
+		hostown = devm_kcalloc(pctrl->dev, community->ngpps,
+				       sizeof(*hostown), GFP_KERNEL);
+		if (!hostown)
+			return -ENOMEM;
+
+		communities[i].hostown = hostown;
+	}
+
+	pctrl->context.pads = pads;
+	pctrl->context.communities = communities;
+#endif
+
+	return 0;
+}
+
+int wb_pinctrl_probe(struct platform_device *pdev,
+			       const struct intel_pinctrl_soc_data *soc_data)
+{
+	struct intel_pinctrl *pctrl;
+	struct intel_community *community;
+    wb_gpio_data_t *wb_gpio_data;
+	void __iomem *regs;
+	int i, ret;
+	u32 padbar, rev;
+
+	if (!soc_data) {
+		dev_err(&pdev->dev, "soc_data is null\n");
+		return -EINVAL;
+	}
+
+    wb_gpio_data = platform_get_drvdata(pdev);
+	pctrl = devm_kzalloc(&pdev->dev, sizeof(*pctrl), GFP_KERNEL);
+	if (!pctrl) {
+        dev_err(&pdev->dev, "pctrl kzalloc failed\n");
+        return -ENOMEM;
+    }
+
+	/* check resource */
+	if (soc_data->ncommunities > GPIO_RES_MAX) {
+		dev_err(&pdev->dev, "GPIO ncommunities %lu is more than GPIO resource number: %d\n",
+            soc_data->ncommunities, GPIO_RES_MAX);
+		return -EINVAL;
+	}
+
+	pctrl->dev = &pdev->dev;
+	pctrl->soc = soc_data;
+	pctrl->irq = wb_gpio_data->irq;
+	raw_spin_lock_init(&pctrl->lock);
+
+	/*
+	 * Make a copy of the communities which we can use to hold pointers
+	 * to the registers.
+	 */
+	pctrl->ncommunities = pctrl->soc->ncommunities;
+	pctrl->communities = devm_kcalloc(&pdev->dev, pctrl->ncommunities,
+				  sizeof(*pctrl->communities), GFP_KERNEL);
+	if (!pctrl->communities) {
+        dev_err(&pdev->dev, "devm_kcalloc communities failed. ret:%d\n", ret);
+        return -ENOMEM;
+    }
+
+	for (i = 0; i < pctrl->ncommunities; i++) {
+		community = &pctrl->communities[i];
+		*community = pctrl->soc->communities[i];
+
+		regs = wb_gpio_data->res[i];
+
+		/*
+		 * Determine community features based on the revision if
+		 * not specified already.
+		 */
+		if (!community->features) {
+			rev = (readl(regs + REVID) & REVID_MASK) >> REVID_SHIFT;
+			if (rev >= 0x94) {
+				community->features |= PINCTRL_FEATURE_DEBOUNCE;
+				community->features |= PINCTRL_FEATURE_1K_PD;
+			}
+		}
+
+		/* Read offset of the pad configuration registers */
+		padbar = readl(regs + PADBAR);
+
+		community->regs = regs;
+		community->pad_regs = regs + padbar;
+
+		ret = intel_pinctrl_add_padgroups(pctrl, community);
+		if (ret) {
+ 			dev_err(&pdev->dev, "intel_pinctrl_add_padgroups failed. ret:%d\n", ret);
+			return ret;
+        }
+	}
+
+	ret = intel_pinctrl_pm_init(pctrl);
+	if (ret) {
+        dev_err(&pdev->dev, "intel_pinctrl_pm_init failed. ret:%d\n", ret);
+        return ret;
+    }
+
+	pctrl->pctldesc = intel_pinctrl_desc;
+	pctrl->pctldesc.name = dev_name(&pdev->dev);
+	pctrl->pctldesc.pins = pctrl->soc->pins;
+	pctrl->pctldesc.npins = pctrl->soc->npins;
+
+	pctrl->pctldev = devm_pinctrl_register(&pdev->dev, &pctrl->pctldesc,
+					       pctrl);
+	if (IS_ERR(pctrl->pctldev)) {
+		dev_err(&pdev->dev, "failed to register pinctrl driver\n");
+		return PTR_ERR(pctrl->pctldev);
+	}
+
+    ret = intel_gpio_probe(pctrl, pctrl->irq);
+    if (ret) {
+        dev_err(&pdev->dev, "intel_gpio_probe failed. ret:%d\n", ret);
+        return ret;
+    }
+    return 0;
+}
+EXPORT_SYMBOL_GPL(wb_pinctrl_probe);
+
+#if 0
+int intel_pinctrl_probe_by_hid(struct platform_device *pdev)
+{
+	const struct intel_pinctrl_soc_data *data;
+
+	data = device_get_match_data(&pdev->dev);
+	if (!data)
+		return -ENODATA;
+
+	return intel_pinctrl_probe(pdev, data);
+}
+EXPORT_SYMBOL_GPL(intel_pinctrl_probe_by_hid);
+
+int intel_pinctrl_probe_by_uid(struct platform_device *pdev)
+{
+	const struct intel_pinctrl_soc_data *data;
+
+	data = intel_pinctrl_get_soc_data(pdev);
+	if (IS_ERR(data))
+		return PTR_ERR(data);
+
+	return intel_pinctrl_probe(pdev, data);
+}
+EXPORT_SYMBOL_GPL(intel_pinctrl_probe_by_uid);
+
+const struct intel_pinctrl_soc_data *intel_pinctrl_get_soc_data(struct platform_device *pdev)
+{
+	const struct intel_pinctrl_soc_data *data = NULL;
+	const struct intel_pinctrl_soc_data **table;
+	struct acpi_device *adev;
+	unsigned int i;
+
+	adev = ACPI_COMPANION(&pdev->dev);
+	if (adev) {
+		const void *match = device_get_match_data(&pdev->dev);
+
+		table = (const struct intel_pinctrl_soc_data **)match;
+		for (i = 0; table[i]; i++) {
+			if (!strcmp(adev->pnp.unique_id, table[i]->uid)) {
+				data = table[i];
+				break;
+			}
+		}
+	} else {
+		const struct platform_device_id *id;
+
+		id = platform_get_device_id(pdev);
+		if (!id)
+			return ERR_PTR(-ENODEV);
+
+		table = (const struct intel_pinctrl_soc_data **)id->driver_data;
+		data = table[pdev->id];
+	}
+
+	return data ?: ERR_PTR(-ENODATA);
+}
+EXPORT_SYMBOL_GPL(intel_pinctrl_get_soc_data);
+#endif
+
+#ifdef CONFIG_PM_SLEEP
+static bool intel_pinctrl_should_save(struct intel_pinctrl *pctrl, unsigned int pin)
+{
+	const struct pin_desc *pd = pin_desc_get(pctrl->pctldev, pin);
+
+	if (!pd || !intel_pad_usable(pctrl, pin))
+		return false;
+
+	/*
+	 * Only restore the pin if it is actually in use by the kernel (or
+	 * by userspace). It is possible that some pins are used by the
+	 * BIOS during resume and those are not always locked down so leave
+	 * them alone.
+	 */
+	if (pd->mux_owner || pd->gpio_owner ||
+	    gpiochip_line_is_irq(&pctrl->chip, intel_pin_to_gpio(pctrl, pin)))
+		return true;
+
+	return false;
+}
+
+int wb_intel_pinctrl_suspend_noirq(struct device *dev)
+{
+	struct intel_pinctrl *pctrl = dev_get_drvdata(dev);
+	struct intel_community_context *communities;
+	struct intel_pad_context *pads;
+	int i;
+
+	pads = pctrl->context.pads;
+	for (i = 0; i < pctrl->soc->npins; i++) {
+		const struct pinctrl_pin_desc *desc = &pctrl->soc->pins[i];
+		void __iomem *padcfg;
+		u32 val;
+
+		if (!intel_pinctrl_should_save(pctrl, desc->number))
+			continue;
+
+		val = readl(intel_get_padcfg(pctrl, desc->number, PADCFG0));
+		pads[i].padcfg0 = val & ~PADCFG0_GPIORXSTATE;
+		val = readl(intel_get_padcfg(pctrl, desc->number, PADCFG1));
+		pads[i].padcfg1 = val;
+
+		padcfg = intel_get_padcfg(pctrl, desc->number, PADCFG2);
+		if (padcfg)
+			pads[i].padcfg2 = readl(padcfg);
+	}
+
+	communities = pctrl->context.communities;
+	for (i = 0; i < pctrl->ncommunities; i++) {
+		struct intel_community *community = &pctrl->communities[i];
+		void __iomem *base;
+		unsigned int gpp;
+
+		base = community->regs + community->ie_offset;
+		for (gpp = 0; gpp < community->ngpps; gpp++)
+			communities[i].intmask[gpp] = readl(base + gpp * 4);
+
+		base = community->regs + community->hostown_offset;
+		for (gpp = 0; gpp < community->ngpps; gpp++)
+			communities[i].hostown[gpp] = readl(base + gpp * 4);
+	}
+
+	return 0;
+}
+EXPORT_SYMBOL_GPL(wb_intel_pinctrl_suspend_noirq);
+
+static void intel_gpio_irq_init(struct intel_pinctrl *pctrl)
+{
+	size_t i;
+
+	for (i = 0; i < pctrl->ncommunities; i++) {
+		const struct intel_community *community;
+		void __iomem *base;
+		unsigned int gpp;
+
+		community = &pctrl->communities[i];
+		base = community->regs;
+
+		for (gpp = 0; gpp < community->ngpps; gpp++) {
+			/* Mask and clear all interrupts */
+			writel(0, base + community->ie_offset + gpp * 4);
+			writel(0xffff, base + community->is_offset + gpp * 4);
+		}
+	}
+}
+
+static bool intel_gpio_update_reg(void __iomem *reg, u32 mask, u32 value)
+{
+	u32 curr, updated;
+
+	curr = readl(reg);
+
+	updated = (curr & ~mask) | (value & mask);
+	if (curr == updated)
+		return false;
+
+	writel(updated, reg);
+	return true;
+}
+
+static void intel_restore_hostown(struct intel_pinctrl *pctrl, unsigned int c,
+				  void __iomem *base, unsigned int gpp, u32 saved)
+{
+	const struct intel_community *community = &pctrl->communities[c];
+	const struct intel_padgroup *padgrp = &community->gpps[gpp];
+	struct device *dev = pctrl->dev;
+	const char *dummy;
+	u32 requested = 0;
+	unsigned int i;
+
+	if (padgrp->gpio_base == INTEL_GPIO_BASE_NOMAP)
+		return;
+
+	for_each_requested_gpio_in_range(&pctrl->chip, i, padgrp->gpio_base, padgrp->size, dummy)
+		requested |= BIT(i);
+
+	if (!intel_gpio_update_reg(base + gpp * 4, requested, saved))
+		return;
+
+	dev_dbg(dev, "restored hostown %u/%u %#08x\n", c, gpp, readl(base + gpp * 4));
+}
+
+static void intel_restore_intmask(struct intel_pinctrl *pctrl, unsigned int c,
+				  void __iomem *base, unsigned int gpp, u32 saved)
+{
+	struct device *dev = pctrl->dev;
+
+	if (!intel_gpio_update_reg(base + gpp * 4, ~0U, saved))
+		return;
+
+	dev_dbg(dev, "restored mask %u/%u %#08x\n", c, gpp, readl(base + gpp * 4));
+}
+
+static void intel_restore_padcfg(struct intel_pinctrl *pctrl, unsigned int pin,
+				 unsigned int reg, u32 saved)
+{
+	u32 mask = (reg == PADCFG0) ? PADCFG0_GPIORXSTATE : 0;
+	unsigned int n = reg / sizeof(u32);
+	struct device *dev = pctrl->dev;
+	void __iomem *padcfg;
+
+	padcfg = intel_get_padcfg(pctrl, pin, reg);
+	if (!padcfg)
+		return;
+
+	if (!intel_gpio_update_reg(padcfg, ~mask, saved))
+		return;
+
+	dev_dbg(dev, "restored pin %u padcfg%u %#08x\n", pin, n, readl(padcfg));
+}
+
+int wb_intel_pinctrl_resume_noirq(struct device *dev)
+{
+	struct intel_pinctrl *pctrl = dev_get_drvdata(dev);
+	const struct intel_community_context *communities;
+	const struct intel_pad_context *pads;
+	int i;
+
+	/* Mask all interrupts */
+	intel_gpio_irq_init(pctrl);
+
+	pads = pctrl->context.pads;
+	for (i = 0; i < pctrl->soc->npins; i++) {
+		const struct pinctrl_pin_desc *desc = &pctrl->soc->pins[i];
+
+		if (!intel_pinctrl_should_save(pctrl, desc->number))
+			continue;
+
+		intel_restore_padcfg(pctrl, desc->number, PADCFG0, pads[i].padcfg0);
+		intel_restore_padcfg(pctrl, desc->number, PADCFG1, pads[i].padcfg1);
+		intel_restore_padcfg(pctrl, desc->number, PADCFG2, pads[i].padcfg2);
+	}
+
+	communities = pctrl->context.communities;
+	for (i = 0; i < pctrl->ncommunities; i++) {
+		struct intel_community *community = &pctrl->communities[i];
+		void __iomem *base;
+		unsigned int gpp;
+
+		base = community->regs + community->ie_offset;
+		for (gpp = 0; gpp < community->ngpps; gpp++)
+			intel_restore_intmask(pctrl, i, base, gpp, communities[i].intmask[gpp]);
+
+		base = community->regs + community->hostown_offset;
+		for (gpp = 0; gpp < community->ngpps; gpp++)
+			intel_restore_hostown(pctrl, i, base, gpp, communities[i].hostown[gpp]);
+	}
+
+	return 0;
+}
+EXPORT_SYMBOL_GPL(wb_intel_pinctrl_resume_noirq);
+#endif
+
+MODULE_AUTHOR("Mathias Nyman <mathias.nyman@linux.intel.com>");
+MODULE_AUTHOR("Mika Westerberg <mika.westerberg@linux.intel.com>");
+MODULE_DESCRIPTION("Intel pinctrl/GPIO core driver");
+MODULE_LICENSE("GPL v2");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/pinctrl/wb_pinctrl_intel.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/pinctrl/wb_pinctrl_intel.h
new file mode 100644
index 000000000..5ed0cc065
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/pinctrl/wb_pinctrl_intel.h
@@ -0,0 +1,275 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Core pinctrl/GPIO driver for Intel GPIO controllers
+ *
+ * Copyright (C) 2015, Intel Corporation
+ * Authors: Mathias Nyman <mathias.nyman@linux.intel.com>
+ *          Mika Westerberg <mika.westerberg@linux.intel.com>
+ */
+
+#ifndef PINCTRL_INTEL_H
+#define PINCTRL_INTEL_H
+
+#include <linux/bits.h>
+#include <linux/compiler_types.h>
+#include <linux/gpio/driver.h>
+#include <linux/irq.h>
+#include <linux/kernel.h>
+#include <linux/pm.h>
+#include <linux/pinctrl/pinctrl.h>
+#include <linux/spinlock_types.h>
+
+struct platform_device;
+struct device;
+
+#define GPIO_RES_MAX    (2)
+
+typedef struct wb_gpio_data_s {
+    int irq;
+    void __iomem *res[GPIO_RES_MAX];
+    unsigned int pci_domain;
+    unsigned int pci_bus;
+    unsigned int pci_slot;
+    unsigned int pci_fn;
+    unsigned int pci_bar;
+    struct pci_dev *pci_dev;
+    void __iomem *pci_mem_base;
+} wb_gpio_data_t;
+
+/**
+ * struct intel_pingroup - Description about group of pins
+ * @name: Name of the groups
+ * @pins: All pins in this group
+ * @npins: Number of pins in this groups
+ * @mode: Native mode in which the group is muxed out @pins. Used if @modes
+ *        is %NULL.
+ * @modes: If not %NULL this will hold mode for each pin in @pins
+ */
+struct intel_pingroup {
+	const char *name;
+	const unsigned int *pins;
+	size_t npins;
+	unsigned short mode;
+	const unsigned int *modes;
+};
+
+/**
+ * struct intel_function - Description about a function
+ * @name: Name of the function
+ * @groups: An array of groups for this function
+ * @ngroups: Number of groups in @groups
+ */
+struct intel_function {
+	const char *name;
+	const char * const *groups;
+	size_t ngroups;
+};
+
+/**
+ * struct intel_padgroup - Hardware pad group information
+ * @reg_num: GPI_IS register number
+ * @base: Starting pin of this group
+ * @size: Size of this group (maximum is 32).
+ * @gpio_base: Starting GPIO base of this group
+ * @padown_num: PAD_OWN register number (assigned by the core driver)
+ *
+ * If pad groups of a community are not the same size, use this structure
+ * to specify them.
+ */
+struct intel_padgroup {
+	unsigned int reg_num;
+	unsigned int base;
+	unsigned int size;
+	int gpio_base;
+	unsigned int padown_num;
+};
+
+/**
+ * enum - Special treatment for GPIO base in pad group
+ *
+ * @INTEL_GPIO_BASE_ZERO:	force GPIO base to be 0
+ * @INTEL_GPIO_BASE_NOMAP:	no GPIO mapping should be created
+ * @INTEL_GPIO_BASE_MATCH:	matches with starting pin number
+ */
+enum {
+	INTEL_GPIO_BASE_ZERO	= -2,
+	INTEL_GPIO_BASE_NOMAP	= -1,
+	INTEL_GPIO_BASE_MATCH	= 0,
+};
+
+/**
+ * struct intel_community - Intel pin community description
+ * @barno: MMIO BAR number where registers for this community reside
+ * @padown_offset: Register offset of PAD_OWN register from @regs. If %0
+ *                 then there is no support for owner.
+ * @padcfglock_offset: Register offset of PADCFGLOCK from @regs. If %0 then
+ *                     locking is not supported.
+ * @hostown_offset: Register offset of HOSTSW_OWN from @regs. If %0 then it
+ *                  is assumed that the host owns the pin (rather than
+ *                  ACPI).
+ * @is_offset: Register offset of GPI_IS from @regs.
+ * @ie_offset: Register offset of GPI_IE from @regs.
+ * @features: Additional features supported by the hardware
+ * @pin_base: Starting pin of pins in this community
+ * @npins: Number of pins in this community
+ * @gpp_size: Maximum number of pads in each group, such as PADCFGLOCK,
+ *            HOSTSW_OWN, GPI_IS, GPI_IE. Used when @gpps is %NULL.
+ * @gpp_num_padown_regs: Number of pad registers each pad group consumes at
+ *			 minimum. Use %0 if the number of registers can be
+ *			 determined by the size of the group.
+ * @gpps: Pad groups if the controller has variable size pad groups
+ * @ngpps: Number of pad groups in this community
+ * @pad_map: Optional non-linear mapping of the pads
+ * @nirqs: Optional total number of IRQs this community can generate
+ * @acpi_space_id: Optional address space ID for ACPI OpRegion handler
+ * @regs: Community specific common registers (reserved for core driver)
+ * @pad_regs: Community specific pad registers (reserved for core driver)
+ *
+ * In some of Intel GPIO host controllers this driver supports each pad group
+ * is of equal size (except the last one). In that case the driver can just
+ * fill in @gpp_size field and let the core driver to handle the rest. If
+ * the controller has pad groups of variable size the client driver can
+ * pass custom @gpps and @ngpps instead.
+ */
+struct intel_community {
+	unsigned int barno;
+	unsigned int padown_offset;
+	unsigned int padcfglock_offset;
+	unsigned int hostown_offset;
+	unsigned int is_offset;
+	unsigned int ie_offset;
+	unsigned int features;
+	unsigned int pin_base;
+	size_t npins;
+	unsigned int gpp_size;
+	unsigned int gpp_num_padown_regs;
+	const struct intel_padgroup *gpps;
+	size_t ngpps;
+	const unsigned int *pad_map;
+	unsigned short nirqs;
+	unsigned short acpi_space_id;
+
+	/* Reserved for the core driver */
+	void __iomem *regs;
+	void __iomem *pad_regs;
+    u32 dw_base;
+};
+
+/* Additional features supported by the hardware */
+#define PINCTRL_FEATURE_DEBOUNCE	BIT(0)
+#define PINCTRL_FEATURE_1K_PD		BIT(1)
+
+/**
+ * PIN_GROUP - Declare a pin group
+ * @n: Name of the group
+ * @p: An array of pins this group consists
+ * @m: Mode which the pins are put when this group is active. Can be either
+ *     a single integer or an array of integers in which case mode is per
+ *     pin.
+ */
+#define PIN_GROUP(n, p, m)					\
+	{							\
+		.name = (n),					\
+		.pins = (p),					\
+		.npins = ARRAY_SIZE((p)),			\
+		.mode = __builtin_choose_expr(			\
+			__builtin_constant_p((m)), (m), 0),	\
+		.modes = __builtin_choose_expr(			\
+			__builtin_constant_p((m)), NULL, (m)),	\
+	}
+
+#define FUNCTION(n, g)				\
+	{					\
+		.name = (n),			\
+		.groups = (g),			\
+		.ngroups = ARRAY_SIZE((g)),	\
+	}
+
+/**
+ * struct intel_pinctrl_soc_data - Intel pin controller per-SoC configuration
+ * @uid: ACPI _UID for the probe driver use if needed
+ * @pins: Array if pins this pinctrl controls
+ * @npins: Number of pins in the array
+ * @groups: Array of pin groups
+ * @ngroups: Number of groups in the array
+ * @functions: Array of functions
+ * @nfunctions: Number of functions in the array
+ * @communities: Array of communities this pinctrl handles
+ * @ncommunities: Number of communities in the array
+ *
+ * The @communities is used as a template by the core driver. It will make
+ * copy of all communities and fill in rest of the information.
+ */
+struct intel_pinctrl_soc_data {
+	const char *uid;
+	const struct pinctrl_pin_desc *pins;
+	size_t npins;
+	const struct intel_pingroup *groups;
+	size_t ngroups;
+	const struct intel_function *functions;
+	size_t nfunctions;
+	const struct intel_community *communities;
+	size_t ncommunities;
+};
+
+struct intel_pad_context;
+struct intel_community_context;
+
+/**
+ * struct intel_pinctrl_context - context to be saved during suspend-resume
+ * @pads: Opaque context per pad (driver dependent)
+ * @communities: Opaque context per community (driver dependent)
+ */
+struct intel_pinctrl_context {
+	struct intel_pad_context *pads;
+	struct intel_community_context *communities;
+};
+
+/**
+ * struct intel_pinctrl - Intel pinctrl private structure
+ * @dev: Pointer to the device structure
+ * @lock: Lock to serialize register access
+ * @pctldesc: Pin controller description
+ * @pctldev: Pointer to the pin controller device
+ * @chip: GPIO chip in this pin controller
+ * @irqchip: IRQ chip in this pin controller
+ * @soc: SoC/PCH specific pin configuration data
+ * @communities: All communities in this pin controller
+ * @ncommunities: Number of communities in this pin controller
+ * @context: Configuration saved over system sleep
+ * @irq: pinctrl/GPIO chip irq number
+ */
+struct intel_pinctrl {
+	struct device *dev;
+	raw_spinlock_t lock;
+	struct pinctrl_desc pctldesc;
+	struct pinctrl_dev *pctldev;
+	struct gpio_chip chip;
+	struct irq_chip irqchip;
+	const struct intel_pinctrl_soc_data *soc;
+	struct intel_community *communities;
+	size_t ncommunities;
+	struct intel_pinctrl_context context;
+	int irq;
+};
+
+int wb_pinctrl_probe(struct platform_device *pdev, const struct intel_pinctrl_soc_data *soc_data);
+
+#if 0
+const struct intel_pinctrl_soc_data *intel_pinctrl_get_soc_data(struct platform_device *pdev);
+int intel_pinctrl_probe_by_hid(struct platform_device *pdev);
+int intel_pinctrl_probe_by_uid(struct platform_device *pdev);
+#endif
+
+#ifdef CONFIG_PM_SLEEP
+int wb_intel_pinctrl_suspend_noirq(struct device *dev);
+int wb_intel_pinctrl_resume_noirq(struct device *dev);
+#endif
+
+#define INTEL_PINCTRL_PM_OPS(_name)					\
+const struct dev_pm_ops _name = {					\
+	SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(wb_intel_pinctrl_suspend_noirq,	\
+				      wb_intel_pinctrl_resume_noirq)	\
+}
+
+#endif /* PINCTRL_INTEL_H */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/Makefile b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/Makefile
new file mode 100644
index 000000000..369b64605
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/Makefile
@@ -0,0 +1,20 @@
+pes_parent_dir:=$(shell pwd)/$(lastword $(MAKEFILE_LIST))
+pes_parent_dir:=$(shell dirname $(pes_parent_dir))
+
+SUBDIRS=$(shell ls -l | grep ^d | awk '{if($$9 != "build") print $$9}')
+INC = -I./inc
+
+all : CHECK $(SUBDIRS)
+CHECK :
+	@echo $(pes_parent_dir)
+
+$(SUBDIRS):ECHO
+	#@echo $@
+	make -C $@
+
+ECHO:
+	@echo $(SUBDIRS)
+
+.PHONY : clean
+clean :
+	-rm  -rf $(SYSFS_OUT_PUT)
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/Makefile b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/Makefile
new file mode 100644
index 000000000..e516b70b3
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/Makefile
@@ -0,0 +1,25 @@
+PWD		= $(shell pwd)
+
+EXTRA_CFLAGS:= -I$(M)/include
+EXTRA_CFLAGS+= -Wall
+SUBDIR_CFG = cfg
+plat_dfd-objs := dfd_module.o dfd_fan_driver.o \
+dfd_slot_driver.o \
+dfd_sensors_driver.o \
+dfd_psu_driver.o \
+dfd_sff_driver.o \
+$(SUBDIR_CFG)/dfd_cfg.o \
+$(SUBDIR_CFG)/dfd_cfg_adapter.o \
+$(SUBDIR_CFG)/dfd_cfg_file.o \
+$(SUBDIR_CFG)/dfd_cfg_info.o \
+$(SUBDIR_CFG)/dfd_cfg_listnode.o \
+
+obj-m := plat_dfd.o
+all:
+	$(MAKE) -C $(KERNEL_SRC)/build M=$(PWD) modules
+	@if [ ! -d $(module_out_put_dir) ]; then mkdir -p $(module_out_put_dir) ;fi
+	cp -p  $(PWD)/*.ko $(module_out_put_dir)
+clean:
+	rm -f $(PWD)/*.o $(PWD)/$(SUBDIR_CFG)/*.o $(PWD)/*.ko $(PWD)/*.mod.c $(PWD)/.*.cmd $(PWD)/$(SUBDIR_CFG)/.*.cmd $(PWD)/*.mod
+	rm -f $(PWD)/Module.markers $(PWD)/Module.symvers $(PWD)/modules.order
+	rm -rf $(PWD)/.tmp_versions
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/cfg/dfd_cfg.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/cfg/dfd_cfg.c
new file mode 100644
index 000000000..22962556e
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/cfg/dfd_cfg.c
@@ -0,0 +1,815 @@
+#include <linux/list.h>
+#include <linux/string.h>
+#include <linux/types.h>
+#include <linux/slab.h>
+#include <linux/fs.h>
+#include <linux/uaccess.h>
+
+#include "../include/dfd_module.h"
+#include "../include/dfd_cfg_file.h"
+#include "../include/dfd_cfg_listnode.h"
+#include "../include/dfd_cfg_info.h"
+#include "../include/dfd_cfg_adapter.h"
+#include "../include/dfd_cfg.h"
+#include "../../dev_sysfs/include/sysfs_common.h"
+
+#ifdef DFD_CFG_ITEM
+#undef DFD_CFG_ITEM
+#endif
+#define DFD_CFG_ITEM(_id, _name, _index_min, _index_max)    _name,
+static char *dfd_cfg_item_name[] = {
+    DFD_CFG_ITEM_ALL
+};
+
+#ifdef DFD_CFG_ITEM
+#undef DFD_CFG_ITEM
+#endif
+#define DFD_CFG_ITEM(_id, _name, _index_min, _index_max)    {_index_min, _index_max},
+static index_range_t dfd_cfg_item_index_range[] = {
+    DFD_CFG_ITEM_ALL
+};
+
+static lnode_root_t dfd_ko_cfg_list_root;
+
+static void dfd_ko_cfg_del_space_lf_cr(char *str)
+{
+    int i, j;
+    int len;
+
+    len = strlen(str);
+    for (i = 0; i < len; i++) {
+        if (str[i] == '\r' || str[i] == '\n' || str[i] == ' ') {
+            for (j = i; j < len - 1; j++) {
+                str[j] = str[j + 1];
+            }
+            str[j] = '\0';
+            len--;
+            i--;
+        }
+    }
+}
+
+static int dfd_ko_cfg_get_value_from_char(char *value_str, int32_t *value, int line_num)
+{
+    int value_tmp = 0;
+
+    if (strlen(value_str) == 0) {
+        DBG_DEBUG(DBG_WARN, "line%d: value str is empty\n", line_num);
+        *value = DFD_CFG_EMPTY_VALUE;
+        return 0;
+    }
+
+    if ((strlen(value_str) > 2) && (value_str[0] == '0')
+            && (value_str[1] == 'x' || value_str[1] == 'X')) {
+        value_tmp = (int32_t)simple_strtol(value_str, NULL, 16);
+    } else {
+        value_tmp = (int32_t)simple_strtol(value_str, NULL, 10);
+    }
+
+    *value = value_tmp;
+    return 0;
+}
+
+static int dfd_ko_cfg_analyse_index(char *index_str, int *index1, int *index2, int line_num)
+{
+    int rv;
+    char *index1_begin_char, *index2_begin_char;
+
+    if (index_str[0] != '_') {
+        DBG_DEBUG(DBG_ERROR, "line%d: no '-' between name and index1\n", line_num);
+        return -1;
+    }
+
+    index1_begin_char = index_str;
+    rv = dfd_ko_cfg_get_value_from_char(++index1_begin_char, index1, line_num);
+    if (rv < 0) {
+        return -1;
+    }
+
+    if (index2 == NULL) {
+        return 0;
+    }
+
+    index2_begin_char = strchr(index1_begin_char, '_');
+    if (index2_begin_char == NULL) {
+        DBG_DEBUG(DBG_ERROR, "line%d: no '-' between index1 and index2\n", line_num);
+        return -1;
+    } else {
+        rv = dfd_ko_cfg_get_value_from_char(++index2_begin_char, index2, line_num);
+        if (rv < 0) {
+            return -1;
+        }
+    }
+
+    return 0;
+}
+
+static int dfd_ko_cfg_check_array_index(index_range_t *index_range, int *index1, int *index2,
+            int line_num)
+{
+
+    if ((*index1 < 0) || (*index1 > index_range->index1_max)) {
+        DBG_DEBUG(DBG_ERROR, "line%d: index1[%d] invalid, max=%d\n", line_num, *index1,
+            index_range->index1_max);
+        return -1;
+    }
+
+    if (index2 == NULL) {
+        return 0;
+    }
+
+    if ((*index2 < 0) || (*index2 > index_range->index2_max)) {
+        DBG_DEBUG(DBG_ERROR, "line%d: index2[%d] invalid, max=%d\n", line_num, *index2,
+            index_range->index2_max);
+        return -1;
+    }
+
+    return 0;
+}
+
+static int dfd_ko_cfg_get_index(char *index_str, index_range_t *index_range, int *index1,
+            int *index2, int line_num)
+{
+    int rv;
+
+    if (index_range->index2_max == INDEX_NOT_EXIST) {
+        index2 = NULL;
+    }
+
+    rv = dfd_ko_cfg_analyse_index(index_str, index1, index2, line_num);
+    if (rv < 0) {
+        return -1;
+    }
+
+    rv = dfd_ko_cfg_check_array_index(index_range, index1, index2, line_num);
+    if (rv < 0) {
+        return -1;
+    }
+
+    return 0;
+}
+
+static int dfd_ko_cfg_add_int_item(int key, int value, int line_num)
+{
+    int rv;
+    int *int_cfg;
+
+    int_cfg = lnode_find_node(&dfd_ko_cfg_list_root, key);
+    if (int_cfg == NULL) {
+
+        int_cfg = (int *)kmalloc(sizeof(int), GFP_KERNEL);
+        if (int_cfg == NULL) {
+            DBG_DEBUG(DBG_ERROR, "line%d: kmalloc int fail\n", line_num);
+            return -1;
+        }
+
+        *int_cfg = value;
+        rv = lnode_insert_node(&dfd_ko_cfg_list_root, key, int_cfg);
+        if (rv == 0) {
+            DBG_DEBUG(DBG_VERBOSE, "line%d: add int item[%d] success, key=0x%08x\n", line_num, value, key);
+        } else {
+            kfree(int_cfg);
+            int_cfg = NULL;
+            DBG_DEBUG(DBG_ERROR, "line%d: add int item[%d] fail, key=0x%08x rv=%d \n", line_num, value, key, rv);
+            return -1;
+        }
+    } else {
+
+        DBG_DEBUG(DBG_WARN, "line%d: replace int item[%d->%d], key=0x%08x\n", line_num, *int_cfg, value, key);
+        *int_cfg = value;
+    }
+
+    return 0;
+}
+
+static int dfd_ko_cfg_analyse_int_item(dfd_cfg_item_id_t cfg_item_id, char *arg_name, char *arg_value,
+            char *cfg_pre, index_range_t *index_range, int line_num)
+{
+    int rv;
+    int index1 = 0, index2 = 0;
+    int value, key;
+    char *arg_name_tmp;
+
+    if (index_range->index1_max != INDEX_NOT_EXIST) {
+        arg_name_tmp = arg_name + strlen(cfg_pre);
+        rv = dfd_ko_cfg_get_index(arg_name_tmp, index_range, &index1, &index2, line_num);
+        if (rv < 0) {
+            return -1;
+        }
+    }
+
+    rv = dfd_ko_cfg_get_value_from_char(arg_value, &value, line_num);
+    if (rv < 0) {
+        return -1;
+    }
+
+    key = DFD_CFG_KEY(cfg_item_id, index1, index2);
+    rv = dfd_ko_cfg_add_int_item(key, value, line_num);
+    if (rv < 0) {
+        return -1;
+    }
+
+    return 0;
+}
+
+static int dfd_ko_cfg_add_str_item(int key, char *str, int line_num)
+{
+    int rv;
+    char *str_cfg;
+
+    str_cfg = lnode_find_node(&dfd_ko_cfg_list_root, key);
+    if (str_cfg == NULL) {
+
+        str_cfg = (char *)kmalloc(DFD_CFG_STR_MAX_LEN, GFP_KERNEL);
+        if (str_cfg == NULL) {
+            DBG_DEBUG(DBG_ERROR, "line%d: kmalloc str[%lu] fail\n", line_num, strlen(str));
+            return -1;
+        }
+        mem_clear(str_cfg, DFD_CFG_STR_MAX_LEN);
+        strlcpy(str_cfg, str, DFD_CFG_STR_MAX_LEN);
+
+        rv = lnode_insert_node(&dfd_ko_cfg_list_root, key, str_cfg);
+        if (rv == 0) {
+            DBG_DEBUG(DBG_VERBOSE, "line%d: add string item[%s] success, key=0x%08x\n", line_num, str_cfg, key);
+        } else {
+            kfree(str_cfg);
+            str_cfg = NULL;
+            DBG_DEBUG(DBG_ERROR, "line%d: add string item[%s] fail, key=0x%08x rv=%d \n", line_num, str_cfg, key, rv);
+            return -1;
+        }
+    } else {
+        DBG_DEBUG(DBG_WARN, "line%d: replace string item[%s->%s], key=0x%08x\n", line_num, str_cfg, str, key);
+        mem_clear(str_cfg, DFD_CFG_STR_MAX_LEN);
+        strlcpy(str_cfg, str, DFD_CFG_STR_MAX_LEN);
+    }
+
+    return 0;
+}
+
+static int dfd_ko_cfg_analyse_str_item(dfd_cfg_item_id_t cfg_item_id, char *arg_name, char *arg_value,
+            char *cfg_pre, index_range_t *index_range, int line_num)
+{
+    int rv;
+    int index1 = 0, index2 = 0;
+    int btree_key;
+    char *arg_name_tmp;
+
+    if (index_range->index1_max != INDEX_NOT_EXIST) {
+        arg_name_tmp = arg_name + strlen(cfg_pre);
+        rv = dfd_ko_cfg_get_index(arg_name_tmp, index_range, &index1, &index2, line_num);
+        if (rv < 0) {
+            return -1;
+        }
+    }
+
+    if (strlen(arg_value) >= DFD_CFG_STR_MAX_LEN) {
+        DBG_DEBUG(DBG_ERROR, "line%d: string item[%s] is too long \n", line_num, arg_value);
+        return -1;
+    }
+
+    btree_key = DFD_CFG_KEY(cfg_item_id, index1, index2);
+    rv = dfd_ko_cfg_add_str_item(btree_key, arg_value, line_num);
+    if (rv < 0) {
+        return -1;
+    }
+
+    return 0;
+}
+
+static int dfd_ko_cfg_get_i2c_dev_member(char *member_str, dfd_i2c_dev_mem_t *member, int line_num)
+{
+    dfd_i2c_dev_mem_t mem_index;
+
+    for (mem_index = DFD_I2C_DEV_MEM_BUS; mem_index < DFD_I2C_DEV_MEM_END; mem_index++) {
+        if (memcmp(member_str, g_dfd_i2c_dev_mem_str[mem_index],
+                strlen(g_dfd_i2c_dev_mem_str[mem_index])) == 0) {
+            *member =  mem_index;
+            return 0;
+        }
+    }
+
+    DBG_DEBUG(DBG_ERROR, "line%d: i2c dev member[%s] invalid\n", line_num, member_str);
+    return -1;
+}
+
+static void dfd_ko_cfg_set_i2c_dev_mem_value(dfd_i2c_dev_t *i2c_dev, dfd_i2c_dev_mem_t member,
+                int value)
+{
+    switch (member) {
+    case DFD_I2C_DEV_MEM_BUS:
+        i2c_dev->bus = value;
+        break;
+    case DFD_I2C_DEV_MEM_ADDR:
+        i2c_dev->addr = value;
+        break;
+    default:
+        break;
+    }
+}
+
+static int dfd_ko_cfg_add_i2c_dev_item(int key, dfd_i2c_dev_mem_t member, int value, int line_num)
+{
+    int rv;
+    dfd_i2c_dev_t *i2c_dev_cfg;
+
+    i2c_dev_cfg = lnode_find_node(&dfd_ko_cfg_list_root, key);
+    if (i2c_dev_cfg == NULL) {
+
+        i2c_dev_cfg = (dfd_i2c_dev_t *)kmalloc(sizeof(dfd_i2c_dev_t), GFP_KERNEL);
+        if (i2c_dev_cfg == NULL) {
+            DBG_DEBUG(DBG_ERROR, "line%d: kmalloc i2c_dev fail\n", line_num);
+            return -1;
+        }
+        mem_clear(i2c_dev_cfg, sizeof(dfd_i2c_dev_t));
+
+        dfd_ko_cfg_set_i2c_dev_mem_value(i2c_dev_cfg, member, value);
+        rv = lnode_insert_node(&dfd_ko_cfg_list_root, key, i2c_dev_cfg);
+        if (rv == 0) {
+            DBG_DEBUG(DBG_VERBOSE, "line%d: add i2c_dev item[%s=%d] success, key=0x%08x\n", line_num,
+                g_dfd_i2c_dev_mem_str[member], value, key);
+        } else {
+            kfree(i2c_dev_cfg);
+            i2c_dev_cfg = NULL;
+            DBG_DEBUG(DBG_ERROR, "line%d: add i2c_dev item[%s=%d] fail, key=0x%08x rv=%d\n", line_num,
+                g_dfd_i2c_dev_mem_str[member], value, key, rv);
+            return -1;
+        }
+    } else {
+
+        DBG_DEBUG(DBG_VERBOSE, "line%d: replace i2c_dev item[%s=%d], key=0x%08x\n", line_num,
+            g_dfd_i2c_dev_mem_str[member], value, key);
+        dfd_ko_cfg_set_i2c_dev_mem_value(i2c_dev_cfg, member, value);
+    }
+
+    return 0;
+}
+
+static int dfd_ko_cfg_analyse_i2c_dev_item(dfd_cfg_item_id_t cfg_item_id, char *arg_name,
+            char *arg_value, char *cfg_pre, index_range_t *index_range, int line_num)
+{
+    int rv;
+    int index1 = 0, index2 = 0;
+    int value, key;
+    char *arg_name_tmp;
+    dfd_i2c_dev_mem_t member;
+
+    arg_name_tmp = arg_name + strlen(cfg_pre);
+    rv = dfd_ko_cfg_get_i2c_dev_member(arg_name_tmp, &member, line_num);
+    if (rv < 0) {
+        return -1;
+    }
+
+    if (index_range->index1_max != INDEX_NOT_EXIST) {
+        arg_name_tmp += strlen(g_dfd_i2c_dev_mem_str[member]);
+        rv = dfd_ko_cfg_get_index(arg_name_tmp, index_range, &index1, &index2, line_num);
+        if (rv < 0) {
+            return -1;
+        }
+    }
+
+    rv = dfd_ko_cfg_get_value_from_char(arg_value, &value, line_num);
+    if (rv < 0) {
+        return -1;
+    }
+
+    key = DFD_CFG_KEY(cfg_item_id, index1, index2);
+    rv = dfd_ko_cfg_add_i2c_dev_item(key, member, value, line_num);
+    if (rv < 0) {
+        return -1;
+    }
+
+    return 0;
+}
+
+static int dfd_ko_cfg_get_enum_value_by_str(char *enum_val_str[], int enum_val_end, char *buf)
+{
+    int i;
+    int enum_val;
+
+    enum_val = DFD_CFG_INVALID_VALUE;
+    for (i = 0; i < enum_val_end; i++) {
+        if (memcmp(buf, enum_val_str[i], strlen(enum_val_str[i])) == 0) {
+            enum_val = i;
+            break;
+        }
+    }
+
+    return enum_val;
+}
+
+static int dfd_ko_cfg_get_info_ctrl_member(char *member_str, info_ctrl_mem_t *member, int line_num)
+{
+    info_ctrl_mem_t mem_index;
+
+    for (mem_index = INFO_CTRL_MEM_MODE; mem_index < INFO_CTRL_MEM_END; mem_index++) {
+        if (memcmp(member_str, g_info_ctrl_mem_str[mem_index],
+                strlen(g_info_ctrl_mem_str[mem_index])) == 0) {
+            *member =  mem_index;
+            return 0;
+        }
+    }
+
+    DBG_DEBUG(DBG_ERROR, "line%d: info ctrl member[%s] invalid\n", line_num, member_str);
+    return -1;
+}
+
+static void dfd_ko_cfg_set_info_ctrl_mem_value(info_ctrl_t *info_ctrl, info_ctrl_mem_t member,
+                char *buf_val, int line_num)
+{
+    switch (member) {
+    case INFO_CTRL_MEM_MODE:
+        info_ctrl->mode = dfd_ko_cfg_get_enum_value_by_str(g_info_ctrl_mode_str, INFO_CTRL_MODE_END, buf_val);;
+        break;
+    case INFO_CTRL_MEM_INT_CONS:
+        dfd_ko_cfg_get_value_from_char(buf_val, &(info_ctrl->int_cons), line_num);
+        break;
+    case INFO_CTRL_MEM_SRC:
+        info_ctrl->src = dfd_ko_cfg_get_enum_value_by_str(g_info_src_str, INFO_SRC_END, buf_val);
+        break;
+    case INFO_CTRL_MEM_FRMT:
+        info_ctrl->frmt = dfd_ko_cfg_get_enum_value_by_str(g_info_frmt_str, INFO_FRMT_END, buf_val);
+        break;
+    case INFO_CTRL_MEM_POLA:
+        info_ctrl->pola = dfd_ko_cfg_get_enum_value_by_str(g_info_pola_str, INFO_POLA_END, buf_val);
+        break;
+    case INFO_CTRL_MEM_FPATH:
+        mem_clear(info_ctrl->fpath, sizeof(info_ctrl->fpath));
+        strlcpy(info_ctrl->fpath, buf_val, sizeof(info_ctrl->fpath));
+        break;
+    case INFO_CTRL_MEM_ADDR:
+        dfd_ko_cfg_get_value_from_char(buf_val, &(info_ctrl->addr), line_num);
+        break;
+    case INFO_CTRL_MEM_LEN:
+        dfd_ko_cfg_get_value_from_char(buf_val, &(info_ctrl->len), line_num);
+        break;
+    case INFO_CTRL_MEM_BIT_OFFSET:
+        dfd_ko_cfg_get_value_from_char(buf_val, &(info_ctrl->bit_offset), line_num);
+        break;
+    case INFO_CTRL_MEM_STR_CONS:
+        mem_clear(info_ctrl->str_cons, sizeof(info_ctrl->str_cons));
+        strlcpy(info_ctrl->str_cons, buf_val, sizeof(info_ctrl->str_cons));
+        break;
+    case INFO_CTRL_MEM_INT_EXTRA1:
+        dfd_ko_cfg_get_value_from_char(buf_val, &(info_ctrl->int_extra1), line_num);
+        break;
+    case INFO_CTRL_MEM_INT_EXTRA2:
+        dfd_ko_cfg_get_value_from_char(buf_val, &(info_ctrl->int_extra2), line_num);
+        break;
+    case INFO_CTRL_MEM_INT_EXTRA3:
+        dfd_ko_cfg_get_value_from_char(buf_val, &(info_ctrl->int_extra3), line_num);
+        break;
+    default:
+        break;
+    }
+}
+
+static int dfd_ko_cfg_add_info_ctrl_item(int key, info_ctrl_mem_t member, char *buf_val,
+            int line_num)
+{
+    int rv;
+    info_ctrl_t *info_ctrl_cfg;
+
+    info_ctrl_cfg = lnode_find_node(&dfd_ko_cfg_list_root, key);
+    if (info_ctrl_cfg == NULL) {
+
+        info_ctrl_cfg = (info_ctrl_t *)kmalloc(sizeof(info_ctrl_t), GFP_KERNEL);
+        if (info_ctrl_cfg == NULL) {
+            DBG_DEBUG(DBG_ERROR, "line%d: kmalloc info_ctrl fail\n", line_num);
+            return -1;
+        }
+        mem_clear(info_ctrl_cfg, sizeof(info_ctrl_t));
+
+        dfd_ko_cfg_set_info_ctrl_mem_value(info_ctrl_cfg, member, buf_val, line_num);
+        rv = lnode_insert_node(&dfd_ko_cfg_list_root, key, info_ctrl_cfg);
+        if (rv == 0) {
+            DBG_DEBUG(DBG_VERBOSE, "line%d: add info_ctrl item[%s=%s] success, key=0x%08x\n", line_num,
+                g_info_ctrl_mem_str[member], buf_val, key);
+        } else {
+            kfree(info_ctrl_cfg);
+            info_ctrl_cfg = NULL;
+            DBG_DEBUG(DBG_ERROR, "line%d: add info_ctrl item[%s=%s] fail, key=0x%08x rv=%d\n", line_num,
+                g_info_ctrl_mem_str[member], buf_val, key, rv);
+            return -1;
+        }
+    } else {
+
+        DBG_DEBUG(DBG_VERBOSE, "line%d: replace info_ctrl item[%s=%s], key=0x%08x\n", line_num,
+            g_info_ctrl_mem_str[member], buf_val, key);
+        dfd_ko_cfg_set_info_ctrl_mem_value(info_ctrl_cfg, member, buf_val, line_num);
+    }
+
+    return 0;
+}
+
+static int dfd_ko_cfg_analyse_info_ctrl_item(dfd_cfg_item_id_t cfg_item_id, char *arg_name,
+            char *arg_value, char *cfg_pre, index_range_t *index_range, int line_num)
+{
+    int rv;
+    int index1 = 0, index2 = 0;
+    int key;
+    char *arg_name_tmp;
+    info_ctrl_mem_t member;
+
+    arg_name_tmp = arg_name + strlen(cfg_pre);
+    rv = dfd_ko_cfg_get_info_ctrl_member(arg_name_tmp, &member, line_num);
+    if (rv < 0) {
+        return -1;
+    }
+
+    if (index_range->index1_max != INDEX_NOT_EXIST) {
+        arg_name_tmp += strlen(g_info_ctrl_mem_str[member]);
+        rv = dfd_ko_cfg_get_index(arg_name_tmp, index_range, &index1, &index2, line_num);
+        if (rv < 0) {
+            return -1;
+        }
+    }
+
+    key = DFD_CFG_KEY(cfg_item_id, index1, index2);
+    rv = dfd_ko_cfg_add_info_ctrl_item(key, member, arg_value, line_num);
+    if (rv < 0) {
+        return -1;
+    }
+
+    return 0;
+}
+
+static int dfd_ko_cfg_analyse_config(char *arg_name, char*arg_value, int line_num)
+{
+    int i, rv = 0;
+    int cfg_item_num;
+
+    cfg_item_num = sizeof(dfd_cfg_item_name) / sizeof(dfd_cfg_item_name[0]);
+    for (i = 0; i < cfg_item_num; i++) {
+        if (memcmp(arg_name, dfd_cfg_item_name[i], strlen(dfd_cfg_item_name[i])) == 0){
+            if (DFD_CFG_ITEM_IS_INT(i)) {
+                rv = dfd_ko_cfg_analyse_int_item(i, arg_name, arg_value, dfd_cfg_item_name[i],
+                    &(dfd_cfg_item_index_range[i]), line_num);
+            } else if (DFD_CFG_ITEM_IS_STRING(i)) {
+                rv = dfd_ko_cfg_analyse_str_item(i, arg_name, arg_value, dfd_cfg_item_name[i],
+                    &(dfd_cfg_item_index_range[i]), line_num);
+            } else if (DFD_CFG_ITEM_IS_I2C_DEV(i)) {
+                rv = dfd_ko_cfg_analyse_i2c_dev_item(i, arg_name, arg_value, dfd_cfg_item_name[i],
+                    &(dfd_cfg_item_index_range[i]), line_num);
+            } else if (DFD_CFG_ITEM_IS_INFO_CTRL(i)) {
+                rv = dfd_ko_cfg_analyse_info_ctrl_item(i, arg_name, arg_value, dfd_cfg_item_name[i],
+                    &(dfd_cfg_item_index_range[i]), line_num);
+            } else {
+                rv = -1;
+            }
+            break;
+        }
+    }
+
+    return rv;
+}
+
+static int dfd_ko_cfg_cut_config_line(char *config_line, char *arg_name, char *arg_value)
+{
+    int i, j = 0, k = 0;
+    int len, name_value_flag = 0;
+
+    len = strlen(config_line);
+    for (i = 0; i < len; i++) {
+        if (config_line[i] == '=') {
+            name_value_flag = 1;
+            continue;
+        }
+
+        if (name_value_flag == 0) {
+            arg_name[j++] = config_line[i];
+        } else {
+            arg_value[k++] = config_line[i];
+        }
+    }
+
+    if (name_value_flag == 0) {
+        return -1;
+    } else {
+        return 0;
+    }
+}
+
+static int dfd_ko_cfg_analyse_config_line(char *config_line, int line_num)
+{
+    int rv;
+    char arg_name[DFD_CFG_NAME_MAX_LEN] = {0};
+    char arg_value[DFD_CFG_VALUE_MAX_LEN] = {0};
+
+    dfd_ko_cfg_del_space_lf_cr(config_line);
+
+    if (strlen(config_line) == 0) {
+        DBG_DEBUG(DBG_VERBOSE, "line%d: space line\n", line_num);
+        return 0;
+    }
+
+    if (config_line[0] == '#') {
+        DBG_DEBUG(DBG_VERBOSE, "line%d: comment line[%s]\n", line_num, config_line);
+        return 0;
+    }
+
+    rv = dfd_ko_cfg_cut_config_line(config_line, arg_name, arg_value);
+    if (rv < 0) {
+        DBG_DEBUG(DBG_VERBOSE, "line%d: [%s]no '=' between name and value\n", line_num, config_line);
+        return -1;
+    }
+
+    DBG_DEBUG(DBG_VERBOSE, "line%d: config_line[%s] name[%s] value[%s]\n", line_num, config_line, arg_name, arg_value);
+    return dfd_ko_cfg_analyse_config(arg_name, arg_value, line_num);
+}
+
+static int dfd_ko_cfg_analyse_config_file(char *fpath)
+{
+    int rv;
+    int line_num = 1;
+    kfile_ctrl_t kfile_ctrl;
+    char config_line[DFD_CFG_CMDLINE_MAX_LEN] = {0};
+
+    rv = kfile_open(fpath, &kfile_ctrl);
+    if (rv != KFILE_RV_OK) {
+        DBG_DEBUG(DBG_ERROR, "open config file[%s] fail, rv=%d\n", fpath, rv);
+        return -1;
+    }
+
+    while(kfile_gets(config_line, sizeof(config_line), &kfile_ctrl) > 0){
+        rv = dfd_ko_cfg_analyse_config_line(config_line, line_num++);
+        if (rv < 0) {
+            DBG_DEBUG(DBG_ERROR, "!!!!file[%s] config line[%d %s] analyse fail\n", fpath, line_num - 1,
+                config_line);
+            break;
+        }
+
+        (void)mem_clear(config_line, sizeof(config_line));
+
+    }
+    kfile_close(&kfile_ctrl);
+
+    return rv;
+}
+
+void *dfd_ko_cfg_get_item(int key)
+{
+    return lnode_find_node(&dfd_ko_cfg_list_root, key);
+}
+
+static void dfd_ko_cfg_print_item(int key, const void *cfg)
+{
+    int item_id;
+    dfd_i2c_dev_t *i2c_dev;
+    info_ctrl_t *info_ctrl;
+
+    if (cfg == NULL) {
+        DBG_DEBUG(DBG_ERROR, "input arguments error\n");
+        return;
+    }
+    printk(KERN_INFO "**************************\n");
+    printk(KERN_INFO "key=0x%08x\n", key);
+
+    item_id = DFD_CFG_ITEM_ID(key);
+    if (DFD_CFG_ITEM_IS_INT(item_id)) {
+        printk(KERN_INFO "int=%d\n", *((int *)cfg));
+    } else if (DFD_CFG_ITEM_IS_I2C_DEV(item_id)) {
+        i2c_dev = (dfd_i2c_dev_t *)cfg;
+        printk(KERN_INFO ".bus=0x%02x\n", i2c_dev->bus);
+        printk(KERN_INFO ".addr=0x%02x\n", i2c_dev->addr);
+    } else if (DFD_CFG_ITEM_IS_INFO_CTRL(item_id)) {
+        info_ctrl = (info_ctrl_t *)cfg;
+        printk(KERN_INFO ".mode=%s\n", g_info_ctrl_mode_str[info_ctrl->mode]);
+        printk(KERN_INFO ".int_cons=%d\n", info_ctrl->int_cons);
+        printk(KERN_INFO ".src=%s\n", g_info_src_str[info_ctrl->src]);
+        printk(KERN_INFO ".frmt=%s\n", g_info_frmt_str[info_ctrl->frmt]);
+        printk(KERN_INFO ".pola=%s\n", g_info_pola_str[info_ctrl->pola]);
+        printk(KERN_INFO ".fpath=%s\n", info_ctrl->fpath);
+        printk(KERN_INFO ".addr=0x%02x\n", info_ctrl->addr);
+        printk(KERN_INFO ".len=%d\n", info_ctrl->len);
+        printk(KERN_INFO ".bit_offset=%d\n", info_ctrl->bit_offset);
+    } else {
+        printk(KERN_INFO "item[%d] error!\n", item_id);
+    }
+}
+
+void dfd_ko_cfg_show_item(int key)
+{
+    void *cfg;
+
+    cfg = lnode_find_node(&dfd_ko_cfg_list_root, key);
+    if (cfg == 0) {
+        printk(KERN_INFO "item[0x%08x] not exist\n", key);
+        return;
+    }
+
+    dfd_ko_cfg_print_item(key, cfg);
+}
+
+static int dfd_get_my_dev_type_by_file(void)
+{
+    struct file *fp;
+    loff_t pos;
+    int card_type;
+    char buf[DFD_PID_BUF_LEN];
+    int ret;
+
+    fp= filp_open(DFD_PUB_CARDTYPE_FILE, O_RDONLY, 0);
+    if (IS_ERR(fp)) {
+        DBG_DEBUG(DBG_VERBOSE, "open file fail!\n");
+        return -1;
+    }
+    mem_clear(buf, DFD_PID_BUF_LEN);
+    pos = 0;
+    ret = kernel_read(fp, buf, DFD_PRODUCT_ID_LENGTH + 1, &pos);
+    if (ret < 0) {
+        DBG_DEBUG(DBG_VERBOSE, "kernel_read failed, path=%s, addr=0, size=%d, ret=%d\n",
+            DFD_PUB_CARDTYPE_FILE, DFD_PRODUCT_ID_LENGTH + 1, ret);
+        filp_close(fp, NULL);
+        return -1;
+    }
+
+    card_type = simple_strtoul(buf, NULL, 10);
+    DBG_DEBUG(DBG_VERBOSE, "card_type 0x%x.\n", card_type);
+
+    filp_close(fp, NULL);
+    return card_type;
+}
+
+static int drv_get_my_dev_type(void)
+{
+    static int type = -1;
+
+    if (type > 0) {
+        return type;
+    }
+    type = dfd_get_my_dev_type_by_file();
+    DBG_DEBUG(DBG_VERBOSE, "ko board type %d\n", type);
+    return type;
+}
+
+static int dfd_ko_cfg_init(void)
+{
+    int rv;
+    int card_type;
+    char file_name[32] = {0};
+    char fpath[128] = {0};
+    kfile_ctrl_t kfile_ctrl;
+
+    rv = lnode_init_root(&dfd_ko_cfg_list_root);
+    if (rv < 0) {
+        DBG_DEBUG(DBG_ERROR, "init list root fail, rv=%d\n", rv);
+        return -1;
+    }
+
+    card_type = drv_get_my_dev_type();
+    if (card_type > 0) {
+        snprintf(fpath, sizeof(fpath), "%s0x%x", DFD_KO_CFG_FILE_DIR, card_type);
+        rv = kfile_open(fpath, &kfile_ctrl);
+        if (rv != KFILE_RV_OK) {
+            DBG_DEBUG(DBG_VERBOSE, "open config file[%s] fail, rv=%d, maybe not exist\n",
+                fpath, rv);
+
+            rv = kfile_open(DFD_KO_CFG_FILE_NAME, &kfile_ctrl);
+            if (rv != KFILE_RV_OK) {
+                DBG_DEBUG(DBG_ERROR, "open config file[%s] fail, rv=%d\n", DFD_KO_CFG_FILE_NAME,
+                    rv);
+                return -1;
+            }
+            DBG_DEBUG(DBG_ERROR, "get config file from: %s, success.\n", DFD_KO_CFG_FILE_NAME);
+        } else {
+            DBG_DEBUG(DBG_VERBOSE, "get config file from: %s, success.\n", fpath);
+        }
+    } else {
+        DBG_DEBUG(DBG_VERBOSE, "get board id failed, try to get config file from: %s\n",
+            DFD_KO_CFG_FILE_NAME);
+
+        rv = kfile_open(DFD_KO_CFG_FILE_NAME, &kfile_ctrl);
+        if (rv != KFILE_RV_OK) {
+            DBG_DEBUG(DBG_ERROR, "open config file[%s] fail, rv=%d\n", DFD_KO_CFG_FILE_NAME, rv);
+            return -1;
+        }
+        DBG_DEBUG(DBG_ERROR, "get config file from: %s, success.\n", DFD_KO_CFG_FILE_NAME);
+    }
+
+    while (kfile_gets(file_name, sizeof(file_name), &kfile_ctrl) > 0) {
+
+        dfd_ko_cfg_del_space_lf_cr(file_name);
+        mem_clear(fpath, sizeof(fpath));
+        snprintf(fpath, sizeof(fpath), "%s%s.cfg", DFD_KO_CFG_FILE_DIR, file_name);
+        DBG_DEBUG(DBG_VERBOSE, ">>>>start parsing config file[%s]\n", fpath);
+
+        rv = dfd_ko_cfg_analyse_config_file(fpath);
+        if (rv < 0) {
+            break;
+        }
+    }
+    kfile_close(&kfile_ctrl);
+
+    return 0;
+}
+
+int32_t dfd_dev_cfg_init(void)
+{
+    return dfd_ko_cfg_init();
+}
+
+void dfd_dev_cfg_exit(void)
+{
+    lnode_free_list(&dfd_ko_cfg_list_root);
+    return;
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/cfg/dfd_cfg_adapter.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/cfg/dfd_cfg_adapter.c
new file mode 100644
index 000000000..9c8dc6aa0
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/cfg/dfd_cfg_adapter.c
@@ -0,0 +1,358 @@
+#include <linux/fs.h>
+#include <linux/slab.h>
+#include <asm/unistd.h>
+#include <linux/uaccess.h>
+#include <linux/types.h>
+#include <linux/delay.h>
+#include <linux/i2c.h>
+
+#include "../include/dfd_module.h"
+#include "../include/dfd_cfg_file.h"
+#include "../include/dfd_cfg.h"
+#include "../include/dfd_cfg_adapter.h"
+#include "../../dev_sysfs/include/sysfs_common.h"
+
+char *g_dfd_i2c_dev_mem_str[DFD_I2C_DEV_MEM_END] = {
+    ".bus",
+    ".addr",
+};
+
+static dfd_i2c_dev_t* dfd_ko_get_cpld_i2c_dev(int sub_slot, int cpld_id)
+{
+    int key;
+    dfd_i2c_dev_t *i2c_dev;
+
+    key = DFD_CFG_KEY(DFD_CFG_ITEM_CPLD_I2C_DEV, sub_slot, cpld_id);
+    i2c_dev = dfd_ko_cfg_get_item(key);
+    if (i2c_dev == NULL) {
+        DBG_DEBUG(DBG_ERROR, "get cpld[%d] i2c dev config fail, key=0x%08x\n", cpld_id, key);
+        return NULL;
+    }
+
+    return i2c_dev;
+}
+
+static int32_t dfd_ko_i2c_smbus_transfer(int read_write, int bus, int addr, int offset, uint8_t *buf, uint32_t size)
+{
+    int rv;
+    struct i2c_adapter *i2c_adap;
+    union i2c_smbus_data data;
+
+    i2c_adap = i2c_get_adapter(bus);
+    if (i2c_adap == NULL) {
+        DBG_DEBUG(DBG_ERROR, "get i2c bus[%d] adapter fail\n", bus);
+        return -DFD_RV_DEV_FAIL;
+    }
+
+    if (read_write == I2C_SMBUS_WRITE) {
+        data.byte = *buf;
+    } else {
+        data.byte = 0;
+    }
+    rv = i2c_smbus_xfer(i2c_adap, addr, 0, read_write, offset, I2C_SMBUS_BYTE_DATA, &data);
+    if (rv < 0) {
+        DBG_DEBUG(DBG_ERROR, "i2c dev[bus=%d addr=0x%x offset=0x%x size=%d rw=%d] transfer fail, rv=%d\n",
+            bus, addr, offset, size, read_write, rv);
+        rv = -DFD_RV_DEV_FAIL;
+    } else {
+        DBG_DEBUG(DBG_VERBOSE, "i2c dev[bus=%d addr=0x%x offset=0x%x size=%d rw=%d] transfer success\n",
+            bus, addr, offset, size, read_write);
+        rv = DFD_RV_OK;
+    }
+
+    if (read_write == I2C_SMBUS_READ) {
+        if (rv == DFD_RV_OK) {
+            *buf = data.byte;
+        } else {
+            *buf = 0;
+        }
+    }
+
+    i2c_put_adapter(i2c_adap);
+    return rv;
+}
+
+static int32_t dfd_ko_i2c_read_data(int bus, int addr, int offset, uint8_t *buf, uint32_t size)
+{
+    int i, rv;
+    for (i = 0; i < DFD_KO_CPLD_I2C_RETRY_TIMES; i++) {
+        rv = dfd_ko_i2c_smbus_transfer(I2C_SMBUS_READ, bus, addr, offset, buf, size);
+        if (rv < 0) {
+            DBG_DEBUG(DBG_ERROR, "[%d]cpld read[offset=0x%x] fail, rv %d\n", i, addr, rv);
+            msleep(DFD_KO_CPLD_I2C_RETRY_SLEEP);
+        } else {
+            DBG_DEBUG(DBG_VERBOSE, "[%d]cpld read[offset=0x%x] success, value=0x%x\n",
+                i, addr, *buf);
+            break;
+        }
+    }
+    return rv;
+}
+
+static int32_t dfd_ko_i2c_write_data(int bus, int addr, int offset, uint8_t data, uint32_t size)
+{
+    int i, rv;
+    for (i = 0; i < DFD_KO_CPLD_I2C_RETRY_TIMES; i++) {
+        rv = dfd_ko_i2c_smbus_transfer(I2C_SMBUS_WRITE, bus, addr, offset, &data, size);
+        if (rv < 0) {
+            DBG_DEBUG(DBG_ERROR, "[%d]cpld write[offset=0x%x] fail, rv=%d\n", i, addr, rv);
+            msleep(DFD_KO_CPLD_I2C_RETRY_SLEEP);
+        } else {
+            DBG_DEBUG(DBG_VERBOSE, "[%d]cpld write[offset=0x%x, data=%d] success\n", i, addr, data);
+            break;
+        }
+    }
+
+    return rv;
+}
+
+static int32_t dfd_ko_cpld_i2c_read(int32_t addr, uint8_t *buf)
+{
+    int rv;
+    int sub_slot, cpld_id, cpld_addr;
+    dfd_i2c_dev_t *i2c_dev;
+
+    if (buf == NULL) {
+        DBG_DEBUG(DBG_ERROR, "input arguments error\n");
+        return -DFD_RV_INDEX_INVALID;
+    }
+
+    sub_slot = DFD_KO_CPLD_GET_SLOT(addr);
+    cpld_id = DFD_KO_CPLD_GET_ID(addr);
+    cpld_addr = DFD_KO_CPLD_GET_INDEX(addr);
+
+    i2c_dev = dfd_ko_get_cpld_i2c_dev(sub_slot, cpld_id);
+    if (i2c_dev == NULL) {
+        return -DFD_RV_DEV_NOTSUPPORT;
+    }
+    rv = dfd_ko_i2c_read_data(i2c_dev->bus, i2c_dev->addr, cpld_addr, buf, sizeof(uint8_t));
+
+    return rv;
+}
+
+static int32_t dfd_ko_cpld_i2c_write(int32_t addr, uint8_t data)
+{
+    int rv;
+    int sub_slot, cpld_id, cpld_addr;
+    dfd_i2c_dev_t *i2c_dev;
+
+    sub_slot = DFD_KO_CPLD_GET_SLOT(addr);
+    cpld_id = DFD_KO_CPLD_GET_ID(addr);
+    cpld_addr = DFD_KO_CPLD_GET_INDEX(addr);
+
+    i2c_dev = dfd_ko_get_cpld_i2c_dev(sub_slot, cpld_id);
+    if (i2c_dev == NULL) {
+        return -DFD_RV_DEV_NOTSUPPORT;
+    }
+
+    rv = dfd_ko_i2c_write_data(i2c_dev->bus, i2c_dev->addr, cpld_addr, data, sizeof(uint8_t));
+
+    return rv;
+}
+
+static int32_t dfd_ko_cpld_io_read(int32_t addr, uint8_t *buf)
+{
+    int cpld_id, sub_slot, offset;
+    int key;
+    int *tmp;
+    uint16_t io_port;
+
+    sub_slot = DFD_KO_CPLD_GET_SLOT(addr);
+    cpld_id = DFD_KO_CPLD_GET_ID(addr);
+    offset = DFD_KO_CPLD_GET_INDEX(addr);
+
+    key = DFD_CFG_KEY(DFD_CFG_ITEM_CPLD_LPC_DEV, sub_slot, cpld_id);
+    tmp = dfd_ko_cfg_get_item(key);
+    if (tmp == NULL) {
+        DBG_DEBUG(DBG_ERROR,"get cpld io base config fail, key=0x%08x\n", key);
+        return -1;
+    }
+
+    io_port = (u16)(*tmp) + offset;
+    *buf = inb(io_port);
+    DBG_DEBUG(DBG_VERBOSE, "read cpld io port addr 0x%x, data 0x%x\n", io_port, *buf);
+
+    return DFD_RV_OK;
+
+}
+
+static int32_t dfd_ko_cpld_io_write(int32_t addr, uint8_t data)
+{
+    int cpld_id, sub_slot, offset;
+    int key;
+    int *tmp;
+    uint16_t io_port;
+
+    sub_slot = DFD_KO_CPLD_GET_SLOT(addr);
+    cpld_id = DFD_KO_CPLD_GET_ID(addr);
+    offset = DFD_KO_CPLD_GET_INDEX(addr);
+
+    key = DFD_CFG_KEY(DFD_CFG_ITEM_CPLD_LPC_DEV, sub_slot, cpld_id);
+    tmp = dfd_ko_cfg_get_item(key);
+    if (tmp == NULL) {
+        DBG_DEBUG(DBG_ERROR, "get cpld io base config fail, key=0x%08x\n", key);
+        return -1;
+    }
+
+    io_port = (u16)(*tmp) + offset;
+    DBG_DEBUG(DBG_VERBOSE, "write cpld io port addr 0x%x, data 0x%x\n", io_port, data);
+    outb(data, (u16)io_port);
+
+    return DFD_RV_OK;
+}
+
+static int dfd_cfg_get_cpld_mode(int sub_slot, int cpld_id, int *mode)
+{
+    int key;
+    char *name;
+
+    if (mode == NULL) {
+        DBG_DEBUG(DBG_ERROR, "input arguments error\n");
+        return -DFD_RV_TYPE_ERR;
+    }
+
+    key = DFD_CFG_KEY(DFD_CFG_ITEM_CPLD_MODE, sub_slot, cpld_id);
+    name = dfd_ko_cfg_get_item(key);
+    if (name == NULL) {
+        DBG_DEBUG(DBG_ERROR, "get cpld[%d] mode info ctrl fail, key=0x%08x\n", cpld_id, key);
+        return -DFD_RV_NODE_FAIL;
+    }
+
+    DBG_DEBUG(DBG_VERBOSE, "cpld_id %d mode_name %s.\n", cpld_id, name);
+    if (!strncmp(name, DFD_KO_CPLD_MODE_I2C_STRING, strlen(DFD_KO_CPLD_MODE_I2C_STRING))) {
+        *mode = DFD_CPLD_MODE_I2C;
+    } else if (!strncmp(name, DFD_KO_CPLD_MODE_LPC_STRING, strlen(DFD_KO_CPLD_MODE_LPC_STRING))) {
+        *mode = DFD_CPLD_MODE_LPC;
+    } else {
+
+        *mode = DFD_CPLD_MODE_I2C;
+    }
+
+    DBG_DEBUG(DBG_VERBOSE, "cpld_id %d mode %d.\n", cpld_id, *mode);
+    return 0;
+}
+
+int32_t dfd_ko_cpld_read(int32_t addr, uint8_t *buf)
+{
+    int ret;
+    int sub_slot, cpld_id;
+    int cpld_mode;
+
+    sub_slot = DFD_KO_CPLD_GET_SLOT(addr);
+    cpld_id = DFD_KO_CPLD_GET_ID(addr);
+
+    ret = dfd_cfg_get_cpld_mode(sub_slot, cpld_id, &cpld_mode);
+    if (ret) {
+        DBG_DEBUG(DBG_WARN, "drv_get_cpld_mode sub_slot %d cpldid %d faile, set default i2c mode.\n", sub_slot, cpld_id);
+        cpld_mode = DFD_CPLD_MODE_I2C;
+    }
+
+    if (cpld_mode == DFD_CPLD_MODE_I2C) {
+        ret = dfd_ko_cpld_i2c_read(addr, buf);
+    } else if (cpld_mode == DFD_CPLD_MODE_LPC) {
+        ret = dfd_ko_cpld_io_read(addr, buf);
+    } else {
+        DBG_DEBUG(DBG_ERROR, "cpld_mode %d invalid.\n", cpld_mode);
+        ret = -DFD_RV_DEV_NOTSUPPORT;
+    }
+
+    DBG_DEBUG(DBG_VERBOSE, "addr 0x%x val 0x%x ret %d\n", addr, *buf, ret);
+    return ret;
+}
+
+int32_t dfd_ko_cpld_write(int32_t addr, uint8_t val)
+{
+    int ret;
+    int sub_slot, cpld_id, cpld_mode;
+
+    sub_slot = DFD_KO_CPLD_GET_SLOT(addr);
+    cpld_id = DFD_KO_CPLD_GET_ID(addr);
+
+    ret = dfd_cfg_get_cpld_mode(sub_slot, cpld_id, &cpld_mode);
+    if (ret) {
+        DBG_DEBUG(DBG_ERROR, "drv_get_cpld_mode sub_slot %d cpldid %d faile, set default local_bus mode.\n", sub_slot, cpld_id);
+        cpld_mode = DFD_CPLD_MODE_I2C;
+    }
+
+    if (cpld_mode == DFD_CPLD_MODE_I2C) {
+        ret = dfd_ko_cpld_i2c_write(addr, val);
+    } else if (cpld_mode == DFD_CPLD_MODE_LPC) {
+        ret = dfd_ko_cpld_io_write(addr, val);
+    } else {
+        DBG_DEBUG(DBG_ERROR, "cpld_mode %d invalid.\n", cpld_mode);
+        ret = -DFD_RV_DEV_NOTSUPPORT;
+    }
+
+    DBG_DEBUG(DBG_VERBOSE, "addr 0x%x val 0x%x ret %d\n", addr, val, ret);
+    return ret;
+}
+
+int32_t dfd_ko_i2c_read(int bus, int addr, int offset, uint8_t *buf, uint32_t size)
+{
+    int i, rv;
+
+    for (i = 0; i < size; i++) {
+        rv = dfd_ko_i2c_read_data(bus, addr, offset, &buf[i], sizeof(uint8_t));
+        if (rv < 0) {
+            DBG_DEBUG(DBG_ERROR, "dfd_ko_i2c_read[bus=%d addr=0x%x offset=0x%x]fail, rv=%d\n",
+                bus, addr, offset, rv);
+            return rv;
+        }
+        offset++;
+    }
+
+    return size;
+}
+
+int32_t dfd_ko_i2c_write(int bus, int addr, int offset, uint8_t *buf, uint32_t size)
+{
+    int i, rv;
+
+    for (i = 0; i < size; i++) {
+        rv = dfd_ko_i2c_write_data(bus, addr, offset, buf[i], sizeof(uint8_t));
+        if (rv < 0) {
+            DBG_DEBUG(DBG_ERROR, "dfd_ko_i2c_write[bus=%d addr=0x%x offset=0x%x]fail, rv=%d\n",
+                bus, addr, offset, rv);
+            return rv;
+        }
+        offset++;
+    }
+
+    return size;
+
+}
+
+int32_t dfd_ko_read_file(char *fpath, int32_t addr, uint8_t *val, int32_t read_bytes)
+{
+    int32_t ret;
+    struct file *filp;
+    loff_t pos;
+
+    struct kvec iov = {
+        .iov_base = val,
+        .iov_len = min_t(size_t, read_bytes, MAX_RW_COUNT),
+    };
+    struct iov_iter iter;
+
+    if ((fpath == NULL) || (val == NULL) || (addr < 0) || (read_bytes < 0)) {
+        DBG_DEBUG(DBG_ERROR, "input arguments error, addr=%d read_bytes=%d\n", addr, read_bytes);
+        return -DFD_RV_INDEX_INVALID;
+    }
+
+    filp = filp_open(fpath, O_RDONLY, 0);
+    if (IS_ERR(filp)){
+        DBG_DEBUG(DBG_ERROR, "open file[%s] fail\n", fpath);
+        return -DFD_RV_DEV_FAIL;
+    }
+
+    pos = addr;
+    iov_iter_kvec(&iter, ITER_DEST, &iov, 1, iov.iov_len);
+    ret = vfs_iter_read(filp, &iter, &pos, 0);
+    if (ret < 0) {
+        DBG_DEBUG(DBG_ERROR, "vfs_iter_read failed, path=%s, addr=%d, size=%d, ret=%d\n", fpath, addr, read_bytes, ret);
+        ret = -DFD_RV_DEV_FAIL;
+    }
+
+    filp_close(filp, NULL);
+    return ret;
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/cfg/dfd_cfg_file.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/cfg/dfd_cfg_file.c
new file mode 100644
index 000000000..ac1c22ff1
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/cfg/dfd_cfg_file.c
@@ -0,0 +1,236 @@
+#include <asm/unistd.h>
+#include <linux/uaccess.h>
+#include <linux/stat.h>
+#include <linux/slab.h>
+#include <linux/fs.h>
+#include <linux/mm.h>
+#include <linux/types.h>
+#include <linux/module.h>
+#include <linux/kernel.h>
+
+#include "../include/dfd_cfg_file.h"
+#include "../include/dfd_module.h"
+#include "../../dev_sysfs/include/sysfs_common.h"
+
+struct getdents_callback {
+    struct dir_context ctx;
+    const char *obj_name;
+    char *match_name;
+    int dir_len;
+    int found;
+};
+
+int kfile_open(char *fname, kfile_ctrl_t *kfile_ctrl)
+{
+    int ret;
+    struct file *filp;
+    loff_t pos;
+
+    if ((fname == NULL) || (kfile_ctrl == NULL)) {
+        return KFILE_RV_INPUT_ERR;
+    }
+
+    filp = filp_open(fname, O_RDONLY, 0);
+    if (IS_ERR(filp)){
+        return KFILE_RV_OPEN_FAIL;
+    }
+
+    kfile_ctrl->size = filp->f_inode->i_size;
+
+    kfile_ctrl->buf = kmalloc(kfile_ctrl->size, GFP_KERNEL);
+    if (kfile_ctrl->buf == NULL) {
+        ret = KFILE_RV_MALLOC_FAIL;
+        goto close_fp;
+    }
+    mem_clear(kfile_ctrl->buf, kfile_ctrl->size);
+
+    pos = 0;
+    ret = kernel_read(filp, kfile_ctrl->buf, kfile_ctrl->size, &pos);
+    if (ret < 0) {
+        ret = KFILE_RV_RD_FAIL;
+        goto free_buf;
+    }
+
+    kfile_ctrl->pos = 0;
+
+    ret = KFILE_RV_OK;
+    goto close_fp;
+
+free_buf:
+    kfree(kfile_ctrl->buf);
+    kfile_ctrl->buf = NULL;
+
+close_fp:
+    filp_close(filp, NULL);
+    return ret;
+}
+
+void kfile_close(kfile_ctrl_t *kfile_ctrl)
+{
+    if (kfile_ctrl == NULL) {
+        return;
+    }
+
+    kfile_ctrl->size = 0;
+    kfile_ctrl->pos = 0;
+    if (kfile_ctrl->buf) {
+        kfree(kfile_ctrl->buf);
+        kfile_ctrl->buf = NULL;
+    }
+}
+
+int kfile_gets(char *buf, int buf_size, kfile_ctrl_t *kfile_ctrl)
+{
+    int i;
+    int has_cr = 0;
+
+    if ((buf == NULL) || (buf_size <= 0) || (kfile_ctrl == NULL) || (kfile_ctrl->buf == NULL)
+            || (kfile_ctrl->size <= 0)) {
+        return KFILE_RV_INPUT_ERR;
+    }
+
+    mem_clear(buf, buf_size);
+    for (i = 0; i < buf_size; i++) {
+
+        if (kfile_ctrl->pos >= kfile_ctrl->size) {
+            break;
+        }
+
+        if (has_cr) {
+            break;
+        }
+
+        if (IS_CR(kfile_ctrl->buf[kfile_ctrl->pos])) {
+            has_cr = 1;
+        }
+
+        buf[i] = kfile_ctrl->buf[kfile_ctrl->pos];
+        kfile_ctrl->pos++;
+    }
+
+    return i;
+}
+
+int kfile_read(int32_t addr, char *buf, int buf_size, kfile_ctrl_t *kfile_ctrl)
+{
+    int i;
+
+    if ((buf == NULL) || (buf_size <= 0) || (kfile_ctrl == NULL) || (kfile_ctrl->buf == NULL)
+            || (kfile_ctrl->size <= 0)) {
+        return KFILE_RV_INPUT_ERR;
+    }
+
+    if ((addr < 0) || (addr >= kfile_ctrl->size)) {
+        return KFILE_RV_ADDR_ERR;
+    }
+
+    mem_clear(buf, buf_size);
+
+    kfile_ctrl->pos = addr;
+    for (i = 0; i < buf_size; i++) {
+
+        if (kfile_ctrl->pos >= kfile_ctrl->size) {
+            break;
+        }
+
+        buf[i] = kfile_ctrl->buf[kfile_ctrl->pos];
+        kfile_ctrl->pos++;
+    }
+
+    return i;
+}
+
+static bool kfile_filldir_one(struct dir_context *ctx, const char * name, int len,
+            loff_t pos, u64 ino, unsigned int d_type)
+{
+    struct getdents_callback *buf ;
+    bool result;
+    buf = container_of(ctx, struct getdents_callback, ctx);
+    result = 1;
+    if (strncmp(buf->obj_name, name, strlen(buf->obj_name)) == 0) {
+        if (buf->dir_len < len) {
+            DBG_DEBUG(DBG_ERROR, "match ok. dir name:%s, but buf_len %d small than dir len %d.\n",
+                name, buf->dir_len, len);
+            buf->found = 0;
+            return 0;
+        }
+        mem_clear(buf->match_name, buf->dir_len);
+        memcpy(buf->match_name, name, len);
+        buf->found = 1;
+        result = 0;
+    }
+    return result;
+}
+
+int kfile_iterate_dir(const char *dir_path, const char *obj_name, char *match_name, int len)
+{
+    int ret;
+    struct file *dir;
+    struct getdents_callback buffer = {
+        .ctx.actor = kfile_filldir_one,
+    };
+
+    if(!dir_path || !obj_name || !match_name) {
+        DBG_DEBUG(DBG_ERROR, "params error. \n");
+        return KFILE_RV_INPUT_ERR;
+    }
+    buffer.obj_name = obj_name;
+    buffer.match_name = match_name;
+    buffer.dir_len = len;
+    buffer.found = 0;
+
+    dir = filp_open(dir_path, O_RDONLY, 0);
+    if (IS_ERR(dir)) {
+        DBG_DEBUG(DBG_ERROR, "filp_open error, dir path:%s\n", dir_path);
+        return KFILE_RV_OPEN_FAIL;
+    }
+    ret = iterate_dir(dir, &buffer.ctx);
+    if (buffer.found) {
+        DBG_DEBUG(DBG_VERBOSE, "match ok, dir name:%s\n", match_name);
+        filp_close(dir, NULL);
+        return DFD_RV_OK;
+    }
+    filp_close(dir, NULL);
+    return -DFD_RV_NODE_FAIL;
+}
+
+#if 0
+
+int kfile_write(char *fpath, int32_t addr, char *buf, int buf_size)
+{
+    int ret = KFILE_RV_OK;
+    struct file *filp;
+    mm_segment_t old_fs;
+    int wlen;
+
+    if ((fpath == NULL) || (buf == NULL) || (buf_size <= 0)) {
+        return KFILE_RV_INPUT_ERR;
+    }
+
+    if (addr < 0) {
+        return KFILE_RV_ADDR_ERR;
+    }
+
+    filp = filp_open(fpath, O_RDWR, 0);
+    if (IS_ERR(filp)){
+        return KFILE_RV_OPEN_FAIL;
+    }
+
+    old_fs = get_fs();
+    set_fs(KERNEL_DS);
+
+    filp->f_op->llseek(filp,0,0);
+    filp->f_pos = addr;
+
+    wlen = filp->f_op->write(filp, buf, buf_size, &(filp->f_pos));
+    if (wlen < 0) {
+        ret = KFILE_RV_WR_FAIL;
+    }
+
+    filp->f_op->llseek(filp,0,0);
+    set_fs(old_fs);
+    filp_close(filp, NULL);
+
+    return ret;
+}
+#endif
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/cfg/dfd_cfg_info.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/cfg/dfd_cfg_info.c
new file mode 100644
index 000000000..c1ad958bc
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/cfg/dfd_cfg_info.c
@@ -0,0 +1,776 @@
+#include <linux/string.h>
+#include <linux/types.h>
+#include <linux/slab.h>
+
+#include "../include/dfd_module.h"
+#include "../include/dfd_cfg_adapter.h"
+#include "../include/dfd_cfg.h"
+#include "../include/dfd_cfg_info.h"
+#include "../include/dfd_cfg_file.h"
+#include "../../dev_sysfs/include/sysfs_common.h"
+
+#define DFD_HWMON_NAME                                "hwmon"
+/* CPLD_VOLATGE_VALUE_MODE1 */
+#define DFD_GET_CPLD_VOLATGE_CODE_VALUE(value)        ((value >> 4)& 0xfff)
+/* ((code_val * 16 * 33 * k) / ((65536 - 5000) * 10)) = ((code_val * 33 * k) / 37835) */
+#define DFD_GET_CPLD_VOLATGE_REAL_VALUE(code_val, k)  ((code_val * 33 * k) / 37835)
+
+ 
+/* CPLD_VOLATGE_VALUE_MODE2 */
+/* high 8 bit + low 4 bit(bit0-bit3) */
+#define DFD_GET_CPLD_VOLATGE_CODE_VALUE2(value)        (((value & 0xff00) >> 4) + (value & 0xf))
+#define DFD_GET_CPLD_VOLATGE_REAL_VALUE2(code_val, k)  ((code_val * 33 * k) / 40950)
+
+typedef enum cpld_volatge_value_s {
+    CPLD_VOLATGE_VALUE_MODE1,
+    CPLD_VOLATGE_VALUE_MODE2,
+} cpld_volatge_value_t;
+
+char *g_info_ctrl_mem_str[INFO_CTRL_MEM_END] = {
+    ".mode",
+    ".int_cons",
+    ".src",
+    ".frmt",
+    ".pola",
+    ".fpath",
+    ".addr",
+    ".len",
+    ".bit_offset",
+    ".str_cons",
+    ".int_extra1",
+    ".int_extra2",
+    ".int_extra3",
+};
+
+char *g_info_ctrl_mode_str[INFO_CTRL_MODE_END] = {
+    "none",
+    "config",
+    "constant",
+    "tlv",
+    "str_constant",
+};
+
+char *g_info_src_str[INFO_SRC_END] = {
+    "none",
+    "cpld",
+    "fpga",
+    "other_i2c",
+    "file",
+};
+
+char *g_info_frmt_str[INFO_FRMT_END] = {
+    "none",
+    "bit",
+    "byte",
+    "num_bytes",
+    "num_str",
+    "num_buf",
+    "buf",
+};
+
+char *g_info_pola_str[INFO_POLA_END] = {
+    "none",
+    "positive",
+    "negative",
+};
+
+#define MAC_TEMP_INVALID    (99999999)
+
+static int dfd_read_info_from_cpld(int32_t addr, int read_bytes, uint8_t *val)
+{
+    int i, rv;
+
+    for (i = 0; i < read_bytes; i++) {
+        rv = dfd_ko_cpld_read(addr, &(val[i]));
+        if (rv < 0) {
+            DBG_DEBUG(DBG_ERROR, "read info[addr=0x%x read_bytes=%d] from cpld fail, reading_byte=%d rv=%d\n",
+                addr, read_bytes, i, rv);
+            return rv;
+        }
+        addr++;
+    }
+
+    return read_bytes;
+}
+
+static int dfd_write_info_to_cpld(int32_t addr, int write_bytes, uint8_t *val, uint8_t bit_mask)
+{
+    int rv;
+    uint8_t val_tmp;
+
+    if (bit_mask != 0xff) {
+        rv = dfd_ko_cpld_read(addr, &val_tmp);
+        if (rv < 0) {
+            DBG_DEBUG(DBG_ERROR, "read original info[addr=0x%x] from cpld fail, rv=%d\n", addr, rv);
+            return -1;
+        }
+
+        val_tmp = (val_tmp & (~bit_mask)) | (val[0] & bit_mask);
+    } else {
+        val_tmp = val[0];
+    }
+
+    rv = dfd_ko_cpld_write(addr, val_tmp);
+    if (rv < 0) {
+        DBG_DEBUG(DBG_ERROR, "write info[addr=0x%x val=0x%x] to cpld fail, rv=%d\n", addr, val_tmp, rv);
+        return -1;
+    }
+
+    return 0;
+}
+
+static int dfd_read_info(info_src_t src, char *fpath, int32_t addr, int read_bytes, uint8_t *val)
+{
+    int rv = 0;
+
+    switch (src) {
+    case INFO_SRC_CPLD:
+        rv = dfd_read_info_from_cpld(addr, read_bytes, val);
+        break;
+    case INFO_SRC_FPGA:
+        rv = -1;
+        DBG_DEBUG(DBG_ERROR, "not support read info from fpga\n");
+        break;
+    case INFO_SRC_OTHER_I2C:
+        rv = -1;
+        DBG_DEBUG(DBG_ERROR, "not support read info from other i2c\n");
+        break;
+    case INFO_SRC_FILE:
+        rv = dfd_ko_read_file(fpath, addr, val, read_bytes);
+        break;
+    default:
+        rv = -1;
+        DBG_DEBUG(DBG_ERROR, "info src[%d] error\n", src);
+        break;
+    }
+
+    return rv;
+}
+
+static int dfd_write_info(info_src_t src, char *fpath, int32_t addr, int write_bytes, uint8_t *val, uint8_t bit_mask)
+{
+    int rv = 0;
+
+    switch (src) {
+    case INFO_SRC_CPLD:
+        rv = dfd_write_info_to_cpld(addr, write_bytes, val, bit_mask);
+        break;
+    case INFO_SRC_FPGA:
+        rv = -1;
+        DBG_DEBUG(DBG_ERROR, "not support write info to fpga\n");
+        break;
+    case INFO_SRC_OTHER_I2C:
+        rv = -1;
+        DBG_DEBUG(DBG_ERROR, "not support write info to other i2c\n");
+        break;
+    case INFO_SRC_FILE:
+        rv = -1;
+        DBG_DEBUG(DBG_ERROR, "not support write info to file\n");
+        break;
+    default:
+        rv = -1;
+        DBG_DEBUG(DBG_ERROR, "info src[%d] error\n", src);
+        break;
+    }
+
+    return rv;
+}
+
+static int dfd_get_info_value(info_ctrl_t *info_ctrl, int *ret, info_num_buf_to_value_f pfun)
+{
+    int i, rv;
+    int read_bytes, readed_bytes, int_tmp;
+    uint8_t byte_tmp, val[INFO_INT_MAX_LEN + 1] = {0};
+
+    if (info_ctrl->mode == INFO_CTRL_MODE_CONS) {
+        *ret = info_ctrl->int_cons;
+        return DFD_RV_OK;
+    }
+    if (info_ctrl->mode == INFO_CTRL_MODE_TLV) {
+        return INFO_CTRL_MODE_TLV;
+    }
+
+    if (IS_INFO_FRMT_BIT(info_ctrl->frmt)) {
+        if (!INFO_BIT_OFFSET_VALID(info_ctrl->bit_offset)) {
+            DBG_DEBUG(DBG_ERROR, "info ctrl bit_offsest[%d] invalid\n",
+                info_ctrl->bit_offset);
+            return -DFD_RV_TYPE_ERR;
+        }
+        read_bytes = 1;
+    } else if (IS_INFO_FRMT_BYTE(info_ctrl->frmt) || IS_INFO_FRMT_NUM_STR(info_ctrl->frmt)
+            || IS_INFO_FRMT_NUM_BUF(info_ctrl->frmt)) {
+        if (!INFO_INT_LEN_VALAID(info_ctrl->len)) {
+            DBG_DEBUG(DBG_ERROR, "info ctrl len[%d] invalid\n", info_ctrl->len);
+            return -DFD_RV_TYPE_ERR;
+        }
+        read_bytes = info_ctrl->len;
+    } else {
+        DBG_DEBUG(DBG_ERROR, "info ctrl info format[%d] error\n", info_ctrl->frmt);
+        return -DFD_RV_TYPE_ERR;
+    }
+
+    readed_bytes = dfd_read_info(info_ctrl->src, info_ctrl->fpath, info_ctrl->addr, read_bytes, &(val[0]));
+    if (readed_bytes <= 0) {
+        DBG_DEBUG(DBG_ERROR, "read int info[src=%s frmt=%s fpath=%s addr=0x%x read_bytes=%d] fail, rv=%d\n",
+            g_info_src_str[info_ctrl->src], g_info_frmt_str[info_ctrl->frmt], info_ctrl->fpath,
+            info_ctrl->addr, read_bytes, readed_bytes);
+        return -DFD_RV_DEV_FAIL;
+    }
+
+    if (IS_INFO_FRMT_BIT(info_ctrl->frmt)) {
+        if (info_ctrl->pola == INFO_POLA_NEGA) {
+            val[0] = ~val[0];
+        }
+        byte_tmp = (val[0] >> info_ctrl->bit_offset) & (~(0xff << info_ctrl->len));
+        if (pfun) {
+            rv = pfun(&byte_tmp, sizeof(byte_tmp), &int_tmp);
+            if (rv < 0) {
+                DBG_DEBUG(DBG_ERROR, "info ctrl bit process fail, rv=%d\n", rv);
+                return rv;
+            }
+        } else {
+            int_tmp = (int)byte_tmp;
+        }
+    } else if (IS_INFO_FRMT_BYTE(info_ctrl->frmt)) {
+        int_tmp = 0;
+        for (i = 0; i < info_ctrl->len; i++) {
+            if (info_ctrl->pola == INFO_POLA_NEGA) {
+                int_tmp |=  val[info_ctrl->len - i - 1];
+            } else {
+                int_tmp |=  val[i];
+            }
+            if (i != (info_ctrl->len - 1)) {
+                int_tmp <<= 8;
+            }
+        }
+    } else if (IS_INFO_FRMT_NUM_STR(info_ctrl->frmt)) {
+        val[readed_bytes] = '\0';
+        int_tmp = simple_strtol((char *)(&(val[0])), NULL, 10);
+    } else {
+        if (pfun == NULL) {
+            DBG_DEBUG(DBG_ERROR, "info ctrl number buf process function is null\n");
+            return -DFD_RV_INDEX_INVALID;
+        }
+        rv = pfun(val, readed_bytes, &int_tmp);
+        if (rv < 0) {
+            DBG_DEBUG(DBG_ERROR, "info ctrl number buf process fail, rv=%d\n", rv);
+            return rv;
+        }
+    }
+
+    *ret = int_tmp;
+    DBG_DEBUG(DBG_VERBOSE, "read int info[src=%s frmt=%s pola=%s fpath=%s addr=0x%x len=%d bit_offset=%d] success, ret=%d\n",
+            g_info_src_str[info_ctrl->src], g_info_frmt_str[info_ctrl->frmt], g_info_pola_str[info_ctrl->pola],
+            info_ctrl->fpath, info_ctrl->addr, info_ctrl->len, info_ctrl->bit_offset, *ret);
+    return DFD_RV_OK;
+}
+
+int dfd_info_get_int(int key, int *ret, info_num_buf_to_value_f pfun)
+{
+    int rv;
+    info_ctrl_t *info_ctrl;
+
+    if (!DFD_CFG_ITEM_IS_INFO_CTRL(DFD_CFG_ITEM_ID(key)) || (ret == NULL)) {
+        DBG_DEBUG(DBG_ERROR, "input arguments error, key=0x%08x\n", key);
+        return -DFD_RV_INDEX_INVALID;
+    }
+
+    info_ctrl = dfd_ko_cfg_get_item(key);
+    if (info_ctrl == NULL) {
+        DBG_DEBUG(DBG_WARN, "get info ctrl fail, key=0x%08x\n", key);
+        return -DFD_RV_DEV_NOTSUPPORT;
+    }
+
+    DBG_DEBUG(DBG_VERBOSE, "get info ctrl value, key=0x%08x\n", key);
+    rv = dfd_get_info_value(info_ctrl, ret, pfun);
+    return rv;
+}
+
+int dfd_info_get_buf(int key, uint8_t *buf, int buf_len, info_buf_to_buf_f pfun)
+{
+    int rv;
+    int read_bytes, buf_real_len;
+    uint8_t buf_tmp[INFO_BUF_MAX_LEN];
+    info_ctrl_t *info_ctrl;
+
+    if (!DFD_CFG_ITEM_IS_INFO_CTRL(DFD_CFG_ITEM_ID(key)) || (buf == NULL)) {
+        DBG_DEBUG(DBG_ERROR, "input arguments error, key=0x%08x\n", key);
+        return -DFD_RV_INDEX_INVALID;
+    }
+
+    info_ctrl = dfd_ko_cfg_get_item(key);
+    if (info_ctrl == NULL) {
+        DBG_DEBUG(DBG_WARN, "get info ctrl fail, key=0x%08x\n", key);
+        return -DFD_RV_DEV_NOTSUPPORT;
+    }
+
+    if (info_ctrl->mode != INFO_CTRL_MODE_CFG) {
+        DBG_DEBUG(DBG_ERROR, "info ctrl[key=0x%08x] mode[%d] invalid\n", key, info_ctrl->mode);
+        return -DFD_RV_TYPE_ERR;
+    }
+
+    if (!IS_INFO_FRMT_BUF(info_ctrl->frmt) || !INFO_BUF_LEN_VALAID(info_ctrl->len)
+            || (buf_len <= info_ctrl->len)) {
+        DBG_DEBUG(DBG_ERROR, "info ctrl[key=0x%08x] format=%d or len=%d invlaid, buf_len=%d\n",
+            key, info_ctrl->frmt, info_ctrl->len, buf_len);
+        return -DFD_RV_TYPE_ERR;
+    }
+
+    read_bytes = dfd_read_info(info_ctrl->src, info_ctrl->fpath, info_ctrl->addr, info_ctrl->len, buf_tmp);
+    if (read_bytes <= 0) {
+        DBG_DEBUG(DBG_ERROR, "read buf info[key=0x%08x src=%s frmt=%s fpath=%s addr=0x%x len=%d] fail, rv=%d\n",
+            key, g_info_src_str[info_ctrl->src], g_info_frmt_str[info_ctrl->frmt], info_ctrl->fpath,
+            info_ctrl->addr, info_ctrl->len, read_bytes);
+        return -DFD_RV_DEV_FAIL;
+    }
+
+    if (pfun) {
+        buf_real_len = buf_len;
+        rv = pfun(buf_tmp, read_bytes, buf, &buf_real_len);
+        if (rv < 0) {
+            DBG_DEBUG(DBG_ERROR, "info ctrl[key=0x%08x] buf process fail, rv=%d\n", key, rv);
+            return -DFD_RV_DEV_NOTSUPPORT;
+        }
+    } else {
+        buf_real_len = read_bytes;
+        memcpy(buf, buf_tmp, read_bytes);
+    }
+
+    return buf_real_len;
+}
+
+static int dfd_2key_info_get_buf(info_ctrl_t *info_ctrl, uint8_t *buf, int buf_len, info_hwmon_buf_f pfun)
+{
+    int rv;
+    int read_bytes, buf_real_len;
+    uint8_t buf_tmp[INFO_BUF_MAX_LEN];
+    char temp_fpath[INFO_FPATH_MAX_LEN];
+
+    if (!IS_INFO_FRMT_BUF(info_ctrl->frmt) || !INFO_BUF_LEN_VALAID(info_ctrl->len)
+            || (buf_len <= info_ctrl->len)) {
+        DBG_DEBUG(DBG_ERROR, "key_path info ctrl format=%d or len=%d invlaid, buf_len=%d\n",
+            info_ctrl->frmt, info_ctrl->len, buf_len);
+        return -DFD_RV_TYPE_ERR;
+    }
+
+    mem_clear(buf_tmp, sizeof(buf_tmp));
+    rv = kfile_iterate_dir(info_ctrl->fpath, DFD_HWMON_NAME, buf_tmp, INFO_BUF_MAX_LEN);
+    if (rv < 0) {
+        DBG_DEBUG(DBG_ERROR, "dir patch:%s ,can find name %s dir \n",
+            info_ctrl->fpath, DFD_HWMON_NAME);
+        return -DFD_RV_NO_NODE;
+    }
+    mem_clear(temp_fpath, sizeof(temp_fpath));
+    snprintf(temp_fpath, sizeof(temp_fpath), "%s%s/%s",
+        info_ctrl->fpath, buf_tmp, info_ctrl->str_cons);
+    DBG_DEBUG(DBG_VERBOSE, "match ok path = %s \n", temp_fpath);
+
+    mem_clear(buf_tmp, sizeof(buf_tmp));
+
+    read_bytes = dfd_read_info(info_ctrl->src, temp_fpath, info_ctrl->addr, info_ctrl->len, buf_tmp);
+    if (read_bytes <= 0) {
+        DBG_DEBUG(DBG_ERROR, "read buf info[src=%s frmt=%s fpath=%s addr=0x%x len=%d] fail, rv=%d\n",
+            g_info_src_str[info_ctrl->src], g_info_src_str[info_ctrl->frmt], temp_fpath,
+            info_ctrl->addr, info_ctrl->len, read_bytes);
+        return -DFD_RV_DEV_FAIL;
+    }
+
+    if (pfun) {
+        buf_real_len = buf_len;
+        rv = pfun(buf_tmp, read_bytes, buf, &buf_real_len, info_ctrl);
+        if (rv < 0) {
+            DBG_DEBUG(DBG_ERROR, "info ctrl buf process fail, rv=%d\n", rv);
+            return -DFD_RV_DEV_NOTSUPPORT;
+        }
+    } else {
+        buf_real_len = read_bytes;
+        memcpy(buf, buf_tmp, buf_real_len);
+    }
+    return buf_real_len;
+}
+
+int dfd_info_set_int(int key, int val)
+{
+    int rv;
+    int write_bytes;
+    uint8_t byte_tmp, bit_mask;
+    info_ctrl_t *info_ctrl;
+
+    if (!DFD_CFG_ITEM_IS_INFO_CTRL(DFD_CFG_ITEM_ID(key))) {
+        DBG_DEBUG(DBG_ERROR, "input arguments error, key=0x%08x\n", key);
+        return -DFD_RV_INDEX_INVALID;
+    }
+
+    info_ctrl = dfd_ko_cfg_get_item(key);
+    if (info_ctrl == NULL) {
+        DBG_DEBUG(DBG_WARN, "get info ctrl fail, key=0x%08x\n", key);
+        return -DFD_RV_DEV_NOTSUPPORT;
+    }
+
+    if (info_ctrl->mode != INFO_CTRL_MODE_CFG) {
+        DBG_DEBUG(DBG_ERROR, "info ctrl[key=0x%08x] mode[%d] warnning\n", key, info_ctrl->mode);
+        return -DFD_RV_TYPE_ERR;
+    }
+
+    if (IS_INFO_FRMT_BIT(info_ctrl->frmt)) {
+
+        if (!INFO_BIT_OFFSET_VALID(info_ctrl->bit_offset)) {
+            DBG_DEBUG(DBG_ERROR, "info ctrl[key=0x%08x] bit_offsest[%d] invalid\n",
+                key, info_ctrl->bit_offset);
+            return -DFD_RV_TYPE_ERR;
+        }
+
+        write_bytes = 1;
+
+        byte_tmp = (uint8_t)(val & 0xff);
+        byte_tmp <<= info_ctrl->bit_offset;
+        if (info_ctrl->pola == INFO_POLA_NEGA) {
+            byte_tmp = ~byte_tmp;
+        }
+
+        bit_mask = (~(0xff << info_ctrl->len)) << info_ctrl->bit_offset;
+    } else if (IS_INFO_FRMT_BYTE(info_ctrl->frmt)) {
+
+        if (!INFO_INT_LEN_VALAID(info_ctrl->len)) {
+            DBG_DEBUG(DBG_ERROR, "info ctrl[key=0x%08x] len[%d] invalid\n", key, info_ctrl->len);
+            return -DFD_RV_TYPE_ERR;
+        }
+
+        write_bytes = 1;
+
+        byte_tmp = (uint8_t)(val & 0xff);
+
+        bit_mask = 0xff;
+    } else if (IS_INFO_FRMT_NUM_STR(info_ctrl->frmt)) {
+
+        DBG_DEBUG(DBG_ERROR, "not support str int set\n");
+        return -1;
+    } else if (IS_INFO_FRMT_NUM_BUF(info_ctrl->frmt)) {
+
+        if (!INFO_INT_LEN_VALAID(info_ctrl->len)) {
+            DBG_DEBUG(DBG_ERROR, "info ctrl[key=0x%08x] len[%d] invalid\n", key, info_ctrl->len);
+            return -DFD_RV_TYPE_ERR;
+        }
+
+        write_bytes = 1;
+
+        byte_tmp = (uint8_t)(val & 0xff);
+
+        bit_mask = 0xff;
+    } else {
+        DBG_DEBUG(DBG_ERROR, "info ctrl[key=0x%08x] format[%d] error\n", key, info_ctrl->frmt);
+        return -DFD_RV_TYPE_ERR;
+    }
+
+    rv = dfd_write_info(info_ctrl->src, info_ctrl->fpath, info_ctrl->addr, write_bytes,
+            &byte_tmp, bit_mask);
+    if (rv < 0) {
+        DBG_DEBUG(DBG_ERROR, "write int info[src=%s frmt=%s fpath=%s addr=0x%x len=%d val=%d] fail, rv=%d\n",
+            g_info_src_str[info_ctrl->src], g_info_frmt_str[info_ctrl->frmt], info_ctrl->fpath,
+            info_ctrl->addr, info_ctrl->len, val, rv);
+        return -DFD_RV_DEV_FAIL;
+    }
+
+    DBG_DEBUG(DBG_VERBOSE, "write int info[src=%s frmt=%s pola=%s fpath=%s addr=0x%x len=%d bit_offset=%d val=%d] success\n",
+            g_info_src_str[info_ctrl->src], g_info_frmt_str[info_ctrl->frmt], g_info_pola_str[info_ctrl->pola],
+            info_ctrl->fpath, info_ctrl->addr, info_ctrl->len, info_ctrl->bit_offset, val);
+    return DFD_RV_OK;
+}
+
+static int dfd_info_reg2data_linear(int key, int data, int *temp_value)
+{
+    s16 exponent;
+    s32 mantissa;
+    int val;
+    info_ctrl_t *info_ctrl;
+
+    info_ctrl = dfd_ko_cfg_get_item(key);
+    if (info_ctrl == NULL) {
+        DBG_DEBUG(DBG_WARN, "get info ctrl fail, key=%d\n", key);
+        return -DFD_RV_DEV_NOTSUPPORT;
+    }
+
+    switch (info_ctrl->int_extra1) {
+    case LINEAR11:
+        exponent = ((s16)data) >> 11;
+        mantissa = ((s16)((data & 0x7ff) << 5)) >> 5;
+        val = mantissa;
+        val = val * 1000L;
+        break;
+    case LINEAR16:
+        break;
+    default:
+        break;
+    }
+
+    if (DFD_CFG_ITEM_ID(key) == DFD_CFG_ITEM_HWMON_POWER) {
+        val = val * 1000L;
+    }
+
+    if (exponent >= 0) {
+        val <<= exponent;
+    } else {
+        val >>= -exponent;
+    }
+    *temp_value = val;
+
+    return DFD_RV_OK;
+}
+
+static int dfd_info_reg2data_tmp464(int data, int *temp_value)
+{
+    s16 tmp_val;
+    int val;
+
+    DBG_DEBUG(DBG_VERBOSE, "reg2data_tmp464, data=%d\n", data);
+
+    if (data >= 0) {
+        val = data*625/80;
+    } else {
+        tmp_val = ~(data & 0x7ff) + 1;
+        val = tmp_val*625/80;
+    }
+    *temp_value = val;
+
+    return DFD_RV_OK;
+}
+
+static int dfd_info_reg2data_mac_th5(int data, int *temp_value)
+{
+    int tmp_val;
+    int val;
+
+    DBG_DEBUG(DBG_VERBOSE, "reg2data_mac_th5, data=%d\n", data);
+
+    tmp_val = data >> 4;
+    val = 476359 - (((tmp_val - 2) * 317704) / 2000);
+
+    DBG_DEBUG(DBG_VERBOSE, "reg2data_mac_th5, val=%d\n", val);
+    *temp_value = val;
+
+    return DFD_RV_OK;
+}
+
+static int dfd_info_reg2data_mac_td3(int data, int *temp_value)
+{
+    int val;
+
+    if (data == 0) {
+        DBG_DEBUG(DBG_ERROR,"invalid cpld data=%d\n", data);
+        *temp_value = -READ_TEMP_FAIL;
+        return DFD_RV_OK;
+    }
+
+    DBG_DEBUG(DBG_VERBOSE, "reg2data_mac_td3, data=%d\n", data);
+    val = 434100 - (12500000 / (data * 100 - 1) *535);
+    if ((val / 1000 < -70) || (val / 1000 > 200)) {
+        DBG_DEBUG(DBG_ERROR,"out of range cpld val=%d\n", val);
+        *temp_value = -READ_TEMP_FAIL;
+        return DFD_RV_OK;
+    }
+    DBG_DEBUG(DBG_VERBOSE, "reg2data_mac_td3, val=%d\n", val);
+    *temp_value = val;
+
+    return DFD_RV_OK;
+}
+
+static int dfd_info_get_cpld_voltage(int key, uint32_t *value)
+{
+    int rv;
+    uint32_t vol_ref_tmp, vol_ref;
+    uint32_t vol_curr_tmp, vol_curr;
+    info_ctrl_t *info_ctrl;
+    info_ctrl_t info_ctrl_tmp;
+    uint32_t vol_coefficient;
+
+    info_ctrl = dfd_ko_cfg_get_item(key);
+    if (info_ctrl == NULL) {
+        DBG_DEBUG(DBG_WARN, "get info ctrl fail, key=0x%08x\n", key);
+        return -DFD_RV_DEV_NOTSUPPORT;
+    }
+
+    vol_coefficient = (uint32_t)info_ctrl->int_extra2;
+
+    rv = dfd_get_info_value(info_ctrl, &vol_curr_tmp, NULL);
+    if (rv < 0) {
+        DBG_DEBUG(DBG_ERROR, "get cpld current voltage error, addr:0x%x, rv = %d\n", info_ctrl->addr, rv);
+        return rv;
+    }
+    if (info_ctrl->int_extra3 == CPLD_VOLATGE_VALUE_MODE2) {
+        vol_curr_tmp = DFD_GET_CPLD_VOLATGE_CODE_VALUE2(vol_curr_tmp);
+        vol_curr = DFD_GET_CPLD_VOLATGE_REAL_VALUE2(vol_curr_tmp, vol_coefficient);
+        DBG_DEBUG(DBG_VERBOSE, "vol_curr_tmp = 0x%x, vol_curr = 0x%x, is same.\n", vol_curr_tmp, vol_curr);
+    } else {
+        vol_curr_tmp = DFD_GET_CPLD_VOLATGE_CODE_VALUE(vol_curr_tmp);
+        if (info_ctrl->addr == info_ctrl->int_extra1) {
+            vol_curr = DFD_GET_CPLD_VOLATGE_REAL_VALUE(vol_curr_tmp, vol_coefficient);
+            DBG_DEBUG(DBG_VERBOSE, "current voltage is reference voltage, vol_curr_tmp: 0x%x, coefficient: %u, vol_curr: %u\n",
+             vol_curr_tmp, vol_coefficient, vol_curr);
+        } else {
+            memcpy(&info_ctrl_tmp, info_ctrl, sizeof(info_ctrl_t));
+            info_ctrl_tmp.addr = info_ctrl->int_extra1;
+            rv = dfd_get_info_value(&info_ctrl_tmp, &vol_ref_tmp, NULL);
+            if (rv < 0) {
+                DBG_DEBUG(DBG_ERROR, "get cpld reference voltage error, addr: 0x%x, rv: %d\n", info_ctrl_tmp.addr, rv);
+                return rv;
+            }
+            vol_ref = DFD_GET_CPLD_VOLATGE_CODE_VALUE(vol_ref_tmp);
+            DBG_DEBUG(DBG_VERBOSE, "vol_ref_tmp: 0x%x, vol_ref: 0x%x\n", vol_ref_tmp, vol_ref);
+            vol_curr = (vol_curr_tmp * vol_coefficient) / vol_ref;
+            DBG_DEBUG(DBG_VERBOSE, "vol_curr_tmp: 0x%x, vol_ref: 0x%x, coefficient: %u, vol_curr: %u\n",
+            vol_curr_tmp, vol_ref, vol_coefficient, vol_curr);
+         }
+    }
+    *value = vol_curr;
+    return DFD_RV_OK;
+}
+
+static int dfd_info_get_cpld_temperature(int key, int *value)
+{
+    int rv;
+    int temp_reg;
+    int temp_value;
+    info_ctrl_t *info_ctrl;
+
+    info_ctrl = dfd_ko_cfg_get_item(key);
+    if (info_ctrl == NULL) {
+        DBG_DEBUG(DBG_WARN, "get info ctrl fail, key=0x%08x\n", key);
+        return -DFD_RV_DEV_NOTSUPPORT;
+    }
+
+    rv = dfd_info_get_int(key, &temp_reg, NULL);
+    if(rv < 0) {
+        DBG_DEBUG(DBG_ERROR, "get cpld current temperature error, addr:0x%x, rv =%d\n", info_ctrl->addr, rv);
+        return rv;
+    }
+    DBG_DEBUG(DBG_VERBOSE, "get cpld temp:0x%08x, extra1 0x%x\n", temp_reg, info_ctrl->int_extra1);
+
+    switch (info_ctrl->int_extra1) {
+    case LINEAR11:
+        rv = dfd_info_reg2data_linear(key, temp_reg, &temp_value);
+        break;
+    case TMP464:
+        rv = dfd_info_reg2data_tmp464(temp_reg, &temp_value);
+        break;
+    case MAC_TH5:
+        rv = dfd_info_reg2data_mac_th5(temp_reg, &temp_value);
+        break;
+    case MAC_TD3:
+        rv = dfd_info_reg2data_mac_td3(temp_reg, &temp_value);
+        break;
+    default:
+        temp_value = temp_reg;
+        rv = DFD_RV_OK;
+        break;
+    }
+
+    DBG_DEBUG(DBG_VERBOSE, "calc temp:%d \n", temp_value);
+    if ((temp_value < -40000) || (temp_value > 120000)) {
+        temp_value = -MAC_TEMP_INVALID;
+    }
+    *value = temp_value;
+
+    return rv;
+}
+
+static int dfd_info_get_sensor_value(int key, uint8_t *buf, int buf_len, info_hwmon_buf_f pfun)
+{
+    int rv, buf_real_len;
+    uint32_t value;
+    uint8_t buf_tmp[INFO_BUF_MAX_LEN];
+    info_ctrl_t *info_ctrl;
+
+    info_ctrl = dfd_ko_cfg_get_item(key);
+    if (info_ctrl == NULL) {
+        DBG_DEBUG(DBG_ERROR, "get info ctrl fail, key=0x%08x\n", key);
+        return -DFD_RV_DEV_NOTSUPPORT;
+    }
+
+    if ( DFD_CFG_ITEM_ID(key) == DFD_CFG_ITEM_HWMON_IN && info_ctrl->src == INFO_SRC_CPLD) {
+        rv = dfd_info_get_cpld_voltage(key, &value);
+        if(rv < 0) {
+            DBG_DEBUG(DBG_ERROR, "get cpld voltage failed.key=0x%08x, rv:%d\n", key, rv);
+            return -DFD_RV_DEV_NOTSUPPORT;
+        }
+        DBG_DEBUG(DBG_VERBOSE, "get cpld voltage ok, value:%u\n", value);
+        mem_clear(buf_tmp, sizeof(buf_tmp));
+        snprintf(buf_tmp, sizeof(buf_tmp), "%u\n", value);
+        buf_real_len = strlen(buf_tmp);
+        if(buf_len <= buf_real_len) {
+            DBG_DEBUG(DBG_ERROR, "length not enough.buf_len:%d,need length:%d\n", buf_len, buf_real_len);
+            return -DFD_RV_DEV_FAIL;
+        }
+        if (pfun) {
+            buf_real_len = buf_len;
+            rv = pfun(buf_tmp, strlen(buf_tmp), buf, &buf_real_len, info_ctrl);
+            if (rv < 0) {
+                DBG_DEBUG(DBG_ERROR, "deal date error.org value:%s, buf_len:%d, rv=%d\n",
+                    buf_tmp, buf_len, rv);
+                return -DFD_RV_DEV_NOTSUPPORT;
+            }
+        } else {
+            memcpy(buf, buf_tmp, buf_real_len);
+        }
+        return buf_real_len;
+    } else if ( DFD_CFG_ITEM_ID(key) == DFD_CFG_ITEM_HWMON_TEMP && info_ctrl->src == INFO_SRC_CPLD ) {
+        rv = dfd_info_get_cpld_temperature(key, &value);
+        if(rv < 0) {
+            DBG_DEBUG(DBG_ERROR, "get cpld temperature failed.key=0x%08x, rv:%d\n", key, rv);
+            return -DFD_RV_DEV_NOTSUPPORT;
+        }
+        DBG_DEBUG(DBG_VERBOSE, "get cpld temperature ok, value:%d buf_len %d\n", value, buf_len);
+        mem_clear(buf_tmp, sizeof(buf_tmp));
+        snprintf(buf_tmp, sizeof(buf_tmp), "%d\n", value);
+        buf_real_len = strlen(buf_tmp);
+        if(buf_len <= buf_real_len) {
+            DBG_DEBUG(DBG_ERROR, "length not enough.buf_len:%d,need length:%d\n", buf_len, buf_real_len);
+            return -DFD_RV_DEV_FAIL;
+        }
+        DBG_DEBUG(DBG_VERBOSE, "buf_real_len %d\n", buf_real_len);
+        memcpy(buf, buf_tmp, buf_real_len);
+        return buf_real_len;
+    }
+
+    DBG_DEBUG(DBG_ERROR, "not support mode. key:0x%08x\n", key);
+    return -DFD_RV_MODE_NOTSUPPORT;
+}
+
+int dfd_info_get_sensor(uint32_t key, char *buf, int buf_len, info_hwmon_buf_f pfun)
+{
+    info_ctrl_t *key_info_ctrl;
+    int rv;
+
+    if (!DFD_CFG_ITEM_IS_INFO_CTRL(DFD_CFG_ITEM_ID(key)) ||
+        (buf == NULL) || buf_len <= 0) {
+        DBG_DEBUG(DBG_ERROR, "input arguments error, key_path=0x%08x, buf_len:%d.\n",
+            key, buf_len);
+        return -DFD_RV_INVALID_VALUE;
+    }
+
+    key_info_ctrl = dfd_ko_cfg_get_item(key);
+    if (key_info_ctrl == NULL) {
+        DBG_DEBUG(DBG_ERROR, "key_path info error, key=0x%08x\n", key);
+        return -DFD_RV_DEV_NOTSUPPORT;
+    }
+    mem_clear(buf, buf_len);
+
+    if (key_info_ctrl->mode == INFO_CTRL_MODE_SRT_CONS) {
+        snprintf(buf, buf_len, "%s\n", key_info_ctrl->str_cons);
+        DBG_DEBUG(DBG_VERBOSE, "get sensor value through string config, key=0x%08x, value:%s\n", key, buf);
+        return strlen(buf);
+    }
+
+    if (key_info_ctrl->mode == INFO_CTRL_MODE_CFG && key_info_ctrl->src == INFO_SRC_FILE) {
+        DBG_DEBUG(DBG_VERBOSE, "get sensor value through hwmon, key:0x%08x\n", key);
+        rv = dfd_2key_info_get_buf(key_info_ctrl, buf, buf_len, pfun);
+        if (rv < 0) {
+            DBG_DEBUG(DBG_VERBOSE, "get sensor value through hwmon failed, key:0x%08x, rv:%d\n", key, rv);
+        }
+        return rv;
+    }
+    rv = dfd_info_get_sensor_value(key, buf, buf_len, pfun);
+    if( rv < 0) {
+        DBG_DEBUG(DBG_ERROR, "get sensor value failed, key=0x%08x, rv:%d.\n", key, rv);
+    }
+    return rv;
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/cfg/dfd_cfg_listnode.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/cfg/dfd_cfg_listnode.c
new file mode 100644
index 000000000..d6fd7e104
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/cfg/dfd_cfg_listnode.c
@@ -0,0 +1,82 @@
+#include <linux/list.h>
+#include <linux/slab.h>
+
+#include "../include/dfd_cfg_listnode.h"
+#include "../../dev_sysfs/include/sysfs_common.h"
+
+void *lnode_find_node(lnode_root_t *root, int key)
+{
+    lnode_node_t *lnode;
+
+    if (root == NULL){
+        return NULL;
+    }
+
+    list_for_each_entry(lnode, &(root->root), lst) {
+        if (lnode->key == key) {
+            return lnode->data;
+        }
+    }
+
+    return NULL;
+}
+
+int lnode_insert_node(lnode_root_t *root, int key, void *data)
+{
+    lnode_node_t *lnode;
+    void *data_tmp;
+
+    if ((root == NULL) || (data == NULL)) {
+        return LNODE_RV_INPUT_ERR;
+    }
+
+    data_tmp = lnode_find_node(root, key);
+    if (data_tmp != NULL) {
+        return LNODE_RV_NODE_EXIST;
+    }
+
+    lnode = kmalloc(sizeof(lnode_node_t), GFP_KERNEL);
+    if (lnode == NULL) {
+        return LNODE_RV_NOMEM;
+    }
+
+    lnode->key = key;
+    lnode->data = data;
+    list_add_tail(&(lnode->lst), &(root->root));
+
+    return LNODE_RV_OK;
+}
+
+int lnode_init_root(lnode_root_t *root)
+{
+    if (root == NULL) {
+        return LNODE_RV_INPUT_ERR;
+    }
+
+    INIT_LIST_HEAD(&(root->root));
+
+    return LNODE_RV_OK;
+}
+
+void lnode_free_list(lnode_root_t *root)
+{
+    lnode_node_t *lnode, *lnode_next;
+
+    if (root == NULL){
+        return ;
+    }
+
+    list_for_each_entry_safe(lnode, lnode_next, &(root->root), lst) {
+        if ( lnode->data ) {
+            kfree(lnode->data);
+            lnode->data = NULL;
+            lnode->key = 0;
+        }
+        list_del(&lnode->lst);
+        kfree(lnode);
+        lnode = NULL;
+    }
+
+    return ;
+
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/dfd_fan_driver.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/dfd_fan_driver.c
new file mode 100644
index 000000000..d8965d75c
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/dfd_fan_driver.c
@@ -0,0 +1,201 @@
+#include <linux/module.h>
+#include <linux/slab.h>
+
+#include "./include/dfd_module.h"
+#include "./include/dfd_cfg.h"
+#include "./include/dfd_cfg_adapter.h"
+#include "./include/dfd_cfg_info.h"
+#include "../dev_sysfs/include/sysfs_common.h"
+
+#define FAN_SIZE                          (256)
+
+int g_dfd_fan_dbg_level = 0;
+module_param(g_dfd_fan_dbg_level, int, S_IRUGO | S_IWUSR);
+
+typedef enum fan_speed_format_mem_s {
+    LINEAR120 = 1,
+} fan_speed_format_mem_t;
+
+int dfd_get_fan_roll_status(unsigned int fan_index, unsigned int motor_index)
+{
+    int key, ret;
+    int status;
+
+    key = DFD_CFG_KEY(DFD_CFG_ITEM_FAN_ROLL_STATUS, fan_index, motor_index);
+    ret = dfd_info_get_int(key, &status, NULL);
+    if (ret < 0) {
+        DFD_FAN_DEBUG(DBG_ERROR, "get fan roll status error, fan:%d,motor:%d\n",
+            fan_index, motor_index);
+        return ret;
+    }
+
+    DFD_FAN_DEBUG(DBG_VERBOSE, "fan%u motor%u get fan roll status success, status:%d.\n",
+        fan_index, motor_index, status);
+    return status;
+}
+
+int dfd_get_fan_present_status(unsigned int fan_index)
+{
+    int key, ret;
+    int status;
+
+    key = DFD_CFG_KEY(DFD_CFG_ITEM_DEV_PRESENT_STATUS, WB_MAIN_DEV_FAN, fan_index);
+    ret = dfd_info_get_int(key, &status, NULL);
+    if (ret < 0) {
+        DFD_FAN_DEBUG(DBG_ERROR, "fan%u get present status error, key:0x%x\n", fan_index, key);
+        return ret;
+    }
+
+    DFD_FAN_DEBUG(DBG_VERBOSE, "fan%u get present status success, status:%d.\n", fan_index, status);
+    return status;
+}
+
+static int dfd_get_fan_speed_linear120(int origin_data, int *speed)
+{
+    *speed = origin_data * 120;
+    DFD_FAN_DEBUG(DBG_VERBOSE, "get fan speed by linear120 origin_data: %d, speed: %d\n",
+        origin_data, *speed);
+    return 0;
+}
+
+static int dfd_get_fan_speed_default(int origin_data, int *speed)
+{
+    if (origin_data == 0 || origin_data == 0xffff) {
+        *speed = 0;
+    } else {
+        *speed = 15000000 / origin_data;
+    }
+    DFD_FAN_DEBUG(DBG_VERBOSE, "get fan speed by default origin_data: %d, speed: %d\n",
+        origin_data, *speed);
+    return 0;
+}
+
+ssize_t dfd_get_fan_speed(unsigned int fan_index, unsigned int motor_index,unsigned int *speed)
+{
+    int key, ret, speed_tmp;
+    info_ctrl_t *info_ctrl;
+
+    if (speed == NULL) {
+        DFD_FAN_DEBUG(DBG_ERROR, "param error. fan index:%d, motor index:%d.\n",
+            fan_index, motor_index);
+        return -DFD_RV_INVALID_VALUE;
+    }
+
+    key = DFD_CFG_KEY(DFD_CFG_ITEM_FAN_SPEED, fan_index, motor_index);
+    ret = dfd_info_get_int(key, &speed_tmp, NULL);
+    if (ret < 0) {
+        DFD_FAN_DEBUG(DBG_ERROR, "get fan speed error, key:0x%x,ret:%d\n",key, ret);
+        return ret;
+    }
+    DFD_FAN_DEBUG(DBG_VERBOSE, "get fan origin data: 0x%x\n", speed_tmp);
+
+    info_ctrl = dfd_ko_cfg_get_item(key);
+    switch (info_ctrl->int_extra1) {
+    case LINEAR120:
+        ret = dfd_get_fan_speed_linear120(speed_tmp, speed);
+        break;
+    default:
+        ret = dfd_get_fan_speed_default(speed_tmp, speed);
+        break;
+    }
+
+    return ret;
+}
+
+int dfd_set_fan_speed_level(unsigned int fan_index, unsigned int motor_index, int level)
+{
+    int key, ret;
+
+    if (level < 0 || level > 0xff) {
+        DFD_FAN_DEBUG(DBG_ERROR, "fan:%u, motor:%u, can not set fan speed level: %d.\n",
+            fan_index, motor_index, level);
+        return -DFD_RV_INVALID_VALUE;
+    }
+
+    key = DFD_CFG_KEY(DFD_CFG_ITEM_FAN_RATIO, fan_index, motor_index);
+    ret = dfd_info_set_int(key, level);
+    if (ret < 0) {
+        DFD_FAN_DEBUG(DBG_ERROR, "fan:%u, motor:%u, set fan level 0x%02x error, key:0x%x,ret:%d\n",
+            fan_index, motor_index, level, key, ret);
+        return ret;
+    }
+
+    DFD_FAN_DEBUG(DBG_VERBOSE, "fan:%u, motor:%u, set fan speed level 0x%02x success.\n",
+        fan_index, motor_index, level);
+    return DFD_RV_OK;
+}
+
+int dfd_set_fan_pwm(unsigned int fan_index, unsigned int motor_index, int pwm)
+{
+    int ret, data;
+
+    if (pwm < 0 || pwm > 100) {
+        DFD_FAN_DEBUG(DBG_ERROR, "fan:%u, motor:%u, can't set pwm: %d.\n",
+            fan_index, motor_index, pwm);
+        return -DFD_RV_INVALID_VALUE;
+    }
+
+    data = pwm * 255 / 100;
+    ret = dfd_set_fan_speed_level(fan_index, motor_index, data);
+    if (ret < 0) {
+        DFD_FAN_DEBUG(DBG_ERROR, "fan:%u, motor:%u, set fan ratio:%d error, ret:%d\n",
+            fan_index, motor_index, data, ret);
+        return ret;
+    }
+
+    DFD_FAN_DEBUG(DBG_VERBOSE, "fan:%u, motor:%u, set fan ratio %d success.\n",
+        fan_index, motor_index, data);
+    return DFD_RV_OK;
+}
+
+int dfd_get_fan_speed_level(unsigned int fan_index, unsigned int motor_index, int *level)
+{
+    int key, ret, speed_level;
+
+    if (level == NULL) {
+        DFD_FAN_DEBUG(DBG_ERROR, "param error. fan index:%d, motor index:%d.\n",
+            fan_index, motor_index);
+        return -DFD_RV_INVALID_VALUE;
+    }
+
+    key = DFD_CFG_KEY(DFD_CFG_ITEM_FAN_RATIO, fan_index, motor_index);
+    ret = dfd_info_get_int(key, &speed_level, NULL);
+    if (ret < 0) {
+        DFD_FAN_DEBUG(DBG_ERROR, "fan:%u, motor:%u, get fan speed level error, key:0x%x,ret:%d\n",
+            fan_index, motor_index, key, ret);
+        return ret;
+    }
+
+    DFD_FAN_DEBUG(DBG_VERBOSE, "fan:%u, motor:%u, get fan speed level success, value:0x%02x.\n",
+        fan_index, motor_index, speed_level);
+    *level = speed_level;
+    return DFD_RV_OK;
+}
+
+int dfd_get_fan_pwm(unsigned int fan_index, unsigned int motor_index, int *pwm)
+{
+    int ret, level;
+
+    if (pwm == NULL) {
+        DFD_FAN_DEBUG(DBG_ERROR, "param error. fan index:%d, motor index:%d.\n",
+            fan_index, motor_index);
+        return -DFD_RV_INVALID_VALUE;
+    }
+
+    ret = dfd_get_fan_speed_level(fan_index, motor_index, &level);
+    if (ret < 0) {
+        DFD_FAN_DEBUG(DBG_ERROR, "fan:%u, motor:%u, get fan pwm error, ret:%d\n",
+            fan_index, motor_index, ret);
+        return ret;
+    }
+
+    if ((level * 100) % 255 > 0) {
+        *pwm = level * 100 / 255 + 1;
+    } else {
+        *pwm = level * 100 / 255;
+    }
+
+    DFD_FAN_DEBUG(DBG_VERBOSE, "fan:%u, motor:%u, get fan pwm success, value:%d.\n",
+        fan_index, motor_index, *pwm);
+    return DFD_RV_OK;
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/dfd_module.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/dfd_module.c
new file mode 100644
index 000000000..9e5b00b79
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/dfd_module.c
@@ -0,0 +1,95 @@
+#include <linux/module.h>
+
+#include "../dev_sysfs/include/sysfs_common.h"
+#include "./include/dfd_module.h"
+#include "./include/dfd_cfg.h"
+#include "./include/dfd_fan_driver.h"
+#include "./include/dfd_slot_driver.h"
+#include "./include/dfd_sensors_driver.h"
+#include "./include/dfd_psu_driver.h"
+#include "./include/dfd_sff_driver.h"
+
+typedef enum dfd_dev_init_fail_s {
+    DFD_KO_INIT_CPLD_FAIL       = 1,
+    DFD_KO_INIT_FPGA_FAIL       = 2,
+    DFD_KO_INIT_IRQ_FAIL        = 3,
+    DFD_KO_INIT_CFG_FAIL        = 4,
+    DFD_KO_INIT_DATA_FAIL       = 5,
+} dfd_dev_init_fail_t;
+
+int g_dfd_dbg_level = 0;
+
+int dfd_get_dev_number(unsigned int main_dev_id, unsigned int minor_dev_id)
+{
+    int key,dev_num;
+    int *p_dev_num;
+
+    key = DFD_CFG_KEY(DFD_CFG_ITEM_DEV_NUM, main_dev_id, minor_dev_id);
+    p_dev_num = dfd_ko_cfg_get_item(key);
+    if (p_dev_num == NULL) {
+        DBG_DEBUG(DBG_ERROR, "get device number failed, key:0x%x\n",key);
+        return -DFD_RV_DEV_NOTSUPPORT;
+    }
+    dev_num = *p_dev_num;
+    DBG_DEBUG(DBG_VERBOSE, "get device number ok, number:%d\n",dev_num);
+    return dev_num;
+}
+
+static struct switch_drivers_t switch_drivers= {
+    .get_dev_number = dfd_get_dev_number,
+    /* fan */
+    .get_fan_speed = dfd_get_fan_speed,
+    .get_fan_pwm = dfd_get_fan_pwm,
+    .set_fan_pwm = dfd_set_fan_pwm,
+    .get_fan_present_status = dfd_get_fan_present_status,
+    .get_fan_roll_status = dfd_get_fan_roll_status,
+    .get_fan_speed_level = dfd_get_fan_speed_level,
+    .set_fan_speed_level = dfd_set_fan_speed_level,
+    /* slot */
+    .get_slot_present_status = dfd_get_slot_present_status,
+    /* sensors */
+    .get_temp_info = dfd_get_temp_info,
+    .get_voltage_info = dfd_get_voltage_info,
+    /* psu */
+    .get_psu_present_status = dfd_get_psu_present_status,
+    .get_psu_output_status = dfd_get_psu_output_status,
+    .get_psu_alert_status = dfd_get_psu_alert_status,
+    /* sff */
+    .get_sff_cpld_info = dfd_get_sff_cpld_info,
+    .get_sff_dir_name = dfd_get_sff_dir_name,
+};
+
+struct switch_drivers_t * dfd_plat_driver_get(void) {
+    return &switch_drivers;
+}
+
+static int32_t __init dfd_dev_init(void)
+{
+    int ret;
+
+    DBG_DEBUG(DBG_VERBOSE, "Enter.\n");
+
+    ret = dfd_dev_cfg_init();
+    if (ret != 0) {
+        DBG_DEBUG(DBG_ERROR, "dfd_dev_cfg_init failed ret %d.\n", ret);
+        ret = -DFD_KO_INIT_CFG_FAIL;
+        return ret;
+    }
+
+    DBG_DEBUG(DBG_VERBOSE, "success.\n");
+    return 0;
+}
+
+static void __exit dfd_dev_exit(void)
+{
+    DBG_DEBUG(DBG_VERBOSE, "dfd_dev_exit.\n");
+    dfd_dev_cfg_exit();
+    return ;
+}
+
+module_init(dfd_dev_init);
+module_exit(dfd_dev_exit);
+module_param(g_dfd_dbg_level, int, S_IRUGO | S_IWUSR);
+EXPORT_SYMBOL(dfd_plat_driver_get);
+MODULE_AUTHOR("support");
+MODULE_LICENSE("GPL");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/dfd_psu_driver.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/dfd_psu_driver.c
new file mode 100644
index 000000000..55e2e4339
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/dfd_psu_driver.c
@@ -0,0 +1,70 @@
+#include <linux/module.h>
+#include <linux/slab.h>
+
+#include "./include/dfd_module.h"
+#include "./include/dfd_cfg.h"
+#include "./include/dfd_cfg_adapter.h"
+#include "./include/dfd_cfg_info.h"
+#include "../dev_sysfs/include/sysfs_common.h"
+
+#define PSU_SIZE                         (256)
+
+typedef enum dfd_psu_status_e {
+    DFD_PSU_PRESENT_STATUS  = 0,
+    DFD_PSU_OUTPUT_STATUS   = 1,
+    DFD_PSU_ALERT_STATUS    = 2,
+} dfd_psu_status_t;
+
+int g_dfd_psu_dbg_level = 0;
+module_param(g_dfd_psu_dbg_level, int, S_IRUGO | S_IWUSR);
+
+int dfd_get_psu_present_status(unsigned int psu_index)
+{
+    int ret, present_key, present_status;
+
+    present_key = DFD_CFG_KEY(DFD_CFG_ITEM_PSU_STATUS, psu_index, DFD_PSU_PRESENT_STATUS);
+    ret = dfd_info_get_int(present_key, &present_status, NULL);
+    if (ret < 0) {
+        DFD_PSU_DEBUG(DBG_ERROR, "dfd_get_psu_present_status error. psu_index:%d, ret:%d\n",
+            psu_index, ret);
+        return ret;
+    }
+
+    DFD_PSU_DEBUG(DBG_VERBOSE, "dfd_get_psu_present_status success. psu_index:%d, status:%d\n",
+        psu_index, present_status);
+    return present_status;
+}
+
+int dfd_get_psu_output_status(unsigned int psu_index)
+{
+    int ret, output_key, output_status;
+
+    output_key = DFD_CFG_KEY(DFD_CFG_ITEM_PSU_STATUS, psu_index, DFD_PSU_OUTPUT_STATUS);
+    ret = dfd_info_get_int(output_key, &output_status, NULL);
+    if (ret < 0) {
+        DFD_PSU_DEBUG(DBG_ERROR, "dfd_get_psu_output_status error. psu_index:%d, ret:%d\n",
+            psu_index, ret);
+        return ret;
+    }
+
+    DFD_PSU_DEBUG(DBG_VERBOSE, "dfd_get_psu_output_status success. psu_index:%d, status:%d\n",
+        psu_index, output_status);
+    return output_status;
+}
+
+int dfd_get_psu_alert_status(unsigned int psu_index)
+{
+    int ret, alert_key, alert_status;
+
+    alert_key = DFD_CFG_KEY(DFD_CFG_ITEM_PSU_STATUS, psu_index, DFD_PSU_ALERT_STATUS);
+    ret = dfd_info_get_int(alert_key, &alert_status, NULL);
+    if (ret < 0) {
+        DFD_PSU_DEBUG(DBG_ERROR, "dfd_get_psu_alert_status error. psu_index:%d, ret:%d\n",
+            psu_index, ret);
+        return ret;
+    }
+
+    DFD_PSU_DEBUG(DBG_VERBOSE, "dfd_get_psu_alert_status success. psu_index:%d, status:%d\n",
+        psu_index, alert_status);
+    return alert_status;
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/dfd_sensors_driver.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/dfd_sensors_driver.c
new file mode 100644
index 000000000..bfca20290
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/dfd_sensors_driver.c
@@ -0,0 +1,149 @@
+#include <linux/module.h>
+#include <linux/slab.h>
+
+#include "./include/dfd_module.h"
+#include "./include/dfd_cfg.h"
+#include "./include/dfd_cfg_adapter.h"
+#include "./include/dfd_cfg_info.h"
+#include "./include/dfd_cfg_file.h"
+#include "../dev_sysfs/include/sysfs_common.h"
+
+#define DFD_GET_TEMP_SENSOR_KEY1(dev_index, temp_index) \
+    (((dev_index & 0xff) << 8) | (temp_index & 0xff))
+#define DFD_GET_TEMP_SENSOR_KEY2(main_dev_id, temp_type) \
+        (((main_dev_id & 0x0f) << 4) | (temp_type & 0x0f))
+#define DFD_FORMAT_STR_MAX_LEN          (32)
+
+int g_dfd_sensor_dbg_level = 0;
+module_param(g_dfd_sensor_dbg_level, int, S_IRUGO | S_IWUSR);
+
+static int dfd_deal_hwmon_buf(uint8_t *buf, int buf_len, uint8_t *buf_new, int *buf_len_new, info_ctrl_t *info_ctrl)
+{
+    int i, tmp_len;
+    int exp, decimal, divisor;
+    int org_value, tmp_value;
+    int div_result, div_mod;
+    char fmt_str[DFD_FORMAT_STR_MAX_LEN];
+
+    exp = info_ctrl->int_cons;
+    decimal = info_ctrl->bit_offset;
+
+    if (exp <= 0) {
+        DBG_DEBUG(DBG_VERBOSE, "exponent %d, don't need transform. buf_len:%d, buf_len_new:%d\n",
+            exp, buf_len, *buf_len_new);
+        snprintf(buf_new, *buf_len_new, "%s", buf);
+        *buf_len_new = strlen(buf_new);
+        return DFD_RV_OK;
+    }
+    divisor = 1;
+    for (i = 0; i < exp; i++) {
+        divisor *= 10;
+    }
+    org_value = simple_strtol(buf, NULL, 10);
+    if (org_value < 0) {
+        tmp_value = 0 - org_value;
+    } else {
+        tmp_value = org_value;
+    }
+    div_result = tmp_value / divisor;
+    div_mod = tmp_value % divisor;
+    DBG_DEBUG(DBG_VERBOSE, "exp:%d, decimal:%d, original value:%d, divisor:%d, result :%d, mod:%d\n",
+        exp, decimal, org_value, divisor, div_result, div_mod);
+
+    mem_clear(fmt_str, sizeof(fmt_str));
+    if (org_value < 0) {
+        snprintf(fmt_str, sizeof(fmt_str), "-%%d.%%0%dd\n",exp);
+    } else {
+        snprintf(fmt_str, sizeof(fmt_str), "%%d.%%0%dd\n",exp);
+    }
+    DBG_DEBUG(DBG_VERBOSE, "format string:%s",fmt_str);
+    snprintf(buf_new, *buf_len_new, fmt_str, div_result, div_mod);
+    *buf_len_new = strlen(buf_new);
+    tmp_len = *buf_len_new;
+
+    if ( decimal > 0) {
+        for(i = 0; i < *buf_len_new; i++) {
+            if (buf_new[i] == '.') {
+                if( i + decimal + 2 <= *buf_len_new ) {
+                    buf_new[i + decimal + 1 ] = '\n';
+                    buf_new[i + decimal + 2 ] = '\0';
+                    *buf_len_new = strlen(buf_new);
+                    DBG_DEBUG(DBG_VERBOSE, "deal decimal[%d] ok, str len:%d, value:%s\n",
+                        decimal, *buf_len_new, buf_new);
+                }
+                break;
+            }
+        }
+        if (tmp_len == *buf_len_new) {
+            DBG_DEBUG(DBG_WARN, "deal decimal[%d] failed, use original value:%s\n", decimal, buf_new);
+        }
+    }
+    return DFD_RV_OK;
+}
+
+static int dfd_get_sensor_info(uint8_t main_dev_id, uint8_t dev_index, uint8_t sensor_type,
+            uint8_t sensor_index, uint8_t sensor_attr, char *buf)
+{
+    uint32_t key;
+    uint16_t key_index1;
+    uint8_t key_index2;
+    int rv;
+    info_hwmon_buf_f pfunc;
+
+    key_index1 = DFD_GET_TEMP_SENSOR_KEY1(dev_index, sensor_index);
+    key_index2 = DFD_GET_TEMP_SENSOR_KEY2(main_dev_id, sensor_attr);
+    if (sensor_type == WB_MINOR_DEV_TEMP ) {
+        key = DFD_CFG_KEY(DFD_CFG_ITEM_HWMON_TEMP, key_index1, key_index2);
+    } else if (sensor_type == WB_MINOR_DEV_IN) {
+        key = DFD_CFG_KEY(DFD_CFG_ITEM_HWMON_IN, key_index1, key_index2);
+    } else {
+        DFD_SENSOR_DEBUG(DBG_ERROR, "unknow sensor type:%d.\n",sensor_type);
+        return -DFD_RV_INVALID_VALUE;
+    }
+
+    DFD_SENSOR_DEBUG(DBG_VERBOSE, "get sensor info.main_dev_id:%d, dev_index:0x%x, sensor_index:0x%x, sensor_attr:0x%x, key:0x%x,\n",
+        main_dev_id, dev_index, sensor_index, sensor_attr, key);
+
+    pfunc = dfd_deal_hwmon_buf;
+    mem_clear(buf, PAGE_SIZE);
+    rv = dfd_info_get_sensor(key, buf, PAGE_SIZE, pfunc);
+    return rv;
+}
+
+ssize_t dfd_get_temp_info(uint8_t main_dev_id, uint8_t dev_index,
+            uint8_t temp_index, uint8_t temp_attr, char *buf)
+{
+    int rv;
+
+    if (buf == NULL) {
+        DFD_SENSOR_DEBUG(DBG_ERROR, "param error. buf is NULL.\n");
+        return -DFD_RV_INVALID_VALUE;
+    }
+
+    rv = dfd_get_sensor_info(main_dev_id, dev_index, WB_MINOR_DEV_TEMP, temp_index, temp_attr, buf);
+    if (rv < 0) {
+        DFD_SENSOR_DEBUG(DBG_ERROR, "get temp info error. rv:%d\n", rv);
+    } else {
+        DFD_SENSOR_DEBUG(DBG_VERBOSE, "get temp info ok.value:%s\n", buf);
+    }
+    return rv;
+}
+
+ssize_t dfd_get_voltage_info(uint8_t main_dev_id, uint8_t dev_index,
+            uint8_t in_index, uint8_t in_attr, char *buf)
+{
+    int rv;
+
+    if (buf == NULL) {
+        DFD_SENSOR_DEBUG(DBG_ERROR, "param error. buf is NULL.\n");
+        return -DFD_RV_INVALID_VALUE;
+    }
+
+    rv = dfd_get_sensor_info(main_dev_id, dev_index, WB_MINOR_DEV_IN, in_index, in_attr, buf);
+    if (rv < 0) {
+        DFD_SENSOR_DEBUG(DBG_ERROR, "get voltage info error. rv:%d\n", rv);
+    } else {
+        DFD_SENSOR_DEBUG(DBG_VERBOSE, "get voltage info ok.value:%s\n", buf);
+    }
+    return rv;
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/dfd_sff_driver.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/dfd_sff_driver.c
new file mode 100644
index 000000000..5c1faff97
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/dfd_sff_driver.c
@@ -0,0 +1,56 @@
+#include <linux/module.h>
+
+#include "./include/dfd_module.h"
+#include "./include/dfd_cfg.h"
+#include "./include/dfd_cfg_info.h"
+#include "./include/dfd_cfg_adapter.h"
+#include "../dev_sysfs/include/sysfs_common.h"
+
+int g_dfd_sff_dbg_level = 0;
+module_param(g_dfd_sff_dbg_level, int, S_IRUGO | S_IWUSR);
+
+ssize_t dfd_get_sff_cpld_info(unsigned int sff_index, int cpld_reg_type, char *buf, int len)
+{
+    int key, ret, value;
+
+    if(buf == NULL) {
+        DFD_SFF_DEBUG(DBG_ERROR, "param error, buf is NULL. sff_index:%d, cpld_reg_type:%d.\n",
+            sff_index, cpld_reg_type);
+        return -DFD_RV_INVALID_VALUE;
+    }
+
+    key = DFD_CFG_KEY(DFD_CFG_ITEM_SFF_CPLD_REG, sff_index, cpld_reg_type);
+    ret = dfd_info_get_int(key, &value, NULL);
+    if (ret < 0) {
+        DFD_SFF_DEBUG(DBG_ERROR, "get sff cpld reg error, key:0x%x,ret:%d.\n", key, ret);
+        return ret;
+    }
+
+    mem_clear(buf, len);
+    return (ssize_t)snprintf(buf, len, "%d\n", value);
+}
+
+ssize_t dfd_get_sff_dir_name(unsigned int sff_index, char *buf, int buf_len)
+{
+    int key;
+    char *sff_dir_name;
+
+    if (buf == NULL) {
+        DFD_SFF_DEBUG(DBG_ERROR, "param error. buf is NULL.sff index:%d", sff_index);
+        return -DFD_RV_INVALID_VALUE;
+    }
+
+    mem_clear(buf, buf_len);
+
+    key = DFD_CFG_KEY(DFD_CFG_ITEM_SFF_DIR_NAME, sff_index, 0);
+    sff_dir_name = dfd_ko_cfg_get_item(key);
+    if (sff_dir_name == NULL) {
+        DFD_SFF_DEBUG(DBG_ERROR, "sff dir name config error, key=0x%08x\n", key);
+        return -DFD_RV_NODE_FAIL;
+    }
+
+    DFD_SFF_DEBUG(DBG_VERBOSE, "%s\n", sff_dir_name);
+    snprintf(buf, buf_len, "%s", sff_dir_name);
+    return strlen(buf);
+
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/dfd_slot_driver.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/dfd_slot_driver.c
new file mode 100644
index 000000000..69c82adab
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/dfd_slot_driver.c
@@ -0,0 +1,27 @@
+#include <linux/module.h>
+#include <linux/slab.h>
+
+#include "./include/dfd_module.h"
+#include "./include/dfd_cfg.h"
+#include "./include/dfd_cfg_adapter.h"
+#include "./include/dfd_cfg_info.h"
+#include "../dev_sysfs/include/sysfs_common.h"
+
+#define SLOT_SIZE                         (256)
+
+int g_dfd_slot_dbg_level = 0;
+module_param(g_dfd_slot_dbg_level, int, S_IRUGO | S_IWUSR);
+
+int dfd_get_slot_present_status(unsigned int slot_index)
+{
+    int key, ret;
+    int status;
+
+    key = DFD_CFG_KEY(DFD_CFG_ITEM_DEV_PRESENT_STATUS, WB_MAIN_DEV_SLOT, slot_index);
+    ret = dfd_info_get_int(key, &status, NULL);
+    if (ret < 0) {
+        DFD_SLOT_DEBUG(DBG_ERROR, "get slot status error, key:0x%x\n",key);
+        return ret;
+    }
+    return status;
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_cfg.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_cfg.h
new file mode 100644
index 000000000..af3de1ca9
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_cfg.h
@@ -0,0 +1,99 @@
+#ifndef __DFD_CFG_H__
+#define __DFD_CFG_H__
+
+#include <linux/list.h>
+
+#define DFD_KO_CFG_FILE_NAME     "/etc/plat_sysfs_cfg/cfg_file_name"
+#define DFD_KO_CFG_FILE_DIR      "/etc/plat_sysfs_cfg/"
+#define DFD_PUB_CARDTYPE_FILE    "/sys/module/platform_common/parameters/dfd_my_type"
+
+#define DFD_CFG_CMDLINE_MAX_LEN (256)
+#define DFD_CFG_NAME_MAX_LEN    (256)
+#define DFD_CFG_VALUE_MAX_LEN   (256)
+#define DFD_CFG_STR_MAX_LEN     (64)
+#define DFD_CFG_CPLD_NUM_MAX    (16)
+#define DFD_PRODUCT_ID_LENGTH   (8)
+#define DFD_PID_BUF_LEN         (32)
+#define DFD_TEMP_NAME_BUF_LEN   (32)
+
+#define DFD_CFG_EMPTY_VALUE     (-1)
+#define DFD_CFG_INVALID_VALUE   (0)
+
+#define DFD_CFG_KEY(item, index1, index2) \
+    ((((item) & 0xff) << 24) | (((index1) & 0xffff) << 8) | ((index2) & 0xff))
+#define DFD_CFG_ITEM_ID(key)    (((key) >> 24) & 0xff)
+#define DFD_CFG_INDEX1(key)     (((key) >> 8) & 0xffff)
+#define DFD_CFG_INDEX2(key)     ((key)& 0xff)
+
+#define INDEX_NOT_EXIST     (-1)
+#define INDEX1_MAX           (0xffff)
+#define INDEX2_MAX           (0xff)
+#define READ_TEMP_FAIL 1000000
+
+#define DFD_CFG_ITEM_ALL \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_NONE, "none", INDEX_NOT_EXIST, INDEX_NOT_EXIST)                       \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_DEV_NUM, "dev_num", INDEX1_MAX, INDEX2_MAX)                           \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_CPLD_LPC_DEV, "cpld_lpc_dev", INDEX1_MAX, DFD_CFG_CPLD_NUM_MAX)       \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_INT_END, "end_int", INDEX_NOT_EXIST, INDEX_NOT_EXIST)                 \
+                                                                                                    \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_CPLD_MODE, "mode_cpld", INDEX1_MAX, DFD_CFG_CPLD_NUM_MAX)             \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_SFF_DIR_NAME, "sff_dir_name", INDEX1_MAX, INDEX_NOT_EXIST)            \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_STRING_END, "end_string", INDEX_NOT_EXIST, INDEX_NOT_EXIST)           \
+                                                                                                    \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_CPLD_I2C_DEV, "cpld_i2c_dev", INDEX1_MAX, INDEX2_MAX)                 \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_OTHER_I2C_DEV, "other_i2c_dev", INDEX1_MAX, INDEX2_MAX)               \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_I2C_DEV_END, "end_i2c_dev", INDEX_NOT_EXIST, INDEX_NOT_EXIST)         \
+                                                                                                    \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_FAN_ROLL_STATUS, "fan_roll_status", INDEX1_MAX, INDEX2_MAX)           \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_FAN_SPEED, "fan_speed", INDEX1_MAX, INDEX2_MAX)                       \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_FAN_RATIO, "fan_ratio", INDEX1_MAX, INDEX2_MAX)                       \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_DEV_PRESENT_STATUS, "dev_present_status", INDEX1_MAX, INDEX2_MAX)     \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_PSU_STATUS, "psu_status", INDEX1_MAX, INDEX2_MAX)                     \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_HWMON_TEMP, "hwmon_temp", INDEX1_MAX, INDEX2_MAX)                     \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_HWMON_IN, "hwmon_in", INDEX1_MAX, INDEX2_MAX)                         \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_SFF_CPLD_REG, "sff_cpld_reg", INDEX1_MAX, INDEX2_MAX)                 \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_INFO_CTRL_END, "end_info_ctrl", INDEX_NOT_EXIST, INDEX_NOT_EXIST)     \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_HWMON_POWER, "hwmon_power", INDEX1_MAX, INDEX2_MAX)                   \
+
+#ifdef DFD_CFG_ITEM
+#undef DFD_CFG_ITEM
+#endif
+#define DFD_CFG_ITEM(_id, _name, _index_min, _index_max)    _id,
+typedef enum dfd_cfg_item_id_s {
+    DFD_CFG_ITEM_ALL
+} dfd_cfg_item_id_t;
+
+#define DFD_CFG_ITEM_IS_INT(item_id) \
+    (((item_id) > DFD_CFG_ITEM_NONE) && ((item_id) < DFD_CFG_ITEM_INT_END))
+
+#define DFD_CFG_ITEM_IS_STRING(item_id) \
+    (((item_id) > DFD_CFG_ITEM_INT_END) && ((item_id) < DFD_CFG_ITEM_STRING_END))
+
+#define DFD_CFG_ITEM_IS_I2C_DEV(item_id) \
+    (((item_id) > DFD_CFG_ITEM_STRING_END) && ((item_id) < DFD_CFG_ITEM_I2C_DEV_END))
+
+#define DFD_CFG_ITEM_IS_INFO_CTRL(item_id) \
+    (((item_id) > DFD_CFG_ITEM_I2C_DEV_END) && ((item_id) < DFD_CFG_ITEM_INFO_CTRL_END))
+
+typedef struct index_range_s {
+    int index1_max;
+    int index2_max;
+} index_range_t;
+
+typedef struct val_convert_node_s {
+    struct list_head lst;
+    int int_val;
+    char str_val[DFD_CFG_STR_MAX_LEN];
+    int index1;
+    int index2;
+} val_convert_node_t;
+
+void *dfd_ko_cfg_get_item(int key);
+
+void dfd_ko_cfg_show_item(int key);
+
+int32_t dfd_dev_cfg_init(void);
+
+void dfd_dev_cfg_exit(void);
+
+#endif /* __DFD_CFG_H__ */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_cfg_adapter.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_cfg_adapter.h
new file mode 100644
index 000000000..70d8b536c
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_cfg_adapter.h
@@ -0,0 +1,46 @@
+#ifndef __DFD_CFG_ADAPTER_H__
+#define __DFD_CFG_ADAPTER_H__
+
+#define DFD_KO_CPLD_I2C_RETRY_SLEEP            (10)  /* ms */
+#define DFD_KO_CPLD_I2C_RETRY_TIMES            (50 / DFD_KO_CPLD_I2C_RETRY_SLEEP)
+
+#define DFD_KO_CPLD_GET_SLOT(addr)             ((addr >> 24) & 0xff)
+#define DFD_KO_CPLD_GET_ID(addr)               ((addr >> 16) & 0xff)
+#define DFD_KO_CPLD_GET_INDEX(addr)            (addr & 0xffff)
+#define DFD_KO_CPLD_MODE_I2C_STRING            "i2c"
+#define DFD_KO_CPLD_MODE_LPC_STRING            "lpc"
+
+typedef struct dfd_i2c_dev_s {
+    int bus;
+    int addr;
+} dfd_i2c_dev_t;
+
+typedef enum dfd_i2c_dev_mem_s {
+    DFD_I2C_DEV_MEM_BUS,
+    DFD_I2C_DEV_MEM_ADDR,
+    DFD_I2C_DEV_MEM_END
+} dfd_i2c_dev_mem_t;
+
+typedef enum cpld_mode_e {
+    DFD_CPLD_MODE_I2C,
+    DFD_CPLD_MODE_LPC,
+} cpld_mode_t;
+
+typedef enum i2c_mode_e {
+    DFD_I2C_MODE_NORMAL_I2C,
+    DFD_I2C_MODE_SMBUS,
+} i2c_mode_t;
+
+extern char *g_dfd_i2c_dev_mem_str[DFD_I2C_DEV_MEM_END];
+
+int32_t dfd_ko_cpld_read(int32_t addr, uint8_t *buf);
+
+int32_t dfd_ko_cpld_write(int32_t addr, uint8_t val);
+
+int32_t dfd_ko_i2c_read(int bus, int addr, int offset, uint8_t *buf, uint32_t size);
+
+int32_t dfd_ko_i2c_write(int bus, int addr, int offset, uint8_t *buf, uint32_t size);
+
+int32_t dfd_ko_read_file(char *fpath, int32_t addr, uint8_t *val, int32_t read_bytes);
+
+#endif /* __DFD_CFG_ADAPTER_H__ */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_cfg_file.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_cfg_file.h
new file mode 100644
index 000000000..50d7a42d5
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_cfg_file.h
@@ -0,0 +1,37 @@
+#ifndef __DFD_CFG_FILE_H__
+#define __DFD_CFG_FILE_H__
+
+#include <linux/types.h>
+
+#define KFILE_RV_OK             (0)
+#define KFILE_RV_INPUT_ERR      (-1)
+#define KFILE_RV_STAT_FAIL      (-2)
+#define KFILE_RV_OPEN_FAIL      (-3)
+#define KFILE_RV_MALLOC_FAIL    (-4)
+#define KFILE_RV_RD_FAIL        (-5)
+#define KFILE_RV_ADDR_ERR       (-6)
+#define KFILE_RV_WR_FAIL        (-7)
+
+#define IS_CR(c)  ((c) == '\n')
+
+typedef struct kfile_ctrl_s {
+    int32_t size;
+    int32_t pos;
+    char *buf;
+} kfile_ctrl_t;
+
+int kfile_open(char *fname, kfile_ctrl_t *kfile_ctrl);
+
+void kfile_close(kfile_ctrl_t *kfile_ctrl);
+
+int kfile_gets(char *buf, int buf_size, kfile_ctrl_t *kfile_ctrl);
+
+int kfile_read(int32_t addr, char *buf, int buf_size, kfile_ctrl_t *kfile_ctrl);
+
+int kfile_iterate_dir(const char *dir_path, const char *obj_name, char *match_name, int len);
+
+#if 0
+
+int kfile_write(char *fpath, int32_t addr, char *buf, int buf_size);
+#endif
+#endif /* __DFD_CFG_FILE_H__ */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_cfg_info.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_cfg_info.h
new file mode 100644
index 000000000..88e8f92c1
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_cfg_info.h
@@ -0,0 +1,119 @@
+#ifndef __DFD_CFG_INFO_H__
+#define __DFD_CFG_INFO_H__
+
+#include <linux/types.h>
+
+typedef int (*info_num_buf_to_value_f)(uint8_t *num_buf, int buf_len, int *num_val);
+
+typedef int (*info_buf_to_buf_f)(uint8_t *buf, int buf_len, uint8_t *buf_new, int *buf_len_new);
+
+#define IS_INFO_FRMT_BIT(frmt)      ((frmt) == INFO_FRMT_BIT)
+#define IS_INFO_FRMT_BYTE(frmt)     (((frmt) == INFO_FRMT_BYTE) || ((frmt) == INFO_FRMT_NUM_BYTES))
+#define IS_INFO_FRMT_NUM_STR(frmt)  ((frmt) == INFO_FRMT_NUM_STR)
+#define IS_INFO_FRMT_NUM_BUF(frmt)  ((frmt) == INFO_FRMT_NUM_BUF)
+#define IS_INFO_FRMT_BUF(frmt)      ((frmt) == INFO_FRMT_BUF)
+
+#define INFO_INT_MAX_LEN            (32)
+#define INFO_INT_LEN_VALAID(len)    (((len) > 0) && ((len) < INFO_INT_MAX_LEN))
+
+#define INFO_BUF_MAX_LEN            (128)
+#define INFO_BUF_LEN_VALAID(len)    (((len) > 0) && ((len) < INFO_BUF_MAX_LEN))
+
+#define INFO_BIT_OFFSET_VALID(bit_offset)   (((bit_offset) >= 0) && ((bit_offset) < 8))
+
+typedef enum info_ctrl_mode_e {
+    INFO_CTRL_MODE_NONE,
+    INFO_CTRL_MODE_CFG,
+    INFO_CTRL_MODE_CONS,
+    INFO_CTRL_MODE_TLV,
+    INFO_CTRL_MODE_SRT_CONS,
+    INFO_CTRL_MODE_END
+} info_ctrl_mode_t;
+
+typedef enum info_frmt_e {
+    INFO_FRMT_NONE,
+    INFO_FRMT_BIT,
+    INFO_FRMT_BYTE,
+    INFO_FRMT_NUM_BYTES,
+    INFO_FRMT_NUM_STR,
+    INFO_FRMT_NUM_BUF,
+    INFO_FRMT_BUF,
+    INFO_FRMT_END
+} info_frmt_t;
+
+typedef enum info_src_e {
+    INFO_SRC_NONE,
+    INFO_SRC_CPLD,
+    INFO_SRC_FPGA,
+    INFO_SRC_OTHER_I2C,
+    INFO_SRC_FILE,
+    INFO_SRC_END
+} info_src_t;
+
+typedef enum info_pola_e {
+    INFO_POLA_NONE,
+    INFO_POLA_POSI,
+    INFO_POLA_NEGA,
+    INFO_POLA_END
+} info_pola_t;
+
+#define INFO_FPATH_MAX_LEN     (128)
+#define INFO_STR_CONS_MAX_LEN  (64)
+typedef struct info_ctrl_s {
+    info_ctrl_mode_t mode;
+    int32_t int_cons;
+    info_src_t src;
+    info_frmt_t frmt;
+    info_pola_t pola;
+    char fpath[INFO_FPATH_MAX_LEN];
+    int32_t addr;
+    int32_t len;
+    int32_t bit_offset;
+    char str_cons[INFO_STR_CONS_MAX_LEN];
+    int32_t int_extra1;
+    int32_t int_extra2;
+    int32_t int_extra3;      /* cpld voltage mode */
+} info_ctrl_t;
+
+typedef enum info_ctrl_mem_s {
+    INFO_CTRL_MEM_MODE,
+    INFO_CTRL_MEM_INT_CONS,
+    INFO_CTRL_MEM_SRC,
+    INFO_CTRL_MEM_FRMT,
+    INFO_CTRL_MEM_POLA,
+    INFO_CTRL_MEM_FPATH,
+    INFO_CTRL_MEM_ADDR,
+    INFO_CTRL_MEM_LEN,
+    INFO_CTRL_MEM_BIT_OFFSET,
+    INFO_CTRL_MEM_STR_CONS,
+    INFO_CTRL_MEM_INT_EXTRA1,
+    INFO_CTRL_MEM_INT_EXTRA2,
+    INFO_CTRL_MEM_INT_EXTRA3,
+    INFO_CTRL_MEM_END
+} info_ctrl_mem_t;
+
+typedef enum sensor_format_mem_s {
+    LINEAR11 = 1,
+    LINEAR16,
+    TMP464,
+    MAC_TH5,
+    MAC_TD3
+} sensor_format_mem_t;
+
+typedef int (*info_hwmon_buf_f)(uint8_t *buf, int buf_len, uint8_t *buf_new, int *buf_len_new, info_ctrl_t *info_ctrl);
+
+extern char *g_info_ctrl_mem_str[INFO_CTRL_MEM_END];
+extern char *g_info_src_str[INFO_SRC_END];
+extern char *g_info_frmt_str[INFO_FRMT_END];
+extern char *g_info_pola_str[INFO_POLA_END];
+extern char *g_info_ctrl_mode_str[INFO_CTRL_MODE_END];
+
+int dfd_info_get_int(int key, int *ret, info_num_buf_to_value_f pfun);
+
+int dfd_info_get_buf(int key, uint8_t *buf, int buf_len, info_buf_to_buf_f pfun);
+
+int dfd_info_set_int(int key, int val);
+
+int dfd_info_get_sensor(uint32_t key, char *buf, int buf_len, info_hwmon_buf_f pfun);
+
+#endif /* __DFD_CFG_INFO_H__ */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_cfg_listnode.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_cfg_listnode.h
new file mode 100644
index 000000000..955dfa96e
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_cfg_listnode.h
@@ -0,0 +1,30 @@
+#ifndef __DFD_CFG_LISTNODE_H__
+#define __DFD_CFG_LISTNODE_H__
+
+#include <linux/list.h>
+
+#define LNODE_RV_OK             (0)
+#define LNODE_RV_INPUT_ERR      (-1)
+#define LNODE_RV_NODE_EXIST     (-2)
+#define LNODE_RV_NOMEM          (-3)
+
+typedef struct lnode_root_s {
+    struct list_head root;
+} lnode_root_t;
+
+typedef struct lnode_node_s {
+    struct list_head lst;
+
+    int key;
+    void *data;
+} lnode_node_t;
+
+void *lnode_find_node(lnode_root_t *root, int key);
+
+int lnode_insert_node(lnode_root_t *root, int key, void *data);
+
+int lnode_init_root(lnode_root_t *root);
+
+void lnode_free_list(lnode_root_t *root);
+
+#endif /* __DFD_CFG_LISTNODE_H__ */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_fan_driver.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_fan_driver.h
new file mode 100644
index 000000000..1065fd9ee
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_fan_driver.h
@@ -0,0 +1,18 @@
+#ifndef _DFD_FAN_DRIVER_H_
+#define _DFD_FAN_DRIVER_H_
+
+ssize_t dfd_get_fan_speed(unsigned int fan_index, unsigned int motor_index,unsigned int *speed);
+
+int dfd_set_fan_pwm(unsigned int fan_index, unsigned int motor_index, int pwm);
+
+int dfd_get_fan_pwm(unsigned int fan_index, unsigned int motor_index, int *pwm);
+
+int dfd_get_fan_present_status(unsigned int fan_index);
+
+int dfd_get_fan_roll_status(unsigned int fan_index, unsigned int motor_index);
+
+int dfd_get_fan_speed_level(unsigned int fan_index, unsigned int motor_index, int *level);
+
+int dfd_set_fan_speed_level(unsigned int fan_index, unsigned int motor_index, int level);
+
+#endif /* _DFD_FAN_DRIVER_H_ */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_module.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_module.h
new file mode 100644
index 000000000..a547255cf
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_module.h
@@ -0,0 +1,96 @@
+#ifndef __DFD_MODULE_H__
+#define __DFD_MODULE_H__
+
+typedef enum dfd_rv_s {
+    DFD_RV_OK               = 0,
+    DFD_RV_INIT_ERR         = 1,
+    DFD_RV_SLOT_INVALID     = 2,
+    DFD_RV_MODE_INVALID     = 3,
+    DFD_RV_MODE_NOTSUPPORT  = 4,
+    DFD_RV_TYPE_ERR         = 5,
+    DFD_RV_DEV_NOTSUPPORT   = 6,
+    DFD_RV_DEV_FAIL         = 7,
+    DFD_RV_INDEX_INVALID    = 8,
+    DFD_RV_NO_INTF          = 9,
+    DFD_RV_NO_NODE          = 10,
+    DFD_RV_NODE_FAIL        = 11,
+    DFD_RV_INVALID_VALUE    = 12,
+    DFD_RV_NO_MEMORY        = 13,
+} dfd_rv_t;
+
+typedef enum {
+    DBG_VERBOSE = 0x01,
+    DBG_WARN    = 0x02,
+    DBG_ERROR   = 0x04,
+} dbg_level_t;
+
+extern int g_dfd_dbg_level;
+extern int g_dfd_fan_dbg_level;
+extern int g_dfd_slot_dbg_level;
+extern int g_dfd_sensor_dbg_level;
+extern int g_dfd_psu_dbg_level;
+extern int g_dfd_sff_dbg_level;
+
+#define DBG_DEBUG(level, fmt, arg...) do { \
+    if (g_dfd_dbg_level & level) { \
+        if(level >= DBG_ERROR) { \
+            printk(KERN_ERR "[DBG-%d]:<%s, %d>:"fmt, level, __FUNCTION__, __LINE__, ##arg); \
+        } else { \
+            printk(KERN_INFO "[DBG-%d]:<%s, %d>:"fmt, level, __FUNCTION__, __LINE__, ##arg); \
+        } \
+    } \
+} while (0)
+
+#define DFD_FAN_DEBUG(level, fmt, arg...) do { \
+            if (g_dfd_fan_dbg_level & level) { \
+                if(level >= DBG_ERROR) { \
+                    printk(KERN_ERR "[DBG-%d]:<%s, %d>:"fmt, level, __FUNCTION__, __LINE__, ##arg); \
+                } else { \
+                    printk(KERN_INFO "[DBG-%d]:<%s, %d>:"fmt, level, __FUNCTION__, __LINE__, ##arg); \
+                } \
+            } \
+} while (0)
+
+#define DFD_SLOT_DEBUG(level, fmt, arg...) do { \
+    if (g_dfd_slot_dbg_level & level) { \
+        if(level >= DBG_ERROR) { \
+            printk(KERN_ERR "[DBG-%d]:<%s, %d>:"fmt, level, __FUNCTION__, __LINE__, ##arg); \
+        } else { \
+            printk(KERN_INFO "[DBG-%d]:<%s, %d>:"fmt, level, __FUNCTION__, __LINE__, ##arg); \
+        } \
+    } \
+} while (0)
+
+#define DFD_SENSOR_DEBUG(level, fmt, arg...) do { \
+    if (g_dfd_sensor_dbg_level & level) { \
+        if(level >= DBG_ERROR) { \
+            printk(KERN_ERR "[DBG-%d]:<%s, %d>:"fmt, level, __FUNCTION__, __LINE__, ##arg); \
+        } else { \
+            printk(KERN_INFO "[DBG-%d]:<%s, %d>:"fmt, level, __FUNCTION__, __LINE__, ##arg); \
+        } \
+    } \
+} while (0)
+
+#define DFD_PSU_DEBUG(level, fmt, arg...) do { \
+    if (g_dfd_psu_dbg_level & level) { \
+        if(level >= DBG_ERROR) { \
+            printk(KERN_ERR "[DBG-%d]:<%s, %d>:"fmt, level, __FUNCTION__, __LINE__, ##arg); \
+        } else { \
+            printk(KERN_INFO "[DBG-%d]:<%s, %d>:"fmt, level, __FUNCTION__, __LINE__, ##arg); \
+        } \
+    } \
+} while (0)
+
+#define DFD_SFF_DEBUG(level, fmt, arg...) do { \
+    if (g_dfd_sff_dbg_level & level) { \
+        if(level >= DBG_ERROR) { \
+            printk(KERN_ERR "[DBG-%d]:<%s, %d>:"fmt, level, __FUNCTION__, __LINE__, ##arg); \
+        } else { \
+            printk(KERN_INFO "[DBG-%d]:<%s, %d>:"fmt, level, __FUNCTION__, __LINE__, ##arg); \
+        } \
+    } \
+} while (0)
+
+int dfd_get_dev_number(unsigned int main_dev_id, unsigned int minor_dev_id);
+
+#endif  /* __DFD_MODULE_H__ */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_psu_driver.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_psu_driver.h
new file mode 100644
index 000000000..ce7199660
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_psu_driver.h
@@ -0,0 +1,10 @@
+#ifndef _DFD_PSU_DRIVER_H_
+#define _DFD_PSU_DRIVER_H_
+
+int dfd_get_psu_present_status(unsigned int psu_index);
+
+int dfd_get_psu_output_status(unsigned int psu_index);
+
+int dfd_get_psu_alert_status(unsigned int psu_index);
+
+#endif /* _DFD_PSU_DRIVER_H_ */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_sensors_driver.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_sensors_driver.h
new file mode 100644
index 000000000..16733b260
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_sensors_driver.h
@@ -0,0 +1,10 @@
+#ifndef _DFD_SENSORS_DRIVER_H_
+#define _DFD_SENSORS_DRIVER_H_
+
+ssize_t dfd_get_temp_info(uint8_t main_dev_id, uint8_t dev_index,
+            uint8_t temp_index, uint8_t temp_attr, char *buf);
+
+ssize_t dfd_get_voltage_info(uint8_t main_dev_id, uint8_t dev_index,
+            uint8_t in_index, uint8_t in_attr, char *buf);
+
+#endif /* _DFD_SENSORS_DRIVER_H_ */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_sff_driver.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_sff_driver.h
new file mode 100644
index 000000000..7107b72ee
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_sff_driver.h
@@ -0,0 +1,8 @@
+#ifndef _DFD_SFF_DRIVER_H_
+#define _DFD_SFF_DRIVER_H_
+
+ssize_t dfd_get_sff_cpld_info(unsigned int sff_index, int cpld_reg_type, char *buf, int len);
+
+ssize_t dfd_get_sff_dir_name(unsigned int sff_index, char *buf, int buf_len);
+
+#endif /* _DFD_SFF_DRIVER_H_ */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_slot_driver.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_slot_driver.h
new file mode 100644
index 000000000..c68caecd2
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_slot_driver.h
@@ -0,0 +1,6 @@
+#ifndef _DFD_SLOT_DRIVER_H_
+#define _DFD_SLOT_DRIVER_H_
+
+int dfd_get_slot_present_status(unsigned int slot_index);
+
+#endif /* _DFD_SLOT_DRIVER_H_ */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/Makefile b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/Makefile
new file mode 100644
index 000000000..1a1044bb1
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/Makefile
@@ -0,0 +1,21 @@
+PWD		= $(shell pwd)
+
+EXTRA_CFLAGS:= -I$(M)/include
+EXTRA_CFLAGS+= -Wall
+KBUILD_EXTRA_SYMBOLS += $(PLAT_SYSFS_DIR)/dev_cfg/Module.symvers
+
+obj-m := plat_switch.o
+obj-m += plat_fan.o
+obj-m += plat_psu.o
+obj-m += plat_sff.o
+obj-m += plat_sensor.o
+obj-m += plat_slot.o
+
+all:
+	$(MAKE) -C $(KERNEL_SRC)/build M=$(PWD) modules
+	@if [ ! -d $(module_out_put_dir) ]; then mkdir -p $(module_out_put_dir) ;fi
+	cp -p  $(PWD)/*.ko $(module_out_put_dir)
+clean:
+	rm -f $(PWD)/*.o $(PWD)/*.ko $(PWD)/*.mod.c $(PWD)/.*.cmd $(PWD)/*.mod
+	rm -f $(PWD)/Module.markers $(PWD)/Module.symvers $(PWD)/modules.order
+	rm -rf $(PWD)/.tmp_versions
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/include/plat_switch.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/include/plat_switch.h
new file mode 100644
index 000000000..bbd813e87
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/include/plat_switch.h
@@ -0,0 +1,86 @@
+#ifndef _PLAT_SWITCH_H_
+#define _PLAT_SWITCH_H_
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/sysfs.h>
+#include <linux/slab.h>
+#include <linux/device.h>
+#include <linux/workqueue.h>
+#include <linux/kobject.h>
+#include <linux/delay.h>
+
+enum LOG_LEVEL{
+    INFO = 0x1,
+    ERR  = 0x2,
+    DBG  = 0x4,
+    ALL  = 0xf
+};
+
+#define LOG_INFO(_prefix, fmt, args...) \
+            do { \
+                if (g_loglevel & INFO) \
+                { \
+                    printk( KERN_INFO _prefix "%s "fmt, __FUNCTION__, ##args); \
+                } \
+            } while (0)
+
+#define LOG_ERR(_prefix, fmt, args...) \
+            do { \
+                if (g_loglevel & ERR) \
+                { \
+                    printk( KERN_ERR _prefix "%s "fmt, __FUNCTION__, ##args); \
+                } \
+            } while (0)
+
+#define LOG_DBG(_prefix, fmt, args...) \
+            do { \
+                if (g_loglevel & DBG) \
+                { \
+                    printk( KERN_DEBUG _prefix "%s "fmt, __FUNCTION__, ##args); \
+                } \
+            } while (0)
+
+#define check_pfun(p) \
+            do { \
+                if (p == NULL) { \
+                    printk( KERN_ERR "%s, %s = NULL.\n", __FUNCTION__, #p); \
+                    return -ENOSYS; \
+                } \
+            }while(0)
+
+#define check_p(p) check_pfun(p)
+
+#define to_switch_obj(x) container_of(x, struct switch_obj, kobj)
+#define to_switch_attr(x) container_of(x, struct switch_attribute, attr)
+#define to_switch_device_attr(x) container_of(x, struct switch_device_attribute, switch_attr)
+
+#define SWITCH_ATTR(_name, _mode, _show, _store, _type)    \
+        { .switch_attr = __ATTR(_name, _mode, _show, _store),   \
+          .type = _type }
+
+#define SWITCH_DEVICE_ATTR(_name, _mode, _show, _store, _type) \
+struct switch_device_attribute switch_dev_attr_##_name          \
+        = SWITCH_ATTR(_name, _mode, _show, _store, _type)
+
+struct switch_obj {
+    struct kobject kobj;
+    unsigned int index;
+};
+
+/* a custom attribute that works just for a struct switch_obj. */
+struct switch_attribute {
+    struct attribute attr;
+    ssize_t (*show)(struct switch_obj *foo, struct switch_attribute *attr, char *buf);
+    ssize_t (*store)(struct switch_obj *foo, struct switch_attribute *attr, const char *buf, size_t count);
+};
+
+struct switch_device_attribute {
+    struct switch_attribute switch_attr;
+    int type;
+};
+
+extern struct switch_obj *wb_plat_kobject_create(const char *name, struct kobject *parent);
+extern void wb_plat_kobject_delete(struct switch_obj **obj);
+
+#endif /* _PLAT_SWITCH_H_ */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/include/sysfs_common.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/include/sysfs_common.h
new file mode 100644
index 000000000..5b73731e1
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/include/sysfs_common.h
@@ -0,0 +1,90 @@
+#ifndef _SYSFS_COMMON_H_
+#define _SYSFS_COMMON_H_
+
+#include <linux/string.h>
+
+#define mem_clear(data, size) memset((data), 0, (size))
+
+#define DIR_NAME_MAX_LEN        (64)
+
+#define WB_SYSFS_DEV_ERROR         "NA"
+/* sysfs directory name */
+#define FAN_SYSFS_NAME          "fan"
+#define PSU_SYSFS_NAME          "psu"
+#define SLOT_SYSFS_NAME         "slot"
+#define VOLTAGE_SYSFS_NAME      "in"
+#define TEMP_SYSFS_NAME         "temp"
+#define SFF_SYSFS_NAME          "sff"
+
+typedef enum wb_main_dev_type_e {
+    WB_MAIN_DEV_MAINBOARD = 0,
+    WB_MAIN_DEV_FAN       = 1,
+    WB_MAIN_DEV_PSU       = 2,
+    WB_MAIN_DEV_SFF       = 3,
+    WB_MAIN_DEV_CPLD      = 4,
+    WB_MAIN_DEV_SLOT      = 5,
+} wb_main_dev_type_t;
+
+typedef enum wb_minor_dev_type_e {
+    WB_MINOR_DEV_NONE  = 0,    /* None */
+    WB_MINOR_DEV_TEMP  = 1,
+    WB_MINOR_DEV_IN    = 2,
+    WB_MINOR_DEV_CURR  = 3,
+    WB_MINOR_DEV_POWER = 4,
+    WB_MINOR_DEV_MOTOR = 5,
+    WB_MINOR_DEV_PSU   = 6,
+} wb_minor_dev_type_t;
+
+typedef enum wb_sensor_type_e {
+    WB_SENSOR_INPUT    = 0,
+    WB_SENSOR_ALIAS    = 1,
+    WB_SENSOR_TYPE     = 2,
+    WB_SENSOR_MAX      = 3,
+    WB_SENSOR_MAX_HYST = 4,
+    WB_SENSOR_MIN      = 5,
+    WB_SENSOR_CRIT     = 6,
+} wb_sensor_type_t;
+
+typedef enum wb_sff_cpld_attr_e {
+    WB_SFF_POWER_ON      = 0x01,
+    WB_SFF_TX_FAULT,
+    WB_SFF_TX_DIS,
+    WB_SFF_PRE_N,
+    WB_SFF_RX_LOS,
+    WB_SFF_RESET,
+    WB_SFF_LPMODE,
+    WB_SFF_MODULE_PRESENT,
+    WB_SFF_INTERRUPT,
+} wb_sff_cpld_attr_t;
+
+struct switch_drivers_t{
+    /* device */
+    int (*get_dev_number) (unsigned int main_dev_id, unsigned int minor_dev_id);
+    /* fan */
+    int (*get_fan_number) (void);
+    ssize_t (*get_fan_speed) (unsigned int fan_index, unsigned int motor_index, unsigned int *speed);
+    int (*get_fan_pwm) (unsigned int fan_index, unsigned int motor_index, int *pwm);
+    int (*set_fan_pwm) (unsigned int fan_index, unsigned int motor_index, int pwm);
+    int (*get_fan_present_status)(unsigned int fan_index);
+    int (*get_fan_roll_status)(unsigned int fan_index, unsigned int motor_index);
+    int (*get_fan_speed_level)(unsigned int fan_index, unsigned int motor_index, int *level);
+    int (*set_fan_speed_level)(unsigned int fan_index, unsigned int motor_index, int level);
+    /* slot */
+    int (*get_slot_present_status) (unsigned int slot_index);
+    /* sensors */
+    ssize_t (*get_temp_info)( uint8_t main_dev_id, uint8_t dev_index,
+            uint8_t temp_index, uint8_t temp_attr, char *buf);
+    ssize_t (*get_voltage_info)( uint8_t main_dev_id, uint8_t dev_index,
+            uint8_t in_index, uint8_t in_attr, char *buf);
+    /* psu */
+    int (*get_psu_present_status)(unsigned int psu_index);
+    int (*get_psu_output_status)(unsigned int psu_index);
+    int (*get_psu_alert_status)(unsigned int psu_index);
+    /* sff */
+    ssize_t (*get_sff_cpld_info)( unsigned int sff_index, int cpld_reg_type, char *buf, int len);
+    ssize_t (*get_sff_dir_name)(unsigned int sff_index, char *buf, int buf_len);
+};
+
+extern struct switch_drivers_t * dfd_plat_driver_get(void);
+
+#endif /*_SYSFS_COMMON_H_ */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/plat_fan.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/plat_fan.c
new file mode 100644
index 000000000..931c7c243
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/plat_fan.c
@@ -0,0 +1,501 @@
+/*
+ * plat_fan.c
+ *
+ * This module create fan kobjects and attributes in /sys/wb_plat/fan
+ *
+ */
+
+#include <linux/slab.h>
+
+#include "./include/plat_switch.h"
+#include "./include/sysfs_common.h"
+
+#define FAN_INFO(fmt, args...) LOG_INFO("fan: ", fmt, ##args)
+#define FAN_ERR(fmt, args...)  LOG_ERR("fan: ", fmt, ##args)
+#define FAN_DBG(fmt, args...)  LOG_DBG("fan: ", fmt, ##args)
+
+struct motor_obj_t{
+    struct switch_obj *obj;
+};
+
+struct fan_obj_t{
+    unsigned int motor_number;
+    struct motor_obj_t *motor;
+    struct switch_obj *obj;
+};
+
+struct fan_t{
+    unsigned int fan_number;
+    struct fan_obj_t *fan;
+};
+
+static int g_loglevel = 0;
+static struct fan_t g_fan;
+static struct switch_obj *g_fan_obj = NULL;
+static struct switch_drivers_t *g_drv = NULL;
+
+static ssize_t fan_number_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    return (ssize_t)snprintf(buf, PAGE_SIZE, "%d\n", g_fan.fan_number);
+}
+
+static ssize_t fan_motor_number_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int index;
+
+    index = obj->index;
+    FAN_DBG("fan_motor_number_show,fan index:%d\n",index);
+
+    return (ssize_t)snprintf(buf, PAGE_SIZE, "%d\n", g_fan.fan[index-1].motor_number);
+}
+
+static ssize_t fan_roll_status_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int fan_index, motor_index;
+    struct switch_obj *p_obj;
+    int ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_fan_roll_status);
+
+    p_obj = to_switch_obj(obj->kobj.parent);
+    check_p(p_obj);
+
+    fan_index = p_obj->index;
+    motor_index = obj->index;
+
+    ret = g_drv->get_fan_roll_status(fan_index, motor_index);
+    if (ret < 0 ) {
+        return (ssize_t)snprintf(buf, PAGE_SIZE, "%s\n", WB_SYSFS_DEV_ERROR);
+    }
+
+    return (ssize_t)snprintf(buf, PAGE_SIZE, "%d\n", ret);
+}
+
+static ssize_t fan_present_status_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int fan_index;
+    int ret;
+
+    fan_index = obj->index;
+    FAN_DBG("fan_present_status_show, fan index:%d\n",fan_index);
+    check_p(g_drv);
+    check_p(g_drv->get_fan_present_status);
+
+    ret = g_drv->get_fan_present_status(fan_index);
+    if(ret < 0) {
+        return (ssize_t)snprintf(buf, PAGE_SIZE, "%s\n", WB_SYSFS_DEV_ERROR);
+    }
+
+    return (ssize_t)snprintf(buf, PAGE_SIZE, "%d\n", ret);
+}
+
+static ssize_t fan_speed_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int fan_index, motor_index, speed;
+    int ret;
+    struct switch_obj *p_obj;
+
+    check_p(g_drv);
+    check_p(g_drv->get_fan_speed);
+
+    p_obj = to_switch_obj(obj->kobj.parent);
+    check_p(p_obj);
+
+    fan_index = p_obj->index;
+    motor_index = obj->index;
+
+    ret = g_drv->get_fan_speed(fan_index, motor_index, &speed);
+    if(ret < 0) {
+        return (ssize_t)snprintf(buf, PAGE_SIZE, "%s\n", WB_SYSFS_DEV_ERROR);
+    }
+    return (ssize_t)snprintf(buf, PAGE_SIZE, "%d\n", speed);
+}
+
+static ssize_t fan_motor_ratio_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int fan_index, motor_index;
+    struct switch_obj *p_obj;
+    int ret, pwm;
+
+    check_p(g_drv);
+    check_p(g_drv->get_fan_pwm);
+
+    p_obj = to_switch_obj(obj->kobj.parent);
+    check_p(p_obj);
+    fan_index = p_obj->index;
+    motor_index = obj->index;
+    ret = g_drv->get_fan_pwm(fan_index, motor_index, &pwm);
+
+    if (ret < 0 ) {
+        return (ssize_t)snprintf(buf, PAGE_SIZE, "%s\n", WB_SYSFS_DEV_ERROR);
+    }
+    return (ssize_t)snprintf(buf, PAGE_SIZE, "%d\n", pwm);
+}
+
+static ssize_t fan_motor_ratio_store(struct switch_obj *obj, struct switch_attribute *attr,
+                                    const char* buf, size_t count)
+{
+    unsigned int fan_index, motor_index;
+    struct switch_obj *p_obj;
+    int ret, pwm;
+
+    check_p(g_drv);
+    check_p(g_drv->set_fan_pwm);
+
+    p_obj = to_switch_obj(obj->kobj.parent);
+    check_p(p_obj);
+
+    fan_index = p_obj->index;
+    motor_index = obj->index;
+    sscanf(buf, "%d", &pwm);
+
+    if (pwm < 0 || pwm > 100) {
+        FAN_ERR("can not set pwm = %d.\n", pwm);
+        return -EINVAL;
+    }
+    ret = g_drv->set_fan_pwm(fan_index, motor_index, pwm);
+    if (ret < 0) {
+        FAN_ERR("can not set pwm = %d.\n", pwm);
+        return -EIO;
+    }
+    return count;
+}
+
+/************************************fan dir and attrs*******************************************/
+static struct switch_attribute fan_number_att = __ATTR(num_fans, S_IRUGO, fan_number_show, NULL);
+
+static struct attribute *fan_dir_attrs[] = {
+    &fan_number_att.attr,
+    NULL,
+};
+
+static struct attribute_group fan_root_attr_group = {
+    .attrs = fan_dir_attrs,
+};
+
+/*******************************fan1 fan2 dir and attrs*******************************************/
+static struct switch_attribute fan_num_motors_att = __ATTR(num_motors, S_IRUGO, fan_motor_number_show, NULL);
+static struct switch_attribute fan_present_att = __ATTR(present, S_IRUGO, fan_present_status_show, NULL);
+
+static struct attribute *fan_attrs[] = {
+    &fan_num_motors_att.attr,
+    &fan_present_att.attr,
+    NULL,
+};
+
+static struct attribute_group fan_attr_group = {
+    .attrs = fan_attrs,
+};
+
+/*******************************motor0 motor1 dir and attrs*******************************************/
+static struct switch_attribute motor_speed_att = __ATTR(speed, S_IRUGO, fan_speed_show, NULL);
+static struct switch_attribute motor_status_att = __ATTR(status, S_IRUGO, fan_roll_status_show, NULL);
+static struct switch_attribute motor_ratio_att = __ATTR(ratio, S_IRUGO | S_IWUSR, fan_motor_ratio_show, fan_motor_ratio_store);
+
+static struct attribute *motor_attrs[] = {
+    &motor_speed_att.attr,
+    &motor_status_att.attr,
+    &motor_ratio_att.attr,
+    NULL,
+};
+
+static struct attribute_group motor_attr_group = {
+    .attrs = motor_attrs,
+};
+
+static void fanindex_single_motor_remove_kobj_and_attrs(struct fan_obj_t * curr_fan, unsigned int motor_index)
+{
+    struct motor_obj_t *curr_motor; /* point to motor0 motor1...*/
+
+    curr_motor = &curr_fan->motor[motor_index];
+    if (curr_motor->obj) {
+        sysfs_remove_group(&curr_motor->obj->kobj, &motor_attr_group);
+        wb_plat_kobject_delete(&curr_motor->obj);
+        FAN_DBG("delete fan:%d motor%d.\n", curr_fan->obj->index, motor_index);
+    }
+    return;
+}
+
+static int fanindex_single_motor_create_kobj_and_attrs(struct fan_obj_t * curr_fan, unsigned int motor_index)
+{
+    char name[DIR_NAME_MAX_LEN];
+    struct motor_obj_t *curr_motor; /* point to motor0 motor1...*/
+
+    FAN_DBG("create fan_index:%d, motor%d ...\n", curr_fan->obj->index, motor_index);
+
+    curr_motor = &curr_fan->motor[motor_index];
+    mem_clear(name, sizeof(name));
+    snprintf(name, sizeof(name), "motor%d", motor_index);
+    curr_motor->obj = wb_plat_kobject_create(name, &curr_fan->obj->kobj);
+    if (!curr_motor->obj) {
+        FAN_ERR("create fan_index:%d, motor%d object error!\n", curr_fan->obj->index, motor_index);
+        return -EBADRQC;
+    }
+    curr_motor->obj->index = motor_index;
+    if (sysfs_create_group(&curr_motor->obj->kobj, &motor_attr_group) != 0) {
+        FAN_ERR("create fan_index:%d, motor%d attrs error.\n", curr_fan->obj->index, motor_index);
+        wb_plat_kobject_delete(&curr_motor->obj);
+        return -EBADRQC;
+    }
+    FAN_DBG("create fan_index:%d, motor%d ok.\n", curr_fan->obj->index, motor_index);
+    return 0;
+}
+
+static int fanindex_motor_create_kobj_and_attrs(struct fan_obj_t * curr_fan, int motor_num)
+{
+    int motor_index, i;
+
+    curr_fan->motor = kzalloc(sizeof(struct motor_obj_t) * motor_num, GFP_KERNEL);
+    if (!curr_fan->motor) {
+        FAN_ERR("kzalloc motor error, fan index = %d, motor number = %d.\n", curr_fan->obj->index, motor_num);
+        return -ENOMEM;
+    }
+    curr_fan->motor_number = motor_num;
+    for (motor_index = 0; motor_index < motor_num; motor_index++) {
+        if (fanindex_single_motor_create_kobj_and_attrs(curr_fan, motor_index) != 0) {
+            goto motor_error;
+        }
+    }
+    return 0;
+motor_error:
+    for(i = motor_index - 1; i >= 0; i--) {
+        fanindex_single_motor_remove_kobj_and_attrs(curr_fan, i);
+    }
+    if(curr_fan->motor) {
+        kfree(curr_fan->motor);
+        curr_fan->motor = NULL;
+    }
+    return -EBADRQC;
+}
+
+static void fanindex_motor_remove_kobj_and_attrs(struct fan_obj_t *curr_fan, int motor_num)
+{
+    int motor_index;
+
+    for (motor_index = motor_num - 1; motor_index >= 0; motor_index--) {
+        fanindex_single_motor_remove_kobj_and_attrs(curr_fan, motor_index);
+    }
+    return;
+}
+
+static int fan_motor_create(void)
+{
+    int fan_num, motor_num;
+    unsigned int fan_index, i;
+    struct fan_obj_t *curr_fan;     /* point to fan1 fan2...*/
+
+    check_p(g_drv->get_dev_number);
+
+    motor_num = g_drv->get_dev_number(WB_MAIN_DEV_FAN, WB_MINOR_DEV_MOTOR);
+    if (motor_num <= 0) {
+        FAN_ERR("get fan motor number error, motor_num:%d error.\n", motor_num);
+        return -ENODEV;
+    }
+
+    fan_num = g_fan.fan_number;
+    for (fan_index = 1; fan_index <= fan_num; fan_index++) {
+        curr_fan = &g_fan.fan[fan_index - 1];
+        if (fanindex_motor_create_kobj_and_attrs(curr_fan, motor_num) != 0) {
+            goto error;
+        }
+    }
+    return 0;
+error:
+    for (i = fan_index - 1; i > 0; i--) {
+        curr_fan = &g_fan.fan[i - 1];
+        motor_num = curr_fan->motor_number;
+        fanindex_motor_remove_kobj_and_attrs(curr_fan, motor_num);
+    }
+    return -EBADRQC;
+}
+
+static void fan_motor_remove(void)
+{
+    unsigned int fan_index;
+    struct fan_obj_t *curr_fan;
+
+    if (g_fan.fan) {
+       for (fan_index = g_fan.fan_number; fan_index > 0; fan_index--) {
+           curr_fan = &g_fan.fan[fan_index - 1];
+           if (curr_fan->motor) {
+               fanindex_motor_remove_kobj_and_attrs(curr_fan, curr_fan->motor_number);
+               kfree(curr_fan->motor);
+               curr_fan->motor = NULL;
+               curr_fan->motor_number = 0;
+           }
+       }
+    }
+    return;
+}
+
+static void fan_sub_single_remove_kobj_and_attrs(unsigned int index)
+{
+    struct fan_obj_t *curr_fan;
+
+    curr_fan = &g_fan.fan[index - 1];
+    if (curr_fan->obj) {
+        sysfs_remove_group(&curr_fan->obj->kobj, &fan_attr_group);
+        wb_plat_kobject_delete(&curr_fan->obj);
+        FAN_DBG("delete fan%d.\n", index);
+    }
+    return;
+}
+
+static int fan_sub_single_create_kobj_and_attrs(struct kobject *parent, unsigned int index)
+{
+    char name[DIR_NAME_MAX_LEN];
+    struct fan_obj_t *curr_fan;
+
+    curr_fan = &g_fan.fan[index - 1];
+    FAN_DBG("create fan%d ...\n", index);
+    mem_clear(name, sizeof(name));
+    snprintf(name, sizeof(name), "fan%d", index);
+    curr_fan->obj = wb_plat_kobject_create(name, parent);
+    if (!curr_fan->obj) {
+        FAN_ERR("create fan%d object error!\n", index);
+        return -EBADRQC;
+    }
+    curr_fan->obj->index = index;
+    if (sysfs_create_group(&curr_fan->obj->kobj, &fan_attr_group) != 0) {
+        FAN_ERR("create fan%d attrs error.\n", index);
+        wb_plat_kobject_delete(&curr_fan->obj);
+        return -EBADRQC;
+    }
+    FAN_DBG("create fan%d ok.\n", index);
+    return 0;
+}
+
+static int fan_sub_create_kobj_and_attrs(struct kobject *parent, int fan_num)
+{
+    unsigned int fan_index, i;
+
+    g_fan.fan = kzalloc(sizeof(struct fan_obj_t) * fan_num, GFP_KERNEL);
+    if (!g_fan.fan) {
+        FAN_ERR("kzalloc fan.fan error, fan number = %d.\n", fan_num);
+        return -ENOMEM;
+    }
+
+    for (fan_index = 1; fan_index <= fan_num; fan_index++) {
+        if(fan_sub_single_create_kobj_and_attrs(parent, fan_index) != 0 ) {
+            goto error;
+        }
+    }
+    return 0;
+error:
+    for (i = fan_index - 1; i > 0; i--) {
+        fan_sub_single_remove_kobj_and_attrs(i);
+    }
+    if (g_fan.fan) {
+        kfree(g_fan.fan);
+        g_fan.fan = NULL;
+    }
+    return -EBADRQC;
+}
+
+static int fan_sub_create(void)
+{
+    int ret, fan_num;
+
+    check_p(g_drv->get_dev_number);
+    fan_num = g_drv->get_dev_number(WB_MAIN_DEV_FAN, WB_MINOR_DEV_NONE);
+    if (fan_num < 0) {
+        FAN_ERR("fan number = %d error.\n", fan_num);
+        return -EINVAL;
+    }
+    g_fan.fan_number = fan_num;
+    ret = fan_sub_create_kobj_and_attrs(&g_fan_obj->kobj, fan_num);
+    return ret;
+}
+
+static void fan_sub_remove(void)
+{
+    unsigned int fan_index;
+
+    if (g_fan.fan) {
+       for (fan_index = g_fan.fan_number; fan_index > 0; fan_index--) {
+           fan_sub_single_remove_kobj_and_attrs(fan_index);
+       }
+       kfree(g_fan.fan);
+    }
+    mem_clear(&g_fan, sizeof(struct fan_t));
+    return;
+}
+
+static int fan_root_create(void)
+{
+    g_fan_obj = wb_plat_kobject_create("fan", NULL);
+    if (!g_fan_obj) {
+        FAN_ERR("wb_plat_kobject_create fan error!\n");
+        return -ENOMEM;
+    }
+
+    if (sysfs_create_group(&g_fan_obj->kobj, &fan_root_attr_group) != 0) {
+        wb_plat_kobject_delete(&g_fan_obj);
+        FAN_ERR("create fan dir attrs error!\n");
+        return -EBADRQC;
+    }
+    FAN_DBG("wb_plat_kobject_create fan directory and attribute success.\n");
+    return 0;
+}
+
+static void fan_root_remove(void)
+{
+    if (g_fan_obj) {
+        sysfs_remove_group(&g_fan_obj->kobj, &fan_root_attr_group);
+        wb_plat_kobject_delete(&g_fan_obj);
+        FAN_DBG("delete fan root success\n");
+    }
+
+    return;
+}
+
+static int fan_init(void)
+{
+    int ret;
+
+    FAN_INFO("fan_init...\n");
+    g_drv = dfd_plat_driver_get();
+    check_p(g_drv);
+
+    ret = fan_root_create();
+    if (ret < 0) {
+        goto fan_root_error;
+    }
+
+    ret = fan_sub_create();
+    if (ret < 0) {
+        goto fan_sub_error;
+    }
+
+    ret = fan_motor_create();
+    if (ret < 0) {
+        goto fan_motor_error;
+    }
+
+    FAN_INFO("fan_init ok.\n");
+    return 0;
+fan_motor_error:
+    fan_sub_remove();
+fan_sub_error:
+    fan_root_remove();
+fan_root_error:
+    return ret;
+}
+
+static void fan_exit(void)
+{
+    fan_motor_remove();
+    fan_sub_remove();
+    fan_root_remove();
+    FAN_INFO("fan_exit ok.\n");
+    return ;
+}
+
+module_init(fan_init);
+module_exit(fan_exit);
+module_param(g_loglevel, int, 0644);
+MODULE_PARM_DESC(g_loglevel, "the log level(info=0x1, err=0x2, dbg=0x4).\n");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
+MODULE_DESCRIPTION("fan sysfs driver");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/plat_psu.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/plat_psu.c
new file mode 100644
index 000000000..197f94b64
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/plat_psu.c
@@ -0,0 +1,426 @@
+/*
+ * plat_psu.c
+ *
+ * This module create psu kobjects and attributes in /sys/wb_plat/psu
+ *
+ */
+
+#include <linux/slab.h>
+
+#include "./include/plat_switch.h"
+#include "./include/sysfs_common.h"
+
+#define PSU_INFO(fmt, args...) LOG_INFO("psu: ", fmt, ##args)
+#define PSU_ERR(fmt, args...)  LOG_ERR("psu: ", fmt, ##args)
+#define PSU_DBG(fmt, args...)  LOG_DBG("psu: ", fmt, ##args)
+
+struct temp_obj_t{
+    struct switch_obj *obj;
+};
+
+struct psu_obj_t{
+    unsigned int temp_number;
+    struct temp_obj_t *temp;
+    struct switch_obj *obj;
+};
+
+struct psu_t{
+    unsigned int psu_number;
+    struct psu_obj_t *psu;
+};
+
+static int g_loglevel = 0;
+static struct psu_t g_psu;
+static struct switch_obj *g_psu_obj = NULL;
+static struct switch_drivers_t *g_drv = NULL;
+
+static ssize_t psu_number_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    return (ssize_t)snprintf(buf, PAGE_SIZE, "%d\n", g_psu.psu_number);
+}
+
+static ssize_t psu_present_status_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int psu_index;
+    int ret;
+
+    psu_index = obj->index;
+    PSU_DBG("psu_present_status_show, psu index:%d\n",psu_index);
+    check_p(g_drv);
+    check_p(g_drv->get_psu_present_status);
+
+    ret = g_drv->get_psu_present_status(psu_index);
+    if(ret < 0) {
+        return (ssize_t)snprintf(buf, PAGE_SIZE, "%s\n", WB_SYSFS_DEV_ERROR);
+    }
+
+    return (ssize_t)snprintf(buf, PAGE_SIZE, "%d\n", ret);
+}
+
+static ssize_t psu_output_status_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int psu_index;
+    int ret;
+
+    psu_index = obj->index;
+    PSU_DBG("psu_output_status_show, psu index:%d\n",psu_index);
+    check_p(g_drv);
+    check_p(g_drv->get_psu_output_status);
+
+    ret = g_drv->get_psu_output_status(psu_index);
+    if(ret < 0) {
+        return (ssize_t)snprintf(buf, PAGE_SIZE, "%s\n", WB_SYSFS_DEV_ERROR);
+    }
+
+    return (ssize_t)snprintf(buf, PAGE_SIZE, "%d\n", ret);
+}
+
+static ssize_t psu_alert_status_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int psu_index;
+    int ret;
+
+    psu_index = obj->index;
+    PSU_DBG("psu_alert_status_show, psu index:%d\n",psu_index);
+    check_p(g_drv);
+    check_p(g_drv->get_psu_alert_status);
+
+    ret = g_drv->get_psu_alert_status(psu_index);
+    if(ret < 0) {
+        return (ssize_t)snprintf(buf, PAGE_SIZE, "%s\n", WB_SYSFS_DEV_ERROR);
+    }
+
+    return (ssize_t)snprintf(buf, PAGE_SIZE, "%d\n", ret);
+}
+
+/************************************psu dir and attrs*******************************************/
+static struct switch_attribute psu_number_att = __ATTR(num_psus, S_IRUGO, psu_number_show, NULL);
+
+static struct attribute *psu_dir_attrs[] = {
+    &psu_number_att.attr,
+    NULL,
+};
+
+static struct attribute_group psu_root_attr_group = {
+    .attrs = psu_dir_attrs,
+};
+
+/*******************************psu1 psu2 dir and attrs*******************************************/
+static struct switch_attribute psu_present_status_att = __ATTR(present, S_IRUGO, psu_present_status_show, NULL);
+static struct switch_attribute psu_output_status_att = __ATTR(output, S_IRUGO, psu_output_status_show, NULL);
+static struct switch_attribute psu_alert_status_att = __ATTR(alert, S_IRUGO, psu_alert_status_show, NULL);
+
+static struct attribute *psu_attrs[] = {
+    &psu_present_status_att.attr,
+    &psu_output_status_att.attr,
+    &psu_alert_status_att.attr,
+    NULL,
+};
+
+static struct attribute_group psu_attr_group = {
+    .attrs = psu_attrs,
+};
+
+/*******************************psu temp0 temp1 dir and attrs*******************************************/
+static struct attribute *psu_temp_attrs[] = {
+    NULL,
+};
+
+static struct attribute_group psu_temp_attr_group = {
+    .attrs = psu_temp_attrs,
+};
+
+static void psuindex_single_temp_remove_kobj_and_attrs(struct psu_obj_t * curr_psu, unsigned int temp_index)
+{
+
+    struct temp_obj_t *curr_temp; /* point to temp0 temp1...*/
+
+    curr_temp = &curr_psu->temp[temp_index];
+    if (curr_temp->obj) {
+        sysfs_remove_group(&curr_temp->obj->kobj, &psu_temp_attr_group);
+        wb_plat_kobject_delete(&curr_temp->obj);
+        PSU_DBG("delete psu:%d temp%d.\n", curr_psu->obj->index, temp_index);
+    }
+    return;
+}
+
+static int psuindex_single_temp_create_kobj_and_attrs(struct psu_obj_t * curr_psu, unsigned int temp_index)
+{
+    char name[DIR_NAME_MAX_LEN];
+    struct temp_obj_t *curr_temp; /* point to temp0 temp1...*/
+
+    PSU_DBG("create psu_index:%d, temp%d ...\n", curr_psu->obj->index, temp_index);
+
+    curr_temp = &curr_psu->temp[temp_index];
+    mem_clear(name, sizeof(name));
+    snprintf(name, sizeof(name), "temp%d", temp_index);
+    curr_temp->obj = wb_plat_kobject_create(name, &curr_psu->obj->kobj);
+    if (!curr_temp->obj) {
+        PSU_ERR("create psu_index:%d, temp%d object error!\n", curr_psu->obj->index, temp_index);
+        return -EBADRQC;
+    }
+    curr_temp->obj->index = temp_index;
+    if (sysfs_create_group(&curr_temp->obj->kobj, &psu_temp_attr_group) != 0) {
+        PSU_ERR("create psu_index:%d, temp%d attrs error.\n", curr_psu->obj->index, temp_index);
+        wb_plat_kobject_delete(&curr_temp->obj);
+        return -EBADRQC;
+    }
+    PSU_DBG("create psu_index:%d, temp%d ok.\n", curr_psu->obj->index, temp_index);
+    return 0;
+}
+
+static int psuindex_temp_create_kobj_and_attrs(struct psu_obj_t * curr_psu, int temp_num)
+{
+    int temp_index, i;
+
+    curr_psu->temp = kzalloc(sizeof(struct temp_obj_t) * temp_num, GFP_KERNEL);
+    if (!curr_psu->temp) {
+        PSU_ERR("kzalloc temp error, psu index = %d, temp number = %d.\n", curr_psu->obj->index, temp_num);
+        return -ENOMEM;
+    }
+    curr_psu->temp_number = temp_num;
+    for (temp_index = 0; temp_index < temp_num; temp_index++) {
+        if (psuindex_single_temp_create_kobj_and_attrs(curr_psu, temp_index) != 0) {
+            goto temp_error;
+        }
+    }
+    return 0;
+temp_error:
+    for (i = temp_index - 1; i >= 0; i--) {
+        psuindex_single_temp_remove_kobj_and_attrs(curr_psu, i);
+    }
+    if (curr_psu->temp) {
+        kfree(curr_psu->temp);
+        curr_psu->temp = NULL;
+    }
+    return -EBADRQC;
+}
+
+static void psuindex_temp_remove_kobj_and_attrs(struct psu_obj_t * curr_psu, int temp_num)
+{
+    unsigned int temp_index;
+
+    for (temp_index = temp_num - 1; temp_index >= 0; temp_index--) {
+        psuindex_single_temp_remove_kobj_and_attrs(curr_psu, temp_index);
+    }
+    return;
+}
+
+static int psu_temp_create(void)
+{
+    int psu_num, temp_num;
+    unsigned int psu_index, i;
+    struct psu_obj_t *curr_psu;     /* point to psu1 psu2...*/
+
+    check_p(g_drv->get_dev_number);
+    temp_num = g_drv->get_dev_number(WB_MAIN_DEV_PSU, WB_MINOR_DEV_TEMP);
+    if (temp_num <= 0) {
+        PSU_INFO("psu temp_num:%d, don't need creat temp directory.\n", temp_num);
+        return 0;
+    }
+
+    psu_num = g_psu.psu_number;
+    for(psu_index = 1; psu_index <= psu_num; psu_index++) {
+        curr_psu = &g_psu.psu[psu_index - 1];
+        if(psuindex_temp_create_kobj_and_attrs(curr_psu, temp_num) != 0) {
+            goto error;
+        }
+    }
+    return 0;
+error:
+    for(i = psu_index - 1; i > 0; i--) {
+        curr_psu = &g_psu.psu[i - 1];
+        temp_num = curr_psu->temp_number;
+        psuindex_temp_remove_kobj_and_attrs(curr_psu, temp_num);
+    }
+    return -EBADRQC;
+}
+
+static void psu_temp_remove(void)
+{
+    unsigned int psu_index;
+    struct psu_obj_t *curr_psu;
+
+    if (g_psu.psu) {
+       for (psu_index = g_psu.psu_number; psu_index > 0; psu_index--) {
+           curr_psu = &g_psu.psu[psu_index - 1];
+           if (curr_psu->temp) {
+               psuindex_temp_remove_kobj_and_attrs(curr_psu,curr_psu->temp_number);
+               kfree(curr_psu->temp);
+               curr_psu->temp = NULL;
+               curr_psu->temp_number = 0;
+           }
+       }
+    }
+    return;
+}
+
+static void psu_sub_single_remove_kobj_and_attrs(unsigned int index)
+{
+    struct psu_obj_t *curr_psu;
+
+    curr_psu = &g_psu.psu[index - 1];
+    if (curr_psu->obj) {
+        sysfs_remove_group(&curr_psu->obj->kobj, &psu_attr_group);
+        wb_plat_kobject_delete(&curr_psu->obj);
+        PSU_DBG("delete psu%d.\n", index);
+    }
+    return;
+}
+
+static int psu_sub_single_create_kobj_and_attrs(struct kobject *parent, unsigned int index)
+{
+    char name[DIR_NAME_MAX_LEN];
+    struct psu_obj_t *curr_psu;
+
+    curr_psu = &g_psu.psu[index-1];
+    PSU_DBG("create psu%d ...\n", index);
+    mem_clear(name, sizeof(name));
+    snprintf(name, sizeof(name), "%s%d",PSU_SYSFS_NAME, index);
+    curr_psu->obj = wb_plat_kobject_create(name, parent);
+    if (!curr_psu->obj) {
+        PSU_ERR("create psu%d object error!\n", index);
+        return -EBADRQC;
+    }
+    curr_psu->obj->index = index;
+    if (sysfs_create_group(&curr_psu->obj->kobj, &psu_attr_group) != 0) {
+        PSU_ERR("create psu%d attrs error.\n", index);
+        wb_plat_kobject_delete(&curr_psu->obj);
+        return -EBADRQC;
+    }
+    PSU_DBG("create psu%d ok.\n", index);
+    return 0;
+}
+
+static int psu_sub_create_kobj_and_attrs(struct kobject *parent, int psu_num)
+{
+    unsigned int psu_index, i;
+
+    g_psu.psu = kzalloc(sizeof(struct psu_obj_t) * psu_num, GFP_KERNEL);
+    if (!g_psu.psu) {
+        PSU_ERR("kzalloc psu.psu error, psu number = %d.\n", psu_num);
+        return -ENOMEM;
+    }
+
+    for (psu_index = 1; psu_index <= psu_num; psu_index++) {
+        if (psu_sub_single_create_kobj_and_attrs(parent, psu_index) != 0) {
+            goto error;
+        }
+    }
+    return 0;
+error:
+    for(i = psu_index - 1; i > 0; i--) {
+        psu_sub_single_remove_kobj_and_attrs(i);
+    }
+    if(g_psu.psu) {
+        kfree(g_psu.psu);
+        g_psu.psu = NULL;
+    }
+    return -EBADRQC;
+}
+
+static int psu_sub_create(void)
+{
+    int ret, psu_num;
+
+    check_p(g_drv->get_dev_number);
+    psu_num = g_drv->get_dev_number(WB_MAIN_DEV_PSU, WB_MINOR_DEV_NONE);
+    if (psu_num < 0) {
+        PSU_ERR("psu number = %d error.\n", psu_num);
+        return -EINVAL;
+    }
+    g_psu.psu_number = psu_num;
+    ret = psu_sub_create_kobj_and_attrs(&g_psu_obj->kobj, psu_num);
+    return ret;
+}
+
+static void psu_sub_remove(void)
+{
+    unsigned int psu_index;
+
+    if (g_psu.psu) {
+       for (psu_index = g_psu.psu_number; psu_index > 0; psu_index--) {
+           psu_sub_single_remove_kobj_and_attrs(psu_index);
+       }
+       kfree(g_psu.psu);
+    }
+    mem_clear(&g_psu, sizeof(struct psu_t));
+    return ;
+}
+
+static int psu_root_create(void)
+{
+    g_psu_obj = wb_plat_kobject_create(PSU_SYSFS_NAME, NULL);
+    if (!g_psu_obj) {
+        PSU_ERR("wb_plat_kobject_create psu error!\n");
+        return -ENOMEM;
+    }
+
+    if (sysfs_create_group(&g_psu_obj->kobj, &psu_root_attr_group) != 0) {
+        wb_plat_kobject_delete(&g_psu_obj);
+        PSU_ERR("create psu dir attrs error!\n");
+        return -EBADRQC;
+    }
+    PSU_DBG("wb_plat_kobject_create psu directory and attribute success.\n");
+    return 0;
+}
+
+static void psu_root_remove(void)
+{
+    if (g_psu_obj) {
+        sysfs_remove_group(&g_psu_obj->kobj, &psu_root_attr_group);
+        wb_plat_kobject_delete(&g_psu_obj);
+        PSU_DBG("delete psu root success\n");
+    }
+    return;
+}
+
+static int wb_psu_init(void)
+{
+    int ret;
+
+    PSU_INFO("wb_psu_init...\n");
+    g_drv = dfd_plat_driver_get();
+    check_p(g_drv);
+
+    ret = psu_root_create();
+    if (ret < 0) {
+        goto psu_root_error;
+    }
+
+    ret = psu_sub_create();
+    if (ret < 0) {
+        goto psu_sub_error;
+    }
+
+    ret = psu_temp_create();
+    if (ret < 0) {
+        goto psu_temp_error;
+    }
+
+    PSU_INFO("wb_psu_init ok.\n");
+    return 0;
+psu_temp_error:
+    psu_sub_remove();
+psu_sub_error:
+    psu_root_remove();
+psu_root_error:
+    return ret;
+}
+
+static void wb_psu_exit(void)
+{
+    psu_temp_remove();
+    psu_sub_remove();
+    psu_root_remove();
+    PSU_INFO("wb_psu_exit ok.\n");
+    return ;
+}
+
+module_init(wb_psu_init);
+module_exit(wb_psu_exit);
+module_param(g_loglevel, int, 0644);
+MODULE_PARM_DESC(g_loglevel, "the log level(info=0x1, err=0x2, dbg=0x4).\n");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
+MODULE_DESCRIPTION("psu sysfs driver");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/plat_sensor.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/plat_sensor.c
new file mode 100644
index 000000000..aaf62f4c1
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/plat_sensor.c
@@ -0,0 +1,452 @@
+/*
+ * plat_sensor.c
+ *
+ * This module create sensor kobjects and attributes in /sys/wb_plat/sensor
+ */
+
+#include <linux/slab.h>
+
+#include "./include/plat_switch.h"
+#include "./include/sysfs_common.h"
+
+#define SENSOR_INFO(fmt, args...) LOG_INFO("sensor: ", fmt, ##args)
+#define SENSOR_ERR(fmt, args...)  LOG_ERR("sensor: ", fmt, ##args)
+#define SENSOR_DBG(fmt, args...)  LOG_DBG("sensor: ", fmt, ##args)
+
+struct sensor_t {
+    unsigned int in_number;
+    unsigned int temp_number;
+    struct sensor_in_t *in;
+    struct sensor_temp_t *temp;
+};
+
+struct sensor_temp_t {
+    struct switch_obj *obj;
+};
+
+struct sensor_in_t {
+    struct switch_obj *obj;
+};
+
+static int g_loglevel = 0;
+static struct switch_drivers_t *g_drv = NULL;
+static struct sensor_t g_sensor;
+static struct switch_obj *g_sensor_obj = NULL;
+
+static ssize_t sensor_temp_number_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    return (ssize_t)snprintf(buf, PAGE_SIZE, "%d\n", g_sensor.temp_number);
+}
+
+static ssize_t sensor_in_number_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    return (ssize_t)snprintf(buf, PAGE_SIZE, "%d\n", g_sensor.in_number);
+}
+
+static ssize_t sensor_voltage_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int in_index;
+    int ret;
+    struct switch_device_attribute *in_attr;
+
+    check_p(g_drv);
+    check_p(g_drv->get_voltage_info);
+    in_index = obj->index;
+
+    in_attr = to_switch_device_attr(attr);
+    check_p(in_attr);
+    SENSOR_DBG("sensor_in_show, in index:0x%x, in type:0x%x\n",in_index, in_attr->type);
+    ret = g_drv->get_voltage_info(WB_MAIN_DEV_MAINBOARD, WB_MINOR_DEV_NONE, in_index, in_attr->type, buf);
+    if (ret < 0) {
+        return (ssize_t)snprintf(buf, PAGE_SIZE, "%s\n", WB_SYSFS_DEV_ERROR);
+    }
+    return ret;
+}
+
+static ssize_t sensor_temp_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int temp_index;
+    int ret;
+    struct switch_device_attribute *temp_attr;
+
+    check_p(g_drv);
+    check_p(g_drv->get_temp_info);
+    temp_index = obj->index;
+
+    temp_attr = to_switch_device_attr(attr);
+    check_p(temp_attr);
+    SENSOR_DBG("sensor_temp_show, temp index:0x%x, temp type:0x%x\n", temp_index, temp_attr->type);
+    ret = g_drv->get_temp_info(WB_MAIN_DEV_MAINBOARD, WB_MINOR_DEV_NONE, temp_index, temp_attr->type, buf);
+    if (ret < 0) {
+        return (ssize_t)snprintf(buf, PAGE_SIZE, "%s\n", WB_SYSFS_DEV_ERROR);
+    }
+    return ret;
+}
+
+/************************************sensor dir and attrs*******************************************/
+static struct switch_attribute num_temp_att = __ATTR(num_temp_sensors, S_IRUGO, sensor_temp_number_show, NULL);
+static struct switch_attribute num_in_att = __ATTR(num_in_sensors, S_IRUGO, sensor_in_number_show, NULL);
+
+static struct attribute *sensor_dir_attrs[] = {
+    &num_temp_att.attr,
+    &num_in_att.attr,
+    NULL,
+};
+
+static struct attribute_group sensor_root_attr_group = {
+    .attrs = sensor_dir_attrs,
+};
+
+/*******************************temp0 temp1 dir and attrs*******************************************/
+static SWITCH_DEVICE_ATTR(temp_input, S_IRUGO, sensor_temp_show, NULL, WB_SENSOR_INPUT);
+static SWITCH_DEVICE_ATTR(temp_alias, S_IRUGO, sensor_temp_show, NULL, WB_SENSOR_ALIAS);
+static SWITCH_DEVICE_ATTR(temp_type, S_IRUGO, sensor_temp_show, NULL, WB_SENSOR_TYPE);
+static SWITCH_DEVICE_ATTR(temp_max, S_IRUGO, sensor_temp_show, NULL, WB_SENSOR_MAX);
+static SWITCH_DEVICE_ATTR(temp_max_hyst, S_IRUGO, sensor_temp_show, NULL, WB_SENSOR_MAX_HYST);
+static SWITCH_DEVICE_ATTR(temp_min, S_IRUGO, sensor_temp_show, NULL, WB_SENSOR_MIN);
+
+static struct attribute *sensor_temp_attrs[] = {
+    &switch_dev_attr_temp_input.switch_attr.attr,
+    &switch_dev_attr_temp_alias.switch_attr.attr,
+    &switch_dev_attr_temp_type.switch_attr.attr,
+    &switch_dev_attr_temp_max.switch_attr.attr,
+    &switch_dev_attr_temp_max_hyst.switch_attr.attr,
+    &switch_dev_attr_temp_min.switch_attr.attr,
+    NULL,
+};
+
+static struct attribute_group sensor_temp_attr_group = {
+    .attrs = sensor_temp_attrs,
+};
+
+/*******************************in0 in1 dir and attrs*******************************************/
+static SWITCH_DEVICE_ATTR(in_input, S_IRUGO, sensor_voltage_show, NULL, WB_SENSOR_INPUT);
+static SWITCH_DEVICE_ATTR(in_alias, S_IRUGO, sensor_voltage_show, NULL, WB_SENSOR_ALIAS);
+static SWITCH_DEVICE_ATTR(in_type, S_IRUGO, sensor_voltage_show, NULL, WB_SENSOR_TYPE);
+static SWITCH_DEVICE_ATTR(in_max, S_IRUGO, sensor_voltage_show, NULL, WB_SENSOR_MAX);
+static SWITCH_DEVICE_ATTR(in_min, S_IRUGO, sensor_voltage_show, NULL, WB_SENSOR_MIN);
+static SWITCH_DEVICE_ATTR(in_crit, S_IRUGO, sensor_voltage_show, NULL, WB_SENSOR_CRIT);
+
+static struct attribute *sensor_in_attrs[] = {
+    &switch_dev_attr_in_input.switch_attr.attr,
+    &switch_dev_attr_in_alias.switch_attr.attr,
+    &switch_dev_attr_in_type.switch_attr.attr,
+    &switch_dev_attr_in_max.switch_attr.attr,
+    &switch_dev_attr_in_min.switch_attr.attr,
+    &switch_dev_attr_in_crit.switch_attr.attr,
+    NULL,
+};
+
+static struct attribute_group sensor_in_attr_group = {
+    .attrs = sensor_in_attrs,
+};
+
+static int sensor_in_sub_single_create_kobj_and_attrs(struct kobject *parent, unsigned int index)
+{
+    char name[DIR_NAME_MAX_LEN];
+    struct sensor_in_t *curr_sensor;
+
+    curr_sensor = &g_sensor.in[index - 1];
+    SENSOR_DBG("create sensor in%d ...\n", index);
+    mem_clear(name, sizeof(name));
+    snprintf(name, sizeof(name), "in%d", index);
+    curr_sensor->obj = wb_plat_kobject_create(name, parent);
+    if (!curr_sensor->obj) {
+        SENSOR_ERR("create sensor in%d object error!\n", index);
+        return -EBADRQC;
+    }
+    curr_sensor->obj->index = index;
+    if (sysfs_create_group(&curr_sensor->obj->kobj, &sensor_in_attr_group) != 0) {
+        SENSOR_ERR("create sensor in%d attrs error.\n", index);
+        wb_plat_kobject_delete(&curr_sensor->obj);
+        return -EBADRQC;
+    }
+    SENSOR_DBG("create sensor in%d ok.\n", index);
+    return 0;
+
+}
+
+static void sensor_in_sub_single_remove_kobj_and_attrs(unsigned int index)
+{
+    struct sensor_in_t *curr_in;
+
+    curr_in = &g_sensor.in[index - 1];
+    if (curr_in->obj) {
+        sysfs_remove_group(&curr_in->obj->kobj, &sensor_in_attr_group);
+        wb_plat_kobject_delete(&curr_in->obj);
+        SENSOR_DBG("delete in%d.\n", index);
+    }
+    return;
+}
+
+static int sensor_temp_sub_single_create_kobj_and_attrs(struct kobject *parent, unsigned int index)
+{
+    char name[DIR_NAME_MAX_LEN];
+    struct sensor_temp_t *curr_sensor;
+
+    curr_sensor = &g_sensor.temp[index - 1];
+    SENSOR_DBG("create sensor temp%d ...\n", index);
+    mem_clear(name, sizeof(name));
+    snprintf(name, sizeof(name), "temp%d", index);
+    curr_sensor->obj = wb_plat_kobject_create(name, parent);
+    if (!curr_sensor->obj) {
+        SENSOR_ERR("create sensor temp%d object error!\n", index);
+        return -EBADRQC;
+    }
+    curr_sensor->obj->index = index;
+    if (sysfs_create_group(&curr_sensor->obj->kobj, &sensor_temp_attr_group) != 0) {
+        SENSOR_ERR("create sensor temp%d attrs error.\n", index);
+        wb_plat_kobject_delete(&curr_sensor->obj);
+        return -EBADRQC;
+    }
+    SENSOR_DBG("create sensor temp%d ok.\n", index);
+    return 0;
+
+}
+
+static void sensor_temp_sub_single_remove_kobj_and_attrs(unsigned int index)
+{
+    struct sensor_temp_t *curr_temp;
+
+    curr_temp = &g_sensor.temp[index - 1];
+    if (curr_temp->obj) {
+        sysfs_remove_group(&curr_temp->obj->kobj, &sensor_temp_attr_group);
+        wb_plat_kobject_delete(&curr_temp->obj);
+        SENSOR_DBG("delete temp%d.\n", index);
+    }
+    return;
+}
+
+static int sensor_temp_sub_create_kobj_and_attrs(struct kobject *parent, int temp_num)
+{
+    unsigned int temp_index, i;
+
+    g_sensor.temp = kzalloc(sizeof(struct sensor_temp_t) * temp_num, GFP_KERNEL);
+    if (!g_sensor.temp ) {
+        SENSOR_ERR("kzalloc g_sensor.temp error, temp number = %d.\n", temp_num);
+        return -ENOMEM;
+    }
+    for (temp_index = 1; temp_index <= temp_num; temp_index++) {
+        if (sensor_temp_sub_single_create_kobj_and_attrs(parent, temp_index) != 0 ) {
+            goto error;
+        }
+    }
+    return 0;
+error:
+    for (i = temp_index - 1; i > 0; i--) {
+        sensor_temp_sub_single_remove_kobj_and_attrs(i);
+    }
+
+    if (g_sensor.temp) {
+        kfree(g_sensor.temp);
+        g_sensor.temp = NULL;
+    }
+    return -EBADRQC;
+}
+
+static int sensor_in_sub_create_kobj_and_attrs(struct kobject *parent, int in_num)
+{
+    unsigned int in_index, i;
+
+    g_sensor.in = kzalloc(sizeof(struct sensor_in_t) * in_num, GFP_KERNEL);
+    if (!g_sensor.in) {
+        SENSOR_ERR("kzalloc g_sensor.in error, in number = %d.\n", in_num);
+        return -ENOMEM;
+    }
+
+    for (in_index = 1; in_index <= in_num; in_index++) {
+        if (sensor_in_sub_single_create_kobj_and_attrs(parent, in_index) != 0 ) {
+            goto error;
+        }
+    }
+    return 0;
+error:
+    for (i = in_index - 1; i > 0; i--) {
+        sensor_in_sub_single_remove_kobj_and_attrs(i);
+    }
+
+    if (g_sensor.in) {
+        kfree(g_sensor.in);
+        g_sensor.in = NULL;
+    }
+    return -EBADRQC;
+}
+
+static int sensor_temp_sub_create(void)
+{
+    int ret, temp_num;
+
+    check_p(g_drv->get_dev_number);
+    temp_num = g_drv->get_dev_number(WB_MAIN_DEV_MAINBOARD, WB_MINOR_DEV_TEMP);
+    g_sensor.temp_number = temp_num;
+    if (temp_num <= 0) {
+        SENSOR_DBG("Warning:sensor temp number = %d \n", temp_num);
+        return 0;
+    }
+    ret = sensor_temp_sub_create_kobj_and_attrs(&g_sensor_obj->kobj, temp_num);
+    return ret;
+}
+
+static int sensor_in_sub_create(void)
+{
+    int ret, in_num;
+
+    check_p(g_drv->get_dev_number);
+    in_num = g_drv->get_dev_number(WB_MAIN_DEV_MAINBOARD, WB_MINOR_DEV_IN);
+    g_sensor.in_number = in_num;
+
+    if (in_num <= 0) {
+        SENSOR_DBG("Warning:sensor in number = %d \n", in_num);
+        return 0;
+    }
+    ret = sensor_in_sub_create_kobj_and_attrs(&g_sensor_obj->kobj, in_num);
+    return ret;
+}
+
+static void temp_sub_single_remove_kobj_and_attrs(unsigned int index)
+{
+    struct sensor_temp_t * curr_temp;
+
+    curr_temp = &g_sensor.temp[index - 1];
+    if (curr_temp->obj) {
+        sysfs_remove_group(&curr_temp->obj->kobj, &sensor_temp_attr_group);
+        wb_plat_kobject_delete(&curr_temp->obj);
+        SENSOR_DBG("delete sensor temp%d.\n", index);
+    }
+    return;
+}
+
+static void in_sub_single_remove_kobj_and_attrs(unsigned int index)
+{
+    struct sensor_in_t * curr_in;
+
+    curr_in = &g_sensor.in[index - 1];
+    if (curr_in->obj) {
+        sysfs_remove_group(&curr_in->obj->kobj, &sensor_in_attr_group);
+        wb_plat_kobject_delete(&curr_in->obj);
+        SENSOR_DBG("delete sensor in%d.\n", index);
+    }
+    return;
+}
+
+static void sensor_temp_sub_remove(void)
+{
+    unsigned int temp_index;
+
+    if (g_sensor.temp) {
+       for (temp_index = g_sensor.temp_number; temp_index > 0; temp_index--) {
+           temp_sub_single_remove_kobj_and_attrs(temp_index);
+       }
+       kfree(g_sensor.temp);
+       g_sensor.temp = NULL;
+    }
+    return;
+}
+
+static void sensor_in_sub_remove(void)
+{
+    unsigned int in_index;
+
+    if (g_sensor.in) {
+       for (in_index = g_sensor.in_number; in_index > 0; in_index--) {
+           in_sub_single_remove_kobj_and_attrs(in_index);
+       }
+       kfree(g_sensor.in);
+       g_sensor.in = NULL;
+    }
+    return;
+}
+
+static void sensor_sub_remove(void)
+{
+    sensor_temp_sub_remove();
+    sensor_in_sub_remove();
+}
+
+static int sensor_sub_create(void)
+{
+    int ret;
+    /* temp creat */
+    ret = sensor_temp_sub_create();
+    if (ret < 0) {
+        goto temp_err;
+    }
+    /* Voltage creat */
+    ret = sensor_in_sub_create();
+    if (ret < 0) {
+        goto in_err;
+    }
+    return 0;
+in_err:
+    sensor_temp_sub_remove();
+temp_err:
+    return ret;
+}
+static void sensor_root_remove(void)
+{
+    if (g_sensor_obj) {
+        sysfs_remove_group(&g_sensor_obj->kobj, &sensor_root_attr_group);
+        wb_plat_kobject_delete(&g_sensor_obj);
+        SENSOR_DBG("delete sensor root success\n");
+    }
+
+    return;
+}
+
+static int sensor_root_create(void)
+{
+    g_sensor_obj = wb_plat_kobject_create("sensor", NULL);
+    if (!g_sensor_obj) {
+        SENSOR_ERR("wb_plat_kobject_create sensor error!\n");
+        return -ENOMEM;
+    }
+
+    if (sysfs_create_group(&g_sensor_obj->kobj, &sensor_root_attr_group) != 0) {
+        wb_plat_kobject_delete(&g_sensor_obj);
+        SENSOR_ERR("create sensor dir attrs error!\n");
+        return -EBADRQC;
+    }
+    SENSOR_DBG("wb_plat_kobject_create sensor directory and attribute success.\n");
+    return 0;
+}
+
+static int wb_sensor_init(void)
+{
+    int ret;
+
+    SENSOR_INFO("wb_sensor_init...\n");
+    g_drv = dfd_plat_driver_get();
+    check_p(g_drv);
+
+    ret = sensor_root_create();
+    if (ret < 0) {
+        goto sensor_root_error;
+    }
+
+    ret = sensor_sub_create();
+    if (ret < 0) {
+        goto sensor_sub_error;
+    }
+    SENSOR_INFO("sensor_init ok.\n");
+    return 0;
+sensor_sub_error:
+    sensor_root_remove();
+sensor_root_error:
+    return ret;
+}
+
+static void wb_sensor_exit(void)
+{
+    sensor_sub_remove();
+    sensor_root_remove();
+    SENSOR_INFO("sensor_exit ok.\n");
+    return;
+}
+
+module_init(wb_sensor_init);
+module_exit(wb_sensor_exit);
+module_param(g_loglevel, int, 0644);
+MODULE_PARM_DESC(g_loglevel, "the log level(info=0x1, err=0x2, dbg=0x4).\n");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
+MODULE_DESCRIPTION("sensors sysfs driver");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/plat_sff.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/plat_sff.c
new file mode 100644
index 000000000..50c0f78ae
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/plat_sff.c
@@ -0,0 +1,287 @@
+/*
+ * plat_sff.c
+ *
+ * This module create sff kobjects and attributes in /sys/wb_plat/sff
+ *
+ */
+
+#include <linux/slab.h>
+
+#include "./include/plat_switch.h"
+#include "./include/sysfs_common.h"
+
+#define SFF_INFO(fmt, args...) LOG_INFO("sff: ", fmt, ##args)
+#define SFF_ERR(fmt, args...)  LOG_ERR("sff: ", fmt, ##args)
+#define SFF_DBG(fmt, args...)  LOG_DBG("sff: ", fmt, ##args)
+
+struct sff_obj_t{
+    struct switch_obj *sff_obj;
+    struct bin_attribute bin;
+    int sff_creat_bin_flag;
+};
+
+struct sff_t{
+    unsigned int sff_number;
+    struct sff_obj_t *sff;
+};
+
+static int g_loglevel = 0;
+static struct sff_t g_sff;
+static struct switch_obj *g_sff_obj = NULL;
+static struct switch_drivers_t *g_drv = NULL;
+
+static ssize_t sff_cpld_info_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int sff_index;
+    int ret;
+    struct switch_device_attribute *sff_cpld_attr;
+
+    check_p(g_drv);
+    check_p(g_drv->get_sff_cpld_info);
+
+    sff_index = obj->index;
+    sff_cpld_attr = to_switch_device_attr(attr);
+    check_p(sff_cpld_attr);
+    SFF_DBG("sff_cpld_info_show, sff index:0x%x, sff cpld attr type:0x%x\n", sff_index, sff_cpld_attr->type);
+    ret = g_drv->get_sff_cpld_info(sff_index, sff_cpld_attr->type, buf, PAGE_SIZE);
+    if(ret < 0) {
+        SFF_ERR("sff_cpld_info_show error. sff index:0x%x, sff cpld attr type:0x%x, ret:%d\n",
+            sff_index, sff_cpld_attr->type,ret );
+        return (ssize_t)snprintf(buf, PAGE_SIZE, "%s\n", WB_SYSFS_DEV_ERROR);
+    }
+    SFF_DBG("sff_cpld_info_show ok. sff index:0x%x, sff cpld attr type:0x%x, ret:%d\n", sff_index, sff_cpld_attr->type, ret);
+    return ret;
+}
+
+static ssize_t sff_number_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    return (ssize_t)snprintf(buf, PAGE_SIZE, "%d\n", g_sff.sff_number);
+}
+
+/************************************sff attrs*******************************************/
+static struct switch_attribute sff_number_att = __ATTR(num_sffs, S_IRUGO, sff_number_show, NULL);
+static SWITCH_DEVICE_ATTR(present, S_IRUGO, sff_cpld_info_show, NULL, WB_SFF_MODULE_PRESENT);
+
+/*******************************xcvr dir and attrs*******************************************/
+static struct attribute *xcvr_dir_attrs[] = {
+    &sff_number_att.attr,
+    NULL,
+};
+
+static struct attribute_group sff_xcvr_attr_group = {
+    .attrs = xcvr_dir_attrs,
+};
+
+/*******************************sff dir and attrs*******************************************/
+static struct attribute *sff_attrs[] = {
+    &switch_dev_attr_present.switch_attr.attr,
+    NULL,
+};
+
+static struct attribute_group sff_attr_group = {
+    .attrs = sff_attrs,
+};
+
+static int sff_sub_single_create_attrs(unsigned int index)
+{
+    struct sff_obj_t *curr_sff;
+
+    curr_sff = &g_sff.sff[index-1];
+    if (sysfs_create_group(&curr_sff->sff_obj->kobj, &sff_attr_group) != 0) {
+        SFF_ERR("create sff%d dir attrs error!\n", index);
+        wb_plat_kobject_delete(&curr_sff->sff_obj);
+        return -EBADRQC;
+    }
+    SFF_DBG("create sff%d dir attrs ok!\n", index);
+    return 0;
+}
+
+static int sff_sub_single_create_kobj(struct kobject *parent, unsigned int index)
+{
+    struct sff_obj_t *curr_sff;
+    char sff_dir_name[DIR_NAME_MAX_LEN];
+    int ret;
+
+    check_p(g_drv->get_sff_dir_name);
+    ret = g_drv->get_sff_dir_name(index, sff_dir_name, sizeof(sff_dir_name));
+    if (ret < 0) {
+        SFF_ERR("sff index:%d, get sff dir name error. please check sff config.\n", index);
+        return -ENOSYS;
+    }
+
+    curr_sff = &g_sff.sff[index - 1];
+
+    curr_sff->sff_obj = wb_plat_kobject_create(sff_dir_name, parent);
+    if (!curr_sff->sff_obj) {
+        SFF_ERR("sff index:%d, create %s object error! \n", index, sff_dir_name);
+        return -EBADRQC;
+    }
+
+    SFF_DBG("create sff kobj ok. sff index:%d, dir name:%s\n",index, sff_dir_name);
+    curr_sff->sff_obj->index = index;
+
+    return 0;
+}
+
+static void sff_sub_single_remove_kobj_and_attrs(unsigned int index)
+{
+    struct sff_obj_t *curr_sff;
+
+    curr_sff = &g_sff.sff[index - 1];
+    /* remove sff dir and attr */
+    if (curr_sff->sff_obj) {
+        SFF_DBG("delete sff%d attrs.\n", curr_sff->sff_obj->index);
+        curr_sff->sff_obj->index = 0;
+        sysfs_remove_group(&curr_sff->sff_obj->kobj, &sff_attr_group);
+        wb_plat_kobject_delete(&curr_sff->sff_obj);
+    }
+
+    return;
+}
+
+static int sff_sub_single_create_kobj_and_attrs(struct kobject *parent, unsigned int index)
+{
+    int ret;
+
+    ret = sff_sub_single_create_kobj(parent, index);
+    if (ret < 0) {
+        SFF_ERR("sff index:%d, create sff dir error.\n", index);
+        return ret;
+    }
+
+    ret = sff_sub_single_create_attrs(index);
+    if (ret < 0) {
+        SFF_ERR("sff index:%d, create sff attr error.\n", index);
+        return ret;
+    }
+    return 0;
+}
+
+static int sff_sub_create_kobj_and_attrs(struct kobject *parent, int sff_num)
+{
+    unsigned int sff_index, i;
+
+    g_sff.sff = kzalloc(sizeof(struct sff_obj_t) * sff_num, GFP_KERNEL);
+    if (!g_sff.sff) {
+        SFF_ERR("kzalloc g_sff.sff error, sff number = %d.\n", sff_num);
+        return -ENOMEM;
+    }
+
+    for (sff_index = 1; sff_index <= sff_num; sff_index++) {
+        if (sff_sub_single_create_kobj_and_attrs(parent, sff_index) != 0 ) {
+            goto error;
+        }
+    }
+    return 0;
+error:
+    for (i = sff_index - 1; i > 0; i--) {
+        sff_sub_single_remove_kobj_and_attrs(i);
+    }
+    if (g_sff.sff) {
+        kfree(g_sff.sff);
+        g_sff.sff = NULL;
+    }
+    return -EBADRQC;
+}
+
+static int sff_sub_create(void)
+{
+    int ret, sff_num;
+
+    check_p(g_drv->get_dev_number);
+    sff_num = g_drv->get_dev_number(WB_MAIN_DEV_SFF, WB_MINOR_DEV_NONE);
+    g_sff.sff_number = sff_num;
+    if (sff_num <= 0) {
+        SFF_ERR("ERROR. port number:%d\n", sff_num);
+        return -EINVAL;
+    }
+
+    ret = sff_sub_create_kobj_and_attrs(&g_sff_obj->kobj, sff_num);
+
+    return ret;
+}
+
+static void sff_sub_remove(void)
+{
+    unsigned int sff_index;
+
+    if (g_sff.sff) {
+       for (sff_index = g_sff.sff_number; sff_index > 0; sff_index--) {
+           sff_sub_single_remove_kobj_and_attrs(sff_index);
+       }
+       kfree(g_sff.sff);
+    }
+    mem_clear(&g_sff, sizeof(struct sff_t));
+    return ;
+}
+
+static int sff_xcvr_create(void)
+{
+    g_sff_obj = wb_plat_kobject_create(SFF_SYSFS_NAME, NULL);
+    if (!g_sff_obj) {
+        SFF_ERR("wb_plat_kobject_create sff error!\n");
+        return -ENOMEM;
+    }
+
+    g_sff_obj->index = 0;
+    if (sysfs_create_group(&g_sff_obj->kobj, &sff_xcvr_attr_group) != 0) {
+        wb_plat_kobject_delete(&g_sff_obj);
+        SFF_ERR("create sff dir attrs error!\n");
+        return -EBADRQC;
+    }
+    SFF_DBG("wb_plat_kobject_create sff directory and attribute success.\n");
+    return 0;
+}
+
+static void sff_xcvr_remove(void)
+{
+    if (g_sff_obj) {
+        sysfs_remove_group(&g_sff_obj->kobj, &sff_xcvr_attr_group);
+        wb_plat_kobject_delete(&g_sff_obj);
+        SFF_DBG("delete sff root success\n");
+    }
+
+    return;
+}
+
+static int wb_sff_init(void)
+{
+    int ret;
+
+    SFF_INFO("wb_sff_init...\n");
+    g_drv = dfd_plat_driver_get();
+    check_p(g_drv);
+
+    ret = sff_xcvr_create();
+    if (ret < 0) {
+        goto sff_root_error;
+    }
+
+    ret = sff_sub_create();
+    if (ret < 0) {
+        goto sff_sub_error;
+    }
+    SFF_INFO("wb_sff_init ok.\n");
+    return 0;
+
+sff_sub_error:
+    sff_xcvr_remove();
+sff_root_error:
+    return ret;
+}
+
+static void wb_sff_exit(void)
+{
+    sff_sub_remove();
+    sff_xcvr_remove();
+    SFF_INFO("wb_sff_exit ok.\n");
+    return ;
+}
+
+module_init(wb_sff_init);
+module_exit(wb_sff_exit);
+module_param(g_loglevel, int, 0644);
+MODULE_PARM_DESC(g_loglevel, "the log level(info=0x1, err=0x2, dbg=0x4).\n");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
+MODULE_DESCRIPTION("sff sysfs driver");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/plat_slot.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/plat_slot.c
new file mode 100644
index 000000000..7c50f283b
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/plat_slot.c
@@ -0,0 +1,663 @@
+/*
+ * plat_slot.c
+ *
+ * This module create sff kobjects and attributes in /sys/wb_plat/slot
+ *
+ */
+
+#include <linux/slab.h>
+
+#include "./include/plat_switch.h"
+#include "./include/sysfs_common.h"
+
+#define SLOT_INFO(fmt, args...) LOG_INFO("slot: ", fmt, ##args)
+#define SLOT_ERR(fmt, args...)  LOG_ERR("slot: ", fmt, ##args)
+#define SLOT_DBG(fmt, args...)  LOG_DBG("slot: ", fmt, ##args)
+
+struct slot_temp_obj_t{
+    struct switch_obj *obj;
+};
+
+struct slot_in_obj_t{
+    struct switch_obj *obj;
+};
+
+struct slot_obj_t{
+    unsigned int temp_number;
+    unsigned int in_number;
+    struct slot_temp_obj_t *temp;
+    struct slot_in_obj_t *in;
+    struct switch_obj *obj;
+};
+
+struct slot_t{
+    unsigned int slot_number;
+    struct slot_obj_t *slot;
+};
+
+static int g_loglevel = 0;
+static struct slot_t g_slot;
+static struct switch_obj *g_slot_obj = NULL;
+static struct switch_drivers_t *g_drv = NULL;
+
+static ssize_t slot_number_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    return (ssize_t)snprintf(buf, PAGE_SIZE, "%d\n", g_slot.slot_number);
+}
+
+static ssize_t slot_temp_number_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int index;
+
+    index = obj->index;
+    SLOT_DBG("slot_temp_number_show,slot index:%d\n",index);
+
+    return (ssize_t)snprintf(buf, PAGE_SIZE, "%d\n", g_slot.slot[index-1].temp_number);
+}
+
+static ssize_t slot_in_number_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int index;
+
+    index = obj->index;
+    SLOT_DBG("slot_in_number_show,slot index:%d\n",index);
+
+    return (ssize_t)snprintf(buf, PAGE_SIZE, "%d\n", g_slot.slot[index-1].in_number);
+}
+
+static ssize_t slot_present_status_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int slot_index;
+    int ret;
+
+    slot_index = obj->index;
+    SLOT_DBG("slot_present_status_show, slot index:%d\n",slot_index);
+    check_p(g_drv);
+    check_p(g_drv->get_slot_present_status);
+
+    ret = g_drv->get_slot_present_status(slot_index);
+    if(ret < 0) {
+        return (ssize_t)snprintf(buf, PAGE_SIZE, "%s\n", WB_SYSFS_DEV_ERROR);
+    }
+
+    return (ssize_t)snprintf(buf, PAGE_SIZE, "%d\n", ret);
+}
+
+static ssize_t slot_voltage_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int slot_index, in_index;
+    int ret;
+    struct switch_obj *p_obj;
+    struct switch_device_attribute *in_attr;
+
+    check_p(g_drv);
+    check_p(g_drv->get_voltage_info);
+
+    p_obj = to_switch_obj(obj->kobj.parent);
+    check_p(p_obj);
+
+    slot_index = p_obj->index;
+    in_index = obj->index;
+
+    in_attr = to_switch_device_attr(attr);
+    check_p(in_attr);
+    SLOT_DBG("slot_voltage_show, slot index:0x%x, temp index:0x%x, temp type:0x%x\n",slot_index, in_index, in_attr->type);
+    ret = g_drv->get_voltage_info(WB_MAIN_DEV_SLOT, slot_index, in_index, in_attr->type, buf);
+    if(ret < 0) {
+        return (ssize_t)snprintf(buf, PAGE_SIZE, "%s\n", WB_SYSFS_DEV_ERROR);
+    }
+    return ret;
+}
+
+static ssize_t slot_temp_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int slot_index, temp_index;
+    int ret;
+    struct switch_obj *p_obj;
+    struct switch_device_attribute *temp_attr;
+
+    check_p(g_drv);
+    check_p(g_drv->get_temp_info);
+
+    p_obj = to_switch_obj(obj->kobj.parent);
+    check_p(p_obj);
+
+    slot_index = p_obj->index;
+    temp_index = obj->index;
+
+    temp_attr = to_switch_device_attr(attr);
+    check_p(temp_attr);
+    SLOT_DBG("slot_temp_show, slot index:0x%x, temp index:0x%x, temp type:0x%x\n",slot_index, temp_index, temp_attr->type);
+    ret = g_drv->get_temp_info(WB_MAIN_DEV_SLOT, slot_index, temp_index, temp_attr->type, buf);
+    if(ret < 0) {
+        return (ssize_t)snprintf(buf, PAGE_SIZE, "%s\n", WB_SYSFS_DEV_ERROR);
+    }
+    return ret;
+}
+
+/************************************slot dir and attrs*******************************************/
+static struct switch_attribute slot_number_att = __ATTR(num_slots, S_IRUGO, slot_number_show, NULL);
+
+static struct attribute *slot_dir_attrs[] = {
+    &slot_number_att.attr,
+    NULL,
+};
+
+static struct attribute_group slot_root_attr_group = {
+    .attrs = slot_dir_attrs,
+};
+
+/*******************************slot1 slot2 dir and attrs*******************************************/
+static struct switch_attribute num_temp_sensors_att = __ATTR(num_temp_sensors, S_IRUGO, slot_temp_number_show, NULL);
+static struct switch_attribute num_in_sensors_att = __ATTR(num_in_sensors, S_IRUGO, slot_in_number_show, NULL);
+static struct switch_attribute slot_present_status_att = __ATTR(present, S_IRUGO, slot_present_status_show, NULL);
+
+static struct attribute *slot_attrs[] = {
+    &num_temp_sensors_att.attr,
+    &num_in_sensors_att.attr,
+    &slot_present_status_att.attr,
+    NULL,
+};
+
+static struct attribute_group slot_attr_group = {
+    .attrs = slot_attrs,
+};
+
+/*******************************temp dir and attrs*******************************************/
+static SWITCH_DEVICE_ATTR(temp_alias, S_IRUGO, slot_temp_show, NULL, WB_SENSOR_ALIAS);
+static SWITCH_DEVICE_ATTR(temp_type, S_IRUGO, slot_temp_show, NULL, WB_SENSOR_TYPE);
+static SWITCH_DEVICE_ATTR(temp_max, S_IRUGO, slot_temp_show, NULL, WB_SENSOR_MAX);
+static SWITCH_DEVICE_ATTR(temp_max_hyst, S_IRUGO, slot_temp_show, NULL, WB_SENSOR_MAX_HYST);
+static SWITCH_DEVICE_ATTR(temp_min, S_IRUGO, slot_temp_show, NULL, WB_SENSOR_MIN);
+static SWITCH_DEVICE_ATTR(temp_input, S_IRUGO, slot_temp_show, NULL, WB_SENSOR_INPUT);
+
+static struct attribute *temp_attrs[] = {
+    &switch_dev_attr_temp_alias.switch_attr.attr,
+    &switch_dev_attr_temp_type.switch_attr.attr,
+    &switch_dev_attr_temp_max.switch_attr.attr,
+    &switch_dev_attr_temp_max_hyst.switch_attr.attr,
+    &switch_dev_attr_temp_min.switch_attr.attr,
+    &switch_dev_attr_temp_input.switch_attr.attr,
+    NULL,
+};
+
+static struct attribute_group temp_attr_group = {
+    .attrs = temp_attrs,
+};
+
+/*******************************Voltage dir and attrs*******************************************/
+static SWITCH_DEVICE_ATTR(in_alias, S_IRUGO, slot_voltage_show, NULL, WB_SENSOR_ALIAS);
+static SWITCH_DEVICE_ATTR(in_type, S_IRUGO, slot_voltage_show, NULL, WB_SENSOR_TYPE);
+static SWITCH_DEVICE_ATTR(in_max, S_IRUGO, slot_voltage_show, NULL, WB_SENSOR_MAX);
+static SWITCH_DEVICE_ATTR(in_crit, S_IRUGO, slot_voltage_show, NULL, WB_SENSOR_CRIT);
+static SWITCH_DEVICE_ATTR(in_min, S_IRUGO, slot_voltage_show, NULL, WB_SENSOR_MIN);
+static SWITCH_DEVICE_ATTR(in_input, S_IRUGO, slot_voltage_show, NULL, WB_SENSOR_INPUT);
+
+static struct attribute *in_attrs[] = {
+    &switch_dev_attr_in_alias.switch_attr.attr,
+    &switch_dev_attr_in_type.switch_attr.attr,
+    &switch_dev_attr_in_max.switch_attr.attr,
+    &switch_dev_attr_in_crit.switch_attr.attr,
+    &switch_dev_attr_in_min.switch_attr.attr,
+    &switch_dev_attr_in_input.switch_attr.attr,
+    NULL,
+};
+
+static struct attribute_group in_attr_group = {
+    .attrs = in_attrs,
+};
+
+static void slotindex_single_temp_remove_kobj_and_attrs(struct slot_obj_t * curr_slot, unsigned int temp_index)
+{
+
+    struct slot_temp_obj_t *curr_temp; /* point to temp1 temp2...*/
+
+    curr_temp = &curr_slot->temp[temp_index - 1];
+    if (curr_temp->obj) {
+        sysfs_remove_group(&curr_temp->obj->kobj, &temp_attr_group);
+        wb_plat_kobject_delete(&curr_temp->obj);
+        SLOT_DBG("delete slot:%d temp%d.\n", curr_slot->obj->index, temp_index);
+    }
+    return;
+}
+
+static int slotindex_single_temp_create_kobj_and_attrs(struct slot_obj_t * curr_slot, unsigned int temp_index)
+{
+    char name[DIR_NAME_MAX_LEN];
+    struct slot_temp_obj_t *curr_temp; /* point to temp1 temp2...*/
+
+    curr_temp = &curr_slot->temp[temp_index - 1];
+    mem_clear(name, sizeof(name));
+    snprintf(name, sizeof(name), "%s%d", TEMP_SYSFS_NAME, temp_index);
+
+    curr_temp->obj = wb_plat_kobject_create(name, &curr_slot->obj->kobj);
+    if (!curr_temp->obj) {
+        SLOT_ERR("create slot_index:%d, temp%d object error!\n", curr_slot->obj->index, temp_index);
+        return -EBADRQC;
+    }
+    curr_temp->obj->index = temp_index;
+    if (sysfs_create_group(&curr_temp->obj->kobj, &temp_attr_group) != 0) {
+        SLOT_ERR("create slot_index:%d, temp%d attrs error.\n", curr_slot->obj->index, temp_index);
+        wb_plat_kobject_delete(&curr_temp->obj);
+        return -EBADRQC;
+    }
+    SLOT_DBG("create slot_index:%d, temp%d ok.\n", curr_slot->obj->index, temp_index);
+    return 0;
+}
+
+static void slotindex_temp_remove_kobj_and_attrs(struct slot_obj_t * curr_slot)
+{
+    int temp_index;
+
+    for(temp_index = curr_slot->temp_number; temp_index > 0; temp_index--) {
+        slotindex_single_temp_remove_kobj_and_attrs(curr_slot, temp_index);
+    }
+
+    if(curr_slot->temp) {
+        kfree(curr_slot->temp);
+        curr_slot->temp = NULL;
+        curr_slot->temp_number = 0;
+    }
+    return;
+}
+
+static int slotindex_temp_create_kobj_and_attrs(struct slot_obj_t * curr_slot, int temp_num)
+{
+    int temp_index, i;
+
+    curr_slot->temp_number = temp_num;
+    curr_slot->temp = kzalloc(sizeof(struct slot_temp_obj_t) * temp_num, GFP_KERNEL);
+    if (!curr_slot->temp) {
+        SLOT_ERR("kzalloc slot temp error, slot index = %d, temp number = %d.\n", curr_slot->obj->index, temp_num);
+        return -ENOMEM;
+    }
+
+    for (temp_index = 1; temp_index <= temp_num; temp_index++) {
+        if (slotindex_single_temp_create_kobj_and_attrs(curr_slot, temp_index) != 0) {
+            goto error;
+        }
+    }
+    return 0;
+error:
+    for (i = temp_index - 1; i > 0; i--) {
+        slotindex_single_temp_remove_kobj_and_attrs(curr_slot, i);
+    }
+
+    if (curr_slot->temp) {
+        kfree(curr_slot->temp);
+        curr_slot->temp = NULL;
+        curr_slot->temp_number = 0;
+    }
+    return -EBADRQC;
+}
+
+static void slotindex_single_in_remove_kobj_and_attrs(struct slot_obj_t * curr_slot, unsigned int in_index)
+{
+
+    struct slot_in_obj_t *curr_in; /* point to in1 in2...*/
+
+    curr_in = &curr_slot->in[in_index - 1];
+    if (curr_in->obj) {
+        sysfs_remove_group(&curr_in->obj->kobj, &in_attr_group);
+        wb_plat_kobject_delete(&curr_in->obj);
+        SLOT_DBG("delete slot:%d in%d.\n", curr_slot->obj->index, in_index);
+    }
+    return;
+}
+
+static int slotindex_single_in_create_kobj_and_attrs(struct slot_obj_t * curr_slot, unsigned int in_index)
+{
+    char name[DIR_NAME_MAX_LEN];
+    struct slot_in_obj_t *curr_in; /* point to in1 in2...*/
+
+    curr_in = &curr_slot->in[in_index - 1];
+    mem_clear(name, sizeof(name));
+    snprintf(name, sizeof(name), "%s%d", VOLTAGE_SYSFS_NAME, in_index);
+    curr_in->obj = wb_plat_kobject_create(name, &curr_slot->obj->kobj);
+    if (!curr_in->obj) {
+        SLOT_ERR("create slot_index:%d, in%d object error!\n", curr_slot->obj->index, in_index);
+        return -EBADRQC;
+    }
+    curr_in->obj->index = in_index;
+    if (sysfs_create_group(&curr_in->obj->kobj, &in_attr_group) != 0) {
+        SLOT_ERR("create slot_index:%d, in%d attrs error.\n", curr_slot->obj->index, in_index);
+        wb_plat_kobject_delete(&curr_in->obj);
+        return -EBADRQC;
+    }
+    SLOT_DBG("create slot_index:%d, in%d ok.\n", curr_slot->obj->index, in_index);
+    return 0;
+}
+
+static void slotindex_in_remove_kobj_and_attrs(struct slot_obj_t * curr_slot)
+{
+    int in_index;
+
+    for(in_index = curr_slot->in_number; in_index > 0; in_index--) {
+        slotindex_single_in_remove_kobj_and_attrs(curr_slot, in_index);
+    }
+
+    if(curr_slot->in) {
+        kfree(curr_slot->in);
+        curr_slot->in = NULL;
+        curr_slot->in_number = 0;
+    }
+    return;
+}
+
+static int slotindex_in_create_kobj_and_attrs(struct slot_obj_t * curr_slot, int in_num)
+{
+    int in_index, i;
+
+    curr_slot->in_number = in_num;
+    curr_slot->in = kzalloc(sizeof(struct slot_in_obj_t) * in_num, GFP_KERNEL);
+    if (!curr_slot->in) {
+        SLOT_ERR("kzalloc slot Voltage error, slot index = %d, Voltage number = %d.\n", curr_slot->obj->index, in_num);
+        return -ENOMEM;
+    }
+
+    for (in_index = 1; in_index <= in_num; in_index++) {
+        if (slotindex_single_in_create_kobj_and_attrs(curr_slot, in_index) != 0 ) {
+            goto error;
+        }
+    }
+    return 0;
+error:
+    for (i = in_index - 1; i > 0; i++) {
+        slotindex_single_in_remove_kobj_and_attrs(curr_slot, i);
+    }
+
+    if (curr_slot->in) {
+        kfree(curr_slot->in);
+        curr_slot->in = NULL;
+        curr_slot->in_number = 0;
+    }
+    return -EBADRQC;
+}
+
+static void slotindex_obj_remove_kobj_and_attrs(struct slot_obj_t * curr_slot, unsigned int obj_id)
+{
+    switch (obj_id) {
+    case WB_MINOR_DEV_TEMP:
+        slotindex_temp_remove_kobj_and_attrs(curr_slot);
+        break;
+    case WB_MINOR_DEV_IN:
+        slotindex_in_remove_kobj_and_attrs(curr_slot);
+        break;
+    default:
+        SLOT_ERR("Unknow obj id:%d\n", obj_id);
+    }
+    return ;
+}
+
+static int slotindex_obj_create_kobj_and_attrs(struct slot_obj_t * curr_slot, unsigned int obj_id, int obj_num)
+{
+    int ret;
+
+    switch (obj_id) {
+    case WB_MINOR_DEV_TEMP:
+        ret = slotindex_temp_create_kobj_and_attrs(curr_slot, obj_num);
+        break;
+    case WB_MINOR_DEV_IN:
+        ret = slotindex_in_create_kobj_and_attrs(curr_slot, obj_num);
+        break;
+    default:
+        SLOT_ERR("Unknow obj id:%d\n", obj_id);
+        ret = -EINVAL;
+    }
+    return ret;
+}
+
+static void slot_child_obj_remove_by_id(unsigned int obj_id)
+{
+    int slot_num;
+    unsigned int slot_index;
+    struct slot_obj_t *curr_slot;     /* point to slot1 slot2...*/
+
+    slot_num = g_slot.slot_number;
+    if (slot_num <= 0 || !g_slot.slot) {
+        SLOT_DBG("Warning:slot number = %d\n", slot_num);
+        return;
+    }
+
+    for(slot_index = slot_num; slot_index > 0; slot_index--) {
+        curr_slot = &g_slot.slot[slot_index - 1];
+        slotindex_obj_remove_kobj_and_attrs(curr_slot, obj_id);
+    }
+    return;
+}
+
+static int slot_child_obj_create_by_id(unsigned int obj_id)
+{
+    int slot_num, obj_num;
+    unsigned int slot_index, i;
+    struct slot_obj_t *curr_slot;     /* point to slot1 slot2...*/
+
+    check_p(g_drv->get_dev_number);
+    obj_num = g_drv->get_dev_number(WB_MAIN_DEV_SLOT,obj_id);
+    slot_num = g_slot.slot_number;
+    if (obj_num <= 0 || slot_num <= 0 || !g_slot.slot) {
+        SLOT_DBG("Warning:slot number = %d, object number:%d.obj_id:%d\n", slot_num, obj_num, obj_id);
+        return 0;
+    }
+
+    for (slot_index = 1; slot_index <= slot_num; slot_index++) {
+        curr_slot = &g_slot.slot[slot_index - 1];
+        if (slotindex_obj_create_kobj_and_attrs(curr_slot, obj_id, obj_num) != 0) {
+            goto error;
+        }
+    }
+    return 0;
+error:
+    for(i = slot_index - 1; i > 0; i++) {
+        curr_slot = &g_slot.slot[i - 1];
+        slotindex_obj_remove_kobj_and_attrs(curr_slot, obj_id);
+    }
+    return -EBADRQC;
+}
+
+static void slot_child_obj_remove(void)
+{
+    /* temp remove */
+    slot_child_obj_remove_by_id(WB_MINOR_DEV_TEMP);
+
+    /* in creat */
+    slot_child_obj_remove_by_id(WB_MINOR_DEV_IN);
+    return;
+}
+
+static int slot_child_obj_create(void)
+{
+    int ret;
+
+    /* temp creat */
+    ret = slot_child_obj_create_by_id(WB_MINOR_DEV_TEMP);
+    if (ret < 0) {
+        goto temp_err;
+    }
+    /* Voltage creat */
+    ret = slot_child_obj_create_by_id(WB_MINOR_DEV_IN);
+    if(ret < 0) {
+        goto in_err;
+    }
+    return 0;
+in_err:
+    slot_child_obj_remove_by_id(WB_MINOR_DEV_TEMP);
+temp_err:
+    return ret;
+}
+
+static void slot_sub_single_remove_kobj_and_attrs(unsigned int index)
+{
+    struct slot_obj_t *curr_slot;
+
+    curr_slot = &g_slot.slot[index - 1];
+    if (curr_slot->obj) {
+        sysfs_remove_group(&curr_slot->obj->kobj, &slot_attr_group);
+        wb_plat_kobject_delete(&curr_slot->obj);
+        SLOT_DBG("delete slot%d.\n", index);
+    }
+    return;
+}
+
+static int slot_sub_single_create_kobj_and_attrs(struct kobject *parent, unsigned int index)
+{
+    char name[DIR_NAME_MAX_LEN];
+    struct slot_obj_t *curr_slot;
+
+    curr_slot = &g_slot.slot[index - 1];
+    SLOT_DBG("create %s%d ...\n", SLOT_SYSFS_NAME, index);
+    mem_clear(name, sizeof(name));
+    snprintf(name, sizeof(name), "%s%d", SLOT_SYSFS_NAME, index);
+    curr_slot->obj = wb_plat_kobject_create(name, parent);
+    if (!curr_slot->obj) {
+        SLOT_ERR("create slot%d object error!\n", index);
+        return -EBADRQC;
+    }
+    curr_slot->obj->index = index;
+    if (sysfs_create_group(&curr_slot->obj->kobj, &slot_attr_group) != 0) {
+        SLOT_ERR("create slot%d attrs error.\n", index);
+        wb_plat_kobject_delete(&curr_slot->obj);
+        return -EBADRQC;
+    }
+    SLOT_DBG("create slot%d ok.\n", index);
+    return 0;
+}
+
+static int slot_sub_create_kobj_and_attrs(struct kobject *parent, int slot_num)
+{
+    unsigned int slot_index, i;
+
+    g_slot.slot = kzalloc(sizeof(struct slot_obj_t) * slot_num, GFP_KERNEL);
+    if (!g_slot.slot) {
+        SLOT_ERR("kzalloc slot.slot error, slot number = %d.\n", slot_num);
+        return -ENOMEM;
+    }
+
+    for (slot_index = 1; slot_index <= slot_num; slot_index++) {
+        if (slot_sub_single_create_kobj_and_attrs(parent, slot_index) != 0) {
+            goto error;
+        }
+    }
+    return 0;
+error:
+    for (i = slot_index - 1; i > 0; i--) {
+        slot_sub_single_remove_kobj_and_attrs(i);
+    }
+    if (g_slot.slot) {
+        kfree(g_slot.slot);
+        g_slot.slot = NULL;
+    }
+    return -EBADRQC;
+}
+
+/* create slot1 slot2...dir and attrs */
+static int slot_sub_create(void)
+{
+    int ret, slot_num;
+
+    check_p(g_drv->get_dev_number);
+    slot_num = g_drv->get_dev_number(WB_MAIN_DEV_SLOT, WB_MINOR_DEV_NONE);
+    g_slot.slot_number = slot_num;
+    if (slot_num <= 0) {
+        SLOT_DBG("Warning:slot number = %d \n", slot_num);
+        return 0;
+    }
+    ret = slot_sub_create_kobj_and_attrs(&g_slot_obj->kobj, slot_num);
+    return ret;
+}
+
+/**
+ * slot_sub_remove - delete slot1 slot2...dir and attrs
+ */
+static void slot_sub_remove(void)
+{
+    unsigned int slot_index;
+
+    if (g_slot.slot) {
+       for (slot_index = g_slot.slot_number; slot_index > 0; slot_index--) {
+           slot_sub_single_remove_kobj_and_attrs(slot_index);
+       }
+       kfree(g_slot.slot);
+    }
+    mem_clear(&g_slot, sizeof(struct slot_t));
+    return ;
+}
+
+/* create slot dir  and num_slots attr */
+static int slot_root_create(void)
+{
+    g_slot_obj = wb_plat_kobject_create(SLOT_SYSFS_NAME, NULL);
+    if (!g_slot_obj) {
+        SLOT_ERR("wb_plat_kobject_create slot error!\n");
+        return -ENOMEM;
+    }
+
+    if (sysfs_create_group(&g_slot_obj->kobj, &slot_root_attr_group) != 0) {
+        wb_plat_kobject_delete(&g_slot_obj);
+        SLOT_ERR("create slot dir attrs error!\n");
+        return -EBADRQC;
+    }
+    SLOT_DBG("wb_plat_kobject_create slot directory and attribute success.\n");
+    return 0;
+}
+
+static void slot_root_remove(void)
+{
+    if (g_slot_obj) {
+        sysfs_remove_group(&g_slot_obj->kobj, &slot_root_attr_group);
+        wb_plat_kobject_delete(&g_slot_obj);
+        SLOT_DBG("delete slot root success\n");
+    }
+
+    return;
+}
+
+static int wb_slot_init(void)
+{
+    int ret;
+
+    SLOT_INFO("wb_slot_init...\n");
+    g_drv = dfd_plat_driver_get();
+    check_p(g_drv);
+
+    ret = slot_root_create();
+    if (ret < 0) {
+        goto slot_root_error;
+    }
+
+    ret = slot_sub_create();
+    if (ret < 0) {
+        goto slot_sub_error;
+    }
+
+    ret = slot_child_obj_create();
+    if (ret < 0) {
+        goto slot_child_obj_error;
+    }
+
+    SLOT_INFO("wb_slot_init ok.\n");
+    return 0;
+slot_child_obj_error:
+    slot_sub_remove();
+slot_sub_error:
+    slot_root_remove();
+slot_root_error:
+    return ret;
+}
+
+static void wb_slot_exit(void)
+{
+    slot_child_obj_remove();
+    slot_sub_remove();
+    slot_root_remove();
+    SLOT_INFO("wb_slot_exit ok.\n");
+    return ;
+}
+
+module_init(wb_slot_init);
+module_exit(wb_slot_exit);
+module_param(g_loglevel, int, 0644);
+MODULE_PARM_DESC(g_loglevel, "the log level(info=0x1, err=0x2, dbg=0x4).\n");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
+MODULE_DESCRIPTION("slot sysfs driver");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/plat_switch.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/plat_switch.c
new file mode 100644
index 000000000..fea008b41
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/plat_switch.c
@@ -0,0 +1,130 @@
+/*
+ * plat_switch.c
+ *
+ * This module create a kset in sysfs called /sys/wb_plat
+ * Then other switch kobjects are created and assigned to this kset,
+ * such as "board", "cpld", "fan", "psu", "sff", ...
+ *
+ */
+#include "./include/plat_switch.h"
+
+#define SWITCH_INFO(fmt, args...)  LOG_INFO("switch: ", fmt, ##args)
+#define SWITCH_ERR(fmt, args...)   LOG_ERR("switch: ", fmt, ##args)
+#define SWITCH_DBG(fmt, args...)   LOG_DBG("switch: ", fmt, ##args)
+
+static int g_loglevel = 0;
+
+static ssize_t switch_attr_show(struct kobject *kobj,
+                   struct attribute *attr, char *buf)
+{
+    struct switch_attribute *attribute;
+    struct switch_obj *device;
+
+    attribute = to_switch_attr(attr);
+    device = to_switch_obj(kobj);
+
+    if (!attribute->show)
+        return -ENOSYS;
+
+    return attribute->show(device, attribute, buf);
+}
+
+static ssize_t switch_attr_store(struct kobject *kobj,
+                   struct attribute *attr, const char *buf, size_t len)
+{
+    struct switch_attribute *attribute;
+    struct switch_obj *obj;
+
+    attribute = to_switch_attr(attr);
+    obj = to_switch_obj(kobj);
+
+    if (!attribute->store)
+        return -ENOSYS;
+
+    return attribute->store(obj, attribute, buf, len);
+}
+
+static const struct sysfs_ops switch_sysfs_ops = {
+    .show = switch_attr_show,
+    .store = switch_attr_store,
+};
+
+static void switch_obj_release(struct kobject *kobj)
+{
+    struct switch_obj *obj;
+
+    obj = to_switch_obj(kobj);
+    kfree(obj);
+}
+
+static struct kobj_type switch_ktype = {
+    .sysfs_ops = &switch_sysfs_ops,
+    .release = switch_obj_release,
+};
+
+static struct kset *switch_kset;
+
+struct switch_obj *wb_plat_kobject_create(const char *name, struct kobject *parent)
+{
+    struct switch_obj *obj = NULL;
+    int ret = 0;
+
+    obj = kzalloc(sizeof(*obj), GFP_KERNEL);
+    if (!obj) {
+        SWITCH_DBG("wb_plat_kobject_create %s kzalloc error", name);
+        return NULL;
+   }
+
+    obj->kobj.kset = switch_kset;
+
+    ret = kobject_init_and_add(&obj->kobj, &switch_ktype, parent, "%s", name);
+    if (ret) {
+        kobject_put(&obj->kobj);
+        SWITCH_DBG("kobject_init_and_add %s error", name);
+        return NULL;
+    }
+
+    return obj;
+}
+
+void wb_plat_kobject_delete(struct switch_obj **obj)
+{
+    if (*obj) {
+        SWITCH_DBG("%s delete %s.\n", (*obj)->kobj.parent->name, (*obj)->kobj.name);
+        kobject_put(&((*obj)->kobj));
+        *obj = NULL;
+    }
+}
+
+static int __init switch_init(void)
+{
+    SWITCH_INFO("...\n");
+
+    switch_kset = kset_create_and_add("wb_plat", NULL, NULL);
+    if (!switch_kset) {
+        SWITCH_ERR("create switch_kset error.\n");
+        return -ENOMEM;
+    }
+
+    SWITCH_INFO("ok.\n");
+    return 0;
+}
+
+static void __exit switch_exit(void)
+{
+    if (switch_kset) {
+        kset_unregister(switch_kset);
+    }
+
+    SWITCH_INFO("ok.\n");
+}
+
+module_init(switch_init);
+module_exit(switch_exit);
+EXPORT_SYMBOL(wb_plat_kobject_create);
+EXPORT_SYMBOL(wb_plat_kobject_delete);
+module_param(g_loglevel, int, 0644);
+MODULE_PARM_DESC(g_loglevel, "the log level(info=0x1, err=0x2, dbg=0x4).\n");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
+MODULE_DESCRIPTION("Switch driver");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/platform_common.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/platform_common.h
new file mode 100644
index 000000000..9e4a4fae0
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/platform_common.h
@@ -0,0 +1,74 @@
+#ifndef __PLATFORM_COMMON_H__
+#define __PLATFORM_COMMON_H__
+
+#include<linux/kernel.h>
+#include <linux/module.h>
+#include <linux/i2c.h>
+#include <linux/string.h>
+
+#define mem_clear(data, size) memset((data), 0, (size))
+
+typedef enum {
+    DBG_START,
+    DBG_VERBOSE,
+    DBG_KEY,
+    DBG_WARN,
+    DBG_ERROR,
+    DBG_END,
+} dbg_level_t;
+
+ typedef struct dfd_i2c_dev_s {
+     int bus;
+     int addr;
+ } dfd_i2c_dev_t;
+
+typedef struct  dfd_dev_head_info_s {
+    uint8_t   ver;
+    uint8_t   flag;
+    uint8_t   hw_ver;
+    uint8_t   type;
+    int16_t   tlv_len;
+} dfd_dev_head_info_t;
+
+typedef struct dfd_dev_tlv_info_s {
+    uint8_t  type;
+    uint8_t  len;
+    uint8_t  data[0];
+} dfd_dev_tlv_info_t;
+
+typedef enum dfd_dev_info_type_e {
+    DFD_DEV_INFO_TYPE_MAC        = 1,
+    DFD_DEV_INFO_TYPE_NAME       = 2,
+    DFD_DEV_INFO_TYPE_SN         = 3,
+    DFD_DEV_INFO_TYPE_PWR_CONS   = 4,
+    DFD_DEV_INFO_TYPE_HW_INFO    = 5,
+    DFD_DEV_INFO_TYPE_DEV_TYPE   = 6,
+} dfd_dev_tlv_type_t;
+
+extern int debuglevel;
+extern s32 platform_i2c_smbus_read_byte_data(const struct i2c_client *client, u8 command);
+extern s32 platform_i2c_smbus_read_i2c_block_data(const struct i2c_client *client,
+                u8 command, u8 length, u8 *values);
+extern s32 platform_i2c_smbus_read_word_data(const struct i2c_client *client, u8 command);
+
+#define DBG_DEBUG(fmt, arg...)  do { \
+    if ( debuglevel > DBG_START && debuglevel < DBG_ERROR) { \
+          printk(KERN_INFO "[DEBUG]:<%s, %d>:"fmt, __FUNCTION__, __LINE__, ##arg); \
+    } else if ( debuglevel >= DBG_ERROR ) {   \
+        printk(KERN_ERR "[DEBUG]:<%s, %d>:"fmt, __FUNCTION__, __LINE__, ##arg); \
+    } else {    } \
+} while (0)
+
+#define DBG_INFO(fmt, arg...)  do { \
+     if ( debuglevel > DBG_KEY) {  \
+        printk(KERN_INFO "[INFO]:<%s, %d>:"fmt, __FUNCTION__, __LINE__, ##arg); \
+       } \
+ } while (0)
+
+#define DBG_ERROR(fmt, arg...)  do { \
+     if ( debuglevel > DBG_START) {  \
+        printk(KERN_ERR "[ERROR]:<%s, %d>:"fmt, __FUNCTION__, __LINE__, ##arg); \
+       } \
+ } while (0)
+
+#endif
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/platform_common_module.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/platform_common_module.c
new file mode 100644
index 000000000..189a3aa05
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/platform_common_module.c
@@ -0,0 +1,210 @@
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/sysfs.h>
+#include <linux/slab.h>
+#include <linux/stat.h>
+#include <linux/uaccess.h>
+#include <linux/init.h>
+#include <linux/fs.h>
+#include <linux/i2c.h>
+#include <linux/i2c-mux.h>
+#include <linux/version.h>
+#if LINUX_VERSION_CODE < KERNEL_VERSION(4,19,152)
+#include <linux/i2c-mux-gpio.h>
+#else
+#include <linux/platform_data/i2c-mux-gpio.h>
+#endif
+#include <linux/platform_device.h>
+#include <linux/delay.h>
+#include <linux/i2c-smbus.h>
+#include <linux/string.h>
+#include "platform_common.h"
+#include "dfd_tlveeprom.h"
+
+#define PLATFORM_I2C_RETRY_TIMES    3
+
+#define DFD_TLVEEPROM_I2C_BUS       (0)
+#define DFD_TLVEEPROM_I2C_ADDR      (0x56)
+#define DFD_E2PROM_MAX_LEN          (256)
+#define DFD_CARDTYPE_EXT_TLVLEN     (4)
+
+#define PLATFORM_CARDTYPE_RETRY_CNT      (10)
+#define PLATFORM_CARDTYPE_RETRY_TIMES    (1000)
+
+int debuglevel = 0;
+module_param(debuglevel, int, S_IRUGO | S_IWUSR);
+
+static int dfd_my_type = 0;
+module_param(dfd_my_type, int, S_IRUGO | S_IWUSR);
+
+int g_common_debug_error = 0;
+module_param(g_common_debug_error, int, S_IRUGO | S_IWUSR);
+
+int g_common_debug_verbose = 0;
+module_param(g_common_debug_verbose, int, S_IRUGO | S_IWUSR);
+
+uint32_t dfd_my_type_i2c_bus = 0;
+module_param(dfd_my_type_i2c_bus, int, S_IRUGO | S_IWUSR);
+
+uint32_t dfd_my_type_i2c_addr = 0;
+module_param(dfd_my_type_i2c_addr, int, S_IRUGO | S_IWUSR);
+
+#define PLATFORM_COMMON_DEBUG_VERBOSE(fmt, args...) do {                                        \
+    if (g_common_debug_verbose) { \
+        printk(KERN_ERR "[PLATFORM_COMMON][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define PLATFORM_COMMON_DEBUG_ERROR(fmt, args...) do {                                        \
+    if (g_common_debug_error) { \
+        printk(KERN_ERR "[PLATFORM_COMMON][ERROR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+static int32_t dfd_i2c_read(char *dev, uint32_t addr, uint32_t offset_addr, unsigned char *
+buf, int32_t size)
+{
+    struct file *fp;
+    struct i2c_client client;
+    int i ,j;
+    int rv;
+    s32 val_t;
+
+    val_t = -1;
+    rv = 0;
+    fp = filp_open(dev, O_RDWR, S_IRUSR | S_IWUSR);
+    if (IS_ERR(fp)) {
+        DBG_ERROR("i2c open fail.\n");
+        PLATFORM_COMMON_DEBUG_ERROR("i2c open fail.\n");
+        return -1;
+    }
+    memcpy(&client, fp->private_data, sizeof(struct i2c_client));
+    client.addr = addr;
+    for (j = 0 ;j < size ;j++){
+        for (i = 0; i < PLATFORM_I2C_RETRY_TIMES; i++) {
+          if ((val_t = i2c_smbus_read_byte_data(&client, (offset_addr + j)))< 0) {
+              DBG_DEBUG("read try(%d)time  offset_addr:%x \n", i, offset_addr);
+              continue;
+          }  else {
+              * (buf + j) = val_t;
+              break;
+          }
+        }
+        if (val_t < 0) {
+            rv = -1;
+            break;
+        }
+    }
+    filp_close(fp, NULL);
+    return rv;
+}
+
+static int dfd_tlvinfo_get_cardtype(void)
+{
+    char i2c_path[16] = {0};
+    int ret;
+    int cardtype;
+    u_int8_t eeprom[DFD_E2PROM_MAX_LEN];
+    dfd_i2c_dev_t i2c_dev;
+    uint8_t buf[DFD_CARDTYPE_EXT_TLVLEN];
+    uint8_t len;
+    dfd_tlv_type_t tlv_type;
+
+    if (dfd_my_type_i2c_bus != 0) {
+        i2c_dev.bus = dfd_my_type_i2c_bus;
+    } else {
+        i2c_dev.bus = DFD_TLVEEPROM_I2C_BUS;
+    }
+
+    if (dfd_my_type_i2c_addr != 0) {
+        i2c_dev.addr = dfd_my_type_i2c_addr;
+    } else {
+        i2c_dev.addr = DFD_TLVEEPROM_I2C_ADDR;
+    }
+    snprintf(i2c_path, sizeof(i2c_path), "/dev/i2c-%d", i2c_dev.bus);
+    PLATFORM_COMMON_DEBUG_VERBOSE("Read device eeprom info:(dev:%s, addr:%02x).\n", i2c_path, i2c_dev.addr);
+
+    ret = dfd_i2c_read(i2c_path, i2c_dev.addr, 0, eeprom, DFD_E2PROM_MAX_LEN);
+    if (ret != 0) {
+        DBG_ERROR("Read eeprom info error(dev: %s, addr: %02x).\n", i2c_path, i2c_dev.addr);
+        PLATFORM_COMMON_DEBUG_ERROR("Read eeprom info error(dev: %s, addr: %02x).\n", i2c_path, i2c_dev.addr);
+        return ret;
+    }
+
+    tlv_type.main_type = TLV_CODE_VENDOR_EXT;
+    tlv_type.ext_type = DFD_TLVINFO_EXT_TLV_TYPE_DEV_TYPE;
+    len = sizeof(buf);
+    mem_clear(buf, len);
+    ret = dfd_tlvinfo_get_e2prom_info(eeprom, DFD_E2PROM_MAX_LEN, &tlv_type, buf, &len);
+    if (ret) {
+        DBG_ERROR("dfd_tlvinfo_get_e2prom_info failed ret %d.\n", ret);
+        return -1;
+    }
+    for (ret = 0; ret < 4; ret++) {
+        DBG_DEBUG("buf 0x%02x.\n", buf[ret]);
+    }
+
+    cardtype = ntohl(*((uint32_t *)buf));
+    DBG_DEBUG("cardtype 0x%x.\n", cardtype);
+    return cardtype;
+}
+
+static int __dfd_get_my_card_type(void)
+{
+    return dfd_tlvinfo_get_cardtype();
+}
+
+int dfd_get_my_card_type(void)
+{
+    int type;
+    int cnt;
+
+    if (dfd_my_type != 0) {
+        DBG_DEBUG("my_type = 0x%x\r\n", dfd_my_type);
+        return dfd_my_type;
+    }
+
+    cnt = PLATFORM_CARDTYPE_RETRY_CNT;
+    while (cnt--) {
+        type = __dfd_get_my_card_type();
+        if (type < 0) {
+            PLATFORM_COMMON_DEBUG_ERROR("__dfd_get_my_card_type fail cnt %d, ret %d.\n", cnt, type);
+            msleep(PLATFORM_CARDTYPE_RETRY_TIMES);
+            continue;
+        }
+        PLATFORM_COMMON_DEBUG_VERBOSE("success to get type 0x%x.\n", type);
+        break;
+    }
+
+    dfd_my_type = type;
+    return dfd_my_type;
+}
+EXPORT_SYMBOL(dfd_get_my_card_type);
+
+static int __init platform_common_init(void)
+{
+    int ret;
+
+    PLATFORM_COMMON_DEBUG_VERBOSE("Enter.\n");
+    ret = dfd_get_my_card_type();
+    if (ret <= 0) {
+        PLATFORM_COMMON_DEBUG_ERROR("dfd_get_my_card_type failed, ret %d.\n", ret);
+        printk(KERN_ERR "Warning: Device type get failed, please check the TLV-EEPROM!\n");
+        return -1;
+    }
+
+    PLATFORM_COMMON_DEBUG_VERBOSE("Leave success type 0x%x.\n", ret);
+    return 0;
+}
+
+static void __exit platform_common_exit(void)
+{
+    PLATFORM_COMMON_DEBUG_VERBOSE("Exit.\n");
+}
+
+module_init(platform_common_init);
+module_exit(platform_common_exit);
+
+MODULE_DESCRIPTION("Platform Support");
+MODULE_AUTHOR("support");
+MODULE_LICENSE("GPL");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_fpga_i2c_bus_drv.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_fpga_i2c_bus_drv.c
new file mode 100644
index 000000000..22cd9e16d
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_fpga_i2c_bus_drv.c
@@ -0,0 +1,1135 @@
+/*
+ * fpga_i2c_bus_drv.c
+ * ko to create fpga i2c adapter
+ */
+#include <linux/platform_device.h>
+#include <linux/interrupt.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/version.h>
+#if LINUX_VERSION_CODE < KERNEL_VERSION(3,12,0)
+#include <linux/of_i2c.h>
+#endif
+#include <linux/delay.h>
+#include <linux/sched.h>
+#include <linux/init.h>
+#include <linux/i2c.h>
+#include <linux/io.h>
+#include <linux/of.h>
+#include "fpga_i2c.h"
+
+#include <linux/fs.h>
+#include <linux/uaccess.h>
+#include <linux/uio.h>
+
+#define DRV_NAME                      "wb-fpga-i2c"
+#define DRV_VERSION                   "1.0"
+#define DTS_NO_CFG_FLAG               (0)
+
+extern int i2c_device_func_write(const char *path, uint32_t pos, uint8_t *val, size_t size);
+extern int i2c_device_func_read(const char *path, uint32_t pos, uint8_t *val, size_t size);
+extern int pcie_device_func_read(const char *path, uint32_t offset, uint8_t *buf, size_t count);
+extern int pcie_device_func_write(const char *path, uint32_t offset, uint8_t *buf, size_t count);
+extern int io_device_func_write(const char *path, uint32_t pos, uint8_t *val, size_t size);
+extern int io_device_func_read(const char *path, uint32_t pos, uint8_t *val, size_t size);
+extern int spi_device_func_read(const char *path, uint32_t offset, uint8_t *buf, size_t count);
+extern int spi_device_func_write(const char *path, uint32_t offset, uint8_t *buf, size_t count);
+
+#define FPGA_I2C_STRETCH_TIMEOUT  (0x01)
+#define FPGA_I2C_DEADLOCK_FAILED  (0x02)
+#define FPGA_I2C_SLAVE_NO_RESPOND (0x03)
+#define FPGA_I2C_STA_FAIL         (0x01)
+#define FPGA_I2C_STA_BUSY         (0x02)
+#define FPGA_I2C_CTL_BG           (0x01 << 1)
+#define FPGA_I2C_CTL_NO_REG       (0x01 << 2)
+#define FPGA_I2C_CTL_RD           (0x01)
+#define FPGA_I2C_CTL_WR           (0x00)
+#define I2C_READ_MSG_NUM          (0x02)
+#define I2C_WRITE_MSG_NUM         (0x01)
+#define FPGA_REG_WIDTH            (4)
+
+#define SYMBOL_I2C_DEV_MODE       (1)
+#define FILE_MODE                 (2)
+#define SYMBOL_PCIE_DEV_MODE      (3)
+#define SYMBOL_IO_DEV_MODE        (4)
+#define SYMBOL_SPI_DEV_MODE       (5)
+
+int g_wb_fpga_i2c_debug = 0;
+int g_wb_fpga_i2c_error = 0;
+
+module_param(g_wb_fpga_i2c_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_fpga_i2c_error, int, S_IRUGO | S_IWUSR);
+
+#define FPGA_I2C_VERBOSE(fmt, args...) do {                                        \
+    if (g_wb_fpga_i2c_debug) { \
+        printk(KERN_INFO "[FPFA_I2C_BUS][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define FPGA_I2C_ERROR(fmt, args...) do {                                        \
+    if (g_wb_fpga_i2c_error) { \
+        printk(KERN_ERR "[FPFA_I2C_BUS][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+static int fpga_file_read(const char *path, uint32_t pos, uint8_t *val, size_t size)
+{
+    int ret;
+    struct file *filp;
+    loff_t tmp_pos;
+
+    struct kvec iov = {
+        .iov_base = val,
+        .iov_len = min_t(size_t, size, MAX_RW_COUNT),
+    };
+    struct iov_iter iter;
+
+    filp = filp_open(path, O_RDONLY, 0);
+    if (IS_ERR(filp)) {
+        FPGA_I2C_ERROR("read open failed errno = %ld\r\n", -PTR_ERR(filp));
+        filp = NULL;
+        goto exit;
+    }
+
+    tmp_pos = (loff_t)pos;
+    iov_iter_kvec(&iter, ITER_DEST, &iov, 1, iov.iov_len);
+    ret = vfs_iter_read(filp, &iter, &tmp_pos, 0);
+    if (ret < 0) {
+        FPGA_I2C_ERROR("vfs_iter_read failed, path=%s, addr=0x%x, size=%ld, ret=%d\r\n", path, pos, size, ret);
+        goto exit;
+    }
+
+    filp_close(filp, NULL);
+
+    return ret;
+
+exit:
+    if (filp != NULL) {
+        filp_close(filp, NULL);
+    }
+
+    return -1;
+}
+
+static int fpga_file_write(const char *path, uint32_t pos, uint8_t *val, size_t size)
+{
+    int ret;
+    struct file *filp;
+    loff_t tmp_pos;
+
+    struct kvec iov = {
+        .iov_base = val,
+        .iov_len = min_t(size_t, size, MAX_RW_COUNT),
+    };
+    struct iov_iter iter;
+
+    filp = filp_open(path, O_RDWR, 777);
+    if (IS_ERR(filp)) {
+        FPGA_I2C_ERROR("write open failed errno = %ld\r\n", -PTR_ERR(filp));
+        filp = NULL;
+        goto exit;
+    }
+
+    tmp_pos = (loff_t)pos;
+    iov_iter_kvec(&iter, ITER_SOURCE, &iov, 1, iov.iov_len);
+    ret = vfs_iter_write(filp, &iter, &tmp_pos, 0);
+    if (ret < 0) {
+        FPGA_I2C_ERROR("vfs_iter_write failed, path=%s, addr=0x%x, size=%ld, ret=%d\r\n", path, pos, size, ret);
+        goto exit;
+    }
+    vfs_fsync(filp, 1);
+    filp_close(filp, NULL);
+
+    return ret;
+
+exit:
+    if (filp != NULL) {
+        filp_close(filp, NULL);
+    }
+
+    return -1;
+}
+
+static int fpga_device_write(fpga_i2c_dev_t *fpga_i2c, uint32_t pos, uint8_t *val, size_t size)
+{
+    int ret;
+
+    switch (fpga_i2c->i2c_func_mode) {
+    case SYMBOL_I2C_DEV_MODE:
+        ret = i2c_device_func_write(fpga_i2c->dev_name, pos, val, size);
+        break;
+    case FILE_MODE:
+        ret = fpga_file_write(fpga_i2c->dev_name, pos, val, size);
+        break;
+    case SYMBOL_PCIE_DEV_MODE:
+        ret = pcie_device_func_write(fpga_i2c->dev_name, pos, val, size);
+        break;
+    case SYMBOL_IO_DEV_MODE:
+        ret = io_device_func_write(fpga_i2c->dev_name, pos, val, size);
+        break;
+    case SYMBOL_SPI_DEV_MODE:
+        ret = spi_device_func_write(fpga_i2c->dev_name, pos, val, size);
+        break;
+    default:
+        FPGA_I2C_ERROR("err func_mode %d, write failed.\n", fpga_i2c->i2c_func_mode);
+        return -EINVAL;
+    }
+    return ret;
+
+}
+
+static int fpga_device_read(fpga_i2c_dev_t *fpga_i2c, uint32_t pos, uint8_t *val, size_t size)
+{
+    int ret;
+
+    switch (fpga_i2c->i2c_func_mode) {
+    case SYMBOL_I2C_DEV_MODE:
+        ret = i2c_device_func_read(fpga_i2c->dev_name, pos, val, size);
+        break;
+    case FILE_MODE:
+        ret = fpga_file_read(fpga_i2c->dev_name, pos, val, size);
+        break;
+    case SYMBOL_PCIE_DEV_MODE:
+        ret = pcie_device_func_read(fpga_i2c->dev_name, pos, val, size);
+        break;
+    case SYMBOL_IO_DEV_MODE:
+        ret = io_device_func_read(fpga_i2c->dev_name, pos, val, size);
+        break;
+    case SYMBOL_SPI_DEV_MODE:
+        ret = spi_device_func_read(fpga_i2c->dev_name, pos, val, size);
+        break;
+    default:
+        FPGA_I2C_ERROR("err func_mode %d, read failed.\n", fpga_i2c->i2c_func_mode);
+        return -EINVAL;
+    }
+
+    return ret;
+}
+
+static int little_endian_dword_to_buf(uint8_t *buf, int len, uint32_t dword)
+{
+    uint8_t tmp_buf[FPGA_REG_WIDTH];
+
+    if (len < 4) {
+        FPGA_I2C_ERROR("Not enough buf, dword to buf: len[%d], dword[0x%x]\n", len, dword);
+        return -1;
+    }
+
+    mem_clear(tmp_buf, sizeof(tmp_buf));
+    tmp_buf[0] = dword & 0xff;
+    tmp_buf[1] = (dword >> 8) & 0xff;
+    tmp_buf[2] = (dword >> 16) & 0xff;
+    tmp_buf[3] = (dword >> 24) & 0xff;
+
+    memcpy(buf, tmp_buf, sizeof(tmp_buf));
+
+    return 0;
+}
+
+static int little_endian_buf_to_dword(uint8_t *buf, int len, uint32_t *dword)
+{
+    int i;
+    uint32_t dword_tmp;
+
+    if (len != FPGA_REG_WIDTH) {
+        FPGA_I2C_ERROR("buf length %d error, can't convert to dowrd.\n", len);
+        return -1;
+    }
+    dword_tmp = 0;
+    for (i = 0; i < FPGA_REG_WIDTH; i++) {
+        dword_tmp |= (buf[i] << (i * 8));
+    }
+    *dword = dword_tmp;
+    return 0;
+}
+
+static int fpga_reg_write(fpga_i2c_dev_t *fpga_i2c, uint32_t addr, uint8_t val)
+{
+    int ret;
+
+    ret = fpga_device_write(fpga_i2c, addr, &val, sizeof(uint8_t));
+    if (ret < 0) {
+        FPGA_I2C_ERROR("fpga reg write failed, dev name:%s, offset:0x%x, value:0x%x.\n",
+            fpga_i2c->dev_name, addr, val);
+        return -EIO;
+    }
+
+    FPGA_I2C_VERBOSE("fpga reg write success, dev name:%s, offset:0x%x, value:0x%x.\n",
+        fpga_i2c->dev_name, addr, val);
+    return 0;
+}
+
+static int fpga_reg_read(fpga_i2c_dev_t *fpga_i2c, uint32_t addr, uint8_t *val)
+{
+    int ret;
+
+    ret = fpga_device_read(fpga_i2c, addr, val, sizeof(uint8_t));
+    if (ret < 0) {
+        FPGA_I2C_ERROR("fpga reg read failed, dev name:%s, offset:0x%x\n",
+            fpga_i2c->dev_name, addr);
+        return -EIO;
+    }
+
+    FPGA_I2C_VERBOSE("fpga reg read success, dev name:%s, offset:0x%x, value:0x%x.\n",
+        fpga_i2c->dev_name, addr, *val);
+    return 0;
+}
+
+static int fpga_data_write(fpga_i2c_dev_t *fpga_i2c, uint32_t addr, uint8_t *val, size_t size)
+{
+    int ret;
+
+    ret = fpga_device_write(fpga_i2c, addr, val, size);
+    if (ret < 0) {
+        FPGA_I2C_ERROR("fpga data write failed, dev name:%s, offset:0x%x, size:%lu.\n",
+            fpga_i2c->dev_name, addr, size);
+        return -EIO;
+    }
+
+    FPGA_I2C_VERBOSE("fpga data write success, dev name:%s, offset:0x%x, size:%lu.\n",
+        fpga_i2c->dev_name, addr, size);
+    return 0;
+}
+
+static int fpga_data_read(fpga_i2c_dev_t *fpga_i2c, uint32_t addr, uint8_t *val, size_t size)
+{
+    int ret;
+
+    ret = fpga_device_read(fpga_i2c, addr, val, size);
+    if (ret < 0) {
+        FPGA_I2C_ERROR("fpga data read failed, dev name:%s, offset:0x%x, size:%lu.\n",
+            fpga_i2c->dev_name, addr, size);
+        return -EIO;
+    }
+
+    FPGA_I2C_VERBOSE("fpga data read success, dev name:%s, offset:0x%x, size:%lu.\n",
+        fpga_i2c->dev_name, addr, size);
+    return 0;
+}
+
+static int fpga_reg_write_32(fpga_i2c_dev_t *fpga_i2c, uint32_t addr, uint32_t val)
+{
+    int ret;
+    uint8_t buf[FPGA_REG_WIDTH];
+
+    mem_clear(buf, sizeof(buf));
+    little_endian_dword_to_buf(buf, sizeof(buf), val);
+    ret = fpga_device_write(fpga_i2c, addr, buf, sizeof(buf));
+    if (ret < 0) {
+        FPGA_I2C_ERROR("fpga reg write failed, dev name: %s, offset: 0x%x, value: 0x%x.\n",
+            fpga_i2c->dev_name, addr, val);
+        return -EIO;
+    }
+
+    FPGA_I2C_VERBOSE("fpga reg write success, dev name: %s, offset: 0x%x, value: 0x%x.\n",
+        fpga_i2c->dev_name, addr, val);
+    return 0;
+}
+
+static int fpga_reg_read_32(fpga_i2c_dev_t *fpga_i2c, uint32_t addr, uint32_t *val)
+{
+    int ret;
+    uint8_t buf[FPGA_REG_WIDTH];
+
+    mem_clear(buf, sizeof(buf));
+    ret = fpga_device_read(fpga_i2c, addr, buf, sizeof(buf));
+    if (ret < 0) {
+        FPGA_I2C_ERROR("fpga reg read failed, dev name: %s, offset: 0x%x, ret: %d\n",
+            fpga_i2c->dev_name, addr, ret);
+        return -EIO;
+    }
+    little_endian_buf_to_dword(buf, sizeof(buf), val);
+    FPGA_I2C_VERBOSE("fpga reg read success, dev name: %s, offset: 0x%x, value: 0x%x.\n",
+        fpga_i2c->dev_name, addr, *val);
+    return 0;
+}
+
+static int fpga_i2c_is_busy(fpga_i2c_dev_t *fpga_i2c)
+{
+    uint8_t val;
+    int ret;
+    fpga_i2c_reg_t *reg;
+
+    reg = &fpga_i2c->reg;
+    ret = fpga_reg_read(fpga_i2c, reg->i2c_status, &val);
+    if (ret < 0 ) {
+        FPGA_I2C_ERROR("read fpga i2c status reg failed, reg addr:0x%x, ret:%d.\n",
+            reg->i2c_status, ret);
+        return 1;
+    }
+    if (val & FPGA_I2C_STA_BUSY) {
+        FPGA_I2C_ERROR("fpga i2c status busy, reg addr:0x%x, value:0x%x.\n",
+            reg->i2c_status, val);
+        return 1;
+    } else {
+        return 0;
+    }
+}
+
+static int fpga_i2c_wait(fpga_i2c_dev_t *fpga_i2c)
+{
+    int retry_cnt;
+
+    retry_cnt = FPGA_I2C_XFER_TIME_OUT/FPGA_I2C_SLEEP_TIME;
+    while (retry_cnt--) {
+        if (fpga_i2c_is_busy(fpga_i2c)) {
+            usleep_range(FPGA_I2C_SLEEP_TIME, FPGA_I2C_SLEEP_TIME + 1);
+        } else {
+            return 0;
+        }
+    }
+
+    return -EBUSY;
+}
+
+static int fpga_i2c_check_status(fpga_i2c_dev_t *fpga_i2c)
+{
+    uint8_t data;
+    int ret;
+    fpga_i2c_reg_t *reg;
+
+    reg = &fpga_i2c->reg;
+
+    ret = fpga_reg_read(fpga_i2c, reg->i2c_status, &data);
+    if (ret) {
+        FPGA_I2C_ERROR("read fpga i2c status reg failed, reg addr:0x%x, ret:%d.\n",
+            reg->i2c_status, ret);
+        return ret;
+    }
+
+    if (data & FPGA_I2C_STA_FAIL) {
+        FPGA_I2C_ERROR("fpga i2c status error, reg addr:0x%x, value:%d.\n",
+            reg->i2c_status, data);
+
+        /* read i2c_err_vec to confirm err type*/
+        if (reg->i2c_err_vec != DTS_NO_CFG_FLAG) {
+            /* read i2c_err_vec reg */
+            ret = fpga_reg_read(fpga_i2c, reg->i2c_err_vec, &data);
+            if (ret) {
+                FPGA_I2C_ERROR("read fpga i2c err vec reg failed, reg addr:0x%x, ret:%d.\n",
+                    reg->i2c_err_vec, ret);
+                return ret;
+            }
+            FPGA_I2C_VERBOSE("get i2c err vec, reg addr:0x%x, read value:0x%x\n", reg->i2c_err_vec, data);
+
+            /* match i2c_err_vec reg value and err type*/
+            switch (data) {
+            case FPGA_I2C_STRETCH_TIMEOUT:
+                ret = -ETIMEDOUT;
+                break;
+            case FPGA_I2C_DEADLOCK_FAILED:
+                ret = -EDEADLK;
+                break;
+            case FPGA_I2C_SLAVE_NO_RESPOND:
+                ret = -ENXIO;
+                break;
+            default:
+                FPGA_I2C_ERROR("get i2c err vec value out of range, reg addr:0x%x, read value:0x%x\n",
+                    reg->i2c_err_vec, data);
+                ret = -EREMOTEIO;
+                break;
+            }
+            return ret;
+        } else {
+            FPGA_I2C_VERBOSE("i2c err vec not config, fpga i2c status check return -1\n");
+            return -EREMOTEIO;
+        }
+    }
+    return 0;
+}
+
+static int fpga_i2c_do_work(fpga_i2c_dev_t *fpga_i2c, int i2c_addr,
+        unsigned char *data, uint32_t length, int is_read)
+{
+    int ret, i;
+    uint8_t op, i2c_reg_addr_len;
+    uint8_t *i2c_read_addr_buf;
+    fpga_i2c_reg_t *reg;
+    fpga_i2c_reg_addr_t *i2c_addr_desc;
+
+    reg = &fpga_i2c->reg;
+
+    ret = fpga_reg_write(fpga_i2c, reg->i2c_slave, i2c_addr);
+    if (ret) {
+        FPGA_I2C_ERROR("write fpga i2c slave reg failed, reg addr:0x%x, value:0x%x, ret:%d.\n",
+            reg->i2c_slave, i2c_addr, ret);
+        goto exit;
+    }
+
+    i2c_addr_desc = &fpga_i2c->i2c_addr_desc;
+    i2c_reg_addr_len = i2c_addr_desc->reg_addr_len;
+    i2c_read_addr_buf = &i2c_addr_desc->read_reg_addr[0];
+
+    if (i2c_reg_addr_len > 0 && i2c_reg_addr_len <= I2C_REG_MAX_WIDTH) {
+        ret = fpga_data_write(fpga_i2c, reg->i2c_reg, i2c_read_addr_buf, i2c_reg_addr_len);
+        if (ret) {
+            FPGA_I2C_ERROR("write fpga i2c offset reg failed, fpga addr:0x%x, reg len:%d, ret:%d\n",
+                reg->i2c_reg, i2c_reg_addr_len, ret);
+            for (i = 0; i < i2c_reg_addr_len; i++) {
+                FPGA_I2C_ERROR("%02d : %02x\n", i, i2c_read_addr_buf[i]);
+            }
+            goto exit;
+        }
+    }
+
+    ret = fpga_reg_write_32(fpga_i2c, reg->i2c_data_len, length);
+    if (ret) {
+        FPGA_I2C_ERROR("write fpga i2c date len reg failed, reg addr:0x%x, value:0x%x, ret:%d.\n",
+            reg->i2c_data_len, length, ret);
+        goto exit;
+    }
+
+    ret = fpga_reg_write(fpga_i2c, reg->i2c_reg_len, i2c_reg_addr_len);
+    if (ret) {
+        FPGA_I2C_ERROR("write fpga i2c reg len reg failed, reg addr:0x%x, value:0x%x, ret:%d.\n",
+            reg->i2c_reg_len, i2c_reg_addr_len, ret);
+        goto exit;
+    }
+
+    if (is_read) {
+        op = FPGA_I2C_CTL_RD | FPGA_I2C_CTL_BG;
+    } else {
+
+        ret = fpga_data_write(fpga_i2c, reg->i2c_data_buf, data, length);
+        if (ret) {
+            FPGA_I2C_ERROR("write fpga i2c date buf failed, reg addr:0x%x, write len:%d, ret:%d.\n",
+                reg->i2c_data_buf, length, ret);
+            goto exit;
+        }
+        op = FPGA_I2C_CTL_WR | FPGA_I2C_CTL_BG ;
+    }
+
+    ret = fpga_reg_write(fpga_i2c, reg->i2c_ctrl, op);
+    if (ret) {
+        FPGA_I2C_ERROR("write fpga i2c control reg failed, reg addr:0x%x, value:%d, ret:%d.\n",
+            reg->i2c_ctrl, op, ret);
+        goto exit;
+    }
+
+    ret = fpga_i2c_wait(fpga_i2c);
+    if (ret) {
+        FPGA_I2C_ERROR("wait fpga i2c status timeout.\n");
+        goto exit;
+    }
+
+    ret = fpga_i2c_check_status(fpga_i2c);
+    if (ret) {
+        FPGA_I2C_ERROR("check fpga i2c status error.\n");
+        goto exit;
+    }
+
+    if (is_read) {
+
+        ret = fpga_data_read(fpga_i2c, reg->i2c_data_buf, data, length);
+        if (ret) {
+            FPGA_I2C_ERROR("read fpga i2c data buf failed, reg addr:0x%x, read len:%d, ret:%d.\n",
+                reg->i2c_data_buf, length, ret);
+            goto exit;
+        }
+    }
+
+exit:
+    return ret;
+}
+
+static int fpga_i2c_write(fpga_i2c_dev_t *fpga_i2c, int target,
+                u8 *data, int length, int i2c_msg_num)
+{
+    int ret, i;
+    fpga_i2c_reg_addr_t *i2c_addr_desc;
+
+    if (i2c_msg_num == I2C_READ_MSG_NUM) {
+
+        if (length > I2C_REG_MAX_WIDTH) {
+            FPGA_I2C_ERROR("read reg addr len %d, more than max length.\n", length);
+            return -EINVAL;
+        }
+
+        i2c_addr_desc = &fpga_i2c->i2c_addr_desc;
+        for (i = 0; i < length; i++) {
+            i2c_addr_desc->read_reg_addr[i] = data[length -i -1];
+            FPGA_I2C_VERBOSE("%02d : %02x\n", i, i2c_addr_desc->read_reg_addr[i]);
+        }
+        i2c_addr_desc->reg_addr_len = length;
+        ret = 0;
+    } else {
+
+        ret = fpga_i2c_do_work(fpga_i2c, target, data, length, 0);
+    }
+
+    return ret;
+}
+
+/**
+ * fpga_i2c_read - receive data from the bus.
+ * @i2c: The struct fpga_i2c_dev_t.
+ * @target: Target address.
+ * @data: Pointer to the location to store the datae .
+ * @length: Length of the data.
+ *
+ * The address is sent over the bus, then the data is read.
+ *
+ * Returns 0 on success, otherwise a negative errno.
+ */
+static int fpga_i2c_read(fpga_i2c_dev_t *fpga_i2c, int target,
+        u8 *data, int length)
+{
+    int ret, offset_size;
+    int i, tmp_val;
+    fpga_i2c_reg_addr_t *i2c_addr_desc;
+    uint8_t i2c_reg_addr_len;
+    uint8_t *i2c_read_addr_buf;
+
+    offset_size = 0;
+    i2c_addr_desc = &fpga_i2c->i2c_addr_desc;
+    i2c_reg_addr_len = i2c_addr_desc->reg_addr_len;
+    i2c_read_addr_buf = &i2c_addr_desc->read_reg_addr[0];
+
+    while (1) {
+        if (length <= fpga_i2c->reg.i2c_data_buf_len) {
+            return fpga_i2c_do_work(fpga_i2c, target, data + offset_size, length, 1);
+        }
+
+        ret = fpga_i2c_do_work(fpga_i2c, target, data + offset_size, fpga_i2c->reg.i2c_data_buf_len, 1);
+        if (ret != 0) {
+            FPGA_I2C_ERROR("fpga_i2c_read failed, i2c addr:0x%x, offset:0x%x, ret:%d.\n",
+                target, offset_size, ret);
+            return ret;
+        }
+
+        tmp_val = i2c_read_addr_buf[0];
+        tmp_val += fpga_i2c->reg.i2c_data_buf_len;
+        if (tmp_val > 0xff) {
+            i2c_read_addr_buf[0] = tmp_val & 0xff;
+            for (i = 1; i < i2c_reg_addr_len; i++) {
+                if (i2c_read_addr_buf[i] == 0xff) {
+                    i2c_read_addr_buf[i] = 0;
+                } else {
+                    i2c_read_addr_buf[i]++;
+                    break;
+                }
+            }
+        } else {
+            i2c_read_addr_buf[0] = tmp_val & 0xff;
+        }
+        offset_size += fpga_i2c->reg.i2c_data_buf_len;
+        length -= fpga_i2c->reg.i2c_data_buf_len;
+    }
+
+    return ret;
+}
+
+static void fpga_i2c_reset(fpga_i2c_dev_t *fpga_i2c) {
+    fpga_i2c_reset_cfg_t *reset_cfg;
+    uint32_t reset_addr;
+
+    reset_cfg = &fpga_i2c->reset_cfg;
+    reset_addr = reset_cfg->reset_addr;
+    if (reset_cfg->reset_delay_b) {
+        usleep_range(reset_cfg->reset_delay_b, reset_cfg->reset_delay_b + 1);
+    }
+
+    fpga_reg_write_32(fpga_i2c, reset_addr, reset_cfg->reset_on);
+    if (reset_cfg->reset_delay) {
+        usleep_range(reset_cfg->reset_delay, reset_cfg->reset_delay + 1);
+    }
+
+    fpga_reg_write_32(fpga_i2c, reset_addr, reset_cfg->reset_off);
+    if (reset_cfg->reset_delay_a) {
+        usleep_range(reset_cfg->reset_delay_a, reset_cfg->reset_delay_a + 1);
+    }
+
+    return;
+}
+
+/**
+ * fpga_i2c_xfer - The driver's master_xfer function.
+ * @adap: Pointer to the i2c_adapter structure.
+ * @msgs: Pointer to the messages to be processed.
+ * @num: Length of the MSGS array.
+ *
+ * Returns the number of messages processed, or a negative errno on
+ * failure.
+ */
+static int fpga_i2c_adapter_init(fpga_i2c_dev_t *fpga_i2c)
+{
+    int ret;
+    fpga_i2c_reg_t *reg;
+
+    reg = &fpga_i2c->reg;
+
+    ret = 0;
+    ret += fpga_reg_write(fpga_i2c, reg->i2c_scale, fpga_i2c->i2c_scale_value);
+    ret += fpga_reg_write(fpga_i2c, reg->i2c_filter, fpga_i2c->i2c_filter_value);
+    ret += fpga_reg_write(fpga_i2c, reg->i2c_stretch, fpga_i2c->i2c_stretch_value);
+    if (ret < 0) {
+        FPGA_I2C_ERROR("fpga_i2c_init failed.\n");
+        return ret;
+    }
+
+    FPGA_I2C_VERBOSE("fpga_i2c_init ok.\n");
+    return 0;
+}
+
+static int fpga_i2c_params_check(fpga_i2c_dev_t *fpga_i2c)
+{
+    int ret;
+    fpga_i2c_reg_t *reg;
+    uint8_t i2c_scale_value, i2c_filter_value, i2c_stretch_value;
+
+    reg = &fpga_i2c->reg;
+    ret = 0;
+    ret += fpga_reg_read(fpga_i2c, reg->i2c_scale, &i2c_scale_value);
+    ret += fpga_reg_read(fpga_i2c, reg->i2c_filter, &i2c_filter_value);
+    ret += fpga_reg_read(fpga_i2c, reg->i2c_stretch, &i2c_stretch_value);
+    if (ret < 0) {
+        FPGA_I2C_ERROR("read fpga i2c params failed.\n");
+        return 1;
+    }
+
+    if ((i2c_scale_value != fpga_i2c->i2c_scale_value)
+            || (i2c_filter_value != fpga_i2c->i2c_filter_value)
+            || (i2c_stretch_value != fpga_i2c->i2c_stretch_value)) {
+        FPGA_I2C_ERROR("fpga i2c params check error, read value: i2c_scale 0x%x, i2c_filter:0x%x, i2c_stretch:0x%x.\n",
+            i2c_scale_value, i2c_filter_value, i2c_stretch_value);
+        FPGA_I2C_ERROR("fpga i2c params check error, config value: i2c_scale 0x%x, i2c_filter:0x%x, i2c_stretch:0x%x.\n",
+            fpga_i2c->i2c_scale_value, fpga_i2c->i2c_filter_value, fpga_i2c->i2c_stretch_value);
+        return 1;
+    }
+
+    FPGA_I2C_VERBOSE("fpga i2c params check ok.\n");
+    return 0;
+}
+
+static int fpga_i2c_xfer(struct i2c_adapter *adap,
+        struct i2c_msg *msgs, int num)
+{
+    struct i2c_msg *pmsg;
+    int i;
+    int ret;
+    fpga_i2c_dev_t *fpga_i2c;
+    fpga_i2c_reg_addr_t *i2c_addr_desc;
+
+    fpga_i2c = i2c_get_adapdata(adap);
+
+    if (num != I2C_READ_MSG_NUM && num != I2C_WRITE_MSG_NUM) {
+        FPGA_I2C_ERROR("unsupport i2c_msg len:%d.\n", num);
+        return -EINVAL;
+    }
+
+    if ((num == I2C_WRITE_MSG_NUM) && (msgs[0].len > fpga_i2c->reg.i2c_data_buf_len)) {
+        FPGA_I2C_ERROR("unsupport i2c_msg type:msg[0].flag:0x%x, buf len:0x%x.\n",
+            msgs[0].flags, msgs[0].len);
+        return -EINVAL;
+    }
+
+    if (num == I2C_READ_MSG_NUM ) {
+        if ((msgs[0].flags & I2C_M_RD) ||!(msgs[1].flags & I2C_M_RD)) {
+            FPGA_I2C_ERROR("unsupport i2c_msg type:msg[0].flag:0x%x, msg[1].flag:0x%x.\n",
+                msgs[0].flags, msgs[1].flags);
+            return -EINVAL;
+        }
+    }
+
+    if (fpga_i2c_is_busy(fpga_i2c)) {
+        FPGA_I2C_ERROR("fpga i2c adapter %d is busy, do reset.\n", adap->nr);
+        if (fpga_i2c->reset_cfg.i2c_adap_reset_flag == 1) {
+
+            fpga_i2c_reset(fpga_i2c);
+
+            fpga_i2c_adapter_init(fpga_i2c);
+        }
+        return -EAGAIN;
+    }
+
+    if (fpga_i2c->i2c_params_check && fpga_i2c_params_check(fpga_i2c)) {
+        FPGA_I2C_ERROR("fpga i2c params check failed, try to reinitialize.\n");
+        fpga_i2c_adapter_init(fpga_i2c);
+    }
+
+    ret = 0;
+    i2c_addr_desc = &fpga_i2c->i2c_addr_desc;
+    i2c_addr_desc->reg_addr_len = 0;
+    mem_clear(i2c_addr_desc->read_reg_addr, sizeof(i2c_addr_desc->read_reg_addr));
+
+    for (i = 0; ret == 0 && i < num; i++) {
+        pmsg = &msgs[i];
+        FPGA_I2C_VERBOSE("Doing %s %d byte(s) to/from 0x%02x - %d of %d messages\n",
+            pmsg->flags & I2C_M_RD ? "read" : "write", pmsg->len, pmsg->addr, i + 1, num);
+
+        if (pmsg->flags & I2C_M_RD) {
+            ret = fpga_i2c_read(fpga_i2c, pmsg->addr, pmsg->buf, pmsg->len);
+
+            if ((pmsg->len == 1) && (pmsg->flags & I2C_M_RECV_LEN)) {
+                if ((ret != 0) || (pmsg->buf[0] > I2C_SMBUS_BLOCK_MAX)) {
+                    FPGA_I2C_ERROR("smbus block data read failed, ret:%d, read len:%u.\n",
+                        ret, pmsg->buf[0]);
+                    return -EPROTO;
+                }
+                pmsg->len = 1 + pmsg->buf[0];
+                FPGA_I2C_VERBOSE("smbus block data read, read len:%d.\n", pmsg->len);
+                ret = fpga_i2c_read(fpga_i2c, pmsg->addr, pmsg->buf, pmsg->len);
+            }
+        } else {
+            ret = fpga_i2c_write(fpga_i2c, pmsg->addr, pmsg->buf, pmsg->len, num);
+        }
+    }
+
+    return (ret != 0) ? ret : num;
+}
+
+static u32 fpga_i2c_functionality(struct i2c_adapter *adap)
+{
+    return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL | I2C_FUNC_SMBUS_BLOCK_DATA;
+}
+
+static const struct i2c_algorithm fpga_i2c_algo = {
+    .master_xfer = fpga_i2c_xfer,
+    .functionality = fpga_i2c_functionality,
+};
+
+static struct i2c_adapter fpga_i2c_ops = {
+    .owner = THIS_MODULE,
+    .name = "wb_fpga_i2c",
+    .algo = &fpga_i2c_algo,
+};
+
+static int fpga_i2c_config_init(fpga_i2c_dev_t *fpga_i2c)
+{
+    int ret = 0, rv = 0;
+    fpga_i2c_reg_t *reg;
+    fpga_i2c_reset_cfg_t *reset_cfg;
+    struct device *dev;
+    uint32_t i2c_offset_reg, i2c_data_buf_len_reg;
+    int32_t i2c_offset_val;
+
+    fpga_i2c_bus_device_t *fpga_i2c_bus_device;
+
+    dev = fpga_i2c->dev;
+    reg = &fpga_i2c->reg;
+    reset_cfg = &fpga_i2c->reset_cfg;
+
+    i2c_offset_val = 0;
+
+    if (dev->of_node) {
+        ret = 0;
+        ret += of_property_read_u32(dev->of_node, "i2c_ext_9548_addr", &reg->i2c_ext_9548_addr);
+        ret += of_property_read_u32(dev->of_node, "i2c_ext_9548_chan", &reg->i2c_ext_9548_chan);
+        ret += of_property_read_u32(dev->of_node, "i2c_slave", &reg->i2c_slave);
+        ret += of_property_read_u32(dev->of_node, "i2c_reg", &reg->i2c_reg);
+        ret += of_property_read_u32(dev->of_node, "i2c_data_len", &reg->i2c_data_len);
+        ret += of_property_read_u32(dev->of_node, "i2c_ctrl", &reg->i2c_ctrl);
+        ret += of_property_read_u32(dev->of_node, "i2c_status", &reg->i2c_status);
+        ret += of_property_read_u32(dev->of_node, "i2c_scale", &reg->i2c_scale);
+        ret += of_property_read_u32(dev->of_node, "i2c_filter", &reg->i2c_filter);
+        ret += of_property_read_u32(dev->of_node, "i2c_stretch", &reg->i2c_stretch);
+        ret += of_property_read_u32(dev->of_node, "i2c_ext_9548_exits_flag", &reg->i2c_ext_9548_exits_flag);
+        ret += of_property_read_u32(dev->of_node, "i2c_reg_len", &reg->i2c_reg_len);
+        ret += of_property_read_u32(dev->of_node, "i2c_in_9548_chan", &reg->i2c_in_9548_chan);
+        ret += of_property_read_u32(dev->of_node, "i2c_data_buf", &reg->i2c_data_buf);
+        ret += of_property_read_string(dev->of_node, "dev_name", &fpga_i2c->dev_name);
+        ret += of_property_read_u32(dev->of_node, "i2c_scale_value", &fpga_i2c->i2c_scale_value);
+        ret += of_property_read_u32(dev->of_node, "i2c_filter_value", &fpga_i2c->i2c_filter_value);
+        ret += of_property_read_u32(dev->of_node, "i2c_stretch_value", &fpga_i2c->i2c_stretch_value);
+        ret += of_property_read_u32(dev->of_node, "i2c_timeout", &fpga_i2c->i2c_timeout);
+        ret += of_property_read_u32(dev->of_node, "i2c_func_mode", &fpga_i2c->i2c_func_mode);
+        ret += of_property_read_u32(dev->of_node, "i2c_reset_addr", &reset_cfg->reset_addr);
+        ret += of_property_read_u32(dev->of_node, "i2c_reset_on", &reset_cfg->reset_on);
+        ret += of_property_read_u32(dev->of_node, "i2c_reset_off", &reset_cfg->reset_off);
+        ret += of_property_read_u32(dev->of_node, "i2c_rst_delay_b", &reset_cfg->reset_delay_b);
+        ret += of_property_read_u32(dev->of_node, "i2c_rst_delay", &reset_cfg->reset_delay);
+        ret += of_property_read_u32(dev->of_node, "i2c_rst_delay_a", &reset_cfg->reset_delay_a);
+        ret += of_property_read_u32(dev->of_node, "i2c_adap_reset_flag", &reset_cfg->i2c_adap_reset_flag);
+
+        if (ret != 0) {
+            FPGA_I2C_ERROR("dts config error, ret:%d.\n", ret);
+            ret = -ENXIO;
+            return ret;
+        }
+
+        rv = of_property_read_u32(dev->of_node, "i2c_data_buf_len_reg", &i2c_data_buf_len_reg);
+        if (rv == 0) {
+            ret = fpga_reg_read_32(fpga_i2c, i2c_data_buf_len_reg, &reg->i2c_data_buf_len);
+            if (ret < 0) {
+                dev_err(fpga_i2c->dev, "Failed to get fpga i2c data buf length, reg addr: 0x%x, ret: %d\n",
+                    i2c_data_buf_len_reg, ret);
+                return ret;
+            }
+            FPGA_I2C_VERBOSE("fpga i2c data buf length reg addr: 0x%x, value: %d\n",
+                i2c_data_buf_len_reg, reg->i2c_data_buf_len);
+            if (reg->i2c_data_buf_len == 0) {
+                reg->i2c_data_buf_len = FPGA_I2C_RDWR_MAX_LEN_DEFAULT;
+            }
+        } else {
+            ret = of_property_read_u32(dev->of_node, "i2c_data_buf_len", &reg->i2c_data_buf_len);
+            if (ret != 0) {
+                reg->i2c_data_buf_len = FPGA_I2C_RDWR_MAX_LEN_DEFAULT;
+                ret = 0;
+            }
+        }
+
+        rv = of_property_read_u32(dev->of_node, "i2c_offset_reg", &i2c_offset_reg);
+        if (rv == 0) {
+            ret = fpga_reg_read_32(fpga_i2c, i2c_offset_reg, &i2c_offset_val);
+            if (ret < 0) {
+                dev_err(fpga_i2c->dev, "Failed to get fpga i2c adapter offset value, reg addr: 0x%x, ret: %d\n",
+                    i2c_offset_reg, ret);
+                return ret;
+            }
+            FPGA_I2C_VERBOSE("fpga i2c adapter offset reg addr: 0x%x, value: %d\n",
+                i2c_offset_reg, i2c_offset_val);
+            reg->i2c_scale +=i2c_offset_val;
+            reg->i2c_filter += i2c_offset_val;
+            reg->i2c_stretch += i2c_offset_val;
+            reg->i2c_ext_9548_exits_flag += i2c_offset_val;
+            reg->i2c_ext_9548_addr += i2c_offset_val;
+            reg->i2c_ext_9548_chan += i2c_offset_val;
+            reg->i2c_in_9548_chan += i2c_offset_val;
+            reg->i2c_slave += i2c_offset_val;
+            reg->i2c_reg += i2c_offset_val;
+            reg->i2c_reg_len += i2c_offset_val;
+            reg->i2c_data_len += i2c_offset_val;
+            reg->i2c_ctrl += i2c_offset_val;
+            reg->i2c_status += i2c_offset_val;
+            reg->i2c_data_buf += i2c_offset_val;
+        }
+
+        ret = of_property_read_u32(dev->of_node, "i2c_err_vec", &reg->i2c_err_vec);
+        if (ret != 0) {
+            reg->i2c_err_vec = DTS_NO_CFG_FLAG;
+            FPGA_I2C_VERBOSE("not support i2c_err_vec cfg. ret: %d, set DTS_NO_CFG_FLAG: %d\n",
+                ret, reg->i2c_err_vec);
+            ret = 0;    /* Not configuring i2c_err_vec is not an error  */
+        } else {
+            if (i2c_offset_val != 0) {
+                reg->i2c_err_vec += i2c_offset_val;
+            }
+        }
+    } else {
+        if (dev->platform_data == NULL) {
+            dev_err(fpga_i2c->dev, "Failed to get platform data config.\n");
+            ret = -ENXIO;
+            return ret;
+        }
+        fpga_i2c_bus_device = dev->platform_data;
+        fpga_i2c->dev_name = fpga_i2c_bus_device->dev_name;
+        fpga_i2c->adap_nr = fpga_i2c_bus_device->adap_nr;
+        fpga_i2c->i2c_scale_value = fpga_i2c_bus_device->i2c_scale_value;
+        fpga_i2c->i2c_filter_value = fpga_i2c_bus_device->i2c_filter_value;
+        fpga_i2c->i2c_stretch_value = fpga_i2c_bus_device->i2c_stretch_value;
+        fpga_i2c->i2c_timeout = fpga_i2c_bus_device->i2c_timeout;
+        fpga_i2c->i2c_func_mode = fpga_i2c_bus_device->i2c_func_mode;
+        fpga_i2c->i2c_params_check = fpga_i2c_bus_device->i2c_params_check;
+
+        reset_cfg->reset_addr = fpga_i2c_bus_device->i2c_reset_addr;
+        reset_cfg->reset_on = fpga_i2c_bus_device->i2c_reset_on;
+        reset_cfg->reset_off = fpga_i2c_bus_device->i2c_reset_off;
+        reset_cfg->reset_delay_b = fpga_i2c_bus_device->i2c_rst_delay_b;
+        reset_cfg->reset_delay = fpga_i2c_bus_device->i2c_rst_delay;
+        reset_cfg->reset_delay_a = fpga_i2c_bus_device->i2c_rst_delay_a;
+        reset_cfg->i2c_adap_reset_flag = fpga_i2c_bus_device->i2c_adap_reset_flag;
+
+        reg->i2c_ext_9548_addr = fpga_i2c_bus_device->i2c_ext_9548_addr;
+        reg->i2c_ext_9548_chan = fpga_i2c_bus_device->i2c_ext_9548_chan;
+        reg->i2c_slave = fpga_i2c_bus_device->i2c_slave;
+        reg->i2c_reg = fpga_i2c_bus_device->i2c_reg;
+        reg->i2c_data_len = fpga_i2c_bus_device->i2c_data_len;
+        reg->i2c_ctrl = fpga_i2c_bus_device->i2c_ctrl;
+        reg->i2c_status = fpga_i2c_bus_device->i2c_status;
+        reg->i2c_scale = fpga_i2c_bus_device->i2c_scale;
+        reg->i2c_filter = fpga_i2c_bus_device->i2c_filter;
+        reg->i2c_stretch = fpga_i2c_bus_device->i2c_stretch;
+        reg->i2c_ext_9548_exits_flag = fpga_i2c_bus_device->i2c_ext_9548_exits_flag;
+        reg->i2c_reg_len = fpga_i2c_bus_device->i2c_reg_len;
+        reg->i2c_in_9548_chan = fpga_i2c_bus_device->i2c_in_9548_chan;
+        reg->i2c_data_buf = fpga_i2c_bus_device->i2c_data_buf;
+
+        i2c_data_buf_len_reg = fpga_i2c_bus_device->i2c_data_buf_len_reg;
+        if (i2c_data_buf_len_reg > 0) {
+            ret = fpga_reg_read_32(fpga_i2c, i2c_data_buf_len_reg, &reg->i2c_data_buf_len);
+            if (ret < 0) {
+                dev_err(fpga_i2c->dev, "Failed to get fpga i2c data buf length, reg addr: 0x%x, ret: %d\n",
+                    i2c_data_buf_len_reg, ret);
+                return ret;
+            }
+            FPGA_I2C_VERBOSE("fpga i2c data buf length reg addr: 0x%x, value: %d\n",
+                i2c_data_buf_len_reg, reg->i2c_data_buf_len);
+            if (reg->i2c_data_buf_len == 0) {
+                reg->i2c_data_buf_len = FPGA_I2C_RDWR_MAX_LEN_DEFAULT;
+            }
+        } else {
+            if (fpga_i2c_bus_device->i2c_data_buf_len == 0) {
+                reg->i2c_data_buf_len = FPGA_I2C_RDWR_MAX_LEN_DEFAULT;
+                FPGA_I2C_VERBOSE("not support i2c_data_buf_len cfg, set default_val:%d\n",
+                    reg->i2c_data_buf_len);
+            } else {
+                reg->i2c_data_buf_len = fpga_i2c_bus_device->i2c_data_buf_len;
+            }
+        }
+
+        i2c_offset_reg = fpga_i2c_bus_device->i2c_offset_reg;
+        if (i2c_offset_reg > 0) {
+            rv = fpga_reg_read_32(fpga_i2c, i2c_offset_reg, &i2c_offset_val);
+            if (rv < 0) {
+                dev_err(fpga_i2c->dev, "Failed to get fpga i2c adapter offset value, reg addr: 0x%x, rv: %d\n",
+                    i2c_offset_reg, rv);
+                return rv;
+            }
+            FPGA_I2C_VERBOSE("fpga i2c adapter offset reg addr: 0x%x, value: %d\n",
+                i2c_offset_reg, i2c_offset_val);
+            reg->i2c_scale +=i2c_offset_val;
+            reg->i2c_filter += i2c_offset_val;
+            reg->i2c_stretch += i2c_offset_val;
+            reg->i2c_ext_9548_exits_flag += i2c_offset_val;
+            reg->i2c_ext_9548_addr += i2c_offset_val;
+            reg->i2c_ext_9548_chan += i2c_offset_val;
+            reg->i2c_in_9548_chan += i2c_offset_val;
+            reg->i2c_slave += i2c_offset_val;
+            reg->i2c_reg += i2c_offset_val;
+            reg->i2c_reg_len += i2c_offset_val;
+            reg->i2c_data_len += i2c_offset_val;
+            reg->i2c_ctrl += i2c_offset_val;
+            reg->i2c_status += i2c_offset_val;
+            reg->i2c_data_buf += i2c_offset_val;
+        }
+
+        if (fpga_i2c_bus_device->i2c_err_vec == 0) {
+            reg->i2c_err_vec = DTS_NO_CFG_FLAG;
+            FPGA_I2C_VERBOSE("not support i2c_err_vec cfg, set DTS_NO_CFG_FLAG:%d\n",
+                reg->i2c_err_vec);
+        } else {
+            reg->i2c_err_vec = fpga_i2c_bus_device->i2c_err_vec;
+            if (i2c_offset_val != 0) {
+                reg->i2c_err_vec += i2c_offset_val;
+            }
+        }
+    }
+
+    FPGA_I2C_VERBOSE("i2c_ext_9548_addr:0x%x, i2c_ext_9548_chan:0x%x, i2c_slave:0x%x, i2c_reg:0x%x, i2c_data_len:0x%x.\n",
+        reg->i2c_ext_9548_addr, reg->i2c_ext_9548_chan, reg->i2c_slave, reg->i2c_reg, reg->i2c_data_len);
+    FPGA_I2C_VERBOSE("i2c_ctrl:0x%x, i2c_status:0x%x, i2c_scale:0x%x, i2c_filter:0x%x, i2c_stretch:0x%x.\n",
+        reg->i2c_ctrl, reg->i2c_status, reg->i2c_scale, reg->i2c_filter, reg->i2c_stretch);
+    FPGA_I2C_VERBOSE("i2c_ext_9548_exits_flag:0x%x, i2c_in_9548_chan:0x%x, i2c_data_buf:0x%x, i2c_reg_len:0x%x, i2c_data_buf_len:0x%x.\n",
+        reg->i2c_ext_9548_exits_flag, reg->i2c_in_9548_chan, reg->i2c_data_buf, reg->i2c_reg_len, reg->i2c_data_buf_len);
+    FPGA_I2C_VERBOSE("dev_name:%s, i2c_scale_value:0x%x, i2c_filter_value:0x%x, i2c_stretch_value:0x%x, i2c_timeout:0x%x.\n",
+        fpga_i2c->dev_name, fpga_i2c->i2c_scale_value, fpga_i2c->i2c_filter_value, fpga_i2c->i2c_stretch_value, fpga_i2c->i2c_timeout);
+    FPGA_I2C_VERBOSE("i2c_reset_addr:0x%x, i2c_reset_on:0x%x, i2c_reset_off:0x%x, i2c_rst_delay_b:0x%x, i2c_rst_delay:0x%x, i2c_rst_delay_a:0x%x.\n",
+        reset_cfg->reset_addr, reset_cfg->reset_on, reset_cfg->reset_off, reset_cfg->reset_delay_b, reset_cfg->reset_delay, reset_cfg->reset_delay_a);
+    FPGA_I2C_VERBOSE("i2c_adap_reset_flag:0x%x.\n", reset_cfg->i2c_adap_reset_flag);
+    FPGA_I2C_VERBOSE("i2c_err_vec:0x%x\n", reg->i2c_err_vec);
+
+    return ret;
+}
+
+static int fpga_i2c_probe(struct platform_device *pdev)
+{
+    int ret;
+    fpga_i2c_dev_t *fpga_i2c;
+    struct device *dev;
+
+    fpga_i2c = devm_kzalloc(&pdev->dev, sizeof(fpga_i2c_dev_t), GFP_KERNEL);
+    if (!fpga_i2c) {
+        dev_err(&pdev->dev, "devm_kzalloc failed.\n");
+        ret = -ENOMEM;
+        goto out;
+    }
+
+    fpga_i2c->dev = &pdev->dev;
+
+    ret = fpga_i2c_config_init(fpga_i2c);
+    if (ret !=0) {
+        dev_err(fpga_i2c->dev, "Failed to get fpga i2c dts config.\n");
+        goto out;
+    }
+
+    ret = fpga_i2c_adapter_init(fpga_i2c);
+    if (ret !=0) {
+        dev_err(fpga_i2c->dev, "Failed to init fpga i2c adapter.\n");
+        goto out;
+    }
+
+    if (fpga_i2c->dev->of_node) {
+        fpga_i2c->i2c_params_check = of_property_read_bool(fpga_i2c->dev->of_node, "i2c_params_check");
+    }
+    FPGA_I2C_VERBOSE("fpga i2c params check flag:%d.\n", fpga_i2c->i2c_params_check);
+
+    init_waitqueue_head(&fpga_i2c->queue);
+
+    dev = fpga_i2c->dev;
+    fpga_i2c->adap = fpga_i2c_ops;
+    fpga_i2c->adap.timeout = msecs_to_jiffies(fpga_i2c->i2c_timeout);
+    fpga_i2c->adap.dev.parent = &pdev->dev;
+    fpga_i2c->adap.dev.of_node = pdev->dev.of_node;
+    i2c_set_adapdata(&fpga_i2c->adap, fpga_i2c);
+    platform_set_drvdata(pdev, fpga_i2c);
+
+    if (fpga_i2c->dev->of_node) {
+        /* adap.nr get from dts aliases */
+        ret = i2c_add_adapter(&fpga_i2c->adap);
+    } else {
+        fpga_i2c->adap.nr = fpga_i2c->adap_nr;
+        ret = i2c_add_numbered_adapter(&fpga_i2c->adap);
+    }
+
+    if (ret < 0) {
+        dev_info(fpga_i2c->dev, "Failed to add adapter.\n");
+        goto fail_add;
+    }
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(3,12,0)
+    of_i2c_register_devices(&fpga_i2c->adap);
+#endif
+    dev_info(fpga_i2c->dev, "registered i2c-%d for %s using mode %d with base address:0x%x, data buf len: %d success.\n",
+        fpga_i2c->adap.nr, fpga_i2c->dev_name, fpga_i2c->i2c_func_mode, fpga_i2c->reg.i2c_scale,
+        fpga_i2c->reg.i2c_data_buf_len);
+    return 0;
+
+fail_add:
+    platform_set_drvdata(pdev, NULL);
+out:
+    return ret;
+};
+
+static int fpga_i2c_remove(struct platform_device *pdev)
+{
+    fpga_i2c_dev_t *fpga_i2c;
+
+    fpga_i2c = platform_get_drvdata(pdev);
+    i2c_del_adapter(&fpga_i2c->adap);
+    platform_set_drvdata(pdev, NULL);
+    return 0;
+};
+
+static struct of_device_id fpga_i2c_match[] = {
+    {
+        .compatible = "wb-fpga-i2c",
+    },
+    {},
+};
+MODULE_DEVICE_TABLE(of, fpga_i2c_match);
+
+static struct platform_driver wb_fpga_i2c_driver = {
+    .probe = fpga_i2c_probe,
+    .remove = fpga_i2c_remove,
+    .driver = {
+        .owner = THIS_MODULE,
+        .name = DRV_NAME,
+        .of_match_table = fpga_i2c_match,
+    },
+};
+
+static int __init wb_fpga_i2c_init(void)
+{
+    return platform_driver_register(&wb_fpga_i2c_driver);
+}
+
+static void __exit wb_fpga_i2c_exit(void)
+{
+    platform_driver_unregister(&wb_fpga_i2c_driver);
+}
+
+module_init(wb_fpga_i2c_init);
+module_exit(wb_fpga_i2c_exit);
+MODULE_DESCRIPTION("fpga i2c adapter driver");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_fpga_pca954x_drv.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_fpga_pca954x_drv.c
new file mode 100644
index 000000000..25f2d60b9
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_fpga_pca954x_drv.c
@@ -0,0 +1,542 @@
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/slab.h>
+#include <linux/device.h>
+#include <linux/i2c.h>
+#include <linux/i2c-mux.h>
+#include <linux/delay.h>
+#include <linux/version.h>
+#include <linux/io.h>
+#include <linux/of.h>
+#include <linux/fs.h>
+#include <linux/uaccess.h>
+#include <linux/uio.h>
+#include "fpga_i2c.h"
+
+extern int i2c_device_func_write(const char *path, uint32_t pos, uint8_t *val, size_t size);
+extern int pcie_device_func_write(const char *path, uint32_t offset, uint8_t *buf, size_t count);
+extern int io_device_func_write(const char *path, uint32_t pos, uint8_t *val, size_t size);
+extern int spi_device_func_write(const char *path, uint32_t offset, uint8_t *buf, size_t count);
+
+#define PCA954X_MAX_NCHANS           (8)
+#define FPGA_INTERNAL_PCA9548        (1)
+#define FPGA_EXTERNAL_PCA9548        (2)
+#define FPGA_I2C_EXT_9548_EXITS      (0x01 << 0)
+#define FPGA_I2C_9548_NO_RESET       (0x01 << 1)
+
+#define SYMBOL_I2C_DEV_MODE          (1)
+#define FILE_MODE                    (2)
+#define SYMBOL_PCIE_DEV_MODE         (3)
+#define SYMBOL_IO_DEV_MODE           (4)
+#define SYMBOL_SPI_DEV_MODE          (5)
+
+int g_fpga_pca954x_debug = 0;
+int g_fpga_pca954x_error = 0;
+
+module_param(g_fpga_pca954x_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_fpga_pca954x_error, int, S_IRUGO | S_IWUSR);
+
+#define FPGA_PCA954X_VERBOSE(fmt, args...) do {                                        \
+    if (g_fpga_pca954x_debug) { \
+        printk(KERN_INFO "[FPGA_PCA954X][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define FPGA_PCA954X_ERROR(fmt, args...) do {                                        \
+    if (g_fpga_pca954x_error) { \
+        printk(KERN_ERR "[FPGA_PCA954X][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+enum pca_type {
+    pca_9540,
+    pca_9541,
+    pca_9542,
+    pca_9543,
+    pca_9544,
+    pca_9545,
+    pca_9546,
+    pca_9547,
+    pca_9548,
+};
+
+struct pca954x {
+    enum pca_type type;
+    struct i2c_adapter *virt_adaps[PCA954X_MAX_NCHANS];
+    u8 last_chan;                   /* last register value */
+    uint32_t fpga_9548_flag;
+    uint32_t fpga_9548_reset_flag;
+    uint32_t pca9548_base_nr;
+    struct i2c_client *client;
+};
+
+struct chip_desc {
+    u8 nchans;
+    u8 enable;    /* used for muxes only */
+    enum muxtype {
+        pca954x_ismux = 0,
+        pca954x_isswi
+    } muxtype;
+};
+
+/* Provide specs for the PCA954x types we know about */
+static const struct chip_desc chips[] = {
+    [pca_9540] = {
+        .nchans = 2,
+        .enable = 0x4,
+        .muxtype = pca954x_ismux,
+    },
+    [pca_9541] = {
+        .nchans = 1,
+        .muxtype = pca954x_isswi,
+    },
+    [pca_9543] = {
+        .nchans = 2,
+        .muxtype = pca954x_isswi,
+    },
+    [pca_9544] = {
+        .nchans = 4,
+        .enable = 0x4,
+        .muxtype = pca954x_ismux,
+    },
+    [pca_9545] = {
+        .nchans = 4,
+        .muxtype = pca954x_isswi,
+    },
+    [pca_9547] = {
+        .nchans = 8,
+        .enable = 0x8,
+        .muxtype = pca954x_ismux,
+    },
+    [pca_9548] = {
+        .nchans = 8,
+        .muxtype = pca954x_isswi,
+    },
+};
+
+static const struct i2c_device_id fpga_pca954x_id[] = {
+    { "wb_fpga_pca9540", pca_9540 },
+    { "wb_fpga_pca9541", pca_9541 },
+    { "wb_fpga_pca9542", pca_9543 },
+    { "wb_fpga_pca9543", pca_9543 },
+    { "wb_fpga_pca9544", pca_9544 },
+    { "wb_fpga_pca9545", pca_9545 },
+    { "wb_fpga_pca9546", pca_9545 },
+    { "wb_fpga_pca9547", pca_9547 },
+    { "wb_fpga_pca9548", pca_9548 },
+    { }
+};
+MODULE_DEVICE_TABLE(i2c, fpga_pca954x_id);
+
+static int fpga_file_write(const char *path, int pos, unsigned char *val, size_t size)
+{
+    int ret;
+    struct file *filp;
+    loff_t tmp_pos;
+
+    struct kvec iov = {
+        .iov_base = val,
+        .iov_len = min_t(size_t, size, MAX_RW_COUNT),
+    };
+    struct iov_iter iter;
+
+    filp = filp_open(path, O_RDWR, 777);
+    if (IS_ERR(filp)) {
+        FPGA_PCA954X_ERROR("write open failed errno = %ld\r\n", -PTR_ERR(filp));
+        filp = NULL;
+        goto exit;
+    }
+
+    tmp_pos = (loff_t)pos;
+    iov_iter_kvec(&iter, ITER_SOURCE, &iov, 1, iov.iov_len);
+    ret = vfs_iter_write(filp, &iter, &tmp_pos, 0);
+    if (ret < 0) {
+        FPGA_PCA954X_ERROR("vfs_iter_write failed, path=%s, addr=%d, size=%ld, ret=%d\r\n", path, pos, size, ret);
+        goto exit;
+    }
+
+    vfs_fsync(filp, 1);
+    filp_close(filp, NULL);
+
+    return ret;
+
+exit:
+    if (filp != NULL) {
+        filp_close(filp, NULL);
+    }
+
+    return -1;
+
+}
+
+static int fpga_device_write(fpga_i2c_dev_t *fpga_i2c, int pos, unsigned char *val, size_t size)
+{
+    int ret;
+
+    switch (fpga_i2c->i2c_func_mode) {
+    case SYMBOL_I2C_DEV_MODE:
+        ret = i2c_device_func_write(fpga_i2c->dev_name, pos, val, size);
+        break;
+    case FILE_MODE:
+        ret = fpga_file_write(fpga_i2c->dev_name, pos, val, size);
+        break;
+    case SYMBOL_PCIE_DEV_MODE:
+        ret = pcie_device_func_write(fpga_i2c->dev_name, pos, val, size);
+        break;
+    case SYMBOL_IO_DEV_MODE:
+        ret = io_device_func_write(fpga_i2c->dev_name, pos, val, size);
+        break;
+    case SYMBOL_SPI_DEV_MODE:
+        ret = spi_device_func_write(fpga_i2c->dev_name, pos, val, size);
+        break;
+    default:
+        FPGA_PCA954X_ERROR("err func_mode %d, write failed.\n", fpga_i2c->i2c_func_mode);
+        return -EINVAL;
+    }
+    return ret;
+}
+
+static int fpga_reg_write(fpga_i2c_dev_t *fpga_i2c, uint32_t addr, uint8_t val)
+{
+    int ret;
+
+    ret = fpga_device_write(fpga_i2c, addr, &val, sizeof(uint8_t));
+    if (ret < 0) {
+        FPGA_PCA954X_ERROR("fpga_device_write failed. name:%s, addr:0x%x, value:0x%x.\n",
+            fpga_i2c->dev_name, addr, val);
+        return ret;
+    }
+
+    FPGA_PCA954X_VERBOSE("fpga reg write success, dev name:%s, offset:0x%x, value:0x%x.\n",
+        fpga_i2c->dev_name, addr, val);
+    return 0;
+}
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,7)
+static int pca954x_select_chan(struct i2c_adapter *adap, void *client, u32 chan)
+{
+    struct pca954x *data = i2c_get_clientdata(client);
+    fpga_i2c_dev_t *fpga_i2c;
+    fpga_i2c_reg_t *reg;
+    int ret;
+    u8 regval, i2c_9548_opt;
+
+    while(i2c_parent_is_i2c_adapter(adap)){
+        adap = to_i2c_adapter(adap->dev.parent);
+    }
+
+    FPGA_PCA954X_VERBOSE("root bus:%d, chan:0x%x, 9548 flag:0x%x, 9548 addr:0x%x.\n",
+        adap->nr, chan, data->fpga_9548_flag, client->addr);
+    fpga_i2c = i2c_get_adapdata(adap);
+    reg = &fpga_i2c->reg;
+
+    regval = 1 << chan;
+    if (data->fpga_9548_flag == FPGA_INTERNAL_PCA9548) {
+        ret = fpga_reg_write(fpga_i2c, reg->i2c_in_9548_chan, regval);
+    } else {
+        if (data->fpga_9548_reset_flag == 1) {
+            i2c_9548_opt = FPGA_I2C_EXT_9548_EXITS & ~(FPGA_I2C_9548_NO_RESET);
+        } else {
+            i2c_9548_opt = FPGA_I2C_EXT_9548_EXITS | FPGA_I2C_9548_NO_RESET;
+        }
+        FPGA_PCA954X_VERBOSE("fpga pca9548 reset flag:0x%x, opt:0x%x.\n",
+            data->fpga_9548_reset_flag, i2c_9548_opt);
+        ret = fpga_reg_write(fpga_i2c, reg->i2c_ext_9548_exits_flag, i2c_9548_opt);
+        ret += fpga_reg_write(fpga_i2c, reg->i2c_ext_9548_addr, client->addr);
+        ret += fpga_reg_write(fpga_i2c, reg->i2c_ext_9548_chan, regval);
+    }
+
+    return ret;
+}
+
+static int pca954x_deselect_mux(struct i2c_adapter *adap, void *client, u32 chan)
+{
+    struct pca954x *data = i2c_get_clientdata(client);
+    fpga_i2c_dev_t *fpga_i2c;
+    fpga_i2c_reg_t *reg;
+    int ret;
+
+    while(i2c_parent_is_i2c_adapter(adap)){
+        adap = to_i2c_adapter(adap->dev.parent);
+    }
+
+    fpga_i2c = i2c_get_adapdata(adap);
+    reg = &fpga_i2c->reg;
+    /* Deselect active channel */
+    data->last_chan = 0;
+    if (data->fpga_9548_flag == FPGA_INTERNAL_PCA9548) {
+        ret = fpga_reg_write(fpga_i2c, reg->i2c_in_9548_chan, 0);
+    } else {
+
+        ret = fpga_reg_write(fpga_i2c, reg->i2c_ext_9548_exits_flag, FPGA_I2C_9548_NO_RESET);
+        ret += fpga_reg_write(fpga_i2c, reg->i2c_ext_9548_chan, 0);
+    }
+
+    return ret;
+}
+#else
+static int pca954x_select_chan(struct i2c_mux_core *muxc, u32 chan)
+{
+    struct pca954x *data = i2c_mux_priv(muxc);
+    struct i2c_client *client = data->client;
+    struct i2c_adapter *adap;
+    fpga_i2c_dev_t *fpga_i2c;
+    fpga_i2c_reg_t *reg;
+    int ret;
+    u8 regval, i2c_9548_opt;
+
+    adap = muxc->parent;
+    while(i2c_parent_is_i2c_adapter(adap)){
+        adap = to_i2c_adapter(adap->dev.parent);
+    }
+
+    FPGA_PCA954X_VERBOSE("root bus:%d, chan:0x%x, 9548 flag:0x%x, 9548 addr:0x%x.\n",
+        adap->nr, chan, data->fpga_9548_flag, client->addr);
+    fpga_i2c = i2c_get_adapdata(adap);
+    reg = &fpga_i2c->reg;
+
+    regval = 1 << chan;
+    if (data->fpga_9548_flag == FPGA_INTERNAL_PCA9548) {
+        ret = fpga_reg_write(fpga_i2c, reg->i2c_in_9548_chan, regval);
+    } else {
+        if (data->fpga_9548_reset_flag == 1) {
+            i2c_9548_opt = FPGA_I2C_EXT_9548_EXITS & ~(FPGA_I2C_9548_NO_RESET);
+        } else {
+            i2c_9548_opt = FPGA_I2C_EXT_9548_EXITS | FPGA_I2C_9548_NO_RESET;
+        }
+        FPGA_PCA954X_VERBOSE("fpga pca9548 reset flag:0x%x, opt:0x%x.\n",
+            data->fpga_9548_reset_flag, i2c_9548_opt);
+        ret = fpga_reg_write(fpga_i2c, reg->i2c_ext_9548_exits_flag, i2c_9548_opt);
+        ret += fpga_reg_write(fpga_i2c, reg->i2c_ext_9548_addr, client->addr);
+        ret += fpga_reg_write(fpga_i2c, reg->i2c_ext_9548_chan, regval);
+    }
+
+    return ret;
+}
+
+static int pca954x_deselect_mux(struct i2c_mux_core *muxc, u32 chan)
+{
+    struct pca954x *data = i2c_mux_priv(muxc);
+    struct i2c_adapter *adap;
+    fpga_i2c_dev_t *fpga_i2c;
+    fpga_i2c_reg_t *reg;
+    int ret;
+
+    adap = muxc->parent;
+    while(i2c_parent_is_i2c_adapter(adap)){
+        adap = to_i2c_adapter(adap->dev.parent);
+    }
+
+    fpga_i2c = i2c_get_adapdata(adap);
+    reg = &fpga_i2c->reg;
+    ret = 0;
+    /* Deselect active channel */
+    data->last_chan = 0;
+
+    if (data->fpga_9548_flag == FPGA_INTERNAL_PCA9548) {
+        ret = fpga_reg_write(fpga_i2c, reg->i2c_in_9548_chan, 0);
+    } else {
+
+        ret = fpga_reg_write(fpga_i2c, reg->i2c_ext_9548_exits_flag, FPGA_I2C_9548_NO_RESET);
+        ret += fpga_reg_write(fpga_i2c, reg->i2c_ext_9548_chan, 0);
+    }
+
+    return ret;
+}
+#endif
+/*
+ * I2C init/probing/exit functions
+ */
+static int fpga_i2c_pca954x_probe(struct i2c_client *client, const struct i2c_device_id *id)
+{
+    struct i2c_adapter *adap = to_i2c_adapter(client->dev.parent);
+    int num, force, class;
+    struct pca954x *data;
+    int ret = -ENODEV;
+    struct device *dev;
+    int dynamic_nr = 1;
+    fpga_pca954x_device_t *fpga_pca954x_device;
+
+#if LINUX_VERSION_CODE > KERNEL_VERSION(4,6,7)
+    struct i2c_mux_core *muxc;
+#endif
+
+    if (!i2c_check_functionality(adap, I2C_FUNC_SMBUS_BYTE)) {
+        dev_err(&client->dev, "i2c adapter:%d, unsupport I2C_FUNC_SMBUS_BYTE.\n", adap->nr);
+        goto err;
+    }
+
+#if LINUX_VERSION_CODE <= KERNEL_VERSION(4,6,7)
+    data = kzalloc(sizeof(struct pca954x), GFP_KERNEL);
+    if (!data) {
+        dev_err(&client->dev, "kzalloc failed.\n");
+        ret = -ENOMEM;
+        goto err;
+    }
+
+    i2c_set_clientdata(client, data);
+#else
+    muxc = i2c_mux_alloc(adap, &client->dev,
+                 PCA954X_MAX_NCHANS, sizeof(*data), 0,
+                 pca954x_select_chan, pca954x_deselect_mux);
+    if (!muxc) {
+        dev_err(&client->dev, "i2c_mux_alloc failed.\n");
+        return -ENOMEM;
+    }
+    data = i2c_mux_priv(muxc);
+    i2c_set_clientdata(client, muxc);
+    data->client = client;
+#endif
+
+    dev = &client->dev;
+    if (dev == NULL) {
+        dev_err(&client->dev, "dev is NULL.\n");
+        ret = -ENODEV;
+        goto exit_free;
+    }
+
+    if (dev->of_node == NULL) {
+        if (client->dev.platform_data == NULL) {
+            dev_err(&client->dev, "Failed to get 954x platform data config.\n");
+            ret = -EINVAL;
+            goto exit_free;
+        }
+        fpga_pca954x_device = client->dev.platform_data;
+        data->fpga_9548_flag = fpga_pca954x_device->fpga_9548_flag;
+        data->fpga_9548_reset_flag = fpga_pca954x_device->fpga_9548_reset_flag;
+        data->pca9548_base_nr = fpga_pca954x_device->pca9548_base_nr;
+        if (data->pca9548_base_nr == 0) {
+
+            dynamic_nr = 1;
+        } else {
+            dynamic_nr = 0;
+            FPGA_PCA954X_VERBOSE("pca9548_base_nr:%u.\n", data->pca9548_base_nr);
+        }
+    } else {
+        data->type = id->driver_data;
+        /* BUS ID */
+        ret = of_property_read_u32(dev->of_node, "fpga_9548_flag", &data->fpga_9548_flag);
+        ret += of_property_read_u32(dev->of_node, "fpga_9548_reset_flag", &data->fpga_9548_reset_flag);
+        if (ret != 0) {
+            dev_err(&client->dev, "Failed to get 954x dts config, ret:%d.\n", ret);
+            ret = -EINVAL;
+            goto exit_free;
+        }
+        if (of_property_read_u32(dev->of_node, "pca9548_base_nr", &data->pca9548_base_nr)) {
+
+            dynamic_nr = 1;
+            FPGA_PCA954X_VERBOSE("pca9548_base_nr not found, use dynamic adap number");
+        } else {
+            dynamic_nr = 0;
+            FPGA_PCA954X_VERBOSE("pca9548_base_nr:%u.\n", data->pca9548_base_nr);
+        }
+    }
+
+    if (data->fpga_9548_flag != FPGA_EXTERNAL_PCA9548 && data->fpga_9548_flag != FPGA_INTERNAL_PCA9548) {
+        dev_err(&client->dev, "Error: fpga 954x flag config error, value:0x%x.\n", data->fpga_9548_flag);
+        ret = -EINVAL;
+        goto exit_free;
+    }
+
+    data->type = id->driver_data;
+    data->last_chan = 0;   /* force the first selection */
+
+    /* Now create an adapter for each channel */
+    for (num = 0; num < chips[data->type].nchans; num++) {
+        if (dynamic_nr == 1) {
+            force = 0;              /* dynamic adap number */
+        } else {
+            force = data->pca9548_base_nr + num;
+        }
+        class = 0;              /* no class by default */
+#if LINUX_VERSION_CODE <= KERNEL_VERSION(4,6,7)
+        data->virt_adaps[num] =
+            i2c_add_mux_adapter(adap, &client->dev, client,
+                force, num, class, pca954x_select_chan, pca954x_deselect_mux);
+
+        if (data->virt_adaps[num] == NULL) {
+            ret = -ENODEV;
+            dev_err(&client->dev, "Failed to register multiplexed adapter %d as bus %d\n",
+                num, force);
+            goto virt_reg_failed;
+        }
+#else
+        ret = i2c_mux_add_adapter(muxc, force, num, class);
+        if (ret) {
+            dev_err(&client->dev, "Failed to register multiplexed adapter %d as bus %d\n",
+                num, force);
+            goto virt_reg_failed;
+        }
+#endif
+    } /* end for num = 0; num < chips[data->type].nchans... */
+
+    dev_info(&client->dev, "registered %d multiplexed busses for I2C %s %s\n",
+        num, chips[data->type].muxtype == pca954x_ismux ? "mux" : "switch", client->name);
+
+    return 0;
+
+virt_reg_failed:
+#if LINUX_VERSION_CODE <= KERNEL_VERSION(4,6,7)
+    for (num--; num >= 0; num--)
+        i2c_del_mux_adapter(data->virt_adaps[num]);
+exit_free:
+    kfree(data);
+#else
+exit_free:
+    i2c_mux_del_adapters(muxc);
+#endif
+err:
+    return ret;
+}
+
+static void fpga_i2c_pca954x_remove(struct i2c_client *client)
+{
+#if LINUX_VERSION_CODE <= KERNEL_VERSION(4,6,7)
+    struct pca954x *data = i2c_get_clientdata(client);
+    const struct chip_desc *chip = &chips[data->type];
+    int i;
+
+    for (i = 0; i < chip->nchans; ++i)
+    if (data->virt_adaps[i]) {
+        i2c_del_mux_adapter(data->virt_adaps[i]);
+        data->virt_adaps[i] = NULL;
+    }
+
+    kfree(data);
+#else
+    struct i2c_mux_core *muxc = i2c_get_clientdata(client);
+
+    i2c_mux_del_adapters(muxc);
+#endif
+
+    return;
+}
+
+static struct i2c_driver fpga_i2c_pca954x_driver = {
+    .driver        = {
+        .name = "wb_fpga_pca954x",
+        .owner = THIS_MODULE,
+    },
+    .probe = fpga_i2c_pca954x_probe,
+    .remove = fpga_i2c_pca954x_remove,
+    .id_table = fpga_pca954x_id,
+};
+
+static int __init fpga_i2c_pca954x_init(void)
+{
+    int ret;
+
+    ret = i2c_add_driver(&fpga_i2c_pca954x_driver);
+    return ret;
+}
+
+static void __exit fpga_i2c_pca954x_exit(void)
+{
+    i2c_del_driver(&fpga_i2c_pca954x_driver);
+}
+
+module_init(fpga_i2c_pca954x_init);
+module_exit(fpga_i2c_pca954x_exit);
+MODULE_DESCRIPTION("fpga pca954x driver");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_fpga_pcie.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_fpga_pcie.c
new file mode 100644
index 000000000..baabfb5cd
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_fpga_pcie.c
@@ -0,0 +1,169 @@
+/*
+ * wb_fpga_pcie.c
+ * ko to enable fpga pcie
+ */
+#include <linux/module.h>
+#include <linux/version.h>
+#include <linux/slab.h>
+#include <linux/device.h>
+#include <linux/pci.h>
+
+#define FPGA_MSI_IRQ_BEGIN          (0)
+#define FPGA_MSI_IRQ_MAX            (32)
+#define FPGA_MSI_IRQ_MIN            (16)
+#define XILINX_FPGA_USE_MSI         (0)
+#define XILINX_FPGA_NUSE_MSI        (1)
+
+int g_fpga_pcie_dev_debug = 0;
+int g_fpga_pcie_dev_error = 0;
+module_param(g_fpga_pcie_dev_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_fpga_pcie_dev_error, int, S_IRUGO | S_IWUSR);
+
+#define FPGA_PCIE_DEV_VERBOSE(fmt, args...) do {                                        \
+    if (g_fpga_pcie_dev_debug) { \
+        printk(KERN_INFO "[FPGA_PCIE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define FPGA_PCIE_DEV_ERROR(fmt, args...) do {                                        \
+    if (g_fpga_pcie_dev_error) { \
+        printk(KERN_ERR "[FPGA_PCIE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+typedef struct wb_fpga_pcie_s {
+    struct pci_dev *pci_dev;
+    int driver_data;
+} wb_fpga_pcie_t;
+
+static void fpga_pcie_recover(struct pci_dev *pdev, const struct pci_device_id *id)
+{
+    struct resource *mem_base;
+    u32 bar0_val;
+    int ret;
+
+    mem_base = &pdev->resource[0];
+    ret = pci_read_config_dword(pdev, PCI_BASE_ADDRESS_0, &bar0_val);
+    if (ret) {
+        FPGA_PCIE_DEV_ERROR("pci_read_config_dword failed ret %d.\n", ret);
+        return;
+    }
+    FPGA_PCIE_DEV_VERBOSE("mem_base->start[0x%llx], bar0_val[0x%x], ret %d.\n",
+        mem_base->start, bar0_val, ret);
+
+    if (bar0_val != mem_base->start) {
+        ret = pci_write_config_dword(pdev, PCI_BASE_ADDRESS_0, mem_base->start);
+        if (ret) {
+            FPGA_PCIE_DEV_ERROR("pci_write_config_dword mem_base->start[0x%llx], failed ret %d.\n", mem_base->start, ret);
+            return;
+        }
+        FPGA_PCIE_DEV_VERBOSE("pci_write_config_dword mem_base->start[0x%llx] success.\n", mem_base->start);
+    } else {
+        FPGA_PCIE_DEV_VERBOSE("mem_base->start[0x%llx], bar0_val[0x%x], do nothing.\n",
+            mem_base->start, bar0_val);
+    }
+}
+
+static int fpga_pcie_probe(struct pci_dev *pdev, const struct pci_device_id *id)
+{
+    int err;
+    wb_fpga_pcie_t *wb_fpga_pcie;
+
+    FPGA_PCIE_DEV_VERBOSE("Enter vendor 0x%x, device 0x%x.\n", pdev->vendor, pdev->device);
+
+    wb_fpga_pcie = devm_kzalloc(&pdev->dev, sizeof(wb_fpga_pcie_t), GFP_KERNEL);
+    if (!wb_fpga_pcie) {
+        dev_err(&pdev->dev, "devm_kzalloc failed.\n");
+        return -ENOMEM;
+    }
+
+    fpga_pcie_recover(pdev, id);
+
+    /* enable device: ask low-level code to enable I/O and memory */
+    FPGA_PCIE_DEV_VERBOSE("start pci_enable_device!\n");
+    err = pci_enable_device(pdev);
+    if (err) {
+        dev_err(&pdev->dev, "Failed to enable pci device, ret:%d.\n", err);
+        return err;
+    }
+
+    FPGA_PCIE_DEV_VERBOSE("start pci_set_master!\n");
+    pci_set_master(pdev);
+
+    wb_fpga_pcie->driver_data = id->driver_data;
+    wb_fpga_pcie->pci_dev = pdev;
+    pci_set_drvdata(pdev, wb_fpga_pcie);
+
+    if (wb_fpga_pcie->driver_data == XILINX_FPGA_USE_MSI) {
+        FPGA_PCIE_DEV_VERBOSE("start pci_enable_msi_range!\n");
+#if LINUX_VERSION_CODE < KERNEL_VERSION(4,19,152)
+        err = pci_enable_msi_range(pdev, FPGA_MSI_IRQ_BEGIN + 1, FPGA_MSI_IRQ_MAX);
+#else
+        err = pci_alloc_irq_vectors_affinity(pdev, FPGA_MSI_IRQ_BEGIN + 1,
+                FPGA_MSI_IRQ_MAX, PCI_IRQ_MSI, NULL);
+#endif
+        if ((err > FPGA_MSI_IRQ_MAX) || (err < FPGA_MSI_IRQ_MIN)) {
+            FPGA_PCIE_DEV_ERROR("pci_enable_msi_block err %d FPGA_MSI_IRQ_NUM %d.\n", err,
+                FPGA_MSI_IRQ_MAX);
+            dev_err(&pdev->dev, "Failed to enable pci msi, ret:%d.\n", err);
+            return -EINVAL;
+        }
+        FPGA_PCIE_DEV_VERBOSE("pci_enable_msi success, ret: %d\n", err);
+    }
+
+    dev_info(&pdev->dev, "fpga pci device init success.\n");
+    return 0;
+}
+
+static void fpga_pcie_remove(struct pci_dev *pdev)
+{
+    wb_fpga_pcie_t *wb_fpga_pcie;
+
+    FPGA_PCIE_DEV_VERBOSE("fpga_pcie_remove.\n");
+
+    wb_fpga_pcie = pci_get_drvdata(pdev);
+    if (wb_fpga_pcie->driver_data == XILINX_FPGA_USE_MSI) {
+        FPGA_PCIE_DEV_VERBOSE("start pci_disable_msi!\n");
+        pci_disable_msi(pdev);
+    }
+
+    pci_disable_device(pdev);
+    return;
+}
+
+static const struct pci_device_id fpga_pci_ids[] = {
+        { PCI_DEVICE(0x10ee, 0x7022), .driver_data = XILINX_FPGA_USE_MSI},
+        { PCI_DEVICE(0x10ee, 0x7011), .driver_data = XILINX_FPGA_NUSE_MSI},
+        { PCI_DEVICE(0x1ded, 0x7022), .driver_data = XILINX_FPGA_USE_MSI},
+        { PCI_DEVICE(0x1ded, 0x7021), .driver_data = XILINX_FPGA_USE_MSI},
+        { PCI_DEVICE(0x1ded, 0x5220), .driver_data = XILINX_FPGA_USE_MSI},
+        {0}
+};
+MODULE_DEVICE_TABLE(pci, fpga_pci_ids);
+
+static struct pci_driver wb_fpga_pcie_driver = {
+    .name = "wb_fpga_pcie",
+    .id_table = fpga_pci_ids,/* only dynamic id's */
+    .probe = fpga_pcie_probe,
+    .remove = fpga_pcie_remove,
+};
+
+static int __init wb_fpga_pcie_init(void)
+{
+
+    FPGA_PCIE_DEV_VERBOSE("wb_fpga_pcie_init enter!\n");
+    return pci_register_driver(&wb_fpga_pcie_driver);
+}
+
+static void __exit wb_fpga_pcie_exit(void)
+{
+    FPGA_PCIE_DEV_VERBOSE("wb_fpga_pcie_exit enter!\n");
+    pci_unregister_driver(&wb_fpga_pcie_driver);
+    return;
+}
+
+module_init(wb_fpga_pcie_init);
+module_exit(wb_fpga_pcie_exit);
+MODULE_DESCRIPTION("fpga pcie driver");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_gpio_d1500.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_gpio_d1500.c
new file mode 100644
index 000000000..7d5d5da87
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_gpio_d1500.c
@@ -0,0 +1,367 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2011, 2012 Cavium Inc.
+ */
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/gpio.h>
+#include <linux/io.h>
+#include <linux/errno.h>
+#include <linux/ioport.h>
+#include <linux/spinlock.h>
+
+#define GPIO_NAME           "wb_gpio_d1500"
+
+#define GPIO_BASE           (0x500)
+#define GP_IO_SEL           (GPIO_BASE + 0x4)
+#define GP_LVL              (GPIO_BASE + 0xC)
+#define GPI_NMI_EN          (GPIO_BASE + 0x28)
+#define GPI_NMI_STS         (GPIO_BASE + 0x2a)
+#define GPI_INV             (GPIO_BASE + 0x2c)
+#define GPIO_USE_SEL2       (GPIO_BASE + 0x30)
+#define GP_IO_SEL2          (GPIO_BASE + 0x34)
+#define GP_LVL2             (GPIO_BASE + 0x38)
+#define GPI_NMI_EN_2        (GPIO_BASE + 0x3c)
+#define GPI_NMI_STS_2       (GPIO_BASE + 0x3e)
+#define GPIO_USE_SEL3       (GPIO_BASE + 0x40)
+#define GP_IO_SEL3          (GPIO_BASE + 0x44)
+#define GP_LVL3             (GPIO_BASE + 0x48)
+#define GPI_NMI_EN_3        (GPIO_BASE + 0x50)
+#define GPI_NMI_STS_3       (GPIO_BASE + 0x54)
+
+#define GPIO_BASE_ID        (0)
+#define BANKSIZE            (32)
+#define D1500_GPIO_PIN_NUM  (96)
+#define CELL_NUM            (2)
+
+int g_gpio_d1500_debug = 0;
+int g_gpio_d1500_error = 0;
+module_param(g_gpio_d1500_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_gpio_d1500_error, int, S_IRUGO | S_IWUSR);
+
+#define GPIO_DEBUG_VERBOSE(fmt, args...) do {                                        \
+    if (g_gpio_d1500_debug) { \
+        printk(KERN_ERR "[GPIO-D1500][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define GPIO_DEBUG_ERROR(fmt, args...) do {                                        \
+    if (g_gpio_d1500_error) { \
+        printk(KERN_ERR "[GPIO-D1500][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+static DEFINE_SPINLOCK(sio_lock);
+
+struct gpio_d1500_t {
+    struct gpio_chip chip;
+    u64 register_base;
+};
+
+static int wb_gpio_get(struct gpio_chip *gc, unsigned gpio_num)
+{
+    u32 data = 0;
+    unsigned int bank, offset;
+    unsigned long flags;
+
+    bank = gpio_num / BANKSIZE;
+    offset = gpio_num % BANKSIZE;
+
+    spin_lock_irqsave(&sio_lock, flags);
+    if (bank == 0) {
+        data = inl(GP_LVL) & (1 << offset);
+        if (data) {
+            data = 1;
+        }
+    } else if (bank == 1) {
+        data = inl(GP_LVL2) & (1 << offset);
+        if (data) {
+            data = 1;
+        }
+    } else if (bank == 2) {
+        data = inl(GP_LVL3) & (1 << offset);
+        if (data) {
+            data = 1;
+        }
+    }
+    spin_unlock_irqrestore(&sio_lock, flags);
+
+    return data;
+}
+
+static int wb_gpio_direction_in(struct gpio_chip *gc, unsigned gpio_num)
+{
+    u32 data;
+    unsigned int bank, offset;
+    unsigned long flags;
+
+    bank = gpio_num / BANKSIZE;
+    offset = gpio_num % BANKSIZE;
+
+    spin_lock_irqsave(&sio_lock, flags);
+    if (bank == 0) {
+        data = inl(GP_IO_SEL);
+        data = data | (1 << offset);
+        outl(data, GP_IO_SEL);
+    } else if (bank == 1) {
+        data = inl(GP_IO_SEL2);
+        data = data | (1 << offset);
+        outl(data, GP_IO_SEL2);
+    } else if (bank == 2) {
+        data = inl(GP_IO_SEL3);
+        data = data | (1 << offset);
+        outl(data, GP_IO_SEL3);
+    }
+    spin_unlock_irqrestore(&sio_lock, flags);
+
+    return 0;
+}
+
+static void wb_gpio_set(struct gpio_chip *gc,
+                unsigned gpio_num, int val)
+{
+    u32 data;
+    unsigned int bank, offset;
+    unsigned long flags;
+
+    bank = gpio_num / BANKSIZE;
+    offset = gpio_num % BANKSIZE;
+
+    spin_lock_irqsave(&sio_lock, flags);
+    if (bank == 0) {
+        data = inl(GP_LVL);
+        if (val) {
+            data = data | (1 << offset);
+        } else {
+            data = data & ~(1 << offset);
+        }
+        outl(data, GP_LVL);
+    } else if (bank == 1) {
+        data = inl(GP_LVL2);
+        if (val) {
+            data = data | (1 << offset);
+        } else {
+            data = data & ~(1 << offset);
+        }
+        outl(data, GP_LVL2);
+    } else if (bank == 2) {
+        data = inl(GP_LVL3);
+        if (val) {
+            data = data | (1 << offset);
+        } else {
+            data = data & ~(1 << offset);
+        }
+        outl(data, GP_LVL3);
+    }
+    spin_unlock_irqrestore(&sio_lock, flags);
+
+    return;
+}
+
+static int wb_gpio_direction_out(struct gpio_chip *gc,
+                    unsigned gpio_num, int val)
+{
+    u32 data;
+    unsigned int bank, offset;
+    unsigned long flags;
+
+    bank = gpio_num / BANKSIZE;
+    offset = gpio_num % BANKSIZE;
+
+    spin_lock_irqsave(&sio_lock, flags);
+    if (bank == 0) {
+        data = inl(GP_IO_SEL);
+        data = data & ~(1 << offset);
+        outl(data, GP_IO_SEL);
+
+        data = inl(GP_LVL);
+        if (val) {
+            data = data | (1 << offset);
+        } else {
+            data = data & ~(1 << offset);
+        }
+        outl(data, GP_LVL);
+    } else if (bank == 1) {
+        data = inl(GP_IO_SEL2);
+        data = data & ~(1 << offset);
+        outl(data, GP_IO_SEL2);
+
+        data = inl(GP_LVL2);
+        if (val) {
+            data = data | (1 << offset);
+        } else {
+            data = data & ~(1 << offset);
+        }
+        outl(data, GP_LVL2);
+    } else if (bank == 2) {
+        data = inl(GP_IO_SEL3);
+        data = data & ~(1 << offset);
+        outl(data, GP_IO_SEL3);
+
+        data = inl(GP_LVL3);
+        if (val) {
+            data = data | (1 << offset);
+        } else {
+            data = data & ~(1 << offset);
+        }
+        outl(data, GP_LVL3);
+    }
+    spin_unlock_irqrestore(&sio_lock, flags);
+
+    return 0;
+}
+
+#ifdef CONFIG_OF
+static int wb_gpio_of_xlate(struct gpio_chip *chip,
+                              const struct of_phandle_args *gpio_desc,
+                              u32 *flags)
+{
+    if (chip->of_gpio_n_cells < 2) {
+        return -EINVAL;
+    }
+
+    if (flags) {
+        *flags = gpio_desc->args[1];
+    }
+
+    return gpio_desc->args[0];
+}
+#endif
+
+static int wb_gpio_request(struct gpio_chip *chip, unsigned int offset)
+{
+    u32 data;
+    unsigned int bank, tmp_offset;
+    unsigned long flags;
+
+    bank = offset / BANKSIZE;
+    tmp_offset = offset % BANKSIZE;
+
+    spin_lock_irqsave(&sio_lock, flags);
+    if (bank == 0) {
+        data = inl(GPIO_BASE);
+        data = data | (1 << tmp_offset);
+        outl(data, GPIO_BASE);
+    } else if (bank == 1) {
+        data = inl(GPIO_USE_SEL2);
+        data = data | (1 << tmp_offset);
+        outl(data, GPIO_USE_SEL2);
+    } else if (bank == 2) {
+        data = inl(GPIO_USE_SEL3);
+        data = data | (1 << tmp_offset);
+        outl(data, GPIO_USE_SEL3);
+    }
+    spin_unlock_irqrestore(&sio_lock, flags);
+
+    return 0;
+}
+
+#if 0
+static void wb_gpio_free(struct gpio_chip *chip, unsigned int offset)
+{
+    u32 data;
+    unsigned int bank, tmp_offset;
+    unsigned long flags;
+
+    bank = offset / BANKSIZE;
+    tmp_offset = offset % BANKSIZE;
+
+    spin_lock_irqsave(&sio_lock, flags);
+    if (bank == 0) {
+        data = inl(GPIO_BASE);
+        data = data & ~(1 << tmp_offset);
+        outl(data, GPIO_BASE);
+    } else if (bank == 1) {
+        data = inl(GPIO_USE_SEL2);
+        data = data & ~(1 << tmp_offset);
+        outl(data, GPIO_USE_SEL2);
+    } else if (bank == 2) {
+        data = inl(GPIO_USE_SEL3);
+        data = data & ~(1 << tmp_offset);
+        outl(data, GPIO_USE_SEL3);
+    }
+
+    spin_unlock_irqrestore(&sio_lock, flags);
+
+    return;
+}
+#endif
+
+static struct gpio_chip wb_gpio_chip = {
+    .label              = GPIO_NAME,
+    .owner              = THIS_MODULE,
+    .base               = GPIO_BASE_ID,
+    .get                = wb_gpio_get,
+    .direction_input    = wb_gpio_direction_in,
+    .set                = wb_gpio_set,
+    .direction_output   = wb_gpio_direction_out,
+#ifdef CONFIG_OF
+    .of_xlate           = wb_gpio_of_xlate,
+#endif
+    .request            = wb_gpio_request,
+    .ngpio              = D1500_GPIO_PIN_NUM,
+#ifdef CONFIG_OF
+    .of_gpio_n_cells    = CELL_NUM,
+#endif
+    .can_sleep          = false,
+};
+
+static int wb_gpio_probe(struct platform_device *pdev)
+{
+    struct gpio_d1500_t *gpio;
+    int err;
+
+    gpio = devm_kzalloc(&pdev->dev, sizeof(*gpio), GFP_KERNEL);
+    if (!gpio) {
+        dev_err(&pdev->dev, "gpio kzalloc failed\n");
+        return -ENOMEM;
+    }
+
+    wb_gpio_chip.parent = &pdev->dev;
+    gpio->register_base = GPIO_BASE;
+    gpio->chip = wb_gpio_chip;
+    pdev->dev.platform_data = &wb_gpio_chip;
+    err = devm_gpiochip_add_data(&pdev->dev, &wb_gpio_chip, gpio);
+    if (err) {
+        dev_err(&pdev->dev, "gpiochip add failed\n");
+        return err;
+    }
+
+    dev_info(&pdev->dev, "register %llu gpio success.\n", gpio->register_base);
+
+    return 0;
+}
+
+static int wb_gpio_remove(struct platform_device *pdev)
+{
+    dev_info(&pdev->dev, "unregister d1500 gpio success\n");
+    return 0;
+}
+
+static const struct of_device_id gpio_d1500_match[] = {
+    {
+        .compatible = "wb_gpio_d1500",
+    },
+    {},
+};
+MODULE_DEVICE_TABLE(of, gpio_d1500_match);
+
+static struct platform_driver wb_gpio_driver = {
+    .driver = {
+        .name        = GPIO_NAME,
+        .of_match_table = gpio_d1500_match,
+    },
+    .probe      = wb_gpio_probe,
+    .remove     = wb_gpio_remove,
+};
+
+module_platform_driver(wb_gpio_driver);
+
+MODULE_DESCRIPTION("d1500 gpio driver");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_gpio_device.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_gpio_device.c
new file mode 100644
index 000000000..75f883b59
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_gpio_device.c
@@ -0,0 +1,54 @@
+#include <linux/module.h>
+#include <linux/io.h>
+#include <linux/device.h>
+#include <linux/delay.h>
+#include <linux/platform_device.h>
+
+static int g_wb_gpio_device_debug = 0;
+static int g_wb_gpio_device_error = 0;
+
+module_param(g_wb_gpio_device_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_gpio_device_error, int, S_IRUGO | S_IWUSR);
+
+#define WB_GPIO_DEVICE_VERBOSE(fmt, args...) do {                                        \
+    if (g_wb_gpio_device_debug) { \
+        printk(KERN_INFO "[WB_GPIO_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define WB_GPIO_DEVICE_ERROR(fmt, args...) do {                                        \
+    if (g_wb_gpio_device_error) { \
+        printk(KERN_ERR "[WB_GPIO_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+static void wb_gpio_device_release(struct device *dev)
+{
+    return;
+}
+
+static struct platform_device wb_gpio_d1500_device = {
+    .name   = "wb_gpio_d1500",
+    .id = -1,
+    .dev    = {
+        .release = wb_gpio_device_release,
+    },
+};
+
+static int __init wb_gpio_device_init(void)
+{
+    WB_GPIO_DEVICE_VERBOSE("wb_gpio_device_init enter!\n");
+    return platform_device_register(&wb_gpio_d1500_device);
+}
+
+static void __exit wb_gpio_device_exit(void)
+{
+    WB_GPIO_DEVICE_VERBOSE("wb_gpio_device_exit enter!\n");
+    return platform_device_unregister(&wb_gpio_d1500_device);
+}
+
+module_init(wb_gpio_device_init);
+module_exit(wb_gpio_device_exit);
+MODULE_DESCRIPTION("GPIO Devices");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_dev.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_dev.c
new file mode 100644
index 000000000..59cee0b1e
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_dev.c
@@ -0,0 +1,843 @@
+/*
+ * wb_io_dev.c
+ * ko to read/write i2c client through /dev/XXX device
+ */
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/device.h>
+#include <linux/miscdevice.h>
+#include <linux/i2c.h>
+#include <linux/platform_device.h>
+#include <linux/of_platform.h>
+#include <linux/slab.h>
+#include <linux/uaccess.h>
+#include <linux/fs.h>
+#include <linux/export.h>
+#include <linux/uio.h>
+
+#include "wb_i2c_dev.h"
+
+#define MAX_I2C_DEV_NUM      (256)
+#define FPGA_MAX_LEN         (256)
+#define MAX_NAME_SIZE        (20)
+#define MAX_BUS_WIDTH        (16)
+#define TRANSFER_WRITE_BUFF  (FPGA_MAX_LEN + MAX_BUS_WIDTH)
+
+#define WIDTH_1Byte          (1)
+#define WIDTH_2Byte          (2)
+#define WIDTH_4Byte          (4)
+
+#define KERNEL_SPASE         (0)
+#define USER_SPASE           (1)
+
+static int g_i2c_dev_debug = 0;
+static int g_i2c_dev_error = 0;
+
+module_param(g_i2c_dev_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_i2c_dev_error, int, S_IRUGO | S_IWUSR);
+
+#define I2C_DEV_DEBUG_DMESG(fmt, args...) do {                                        \
+    if (g_i2c_dev_debug) { \
+        printk(KERN_ERR "[I2C_DEV][DEBUG][func:%s line:%d]\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define I2C_DEV_DEBUG_ERROR(fmt, args...) do {                                        \
+    if (g_i2c_dev_error) { \
+        printk(KERN_ERR "[I2C_DEV][ERR][func:%s line:%d]\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+static struct i2c_dev_info* i2c_dev_arry[MAX_I2C_DEV_NUM];
+
+struct i2c_dev_info {
+    const char *name;
+    uint32_t data_bus_width;
+    uint32_t addr_bus_width;
+    uint32_t per_rd_len;
+    uint32_t per_wr_len;
+    uint32_t i2c_len;
+    struct miscdevice misc;
+    struct i2c_client *client;
+};
+
+static int transfer_read(struct i2c_client *client, u8 *buf, loff_t regaddr, size_t count)
+{
+    struct i2c_adapter *adap;
+    union i2c_smbus_data data;
+    int i, j;
+    u8 offset_buf[MAX_BUS_WIDTH];
+    struct i2c_msg msgs[2];
+    int msgs_num, ret;
+    struct i2c_dev_info *i2c_dev;
+    u8 offset;
+    u8 length;
+
+    if (!client) {
+        I2C_DEV_DEBUG_ERROR("can't get read client\n");
+        return -ENODEV;
+    }
+
+    adap = client->adapter;
+    if (!adap) {
+        I2C_DEV_DEBUG_ERROR("can't get read adap\n");
+        return -ENODEV;
+    }
+
+    i2c_dev = i2c_get_clientdata(client);
+    if (!i2c_dev) {
+        I2C_DEV_DEBUG_ERROR("can't get read i2c_dev\n");
+        return -ENODEV;
+    }
+
+    i = 0;
+
+    mem_clear(offset_buf, sizeof(offset_buf));
+
+    switch (i2c_dev->addr_bus_width) {
+    case WIDTH_4Byte:
+        offset_buf[i++] = (regaddr >> 24) & 0xFF;
+        offset_buf[i++] = (regaddr >> 16) & 0xFF;
+        offset_buf[i++] = (regaddr >> 8) & 0xFF;
+        offset_buf[i++] = regaddr & 0xFF;
+        break;
+    case WIDTH_2Byte:
+        offset_buf[i++] = (regaddr >> 8) & 0xFF;
+        offset_buf[i++] = regaddr & 0xFF;
+        break;
+    case WIDTH_1Byte:
+        offset_buf[i++] = regaddr & 0xFF;
+        break;
+    default:
+        I2C_DEV_DEBUG_ERROR("Only support 1,2,4 Byte Address Width,but set width = %u\n",
+            i2c_dev->addr_bus_width);
+        return -EINVAL;
+    }
+
+    if (adap->algo->master_xfer) {
+        mem_clear(msgs, sizeof(msgs));
+        msgs[0].addr = client->addr;
+        msgs[0].flags = 0;
+        msgs[0].len = i2c_dev->addr_bus_width;
+        msgs[0].buf = offset_buf;
+
+        msgs[1].addr = client->addr;
+        msgs[1].flags = I2C_M_RD;
+        msgs[1].len = count;
+        msgs[1].buf = buf;
+
+        msgs_num = 2;
+        ret = i2c_transfer(client->adapter, msgs, msgs_num);
+        if (ret != msgs_num) {
+            I2C_DEV_DEBUG_ERROR("i2c_transfer read error\n");
+            return -EINVAL;
+        }
+    } else {
+        if (i2c_dev->addr_bus_width == WIDTH_1Byte) {
+            offset = regaddr & 0xFF;
+            if (i2c_check_functionality(adap, I2C_FUNC_SMBUS_READ_I2C_BLOCK)) {
+                for (j = 0; j < count; j += I2C_SMBUS_BLOCK_MAX) {
+                    if (count - j > I2C_SMBUS_BLOCK_MAX) {
+                        length = I2C_SMBUS_BLOCK_MAX;
+                    } else {
+                        length = count - j;
+                    }
+                    data.block[0] = length;
+                    ret = adap->algo->smbus_xfer(adap, client->addr,
+                                    0,
+                                    I2C_SMBUS_READ,
+                                    offset, I2C_SMBUS_I2C_BLOCK_DATA, &data);
+                    if (ret) {
+                        I2C_DEV_DEBUG_ERROR("smbus_xfer read block error, ret = %d\n", ret);
+                        return -EFAULT;
+                    }
+                    memcpy(buf + j, data.block + 1, length);
+                    offset += length;
+                }
+            } else {
+                for (j = 0; j < count; j++) {
+                    ret = adap->algo->smbus_xfer(adap, client->addr,
+                                    0,
+                                    I2C_SMBUS_READ,
+                                    offset, I2C_SMBUS_BYTE_DATA, &data);
+
+                    if (!ret) {
+                        buf[j] = data.byte;
+                    } else {
+                        I2C_DEV_DEBUG_ERROR("smbus_xfer read byte error, ret = %d\n", ret);
+                        return -EFAULT;
+                    }
+                    offset++;
+                }
+            }
+        } else {
+            I2C_DEV_DEBUG_ERROR("smbus_xfer not support addr_bus_width = %d\n", i2c_dev->addr_bus_width);
+            return -EINVAL;
+        }
+    }
+    return 0;
+}
+
+static int transfer_write(struct i2c_client *client, u8 *buf, loff_t regaddr, size_t count)
+{
+    struct i2c_adapter *adap;
+    int i;
+    u8 offset_buf[TRANSFER_WRITE_BUFF];
+    struct i2c_msg msgs[1];
+    int msgs_num, ret;
+    struct i2c_dev_info *i2c_dev;
+
+    if (!client) {
+        I2C_DEV_DEBUG_ERROR("can't get write client\n");
+        return -ENODEV;
+    }
+
+    adap = client->adapter;
+    if (!adap) {
+        I2C_DEV_DEBUG_ERROR("can't get write adap\n");
+        return -ENODEV;
+    }
+
+    i2c_dev = i2c_get_clientdata(client);
+    if (!i2c_dev) {
+        I2C_DEV_DEBUG_ERROR("can't get read i2c_dev\n");
+        return -ENODEV;
+    }
+
+    i = 0;
+
+    mem_clear(offset_buf, sizeof(offset_buf));
+
+    switch (i2c_dev->addr_bus_width) {
+    case WIDTH_4Byte:
+        offset_buf[i++] = (regaddr >> 24) & 0xFF;
+        offset_buf[i++] = (regaddr >> 16) & 0xFF;
+        offset_buf[i++] = (regaddr >> 8) & 0xFF;
+        offset_buf[i++] = regaddr & 0xFF;
+        break;
+    case WIDTH_2Byte:
+        offset_buf[i++] = (regaddr >> 8) & 0xFF;
+        offset_buf[i++] = regaddr & 0xFF;
+        break;
+    case WIDTH_1Byte:
+        offset_buf[i++] = regaddr & 0xFF;
+        break;
+    default:
+        I2C_DEV_DEBUG_ERROR("Only support 1,2,4 Byte Address Width,but set width = %u\n",
+            i2c_dev->addr_bus_width);
+        return -EINVAL;
+    }
+
+    memcpy(offset_buf + i2c_dev->addr_bus_width, buf, count);
+
+    if (adap->algo->master_xfer) {
+        mem_clear(msgs, sizeof(msgs));
+
+        msgs[0].addr = client->addr;
+        msgs[0].flags = 0;
+        msgs[0].len = i2c_dev->addr_bus_width + count;
+        msgs[0].buf = offset_buf;
+
+        msgs_num = 1;
+        ret = i2c_transfer(adap, msgs, msgs_num);
+        if (ret != msgs_num) {
+            I2C_DEV_DEBUG_ERROR("i2c_transfer write error\n");
+            return -EINVAL;
+        }
+    } else {
+        I2C_DEV_DEBUG_ERROR("don't find write master_xfer\n");
+        return -EINVAL;
+    }
+
+    return 0;
+}
+
+static long i2c_dev_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
+{
+    return 0;
+}
+
+static int i2c_dev_open(struct inode *inode, struct file *file)
+{
+    unsigned int minor = iminor(inode);
+    struct i2c_dev_info *i2c_dev;
+
+    i2c_dev = i2c_dev_arry[minor];
+    if (i2c_dev == NULL) {
+        return -ENODEV;
+    }
+
+    file->private_data = i2c_dev;
+
+    return 0;
+}
+
+static int i2c_dev_release(struct inode *inode, struct file *file)
+{
+    file->private_data = NULL;
+
+    return 0;
+}
+
+static int device_read(struct i2c_dev_info *i2c_dev, uint32_t offset, uint8_t *buf, size_t count)
+{
+    int i, j, ret;
+    u8 tmp_offset;
+    u8 val[FPGA_MAX_LEN];
+    u32 width, rd_len, per_len, tmp;
+    u32 max_per_len;
+
+    if (offset > i2c_dev->i2c_len) {
+        I2C_DEV_DEBUG_DMESG("offset: 0x%x, i2c len: 0x%x, count: %lu, EOF.\n",
+            offset, i2c_dev->i2c_len, count);
+        return 0;
+    }
+
+    if (count > (i2c_dev->i2c_len - offset)) {
+        I2C_DEV_DEBUG_DMESG("read count out of range. input len:%lu, read len:%u.\n",
+            count, i2c_dev->i2c_len - offset);
+        count = i2c_dev->i2c_len - offset;
+    }
+
+    if (count == 0) {
+        I2C_DEV_DEBUG_DMESG("offset: 0x%x, i2c len: 0x%x, read len: %lu, EOF.\n",
+            offset, i2c_dev->i2c_len, count);
+        return 0;
+    }
+
+    width = i2c_dev->data_bus_width;
+    switch (width) {
+    case WIDTH_4Byte:
+        tmp_offset = offset & 0x3;
+        if (tmp_offset) {
+            I2C_DEV_DEBUG_ERROR("data bus width:%u, offset:%u, read size %lu invalid.\n",
+                width, offset, count);
+            return -EINVAL;
+        }
+        break;
+    case WIDTH_2Byte:
+        tmp_offset = offset & 0x1;
+        if (tmp_offset) {
+            I2C_DEV_DEBUG_ERROR("data bus width:%u, offset:%u, read size %lu invalid.\n",
+                width, offset, count);
+            return -EINVAL;
+        }
+        break;
+    case WIDTH_1Byte:
+        break;
+    default:
+        I2C_DEV_DEBUG_ERROR("Only support 1,2,4 Byte Data Width,but set width = %u\n", width);
+        return -EINVAL;
+    }
+
+    max_per_len = i2c_dev->per_rd_len;
+    tmp = (width - 1) & count;
+    rd_len = (tmp == 0) ? count : count + width - tmp;
+    per_len = (rd_len > max_per_len) ? (max_per_len) : (rd_len);
+
+    mem_clear(val, sizeof(val));
+    for (i = 0; i < rd_len; i += per_len) {
+        ret = transfer_read(i2c_dev->client, val + i, offset + i, per_len);
+        if (ret < 0) {
+            I2C_DEV_DEBUG_ERROR("read error.read offset = %u\n", (offset + i));
+            return -EFAULT;
+        }
+    }
+
+    if (width == WIDTH_1Byte) {
+        memcpy(buf, val, count);
+    } else {
+        for (i = 0; i < count; i += width) {
+            for (j = 0; (j < width) && (i + j < count); j++) {
+                buf[i + j] = val[i + width - j - 1];
+            }
+        }
+    }
+
+    return count;
+}
+
+static int device_write(struct i2c_dev_info *i2c_dev, uint32_t offset, uint8_t *buf, size_t count)
+{
+    int i, j, ret;
+    u8 tmp_offset;
+    u32 width;
+    u8 val[FPGA_MAX_LEN];
+    u32 wr_len, per_len, tmp;
+    u32 max_per_len;
+
+    if (offset > i2c_dev->i2c_len) {
+        I2C_DEV_DEBUG_DMESG("offset: 0x%x, i2c len: 0x%x, count: %lu, EOF.\n",
+            offset, i2c_dev->i2c_len, count);
+        return 0;
+    }
+
+    if (count > (i2c_dev->i2c_len - offset)) {
+        I2C_DEV_DEBUG_DMESG("read count out of range. input len:%lu, read len:%u.\n",
+            count, i2c_dev->i2c_len - offset);
+        count = i2c_dev->i2c_len - offset;
+    }
+
+    if (count == 0) {
+        I2C_DEV_DEBUG_DMESG("offset: 0x%x, i2c len: 0x%x, read len: %lu, EOF.\n",
+            offset, i2c_dev->i2c_len, count);
+        return 0;
+    }
+
+    width = i2c_dev->data_bus_width;
+    switch (width) {
+    case WIDTH_4Byte:
+        tmp_offset = offset & 0x3;
+        if (tmp_offset) {
+            I2C_DEV_DEBUG_ERROR("data bus width:%u, offset:%u, read size %lu invalid.\n",
+                width, offset, count);
+            return -EINVAL;
+        }
+        break;
+    case WIDTH_2Byte:
+        tmp_offset = offset & 0x1;
+        if (tmp_offset) {
+            I2C_DEV_DEBUG_ERROR("data bus width:%u, offset:%u, read size %lu invalid.\n",
+                width, offset, count);
+            return -EINVAL;
+        }
+        break;
+    case WIDTH_1Byte:
+        break;
+    default:
+        I2C_DEV_DEBUG_ERROR("Only support 1,2,4 Byte Data Width,but set width = %u\n", width);
+        return -EINVAL;
+    }
+
+    mem_clear(val, sizeof(val));
+
+    if (width == WIDTH_1Byte) {
+        memcpy(val, buf, count);
+    } else {
+        for (i = 0; i < count; i += width) {
+            for (j = 0; (j < width) && (i + j < count); j++) {
+                val[i + width - j - 1] = buf[i + j];
+            }
+        }
+    }
+
+    max_per_len = i2c_dev->per_wr_len;
+    tmp = (width - 1) & count;
+    wr_len = (tmp == 0) ? count : count + width - tmp;
+    per_len = (wr_len > max_per_len) ? (max_per_len) : (wr_len);
+
+    for (i = 0; i < wr_len; i += per_len) {
+        ret = transfer_write(i2c_dev->client, val + i, offset + i, per_len);
+        if (ret < 0) {
+            I2C_DEV_DEBUG_ERROR("write error.offset = %u\n", (offset + i));
+            return -EFAULT;
+        }
+    }
+    return count;
+}
+
+static ssize_t i2c_dev_read(struct file *file, char __user *buf, size_t count, loff_t *offset, int flag)
+{
+    u8 val[FPGA_MAX_LEN];
+    int ret, read_len;
+    struct i2c_dev_info *i2c_dev;
+
+    i2c_dev = file->private_data;
+    if (i2c_dev == NULL) {
+        I2C_DEV_DEBUG_ERROR("can't get read private_data.\n");
+        return -EINVAL;
+    }
+
+    if (count == 0) {
+        I2C_DEV_DEBUG_ERROR("Invalid params, read count is 0.\n");
+        return -EINVAL;
+    }
+
+    if (count > sizeof(val)) {
+        I2C_DEV_DEBUG_DMESG("read count %lu exceed max %lu.\n", count, sizeof(val));
+        count = sizeof(val);
+    }
+
+    mem_clear(val, sizeof(val));
+    read_len = device_read(i2c_dev, (uint32_t)*offset, val, count);
+    if (read_len < 0) {
+        I2C_DEV_DEBUG_ERROR("i2c dev read failed, dev name:%s, offset:0x%x, len:%lu.\n",
+            i2c_dev->name, (uint32_t)*offset, count);
+        return read_len;
+    }
+
+    /* check flag is user spase or kernel spase */
+    if (flag == USER_SPASE) {
+        I2C_DEV_DEBUG_DMESG("user space read, buf: %p, offset: %lld, read count %lu.\n",
+            buf, *offset, count);
+        if (copy_to_user(buf, val, read_len)) {
+            I2C_DEV_DEBUG_ERROR("copy_to_user failed.\n");
+            return -EFAULT;
+        }
+    } else {
+        I2C_DEV_DEBUG_DMESG("kernel space read, buf: %p, offset: %lld, read count %lu.\n",
+            buf, *offset, count);
+        memcpy(buf, val, read_len);
+    }
+
+    *offset += read_len;
+    ret = read_len;
+    return ret;
+}
+
+static ssize_t i2c_dev_read_user(struct file *file, char __user *buf, size_t count, loff_t *offset)
+{
+    int ret;
+
+    I2C_DEV_DEBUG_DMESG("i2c_dev_read_user, file: %p, count: %lu, offset: %lld\n",
+        file, count, *offset);
+    ret = i2c_dev_read(file, buf, count, offset, USER_SPASE);
+    return ret;
+}
+
+static ssize_t i2c_dev_read_iter(struct kiocb *iocb, struct iov_iter *to)
+{
+    int ret;
+
+    I2C_DEV_DEBUG_DMESG("i2c_dev_read_iter, file: %p, count: %lu, offset: %lld\n",
+        iocb->ki_filp, to->count, iocb->ki_pos);
+    ret = i2c_dev_read(iocb->ki_filp, to->kvec->iov_base, to->count, &iocb->ki_pos, KERNEL_SPASE);
+    return ret;
+}
+
+static ssize_t i2c_dev_write(struct file *file, const char __user *buf, size_t count, loff_t *offset, int flag)
+{
+    u8 val[FPGA_MAX_LEN];
+    int write_len;
+    struct i2c_dev_info *i2c_dev;
+
+    i2c_dev = file->private_data;
+    if (i2c_dev == NULL) {
+        I2C_DEV_DEBUG_ERROR("get write private_data error.\n");
+        return -EINVAL;
+    }
+
+    if (count == 0) {
+        I2C_DEV_DEBUG_ERROR("Invalid params, write count is 0.\n");
+        return -EINVAL;
+    }
+
+    if (count > sizeof(val)) {
+        I2C_DEV_DEBUG_DMESG("write count %lu exceed max %lu.\n", count, sizeof(val));
+        count = sizeof(val);
+    }
+
+    mem_clear(val, sizeof(val));
+
+    /* check flag is user spase or kernel spase */
+    if (flag == USER_SPASE) {
+        I2C_DEV_DEBUG_DMESG("user space write, buf: %p, offset: %lld, write count %lu.\n",
+            buf, *offset, count);
+        if (copy_from_user(val, buf, count)) {
+            I2C_DEV_DEBUG_ERROR("copy_from_user failed.\n");
+            return -EFAULT;
+        }
+    } else {
+        I2C_DEV_DEBUG_DMESG("kernel space write, buf: %p, offset: %lld, write count %lu.\n",
+            buf, *offset, count);
+        memcpy(val, buf, count);
+    }
+
+    write_len = device_write(i2c_dev, (uint32_t)*offset, val, count);
+    if (write_len < 0) {
+        I2C_DEV_DEBUG_ERROR("i2c dev write failed, dev name:%s, offset:0x%llx, len:%lu.\n",
+            i2c_dev->name, *offset, count);
+        return write_len;
+    }
+
+    *offset += write_len;
+    return write_len;
+}
+
+static ssize_t i2c_dev_write_user(struct file *file, const char __user *buf, size_t count, loff_t *offset)
+{
+    int ret;
+
+    I2C_DEV_DEBUG_DMESG("i2c_dev_write_user, file: %p, count: %lu, offset: %lld\n",
+        file, count, *offset);
+    ret = i2c_dev_write(file, buf, count, offset, USER_SPASE);
+    return ret;
+}
+
+static ssize_t i2c_dev_write_iter(struct kiocb *iocb, struct iov_iter *from)
+{
+    int ret;
+
+    I2C_DEV_DEBUG_DMESG("i2c_dev_write_iter, file: %p, count: %lu, offset: %lld\n",
+        iocb->ki_filp, from->count, iocb->ki_pos);
+    ret = i2c_dev_write(iocb->ki_filp, from->kvec->iov_base, from->count, &iocb->ki_pos, KERNEL_SPASE);
+    return ret;
+}
+
+static loff_t i2c_dev_llseek(struct file *file, loff_t offset, int origin)
+{
+    loff_t ret = 0;
+    struct i2c_dev_info *i2c_dev;
+
+    i2c_dev = file->private_data;
+    if (i2c_dev == NULL) {
+        I2C_DEV_DEBUG_ERROR("i2c_dev is NULL, llseek failed.\n");
+        return -EINVAL;
+    }
+
+    switch (origin) {
+    case SEEK_SET:
+        if (offset < 0) {
+            I2C_DEV_DEBUG_ERROR("SEEK_SET, offset:%lld, invalid.\n", offset);
+            ret = -EINVAL;
+            break;
+        }
+        if (offset > i2c_dev->i2c_len) {
+            I2C_DEV_DEBUG_ERROR("SEEK_SET out of range, offset:%lld, i2c_len:0x%x.\n",
+                offset, i2c_dev->i2c_len);
+            ret = - EINVAL;
+            break;
+        }
+        file->f_pos = offset;
+        ret = file->f_pos;
+        break;
+    case SEEK_CUR:
+        if (((file->f_pos + offset) > i2c_dev->i2c_len) || ((file->f_pos + offset) < 0)) {
+            I2C_DEV_DEBUG_ERROR("SEEK_CUR out of range, f_ops:%lld, offset:%lld, i2c_len:0x%x.\n",
+                file->f_pos, offset, i2c_dev->i2c_len);
+            ret = - EINVAL;
+            break;
+        }
+        file->f_pos += offset;
+        ret = file->f_pos;
+        break;
+    default:
+        I2C_DEV_DEBUG_ERROR("unsupport llseek type:%d.\n", origin);
+        ret = -EINVAL;
+        break;
+    }
+    return ret;
+}
+
+static const struct file_operations i2c_dev_fops = {
+    .owner      = THIS_MODULE,
+    .llseek     = i2c_dev_llseek,
+    .read       = i2c_dev_read_user,
+    .write      = i2c_dev_write_user,
+    .read_iter     = i2c_dev_read_iter,
+    .write_iter    = i2c_dev_write_iter,
+    .unlocked_ioctl = i2c_dev_ioctl,
+    .open       = i2c_dev_open,
+    .release    = i2c_dev_release,
+};
+
+static struct i2c_dev_info * dev_match(const char *path)
+{
+    struct i2c_dev_info * i2c_dev;
+    char dev_name[MAX_NAME_SIZE];
+    int i;
+    for (i = 0; i < MAX_I2C_DEV_NUM; i++) {
+        if (i2c_dev_arry[ i ] == NULL) {
+            continue;
+        }
+        i2c_dev = i2c_dev_arry[ i ];
+        snprintf(dev_name, MAX_NAME_SIZE,"/dev/%s", i2c_dev->name);
+        if (!strcmp(path, dev_name)) {
+            I2C_DEV_DEBUG_DMESG("get dev_name = %s, minor = %d\n", dev_name, i);
+            return i2c_dev;
+        }
+    }
+
+    return NULL;
+}
+
+int i2c_device_func_read(const char *path, uint32_t offset, uint8_t *buf, size_t count)
+{
+    struct i2c_dev_info *i2c_dev = NULL;
+    int ret;
+
+    if(path == NULL){
+        I2C_DEV_DEBUG_ERROR("path NULL");
+        return -EINVAL;
+    }
+
+    if(buf == NULL){
+        I2C_DEV_DEBUG_ERROR("buf NULL");
+        return -EINVAL;
+    }
+
+    if (count > FPGA_MAX_LEN) {
+        I2C_DEV_DEBUG_ERROR("read count %lu, beyond max:%d.\n", count, FPGA_MAX_LEN);
+        return -EINVAL;
+    }
+
+    i2c_dev = dev_match(path);
+    if (i2c_dev == NULL) {
+        I2C_DEV_DEBUG_ERROR("i2c_dev match failed. dev path = %s", path);
+        return -EINVAL;
+    }
+
+    ret = device_read(i2c_dev, offset, buf, count);
+    if (ret < 0) {
+        I2C_DEV_DEBUG_ERROR("fpga i2c dev read failed, dev name:%s, offset:0x%x, len:%lu.\n",
+            i2c_dev->name, offset, count);
+        return -EINVAL;
+    }
+
+    return count;
+}
+EXPORT_SYMBOL(i2c_device_func_read);
+
+int i2c_device_func_write(const char *path, uint32_t offset, uint8_t *buf, size_t count)
+{
+    struct i2c_dev_info *i2c_dev = NULL;
+    int ret;
+
+    if(path == NULL){
+        I2C_DEV_DEBUG_ERROR("path NULL");
+        return -EINVAL;
+    }
+
+    if(buf == NULL){
+        I2C_DEV_DEBUG_ERROR("buf NULL");
+        return -EINVAL;
+    }
+
+    if (count > FPGA_MAX_LEN) {
+        I2C_DEV_DEBUG_ERROR("write count %lu, beyond max:%d.\n", count, FPGA_MAX_LEN);
+        return -EINVAL;
+    }
+
+    i2c_dev = dev_match(path);
+    if (i2c_dev == NULL) {
+        I2C_DEV_DEBUG_ERROR("i2c_dev match failed. dev path = %s", path);
+        return -EINVAL;
+    }
+
+    ret = device_write (i2c_dev, offset, buf, count);
+    if (ret < 0) {
+        I2C_DEV_DEBUG_ERROR("i2c dev write failed, dev name:%s, offset:0x%x, len:%lu.\n",
+            i2c_dev->name, offset, count);
+        return -EINVAL;
+    }
+
+    return count;
+}
+EXPORT_SYMBOL(i2c_device_func_write);
+
+static int i2c_dev_probe(struct i2c_client *client, const struct i2c_device_id *id)
+{
+    int ret = 0;
+    struct i2c_dev_info *i2c_dev;
+    struct miscdevice *misc;
+    i2c_dev_device_t *i2c_dev_device;
+
+    i2c_dev = devm_kzalloc(&client->dev, sizeof(struct i2c_dev_info), GFP_KERNEL);
+    if (!i2c_dev) {
+        dev_err(&client->dev, "devm_kzalloc error. \n");
+        return -ENOMEM;
+    }
+
+    i2c_set_clientdata(client, i2c_dev);
+    i2c_dev->client = client;
+
+    if (client->dev.of_node) {
+
+        ret += of_property_read_string(client->dev.of_node, "i2c_name", &i2c_dev->name);
+        ret += of_property_read_u32(client->dev.of_node, "data_bus_width", &i2c_dev->data_bus_width);
+        ret += of_property_read_u32(client->dev.of_node, "addr_bus_width", &i2c_dev->addr_bus_width);
+        ret += of_property_read_u32(client->dev.of_node, "per_rd_len", &i2c_dev->per_rd_len);
+        ret += of_property_read_u32(client->dev.of_node, "per_wr_len", &i2c_dev->per_wr_len);
+        ret += of_property_read_u32(client->dev.of_node, "i2c_len", &i2c_dev->i2c_len);
+        if (ret != 0) {
+            dev_err(&client->dev, "dts config error.ret:%d.\n", ret);
+            return -ENXIO;
+        }
+    } else {
+        if (client->dev.platform_data == NULL) {
+            dev_err(&client->dev, "Failed to get platform data config.\n");
+            return -ENXIO;
+        }
+        i2c_dev_device = client->dev.platform_data;
+        i2c_dev->name = i2c_dev_device->i2c_name;
+        i2c_dev->data_bus_width = i2c_dev_device->data_bus_width;
+        i2c_dev->addr_bus_width = i2c_dev_device->addr_bus_width;
+        i2c_dev->per_rd_len = i2c_dev_device->per_rd_len;
+        i2c_dev->per_wr_len = i2c_dev_device->per_wr_len;
+        i2c_dev->i2c_len = i2c_dev_device->i2c_len;
+    }
+
+    if ((i2c_dev->per_rd_len & (i2c_dev->data_bus_width - 1)) ||
+        (i2c_dev->per_wr_len & (i2c_dev->data_bus_width - 1))) {
+        dev_err(&client->dev, "Invalid config per_rd_len %d per_wr_len %d data bus_width %d.\n",
+            i2c_dev->per_rd_len, i2c_dev->per_wr_len, i2c_dev->data_bus_width);
+        return -ENXIO;
+    }
+
+    if ((i2c_dev->i2c_len == 0) || (i2c_dev->i2c_len & (i2c_dev->data_bus_width - 1))) {
+        dev_err(&client->dev, "Invalid config i2c_len %d, data bus_width %d.\n",
+            i2c_dev->i2c_len, i2c_dev->data_bus_width);
+        return -ENXIO;
+    }
+
+    misc = &i2c_dev->misc;
+    misc->minor = MISC_DYNAMIC_MINOR;
+    misc->name = i2c_dev->name;
+    misc->fops = &i2c_dev_fops;
+    misc->mode = 0666;
+    if (misc_register(misc) != 0) {
+        dev_err(&client->dev, "register %s faild.\n", misc->name);
+        return -ENXIO;
+    }
+
+    if (misc->minor >= MAX_I2C_DEV_NUM) {
+        dev_err(&client->dev, "minor number beyond the limit! is %d.\n", misc->minor);
+        misc_deregister(misc);
+        return -ENXIO;
+    }
+    i2c_dev_arry[misc->minor] = i2c_dev;
+
+    dev_info(&client->dev, "register %u addr_bus_width %u data_bus_width 0x%x i2c_len device %s with %u per_rd_len %u per_wr_len success.\n",
+        i2c_dev->addr_bus_width, i2c_dev->data_bus_width, i2c_dev->i2c_len, i2c_dev->name, i2c_dev->per_rd_len, i2c_dev->per_wr_len);
+
+    return 0;
+}
+
+static void i2c_dev_remove(struct i2c_client *client)
+{
+    int i;
+    for (i = 0; i < MAX_I2C_DEV_NUM; i++) {
+        if (i2c_dev_arry[i] != NULL) {
+            misc_deregister(&i2c_dev_arry[i]->misc);
+            i2c_dev_arry[i] = NULL;
+        }
+    }
+    return;
+}
+
+static const struct i2c_device_id i2c_dev_id[] = {
+    { "wb-i2c-dev", 0 },
+    { }
+};
+MODULE_DEVICE_TABLE(i2c, i2c_dev_id);
+
+static const struct of_device_id i2c_dev_of_match[] = {
+    { .compatible = "wb-i2c-dev" },
+    { },
+};
+MODULE_DEVICE_TABLE(of, i2c_dev_of_match);
+
+static struct i2c_driver i2c_dev_driver = {
+    .driver = {
+        .name = "wb-i2c-dev",
+        .of_match_table = i2c_dev_of_match,
+    },
+    .probe      = i2c_dev_probe,
+    .remove     = i2c_dev_remove,
+    .id_table   = i2c_dev_id,
+};
+module_i2c_driver(i2c_dev_driver);
+
+MODULE_DESCRIPTION("i2c dev driver");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_dev.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_dev.h
new file mode 100644
index 000000000..9cc95d88e
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_dev.h
@@ -0,0 +1,20 @@
+#ifndef __WB_I2C_DEV_H__
+#define __WB_I2C_DEV_H__
+#include <linux/string.h>
+
+#define mem_clear(data, size) memset((data), 0, (size))
+#define I2C_DEV_NAME_MAX_LEN (64)
+
+typedef struct i2c_dev_device_s {
+    struct i2c_client *client;
+    uint32_t i2c_bus;
+    uint32_t i2c_addr;
+    char i2c_name[I2C_DEV_NAME_MAX_LEN];
+    uint32_t data_bus_width;
+    uint32_t addr_bus_width;
+    uint32_t per_rd_len;
+    uint32_t per_wr_len;
+    uint32_t i2c_len;
+} i2c_dev_device_t;
+
+#endif
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_ocores.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_ocores.c
new file mode 100644
index 000000000..20f8954cc
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_ocores.c
@@ -0,0 +1,1179 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * i2c-ocores.c: I2C bus driver for OpenCores I2C controller
+ * (https://opencores.org/project/i2c/overview)
+ *
+ * Peter Korsgaard <peter@korsgaard.com>
+ *
+ * Support for the GRLIB port of the controller by
+ * Andreas Larsson <andreas@gaisler.com>
+ */
+
+#include <linux/clk.h>
+#include <linux/delay.h>
+#include <linux/err.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/errno.h>
+#include <linux/platform_device.h>
+#include <linux/i2c.h>
+#include <linux/interrupt.h>
+#include <linux/wait.h>
+#include <linux/slab.h>
+#include <linux/io.h>
+#include <linux/log2.h>
+#include <linux/spinlock.h>
+#include <linux/jiffies.h>
+#include <linux/pci.h>
+#include <linux/fs.h>
+#include <linux/uaccess.h>
+#include <linux/uio.h>
+
+#include "wb_i2c_ocores.h"
+
+#define OCORES_FLAG_POLL      BIT(0)
+
+/* registers */
+#define OCI2C_PRELOW          (0)
+#define OCI2C_PREHIGH         (1)
+#define OCI2C_CONTROL         (2)
+#define OCI2C_DATA            (3)
+#define OCI2C_CMD             (4) /* write only */
+#define OCI2C_STATUS          (4) /* read only, same address as OCI2C_CMD */
+
+#define OCI2C_CTRL_IEN        (0x40)
+#define OCI2C_CTRL_EN         (0x80)
+
+#define OCI2C_CMD_START       (0x91)
+#define OCI2C_CMD_STOP        (0x41)
+#define OCI2C_CMD_READ        (0x21)
+#define OCI2C_CMD_WRITE       (0x11)
+#define OCI2C_CMD_READ_ACK    (0x21)
+#define OCI2C_CMD_READ_NACK   (0x29)
+#define OCI2C_CMD_IACK        (0x01)
+
+#define OCI2C_STAT_IF         (0x01)
+#define OCI2C_STAT_TIP        (0x02)
+#define OCI2C_STAT_ARBLOST    (0x20)
+#define OCI2C_STAT_BUSY       (0x40)
+#define OCI2C_STAT_NACK       (0x80)
+
+#define STATE_DONE            (0)
+#define STATE_START           (1)
+#define STATE_WRITE           (2)
+#define STATE_READ            (3)
+#define STATE_ERROR           (4)
+
+#define TYPE_OCORES           (0)
+#define TYPE_GRLIB            (1)
+
+#define OCORE_WAIT_SCH        (40)
+#define REG_IO_WIDTH_1        (1)
+#define REG_IO_WIDTH_2        (2)
+#define REG_IO_WIDTH_4        (4)
+
+#define SYMBOL_I2C_DEV_MODE   (1)
+#define FILE_MODE             (2)
+#define SYMBOL_PCIE_DEV_MODE  (3)
+#define SYMBOL_IO_DEV_MODE    (4)
+
+typedef struct wb_pci_dev_s {
+    uint32_t domain;
+    uint32_t bus;
+    uint32_t slot;
+    uint32_t fn;
+    uint32_t check_pci_id;
+    uint32_t pci_id;
+} wb_pci_dev_t;
+
+/*
+ * 'process_lock' exists because ocores_process() and ocores_process_timeout()
+ * can't run in parallel.
+ */
+struct ocores_i2c {
+    uint32_t base_addr;
+    uint32_t reg_shift;
+    uint32_t reg_io_width;
+    unsigned long flags;
+    wait_queue_head_t wait;
+    struct i2c_adapter adap;
+    int adap_nr;
+    struct i2c_msg *msg;
+    int pos;
+    int nmsgs;
+    int state;
+    spinlock_t process_lock;
+    uint32_t ip_clock_khz;
+    uint32_t bus_clock_khz;
+    void (*setreg)(struct ocores_i2c *i2c, int reg, u32 value);
+    u32 (*getreg)(struct ocores_i2c *i2c, int reg);
+    const char *dev_name;
+    uint32_t reg_access_mode;
+    uint32_t big_endian;
+    uint32_t irq_offset;
+    wb_pci_dev_t wb_pci_dev;
+    struct device *dev;
+};
+
+int g_wb_ocores_i2c_debug = 0;
+int g_wb_ocores_i2c_error = 0;
+int g_wb_ocores_i2c_xfer = 0;
+
+module_param(g_wb_ocores_i2c_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_ocores_i2c_error, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_ocores_i2c_xfer, int, S_IRUGO | S_IWUSR);
+
+#define OCORES_I2C_VERBOSE(fmt, args...) do {                                        \
+    if (g_wb_ocores_i2c_debug) { \
+        printk(KERN_INFO "[OCORES_I2C][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define OCORES_I2C_ERROR(fmt, args...) do {                                        \
+    if (g_wb_ocores_i2c_error) { \
+        printk(KERN_ERR "[OCORES_I2C][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define OCORES_I2C_XFER(fmt, args...) do {                                        \
+    if (g_wb_ocores_i2c_xfer) { \
+        printk(KERN_INFO "[OCORES_I2C][XFER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+extern int i2c_device_func_write(const char *path, uint32_t offset, uint8_t *buf, size_t count);
+extern int i2c_device_func_read(const char *path, uint32_t offset, uint8_t *buf, size_t count);
+extern int pcie_device_func_read(const char *path, uint32_t offset, uint8_t *buf, size_t count);
+extern int pcie_device_func_write(const char *path, uint32_t offset, uint8_t *buf, size_t count);
+extern int io_device_func_read(const char *path, uint32_t offset, uint8_t *buf, size_t count);
+extern int io_device_func_write(const char *path, uint32_t offset, uint8_t *buf, size_t count);
+#if 0
+int __attribute__((weak)) i2c_device_func_read(const char *path, uint32_t offset,
+                              uint8_t *buf, size_t count)
+{
+    OCORES_I2C_ERROR("enter __weak i2c func read\r\n");
+    return -EINVAL;
+}
+
+int __attribute__((weak)) i2c_device_func_write(const char *path, uint32_t offset,
+                              uint8_t *buf, size_t count)
+{
+    OCORES_I2C_ERROR("enter __weak i2c func write\r\n");
+    return -EINVAL;
+}
+
+int __attribute__((weak)) pcie_device_func_read(const char *path, uint32_t offset,
+                              uint8_t *buf, size_t count)
+{
+    OCORES_I2C_ERROR("enter __weak pcie func read\r\n");
+    return -EINVAL;
+}
+
+int __attribute__((weak)) pcie_device_func_write(const char *path, uint32_t offset,
+                              uint8_t *buf, size_t count)
+{
+    OCORES_I2C_ERROR("enter __weak pcie func write\r\n");
+    return -EINVAL;
+}
+
+int __attribute__((weak)) io_device_func_read(const char *path, uint32_t offset,
+                              uint8_t *buf, size_t count)
+{
+    OCORES_I2C_ERROR("enter __weak io func read\r\n");
+    return -EINVAL;
+}
+
+int __attribute__((weak)) io_device_func_write(const char *path, uint32_t offset,
+                              uint8_t *buf, size_t count)
+{
+    OCORES_I2C_ERROR("enter __weak io func write\r\n");
+    return -EINVAL;
+}
+#endif
+static int ocores_i2c_file_read(const char *path, uint32_t pos, uint8_t *val, size_t size)
+{
+    int ret;
+    struct file *filp;
+    loff_t tmp_pos;
+
+    struct kvec iov = {
+        .iov_base = val,
+        .iov_len = min_t(size_t, size, MAX_RW_COUNT),
+    };
+    struct iov_iter iter;
+
+    filp = filp_open(path, O_RDONLY, 0);
+    if (IS_ERR(filp)) {
+        OCORES_I2C_ERROR("read open failed errno = %ld\r\n", -PTR_ERR(filp));
+        filp = NULL;
+        goto exit;
+    }
+
+    tmp_pos = (loff_t)pos;
+    iov_iter_kvec(&iter, ITER_DEST, &iov, 1, iov.iov_len);
+    ret = vfs_iter_read(filp, &iter, &tmp_pos, 0);
+    if (ret < 0) {
+        OCORES_I2C_ERROR("vfs_iter_read failed, path=%s, addr=%d, size=%ld, ret=%d\r\n", path, pos, size, ret);
+        goto exit;
+    }
+
+    filp_close(filp, NULL);
+    return ret;
+
+exit:
+    if (filp != NULL) {
+        filp_close(filp, NULL);
+    }
+
+    return -1;
+}
+
+static int ocores_i2c_file_write(const char *path, uint32_t pos, uint8_t *val, size_t size)
+{
+
+    int ret;
+    struct file *filp;
+    loff_t tmp_pos;
+
+    struct kvec iov = {
+        .iov_base = val,
+        .iov_len = min_t(size_t, size, MAX_RW_COUNT),
+    };
+    struct iov_iter iter;
+
+    filp = filp_open(path, O_RDWR, 777);
+    if (IS_ERR(filp)) {
+        OCORES_I2C_ERROR("write open failed errno = %ld\r\n", -PTR_ERR(filp));
+        filp = NULL;
+        goto exit;
+    }
+
+    tmp_pos = (loff_t)pos;
+    iov_iter_kvec(&iter, ITER_SOURCE, &iov, 1, iov.iov_len);
+    ret = vfs_iter_write(filp, &iter, &tmp_pos, 0);
+    if (ret < 0) {
+        OCORES_I2C_ERROR("vfs_iter_write failed, path=%s, addr=%d, size=%ld, ret=%d\r\n", path, pos, size, ret);
+        goto exit;
+    }
+
+    vfs_fsync(filp, 1);
+    filp_close(filp, NULL);
+    return ret;
+
+exit:
+    if (filp != NULL) {
+        filp_close(filp, NULL);
+    }
+
+    return -1;
+}
+
+static int ocores_i2c_reg_write(struct ocores_i2c *i2c, uint32_t pos, uint8_t *val, size_t size)
+{
+    int ret;
+
+    switch (i2c->reg_access_mode) {
+    case SYMBOL_I2C_DEV_MODE:
+        ret = i2c_device_func_write(i2c->dev_name, pos, val, size);
+        break;
+    case FILE_MODE:
+        ret = ocores_i2c_file_write(i2c->dev_name, pos, val, size);
+        break;
+    case SYMBOL_PCIE_DEV_MODE:
+        ret = pcie_device_func_write(i2c->dev_name, pos, val, size);
+        break;
+    case SYMBOL_IO_DEV_MODE:
+        ret = io_device_func_write(i2c->dev_name, pos, val, size);
+        break;
+    default:
+        OCORES_I2C_ERROR("err func_mode, write failed.\n");
+        return -EINVAL;
+    }
+
+    return ret;
+}
+
+static int ocores_i2c_reg_read(struct ocores_i2c *i2c, uint32_t pos, uint8_t *val, size_t size)
+{
+    int ret;
+
+    switch (i2c->reg_access_mode) {
+    case SYMBOL_I2C_DEV_MODE:
+        ret = i2c_device_func_read(i2c->dev_name, pos, val, size);
+        break;
+    case FILE_MODE:
+        ret = ocores_i2c_file_read(i2c->dev_name, pos, val, size);
+        break;
+    case SYMBOL_PCIE_DEV_MODE:
+        ret = pcie_device_func_read(i2c->dev_name, pos, val, size);
+        break;
+    case SYMBOL_IO_DEV_MODE:
+        ret = io_device_func_read(i2c->dev_name, pos, val, size);
+        break;
+    default:
+        OCORES_I2C_ERROR("err func_mode, read failed.\n");
+        return -EINVAL;
+    }
+
+    return ret;
+}
+static void oc_setreg_8(struct ocores_i2c *i2c, int reg, u32 value)
+{
+    u8 buf_tmp[REG_IO_WIDTH_1];
+    u32 pos;
+
+    pos = i2c->base_addr + (reg << i2c->reg_shift);
+    OCORES_I2C_VERBOSE("path:%s, access mode:%d, pos:0x%x, value0x%x.\n",
+        i2c->dev_name, i2c->reg_access_mode, pos, value);
+
+    buf_tmp[0] = (value & 0Xff);
+    ocores_i2c_reg_write(i2c, pos, buf_tmp, REG_IO_WIDTH_1);
+    return;
+}
+
+static void oc_setreg_16(struct ocores_i2c *i2c, int reg, u32 value)
+{
+    u8 buf_tmp[REG_IO_WIDTH_2];
+    u32 pos;
+
+    pos = i2c->base_addr + (reg << i2c->reg_shift);
+    OCORES_I2C_VERBOSE("path:%s, access mode:%d, pos:0x%x, value0x%x.\n",
+        i2c->dev_name, i2c->reg_access_mode, pos, value);
+
+    buf_tmp[0] = (value & 0Xff);
+    buf_tmp[1] = (value >> 8) & 0xff;
+    ocores_i2c_reg_write(i2c, pos, buf_tmp, REG_IO_WIDTH_2);
+    return;
+}
+
+static void oc_setreg_32(struct ocores_i2c *i2c, int reg, u32 value)
+{
+    u8 buf_tmp[REG_IO_WIDTH_4];
+    u32 pos;
+
+    pos = i2c->base_addr + (reg << i2c->reg_shift);
+    OCORES_I2C_VERBOSE("path:%s, access mode:%d, pos:0x%x, value0x%x.\n",
+        i2c->dev_name, i2c->reg_access_mode, pos, value);
+
+    buf_tmp[0] = (value & 0xff);
+    buf_tmp[1] = (value >> 8) & 0xff;
+    buf_tmp[2] = (value >> 16) & 0xff;
+    buf_tmp[3] = (value >> 24) & 0xff;
+
+    ocores_i2c_reg_write(i2c, pos, buf_tmp, REG_IO_WIDTH_4);
+    return;
+}
+
+static void oc_setreg_16be(struct ocores_i2c *i2c, int reg, u32 value)
+{
+    u8 buf_tmp[REG_IO_WIDTH_2];
+    u32 pos;
+
+    pos = i2c->base_addr + (reg << i2c->reg_shift);
+    OCORES_I2C_VERBOSE("path:%s, access mode:%d, pos:0x%x, value0x%x.\n",
+        i2c->dev_name, i2c->reg_access_mode, pos, value);
+
+    buf_tmp[0] = (value >> 8) & 0xff;
+    buf_tmp[1] = (value & 0Xff);
+    ocores_i2c_reg_write(i2c, pos, buf_tmp, REG_IO_WIDTH_2);
+    return;
+}
+
+static void oc_setreg_32be(struct ocores_i2c *i2c, int reg, u32 value)
+{
+    u8 buf_tmp[REG_IO_WIDTH_4];
+    u32 pos;
+
+    pos = i2c->base_addr + (reg << i2c->reg_shift);
+    OCORES_I2C_VERBOSE("path:%s, access mode:%d, pos:0x%x, value0x%x.\n",
+        i2c->dev_name, i2c->reg_access_mode, pos, value);
+
+    buf_tmp[0] = (value >> 24) & 0xff;
+    buf_tmp[1] = (value >> 16) & 0xff;
+    buf_tmp[2] = (value >> 8) & 0xff;
+    buf_tmp[3] = (value & 0xff);
+    ocores_i2c_reg_write(i2c, pos, buf_tmp, REG_IO_WIDTH_4);
+    return;
+}
+
+static inline u32 oc_getreg_8(struct ocores_i2c *i2c, int reg)
+{
+    u8 buf_tmp[REG_IO_WIDTH_1];
+    u32 value, pos;
+
+    pos = i2c->base_addr + (reg << i2c->reg_shift);
+    ocores_i2c_reg_read(i2c, pos, buf_tmp, REG_IO_WIDTH_1);
+    value = buf_tmp[0];
+
+    OCORES_I2C_VERBOSE("path:%s, access mode:%d, pos:0x%x, value0x%x.\n",
+        i2c->dev_name, i2c->reg_access_mode, pos, value);
+
+    return value;
+}
+
+static inline u32 oc_getreg_16(struct ocores_i2c *i2c, int reg)
+{
+    u8 buf_tmp[REG_IO_WIDTH_2];
+    u32 value, pos;
+    int i;
+
+    pos = i2c->base_addr + (reg << i2c->reg_shift);
+    mem_clear(buf_tmp, sizeof(buf_tmp));
+    ocores_i2c_reg_read(i2c, pos, buf_tmp, REG_IO_WIDTH_2);
+
+    value = 0;
+    for (i = 0; i < REG_IO_WIDTH_2 ; i++) {
+        value |= buf_tmp[i] << (8 * i);
+    }
+
+    OCORES_I2C_VERBOSE("path:%s, access mode:%d, pos:0x%x, value0x%x.\n",
+        i2c->dev_name, i2c->reg_access_mode, pos, value);
+    return value;
+}
+
+static inline u32 oc_getreg_32(struct ocores_i2c *i2c, int reg)
+{
+    u8 buf_tmp[REG_IO_WIDTH_4];
+    u32 value, pos;
+    int i;
+
+    pos = i2c->base_addr + (reg << i2c->reg_shift);
+    mem_clear(buf_tmp, sizeof(buf_tmp));
+    ocores_i2c_reg_read(i2c, pos, buf_tmp, REG_IO_WIDTH_4);
+
+    value = 0;
+    for (i = 0; i < REG_IO_WIDTH_4 ; i++) {
+        value |= buf_tmp[i] << (8 * i);
+    }
+    OCORES_I2C_VERBOSE("path:%s, access mode:%d, pos:0x%x, value0x%x.\n",
+        i2c->dev_name, i2c->reg_access_mode, pos, value);
+    return value;
+}
+
+static inline u32 oc_getreg_16be(struct ocores_i2c *i2c, int reg)
+{
+    u8 buf_tmp[REG_IO_WIDTH_2];
+    u32 value, pos;
+    int i;
+
+    pos = i2c->base_addr + (reg << i2c->reg_shift);
+
+    mem_clear(buf_tmp, sizeof(buf_tmp));
+    ocores_i2c_reg_read(i2c, pos, buf_tmp, REG_IO_WIDTH_2);
+
+    value = 0;
+    for (i = 0; i < REG_IO_WIDTH_2 ; i++) {
+        value |= buf_tmp[i] << (8 * (REG_IO_WIDTH_2 -i - 1));
+    }
+
+    OCORES_I2C_VERBOSE("path:%s, access mode:%d, pos:0x%x, value0x%x.\n",
+        i2c->dev_name, i2c->reg_access_mode, pos, value);
+    return value;
+}
+
+static inline u32 oc_getreg_32be(struct ocores_i2c *i2c, int reg)
+{
+    u8 buf_tmp[REG_IO_WIDTH_4];
+    u32 value, pos;
+    int i;
+
+    pos = i2c->base_addr + (reg << i2c->reg_shift);
+
+    mem_clear(buf_tmp, sizeof(buf_tmp));
+    ocores_i2c_reg_read(i2c, pos, buf_tmp, REG_IO_WIDTH_4);
+
+    value = 0;
+    for (i = 0; i < REG_IO_WIDTH_4 ; i++) {
+        value |= buf_tmp[i] << (8 * (REG_IO_WIDTH_4 -i - 1));
+    }
+
+    OCORES_I2C_VERBOSE("path:%s, access mode:%d, pos:0x%x, value0x%x.\n",
+        i2c->dev_name, i2c->reg_access_mode, pos, value);
+    return value;
+
+}
+
+static inline void oc_setreg(struct ocores_i2c *i2c, int reg, u32 value)
+{
+    i2c->setreg(i2c, reg, value);
+    return;
+}
+
+static inline u32 oc_getreg(struct ocores_i2c *i2c, int reg)
+{
+    return i2c->getreg(i2c, reg);
+}
+
+static int ocores_msg_check(struct i2c_msg *msgs, int num)
+{
+    int i, ret = 0;
+
+    if (!msgs) {
+        ret = -EFAULT;
+        goto out;
+    }
+
+    for (i = 0; i < num; ++i) {
+        if (!msgs[i].buf) {
+            ret = -EFAULT;
+            goto out;
+        }
+    }
+
+out:
+    return ret;
+}
+
+static void ocores_process(struct ocores_i2c *i2c, u8 stat)
+{
+    struct i2c_msg *msg = i2c->msg;
+
+    OCORES_I2C_XFER("Enter nr %d.\n", i2c->adap.nr);
+    if ((i2c->state == STATE_DONE) || (i2c->state == STATE_ERROR)) {
+        /* stop has been sent */
+        oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_IACK);
+        wake_up(&i2c->wait);
+        OCORES_I2C_XFER("stop has been sent, exit.\n");
+        goto out;
+    }
+
+    /* error? */
+    if (stat & OCI2C_STAT_ARBLOST) {
+        i2c->state = STATE_ERROR;
+        oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_STOP);
+        OCORES_I2C_XFER("error exit, lose arbitration.\n");
+        goto out;
+    }
+
+    if (ocores_msg_check(i2c->msg, i2c->nmsgs) != 0) {
+        OCORES_I2C_XFER("msg buf is NULL\n");
+        i2c->state = STATE_ERROR;
+        oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_STOP);
+        goto out;
+    }
+
+    if ((i2c->state == STATE_START) || (i2c->state == STATE_WRITE)) {
+        i2c->state =
+            (msg->flags & I2C_M_RD) ? STATE_READ : STATE_WRITE;
+
+        if (stat & OCI2C_STAT_NACK) {
+            i2c->state = STATE_ERROR;
+            oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_STOP);
+            OCORES_I2C_XFER("OCI2C_STAT_NACK, exit.\n");
+            goto out;
+        }
+    } else {
+        msg->buf[i2c->pos++] = oc_getreg(i2c, OCI2C_DATA);
+    }
+
+    /* end of msg? */
+    if (i2c->pos == msg->len) {
+        OCORES_I2C_XFER("Enter end of msg.\n");
+        i2c->nmsgs--;
+        i2c->msg++;
+        i2c->pos = 0;
+        msg = i2c->msg;
+
+        if (i2c->nmsgs) {    /* end? */
+            /* send start? */
+            if (!(msg->flags & I2C_M_NOSTART)) {
+                u8 addr = i2c_8bit_addr_from_msg(msg);
+
+                i2c->state = STATE_START;
+
+                oc_setreg(i2c, OCI2C_DATA, addr);
+                oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_START);
+                OCORES_I2C_XFER("send start, exit.\n");
+                goto out;
+            }
+            i2c->state = (msg->flags & I2C_M_RD)
+                ? STATE_READ : STATE_WRITE;
+        } else {
+            i2c->state = STATE_DONE;
+            oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_STOP);
+            OCORES_I2C_XFER("send OCI2C_CMD_STOP, exit.\n");
+            goto out;
+        }
+    }
+
+    if (i2c->state == STATE_READ) {
+        oc_setreg(i2c, OCI2C_CMD, i2c->pos == (msg->len-1) ?
+              OCI2C_CMD_READ_NACK : OCI2C_CMD_READ_ACK);
+    } else {
+        oc_setreg(i2c, OCI2C_DATA, msg->buf[i2c->pos++]);
+        oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_WRITE);
+    }
+
+out:
+    OCORES_I2C_XFER("normal, exit nr %d.\n", i2c->adap.nr);
+    return;
+}
+
+static irqreturn_t ocores_isr(int irq, void *dev_id)
+{
+    struct ocores_i2c *i2c = dev_id;
+    u8 stat;
+    unsigned long flags;
+
+    if (!i2c) {
+        return IRQ_NONE;
+    }
+
+    spin_lock_irqsave(&i2c->process_lock, flags);
+    stat = oc_getreg(i2c, OCI2C_STATUS);
+    if (!(stat & OCI2C_STAT_IF)) {
+        spin_unlock_irqrestore(&i2c->process_lock, flags);
+        return IRQ_NONE;
+    }
+    OCORES_I2C_XFER("Enter, irq %d nr %d addr 0x%x.\n", irq, i2c->adap.nr, (!i2c->msg)? 0 : i2c->msg->addr);
+    ocores_process(i2c, stat);
+    OCORES_I2C_XFER("Leave, irq %d nr %d addr 0x%x.\n", irq, i2c->adap.nr, (!i2c->msg)? 0 : i2c->msg->addr);
+    spin_unlock_irqrestore(&i2c->process_lock, flags);
+
+    return IRQ_HANDLED;
+}
+
+/**
+ * Process timeout event
+ * @i2c: ocores I2C device instance
+ */
+static void ocores_process_timeout(struct ocores_i2c *i2c)
+{
+    unsigned long flags;
+
+    spin_lock_irqsave(&i2c->process_lock, flags);
+    i2c->state = STATE_ERROR;
+    oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_STOP);
+    mdelay(1);
+    spin_unlock_irqrestore(&i2c->process_lock, flags);
+    return;
+}
+
+/**
+ * Wait until something change in a given register
+ * @i2c: ocores I2C device instance
+ * @reg: register to query
+ * @mask: bitmask to apply on register value
+ * @val: expected result
+ * @timeout: timeout in jiffies
+ *
+ * Timeout is necessary to avoid to stay here forever when the chip
+ * does not answer correctly.
+ *
+ * Return: 0 on success, -ETIMEDOUT on timeout
+ */
+static int ocores_wait(struct ocores_i2c *i2c,
+               int reg, u8 mask, u8 val,
+               const unsigned long timeout)
+{
+    u8 status;
+    unsigned long j, jiffies_tmp;
+    unsigned int usleep;
+
+    usleep = OCORE_WAIT_SCH;
+    j = jiffies + timeout;
+    while (1) {
+        jiffies_tmp = jiffies;
+        status = oc_getreg(i2c, reg);
+
+        if ((status & mask) == val) {
+            break;
+        }
+
+        if (time_after(jiffies_tmp, j)) {
+            OCORES_I2C_XFER("STATUS timeout, mask[0x%x]  val[0x%x] status[0x%x]\n", mask, val, status);
+            return -ETIMEDOUT;
+        }
+        usleep_range(usleep,usleep + 1);
+    }
+    return 0;
+
+}
+
+/**
+ * Wait until is possible to process some data
+ * @i2c: ocores I2C device instance
+ *
+ * Used when the device is in polling mode (interrupts disabled).
+ *
+ * Return: 0 on success, -ETIMEDOUT on timeout
+ */
+static int ocores_poll_wait(struct ocores_i2c *i2c)
+{
+    u8 mask;
+    int err;
+
+    if (i2c->state == STATE_DONE || i2c->state == STATE_ERROR) {
+        /* transfer is over */
+        mask = OCI2C_STAT_BUSY;
+    } else {
+        /* on going transfer */
+        mask = OCI2C_STAT_TIP;
+        /*
+         * We wait for the data to be transferred (8bit),
+         * then we start polling on the ACK/NACK bit
+         */
+        udelay((8 * 1000) / i2c->bus_clock_khz);
+    }
+
+    /*
+     * once we are here we expect to get the expected result immediately
+     * so if after 100ms we timeout then something is broken.
+     */
+    err = ocores_wait(i2c, OCI2C_STATUS, mask, 0, msecs_to_jiffies(100));
+    if (err) {
+         OCORES_I2C_XFER("STATUS timeout, bit 0x%x did not clear in 100ms, err %d\n", mask, err);
+    }
+    return err;
+}
+
+/**
+ * It handles an IRQ-less transfer
+ * @i2c: ocores I2C device instance
+ *
+ * Even if IRQ are disabled, the I2C OpenCore IP behavior is exactly the same
+ * (only that IRQ are not produced). This means that we can re-use entirely
+ * ocores_isr(), we just add our polling code around it.
+ *
+ * It can run in atomic context
+ */
+static int ocores_process_polling(struct ocores_i2c *i2c)
+{
+    irqreturn_t ret;
+    int err;
+
+    while (1) {
+        err = ocores_poll_wait(i2c);
+        if (err) {
+            i2c->state = STATE_ERROR;
+            break; /* timeout */
+        }
+
+        ret = ocores_isr(-1, i2c);
+        if (ret == IRQ_NONE) {
+            break; /* all messages have been transferred */
+        }
+    }
+
+    return err;
+}
+
+static int ocores_xfer_core(struct ocores_i2c *i2c,
+                struct i2c_msg *msgs, int num,
+                bool polling)
+{
+    int ret;
+    u8 ctrl;
+    unsigned long flags;
+
+    OCORES_I2C_VERBOSE("Enter ocores_xfer_core. polling mode:%d.\n", polling);
+    spin_lock_irqsave(&i2c->process_lock, flags);
+
+    ctrl = oc_getreg(i2c, OCI2C_CONTROL);
+    if (polling) {
+        oc_setreg(i2c, OCI2C_CONTROL, ctrl & ~OCI2C_CTRL_IEN);
+    } else {
+        oc_setreg(i2c, OCI2C_CONTROL, ctrl | OCI2C_CTRL_IEN);
+    }
+
+    i2c->msg = msgs;
+    i2c->pos = 0;
+    i2c->nmsgs = num;
+    i2c->state = STATE_START;
+
+    oc_setreg(i2c, OCI2C_DATA, i2c_8bit_addr_from_msg(i2c->msg));
+    oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_START);
+
+    spin_unlock_irqrestore(&i2c->process_lock, flags);
+
+    if (polling) {
+        ret = ocores_process_polling(i2c);
+        if (ret) {
+            ocores_process_timeout(i2c);
+            return -ETIMEDOUT;
+        }
+    } else {
+        ret = wait_event_timeout(i2c->wait,
+                     (i2c->state == STATE_ERROR) ||
+                     (i2c->state == STATE_DONE), HZ);
+        if (ret == 0) {
+            ocores_process_timeout(i2c);
+            return -ETIMEDOUT;
+        }
+    }
+
+    return (i2c->state == STATE_DONE) ? num : -EIO;
+}
+
+static int ocores_xfer(struct i2c_adapter *adap,
+               struct i2c_msg *msgs, int num)
+{
+    struct ocores_i2c *i2c;
+    int ret;
+
+    OCORES_I2C_VERBOSE("Enter ocores_xfer.\n");
+    if (!adap || ocores_msg_check(msgs, num)) {
+        OCORES_I2C_ERROR("[MAY BE USER SPACE ERROR]:msg buf is NULL\n");
+        return -EFAULT;
+    }
+    OCORES_I2C_VERBOSE("i2c bus:%d, msgs num:%d.\n", adap->nr, num);
+
+    i2c = i2c_get_adapdata(adap);
+
+    if (i2c->flags & OCORES_FLAG_POLL) {
+        ret = ocores_xfer_core(i2c, msgs, num, true);
+    } else {
+        ret = ocores_xfer_core(i2c, msgs, num, false);
+    }
+
+    return ret;
+}
+
+static int ocores_init(struct device *dev, struct ocores_i2c *i2c)
+{
+    int prescale;
+    int diff;
+    u8 ctrl = oc_getreg(i2c, OCI2C_CONTROL);
+
+    /* make sure the device is disabled */
+    ctrl &= ~(OCI2C_CTRL_EN | OCI2C_CTRL_IEN);
+    oc_setreg(i2c, OCI2C_CONTROL, ctrl);
+
+    prescale = (i2c->ip_clock_khz / (5 * i2c->bus_clock_khz)) - 1;
+    prescale = clamp(prescale, 0, 0xffff);
+
+    diff = i2c->ip_clock_khz / (5 * (prescale + 1)) - i2c->bus_clock_khz;
+    if (abs(diff) > i2c->bus_clock_khz / 10) {
+        dev_err(dev, "Unsupported clock settings: core: %d KHz, bus: %d KHz\n",
+            i2c->ip_clock_khz, i2c->bus_clock_khz);
+        return -EINVAL;
+    }
+
+    oc_setreg(i2c, OCI2C_PRELOW, prescale & 0xff);
+    oc_setreg(i2c, OCI2C_PREHIGH, prescale >> 8);
+
+    /* Init the device */
+    oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_IACK);
+    oc_setreg(i2c, OCI2C_CONTROL, ctrl | OCI2C_CTRL_EN);
+
+    return 0;
+}
+
+static u32 ocores_func(struct i2c_adapter *adap)
+{
+    return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
+}
+
+static const struct i2c_algorithm ocores_algorithm = {
+    .master_xfer = ocores_xfer,
+    .functionality = ocores_func,
+};
+
+static const struct i2c_adapter ocores_adapter = {
+    .owner = THIS_MODULE,
+    .name = "wb-i2c-ocores",
+    .class = I2C_CLASS_DEPRECATED,
+    .algo = &ocores_algorithm,
+};
+
+static const struct of_device_id ocores_i2c_match[] = {
+    {
+        .compatible = "opencores,wb-i2c-ocores",
+        .data = (void *)TYPE_OCORES,
+    },
+    {},
+};
+MODULE_DEVICE_TABLE(of, ocores_i2c_match);
+
+static int fpga_ocores_i2c_get_irq(struct ocores_i2c *i2c)
+{
+    int devfn, irq;
+    uint32_t pci_id;
+    struct device *dev;
+    wb_pci_dev_t *wb_pci_dev;
+    struct pci_dev *pci_dev;
+    i2c_ocores_device_t *i2c_ocores_device;
+    int ret;
+
+    dev = i2c->dev;
+    wb_pci_dev = &i2c->wb_pci_dev;
+
+    if (dev->of_node) {
+        ret = 0;
+        ret += of_property_read_u32(dev->of_node, "pci_domain", &wb_pci_dev->domain);
+        ret += of_property_read_u32(dev->of_node, "pci_bus", &wb_pci_dev->bus);
+        ret += of_property_read_u32(dev->of_node, "pci_slot", &wb_pci_dev->slot);
+        ret += of_property_read_u32(dev->of_node, "pci_fn", &wb_pci_dev->fn);
+
+        if (ret != 0) {
+            OCORES_I2C_ERROR("dts config error, ret:%d.\n", ret);
+            ret = -EINVAL;
+            return ret;
+        }
+        ret = of_property_read_u32(dev->of_node, "check_pci_id", &wb_pci_dev->check_pci_id);
+        if (ret == 0) {
+            ret = of_property_read_u32(dev->of_node, "pci_id", &wb_pci_dev->pci_id);
+            if (ret != 0) {
+                OCORES_I2C_ERROR("need to check pci id, but pci id not config.\n");
+                return -EINVAL;
+            }
+        }
+    } else {
+        if (i2c->dev->platform_data == NULL) {
+            OCORES_I2C_ERROR("Failed to get platform data config.\n");
+            ret = -EINVAL;
+            return ret;
+        }
+        i2c_ocores_device = i2c->dev->platform_data;
+        wb_pci_dev->domain = i2c_ocores_device->pci_domain;
+        wb_pci_dev->bus = i2c_ocores_device->pci_bus;
+        wb_pci_dev->slot = i2c_ocores_device->pci_slot;
+        wb_pci_dev->fn = i2c_ocores_device->pci_fn;
+        wb_pci_dev->check_pci_id = i2c_ocores_device->check_pci_id;
+        wb_pci_dev->pci_id = i2c_ocores_device->pci_id;
+    }
+
+    OCORES_I2C_VERBOSE("pci_domain:0x%x, pci_bus:0x%x, pci_slot:0x%x, pci_fn:0x%x.\n",
+        wb_pci_dev->domain, wb_pci_dev->bus, wb_pci_dev->slot, wb_pci_dev->fn);
+
+    devfn = PCI_DEVFN(wb_pci_dev->slot, wb_pci_dev->fn);
+    pci_dev = pci_get_domain_bus_and_slot(wb_pci_dev->domain, wb_pci_dev->bus, devfn);
+    if (pci_dev == NULL) {
+        OCORES_I2C_ERROR("Failed to find pci_dev, domain:0x%04x, bus:0x%02x, devfn:0x%x\n",
+            wb_pci_dev->domain, wb_pci_dev->bus, devfn);
+        return -ENODEV;
+    }
+    if (wb_pci_dev->check_pci_id == 1) {
+        pci_id = (pci_dev->vendor << 16) | pci_dev->device;
+        if (wb_pci_dev->pci_id != pci_id) {
+            OCORES_I2C_ERROR("Failed to check pci id, except: 0x%x, really: 0x%x\n",
+                wb_pci_dev->pci_id, pci_id);
+            return -ENXIO;
+        }
+        OCORES_I2C_VERBOSE("pci id check ok, pci_id: 0x%x", pci_id);
+    }
+
+    irq = pci_dev->irq + i2c->irq_offset;
+    OCORES_I2C_VERBOSE("get irq no: %d.\n", irq);
+    return irq;
+}
+
+static int ocores_i2c_config_init(struct ocores_i2c *i2c)
+{
+    int ret;
+    struct device *dev;
+    i2c_ocores_device_t *i2c_ocores_device;
+
+    dev = i2c->dev;
+    ret = 0;
+
+    if (dev->of_node) {
+        ret += of_property_read_string(dev->of_node, "dev_name", &i2c->dev_name);
+        ret += of_property_read_u32(dev->of_node, "dev_base", &i2c->base_addr);
+        ret += of_property_read_u32(dev->of_node, "reg_shift", &i2c->reg_shift);
+        ret += of_property_read_u32(dev->of_node, "reg_io_width", &i2c->reg_io_width);
+        ret += of_property_read_u32(dev->of_node, "ip_clock_khz", &i2c->ip_clock_khz);
+        ret += of_property_read_u32(dev->of_node, "bus_clock_khz", &i2c->bus_clock_khz);
+        ret += of_property_read_u32(dev->of_node, "reg_access_mode", &i2c->reg_access_mode);
+
+        if (ret != 0) {
+            OCORES_I2C_ERROR("dts config error, ret:%d.\n", ret);
+            ret = -ENXIO;
+            return ret;
+        }
+    } else {
+        if (i2c->dev->platform_data == NULL) {
+            OCORES_I2C_ERROR("Failed to get platform data config.\n");
+            ret = -ENXIO;
+            return ret;
+        }
+        i2c_ocores_device = i2c->dev->platform_data;
+        i2c->dev_name = i2c_ocores_device->dev_name;
+        i2c->adap_nr = i2c_ocores_device->adap_nr;
+        i2c->big_endian = i2c_ocores_device->big_endian;
+        i2c->base_addr = i2c_ocores_device->dev_base;
+        i2c->reg_shift = i2c_ocores_device->reg_shift;
+        i2c->reg_io_width = i2c_ocores_device->reg_io_width;
+        i2c->ip_clock_khz = i2c_ocores_device->ip_clock_khz;
+        i2c->bus_clock_khz = i2c_ocores_device->bus_clock_khz;
+        i2c->reg_access_mode = i2c_ocores_device->reg_access_mode;
+    }
+
+    OCORES_I2C_VERBOSE("name:%s, base:0x%x, reg_shift:0x%x, io_width:0x%x, ip_clock_khz:0x%x, bus_clock_khz:0x%x.\n",
+        i2c->dev_name, i2c->base_addr, i2c->reg_shift, i2c->reg_io_width, i2c->ip_clock_khz, i2c->bus_clock_khz);
+    OCORES_I2C_VERBOSE("reg access mode:%d.\n", i2c->reg_access_mode);
+    return ret;
+}
+
+static int ocores_i2c_probe(struct platform_device *pdev)
+{
+    struct ocores_i2c *i2c;
+    int irq, ret;
+    bool be;
+    i2c_ocores_device_t *i2c_ocores_device;
+
+    OCORES_I2C_VERBOSE("Enter main probe\n");
+
+    i2c = devm_kzalloc(&pdev->dev, sizeof(*i2c), GFP_KERNEL);
+    if (!i2c) {
+        dev_err(&pdev->dev, "devm_kzalloc failed.\n");
+        return -ENOMEM;
+    }
+
+    spin_lock_init(&i2c->process_lock);
+
+    i2c->dev = &pdev->dev;
+    ret = ocores_i2c_config_init(i2c);
+    if (ret !=0) {
+        dev_err(i2c->dev, "Failed to get ocores i2c dts config.\n");
+        goto out;
+    }
+
+    if (i2c->dev->of_node) {
+        if (of_property_read_u32(i2c->dev->of_node, "big_endian", &i2c->big_endian)) {
+
+            be = 0;
+        } else {
+            be = i2c->big_endian;
+        }
+    } else {
+        be = i2c->big_endian;
+    }
+
+    if (i2c->reg_io_width == 0) {
+        i2c->reg_io_width = 1; /* Set to default value */
+    }
+
+    if (!i2c->setreg || !i2c->getreg) {
+        switch (i2c->reg_io_width) {
+        case REG_IO_WIDTH_1:
+            i2c->setreg = oc_setreg_8;
+            i2c->getreg = oc_getreg_8;
+            break;
+
+        case REG_IO_WIDTH_2:
+            i2c->setreg = be ? oc_setreg_16be : oc_setreg_16;
+            i2c->getreg = be ? oc_getreg_16be : oc_getreg_16;
+            break;
+
+        case REG_IO_WIDTH_4:
+            i2c->setreg = be ? oc_setreg_32be : oc_setreg_32;
+            i2c->getreg = be ? oc_getreg_32be : oc_getreg_32;
+            break;
+
+        default:
+            dev_err(i2c->dev, "Unsupported I/O width (%d)\n",
+                i2c->reg_io_width);
+            ret = -EINVAL;
+            goto out;
+        }
+    }
+
+    init_waitqueue_head(&i2c->wait);
+    irq = -1;
+
+    if (i2c->dev->of_node) {
+        if (of_property_read_u32(i2c->dev->of_node, "irq_offset", &i2c->irq_offset)) {
+
+            i2c->flags |= OCORES_FLAG_POLL;
+        } else {
+
+            irq = fpga_ocores_i2c_get_irq(i2c);
+            if (irq < 0 ) {
+                dev_err(i2c->dev, "Failed to get  ocores i2c irq number, ret: %d.\n", irq);
+                ret = irq;
+                goto out;
+            }
+        }
+    } else {
+        if (i2c->dev->platform_data == NULL) {
+
+            i2c->flags |= OCORES_FLAG_POLL;
+            OCORES_I2C_VERBOSE("Failed to get platform data config, set OCORES_FLAG_POLL.\n");
+        } else {
+            i2c_ocores_device = i2c->dev->platform_data;
+            if (i2c_ocores_device->irq_type == 0) {
+
+                i2c->flags |= OCORES_FLAG_POLL;
+            } else {
+                i2c->irq_offset = i2c_ocores_device->irq_offset;
+                irq = fpga_ocores_i2c_get_irq(i2c);
+                if (irq < 0 ) {
+                    dev_err(i2c->dev, "Failed to get ocores i2c irq number, ret: %d.\n", irq);
+                    ret = irq;
+                    goto out;
+                }
+            }
+        }
+    }
+
+    if (!(i2c->flags & OCORES_FLAG_POLL)) {
+        ret = devm_request_irq(&pdev->dev, irq, ocores_isr, 0,
+                       pdev->name, i2c);
+        if (ret) {
+            dev_err(i2c->dev, "Cannot claim IRQ\n");
+            goto out;
+        }
+    }
+
+    ret = ocores_init(i2c->dev, i2c);
+    if (ret) {
+        goto out;
+    }
+
+    /* hook up driver to tree */
+    platform_set_drvdata(pdev, i2c);
+    i2c->adap = ocores_adapter;
+    i2c_set_adapdata(&i2c->adap, i2c);
+    i2c->adap.dev.parent = &pdev->dev;
+    i2c->adap.dev.of_node = pdev->dev.of_node;
+
+    if (i2c->dev->of_node) {
+        /* adap.nr get from dts aliases */
+        ret = i2c_add_adapter(&i2c->adap);
+    } else {
+        i2c->adap.nr = i2c->adap_nr;
+        ret = i2c_add_numbered_adapter(&i2c->adap);
+    }
+    if (ret) {
+        goto fail_add;
+    }
+    OCORES_I2C_VERBOSE("Main probe out\n");
+    dev_info(i2c->dev, "registered i2c-%d for %s with base address:0x%x success.\n",
+        i2c->adap.nr, i2c->dev_name, i2c->base_addr);
+    return 0;
+fail_add:
+    platform_set_drvdata(pdev, NULL);
+out:
+    return ret;
+}
+
+static int ocores_i2c_remove(struct platform_device *pdev)
+{
+    struct ocores_i2c *i2c = platform_get_drvdata(pdev);
+    u8 ctrl = oc_getreg(i2c, OCI2C_CONTROL);
+
+    /* disable i2c logic */
+    ctrl &= ~(OCI2C_CTRL_EN | OCI2C_CTRL_IEN);
+    oc_setreg(i2c, OCI2C_CONTROL, ctrl);
+
+    /* remove adapter & data */
+    i2c_del_adapter(&i2c->adap);
+    return 0;
+}
+
+static struct platform_driver ocores_i2c_driver = {
+    .probe   = ocores_i2c_probe,
+    .remove  = ocores_i2c_remove,
+    .driver  = {
+        .name = "wb-ocores-i2c",
+        .of_match_table = ocores_i2c_match,
+    },
+};
+
+module_platform_driver(ocores_i2c_driver);
+
+MODULE_AUTHOR("support");
+MODULE_DESCRIPTION("OpenCores I2C bus driver");
+MODULE_LICENSE("GPL");
+MODULE_ALIAS("platform:ocores-i2c");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_ocores.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_ocores.h
new file mode 100644
index 000000000..d413ebb3a
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_ocores.h
@@ -0,0 +1,30 @@
+#ifndef __WB_I2C_OCORES_H__
+#define __WB_I2C_OCORES_H__
+#include <linux/string.h>
+
+#define mem_clear(data, size) memset((data), 0, (size))
+#define I2C_OCORES_DEV_NAME_MAX_LEN (64)
+
+typedef struct i2c_ocores_device_s {
+    uint32_t big_endian;
+    char dev_name[I2C_OCORES_DEV_NAME_MAX_LEN];
+    int adap_nr;
+    uint32_t dev_base;
+    uint32_t reg_shift;
+    uint32_t reg_io_width;
+    uint32_t ip_clock_khz;
+    uint32_t bus_clock_khz;
+    uint32_t reg_access_mode;
+
+    uint32_t irq_type;
+    uint32_t irq_offset;
+    uint32_t pci_domain;
+    uint32_t pci_bus;
+    uint32_t pci_slot;
+    uint32_t pci_fn;
+    uint32_t check_pci_id;
+    uint32_t pci_id;
+    int device_flag;
+} i2c_ocores_device_t;
+
+#endif
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_io_dev.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_io_dev.c
new file mode 100644
index 000000000..035718710
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_io_dev.c
@@ -0,0 +1,598 @@
+/*
+ * wb_io_dev.c
+ * ko to read/write ioports through /dev/XXX device
+ */
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/device.h>
+#include <linux/miscdevice.h>
+#include <linux/platform_device.h>
+#include <linux/of_platform.h>
+#include <linux/slab.h>
+#include <linux/uaccess.h>
+#include <linux/io.h>
+#include <linux/ioport.h>
+#include <linux/fs.h>
+#include <linux/export.h>
+#include <linux/uio.h>
+
+#include "wb_io_dev.h"
+
+#define PROXY_NAME "wb-io-dev"
+#define MAX_IO_DEV_NUM                     (256)
+#define IO_RDWR_MAX_LEN                    (256)
+#define MAX_NAME_SIZE                      (20)
+#define IO_INDIRECT_ADDR_H(addr)           ((addr >> 8) & 0xff)
+#define IO_INDIRECT_ADDR_L(addr)           ((addr) & 0xff)
+#define IO_INDIRECT_OP_WRITE               (0x2)
+#define IO_INDIRECT_OP_READ                (0X3)
+
+#define KERNEL_SPASE         (0)
+#define USER_SPASE           (1)
+
+static int g_io_dev_debug = 0;
+static int g_io_dev_error = 0;
+
+module_param(g_io_dev_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_io_dev_error, int, S_IRUGO | S_IWUSR);
+
+#define IO_DEV_DEBUG_VERBOSE(fmt, args...) do {                                        \
+    if (g_io_dev_debug) { \
+        printk(KERN_INFO "[IO_DEV][VER][func:%s line:%d]\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define IO_DEV_DEBUG_ERROR(fmt, args...) do {                                        \
+    if (g_io_dev_error) { \
+        printk(KERN_ERR "[IO_DEV][ERR][func:%s line:%d]\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+typedef struct wb_io_dev_s {
+    const char *name;
+    uint32_t io_base;
+    uint32_t io_len;
+    uint32_t indirect_addr;
+    uint32_t wr_data;
+    uint32_t addr_low;
+    uint32_t addr_high;
+    uint32_t rd_data;
+    uint32_t opt_ctl;
+    spinlock_t io_dev_lock;
+    struct miscdevice misc;
+} wb_io_dev_t;
+
+static wb_io_dev_t* io_dev_arry[MAX_IO_DEV_NUM];
+
+static int io_dev_open(struct inode *inode, struct file *file)
+{
+    unsigned int minor = iminor(inode);
+    wb_io_dev_t *wb_io_dev;
+
+    if (minor >= MAX_IO_DEV_NUM) {
+        IO_DEV_DEBUG_ERROR("minor out of range, minor = %d.\n", minor);
+        return -ENODEV;
+    }
+
+    wb_io_dev = io_dev_arry[minor];
+    if (wb_io_dev == NULL) {
+        IO_DEV_DEBUG_ERROR("wb_io_dev is NULL, open failed, minor = %d\n", minor);
+        return -ENODEV;
+    }
+
+    file->private_data = wb_io_dev;
+    return 0;
+}
+
+static int io_dev_release(struct inode *inode, struct file *file)
+{
+    file->private_data = NULL;
+    return 0;
+}
+
+uint8_t io_indirect_addressing_read(wb_io_dev_t *wb_io_dev, uint32_t address)
+{
+    uint8_t addr_l, addr_h, value;
+    unsigned long flags;
+
+    addr_h = IO_INDIRECT_ADDR_H(address);
+    addr_l = IO_INDIRECT_ADDR_L(address);
+    IO_DEV_DEBUG_VERBOSE("read one count, addr = 0x%x\n", address);
+
+    spin_lock_irqsave(&wb_io_dev->io_dev_lock, flags);
+
+    outb(addr_l, wb_io_dev->io_base + wb_io_dev->addr_low);
+
+    outb(addr_h, wb_io_dev->io_base + wb_io_dev->addr_high);
+
+    outb(IO_INDIRECT_OP_READ, wb_io_dev->io_base + wb_io_dev->opt_ctl);
+
+    value = inb(wb_io_dev->io_base + wb_io_dev->rd_data);
+
+    spin_unlock_irqrestore(&wb_io_dev->io_dev_lock, flags);
+
+    return value;
+}
+
+static int io_dev_read_tmp(wb_io_dev_t *wb_io_dev, uint32_t offset, uint8_t *buf, size_t count)
+{
+    int i;
+
+    if (offset > wb_io_dev->io_len) {
+        IO_DEV_DEBUG_VERBOSE("offset:0x%x, io len:0x%x, EOF.\n", offset, wb_io_dev->io_len);
+        return 0;
+    }
+
+    if (count > wb_io_dev->io_len - offset) {
+        IO_DEV_DEBUG_VERBOSE("read count out of range. input len:%lu, read len:%u.\n",
+            count, wb_io_dev->io_len - offset);
+        count = wb_io_dev->io_len - offset;
+    }
+    if (wb_io_dev->indirect_addr) {
+        for (i = 0; i < count; i++) {
+            buf[i] = io_indirect_addressing_read(wb_io_dev, offset + i);
+        }
+    } else {
+        for (i = 0; i < count; i++) {
+            buf[i] = inb(wb_io_dev->io_base + offset + i);
+        }
+    }
+
+    return count;
+}
+
+static ssize_t io_dev_read(struct file *file, char __user *buf, size_t count, loff_t *offset, int flag)
+{
+    wb_io_dev_t *wb_io_dev;
+    int ret, read_len;
+    u8 buf_tmp[IO_RDWR_MAX_LEN];
+
+    wb_io_dev = file->private_data;
+    if (wb_io_dev == NULL) {
+        IO_DEV_DEBUG_ERROR("wb_io_dev is NULL, read failed.\n");
+        return -EINVAL;
+    }
+
+    if (count == 0) {
+        IO_DEV_DEBUG_ERROR("Invalid params, read count is 0.\n");
+        return -EINVAL;
+    }
+
+    if (count > sizeof(buf_tmp)) {
+        IO_DEV_DEBUG_VERBOSE("read count %lu exceed max %lu.\n", count, sizeof(buf_tmp));
+        count = sizeof(buf_tmp);
+    }
+
+    mem_clear(buf_tmp, sizeof(buf_tmp));
+    read_len = io_dev_read_tmp(wb_io_dev, *offset, buf_tmp, count);
+    if (read_len < 0) {
+        IO_DEV_DEBUG_ERROR("io_dev_read_tmp failed, ret:%d.\n", read_len);
+        return read_len;
+    }
+
+    /* check flag is user spase or kernel spase */
+    if (flag == USER_SPASE) {
+        IO_DEV_DEBUG_VERBOSE("user space read, buf: %p, offset: %lld, read count %lu.\n",
+            buf, *offset, count);
+        if (copy_to_user(buf, buf_tmp, read_len)) {
+            IO_DEV_DEBUG_ERROR("copy_to_user failed.\n");
+            return -EFAULT;
+        }
+    } else {
+        IO_DEV_DEBUG_VERBOSE("kernel space read, buf: %p, offset: %lld, read count %lu.\n",
+            buf, *offset, count);
+        memcpy(buf, buf_tmp, read_len);
+    }
+    *offset += read_len;
+    ret = read_len;
+    return ret;
+}
+
+static ssize_t io_dev_read_user(struct file *file, char __user *buf, size_t count, loff_t *offset)
+{
+    int ret;
+
+    IO_DEV_DEBUG_VERBOSE("io_dev_read_user, file: %p, count: %lu, offset: %lld\n",
+        file, count, *offset);
+    ret = io_dev_read(file, buf, count, offset, USER_SPASE);
+    return ret;
+}
+
+static ssize_t io_dev_read_iter(struct kiocb *iocb, struct iov_iter *to)
+{
+    int ret;
+
+    IO_DEV_DEBUG_VERBOSE("io_dev_read_iter, file: %p, count: %lu, offset: %lld\n",
+        iocb->ki_filp, to->count, iocb->ki_pos);
+    ret = io_dev_read(iocb->ki_filp, to->kvec->iov_base, to->count, &iocb->ki_pos, KERNEL_SPASE);
+    return ret;
+}
+
+void io_indirect_addressing_write(wb_io_dev_t *wb_io_dev, uint32_t address, uint8_t reg_val)
+{
+    uint8_t addr_l, addr_h;
+    unsigned long flags;
+
+    addr_h = IO_INDIRECT_ADDR_H(address);
+    addr_l = IO_INDIRECT_ADDR_L(address);
+    IO_DEV_DEBUG_VERBOSE("write one count, addr = 0x%x\n", address);
+
+    spin_lock_irqsave(&wb_io_dev->io_dev_lock, flags);
+
+    outb(reg_val, wb_io_dev->io_base + wb_io_dev->wr_data);
+
+    outb(addr_l, wb_io_dev->io_base + wb_io_dev->addr_low);
+
+    outb(addr_h, wb_io_dev->io_base + wb_io_dev->addr_high);
+
+    outb(IO_INDIRECT_OP_WRITE, wb_io_dev->io_base + wb_io_dev->opt_ctl);
+
+    spin_unlock_irqrestore(&wb_io_dev->io_dev_lock, flags);
+
+    return;
+}
+
+static int io_dev_write_tmp(wb_io_dev_t *wb_io_dev, uint32_t offset, uint8_t *buf, size_t count)
+{
+    int i;
+
+    if (offset > wb_io_dev->io_len) {
+        IO_DEV_DEBUG_VERBOSE("offset:0x%x, io len:0x%x, EOF.\n", offset, wb_io_dev->io_len);
+        return 0;
+    }
+
+    if (count > wb_io_dev->io_len - offset) {
+        IO_DEV_DEBUG_VERBOSE("write count out of range. input len:%lu, write len:%u.\n",
+            count, wb_io_dev->io_len - offset);
+        count = wb_io_dev->io_len - offset;
+    }
+    if (wb_io_dev->indirect_addr) {
+        for (i = 0; i < count; i++) {
+            io_indirect_addressing_write(wb_io_dev, offset + i, buf[i]);
+        }
+    } else {
+        for (i = 0; i < count; i++) {
+            outb(buf[i], wb_io_dev->io_base + offset + i);
+        }
+    }
+
+    return count;
+}
+
+static ssize_t io_dev_write(struct file *file, const char __user *buf, size_t count, loff_t *offset, int flag)
+{
+    wb_io_dev_t *wb_io_dev;
+    int write_len;
+    u8 buf_tmp[IO_RDWR_MAX_LEN];
+
+    wb_io_dev = file->private_data;
+    if (wb_io_dev == NULL) {
+        IO_DEV_DEBUG_ERROR("wb_io_dev is NULL, write failed.\n");
+        return -EINVAL;
+    }
+
+    if (count == 0) {
+        IO_DEV_DEBUG_ERROR("Invalid params, write count is 0.\n");
+        return -EINVAL;
+    }
+
+    if (count > sizeof(buf_tmp)) {
+        IO_DEV_DEBUG_VERBOSE("write count %lu exceed max %lu.\n", count, sizeof(buf_tmp));
+        count = sizeof(buf_tmp);
+    }
+
+    mem_clear(buf_tmp, sizeof(buf_tmp));
+    /* check flag is user spase or kernel spase */
+    if (flag == USER_SPASE) {
+        IO_DEV_DEBUG_VERBOSE("user space write, buf: %p, offset: %lld, write count %lu.\n",
+            buf, *offset, count);
+        if (copy_from_user(buf_tmp, buf, count)) {
+            IO_DEV_DEBUG_ERROR("copy_from_user failed.\n");
+            return -EFAULT;
+        }
+    } else {
+        IO_DEV_DEBUG_VERBOSE("kernel space write, buf: %p, offset: %lld, write count %lu.\n",
+            buf, *offset, count);
+        memcpy(buf_tmp, buf, count);
+    }
+
+    write_len = io_dev_write_tmp(wb_io_dev, *offset, buf_tmp, count);
+    if (write_len < 0) {
+        IO_DEV_DEBUG_ERROR("io_dev_write_tmp failed, ret:%d.\n", write_len);
+        return write_len;
+    }
+
+    *offset += write_len;
+    return write_len;
+}
+
+static ssize_t io_dev_write_user(struct file *file, const char __user *buf, size_t count, loff_t *offset)
+{
+    int ret;
+
+    IO_DEV_DEBUG_VERBOSE("io_dev_write_user, file: %p, count: %lu, offset: %lld\n",
+        file, count, *offset);
+    ret = io_dev_write(file, buf, count, offset, USER_SPASE);
+    return ret;
+}
+
+static ssize_t io_dev_write_iter(struct kiocb *iocb, struct iov_iter *from)
+{
+    int ret;
+
+    IO_DEV_DEBUG_VERBOSE("io_dev_write_iter, file: %p, count: %lu, offset: %lld\n",
+        iocb->ki_filp, from->count, iocb->ki_pos);
+    ret = io_dev_write(iocb->ki_filp, from->kvec->iov_base, from->count, &iocb->ki_pos, KERNEL_SPASE);
+    return ret;
+}
+
+static loff_t io_dev_llseek(struct file *file, loff_t offset, int origin)
+{
+    loff_t ret = 0;
+    wb_io_dev_t *wb_io_dev;
+
+    wb_io_dev = file->private_data;
+    if (wb_io_dev == NULL) {
+        IO_DEV_DEBUG_ERROR("wb_io_dev is NULL, llseek failed.\n");
+        return -EINVAL;
+    }
+
+    switch (origin) {
+    case SEEK_SET:
+        if (offset < 0) {
+            IO_DEV_DEBUG_ERROR("SEEK_SET, offset:%lld, invalid.\n", offset);
+            ret = -EINVAL;
+            break;
+        }
+        if (offset > wb_io_dev->io_len) {
+            IO_DEV_DEBUG_ERROR("SEEK_SET out of range, offset:%lld, io_len:0x%x.\n",
+                offset, wb_io_dev->io_len);
+            ret = - EINVAL;
+            break;
+        }
+        file->f_pos = offset;
+        ret = file->f_pos;
+        break;
+    case SEEK_CUR:
+        if (((file->f_pos + offset) > wb_io_dev->io_len) || ((file->f_pos + offset) < 0)) {
+            IO_DEV_DEBUG_ERROR("SEEK_CUR out of range, f_ops:%lld, offset:%lld, io_len:0x%x.\n",
+                file->f_pos, offset, wb_io_dev->io_len);
+            ret = - EINVAL;
+            break;
+        }
+        file->f_pos += offset;
+        ret = file->f_pos;
+        break;
+    default:
+        IO_DEV_DEBUG_ERROR("unsupport llseek type:%d.\n", origin);
+        ret = -EINVAL;
+        break;
+    }
+    return ret;
+}
+
+static long io_dev_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
+{
+    return 0;
+}
+
+static const struct file_operations io_dev_fops = {
+    .owner      = THIS_MODULE,
+    .llseek     = io_dev_llseek,
+    .read       = io_dev_read_user,
+    .write      = io_dev_write_user,
+    .read_iter  = io_dev_read_iter,
+    .write_iter = io_dev_write_iter,
+    .unlocked_ioctl = io_dev_ioctl,
+    .open       = io_dev_open,
+    .release    = io_dev_release,
+};
+
+static wb_io_dev_t *dev_match(const char *path)
+{
+    wb_io_dev_t *wb_io_dev;
+    char dev_name[MAX_NAME_SIZE];
+    int i;
+
+    for (i = 0; i < MAX_IO_DEV_NUM; i++) {
+        if (io_dev_arry[i] == NULL) {
+            continue;
+        }
+        wb_io_dev = io_dev_arry[i];
+        snprintf(dev_name, MAX_NAME_SIZE,"/dev/%s", wb_io_dev->name);
+        if (!strcmp(path, dev_name)) {
+            IO_DEV_DEBUG_VERBOSE("get dev_name = %s, minor = %d\n", dev_name, i);
+            return wb_io_dev;
+        }
+    }
+
+    return NULL;
+}
+
+int io_device_func_read(const char *path, uint32_t offset, uint8_t *buf, size_t count)
+{
+    wb_io_dev_t *wb_io_dev;
+    int read_len;
+
+    if (path == NULL) {
+        IO_DEV_DEBUG_ERROR("path NULL");
+        return -EINVAL;
+    }
+
+    if (buf == NULL) {
+        IO_DEV_DEBUG_ERROR("buf NULL");
+        return -EINVAL;
+    }
+
+    wb_io_dev = dev_match(path);
+    if (wb_io_dev == NULL) {
+        IO_DEV_DEBUG_ERROR("io_dev match failed. dev path = %s", path);
+        return -EINVAL;
+    }
+
+    read_len = io_dev_read_tmp(wb_io_dev, offset, buf, count);
+    if (read_len < 0) {
+        IO_DEV_DEBUG_ERROR("io_dev_read_tmp failed, ret:%d.\n", read_len);
+    }
+    return read_len;
+}
+EXPORT_SYMBOL(io_device_func_read);
+
+int io_device_func_write(const char *path, uint32_t offset, uint8_t *buf, size_t count)
+{
+    wb_io_dev_t *wb_io_dev;
+    int write_len;
+
+    if (path == NULL) {
+        IO_DEV_DEBUG_ERROR("path NULL");
+        return -EINVAL;
+    }
+
+    if (buf == NULL) {
+        IO_DEV_DEBUG_ERROR("buf NULL");
+        return -EINVAL;
+    }
+
+    wb_io_dev = dev_match(path);
+    if (wb_io_dev == NULL) {
+        IO_DEV_DEBUG_ERROR("i2c_dev match failed. dev path = %s", path);
+        return -EINVAL;
+    }
+
+    write_len = io_dev_write_tmp(wb_io_dev, offset, buf, count);
+    if (write_len < 0) {
+        IO_DEV_DEBUG_ERROR("io_dev_write_tmp failed, ret:%d.\n", write_len);
+    }
+    return write_len;
+}
+EXPORT_SYMBOL(io_device_func_write);
+
+static int io_dev_probe(struct platform_device *pdev)
+{
+    int ret;
+    wb_io_dev_t *wb_io_dev;
+    struct miscdevice *misc;
+    io_dev_device_t *io_dev_device;
+
+    wb_io_dev = devm_kzalloc(&pdev->dev, sizeof(wb_io_dev_t), GFP_KERNEL);
+    if (!wb_io_dev) {
+        dev_err(&pdev->dev, "devm_kzalloc failed.\n");
+        ret = -ENOMEM;
+        return ret;
+    }
+    spin_lock_init(&wb_io_dev->io_dev_lock);
+
+    if (pdev->dev.of_node) {
+        ret = 0;
+        ret += of_property_read_string(pdev->dev.of_node, "io_dev_name", &wb_io_dev->name);
+        ret += of_property_read_u32(pdev->dev.of_node, "io_base", &wb_io_dev->io_base);
+        ret += of_property_read_u32(pdev->dev.of_node, "io_len", &wb_io_dev->io_len);
+        if (of_property_read_bool(pdev->dev.of_node, "indirect_addr")) {
+
+            wb_io_dev->indirect_addr = 1;
+            ret += of_property_read_u32(pdev->dev.of_node, "wr_data", &wb_io_dev->wr_data);
+            ret += of_property_read_u32(pdev->dev.of_node, "addr_low", &wb_io_dev->addr_low);
+            ret += of_property_read_u32(pdev->dev.of_node, "addr_high", &wb_io_dev->addr_high);
+            ret += of_property_read_u32(pdev->dev.of_node, "rd_data", &wb_io_dev->rd_data);
+            ret += of_property_read_u32(pdev->dev.of_node, "opt_ctl", &wb_io_dev->opt_ctl);
+        } else {
+
+            wb_io_dev->indirect_addr = 0;
+        }
+        if (ret != 0) {
+            dev_err(&pdev->dev, "Failed to get dts config, ret:%d.\n", ret);
+            return -ENXIO;
+        }
+    } else {
+        if (pdev->dev.platform_data == NULL) {
+            dev_err(&pdev->dev, "Failed to get platform data config.\n");
+            return -ENXIO;
+        }
+        io_dev_device = pdev->dev.platform_data;
+        wb_io_dev->name = io_dev_device->io_dev_name;
+        wb_io_dev->io_base = io_dev_device->io_base;
+        wb_io_dev->io_len = io_dev_device->io_len;
+        wb_io_dev->indirect_addr = io_dev_device->indirect_addr;
+        if (wb_io_dev->indirect_addr == 1) {
+            wb_io_dev->wr_data = io_dev_device->wr_data;
+            wb_io_dev->addr_low = io_dev_device->addr_low;
+            wb_io_dev->addr_high = io_dev_device->addr_high;
+            wb_io_dev->rd_data = io_dev_device->rd_data;
+            wb_io_dev->opt_ctl = io_dev_device->opt_ctl;
+        }
+    }
+
+    IO_DEV_DEBUG_VERBOSE("name:%s, io base:0x%x, io len:0x%x, addressing type:%s.\n",
+        wb_io_dev->name, wb_io_dev->io_base, wb_io_dev->io_len,
+        wb_io_dev->indirect_addr ? "indirect" : "direct");
+
+    misc = &wb_io_dev->misc;
+    misc->minor = MISC_DYNAMIC_MINOR;
+    misc->name = wb_io_dev->name;
+    misc->fops = &io_dev_fops;
+    misc->mode = 0666;
+    if (misc_register(misc) != 0) {
+        dev_err(&pdev->dev, "Failed to register %s device.\n", misc->name);
+        return -ENXIO;
+    }
+    if (misc->minor >= MAX_IO_DEV_NUM) {
+        dev_err(&pdev->dev, "Error: device minor[%d] more than max io device num[%d].\n",
+            misc->minor, MAX_IO_DEV_NUM);
+        misc_deregister(misc);
+        return -EINVAL;
+    }
+    io_dev_arry[misc->minor] = wb_io_dev;
+    dev_info(&pdev->dev, "register %s device [0x%x][0x%x] with minor %d using %s addressing success.\n",
+        misc->name, wb_io_dev->io_base, wb_io_dev->io_len, misc->minor,
+        wb_io_dev->indirect_addr ? "indirect" : "direct");
+
+    return 0;
+}
+
+static int io_dev_remove(struct platform_device *pdev)
+{
+    int i;
+
+    for (i = 0; i < MAX_IO_DEV_NUM ; i++) {
+        if (io_dev_arry[i] != NULL) {
+            misc_deregister(&io_dev_arry[i]->misc);
+            io_dev_arry[i] = NULL;
+        }
+    }
+
+    return 0;
+}
+
+static struct of_device_id io_dev_match[] = {
+    {
+        .compatible = "wb-io-dev",
+    },
+    {},
+};
+MODULE_DEVICE_TABLE(of, io_dev_match);
+
+static struct platform_driver wb_io_dev_driver = {
+    .probe      = io_dev_probe,
+    .remove     = io_dev_remove,
+    .driver     = {
+        .owner  = THIS_MODULE,
+        .name   = PROXY_NAME,
+        .of_match_table = io_dev_match,
+    },
+};
+
+static int __init wb_io_dev_init(void)
+{
+    return platform_driver_register(&wb_io_dev_driver);
+}
+
+static void __exit wb_io_dev_exit(void)
+{
+    platform_driver_unregister(&wb_io_dev_driver);
+}
+
+module_init(wb_io_dev_init);
+module_exit(wb_io_dev_exit);
+MODULE_DESCRIPTION("IO device driver");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_io_dev.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_io_dev.h
new file mode 100644
index 000000000..3a1a10f0f
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_io_dev.h
@@ -0,0 +1,21 @@
+#ifndef __WB_IO_DEV_H__
+#define __WB_IO_DEV_H__
+#include <linux/string.h>
+
+#define mem_clear(data, size) memset((data), 0, (size))
+#define IO_DEV_NAME_MAX_LEN (64)
+
+typedef struct io_dev_device_s {
+    char io_dev_name[IO_DEV_NAME_MAX_LEN];
+    uint32_t io_base;
+    uint32_t io_len;
+    uint32_t indirect_addr;
+    uint32_t wr_data;
+    uint32_t addr_low;
+    uint32_t addr_high;
+    uint32_t rd_data;
+    uint32_t opt_ctl;
+    int device_flag;
+} io_dev_device_t;
+
+#endif
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_lpc_drv.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_lpc_drv.c
new file mode 100644
index 000000000..c079dc409
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_lpc_drv.c
@@ -0,0 +1,166 @@
+/*
+ * wb_lpc_drv.c
+ * ko to set lpc pcie config io addr and enable lpc
+ */
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/device.h>
+#include <linux/platform_device.h>
+#include <linux/of_platform.h>
+#include <linux/slab.h>
+#include <linux/uaccess.h>
+#include <linux/pci.h>
+#include <linux/io.h>
+#include <linux/ioport.h>
+
+#include "wb_lpc_drv.h"
+
+#define LPC_DRIVER_NAME                    "wb-lpc"
+#define LPC_MAKE_PCI_IO_RANGE(__base)      ((0xfc0001) | ((__base) & (0xFFFC)))
+
+int g_lpc_dev_debug = 0;
+int g_lpc_dev_error = 0;
+
+module_param(g_lpc_dev_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_lpc_dev_error, int, S_IRUGO | S_IWUSR);
+
+#define LPC_DEV_DEBUG_VERBOSE(fmt, args...) do {                                        \
+    if (g_lpc_dev_debug) { \
+        printk(KERN_INFO "[LPC_DEV][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define LPC_DEV_DEBUG_ERROR(fmt, args...) do {                                        \
+    if (g_lpc_dev_error) { \
+        printk(KERN_ERR "[LPC_DEV][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+typedef struct wb_lpc_dev_s {
+    const char *lpc_io_name;
+    uint32_t domain;
+    uint32_t bus;
+    uint32_t slot;
+    uint32_t fn;
+    uint32_t lpc_io_base;
+    uint32_t lpc_io_size;
+    uint32_t lpc_gen_dec;
+} wb_lpc_dev_t;
+
+static int wb_lpc_probe(struct platform_device *pdev)
+{
+    int ret, devfn;
+    wb_lpc_dev_t *wb_lpc_dev;
+    struct pci_dev *pci_dev;
+    lpc_drv_device_t *lpc_drv_device;
+
+    wb_lpc_dev = devm_kzalloc(&pdev->dev, sizeof(wb_lpc_dev_t), GFP_KERNEL);
+    if (!wb_lpc_dev) {
+        dev_err(&pdev->dev, "devm_kzalloc failed.\n");
+        ret = -ENOMEM;
+        return ret;
+    }
+
+    if (pdev->dev.of_node) {
+        ret = 0;
+        ret += of_property_read_string(pdev->dev.of_node, "lpc_io_name", &wb_lpc_dev->lpc_io_name);
+        ret += of_property_read_u32(pdev->dev.of_node, "pci_domain", &wb_lpc_dev->domain);
+        ret += of_property_read_u32(pdev->dev.of_node, "pci_bus", &wb_lpc_dev->bus);
+        ret += of_property_read_u32(pdev->dev.of_node, "pci_slot", &wb_lpc_dev->slot);
+        ret += of_property_read_u32(pdev->dev.of_node, "pci_fn", &wb_lpc_dev->fn);
+        ret += of_property_read_u32(pdev->dev.of_node, "lpc_io_base", &wb_lpc_dev->lpc_io_base);
+        ret += of_property_read_u32(pdev->dev.of_node, "lpc_io_size", &wb_lpc_dev->lpc_io_size);
+        ret += of_property_read_u32(pdev->dev.of_node, "lpc_gen_dec", &wb_lpc_dev->lpc_gen_dec);
+        if (ret != 0) {
+            dev_err(&pdev->dev, "Failed to get dts config, ret:%d.\n", ret);
+            return -ENXIO;
+        }
+    } else {
+        if (pdev->dev.platform_data == NULL) {
+            dev_err(&pdev->dev, "Failed to get platform data config.\n");
+            return -ENXIO;
+        }
+        lpc_drv_device = pdev->dev.platform_data;
+        wb_lpc_dev->lpc_io_name = lpc_drv_device->lpc_io_name;
+        wb_lpc_dev->domain = lpc_drv_device->pci_domain;
+        wb_lpc_dev->bus = lpc_drv_device->pci_bus;
+        wb_lpc_dev->slot = lpc_drv_device->pci_slot;
+        wb_lpc_dev->fn = lpc_drv_device->pci_fn;
+        wb_lpc_dev->lpc_io_base = lpc_drv_device->lpc_io_base;
+        wb_lpc_dev->lpc_io_size = lpc_drv_device->lpc_io_size;
+        wb_lpc_dev->lpc_gen_dec = lpc_drv_device->lpc_gen_dec;
+    }
+
+    LPC_DEV_DEBUG_VERBOSE("domain:0x%04x, bus:0x%02x, slot:0x%02x, fn:%u\n",
+        wb_lpc_dev->domain,wb_lpc_dev->bus, wb_lpc_dev->slot, wb_lpc_dev->fn);
+    LPC_DEV_DEBUG_VERBOSE("lpc_io_name:%s, lpc_io_base:0x%x, lpc_io_size:%u, lpc_gen_dec:0x%x.\n",
+        wb_lpc_dev->lpc_io_name, wb_lpc_dev->lpc_io_base, wb_lpc_dev->lpc_io_size, wb_lpc_dev->lpc_gen_dec);
+
+    devfn = PCI_DEVFN(wb_lpc_dev->slot, wb_lpc_dev->fn);
+    pci_dev = pci_get_domain_bus_and_slot(wb_lpc_dev->domain, wb_lpc_dev->bus, devfn);
+    if (pci_dev == NULL) {
+        dev_err(&pdev->dev, "Failed to find pci_dev, domain:0x%04x, bus:0x%02x, devfn:0x%x\n",
+            wb_lpc_dev->domain, wb_lpc_dev->bus, devfn);
+        return -ENXIO;
+    }
+
+    pci_write_config_dword(pci_dev, wb_lpc_dev->lpc_gen_dec, LPC_MAKE_PCI_IO_RANGE(wb_lpc_dev->lpc_io_base));
+    if (!request_region(wb_lpc_dev->lpc_io_base, wb_lpc_dev->lpc_io_size, wb_lpc_dev->lpc_io_name)) {
+        dev_err(&pdev->dev, "Failed to request_region [0x%x][0x%x].\n", wb_lpc_dev->lpc_io_base, wb_lpc_dev->lpc_io_size);
+        return -EBUSY;
+    }
+
+    platform_set_drvdata(pdev, wb_lpc_dev);
+
+    dev_info(&pdev->dev, "lpc request_region [0x%x][0x%x] success.\n", wb_lpc_dev->lpc_io_base, wb_lpc_dev->lpc_io_size);
+
+    return 0;
+}
+
+static int wb_lpc_remove(struct platform_device *pdev)
+{
+    wb_lpc_dev_t *wb_lpc_dev;
+
+    wb_lpc_dev = platform_get_drvdata(pdev);
+    if (wb_lpc_dev) {
+        release_region(wb_lpc_dev->lpc_io_base , wb_lpc_dev->lpc_io_size);
+        LPC_DEV_DEBUG_VERBOSE("lpc base:0x%x, len:0x%x.\n", wb_lpc_dev->lpc_io_base, wb_lpc_dev->lpc_io_size);
+    }
+    LPC_DEV_DEBUG_VERBOSE("lpc remove.\n");
+
+    return 0;
+}
+
+static struct of_device_id lpc_dev_match[] = {
+    {
+        .compatible = "wb-lpc",
+    },
+    {},
+};
+MODULE_DEVICE_TABLE(of, lpc_dev_match);
+
+static struct platform_driver wb_lpc_driver = {
+    .probe      = wb_lpc_probe,
+    .remove     = wb_lpc_remove,
+    .driver     = {
+        .owner  = THIS_MODULE,
+        .name   = LPC_DRIVER_NAME,
+        .of_match_table = lpc_dev_match,
+    },
+};
+
+static int __init wb_lpc_init(void)
+{
+    return platform_driver_register(&wb_lpc_driver);
+}
+
+static void __exit wb_lpc_exit(void)
+{
+    platform_driver_unregister(&wb_lpc_driver);
+}
+
+module_init(wb_lpc_init);
+module_exit(wb_lpc_exit);
+MODULE_DESCRIPTION("lpc driver");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_lpc_drv.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_lpc_drv.h
new file mode 100644
index 000000000..76e8c32c1
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_lpc_drv.h
@@ -0,0 +1,18 @@
+#ifndef __WB_LPC_DRV_H__
+#define __WB_LPC_DRV_H__
+
+#define LPC_IO_NAME_MAX_LEN (64)
+
+typedef struct lpc_drv_device_s {
+    char lpc_io_name[LPC_IO_NAME_MAX_LEN];
+    int pci_domain;
+    int pci_bus;
+    int pci_slot;
+    int pci_fn;
+    int lpc_io_base;
+    int lpc_io_size;
+    int lpc_gen_dec;
+    int device_flag;
+} lpc_drv_device_t;
+
+#endif
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_mac_bsc.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_mac_bsc.c
new file mode 100644
index 000000000..a94ae020a
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_mac_bsc.c
@@ -0,0 +1,867 @@
+/*
+ *
+ * Copyright (c) 1998, 1999  Frodo Looijaard <frodol@dds.nl>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/slab.h>
+#include <linux/jiffies.h>
+#include <linux/i2c.h>
+#include <linux/hwmon.h>
+#include <linux/hwmon-sysfs.h>
+#include <linux/err.h>
+#include <linux/mutex.h>
+#include <linux/string.h>
+#include <linux/delay.h>
+
+#define mem_clear(data, size) memset((data), 0, (size))
+
+#define MAC_TEMP_INVALID    (99999999)
+#define MAC_ID_REG          (0x02000000)
+
+#define MAC_REG_ADDR_WIDTH (4)
+#define MAC_REG_DATA_WIDTH (4)
+#define MAC_BSC_MAX_TEMP_NUM (16)
+#define MAC_BSC_MAX_READ_REG_STEP (6)
+#define MAC_BSC_MAX_SETUP_NUM (1)
+
+#define MAC_BSC_MAX_RETRY (3)
+#define MAC_BSC_RETRY_SLEEP_TIME   (10000)   /* 10ms */
+
+static int g_wb_mac_bsc_debug = 0;
+static int g_wb_mac_bsc_error = 0;
+
+module_param(g_wb_mac_bsc_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_mac_bsc_error, int, S_IRUGO | S_IWUSR);
+
+#define WB_MAC_BSC_DEBUG(fmt, args...) do {                                        \
+    if (g_wb_mac_bsc_debug) { \
+        printk(KERN_INFO "[MAC_BSC][VER][func:%s line:%d] "fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define WB_MAC_BSC_ERROR(fmt, args...) do {                                        \
+    if (g_wb_mac_bsc_error) { \
+        printk(KERN_ERR "[MAC_BSC][ERR][func:%s line:%d]"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+typedef enum{
+    MAC_TYPE_START,
+    TD4_X9 = 0xb780,
+    TD4_X9_8 = 0xb788,
+    TH3 = 0xb980,
+    TD3 = 0xb870,
+    TD3_X2 = 0xb274,
+    TD4 = 0xb880,
+    TH4 = 0xb990,
+    MAC_TYPE_END,
+} mac_id;
+
+typedef enum {
+    MAC_TEMP_START,
+    MAC_TEMP_INDEX1,
+    MAC_TEMP_INDEX2,
+    MAC_TEMP_INDEX3,
+    MAC_TEMP_INDEX4,
+    MAC_TEMP_INDEX5,
+    MAC_TEMP_INDEX6,
+    MAC_TEMP_INDEX7,
+    MAC_TEMP_INDEX8,
+    MAC_TEMP_INDEX9,
+    MAC_TEMP_INDEX10,
+    MAC_TEMP_INDEX11,
+    MAC_TEMP_INDEX12,
+    MAC_TEMP_INDEX13,
+    MAC_TEMP_INDEX14,
+    MAC_TEMP_INDEX15,
+    MAC_TEMP_END,
+} mac_hwmon_index;
+
+typedef enum action_e {
+    I2C_WRITE,
+    I2C_READ
+} action_t;
+
+typedef struct i2c_op_s {
+    action_t op;
+    uint32_t reg_addr;
+    uint32_t reg_val;
+    int read_back;
+} i2c_op_t;
+
+typedef struct dev_params_s {
+    int mac_id;
+    i2c_op_t sbus_setup[MAC_BSC_MAX_SETUP_NUM];
+    i2c_op_t vtmon_read[MAC_BSC_MAX_READ_REG_STEP];
+    uint32_t vtmon_reg_addrs[MAC_BSC_MAX_TEMP_NUM];
+    uint8_t vtmon_instances;
+    uint32_t vtmon_data_width;
+    int vtmon_scalar;
+    int vtmon_offset;
+    uint8_t sbus_setup_ops;
+    int vtmon_read_ops;
+    int sbus_addr_op;
+    int sbus_error_op;
+    uint32_t sbus_error_mask;
+} dev_params_t;
+
+static dev_params_t mac_temp_conf[] = {
+    {
+        .mac_id = TD3_X2,
+        /* CMIC_TOP_SBUS_RING_MAP_0_7 = 0x52222100 */
+        .sbus_setup = {{I2C_WRITE, 0x1010000c, 0x52222100, 0}},
+        .vtmon_read = {
+            /* CMIC_COMMON_POOL_SCHAN_CH4_CTRL = 0x00000000 */
+            {I2C_WRITE, 0x10110400, 0x00000000, 1},
+            /* CMIC_COMMON_POOL_SCHAN_CH4_MESSAGE[0] = 0x2c380200 */
+            {I2C_WRITE, 0x1011040c, 0x2c380200, 1},
+            /* CMIC_COMMON_POOL_SCHAN_CH4_MESSAGE[1] = TOP_PVTMON_RESULT_0 */
+            {I2C_WRITE, 0x10110410, 0x02005300, 1},
+            /* CMIC_COMMON_POOL_SCHAN_CH4_CTRL = 0x00000001 */
+            {I2C_WRITE, 0x10110400, 0x00000001, 0},
+            /* CMIC_COMMON_POOL_SCHAN_CH4_ERR */
+            {I2C_READ, 0x10110408},
+            /* CMIC_COMMON_POOL_SCHAN_CH4_MESSAGE[1] */
+            {I2C_READ, 0x10110410}
+        },
+        .vtmon_reg_addrs = {
+            0x02005300, 0x02005400, 0x02005500, 0x02005600, 0x02005700, 0x02005800
+        },
+        .vtmon_instances = 6,
+        .vtmon_data_width = 10,
+        .vtmon_scalar = -5570,
+        .vtmon_offset = 4578289,
+        .sbus_setup_ops = 1,
+        .vtmon_read_ops = 6,
+        .sbus_addr_op = 2,
+        .sbus_error_op = 4,
+        .sbus_error_mask = 0x00000041,
+    },
+    {
+        .mac_id = TD3,  /* TD3_X7*/
+        /* CMIC_TOP_SBUS_RING_MAP_0_7 = 0x52222100 */
+        .sbus_setup = {{I2C_WRITE, 0x0320000c, 0x52222100, 0}},
+        .vtmon_read = {
+            /* CMIC_COMMON_POOL_SCHAN_CH4_CTRL = 0x00000000 */
+            {I2C_WRITE, 0x03210400, 0x00000000, 1},
+            /* CMIC_COMMON_POOL_SCHAN_CH4_MESSAGE[0] = 0x2c380200 */
+            {I2C_WRITE, 0x0321040c, 0x2c380200, 1},
+            /* CMIC_COMMON_POOL_SCHAN_CH4_MESSAGE[1] = TOP_PVTMON_RESULT_0 */
+            {I2C_WRITE, 0x03210410, 0x02004700, 1},
+            /* CMIC_COMMON_POOL_SCHAN_CH4_CTRL = 0x00000001 */
+            {I2C_WRITE, 0x03210400, 0x00000001, 0},
+            /* CMIC_COMMON_POOL_SCHAN_CH4_ERR */
+            {I2C_READ, 0x03210408},
+            /* CMIC_COMMON_POOL_SCHAN_CH4_MESSAGE[1] */
+            {I2C_READ, 0x03210410}
+        },
+        .vtmon_reg_addrs = {
+            0x02004700, 0x02004800, 0x02004900, 0x02004a00, 0x02004b00, 0x02004c00,
+            0x02004d00, 0x02004e00, 0x02005200, 0x02005100, 0x02005000, 0x02004f00
+        },
+        .vtmon_instances = 12,
+        .vtmon_data_width = 10,
+        .vtmon_scalar = -5350,
+        .vtmon_offset = 4341000,
+        .sbus_setup_ops = 0,
+        .vtmon_read_ops = 6,
+        .sbus_addr_op = 2,
+        .sbus_error_op = 4,
+        .sbus_error_mask = 0x00000041,
+    },
+    {
+        .mac_id = TH3,
+        .vtmon_read = {
+            /* CMIC_COMMON_POOL_SCHAN_CH4_CTRL = 0x00000000 */
+            {I2C_WRITE, 0x03210400, 0x00000000, 1},
+            /* CMIC_COMMON_POOL_SCHAN_CH4_MESSAGE[0] = 0x2c400200 */
+            {I2C_WRITE, 0x0321040c, 0x2c400200, 1},
+            /* CMIC_COMMON_POOL_SCHAN_CH4_MESSAGE[1] = TOP_PVTMON_RESULT_0 */
+            {I2C_WRITE, 0x03210410, 0x02004a00, 1},
+            /* CMIC_COMMON_POOL_SCHAN_CH4_CTRL = 0x00000001 */
+            {I2C_WRITE, 0x03210400, 0x00000001, 0},
+            /* CMIC_COMMON_POOL_SCHAN_CH4_ERR */
+            {I2C_READ, 0x03210408},
+            /* CMIC_COMMON_POOL_SCHAN_CH4_MESSAGE[1] */
+            {I2C_READ, 0x03210410}
+        },
+        .vtmon_reg_addrs = {
+            0x02004a00, 0x02004b00, 0x02004c00, 0x02004d00, 0x02004e00, 0x02004f00,
+            0x02005000, 0x02005100, 0x02005200, 0x02005300, 0x02005400, 0x02005500,
+            0x02005600, 0x02005700, 0x02005800
+        },
+        .vtmon_instances = 15,
+        .vtmon_data_width = 10,
+        .vtmon_scalar = -5350,
+        .vtmon_offset = 4341000,
+        .sbus_setup_ops = 0,
+        .vtmon_read_ops = 6,
+        .sbus_addr_op = 2,
+        .sbus_error_op = -1,
+    },
+    {
+        .mac_id = TD4_X9,
+        /* CMIC_TOP_SBUS_RING_MAP_8_15r = 0x00000000 */
+        .sbus_setup = {{I2C_WRITE, 0x03200010, 0x00000000, 0}},
+        .vtmon_read = {
+            /* CMIC_COMMON_POOL_SCHAN_CH4_CTRLr = 0x00000000 */
+            {I2C_WRITE, 0x03210400, 0x00000000, 1},
+            /* CMIC_COMMON_POOL_SCHAN_CH4_MESSAGEr[0] = 0x2c400200 */
+            {I2C_WRITE, 0x0321040c, 0x2c400200, 1},
+            /* CMIC_COMMON_POOL_SCHAN_CH4_MESSAGEr[1] = TOP_VTMON_0_RESULT_1r */
+            {I2C_WRITE, 0x03210410, 0x02005a00, 1},
+            /* CMIC_COMMON_POOL_SCHAN_CH4_CTRLr = 0x00000001 */
+            {I2C_WRITE, 0x03210400, 0x00000001, 0},
+            /* CMIC_COMMON_POOL_SCHAN_CH4_ERRr */
+            {I2C_READ, 0x03210408},
+             /* CMIC_COMMON_POOL_SCHAN_CH4_MESSAGEr[1] */
+            {I2C_READ, 0x03210410}
+        },
+        .vtmon_reg_addrs = {
+            0x02005a00, 0x02005c00, 0x02005e00, 0x02006000, 0x02006200, 0x02006400,
+            0x02006600, 0x02006800, 0x02006a00
+        },
+        .vtmon_instances = 9,
+        .vtmon_data_width = 11,
+        .vtmon_scalar = -2454,
+        .vtmon_offset = 3668120,
+        .sbus_setup_ops = 0,
+        .vtmon_read_ops = 6,
+        .sbus_addr_op = 2,
+        .sbus_error_op = 4,
+        .sbus_error_mask = 0x00000041,
+    },
+    {
+        .mac_id = TD4_X9_8,
+        /* CMIC_TOP_SBUS_RING_MAP_8_15r = 0x00000000 */
+        .sbus_setup = {{I2C_WRITE, 0x03200010, 0x00000000, 0}},
+        .vtmon_read = {
+            /* CMIC_COMMON_POOL_SCHAN_CH4_CTRLr = 0x00000000 */
+            {I2C_WRITE, 0x03210400, 0x00000000, 1},
+            /* CMIC_COMMON_POOL_SCHAN_CH4_MESSAGEr[0] = 0x2c400200 */
+            {I2C_WRITE, 0x0321040c, 0x2c400200, 1},
+            /* CMIC_COMMON_POOL_SCHAN_CH4_MESSAGEr[1] = TOP_VTMON_0_RESULT_1r */
+            {I2C_WRITE, 0x03210410, 0x02005a00, 1},
+            /* CMIC_COMMON_POOL_SCHAN_CH4_CTRLr = 0x00000001 */
+            {I2C_WRITE, 0x03210400, 0x00000001, 0},
+            /* CMIC_COMMON_POOL_SCHAN_CH4_ERRr */
+            {I2C_READ, 0x03210408},
+             /* CMIC_COMMON_POOL_SCHAN_CH4_MESSAGEr[1] */
+            {I2C_READ, 0x03210410}
+        },
+        .vtmon_reg_addrs = {
+            0x02005a00, 0x02005c00, 0x02005e00, 0x02006000, 0x02006200, 0x02006400,
+            0x02006600, 0x02006800, 0x02006a00
+        },
+        .vtmon_instances = 9,
+        .vtmon_data_width = 11,
+        .vtmon_scalar = -2454,
+        .vtmon_offset = 3668120,
+        .sbus_setup_ops = 0,
+        .vtmon_read_ops = 6,
+        .sbus_addr_op = 2,
+        .sbus_error_op = 4,
+        .sbus_error_mask = 0x00000041,
+    },
+    {
+        .mac_id = TD4,  /* TD4-X11 */
+        /* CMIC_TOP_SBUS_RING_MAP_8_15r = 0x00000000 */
+        .sbus_setup = {{I2C_WRITE, 0x03200010, 0x00000000, 0}},
+        .vtmon_read = {
+            /* CMIC_COMMON_POOL_SCHAN_CH4_CTRLr = 0x00000000 */
+            {I2C_WRITE, 0x03210400, 0x00000000, 1},
+            /* CMIC_COMMON_POOL_SCHAN_CH4_MESSAGEr[0] = 0x2c400200 */
+            {I2C_WRITE, 0x0321040c, 0x2c400200, 1},
+            /* CMIC_COMMON_POOL_SCHAN_CH4_MESSAGEr[1] = TOP_VTMON_0_RESULT_1r */
+            {I2C_WRITE, 0x03210410, 0x02004900, 1},
+            /* CMIC_COMMON_POOL_SCHAN_CH4_CTRLr = 0x00000001 */
+            {I2C_WRITE, 0x03210400, 0x00000001, 0},
+            /* CMIC_COMMON_POOL_SCHAN_CH4_ERRr */
+            {I2C_READ,  0x03210408},
+            /* CMIC_COMMON_POOL_SCHAN_CH4_MESSAGEr[1] */
+            {I2C_READ,  0x03210410}
+        },
+        .vtmon_reg_addrs = {
+            0x02004900, 0x02004b00, 0x02004d00, 0x02004f00, 0x02005100, 0x02005300,
+            0x02005500, 0x02005700, 0x02005900, 0x02005b00, 0x02005d00, 0x02005f00,
+            0x02006100, 0x02006300, 0x02006500
+        },
+        .vtmon_instances = 15,
+        .vtmon_data_width = 11,
+        .vtmon_scalar = -2454,
+        .vtmon_offset = 3668120,
+        .sbus_setup_ops = 0,
+        .vtmon_read_ops = 6,
+        .sbus_addr_op = 2,
+        .sbus_error_op = 4,
+        .sbus_error_mask = 0x00000041,
+    },
+    {
+        .mac_id = TH4,
+        .vtmon_read = {
+            /* CMIC_COMMON_POOL_SCHAN_CH4_CTRLr = 0x00000000 */
+            {I2C_WRITE, 0x03210400, 0x00000000, 1},
+            /* CMIC_COMMON_POOL_SCHAN_CH4_MESSAGEr[0] = 0x2c400200 */
+            {I2C_WRITE, 0x0321040c, 0x2c400200, 1},
+            /* CMIC_COMMON_POOL_SCHAN_CH4_MESSAGEr[1] = TOP_VTMON_0_RESULT_1r */
+            {I2C_WRITE, 0x03210410, 0x0201d800, 1},
+            /* CMIC_COMMON_POOL_SCHAN_CH4_CTRLr = 0x00000001 */
+            {I2C_WRITE, 0x03210400, 0x00000001, 0},
+            /* CMIC_COMMON_POOL_SCHAN_CH4_ERRr */
+            {I2C_READ,  0x03210408},
+            /* CMIC_COMMON_POOL_SCHAN_CH4_MESSAGEr[1] */
+            {I2C_READ,  0x03210410}
+        },
+        .vtmon_reg_addrs = {
+            0x0201d800, 0x0201e000, 0x0201e800, 0x0201f000, 0x0201f800, 0x02020000,
+            0x02020800, 0x02021000, 0x02021800, 0x02022000, 0x02022800, 0x02023000,
+            0x02023800, 0x02024000, 0x02024800,
+        },
+        .vtmon_instances = 15,
+        .vtmon_data_width = 11,
+        .vtmon_scalar = -2454,
+        .vtmon_offset = 3668120,
+        .sbus_setup_ops = 0,
+        .vtmon_read_ops = 6,
+        .sbus_addr_op = 2,
+        .sbus_error_op = -1,
+    },
+};
+
+struct mac_data {
+    struct i2c_client *client;
+    struct device *hwmon_dev;
+    struct mutex update_lock;
+    dev_params_t dev_param;
+};
+
+static int bsc_i2c_read(struct i2c_client *client, uint32_t reg_addr, uint32_t *reg_val)
+{
+    int msgs_num, ret, i;
+    uint8_t addr_buf[MAC_REG_ADDR_WIDTH];
+    uint8_t data_buf[MAC_REG_DATA_WIDTH];
+    uint32_t val;
+    struct i2c_msg msgs[2];
+
+    for (i = 0; i < MAC_REG_ADDR_WIDTH; i++) {
+        addr_buf[i] = (reg_addr >> ((MAC_REG_ADDR_WIDTH -i -1) * 8)) & 0xff;
+    }
+
+    mem_clear(msgs, sizeof(msgs));
+    msgs[0].addr = client->addr;
+    msgs[0].flags = 0;
+    msgs[0].len = MAC_REG_ADDR_WIDTH;
+    msgs[0].buf = addr_buf;
+
+    msgs[1].addr = client->addr;
+    msgs[1].flags = I2C_M_RD;
+    msgs[1].len = MAC_REG_DATA_WIDTH;
+    msgs[1].buf = data_buf;
+
+    msgs_num = 2;
+    ret = i2c_transfer(client->adapter, msgs, msgs_num);
+    if (ret != msgs_num) {
+        WB_MAC_BSC_ERROR("i2c_transfer read failed, reg_addr: 0x%x, ret: %d\n", reg_addr, ret);
+        return -EIO;
+    }
+    val = 0;
+    for (i = 0; i < MAC_REG_DATA_WIDTH; i++) {
+        val |= data_buf[i] << ((MAC_REG_DATA_WIDTH - i -1) * 8);
+    }
+    WB_MAC_BSC_DEBUG("bsc_i2c_read success, reg_addr: 0x%x, reg_val: 0x%x\n", reg_addr, val);
+    *reg_val = val;
+    return 0;
+}
+
+static int bsc_i2c_write(struct i2c_client *client, uint32_t reg_addr, uint32_t reg_val)
+{
+    int ret, i;
+    uint8_t write_buf[MAC_REG_ADDR_WIDTH + MAC_REG_DATA_WIDTH];
+    struct i2c_msg msgs[1];
+
+    /* fill reg_addr first*/
+    for (i = 0; i < MAC_REG_ADDR_WIDTH; i++) {
+        write_buf[i] = (reg_addr >> ((MAC_REG_ADDR_WIDTH -i -1) * 8)) & 0xff;
+    }
+    for (i = 0; i < MAC_REG_DATA_WIDTH; i++) {
+        write_buf[i + MAC_REG_ADDR_WIDTH] = (reg_val >> ((MAC_REG_DATA_WIDTH -i -1) * 8)) & 0xff;
+    }
+
+    mem_clear(msgs, sizeof(msgs));
+    msgs[0].len = MAC_REG_ADDR_WIDTH + MAC_REG_DATA_WIDTH;
+    msgs[0].buf = write_buf;
+    msgs[0].addr = client->addr;
+    msgs[0].flags = I2C_M_IGNORE_NAK;
+
+    ret = i2c_transfer(client->adapter, msgs, 1);
+    if (ret < 0) {
+        WB_MAC_BSC_DEBUG("i2c_transfer write failed, reg_addr: 0x%x, reg_val: 0x%x, ret: %d\n",
+            reg_addr, reg_val, ret);
+        return ret;
+    }
+    WB_MAC_BSC_DEBUG("i2c_transfer write reg_addr: 0x%x, reg_val: 0x%x success\n",
+        reg_addr, reg_val);
+    return 0;
+}
+
+static int handle_operation_write(struct i2c_client *client, i2c_op_t *operation)
+{
+    int ret;
+    uint32_t rd_back_val;
+
+    ret = bsc_i2c_write(client, operation->reg_addr, operation->reg_val);
+    WB_MAC_BSC_DEBUG("bsc_i2c_write reg_addr: 0x%x, set val: 0x%x, ret: %d\n",
+        operation->reg_addr, operation->reg_val, ret);
+    if (operation->read_back) {
+        ret = bsc_i2c_read(client, operation->reg_addr, &rd_back_val);
+        if (rd_back_val != operation->reg_val) {
+            WB_MAC_BSC_ERROR("bsc_i2c_write failed, reg_addr: 0x%x, set val: 0x%x, read back valu: 0x%x\n",
+                operation->reg_addr, operation->reg_val, rd_back_val);
+            return -1;
+        }
+         WB_MAC_BSC_DEBUG("bsc_i2c_write success, reg_addr: 0x%x, set val: 0x%x, read_back val: 0x%x\n",
+             operation->reg_addr, operation->reg_val, rd_back_val);
+    }
+    return 0;
+}
+
+static int handle_operation(struct i2c_client *client, i2c_op_t *operation)
+{
+    int ret, i;
+
+    if (operation->op == I2C_WRITE) {
+        for (i = 0; i < MAC_BSC_MAX_RETRY; i++) {
+            ret = handle_operation_write(client, operation);
+            if (ret == 0) {
+                WB_MAC_BSC_DEBUG("handle_operation_write success, retry: %d\n", i);
+                return 0;
+            }
+            if ((i + 1) < MAC_BSC_MAX_RETRY) {
+                usleep_range(MAC_BSC_RETRY_SLEEP_TIME, MAC_BSC_RETRY_SLEEP_TIME + 1);
+            }
+        }
+        WB_MAC_BSC_DEBUG("handle_operation_write retry: %d failed, ret: %d, ignore it\n", i, ret);
+        return 0;
+    }
+
+    if (operation->op == I2C_READ) {
+        ret = bsc_i2c_read(client, operation->reg_addr, &operation->reg_val);
+        WB_MAC_BSC_DEBUG("bsc_i2c_read reg_addr: 0x%x, get val: 0x%x, ret: %d\n",
+            operation->reg_addr, operation->reg_val, ret);
+        return ret;
+    }
+
+    WB_MAC_BSC_ERROR("Unsupport operation type: %d\n", operation->op);
+    return -EINVAL;
+}
+
+static int get_mac_reg(struct i2c_client *client, uint32_t reg_addr, uint32_t *reg_value)
+{
+    int i, ret;
+    i2c_op_t *op;
+    struct mac_data *data;
+    dev_params_t *dev_params;
+    uint32_t val_tmp;
+
+    data = i2c_get_clientdata(client);
+    dev_params = &data->dev_param;
+    val_tmp = 0;
+    for (i = 0; i < dev_params->vtmon_read_ops; i++) {
+        op = &dev_params->vtmon_read[i];
+        if (i == dev_params->sbus_addr_op) {
+            op->reg_val = reg_addr;
+        }
+        WB_MAC_BSC_DEBUG("Start to handle %s operation, step: %d, reg_addr: 0x%x, reg_value: 0x%x, read back flag: %d\n",
+            op->op == I2C_READ ? "I2C_READ" : "I2C_WRITE", i, op->reg_addr, op->reg_val, op->read_back);
+        ret = handle_operation(client, op);
+        if (ret < 0) {
+            WB_MAC_BSC_ERROR("handle operation %d failed, ret: %d\n", i, ret);
+            return ret;
+        }
+        if (op->op == I2C_READ) {
+            val_tmp = op->reg_val;
+        }
+
+        if (i == dev_params->sbus_error_op) {
+            if (val_tmp & dev_params->sbus_error_mask) {
+                WB_MAC_BSC_ERROR("SBUS error seen, status value: 0x%x\n", op->reg_val);
+                return -EIO;
+            }
+            WB_MAC_BSC_DEBUG("Error status check ok, status: 0x%x, error_mask: 0x%x \n",
+                val_tmp, dev_params->sbus_error_mask);
+        }
+    }
+
+    if (val_tmp == reg_addr) {
+        WB_MAC_BSC_ERROR("get mac register error, register value: 0x%x equal to reg_addr: 0x%x\n",
+            val_tmp, reg_addr);
+        return -EIO;
+    }
+
+    *reg_value = val_tmp;
+    WB_MAC_BSC_DEBUG("get_mac_reg success, reg_addr: 0x%x, reg_value: 0x%x", reg_addr, *reg_value);
+    return 0;
+}
+
+static int read_vtmon(struct i2c_client *client, uint8_t vtmon, int *temp)
+{
+    struct mac_data *data;
+    dev_params_t *dev_params;
+    uint32_t reg_addr, reg_val;
+    uint32_t vtmon_val;
+    int ret;
+
+    data = i2c_get_clientdata(client);
+    dev_params = &data->dev_param;
+
+    if (vtmon >= dev_params->vtmon_instances) {
+        WB_MAC_BSC_ERROR("VTMON index [%d] greater or equal to VTMON instance number: %d\n",
+            vtmon, dev_params->vtmon_instances);
+        return -1;
+    }
+    reg_addr = dev_params->vtmon_reg_addrs[vtmon];
+    ret = get_mac_reg(client, reg_addr, &reg_val);
+    if (ret < 0) {
+        WB_MAC_BSC_ERROR("Read VTMON[%d] failed, reg_addr: 0x%x, ret: %d\n",
+            vtmon, reg_addr, ret);
+        return ret;
+    }
+
+    vtmon_val = reg_val & ((1 << dev_params->vtmon_data_width) - 1);
+    *temp = ((dev_params->vtmon_scalar * vtmon_val) + dev_params->vtmon_offset) / 10;
+
+    if ((*temp / 1000 < -40) || (*temp / 1000 > 120)) {
+        WB_MAC_BSC_ERROR("MAC temp invalid, vtmon: %d, temp: %d\n", vtmon, *temp);
+        return -EINVAL;
+    }
+    WB_MAC_BSC_DEBUG("Read mac temp success, index: %d, value: %d\n", vtmon + 1, *temp);
+    return 0;
+}
+
+static ssize_t show_mac_temp(struct device *dev, struct device_attribute *da, char *buf)
+{
+    struct mac_data *data = dev_get_drvdata(dev);
+    struct i2c_client *client = data->client;
+    u32 temp_index = to_sensor_dev_attr(da)->index;
+    int ret, temp;
+
+    mutex_lock(&data->update_lock);
+    ret = read_vtmon(client, temp_index - 1, &temp);
+    if (ret < 0) {
+        temp = -MAC_TEMP_INVALID;
+        WB_MAC_BSC_ERROR("get_mactemp index: %d failed, ret = %d\n", temp_index, ret);
+    }
+    mutex_unlock(&data->update_lock);
+    return snprintf(buf, PAGE_SIZE, "%d\n", temp);
+}
+
+static ssize_t show_mac_max_temp(struct device *dev, struct device_attribute *da, char *buf)
+{
+    struct mac_data *data = dev_get_drvdata(dev);
+    struct i2c_client *client = data->client;
+    dev_params_t *dev_params;
+    int i, ret;
+    int tmp, temp;
+
+    mutex_lock(&data->update_lock);
+
+    dev_params = &data->dev_param;
+    temp = -MAC_TEMP_INVALID;
+    for (i = 0; i < dev_params->vtmon_instances ; i++) {
+        ret = read_vtmon(client, i, &tmp);
+        if (ret < 0) {
+            WB_MAC_BSC_ERROR("Get mactemp failed, temp index: %d, ret = %d\n",
+                i, ret);
+            tmp = -MAC_TEMP_INVALID;
+        }
+
+        temp = (temp > tmp) ? temp : tmp;
+    }
+
+    mutex_unlock(&data->update_lock);
+    return snprintf(buf, PAGE_SIZE, "%d\n", temp);
+}
+
+static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, show_mac_temp, NULL, MAC_TEMP_INDEX1);
+static SENSOR_DEVICE_ATTR(temp2_input, S_IRUGO, show_mac_temp, NULL, MAC_TEMP_INDEX2);
+static SENSOR_DEVICE_ATTR(temp3_input, S_IRUGO, show_mac_temp, NULL, MAC_TEMP_INDEX3);
+static SENSOR_DEVICE_ATTR(temp4_input, S_IRUGO, show_mac_temp, NULL, MAC_TEMP_INDEX4);
+static SENSOR_DEVICE_ATTR(temp5_input, S_IRUGO, show_mac_temp, NULL, MAC_TEMP_INDEX5);
+static SENSOR_DEVICE_ATTR(temp6_input, S_IRUGO, show_mac_temp, NULL, MAC_TEMP_INDEX6);
+static SENSOR_DEVICE_ATTR(temp7_input, S_IRUGO, show_mac_temp, NULL, MAC_TEMP_INDEX7);
+static SENSOR_DEVICE_ATTR(temp8_input, S_IRUGO, show_mac_temp, NULL, MAC_TEMP_INDEX8);
+static SENSOR_DEVICE_ATTR(temp9_input, S_IRUGO, show_mac_temp, NULL, MAC_TEMP_INDEX9);
+static SENSOR_DEVICE_ATTR(temp10_input, S_IRUGO, show_mac_temp, NULL, MAC_TEMP_INDEX10);
+static SENSOR_DEVICE_ATTR(temp11_input, S_IRUGO, show_mac_temp, NULL, MAC_TEMP_INDEX11);
+static SENSOR_DEVICE_ATTR(temp12_input, S_IRUGO, show_mac_temp, NULL, MAC_TEMP_INDEX12);
+static SENSOR_DEVICE_ATTR(temp13_input, S_IRUGO, show_mac_temp, NULL, MAC_TEMP_INDEX13);
+static SENSOR_DEVICE_ATTR(temp14_input, S_IRUGO, show_mac_temp, NULL, MAC_TEMP_INDEX14);
+static SENSOR_DEVICE_ATTR(temp15_input, S_IRUGO, show_mac_temp, NULL, MAC_TEMP_INDEX15);
+static SENSOR_DEVICE_ATTR(temp99_input, S_IRUGO, show_mac_max_temp, NULL, 0);
+
+static struct attribute *mac_hwmon_attrs[] = {
+    &sensor_dev_attr_temp1_input.dev_attr.attr,
+    &sensor_dev_attr_temp2_input.dev_attr.attr,
+    &sensor_dev_attr_temp3_input.dev_attr.attr,
+    &sensor_dev_attr_temp4_input.dev_attr.attr,
+    &sensor_dev_attr_temp5_input.dev_attr.attr,
+    &sensor_dev_attr_temp6_input.dev_attr.attr,
+    &sensor_dev_attr_temp7_input.dev_attr.attr,
+    &sensor_dev_attr_temp8_input.dev_attr.attr,
+    &sensor_dev_attr_temp9_input.dev_attr.attr,
+    &sensor_dev_attr_temp10_input.dev_attr.attr,
+    &sensor_dev_attr_temp11_input.dev_attr.attr,
+    &sensor_dev_attr_temp12_input.dev_attr.attr,
+    &sensor_dev_attr_temp13_input.dev_attr.attr,
+    &sensor_dev_attr_temp14_input.dev_attr.attr,
+    &sensor_dev_attr_temp15_input.dev_attr.attr,
+    &sensor_dev_attr_temp99_input.dev_attr.attr,
+    NULL
+};
+ATTRIBUTE_GROUPS(mac_hwmon);
+
+static void mac_bsc_setup(struct i2c_client *client)
+{
+    int i, ret;
+    struct mac_data *data;
+    dev_params_t *dev_params;
+    uint32_t reg_value;
+
+    data = i2c_get_clientdata(client);
+    dev_params = &data->dev_param;
+
+    for (i = 0; i < dev_params->sbus_setup_ops; i++) {
+        ret = bsc_i2c_read(client, dev_params->sbus_setup[i].reg_addr, &reg_value);
+        if ((ret < 0) || (reg_value != dev_params->sbus_setup[i].reg_val)) {
+            WB_MAC_BSC_DEBUG("bsc setup op%d, ret: %d, reg_addr: 0x%x, read value: 0x%x not equal to set value: 0x%x\n",
+                i, ret, dev_params->sbus_setup[i].reg_addr, reg_value, dev_params->sbus_setup[i].reg_val);
+            bsc_i2c_write(client, dev_params->sbus_setup[i].reg_addr, dev_params->sbus_setup[i].reg_val);
+        } else {
+            WB_MAC_BSC_DEBUG("bsc setup op%d, reg_addr: 0x%x, read value: 0x%x equal to set value: 0x%x\n",
+                i, dev_params->sbus_setup[i].reg_addr, reg_value, dev_params->sbus_setup[i].reg_val);
+        }
+    }
+    return;
+}
+
+static int mac_bsc_init(struct i2c_client *client)
+{
+    int ret, mac_id;
+    uint32_t reg_value;
+
+    ret = get_mac_reg(client, MAC_ID_REG, &reg_value);
+    if (ret < 0) {
+        WB_MAC_BSC_ERROR("Get MAC ID failed, reg_addr: 0x%x, ret = %d\n",
+            MAC_ID_REG, ret);
+        return ret;
+    }
+
+    WB_MAC_BSC_DEBUG("Get MAC ID success, reg_addr: 0x%x, value: 0x%x \n",
+        MAC_ID_REG, reg_value);
+    mac_id = reg_value & 0xffff;
+    return mac_id;
+}
+
+static int find_mac_config(int type, int *index)
+{
+    int i, size;
+
+    size = ARRAY_SIZE(mac_temp_conf);
+    for (i = 0; i < size; i++) {
+        if (mac_temp_conf[i].mac_id == type) {
+            *index = i;
+            return 0;
+        }
+    }
+    return -1;
+}
+
+static int mac_bsc_config_check(dev_params_t *dev_params)
+{
+    i2c_op_t *last_op;
+    i2c_op_t *err_op;
+    i2c_op_t *addr_op;
+
+    /* vtmon_instances should not more than the MAC_BSC_MAX_TEMP_NUM */
+    if ((dev_params->vtmon_instances > MAC_BSC_MAX_TEMP_NUM) ||
+        (dev_params->vtmon_instances <= 0)) {
+        WB_MAC_BSC_ERROR("VTMON instance number %d more than the max number: %d\n",
+            dev_params->vtmon_instances, MAC_BSC_MAX_TEMP_NUM);
+        return -1;
+    }
+
+    /* vtmon read operation steps should not more than the MAC_BSC_MAX_READ_REG_STEP */
+    if ((dev_params->vtmon_read_ops > MAC_BSC_MAX_READ_REG_STEP) ||
+        (dev_params->vtmon_read_ops <=0)) {
+        WB_MAC_BSC_ERROR("VTMON read ops number %d more than the max step: %d\n",
+            dev_params->vtmon_read_ops, MAC_BSC_MAX_READ_REG_STEP);
+        return -1;
+    }
+
+    /* the last operation must be I2C_READ to get temperature register value */
+    last_op = &dev_params->vtmon_read[dev_params->vtmon_read_ops - 1];
+    if (last_op->op != I2C_READ) {
+        WB_MAC_BSC_ERROR("VTMON read ops config error, last operation not I2C_READ, last step: %d, op_code: %d\n",
+            dev_params->vtmon_read_ops - 1, last_op->op);
+        return -1;
+    }
+
+    /* the address operation steps should not more than the vtmon_read_ops and not the last step */
+    if ((dev_params->sbus_addr_op >= (dev_params->vtmon_read_ops - 1)) ||
+        (dev_params->sbus_addr_op < 0)) {
+        WB_MAC_BSC_ERROR("VTMON addr op step invalid, index %d, read ops: %d\n",
+            dev_params->sbus_addr_op, dev_params->vtmon_read_ops);
+        return -1;
+    }
+
+    /* the address operation must be I2C_WRITE to set temperature register address */
+    addr_op = &dev_params->vtmon_read[dev_params->sbus_addr_op];
+    if (addr_op->op != I2C_WRITE) {
+        WB_MAC_BSC_ERROR("VTMON addr op config error, addr operation not I2C_WRITE, addr op step: %d, op_code: %d\n",
+            dev_params->sbus_addr_op, addr_op->op);
+        return -1;
+    }
+
+    /* the error status operation steps should not more than the vtmon_read_ops and not the last step */
+    if (dev_params->sbus_error_op >= (dev_params->vtmon_read_ops - 1)) {
+        WB_MAC_BSC_ERROR("VTMON error op step invalid, index %d, read ops: %d\n",
+            dev_params->sbus_error_op, dev_params->vtmon_read_ops);
+        return -1;
+    }
+
+    /* if error status operation exist, it must be I2C_READ to get error status register */
+    if (dev_params->sbus_error_op >=0) {
+        err_op = &dev_params->vtmon_read[dev_params->sbus_error_op];
+        if (err_op->op != I2C_READ) {
+            WB_MAC_BSC_ERROR("VTMON error op config error, error operation not I2C_READ, error op step: %d, op_code: %d\n",
+                dev_params->sbus_error_op, err_op->op);
+            return -1;
+        }
+    }
+    WB_MAC_BSC_DEBUG("dev_params check ok, instance number: %d, read_ops: %d, addr_op: %d, error_op: %d\n",
+        dev_params->vtmon_instances, dev_params->vtmon_read_ops,
+        dev_params->sbus_addr_op, dev_params->sbus_error_op);
+    return 0;
+}
+
+static int mac_probe(struct i2c_client *client, const struct i2c_device_id *id)
+{
+    struct mac_data *data;
+    int ret, mac_id, index;
+
+    WB_MAC_BSC_DEBUG("=========mac_probe(%d-%04x)===========\n",
+        client->adapter->nr, client->addr);
+
+    if (!client->adapter->algo->master_xfer) {
+        dev_err(&client->adapter->dev, "I2C level transfers not supported\n");
+        return -EOPNOTSUPP;
+    }
+
+    data = devm_kzalloc(&client->dev, sizeof(struct mac_data), GFP_KERNEL);
+    if (!data) {
+        dev_err(&client->dev, "Failed to devm_kzalloc.\n");
+        return -ENOMEM;
+    }
+
+    data->client = client;
+    i2c_set_clientdata(client, data);
+
+    mac_id = id->driver_data;
+    ret = find_mac_config(mac_id, &index);
+    if (ret < 0) {
+        dev_err(&client->dev, "Failed to find mac config, mac id from driver_data: 0x%x\n", mac_id);
+        return -EINVAL;
+    }
+    data->dev_param = mac_temp_conf[index];
+    ret = mac_bsc_config_check(&data->dev_param);
+    if (ret < 0) {
+        dev_err(&client->dev, "Invalid config parameter, mac id: 0x%x, config index: %d\n",
+            mac_id, index);
+        return -EINVAL;
+    }
+
+    mac_bsc_setup(client);
+
+    if (mac_id == TD4) {
+        ret = mac_bsc_init(client);
+        if (ret < 0) {
+            dev_err(&client->dev, "Failed to get mac id, ret: %d\n", ret);
+            return -EIO;
+        }
+        mac_id = ret;
+        ret = find_mac_config(mac_id, &index);
+        if (ret < 0) {
+            dev_err(&client->dev, "Failed to find mac config, mac id from chip: 0x%x\n", mac_id);
+            return -EINVAL;
+        }
+        data->dev_param = mac_temp_conf[index];
+        ret = mac_bsc_config_check(&data->dev_param);
+        if (ret < 0) {
+            dev_err(&client->dev, "Invalid config parameter, mac id: 0x%x, config index: %d\n",
+                mac_id, index);
+            return -EINVAL;
+        }
+    }
+
+    WB_MAC_BSC_DEBUG("mac_id: 0x%x, config index: %d\n", mac_id, index);
+
+    mutex_init(&data->update_lock);
+    data->hwmon_dev = hwmon_device_register_with_groups(&client->dev, client->name, data, mac_hwmon_groups);
+    if (IS_ERR(data->hwmon_dev)) {
+        dev_err(&client->dev, "Failed to register mac bsc hwmon\n");
+        return PTR_ERR(data->hwmon_dev);
+    }
+
+    dev_info(&client->dev, "Register mac bsc %x with %d vtmon instance number success\n",
+        mac_id, data->dev_param.vtmon_instances);
+    return 0;
+}
+
+static void mac_remove(struct i2c_client *client)
+{
+    struct mac_data *data = i2c_get_clientdata(client);
+
+    hwmon_device_unregister(data->hwmon_dev);
+    return;
+}
+
+static const struct i2c_device_id mac_id_table[] = {
+    { "wb_mac_bsc_td3", TD3 },
+    { "wb_mac_bsc_td3_x2", TD3_X2 },
+    { "wb_mac_bsc_td4", TD4 },
+    { "wb_mac_bsc_th3", TH3 },
+    { "wb_mac_bsc_th4", TH4 },
+    {}
+};
+MODULE_DEVICE_TABLE(i2c, mac_id_table);
+
+static struct i2c_driver wb_mac_bsc_driver = {
+    .driver = {
+        .name   = "wb_mac_bsc",
+    },
+    .probe      = mac_probe,
+    .remove     = mac_remove,
+    .id_table   = mac_id_table,
+};
+
+module_i2c_driver(wb_mac_bsc_driver);
+
+MODULE_AUTHOR("support");
+MODULE_DESCRIPTION("mac bsc driver");
+MODULE_LICENSE("GPL");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_mdio_gpio_device.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_mdio_gpio_device.c
new file mode 100644
index 000000000..e3198b378
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_mdio_gpio_device.c
@@ -0,0 +1,110 @@
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/io.h>
+#include <linux/errno.h>
+#include <linux/ioport.h>
+#include <linux/device.h>
+#include <linux/delay.h>
+#include <linux/platform_device.h>
+#include <linux/platform_data/mdio-gpio.h>
+#include <linux/mdio-gpio.h>
+#include <linux/gpio.h>
+#include <linux/gpio/machine.h>
+
+static int gpio_mdc = 44;
+module_param(gpio_mdc, int, S_IRUGO | S_IWUSR);
+
+static int gpio_mdio = 45;
+module_param(gpio_mdio, int, S_IRUGO | S_IWUSR);
+
+static char *gpio_chip_name = NULL;
+module_param(gpio_chip_name, charp, 0644);
+MODULE_PARM_DESC(str_var, "A string variable for GPIO controller");
+
+static int g_wb_mdio_gpio_device_debug = 0;
+static int g_wb_mdio_gpio_device_error = 0;
+
+module_param(g_wb_mdio_gpio_device_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_mdio_gpio_device_error, int, S_IRUGO | S_IWUSR);
+
+#define WB_MIDO_GPIO_DEVICE_DEBUG_VERBOSE(fmt, args...) do {                                        \
+    if (g_wb_mdio_gpio_device_debug) { \
+        printk(KERN_INFO "[WB_MDIO_GPIO_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define WB_MIDO_GPIO_DEVICE_DEBUG_ERROR(fmt, args...) do {                                        \
+    if (g_wb_mdio_gpio_device_error) { \
+        printk(KERN_ERR "[WB_MDIO_GPIO_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+struct mdio_gpio_platform_data mdio_gpio_device_data = {
+    .phy_mask = 0,
+    .phy_ignore_ta_mask = 0,
+};
+
+static void wb_mdio_gpio_device_release(struct device *dev)
+{
+    return;
+}
+
+static struct platform_device mdio_gpio_device = {
+    .name   = "mdio-gpio",
+    .num_resources  = 0,
+    .id             = -1,
+    .dev    = {
+        .platform_data  = &mdio_gpio_device_data,
+        .release = wb_mdio_gpio_device_release,
+    },
+};
+
+static struct gpiod_lookup_table wb_mdio_gpio_table = {
+    .dev_id = "mdio-gpio",
+    .table = {
+        GPIO_LOOKUP_IDX("wb_gpio_d1500", 44, NULL, MDIO_GPIO_MDC,
+                GPIO_ACTIVE_HIGH),
+        GPIO_LOOKUP_IDX("wb_gpio_d1500", 45, NULL, MDIO_GPIO_MDIO,
+                GPIO_ACTIVE_HIGH),
+        { },
+    },
+};
+
+static int __init wb_mdio_gpio_device_init(void)
+{
+    int err;
+
+    WB_MIDO_GPIO_DEVICE_DEBUG_VERBOSE("wb_mdio_gpio_device_init enter!\n");
+    wb_mdio_gpio_table.table[0].chip_hwnum = gpio_mdc;
+    wb_mdio_gpio_table.table[1].chip_hwnum = gpio_mdio;
+
+    if (gpio_chip_name) {
+        wb_mdio_gpio_table.table[0].key = gpio_chip_name;
+        wb_mdio_gpio_table.table[1].key = gpio_chip_name;
+    }
+
+    gpiod_add_lookup_table(&wb_mdio_gpio_table);
+
+    err = platform_device_register(&mdio_gpio_device);
+    if (err < 0) {
+        printk(KERN_ERR "register mdio gpio device fail(%d). \n", err);
+        gpiod_remove_lookup_table(&wb_mdio_gpio_table);
+        return -1;
+    }
+    return 0;
+
+}
+
+static void __exit wb_mdio_gpio_device_exit(void)
+{
+    WB_MIDO_GPIO_DEVICE_DEBUG_VERBOSE("wb_mdio_gpio_device_exit enter!\n");
+    platform_device_unregister(&mdio_gpio_device);
+    gpiod_remove_lookup_table(&wb_mdio_gpio_table);
+}
+
+module_init(wb_mdio_gpio_device_init);
+module_exit(wb_mdio_gpio_device_exit);
+MODULE_DESCRIPTION("WB MDIO GPIO Devices");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_pcie_dev.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_pcie_dev.c
new file mode 100644
index 000000000..093d070fd
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_pcie_dev.c
@@ -0,0 +1,819 @@
+/*
+ * wb_pcie_dev.c
+ * ko to read/write pcie iomem and ioports through /dev/XXX device
+ */
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/device.h>
+#include <linux/miscdevice.h>
+#include <linux/platform_device.h>
+#include <linux/of_platform.h>
+#include <linux/slab.h>
+#include <linux/uaccess.h>
+#include <linux/pci.h>
+#include <linux/io.h>
+#include <linux/ioport.h>
+#include <linux/uio.h>
+
+#include "wb_pcie_dev.h"
+
+#define PROXY_NAME "wb-pci-dev"
+#define MAX_NAME_SIZE            (20)
+#define MAX_PCIE_NUM             (256)
+#define PCI_RDWR_MAX_LEN         (256)
+#define PCIE_BUS_WIDTH_1         (1)
+#define PCIE_BUS_WIDTH_2         (2)
+#define PCIE_BUS_WIDTH_4         (4)
+
+#define KERNEL_SPASE         (0)
+#define USER_SPASE           (1)
+
+static int g_pcie_dev_debug = 0;
+static int g_pcie_dev_error = 0;
+
+module_param(g_pcie_dev_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_pcie_dev_error, int, S_IRUGO | S_IWUSR);
+
+#define PCIE_DEV_DEBUG_VERBOSE(fmt, args...) do {                                        \
+    if (g_pcie_dev_debug) { \
+        printk(KERN_INFO "[PCIE_DEV][VER][func:%s line:%d]\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define PCIE_DEV_DEBUG_ERROR(fmt, args...) do {                                        \
+    if (g_pcie_dev_error) { \
+        printk(KERN_ERR "[PCIE_DEV][ERR][func:%s line:%d]\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+typedef struct firmware_upg_s {
+    int upg_ctrl_base;
+    int upg_flash_base;
+} firmware_upg_t;
+
+typedef struct wb_pci_dev_s {
+    const char *name;
+    uint32_t domain;
+    uint32_t bus;
+    uint32_t slot;
+    uint32_t fn;
+    uint32_t bar;
+    void __iomem *pci_mem_base;
+    uint32_t pci_io_base;
+    uint32_t bar_len;
+    uint32_t bar_flag;
+    uint32_t bus_width;
+    uint32_t check_pci_id;
+    uint32_t pci_id;
+    struct miscdevice misc;
+    void (*setreg)(struct wb_pci_dev_s *wb_pci_dev, int reg, u32 value);
+    u32 (*getreg)(struct wb_pci_dev_s *wb_pci_dev, int reg);
+    firmware_upg_t firmware_upg;
+} wb_pci_dev_t;
+
+static wb_pci_dev_t* pcie_dev_arry[MAX_PCIE_NUM];
+
+static void pci_dev_setreg_8(wb_pci_dev_t *wb_pci_dev, int reg, u32 value)
+{
+    u8 w_value;
+
+    w_value = (u8)(value & 0xff);
+    if (wb_pci_dev->bar_flag == IORESOURCE_MEM) {
+        writeb(w_value, wb_pci_dev->pci_mem_base + reg);
+    } else {
+        outb(w_value, wb_pci_dev->pci_io_base + reg);
+    }
+    return;
+}
+
+static void pci_dev_setreg_16(wb_pci_dev_t *wb_pci_dev, int reg, u32 value)
+{
+    u16 w_value;
+
+    w_value = (u16)(value & 0xffff);
+    if (wb_pci_dev->bar_flag == IORESOURCE_MEM) {
+        writew(w_value, wb_pci_dev->pci_mem_base + reg);
+    } else {
+        outw(w_value, wb_pci_dev->pci_io_base + reg);
+    }
+
+    return;
+}
+
+static void pci_dev_setreg_32(wb_pci_dev_t *wb_pci_dev, int reg, u32 value)
+{
+
+    if (wb_pci_dev->bar_flag == IORESOURCE_MEM) {
+        writel(value, wb_pci_dev->pci_mem_base + reg);
+    } else {
+        outl(value, wb_pci_dev->pci_io_base + reg);
+    }
+    return;
+}
+
+static inline u32 pci_dev_getreg_8(wb_pci_dev_t *wb_pci_dev, int reg)
+{
+    u32 value;
+
+    if (wb_pci_dev->bar_flag == IORESOURCE_MEM) {
+        value = readb(wb_pci_dev->pci_mem_base + reg);
+    } else {
+        value = inb(wb_pci_dev->pci_io_base + reg);
+    }
+
+    return value;
+}
+
+static inline u32 pci_dev_getreg_16(wb_pci_dev_t *wb_pci_dev, int reg)
+{
+    u32 value;
+
+    if (wb_pci_dev->bar_flag == IORESOURCE_MEM) {
+        value = readw(wb_pci_dev->pci_mem_base + reg);
+    } else {
+        value = inw(wb_pci_dev->pci_io_base + reg);
+    }
+
+    return value;
+}
+
+static inline u32 pci_dev_getreg_32(wb_pci_dev_t *wb_pci_dev, int reg)
+{
+    u32 value;
+
+    if (wb_pci_dev->bar_flag == IORESOURCE_MEM) {
+        value = readl(wb_pci_dev->pci_mem_base + reg);
+    } else {
+        value = inl(wb_pci_dev->pci_io_base + reg);
+    }
+
+    return value;
+}
+
+static inline void pci_dev_setreg(wb_pci_dev_t *wb_pci_dev, int reg, u32 value)
+{
+    wb_pci_dev->setreg(wb_pci_dev, reg, value);
+}
+
+static inline u32 pci_dev_getreg(wb_pci_dev_t *wb_pci_dev, int reg)
+{
+    return wb_pci_dev->getreg(wb_pci_dev, reg);
+}
+
+static int pci_dev_open(struct inode *inode, struct file *file)
+{
+    unsigned int minor = iminor(inode);
+    wb_pci_dev_t *wb_pci_dev;
+
+    PCIE_DEV_DEBUG_VERBOSE("inode: %p, file: %p, minor: %u", inode, file, minor);
+
+    if (minor >= MAX_PCIE_NUM) {
+        PCIE_DEV_DEBUG_ERROR("minor out of range, minor = %d.\n", minor);
+        return -ENODEV;
+    }
+
+    wb_pci_dev = pcie_dev_arry[minor];
+    if (wb_pci_dev == NULL) {
+        PCIE_DEV_DEBUG_ERROR("wb_pci_dev is NULL, open failed, minor = %d\n", minor);
+        return -ENODEV;
+    }
+
+    file->private_data = wb_pci_dev;
+    return 0;
+}
+
+static int pci_dev_release(struct inode *inode, struct file *file)
+{
+    file->private_data = NULL;
+    return 0;
+}
+
+static int pci_dev_read_tmp(wb_pci_dev_t *wb_pci_dev, uint32_t offset, uint8_t *buf, size_t count)
+{
+    int width, i, j;
+    u32 val;
+
+    if (offset > wb_pci_dev->bar_len) {
+        PCIE_DEV_DEBUG_VERBOSE("offset:0x%x, bar len:0x%x, EOF.\n", offset, wb_pci_dev->bar_len);
+        return 0;
+    }
+
+    width = wb_pci_dev->bus_width;
+
+    if (offset % width) {
+        PCIE_DEV_DEBUG_ERROR("pci bus width:%d, offset:0x%x, read size %lu invalid.\n",
+            width, offset, count);
+        return -EINVAL;
+    }
+
+    if (count > wb_pci_dev->bar_len - offset) {
+        PCIE_DEV_DEBUG_VERBOSE("read count out of range. input len:%lu, read len:%u.\n",
+            count, wb_pci_dev->bar_len - offset);
+        count = wb_pci_dev->bar_len - offset;
+    }
+
+    for (i = 0; i < count; i += width) {
+        val = pci_dev_getreg(wb_pci_dev, offset + i);
+        for (j = 0; (j < width) && (i + j < count); j++) {
+            buf[i + j] = (val >> (8 * j)) & 0xff;
+        }
+    }
+    return count;
+}
+
+static ssize_t pci_dev_read(struct file *file, char __user *buf, size_t count, loff_t *offset, int flag)
+{
+    wb_pci_dev_t *wb_pci_dev;
+    int ret, read_len;
+    u8 buf_tmp[PCI_RDWR_MAX_LEN];
+
+    wb_pci_dev = file->private_data;
+    if (wb_pci_dev == NULL) {
+        PCIE_DEV_DEBUG_ERROR("wb_pci_dev is NULL, read failed.\n");
+        return -EINVAL;
+    }
+
+    if (count == 0) {
+        PCIE_DEV_DEBUG_ERROR("Invalid params, read count is 0.\n");
+        return -EINVAL;
+    }
+
+    if (count > sizeof(buf_tmp)) {
+        PCIE_DEV_DEBUG_VERBOSE("read count %lu exceed max %lu.\n", count, sizeof(buf_tmp));
+        count = sizeof(buf_tmp);
+    }
+
+    mem_clear(buf_tmp, sizeof(buf_tmp));
+    read_len = pci_dev_read_tmp(wb_pci_dev, *offset, buf_tmp, count);
+    if (read_len < 0) {
+        PCIE_DEV_DEBUG_ERROR("pci_dev_read_tmp failed, ret:%d.\n", read_len);
+        return read_len;
+    }
+    /* check flag is user spase or kernel spase */
+    if (flag == USER_SPASE) {
+        PCIE_DEV_DEBUG_VERBOSE("user space read, buf: %p, offset: %lld, read count %lu.\n",
+            buf, *offset, count);
+        if (copy_to_user(buf, buf_tmp, read_len)) {
+            PCIE_DEV_DEBUG_ERROR("copy_to_user failed.\n");
+            return -EFAULT;
+        }
+    } else {
+        PCIE_DEV_DEBUG_VERBOSE("kernel space read, buf: %p, offset: %lld, read count %lu.\n",
+            buf, *offset, count);
+        memcpy(buf, buf_tmp, read_len);
+    }
+    *offset += read_len;
+    ret = read_len;
+    return ret;
+}
+
+static ssize_t pci_dev_read_user(struct file *file, char __user *buf, size_t count, loff_t *offset)
+{
+    int ret;
+
+    PCIE_DEV_DEBUG_VERBOSE("pci_dev_read_user, file: %p, count: %lu, offset: %lld\n",
+        file, count, *offset);
+    ret = pci_dev_read(file, buf, count, offset, USER_SPASE);
+    return ret;
+}
+
+static ssize_t pci_dev_read_iter(struct kiocb *iocb, struct iov_iter *to)
+{
+    int ret;
+
+    PCIE_DEV_DEBUG_VERBOSE("pci_dev_read_iter, file: %p, count: %lu, offset: %lld\n",
+        iocb->ki_filp, to->count, iocb->ki_pos);
+    ret = pci_dev_read(iocb->ki_filp, to->kvec->iov_base, to->count, &iocb->ki_pos, KERNEL_SPASE);
+    return ret;
+}
+
+static int pci_dev_write_tmp(wb_pci_dev_t *wb_pci_dev, uint32_t offset, uint8_t *buf, size_t count)
+{
+    int width, i, j;
+    u32 val;
+
+    if (offset > wb_pci_dev->bar_len) {
+        PCIE_DEV_DEBUG_VERBOSE("offset:0x%x, bar len:0x%x, EOF.\n", offset, wb_pci_dev->bar_len);
+        return 0;
+    }
+
+    width = wb_pci_dev->bus_width;
+
+    if (offset % width) {
+        PCIE_DEV_DEBUG_ERROR("pci bus width:%d, offset:0x%x, read size %lu invalid.\n",
+            width, offset, count);
+        return -EINVAL;
+    }
+
+    if (count > wb_pci_dev->bar_len - offset) {
+        PCIE_DEV_DEBUG_VERBOSE("write count out of range. input len:%lu, write len:%u.\n",
+            count, wb_pci_dev->bar_len - offset);
+        count = wb_pci_dev->bar_len - offset;
+    }
+
+    for (i = 0; i < count; i += width) {
+        val = 0;
+        for (j = 0; (j < width) && (i + j < count); j++) {
+            val |= buf[i + j] << (8 * j);
+        }
+        pci_dev_setreg(wb_pci_dev, i + offset, val);
+    }
+
+    return count;
+}
+
+static ssize_t pci_dev_write(struct file *file, const char __user *buf, size_t count,
+                   loff_t *offset, int flag)
+{
+    wb_pci_dev_t *wb_pci_dev;
+    u8 buf_tmp[PCI_RDWR_MAX_LEN];
+    int write_len;
+
+    wb_pci_dev = file->private_data;
+    if (wb_pci_dev == NULL) {
+        PCIE_DEV_DEBUG_ERROR("wb_pci_dev is NULL, write failed.\n");
+        return -EINVAL;
+    }
+
+    if (count == 0) {
+        PCIE_DEV_DEBUG_ERROR("Invalid params, write count is 0.\n");
+        return -EINVAL;
+    }
+
+    if (count > sizeof(buf_tmp)) {
+        PCIE_DEV_DEBUG_VERBOSE("write count %lu exceed max %lu.\n", count, sizeof(buf_tmp));
+        count = sizeof(buf_tmp);
+    }
+
+    mem_clear(buf_tmp, sizeof(buf_tmp));
+    /* check flag is user spase or kernel spase */
+    if (flag == USER_SPASE) {
+        PCIE_DEV_DEBUG_VERBOSE("user space write, buf: %p, offset: %lld, write count %lu.\n",
+            buf, *offset, count);
+        if (copy_from_user(buf_tmp, buf, count)) {
+            PCIE_DEV_DEBUG_ERROR("copy_from_user failed.\n");
+            return -EFAULT;
+        }
+    } else {
+        PCIE_DEV_DEBUG_VERBOSE("kernel space write, buf: %p, offset: %lld, write count %lu.\n",
+            buf, *offset, count);
+        memcpy(buf_tmp, buf, count);
+    }
+
+    write_len = pci_dev_write_tmp(wb_pci_dev, *offset, buf_tmp, count);
+    if (write_len < 0) {
+        PCIE_DEV_DEBUG_ERROR("pci_dev_write_tmp failed, ret:%d.\n", write_len);
+        return write_len;
+    }
+
+    *offset += write_len;
+    return write_len;
+}
+
+static ssize_t pci_dev_write_user(struct file *file, const char __user *buf, size_t count, loff_t *offset)
+{
+    int ret;
+
+    PCIE_DEV_DEBUG_VERBOSE("pci_dev_write_user, file: %p, count: %lu, offset: %lld\n",
+        file, count, *offset);
+    ret = pci_dev_write(file, buf, count, offset, USER_SPASE);
+    return ret;
+}
+
+static ssize_t pci_dev_write_iter(struct kiocb *iocb, struct iov_iter *from)
+{
+    int ret;
+
+    PCIE_DEV_DEBUG_VERBOSE("pci_dev_write_iter, file: %p, count: %lu, offset: %lld\n",
+        iocb->ki_filp, from->count, iocb->ki_pos);
+    ret = pci_dev_write(iocb->ki_filp, from->kvec->iov_base, from->count, &iocb->ki_pos, KERNEL_SPASE);
+    return ret;
+}
+
+static loff_t pci_dev_llseek(struct file *file, loff_t offset, int origin)
+{
+    loff_t ret = 0;
+    wb_pci_dev_t *wb_pci_dev;
+
+    wb_pci_dev = file->private_data;
+    if (wb_pci_dev == NULL) {
+        PCIE_DEV_DEBUG_ERROR("wb_pci_dev is NULL, llseek failed.\n");
+        return -EINVAL;
+    }
+
+    switch (origin) {
+    case SEEK_SET:
+        if (offset < 0) {
+            PCIE_DEV_DEBUG_ERROR("SEEK_SET, offset:%lld, invalid.\n", offset);
+            ret = -EINVAL;
+            break;
+        }
+        if (offset > wb_pci_dev->bar_len) {
+            PCIE_DEV_DEBUG_ERROR("SEEK_SET out of range, offset:%lld, bar len:0x%x.\n",
+                offset, wb_pci_dev->bar_len);
+            ret = - EINVAL;
+            break;
+        }
+        file->f_pos = offset;
+        ret = file->f_pos;
+        break;
+    case SEEK_CUR:
+        if (((file->f_pos + offset) > wb_pci_dev->bar_len) || ((file->f_pos + offset) < 0)) {
+            PCIE_DEV_DEBUG_ERROR("SEEK_CUR out of range, f_ops:%lld, offset:%lld, bar len:0x%x.\n",
+                file->f_pos, offset, wb_pci_dev->bar_len);
+            ret = - EINVAL;
+            break;
+        }
+        file->f_pos += offset;
+        ret = file->f_pos;
+        break;
+    default:
+        PCIE_DEV_DEBUG_ERROR("unsupport llseek type:%d.\n", origin);
+        ret = -EINVAL;
+        break;
+    }
+    return ret;
+}
+
+static long pci_dev_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
+{
+    wb_pci_dev_t *wb_pci_dev;
+    void __user *argp;
+    firmware_upg_t *firmware_upg;
+    int upg_ctrl_base;
+    int upg_flash_base;
+
+    PCIE_DEV_DEBUG_VERBOSE("ioctl, cmd=0x%02x, arg=0x%02lx\n",cmd, arg);
+
+    wb_pci_dev = file->private_data;
+    if (wb_pci_dev == NULL) {
+        PCIE_DEV_DEBUG_ERROR("wb_pci_dev is NULL, ioctl failed.\n");
+        return -EINVAL;
+    }
+
+    firmware_upg = &wb_pci_dev->firmware_upg;
+
+    argp = (void __user *)arg;
+
+    switch (cmd) {
+    case GET_FPGA_UPG_CTL_BASE:
+        if (firmware_upg->upg_ctrl_base < 0) {
+            PCIE_DEV_DEBUG_ERROR("dts not adaptive upg_ctrl_base\n");
+            return -EFAULT;
+        } else {
+            upg_ctrl_base = firmware_upg->upg_ctrl_base;
+            if (copy_to_user(argp, &upg_ctrl_base, sizeof(upg_ctrl_base))) {
+                PCIE_DEV_DEBUG_ERROR("upg_ctrl_base copy_from_user failed\n");
+                return -EFAULT;
+            }
+        }
+        break;
+    case GET_FPGA_UPG_FLASH_BASE:
+        if (firmware_upg->upg_flash_base < 0) {
+            PCIE_DEV_DEBUG_ERROR("dts not adaptive upg_flash_base\n");
+            return -EFAULT;
+        } else {
+            upg_flash_base = firmware_upg->upg_flash_base;
+            if (copy_to_user(argp, &upg_flash_base, sizeof(upg_flash_base))) {
+                PCIE_DEV_DEBUG_ERROR("upg_flash_base copy_from_user failed\n");
+                return -EFAULT;
+            }
+        }
+        break;
+    default:
+        PCIE_DEV_DEBUG_ERROR("command unsupported \n");
+        return -ENOTTY;
+    }
+
+    return 0;
+}
+
+static const struct file_operations pcie_dev_fops = {
+    .owner      = THIS_MODULE,
+    .llseek     = pci_dev_llseek,
+    .read       = pci_dev_read_user,
+    .write      = pci_dev_write_user,
+    .read_iter  = pci_dev_read_iter,
+    .write_iter = pci_dev_write_iter,
+    .unlocked_ioctl = pci_dev_ioctl,
+    .open       = pci_dev_open,
+    .release    = pci_dev_release,
+};
+
+static wb_pci_dev_t *dev_match(const char *path)
+{
+    wb_pci_dev_t *wb_pci_dev;
+    char dev_name[MAX_NAME_SIZE];
+    int i;
+
+    for (i = 0; i < MAX_PCIE_NUM; i++) {
+        if (pcie_dev_arry[i] == NULL) {
+            continue;
+        }
+        wb_pci_dev = pcie_dev_arry[i];
+        snprintf(dev_name, MAX_NAME_SIZE,"/dev/%s", wb_pci_dev->name);
+        if (!strcmp(path, dev_name)) {
+            PCIE_DEV_DEBUG_VERBOSE("get dev_name = %s, minor = %d\n", dev_name, i);
+            return wb_pci_dev;
+        }
+    }
+
+    return NULL;
+}
+
+int pcie_device_func_read(const char *path, uint32_t offset, uint8_t *buf, size_t count)
+{
+    wb_pci_dev_t *wb_pci_dev;
+    int read_len;
+
+    if (path == NULL) {
+        PCIE_DEV_DEBUG_ERROR("path NULL");
+        return -EINVAL;
+    }
+
+    if (buf == NULL) {
+        PCIE_DEV_DEBUG_ERROR("buf NULL");
+        return -EINVAL;
+    }
+
+    wb_pci_dev = dev_match(path);
+    if (wb_pci_dev == NULL) {
+        PCIE_DEV_DEBUG_ERROR("i2c_dev match failed. dev path = %s", path);
+        return -EINVAL;
+    }
+
+    read_len = pci_dev_read_tmp(wb_pci_dev, offset, buf, count);
+    if (read_len < 0) {
+        PCIE_DEV_DEBUG_ERROR("pci_dev_read_tmp failed, ret:%d.\n", read_len);
+    }
+    return read_len;
+}
+EXPORT_SYMBOL(pcie_device_func_read);
+
+int pcie_device_func_write(const char *path, uint32_t offset, uint8_t *buf, size_t count)
+{
+    wb_pci_dev_t *wb_pci_dev;
+    int write_len;
+
+    if (path == NULL) {
+        PCIE_DEV_DEBUG_ERROR("path NULL");
+        return -EINVAL;
+    }
+
+    if (buf == NULL) {
+        PCIE_DEV_DEBUG_ERROR("buf NULL");
+        return -EINVAL;
+    }
+
+    wb_pci_dev = dev_match(path);
+    if (wb_pci_dev == NULL) {
+        PCIE_DEV_DEBUG_ERROR("i2c_dev match failed. dev path = %s", path);
+        return -EINVAL;
+    }
+
+    write_len = pci_dev_write_tmp(wb_pci_dev, offset, buf, count);
+    if (write_len < 0) {
+        PCIE_DEV_DEBUG_ERROR("pci_dev_write_tmp failed, ret:%d.\n", write_len);
+    }
+    return write_len;
+}
+EXPORT_SYMBOL(pcie_device_func_write);
+
+static int pci_setup_bars(wb_pci_dev_t *wb_pci_dev, struct pci_dev *dev)
+{
+    int ret;
+    uint32_t addr, len, flags;
+
+    ret = 0;
+    addr = pci_resource_start(dev, wb_pci_dev->bar);
+    len = pci_resource_len(dev, wb_pci_dev->bar);
+    if (addr == 0 || len == 0) {
+        PCIE_DEV_DEBUG_ERROR("get bar addr failed. bar:%d, addr:0x%x, len:0x%x.\n",
+            wb_pci_dev->bar, addr, len);
+        return -EFAULT;
+    }
+    wb_pci_dev->bar_len = len;
+
+    flags = pci_resource_flags(dev, wb_pci_dev->bar);
+    PCIE_DEV_DEBUG_VERBOSE("bar:%d, flag:0x%08x, phys addr:0x%x, len:0x%x\n",
+        wb_pci_dev->bar, flags, addr, len);
+    if (flags & IORESOURCE_MEM) {
+        wb_pci_dev->bar_flag = IORESOURCE_MEM;
+        wb_pci_dev->pci_mem_base = ioremap(addr, len);
+        PCIE_DEV_DEBUG_VERBOSE("pci mem base:%p.\n", wb_pci_dev->pci_mem_base);
+    } else if (flags & IORESOURCE_IO) {
+        wb_pci_dev->bar_flag = IORESOURCE_IO;
+        wb_pci_dev->pci_io_base = addr;
+        PCIE_DEV_DEBUG_VERBOSE("pci io base:0x%x.\n", wb_pci_dev->pci_io_base);
+    } else {
+        PCIE_DEV_DEBUG_ERROR("unknow pci bar flag:0x%08x.\n", flags);
+        ret = -EINVAL;
+    }
+
+    return ret;
+}
+
+static int pci_dev_probe(struct platform_device *pdev)
+{
+    int ret, devfn;
+    uint32_t pci_id;
+    wb_pci_dev_t *wb_pci_dev;
+    struct pci_dev *pci_dev;
+    struct miscdevice *misc;
+    firmware_upg_t *firmware_upg;
+    pci_dev_device_t *pci_dev_device;
+
+    wb_pci_dev = devm_kzalloc(&pdev->dev, sizeof(wb_pci_dev_t), GFP_KERNEL);
+    if (!wb_pci_dev) {
+        dev_err(&pdev->dev, "devm_kzalloc failed.\n");
+        ret = -ENOMEM;
+        return ret;
+    }
+
+    firmware_upg = &wb_pci_dev->firmware_upg;
+
+    if (pdev->dev.of_node) {
+        ret = 0;
+        ret += of_property_read_string(pdev->dev.of_node, "pci_dev_name", &wb_pci_dev->name);
+        ret += of_property_read_u32(pdev->dev.of_node, "pci_domain", &wb_pci_dev->domain);
+        ret += of_property_read_u32(pdev->dev.of_node, "pci_bus", &wb_pci_dev->bus);
+        ret += of_property_read_u32(pdev->dev.of_node, "pci_slot", &wb_pci_dev->slot);
+        ret += of_property_read_u32(pdev->dev.of_node, "pci_fn", &wb_pci_dev->fn);
+        ret += of_property_read_u32(pdev->dev.of_node, "pci_bar", &wb_pci_dev->bar);
+        ret += of_property_read_u32(pdev->dev.of_node, "bus_width", &wb_pci_dev->bus_width);
+
+        if (ret != 0) {
+            dev_err(&pdev->dev, "Failed to get dts config, ret:%d.\n", ret);
+            return -ENXIO;
+        }
+
+        ret = 0;
+        ret += of_property_read_u32(pdev->dev.of_node, "upg_ctrl_base", &firmware_upg->upg_ctrl_base);
+        ret += of_property_read_u32(pdev->dev.of_node, "upg_flash_base", &firmware_upg->upg_flash_base);
+        if (ret != 0) {
+            PCIE_DEV_DEBUG_VERBOSE("dts don't adaptive fpga upg related, ret:%d.\n", ret);
+            firmware_upg->upg_ctrl_base = -1;
+            firmware_upg->upg_flash_base = -1;
+        } else {
+            PCIE_DEV_DEBUG_VERBOSE("upg_ctrl_base:0x%04x, upg_flash_base:0x%02x.\n",
+                firmware_upg->upg_ctrl_base, firmware_upg->upg_flash_base);
+        }
+        ret = of_property_read_u32(pdev->dev.of_node, "check_pci_id", &wb_pci_dev->check_pci_id);
+        if (ret == 0) {
+            ret = of_property_read_u32(pdev->dev.of_node, "pci_id", &wb_pci_dev->pci_id);
+            if (ret != 0) {
+                dev_err(&pdev->dev, "Failed to get pci_id, ret:%d.\n", ret);
+                return -ENXIO;
+            }
+        }
+    } else {
+        if (pdev->dev.platform_data == NULL) {
+            dev_err(&pdev->dev, "Failed to get platform data config.\n");
+            return -ENXIO;
+        }
+        pci_dev_device = pdev->dev.platform_data;
+        wb_pci_dev->name = pci_dev_device->pci_dev_name;
+        wb_pci_dev->domain = pci_dev_device->pci_domain;
+        wb_pci_dev->bus = pci_dev_device->pci_bus;
+        wb_pci_dev->slot = pci_dev_device->pci_slot;
+        wb_pci_dev->fn = pci_dev_device->pci_fn;
+        wb_pci_dev->bar = pci_dev_device->pci_bar;
+        wb_pci_dev->bus_width = pci_dev_device->bus_width;
+        wb_pci_dev->check_pci_id = pci_dev_device->check_pci_id;
+        wb_pci_dev->pci_id = pci_dev_device->pci_id;
+        firmware_upg->upg_ctrl_base = pci_dev_device->upg_ctrl_base;
+        firmware_upg->upg_flash_base = pci_dev_device->upg_flash_base;
+        PCIE_DEV_DEBUG_VERBOSE("upg_ctrl_base:0x%04x, upg_flash_base:0x%02x.\n",
+            firmware_upg->upg_ctrl_base, firmware_upg->upg_flash_base);
+    }
+
+    PCIE_DEV_DEBUG_VERBOSE("name:%s, domain:0x%04x, bus:0x%02x, slot:0x%02x, fn:%u, bar:%u, bus_width:%d.\n",
+        wb_pci_dev->name, wb_pci_dev->domain, wb_pci_dev->bus, wb_pci_dev->slot, wb_pci_dev->fn,
+        wb_pci_dev->bar, wb_pci_dev->bus_width);
+
+    devfn = PCI_DEVFN(wb_pci_dev->slot, wb_pci_dev->fn);
+    pci_dev = pci_get_domain_bus_and_slot(wb_pci_dev->domain, wb_pci_dev->bus, devfn);
+    if (pci_dev == NULL) {
+        dev_err(&pdev->dev, "Failed to find pci_dev, domain:0x%04x, bus:0x%02x, devfn:0x%x\n",
+            wb_pci_dev->domain, wb_pci_dev->bus, devfn);
+        return -ENXIO;
+    }
+    if (wb_pci_dev->check_pci_id == 1) {
+        pci_id = (pci_dev->vendor << 16) | pci_dev->device;
+        if (wb_pci_dev->pci_id != pci_id) {
+            dev_err(&pdev->dev, "Failed to check pci id, except: 0x%x, really: 0x%x\n",
+                wb_pci_dev->pci_id, pci_id);
+            return -ENXIO;
+        }
+        PCIE_DEV_DEBUG_VERBOSE("pci id check ok, pci_id: 0x%x", pci_id);
+    }
+    ret = pci_setup_bars(wb_pci_dev, pci_dev);
+    if (ret != 0) {
+        dev_err(&pdev->dev, "Failed to get pci bar address.\n");
+        return ret;
+    }
+
+    if (!wb_pci_dev->setreg || !wb_pci_dev->getreg) {
+        switch (wb_pci_dev->bus_width) {
+        case 1:
+            wb_pci_dev->setreg = pci_dev_setreg_8;
+            wb_pci_dev->getreg = pci_dev_getreg_8;
+            break;
+
+        case 2:
+            wb_pci_dev->setreg = pci_dev_setreg_16;
+            wb_pci_dev->getreg = pci_dev_getreg_16;
+            break;
+
+        case 4:
+            wb_pci_dev->setreg = pci_dev_setreg_32;
+            wb_pci_dev->getreg = pci_dev_getreg_32;
+            break;
+        default:
+            dev_err(&pdev->dev, "Error: unsupported I/O width (%d).\n", wb_pci_dev->bus_width);
+            ret = -EINVAL;
+            goto io_unmap;
+        }
+    }
+
+    misc = &wb_pci_dev->misc;
+    misc->minor = MISC_DYNAMIC_MINOR;
+    misc->name = wb_pci_dev->name;
+    misc->fops = &pcie_dev_fops;
+    misc->mode = 0666;
+    if (misc_register(misc) != 0) {
+        dev_err(&pdev->dev, "Failed to register %s device.\n", misc->name);
+        ret = -ENXIO;
+        goto io_unmap;
+    }
+    if (misc->minor >= MAX_PCIE_NUM) {
+        dev_err(&pdev->dev, "Error: device minor[%d] more than max pcie num[%d].\n",
+            misc->minor, MAX_PCIE_NUM);
+        misc_deregister(misc);
+        ret = -EINVAL;
+        goto io_unmap;
+    }
+    pcie_dev_arry[misc->minor] = wb_pci_dev;
+    dev_info(&pdev->dev, "%04x:%02x:%02x.%d[bar%d: %s]: register %s device with minor:%d success.\n",
+        wb_pci_dev->domain, wb_pci_dev->bus, wb_pci_dev->slot, wb_pci_dev->fn, wb_pci_dev->bar,
+        wb_pci_dev->bar_flag == IORESOURCE_MEM ? "IORESOURCE_MEM" : "IORESOURCE_IO",
+        misc->name, misc->minor );
+    return 0;
+
+io_unmap:
+    if (wb_pci_dev->pci_mem_base) {
+        iounmap(wb_pci_dev->pci_mem_base);
+    }
+    return ret;
+}
+
+static int pci_dev_remove(struct platform_device *pdev)
+{
+    int i;
+
+    for (i = 0; i < MAX_PCIE_NUM ; i++) {
+        if (pcie_dev_arry[i] != NULL) {
+            if (pcie_dev_arry[i]->pci_mem_base) {
+                iounmap(pcie_dev_arry[i]->pci_mem_base);
+            }
+            misc_deregister(&pcie_dev_arry[i]->misc);
+            pcie_dev_arry[i] = NULL;
+        }
+    }
+
+    return 0;
+}
+
+static struct of_device_id pci_dev_match[] = {
+    {
+        .compatible = "wb-pci-dev",
+    },
+    {},
+};
+MODULE_DEVICE_TABLE(of, pci_dev_match);
+
+static struct platform_driver wb_pci_dev_driver = {
+    .probe      = pci_dev_probe,
+    .remove     = pci_dev_remove,
+    .driver     = {
+        .owner  = THIS_MODULE,
+        .name   = PROXY_NAME,
+        .of_match_table = pci_dev_match,
+    },
+};
+
+static int __init wb_pci_dev_init(void)
+{
+    return platform_driver_register(&wb_pci_dev_driver);
+}
+
+static void __exit wb_pci_dev_exit(void)
+{
+    platform_driver_unregister(&wb_pci_dev_driver);
+}
+
+module_init(wb_pci_dev_init);
+module_exit(wb_pci_dev_exit);
+MODULE_DESCRIPTION("pcie device driver");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_pcie_dev.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_pcie_dev.h
new file mode 100644
index 000000000..33da8d475
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_pcie_dev.h
@@ -0,0 +1,28 @@
+#ifndef __WB_PCIE_DEV_H__
+#define __WB_PCIE_DEV_H__
+#include <linux/string.h>
+
+#define mem_clear(data, size) memset((data), 0, (size))
+
+#define UPG_TYPE 'U'
+#define GET_FPGA_UPG_CTL_BASE              _IOR(UPG_TYPE, 0, int)
+#define GET_FPGA_UPG_FLASH_BASE            _IOR(UPG_TYPE, 1, int)
+
+#define PCI_DEV_NAME_MAX_LEN (64)
+
+typedef struct pci_dev_device_s {
+    char pci_dev_name[PCI_DEV_NAME_MAX_LEN];
+    int pci_domain;
+    int pci_bus;
+    int pci_slot;
+    int pci_fn;
+    int pci_bar;
+    int bus_width;
+    uint32_t check_pci_id;
+    uint32_t pci_id;
+    int upg_ctrl_base;
+    int upg_flash_base;
+    int device_flag;
+} pci_dev_device_t;
+
+#endif
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_platform_i2c_dev.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_platform_i2c_dev.c
new file mode 100644
index 000000000..092c99da2
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_platform_i2c_dev.c
@@ -0,0 +1,749 @@
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/device.h>
+#include <linux/miscdevice.h>
+#include <linux/i2c.h>
+#include <linux/platform_device.h>
+#include <linux/of_platform.h>
+#include <linux/slab.h>
+#include <linux/uaccess.h>
+#include <linux/fs.h>
+#include <linux/export.h>
+
+#include "wb_platform_i2c_dev.h"
+
+#define PROXY_NAME "wb-platform-i2c-dev"
+#define MAX_I2C_DEV_NUM      (256)
+#define FPGA_MAX_LEN         (256)
+#define MAX_NAME_SIZE        (20)
+#define MAX_BUS_WIDTH        (16)
+#define TRANSFER_WRITE_BUFF  (FPGA_MAX_LEN + MAX_BUS_WIDTH)
+
+#define WIDTH_1Byte          (1)
+#define WIDTH_2Byte          (2)
+#define WIDTH_4Byte          (4)
+
+int g_i2c_dev_debug = 0;
+int g_i2c_dev_error = 0;
+
+module_param(g_i2c_dev_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_i2c_dev_error, int, S_IRUGO | S_IWUSR);
+
+#define I2C_DEV_DEBUG_DMESG(fmt, args...) do {                                        \
+    if (g_i2c_dev_debug) { \
+        printk(KERN_ERR "[I2C_DEV][DEBUG][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define I2C_DEV_DEBUG_ERROR(fmt, args...) do {                                        \
+    if (g_i2c_dev_error) { \
+        printk(KERN_ERR "[I2C_DEV][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+static struct platform_i2c_dev_info* i2c_dev_arry[MAX_I2C_DEV_NUM];
+
+struct platform_i2c_dev_info {
+    uint32_t i2c_bus;
+    uint32_t i2c_addr;
+    const char *name;
+    uint32_t data_bus_width;
+    uint32_t addr_bus_width;
+    uint32_t per_rd_len;
+    uint32_t per_wr_len;
+    struct miscdevice misc;
+};
+
+static int transfer_read(struct platform_i2c_dev_info *i2c_dev, u8 *buf, loff_t regaddr, size_t count)
+{
+    int i, j;
+    struct i2c_adapter *adap;
+    union i2c_smbus_data data;
+    u8 offset_buf[MAX_BUS_WIDTH];
+    struct i2c_msg msgs[2];
+    int msgs_num, ret;
+    u8 offset;
+    u8 length;
+
+    if (!i2c_dev) {
+        I2C_DEV_DEBUG_ERROR("can't get read i2c_dev\r\n");
+        return -ENODEV;
+    }
+
+    i = 0;
+
+    mem_clear(offset_buf, sizeof(offset_buf));
+
+    switch (i2c_dev->addr_bus_width) {
+    case WIDTH_4Byte:
+        offset_buf[i++] = (regaddr >> 24) & 0xFF;
+        offset_buf[i++] = (regaddr >> 16) & 0xFF;
+        offset_buf[i++] = (regaddr >> 8) & 0xFF;
+        offset_buf[i++] = regaddr & 0xFF;
+        break;
+    case WIDTH_2Byte:
+        offset_buf[i++] = (regaddr >> 8) & 0xFF;
+        offset_buf[i++] = regaddr & 0xFF;
+        break;
+    case WIDTH_1Byte:
+        offset_buf[i++] = regaddr & 0xFF;
+        break;
+    default:
+        I2C_DEV_DEBUG_ERROR("Only support 1,2,4 Byte Address Width,but set width = %u\r\n", i2c_dev->addr_bus_width);
+        return -EINVAL;
+    }
+
+    adap = i2c_get_adapter(i2c_dev->i2c_bus);
+    if (adap == NULL) {
+        I2C_DEV_DEBUG_ERROR("get i2c adapter %d faild.\n", i2c_dev->i2c_bus);
+        return -ENXIO;
+    }
+
+    if (adap->algo->master_xfer) {
+        mem_clear(msgs, sizeof(msgs));
+        msgs[0].addr = i2c_dev->i2c_addr;
+        msgs[0].flags = 0;
+        msgs[0].len = i2c_dev->addr_bus_width;
+        msgs[0].buf = offset_buf;
+
+        msgs[1].addr = i2c_dev->i2c_addr;
+        msgs[1].flags = I2C_M_RD;
+        msgs[1].len = count;
+        msgs[1].buf = buf;
+
+        msgs_num = 2;
+        ret = i2c_transfer(adap, msgs, msgs_num);
+        if (ret != msgs_num) {
+            I2C_DEV_DEBUG_ERROR("i2c_transfer read error\r\n");
+            ret = -EFAULT;
+            goto error_exit;
+        }
+    } else {
+        if (i2c_dev->addr_bus_width == WIDTH_1Byte) {
+            offset = regaddr & 0xFF;
+            if (i2c_check_functionality(adap, I2C_FUNC_SMBUS_READ_I2C_BLOCK)) {
+                for (j = 0; j < count; j += I2C_SMBUS_BLOCK_MAX) {
+                    if (count - j > I2C_SMBUS_BLOCK_MAX) {
+                        length = I2C_SMBUS_BLOCK_MAX;
+                    } else {
+                        length = count - j;
+                    }
+                    data.block[0] = length;
+                    ret = adap->algo->smbus_xfer(adap, i2c_dev->i2c_addr,
+                                    0,
+                                    I2C_SMBUS_READ,
+                                    offset, I2C_SMBUS_I2C_BLOCK_DATA, &data);
+                    if (ret) {
+                        I2C_DEV_DEBUG_ERROR("smbus_xfer read block error, ret = %d\n", ret);
+                        ret = -EFAULT;
+                        goto error_exit;
+                    }
+                    memcpy(buf + j, data.block + 1, length);
+                    offset += length;
+                }
+            } else {
+                for (j = 0; j < count; j++) {
+                    ret = adap->algo->smbus_xfer(adap, i2c_dev->i2c_addr,
+                                    0,
+                                    I2C_SMBUS_READ,
+                                    offset, I2C_SMBUS_BYTE_DATA, &data);
+
+                    if (!ret) {
+                        buf[j] = data.byte;
+                    } else {
+                        I2C_DEV_DEBUG_ERROR("smbus_xfer read byte error, ret = %d\n", ret);
+                        ret = -EFAULT;
+                        goto error_exit;
+                    }
+                    offset++;
+                }
+            }
+        } else {
+            I2C_DEV_DEBUG_ERROR("smbus_xfer not support addr_bus_width = %d\n", i2c_dev->addr_bus_width);
+            ret = -EINVAL;
+            goto error_exit;
+        }
+    }
+
+    i2c_put_adapter(adap);
+    return 0;
+error_exit:
+    i2c_put_adapter(adap);
+    return ret;
+}
+
+static int transfer_write(struct platform_i2c_dev_info *i2c_dev, u8 *buf, loff_t regaddr, size_t count)
+{
+    int i, j;
+    struct i2c_adapter *adap;
+    union i2c_smbus_data data;
+    u8 offset_buf[TRANSFER_WRITE_BUFF];
+    struct i2c_msg msgs[1];
+    int msgs_num, ret;
+    u8 offset;
+    u8 length;
+
+    if (!i2c_dev) {
+        I2C_DEV_DEBUG_ERROR("can't get read i2c_dev\r\n");
+        return -ENODEV;
+    }
+
+    i = 0;
+
+    mem_clear(offset_buf, sizeof(offset_buf));
+
+    switch (i2c_dev->addr_bus_width) {
+    case WIDTH_4Byte:
+        offset_buf[i++] = (regaddr >> 24) & 0xFF;
+        offset_buf[i++] = (regaddr >> 16) & 0xFF;
+        offset_buf[i++] = (regaddr >> 8) & 0xFF;
+        offset_buf[i++] = regaddr & 0xFF;
+        break;
+    case WIDTH_2Byte:
+        offset_buf[i++] = (regaddr >> 8) & 0xFF;
+        offset_buf[i++] = regaddr & 0xFF;
+        break;
+    case WIDTH_1Byte:
+        offset_buf[i++] = regaddr & 0xFF;
+        break;
+    default:
+        I2C_DEV_DEBUG_ERROR("Only support 1,2,4 Byte Address Width,but set width = %u\r\n", i2c_dev->addr_bus_width);
+        return -EINVAL;
+    }
+
+    memcpy(offset_buf + i2c_dev->addr_bus_width, buf, count);
+
+    adap = i2c_get_adapter(i2c_dev->i2c_bus);
+    if (adap == NULL) {
+        I2C_DEV_DEBUG_ERROR("get i2c adapter %d faild.\n", i2c_dev->i2c_bus);
+        return -ENXIO;
+    }
+
+    if (adap->algo->master_xfer) {
+        mem_clear(msgs, sizeof(msgs));
+
+        msgs[0].addr = i2c_dev->i2c_addr;
+        msgs[0].flags = 0;
+        msgs[0].len = i2c_dev->addr_bus_width + count;
+        msgs[0].buf = offset_buf;
+
+        msgs_num = 1;
+        ret = i2c_transfer(adap, msgs, msgs_num);
+        if (ret != msgs_num) {
+            I2C_DEV_DEBUG_ERROR("i2c_transfer write error\r\n");
+            ret = -EFAULT;
+            goto error_exit;
+        }
+    } else {
+        if (i2c_dev->addr_bus_width == WIDTH_1Byte) {
+            offset = regaddr & 0xFF;
+            if (i2c_check_functionality(adap, I2C_FUNC_SMBUS_WRITE_I2C_BLOCK)) {
+                for (j = 0; j < count; j += I2C_SMBUS_BLOCK_MAX) {
+                    if (count - j > I2C_SMBUS_BLOCK_MAX) {
+                        length = I2C_SMBUS_BLOCK_MAX;
+                    } else {
+                        length = count - j;
+                    }
+                    data.block[0] = length;
+                    memcpy(data.block + 1, buf + j, length);
+                    ret = adap->algo->smbus_xfer(adap, i2c_dev->i2c_addr,
+                                    0,
+                                    I2C_SMBUS_WRITE,
+                                    offset, I2C_SMBUS_I2C_BLOCK_DATA, &data);
+                    if (ret) {
+                        I2C_DEV_DEBUG_ERROR("smbus_xfer write block error, ret = %d\r\n", ret);
+                        ret = -EFAULT;
+                        goto error_exit;
+                    }
+                    offset += length;
+                }
+            } else {
+                for (j = 0; j < count; j++) {
+                    data.byte = buf[j];
+                    ret = adap->algo->smbus_xfer(adap, i2c_dev->i2c_addr,
+                                    0,
+                                    I2C_SMBUS_WRITE,
+                                    offset, I2C_SMBUS_BYTE_DATA, &data);
+                    if (ret) {
+                        I2C_DEV_DEBUG_ERROR("smbus_xfer write byte error, ret = %d\r\n", ret);
+                        ret = -EFAULT;
+                        goto error_exit;
+                    }
+                    offset += 1;
+                }
+            }
+        } else {
+            I2C_DEV_DEBUG_ERROR("smbus_xfer not support addr_bus_width = %d\r\n", i2c_dev->addr_bus_width);
+            ret = -EINVAL;
+            goto error_exit;
+        }
+    }
+
+    i2c_put_adapter(adap);
+    return 0;
+error_exit:
+    i2c_put_adapter(adap);
+    return ret;
+}
+
+static long i2c_dev_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
+{
+    return 0;
+}
+
+static int i2c_dev_open(struct inode *inode, struct file *file)
+{
+    unsigned int minor = iminor(inode);
+    struct platform_i2c_dev_info *i2c_dev;
+
+    i2c_dev = i2c_dev_arry[minor];
+    if (i2c_dev == NULL) {
+        return -ENODEV;
+    }
+
+    file->private_data = i2c_dev;
+
+    return 0;
+}
+
+static int i2c_dev_release(struct inode *inode, struct file *file)
+{
+    file->private_data = NULL;
+
+    return 0;
+}
+
+static int device_read(struct platform_i2c_dev_info *i2c_dev, uint32_t offset, uint8_t *buf, int count)
+{
+    int i, j, ret;
+    u8 tmp_offset;
+    u8 val[FPGA_MAX_LEN];
+    u32 width, rd_len, per_len, tmp;
+    u32 max_per_len;
+
+    width = i2c_dev->data_bus_width;
+    switch (width) {
+    case WIDTH_4Byte:
+        tmp_offset = offset & 0x3;
+        if (tmp_offset) {
+            I2C_DEV_DEBUG_ERROR("data bus width:%u, offset:%u, read size %d invalid.\r\n", width, offset, count);
+            return -EINVAL;
+        }
+        break;
+    case WIDTH_2Byte:
+        tmp_offset = offset & 0x1;
+        if (tmp_offset) {
+            I2C_DEV_DEBUG_ERROR("data bus width:%u, offset:%u, read size %d invalid.\r\n", width, offset, count);
+            return -EINVAL;
+        }
+        break;
+    case WIDTH_1Byte:
+        break;
+    default:
+        I2C_DEV_DEBUG_ERROR("Only support 1,2,4 Byte Data Width,but set width = %u\r\n", width);
+        return -EINVAL;
+    }
+
+    max_per_len = i2c_dev->per_rd_len;
+    tmp = (width - 1) & count;
+    rd_len = (tmp == 0) ? count : count + width - tmp;
+    per_len = (rd_len > max_per_len) ? (max_per_len) : (rd_len);
+
+    mem_clear(val, sizeof(val));
+    for (i = 0; i < rd_len; i += per_len) {
+        ret = transfer_read(i2c_dev, val + i, offset + i, per_len);
+        if (ret < 0) {
+            I2C_DEV_DEBUG_ERROR("read error.read offset = %u\r\n", (offset + i));
+            return -EFAULT;
+        }
+    }
+
+    if (width == WIDTH_1Byte) {
+        memcpy(buf, val, count);
+    } else {
+        for (i = 0; i < count; i += width) {
+            for (j = 0; (j < width) && (i + j < count); j++) {
+                buf[i + j] = val[i + width - j - 1];
+            }
+        }
+    }
+
+    return 0;
+}
+
+static int device_write(struct platform_i2c_dev_info *i2c_dev, uint32_t offset, uint8_t *buf, size_t count)
+{
+    int i, j, ret;
+    u8 tmp_offset;
+    u32 width;
+    u8 val[FPGA_MAX_LEN];
+    u32 wr_len, per_len, tmp;
+    u32 max_per_len;
+
+    width = i2c_dev->data_bus_width;
+    switch (width) {
+    case WIDTH_4Byte:
+        tmp_offset = offset & 0x3;
+        if (tmp_offset) {
+            I2C_DEV_DEBUG_ERROR("data bus width:%u, offset:%u, read size %lu invalid.\r\n", width, offset, count);
+            return -EINVAL;
+        }
+        break;
+    case WIDTH_2Byte:
+        tmp_offset = offset & 0x1;
+        if (tmp_offset) {
+            I2C_DEV_DEBUG_ERROR("data bus width:%u, offset:%u, read size %lu invalid.\r\n", width, offset, count);
+            return -EINVAL;
+        }
+        break;
+    case WIDTH_1Byte:
+        break;
+    default:
+        I2C_DEV_DEBUG_ERROR("Only support 1,2,4 Byte Data Width,but set width = %u\r\n", width);
+        return -EINVAL;
+    }
+
+    mem_clear(val, sizeof(val));
+
+    if (width == WIDTH_1Byte) {
+        memcpy(val, buf, count);
+    } else {
+        for (i = 0; i < count; i += width) {
+            for (j = 0; (j < width) && (i + j < count); j++) {
+                val[i + width - j - 1] = buf[i + j];
+            }
+        }
+    }
+
+    max_per_len = i2c_dev->per_wr_len;
+    tmp = (width - 1) & count;
+    wr_len = (tmp == 0) ? count : count + width - tmp;
+    per_len = (wr_len > max_per_len) ? (max_per_len) : (wr_len);
+
+    for (i = 0; i < wr_len; i += per_len) {
+        ret = transfer_write(i2c_dev, val + i, offset + i, per_len);
+        if (ret < 0) {
+            I2C_DEV_DEBUG_ERROR("write error.offset = %u\r\n", (offset + i));
+            return -EFAULT;
+        }
+    }
+    return 0;
+}
+
+static ssize_t i2c_dev_read(struct file *file, char __user *buf, size_t count, loff_t *offset)
+{
+    u8 val[FPGA_MAX_LEN];
+    int ret;
+    struct platform_i2c_dev_info *i2c_dev;
+
+    if (count <= 0 || count > sizeof(val)) {
+        I2C_DEV_DEBUG_ERROR("read conut %lu , beyond max:%lu.\n", count, sizeof(val));
+        return -EINVAL;
+    }
+
+    i2c_dev = file->private_data;
+    if (i2c_dev == NULL) {
+        I2C_DEV_DEBUG_ERROR("can't get read private_data .\r\n");
+        return -EINVAL;
+    }
+
+    ret = device_read(i2c_dev, (uint32_t)*offset, val, count);
+    if (ret < 0) {
+        I2C_DEV_DEBUG_ERROR("i2c dev read failed, dev name:%s, offset:0x%x, len:%lu.\n",
+            i2c_dev->name, (uint32_t)*offset, count);
+        return -EINVAL;
+    }
+
+    if (copy_to_user(buf, val, count)) {
+        I2C_DEV_DEBUG_ERROR("copy_to_user error \r\n");
+        return -EFAULT;
+    } else{
+        *offset += count;
+    }
+
+    return count;
+}
+
+static ssize_t i2c_dev_write(struct file *file, const char __user *buf, size_t count, loff_t *offset)
+{
+    u8 val[FPGA_MAX_LEN];
+    int ret;
+    struct platform_i2c_dev_info *i2c_dev;
+
+    if (count <= 0 || count > sizeof(val)) {
+        I2C_DEV_DEBUG_ERROR("write conut %lu, beyond max val:%lu.\n", count, sizeof(val));
+        return -EINVAL;
+    }
+
+    i2c_dev = file->private_data;
+    if (i2c_dev == NULL) {
+        I2C_DEV_DEBUG_ERROR("get write private_data error.\r\n");
+        return -EINVAL;
+    }
+
+    mem_clear(val, sizeof(val));
+    if (copy_from_user(val, buf, count)) {
+        I2C_DEV_DEBUG_ERROR("copy_from_user error.\r\n");
+        return -EFAULT;
+    }
+
+    ret = device_write (i2c_dev, (uint32_t)*offset, val, count);
+    if (ret < 0) {
+        I2C_DEV_DEBUG_ERROR("i2c dev write failed, dev name:%s, offset:0x%llx, len:%lu.\n",
+            i2c_dev->name, *offset, count);
+        return -EINVAL;
+    }
+
+    *offset += count;
+    return count;
+}
+
+static loff_t i2c_dev_llseek(struct file *file, loff_t offset, int origin)
+{
+    loff_t ret = 0;
+
+    switch (origin) {
+    case SEEK_SET:
+        if (offset < 0) {
+            I2C_DEV_DEBUG_ERROR("SEEK_SET, offset:%lld, invalid.\r\n", offset);
+            ret = -EINVAL;
+            break;
+        }
+        file->f_pos = offset;
+        ret = file->f_pos;
+        break;
+    case SEEK_CUR:
+        if (file->f_pos + offset < 0) {
+            I2C_DEV_DEBUG_ERROR("SEEK_CUR out of range, f_ops:%lld, offset:%lld.\n",
+                 file->f_pos, offset);
+        }
+        file->f_pos += offset;
+        ret = file->f_pos;
+        break;
+    default:
+        I2C_DEV_DEBUG_ERROR("unsupport llseek type:%d.\n", origin);
+        ret = -EINVAL;
+        break;
+    }
+    return ret;
+}
+
+static const struct file_operations i2c_dev_fops = {
+    .owner      = THIS_MODULE,
+    .llseek     = i2c_dev_llseek,
+    .read       = i2c_dev_read,
+    .write      = i2c_dev_write,
+    .unlocked_ioctl = i2c_dev_ioctl,
+    .open       = i2c_dev_open,
+    .release    = i2c_dev_release,
+};
+
+static struct platform_i2c_dev_info * dev_match(const char *path)
+{
+    struct platform_i2c_dev_info *i2c_dev;
+    char dev_name[MAX_NAME_SIZE];
+    int i;
+    for (i = 0; i < MAX_I2C_DEV_NUM; i++) {
+        if (i2c_dev_arry[ i ] == NULL) {
+            continue;
+        }
+        i2c_dev = i2c_dev_arry[ i ];
+        snprintf(dev_name, MAX_NAME_SIZE,"/dev/%s", i2c_dev->name);
+        if (!strcmp(path, dev_name)) {
+            I2C_DEV_DEBUG_DMESG("get dev_name = %s, minor = %d\n", dev_name, i);
+            return i2c_dev;
+        }
+    }
+
+    return NULL;
+}
+
+int platform_i2c_device_func_read(const char *path, uint32_t offset, uint8_t *buf, size_t count)
+{
+    struct platform_i2c_dev_info *i2c_dev = NULL;
+    int ret;
+
+    if(path == NULL){
+        I2C_DEV_DEBUG_ERROR("path NULL");
+        return -EINVAL;
+    }
+
+    if(buf == NULL){
+        I2C_DEV_DEBUG_ERROR("buf NULL");
+        return -EINVAL;
+    }
+
+    if (count > FPGA_MAX_LEN) {
+        I2C_DEV_DEBUG_ERROR("read conut %lu, beyond max:%d.\n", count, FPGA_MAX_LEN);
+        return -EINVAL;
+    }
+
+    i2c_dev = dev_match(path);
+    if (i2c_dev == NULL) {
+        I2C_DEV_DEBUG_ERROR("i2c_dev match failed. dev path = %s", path);
+        return -EINVAL;
+    }
+
+    ret = device_read(i2c_dev, offset, buf, count);
+    if (ret < 0) {
+        I2C_DEV_DEBUG_ERROR("fpga i2c dev read failed, dev name:%s, offset:0x%x, len:%lu.\n",
+            i2c_dev->name, offset, count);
+        return -EINVAL;
+    }
+
+    return count;
+}
+EXPORT_SYMBOL(platform_i2c_device_func_read);
+
+int platform_i2c_device_func_write(const char *path, uint32_t offset, uint8_t *buf, size_t count)
+{
+    struct platform_i2c_dev_info *i2c_dev = NULL;
+    int ret;
+
+    if(path == NULL){
+        I2C_DEV_DEBUG_ERROR("path NULL");
+        return -EINVAL;
+    }
+
+    if(buf == NULL){
+        I2C_DEV_DEBUG_ERROR("buf NULL");
+        return -EINVAL;
+    }
+
+    if (count > FPGA_MAX_LEN) {
+        I2C_DEV_DEBUG_ERROR("write conut %lu, beyond max:%d.\n", count, FPGA_MAX_LEN);
+        return -EINVAL;
+    }
+
+    i2c_dev = dev_match(path);
+    if (i2c_dev == NULL) {
+        I2C_DEV_DEBUG_ERROR("i2c_dev match failed. dev path = %s", path);
+        return -EINVAL;
+    }
+
+    ret = device_write (i2c_dev, offset, buf, count);
+    if (ret < 0) {
+        I2C_DEV_DEBUG_ERROR("i2c dev write failed, dev name:%s, offset:0x%x, len:%lu.\n",
+            i2c_dev->name, offset, count);
+        return -EINVAL;
+    }
+
+    return count;
+}
+EXPORT_SYMBOL(platform_i2c_device_func_write);
+
+static int platform_i2c_dev_probe(struct platform_device *pdev)
+{
+    int ret = 0;
+    struct platform_i2c_dev_info *i2c_dev;
+    struct miscdevice *misc;
+    platform_i2c_dev_device_t *platform_i2c_dev_device;
+
+    i2c_dev = devm_kzalloc(&pdev->dev, sizeof(struct platform_i2c_dev_info), GFP_KERNEL);
+    if (!i2c_dev) {
+        dev_err(&pdev->dev, "devm_kzalloc error. \r\n");
+        return -ENOMEM;
+    }
+
+    if (pdev->dev.of_node) {
+
+        ret += of_property_read_u32(pdev->dev.of_node, "i2c_bus", &i2c_dev->i2c_bus);
+        ret += of_property_read_u32(pdev->dev.of_node, "i2c_addr", &i2c_dev->i2c_addr);
+        ret += of_property_read_string(pdev->dev.of_node, "i2c_name", &i2c_dev->name);
+        ret += of_property_read_u32(pdev->dev.of_node, "data_bus_width", &i2c_dev->data_bus_width);
+        ret += of_property_read_u32(pdev->dev.of_node, "addr_bus_width", &i2c_dev->addr_bus_width);
+        ret += of_property_read_u32(pdev->dev.of_node, "per_rd_len", &i2c_dev->per_rd_len);
+        ret += of_property_read_u32(pdev->dev.of_node, "per_wr_len", &i2c_dev->per_wr_len);
+        if (ret != 0) {
+            dev_err(&pdev->dev, "dts config error.ret:%d.\r\n", ret);
+            return -ENXIO;
+        }
+    } else {
+        if (pdev->dev.platform_data == NULL) {
+            dev_err(&pdev->dev, "Failed to get platform data config.\n");
+            return -ENXIO;
+        }
+        platform_i2c_dev_device = pdev->dev.platform_data;
+        i2c_dev->i2c_bus = platform_i2c_dev_device->i2c_bus;
+        i2c_dev->i2c_addr = platform_i2c_dev_device->i2c_addr;
+        i2c_dev->name = platform_i2c_dev_device->i2c_name;
+        i2c_dev->data_bus_width = platform_i2c_dev_device->data_bus_width;
+        i2c_dev->addr_bus_width = platform_i2c_dev_device->addr_bus_width;
+        i2c_dev->per_rd_len = platform_i2c_dev_device->per_rd_len;
+        i2c_dev->per_wr_len = platform_i2c_dev_device->per_wr_len;
+    }
+
+    if ((i2c_dev->per_rd_len & (i2c_dev->data_bus_width - 1)) || (i2c_dev->per_wr_len & (i2c_dev->data_bus_width - 1))) {
+        dev_err(&pdev->dev, "Invalid config per_rd_len %d per_wr_len %d data bus_width %d.\r\n", i2c_dev->per_rd_len,
+            i2c_dev->per_wr_len, i2c_dev->data_bus_width);
+        return -ENXIO;
+    }
+
+    misc = &i2c_dev->misc;
+    misc->minor = MISC_DYNAMIC_MINOR;
+    misc->name = i2c_dev->name;
+    misc->fops = &i2c_dev_fops;
+    if (misc_register(misc) != 0) {
+        dev_err(&pdev->dev, "register %s faild.\r\n", misc->name);
+        return -ENXIO;
+    }
+
+    if (misc->minor >= MAX_I2C_DEV_NUM) {
+        dev_err(&pdev->dev, "minor number beyond the limit! is %d.\r\n", misc->minor);
+        misc_deregister(misc);
+        return -ENXIO;
+    }
+    i2c_dev_arry[misc->minor] = i2c_dev;
+
+    dev_info(&pdev->dev, "register %u addr_bus_width %u data_bus_width device %s with %u per_rd_len %u per_wr_len success.\r\n",
+        i2c_dev->addr_bus_width, i2c_dev->data_bus_width, i2c_dev->name, i2c_dev->per_rd_len, i2c_dev->per_wr_len);
+
+    return 0;
+}
+
+static int platform_i2c_dev_remove(struct platform_device *pdev)
+{
+    int i;
+
+    for (i = 0; i < MAX_I2C_DEV_NUM ; i++) {
+        if (i2c_dev_arry[i] != NULL) {
+            misc_deregister(&i2c_dev_arry[i]->misc);
+            i2c_dev_arry[i] = NULL;
+        }
+    }
+
+    return 0;
+}
+
+static const struct of_device_id platform_i2c_dev_of_match[] = {
+    { .compatible = "wb-platform-i2c-dev" },
+    { },
+};
+MODULE_DEVICE_TABLE(of, platform_i2c_dev_of_match);
+
+static struct platform_driver wb_platform_i2c_dev_driver = {
+    .probe      = platform_i2c_dev_probe,
+    .remove     = platform_i2c_dev_remove,
+    .driver     = {
+        .owner  = THIS_MODULE,
+        .name   = PROXY_NAME,
+        .of_match_table = platform_i2c_dev_of_match,
+    },
+};
+
+static int __init wb_platform_i2c_dev_init(void)
+{
+    return platform_driver_register(&wb_platform_i2c_dev_driver);
+}
+
+static void __exit wb_platform_i2c_dev_exit(void)
+{
+    platform_driver_unregister(&wb_platform_i2c_dev_driver);
+}
+
+module_init(wb_platform_i2c_dev_init);
+module_exit(wb_platform_i2c_dev_exit);
+
+MODULE_DESCRIPTION("platform i2c dev driver");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_platform_i2c_dev.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_platform_i2c_dev.h
new file mode 100644
index 000000000..b5158c9fe
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_platform_i2c_dev.h
@@ -0,0 +1,19 @@
+#ifndef __WB_PLATFORM_I2C_DEV_H__
+#define __WB_PLATFORM_I2C_DEV_H__
+#include <linux/string.h>
+
+#define mem_clear(data, size) memset((data), 0, (size))
+#define I2C_DEV_NAME_MAX_LEN (64)
+
+typedef struct platform_i2c_dev_device_s {
+    uint32_t i2c_bus;
+    uint32_t i2c_addr;
+    char i2c_name[I2C_DEV_NAME_MAX_LEN];
+    uint32_t data_bus_width;
+    uint32_t addr_bus_width;
+    uint32_t per_rd_len;
+    uint32_t per_wr_len;
+    int device_flag;
+} platform_i2c_dev_device_t;
+
+#endif
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spi_dev.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spi_dev.c
new file mode 100644
index 000000000..d70424afb
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spi_dev.c
@@ -0,0 +1,711 @@
+/*
+ * wb_spi_dev.c
+ * ko to read/write spi device through /dev/XXX device
+ */
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/device.h>
+#include <linux/miscdevice.h>
+#include <linux/spi/spi.h>
+#include <linux/platform_device.h>
+#include <linux/of_platform.h>
+#include <linux/slab.h>
+#include <linux/uaccess.h>
+#include <linux/fs.h>
+#include <linux/export.h>
+#include <linux/uio.h>
+
+#include "wb_spi_dev.h"
+
+#define MAX_SPI_DEV_NUM      (256)
+#define MAX_RW_LEN           (256)
+#define MAX_NAME_SIZE        (20)
+#define MAX_ADDR_BUS_WIDTH   (4)
+
+#define TRANSFER_WRITE_BUFF  (1 + MAX_ADDR_BUS_WIDTH + MAX_RW_LEN)
+
+#define WIDTH_1Byte          (1)
+#define WIDTH_2Byte          (2)
+#define WIDTH_4Byte          (4)
+
+#define OP_READ             (0x3)
+#define OP_WRITE            (0x2)
+
+#define KERNEL_SPASE         (0)
+#define USER_SPASE           (1)
+
+static int g_spi_dev_debug = 0;
+static int g_spi_dev_error = 0;
+
+module_param(g_spi_dev_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_spi_dev_error, int, S_IRUGO | S_IWUSR);
+
+#define SPI_DEV_DEBUG(fmt, args...) do {                                        \
+    if (g_spi_dev_debug) { \
+        printk(KERN_ERR "[SPI_DEV][DEBUG][func:%s line:%d]\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define SPI_DEV_ERROR(fmt, args...) do {                                        \
+    if (g_spi_dev_error) { \
+        printk(KERN_ERR "[SPI_DEV][ERR][func:%s line:%d]\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+static struct spi_dev_info* spi_dev_arry[MAX_SPI_DEV_NUM];
+
+struct spi_dev_info {
+    const char *name;
+    uint32_t data_bus_width;
+    uint32_t addr_bus_width;
+    uint32_t per_rd_len;
+    uint32_t per_wr_len;
+    uint32_t spi_len;
+    struct miscdevice misc;
+    struct spi_device *spi_device;
+};
+
+static int transfer_read(struct spi_dev_info *spi_dev, u8 *buf, uint32_t regaddr, size_t count)
+{
+    int i, ret;
+    u8 tx_buf[MAX_ADDR_BUS_WIDTH + 1];
+    struct spi_message m;
+    struct spi_transfer xfer[2];
+
+    i = 0;
+    mem_clear(tx_buf, sizeof(tx_buf));
+    tx_buf[i++] = OP_READ;
+
+    switch (spi_dev->addr_bus_width) {
+    case WIDTH_4Byte:
+        tx_buf[i++] = (regaddr >> 24) & 0xFF;
+        tx_buf[i++] = (regaddr >> 16) & 0xFF;
+        tx_buf[i++] = (regaddr >> 8) & 0xFF;
+        tx_buf[i++] = regaddr & 0xFF;
+        break;
+    case WIDTH_2Byte:
+        tx_buf[i++] = (regaddr >> 8) & 0xFF;
+        tx_buf[i++] = regaddr & 0xFF;
+        break;
+    case WIDTH_1Byte:
+        tx_buf[i++] = regaddr & 0xFF;
+        break;
+    default:
+        SPI_DEV_ERROR("Only support 1,2,4 Byte Width,but set width = %u\n",
+            spi_dev->addr_bus_width);
+        return -EINVAL;
+    }
+
+    mem_clear(xfer, sizeof(xfer));
+    spi_message_init(&m);
+    xfer[0].tx_buf = tx_buf;
+    xfer[0].len = spi_dev->addr_bus_width + 1;
+    spi_message_add_tail(&xfer[0], &m);
+
+    xfer[1].rx_buf = buf;
+    xfer[1].len = count;
+    spi_message_add_tail(&xfer[1], &m);
+
+    ret = spi_sync(spi_dev->spi_device, &m);
+    if (ret) {
+        SPI_DEV_ERROR("transfer_read failed, reg addr:0x%x, len:%lu, ret:%d.\n",
+            regaddr, count, ret);
+        return -EIO;
+    }
+    return 0;
+}
+
+static int transfer_write(struct spi_dev_info *spi_dev, u8 *buf, uint32_t regaddr, size_t count)
+{
+    int i, ret;
+    u8 tx_buf[TRANSFER_WRITE_BUFF];
+    struct spi_message m;
+    struct spi_transfer xfer ;
+
+    i = 0;
+    mem_clear(tx_buf, sizeof(tx_buf));
+    tx_buf[i++] = OP_WRITE;
+    switch (spi_dev->addr_bus_width) {
+    case WIDTH_4Byte:
+        tx_buf[i++] = (regaddr >> 24) & 0xFF;
+        tx_buf[i++] = (regaddr >> 16) & 0xFF;
+        tx_buf[i++] = (regaddr >> 8) & 0xFF;
+        tx_buf[i++] = regaddr & 0xFF;
+        break;
+    case WIDTH_2Byte:
+        tx_buf[i++] = (regaddr >> 8) & 0xFF;
+        tx_buf[i++] = regaddr & 0xFF;
+        break;
+    case WIDTH_1Byte:
+        tx_buf[i++] = regaddr & 0xFF;
+        break;
+    default:
+        SPI_DEV_ERROR("Only support 1,2,4 Byte Width, but set width = %u\n",
+            spi_dev->addr_bus_width);
+        return -EINVAL;
+    }
+
+    memcpy(tx_buf + i, buf, count);
+
+    mem_clear(&xfer, sizeof(xfer));
+    spi_message_init(&m);
+    xfer.tx_buf = tx_buf;
+    xfer.len = count + i;
+    spi_message_add_tail(&xfer, &m);
+
+    ret = spi_sync(spi_dev->spi_device, &m);
+    if (ret) {
+        SPI_DEV_ERROR("transfer_write failed, reg addr:0x%x, len:%lu, ret:%d.\n",
+            regaddr, count, ret);
+        return -EIO;
+    }
+    return 0;
+}
+
+static long spi_dev_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
+{
+    return 0;
+}
+
+static int spi_dev_open(struct inode *inode, struct file *file)
+{
+    unsigned int minor = iminor(inode);
+    struct spi_dev_info *spi_dev;
+
+    if (minor >= MAX_SPI_DEV_NUM) {
+        SPI_DEV_ERROR("minor out of range, minor = %d.\n", minor);
+        return -ENODEV;
+    }
+
+    spi_dev = spi_dev_arry[minor];
+    if (spi_dev == NULL) {
+        SPI_DEV_ERROR("spi_dev is NULL, open failed, minor = %d\n", minor);
+        return -ENODEV;
+    }
+
+    file->private_data = spi_dev;
+
+    return 0;
+}
+
+static int spi_dev_release(struct inode *inode, struct file *file)
+{
+    file->private_data = NULL;
+
+    return 0;
+}
+
+static int device_read(struct spi_dev_info *spi_dev, uint32_t offset, uint8_t *buf, size_t count)
+{
+    int i, j, ret;
+    u8 val[MAX_RW_LEN];
+    u32 data_width, rd_len, per_len, tmp;
+    u32 max_per_len;
+
+    if (offset > spi_dev->spi_len) {
+        SPI_DEV_DEBUG("offset: 0x%x, spi len: 0x%x, count: %lu, EOF.\n",
+            offset, spi_dev->spi_len, count);
+        return 0;
+    }
+
+    data_width = spi_dev->data_bus_width;
+    if (offset % data_width) {
+        SPI_DEV_ERROR("data bus width:%d, offset:0x%x, read size %lu invalid.\n",
+            data_width, offset, count);
+        return -EINVAL;
+    }
+
+    if (count > (spi_dev->spi_len - offset)) {
+        SPI_DEV_DEBUG("read count out of range. input len:%lu, read len:%u.\n",
+            count, spi_dev->spi_len - offset);
+        count = spi_dev->spi_len - offset;
+    }
+
+    if (count == 0) {
+        SPI_DEV_DEBUG("offset: 0x%x, spi len: 0x%x, read len: %lu, EOF.\n",
+            offset, spi_dev->spi_len, count);
+        return 0;
+    }
+
+    max_per_len = spi_dev->per_rd_len;
+    tmp = (data_width - 1) & count;
+    rd_len = (tmp == 0) ? count : count + data_width - tmp;
+    per_len = (rd_len > max_per_len) ? (max_per_len) : (rd_len);
+
+    mem_clear(val, sizeof(val));
+    for (i = 0; i < rd_len; i += per_len) {
+        ret = transfer_read(spi_dev, val + i, offset + i, per_len);
+        if (ret < 0) {
+            SPI_DEV_ERROR("read error.read offset = %u\n", (offset + i));
+            return -EFAULT;
+        }
+    }
+
+    if (data_width == WIDTH_1Byte) {
+        memcpy(buf, val, count);
+    } else {
+        for (i = 0; i < count; i += data_width) {
+            for (j = 0; (j < data_width) && (i + j < count); j++) {
+                buf[i + j] = val[i + data_width - j - 1];
+            }
+        }
+    }
+
+    return count;
+}
+
+static int device_write(struct spi_dev_info *spi_dev, uint32_t offset, uint8_t *buf, size_t count)
+{
+    int i, j, ret;
+    u32 data_width;
+    u8 val[MAX_RW_LEN];
+    u32 wr_len, per_len, tmp;
+    u32 max_per_len;
+
+    if (offset > spi_dev->spi_len) {
+        SPI_DEV_DEBUG("offset: 0x%x, spi len: 0x%x, count: %lu, EOF.\n",
+            offset, spi_dev->spi_len, count);
+        return 0;
+    }
+
+    data_width = spi_dev->data_bus_width;
+    if (offset % data_width) {
+        SPI_DEV_ERROR("data bus width:%d, offset:0x%x, read size %lu invalid.\n",
+            data_width, offset, count);
+        return -EINVAL;
+    }
+
+    if (count > (spi_dev->spi_len - offset)) {
+        SPI_DEV_DEBUG("read count out of range. input len:%lu, read len:%u.\n",
+            count, spi_dev->spi_len - offset);
+        count = spi_dev->spi_len - offset;
+    }
+
+    if (count == 0) {
+        SPI_DEV_DEBUG("offset: 0x%x, i2c len: 0x%x, read len: %lu, EOF.\n",
+            offset, spi_dev->spi_len, count);
+        return 0;
+    }
+
+    mem_clear(val, sizeof(val));
+
+    if (data_width == WIDTH_1Byte) {
+        memcpy(val, buf, count);
+    } else {
+        for (i = 0; i < count; i += data_width) {
+            for (j = 0; (j < data_width) && (i + j < count); j++) {
+                val[i + data_width - j - 1] = buf[i + j];
+            }
+        }
+    }
+
+    max_per_len = spi_dev->per_wr_len;
+    tmp = (data_width - 1) & count;
+    wr_len = (tmp == 0) ? count : count + data_width - tmp;
+    per_len = (wr_len > max_per_len) ? (max_per_len) : (wr_len);
+
+    for (i = 0; i < wr_len; i += per_len) {
+        ret = transfer_write(spi_dev, val + i, offset + i, per_len);
+        if (ret < 0) {
+            SPI_DEV_ERROR("write error.offset = %u\n", (offset + i));
+            return -EFAULT;
+        }
+    }
+    return count;
+}
+
+static ssize_t spi_dev_read(struct file *file, char __user *buf, size_t count, loff_t *offset, int flag)
+{
+    u8 val[MAX_RW_LEN];
+    int ret, read_len;
+    struct spi_dev_info *spi_dev;
+
+    spi_dev = file->private_data;
+    if (spi_dev == NULL) {
+        SPI_DEV_ERROR("can't get read private_data.\n");
+        return -EINVAL;
+    }
+
+    if (count == 0) {
+        SPI_DEV_ERROR("Invalid params, read count is 0.\n");
+        return -EINVAL;
+    }
+
+    if (count > sizeof(val)) {
+        SPI_DEV_DEBUG("read count %lu exceed max %lu.\n", count, sizeof(val));
+        count = sizeof(val);
+    }
+
+    mem_clear(val, sizeof(val));
+    read_len = device_read(spi_dev, (uint32_t)*offset, val, count);
+    if (read_len < 0) {
+        SPI_DEV_ERROR("spi dev read failed, dev name:%s, offset:0x%x, len:%lu.\n",
+            spi_dev->name, (uint32_t)*offset, count);
+        return read_len;
+    }
+
+    /* check flag is user spase or kernel spase */
+    if (flag == USER_SPASE) {
+        SPI_DEV_DEBUG("user space read, buf: %p, offset: %lld, read count %lu.\n",
+            buf, *offset, count);
+        if (copy_to_user(buf, val, read_len)) {
+            SPI_DEV_ERROR("copy_to_user failed.\n");
+            return -EFAULT;
+        }
+    } else {
+        SPI_DEV_DEBUG("kernel space read, buf: %p, offset: %lld, read count %lu.\n",
+            buf, *offset, count);
+        memcpy(buf, val, read_len);
+    }
+
+    *offset += read_len;
+    ret = read_len;
+    return ret;
+}
+
+static ssize_t spi_dev_read_user(struct file *file, char __user *buf, size_t count, loff_t *offset)
+{
+    int ret;
+
+    SPI_DEV_DEBUG("spi_dev_read_user, file: %p, count: %lu, offset: %lld\n",
+        file, count, *offset);
+    ret = spi_dev_read(file, buf, count, offset, USER_SPASE);
+    return ret;
+}
+
+static ssize_t spi_dev_read_iter(struct kiocb *iocb, struct iov_iter *to)
+{
+    int ret;
+
+    SPI_DEV_DEBUG("spi_dev_read_iter, file: %p, count: %lu, offset: %lld\n",
+        iocb->ki_filp, to->count, iocb->ki_pos);
+    ret = spi_dev_read(iocb->ki_filp, to->kvec->iov_base, to->count, &iocb->ki_pos, KERNEL_SPASE);
+    return ret;
+}
+
+static ssize_t spi_dev_write(struct file *file, const char __user *buf,
+                   size_t count, loff_t *offset, int flag)
+{
+    u8 val[MAX_RW_LEN];
+    int write_len;
+    struct spi_dev_info *spi_dev;
+
+    spi_dev = file->private_data;
+    if (spi_dev == NULL) {
+        SPI_DEV_ERROR("get write private_data error.\n");
+        return -EINVAL;
+    }
+
+    if (count == 0) {
+        SPI_DEV_ERROR("Invalid params, write count is 0.\n");
+        return -EINVAL;
+    }
+
+    if (count > sizeof(val)) {
+        SPI_DEV_DEBUG("write count %lu exceed max %lu.\n", count, sizeof(val));
+        count = sizeof(val);
+    }
+
+    mem_clear(val, sizeof(val));
+    /* check flag is user spase or kernel spase */
+    if (flag == USER_SPASE) {
+        SPI_DEV_DEBUG("user space write, buf: %p, offset: %lld, write count %lu.\n",
+            buf, *offset, count);
+        if (copy_from_user(val, buf, count)) {
+            SPI_DEV_ERROR("copy_from_user failed.\n");
+            return -EFAULT;
+        }
+    } else {
+        SPI_DEV_DEBUG("kernel space write, buf: %p, offset: %lld, write count %lu.\n",
+            buf, *offset, count);
+        memcpy(val, buf, count);
+    }
+
+    write_len = device_write(spi_dev, (uint32_t)*offset, val, count);
+    if (write_len < 0) {
+        SPI_DEV_ERROR("spi dev write failed, dev name:%s, offset:0x%llx, len:%lu.\n",
+            spi_dev->name, *offset, count);
+        return write_len;
+    }
+
+    *offset += write_len;
+    return write_len;
+}
+
+static ssize_t spi_dev_write_user(struct file *file, const char __user *buf, size_t count, loff_t *offset)
+{
+    int ret;
+
+    SPI_DEV_DEBUG("spi_dev_write_user, file: %p, count: %lu, offset: %lld\n",
+        file, count, *offset);
+    ret = spi_dev_write(file, buf, count, offset, USER_SPASE);
+    return ret;
+}
+
+static ssize_t spi_dev_write_iter(struct kiocb *iocb, struct iov_iter *from)
+{
+    int ret;
+
+    SPI_DEV_DEBUG("spi_dev_write_iter, file: %p, count: %lu, offset: %lld\n",
+        iocb->ki_filp, from->count, iocb->ki_pos);
+    ret = spi_dev_write(iocb->ki_filp, from->kvec->iov_base, from->count, &iocb->ki_pos, KERNEL_SPASE);
+    return ret;
+}
+
+static loff_t spi_dev_llseek(struct file *file, loff_t offset, int origin)
+{
+    loff_t ret = 0;
+    struct spi_dev_info *spi_dev;
+
+    spi_dev = file->private_data;
+    if (spi_dev == NULL) {
+        SPI_DEV_ERROR("spi_dev is NULL, llseek failed.\n");
+        return -EINVAL;
+    }
+
+    switch (origin) {
+    case SEEK_SET:
+        if (offset < 0) {
+            SPI_DEV_ERROR("SEEK_SET, offset:%lld, invalid.\n", offset);
+            ret = -EINVAL;
+            break;
+        }
+        if (offset > spi_dev->spi_len) {
+            SPI_DEV_ERROR("SEEK_SET out of range, offset:%lld, i2c_len:0x%x.\n",
+                offset, spi_dev->spi_len);
+            ret = - EINVAL;
+            break;
+        }
+        file->f_pos = offset;
+        ret = file->f_pos;
+        break;
+    case SEEK_CUR:
+        if (((file->f_pos + offset) > spi_dev->spi_len) || ((file->f_pos + offset) < 0)) {
+            SPI_DEV_ERROR("SEEK_CUR out of range, f_ops:%lld, offset:%lld.\n",
+                 file->f_pos, offset);
+        }
+        file->f_pos += offset;
+        ret = file->f_pos;
+        break;
+    default:
+        SPI_DEV_ERROR("unsupport llseek type:%d.\n", origin);
+        ret = -EINVAL;
+        break;
+    }
+    return ret;
+}
+
+static const struct file_operations spi_dev_fops = {
+    .owner          = THIS_MODULE,
+    .llseek         = spi_dev_llseek,
+    .read           = spi_dev_read_user,
+    .write          = spi_dev_write_user,
+    .read_iter      = spi_dev_read_iter,
+    .write_iter     = spi_dev_write_iter,
+    .unlocked_ioctl = spi_dev_ioctl,
+    .open           = spi_dev_open,
+    .release        = spi_dev_release,
+};
+
+static struct spi_dev_info * dev_match(const char *path)
+{
+    struct spi_dev_info * spi_dev;
+    char dev_name[MAX_NAME_SIZE];
+    int i;
+    for (i = 0; i < MAX_SPI_DEV_NUM; i++) {
+        if (spi_dev_arry[ i ] == NULL) {
+            continue;
+        }
+        spi_dev = spi_dev_arry[ i ];
+        snprintf(dev_name, MAX_NAME_SIZE,"/dev/%s", spi_dev->name);
+        if (!strcmp(path, dev_name)) {
+            SPI_DEV_DEBUG("get dev_name = %s, minor = %d\n", dev_name, i);
+            return spi_dev;
+        }
+    }
+
+    return NULL;
+}
+
+int spi_device_func_read(const char *path, uint32_t offset, uint8_t *buf, size_t count)
+{
+    struct spi_dev_info *spi_dev = NULL;
+    int ret;
+
+    if(path == NULL){
+        SPI_DEV_ERROR("path NULL");
+        return -EINVAL;
+    }
+
+    if(buf == NULL){
+        SPI_DEV_ERROR("buf NULL");
+        return -EINVAL;
+    }
+
+    if (count > MAX_RW_LEN) {
+        SPI_DEV_ERROR("read count %lu, beyond max:%d.\n", count, MAX_RW_LEN);
+        return -EINVAL;
+    }
+
+    spi_dev = dev_match(path);
+    if (spi_dev == NULL) {
+        SPI_DEV_ERROR("spi_dev match failed. dev path = %s", path);
+        return -EINVAL;
+    }
+
+    ret = device_read(spi_dev, offset, buf, count);
+    if (ret < 0) {
+        SPI_DEV_ERROR("spi dev read failed, dev name:%s, offset:0x%x, len:%lu.\n",
+            spi_dev->name, offset, count);
+        return -EINVAL;
+    }
+
+    return count;
+}
+EXPORT_SYMBOL(spi_device_func_read);
+
+int spi_device_func_write(const char *path, uint32_t offset, uint8_t *buf, size_t count)
+{
+    struct spi_dev_info *spi_dev = NULL;
+    int ret;
+
+    if(path == NULL){
+        SPI_DEV_ERROR("path NULL");
+        return -EINVAL;
+    }
+
+    if(buf == NULL){
+        SPI_DEV_ERROR("buf NULL");
+        return -EINVAL;
+    }
+
+    if (count > MAX_RW_LEN) {
+        SPI_DEV_ERROR("write count %lu, beyond max:%d.\n", count, MAX_RW_LEN);
+        return -EINVAL;
+    }
+
+    spi_dev = dev_match(path);
+    if (spi_dev == NULL) {
+        SPI_DEV_ERROR("i2c_dev match failed. dev path = %s", path);
+        return -EINVAL;
+    }
+
+    ret = device_write (spi_dev, offset, buf, count);
+    if (ret < 0) {
+        SPI_DEV_ERROR("i2c dev write failed, dev name:%s, offset:0x%x, len:%lu.\n",
+            spi_dev->name, offset, count);
+        return -EINVAL;
+    }
+
+    return count;
+}
+EXPORT_SYMBOL(spi_device_func_write);
+
+static int spi_dev_probe(struct spi_device *spi)
+{
+    int ret;
+    struct spi_dev_info *spi_dev;
+    struct miscdevice *misc;
+    spi_dev_device_t *spi_dev_device;
+
+    spi_dev = devm_kzalloc(&spi->dev, sizeof(struct spi_dev_info), GFP_KERNEL);
+    if (!spi_dev) {
+        dev_err(&spi->dev, "devm_kzalloc error. \n");
+        return -ENOMEM;
+    }
+
+    spi_set_drvdata(spi, spi_dev);
+    spi_dev->spi_device = spi;
+
+    if (spi->dev.of_node) {
+
+        ret = 0;
+        ret += of_property_read_string(spi->dev.of_node, "spi_dev_name", &spi_dev->name);
+        ret += of_property_read_u32(spi->dev.of_node, "data_bus_width", &spi_dev->data_bus_width);
+        ret += of_property_read_u32(spi->dev.of_node, "addr_bus_width", &spi_dev->addr_bus_width);
+        ret += of_property_read_u32(spi->dev.of_node, "per_rd_len", &spi_dev->per_rd_len);
+        ret += of_property_read_u32(spi->dev.of_node, "per_wr_len", &spi_dev->per_wr_len);
+        ret += of_property_read_u32(spi->dev.of_node, "spi_len", &spi_dev->spi_len);
+        if (ret != 0) {
+            dev_err(&spi->dev, "dts config error.ret:%d.\n", ret);
+            return -ENXIO;
+        }
+    } else {
+        if (spi->dev.platform_data == NULL) {
+            dev_err(&spi->dev, "Failed to get platform data config.\n");
+            return -ENXIO;
+        }
+        spi_dev_device = spi->dev.platform_data;
+        spi_dev->name = spi_dev_device->spi_dev_name;
+        spi_dev->data_bus_width = spi_dev_device->data_bus_width;
+        spi_dev->addr_bus_width = spi_dev_device->addr_bus_width;
+        spi_dev->per_rd_len = spi_dev_device->per_rd_len;
+        spi_dev->per_wr_len = spi_dev_device->per_wr_len;
+        spi_dev->spi_len = spi_dev_device->spi_len;
+    }
+
+    if ((spi_dev->per_rd_len & (spi_dev->data_bus_width - 1))
+            || (spi_dev->per_wr_len & (spi_dev->data_bus_width - 1))) {
+        dev_err(&spi->dev, "Invalid config per_rd_len [%u] per_wr_len [%u] data bus_width [%u], addr bus width [%u].\n",
+            spi_dev->per_rd_len, spi_dev->per_wr_len, spi_dev->data_bus_width, spi_dev->addr_bus_width);
+        return -ENXIO;
+    }
+
+    misc = &spi_dev->misc;
+    misc->minor = MISC_DYNAMIC_MINOR;
+    misc->name = spi_dev->name;
+    misc->fops = &spi_dev_fops;
+    misc->mode = 0666;
+    if (misc_register(misc) != 0) {
+        dev_err(&spi->dev, "register %s faild.\n", misc->name);
+        return -ENXIO;
+    }
+
+    if (misc->minor >= MAX_SPI_DEV_NUM) {
+        dev_err(&spi->dev, "minor number beyond the limit! is %d.\n", misc->minor);
+        misc_deregister(misc);
+        return -ENXIO;
+    }
+    spi_dev_arry[misc->minor] = spi_dev;
+
+    dev_info(&spi->dev, "register %u data_bus_width %u addr_bus_witdh 0x%x spi_len device %s with %u per_rd_len %u per_wr_len success.\n",
+        spi_dev->data_bus_width, spi_dev->addr_bus_width, spi_dev->spi_len, spi_dev->name, spi_dev->per_rd_len, spi_dev->per_wr_len);
+
+    return 0;
+}
+
+static void spi_dev_remove(struct spi_device *spi)
+{
+    int i;
+
+    for (i = 0; i < MAX_SPI_DEV_NUM; i++) {
+        if (spi_dev_arry[i] != NULL) {
+            misc_deregister(&spi_dev_arry[i]->misc);
+            spi_dev_arry[i] = NULL;
+        }
+    }
+    return;
+}
+
+static const struct of_device_id spi_dev_of_match[] = {
+    { .compatible = "wb-spi-dev" },
+    { },
+};
+
+MODULE_DEVICE_TABLE(of, spi_dev_of_match);
+
+static struct spi_driver spi_dev_driver = {
+    .driver = {
+        .name = "wb-spi-dev",
+        .of_match_table = of_match_ptr(spi_dev_of_match),
+    },
+    .probe      = spi_dev_probe,
+    .remove     = spi_dev_remove,
+};
+
+module_spi_driver(spi_dev_driver);
+
+MODULE_DESCRIPTION("spi dev driver");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spi_dev.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spi_dev.h
new file mode 100644
index 000000000..fed5237e3
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spi_dev.h
@@ -0,0 +1,17 @@
+#ifndef __WB_SPI_DEV_H__
+#define __WB_SPI_DEV_H__
+#include <linux/string.h>
+
+#define mem_clear(data, size) memset((data), 0, (size))
+#define SPI_DEV_NAME_MAX_LEN (64)
+
+typedef struct spi_dev_device_s {
+    char spi_dev_name[SPI_DEV_NAME_MAX_LEN];
+    uint32_t data_bus_width;
+    uint32_t addr_bus_width;
+    uint32_t per_rd_len;
+    uint32_t per_wr_len;
+    uint32_t spi_len;
+} spi_dev_device_t;
+
+#endif
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spi_gpio_device.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spi_gpio_device.c
new file mode 100644
index 000000000..b073dac08
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spi_gpio_device.c
@@ -0,0 +1,163 @@
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/gpio.h>
+#include <linux/gpio/machine.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/spi/spi.h>
+#include <linux/spi/spi_gpio.h>
+
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/partitions.h>
+#include <linux/spi/eeprom.h>
+#include <linux/spi/flash.h>
+#include <linux/string.h>
+
+#define mem_clear(data, size) memset((data), 0, (size))
+
+#define DEFAULT_GPIO_SCK        (67)
+#define DEFAULT_GPIO_MISO       (32)
+#define DEFAULT_GPIO_MOSI       (65)
+#define DEFAULT_GPIO_CS         (6)
+#define DEFAULT_SPI_BUS         (0)
+
+static int sck = DEFAULT_GPIO_SCK;
+module_param(sck, int, S_IRUGO | S_IWUSR);
+
+static int miso = DEFAULT_GPIO_MISO;
+module_param(miso, int, S_IRUGO | S_IWUSR);
+
+static int mosi = DEFAULT_GPIO_MOSI;
+module_param(mosi, int, S_IRUGO | S_IWUSR);
+
+static int cs = DEFAULT_GPIO_CS;
+module_param(cs, int, S_IRUGO | S_IWUSR);
+
+static int bus = DEFAULT_SPI_BUS;
+module_param(bus, int, S_IRUGO | S_IWUSR);
+
+static int g_wb_spi_gpio_device_debug = 0;
+static int g_wb_spi_gpio_device_error = 0;
+
+module_param(g_wb_spi_gpio_device_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_spi_gpio_device_error, int, S_IRUGO | S_IWUSR);
+
+static char gpiod_lookup_table_devid[64];
+
+static char *gpio_chip_name = NULL;
+module_param(gpio_chip_name, charp, 0644);
+MODULE_PARM_DESC(str_var, "A string variable for GPIO controller");
+
+#define WB_SPI_GPIO_DEVICE_VERBOSE(fmt, args...) do {                                        \
+    if (g_wb_spi_gpio_device_debug) { \
+        printk(KERN_INFO "[WB_SPI_GPIO_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define WB_SPI_GPIO_DEVICE_ERROR(fmt, args...) do {                                        \
+    if (g_wb_spi_gpio_device_error) { \
+        printk(KERN_ERR "[WB_SPI_GPIO_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+static struct gpiod_lookup_table wb_spi_gpio_table = {
+    .table          = {
+        GPIO_LOOKUP("wb_gpio_d1500", DEFAULT_GPIO_SCK,
+                "sck", GPIO_ACTIVE_HIGH),
+        GPIO_LOOKUP("wb_gpio_d1500", DEFAULT_GPIO_MOSI,
+                "mosi", GPIO_ACTIVE_HIGH),
+        GPIO_LOOKUP("wb_gpio_d1500", DEFAULT_GPIO_MISO,
+                "miso", GPIO_ACTIVE_HIGH),
+        GPIO_LOOKUP("wb_gpio_d1500", DEFAULT_GPIO_CS,
+                "cs", GPIO_ACTIVE_HIGH),
+        { },
+    },
+};
+
+static struct spi_gpio_platform_data spi_pdata = {
+    .num_chipselect = 1,
+};
+
+static void spi_gpio_release(struct device *dev)
+{
+    return;
+}
+
+static struct platform_device wb_spi_gpio_device = {
+    .name           = "wb_spi_gpio",
+    .num_resources  = 0,
+    .id             = -1,
+
+    .dev = {
+        .platform_data = &spi_pdata,
+        .release = spi_gpio_release,
+    }
+};
+
+static void wb_spi_gpio_table_devid_name_set(void) {
+    int size;
+
+    size = sizeof(gpiod_lookup_table_devid);
+    wb_spi_gpio_device.id = bus;
+
+    mem_clear(gpiod_lookup_table_devid, size);
+    switch (bus) {
+    case PLATFORM_DEVID_NONE:
+        snprintf(gpiod_lookup_table_devid, size, "%s", wb_spi_gpio_device.name);
+        break;
+    case PLATFORM_DEVID_AUTO:
+        snprintf(gpiod_lookup_table_devid, size, "%s.%d.auto", wb_spi_gpio_device.name, bus);
+        break;
+    default:
+        snprintf(gpiod_lookup_table_devid, size, "%s.%d", wb_spi_gpio_device.name, bus);
+        break;
+    }
+
+    wb_spi_gpio_table.dev_id = gpiod_lookup_table_devid;
+    return ;
+}
+static int __init wb_spi_gpio_device_init(void)
+{
+    int err;
+    struct gpiod_lookup *p;
+
+    WB_SPI_GPIO_DEVICE_VERBOSE("enter!\n");
+    wb_spi_gpio_table.table[0].chip_hwnum = sck;
+    wb_spi_gpio_table.table[1].chip_hwnum = mosi;
+    wb_spi_gpio_table.table[2].chip_hwnum = miso;
+    wb_spi_gpio_table.table[3].chip_hwnum = cs;
+    if (gpio_chip_name) {
+        wb_spi_gpio_table.table[0].key = gpio_chip_name;
+        wb_spi_gpio_table.table[1].key = gpio_chip_name;
+        wb_spi_gpio_table.table[2].key = gpio_chip_name;
+        wb_spi_gpio_table.table[3].key = gpio_chip_name;
+    }
+    wb_spi_gpio_table_devid_name_set();
+    WB_SPI_GPIO_DEVICE_VERBOSE("spi gpi device table bus[%d] dev id[%s]\n", bus, wb_spi_gpio_table.dev_id);
+    for (p = &wb_spi_gpio_table.table[0]; p->key; p++) {
+        WB_SPI_GPIO_DEVICE_VERBOSE("con_id:%s gpio:%d\n", p->con_id, p->chip_hwnum);
+    }
+
+    gpiod_add_lookup_table(&wb_spi_gpio_table);
+    err = platform_device_register(&wb_spi_gpio_device);
+    if (err < 0) {
+        printk(KERN_ERR "register spi gpio device fail(%d). \n", err);
+        gpiod_remove_lookup_table(&wb_spi_gpio_table);
+        return -1;
+    }
+
+    return 0;
+}
+
+static void __exit wb_spi_gpio_device_exit(void)
+{
+    WB_SPI_GPIO_DEVICE_VERBOSE("enter!\n");
+    platform_device_unregister(&wb_spi_gpio_device);
+    gpiod_remove_lookup_table(&wb_spi_gpio_table);
+}
+
+module_init(wb_spi_gpio_device_init);
+module_exit(wb_spi_gpio_device_exit);
+MODULE_DESCRIPTION("SPI GPIO Devices");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spi_ocores.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spi_ocores.c
new file mode 100644
index 000000000..5cf3538d8
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spi_ocores.c
@@ -0,0 +1,1039 @@
+/*
+ * wb_spi_ocores.c
+ * ko to create ocores spi adapter
+ */
+
+#include <linux/clk.h>
+#include <linux/delay.h>
+#include <linux/err.h>
+#include <linux/interrupt.h>
+#include <linux/io.h>
+#include <linux/platform_device.h>
+#include <linux/spi/spi.h>
+#include <linux/spi/spi_bitbang.h>
+#include <linux/module.h>
+#include <linux/jiffies.h>
+#include <linux/wait.h>
+#include <linux/of_platform.h>
+#include <linux/of.h>
+#include <linux/fs.h>
+#include <linux/uaccess.h>
+#include <linux/uio.h>
+
+#include "wb_spi_ocores.h"
+
+#define SPIOC_WAIT_SCH        (5)
+#define SPIOC_CONF            (0x00)
+#define SPIOC_LSBF            BIT(0)    /* 0:MSB 1:LSB */
+#define SPIOC_IDLE_LOW        BIT(1)
+#define SPIOC_INTREN          BIT(2)    /* 0:enable 1:disabel */
+#define SPIOC_DIV_MASK        (0xf0)
+#define SPIOC_MAX_DIV         (0x0E)
+#define SPIOC_DIV(div)        (((div) & 0x0f) << 4)
+
+#define SPIOC_STS             (0x01)
+#define SPIOC_INTR_STS        BIT(0)
+#define SPIOC_BUSY_STS        BIT(1)
+#define SPIOC_RXNUM_SHIFT     (4)
+#define SPIOC_RXNUM_MASK      (0xf << SPIOC_RXNUM_SHIFT)
+/* Just for read */
+#define SPIOC_RXNUM(reg)      (((reg) & SPIOC_RXNUM_MASK) >> SPIOC_RXNUM_SHIFT )
+
+#define SPIOC_TXTOT_NUM       (0x02)
+#define SPIOC_TXNUM(reg)      ((reg) & 0x0f)
+#define SPIOC_TOTNUM(reg)     (((reg) & 0x0f) << 4)
+
+#define SPIOC_TXCTL           (0x03)
+#define SPIOC_CSLV            BIT(0) /* 0:Deassert SPICS 1:Laeve SPICS */
+#define SPIOC_TRSTART         BIT(1)
+#define SPIOC_CSID_SHIFT      (5)
+#define SPIOC_CSID_MASK       (0x7 << SPIOC_CSID_SHIFT)
+/* Just for write */
+#define SPIOC_CSID(id)        (((id) << SPIOC_CSID_SHIFT) & SPIOC_CSID_MASK)
+
+/* Just single byte */
+#define SPIOC_RX(i)           ((0x4) + i)
+#define SPIOC_TX(i)           ((0x4) + i)
+
+#define SPIOC_MAX_LEN         ((unsigned int)8)
+#define SPIOC_TXRX_MAX_LEN    ((unsigned int)7)
+
+#define MODEBITS              (SPI_CPHA |SPI_CPOL | SPI_LSB_FIRST |SPI_CS_HIGH)
+
+#define REG_IO_WIDTH_1        (1)
+#define REG_IO_WIDTH_2        (2)
+#define REG_IO_WIDTH_4        (4)
+
+#define SYMBOL_I2C_DEV_MODE   (1)
+#define FILE_MODE             (2)
+#define SYMBOL_PCIE_DEV_MODE  (3)
+#define SYMBOL_IO_DEV_MODE    (4)
+
+int g_spi_oc_debug = 0;
+int g_spi_oc_error = 0;
+
+module_param(g_spi_oc_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_spi_oc_error, int, S_IRUGO | S_IWUSR);
+
+#define SPI_OC_VERBOSE(fmt, args...) do {                                        \
+    if (g_spi_oc_debug) { \
+        printk(KERN_INFO "[OC_SPI_BUS][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define SPI_OC_ERROR(fmt, args...) do {                                        \
+    if (g_spi_oc_error) { \
+        printk(KERN_ERR "[OC_SPI_BUS][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+struct spioc {
+    /* bitbang has to be first */
+    struct spi_bitbang bitbang;
+    int irq;
+    struct completion done;
+    unsigned int reamin_len;
+    unsigned int cur_pos;
+    unsigned int cur_len;
+    const u8 *txp;
+    u8 *rxp;
+    u8 chip_select;
+    void (*setreg)(struct spioc *spioc, int reg, u32 value);
+    u32 (*getreg)(struct spioc *spioc, int reg);
+    uint32_t bus_num;
+    const char *dev_name;
+    uint32_t reg_access_mode;
+    uint32_t base_addr;
+    uint32_t reg_shift;
+    uint32_t reg_io_width;
+    uint32_t num_chipselect;
+    uint32_t freq;
+    uint32_t big_endian;
+    struct device *dev;
+    int transfer_busy_flag;
+};
+
+extern int i2c_device_func_write(const char *path, uint32_t offset, uint8_t *buf, size_t count);
+extern int i2c_device_func_read(const char *path, uint32_t offset, uint8_t *buf, size_t count);
+extern int pcie_device_func_read(const char *path, uint32_t offset, uint8_t *buf, size_t count);
+extern int pcie_device_func_write(const char *path, uint32_t offset, uint8_t *buf, size_t count);
+extern int io_device_func_read(const char *path, uint32_t offset, uint8_t *buf, size_t count);
+extern int io_device_func_write(const char *path, uint32_t offset, uint8_t *buf, size_t count);
+
+static int oc_spi_file_read(const char *path, uint32_t pos, uint8_t *val, size_t size)
+{
+    int ret;
+    struct file *filp;
+    loff_t tmp_pos;
+
+    struct kvec iov = {
+        .iov_base = val,
+        .iov_len = min_t(size_t, size, MAX_RW_COUNT),
+    };
+    struct iov_iter iter;
+
+    filp = filp_open(path, O_RDONLY, 0);
+    if (IS_ERR(filp)) {
+        SPI_OC_ERROR("read open failed errno = %ld\r\n", -PTR_ERR(filp));
+        filp = NULL;
+        goto exit;
+    }
+
+    tmp_pos = (loff_t)pos;
+    iov_iter_kvec(&iter, ITER_DEST, &iov, 1, iov.iov_len);
+    ret = vfs_iter_read(filp, &iter, &tmp_pos, 0);
+    if (ret < 0) {
+        SPI_OC_ERROR("vfs_iter_read failed, path=%s, addr=%d, size=%ld, ret=%d\r\n", path, pos, size, ret);
+        goto exit;
+    }
+
+    filp_close(filp, NULL);
+
+    return ret;
+
+exit:
+    if (filp != NULL) {
+        filp_close(filp, NULL);
+    }
+
+    return -1;
+}
+
+static int oc_spi_file_write(const char *path, uint32_t pos, uint8_t *val, size_t size)
+{
+    int ret;
+    struct file *filp;
+    loff_t tmp_pos;
+
+    struct kvec iov = {
+        .iov_base = val,
+        .iov_len = min_t(size_t, size, MAX_RW_COUNT),
+    };
+    struct iov_iter iter;
+
+    filp = filp_open(path, O_RDWR, 777);
+    if (IS_ERR(filp)) {
+        SPI_OC_ERROR("write open failed errno = %ld\r\n", -PTR_ERR(filp));
+        filp = NULL;
+        goto exit;
+    }
+
+    tmp_pos = (loff_t)pos;
+    iov_iter_kvec(&iter, ITER_SOURCE, &iov, 1, iov.iov_len);
+    ret = vfs_iter_write(filp, &iter, &tmp_pos, 0);
+    if (ret < 0) {
+        SPI_OC_ERROR("vfs_iter_write failed, path=%s, addr=%d, size=%ld, ret=%d\r\n", path, pos, size, ret);
+        goto exit;
+    }
+
+    vfs_fsync(filp, 1);
+    filp_close(filp, NULL);
+
+    return ret;
+
+exit:
+    if (filp != NULL) {
+        filp_close(filp, NULL);
+    }
+
+    return -1;
+}
+
+static int oc_spi_reg_write(struct spioc *spioc, uint32_t pos, uint8_t *val, size_t size)
+{
+    int ret;
+
+    switch (spioc->reg_access_mode) {
+    case SYMBOL_I2C_DEV_MODE:
+        ret = i2c_device_func_write(spioc->dev_name, pos, val, size);
+        break;
+    case FILE_MODE:
+        ret = oc_spi_file_write(spioc->dev_name, pos, val, size);
+        break;
+    case SYMBOL_PCIE_DEV_MODE:
+        ret = pcie_device_func_write(spioc->dev_name, pos, val, size);
+        break;
+    case SYMBOL_IO_DEV_MODE:
+        ret = io_device_func_write(spioc->dev_name, pos, val, size);
+        break;
+    default:
+        SPI_OC_ERROR("err func_mode, write failed.\n");
+        return -EINVAL;
+    }
+
+    return ret;
+}
+
+static int oc_spi_reg_read(struct spioc *spioc, uint32_t pos, uint8_t *val, size_t size)
+{
+    int ret;
+
+    switch (spioc->reg_access_mode) {
+    case SYMBOL_I2C_DEV_MODE:
+        ret = i2c_device_func_read(spioc->dev_name, pos, val, size);
+        break;
+    case FILE_MODE:
+        ret = oc_spi_file_read(spioc->dev_name, pos, val, size);
+        break;
+    case SYMBOL_PCIE_DEV_MODE:
+        ret = pcie_device_func_read(spioc->dev_name, pos, val, size);
+        break;
+    case SYMBOL_IO_DEV_MODE:
+        ret = io_device_func_read(spioc->dev_name, pos, val, size);
+        break;
+    default:
+        SPI_OC_ERROR("err func_mode, read failed.\n");
+        return -EINVAL;
+    }
+
+    return ret;
+}
+
+static void oc_spi_setreg_8(struct spioc *spioc, int reg, u32 value)
+{
+    u8 buf_tmp[REG_IO_WIDTH_1];
+    u32 pos;
+
+    pos = spioc->base_addr + (reg << spioc->reg_shift);
+    SPI_OC_VERBOSE("path:%s, access mode:%d, pos:0x%x, value0x%x.\n",
+        spioc->dev_name, spioc->reg_access_mode, pos, value);
+
+    buf_tmp[0] = (value & 0Xff);
+    oc_spi_reg_write(spioc, pos, buf_tmp, REG_IO_WIDTH_1);
+    return;
+}
+
+static void oc_spi_setreg_16(struct spioc *spioc, int reg, u32 value)
+{
+    u8 buf_tmp[REG_IO_WIDTH_2];
+    u32 pos;
+
+    pos = spioc->base_addr + (reg << spioc->reg_shift);
+    SPI_OC_VERBOSE("path:%s, access mode:%d, pos:0x%x, value0x%x.\n",
+        spioc->dev_name, spioc->reg_access_mode, pos, value);
+
+    buf_tmp[0] = (value & 0Xff);
+    buf_tmp[1] = (value >> 8) & 0xff;
+    oc_spi_reg_write(spioc, pos, buf_tmp, REG_IO_WIDTH_2);
+    return;
+}
+
+static void oc_spi_setreg_32(struct spioc *spioc, int reg, u32 value)
+{
+    u8 buf_tmp[REG_IO_WIDTH_4];
+    u32 pos;
+
+    pos = spioc->base_addr + (reg << spioc->reg_shift);
+    SPI_OC_VERBOSE("path:%s, access mode:%d, pos:0x%x, value0x%x.\n",
+        spioc->dev_name, spioc->reg_access_mode, pos, value);
+
+    buf_tmp[0] = (value & 0xff);
+    buf_tmp[1] = (value >> 8) & 0xff;
+    buf_tmp[2] = (value >> 16) & 0xff;
+    buf_tmp[3] = (value >> 24) & 0xff;
+
+    oc_spi_reg_write(spioc, pos, buf_tmp, REG_IO_WIDTH_4);
+    return;
+}
+
+static void oc_spi_setreg_16be(struct spioc *spioc, int reg, u32 value)
+{
+    u8 buf_tmp[REG_IO_WIDTH_2];
+    u32 pos;
+
+    pos = spioc->base_addr + (reg << spioc->reg_shift);
+    SPI_OC_VERBOSE("path:%s, access mode:%d, pos:0x%x, value0x%x.\n",
+        spioc->dev_name, spioc->reg_access_mode, pos, value);
+
+    buf_tmp[0] = (value >> 8) & 0xff;
+    buf_tmp[1] = (value & 0Xff);
+    oc_spi_reg_write(spioc, pos, buf_tmp, REG_IO_WIDTH_2);
+    return;
+}
+
+static void oc_spi_setreg_32be(struct spioc *spioc, int reg, u32 value)
+{
+    u8 buf_tmp[REG_IO_WIDTH_4];
+    u32 pos;
+
+    pos = spioc->base_addr + (reg << spioc->reg_shift);
+    SPI_OC_VERBOSE("path:%s, access mode:%d, pos:0x%x, value0x%x.\n",
+        spioc->dev_name, spioc->reg_access_mode, pos, value);
+
+    buf_tmp[0] = (value >> 24) & 0xff;
+    buf_tmp[1] = (value >> 16) & 0xff;
+    buf_tmp[2] = (value >> 8) & 0xff;
+    buf_tmp[3] = (value & 0xff);
+    oc_spi_reg_write(spioc, pos, buf_tmp, REG_IO_WIDTH_4);
+    return;
+}
+
+static inline u32 oc_spi_getreg_8(struct spioc *spioc, int reg)
+{
+    u8 buf_tmp[REG_IO_WIDTH_1];
+    u32 value, pos;
+
+    pos = spioc->base_addr + (reg << spioc->reg_shift);
+    oc_spi_reg_read(spioc, pos, buf_tmp, REG_IO_WIDTH_1);
+    value = buf_tmp[0];
+
+    SPI_OC_VERBOSE("path:%s, access mode:%d, pos:0x%x, value0x%x.\n",
+        spioc->dev_name, spioc->reg_access_mode, pos, value);
+
+    return value;
+}
+
+static inline u32 oc_spi_getreg_16(struct spioc *spioc, int reg)
+{
+    u8 buf_tmp[REG_IO_WIDTH_2];
+    u32 value, pos;
+    int i;
+
+    pos = spioc->base_addr + (reg << spioc->reg_shift);
+    mem_clear(buf_tmp, sizeof(buf_tmp));
+    oc_spi_reg_read(spioc, pos, buf_tmp, REG_IO_WIDTH_2);
+
+    value = 0;
+    for (i = 0; i < REG_IO_WIDTH_2 ; i++) {
+        value |= buf_tmp[i] << (8 * i);
+    }
+
+    SPI_OC_VERBOSE("path:%s, access mode:%d, pos:0x%x, value0x%x.\n",
+        spioc->dev_name, spioc->reg_access_mode, pos, value);
+    return value;
+}
+
+static inline u32 oc_spi_getreg_32(struct spioc *spioc, int reg)
+{
+    u8 buf_tmp[REG_IO_WIDTH_4];
+    u32 value, pos;
+    int i;
+
+    pos = spioc->base_addr + (reg << spioc->reg_shift);
+    mem_clear(buf_tmp, sizeof(buf_tmp));
+    oc_spi_reg_read(spioc, pos, buf_tmp, REG_IO_WIDTH_4);
+
+    value = 0;
+    for (i = 0; i < REG_IO_WIDTH_4 ; i++) {
+        value |= buf_tmp[i] << (8 * i);
+    }
+    SPI_OC_VERBOSE("path:%s, access mode:%d, pos:0x%x, value0x%x.\n",
+        spioc->dev_name, spioc->reg_access_mode, pos, value);
+    return value;
+}
+
+static inline u32 oc_spi_getreg_16be(struct spioc *spioc, int reg)
+{
+    u8 buf_tmp[REG_IO_WIDTH_2];
+    u32 value, pos;
+    int i;
+
+    pos = spioc->base_addr + (reg << spioc->reg_shift);
+
+    mem_clear(buf_tmp, sizeof(buf_tmp));
+    oc_spi_reg_read(spioc, pos, buf_tmp, REG_IO_WIDTH_2);
+
+    value = 0;
+    for (i = 0; i < REG_IO_WIDTH_2 ; i++) {
+        value |= buf_tmp[i] << (8 * (REG_IO_WIDTH_2 -i - 1));
+    }
+
+    SPI_OC_VERBOSE("path:%s, access mode:%d, pos:0x%x, value0x%x.\n",
+        spioc->dev_name, spioc->reg_access_mode, pos, value);
+    return value;
+}
+
+static inline u32 oc_spi_getreg_32be(struct spioc *spioc, int reg)
+{
+    u8 buf_tmp[REG_IO_WIDTH_4];
+    u32 value, pos;
+    int i;
+
+    pos = spioc->base_addr + (reg << spioc->reg_shift);
+
+    mem_clear(buf_tmp, sizeof(buf_tmp));
+    oc_spi_reg_read(spioc, pos, buf_tmp, REG_IO_WIDTH_4);
+
+    value = 0;
+    for (i = 0; i < REG_IO_WIDTH_4 ; i++) {
+        value |= buf_tmp[i] << (8 * (REG_IO_WIDTH_4 -i - 1));
+    }
+
+    SPI_OC_VERBOSE("path:%s, access mode:%d, pos:0x%x, value0x%x.\n",
+        spioc->dev_name, spioc->reg_access_mode, pos, value);
+    return value;
+
+}
+
+static inline void oc_spi_setreg(struct spioc *spioc, int reg, u32 value)
+{
+    spioc->setreg(spioc, reg, value);
+    return;
+}
+
+static inline u32 oc_spi_getreg(struct spioc *spioc, int reg)
+{
+    return spioc->getreg(spioc, reg);
+}
+
+static int spioc_get_clkdiv(struct spioc *spioc, u32 speed)
+{
+    u32 rate, div;
+
+    rate = spioc->freq;
+    SPI_OC_VERBOSE("clk get rate:%u, speed:%u\n", rate, speed);
+    /* fs = fw/((DIV+2)*2) */
+
+    if (speed > (rate / 4)) {
+        div = 0;
+        SPI_OC_VERBOSE("spi device speed[%u] more than a quarter of clk rate[%u].\n",
+            speed, rate);
+        return div;
+    }
+    div = (rate/(2 * speed)) - 2;
+    if (div > SPIOC_MAX_DIV) {
+        SPI_OC_ERROR("Unsupport spi device speed, div:%u.\n", div);
+        return -1;
+    }
+    SPI_OC_VERBOSE("DIV is:0x%x\n", div);
+    return div;
+}
+
+static inline int spioc_wait_trans(struct spioc *spioc, const unsigned long timeout)
+{
+    unsigned long j;
+    unsigned int sch_time;
+    u8 reg;
+
+    j = jiffies + timeout;
+    sch_time = SPIOC_WAIT_SCH;
+    while (1) {
+        reg = oc_spi_getreg(spioc, SPIOC_STS);
+        if (!(reg & SPIOC_BUSY_STS)) {
+            SPI_OC_VERBOSE("wait ok!\n");
+            break;
+        }
+
+        if (time_after(jiffies, j)) {
+            return -ETIMEDOUT;
+        }
+
+        usleep_range(sch_time, sch_time + 1);
+    }
+
+    return 0;
+}
+
+static void spioc_chipselect(struct spi_device *spi, int is_active)
+{
+    struct spioc *spioc;
+    u8 tx_conf;
+    int ret;
+
+    spioc = spi_master_get_devdata(spi->master);
+    spioc->transfer_busy_flag = 0;
+    ret = spioc_wait_trans(spioc, msecs_to_jiffies(100));
+    if (ret < 0) {
+        SPI_OC_ERROR("spi transfer is busy, ret=%d.\n", ret);
+        spioc->transfer_busy_flag = 1;
+        return;
+    }
+    spioc->chip_select = spi->chip_select;
+    SPI_OC_VERBOSE("spioc_chipselect:%u, value:%d.\n", spioc->chip_select, is_active);
+    tx_conf = 0;
+    tx_conf |= SPIOC_CSID(spioc->chip_select);
+    if (is_active) {
+        tx_conf |= SPIOC_CSLV;
+    }
+
+    SPI_OC_VERBOSE("tx_config:[0x%x]\n", tx_conf);
+    oc_spi_setreg(spioc, SPIOC_TXCTL, tx_conf);
+    return;
+}
+
+static void spioc_copy_tx(struct spioc *spioc)
+{
+    const u8 *src;
+    int i;
+
+    if (!spioc->txp) {
+        SPI_OC_ERROR("spioc->txp is NULL.\n");
+        return;
+    }
+
+    src = (u8 *)spioc->txp + spioc->cur_pos;
+    SPI_OC_VERBOSE("current tx len:0x%x, tx pos:[0x%x]\n", spioc->cur_len, spioc->cur_pos);
+
+    for (i = 0; i < spioc->cur_len; i++) {
+        SPI_OC_VERBOSE("write %d, val:[0x%x]\n", i, src[i]);
+        oc_spi_setreg(spioc, SPIOC_TX(i), src[i]);
+    }
+}
+
+static void spioc_copy_rx(struct spioc *spioc)
+{
+    u8 *dest;
+    int i;
+
+    if (!spioc->rxp) {
+        SPI_OC_ERROR("spioc->rxp is NULL.\n");
+        return;
+    }
+
+    dest = (u8 *)spioc->rxp + spioc->cur_pos;
+    SPI_OC_VERBOSE("current rx len:0x%x, rx pos:[0x%x]\n", spioc->cur_len, spioc->cur_pos);
+
+    for (i = 0; i < spioc->cur_len; i++) {
+        dest[i] = oc_spi_getreg(spioc, SPIOC_RX(i));
+        SPI_OC_VERBOSE("read %d, val:[0x%x]\n", i, dest[i]);
+    }
+}
+
+static int spioc_setup_transfer(struct spi_device *spi, struct spi_transfer *transfer)
+{
+    struct spioc *spioc;
+    u8 ctrl;
+    u32 hz;
+    int div;
+
+    spioc = spi_master_get_devdata(spi->master);
+    ctrl = 0;
+
+    if (spi->mode & SPI_LSB_FIRST) {
+        ctrl |= SPIOC_LSBF;
+    }
+
+    if (!(spi->mode & SPI_CPOL)) {
+        ctrl |= SPIOC_IDLE_LOW;
+    }
+
+    if (spioc->irq < 0) {
+
+        ctrl |= SPIOC_INTREN;
+    }
+
+    if (transfer != NULL) {
+        hz = transfer->speed_hz;
+
+        if (hz == 0) {
+            hz = spi->max_speed_hz;
+        }
+    } else {
+        hz = spi->max_speed_hz;
+    }
+
+    if (hz == 0) {
+        SPI_OC_ERROR("Unsupport zero speed.\n");
+        return -EINVAL;
+    }
+
+    div = spioc_get_clkdiv(spioc, hz);
+    if (div < 0) {
+        SPI_OC_ERROR("get div error, div:%d.\n", div);
+        return -EINVAL;
+    }
+    ctrl |= SPIOC_DIV(div);
+
+    SPI_OC_VERBOSE("ctrl:[0x%x].\n", ctrl);
+
+    oc_spi_setreg(spioc, SPIOC_CONF, ctrl);
+    return 0;
+}
+
+static int spioc_spi_setup(struct spi_device *spi)
+{
+    struct spioc *spioc;
+
+    if (!(spi->mode & SPI_CPHA)) {
+        SPI_OC_ERROR("Unsupport spi device mde:0x%x, SPI_CPHA must be 1.\n", spi->mode);
+        return -EINVAL;
+    }
+
+    spioc = spi_master_get_devdata(spi->master);
+    if (spi->chip_select >= spioc->num_chipselect) {
+        SPI_OC_ERROR("Spi device chipselect:%u, more than max chipselect:%u.\n",
+            spi->chip_select, spioc->num_chipselect);
+        return -EINVAL;
+    }
+    SPI_OC_VERBOSE("Support spi device mode:0x%x, chip_select:%u.\n",
+        spi->mode, spi->chip_select);
+    return 0;
+}
+
+static int spioc_transfer_start(struct spioc *spioc)
+{
+    u8 tx_conf;
+    int ret;
+
+    tx_conf = oc_spi_getreg(spioc, SPIOC_TXCTL);
+    tx_conf |= SPIOC_TRSTART;
+
+    SPI_OC_VERBOSE("tx_config:[0x%x]\n", tx_conf);
+    oc_spi_setreg(spioc, SPIOC_TXCTL, tx_conf);
+
+    ret = spioc_wait_trans(spioc, msecs_to_jiffies(100));
+    return ret;
+}
+
+static int spioc_tx_start_one(struct spioc *spioc)
+{
+    unsigned int txlen;
+    u8 txreg;
+    int ret;
+
+    if (!spioc->reamin_len) {
+        SPI_OC_VERBOSE("spioc txlen:[0x0]\n");
+        return 0;
+    }
+
+    spioc->cur_len = spioc->reamin_len > SPIOC_MAX_LEN ? SPIOC_MAX_LEN : spioc->reamin_len;
+
+    txlen = spioc->cur_len;
+    spioc->reamin_len -= txlen;
+    SPI_OC_VERBOSE("txlen:[0x%x], tx len remain:[0x%x]\n", txlen, spioc->reamin_len);
+
+    spioc_copy_tx(spioc);
+
+    /* when we only send, txlen == totlen */
+    txreg = SPIOC_TXNUM(txlen) | SPIOC_TOTNUM(txlen);
+    SPI_OC_VERBOSE("txreg:[0x%x]\n", txreg);
+    oc_spi_setreg(spioc, SPIOC_TXTOT_NUM, txreg);
+
+    ret = spioc_transfer_start(spioc);
+    if (ret) {
+        SPI_OC_ERROR("spioc tx rx poll wait for transfer timeout.\n");
+        return ret;
+    }
+
+    if (spioc->reamin_len) {
+        spioc->cur_pos += txlen;
+        SPI_OC_VERBOSE("cur_txpos:[0x%x]\n", spioc->cur_pos);
+    }
+
+    return 0;
+}
+
+static int spioc_rx_start_one(struct spioc *spioc)
+{
+    unsigned int rxlen;
+    u8 txtnum;
+    int ret;
+
+    if (!spioc->reamin_len) {
+        SPI_OC_VERBOSE("spioc reamin_len:[0x0]\n");
+        return 0;
+    }
+
+    spioc->cur_len = spioc->reamin_len > SPIOC_MAX_LEN ? SPIOC_MAX_LEN : spioc->reamin_len;
+
+    rxlen = spioc->cur_len;
+    spioc->reamin_len -= rxlen;
+    SPI_OC_VERBOSE("rxlen:[0x%x], rx len remain:[0x%x]\n", rxlen, spioc->reamin_len);
+
+    /* when we only receive, rxnum=totnum. txnum=0 */
+    txtnum = SPIOC_TOTNUM(rxlen);
+    SPI_OC_VERBOSE("tx total reg:0x%x\n", txtnum);
+    oc_spi_setreg(spioc, SPIOC_TXTOT_NUM, txtnum);
+
+    ret = spioc_transfer_start(spioc);
+    if (ret) {
+        SPI_OC_ERROR("spioc tx rx poll wait for transfer timeout.\n");
+        return ret;
+    }
+
+    spioc_copy_rx(spioc);
+
+    if (spioc->reamin_len) {
+        spioc->cur_pos += rxlen;
+        SPI_OC_VERBOSE("cur_rxpos:[0x%x]\n", spioc->cur_pos);
+    }
+
+    return 0;
+}
+
+static int spioc_tx_rx_start_one(struct spioc *spioc)
+{
+    unsigned int txlen, total_len;
+    u8 txreg;
+    int ret;
+
+    if (!spioc->reamin_len) {
+        SPI_OC_VERBOSE("spioc reamin_len:[0x0]\n");
+        return 0;
+    }
+
+    spioc->cur_len = spioc->reamin_len > SPIOC_TXRX_MAX_LEN ? SPIOC_TXRX_MAX_LEN : spioc->reamin_len;
+
+    txlen = spioc->cur_len;
+    spioc->reamin_len -= txlen;
+    SPI_OC_VERBOSE("tx len:[0x%x], tx len remain:[0x%x]\n", txlen, spioc->reamin_len);
+
+    spioc_copy_tx(spioc);
+
+    total_len = 2 * txlen;      /* total_len=txlen + rxlen; rxlen=txlen */
+    txreg = SPIOC_TXNUM(txlen) | SPIOC_TOTNUM(total_len);
+    SPI_OC_VERBOSE("txreg:[0x%x]\n", txreg);
+    oc_spi_setreg(spioc, SPIOC_TXTOT_NUM, txreg);
+
+    ret = spioc_transfer_start(spioc);
+    if (ret) {
+        SPI_OC_ERROR("spioc tx rx poll wait for transfer timeout.\n");
+        return ret;
+    }
+
+    spioc_copy_rx(spioc);
+    if (spioc->reamin_len) {
+        spioc->cur_pos += txlen;
+        SPI_OC_VERBOSE("cur_txrx pos:[0x%x]\n", spioc->cur_pos);
+    }
+    return 0;
+}
+
+static int spioc_spi_txrx_bufs(struct spi_device *spi, struct spi_transfer *t)
+{
+    struct spioc *spioc;
+    int ret , len;
+
+    if(!t->len || (!t->tx_buf && !t->rx_buf)) {
+        SPI_OC_ERROR("params error, tx_buf and rx_buf may both NULL, transfer len:0x%x.\n",
+            t->len);
+        return 0;
+    }
+
+    spioc = spi_master_get_devdata(spi->master);
+    if (spioc->transfer_busy_flag) {
+        ret = -EBUSY;
+        goto err;
+    }
+
+    spioc->txp = t->tx_buf;
+    spioc->rxp = t->rx_buf;
+    spioc->reamin_len = t->len;
+    spioc->cur_len = 0;
+    spioc->cur_pos = 0;
+    len = t->len;
+    ret = 0;
+    if (spioc->irq >= 0) {
+        /* use interrupt driven data transfer */
+        if (t->tx_buf && t->rx_buf) {
+            spioc_tx_rx_start_one(spioc);
+            wait_for_completion(&spioc->done);
+        } else if (t->tx_buf) {
+            spioc_tx_start_one(spioc);
+            wait_for_completion(&spioc->done);
+
+        } else {
+            spioc_rx_start_one(spioc);
+            wait_for_completion(&spioc->done);
+        }
+    } else {
+        if (t->tx_buf && t->rx_buf) {
+            SPI_OC_VERBOSE("start tx rx, len:0x%x\n", t->len);
+            while (spioc->reamin_len) {
+                ret = spioc_tx_rx_start_one(spioc);
+                if (ret) {
+                    goto err;
+                }
+            }
+        } else if (t->tx_buf) {
+            SPI_OC_VERBOSE("start tx, txlen:0x%x\n", t->len);
+            while (spioc->reamin_len) {
+                ret = spioc_tx_start_one(spioc);
+                if (ret) {
+                    goto err;
+                }
+            }
+        } else {
+            SPI_OC_VERBOSE("start rx, rxlen:0x%x\n", t->len);
+            while (spioc->reamin_len) {
+                ret = spioc_rx_start_one(spioc);
+                if (ret) {
+                    goto err;
+                }
+            }
+        }
+    }
+    SPI_OC_VERBOSE("return num: 0x%x\n", len);
+    return len;
+err:
+    return ret;
+}
+
+static irqreturn_t spioc_spi_irq(int irq, void *dev)
+{
+    struct spioc *spioc;
+
+    spioc = dev;
+    /* gooooohi, interrupt status bit judgment is not done */
+
+    if (spioc->txp && spioc->rxp) {
+        if (!spioc->reamin_len) {
+            complete(&spioc->done);
+        } else {
+            spioc_tx_rx_start_one(spioc);
+        }
+    } else if (spioc->txp) {
+        if (!spioc->reamin_len) {
+            complete(&spioc->done);
+        } else {
+            spioc_tx_start_one(spioc);
+        }
+    } else if (spioc->rxp){
+        if (!spioc->reamin_len) {
+            complete(&spioc->done);
+        } else {
+            spioc_rx_start_one(spioc);
+        }
+    }
+
+    return IRQ_HANDLED;
+}
+
+static int ocores_spi_config_init(struct spioc *spioc)
+{
+    int ret = 0;
+    struct device *dev;
+    spi_ocores_device_t *spi_ocores_device;
+
+    dev = spioc->dev;
+    if (dev->of_node) {
+        ret += of_property_read_string(dev->of_node, "dev_name", &spioc->dev_name);
+        ret += of_property_read_u32(dev->of_node, "dev_base", &spioc->base_addr);
+        ret += of_property_read_u32(dev->of_node, "reg_shift", &spioc->reg_shift);
+        ret += of_property_read_u32(dev->of_node, "reg_io_width", &spioc->reg_io_width);
+        ret += of_property_read_u32(dev->of_node, "clock-frequency", &spioc->freq);
+        ret += of_property_read_u32(dev->of_node, "reg_access_mode", &spioc->reg_access_mode);
+        ret += of_property_read_u32(dev->of_node, "num_chipselect", &spioc->num_chipselect);
+
+        if (ret != 0) {
+            SPI_OC_ERROR("dts config error, ret:%d.\n", ret);
+            ret = -ENXIO;
+            return ret;
+        }
+    } else {
+        if (spioc->dev->platform_data == NULL) {
+            SPI_OC_ERROR("platform data config error.\n");
+            ret = -ENXIO;
+            return ret;
+        }
+        spi_ocores_device = spioc->dev->platform_data;
+        spioc->bus_num = spi_ocores_device->bus_num;
+        spioc->dev_name = spi_ocores_device->dev_name;
+        spioc->big_endian = spi_ocores_device->big_endian;
+        spioc->base_addr = spi_ocores_device->dev_base;
+        spioc->reg_shift = spi_ocores_device->reg_shift;
+        spioc->reg_io_width = spi_ocores_device->reg_io_width;
+        spioc->freq = spi_ocores_device->clock_frequency;
+        spioc->reg_access_mode = spi_ocores_device->reg_access_mode;
+        spioc->num_chipselect = spi_ocores_device->num_chipselect;
+    }
+
+    SPI_OC_VERBOSE("name:%s, base:0x%x, reg_shift:0x%x, io_width:0x%x, clock-frequency:0x%x.\n",
+        spioc->dev_name, spioc->base_addr, spioc->reg_shift, spioc->reg_io_width, spioc->freq);
+    SPI_OC_VERBOSE("reg access mode:%u, num_chipselect:%u.\n",
+        spioc->reg_access_mode, spioc->num_chipselect);
+    return ret;
+}
+
+static int spioc_probe(struct platform_device *pdev)
+{
+    struct spi_master *master;
+    struct spioc *spioc;
+    int ret;
+    bool be;
+
+    ret = -1;
+    master = spi_alloc_master(&pdev->dev, sizeof(struct spioc));
+    if (!master) {
+        dev_err(&pdev->dev, "Failed to alloc spi master.\n");
+        goto out;
+    }
+
+    spioc = spi_master_get_devdata(master);
+    platform_set_drvdata(pdev, spioc);
+
+    spioc->dev = &pdev->dev;
+    ret = ocores_spi_config_init(spioc);
+    if (ret != 0) {
+        dev_err(spioc->dev, "Failed to get ocores spi dts config.\n");
+        goto free;
+    }
+
+    if (spioc->dev->of_node) {
+        if (of_property_read_u32(spioc->dev->of_node, "big_endian", &spioc->big_endian)) {
+
+            be = 0;
+        } else {
+            be = spioc->big_endian;
+        }
+    } else {
+        be = spioc->big_endian;
+    }
+
+    if (spioc->reg_io_width == 0) {
+        spioc->reg_io_width = 1; /* Set to default value */
+    }
+
+    if (!spioc->setreg || !spioc->getreg) {
+        switch (spioc->reg_io_width) {
+        case REG_IO_WIDTH_1:
+            spioc->setreg = oc_spi_setreg_8;
+            spioc->getreg = oc_spi_getreg_8;
+            break;
+
+        case REG_IO_WIDTH_2:
+            spioc->setreg = be ? oc_spi_setreg_16be : oc_spi_setreg_16;
+            spioc->getreg = be ? oc_spi_getreg_16be : oc_spi_getreg_16;
+            break;
+
+        case REG_IO_WIDTH_4:
+            spioc->setreg = be ? oc_spi_setreg_32be : oc_spi_setreg_32;
+            spioc->getreg = be ? oc_spi_getreg_32be : oc_spi_getreg_32;
+            break;
+
+        default:
+            dev_err(spioc->dev, "Unsupported I/O width (%d)\n", spioc->reg_io_width);
+            ret = -EINVAL;
+            goto free;
+        }
+    }
+
+    /* master state */
+    master->num_chipselect = spioc->num_chipselect;
+    master->mode_bits = MODEBITS;
+    master->setup = spioc_spi_setup;
+    if (spioc->dev->of_node) {
+        master->dev.of_node = pdev->dev.of_node;
+    } else {
+        master->bus_num = spioc->bus_num;
+    }
+
+    /* setup the state for the bitbang driver */
+    spioc->bitbang.master = master;
+    spioc->bitbang.setup_transfer = spioc_setup_transfer;
+    spioc->bitbang.chipselect = spioc_chipselect;
+    spioc->bitbang.txrx_bufs = spioc_spi_txrx_bufs;
+
+    /* gooooohi need revision */
+    spioc->irq = platform_get_irq(pdev, 0);
+    if (spioc->irq >= 0) {
+        SPI_OC_VERBOSE("spi oc use irq, irq number:%d.\n", spioc->irq);
+        init_completion(&spioc->done);
+        ret = devm_request_irq(&pdev->dev, spioc->irq, spioc_spi_irq, 0,
+                               pdev->name, spioc);
+        if (ret) {
+            dev_err(spioc->dev, "Failed to request irq:%d.\n", spioc->irq);
+            goto free;
+        }
+    }
+
+    ret = spi_bitbang_start(&spioc->bitbang);
+    if (ret) {
+        dev_err(spioc->dev, "Failed to start spi bitbang, ret:%d.\n", ret);
+        goto free;
+    }
+    dev_info(spioc->dev, "registered spi-%d for %s with base address:0x%x success.\n",
+        master->bus_num, spioc->dev_name, spioc->base_addr);
+
+    return ret;
+free:
+    spi_master_put(master);
+out:
+    return ret;
+}
+
+static int spioc_remove(struct platform_device *pdev)
+{
+    struct spioc *spioc;
+    struct spi_master *master;
+
+    spioc = platform_get_drvdata(pdev);
+    master = spioc->bitbang.master;
+    spi_bitbang_stop(&spioc->bitbang);
+    platform_set_drvdata(pdev, NULL);
+    spi_master_put(master);
+
+    return 0;
+}
+
+static const struct of_device_id spioc_match[] = {
+    { .compatible = "wb-spi-oc", },
+    {},
+};
+MODULE_DEVICE_TABLE(of, spioc_match);
+
+static struct platform_driver spioc_driver = {
+    .probe = spioc_probe,
+    .remove = spioc_remove,
+    .driver = {
+        .name  = "wb-spioc",
+        .owner = THIS_MODULE,
+        .of_match_table = spioc_match,
+    },
+};
+
+module_platform_driver(spioc_driver);
+
+MODULE_DESCRIPTION("spi open core adapter driver");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spi_ocores.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spi_ocores.h
new file mode 100644
index 000000000..647ff0c5f
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spi_ocores.h
@@ -0,0 +1,21 @@
+#ifndef __WB_SPI_OCORES_H__
+#define __WB_SPI_OCORES_H__
+#include <linux/string.h>
+
+#define mem_clear(data, size) memset((data), 0, (size))
+#define SPI_OCORES_DEV_NAME_MAX_LEN (64)
+
+typedef struct spi_ocores_device_s {
+    uint32_t bus_num;
+    uint32_t big_endian;
+    char dev_name[SPI_OCORES_DEV_NAME_MAX_LEN];
+    uint32_t reg_access_mode;
+    uint32_t dev_base;
+    uint32_t reg_shift;
+    uint32_t reg_io_width;
+    uint32_t clock_frequency;
+    uint32_t num_chipselect;
+    int device_flag;
+} spi_ocores_device_t;
+
+#endif
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_uio_irq.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_uio_irq.c
new file mode 100644
index 000000000..da2b58244
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_uio_irq.c
@@ -0,0 +1,282 @@
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/uio_driver.h>
+#include <linux/slab.h>
+#include <linux/device.h>
+#include <linux/kobject.h>
+#include <linux/irq.h>
+#include <linux/gpio.h>
+#include <linux/of.h>
+#include <linux/version.h>
+#include <linux/spinlock.h>
+
+typedef struct dfd_irq_s {
+    int gpio;
+    int irq_type;
+    struct uio_info dfd_irq_info;
+    spinlock_t lock;
+    struct attribute_group attr_group;
+} dfd_irq_t;
+
+#define DRV_NAME                      "uio-irq"
+#define DRV_VERSION                   "1.0"
+#define ENABLE_VAL                    (1)
+#define DISABLE_VAL                   (0)
+
+#define DEBUG_ERR_LEVEL       (0x1)
+#define DEBUG_WARN_LEVEL      (0x2)
+#define DEBUG_INFO_LEVEL      (0x4)
+#define DEBUG_VER_LEVEL       (0x8)
+
+static int debug = 0;
+module_param(debug, int, S_IRUGO | S_IWUSR);
+#define DEBUG_ERROR(fmt, args...)                                                           \
+    do {                                                                                    \
+        if (debug & DEBUG_ERR_LEVEL) {                                                                    \
+            printk(KERN_ERR "[ERR][func:%s line:%d]  "fmt, __func__, __LINE__, ## args);         \
+        } else {                                                                            \
+            pr_debug(fmt, ## args);                                                         \
+        }                                                                                   \
+    } while(0)
+
+#define DEBUG_WARN(fmt, args...)                                                            \
+        do {                                                                                \
+            if (debug & DEBUG_WARN_LEVEL) {                                                                \
+                printk(KERN_WARNING "[WARN][func:%s line:%d]  "fmt, __func__, __LINE__, ## args); \
+            } else {                                                                        \
+                pr_debug(fmt, ## args);                                                     \
+            }                                                                               \
+        } while(0)
+
+#define DEBUG_INFO(fmt, args...)                                                            \
+    do {                                                                                    \
+        if (debug & DEBUG_INFO_LEVEL) {                                                                    \
+            printk(KERN_INFO "[INFO][func:%s line:%d]  "fmt, __func__, __LINE__, ## args);        \
+        } else {                                                                            \
+            pr_debug(fmt, ## args);                                                         \
+        }                                                                                   \
+    } while(0)
+
+#define DEBUG_VERBOSE(fmt, args...)                                                         \
+    do {                                                                                    \
+        if (debug & DEBUG_VER_LEVEL) {                                                                    \
+            printk(KERN_DEBUG "[VER][func:%s line:%d]  "fmt, __func__, __LINE__, ## args);       \
+        } else {                                                                            \
+            pr_debug(fmt, ## args);                                                         \
+        }                                                                                   \
+    } while(0)
+
+static irqreturn_t dfd_genirq_handler(int irq, struct uio_info *dev_info)
+{
+    disable_irq_nosync(irq);
+    DEBUG_VERBOSE("handler disable irq");
+    return IRQ_HANDLED;
+}
+
+static int dfd_genirq_irqcontrol(struct uio_info *dev_info, s32 irq_on)
+{
+    struct irq_data *irqdata;
+
+    irqdata = irq_get_irq_data(dev_info->irq);
+
+    if (irqd_irq_disabled(irqdata) == !irq_on) {
+        DEBUG_VERBOSE("irq already disable");
+        return 0;
+    }
+    if (irq_on) {
+        DEBUG_VERBOSE("irqcontrol enable irq");
+        enable_irq(dev_info->irq);
+    } else {
+        DEBUG_VERBOSE("irqcontrol disable irq");
+        disable_irq(dev_info->irq);
+    }
+
+    return 0;
+}
+
+static ssize_t set_irq_enable(struct device *dev,
+            struct device_attribute *attr,
+            const char *buf, size_t count)
+{
+    dfd_irq_t *dfd_irq;
+    struct uio_info *dev_info;
+    unsigned long flags;
+    int ret, val;
+
+    dfd_irq = dev_get_drvdata(dev);
+    dev_info = &dfd_irq->dfd_irq_info;
+
+    spin_lock_irqsave(&dfd_irq->lock, flags);
+
+    sscanf(buf, "%d", &val);
+    DEBUG_VERBOSE("set val:%d.\n", val);
+
+    if ((val != ENABLE_VAL) && (val != DISABLE_VAL)) {
+        DEBUG_ERROR("unsupport val:%d ", val);
+        ret = -EINVAL;
+        goto fail;
+    }
+
+    if (val) {
+        DEBUG_VERBOSE("sysfs enable irq");
+        enable_irq(dev_info->irq);
+    } else {
+        DEBUG_VERBOSE("sysfs disable irq");
+        disable_irq(dev_info->irq);
+    }
+
+    spin_unlock_irqrestore(&dfd_irq->lock, flags);
+    return count;
+
+fail:
+    spin_unlock_irqrestore(&dfd_irq->lock, flags);
+    return ret;
+}
+
+static DEVICE_ATTR(irq_enable,  S_IWUSR, NULL, set_irq_enable);
+
+static struct attribute *irq_attrs[] = {
+    &dev_attr_irq_enable.attr,
+    NULL,
+};
+
+static struct attribute_group irq_attr_group = {
+    .attrs = irq_attrs,
+};
+
+static int dfd_irq_probe(struct platform_device *pdev)
+{
+    u32 gpio, irq_type, pirq_line;
+    int ret, ret1, ret2;
+    struct uio_info *dfd_irq_info;
+    dfd_irq_t *dfd_irq;
+
+    dfd_irq = kzalloc(sizeof(dfd_irq_t), GFP_KERNEL);
+    if (!dfd_irq) {
+        dev_err(&pdev->dev, "dfd_irq_t kzalloc failed.\n");
+        return -ENOMEM;
+    }
+
+    dfd_irq_info = &dfd_irq->dfd_irq_info;
+    dfd_irq_info->version = "1.0";
+    dfd_irq_info->name = "uio-irq";
+
+    /* get pirq line for x86 */
+    ret1 = of_property_read_u32(pdev->dev.of_node, "pirq-line", &pirq_line);
+    if (!ret1) {
+        DEBUG_VERBOSE("use pirq-line method, pirq-line:%u", pirq_line);
+        dfd_irq_info->irq = pirq_line;
+    }
+
+    ret2 = of_property_read_u32(pdev->dev.of_node, "gpio", &gpio);
+    if (!ret2 && ret1) {
+        dfd_irq->gpio = gpio;
+        gpio_request(dfd_irq->gpio, "GPIOA");
+        dfd_irq_info->irq = gpio_to_irq(dfd_irq->gpio);
+        DEBUG_VERBOSE("use gpio:%u, irq num:%ld", gpio, dfd_irq_info->irq);
+    } else if (ret2 && ret1){
+        ret = -ENXIO;
+        dev_err(&pdev->dev, "no define irq num. ret2:%d, ret1:%d.\n", ret2, ret1);
+        goto free_mem;
+    }
+
+    ret = of_property_read_u32(pdev->dev.of_node, "irq_type", &irq_type);
+    if (!ret && ret1) {
+        DEBUG_VERBOSE("use irq_type:%u", irq_type);
+        dfd_irq->irq_type = irq_type;
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 39)
+        irq_set_irq_type(dfd_irq_info->irq, dfd_irq->irq_type);
+#else
+        set_irq_type(dfd_irq_info->irq, dfd_irq->irq_type);
+#endif
+    } else if (ret && ret1){
+        ret = -ENXIO;
+        dev_err(&pdev->dev, "no define irq type. ret:%d, ret1:%d.\n", ret, ret1);
+        goto free_mem;
+    }
+
+    dfd_irq_info->irq_flags = IRQF_SHARED;
+    dfd_irq_info->handler = dfd_genirq_handler;
+    dfd_irq_info->irqcontrol = dfd_genirq_irqcontrol;
+
+    if(uio_register_device(&pdev->dev, dfd_irq_info)){
+        ret = -ENODEV;
+        dev_err(&pdev->dev, "uio register failed.\n");
+        goto free_mem;
+    }
+
+    spin_lock_init(&dfd_irq->lock);
+
+    dfd_irq->attr_group = irq_attr_group;
+    ret = sysfs_create_group(&pdev->dev.kobj, &dfd_irq->attr_group);
+    if (ret != 0) {
+        dev_err(&pdev->dev, "sysfs_create_group failed. ret:%d.\n", ret);
+        goto free_mem;
+    }
+    DEBUG_VERBOSE("sysfs create group success\n");
+
+    platform_set_drvdata(pdev, dfd_irq);
+
+    return 0;
+
+free_mem:
+    kfree(dfd_irq);
+
+    return ret;
+}
+
+static int dfd_irq_remove(struct platform_device *pdev)
+{
+    dfd_irq_t *dfd_irq;
+    struct uio_info *dfd_irq_info;
+
+    dfd_irq = platform_get_drvdata(pdev);
+    dfd_irq_info = &dfd_irq->dfd_irq_info;
+
+    uio_unregister_device(dfd_irq_info);
+    kfree(dfd_irq);
+
+    sysfs_remove_group(&pdev->dev.kobj, &dfd_irq->attr_group);
+
+    return 0;
+}
+
+static struct of_device_id dfd_irq_match[] = {
+    {
+        .compatible = "uio-irq",
+    },
+    {},
+};
+MODULE_DEVICE_TABLE(of, dfd_irq_match);
+
+static struct platform_driver dfd_irq_driver = {
+    .probe      = dfd_irq_probe,
+    .remove     = dfd_irq_remove,
+    .driver     = {
+        .owner  = THIS_MODULE,
+        .name   = DRV_NAME,
+        .of_match_table = dfd_irq_match,
+    },
+};
+
+static int __init dfd_irq_init(void)
+{
+    int ret;
+
+    ret =  platform_driver_register(&dfd_irq_driver);
+    if (ret != 0 ) {
+        return ret;
+    }
+
+    return 0;
+}
+
+static void __exit dfd_irq_exit(void)
+{
+    platform_driver_unregister(&dfd_irq_driver);
+}
+
+module_init(dfd_irq_init);
+module_exit(dfd_irq_exit);
+MODULE_LICENSE("GPL");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_wdt.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_wdt.c
new file mode 100644
index 000000000..aa50ef848
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_wdt.c
@@ -0,0 +1,1202 @@
+/*
+ * wb_wdt.c
+ * ko for watchdog function
+ */
+
+#include <linux/err.h>
+#include <linux/delay.h>
+#include <linux/module.h>
+#include <linux/of_gpio.h>
+#include <linux/platform_device.h>
+#include <linux/watchdog.h>
+#include <linux/hrtimer.h>
+#include <linux/uaccess.h>
+#include <linux/kthread.h>
+#include <linux/mutex.h>
+#include <linux/hwmon-sysfs.h>
+#include <linux/uio.h>
+
+#include "wb_wdt.h"
+
+#define GPIO_FEED_WDT_MODE   (1)
+#define LOGIC_FEED_WDT_MODE  (2)
+
+#define SYMBOL_I2C_DEV_MODE  (1)
+#define SYMBOL_PCIE_DEV_MODE (2)
+#define SYMBOL_IO_DEV_MODE   (3)
+#define FILE_MODE            (4)
+
+#define ONE_BYTE             (1)
+
+#define WDT_OFF              (0)
+#define WDT_ON               (1)
+
+#define MS_TO_S              (1000)
+#define MS_TO_NS             (1000 * 1000)
+
+#define MAX_REG_VAL          (255)
+
+extern int i2c_device_func_write(const char *path, uint32_t offset, uint8_t *buf, size_t count);
+extern int i2c_device_func_read(const char *path, uint32_t offset, uint8_t *buf, size_t count);
+extern int pcie_device_func_write(const char *path, uint32_t offset, uint8_t *buf, size_t count);
+extern int pcie_device_func_read(const char *path, uint32_t offset, uint8_t *buf, size_t count);
+extern int io_device_func_write(const char *path, uint32_t offset, uint8_t *buf, size_t count);
+extern int io_device_func_read(const char *path, uint32_t offset, uint8_t *buf, size_t count);
+
+int g_wb_wdt_debug = 0;
+int g_wb_wdt_error = 0;
+
+module_param(g_wb_wdt_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_wdt_error, int, S_IRUGO | S_IWUSR);
+
+#define WDT_VERBOSE(fmt, args...) do {                                        \
+    if (g_wb_wdt_debug) { \
+        printk(KERN_INFO "[WDT][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define WDT_ERROR(fmt, args...) do {                                        \
+    if (g_wb_wdt_error) { \
+        printk(KERN_ERR "[WDT][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+enum {
+    HW_ALGO_TOGGLE,
+    HW_ALGO_LEVEL,
+    HW_ALGO_EIGENVALUES,
+};
+
+enum {
+    WATCHDOG_DEVICE_TYPE    = 0,
+    HRTIMER_TYPE,
+    THREAD_TYPE,
+};
+
+typedef struct wb_wdt_priv_s {
+    struct task_struct *thread;
+    struct hrtimer hrtimer;
+    ktime_t   m_kt;
+    const char  *config_dev_name;
+    uint8_t     config_mode;
+    uint8_t     hw_algo;
+    uint8_t     enable_val;
+    uint8_t     disable_val;
+    uint8_t     enable_mask;
+    uint8_t     priv_func_mode;
+    uint8_t     feed_wdt_type;
+    uint32_t    enable_reg;
+    uint32_t    timeout_cfg_reg;
+    uint32_t    timeleft_cfg_reg;
+    uint32_t    hw_margin;
+    uint32_t    feed_time;
+    uint8_t     timer_accuracy_reg_flag;
+    uint32_t    timer_accuracy_reg;
+    uint8_t     timer_accuracy_reg_val;
+    uint32_t    timer_accuracy;
+    uint8_t     timer_update_reg_flag;
+    uint32_t    timer_update_reg;
+    uint8_t     timer_update_reg_val;
+    gpio_wdt_info_t     gpio_wdt;
+    logic_wdt_info_t    logic_wdt;
+    struct device *dev;
+    const struct attribute_group *sysfs_group;
+    uint8_t sysfs_index;
+    struct mutex update_lock;
+    struct watchdog_device  wdd;
+}wb_wdt_priv_t;
+
+static int wdt_file_read(const char *path, uint32_t pos, uint8_t *val, size_t size)
+{
+    int ret;
+    struct file *filp;
+    loff_t tmp_pos;
+
+    struct kvec iov = {
+        .iov_base = val,
+        .iov_len = min_t(size_t, size, MAX_RW_COUNT),
+    };
+    struct iov_iter iter;
+
+    filp = filp_open(path, O_RDONLY, 0);
+    if (IS_ERR(filp)) {
+        WDT_ERROR("read open failed errno = %ld\r\n", -PTR_ERR(filp));
+        filp = NULL;
+        goto exit;
+    }
+
+    tmp_pos = (loff_t)pos;
+    iov_iter_kvec(&iter, ITER_DEST, &iov, 1, iov.iov_len);
+    ret = vfs_iter_read(filp, &iter, &tmp_pos, 0);
+    if (ret < 0) {
+        WDT_ERROR("vfs_iter_read failed, path=%s, addr=0x%x, size=%ld, ret=%d\r\n", path, pos, size, ret);
+        goto exit;
+    }
+
+    filp_close(filp, NULL);
+
+    return ret;
+
+exit:
+    if (filp != NULL) {
+        filp_close(filp, NULL);
+    }
+
+    return -1;
+}
+
+static int wdt_file_write(const char *path, uint32_t pos, uint8_t *val, size_t size)
+{
+    int ret;
+    struct file *filp;
+    loff_t tmp_pos;
+
+    struct kvec iov = {
+        .iov_base = val,
+        .iov_len = min_t(size_t, size, MAX_RW_COUNT),
+    };
+    struct iov_iter iter;
+
+    filp = filp_open(path, O_RDWR, 777);
+    if (IS_ERR(filp)) {
+        WDT_ERROR("write open failed errno = %ld\r\n", -PTR_ERR(filp));
+        filp = NULL;
+        goto exit;
+    }
+
+    tmp_pos = (loff_t)pos;
+    iov_iter_kvec(&iter, ITER_SOURCE, &iov, 1, iov.iov_len);
+    ret = vfs_iter_write(filp, &iter, &tmp_pos, 0);
+    if (ret < 0) {
+        WDT_ERROR("vfs_iter_write failed, path=%s, addr=0x%x, size=%ld, ret=%d\r\n", path, pos, size, ret);
+        goto exit;
+    }
+
+    vfs_fsync(filp, 1);
+    filp_close(filp, NULL);
+
+    return ret;
+
+exit:
+    if (filp != NULL) {
+        filp_close(filp, NULL);
+    }
+
+    return -1;
+}
+
+static int wb_wdt_read(uint8_t mode, const char *path,
+                uint32_t offset, uint8_t *buf, size_t count)
+{
+    int ret;
+
+    switch (mode) {
+    case SYMBOL_I2C_DEV_MODE:
+        ret = i2c_device_func_read(path, offset, buf, count);
+        break;
+    case SYMBOL_PCIE_DEV_MODE:
+        ret = pcie_device_func_read(path, offset, buf, count);
+        break;
+    case SYMBOL_IO_DEV_MODE:
+        ret = io_device_func_read(path, offset, buf, count);
+        break;
+    case FILE_MODE:
+        ret = wdt_file_read(path, offset, buf, count);
+        break;
+    default:
+        WDT_ERROR("mode %u error, wdt func read failed.\n", mode);
+        return -EINVAL;
+    }
+
+    WDT_VERBOSE("wdt func read mode:%u,dev_nam:%s, offset:0x%x, read_val:0x%x, size:%lu.\n",
+        mode, path, offset, *buf, count);
+
+    return ret;
+}
+
+static int wb_wdt_write(uint8_t mode, const char *path,
+                uint32_t offset, uint8_t *buf, size_t count)
+{
+    int ret;
+
+    switch (mode) {
+    case SYMBOL_I2C_DEV_MODE:
+        ret = i2c_device_func_write(path, offset, buf, count);
+        break;
+    case SYMBOL_PCIE_DEV_MODE:
+        ret = pcie_device_func_write(path, offset, buf, count);
+        break;
+    case SYMBOL_IO_DEV_MODE:
+        ret = io_device_func_write(path, offset, buf, count);
+        break;
+    case FILE_MODE:
+        ret = wdt_file_write(path, offset, buf, count);
+        break;
+    default:
+        WDT_ERROR("mode %u error, wdt func write failed.\n", mode);
+        return -EINVAL;
+    }
+
+    WDT_VERBOSE("wdt func write mode:%u, dev_nam:%s, offset:0x%x, write_val:0x%x, size:%lu.\n",
+        mode, path, offset, *buf, count);
+
+    return ret;
+}
+
+static int wb_wdt_enable_ctrl(wb_wdt_priv_t *priv, uint8_t flag)
+{
+    int ret;
+    uint8_t val;
+    uint8_t ctrl_val;
+
+    switch (flag) {
+    case WDT_ON:
+        ctrl_val = priv->enable_val;
+        break;
+    case WDT_OFF:
+        ctrl_val = priv->disable_val;
+        break;
+    default:
+        WDT_ERROR("unsupport wdt enable ctrl:%u.\n", flag);
+        return -EINVAL;
+    }
+
+    ret = wb_wdt_read(priv->priv_func_mode, priv->config_dev_name,
+                priv->enable_reg, &val, ONE_BYTE);
+    if (ret < 0) {
+        dev_err(priv->dev, "read wdt control reg error.\n");
+        return ret;
+    }
+
+    val &= ~priv->enable_mask;
+
+    val |= ctrl_val & priv->enable_mask;
+
+    ret = wb_wdt_write(priv->priv_func_mode, priv->config_dev_name,
+                priv->enable_reg, &val, ONE_BYTE);
+    if (ret < 0) {
+        dev_err(priv->dev, "write wdt control reg error.\n");
+        return ret;
+    }
+
+    return 0;
+}
+
+static void wdt_hwping(wb_wdt_priv_t *priv)
+{
+    gpio_wdt_info_t *gpio_wdt;
+    logic_wdt_info_t *logic_wdt;
+    uint8_t tmp_val;
+    int ret;
+
+    if (priv->config_mode == GPIO_FEED_WDT_MODE) {
+        gpio_wdt = &priv->gpio_wdt;
+        switch (priv->hw_algo) {
+        case HW_ALGO_TOGGLE:
+            gpio_wdt = &priv->gpio_wdt;
+            gpio_wdt->state = !gpio_wdt->state;
+            gpio_set_value_cansleep(gpio_wdt->gpio, gpio_wdt->state);
+            WDT_VERBOSE("gpio toggle wdt work. val:%u\n", gpio_wdt->state);
+            break;
+        case HW_ALGO_LEVEL:
+            gpio_wdt = &priv->gpio_wdt;
+            /* Pulse */
+            gpio_set_value_cansleep(gpio_wdt->gpio, !gpio_wdt->active_low);
+            udelay(1);
+            gpio_set_value_cansleep(gpio_wdt->gpio, gpio_wdt->active_low);
+            WDT_VERBOSE("gpio level wdt work.\n");
+            break;
+        }
+    } else {
+        logic_wdt = &priv->logic_wdt;
+        switch (priv->hw_algo) {
+        case HW_ALGO_TOGGLE:
+            logic_wdt->active_val = !logic_wdt->active_val;
+            ret = wb_wdt_write(logic_wdt->logic_func_mode, logic_wdt->feed_dev_name,
+                        logic_wdt->feed_reg, &logic_wdt->active_val, ONE_BYTE);
+            if (ret < 0) {
+                WDT_ERROR("logic toggle wdt write failed.ret = %d\n", ret);
+            }
+            WDT_VERBOSE("logic toggle wdt work.\n");
+            break;
+        case HW_ALGO_LEVEL:
+            tmp_val = !logic_wdt->active_val;
+            ret = wb_wdt_write(logic_wdt->logic_func_mode, logic_wdt->feed_dev_name,
+                        logic_wdt->feed_reg, &tmp_val, ONE_BYTE);
+            if (ret < 0) {
+                WDT_ERROR("logic level wdt write first failed.ret = %d\n", ret);
+            }
+            udelay(1);
+            ret = wb_wdt_write(logic_wdt->logic_func_mode, logic_wdt->feed_dev_name,
+                        logic_wdt->feed_reg, &logic_wdt->active_val, ONE_BYTE);
+            if (ret < 0) {
+                WDT_ERROR("logic level wdt write second failed.ret = %d\n", ret);
+            }
+            WDT_VERBOSE("logic level wdt work.\n");
+            break;
+        case HW_ALGO_EIGENVALUES:
+            ret = wb_wdt_write(logic_wdt->logic_func_mode, logic_wdt->feed_dev_name,
+                        logic_wdt->feed_reg, &logic_wdt->active_val, ONE_BYTE);
+            if (ret < 0) {
+                WDT_ERROR("logic eigenvalues wdt write failed, path: %s, mode: %d, reg: 0x%x, val: 0x%x, ret: %d\n",
+                    logic_wdt->feed_dev_name, logic_wdt->logic_func_mode, logic_wdt->feed_reg,
+                    logic_wdt->active_val, ret);
+            }
+            WDT_VERBOSE("logic eigenvalues wdt work, path: %s, mode: %d, reg: 0x%x, val: 0x%x\n",
+                logic_wdt->feed_dev_name, logic_wdt->logic_func_mode, logic_wdt->feed_reg, logic_wdt->active_val);
+            break;
+        }
+    }
+    return;
+}
+
+static enum hrtimer_restart hrtimer_hwping(struct hrtimer *timer)
+{
+    wb_wdt_priv_t *priv = container_of(timer, wb_wdt_priv_t, hrtimer);
+
+    wdt_hwping(priv);
+    hrtimer_forward(timer, timer->base->get_time(), priv->m_kt);
+    return HRTIMER_RESTART;
+}
+
+static int thread_timer_cfg(wb_wdt_priv_t *priv, wb_wdt_device_t *wb_wdt_device)
+{
+    struct device *dev;
+    uint32_t hw_margin;
+    uint32_t feed_time;
+    uint32_t accuracy;
+    uint8_t set_time_val;
+    int ret;
+
+    dev = priv->dev;
+
+    ret = 0;
+    if (dev->of_node) {
+        ret += of_property_read_u32(dev->of_node, "feed_time", &priv->feed_time);
+        if (ret != 0) {
+            dev_err(dev, "thread Failed to priv dts.\n");
+            return -ENXIO;
+        }
+    } else {
+        priv->feed_time = wb_wdt_device->feed_time;
+    }
+    WDT_VERBOSE("thread priv->feed_time: %u.\n", priv->feed_time);
+
+    hw_margin = priv->hw_margin;
+    feed_time = priv->feed_time;
+    accuracy = priv->timer_accuracy;
+
+    if ((feed_time > (hw_margin / 2)) || (feed_time == 0)) {
+        dev_err(dev, "thread timer feed_time[%d] should be less than half hw_margin or zero.\n", feed_time);
+        return -EINVAL;
+    }
+
+    if (priv->timer_accuracy_reg_flag != 0) {
+        ret = wb_wdt_write(priv->priv_func_mode, priv->config_dev_name,
+                    priv->timer_accuracy_reg, &priv->timer_accuracy_reg_val, ONE_BYTE);
+        if (ret < 0) {
+            dev_err(priv->dev, "set timer_accuracy_reg error, reg_addr: 0x%x, value: 0x%x, ret: %d.\n",
+                priv->timer_accuracy_reg, priv->timer_accuracy_reg_val, ret);
+            return ret;
+        }
+    }
+
+    set_time_val = hw_margin / accuracy;
+    ret = wb_wdt_write(priv->priv_func_mode, priv->config_dev_name,
+                priv->timeout_cfg_reg, &set_time_val, ONE_BYTE);
+    if (ret < 0) {
+        dev_err(dev, "set wdt thread timer reg error.\n");
+        return ret;
+    }
+
+    if (priv->timer_update_reg_flag != 0) {
+        ret = wb_wdt_write(priv->priv_func_mode, priv->config_dev_name,
+                    priv->timer_update_reg, &priv->timer_update_reg_val, ONE_BYTE);
+        if (ret < 0) {
+            dev_err(priv->dev, "set timer_update_reg error,  reg_addr: 0x%x, value: 0x%x, ret: %d.\n",
+                priv->timer_update_reg, priv->timer_update_reg_val, ret);
+            return ret;
+        }
+    }
+
+    return 0;
+}
+
+static int wdt_thread_timer(void *data)
+{
+    wb_wdt_priv_t *priv = data;
+
+    while (!kthread_should_stop()) {
+        schedule_timeout_uninterruptible(msecs_to_jiffies(priv->feed_time));
+        wdt_hwping(priv);
+    }
+    return 0;
+}
+
+static int thread_timer_create(wb_wdt_priv_t *priv, wb_wdt_device_t *wb_wdt_device)
+{
+    struct task_struct *p;
+    int ret;
+
+    ret = thread_timer_cfg(priv, wb_wdt_device);
+    if (ret < 0) {
+        dev_err(priv->dev, "set wdt thread timer failed.\n");
+        return ret;
+    }
+
+    p = kthread_create(wdt_thread_timer, (void *)priv, "%s", "wb_wdt");
+    if (!IS_ERR(p)) {
+        WDT_VERBOSE("timer thread create success.\n");
+        priv->thread = p;
+        wake_up_process(p);
+    } else {
+        dev_err(priv->dev, "timer thread create failed.\n");
+        return -ENXIO;
+    }
+
+    ret = wb_wdt_enable_ctrl(priv, WDT_ON);
+    if (ret < 0) {
+        dev_err(priv->dev, "thread enable wdt failed.\n");
+        return -ENXIO;
+    }
+
+    return 0;
+}
+
+static int hrtimer_cfg(wb_wdt_priv_t *priv, wb_wdt_device_t *wb_wdt_device)
+{
+    struct device *dev;
+    struct hrtimer *hrtimer;
+    uint8_t set_time_val;
+    uint8_t hrtimer_s;
+    uint32_t hrtimer_ns;
+    int ret;
+    uint32_t hw_margin;
+    uint32_t feed_time;
+    uint32_t accuracy;
+    uint32_t max_timeout;
+
+    dev = priv->dev;
+
+    ret = 0;
+    if (dev->of_node) {
+        ret += of_property_read_u32(dev->of_node, "feed_time", &priv->feed_time);
+        if (ret != 0) {
+            dev_err(dev, "hrtimer Failed to priv dts.\n");
+            return -ENXIO;
+        }
+    } else {
+        priv->feed_time = wb_wdt_device->feed_time;
+    }
+    WDT_VERBOSE("hrtimer priv->feed_time: %u.\n", priv->feed_time);
+
+    hrtimer = &priv->hrtimer;
+    hw_margin = priv->hw_margin;
+    feed_time = priv->feed_time;
+    accuracy = priv->timer_accuracy;
+    max_timeout = accuracy * 255;
+
+    if (hw_margin < accuracy || hw_margin > max_timeout) {
+        dev_err(dev, "hrtimer_hw_margin should be between %u and %u.\n",
+            accuracy, max_timeout);
+        return -EINVAL;
+    }
+    if ((feed_time > (hw_margin / 2)) || (feed_time == 0)) {
+        dev_err(dev, "feed_time[%d] should be less than half hw_margin or zeor.\n", feed_time);
+        return -EINVAL;
+    }
+
+    hrtimer_s = feed_time / MS_TO_S;
+    hrtimer_ns = (feed_time % MS_TO_S) * MS_TO_NS;
+    set_time_val = hw_margin / accuracy;
+
+    if (priv->timer_accuracy_reg_flag != 0) {
+        ret = wb_wdt_write(priv->priv_func_mode, priv->config_dev_name,
+                    priv->timer_accuracy_reg, &priv->timer_accuracy_reg_val, ONE_BYTE);
+        if (ret < 0) {
+            dev_err(priv->dev, "set timer_accuracy_reg error, reg_addr: 0x%x, value: 0x%x, ret: %d.\n",
+                priv->timer_accuracy_reg, priv->timer_accuracy_reg_val, ret);
+            return ret;
+        }
+    }
+
+    ret = wb_wdt_write(priv->priv_func_mode, priv->config_dev_name,
+                priv->timeout_cfg_reg, &set_time_val, ONE_BYTE);
+    if (ret < 0) {
+        dev_err(dev, "set wdt time reg error.\n");
+        return ret;
+    }
+
+    if (priv->timer_update_reg_flag != 0) {
+        ret = wb_wdt_write(priv->priv_func_mode, priv->config_dev_name,
+                    priv->timer_update_reg, &priv->timer_update_reg_val, ONE_BYTE);
+        if (ret < 0) {
+            dev_err(priv->dev, "set timer_update_reg error,  reg_addr: 0x%x, value: 0x%x, ret: %d.\n",
+                priv->timer_update_reg, priv->timer_update_reg_val, ret);
+            return ret;
+        }
+    }
+
+    priv->m_kt = ktime_set(hrtimer_s, hrtimer_ns);
+    hrtimer_init(hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
+    hrtimer->function = hrtimer_hwping;
+    hrtimer_start(hrtimer, priv->m_kt, HRTIMER_MODE_REL);
+
+    ret = wb_wdt_enable_ctrl(priv, WDT_ON);
+    if (ret < 0) {
+        dev_err(dev, "hrtimer enable wdt failed.\n");
+        return -ENXIO;
+    }
+
+    return 0;
+}
+
+static int wb_wdt_ping(struct watchdog_device *wdd)
+{
+    wb_wdt_priv_t *priv = watchdog_get_drvdata(wdd);
+
+    wdt_hwping(priv);
+    return 0;
+}
+
+static int wb_wdt_start(struct watchdog_device *wdd)
+{
+    wb_wdt_priv_t *priv = watchdog_get_drvdata(wdd);
+    int ret;
+
+    ret = wb_wdt_enable_ctrl(priv, WDT_ON);
+    if (ret < 0) {
+        WDT_ERROR("start wdt enable failed.\n");
+        return -ENXIO;
+    }
+    set_bit(WDOG_HW_RUNNING, &wdd->status);
+    return 0;
+}
+
+static int wb_wdt_stop(struct watchdog_device *wdd)
+{
+    wb_wdt_priv_t *priv = watchdog_get_drvdata(wdd);
+    int ret;
+
+    ret = wb_wdt_enable_ctrl(priv, WDT_OFF);
+    if (ret < 0) {
+        WDT_ERROR("stop wdt enable failed.\n");
+        return -ENXIO;
+    }
+    clear_bit(WDOG_HW_RUNNING, &wdd->status);
+    return 0;
+}
+
+static int wb_wdt_set_timeout(struct watchdog_device *wdd, unsigned int t)
+{
+    wb_wdt_priv_t *priv = watchdog_get_drvdata(wdd);
+    uint32_t timeout_ms;
+    uint32_t accuracy;
+    uint8_t set_time_val;
+    int ret;
+
+    accuracy = priv->timer_accuracy;
+    timeout_ms = t * 1000;
+    if (timeout_ms > accuracy * 255) {
+        WDT_ERROR("set wdt timeout too larger error.timeout_ms:%u\n", timeout_ms);
+        return -EINVAL;
+    }
+
+    if (priv->timer_accuracy_reg_flag != 0) {
+        ret = wb_wdt_write(priv->priv_func_mode, priv->config_dev_name,
+                    priv->timer_accuracy_reg, &priv->timer_accuracy_reg_val, ONE_BYTE);
+        if (ret < 0) {
+            WDT_ERROR("set timer_accuracy_reg error, reg_addr: 0x%x, value: 0x%x, ret: %d.\n",
+                priv->timer_accuracy_reg, priv->timer_accuracy_reg_val, ret);
+            return ret;
+        }
+    }
+
+    set_time_val = timeout_ms / accuracy;
+    ret = wb_wdt_write(priv->priv_func_mode, priv->config_dev_name,
+                priv->timeout_cfg_reg, &set_time_val, ONE_BYTE);
+    if (ret < 0) {
+        WDT_ERROR("set wdt timeout reg error, set_time_val:%u ret:%d\n", set_time_val, ret);
+        return ret;
+    }
+
+    if (priv->timer_update_reg_flag != 0) {
+        ret = wb_wdt_write(priv->priv_func_mode, priv->config_dev_name,
+                    priv->timer_update_reg, &priv->timer_update_reg_val, ONE_BYTE);
+        if (ret < 0) {
+            WDT_ERROR("set timer_update_reg error,  reg_addr: 0x%x, value: 0x%x, ret: %d.\n",
+                priv->timer_update_reg, priv->timer_update_reg_val, ret);
+            return ret;
+        }
+    }
+
+    wdd->timeout = t;
+
+    return 0;
+}
+
+static unsigned int wb_wdt_get_timeleft(struct watchdog_device *wdd)
+{
+    wb_wdt_priv_t *priv = watchdog_get_drvdata(wdd);
+    unsigned int time_left;
+    uint32_t accuracy;
+    uint8_t get_time_val;
+    int ret;
+
+    accuracy = priv->timer_accuracy;
+
+    ret = wb_wdt_read(priv->priv_func_mode, priv->config_dev_name,
+                priv->timeleft_cfg_reg, &get_time_val, ONE_BYTE);
+    if (ret < 0) {
+        WDT_ERROR("get wdt timeout reg error.ret:%d\n", ret);
+        return ret;
+    }
+    time_left = get_time_val * accuracy / MS_TO_S;
+
+    WDT_VERBOSE("get wdt timeleft %d get_time_val %d accuracy=%d\n",
+            time_left, get_time_val, accuracy);
+    return time_left;
+}
+
+static const struct watchdog_info wb_wdt_ident = {
+    .options    = WDIOF_MAGICCLOSE | WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT,
+    .firmware_version = 0,
+    .identity   = "CPLD Watchdog",
+};
+
+static const struct watchdog_ops wb_wdt_ops = {
+    .owner        = THIS_MODULE,
+    .start        = wb_wdt_start,
+    .stop         = wb_wdt_stop,
+    .ping         = wb_wdt_ping,
+    .set_timeout  = wb_wdt_set_timeout,
+    .get_timeleft  = wb_wdt_get_timeleft,
+};
+
+static int watchdog_device_cfg(wb_wdt_priv_t *priv)
+{
+    int ret;
+    uint8_t set_time_val;
+
+    ret = wb_wdt_enable_ctrl(priv, WDT_OFF);
+    if (ret < 0) {
+        dev_err(priv->dev, "probe disable wdt failed.\n");
+        return -ENXIO;
+    }
+
+    if (priv->timer_accuracy_reg_flag != 0) {
+        ret = wb_wdt_write(priv->priv_func_mode, priv->config_dev_name,
+                    priv->timer_accuracy_reg, &priv->timer_accuracy_reg_val, ONE_BYTE);
+        if (ret < 0) {
+            dev_err(priv->dev, "set timer_accuracy_reg error, reg_addr: 0x%x, value: 0x%x, ret: %d.\n",
+                priv->timer_accuracy_reg, priv->timer_accuracy_reg_val, ret);
+            return ret;
+        }
+    }
+
+    set_time_val = priv->hw_margin / priv->timer_accuracy;
+    ret = wb_wdt_write(priv->priv_func_mode, priv->config_dev_name,
+                priv->timeout_cfg_reg, &set_time_val, ONE_BYTE);
+    if (ret < 0) {
+        dev_err(priv->dev, "set wdt time reg error.\n");
+        return ret;
+    }
+
+    if (priv->timer_update_reg_flag != 0) {
+        ret = wb_wdt_write(priv->priv_func_mode, priv->config_dev_name,
+                    priv->timer_update_reg, &priv->timer_update_reg_val, ONE_BYTE);
+        if (ret < 0) {
+            dev_err(priv->dev, "set timer_update_reg error,  reg_addr: 0x%x, value: 0x%x, ret: %d.\n",
+                priv->timer_update_reg, priv->timer_update_reg_val, ret);
+            return ret;
+        }
+    }
+
+    watchdog_set_drvdata(&priv->wdd, priv);
+
+    priv->wdd.info         = &wb_wdt_ident;
+    priv->wdd.ops          = &wb_wdt_ops;
+    priv->wdd.bootstatus   = 0;
+    priv->wdd.timeout      = priv->hw_margin / MS_TO_S;
+    priv->wdd.min_timeout  = priv->timer_accuracy / MS_TO_S;
+    priv->wdd.max_timeout  = priv->timer_accuracy * MAX_REG_VAL / MS_TO_S;
+    priv->wdd.parent       = priv->dev;
+
+    watchdog_stop_on_reboot(&priv->wdd);
+
+    ret = devm_watchdog_register_device(priv->dev, &priv->wdd);
+    if (ret != 0) {
+        dev_err(priv->dev, "cannot register watchdog device (err=%d)\n", ret);
+        return -ENXIO;
+    }
+
+    return 0;
+}
+
+static int logic_wdt_init(wb_wdt_priv_t *priv, wb_wdt_device_t *wb_wdt_device)
+{
+    struct device *dev;
+    logic_wdt_info_t *logic_wdt;
+    int ret;
+
+    dev = priv->dev;
+    logic_wdt = &priv->logic_wdt;
+
+    ret = 0;
+    if (dev->of_node) {
+        ret += of_property_read_string(dev->of_node, "feed_dev_name", &logic_wdt->feed_dev_name);
+        ret += of_property_read_u32(dev->of_node, "feed_reg", &logic_wdt->feed_reg);
+        ret += of_property_read_u8(dev->of_node, "active_val", &logic_wdt->active_val);
+        ret += of_property_read_u8(dev->of_node, "logic_func_mode", &logic_wdt->logic_func_mode);
+        if (ret != 0) {
+            dev_err(dev, "Failed to logic_wdt dts.\n");
+            return -ENXIO;
+        }
+    } else {
+        logic_wdt->feed_dev_name = wb_wdt_device->wdt_config_mode.logic_wdt.feed_dev_name;
+        logic_wdt->feed_reg = wb_wdt_device->wdt_config_mode.logic_wdt.feed_reg;
+        logic_wdt->active_val = wb_wdt_device->wdt_config_mode.logic_wdt.active_val;
+        logic_wdt->logic_func_mode = wb_wdt_device->wdt_config_mode.logic_wdt.logic_func_mode;
+    }
+
+    logic_wdt->state_val = logic_wdt->active_val;
+
+    WDT_VERBOSE("feed_dev_name:%s, feed_reg:0x%x, active_val:%u, logic_func_mode:%u\n",
+        logic_wdt->feed_dev_name, logic_wdt->feed_reg,
+        logic_wdt->active_val, logic_wdt->logic_func_mode);
+
+    return 0;
+}
+
+static int gpio_wdt_init(wb_wdt_priv_t *priv, wb_wdt_device_t *wb_wdt_device)
+{
+    struct device *dev;
+    gpio_wdt_info_t *gpio_wdt;
+    enum of_gpio_flags flags;
+    uint32_t f = 0;
+    int ret;
+
+    dev = priv->dev;
+    gpio_wdt = &priv->gpio_wdt;
+
+    if (dev->of_node) {
+        gpio_wdt->gpio = of_get_gpio_flags(dev->of_node, 0, &flags);
+    } else {
+        gpio_wdt->gpio = wb_wdt_device->wdt_config_mode.gpio_wdt.gpio;
+        flags = wb_wdt_device->wdt_config_mode.gpio_wdt.flags;
+    }
+    if (!gpio_is_valid(gpio_wdt->gpio)) {
+        dev_err(dev, "gpio is invalid.\n");
+        return gpio_wdt->gpio;
+    }
+
+    gpio_wdt->active_low = flags & OF_GPIO_ACTIVE_LOW;
+
+    if(priv->hw_algo == HW_ALGO_TOGGLE) {
+        f = GPIOF_IN;
+    } else {
+        f = gpio_wdt->active_low ? GPIOF_OUT_INIT_HIGH : GPIOF_OUT_INIT_LOW;
+    }
+
+    ret = devm_gpio_request_one(dev, gpio_wdt->gpio, f,
+                dev_name(dev));
+    if (ret) {
+        dev_err(dev, "devm_gpio_request_one failed.\n");
+        return ret;
+    }
+
+    gpio_wdt->state = gpio_wdt->active_low;
+    gpio_direction_output(gpio_wdt->gpio, gpio_wdt->state);
+
+    WDT_VERBOSE("active_low:%d\n", gpio_wdt->active_low);
+    return 0;
+}
+
+static ssize_t set_wdt_sysfs_value(struct device *dev, struct device_attribute *da,
+                        const char *buf, size_t count)
+{
+    wb_wdt_priv_t *priv = dev_get_drvdata(dev);
+    int ret, val;
+
+    val = 0;
+    sscanf(buf, "%d", &val);
+    WDT_VERBOSE("set wdt, val:%d.\n", val);
+
+    if (val < 0 || val > 255) {
+        WDT_ERROR("set wdt val %d failed.\n", val);
+        return -EINVAL;
+    }
+
+    mutex_lock(&priv->update_lock);
+
+    ret = wb_wdt_enable_ctrl(priv, val);
+    if (ret < 0) {
+        WDT_ERROR("set wdt sysfs value:%u failed.\n", val);
+        goto fail;
+    }
+
+    WDT_VERBOSE("set wdt sysfs value:%u successed.\n", val);
+    mutex_unlock(&priv->update_lock);
+    return count;
+
+fail:
+    mutex_unlock(&priv->update_lock);
+    return ret;
+}
+
+static ssize_t show_wdt_sysfs_value(struct device *dev,
+                        struct device_attribute *da, char *buf)
+{
+    wb_wdt_priv_t *priv = dev_get_drvdata(dev);
+    uint8_t val, status;
+    int ret;
+
+    mutex_lock(&priv->update_lock);
+
+    ret = wb_wdt_read(priv->priv_func_mode, priv->config_dev_name,
+                priv->enable_reg, &val, ONE_BYTE);
+    if (ret < 0) {
+        dev_err(priv->dev, "read wdt enable reg val error.\n");
+        goto fail;
+    }
+
+    val &= priv->enable_mask;
+    if (val == priv->enable_val) {
+        status = WDT_ON;
+    } else if(val == priv->disable_val) {
+        status = WDT_OFF;
+    } else {
+        WDT_ERROR("enable reg read val not match set val, read val:%u, mask:%u, enable_val:%u, disable_val:%u",
+            val, priv->enable_mask, priv->enable_val, priv->disable_val);
+        ret = -EIO;
+        goto fail;
+    }
+
+    WDT_VERBOSE("read_val:%u, mask:%u, enable_val:%u, disable_val:%u, status:%u",
+        val, priv->enable_mask, priv->enable_val, priv->disable_val, status);
+
+    mutex_unlock(&priv->update_lock);
+    return sprintf(buf, "%u\n", status);
+
+fail:
+    mutex_unlock(&priv->update_lock);
+    return ret;
+}
+
+static SENSOR_DEVICE_ATTR(wdt_status, S_IRUGO | S_IWUSR, show_wdt_sysfs_value, set_wdt_sysfs_value, 0);
+
+static struct attribute *wdt_sysfs_attrs[] = {
+    &sensor_dev_attr_wdt_status.dev_attr.attr,
+    NULL
+};
+
+static const struct attribute_group wdt_sysfs_group = {
+    .attrs = wdt_sysfs_attrs,
+};
+
+struct wdt_attr_match_group {
+    uint8_t index;
+    const struct attribute_group *attr_group_ptr;
+};
+
+static struct wdt_attr_match_group g_wdt_attr_match[] = {
+    {0, &wdt_sysfs_group},
+};
+
+static const struct attribute_group *wdt_get_attr_group(uint32_t index)
+{
+    int i;
+    struct wdt_attr_match_group *group;
+
+    for (i = 0; i < ARRAY_SIZE(g_wdt_attr_match); i++) {
+        group = &g_wdt_attr_match[i];
+        if (index == group->index) {
+            WDT_VERBOSE("get wdt attr, index:%u.\n", index);
+            return group->attr_group_ptr;
+        }
+    }
+
+    return NULL;
+}
+
+static int wb_wdt_probe(struct platform_device *pdev)
+{
+    wb_wdt_priv_t *priv;
+    int ret;
+    const char *algo;
+    wb_wdt_device_t *wb_wdt_device;
+
+    priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
+    if (!priv) {
+        dev_err(&pdev->dev, "devm_kzalloc failed.\n");
+        return -ENOMEM;
+    }
+
+    platform_set_drvdata(pdev, priv);
+
+    if (pdev->dev.of_node) {
+        ret = 0;
+        ret += of_property_read_string(pdev->dev.of_node, "config_dev_name", &priv->config_dev_name);
+        ret += of_property_read_string(pdev->dev.of_node, "hw_algo", &algo);
+        ret += of_property_read_u8(pdev->dev.of_node, "config_mode", &priv->config_mode);
+        ret += of_property_read_u8(pdev->dev.of_node, "priv_func_mode", &priv->priv_func_mode);
+        ret += of_property_read_u8(pdev->dev.of_node, "enable_val", &priv->enable_val);
+        ret += of_property_read_u8(pdev->dev.of_node, "disable_val", &priv->disable_val);
+        ret += of_property_read_u8(pdev->dev.of_node, "enable_mask", &priv->enable_mask);
+        ret += of_property_read_u32(pdev->dev.of_node, "enable_reg", &priv->enable_reg);
+        ret += of_property_read_u32(pdev->dev.of_node, "timeout_cfg_reg", &priv->timeout_cfg_reg);
+        ret += of_property_read_u32(pdev->dev.of_node,"hw_margin_ms", &priv->hw_margin);
+        ret += of_property_read_u8(pdev->dev.of_node,"feed_wdt_type", &priv->feed_wdt_type);
+        ret += of_property_read_u32(pdev->dev.of_node,"timer_accuracy", &priv->timer_accuracy);
+        if (ret != 0) {
+            dev_err(&pdev->dev, "Failed to priv dts.\n");
+            return -ENXIO;
+        }
+
+        priv->sysfs_index = SYSFS_NO_CFG;
+        of_property_read_u8(pdev->dev.of_node,"sysfs_index", &priv->sysfs_index);
+
+        priv->timeleft_cfg_reg = priv->timeout_cfg_reg;
+        of_property_read_u32(pdev->dev.of_node,"timeleft_cfg_reg", &priv->timeleft_cfg_reg);
+
+        /* timer accuracy register is optional */
+        ret = of_property_read_u8(pdev->dev.of_node,"timer_accuracy_reg_flag", &priv->timer_accuracy_reg_flag);
+        if (ret < 0) {
+            /* case: don't has timer_accuracy_reg */
+            dev_dbg(&pdev->dev, "Failed to get property in dts: timer_accuracy_reg_flag.\n");
+            priv->timer_accuracy_reg_flag = 0;
+        } else {
+            ret = of_property_read_u32(pdev->dev.of_node, "timer_accuracy_reg", &priv->timer_accuracy_reg);
+            if (ret < 0) {
+                dev_err(&pdev->dev, "Failed to get timer accuracy register address.\n");
+                return -ENXIO;
+            }
+            ret = of_property_read_u8(pdev->dev.of_node, "timer_accuracy_reg_val", &priv->timer_accuracy_reg_val);
+            if (ret < 0) {
+                dev_err(&pdev->dev, "Failed to get timer accuracy register value.\n");
+                return -ENXIO;
+            }
+        }
+
+        /* timer update register is optional */
+        ret = of_property_read_u8(pdev->dev.of_node,"timer_update_reg_flag", &priv->timer_update_reg_flag);
+        if (ret < 0) {
+            /* case: don't has timer_update_reg */
+            dev_dbg(&pdev->dev, "Failed to get property in dts: timer_update_reg_flag.\n");
+            priv->timer_update_reg_flag = 0; /* no timer update register */
+        } else {
+            ret = of_property_read_u32(pdev->dev.of_node, "timer_update_reg", &priv->timer_update_reg);
+            if (ret < 0) {
+                dev_err(&pdev->dev, "Failed to get timer update register address.\n");
+                return -ENXIO;
+            }
+            ret = of_property_read_u8(pdev->dev.of_node, "timer_update_reg_val", &priv->timer_update_reg_val);
+            if (ret < 0) {
+                dev_err(&pdev->dev, "Failed to get timer update register value.\n");
+                return -ENXIO;
+            }
+        }
+    } else {
+        if (pdev->dev.platform_data == NULL) {
+            dev_err(&pdev->dev, "Failed to get platform data config.\n");
+            return -ENXIO;
+        }
+        wb_wdt_device = pdev->dev.platform_data;
+        priv->config_dev_name = wb_wdt_device->config_dev_name;
+        algo = wb_wdt_device->hw_algo;
+        priv->config_mode = wb_wdt_device->config_mode;
+        priv->priv_func_mode = wb_wdt_device->priv_func_mode;
+        priv->enable_val = wb_wdt_device->enable_val;
+        priv->disable_val = wb_wdt_device->disable_val;
+        priv->enable_mask = wb_wdt_device->enable_mask;
+        priv->enable_reg = wb_wdt_device->enable_reg;
+        priv->timeout_cfg_reg = wb_wdt_device->timeout_cfg_reg;
+        priv->hw_margin = wb_wdt_device->hw_margin;
+        priv->timer_accuracy = wb_wdt_device->timer_accuracy;
+        priv->feed_wdt_type = wb_wdt_device->feed_wdt_type;
+        priv->sysfs_index = wb_wdt_device->sysfs_index;
+        priv->timeleft_cfg_reg = wb_wdt_device->timeleft_cfg_reg;
+        priv->timer_accuracy_reg_flag = wb_wdt_device->timer_accuracy_reg_flag;
+        priv->timer_accuracy_reg = wb_wdt_device->timer_accuracy_reg;
+        priv->timer_accuracy_reg_val = wb_wdt_device->timer_accuracy_reg_val;
+        priv->timer_update_reg_flag = wb_wdt_device->timer_update_reg_flag;
+        priv->timer_update_reg = wb_wdt_device->timer_update_reg;
+        priv->timer_update_reg_val = wb_wdt_device->timer_update_reg_val;
+    }
+
+    if (!strcmp(algo, "toggle")) {
+        priv->hw_algo = HW_ALGO_TOGGLE;
+    } else if (!strcmp(algo, "level")) {
+        priv->hw_algo = HW_ALGO_LEVEL;
+    } else if (!strcmp(algo, "eigenvalues")) {
+        priv->hw_algo = HW_ALGO_EIGENVALUES;
+    } else {
+        dev_err(&pdev->dev, "hw_algo config error.must be toggle or level.\n");
+        return -EINVAL;
+    }
+
+    WDT_VERBOSE("config_dev_name:%s, config_mode:%u, priv_func_mode:%u, enable_reg:0x%x, timeout_cfg_reg:0x%x\n",
+        priv->config_dev_name, priv->config_mode, priv->priv_func_mode, priv->enable_reg, priv->timeout_cfg_reg);
+    WDT_VERBOSE("timeout_cfg_reg:0x%x, enable_val:0x%x, disable_val:0x%x, enable_mask:0x%x, hw_margin:%u, feed_wdt_type:%u\n",
+        priv->timeleft_cfg_reg, priv->enable_val, priv->disable_val, priv->enable_mask, priv->hw_margin, priv->feed_wdt_type);
+    WDT_VERBOSE("timer_accuracy_reg_flag: %d, timer_accuracy_reg: 0x%x, timer_accuracy_reg_val: 0x%x, timer_accuracy: %d\n",
+        priv->timer_accuracy_reg_flag, priv->timer_accuracy_reg, priv->timer_accuracy_reg_val, priv->timer_accuracy);
+    WDT_VERBOSE("timer_update_reg_flag: %d, timer_update_reg: 0x%x, timer_update_reg_val: 0x%x\n", priv->timer_update_reg_flag,
+        priv->timer_update_reg, priv->timer_update_reg_val);
+
+    priv->dev = &pdev->dev;
+    if (priv->config_mode == GPIO_FEED_WDT_MODE) {
+        ret = gpio_wdt_init(priv, wb_wdt_device);
+        if (ret < 0) {
+            dev_err(&pdev->dev, "init gpio mode wdt failed.\n");
+            return -ENXIO;
+        }
+    } else if (priv->config_mode == LOGIC_FEED_WDT_MODE) {
+        ret = logic_wdt_init(priv, wb_wdt_device);
+        if (ret < 0) {
+            dev_err(&pdev->dev, "init func mode wdt failed.\n");
+            return -ENXIO;
+        }
+    } else {
+        dev_err(&pdev->dev, "unsupport %u config_mode, dts configure error.\n",
+            priv->config_mode);
+        return -ENXIO;
+    }
+
+    switch (priv->feed_wdt_type) {
+    case WATCHDOG_DEVICE_TYPE:
+        ret = watchdog_device_cfg(priv);
+        break;
+    case HRTIMER_TYPE:
+        ret = hrtimer_cfg(priv, wb_wdt_device);
+        break;
+    case THREAD_TYPE:
+        ret = thread_timer_create(priv, wb_wdt_device);
+        break;
+    default:
+        dev_err(&pdev->dev, "timer type %u unsupport.\n", priv->feed_wdt_type);
+        return -EINVAL;
+    }
+    if (ret < 0) {
+        dev_err(&pdev->dev, "init timer feed_wdt_type %u failed.\n", priv->feed_wdt_type);
+        return -ENXIO;
+    }
+
+    dev_info(&pdev->dev, "register %s mode, config_mode %u, func_mode %u, %u ms overtime wdt success\n",
+        algo, priv->config_mode, priv->priv_func_mode, priv->hw_margin);
+
+    if (priv->sysfs_index != SYSFS_NO_CFG) {
+
+        priv->sysfs_group = wdt_get_attr_group(priv->sysfs_index);
+        if (priv->sysfs_group) {
+            ret = sysfs_create_group(&pdev->dev.kobj, priv->sysfs_group);
+            if (ret != 0) {
+                dev_err(&pdev->dev, "sysfs_create_group failed. ret:%d.\n", ret);
+                return -ENOMEM;
+            }
+            dev_info(&pdev->dev, "sysfs create group success\n");
+        } else {
+            dev_err(&pdev->dev, "failed to find %u index wdt, return NULL.\n", priv->sysfs_index);
+            return -ENOMEM;
+        }
+
+        mutex_init(&priv->update_lock);
+
+        dev_info(&pdev->dev, "register %u index wdt sysfs success." ,priv->sysfs_index);
+    }
+
+    return 0;
+}
+
+static void unregister_action(struct platform_device *pdev)
+{
+    wb_wdt_priv_t *priv = platform_get_drvdata(pdev);
+    gpio_wdt_info_t *gpio_wdt;
+    logic_wdt_info_t *logic_wdt;
+    int ret;
+
+    ret = wb_wdt_enable_ctrl(priv, WDT_OFF);
+    if (ret < 0) {
+        dev_err(&pdev->dev, "remove disable wdt failed.\n");
+    }
+
+    if (priv->sysfs_index != SYSFS_NO_CFG) {
+       sysfs_remove_group(&pdev->dev.kobj, priv->sysfs_group);
+    }
+
+    if (priv->feed_wdt_type == HRTIMER_TYPE) {
+        hrtimer_cancel(&priv->hrtimer);
+    } else if (priv->feed_wdt_type == THREAD_TYPE) {
+        kthread_stop(priv->thread);
+        priv->thread = NULL;
+    } else {
+        WDT_VERBOSE("wdd type, do nothing.\n");
+    }
+
+    if (priv->config_mode == GPIO_FEED_WDT_MODE) {
+        gpio_wdt = &priv->gpio_wdt;
+        gpio_set_value_cansleep(gpio_wdt->gpio, !gpio_wdt->active_low);
+
+        if (priv->hw_algo == HW_ALGO_TOGGLE) {
+            gpio_direction_input(gpio_wdt->gpio);
+        }
+    } else {
+        logic_wdt = &priv->logic_wdt;
+        logic_wdt->state_val = !logic_wdt->state_val;
+        ret = wb_wdt_write(logic_wdt->logic_func_mode, logic_wdt->feed_dev_name,
+                    logic_wdt->feed_reg, &logic_wdt->state_val, ONE_BYTE);
+        if (ret < 0) {
+            dev_err(&pdev->dev, "set wdt control reg error.\n");
+        }
+    }
+
+    return;
+}
+
+static int wb_wdt_remove(struct platform_device *pdev)
+{
+    WDT_VERBOSE("enter remove wdt.\n");
+    unregister_action(pdev);
+    dev_info(&pdev->dev, "remove wdt finish.\n");
+
+    return 0;
+}
+
+static void wb_wdt_shutdown(struct platform_device *pdev)
+{
+    WDT_VERBOSE("enter shutdown wdt.\n");
+    unregister_action(pdev);
+    dev_info(&pdev->dev, "shutdown wdt finish.\n");
+
+    return;
+}
+
+static const struct of_device_id wb_wdt_dt_ids[] = {
+    { .compatible = "wb_wdt", },
+    { }
+};
+MODULE_DEVICE_TABLE(of, wb_wdt_dt_ids);
+
+static struct platform_driver wb_wdt_driver = {
+    .driver = {
+        .name       = "wb_wdt",
+        .of_match_table = wb_wdt_dt_ids,
+    },
+    .probe  = wb_wdt_probe,
+    .remove = wb_wdt_remove,
+    .shutdown = wb_wdt_shutdown,
+};
+
+#ifdef CONFIG_GPIO_WATCHDOG_ARCH_INITCALL
+static int __init wb_wdt_init(void)
+{
+    return platform_driver_register(&wb_wdt_driver);
+}
+arch_initcall(wb_wdt_init);
+#else
+module_platform_driver(wb_wdt_driver);
+#endif
+
+MODULE_AUTHOR("support");
+MODULE_DESCRIPTION("watchdog driver");
+MODULE_LICENSE("GPL");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_wdt.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_wdt.h
new file mode 100644
index 000000000..d45904ba3
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_wdt.h
@@ -0,0 +1,53 @@
+#ifndef __WB_WDT_H__
+#define __WB_WDT_H__
+
+#include <linux/of_gpio.h>
+
+#define SYSFS_NO_CFG         (0xff)
+#define INVALID_REG_ADDR     (0xffffffff)
+
+typedef struct gpio_wdt_info_s {
+    int       gpio;
+    enum of_gpio_flags  flags;
+    bool      active_low;
+    bool      state;
+}gpio_wdt_info_t;
+
+typedef struct logic_wdt_info_s {
+    const char  *feed_dev_name;
+    uint8_t     logic_func_mode;
+    uint32_t    feed_reg;
+    uint8_t     active_val;
+    uint8_t     state_val;
+}logic_wdt_info_t;
+
+typedef struct wb_wdt_device_s {
+    int         device_flag;
+    const char  *config_dev_name;
+    uint8_t     config_mode;
+    const char  *hw_algo;
+    uint8_t     enable_val;
+    uint8_t     disable_val;
+    uint8_t     enable_mask;
+    uint8_t     priv_func_mode;
+    uint8_t     feed_wdt_type;
+    uint32_t    enable_reg;
+    uint32_t    timeout_cfg_reg;
+    uint32_t    timeleft_cfg_reg;
+    uint32_t    hw_margin;
+    uint32_t    feed_time;
+    uint8_t     timer_accuracy_reg_flag;
+    uint32_t    timer_accuracy_reg;
+    uint8_t     timer_accuracy_reg_val;
+    uint32_t    timer_accuracy;
+    uint8_t     timer_update_reg_flag;
+    uint32_t    timer_update_reg;
+    uint8_t     timer_update_reg_val;
+    union {
+        gpio_wdt_info_t gpio_wdt;
+        logic_wdt_info_t logic_wdt;
+    } wdt_config_mode;
+    uint8_t sysfs_index;
+} wb_wdt_device_t;
+
+#endif
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_xdpe132g5c.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_xdpe132g5c.c
new file mode 100644
index 000000000..51c5b4143
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_xdpe132g5c.c
@@ -0,0 +1,579 @@
+/*
+ * xdpe132g5c_i2c_drv.c
+ *
+ * This module create sysfs to set AVS and create hwmon to get out power
+ * through xdpe132g5c I2C address.
+ *
+ * History
+ *  [Version]                [Date]                    [Description]
+ *   *  v1.0                2021-09-17                  Initial version
+ */
+
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/slab.h>
+#include <linux/i2c.h>
+#include <linux/hwmon.h>
+#include <linux/hwmon-sysfs.h>
+#include <linux/err.h>
+#include <linux/mutex.h>
+#include <linux/fs.h>
+#include <linux/uaccess.h>
+#include <linux/delay.h>
+
+#define WB_I2C_RETRY_SLEEP_TIME          (10000)   /* 10ms */
+#define WB_I2C_RETRY_TIME                (10)
+#define WB_XDPE_I2C_PAGE_ADDR            (0xff)
+#define WB_XDPE_I2C_VOUT_MODE            (0x40)
+#define WB_XDPE_I2C_VOUT_COMMAND         (0x42)
+#define WB_XDPE_I2C_VOUT_PAGE            (0x06)
+#define WB_XDPE_VOUT_MAX_THRESHOLD       ((0xFFFF * 1000L * 1000L) / (256))
+#define WB_XDPE_VOUT_MIN_THRESHOLD       (0)
+
+static int g_wb_xdpe_debug = 0;
+static int g_wb_xdpe_error = 0;
+
+module_param(g_wb_xdpe_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_xdpe_error, int, S_IRUGO | S_IWUSR);
+
+#define WB_XDPE_VERBOSE(fmt, args...) do {                                        \
+    if (g_wb_xdpe_debug) { \
+        printk(KERN_INFO "[WB_XDPE][VER][func:%s line:%d]\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define WB_XDPE_ERROR(fmt, args...) do {                                        \
+    if (g_wb_xdpe_error) { \
+        printk(KERN_ERR "[WB_XDPE][ERR][func:%s line:%d]\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+struct xdpe_data {
+    struct i2c_client *client;
+    struct device *hwmon_dev;
+    struct mutex update_lock;
+    long vout_max;
+    long vout_min;
+};
+
+typedef struct xdpe_vout_data_s {
+    u8 vout_mode;
+    int vout_precision;
+} xdpe_vout_data_t;
+
+static xdpe_vout_data_t g_xdpe_vout_group[] = {
+    {.vout_mode = 0x18, .vout_precision = 256},
+    {.vout_mode = 0x17, .vout_precision = 512},
+    {.vout_mode = 0x16, .vout_precision = 1024},
+    {.vout_mode = 0x15, .vout_precision = 2048},
+    {.vout_mode = 0x14, .vout_precision = 4096},
+};
+
+static s32 wb_i2c_smbus_read_byte_data(const struct i2c_client *client, u8 command)
+{
+    int i;
+    s32 ret;
+
+    for (i = 0; i < WB_I2C_RETRY_TIME; i++) {
+        ret = i2c_smbus_read_byte_data(client, command);
+        if (ret >= 0) {
+            return ret;
+        }
+        usleep_range(WB_I2C_RETRY_SLEEP_TIME, WB_I2C_RETRY_SLEEP_TIME + 1);
+    }
+    return ret;
+}
+
+static s32 wb_i2c_smbus_write_byte_data(const struct i2c_client *client, u8 command, u8 value)
+{
+    int i;
+    s32 ret;
+
+    for (i = 0; i < WB_I2C_RETRY_TIME; i++) {
+        ret = i2c_smbus_write_byte_data(client, command, value);
+        if (ret >= 0) {
+            return ret;
+        }
+        usleep_range(WB_I2C_RETRY_SLEEP_TIME, WB_I2C_RETRY_SLEEP_TIME + 1);
+    }
+    return ret;
+}
+
+static s32 wb_i2c_smbus_read_word_data(const struct i2c_client *client, u8 command)
+{
+    int i;
+    s32 ret;
+
+    for (i = 0; i < WB_I2C_RETRY_TIME; i++) {
+        ret = i2c_smbus_read_word_data(client, command);
+        if (ret >= 0) {
+            return ret;
+        }
+        usleep_range(WB_I2C_RETRY_SLEEP_TIME, WB_I2C_RETRY_SLEEP_TIME + 1);
+    }
+    return ret;
+}
+
+static s32 wb_i2c_smbus_write_word_data(const struct i2c_client *client, u8 command,
+               u16 value)
+{
+    int i;
+    s32 ret;
+
+    for (i = 0; i < WB_I2C_RETRY_TIME; i++) {
+        ret = i2c_smbus_write_word_data(client, command, value);
+        if (ret >= 0) {
+            return ret;
+        }
+        usleep_range(WB_I2C_RETRY_SLEEP_TIME, WB_I2C_RETRY_SLEEP_TIME + 1);
+    }
+    return ret;
+}
+
+static long calc_power_linear11_data(int data)
+{
+    s16 exponent;
+    s32 mantissa;
+    long val;
+
+    exponent = ((s16)data) >> 11;
+    mantissa = ((s16)((data & 0x7ff) << 5)) >> 5;
+    val = mantissa;
+    val = val * 1000L * 1000L;
+
+    if (exponent >= 0) {
+        val <<= exponent;
+    } else {
+        val >>= -exponent;
+    }
+    return val;
+}
+
+static int read_xdpe_power_value(const struct i2c_client *client, u8 page, u8 reg, long *value)
+{
+    int ret, data;
+
+    ret = wb_i2c_smbus_write_byte_data(client, WB_XDPE_I2C_PAGE_ADDR, page);
+    if (ret < 0) {
+        WB_XDPE_ERROR("%d-%04x: set xdpe page%u failed, ret: %d\n", client->adapter->nr,
+            client->addr, page, ret);
+        return ret;
+    }
+    data = wb_i2c_smbus_read_word_data(client, reg);
+    if (data < 0) {
+        WB_XDPE_ERROR("%d-%04x: read xdpe page%u reg: 0x%x failed, ret: %d\n",
+            client->adapter->nr, client->addr, page, reg, data);
+        return data;
+    }
+    *value = calc_power_linear11_data(data);
+    WB_XDPE_VERBOSE("%d-%04x: page%u reg: 0x%x rd_data: 0x%x, decode linear11 value: %ld\n",
+        client->adapter->nr, client->addr, page, reg, data, *value);
+    return 0;
+}
+
+static ssize_t xdpe_power_value_show(struct device *dev, struct device_attribute *da,
+                   char *buf)
+{
+    int ret, ori_page;
+    u16 sensor_h, sensor_l;
+    u8 page, reg;
+    struct sensor_device_attribute *attr;
+    struct i2c_client *client;
+    struct xdpe_data *data;
+    long value1, value2;
+
+    data = dev_get_drvdata(dev);
+    client = data->client;
+    attr = to_sensor_dev_attr(da);
+    sensor_h = ((attr->index) >> 16) & 0xffff;
+    sensor_l = (attr->index) & 0xffff;
+
+    mutex_lock(&data->update_lock);
+
+    ori_page = wb_i2c_smbus_read_byte_data(client, WB_XDPE_I2C_PAGE_ADDR);
+    if (ori_page < 0) {
+        WB_XDPE_ERROR("%d-%04x: read xdpe origin page failed, ret: %d\n", client->adapter->nr,
+            client->addr, ori_page);
+        mutex_unlock(&data->update_lock);
+        return ori_page;
+    }
+    value1 = 0;
+    value2 = 0;
+
+    if (sensor_h) {
+        page = (sensor_h >> 8) & 0xff;
+        reg = sensor_h & 0xff;
+        ret = read_xdpe_power_value(client, page, reg, &value1);
+        if (ret < 0) {
+            WB_XDPE_ERROR("%d-%04x: read xdpe sensor high sensor page%u reg: 0x%x failed, ret: %d\n",
+                client->adapter->nr, client->addr, page, reg, ret);
+            goto error;
+        }
+        WB_XDPE_VERBOSE("%d-%04x: read xdpe sensor high sensor page%u reg: 0x%x success, value: %ld\n",
+            client->adapter->nr, client->addr, page, reg, value1);
+    }
+
+    page = (sensor_l >> 8) & 0xff;
+    reg = sensor_l & 0xff;
+    ret = read_xdpe_power_value(client, page, reg, &value2);
+    if (ret < 0) {
+        WB_XDPE_ERROR("%d-%04x: read xdpe sensor low sensor page%u reg: 0x%x failed, ret: %d\n",
+            client->adapter->nr, client->addr, page, reg, ret);
+        goto error;
+    }
+    WB_XDPE_VERBOSE("%d-%04x: read xdpe sensor low sensor page%u reg: 0x%x success, value: %ld\n",
+        client->adapter->nr, client->addr, page, reg, value2);
+
+    wb_i2c_smbus_write_byte_data(client, WB_XDPE_I2C_PAGE_ADDR, ori_page);
+    mutex_unlock(&data->update_lock);
+    return snprintf(buf, PAGE_SIZE, "%ld\n", value1 + value2);
+error:
+    wb_i2c_smbus_write_byte_data(client, WB_XDPE_I2C_PAGE_ADDR, ori_page);
+    mutex_unlock(&data->update_lock);
+    return ret;
+}
+
+static int xdpe_get_vout_precision(const struct i2c_client *client, int *vout_precision)
+{
+    int i, vout_mode, a_size;
+
+    vout_mode = wb_i2c_smbus_read_byte_data(client, WB_XDPE_I2C_VOUT_MODE);
+    if (vout_mode < 0) {
+        WB_XDPE_ERROR("%d-%04x: read xdpe vout mode reg: 0x%x failed, ret: %d\n",
+            client->adapter->nr, client->addr, WB_XDPE_I2C_VOUT_MODE, vout_mode);
+        return vout_mode;
+    }
+
+    a_size = ARRAY_SIZE(g_xdpe_vout_group);
+    for (i = 0; i < a_size; i++) {
+        if (g_xdpe_vout_group[i].vout_mode == vout_mode) {
+            *vout_precision = g_xdpe_vout_group[i].vout_precision;
+            WB_XDPE_VERBOSE("%d-%04x: match, vout mode: 0x%x, precision: %d\n",
+                client->adapter->nr, client->addr, vout_mode, *vout_precision);
+            break;
+        }
+    }
+    if (i == a_size) {
+        WB_XDPE_ERROR("%d-%04x: invalid vout mode: 0x%x\n",client->adapter->nr, client->addr,
+            vout_mode);
+        return -EINVAL;
+    }
+    return 0;
+}
+
+static ssize_t xdpe_avs_vout_show(struct device *dev, struct device_attribute *da, char *buf)
+{
+    int ret, ori_page, vout_cmd, vout_precision;
+    struct i2c_client *client;
+    struct xdpe_data *data;
+    long vout;
+
+    client = to_i2c_client(dev);
+    data = i2c_get_clientdata(client);
+
+    mutex_lock(&data->update_lock);
+
+    ori_page = wb_i2c_smbus_read_byte_data(client, WB_XDPE_I2C_PAGE_ADDR);
+    if (ori_page < 0) {
+        WB_XDPE_ERROR("%d-%04x: read xdpe origin page failed, ret: %d\n", client->adapter->nr,
+            client->addr, ori_page);
+        mutex_unlock(&data->update_lock);
+        return ori_page;
+    }
+
+    ret = wb_i2c_smbus_write_byte_data(client, WB_XDPE_I2C_PAGE_ADDR, WB_XDPE_I2C_VOUT_PAGE);
+    if (ret < 0) {
+        WB_XDPE_ERROR("%d-%04x: set xdpe avs vout page%u failed, ret: %d\n", client->adapter->nr,
+            client->addr, WB_XDPE_I2C_VOUT_PAGE, ret);
+        goto error;
+    }
+
+    ret = xdpe_get_vout_precision(client, &vout_precision);
+    if (ret < 0) {
+        WB_XDPE_ERROR("%d-%04x: get xdpe avs vout precision failed, ret: %d\n",
+            client->adapter->nr, client->addr, ret);
+        goto error;
+    }
+
+    vout_cmd = wb_i2c_smbus_read_word_data(client, WB_XDPE_I2C_VOUT_COMMAND);
+    if (vout_cmd < 0) {
+        ret = vout_cmd;
+        WB_XDPE_ERROR("%d-%04x: read xdpe vout command reg: 0x%x failed, ret: %d\n",
+            client->adapter->nr, client->addr, WB_XDPE_I2C_VOUT_COMMAND, ret);
+        goto error;
+    }
+
+    wb_i2c_smbus_write_byte_data(client, WB_XDPE_I2C_PAGE_ADDR, ori_page);
+    mutex_unlock(&data->update_lock);
+
+    vout = vout_cmd * 1000L * 1000L / vout_precision;
+    WB_XDPE_VERBOSE("%d-%04x: vout: %ld, vout_cmd: 0x%x, precision: %d\n", client->adapter->nr,
+        client->addr, vout, vout_cmd, vout_precision);
+    return snprintf(buf, PAGE_SIZE, "%ld\n", vout);
+error:
+    wb_i2c_smbus_write_byte_data(client, WB_XDPE_I2C_PAGE_ADDR, ori_page);
+    mutex_unlock(&data->update_lock);
+    return ret;
+}
+
+static ssize_t xdpe_avs_vout_store(struct device *dev, struct device_attribute *da,
+                   const char *buf, size_t count)
+{
+    int ret, ori_page, vout_cmd, vout_cmd_set, vout_precision;
+    struct i2c_client *client;
+    struct xdpe_data *data;
+    long vout, vout_max, vout_min;
+
+    client = to_i2c_client(dev);
+    ret = kstrtol(buf, 0, &vout);
+    if (ret) {
+        WB_XDPE_ERROR("%d-%04x: invalid value: %s \n", client->adapter->nr, client->addr, buf);
+        return -EINVAL;
+    }
+
+    if (vout <= 0) {
+        WB_XDPE_ERROR("%d-%04x: invalid value: %ld \n", client->adapter->nr, client->addr, vout);
+        return -EINVAL;
+    }
+
+    data = i2c_get_clientdata(client);
+    vout_max = data->vout_max;
+    vout_min = data->vout_min;
+    if ((vout > vout_max) || (vout < vout_min)) {
+        WB_XDPE_ERROR("%d-%04x: vout value: %ld, out of range [%ld, %ld] \n", client->adapter->nr,
+            client->addr, vout, vout_min, vout_max);
+        return -EINVAL;
+    }
+
+    mutex_lock(&data->update_lock);
+
+    ori_page = wb_i2c_smbus_read_byte_data(client, WB_XDPE_I2C_PAGE_ADDR);
+    if (ori_page < 0) {
+        WB_XDPE_ERROR("%d-%04x: read xdpe origin page failed, ret: %d\n", client->adapter->nr,
+            client->addr, ori_page);
+        mutex_unlock(&data->update_lock);
+        return ori_page;
+    }
+
+    ret = wb_i2c_smbus_write_byte_data(client, WB_XDPE_I2C_PAGE_ADDR, WB_XDPE_I2C_VOUT_PAGE);
+    if (ret < 0) {
+        WB_XDPE_ERROR("%d-%04x: set xdpe avs vout page%u failed, ret: %d\n", client->adapter->nr,
+            client->addr, WB_XDPE_I2C_VOUT_PAGE, ret);
+        goto error;
+    }
+
+    ret = xdpe_get_vout_precision(client, &vout_precision);
+    if (ret < 0) {
+        WB_XDPE_ERROR("%d-%04x: get xdpe avs vout precision failed, ret: %d\n",
+            client->adapter->nr, client->addr, ret);
+        goto error;
+    }
+
+    vout_cmd_set = (vout * vout_precision) / (1000L * 1000L);
+    if (vout_cmd_set > 0xffff) {
+        WB_XDPE_ERROR("%d-%04x: invalid value, vout %ld, vout_precision: %d, vout_cmd_set: 0x%x\n",
+            client->adapter->nr, client->addr, vout, vout_precision, vout_cmd_set);
+        ret = -EINVAL;
+        goto error;
+    }
+    ret = wb_i2c_smbus_write_word_data(client, WB_XDPE_I2C_VOUT_COMMAND, vout_cmd_set);
+    if (ret < 0) {
+        WB_XDPE_ERROR("%d-%04x: set xdpe vout cmd reg: 0x%x,  value: 0x%x failed, ret: %d\n",
+            client->adapter->nr, client->addr, WB_XDPE_I2C_VOUT_COMMAND, vout_cmd_set, ret);
+        goto error;
+    }
+
+    vout_cmd = wb_i2c_smbus_read_word_data(client, WB_XDPE_I2C_VOUT_COMMAND);
+    if (vout_cmd < 0) {
+        ret = vout_cmd;
+        WB_XDPE_ERROR("%d-%04x: read xdpe vout command reg: 0x%x failed, ret: %d\n",
+            client->adapter->nr, client->addr, WB_XDPE_I2C_VOUT_COMMAND, ret);
+        goto error;
+    }
+    if (vout_cmd != vout_cmd_set) {
+        ret = -EIO;
+        WB_XDPE_ERROR("%d-%04x: vout cmd value check error, vout cmd read: 0x%x, vout cmd set: 0x%x\n",
+            client->adapter->nr, client->addr, vout_cmd, vout_cmd_set);
+        goto error;
+
+    }
+
+    wb_i2c_smbus_write_byte_data(client, WB_XDPE_I2C_PAGE_ADDR, ori_page);
+    mutex_unlock(&data->update_lock);
+    WB_XDPE_VERBOSE("%d-%04x: set vout cmd success, vout %ld, vout_precision: %d, vout_cmd_set: 0x%x\n",
+        client->adapter->nr, client->addr, vout, vout_precision, vout_cmd_set);
+    return count;
+error:
+    wb_i2c_smbus_write_byte_data(client, WB_XDPE_I2C_PAGE_ADDR, ori_page);
+    mutex_unlock(&data->update_lock);
+    return ret;
+}
+
+static ssize_t xdpe_avs_vout_max_show(struct device *dev, struct device_attribute *da, char *buf)
+{
+    struct i2c_client *client;
+    struct xdpe_data *data;
+    long vout_max;
+
+    client = to_i2c_client(dev);
+    data = i2c_get_clientdata(client);
+    vout_max = data->vout_max;
+    return snprintf(buf, PAGE_SIZE, "%ld\n", vout_max);
+}
+
+static ssize_t xdpe_avs_vout_max_store(struct device *dev, struct device_attribute *da,
+                   const char *buf, size_t count)
+{
+    int ret;
+    struct i2c_client *client;
+    struct xdpe_data *data;
+    long vout_max;
+
+    client = to_i2c_client(dev);
+    ret = kstrtol(buf, 10, &vout_max);
+    if (ret) {
+        WB_XDPE_ERROR("%d-%04x: invalid value: %s \n", client->adapter->nr, client->addr, buf);
+        return -EINVAL;
+    }
+    WB_XDPE_VERBOSE("%d-%04x: vout max threshold: %ld", client->adapter->nr, client->addr,
+        vout_max);
+    data = i2c_get_clientdata(client);
+    data->vout_max = vout_max;
+    return count;
+}
+
+static ssize_t xdpe_avs_vout_min_show(struct device *dev, struct device_attribute *da, char *buf)
+{
+    struct i2c_client *client;
+    struct xdpe_data *data;
+    long vout_min;
+
+    client = to_i2c_client(dev);
+    data = i2c_get_clientdata(client);
+    vout_min = data->vout_min;
+    return snprintf(buf, PAGE_SIZE, "%ld\n", vout_min);
+}
+
+static ssize_t xdpe_avs_vout_min_store(struct device *dev, struct device_attribute *da,
+                   const char *buf, size_t count)
+{
+    int ret;
+    struct i2c_client *client;
+    struct xdpe_data *data;
+    long vout_min;
+
+    client = to_i2c_client(dev);
+    ret = kstrtol(buf, 10, &vout_min);
+    if (ret) {
+        WB_XDPE_ERROR("%d-%04x: invalid value: %s \n", client->adapter->nr, client->addr, buf);
+        return -EINVAL;
+    }
+    WB_XDPE_VERBOSE("%d-%04x: vout min threshold: %ld", client->adapter->nr, client->addr,
+        vout_min);
+    data = i2c_get_clientdata(client);
+    data->vout_min = vout_min;
+    return count;
+}
+
+/* xdpe hwmon */
+static SENSOR_DEVICE_ATTR(power1_input, S_IRUGO ,xdpe_power_value_show, NULL, 0x072c);
+static SENSOR_DEVICE_ATTR(power2_input, S_IRUGO ,xdpe_power_value_show, NULL, 0x0b2c);
+static SENSOR_DEVICE_ATTR(power3_input, S_IRUGO  ,xdpe_power_value_show, NULL, 0x072c0b2c);
+
+static struct attribute *xdpe_hwmon_attrs[] = {
+    &sensor_dev_attr_power1_input.dev_attr.attr,
+    &sensor_dev_attr_power2_input.dev_attr.attr,
+    &sensor_dev_attr_power3_input.dev_attr.attr,
+    NULL
+};
+ATTRIBUTE_GROUPS(xdpe_hwmon);
+
+/* xdpe sysfs */
+static SENSOR_DEVICE_ATTR(avs_vout, S_IRUGO | S_IWUSR, xdpe_avs_vout_show, xdpe_avs_vout_store, 0);
+static SENSOR_DEVICE_ATTR(avs_vout_max, S_IRUGO | S_IWUSR, xdpe_avs_vout_max_show, xdpe_avs_vout_max_store, 0);
+static SENSOR_DEVICE_ATTR(avs_vout_min, S_IRUGO | S_IWUSR, xdpe_avs_vout_min_show, xdpe_avs_vout_min_store, 0);
+
+static struct attribute *xdpe132g5c_sysfs_attrs[] = {
+    &sensor_dev_attr_avs_vout.dev_attr.attr,
+    &sensor_dev_attr_avs_vout_max.dev_attr.attr,
+    &sensor_dev_attr_avs_vout_min.dev_attr.attr,
+    NULL,
+};
+
+static const struct attribute_group xdpe132g5c_sysfs_attrs_group = {
+    .attrs = xdpe132g5c_sysfs_attrs,
+};
+
+static int xdpe132g5c_probe(struct i2c_client *client, const struct i2c_device_id *id)
+{
+    struct xdpe_data *data;
+    int ret;
+
+    WB_XDPE_VERBOSE("bus: %d, addr: 0x%02x do probe.\n", client->adapter->nr, client->addr);
+    data = devm_kzalloc(&client->dev, sizeof(struct xdpe_data), GFP_KERNEL);
+    if (!data) {
+        dev_err(&client->dev, "devm_kzalloc failed.\n");
+        return -ENOMEM;
+    }
+
+    data->client = client;
+    i2c_set_clientdata(client, data);
+    mutex_init(&data->update_lock);
+
+    ret = sysfs_create_group(&client->dev.kobj, &xdpe132g5c_sysfs_attrs_group);
+    if (ret != 0) {
+        dev_err(&client->dev, "Create xdpe132g5c sysfs failed, ret: %d\n", ret);
+        return ret;
+    }
+    data->hwmon_dev = hwmon_device_register_with_groups(&client->dev, client->name, data,
+                          xdpe_hwmon_groups);
+    if (IS_ERR(data->hwmon_dev)) {
+        ret = PTR_ERR(data->hwmon_dev);
+        sysfs_remove_group(&client->dev.kobj, &xdpe132g5c_sysfs_attrs_group);
+        dev_err(&client->dev, "Failed to register xdpe hwmon device, ret: %d\n", ret);
+        return ret;
+    }
+    data->vout_max = WB_XDPE_VOUT_MAX_THRESHOLD;
+    data->vout_min = WB_XDPE_VOUT_MIN_THRESHOLD;
+    dev_info(&client->dev, "xdpe132g5c probe success\n");
+    return 0;
+}
+
+static void xdpe132g5c_remove(struct i2c_client *client)
+{
+    struct xdpe_data *data;
+
+    WB_XDPE_VERBOSE("bus: %d, addr: 0x%02x do remove\n", client->adapter->nr, client->addr);
+    data = i2c_get_clientdata(client);
+    hwmon_device_unregister(data->hwmon_dev);
+    sysfs_remove_group(&client->dev.kobj, &xdpe132g5c_sysfs_attrs_group);
+    return;
+}
+
+static const struct i2c_device_id xdpe132g5c_id[] = {
+    {"wb_xdpe132g5c", 0},
+    {}
+};
+
+MODULE_DEVICE_TABLE(i2c, xdpe132g5c_id);
+
+static const struct of_device_id __maybe_unused xdpe132g5c_of_match[] = {
+    {.compatible = "infineon,wb_xdpe132g5c"},
+    {}
+};
+MODULE_DEVICE_TABLE(of, xdpe132g5c_of_match);
+
+static struct i2c_driver wb_xdpe132g5c_driver = {
+    .driver = {
+        .name = "wb_xdpe132g5c",
+        .of_match_table = of_match_ptr(xdpe132g5c_of_match),
+    },
+    .probe      = xdpe132g5c_probe,
+    .remove     = xdpe132g5c_remove,
+    .id_table   = xdpe132g5c_id,
+};
+
+module_i2c_driver(wb_xdpe132g5c_driver);
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
+MODULE_DESCRIPTION("I2C driver for Infineon XDPE132 family");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/auto_update.py b/platform/broadcom/sonic-platform-modules-micas/common/script/auto_update.py
new file mode 100755
index 000000000..838e64f6b
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/auto_update.py
@@ -0,0 +1,196 @@
+#!/usr/bin/env python3
+
+try:
+    import os
+    import json
+    import logging
+    import sys
+    from sonic_py_common import device_info
+    from sonic_platform.platform import Platform
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found") from e
+
+PLATFORM_COMPONENTS_FILE = "platform_components.json"
+CHASSIS_KEY = "chassis"
+COMPONENT_KEY = "component"
+FIRMWARE_KEY = "firmware"
+VERSION_KEY = "version"
+chassis_component_map = {}
+current_chassis_component_map = {}
+current_chassis = Platform().get_chassis()
+
+
+def parse_component_section(section, component):
+    if not isinstance(component, dict):
+        logging.error("dictionary is expected: key=%s", COMPONENT_KEY)
+        return False
+
+    if not component:
+        return False
+
+    missing_key = None
+    chassis_component_map[section] = {}
+
+    for key1, value1 in component.items():
+        if not isinstance(value1, dict):
+            logging.error("dictionary is expected: key=%s", key1)
+            return False
+
+        if value1:
+            if len(value1) < 1 or len(value1) > 3:
+                logging.error("unexpected number of records: key=%s", key1)
+                return False
+
+            if FIRMWARE_KEY not in value1:
+                missing_key = FIRMWARE_KEY
+                break
+
+            for key2, value2 in value1.items():
+                if not isinstance(value2, str):
+                    logging.error("string is expected: key=%s", key2)
+                    return False
+
+            chassis_component_map[section][key1] = value1
+
+    if missing_key is not None:
+        logging.error("\"%s\" key hasn't been found", missing_key)
+        return False
+
+    return True
+
+
+def parse_chassis_section(chassis):
+    if not isinstance(chassis, dict):
+        logging.error("dictionary is expected: key=%s", CHASSIS_KEY)
+        return False
+
+    if not chassis:
+        logging.error("dictionary is empty: key=%s", CHASSIS_KEY)
+        return False
+
+    if len(chassis) != 1:
+        logging.error("unexpected number of records: key=%s", CHASSIS_KEY)
+        return False
+
+    for key, value in chassis.items():
+        if not isinstance(value, dict):
+            logging.error("dictionary is expected: key=%s", key)
+            return False
+
+        if not value:
+            logging.error("dictionary is empty: key=%s", key)
+            return False
+
+        if COMPONENT_KEY not in value:
+            logging.error("\"%s\" key hasn't been found", COMPONENT_KEY)
+            return False
+
+        if len(value) != 1:
+            logging.error("unexpected number of records: key=%s", key)
+            return False
+
+        return parse_component_section(key, value[COMPONENT_KEY])
+
+    return False
+
+
+def get_platform_components_path():
+    PLATFORM_COMPONENTS_PATH_TEMPLATE = "/usr/share/sonic/device/{}/{}"
+    PLATFORM_COMPONENTS_FILE_PATH = PLATFORM_COMPONENTS_PATH_TEMPLATE.format(
+        device_info.get_platform(), PLATFORM_COMPONENTS_FILE)
+    return PLATFORM_COMPONENTS_FILE_PATH
+
+
+def parse_platform_components():
+    platform_components_path = get_platform_components_path()
+    with open(platform_components_path) as platform_components:
+        data = json.load(platform_components)
+
+        if not isinstance(data, dict):
+            logging.error("dictionary is expected: key=root")
+            return False
+
+        if not data:
+            logging.error("dictionary is empty: key=root")
+            return False
+
+        if CHASSIS_KEY not in data:
+            logging.error("\"%s\" key hasn't been found", CHASSIS_KEY)
+            return False
+
+        return parse_chassis_section(data[CHASSIS_KEY])
+
+
+def get_current_chassis_component_map():
+    chassis_name = current_chassis.get_name()
+    current_chassis_component_map[chassis_name] = {}
+
+    component_list = current_chassis.get_all_components()
+    for component in component_list:
+        component_name = component.get_name()
+        current_chassis_component_map[chassis_name][component_name] = component
+
+    return current_chassis_component_map
+
+
+def get_upgrade_dict():
+    upgrade_dict = {}
+    firmware_version_current = ""
+    firmware_version_available = ""
+
+    if not parse_platform_components():
+        logging.error("Reading platform_components.json i, ion exception")
+        sys.exit(1)
+
+    if not get_current_chassis_component_map():
+        logging.error("Reading firmware i, ion from the driver is abnormal")
+        sys.exit(1)
+
+    chassis_name = current_chassis.get_name()
+    diff_keys = set(chassis_component_map.keys()) ^ set(current_chassis_component_map.keys())
+    if diff_keys:
+        logging.error("%s names mismatch: keys=%s", chassis_name, str(list(diff_keys)))
+        return None
+
+    for chassis_name, component_map in current_chassis_component_map.items():
+        for component_name, component in component_map.items():
+            firmware_version_current = component.get_firmware_version()
+            if component_name in chassis_component_map[chassis_name]:
+                firmware_version_available = chassis_component_map[chassis_name][component_name][VERSION_KEY]
+            else:
+                logging.warning("can't find %s in %s", component_name, PLATFORM_COMPONENTS_FILE)
+                break
+
+            if not os.path.exists(chassis_component_map[chassis_name][component_name][FIRMWARE_KEY]):
+                logging.error("%s does not exist", chassis_component_map[chassis_name][component_name][FIRMWARE_KEY])
+                break
+
+            if firmware_version_available != firmware_version_current:
+                upgrade_dict[component_name] = chassis_component_map[chassis_name][component_name][FIRMWARE_KEY]
+
+    return upgrade_dict
+
+
+def auto_upgrade():
+    upgrade_result_dict = {}
+    chassis_name = current_chassis.get_name()
+
+    upgrade_dict = get_upgrade_dict()
+    if not upgrade_dict:
+        logging.info("No firmware found for automatic upgrade")
+        return None
+
+    component_map = current_chassis_component_map[chassis_name]
+    for value, path in upgrade_dict.items():
+        status = component_map[value].install_firmware(path)
+        if status:
+            upgrade_result_dict[value] = "success"
+            logging.info("%s Upgrade Success", value)
+        else:
+            upgrade_result_dict[value] = "failed"
+            logging.error("%s Upgrade Failed", value)
+    return upgrade_result_dict
+
+
+if __name__ == '__main__':
+    auto_upgrade()
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/avscontrol.py b/platform/broadcom/sonic-platform-modules-micas/common/script/avscontrol.py
new file mode 100755
index 000000000..1f367133a
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/avscontrol.py
@@ -0,0 +1,203 @@
+#!/usr/bin/env python3
+import sys
+import os
+import time
+import syslog
+import glob
+import click
+from platform_config import MAC_DEFAULT_PARAM
+from platform_util import getSdkReg, write_sysfs, get_value, get_format_value
+
+
+AVSCTROL_DEBUG_FILE = "/etc/.avscontrol_debug_flag"
+
+AVSCTROLERROR = 1
+AVSCTROLDEBUG = 2
+
+debuglevel = 0
+
+CONTEXT_SETTINGS = {"help_option_names": ['-h', '--help']}
+
+
+class AliasedGroup(click.Group):
+    def get_command(self, ctx, cmd_name):
+        rv = click.Group.get_command(self, ctx, cmd_name)
+        if rv is not None:
+            return rv
+        matches = [x for x in self.list_commands(ctx)
+                   if x.startswith(cmd_name)]
+        if not matches:
+            return None
+        if len(matches) == 1:
+            return click.Group.get_command(self, ctx, matches[0])
+        ctx.fail('Too many matches: %s' % ', '.join(sorted(matches)))
+        return None
+
+
+def avscontrol_debug(s):
+    if AVSCTROLDEBUG & debuglevel:
+        syslog.openlog("AVSCONTROL", syslog.LOG_PID)
+        syslog.syslog(syslog.LOG_DEBUG, s)
+
+
+def avscontrol_error(s):
+    if AVSCTROLERROR & debuglevel:
+        syslog.openlog("AVSCONTROL", syslog.LOG_PID)
+        syslog.syslog(syslog.LOG_ERR, s)
+
+
+def avserror(s):
+    # s = s.decode('utf-8').encode('gb2312')
+    syslog.openlog("AVSCONTROL", syslog.LOG_PID)
+    syslog.syslog(syslog.LOG_ERR, s)
+
+
+def avsinfo(s):
+    syslog.openlog("AVSCONTROL", syslog.LOG_PID)
+    syslog.syslog(syslog.LOG_INFO, s)
+
+
+def debug_init():
+    global debuglevel
+    if os.path.exists(AVSCTROL_DEBUG_FILE):
+        debuglevel = debuglevel | AVSCTROLDEBUG | AVSCTROLERROR
+    else:
+        debuglevel = debuglevel & ~(AVSCTROLDEBUG | AVSCTROLERROR)
+
+
+def set_avs_value_sysfs(conf, dcdc_value):
+    msg = ""
+    formula = conf.get("formula", None)
+    loc = conf.get("loc")
+    locations = glob.glob(loc)
+    if len(locations) == 0:
+        msg = "avs sysfs loc: %s not found" % loc
+        avscontrol_error(msg)
+        return False, msg
+    sysfs_loc = locations[0]
+    avscontrol_debug("set_avs_value_sysfs, loc: %s, origin dcdc value: %s, formula: %s" %
+                     (sysfs_loc, dcdc_value, formula))
+    if formula is not None:
+        dcdc_value = get_format_value(formula % (dcdc_value))
+    wr_val = str(dcdc_value)
+    avscontrol_debug("set_avs_value_sysfs, write val: %s" % wr_val)
+    ret, log = write_sysfs(sysfs_loc, wr_val)
+    if ret is False:
+        msg = "set_avs_value_sysfs failed, msg: %s" % log
+        avscontrol_error(msg)
+    return ret, msg
+
+
+def set_avs_value(avs_conf, dcdc_value):
+    set_avs_way = avs_conf.get("set_avs", {}).get("gettype")
+    if set_avs_way != "sysfs":
+        msg = "unsupport set avs value type: %s" % set_avs_way
+        avscontrol_error(msg)
+        return False, msg
+    ret, msg = set_avs_value_sysfs(avs_conf["set_avs"], dcdc_value)
+    return ret, msg
+
+
+def get_dcdc_value(avs_conf, rov_value):
+    msg = ""
+    mac_avs_param = avs_conf.get("mac_avs_param", {})
+    if rov_value not in mac_avs_param.keys():
+        if avs_conf["type"] == 0:
+            msg = "VID:0x%x out of range, voltage regulate stop" % rov_value
+            avsinfo(msg)
+            return False, msg
+        dcdc_value = mac_avs_param[avs_conf["default"]]
+        avsinfo("VID:0x%x out of range, use default VID:0x%x" % (rov_value, dcdc_value))
+    else:
+        dcdc_value = mac_avs_param[rov_value]
+    return True, dcdc_value
+
+
+def get_rov_value_cpld(avs_conf):
+    cpld_avs_config = avs_conf["cpld_avs"]
+    return get_value(cpld_avs_config)
+
+
+def get_rov_value_sdk(avs_conf):
+    name = avs_conf["sdkreg"]
+    ret, status = getSdkReg(name)
+    if ret is False:
+        return False, status
+    status = int(status, 16)
+    # shift operation
+    if avs_conf["sdktype"] != 0:
+        status = (status >> avs_conf["macregloc"]) & avs_conf["mask"]
+    macavs = status
+    return True, macavs
+
+
+def doAvsCtrol_single(avs_conf):
+    try:
+        avs_name = avs_conf.get("name")
+        rov_source = avs_conf["rov_source"]
+        if rov_source == 0:
+            ret, rov_value = get_rov_value_cpld(avs_conf)  # get rov from cpld reg
+        else:
+            ret, rov_value = get_rov_value_sdk(avs_conf)  # get rov from sdk reg
+        if ret is False:
+            msg = "%s get rov_value failed, msg: %s" % (avs_name, rov_value)
+            avscontrol_error(msg)
+            return False, msg
+        avscontrol_debug("%s rov_value:  0x%x" % (avs_name, rov_value))
+        ret, dcdc_value = get_dcdc_value(avs_conf, rov_value)
+        if ret is False:
+            msg = "%s get output voltage value failed, msg: %s" % (avs_name, dcdc_value)
+            avscontrol_error(msg)
+            return False, msg
+        ret, msg = set_avs_value(avs_conf, dcdc_value)
+        return ret, msg
+    except Exception as e:
+        msg = "%s avscontrol raise exception, msg: %s" % (avs_name, str(e))
+        avscontrol_error(msg)
+        return False, msg
+
+
+def doAvsCtrol(avs_conf):
+    retry_time = avs_conf.get("retry", 10)
+    for i in range(retry_time):
+        debug_init()
+        ret, log = doAvsCtrol_single(avs_conf)
+        if ret is True:
+            return True, log
+        time.sleep(10)
+    return False, log
+
+
+def run():
+    # wait 30s for device steady
+    time.sleep(30)
+    errcnt = 0
+    msg = ""
+    for item in MAC_DEFAULT_PARAM:
+        status, log = doAvsCtrol(item)
+        if status is False:
+            errcnt += 1
+            msg += log
+
+    if errcnt == 0:
+        avsinfo("%%AVSCONTROL success")
+        sys.exit(0)
+    avserror("%%DEV_MONITOR-AVS: MAC Voltage adjust failed.")
+    avserror("%%DEV_MONITOR-AVS: errmsg: %s" % msg)
+    sys.exit(1)
+
+
+@click.group(cls=AliasedGroup, context_settings=CONTEXT_SETTINGS)
+def main():
+    '''device operator'''
+
+
+@main.command()
+def start():
+    '''start AVS control'''
+    avsinfo("%%AVSCONTROL start")
+    run()
+
+
+if __name__ == '__main__':
+    main()
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/dev_monitor.py b/platform/broadcom/sonic-platform-modules-micas/common/script/dev_monitor.py
new file mode 100755
index 000000000..8ce06db06
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/dev_monitor.py
@@ -0,0 +1,303 @@
+#!/usr/bin/env python3
+import sys
+import os
+import time
+import syslog
+import traceback
+import click
+from platform_config import DEV_MONITOR_PARAM
+from platform_util import io_rd, wbi2cget, exec_os_cmd
+
+
+CONTEXT_SETTINGS = {"help_option_names": ['-h', '--help']}
+
+
+class AliasedGroup(click.Group):
+    def get_command(self, ctx, cmd_name):
+        rv = click.Group.get_command(self, ctx, cmd_name)
+        if rv is not None:
+            return rv
+        matches = [x for x in self.list_commands(ctx)
+                   if x.startswith(cmd_name)]
+        if not matches:
+            return None
+        if len(matches) == 1:
+            return click.Group.get_command(self, ctx, matches[0])
+        ctx.fail('Too many matches: %s' % ', '.join(sorted(matches)))
+        return None
+
+
+DEVMONITOR_DEBUG_FILE = "/etc/.devmonitor_debug_flag"
+
+debuglevel = 0
+
+
+def debug_init():
+    global debuglevel
+    if os.path.exists(DEVMONITOR_DEBUG_FILE):
+        debuglevel = 1
+    else:
+        debuglevel = 0
+
+
+def devwarninglog(s):
+    # s = s.decode('utf-8').encode('gb2312')
+    syslog.openlog("DEVMONITOR", syslog.LOG_PID)
+    syslog.syslog(syslog.LOG_WARNING, s)
+
+
+def devcriticallog(s):
+    # s = s.decode('utf-8').encode('gb2312')
+    syslog.openlog("DEVMONITOR", syslog.LOG_PID)
+    syslog.syslog(syslog.LOG_CRIT, s)
+
+
+def deverror(s):
+    # s = s.decode('utf-8').encode('gb2312')
+    syslog.openlog("DEVMONITOR", syslog.LOG_PID)
+    syslog.syslog(syslog.LOG_ERR, s)
+
+
+def devinfo(s):
+    # s = s.decode('utf-8').encode('gb2312')
+    syslog.openlog("DEVMONITOR", syslog.LOG_PID)
+    syslog.syslog(syslog.LOG_INFO, s)
+
+
+def devdebuglog(s):
+    # s = s.decode('utf-8').encode('gb2312')
+    if debuglevel == 1:
+        syslog.openlog("DEVMONITOR", syslog.LOG_PID)
+        syslog.syslog(syslog.LOG_DEBUG, s)
+
+
+class DevMonitor():
+
+    def getpresentstatus(self, param):
+        try:
+            ret = {}
+            ret["status"] = ''
+            gettype = param.get('gettype')
+            presentbit = param.get('presentbit')
+            okval = param.get('okval')
+            if gettype == "io":
+                io_addr = param.get('io_addr')
+                val = io_rd(io_addr)
+                if val is None:
+                    ret["status"] = "NOT OK"
+                    return ret
+                retval = val
+            else:
+                bus = param.get('bus')
+                loc = param.get('loc')
+                offset = param.get('offset')
+                ind, val = wbi2cget(bus, loc, offset)
+                if ind is not True:
+                    ret["status"] = "NOT OK"
+                    return ret
+                retval = val
+            val_t = (int(retval, 16) & (1 << presentbit)) >> presentbit
+            if val_t != okval:
+                ret["status"] = "ABSENT"
+            else:
+                ret["status"] = "PRESENT"
+        except Exception as e:
+            ret["status"] = "NOT OK"
+            deverror("getpresentstatus error")
+            deverror(str(e))
+        return ret
+
+    def removeDev(self, bus, loc):
+        cmd = "echo  0x%02x > /sys/bus/i2c/devices/i2c-%d/delete_device" % (loc, bus)
+        devpath = "/sys/bus/i2c/devices/%d-%04x" % (bus, loc)
+        if os.path.exists(devpath):
+            exec_os_cmd(cmd)
+
+    def addDev(self, name, bus, loc):
+        if name == "lm75":
+            time.sleep(0.1)
+        cmd = "echo  %s 0x%02x > /sys/bus/i2c/devices/i2c-%d/new_device" % (name, loc, bus)
+        devpath = "/sys/bus/i2c/devices/%d-%04x" % (bus, loc)
+        if os.path.exists(devpath) is False:
+            exec_os_cmd(cmd)
+
+    def checkattr(self, bus, loc, attr):
+        try:
+            attrpath = "/sys/bus/i2c/devices/%d-%04x/%s" % (bus, loc, attr)
+            if os.path.exists(attrpath):
+                return True
+        except Exception as e:
+            deverror("checkattr error")
+            deverror(str(e))
+        return False
+
+    def monitor(self, ret):
+        totalerr = 0
+        for item in ret:
+            try:
+                name = item.get('name')
+                itemattr = '%sattr' % name
+                val_t = getattr(DevMonitor, itemattr, None)
+                if val_t == 'OK':
+                    continue
+                present = item.get('present', None)
+                devices = item.get('device')
+                err_t = 0
+                for item_dev in devices:
+                    item_devattr = '%s' % (item_dev['id'])
+                    val_t = getattr(DevMonitor, item_devattr, None)
+                    if val_t == 'OK':
+                        continue
+                    devname = item_dev.get('name')
+                    bus = item_dev.get('bus')
+                    loc = item_dev.get('loc')
+                    attr = item_dev.get('attr')
+                    if self.checkattr(bus, loc, attr) is False:
+                        err_t -= 1
+                        setattr(DevMonitor, item_devattr, 'NOT OK')
+                        if present is not None:
+                            presentstatus = self.getpresentstatus(present)
+                            devdebuglog("%s present status:%s" % (name, presentstatus.get('status')))
+                            if presentstatus.get('status') == 'PRESENT':
+                                self.removeDev(bus, loc)
+                                time.sleep(0.1)
+                                self.addDev(devname, bus, loc)
+                        else:
+                            self.removeDev(bus, loc)
+                            time.sleep(0.1)
+                            self.addDev(devname, bus, loc)
+                    else:
+                        setattr(DevMonitor, item_devattr, 'OK')
+                    val_t = getattr(DevMonitor, item_devattr, None)
+                    devdebuglog("%s status %s" % (item_devattr, val_t))
+                if err_t == 0:
+                    setattr(DevMonitor, itemattr, 'OK')
+                else:
+                    totalerr -= 1
+                    setattr(DevMonitor, itemattr, 'NOT OK')
+                val_t = getattr(DevMonitor, itemattr, None)
+                devdebuglog("%s status %s" % (itemattr, val_t))
+            except Exception as e:
+                totalerr -= 1
+                deverror("monitor error")
+                deverror(str(e))
+        return totalerr
+
+    def psusmonitor(self):
+        psus_conf = DEV_MONITOR_PARAM.get('psus')
+        if psus_conf is None:
+            return 0
+        psusattr = 'psusattr'
+        val_t = getattr(DevMonitor, psusattr, None)
+        if val_t == 'OK':
+            return 0
+        ret = self.monitor(psus_conf)
+        if ret == 0:
+            setattr(DevMonitor, psusattr, 'OK')
+        else:
+            setattr(DevMonitor, psusattr, 'NOT OK')
+        val_t = getattr(DevMonitor, psusattr, None)
+        devdebuglog("psusattr:value:%s" % (val_t))
+        return ret
+
+    def fansmonitor(self):
+        fans_conf = DEV_MONITOR_PARAM.get('fans')
+        if fans_conf is None:
+            return 0
+        fansattr = 'fansattr'
+        val_t = getattr(DevMonitor, fansattr, None)
+        if val_t == 'OK':
+            return 0
+        ret = self.monitor(fans_conf)
+        if ret == 0:
+            setattr(DevMonitor, fansattr, 'OK')
+        else:
+            setattr(DevMonitor, fansattr, 'NOT OK')
+        val_t = getattr(DevMonitor, fansattr, None)
+        devdebuglog("fansattr:value:%s" % (val_t))
+        return ret
+
+    def slotsmonitor(self):
+        slots_conf = DEV_MONITOR_PARAM.get('slots')
+        if slots_conf is None:
+            return 0
+        slotsattr = 'slotsattr'
+        val_t = getattr(DevMonitor, slotsattr, None)
+        if val_t == 'OK':
+            return 0
+        ret = self.monitor(slots_conf)
+        if ret == 0:
+            setattr(DevMonitor, slotsattr, 'OK')
+        else:
+            setattr(DevMonitor, slotsattr, 'NOT OK')
+        val_t = getattr(DevMonitor, slotsattr, None)
+        devdebuglog("slotsattr:value:%s" % (val_t))
+        return ret
+
+    def othersmonitor(self):
+        others_conf = DEV_MONITOR_PARAM.get('others')
+        if others_conf is None:
+            return 0
+        othersattr = 'othersattr'
+        val_t = getattr(DevMonitor, othersattr, None)
+        if val_t == 'OK':
+            return 0
+        ret = self.monitor(others_conf)
+        if ret == 0:
+            setattr(DevMonitor, othersattr, 'OK')
+        else:
+            setattr(DevMonitor, othersattr, 'NOT OK')
+        val_t = getattr(DevMonitor, othersattr, None)
+        devdebuglog("othersattr:value:%s" % (val_t))
+        return ret
+
+
+def doDevMonitor(devMonitor):
+    ret_t = 0
+    ret_t += devMonitor.psusmonitor()
+    ret_t += devMonitor.fansmonitor()
+    ret_t += devMonitor.slotsmonitor()
+    ret_t += devMonitor.othersmonitor()
+    return ret_t
+
+
+def run(interval, devMonitor):
+    # devMonitor.devattrinit()
+    while True:
+        try:
+            debug_init()
+            ret = doDevMonitor(devMonitor)
+        except Exception as e:
+            traceback.print_exc()
+            deverror(str(e))
+            ret = -1
+        if ret == 0:
+            time.sleep(5)
+            devinfo("dev_monitor finished!")
+            sys.exit(0)
+        time.sleep(interval)
+
+
+@click.group(cls=AliasedGroup, context_settings=CONTEXT_SETTINGS)
+def main():
+    '''device operator'''
+
+
+@main.command()
+def start():
+    '''start device monitor'''
+    devinfo("dev_monitor start")
+    devMonitor = DevMonitor()
+    interval = DEV_MONITOR_PARAM.get('polling_time', 10)
+    run(interval, devMonitor)
+
+
+@main.command()
+def stop():
+    '''stop device monitor '''
+    devinfo("stop")
+
+
+# device_i2c operation
+if __name__ == '__main__':
+    main()
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/drv_update.py b/platform/broadcom/sonic-platform-modules-micas/common/script/drv_update.py
new file mode 100755
index 000000000..ac7c189f1
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/drv_update.py
@@ -0,0 +1,152 @@
+#!/usr/bin/env python
+# -*- coding: UTF-8 -*-
+import syslog
+import os
+import shutil
+from platform_config import DRVIER_UPDATE_CONF
+from platform_util import exec_os_cmd
+
+
+DRV_UPDATE_DEBUG_FILE = "/etc/.drv_update_debug_flag"
+
+DRVUPDATEERROR = 1
+DRVUPDATEDEBUG = 2
+debuglevel = 0
+
+
+def drv_update_debug(s):
+    if DRVUPDATEDEBUG & debuglevel:
+        syslog.openlog("DRV_UPDATE", syslog.LOG_PID)
+        syslog.syslog(syslog.LOG_INFO, s)
+
+
+def drv_update_error(s):
+    if DRVUPDATEERROR & debuglevel:
+        syslog.openlog("DRV_UPDATE", syslog.LOG_PID)
+        syslog.syslog(syslog.LOG_ERR, s)
+
+
+def drv_update_info(s):
+    syslog.openlog("DRV_UPDATE", syslog.LOG_PID)
+    syslog.syslog(syslog.LOG_LOCAL1 | syslog.LOG_NOTICE, s)
+
+def debug_init():
+    global debuglevel
+    try:
+        with open(DRV_UPDATE_DEBUG_FILE, "r") as fd:
+            value = fd.read()
+        debuglevel = int(value)
+    except Exception:
+        debuglevel = 0
+
+
+def get_driver_md5sum(drv_path):
+    status, output = exec_os_cmd("md5sum %s" % drv_path)
+    if status or len(output) == 0:
+        return False, output
+    drv_md5 = output.strip().split(" ")[0]
+    return True, drv_md5
+
+
+def do_driver_replace(src_file, target_file):
+    # Backup target file
+    src_file_dir = os.path.dirname(src_file)
+    target_file_name = os.path.basename(target_file)
+    drv_update_debug("src_file: %s, src_file_dir: %s" % (src_file, src_file_dir))
+    drv_update_debug("target_file: %s, target_file_name: %s" % (target_file, target_file_name))
+    try:
+        shutil.copyfile(target_file, "%s/%s.bak" % (src_file_dir, target_file_name))
+        shutil.copyfile(src_file, target_file)
+        return True
+    except Exception as e:
+        drv_update_error("do_driver_replace error, msg: %s" % str(e))
+        return False
+
+
+def doDrvUpdate():
+    reboot_flag = DRVIER_UPDATE_CONF.get("reboot_flag", 0)
+    drv_list = DRVIER_UPDATE_CONF.get("drv_list", [])
+    err_cnt = 0
+    update_initramfs_flag = 0
+    # get kernel version
+    status, output = exec_os_cmd("uname -r")
+    if status or len(output) == 0:
+        drv_update_error("Failed to get kernel version, status: %s, log: %s" % (status, output))
+        return
+    kversion = output.strip()
+    drv_update_debug("kernel version: %s" % kversion)
+    for item in drv_list:
+        try:
+            source_drv = item.get("source")
+            target_drv = item.get("target")
+            judge_flag = item.get("judge_flag")
+            if source_drv is None or target_drv is None or judge_flag is None:
+                drv_update_error("driver update config error, source_drv: %s, target_drv: %s, judge_file: %s" % (source_drv, target_drv, judge_flag))
+                err_cnt += 1
+                continue
+            drv_update_debug("source_drv: %s, target_drv: %s, judge_flag: %s" % (source_drv, target_drv, judge_flag))
+
+            # Check if the current driver is expected
+            if os.path.exists(judge_flag):
+                drv_update_debug("The current driver is expected, do nothing")
+                continue
+
+            # get source driver file path
+            source_drv_path = "/lib/modules/%s/%s" % (kversion, source_drv)
+            drv_update_debug("source driver: %s, file path: %s" % (source_drv, source_drv_path))
+
+            # get target driver file path
+            target_drv_path = "/lib/modules/%s/%s" % (kversion, target_drv)
+            drv_update_debug("target driver: %s, file path: %s" % (target_drv, target_drv_path))
+
+            # get source driver md5sum
+            status, source_drv_md5 = get_driver_md5sum(source_drv_path)
+            if status is False:
+                msg = "get %s md5sum failed msg: %s" % (source_drv_path, source_drv_md5)
+                drv_update_error(msg)
+                err_cnt += 1
+                continue
+            drv_update_debug("source driver file path: %s, md5sum: %s" % (source_drv_path, source_drv_md5))
+
+            # get target driver md5sum
+            status, target_drv_md5 = get_driver_md5sum(target_drv_path)
+            if status is False:
+                msg = "get %s md5sum failed msg: %s" % (target_drv_path, target_drv_md5)
+                drv_update_error(msg)
+                err_cnt += 1
+                continue
+            drv_update_debug("target driver file path: %s, md5sum: %s" % (target_drv_path, target_drv_md5))
+
+            if source_drv_md5 != target_drv_md5:
+                drv_update_debug("source_drv_md5 not equal to target_drv_md5, try to use source driver replace target driver")
+                status = do_driver_replace(source_drv_path, target_drv_path)
+                if status is False:
+                    err_cnt += 1
+                    continue
+            else:
+                drv_update_debug("source_drv_md5 equal to target_drv_md5, do nothing")
+
+            drv_update_debug("Driver replacement completed, set update_initramfs_flag")
+            update_initramfs_flag = 1
+
+        except Exception as e:
+            err_cnt += 1
+            drv_update_error(str(e))
+
+    if update_initramfs_flag == 1:
+        drv_update_debug("starting to update initramfs")
+        exec_os_cmd("update-initramfs -u")
+        drv_update_debug("update initramfs finish")
+
+    exec_os_cmd("sync")
+    if update_initramfs_flag == 1 and err_cnt == 0 and reboot_flag == 1:
+        reboot_log = "%DRV_UPDATE-5-REBOOT: Update initramfs is completed, restarting the system to take effect."
+        reboot_log_cmd = "echo '%s' > /dev/ttyS0" % reboot_log
+        exec_os_cmd(reboot_log_cmd)
+        drv_update_info(reboot_log)
+        exec_os_cmd("/sbin/reboot")
+    return
+
+if __name__ == '__main__':
+    debug_init()
+    doDrvUpdate()
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/generate_airflow.py b/platform/broadcom/sonic-platform-modules-micas/common/script/generate_airflow.py
new file mode 100755
index 000000000..ff4fed46f
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/generate_airflow.py
@@ -0,0 +1,254 @@
+#!/usr/bin/env python
+# -*- coding: UTF-8 -*-
+'''
+generate board air flow according to fan and psu air flow
+write resulet to AIRFLOW_RESULT_FILE, file format:
+{
+    "FAN1": {
+        "model":"M1HFAN I-F",
+        "airflow":"intake",
+    },
+    "PSU1": {
+        "model":"CSU550AP-3-500",
+        "airflow":"intake",
+    },
+    "board":"intake"
+}
+'''
+import os
+import syslog
+import json
+from platform_config import AIR_FLOW_CONF, AIRFLOW_RESULT_FILE
+from platform_util import dev_file_read, byteTostr, exec_os_cmd
+from eepromutil.fru import ipmifru
+from eepromutil.cust_fru import CustFru
+from eepromutil.fantlv import fan_tlv
+
+
+AIRFLOW_DEBUG_FILE = "/etc/.airflow_debug_flag"
+
+AIRFLOWERROR = 1
+AIRFLOWDEBUG = 2
+
+debuglevel = 0
+
+
+def airflow_info(s):
+    syslog.openlog("AIRFLOW", syslog.LOG_PID)
+    syslog.syslog(syslog.LOG_INFO, s)
+
+
+def airflow_error(s):
+    syslog.openlog("AIRFLOW", syslog.LOG_PID)
+    syslog.syslog(syslog.LOG_ERR, s)
+
+
+def airflow_debug(s):
+    if AIRFLOWDEBUG & debuglevel:
+        syslog.openlog("AIRFLOW", syslog.LOG_PID)
+        syslog.syslog(syslog.LOG_DEBUG, s)
+
+
+def airflow_debug_error(s):
+    if AIRFLOWERROR & debuglevel:
+        syslog.openlog("AIRFLOW", syslog.LOG_PID)
+        syslog.syslog(syslog.LOG_ERR, s)
+
+
+def debug_init():
+    global debuglevel
+    try:
+        with open(AIRFLOW_DEBUG_FILE, "r") as fd:
+            value = fd.read()
+        debuglevel = int(value)
+    except Exception:
+        debuglevel = 0
+
+
+def get_model_fru(device, eeprom):
+    try:
+        fru = ipmifru()
+        fru.decodeBin(eeprom)
+        dev_name = device.get("name")
+        area = device.get("area")
+        field = device.get("field")
+        tmp_area = getattr(fru, area, None)
+        if tmp_area is None:
+            msg = "%s fru %s area config error" % (dev_name, area)
+            return False, msg
+        model = getattr(tmp_area, field, None)
+        if model is None:
+            msg = "%s get model error, area: %s, field: %s" % (dev_name, area, field)
+            return False, msg
+        airflow_debug("%s get model success, model: %s" % (dev_name, model))
+        return True, model
+    except Exception as e:
+        return False, str(e)
+
+def get_model_custfru(device, eeprom):
+    try:
+        custfru = CustFru()
+        custfru.decode(eeprom)
+        dev_name = device.get("name")
+        field = device.get("field")
+        model = getattr(custfru, field, None)
+        if model is None:
+            msg = "%s get model error, field: %s" % (dev_name, field)
+            return False, msg
+        airflow_debug("%s get model success, model: %s" % (dev_name, model))
+        return True, model
+    except Exception as e:
+        return False, str(e)
+
+
+def get_model_fantlv(device, eeprom):
+    try:
+        dev_name = device.get("name")
+        tlv = fan_tlv()
+        rets = tlv.decode(eeprom)
+        if len(rets) == 0:
+            msg = "%s decode fantlv eeprom info error" % dev_name
+            return False, msg
+
+        field = device.get("field")
+        for fantlv_item in rets:
+            if fantlv_item.get("name") == field:
+                return True, fantlv_item["value"]
+        msg = "%s get model error, field: %s not found" % (dev_name, field)
+        return False, msg
+    except Exception as e:
+        return False, str(e)
+
+
+def get_device_modele(device):
+    e2_type = device.get("e2_type")
+    dev_name = device.get("name")
+    support_e2_type = ("fru", "fantlv", "custfru")
+    if e2_type not in support_e2_type:
+        msg = "%s unsupport e2_type: %s" % (dev_name, e2_type)
+        return False, msg
+
+    e2_path = device.get("e2_path")
+    e2_size = device.get("e2_size", 256)
+    ret, binval_bytes = dev_file_read(e2_path, 0, e2_size)
+    if ret is False:
+        msg = "%s eeprom read error, eeprom path: %s, msg: %s" % (dev_name, e2_path, binval_bytes)
+        return False, msg
+
+    binval = byteTostr(binval_bytes)
+    if e2_type == "fru":
+        return get_model_fru(device, binval)
+    if e2_type == "custfru":
+        return get_model_custfru(device, binval)
+    return get_model_fantlv(device, binval)
+
+
+def get_board_air_flow(fan_intake_num, fan_exhaust_num, psu_intake_num, psu_exhaust_num):
+    airflow_debug("fan_intake_num: %d, fan_exhaust_num: %d, psu_intake_num: %d, psu_exhaust_num: %d" %
+                  (fan_intake_num, fan_exhaust_num, psu_intake_num, psu_exhaust_num))
+
+    if fan_intake_num == 0 and fan_exhaust_num == 0 and psu_intake_num == 0 and psu_exhaust_num == 0:
+        airflow_error("get all fans and psus air flow failed")
+        return "N/A"
+
+    if fan_intake_num > fan_exhaust_num:
+        airflow_debug("fan intake number more than fan exhaust number, set board air flow: intake")
+        return "intake"
+
+    if fan_intake_num < fan_exhaust_num:
+        airflow_debug("fan intake number less than fan exhaust number, set board air flow: exhaust")
+        return "exhaust"
+
+    airflow_debug("fan intake number equal to exhaust number, check psu air flow")
+
+    if psu_intake_num > psu_exhaust_num:
+        airflow_debug("psu intake number more than psu exhaust number, set board air flow: intake")
+        return "intake"
+
+    if psu_intake_num < psu_exhaust_num:
+        airflow_debug("psu intake number less than psu exhaust number, set board air flow: exhaust")
+        return "exhaust"
+
+    airflow_debug("fan and psu intake and exhaust number equal, return intake")
+    return "intake"
+
+
+def generate_airflow():
+    fan_intake_list = []
+    fan_exhaust_list = []
+    psu_intake_list = []
+    psu_exhaust_list = []
+    ret = {}
+    fans = AIR_FLOW_CONF.get("fans", [])
+    psus = AIR_FLOW_CONF.get("psus", [])
+
+    for fan in fans:
+        dev_name = fan.get("name")
+        air_flow = "N/A"
+        status, model = get_device_modele(fan)
+        if status is False:
+            ret[dev_name] = {"model": "N/A", "airflow": "N/A"}
+            airflow_error(model)
+            continue
+        model = model.strip()
+        airflowconifg = AIR_FLOW_CONF[fan["decode"]]
+        for key, value in airflowconifg.items():
+            if model in value:
+                air_flow = key
+        ret[dev_name] = {"model": model, "airflow": air_flow}
+        airflow_debug("%s model: %s, airflow: %s" % (dev_name, model, air_flow))
+        if air_flow == "intake":
+            fan_intake_list.append(fan.get("name"))
+        elif air_flow == "exhaust":
+            fan_exhaust_list.append(fan.get("name"))
+
+    airflow_debug("fan_intake_list: %s" % fan_intake_list)
+    airflow_debug("fan_exhaust_list: %s" % fan_exhaust_list)
+
+    for psu in psus:
+        dev_name = psu.get("name")
+        air_flow = "N/A"
+        status, model = get_device_modele(psu)
+        if status is False:
+            ret[dev_name] = {"model": "N/A", "airflow": "N/A"}
+            airflow_error(model)
+            continue
+        model = model.strip()
+        airflowconifg = AIR_FLOW_CONF[psu["decode"]]
+        for key, value in airflowconifg.items():
+            if model in value:
+                air_flow = key
+        ret[dev_name] = {"model": model, "airflow": air_flow}
+        airflow_debug("%s model: %s, airflow: %s" % (dev_name, model, air_flow))
+        if air_flow == "intake":
+            psu_intake_list.append(psu.get("name"))
+        elif air_flow == "exhaust":
+            psu_exhaust_list.append(psu.get("name"))
+
+    airflow_debug("psu_intake_list: %s" % psu_intake_list)
+    airflow_debug("psu_exhaust_list: %s" % psu_exhaust_list)
+
+    fan_intake_num = len(fan_intake_list)
+    fan_exhaust_num = len(fan_exhaust_list)
+    psu_intake_num = len(psu_intake_list)
+    psu_exhaust_num = len(psu_exhaust_list)
+
+    board_airflow = get_board_air_flow(fan_intake_num, fan_exhaust_num, psu_intake_num, psu_exhaust_num)
+    airflow_debug("board_airflow: %s" % board_airflow)
+    ret["board"] = board_airflow
+    ret_json = json.dumps(ret, ensure_ascii=False, indent=4)
+
+    out_file_dir = os.path.dirname(AIRFLOW_RESULT_FILE)
+    if len(out_file_dir) != 0:
+        cmd = "mkdir -p %s" % out_file_dir
+        exec_os_cmd(cmd)
+        exec_os_cmd("sync")
+    with open(AIRFLOW_RESULT_FILE, "w") as fd:
+        fd.write(ret_json)
+    exec_os_cmd("sync")
+
+
+if __name__ == '__main__':
+    debug_init()
+    airflow_debug("enter main")
+    generate_airflow()
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/hal_fanctrl.py b/platform/broadcom/sonic-platform-modules-micas/common/script/hal_fanctrl.py
new file mode 100755
index 000000000..5a12b88ac
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/hal_fanctrl.py
@@ -0,0 +1,1190 @@
+#!/usr/bin/env python3
+import os
+import subprocess
+import time
+import syslog
+import traceback
+from plat_hal.interface import interface
+from plat_hal.baseutil import baseutil
+from algorithm.pid import pid
+from algorithm.openloop import openloop
+from algorithm.hysteresis import hysteresis
+
+
+SWITCH_TEMP = "SWITCH_TEMP"
+INLET_TEMP = "INLET_TEMP"
+BOARD_TEMP = "BOARD_TEMP"
+OUTLET_TEMP = "OUTLET_TEMP"
+CPU_TEMP = "CPU_TEMP"
+
+FANCTROL_DEBUG_FILE = "/etc/.fancontrol_debug_flag"
+# coordination with REBOOT_CAUSE_PARA
+OTP_SWITCH_REBOOT_JUDGE_FILE = "/etc/.otp_reboot_flag"
+OTP_OTHER_REBOOT_JUDGE_FILE = OTP_SWITCH_REBOOT_JUDGE_FILE
+
+FANCTROLERROR = 1
+FANCTROLDEBUG = 2
+FANAIRFLOWDEBUG = 4
+
+debuglevel = 0
+
+F2B_AIR_FLOW = "intake"
+B2F_AIR_FLOW = "exhaust"
+ONIE_E2_NAME = "ONIE_E2"
+
+TEMP_REBOOT_CRIT_SWITCH_FLAG = 1
+TEMP_REBOOT_CRIT_OTHER_FLAG = 2
+
+
+def fancontrol_debug(s):
+    if FANCTROLDEBUG & debuglevel:
+        syslog.openlog("FANCONTROL", syslog.LOG_PID)
+        syslog.syslog(syslog.LOG_DEBUG, s)
+
+
+def fancontrol_error(s):
+    if FANCTROLERROR & debuglevel:
+        syslog.openlog("FANCONTROL", syslog.LOG_PID)
+        syslog.syslog(syslog.LOG_ERR, s)
+
+
+def fanairflow_debug(s):
+    if FANAIRFLOWDEBUG & debuglevel:
+        syslog.openlog("AIR_FLOW_MONITOR", syslog.LOG_PID)
+        syslog.syslog(syslog.LOG_DEBUG, s)
+
+
+def fancontrol_warn(s):
+    syslog.openlog("FANCONTROL", syslog.LOG_PID)
+    syslog.syslog(syslog.LOG_LOCAL1 | syslog.LOG_WARNING, s)
+
+
+def fancontrol_crit(s):
+    syslog.openlog("FANCONTROL", syslog.LOG_PID)
+    syslog.syslog(syslog.LOG_LOCAL1 | syslog.LOG_CRIT, s)
+
+
+def fancontrol_alert(s):
+    syslog.openlog("FANCONTROL", syslog.LOG_PID)
+    syslog.syslog(syslog.LOG_LOCAL1 | syslog.LOG_ALERT, s)
+
+
+def fancontrol_emerg(s):
+    syslog.openlog("FANCONTROL", syslog.LOG_PID)
+    syslog.syslog(syslog.LOG_LOCAL1 | syslog.LOG_EMERG, s)
+
+
+def exec_os_cmd(cmd):
+    status, output = subprocess.getstatusoutput(cmd)
+    if status:
+        print(output)
+    return status, output
+
+
+def debug_init():
+    global debuglevel
+    try:
+        with open(FANCTROL_DEBUG_FILE, "r") as fd:
+            value = fd.read()
+        debuglevel = int(value)
+    except Exception:
+        debuglevel = 0
+
+
+error_temp = -9999  # get temp error
+invalid_temp = -10000  # get temp invalid
+PRE_FAN_NOK_UNKNOWN = "UNKNOWN"
+
+
+class DevFan(object):
+
+    def __init__(self, name, hal_interface):
+        self.__name = name
+        self.origin_name = None
+        self.display_name = None
+        self.air_flow = None
+        self.air_flow_inconsistent = False
+        self.int_case = hal_interface
+
+    @property
+    def name(self):
+        return self.__name
+
+    def get_fan_rotor_number(self):
+        return self.int_case.get_fan_rotor_number(self.name)
+
+    def get_fan_presence(self):
+        return self.int_case.get_fan_presence(self.name)
+
+    def get_fan_rotor_status(self, rotor_name):
+        return self.int_case.get_fan_rotor_status(self.name, rotor_name)
+
+    def get_fan_fru_info(self):
+        return self.int_case.get_fan_fru_info(self.name)
+
+    @property
+    def na_ret(self):
+        return self.int_case.na_ret
+
+    def update_fru_info(self):
+        try:
+            dic = self.get_fan_fru_info()
+            self.origin_name = dic["PN"]
+            self.air_flow = dic["AirFlow"]
+            self.display_name = dic["DisplayName"]
+        except Exception as e:
+            fanairflow_debug("update %s fru info error, msg: %s" % (self.name, str(e)))
+            self.origin_name = self.na_ret
+            self.air_flow = self.na_ret
+            self.display_name = self.na_ret
+
+
+class DevPsu(object):
+
+    def __init__(self, name, hal_interface):
+        self.__name = name
+        self.origin_name = None
+        self.display_name = None
+        self.air_flow = None
+        self.air_flow_inconsistent = False
+        self.int_case = hal_interface
+
+    @property
+    def name(self):
+        return self.__name
+
+    def get_psu_fru_info(self):
+        return self.int_case.get_psu_fru_info(self.name)
+
+    @property
+    def na_ret(self):
+        return self.int_case.na_ret
+
+    def update_fru_info(self):
+        try:
+            dic = self.get_psu_fru_info()
+            self.origin_name = dic["PN"]
+            self.air_flow = dic["AirFlow"]
+            self.display_name = dic["DisplayName"]
+        except Exception as e:
+            fanairflow_debug("update %s fru info error, msg: %s" % (self.name, str(e)))
+            self.origin_name = self.na_ret
+            self.air_flow = self.na_ret
+            self.display_name = self.na_ret
+
+
+class fancontrol(object):
+    __int_case = None
+
+    __pwm = 0x80
+
+    def __init__(self):
+        self.int_case = interface()
+        self.__config = baseutil.get_monitor_config()
+        self.__pid_config = self.__config["pid"]
+        self.__hyst_config = self.__config.get("hyst", {})
+        self.__temps_threshold_config = self.__config["temps_threshold"]
+        for temp_threshold in self.__temps_threshold_config.values():
+            temp_threshold['temp'] = 0
+            temp_threshold['fail_num'] = 0
+            temp_threshold['warning_num'] = 0  # temp warning times
+            temp_threshold['critical_num'] = 0  # temp critical times
+            temp_threshold['emergency_num'] = 0  # temp emergency times
+            temp_threshold.setdefault('ignore_threshold', 0)  # default temp threshold on
+            temp_threshold.setdefault('invalid', invalid_temp)
+            temp_threshold.setdefault('error', error_temp)
+
+        self.__otp_reboot_judge_file_config = self.__config.get("otp_reboot_judge_file", None)
+        if self.__otp_reboot_judge_file_config is None:
+            self.__otp_switch_reboot_judge_file = OTP_SWITCH_REBOOT_JUDGE_FILE
+            self.__otp_other_reboot_judge_file = OTP_OTHER_REBOOT_JUDGE_FILE
+        else:
+            self.__otp_switch_reboot_judge_file = self.__otp_reboot_judge_file_config.get(
+                "otp_switch_reboot_judge_file", OTP_SWITCH_REBOOT_JUDGE_FILE)
+            self.__otp_other_reboot_judge_file = self.__otp_reboot_judge_file_config.get(
+                "otp_other_reboot_judge_file", OTP_OTHER_REBOOT_JUDGE_FILE)
+
+        self.__fan_rotor_error_num = {}
+        self.__fan_present_status = {}  # {"FAN1":0, "FAN2":1...} 1:present, 0:absent
+        self.__fan_rotate_status = {}  # {"FAN1":0, "FAN2":1...} 1:OK, 0:NOT OK
+        self.__fan_repair_flag = {}    # {"FAN1":0, "FAN2":1...} 1:repair, 0:give up
+        fan_num = self.get_fan_total_number()
+        for i in range(fan_num):
+            fan_name = "FAN" + str(i + 1)
+            self.__fan_present_status[fan_name] = 1  # present
+            self.__fan_rotate_status[fan_name] = 1  # OK
+            self.__fan_repair_flag[fan_name] = 1  # repair
+            rotor_num = self.get_rotor_number(fan_name)
+            tmp_fan = {}
+            for j in range(rotor_num):
+                rotor_name = "Rotor" + str(j + 1)
+                tmp_fan[rotor_name] = 0  # not error
+            self.__fan_rotor_error_num[fan_name] = tmp_fan
+
+        self.__fancontrol_para = self.__config["fancontrol_para"]
+        self.__interval = self.__fancontrol_para.get("interval", 5)
+        self.__fan_status_interval = self.__fancontrol_para.get("fan_status_interval", 0)
+        self.__max_pwm = self.__fancontrol_para.get("max_pwm", 0xff)
+        self.__min_pwm = self.__fancontrol_para.get("min_pwm", 0x80)
+        self.__abnormal_pwm = self.__fancontrol_para.get("abnormal_pwm", 0xbb)
+        self.__warning_pwm = self.__fancontrol_para.get("warning_pwm", 0xff)
+        self.__temp_invalid_pid_pwm = self.__fancontrol_para.get("temp_invalid_pid_pwm", 0x80)
+        self.__temp_error_pid_pwm = self.__fancontrol_para.get("temp_error_pid_pwm", 0x80)
+        self.__temp_fail_num = self.__fancontrol_para.get("temp_fail_num", 3)
+        self.__check_temp_fail = self.__fancontrol_para.get("check_temp_fail", [])
+        self.__temp_warning_num = self.__fancontrol_para.get("temp_warning_num", 3)
+        self.__temp_critical_num = self.__fancontrol_para.get("temp_critical_num", 3)
+        self.__temp_emergency_num = self.__fancontrol_para.get("temp_emergency_num", 3)
+        self.__temp_warning_countdown = self.__fancontrol_para.get("temp_warning_countdown", 60)
+        self.__temp_critical_countdown = self.__fancontrol_para.get("temp_critical_countdown", 60)
+        self.__temp_emergency_countdown = self.__fancontrol_para.get("temp_emergency_countdown", 60)
+        self.__rotor_error_count = self.__fancontrol_para.get("rotor_error_count", 6)
+        self.__inlet_mac_diff = self.__fancontrol_para.get("inlet_mac_diff", 50)
+        self.__check_crit_reboot_flag = self.__fancontrol_para.get("check_crit_reboot_flag", 1)
+        self.__check_emerg_reboot_flag = self.__fancontrol_para.get("check_emerg_reboot_flag", 1)
+        self.__check_crit_reboot_num = self.__fancontrol_para.get("check_crit_reboot_num", 3)
+        self.__check_crit_sleep_time = self.__fancontrol_para.get("check_crit_sleep_time", 20)
+        self.__check_emerg_reboot_num = self.__fancontrol_para.get("check_emerg_reboot_num", 3)
+        self.__check_emerg_sleep_time = self.__fancontrol_para.get("check_emerg_sleep_time", 20)
+        self.__check_temp_emergency = self.__fancontrol_para.get("check_temp_emergency", 0)
+        self.__check_temp_critical = self.__fancontrol_para.get("check_temp_critical", 1)
+        self.__check_temp_warning = self.__fancontrol_para.get("check_temp_warning", 1)
+        self.__check_temp_emergency_reboot = self.__fancontrol_para.get("check_temp_emergency_reboot", [])
+        self.__psu_absent_fullspeed_num = self.__fancontrol_para.get("psu_absent_fullspeed_num", 1)
+        self.__fan_absent_fullspeed_num = self.__fancontrol_para.get("fan_absent_fullspeed_num", 1)
+        self.__rotor_error_fullspeed_num = self.__fancontrol_para.get("rotor_error_fullspeed_num", 1)
+        self.__psu_fan_control = self.__fancontrol_para.get("psu_fan_control", 1)  # default control psu fan
+        self.__fan_plug_in_pwm = self.__fancontrol_para.get("fan_plug_in_pwm", 0x80)
+        self.__fan_plug_in_default_countdown = self.__fancontrol_para.get("fan_plug_in_default_countdown", 0)
+        self.__deal_fan_error_policy = self.__fancontrol_para.get("deal_fan_error", 0)
+        self.__deal_fan_error_conf = self.__fancontrol_para.get("deal_fan_error_conf", {})
+        self.__deal_fan_error_default_countdown = self.__deal_fan_error_conf.get("countdown", 0)
+
+        self.__deal_all_fan_error_method_flag = self.__fancontrol_para.get("deal_all_fan_error_method_flag", 0)
+        if self.__deal_all_fan_error_method_flag:
+            self.__all_fan_error_switch_temp_critical_temp = self.__fancontrol_para.get("all_fan_error_switch_temp_critical_temp", 100)
+            self.__all_fan_error_recover_log = self.__fancontrol_para.get("all_fan_error_recover_log", "Reboot the system.")
+            self.__all_fan_error_recover_cmd = self.__fancontrol_para.get("all_fan_error_recover_cmd", "/sbin/reboot")
+            self.__all_fan_error_check_crit_reboot_num = self.__fancontrol_para.get("all_fan_error_check_crit_reboot_num", 3)
+            self.__all_fan_error_check_crit_sleep_time = self.__fancontrol_para.get("all_fan_error_check_crit_sleep_time", 20)
+
+        self.__warning_countdown = 0  # temp warning flag for normal fancontrol
+        self.__critical_countdown = 0  # temp critical flag for normal fancontrol
+        self.__emergency_countdown = 0  # temp emergency flag for normal fancontrol
+        self.__fan_plug_in_countdown = 0  # fan plug in flag for normal fancontrol
+        self.__deal_fan_error_countdown = 0
+        self.__fan_absent_num = 0
+        self.__fan_nok_num = 0
+        self.__pre_fan_nok = PRE_FAN_NOK_UNKNOWN
+        self.openloop = openloop()
+        self.pid = pid()
+        self.hyst = hysteresis()
+        self.__pwm = self.__min_pwm
+
+        self.__board_air_flow = ""
+        self.__fan_air_flow_monitor = self.__fancontrol_para.get("fan_air_flow_monitor", 0)
+        self.__psu_air_flow_monitor = self.__fancontrol_para.get("psu_air_flow_monitor", 0)
+        self.__air_flow_correct_fan_pwm = self.__fancontrol_para.get("air_flow_correct_fan_pwm", 0xff)
+        self.__air_flow_correct_psu_pwm = self.__fancontrol_para.get("air_flow_correct_psu_pwm", 0xff)
+        self.__air_flow_error_fan_pwm = self.__fancontrol_para.get("air_flow_error_fan_pwm", 0)
+        self.__air_flow_error_psu_pwm = self.__fancontrol_para.get("air_flow_error_psu_pwm", 0)
+        self.fan_air_flow_inconsistent_flag = False
+        self.psu_air_flow_inconsistent_flag = False
+        self.air_flow_inconsistent_flag = False
+        self.fan_obj_list = []
+        self.psu_obj_list = []
+
+    @property
+    def na_ret(self):
+        return self.int_case.na_ret
+
+    def get_onie_e2_obj(self, name):
+        return self.int_case.get_onie_e2_obj(name)
+
+    @property
+    def board_air_flow(self):
+        air_flow_tuple = (F2B_AIR_FLOW, B2F_AIR_FLOW)
+        if self.__board_air_flow not in air_flow_tuple:
+            self.__board_air_flow = self.int_case.get_device_airflow(ONIE_E2_NAME)
+            fanairflow_debug("board_air_flow: %s" % self.__board_air_flow)
+        return self.__board_air_flow
+
+    @property
+    def fan_air_flow_monitor(self):
+        return self.__fan_air_flow_monitor
+
+    @property
+    def psu_air_flow_monitor(self):
+        return self.__psu_air_flow_monitor
+
+    @property
+    def air_flow_correct_fan_pwm(self):
+        return self.__air_flow_correct_fan_pwm
+
+    @property
+    def air_flow_correct_psu_pwm(self):
+        return self.__air_flow_correct_psu_pwm
+
+    @property
+    def air_flow_error_fan_pwm(self):
+        return self.__air_flow_error_fan_pwm
+
+    @property
+    def air_flow_error_psu_pwm(self):
+        return self.__air_flow_error_psu_pwm
+
+    def get_para(self, t):
+        para = self.__pid_config.get(t)
+        return para
+
+    def update_over_temp_threshold_num(self):
+        for temp_threshold in self.__temps_threshold_config.values():
+            if temp_threshold['ignore_threshold']:
+                continue
+            emergency_threshold = temp_threshold.get('emergency', None)
+            critical_threshold = temp_threshold.get('critical', None)
+            warning_threshold = temp_threshold.get('warning', None)
+            fancontrol_debug("%s warning = %s, critical = %s, emergency = %s" %
+                             (temp_threshold['name'], warning_threshold, critical_threshold, emergency_threshold))
+
+            if emergency_threshold is not None and temp_threshold['temp'] >= emergency_threshold:
+                temp_threshold['emergency_num'] += 1
+            else:
+                temp_threshold['emergency_num'] = 0
+
+            if critical_threshold is not None and temp_threshold['temp'] >= critical_threshold:
+                temp_threshold['critical_num'] += 1
+            else:
+                temp_threshold['critical_num'] = 0
+
+            if warning_threshold is not None and temp_threshold['temp'] >= warning_threshold:
+                temp_threshold['warning_num'] += 1
+            else:
+                temp_threshold['warning_num'] = 0
+
+            fancontrol_debug("%s warning_num = %d, critical_num = %d, emergency_num = %d" %
+                             (temp_threshold['name'], temp_threshold['warning_num'], temp_threshold['critical_num'], temp_threshold.get("emergency_num")))
+
+    def get_monitor_temp(self):
+        sensorlist = self.int_case.get_temp_info()
+
+        for temp_threshold in self.__temps_threshold_config.values():
+            sensor = sensorlist.get(temp_threshold['name'])
+            if sensor["Value"] is None or int(sensor["Value"]) == self.int_case.error_ret:
+                temp_threshold['fail_num'] += 1
+                fancontrol_error("get %s failed, fail_num = %d" % (temp_threshold['name'], temp_threshold['fail_num']))
+            else:
+                temp_threshold['fail_num'] = 0
+                temp_threshold.setdefault('fix', 0)
+                temp_threshold['temp'] = sensor["Value"] + temp_threshold['fix']
+            fancontrol_debug("%s = %d" % (temp_threshold['name'], temp_threshold['temp']))
+        self.update_over_temp_threshold_num()
+
+    def is_temp_warning(self):
+        warning_flag = False
+        for temp_threshold in self.__temps_threshold_config.values():
+            if temp_threshold['ignore_threshold']:
+                continue
+            if temp_threshold['warning_num'] >= self.__temp_warning_num:
+                warning_flag = True
+                fancontrol_warn("%%FANCONTROL-4-TEMP_HIGH: %s temperature %sC is larger than warning threshold %sC." %
+                                (temp_threshold['name'], temp_threshold['temp'], temp_threshold.get('warning')))
+        return warning_flag
+
+    def checkTempWarning(self):
+        try:
+            if self.is_temp_warning():
+                self.__warning_countdown = self.__temp_warning_countdown
+                fancontrol_debug("temp is over warning")
+                return True
+            if self.__warning_countdown > 0:
+                self.__warning_countdown -= 1
+            return False
+        except Exception as e:
+            fancontrol_error("%%policy: checkTempWarning failed")
+            fancontrol_error(str(e))
+        return False
+
+    def checkTempWarningCountdown(self):
+        if self.__warning_countdown > 0:
+            return True
+        return False
+
+    def is_temp_critical(self):
+        critical_flag = False
+        for temp_threshold in self.__temps_threshold_config.values():
+            temp_threshold['critical_flag'] = False
+            if temp_threshold['ignore_threshold']:
+                continue
+            if temp_threshold['critical_num'] >= self.__temp_critical_num:
+                critical_flag = True
+                temp_threshold['critical_flag'] = True
+                fancontrol_crit("%%FANCONTROL-2-TEMP_HIGH: %s temperature %sC is larger than critical threshold %sC." %
+                                (temp_threshold['name'], temp_threshold['temp'], temp_threshold.get('critical')))
+        return critical_flag
+
+    def checkTempCritical(self):
+        try:
+            if self.is_temp_critical():
+                self.__critical_countdown = self.__temp_critical_countdown
+                fancontrol_debug("temp is over critical")
+                return True
+            if self.__critical_countdown > 0:
+                self.__critical_countdown -= 1
+            return False
+        except Exception as e:
+            fancontrol_error("%%policy: checkTempCrit failed")
+            fancontrol_error(str(e))
+        return False
+
+    def is_temp_emergency(self):
+        emergency_flag = False
+        for temp_threshold in self.__temps_threshold_config.values():
+            temp_threshold['emergency_flag'] = False
+            if temp_threshold['ignore_threshold']:
+                continue
+            if temp_threshold['emergency_num'] >= self.__temp_emergency_num:
+                emergency_flag = True
+                temp_threshold['emergency_flag'] = True
+                fancontrol_alert("%%FANCONTROL-1-TEMP_HIGH: %s temperature %sC is larger than emergency threshold %sC." %
+                                 (temp_threshold['name'], temp_threshold['temp'], temp_threshold.get('emergency')))
+        return emergency_flag
+
+    def checkTempEmergency(self):
+        try:
+            if self.is_temp_emergency():
+                self.__emergency_countdown = self.__temp_emergency_countdown
+                fancontrol_debug("temp is over emergency")
+                return True
+            if self.__emergency_countdown > 0:
+                self.__emergency_countdown -= 1
+            return False
+        except Exception as e:
+            fancontrol_error("%%policy: checkTempEmergency failed")
+            fancontrol_error(str(e))
+        return False
+
+    def checkTempCriticalCountdown(self):
+        if self.__critical_countdown > 0:
+            return True
+        return False
+
+    def checkTempEmergencyCountdown(self):
+        if self.__emergency_countdown > 0:
+            return True
+        return False
+
+    def checkTempRebootCrit(self):
+        try:
+            if self.is_temp_critical():
+                temp_dict = dict(self.__temps_threshold_config)
+                tmp = temp_dict.get(SWITCH_TEMP)
+                if tmp['critical_flag'] is True:
+                    fancontrol_debug("switch temp is over reboot critical")
+                    return TEMP_REBOOT_CRIT_SWITCH_FLAG
+                del temp_dict[SWITCH_TEMP]
+                for temp_items in temp_dict.values():
+                    if temp_items['ignore_threshold']:
+                        continue
+                    if temp_items['critical_flag'] is False:
+                        return 0
+
+                fancontrol_debug("other temp is over reboot critical")
+                return TEMP_REBOOT_CRIT_OTHER_FLAG
+        except Exception as e:
+            fancontrol_error("%%policy: checkTempRebootCrit failed")
+            fancontrol_error(str(e))
+        return 0
+
+    def checkCritReboot(self):
+        try:
+            reboot_flag = self.checkTempRebootCrit()
+            if reboot_flag > 0:
+                self.set_all_fan_speed_pwm(self.__max_pwm)
+                for i in range(self.__check_crit_reboot_num):
+                    time.sleep(self.__check_crit_sleep_time)
+                    self.get_monitor_temp()
+                    reboot_flag = self.checkTempRebootCrit()
+                    if reboot_flag > 0:
+                        fancontrol_emerg("%%FANCONTROL-0-TEMP_EMERG: The temperature of device over reboot critical value lasts for %d seconds." %
+                                         (self.__check_crit_sleep_time * (i + 1)))
+                        continue
+                    fancontrol_debug("The temperature of device is not over reboot critical value.")
+                    break
+                if reboot_flag > 0:
+                    fancontrol_emerg(
+                        "%%FANCONTROL-0-TEMP_EMERG: The temperature of device over reboot critical value, system is going to reboot now.")
+                    for temp_threshold in self.__temps_threshold_config.values():
+                        fancontrol_emerg(
+                            "%%FANCONTROL-TEMP_EMERG: %s temperature: %sC." %
+                            (temp_threshold['name'], temp_threshold['temp']))
+                    if reboot_flag == TEMP_REBOOT_CRIT_SWITCH_FLAG:
+                        create_judge_file = "touch %s" % self.__otp_switch_reboot_judge_file
+                    else:
+                        create_judge_file = "touch %s" % self.__otp_other_reboot_judge_file
+                    exec_os_cmd(create_judge_file)
+                    exec_os_cmd("sync")
+                    time.sleep(3)
+                    exec_os_cmd("/sbin/reboot")
+        except Exception as e:
+            fancontrol_error("%%policy: checkCritReboot failed")
+            fancontrol_error(str(e))
+
+    def checkTempRebootEmerg(self):
+        try:
+            if self.is_temp_emergency():
+                temp_emerg_reboot_flag = False
+                for temp_list in self.__check_temp_emergency_reboot:
+                    for temp in temp_list:
+                        tmp = self.__temps_threshold_config.get(temp)
+                        if tmp['emergency_flag'] is False:
+                            fancontrol_debug("temp_list %s, temp: %s not emergency" % (temp_list, temp))
+                            temp_emerg_reboot_flag = False
+                            break
+                        temp_emerg_reboot_flag = True
+                    if temp_emerg_reboot_flag is True:
+                        fancontrol_debug("temp_list %s, all temp is over emergency reboot" % temp_list)
+                        return True
+        except Exception as e:
+            fancontrol_error("%%policy: checkTempRebootEmerg failed")
+            fancontrol_error(str(e))
+        return False
+
+    def checkEmergReboot(self):
+        try:
+            reboot_flag = False
+            if self.checkTempRebootEmerg() is True:
+                self.set_all_fan_speed_pwm(self.__max_pwm)
+                for i in range(self.__check_emerg_reboot_num):
+                    time.sleep(self.__check_emerg_sleep_time)
+                    self.get_monitor_temp()
+                    if self.checkTempRebootEmerg() is True:
+                        fancontrol_emerg("%%FANCONTROL-0-TEMP_EMERG: The temperature of device over reboot emergency value lasts for %d seconds." %
+                                         (self.__check_emerg_sleep_time * (i + 1)))
+                        reboot_flag = True
+                        continue
+                    fancontrol_debug("The temperature of device is not over reboot emergency value.")
+                    reboot_flag = False
+                    break
+                if reboot_flag is True:
+                    fancontrol_emerg(
+                        "%%FANCONTROL-0-TEMP_EMERG: The temperature of device over reboot emergency value, system is going to reboot now.")
+                    for temp_threshold in self.__temps_threshold_config.values():
+                        fancontrol_emerg(
+                            "%%FANCONTROL-0-TEMP_EMERG: %s temperature: %sC." %
+                            (temp_threshold['name'], temp_threshold['temp']))
+                    create_judge_file = "touch %s" % OTP_SWITCH_REBOOT_JUDGE_FILE
+                    exec_os_cmd(create_judge_file)
+                    exec_os_cmd("sync")
+                    time.sleep(3)
+                    exec_os_cmd("/sbin/reboot")
+        except Exception as e:
+            fancontrol_error("%%policy: checkEmergReboot failed")
+            fancontrol_error(str(e))
+
+    def all_fan_error_checkTempRebootCrit(self):
+        try:
+            temp_dict = dict(self.__temps_threshold_config)
+            tmp = temp_dict.get(SWITCH_TEMP)
+            switch_temp_value = tmp['temp']
+            if switch_temp_value >= self.__all_fan_error_switch_temp_critical_temp:
+                fancontrol_debug("all fan error, switch temp[%d] is over critical[%d]."
+                    % (switch_temp_value, self.__all_fan_error_switch_temp_critical_temp))
+                return True
+        except Exception as e:
+            fancontrol_error("%%policy: all_fan_error_checkTempRebootCrit failed")
+            fancontrol_error(str(e))
+        return False
+
+    def all_fan_error_checkCritReboot(self):
+        try:
+            reboot_flag = self.all_fan_error_checkTempRebootCrit()
+            if reboot_flag > 0:
+                self.set_all_fan_speed_pwm(self.__max_pwm)
+                for i in range(self.__all_fan_error_check_crit_reboot_num):
+                    time.sleep(self.__all_fan_error_check_crit_sleep_time)
+                    self.get_monitor_temp()
+                    reboot_flag = self.all_fan_error_checkTempRebootCrit()
+                    if reboot_flag > 0:
+                        fancontrol_emerg("%%FANCONTROL-0-TEMP_EMERG: The temperature of device over reboot critical value lasts for %d seconds." %
+                                         (self.__all_fan_error_check_crit_sleep_time * (i + 1)))
+                        continue
+                    else:
+                        fancontrol_debug("The temperature of device is not over reboot critical value.")
+                        break
+                if reboot_flag > 0:
+                    fancontrol_emerg("%%FANCONTROL-0-TEMP_EMERG: The temperature of device over reboot critical value.")
+                    fancontrol_emerg(self.__all_fan_error_recover_log)
+                    exec_os_cmd("sync")
+                    time.sleep(3)
+                    exec_os_cmd(self.__all_fan_error_recover_cmd)
+        except Exception as e:
+            fancontrol_error("%%policy: all_fan_error_checkCritReboot failed")
+            fancontrol_error(str(e))
+
+    def get_fan_total_number(self):
+        return self.int_case.get_fan_total_number()
+
+    def get_rotor_number(self, fan_name):
+        return self.int_case.get_fan_rotor_number(fan_name)
+
+    def get_fan_presence(self, fan_name):
+        return self.int_case.get_fan_presence(fan_name)
+
+    def get_fan_rotor_status(self, fan_name, rotor_name):
+        return self.int_case.get_fan_rotor_status(fan_name, rotor_name)
+
+    def get_psu_total_number(self):
+        return self.int_case.get_psu_total_number()
+
+    def get_psu_presence(self, psu_name):
+        return self.int_case.get_psu_presence(psu_name)
+
+    def get_psu_input_output_status(self, psu_name):
+        return self.int_case.get_psu_input_output_status(psu_name)
+
+    def checkFanPresence(self):
+        absent_num = 0
+
+        fan_num = self.get_fan_total_number()
+        for i in range(fan_num):
+            fan_name = "FAN" + str(i + 1)
+            rotor_num = self.get_rotor_number(fan_name)
+            tmp_fan = self.__fan_rotor_error_num.get(fan_name)
+            status = self.get_fan_presence(fan_name)
+            if status is False:
+                absent_num = absent_num + 1
+                self.__fan_present_status[fan_name] = 0
+                fancontrol_debug("%s absent" % fan_name)
+            else:
+                if self.__fan_present_status[fan_name] == 0:    # absent -> present
+                    self.__pre_fan_nok = PRE_FAN_NOK_UNKNOWN
+                    self.__fan_plug_in_countdown = self.__fan_plug_in_default_countdown
+                    self.__fan_repair_flag[fan_name] = 1
+                    for j in range(rotor_num):
+                        rotor_name = "Rotor" + str(j + 1)
+                        tmp_fan[rotor_name] = 0
+                self.__fan_present_status[fan_name] = 1
+                fancontrol_debug("%s presence" % fan_name)
+        return absent_num
+
+    def checkFanRotorStatus(self):
+        err_num = 0
+        self.__fan_nok_num = 0
+        fan_num = self.get_fan_total_number()
+        for i in range(fan_num):
+            fan_name = "FAN" + str(i + 1)
+            rotor_num = self.get_rotor_number(fan_name)
+            tmp_fan = self.__fan_rotor_error_num.get(fan_name)
+            fan_rotor_err_cnt = 0
+            for j in range(rotor_num):
+                rotor_name = "Rotor" + str(j + 1)
+                status = self.get_fan_rotor_status(fan_name, rotor_name)
+                if status is True:
+                    tmp_fan[rotor_name] = 0
+                    fancontrol_debug("%s %s ok" % (fan_name, rotor_name))
+                else:
+                    tmp_fan[rotor_name] += 1
+                    if tmp_fan[rotor_name] >= self.__rotor_error_count:
+                        err_num = err_num + 1
+                        fan_rotor_err_cnt += 1
+                        fancontrol_debug("%s %s error" % (fan_name, rotor_name))
+                    fancontrol_debug("%s %s error %d times" % (fan_name, rotor_name, tmp_fan[rotor_name]))
+            if fan_rotor_err_cnt == 0:
+                self.__fan_rotate_status[fan_name] = 1  # FAN is ok
+            else:
+                self.__fan_rotate_status[fan_name] = 0  # FAN is not ok
+                self.__fan_nok_num += 1
+        fancontrol_debug("fan not ok number:%d." % self.__fan_nok_num)
+        return err_num
+
+    def checkPsuPresence(self):
+        absent_num = 0
+        psu_num = self.get_psu_total_number()
+        for i in range(psu_num):
+            psu_name = "PSU" + str(i + 1)
+            status = self.get_psu_presence(psu_name)
+            if status is False:
+                absent_num = absent_num + 1
+                fancontrol_debug("%s absent" % psu_name)
+            else:
+                fancontrol_debug("%s presence" % psu_name)
+        return absent_num
+
+    def checkPsuStatus(self):
+        err_num = 0
+        psu_num = self.get_psu_total_number()
+        for i in range(psu_num):
+            psu_name = "PSU" + str(i + 1)
+            status = self.get_psu_input_output_status(psu_name)
+            if status is False:
+                err_num = err_num + 1
+                fancontrol_debug("%s error" % psu_name)
+            else:
+                fancontrol_debug("%s ok" % psu_name)
+        return err_num
+
+    def checkDevError(self):
+        pwm = self.__min_pwm
+        switchtemp = self.__temps_threshold_config.get(SWITCH_TEMP)['temp']
+        inlettemp = self.__temps_threshold_config.get(INLET_TEMP)['temp']
+        temp_diff = abs(switchtemp - inlettemp)
+        fancontrol_debug("|switchtemp - inlettemp| = %d" % temp_diff)
+        if temp_diff >= self.__inlet_mac_diff:
+            fancontrol_debug("temp_diff is over than inlet_mac_diff(%d)" % self.__inlet_mac_diff)
+            if self.__pwm > self.__abnormal_pwm:
+                pwm = self.__max_pwm
+            else:
+                pwm = self.__abnormal_pwm
+        return pwm
+
+    def checktempfail(self):
+        pwm = self.__min_pwm
+        for temp in self.__check_temp_fail:
+            temp_name = temp.get("temp_name")
+            temp_fail_num = self.__temps_threshold_config.get(temp_name)['fail_num']
+            if temp_fail_num >= self.__temp_fail_num:
+                pwm = self.__abnormal_pwm
+                fancontrol_debug("%s temp_fail_num = %d" % (temp_name, temp_fail_num))
+                fancontrol_debug("self.__temp_fail_num = %d" % self.__temp_fail_num)
+        return pwm
+
+    def abnormal_check(self):
+        pwm_list = []
+        pwm_min = self.__min_pwm
+        pwm_list.append(pwm_min)
+
+        self.__fan_absent_num = self.checkFanPresence()
+        if self.__fan_absent_num >= self.__fan_absent_fullspeed_num:
+            fan_absent_pwm = self.__max_pwm
+            pwm_list.append(fan_absent_pwm)
+            fancontrol_debug("fan_absent_pwm = 0x%x" % fan_absent_pwm)
+
+        rotor_err_num = self.checkFanRotorStatus()
+        if rotor_err_num >= self.__rotor_error_fullspeed_num:
+            rotor_err_pwm = self.__max_pwm
+            pwm_list.append(rotor_err_pwm)
+            fancontrol_debug("rotor_err_pwm = 0x%x" % rotor_err_pwm)
+
+        if self.__deal_all_fan_error_method_flag:
+            fan_num = self.get_fan_total_number()
+            # all fan absent or fail
+            if (self.__fan_absent_num == fan_num) or (self.__fan_nok_num == fan_num):
+                fancontrol_debug("All fan error or absent.")
+                self.all_fan_error_checkCritReboot()
+
+        if self.__check_temp_emergency == 1:
+            status = self.checkTempEmergency()
+            if status is True:
+                over_emerg_pwm = self.__max_pwm
+                pwm_list.append(over_emerg_pwm)
+                fancontrol_debug("over_emerg_pwm = 0x%x" % over_emerg_pwm)
+                # do reset check
+                if self.__check_emerg_reboot_flag == 1:
+                    self.checkEmergReboot()
+            else:
+                if self.checkTempEmergencyCountdown() is True:  # temp lower than emergency in 5 min
+                    over_emerg_countdown_pwm = self.__max_pwm
+                    pwm_list.append(over_emerg_countdown_pwm)
+                    fancontrol_debug("TempEmergencyCountdown: %d, over_emerg_countdown_pwm = 0x%x" %
+                                     (self.__emergency_countdown, over_emerg_countdown_pwm))
+
+        if self.__check_temp_critical == 1:
+            status = self.checkTempCritical()
+            if status is True:
+                over_crit_pwm = self.__max_pwm
+                pwm_list.append(over_crit_pwm)
+                fancontrol_debug("over_crit_pwm = 0x%x" % over_crit_pwm)
+                # do reset check
+                if self.__check_crit_reboot_flag == 1:
+                    self.checkCritReboot()
+            else:
+                if self.checkTempCriticalCountdown() is True:  # temp lower than critical in 5 min
+                    over_crit_countdown_pwm = self.__max_pwm
+                    pwm_list.append(over_crit_countdown_pwm)
+                    fancontrol_debug("TempCriticalCountdown: %d, over_crit_countdown_pwm = 0x%x" %
+                                     (self.__critical_countdown, over_crit_countdown_pwm))
+
+        if self.__check_temp_warning == 1:
+            status = self.checkTempWarning()
+            if status is True:
+                over_warn_pwm = self.__warning_pwm
+                pwm_list.append(over_warn_pwm)
+                fancontrol_debug("over_warn_pwm = 0x%x" % over_warn_pwm)
+            else:
+                if self.checkTempWarningCountdown() is True:  # temp lower than warning in 5 min
+                    over_warn_countdown_pwm = self.__warning_pwm
+                    pwm_list.append(over_warn_countdown_pwm)
+                    fancontrol_debug("TempWarningCountdown: %d, over_warn_countdown_pwm = 0x%x" %
+                                     (self.__warning_countdown, over_warn_countdown_pwm))
+
+        psu_absent_num = self.checkPsuPresence()
+        if psu_absent_num >= self.__psu_absent_fullspeed_num:
+            psu_absent_pwm = self.__max_pwm
+            pwm_list.append(psu_absent_pwm)
+            fancontrol_debug("psu_absent_pwm = 0x%x" % psu_absent_pwm)
+
+        dev_err_pwm = self.checkDevError()
+        pwm_list.append(dev_err_pwm)
+        fancontrol_debug("dev_err_pwm = 0x%x" % dev_err_pwm)
+
+        temp_fail_pwm = self.checktempfail()
+        pwm_list.append(temp_fail_pwm)
+        fancontrol_debug("temp_fail_pwm = 0x%x" % temp_fail_pwm)
+
+        pwm = max(pwm_list)
+        return pwm
+
+    def get_error_fan(self):
+        fan_num = self.get_fan_total_number()
+        for i in range(fan_num):
+            fan_name = "FAN" + str(i + 1)
+            if self.__fan_rotate_status[fan_name] == 0:
+                return fan_name
+        return None
+
+    def fan_error_update_pwm(self, fan_pwm_dict):
+        try:
+            fancontrol_debug("enter deal fan error policy")
+            ori_fan_pwm_dict = fan_pwm_dict.copy()
+
+            err_fan_name = self.get_error_fan()
+            if err_fan_name is None:
+                fancontrol_debug("fan name is None, do nothing.")
+                return ori_fan_pwm_dict
+
+            if self.__fan_repair_flag[err_fan_name] == 0:
+                fancontrol_debug("%s already repaired, do nothing." % err_fan_name)
+                return ori_fan_pwm_dict
+
+            if self.__pre_fan_nok != err_fan_name:
+                fancontrol_debug(
+                    "not ok fan change from %s to %s, update countdown." %
+                    (self.__pre_fan_nok, err_fan_name))
+                self.__deal_fan_error_countdown = self.__deal_fan_error_default_countdown
+                if self.__pre_fan_nok != PRE_FAN_NOK_UNKNOWN:
+                    fancontrol_debug(
+                        "%s repaire success, %s NOT OK, try to repaire." %
+                        (self.__pre_fan_nok, err_fan_name))
+                    self.__fan_repair_flag[self.__pre_fan_nok] = 0
+                self.__pre_fan_nok = err_fan_name
+
+            if self.__deal_fan_error_countdown > 0:
+                self.__deal_fan_error_countdown -= 1
+            fancontrol_debug("%s repaire, countdown %d." % (err_fan_name, self.__deal_fan_error_countdown))
+
+            if self.__deal_fan_error_countdown == 0:
+                self.__fan_repair_flag[err_fan_name] = 0
+                fancontrol_debug("%s set repaire fail flag, use origin pwm." % err_fan_name)
+                return ori_fan_pwm_dict
+
+            fan_err_pwm_conf_list = self.__deal_fan_error_conf[err_fan_name]
+            for item in fan_err_pwm_conf_list:
+                fan_pwm_dict[item["name"]] = item["pwm"]
+            fancontrol_debug("fan pwm update, fan pwm dict:%s" % fan_pwm_dict)
+
+            return fan_pwm_dict
+        except Exception as e:
+            fancontrol_error("%%policy: deal_fan_error raise Exception:%s" % str(e))
+            self.__pre_fan_nok = PRE_FAN_NOK_UNKNOWN
+        return ori_fan_pwm_dict
+
+    def get_fan_pwm_dict(self, default_pwm):
+        fan_pwm_dict = {}
+        fan_num = self.get_fan_total_number()
+        for i in range(fan_num):
+            fan_name = "FAN" + str(i + 1)
+            fan_pwm_dict[fan_name] = default_pwm
+        if self.__deal_fan_error_policy:
+            if self.__fan_absent_num == 0 and self.__fan_nok_num == 1:
+                fan_pwm_dict = self.fan_error_update_pwm(fan_pwm_dict)
+            else:
+                if self.__pre_fan_nok != PRE_FAN_NOK_UNKNOWN and self.__fan_rotate_status[self.__pre_fan_nok] == 1:
+                    fancontrol_debug("%s repaire success." % (self.__pre_fan_nok))
+                    self.__fan_repair_flag[self.__pre_fan_nok] = 0
+                self.__pre_fan_nok = PRE_FAN_NOK_UNKNOWN
+        return fan_pwm_dict
+
+    def get_psu_pwm_dict(self, default_pwm):
+        psu_pwm_dict = {}
+        psu_num = self.get_psu_total_number()
+        for i in range(psu_num):
+            psu_name = "PSU" + str(i + 1)
+            psu_pwm_dict[psu_name] = default_pwm
+        return psu_pwm_dict
+
+    def check_board_air_flow(self):
+        board_air_flow = self.board_air_flow
+        air_flow_tuple = (F2B_AIR_FLOW, B2F_AIR_FLOW)
+        if board_air_flow not in air_flow_tuple:
+            fanairflow_debug("get board air flow error, value [%s]" % board_air_flow)
+            return False
+        fanairflow_debug("board air flow check ok: %s" % board_air_flow)
+        return True
+
+    def check_fan_air_flow(self):
+        if self.fan_air_flow_monitor:
+            fanairflow_debug("open air flow monitor, check fan air flow")
+            ret = self.check_board_air_flow()
+            if ret is False:
+                fanairflow_debug("get board air flow error, set fan_air_flow_inconsistent_flag False")
+                self.fan_air_flow_inconsistent_flag = False
+                return
+            air_flow_inconsistent_flag_tmp = False
+            for fan_obj in self.fan_obj_list:
+                fan_obj.update_fru_info()
+                fanairflow_debug("%s origin name: [%s], display name: [%s] air flow [%s]" %
+                                 (fan_obj.name, fan_obj.origin_name, fan_obj.display_name, fan_obj.air_flow))
+                if fan_obj.air_flow == self.na_ret:
+                    fanairflow_debug("%s get air flow failed, set air_flow_inconsistent flag False" % fan_obj.name)
+                    fan_obj.air_flow_inconsistent = False
+                    continue
+                if fan_obj.air_flow != self.board_air_flow:
+                    fanairflow_debug("%s air flow error, origin name: [%s], display name: [%s], fan air flow [%s], board air flow [%s]" %
+                                     (fan_obj.name, fan_obj.origin_name, fan_obj.display_name, fan_obj.air_flow, self.board_air_flow))
+                    air_flow_inconsistent_flag_tmp = True
+                    fan_obj.air_flow_inconsistent = True
+                else:
+                    fanairflow_debug("%s air flow check ok, origin name: [%s], display name: [%s], fan air flow: [%s], board air flow: [%s]" %
+                                     (fan_obj.name, fan_obj.origin_name, fan_obj.display_name, fan_obj.air_flow, self.board_air_flow))
+                    fan_obj.air_flow_inconsistent = False
+            self.fan_air_flow_inconsistent_flag = air_flow_inconsistent_flag_tmp
+        else:
+            fanairflow_debug("air flow monitor not open, set fan_air_flow_inconsistent_flag False")
+            self.fan_air_flow_inconsistent_flag = False
+        return
+
+    def check_psu_air_flow(self):
+        if self.psu_air_flow_monitor:
+            fanairflow_debug("open air flow monitor, check psu air flow")
+            ret = self.check_board_air_flow()
+            if ret is False:
+                fanairflow_debug("get board air flow error, set psu_air_flow_inconsistent_flag False")
+                self.psu_air_flow_inconsistent_flag = False
+                return
+            air_flow_inconsistent_flag_tmp = False
+            for psu_obj in self.psu_obj_list:
+                psu_obj.update_fru_info()
+                fanairflow_debug("%s origin name: [%s], display name: [%s] air flow [%s]" %
+                                 (psu_obj.name, psu_obj.origin_name, psu_obj.display_name, psu_obj.air_flow))
+                if psu_obj.air_flow == self.na_ret:
+                    fanairflow_debug("%s get air flow failed, set air_flow_inconsistent flag False" % psu_obj.name)
+                    psu_obj.air_flow_inconsistent = False
+                    continue
+                if psu_obj.air_flow != self.board_air_flow:
+                    fanairflow_debug("%s air flow error, origin name: [%s], display name: [%s], psu air flow [%s], board air flow [%s]" %
+                                     (psu_obj.name, psu_obj.origin_name, psu_obj.display_name, psu_obj.air_flow, self.board_air_flow))
+                    air_flow_inconsistent_flag_tmp = True
+                    psu_obj.air_flow_inconsistent = True
+                else:
+                    fanairflow_debug("%s air flow check ok, origin name: [%s], display name: [%s], psu air flow: [%s], board air flow: [%s]" %
+                                     (psu_obj.name, psu_obj.origin_name, psu_obj.display_name, psu_obj.air_flow, self.board_air_flow))
+                    psu_obj.air_flow_inconsistent = False
+            self.psu_air_flow_inconsistent_flag = air_flow_inconsistent_flag_tmp
+        else:
+            fanairflow_debug("air flow monitor not open, set psu_air_flow_inconsistent_flag False")
+            self.psu_air_flow_inconsistent_flag = False
+        return
+
+    def do_fancontrol(self):
+        pwm_list = []
+        pwm_min = self.__min_pwm
+        pwm_list.append(pwm_min)
+
+        # first check air flow
+        self.check_fan_air_flow()
+        self.check_psu_air_flow()
+        if self.fan_air_flow_inconsistent_flag is True or self.psu_air_flow_inconsistent_flag is True:
+            self.air_flow_inconsistent_flag = True
+        else:
+            self.air_flow_inconsistent_flag = False
+        fanairflow_debug("check_air_flow, air_flow_inconsistent_flag: %s" % self.air_flow_inconsistent_flag)
+        # get_monitor_temp
+        self.get_monitor_temp()
+        fancontrol_debug("last_pwm = 0x%x" % self.__pwm)
+        # openloop
+        inlettemp = self.__temps_threshold_config.get(INLET_TEMP)['temp']
+        linear_value = self.openloop.linear_cacl(inlettemp)
+        if linear_value is None:
+            linear_value = self.__min_pwm
+        pwm_list.append(linear_value)
+        fancontrol_debug("linear_value = 0x%x" % linear_value)
+
+        curve_value = self.openloop.curve_cacl(inlettemp)
+        if curve_value is None:
+            curve_value = self.__min_pwm
+        pwm_list.append(curve_value)
+        fancontrol_debug("curve_value = 0x%x" % curve_value)
+
+        # hyst
+        for hyst_index in self.__hyst_config.values():
+            temp_name = hyst_index.get("name")
+            hyst_flag = hyst_index.get("flag", 0)
+            if hyst_flag == 0:
+                fancontrol_debug("%s hyst flag is 0, do nothing" % temp_name)
+                continue
+            tmp_temp = int(self.__temps_threshold_config.get(temp_name)['temp'])  # make sure temp is int
+            hyst_value = self.hyst.cacl(temp_name, tmp_temp)
+            if hyst_value is None:
+                hyst_value = self.__min_pwm
+            pwm_list.append(hyst_value)
+            fancontrol_debug("%s hyst_value = 0x%x" % (temp_name, hyst_value))
+
+        # pid
+        for pid_index in self.__pid_config.values():
+            temp_name = pid_index.get("name")
+            pid_flag = pid_index.get("flag", 0)
+            if pid_flag == 0:
+                fancontrol_debug("%s pid flag is 0, do nothing" % temp_name)
+                continue
+            tmp_temp = self.__temps_threshold_config.get(temp_name)['temp']
+            if tmp_temp is not None:
+                tmp_temp = int(tmp_temp)  # make sure temp is int
+                invalid_temp_val = self.__temps_threshold_config.get(temp_name)['invalid']
+                error_temp_val = self.__temps_threshold_config.get(temp_name)['error']
+                if tmp_temp == invalid_temp_val:  # temp is invalid
+                    temp = None
+                    self.pid.cacl(self.__pwm, temp_name, temp)  # temp invalid, PID need to record None
+                    pid_value = self.__temp_invalid_pid_pwm
+                    fancontrol_debug("%s is invalid, pid_value = 0x%x" % (temp_name, pid_value))
+                    fancontrol_debug("temp = %d, invalid_temp = %d" % (tmp_temp, invalid_temp_val))
+                elif tmp_temp == error_temp_val:  # temp is error
+                    temp = None
+                    self.pid.cacl(self.__pwm, temp_name, temp)  # temp error, PID need to record None
+                    pid_value = self.__temp_error_pid_pwm
+                    fancontrol_debug("%s is error, pid_value = 0x%x" % (temp_name, pid_value))
+                    fancontrol_debug("temp = %d, error_temp = %d" % (tmp_temp, error_temp_val))
+                else:
+                    pid_value = self.pid.cacl(self.__pwm, temp_name, tmp_temp)
+            else:  # temp get failed
+                pid_value = self.pid.cacl(self.__pwm, temp_name, tmp_temp)
+            if pid_value is None:
+                pid_value = self.__min_pwm
+            pwm_list.append(pid_value)
+            fancontrol_debug("%s pid_value = 0x%x" % (temp_name, pid_value))
+
+        # abnormal
+        abnormal_value = self.abnormal_check()
+        pwm_list.append(abnormal_value)
+        fancontrol_debug("abnormal_value = 0x%x" % abnormal_value)
+
+        if self.__fan_plug_in_countdown > 0 and self.__fan_absent_num == 0:
+            fancontrol_debug("fan plug in countdown %d, set plug in pwm: 0x%x" %
+                             (self.__fan_plug_in_countdown, self.__fan_plug_in_pwm))
+            self.__pwm = self.__fan_plug_in_pwm
+            self.__fan_plug_in_countdown -= 1
+        else:
+            self.__pwm = max(pwm_list)
+        fancontrol_debug("__pwm = 0x%x\n" % self.__pwm)
+        if self.air_flow_inconsistent_flag is True:
+            fanairflow_debug("air flow inconsistent, set all fan speed pwm")
+            self.set_all_fan_speed_pwm(self.__pwm)
+        else:
+            fanairflow_debug("air flow consistent, deal fan error policy")
+            fan_pwm_dict = self.get_fan_pwm_dict(self.__pwm)
+            psu_pwm_dict = self.get_psu_pwm_dict(self.__pwm)
+            self.set_fan_pwm_independent(fan_pwm_dict, psu_pwm_dict)
+
+    def run(self):
+        start_time = time.time()
+        while True:
+            try:
+                debug_init()
+                if self.__fan_status_interval > 0 and self.__fan_status_interval < self.__interval:
+                    delta_time = time.time() - start_time
+                    if delta_time >= self.__interval or delta_time < 0:
+                        self.do_fancontrol()
+                        start_time = time.time()
+                    else:
+                        self.checkFanPresence()
+                    time.sleep(self.__fan_status_interval)
+                else:
+                    self.do_fancontrol()
+                    time.sleep(self.__interval)
+            except Exception as e:
+                traceback.print_exc()
+                fancontrol_error(str(e))
+
+    def set_all_fan_speed_pwm(self, pwm):
+        fan_pwm_dict = {}
+        psu_pwm_dict = {}
+        fan_num = self.get_fan_total_number()
+        for i in range(fan_num):
+            fan_name = "FAN" + str(i + 1)
+            fan_pwm_dict[fan_name] = pwm
+
+        psu_num = self.get_psu_total_number()
+        for i in range(psu_num):
+            psu_name = "PSU" + str(i + 1)
+            psu_pwm_dict[psu_name] = pwm
+        self.set_fan_pwm_independent(fan_pwm_dict, psu_pwm_dict)
+
+    def set_fan_pwm_independent(self, fan_pwm_dict, psu_pwm_dict):
+        if self.air_flow_inconsistent_flag is True:
+            for psu_obj in self.psu_obj_list:
+                if psu_obj.air_flow_inconsistent is True:
+                    psu_pwm_dict[psu_obj.name] = self.air_flow_error_psu_pwm
+                    fanairflow_debug("%s air flow error, origin name: [%s], display name: [%s], psu air flow: [%s], board air flow: [%s], set psu pwm: 0x%x" %
+                                     (psu_obj.name, psu_obj.origin_name, psu_obj.display_name, psu_obj.air_flow, self.board_air_flow, self.air_flow_error_psu_pwm))
+                else:
+                    psu_pwm_dict[psu_obj.name] = self.air_flow_correct_psu_pwm
+                    fanairflow_debug("%s air flow correct, origin name: [%s], display name: [%s], psu air flow: [%s], board air flow: [%s], set psu pwm: 0x%x" %
+                                     (psu_obj.name, psu_obj.origin_name, psu_obj.display_name, psu_obj.air_flow, self.board_air_flow, self.air_flow_correct_psu_pwm))
+
+            for fan_obj in self.fan_obj_list:
+                if fan_obj.air_flow_inconsistent is True:
+                    fan_pwm_dict[fan_obj.name] = self.air_flow_error_fan_pwm
+                    fanairflow_debug("%s air flow error, origin name: [%s], display name: [%s], fan air flow: [%s], board air flow: [%s], set fan pwm: 0x%x" %
+                                     (fan_obj.name, fan_obj.origin_name, fan_obj.display_name, fan_obj.air_flow, self.board_air_flow, self.air_flow_error_fan_pwm))
+                else:
+                    fan_pwm_dict[fan_obj.name] = self.air_flow_correct_fan_pwm
+                    fanairflow_debug("%s air flow correct, origin name: [%s], display name: [%s], fan air flow: [%s], board air flow: [%s], set fan pwm: 0x%x" %
+                                     (fan_obj.name, fan_obj.origin_name, fan_obj.display_name, fan_obj.air_flow, self.board_air_flow, self.air_flow_correct_fan_pwm))
+        fan_num = self.get_fan_total_number()
+        for i in range(fan_num):
+            fan_name = "FAN" + str(i + 1)
+            self.fan_set_speed_pwm_by_name(fan_name, fan_pwm_dict[fan_name])
+        if self.__psu_fan_control == 1:
+            psu_num = self.get_psu_total_number()
+            for i in range(psu_num):
+                psu_name = "PSU" + str(i + 1)
+                self.psu_set_speed_pwm_by_name(psu_name, psu_pwm_dict[psu_name])
+
+    def fan_set_speed_pwm_by_name(self, fan_name, pwm):
+        duty = round(pwm * 100 / 255)
+        rotor_len = self.get_rotor_number(fan_name)
+        for i in range(rotor_len):
+            val = self.int_case.set_fan_speed_pwm(fan_name, i + 1, duty)
+            if val != 0:
+                fancontrol_error("%s rotor%d: %d" % (fan_name, i + 1, val))
+
+    def psu_set_speed_pwm_by_name(self, psu_name, pwm):
+        duty = round(pwm * 100 / 255)
+        status = self.int_case.set_psu_fan_speed_pwm(psu_name, int(duty))
+        if status is not True:
+            fancontrol_error("set %s speed fail" % psu_name)
+
+    def fan_obj_init(self):
+        fan_num = self.get_fan_total_number()
+        for i in range(fan_num):
+            fan_name = "FAN" + str(i + 1)
+            fan_obj = DevFan(fan_name, self.int_case)
+            self.fan_obj_list.append(fan_obj)
+        fanairflow_debug("fan object initialize success")
+
+    def psu_obj_init(self):
+        psu_num = self.get_psu_total_number()
+        for i in range(psu_num):
+            psu_name = "PSU" + str(i + 1)
+            psu_obj = DevPsu(psu_name, self.int_case)
+            self.psu_obj_list.append(psu_obj)
+        fanairflow_debug("psu object initialize success")
+
+
+if __name__ == '__main__':
+    debug_init()
+    fancontrol_debug("enter main")
+    fan_control = fancontrol()
+    fan_control.fan_obj_init()
+    fan_control.psu_obj_init()
+    fan_control.run()
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/hal_ledctrl.py b/platform/broadcom/sonic-platform-modules-micas/common/script/hal_ledctrl.py
new file mode 100755
index 000000000..c21fd3c1f
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/hal_ledctrl.py
@@ -0,0 +1,830 @@
+#!/usr/bin/env python3
+import time
+import syslog
+import traceback
+from plat_hal.interface import interface
+from plat_hal.baseutil import baseutil
+try:
+    import abc
+except ImportError as error:
+    raise ImportError(str(error) + " - required module not found") from error
+
+SWITCH_TEMP = "SWITCH_TEMP"
+F2B_AIR_FLOW = "intake"
+B2F_AIR_FLOW = "exhaust"
+ONIE_E2_NAME = "ONIE_E2"
+
+# status
+STATUS_PRESENT = "PRESENT"
+STATUS_ABSENT = "ABSENT"
+STATUS_OK = "OK"
+STATUS_NOT_OK = "NOT OK"
+STATUS_FAILED = "FAILED"
+STATUS_UNKNOWN = "UNKNOWN"
+
+LEDCTROL_DEBUG_FILE = "/etc/.ledcontrol_debug_flag"
+
+LEDCTROLERROR = 1
+LEDCTROLDEBUG = 2
+
+debuglevel = 0
+# led status defined
+COLOR_GREEN = 1
+COLOR_AMBER = 2
+COLOR_RED = 3
+LED_STATUS_DICT = {COLOR_GREEN: "green", COLOR_AMBER: "amber", COLOR_RED: "red"}
+
+
+def ledcontrol_debug(s):
+    if LEDCTROLDEBUG & debuglevel:
+        syslog.openlog("LEDCONTROL", syslog.LOG_PID)
+        syslog.syslog(syslog.LOG_DEBUG, s)
+
+
+def ledcontrol_error(s):
+    if LEDCTROLERROR & debuglevel:
+        syslog.openlog("LEDCONTROL", syslog.LOG_PID)
+        syslog.syslog(syslog.LOG_ERR, s)
+
+
+def air_flow_warn(s):
+    syslog.openlog("AIR_FLOW_MONITOR", syslog.LOG_PID)
+    syslog.syslog(syslog.LOG_LOCAL1 | syslog.LOG_WARNING, s)
+
+
+def air_flow_error(s):
+    syslog.openlog("AIR_FLOW_MONITOR", syslog.LOG_PID)
+    syslog.syslog(syslog.LOG_LOCAL1 | syslog.LOG_ERR, s)
+
+
+def air_flow_emerg(s):
+    syslog.openlog("AIR_FLOW_MONITOR", syslog.LOG_PID)
+    syslog.syslog(syslog.LOG_LOCAL1 | syslog.LOG_EMERG, s)
+
+
+def debug_init():
+    global debuglevel
+    try:
+        with open(LEDCTROL_DEBUG_FILE, "r") as fd:
+            value = fd.read()
+        debuglevel = int(value)
+    except Exception:
+        debuglevel = 0
+
+
+class DevBase(object):
+    __metaclass__ = abc.ABCMeta
+
+    def __init__(self, name, air_flow_monitor):
+        self.__name = name
+        self.__air_flow_monitor = air_flow_monitor
+        self.present = STATUS_UNKNOWN
+        self.status = STATUS_UNKNOWN
+        self.status_summary = STATUS_UNKNOWN
+        self.origin_name = STATUS_UNKNOWN
+        self.display_name = STATUS_UNKNOWN
+        self.air_flow = STATUS_UNKNOWN
+        self.led_status = COLOR_GREEN
+
+    @property
+    def name(self):
+        return self.__name
+
+    @property
+    def air_flow_monitor(self):
+        return self.__air_flow_monitor
+
+    @abc.abstractmethod
+    def get_present(self):
+        """
+        Gets the present status of PSU/FAN
+
+        Returns:
+            A string, e.g. 'PRESENT, ABSENT, FAILED'
+        """
+        raise NotImplementedError
+
+    @abc.abstractmethod
+    def get_status(self):
+        """
+        Gets the status of PSU/FAN
+
+        Returns:
+            A string, e.g. 'OK, NOT OK, FAILED'
+        """
+        raise NotImplementedError
+
+    @abc.abstractmethod
+    def update_dev_info(self):
+        """
+        update status and fru info of PSU/FAN
+
+        include present, status, status_summary, part_model_name, product_name, air_flow
+        """
+        raise NotImplementedError
+
+    @abc.abstractmethod
+    def set_module_led(self, color):
+        """
+        set PSU/FAN module LED status
+
+        Args:
+            color: A string representing the color with which to set the
+                   PSU/FAN module LED status
+
+        Returns:
+            bool: True if status LED state is set successfully, False if not
+        """
+        raise NotImplementedError
+
+
+class DevPsu(DevBase):
+
+    def __init__(self, name, air_flow_monitor, hal_interface):
+        super(DevPsu, self).__init__(name, air_flow_monitor)
+        self.int_case = hal_interface
+
+    def get_psu_presence(self):
+        return self.int_case.get_psu_presence(self.name)
+
+    def get_psu_input_output_status(self):
+        return self.int_case.get_psu_input_output_status(self.name)
+
+    def get_psu_fru_info(self):
+        return self.int_case.get_psu_fru_info(self.name)
+
+    @property
+    def na_ret(self):
+        return self.int_case.na_ret
+
+    def get_present(self):
+        try:
+            status = self.get_psu_presence()
+            if status is True:
+                return STATUS_PRESENT
+            if status is False:
+                return STATUS_ABSENT
+        except Exception as e:
+            ledcontrol_error("get %s present status error, msg: %s" % (self.name, str(e)))
+        return STATUS_FAILED
+
+    def get_status(self):
+        try:
+            status = self.get_psu_input_output_status()
+            if status is True:
+                return STATUS_OK
+            if status is False:
+                return STATUS_NOT_OK
+        except Exception as e:
+            ledcontrol_error("get %s status error, msg: %s" % (self.name, str(e)))
+        return STATUS_FAILED
+
+    def update_dev_info(self):
+        try:
+            # update status
+            self.present = self.get_present()
+            if self.present != STATUS_PRESENT:
+                self.status = STATUS_UNKNOWN
+                self.status_summary = self.present
+            else:
+                self.status = self.get_status()
+                self.status_summary = self.status
+            # update fru info if need air flow monitor
+            if self.air_flow_monitor:
+                dic = self.get_psu_fru_info()
+                self.origin_name = dic["PN"]
+                self.air_flow = dic["AirFlow"]
+                self.display_name = dic["DisplayName"]
+        except Exception as e:
+            ledcontrol_error("update %s info error, msg: %s" % (self.name, str(e)))
+            self.present = STATUS_FAILED
+            self.status = STATUS_FAILED
+            self.status_summary = STATUS_FAILED
+            self.origin_name = self.na_ret
+            self.air_flow = self.na_ret
+            self.display_name = self.na_ret
+
+    def set_module_led(self, color):
+        """
+        set PSU module LED is not support, always return True
+        """
+        return True
+
+
+class DevFan(DevBase):
+
+    def __init__(self, name, air_flow_monitor, hal_interface):
+        super(DevFan, self).__init__(name, air_flow_monitor)
+        self.int_case = hal_interface
+
+    def get_fan_rotor_number(self):
+        return self.int_case.get_fan_rotor_number(self.name)
+
+    def get_fan_presence(self):
+        return self.int_case.get_fan_presence(self.name)
+
+    def get_fan_rotor_status(self, rotor_name):
+        return self.int_case.get_fan_rotor_status(self.name, rotor_name)
+
+    def get_fan_fru_info(self):
+        return self.int_case.get_fan_fru_info(self.name)
+
+    @property
+    def na_ret(self):
+        return self.int_case.na_ret
+
+    def get_present(self):
+        try:
+            status = self.get_fan_presence()
+            if status is True:
+                return STATUS_PRESENT
+            if status is False:
+                return STATUS_ABSENT
+        except Exception as e:
+            ledcontrol_error("get %s present status error, msg: %s" % (self.name, str(e)))
+        return STATUS_FAILED
+
+    def get_status(self):
+        try:
+            rotor_num = self.get_fan_rotor_number()
+            err_motor_num = 0
+            for j in range(rotor_num):
+                rotor_name = "Rotor" + str(j + 1)
+                roll_status = self.get_fan_rotor_status(rotor_name)
+                if roll_status is not True:
+                    err_motor_num += 1
+                    ledcontrol_debug("%s %s error, status %s" % (self.name, rotor_name, roll_status))
+                else:
+                    ledcontrol_debug("%s %s ok" % (self.name, rotor_name))
+            if err_motor_num > 0:
+                return STATUS_NOT_OK
+            return STATUS_OK
+        except Exception as e:
+            ledcontrol_error("get %s status error, msg: %s" % (self.name, str(e)))
+        return STATUS_FAILED
+
+    def update_dev_info(self):
+        try:
+            # update status
+            self.present = self.get_present()
+            if self.present != STATUS_PRESENT:
+                self.status = STATUS_UNKNOWN
+                self.status_summary = self.present
+            else:
+                self.status = self.get_status()
+                self.status_summary = self.status
+            # update fru info if need air flow monitor
+            if self.air_flow_monitor:
+                dic = self.get_fan_fru_info()
+                self.origin_name = dic["PN"]
+                self.air_flow = dic["AirFlow"]
+                self.display_name = dic["DisplayName"]
+        except Exception as e:
+            ledcontrol_error("update %s fru info error, msg: %s" % (self.name, str(e)))
+            self.present = STATUS_FAILED
+            self.status = STATUS_FAILED
+            self.status_summary = STATUS_FAILED
+            self.origin_name = self.na_ret
+            self.air_flow = self.na_ret
+            self.display_name = self.na_ret
+
+    def set_module_led(self, color):
+        ret = self.int_case.set_fan_led(self.name, color)
+        if ret == 0:
+            return True
+        return False
+
+
+class ledcontrol(object):
+
+    def __init__(self):
+        self.fan_obj_list = []
+        self.psu_obj_list = []
+        self.board_psu_led_status = COLOR_GREEN
+        self.board_fan_led_status = COLOR_GREEN
+        self.__board_air_flow = ""
+        self.int_case = interface()
+        self.__config = baseutil.get_monitor_config()
+        self.__temps_threshold_config = self.__config["temps_threshold"]
+        for temp_threshold in self.__temps_threshold_config.values():
+            temp_threshold['temp'] = 0
+            temp_threshold['fail_num'] = 0
+        self.__ledcontrol_para = self.__config["ledcontrol_para"]
+        self.__interval = self.__ledcontrol_para.get("interval", 5)
+        self.__checkpsu = self.__ledcontrol_para.get("checkpsu", 0)
+        self.__checkfan = self.__ledcontrol_para.get("checkfan", 0)
+        self.__psu_amber_num = self.__ledcontrol_para.get("psu_amber_num")
+        self.__fan_amber_num = self.__ledcontrol_para.get("fan_amber_num")
+        self.__psu_air_flow_amber_num = self.__ledcontrol_para.get("psu_air_flow_amber_num", 0)
+        self.__fan_air_flow_amber_num = self.__ledcontrol_para.get("fan_air_flow_amber_num", 0)
+        self.__board_sys_led = self.__ledcontrol_para.get("board_sys_led", [])
+        self.__board_psu_led = self.__ledcontrol_para.get("board_psu_led", [])
+        self.__board_fan_led = self.__ledcontrol_para.get("board_fan_led", [])
+        self.__psu_air_flow_monitor = self.__ledcontrol_para.get("psu_air_flow_monitor", 0)
+        self.__fan_air_flow_monitor = self.__ledcontrol_para.get("fan_air_flow_monitor", 0)
+        self.__fan_mix_list = self.__ledcontrol_para.get("fan_mix_list", [])
+
+    @property
+    def na_ret(self):
+        return self.int_case.na_ret
+
+    @property
+    def checkpsu(self):
+        return self.__checkpsu
+
+    @property
+    def checkfan(self):
+        return self.__checkfan
+
+    @property
+    def psu_amber_num(self):
+        return self.__psu_amber_num
+
+    @property
+    def fan_amber_num(self):
+        return self.__fan_amber_num
+
+    @property
+    def psu_air_flow_amber_num(self):
+        return self.__psu_air_flow_amber_num
+
+    @property
+    def fan_air_flow_amber_num(self):
+        return self.__fan_air_flow_amber_num
+
+    @property
+    def psu_air_flow_monitor(self):
+        return self.__psu_air_flow_monitor
+
+    @property
+    def fan_air_flow_monitor(self):
+        return self.__fan_air_flow_monitor
+
+    @property
+    def board_sys_led(self):
+        return self.__board_sys_led
+
+    @property
+    def board_psu_led(self):
+        return self.__board_psu_led
+
+    @property
+    def board_fan_led(self):
+        return self.__board_fan_led
+
+    @property
+    def fan_mix_list(self):
+        return self.__fan_mix_list
+
+    @property
+    def interval(self):
+        return self.__interval
+
+    def get_fan_total_number(self):
+        return self.int_case.get_fan_total_number()
+
+    def get_psu_total_number(self):
+        return self.int_case.get_psu_total_number()
+
+    def get_onie_e2_obj(self, name):
+        return self.int_case.get_onie_e2_obj(name)
+
+    def set_led_color(self, led_name, color):
+        try:
+            ret = self.int_case.set_led_color(led_name, color)
+        except Exception as e:
+            ledcontrol_error("set %s led %s error, msg: %s" % (led_name, color, str(e)))
+            ret = False
+        return ret
+
+    def set_sys_led(self, color):
+        for led in self.board_sys_led:
+            led_name = led.get("led_name")
+            ret = self.set_led_color(led_name, color)
+            if ret is True:
+                ledcontrol_debug("set %s success, color:%s," % (led_name, color))
+            else:
+                ledcontrol_debug("set %s failed, color:%s," % (led_name, color))
+
+    def set_psu_led(self, color):
+        for led in self.board_psu_led:
+            led_name = led.get("led_name")
+            ret = self.set_led_color(led_name, color)
+            if ret is True:
+                ledcontrol_debug("set %s success, color:%s," % (led_name, color))
+            else:
+                ledcontrol_debug("set %s failed, color:%s," % (led_name, color))
+
+    def set_fan_led(self, color):
+        for led in self.board_fan_led:
+            led_name = led.get("led_name")
+            ret = self.set_led_color(led_name, color)
+            if ret is True:
+                ledcontrol_debug("set %s success, color:%s," % (led_name, color))
+            else:
+                ledcontrol_debug("set %s failed, color:%s," % (led_name, color))
+
+    def set_fan_module_led(self):
+        for fan_obj in self.fan_obj_list:
+            color = LED_STATUS_DICT.get(fan_obj.led_status)
+            ret = fan_obj.set_module_led(color)
+            if ret is True:
+                ledcontrol_debug("set %s module led success, color: %s," % (fan_obj.name, color))
+            else:
+                ledcontrol_debug("set %s module led failed, color: %s," % (fan_obj.name, color))
+
+    @property
+    def board_air_flow(self):
+        air_flow_tuple = (F2B_AIR_FLOW, B2F_AIR_FLOW)
+        if self.__board_air_flow not in air_flow_tuple:
+            self.__board_air_flow = self.int_case.get_device_airflow(ONIE_E2_NAME)
+            ledcontrol_debug("board_air_flow: %s" % self.__board_air_flow)
+        return self.__board_air_flow
+
+    def update_psu_info(self):
+        for psu_obj in self.psu_obj_list:
+            psu_obj.update_dev_info()
+            ledcontrol_debug("%s present: [%s], status: [%s] status_summary [%s]" %
+                             (psu_obj.name, psu_obj.present, psu_obj.status, psu_obj.status_summary))
+            if psu_obj.air_flow_monitor:
+                ledcontrol_debug("%s origin name: [%s], display name: [%s] air flow [%s]" %
+                                 (psu_obj.name, psu_obj.origin_name, psu_obj.display_name, psu_obj.air_flow))
+
+    def update_fan_info(self):
+        for fan_obj in self.fan_obj_list:
+            fan_obj.update_dev_info()
+            ledcontrol_debug("%s present: [%s], status: [%s] status_summary [%s]" %
+                             (fan_obj.name, fan_obj.present, fan_obj.status, fan_obj.status_summary))
+            if fan_obj.air_flow_monitor:
+                ledcontrol_debug("%s origin name: [%s], display name: [%s] air flow [%s]" %
+                                 (fan_obj.name, fan_obj.origin_name, fan_obj.display_name, fan_obj.air_flow))
+
+    def get_monitor_temp(self):
+        sensorlist = self.int_case.get_temp_info()
+
+        for temp_threshold in self.__temps_threshold_config.values():
+            sensor = sensorlist.get(temp_threshold['name'])
+            if sensor["Value"] is None:
+                temp_threshold['fail_num'] += 1
+                ledcontrol_error("get %s failed, fail_num = %d" % (temp_threshold['name'], temp_threshold['fail_num']))
+            else:
+                temp_threshold['fail_num'] = 0
+                temp_threshold.setdefault('fix', 0)
+                temp_threshold['temp'] = sensor["Value"] + temp_threshold['fix']
+            ledcontrol_debug("%s = %d" % (temp_threshold['name'], temp_threshold['temp']))
+            ledcontrol_debug("warning = %d, critical = %d" % (temp_threshold['warning'], temp_threshold['critical']))
+
+    def is_temp_warning(self):
+        warning_flag = False
+        for temp_threshold in self.__temps_threshold_config.values():
+            if temp_threshold['temp'] >= temp_threshold['warning']:
+                warning_flag = True
+                ledcontrol_debug("%s is over warning" % temp_threshold['name'])
+                ledcontrol_debug(
+                    "%s = %d, warning = %d" %
+                    (temp_threshold['name'],
+                     temp_threshold['temp'],
+                        temp_threshold['warning']))
+        return warning_flag
+
+    def checkTempWarning(self):
+        try:
+            if self.is_temp_warning():
+                ledcontrol_debug("temp is over warning")
+                return True
+        except Exception as e:
+            ledcontrol_error("%%policy: checkTempWarning failed")
+            ledcontrol_error(str(e))
+        return False
+
+    def is_temp_critical(self):
+        critical_flag = False
+        for temp_threshold in self.__temps_threshold_config.values():
+            temp_threshold['critical_flag'] = False
+            if temp_threshold['temp'] >= temp_threshold['critical']:
+                critical_flag = True
+                temp_threshold['critical_flag'] = True
+                ledcontrol_debug("%s is over critical" % temp_threshold['name'])
+                ledcontrol_debug(
+                    "%s = %d, critical = %d" %
+                    (temp_threshold['name'],
+                     temp_threshold['temp'],
+                        temp_threshold['critical']))
+        return critical_flag
+
+    def checkTempCrit(self):
+        try:
+            if self.is_temp_critical():
+                temp_dict = dict(self.__temps_threshold_config)
+                tmp = temp_dict.get(SWITCH_TEMP)
+                if tmp['critical_flag'] is True:
+                    ledcontrol_debug("temp is over critical")
+                    return True
+
+                del temp_dict[SWITCH_TEMP]
+                for temp_items in temp_dict.values():
+                    if temp_items['critical_flag'] is False:
+                        return False
+
+                ledcontrol_debug("temp is over critical")
+                return True
+        except Exception as e:
+            ledcontrol_error("%%policy: checkTempCrit failed")
+            ledcontrol_error(str(e))
+        return False
+
+    def check_board_air_flow(self):
+        board_air_flow = self.board_air_flow
+        air_flow_tuple = (F2B_AIR_FLOW, B2F_AIR_FLOW)
+        if board_air_flow not in air_flow_tuple:
+            air_flow_error("%%AIR_FLOW_MONITOR-3-BOARD: Get board air flow failed, value: %s." % board_air_flow)
+            return False
+        ledcontrol_debug("board air flow check ok: %s" % board_air_flow)
+        return True
+
+    def get_monitor_fan_status(self):
+        fanerrnum = 0
+        for fan_obj in self.fan_obj_list:
+            status = fan_obj.status_summary
+            ledcontrol_debug("%s status: %s" % (fan_obj.name, status))
+            if status != STATUS_OK:
+                fan_obj.led_status = COLOR_RED
+                fanerrnum += 1
+            else:
+                fan_obj.led_status = COLOR_GREEN
+        ledcontrol_debug("fan error number: %d" % fanerrnum)
+
+        if fanerrnum == 0:
+            fan_led_status = COLOR_GREEN
+        elif fanerrnum <= self.fan_amber_num:
+            fan_led_status = COLOR_AMBER
+        else:
+            fan_led_status = COLOR_RED
+        ledcontrol_debug("monitor fan status, set fan led: %s" % LED_STATUS_DICT.get(fan_led_status))
+        return fan_led_status
+
+    def get_monitor_psu_status(self):
+        psuerrnum = 0
+        for psu_obj in self.psu_obj_list:
+            status = psu_obj.status_summary
+            ledcontrol_debug("%s status: %s" % (psu_obj.name, status))
+            if status != STATUS_OK:
+                psu_obj.led_status = COLOR_RED
+                psuerrnum += 1
+            else:
+                psu_obj.led_status = COLOR_GREEN
+        ledcontrol_debug("psu error number: %d" % psuerrnum)
+
+        if psuerrnum == 0:
+            psu_led_status = COLOR_GREEN
+        elif psuerrnum <= self.psu_amber_num:
+            psu_led_status = COLOR_AMBER
+        else:
+            psu_led_status = COLOR_RED
+        ledcontrol_debug("monitor psu status, set psu led: %s" % LED_STATUS_DICT.get(psu_led_status))
+        return psu_led_status
+
+    def get_monitor_fan_air_flow(self):
+        if self.fan_air_flow_monitor == 0:
+            ledcontrol_debug("fan air flow monitor not open, default green")
+            return COLOR_GREEN
+
+        ret = self.check_board_air_flow()
+        if ret is False:
+            ledcontrol_debug("check board air flow error, skip fan air flow monitor.")
+            return COLOR_GREEN
+
+        fan_led_status_list = []
+        fan_air_flow_ok_obj_list = []
+        fan_air_flow_ok_set = set()
+        fan_module_led_list = []
+        fan_air_flow_err_num = 0
+        for fan_obj in self.fan_obj_list:
+            if fan_obj.present != STATUS_PRESENT:
+                fan_module_led_list.append(COLOR_GREEN)
+                continue
+            if fan_obj.air_flow == self.na_ret:
+                air_flow_warn("%%AIR_FLOW_MONITOR-4-FAN: %s get air flow failed, fan model: %s, air flow: %s." %
+                              (fan_obj.name, fan_obj.display_name, fan_obj.air_flow))
+                led_status = COLOR_AMBER
+                fan_module_led_list.append(led_status)
+            elif fan_obj.air_flow != self.board_air_flow:
+                air_flow_emerg("%%AIR_FLOW_MONITOR-0-FAN: %s air flow error, fan model: %s, fan air flow: %s, board air flow: %s." %
+                               (fan_obj.name, fan_obj.display_name, fan_obj.air_flow, self.board_air_flow))
+                led_status = COLOR_RED
+                fan_air_flow_err_num += 1
+            else:
+                fan_air_flow_ok_obj_list.append(fan_obj)
+                fan_air_flow_ok_set.add(fan_obj.origin_name)
+                ledcontrol_debug("%s air flow check ok, origin name: [%s], display name: [%s], fan air flow: [%s], board air flow: [%s]" %
+                                 (fan_obj.name, fan_obj.origin_name, fan_obj.display_name, fan_obj.air_flow, self.board_air_flow))
+                led_status = COLOR_GREEN
+                fan_module_led_list.append(led_status)
+            if led_status > fan_obj.led_status:
+                fan_obj.led_status = led_status
+        if len(fan_module_led_list) != 0:
+            fan_led_status = max(fan_module_led_list)
+            fan_led_status_list.append(fan_led_status)
+        # check fan mixing
+        if len(fan_air_flow_ok_set) > 1 and fan_air_flow_ok_set not in self.fan_mix_list:
+            for fan_obj in fan_air_flow_ok_obj_list:
+                air_flow_warn("%%AIR_FLOW_MONITOR-4-FAN: %s mixing, fan model: %s, air flow: %s." %
+                              (fan_obj.name, fan_obj.origin_name, fan_obj.air_flow))
+            fan_led_status = COLOR_AMBER
+            fan_led_status_list.append(fan_led_status)
+        # check fan air flow error number
+        if fan_air_flow_err_num == 0:
+            fan_led_status = COLOR_GREEN
+        elif fan_air_flow_err_num <= self.fan_air_flow_amber_num:
+            fan_led_status = COLOR_AMBER
+        else:
+            fan_led_status = COLOR_RED
+        fan_led_status_list.append(fan_led_status)
+
+        fan_led_status = max(fan_led_status_list)
+        ledcontrol_debug("monitor fan air flow, set fan led: %s" % LED_STATUS_DICT.get(fan_led_status))
+        return fan_led_status
+
+    def get_monitor_psu_air_flow(self):
+        if self.psu_air_flow_monitor == 0:
+            ledcontrol_debug("psu air flow monitor not open, default green")
+            return COLOR_GREEN
+
+        ret = self.check_board_air_flow()
+        if ret is False:
+            ledcontrol_debug("check board air flow error, skip psu air flow monitor.")
+            return COLOR_GREEN
+
+        psu_led_status_list = []
+        psu_module_led_list = []
+        psu_air_flow_err_num = 0
+        for psu_obj in self.psu_obj_list:
+            if psu_obj.present != STATUS_PRESENT:
+                psu_module_led_list.append(COLOR_GREEN)
+                continue
+            if psu_obj.air_flow == self.na_ret:
+                air_flow_warn("%%AIR_FLOW_MONITOR-4-PSU: %s get air flow failed, psu model: %s, air flow: %s." %
+                              (psu_obj.name, psu_obj.display_name, psu_obj.air_flow))
+                led_status = COLOR_AMBER
+                psu_module_led_list.append(led_status)
+            elif psu_obj.air_flow != self.board_air_flow:
+                air_flow_emerg("%%AIR_FLOW_MONITOR-0-PSU: %s air flow error, psu model: %s, psu air flow: %s, board air flow: %s." %
+                               (psu_obj.name, psu_obj.display_name, psu_obj.air_flow, self.board_air_flow))
+                led_status = COLOR_RED
+                psu_air_flow_err_num += 1
+            else:
+                ledcontrol_debug("%s psu air flow check ok, origin name: [%s], display name: [%s], psu air flow: [%s], board air flow: [%s]" %
+                                 (psu_obj.name, psu_obj.origin_name, psu_obj.display_name, psu_obj.air_flow, self.board_air_flow))
+                led_status = COLOR_GREEN
+                psu_module_led_list.append(led_status)
+            if led_status > psu_obj.led_status:
+                psu_obj.led_status = led_status
+
+        if len(psu_module_led_list) != 0:
+            psu_led_status = max(psu_module_led_list)
+            psu_led_status_list.append(psu_led_status)
+
+        # check fan air flow error number
+        if psu_air_flow_err_num == 0:
+            psu_led_status = COLOR_GREEN
+        elif psu_air_flow_err_num <= self.psu_air_flow_amber_num:
+            psu_led_status = COLOR_AMBER
+        else:
+            psu_led_status = COLOR_RED
+        psu_led_status_list.append(psu_led_status)
+
+        psu_led_status = max(psu_led_status_list)
+        ledcontrol_debug("monitor psu air flow, set psu led: %s" % LED_STATUS_DICT.get(psu_led_status))
+        return psu_led_status
+
+    def get_temp_sys_led_status(self):
+        if self.checkTempCrit() is True:
+            sys_led_status = COLOR_RED
+        elif self.checkTempWarning() is True:
+            sys_led_status = COLOR_AMBER
+        else:
+            sys_led_status = COLOR_GREEN
+        ledcontrol_debug("monitor temperature, set sys led: %s" % LED_STATUS_DICT.get(sys_led_status))
+        return sys_led_status
+
+    def get_sys_led_follow_fan_status(self):
+
+        if self.checkfan:
+            sys_led_status = self.board_fan_led_status
+            ledcontrol_debug("sys led follow fan led, set sys led: %s" % LED_STATUS_DICT.get(sys_led_status))
+        else:
+            sys_led_status = COLOR_GREEN
+            ledcontrol_debug("sys led don't follow fan led, set default green")
+        return sys_led_status
+
+    def get_sys_led_follow_psu_status(self):
+        if self.checkpsu:
+            sys_led_status = self.board_psu_led_status
+            ledcontrol_debug("sys led follow psu led, set sys led: %s" % LED_STATUS_DICT.get(sys_led_status))
+        else:
+            sys_led_status = COLOR_GREEN
+            ledcontrol_debug("sys led don't follow psu led, set default green")
+        return sys_led_status
+
+    def dealSysLedStatus(self):
+        sys_led_status_list = []
+        # get_monitor_temp
+        self.get_monitor_temp()
+
+        # monitor temp get sys led status
+        sys_led_status = self.get_temp_sys_led_status()
+        sys_led_status_list.append(sys_led_status)
+
+        # check sys led follow fan led status
+        sys_led_status = self.get_sys_led_follow_fan_status()
+        sys_led_status_list.append(sys_led_status)
+
+        # check sys led follow psu led status
+        sys_led_status = self.get_sys_led_follow_psu_status()
+        sys_led_status_list.append(sys_led_status)
+
+        sys_led_status = max(sys_led_status_list)
+        sys_led_color = LED_STATUS_DICT.get(sys_led_status)
+
+        # set sys led
+        self.set_sys_led(sys_led_color)
+
+    def dealFanLedStatus(self):
+        fan_led_status_list = []
+        # update fan info
+        self.update_fan_info()
+
+        # monitor fan status first
+        fan_led_status = self.get_monitor_fan_status()
+        fan_led_status_list.append(fan_led_status)
+
+        # monitor fan air flow
+        fan_led_status = self.get_monitor_fan_air_flow()
+        fan_led_status_list.append(fan_led_status)
+
+        self.board_fan_led_status = max(fan_led_status_list)
+        fan_led_color = LED_STATUS_DICT.get(self.board_fan_led_status)
+
+        # set fan led
+        self.set_fan_led(fan_led_color)
+        # set fan module led
+        self.set_fan_module_led()
+
+    def dealPsuLedStatus(self):
+        psu_led_status_list = []
+        # update psu info
+        self.update_psu_info()
+
+        # monitor psu status first
+        psu_led_status = self.get_monitor_psu_status()
+        psu_led_status_list.append(psu_led_status)
+
+        # monitor psu air flow
+        psu_led_status = self.get_monitor_psu_air_flow()
+        psu_led_status_list.append(psu_led_status)
+
+        self.board_psu_led_status = max(psu_led_status_list)
+        psu_led_color = LED_STATUS_DICT.get(self.board_psu_led_status)
+
+        # set psu led
+        self.set_psu_led(psu_led_color)
+
+    def do_ledcontrol(self):
+        self.dealPsuLedStatus()
+        self.dealFanLedStatus()
+        self.dealSysLedStatus()
+
+    def fan_obj_init(self):
+        fan_num = self.get_fan_total_number()
+        for i in range(fan_num):
+            fan_name = "FAN" + str(i + 1)
+            fan_obj = DevFan(fan_name, self.fan_air_flow_monitor, self.int_case)
+            self.fan_obj_list.append(fan_obj)
+        ledcontrol_debug("fan object initialize success")
+
+    def psu_obj_init(self):
+        psu_num = self.get_psu_total_number()
+        for i in range(psu_num):
+            psu_name = "PSU" + str(i + 1)
+            psu_obj = DevPsu(psu_name, self.psu_air_flow_monitor, self.int_case)
+            self.psu_obj_list.append(psu_obj)
+        ledcontrol_debug("psu object initialize success")
+
+    def run(self):
+        while True:
+            try:
+                debug_init()
+                self.do_ledcontrol()
+                time.sleep(self.interval)
+            except Exception as e:
+                traceback.print_exc()
+                ledcontrol_error(str(e))
+
+
+if __name__ == '__main__':
+    debug_init()
+    ledcontrol_debug("enter main")
+    led_control = ledcontrol()
+    led_control.fan_obj_init()
+    led_control.psu_obj_init()
+    led_control.run()
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/hal_pltfm.py b/platform/broadcom/sonic-platform-modules-micas/common/script/hal_pltfm.py
new file mode 100755
index 000000000..11196f507
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/hal_pltfm.py
@@ -0,0 +1,492 @@
+#!/usr/bin/env python3
+# -*- coding: UTF-8 -*-
+import inspect
+import sys
+import json
+import time
+from plat_hal.interface import interface
+
+
+class Command():
+    def __init__(self, name, f):
+        self.name = name
+        self.f = f
+        self.paramcount = self.f.__code__.co_argcount
+
+    def dofun(self, args):
+        fn = self.f.__call__
+        fn(*args)
+
+
+class Group():
+    def __init__(self, name, f):
+        self.groups = []
+        self.commands = []
+        self.name = name
+        self.f = f
+
+    def add_groups(self, command):
+        self.groups.append(command)
+
+    def add_commands(self, commnad):
+        x = Command(commnad.__name__, commnad)
+        self.commands.append(x)
+
+    def find_valuebyname(self, name):
+        for item in self.groups:
+            if name == item.name:
+                return item
+        for item in self.commands:
+            if name == item.name:
+                return item
+        return None
+
+    def deal(self, args):
+        if len(args) <= 0:
+            return self.print_help()
+        funclevel = args[0]
+        val = self.find_valuebyname(funclevel)
+        if val is None:
+            return self.print_help()
+        if isinstance(val, Command):
+            if len(args) < (val.paramcount + 1):
+                return self.print_help()
+            inputargs = args[1: (1 + val.paramcount)]
+            return val.dofun(inputargs)
+        if isinstance(val, Group):
+            args = args[1:]
+            return val.deal(args)
+        return self.print_help()
+
+    def get_max(self, arr):
+        lentmp = 0
+        for ar in arr:
+            lentmp = len(ar) if (len(ar) > lentmp) else lentmp
+        return lentmp
+
+    def print_help(self):
+
+        namesize = []
+        for item in self.groups:
+            namesize.append(item.name)
+        for item in self.commands:
+            namesize.append(item.name)
+        maxvalue = self.get_max(namesize)
+
+        if len(self.groups) > 0:
+            print("Groups:")
+            for item in self.groups:
+                print("   %-*s    %s" % (maxvalue, item.name, item.f.__doc__ or ''))
+        if len(self.commands) > 0:
+            print("Commands:")
+            for item in self.commands:
+                print("   %-*s   %s" % (maxvalue, item.name, item.f.__doc__ or ''))
+
+
+class clival():
+    @staticmethod
+    def Fire(val=None):
+        group = Group("top", 'mainlevel')
+        clival.iterGroup(val, group)
+        # context = {}
+        # caller = inspect.stack()[1]
+        # caller_frame = caller[0]
+        # caller_globals = caller_frame.f_globals
+        # caller_locals = caller_frame.f_locals
+        # context.update(caller_globals)
+        # context.update(caller_locals)
+        args = sys.argv[1:]
+        group.deal(args)
+
+    @staticmethod
+    def iterGroup(val, group):
+        for key, item in val.items():
+            if item is None:  # first level
+                if inspect.isfunction(key):
+                    group.add_commands(key)
+            else:
+                group1 = Group(key.__name__, key)
+                clival.iterGroup(item, group1)
+                group.add_groups(group1)
+
+
+def psu():
+    r'''test psu '''
+
+
+def fan():
+    r'''test fan '''
+
+
+def sensor():
+    r'''test sensor '''
+
+
+def dcdc():
+    r'''test dcdc '''
+
+
+def led():
+    r'''test led '''
+
+
+def e2():
+    r'''test onie eeprom '''
+
+
+def temps():
+    r'''test temps sensor'''
+
+def cpu():
+    r'''test cpu'''
+
+
+int_case = interface()
+
+
+def get_total_number():
+    r'''psu  get_total_number '''
+    print("=================get_total_number======================")
+    print(int_case.get_psu_total_number())
+
+
+def get_presence():
+    r'''psu  get_presence '''
+    print("=================get_presence======================")
+    psus = int_case.get_psus()
+    for psu_item in psus:
+        print(psu_item.name, end=' ')
+        print(int_case.get_psu_presence(psu_item.name))
+
+
+def get_fru_info():
+    r'''psu  get_fru_info '''
+    print("=================get_fru_info======================")
+    psus = int_case.get_psus()
+    for psu_item in psus:
+        print(psu_item.name, end=' ')
+        print(json.dumps(int_case.get_psu_fru_info(psu_item.name), ensure_ascii=False, indent=4))
+
+
+def get_status():
+    r'''psu  get_status '''
+    print("=================get_status======================")
+    psus = int_case.get_psus()
+    for psu_item in psus:
+        print(psu_item.name, end=' ')
+        print(json.dumps(int_case.get_psu_status(psu_item.name), ensure_ascii=False, indent=4))
+
+
+def set_psu_fan_speed_pwm(realspeed):
+    r'''set_psu_fan_speed_pwm'''
+    print("=================set_psu_fan_speed_pwm======================")
+    psus = int_case.get_psus()
+    for psu_item in psus:
+        print(psu_item.name, end=' ')
+        print(int_case.set_psu_fan_speed_pwm(psu_item.name, int(realspeed)))
+
+
+def get_psu_fan_speed_pwm():
+    r'''get_psu_fan_speed_pwm'''
+    print("=================get_psu_fan_speed_pwm======================")
+    psus = int_case.get_psus()
+    for psu_item in psus:
+        print(psu_item.name, end=' ')
+        print(json.dumps(int_case.get_psu_fan_speed_pwm(psu_item.name)))
+
+
+def get_psu_power_status():
+    r'''psu  get_psu_power_status '''
+    print("=================get_psu_power_status======================")
+    psus = int_case.get_psus()
+    for psu_item in psus:
+        print(psu_item.name, end=' ')
+        print(json.dumps(int_case.get_psu_power_status(psu_item.name), ensure_ascii=False, indent=4))
+
+
+def get_info_all():
+    r'''psu  get_info_all '''
+    print("=================get_info_all======================")
+    print(json.dumps(int_case.get_psu_info_all(), ensure_ascii=False, indent=4))
+
+
+def fan_get_total_number():
+    print("=================get_info_all======================")
+    print(json.dumps(int_case.get_fan_total_number(), ensure_ascii=False, indent=4))
+
+
+def fan_get_rotor_number():
+    r'''fan_get_rotor_number'''
+    print("=================fan_get_rotor_number======================")
+    fans = int_case.get_fans()
+    for fan_item in fans:
+        print(fan_item.name, end=' ')
+        print(int_case.get_fan_rotor_number(fan_item.name))
+
+
+def fan_get_speed():
+    r'''fan_get_speed'''
+    print("=================fan_get_speed======================")
+    fans = int_case.get_fans()
+    for fan_item in fans:
+        rotors = fan_item.rotor_list
+        for rotor in rotors:
+            index = rotors.index(rotor)
+            print("%s rotor%d" % (fan_item.name, index + 1), end='  ')
+            print(int_case.get_fan_speed(fan_item.name, index + 1))
+
+
+def fan_get_speed_pwm():
+    r'''fan_get_speed_pwm'''
+    print("=================fan_get_speed_pwm======================")
+    fans = int_case.get_fans()
+    for fan_item in fans:
+        rotors = fan_item.rotor_list
+        for rotor in rotors:
+            index = rotors.index(rotor)
+            print("%s rotor%d" % (fan_item.name, index + 1), end='  ')
+            print(int_case.get_fan_speed_pwm(fan_item.name, index + 1))
+
+
+def fan_set_speed_pwm(pwm):
+    r'''fan_set_speed_pwm'''
+    print("=================fan_set_speed_pwm======================")
+    fans = int_case.get_fans()
+    for fan_item in fans:
+        rotors = fan_item.rotor_list
+        for rotor in rotors:
+            index = rotors.index(rotor)
+            print("%s %s" % (fan_item.name, rotor.name), end='  ')
+            val = int_case.set_fan_speed_pwm(fan_item.name, index + 1, pwm)
+            print(val)
+
+
+def fan_get_watchdog_status():
+    r'''fan_get_watchdog_status'''
+    print("=================fan_get_watchdog_status======================")
+    print(int_case.get_fan_watchdog_status())
+
+
+def fan_enable_watchdog():
+    r'''fan_enable_watchdog'''
+    print("=================fan_enable_watchdog======================")
+    print('enable', int_case.enable_fan_watchdog())
+
+
+def fan_disable_watchdog():
+    r'''fan_disable_watchdog'''
+    print("=================fan_disable_watchdog======================")
+    print('disable', int_case.enable_fan_watchdog(enable=False))
+
+
+def fan_get_speed1():
+    r'''fan_get_speed'''
+    print("=================fan_get_speed======================")
+    fans = int_case.get_fans()
+    for fan_item in fans:
+        rotors = fan_item.rotor_list
+        for rotor in rotors:
+            print("%s %s" % (fan_item.name, rotor.name), end='  ')
+            print(int_case.get_fan_speed(fan_item.name, rotor.name))
+
+
+def fan_feed_watchdog():
+    r'''fan_feed_watchdog'''
+    print("=================fan_feed_watchdog======================")
+    fan_get_speed()
+    print(int_case.feed_fan_watchdog())
+    time.sleep(2)
+    fan_get_speed()
+
+
+def fan_set_led(color):
+    r'''fan_set_led'''
+    print("=================fan_set_led======================")
+    fans = int_case.get_fans()
+    for fan_item in fans:
+        print("%s" % fan_item.name)
+        print(color, int_case.set_fan_led(fan_item.name, color))
+
+def fan_get_led():
+    r'''fan_get_led'''
+    print("=================fan_get_led======================")
+    fans = int_case.get_fans()
+    for fan_item in fans:
+        print("%s" % fan_item.name)
+        print(int_case.get_fan_led(fan_item.name))
+
+
+def fan_get_presence():
+    r'''fan_get_presence'''
+    print("=================fan_get_presence======================")
+    fans = int_case.get_fans()
+    for fan_item in fans:
+        print("%s" % fan_item.name)
+        print(int_case.get_fan_presence(fan_item.name))
+
+
+def fan_get_info():
+    r'''fan_get_info'''
+    print("=================fan_get_info======================")
+    fans = int_case.get_fans()
+    for fan_item in fans:
+        print("%s" % fan_item.name)
+        print(json.dumps(int_case.get_fan_info(fan_item.name), ensure_ascii=False, indent=4))
+
+
+def fan_get_status():
+    r'''fan_get_status'''
+    print("=================fan_get_status======================")
+    fans = int_case.get_fans()
+    for fan_item in fans:
+        print("%s" % fan_item.name)
+        print(json.dumps(int_case.get_fan_status(fan_item.name), ensure_ascii=False, indent=4))
+
+
+def fan_get_info_all():
+    r'''fan_get_info_all'''
+    print("=================fan_get_info_all======================")
+    print(json.dumps(int_case.get_fan_info_all(), ensure_ascii=False, indent=4))
+
+
+def get_sensor_info():
+    r'''get_sensor_info'''
+    print("=================get_sensor_info======================")
+    print(json.dumps(int_case.get_sensor_info(), ensure_ascii=False, indent=4))
+
+
+def get_dcdc_all_info():
+    r'''get_dcdc_all_info'''
+    print("=================get_dcdc_all_info======================")
+    print(json.dumps(int_case.get_dcdc_all_info(), ensure_ascii=False, indent=4))
+
+
+def set_all_led_color(color):
+    r'''set_all_led_color color'''
+    print("=================set_all_led_color======================")
+    leds = int_case.get_leds()
+    for led_item in leds:
+        print("%s" % led_item.name)
+        print(color, int_case.set_led_color(led_item.name, color))
+
+
+def get_all_led_color():
+    r'''get_all_led_color'''
+    print("=================get_all_led_color======================")
+    leds = int_case.get_leds()
+    for led_item in leds:
+        print("%s" % led_item.name)
+        print(int_case.get_led_color(led_item.name))
+
+
+def set_single_led_color(led_name, color):
+    r'''set_single_led_color led_name color'''
+    print("=================set_single_led_color======================")
+    leds = int_case.get_leds()
+    for led_item in leds:
+        if led_name == led_item.name:
+            print("%s" % led_item.name)
+            print(color, int_case.set_led_color(led_item.name, color))
+
+
+def get_single_led_color(led_name):
+    r'''get_single_led_color'''
+    print("=================get_single_led_color======================")
+    leds = int_case.get_leds()
+    for led_item in leds:
+        if led_name == led_item.name:
+            print("%s" % led_item.name)
+            print(int_case.get_led_color(led_item.name))
+
+
+def get_onie_e2_path():
+    r'''get_onie_e2_path'''
+    print("=================get_onie_e2_path======================")
+    path = int_case.get_onie_e2_path("ONIE_E2")
+    print("%s" % path)
+
+
+def get_device_airflow():
+    r'''get_device_airflow'''
+    print("=================get_device_airflow======================")
+    airflow = int_case.get_device_airflow("ONIE_E2")
+    print("%s" % airflow)
+
+
+def get_temps_sensor():
+    r'''get_temps_sensor'''
+    print("=================get_temps_sensor======================")
+    temp_list = int_case.get_temps()
+    for temp in temp_list:
+        print("id: %s, name: %s, API name: %s, value: %s" % (temp.temp_id, temp.name, temp.api_name, temp.Value))
+
+def get_cpu_reset_num():
+    r'''get_cpu_reset_num'''
+    print("=================get_cpu_reset_num======================")
+    print(int_case.get_cpu_reset_num())
+
+def get_cpu_reboot_cause():
+    r'''get_cpu_reboot_cause'''
+    print("=================get_cpu_reboot_cause======================")
+    print(int_case.get_cpu_reboot_cause())
+
+
+def run_cli_man():
+    clival.Fire(
+        {
+            psu: {
+                get_total_number: None,
+                get_presence: None,
+                get_fru_info: None,
+                set_psu_fan_speed_pwm: None,
+                get_psu_fan_speed_pwm: None,
+                get_status: None,
+                get_psu_power_status: None,
+                get_info_all: None
+            },
+            fan: {
+                fan_get_total_number: None,
+                fan_get_rotor_number: None,
+                fan_get_speed: None,
+                fan_get_speed_pwm: None,
+                fan_set_speed_pwm: None,
+                fan_get_watchdog_status: None,
+                fan_enable_watchdog: None,
+                fan_disable_watchdog: None,
+                fan_feed_watchdog: None,
+                fan_set_led: None,
+                fan_get_led: None,
+                fan_get_presence: None,
+                fan_get_info: None,
+                fan_get_status: None,
+                fan_get_info_all: None
+            },
+            sensor: {
+                get_sensor_info: None
+            },
+            dcdc: {
+                get_dcdc_all_info: None
+            },
+            led: {
+                set_all_led_color: None,
+                set_single_led_color: None,
+                get_all_led_color: None,
+                get_single_led_color: None,
+            },
+            e2: {
+                get_onie_e2_path: None,
+                get_device_airflow: None,
+            },
+            temps: {
+                get_temps_sensor: None,
+            },
+            cpu: {
+                get_cpu_reset_num: None,
+                get_cpu_reboot_cause: None,
+            }
+        }
+    )
+
+
+if __name__ == '__main__':
+    run_cli_man()
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/intelligent_monitor.py b/platform/broadcom/sonic-platform-modules-micas/common/script/intelligent_monitor.py
new file mode 100755
index 000000000..33d5bfba6
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/intelligent_monitor.py
@@ -0,0 +1,144 @@
+#!/usr/bin/python3
+# -*- coding: UTF-8 -*-
+
+import os
+import time
+import syslog
+from plat_hal.interface import interface
+from plat_hal.baseutil import baseutil
+from platform_util import io_rd, wbi2cget
+
+INTELLIGENT_MONITOR_DEBUG_FILE = "/etc/.intelligent_monitor_debug"
+
+debuglevel = 0
+
+
+def monitor_syslog_debug(s):
+    if debuglevel:
+        syslog.openlog("INTELLIGENT_MONITOR_DEBUG", syslog.LOG_PID)
+        syslog.syslog(syslog.LOG_DEBUG, s)
+
+
+def monitor_syslog(s):
+    syslog.openlog("INTELLIGENT_MONITOR", syslog.LOG_PID)
+    syslog.syslog(syslog.LOG_WARNING, s)
+
+
+def pmon_syslog_notice(s):
+    syslog.openlog("PMON_SYSLOG", syslog.LOG_PID)
+    syslog.syslog(syslog.LOG_NOTICE, s)
+
+
+class IntelligentMonitor():
+    def __init__(self):
+        self.dcdc_dict = {}
+        self.int_case = interface()
+        self.__config = baseutil.get_monitor_config()
+        self.__intelligent_monitor_para = self.__config.get('intelligent_monitor_para', {})
+        self.__interval = self.__intelligent_monitor_para.get('interval', 60)
+        self.__dcdc_whitelist = self.__config.get('dcdc_monitor_whitelist', {})
+        self.__error_ret = self.int_case.error_ret
+
+    @property
+    def error_ret(self):
+        return self.__error_ret
+
+    @property
+    def interval(self):
+        return self.__interval
+
+    def debug_init(self):
+        global debuglevel
+        if os.path.exists(INTELLIGENT_MONITOR_DEBUG_FILE):
+            debuglevel = 1
+        else:
+            debuglevel = 0
+
+    def dcdc_whitelist_check(self, dcdc_name):
+        try:
+            check_item = self.__dcdc_whitelist.get(dcdc_name, {})
+            if len(check_item) == 0:
+                return False
+            gettype = check_item.get("gettype", None)
+            checkbit = check_item.get("checkbit", None)
+            okval = check_item.get("okval", None)
+            if gettype is None or checkbit is None or okval is None:
+                monitor_syslog('%%INTELLIGENT_MONITOR-3-DCDC_WHITELIST_FAILED: %s config error. gettype:%s, checkbit:%s, okval:%s' %
+                               (dcdc_name, gettype, checkbit, okval))
+                return False
+            if gettype == "io":
+                io_addr = check_item.get('io_addr', None)
+                val = io_rd(io_addr)
+                if val is not None:
+                    retval = val
+                else:
+                    monitor_syslog(
+                        '%%INTELLIGENT_MONITOR-3-DCDC_WHITELIST_FAILED: %s io_rd error. io_addr:%s' %
+                        (dcdc_name, io_addr))
+                    return False
+            elif gettype == "i2c":
+                bus = check_item.get('bus', None)
+                addr = check_item.get('addr', None)
+                offset = check_item.get('offset', None)
+                ind, val = wbi2cget(bus, addr, offset)
+                if ind is True:
+                    retval = val
+                else:
+                    monitor_syslog('%%INTELLIGENT_MONITOR-3-DCDC_WHITELIST_FAILED: %s i2cget error. bus:%s, addr:%s, offset:%s' %
+                                   (dcdc_name, bus, addr, offset))
+                    return False
+            else:
+                monitor_syslog('%%INTELLIGENT_MONITOR-3-DCDC_WHITELIST_FAILED: %s gettype not support' % dcdc_name)
+                return False
+
+            val_t = (int(retval, 16) & (1 << checkbit)) >> checkbit
+            if val_t != okval:
+                return False
+            return True
+        except Exception as e:
+            monitor_syslog('%%WHITELIST_CHECK: %s check error, msg: %s.' % (dcdc_name, str(e)))
+            return False
+
+    def update_dcdc_status(self):
+        try:
+            self.dcdc_dict = self.int_case.get_dcdc_all_info()
+            for dcdc_name, item in self.dcdc_dict.items():
+                ret = self.dcdc_whitelist_check(dcdc_name)
+                if ret is False:
+                    if item['Value'] == self.error_ret:
+                        monitor_syslog(
+                            '%%INTELLIGENT_MONITOR-3-DCDC_SENSOR_FAILED: The value of %s read failed.' %
+                            (dcdc_name))
+                    elif float(item['Value']) > float(item['Max']):
+                        pmon_syslog_notice('%%PMON-5-VOLTAGE_HIGH: %s voltage %.3f%s is larger than max threshold %.3f%s.' %
+                                           (dcdc_name, float(item['Value']), item['Unit'], float(item['Max']), item['Unit']))
+                    elif float(item['Value']) < float(item['Min']):
+                        pmon_syslog_notice('%%PMON-5-VOLTAGE_LOW: %s voltage %.3f%s is lower than min threshold %.3f%s.' %
+                                           (dcdc_name, float(item['Value']), item['Unit'], float(item['Min']), item['Unit']))
+                    else:
+                        monitor_syslog_debug('%%INTELLIGENT_MONITOR-6-DCDC_SENSOR_OK: %s normal, value is %.3f%s.' %
+                                             (dcdc_name, item['Value'], item['Unit']))
+                else:
+                    monitor_syslog_debug(
+                        '%%INTELLIGENT_MONITOR-6-DCDC_WHITELIST_CHECK: %s is in dcdc whitelist, not monitor voltage' %
+                        dcdc_name)
+                    continue
+        except Exception as e:
+            monitor_syslog('%%INTELLIGENT_MONITOR-3-EXCEPTION: update dcdc sensors status error, msg: %s.' % (str(e)))
+
+    def doWork(self):
+        self.update_dcdc_status()
+
+    def run(self):
+        while True:
+            try:
+                self.debug_init()
+                self.doWork()
+                time.sleep(self.interval)
+            except Exception as e:
+                monitor_syslog('%%INTELLIGENT_MONITOR-3-EXCEPTION: %s.' % (str(e)))
+
+
+if __name__ == '__main__':
+    intelligent_monitor = IntelligentMonitor()
+    intelligent_monitor.run()
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/intelligent_monitor/monitor_fan.py b/platform/broadcom/sonic-platform-modules-micas/common/script/intelligent_monitor/monitor_fan.py
new file mode 100755
index 000000000..bb596a94c
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/intelligent_monitor/monitor_fan.py
@@ -0,0 +1,285 @@
+#!/usr/bin/python3
+# -*- coding: UTF-8 -*-
+
+import os
+import time
+import logging
+from logging.handlers import RotatingFileHandler
+
+from plat_hal.interface import interface
+from plat_hal.baseutil import baseutil
+from platform_util import exec_os_cmd
+
+
+DEBUG_FILE = "/etc/.monitor_fan_debug_flag"
+
+LOG_FILE = "/var/log/intelligent_monitor/monitor_fan_log"
+
+E2_NAME = "ONIE_E2"
+
+
+def _init_logger():
+    if not os.path.exists(LOG_FILE):
+        exec_os_cmd("mkdir -p %s" % os.path.dirname(LOG_FILE))
+        exec_os_cmd("sync")
+    handler = RotatingFileHandler(filename=LOG_FILE, maxBytes=5 * 1024 * 1024, backupCount=1)
+    formatter = logging.Formatter("%(asctime)s %(levelname)s %(filename)s[%(funcName)s][%(lineno)s]: %(message)s")
+    handler.setFormatter(formatter)
+    logger = logging.getLogger(__name__)
+    logger.setLevel(logging.INFO)
+    logger.addHandler(handler)
+    return logger
+
+
+class Fan(object):
+
+    def __init__(self, name, hal_interface):
+        self.name = name
+        self.fan_dict = {}
+        self.int_case = hal_interface
+        self.update_time = 0
+        self.pre_present = False
+        self.pre_status = True
+        self.plugin_cnt = 0
+        self.plugout_cnt = 0
+        self.status_normal_cnt = 0
+        self.status_error_cnt = 0
+
+    def fan_dict_update(self):
+        local_time = time.time()
+        if not self.fan_dict or (local_time - self.update_time) >= 1:  # update data every 1 seconds
+            self.update_time = local_time
+            self.fan_dict = self.int_case.get_fan_info(self.name)
+
+    def get_model(self):
+        self.fan_dict_update()
+        return self.fan_dict["NAME"]
+
+    def get_serial(self):
+        self.fan_dict_update()
+        return self.fan_dict["SN"]
+
+    def get_presence(self):
+        return self.int_case.get_fan_presence(self.name)
+
+    def get_rotor_speed(self, rotor_name):
+        """
+        Retrieves the speed of fan as a percentage of full speed
+
+        Returns:
+            An integer, the percentage of full fan speed, in the range 0 (off)
+                 to 100 (full speed)
+        """
+        fan_dir = {}
+        fan_dir = self.int_case.get_fan_info_rotor(self.name)
+        # get fan rotor pwm
+        value = fan_dir[rotor_name]["Speed"]
+        max_speed = fan_dir[rotor_name]["SpeedMax"]
+
+        if isinstance(value, str) or value is None:
+            return 0
+        pwm = value * 100 / max_speed
+        if pwm > 100:
+            pwm = 100
+        elif pwm < 0:
+            pwm = 0
+        return int(pwm)
+
+    def get_rotor_speed_tolerance(self, rotor_name):
+        """
+        Retrieves the speed tolerance of the fan
+        Returns:
+            An integer, the percentage of variance from target speed which is
+        considered tolerable
+        """
+        # The default tolerance value is fixed as 30%
+        fan_dir = {}
+        fan_dir = self.int_case.get_fan_info_rotor(self.name)
+        # get fan rotor tolerance
+        tolerance = fan_dir[rotor_name]["Tolerance"]
+
+        if isinstance(tolerance, str) or tolerance is None:
+            return 30
+        return tolerance
+
+    def get_target_speed(self):
+        """
+        Retrieves the target (expected) speed of the fan
+        Returns:
+            An integer, the percentage of full fan speed, in the range 0 (off)
+                 to 100 (full speed)
+        """
+        pwm = self.int_case.get_fan_speed_pwm(self.name, 0)
+        return int(pwm)
+
+    def get_status(self):
+        """
+        Retrieves the operational status of the FAN
+        Returns:
+            bool: True if FAN is operating properly, False if not
+        """
+        if not self.get_presence():
+            return False
+
+        rotor_num = self.int_case.get_fan_rotor_number(self.name)
+        for i in range(rotor_num):
+            rotor_name = "Rotor" + str(i + 1)
+            speed = self.get_rotor_speed(rotor_name)
+            tolerance = self.get_rotor_speed_tolerance(rotor_name)
+            target = self.get_target_speed()
+            if (speed - target) > target * tolerance / 100:
+                return False
+            if (target - speed) > target * tolerance / 100:
+                return False
+
+        return True
+
+    def get_direction(self):
+        """
+        Retrieves the fan airflow direction
+        Returns:
+            A string, either FAN_DIRECTION_INTAKE or FAN_DIRECTION_EXHAUST
+            depending on fan direction
+
+        Notes:
+            - Forward/Exhaust : Air flows from Port side to Fan side.
+            - Reverse/Intake  : Air flows from Fan side to Port side.
+        """
+        self.fan_dict_update()
+        return self.fan_dict["AirFlow"]
+
+
+class MonitorFan(object):
+
+    def __init__(self):
+        self.int_case = interface()
+        self.logger = _init_logger()
+        self.fan_obj_list = []
+        self.__config = baseutil.get_monitor_config()
+        self.__monitor_fan_config = self.__config.get("monitor_fan_para", {})
+        self.__present_interval = self.__monitor_fan_config.get("present_interval", 0.5)
+        self.__status_interval = self.__monitor_fan_config.get("status_interval", 5)
+        self.__present_check_cnt = self.__monitor_fan_config.get("present_check_cnt", 3)
+        self.__status_check_cnt = self.__monitor_fan_config.get("status_check_cnt", 3)
+
+    def debug_init(self):
+        if os.path.exists(DEBUG_FILE):
+            self.logger.setLevel(logging.DEBUG)
+        else:
+            self.logger.setLevel(logging.INFO)
+
+    def get_fan_total_number(self):
+        return self.int_case.get_fan_total_number()
+
+    def get_device_airflow(self):
+        return self.int_case.get_device_airflow(E2_NAME)
+
+    def fan_obj_init(self):
+        fan_num = self.get_fan_total_number()
+        for i in range(fan_num):
+            fan_name = "FAN" + str(i + 1)
+            fan_obj = Fan(fan_name, self.int_case)
+            self.fan_obj_list.append(fan_obj)
+        self.logger.info("fan object initialize success")
+
+    def fan_airflow_check(self, fan_obj):
+        fan_airflow = fan_obj.get_direction()
+        device_airflow = self.get_device_airflow()
+        if fan_airflow != device_airflow:
+            self.logger.error("%s airflow[%s] not match device airflow[%s]", fan_obj.name, fan_airflow, device_airflow)
+        else:
+            self.logger.debug("%s airflow[%s] match device airflow[%s]", fan_obj.name, fan_airflow, device_airflow)
+
+    def fan_plug_in_out_check(self, fan_obj):
+        present = fan_obj.get_presence()
+        if present is True:
+            self.logger.debug("%s is present", fan_obj.name)
+        else:
+            self.logger.debug("%s is absent", fan_obj.name)
+
+        if present != fan_obj.pre_present:
+            if present is True:
+                fan_obj.plugin_cnt += 1
+                fan_obj.plugout_cnt = 0
+                if fan_obj.plugin_cnt >= self.__present_check_cnt:
+                    fan_obj.pre_present = True
+                    self.logger.info("%s [serial:%s] is plugin", fan_obj.name, fan_obj.get_serial())
+                    self.fan_airflow_check(fan_obj)
+            else:
+                fan_obj.plugin_cnt = 0
+                fan_obj.plugout_cnt += 1
+                if fan_obj.plugout_cnt >= self.__present_check_cnt:
+                    fan_obj.pre_present = False
+                    self.logger.info("%s is plugout", fan_obj.name)
+        else:
+            fan_obj.plugin_cnt = 0
+            fan_obj.plugout_cnt = 0
+            self.logger.debug("%s present status is not change", fan_obj.name)
+
+    def fan_status_check(self, fan_obj):
+        status = fan_obj.get_status()
+        if status is True:
+            self.logger.debug("%s is normal", fan_obj.name)
+        else:
+            self.logger.debug("%s is error", fan_obj.name)
+
+        if status != fan_obj.pre_status:
+            if status is True:
+                fan_obj.status_normal_cnt += 1
+                fan_obj.status_error_cnt = 0
+                if fan_obj.status_normal_cnt >= self.__status_check_cnt:
+                    fan_obj.pre_status = True
+                    self.logger.info(
+                        "%s [serial:%s] is form error change to normal",
+                        fan_obj.name,
+                        fan_obj.get_serial())
+            else:
+                fan_obj.status_normal_cnt = 0
+                fan_obj.status_error_cnt += 1
+                if fan_obj.status_error_cnt >= self.__status_check_cnt:
+                    fan_obj.pre_status = False
+                    self.logger.info(
+                        "%s [serial:%s] is form normal change to error",
+                        fan_obj.name,
+                        fan_obj.get_serial())
+        else:
+            fan_obj.status_normal_cnt = 0
+            fan_obj.status_error_cnt = 0
+            self.logger.debug("%s status is not change", fan_obj.name)
+
+    def checkFanPresence(self):
+        for fan_obj in self.fan_obj_list:
+            self.fan_plug_in_out_check(fan_obj)
+
+    def checkFanStatus(self):
+        for fan_obj in self.fan_obj_list:
+            self.fan_status_check(fan_obj)
+
+    def run(self):
+        start_time = time.time()
+        while True:
+            try:
+                self.debug_init()
+                delta_time = time.time() - start_time
+                if self.__present_interval <= self.__status_interval:
+                    if delta_time >= self.__status_interval or delta_time < 0:
+                        self.checkFanStatus()
+                        start_time = time.time()
+                    else:
+                        self.checkFanPresence()
+                    time.sleep(self.__present_interval)
+                else:
+                    if delta_time >= self.__present_interval or delta_time < 0:
+                        self.checkFanPresence()
+                        start_time = time.time()
+                    else:
+                        self.checkFanStatus()
+                    time.sleep(self.__status_interval)
+            except Exception as e:
+                self.logger.error('EXCEPTION: %s.', str(e))
+
+
+if __name__ == '__main__':
+    monitor_fan = MonitorFan()
+    monitor_fan.fan_obj_init()
+    monitor_fan.run()
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/platform_common.py b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_common.py
new file mode 100755
index 000000000..35c16728f
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_common.py
@@ -0,0 +1,186 @@
+#!/usr/bin/python3
+
+__all__ = [
+    "BLACKLIST_DRIVERS",
+    "DRIVERLISTS",
+    "DEVICE",
+    "STARTMODULE",
+    "MAC_LED_RESET",
+    "MAC_DEFAULT_PARAM",
+    "DEV_MONITOR_PARAM",
+    "SLOT_MONITOR_PARAM",
+    "MANUINFO_CONF",
+    "REBOOT_CTRL_PARAM",
+    "PMON_SYSLOG_STATUS",
+    "OPTOE",
+    "REBOOT_CAUSE_PARA",
+    "UPGRADE_SUMMARY",
+    "WARM_UPGRADE_PARAM",
+    "WARM_UPG_FLAG",
+    "WARM_UPGRADE_STARTED_FLAG",
+    "PLATFORM_E2_CONF",
+    "AIR_FLOW_CONF",
+    "AIRFLOW_RESULT_FILE",
+    "INIT_PARAM_PRE",
+    "INIT_COMMAND_PRE",
+    "INIT_PARAM",
+    "INIT_COMMAND",
+    "SET_MAC_CONF",
+    "DRVIER_UPDATE_CONF",
+    "MONITOR_TEMP_MIN",
+    "MONITOR_K",
+    "MONITOR_MAC_IN",
+    "MONITOR_DEFAULT_SPEED",
+    "MONITOR_MAX_SPEED",
+    "MONITOR_MIN_SPEED",
+    "MONITOR_MAC_ERROR_SPEED",
+    "MONITOR_FAN_TOTAL_NUM",
+    "MONITOR_MAC_UP_TEMP",
+    "MONITOR_MAC_LOWER_TEMP",
+    "MONITOR_MAC_MAX_TEMP",
+    "MONITOR_FALL_TEMP",
+    "MONITOR_MAC_WARNING_THRESHOLD",
+    "MONITOR_OUTTEMP_WARNING_THRESHOLD",
+    "MONITOR_BOARDTEMP_WARNING_THRESHOLD",
+    "MONITOR_CPUTEMP_WARNING_THRESHOLD",
+    "MONITOR_INTEMP_WARNING_THRESHOLD",
+    "MONITOR_MAC_CRITICAL_THRESHOLD",
+    "MONITOR_OUTTEMP_CRITICAL_THRESHOLD",
+    "MONITOR_BOARDTEMP_CRITICAL_THRESHOLD",
+    "MONITOR_CPUTEMP_CRITICAL_THRESHOLD",
+    "MONITOR_INTEMP_CRITICAL_THRESHOLD",
+    "MONITOR_CRITICAL_NUM",
+    "MONITOR_SHAKE_TIME",
+    "MONITOR_INTERVAL",
+    "MONITOR_LED_INTERVAL",
+    "MONITOR_PID_FLAG",
+    "MONITOR_MAC_SOURCE_SYSFS",
+    "MONITOR_MAC_SOURCE_PATH",
+    "MONITOR_PID_MODULE",
+    "PSU_FAN_FOLLOW",
+    "MONITOR_SYS_LED",
+    "MONITOR_SYS_FAN_LED",
+    "MONITOR_FANS_LED",
+    "MONITOR_SYS_PSU_LED",
+    "MONITOR_FAN_STATUS",
+    "MONITOR_PSU_STATUS",
+    "MONITOR_DEV_STATUS",
+    "MONITOR_DEV_STATUS_DECODE",
+    "DEV_LEDS",
+    "fanloc"
+]
+
+# driver blacklist parameter
+BLACKLIST_DRIVERS = []
+
+# driver list parameter
+DRIVERLISTS = []
+
+# device list parameter
+DEVICE = []
+
+# start module parameters
+STARTMODULE = {}
+
+# mac led reset parameter
+MAC_LED_RESET = {}
+
+# avscontrol parameter
+MAC_DEFAULT_PARAM = []
+
+# dev_monitor parameter
+DEV_MONITOR_PARAM = {}
+
+# slot_monitor parameter
+SLOT_MONITOR_PARAM = {}
+
+# platform_manufacturer parameter
+MANUINFO_CONF = {}
+
+# reboot_ctrl parameter
+REBOOT_CTRL_PARAM = {}
+
+# pmon_syslog parameter
+PMON_SYSLOG_STATUS = {}
+
+# sfp optoe device parameter
+OPTOE = []
+
+# reboot_cause parameter
+REBOOT_CAUSE_PARA = []
+
+# upgrade parameter
+UPGRADE_SUMMARY = {}
+
+# warm_uprade parameter
+WARM_UPGRADE_PARAM = {}
+WARM_UPG_FLAG = "/etc/sonic/.warm_upg_flag"
+WARM_UPGRADE_STARTED_FLAG = "/etc/sonic/.doing_warm_upg"
+
+# platform_e2 parameter
+PLATFORM_E2_CONF = {}
+
+# generate_airflow parameter
+AIR_FLOW_CONF = {}
+AIRFLOW_RESULT_FILE = "/etc/sonic/.airflow"
+
+# Initialization parameters
+INIT_PARAM_PRE = []
+INIT_COMMAND_PRE = []
+INIT_PARAM = []
+INIT_COMMAND = []
+
+# Set eth mac address parameters
+SET_MAC_CONF = []
+
+# driver update config
+DRVIER_UPDATE_CONF = {}
+
+################################ fancontrol parameter###################################
+MONITOR_TEMP_MIN = 38
+MONITOR_K = 11
+MONITOR_MAC_IN = 35
+MONITOR_DEFAULT_SPEED = 0x60
+MONITOR_MAX_SPEED = 0xFF
+MONITOR_MIN_SPEED = 0x60
+MONITOR_MAC_ERROR_SPEED = 0XBB
+MONITOR_FAN_TOTAL_NUM = 4
+MONITOR_MAC_UP_TEMP = 50
+MONITOR_MAC_LOWER_TEMP = -50
+MONITOR_MAC_MAX_TEMP = 100   #
+
+MONITOR_FALL_TEMP = 4
+MONITOR_MAC_WARNING_THRESHOLD = 100
+MONITOR_OUTTEMP_WARNING_THRESHOLD = 85
+MONITOR_BOARDTEMP_WARNING_THRESHOLD = 85
+MONITOR_CPUTEMP_WARNING_THRESHOLD = 85
+MONITOR_INTEMP_WARNING_THRESHOLD = 70
+
+MONITOR_MAC_CRITICAL_THRESHOLD = 105
+MONITOR_OUTTEMP_CRITICAL_THRESHOLD = 90
+MONITOR_BOARDTEMP_CRITICAL_THRESHOLD = 90
+MONITOR_CPUTEMP_CRITICAL_THRESHOLD = 100
+MONITOR_INTEMP_CRITICAL_THRESHOLD = 80
+MONITOR_CRITICAL_NUM = 3
+MONITOR_SHAKE_TIME = 20
+MONITOR_INTERVAL = 60
+MONITOR_LED_INTERVAL = 2
+MONITOR_PID_FLAG = 0
+
+MONITOR_MAC_SOURCE_SYSFS = 0
+MONITOR_MAC_SOURCE_PATH = None
+
+MONITOR_PID_MODULE = {}
+
+PSU_FAN_FOLLOW = {}
+
+MONITOR_SYS_LED = []
+MONITOR_SYS_FAN_LED = []
+MONITOR_FANS_LED = []
+MONITOR_SYS_PSU_LED = []
+MONITOR_FAN_STATUS = []
+MONITOR_PSU_STATUS = []
+MONITOR_DEV_STATUS = {}
+MONITOR_DEV_STATUS_DECODE = {}
+DEV_LEDS = {}
+fanloc = []
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/platform_config.py b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_config.py
new file mode 100755
index 000000000..d6b3151e4
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_config.py
@@ -0,0 +1,192 @@
+#!/usr/bin/python3
+
+import sys
+import os
+from wbutil.baseutil import get_machine_info
+from wbutil.baseutil import get_platform_info
+from wbutil.baseutil import get_board_id
+
+__all__ = [
+    "MAILBOX_DIR",
+    "PLATFORM_GLOBALCONFIG",
+    "GLOBALCONFIG",
+    "STARTMODULE",
+    "MAC_LED_RESET",
+    "MAC_DEFAULT_PARAM",
+    "DEV_MONITOR_PARAM",
+    "SLOT_MONITOR_PARAM",
+    "MANUINFO_CONF",
+    "REBOOT_CTRL_PARAM",
+    "PMON_SYSLOG_STATUS",
+    "REBOOT_CAUSE_PARA",
+    "UPGRADE_SUMMARY",
+    "WARM_UPGRADE_PARAM",
+    "WARM_UPG_FLAG",
+    "WARM_UPGRADE_STARTED_FLAG",
+    "PLATFORM_E2_CONF",
+    "AIR_FLOW_CONF",
+    "AIRFLOW_RESULT_FILE",
+    "GLOBALINITPARAM",
+    "GLOBALINITCOMMAND",
+    "GLOBALINITPARAM_PRE",
+    "GLOBALINITCOMMAND_PRE",
+    "SET_MAC_CONF",
+    "DRVIER_UPDATE_CONF",
+    "MONITOR_CONST",
+    "PSU_FAN_FOLLOW",
+    "MONITOR_SYS_LED",
+    "MONITOR_FANS_LED",
+    "MONITOR_SYS_FAN_LED",
+    "MONITOR_SYS_PSU_LED",
+    "MONITOR_FAN_STATUS",
+    "MONITOR_PSU_STATUS",
+    "MONITOR_DEV_STATUS",
+    "MONITOR_DEV_STATUS_DECODE",
+    "DEV_LEDS",
+    "fanloc"
+]
+
+
+def getdeviceplatform():
+    x = get_platform_info(get_machine_info())
+    if x is not None:
+        filepath = "/usr/share/sonic/device/" + x
+        return filepath
+    return None
+
+
+platform = get_platform_info(get_machine_info())
+board_id = get_board_id(get_machine_info())
+platformpath = getdeviceplatform()
+MAILBOX_DIR = "/sys/bus/i2c/devices/"
+grtd_productfile = (platform + "_config").replace("-", "_")
+common_productfile = "platform_common"
+platform_configfile = (platform + "_" + board_id + "_config").replace("-", "_")  # platfrom + board_id
+configfile_pre = "/usr/local/bin/"
+sys.path.append(platformpath)
+sys.path.append(configfile_pre)
+
+############################################################################################
+if os.path.exists(configfile_pre + platform_configfile + ".py"):
+    module_product = __import__(platform_configfile, globals(), locals(), [], 0)
+elif os.path.exists(configfile_pre + grtd_productfile + ".py"):
+    module_product = __import__(grtd_productfile, globals(), locals(), [], 0)
+elif os.path.exists(configfile_pre + common_productfile + ".py"):
+    module_product = __import__(common_productfile, globals(), locals(), [], 0)
+else:
+    print("config file not exist")
+    sys.exit(-1)
+############################################################################################
+
+PLATFORM_GLOBALCONFIG = {
+    "DRIVERLISTS": module_product.DRIVERLISTS,
+    "OPTOE": module_product.OPTOE,
+    "DEVS": module_product.DEVICE,
+    "BLACKLIST_DRIVERS": module_product.BLACKLIST_DRIVERS
+}
+GLOBALCONFIG = PLATFORM_GLOBALCONFIG
+
+# start module parameters
+STARTMODULE = module_product.STARTMODULE
+
+# mac led reset parameter
+MAC_LED_RESET = module_product.MAC_LED_RESET
+
+# avscontrol parameter
+MAC_DEFAULT_PARAM = module_product.MAC_DEFAULT_PARAM
+
+# dev_monitor parameter
+DEV_MONITOR_PARAM = module_product.DEV_MONITOR_PARAM
+
+# slot_monitor parameter
+SLOT_MONITOR_PARAM = module_product.SLOT_MONITOR_PARAM
+
+# platform_manufacturer parameter
+MANUINFO_CONF = module_product.MANUINFO_CONF
+
+# reboot_ctrl parameter
+REBOOT_CTRL_PARAM = module_product.REBOOT_CTRL_PARAM
+
+# pmon_syslog parameter
+PMON_SYSLOG_STATUS = module_product.PMON_SYSLOG_STATUS
+
+# reboot_cause parameter
+REBOOT_CAUSE_PARA = module_product.REBOOT_CAUSE_PARA
+
+# upgrade parameter
+UPGRADE_SUMMARY = module_product.UPGRADE_SUMMARY
+
+# warm_uprade parameter
+WARM_UPGRADE_PARAM = module_product.WARM_UPGRADE_PARAM
+WARM_UPG_FLAG = module_product.WARM_UPG_FLAG
+WARM_UPGRADE_STARTED_FLAG = module_product.WARM_UPGRADE_STARTED_FLAG
+
+# platform_e2 parameter
+PLATFORM_E2_CONF = module_product.PLATFORM_E2_CONF
+
+# generate_airflow parameter
+AIR_FLOW_CONF = module_product.AIR_FLOW_CONF
+AIRFLOW_RESULT_FILE = module_product.AIRFLOW_RESULT_FILE
+
+# Initialization parameters
+GLOBALINITPARAM = module_product.INIT_PARAM
+GLOBALINITCOMMAND = module_product.INIT_COMMAND
+GLOBALINITPARAM_PRE = module_product.INIT_PARAM_PRE
+GLOBALINITCOMMAND_PRE = module_product.INIT_COMMAND_PRE
+
+# Set eth mac address parameters
+SET_MAC_CONF = module_product.SET_MAC_CONF
+
+# driver update config
+DRVIER_UPDATE_CONF = module_product.DRVIER_UPDATE_CONF
+
+################################ fancontrol parameter###################################
+
+
+class MONITOR_CONST:
+    TEMP_MIN = module_product.MONITOR_TEMP_MIN
+    K = module_product.MONITOR_K
+    MAC_IN = module_product.MONITOR_MAC_IN
+    DEFAULT_SPEED = module_product.MONITOR_DEFAULT_SPEED
+    MAX_SPEED = module_product.MONITOR_MAX_SPEED
+    MIN_SPEED = module_product.MONITOR_MIN_SPEED
+    MAC_ERROR_SPEED = module_product.MONITOR_MAC_ERROR_SPEED
+    FAN_TOTAL_NUM = module_product.MONITOR_FAN_TOTAL_NUM
+    MAC_UP_TEMP = module_product.MONITOR_MAC_UP_TEMP
+    MAC_LOWER_TEMP = module_product.MONITOR_MAC_LOWER_TEMP
+    MAC_MAX_TEMP = module_product.MONITOR_MAC_MAX_TEMP
+
+    MAC_WARNING_THRESHOLD = module_product.MONITOR_MAC_WARNING_THRESHOLD
+    OUTTEMP_WARNING_THRESHOLD = module_product.MONITOR_OUTTEMP_WARNING_THRESHOLD
+    BOARDTEMP_WARNING_THRESHOLD = module_product.MONITOR_BOARDTEMP_WARNING_THRESHOLD
+    CPUTEMP_WARNING_THRESHOLD = module_product.MONITOR_CPUTEMP_WARNING_THRESHOLD
+    INTEMP_WARNING_THRESHOLD = module_product.MONITOR_INTEMP_WARNING_THRESHOLD
+
+    MAC_CRITICAL_THRESHOLD = module_product.MONITOR_MAC_CRITICAL_THRESHOLD
+    OUTTEMP_CRITICAL_THRESHOLD = module_product.MONITOR_OUTTEMP_CRITICAL_THRESHOLD
+    BOARDTEMP_CRITICAL_THRESHOLD = module_product.MONITOR_BOARDTEMP_CRITICAL_THRESHOLD
+    CPUTEMP_CRITICAL_THRESHOLD = module_product.MONITOR_CPUTEMP_CRITICAL_THRESHOLD
+    INTEMP_CRITICAL_THRESHOLD = module_product.MONITOR_INTEMP_CRITICAL_THRESHOLD
+    CRITICAL_NUM = module_product.MONITOR_CRITICAL_NUM
+    SHAKE_TIME = module_product.MONITOR_SHAKE_TIME
+    MONITOR_INTERVAL = module_product.MONITOR_INTERVAL
+    MONITOR_LED_INTERVAL = module_product.MONITOR_LED_INTERVAL
+    MONITOR_FALL_TEMP = module_product.MONITOR_FALL_TEMP
+    MONITOR_PID_FLAG = module_product.MONITOR_PID_FLAG
+    MONITOR_PID_MODULE = module_product.MONITOR_PID_MODULE
+
+    MONITOR_MAC_SOURCE_SYSFS = module_product.MONITOR_MAC_SOURCE_SYSFS
+    MONITOR_MAC_SOURCE_PATH = module_product.MONITOR_MAC_SOURCE_PATH
+
+
+PSU_FAN_FOLLOW = module_product.PSU_FAN_FOLLOW
+MONITOR_SYS_LED = module_product.MONITOR_SYS_LED
+MONITOR_FANS_LED = module_product.MONITOR_FANS_LED
+MONITOR_SYS_FAN_LED = module_product.MONITOR_SYS_FAN_LED
+MONITOR_SYS_PSU_LED = module_product.MONITOR_SYS_PSU_LED
+MONITOR_FAN_STATUS = module_product.MONITOR_FAN_STATUS
+MONITOR_PSU_STATUS = module_product.MONITOR_PSU_STATUS
+MONITOR_DEV_STATUS = module_product.MONITOR_DEV_STATUS
+MONITOR_DEV_STATUS_DECODE = module_product.MONITOR_DEV_STATUS_DECODE
+DEV_LEDS = module_product.DEV_LEDS
+fanloc = module_product.fanloc
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/platform_driver.py b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_driver.py
new file mode 100755
index 000000000..e27d461ba
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_driver.py
@@ -0,0 +1,258 @@
+#!/usr/bin/env python3
+import os
+import subprocess
+import time
+import click
+from platform_config import GLOBALCONFIG, WARM_UPGRADE_STARTED_FLAG, WARM_UPG_FLAG
+
+
+CONTEXT_SETTINGS = {"help_option_names": ['-h', '--help']}
+
+
+class AliasedGroup(click.Group):
+    def get_command(self, ctx, cmd_name):
+        rv = click.Group.get_command(self, ctx, cmd_name)
+        if rv is not None:
+            return rv
+        matches = [x for x in self.list_commands(ctx)
+                   if x.startswith(cmd_name)]
+        if not matches:
+            return None
+        if len(matches) == 1:
+            return click.Group.get_command(self, ctx, matches[0])
+        ctx.fail('Too many matches: %s' % ', '.join(sorted(matches)))
+        return None
+
+
+def log_os_system(cmd):
+    status, output = subprocess.getstatusoutput(cmd)
+    if status:
+        print(output)
+    return status, output
+
+
+def platform_process_file_check():
+    # WARM_UPGRADE_STARTED_FLAG is used as warm_upgrade.py process start flag
+    if os.path.exists(WARM_UPGRADE_STARTED_FLAG):
+        os.remove(WARM_UPGRADE_STARTED_FLAG)
+
+    # WARM_UPG_FLAG is used as port related service judgment flag
+    if os.path.exists(WARM_UPG_FLAG):
+        os.remove(WARM_UPG_FLAG)
+
+
+def startCommon_operation():
+    platform_process_file_check()
+
+
+def check_driver():
+    status, output = log_os_system("lsmod | grep wb | wc -l")
+    if status:
+        return False
+    if output.isdigit() and int(output) > 0:
+        return True
+    return False
+
+
+def removeDev(bus, loc):
+    cmd = "echo  0x%02x > /sys/bus/i2c/devices/i2c-%d/delete_device" % (loc, bus)
+    devpath = "/sys/bus/i2c/devices/%d-%04x" % (bus, loc)
+    if os.path.exists(devpath):
+        log_os_system(cmd)
+
+
+def addDev(name, bus, loc):
+    if name == "lm75":
+        time.sleep(0.1)
+    pdevpath = "/sys/bus/i2c/devices/i2c-%d/" % (bus)
+    for i in range(1, 100):
+        if os.path.exists(pdevpath) is True:
+            break
+        time.sleep(0.1)
+        if i % 10 == 0:
+            click.echo("%%WB_PLATFORM_DRIVER-INIT: %s not found, wait 0.1 second ! i %d " % (pdevpath, i))
+
+    cmd = "echo  %s 0x%02x > /sys/bus/i2c/devices/i2c-%d/new_device" % (name, loc, bus)
+    devpath = "/sys/bus/i2c/devices/%d-%04x" % (bus, loc)
+    if os.path.exists(devpath) is False:
+        log_os_system(cmd)
+
+
+def removeOPTOE(startbus, endbus):
+    for bus in range(endbus, startbus - 1, -1):
+        removeDev(bus, 0x50)
+
+
+def addOPTOE(name, startbus, endbus):
+    for bus in range(startbus, endbus + 1):
+        addDev(name, bus, 0x50)
+
+
+def removeoptoes():
+    optoes = GLOBALCONFIG["OPTOE"]
+    for index in range(len(optoes) - 1, -1, -1):
+        removeOPTOE(optoes[index]["startbus"], optoes[index]["endbus"])
+
+
+def addoptoes():
+    optoes = GLOBALCONFIG["OPTOE"]
+    for optoe in optoes:
+        addOPTOE(optoe["name"], optoe["startbus"], optoe["endbus"])
+
+
+def removedevs():
+    devs = GLOBALCONFIG["DEVS"]
+    for index in range(len(devs) - 1, -1, -1):
+        removeDev(devs[index]["bus"], devs[index]["loc"])
+
+
+def adddevs():
+    devs = GLOBALCONFIG["DEVS"]
+    for dev in devs:
+        addDev(dev["name"], dev["bus"], dev["loc"])
+
+
+def checksignaldriver(name):
+    modisexistcmd = "lsmod | grep -w %s | wc -l" % name
+    status, output = log_os_system(modisexistcmd)
+    if status:
+        return False
+    if output.isdigit() and int(output) > 0:
+        return True
+    return False
+
+
+def adddriver(name, delay):
+    cmd = "modprobe %s" % name
+    if delay != 0:
+        time.sleep(delay)
+    if checksignaldriver(name) is not True:
+        log_os_system(cmd)
+
+
+def removedriver(name, delay, removeable=1):
+    realname = name.lstrip().split(" ")[0]
+    cmd = "rmmod -f %s" % realname
+    if checksignaldriver(realname) and removeable:
+        log_os_system(cmd)
+    if delay > 0:
+        time.sleep(delay)
+
+
+def removedrivers():
+    if GLOBALCONFIG is None:
+        click.echo("%%WB_PLATFORM_DRIVER-INIT: load global config failed.")
+        return
+    drivers = GLOBALCONFIG.get("DRIVERLISTS", None)
+    if drivers is None:
+        click.echo("%%WB_PLATFORM_DRIVER-INIT: load driver list failed.")
+        return
+    for index in range(len(drivers) - 1, -1, -1):
+        delay = 0
+        name = ""
+        removeable = drivers[index].get("removable", 1)
+        if isinstance(drivers[index], dict) and "delay" in drivers[index]:
+            name = drivers[index].get("name")
+            delay = drivers[index]["delay"]
+        else:
+            name = drivers[index]
+        removedriver(name, delay, removeable)
+
+
+def adddrivers():
+    if GLOBALCONFIG is None:
+        click.echo("%%WB_PLATFORM_DRIVER-INIT: load global config failed.")
+        return
+    drivers = GLOBALCONFIG.get("DRIVERLISTS", None)
+    if drivers is None:
+        click.echo("%%WB_PLATFORM_DRIVER-INIT: load driver list failed.")
+        return
+    for driver in drivers:
+        delay = 0
+        name = ""
+        if isinstance(driver, dict) and "delay" in driver:
+            name = driver.get("name")
+            delay = driver["delay"]
+        else:
+            name = driver
+        adddriver(name, delay)
+
+
+def blacklist_driver_remove():
+    if GLOBALCONFIG is None:
+        click.echo("%%WB_PLATFORM_DRIVER-INIT: load global config failed.")
+        return
+    blacklist_drivers = GLOBALCONFIG.get("BLACKLIST_DRIVERS", [])
+    for driver in blacklist_drivers:
+        delay = 0
+        name = ""
+        if isinstance(driver, dict) and "delay" in driver:
+            name = driver.get("name")
+            delay = driver["delay"]
+        else:
+            name = driver
+        removedriver(name, delay)
+
+
+def unload_driver():
+    removeoptoes()
+    removedevs()
+    removedrivers()
+
+
+def reload_driver():
+    removedevs()
+    removedrivers()
+    time.sleep(1)
+    adddrivers()
+    adddevs()
+
+
+def i2c_check(bus, retrytime=6):
+    try:
+        i2cpath = "/sys/bus/i2c/devices/" + bus
+        while retrytime and not os.path.exists(i2cpath):
+            click.echo("%%WB_PLATFORM_DRIVER-HA: i2c bus abnormal, last bus %s is not exist." % i2cpath)
+            reload_driver()
+            retrytime -= 1
+            time.sleep(1)
+    except Exception as e:
+        click.echo("%%WB_PLATFORM_DRIVER-HA: %s" % str(e))
+
+
+def load_driver():
+    startCommon_operation()
+    adddrivers()
+    adddevs()
+    addoptoes()
+
+
+@click.group(cls=AliasedGroup, context_settings=CONTEXT_SETTINGS)
+def main():
+    '''device operator'''
+
+
+@main.command()
+def start():
+    '''load drivers and device '''
+    blacklist_driver_remove()
+    if check_driver():
+        unload_driver()
+    load_driver()
+
+
+@main.command()
+def stop():
+    '''stop drivers device '''
+    unload_driver()
+
+
+@main.command()
+def restart():
+    '''restart drivers and device'''
+    unload_driver()
+    load_driver()
+
+
+if __name__ == '__main__':
+    main()
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/platform_e2.py b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_e2.py
new file mode 100755
index 000000000..4dafde270
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_e2.py
@@ -0,0 +1,444 @@
+#!/usr/bin/env python3
+# -*- coding: UTF-8 -*-
+import click
+import os
+import sys
+
+from eepromutil.fru import ipmifru
+from eepromutil.cust_fru import CustFru
+from eepromutil.fantlv import fan_tlv
+import eepromutil.onietlv as ot
+from platform_config import PLATFORM_E2_CONF
+from platform_util import byteTostr, dev_file_read
+
+CONTEXT_SETTINGS = {"help_option_names": ['-h', '--help']}
+
+
+class AliasedGroup(click.Group):
+    def get_command(self, ctx, cmd_name):
+        rv = click.Group.get_command(self, ctx, cmd_name)
+        if rv is not None:
+            return rv
+        matches = [x for x in self.list_commands(ctx)
+                   if x.startswith(cmd_name)]
+        if not matches:
+            return None
+        if len(matches) == 1:
+            return click.Group.get_command(self, ctx, matches[0])
+        ctx.fail('Too many matches: %s' % ', '.join(sorted(matches)))
+        return None
+
+
+class ExtraFunc(object):
+    @staticmethod
+    def decode_mac(encodedata):
+        if encodedata is None:
+            return None
+        ret = ":".join("%02x" % ord(data) for data in encodedata)
+        return ret.upper()
+
+    @staticmethod
+    def decode_mac_number(encodedata):
+        if encodedata is None:
+            return None
+        return (ord(encodedata[0]) << 8) | (ord(encodedata[1]) & 0x00ff)
+
+    @staticmethod
+    @staticmethod
+    def fru_decode_mac_number(params):
+        ipmi_fru = params.get("fru")
+        area = params.get("area")
+        field = params.get("field")
+        area_info = getattr(ipmi_fru, area, None)
+        if area_info is not None:
+            raw_mac_number = getattr(area_info, field, None)
+            mac_number = decode_mac_number(raw_mac_number)
+            ipmi_fru.setValue(area, field, mac_number)
+
+    @staticmethod
+    def fru_decode_mac(params):
+        ipmi_fru = params.get("fru")
+        area = params.get("area")
+        field = params.get("field")
+        area_info = getattr(ipmi_fru, area, None)
+        if area_info is not None:
+            raw_mac = getattr(area_info, field, None)
+            decoded_mac = decode_mac(raw_mac)
+            ipmi_fru.setValue(area, field, decoded_mac)
+
+    @staticmethod
+    def fru_decode_hw(params):
+        ipmi_fru = params.get("fru")
+        area = params.get("area")
+        field = params.get("field")
+        area_info = getattr(ipmi_fru, area, None)
+        if area_info is not None:
+            raw_hw = getattr(area_info, field, None)
+            decode_hw = str(int(raw_hw, 16))
+            ipmi_fru.setValue(area, field, decode_hw)
+
+
+def set_onie_value(params):
+    onie = params.get("onie")
+    field = params.get("field")
+    config_value = params.get("config_value")
+    for index, onie_item in enumerate(onie):
+        if onie_item.get("name") == field:
+            if "value" in onie_item.keys():
+                onie[index]["value"] = config_value
+
+
+def onie_eeprom_decode(onie, e2_decode):
+    for e2_decode_item in e2_decode:
+        field = e2_decode_item.get("field")
+        decode_type = e2_decode_item.get("decode_type")
+        if decode_type == 'func':
+            params = {
+                "onie": onie,
+                "field": field
+            }
+            func_name = e2_decode_item.get("func_name")
+            if func_name is not None:
+                run_func(func_name, params)
+        elif decode_type == 'config':
+            config_value = e2_decode_item.get("config_value")
+            if config_value is not None:
+                params = {
+                    "onie": onie,
+                    "field": field,
+                    "config_value": config_value
+                }
+                set_onie_value(params)
+        else:
+            print("unsupport decode type")
+            continue
+
+
+def onie_eeprom_show(eeprom, e2_decode=None):
+    try:
+        onietlv = ot.onie_tlv()
+        rets = onietlv.decode(eeprom)
+        if e2_decode is not None:
+            onie_eeprom_decode(rets, e2_decode)
+        print("%-20s %-5s %-5s  %-20s" % ("TLV name", "Code", "lens", "Value"))
+        for item in rets:
+            if item["code"] == 0xfd:
+                print("%-20s 0x%-02X   %-5s" % (item["name"], item["code"], item["lens"]))
+            else:
+                print("%-20s 0x%-02X   %-5s %-20s" % (item["name"], item["code"], item["lens"], item["value"]))
+    except Exception as e:
+        print(str(e))
+
+
+def set_fantlv_value(params):
+    fantlv_dict = params.get("fantlv")
+    field = params.get("field")
+    config_value = params.get("config_value")
+    for index, fantlv_item in enumerate(fantlv_dict):
+        if fantlv_item.get("name") == field:
+            if "value" in fantlv_item.keys():
+                fantlv_dict[index]["value"] = config_value
+
+
+def fantlv_eeprom_decode(fantlv_dict, e2_decode):
+    for e2_decode_item in e2_decode:
+        field = e2_decode_item.get("field")
+        decode_type = e2_decode_item.get("decode_type")
+        if decode_type == 'func':
+            params = {
+                "fantlv": fantlv_dict,
+                "field": field
+            }
+            func_name = e2_decode_item.get("func_name")
+            if func_name is not None:
+                run_func(func_name, params)
+        elif decode_type == 'config':
+            config_value = e2_decode_item.get("config_value")
+            if config_value is not None:
+                params = {
+                    "fantlv": fantlv_dict,
+                    "field": field,
+                    "config_value": config_value
+                }
+                set_fantlv_value(params)
+        else:
+            print("unsupport decode type")
+            continue
+
+
+def fantlv_eeprom_show(eeprom, e2_decode=None):
+    try:
+        tlv = fan_tlv()
+        rets = tlv.decode(eeprom)
+        if len(rets) == 0:
+            print("fan tlv eeprom info error.!")
+            return
+        if e2_decode is not None:
+            fantlv_eeprom_decode(rets, e2_decode)
+        print("%-15s %-5s %-5s  %-20s" % ("TLV name", "Code", "lens", "Value"))
+        for item in rets:
+            print("%-15s 0x%-02X   %-5s %-20s" % (item["name"], item["code"], item["lens"], item["value"]))
+    except Exception as e:
+        print(str(e))
+    return
+
+
+def run_func(funcname, params):
+    try:
+        func = getattr(ExtraFunc, funcname)
+        func(params)
+    except Exception as e:
+        print(str(e))
+
+def set_fru_value(params):
+    ipmi_fru = params.get("fru")
+    area = params.get("area")
+    field = params.get("field")
+    config_value = params.get("config_value")
+    ipmi_fru.setValue(area, field, config_value)
+
+
+def fru_eeprom_decode(ipmi_fru, e2_decode):
+    for e2_decode_item in e2_decode:
+        area = e2_decode_item.get("area")
+        field = e2_decode_item.get("field")
+        decode_type = e2_decode_item.get("decode_type")
+        if decode_type == 'func':
+            params = {
+                "fru": ipmi_fru,
+                "area": area,
+                "field": field
+            }
+            func_name = e2_decode_item.get("func_name")
+            if func_name is not None:
+                run_func(func_name, params)
+        elif decode_type == 'config':
+            config_value = e2_decode_item.get("config_value")
+            if config_value is not None:
+                params = {
+                    "fru": ipmi_fru,
+                    "area": area,
+                    "field": field,
+                    "config_value": config_value
+                }
+                set_fru_value(params)
+        else:
+            print("unsupport decode type")
+            continue
+
+
+def fru_eeprom_show(eeprom, e2_decode=None):
+    try:
+        ipmi_fru = ipmifru()
+        ipmi_fru.decodeBin(eeprom)
+        if e2_decode is not None:
+            fru_eeprom_decode(ipmi_fru, e2_decode)
+        print("=================board=================")
+        print(ipmi_fru.boardInfoArea)
+        print("=================product=================")
+        print(ipmi_fru.productInfoArea)
+    except Exception as e:
+        print(str(e))
+
+
+def custfru_eeprom_show(eeprom, e2_decode=None):
+    try:
+        custfru = CustFru()
+        custfru.decode(eeprom)
+        print(custfru)
+    except Exception as e:
+        print(str(e))
+
+
+def eeprom_parase(eeprom_conf):
+    name = eeprom_conf.get("name")
+    e2_type = eeprom_conf.get("e2_type")
+    e2_path = eeprom_conf.get("e2_path")
+    e2_size = eeprom_conf.get("e2_size", 256)
+    e2_decode = eeprom_conf.get("e2_decode")
+    print("===================%s===================" % name)
+    ret, binval_bytes = dev_file_read(e2_path, 0, e2_size)
+    if ret is False:
+        print("eeprom read error, eeprom path: %s, msg: %s" % (e2_path, binval_bytes))
+        return
+    binval = byteTostr(binval_bytes)
+    if e2_type == "onie_tlv":
+        onie_eeprom_show(binval, e2_decode)
+    elif e2_type == "fru":
+        fru_eeprom_show(binval, e2_decode)
+    elif e2_type == "fantlv":
+        fantlv_eeprom_show(binval, e2_decode)
+    elif e2_type == "custfru":
+        custfru_eeprom_show(binval, e2_decode)
+    else:
+        print("Unknow eeprom type: %s" % e2_type)
+    return
+
+
+def get_fans_eeprom_info(param):
+    fan_eeprom_conf = PLATFORM_E2_CONF.get("fan", [])
+    fan_num = len(fan_eeprom_conf)
+    if fan_num == 0:
+        print("fan number is 0, can't get fan eeprom info")
+        return
+    if param == 'all':
+        for conf in fan_eeprom_conf:
+            eeprom_parase(conf)
+        return
+    if not param.isdigit():
+        print("param error, %s is not digital or 'all'" % param)
+        return
+    fan_index = int(param, 10) - 1
+    if fan_index < 0 or fan_index >= fan_num:
+        print("param error, total fan number: %d, fan index: %d" % (fan_num, fan_index + 1))
+        return
+    eeprom_parase(fan_eeprom_conf[fan_index])
+    return
+
+
+def get_psus_eeprom_info(param):
+    psu_eeprom_conf = PLATFORM_E2_CONF.get("psu", [])
+    psu_num = len(psu_eeprom_conf)
+    if psu_num == 0:
+        print("psu number is 0, can't get psu eeprom info")
+        return
+    if param == 'all':
+        for conf in psu_eeprom_conf:
+            eeprom_parase(conf)
+        return
+    if not param.isdigit():
+        print("param error, %s is not digital or 'all'" % param)
+        return
+    psu_index = int(param, 10) - 1
+    if psu_index < 0 or psu_index >= psu_num:
+        print("param error, total psu number: %d, psu index: %d" % (psu_num, psu_index + 1))
+        return
+    eeprom_parase(psu_eeprom_conf[psu_index])
+    return
+
+
+def get_slots_eeprom_info(param):
+    slot_eeprom_conf = PLATFORM_E2_CONF.get("slot", [])
+    slot_num = len(slot_eeprom_conf)
+    if slot_num == 0:
+        print("slot number is 0, can't get slot eeprom info")
+        return
+    if param == 'all':
+        for conf in slot_eeprom_conf:
+            eeprom_parase(conf)
+        return
+    if not param.isdigit():
+        print("param error, %s is not digital or 'all'" % param)
+        return
+    slot_index = int(param, 10) - 1
+    if slot_index < 0 or slot_index >= slot_num:
+        print("param error, total slot number: %d, slot index: %d" % (slot_num, slot_index + 1))
+        return
+    eeprom_parase(slot_eeprom_conf[slot_index])
+    return
+
+
+def get_syseeprom_info(param):
+    syseeprom_conf = PLATFORM_E2_CONF.get("syseeprom", [])
+    syseeprom_num = len(syseeprom_conf)
+    if syseeprom_num == 0:
+        print("syseeprom number is 0, can't get syseeprom info")
+        return
+    if param == 'all':
+        for conf in syseeprom_conf:
+            eeprom_parase(conf)
+        return
+    if not param.isdigit():
+        print("param error, %s is not digital or 'all'" % param)
+        return
+    syseeprom_index = int(param, 10) - 1
+    if syseeprom_index < 0 or syseeprom_index >= syseeprom_num:
+        print("param error, total syseeprom number: %d, syseeprom index: %d" % (syseeprom_num, syseeprom_index + 1))
+        return
+    eeprom_parase(syseeprom_conf[syseeprom_index])
+    return
+
+
+def decode_eeprom_info(e2_type, e2_path, e2_size):
+    if not e2_size.isdigit():
+        print("param error, e2_size %s is not digital" % e2_size)
+        return
+    e2_size = int(e2_size, 10)
+    eeprom_conf = {}
+    eeprom_conf["name"] = e2_type
+    eeprom_conf["e2_type"] = e2_type
+    eeprom_conf["e2_path"] = e2_path
+    eeprom_conf["e2_size"] = e2_size
+    eeprom_parase(eeprom_conf)
+    return
+
+
+@click.group(cls=AliasedGroup, context_settings=CONTEXT_SETTINGS)
+def main():
+    '''platform eeprom display script'''
+
+
+# fan eeprom info display
+@main.command()
+@click.argument('fan_index', required=True)
+def fan(fan_index):
+    '''fan_index(1, 2, 3...)/all'''
+    get_fans_eeprom_info(fan_index)
+
+
+# psu eeprom info display
+@main.command()
+@click.argument('psu_index', required=True)
+def psu(psu_index):
+    '''psu_index(1, 2, 3...)/all'''
+    get_psus_eeprom_info(psu_index)
+
+
+# slot eeprom info display
+@main.command()
+@click.argument('slot_index', required=True)
+def slot(slot_index):
+    '''slot_index(1, 2, 3...)/all'''
+    get_slots_eeprom_info(slot_index)
+
+
+# syseeprom info display
+@main.command()
+@click.argument('syseeprom_index', required=True)
+def syseeprom(syseeprom_index):
+    '''syseeprom_index(1, 2, 3...)/all'''
+    get_syseeprom_info(syseeprom_index)
+
+
+# fru eeprom info decode
+@main.command()
+@click.argument('e2_path', required=True)
+@click.argument('e2_size', required=False, default="256")
+def fru(e2_path, e2_size):
+    '''e2_path'''
+    decode_eeprom_info("fru", e2_path, e2_size)
+
+
+# fantlv eeprom info decode
+@main.command()
+@click.argument('e2_path', required=True)
+@click.argument('e2_size', required=False, default="256")
+def fantlv(e2_path, e2_size):
+    '''e2_path'''
+    decode_eeprom_info("fantlv", e2_path, e2_size)
+
+
+# onie_tlv eeprom info decode
+@main.command()
+@click.argument('e2_path', required=True)
+@click.argument('e2_size', required=False, default="256")
+def onie_tlv(e2_path, e2_size):
+    '''e2_path'''
+    decode_eeprom_info("onie_tlv", e2_path, e2_size)
+
+
+if __name__ == '__main__':
+    if os.geteuid() != 0:
+        print("Root privileges are required for this operation")
+        sys.exit(1)
+    main()
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/platform_intf.py b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_intf.py
new file mode 100755
index 000000000..ef27c2392
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_intf.py
@@ -0,0 +1,389 @@
+#!/usr/bin/env python3
+import os
+import syslog
+import glob
+import importlib.machinery
+from platform_util import getplatform_name, dev_file_read, dev_file_write, write_sysfs, read_sysfs
+
+__all__ = [
+    "platform_reg_read",
+    "platform_reg_write",
+    "platform_set_optoe_type",
+    "platform_get_optoe_type",
+    "platform_sfp_read",
+    "platform_sfp_write",
+]
+
+CPLD = 0
+FPGA = 1
+CPLD_PATH = "/dev/cpld%d"
+FPGA_PATH = "/dev/fpga%d"
+
+
+OPTOE_PATH = "/sys/bus/i2c/devices/%d-0050/"
+OPTOE_DEV_CLASS = "dev_class"
+OPTOE_EEPROM = "eeprom"
+
+
+PLATFORM_INTF_DEBUG_FILE = "/etc/.platform_intf_debug_flag"
+
+
+CONFIG_FILE_LIST = [
+    "/usr/local/bin/",
+    "/usr/local/lib/*/dist-packages/config/"
+]
+
+
+def platform_intf_debug(s):
+    if os.path.exists(PLATFORM_INTF_DEBUG_FILE):
+        syslog.openlog("PLATFORM_INTF_DEBUG", syslog.LOG_PID)
+        syslog.syslog(syslog.LOG_DEBUG, s)
+
+
+def platform_intf_error(s):
+    if os.path.exists(PLATFORM_INTF_DEBUG_FILE):
+        syslog.openlog("PLATFORM_INTF_ERROR", syslog.LOG_PID)
+        syslog.syslog(syslog.LOG_ERR, s)
+
+
+class IntfPlatform:
+    CONFIG_NAME = 'PLATFORM_INTF_OPTOE'
+    __port_optoe_dict = {}
+
+    def __init__(self):
+        real_path = None
+        platform_name = (getplatform_name()).replace("-", "_")
+        for configfile_path in CONFIG_FILE_LIST:
+            if "/*/" in configfile_path:
+                filepath = glob.glob(configfile_path)
+                if len(filepath) == 0:
+                    continue
+                configfile_path = filepath[0]
+            configfile = configfile_path + platform_name + "_port_config.py"
+            if os.path.exists(configfile):
+                real_path = configfile
+                break
+        if real_path is None:
+            raise Exception("get port config error")
+        config = importlib.machinery.SourceFileLoader(self.CONFIG_NAME, real_path).load_module()
+        self.__port_optoe_dict = config.PLATFORM_INTF_OPTOE
+
+    def get_dev_path(self, dev_type, dev_id):
+        if dev_type == CPLD:
+            path = CPLD_PATH % dev_id
+        elif dev_type == FPGA:
+            path = FPGA_PATH % dev_id
+        else:
+            msg = "dev_type error!"
+            return False, msg
+        platform_intf_debug("path:%s" % path)
+        return True, path
+
+    def get_port_path(self, port):
+        port_num = self.__port_optoe_dict.get("port_num", 0)
+        if port_num <= 0:
+            msg = "PLATFORM_INTF_OPTOE port_num config error, port_num: %d!" % port_num
+            return False, msg
+
+        if port <= 0 or port > port_num:
+            msg = "port out of range !"
+            return False, msg
+
+        port_bus_map = self.__port_optoe_dict.get("port_bus_map")
+        optoe_start_bus = self.__port_optoe_dict.get("optoe_start_bus", 0)
+        if port_bus_map is None: # get port bus by optoe_start_bus
+            if optoe_start_bus <= 0:
+                msg = "PLATFORM_INTF_OPTOE optoe_start_bus config error, optoe_start_bus: %d" % optoe_start_bus
+                return False, msg
+            port_bus = port + optoe_start_bus - 1
+        else: # get port bus by port_bus_map
+            port_bus = port_bus_map.get(port)
+            if port_bus is None:
+                msg = "port %d don't has i2c bus" % port
+                return False, msg
+            if not isinstance(port_bus, int) or port_bus < 0:
+                msg = "port %d i2c bus config error, port_bus: %s " % port_bus
+                return False, msg
+
+        path = OPTOE_PATH % (port_bus)
+        platform_intf_debug("path:%s" % path)
+        return True, path
+
+    ###########################################
+    # reg_read - read logic device register
+    # @dev_type: 0: CPLD, 1: FPGA
+    # @dev_id: device ID, start from 0
+    # @offset: register offset
+    # @size: read length
+    # return:
+    # @ret: True if read success, False if not
+    # @info: The read value list if read success, otherwise the detail error message
+    ###########################################
+    def reg_read(self, dev_type, dev_id, offset, size):
+        ret, path = self.get_dev_path(dev_type, dev_id)
+        if ret is False:
+            return False, path
+        ret, info = dev_file_read(path, offset, size)
+        return ret, info
+
+    ###########################################
+    # platform_reg_write - write logic device register
+    # @dev_type: 0: CPLD, 1: FPGA
+    # @dev_id: device ID, start from 0
+    # @offset: register offset
+    # @val_list: The write value list
+    # return:
+    # @ret: True if write success, False if not
+    # @info: The write value length if write success, otherwise the detail error message
+    ###########################################
+    def reg_write(self, dev_type, dev_id, offset, val_list):
+        ret, path = self.get_dev_path(dev_type, dev_id)
+        if ret is False:
+            return False, path
+        ret, info = dev_file_write(path, offset, val_list)
+        return ret, info
+
+    ###########################################
+    # set_optoe_type - set port optoe type
+    # @port: port index start from 1
+    # @optoe_type: optoe type, including the following values
+    # 1: OPTOE1
+    # 2: OPTOE2
+    # 3: OPTOE3
+    # return:
+    # @ret: True if set optoe type success, False if not
+    # @info: None if set optoe type success, otherwise the detail error message
+    ###########################################
+    def set_optoe_type(self, port, optoe_type):
+        ret, path = self.get_port_path(port)
+        if ret is False:
+            return False, path
+        optoe_type_path = path + OPTOE_DEV_CLASS
+        ret, info = write_sysfs(optoe_type_path, "%d" % optoe_type)
+        if ret is False:
+            return False, info
+        return True, None
+
+    ###########################################
+    # get_optoe_type - get port optoe type
+    # @port: port index start from 1
+    # return:
+    # @ret: True if set optoe type success, False if not
+    # @info: Optoe type value if get optoe type success, otherwise the detail error message
+    # optoe type including the following values
+    # 1: OPTOE1
+    # 2: OPTOE2
+    # 3: OPTOE3
+    ###########################################
+    def get_optoe_type(self, port):
+        ret, path = self.get_port_path(port)
+        if ret is False:
+            return False, path
+        optoe_type_path = path + OPTOE_DEV_CLASS
+        ret, info = read_sysfs(optoe_type_path)
+        if ret is False:
+            return False, info
+        return True, int(info)
+
+    ###########################################
+    # sfp_read -read sfp eeprom
+    # @port_id: port index start from 1
+    # @offset: sfp eeprom offset
+    # @size: read sfp eeprom length
+    # return:
+    # @ret: True if read success, False if not
+    # @info: The read value list if read success, otherwise the detail error message
+    ###########################################
+    def sfp_read(self, port_id, offset, size):
+        ret, path = self.get_port_path(port_id)
+        if ret is False:
+            return False, path
+        optoe_eeprom_path = path + OPTOE_EEPROM
+        ret, info = dev_file_read(optoe_eeprom_path, offset, size)
+        return ret, info
+
+    ###########################################
+    # sfp_write -write sfp eeprom
+    # @port_id: port index start from 1
+    # @offset: sfp eeprom offset
+    # @val_list: The write value list
+    # return:
+    # @ret: True if read success, False if not
+    # @info: The write value length if write success, otherwise the detail error message
+    ###########################################
+    def sfp_write(self, port_id, offset, val_list):
+        ret, path = self.get_port_path(port_id)
+        if ret is False:
+            return False, path
+        optoe_eeprom_path = path + OPTOE_EEPROM
+        ret, info = dev_file_write(optoe_eeprom_path, offset, val_list)
+        return ret, info
+
+
+platform = IntfPlatform()
+
+
+###########################################
+# platform_reg_read - read logic device register
+# @dev_type: 0: CPLD, 1: FPGA
+# @dev_id: device ID, start from 0
+# @offset: register offset
+# @size: read length
+# return:
+# @ret: True if read success, False if not
+# @info: The read value list if read success, otherwise the detail error message
+###########################################
+def platform_reg_read(dev_type, dev_id, offset, size):
+    ret = False
+    info = None
+
+    # params check
+    if (isinstance(dev_type, int) is False or isinstance(dev_id, int) is False or
+            isinstance(offset, int) is False or isinstance(size, int) is False):
+        info = "params type check fail in platform_reg_read"
+        return ret, info
+    if dev_id < 0 or offset < 0 or size <= 0:
+        info = "params value check fail in platform_reg_read"
+        return ret, info
+    support_dev_type = (CPLD, FPGA)
+    if dev_type not in support_dev_type:
+        info = "dev_type match erro, fail in platform_reg_read"
+        return ret, info
+
+    # call the solve func
+    return platform.reg_read(dev_type, dev_id, offset, size)
+
+
+###########################################
+# platform_reg_write - write logic device register
+# @dev_type: 0: CPLD, 1: FPGA
+# @dev_id: device ID, start from 0
+# @offset: register offset
+# @val_list: The write value list
+# return:
+# @ret: True if write success, False if not
+# @info: The write value length if write success, otherwise the detail error message
+###########################################
+def platform_reg_write(dev_type, dev_id, offset, val_list):
+    ret = False
+    info = None
+
+    # params check
+    if (isinstance(dev_type, int) is False or isinstance(dev_id, int) is False or
+            isinstance(offset, int) is False or isinstance(val_list, list) is False):
+        info = "params type check fail in platform_reg_write"
+        return ret, info
+    if dev_id < 0 or offset < 0 or len(val_list) <= 0:
+        info = "params value check fail in platform_reg_write"
+        return ret, info
+    support_dev_type = (CPLD, FPGA)
+    if dev_type not in support_dev_type:
+        info = "dev_type match erro, fail in platform_reg_write"
+        return ret, info
+
+    # call the solve func
+    return platform.reg_write(dev_type, dev_id, offset, val_list)
+
+
+###########################################
+# platform_set_optoe_type - set port optoe type
+# @port: port index start from 1
+# @optoe_type: optoe type, including the following values
+# 1: OPTOE1
+# 2: OPTOE2
+# 3: OPTOE3
+# return:
+# @ret: True if set optoe type success, False if not
+# @info: None if set optoe type success, otherwise the detail error message
+###########################################
+def platform_set_optoe_type(port, optoe_type):
+    ret = False
+    info = None
+
+    # params check
+    if isinstance(port, int) is False or isinstance(optoe_type, int) is False:
+        info = "params type check fail in platform_set_optoe_type"
+        return ret, info
+    if port < 0 or optoe_type < 1 or optoe_type > 3:
+        info = "params value check fail in platform_set_optoe_type"
+        return ret, info
+
+    # call the solve func
+    return platform.set_optoe_type(port, optoe_type)
+
+
+###########################################
+# platform_get_optoe_type - get port optoe type
+# @port: port index start from 1
+# return:
+# @ret: True if set optoe type success, False if not
+# @info: Optoe type value if get optoe type success, otherwise the detail error message
+# optoe type including the following values
+# 1: OPTOE1
+# 2: OPTOE2
+# 3: OPTOE3
+###########################################
+def platform_get_optoe_type(port):
+    ret = False
+    info = None
+
+    # params check
+    if isinstance(port, int) is False:
+        info = "params type check fail in platform_get_optoe_type"
+        return ret, info
+    if port < 0:
+        info = "params value check fail in platform_get_optoe_type"
+        return ret, info
+
+    # call the solve func
+    return platform.get_optoe_type(port)
+
+
+###########################################
+# platform_sfp_read -read sfp eeprom
+# @port_id: port index start from 1
+# @offset: sfp eeprom offset
+# @size: read sfp eeprom length
+# return:
+# @ret: True if read success, False if not
+# @info: The read value list if read success, otherwise the detail error message
+###########################################
+def platform_sfp_read(port_id, offset, size):
+    ret = False
+    info = None
+
+    # params check
+    if isinstance(port_id, int) is False or isinstance(offset, int) is False or isinstance(size, int) is False:
+        info = "params type check fail in platform_sfp_read"
+        return ret, info
+    if port_id < 0 or offset < 0 or size <= 0:
+        info = "params value check fail in platform_sfp_read"
+        return ret, info
+
+    # call the solve func
+    return platform.sfp_read(port_id, offset, size)
+
+
+###########################################
+# platform_sfp_write -write sfp eeprom
+# @port_id: port index start from 1
+# @offset: sfp eeprom offset
+# @val_list: The write value list
+# return:
+# @ret: True if read success, False if not
+# @info: The write value length if write success, otherwise the detail error message
+###########################################
+def platform_sfp_write(port_id, offset, val_list):
+    ret = False
+    info = None
+
+    # params check
+    if isinstance(port_id, int) is False or isinstance(offset, int) is False or isinstance(val_list, list) is False:
+        info = "params type check fail in platform_sfp_write"
+        return ret, info
+    if port_id < 0 or offset < 0 or len(val_list) <= 0:
+        info = "params value check fail in platform_sfp_write"
+        return ret, info
+
+    # call the solve func
+    return platform.sfp_write(port_id, offset, val_list)
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/platform_ipmi.py b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_ipmi.py
new file mode 100755
index 000000000..c9b72c99c
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_ipmi.py
@@ -0,0 +1,92 @@
+#!/usr/bin/env python3
+# -*- coding: utf-8 -*-
+import sys
+import os
+import syslog
+import click
+from platform_util import exec_os_cmd
+
+
+IPMITOOL_CMD = "ipmitool raw 0x32 0x04"  # All products are the same command
+
+PLATFORM_IPMI_DEBUG_FILE = "/etc/.platform_ipmi_debug_flag"
+UPGRADEDEBUG = 1
+debuglevel = 0
+
+
+def debug_init():
+    global debuglevel
+    if os.path.exists(PLATFORM_IPMI_DEBUG_FILE):
+        debuglevel = debuglevel | UPGRADEDEBUG
+    else:
+        debuglevel = debuglevel & ~(UPGRADEDEBUG)
+
+
+def ipmidebuglog(s):
+    # s = s.decode('utf-8').encode('gb2312')
+    if UPGRADEDEBUG & debuglevel:
+        syslog.openlog("PLATFORM_IPMI", syslog.LOG_PID)
+        syslog.syslog(syslog.LOG_DEBUG, s)
+
+
+def ipmierror(s):
+    # s = s.decode('utf-8').encode('gb2312')
+    syslog.openlog("PLATFORM_IPMI", syslog.LOG_PID)
+    syslog.syslog(syslog.LOG_ERR, s)
+
+
+@click.command()
+@click.argument('cmd', required=True)
+def platform_ipmi_main(cmd):
+    '''Send command to BMC through ipmi'''
+    try:
+        # Convert string command to ASCII
+        user_cmd = ""
+        for ch in cmd:
+            user_cmd += " " + str(ord(ch))
+
+        final_cmd = IPMITOOL_CMD + user_cmd
+        ipmidebuglog("final cmd:%s" % final_cmd)
+
+        # exec ipmitool cmd
+        status, output = exec_os_cmd(final_cmd)
+        if status:
+            ipmierror("exec ipmitool_cmd:%s user_cmd:%s failed" % (IPMITOOL_CMD, cmd))
+            ipmierror("failed log: %s" % output)
+            return False, "exec final_cmd failed"
+
+        # the data read by ipmitool is hex value, needs transformation
+        data_list = output.replace("\n", "").strip(' ').split(' ')
+        ipmidebuglog("data_list: %s" % data_list)
+        result = ""
+        for data in data_list:
+            result += chr(int(data, 16))
+
+        # 'result' string include ret and log, separated by ,
+        result_list = result.split(',', 2)
+        if len(result_list) != 2:
+            log = "split failed. len(result) != 2. result:%s" % result
+            ipmierror(log)
+            return False, log
+        if int(result_list[0]) != 0:
+            ipmierror("finally analy ipmitool_cmd:%s user_cmd:%s exec failed" % (IPMITOOL_CMD, cmd))
+            ipmierror("failed return log: %s" % result_list[1])
+            print(result_list[1])
+            return False, result_list[1]
+
+        ipmidebuglog("finally exec ipmitool_cmd:%s user_cmd:%s success" % (IPMITOOL_CMD, cmd))
+        print(result_list[1])
+        return True, result_list[1]
+
+    except Exception as e:
+        log = "An exception occurred, exception log:%s" % str(e)
+        ipmierror(log)
+        return False, log
+
+
+if __name__ == '__main__':
+    debug_init()
+    ret, msg = platform_ipmi_main()
+    if ret is False:
+        sys.exit(1)
+    sys.exit(0)
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/platform_manufacturer.py b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_manufacturer.py
new file mode 100755
index 000000000..b2643da9b
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_manufacturer.py
@@ -0,0 +1,562 @@
+#!/usr/bin/env python3
+
+import re
+import mmap
+import fcntl
+import subprocess
+import shlex
+import signal
+import os
+import time
+import sys
+from platform_config import MANUINFO_CONF
+from monitor import status
+
+
+INDENT = 4
+
+
+def printerr(vchar):
+    sys.stderr.write(vchar + '\n')
+
+
+g_extra_cache = {}
+g_meminfo_cache = {}
+g_exphy_cache = {}
+
+
+def exec_os_cmd(cmd, timeout = None):
+    status, output = subprocess.getstatusoutput(cmd)
+    return status, output
+
+
+def exphyfwsplit():
+    # improve performance
+    global g_exphy_cache
+    if g_exphy_cache:
+        return
+    cmd = "bcmcmd -t 1 \"phy control xe,ce fw_get\" |grep fw_version"
+    ret, output = exec_os_cmd(cmd)
+    if ret or len(output) == 0:
+        raise Exception("run cmd: {} error, status: {}, msg: {}".format(cmd, ret, output))
+    exphyfwstr = output.strip()
+    portlist = exphyfwstr.split("\n")
+    for port in portlist:
+        phy_addr_str = get_regular_val(port, r"phy_addr\s*=\s*\w+", 0)
+        if phy_addr_str.startswith("ERR"):
+            continue
+        phy_addr_key = phy_addr_str.replace(" ", "")
+        if phy_addr_key in g_exphy_cache:
+            continue
+
+        g_exphy_cache[phy_addr_key] = {}
+
+        fw_version_str = get_regular_val(port, r"fw_version\s*=\s*\w+", 0)
+        if fw_version_str.startswith("ERR"):
+            del g_exphy_cache[phy_addr_key]
+            continue
+
+        fw_version = fw_version_str.split("=")[1].strip()
+        g_exphy_cache[phy_addr_key]["fw_version"] = fw_version
+
+        if "success" in port:
+            ret = "OK"
+        else:
+            ret = "Unexpected"
+        g_exphy_cache[phy_addr_key]["status"] = ret
+    return
+
+
+def lshwmemorysplit():
+    # improve performance
+    global g_meminfo_cache
+    if g_meminfo_cache:
+        return
+    cmd = "lshw -c memory"
+    ret, output = exec_os_cmd(cmd)
+    if ret or len(output) == 0:
+        raise Exception("run cmd: {} error, status: {}, msg: {}".format(cmd, ret, output))
+    memstr = output.strip()
+    memlist = memstr.split("*-")
+    for item in memlist:
+        if item.strip().startswith("memory") and "System Memory" not in item:
+            continue
+        line_index = 0
+        for line in item.splitlines():
+            line_index += 1
+            if line_index == 1:
+                memdict_key = line
+                g_meminfo_cache[memdict_key] = {}
+            else:
+                if ":" not in line:
+                    continue
+                key = line.split(":", 1)[0].strip()
+                value = line.split(":", 1)[1].strip()
+                g_meminfo_cache[memdict_key][key] = value
+            if "empty" in item:
+                break
+    return
+
+
+def run_extra_func(funcname):
+    # improve performance
+    if funcname in g_extra_cache:
+        return g_extra_cache.get(funcname)
+    func = getattr(status, funcname)
+    ret = []
+    func(ret)
+    if ret:
+        g_extra_cache[funcname] = ret
+    return ret
+
+
+def get_extra_value(funcname, itemid, key):
+    for item in run_extra_func(funcname):
+        if item.get("id") == itemid:
+            return item.get(key, "NA")
+    return "NA"
+
+
+def io_wr(reg_addr, reg_data):
+    try:
+        regdata = 0
+        regaddr = 0
+        if isinstance(reg_addr, int):
+            regaddr = reg_addr
+        else:
+            regaddr = int(reg_addr, 16)
+        if isinstance(reg_data, int):
+            regdata = reg_data
+        else:
+            regdata = int(reg_data, 16)
+        devfile = "/dev/port"
+        fd = os.open(devfile, os.O_RDWR | os.O_CREAT)
+        os.lseek(fd, regaddr, os.SEEK_SET)
+        os.write(fd, regdata.to_bytes(1, 'little'))
+        return True
+    except ValueError as e:
+        print(e)
+        return False
+    except Exception as e:
+        print(e)
+        return False
+    finally:
+        os.close(fd)
+
+
+def checksignaldriver(name):
+    modisexistcmd = "lsmod | grep -w %s | wc -l" % name
+    ret, output = exec_os_cmd(modisexistcmd)
+    if ret:
+        return False
+    if output.isdigit() and int(output) > 0:
+        return True
+    return False
+
+
+def adddriver(name):
+    cmd = "modprobe %s" % name
+    if checksignaldriver(name) is not True:
+        ret, log = exec_os_cmd(cmd)
+        if ret != 0 or len(log) > 0:
+            return False
+        return True
+    return True
+
+
+def removedriver(name):
+    cmd = "rmmod %s" % name
+    if checksignaldriver(name):
+        exec_os_cmd(cmd)
+
+def deal_itmes(item_list):
+    for item in item_list:
+        dealtype = item.get("dealtype")
+        if dealtype == "shell":
+            cmd = item.get("cmd")
+            timeout = item.get("timeout", 10)
+            exec_os_cmd(cmd, timeout)
+        elif dealtype == "io_wr":
+            io_addr = item.get("io_addr")
+            wr_value = item.get("value")
+            io_wr(io_addr, wr_value)
+
+
+def get_func_value(funcname, params):
+    func = getattr(ExtraFunc, funcname)
+    ret = func(params)
+    return ret
+
+
+def read_pci_reg(pcibus, slot, fn, resource, offset):
+    '''read pci register'''
+    if offset % 4 != 0:
+        return "ERR offset: %d not 4 bytes align"
+    filename = "/sys/bus/pci/devices/0000:%02x:%02x.%x/resource%d" % (int(pcibus), int(slot), int(fn), int(resource))
+    size = os.path.getsize(filename)
+    with open(filename, "r+") as file:
+        data = mmap.mmap(file.fileno(), size)
+        result = data[offset: offset + 4]
+        s = result[::-1]
+        val = 0
+        for value in s:
+            val = val << 8 | value
+        data.close()
+    return "%08x" % val
+
+
+def devfileread(path, offset, length, bit_width):
+    ret = ""
+    val_str = ''
+    val_list = []
+    fd = -1
+    if not os.path.exists(path):
+        return "%s not found !" % path
+    if length % bit_width != 0:
+        return "only support read by bit_width"
+    if length < bit_width:
+        return "len needs to greater than or equal to bit_width"
+
+    try:
+        fd = os.open(path, os.O_RDONLY)
+        os.lseek(fd, offset, os.SEEK_SET)
+        ret = os.read(fd, length)
+        for item in ret:
+            val_list.append(item)
+
+        for i in range(0, length, bit_width):
+            for j in range(0, bit_width):
+                val_str += "%02x" % val_list[i + bit_width - j - 1]
+    except Exception as e:
+        return str(e)
+    finally:
+        if fd > 0:
+            os.close(fd)
+    return val_str
+
+
+def read_reg(loc, offset, size):
+    with open(loc, 'rb') as file:
+        file.seek(offset)
+        return ' '.join(["%02x" % item for item in file.read(size)])
+
+
+def std_match(stdout, pattern):
+    if pattern is None:
+        return stdout.strip()
+    for line in stdout.splitlines():
+        if re.match(pattern, line):
+            return line.strip()
+    raise EOFError("pattern: {} does not match anything in stdout {}".format(
+        pattern, stdout))
+
+
+def i2c_rd(bus, loc, offset):
+    '''
+    read i2c with i2cget command
+    '''
+    cmd = "i2cget -f -y {} {} {}".format(bus, loc, offset)
+    retrytime = 6
+    for i in range(retrytime):
+        ret, stdout = subprocess.getstatusoutput(cmd)
+        if ret == 0:
+            return stdout
+        time.sleep(0.1)
+    raise RuntimeError("run cmd: {} error, status {}".format(cmd, ret))
+
+
+def i2c_rd_bytes(bus, loc, offset, size):
+    blist = []
+    for i in range(size):
+        ret = i2c_rd(bus, loc, offset + i)
+        blist.append(ret)
+
+    return blist
+
+
+def get_pair_val(source, separator):
+    try:
+        value = source.split(separator, 1)[1]
+    except (ValueError, IndexError):
+        return "ERR separator: {} does not match in source: {}".format(separator, source)
+    return value.strip()
+
+
+def get_regular_val(source, pattern, group):
+    try:
+        value = re.findall(pattern, source)[group]
+    except Exception:
+        return "ERR pattern: {} does not match  in source: {} with group: {}".format(pattern, source, group)
+    return value.strip()
+
+
+def find_match(file2read, pattern):
+    with open(file2read, 'r') as file:
+        for line in file:
+            if not re.match(pattern, line):
+                continue
+            return line.strip()
+    return "ERR pattern %s not match in %s" % (pattern, file2read)
+
+
+def readaline(file2read):
+    with open(file2read, 'r') as file:
+        return file.readline()
+
+
+def sort_key(e):
+    return e.arrt_index
+
+
+class ExtraFunc(object):
+    @staticmethod
+    def get_bcm5387_version(params):
+        version = ""
+        try:
+            before_deal_list = params.get("before", [])
+            deal_itmes(before_deal_list)
+
+            ret, version = exec_os_cmd(params["get_version"])
+            if ret != 0:
+                version = "ERR " + version
+
+            after_deal_list = params.get("after", [])
+            deal_itmes(after_deal_list)
+
+        except Exception as e:
+            version = "ERR %s" % (str(e))
+        finally:
+            finally_deal_list = params.get("finally", [])
+            deal_itmes(finally_deal_list)
+        return version
+
+    @staticmethod
+    def get_memory_value(params):
+        root_key = params.get("root_key")
+        sub_key = params.get("sub_key")
+        lshwmemorysplit()
+        return g_meminfo_cache.get(root_key, {}).get(sub_key, "NA")
+
+    @staticmethod
+    def get_memory_bank_value(params):
+        lshwmemorysplit()
+        bank = params.get("bankid")
+        if g_meminfo_cache.get(bank, {}):
+            return True
+        return False
+
+    @staticmethod
+    def get_exphy_fw(phyid):
+        exphyfwsplit()
+        if phyid not in g_exphy_cache:
+            return "ERR %s not found." % phyid
+        fw_version = g_exphy_cache.get(phyid).get("fw_version")
+        ret = g_exphy_cache.get(phyid).get("status")
+        msg = "%s    %s" % (fw_version, ret)
+        return msg
+
+class CallbackSet:
+    def cpld_format(self, blist):
+        if isinstance(blist, str):
+            blist = blist.split()
+        elif not isinstance(blist, list) or len(blist) != 4:
+            raise ValueError("cpld format: wrong parameter: {}".format(blist))
+
+        return "{}{}{}{}".format(*blist).replace("0x", "")
+
+
+class VersionHunter:
+    call = CallbackSet()
+
+    def __init__(self, entires):
+        self.head = None
+        self.next = None
+        self.key = None
+        self.cmd = None
+        self.file = None
+        self.reg = None
+        self.i2c = None
+        self.extra = None
+        self.pattern = None
+        self.separator = None
+        self.parent = None
+        self.ignore = False
+        self.children = []
+        self.level = 0
+        self.callback = None
+        self.delspace = None
+        self.arrt_index = None
+        self.config = None
+        self.precheck = None
+        self.func = None
+        self.regular = None
+        self.group = 0
+        self.pci = None
+        self.devfile = None
+        self.decode = None
+        self.timeout = 10
+        self.__dict__.update(entires)
+
+    def check_para(self):
+        if self.pattern is None:
+            return False
+        if self.cmd is None or self.file is None:
+            return False
+        return True
+
+    def get_version(self):
+        ret = "NA"
+        try:
+            if self.cmd is not None:
+                ret, output = exec_os_cmd(self.cmd, self.timeout)
+                if ret or len(output) == 0:
+                    raise RuntimeError("run cmd: {} error, status: {}, msg: {}".format(self.cmd, ret, output))
+                ret = std_match(output, self.pattern)
+            elif self.file is not None:
+                ret = self.read_file()
+            elif self.reg is not None:
+                ret = read_reg(self.reg.get("loc"), self.reg.get("offset"),
+                               self.reg.get("size"))
+            elif self.extra:
+                ret = get_extra_value(self.extra.get("funcname"),
+                                      self.extra.get("id"),
+                                      self.extra.get("key"))
+            elif self.i2c:
+                ret = i2c_rd_bytes(self.i2c.get("bus"), self.i2c.get("loc"),
+                                   self.i2c.get("offset"),
+                                   self.i2c.get("size"))
+            elif self.config:
+                ret = self.config
+            elif self.func:
+                ret = get_func_value(self.func.get("funcname"),
+                                     self.func.get("params"))
+            elif self.pci:
+                ret = read_pci_reg(self.pci.get("bus"), self.pci.get("slot"),
+                                   self.pci.get("fn"), self.pci.get("bar"), self.pci.get("offset"))
+            elif self.devfile:
+                ret = devfileread(self.devfile.get("loc"), self.devfile.get("offset"),
+                                  self.devfile.get("len"), self.devfile.get("bit_width"))
+
+        except Exception as e:
+            # printerr(e.message)
+            return "ERR %s" % str(e)
+        return self.exe_callback(ret)
+
+    def exe_callback(self, data):
+        try:
+            if self.callback:
+                method = getattr(self.call, self.callback)
+                return method(data)
+        except Exception:
+            return "ERR run callback method: {} error, data: {}".format(self.callback, data)
+        return data
+
+    def read_file(self):
+        if self.pattern is not None:
+            return find_match(self.file, self.pattern)
+        return readaline(self.file)
+
+    def hunt(self):
+        if self.ignore:
+            return
+        indent = self.level * INDENT * " "
+
+        if self.precheck:
+            try:
+                ret = get_func_value(self.precheck.get("funcname"), self.precheck.get("params"))
+                if ret is not True:
+                    return
+            except Exception as e:
+                err_msg = "ERR %s" % str(e)
+                format_str = "{}{:<{}}{}".format(indent, self.key + ':',
+                                                 (30 - len(indent)), err_msg)
+                print(format_str)
+                return
+        # has children
+        if self.children:
+            self.children.sort(key=sort_key)
+            format_str = "{}{}:".format(indent, self.key)
+            print(format_str)
+            for child in self.children:
+                if not isinstance(child, VersionHunter):
+                    continue
+                child.level = self.level + 1
+                child.hunt()
+        else:
+            version = self.get_version() or ""
+            if not version.startswith("ERR"):
+                version = version.replace("\x00", "").strip()
+                if self.separator is not None:
+                    version = get_pair_val(version, self.separator)
+                if self.delspace is not None:
+                    version = version.replace(" ", "")
+                if self.regular is not None:
+                    version = get_regular_val(version, self.regular, self.group)
+                if self.decode is not None:
+                    tmp_version = self.decode.get(version)
+                    if tmp_version is None:
+                        version = "ERR decode %s failed" % version
+                    else:
+                        version = tmp_version
+            format_str = "{}{:<{}}{}".format(indent, self.key + ':',
+                                             (30 - len(indent)), version)
+            print(format_str)
+
+        if self.next:
+            print("")
+            self.next.hunt()
+
+
+pidfile = 0
+
+
+def ApplicationInstance():
+    global pidfile
+    pidfile = open(os.path.realpath(__file__), "r")
+    try:
+        fcntl.flock(pidfile, fcntl.LOCK_EX | fcntl.LOCK_NB)
+        return True
+    except Exception:
+        return False
+
+
+def run():
+    if os.geteuid() != 0:
+        print("Root privileges are required for this operation")
+        sys.exit(1)
+
+    start_time = time.time()
+    while True:
+        ret = ApplicationInstance()
+        if ret is True:
+            break
+        if time.time() - start_time > 10:
+            printerr("manufacturer is running.")
+            sys.exit(1)
+        time.sleep(0.5)
+
+    objmap = {}
+
+    try:
+        target = {}
+        target.update(MANUINFO_CONF)
+        for objname, value in target.items():
+            objmap[objname] = VersionHunter(value)
+    except Exception as e:
+        printerr(str(e))
+        sys.exit(1)
+
+    head = None
+    for objname, obj in objmap.items():
+        if head is None and obj.head:
+            head = obj
+        if obj.parent:
+            objmap.get(obj.parent).children.append(obj)
+        if obj.next:
+            obj.next = objmap.get(obj.next)
+
+    head.hunt()
+
+
+if __name__ == "__main__":
+    run()
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/platform_process.py b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_process.py
new file mode 100755
index 000000000..6013c5d65
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_process.py
@@ -0,0 +1,413 @@
+#!/usr/bin/env python3
+import os
+import subprocess
+import glob
+import time
+import click
+import shutil
+from platform_config import STARTMODULE, MAC_LED_RESET, AIRFLOW_RESULT_FILE
+from platform_config import GLOBALINITPARAM, GLOBALINITCOMMAND, GLOBALINITPARAM_PRE, GLOBALINITCOMMAND_PRE
+from platform_util import wbpciwr
+
+
+CONTEXT_SETTINGS = {"help_option_names": ['-h', '--help']}
+
+
+class AliasedGroup(click.Group):
+    def get_command(self, ctx, cmd_name):
+        rv = click.Group.get_command(self, ctx, cmd_name)
+        if rv is not None:
+            return rv
+        matches = [x for x in self.list_commands(ctx)
+                   if x.startswith(cmd_name)]
+        if not matches:
+            return None
+        if len(matches) == 1:
+            return click.Group.get_command(self, ctx, matches[0])
+        ctx.fail('Too many matches: %s' % ', '.join(sorted(matches)))
+        return None
+
+
+def log_os_system(cmd):
+    status, output = subprocess.getstatusoutput(cmd)
+    if status:
+        print(output)
+    return status, output
+
+
+def write_sysfs_value(reg_name, value):
+    mb_reg_file = "/sys/bus/i2c/devices/" + reg_name
+    locations = glob.glob(mb_reg_file)
+    if len(locations) == 0:
+        print("%s not found" % mb_reg_file)
+        return False
+    sysfs_loc = locations[0]
+    try:
+        with open(sysfs_loc, 'w') as fd:
+            fd.write(value)
+    except Exception:
+        return False
+    return True
+
+
+def getPid(name):
+    ret = []
+    for dirname in os.listdir('/proc'):
+        if dirname == 'curproc':
+            continue
+        try:
+            with open('/proc/{}/cmdline'.format(dirname), mode='r') as fd:
+                content = fd.read()
+        except Exception:
+            continue
+        if name in content:
+            ret.append(dirname)
+    return ret
+
+
+def startAvscontrol():
+    if STARTMODULE.get('avscontrol', 0) == 1:
+        cmd = "nohup avscontrol.py start >/dev/null 2>&1 &"
+        rets = getPid("avscontrol.py")
+        if len(rets) == 0:
+            log_os_system(cmd)
+
+
+def startFanctrol():
+    if STARTMODULE.get('fancontrol', 0) == 1:
+        cmd = "nohup fancontrol.py start >/dev/null 2>&1 &"
+        rets = getPid("fancontrol.py")
+        if len(rets) == 0:
+            log_os_system(cmd)
+
+
+def starthal_fanctrl():
+    if STARTMODULE.get('hal_fanctrl', 0) == 1:
+        cmd = "nohup hal_fanctrl.py start >/dev/null 2>&1 &"
+        rets = getPid("hal_fanctrl.py")
+        if len(rets) == 0:
+            log_os_system(cmd)
+
+
+def starthal_ledctrl():
+    if STARTMODULE.get('hal_ledctrl', 0) == 1:
+        cmd = "nohup hal_ledctrl.py start >/dev/null 2>&1 &"
+        rets = getPid("hal_ledctrl.py")
+        if len(rets) == 0:
+            log_os_system(cmd)
+
+
+def startDevmonitor():
+    if STARTMODULE.get('dev_monitor', 0) == 1:
+        cmd = "nohup dev_monitor.py start >/dev/null 2>&1 &"
+        rets = getPid("dev_monitor.py")
+        if len(rets) == 0:
+            log_os_system(cmd)
+
+
+def startSlotmonitor():
+    if STARTMODULE.get('slot_monitor', 0) == 1:
+        cmd = "nohup slot_monitor.py start >/dev/null 2>&1 &"
+        rets = getPid("slot_monitor.py")
+        if len(rets) == 0:
+            log_os_system(cmd)
+
+
+def startIntelligentmonitor():
+    if STARTMODULE.get('intelligent_monitor', 0) == 1:
+        cmd = "nohup intelligent_monitor.py >/dev/null 2>&1 &"
+        rets = getPid("intelligent_monitor.py")
+        if len(rets) == 0:
+            log_os_system(cmd)
+
+
+def startSignalmonitor():
+    if STARTMODULE.get('signal_monitor', 0) == 1:
+        cmd = "nohup signal_monitor.py start >/dev/null 2>&1 &"
+        rets = getPid("signal_monitor.py")
+        if len(rets) == 0:
+            log_os_system(cmd)
+
+
+def startSff_temp_polling():
+    if STARTMODULE.get('sff_temp_polling', 0) == 1:
+        cmd = "nohup sfp_highest_temperatue.py >/dev/null 2>&1 &"
+        rets = getPid("sfp_highest_temperatue.py")
+        if len(rets) == 0:
+            log_os_system(cmd)
+
+
+def startRebootCause():
+    if STARTMODULE.get('reboot_cause', 0) == 1:
+        cmd = "nohup reboot_cause.py >/dev/null 2>&1 &"
+        rets = getPid("reboot_cause.py")
+        if len(rets) == 0:
+            log_os_system(cmd)
+
+
+def startPMON_sys():
+    if STARTMODULE.get('pmon_syslog', 0) == 1:
+        cmd = "nohup pmon_syslog.py >/dev/null 2>&1 &"
+        rets = getPid("pmon_syslog.py")
+        if len(rets) == 0:
+            log_os_system(cmd)
+
+
+def startSff_polling():
+    if STARTMODULE.get('sff_polling', 0) == 1:
+        cmd = "nohup sff_polling.py start > /dev/null 2>&1 &"
+        rets = getPid("sff_polling.py")
+        if len(rets) == 0:
+            log_os_system(cmd)
+
+
+def generate_air_flow():
+    cmd = "nohup generate_airflow.py > /dev/null 2>&1 &"
+    rets = getPid("generate_airflow.py")
+    if len(rets) == 0:
+        log_os_system(cmd)
+        time.sleep(1)
+
+
+def startGenerate_air_flow():
+    if STARTMODULE.get('generate_airflow', 0) == 1:
+        for i in range(10):
+            generate_air_flow()
+            if os.path.exists(AIRFLOW_RESULT_FILE):
+                click.echo("%%WB_PLATFORM_PROCESS: generate air flow success")
+                return
+            time.sleep(1)
+        click.echo("%%WB_PLATFORM_PROCESS: generate air flow,failed, %s not exits" % AIRFLOW_RESULT_FILE)
+    return
+
+
+def start_tty_console():
+    if STARTMODULE.get('tty_console', 0) == 1:
+        cmd = "nohup tty_console.py > /dev/null 2>&1 &"
+        rets = getPid("tty_console.py")
+        if len(rets) == 0:
+            log_os_system(cmd)
+
+def startDrvUpdate():
+    if STARTMODULE.get('drv_update', 0) == 1:
+        cmd = "nohup drv_update.py >/dev/null 2>&1 &"
+        rets = getPid("drv_update.py")
+        if len(rets) == 0:
+            log_os_system(cmd)
+
+
+def stopAvscontrol():
+    if STARTMODULE.get('avscontrol', 0) == 1:
+        rets = getPid("avscontrol.py")
+        for ret in rets:
+            cmd = "kill " + ret
+            log_os_system(cmd)
+
+
+def stopFanctrol():
+    if STARTMODULE.get('fancontrol', 0) == 1:
+        rets = getPid("fancontrol.py")  #
+        for ret in rets:
+            cmd = "kill " + ret
+            log_os_system(cmd)
+
+
+def stophal_fanctrl():
+    if STARTMODULE.get('hal_fanctrl', 0) == 1:
+        rets = getPid("hal_fanctrl.py")
+        for ret in rets:
+            cmd = "kill " + ret
+            log_os_system(cmd)
+
+
+def stophal_ledctrl():
+    if STARTMODULE.get('hal_ledctrl', 0) == 1:
+        rets = getPid("hal_ledctrl.py")
+        for ret in rets:
+            cmd = "kill " + ret
+            log_os_system(cmd)
+
+
+def stopDevmonitor():
+    if STARTMODULE.get('dev_monitor', 0) == 1:
+        rets = getPid("dev_monitor.py")  #
+        for ret in rets:
+            cmd = "kill " + ret
+            log_os_system(cmd)
+
+
+def stopSlotmonitor():
+    if STARTMODULE.get('slot_monitor', 0) == 1:
+        rets = getPid("slot_monitor.py")  #
+        for ret in rets:
+            cmd = "kill " + ret
+            log_os_system(cmd)
+
+
+def stopIntelligentmonitor():
+    if STARTMODULE.get('intelligent_monitor', 0) == 1:
+        rets = getPid("intelligent_monitor.py")
+        for ret in rets:
+            cmd = "kill " + ret
+            log_os_system(cmd)
+
+
+def stopSignalmonitor():
+    if STARTMODULE.get('signal_monitor', 0) == 1:
+        rets = getPid("signal_monitor.py")  #
+        for ret in rets:
+            cmd = "kill " + ret
+            log_os_system(cmd)
+
+
+def stopSff_temp_polling():
+    if STARTMODULE.get('sff_temp_polling', 0) == 1:
+        rets = getPid("sfp_highest_temperatue.py")
+        for ret in rets:
+            cmd = "kill " + ret
+            log_os_system(cmd)
+
+
+def stopPMON_sys():
+    if STARTMODULE.get('pmon_syslog', 0) == 1:
+        rets = getPid("pmon_syslog.py")
+        for ret in rets:
+            cmd = "kill " + ret
+            log_os_system(cmd)
+
+
+def stopRebootCause():
+    if STARTMODULE.get('reboot_cause', 0) == 1:
+        rets = getPid("reboot_cause.py")
+        for ret in rets:
+            cmd = "kill " + ret
+            log_os_system(cmd)
+
+
+def stopSff_polling():
+    if STARTMODULE.get('sff_polling', 0) == 1:
+        rets = getPid("sff_polling.py")
+        for ret in rets:
+            cmd = "kill " + ret
+            log_os_system(cmd)
+
+
+def stopGenerate_air_flow():
+    if STARTMODULE.get('generate_airflow', 0) == 1:
+        rets = getPid("generate_airflow.py")
+        for ret in rets:
+            cmd = "kill " + ret
+            log_os_system(cmd)
+
+
+def stop_tty_console():
+    if STARTMODULE.get('tty_console', 0) == 1:
+        rets = getPid("tty_console.py")
+        for ret in rets:
+            cmd = "kill " + ret
+            log_os_system(cmd)
+
+
+def otherinit():
+    for index in GLOBALINITPARAM:
+        write_sysfs_value(index["loc"], index["value"])
+
+    for index in GLOBALINITCOMMAND:
+        log_os_system(index)
+
+
+def otherinit_pre():
+    for index in GLOBALINITPARAM_PRE:
+        write_sysfs_value(index["loc"], index["value"])
+
+    for index in GLOBALINITCOMMAND_PRE:
+        log_os_system(index)
+
+
+def unload_apps():
+    stopSff_polling()
+    stopPMON_sys()
+    stopSignalmonitor()
+    stopIntelligentmonitor()
+    stopSlotmonitor()
+    stopDevmonitor()
+    stopAvscontrol()
+    stophal_ledctrl()
+    stophal_fanctrl()
+    stopFanctrol()
+    stopSff_temp_polling()
+    stopRebootCause()
+    stop_tty_console()
+    stopGenerate_air_flow()
+
+
+def MacLedSet(data):
+    '''write pci register'''
+    pcibus = MAC_LED_RESET.get("pcibus")
+    slot = MAC_LED_RESET.get("slot")
+    fn = MAC_LED_RESET.get("fn")
+    resource = MAC_LED_RESET.get("bar")
+    offset = MAC_LED_RESET.get("offset")
+    val = MAC_LED_RESET.get(data, None)
+    if val is None:
+        click.echo("%%WB_PLATFORM_PROCESS-INIT: MacLedSet wrong input")
+        return
+    wbpciwr(pcibus, slot, fn, resource, offset, val)
+
+
+def copy_machineconf():
+    try:
+        shutil.copyfile("/host/machine.conf", "/etc/sonic/machine.conf")
+        return True
+    except Exception:
+        return False
+
+def load_apps():
+    copy_machineconf()
+    otherinit_pre()
+    startDrvUpdate()
+    startGenerate_air_flow()
+    start_tty_console()
+    startRebootCause()
+    startSff_temp_polling()
+    startFanctrol()
+    starthal_fanctrl()
+    starthal_ledctrl()
+    startAvscontrol()
+    startDevmonitor()
+    startSlotmonitor()
+    startIntelligentmonitor()
+    startSignalmonitor()
+    startPMON_sys()
+    startSff_polling()
+    otherinit()
+    if STARTMODULE.get("macledreset", 0) == 1:
+        MacLedSet("reset")
+
+
+@click.group(cls=AliasedGroup, context_settings=CONTEXT_SETTINGS)
+def main():
+    '''device operator'''
+
+
+@main.command()
+def start():
+    '''load process '''
+    load_apps()
+
+
+@main.command()
+def stop():
+    '''stop process '''
+    unload_apps()
+
+
+@main.command()
+def restart():
+    '''restart process'''
+    unload_apps()
+    load_apps()
+
+
+if __name__ == '__main__':
+    main()
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/platform_sensors.py b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_sensors.py
new file mode 100755
index 000000000..cea203931
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_sensors.py
@@ -0,0 +1,283 @@
+#!/usr/bin/python3
+
+import os
+import sys
+import importlib.machinery
+
+
+def get_machine_info():
+    if not os.path.isfile('/host/machine.conf'):
+        return None
+    machine_vars = {}
+    with open('/host/machine.conf') as machine_file:
+        for line in machine_file:
+            tokens = line.split('=')
+            if len(tokens) < 2:
+                continue
+            machine_vars[tokens[0]] = tokens[1].strip()
+    return machine_vars
+
+
+def get_platform_info(machine_info):
+    if machine_info is not None:
+        if 'onie_platform' in machine_info:
+            return machine_info['onie_platform']
+        if 'aboot_platform' in machine_info:
+            return machine_info['aboot_platform']
+    return None
+
+
+PLATFORM_ROOT_PATH = '/usr/share/sonic/device'
+PLATFORM_SPECIFIC_MODULE_NAME = 'monitor'
+PLATFORM_SPECIFIC_CLASS_NAME = 'status'
+platform_status_class = None
+platform = None
+
+
+def get_platform_name():
+    global platform
+    platform = get_platform_info(get_machine_info())
+    return platform
+
+
+val = get_platform_name()
+sys.path.append("/".join([PLATFORM_ROOT_PATH, platform]))
+
+# Loads platform specific sfputil module from source
+
+
+def load_platform_monitor():
+    global platform_status_class
+    platform_name = get_platform_info(get_machine_info())
+    platform_path = "/".join([PLATFORM_ROOT_PATH, platform_name])
+    try:
+        module_file = "/".join([platform_path, PLATFORM_SPECIFIC_MODULE_NAME + ".py"])
+        module = importlib.machinery.SourceFileLoader(PLATFORM_SPECIFIC_MODULE_NAME, module_file).load_module()
+    except IOError:
+        return -1
+    try:
+        platform_status_class = getattr(module, PLATFORM_SPECIFIC_CLASS_NAME)
+    except AttributeError:
+        return -2
+    return 0
+
+
+def printerr(msg):
+    print("\033[0;31m%s\033[0m" % msg)
+
+
+def print_console(msg):
+    print(msg)
+
+
+val_t = load_platform_monitor()
+if val_t != 0:
+    raise Exception("load monitor.py error")
+
+
+def print_platform():
+    platform_info = get_platform_name()
+    print_console(platform_info)
+    print_console("")
+
+
+def print_cputemp_sensors():
+    val_ret = get_call_value_by_function("getcputemp")
+    print_info_str = ""
+    toptile = "Onboard coretemp Sensors:"
+    formatstr = "    {name:<20} : {temp} C (high = {max} C , crit = {crit} C )"
+
+    if len(val_ret) != 0:
+        print_info_str += toptile + '\n'
+        for item in val_ret:
+            print_info_str += formatstr.format(**item) + '\n'
+        print_console(print_info_str)
+
+
+def print_boardtemp():
+    val_ret = get_call_value_by_function("getTemp")
+    print_info_str = ""
+    toptile = "Onboard Temperature Sensors:"
+    errformat = "    {id:<20} : {errmsg}"
+    formatstr = "    {id:<20} : {temp1_input} C (high = {temp1_max} C, hyst = {temp1_max_hyst} C)"
+
+    if len(val_ret) != 0:
+        print_info_str += toptile + '\n'
+        for item in val_ret:
+            realformat = formatstr if item.get('errcode', 0) == 0 else errformat
+            print_info_str += realformat.format(**item) + '\n'
+        print_console(print_info_str)
+
+
+def print_mactemp_sensors():
+    val_ret = get_call_value_by_function("getmactemp")
+    print_info_str = ""
+    toptile = "Onboard MAC Temperature Sensors:"
+    errformat = "    {id:<20} : {errmsg}"
+    formatstr = "    {id:<20} : {temp_input} C"
+
+    if len(val_ret) != 0:
+        print_info_str += toptile + '\n'
+        for item in val_ret:
+            realformat = formatstr if item.get('errcode', 0) == 0 else errformat
+            print_info_str += realformat.format(**item) + '\n'
+        print_console(print_info_str)
+
+
+def print_macpower_sensors():
+    val_ret = get_call_value_by_function("getmacpower")
+    print_info_str = ""
+    toptile = "Onboard MAC Power Sensors:"
+    errformat = "    {id:<20} : {errmsg}"
+    formatstr = "    {id:<20} : {power_input} W"
+
+    if len(val_ret) != 0:
+        print_info_str += toptile + '\n'
+        for item in val_ret:
+            realformat = formatstr if item.get('errcode', 0) == 0 else errformat
+            print_info_str += realformat.format(**item) + '\n'
+        print_console(print_info_str)
+
+
+def print_fan_sensor():
+    val_ret = get_call_value_by_function("checkFan")
+    print_info_str = ""
+    toptile = "Onboard fan Sensors:"
+    errformat = "    {id} : {errmsg}\n"  # "    {id:<20} : {errmsg}"
+    fan_signle_rotor_format = "    {id} : \n"  \
+        "        fan_type  : {fan_type}\n"  \
+        "        sn        : {sn}\n"  \
+        "        hw_version: {hw_version}\n"  \
+        "        Speed     : {Speed} RPM\n"     \
+        "        status    : {errmsg} \n"
+    fan_double_rotor_format = "    {id} : \n"  \
+        "        fan_type  : {fan_type}\n"  \
+        "        sn        : {sn}\n"  \
+        "        hw_version: {hw_version}\n"  \
+        "        Speed     :\n"     \
+        "            speed_front : {rotor1_speed:<5} RPM\n"     \
+        "            speed_rear  : {rotor2_speed:<5} RPM\n"     \
+        "        status    : {errmsg} \n"
+
+    if len(val_ret) != 0:
+        print_info_str += toptile + '\n'
+        for item in val_ret:
+            if item.get('Speed', None) is None:
+                realformat = fan_double_rotor_format if item.get('errcode', 0) == 0 else errformat
+            else:
+                realformat = fan_signle_rotor_format if item.get('errcode', 0) == 0 else errformat
+            print_info_str += realformat.format(**item)
+        print_console(print_info_str)
+
+
+def print_psu_sensor():
+    val_ret = get_call_value_by_function("getPsu")
+    print_info_str = ""
+    toptile = "Onboard Power Supply Unit Sensors:"
+    errformat = "    {id} : {errmsg}\n"  # "    {id:<20} : {errmsg}"
+    psuformat = "    {id} : \n"  \
+                "        type       : {type1}\n"  \
+                "        sn         : {sn}\n"  \
+                "        in_current : {in_current} A\n"  \
+                "        in_voltage : {in_voltage} V\n"     \
+                "        out_current: {out_current} A\n"     \
+                "        out_voltage: {out_voltage} V\n"     \
+                "        temp       : {temp} C        \n"     \
+                "        fan_speed  : {fan_speed} RPM\n"     \
+                "        in_power   : {in_power} W\n"        \
+                "        out_power  : {out_power} W\n"
+
+    if len(val_ret) != 0:
+        print_info_str += toptile + '\r\n'
+        for item in val_ret:
+            realformat = psuformat if item.get('errcode', 0) == 0 else errformat
+            print_info_str += realformat.format(**item)
+        print_console(print_info_str)
+
+def print_cust_psu_sensor():
+    val_ret = get_call_value_by_function("getCustPsu")
+    print_info_str = ""
+    toptile = "Onboard Power Supply Unit Sensors:"
+    errformat = "    {id} : {errmsg}\n"  # "    {id:<20} : {errmsg}"
+    psuformat = "    {id} : \n"  \
+                "        Model      : {type1}\n"  \
+                "        Serial     : {sn}\n"  \
+                "        HW Rev     : {hw_version}\n" \
+                "        Status     : {errmsg}\n"
+
+    if len(val_ret) != 0:
+        print_info_str += toptile + '\r\n'
+        for item in val_ret:
+            realformat = psuformat if item.get('errcode', 0) == 0 else errformat
+            print_info_str += realformat.format(**item)
+        print_console(print_info_str)
+
+
+def print_slot_sensor():
+    val_ret = get_call_value_by_function("checkSlot")
+    print_info_str = ""
+    toptile = "Onboard slot Sensors:"
+    errformat = "    {id} : {errmsg}\n"  # "    {id:<20} : {errmsg}"
+    psuformat = "    {id} : \n"  \
+                "        slot_type  : {slot_type}\n"  \
+                "        sn         : {sn}\n"  \
+                "        hw_version : {hw_version} \n"  \
+                "        status     : {errmsg}\n"
+
+    if len(val_ret) != 0:
+        print_info_str += toptile + '\r\n'
+        for item in val_ret:
+            realformat = psuformat if item.get('errcode', 0) == 0 else errformat
+            print_info_str += realformat.format(**item)
+        print_console(print_info_str)
+
+
+def print_boarddcdc():
+    val_ret = get_call_value_by_function("getDcdc")
+    print_info_str = ""
+    toptile = "Onboard DCDC Sensors:"
+    errformat = "    {id:<26} : {errmsg}"
+    ok_formatstr = "    {id:<26} : {dcdc_input:<6} {dcdc_unit:<1} (Min = {dcdc_min:<6} {dcdc_unit:<1}, Max = {dcdc_max:<6} {dcdc_unit:<1})"
+    nok_formatstr = "    {id:<26} : {dcdc_input:<6} {dcdc_unit:<1} (Min = {dcdc_min:<6} {dcdc_unit:<1}, Max = {dcdc_max:<6} {dcdc_unit:<1}) ({dcdc_status:<6})"
+
+    if len(val_ret) != 0:
+        print_info_str += toptile + '\n'
+        for item in val_ret:
+            if item.get('errcode', 0) == 0:
+                if float(item["dcdc_input"]) > float(item["dcdc_max"]) or float(item["dcdc_input"]) < float(item["dcdc_min"]):
+                    item["dcdc_status"] = "NOT OK"
+                    realformat = nok_formatstr
+                else:
+                    realformat = ok_formatstr
+            else:
+                realformat = errformat
+            print_info_str += realformat.format(**item) + '\n'
+        print_console(print_info_str)
+
+
+def get_call_value_by_function(function_name):
+    valtemp = []
+    if hasattr(platform_status_class, function_name):
+        test2_func = getattr(platform_status_class, function_name)
+        test2_func(valtemp)
+    return valtemp
+
+
+def getsensors():
+    print_platform()
+    print_cputemp_sensors()
+    print_boardtemp()
+    print_mactemp_sensors()
+    print_macpower_sensors()
+    print_fan_sensor()
+    print_psu_sensor()
+    print_cust_psu_sensor()
+    print_slot_sensor()
+    print_boarddcdc()
+
+
+if __name__ == "__main__":
+    if os.geteuid() != 0:
+        print("Root privileges are required for this operation")
+        sys.exit(1)
+    getsensors()
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/platform_test.py b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_test.py
new file mode 100755
index 000000000..da7119a9c
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_test.py
@@ -0,0 +1,142 @@
+#!/usr/bin/env python3
+# -*- coding: UTF-8 -*-
+
+try:
+    import click
+    from platform_intf import platform_reg_read, platform_reg_write, platform_get_optoe_type
+    from platform_intf import platform_set_optoe_type, platform_sfp_read, platform_sfp_write
+except ImportError as error:
+    raise ImportError('%s - required module not found' % str(error)) from error
+
+
+CONTEXT_SETTINGS = {"help_option_names": ['-h', '--help']}
+
+
+class AliasedGroup(click.Group):
+    def get_command(self, ctx, cmd_name):
+        rv = click.Group.get_command(self, ctx, cmd_name)
+        if rv is not None:
+            return rv
+        matches = [x for x in self.list_commands(ctx)
+                   if x.startswith(cmd_name)]
+        if not matches:
+            return None
+        if len(matches) == 1:
+            return click.Group.get_command(self, ctx, matches[0])
+        ctx.fail('Too many matches: %s' % ', '.join(sorted(matches)))
+        return None
+
+
+def print_reg(info, offset):
+    try:
+        size = len(info)
+        j = offset % 16
+        tmp = j
+        offset -= j
+        print_buf = "\n            "
+
+        for i in range(16):
+            print_buf = print_buf + "%2x " % i
+        print(print_buf)
+
+        print_buf = None
+        for i in range(size + j):
+            if i % 16 == 0:
+                print_buf = ""
+                print_buf = "0x%08x  " % offset
+                offset = offset + 16
+            if tmp:
+                print_buf = print_buf + "   "
+                tmp = tmp - 1
+            else:
+                print_buf = print_buf + "%02x " % info[i - j]
+            if (i + 1) % 16 == 0 or i == size + j - 1:
+                print(print_buf)
+    except Exception as e:
+        msg = str(e)
+        print("i = %d, j = %d," % (i, j))
+        print(msg)
+
+
+@click.group(cls=AliasedGroup, context_settings=CONTEXT_SETTINGS)
+def main():
+    '''platform_test main'''
+
+
+@main.command()
+@click.argument('dev_type', required=True)
+@click.argument('dev_id', required=True)
+@click.argument('offset', required=True)
+@click.argument('size', required=True)
+def reg_rd(dev_type, dev_id, offset, size):
+    '''read cpld/fpga reg'''
+    ret, info = platform_reg_read(int(dev_type), int(dev_id), int(offset), int(size))
+    print(ret)
+    if ret is True:
+        print_reg(info, int(offset))
+    else:
+        print(info)
+
+
+@main.command()
+@click.argument('dev_type', required=True)
+@click.argument('dev_id', required=True)
+@click.argument('offset', required=True)
+@click.argument('value', required=True)
+def reg_wr(dev_type, dev_id, offset, value):
+    '''write cpld/fpga reg'''
+    value_list = []
+    value_list.append(int(value))
+    ret, info = platform_reg_write(int(dev_type), int(dev_id), int(offset), value_list)
+    print(ret)
+    print(info)
+
+
+@main.command()
+@click.argument('port', required=True)
+def get_optoe_type(port):
+    '''get optoe type'''
+    ret, info = platform_get_optoe_type(int(port))
+    print(ret)
+    print(info)
+
+
+@main.command()
+@click.argument('port', required=True)
+@click.argument('optoe_type', required=True)
+def set_optoe_type(port, optoe_type):
+    '''set optoe type'''
+    ret, info = platform_set_optoe_type(int(port), int(optoe_type))
+    print(ret)
+    print(info)
+
+
+@main.command()
+@click.argument('port_id', required=True)
+@click.argument('offset', required=True)
+@click.argument('size', required=True)
+def sfp_rd(port_id, offset, size):
+    '''read sfp'''
+    ret, info = platform_sfp_read(int(port_id), int(offset), int(size))
+    print(ret)
+    if ret is True:
+        print_reg(info, int(offset))
+    else:
+        print(info)
+
+
+@main.command()
+@click.argument('port_id', required=True)
+@click.argument('offset', required=True)
+@click.argument('value', required=True)
+def sfp_wr(port_id, offset, value):
+    '''write sfp'''
+    value_list = []
+    value_list.append(int(value))
+    ret, info = platform_sfp_write(int(port_id), int(offset), value_list)
+    print(ret)
+    print(info)
+
+
+if __name__ == '__main__':
+    main()
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/platform_util.py b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_util.py
new file mode 100755
index 000000000..fe4d564ad
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_util.py
@@ -0,0 +1,838 @@
+#!/usr/bin/python3
+
+import sys
+import os
+import re
+import subprocess
+import shlex
+import time
+import mmap
+import glob
+import logging.handlers
+import shutil
+import gzip
+import ast
+
+
+CONFIG_DB_PATH = "/etc/sonic/config_db.json"
+MAILBOX_DIR = "/sys/bus/i2c/devices/"
+
+
+__all__ = [
+    "strtoint",
+    "byteTostr",
+    "getplatform_name",
+    "wbi2cget",
+    "wbi2cset",
+    "wbpcird",
+    "wbpciwr",
+    "wbi2cgetWord",
+    "wbi2csetWord",
+    "wbi2cset_pec",
+    "wbi2cset_wordpec",
+    "wbsysset",
+    "dev_file_read",
+    "dev_file_write",
+    "wb_os_system",
+    "io_rd",
+    "io_wr",
+    "exec_os_cmd",
+    "exec_os_cmd_log",
+    "write_sysfs",
+    "read_sysfs",
+    "get_sysfs_value",
+    "write_sysfs_value",
+    "get_value",
+    "set_value",
+    "getSdkReg",
+    "getMacTemp",
+    "getMacTemp_sysfs",
+    "get_format_value"
+]
+
+class CodeVisitor(ast.NodeVisitor):
+
+    def __init__(self):
+        self.value = None
+
+    def get_value(self):
+        return self.value
+
+    def get_op_value(self, node):
+        if isinstance(node, ast.Call):       # node is func call
+            value = self.visit_Call(node)
+        elif isinstance(node, ast.BinOp):    # node is BinOp
+            value = self.visit_BinOp(node)
+        elif isinstance(node, ast.UnaryOp):  # node is UnaryOp
+            value = self.visit_UnaryOp(node)
+        elif isinstance(node, ast.Num):      # node is Num Constant
+            value = node.n
+        elif isinstance(node, ast.Str):      # node is Str Constant
+            value = node.s
+        else:
+            raise NotImplementedError("Unsupport operand type: %s" % type(node))
+        return value
+
+    def visit_UnaryOp(self, node):
+        '''
+        node.op: operand type, only support ast.UAdd/ast.USub
+        node.operand: only support ast.Call/ast.Constant(ast.Num/ast.Str)/ast.BinOp/ast.UnaryOp
+        '''
+
+        operand_value = self.get_op_value(node.operand)
+        if isinstance(node.op, ast.UAdd):
+            self.value = operand_value
+        elif isinstance(node.op, ast.USub):
+            self.value = 0 - operand_value
+        else:
+            raise NotImplementedError("Unsupport arithmetic methods %s" % type(node.op))
+        return self.value
+
+    def visit_BinOp(self, node):
+        '''
+        node.left: left operand,  only support ast.Call/ast.Constant(ast.Num)/ast.BinOp
+        node.op: operand type, only support ast.Add/ast.Sub/ast.Mult/ast.Div
+        node.right: right operan, only support ast.Call/ast.Constant(ast.Num/ast.Str)/ast.BinOp
+        '''
+        left_value = self.get_op_value(node.left)
+        right_value = self.get_op_value(node.right)
+
+        if isinstance(node.op, ast.Add):
+            self.value = left_value + right_value
+        elif isinstance(node.op, ast.Sub):
+            self.value = left_value - right_value
+        elif isinstance(node.op, ast.Mult):
+            self.value = left_value * right_value
+        elif isinstance(node.op, ast.Div):
+            self.value = left_value / right_value
+        else:
+            raise NotImplementedError("Unsupport arithmetic methods %s" % type(node.op))
+        return self.value
+
+    def visit_Call(self, node):
+        '''
+        node.func.id: func name, only support 'float', 'int', 'str'
+        node.args: func args list,only support ast.Constant(ast.Num/ast.Str)/ast.BinOp/ast.Call
+        str/float only support one parameter, eg: float(XXX), str(xxx)
+        int support one or two parameters, eg: int(xxx) or int(xxx, 16)
+        xxx can be ast.Call/ast.Constant(ast.Num/ast.Str)/ast.BinOp
+        '''
+        calc_tuple = ("float", "int", "str")
+
+        if node.func.id not in calc_tuple:
+            raise NotImplementedError("Unsupport function call type: %s" % node.func.id)
+
+        args_val_list = []
+        for item in node.args:
+            ret = self.get_op_value(item)
+            args_val_list.append(ret)
+
+        if node.func.id == "str":
+            if len(args_val_list) != 1:
+                raise TypeError("str() takes 1 positional argument but %s were given" % len(args_val_list))
+            value = str(args_val_list[0])
+            self.value = value
+            return value
+
+        if node.func.id == "float":
+            if len(args_val_list) != 1:
+                raise TypeError("float() takes 1 positional argument but %s were given" % len(args_val_list))
+            value = float(args_val_list[0])
+            self.value = value
+            return value
+        # int
+        if len(args_val_list) == 1:
+            value = int(args_val_list[0])
+            self.value = value
+            return value
+        if len(args_val_list) == 2:
+            value = int(args_val_list[0], args_val_list[1])
+            self.value = value
+            return value
+        raise TypeError("int() takes 1 or 2 arguments (%s given)" % len(args_val_list))
+
+def inttostr(vl, length):
+    if not isinstance(vl, int):
+        raise Exception(" type error")
+    index = 0
+    ret_t = ""
+    while index < length:
+        ret = 0xff & (vl >> index * 8)
+        ret_t += chr(ret)
+        index += 1
+    return ret_t
+
+
+def strtoint(str_tmp):
+    value = 0
+    rest_v = str_tmp.replace("0X", "").replace("0x", "")
+    str_len = len(rest_v)
+    for index, val in enumerate(rest_v):
+        value |= int(val, 16) << ((str_len - index - 1) * 4)
+    return value
+
+
+def inttobytes(val, length):
+    if not isinstance(val, int):
+        raise Exception("type error")
+    data_array = bytearray()
+    index = 0
+    while index < length:
+        ret = 0xff & (val >> index * 8)
+        data_array.append(ret)
+        index += 1
+    return data_array
+
+
+def byteTostr(val):
+    strtmp = ''
+    for value in val:
+        strtmp += chr(value)
+    return strtmp
+
+
+def typeTostr(val):
+    strtmp = ''
+    if isinstance(val, bytes):
+        strtmp = byteTostr(val)
+    return strtmp
+
+
+def getonieplatform(path):
+    if not os.path.isfile(path):
+        return ""
+    machine_vars = {}
+    with open(path) as machine_file:
+        for line in machine_file:
+            tokens = line.split('=')
+            if len(tokens) < 2:
+                continue
+            machine_vars[tokens[0]] = tokens[1].strip()
+    return machine_vars.get("onie_platform")
+
+
+def getplatform_config_db():
+    if not os.path.isfile(CONFIG_DB_PATH):
+        return ""
+    val = subprocess.check_output(["sonic-cfggen", "-j", CONFIG_DB_PATH, "-v", "DEVICE_METADATA.localhost.platform"]).decode().strip()
+    if len(val) <= 0:
+        return ""
+    return val
+
+
+def getplatform_name():
+    if os.path.isfile('/host/machine.conf'):
+        return getonieplatform('/host/machine.conf')
+    if os.path.isfile('/etc/sonic/machine.conf'):
+        return getonieplatform('/etc/sonic/machine.conf')
+    return getplatform_config_db()
+
+
+def wbi2cget(bus, devno, address, word=None):
+    if word is None:
+        command_line = "i2cget -f -y %d 0x%02x 0x%02x " % (bus, devno, address)
+    else:
+        command_line = "i2cget -f -y %d 0x%02x 0x%02x %s" % (bus, devno, address, word)
+    retrytime = 6
+    ret_t = ""
+    for i in range(retrytime):
+        ret, ret_t = wb_os_system(command_line)
+        if ret == 0:
+            return True, ret_t
+        time.sleep(0.1)
+    return False, ret_t
+
+
+def wbi2cset(bus, devno, address, byte):
+    command_line = "i2cset -f -y %d 0x%02x 0x%02x 0x%02x" % (
+        bus, devno, address, byte)
+    retrytime = 6
+    ret_t = ""
+    for i in range(retrytime):
+        ret, ret_t = wb_os_system(command_line)
+        if ret == 0:
+            return True, ret_t
+    return False, ret_t
+
+
+def wbpcird(pcibus, slot, fn, resource, offset):
+    '''read pci register'''
+    if offset % 4 != 0:
+        return "ERR offset: %d not 4 bytes align"
+    filename = "/sys/bus/pci/devices/0000:%02x:%02x.%x/resource%d" % (int(pcibus), int(slot), int(fn), int(resource))
+    with open(filename, "r+") as file:
+        size = os.path.getsize(filename)
+        data = mmap.mmap(file.fileno(), size)
+        result = data[offset: offset + 4]
+        s = result[::-1]
+        val = 0
+        for value in s:
+            val = val << 8 | value
+        data.close()
+    return "0x%08x" % val
+
+
+def wbpciwr(pcibus, slot, fn, resource, offset, data):
+    '''write pci register'''
+    ret = inttobytes(data, 4)
+    filename = "/sys/bus/pci/devices/0000:%02x:%02x.%x/resource%d" % (int(pcibus), int(slot), int(fn), int(resource))
+    with open(filename, "r+") as file:
+        size = os.path.getsize(filename)
+        data = mmap.mmap(file.fileno(), size)
+        data[offset: offset + 4] = ret
+        result = data[offset: offset + 4]
+        s = result[::-1]
+        val = 0
+        for value in s:
+            val = val << 8 | value
+        data.close()
+
+
+def wbi2cgetWord(bus, devno, address):
+    command_line = "i2cget -f -y %d 0x%02x 0x%02x w" % (bus, devno, address)
+    retrytime = 3
+    ret_t = ""
+    for i in range(retrytime):
+        ret, ret_t = wb_os_system(command_line)
+        if ret == 0:
+            return True, ret_t
+    return False, ret_t
+
+
+def wbi2csetWord(bus, devno, address, byte):
+    command_line = "i2cset -f -y %d 0x%02x 0x%02x 0x%x w" % (
+        bus, devno, address, byte)
+    retrytime = 6
+    ret_t = ""
+    for i in range(retrytime):
+        ret, ret_t = wb_os_system(command_line)
+        if ret == 0:
+            return True, ret_t
+    return False, ret_t
+
+
+def wbi2cset_pec(bus, devno, address, byte):
+    command_line = "i2cset -f -y %d 0x%02x 0x%02x 0x%02x bp" % (
+        bus, devno, address, byte)
+    retrytime = 6
+    ret_t = ""
+    for i in range(retrytime):
+        ret, ret_t = wb_os_system(command_line)
+        if ret == 0:
+            return True, ret_t
+    return False, ret_t
+
+
+def wbi2cset_wordpec(bus, devno, address, byte):
+    command_line = "i2cset -f -y %d 0x%02x 0x%02x 0x%02x wp" % (
+        bus, devno, address, byte)
+    retrytime = 6
+    ret_t = ""
+    for i in range(retrytime):
+        ret, ret_t = wb_os_system(command_line)
+        if ret == 0:
+            return True, ret_t
+    return False, ret_t
+
+
+def wbsysset(location, value):
+    command_line = "echo 0x%02x > %s" % (value, location)
+    retrytime = 6
+    ret_t = ""
+    for i in range(retrytime):
+        ret, ret_t = wb_os_system(command_line)
+        if ret == 0:
+            return True, ret_t
+    return False, ret_t
+
+
+def dev_file_read(path, offset, read_len):
+    val_list = []
+    msg = ""
+    ret = ""
+    fd = -1
+
+    if not os.path.exists(path):
+        msg = path + " not found !"
+        return False, msg
+
+    try:
+        fd = os.open(path, os.O_RDONLY)
+        os.lseek(fd, offset, os.SEEK_SET)
+        ret = os.read(fd, read_len)
+        for item in ret:
+            val_list.append(item)
+    except Exception as e:
+        msg = str(e)
+        return False, msg
+    finally:
+        if fd > 0:
+            os.close(fd)
+    return True, val_list
+
+
+def dev_file_write(path, offset, buf_list):
+    msg = ""
+    fd = -1
+
+    if not isinstance(buf_list, list) or len(buf_list) == 0:
+        msg = "buf:%s is not list type or is NONE !" % buf_list
+        return False, msg
+
+    if not os.path.exists(path):
+        msg = path + " not found !"
+        return False, msg
+
+    try:
+        fd = os.open(path, os.O_WRONLY)
+        os.lseek(fd, offset, os.SEEK_SET)
+        ret = os.write(fd, bytes(buf_list))
+    except Exception as e:
+        msg = str(e)
+        return False, msg
+    finally:
+        if fd > 0:
+            os.close(fd)
+
+    return True, ret
+
+
+def wb_os_system(cmd):
+    status, output = subprocess.getstatusoutput(cmd)
+    return status, output
+
+
+def io_rd(reg_addr, read_len=1):
+    try:
+        regaddr = 0
+        if isinstance(reg_addr, int):
+            regaddr = reg_addr
+        else:
+            regaddr = int(reg_addr, 16)
+        devfile = "/dev/port"
+        fd = os.open(devfile, os.O_RDWR | os.O_CREAT)
+        os.lseek(fd, regaddr, os.SEEK_SET)
+        val = os.read(fd, read_len)
+        return "".join(["%02x" % item for item in val])
+    except ValueError:
+        return None
+    except Exception as e:
+        print(e)
+        return None
+    finally:
+        os.close(fd)
+
+
+def io_wr(reg_addr, reg_data):
+    try:
+        regdata = 0
+        regaddr = 0
+        if isinstance(reg_addr, int):
+            regaddr = reg_addr
+        else:
+            regaddr = int(reg_addr, 16)
+        if isinstance(reg_data, int):
+            regdata = reg_data
+        else:
+            regdata = int(reg_data, 16)
+        devfile = "/dev/port"
+        fd = os.open(devfile, os.O_RDWR | os.O_CREAT)
+        os.lseek(fd, regaddr, os.SEEK_SET)
+        os.write(fd, regdata.to_bytes(1, 'little'))
+        return True
+    except ValueError as e:
+        print(e)
+        return False
+    except Exception as e:
+        print(e)
+        return False
+    finally:
+        os.close(fd)
+
+
+def exec_os_cmd(cmd):
+    status, output = subprocess.getstatusoutput(cmd)
+    return status, output
+
+
+def exec_os_cmd_log(cmd):
+    proc = subprocess.Popen(shlex.split(cmd), stdin=subprocess.PIPE, shell=False, stderr=sys.stderr, close_fds=True,
+                            stdout=sys.stdout, universal_newlines=True, bufsize=1)
+    proc.wait()
+    stdout = proc.communicate()[0]
+    stdout = typeTostr(stdout)
+    return proc.returncode, stdout
+
+
+def write_sysfs(location, value):
+    try:
+        if not os.path.isfile(location):
+            return False, ("location[%s] not found !" % location)
+        with open(location, 'w') as fd1:
+            fd1.write(value)
+    except Exception as e:
+        return False, (str(e) + " location[%s]" % location)
+    return True, ("set location[%s] %s success !" % (location, value))
+
+
+def read_sysfs(location):
+    try:
+        locations = glob.glob(location)
+        with open(locations[0], 'rb') as fd1:
+            retval = fd1.read()
+        retval = typeTostr(retval)
+        retval = retval.rstrip('\r\n')
+        retval = retval.lstrip(" ")
+    except Exception as e:
+        return False, (str(e) + "location[%s]" % location)
+    return True, retval
+
+
+def get_pmc_register(reg_name):
+    retval = 'ERR'
+    mb_reg_file = MAILBOX_DIR + reg_name
+    filepath = glob.glob(mb_reg_file)
+    if len(filepath) == 0:
+        return "%s %s  notfound" % (retval, mb_reg_file)
+    mb_reg_file = filepath[0]
+    if not os.path.isfile(mb_reg_file):
+        return "%s %s  notfound" % (retval, mb_reg_file)
+    try:
+        with open(mb_reg_file, 'r') as fd:
+            retval = fd.read()
+    except Exception as error:
+        retval = retval + str(error)
+    retval = retval.rstrip('\r\n')
+    retval = retval.lstrip(" ")
+    return retval
+
+
+def get_sysfs_value(location):
+    pos_t = str(location)
+    name = get_pmc_register(pos_t)
+    return name
+
+
+def write_sysfs_value(reg_name, value):
+    fileLoc = MAILBOX_DIR + reg_name
+    try:
+        if not os.path.isfile(fileLoc):
+            print(fileLoc, 'not found !')
+            return False
+        with open(fileLoc, 'w') as fd:
+            fd.write(value)
+    except Exception:
+        print("Unable to open " + fileLoc + "file !")
+        return False
+    return True
+
+
+def get_value_once(config):
+    try:
+        way = config.get("gettype")
+        int_decode = config.get("int_decode", 16)
+        if way == 'sysfs':
+            loc = config.get("loc")
+            ret, val = read_sysfs(loc)
+            if ret is True:
+                return True, int(val, int_decode)
+            return False, ("sysfs read %s failed. log:%s" % (loc, val))
+        if way == "i2c":
+            bus = config.get("bus")
+            addr = config.get("loc")
+            offset = config.get("offset", 0)
+            ret, val = wbi2cget(bus, addr, offset)
+            if ret is True:
+                return True, int(val, int_decode)
+            return False, ("i2c read failed. bus:%d , addr:0x%x, offset:0x%x" % (bus, addr, offset))
+        if way == "io":
+            io_addr = config.get('io_addr')
+            val = io_rd(io_addr)
+            if len(val) != 0:
+                return True, int(val, int_decode)
+            return False, ("io_addr read 0x%x failed" % io_addr)
+        if way == "i2cword":
+            bus = config.get("bus")
+            addr = config.get("loc")
+            offset = config.get("offset")
+            ret, val = wbi2cgetWord(bus, addr, offset)
+            if ret is True:
+                return True, int(val, int_decode)
+            return False, ("i2cword read failed. bus:%d, addr:0x%x, offset:0x%x" % (bus, addr, offset))
+        if way == "devfile":
+            path = config.get("path")
+            offset = config.get("offset")
+            read_len = config.get("read_len")
+            ret, val_list = dev_file_read(path, offset, read_len)
+            if ret is True:
+                return True, val_list
+            return False, ("devfile read failed. path:%s, offset:0x%x, read_len:%d" % (path, offset, read_len))
+        if way == 'cmd':
+            cmd = config.get("cmd")
+            ret, val = exec_os_cmd(cmd)
+            if ret:
+                return False, ("cmd read exec %s failed, log: %s" % (cmd, val))
+            return True, int(val, int_decode)
+        if way == 'file_exist':
+            judge_file = config.get('judge_file', None)
+            if os.path.exists(judge_file):
+                return True, True
+            return True, False
+        return False, "not support read type"
+    except Exception as e:
+        return False, ("get_value_once exception:%s happen" % str(e))
+
+
+def set_value_once(config):
+    try:
+        delay_time = config.get("delay", None)
+        if delay_time is not None:
+            time.sleep(delay_time)
+
+        way = config.get("gettype")
+        if way == 'sysfs':
+            loc = config.get("loc")
+            value = config.get("value")
+            mask = config.get("mask", 0xff)
+            mask_tuple = (0xff, 0)
+            if mask not in mask_tuple:
+                ret, read_value = read_sysfs(loc)
+                if ret is True:
+                    read_value = int(read_value, base=16)
+                    value = (read_value & mask) | value
+                else:
+                    return False, ("sysfs read %s failed. log:%s" % (loc, read_value))
+            ret, log = write_sysfs(loc, "0x%02x" % value)
+            if ret is not True:
+                return False, ("sysfs %s write 0x%x failed" % (loc, value))
+            return True, ("sysfs write 0x%x success" % value)
+        if way == "i2c":
+            bus = config.get("bus")
+            addr = config.get("loc")
+            offset = config.get("offset")
+            value = config.get("value")
+            mask = config.get("mask", 0xff)
+            mask_tuple = (0xff, 0)
+            if mask not in mask_tuple:
+                ret, read_value = wbi2cget(bus, addr, offset)
+                if ret is True:
+                    read_value = int(read_value, base=16)
+                    value = (read_value & mask) | value
+                else:
+                    return False, ("i2c read failed. bus:%d , addr:0x%x, offset:0x%x" % (bus, addr, offset))
+            ret, log = wbi2cset(bus, addr, offset, value)
+            if ret is not True:
+                return False, ("i2c write bus:%d, addr:0x%x, offset:0x%x, value:0x%x failed" %
+                               (bus, addr, offset, value))
+            return True, ("i2c write bus:%d, addr:0x%x, offset:0x%x, value:0x%x success" %
+                          (bus, addr, offset, value))
+        if way == "io":
+            io_addr = config.get('io_addr')
+            value = config.get('value')
+            mask = config.get("mask", 0xff)
+            mask_tuple = (0xff, 0)
+            if mask not in mask_tuple:
+                read_value = io_rd(io_addr)
+                if read_value is None:
+                    return False, ("io_addr 0x%x read failed" % (io_addr))
+                read_value = int(read_value, base=16)
+                value = (read_value & mask) | value
+            ret = io_wr(io_addr, value)
+            if ret is not True:
+                return False, ("io_addr 0x%x write 0x%x failed" % (io_addr, value))
+            return True, ("io_addr 0x%x write 0x%x success" % (io_addr, value))
+        if way == 'i2cword':
+            bus = config.get("bus")
+            addr = config.get("loc")
+            offset = config.get("offset")
+            value = config.get("value")
+            mask = config.get("mask", 0xff)
+            mask_tuple = (0xff, 0)
+            if mask not in mask_tuple:
+                ret, read_value = wbi2cgetWord(bus, addr, offset)
+                if ret is True:
+                    read_value = int(read_value, base=16)
+                    value = (read_value & mask) | value
+                else:
+                    return False, ("i2c read word failed. bus:%d , addr:0x%x, offset:0x%x" % (bus, addr, offset))
+            ret, log = wbi2csetWord(bus, addr, offset, value)
+            if ret is not True:
+                return False, ("i2cword write bus:%d, addr:0x%x, offset:0x%x, value:0x%x failed" %
+                               (bus, addr, offset, value))
+            return True, ("i2cword write bus:%d, addr:0x%x, offset:0x%x, value:0x%x success" %
+                          (bus, addr, offset, value))
+        if way == "devfile":
+            path = config.get("path")
+            offset = config.get("offset")
+            buf_list = config.get("value")
+            ret, log = dev_file_write(path, offset, buf_list)
+            if ret is True:
+                return True, ("devfile write path:%s, offset:0x%x, buf_list:%s success." % (path, offset, buf_list))
+            return False, ("devfile read  path:%s, offset:0x%x, buf_list:%s failed.log:%s" %
+                           (path, offset, buf_list, log))
+        if way == 'cmd':
+            cmd = config.get("cmd")
+            ret, log = exec_os_cmd(cmd)
+            if ret:
+                return False, ("cmd write exec %s failed, log: %s" % (cmd, log))
+            return True, ("cmd write exec %s success" % cmd)
+        if way == 'bit_wr':
+            mask = config.get("mask")
+            bit_val = config.get("value")
+            val_config = config.get("val_config")
+            ret, rd_value = get_value_once(val_config)
+            if ret is False:
+                return False, ("bit_wr read failed, log: %s" % rd_value)
+            wr_val = (rd_value & mask) | bit_val
+            val_config["value"] = wr_val
+            ret, log = set_value_once(val_config)
+            if ret is False:
+                return False, ("bit_wr failed, log: %s" % log)
+            return True, ("bit_wr success, log: %s" % log)
+        if way == 'creat_file':
+            file_name = config.get("file")
+            ret, log = exec_os_cmd("touch %s" % file_name)
+            if ret:
+                return False, ("creat file %s failed, log: %s" % (file_name, log))
+            exec_os_cmd("sync")
+            return True, ("creat file %s success" % file_name)
+        if way == 'remove_file':
+            file_name = config.get("file")
+            ret, log = exec_os_cmd("rm -rf %s" % file_name)
+            if ret:
+                return False, ("remove file %s failed, log: %s" % (file_name, log))
+            exec_os_cmd("sync")
+            return True, ("remove file %s success" % file_name)
+        return False, "not support write type"
+    except Exception as e:
+        return False, ("set_value_once exception:%s happen" % str(e))
+
+
+def get_value(config):
+    retrytime = 6
+    for i in range(retrytime):
+        ret, val = get_value_once(config)
+        if ret is True:
+            return True, val
+        time.sleep(0.1)
+    return False, val
+
+
+def set_value(config):
+    retrytime = 6
+    ignore_result_flag = config.get("ignore_result", 0)
+    for i in range(retrytime):
+        ret, log = set_value_once(config)
+        if ret is True:
+            return True, log
+        if ignore_result_flag == 1:
+            return True, log
+        time.sleep(0.1)
+    return False, log
+
+
+class CompressedRotatingFileHandler(logging.handlers.RotatingFileHandler):
+    def doRollover(self):
+        """
+        Do a rollover, as described in __init__().
+        """
+        if self.stream:
+            self.stream.close()
+            self.stream = None
+        if self.backupCount > 0:
+            for i in range(self.backupCount - 1, 0, -1):
+                sfn = "%s.%d.gz" % (self.baseFilename, i)
+                dfn = "%s.%d.gz" % (self.baseFilename, i + 1)
+                if os.path.exists(sfn):
+                    if os.path.exists(dfn):
+                        os.remove(dfn)
+                    os.rename(sfn, dfn)
+            dfn = self.baseFilename + ".1.gz"
+            if os.path.exists(dfn):
+                os.remove(dfn)
+            # These two lines below are the only new lines. I commented out the os.rename(self.baseFilename, dfn) and
+            #  replaced it with these two lines.
+            with open(self.baseFilename, 'rb') as f_in, gzip.open(dfn, 'wb') as f_out:
+                shutil.copyfileobj(f_in, f_out)
+        self.mode = 'w'
+        self.stream = self._open()
+
+
+def getSdkReg(reg):
+    try:
+        cmd = "bcmcmd -t 1 'getr %s ' < /dev/null" % reg
+        ret, result = wb_os_system(cmd)
+        result_t = result.strip().replace("\r", "").replace("\n", "")
+        if ret != 0 or "Error:" in result_t:
+            return False, result
+        patt = r"%s.(.*):(.*)>drivshell" % reg
+        rt = re.findall(patt, result_t, re.S)
+        test = re.findall("=(.*)", rt[0][0])[0]
+    except Exception:
+        return False, 'getsdk register error'
+    return True, test
+
+
+def getMacTemp():
+    result = {}
+    wb_os_system("bcmcmd -t 1 \"show temp\" < /dev/null")
+    ret, log = wb_os_system("bcmcmd -t 1 \"show temp\" < /dev/null")
+    if ret:
+        return False, result
+    logs = log.splitlines()
+    for line in logs:
+        if "average" in line:
+            b = re.findall(r'\d+.\d+', line)
+            result["average"] = b[0]
+        elif "maximum" in line:
+            b = re.findall(r'\d+.\d+', line)
+            result["maximum"] = b[0]
+    return True, result
+
+
+def getMacTemp_sysfs(mactempconf):
+    temp = -1000000
+    try:
+        temp_list = []
+        mac_temp_loc = mactempconf.get("loc", [])
+        mac_temp_flag = mactempconf.get("flag", None)
+        if mac_temp_flag is not None:
+            gettype = mac_temp_flag.get('gettype')
+            okbit = mac_temp_flag.get('okbit')
+            okval = mac_temp_flag.get('okval')
+            if gettype == "io":
+                io_addr = mac_temp_flag.get('io_addr')
+                val = io_rd(io_addr)
+                if val is None:
+                    raise Exception("get mac_flag by io failed.")
+            else:
+                bus = mac_temp_flag.get('bus')
+                loc = mac_temp_flag.get('loc')
+                offset = mac_temp_flag.get('offset')
+                ind, val = wbi2cget(bus, loc, offset)
+                if ind is not True:
+                    raise Exception("get mac_flag by i2c failed.")
+            val_t = (int(val, 16) & (1 << okbit)) >> okbit
+            if val_t != okval:
+                raise Exception("mac_flag invalid, val_t:%d." % val_t)
+        for loc in mac_temp_loc:
+            temp_s = get_sysfs_value(loc)
+            if isinstance(temp_s, str) and temp_s.startswith("ERR"):
+                raise Exception("get mac temp error. loc:%s" % loc)
+            temp_t = int(temp_s)
+            if temp_t == -1000000:
+                raise Exception("mac temp invalid.loc:%s" % loc)
+            temp_list.append(temp_t)
+        temp_list.sort(reverse=True)
+        temp = temp_list[0]
+    except Exception:
+        return False, temp
+    return True, temp
+
+def get_format_value(format_str):
+    ast_obj = ast.parse(format_str, mode='eval')
+    visitor = CodeVisitor()
+    visitor.visit(ast_obj)
+    ret = visitor.get_value()
+    return ret
+
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/pmon_syslog.py b/platform/broadcom/sonic-platform-modules-micas/common/script/pmon_syslog.py
new file mode 100755
index 000000000..8bdceef8c
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/pmon_syslog.py
@@ -0,0 +1,519 @@
+#!/usr/bin/python3
+#   * onboard interval check
+#   * FAN trays
+#   * PSU
+#   * SFF
+import time
+import syslog
+import traceback
+import glob
+from platform_config import PMON_SYSLOG_STATUS
+
+PMON_DEBUG_FILE = "/etc/.pmon_syslog_debug_flag"
+debuglevel = 0
+PMONERROR = 1
+PMONDEBUG = 2
+
+
+def pmon_debug(s):
+    if PMONDEBUG & debuglevel:
+        syslog.openlog("PMON_SYSLOG", syslog.LOG_PID)
+        syslog.syslog(syslog.LOG_DEBUG, s)
+
+
+def pmon_error(s):
+    if PMONERROR & debuglevel:
+        syslog.openlog("PMON_SYSLOG", syslog.LOG_PID)
+        syslog.syslog(syslog.LOG_ERR, s)
+
+
+def dev_syslog(s):
+    syslog.openlog("PMON_SYSLOG", syslog.LOG_PID)
+    syslog.syslog(syslog.LOG_LOCAL1 | syslog.LOG_NOTICE, s)
+
+
+# status
+STATUS_PRESENT = 'PRESENT'
+STATUS_ABSENT = 'ABSENT'
+STATUS_OK = 'OK'
+STATUS_NOT_OK = 'NOT OK'
+STATUS_FAILED = 'FAILED'
+
+
+class checkBase(object):
+    def __init__(self, path, dev_name, display_name, obj_type, config):
+        self._peroid_syslog = None
+        self._peroid_failed_syslog = None  # exception
+        self._preDevStatus = None
+        self._path = path
+        self._name = dev_name
+        self._display_name = display_name
+        self._type = obj_type
+        self._config = config
+
+    def getCurstatus(self):
+        # get ok/not ok/absent status
+        status, log = self.getPresent()
+        if status == STATUS_PRESENT:
+            # check status
+            property_status, log = self.getStatus()
+            if property_status is not None:
+                status = property_status
+        return status, log
+
+    def getPresent(self):
+        presentFilepath = self.getPath()
+        try:
+            # get ok/not ok/absent status
+            presentConfig = self._config["present"]
+            mask = presentConfig.get("mask", 0xff)
+            absent_val = presentConfig.get("ABSENT", None)
+            absent_val = absent_val & mask
+            with open(presentFilepath, "r") as fd:
+                retval = fd.read()
+                if int(retval) == absent_val:
+                    return STATUS_ABSENT, None
+                return STATUS_PRESENT, None
+        except Exception as e:
+            return STATUS_FAILED, (str(e) + " location[%s]" % presentFilepath)
+
+    def getStatus(self):
+        if "status" in self._config:
+            statusConfig = self._config["status"]
+            for itemConfig in statusConfig:
+                mask = itemConfig.get("mask", 0xff)
+                ok_val = itemConfig.get("okval", None)
+                ok_val = ok_val & mask
+                Filepath = itemConfig["path"] % self._name
+                try:
+                    with open(Filepath, "r") as fd1:
+                        retval = fd1.read()
+                        if int(retval) != ok_val:
+                            return STATUS_NOT_OK, None
+                except Exception as e:
+                    return STATUS_FAILED, (str(e) + " location[%s]" % Filepath)
+            return STATUS_OK, None
+        return None, None
+
+    def getPath(self):
+        return self._path
+
+    def getName(self):
+        return self._name
+
+    def getType(self):
+        return self._type
+
+    def getDisplayName(self):
+        return self._display_name
+
+    def getnochangedMsgFlag(self):
+        return self._config["nochangedmsgflag"]
+
+    def getnochangedMsgTime(self):
+        return self._config["nochangedmsgtime"]
+
+    def getnoprintFirstTimeFlag(self):
+        return self._config["noprintfirsttimeflag"]
+
+    def checkStatus(self):
+        # syslog msg
+        dev_type = self.getType()
+        display_name = self.getDisplayName()
+        nochangedMsgTime = self.getnochangedMsgTime()
+        getnochangedMsgFlag = self.getnochangedMsgFlag()
+        noprintFirstTimeFlag = self.getnoprintFirstTimeFlag()
+        MSG_IN = '%%PMON-5-' + dev_type + '_PLUG_IN: %s is PRESENT.'
+        MSG_OUT = '%%PMON-5-' + dev_type + '_PLUG_OUT: %s is ABSENT.'
+        MSG_OK = '%%PMON-5-' + dev_type + '_OK: %s is OK.'
+        MSG_NOT_OK = '%%PMON-5-' + dev_type + '_FAILED: %s is NOT OK.'
+        MSG_ABSENT = '%%PMON-5-' + dev_type + '_ABSENT: %s is ABSENT.'
+        MSG_UNKNOWN = '%%PMON-5-' + dev_type + '_UNKNOWN: %s is UNKNOWN.%s'
+        MSG_RECOVER = '%%PMON-5-' + dev_type + '_OK: %s is OK. Recover from ' + dev_type + ' FAILED.'
+
+        curStatus, log = self.getCurstatus()
+        pmon_debug("%s: current status %s" % (display_name, curStatus))
+        pmon_debug("%s: pre status %s" % (display_name, self._preDevStatus))
+        pmon_debug("%s: peroid_syslog %s" % (display_name, self._peroid_syslog))
+
+        if curStatus == STATUS_FAILED:
+            # get status failed
+            if self._peroid_failed_syslog is not None:
+                if getnochangedMsgFlag and time.time() - self._peroid_failed_syslog >= nochangedMsgTime:
+                    # absent as before for some time, notice
+                    dev_syslog(MSG_UNKNOWN % (display_name, log))
+                    self._peroid_failed_syslog = time.time()
+            else:  # first time failed
+                dev_syslog(MSG_UNKNOWN % (display_name, log))
+                self._peroid_failed_syslog = time.time()
+            return
+        self._peroid_failed_syslog = time.time()
+
+        if self._preDevStatus is None:
+            # 1st time
+            if noprintFirstTimeFlag == 1:
+                self._peroid_syslog = time.time()
+            else:
+                if curStatus == STATUS_PRESENT:
+                    # present
+                    dev_syslog(MSG_IN % display_name)
+                elif curStatus == STATUS_OK:
+                    # ok
+                    dev_syslog(MSG_OK % display_name)
+                elif curStatus == STATUS_NOT_OK:
+                    # not ok
+                    dev_syslog(MSG_NOT_OK % display_name)
+                    self._peroid_syslog = time.time()
+                else:
+                    # absent
+                    dev_syslog(MSG_ABSENT % display_name)
+                    self._peroid_syslog = time.time()
+        else:
+            # from 2nd time...
+            if self._preDevStatus == curStatus:
+                # status not changed
+                if self._preDevStatus == STATUS_ABSENT:
+                    if self._peroid_syslog is not None:
+                        if getnochangedMsgFlag and time.time() - self._peroid_syslog >= nochangedMsgTime:
+                            # absent as before for some time, notice
+                            dev_syslog(MSG_ABSENT % display_name)
+                            self._peroid_syslog = time.time()
+                elif self._preDevStatus == STATUS_NOT_OK:
+                    if self._peroid_syslog is not None:
+                        if getnochangedMsgFlag and time.time() - self._peroid_syslog >= nochangedMsgTime:
+                            # not ok as before for some time, notice
+                            dev_syslog(MSG_NOT_OK % display_name)
+                            self._peroid_syslog = time.time()
+            else:
+                # status changed
+                if self._preDevStatus == STATUS_ABSENT:
+                    if curStatus == STATUS_NOT_OK:
+                        # absent -> not ok
+                        dev_syslog(MSG_IN % display_name)
+                        dev_syslog(MSG_NOT_OK % display_name)
+                        self._peroid_syslog = time.time()
+                    elif curStatus == STATUS_OK:
+                        # absent -> ok
+                        dev_syslog(MSG_IN % display_name)
+                        dev_syslog(MSG_OK % display_name)
+                    else:
+                        # absent -> prsent
+                        dev_syslog(MSG_IN % display_name)
+
+                elif self._preDevStatus == STATUS_OK:
+                    if curStatus == STATUS_NOT_OK:
+                        # ok -> not ok
+                        dev_syslog(MSG_NOT_OK % display_name)
+                        self._peroid_syslog = time.time()
+                    elif curStatus == STATUS_ABSENT:
+                        # ok -> absent
+                        dev_syslog(MSG_OUT % display_name)
+                        self._peroid_syslog = time.time()
+                elif self._preDevStatus == STATUS_PRESENT:
+                    # present -> absent
+                    dev_syslog(MSG_OUT % display_name)
+                    self._peroid_syslog = time.time()
+                else:  # not ok
+                    if curStatus == STATUS_OK:
+                        # not ok -> ok
+                        dev_syslog(MSG_RECOVER % display_name)
+                        dev_syslog(MSG_OK % display_name)
+                    else:
+                        # not ok -> absent
+                        dev_syslog(MSG_OUT % display_name)
+                        self._peroid_syslog = time.time()
+        self._preDevStatus = curStatus
+
+
+class checkSfp(checkBase):
+    def __init__(self, path, dev_name, display_name, config):
+        super(checkSfp, self).__init__(path, dev_name, display_name, 'XCVR', config)
+
+    def getPath(self):
+        super(checkSfp, self).getPath()
+        return self._path
+
+    def getName(self):
+        super(checkSfp, self).getName()
+        return self._name
+
+    def getType(self):
+        super(checkSfp, self).getType()
+        return self._type
+
+
+class checkSlot(checkBase):
+    def __init__(self, path, dev_name, display_name, config):
+        super(checkSlot, self).__init__(path, dev_name, display_name, 'SLOT', config)
+
+    def getPath(self):
+        super(checkSlot, self).getPath()
+        return self._path
+
+    def getName(self):
+        super(checkSlot, self).getName()
+        return self._name
+
+    def getType(self):
+        super(checkSlot, self).getType()
+        return self._type
+
+
+class checkPSU(checkBase):
+    def __init__(self, path, dev_name, display_name, config):
+        super(checkPSU, self).__init__(path, dev_name, display_name, 'PSU', config)
+
+    def getPath(self):
+        super(checkPSU, self).getPath()
+        return self._path
+
+    def getName(self):
+        super(checkPSU, self).getName()
+        return self._name
+
+    def getType(self):
+        super(checkPSU, self).getType()
+        return self._type
+
+
+class checkFAN(checkBase):
+    def __init__(self, path, dev_name, display_name, config):
+        super(checkFAN, self).__init__(path, dev_name, display_name, 'FAN', config)
+
+    def getPath(self):
+        super(checkFAN, self).getPath()
+        return self._path
+
+    def getName(self):
+        super(checkFAN, self).getName()
+        return self._name
+
+    def getType(self):
+        super(checkFAN, self).getType()
+        return self._type
+
+
+class platformSyslog():
+    def __init__(self):
+        self.__sfp_checklist = []
+        self.__fan_checklist = []
+        self.__psu_checklist = []
+        self.__slot_checklist = []
+        self.__temp_checklist = []
+        self.temps_peroid_syslog = {}
+        self.normal_status = 0
+        self.warning_status = 1
+        self.critical_status = 2
+        self.poweron_flag = 0
+
+        self.pmon_syslog_config = PMON_SYSLOG_STATUS.copy()
+        self.__pollingtime = self.pmon_syslog_config.get('polling_time', 3)
+
+        tmpconfig = self.pmon_syslog_config.get('sffs', None)
+        if tmpconfig is not None:
+            preset_item = tmpconfig.get("present", {})
+            path = preset_item.get("path", [])
+            for location in path:
+                if '*' not in location:
+                    pmon_error("sff location config error: %s" % location)
+                    continue
+                dev_name_index = 0
+                loc_split_list = location.split('/')
+                for i, item in enumerate(loc_split_list):
+                    if '*' in item:
+                        dev_name_index = i
+                        break
+                locations = glob.glob(location)
+                for dev_path in locations:
+                    dev_name_list = dev_path.split('/')
+                    # explame:get eth1 from /sys_switch/transceiver/eth1/present
+                    dev_name = dev_name_list[dev_name_index]
+                    dev_name_alias = tmpconfig.get("alias", {})
+                    display_name = dev_name_alias.get(dev_name, dev_name)
+                    dev = checkSfp(dev_path, dev_name, display_name, tmpconfig)
+                    self.__sfp_checklist.append(dev)
+
+        tmpconfig = self.pmon_syslog_config.get('fans', None)
+        if tmpconfig is not None:
+            preset_item = tmpconfig.get("present", {})
+            path = preset_item.get("path", [])
+            for location in path:
+                if '*' not in location:
+                    pmon_error("fan location config error: %s" % location)
+                    continue
+                dev_name_index = 0
+                loc_split_list = location.split('/')
+                for i, item in enumerate(loc_split_list):
+                    if '*' in item:
+                        dev_name_index = i
+                        break
+                locations = glob.glob(location)
+                for dev_path in locations:
+                    dev_name_list = dev_path.split('/')
+                    dev_name = dev_name_list[dev_name_index]
+                    dev_name_alias = tmpconfig.get("alias", {})
+                    display_name = dev_name_alias.get(dev_name, dev_name)
+                    dev = checkFAN(dev_path, dev_name, display_name, tmpconfig)
+                    self.__fan_checklist.append(dev)
+
+        tmpconfig = self.pmon_syslog_config.get('psus', None)
+        if tmpconfig is not None:
+            preset_item = tmpconfig.get("present", {})
+            path = preset_item.get("path", [])
+            for location in path:
+                if '*' not in location:
+                    pmon_error("psu location config error: %s" % location)
+                    continue
+                dev_name_index = 0
+                loc_split_list = location.split('/')
+                for i, item in enumerate(loc_split_list):
+                    if '*' in item:
+                        dev_name_index = i
+                        break
+                locations = glob.glob(location)
+                for dev_path in locations:
+                    dev_name_list = dev_path.split('/')
+                    dev_name = dev_name_list[dev_name_index]
+                    dev_name_alias = tmpconfig.get("alias", {})
+                    display_name = dev_name_alias.get(dev_name, dev_name)
+                    dev = checkPSU(dev_path, dev_name, display_name, tmpconfig)
+                    self.__psu_checklist.append(dev)
+
+        tmpconfig = self.pmon_syslog_config.get('slots', None)
+        if tmpconfig is not None:
+            preset_item = tmpconfig.get("present", {})
+            path = preset_item.get("path", [])
+            for location in path:
+                if '*' not in location:
+                    pmon_error("slot location config error: %s" % location)
+                    continue
+                dev_name_index = 0
+                loc_split_list = location.split('/')
+                for i, item in enumerate(loc_split_list):
+                    if '*' in item:
+                        dev_name_index = i
+                        break
+                locations = glob.glob(location)
+                for dev_path in locations:
+                    dev_name_list = dev_path.split('/')
+                    dev_name = dev_name_list[dev_name_index]
+                    dev_name_alias = tmpconfig.get("alias", {})
+                    display_name = dev_name_alias.get(dev_name, dev_name)
+                    dev = checkSlot(dev_path, dev_name, display_name, tmpconfig)
+                    self.__slot_checklist.append(dev)
+
+        tmpconfig = self.pmon_syslog_config.get('temps', None)
+        if tmpconfig is not None:
+            self.__temp_checklist = tmpconfig.get('temps_list', [])
+            self.__temps_pollingseconds = tmpconfig.get('over_temps_polling_seconds', None)
+
+    def checkTempStaus(self, temp_item):
+        temp_name = temp_item.get('name', None)
+        input_path = temp_item.get('input_path', None)
+        warning_temp = temp_item.get('warning', None)
+        critical_temp = temp_item.get('critical', None)
+        input_accuracy = temp_item.get('input_accuracy', None)
+        if temp_name is None or input_path is None or warning_temp is None or critical_temp is None:
+            dev_syslog('%%PMON-5-TEMP_NOTICE: get temperature config parament failed.')
+            return
+        try:
+            locations = glob.glob(input_path)
+            with open(locations[0], "r") as fd:
+                input_temp = fd.read()
+            input_temp = float(input_temp) / float(input_accuracy)
+
+            if 'time' not in temp_item:
+                temp_item['time'] = time.time()
+                temp_item['status'] = self.normal_status
+            if float(input_temp) >= float(warning_temp):
+                if float(input_temp) >= float(critical_temp):
+                    if time.time() - \
+                            temp_item['time'] >= self.__temps_pollingseconds or temp_item['status'] != self.critical_status:
+                        dev_syslog('%%PMON-5-TEMP_HIGH: %s temperature %sC is larger than max critical threshold %sC.'
+                                   % (temp_name, input_temp, critical_temp))
+                        temp_item['status'] = self.critical_status
+                        temp_item['time'] = time.time()
+                else:
+                    if time.time() - \
+                            temp_item['time'] >= self.__temps_pollingseconds or temp_item['status'] != self.warning_status:
+                        dev_syslog('%%PMON-5-TEMP_HIGH: %s temperature %sC is larger than max warning threshold %sC.'
+                                   % (temp_name, input_temp, warning_temp))
+                        temp_item['status'] = self.warning_status
+                        temp_item['time'] = time.time()
+            else:
+                pmon_debug(
+                    "%s temperature %sC is in range [%s, %s]" %
+                    (temp_name, input_temp, warning_temp, critical_temp))
+                temp_item['status'] = self.normal_status
+                temp_item['time'] = time.time()
+        except Exception as e:
+            dev_syslog('%%PMON-5-TEMP_NOTICE: Cannot get %s temperature. Exception log: %s' % (temp_name, str(e)))
+        return
+
+    def sysfs_precondition_check(self, check_module, check_project):
+        try:
+            tmpconfig = self.pmon_syslog_config.get(check_module, None)
+            if tmpconfig is not None:
+                check_list = tmpconfig.get(check_project, [])
+                for check_item in check_list:
+                    location = check_item.get("path", None)
+                    ok_val = check_item.get("ok_val", None)
+                    mask = check_item.get("mask", 0xff)
+                    ok_val = ok_val & mask
+                    locations = glob.glob(location)
+                    for power_path in locations:
+                        with open(power_path, "r") as fd:
+                            retval = fd.read()
+                        if int(retval) != ok_val:
+                            return
+                self.poweron_flag = 1
+        except Exception as e:
+            dev_syslog('%%PMON-5-TEMP_NOTICE: Cannot check power status. Exception log: %s' % str(e))
+        return
+
+    def updateSysDeviceStatus(self):
+        if self.poweron_flag == 1:
+            for dev in self.__sfp_checklist:
+                dev.checkStatus()
+        else:
+            self.sysfs_precondition_check('sffs', 'power')
+
+        for dev in self.__fan_checklist:
+            dev.checkStatus()
+        for dev in self.__psu_checklist:
+            dev.checkStatus()
+        for dev in self.__slot_checklist:
+            dev.checkStatus()
+        for temp_item in self.__temp_checklist:
+            self.checkTempStaus(temp_item)
+
+    def getPollingtime(self):
+        return self.__pollingtime
+
+    def debug_init(self):
+        global debuglevel
+        try:
+            with open(PMON_DEBUG_FILE, "r") as fd:
+                value = fd.read()
+            debuglevel = int(value)
+        except Exception:
+            debuglevel = 0
+
+    def doWork(self):
+        try:
+            self.debug_init()
+            self.updateSysDeviceStatus()
+        except Exception as e:
+            MSG_EXCEPTION = '%%PMON-5-NOTICE: Exception happened! info:%s' % str(e)
+            pmon_error(MSG_EXCEPTION % traceback.format_exc())
+
+
+def run():
+    platform = platformSyslog()
+    while True:
+        platform.doWork()
+        time.sleep(platform.getPollingtime())
+
+
+if __name__ == '__main__':
+    run()
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/reboot_cause.py b/platform/broadcom/sonic-platform-modules-micas/common/script/reboot_cause.py
new file mode 100755
index 000000000..2f125c508
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/reboot_cause.py
@@ -0,0 +1,183 @@
+#!/usr/bin/python3
+# -*- coding: UTF-8 -*-
+import sys
+import os
+import time
+import syslog
+from platform_util import get_value, set_value, exec_os_cmd, wb_os_system
+from platform_config import REBOOT_CAUSE_PARA
+
+REBOOT_CAUSE_DEBUG_FILE = "/etc/.reboot_cause_debug"
+REBOOT_CAUSE_STARTED_FLAG = "/tmp/.reboot_cause_started_flag"
+
+debuglevel = 0
+
+
+def record_syslog_debug(s):
+    if debuglevel:
+        syslog.openlog("REBOOT_CAUSE_DEBUG", syslog.LOG_PID)
+        syslog.syslog(syslog.LOG_DEBUG, s)
+
+
+def record_syslog(s):
+    syslog.openlog("REBOOT_CAUSE", syslog.LOG_PID)
+    syslog.syslog(syslog.LOG_WARNING, s)
+
+
+class RebootCause():
+    def __init__(self):
+        self.reboot_cause_para = REBOOT_CAUSE_PARA.copy()
+        self.reboot_cause_list = self.reboot_cause_para.get('reboot_cause_list', None)
+        self.other_reboot_cause_record = self.reboot_cause_para.get('other_reboot_cause_record', None)
+
+    def debug_init(self):
+        global debuglevel
+        if os.path.exists(REBOOT_CAUSE_DEBUG_FILE):
+            debuglevel = 1
+        else:
+            debuglevel = 0
+
+    def monitor_point_check(self, item):
+        try:
+            gettype = item.get('gettype', None)
+            okval = item.get('okval', None)
+            compare_mode = item.get('compare_mode', "equal")
+            ret, value = get_value(item)
+            if ret is True:
+                if compare_mode == "equal":
+                    if value == okval:
+                        return True
+                elif compare_mode == "great":
+                    if value > okval:
+                        return True
+                elif compare_mode == "ignore":
+                    return True
+                else:
+                    record_syslog('%%REBOOT_CAUSE-3-EXCEPTION: compare_mode %s not match error.' % (compare_mode))
+            else:
+                record_syslog('%%REBOOT_CAUSE-3-EXCEPTION: base point check type:%s not support.' % gettype)
+        except Exception as e:
+            record_syslog('%%REBOOT_CAUSE-3-EXCEPTION: base point check error. msg: %s.' % (str(e)))
+        return False
+
+    def reboot_cause_record(self, item_list):
+        RET = {"RETURN_KEY1": 0}
+        try:
+            for item in item_list:
+                record_type = item.get('record_type', None)
+                if record_type == 'file':
+                    file_mode = item.get('mode', None)
+                    file_log = item.get('log', None)
+                    file_path = item.get('path', None)
+                    file_max_size = item.get('file_max_size', 0)
+
+                    if file_path is None:
+                        record_syslog('%%REBOOT_CAUSE-3-EXCEPTION: record type is file, but path is none.')
+                        continue
+
+                    if file_max_size > 0:
+                        file_size = 0
+                        if os.path.exists(file_path):
+                            file_size = os.path.getsize(file_path) // file_max_size
+                        if file_size >= 1:
+                            reocrd_cmd = "mv %s %s_bak" % (file_path, file_path)
+                            status, output = exec_os_cmd(reocrd_cmd)
+                            if status:
+                                record_syslog(
+                                    '%%REBOOT_CAUSE-3-EXCEPTION: exec cmd %s failed, %s' %
+                                    (reocrd_cmd, output))
+
+                    if file_mode == 'cover':
+                        operate_cmd = ">"
+                    elif file_mode == 'add':
+                        operate_cmd = ">>"
+                    else:
+                        RET["RETURN_KEY1"] = -1
+                        record_syslog('%%REBOOT_CAUSE-3-EXCEPTION: file record mode:%s not support.' % file_mode)
+                        continue
+
+                    create_dir = "mkdir -p %s" % os.path.dirname(file_path)
+                    status, ret_t = wb_os_system(create_dir)
+                    if status != 0:
+                        RET["RETURN_KEY1"] = -1
+                        record_syslog(
+                            '%%REBOOT_CAUSE-3-EXCEPTION: create %s failed, msg: %s' %
+                            (os.path.dirname(file_path), ret_t))
+                        continue
+
+                    status, date = wb_os_system("date")
+                    if status != 0 or len(date) == 0:
+                        RET["RETURN_KEY1"] = -1
+                        record_syslog('%%REBOOT_CAUSE-3-EXCEPTION: get date failed.')
+                        continue
+
+                    reocrd_cmd = "echo %s %s %s %s" % (file_log, date, operate_cmd, file_path)
+                    status, ret_t = wb_os_system(reocrd_cmd)
+                    if status != 0:
+                        RET["RETURN_KEY1"] = -1
+                        record_syslog('%%REBOOT_CAUSE-3-EXCEPTION: get date failed, msg: %s' % ret_t)
+                        continue
+                    wb_os_system('sync')
+                else:
+                    RET["RETURN_KEY1"] = -1
+                    record_syslog('%%REBOOT_CAUSE-3-EXCEPTION: record_type:%s not support.' % record_type)
+                    continue
+        except Exception as e:
+            RET["RETURN_KEY1"] = -1
+            record_syslog('%%REBOOT_CAUSE-3-EXCEPTION: reboot cause record error. msg: %s.' % (str(e)))
+        if RET["RETURN_KEY1"] == 0:
+            return True
+        return False
+
+    def reboot_cause_check(self):
+        try:
+            reboot_cause_flag = False
+            if self.reboot_cause_list is None:
+                record_syslog_debug('%%REBOOT_CAUSE-6-DEBUG: reboot cause check config not found')
+                return
+            for item in self.reboot_cause_list:
+                name = item.get('name', None)
+                monitor_point = item.get('monitor_point', None)
+                record = item.get('record', None)
+                finish_operation_list = item.get('finish_operation', [])
+                if name is None or monitor_point is None or record is None:
+                    record_syslog('%%REBOOT_CAUSE-3-EXCEPTION: reboot cause check get config failed.name:%s, monitor_point:%s, record:%s' %
+                                  (name, monitor_point, record))
+                    return
+                ret = self.monitor_point_check(monitor_point)
+                if ret is True:
+                    record_syslog_debug('%%REBOOT_CAUSE-6-DEBUG: %s reboot cause is happen' % name)
+                    self.reboot_cause_record(record)
+                    reboot_cause_flag = True
+                    for finish_operation_item in finish_operation_list:
+                        ret, log = set_value(finish_operation_item)
+                        if ret is False:
+                            log = "%%REBOOT_CAUSE-3-EXCEPTION: " + log
+                            record_syslog(log)
+
+            if reboot_cause_flag is False and self.other_reboot_cause_record is not None:
+                record_syslog_debug('%%REBOOT_CAUSE-6-DEBUG: other reboot cause is happen')
+                self.reboot_cause_record(self.other_reboot_cause_record)
+        except Exception as e:
+            record_syslog('%%REBOOT_CAUSE-3-EXCEPTION: reboot cause check error. msg: %s.' % (str(e)))
+        return
+
+    def run(self):
+        try:
+            self.debug_init()
+            if os.path.exists(REBOOT_CAUSE_STARTED_FLAG):
+                record_syslog_debug(
+                    '%%REBOOT_CAUSE-6-DEBUG: Reboot cause has been started and will not be started again')
+                sys.exit(0)
+            self.reboot_cause_check()
+            wb_os_system("touch %s" % REBOOT_CAUSE_STARTED_FLAG)
+            wb_os_system("sync")
+            time.sleep(5)
+            sys.exit(0)
+        except Exception as e:
+            record_syslog('%%REBOOT_CAUSE-3-EXCEPTION: %s.' % (str(e)))
+
+
+if __name__ == '__main__':
+    reboot_cause = RebootCause()
+    reboot_cause.run()
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/reboot_ctrl.py b/platform/broadcom/sonic-platform-modules-micas/common/script/reboot_ctrl.py
new file mode 100755
index 000000000..17d3f5902
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/reboot_ctrl.py
@@ -0,0 +1,150 @@
+#!/usr/bin/env python3
+# -*- coding: UTF-8 -*-
+import time
+import syslog
+import click
+from platform_util import write_sysfs, wbi2cset, io_wr, wbi2csetWord
+from platform_config import REBOOT_CTRL_PARAM
+
+
+REBOOTCTLDEBUG = 0
+
+CONTEXT_SETTINGS = {"help_option_names": ['-h', '--help']}
+
+
+class AliasedGroup(click.Group):
+    def get_command(self, ctx, cmd_name):
+        rv = click.Group.get_command(self, ctx, cmd_name)
+        if rv is not None:
+            return rv
+        matches = [x for x in self.list_commands(ctx)
+                   if x.startswith(cmd_name)]
+        if not matches:
+            return None
+        if len(matches) == 1:
+            return click.Group.get_command(self, ctx, matches[0])
+        ctx.fail('Too many matches: %s' % ', '.join(sorted(matches)))
+        return None
+
+
+def rebootctrlwarning(s):
+    # s = s.decode('utf-8').encode('gb2312')
+    syslog.openlog("REBOOTCTRL", syslog.LOG_PID)
+    syslog.syslog(syslog.LOG_WARNING, s)
+
+
+def rebootctrlcritical(s):
+    # s = s.decode('utf-8').encode('gb2312')
+    syslog.openlog("REBOOTCTRL", syslog.LOG_PID)
+    syslog.syslog(syslog.LOG_CRIT, s)
+
+
+def rebootctrlerror(s):
+    # s = s.decode('utf-8').encode('gb2312')
+    syslog.openlog("REBOOTCTRL", syslog.LOG_PID)
+    syslog.syslog(syslog.LOG_ERR, s)
+
+
+def rebootctrldebug(s):
+    # s = s.decode('utf-8').encode('gb2312')
+    if REBOOTCTLDEBUG == 1:
+        syslog.openlog("REBOOTCTRL", syslog.LOG_PID)
+        syslog.syslog(syslog.LOG_DEBUG, s)
+
+
+class RebootCtrl():
+    def __init__(self):
+        self.config = REBOOT_CTRL_PARAM.copy()
+
+    def set_value(self, config, val):
+        way = config.get("gettype")
+        if way == 'sysfs':
+            loc = config.get("loc")
+            value = config.get(val)
+            rebootctrldebug("sysfs type.loc:0x%x, value:0x%x" % (loc, value))
+            return write_sysfs(loc, "0x%02x" % value)
+        if way == "i2c":
+            bus = config.get("bus")
+            addr = config.get("loc")
+            offset = config.get("offset")
+            value = config.get(val)
+            rebootctrldebug("i2c type.bus:0x%x, addr:0x%x, offset:0x%x, value:0x%x" % (bus, addr, offset, value))
+            return wbi2cset(bus, addr, offset, value)
+        if way == "io":
+            io_addr = config.get('io_addr')
+            value = config.get(val)
+            rebootctrldebug("io type.io_addr:0x%x, value:0x%x" % (io_addr, value))
+            ret = io_wr(io_addr, value)
+            if ret is not True:
+                return False, ("write 0x%x failed" % io_addr)
+            return True, ("write 0x%x success" % io_addr)
+        if way == 'i2cword':
+            bus = config.get("bus")
+            addr = config.get("loc")
+            offset = config.get("offset")
+            value = config.get(val)
+            rebootctrldebug("i2cword type.bus:0x%x, addr:0x%x, offset:0x%x, value:0x%x" % (bus, addr, offset, value))
+            return wbi2csetWord(bus, addr, offset, value)
+        return False, "unsupport way: %s" % way
+
+    def reset_operate(self, config):
+        ret, log = self.set_value(config, "rst_val")
+        rst_delay = config.get("rst_delay", 0)
+        time.sleep(rst_delay)
+        return ret, log
+
+    def unlock_reset_operate(self, config):
+        ret, log = self.set_value(config, "unlock_rst_val")
+        unlock_rst_delay = config.get("unlock_rst_delay", 0)
+        time.sleep(unlock_rst_delay)
+        return ret, log
+
+    def do_rebootctrl(self, option):
+        if self.config is None:
+            rebootctrlerror("Reset failed, REBOOT_CTRL_PARAM cfg get failed.")
+            return
+        try:
+            name_conf = self.config.get(option, None)
+            if name_conf is None:
+                print("Reset %s not support" % option)
+                return
+            try:
+                click.confirm("Are you sure you want to reset " + option + "?",
+                              default=False, abort=True, show_default=True)
+            except Exception as e:
+                print("Aborted, msg: %s" % str(e))
+                return
+            print("Reset %s start" % option)
+            ret, log = self.reset_operate(name_conf)
+            if ret is False:
+                rebootctrlerror(log)
+                print("Reset %s failed" % option)
+                return
+            if "unlock_rst_val" in name_conf:
+                ret, log = self.unlock_reset_operate(name_conf)
+                if ret is False:
+                    rebootctrlerror(log)
+                    print("%s unlock reset failed" % option)
+                    return
+            print("Reset %s success" % option)
+        except Exception:
+            rebootctrlerror("do_rebootctrl Exception error")
+        return
+
+
+@click.group(cls=AliasedGroup, context_settings=CONTEXT_SETTINGS)
+def main():
+    '''reboot_ctrl reset [option]'''
+
+
+@main.command()
+@click.argument('option', required=True)
+def reset(option):
+    '''reset device'''
+    rebootctrldebug("reboot ctrl option %s" % option)
+    rebootctrl = RebootCtrl()
+    rebootctrl.do_rebootctrl(option)
+
+
+if __name__ == '__main__':
+    main()
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/sensors b/platform/broadcom/sonic-platform-modules-micas/common/script/sensors
new file mode 100755
index 000000000..a2c72b123
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/sensors
@@ -0,0 +1,8 @@
+#!/bin/bash
+#docker exec -i pmon sensors "$@"
+
+
+#To probe sensors not part of lm-sensors
+if [ -r /usr/local/bin/platform_sensors.py ]; then
+        python /usr/local/bin/platform_sensors.py
+fi
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/set_eth_mac.py b/platform/broadcom/sonic-platform-modules-micas/common/script/set_eth_mac.py
new file mode 100755
index 000000000..f4727d802
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/set_eth_mac.py
@@ -0,0 +1,274 @@
+#!/usr/bin/env python
+# -*- coding: UTF-8 -*-
+import syslog
+import os
+import re
+import eepromutil.onietlv as ot
+from eepromutil.fru import ipmifru
+from platform_config import STARTMODULE, SET_MAC_CONF
+from platform_util import byteTostr, dev_file_read, exec_os_cmd
+
+
+STANDARD_MAC_LEN = 12
+SETMAC_DEBUG_FILE = "/etc/.setmac_debug_flag"
+
+SETMACERROR = 1
+SETMACDEBUG = 2
+debuglevel = 0
+
+cfg_prefix = "iface"
+mac_prefix = "hwaddress ether"
+
+def setmac_debug(s):
+    if SETMACDEBUG & debuglevel:
+        syslog.openlog("SETMAC", syslog.LOG_PID)
+        syslog.syslog(syslog.LOG_INFO, s)
+
+
+def setmac_error(s):
+    if SETMACERROR & debuglevel:
+        syslog.openlog("SETMAC", syslog.LOG_PID)
+        syslog.syslog(syslog.LOG_ERR, s)
+
+def setmac_info(s):
+    syslog.openlog("SETMAC", syslog.LOG_PID)
+    syslog.syslog(syslog.LOG_INFO, s)
+
+
+def debug_init():
+    global debuglevel
+    try:
+        with open(SETMAC_DEBUG_FILE, "r") as fd:
+            value = fd.read()
+        debuglevel = int(value)
+    except Exception:
+        debuglevel = 0
+
+
+def decode_mac(encodedata):
+    if encodedata == None:
+        return None
+    ret = ":".join("%02x" % ord(data) for data in encodedata)
+    return ret.upper()
+
+
+def validate_mac(value):
+    if value is None:
+        setmac_error("mac is none")
+        return False
+    if value.find('-') != -1:
+        pattern = re.compile(r"^\s*([0-9a-fA-F]{2,2}-){5,5}[0-9a-fA-F]{2,2}\s*$")
+        temp_value = value.replace("-", "")
+    elif value.find(':') != -1:
+        pattern = re.compile(r"^\s*([0-9a-fA-F]{2,2}:){5,5}[0-9a-fA-F]{2,2}\s*$")
+        temp_value = value.replace(":", "")
+    else:
+        pattern = re.compile(r"^\s*([0-9a-fA-F]{2,2}){5,5}[0-9a-fA-F]{2,2}\s*$")
+        temp_value = value
+    if not pattern.match(value):
+        setmac_error("mac format error")
+        return False
+    if len(temp_value) != STANDARD_MAC_LEN:
+        setmac_error("mac len error len:%d" % len(temp_value))
+        return False
+    if temp_value == "000000000000":
+        setmac_error("illegal zero mac")
+        return False
+    if int(temp_value, 16) >> 40 & 1 == 1:
+        setmac_error("illegal mac")
+        return False
+    setmac_debug("mac validate success")
+    return True
+
+
+def get_onie_eeprom(eeprom):
+    try:
+        onietlv = ot.onie_tlv()
+        rets = onietlv.decode(eeprom)
+        setmac_debug("%-20s %-5s %-5s  %-20s" % ("TLV name", "Code", "lens", "Value"))
+        for item in rets:
+            if item["code"] == 0xfd:
+                setmac_debug("%-20s 0x%-02X   %-5s" % (item["name"], item["code"], item["lens"]))
+            else:
+                setmac_debug("%-20s 0x%-02X   %-5s %-20s" % (item["name"], item["code"], item["lens"], item["value"]))
+    except Exception as e:
+        setmac_error(str(e))
+        return False, str(e)
+    return True, rets
+
+
+def get_fru_eeprom_info(eeprom):
+    try:
+        fru = ipmifru()
+        fru.decodeBin(eeprom)
+    except Exception as e:
+        setmac_error(str(e))
+        return False, str(e)
+    return True, fru
+
+
+def get_mac_from_eeprom(eeprom_conf):
+    name = eeprom_conf.get("name")
+    e2_type = eeprom_conf.get("e2_type")
+    e2_path = eeprom_conf.get("e2_path")
+    e2_size = eeprom_conf.get("e2_size", 256)
+    mac_location = eeprom_conf.get("mac_location", {})
+    e2_mac = None
+
+    support_e2_type = ("fru", "onie_tlv")
+    if e2_type not in support_e2_type:
+        msg = "Unsupport e2 type: %s" % e2_type
+        return False, msg
+
+    setmac_debug("===================%s===================" % name)
+    ret, binval_bytes = dev_file_read(e2_path, 0, e2_size)
+    if ret is False:
+        msg = "eeprom read error, eeprom path: %s, msg: %s" % (e2_path, binval_bytes)
+        return False, msg
+    binval = byteTostr(binval_bytes)
+
+    # onie_tlv
+    if e2_type == "onie_tlv":
+        status, eeprom_info = get_onie_eeprom(binval)
+        if status is False:
+            msg = "get_onie_eeprom failed, msg: %s" % (eeprom_info)
+            return False, msg
+
+        field = mac_location.get("field", "")
+        for eeprom_info_item in eeprom_info:
+            if eeprom_info_item.get("name") == field:
+                e2_mac = eeprom_info_item.get("value")
+                break
+        if e2_mac is None:
+            msg = "get_onie_eeprom mac address failed, e2_mac is None"
+            return False, msg
+        return True, e2_mac
+
+    # fru
+    status, eeprom_info = get_fru_eeprom_info(binval)
+    if status is False:
+        msg = "get_fru_eeprom_info failed, msg: %s" % (eeprom_info)
+        return False, msg
+
+    area = mac_location.get("area", "")
+    field = mac_location.get("field", "")
+    fru_area = getattr(eeprom_info, area, None)
+    fru_field = getattr(fru_area, field, None)
+    e2_mac = decode_mac(fru_field)
+    if e2_mac is None:
+        msg = "decode_mac failed, area: %s, field: %s, value: %s" % (area, field, fru_field)
+        return False, msg
+    return True, e2_mac
+
+
+def read_mac_from_config_file(ifcfg):
+    ifcfg_file_path = ifcfg.get("ifcfg_file_path")
+    if not os.path.exists(ifcfg_file_path):
+        msg = "%s not exist" % ifcfg_file_path
+        return False, msg
+    try:
+        fd = open(ifcfg_file_path, 'r')
+        for line in reversed(fd.readlines()):
+            if line.strip().startswith(mac_prefix):
+                mac = line.strip().replace(mac_prefix, "").strip()
+                return True, mac
+    except Exception as e:
+        setmac_error(str(e))
+        return False, str(e)
+    return False, "mac address not found in %s" % ifcfg_file_path
+
+
+def set_e2_mac_to_config_file(eth_name, mac, ifcfg):
+    try:
+        ifcfg_file_path = ifcfg.get("ifcfg_file_path")
+        cfg_file_dir = os.path.dirname(ifcfg_file_path)
+        if not os.path.exists(cfg_file_dir):
+            cmd = "mkdir -p %s" % cfg_file_dir
+            setmac_info("Create interfaces config directory: %s" % cfg_file_dir)
+            exec_os_cmd(cmd)
+            exec_os_cmd("sync")
+        wr_val = cfg_prefix + " %s\n" % eth_name
+        wr_val += "    %s %s\n" % (mac_prefix, mac)
+        with open(ifcfg_file_path, "w") as fd:
+            fd.write(wr_val)
+        exec_os_cmd("sync")
+        setmac_info("Create interfaces config: %s with mac address: %s" % (ifcfg_file_path, mac))
+        return True
+    except Exception as e:
+        setmac_error(str(e))
+        return False
+
+def get_eth_current_mac(eth_name):
+    get_mac_cmd = "ifconfig %s |grep ether |awk '{print $2}'" % eth_name
+    status, output = exec_os_cmd(get_mac_cmd)
+    if status or len(output) == 0:
+        msg = "get mac exec cmd : %s fail, msg: %s" % (get_mac_cmd, output)
+        setmac_error(msg)
+        return False, msg
+    mac = output.replace("\n", "").upper()
+    return True, mac
+
+def set_eth_mac(eth_name, mac):
+    set_mac_cmd = "ifconfig %s hw ether %s" % (eth_name, mac)
+    status, output = exec_os_cmd(set_mac_cmd)
+    if status:
+        setmac_error("run cmd: %s fail, msg: %s" % (set_mac_cmd, output))
+        return False
+    setmac_info("ifconfig %s with mac address: %s success" % (eth_name, mac))
+    return True
+
+
+def doSetmac():
+    if STARTMODULE.get('set_eth_mac', 0) == 0:
+        setmac_debug("set_eth_mac config not set")
+        return
+
+    try:
+        if SET_MAC_CONF is None:
+            setmac_debug("set_mac_conf in none")
+            return
+
+        if len(SET_MAC_CONF) == 0:
+            setmac_debug("set_mac_conf list is none")
+            return
+
+        for setmac_item in SET_MAC_CONF:
+            eth_name = setmac_item.get("eth_name")
+            e2_name = setmac_item.get("e2_name", "")
+            ifcfg = setmac_item.get("ifcfg")
+            if eth_name is None or ifcfg is None:
+                setmac_error("set_mac_conf error, eth_name or ifcfg is None")
+                continue
+
+            # decode mac by eeprom
+            status, e2_mac = get_mac_from_eeprom(setmac_item)
+            if status is False:
+                setmac_error("get mac from %s eeprom fail, msg: %s" % (e2_name, e2_mac))
+                continue
+            status = validate_mac(e2_mac)
+            if status is False:
+                setmac_error("e2_mac: %s invalid" % e2_mac)
+                continue
+            setmac_debug("get mac from %s eeprom info success, mac: %s" % (e2_name, e2_mac))
+
+            # read config file mac address
+            status, cfg_mac = read_mac_from_config_file(ifcfg)
+            setmac_debug("read_mac_from_config_file, status: %s, cfg_mac: %s" % (status, cfg_mac))
+            if status is False or cfg_mac != e2_mac:
+                set_e2_mac_to_config_file(eth_name, e2_mac, ifcfg)
+                # check current eth mac
+                status, current_mac = get_eth_current_mac(eth_name)
+                if status is False:
+                    setmac_error("get %s current mac fail" % eth_name)
+                    continue
+                setmac_debug("current_mac:%s len:%d" % (current_mac, len(current_mac)))
+                if current_mac != e2_mac:
+                    set_eth_mac(eth_name, e2_mac)
+    except Exception as e:
+        setmac_error(str(e))
+    return
+
+
+if __name__ == '__main__':
+    debug_init()
+    doSetmac()
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/sfp_highest_temperatue.py b/platform/broadcom/sonic-platform-modules-micas/common/script/sfp_highest_temperatue.py
new file mode 100755
index 000000000..4dd98f3a3
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/sfp_highest_temperatue.py
@@ -0,0 +1,148 @@
+#!/usr/bin/python3
+import os
+import importlib.machinery
+import time
+import syslog
+import subprocess
+import fcntl
+
+sfp_temperature_file = "/tmp/highest_sff_temp"
+
+SFP_TEMP_DEBUG_FILE = "/etc/.sfp_temp_debug_flag"
+SFP_TEMP_RECORD_DEBUG = 1
+SFP_TEMP_RECORD_ERROR = 2
+debuglevel = 0
+
+
+def sfp_temp_debug(s):
+    if SFP_TEMP_RECORD_DEBUG & debuglevel:
+        syslog.openlog("SFP_TEMP_DEBUG", syslog.LOG_PID)
+        syslog.syslog(syslog.LOG_DEBUG, s)
+
+
+def sfp_temp_error(s):
+    if SFP_TEMP_RECORD_ERROR & debuglevel:
+        syslog.openlog("SFP_TEMP_ERROR", syslog.LOG_PID)
+        syslog.syslog(syslog.LOG_ERR, s)
+
+
+pidfile = None
+
+
+def file_rw_lock():
+    global pidfile
+    pidfile = open(sfp_temperature_file, "r")
+    try:
+        fcntl.flock(pidfile, fcntl.LOCK_EX | fcntl.LOCK_NB)
+        sfp_temp_debug("file lock success")
+        return True
+    except Exception:
+        if pidfile is not None:
+            pidfile.close()
+            pidfile = None
+        return False
+
+
+def file_rw_unlock():
+    try:
+        global pidfile
+
+        if pidfile is not None:
+            fcntl.flock(pidfile, fcntl.LOCK_UN)
+            pidfile.close()
+            pidfile = None
+            sfp_temp_debug("file unlock success")
+        else:
+            sfp_temp_debug("pidfile is invalid, do nothing")
+        return True
+    except Exception as e:
+        sfp_temp_error("file unlock err, msg:%s" % (str(e)))
+        return False
+
+
+def get_sfp_highest_temperature():
+    highest_temperature = 0
+    platform_sfputil = None
+
+    sfputil_dir = "/usr/share/sonic/device/"
+    try:
+        if not os.path.exists(sfputil_dir):
+            sfputil_dir = "/usr/share/sonic/platform/"
+            sfputil_path = sfputil_dir + "/plugins/sfputil.py"
+        else:
+            cmd = "cat /host/machine.conf | grep onie_build_platform"
+            ret, output = subprocess.getstatusoutput(cmd)
+            if ret != 0:
+                sfp_temp_error("cmd: %s execution fail, output: %s" % (cmd, output))
+
+            onie_platform = output.split("=")[1]
+            sfputil_path = sfputil_dir + onie_platform + "/plugins/sfputil.py"
+
+        module = importlib.machinery.SourceFileLoader("sfputil", sfputil_path).load_module()
+        platform_sfputil_class = getattr(module, "SfpUtil")
+        platform_sfputil = platform_sfputil_class()
+
+        temperature = platform_sfputil.get_highest_temperature()
+        highest_temperature = int(temperature) * 1000
+    except Exception as e:
+        sfp_temp_error("get sfp temperature error, msg:%s" % str(e))
+        highest_temperature = -9999000
+
+    return highest_temperature
+
+
+def write_sfp_highest_temperature(temperature):
+
+    loop = 1000
+    ret = False
+    try:
+        if os.path.exists(sfp_temperature_file) is False:
+            with open(sfp_temperature_file, 'w') as sfp_f:
+                pass
+        for i in range(0, loop):
+            ret = file_rw_lock()
+            if ret is True:
+                break
+            time.sleep(0.001)
+
+        if ret is False:
+            sfp_temp_error("take file lock timeout")
+            return
+
+        with open(sfp_temperature_file, 'w') as sfp_f:
+            sfp_f.write("%s\n" % str(temperature))
+
+        file_rw_unlock()
+        return
+    except Exception as e:
+        sfp_temp_error("write sfp temperature error, msg:%s" % str(e))
+        file_rw_unlock()
+        return
+
+
+def debug_init():
+    global debuglevel
+
+    try:
+        with open(SFP_TEMP_DEBUG_FILE, "r") as fd:
+            value = fd.read()
+        debuglevel = int(value)
+    except Exception:
+        debuglevel = 0
+
+
+def main():
+    while True:
+        debug_init()
+        temperature = 0
+        try:
+            temperature = get_sfp_highest_temperature()
+            write_sfp_highest_temperature(temperature)
+        except Exception as e:
+            sfp_temp_error("get/write sfp temperature error, msg:%s" % str(e))
+            write_sfp_highest_temperature(-9999000)
+        time.sleep(5)
+
+
+if __name__ == '__main__':
+    main()
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/slot_monitor.py b/platform/broadcom/sonic-platform-modules-micas/common/script/slot_monitor.py
new file mode 100755
index 000000000..0385f50b6
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/slot_monitor.py
@@ -0,0 +1,253 @@
+#!/usr/bin/env python3
+# -*- coding: UTF-8 -*-
+import time
+import syslog
+import traceback
+import operator
+import click
+import os
+from platform_config import SLOT_MONITOR_PARAM
+from platform_util import io_rd, io_wr, wbi2cget, wbi2cset
+
+
+SLOTMONITORDEBUG = 0
+SLOTMONITOR_DEBUG_FILE = "/etc/.slotmonitor_debug_flag"
+
+
+CONTEXT_SETTINGS = {"help_option_names": ['-h', '--help']}
+
+
+class AliasedGroup(click.Group):
+    def get_command(self, ctx, cmd_name):
+        rv = click.Group.get_command(self, ctx, cmd_name)
+        if rv is not None:
+            return rv
+        matches = [x for x in self.list_commands(ctx)
+                   if x.startswith(cmd_name)]
+        if not matches:
+            return None
+        if len(matches) == 1:
+            return click.Group.get_command(self, ctx, matches[0])
+        ctx.fail('Too many matches: %s' % ', '.join(sorted(matches)))
+        return None
+
+
+def debug_init():
+    global SLOTMONITORDEBUG
+    if os.path.exists(SLOTMONITOR_DEBUG_FILE):
+        SLOTMONITORDEBUG = 1
+    else:
+        SLOTMONITORDEBUG = 0
+
+
+def slotwarninglog(s):
+    # s = s.decode('utf-8').encode('gb2312')
+    syslog.openlog("SLOTMONITOR", syslog.LOG_PID)
+    syslog.syslog(syslog.LOG_WARNING, s)
+
+
+def slotcriticallog(s):
+    # s = s.decode('utf-8').encode('gb2312')
+    syslog.openlog("SLOTMONITOR", syslog.LOG_PID)
+    syslog.syslog(syslog.LOG_CRIT, s)
+
+
+def sloterror(s):
+    # s = s.decode('utf-8').encode('gb2312')
+    syslog.openlog("SLOTMONITOR", syslog.LOG_PID)
+    syslog.syslog(syslog.LOG_ERR, s)
+
+
+def slotinfo(s):
+    # s = s.decode('utf-8').encode('gb2312')
+    syslog.openlog("SLOTMONITOR", syslog.LOG_PID)
+    syslog.syslog(syslog.LOG_INFO, s)
+
+
+def slotdebuglog(s):
+    # s = s.decode('utf-8').encode('gb2312')
+    if SLOTMONITORDEBUG == 1:
+        syslog.openlog("SLOTMONITOR", syslog.LOG_PID)
+        syslog.syslog(syslog.LOG_DEBUG, s)
+
+
+class SlotMonitor():
+    def __init__(self):
+        self.preSlotStatus = []
+
+    def checkslot(self, ret):
+        slots_conf = SLOT_MONITOR_PARAM.get('slots', None)
+
+        if slots_conf is None:
+            return False
+        for item_slot in slots_conf:
+            totalerr = 0
+            try:
+                ret_t = {}
+                ret_t["id"] = item_slot.get('name')
+                ret_t["status"] = ""
+                presentattr = item_slot.get('present')
+                gettype = presentattr.get('gettype')
+                presentbit = presentattr.get('presentbit')
+                if gettype == "io":
+                    io_addr = presentattr.get('io_addr')
+                    val = io_rd(io_addr)
+                    if val is not None:
+                        retval = val
+                    else:
+                        totalerr -= 1
+                        sloterror(" %s  %s" % (item_slot.get('name'), "lpc read failed"))
+                else:
+                    bus = presentattr.get('bus')
+                    loc = presentattr.get('loc')
+                    offset = presentattr.get('offset')
+                    ind, val = wbi2cget(bus, loc, offset)
+                    if ind is True:
+                        retval = val
+                    else:
+                        totalerr -= 1
+                        sloterror(" %s  %s" % (item_slot.get('name'), "i2c read failed"))
+                if totalerr < 0:
+                    ret_t["status"] = "NOT OK"
+                    ret.append(ret_t)
+                    continue
+                val_t = (int(retval, 16) & (1 << presentbit)) >> presentbit
+                if val_t != presentattr.get('okval'):
+                    ret_t["status"] = "ABSENT"
+                else:
+                    ret_t["status"] = "PRESENT"
+            except Exception as e:
+                ret_t["status"] = "NOT OK"
+                totalerr -= 1
+                sloterror("checkslot error")
+                sloterror(str(e))
+            slotdebuglog("%s status: %s" % (ret_t["id"], ret_t["status"]))
+            ret.append(ret_t)
+        return True
+
+    def dealslotplugin(self, name):
+        slotdebuglog("enter dealslotplugin %s" % name)
+        # wait for slot stable
+        time.sleep(5)
+        slots_conf = SLOT_MONITOR_PARAM.get('slots', None)
+        if slots_conf is None:
+            return False
+        for item_slot in slots_conf:
+            try:
+                slotdebuglog("name %s, item_slot.get('name') %s" % (name, item_slot.get('name')))
+                if name == item_slot.get('name'):
+                    actattr = item_slot.get('act')
+                    for item_act in actattr:
+                        gettype = item_act.get('gettype')
+                        if gettype == "io":
+                            io_addr = item_act.get('io_addr')
+                            value = item_act.get('value')
+                            mask = item_act.get('mask')
+                            val = io_rd(io_addr)
+                            if val is None:
+                                sloterror(" %s  %s" % (name, "lpc read failed"))
+                                continue
+                            set_val = (int(val, 16) & mask) | value
+                            ret = io_wr(io_addr, set_val)
+                            if ret is not True:
+                                sloterror(" %s %s" % (name, "lpc write failed"))
+                                continue
+                            slotdebuglog("io set io_addr:0x%x value:0x%x success" % (io_addr, set_val))
+                        elif gettype == "i2c":
+                            bus = item_act.get('bus')
+                            loc = item_act.get('loc')
+                            offset = item_act.get('offset')
+                            value = item_act.get('value')
+                            ret, log = wbi2cset(bus, loc, offset, value)
+                            if ret is not True:
+                                sloterror(" %s %s %s" % (name, "i2c write failed", log))
+                                continue
+                            slotdebuglog(
+                                "i2c set bus:%d loc:0x%x offset:0x%x value:0x%x success" %
+                                (bus, loc, offset, value))
+                        else:
+                            sloterror("gettype error")
+                    break
+            except Exception as e:
+                sloterror("dealslotplugin failed")
+                sloterror(str(e))
+                return False
+        return True
+
+    def updateSlotStatus(self):
+        '''
+        Only two status: PRESENT and ABSENT
+        '''
+        curSlotStatus = []
+        self.checkslot(curSlotStatus)
+        slotdebuglog('curSlotStatus: {}\n preSlotStatus: {}'.format(curSlotStatus, self.preSlotStatus))
+        if operator.eq(self.preSlotStatus, curSlotStatus) is False:
+            if len(self.preSlotStatus) == 0:
+                # first time
+                for i, item in enumerate(curSlotStatus):
+                    if item['status'] == 'PRESENT':
+                        slotdebuglog('SLOT_PLUG_IN: %s' % (item['id']))
+                    elif item['status'] == 'ABSENT':
+                        slotdebuglog('SLOT_ABSENT: %s' % (item['id']))
+                    else:
+                        slotdebuglog('SLOT_FAILED: %s status %s not support yet' % (item['id'], item['status']))
+                    self.preSlotStatus.append(item)
+            else:
+                for i, item in enumerate(curSlotStatus):
+                    if item['status'] == self.preSlotStatus[i]['status']:
+                        continue
+                    if item['status'] == 'PRESENT' and self.preSlotStatus[i]['status'] == 'ABSENT':
+                        self.dealslotplugin(item['id'])
+                        slotinfo('SLOT_PLUG_IN: %s' % (item['id']))
+                    elif item['status'] == 'ABSENT' and self.preSlotStatus[i]['status'] == 'PRESENT':
+                        slotwarninglog('SLOT_PLUG_OUT: %s' % (item['id']))
+                    else:
+                        slotwarninglog('SLOT_PLUG_OUT: %s status change from %s to %s not support' %
+                                       (item['id'], self.preSlotStatus[i]['status'], item['status']))
+                    self.preSlotStatus.remove(self.preSlotStatus[i])
+                    self.preSlotStatus.insert(i, item)
+
+    def slotmonitor(self):
+        self.updateSlotStatus()
+        return 0
+
+
+def doSlotMonitor(slotMonitor):
+    slotMonitor.slotmonitor()
+
+
+def run(interval, slotMonitor):
+    # slotMonitor.devattrinit()
+    while True:
+        try:
+            debug_init()
+            doSlotMonitor(slotMonitor)
+        except Exception as e:
+            traceback.print_exc()
+            sloterror(str(e))
+        time.sleep(interval)
+
+
+@click.group(cls=AliasedGroup, context_settings=CONTEXT_SETTINGS)
+def main():
+    '''slot monitor operator'''
+
+
+@main.command()
+def start():
+    '''start slot monitor'''
+    slotinfo("slot_monitor start")
+    slotMonitor = SlotMonitor()
+    interval = SLOT_MONITOR_PARAM.get('polling_time', 1)
+    run(interval, slotMonitor)
+
+
+@main.command()
+def stop():
+    '''stop slot monitor '''
+    slotinfo("stop")
+
+
+# device_i2c operation
+if __name__ == '__main__':
+    main()
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/ssdmon b/platform/broadcom/sonic-platform-modules-micas/common/script/ssdmon
new file mode 100755
index 000000000..4290b0a68
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/ssdmon
@@ -0,0 +1,82 @@
+#!/usr/bin/env python3
+#
+# ssdmon
+#
+# Command-line utility to check SSD health and parameters
+#
+
+try:
+    import argparse
+    import os
+    import sys
+
+    from sonic_py_common import device_info, logger
+except ImportError as e:
+    raise ImportError("%s - required module not found" % str(e))
+
+DEFAULT_DEVICE = "/dev/sda"
+SYSLOG_IDENTIFIER = "ssdmon"
+
+# Global logger instance
+log = logger.Logger(SYSLOG_IDENTIFIER)
+
+def import_ssd_api(diskdev):
+    """
+    Loads platform specific or generic ssd_mon module from source
+    Raises an ImportError exception if none of above available
+
+    Returns:
+        Instance of the class with SSD API implementation (vendor or generic)
+    """
+
+    # try to load platform specific module
+    try:
+        platform_path, _ = device_info.get_paths_to_platform_and_hwsku_dirs()
+        platform_plugins_path = os.path.join(platform_path, "plugins")
+        sys.path.append(os.path.abspath(platform_plugins_path))
+        from ssd_util import SsdUtil
+    except ImportError as e:
+        log.log_warning("Platform specific SsdMon module not found.")
+
+    return SsdUtil(diskdev)
+
+def is_number(s):
+    try:
+        float(s)
+        return True
+    except ValueError:
+        return False
+
+# ==================== Entry point ====================
+def ssdmon():
+    if os.geteuid() != 0:
+        print("Root privileges are required for this operation")
+        sys.exit(1)
+
+    parser = argparse.ArgumentParser()
+    parser.add_argument("-d", "--device", help="Device name to show health info", default=DEFAULT_DEVICE)
+    parser.add_argument("-t", "--temperature", action="store_true", default=False, help="Show only temperature")
+    parser.add_argument("-j", "--health", action="store_true", default=False, help="Show only health")
+
+    args = parser.parse_args()
+
+    ssd = import_ssd_api(args.device)
+
+    if args.temperature:
+        print(ssd.get_temperature())
+        return
+
+    if args.health:
+        print(ssd.get_health())
+        return
+
+    print("Device Model : {}".format(ssd.get_model()))
+    print("Firmware     : {}".format(ssd.get_firmware()))
+    print("Serial       : {}".format(ssd.get_serial()))
+    print("Health       : {}{}".format(ssd.get_health(), "%" if is_number(ssd.get_health()) else ""))
+    print("Remain Life  : {}{}".format(ssd.get_remaining_life(), "%" if is_number(ssd.get_remaining_life()) else ""))
+    print("Temperature  : {}{}".format(ssd.get_temperature(), "C" if is_number(ssd.get_temperature()) else ""))
+    print("SATA Rate    : {}".format(ssd.get_sata_rate()))
+
+if __name__ == '__main__':
+    ssdmon()
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/subnetwork.py b/platform/broadcom/sonic-platform-modules-micas/common/script/subnetwork.py
new file mode 100755
index 000000000..5f9df14c8
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/subnetwork.py
@@ -0,0 +1,59 @@
+#!/usr/bin/env python3
+# -*- coding: UTF-8 -*-
+import os
+import re
+import subprocess
+import sys
+import time
+
+
+def start():
+    subnet_path = "/sys/class/net/eth0.4088"
+    retry_count = 10
+    subnet_cmds = []
+    subnet_cmds.append("ip link add link eth0 name eth0.4088 type vlan id 4088")
+    subnet_cmds.append("ip addr add 240.1.1.1/30 brd 240.1.1.3 dev eth0.4088")
+    subnet_cmds.append("ip link set dev eth0.4088 up")
+
+    retry = 0
+    while not os.path.exists(subnet_path) and retry < retry_count:
+        try:
+            for cmd in subnet_cmds:
+                subprocess.run(cmd.split(), check=True)
+        except subprocess.CalledProcessError as e:
+            print("Start subnetwork Failed, retrying: %d, cmd: %s, returncode: %d" % (retry, cmd, e.returncode))
+        retry = retry + 1
+        time.sleep(5)
+
+    if os.path.exists(subnet_path):
+        print("Start subnetwork Success.")
+
+
+def stop():
+    subnet_path = "/sys/class/net/eth0.4088"
+    subnet_cmds = []
+    subnet_cmds.append("ip link set dev eth0.4088 down")
+    subnet_cmds.append("ip link del eth0.4088")
+
+    try:
+        for cmd in subnet_cmds:
+            subprocess.run(cmd.split(), check=True)
+    except subprocess.CalledProcessError as e:
+        print("Stop subnetwork Failed, returncode: " + e.returncode)
+
+    if not os.path.exists(subnet_path):
+        print("Stop subnetwork Success.")
+
+
+def main():
+    print(sys.argv[1])
+    if sys.argv[1] == 'start':
+        start()
+    elif sys.argv[1] == 'stop':
+        stop()
+    else:
+        print("Error parameter!\nRequired parameters : start or stop.")
+
+
+if __name__ == '__main__':
+    main()
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/tty_console.py b/platform/broadcom/sonic-platform-modules-micas/common/script/tty_console.py
new file mode 100755
index 000000000..4fae02f51
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/tty_console.py
@@ -0,0 +1,91 @@
+#!/usr/bin/python3
+# -*- coding: UTF-8 -*-
+
+import logging.handlers
+import subprocess
+import shlex
+import time
+import sys
+import os
+from platform_util import CompressedRotatingFileHandler, exec_os_cmd
+
+console_file = "/dev/ttyS1"
+console_logfile = "/var/log/bmc-console.log"
+MAX_LOG_BYTES = 20 * 1024 * 1024
+BACKUP_COUNT = 9
+
+READ_SIZE = 1024
+
+logger = logging.getLogger("cpu_monitor_bmc")
+logger.setLevel(logging.DEBUG)
+fh = CompressedRotatingFileHandler(
+    console_logfile,
+    mode='a',
+    maxBytes=MAX_LOG_BYTES,
+    backupCount=BACKUP_COUNT,
+    encoding=None,
+    delay=0)
+fh.setLevel(logging.DEBUG)
+
+formatter = logging.Formatter("%(asctime)s - %(levelname)s - %(message)s")
+fh.setFormatter(formatter)
+logger.addHandler(fh)
+
+
+def tty_system_cmd(cmd, print_log=True):
+    if print_log:
+        logger.debug("command: %s", cmd)
+        status, output = exec_os_cmd(cmd)
+        logger.debug("command status %s", status)
+        logger.debug("command output:\n%s", output)
+    else:
+        status, output = exec_os_cmd(cmd)
+    return status, output
+
+
+if __name__ == '__main__':
+    try_times = 0
+    while try_times < 3:
+        try_times = try_times + 1
+        ret, log = tty_system_cmd("stty -F /dev/ttyS1 | grep 115200", True)
+        if len(log) != 0 and "115200" in log:
+            break
+        tty_system_cmd("stty -F /dev/ttyS1 115200", True)
+        if try_times > 1:
+            logger.error("The %d time try to set SONiC /dev/ttyS1 115200", try_times)
+
+    if not os.path.exists(console_file):
+        logger.error("device %s not exist", console_file)
+        sys.exit(1)
+
+    nopen = 3
+    while nopen > 0:
+        try:
+            console_fd = os.open(console_file, os.O_RDONLY)
+            break
+        except Exception as e:
+            logger.error(e)
+            logger.error("open %s failed", console_file)
+            nopen = nopen - 1
+            time.sleep(1)
+    if nopen == 0:
+        sys.exit(1)
+
+    try:
+        tmp_read = ""
+        while True:
+            dev_read = os.read(console_fd, READ_SIZE)
+            dev_read = str(dev_read, encoding='utf-8')
+            if len(dev_read) == 1 and dev_read == "\n":
+                continue
+            if dev_read[len(dev_read) - 1] == '\n':
+                tmp_read = tmp_read + dev_read[0:(len(dev_read) - 1)]
+                logger.info(tmp_read)
+                tmp_read = ""
+            else:
+                tmp_read = tmp_read + dev_read
+
+    except Exception as e:
+        if console_fd is not None:
+            os.close(console_fd)
+        logger.error(e)
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/upgrade.py b/platform/broadcom/sonic-platform-modules-micas/common/script/upgrade.py
new file mode 100755
index 000000000..1b2523198
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/upgrade.py
@@ -0,0 +1,991 @@
+#!/usr/bin/env python3
+# -*- coding: UTF-8 -*-
+import sys
+import os
+import time
+import syslog
+import signal
+import click
+from platform_util import get_value, set_value, exec_os_cmd, exec_os_cmd_log
+from platform_config import UPGRADE_SUMMARY, WARM_UPGRADE_STARTED_FLAG
+from warm_upgrade import WarmBasePlatform
+
+
+############################# Error code defined #############################
+ERR_FW_CHECK_CPLD_UPGRADE = -601    # "Failed to check the device CPLD information"
+ERR_FW_CHECK_FPGA_UPGRADE = -602    # "Failed to check the device FPGA information"
+ERR_FW_MATCH_CPLD_UPGRADE = -603    # "Not found upgrade CPLD file."
+ERR_FW_MATCH_FPGA_UPGRADE = -604    # "Not found upgrade FPGA file."
+ERR_FW_SAMEVER_CPLD_UPGRADE = -605    # "The CPLD version in device is same"
+ERR_FW_SAMEVER_FPGA_UPGRADE = -606    # "The FPGA version in device is same"
+ERR_FW_DO_CPLD_UPGRADE = -607    # "Doing upgrade CPLD is failed."
+ERR_FW_DO_FPGA_UPGRADE = -608    # "Doing upgrade FPGA is failed."
+ERR_FW_UPGRADE = -609    # "Failed to upgrade firmware"
+FIRMWARE_PROGRAM_EXEC_ERR = -610    # "Firmware program run error!"
+ERR_FW_FILE_FOUND = -701    # "Failed to find upgrade file"
+ERR_FW_HEAD_PARSE = -702    # "Failed to parse upgrade firmware head info"
+ERR_FW_CONFIG_FOUND = -703    # "Failed to find config item"
+ERR_FW_NOSUPPORT_HOT = -704    # "No support hot upgrade"
+ERR_FW_CHECK_SIZE = -705    # "Failed to check file size"
+ERR_FW_DEVICE_ACCESS = -706    # "Failed to access device"
+ERR_FW_NO_FILE_SUCCESS = -707    # "No files were successfully upgraded"
+ERR_FW_CARD_ABSENT = -708    # "The subcard not present"
+ERR_FW_HEAD_CHECK = -709    # "Failed to check head info"
+ERR_FW_FOOL_PROOF = -710    # "Failed to fool proof verification"
+ERR_FW_RAISE_EXCEPTION = -711    # Code raise exception
+ERR_FW_INVALID_PARAM = -712    # Invalid parameter
+ERR_FW_UNZIP_FAILED = -713    # Unzip firmware failed
+
+FIRMWARE_SUCCESS = 0
+CHECK_OK = 0
+
+
+UPGRADE_DEBUG_FILE = "/etc/.upgrade_debug_flag"
+UPGRADE_FILE_DIR = "/tmp/firmware/"
+
+UPGRADEDEBUG = 1
+
+debuglevel = 0
+
+COLD_UPGRADE = 1
+WARM_UPGRADE = 2
+TEST_UPGRADE = 3
+BMC_UPGRADE = 4
+
+CONTEXT_SETTINGS = {"help_option_names": ['-h', '--help']}
+
+
+class AliasedGroup(click.Group):
+
+    def get_command(self, ctx, cmd_name):
+        rv = click.Group.get_command(self, ctx, cmd_name)
+        if rv is not None:
+            return rv
+        matches = [x for x in self.list_commands(ctx)
+                   if x.startswith(cmd_name)]
+        if not matches:
+            return None
+        if len(matches) == 1:
+            return click.Group.get_command(self, ctx, matches[0])
+        ctx.fail('Too many matches: %s' % ', '.join(sorted(matches)))
+        return None
+
+
+def debug_init():
+    global debuglevel
+    if os.path.exists(UPGRADE_DEBUG_FILE):
+        debuglevel = debuglevel | UPGRADEDEBUG
+    else:
+        debuglevel = debuglevel & ~(UPGRADEDEBUG)
+
+
+def upgradewarninglog(s):
+    # s = s.decode('utf-8').encode('gb2312')
+    syslog.openlog("UPGRADE", syslog.LOG_PID)
+    syslog.syslog(syslog.LOG_WARNING, s)
+
+
+def upgradecriticallog(s):
+    # s = s.decode('utf-8').encode('gb2312')
+    syslog.openlog("UPGRADE", syslog.LOG_PID)
+    syslog.syslog(syslog.LOG_CRIT, s)
+
+
+def upgradeerror(s):
+    # s = s.decode('utf-8').encode('gb2312')
+    syslog.openlog("UPGRADE", syslog.LOG_PID)
+    syslog.syslog(syslog.LOG_ERR, s)
+
+
+def upgradedebuglog(s):
+    # s = s.decode('utf-8').encode('gb2312')
+    if UPGRADEDEBUG & debuglevel:
+        syslog.openlog("UPGRADE", syslog.LOG_PID)
+        syslog.syslog(syslog.LOG_DEBUG, s)
+
+
+def signal_init():
+    signal.signal(signal.SIGINT, signal.SIG_IGN)  # ignore ctrl+c signal
+    signal.signal(signal.SIGTERM, signal.SIG_IGN)  # ignore kill signal
+    signal.signal(signal.SIGTSTP, signal.SIG_IGN)  # ignore ctrl+z signal
+
+
+class BasePlatform():
+
+    def __init__(self):
+        self.upgrade_param = UPGRADE_SUMMARY.copy()
+        self.devtype = self.upgrade_param.get('devtype', None)
+        self.max_slot_num = self.upgrade_param.get("max_slot_num", 0)
+        self.head_info_config = {}
+        self.slot_config = {}
+        self.cold_chain_config = {}
+        self.subtype = None
+        self.chain = None
+        self.filetype = None
+        self.DEVTYPE = None
+        self.SUBTYPE = '0'
+        self.TYPE = None
+        self.CHAIN = None
+        self.CHIPNAME = None
+        self.VERSION = None
+        self.FILETYPE = None
+        self.CRC = None
+        self.SUBTYPE_LIST = None
+
+    def save_and_set_value(self, cfg_list):
+        for config in cfg_list:
+            ret, val = get_value(config)
+            if ret:
+                config["save_value"] = val
+            else:
+                upgradeerror(val)
+                return False, "get save value fail"
+
+            set_val = config.get("set_value", None)
+            if set_val is None:
+                log = "save_and_set_value lack of set_val config"
+                upgradeerror(log)
+                return log
+
+            gettype = config.get("gettype", None)
+            set_cmd = config.get("set_cmd", None)
+            if gettype == "cmd":
+                if set_cmd is None:
+                    log = "save_and_set_value lack of set_cmd config"
+                    upgradeerror(log)
+                    return False, log
+                config["cmd"] = set_cmd % set_val
+                upgradedebuglog("save_and_set_value modify set cmd to %s" % config["cmd"])
+            else:
+                config["value"] = set_val
+                upgradedebuglog("save_and_set_value modify set val to %s" % config["value"])
+
+            ret, log = set_value(config)
+            if ret is False:
+                upgradeerror(log)
+                return False, log
+        return True, "save and set value success"
+
+    def recover_save_value(self, cfg_list):
+        total_err = 0
+        for config in cfg_list:
+            upgradedebuglog("config: %s, recover save value" % config)
+            val = config.get("save_value", None)
+            if val is None:
+                upgradeerror("recover_save_value lack of save_value config")
+                total_err -= 1
+                continue
+            gettype = config.get("gettype", None)
+            set_cmd = config.get("set_cmd", None)
+            if gettype == "cmd":
+                config["cmd"] = set_cmd % val
+                upgradedebuglog("recover_save_value modify set cmd to %s" % config["cmd"])
+            else:
+                config["value"] = val
+                upgradedebuglog("recover_save_value modify set val to %s" % config["value"])
+
+            ret, log = set_value(config)
+            if ret is False:
+                upgradeerror("recover save value write failed, log: %s" % log)
+                total_err -= 1
+            else:
+                upgradedebuglog("recover save value success")
+        if total_err < 0:
+            return False, "recover save value failed"
+        return True, "recover save value success"
+
+    def check_slot_present(self, slot_present_config):
+        presentbit = slot_present_config.get('presentbit')
+        ret, value = get_value(slot_present_config)
+        if ret is False:
+            return "NOT OK"
+        if isinstance(value, str):
+            val_t = int(value, 16)
+        else:
+            val_t = value
+        val_t = (val_t & (1 << presentbit)) >> presentbit
+        if val_t != slot_present_config.get('okval'):
+            status = "ABSENT"
+        else:
+            status = "PRESENT"
+        return status
+
+    def linecard_present_check(self, slot_present_config):
+        present_status = self.check_slot_present(slot_present_config)
+        if present_status == "NOT OK":
+            return ERR_FW_DEVICE_ACCESS, "get slot present status failed."
+        if present_status == "ABSENT":
+            return ERR_FW_CARD_ABSENT, "slot absent"
+        return CHECK_OK, "slot present"
+
+    def subprocess_warm_upgrade(self, config, file, main_type, sub_type, slot):
+        dev_name = config.get("name", None)
+        status, output = self.subprocess_firmware_upgrade(config, file, main_type, sub_type, slot)
+        if status is False:
+            upgradeerror("%s warm upgrade failed" % dev_name)
+            return False, output
+        command = "warm_upgrade.py %s 0x%x 0x%x %s %s %s" % (file, main_type, sub_type, slot, self.filetype, self.chain)
+        upgradedebuglog("warm upgrade cmd: %s" % command)
+        if os.path.exists(UPGRADE_DEBUG_FILE):
+            status, output = exec_os_cmd_log(command)
+        else:
+            status, output = exec_os_cmd(command)
+        if status:
+            upgradeerror("%s warm upgrade failed" % dev_name)
+            return False, output
+        upgradedebuglog("%s warm upgrade success" % dev_name)
+        return True, "upgrade success"
+
+    def do_fw_upg_init_cmd(self, dev_name, init_cmd_list):
+        # pre operation
+        try:
+            for init_cmd_config in init_cmd_list:
+                ret, log = set_value(init_cmd_config)
+                if ret is False:
+                    upgradeerror("%s do init cmd: %s failed, msg: %s" % (dev_name, init_cmd_config, log))
+                    return False, log
+            msg = "%s firmware init cmd all set success" % dev_name
+            upgradedebuglog(msg)
+            return True, msg
+        except Exception as e:
+            return False, str(e)
+
+    def do_fw_upg_finish_cmd(self, dev_name, finish_cmd_list):
+        # end operation
+        ret = 0
+        for finish_cmd_config in finish_cmd_list:
+            ret_t, log = set_value(finish_cmd_config)
+            if ret_t is False:
+                upgradeerror("%s do finish cmd: %s failed, msg: %s" % (dev_name, finish_cmd_config, log))
+                ret = -1
+        if ret != 0:
+            msg = "%s firmware finish cmd exec failed" % dev_name
+            upgradeerror(msg)
+            return False, msg
+        msg = "%s firmware finish cmd all set success" % dev_name
+        upgradedebuglog(msg)
+        return True, msg
+
+    def subprocess_firmware_upgrade(self, config, file, main_type, sub_type, slot):
+        dev_name = config.get("name", None)
+        init_cmd_list = config.get("init_cmd", [])
+        finish_cmd_list = config.get("finish_cmd", [])
+        try:
+            ret, log = self.do_fw_upg_init_cmd(dev_name, init_cmd_list)
+            if ret is False:
+                self.do_fw_upg_finish_cmd(dev_name, finish_cmd_list)
+                return False, log
+            time.sleep(0.5)  # delay 0.5s after execute init_cmd
+            command = "firmware_upgrade %s 0x%x 0x%x %s" % (file, main_type, sub_type, slot)
+            upgradedebuglog("firmware upgrade cmd: %s" % command)
+            if os.path.exists(UPGRADE_DEBUG_FILE):
+                status, output = exec_os_cmd_log(command)
+            else:
+                status, output = exec_os_cmd(command)
+            if status:
+                self.do_fw_upg_finish_cmd(dev_name, finish_cmd_list)
+                upgradeerror("%s firmware upgrade failed, msg: %s" % (dev_name, output))
+                return False, output
+            upgradedebuglog("%s firmware upgrade success" % dev_name)
+            ret, log = self.do_fw_upg_finish_cmd(dev_name, finish_cmd_list)
+            if ret is False:
+                return False, log
+            return True, "upgrade success"
+        except Exception as e:
+            self.do_fw_upg_finish_cmd(dev_name, finish_cmd_list)
+            return False, str(e)
+
+    def subprocess_test_upgrade(self, config, file, main_type, sub_type, slot):
+        dev_name = config.get("name", None)
+        init_cmd_list = config.get("init_cmd", [])
+        finish_cmd_list = config.get("finish_cmd", [])
+        try:
+            ret, log = self.do_fw_upg_init_cmd(dev_name, init_cmd_list)
+            if ret is False:
+                self.do_fw_upg_finish_cmd(dev_name, finish_cmd_list)
+                return False, log
+            time.sleep(0.5)  # delay 0.5s after execute init_cmd
+            command = "firmware_upgrade test %s 0x%x 0x%x %s" % (file, main_type, sub_type, slot)
+            upgradedebuglog("firmware upgrade cmd: %s" % command)
+            if os.path.exists(UPGRADE_DEBUG_FILE):
+                status, output = exec_os_cmd_log(command)
+            else:
+                status, output = exec_os_cmd(command)
+            if status:
+                self.do_fw_upg_finish_cmd(dev_name, finish_cmd_list)
+                upgradeerror("%s test upgrade failed, msg: %s" % (dev_name, output))
+                return False, output
+            upgradedebuglog("%s test upgrade success" % dev_name)
+            ret, log = self.do_fw_upg_finish_cmd(dev_name, finish_cmd_list)
+            if ret is False:
+                return False, log
+            return True, "upgrade success"
+        except Exception as e:
+            self.do_fw_upg_finish_cmd(dev_name, finish_cmd_list)
+            return False, str(e)
+
+    def subprocess_bmc_upgrade(self, config, file, chip_select, erase_type):
+        dev_name = config.get("name", None)
+        init_cmd_list = config.get("init_cmd", [])
+        finish_cmd_list = config.get("finish_cmd", [])
+        save_set_reg_list = config.get("save_set_reg", [])
+        try:
+            # save and set reg
+            ret, log = self.save_and_set_value(save_set_reg_list)
+            if ret is False:
+                upgradeerror(log)
+                self.recover_save_value(save_set_reg_list)
+                self.do_fw_upg_finish_cmd(dev_name, finish_cmd_list)
+                return False, log
+            upgradedebuglog("%s save and set cmd all set success" % dev_name)
+            time.sleep(0.5)  # delay 0.5s after execute save and set reg
+
+            # pre operation
+            ret, log = self.do_fw_upg_init_cmd(dev_name, init_cmd_list)
+            if ret is False:
+                self.recover_save_value(save_set_reg_list)
+                self.do_fw_upg_finish_cmd(dev_name, finish_cmd_list)
+                return False, log
+
+            upgradedebuglog("%s bmc init cmd all set success" % dev_name)
+            time.sleep(0.5)  # delay 0.5s after execute init_cmd
+
+            command = "fw_upgrade upgrade %s %s %s" % (file, chip_select, erase_type)
+            upgradedebuglog("fw_upgrade upgrade cmd: %s" % command)
+            status, output = exec_os_cmd_log(command)
+            if status:
+                upgradeerror("%s bmc upgrade failed" % dev_name)
+                self.recover_save_value(save_set_reg_list)
+                self.do_fw_upg_finish_cmd(dev_name, finish_cmd_list)
+                return False, output
+            upgradedebuglog("%s bmc upgrade success" % dev_name)
+
+            ret1, log1 = self.recover_save_value(save_set_reg_list)
+            if ret1 is False:
+                upgradeerror("bmc upgrade recover save value failed, msg: %s" % log1)
+            ret2, log2 = self.do_fw_upg_finish_cmd(dev_name, finish_cmd_list)
+            if ret2 is False:
+                upgradeerror("bmc upgrade do finish command failed, msg: %s" % log2)
+            if ret1 is False or ret2 is False:
+                return False, "bmc upgrade do recover save value or finish command failed"
+            return True, "upgrade success"
+
+        except Exception as e:
+            self.recover_save_value(save_set_reg_list)
+            self.do_fw_upg_finish_cmd(dev_name, finish_cmd_list)
+            return False, str(e)
+
+    def file_head_param_check(self, head_info_config):
+        try:
+            self.DEVTYPE = head_info_config.get('DEVTYPE', None)
+            self.SUBTYPE = head_info_config.get('SUBTYPE', '0')
+            self.TYPE = head_info_config.get('TYPE', None)
+            self.CHAIN = head_info_config.get('CHAIN', None)
+            self.CHIPNAME = head_info_config.get('CHIPNAME', None)
+            self.VERSION = head_info_config.get('VERSION', None)
+            self.FILETYPE = head_info_config.get('FILETYPE', None)
+            self.CRC = head_info_config.get('CRC', None)
+
+            if self.devtype != int(self.DEVTYPE, 16):
+                return ERR_FW_HEAD_CHECK, ("no support %s devtype" % self.DEVTYPE)
+
+            if self.SUBTYPE is not None:
+                self.SUBTYPE_LIST = self.SUBTYPE.split(',')
+                self.SUBTYPE_LIST = [int(tmp_subtype, base=16) for tmp_subtype in self.SUBTYPE_LIST]
+                if len(self.SUBTYPE) != 0 and self.subtype not in self.SUBTYPE_LIST:
+                    return ERR_FW_HEAD_CHECK, ("no support %s SUBTYPE" % self.SUBTYPE)
+
+            if len(self.CHAIN) == 0 or len(self.FILETYPE) == 0:
+                return ERR_FW_HEAD_CHECK, ("CHAIN:%s, FILETYPE:%s get failed" % (self.CHAIN, self.FILETYPE))
+            self.chain = int(self.CHAIN)
+            self.filetype = self.FILETYPE
+            upgradedebuglog("file head param: devtype:0x%x, subtype:0x%x, chain:%s, filetype:%s"
+                            % (self.devtype, self.subtype, self.chain, self.filetype))
+            return CHECK_OK, "SUCCESS"
+        except Exception as e:
+            return ERR_FW_RAISE_EXCEPTION, str(e)
+
+    def parse_file_head(self, file):
+        try:
+            self.head_info_config = {}
+            with open(file, 'r', errors='ignore') as fd:
+                rdbuf = fd.read()
+            upgradedebuglog("start parse upgrade file head")
+            file_head_start = rdbuf.index('FILEHEADER(\n')  # ponit to F
+            file_head_start += rdbuf[file_head_start:].index('\n')  # ponit to \n
+            file_head_end = rdbuf.index(')\n')
+            header_buf = rdbuf[file_head_start + 1: file_head_end - 1]
+            upgradedebuglog("upgrade file head find FILEHEADER")
+            for line in header_buf.split('\n'):
+                head_list = line.split('=', 1)
+                head_key = head_list[0]
+                head_val = head_list[1]
+                self.head_info_config[head_key] = head_val
+            upgradedebuglog("file: %s head_info_config: %s" % (file, self.head_info_config))
+            return CHECK_OK, "SUCCESS"
+        except Exception as e:
+            msg = "parse %s head failed, msg: %s" % (file, str(e))
+            upgradeerror(msg)
+            return ERR_FW_RAISE_EXCEPTION, msg
+
+    def get_file_size_k(self, file):
+        fsize = os.path.getsize(file)
+        fsize = fsize / float(1024)
+        return round(fsize, 2)
+
+    def get_device_model(self, conf):
+        ret, val = get_value(conf)
+        if ret is False:
+            msg = "get device model failed, msg: %s" % val
+            return False, msg
+        decode_val = conf.get("decode")
+        if decode_val is None:
+            return True, val
+        for k, v in decode_val.items():
+            if val == v:
+                return True, k
+        msg = "device model decode error, val: %s" % val
+        return False, msg
+
+    def upgrade_fool_proofing(self, conf):
+        try:
+            status, dev_model = self.get_device_model(conf)
+            if status is False:
+                msg = "upgrade fool proofing get device model failed, msg: %s" % dev_model
+                upgradeerror(msg)
+                return False, msg
+            upgradedebuglog("get device model success, device model: %s" % dev_model)
+            if dev_model != self.VERSION:
+                msg = "upgrade fool proofing failed, device model: %s, upgrade file version: %s" % (
+                    dev_model, self.VERSION)
+                upgradedebuglog(msg)
+                return False, msg
+            msg = "upgrade fool proofing pass, device model: %s, upgrade file version: %s" % (dev_model, self.VERSION)
+            upgradedebuglog(msg)
+            return True, msg
+        except Exception as e:
+            upgradeerror(str(e))
+            return False, str(e)
+
+    def upgrading(self, config, file, devtype, subtype, slot, option_flag, erase_type=None):
+        dev_name = config.get("name", None)
+        if option_flag == COLD_UPGRADE:
+            status, output = self.subprocess_firmware_upgrade(config, file, devtype, subtype, slot)
+        elif option_flag == WARM_UPGRADE:
+            status, output = self.subprocess_warm_upgrade(config, file, devtype, subtype, slot)
+        elif option_flag == TEST_UPGRADE:
+            status, output = self.subprocess_test_upgrade(config, file, devtype, subtype, slot)
+        elif option_flag == BMC_UPGRADE:
+            status, output = self.subprocess_bmc_upgrade(config, file, slot, erase_type)
+        else:
+            log = "%s set error option flag" % dev_name
+            upgradeerror(log)
+            return False, log
+
+        if status is False:
+            upgradeerror("%s upgrade failed" % dev_name)
+            return False, output
+        upgradedebuglog("%s upgrade success" % dev_name)
+        return True, "upgrade success"
+
+    def initial_check(self, file, slot, upg_type):
+        try:
+            upgradedebuglog("BasePlatform initial_check, file: %s, slot: %s, upg_type: %s" %
+                            (file, slot, upg_type))
+
+            upgradedebuglog("do file exist check...")
+            if not os.path.isfile(file):
+                msg = "%s not found" % file
+                upgradedebuglog(msg)
+                return ERR_FW_FILE_FOUND, msg
+            upgradedebuglog("file exist check ok")
+
+            slot_name = "slot%d" % slot
+            slot_config = self.upgrade_param.get(slot_name, {})
+            slot_present_config = slot_config.get("present", {})
+            if len(slot_present_config) != 0:
+                upgradedebuglog("do %s present check..." % slot_name)
+                ret, log = self.linecard_present_check(slot_present_config)
+                if ret != CHECK_OK:
+                    msg = "check %s present error, msg: %s" % (slot_name, log)
+                    upgradedebuglog(msg)
+                    return ret, msg
+                upgradedebuglog("%s present check ok" % slot_name)
+
+            upgradedebuglog("do file head parse...")
+            self.subtype = slot_config.get("subtype", 0)
+            ret, log = self.parse_file_head(file)
+            if ret != CHECK_OK:
+                return ret, log
+            upgradedebuglog("file head parse success")
+
+            upgradedebuglog("do file head check...")
+            ret, log = self.file_head_param_check(self.head_info_config)
+            if ret != CHECK_OK:
+                msg = "file: %s, head check failed, msg: %s" % (file, log)
+                upgradedebuglog(msg)
+                return ret, msg
+            upgradedebuglog("file head check ok")
+
+            upgradedebuglog("get upgrade chain config...")
+            filetype_config = slot_config.get(self.filetype, {})
+            if len(filetype_config) == 0:
+                msg = "file: %s filetype: %s no support" % (file, self.filetype)
+                upgradedebuglog(msg)
+                return ERR_FW_CONFIG_FOUND, msg
+            chain_num = "chain%s" % self.chain
+            chain_config = filetype_config.get(chain_num, {})
+            if len(chain_config) == 0:
+                msg = "file: %s get %s config failed" % (file, chain_num)
+                upgradedebuglog(msg)
+                return ERR_FW_CONFIG_FOUND, msg
+            self.cold_chain_config = chain_config
+            upgradedebuglog("get %s filetype: %s %s config success" % (slot_name, self.filetype, chain_num))
+
+            fool_proofing = chain_config.get("fool_proofing")
+            if fool_proofing is not None:
+                upgradedebuglog("do fool proofing check...")
+                status, log = self.upgrade_fool_proofing(fool_proofing)
+                if status is False:
+                    msg = "upgrade fool proofing check failed, msg: %s" % log
+                    upgradedebuglog(msg)
+                    return ERR_FW_FOOL_PROOF, msg
+                upgradedebuglog("do fool proofing check ok")
+
+            if upg_type == WARM_UPGRADE:
+                upgradedebuglog("do support warm upgrade check...")
+                if chain_config.get("is_support_warm_upg", 0) != 1:
+                    msg = "file: %s %s chain config not support warm upgrade" % (file, slot_name)
+                    upgradedebuglog(msg)
+                    return ERR_FW_NOSUPPORT_HOT, msg
+                upgradedebuglog("file: %s %s chain config support warm upgrade" % (file, slot_name))
+
+            filesizecheck = chain_config.get("filesizecheck", 0)
+            if filesizecheck != 0:
+                upgradedebuglog("do file size check...")
+                file_size = self.get_file_size_k(file)
+                if file_size > filesizecheck:
+                    msg = "file: %s size: %s exceed %s" % (file, file_size, filesizecheck)
+                    upgradedebuglog(msg)
+                    return ERR_FW_CHECK_SIZE, msg
+                msg = "file: %s size: %s check ok" % (file, file_size)
+                upgradedebuglog(msg)
+
+            msg = "file: %s slot: %s upgrade type: %s check ok" % (file, slot, upg_type)
+            upgradedebuglog(msg)
+            return CHECK_OK, msg
+        except Exception as e:
+            return ERR_FW_RAISE_EXCEPTION, str(e)
+
+    def do_upgrade(self, file, slot, upg_type):
+        try:
+            ret, log = self.initial_check(file, slot, upg_type)
+            if ret != CHECK_OK:
+                return ret, log
+
+            # start upgrading
+            upgradedebuglog("start upgrading")
+            ret, log = self.upgrading(self.cold_chain_config, file, self.devtype, self.subtype, slot, upg_type)
+            if ret is False:
+                upgradeerror("upgrade failed")
+                return ERR_FW_UPGRADE, log
+            upgradedebuglog("upgrade success")
+            return FIRMWARE_SUCCESS, "SUCCESS"
+        except Exception as e:
+            return ERR_FW_RAISE_EXCEPTION, str(e)
+
+    def do_pre_check(self, conf):
+        ret, val = get_value(conf)
+        if ret is False:
+            msg = "pre check get value failed, msg: %s" % val
+            return False, msg
+        ok_val = conf.get("ok_val")
+        if val == ok_val:
+            msg = "pre check success, ok_val: %s, get value: %s" % (ok_val, val)
+            return True, msg
+        msg = "pre check failed, ok_val: %s, get value: %s" % (ok_val, val)
+        return False, msg
+
+    def do_test(self, device, slot):
+        try:
+            # slot present check
+            slot_name = "slot%d" % slot
+            slot_config = self.upgrade_param.get(slot_name, {})
+            slot_present_config = slot_config.get("present", {})
+            if len(slot_present_config) != 0:
+                ret, log = self.linecard_present_check(slot_present_config)
+                if ret != CHECK_OK:
+                    msg = "check %s present error, msg: %s" % (slot_name, log)
+                    upgradedebuglog(msg)
+                    return ret, msg
+                upgradedebuglog("%s present" % slot_name)
+
+            # get list of devices to be tested
+            test_config = slot_config.get("TEST", {})
+            if len(test_config) == 0:
+                return ERR_FW_CONFIG_FOUND, "test config no found"
+            device_list = test_config.get(device, [])
+            if len(device_list) == 0:
+                return ERR_FW_CONFIG_FOUND, ("logic device %s test config list not found" % device)
+
+            # test_file existence check
+            for test_config in device_list:
+                chain_num = test_config.get("chain", None)
+                test_file = test_config.get("file", None)
+                display_name = test_config.get("display_name", None)
+                if chain_num is None or test_file is None or display_name is None:
+                    log = "test_config:%s lack of config" % test_config
+                    upgradeerror(log)
+                    return ERR_FW_CONFIG_FOUND, log
+                if not os.path.isfile(test_file):
+                    return ERR_FW_FILE_FOUND, ("%s not found" % test_file)
+
+            # start testing
+            RET = 0
+            pre_check_failed = 0
+            pre_check_failed_summary = ""
+            failed_summary = "chain test failed.\ntest fail chain:"
+            success_summary = "test success chain:"
+            for test_config in device_list:
+                chain_num = test_config.get("chain", None)
+                test_file = test_config.get("file", None)
+                display_name = test_config.get("display_name", None)
+                pre_check_conf = test_config.get("pre_check", None)
+                if pre_check_conf is not None:
+                    status, msg = self.do_pre_check(pre_check_conf)
+                    if status is False:
+                        pre_check_failed += 1
+                        log = "\nchain:%d, name:%s, pre check failed, msg: %s" % (chain_num, display_name, msg)
+                        upgradedebuglog(log)
+                        pre_check_failed_summary += log
+                        continue
+                    upgradedebuglog("chain:%d, name:%s, pre check ok, msg: %s" % (chain_num, display_name, msg))
+                ret, log = self.do_upgrade(test_file, slot, TEST_UPGRADE)
+                if ret != FIRMWARE_SUCCESS:
+                    RET = -1
+                    upgradeerror("chain:%d, name:%s test failed" % (chain_num, display_name))
+                    failed_summary += "\n    chain:%d, name:%s;" % (chain_num, display_name)
+                else:
+                    upgradedebuglog("chain:%d, name:%s test success" % (chain_num, display_name))
+                    success_summary += "\n    chain:%d, name:%s;" % (chain_num, display_name)
+            if RET != 0:
+                return ERR_FW_UPGRADE, failed_summary
+            if pre_check_failed == len(device_list):
+                return ERR_FW_NO_FILE_SUCCESS, failed_summary + pre_check_failed_summary
+            return FIRMWARE_SUCCESS, success_summary
+        except Exception as e:
+            return ERR_FW_RAISE_EXCEPTION, str(e)
+
+    def do_test_main(self, device, slot):
+        print("+================================+")
+        print("|Doing upgrade test, please wait.|")
+        ret, log = self.do_test(device, slot)
+        if ret == FIRMWARE_SUCCESS:
+            print("|         test succeeded!        |")
+            print("+================================+")
+            print(log)
+            sys.exit(0)
+        else:
+            print("|         test failed!           |")
+            print("+================================+")
+            print("FAILED REASON:")
+            print(log)
+            sys.exit(1)
+
+    def do_bmc_upgrade_main(self, file, chip_select, erase_type):
+        bmc_upgrade_config = self.upgrade_param.get("BMC", {})
+        ret, log = self.upgrading(bmc_upgrade_config, file, self.devtype,
+                                  self.subtype, chip_select, BMC_UPGRADE, erase_type)
+        if ret is True:
+            print("===========upgrade succeeded!============")
+            sys.exit(0)
+        else:
+            print("============upgrade failed!==============")
+            print("FAILED REASON:")
+            print("%s" % log)
+            sys.exit(1)
+
+
+class FileUpg(object):
+    def __init__(self, config, file, devtype, subtype, slot, filetype, chain, upg_type):
+        self.config = config
+        self.file = file
+        self.devtype = devtype
+        self.subtype = subtype
+        self.slot = slot
+        self.filetype = filetype
+        self.chain = chain
+        self.upg_type = upg_type
+
+    def __repr__(self):
+        return "file:%s slot:%d" % (self.file, self.slot)
+
+
+class FwUpg(object):
+    def __init__(self):
+        self.upg_platform = BasePlatform()
+        self.warm_upg_platform = WarmBasePlatform()
+        self.max_slot_num = self.upg_platform.max_slot_num
+        self.file_list = []
+
+    def do_file_refresh(self, fw_upg_instance):
+        fw_upg_config = fw_upg_instance.config
+        fw_upg_file = fw_upg_instance.file
+        fw_upg_devtype = fw_upg_instance.devtype
+        fw_upg_subype = fw_upg_instance.subtype
+        fw_upg_slot = fw_upg_instance.slot
+        fw_upg_filetype = fw_upg_instance.filetype
+        fw_upg_chain = fw_upg_instance.chain
+        dev_name = fw_upg_config.get("name", None)
+        upgradedebuglog("%s start warm upgrade, file: %s, devtype:0x%x, subype: 0x%x, slot: %d, filetype: %s, chain: %d" %
+                        (dev_name, fw_upg_file, fw_upg_devtype, fw_upg_subype, fw_upg_slot, fw_upg_filetype, fw_upg_chain))
+        status, output = self.warm_upg_platform.do_warmupgrade(fw_upg_file, fw_upg_devtype, fw_upg_subype, fw_upg_slot,
+                                                               fw_upg_filetype, fw_upg_chain)
+        if status is False:
+            upgradeerror("%s warm upgrade failed, msg: %s" % (dev_name, output))
+            return False, output
+        upgradedebuglog("%s warm upgrade success" % dev_name)
+        return True, "upgrade success"
+
+    def do_refresh(self):
+        try:
+            exec_os_cmd("touch %s" % WARM_UPGRADE_STARTED_FLAG)
+            exec_os_cmd("sync")
+
+            # stop upper layer services access
+            ret, log = self.warm_upg_platform.stop_services_access()
+            if ret is False:
+                upgradeerror("stop upper layer services access failed")
+                upgradeerror(log)
+                return ERR_FW_UPGRADE, log
+            upgradedebuglog("stop upper layer services access success")
+
+            for file_instance in self.file_list:
+                file_info = repr(file_instance)
+                ret, log = self.do_file_refresh(file_instance)
+                if ret is False:
+                    msg = "%s refresh failed, ret:%s, \n log:%s." % (file_info, ret, log)
+                    upgradeerror(msg)
+                    return ERR_FW_UPGRADE, msg
+                upgradedebuglog("%s refresh success." % file_info)
+            msg = "all files refresh success."
+            return FIRMWARE_SUCCESS, msg
+        except Exception as e:
+            msg = "do warm upg exception happend. log:%s" % str(e)
+            upgradeerror(msg)
+            return ERR_FW_UPGRADE, msg
+        finally:
+            self.warm_upg_platform.start_services_access()
+            if os.path.isfile(WARM_UPGRADE_STARTED_FLAG):
+                exec_os_cmd("rm -rf %s" % WARM_UPGRADE_STARTED_FLAG)
+                exec_os_cmd("sync")
+
+    def do_file_cold_upg(self, fw_upg_instance):
+        try:
+            upgradedebuglog("start cold upgrade")
+            fw_upg_config = fw_upg_instance.config
+            fw_upg_file = fw_upg_instance.file
+            fw_upg_devtype = fw_upg_instance.devtype
+            fw_upg_subype = fw_upg_instance.subtype
+            fw_upg_slot = fw_upg_instance.slot
+            ret, log = self.upg_platform.upgrading(
+                fw_upg_config, fw_upg_file, fw_upg_devtype, fw_upg_subype, fw_upg_slot, COLD_UPGRADE)
+            if ret is False:
+                upgradeerror("cold upgrade %s slot%d failed, log:%s" % (fw_upg_file, fw_upg_slot, log))
+                return ERR_FW_UPGRADE, log
+            log = "cold upgrade %s slot%d success" % (fw_upg_file, fw_upg_slot)
+            upgradedebuglog(log)
+            return FIRMWARE_SUCCESS, log
+        except Exception as e:
+            msg = "do cold upg exception happend. log:%s" % str(e)
+            upgradeerror(msg)
+            return ERR_FW_UPGRADE, msg
+
+    def do_file_init_check(self, file_path, slot, upg_type):
+        upgradedebuglog("do_file_init_check, file_path: %s, slot: %s, upg_type: %s" % (file_path, slot, upg_type))
+
+        if slot is None:  # traverse all slots
+            for i in range(0, self.max_slot_num + 1):
+                ret, log = self.upg_platform.initial_check(file_path, i, upg_type)
+                if ret != CHECK_OK:
+                    upgradedebuglog(
+                        "file: %s, slot%d initial check not ok, ret: %d, msg: %s" %
+                        (file_path, i, ret, log))
+                    accept_error = (ERR_FW_CARD_ABSENT, ERR_FW_HEAD_CHECK, ERR_FW_FOOL_PROOF)
+                    if ret in accept_error:
+                        msg = "file: %s, slot%d initial check ret: %d, acceptable error." % (file_path, i, ret)
+                        upgradedebuglog(msg)
+                        continue
+                    return ret, log
+                file_instance = FileUpg(self.upg_platform.cold_chain_config, file_path, self.upg_platform.devtype,
+                                        self.upg_platform.subtype, i, self.upg_platform.filetype, self.upg_platform.chain, upg_type)
+                self.file_list.append(file_instance)
+        else:
+            slot = int(slot, 10)
+            ret, log = self.upg_platform.initial_check(file_path, slot, upg_type)
+            if ret != CHECK_OK:
+                msg = "file: %s, slot%d initial check not ok, ret: %d,  msg: %s" % (file_path, slot, ret, log)
+                return ret, msg
+            file_instance = FileUpg(self.upg_platform.cold_chain_config, file_path, self.upg_platform.devtype,
+                                    self.upg_platform.subtype, slot, self.upg_platform.filetype, self.upg_platform.chain, upg_type)
+            self.file_list.append(file_instance)
+        msg = "file: %s all slots init check ok" % file_path
+        return CHECK_OK, msg
+
+    def do_dir_init_check(self, path, slot, upg_type):
+        for root, dirs, names in os.walk(path):
+            # root: directory absolute path
+            # dirs: folder path collection under directory
+            # names: file path collection under directory
+            for filename in names:
+                # file_path is file absolute path
+                file_path = os.path.join(root, filename)
+                ret, log = self.do_file_init_check(file_path, slot, upg_type)
+                if ret != CHECK_OK:
+                    return ret, log
+        msg = "all files in dir have been check ok"
+        upgradedebuglog(msg)
+        return CHECK_OK, msg
+
+    def do_fw_upg(self, path, slot, upg_type):
+        match_zip_file_flag = False
+        try:
+            upgradedebuglog("do_fw_upg, path: %s, slot: %s, upg_type: %s" % (path, slot, upg_type))
+            if slot is not None and not slot.isdigit():
+                msg = "invalid slot param: %s" % slot
+                upgradeerror(msg)
+                return ERR_FW_INVALID_PARAM, msg
+
+            upgradedebuglog("start init check")
+            if os.path.isfile(path) and path.endswith(".zip"):
+                upgradedebuglog("firmware upgrade via compressed package: %s" % path)
+                # remove origin firmware upgrade file
+                exec_os_cmd("rm -rf %s" % UPGRADE_FILE_DIR)
+                cmd = "unzip -o %s -d /tmp/" % path
+                if os.path.exists(UPGRADE_DEBUG_FILE):
+                    status, output = exec_os_cmd_log(cmd)
+                else:
+                    status, output = exec_os_cmd(cmd)
+                if status:
+                    msg = "unzip %s failed, log: %s" % (path, output)
+                    upgradeerror(msg)
+                    return ERR_FW_UNZIP_FAILED, msg
+                match_zip_file_flag = True
+                path = UPGRADE_FILE_DIR
+
+            if os.path.isdir(path):
+                ret, msg = self.do_dir_init_check(path, slot, upg_type)
+            elif os.path.isfile(path):
+                ret, msg = self.do_file_init_check(path, slot, upg_type)
+            else:
+                ret = ERR_FW_FILE_FOUND
+                msg = "path: %s not found" % path
+                upgradeerror(msg)
+
+            if ret != CHECK_OK:
+                return ret, msg
+
+            # self.file_list is a collection of all check ok files
+            if len(self.file_list) == 0:
+                msg = "all file upgrade check not be satisfied."
+                upgradeerror(msg)
+                return ERR_FW_NO_FILE_SUCCESS, msg
+
+            SUCCUSS_FILE_SUMMARY = "SUCCESS FILE: \n"
+            # file cold upgrade
+            upgradedebuglog("start all files cold upgrade")
+            for file_instance in self.file_list:
+                file_info = repr(file_instance)
+                ret, log = self.do_file_cold_upg(file_instance)
+                if ret != FIRMWARE_SUCCESS:
+                    msg = "%s cold upgrade failed, ret:%d, \n log:\n%s." % (file_info, ret, log)
+                    upgradeerror(msg)
+                    return ret, msg
+                SUCCUSS_FILE_SUMMARY += "%s \n" % file_info
+                upgradedebuglog("%s cold upgrade success." % file_info)
+
+            # file refresh upgrade
+            if upg_type == WARM_UPGRADE:
+                upgradedebuglog("start all files refresh upgrade")
+                ret, log = self.do_refresh()
+                if ret != FIRMWARE_SUCCESS:
+                    return ret, log
+
+            msg = "all file upgrade success"
+            upgradedebuglog(msg)
+            return FIRMWARE_SUCCESS, SUCCUSS_FILE_SUMMARY
+        except Exception as e:
+            msg = "do dir upgrade exception happend. log: %s" % str(e)
+            upgradeerror(msg)
+            return ERR_FW_UPGRADE, msg
+        finally:
+            if match_zip_file_flag is True:
+                exec_os_cmd("rm -rf %s" % UPGRADE_FILE_DIR)
+
+    def fw_upg(self, path, slot, upg_type):
+        print("+================================+")
+        print("|  Doing upgrade, please wait... |")
+        ret, log = self.do_fw_upg(path, slot, upg_type)
+        if ret == FIRMWARE_SUCCESS:
+            print("|       upgrade succeeded!       |")
+            print("+================================+")
+            print(log)
+            sys.exit(0)
+        else:
+            print("|        upgrade failed!         |")
+            print("+================================+")
+            print("FAILED REASON:")
+            print("%s" % log)
+            sys.exit(1)
+
+
+@click.group(cls=AliasedGroup, context_settings=CONTEXT_SETTINGS)
+def main():
+    '''upgrade script'''
+
+
+# cold upgrade
+@main.command()
+@click.argument('file_name', required=True)
+@click.argument('slot_num', required=False, default=None)
+def cold(file_name, slot_num):
+    '''cold upgrade'''
+    fwupg = FwUpg()
+    fwupg.fw_upg(file_name, slot_num, COLD_UPGRADE)
+
+
+# warm upgrade
+@main.command()
+@click.argument('file_name', required=True)
+@click.argument('slot_num', required=False, default=None)
+def warm(file_name, slot_num):
+    '''warm upgrade'''
+    fwupg = FwUpg()
+    fwupg.fw_upg(file_name, slot_num, WARM_UPGRADE)
+
+
+# test upgrade
+@main.command()
+@click.argument('device', required=True)
+@click.argument('slot_num', required=True)
+def test(device, slot_num):
+    '''upgrade test'''
+    platform = BasePlatform()
+    platform.do_test_main(device, int(slot_num))
+
+
+# BMC upgrade
+@main.command()
+@click.argument('file_name', required=True)
+@click.argument('chip_select', required=False, default="2")
+@click.argument('erase_type', required=False, default="full")
+def bmc(file_name, chip_select, erase_type):
+    '''BMC upgrade'''
+    platform = BasePlatform()
+    platform.do_bmc_upgrade_main(file_name, chip_select, erase_type)
+
+
+if __name__ == '__main__':
+    signal_init()
+    debug_init()
+    main()
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/warm_upgrade.py b/platform/broadcom/sonic-platform-modules-micas/common/script/warm_upgrade.py
new file mode 100755
index 000000000..69a310faa
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/warm_upgrade.py
@@ -0,0 +1,514 @@
+#!/usr/bin/env python3
+# -*- coding: UTF-8 -*-
+import sys
+import os
+import time
+import syslog
+import signal
+import click
+from platform_util import get_value, set_value, exec_os_cmd, exec_os_cmd_log
+from platform_config import WARM_UPGRADE_PARAM
+
+
+WARM_UPGRADE_DEBUG_FILE = "/etc/.warm_upgrade_debug_flag"
+
+WARMUPGRADEDEBUG = 1
+
+debuglevel = 0
+
+CONTEXT_SETTINGS = {"help_option_names": ['-h', '--help']}
+
+
+class AliasedGroup(click.Group):
+
+    def get_command(self, ctx, cmd_name):
+        rv = click.Group.get_command(self, ctx, cmd_name)
+        if rv is not None:
+            return rv
+        matches = [x for x in self.list_commands(ctx)
+                   if x.startswith(cmd_name)]
+        if not matches:
+            return None
+        if len(matches) == 1:
+            return click.Group.get_command(self, ctx, matches[0])
+        ctx.fail('Too many matches: %s' % ', '.join(sorted(matches)))
+        return None
+
+
+def debug_init():
+    global debuglevel
+    if os.path.exists(WARM_UPGRADE_DEBUG_FILE):
+        debuglevel = debuglevel | WARMUPGRADEDEBUG
+    else:
+        debuglevel = debuglevel & ~(WARMUPGRADEDEBUG)
+
+
+def warmupgradewarninglog(s):
+    # s = s.decode('utf-8').encode('gb2312')
+    syslog.openlog("WARMUPGRADE", syslog.LOG_PID)
+    syslog.syslog(syslog.LOG_WARNING, s)
+
+
+def warmupgradecriticallog(s):
+    # s = s.decode('utf-8').encode('gb2312')
+    syslog.openlog("WARMUPGRADE", syslog.LOG_PID)
+    syslog.syslog(syslog.LOG_CRIT, s)
+
+
+def warmupgradeerror(s):
+    # s = s.decode('utf-8').encode('gb2312')
+    syslog.openlog("WARMUPGRADE", syslog.LOG_PID)
+    syslog.syslog(syslog.LOG_ERR, s)
+
+
+def warmupgradedebuglog(s):
+    # s = s.decode('utf-8').encode('gb2312')
+    if WARMUPGRADEDEBUG & debuglevel:
+        syslog.openlog("WARMUPGRADE", syslog.LOG_PID)
+        syslog.syslog(syslog.LOG_DEBUG, s)
+
+
+def subprocess_warm_upgrade(file, main_type, sub_type, slot):
+    command = "firmware_upgrade %s 0x%x 0x%x %s" % (file, main_type, sub_type, slot)
+    warmupgradedebuglog("warm upgrade firmware cmd:%s" % command)
+    if os.path.exists(WARM_UPGRADE_DEBUG_FILE):
+        return exec_os_cmd_log(command)
+    return exec_os_cmd(command)
+
+
+def signal_init():
+    signal.signal(signal.SIGINT, signal.SIG_IGN)  # ignore ctrl+c signal
+    signal.signal(signal.SIGTERM, signal.SIG_IGN)  # ignore kill signal
+    signal.signal(signal.SIGTSTP, signal.SIG_IGN)  # ignore ctrl+z signal
+
+
+class RefreshUpgradeBase(object):
+
+    def __init__(self, config, slot_num, devtype, subtype):
+        self._config = config
+        self._slot_num = slot_num
+        self._devtype = devtype
+        self._subtype = subtype
+        self.device_name = self._config.get("name", None)
+        self.refresh_file = self._config.get("refresh_file", None)
+        self.init_cmd_list = self._config.get("init_cmd", [])
+        self.save_set_reg_list = self._config.get("save_set_reg", [])
+        self.rw_recover_reg_list = self._config.get("rw_recover_reg", [])
+        self.after_upgrade_delay = self._config.get("after_upgrade_delay", None)
+        self.after_upgrade_delay_timeout = self._config.get("after_upgrade_delay_timeout", None)
+        self.refresh_finish_flag_check_config = self._config.get("refresh_finish_flag_check", None)
+        self.access_check_reg_config = self._config.get("access_check_reg", {})
+        self.time_delay = 0
+        self.finish_cmd_list = self._config.get("finish_cmd", [])
+
+    def get_config(self):
+        pass
+
+    def get_slot_num(self):
+        pass
+
+    def save_value(self, cfg_list):
+        for config in cfg_list:
+            ret, val = get_value(config)
+            if ret:
+                config["value"] = val
+            else:
+                warmupgradeerror(val)
+                return False, val
+        return True, "save value success"
+
+    def save_and_set_value(self, cfg_list):
+        for config in cfg_list:
+            ret, val = get_value(config)
+            if ret:
+                config["save_value"] = val
+            else:
+                warmupgradeerror(val)
+                return False, "get save value fail"
+            set_val = config.get("set_value", None)
+            if set_val is not None:
+                config["value"] = set_val
+            else:
+                warmupgradeerror("save_and_set_value lack of set_val config")
+                return False, "set value is not config"
+            ret, log = set_value(config)
+            if ret is False:
+                warmupgradeerror(log)
+                return False, log
+        return True, "save value success"
+
+    def recover_value(self, cfg_list):
+        fail_flag = 0
+        for config in cfg_list:
+            ret, log = set_value(config)
+            if ret is False:
+                fail_flag = -1
+                warmupgradeerror("recover_value set_value failed, log: %s" % log)
+        if fail_flag != 0:
+            warmupgradeerror("recover_value write failed")
+            return False, "recover write failed"
+        return True, "recover write success"
+
+    def recover_save_value(self, cfg_list):
+        total_err = 0
+        for config in cfg_list:
+            val = config.get("save_value", None)
+            if val is None:
+                warmupgradeerror("recover_save_value lack of save_value config")
+                total_err -= 1
+                continue
+            config["value"] = val
+            ret, log = set_value(config)
+            if ret is False:
+                total_err -= 1
+                warmupgradeerror("recover save value write failed, log: %s" % log)
+            else:
+                warmupgradedebuglog("recover save value success")
+        if total_err < 0:
+            return False, "recover save value failed"
+        return True, "recover save value success"
+
+    def do_fw_upg_init_cmd(self, init_cmd_list):
+        # pre operation
+        try:
+            for init_cmd_config in init_cmd_list:
+                ret, log = set_value(init_cmd_config)
+                if ret is False:
+                    warmupgradeerror("%s do init cmd: %s failed, msg: %s" % (self.device_name, init_cmd_config, log))
+                    return False, log
+            msg = "%s warm upgrade init cmd all set success" % self.device_name
+            warmupgradedebuglog(msg)
+            return True, msg
+        except Exception as e:
+            return False, str(e)
+
+    def do_fw_upg_finish_cmd(self, finish_cmd_list):
+        # end operation
+        total_err = 0
+        for finish_cmd_config in finish_cmd_list:
+            ret_t, log = set_value(finish_cmd_config)
+            if ret_t is False:
+                warmupgradeerror("%s do finish cmd: %s failed, msg: %s" % (self.device_name, finish_cmd_config, log))
+                total_err -= 1
+        if total_err < 0:
+            msg = "%s warm upgrade finish cmd exec failed" % self.device_name
+            warmupgradeerror(msg)
+            return False, msg
+        msg = "%s warm upgrade finish cmd all set success" % self.device_name
+        warmupgradedebuglog(msg)
+        return True, msg
+
+    def access_test(self, config):
+        # polling execute command
+        polling_cmd_list = config.get("polling_cmd", [])
+        for polling_cmd_config in polling_cmd_list:
+            ret, log = set_value(polling_cmd_config)
+            if ret is False:
+                warmupgradeerror(log)
+                return False
+        polling_delay = config.get("polling_delay", None)
+        if polling_delay is not None:
+            time.sleep(polling_delay)
+
+        # record check val
+        check_val = config.get("value", None)
+        # write value
+        ret, log = set_value(config)
+        if ret is False:
+            warmupgradeerror(log)
+            return False
+        # read value
+        ret, val = get_value(config)
+        if ret is False:
+            warmupgradeerror(val)
+            return False
+
+        # compare write and read val
+        warmupgradedebuglog("check_val:%s" % check_val)
+        warmupgradedebuglog("get_value:%s" % val)
+        if val != check_val:
+            warmupgradeerror("check_val:%s != get_value:%s" % (check_val, val))
+            return False
+        return True
+
+    def check_value(self, config):
+        # record check val
+        check_val = config.get("value", None)
+        ret, val = get_value(config)
+        if ret is False:
+            warmupgradeerror(val)
+            return False
+        # compare write and read val
+        warmupgradedebuglog("check_val:%s" % check_val)
+        warmupgradedebuglog("get_value:%s" % val)
+        if val != check_val:
+            warmupgradeerror("check_val:%s != get_value:%s" % (check_val, val))
+            return False
+        return True
+
+    def refresh_file_upgrade(self):
+        try:
+            warmupgradedebuglog("start %s warm upgrading" % self.device_name)
+
+            # save and set reg
+            ret, log = self.save_and_set_value(self.save_set_reg_list)
+            if ret is False:
+                warmupgradeerror(log)
+                self.recover_save_value(self.save_set_reg_list)
+                self.do_fw_upg_finish_cmd(self.finish_cmd_list)
+                return False, log
+            warmupgradedebuglog("%s save and set reg cmd all set success" % self.device_name)
+            time.sleep(0.5)  # delay 0.5s after execute save and set reg
+
+            # pre operation
+            ret, log = self.do_fw_upg_init_cmd(self.init_cmd_list)
+            if ret is False:
+                warmupgradeerror(log)
+                self.recover_save_value(self.save_set_reg_list)
+                self.do_fw_upg_finish_cmd(self.finish_cmd_list)
+                return False, log
+            time.sleep(0.5)  # delay 0.5s after execute init_cmd
+
+            # save reg
+            ret, log = self.save_value(self.rw_recover_reg_list)
+            if ret is False:
+                warmupgradeerror("%s save reg failed" % self.device_name)
+                self.recover_save_value(self.save_set_reg_list)
+                self.do_fw_upg_finish_cmd(self.finish_cmd_list)
+                return False, log
+            warmupgradedebuglog("%s all reg save success" % self.device_name)
+
+            # upgrade refresh file
+            if self.refresh_file is not None:
+                status, output = subprocess_warm_upgrade(
+                    self.refresh_file, self._devtype, self._subtype, self._slot_num)
+                if status:
+                    log = "%s refresh file upg failed, msg: %s" % (self.device_name, output)
+                    warmupgradeerror(log)
+                    self.recover_save_value(self.save_set_reg_list)
+                    self.do_fw_upg_finish_cmd(self.finish_cmd_list)
+                    return False, log
+                warmupgradedebuglog("%s refresh file upg success" % self.device_name)
+
+            # delay the preset time after the upgrade is complete
+            if self.after_upgrade_delay is not None:
+                time.sleep(self.after_upgrade_delay)
+
+            # check something in the timeout period
+            if self.after_upgrade_delay_timeout is not None:
+                while self.time_delay < self.after_upgrade_delay_timeout:
+
+                    # check refresh finish flag
+                    if self.refresh_finish_flag_check_config is not None:
+                        ret = self.check_value(self.refresh_finish_flag_check_config)
+                        if ret is False:
+                            time.sleep(1)
+                            self.time_delay = self.time_delay + 1
+                            warmupgradedebuglog("doing refresh_finish_flag_check, time_delay:%s" % self.time_delay)
+                            continue
+                        warmupgradedebuglog("%s upgrade_finish_flag_check success. self.time_delay:%d"
+                                            % (self.device_name, self.time_delay))
+
+                    # doing logic device rw access test
+                    ret = self.access_test(self.access_check_reg_config)
+                    if ret:
+                        warmupgradedebuglog(
+                            "%s rw test success. self.time_delay:%d" %
+                            (self.device_name, self.time_delay))
+                        break
+                    time.sleep(1)
+                    self.time_delay = self.time_delay + 1
+                    warmupgradedebuglog("doing access_test, self.time_delay:%s" % self.time_delay)
+
+                if self.time_delay >= self.after_upgrade_delay_timeout:
+                    log = "wait %s access test timeout" % self.device_name
+                    warmupgradeerror(log)
+                    self.recover_save_value(self.save_set_reg_list)
+                    self.do_fw_upg_finish_cmd(self.finish_cmd_list)
+                    return False, log
+                warmupgradedebuglog("%s access test success" % self.device_name)
+
+            # recover reg
+            ret, log = self.recover_value(self.rw_recover_reg_list)
+            if ret is False:
+                warmupgradeerror("recover %s reg failed" % self.device_name)
+                self.recover_save_value(self.save_set_reg_list)
+                self.do_fw_upg_finish_cmd(self.finish_cmd_list)
+                return False, log
+            warmupgradedebuglog("recover %s reg success" % self.device_name)
+            # finally
+            ret1, log1 = self.recover_save_value(self.save_set_reg_list)
+            if ret1 is False:
+                warmupgradeerror("bmc upgrade recover save value failed, msg: %s" % log1)
+            ret2, log2 = self.do_fw_upg_finish_cmd(self.finish_cmd_list)
+            if ret2 is False:
+                warmupgradeerror("bmc upgrade do finish command failed, msg: %s" % log2)
+            if ret1 is False or ret2 is False:
+                return False, "upgrading %s recover save value or finish command failed" % self.device_name
+            return True, "upgrading %s success" % self.device_name
+
+        except Exception as e:
+            log = "refresh file upgrade Exception happend, error log : %s" % str(e)
+            self.recover_save_value(self.save_set_reg_list)
+            self.do_fw_upg_finish_cmd(self.finish_cmd_list)
+            return False, log
+
+
+class RefreshUpgrade(RefreshUpgradeBase):
+
+    def __init__(self, config, slot_num, devtype, subtype):
+        super(RefreshUpgrade, self).__init__(config, slot_num, devtype, subtype)
+
+    def get_config(self):
+        super(RefreshUpgrade, self).get_config()
+        return self._config
+
+    def get_slot_num(self):
+        super(RefreshUpgrade, self).get_slot_num()
+        return self._slot_num
+
+
+class WarmBasePlatform():
+
+    def __init__(self):
+        signal_init()
+        debug_init()
+        self.warm_upgrade_param = WARM_UPGRADE_PARAM.copy()
+        self.stop_services_cmd_list = self.warm_upgrade_param.get("stop_services_cmd", [])
+        self.start_services_cmd_list = self.warm_upgrade_param.get("start_services_cmd", [])
+        self.__warm_upgrade_config_list = []
+
+    def execute_command_list(self, cmd_list):
+        for cmd_item in cmd_list:
+            warmupgradedebuglog("execute cmd: %s" % cmd_item)
+            status, output = exec_os_cmd(cmd_item)
+            if status:
+                log = "execute %s failed, msg: %s" % (cmd_item, output)
+                warmupgradeerror(log)
+                return False, log
+        return True, "execute success"
+
+    def stop_services_access(self):
+        return self.execute_command_list(self.stop_services_cmd_list)
+
+    def start_services_access(self):
+        return self.execute_command_list(self.start_services_cmd_list)
+
+    def check_slot_present(self, slot_present_config):
+        totalerr = 0
+        presentbit = slot_present_config.get('presentbit')
+        ret, value = get_value(slot_present_config)
+        if ret is False:
+            return "NOT OK"
+        if isinstance(value, str):
+            val_t = int(value, 16)
+        else:
+            val_t = value
+        val_t = (val_t & (1 << presentbit)) >> presentbit
+        if val_t != slot_present_config.get('okval'):
+            status = "ABSENT"
+        else:
+            status = "PRESENT"
+        return status
+
+    def linecard_present_check(self, slot_name, slot_present_config):
+        present_status = self.check_slot_present(slot_present_config)
+        present_status_tuple = ("ABSENT", "NOT OK")
+        if present_status in present_status_tuple:
+            return False, ("%s not present, warm upgrade exit" % slot_name)
+        warmupgradedebuglog("%s present" % slot_name)
+        return True, ("%s present" % slot_name)
+
+    def start_warmupgrade(self):
+        try:
+            # start refresh file upgrade process
+            for dev in self.__warm_upgrade_config_list:
+                ret, log = dev.refresh_file_upgrade()
+                if ret is False:
+                    return ret, log
+            return True, "all success"
+        except Exception as e:
+            log = "Exception happend, error log : %s" % str(e)
+            return False, log
+
+    def do_warmupgrade(self, file, main_type, sub_type, slot, file_type, chain):
+        try:
+            # upgrade file existence check
+            if not os.path.isfile(file):
+                return False, "%s not found" % file
+
+            # get slot config
+            slot_name = "slot%d" % slot
+            slot_config = self.warm_upgrade_param.get(slot_name, {})
+            if len(slot_config) == 0:
+                return False, ("%s config not found" % slot_name)
+
+            # linecard present check
+            slot_present_config = slot_config.get("present", {})
+            if len(slot_present_config) != 0:
+                ret, log = self.linecard_present_check(slot_name, slot_present_config)
+                if ret is False:
+                    return False, log
+
+            # match file_type and chain_num get chain_config
+            file_type_config = slot_config.get(file_type, {})
+            chain_name = "chain%d" % chain
+            chain_list = file_type_config.get(chain_name, [])
+            self.__warm_upgrade_config_list = []
+            for refresh_config in chain_list:
+                # refresh_file existence check
+                refresh_file_judge_flag = refresh_config.get("refresh_file_judge_flag", 0)
+                if refresh_file_judge_flag == 1:
+                    refresh_file = refresh_config.get("refresh_file", None)
+                    if not os.path.isfile(refresh_file):
+                        log = "%s not found" % refresh_file
+                        return False, log
+                # each refresh_config add as an instance of RefreshUpgrade Class
+                refresh_instance = RefreshUpgrade(refresh_config, slot, main_type, sub_type)
+                self.__warm_upgrade_config_list.append(refresh_instance)
+
+            ret, log = self.start_warmupgrade()
+            if ret is False:
+                warmupgradeerror("doing warm upgrade failed")
+                warmupgradeerror(log)
+                return ret, log
+
+        except Exception as e:
+            log = "Exception happend, error log : %s" % str(e)
+            return False, log
+        return True, "all success"
+
+    def do_warm_upgrade(self, file, main_type, sub_type, slot, file_type, chain):
+        print("+================================+")
+        print("|Begin warm upgrade, please wait..|")
+        ret, log = self.do_warmupgrade(file, main_type, sub_type, slot, file_type, chain)
+        if ret:
+            print("|     warm upgrade succeeded!    |")
+            print("+================================+")
+            sys.exit(0)
+        else:
+            print("|       warm upgrade failed!     |")
+            print("+================================+")
+            print("FAILED REASON:")
+            print("%s" % log)
+            sys.exit(1)
+
+
+@click.group(invoke_without_command=True, context_settings=CONTEXT_SETTINGS)
+@click.argument('file', required=True)
+@click.argument('main_type', required=True)
+@click.argument('sub_type', required=True)
+@click.argument('slot', required=True)
+@click.argument('file_type', required=True)
+@click.argument('chain', required=True)
+def main(file, main_type, sub_type, slot, file_type, chain):
+    '''warm upgrade'''
+    signal_init()
+    debug_init()
+    platform = WarmBasePlatform()
+    platform.do_warm_upgrade(file, int(main_type, 16), int(sub_type, 16), int(slot), file_type, int(chain))
+
+
+# warm upgrade
+if __name__ == '__main__':
+    main()
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/service/platform_driver.service b/platform/broadcom/sonic-platform-modules-micas/common/service/platform_driver.service
new file mode 100644
index 000000000..08a49d695
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/service/platform_driver.service
@@ -0,0 +1,15 @@
+[Unit]
+Description= Global Initialize platform drivers.
+After=local-fs.target
+Before=pmon.service platform_process.service
+#DefaultDependencies=no
+
+[Service]
+Type=oneshot
+ExecStart=/usr/local/bin/platform_driver.py start
+ExecStop=/usr/local/bin/platform_driver.py stop
+RemainAfterExit=yes
+
+[Install]
+WantedBy=multi-user.target
+
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/service/platform_process.service b/platform/broadcom/sonic-platform-modules-micas/common/service/platform_process.service
new file mode 100644
index 000000000..13dd77855
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/service/platform_process.service
@@ -0,0 +1,16 @@
+[Unit]
+Description= Global Load process.
+After=platform_driver.service
+Before=determine-reboot-cause.service pmon.service
+Requires=platform_driver.service
+#DefaultDependencies=no
+
+[Service]
+Type=oneshot
+ExecStart=/usr/local/bin/platform_process.py start
+ExecStop=/usr/local/bin/platform_process.py stop
+RemainAfterExit=yes
+
+[Install]
+WantedBy=multi-user.target
+
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/service/subnetwork.service b/platform/broadcom/sonic-platform-modules-micas/common/service/subnetwork.service
new file mode 100644
index 000000000..666046592
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/service/subnetwork.service
@@ -0,0 +1,13 @@
+[Unit]
+Description=Configuration eth0.4088 subnetwork
+After=network.target
+DefaultDependencies=no
+
+[Service]
+Type=oneshot
+ExecStart=/usr/local/bin/subnetwork.py start
+ExecStop=/usr/local/bin/subnetwork.py stop
+RemainAfterExit=yes
+
+[Install]
+WantedBy=multi-user.target
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/__init__.py b/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/__init__.py
new file mode 100644
index 000000000..b70995a58
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/__init__.py
@@ -0,0 +1,2 @@
+__all__ = ["platform", "chassis", "sfp", "eeprom", "component", "thermal", "psu", "fan", "fan_drawer", "watchdog"]
+from . import platform
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/chassis.py b/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/chassis.py
new file mode 100644
index 000000000..b0ddc8691
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/chassis.py
@@ -0,0 +1,530 @@
+#!/usr/bin/env python3
+
+#############################################################################
+#
+#
+# Module contains an implementation of SONiC Platform Base API and
+# provides the platform information
+#
+#############################################################################
+
+try:
+    import time
+    import sys
+    from sonic_platform_base.chassis_base import ChassisBase
+    from sonic_platform.sfp import Sfp
+    from sonic_platform.psu import Psu
+    # from sonic_platform.fan import Fan
+    from sonic_platform.fan_drawer import FanDrawer
+    from sonic_platform.thermal import Thermal
+    # from sonic_platform.watchdog import Watchdog
+    from sonic_platform.component import Component
+    from sonic_platform.eeprom import Eeprom
+    from sonic_platform.dcdc import Dcdc
+    from plat_hal.baseutil import baseutil
+
+    from plat_hal.interface import interface
+
+except ImportError as error:
+    raise ImportError(str(error) + "- required module not found")from error
+
+
+class Chassis(ChassisBase):
+    """
+    Platform-specific Chassis class
+    """
+    # List of Dcdc objects representing all dcdc
+    # available on the chassis
+    _dcdc_list = None
+
+    STATUS_INSERTED = "1"
+    STATUS_REMOVED = "0"
+    STATUS_NORMAL = "0"
+    STATUS_ABNORMAL = "1"
+    sfp_present_dict = {}
+    fan_present_dict = {}
+    voltage_status_dict = {}
+
+    def __init__(self):
+        ChassisBase.__init__(self)
+        self._dcdc_list = []
+        self.int_case = interface()
+        # Initialize SFP list
+
+        # sfp.py will read eeprom contents and retrive the eeprom data.
+        # It will also provide support sfp controls like reset and setting
+        # low power mode.
+        # We pass the eeprom path and sfp control path from chassis.py
+        # So that sfp.py implementation can be generic to all platforms
+        try:
+            self._sfp_list = []
+            self.port_num = baseutil.get_config().get("sfps", None).get("port_num", 0)
+            self.port_start_index = baseutil.get_config().get("sfps", None).get("port_index_start", 0)
+            # fix problem with first index is 1, we add a fake sfp node
+            if self.port_start_index == 1:
+                self._sfp_list.append(Sfp(1))
+
+            # sfp id always start at 1
+            for index in range(1, self.port_num + 1):
+                self._sfp_list.append(Sfp(index))
+
+            for i in range(self.port_start_index, self.port_start_index + self.port_num):
+                self.sfp_present_dict[i] = self.STATUS_REMOVED
+
+        except Exception as err:
+            print("SFP init error: %s" % str(err))
+
+        try:
+            self._eeprom = Eeprom(self.int_case)
+        except Exception as err:
+            print("EEPROM INIT ERROR %s" % str(err))
+
+        # Initialize watchdog
+        # self._watchdog = Watchdog()
+        fantray_num = self.int_case.get_fan_total_number()
+        for index in range(fantray_num):
+            fandrawer = FanDrawer(self.int_case, index + 1)
+            self._fan_drawer_list.append(fandrawer)
+            self._fan_list.extend(fandrawer._fan_list)
+
+        psu_num = self.int_case.get_psu_total_number()
+        for index in range(psu_num):
+            psuobj = Psu(self.int_case, index + 1)
+            self._psu_list.append(psuobj)
+
+        thermal_num = self.int_case.get_temp_id_number()
+        for index in range(thermal_num):
+            thermalobj = Thermal(self.int_case, index + 1)
+            self._thermal_list.append(thermalobj)
+
+        component_num = self.int_case.get_cpld_total_number()
+        for index in range(component_num):
+            componentobj = Component(self.int_case, index + 1)
+            self._component_list.append(componentobj)
+
+        dcdc_num = self.int_case.get_dcdc_total_number()
+        for index in range(dcdc_num):
+            dcdcobj = Dcdc(self.int_case, index + 1)
+            self._dcdc_list.append(dcdcobj)
+
+    def get_name(self):
+        """
+        Retrieves the name of the chassis
+        Returns:
+            string: The name of the chassis
+        """
+        name = ''
+        sys_eeprom = self.get_eeprom()
+        if sys_eeprom is None:
+            return ''
+
+        e = sys_eeprom.read_eeprom()
+        name = sys_eeprom.modelstr(e)
+        if name is None:
+            return ''
+        return name
+
+    def get_presence(self):
+        """
+        Retrieves the presence of the chassis
+        Returns:
+            bool: True if chassis is present, False if not
+        """
+        return True
+
+    def get_model(self):
+        """
+        Retrieves the model number (or part number) of the chassis
+        Returns:
+            string: Model/part number of chassis
+        """
+        model = ''
+        sys_eeprom = self.get_eeprom()
+        if sys_eeprom is None:
+            return ''
+
+        e = sys_eeprom.read_eeprom()
+        model = sys_eeprom.modelnumber(e)
+        if model is None:
+            return ''
+        return model
+
+    def get_serial_number(self):
+        """
+        Retrieves the hardware serial number for the chassis
+
+        Returns:
+            A string containing the hardware serial number for this chassis.
+        """
+        serial_number = ''
+        sys_eeprom = self.get_eeprom()
+        if sys_eeprom is None:
+            return ''
+
+        e = sys_eeprom.read_eeprom()
+        serial_number = sys_eeprom.serial_number_str(e)
+        if serial_number is None:
+            return ''
+
+        return serial_number
+
+    def get_revision(self):
+        """
+        Retrieves the hardware revision of the device
+
+        Returns:
+            string: Revision value of device
+        """
+        device_version = ''
+        sys_eeprom = self.get_eeprom()
+        if sys_eeprom is None:
+            return ''
+
+        e = sys_eeprom.read_eeprom()
+        device_version = sys_eeprom.deviceversion(e)
+        if device_version is None:
+            return ''
+
+        return device_version
+
+    def get_serial(self):
+        """
+        Retrieves the serial number of the chassis (Service tag)
+        Returns:
+            string: Serial number of chassis
+        """
+        return self.get_serial_number()
+
+    def get_status(self):
+        """
+        Retrieves the operational status of the chassis
+        Returns:
+            bool: A boolean value, True if chassis is operating properly
+            False if not
+        """
+        return True
+
+    def get_position_in_parent(self):
+        """
+        Retrieves 1-based relative physical position in parent device. If the agent cannot determine the parent-relative position
+        for some reason, or if the associated value of entPhysicalContainedIn is '0', then the value '-1' is returned
+        Returns:
+            integer: The 1-based relative physical position in parent device or -1 if cannot determine the position
+        """
+        return -1
+
+    def is_replaceable(self):
+        """
+        Indicate whether this device is replaceable.
+        Returns:
+            bool: True if it is replaceable.
+        """
+        return False
+
+    def initizalize_system_led(self):
+        return True
+
+    def set_status_led(self, color):
+        return False
+
+    def get_status_led(self):
+        """
+        Gets the state of the system LED
+
+        Returns:
+            A string, one of the valid LED color strings which could be vendor
+            specified.
+        """
+        ret, color = self.int_case.get_led_color_by_type('SYS_LED')
+        if ret is True:
+            return color
+        return 'N/A'
+
+    def get_base_mac(self):
+        """
+        Retrieves the base MAC address for the chassis
+
+        Returns:
+            A string containing the MAC address in the format
+            'XX:XX:XX:XX:XX:XX'
+        """
+        base_mac = ''
+        sys_eeprom = self.get_eeprom()
+        if sys_eeprom is None:
+            return ''
+
+        e = sys_eeprom.read_eeprom()
+        base_mac = sys_eeprom.base_mac_addr(e)
+        if base_mac is None:
+            return ''
+
+        return base_mac.upper()
+
+    def get_system_eeprom_info(self):
+        """
+        Retrieves the full content of system EEPROM information for the chassis
+
+        Returns:
+            A dictionary where keys are the type code defined in
+            OCP ONIE TlvInfo EEPROM format and values are their corresponding
+            values.
+            Ex. { '0x21':'AG9064', '0x22':'V1.0', '0x23':'AG9064-0109867821',
+                  '0x24':'001c0f000fcd0a', '0x25':'02/03/2018 16:22:00',
+                  '0x26':'01', '0x27':'REV01', '0x28':'AG9064-C2358-16G'}
+        """
+        sys_eeprom = self.get_eeprom()
+        if sys_eeprom is None:
+            return {}
+        return sys_eeprom.system_eeprom_info()
+
+    def get_thermal_manager(self):
+        """
+        Retrieves thermal manager class on this chassis
+        :return: A class derived from ThermalManagerBase representing the
+        specified thermal manager. ThermalManagerBase is returned as default
+        """
+        return False
+
+    def get_reboot_cause(self):
+        """
+        Retrieves the cause of the previous reboot
+        Returns:
+            A tuple (string, string) where the first element is a string
+            containing the cause of the previous reboot. This string must be
+            one of the predefined strings in this class. If the first string
+            is "REBOOT_CAUSE_HARDWARE_OTHER", the second string can be used
+            to pass a description of the reboot cause.
+        """
+        reboot_cause_msg = self.int_case.get_cpu_reboot_cause()
+        if "Power Loss" in reboot_cause_msg:
+            reboot_cause_type = self.REBOOT_CAUSE_POWER_LOSS
+        elif "Watchdog" in reboot_cause_msg:
+            reboot_cause_type = self.REBOOT_CAUSE_WATCHDOG
+        elif "BMC reboot" in reboot_cause_msg or "BMC powerdown" in reboot_cause_msg:
+            reboot_cause_type = self.REBOOT_CAUSE_HARDWARE_OTHER
+        elif "Thermal Overload: ASIC" in reboot_cause_msg:
+            reboot_cause_type = self.REBOOT_CAUSE_THERMAL_OVERLOAD_ASIC
+        elif "Thermal Overload: Other" in reboot_cause_msg:
+            reboot_cause_type = self.REBOOT_CAUSE_THERMAL_OVERLOAD_OTHER
+        elif "Other" in reboot_cause_msg:
+            reboot_cause_type = self.REBOOT_CAUSE_NON_HARDWARE
+        else:
+            reboot_cause_type = self.REBOOT_CAUSE_NON_HARDWARE
+        return (reboot_cause_type, reboot_cause_msg)
+
+    def get_module(self, index):
+        """
+        Retrieves module represented by (0-based) index <index>
+
+        Args:
+            index: An integer, the index (0-based) of the module to
+            retrieve
+
+        Returns:
+            An object dervied from ModuleBase representing the specified
+            module
+        """
+        module = None
+
+        try:
+            if self.get_num_modules():
+                module = self._module_list[index]
+        except IndexError:
+            sys.stderr.write("Module index {} out of range (0-{})\n".format(
+                             index, len(self._module_list) - 1))
+
+        return module
+
+    def get_fan_drawer(self, index):
+        """
+        Retrieves fan drawers represented by (0-based) index <index>
+
+        Args:
+            index: An integer, the index (0-based) of the fan drawer to
+            retrieve
+
+        Returns:
+            An object dervied from FanDrawerBase representing the specified fan
+            drawer
+        """
+        fan_drawer = None
+
+        try:
+            if self.get_num_fan_drawers():
+                fan_drawer = self._fan_drawer_list[index]
+        except IndexError:
+            sys.stderr.write("Fan drawer index {} out of range (0-{})\n".format(
+                             index, len(self._fan_drawer_list) - 1))
+
+        return fan_drawer
+
+    def get_change_event(self, timeout=0):
+        """
+        Returns a nested dictionary containing all devices which have
+        experienced a change at chassis level
+
+        Args:
+            timeout: Timeout in milliseconds (optional). If timeout == 0,
+                this method will block until a change is detected.
+
+        Returns:
+            (bool, dict):
+                - bool: True if call successful, False if not;
+                - dict: A nested dictionary where key is a device type,
+                        value is a dictionary with key:value pairs in the format of
+                        {'device_id':'device_event'}, where device_id is the device ID
+                        for this device and device_event.
+                        The known devices's device_id and device_event was defined as table below.
+                         -----------------------------------------------------------------
+                         device   |     device_id       |  device_event  |  annotate
+                         -----------------------------------------------------------------
+                         'fan'          '<fan number>'     '0'              Fan removed
+                                                           '1'              Fan inserted
+
+                         'sfp'          '<sfp number>'     '0'              Sfp removed
+                                                           '1'              Sfp inserted
+                                                           '2'              I2C bus stuck
+                                                           '3'              Bad eeprom
+                                                           '4'              Unsupported cable
+                                                           '5'              High Temperature
+                                                           '6'              Bad cable
+
+                         'voltage'      '<monitor point>'  '0'              Vout normal
+                                                           '1'              Vout abnormal
+                         --------------------------------------------------------------------
+                  Ex. {'fan':{'0':'0', '2':'1'}, 'sfp':{'11':'0', '12':'1'},
+                       'voltage':{'U20':'0', 'U21':'1'}}
+                  Indicates that:
+                     fan 0 has been removed, fan 2 has been inserted.
+                     sfp 11 has been removed, sfp 12 has been inserted.
+                     monitored voltage U20 became normal, voltage U21 became abnormal.
+                  Note: For sfp, when event 3-6 happened, the module will not be avalaible,
+                        XCVRD shall stop to read eeprom before SFP recovered from error status.
+        """
+
+        change_event_dict = {"fan": {}, "sfp": {}, "voltage": {}}
+
+        start_time = time.time()
+        forever = False
+
+        if timeout == 0:
+            forever = True
+        elif timeout > 0:
+            timeout = timeout / float(1000)  # Convert to secs
+        else:
+            print("get_change_event:Invalid timeout value: %s" % timeout)
+            return False, change_event_dict
+
+        end_time = start_time + timeout
+        if start_time > end_time:
+            print("get_change_event:time wrap / invalid timeout value: %s" % timeout)
+            return False, change_event_dict  # Time wrap or possibly incorrect timeout
+        try:
+            while timeout >= 0:
+                # check for sfp
+                sfp_change_dict = self.get_transceiver_change_event()
+                # check for fan
+                fan_change_dict = self.get_fan_change_event()
+                # check for voltage
+                voltage_change_dict = self.get_voltage_change_event()
+
+                if sfp_change_dict or fan_change_dict or voltage_change_dict:
+                    change_event_dict["sfp"] = sfp_change_dict
+                    change_event_dict["fan"] = fan_change_dict
+                    change_event_dict["voltage"] = voltage_change_dict
+                    return True, change_event_dict
+                if forever:
+                    time.sleep(1)
+                else:
+                    timeout = end_time - time.time()
+                    if timeout >= 1:
+                        time.sleep(1)  # We poll at 1 second granularity
+                    else:
+                        if timeout > 0:
+                            time.sleep(timeout)
+                        return True, change_event_dict
+        except Exception as e:
+            print(e)
+        print("get_change_event: Should not reach here.")
+        return False, change_event_dict
+
+    def get_transceiver_change_event(self):
+        current_sfp_present_dict = {}
+        ret_dict = {}
+
+        # Check for OIR events and return ret_dict
+        for i in range(self.port_start_index, self.port_start_index + self.port_num):
+            sfp = self._sfp_list[i]
+            if sfp.get_presence():
+                current_sfp_present_dict[i] = self.STATUS_INSERTED
+
+            else:
+                current_sfp_present_dict[i] = self.STATUS_REMOVED
+
+        # Update reg value
+        if current_sfp_present_dict == self.sfp_present_dict:
+            return ret_dict
+
+        for index, status in current_sfp_present_dict.items():
+            if self.sfp_present_dict[index] != status:
+                ret_dict[index] = status
+
+        self.sfp_present_dict = current_sfp_present_dict
+
+        return ret_dict
+
+    def get_fan_change_event(self):
+        current_fan_present_dict = {}
+        ret_dict = {}
+
+        # Check for OIR events and return ret_dict
+        for index, fan in enumerate(self._fan_list):
+            if fan.get_presence() is True:
+                current_fan_present_dict[index] = self.STATUS_INSERTED
+            else:
+                current_fan_present_dict[index] = self.STATUS_REMOVED
+
+        if len(self.fan_present_dict) == 0:       # first time
+            self.fan_present_dict = current_fan_present_dict
+            return {}
+
+        if current_fan_present_dict == self.fan_present_dict:
+            return {}
+
+        # updated fan_present_dict
+        for index, status in current_fan_present_dict.items():
+            if self.fan_present_dict[index] != status:
+                ret_dict[str(index)] = status
+        self.fan_present_dict = current_fan_present_dict
+        return ret_dict
+
+    def get_voltage_change_event(self):
+        current_voltage_status_dict = {}
+        ret_dict = {}
+
+        # Check for OIR events and return ret_dict
+        for index, dcdc in enumerate(self._dcdc_list):
+            name = dcdc.get_name()
+            value = dcdc.get_value()
+            high = dcdc.get_high_threshold()
+            low = dcdc.get_low_threshold()
+            if (value is None) or (value > high) or (value < low):
+                current_voltage_status_dict[name] = self.STATUS_ABNORMAL
+            else:
+                current_voltage_status_dict[name] = self.STATUS_NORMAL
+
+        if len(self.voltage_status_dict) == 0:   # first time
+            self.voltage_status_dict = current_voltage_status_dict
+            return {}
+
+        if current_voltage_status_dict == self.voltage_status_dict:
+            return {}
+
+        # updated voltage_status_dict
+        for name, status in current_voltage_status_dict.items():
+            if self.voltage_status_dict[name] != status:
+                ret_dict[name] = status
+        self.voltage_status_dict = current_voltage_status_dict
+        return ret_dict
+
+
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/component.py b/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/component.py
new file mode 100644
index 000000000..fa674a98a
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/component.py
@@ -0,0 +1,226 @@
+#!/usr/bin/env python3
+
+########################################################################
+#
+# Module contains an implementation of SONiC Platform Base API and
+# provides the Components' (e.g., BIOS, CPLD, FPGA, etc.) available in
+# the platform
+#
+########################################################################
+
+try:
+    import time
+    import subprocess
+    import os
+    from sonic_platform_base.component_base import ComponentBase
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found") from e
+
+
+FIRMWARE_UPDATE_DIR = "/tmp/.firmwareupdate/"
+
+class Component(ComponentBase):
+    """Platform-specific Component class"""
+
+    def __init__(self, interface_obj, index):
+        self.cpld_dict = {}
+        self.int_case = interface_obj
+        self.index = index
+        self.update_time = 0
+        self.cpld_id = "CPLD" + str(index)
+
+    def cpld_dict_update(self):
+        local_time = time.time()
+        if not self.cpld_dict or (local_time - self.update_time) >= 1:  # update data every 1 seconds
+            self.update_time = local_time
+            self.cpld_dict = self.int_case.get_cpld_version_by_id(self.cpld_id)
+
+    def get_slot(self):
+        self.cpld_dict_update()
+        return self.cpld_dict["Slot"]
+
+    def get_warm_upgrade_flag(self):
+        self.cpld_dict_update()
+        return self.cpld_dict["Warm"]
+
+    def get_name(self):
+        """
+        Retrieves the name of the component
+
+        Returns:
+            A string containing the name of the component
+        """
+        self.cpld_dict_update()
+        return self.cpld_dict["Name"]
+
+    def get_description(self):
+        """
+        Retrieves the description of the component
+
+        Returns:
+            A string containing the description of the component
+        """
+        self.cpld_dict_update()
+        return self.cpld_dict["Desc"]
+
+    def get_firmware_version(self):
+        """
+        Retrieves the firmware version of the component
+
+        Note: the firmware version will be read from HW
+
+        Returns:
+            A string containing the firmware version of the component
+        """
+        self.cpld_dict_update()
+        return self.cpld_dict["Version"]
+
+    def get_available_firmware_version(self, image_path):
+        """
+        Retrieves the available firmware version of the component
+
+        Note: the firmware version will be read from image
+
+        Args:
+            image_path: A string, path to firmware image
+
+        Returns:
+            A string containing the available firmware version of the component
+        """
+        raise NotImplementedError
+
+    def get_firmware_update_notification(self, image_path):
+        """
+        Retrieves a notification on what should be done in order to complete
+        the component firmware update
+
+        Args:
+            image_path: A string, path to firmware image
+
+        Returns:
+            A string containing the component firmware update notification if required.
+            By default 'None' value will be used, which indicates that no actions are required
+        """
+        return None
+
+    def install_firmware(self, image_path):
+        """
+        Installs firmware to the component
+
+        This API performs firmware installation only: this may/may not be the same as firmware update.
+        In case platform component requires some extra steps (apart from calling Low Level Utility)
+        to load the installed firmware (e.g, reboot, power cycle, etc.) - this must be done manually by user
+
+        Note: in case immediate actions are required to complete the component firmware update
+        (e.g., reboot, power cycle, etc.) - will be done automatically by API and no return value provided
+
+        Args:
+            image_path: A string, path to firmware image
+
+        Returns:
+            A boolean, True if install was successful, False if not
+        """
+        if not os.path.isfile(image_path):
+            print("ERROR: %s not found" % image_path)
+            return False
+        cmdstr = "upgrade.py cold %s %d" % (image_path, self.get_slot())
+        status, output = subprocess.getstatusoutput(cmdstr)
+        if status == 0:
+            print("INFO: %s firmware install succeeded" % self.get_name())
+            return True
+        print("%s install failed. status:%d, output:\n%s" % (self.get_name(), status, output))
+        return False
+
+    def update_firmware(self, image_path):
+        """
+        Updates firmware of the component
+
+        This API performs firmware update: it assumes firmware installation and loading in a single call.
+        In case platform component requires some extra steps (apart from calling Low Level Utility)
+        to load the installed firmware (e.g, reboot, power cycle, etc.) - this will be done automatically by API
+
+        Args:
+            image_path: A string, path to firmware image
+
+        Raises:
+            RuntimeError: update failed
+        """
+        if not os.path.isfile(image_path):
+            raise RuntimeError("ERROR: %s not found" % image_path)
+
+        if self.get_warm_upgrade_flag() == 1:  # use warm upgrade
+            cmdstr = "upgrade.py warm %s %d" % (image_path, self.get_slot())
+        else:
+            cmdstr = "upgrade.py cold %s %d" % (image_path, self.get_slot())
+        status, output = subprocess.getstatusoutput(cmdstr)
+        if status == 0:
+            if self.get_warm_upgrade_flag() != 1:  # not support warm upgrade, need to cold reboot
+                print("INFO: %s firmware install succeeded" % self.get_name())
+                print("INFO: please cold reboot to make the %s firmware up-to-date" % self.get_name())
+            else:
+                print("INFO: %s firmware update succeeded" % self.get_name())
+                print("INFO: %s firmware version up-to-date" % self.get_name())
+            return None
+        raise RuntimeError(output)
+
+    def auto_update_firmware(self, image_path, boot_type):
+        """
+        Updates firmware of the component
+
+        This API performs firmware update automatically based on boot_type: it assumes firmware installation
+        and/or creating a loading task during the reboot, if needed, in a single call.
+        In case platform component requires some extra steps (apart from calling Low Level Utility)
+        to load the installed firmware (e.g, reboot, power cycle, etc.) - this will be done automatically during the reboot.
+        The loading task will be created by API.
+
+        Args:
+            image_path: A string, path to firmware image
+            boot_type: A string, reboot type following the upgrade
+                         - none/fast/warm/cold
+
+        Returns:
+            Output: A return code
+                return_code: An integer number, status of component firmware auto-update
+                    - return code of a positive number indicates successful auto-update
+                        - status_installed = 1
+                        - status_updated = 2
+                        - status_scheduled = 3
+                    - return_code of a negative number indicates failed auto-update
+                        - status_err_boot_type = -1
+                        - status_err_image = -2
+                        - status_err_unknown = -3
+
+        Raises:
+            RuntimeError: auto-update failure cause
+        """
+        if not os.path.isfile(image_path):
+            print("ERROR: %s not found" % image_path)
+            return -2
+
+        if not os.path.isdir(FIRMWARE_UPDATE_DIR):
+            os.mkdir(FIRMWARE_UPDATE_DIR)
+
+        warm_upgrade_flag = self.get_warm_upgrade_flag()
+        file_name = os.path.basename(image_path)
+        file_path = os.path.join(FIRMWARE_UPDATE_DIR, file_name)
+        if os.path.exists(file_path):   # firmware already update
+            if warm_upgrade_flag == 1:
+                print("INFO: %s firmware update succeeded, firmware version up-to-date" % self.get_name())
+                return 2
+            print("INFO: %s firmware install succeeded, please cold reboot to make it up-to-date" % self.get_name())
+            return 1
+
+        if warm_upgrade_flag == 1:  # use warm upgrade
+            cmdstr = "upgrade.py warm %s %d" % (image_path, self.get_slot())
+        else:
+            cmdstr = "upgrade.py cold %s %d" % (image_path, self.get_slot())
+        status, output = subprocess.getstatusoutput(cmdstr)
+        if status == 0:
+            os.mknod(file_path)
+            if warm_upgrade_flag == 1:
+                print("INFO: %s firmware update succeeded, firmware version up-to-date" % self.get_name())
+                return 2
+            print("INFO: %s firmware install succeeded, please cold reboot to make it up-to-date" % self.get_name())
+            return 1
+        print("%s update failed, status:%d, output:\n%s" % (self.get_name(), status, output))
+        return -3
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/dcdc.py b/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/dcdc.py
new file mode 100644
index 000000000..494d4aa61
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/dcdc.py
@@ -0,0 +1,85 @@
+#!/usr/bin/env python3
+
+########################################################################
+#
+# Module contains an implementation of SONiC Platform Base API and
+# provides the Thermals' information which are available in the platform
+#
+########################################################################
+import time
+
+
+class Dcdc(object):
+
+    def __init__(self, interface_obj, index):
+        self.dcdc_dict = {}
+        self.int_case = interface_obj
+        self.index = index
+        self.update_time = 0
+        self.dcdc_id = "DCDC" + str(index)
+
+    def dcdc_dict_update(self):
+        local_time = time.time()
+        if not self.dcdc_dict or (local_time - self.update_time) >= 1:  # update data every 1 seconds
+            self.update_time = local_time
+            self.dcdc_dict = self.int_case.get_dcdc_by_id(self.dcdc_id)
+
+    def get_name(self):
+        """
+        Retrieves the name of the sensor
+
+        Returns:
+            string: The name of the sensor
+        """
+        self.dcdc_dict_update()
+        return self.dcdc_dict["Name"]
+
+    def get_value(self):
+        """
+        Retrieves current value reading from sensor
+        """
+        self.dcdc_dict_update()
+        value = self.dcdc_dict["Value"]
+        if value is None:
+            value = 0
+        return round(float(value), 3)
+
+    def get_high_threshold(self):
+        """
+        Retrieves the high threshold temperature of sensor
+        """
+        self.dcdc_dict_update()
+        value = self.dcdc_dict["High"]
+        if value is None:
+            value = 0
+        return round(float(value), 3)
+
+    def get_low_threshold(self):
+        """
+        Retrieves the low threshold temperature of sensor
+        """
+        self.dcdc_dict_update()
+        value = self.dcdc_dict["Low"]
+        if value is None:
+            value = 0
+        return round(float(value), 3)
+
+    def get_high_critical_threshold(self):
+        """
+        Retrieves the high critical threshold temperature of sensor
+        """
+        self.dcdc_dict_update()
+        value = self.dcdc_dict["Max"]
+        if value is None:
+            value = 0
+        return round(float(value), 3)
+
+    def get_low_critical_threshold(self):
+        """
+        Retrieves the low critical threshold temperature of sensor
+        """
+        self.dcdc_dict_update()
+        value = self.dcdc_dict["Min"]
+        if value is None:
+            value = 0
+        return round(float(value), 3)
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/eeprom.py b/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/eeprom.py
new file mode 100644
index 000000000..05fcc3c25
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/eeprom.py
@@ -0,0 +1,92 @@
+#!/usr/bin/env python3
+########################################################################
+#
+# Module contains platform specific implementation of SONiC Platform
+# Base API and provides the EEPROMs' information.
+#
+# The different EEPROMs available are as follows:
+# - System EEPROM : Contains Serial number, Service tag, Base MA
+#                   address, etc. in ONIE TlvInfo EEPROM format.
+# - PSU EEPROM : Contains Serial number, Part number, Service Tag,
+#                PSU type, Revision.
+# - Fan EEPROM : Contains Serial number, Part number, Service Tag,
+#                Fan type, Number of Fans in Fantray, Revision.
+########################################################################
+
+try:
+    from sonic_eeprom import eeprom_tlvinfo
+except ImportError as error:
+    raise ImportError(str(error) + "- required module not found") from error
+
+
+class Eeprom(eeprom_tlvinfo.TlvInfoDecoder):
+
+    def __init__(self, interface_obj):
+        self.int_case = interface_obj
+        self.name = "ONIE_E2"
+
+        eeprom_path = self.int_case.get_onie_e2_path(self.name)
+        if eeprom_path is None:
+            raise ValueError("get eeprom path failed")
+
+        super().__init__(eeprom_path, 0, "", True)
+
+    def modelnumber(self, e):
+        '''
+        Returns the value field of the model(part) number TLV as a string
+        '''
+        (is_valid, t) = self.get_tlv_field(e, self._TLV_CODE_PART_NUMBER)
+        if not is_valid:
+            return super().part_number_str(e)
+
+        return t[2].decode("ascii")
+
+    def deviceversion(self, e):
+        '''
+        Returns the value field of the Device Version as a string
+        '''
+        (is_valid, t) = self.get_tlv_field(e, self._TLV_CODE_DEVICE_VERSION)
+        if not is_valid:
+            return "N/A"
+
+        return str(ord(t[2]))
+
+    def system_eeprom_info(self):
+        '''
+        Retrieves the full content of system EEPROM information for the chassis
+
+        Returns:
+            A dictionary where keys are the type code defined in
+            OCP ONIE TlvInfo EEPROM format and values are their corresponding
+            values.
+            Ex. { '0x21':'AG9064', '0x22':'V1.0', '0x23':'AG9064-0109867821',
+                  '0x24':'001c0f000fcd0a', '0x25':'02/03/2018 16:22:00',
+                  '0x26':'01', '0x27':'REV01', '0x28':'AG9064-C2358-16G'}
+        '''
+        sys_eeprom_dict = {}
+        e = self.read_eeprom()
+        if self._TLV_HDR_ENABLED:
+            if not self.is_valid_tlvinfo_header(e):
+                return {}
+            total_len = (e[9] << 8) | e[10]
+            tlv_index = self._TLV_INFO_HDR_LEN
+            tlv_end = self._TLV_INFO_HDR_LEN + total_len
+        else:
+            tlv_index = self.eeprom_start
+            tlv_end = self._TLV_INFO_MAX_LEN
+
+        while (tlv_index + 2) < len(e) and tlv_index < tlv_end:
+            if not self.is_valid_tlv(e[tlv_index:]):
+                break
+
+            tlv = e[tlv_index:tlv_index + 2 + e[tlv_index + 1]]
+            code = "0x%02X" % tlv[0]
+            name, value = self.decoder(None, tlv)
+            sys_eeprom_dict[code] = value
+
+            if e[tlv_index] == self._TLV_CODE_QUANTA_CRC or \
+                    e[tlv_index] == self._TLV_CODE_CRC_32:
+                break
+            tlv_index += e[tlv_index + 1] + 2
+
+        return sys_eeprom_dict
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/fan.py b/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/fan.py
new file mode 100644
index 000000000..c693ad9f0
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/fan.py
@@ -0,0 +1,310 @@
+#!/usr/bin/env python3
+########################################################################
+#
+# Module contains an implementation of SONiC Platform Base API and
+# provides the Fans' information which are available in the platform.
+#
+########################################################################
+
+try:
+    import time
+    from sonic_platform_base.fan_base import FanBase
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found") from e
+
+
+class Fan(FanBase):
+    """Platform-specific Fan class"""
+
+    def __init__(self, interface_obj, fantray_index, fan_index, psu_fan=False, psu_index=0):
+        self.fan_dict = {}
+        self.int_case = interface_obj
+        self.fantray_index = fantray_index
+        self.fan_index = fan_index
+        self.psu_index = psu_index
+        self.is_psu_fan = psu_fan
+        self.update_time = 0
+        if not self.is_psu_fan:
+            self.name = "FAN" + str(fantray_index)
+        else:
+            self.name = "PSU" + str(psu_index)
+
+    def fan_dict_update(self):
+        local_time = time.time()
+        if not self.fan_dict or (local_time - self.update_time) >= 1:  # update data every 1 seconds
+            self.update_time = local_time
+            if not self.is_psu_fan:
+                self.fan_dict = self.int_case.get_fan_info(self.name)
+            else:
+                self.fan_dict = self.int_case.get_psu_fru_info(self.name)
+
+    def get_name(self):
+        """
+        Retrieves the fan name
+        Returns:
+            string: The name of the device
+        """
+        if not self.is_psu_fan:
+            return "Fantray{}_{}".format(self.fantray_index, self.fan_index)
+        return "PSU{}_FAN{}".format(self.psu_index, self.fan_index)
+
+    def get_model(self):
+        """
+        Retrieves the part number of the FAN
+        Returns:
+            string: Part number of FAN
+        """
+        if not self.is_psu_fan:
+            self.fan_dict_update()
+            return self.fan_dict["DisplayName"]
+        return 'N/A'
+
+    def get_serial(self):
+        """
+        Retrieves the serial number of the FAN
+        Returns:
+            string: Serial number of FAN
+        """
+        if not self.is_psu_fan:
+            self.fan_dict_update()
+            return self.fan_dict["SN"]
+        return 'N/A'
+
+    def get_presence(self):
+        """
+        Retrieves the presence of the FAN
+        Returns:
+            bool: True if fan is present, False if not
+        """
+        if not self.is_psu_fan:
+            return self.int_case.get_fan_presence(self.name)
+        return self.int_case.get_psu_presence(self.name)
+
+    def get_status(self):
+        """
+        Retrieves the operational status of the FAN
+        Returns:
+            bool: True if FAN is operating properly, False if not
+        """
+        if not self.get_presence():
+            return False
+
+        if not self.is_psu_fan:
+            fan_dir = {}
+            fan_dir = self.int_case.get_fan_info_rotor(self.name)
+            # get fan rotor pwm
+            rotor_name = "Rotor" + str(self.fan_index)
+            value = fan_dir[rotor_name]["Speed"]
+            min_speed = fan_dir[rotor_name]["SpeedMin"]
+            max_speed = fan_dir[rotor_name]["SpeedMax"]
+            tolerance = fan_dir[rotor_name]["Tolerance"]
+        else:
+            psu_status_dict = self.int_case.get_psu_status(self.name)
+            value = psu_status_dict["FanSpeed"]["Value"]
+            min_speed = psu_status_dict["FanSpeed"]["Min"]
+            max_speed = psu_status_dict["FanSpeed"]["Max"]
+            tolerance = psu_status_dict["FanSpeed"]["Tolerance"]
+
+        if isinstance(tolerance, str) or tolerance is None:
+            tolerance = 30
+
+        if isinstance(value, str) or value is None:
+            if self.is_psu_fan:
+                psu_status_dict = self.int_case.get_psu_status(self.name)
+                if psu_status_dict["OutputStatus"] is True:
+                    return True
+            return False
+
+        if value < min_speed:
+            return False
+
+        speed = int(value * 100 / max_speed)
+        if speed > 100:
+            speed = 100
+        elif speed < 0:
+            speed = 0
+        target = self.get_target_speed()
+
+        if (speed - target) > target * tolerance / 100:
+            return False
+        if (target - speed) > target * tolerance / 100:
+            return False
+
+        return True
+
+    def get_position_in_parent(self):
+        """
+        Retrieves 1-based relative physical position in parent device. If the agent cannot determine the parent-relative position
+        for some reason, or if the associated value of entPhysicalContainedIn is '0', then the value '-1' is returned
+        Returns:
+            integer: The 1-based relative physical position in parent device or -1 if cannot determine the position
+        """
+        return -1
+
+    def is_replaceable(self):
+        """
+        Indicate whether this device is replaceable.
+        Returns:
+            bool: True if it is replaceable.
+        """
+        return True
+
+    def get_direction(self):
+        """
+        Retrieves the fan airflow direction
+        Returns:
+            A string, either FAN_DIRECTION_INTAKE or FAN_DIRECTION_EXHAUST
+            depending on fan direction
+
+        Notes:
+            - Forward/Exhaust : Air flows from Port side to Fan side.
+            - Reverse/Intake  : Air flows from Fan side to Port side.
+        """
+        self.fan_dict_update()
+        air_flow = self.fan_dict["AirFlow"]
+        if air_flow is not None:
+            return air_flow
+        return self.FAN_DIRECTION_NOT_APPLICABLE
+
+    def get_speed(self):
+        """
+        Retrieves the speed of fan as a percentage of full speed
+
+        Returns:
+            An integer, the percentage of full fan speed, in the range 0 (off)
+                 to 100 (full speed)
+        """
+        if not self.get_presence():
+            return 0
+
+        if not self.is_psu_fan:
+            fan_dir = {}
+            fan_dir = self.int_case.get_fan_info_rotor(self.name)
+            # get fan rotor pwm
+            rotor_name = "Rotor" + str(self.fan_index)
+            value = fan_dir[rotor_name]["Speed"]
+            max_speed = fan_dir[rotor_name]["SpeedMax"]
+        else:
+            psu_status_dict = self.int_case.get_psu_status(self.name)
+            value = psu_status_dict["FanSpeed"]["Value"]
+            max_speed = psu_status_dict["FanSpeed"]["Max"]
+
+        if isinstance(value, str) or value is None:
+            return None
+        pwm = value * 100 / max_speed
+        if pwm > 100:
+            pwm = 100
+        elif pwm < 0:
+            pwm = 0
+        return int(pwm)
+
+    def get_speed_tolerance(self):
+        """
+        Retrieves the speed tolerance of the fan
+        Returns:
+            An integer, the percentage of variance from target speed which is
+        considered tolerable
+        """
+        # The default tolerance value is fixed as 30%
+        if not self.is_psu_fan:
+            fan_dir = {}
+            fan_dir = self.int_case.get_fan_info_rotor(self.name)
+            # get fan rotor tolerance
+            rotor_name = "Rotor" + str(self.fan_index)
+            tolerance = fan_dir[rotor_name]["Tolerance"]
+        else:
+            psu_status_dict = self.int_case.get_psu_status(self.name)
+            tolerance = psu_status_dict["FanSpeed"]["Tolerance"]
+
+        if isinstance(tolerance, str) or tolerance is None:
+            return 30
+        return tolerance
+
+    def fan_set_speed_pwm(self, pwm):
+        status = self.int_case.set_fan_speed_pwm(self.name, self.fan_index, pwm)
+        if status == -1:
+            return False
+        return True
+
+    def set_speed(self, speed):
+        """
+        Set fan speed to expected value
+        Args:
+            speed: An integer, the percentage of full fan speed to set fan to,
+                   in the range 0 (off) to 100 (full speed)
+        Returns:
+            bool: True if set success, False if fail.
+        """
+        if not self.is_psu_fan:
+            return self.fan_set_speed_pwm(speed)
+        return self.int_case.set_psu_fan_speed_pwm(self.name, int(speed))
+
+    def set_status_led(self, color):
+        """
+        Set led to expected color
+        Args:
+            color: A string representing the color with which to set the
+                   fan module status LED
+        Returns:
+            bool: True if set success, False if fail.
+        """
+        # not supported
+        return False
+
+    def get_status_led(self):
+        """
+        Gets the state of the Fan status LED
+
+        Returns:
+            A string, one of the predefined STATUS_LED_COLOR_* strings.
+        """
+        if self.is_psu_fan:
+            # No LED available for PSU Fan
+            return 'N/A'
+
+        if not self.get_presence():
+            return 'N/A'
+
+        ret, color = self.int_case.get_fan_led(self.name)
+        if ret is True:
+            return color
+        return 'N/A'
+
+    def get_target_speed(self):
+        """
+        Retrieves the target (expected) speed of the fan
+        Returns:
+            An integer, the percentage of full fan speed, in the range 0 (off)
+                 to 100 (full speed)
+        """
+        if not self.is_psu_fan:
+            # get fan rotor pwm
+            pwm = int(self.int_case.get_fan_speed_pwm(self.name, self.fan_index))
+        else:
+            pwm = self.get_speed()  # target equal to real pwm, to avoid alarm
+        if pwm is None:
+            return None
+        return int(pwm)
+
+    def get_vendor(self):
+        """
+        Retrieves the vendor name of the fan
+
+        Returns:
+            string: Vendor name of fan
+        """
+        if not self.is_psu_fan:
+            return "Micas"
+        return 'N/A'
+
+    def get_revision(self):
+        """
+        Retrieves the hardware revision of the device
+
+        Returns:
+            string: Revision value of device
+        """
+        if not self.is_psu_fan:
+            self.fan_dict_update()
+            return self.fan_dict["HW"]
+        return 'N/A'
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/fan_drawer.py b/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/fan_drawer.py
new file mode 100644
index 000000000..f0b039648
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/fan_drawer.py
@@ -0,0 +1,167 @@
+#!/usr/bin/env python3
+#
+# fan_drawer_base.py
+#
+# Abstract base class for implementing a platform-specific class with which
+# to interact with a fan drawer module in SONiC
+#
+
+try:
+    import time
+    from sonic_platform_base.fan_drawer_base import FanDrawerBase
+    from sonic_platform.fan import Fan
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found") from e
+
+
+class FanDrawer(FanDrawerBase):
+    """
+    Abstract base class for interfacing with a fan drawer
+    """
+    # Device type definition. Note, this is a constant.
+    DEVICE_TYPE = "fan_drawer"
+
+    def __init__(self, interface_obj, fantray_index):
+        FanDrawerBase.__init__(self)
+        self.fantray_dict = {}
+        self.fantray_update_time = 0
+        self.fantray_index = fantray_index
+        self.int_case = interface_obj
+        self.fantrayname = "FAN" + str(fantray_index)
+        self.num_fans_per_fantray = self.int_case.get_fan_rotor_number(self.fantrayname)
+        for i in range(self.num_fans_per_fantray):
+            self._fan_list.append(Fan(interface_obj, fantray_index, i + 1))
+
+    def fantray_dict_update(self):
+        local_time = time.time()
+        # update data every 1 seconds
+        if not self.fantray_dict or (local_time - self.fantray_update_time) >= 1:
+            self.fantray_update_time = local_time
+            self.fantray_dict = self.int_case.get_fan_info(self.fantrayname)
+
+    def get_name(self):
+        """
+        Retrieves the name of the device
+        Returns:
+            string: The name of the device
+        """
+        return "Fantray{}".format(self.fantray_index)
+
+    def get_presence(self):
+        """
+        Retrieves the presence of the FAN
+        Returns:
+            bool: True if fan is present, False if not
+        """
+        return self.int_case.get_fan_presence(self.fantrayname)
+
+    def get_model(self):
+        """
+        Retrieves the part number of the FAN
+        Returns:
+            string: Part number of FAN
+        """
+        self.fantray_dict_update()
+        return self.fantray_dict["NAME"]
+
+    def get_serial(self):
+        """
+        Retrieves the serial number of the FAN
+        Returns:
+            string: Serial number of FAN
+        """
+        self.fantray_dict_update()
+        return self.fantray_dict["SN"]
+
+    def get_revision(self):
+        """
+        Retrieves the hardware revision of the device
+
+        Returns:
+            string: Revision value of device
+        """
+        self.fantray_dict_update()
+        return self.fantray_dict["HW"]
+
+    def get_status(self):
+        """
+        Retrieves the operational status of the FAN
+        Returns:
+            bool: True if FAN is operating properly, False if not
+        """
+        for i in range(self.num_fans_per_fantray):
+            if self._fan_list[i].get_status() is False:
+                return False
+        return True
+
+    def get_position_in_parent(self):
+        """
+        Retrieves 1-based relative physical position in parent device. If the agent cannot determine the parent-relative position
+        for some reason, or if the associated value of entPhysicalContainedIn is '0', then the value '-1' is returned
+        Returns:
+            integer: The 1-based relative physical position in parent device or -1 if cannot determine the position
+        """
+        return -1
+
+    def is_replaceable(self):
+        """
+        Indicate whether this device is replaceable.
+        Returns:
+            bool: True if it is replaceable.
+        """
+        return True
+
+    def get_num_fans(self):
+        """
+        Retrieves the number of fans available on this fan drawer
+        Returns:
+            An integer, the number of fan modules available on this fan drawer
+        """
+        return len(self._fan_list)
+
+    def get_all_fans(self):
+        """
+        Retrieves all fan modules available on this fan drawer
+        Returns:
+            A list of objects derived from FanBase representing all fan
+            modules available on this fan drawer
+        """
+        return self._fan_list
+
+    def set_status_led(self, color):
+        """
+        Sets the state of the fan drawer status LED
+        Args:
+            color: A string representing the color with which to set the
+                   fan drawer status LED
+        Returns:
+            bool: True if status LED state is set successfully, False if not
+        """
+        # not supported
+        return False
+
+    def get_status_led(self):
+        """
+        Gets the state of the Fan status LED
+
+        Returns:
+            A string, one of the predefined STATUS_LED_COLOR_* strings.
+        """
+        if not self.get_presence():
+            return 'N/A'
+
+        ret, color = self.int_case.get_fan_led(self.fantrayname)
+        if ret is True:
+            return color
+        return 'N/A'
+
+    def get_maximum_consumed_power(self):
+        """
+        Retrives the maximum power drawn by Fan Drawer
+
+        Returns:
+            A float, with value of the maximum consumable power of the
+            component.
+        """
+        self.fantray_dict_update()
+        return self.fantray_dict["PowerMax"]
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/pcie.py b/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/pcie.py
new file mode 100644
index 000000000..8ea66f339
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/pcie.py
@@ -0,0 +1,21 @@
+#!/usr/bin/env python3
+# -*- coding: utf-8 -*-
+
+########################################################################
+#
+# Module contains a platform specific implementation of SONiC Platform
+# Base PCIe class
+#
+########################################################################
+
+try:
+    from sonic_platform_base.sonic_pcie.pcie_common import PcieUtil
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found") from e
+
+
+class Pcie(PcieUtil):
+    """Platform-specific Pcie class"""
+
+    def __init__(self, platform_path):
+        PcieUtil.__init__(self, platform_path)
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/platform.py b/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/platform.py
new file mode 100644
index 000000000..4d6fe03d9
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/platform.py
@@ -0,0 +1,24 @@
+#!/usr/bin/env python3
+
+#############################################################################
+#
+# Module contains an implementation of SONiC Platform Base API and
+# provides the platform information
+#
+#############################################################################
+
+try:
+    from sonic_platform_base.platform_base import PlatformBase
+    from sonic_platform.chassis import Chassis
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found") from e
+
+
+class Platform(PlatformBase):
+    """
+    Platform-specific class
+    """
+
+    def __init__(self):
+        PlatformBase.__init__(self)
+        self._chassis = Chassis()
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/psu.py b/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/psu.py
new file mode 100644
index 000000000..de661dacd
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/psu.py
@@ -0,0 +1,388 @@
+#!/usr/bin/env python3
+########################################################################
+#
+# Module contains an implementation of SONiC Platform Base API and
+# provides the PSUs' information which are available in the platform
+#
+########################################################################
+
+
+try:
+    import time
+    from sonic_platform_base.psu_base import PsuBase
+    from sonic_platform.fan import Fan
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found") from e
+
+
+class Psu(PsuBase):
+    """Platform-specific PSU class"""
+
+    def __init__(self, interface_obj, index):
+        self.psu_dict = {}
+        self.psu_status_dict = {}
+        self.psu_power_dict = {}
+        self._fan_list = []
+        self._thermal_list = []
+        self.int_case = interface_obj
+        self.index = index
+        self.name = "PSU" + str(index)
+
+        self.psu_dict_update_time = 0
+        self.psu_status_dict_update_time = 0
+        self.psu_power_dict_update_time = 0
+
+        self._fan_list.append(Fan(self.int_case, 1, 1, psu_fan=True, psu_index=index))
+
+    def psu_dict_update(self):
+        local_time = time.time()
+        if not self.psu_dict or (local_time - self.psu_dict_update_time) >= 1:  # update data every 1 seconds
+            self.psu_dict_update_time = local_time
+            self.psu_dict = self.int_case.get_psu_fru_info(self.name)
+
+    def psu_status_dict_update(self):
+        local_time = time.time()
+        if not self.psu_status_dict or (
+                local_time - self.psu_status_dict_update_time) >= 1:  # update data every 1 seconds
+            self.psu_status_dict_update_time = local_time
+            self.psu_status_dict = self.int_case.get_psu_status(self.name)
+
+    def psu_power_dict_update(self):
+        local_time = time.time()
+        if not self.psu_power_dict or (
+                local_time - self.psu_power_dict_update_time) >= 1:  # update data every 1 seconds
+            self.psu_power_dict_update_time = local_time
+            self.psu_power_dict = self.int_case.get_psu_power_status(self.name)
+
+    def get_name(self):
+        """
+        Retrieves the name of the device
+
+        Returns:
+            string: The name of the device
+        """
+        return "Psu{}".format(self.index)
+
+    def get_presence(self):
+        """
+        Retrieves the presence of the Power Supply Unit (PSU)
+
+        Returns:
+            bool: True if PSU is present, False if not
+        """
+        return self.int_case.get_psu_presence(self.name)
+
+    def get_model(self):
+        """
+        Retrieves the part number of the PSU
+
+        Returns:
+            string: Part number of PSU
+        """
+        self.psu_dict_update()
+        return self.psu_dict["DisplayName"]
+
+    def get_serial(self):
+        """
+        Retrieves the serial number of the PSU
+
+        Returns:
+            string: Serial number of PSU
+        """
+        self.psu_dict_update()
+        return self.psu_dict["SN"]
+
+    def get_status(self):
+        """
+        Retrieves the operational status of the PSU
+
+        Returns:
+            bool: True if PSU is operating properly, False if not
+        """
+        return self.int_case.get_psu_input_output_status(self.name)
+
+    def get_position_in_parent(self):
+        """
+        Retrieves 1-based relative physical position in parent device. If the agent cannot determine the parent-relative position
+        for some reason, or if the associated value of entPhysicalContainedIn is '0', then the value '-1' is returned
+        Returns:
+            integer: The 1-based relative physical position in parent device or -1 if cannot determine the position
+        """
+        return -1
+
+    def is_replaceable(self):
+        """
+        Indicate whether this device is replaceable.
+        Returns:
+            bool: True if it is replaceable.
+        """
+        return True
+
+    def get_voltage(self):
+        """
+        Retrieves current PSU voltage output
+
+        Returns:
+            A float number, the output voltage in volts,
+            e.g. 12.1
+        """
+        self.psu_status_dict_update()
+        if self.psu_status_dict["OutputStatus"] is False:
+            value = 0
+        else:
+            self.psu_power_dict_update()
+            value = self.psu_power_dict["Outputs"]["Voltage"]["Value"]
+            if value is None:
+                return None
+        return round(float(value), 1)
+
+    def get_current(self):
+        """
+        Retrieves present electric current supplied by PSU
+
+        Returns:
+            A float number, electric current in amperes,
+            e.g. 15.4
+        """
+        self.psu_status_dict_update()
+        if self.psu_status_dict["OutputStatus"] is False:
+            value = 0
+        else:
+            self.psu_power_dict_update()
+            value = self.psu_power_dict["Outputs"]["Current"]["Value"]
+            if value is None:
+                return None
+        return round(float(value), 1)
+
+    def get_power(self):
+        """
+        Retrieves current energy supplied by PSU
+
+        Returns:
+            A float number, the power in watts,
+            e.g. 302.6
+        """
+        self.psu_status_dict_update()
+        if self.psu_status_dict["OutputStatus"] is False:
+            value = 0
+        else:
+            self.psu_power_dict_update()
+            value = self.psu_power_dict["Outputs"]["Power"]["Value"]
+            if value is None:
+                return None
+        return round(float(value), 1)
+
+    def get_powergood_status(self):
+        """
+        Retrieves the powergood status of PSU
+
+        Returns:
+            A boolean, True if PSU has stablized its output voltages and
+            passed all its internal self-tests, False if not.
+        """
+        return self.int_case.get_psu_input_output_status(self.name)
+
+    def get_status_led(self):
+        """
+        Gets the state of the PSU status LED
+
+        Returns:
+            A string, one of the predefined STATUS_LED_COLOR_* strings.
+        """
+        if not self.get_presence():
+            return "N/A"
+        if self.int_case.get_psu_input_output_status(self.name):
+            return self.STATUS_LED_COLOR_GREEN
+        return self.STATUS_LED_COLOR_RED
+
+    def set_status_led(self, color):
+        """
+        Sets the state of the PSU status LED
+        Args:
+            color: A string representing the color with which to set the
+                   PSU status LED
+        Returns:
+            bool: True if status LED state is set successfully, False if
+                  not
+        """
+        # not supported
+        return False
+
+    def get_temperature(self):
+        """
+        Retrieves current temperature reading from PSU
+
+        Returns:
+            A float number of current temperature in Celsius up to nearest thousandth
+            of one degree Celsius, e.g. 30.125
+        """
+        self.psu_status_dict_update()
+        value = self.psu_status_dict["Temperature"]["Value"]
+        if value is None:
+            return None
+        return round(float(value), 1)
+
+    def get_temperature_high_threshold(self):
+        """
+        Retrieves the high threshold temperature of PSU
+
+        Returns:
+            A float number, the high threshold temperature of PSU in Celsius
+            up to nearest thousandth of one degree Celsius, e.g. 30.125
+        """
+        self.psu_status_dict_update()
+        value = self.psu_status_dict["Temperature"]["Max"]
+        if value is None:
+            return None
+        return round(float(value), 1)
+
+    def get_voltage_high_threshold(self):
+        """
+        Retrieves the high threshold PSU voltage output
+
+        Returns:
+            A float number, the high threshold output voltage in volts,
+            e.g. 12.1
+        """
+        self.psu_power_dict_update()
+        value = self.psu_power_dict["Outputs"]["Voltage"]["HighAlarm"]
+        if value is None:
+            return None
+        return round(float(value), 1)
+
+    def get_voltage_low_threshold(self):
+        """
+        Retrieves the low threshold PSU voltage output
+
+        Returns:
+            A float number, the low threshold output voltage in volts,
+            e.g. 12.1
+        """
+        self.psu_power_dict_update()
+        value = self.psu_power_dict["Outputs"]["Voltage"]["LowAlarm"]
+        if value is None:
+            return None
+        return round(float(value), 1)
+
+    def get_input_voltage(self):
+        """
+        Get the input voltage of the PSU
+
+        Returns:
+            A float number, the input voltage in volts,
+        """
+        self.psu_status_dict_update()
+        if self.psu_status_dict["InputStatus"] is False:
+            value = 0
+        else:
+            self.psu_power_dict_update()
+            value = self.psu_power_dict["Inputs"]["Voltage"]["Value"]
+            if value is None:
+                return None
+        return round(float(value), 1)
+
+    def get_input_current(self):
+        """
+        Get the input electric current of the PSU
+
+        Returns:
+            A float number, the input current in amperes, e.g 220.3
+        """
+        self.psu_status_dict_update()
+        if self.psu_status_dict["InputStatus"] is False:
+            value = 0
+        else:
+            self.psu_power_dict_update()
+            value = self.psu_power_dict["Inputs"]["Current"]["Value"]
+            if value is None:
+                return None
+        return round(float(value), 1)
+
+    def get_input_power(self):
+        """
+        Get the input current energy of the PSU
+
+        Returns:
+            A float number, the input power in watts, e.g. 302.6
+        """
+        self.psu_status_dict_update()
+        if self.psu_status_dict["InputStatus"] is False:
+            value = 0
+        else:
+            self.psu_power_dict_update()
+            value = self.psu_power_dict["Inputs"]["Power"]["Value"]
+            if value is None:
+                return None
+        return round(float(value), 1)
+
+    def get_revision(self):
+        """
+        Retrieves the hardware revision of the device
+
+        Returns:
+            string: Revision value of device
+        """
+        self.psu_dict_update()
+        return self.psu_dict["HW"]
+
+    def get_vendor(self):
+        """
+        Retrieves the vendor name of the psu
+
+        Returns:
+            string: Vendor name of psu
+        """
+        self.psu_dict_update()
+        return self.psu_dict["VENDOR"]
+
+    def get_maximum_supplied_power(self):
+        """
+        Retrieves the maximum supplied power by PSU
+
+        Returns:
+            A float number, the maximum power output in Watts.
+            e.g. 1200.1
+        """
+        return False
+
+    def get_thermal(self, index):
+        """
+        Retrieves thermal unit represented by (0-based) index <index>
+
+        Args:
+            index: An integer, the index (0-based) of the thermal to
+            retrieve
+
+        Returns:
+            An object dervied from ThermalBase representing the specified thermal
+        """
+        return False
+
+    def get_psu_power_warning_suppress_threshold(self):
+        """
+        Retrieve the warning suppress threshold of the power on this PSU
+        The value can be volatile, so the caller should call the API each time it is used.
+    
+        Returns:
+            A float number, the warning suppress threshold of the PSU in watts.
+        """
+        self.psu_power_dict_update()
+        value = self.psu_power_dict["Outputs"]["Power"]["HighAlarm"]
+        if value is None:
+            return None
+        return round(float(value), 1)
+    
+    def get_psu_power_critical_threshold(self):
+        """
+        Retrieve the critical threshold of the power on this PSU
+        The value can be volatile, so the caller should call the API each time it is used.
+    
+        Returns:
+            A float number, the critical threshold of the PSU in watts.
+        """
+        self.psu_power_dict_update()
+        value = self.psu_power_dict["Outputs"]["Power"]["HighAlarm"]
+        if value is None:
+            return None
+        return round(float(value), 1)
+
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/sfp.py b/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/sfp.py
new file mode 100644
index 000000000..3fc22b4b6
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/sfp.py
@@ -0,0 +1,634 @@
+#!/usr/bin/python
+# -*- coding: UTF-8 -*-
+
+#############################################################################
+#
+# Module contains an implementation of SONiC Platform Base API and
+# provides the platform information
+#
+#
+# *_device.py config version instruction:
+#      ver 1.0 - platform api:
+#           "presence_cpld": {
+#               "dev_id": {
+#                   [dev_id]: {
+#                       "offset": {
+#                           [offset]: [port_id]
+#                       }
+#                    }
+#                 }
+#              }
+#           "reset_cpld": {
+#               "dev_id": {
+#                   [dev_id]: {
+#                       "offset": {
+#                           [offset]: [port_id]
+#                       }
+#                    }
+#                 }
+#           }
+#      ver 2.0 - wb_plat:
+#               "presence_path": "/xx/wb_plat/xx[port_id]/present"
+#               "eeprom_path": "/sys/bus/i2c/devices/i2c-[bus]/[bus]-0050/eeprom"
+#               "reset_path": "/xx/wb_plat/xx[port_id]/reset"
+#############################################################################
+import sys
+import time
+import syslog
+import traceback
+from abc import abstractmethod
+
+configfile_pre = "/usr/local/bin/"
+sys.path.append(configfile_pre)
+
+try:
+    from platform_intf import *
+    from sonic_platform_base.sonic_xcvr.sfp_optoe_base import SfpOptoeBase
+    from plat_hal.baseutil import baseutil
+
+except ImportError as error:
+    raise ImportError(str(error) + "- required module not found") from error
+
+LOG_DEBUG_LEVEL = 1
+LOG_WARNING_LEVEL = 2
+LOG_ERROR_LEVEL = 3
+
+
+class Sfp(SfpOptoeBase):
+
+    OPTOE_DRV_TYPE1 = 1
+    OPTOE_DRV_TYPE2 = 2
+    OPTOE_DRV_TYPE3 = 3
+
+    # index must start at 1
+    def __init__(self, index):
+        SfpOptoeBase.__init__(self)
+        self.sfp_type = None
+        sfp_config = baseutil.get_config().get("sfps", None)
+        self.log_level_config = sfp_config.get("log_level", LOG_WARNING_LEVEL)
+        # Init instance of SfpCust
+        ver = sfp_config.get("ver", None)
+        if ver is None:
+            self._sfplog(LOG_ERROR_LEVEL, "Get Ver Config Error!")
+        vers = int(float(ver))
+        if vers == 1:
+            self._sfp_api = SfpV1(index)
+        elif vers == 2:
+            self._sfp_api = SfpV2(index)
+        else:
+            self._sfplog(LOG_ERROR_LEVEL, "Get SfpVer Error!")
+
+    def get_eeprom_path(self):
+        return self._sfp_api._get_eeprom_path()
+
+    def read_eeprom(self, offset, num_bytes):
+        return self._sfp_api.read_eeprom(offset, num_bytes)
+
+    def get_presence(self):
+        return self._sfp_api.get_presence()
+
+    def get_transceiver_info(self):
+        # temporary solution for a sonic202111 bug
+        transceiver_info = super().get_transceiver_info()
+        try:
+            if transceiver_info == None:
+                return None
+            if transceiver_info['cable_type'] == None:
+                transceiver_info['cable_type'] = 'N/A'
+            if transceiver_info["vendor_rev"] is not None:
+                transceiver_info["hardware_rev"] = transceiver_info["vendor_rev"]
+        except BaseException:
+            print(traceback.format_exc())
+            return None
+        return transceiver_info
+
+    def get_reset_status(self):
+        if self.get_presence() is False:
+            return False
+
+        if self.sfp_type is None:
+            self.refresh_xcvr_api()
+
+        if self.sfp_type == 'SFP':
+            self._sfplog(LOG_ERROR_LEVEL, 'SFP does not support reset')
+            return False
+
+        ret = self._sfp_api.get_reset_status()
+        return ret
+
+    def reset(self):
+        if self.get_presence() is False:
+            return False
+
+        if self.sfp_type is None:
+            self.refresh_xcvr_api()
+
+        if self.sfp_type == 'SFP':
+            self._sfplog(LOG_ERROR_LEVEL, 'SFP does not support reset')
+            return False
+
+        self._sfplog(LOG_DEBUG_LEVEL, 'resetting...')
+        ret = self._sfp_api.set_reset(True)
+        if ret:
+            time.sleep(0.5)
+            ret = self._sfp_api.set_reset(False)
+
+        return ret
+
+    def get_lpmode(self):
+        if self.get_presence() is False:
+            return False
+
+        if self.sfp_type is None:
+            self.refresh_xcvr_api()
+
+        if self.sfp_type == 'QSFP' or self.sfp_type == 'QSFP-DD':
+            return SfpOptoeBase.get_lpmode(self)
+
+            self._sfplog(LOG_WARNING_LEVEL, 'SFP does not support lpmode')
+            return False
+
+    def set_lpmode(self, lpmode):
+        if self.get_presence() is False:
+            return False
+
+        if self.sfp_type is None or self._xcvr_api is None:
+            self.refresh_xcvr_api()
+
+        if self.sfp_type == 'QSFP-DD' or self.sfp_type == 'QSFP':
+            return SfpOptoeBase.set_lpmode(self, lpmode)
+
+        self._sfplog(LOG_WARNING_LEVEL, 'SFP does not support lpmode')
+        return False
+
+    def get_tx_disable(self):
+        if self.get_presence() is False:
+            return False
+
+        if self.sfp_type is None:
+            self.refresh_xcvr_api()
+
+        if self.sfp_type == 'SFP':
+            return self._sfp_api.get_tx_disable()
+
+        return SfpOptoeBase.get_tx_disable(self)
+
+    def get_tx_disable_channel(self):
+        if self.get_presence() is False:
+            return False
+
+        if self.sfp_type is None:
+            self.refresh_xcvr_api()
+
+        if self.sfp_type == 'SFP':
+            return self._sfp_api.get_tx_disable_channel()
+
+        return SfpOptoeBase.get_tx_disable_channel(self)
+
+    def tx_disable(self, tx_disable):
+        if self.get_presence() is False:
+            return False
+
+        if self.sfp_type is None:
+            self.refresh_xcvr_api()
+
+        if self.sfp_type == 'SFP':
+            return self._sfp_api.set_tx_disable(tx_disable)
+
+        return SfpOptoeBase.tx_disable(self, tx_disable)
+
+    def tx_disable_channel(self, channel, disable):
+        if self.get_presence() is False:
+            return False
+
+        if self.sfp_type is None:
+            self.refresh_xcvr_api()
+
+        if self.sfp_type == 'SFP':
+            self._sfplog(LOG_WARNING_LEVEL, 'SFP does not support tx disable channel')
+            return False
+
+        return SfpOptoeBase.tx_disable_channel(self, channel, disable)
+
+    def set_optoe_write_max(self, write_max):
+        """
+        This func is declared and implemented by SONiC but we're not supported
+        so override it as NotImplemented
+        """
+        self._sfplog(LOG_DEBUG_LEVEL, "set_optoe_write_max NotImplemented")
+
+    def refresh_xcvr_api(self):
+        """
+        Updates the XcvrApi associated with this SFP
+        """
+        self._xcvr_api = self._xcvr_api_factory.create_xcvr_api()
+        class_name = self._xcvr_api.__class__.__name__
+        optoe_type = None
+        # set sfp_type
+        if 'CmisApi' in class_name:
+            self.sfp_type = 'QSFP-DD'
+            optoe_type = self.OPTOE_DRV_TYPE3
+        elif 'Sff8472Api' in class_name:
+            self.sfp_type = 'SFP'
+            optoe_type = self.OPTOE_DRV_TYPE2
+        elif ('Sff8636Api' in class_name or 'Sff8436Api' in class_name):
+            self.sfp_type = 'QSFP'
+            optoe_type = self.OPTOE_DRV_TYPE1
+        # set optoe driver
+        if optoe_type is not None:
+            self._sfp_api.set_optoe_type(optoe_type)
+
+    def _sfplog(self, log_level, msg):
+        if log_level >= self.log_level_config:
+            try:
+                syslog.openlog("Sfp")
+                if log_level == LOG_DEBUG_LEVEL:
+                    syslog.syslog(syslog.LOG_DEBUG, msg)
+                elif log_level == LOG_WARNING_LEVEL:
+                    syslog.syslog(syslog.LOG_DEBUG, msg)
+                elif log_level == LOG_ERROR_LEVEL:
+                    syslog.syslog(syslog.LOG_ERR, msg)
+                syslog.closelog()
+
+            except BaseException:
+                print(traceback.format_exc())
+
+
+class SfpCust():
+    def __init__(self, index):
+        self.eeprom_path = None
+        self._init_config(index)
+
+    def _init_config(self, index):
+        sfp_config = baseutil.get_config().get("sfps", None)
+        self.log_level_config = sfp_config.get("log_level", LOG_WARNING_LEVEL)
+        self._port_id = index
+        self.eeprom_retry_times = sfp_config.get("eeprom_retry_times", 0)
+        self.eeprom_retry_break_sec = sfp_config.get("eeprom_retry_break_sec", 0)
+
+    def _get_eeprom_path(self):
+        return self.eeprom_path or None
+
+    @abstractmethod
+    def get_presence(self):
+        pass
+
+    def read_eeprom(self, offset, num_bytes):
+        try:
+            for i in range(self.eeprom_retry_times):
+                with open(self._get_eeprom_path(), mode='rb', buffering=0) as f:
+                    f.seek(offset)
+                    result = f.read(num_bytes)
+                    # temporary solution for a sonic202111 bug
+                    if len(result) < num_bytes:
+                        result = result[::-1].zfill(num_bytes)[::-1]
+                    if result is not None:
+                        return bytearray(result)
+                    time.sleep(self.eeprom_retry_break_sec)
+                    continue
+
+        except BaseException:
+            self._sfplog(LOG_ERROR_LEVEL, traceback.format_exc())
+        return None
+
+    def write_eeprom(self, offset, num_bytes, write_buffer):
+        try:
+            for i in range(self.eeprom_retry_times):
+                ret = SfpOptoeBase.write_eeprom(self, offset, num_bytes, write_buffer)
+                if ret is False:
+                    time.sleep(self.eeprom_retry_break_sec)
+                    continue
+                break
+
+            return ret
+        except BaseException:
+            self._sfplog(LOG_ERROR_LEVEL, traceback.format_exc())
+            return False
+
+    @abstractmethod
+    def set_optoe_type(self, optoe_type):
+        pass
+
+    @abstractmethod
+    def set_reset(self, reset):
+        pass
+
+    def _convert_str_range_to_int_arr(self, range_str):
+        if not range_str:
+            return []
+
+        int_range_strs = range_str.split(',')
+        range_res = []
+        for int_range_str in int_range_strs:
+            if '-' in int_range_str:
+                range_s = int(int_range_str.split('-')[0])
+                range_e = int(int_range_str.split('-')[1]) + 1
+            else:
+                range_s = int(int_range_str)
+                range_e = int(int_range_str) + 1
+
+            range_res = range_res + list(range(range_s, range_e))
+
+        return range_res
+
+    def _sfplog(self, log_level, msg):
+        if log_level >= self.log_level_config:
+            try:
+                syslog.openlog("SfpCust")
+                if log_level == LOG_DEBUG_LEVEL:
+                    syslog.syslog(syslog.LOG_DEBUG, msg)
+                elif log_level == LOG_WARNING_LEVEL:
+                    syslog.syslog(syslog.LOG_DEBUG, msg)
+                elif log_level == LOG_ERROR_LEVEL:
+                    syslog.syslog(syslog.LOG_ERR, msg)
+                syslog.closelog()
+
+            except BaseException:
+                print(traceback.format_exc())
+
+
+class SfpV1(SfpCust):
+    def _init_config(self, index):
+        super()._init_config(index)
+        # init presence path
+        sfp_config = baseutil.get_config().get("sfps", None)
+
+        eeprom_path_config = sfp_config.get("eeprom_path", None)
+        eeprom_path_key = sfp_config.get("eeprom_path_key")[self._port_id - 1]
+        self.eeprom_path = None if eeprom_path_config is None else eeprom_path_config % (
+            eeprom_path_key, eeprom_path_key)
+        self._sfplog(LOG_DEBUG_LEVEL, "Done init eeprom path: %s" % self.eeprom_path)
+
+        self.presence_cpld = sfp_config.get("presence_cpld", None)
+        self.presence_val_is_present = sfp_config.get("presence_val_is_present", 0)
+        self._sfplog(LOG_DEBUG_LEVEL, "Done init presence path")
+
+        # init reset path
+        self.reset_cpld = sfp_config.get("reset_cpld", None)
+        self.reset_val_is_reset = sfp_config.get("reset_val_is_reset", 0)
+        self._sfplog(LOG_DEBUG_LEVEL, "Done init cpld path")
+
+        # init tx_disable path
+        self.txdis_cpld = sfp_config.get("txdis_cpld", None)
+        self.txdisable_val_is_on = sfp_config.get("txdisable_val_is_on", 0)
+        self._sfplog(LOG_DEBUG_LEVEL, "Done init cpld tx_disable path")
+
+    def get_presence(self):
+        if self.presence_cpld is None:
+            self._sfplog(LOG_ERROR_LEVEL, "presence_cpld is None!")
+            return False
+        try:
+            dev_id, offset, offset_bit = self._get_sfp_cpld_info(self.presence_cpld)
+            if dev_id == -1:
+                return False
+            ret, info = platform_reg_read(0, dev_id, offset, 1)
+            if (ret is False
+                    or info is None):
+                return False
+            return info[0] & (1 << offset_bit) == self.presence_val_is_present
+        except BaseException:
+            self._sfplog(LOG_ERROR_LEVEL, traceback.format_exc())
+            return False
+
+    def get_reset_status(self):
+        if self.reset_cpld is None:
+            self._sfplog(LOG_ERROR_LEVEL, "reset_cpld is None!")
+            return False
+        try:
+            dev_id, offset, offset_bit = self._get_sfp_cpld_info(self.reset_cpld)
+            if dev_id == -1:
+                return False
+            ret, info = platform_reg_read(0, dev_id, offset, 1)
+            if (ret is False
+                    or info is None):
+                self._sfplog(LOG_ERROR_LEVEL, "platform_reg_read error!")
+                return False
+
+            return (info[0] & (1 << offset_bit) == self.reset_val_is_reset)
+        except BaseException:
+            self._sfplog(LOG_ERROR_LEVEL, traceback.format_exc())
+            return False
+
+    def get_tx_disable(self):
+        if self.reset_cpld is None:
+            self._sfplog(LOG_ERROR_LEVEL, "txdis_cpld is None!")
+            return None
+
+        try:
+            tx_disable_list = []
+            dev_id, offset, offset_bit = self._get_sfp_cpld_info(self.txdis_cpld)
+            if dev_id == -1:
+                return False
+            ret, info = platform_reg_read(0, dev_id, offset, 1)
+            if (ret is False
+                    or info is None):
+                self._sfplog(LOG_ERROR_LEVEL, "platform_reg_read error!")
+                return None
+            if self.txdisable_val_is_on == 1:
+                tx_disable_list.append(info[0] & (1 << offset_bit) != 0)
+            else:
+                tx_disable_list.append(info[0] & (1 << offset_bit) == 0)
+        except BaseException:
+            self._sfplog(LOG_ERROR_LEVEL, traceback.format_exc())
+            return None
+
+        return tx_disable_list
+
+    def get_tx_disable_channel(self):
+        tx_disable_list = []
+        tx_disable_list = self.get_tx_disable()
+        if tx_disable_list is None:
+            return 0
+
+        tx_disabled = 0
+        for i in range(len(tx_disable_list)):
+            if tx_disable_list[i]:
+                tx_disabled |= 1 << i
+
+        return tx_disabled
+
+    def read_eeprom(self, offset, num_bytes):
+        try:
+            for i in range(self.eeprom_retry_times):
+                ret, info = platform_sfp_read(self._port_id, offset, num_bytes)
+                if (ret is False
+                        or info is None):
+                    time.sleep(self.eeprom_retry_break_sec)
+                    continue
+                eeprom_raw = []
+                for i in range(0, num_bytes):
+                    eeprom_raw.append(0)
+                for n in range(0, len(info)):
+                    eeprom_raw[n] = info[n]
+                # temporary solution for a sonic202111 bug
+                if len(eeprom_raw) < num_bytes:
+                    eeprom_raw = eeprom_raw[::-1].zfill(num_bytes)[::-1]
+                return bytearray(eeprom_raw)
+        except BaseException:
+            self._sfplog(LOG_ERROR_LEVEL, traceback.format_exc())
+        return None
+
+    def set_optoe_type(self, optoe_type):
+        ret, info = platform_get_optoe_type(self._port_id)
+        if ret is True and info != optoe_type:
+            try:
+                ret, _ = platform_set_optoe_type(self._port_id, optoe_type)
+            except Exception as err:
+                self._sfplog(LOG_ERROR_LEVEL, "Set optoe err %s" % err)
+
+    def set_reset(self, reset):
+        if self.reset_cpld is None:
+            self._sfplog(LOG_ERROR_LEVEL, "reset_cpld is None!")
+            return False
+        try:
+            val = []
+            dev_id, offset, offset_bit = self._get_sfp_cpld_info(self.reset_cpld)
+            if dev_id == -1:
+                return False
+            ret, info = platform_reg_read(0, dev_id, offset, 1)
+            if (ret is False
+                    or info is None):
+                self._sfplog(LOG_ERROR_LEVEL, "platform_reg_read error!")
+                return False
+
+            if self.reset_val_is_reset == 0:
+                if reset:
+                    val.append(info[0] & (~(1 << offset_bit)))
+                else:
+                    val.append(info[0] | (1 << offset_bit))
+            else:
+                if reset:
+                    val.append(info[0] | (1 << offset_bit))
+                else:
+                    val.append(info[0] & (~(1 << offset_bit)))
+
+            ret, info = platform_reg_write(0, dev_id, offset, val)
+            if ret is False:
+                self._sfplog(LOG_ERROR_LEVEL, "platform_reg_write error!")
+                return False
+
+        except BaseException:
+            self._sfplog(LOG_ERROR_LEVEL, traceback.format_exc())
+            return False
+
+        return True
+
+    def set_tx_disable(self, tx_disable):
+        if self.txdis_cpld is None:
+            self._sfplog(LOG_ERROR_LEVEL, "txdis_cpld is None!")
+            return False
+        try:
+            val = []
+            dev_id, offset, offset_bit = self._get_sfp_cpld_info(self.txdis_cpld)
+            if dev_id == -1:
+                return False
+            ret, info = platform_reg_read(0, dev_id, offset, 1)
+            if (ret is False
+                    or info is None):
+                self._sfplog(LOG_ERROR_LEVEL, "platform_reg_read error!")
+                return False
+
+            if self.txdisable_val_is_on == 0:
+                if tx_disable:
+                    val.append(info[0] & (~(1 << offset_bit)))
+                else:
+                    val.append(info[0] | (1 << offset_bit))
+            else:
+                if tx_disable:
+                    val.append(info[0] | (1 << offset_bit))
+                else:
+                    val.append(info[0] & (~(1 << offset_bit)))
+
+            ret, info = platform_reg_write(0, dev_id, offset, val)
+            if ret is False:
+                self._sfplog(LOG_ERROR_LEVEL, "platform_reg_write error!")
+                return False
+
+        except BaseException:
+            self._sfplog(LOG_ERROR_LEVEL, traceback.format_exc())
+            return False
+
+        return True
+
+    def _get_sfp_cpld_info(self, cpld_config):
+        dev_id = -1
+        offset = -1
+        offset_bit = -1
+        for dev_id_temp in cpld_config["dev_id"]:
+            for offset_temp in cpld_config["dev_id"][dev_id_temp]["offset"]:
+                port_range_str = cpld_config["dev_id"][dev_id_temp]["offset"][offset_temp]
+                port_range_int = self._convert_str_range_to_int_arr(port_range_str)
+                if self._port_id in port_range_int:
+                    dev_id = dev_id_temp
+                    offset = offset_temp
+                    offset_bit = port_range_int.index(self._port_id)
+                    break
+
+        return dev_id, offset, offset_bit
+
+
+class SfpV2(SfpCust):
+    def _init_config(self, index):
+        super()._init_config(index)
+        # init eeprom path
+        sfp_config = baseutil.get_config().get("sfps", None)
+        eeprom_path_config = sfp_config.get("eeprom_path", None)
+        eeprom_path_key = sfp_config.get("eeprom_path_key")[self._port_id - 1]
+        self.eeprom_path = None if eeprom_path_config is None else eeprom_path_config % (
+            eeprom_path_key, eeprom_path_key)
+        self._sfplog(LOG_DEBUG_LEVEL, "Done init eeprom path: %s" % self.eeprom_path)
+
+        # init presence path
+        self.presence_path = None if sfp_config.get("presence_path",
+                                                    None) is None else sfp_config.get("presence_path") % self._port_id
+        self.presence_val_is_present = sfp_config.get("presence_val_is_present", 0)
+        self._sfplog(LOG_DEBUG_LEVEL, "Done init presence path: %s" % self.presence_path)
+
+        # init optoe driver path
+        optoe_driver_path = sfp_config.get("optoe_driver_path", None)
+        optoe_driver_key = sfp_config.get("optoe_driver_key")[self._port_id - 1]
+        self.dev_class_path = None if optoe_driver_path is None else optoe_driver_path % (
+            optoe_driver_key, optoe_driver_key)
+        self._sfplog(LOG_DEBUG_LEVEL, "Done init optoe driver path: %s" % self.dev_class_path)
+
+        # init reset path
+        self.reset_path = None if sfp_config.get(
+            "reset_path",
+            None) is None else sfp_config.get(
+            "reset_path",
+            None) % self._port_id
+        self.reset_val_is_reset = sfp_config.get("reset_val_is_reset", 0)
+        self._sfplog(LOG_DEBUG_LEVEL, "Done init reset path: %s" % self.reset_path)
+
+    def get_presence(self):
+        if self.presence_path is None:
+            self._sfplog(LOG_ERROR_LEVEL, "presence_path is None!")
+            return False
+        try:
+            with open(self.presence_path, "rb") as data:
+                sysfs_data = data.read(1)
+                if sysfs_data != "":
+                    result = int(sysfs_data, 16)
+            return result == self.presence_val_is_present
+        except BaseException:
+            self._sfplog(LOG_ERROR_LEVEL, traceback.format_exc())
+            return False
+
+    def set_reset(self, reset):
+        return True
+
+    def set_optoe_type(self, optoe_type):
+        if self.dev_class_path is None:
+            self._sfplog(LOG_ERROR_LEVEL, "dev_class_path is None!")
+            return False
+        try:
+            with open(self.dev_class_path, "r+") as dc_file:
+                dc_file_val = dc_file.read(1)
+                if int(dc_file_val) != optoe_type:
+                    dc_str = "%s" % str(optoe_type)
+                    dc_file.write(dc_str)
+                    # dc_file.close()
+        except BaseException:
+            self._sfplog(LOG_ERROR_LEVEL, traceback.format_exc())
+            return False
+        return True
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/thermal.py b/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/thermal.py
new file mode 100644
index 000000000..4632de3bc
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/thermal.py
@@ -0,0 +1,234 @@
+#!/usr/bin/env python3
+
+########################################################################
+#
+# Module contains an implementation of SONiC Platform Base API and
+# provides the Thermals' information which are available in the platform
+#
+########################################################################
+
+
+try:
+    import time
+    from sonic_platform_base.thermal_base import ThermalBase
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found") from e
+
+
+class Thermal(ThermalBase):
+
+    def __init__(self, interface_obj, index):
+        self.temp_dict = {}
+        self.temperature_list = []
+        self.int_case = interface_obj
+        self.index = index
+        self.update_time = 0
+        self.temp_id = "TEMP" + str(index)
+
+    def temp_dict_update(self):
+        local_time = time.time()
+        if not self.temp_dict or (local_time - self.update_time) >= 1:  # update data every 1 seconds
+            self.update_time = local_time
+            self.temp_dict = self.int_case.get_monitor_temp_by_id(self.temp_id)
+
+    def get_name(self):
+        """
+        Retrieves the name of the thermal
+
+        Returns:
+            string: The name of the thermal
+        """
+        self.temp_dict_update()
+        return self.temp_dict["Api_name"]
+
+    def get_presence(self):
+        """
+        Retrieves the presence of the thermal
+
+        Returns:
+            bool: True if thermal is present, False if not
+        """
+        return True
+
+    def get_model(self):
+        """
+        Retrieves the model number (or part number) of the Thermal
+
+        Returns:
+            string: Model/part number of Thermal
+        """
+        return "N/A"
+
+    def get_serial(self):
+        """
+        Retrieves the serial number of the Thermal
+
+        Returns:
+            string: Serial number of Thermal
+        """
+        return "N/A"
+
+    def get_revision(self):
+        """
+        Retrieves the hardware revision of the device
+
+        Returns:
+            string: Revision value of device
+        """
+        return "N/A"
+
+    def get_status(self):
+        """
+        Retrieves the operational status of the thermal
+
+        Returns:
+            A boolean value, True if thermal is operating properly,
+            False if not
+        """
+        self.temp_dict_update()
+        if (self.temp_dict["Value"] >= self.temp_dict["High"]) or (self.temp_dict["Value"] <= self.temp_dict["Low"]):
+            return False
+
+        return True
+
+    def get_position_in_parent(self):
+        """
+        Retrieves 1-based relative physical position in parent device. If the agent cannot determine the parent-relative position
+        for some reason, or if the associated value of entPhysicalContainedIn is '0', then the value '-1' is returned
+        Returns:
+            integer: The 1-based relative physical position in parent device or -1 if cannot determine the position
+        """
+        return -1
+
+    def is_replaceable(self):
+        """
+        Indicate whether this device is replaceable.
+        Returns:
+            bool: True if it is replaceable.
+        """
+        return False
+
+    def get_temperature(self):
+        """
+        Retrieves current temperature reading from thermal
+
+        Returns:
+            A float number of current temperature in Celsius up to nearest thousandth
+            of one degree Celsius, e.g. 30.125
+        """
+        self.temp_dict_update()
+        value = self.temp_dict["Value"]
+        if value is None or value == self.int_case.error_ret:
+            return "N/A"
+        if len(self.temperature_list) >= 1000:
+            del self.temperature_list[0]
+        self.temperature_list.append(float(value))
+        return round(float(value), 1)
+
+    def get_high_threshold(self):
+        """
+        Retrieves the high threshold temperature of thermal
+
+        Returns:
+            A float number, the high threshold temperature of thermal in Celsius
+            up to nearest thousandth of one degree Celsius, e.g. 30.125
+        """
+        self.temp_dict_update()
+        value = self.temp_dict["High"]
+        if value is None or value == self.int_case.error_ret:
+            return "N/A"
+        return round(float(value), 1)
+
+    def get_low_threshold(self):
+        """
+        Retrieves the low threshold temperature of thermal
+
+        Returns:
+            A float number, the low threshold temperature of thermal in Celsius
+            up to nearest thousandth of one degree Celsius, e.g. 30.125
+        """
+        self.temp_dict_update()
+        value = self.temp_dict["Low"]
+        if value is None or value == self.int_case.error_ret:
+            return "N/A"
+        return round(float(value), 1)
+
+    def set_high_threshold(self, temperature):
+        """
+        Sets the high threshold temperature of thermal
+
+        Args :
+            temperature: A float number up to nearest thousandth of one degree Celsius,
+            e.g. 30.125
+
+        Returns:
+            A boolean, True if threshold is set successfully, False if not
+        """
+        # not supported
+        return False
+
+    def set_low_threshold(self, temperature):
+        """
+        Sets the low threshold temperature of thermal
+
+        Args :
+            temperature: A float number up to nearest thousandth of one degree Celsius,
+            e.g. 30.125
+
+        Returns:
+            A boolean, True if threshold is set successfully, False if not
+        """
+        # not supported
+        return False
+
+    def get_high_critical_threshold(self):
+        """
+        Retrieves the high critical threshold temperature of thermal
+
+        Returns:
+            A float number, the high critical threshold temperature of thermal in Celsius
+            up to nearest thousandth of one degree Celsius, e.g. 30.125
+        """
+        self.temp_dict_update()
+        value = self.temp_dict["Max"]
+        if value is None or value == self.int_case.error_ret:
+            return "N/A"
+        return round(float(value), 1)
+
+    def get_low_critical_threshold(self):
+        """
+        Retrieves the low critical threshold temperature of thermal
+
+        Returns:
+            A float number, the low critical threshold temperature of thermal in Celsius
+            up to nearest thousandth of one degree Celsius, e.g. 30.125
+        """
+        self.temp_dict_update()
+        value = self.temp_dict["Min"]
+        if value is None or value == self.int_case.error_ret:
+            return "N/A"
+        return round(float(value), 1)
+
+    def get_minimum_recorded(self):
+        """
+        Retrieves the minimum recorded temperature of thermal
+
+        Returns:
+            A float number, the minimum recorded temperature of thermal in Celsius
+            up to nearest thousandth of one degree Celsius, e.g. 30.125
+        """
+        if len(self.temperature_list) == 0:
+            return "N/A"
+        return round(float(min(self.temperature_list)), 1)
+
+    def get_maximum_recorded(self):
+        """
+        Retrieves the maximum recorded temperature of thermal
+
+        Returns:
+            A float number, the maximum recorded temperature of thermal in Celsius
+            up to nearest thousandth of one degree Celsius, e.g. 30.125
+        """
+        if len(self.temperature_list) == 0:
+            return "N/A"
+        return round(float(max(self.temperature_list)), 1)
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/watchdog.py b/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/watchdog.py
new file mode 100644
index 000000000..948337f47
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/watchdog.py
@@ -0,0 +1,236 @@
+#!/usr/bin/env python3
+
+########################################################################
+#
+#
+# Abstract base class for implementing a platform-specific class with
+# which to interact with a hardware watchdog module in SONiC
+#
+########################################################################
+
+import fcntl
+import os
+import array
+
+try:
+    from sonic_platform_base.watchdog_base import WatchdogBase
+except ImportError as error:
+    raise ImportError(str(error) + "- required module not found") from error
+
+
+# ioctl constants
+IO_WRITE = 0x40000000
+IO_READ = 0x80000000
+IO_READ_WRITE = 0xC0000000
+IO_SIZE_INT = 0x00040000
+IO_SIZE_40 = 0x00280000
+IO_TYPE_WATCHDOG = ord('W') << 8
+
+WDR_INT = IO_READ | IO_SIZE_INT | IO_TYPE_WATCHDOG
+WDR_40 = IO_READ | IO_SIZE_40 | IO_TYPE_WATCHDOG
+WDWR_INT = IO_READ_WRITE | IO_SIZE_INT | IO_TYPE_WATCHDOG
+
+# Watchdog ioctl command
+WDIOC_GETSUPPORT = 0 | WDR_40
+WDIOC_GETSTATUS = 1 | WDR_INT
+WDIOC_GETBOOTSTATUS = 2 | WDR_INT
+WDIOC_GETTEMP = 3 | WDR_INT
+WDIOC_SETOPTIONS = 4 | WDR_INT
+WDIOC_KEEPALIVE = 5 | WDR_INT
+WDIOC_SETTIMEOUT = 6 | WDWR_INT
+WDIOC_GETTIMEOUT = 7 | WDR_INT
+WDIOC_SETPRETIMEOUT = 8 | WDWR_INT
+WDIOC_GETPRETIMEOUT = 9 | WDR_INT
+WDIOC_GETTIMELEFT = 10 | WDR_INT
+
+# Watchdog status constants
+WDIOS_DISABLECARD = 0x0001
+WDIOS_ENABLECARD = 0x0002
+
+WDT_COMMON_ERROR = -1
+WDT_IDENTITY = "CPLD Watchdog"
+WDT_SYSFS_PATH = "/sys/class/watchdog/"
+
+DEFAULT_TIMEOUT = 180
+
+
+class Watchdog(WatchdogBase):
+    """
+    Abstract base class for interfacing with a hardware watchdog module
+    """
+
+    def __init__(self):
+        self.watchdog, self.wdt_main_dev_name = self._get_wdt()
+        self.status_path = "/sys/class/watchdog/%s/status" % self.wdt_main_dev_name
+        self.state_path = "/sys/class/watchdog/%s/state" % self.wdt_main_dev_name
+        self.timeout_path = "/sys/class/watchdog/%s/timeout" % self.wdt_main_dev_name
+        # Set default value
+        self._disable()
+        self.armed = False
+        self.timeout = self._gettimeout()
+
+    def _is_wd_main(self, dev):
+        """
+        Checks watchdog identity
+        """
+        identity = self._read_file(
+            "{}/{}/identity".format(WDT_SYSFS_PATH, dev))
+        return identity == WDT_IDENTITY
+
+    def _get_wdt(self):
+        """
+        Retrieves watchdog device
+        """
+        wdt_main_dev_list = [dev for dev in os.listdir(
+            "/dev/") if dev.startswith("watchdog") and self._is_wd_main(dev)]
+        if not wdt_main_dev_list:
+            return None
+        wdt_main_dev_name = wdt_main_dev_list[0]
+        watchdog_device_path = "/dev/{}".format(wdt_main_dev_name)
+        watchdog = os.open(watchdog_device_path, os.O_RDWR)
+        return watchdog, wdt_main_dev_name
+
+    def _read_file(self, file_path):
+        """
+        Read text file
+        """
+        try:
+            with open(file_path, "r") as fd:
+                txt = fd.read()
+        except IOError:
+            return WDT_COMMON_ERROR
+        return txt.strip()
+
+    def _enable(self):
+        """
+        Turn on the watchdog timer
+        """
+        req = array.array('h', [WDIOS_ENABLECARD])
+        fcntl.ioctl(self.watchdog, WDIOC_SETOPTIONS, req, False)
+
+    def _disable(self):
+        """
+        Turn off the watchdog timer
+        """
+        req = array.array('h', [WDIOS_DISABLECARD])
+        fcntl.ioctl(self.watchdog, WDIOC_SETOPTIONS, req, False)
+
+    def _keepalive(self):
+        """
+        Keep alive watchdog timer
+        """
+        fcntl.ioctl(self.watchdog, WDIOC_KEEPALIVE)
+
+    def _settimeout(self, seconds):
+        """
+        Set watchdog timer timeout
+        @param seconds - timeout in seconds
+        @return is the actual set timeout
+        """
+        req = array.array('I', [seconds])
+        fcntl.ioctl(self.watchdog, WDIOC_SETTIMEOUT, req, True)
+        return int(req[0])
+
+    def _gettimeout(self):
+        """
+        Get watchdog timeout
+        @return watchdog timeout
+        """
+        req = array.array('I', [0])
+        fcntl.ioctl(self.watchdog, WDIOC_GETTIMEOUT, req, True)
+
+        return int(req[0])
+
+    def _gettimeleft(self):
+        """
+        Get time left before watchdog timer expires
+        @return time left in seconds
+        """
+        req = array.array('I', [0])
+        fcntl.ioctl(self.watchdog, WDIOC_GETTIMELEFT, req, True)
+
+        return int(req[0])
+
+    def arm(self, seconds):
+        """
+        Arm the hardware watchdog with a timeout of <seconds> seconds.
+        If the watchdog is currently armed, calling this function will
+        simply reset the timer to the provided value. If the underlying
+        hardware does not support the value provided in <seconds>, this
+        method should arm the watchdog with the *next greater* available
+        value.
+
+        Returns:
+            An integer specifying the *actual* number of seconds the watchdog
+            was armed with. On failure returns -1.
+        """
+        ret = WDT_COMMON_ERROR
+        if seconds < 0:
+            return ret
+
+        try:
+            if self.timeout != seconds:
+                self.timeout = self._settimeout(seconds)
+            if self.armed:
+                self._keepalive()
+            else:
+                self._settimeout(seconds)
+                self._enable()
+                self.armed = True
+            ret = self.timeout
+        except IOError:
+            pass
+
+        return ret
+
+    def disarm(self):
+        """
+        Disarm the hardware watchdog
+
+        Returns:
+            A boolean, True if watchdog is disarmed successfully, False if not
+        """
+        disarmed = False
+        if self.is_armed():
+            try:
+                self._disable()
+                self.armed = False
+                disarmed = True
+            except IOError:
+                pass
+
+        return disarmed
+
+    def is_armed(self):
+        """
+        Retrieves the armed state of the hardware watchdog.
+
+        Returns:
+            A boolean, True if watchdog is armed, False if not
+        """
+        return self.armed
+
+    def get_remaining_time(self):
+        """
+        If the watchdog is armed, retrieve the number of seconds remaining on
+        the watchdog timer
+
+        Returns:
+            An integer specifying the number of seconds remaining on thei
+            watchdog timer. If the watchdog is not armed, returns -1.
+        """
+        timeleft = WDT_COMMON_ERROR
+
+        if self.armed:
+            try:
+                timeleft = self._gettimeleft()
+            except IOError:
+                pass
+
+        return timeleft
+
+    def __del__(self):
+        """
+        Close watchdog
+        """
+        os.close(self.watchdog)
diff --git a/platform/broadcom/sonic-platform-modules-micas/debian/changelog b/platform/broadcom/sonic-platform-modules-micas/debian/changelog
new file mode 100644
index 000000000..d908208c5
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/debian/changelog
@@ -0,0 +1,5 @@
+sonic-micas-platform-modules (1.0) unstable; urgency=low
+
+  * Initial release
+
+ -- support <support>  Fri, 21 APR 2017 11:11:11 -0800
diff --git a/platform/broadcom/sonic-platform-modules-micas/debian/compat b/platform/broadcom/sonic-platform-modules-micas/debian/compat
new file mode 100644
index 000000000..f599e28b8
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/debian/compat
@@ -0,0 +1 @@
+10
diff --git a/platform/broadcom/sonic-platform-modules-micas/debian/control b/platform/broadcom/sonic-platform-modules-micas/debian/control
new file mode 100644
index 000000000..55b583777
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/debian/control
@@ -0,0 +1,9 @@
+Source: sonic-micas-platform-modules
+Section: main
+Priority: extra
+Maintainer: support
+Standards-Version: 3.9.3
+
+Package: platform-modules-micas-m2-w6510-48v8c
+Architecture: amd64
+Description: kernel modules for platform devices such as fan, led, sfp
diff --git a/platform/broadcom/sonic-platform-modules-micas/debian/copyright b/platform/broadcom/sonic-platform-modules-micas/debian/copyright
new file mode 100644
index 000000000..676cdeec7
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/debian/copyright
@@ -0,0 +1,15 @@
+Copyright (C) 2016  Microsoft, Inc
+
+This program is free software; you can redistribute it and/or
+modify it under the terms of the GNU General Public License
+as published by the Free Software Foundation; either version 2
+of the License, or (at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
diff --git a/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6510-48v8c.install b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6510-48v8c.install
new file mode 100644
index 000000000..6f3e9b257
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6510-48v8c.install
@@ -0,0 +1 @@
+m2-w6510-48v8c/modules/sonic_platform-1.0-py3-none-any.whl /usr/share/sonic/device/x86_64-micas_m2-w6510-48v8c-r0
diff --git a/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6510-48v8c.postinst b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6510-48v8c.postinst
new file mode 100644
index 000000000..a8132f4f6
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6510-48v8c.postinst
@@ -0,0 +1,10 @@
+#!/bin/sh
+# postinst
+
+kernel_version=$(uname -r)
+
+if [ -e /boot/System.map-${kernel_version} ]; then
+    depmod -a -F /boot/System.map-${kernel_version} ${kernel_version} || true
+fi
+
+#DEBHELPER#
diff --git a/platform/broadcom/sonic-platform-modules-micas/debian/rule.mk b/platform/broadcom/sonic-platform-modules-micas/debian/rule.mk
new file mode 100644
index 000000000..f27bca1d6
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/debian/rule.mk
@@ -0,0 +1,5 @@
+currentdir = $(shell pwd)
+
+MODULE_DIRS := m2-w6510-48v8c
+
+export MODULE_DIRS
diff --git a/platform/broadcom/sonic-platform-modules-micas/debian/rules b/platform/broadcom/sonic-platform-modules-micas/debian/rules
new file mode 100755
index 000000000..baa92b233
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/debian/rules
@@ -0,0 +1,98 @@
+#!/usr/bin/make -f
+CC=gcc
+INSTALL_MOD_DIR:=extra
+KVERSION   ?= $(shell uname -r)
+KERNEL_SRC :=  /lib/modules/$(KVERSION)
+MOD_SRC_DIR:= $(shell pwd)
+KBUILD_OUTPUT=$(KERNEL_SRC)/build
+
+LIB_DIR = usr/lib/python3/dist-packages
+CUSTOM_RULES_DIR := $(shell pwd)/debian
+
+export  INSTALL_MOD_DIR top_srcdir KVERSION  KERNEL_SRC CC  KBUILD_OUTPUT CUSTOM_RULES_DIR
+
+include $(CUSTOM_RULES_DIR)/rule.mk
+
+#all products need common
+COMPILE_DIRS = $(MODULE_DIRS)
+
+clean_dirs = $(MODULE_DIRS)
+clean_dirs += common
+
+complie_clean_dirs := $(addprefix _clean_,$(clean_dirs) )
+
+%:
+	dh $@
+build: COMPILE_WHL
+	@echo "build success"
+
+$(complie_clean_dirs):
+	$(MAKE) -C $(patsubst _clean_%,%,$@) clean
+
+common_build :
+	$(MAKE) -C  $(MOD_SRC_DIR)/common
+
+$(COMPILE_DIRS): common_build
+	$(MAKE) -C  $(MOD_SRC_DIR)/$@
+	dh_testdir
+	dh_installdirs
+	cp -r $(MOD_SRC_DIR)/common/build/*  debian/platform-modules-micas-$@/; \
+	cp -r $(MOD_SRC_DIR)/$@/build/*  debian/platform-modules-micas-$@/; \
+
+COMPILE_WHL: $(COMPILE_DIRS)
+	@(for mod in $(MODULE_DIRS); do \
+		cd $(MOD_SRC_DIR)/$${mod}; \
+		cp -r $(MOD_SRC_DIR)/common/lib/plat_hal $(MOD_SRC_DIR)/$${mod}/; \
+		cp -r $(MOD_SRC_DIR)/common/lib/wbutil $(MOD_SRC_DIR)/$${mod}/; \
+		cp -r $(MOD_SRC_DIR)/common/lib/eepromutil $(MOD_SRC_DIR)/$${mod}/; \
+		cp -r $(MOD_SRC_DIR)/common/lib/restful_util $(MOD_SRC_DIR)/$${mod}/; \
+		if [ $$mod != "m2-w6940-128qc" ]; then \
+			cp -r $(MOD_SRC_DIR)/common/sonic_platform $(MOD_SRC_DIR)/$${mod}/; \
+		fi; \
+		cp $(MOD_SRC_DIR)/common/script/hal_pltfm.py $(MOD_SRC_DIR)/$${mod}/hal_pltfm.py; \
+		cp $(MOD_SRC_DIR)/common/script/platform_util.py $(MOD_SRC_DIR)/$${mod}/platform_util.py; \
+		cp $(MOD_SRC_DIR)/common/script/platform_intf.py $(MOD_SRC_DIR)/$${mod}/platform_intf.py; \
+		python3 setup.py bdist_wheel -d $(MOD_SRC_DIR)/$${mod}/modules; \
+		rm -rf $(MOD_SRC_DIR)/$${mod}/plat_hal; \
+		rm -rf $(MOD_SRC_DIR)/$${mod}/wbutil; \
+		rm -rf $(MOD_SRC_DIR)/$${mod}/eepromutil; \
+		rm -rf $(MOD_SRC_DIR)/$${mod}/restful_util; \
+		if [ $$mod != "m2-w6940-128qc" ]; then \
+			rm -rf $(MOD_SRC_DIR)/$${mod}/sonic_platform; \
+		fi; \
+		rm -rf $(MOD_SRC_DIR)/$${mod}/hal_pltfm.py; \
+		rm -rf $(MOD_SRC_DIR)/$${mod}/platform_intf.py; \
+		rm -rf $(MOD_SRC_DIR)/$${mod}/platform_util.py; \
+		cd $(MOD_SRC_DIR); \
+	done)
+
+binary: binary-indep
+	@echo "======================================================="
+
+binary-indep:
+	# Resuming debhelper scripts
+	dh_testroot
+	dh_install
+	dh_installchangelogs
+	dh_installdocs
+	dh_systemd_enable
+	dh_installinit
+	dh_systemd_start
+	dh_link
+	dh_fixperms
+	dh_compress
+	dh_strip
+	dh_installdeb
+	dh_gencontrol
+	dh_md5sums
+	dh_builddeb
+override_dh_usrlocal:
+
+override_dh_pysupport:
+
+clean:  $(complie_clean_dirs)
+	dh_testdir
+	dh_testroot
+	dh_clean
+
+.PHONY: build  $(COMPILE_DIRS) binary binary-arch binary-indep clean
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/Makefile b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/Makefile
new file mode 100644
index 000000000..052a5a6a0
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/Makefile
@@ -0,0 +1,25 @@
+PWD		= $(shell pwd)
+DIR_KERNEL_SRC = $(PWD)/modules/driver
+EXTRA_CFLAGS:= -I$(M)/include
+EXTRA_CFLAGS+= -Wall
+SUB_BUILD_DIR = $(PWD)/build
+INSTALL_DIR = $(SUB_BUILD_DIR)/$(KERNEL_SRC)/$(INSTALL_MOD_DIR)
+INSTALL_SCRIPT_DIR = $(SUB_BUILD_DIR)/usr/local/bin
+INSTALL_LIB_DIR = $(SUB_BUILD_DIR)/usr/lib/python3/dist-packages
+INSTALL_SYSFS_CFG_DIR = $(SUB_BUILD_DIR)/etc/plat_sysfs_cfg
+
+all:
+	$(MAKE) -C $(KBUILD_OUTPUT) M=$(DIR_KERNEL_SRC) modules
+	@if [ ! -d ${INSTALL_DIR} ]; then mkdir -p ${INSTALL_DIR} ;fi
+	cp -r $(DIR_KERNEL_SRC)/*.ko $(INSTALL_DIR)
+	@if [ ! -d ${INSTALL_SCRIPT_DIR} ]; then mkdir -p ${INSTALL_SCRIPT_DIR} ;fi
+	cp -r $(PWD)/config/*  $(INSTALL_SCRIPT_DIR)
+	@if [ ! -d ${INSTALL_LIB_DIR} ]; then mkdir -p ${INSTALL_LIB_DIR} ;fi
+	@if [ -d $(PWD)/hal-config/ ]; then cp -r $(PWD)/hal-config/* ${INSTALL_LIB_DIR} ;fi
+	@if [ ! -d ${INSTALL_SYSFS_CFG_DIR} ]; then mkdir -p ${INSTALL_SYSFS_CFG_DIR} ;fi
+	@if [ -d $(PWD)/plat_sysfs_cfg/ ]; then cp -r $(PWD)/plat_sysfs_cfg/* ${INSTALL_SYSFS_CFG_DIR} ;fi
+clean:
+	rm -f ${DIR_KERNEL_SRC}/*.o ${DIR_KERNEL_SRC}/*.ko ${DIR_KERNEL_SRC}/*.mod.c ${DIR_KERNEL_SRC}/.*.cmd
+	rm -f ${DIR_KERNEL_SRC}/Module.markers ${DIR_KERNEL_SRC}/Module.symvers ${DIR_KERNEL_SRC}/modules.order
+	rm -rf ${DIR_KERNEL_SRC}/.tmp_versions
+	rm -rf $(SUB_BUILD_DIR)
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/config/x86_64_micas_m2_w6510_48v8c_r0_config.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/config/x86_64_micas_m2_w6510_48v8c_r0_config.py
new file mode 100755
index 000000000..546e12531
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/config/x86_64_micas_m2_w6510_48v8c_r0_config.py
@@ -0,0 +1,1106 @@
+#!/usr/bin/python
+# -*- coding: UTF-8 -*-
+from platform_common import *
+
+STARTMODULE = {
+    "hal_fanctrl": 1,
+    "hal_ledctrl": 1,
+    "avscontrol": 1,
+    "dev_monitor": 1,
+    "pmon_syslog": 1,
+    "tty_console": 1,
+    "macledreset": 1,
+    "sff_temp_polling": 1,
+    "generate_airflow": 1,
+    "reboot_cause": 1,
+}
+
+MAC_LED_RESET = {"pcibus": 8, "slot": 0, "fn": 0, "bar": 0, "offset": 64, "reset": 0x98}
+
+MANUINFO_CONF = {
+    "bios": {
+        "key": "BIOS",
+        "head": True,
+        "next": "onie"
+    },
+    "bios_vendor": {
+        "parent": "bios",
+        "key": "Vendor",
+        "cmd": "dmidecode -t 0 |grep Vendor",
+        "pattern": r".*Vendor",
+        "separator": ":",
+        "arrt_index": 1,
+    },
+    "bios_version": {
+        "parent": "bios",
+        "key": "Version",
+        "cmd": "dmidecode -t 0 |grep Version",
+        "pattern": r".*Version",
+        "separator": ":",
+        "arrt_index": 2,
+    },
+    "bios_date": {
+        "parent": "bios",
+        "key": "Release Date",
+        "cmd": "dmidecode -t 0 |grep Release",
+        "pattern": r".*Release Date",
+        "separator": ":",
+        "arrt_index": 3,
+    },
+    "onie": {
+        "key": "ONIE",
+        "next": "cpu"
+    },
+    "onie_date": {
+        "parent": "onie",
+        "key": "Build Date",
+        "file": "/host/machine.conf",
+        "pattern": r"^onie_build_date",
+        "separator": "=",
+        "arrt_index": 1,
+    },
+    "onie_version": {
+        "parent": "onie",
+        "key": "Version",
+        "file": "/host/machine.conf",
+        "pattern": r"^onie_version",
+        "separator": "=",
+        "arrt_index": 2,
+    },
+
+    "cpu": {
+        "key": "CPU",
+        "next": "ssd"
+    },
+    "cpu_vendor": {
+        "parent": "cpu",
+        "key": "Vendor",
+        "cmd": "dmidecode --type processor |grep Manufacturer",
+        "pattern": r".*Manufacturer",
+        "separator": ":",
+        "arrt_index": 1,
+    },
+    "cpu_model": {
+        "parent": "cpu",
+        "key": "Device Model",
+        "cmd": "dmidecode --type processor | grep Version",
+        "pattern": r".*Version",
+        "separator": ":",
+        "arrt_index": 2,
+    },
+    "cpu_core": {
+        "parent": "cpu",
+        "key": "Core Count",
+        "cmd": "dmidecode --type processor | grep \"Core Count\"",
+        "pattern": r".*Core Count",
+        "separator": ":",
+        "arrt_index": 3,
+    },
+    "cpu_thread": {
+        "parent": "cpu",
+        "key": "Thread Count",
+        "cmd": "dmidecode --type processor | grep \"Thread Count\"",
+        "pattern": r".*Thread Count",
+        "separator": ":",
+        "arrt_index": 4,
+    },
+    "ssd": {
+        "key": "SSD",
+        "next": "cpld"
+    },
+    "ssd_model": {
+        "parent": "ssd",
+        "key": "Device Model",
+        "cmd": "smartctl -i /dev/sda |grep \"Device Model\"",
+        "pattern": r".*Device Model",
+        "separator": ":",
+        "arrt_index": 1,
+    },
+    "ssd_fw": {
+        "parent": "ssd",
+        "key": "Firmware Version",
+        "cmd": "smartctl -i /dev/sda |grep \"Firmware Version\"",
+        "pattern": r".*Firmware Version",
+        "separator": ":",
+        "arrt_index": 2,
+    },
+    "ssd_user_cap": {
+        "parent": "ssd",
+        "key": "User Capacity",
+        "cmd": "smartctl -i /dev/sda |grep \"User Capacity\"",
+        "pattern": r".*User Capacity",
+        "separator": ":",
+        "arrt_index": 3,
+    },
+
+    "cpld": {
+        "key": "CPLD",
+        "next": "psu"
+    },
+
+    "cpld1": {
+        "key": "CPLD1",
+        "parent": "cpld",
+        "arrt_index": 1,
+    },
+    "cpld1_model": {
+        "key": "Device Model",
+        "parent": "cpld1",
+        "config": "LCMXO3LF-2100C-5BG256C",
+        "arrt_index": 1,
+    },
+    "cpld1_vender": {
+        "key": "Vendor",
+        "parent": "cpld1",
+        "config": "LATTICE",
+        "arrt_index": 2,
+    },
+    "cpld1_desc": {
+        "key": "Description",
+        "parent": "cpld1",
+        "config": "CPU_CPLD",
+        "arrt_index": 3,
+    },
+    "cpld1_version": {
+        "key": "Firmware Version",
+        "parent": "cpld1",
+        "reg": {
+            "loc": "/dev/port",
+            "offset": 0x700,
+            "size": 4
+        },
+        "callback": "cpld_format",
+        "arrt_index": 4,
+    },
+
+    "cpld2": {
+        "key": "CPLD2",
+        "parent": "cpld",
+        "arrt_index": 2,
+    },
+    "cpld2_model": {
+        "key": "Device Model",
+        "parent": "cpld2",
+        "config": "LCMXO3LF-2100C-5BG256C",
+        "arrt_index": 1,
+    },
+    "cpld2_vender": {
+        "key": "Vendor",
+        "parent": "cpld2",
+        "config": "LATTICE",
+        "arrt_index": 2,
+    },
+    "cpld2_desc": {
+        "key": "Description",
+        "parent": "cpld2",
+        "config": "CONNECT_CPLD",
+        "arrt_index": 3,
+    },
+    "cpld2_version": {
+        "key": "Firmware Version",
+        "parent": "cpld2",
+        "reg": {
+            "loc": "/dev/port",
+            "offset": 0x900,
+            "size": 4
+        },
+        "callback": "cpld_format",
+        "arrt_index": 4,
+    },
+
+    "cpld3": {
+        "key": "CPLD3",
+        "parent": "cpld",
+        "arrt_index": 3,
+    },
+    "cpld3_model": {
+        "key": "Device Model",
+        "parent": "cpld3",
+        "config": "LCMXO3LF-2100C-5BG256C",
+        "arrt_index": 1,
+    },
+    "cpld3_vender": {
+        "key": "Vendor",
+        "parent": "cpld3",
+        "config": "LATTICE",
+        "arrt_index": 2,
+    },
+    "cpld3_desc": {
+        "key": "Description",
+        "parent": "cpld3",
+        "config": "CONNECT_CPLD-FAN",
+        "arrt_index": 3,
+    },
+    "cpld3_version": {
+        "key": "Firmware Version",
+        "parent": "cpld3",
+        "i2c": {
+            "bus": "2",
+            "loc": "0x0d",
+            "offset": 0,
+            "size": 4
+        },
+        "callback": "cpld_format",
+        "arrt_index": 4,
+    },
+
+    "cpld4": {
+        "key": "CPLD4",
+        "parent": "cpld",
+        "arrt_index": 4,
+    },
+    "cpld4_model": {
+        "key": "Device Model",
+        "parent": "cpld4",
+        "config": "LCMXO3LF-2100C-5BG256C",
+        "arrt_index": 1,
+    },
+    "cpld4_vender": {
+        "key": "Vendor",
+        "parent": "cpld4",
+        "config": "LATTICE",
+        "arrt_index": 2,
+    },
+    "cpld4_desc": {
+        "key": "Description",
+        "parent": "cpld4",
+        "config": "MAC_CPLD1",
+        "arrt_index": 3,
+    },
+    "cpld4_version": {
+        "key": "Firmware Version",
+        "parent": "cpld4",
+        "i2c": {
+            "bus": "8",
+            "loc": "0x30",
+            "offset": 0,
+            "size": 4
+        },
+        "callback": "cpld_format",
+        "arrt_index": 4,
+    },
+
+    "cpld5": {
+        "key": "CPLD5",
+        "parent": "cpld",
+        "arrt_index": 5,
+    },
+    "cpld5_model": {
+        "key": "Device Model",
+        "parent": "cpld5",
+        "config": "LCMXO3LF-2100C-5BG256C",
+        "arrt_index": 1,
+    },
+    "cpld5_vender": {
+        "key": "Vendor",
+        "parent": "cpld5",
+        "config": "LATTICE",
+        "arrt_index": 2,
+    },
+    "cpld5_desc": {
+        "key": "Description",
+        "parent": "cpld5",
+        "config": "MAC_CPLD2",
+        "arrt_index": 3,
+    },
+    "cpld5_version": {
+        "key": "Firmware Version",
+        "parent": "cpld5",
+        "i2c": {
+            "bus": "8",
+            "loc": "0x31",
+            "offset": 0,
+            "size": 4
+        },
+        "callback": "cpld_format",
+        "arrt_index": 4,
+    },
+
+    "psu": {
+        "key": "PSU",
+        "next": "fan"
+    },
+
+    "psu1": {
+        "parent": "psu",
+        "key": "PSU1",
+        "arrt_index": 1,
+    },
+    "psu1_hw_version": {
+        "key": "Hardware Version",
+        "parent": "psu1",
+        "extra": {
+            "funcname": "getPsu",
+            "id": "psu1",
+            "key": "hw_version"
+        },
+        "arrt_index": 1,
+    },
+    "psu1_fw_version": {
+        "key": "Firmware Version",
+        "parent": "psu1",
+        "config": "NA",
+        "arrt_index": 2,
+    },
+
+    "psu2": {
+        "parent": "psu",
+        "key": "PSU2",
+        "arrt_index": 2,
+    },
+    "psu2_hw_version": {
+        "key": "Hardware Version",
+        "parent": "psu2",
+        "extra": {
+            "funcname": "getPsu",
+            "id": "psu2",
+            "key": "hw_version"
+        },
+        "arrt_index": 1,
+    },
+    "psu2_fw_version": {
+        "key": "Firmware Version",
+        "parent": "psu2",
+        "config": "NA",
+        "arrt_index": 2,
+    },
+
+    "fan": {
+        "key": "FAN",
+        "next": "i210"
+    },
+
+    "fan1": {
+        "key": "FAN1",
+        "parent": "fan",
+        "arrt_index": 1,
+    },
+    "fan1_hw_version": {
+        "key": "Hardware Version",
+        "parent": "fan1",
+        "extra": {
+            "funcname": "checkFan",
+            "id": "fan1",
+            "key": "hw_version"
+        },
+        "arrt_index": 1,
+    },
+    "fan1_fw_version": {
+        "key": "Firmware Version",
+        "parent": "fan1",
+        "config": "NA",
+        "arrt_index": 2,
+    },
+
+    "fan2": {
+        "key": "FAN2",
+        "parent": "fan",
+        "arrt_index": 2,
+    },
+    "fan2_hw_version": {
+        "key": "Hardware Version",
+        "parent": "fan2",
+        "extra": {
+            "funcname": "checkFan",
+            "id": "fan2",
+            "key": "hw_version"
+        },
+        "arrt_index": 1,
+    },
+    "fan2_fw_version": {
+        "key": "Firmware Version",
+        "parent": "fan2",
+        "config": "NA",
+        "arrt_index": 2,
+    },
+
+    "fan3": {
+        "key": "FAN3",
+        "parent": "fan",
+        "arrt_index": 3,
+    },
+    "fan3_hw_version": {
+        "key": "Hardware Version",
+        "parent": "fan3",
+        "extra": {
+            "funcname": "checkFan",
+            "id": "fan3",
+            "key": "hw_version"
+        },
+        "arrt_index": 1,
+    },
+    "fan3_fw_version": {
+        "key": "Firmware Version",
+        "parent": "fan3",
+        "config": "NA",
+        "arrt_index": 2,
+    },
+
+    "fan4": {
+        "key": "FAN4",
+        "parent": "fan",
+        "arrt_index": 4,
+    },
+    "fan4_hw_version": {
+        "key": "Hardware Version",
+        "parent": "fan4",
+        "extra": {
+            "funcname": "checkFan",
+            "id": "fan4",
+            "key": "hw_version"
+        },
+        "arrt_index": 1,
+    },
+    "fan4_fw_version": {
+        "key": "Firmware Version",
+        "parent": "fan4",
+        "config": "NA",
+        "arrt_index": 2,
+    },
+
+    "i210": {
+        "key": "NIC",
+        "next": "fpga"
+    },
+    "i210_model": {
+        "parent": "i210",
+        "config": "NA",
+        "key": "Device Model",
+        "arrt_index": 1,
+    },
+    "i210_vendor": {
+        "parent": "i210",
+        "config": "INTEL",
+        "key": "Vendor",
+        "arrt_index": 2,
+    },
+    "i210_version": {
+        "parent": "i210",
+        "cmd": "ethtool -i eth0",
+        "pattern": r"firmware-version",
+        "separator": ":",
+        "key": "Firmware Version",
+        "arrt_index": 3,
+    },
+
+    "fpga": {
+        "key": "FPGA",
+        "next": "asic"
+    },
+    "fpga_model": {
+        "parent": "fpga",
+        "config": "XC7A15T-2FGG484C",
+        "key": "Device Model",
+        "arrt_index": 1,
+    },
+    "fpga_vendor": {
+        "parent": "fpga",
+        "config": "XILINX",
+        "key": "Vendor",
+        "arrt_index": 2,
+    },
+    "fpga_desc": {
+        "parent": "fpga",
+        "config": "NA",
+        "key": "Description",
+        "arrt_index": 3,
+    },
+    "fpga_hw_version": {
+        "parent": "fpga",
+        "config": "NA",
+        "key": "Hardware Version",
+        "arrt_index": 4,
+    },
+    "fpga_fw_version": {
+        "parent": "fpga",
+        "pci": {
+            "bus": 8,
+            "slot": 0,
+            "fn": 0,
+            "bar": 0,
+            "offset": 0
+        },
+        "key": "Firmware Version",
+        "arrt_index": 5,
+    },
+    "fpga_date": {
+        "parent": "fpga",
+        "pci": {
+            "bus": 8,
+            "slot": 0,
+            "fn": 0,
+            "bar": 0,
+            "offset": 4
+        },
+        "key": "Build Date",
+        "arrt_index": 6,
+    },
+    "asic": {
+        "key": "ASIC",
+    },
+    "sdk_model": {
+        "parent": "asic",
+        "cmd": "bcmcmd -t 1 att",
+        "pattern": r"^Attach",
+        "regular": r"(?<=\()[^)]*(?=\))",
+        "key": "Device Model",
+        "arrt_index": 1,
+    },
+    "sdk_version": {
+        "parent": "asic",
+        "cmd": "bcmcmd -t 1 version | grep Release",
+        "pattern": r".*Release",
+        "separator": ":",
+        "key": "SDK Version",
+        "arrt_index": 2,
+    },
+    "pci_version": {
+        "parent": "asic",
+        "cmd": "bcmcmd -t 1 \"pciephy fw version\" |grep \"PCIe FW version\"",
+        "pattern": r".*PCIe FW version",
+        "separator": ":",
+        "key": "PCIe Firmware Version",
+        "arrt_index": 3,
+    },
+}
+
+PMON_SYSLOG_STATUS = {
+    "polling_time": 3,
+    "sffs": {
+        "present": {"path": ["/sys/wb_plat/sff/*/present"], "ABSENT": 0},
+        "nochangedmsgflag": 0,
+        "nochangedmsgtime": 60,
+        "noprintfirsttimeflag": 1,
+        "alias": {
+            "sff1": "Ethernet1",
+            "sff2": "Ethernet2",
+            "sff3": "Ethernet3",
+            "sff4": "Ethernet4",
+            "sff5": "Ethernet5",
+            "sff6": "Ethernet6",
+            "sff7": "Ethernet7",
+            "sff8": "Ethernet8",
+            "sff9": "Ethernet9",
+            "sff10": "Ethernet10",
+            "sff11": "Ethernet11",
+            "sff12": "Ethernet12",
+            "sff13": "Ethernet13",
+            "sff14": "Ethernet14",
+            "sff15": "Ethernet15",
+            "sff16": "Ethernet16",
+            "sff17": "Ethernet17",
+            "sff18": "Ethernet18",
+            "sff19": "Ethernet19",
+            "sff20": "Ethernet20",
+            "sff21": "Ethernet21",
+            "sff22": "Ethernet22",
+            "sff23": "Ethernet23",
+            "sff24": "Ethernet24",
+            "sff25": "Ethernet25",
+            "sff26": "Ethernet26",
+            "sff27": "Ethernet27",
+            "sff28": "Ethernet28",
+            "sff29": "Ethernet29",
+            "sff30": "Ethernet30",
+            "sff31": "Ethernet31",
+            "sff32": "Ethernet32",
+            "sff33": "Ethernet33",
+            "sff34": "Ethernet34",
+            "sff35": "Ethernet35",
+            "sff36": "Ethernet36",
+            "sff37": "Ethernet37",
+            "sff38": "Ethernet38",
+            "sff39": "Ethernet39",
+            "sff40": "Ethernet40",
+            "sff41": "Ethernet41",
+            "sff42": "Ethernet42",
+            "sff43": "Ethernet43",
+            "sff44": "Ethernet44",
+            "sff45": "Ethernet45",
+            "sff46": "Ethernet46",
+            "sff47": "Ethernet47",
+            "sff48": "Ethernet48",
+            "sff49": "Ethernet49",
+            "sff50": "Ethernet50",
+            "sff51": "Ethernet51",
+            "sff52": "Ethernet52",
+            "sff53": "Ethernet53",
+            "sff54": "Ethernet54",
+            "sff55": "Ethernet55",
+            "sff56": "Ethernet56",
+        }
+    },
+    "fans": {
+        "present": {"path": ["/sys/wb_plat/fan/*/present"], "ABSENT": 0},
+        "status": [
+            {"path": "/sys/wb_plat/fan/%s/motor0/status", 'okval': 1},
+            {"path": "/sys/wb_plat/fan/%s/motor1/status", 'okval': 1},
+        ],
+        "nochangedmsgflag": 1,
+        "nochangedmsgtime": 60,
+        "noprintfirsttimeflag": 0,
+        "alias": {
+            "fan1": "FAN1",
+            "fan2": "FAN2",
+            "fan3": "FAN3",
+            "fan4": "FAN4"
+        }
+    },
+    "psus": {
+        "present": {"path": ["/sys/wb_plat/psu/*/present"], "ABSENT": 0},
+        "status": [
+            {"path": "/sys/wb_plat/psu/%s/output", "okval": 1},
+            {"path": "/sys/wb_plat/psu/%s/alert", "okval": 0},
+        ],
+        "nochangedmsgflag": 1,
+        "nochangedmsgtime": 60,
+        "noprintfirsttimeflag": 0,
+        "alias": {
+            "psu1": "PSU1",
+            "psu2": "PSU2"
+        }
+    }
+}
+
+##################### MAC Voltage adjust####################################
+MAC_DEFAULT_PARAM = [
+    {
+        "name": "mac_core",              # AVS name
+        "type": 1,                       # 1: used default value, if rov value not in range. 0: do nothing, if rov value not in range
+        "default": 0x74,                 # default value, if rov value not in range
+        "sdkreg": "TOP_AVS_SEL_REG",     # SDK register name
+        "sdktype": 0,                    # 0: No shift operation required, 1: shift operation required
+        "macregloc": 24,                 # Shift right 24 bits
+        "mask": 0xff,                    # Use with macregloc
+        "rov_source": 1,                 # 0:get rov value from cpld, 1: get rov value from SDK
+        "cpld_avs": {"bus": 6, "loc": 0x0d, "offset": 0xc3, "gettype": "i2c"},
+        "set_avs": {
+            "loc": "/sys/bus/i2c/devices/7-0064/hwmon/hwmon*/avs0_vout",
+            "gettype": "sysfs", "formula": "int((%f)*1000000)"
+        },
+        "mac_avs_param": {
+            0x08: 0.888,
+            0x72: 0.900,
+            0x73: 0.894,
+            0x74: 0.888,
+            0x75: 0.882,
+            0x76: 0.875,
+            0x77: 0.869,
+            0x78: 0.863,
+            0x79: 0.857,
+            0x7a: 0.850,
+            0x7b: 0.844,
+            0x7c: 0.838,
+            0x7d: 0.832,
+            0x7e: 0.825,
+            0x7f: 0.819,
+            0x80: 0.813,
+            0x81: 0.807,
+            0x82: 0.800,
+            0x83: 0.794,
+            0x84: 0.788,
+            0x85: 0.782,
+            0x86: 0.775,
+            0x87: 0.769,
+            0x88: 0.763,
+            0x89: 0.757,
+            0x8A: 0.750
+        }
+    }
+]
+
+BLACKLIST_DRIVERS = [
+    {"name": "i2c_i801", "delay": 0},
+]
+
+DRIVERLISTS = [
+    {"name": "wb_i2c_i801", "delay": 0},
+    {"name": "wb_gpio_d1500", "delay": 0},
+    {"name": "i2c_dev", "delay": 0},
+    {"name": "wb_i2c_algo_bit", "delay": 0},
+    {"name": "wb_i2c_gpio", "delay": 0},
+    {"name": "i2c_mux", "delay": 0},
+    {"name": "wb_gpio_device", "delay": 0},
+    {"name": "wb_i2c_gpio_device gpio_sda=17 gpio_scl=1 gpio_udelay=2", "delay": 0},
+    {"name": "platform_common dfd_my_type=0x404a", "delay": 0},
+    {"name": "wb_lpc_drv", "delay": 0},
+    {"name": "wb_lpc_drv_device", "delay": 0},
+    {"name": "wb_io_dev", "delay": 0},
+    {"name": "wb_io_dev_device", "delay": 0},
+    {"name": "wb_fpga_pcie", "delay": 0},
+    {"name": "wb_pcie_dev", "delay": 0},
+    {"name": "wb_pcie_dev_device", "delay": 0},
+    {"name": "wb_i2c_dev", "delay": 0},
+    {"name": "wb_i2c_ocores", "delay": 0},
+    {"name": "wb_i2c_ocores_device", "delay": 0},
+    {"name": "wb_i2c_mux_pca9641", "delay": 0},
+    {"name": "wb_i2c_mux_pca954x", "delay": 0},
+    {"name": "wb_i2c_mux_pca954x_device", "delay": 0},
+    {"name": "wb_i2c_dev_device", "delay": 0},
+    {"name": "wb_lm75", "delay": 0},
+    {"name": "optoe", "delay": 0},
+    {"name": "at24", "delay": 0},
+    {"name": "wb_mac_bsc", "delay": 0},
+    {"name": "wb_pmbus_core", "delay": 0},
+    {"name": "wb_isl68137", "delay": 0},
+    {"name": "wb_csu550", "delay": 0},
+    {"name": "wb_ina3221", "delay": 0},
+    {"name": "wb_tps53622", "delay": 0},
+    {"name": "plat_dfd", "delay": 0},
+    {"name": "plat_switch", "delay": 0},
+    {"name": "plat_fan", "delay": 0},
+    {"name": "plat_psu", "delay": 0},
+    {"name": "plat_sff", "delay": 0},
+]
+
+DEVICE = [
+    {"name": "24c02", "bus": 0, "loc": 0x56},
+    {"name": "wb_mac_bsc_td3", "bus": 3, "loc": 0x44},
+    # fan
+    {"name": "24c02", "bus": 16, "loc": 0x50},
+    {"name": "24c02", "bus": 17, "loc": 0x50},
+    {"name": "24c02", "bus": 18, "loc": 0x50},
+    {"name": "24c02", "bus": 19, "loc": 0x50},
+    # psu
+    {"name": "24c02", "bus": 24, "loc": 0x50},
+    {"name": "wb_dps550", "bus": 24, "loc": 0x58},
+    {"name": "24c02", "bus": 25, "loc": 0x50},
+    {"name": "wb_dps550", "bus": 25, "loc": 0x58},
+    # temp
+    {"name": "wb_lm75", "bus": 3, "loc": 0x48},
+    {"name": "wb_lm75", "bus": 3, "loc": 0x49},
+    {"name": "wb_lm75", "bus": 3, "loc": 0x4a},
+    {"name": "wb_lm75", "bus": 3, "loc": 0x4b},
+    {"name": "wb_lm75", "bus": 3, "loc": 0x4c},
+    # dcdc
+    {"name": "wb_ina3221", "bus": 7, "loc": 0x40},
+    {"name": "wb_ina3221", "bus": 7, "loc": 0x41},
+    {"name": "wb_ina3221", "bus": 7, "loc": 0x42},
+    {"name": "wb_ina3221", "bus": 7, "loc": 0x43},
+    {"name": "wb_tps53622", "bus": 7, "loc": 0x60},
+    {"name": "wb_tps53622", "bus": 7, "loc": 0x6c},
+    {"name": "wb_isl68127", "bus": 7, "loc": 0x64},
+]
+
+OPTOE = [
+    {"name": "optoe2", "startbus": 32, "endbus": 79},
+    {"name": "optoe1", "startbus": 80, "endbus": 87},
+]
+
+DEV_MONITOR_PARAM = {
+    "polling_time": 10,
+    "psus": [
+        {
+            "name": "psu1",
+            "present": {"gettype": "i2c", "bus": 6, "loc": 0x0d, "offset": 0x51, "presentbit": 0, "okval": 0},
+            "device": [
+                {"id": "psu1pmbus", "name": "wb_dps550", "bus": 24, "loc": 0x58, "attr": "hwmon"},
+                {"id": "psu1frue2", "name": "24c02", "bus": 24, "loc": 0x50, "attr": "eeprom"},
+            ],
+        },
+        {
+            "name": "psu2",
+            "present": {"gettype": "i2c", "bus": 6, "loc": 0x0d, "offset": 0x51, "presentbit": 4, "okval": 0},
+            "device": [
+                {"id": "psu2pmbus", "name": "wb_dps550", "bus": 25, "loc": 0x58, "attr": "hwmon"},
+                {"id": "psu2frue2", "name": "24c02", "bus": 25, "loc": 0x50, "attr": "eeprom"},
+            ],
+        },
+    ],
+    "fans": [
+        {
+            "name": "fan1",
+            "present": {"gettype": "i2c", "bus": 2, "loc": 0x0d, "offset": 0x30, "presentbit": 0, "okval": 0},
+            "device": [
+                {"id": "fan1frue2", "name": "24c02", "bus": 16, "loc": 0x50, "attr": "eeprom"},
+            ],
+        },
+        {
+            "name": "fan2",
+            "present": {"gettype": "i2c", "bus": 2, "loc": 0x0d, "offset": 0x30, "presentbit": 1, "okval": 0},
+            "device": [
+                {"id": "fan2frue2", "name": "24c02", "bus": 17, "loc": 0x50, "attr": "eeprom"},
+            ],
+        },
+        {
+            "name": "fan3",
+            "present": {"gettype": "i2c", "bus": 2, "loc": 0x0d, "offset": 0x30, "presentbit": 2, "okval": 0},
+            "device": [
+                {"id": "fan3frue2", "name": "24c02", "bus": 18, "loc": 0x50, "attr": "eeprom"},
+            ],
+        },
+        {
+            "name": "fan4",
+            "present": {"gettype": "i2c", "bus": 2, "loc": 0x0d, "offset": 0x30, "presentbit": 3, "okval": 0},
+            "device": [
+                {"id": "fan4frue2", "name": "24c02", "bus": 19, "loc": 0x50, "attr": "eeprom"},
+            ],
+        },
+    ],
+    "others": [
+        {
+            "name": "eeprom",
+            "device": [
+                {"id": "eeprom_1", "name": "24c02", "bus": 0, "loc": 0x56, "attr": "eeprom"},
+            ],
+        },
+        {
+            "name": "lm75",
+            "device": [
+                {"id": "lm75_1", "name": "wb_lm75", "bus": 3, "loc": 0x48, "attr": "hwmon"},
+                {"id": "lm75_2", "name": "wb_lm75", "bus": 3, "loc": 0x49, "attr": "hwmon"},
+                {"id": "lm75_3", "name": "wb_lm75", "bus": 3, "loc": 0x4a, "attr": "hwmon"},
+                {"id": "lm75_4", "name": "wb_lm75", "bus": 3, "loc": 0x4b, "attr": "hwmon"},
+                {"id": "lm75_5", "name": "wb_lm75", "bus": 3, "loc": 0x4c, "attr": "hwmon"},
+            ],
+        },
+        {
+            "name": "mac_bsc",
+            "device": [
+                {"id": "mac_bsc_1", "name": "wb_mac_bsc_td3", "bus": 3, "loc": 0x44, "attr": "hwmon"},
+            ],
+        },
+        {
+            "name": "ina3221",
+            "device": [
+                {"id": "ina3221_1", "name": "wb_ina3221", "bus": 7, "loc": 0x40, "attr": "hwmon"},
+                {"id": "ina3221_2", "name": "wb_ina3221", "bus": 7, "loc": 0x41, "attr": "hwmon"},
+                {"id": "ina3221_3", "name": "wb_ina3221", "bus": 7, "loc": 0x42, "attr": "hwmon"},
+                {"id": "ina3221_4", "name": "wb_ina3221", "bus": 7, "loc": 0x43, "attr": "hwmon"},
+            ],
+        },
+        {
+            "name": "tps53622",
+            "device": [
+                {"id": "tps53622_1", "name": "wb_tps53622", "bus": 7, "loc": 0x60, "attr": "hwmon"},
+                {"id": "tps53622_2", "name": "wb_tps53622", "bus": 7, "loc": 0x6c, "attr": "hwmon"},
+            ],
+        },
+        {
+            "name": "isl68127",
+            "device": [
+                {"id": "isl68127_1", "name": "wb_isl68127", "bus": 7, "loc": 0x64, "attr": "hwmon"},
+            ],
+        }
+    ],
+}
+
+INIT_PARAM_PRE = [
+    {"loc": "7-0064/hwmon/hwmon*/avs0_vout_max", "value": "900000"},
+    {"loc": "7-0064/hwmon/hwmon*/avs0_vout_min", "value": "750000"},
+]
+INIT_COMMAND_PRE = [
+    "i2cset -y -f 6 0x0d 0x91 0x48",
+    "i2cset -y -f 6 0x0d 0x92 0x01",  # MAC_PWR_EN
+    "i2cset -y -f 6 0x0d 0x94 0x01",  # SFF_PWR_EN
+    "i2cset -y -f 6 0x0d 0xbf 0x01",  # enbale tty_console monitor
+]
+
+INIT_PARAM = []
+
+INIT_COMMAND = [
+    "i2cset -y -f 8 0x30 0x60 0x00",  # enable txdis[1~8]
+    "i2cset -y -f 8 0x30 0x61 0x00",  # enable txdis[9~16]
+    "i2cset -y -f 8 0x30 0x62 0x00",  # enable txdis[17~24]
+    "i2cset -y -f 8 0x31 0x60 0x00",  # enable txdis[24~32]
+    "i2cset -y -f 8 0x31 0x61 0x00",  # enable txdis[33~40]
+    "i2cset -y -f 8 0x31 0x62 0x00",  # enable txdis[41~48]
+]
+
+REBOOT_CAUSE_PARA = {
+    "reboot_cause_list": [
+        {
+            "name": "otp_switch_reboot",
+            "monitor_point": {"gettype": "file_exist", "judge_file": "/etc/.otp_switch_reboot_flag", "okval": True},
+            "record": [
+                {"record_type": "file", "mode": "cover", "log": "Thermal Overload: ASIC, ",
+                    "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"},
+                {"record_type": "file", "mode": "add", "log": "Thermal Overload: ASIC, ",
+                    "path": "/etc/sonic/.reboot/.history-reboot-cause.txt", "file_max_size": 1 * 1024 * 1024}
+            ],
+            "finish_operation": [
+                {"gettype": "cmd", "cmd": "rm -rf /etc/.otp_switch_reboot_flag"},
+            ]
+        },
+        {
+            "name": "otp_other_reboot",
+            "monitor_point": {"gettype": "file_exist", "judge_file": "/etc/.otp_other_reboot_flag", "okval": True},
+            "record": [
+                {"record_type": "file", "mode": "cover", "log": "Thermal Overload: Other, ",
+                    "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"},
+                {"record_type": "file", "mode": "add", "log": "Thermal Overload: Other, ",
+                    "path": "/etc/sonic/.reboot/.history-reboot-cause.txt", "file_max_size": 1 * 1024 * 1024}
+            ],
+            "finish_operation": [
+                {"gettype": "cmd", "cmd": "rm -rf /etc/.otp_other_reboot_flag"},
+            ]
+        },
+    ],
+    "other_reboot_cause_record": [
+        {"record_type": "file", "mode": "cover", "log": "Other, ", "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"},
+        {"record_type": "file", "mode": "add", "log": "Other, ", "path": "/etc/sonic/.reboot/.history-reboot-cause.txt"}
+    ],
+}
+
+UPGRADE_SUMMARY = {
+    "devtype": 0x404a,
+
+    "slot0": {
+        "subtype": 0,
+        "VME": {
+            "chain1": {
+                "name": "VME_CPLD",
+                "is_support_warm_upg": 0,
+            },
+        },
+
+        "SPI-LOGIC-DEV": {
+            "chain3": {
+                "name": "FPGA",
+                "is_support_warm_upg": 0,
+            },
+        },
+
+        "MTD": {
+            "chain2": {
+                "name": "BIOS",
+                "is_support_warm_upg": 0,
+                "filesizecheck": 10240,  # bios check file size, Unit: K
+                "init_cmd": [
+                    {"io_addr": 0x722, "value": 0x02, "gettype": "io"},
+                    {"cmd": "modprobe mtd", "gettype": "cmd"},
+                    {"cmd": "modprobe spi_nor", "gettype": "cmd"},
+                    {"cmd": "modprobe ofpart", "gettype": "cmd"},
+                    {"cmd": "modprobe spi_intel writeable=1", "gettype": "cmd"},
+                    {"cmd": "modprobe spi_intel_platform", "gettype": "cmd"},
+                ],
+                "finish_cmd": [
+                    {"cmd": "rmmod spi_intel_platform", "gettype": "cmd"},
+                    {"cmd": "rmmod spi_intel", "gettype": "cmd"},
+                    {"cmd": "rmmod ofpart", "gettype": "cmd"},
+                    {"cmd": "rmmod spi_nor", "gettype": "cmd"},
+                    {"cmd": "rmmod mtd", "gettype": "cmd"},
+                ],
+            },
+        },
+
+        "TEST": {
+            "cpld": [
+                {"chain": 1, "file": "/etc/.upgrade_test/cpld_test_header.vme", "display_name": "CPLD"},
+            ],
+            "fpga": [
+                {
+                    "chain": 3,
+                    "file": "/etc/.upgrade_test/fpga_test_header.bin",
+                    "display_name": "FPGA",
+                },
+            ],
+        },
+    },
+
+    "BMC": {
+        "name": "BMC",
+        "init_cmd": [
+        ],
+        "finish_cmd": [],
+    },
+}
+
+
+PLATFORM_E2_CONF = {
+    "fan": [
+        {
+            "name": "fan1", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/16-0050/eeprom",
+            "e2_decode": [
+                {
+                    "area": "productInfoArea", "field": "productVersion", "decode_type": "func", "func_name": "fru_decode_hw"
+                },
+                {
+                    "area": "boardInfoArea", "field": "boardextra1", "decode_type": "func", "func_name": "fru_decode_hw"
+                },
+            ],
+        },
+        {
+            "name": "fan2", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/17-0050/eeprom",
+            "e2_decode": [
+                {
+                    "area": "productInfoArea", "field": "productVersion", "decode_type": "func", "func_name": "fru_decode_hw"
+                },
+                {
+                    "area": "boardInfoArea", "field": "boardextra1", "decode_type": "func", "func_name": "fru_decode_hw"
+                },
+            ],
+        },
+        {
+            "name": "fan3", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/18-0050/eeprom",
+            "e2_decode": [
+                {
+                    "area": "productInfoArea", "field": "productVersion", "decode_type": "func", "func_name": "fru_decode_hw"
+                },
+                {
+                    "area": "boardInfoArea", "field": "boardextra1", "decode_type": "func", "func_name": "fru_decode_hw"
+                },
+            ],
+        },
+        {
+            "name": "fan4", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/19-0050/eeprom",
+            "e2_decode": [
+                {
+                    "area": "productInfoArea", "field": "productVersion", "decode_type": "func", "func_name": "fru_decode_hw"
+                },
+                {
+                    "area": "boardInfoArea", "field": "boardextra1", "decode_type": "func", "func_name": "fru_decode_hw"
+                },
+            ],
+        },
+    ],
+    "psu": [
+        {"name": "psu1", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/24-0050/eeprom"},
+        {"name": "psu2", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/25-0050/eeprom"},
+    ],
+    "syseeprom": [
+        {"name": "syseeprom", "e2_type": "onie_tlv", "e2_path": "/sys/bus/i2c/devices/0-0056/eeprom"},
+    ],
+}
+
+AIR_FLOW_CONF = {
+    "psu_fan_airflow": {
+        "intake": ['CSU550AP-3-500', 'DPS-550AB-39 A', 'GW-CRPS550N2C', 'CSU550AP-3-300', 'DPS-550AB-39 B', 'CSU550AP-3', 'U1D-D10800-DRB'],
+        "exhaust": ['CSU550AP-3-501', 'DPS-550AB-40 A', 'GW-CRPS550N2RC']
+    },
+
+    "fanairflow": {
+        "intake": ['M1HFAN III-F'],
+        "exhaust": ['M1HFAN III-R']
+    },
+
+    "fans": [
+        {
+            "name": "FAN1", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/16-0050/eeprom",
+            "area": "productInfoArea", "field": "productName", "decode": "fanairflow"
+        },
+        {
+            "name": "FAN2", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/17-0050/eeprom",
+            "area": "productInfoArea", "field": "productName", "decode": "fanairflow"
+        },
+        {
+            "name": "FAN3", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/18-0050/eeprom",
+            "area": "productInfoArea", "field": "productName", "decode": "fanairflow"
+        },
+        {
+            "name": "FAN4", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/19-0050/eeprom",
+            "area": "productInfoArea", "field": "productName", "decode": "fanairflow"
+        }
+    ],
+
+    "psus": [
+        {
+            "name": "PSU1", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/24-0050/eeprom",
+            "area": "productInfoArea", "field": "productPartModelName", "decode": "psu_fan_airflow"
+        },
+        {
+            "name": "PSU2", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/25-0050/eeprom",
+            "area": "productInfoArea", "field": "productPartModelName", "decode": "psu_fan_airflow"
+        }
+    ]
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/config/x86_64_micas_m2_w6510_48v8c_r0_port_config.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/config/x86_64_micas_m2_w6510_48v8c_r0_port_config.py
new file mode 100755
index 000000000..26f92a77a
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/config/x86_64_micas_m2_w6510_48v8c_r0_port_config.py
@@ -0,0 +1,7 @@
+#!/usr/bin/python3
+# -*- coding: UTF-8 -*-
+
+PLATFORM_INTF_OPTOE = {
+    "port_num": 56,
+    "optoe_start_bus": 32,
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/hal-config/x86_64_micas_m2_w6510_48v8c_r0_device.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/hal-config/x86_64_micas_m2_w6510_48v8c_r0_device.py
new file mode 100755
index 000000000..c1eb46247
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/hal-config/x86_64_micas_m2_w6510_48v8c_r0_device.py
@@ -0,0 +1,1371 @@
+#!/usr/bin/python3
+
+psu_fan_airflow = {
+    "intake": ['CSU550AP-3-500', 'DPS-550AB-39 A', 'GW-CRPS550N2C', 'CSU550AP-3-300', 'DPS-550AB-39 B', 'CSU550AP-3', 'U1D-D10800-DRB'],
+    "exhaust": ['CSU550AP-3-501', 'DPS-550AB-40 A', 'GW-CRPS550N2RC']
+}
+
+fanairflow = {
+    "intake": ['M1HFAN III-F'],
+    "exhaust": ['M1HFAN III-R'],
+}
+
+psu_display_name = {
+    "PA550II-F": ['CSU550AP-3-500', 'DPS-550AB-39 A', 'GW-CRPS550N2C', 'CSU550AP-3-300', 'DPS-550AB-39 B', 'CSU550AP-3'],
+    "PA550II-R": ['CSU550AP-3-501', 'DPS-550AB-40 A', 'GW-CRPS550N2RC'],
+    "PD800I-F": ['U1D-D10800-DRB']
+}
+
+psutypedecode = {
+    0x00: 'N/A',
+    0x01: 'AC',
+    0x02: 'DC',
+}
+
+
+class Unit:
+    Temperature = "C"
+    Voltage = "V"
+    Current = "A"
+    Power = "W"
+    Speed = "RPM"
+
+
+PSU_NOT_PRESENT_PWM = 100
+
+
+class threshold:
+    PSU_TEMP_MIN = -20 * 1000
+    PSU_TEMP_MAX = 60 * 1000
+
+    PSU_FAN_SPEED_MIN = 2000
+    PSU_FAN_SPEED_MAX = 18000
+
+    PSU_OUTPUT_VOLTAGE_MIN = 11 * 1000
+    PSU_OUTPUT_VOLTAGE_MAX = 14 * 1000
+
+    PSU_AC_INPUT_VOLTAGE_MIN = 200 * 1000
+    PSU_AC_INPUT_VOLTAGE_MAX = 240 * 1000
+
+    PSU_DC_INPUT_VOLTAGE_MIN = 190 * 1000
+    PSU_DC_INPUT_VOLTAGE_MAX = 290 * 1000
+
+    ERR_VALUE = -9999999
+
+    PSU_OUTPUT_POWER_MIN = 10 * 1000 * 1000
+    PSU_OUTPUT_POWER_MAX = 560 * 1000 * 1000
+
+    PSU_INPUT_POWER_MIN = 10 * 1000 * 1000
+    PSU_INPUT_POWER_MAX = 625 * 1000 * 1000
+
+    PSU_OUTPUT_CURRENT_MIN = 1 * 1000
+    PSU_OUTPUT_CURRENT_MAX = 45 * 1000
+
+    PSU_INPUT_CURRENT_MIN = 0 * 1000
+    PSU_INPUT_CURRENT_MAX = 7 * 1000
+
+    FRONT_FAN_SPEED_MAX = 24000
+    REAR_FAN_SPEED_MAX = 22500
+    FAN_SPEED_MIN = 5000
+    
+
+    ASPOWER_DC_PSU_TEMP_MIN = -10 * 1000
+    ASPOWER_DC_PSU_TEMP_MAX = 55 * 1000
+
+    ASPOWER_DC_PSU_FAN_SPEED_MIN = 800
+    ASPOWER_DC_PSU_FAN_SPEED_MAX = 24000
+
+    ASPOWER_DC_PSU_OUTPUT_VOLTAGE_MIN = 11.4 * 1000
+    ASPOWER_DC_PSU_OUTPUT_VOLTAGE_MAX = 12.6 * 1000
+
+    ASPOWER_DC_PSU_DC_INPUT_VOLTAGE_MIN = 36 * 1000
+    ASPOWER_DC_PSU_DC_INPUT_VOLTAGE_MAX = 72 * 1000
+
+    ASPOWER_DC_ERR_VALUE = -9999999
+
+    ASPOWER_DC_PSU_OUTPUT_POWER_MIN = 5 * 1000 * 1000
+    ASPOWER_DC_PSU_OUTPUT_POWER_MAX = 800 * 1000 * 1000
+
+    ASPOWER_DC_PSU_INPUT_POWER_MIN = 5 * 1000 * 1000
+    ASPOWER_DC_PSU_INPUT_POWER_MAX = 880 * 1000 * 1000
+
+    ASPOWER_DC_PSU_OUTPUT_CURRENT_MIN = 0.5 * 1000
+    ASPOWER_DC_PSU_OUTPUT_CURRENT_MAX = 66 * 1000
+
+    ASPOWER_DC_PSU_INPUT_CURRENT_MIN = 1 * 1000
+    ASPOWER_DC_PSU_INPUT_CURRENT_MAX = 28 * 1000
+
+
+class Description:
+    CPLD = "Used for managing IO modules, SFP+ modules and system LEDs"
+    BIOS = "Performs initialization of hardware components during booting"
+    FPGA = "Platform management controller for on-board temperature monitoring, in-chassis power"
+
+
+devices = {
+    "onie_e2": [
+        {
+            "name": "ONIE_E2",
+            "e2loc": {"loc": "/sys/bus/i2c/devices/0-0056/eeprom", "way": "sysfs"},
+            "airflow": "intake"
+        },
+    ],
+    "psus": [
+        {
+            "e2loc": {"loc": "/sys/bus/i2c/devices/24-0050/eeprom", "way": "sysfs"},
+            "pmbusloc": {"bus": 24, "addr": 0x58, "way": "i2c"},
+            "present": {"loc": "/sys/wb_plat/psu/psu1/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+            "name": "PSU1",
+            "get_threshold_by_model": 1,
+            "psu_display_name": psu_display_name,
+            "airflow": psu_fan_airflow,
+            "TempStatus": {"bus": 24, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0004},
+            "Temperature": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-24/24-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                "Min": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_TEMP_MIN,
+                    "other": threshold.PSU_TEMP_MIN,
+                },
+                "Max": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_TEMP_MAX,
+                    "other": threshold.PSU_TEMP_MAX,
+                },
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            },
+            "FanStatus": {"bus": 24, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0400},
+            "FanSpeed": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-24/24-0058/hwmon/hwmon*/fan1_input", "way": "sysfs"},
+                "Min": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_FAN_SPEED_MIN,
+                    "other": threshold.PSU_FAN_SPEED_MIN,
+                },
+                "Max": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_FAN_SPEED_MAX,
+                    "other": threshold.PSU_FAN_SPEED_MAX,
+                },
+                "Unit": Unit.Speed
+            },
+            "psu_fan_tolerance": 40,
+            "InputsStatus": {"bus": 24, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x2000},
+            "InputsType": {"bus": 24, "addr": 0x58, "offset": 0x80, "way": "i2c", 'psutypedecode': psutypedecode},
+            "InputsVoltage": {
+                'AC': {
+                    "value": {"loc": "/sys/bus/i2c/devices/i2c-24/24-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+                    "Min": threshold.PSU_AC_INPUT_VOLTAGE_MIN,
+                    "Max": threshold.PSU_AC_INPUT_VOLTAGE_MAX,
+                    "Unit": Unit.Voltage,
+                    "format": "float(float(%s)/1000)"
+
+                },
+                'DC': {
+                    "value": {"loc": "/sys/bus/i2c/devices/i2c-24/24-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+                    "Min": {
+                        "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_DC_INPUT_VOLTAGE_MIN,
+                        "other": threshold.PSU_DC_INPUT_VOLTAGE_MIN,
+                    },
+                    "Max": {
+                        "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_DC_INPUT_VOLTAGE_MAX,
+                        "other": threshold.PSU_DC_INPUT_VOLTAGE_MAX,
+                    },
+                    "Unit": Unit.Voltage,
+                    "format": "float(float(%s)/1000)"
+                },
+                'other': {
+                    "value": {"loc": "/sys/bus/i2c/devices/i2c-24/24-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+                    "Min": {
+                        "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_DC_INPUT_VOLTAGE_MIN,
+                        "other": threshold.ERR_VALUE,
+                    },
+                    "Max": {
+                        "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_DC_INPUT_VOLTAGE_MAX,
+                        "other": threshold.ERR_VALUE,
+                    },
+                    "Unit": Unit.Voltage,
+                    "format": "float(float(%s)/1000)"
+                }
+            },
+            "InputsCurrent": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-24/24-0058/hwmon/hwmon*/curr1_input", "way": "sysfs"},
+                "Min": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_INPUT_CURRENT_MIN,
+                    "other": threshold.PSU_INPUT_CURRENT_MIN,
+                },
+                "Max": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_INPUT_CURRENT_MAX,
+                    "other": threshold.PSU_INPUT_CURRENT_MAX,
+                },
+                "Unit": Unit.Current,
+                "format": "float(float(%s)/1000)"
+            },
+            "InputsPower": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-24/24-0058/hwmon/hwmon*/power1_input", "way": "sysfs"},
+                "Min": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_INPUT_POWER_MIN,
+                    "other": threshold.PSU_INPUT_POWER_MIN,
+                },
+                "Max": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_INPUT_POWER_MAX,
+                    "other": threshold.PSU_INPUT_POWER_MAX,
+                },
+                "Unit": Unit.Power,
+                "format": "float(float(%s)/1000000)"
+            },
+            "OutputsStatus": {"bus": 24, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x8800},
+            "OutputsVoltage": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-24/24-0058/hwmon/hwmon*/in2_input", "way": "sysfs"},
+                "Min": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_OUTPUT_VOLTAGE_MIN,
+                    "other": threshold.PSU_OUTPUT_VOLTAGE_MIN,
+                },
+                "Max": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_OUTPUT_VOLTAGE_MAX,
+                    "other": threshold.PSU_OUTPUT_VOLTAGE_MAX,
+                },
+                "Unit": Unit.Voltage,
+                "format": "float(float(%s)/1000)"
+            },
+            "OutputsCurrent": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-24/24-0058/hwmon/hwmon*/curr2_input", "way": "sysfs"},
+                "Min": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_OUTPUT_CURRENT_MIN,
+                    "other": threshold.PSU_OUTPUT_CURRENT_MIN,
+                },
+                "Max": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_OUTPUT_CURRENT_MAX,
+                    "other": threshold.PSU_OUTPUT_CURRENT_MAX,
+                },
+                "Unit": Unit.Current,
+                "format": "float(float(%s)/1000)"
+            },
+            "OutputsPower": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-24/24-0058/hwmon/hwmon*/power2_input", "way": "sysfs"},
+                "Min": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_OUTPUT_POWER_MIN,
+                    "other": threshold.PSU_OUTPUT_POWER_MIN,
+                },
+                "Max": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_OUTPUT_POWER_MAX,
+                    "other": threshold.PSU_OUTPUT_POWER_MAX,
+                },
+                "Unit": Unit.Power,
+                "format": "float(float(%s)/1000000)"
+            },
+        },
+        {
+            "e2loc": {"loc": "/sys/bus/i2c/devices/25-0050/eeprom", "way": "sysfs"},
+            "pmbusloc": {"bus": 25, "addr": 0x58, "way": "i2c"},
+            "present": {"loc": "/sys/wb_plat/psu/psu2/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+            "name": "PSU2",
+            "get_threshold_by_model": 1,
+            "psu_display_name": psu_display_name,
+            "airflow": psu_fan_airflow,
+            "TempStatus": {"bus": 25, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0004},
+            "Temperature": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-25/25-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                "Min": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_TEMP_MIN,
+                    "other": threshold.PSU_TEMP_MIN,
+                },
+                "Max": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_TEMP_MAX,
+                    "other": threshold.PSU_TEMP_MAX,
+                },
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            },
+            "FanStatus": {"bus": 25, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0400},
+            "FanSpeed": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-25/25-0058/hwmon/hwmon*/fan1_input", "way": "sysfs"},
+                "Min": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_FAN_SPEED_MIN,
+                    "other": threshold.PSU_FAN_SPEED_MIN,
+                },
+                "Max": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_FAN_SPEED_MAX,
+                    "other": threshold.PSU_FAN_SPEED_MAX,
+                },
+                "Unit": Unit.Speed
+            },
+            "psu_fan_tolerance": 40,
+            "InputsStatus": {"bus": 25, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x2000},
+            "InputsType": {"bus": 25, "addr": 0x58, "offset": 0x80, "way": "i2c", 'psutypedecode': psutypedecode},
+            "InputsVoltage": {
+                'AC': {
+                    "value": {"loc": "/sys/bus/i2c/devices/i2c-25/25-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+                    "Min": threshold.PSU_AC_INPUT_VOLTAGE_MIN,
+                    "Max": threshold.PSU_AC_INPUT_VOLTAGE_MAX,
+                    "Unit": Unit.Voltage,
+                    "format": "float(float(%s)/1000)"
+
+                },
+                'DC': {
+                    "value": {"loc": "/sys/bus/i2c/devices/i2c-25/25-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+                    "Min": {
+                        "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_DC_INPUT_VOLTAGE_MIN,
+                        "other": threshold.PSU_DC_INPUT_VOLTAGE_MIN,
+                    },
+                    "Max": {
+                        "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_DC_INPUT_VOLTAGE_MAX,
+                        "other": threshold.PSU_DC_INPUT_VOLTAGE_MAX,
+                    },
+                    "Unit": Unit.Voltage,
+                    "format": "float(float(%s)/1000)"
+                },
+                'other': {
+                    "value": {"loc": "/sys/bus/i2c/devices/i2c-25/25-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+                    "Min": {
+                        "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_DC_INPUT_VOLTAGE_MIN,
+                        "other": threshold.ERR_VALUE,
+                    },
+                    "Max": {
+                        "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_DC_INPUT_VOLTAGE_MAX,
+                        "other": threshold.ERR_VALUE,
+                    },
+                    "Unit": Unit.Voltage,
+                    "format": "float(float(%s)/1000)"
+                }
+            },
+            "InputsCurrent": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-25/25-0058/hwmon/hwmon*/curr1_input", "way": "sysfs"},
+                "Min": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_INPUT_CURRENT_MIN,
+                    "other": threshold.PSU_INPUT_CURRENT_MIN,
+                },
+                "Max": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_INPUT_CURRENT_MAX,
+                    "other": threshold.PSU_INPUT_CURRENT_MAX,
+                },
+                "Unit": Unit.Current,
+                "format": "float(float(%s)/1000)"
+            },
+            "InputsPower": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-25/25-0058/hwmon/hwmon*/power1_input", "way": "sysfs"},
+                "Min": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_INPUT_POWER_MIN,
+                    "other": threshold.PSU_INPUT_POWER_MIN,
+                },
+                "Max": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_INPUT_POWER_MAX,
+                    "other": threshold.PSU_INPUT_POWER_MAX,
+                },
+                "Unit": Unit.Power,
+                "format": "float(float(%s)/1000000)"
+            },
+            "OutputsStatus": {"bus": 25, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x8800},
+            "OutputsVoltage": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-25/25-0058/hwmon/hwmon*/in2_input", "way": "sysfs"},
+                "Min": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_OUTPUT_VOLTAGE_MIN,
+                    "other": threshold.PSU_OUTPUT_VOLTAGE_MIN,
+                },
+                "Max": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_OUTPUT_VOLTAGE_MAX,
+                    "other": threshold.PSU_OUTPUT_VOLTAGE_MAX,
+                },
+                "Unit": Unit.Voltage,
+                "format": "float(float(%s)/1000)"
+            },
+            "OutputsCurrent": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-25/25-0058/hwmon/hwmon*/curr2_input", "way": "sysfs"},
+                "Min": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_OUTPUT_CURRENT_MIN,
+                    "other": threshold.PSU_OUTPUT_CURRENT_MIN,
+                },
+                "Max": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_OUTPUT_CURRENT_MAX,
+                    "other": threshold.PSU_OUTPUT_CURRENT_MAX,
+                },
+                "Unit": Unit.Current,
+                "format": "float(float(%s)/1000)"
+            },
+            "OutputsPower": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-25/25-0058/hwmon/hwmon*/power2_input", "way": "sysfs"},
+                "Min": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_OUTPUT_POWER_MIN,
+                    "other": threshold.PSU_OUTPUT_POWER_MIN,
+                },
+                "Max": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_OUTPUT_POWER_MAX,
+                    "other": threshold.PSU_OUTPUT_POWER_MAX,
+                },
+                "Unit": Unit.Power,
+                "format": "float(float(%s)/1000000)"
+            },
+        }
+    ],
+    "temps": [
+        {
+            "name": "SWITCH_TEMP",
+            "temp_id": "TEMP1",
+            "api_name": "ASIC_TEMP",
+            "Temperature": {
+                "value": {"loc": "/sys/bus/i2c/devices/3-0044/hwmon/hwmon*/temp99_input", "way": "sysfs"},
+                "Min": -30000,
+                "Low": 0,
+                "High": 105000,
+                "Max": 110000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            }
+        },
+        {
+            "name": "CPU_TEMP",
+            "temp_id": "TEMP2",
+            "Temperature": {
+                "value": {"loc": "/sys/bus/platform/devices/coretemp.0/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                "Min": -15000,
+                "Low": 0,
+                "High": 100000,
+                "Max": 102000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            }
+        },
+        {
+            "name": "INLET_TEMP",
+            "temp_id": "TEMP3",
+            "Temperature": {
+                "value": {"loc": "/sys/bus/i2c/devices/3-0048/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                "Min": -30000,
+                "Low": 0,
+                "High": 55000,
+                "Max": 60000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            },
+            "fix_value": {
+                "fix_type": "config",
+                "addend": -3,
+            }
+        },
+        {
+            "name": "OUTLET_TEMP",
+            "temp_id": "TEMP4",
+            "Temperature": {
+                "value": {"loc": "/sys/bus/i2c/devices/3-004c/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                "Min": -30000,
+                "Low": 0,
+                "High": 75000,
+                "Max": 80000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            }
+        },
+        {
+            "name": "BOARD_TEMP",
+            "temp_id": "TEMP5",
+            "api_name": "MAC_OUT_TEMP",
+            "Temperature": {
+                "value": {"loc": "/sys/bus/i2c/devices/3-004a/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                "Min": -30000,
+                "Low": 0,
+                "High": 75000,
+                "Max": 80000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            }
+        },
+        {
+            "name": "MAC_IN_TEMP",
+            "temp_id": "TEMP6",
+            "Temperature": {
+                "value": {"loc": "/sys/bus/i2c/devices/3-0049/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                "Min": -30000,
+                "Low": 0,
+                "High": 75000,
+                "Max": 80000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            }
+        },
+        {
+            "name": "PSU1_TEMP",
+            "temp_id": "TEMP7",
+            "Temperature": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-24/24-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                "Min": -20000,
+                "Low": 0,
+                "High": 55000,
+                "Max": 60000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            }
+        },
+        {
+            "name": "PSU2_TEMP",
+            "temp_id": "TEMP8",
+            "Temperature": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-25/25-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                "Min": -20000,
+                "Low": 0,
+                "High": 55000,
+                "Max": 60000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            }
+        },
+        {
+            "name": "SFF_TEMP",
+            "Temperature": {
+                "value": {"loc": "/tmp/highest_sff_temp", "way": "sysfs", "flock_path": "/tmp/highest_sff_temp"},
+                "Min": -30000,
+                "Low": 0,
+                "High": 90000,
+                "Max": 100000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            },
+            "invalid": -10000,
+            "error": -9999,
+        }
+    ],
+    "leds": [
+        {
+            "name": "FRONT_SYS_LED",
+            "led_type": "SYS_LED",
+            "led": {"bus": 6, "addr": 0x0d, "offset": 0x72, "way": "i2c"},
+            "led_attrs": {
+                "off": 0x00, "red_flash": 0x01, "red": 0x02,
+                "green_flash": 0x03, "green": 0x04, "amber_flash": 0x05,
+                "amber": 0x06, "mask": 0x07
+            },
+        },
+        {
+            "name": "FRONT_PSU_LED",
+            "led_type": "PSU_LED",
+            "led": {"bus": 6, "addr": 0x0d, "offset": 0x73, "way": "i2c"},
+            "led_attrs": {
+                "off": 0x10, "red_flash": 0x11, "red": 0x12,
+                "green_flash": 0x13, "green": 0x14, "amber_flash": 0x15,
+                "amber": 0x16, "mask": 0x17
+            },
+        },
+        {
+            "name": "FRONT_FAN_LED",
+            "led_type": "FAN_LED",
+            "led": {"bus": 6, "addr": 0x0d, "offset": 0x74, "way": "i2c"},
+            "led_attrs": {
+                "off": 0x10, "red_flash": 0x11, "red": 0x12,
+                "green_flash": 0x13, "green": 0x14, "amber_flash": 0x15,
+                "amber": 0x16, "mask": 0x17
+            },
+        },
+    ],
+    "fans": [
+        {
+            "name": "FAN1",
+            "airflow": fanairflow,
+            "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-16/16-0050/eeprom', 'way': 'sysfs'},
+            "present": {"loc": "/sys/wb_plat/fan/fan1/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+            "SpeedMin": threshold.FAN_SPEED_MIN,
+            "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+            "led": {"bus": 2, "addr": 0x0d, "offset": 0x3b, "way": "i2c"},
+            "led_attrs": {
+                "off": 0x0b, "red_flash": 0x0e, "red": 0x0a,
+                "green_flash": 0x0d, "green": 0x09, "amber_flash": 0x07,
+                "amber": 0x03, "mask": 0x0f
+            },
+            "PowerMax": 38.4,
+            "Rotor": {
+                "Rotor1_config": {
+                    "name": "Rotor1",
+                    "Set_speed": {"bus": 2, "addr": 0x0d, "offset": 0x14, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan1/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan1/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan1/motor1/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.FRONT_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+                "Rotor2_config": {
+                    "name": "Rotor2",
+                    "Set_speed": {"bus": 2, "addr": 0x0d, "offset": 0x14, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan1/motor0/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan1/motor0/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.REAR_FAN_SPEED_MAX,
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan1/motor0/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.REAR_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+            },
+        },
+        {
+            "name": "FAN2",
+            "airflow": fanairflow,
+            "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-17/17-0050/eeprom', 'way': 'sysfs'},
+            "present": {"loc": "/sys/wb_plat/fan/fan2/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+            "SpeedMin": threshold.FAN_SPEED_MIN,
+            "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+            "led": {"bus": 2, "addr": 0x0d, "offset": 0x3c, "way": "i2c"},
+            "led_attrs": {
+                "off": 0x0b, "red_flash": 0x0e, "red": 0x0a,
+                "green_flash": 0x0d, "green": 0x09, "amber_flash": 0x07,
+                "amber": 0x03, "mask": 0x0f
+            },
+            "PowerMax": 38.4,
+            "Rotor": {
+                "Rotor1_config": {
+                    "name": "Rotor1",
+                    "Set_speed": {"bus": 2, "addr": 0x0d, "offset": 0x15, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan2/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan2/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan2/motor1/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.FRONT_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+                "Rotor2_config": {
+                    "name": "Rotor2",
+                    "Set_speed": {"bus": 2, "addr": 0x0d, "offset": 0x15, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan2/motor0/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan2/motor0/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.REAR_FAN_SPEED_MAX,
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan2/motor0/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.REAR_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+            },
+        },
+        {
+            "name": "FAN3",
+            "airflow": fanairflow,
+            "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-18/18-0050/eeprom', 'way': 'sysfs'},
+            "present": {"loc": "/sys/wb_plat/fan/fan3/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+            "SpeedMin": threshold.FAN_SPEED_MIN,
+            "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+            "led": {"bus": 2, "addr": 0x0d, "offset": 0x3d, "way": "i2c"},
+            "led_attrs": {
+                "off": 0x0b, "red_flash": 0x0e, "red": 0x0a,
+                "green_flash": 0x0d, "green": 0x09, "amber_flash": 0x07,
+                "amber": 0x03, "mask": 0x0f
+            },
+            "PowerMax": 38.4,
+            "Rotor": {
+                "Rotor1_config": {
+                    "name": "Rotor1",
+                    "Set_speed": {"bus": 2, "addr": 0x0d, "offset": 0x16, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan3/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan3/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan3/motor1/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.FRONT_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+                "Rotor2_config": {
+                    "name": "Rotor2",
+                    "Set_speed": {"bus": 2, "addr": 0x0d, "offset": 0x16, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan3/motor0/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan3/motor0/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.REAR_FAN_SPEED_MAX,
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan3/motor0/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.REAR_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+            },
+        },
+
+        {
+            "name": "FAN4",
+            "airflow": fanairflow,
+            "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-19/19-0050/eeprom', 'way': 'sysfs'},
+            "present": {"loc": "/sys/wb_plat/fan/fan4/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+            "SpeedMin": threshold.FAN_SPEED_MIN,
+            "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+            "led": {"bus": 2, "addr": 0x0d, "offset": 0x3e, "way": "i2c"},
+            "led_attrs": {
+                "off": 0x0b, "red_flash": 0x0e, "red": 0x0a,
+                "green_flash": 0x0d, "green": 0x09, "amber_flash": 0x07,
+                "amber": 0x03, "mask": 0x0f
+            },
+            "PowerMax": 38.4,
+            "Rotor": {
+                "Rotor1_config": {
+                    "name": "Rotor1",
+                    "Set_speed": {"bus": 2, "addr": 0x0d, "offset": 0x17, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan4/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan4/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan4/motor1/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.FRONT_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+                "Rotor2_config": {
+                    "name": "Rotor2",
+                    "Set_speed": {"bus": 2, "addr": 0x0d, "offset": 0x17, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan4/motor0/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan4/motor0/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.REAR_FAN_SPEED_MAX,
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan4/motor0/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.REAR_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+            },
+        },
+
+    ],
+    "cplds": [
+        {
+            "name": "CPU_CPLD",
+            "cpld_id": "CPLD1",
+            "VersionFile": {"loc": "/dev/cpld0", "offset": 0, "len": 4, "way": "devfile_ascii"},
+            "desc": "Used for system power",
+            "slot": 0,
+            "warm": 0,
+        },
+        {
+            "name": "CONNECT_CPLD",
+            "cpld_id": "CPLD2",
+            "VersionFile": {"loc": "/dev/cpld1", "offset": 0, "len": 4, "way": "devfile_ascii"},
+            "desc": "Used for base functions",
+            "slot": 0,
+            "warm": 0,
+        },
+        {
+            "name": "CONNECT_CPLD-FAN",
+            "cpld_id": "CPLD3",
+            "VersionFile": {"loc": "/dev/cpld2", "offset": 0, "len": 4, "way": "devfile_ascii"},
+            "desc": "Used for fan modules",
+            "slot": 0,
+            "warm": 0,
+        },
+        {
+            "name": "MAC_CPLD1",
+            "cpld_id": "CPLD4",
+            "VersionFile": {"loc": "/dev/cpld3", "offset": 0, "len": 4, "way": "devfile_ascii"},
+            "desc": "Used for sff modules",
+            "slot": 0,
+            "warm": 0,
+        },
+        {
+            "name": "MAC_CPLD2",
+            "cpld_id": "CPLD5",
+            "VersionFile": {"loc": "/dev/cpld4", "offset": 0, "len": 4, "way": "devfile_ascii"},
+            "desc": "Used for sff modules",
+            "slot": 0,
+            "warm": 0,
+        },
+        {
+            "name": "FPGA",
+            "cpld_id": "CPLD6",
+            "VersionFile": {"loc": "/dev/fpga0", "offset": 0, "len": 4, "way": "devfile_ascii"},
+            "desc": "Used for base functions",
+            "slot": 0,
+            "format": "little_endian",
+            "warm": 0,
+        },
+        {
+            "name": "BIOS",
+            "cpld_id": "CPLD7",
+            "VersionFile": {"cmd": "dmidecode -s bios-version", "way": "cmd"},
+            "desc": "Performs initialization of hardware components during booting",
+            "slot": 0,
+            "type": "str",
+            "warm": 0,
+        },
+    ],
+    "dcdc": [
+        {
+            "name": "Switch_ZSFP1_3v3_C",
+            "dcdc_id": "DCDC1",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0040/hwmon/hwmon*/curr1_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 22000,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Switch_QSFP1_3v3_C",
+            "dcdc_id": "DCDC2",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0040/hwmon/hwmon*/curr3_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 22000,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Switch_5v0_C",
+            "dcdc_id": "DCDC3",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0040/hwmon/hwmon*/curr2_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 1000,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Switch_ZSFP1_3v3_V",
+            "dcdc_id": "DCDC4",
+            "Min": 2640,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0040/hwmon/hwmon*/in1_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 3960,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Switch_QSFP1_3v3_V",
+            "dcdc_id": "DCDC5",
+            "Min": 2640,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0040/hwmon/hwmon*/in3_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 3960,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Switch_5v0_V",
+            "dcdc_id": "DCDC6",
+            "Min": 4000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0040/hwmon/hwmon*/in2_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 6000,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Switch_1v2_C",
+            "dcdc_id": "DCDC7",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0041/hwmon/hwmon*/curr1_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 2000,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Switch_3v3_C",
+            "dcdc_id": "DCDC8",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0041/hwmon/hwmon*/curr2_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 1000,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Switch_Cpld_3v3_C",
+            "dcdc_id": "DCDC9",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0041/hwmon/hwmon*/curr3_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 2000,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Switch_1v2_V",
+            "dcdc_id": "DCDC10",
+            "Min": 960,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0041/hwmon/hwmon*/in1_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 1440,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Switch_3v3_V",
+            "dcdc_id": "DCDC11",
+            "Min": 2640,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0041/hwmon/hwmon*/in2_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 3960,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Switch_Cpld_3v3_V",
+            "dcdc_id": "DCDC12",
+            "Min": 2640,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0041/hwmon/hwmon*/in3_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 3960,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Con_1v2_C",
+            "dcdc_id": "DCDC13",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0042/hwmon/hwmon*/curr1_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 1300,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Con_3v3_C",
+            "dcdc_id": "DCDC14",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0042/hwmon/hwmon*/curr2_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 2800,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Con_SSD_3v3_C",
+            "dcdc_id": "DCDC15",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0042/hwmon/hwmon*/curr3_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 4500,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Con_1v2_V",
+            "dcdc_id": "DCDC16",
+            "Min": 960,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0042/hwmon/hwmon*/in1_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 1440,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Con_3v3_V",
+            "dcdc_id": "DCDC17",
+            "Min": 2640,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0042/hwmon/hwmon*/in2_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 3960,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Con_SSD_3v3_V",
+            "dcdc_id": "DCDC18",
+            "Min": 2640,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0042/hwmon/hwmon*/in3_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 3960,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Cpu_3v3_C",
+            "dcdc_id": "DCDC19",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0043/hwmon/hwmon*/curr1_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 4686,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Cpu_5v_C",
+            "dcdc_id": "DCDC20",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0043/hwmon/hwmon*/curr2_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 2200,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Cpu_1v7_C",
+            "dcdc_id": "DCDC21",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0043/hwmon/hwmon*/curr3_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 2200,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Cpu_3v3_V",
+            "dcdc_id": "DCDC22",
+            "Min": 2640,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0043/hwmon/hwmon*/in1_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 3960,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Cpu_5v_V",
+            "dcdc_id": "DCDC23",
+            "Min": 4000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0043/hwmon/hwmon*/in2_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 6000,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Cpu_1v7_V",
+            "dcdc_id": "DCDC24",
+            "Min": 1360,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0043/hwmon/hwmon*/in3_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 2040,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Cpu_CORE_C",
+            "dcdc_id": "DCDC25",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0060/hwmon/hwmon*/curr1_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 47300,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Cpu_1v05_C",
+            "dcdc_id": "DCDC26",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0060/hwmon/hwmon*/curr2_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 15400,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Cpu_CORE_V",
+            "dcdc_id": "DCDC27",
+            "Min": 1456,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0060/hwmon/hwmon*/in2_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 2184,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Cpu_1v05_V",
+            "dcdc_id": "DCDC28",
+            "Min": 840,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0060/hwmon/hwmon*/in3_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 1260,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Switch_CORE_C",
+            "dcdc_id": "DCDC29",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0064/hwmon/hwmon*/curr2_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 220000,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Switch_ANALOG_C",
+            "dcdc_id": "DCDC30",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0064/hwmon/hwmon*/curr3_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 18000,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Switch_CORE_V",
+            "dcdc_id": "DCDC31",
+            "Min": 600,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0064/hwmon/hwmon*/in2_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 1200,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Switch_ANALOG_V",
+            "dcdc_id": "DCDC32",
+            "Min": 640,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0064/hwmon/hwmon*/in3_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 960,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Cpu_1v2_C",
+            "dcdc_id": "DCDC33",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-006c/hwmon/hwmon*/curr1_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 9900,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Cpu_2v23_C",
+            "dcdc_id": "DCDC34",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-006c/hwmon/hwmon*/curr2_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 2200,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Cpu_1v2_V",
+            "dcdc_id": "DCDC35",
+            "Min": 960,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-006c/hwmon/hwmon*/in2_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 1440,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Cpu_2v23_V",
+            "dcdc_id": "DCDC36",
+            "Min": 1784,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-006c/hwmon/hwmon*/in3_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 2676,
+            "format": "float(float(%s)/1000)",
+        },
+    ],
+    "cpu": [
+        {
+            "name": "cpu",
+            "reboot_cause_path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"
+        }
+    ],
+    "sfps": {
+        "ver": '1.0',
+        "port_index_start": 1,
+        "port_num": 56,
+        "log_level": 2,
+        "eeprom_retry_times": 5,
+        "eeprom_retry_break_sec": 0.2,
+        "presence_cpld": {
+            "dev_id": {
+                3: {
+                    "offset": {
+                        0x30: "1-8",
+                        0x31: "9-16",
+                        0x32: "17-24",
+                    },
+                },
+                4: {
+                    "offset": {
+                        0x30: "25-32",
+                        0x31: "33-40",
+                        0x32: "41-48",
+                        0x33: "49-56",
+                    },
+                },
+            },
+        },
+        "presence_val_is_present": 0,
+        "eeprom_path": "/sys/bus/i2c/devices/i2c-%d/%d-0050/eeprom",
+        "eeprom_path_key": list(range(32, 88)),
+        "optoe_driver_path": "/sys/bus/i2c/devices/i2c-%d/%d-0050/dev_class",
+        "optoe_driver_key": list(range(32, 88)),
+        "txdis_cpld": {
+            "dev_id": {
+                3: {
+                    "offset": {
+                        0x60: "1-8",
+                        0x61: "9-16",
+                        0x62: "17-24",
+                    },
+                },
+                4: {
+                    "offset": {
+                        0x60: "25-32",
+                        0x61: "33-40",
+                        0x62: "41-48",
+                    },
+                },
+            },
+        },
+        "txdisable_val_is_on": 1,
+        "reset_cpld": {
+            "dev_id": {
+                4: {
+                    "offset": {
+                        0xb9: "49-56",
+                    },
+                },
+            },
+        },
+        "reset_val_is_reset": 0,
+    }
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/hal-config/x86_64_micas_m2_w6510_48v8c_r0_exhaust_device.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/hal-config/x86_64_micas_m2_w6510_48v8c_r0_exhaust_device.py
new file mode 100755
index 000000000..c2b857975
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/hal-config/x86_64_micas_m2_w6510_48v8c_r0_exhaust_device.py
@@ -0,0 +1,1371 @@
+#!/usr/bin/python3
+
+psu_fan_airflow = {
+    "intake": ['CSU550AP-3-500', 'DPS-550AB-39 A', 'GW-CRPS550N2C', 'CSU550AP-3-300', 'DPS-550AB-39 B', 'CSU550AP-3', 'U1D-D10800-DRB'],
+    "exhaust": ['CSU550AP-3-501', 'DPS-550AB-40 A', 'GW-CRPS550N2RC']
+}
+
+fanairflow = {
+    "intake": ['M1HFAN III-F'],
+    "exhaust": ['M1HFAN III-R'],
+}
+
+psu_display_name = {
+    "PA550II-F": ['CSU550AP-3-500', 'DPS-550AB-39 A', 'GW-CRPS550N2C', 'CSU550AP-3-300', 'DPS-550AB-39 B', 'CSU550AP-3'],
+    "PA550II-R": ['CSU550AP-3-501', 'DPS-550AB-40 A', 'GW-CRPS550N2RC'],
+    "PD800I-F": ['U1D-D10800-DRB']
+}
+
+psutypedecode = {
+    0x00: 'N/A',
+    0x01: 'AC',
+    0x02: 'DC',
+}
+
+
+class Unit:
+    Temperature = "C"
+    Voltage = "V"
+    Current = "A"
+    Power = "W"
+    Speed = "RPM"
+
+
+PSU_NOT_PRESENT_PWM = 100
+
+
+class threshold:
+    PSU_TEMP_MIN = -20 * 1000
+    PSU_TEMP_MAX = 60 * 1000
+
+    PSU_FAN_SPEED_MIN = 2000
+    PSU_FAN_SPEED_MAX = 18000
+
+    PSU_OUTPUT_VOLTAGE_MIN = 11 * 1000
+    PSU_OUTPUT_VOLTAGE_MAX = 14 * 1000
+
+    PSU_AC_INPUT_VOLTAGE_MIN = 200 * 1000
+    PSU_AC_INPUT_VOLTAGE_MAX = 240 * 1000
+
+    PSU_DC_INPUT_VOLTAGE_MIN = 190 * 1000
+    PSU_DC_INPUT_VOLTAGE_MAX = 290 * 1000
+
+    ERR_VALUE = -9999999
+
+    PSU_OUTPUT_POWER_MIN = 10 * 1000 * 1000
+    PSU_OUTPUT_POWER_MAX = 560 * 1000 * 1000
+
+    PSU_INPUT_POWER_MIN = 10 * 1000 * 1000
+    PSU_INPUT_POWER_MAX = 625 * 1000 * 1000
+
+    PSU_OUTPUT_CURRENT_MIN = 1 * 1000
+    PSU_OUTPUT_CURRENT_MAX = 45 * 1000
+
+    PSU_INPUT_CURRENT_MIN = 0 * 1000
+    PSU_INPUT_CURRENT_MAX = 7 * 1000
+
+    FRONT_FAN_SPEED_MAX = 24000
+    REAR_FAN_SPEED_MAX = 22500
+    FAN_SPEED_MIN = 5000
+    
+
+    ASPOWER_DC_PSU_TEMP_MIN = -10 * 1000
+    ASPOWER_DC_PSU_TEMP_MAX = 55 * 1000
+
+    ASPOWER_DC_PSU_FAN_SPEED_MIN = 800
+    ASPOWER_DC_PSU_FAN_SPEED_MAX = 24000
+
+    ASPOWER_DC_PSU_OUTPUT_VOLTAGE_MIN = 11.4 * 1000
+    ASPOWER_DC_PSU_OUTPUT_VOLTAGE_MAX = 12.6 * 1000
+
+    ASPOWER_DC_PSU_DC_INPUT_VOLTAGE_MIN = 36 * 1000
+    ASPOWER_DC_PSU_DC_INPUT_VOLTAGE_MAX = 72 * 1000
+
+    ASPOWER_DC_ERR_VALUE = -9999999
+
+    ASPOWER_DC_PSU_OUTPUT_POWER_MIN = 5 * 1000 * 1000
+    ASPOWER_DC_PSU_OUTPUT_POWER_MAX = 800 * 1000 * 1000
+
+    ASPOWER_DC_PSU_INPUT_POWER_MIN = 5 * 1000 * 1000
+    ASPOWER_DC_PSU_INPUT_POWER_MAX = 880 * 1000 * 1000
+
+    ASPOWER_DC_PSU_OUTPUT_CURRENT_MIN = 0.5 * 1000
+    ASPOWER_DC_PSU_OUTPUT_CURRENT_MAX = 66 * 1000
+
+    ASPOWER_DC_PSU_INPUT_CURRENT_MIN = 1 * 1000
+    ASPOWER_DC_PSU_INPUT_CURRENT_MAX = 28 * 1000
+
+
+class Description:
+    CPLD = "Used for managing IO modules, SFP+ modules and system LEDs"
+    BIOS = "Performs initialization of hardware components during booting"
+    FPGA = "Platform management controller for on-board temperature monitoring, in-chassis power"
+
+
+devices = {
+    "onie_e2": [
+        {
+            "name": "ONIE_E2",
+            "e2loc": {"loc": "/sys/bus/i2c/devices/0-0056/eeprom", "way": "sysfs"},
+            "airflow": "exhaust"
+        },
+    ],
+    "psus": [
+        {
+            "e2loc": {"loc": "/sys/bus/i2c/devices/24-0050/eeprom", "way": "sysfs"},
+            "pmbusloc": {"bus": 24, "addr": 0x58, "way": "i2c"},
+            "present": {"loc": "/sys/wb_plat/psu/psu1/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+            "name": "PSU1",
+            "get_threshold_by_model": 1,
+            "psu_display_name": psu_display_name,
+            "airflow": psu_fan_airflow,
+            "TempStatus": {"bus": 24, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0004},
+            "Temperature": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-24/24-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                "Min": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_TEMP_MIN,
+                    "other": threshold.PSU_TEMP_MIN,
+                },
+                "Max": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_TEMP_MAX,
+                    "other": threshold.PSU_TEMP_MAX,
+                },
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            },
+            "FanStatus": {"bus": 24, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0400},
+            "FanSpeed": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-24/24-0058/hwmon/hwmon*/fan1_input", "way": "sysfs"},
+                "Min": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_FAN_SPEED_MIN,
+                    "other": threshold.PSU_FAN_SPEED_MIN,
+                },
+                "Max": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_FAN_SPEED_MAX,
+                    "other": threshold.PSU_FAN_SPEED_MAX,
+                },
+                "Unit": Unit.Speed
+            },
+            "psu_fan_tolerance": 40,
+            "InputsStatus": {"bus": 24, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x2000},
+            "InputsType": {"bus": 24, "addr": 0x58, "offset": 0x80, "way": "i2c", 'psutypedecode': psutypedecode},
+            "InputsVoltage": {
+                'AC': {
+                    "value": {"loc": "/sys/bus/i2c/devices/i2c-24/24-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+                    "Min": threshold.PSU_AC_INPUT_VOLTAGE_MIN,
+                    "Max": threshold.PSU_AC_INPUT_VOLTAGE_MAX,
+                    "Unit": Unit.Voltage,
+                    "format": "float(float(%s)/1000)"
+
+                },
+                'DC': {
+                    "value": {"loc": "/sys/bus/i2c/devices/i2c-24/24-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+                    "Min": {
+                        "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_DC_INPUT_VOLTAGE_MIN,
+                        "other": threshold.PSU_DC_INPUT_VOLTAGE_MIN,
+                    },
+                    "Max": {
+                        "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_DC_INPUT_VOLTAGE_MAX,
+                        "other": threshold.PSU_DC_INPUT_VOLTAGE_MAX,
+                    },
+                    "Unit": Unit.Voltage,
+                    "format": "float(float(%s)/1000)"
+                },
+                'other': {
+                    "value": {"loc": "/sys/bus/i2c/devices/i2c-24/24-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+                    "Min": {
+                        "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_DC_INPUT_VOLTAGE_MIN,
+                        "other": threshold.ERR_VALUE,
+                    },
+                    "Max": {
+                        "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_DC_INPUT_VOLTAGE_MAX,
+                        "other": threshold.ERR_VALUE,
+                    },
+                    "Unit": Unit.Voltage,
+                    "format": "float(float(%s)/1000)"
+                }
+            },
+            "InputsCurrent": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-24/24-0058/hwmon/hwmon*/curr1_input", "way": "sysfs"},
+                "Min": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_INPUT_CURRENT_MIN,
+                    "other": threshold.PSU_INPUT_CURRENT_MIN,
+                },
+                "Max": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_INPUT_CURRENT_MAX,
+                    "other": threshold.PSU_INPUT_CURRENT_MAX,
+                },
+                "Unit": Unit.Current,
+                "format": "float(float(%s)/1000)"
+            },
+            "InputsPower": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-24/24-0058/hwmon/hwmon*/power1_input", "way": "sysfs"},
+                "Min": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_INPUT_POWER_MIN,
+                    "other": threshold.PSU_INPUT_POWER_MIN,
+                },
+                "Max": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_INPUT_POWER_MAX,
+                    "other": threshold.PSU_INPUT_POWER_MAX,
+                },
+                "Unit": Unit.Power,
+                "format": "float(float(%s)/1000000)"
+            },
+            "OutputsStatus": {"bus": 24, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x8800},
+            "OutputsVoltage": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-24/24-0058/hwmon/hwmon*/in2_input", "way": "sysfs"},
+                "Min": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_OUTPUT_VOLTAGE_MIN,
+                    "other": threshold.PSU_OUTPUT_VOLTAGE_MIN,
+                },
+                "Max": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_OUTPUT_VOLTAGE_MAX,
+                    "other": threshold.PSU_OUTPUT_VOLTAGE_MAX,
+                },
+                "Unit": Unit.Voltage,
+                "format": "float(float(%s)/1000)"
+            },
+            "OutputsCurrent": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-24/24-0058/hwmon/hwmon*/curr2_input", "way": "sysfs"},
+                "Min": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_OUTPUT_CURRENT_MIN,
+                    "other": threshold.PSU_OUTPUT_CURRENT_MIN,
+                },
+                "Max": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_OUTPUT_CURRENT_MAX,
+                    "other": threshold.PSU_OUTPUT_CURRENT_MAX,
+                },
+                "Unit": Unit.Current,
+                "format": "float(float(%s)/1000)"
+            },
+            "OutputsPower": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-24/24-0058/hwmon/hwmon*/power2_input", "way": "sysfs"},
+                "Min": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_OUTPUT_POWER_MIN,
+                    "other": threshold.PSU_OUTPUT_POWER_MIN,
+                },
+                "Max": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_OUTPUT_POWER_MAX,
+                    "other": threshold.PSU_OUTPUT_POWER_MAX,
+                },
+                "Unit": Unit.Power,
+                "format": "float(float(%s)/1000000)"
+            },
+        },
+        {
+            "e2loc": {"loc": "/sys/bus/i2c/devices/25-0050/eeprom", "way": "sysfs"},
+            "pmbusloc": {"bus": 25, "addr": 0x58, "way": "i2c"},
+            "present": {"loc": "/sys/wb_plat/psu/psu2/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+            "name": "PSU2",
+            "get_threshold_by_model": 1,
+            "psu_display_name": psu_display_name,
+            "airflow": psu_fan_airflow,
+            "TempStatus": {"bus": 25, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0004},
+            "Temperature": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-25/25-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                "Min": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_TEMP_MIN,
+                    "other": threshold.PSU_TEMP_MIN,
+                },
+                "Max": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_TEMP_MAX,
+                    "other": threshold.PSU_TEMP_MAX,
+                },
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            },
+            "FanStatus": {"bus": 25, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0400},
+            "FanSpeed": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-25/25-0058/hwmon/hwmon*/fan1_input", "way": "sysfs"},
+                "Min": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_FAN_SPEED_MIN,
+                    "other": threshold.PSU_FAN_SPEED_MIN,
+                },
+                "Max": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_FAN_SPEED_MAX,
+                    "other": threshold.PSU_FAN_SPEED_MAX,
+                },
+                "Unit": Unit.Speed
+            },
+            "psu_fan_tolerance": 40,
+            "InputsStatus": {"bus": 25, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x2000},
+            "InputsType": {"bus": 25, "addr": 0x58, "offset": 0x80, "way": "i2c", 'psutypedecode': psutypedecode},
+            "InputsVoltage": {
+                'AC': {
+                    "value": {"loc": "/sys/bus/i2c/devices/i2c-25/25-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+                    "Min": threshold.PSU_AC_INPUT_VOLTAGE_MIN,
+                    "Max": threshold.PSU_AC_INPUT_VOLTAGE_MAX,
+                    "Unit": Unit.Voltage,
+                    "format": "float(float(%s)/1000)"
+
+                },
+                'DC': {
+                    "value": {"loc": "/sys/bus/i2c/devices/i2c-25/25-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+                    "Min": {
+                        "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_DC_INPUT_VOLTAGE_MIN,
+                        "other": threshold.PSU_DC_INPUT_VOLTAGE_MIN,
+                    },
+                    "Max": {
+                        "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_DC_INPUT_VOLTAGE_MAX,
+                        "other": threshold.PSU_DC_INPUT_VOLTAGE_MAX,
+                    },
+                    "Unit": Unit.Voltage,
+                    "format": "float(float(%s)/1000)"
+                },
+                'other': {
+                    "value": {"loc": "/sys/bus/i2c/devices/i2c-25/25-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+                    "Min": {
+                        "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_DC_INPUT_VOLTAGE_MIN,
+                        "other": threshold.ERR_VALUE,
+                    },
+                    "Max": {
+                        "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_DC_INPUT_VOLTAGE_MAX,
+                        "other": threshold.ERR_VALUE,
+                    },
+                    "Unit": Unit.Voltage,
+                    "format": "float(float(%s)/1000)"
+                }
+            },
+            "InputsCurrent": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-25/25-0058/hwmon/hwmon*/curr1_input", "way": "sysfs"},
+                "Min": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_INPUT_CURRENT_MIN,
+                    "other": threshold.PSU_INPUT_CURRENT_MIN,
+                },
+                "Max": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_INPUT_CURRENT_MAX,
+                    "other": threshold.PSU_INPUT_CURRENT_MAX,
+                },
+                "Unit": Unit.Current,
+                "format": "float(float(%s)/1000)"
+            },
+            "InputsPower": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-25/25-0058/hwmon/hwmon*/power1_input", "way": "sysfs"},
+                "Min": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_INPUT_POWER_MIN,
+                    "other": threshold.PSU_INPUT_POWER_MIN,
+                },
+                "Max": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_INPUT_POWER_MAX,
+                    "other": threshold.PSU_INPUT_POWER_MAX,
+                },
+                "Unit": Unit.Power,
+                "format": "float(float(%s)/1000000)"
+            },
+            "OutputsStatus": {"bus": 25, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x8800},
+            "OutputsVoltage": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-25/25-0058/hwmon/hwmon*/in2_input", "way": "sysfs"},
+                "Min": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_OUTPUT_VOLTAGE_MIN,
+                    "other": threshold.PSU_OUTPUT_VOLTAGE_MIN,
+                },
+                "Max": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_OUTPUT_VOLTAGE_MAX,
+                    "other": threshold.PSU_OUTPUT_VOLTAGE_MAX,
+                },
+                "Unit": Unit.Voltage,
+                "format": "float(float(%s)/1000)"
+            },
+            "OutputsCurrent": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-25/25-0058/hwmon/hwmon*/curr2_input", "way": "sysfs"},
+                "Min": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_OUTPUT_CURRENT_MIN,
+                    "other": threshold.PSU_OUTPUT_CURRENT_MIN,
+                },
+                "Max": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_OUTPUT_CURRENT_MAX,
+                    "other": threshold.PSU_OUTPUT_CURRENT_MAX,
+                },
+                "Unit": Unit.Current,
+                "format": "float(float(%s)/1000)"
+            },
+            "OutputsPower": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-25/25-0058/hwmon/hwmon*/power2_input", "way": "sysfs"},
+                "Min": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_OUTPUT_POWER_MIN,
+                    "other": threshold.PSU_OUTPUT_POWER_MIN,
+                },
+                "Max": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_OUTPUT_POWER_MAX,
+                    "other": threshold.PSU_OUTPUT_POWER_MAX,
+                },
+                "Unit": Unit.Power,
+                "format": "float(float(%s)/1000000)"
+            },
+        }
+    ],
+    "temps": [
+        {
+            "name": "SWITCH_TEMP",
+            "temp_id": "TEMP1",
+            "api_name": "ASIC_TEMP",
+            "Temperature": {
+                "value": {"loc": "/sys/bus/i2c/devices/3-0044/hwmon/hwmon*/temp99_input", "way": "sysfs"},
+                "Min": -30000,
+                "Low": 0,
+                "High": 105000,
+                "Max": 110000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            }
+        },
+        {
+            "name": "CPU_TEMP",
+            "temp_id": "TEMP2",
+            "Temperature": {
+                "value": {"loc": "/sys/bus/platform/devices/coretemp.0/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                "Min": -15000,
+                "Low": 0,
+                "High": 100000,
+                "Max": 102000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            }
+        },
+        {
+            "name": "INLET_TEMP",
+            "temp_id": "TEMP3",
+            "Temperature": {
+                "value": {"loc": "/sys/bus/i2c/devices/3-004c/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                "Min": -30000,
+                "Low": 0,
+                "High": 55000,
+                "Max": 60000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            },
+            "fix_value": {
+                "fix_type": "config",
+                "addend": -3,
+            }
+        },
+        {
+            "name": "OUTLET_TEMP",
+            "temp_id": "TEMP4",
+            "Temperature": {
+                "value": {"loc": "/sys/bus/i2c/devices/3-0048/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                "Min": -30000,
+                "Low": 0,
+                "High": 75000,
+                "Max": 80000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            }
+        },
+        {
+            "name": "BOARD_TEMP",
+            "temp_id": "TEMP5",
+            "api_name": "MAC_OUT_TEMP",
+            "Temperature": {
+                "value": {"loc": "/sys/bus/i2c/devices/3-0049/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                "Min": -30000,
+                "Low": 0,
+                "High": 75000,
+                "Max": 80000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            }
+        },
+        {
+            "name": "MAC_IN_TEMP",
+            "temp_id": "TEMP6",
+            "Temperature": {
+                "value": {"loc": "/sys/bus/i2c/devices/3-004a/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                "Min": -30000,
+                "Low": 0,
+                "High": 75000,
+                "Max": 80000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            }
+        },
+        {
+            "name": "PSU1_TEMP",
+            "temp_id": "TEMP7",
+            "Temperature": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-24/24-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                "Min": -20000,
+                "Low": 0,
+                "High": 55000,
+                "Max": 60000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            }
+        },
+        {
+            "name": "PSU2_TEMP",
+            "temp_id": "TEMP8",
+            "Temperature": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-25/25-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                "Min": -20000,
+                "Low": 0,
+                "High": 55000,
+                "Max": 60000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            }
+        },
+        {
+            "name": "SFF_TEMP",
+            "Temperature": {
+                "value": {"loc": "/tmp/highest_sff_temp", "way": "sysfs", "flock_path": "/tmp/highest_sff_temp"},
+                "Min": -30000,
+                "Low": 0,
+                "High": 90000,
+                "Max": 100000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            },
+            "invalid": -10000,
+            "error": -9999,
+        }
+    ],
+    "leds": [
+        {
+            "name": "FRONT_SYS_LED",
+            "led_type": "SYS_LED",
+            "led": {"bus": 6, "addr": 0x0d, "offset": 0x72, "way": "i2c"},
+            "led_attrs": {
+                "off": 0x00, "red_flash": 0x01, "red": 0x02,
+                "green_flash": 0x03, "green": 0x04, "amber_flash": 0x05,
+                "amber": 0x06, "mask": 0x07
+            },
+        },
+        {
+            "name": "FRONT_PSU_LED",
+            "led_type": "PSU_LED",
+            "led": {"bus": 6, "addr": 0x0d, "offset": 0x73, "way": "i2c"},
+            "led_attrs": {
+                "off": 0x10, "red_flash": 0x11, "red": 0x12,
+                "green_flash": 0x13, "green": 0x14, "amber_flash": 0x15,
+                "amber": 0x16, "mask": 0x17
+            },
+        },
+        {
+            "name": "FRONT_FAN_LED",
+            "led_type": "FAN_LED",
+            "led": {"bus": 6, "addr": 0x0d, "offset": 0x74, "way": "i2c"},
+            "led_attrs": {
+                "off": 0x10, "red_flash": 0x11, "red": 0x12,
+                "green_flash": 0x13, "green": 0x14, "amber_flash": 0x15,
+                "amber": 0x16, "mask": 0x17
+            },
+        },
+    ],
+    "fans": [
+        {
+            "name": "FAN1",
+            "airflow": fanairflow,
+            "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-16/16-0050/eeprom', 'way': 'sysfs'},
+            "present": {"loc": "/sys/wb_plat/fan/fan1/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+            "SpeedMin": threshold.FAN_SPEED_MIN,
+            "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+            "led": {"bus": 2, "addr": 0x0d, "offset": 0x3b, "way": "i2c"},
+            "led_attrs": {
+                "off": 0x0b, "red_flash": 0x0e, "red": 0x0a,
+                "green_flash": 0x0d, "green": 0x09, "amber_flash": 0x07,
+                "amber": 0x03, "mask": 0x0f
+            },
+            "PowerMax": 38.4,
+            "Rotor": {
+                "Rotor1_config": {
+                    "name": "Rotor1",
+                    "Set_speed": {"bus": 2, "addr": 0x0d, "offset": 0x14, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan1/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan1/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan1/motor1/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.FRONT_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+                "Rotor2_config": {
+                    "name": "Rotor2",
+                    "Set_speed": {"bus": 2, "addr": 0x0d, "offset": 0x14, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan1/motor0/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan1/motor0/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.REAR_FAN_SPEED_MAX,
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan1/motor0/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.REAR_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+            },
+        },
+        {
+            "name": "FAN2",
+            "airflow": fanairflow,
+            "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-17/17-0050/eeprom', 'way': 'sysfs'},
+            "present": {"loc": "/sys/wb_plat/fan/fan2/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+            "SpeedMin": threshold.FAN_SPEED_MIN,
+            "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+            "led": {"bus": 2, "addr": 0x0d, "offset": 0x3c, "way": "i2c"},
+            "led_attrs": {
+                "off": 0x0b, "red_flash": 0x0e, "red": 0x0a,
+                "green_flash": 0x0d, "green": 0x09, "amber_flash": 0x07,
+                "amber": 0x03, "mask": 0x0f
+            },
+            "PowerMax": 38.4,
+            "Rotor": {
+                "Rotor1_config": {
+                    "name": "Rotor1",
+                    "Set_speed": {"bus": 2, "addr": 0x0d, "offset": 0x15, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan2/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan2/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan2/motor1/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.FRONT_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+                "Rotor2_config": {
+                    "name": "Rotor2",
+                    "Set_speed": {"bus": 2, "addr": 0x0d, "offset": 0x15, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan2/motor0/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan2/motor0/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.REAR_FAN_SPEED_MAX,
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan2/motor0/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.REAR_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+            },
+        },
+        {
+            "name": "FAN3",
+            "airflow": fanairflow,
+            "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-18/18-0050/eeprom', 'way': 'sysfs'},
+            "present": {"loc": "/sys/wb_plat/fan/fan3/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+            "SpeedMin": threshold.FAN_SPEED_MIN,
+            "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+            "led": {"bus": 2, "addr": 0x0d, "offset": 0x3d, "way": "i2c"},
+            "led_attrs": {
+                "off": 0x0b, "red_flash": 0x0e, "red": 0x0a,
+                "green_flash": 0x0d, "green": 0x09, "amber_flash": 0x07,
+                "amber": 0x03, "mask": 0x0f
+            },
+            "PowerMax": 38.4,
+            "Rotor": {
+                "Rotor1_config": {
+                    "name": "Rotor1",
+                    "Set_speed": {"bus": 2, "addr": 0x0d, "offset": 0x16, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan3/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan3/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan3/motor1/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.FRONT_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+                "Rotor2_config": {
+                    "name": "Rotor2",
+                    "Set_speed": {"bus": 2, "addr": 0x0d, "offset": 0x16, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan3/motor0/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan3/motor0/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.REAR_FAN_SPEED_MAX,
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan3/motor0/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.REAR_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+            },
+        },
+
+        {
+            "name": "FAN4",
+            "airflow": fanairflow,
+            "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-19/19-0050/eeprom', 'way': 'sysfs'},
+            "present": {"loc": "/sys/wb_plat/fan/fan4/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+            "SpeedMin": threshold.FAN_SPEED_MIN,
+            "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+            "led": {"bus": 2, "addr": 0x0d, "offset": 0x3e, "way": "i2c"},
+            "led_attrs": {
+                "off": 0x0b, "red_flash": 0x0e, "red": 0x0a,
+                "green_flash": 0x0d, "green": 0x09, "amber_flash": 0x07,
+                "amber": 0x03, "mask": 0x0f
+            },
+            "PowerMax": 38.4,
+            "Rotor": {
+                "Rotor1_config": {
+                    "name": "Rotor1",
+                    "Set_speed": {"bus": 2, "addr": 0x0d, "offset": 0x17, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan4/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan4/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan4/motor1/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.FRONT_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+                "Rotor2_config": {
+                    "name": "Rotor2",
+                    "Set_speed": {"bus": 2, "addr": 0x0d, "offset": 0x17, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan4/motor0/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan4/motor0/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.REAR_FAN_SPEED_MAX,
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan4/motor0/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.REAR_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+            },
+        },
+
+    ],
+    "cplds": [
+        {
+            "name": "CPU_CPLD",
+            "cpld_id": "CPLD1",
+            "VersionFile": {"loc": "/dev/cpld0", "offset": 0, "len": 4, "way": "devfile_ascii"},
+            "desc": "Used for system power",
+            "slot": 0,
+            "warm": 0,
+        },
+        {
+            "name": "CONNECT_CPLD",
+            "cpld_id": "CPLD2",
+            "VersionFile": {"loc": "/dev/cpld1", "offset": 0, "len": 4, "way": "devfile_ascii"},
+            "desc": "Used for base functions",
+            "slot": 0,
+            "warm": 0,
+        },
+        {
+            "name": "CONNECT_CPLD-FAN",
+            "cpld_id": "CPLD3",
+            "VersionFile": {"loc": "/dev/cpld2", "offset": 0, "len": 4, "way": "devfile_ascii"},
+            "desc": "Used for fan modules",
+            "slot": 0,
+            "warm": 0,
+        },
+        {
+            "name": "MAC_CPLD1",
+            "cpld_id": "CPLD4",
+            "VersionFile": {"loc": "/dev/cpld3", "offset": 0, "len": 4, "way": "devfile_ascii"},
+            "desc": "Used for sff modules",
+            "slot": 0,
+            "warm": 0,
+        },
+        {
+            "name": "MAC_CPLD2",
+            "cpld_id": "CPLD5",
+            "VersionFile": {"loc": "/dev/cpld4", "offset": 0, "len": 4, "way": "devfile_ascii"},
+            "desc": "Used for sff modules",
+            "slot": 0,
+            "warm": 0,
+        },
+        {
+            "name": "FPGA",
+            "cpld_id": "CPLD6",
+            "VersionFile": {"loc": "/dev/fpga0", "offset": 0, "len": 4, "way": "devfile_ascii"},
+            "desc": "Used for base functions",
+            "slot": 0,
+            "format": "little_endian",
+            "warm": 0,
+        },
+        {
+            "name": "BIOS",
+            "cpld_id": "CPLD7",
+            "VersionFile": {"cmd": "dmidecode -s bios-version", "way": "cmd"},
+            "desc": "Performs initialization of hardware components during booting",
+            "slot": 0,
+            "type": "str",
+            "warm": 0,
+        },
+    ],
+    "dcdc": [
+        {
+            "name": "Switch_ZSFP1_3v3_C",
+            "dcdc_id": "DCDC1",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0040/hwmon/hwmon*/curr1_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 22000,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Switch_QSFP1_3v3_C",
+            "dcdc_id": "DCDC2",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0040/hwmon/hwmon*/curr3_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 22000,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Switch_5v0_C",
+            "dcdc_id": "DCDC3",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0040/hwmon/hwmon*/curr2_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 1000,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Switch_ZSFP1_3v3_V",
+            "dcdc_id": "DCDC4",
+            "Min": 2640,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0040/hwmon/hwmon*/in1_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 3960,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Switch_QSFP1_3v3_V",
+            "dcdc_id": "DCDC5",
+            "Min": 2640,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0040/hwmon/hwmon*/in3_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 3960,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Switch_5v0_V",
+            "dcdc_id": "DCDC6",
+            "Min": 4000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0040/hwmon/hwmon*/in2_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 6000,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Switch_1v2_C",
+            "dcdc_id": "DCDC7",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0041/hwmon/hwmon*/curr1_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 2000,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Switch_3v3_C",
+            "dcdc_id": "DCDC8",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0041/hwmon/hwmon*/curr2_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 1000,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Switch_Cpld_3v3_C",
+            "dcdc_id": "DCDC9",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0041/hwmon/hwmon*/curr3_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 2000,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Switch_1v2_V",
+            "dcdc_id": "DCDC10",
+            "Min": 960,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0041/hwmon/hwmon*/in1_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 1440,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Switch_3v3_V",
+            "dcdc_id": "DCDC11",
+            "Min": 2640,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0041/hwmon/hwmon*/in2_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 3960,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Switch_Cpld_3v3_V",
+            "dcdc_id": "DCDC12",
+            "Min": 2640,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0041/hwmon/hwmon*/in3_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 3960,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Con_1v2_C",
+            "dcdc_id": "DCDC13",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0042/hwmon/hwmon*/curr1_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 1300,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Con_3v3_C",
+            "dcdc_id": "DCDC14",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0042/hwmon/hwmon*/curr2_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 2800,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Con_SSD_3v3_C",
+            "dcdc_id": "DCDC15",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0042/hwmon/hwmon*/curr3_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 4500,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Con_1v2_V",
+            "dcdc_id": "DCDC16",
+            "Min": 960,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0042/hwmon/hwmon*/in1_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 1440,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Con_3v3_V",
+            "dcdc_id": "DCDC17",
+            "Min": 2640,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0042/hwmon/hwmon*/in2_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 3960,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Con_SSD_3v3_V",
+            "dcdc_id": "DCDC18",
+            "Min": 2640,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0042/hwmon/hwmon*/in3_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 3960,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Cpu_3v3_C",
+            "dcdc_id": "DCDC19",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0043/hwmon/hwmon*/curr1_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 4686,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Cpu_5v_C",
+            "dcdc_id": "DCDC20",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0043/hwmon/hwmon*/curr2_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 2200,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Cpu_1v7_C",
+            "dcdc_id": "DCDC21",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0043/hwmon/hwmon*/curr3_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 2200,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Cpu_3v3_V",
+            "dcdc_id": "DCDC22",
+            "Min": 2640,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0043/hwmon/hwmon*/in1_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 3960,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Cpu_5v_V",
+            "dcdc_id": "DCDC23",
+            "Min": 4000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0043/hwmon/hwmon*/in2_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 6000,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Cpu_1v7_V",
+            "dcdc_id": "DCDC24",
+            "Min": 1360,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0043/hwmon/hwmon*/in3_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 2040,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Cpu_CORE_C",
+            "dcdc_id": "DCDC25",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0060/hwmon/hwmon*/curr1_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 47300,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Cpu_1v05_C",
+            "dcdc_id": "DCDC26",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0060/hwmon/hwmon*/curr2_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 15400,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Cpu_CORE_V",
+            "dcdc_id": "DCDC27",
+            "Min": 1456,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0060/hwmon/hwmon*/in2_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 2184,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Cpu_1v05_V",
+            "dcdc_id": "DCDC28",
+            "Min": 840,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0060/hwmon/hwmon*/in3_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 1260,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Switch_CORE_C",
+            "dcdc_id": "DCDC29",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0064/hwmon/hwmon*/curr2_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 220000,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Switch_ANALOG_C",
+            "dcdc_id": "DCDC30",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0064/hwmon/hwmon*/curr3_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 18000,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Switch_CORE_V",
+            "dcdc_id": "DCDC31",
+            "Min": 600,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0064/hwmon/hwmon*/in2_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 1200,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Switch_ANALOG_V",
+            "dcdc_id": "DCDC32",
+            "Min": 640,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0064/hwmon/hwmon*/in3_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 960,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Cpu_1v2_C",
+            "dcdc_id": "DCDC33",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-006c/hwmon/hwmon*/curr1_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 9900,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Cpu_2v23_C",
+            "dcdc_id": "DCDC34",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-006c/hwmon/hwmon*/curr2_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 2200,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Cpu_1v2_V",
+            "dcdc_id": "DCDC35",
+            "Min": 960,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-006c/hwmon/hwmon*/in2_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 1440,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Cpu_2v23_V",
+            "dcdc_id": "DCDC36",
+            "Min": 1784,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-006c/hwmon/hwmon*/in3_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 2676,
+            "format": "float(float(%s)/1000)",
+        },
+    ],
+    "cpu": [
+        {
+            "name": "cpu",
+            "reboot_cause_path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"
+        }
+    ],
+    "sfps": {
+        "ver": '1.0',
+        "port_index_start": 1,
+        "port_num": 56,
+        "log_level": 2,
+        "eeprom_retry_times": 5,
+        "eeprom_retry_break_sec": 0.2,
+        "presence_cpld": {
+            "dev_id": {
+                3: {
+                    "offset": {
+                        0x30: "1-8",
+                        0x31: "9-16",
+                        0x32: "17-24",
+                    },
+                },
+                4: {
+                    "offset": {
+                        0x30: "25-32",
+                        0x31: "33-40",
+                        0x32: "41-48",
+                        0x33: "49-56",
+                    },
+                },
+            },
+        },
+        "presence_val_is_present": 0,
+        "eeprom_path": "/sys/bus/i2c/devices/i2c-%d/%d-0050/eeprom",
+        "eeprom_path_key": list(range(32, 88)),
+        "optoe_driver_path": "/sys/bus/i2c/devices/i2c-%d/%d-0050/dev_class",
+        "optoe_driver_key": list(range(32, 88)),
+        "txdis_cpld": {
+            "dev_id": {
+                3: {
+                    "offset": {
+                        0x60: "1-8",
+                        0x61: "9-16",
+                        0x62: "17-24",
+                    },
+                },
+                4: {
+                    "offset": {
+                        0x60: "25-32",
+                        0x61: "33-40",
+                        0x62: "41-48",
+                    },
+                },
+            },
+        },
+        "txdisable_val_is_on": 0,
+        "reset_cpld": {
+            "dev_id": {
+                4: {
+                    "offset": {
+                        0xb9: "49-56",
+                    },
+                },
+            },
+        },
+        "reset_val_is_reset": 0,
+    }
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/hal-config/x86_64_micas_m2_w6510_48v8c_r0_monitor.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/hal-config/x86_64_micas_m2_w6510_48v8c_r0_monitor.py
new file mode 100755
index 000000000..aab279a21
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/hal-config/x86_64_micas_m2_w6510_48v8c_r0_monitor.py
@@ -0,0 +1,206 @@
+# coding:utf-8
+
+
+monitor = {
+    "openloop": {
+        "linear": {
+            "name": "linear",
+            "flag": 0,
+            "pwm_min": 0x80,
+            "pwm_max": 0xff,
+            "K": 11,
+            "tin_min": 38,
+        },
+        "curve": {
+            "name": "curve",
+            "flag": 0,
+            "pwm_min": 0x5a,
+            "pwm_max": 0xff,
+            "a": 0.086,
+            "b": 0.318,
+            "c": 28,
+            "tin_min": 25,
+        },
+    },
+
+    "pid": {
+        "CPU_TEMP": {
+            "name": "CPU_TEMP",
+            "flag": 1,
+            "type": "duty",
+            "pwm_min": 0x80,
+            "pwm_max": 0xff,
+            "Kp": 3,
+            "Ki": 0.5,
+            "Kd": 0.5,
+            "target": 89,
+            "value": [None, None, None],
+        },
+        "SWITCH_TEMP": {
+            "name": "SWITCH_TEMP",
+            "flag": 1,
+            "type": "duty",
+            "pwm_min": 0x80,
+            "pwm_max": 0xff,
+            "Kp": 3,
+            "Ki": 0.4,
+            "Kd": 0.4,
+            "target": 82,
+            "value": [None, None, None],
+        },
+        "OUTLET_TEMP": {
+            "name": "OUTLET_TEMP",
+            "flag": 0,
+            "type": "duty",
+            "pwm_min": 0x80,
+            "pwm_max": 0xff,
+            "Kp": 2,
+            "Ki": 0.4,
+            "Kd": 0.3,
+            "target": 65,
+            "value": [None, None, None],
+        },
+        "BOARD_TEMP": {
+            "name": "BOARD_TEMP",
+            "flag": 0,
+            "type": "duty",
+            "pwm_min": 0x80,
+            "pwm_max": 0xff,
+            "Kp": 2,
+            "Ki": 0.4,
+            "Kd": 0.3,
+            "target": 65,
+            "value": [None, None, None],
+        },
+        "SFF_TEMP": {
+            "name": "SFF_TEMP",
+            "flag": 1,
+            "type": "duty",
+            "pwm_min": 0x80,
+            "pwm_max": 0xff,
+            "Kp": 0.1,
+            "Ki": 0.4,
+            "Kd": 0,
+            "target": 60,
+            "value": [None, None, None],
+        },
+    },
+
+    "hyst": {
+        "INLET_TEMP": {
+            "name": "INLET_TEMP",
+            "flag": 1,
+            "type": "duty",
+            "hyst_min": 50,        # duty
+            "hyst_max": 100,       # duty
+            "last_hyst_value": 50,  # duty
+            "temp_min": 23,
+            "temp_max": 40,
+            "value": [None, None],
+            "rising": {
+                23: 50,
+                24: 50,
+                25: 50,
+                26: 53,
+                27: 56,
+                28: 59,
+                29: 62,
+                30: 65,
+                31: 68,
+                32: 71,
+                33: 74,
+                34: 77,
+                35: 80,
+                36: 84,
+                37: 88,
+                38: 92,
+                39: 96,
+                40: 100,
+            },
+            "descending": {
+                23: 50,
+                24: 53,
+                25: 56,
+                26: 59,
+                27: 62,
+                28: 65,
+                29: 68,
+                30: 71,
+                31: 74,
+                32: 77,
+                33: 80,
+                34: 84,
+                35: 88,
+                36: 92,
+                37: 96,
+                38: 100,
+                39: 100,
+                40: 100,
+            },
+        }
+    },
+
+    "temps_threshold": {
+        "SWITCH_TEMP": {"name": "SWITCH_TEMP", "warning": 100, "critical": 105},
+        "INLET_TEMP": {"name": "INLET_TEMP", "warning": 40, "critical": 50},
+        "BOARD_TEMP": {"name": "BOARD_TEMP", "warning": 70, "critical": 80},
+        "OUTLET_TEMP": {"name": "OUTLET_TEMP", "warning": 70, "critical": 80},
+        "CPU_TEMP": {"name": "CPU_TEMP", "warning": 100, "critical": 102},
+        "SFF_TEMP": {"name": "SFF_TEMP", "warning": 999, "critical": 1000, "ignore_threshold": 1, "invalid": -10000, "error": -9999},
+    },
+
+    "fancontrol_para": {
+        "interval": 5,
+        "fan_air_flow_monitor": 1,
+        "psu_air_flow_monitor": 1,
+        "max_pwm": 0xff,
+        "min_pwm": 0x80,
+        "abnormal_pwm": 0xff,
+        "warning_pwm": 0xff,
+        "temp_invalid_pid_pwm": 0x80,
+        "temp_error_pid_pwm": 0x80,
+        "temp_fail_num": 3,
+        "check_temp_fail": [
+            {"temp_name": "INLET_TEMP"},
+            {"temp_name": "SWITCH_TEMP"},
+            {"temp_name": "CPU_TEMP"},
+        ],
+        "temp_warning_num": 3,  # temp over warning 3 times continuously
+        "temp_critical_num": 3,  # temp over critical 3 times continuously
+        "temp_warning_countdown": 60,  # 5 min warning speed after not warning
+        "temp_critical_countdown": 60,  # 5 min full speed after not critical
+        "rotor_error_count": 6,  # fan rotor error 6 times continuously
+        "inlet_mac_diff": 999,
+        "check_crit_reboot_flag": 1,
+        "check_crit_reboot_num": 3,
+        "check_crit_sleep_time": 20,
+        "psu_absent_fullspeed_num": 0xFF,
+        "fan_absent_fullspeed_num": 1,
+        "rotor_error_fullspeed_num": 1,
+    },
+
+    "ledcontrol_para": {
+        "interval": 5,
+        "checkpsu": 0,  # 0: sys led don't follow psu led
+        "checkfan": 0,  # 0: sys led don't follow fan led
+        "psu_amber_num": 1,
+        "fan_amber_num": 1,
+        "board_sys_led": [
+            {"led_name": "FRONT_SYS_LED"},
+        ],
+        "board_psu_led": [
+            {"led_name": "FRONT_PSU_LED"},
+        ],
+        "board_fan_led": [
+            {"led_name": "FRONT_FAN_LED"},
+        ],
+        "psu_air_flow_monitor": 1,
+        "fan_air_flow_monitor": 1,
+        "psu_air_flow_amber_num": 1,
+        "fan_air_flow_amber_num": 1,
+    },
+    "otp_reboot_judge_file": {
+        "otp_switch_reboot_judge_file": "/etc/.otp_switch_reboot_flag",
+        "otp_other_reboot_judge_file": "/etc/.otp_other_reboot_flag",
+    },
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/modules/driver/Makefile b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/modules/driver/Makefile
new file mode 100755
index 000000000..5573a18f0
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/modules/driver/Makefile
@@ -0,0 +1,12 @@
+MAKEFILE_FILE_PATH = $(abspath $(lastword $(MAKEFILE_LIST)))
+MODULES_DIR = $(abspath $(MAKEFILE_FILE_PATH)/../../../../common/modules)
+
+EXTRA_CFLAGS+= -I$(MODULES_DIR)
+EXTRA_CFLAGS+= -I$(MODULES_DIR)/linux
+
+obj-m :=  wb_pcie_dev_device.o
+obj-m += wb_i2c_mux_pca954x_device.o
+obj-m += wb_i2c_ocores_device.o
+obj-m += wb_lpc_drv_device.o
+obj-m += wb_i2c_dev_device.o
+obj-m += wb_io_dev_device.o
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/modules/driver/wb_i2c_dev_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/modules/driver/wb_i2c_dev_device.c
new file mode 100644
index 000000000..865e7afea
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/modules/driver/wb_i2c_dev_device.c
@@ -0,0 +1,140 @@
+#include <linux/module.h>
+#include <linux/io.h>
+#include <linux/i2c.h>
+#include <linux/device.h>
+#include <linux/delay.h>
+#include <linux/platform_device.h>
+
+#include <wb_i2c_dev.h>
+
+static int g_wb_i2c_dev_device_debug = 0;
+static int g_wb_i2c_dev_device_error = 0;
+
+module_param(g_wb_i2c_dev_device_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_i2c_dev_device_error, int, S_IRUGO | S_IWUSR);
+
+#define WB_I2C_DEV_DEVICE_DEBUG_VERBOSE(fmt, args...) do {                                        \
+    if (g_wb_i2c_dev_device_debug) { \
+        printk(KERN_INFO "[WB_I2C_DEV_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define WB_I2C_DEV_DEVICE_DEBUG_ERROR(fmt, args...) do {                                        \
+    if (g_wb_i2c_dev_device_error) { \
+        printk(KERN_ERR "[WB_I2C_DEV_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+static i2c_dev_device_t i2c_dev_device_data0 = {
+    .i2c_bus = 2,
+    .i2c_addr = 0x0d,
+    .i2c_name = "cpld2",
+    .data_bus_width = 1,
+    .addr_bus_width = 1,
+    .per_rd_len = 256,
+    .per_wr_len = 256,
+    .i2c_len = 256,
+};
+
+static i2c_dev_device_t i2c_dev_device_data1 = {
+    .i2c_bus = 8,
+    .i2c_addr = 0x30,
+    .i2c_name = "cpld3",
+    .data_bus_width = 1,
+    .addr_bus_width = 1,
+    .per_rd_len = 256,
+    .per_wr_len = 256,
+    .i2c_len = 256,
+};
+
+static i2c_dev_device_t i2c_dev_device_data2 = {
+    .i2c_bus = 8,
+    .i2c_addr = 0x31,
+    .i2c_name = "cpld4",
+    .data_bus_width = 1,
+    .addr_bus_width = 1,
+    .per_rd_len = 256,
+    .per_wr_len = 256,
+    .i2c_len = 256,
+};
+
+static i2c_dev_device_t i2c_dev_device_data3 = {
+    .i2c_bus = 6,
+    .i2c_addr = 0x0d,
+    .i2c_name = "cpld5",
+    .data_bus_width = 1,
+    .addr_bus_width = 1,
+    .per_rd_len = 256,
+    .per_wr_len = 256,
+    .i2c_len = 256,
+};
+
+struct i2c_board_info i2c_dev_device_info[] = {
+    {
+        .type = "wb-i2c-dev",
+        .platform_data = &i2c_dev_device_data0,
+    },
+    {
+        .type = "wb-i2c-dev",
+        .platform_data = &i2c_dev_device_data1,
+    },
+    {
+        .type = "wb-i2c-dev",
+        .platform_data = &i2c_dev_device_data2,
+    },
+    {
+        .type = "wb-i2c-dev",
+        .platform_data = &i2c_dev_device_data3,
+    },
+};
+
+static int __init wb_i2c_dev_device_init(void)
+{
+    int i;
+    struct i2c_adapter *adap;
+    struct i2c_client *client;
+    i2c_dev_device_t *i2c_dev_device_data;
+
+    WB_I2C_DEV_DEVICE_DEBUG_VERBOSE("enter!\n");
+    for (i = 0; i < ARRAY_SIZE(i2c_dev_device_info); i++) {
+        i2c_dev_device_data = i2c_dev_device_info[i].platform_data;
+        i2c_dev_device_info[i].addr = i2c_dev_device_data->i2c_addr;
+        adap = i2c_get_adapter(i2c_dev_device_data->i2c_bus);
+        if (adap == NULL) {
+            i2c_dev_device_data->client = NULL;
+            printk(KERN_ERR "get i2c bus %d adapter fail.\n", i2c_dev_device_data->i2c_bus);
+            continue;
+        }
+        client = i2c_new_client_device(adap, &i2c_dev_device_info[i]);
+        if (!client) {
+            i2c_dev_device_data->client = NULL;
+            printk(KERN_ERR "Failed to register i2c dev device %d at bus %d!\n",
+                i2c_dev_device_data->i2c_addr, i2c_dev_device_data->i2c_bus);
+        } else {
+            i2c_dev_device_data->client = client;
+        }
+        i2c_put_adapter(adap);
+    }
+    return 0;
+}
+
+static void __exit wb_i2c_dev_device_exit(void)
+{
+    int i;
+    i2c_dev_device_t *i2c_dev_device_data;
+
+    WB_I2C_DEV_DEVICE_DEBUG_VERBOSE("enter!\n");
+    for (i = ARRAY_SIZE(i2c_dev_device_info) - 1; i >= 0; i--) {
+        i2c_dev_device_data = i2c_dev_device_info[i].platform_data;
+        if (i2c_dev_device_data->client) {
+            i2c_unregister_device(i2c_dev_device_data->client);
+            i2c_dev_device_data->client = NULL;
+        }
+    }
+}
+
+module_init(wb_i2c_dev_device_init);
+module_exit(wb_i2c_dev_device_exit);
+MODULE_DESCRIPTION("I2C DEV Devices");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/modules/driver/wb_i2c_mux_pca954x_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/modules/driver/wb_i2c_mux_pca954x_device.c
new file mode 100644
index 000000000..f12a71013
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/modules/driver/wb_i2c_mux_pca954x_device.c
@@ -0,0 +1,296 @@
+#include <linux/module.h>
+#include <linux/io.h>
+#include <linux/i2c.h>
+#include <linux/device.h>
+#include <linux/delay.h>
+#include <linux/platform_device.h>
+
+#include <wb_i2c_mux_pca954x.h>
+
+static int g_wb_i2c_mux_pca954x_device_debug = 0;
+static int g_wb_i2c_mux_pca954x_device_error = 0;
+
+module_param(g_wb_i2c_mux_pca954x_device_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_i2c_mux_pca954x_device_error, int, S_IRUGO | S_IWUSR);
+
+#define WB_I2C_MUX_PCA954X_DEVICE_DEBUG_VERBOSE(fmt, args...) do {                                        \
+    if (g_wb_i2c_mux_pca954x_device_debug) { \
+        printk(KERN_INFO "[WB_I2C_MUX_PCA954X_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define WB_I2C_MUX_PCA954X_DEVICE_DEBUG_ERROR(fmt, args...) do {                                        \
+    if (g_wb_i2c_mux_pca954x_device_error) { \
+        printk(KERN_ERR "[WB_I2C_MUX_PCA954X_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data0 = {
+    .i2c_bus                        = 2,
+    .i2c_addr                       = 0x77,
+    .probe_disable                  = 1,
+    .select_chan_check              = 0,
+    .close_chan_force_reset         = 0,
+    .pca9548_base_nr                = 16,
+    .pca9548_reset_type             = PCA9548_RESET_FILE,
+    .rst_delay_b                    = 0,
+    .rst_delay                      = 1000,
+    .rst_delay_a                    = 1000,
+    .attr = {
+        .file_attr.dev_name         = "/dev/cpld5",
+        .file_attr.offset           = 0x60,
+        .file_attr.mask             = 0x02,
+        .file_attr.reset_on         = 0x00,
+        .file_attr.reset_off        = 0x02,
+    },
+};
+
+static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data1 = {
+    .i2c_bus                        = 4,
+    .i2c_addr                       = 0x77,
+    .probe_disable                  = 1,
+    .select_chan_check              = 0,
+    .close_chan_force_reset         = 0,
+    .pca9548_base_nr                = 24,
+    .pca9548_reset_type             = PCA9548_RESET_FILE,
+    .rst_delay_b                    = 0,
+    .rst_delay                      = 1000,
+    .rst_delay_a                    = 1000,
+    .attr = {
+        .file_attr.dev_name         = "/dev/cpld5",
+        .file_attr.offset           = 0x60,
+        .file_attr.mask             = 0x01,
+        .file_attr.reset_on         = 0x00,
+        .file_attr.reset_off        = 0x01,
+    },
+};
+
+static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data2 = {
+    .i2c_bus                        = 12,
+    .i2c_addr                       = 0x70,
+    .probe_disable                  = 1,
+    .select_chan_check              = 0,
+    .close_chan_force_reset         = 0,
+    .pca9548_base_nr                = 32,
+    .pca9548_reset_type             = PCA9548_RESET_FILE,
+    .rst_delay_b                    = 0,
+    .rst_delay                      = 1000,
+    .rst_delay_a                    = 1000,
+    .attr = {
+        .file_attr.dev_name         = "/dev/fpga0",
+        .file_attr.offset           = 0x20,
+        .file_attr.mask             = 0x01,
+        .file_attr.reset_on         = 0x00,
+        .file_attr.reset_off        = 0x01,
+    },
+};
+
+static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data3 = {
+    .i2c_bus                        = 12,
+    .i2c_addr                       = 0x71,
+    .probe_disable                  = 1,
+    .select_chan_check              = 0,
+    .close_chan_force_reset         = 0,
+    .pca9548_base_nr                = 40,
+    .pca9548_reset_type             = PCA9548_RESET_FILE,
+    .rst_delay_b                    = 0,
+    .rst_delay                      = 1000,
+    .rst_delay_a                    = 1000,
+    .attr = {
+        .file_attr.dev_name         = "/dev/fpga0",
+        .file_attr.offset           = 0x20,
+        .file_attr.mask             = 0x01,
+        .file_attr.reset_on         = 0x00,
+        .file_attr.reset_off        = 0x01,
+    },
+};
+
+static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data4 = {
+    .i2c_bus                        = 12,
+    .i2c_addr                       = 0x72,
+    .probe_disable                  = 1,
+    .select_chan_check              = 0,
+    .close_chan_force_reset         = 0,
+    .pca9548_base_nr                = 48,
+    .pca9548_reset_type             = PCA9548_RESET_FILE,
+    .rst_delay_b                    = 0,
+    .rst_delay                      = 1000,
+    .rst_delay_a                    = 1000,
+    .attr = {
+        .file_attr.dev_name         = "/dev/fpga0",
+        .file_attr.offset           = 0x20,
+        .file_attr.mask             = 0x01,
+        .file_attr.reset_on         = 0x00,
+        .file_attr.reset_off        = 0x01,
+    },
+};
+
+static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data5 = {
+    .i2c_bus                        = 12,
+    .i2c_addr                       = 0x73,
+    .probe_disable                  = 1,
+    .select_chan_check              = 0,
+    .close_chan_force_reset         = 0,
+    .pca9548_base_nr                = 56,
+    .pca9548_reset_type             = PCA9548_RESET_FILE,
+    .rst_delay_b                    = 0,
+    .rst_delay                      = 1000,
+    .rst_delay_a                    = 1000,
+    .attr = {
+        .file_attr.dev_name         = "/dev/fpga0",
+        .file_attr.offset           = 0x20,
+        .file_attr.mask             = 0x01,
+        .file_attr.reset_on         = 0x00,
+        .file_attr.reset_off        = 0x01,
+    },
+};
+
+static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data6 = {
+    .i2c_bus                        = 13,
+    .i2c_addr                       = 0x70,
+    .probe_disable                  = 1,
+    .select_chan_check              = 0,
+    .close_chan_force_reset         = 0,
+    .pca9548_base_nr                = 64,
+    .pca9548_reset_type             = PCA9548_RESET_FILE,
+    .rst_delay_b                    = 0,
+    .rst_delay                      = 1000,
+    .rst_delay_a                    = 1000,
+    .attr = {
+        .file_attr.dev_name         = "/dev/fpga0",
+        .file_attr.offset           = 0x20,
+        .file_attr.mask             = 0x01,
+        .file_attr.reset_on         = 0x00,
+        .file_attr.reset_off        = 0x01,
+    },
+};
+
+static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data7 = {
+    .i2c_bus                        = 13,
+    .i2c_addr                       = 0x71,
+    .probe_disable                  = 1,
+    .select_chan_check              = 0,
+    .close_chan_force_reset         = 0,
+    .pca9548_base_nr                = 72,
+    .pca9548_reset_type             = PCA9548_RESET_FILE,
+    .rst_delay_b                    = 0,
+    .rst_delay                      = 1000,
+    .rst_delay_a                    = 1000,
+    .attr = {
+        .file_attr.dev_name         = "/dev/fpga0",
+        .file_attr.offset           = 0x20,
+        .file_attr.mask             = 0x01,
+        .file_attr.reset_on         = 0x00,
+        .file_attr.reset_off        = 0x01,
+    },
+};
+
+static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data8 = {
+    .i2c_bus                        = 13,
+    .i2c_addr                       = 0x72,
+    .probe_disable                  = 1,
+    .select_chan_check              = 0,
+    .close_chan_force_reset         = 0,
+    .pca9548_base_nr                = 80,
+    .pca9548_reset_type             = PCA9548_RESET_FILE,
+    .rst_delay_b                    = 0,
+    .rst_delay                      = 1000,
+    .rst_delay_a                    = 1000,
+    .attr = {
+        .file_attr.dev_name         = "/dev/fpga0",
+        .file_attr.offset           = 0x20,
+        .file_attr.mask             = 0x01,
+        .file_attr.reset_on         = 0x00,
+        .file_attr.reset_off        = 0x01,
+    },
+};
+
+struct i2c_board_info i2c_mux_pca954x_device_info[] = {
+    {
+        .type = "wb_pca9548",
+        .platform_data = &i2c_mux_pca954x_device_data0,
+    },
+    {
+        .type = "wb_pca9548",
+        .platform_data = &i2c_mux_pca954x_device_data1,
+    },
+    {
+        .type = "wb_pca9548",
+        .platform_data = &i2c_mux_pca954x_device_data2,
+    },
+    {
+        .type = "wb_pca9548",
+        .platform_data = &i2c_mux_pca954x_device_data3,
+    },
+    {
+        .type = "wb_pca9548",
+        .platform_data = &i2c_mux_pca954x_device_data4,
+    },
+    {
+        .type = "wb_pca9548",
+        .platform_data = &i2c_mux_pca954x_device_data5,
+    },
+    {
+        .type = "wb_pca9548",
+        .platform_data = &i2c_mux_pca954x_device_data6,
+    },
+    {
+        .type = "wb_pca9548",
+        .platform_data = &i2c_mux_pca954x_device_data7,
+    },
+    {
+        .type = "wb_pca9548",
+        .platform_data = &i2c_mux_pca954x_device_data8,
+    },
+};
+
+static int __init wb_i2c_mux_pca954x_device_init(void)
+{
+    int i;
+    struct i2c_adapter *adap;
+    struct i2c_client *client;
+    i2c_mux_pca954x_device_t *i2c_mux_pca954x_device_data;
+
+    WB_I2C_MUX_PCA954X_DEVICE_DEBUG_VERBOSE("enter!\n");
+    for (i = 0; i < ARRAY_SIZE(i2c_mux_pca954x_device_info); i++) {
+        i2c_mux_pca954x_device_data = i2c_mux_pca954x_device_info[i].platform_data;
+        i2c_mux_pca954x_device_info[i].addr = i2c_mux_pca954x_device_data->i2c_addr;
+        adap = i2c_get_adapter(i2c_mux_pca954x_device_data->i2c_bus);
+        if (adap == NULL) {
+            i2c_mux_pca954x_device_data->client = NULL;
+            printk(KERN_ERR "get i2c bus %d adapter fail.\n", i2c_mux_pca954x_device_data->i2c_bus);
+            continue;
+        }
+        client = i2c_new_client_device(adap, &i2c_mux_pca954x_device_info[i]);
+        if (!client) {
+            i2c_mux_pca954x_device_data->client = NULL;
+            printk(KERN_ERR "Failed to register pca954x device %d at bus %d!\n",
+                i2c_mux_pca954x_device_data->i2c_addr, i2c_mux_pca954x_device_data->i2c_bus);
+        } else {
+            i2c_mux_pca954x_device_data->client = client;
+        }
+        i2c_put_adapter(adap);
+    }
+    return 0;
+}
+
+static void __exit wb_i2c_mux_pca954x_device_exit(void)
+{
+    int i;
+    i2c_mux_pca954x_device_t *i2c_mux_pca954x_device_data;
+
+    WB_I2C_MUX_PCA954X_DEVICE_DEBUG_VERBOSE("enter!\n");
+    for (i = ARRAY_SIZE(i2c_mux_pca954x_device_info) - 1; i >= 0; i--) {
+        i2c_mux_pca954x_device_data = i2c_mux_pca954x_device_info[i].platform_data;
+        if (i2c_mux_pca954x_device_data->client) {
+            i2c_unregister_device(i2c_mux_pca954x_device_data->client);
+            i2c_mux_pca954x_device_data->client = NULL;
+        }
+    }
+}
+
+module_init(wb_i2c_mux_pca954x_device_init);
+module_exit(wb_i2c_mux_pca954x_device_exit);
+MODULE_DESCRIPTION("I2C MUX PCA954X Devices");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/modules/driver/wb_i2c_ocores_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/modules/driver/wb_i2c_ocores_device.c
new file mode 100644
index 000000000..ff7ba9d26
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/modules/driver/wb_i2c_ocores_device.c
@@ -0,0 +1,423 @@
+#include <linux/module.h>
+#include <linux/io.h>
+#include <linux/device.h>
+#include <linux/delay.h>
+#include <linux/platform_device.h>
+
+#include <wb_i2c_ocores.h>
+
+static int g_wb_i2c_ocores_device_debug = 0;
+static int g_wb_i2c_ocores_device_error = 0;
+
+module_param(g_wb_i2c_ocores_device_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_i2c_ocores_device_error, int, S_IRUGO | S_IWUSR);
+
+#define WB_I2C_OCORE_DEVICE_DEBUG_VERBOSE(fmt, args...) do {                                        \
+    if (g_wb_i2c_ocores_device_debug) { \
+        printk(KERN_INFO "[WB_I2C_OCORE_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define WB_I2C_OCORE_DEVICE_DEBUG_ERROR(fmt, args...) do {                                        \
+    if (g_wb_i2c_ocores_device_error) { \
+        printk(KERN_ERR "[WB_I2C_OCORE_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+static i2c_ocores_device_t i2c_ocores_device_data0 = {
+    .adap_nr = 2,
+    .big_endian = 0,
+    .dev_name = "/dev/fpga0",
+    .reg_access_mode = 3,
+    .dev_base = 0x0800,
+    .reg_shift = 2,
+    .reg_io_width = 4,
+    .ip_clock_khz = 125000,
+    .bus_clock_khz = 100,
+    .irq_offset = 0,
+    .pci_domain = 0,
+    .pci_bus = 8,
+    .pci_slot = 0,
+    .pci_fn = 0,
+};
+
+static i2c_ocores_device_t i2c_ocores_device_data1 = {
+    .adap_nr = 3,
+    .big_endian = 0,
+    .dev_name = "/dev/fpga0",
+    .reg_access_mode = 3,
+    .dev_base = 0x0820,
+    .reg_shift = 2,
+    .reg_io_width = 4,
+    .ip_clock_khz = 125000,
+    .bus_clock_khz = 100,
+    .irq_offset = 1,
+    .pci_domain = 0,
+    .pci_bus = 8,
+    .pci_slot = 0,
+    .pci_fn = 0,
+};
+
+static i2c_ocores_device_t i2c_ocores_device_data2 = {
+    .adap_nr = 4,
+    .big_endian = 0,
+    .dev_name = "/dev/fpga0",
+    .reg_access_mode = 3,
+    .dev_base = 0x0840,
+    .reg_shift = 2,
+    .reg_io_width = 4,
+    .ip_clock_khz = 125000,
+    .bus_clock_khz = 100,
+    .irq_offset = 2,
+    .pci_domain = 0,
+    .pci_bus = 8,
+    .pci_slot = 0,
+    .pci_fn = 0,
+};
+
+static i2c_ocores_device_t i2c_ocores_device_data3 = {
+    .adap_nr = 5,
+    .big_endian = 0,
+    .dev_name = "/dev/fpga0",
+    .reg_access_mode = 3,
+    .dev_base = 0x0860,
+    .reg_shift = 2,
+    .reg_io_width = 4,
+    .ip_clock_khz = 125000,
+    .bus_clock_khz = 100,
+    .irq_offset = 3,
+    .pci_domain = 0,
+    .pci_bus = 8,
+    .pci_slot = 0,
+    .pci_fn = 0,
+};
+
+static i2c_ocores_device_t i2c_ocores_device_data4 = {
+    .adap_nr = 6,
+    .big_endian = 0,
+    .dev_name = "/dev/fpga0",
+    .reg_access_mode = 3,
+    .dev_base = 0x0880,
+    .reg_shift = 2,
+    .reg_io_width = 4,
+    .ip_clock_khz = 125000,
+    .bus_clock_khz = 100,
+    .irq_offset = 4,
+    .pci_domain = 0,
+    .pci_bus = 8,
+    .pci_slot = 0,
+    .pci_fn = 0,
+};
+
+static i2c_ocores_device_t i2c_ocores_device_data5 = {
+    .adap_nr = 7,
+    .big_endian = 0,
+    .dev_name = "/dev/fpga0",
+    .reg_access_mode = 3,
+    .dev_base = 0x08a0,
+    .reg_shift = 2,
+    .reg_io_width = 4,
+    .ip_clock_khz = 125000,
+    .bus_clock_khz = 100,
+    .irq_offset = 5,
+    .pci_domain = 0,
+    .pci_bus = 8,
+    .pci_slot = 0,
+    .pci_fn = 0,
+};
+
+static i2c_ocores_device_t i2c_ocores_device_data6 = {
+    .adap_nr = 8,
+    .big_endian = 0,
+    .dev_name = "/dev/fpga0",
+    .reg_access_mode = 3,
+    .dev_base = 0x08c0,
+    .reg_shift = 2,
+    .reg_io_width = 4,
+    .ip_clock_khz = 125000,
+    .bus_clock_khz = 100,
+    .irq_offset = 6,
+    .pci_domain = 0,
+    .pci_bus = 8,
+    .pci_slot = 0,
+    .pci_fn = 0,
+};
+
+static i2c_ocores_device_t i2c_ocores_device_data7 = {
+    .adap_nr = 9,
+    .big_endian = 0,
+    .dev_name = "/dev/fpga0",
+    .reg_access_mode = 3,
+    .dev_base = 0x08e0,
+    .reg_shift = 2,
+    .reg_io_width = 4,
+    .ip_clock_khz = 125000,
+    .bus_clock_khz = 100,
+    .irq_offset = 7,
+    .pci_domain = 0,
+    .pci_bus = 8,
+    .pci_slot = 0,
+    .pci_fn = 0,
+};
+
+static i2c_ocores_device_t i2c_ocores_device_data8 = {
+    .adap_nr = 10,
+    .big_endian = 0,
+    .dev_name = "/dev/fpga0",
+    .reg_access_mode = 3,
+    .dev_base = 0x0900,
+    .reg_shift = 2,
+    .reg_io_width = 4,
+    .ip_clock_khz = 125000,
+    .bus_clock_khz = 100,
+    .irq_offset = 8,
+    .pci_domain = 0,
+    .pci_bus = 8,
+    .pci_slot = 0,
+    .pci_fn = 0,
+};
+
+static i2c_ocores_device_t i2c_ocores_device_data9 = {
+    .adap_nr = 11,
+    .big_endian = 0,
+    .dev_name = "/dev/fpga0",
+    .reg_access_mode = 3,
+    .dev_base = 0x0920,
+    .reg_shift = 2,
+    .reg_io_width = 4,
+    .ip_clock_khz = 125000,
+    .bus_clock_khz = 100,
+    .irq_offset = 9,
+    .pci_domain = 0,
+    .pci_bus = 8,
+    .pci_slot = 0,
+    .pci_fn = 0,
+};
+
+static i2c_ocores_device_t i2c_ocores_device_data10 = {
+    .adap_nr = 12,
+    .big_endian = 0,
+    .dev_name = "/dev/fpga0",
+    .reg_access_mode = 3,
+    .dev_base = 0x0940,
+    .reg_shift = 2,
+    .reg_io_width = 4,
+    .ip_clock_khz = 125000,
+    .bus_clock_khz = 100,
+    .irq_offset = 10,
+    .pci_domain = 0,
+    .pci_bus = 8,
+    .pci_slot = 0,
+    .pci_fn = 0,
+};
+
+static i2c_ocores_device_t i2c_ocores_device_data11 = {
+    .adap_nr = 13,
+    .big_endian = 0,
+    .dev_name = "/dev/fpga0",
+    .reg_access_mode = 3,
+    .dev_base = 0x0960,
+    .reg_shift = 2,
+    .reg_io_width = 4,
+    .ip_clock_khz = 125000,
+    .bus_clock_khz = 100,
+    .irq_offset = 11,
+    .pci_domain = 0,
+    .pci_bus = 8,
+    .pci_slot = 0,
+    .pci_fn = 0,
+};
+
+static i2c_ocores_device_t i2c_ocores_device_data12 = {
+    .adap_nr = 14,
+    .big_endian = 0,
+    .dev_name = "/dev/fpga0",
+    .reg_access_mode = 3,
+    .dev_base = 0x0980,
+    .reg_shift = 2,
+    .reg_io_width = 4,
+    .ip_clock_khz = 125000,
+    .bus_clock_khz = 100,
+    .irq_offset = 12,
+    .pci_domain = 0,
+    .pci_bus = 8,
+    .pci_slot = 0,
+    .pci_fn = 0,
+};
+
+static i2c_ocores_device_t i2c_ocores_device_data13 = {
+    .adap_nr = 15,
+    .big_endian = 0,
+    .dev_name = "/dev/fpga0",
+    .reg_access_mode = 3,
+    .dev_base = 0x09a0,
+    .reg_shift = 2,
+    .reg_io_width = 4,
+    .ip_clock_khz = 125000,
+    .bus_clock_khz = 100,
+    .irq_offset = 13,
+    .pci_domain = 0,
+    .pci_bus = 8,
+    .pci_slot = 0,
+    .pci_fn = 0,
+};
+
+static void wb_i2c_ocores_device_release(struct device *dev)
+{
+    return;
+}
+
+static struct platform_device i2c_ocores_device[] = {
+    {
+        .name   = "wb-ocores-i2c",
+        .id = 1,
+        .dev    = {
+            .platform_data  = &i2c_ocores_device_data0,
+            .release = wb_i2c_ocores_device_release,
+        },
+    },
+    {
+        .name   = "wb-ocores-i2c",
+        .id = 2,
+        .dev    = {
+            .platform_data  = &i2c_ocores_device_data1,
+            .release = wb_i2c_ocores_device_release,
+        },
+    },
+    {
+        .name   = "wb-ocores-i2c",
+        .id = 3,
+        .dev    = {
+            .platform_data  = &i2c_ocores_device_data2,
+            .release = wb_i2c_ocores_device_release,
+        },
+    },
+    {
+        .name   = "wb-ocores-i2c",
+        .id = 4,
+        .dev    = {
+            .platform_data  = &i2c_ocores_device_data3,
+            .release = wb_i2c_ocores_device_release,
+        },
+    },
+    {
+        .name   = "wb-ocores-i2c",
+        .id = 5,
+        .dev    = {
+            .platform_data  = &i2c_ocores_device_data4,
+            .release = wb_i2c_ocores_device_release,
+        },
+    },
+    {
+        .name   = "wb-ocores-i2c",
+        .id = 6,
+        .dev    = {
+            .platform_data  = &i2c_ocores_device_data5,
+            .release = wb_i2c_ocores_device_release,
+        },
+    },
+    {
+        .name   = "wb-ocores-i2c",
+        .id = 7,
+        .dev    = {
+            .platform_data  = &i2c_ocores_device_data6,
+            .release = wb_i2c_ocores_device_release,
+        },
+    },
+    {
+        .name   = "wb-ocores-i2c",
+        .id = 8,
+        .dev    = {
+            .platform_data  = &i2c_ocores_device_data7,
+            .release = wb_i2c_ocores_device_release,
+        },
+    },
+    {
+        .name   = "wb-ocores-i2c",
+        .id = 9,
+        .dev    = {
+            .platform_data  = &i2c_ocores_device_data8,
+            .release = wb_i2c_ocores_device_release,
+        },
+    },
+    {
+        .name   = "wb-ocores-i2c",
+        .id = 10,
+        .dev    = {
+            .platform_data  = &i2c_ocores_device_data9,
+            .release = wb_i2c_ocores_device_release,
+        },
+    },
+    {
+        .name   = "wb-ocores-i2c",
+        .id = 11,
+        .dev    = {
+            .platform_data  = &i2c_ocores_device_data10,
+            .release = wb_i2c_ocores_device_release,
+        },
+    },
+    {
+        .name   = "wb-ocores-i2c",
+        .id = 12,
+        .dev    = {
+            .platform_data  = &i2c_ocores_device_data11,
+            .release = wb_i2c_ocores_device_release,
+        },
+    },
+    {
+        .name   = "wb-ocores-i2c",
+        .id = 13,
+        .dev    = {
+            .platform_data  = &i2c_ocores_device_data12,
+            .release = wb_i2c_ocores_device_release,
+        },
+    },
+    {
+        .name   = "wb-ocores-i2c",
+        .id = 14,
+        .dev    = {
+            .platform_data  = &i2c_ocores_device_data13,
+            .release = wb_i2c_ocores_device_release,
+        },
+    },
+};
+
+static int __init wb_i2c_ocores_device_init(void)
+{
+    int i;
+    int ret = 0;
+    i2c_ocores_device_t *i2c_ocores_device_data;
+
+    WB_I2C_OCORE_DEVICE_DEBUG_VERBOSE("enter!\n");
+    for (i = 0; i < ARRAY_SIZE(i2c_ocores_device); i++) {
+        i2c_ocores_device_data = i2c_ocores_device[i].dev.platform_data;
+        ret = platform_device_register(&i2c_ocores_device[i]);
+        if (ret < 0) {
+            i2c_ocores_device_data->device_flag = -1; /* device register failed, set flag -1 */
+            printk(KERN_ERR "wb-ocores-i2c.%d register failed!\n", i + 1);
+        } else {
+            i2c_ocores_device_data->device_flag = 0; /* device register suucess, set flag 0 */
+        }
+    }
+    return 0;
+}
+
+static void __exit wb_i2c_ocores_device_exit(void)
+{
+    int i;
+    i2c_ocores_device_t *i2c_ocores_device_data;
+
+    WB_I2C_OCORE_DEVICE_DEBUG_VERBOSE("enter!\n");
+    for (i = ARRAY_SIZE(i2c_ocores_device) - 1; i >= 0; i--) {
+        i2c_ocores_device_data = i2c_ocores_device[i].dev.platform_data;
+        if (i2c_ocores_device_data->device_flag == 0) { /* device register success, need unregister */
+            platform_device_unregister(&i2c_ocores_device[i]);
+        }
+    }
+}
+
+module_init(wb_i2c_ocores_device_init);
+module_exit(wb_i2c_ocores_device_exit);
+MODULE_DESCRIPTION("I2C OCORES Devices");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/modules/driver/wb_io_dev_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/modules/driver/wb_io_dev_device.c
new file mode 100644
index 000000000..cc84938ff
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/modules/driver/wb_io_dev_device.c
@@ -0,0 +1,103 @@
+#include <linux/module.h>
+#include <linux/io.h>
+#include <linux/device.h>
+#include <linux/delay.h>
+#include <linux/platform_device.h>
+
+#include <wb_io_dev.h>
+
+static int g_wb_io_dev_device_debug = 0;
+static int g_wb_io_dev_device_error = 0;
+
+module_param(g_wb_io_dev_device_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_io_dev_device_error, int, S_IRUGO | S_IWUSR);
+
+#define WB_IO_DEV_DEVICE_DEBUG_VERBOSE(fmt, args...) do {                                        \
+    if (g_wb_io_dev_device_debug) { \
+        printk(KERN_INFO "[WB_IO_DEV_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define WB_IO_DEV_DEVICE_DEBUG_ERROR(fmt, args...) do {                                        \
+    if (g_wb_io_dev_device_error) { \
+        printk(KERN_ERR "[WB_IO_DEV_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+static io_dev_device_t io_dev_device_data0 = {
+    .io_dev_name = "cpld0",
+    .io_base = 0x700,
+    .io_len = 0x100,
+    .indirect_addr = 0,
+};
+
+static io_dev_device_t io_dev_device_data1 = {
+    .io_dev_name = "cpld1",
+    .io_base = 0x900,
+    .io_len = 0x100,
+    .indirect_addr = 0,
+};
+
+static void wb_io_dev_device_release(struct device *dev)
+{
+    return;
+}
+
+static struct platform_device io_dev_device[] = {
+    {
+        .name   = "wb-io-dev",
+        .id = 1,
+        .dev    = {
+            .platform_data  = &io_dev_device_data0,
+            .release = wb_io_dev_device_release,
+        },
+    },
+    {
+        .name   = "wb-io-dev",
+        .id = 2,
+        .dev    = {
+            .platform_data  = &io_dev_device_data1,
+            .release = wb_io_dev_device_release,
+        },
+    },
+};
+
+static int __init wb_io_dev_device_init(void)
+{
+    int i;
+    int ret = 0;
+    io_dev_device_t *io_dev_device_data;
+
+    WB_IO_DEV_DEVICE_DEBUG_VERBOSE("enter!\n");
+    for (i = 0; i < ARRAY_SIZE(io_dev_device); i++) {
+        io_dev_device_data = io_dev_device[i].dev.platform_data;
+        ret = platform_device_register(&io_dev_device[i]);
+        if (ret < 0) {
+            io_dev_device_data->device_flag = -1; /* device register failed, set flag -1 */
+            printk(KERN_ERR "wb-io-dev.%d register failed!\n", i + 1);
+        } else {
+            io_dev_device_data->device_flag = 0; /* device register suucess, set flag 0 */
+        }
+    }
+    return 0;
+}
+
+static void __exit wb_io_dev_device_exit(void)
+{
+    int i;
+    io_dev_device_t *io_dev_device_data;
+
+    WB_IO_DEV_DEVICE_DEBUG_VERBOSE("enter!\n");
+    for (i = ARRAY_SIZE(io_dev_device) - 1; i >= 0; i--) {
+        io_dev_device_data = io_dev_device[i].dev.platform_data;
+        if (io_dev_device_data->device_flag == 0) { /* device register success, need unregister */
+            platform_device_unregister(&io_dev_device[i]);
+        }
+    }
+}
+
+module_init(wb_io_dev_device_init);
+module_exit(wb_io_dev_device_exit);
+MODULE_DESCRIPTION("IO DEV Devices");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/modules/driver/wb_lpc_drv_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/modules/driver/wb_lpc_drv_device.c
new file mode 100644
index 000000000..9b6b61a51
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/modules/driver/wb_lpc_drv_device.c
@@ -0,0 +1,130 @@
+#include <linux/module.h>
+#include <linux/io.h>
+#include <linux/device.h>
+#include <linux/delay.h>
+#include <linux/platform_device.h>
+
+#include <wb_lpc_drv.h>
+
+static int g_wb_lpc_drv_device_debug = 0;
+static int g_wb_lpc_drv_device_error = 0;
+
+module_param(g_wb_lpc_drv_device_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_lpc_drv_device_error, int, S_IRUGO | S_IWUSR);
+
+#define WB_LPC_DRV_DEVICE_DEBUG_VERBOSE(fmt, args...) do {                                        \
+    if (g_wb_lpc_drv_device_debug) { \
+        printk(KERN_INFO "[WB_LPC_DRV_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define WB_LPC_DRV_DEVICE_DEBUG_ERROR(fmt, args...) do {                                        \
+    if (g_wb_lpc_drv_device_error) { \
+        printk(KERN_ERR "[WB_LPC_DRV_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+static lpc_drv_device_t lpc_drv_device_data_0 = {
+    .lpc_io_name = "wb_lpc",
+    .pci_domain = 0x0000,
+    .pci_bus = 0x00,
+    .pci_slot = 0x1f,
+    .pci_fn = 0,
+    .lpc_io_base = 0x700,
+    .lpc_io_size = 0x100,
+    .lpc_gen_dec = 0x84,
+};
+
+static lpc_drv_device_t lpc_drv_device_data_1 = {
+    .lpc_io_name = "wb_lpc",
+    .pci_domain = 0x0000,
+    .pci_bus = 0x00,
+    .pci_slot = 0x1f,
+    .pci_fn = 0,
+    .lpc_io_base = 0x900,
+    .lpc_io_size = 0x100,
+    .lpc_gen_dec = 0x88,
+};
+
+static lpc_drv_device_t lpc_drv_device_data_2 = {
+    .lpc_io_name = "wb_lpc",
+    .pci_domain = 0x0000,
+    .pci_bus = 0x00,
+    .pci_slot = 0x1f,
+    .pci_fn = 0,
+    .lpc_io_base = 0xb00,
+    .lpc_io_size = 0x100,
+    .lpc_gen_dec = 0x90,
+};
+
+static void wb_lpc_drv_device_release(struct device *dev)
+{
+    return;
+}
+
+static struct platform_device lpc_drv_device[] = {
+    {
+        .name   = "wb-lpc",
+        .id = 1,
+        .dev    = {
+            .platform_data  = &lpc_drv_device_data_0,
+            .release = wb_lpc_drv_device_release,
+        },
+    },
+    {
+        .name   = "wb-lpc",
+        .id = 2,
+        .dev    = {
+            .platform_data  = &lpc_drv_device_data_1,
+            .release = wb_lpc_drv_device_release,
+        },
+    },
+    {
+        .name   = "wb-lpc",
+        .id = 3,
+        .dev    = {
+            .platform_data  = &lpc_drv_device_data_2,
+            .release = wb_lpc_drv_device_release,
+        },
+    },
+};
+
+static int __init wb_lpc_drv_device_init(void)
+{
+    int i;
+    int ret = 0;
+    lpc_drv_device_t *lpc_drv_device_data;
+
+    WB_LPC_DRV_DEVICE_DEBUG_VERBOSE("enter!\n");
+    for (i = 0; i < ARRAY_SIZE(lpc_drv_device); i++) {
+        lpc_drv_device_data = lpc_drv_device[i].dev.platform_data;
+        ret = platform_device_register(&lpc_drv_device[i]);
+        if (ret < 0) {
+            lpc_drv_device_data->device_flag = -1; /* device register failed, set flag -1 */
+            printk(KERN_ERR "wb-lpc.%d register failed!\n", i + 1);
+        } else {
+            lpc_drv_device_data->device_flag = 0; /* device register suucess, set flag 0 */
+        }
+    }
+    return 0;
+}
+
+static void __exit wb_lpc_drv_device_exit(void)
+{
+    int i;
+    lpc_drv_device_t *lpc_drv_device_data;
+
+    WB_LPC_DRV_DEVICE_DEBUG_VERBOSE("enter!\n");
+    for (i = ARRAY_SIZE(lpc_drv_device) - 1; i >= 0; i--) {
+        lpc_drv_device_data = lpc_drv_device[i].dev.platform_data;
+        if (lpc_drv_device_data->device_flag == 0) { /* device register success, need unregister */
+            platform_device_unregister(&lpc_drv_device[i]);
+        }
+    }
+}
+
+module_init(wb_lpc_drv_device_init);
+module_exit(wb_lpc_drv_device_exit);
+MODULE_DESCRIPTION("LPC DRV Devices");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/modules/driver/wb_pcie_dev_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/modules/driver/wb_pcie_dev_device.c
new file mode 100644
index 000000000..f79b29770
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/modules/driver/wb_pcie_dev_device.c
@@ -0,0 +1,93 @@
+#include <linux/module.h>
+#include <linux/io.h>
+#include <linux/device.h>
+#include <linux/delay.h>
+#include <linux/platform_device.h>
+
+#include <wb_pcie_dev.h>
+
+static int g_wb_pcie_dev_device_debug = 0;
+static int g_wb_pcie_dev_device_error = 0;
+
+module_param(g_wb_pcie_dev_device_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_pcie_dev_device_error, int, S_IRUGO | S_IWUSR);
+
+#define WB_PCIE_DEV_DEVICE_DEBUG_VERBOSE(fmt, args...) do {                                        \
+    if (g_wb_pcie_dev_device_debug) { \
+        printk(KERN_INFO "[WB_PCIE_DEV_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define WB_PCIE_DEV_DEVICE_DEBUG_ERROR(fmt, args...) do {                                        \
+    if (g_wb_pcie_dev_device_error) { \
+        printk(KERN_ERR "[WB_PCIE_DEV_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+static pci_dev_device_t pcie_dev_device_data0 = {
+    .pci_dev_name = "fpga0",
+    .pci_domain = 0x0000,
+    .pci_bus = 0x08,
+    .pci_slot = 0x00,
+    .pci_fn = 0,
+    .pci_bar = 0,
+    .bus_width = 4,
+    .upg_ctrl_base = 0xa00,
+    .upg_flash_base = 0x1a0000,
+};
+
+static void wb_pcie_dev_device_release(struct device *dev)
+{
+    return;
+}
+
+static struct platform_device pcie_dev_device[] = {
+    {
+        .name   = "wb-pci-dev",
+        .id = 1,
+        .dev    = {
+            .platform_data  = &pcie_dev_device_data0,
+            .release = wb_pcie_dev_device_release,
+        },
+    },
+};
+
+static int __init wb_pcie_dev_device_init(void)
+{
+    int i;
+    int ret = 0;
+    pci_dev_device_t *pcie_dev_device_data;
+
+    WB_PCIE_DEV_DEVICE_DEBUG_VERBOSE("enter!\n");
+    for (i = 0; i < ARRAY_SIZE(pcie_dev_device); i++) {
+        pcie_dev_device_data = pcie_dev_device[i].dev.platform_data;
+        ret = platform_device_register(&pcie_dev_device[i]);
+        if (ret < 0) {
+            pcie_dev_device_data->device_flag = -1; /* device register failed, set flag -1 */
+            printk(KERN_ERR "wb-pci-dev.%d register failed!\n", i + 1);
+        } else {
+            pcie_dev_device_data->device_flag = 0; /* device register suucess, set flag 0 */
+        }
+    }
+    return 0;
+}
+
+static void __exit wb_pcie_dev_device_exit(void)
+{
+    int i;
+    pci_dev_device_t *pcie_dev_device_data;
+
+    WB_PCIE_DEV_DEVICE_DEBUG_VERBOSE("enter!\n");
+    for (i = ARRAY_SIZE(pcie_dev_device) - 1; i >= 0; i--) {
+        pcie_dev_device_data = pcie_dev_device[i].dev.platform_data;
+        if (pcie_dev_device_data->device_flag == 0) { /* device register success, need unregister */
+            platform_device_unregister(&pcie_dev_device[i]);
+        }
+    }
+}
+
+module_init(wb_pcie_dev_device_init);
+module_exit(wb_pcie_dev_device_exit);
+MODULE_DESCRIPTION("PCIE DEV Devices");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/plat_sysfs_cfg/WB_PLAT_CPLD.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/plat_sysfs_cfg/WB_PLAT_CPLD.cfg
new file mode 100644
index 000000000..98d1da175
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/plat_sysfs_cfg/WB_PLAT_CPLD.cfg
@@ -0,0 +1,41 @@
+# configuration item: I2C address of CPLD
+# format: cpld_i2c_dev.bus_[cpld_slot]_[cpld_id] cpld_i2c_dev.addr_[cpld_slot]_[cpld_id]
+# cpld_slot: Main card: 0, linear card: start from 1
+# cpld_id: start from 0
+# bus: I2C bus number of CPLD
+# addr: I2C address of CPLD
+cpld_i2c_dev.bus_0_2=2
+cpld_i2c_dev.addr_0_2=0x0d
+cpld_i2c_dev.bus_0_3=8
+cpld_i2c_dev.addr_0_3=0x30
+cpld_i2c_dev.bus_0_4=8
+cpld_i2c_dev.addr_0_4=0x31
+cpld_i2c_dev.bus_0_5=6
+cpld_i2c_dev.addr_0_5=0x0d
+
+
+# configuration item: LPC address of CPLD
+# format: cpld_lpc_addr_[cpld_slot]_[cpld_id]
+# cpld_slot: Main card: 0, linear card: start from 1
+# cpld_id: start from 0
+cpld_lpc_dev_0_0=0x700
+cpld_lpc_dev_0_1=0x900
+
+
+# configuration item: CPLD access method, lpc or i2c
+# format: mode_cpld_[cpld_slot][cpld_slot]=lpc/i2c
+# cpld_slot: Main card: 0, linear card: start from 1
+# cpld_id: start from 0
+mode_cpld_0_0=lpc
+mode_cpld_0_1=lpc
+mode_cpld_0_2=i2c
+mode_cpld_0_3=i2c
+mode_cpld_0_4=i2c
+mode_cpld_0_5=i2c
+
+
+# configuration item: the number of CPLD
+# format: dev_num_[main_dev]_[minor_dev]
+# main_dev: CPLD main_dev is 4
+# minor_dev: CPLD minor_dev not exist
+dev_num_4_0=6
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/plat_sysfs_cfg/WB_PLAT_FAN.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/plat_sysfs_cfg/WB_PLAT_FAN.cfg
new file mode 100644
index 000000000..2350b74eb
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/plat_sysfs_cfg/WB_PLAT_FAN.cfg
@@ -0,0 +1,304 @@
+# configuration item: the number of fans
+# format: dev_num_[main_dev]_[minor_dev]
+# main_dev: fan main_dev is 1
+# minor_dev: fan minor_dev not exist(0)
+dev_num_1_0=4
+
+
+# configuration item: the number of rotors
+# format: dev_num_[main_dev]_[minor_dev]
+# main_dev: rotor main_dev is 1
+# minor_dev: rotor minor_dev is 5
+dev_num_1_5=2
+
+
+# configuration item: fan presence status
+# format: dev_present_status_[main_dev_id][fan_index]
+# main_dev_id: fan main_dev_id is 1
+# fan_index: start from 1
+dev_present_status.mode_1_1=config
+dev_present_status.src_1_1=cpld
+dev_present_status.frmt_1_1=bit
+dev_present_status.pola_1_1=negative
+dev_present_status.addr_1_1=0x00020030
+dev_present_status.len_1_1=1
+dev_present_status.bit_offset_1_1=0
+
+dev_present_status.mode_1_2=config
+dev_present_status.src_1_2=cpld
+dev_present_status.frmt_1_2=bit
+dev_present_status.pola_1_2=negative
+dev_present_status.addr_1_2=0x00020030
+dev_present_status.len_1_2=1
+dev_present_status.bit_offset_1_2=1
+
+dev_present_status.mode_1_3=config
+dev_present_status.src_1_3=cpld
+dev_present_status.frmt_1_3=bit
+dev_present_status.pola_1_3=negative
+dev_present_status.addr_1_3=0x00020030
+dev_present_status.len_1_3=1
+dev_present_status.bit_offset_1_3=2
+
+dev_present_status.mode_1_4=config
+dev_present_status.src_1_4=cpld
+dev_present_status.frmt_1_4=bit
+dev_present_status.pola_1_4=negative
+dev_present_status.addr_1_4=0x00020030
+dev_present_status.len_1_4=1
+dev_present_status.bit_offset_1_4=3
+
+
+# configuration item: fan rotor status
+# format: fan_roll_status_[fan_id]_[motor_id]
+# fan_id: start from 1
+# motor_id: start from 0
+fan_roll_status.mode_1_0=config
+fan_roll_status.int_cons_1_0=
+fan_roll_status.src_1_0=cpld
+fan_roll_status.frmt_1_0=bit
+fan_roll_status.pola_1_0=positive
+fan_roll_status.fpath_1_0=
+fan_roll_status.addr_1_0=0x00020031
+fan_roll_status.len_1_0=1
+fan_roll_status.bit_offset_1_0=0
+
+fan_roll_status.mode_1_1=config
+fan_roll_status.int_cons_1_1=
+fan_roll_status.src_1_1=cpld
+fan_roll_status.frmt_1_1=bit
+fan_roll_status.pola_1_1=positive
+fan_roll_status.fpath_1_1=
+fan_roll_status.addr_1_1=0x00020034
+fan_roll_status.len_1_1=1
+fan_roll_status.bit_offset_1_1=0
+
+fan_roll_status.mode_2_0=config
+fan_roll_status.int_cons_2_0=
+fan_roll_status.src_2_0=cpld
+fan_roll_status.frmt_2_0=bit
+fan_roll_status.pola_2_0=positive
+fan_roll_status.fpath_2_0=
+fan_roll_status.addr_2_0=0x00020031
+fan_roll_status.len_2_0=1
+fan_roll_status.bit_offset_2_0=1
+
+fan_roll_status.mode_2_1=config
+fan_roll_status.int_cons_2_1=
+fan_roll_status.src_2_1=cpld
+fan_roll_status.frmt_2_1=bit
+fan_roll_status.pola_2_1=positive
+fan_roll_status.fpath_2_1=
+fan_roll_status.addr_2_1=0x00020034
+fan_roll_status.len_2_1=1
+fan_roll_status.bit_offset_2_1=1
+
+fan_roll_status.mode_3_0=config
+fan_roll_status.int_cons_3_0=
+fan_roll_status.src_3_0=cpld
+fan_roll_status.frmt_3_0=bit
+fan_roll_status.pola_3_0=positive
+fan_roll_status.fpath_3_0=
+fan_roll_status.addr_3_0=0x00020031
+fan_roll_status.len_3_0=1
+fan_roll_status.bit_offset_3_0=2
+
+fan_roll_status.mode_3_1=config
+fan_roll_status.int_cons_3_1=
+fan_roll_status.src_3_1=cpld
+fan_roll_status.frmt_3_1=bit
+fan_roll_status.pola_3_1=positive
+fan_roll_status.fpath_3_1=
+fan_roll_status.addr_3_1=0x00020034
+fan_roll_status.len_3_1=1
+fan_roll_status.bit_offset_3_1=2
+
+fan_roll_status.mode_4_0=config
+fan_roll_status.int_cons_4_0=
+fan_roll_status.src_4_0=cpld
+fan_roll_status.frmt_4_0=bit
+fan_roll_status.pola_4_0=positive
+fan_roll_status.fpath_4_0=
+fan_roll_status.addr_4_0=0x00020031
+fan_roll_status.len_4_0=1
+fan_roll_status.bit_offset_4_0=3
+
+fan_roll_status.mode_4_1=config
+fan_roll_status.int_cons_4_1=
+fan_roll_status.src_4_1=cpld
+fan_roll_status.frmt_4_1=bit
+fan_roll_status.pola_4_1=positive
+fan_roll_status.fpath_4_1=
+fan_roll_status.addr_4_1=0x00020034
+fan_roll_status.len_4_1=1
+fan_roll_status.bit_offset_4_1=3
+
+
+# configuration item: fan speed
+# format: fan_speed_[fan_id]_[motor_id]
+# fan_id: start from 1
+# motor_id: start from 0
+fan_speed.mode_1_0=config
+fan_speed.int_cons_1_0=
+fan_speed.src_1_0=cpld
+fan_speed.frmt_1_0=num_bytes
+fan_speed.pola_1_0=negative
+fan_speed.fpath_1_0=
+fan_speed.addr_1_0=0x0002001b
+fan_speed.len_1_0=2
+fan_speed.bit_offset_1_0=
+
+fan_speed.mode_1_1=config
+fan_speed.int_cons_1_1=
+fan_speed.src_1_1=cpld
+fan_speed.frmt_1_1=num_bytes
+fan_speed.pola_1_1=negative
+fan_speed.fpath_1_1=
+fan_speed.addr_1_1=0x00020025
+fan_speed.len_1_1=2
+fan_speed.bit_offset_1_1=
+
+fan_speed.mode_2_0=config
+fan_speed.int_cons_2_0=
+fan_speed.src_2_0=cpld
+fan_speed.frmt_2_0=num_bytes
+fan_speed.pola_2_0=negative
+fan_speed.fpath_2_0=
+fan_speed.addr_2_0=0x0002001d
+fan_speed.len_2_0=2
+fan_speed.bit_offset_2_0=
+
+fan_speed.mode_2_1=config
+fan_speed.int_cons_2_1=
+fan_speed.src_2_1=cpld
+fan_speed.frmt_2_1=num_bytes
+fan_speed.pola_2_1=negative
+fan_speed.fpath_2_1=
+fan_speed.addr_2_1=0x00020027
+fan_speed.len_2_1=2
+fan_speed.bit_offset_2_1=
+
+fan_speed.mode_3_0=config
+fan_speed.int_cons_3_0=
+fan_speed.src_3_0=cpld
+fan_speed.frmt_3_0=num_bytes
+fan_speed.pola_3_0=negative
+fan_speed.fpath_3_0=
+fan_speed.addr_3_0=0x0002001f
+fan_speed.len_3_0=2
+fan_speed.bit_offset_3_0=
+
+fan_speed.mode_3_1=config
+fan_speed.int_cons_3_1=
+fan_speed.src_3_1=cpld
+fan_speed.frmt_3_1=num_bytes
+fan_speed.pola_3_1=negative
+fan_speed.fpath_3_1=
+fan_speed.addr_3_1=0x00020029
+fan_speed.len_3_1=2
+fan_speed.bit_offset_3_1=
+
+fan_speed.mode_4_0=config
+fan_speed.int_cons_4_0=
+fan_speed.src_4_0=cpld
+fan_speed.frmt_4_0=num_bytes
+fan_speed.pola_4_0=negative
+fan_speed.fpath_4_0=
+fan_speed.addr_4_0=0x00020021
+fan_speed.len_4_0=2
+fan_speed.bit_offset_4_0=
+
+fan_speed.mode_4_1=config
+fan_speed.int_cons_4_1=
+fan_speed.src_4_1=cpld
+fan_speed.frmt_4_1=num_bytes
+fan_speed.pola_4_1=negative
+fan_speed.fpath_4_1=
+fan_speed.addr_4_1=0x0002002b
+fan_speed.len_4_1=2
+fan_speed.bit_offset_4_1=
+
+
+# configuration item: fan pwm
+# format: fan_ratio_[fan_id]_[motor_id]
+# fan_id: start from 1
+# motor_id: start from 0
+fan_ratio.mode_1_0=config
+fan_ratio.int_cons_1_0=
+fan_ratio.src_1_0=cpld
+fan_ratio.frmt_1_0=byte
+fan_ratio.pola_1_0=
+fan_ratio.fpath_1_0=
+fan_ratio.addr_1_0=0x00020014
+fan_ratio.len_1_0=1
+fan_ratio.bit_offset_1_0=
+
+fan_ratio.mode_1_1=config
+fan_ratio.int_cons_1_1=
+fan_ratio.src_1_1=cpld
+fan_ratio.frmt_1_1=byte
+fan_ratio.pola_1_1=
+fan_ratio.fpath_1_1=
+fan_ratio.addr_1_1=0x00020014
+fan_ratio.len_1_1=1
+fan_ratio.bit_offset_1_1=
+
+fan_ratio.mode_2_0=config
+fan_ratio.int_cons_2_0=
+fan_ratio.src_2_0=cpld
+fan_ratio.frmt_2_0=byte
+fan_ratio.pola_2_0=
+fan_ratio.fpath_2_0=
+fan_ratio.addr_2_0=0x00020015
+fan_ratio.len_2_0=1
+fan_ratio.bit_offset_2_0=
+
+fan_ratio.mode_2_1=config
+fan_ratio.int_cons_2_1=
+fan_ratio.src_2_1=cpld
+fan_ratio.frmt_2_1=byte
+fan_ratio.pola_2_1=
+fan_ratio.fpath_2_1=
+fan_ratio.addr_2_1=0x00020015
+fan_ratio.len_2_1=1
+fan_ratio.bit_offset_2_1=
+
+fan_ratio.mode_3_0=config
+fan_ratio.int_cons_3_0=
+fan_ratio.src_3_0=cpld
+fan_ratio.frmt_3_0=byte
+fan_ratio.pola_3_0=
+fan_ratio.fpath_3_0=
+fan_ratio.addr_3_0=0x00020016
+fan_ratio.len_3_0=1
+fan_ratio.bit_offset_3_0=
+
+fan_ratio.mode_3_1=config
+fan_ratio.int_cons_3_1=
+fan_ratio.src_3_1=cpld
+fan_ratio.frmt_3_1=byte
+fan_ratio.pola_3_1=
+fan_ratio.fpath_3_1=
+fan_ratio.addr_3_1=0x00020016
+fan_ratio.len_3_1=1
+fan_ratio.bit_offset_3_1=
+
+fan_ratio.mode_4_0=config
+fan_ratio.int_cons_4_0=
+fan_ratio.src_4_0=cpld
+fan_ratio.frmt_4_0=byte
+fan_ratio.pola_4_0=
+fan_ratio.fpath_4_0=
+fan_ratio.addr_4_0=0x00020017
+fan_ratio.len_4_0=1
+fan_ratio.bit_offset_4_0=
+
+fan_ratio.mode_4_1=config
+fan_ratio.int_cons_4_1=
+fan_ratio.src_4_1=cpld
+fan_ratio.frmt_4_1=byte
+fan_ratio.pola_4_1=
+fan_ratio.fpath_4_1=
+fan_ratio.addr_4_1=0x00020017
+fan_ratio.len_4_1=1
+fan_ratio.bit_offset_4_1=
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/plat_sysfs_cfg/WB_PLAT_PSU.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/plat_sysfs_cfg/WB_PLAT_PSU.cfg
new file mode 100644
index 000000000..082ef20fe
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/plat_sysfs_cfg/WB_PLAT_PSU.cfg
@@ -0,0 +1,64 @@
+# configuration item: the number of psus
+# format: dev_num_[main_dev]_[minor_dev]
+# main_dev: psu main_dev is 2
+# minor_dev: psu minor_dev not exist(0)
+dev_num_2_0=2
+
+
+# configuration item: psu status
+# format: psu_status_[psu_index]_[status_id]
+# psu_index: start from 1
+# status_id: 0: presence 1: output 2: alert
+# psu1 presence status
+psu_status.mode_1_0=config
+psu_status.src_1_0=cpld
+psu_status.frmt_1_0=bit
+psu_status.pola_1_0=negative
+psu_status.addr_1_0=0x00050051
+psu_status.len_1_0=1
+psu_status.bit_offset_1_0=0
+
+# psu1 output status
+psu_status.mode_1_1=config
+psu_status.src_1_1=cpld
+psu_status.frmt_1_1=bit
+psu_status.pola_1_1=positive
+psu_status.addr_1_1=0x00050051
+psu_status.len_1_1=1
+psu_status.bit_offset_1_1=1
+
+# psu1 alert status
+psu_status.mode_1_2=config
+psu_status.src_1_2=cpld
+psu_status.frmt_1_2=bit
+psu_status.pola_1_2=negative
+psu_status.addr_1_2=0x00050051
+psu_status.len_1_2=1
+psu_status.bit_offset_1_2=2
+
+# psu2 presence status
+psu_status.mode_2_0=config
+psu_status.src_2_0=cpld
+psu_status.frmt_2_0=bit
+psu_status.pola_2_0=negative
+psu_status.addr_2_0=0x00050051
+psu_status.len_2_0=1
+psu_status.bit_offset_2_0=4
+
+# psu2 output status
+psu_status.mode_2_1=config
+psu_status.src_2_1=cpld
+psu_status.frmt_2_1=bit
+psu_status.pola_2_1=positive
+psu_status.addr_2_1=0x00050051
+psu_status.len_2_1=1
+psu_status.bit_offset_2_1=5
+
+# psu2 alert status
+psu_status.mode_2_2=config
+psu_status.src_2_2=cpld
+psu_status.frmt_2_2=bit
+psu_status.pola_2_2=negative
+psu_status.addr_2_2=0x00050051
+psu_status.len_2_2=1
+psu_status.bit_offset_2_2=6
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/plat_sysfs_cfg/WB_PLAT_SFF.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/plat_sysfs_cfg/WB_PLAT_SFF.cfg
new file mode 100644
index 000000000..7f57dfd93
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/plat_sysfs_cfg/WB_PLAT_SFF.cfg
@@ -0,0 +1,521 @@
+# configuration item: the number of sffs
+# format: dev_num_[main_dev]_[minor_dev]
+# main_dev: sff main_dev is 3
+# minor_dev: sff minor_dev not exist(0)
+dev_num_3_0=56
+
+# configuration item: The directory name of sff sysfs
+# format: sff_dir_name_[sff_index]
+# sff_index: start from 1
+sff_dir_name_1 =sff1
+sff_dir_name_2 =sff2
+sff_dir_name_3 =sff3
+sff_dir_name_4 =sff4
+sff_dir_name_5 =sff5
+sff_dir_name_6 =sff6
+sff_dir_name_7 =sff7
+sff_dir_name_8 =sff8
+sff_dir_name_9 =sff9
+sff_dir_name_10 =sff10
+sff_dir_name_11 =sff11
+sff_dir_name_12 =sff12
+sff_dir_name_13 =sff13
+sff_dir_name_14 =sff14
+sff_dir_name_15 =sff15
+sff_dir_name_16 =sff16
+sff_dir_name_17 =sff17
+sff_dir_name_18 =sff18
+sff_dir_name_19 =sff19
+sff_dir_name_20 =sff20
+sff_dir_name_21 =sff21
+sff_dir_name_22 =sff22
+sff_dir_name_23 =sff23
+sff_dir_name_24 =sff24
+sff_dir_name_25 =sff25
+sff_dir_name_26 =sff26
+sff_dir_name_27 =sff27
+sff_dir_name_28 =sff28
+sff_dir_name_29 =sff29
+sff_dir_name_30 =sff30
+sff_dir_name_31 =sff31
+sff_dir_name_32 =sff32
+sff_dir_name_33 =sff33
+sff_dir_name_34 =sff34
+sff_dir_name_35 =sff35
+sff_dir_name_36 =sff36
+sff_dir_name_37 =sff37
+sff_dir_name_38 =sff38
+sff_dir_name_39 =sff39
+sff_dir_name_40 =sff40
+sff_dir_name_41 =sff41
+sff_dir_name_42 =sff42
+sff_dir_name_43 =sff43
+sff_dir_name_44 =sff44
+sff_dir_name_45 =sff45
+sff_dir_name_46 =sff46
+sff_dir_name_47 =sff47
+sff_dir_name_48 =sff48
+sff_dir_name_49 =sff49
+sff_dir_name_50 =sff50
+sff_dir_name_51 =sff51
+sff_dir_name_52 =sff52
+sff_dir_name_53 =sff53
+sff_dir_name_54 =sff54
+sff_dir_name_55 =sff55
+sff_dir_name_56 =sff56
+
+
+# configuration item: sff cpld register status
+# format: sff_cpld_reg_[sff_index]_[cpld_reg]
+# sff_index: start from 1
+# cpld_reg: 1: power_on, 2: tx_fault, 3: tx_dis, 4:pre_n, 5:rx_los
+# 6: reset, 7: lpmode, 8: module_present, 9: interrupt
+
+# sff cpld presence status
+sff_cpld_reg.mode_1_8=config
+sff_cpld_reg.src_1_8=cpld
+sff_cpld_reg.frmt_1_8=bit
+sff_cpld_reg.pola_1_8=negative
+sff_cpld_reg.addr_1_8=0x00030030
+sff_cpld_reg.len_1_8=1
+sff_cpld_reg.bit_offset_1_8=0
+
+sff_cpld_reg.mode_2_8=config
+sff_cpld_reg.src_2_8=cpld
+sff_cpld_reg.frmt_2_8=bit
+sff_cpld_reg.pola_2_8=negative
+sff_cpld_reg.addr_2_8=0x00030030
+sff_cpld_reg.len_2_8=1
+sff_cpld_reg.bit_offset_2_8=1
+
+sff_cpld_reg.mode_3_8=config
+sff_cpld_reg.src_3_8=cpld
+sff_cpld_reg.frmt_3_8=bit
+sff_cpld_reg.pola_3_8=negative
+sff_cpld_reg.addr_3_8=0x00030030
+sff_cpld_reg.len_3_8=1
+sff_cpld_reg.bit_offset_3_8=2
+
+sff_cpld_reg.mode_4_8=config
+sff_cpld_reg.src_4_8=cpld
+sff_cpld_reg.frmt_4_8=bit
+sff_cpld_reg.pola_4_8=negative
+sff_cpld_reg.addr_4_8=0x00030030
+sff_cpld_reg.len_4_8=1
+sff_cpld_reg.bit_offset_4_8=3
+
+sff_cpld_reg.mode_5_8=config
+sff_cpld_reg.src_5_8=cpld
+sff_cpld_reg.frmt_5_8=bit
+sff_cpld_reg.pola_5_8=negative
+sff_cpld_reg.addr_5_8=0x00030030
+sff_cpld_reg.len_5_8=1
+sff_cpld_reg.bit_offset_5_8=4
+
+sff_cpld_reg.mode_6_8=config
+sff_cpld_reg.src_6_8=cpld
+sff_cpld_reg.frmt_6_8=bit
+sff_cpld_reg.pola_6_8=negative
+sff_cpld_reg.addr_6_8=0x00030030
+sff_cpld_reg.len_6_8=1
+sff_cpld_reg.bit_offset_6_8=5
+
+sff_cpld_reg.mode_7_8=config
+sff_cpld_reg.src_7_8=cpld
+sff_cpld_reg.frmt_7_8=bit
+sff_cpld_reg.pola_7_8=negative
+sff_cpld_reg.addr_7_8=0x00030030
+sff_cpld_reg.len_7_8=1
+sff_cpld_reg.bit_offset_7_8=6
+
+sff_cpld_reg.mode_8_8=config
+sff_cpld_reg.src_8_8=cpld
+sff_cpld_reg.frmt_8_8=bit
+sff_cpld_reg.pola_8_8=negative
+sff_cpld_reg.addr_8_8=0x00030030
+sff_cpld_reg.len_8_8=1
+sff_cpld_reg.bit_offset_8_8=7
+
+sff_cpld_reg.mode_9_8=config
+sff_cpld_reg.src_9_8=cpld
+sff_cpld_reg.frmt_9_8=bit
+sff_cpld_reg.pola_9_8=negative
+sff_cpld_reg.addr_9_8=0x00030031
+sff_cpld_reg.len_9_8=1
+sff_cpld_reg.bit_offset_9_8=0
+
+sff_cpld_reg.mode_10_8=config
+sff_cpld_reg.src_10_8=cpld
+sff_cpld_reg.frmt_10_8=bit
+sff_cpld_reg.pola_10_8=negative
+sff_cpld_reg.addr_10_8=0x00030031
+sff_cpld_reg.len_10_8=1
+sff_cpld_reg.bit_offset_10_8=1
+
+sff_cpld_reg.mode_11_8=config
+sff_cpld_reg.src_11_8=cpld
+sff_cpld_reg.frmt_11_8=bit
+sff_cpld_reg.pola_11_8=negative
+sff_cpld_reg.addr_11_8=0x00030031
+sff_cpld_reg.len_11_8=1
+sff_cpld_reg.bit_offset_11_8=2
+
+sff_cpld_reg.mode_12_8=config
+sff_cpld_reg.src_12_8=cpld
+sff_cpld_reg.frmt_12_8=bit
+sff_cpld_reg.pola_12_8=negative
+sff_cpld_reg.addr_12_8=0x00030031
+sff_cpld_reg.len_12_8=1
+sff_cpld_reg.bit_offset_12_8=3
+
+sff_cpld_reg.mode_13_8=config
+sff_cpld_reg.src_13_8=cpld
+sff_cpld_reg.frmt_13_8=bit
+sff_cpld_reg.pola_13_8=negative
+sff_cpld_reg.addr_13_8=0x00030031
+sff_cpld_reg.len_13_8=1
+sff_cpld_reg.bit_offset_13_8=4
+
+sff_cpld_reg.mode_14_8=config
+sff_cpld_reg.src_14_8=cpld
+sff_cpld_reg.frmt_14_8=bit
+sff_cpld_reg.pola_14_8=negative
+sff_cpld_reg.addr_14_8=0x00030031
+sff_cpld_reg.len_14_8=1
+sff_cpld_reg.bit_offset_14_8=5
+
+sff_cpld_reg.mode_15_8=config
+sff_cpld_reg.src_15_8=cpld
+sff_cpld_reg.frmt_15_8=bit
+sff_cpld_reg.pola_15_8=negative
+sff_cpld_reg.addr_15_8=0x00030031
+sff_cpld_reg.len_15_8=1
+sff_cpld_reg.bit_offset_15_8=6
+
+sff_cpld_reg.mode_16_8=config
+sff_cpld_reg.src_16_8=cpld
+sff_cpld_reg.frmt_16_8=bit
+sff_cpld_reg.pola_16_8=negative
+sff_cpld_reg.addr_16_8=0x00030031
+sff_cpld_reg.len_16_8=1
+sff_cpld_reg.bit_offset_16_8=7
+
+sff_cpld_reg.mode_17_8=config
+sff_cpld_reg.src_17_8=cpld
+sff_cpld_reg.frmt_17_8=bit
+sff_cpld_reg.pola_17_8=negative
+sff_cpld_reg.addr_17_8=0x00030032
+sff_cpld_reg.len_17_8=1
+sff_cpld_reg.bit_offset_17_8=0
+
+sff_cpld_reg.mode_18_8=config
+sff_cpld_reg.src_18_8=cpld
+sff_cpld_reg.frmt_18_8=bit
+sff_cpld_reg.pola_18_8=negative
+sff_cpld_reg.addr_18_8=0x00030032
+sff_cpld_reg.len_18_8=1
+sff_cpld_reg.bit_offset_18_8=1
+
+sff_cpld_reg.mode_19_8=config
+sff_cpld_reg.src_19_8=cpld
+sff_cpld_reg.frmt_19_8=bit
+sff_cpld_reg.pola_19_8=negative
+sff_cpld_reg.addr_19_8=0x00030032
+sff_cpld_reg.len_19_8=1
+sff_cpld_reg.bit_offset_19_8=2
+
+sff_cpld_reg.mode_20_8=config
+sff_cpld_reg.src_20_8=cpld
+sff_cpld_reg.frmt_20_8=bit
+sff_cpld_reg.pola_20_8=negative
+sff_cpld_reg.addr_20_8=0x00030032
+sff_cpld_reg.len_20_8=1
+sff_cpld_reg.bit_offset_20_8=3
+
+sff_cpld_reg.mode_21_8=config
+sff_cpld_reg.src_21_8=cpld
+sff_cpld_reg.frmt_21_8=bit
+sff_cpld_reg.pola_21_8=negative
+sff_cpld_reg.addr_21_8=0x00030032
+sff_cpld_reg.len_21_8=1
+sff_cpld_reg.bit_offset_21_8=4
+
+sff_cpld_reg.mode_22_8=config
+sff_cpld_reg.src_22_8=cpld
+sff_cpld_reg.frmt_22_8=bit
+sff_cpld_reg.pola_22_8=negative
+sff_cpld_reg.addr_22_8=0x00030032
+sff_cpld_reg.len_22_8=1
+sff_cpld_reg.bit_offset_22_8=5
+
+sff_cpld_reg.mode_23_8=config
+sff_cpld_reg.src_23_8=cpld
+sff_cpld_reg.frmt_23_8=bit
+sff_cpld_reg.pola_23_8=negative
+sff_cpld_reg.addr_23_8=0x00030032
+sff_cpld_reg.len_23_8=1
+sff_cpld_reg.bit_offset_23_8=6
+
+sff_cpld_reg.mode_24_8=config
+sff_cpld_reg.src_24_8=cpld
+sff_cpld_reg.frmt_24_8=bit
+sff_cpld_reg.pola_24_8=negative
+sff_cpld_reg.addr_24_8=0x00030032
+sff_cpld_reg.len_24_8=1
+sff_cpld_reg.bit_offset_24_8=7
+
+sff_cpld_reg.mode_25_8=config
+sff_cpld_reg.src_25_8=cpld
+sff_cpld_reg.frmt_25_8=bit
+sff_cpld_reg.pola_25_8=negative
+sff_cpld_reg.addr_25_8=0x00040030
+sff_cpld_reg.len_25_8=1
+sff_cpld_reg.bit_offset_25_8=0
+
+sff_cpld_reg.mode_26_8=config
+sff_cpld_reg.src_26_8=cpld
+sff_cpld_reg.frmt_26_8=bit
+sff_cpld_reg.pola_26_8=negative
+sff_cpld_reg.addr_26_8=0x00040030
+sff_cpld_reg.len_26_8=1
+sff_cpld_reg.bit_offset_26_8=1
+
+sff_cpld_reg.mode_27_8=config
+sff_cpld_reg.src_27_8=cpld
+sff_cpld_reg.frmt_27_8=bit
+sff_cpld_reg.pola_27_8=negative
+sff_cpld_reg.addr_27_8=0x00040030
+sff_cpld_reg.len_27_8=1
+sff_cpld_reg.bit_offset_27_8=2
+
+sff_cpld_reg.mode_28_8=config
+sff_cpld_reg.src_28_8=cpld
+sff_cpld_reg.frmt_28_8=bit
+sff_cpld_reg.pola_28_8=negative
+sff_cpld_reg.addr_28_8=0x00040030
+sff_cpld_reg.len_28_8=1
+sff_cpld_reg.bit_offset_28_8=3
+
+sff_cpld_reg.mode_29_8=config
+sff_cpld_reg.src_29_8=cpld
+sff_cpld_reg.frmt_29_8=bit
+sff_cpld_reg.pola_29_8=negative
+sff_cpld_reg.addr_29_8=0x00040030
+sff_cpld_reg.len_29_8=1
+sff_cpld_reg.bit_offset_29_8=4
+
+sff_cpld_reg.mode_30_8=config
+sff_cpld_reg.src_30_8=cpld
+sff_cpld_reg.frmt_30_8=bit
+sff_cpld_reg.pola_30_8=negative
+sff_cpld_reg.addr_30_8=0x00040030
+sff_cpld_reg.len_30_8=1
+sff_cpld_reg.bit_offset_30_8=5
+
+sff_cpld_reg.mode_31_8=config
+sff_cpld_reg.src_31_8=cpld
+sff_cpld_reg.frmt_31_8=bit
+sff_cpld_reg.pola_31_8=negative
+sff_cpld_reg.addr_31_8=0x00040030
+sff_cpld_reg.len_31_8=1
+sff_cpld_reg.bit_offset_31_8=6
+
+sff_cpld_reg.mode_32_8=config
+sff_cpld_reg.src_32_8=cpld
+sff_cpld_reg.frmt_32_8=bit
+sff_cpld_reg.pola_32_8=negative
+sff_cpld_reg.addr_32_8=0x00040030
+sff_cpld_reg.len_32_8=1
+sff_cpld_reg.bit_offset_32_8=7
+
+sff_cpld_reg.mode_33_8=config
+sff_cpld_reg.src_33_8=cpld
+sff_cpld_reg.frmt_33_8=bit
+sff_cpld_reg.pola_33_8=negative
+sff_cpld_reg.addr_33_8=0x00040031
+sff_cpld_reg.len_33_8=1
+sff_cpld_reg.bit_offset_33_8=0
+
+sff_cpld_reg.mode_34_8=config
+sff_cpld_reg.src_34_8=cpld
+sff_cpld_reg.frmt_34_8=bit
+sff_cpld_reg.pola_34_8=negative
+sff_cpld_reg.addr_34_8=0x00040031
+sff_cpld_reg.len_34_8=1
+sff_cpld_reg.bit_offset_34_8=1
+
+sff_cpld_reg.mode_35_8=config
+sff_cpld_reg.src_35_8=cpld
+sff_cpld_reg.frmt_35_8=bit
+sff_cpld_reg.pola_35_8=negative
+sff_cpld_reg.addr_35_8=0x00040031
+sff_cpld_reg.len_35_8=1
+sff_cpld_reg.bit_offset_35_8=2
+
+sff_cpld_reg.mode_36_8=config
+sff_cpld_reg.src_36_8=cpld
+sff_cpld_reg.frmt_36_8=bit
+sff_cpld_reg.pola_36_8=negative
+sff_cpld_reg.addr_36_8=0x00040031
+sff_cpld_reg.len_36_8=1
+sff_cpld_reg.bit_offset_36_8=3
+
+sff_cpld_reg.mode_37_8=config
+sff_cpld_reg.src_37_8=cpld
+sff_cpld_reg.frmt_37_8=bit
+sff_cpld_reg.pola_37_8=negative
+sff_cpld_reg.addr_37_8=0x00040031
+sff_cpld_reg.len_37_8=1
+sff_cpld_reg.bit_offset_37_8=4
+
+sff_cpld_reg.mode_38_8=config
+sff_cpld_reg.src_38_8=cpld
+sff_cpld_reg.frmt_38_8=bit
+sff_cpld_reg.pola_38_8=negative
+sff_cpld_reg.addr_38_8=0x00040031
+sff_cpld_reg.len_38_8=1
+sff_cpld_reg.bit_offset_38_8=5
+
+sff_cpld_reg.mode_39_8=config
+sff_cpld_reg.src_39_8=cpld
+sff_cpld_reg.frmt_39_8=bit
+sff_cpld_reg.pola_39_8=negative
+sff_cpld_reg.addr_39_8=0x00040031
+sff_cpld_reg.len_39_8=1
+sff_cpld_reg.bit_offset_39_8=6
+
+sff_cpld_reg.mode_40_8=config
+sff_cpld_reg.src_40_8=cpld
+sff_cpld_reg.frmt_40_8=bit
+sff_cpld_reg.pola_40_8=negative
+sff_cpld_reg.addr_40_8=0x00040031
+sff_cpld_reg.len_40_8=1
+sff_cpld_reg.bit_offset_40_8=7
+
+sff_cpld_reg.mode_41_8=config
+sff_cpld_reg.src_41_8=cpld
+sff_cpld_reg.frmt_41_8=bit
+sff_cpld_reg.pola_41_8=negative
+sff_cpld_reg.addr_41_8=0x00040032
+sff_cpld_reg.len_41_8=1
+sff_cpld_reg.bit_offset_41_8=0
+
+sff_cpld_reg.mode_42_8=config
+sff_cpld_reg.src_42_8=cpld
+sff_cpld_reg.frmt_42_8=bit
+sff_cpld_reg.pola_42_8=negative
+sff_cpld_reg.addr_42_8=0x00040032
+sff_cpld_reg.len_42_8=1
+sff_cpld_reg.bit_offset_42_8=1
+
+sff_cpld_reg.mode_43_8=config
+sff_cpld_reg.src_43_8=cpld
+sff_cpld_reg.frmt_43_8=bit
+sff_cpld_reg.pola_43_8=negative
+sff_cpld_reg.addr_43_8=0x00040032
+sff_cpld_reg.len_43_8=1
+sff_cpld_reg.bit_offset_43_8=2
+
+sff_cpld_reg.mode_44_8=config
+sff_cpld_reg.src_44_8=cpld
+sff_cpld_reg.frmt_44_8=bit
+sff_cpld_reg.pola_44_8=negative
+sff_cpld_reg.addr_44_8=0x00040032
+sff_cpld_reg.len_44_8=1
+sff_cpld_reg.bit_offset_44_8=3
+
+sff_cpld_reg.mode_45_8=config
+sff_cpld_reg.src_45_8=cpld
+sff_cpld_reg.frmt_45_8=bit
+sff_cpld_reg.pola_45_8=negative
+sff_cpld_reg.addr_45_8=0x00040032
+sff_cpld_reg.len_45_8=1
+sff_cpld_reg.bit_offset_45_8=4
+
+sff_cpld_reg.mode_46_8=config
+sff_cpld_reg.src_46_8=cpld
+sff_cpld_reg.frmt_46_8=bit
+sff_cpld_reg.pola_46_8=negative
+sff_cpld_reg.addr_46_8=0x00040032
+sff_cpld_reg.len_46_8=1
+sff_cpld_reg.bit_offset_46_8=5
+
+sff_cpld_reg.mode_47_8=config
+sff_cpld_reg.src_47_8=cpld
+sff_cpld_reg.frmt_47_8=bit
+sff_cpld_reg.pola_47_8=negative
+sff_cpld_reg.addr_47_8=0x00040032
+sff_cpld_reg.len_47_8=1
+sff_cpld_reg.bit_offset_47_8=6
+
+sff_cpld_reg.mode_48_8=config
+sff_cpld_reg.src_48_8=cpld
+sff_cpld_reg.frmt_48_8=bit
+sff_cpld_reg.pola_48_8=negative
+sff_cpld_reg.addr_48_8=0x00040032
+sff_cpld_reg.len_48_8=1
+sff_cpld_reg.bit_offset_48_8=7
+
+sff_cpld_reg.mode_49_8=config
+sff_cpld_reg.src_49_8=cpld
+sff_cpld_reg.frmt_49_8=bit
+sff_cpld_reg.pola_49_8=negative
+sff_cpld_reg.addr_49_8=0x00040033
+sff_cpld_reg.len_49_8=1
+sff_cpld_reg.bit_offset_49_8=0
+
+sff_cpld_reg.mode_50_8=config
+sff_cpld_reg.src_50_8=cpld
+sff_cpld_reg.frmt_50_8=bit
+sff_cpld_reg.pola_50_8=negative
+sff_cpld_reg.addr_50_8=0x00040033
+sff_cpld_reg.len_50_8=1
+sff_cpld_reg.bit_offset_50_8=1
+
+sff_cpld_reg.mode_51_8=config
+sff_cpld_reg.src_51_8=cpld
+sff_cpld_reg.frmt_51_8=bit
+sff_cpld_reg.pola_51_8=negative
+sff_cpld_reg.addr_51_8=0x00040033
+sff_cpld_reg.len_51_8=1
+sff_cpld_reg.bit_offset_51_8=2
+
+sff_cpld_reg.mode_52_8=config
+sff_cpld_reg.src_52_8=cpld
+sff_cpld_reg.frmt_52_8=bit
+sff_cpld_reg.pola_52_8=negative
+sff_cpld_reg.addr_52_8=0x00040033
+sff_cpld_reg.len_52_8=1
+sff_cpld_reg.bit_offset_52_8=3
+
+sff_cpld_reg.mode_53_8=config
+sff_cpld_reg.src_53_8=cpld
+sff_cpld_reg.frmt_53_8=bit
+sff_cpld_reg.pola_53_8=negative
+sff_cpld_reg.addr_53_8=0x00040033
+sff_cpld_reg.len_53_8=1
+sff_cpld_reg.bit_offset_53_8=4
+
+sff_cpld_reg.mode_54_8=config
+sff_cpld_reg.src_54_8=cpld
+sff_cpld_reg.frmt_54_8=bit
+sff_cpld_reg.pola_54_8=negative
+sff_cpld_reg.addr_54_8=0x00040033
+sff_cpld_reg.len_54_8=1
+sff_cpld_reg.bit_offset_54_8=5
+
+sff_cpld_reg.mode_55_8=config
+sff_cpld_reg.src_55_8=cpld
+sff_cpld_reg.frmt_55_8=bit
+sff_cpld_reg.pola_55_8=negative
+sff_cpld_reg.addr_55_8=0x00040033
+sff_cpld_reg.len_55_8=1
+sff_cpld_reg.bit_offset_55_8=6
+
+sff_cpld_reg.mode_56_8=config
+sff_cpld_reg.src_56_8=cpld
+sff_cpld_reg.frmt_56_8=bit
+sff_cpld_reg.pola_56_8=negative
+sff_cpld_reg.addr_56_8=0x00040033
+sff_cpld_reg.len_56_8=1
+sff_cpld_reg.bit_offset_56_8=7
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/plat_sysfs_cfg/cfg_file_name b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/plat_sysfs_cfg/cfg_file_name
new file mode 100644
index 000000000..5f4942044
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/plat_sysfs_cfg/cfg_file_name
@@ -0,0 +1,4 @@
+WB_PLAT_CPLD
+WB_PLAT_FAN
+WB_PLAT_PSU
+WB_PLAT_SFF
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/setup.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/setup.py
new file mode 100644
index 000000000..6c3916921
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/setup.py
@@ -0,0 +1,39 @@
+from setuptools import setup
+
+setup(
+    name='sonic-platform',
+    version='1.0',
+    description='SONiC platform API implementation',
+    license='Apache 2.0',
+    author='SONiC Team',
+    author_email='support',
+    url='',
+    maintainer='support',
+    maintainer_email='',
+    packages=[
+        'sonic_platform',
+        'plat_hal',
+        'wbutil',
+        'eepromutil',
+        'hal-config',
+        'config',
+    ],
+    py_modules=[
+        'hal_pltfm',
+        'platform_util',
+        'platform_intf',
+    ],
+    classifiers=[
+        'Development Status :: 3 - Alpha',
+        'Environment :: Plugins',
+        'Intended Audience :: Developers',
+        'Intended Audience :: Information Technology',
+        'Intended Audience :: System Administrators',
+        'License :: OSI Approved :: Apache Software License',
+        'Natural Language :: English',
+        'Operating System :: POSIX :: Linux',
+        'Programming Language :: Python :: 3.7',
+        'Topic :: Utilities',
+    ],
+    keywords='sonic SONiC platform PLATFORM',
+)
diff --git a/src/sonic-device-data/tests/permitted_list b/src/sonic-device-data/tests/permitted_list
index f89d80ac8..625e6afcc 100644
--- a/src/sonic-device-data/tests/permitted_list
+++ b/src/sonic-device-data/tests/permitted_list
@@ -340,5 +340,9 @@ svi_my_station_optimization
 sai_nbr_bcast_ifp_optimized
 sai_pfc_defaults_disable
 sai_optimized_mmu
+svi_my_station_optimization
+warmboot_knet_shutdown_mode
+sai_stats_support_mask
 sai_default_cpu_tx_tc
+oversubscribe_mixed_sister_25_50_enable
 sai_disable_srcmacqedstmac_ctrl

From d9123664ce189e7b2a53c728216cff48d50a31aa Mon Sep 17 00:00:00 2001
From: abdosi <58047199+abdosi@users.noreply.github.com>
Date: Fri, 31 May 2024 09:30:08 -0700
Subject: [PATCH 0685/1115]  Added Yang Support for attribute slice_type to
 DEVICE_METADATA (#19094)

*Added Yang model support for new attribute in DEVICE_METADATA of slice_type

---------

Signed-off-by: Abhishek Dosi <abdosi@microsoft.com>
---
 src/sonic-yang-models/tests/files/sample_config_db.json  | 3 ++-
 .../tests/yang_model_tests/tests/device_metadata.json    | 3 +++
 .../yang_model_tests/tests_config/device_metadata.json   | 9 +++++++++
 .../yang-models/sonic-device_metadata.yang               | 6 ++++++
 4 files changed, 20 insertions(+), 1 deletion(-)

diff --git a/src/sonic-yang-models/tests/files/sample_config_db.json b/src/sonic-yang-models/tests/files/sample_config_db.json
index 2d2c2e63d..850785624 100644
--- a/src/sonic-yang-models/tests/files/sample_config_db.json
+++ b/src/sonic-yang-models/tests/files/sample_config_db.json
@@ -370,7 +370,8 @@
                 "rack_mgmt_map": "dummy_value",
                 "timezone": "Europe/Kiev",
                 "bgp_router_id": "8.8.8.8",
-                "chassis_hostname": "str-sonic-chassis-1"
+                "chassis_hostname": "str-sonic-chassis-1",
+                "slice_type": "AZNG_Production"
             }
         },
         "VLAN": {
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/device_metadata.json b/src/sonic-yang-models/tests/yang_model_tests/tests/device_metadata.json
index 5f81f02a3..3acfff5c4 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests/device_metadata.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests/device_metadata.json
@@ -172,5 +172,8 @@
     },
     "DEVICE_METADATA_VALID_CHASSIS_HOSTNAME": {
         "desc": "Verifying valid chassis hostname configuration."
+    },
+    "DEVICE_METADATA_VALID_SLICE_TYPE": {
+        "desc": "Verifying valid slice_type configuration."
     }
 }
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/device_metadata.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/device_metadata.json
index 75d08694a..74f4d17dd 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/device_metadata.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/device_metadata.json
@@ -471,5 +471,14 @@
                 }
             }
         }
+    },
+    "DEVICE_METADATA_VALID_SLICE_TYPE": {
+        "sonic-device_metadata:sonic-device_metadata": {
+            "sonic-device_metadata:DEVICE_METADATA": {
+                "sonic-device_metadata:localhost": {
+                    "slice_type": "AZNG_Production"
+                }
+            }
+        }
     }
 }
diff --git a/src/sonic-yang-models/yang-models/sonic-device_metadata.yang b/src/sonic-yang-models/yang-models/sonic-device_metadata.yang
index e201b4bfd..61f6888de 100644
--- a/src/sonic-yang-models/yang-models/sonic-device_metadata.yang
+++ b/src/sonic-yang-models/yang-models/sonic-device_metadata.yang
@@ -259,6 +259,12 @@ module sonic-device_metadata {
                     description "hostname of the chassis to which this linecard or supervisor belongs to";
                     type stypes:hostname;
                 }
+
+                leaf slice_type {
+                    description "Metadata tag for the device.";
+                    type string;
+                }
+
             }
             /* end of container localhost */
         }

From 9d5fb207593d83661e18603141735fd05f222327 Mon Sep 17 00:00:00 2001
From: fountzou <169114916+fountzou@users.noreply.github.com>
Date: Fri, 31 May 2024 12:57:17 -0400
Subject: [PATCH 0686/1115] Reliable TSA implementation (#18928)

* Reliable TSA implementation

---------

Signed-off-by: fountzou <ioannis.fountzoulas@nokia.com>
---
 dockers/docker-fpm-frr/base_image_files/TS    |  14 +-
 dockers/docker-fpm-frr/base_image_files/TSA   |  13 +-
 dockers/docker-fpm-frr/base_image_files/TSB   |  16 +-
 files/build_templates/docker_image_ctl.j2     |   8 +
 files/image_config/config-setup/config-setup  |   6 +
 src/sonic-bgpcfgd/bgpcfgd/main.py             |   2 +
 .../bgpcfgd/managers_chassis_app_db.py        |  50 ++++++
 .../bgpcfgd/managers_device_global.py         |  23 ++-
 src/sonic-bgpcfgd/bgpcfgd/runner.py           |   5 +-
 .../tests/test_chassis_app_db.py              | 142 ++++++++++++++++++
 src/sonic-bgpcfgd/tests/test_device_global.py |  65 +++++++-
 11 files changed, 328 insertions(+), 16 deletions(-)
 create mode 100644 src/sonic-bgpcfgd/bgpcfgd/managers_chassis_app_db.py
 create mode 100644 src/sonic-bgpcfgd/tests/test_chassis_app_db.py

diff --git a/dockers/docker-fpm-frr/base_image_files/TS b/dockers/docker-fpm-frr/base_image_files/TS
index fcff1f806..948da490f 100755
--- a/dockers/docker-fpm-frr/base_image_files/TS
+++ b/dockers/docker-fpm-frr/base_image_files/TS
@@ -6,13 +6,23 @@
 PLATFORM=${PLATFORM:-`sonic-cfggen -H -v DEVICE_METADATA.localhost.platform`}
 
 if [[ $1 == "TSA" ]]; then
+    TSA_CHASSIS_STATE="$(sonic-db-cli CHASSIS_APP_DB HGET "BGP_DEVICE_GLOBAL|STATE" tsa_enabled)"
     TSA_STATE_UPDATE='{"BGP_DEVICE_GLOBAL":{"STATE":{"tsa_enabled": "true"}}}'
-    log_msg='System Mode: Normal -> Maintenance'
+    if [[ $TSA_CHASSIS_STATE == true ]]; then
+        log_msg='System Mode: Maintenance -> Maintenance'
+    else
+        log_msg='System Mode: Normal -> Maintenance'
+    fi
     err_msg='System is already in Maintenance'
     desired_tsa_state=true 
 elif [[ $1 == "TSB" ]]; then
+    TSA_CHASSIS_STATE="$(sonic-db-cli CHASSIS_APP_DB HGET "BGP_DEVICE_GLOBAL|STATE" tsa_enabled)"
     TSA_STATE_UPDATE='{"BGP_DEVICE_GLOBAL":{"STATE":{"tsa_enabled": "false"}}}'
-    log_msg='System Mode: Maintenance -> Normal'
+    if [[ $TSA_CHASSIS_STATE == true ]]; then
+        log_msg='System Mode: Maintenance -> Maintenance'
+    else
+        log_msg='System Mode: Maintenance -> Normal'
+    fi
     err_msg='System is already in Normal mode'
     desired_tsa_state=false    
 fi
diff --git a/dockers/docker-fpm-frr/base_image_files/TSA b/dockers/docker-fpm-frr/base_image_files/TSA
index 4b26b2d43..2cd29e92a 100755
--- a/dockers/docker-fpm-frr/base_image_files/TSA
+++ b/dockers/docker-fpm-frr/base_image_files/TSA
@@ -7,7 +7,18 @@ if [ "$EUID" -ne 0 ] ; then
 fi
 
 if [ -f /etc/sonic/chassisdb.conf ]; then
-  rexec all -c "sudo TSA chassis"
+  CHASSIS_TSA_STATE_UPDATE="CHASSIS_APP_DB HMSET "BGP_DEVICE_GLOBAL\|STATE" tsa_enabled "true""
+  CONFIG_DB_TSA_STATE_UPDATE='{"BGP_DEVICE_GLOBAL":{"STATE":{"tsa_enabled": "true"}}}'
+  current_tsa_state="$(sonic-cfggen -d -v BGP_DEVICE_GLOBAL.STATE.tsa_enabled)"
+  if [[ $current_tsa_state  == true ]]; then
+    echo "Chassis is already in Maintenance"
+    logger -t TSA -p user.info "Chassis is already in Maintenance"
+  else
+    sonic-db-cli $CHASSIS_TSA_STATE_UPDATE
+    sonic-cfggen -a "$CONFIG_DB_TSA_STATE_UPDATE" -w
+    echo "Chassis Mode: Normal -> Maintenance"
+    logger -t TSA -p user.info "Chassis Mode: Normal -> Maintenance"
+  fi
   echo "Please execute \"rexec all -c 'sudo config save -y'\" to preserve System mode in Maintenance after reboot\
   or config reload on all linecards"
   exit 0
diff --git a/dockers/docker-fpm-frr/base_image_files/TSB b/dockers/docker-fpm-frr/base_image_files/TSB
index ec353148a..c09126e1d 100755
--- a/dockers/docker-fpm-frr/base_image_files/TSB
+++ b/dockers/docker-fpm-frr/base_image_files/TSB
@@ -6,11 +6,21 @@ if [ "$EUID" -ne 0 ] ; then
   exit 1
 fi
 
-# If run on supervisor of chassis, trigger remote execution of TSB on all linecards
 if [ -f /etc/sonic/chassisdb.conf ]; then
-  rexec all -c "sudo TSB chassis"
+  CHASSIS_TSA_STATE_UPDATE="CHASSIS_APP_DB HMSET "BGP_DEVICE_GLOBAL\|STATE" tsa_enabled "false""
+  CONFIG_DB_TSA_STATE_UPDATE='{"BGP_DEVICE_GLOBAL":{"STATE":{"tsa_enabled": "false"}}}'
+  current_tsa_state="$(sonic-cfggen -d -v BGP_DEVICE_GLOBAL.STATE.tsa_enabled)"
+  if [[ $current_tsa_state  == false ]]; then
+    echo "Chassis is already in Normal mode"
+    logger -t TSB -p user.info "Chassis is already in Normal mode"
+  else
+    sonic-db-cli $CHASSIS_TSA_STATE_UPDATE
+    sonic-cfggen -a "$CONFIG_DB_TSA_STATE_UPDATE" -w
+    echo "Chassis Mode: Maintenance -> Normal"
+    logger -t TSB -p user.info "Chassis Mode: Maintenance -> Normal"
+  fi
   echo "Please execute \"rexec all -c 'sudo config save -y'\" to preserve System mode in Normal state after reboot\
- or config reload on all linecards"
+  or config reload on all linecards"
   exit 0
 fi
 
diff --git a/files/build_templates/docker_image_ctl.j2 b/files/build_templates/docker_image_ctl.j2
index f0208d32f..626c2de63 100644
--- a/files/build_templates/docker_image_ctl.j2
+++ b/files/build_templates/docker_image_ctl.j2
@@ -269,6 +269,14 @@ function postStartAction()
             $SONIC_DB_CLI CONFIG_DB SET "CONFIG_DB_INITIALIZED" "1"
         fi
 
+        # In SUP, enforce CHASSIS_APP_DB.tsa_enabled to be in sync with BGP_DEVICE_GLOBAL.STATE.tsa_enabled
+        if [[ -z "$DEV" ]] && [[ -f /etc/sonic/chassisdb.conf ]]; then
+           tsa_cfg="$($SONIC_DB_CLI CONFIG_DB HGET "BGP_DEVICE_GLOBAL|STATE" "tsa_enabled")"
+           if [[ -n "$tsa_cfg" ]]; then
+              docker exec -i ${DOCKERNAME} $SONIC_DB_CLI CHASSIS_APP_DB HMSET "BGP_DEVICE_GLOBAL|STATE" tsa_enabled ${tsa_cfg}
+           fi
+        fi
+
         # Add redis UDS to the redis group and give read/write access to the group
         REDIS_SOCK="/var/run/redis${DEV}/redis.sock"
     else
diff --git a/files/image_config/config-setup/config-setup b/files/image_config/config-setup/config-setup
index 21d56217c..f66409913 100755
--- a/files/image_config/config-setup/config-setup
+++ b/files/image_config/config-setup/config-setup
@@ -330,6 +330,12 @@ do_db_migration()
         /usr/local/bin/db_migrator.py -o migrate
     fi
     sonic-db-cli CONFIG_DB SET "CONFIG_DB_INITIALIZED" "1"
+    #Enforce CHASSIS_APP_DB.tsa_enabled to be in sync with BGP_DEVICE_GLOBAL.STATE.tsa_enabled
+
+    if [[ -f /etc/sonic/chassisdb.conf ]]; then
+       tsa_cfg="$(sonic-db-cli CONFIG_DB HGET "BGP_DEVICE_GLOBAL|STATE" "tsa_enabled")"
+       sonic-db-cli CHASSIS_APP_DB HMSET "BGP_DEVICE_GLOBAL|STATE" tsa_enabled ${tsa_cfg}
+    fi
 }
 
 # Perform configuration migration from backup copy.
diff --git a/src/sonic-bgpcfgd/bgpcfgd/main.py b/src/sonic-bgpcfgd/bgpcfgd/main.py
index 624d31103..b6580ab91 100644
--- a/src/sonic-bgpcfgd/bgpcfgd/main.py
+++ b/src/sonic-bgpcfgd/bgpcfgd/main.py
@@ -20,6 +20,7 @@
 from .managers_static_rt import StaticRouteMgr
 from .managers_rm import RouteMapMgr
 from .managers_device_global import DeviceGlobalCfgMgr
+from .managers_chassis_app_db import ChassisAppDbMgr
 from .static_rt_timer import StaticRouteTimer
 from .runner import Runner, signal_handler
 from .template import TemplateFabric
@@ -73,6 +74,7 @@ def do_work():
         RouteMapMgr(common_objs, "APPL_DB", swsscommon.APP_BGP_PROFILE_TABLE_NAME),
         # Device Global Manager
         DeviceGlobalCfgMgr(common_objs, "CONFIG_DB", swsscommon.CFG_BGP_DEVICE_GLOBAL_TABLE_NAME),
+        ChassisAppDbMgr(common_objs, "CHASSIS_APP_DB", "BGP_DEVICE_GLOBAL"),
     ]
     runner = Runner(common_objs['cfg_mgr'])
     for mgr in managers:
diff --git a/src/sonic-bgpcfgd/bgpcfgd/managers_chassis_app_db.py b/src/sonic-bgpcfgd/bgpcfgd/managers_chassis_app_db.py
new file mode 100644
index 000000000..7969ae828
--- /dev/null
+++ b/src/sonic-bgpcfgd/bgpcfgd/managers_chassis_app_db.py
@@ -0,0 +1,50 @@
+from .manager import Manager
+from .managers_device_global import DeviceGlobalCfgMgr
+from .log import log_err, log_debug, log_notice
+import re
+from swsscommon import swsscommon
+
+class ChassisAppDbMgr(Manager):
+    """This class responds to change in tsa_enabled state of the supervisor"""
+
+    def __init__(self, common_objs, db, table):
+        """
+        Initialize the object
+        :param common_objs: common object dictionary
+        :param db: name of the db
+        :param table: name of the table in the db
+        """
+        self.lc_tsa = ""
+        self.directory = common_objs['directory']
+        self.dev_cfg_mgr = DeviceGlobalCfgMgr(common_objs, "CONFIG_DB", swsscommon.CFG_BGP_DEVICE_GLOBAL_TABLE_NAME)
+        self.directory.subscribe([("CONFIG_DB", swsscommon.CFG_BGP_DEVICE_GLOBAL_TABLE_NAME, "tsa_enabled"),], self.on_lc_tsa_status_change)
+        super(ChassisAppDbMgr, self).__init__(
+            common_objs,
+            [],
+            db,
+            table,
+        )
+
+    def on_lc_tsa_status_change(self):
+        if self.directory.path_exist("CONFIG_DB", swsscommon.CFG_BGP_DEVICE_GLOBAL_TABLE_NAME, "tsa_enabled"):
+            self.lc_tsa = self.directory.get_slot("CONFIG_DB", swsscommon.CFG_BGP_DEVICE_GLOBAL_TABLE_NAME)["tsa_enabled"]
+        log_debug("ChassisAppDbMgr:: LC TSA update handler status %s" % self.lc_tsa)
+
+    def set_handler(self, key, data):
+        log_debug("ChassisAppDbMgr:: set handler")
+
+        if not data:
+            log_err("ChassisAppDbMgr:: data is None")
+            return False
+
+        if "tsa_enabled" in data:
+            if self.lc_tsa == "false":
+                self.dev_cfg_mgr.cfg_mgr.commit()
+                self.dev_cfg_mgr.cfg_mgr.update()
+                self.dev_cfg_mgr.isolate_unisolate_device(data["tsa_enabled"])
+            return True
+        return False
+
+    def del_handler(self, key):
+        log_debug("ChassisAppDbMgr:: del handler")
+        return True
diff --git a/src/sonic-bgpcfgd/bgpcfgd/managers_device_global.py b/src/sonic-bgpcfgd/bgpcfgd/managers_device_global.py
index 5c42e4415..639624128 100644
--- a/src/sonic-bgpcfgd/bgpcfgd/managers_device_global.py
+++ b/src/sonic-bgpcfgd/bgpcfgd/managers_device_global.py
@@ -14,6 +14,7 @@ def __init__(self, common_objs, db, table):
         :param table: name of the table in the db
         """
         self.switch_type = ""
+        self.chassis_tsa = ""
         self.directory = common_objs['directory']
         self.cfg_mgr = common_objs['cfg_mgr']
         self.constants = common_objs['constants']
@@ -54,12 +55,13 @@ def set_handler(self, key, data):
 
         if "tsa_enabled" in data:
             self.directory.put(self.db_name, self.table_name, "tsa_enabled", data["tsa_enabled"])
-            if tsa_status != data["tsa_enabled"]:
+
+            self.chassis_tsa = self.get_chassis_tsa_status()
+            if self.chassis_tsa == "false" and tsa_status != data["tsa_enabled"]:
                 self.cfg_mgr.commit()
                 self.cfg_mgr.update()
                 self.isolate_unisolate_device(data["tsa_enabled"])
 
-            
         if "idf_isolation_state" in data:
             self.directory.put(self.db_name, self.table_name, "idf_isolation_state", data["idf_isolation_state"])
             if idf_isolation_state != data["idf_isolation_state"]:
@@ -79,7 +81,9 @@ def check_state_and_get_tsa_routemaps(self, cfg):
         cmd = ""
         if self.directory.path_exist("CONFIG_DB", swsscommon.CFG_BGP_DEVICE_GLOBAL_TABLE_NAME, "tsa_enabled"):
             tsa_status = self.directory.get_slot("CONFIG_DB", swsscommon.CFG_BGP_DEVICE_GLOBAL_TABLE_NAME)["tsa_enabled"]
-            if tsa_status == "true":
+            chassis_tsa = self.get_chassis_tsa_status()
+
+            if tsa_status == "true" or chassis_tsa == "true":
                 cmds = cfg.replace("#012", "\n").split("\n")
                 log_notice("DeviceGlobalCfgMgr:: Device is isolated. Applying TSA route-maps")
                 cmd = self.get_ts_routemaps(cmds, self.tsa_template)
@@ -133,6 +137,17 @@ def __extract_out_route_map_names(self, cmds):
                 route_map_names.add(result.group(1))
         return route_map_names
 
+    def get_chassis_tsa_status(self):
+        chassis_tsa_status = "false"
+        try:
+            ch = swsscommon.SonicV2Connector(use_unix_socket_path=False)
+            ch.connect(ch.CHASSIS_APP_DB, False)
+            chassis_tsa_status = ch.get(ch.CHASSIS_APP_DB, "BGP_DEVICE_GLOBAL|STATE", 'tsa_enabled')
+        except Exception:
+            pass
+
+        return chassis_tsa_status
+
     def downstream_isolate_unisolate(self, idf_isolation_state):
         cmd = "\n"
         if idf_isolation_state == "unisolated":
@@ -153,4 +168,4 @@ def check_state_and_get_idf_isolation_routemaps(self):
             if idf_isolation_state != "unisolated":                
                 log_notice("DeviceGlobalCfgMgr:: IDF is isolated. Applying required route-maps")
                 cmd = self.idf_isolate_template.render(isolation_status=idf_isolation_state, constants=self.constants)           
-        return cmd
\ No newline at end of file
+        return cmd
diff --git a/src/sonic-bgpcfgd/bgpcfgd/runner.py b/src/sonic-bgpcfgd/bgpcfgd/runner.py
index 4c160e596..75df6f902 100644
--- a/src/sonic-bgpcfgd/bgpcfgd/runner.py
+++ b/src/sonic-bgpcfgd/bgpcfgd/runner.py
@@ -39,7 +39,10 @@ def add_manager(self, manager):
         table_name = manager.get_table_name()
         db = swsscommon.SonicDBConfig.getDbId(db_name)
         if db not in self.db_connectors:
-            self.db_connectors[db] = swsscommon.DBConnector(db_name, 0)
+            if db_name == "CHASSIS_APP_DB":
+                self.db_connectors[db] = swsscommon.DBConnector(db_name, 0, True, '')
+            else:
+                self.db_connectors[db] = swsscommon.DBConnector(db_name, 0)
 
         if table_name not in self.callbacks[db]:
             conn = self.db_connectors[db]
diff --git a/src/sonic-bgpcfgd/tests/test_chassis_app_db.py b/src/sonic-bgpcfgd/tests/test_chassis_app_db.py
new file mode 100644
index 000000000..edb08595a
--- /dev/null
+++ b/src/sonic-bgpcfgd/tests/test_chassis_app_db.py
@@ -0,0 +1,142 @@
+from unittest.mock import MagicMock, patch
+
+import os
+from bgpcfgd.directory import Directory
+from bgpcfgd.template import TemplateFabric
+from . import swsscommon_test
+from .util import load_constants
+import bgpcfgd.managers_chassis_app_db
+import bgpcfgd.managers_device_global
+from swsscommon import swsscommon
+from copy import deepcopy
+
+TEMPLATE_PATH = os.path.abspath('../../dockers/docker-fpm-frr/frr')
+BASE_PATH = os.path.abspath('../sonic-bgpcfgd/tests/data/general/peer-group.conf/')
+INTERNAL_BASE_PATH = os.path.abspath('../sonic-bgpcfgd/tests/data/internal/peer-group.conf/')
+global_constants = {
+    "bgp":  {
+        "traffic_shift_community" :"12345:12345",
+        "internal_community_match_tag" : "1001"
+    }
+}
+
+def constructor(check_internal=False):
+    cfg_mgr = MagicMock()
+    def get_text():
+        text = []
+        for line in cfg_mgr.changes.split('\n'):
+            if line.lstrip().startswith('!'):
+                continue
+            text.append(line)
+        text += ["     "]
+        return text
+    def update():
+        if check_internal:
+            cfg_mgr.changes = get_string_from_file("/result_chasiss_packet.conf", INTERNAL_BASE_PATH)
+        else:
+            cfg_mgr.changes = get_string_from_file("/result_all.conf")
+    def push(cfg):
+        cfg_mgr.changes += cfg + "\n"
+    def get_config():
+        return cfg_mgr.changes
+    cfg_mgr.get_text = get_text
+    cfg_mgr.update = update
+    cfg_mgr.push = push
+    cfg_mgr.get_config = get_config
+
+    constants = deepcopy(global_constants)
+    common_objs = {
+        'directory': Directory(),
+        'cfg_mgr':   cfg_mgr,
+        'tf':        TemplateFabric(TEMPLATE_PATH),
+        'constants': constants
+    }
+    mgr = bgpcfgd.managers_chassis_app_db.ChassisAppDbMgr(common_objs, "CHASSIS_APP_DB", "BGP_DEVICE_GLOBAL")
+    cfg_mgr.update()
+    return mgr
+
+
+@patch('bgpcfgd.managers_device_global.log_debug')
+def test_isolate_device(mocked_log_info):
+    m = constructor()
+
+    m.lc_tsa = "false"
+    res = m.set_handler("STATE", {"tsa_enabled": "true"})
+    assert res, "Expect True return value for set_handler"
+    mocked_log_info.assert_called_with("DeviceGlobalCfgMgr::Done")
+    assert m.cfg_mgr.get_config() == get_string_from_file("/result_all_isolate.conf")
+
+    curr_cfg = m.cfg_mgr.get_config()
+    m.lc_tsa = "true"
+    res = m.set_handler("STATE", {"tsa_enabled": "true"})
+    assert res, "Expect True return value for set_handler"
+    assert m.cfg_mgr.get_config() == curr_cfg
+
+@patch('bgpcfgd.managers_device_global.log_debug')
+def test_isolate_device_internal_session(mocked_log_info):
+    m = constructor(check_internal=True)
+
+    m.lc_tsa = "false"
+    res = m.set_handler("STATE", {"tsa_enabled": "true"})
+    assert res, "Expect True return value for set_handler"
+    mocked_log_info.assert_called_with("DeviceGlobalCfgMgr::Done")
+    assert m.cfg_mgr.get_config() == get_string_from_file("/result_chassis_packet_isolate.conf", INTERNAL_BASE_PATH)
+
+    curr_cfg = m.cfg_mgr.get_config()
+    m.lc_tsa = "true"
+    res = m.set_handler("STATE", {"tsa_enabled": "true"})
+    assert res, "Expect True return value for set_handler"
+    assert m.cfg_mgr.get_config() == curr_cfg
+
+
+@patch('bgpcfgd.managers_device_global.log_debug')
+def test_unisolate_device(mocked_log_info):
+    m = constructor()
+
+    m.lc_tsa = "false"
+    res = m.set_handler("STATE", {"tsa_enabled": "false"})
+    assert res, "Expect True return value for set_handler"
+    mocked_log_info.assert_called_with("DeviceGlobalCfgMgr::Done")
+    assert m.cfg_mgr.get_config() == get_string_from_file("/result_all_unisolate.conf")
+
+    curr_cfg = m.cfg_mgr.get_config()
+    m.lc_tsa = "true"
+    res = m.set_handler("STATE", {"tsa_enabled": "false"})
+    assert res, "Expect True return value for set_handler"
+    assert m.cfg_mgr.get_config() == curr_cfg
+
+@patch('bgpcfgd.managers_device_global.log_debug')
+def test_unisolate_device_internal_session(mocked_log_info):
+    m = constructor(check_internal=True)
+
+    m.lc_tsa = "false"
+    res = m.set_handler("STATE", {"tsa_enabled": "false"})
+    assert res, "Expect True return value for set_handler"
+    mocked_log_info.assert_called_with("DeviceGlobalCfgMgr::Done")
+    assert m.cfg_mgr.get_config() == get_string_from_file("/result_chassis_packet_unisolate.conf", INTERNAL_BASE_PATH)
+
+    curr_cfg = m.cfg_mgr.get_config()
+    m.lc_tsa = "true"
+    res = m.set_handler("STATE", {"tsa_enabled": "false"})
+    assert res, "Expect True return value for set_handler"
+    assert m.cfg_mgr.get_config() == curr_cfg
+
+
+def get_string_from_file(filename, base_path=BASE_PATH):
+    fp = open(base_path + filename, "r")
+    cfg = fp.read()
+    fp.close()
+
+    return cfg
+
+@patch('bgpcfgd.managers_chassis_app_db.log_err')
+def test_set_handler_failure_case(mocked_log_info):
+    m = constructor()
+    res = m.set_handler("STATE", {})
+    assert res == False, "Expect False return value for invalid data passed to set_handler"
+    mocked_log_info.assert_called_with("ChassisAppDbMgr:: data is None")
+
+def test_del_handler():
+    m = constructor()
+    res = m.del_handler("STATE")
+    assert res, "Expect True return value for del_handler"
diff --git a/src/sonic-bgpcfgd/tests/test_device_global.py b/src/sonic-bgpcfgd/tests/test_device_global.py
index 12dd895f5..bed0a3271 100644
--- a/src/sonic-bgpcfgd/tests/test_device_global.py
+++ b/src/sonic-bgpcfgd/tests/test_device_global.py
@@ -55,14 +55,24 @@ def get_config():
     return mgr
 
 
+@patch('bgpcfgd.managers_device_global.DeviceGlobalCfgMgr.get_chassis_tsa_status')
 @patch('bgpcfgd.managers_device_global.log_debug')
-def test_isolate_device(mocked_log_info):
+def test_isolate_device(mocked_log_info, mock_get_chassis_tsa_status):
     m = constructor()
+
+    mock_get_chassis_tsa_status.return_value = "false"
     res = m.set_handler("STATE", {"tsa_enabled": "true"})
     assert res, "Expect True return value for set_handler"
     mocked_log_info.assert_called_with("DeviceGlobalCfgMgr::Done")
     assert m.cfg_mgr.get_config() == get_string_from_file("/result_all_isolate.conf")
 
+    curr_cfg = m.cfg_mgr.get_config()
+    mock_get_chassis_tsa_status.return_value = "true"
+    res = m.set_handler("STATE", {"tsa_enabled": "true"})
+    assert res, "Expect True return value for set_handler"
+    assert m.cfg_mgr.get_config() == curr_cfg
+
+
 @patch('bgpcfgd.managers_device_global.log_debug')
 def test_idf_isolation_no_export(mocked_log_info): 
     m = constructor()
@@ -88,44 +98,89 @@ def test_idf_unisolation(mocked_log_info):
     mocked_log_info.assert_called_with("DeviceGlobalCfgMgr::Done")
     assert m.cfg_mgr.get_config() == get_string_from_file("/result_all_idf_unisolated.conf")
 
+@patch('bgpcfgd.managers_device_global.DeviceGlobalCfgMgr.get_chassis_tsa_status')
 @patch('bgpcfgd.managers_device_global.log_debug')
-def test_isolate_device_internal_session(mocked_log_info):
+def test_isolate_device_internal_session(mocked_log_info, mock_get_chassis_tsa_status):
     m = constructor(check_internal=True)
+
+    mock_get_chassis_tsa_status.return_value = "false"
     res = m.set_handler("STATE", {"tsa_enabled": "true"})
     assert res, "Expect True return value for set_handler"
     mocked_log_info.assert_called_with("DeviceGlobalCfgMgr::Done")
     assert m.cfg_mgr.get_config() == get_string_from_file("/result_chassis_packet_isolate.conf", INTERNAL_BASE_PATH)
 
+    curr_cfg = m.cfg_mgr.get_config()
+    mock_get_chassis_tsa_status.return_value = "true"
+    res = m.set_handler("STATE", {"tsa_enabled": "true"})
+    assert res, "Expect True return value for set_handler"
+    assert m.cfg_mgr.get_config() == curr_cfg
 
+
+@patch('bgpcfgd.managers_device_global.DeviceGlobalCfgMgr.get_chassis_tsa_status')
 @patch('bgpcfgd.managers_device_global.log_debug')
-def test_unisolate_device(mocked_log_info):
+def test_unisolate_device(mocked_log_info, mock_get_chassis_tsa_status):
     m = constructor()
+
+    mock_get_chassis_tsa_status.return_value = "false"
     m.directory.put(m.db_name, m.table_name, "tsa_enabled", "true")
+
     res = m.set_handler("STATE", {"tsa_enabled": "false"})
     assert res, "Expect True return value for set_handler"
     mocked_log_info.assert_called_with("DeviceGlobalCfgMgr::Done")
     assert m.cfg_mgr.get_config() == get_string_from_file("/result_all_unisolate.conf")
 
+    curr_cfg = m.cfg_mgr.get_config()
+    mock_get_chassis_tsa_status.return_value = "true"
+    res = m.set_handler("STATE", {"tsa_enabled": "false"})
+    assert res, "Expect True return value for set_handler"
+    assert m.cfg_mgr.get_config() == curr_cfg
+
+
+@patch('bgpcfgd.managers_device_global.DeviceGlobalCfgMgr.get_chassis_tsa_status')
 @patch('bgpcfgd.managers_device_global.log_debug')
-def test_unisolate_device_internal_session(mocked_log_info):
+def test_unisolate_device_internal_session(mocked_log_info, mock_get_chassis_tsa_status):
     m = constructor(check_internal=True)
+
+    mock_get_chassis_tsa_status.return_value = "false"
     m.directory.put(m.db_name, m.table_name, "tsa_enabled", "true")    
+
     res = m.set_handler("STATE", {"tsa_enabled": "false"})
     assert res, "Expect True return value for set_handler"
     mocked_log_info.assert_called_with("DeviceGlobalCfgMgr::Done")
     assert m.cfg_mgr.get_config() == get_string_from_file("/result_chassis_packet_unisolate.conf", INTERNAL_BASE_PATH)
 
+    curr_cfg = m.cfg_mgr.get_config()
+    mock_get_chassis_tsa_status.return_value = "true"
+    res = m.set_handler("STATE", {"tsa_enabled": "false"})
+    assert res, "Expect True return value for set_handler"
+    assert m.cfg_mgr.get_config() == curr_cfg
+
 
-def test_check_state_and_get_tsa_routemaps():
+@patch('bgpcfgd.managers_device_global.DeviceGlobalCfgMgr.get_chassis_tsa_status')
+def test_check_state_and_get_tsa_routemaps(mock_get_chassis_tsa_status):
     m = constructor()
+
+    mock_get_chassis_tsa_status.return_value = "false"
     m.set_handler("STATE", {"tsa_enabled": "true"})
     res = m.check_state_and_get_tsa_routemaps(m.cfg_mgr.get_config())
     assert res == get_string_from_file("/result_isolate.conf")
 
+    mock_get_chassis_tsa_status.return_value = "true"
+    m.set_handler("STATE", {"tsa_enabled": "true"})
+    res = m.check_state_and_get_tsa_routemaps(m.cfg_mgr.get_config())
+    assert res == get_string_from_file("/result_isolate.conf")
+
+    mock_get_chassis_tsa_status.return_value = "false"
     m.set_handler("STATE", {"tsa_enabled": "false"})
     res = m.check_state_and_get_tsa_routemaps(m.cfg_mgr.get_config())
     assert res == ""
 
+    mock_get_chassis_tsa_status.return_value = "true"
+    m.set_handler("STATE", {"tsa_enabled": "false"})
+    res = m.check_state_and_get_tsa_routemaps(m.cfg_mgr.get_config())
+    assert res == get_string_from_file("/result_isolate.conf")
+
+
 def test_check_state_and_get_idf_isolation_routemaps():
     m = constructor()
     m.set_handler("STATE", {"idf_isolation_state": "isolated_no_export"})

From 6a7aa29d89d90781b6ab0af0f1a29bd8176a14c8 Mon Sep 17 00:00:00 2001
From: saksarav-nokia <sakthivadivu.saravanaraj@nokia.com>
Date: Fri, 31 May 2024 12:58:55 -0400
Subject: [PATCH 0687/1115] [Nokia][Device] Add device files for fabric monitor
 feature and set linkscan interval for Ramon (#19144)

* [Nokia][Device] Add device files for fabric monitor feature and set linkscan interval for Ramon

* Enable fabric link monitoring by default
---------

Signed-off-by: saksarav <sakthivadivu.saravanaraj@nokia.com>
---
 .../fabric_monitor_config.json                |  10 +
 .../fabric_port_config.ini                    | 193 ++++++++++++++++++
 .../fabric_monitor_config.json                |  10 +
 .../fabric_port_config.ini                    | 193 ++++++++++++++++++
 .../0/config-ramon-1-0.bcm                    |   2 +-
 .../0/sai_postinit_cmd.soc                    |   1 +
 .../1/config-ramon-1-1.bcm                    |   2 +-
 .../1/sai_postinit_cmd.soc                    |   1 +
 .../10/config-ramon-6-0.bcm                   |   2 +-
 .../10/sai_postinit_cmd.soc                   |   1 +
 .../11/config-ramon-6-1.bcm                   |   2 +-
 .../11/sai_postinit_cmd.soc                   |   1 +
 .../12/config-ramon-7-0.bcm                   |   2 +-
 .../12/sai_postinit_cmd.soc                   |   1 +
 .../13/config-ramon-7-1.bcm                   |   2 +-
 .../13/sai_postinit_cmd.soc                   |   1 +
 .../14/config-ramon-8-0.bcm                   |   2 +-
 .../14/sai_postinit_cmd.soc                   |   1 +
 .../15/config-ramon-8-1.bcm                   |   2 +-
 .../15/sai_postinit_cmd.soc                   |   1 +
 .../2/config-ramon-2-0.bcm                    |   2 +-
 .../2/sai_postinit_cmd.soc                    |   1 +
 .../3/config-ramon-2-1.bcm                    |   2 +-
 .../3/sai_postinit_cmd.soc                    |   1 +
 .../4/config-ramon-3-0.bcm                    |   2 +-
 .../4/sai_postinit_cmd.soc                    |   1 +
 .../5/config-ramon-3-1.bcm                    |   2 +-
 .../5/sai_postinit_cmd.soc                    |   1 +
 .../6/config-ramon-4-0.bcm                    |   2 +-
 .../6/sai_postinit_cmd.soc                    |   1 +
 .../7/config-ramon-4-1.bcm                    |   2 +-
 .../7/sai_postinit_cmd.soc                    |   1 +
 .../8/config-ramon-5-0.bcm                    |   2 +-
 .../8/sai_postinit_cmd.soc                    |   1 +
 .../9/config-ramon-5-1.bcm                    |   2 +-
 .../9/sai_postinit_cmd.soc                    |   1 +
 .../fabric_monitor_config.json                |  10 +
 .../fabric_port_config.ini                    | 193 ++++++++++++++++++
 38 files changed, 641 insertions(+), 16 deletions(-)
 create mode 100644 device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/fabric_monitor_config.json
 create mode 100644 device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/fabric_port_config.ini
 create mode 100644 device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/fabric_monitor_config.json
 create mode 100644 device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/fabric_port_config.ini
 create mode 100644 device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/0/sai_postinit_cmd.soc
 create mode 100644 device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/1/sai_postinit_cmd.soc
 create mode 100644 device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/10/sai_postinit_cmd.soc
 create mode 100644 device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/11/sai_postinit_cmd.soc
 create mode 100644 device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/12/sai_postinit_cmd.soc
 create mode 100644 device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/13/sai_postinit_cmd.soc
 create mode 100644 device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/14/sai_postinit_cmd.soc
 create mode 100644 device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/15/sai_postinit_cmd.soc
 create mode 100644 device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/2/sai_postinit_cmd.soc
 create mode 100644 device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/3/sai_postinit_cmd.soc
 create mode 100644 device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/4/sai_postinit_cmd.soc
 create mode 100644 device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/5/sai_postinit_cmd.soc
 create mode 100644 device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/6/sai_postinit_cmd.soc
 create mode 100644 device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/7/sai_postinit_cmd.soc
 create mode 100644 device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/8/sai_postinit_cmd.soc
 create mode 100644 device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/9/sai_postinit_cmd.soc
 create mode 100644 device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/fabric_monitor_config.json
 create mode 100644 device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/fabric_port_config.ini

diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/fabric_monitor_config.json b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/fabric_monitor_config.json
new file mode 100644
index 000000000..2d641f92a
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/fabric_monitor_config.json
@@ -0,0 +1,10 @@
+{
+   "FABRIC_MONITOR_DATA": {
+      "monErrThreshCrcCells": 1,
+      "monErrThreshRxCells": 61035156,
+      "monPollThreshRecovery": 8,
+      "monPollThreshIsolation": 1,
+      "monCapacityThreshWarn": 85,
+      "monState": enable
+   }
+}
diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/fabric_port_config.ini b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/fabric_port_config.ini
new file mode 100644
index 000000000..1ffb084a1
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/fabric_port_config.ini
@@ -0,0 +1,193 @@
+# name              lanes     isolateStatus    forceUnisolateStatus
+Fabric0             0         False            0
+Fabric1             1         False            0
+Fabric2             2         False            0
+Fabric3             3         False            0
+Fabric4             4         False            0
+Fabric5             5         False            0
+Fabric6             6         False            0
+Fabric7             7         False            0
+Fabric8             8         False            0
+Fabric9             9         False            0
+Fabric10            10        False            0
+Fabric11            11        False            0
+Fabric12            12        False            0
+Fabric13            13        False            0
+Fabric14            14        False            0
+Fabric15            15        False            0
+Fabric16            16        False            0
+Fabric17            17        False            0
+Fabric18            18        False            0
+Fabric19            19        False            0
+Fabric20            20        False            0
+Fabric21            21        False            0
+Fabric22            22        False            0
+Fabric23            23        False            0
+Fabric24            24        False            0
+Fabric25            25        False            0
+Fabric26            26        False            0
+Fabric27            27        False            0
+Fabric28            28        False            0
+Fabric29            29        False            0
+Fabric30            30        False            0
+Fabric31            31        False            0
+Fabric32            32        False            0
+Fabric33            33        False            0
+Fabric34            34        False            0
+Fabric35            35        False            0
+Fabric36            36        False            0
+Fabric37            37        False            0
+Fabric38            38        False            0
+Fabric39            39        False            0
+Fabric40            40        False            0
+Fabric41            41        False            0
+Fabric42            42        False            0
+Fabric43            43        False            0
+Fabric44            44        False            0
+Fabric45            45        False            0
+Fabric46            46        False            0
+Fabric47            47        False            0
+Fabric48            48        False            0
+Fabric49            49        False            0
+Fabric50            50        False            0
+Fabric51            51        False            0
+Fabric52            52        False            0
+Fabric53            53        False            0
+Fabric54            54        False            0
+Fabric55            55        False            0
+Fabric56            56        False            0
+Fabric57            57        False            0
+Fabric58            58        False            0
+Fabric59            59        False            0
+Fabric60            60        False            0
+Fabric61            61        False            0
+Fabric62            62        False            0
+Fabric63            63        False            0
+Fabric64            64        False            0
+Fabric65            65        False            0
+Fabric66            66        False            0
+Fabric67            67        False            0
+Fabric68            68        False            0
+Fabric69            69        False            0
+Fabric70            70        False            0
+Fabric71            71        False            0
+Fabric72            72        False            0
+Fabric73            73        False            0
+Fabric74            74        False            0
+Fabric75            75        False            0
+Fabric76            76        False            0
+Fabric77            77        False            0
+Fabric78            78        False            0
+Fabric79            79        False            0
+Fabric80            80        False            0
+Fabric81            81        False            0
+Fabric82            82        False            0
+Fabric83            83        False            0
+Fabric84            84        False            0
+Fabric85            85        False            0
+Fabric86            86        False            0
+Fabric87            87        False            0
+Fabric88            88        False            0
+Fabric89            89        False            0
+Fabric90            90        False            0
+Fabric91            91        False            0
+Fabric92            92        False            0
+Fabric93            93        False            0
+Fabric94            94        False            0
+Fabric95            95        False            0
+Fabric96            96        False            0
+Fabric97            97        False            0
+Fabric98            98        False            0
+Fabric99            99        False            0
+Fabric100           100       False            0
+Fabric101           101       False            0
+Fabric102           102       False            0
+Fabric103           103       False            0
+Fabric104           104       False            0
+Fabric105           105       False            0
+Fabric106           106       False            0
+Fabric107           107       False            0
+Fabric108           108       False            0
+Fabric109           109       False            0
+Fabric110           110       False            0
+Fabric111           111       False            0
+Fabric112           112       False            0
+Fabric113           113       False            0
+Fabric114           114       False            0
+Fabric115           115       False            0
+Fabric116           116       False            0
+Fabric117           117       False            0
+Fabric118           118       False            0
+Fabric119           119       False            0
+Fabric120           120       False            0
+Fabric121           121       False            0
+Fabric122           122       False            0
+Fabric123           123       False            0
+Fabric124           124       False            0
+Fabric125           125       False            0
+Fabric126           126       False            0
+Fabric127           127       False            0
+Fabric128           128       False            0
+Fabric129           129       False            0
+Fabric130           130       False            0
+Fabric131           131       False            0
+Fabric132           132       False            0
+Fabric133           133       False            0
+Fabric134           134       False            0
+Fabric135           135       False            0
+Fabric136           136       False            0
+Fabric137           137       False            0
+Fabric138           138       False            0
+Fabric139           139       False            0
+Fabric140           140       False            0
+Fabric141           141       False            0
+Fabric142           142       False            0
+Fabric143           143       False            0
+Fabric144           144       False            0
+Fabric145           145       False            0
+Fabric146           146       False            0
+Fabric147           147       False            0
+Fabric148           148       False            0
+Fabric149           149       False            0
+Fabric150           150       False            0
+Fabric151           151       False            0
+Fabric152           152       False            0
+Fabric153           153       False            0
+Fabric154           154       False            0
+Fabric155           155       False            0
+Fabric156           156       False            0
+Fabric157           157       False            0
+Fabric158           158       False            0
+Fabric159           159       False            0
+Fabric160           160       False            0
+Fabric161           161       False            0
+Fabric162           162       False            0
+Fabric163           163       False            0
+Fabric164           164       False            0
+Fabric165           165       False            0
+Fabric166           166       False            0
+Fabric167           167       False            0
+Fabric168           168       False            0
+Fabric169           169       False            0
+Fabric170           170       False            0
+Fabric171           171       False            0
+Fabric172           172       False            0
+Fabric173           173       False            0
+Fabric174           174       False            0
+Fabric175           175       False            0
+Fabric176           176       False            0
+Fabric177           177       False            0
+Fabric178           178       False            0
+Fabric179           179       False            0
+Fabric180           180       False            0
+Fabric181           181       False            0
+Fabric182           182       False            0
+Fabric183           183       False            0
+Fabric184           184       False            0
+Fabric185           185       False            0
+Fabric186           186       False            0
+Fabric187           187       False            0
+Fabric188           188       False            0
+Fabric189           189       False            0
+Fabric190           190       False            0
+Fabric191           191       False            0
diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/fabric_monitor_config.json b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/fabric_monitor_config.json
new file mode 100644
index 000000000..2d641f92a
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/fabric_monitor_config.json
@@ -0,0 +1,10 @@
+{
+   "FABRIC_MONITOR_DATA": {
+      "monErrThreshCrcCells": 1,
+      "monErrThreshRxCells": 61035156,
+      "monPollThreshRecovery": 8,
+      "monPollThreshIsolation": 1,
+      "monCapacityThreshWarn": 85,
+      "monState": enable
+   }
+}
diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/fabric_port_config.ini b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/fabric_port_config.ini
new file mode 100644
index 000000000..1ffb084a1
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/fabric_port_config.ini
@@ -0,0 +1,193 @@
+# name              lanes     isolateStatus    forceUnisolateStatus
+Fabric0             0         False            0
+Fabric1             1         False            0
+Fabric2             2         False            0
+Fabric3             3         False            0
+Fabric4             4         False            0
+Fabric5             5         False            0
+Fabric6             6         False            0
+Fabric7             7         False            0
+Fabric8             8         False            0
+Fabric9             9         False            0
+Fabric10            10        False            0
+Fabric11            11        False            0
+Fabric12            12        False            0
+Fabric13            13        False            0
+Fabric14            14        False            0
+Fabric15            15        False            0
+Fabric16            16        False            0
+Fabric17            17        False            0
+Fabric18            18        False            0
+Fabric19            19        False            0
+Fabric20            20        False            0
+Fabric21            21        False            0
+Fabric22            22        False            0
+Fabric23            23        False            0
+Fabric24            24        False            0
+Fabric25            25        False            0
+Fabric26            26        False            0
+Fabric27            27        False            0
+Fabric28            28        False            0
+Fabric29            29        False            0
+Fabric30            30        False            0
+Fabric31            31        False            0
+Fabric32            32        False            0
+Fabric33            33        False            0
+Fabric34            34        False            0
+Fabric35            35        False            0
+Fabric36            36        False            0
+Fabric37            37        False            0
+Fabric38            38        False            0
+Fabric39            39        False            0
+Fabric40            40        False            0
+Fabric41            41        False            0
+Fabric42            42        False            0
+Fabric43            43        False            0
+Fabric44            44        False            0
+Fabric45            45        False            0
+Fabric46            46        False            0
+Fabric47            47        False            0
+Fabric48            48        False            0
+Fabric49            49        False            0
+Fabric50            50        False            0
+Fabric51            51        False            0
+Fabric52            52        False            0
+Fabric53            53        False            0
+Fabric54            54        False            0
+Fabric55            55        False            0
+Fabric56            56        False            0
+Fabric57            57        False            0
+Fabric58            58        False            0
+Fabric59            59        False            0
+Fabric60            60        False            0
+Fabric61            61        False            0
+Fabric62            62        False            0
+Fabric63            63        False            0
+Fabric64            64        False            0
+Fabric65            65        False            0
+Fabric66            66        False            0
+Fabric67            67        False            0
+Fabric68            68        False            0
+Fabric69            69        False            0
+Fabric70            70        False            0
+Fabric71            71        False            0
+Fabric72            72        False            0
+Fabric73            73        False            0
+Fabric74            74        False            0
+Fabric75            75        False            0
+Fabric76            76        False            0
+Fabric77            77        False            0
+Fabric78            78        False            0
+Fabric79            79        False            0
+Fabric80            80        False            0
+Fabric81            81        False            0
+Fabric82            82        False            0
+Fabric83            83        False            0
+Fabric84            84        False            0
+Fabric85            85        False            0
+Fabric86            86        False            0
+Fabric87            87        False            0
+Fabric88            88        False            0
+Fabric89            89        False            0
+Fabric90            90        False            0
+Fabric91            91        False            0
+Fabric92            92        False            0
+Fabric93            93        False            0
+Fabric94            94        False            0
+Fabric95            95        False            0
+Fabric96            96        False            0
+Fabric97            97        False            0
+Fabric98            98        False            0
+Fabric99            99        False            0
+Fabric100           100       False            0
+Fabric101           101       False            0
+Fabric102           102       False            0
+Fabric103           103       False            0
+Fabric104           104       False            0
+Fabric105           105       False            0
+Fabric106           106       False            0
+Fabric107           107       False            0
+Fabric108           108       False            0
+Fabric109           109       False            0
+Fabric110           110       False            0
+Fabric111           111       False            0
+Fabric112           112       False            0
+Fabric113           113       False            0
+Fabric114           114       False            0
+Fabric115           115       False            0
+Fabric116           116       False            0
+Fabric117           117       False            0
+Fabric118           118       False            0
+Fabric119           119       False            0
+Fabric120           120       False            0
+Fabric121           121       False            0
+Fabric122           122       False            0
+Fabric123           123       False            0
+Fabric124           124       False            0
+Fabric125           125       False            0
+Fabric126           126       False            0
+Fabric127           127       False            0
+Fabric128           128       False            0
+Fabric129           129       False            0
+Fabric130           130       False            0
+Fabric131           131       False            0
+Fabric132           132       False            0
+Fabric133           133       False            0
+Fabric134           134       False            0
+Fabric135           135       False            0
+Fabric136           136       False            0
+Fabric137           137       False            0
+Fabric138           138       False            0
+Fabric139           139       False            0
+Fabric140           140       False            0
+Fabric141           141       False            0
+Fabric142           142       False            0
+Fabric143           143       False            0
+Fabric144           144       False            0
+Fabric145           145       False            0
+Fabric146           146       False            0
+Fabric147           147       False            0
+Fabric148           148       False            0
+Fabric149           149       False            0
+Fabric150           150       False            0
+Fabric151           151       False            0
+Fabric152           152       False            0
+Fabric153           153       False            0
+Fabric154           154       False            0
+Fabric155           155       False            0
+Fabric156           156       False            0
+Fabric157           157       False            0
+Fabric158           158       False            0
+Fabric159           159       False            0
+Fabric160           160       False            0
+Fabric161           161       False            0
+Fabric162           162       False            0
+Fabric163           163       False            0
+Fabric164           164       False            0
+Fabric165           165       False            0
+Fabric166           166       False            0
+Fabric167           167       False            0
+Fabric168           168       False            0
+Fabric169           169       False            0
+Fabric170           170       False            0
+Fabric171           171       False            0
+Fabric172           172       False            0
+Fabric173           173       False            0
+Fabric174           174       False            0
+Fabric175           175       False            0
+Fabric176           176       False            0
+Fabric177           177       False            0
+Fabric178           178       False            0
+Fabric179           179       False            0
+Fabric180           180       False            0
+Fabric181           181       False            0
+Fabric182           182       False            0
+Fabric183           183       False            0
+Fabric184           184       False            0
+Fabric185           185       False            0
+Fabric186           186       False            0
+Fabric187           187       False            0
+Fabric188           188       False            0
+Fabric189           189       False            0
+Fabric190           190       False            0
+Fabric191           191       False            0
diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/0/config-ramon-1-0.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/0/config-ramon-1-0.bcm
index 4d84d93be..3ebf67393 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/0/config-ramon-1-0.bcm
+++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/0/config-ramon-1-0.bcm
@@ -1,7 +1,7 @@
 
 appl_enable_intr_init.BCM8879X=0
 appl_param_module_id.BCM8879X=1
-bcm_linkscan_interval.BCM8879X=0
+sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc
 bcm_stat_interval.BCM8879X=5000000
 bist_enable.BCM8879X=0
 core_clock_speed_khz.BCM8879X=1000000
diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/0/sai_postinit_cmd.soc b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/0/sai_postinit_cmd.soc
new file mode 100644
index 000000000..bc73c6b17
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/0/sai_postinit_cmd.soc
@@ -0,0 +1 @@
+linkscan interval=15000000
diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/1/config-ramon-1-1.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/1/config-ramon-1-1.bcm
index 8bbe2ff74..e4b15db2a 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/1/config-ramon-1-1.bcm
+++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/1/config-ramon-1-1.bcm
@@ -1,7 +1,7 @@
 
 appl_enable_intr_init.BCM8879X=0
 appl_param_module_id.BCM8879X=2
-bcm_linkscan_interval.BCM8879X=0
+sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc
 bcm_stat_interval.BCM8879X=5000000
 bist_enable.BCM8879X=0
 core_clock_speed_khz.BCM8879X=1000000
diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/1/sai_postinit_cmd.soc b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/1/sai_postinit_cmd.soc
new file mode 100644
index 000000000..bc73c6b17
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/1/sai_postinit_cmd.soc
@@ -0,0 +1 @@
+linkscan interval=15000000
diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/10/config-ramon-6-0.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/10/config-ramon-6-0.bcm
index 9f155988c..6bc3e88c9 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/10/config-ramon-6-0.bcm
+++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/10/config-ramon-6-0.bcm
@@ -1,7 +1,7 @@
 
 appl_enable_intr_init.BCM8879X=0
 appl_param_module_id.BCM8879X=11
-bcm_linkscan_interval.BCM8879X=0
+sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc
 bcm_stat_interval.BCM8879X=5000000
 bist_enable.BCM8879X=0
 core_clock_speed_khz.BCM8879X=1000000
diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/10/sai_postinit_cmd.soc b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/10/sai_postinit_cmd.soc
new file mode 100644
index 000000000..bc73c6b17
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/10/sai_postinit_cmd.soc
@@ -0,0 +1 @@
+linkscan interval=15000000
diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/11/config-ramon-6-1.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/11/config-ramon-6-1.bcm
index 915ecc077..6fcec3b66 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/11/config-ramon-6-1.bcm
+++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/11/config-ramon-6-1.bcm
@@ -1,7 +1,7 @@
 
 appl_enable_intr_init.BCM8879X=0
 appl_param_module_id.BCM8879X=12
-bcm_linkscan_interval.BCM8879X=0
+sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc
 bcm_stat_interval.BCM8879X=5000000
 bist_enable.BCM8879X=0
 core_clock_speed_khz.BCM8879X=1000000
diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/11/sai_postinit_cmd.soc b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/11/sai_postinit_cmd.soc
new file mode 100644
index 000000000..bc73c6b17
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/11/sai_postinit_cmd.soc
@@ -0,0 +1 @@
+linkscan interval=15000000
diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/12/config-ramon-7-0.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/12/config-ramon-7-0.bcm
index 131c55e93..2e0aedcc0 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/12/config-ramon-7-0.bcm
+++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/12/config-ramon-7-0.bcm
@@ -1,7 +1,7 @@
 
 appl_enable_intr_init.BCM8879X=0
 appl_param_module_id.BCM8879X=13
-bcm_linkscan_interval.BCM8879X=0
+sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc
 bcm_stat_interval.BCM8879X=5000000
 bist_enable.BCM8879X=0
 core_clock_speed_khz.BCM8879X=1000000
diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/12/sai_postinit_cmd.soc b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/12/sai_postinit_cmd.soc
new file mode 100644
index 000000000..bc73c6b17
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/12/sai_postinit_cmd.soc
@@ -0,0 +1 @@
+linkscan interval=15000000
diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/13/config-ramon-7-1.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/13/config-ramon-7-1.bcm
index 1096803ed..faea7ed71 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/13/config-ramon-7-1.bcm
+++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/13/config-ramon-7-1.bcm
@@ -1,7 +1,7 @@
 
 appl_enable_intr_init.BCM8879X=0
 appl_param_module_id.BCM8879X=14
-bcm_linkscan_interval.BCM8879X=0
+sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc
 bcm_stat_interval.BCM8879X=5000000
 bist_enable.BCM8879X=0
 core_clock_speed_khz.BCM8879X=1000000
diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/13/sai_postinit_cmd.soc b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/13/sai_postinit_cmd.soc
new file mode 100644
index 000000000..bc73c6b17
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/13/sai_postinit_cmd.soc
@@ -0,0 +1 @@
+linkscan interval=15000000
diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/14/config-ramon-8-0.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/14/config-ramon-8-0.bcm
index 455ae7eae..8a03f70e4 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/14/config-ramon-8-0.bcm
+++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/14/config-ramon-8-0.bcm
@@ -1,7 +1,7 @@
 
 appl_enable_intr_init.BCM8879X=0
 appl_param_module_id.BCM8879X=15
-bcm_linkscan_interval.BCM8879X=0
+sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc
 bcm_stat_interval.BCM8879X=5000000
 bist_enable.BCM8879X=0
 core_clock_speed_khz.BCM8879X=1000000
diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/14/sai_postinit_cmd.soc b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/14/sai_postinit_cmd.soc
new file mode 100644
index 000000000..bc73c6b17
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/14/sai_postinit_cmd.soc
@@ -0,0 +1 @@
+linkscan interval=15000000
diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/15/config-ramon-8-1.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/15/config-ramon-8-1.bcm
index ad2580fc9..94afa0bc1 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/15/config-ramon-8-1.bcm
+++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/15/config-ramon-8-1.bcm
@@ -1,7 +1,7 @@
 
 appl_enable_intr_init.BCM8879X=0
 appl_param_module_id.BCM8879X=16
-bcm_linkscan_interval.BCM8879X=0
+sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc
 bcm_stat_interval.BCM8879X=5000000
 bist_enable.BCM8879X=0
 core_clock_speed_khz.BCM8879X=1000000
diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/15/sai_postinit_cmd.soc b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/15/sai_postinit_cmd.soc
new file mode 100644
index 000000000..bc73c6b17
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/15/sai_postinit_cmd.soc
@@ -0,0 +1 @@
+linkscan interval=15000000
diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/2/config-ramon-2-0.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/2/config-ramon-2-0.bcm
index 21c777916..182fdc176 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/2/config-ramon-2-0.bcm
+++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/2/config-ramon-2-0.bcm
@@ -1,7 +1,7 @@
 
 appl_enable_intr_init.BCM8879X=0
 appl_param_module_id.BCM8879X=3
-bcm_linkscan_interval.BCM8879X=0
+sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc
 bcm_stat_interval.BCM8879X=5000000
 bist_enable.BCM8879X=0
 core_clock_speed_khz.BCM8879X=1000000
diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/2/sai_postinit_cmd.soc b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/2/sai_postinit_cmd.soc
new file mode 100644
index 000000000..bc73c6b17
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/2/sai_postinit_cmd.soc
@@ -0,0 +1 @@
+linkscan interval=15000000
diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/3/config-ramon-2-1.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/3/config-ramon-2-1.bcm
index 3509b6ef3..199a57b72 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/3/config-ramon-2-1.bcm
+++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/3/config-ramon-2-1.bcm
@@ -1,7 +1,7 @@
 
 appl_enable_intr_init.BCM8879X=0
 appl_param_module_id.BCM8879X=4
-bcm_linkscan_interval.BCM8879X=0
+sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc
 bcm_stat_interval.BCM8879X=5000000
 bist_enable.BCM8879X=0
 core_clock_speed_khz.BCM8879X=1000000
diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/3/sai_postinit_cmd.soc b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/3/sai_postinit_cmd.soc
new file mode 100644
index 000000000..bc73c6b17
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/3/sai_postinit_cmd.soc
@@ -0,0 +1 @@
+linkscan interval=15000000
diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/4/config-ramon-3-0.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/4/config-ramon-3-0.bcm
index f0be45c4d..dac08d72a 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/4/config-ramon-3-0.bcm
+++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/4/config-ramon-3-0.bcm
@@ -1,7 +1,7 @@
 
 appl_enable_intr_init.BCM8879X=0
 appl_param_module_id.BCM8879X=5
-bcm_linkscan_interval.BCM8879X=0
+sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc
 bcm_stat_interval.BCM8879X=5000000
 bist_enable.BCM8879X=0
 core_clock_speed_khz.BCM8879X=1000000
diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/4/sai_postinit_cmd.soc b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/4/sai_postinit_cmd.soc
new file mode 100644
index 000000000..bc73c6b17
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/4/sai_postinit_cmd.soc
@@ -0,0 +1 @@
+linkscan interval=15000000
diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/5/config-ramon-3-1.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/5/config-ramon-3-1.bcm
index 358f96344..d60d6a4f7 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/5/config-ramon-3-1.bcm
+++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/5/config-ramon-3-1.bcm
@@ -1,7 +1,7 @@
 
 appl_enable_intr_init.BCM8879X=0
 appl_param_module_id.BCM8879X=6
-bcm_linkscan_interval.BCM8879X=0
+sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc
 bcm_stat_interval.BCM8879X=5000000
 bist_enable.BCM8879X=0
 core_clock_speed_khz.BCM8879X=1000000
diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/5/sai_postinit_cmd.soc b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/5/sai_postinit_cmd.soc
new file mode 100644
index 000000000..bc73c6b17
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/5/sai_postinit_cmd.soc
@@ -0,0 +1 @@
+linkscan interval=15000000
diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/6/config-ramon-4-0.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/6/config-ramon-4-0.bcm
index c42441dbc..1b1932a99 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/6/config-ramon-4-0.bcm
+++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/6/config-ramon-4-0.bcm
@@ -1,7 +1,7 @@
 
 appl_enable_intr_init.BCM8879X=0
 appl_param_module_id.BCM8879X=7
-bcm_linkscan_interval.BCM8879X=0
+sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc
 bcm_stat_interval.BCM8879X=5000000
 bist_enable.BCM8879X=0
 core_clock_speed_khz.BCM8879X=1000000
diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/6/sai_postinit_cmd.soc b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/6/sai_postinit_cmd.soc
new file mode 100644
index 000000000..bc73c6b17
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/6/sai_postinit_cmd.soc
@@ -0,0 +1 @@
+linkscan interval=15000000
diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/7/config-ramon-4-1.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/7/config-ramon-4-1.bcm
index 761e75ccc..8f7adaaff 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/7/config-ramon-4-1.bcm
+++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/7/config-ramon-4-1.bcm
@@ -1,7 +1,7 @@
 
 appl_enable_intr_init.BCM8879X=0
 appl_param_module_id.BCM8879X=8
-bcm_linkscan_interval.BCM8879X=0
+sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc
 bcm_stat_interval.BCM8879X=5000000
 bist_enable.BCM8879X=0
 core_clock_speed_khz.BCM8879X=1000000
diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/7/sai_postinit_cmd.soc b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/7/sai_postinit_cmd.soc
new file mode 100644
index 000000000..bc73c6b17
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/7/sai_postinit_cmd.soc
@@ -0,0 +1 @@
+linkscan interval=15000000
diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/8/config-ramon-5-0.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/8/config-ramon-5-0.bcm
index 524a2f4b3..96ceaa6cf 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/8/config-ramon-5-0.bcm
+++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/8/config-ramon-5-0.bcm
@@ -1,7 +1,7 @@
 
 appl_enable_intr_init.BCM8879X=0
 appl_param_module_id.BCM8879X=9
-bcm_linkscan_interval.BCM8879X=0
+sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc
 bcm_stat_interval.BCM8879X=5000000
 bist_enable.BCM8879X=0
 core_clock_speed_khz.BCM8879X=1000000
diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/8/sai_postinit_cmd.soc b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/8/sai_postinit_cmd.soc
new file mode 100644
index 000000000..bc73c6b17
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/8/sai_postinit_cmd.soc
@@ -0,0 +1 @@
+linkscan interval=15000000
diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/9/config-ramon-5-1.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/9/config-ramon-5-1.bcm
index 289ffff95..abc566225 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/9/config-ramon-5-1.bcm
+++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/9/config-ramon-5-1.bcm
@@ -1,7 +1,7 @@
 
 appl_enable_intr_init.BCM8879X=0
 appl_param_module_id.BCM8879X=10
-bcm_linkscan_interval.BCM8879X=0
+sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc
 bcm_stat_interval.BCM8879X=5000000
 bist_enable.BCM8879X=0
 core_clock_speed_khz.BCM8879X=1000000
diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/9/sai_postinit_cmd.soc b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/9/sai_postinit_cmd.soc
new file mode 100644
index 000000000..bc73c6b17
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/9/sai_postinit_cmd.soc
@@ -0,0 +1 @@
+linkscan interval=15000000
diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/fabric_monitor_config.json b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/fabric_monitor_config.json
new file mode 100644
index 000000000..0476a2c15
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/fabric_monitor_config.json
@@ -0,0 +1,10 @@
+{
+   "FABRIC_MONITOR_DATA": {
+      "monErrThreshCrcCells": 1,
+      "monErrThreshRxCells": 61035156,
+      "monPollThreshRecovery": 8,
+      "monPollThreshIsolation": 1,
+      "monCapacityThreshWarn": 10,
+      "monState": enable
+   }
+}
diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/fabric_port_config.ini b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/fabric_port_config.ini
new file mode 100644
index 000000000..1ffb084a1
--- /dev/null
+++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/fabric_port_config.ini
@@ -0,0 +1,193 @@
+# name              lanes     isolateStatus    forceUnisolateStatus
+Fabric0             0         False            0
+Fabric1             1         False            0
+Fabric2             2         False            0
+Fabric3             3         False            0
+Fabric4             4         False            0
+Fabric5             5         False            0
+Fabric6             6         False            0
+Fabric7             7         False            0
+Fabric8             8         False            0
+Fabric9             9         False            0
+Fabric10            10        False            0
+Fabric11            11        False            0
+Fabric12            12        False            0
+Fabric13            13        False            0
+Fabric14            14        False            0
+Fabric15            15        False            0
+Fabric16            16        False            0
+Fabric17            17        False            0
+Fabric18            18        False            0
+Fabric19            19        False            0
+Fabric20            20        False            0
+Fabric21            21        False            0
+Fabric22            22        False            0
+Fabric23            23        False            0
+Fabric24            24        False            0
+Fabric25            25        False            0
+Fabric26            26        False            0
+Fabric27            27        False            0
+Fabric28            28        False            0
+Fabric29            29        False            0
+Fabric30            30        False            0
+Fabric31            31        False            0
+Fabric32            32        False            0
+Fabric33            33        False            0
+Fabric34            34        False            0
+Fabric35            35        False            0
+Fabric36            36        False            0
+Fabric37            37        False            0
+Fabric38            38        False            0
+Fabric39            39        False            0
+Fabric40            40        False            0
+Fabric41            41        False            0
+Fabric42            42        False            0
+Fabric43            43        False            0
+Fabric44            44        False            0
+Fabric45            45        False            0
+Fabric46            46        False            0
+Fabric47            47        False            0
+Fabric48            48        False            0
+Fabric49            49        False            0
+Fabric50            50        False            0
+Fabric51            51        False            0
+Fabric52            52        False            0
+Fabric53            53        False            0
+Fabric54            54        False            0
+Fabric55            55        False            0
+Fabric56            56        False            0
+Fabric57            57        False            0
+Fabric58            58        False            0
+Fabric59            59        False            0
+Fabric60            60        False            0
+Fabric61            61        False            0
+Fabric62            62        False            0
+Fabric63            63        False            0
+Fabric64            64        False            0
+Fabric65            65        False            0
+Fabric66            66        False            0
+Fabric67            67        False            0
+Fabric68            68        False            0
+Fabric69            69        False            0
+Fabric70            70        False            0
+Fabric71            71        False            0
+Fabric72            72        False            0
+Fabric73            73        False            0
+Fabric74            74        False            0
+Fabric75            75        False            0
+Fabric76            76        False            0
+Fabric77            77        False            0
+Fabric78            78        False            0
+Fabric79            79        False            0
+Fabric80            80        False            0
+Fabric81            81        False            0
+Fabric82            82        False            0
+Fabric83            83        False            0
+Fabric84            84        False            0
+Fabric85            85        False            0
+Fabric86            86        False            0
+Fabric87            87        False            0
+Fabric88            88        False            0
+Fabric89            89        False            0
+Fabric90            90        False            0
+Fabric91            91        False            0
+Fabric92            92        False            0
+Fabric93            93        False            0
+Fabric94            94        False            0
+Fabric95            95        False            0
+Fabric96            96        False            0
+Fabric97            97        False            0
+Fabric98            98        False            0
+Fabric99            99        False            0
+Fabric100           100       False            0
+Fabric101           101       False            0
+Fabric102           102       False            0
+Fabric103           103       False            0
+Fabric104           104       False            0
+Fabric105           105       False            0
+Fabric106           106       False            0
+Fabric107           107       False            0
+Fabric108           108       False            0
+Fabric109           109       False            0
+Fabric110           110       False            0
+Fabric111           111       False            0
+Fabric112           112       False            0
+Fabric113           113       False            0
+Fabric114           114       False            0
+Fabric115           115       False            0
+Fabric116           116       False            0
+Fabric117           117       False            0
+Fabric118           118       False            0
+Fabric119           119       False            0
+Fabric120           120       False            0
+Fabric121           121       False            0
+Fabric122           122       False            0
+Fabric123           123       False            0
+Fabric124           124       False            0
+Fabric125           125       False            0
+Fabric126           126       False            0
+Fabric127           127       False            0
+Fabric128           128       False            0
+Fabric129           129       False            0
+Fabric130           130       False            0
+Fabric131           131       False            0
+Fabric132           132       False            0
+Fabric133           133       False            0
+Fabric134           134       False            0
+Fabric135           135       False            0
+Fabric136           136       False            0
+Fabric137           137       False            0
+Fabric138           138       False            0
+Fabric139           139       False            0
+Fabric140           140       False            0
+Fabric141           141       False            0
+Fabric142           142       False            0
+Fabric143           143       False            0
+Fabric144           144       False            0
+Fabric145           145       False            0
+Fabric146           146       False            0
+Fabric147           147       False            0
+Fabric148           148       False            0
+Fabric149           149       False            0
+Fabric150           150       False            0
+Fabric151           151       False            0
+Fabric152           152       False            0
+Fabric153           153       False            0
+Fabric154           154       False            0
+Fabric155           155       False            0
+Fabric156           156       False            0
+Fabric157           157       False            0
+Fabric158           158       False            0
+Fabric159           159       False            0
+Fabric160           160       False            0
+Fabric161           161       False            0
+Fabric162           162       False            0
+Fabric163           163       False            0
+Fabric164           164       False            0
+Fabric165           165       False            0
+Fabric166           166       False            0
+Fabric167           167       False            0
+Fabric168           168       False            0
+Fabric169           169       False            0
+Fabric170           170       False            0
+Fabric171           171       False            0
+Fabric172           172       False            0
+Fabric173           173       False            0
+Fabric174           174       False            0
+Fabric175           175       False            0
+Fabric176           176       False            0
+Fabric177           177       False            0
+Fabric178           178       False            0
+Fabric179           179       False            0
+Fabric180           180       False            0
+Fabric181           181       False            0
+Fabric182           182       False            0
+Fabric183           183       False            0
+Fabric184           184       False            0
+Fabric185           185       False            0
+Fabric186           186       False            0
+Fabric187           187       False            0
+Fabric188           188       False            0
+Fabric189           189       False            0
+Fabric190           190       False            0
+Fabric191           191       False            0

From f182d140b1d2a1bfea6a3a480f1de44731718d82 Mon Sep 17 00:00:00 2001
From: jfeng-arista <98421150+jfeng-arista@users.noreply.github.com>
Date: Fri, 31 May 2024 09:59:58 -0700
Subject: [PATCH 0688/1115] Add monState field in config file so we can enable
 fabric link monitor (#19128)

The fabric link monitoring feature is disabled by default, and we need to issue CLI to enable it.
Before figuring out a more generic way of enable it by default, added a monState field in the fabric config file so we can enable the feature by default.
---
 .../Arista-7804R3-FM/fabric_monitor_config.json                | 3 ++-
 .../Arista-7808R3-FM/fabric_monitor_config.json                | 3 ++-
 .../Arista-7808R3A-FM/fabric_monitor_config.json               | 3 ++-
 .../Arista-7800R3-48CQ2-C48/fabric_monitor_config.json         | 3 ++-
 .../x86_64-arista_7800r3_48cq2_lc/fabric_monitor_config.json   | 3 ++-
 .../Arista-7800R3-48CQM2-C48/fabric_monitor_config.json        | 3 ++-
 .../x86_64-arista_7800r3_48cqm2_lc/fabric_monitor_config.json  | 3 ++-
 .../Arista-7800R3A-36D2-C36/fabric_monitor_config.json         | 3 ++-
 .../Arista-7800R3A-36D2-C72/fabric_monitor_config.json         | 3 ++-
 .../Arista-7800R3A-36D2-D36/fabric_monitor_config.json         | 3 ++-
 10 files changed, 20 insertions(+), 10 deletions(-)

diff --git a/device/arista/x86_64-arista_7800_sup/Arista-7804R3-FM/fabric_monitor_config.json b/device/arista/x86_64-arista_7800_sup/Arista-7804R3-FM/fabric_monitor_config.json
index 725eb9df5..0476a2c15 100644
--- a/device/arista/x86_64-arista_7800_sup/Arista-7804R3-FM/fabric_monitor_config.json
+++ b/device/arista/x86_64-arista_7800_sup/Arista-7804R3-FM/fabric_monitor_config.json
@@ -4,6 +4,7 @@
       "monErrThreshRxCells": 61035156,
       "monPollThreshRecovery": 8,
       "monPollThreshIsolation": 1,
-      "monCapacityThreshWarn": 10
+      "monCapacityThreshWarn": 10,
+      "monState": enable
    }
 }
diff --git a/device/arista/x86_64-arista_7800_sup/Arista-7808R3-FM/fabric_monitor_config.json b/device/arista/x86_64-arista_7800_sup/Arista-7808R3-FM/fabric_monitor_config.json
index 725eb9df5..0476a2c15 100644
--- a/device/arista/x86_64-arista_7800_sup/Arista-7808R3-FM/fabric_monitor_config.json
+++ b/device/arista/x86_64-arista_7800_sup/Arista-7808R3-FM/fabric_monitor_config.json
@@ -4,6 +4,7 @@
       "monErrThreshRxCells": 61035156,
       "monPollThreshRecovery": 8,
       "monPollThreshIsolation": 1,
-      "monCapacityThreshWarn": 10
+      "monCapacityThreshWarn": 10,
+      "monState": enable
    }
 }
diff --git a/device/arista/x86_64-arista_7800_sup/Arista-7808R3A-FM/fabric_monitor_config.json b/device/arista/x86_64-arista_7800_sup/Arista-7808R3A-FM/fabric_monitor_config.json
index 725eb9df5..0476a2c15 100644
--- a/device/arista/x86_64-arista_7800_sup/Arista-7808R3A-FM/fabric_monitor_config.json
+++ b/device/arista/x86_64-arista_7800_sup/Arista-7808R3A-FM/fabric_monitor_config.json
@@ -4,6 +4,7 @@
       "monErrThreshRxCells": 61035156,
       "monPollThreshRecovery": 8,
       "monPollThreshIsolation": 1,
-      "monCapacityThreshWarn": 10
+      "monCapacityThreshWarn": 10,
+      "monState": enable
    }
 }
diff --git a/device/arista/x86_64-arista_7800r3_48cq2_lc/Arista-7800R3-48CQ2-C48/fabric_monitor_config.json b/device/arista/x86_64-arista_7800r3_48cq2_lc/Arista-7800R3-48CQ2-C48/fabric_monitor_config.json
index 94def242e..f5a6ea72b 100644
--- a/device/arista/x86_64-arista_7800r3_48cq2_lc/Arista-7800R3-48CQ2-C48/fabric_monitor_config.json
+++ b/device/arista/x86_64-arista_7800r3_48cq2_lc/Arista-7800R3-48CQ2-C48/fabric_monitor_config.json
@@ -4,6 +4,7 @@
       "monErrThreshRxCells": 61035156,
       "monPollThreshRecovery": 8,
       "monPollThreshIsolation": 1,
-      "monCapacityThreshWarn": 86
+      "monCapacityThreshWarn": 86,
+      "monState": enable
    }
 }
diff --git a/device/arista/x86_64-arista_7800r3_48cq2_lc/fabric_monitor_config.json b/device/arista/x86_64-arista_7800r3_48cq2_lc/fabric_monitor_config.json
index 94def242e..f5a6ea72b 100644
--- a/device/arista/x86_64-arista_7800r3_48cq2_lc/fabric_monitor_config.json
+++ b/device/arista/x86_64-arista_7800r3_48cq2_lc/fabric_monitor_config.json
@@ -4,6 +4,7 @@
       "monErrThreshRxCells": 61035156,
       "monPollThreshRecovery": 8,
       "monPollThreshIsolation": 1,
-      "monCapacityThreshWarn": 86
+      "monCapacityThreshWarn": 86,
+      "monState": enable
    }
 }
diff --git a/device/arista/x86_64-arista_7800r3_48cqm2_lc/Arista-7800R3-48CQM2-C48/fabric_monitor_config.json b/device/arista/x86_64-arista_7800r3_48cqm2_lc/Arista-7800R3-48CQM2-C48/fabric_monitor_config.json
index 94def242e..f5a6ea72b 100644
--- a/device/arista/x86_64-arista_7800r3_48cqm2_lc/Arista-7800R3-48CQM2-C48/fabric_monitor_config.json
+++ b/device/arista/x86_64-arista_7800r3_48cqm2_lc/Arista-7800R3-48CQM2-C48/fabric_monitor_config.json
@@ -4,6 +4,7 @@
       "monErrThreshRxCells": 61035156,
       "monPollThreshRecovery": 8,
       "monPollThreshIsolation": 1,
-      "monCapacityThreshWarn": 86
+      "monCapacityThreshWarn": 86,
+      "monState": enable
    }
 }
diff --git a/device/arista/x86_64-arista_7800r3_48cqm2_lc/fabric_monitor_config.json b/device/arista/x86_64-arista_7800r3_48cqm2_lc/fabric_monitor_config.json
index 94def242e..f5a6ea72b 100644
--- a/device/arista/x86_64-arista_7800r3_48cqm2_lc/fabric_monitor_config.json
+++ b/device/arista/x86_64-arista_7800r3_48cqm2_lc/fabric_monitor_config.json
@@ -4,6 +4,7 @@
       "monErrThreshRxCells": 61035156,
       "monPollThreshRecovery": 8,
       "monPollThreshIsolation": 1,
-      "monCapacityThreshWarn": 86
+      "monCapacityThreshWarn": 86,
+      "monState": enable
    }
 }
diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/fabric_monitor_config.json b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/fabric_monitor_config.json
index 0f67504ca..f34b21d3f 100644
--- a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/fabric_monitor_config.json
+++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/fabric_monitor_config.json
@@ -4,6 +4,7 @@
       "monErrThreshRxCells": 61035156,
       "monPollThreshRecovery": 8,
       "monPollThreshIsolation": 1,
-      "monCapacityThreshWarn": 100
+      "monCapacityThreshWarn": 100,
+      "monState": enable
    }
 }
diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/fabric_monitor_config.json b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/fabric_monitor_config.json
index 94def242e..f5a6ea72b 100644
--- a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/fabric_monitor_config.json
+++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/fabric_monitor_config.json
@@ -4,6 +4,7 @@
       "monErrThreshRxCells": 61035156,
       "monPollThreshRecovery": 8,
       "monPollThreshIsolation": 1,
-      "monCapacityThreshWarn": 86
+      "monCapacityThreshWarn": 86,
+      "monState": enable
    }
 }
diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/fabric_monitor_config.json b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/fabric_monitor_config.json
index 0f67504ca..f34b21d3f 100644
--- a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/fabric_monitor_config.json
+++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/fabric_monitor_config.json
@@ -4,6 +4,7 @@
       "monErrThreshRxCells": 61035156,
       "monPollThreshRecovery": 8,
       "monPollThreshIsolation": 1,
-      "monCapacityThreshWarn": 100
+      "monCapacityThreshWarn": 100,
+      "monState": enable
    }
 }

From 510ebb075b51b271628996eae4df665fa304be88 Mon Sep 17 00:00:00 2001
From: "Marty Y. Lok" <76118573+mlok-nokia@users.noreply.github.com>
Date: Fri, 31 May 2024 16:49:09 -0400
Subject: [PATCH 0689/1115] [Nokia][supervisor] add linecard_reboot_timeout
 value to platform_env for Nokia-IXR7250E platform (#18862)

This PR add the platform specified linecard_reboot_timeout value to the platform_evn.conf. It works PR sonic-net/sonic-platform-daemons#480 and sonic-net/sonic-utilities#3292 to address issue #18540

Signed-off-by: mlok <marty.lok@nokia.com>
---
 device/nokia/x86_64-nokia_ixr7250e_sup-r0/platform_env.conf | 1 +
 1 file changed, 1 insertion(+)

diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/platform_env.conf b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/platform_env.conf
index d4a267afb..df041049b 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/platform_env.conf
+++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/platform_env.conf
@@ -2,3 +2,4 @@ usemsi=1
 dmasize=128M
 default_mtu=9100
 supervisor=1
+linecard_reboot_timeout=180

From b4c2ee0e5ce20b5aef6210d971f423cea5baa2c8 Mon Sep 17 00:00:00 2001
From: snider-nokia <76123698+snider-nokia@users.noreply.github.com>
Date: Fri, 31 May 2024 19:28:21 -0400
Subject: [PATCH 0690/1115] Support SAI native ASIC DRAM thermal sensor polling
 (#19141)

---
 .../nokia/x86_64-nokia_ixr7250e_36x400g-r0/platform.json  | 8 ++++----
 .../x86_64-nokia_ixr7250e_36x400g-r0/platform_ndk.json    | 4 ----
 platform/broadcom/sonic-platform-modules-nokia            | 2 +-
 3 files changed, 5 insertions(+), 9 deletions(-)

diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/platform.json b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/platform.json
index 3980c9964..ab881c4cc 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/platform.json
+++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/platform.json
@@ -68,11 +68,11 @@
 		"controllable": false
 	    },
 	    {
-	        "name": "ASIC0_dram-0x0",
+	        "name": "ASIC0_9--DRAM0",
 		"controllable": false
 	    },
 	    {
-	        "name": "ASIC0_dram-0x1",
+	        "name": "ASIC0_10--DRAM1",
 		"controllable": false
 	    },
 	    {
@@ -112,11 +112,11 @@
 		"controllable": false
 	    },
 	    {
-	        "name": "ASIC1_dram-0x0",
+	        "name": "ASIC1_9--DRAM0",
 		"controllable": false
 	    },
 	    {
-	        "name": "ASIC1_dram-0x1",
+	        "name": "ASIC1_10--DRAM1",
 		"controllable": false
 	    },
             {
diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/platform_ndk.json b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/platform_ndk.json
index 57bc959d7..1ff090c31 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/platform_ndk.json
+++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/platform_ndk.json
@@ -28,10 +28,6 @@
         "key": "sonic_bdb_mode",
         "intval": 0
     },
-    { 
-      "key": "update_asic_pvt",
-      "intval": 10
-    },
     {
       "key": "amd_pcon",
       "intval": 4
diff --git a/platform/broadcom/sonic-platform-modules-nokia b/platform/broadcom/sonic-platform-modules-nokia
index 20f82d014..87915b727 160000
--- a/platform/broadcom/sonic-platform-modules-nokia
+++ b/platform/broadcom/sonic-platform-modules-nokia
@@ -1 +1 @@
-Subproject commit 20f82d0144b4afb71389f82636ba0e98a09c07a6
+Subproject commit 87915b72714d4f76f3ff1359fea730385235954b

From ab08b78006d53f9536d0746434ffb632b1a39850 Mon Sep 17 00:00:00 2001
From: bingwang-ms <66248323+bingwang-ms@users.noreply.github.com>
Date: Mon, 3 Jun 2024 08:47:54 -0700
Subject: [PATCH 0691/1115] Revert "Reliable TSA implementation (#18928)"
 (#19173)

This reverts commit 9d5fb207593d83661e18603141735fd05f222327.
---
 dockers/docker-fpm-frr/base_image_files/TS    |  14 +-
 dockers/docker-fpm-frr/base_image_files/TSA   |  13 +-
 dockers/docker-fpm-frr/base_image_files/TSB   |  16 +-
 files/build_templates/docker_image_ctl.j2     |   8 -
 files/image_config/config-setup/config-setup  |   6 -
 src/sonic-bgpcfgd/bgpcfgd/main.py             |   2 -
 .../bgpcfgd/managers_chassis_app_db.py        |  50 ------
 .../bgpcfgd/managers_device_global.py         |  23 +--
 src/sonic-bgpcfgd/bgpcfgd/runner.py           |   5 +-
 .../tests/test_chassis_app_db.py              | 142 ------------------
 src/sonic-bgpcfgd/tests/test_device_global.py |  65 +-------
 11 files changed, 16 insertions(+), 328 deletions(-)
 delete mode 100644 src/sonic-bgpcfgd/bgpcfgd/managers_chassis_app_db.py
 delete mode 100644 src/sonic-bgpcfgd/tests/test_chassis_app_db.py

diff --git a/dockers/docker-fpm-frr/base_image_files/TS b/dockers/docker-fpm-frr/base_image_files/TS
index 948da490f..fcff1f806 100755
--- a/dockers/docker-fpm-frr/base_image_files/TS
+++ b/dockers/docker-fpm-frr/base_image_files/TS
@@ -6,23 +6,13 @@
 PLATFORM=${PLATFORM:-`sonic-cfggen -H -v DEVICE_METADATA.localhost.platform`}
 
 if [[ $1 == "TSA" ]]; then
-    TSA_CHASSIS_STATE="$(sonic-db-cli CHASSIS_APP_DB HGET "BGP_DEVICE_GLOBAL|STATE" tsa_enabled)"
     TSA_STATE_UPDATE='{"BGP_DEVICE_GLOBAL":{"STATE":{"tsa_enabled": "true"}}}'
-    if [[ $TSA_CHASSIS_STATE == true ]]; then
-        log_msg='System Mode: Maintenance -> Maintenance'
-    else
-        log_msg='System Mode: Normal -> Maintenance'
-    fi
+    log_msg='System Mode: Normal -> Maintenance'
     err_msg='System is already in Maintenance'
     desired_tsa_state=true 
 elif [[ $1 == "TSB" ]]; then
-    TSA_CHASSIS_STATE="$(sonic-db-cli CHASSIS_APP_DB HGET "BGP_DEVICE_GLOBAL|STATE" tsa_enabled)"
     TSA_STATE_UPDATE='{"BGP_DEVICE_GLOBAL":{"STATE":{"tsa_enabled": "false"}}}'
-    if [[ $TSA_CHASSIS_STATE == true ]]; then
-        log_msg='System Mode: Maintenance -> Maintenance'
-    else
-        log_msg='System Mode: Maintenance -> Normal'
-    fi
+    log_msg='System Mode: Maintenance -> Normal'
     err_msg='System is already in Normal mode'
     desired_tsa_state=false    
 fi
diff --git a/dockers/docker-fpm-frr/base_image_files/TSA b/dockers/docker-fpm-frr/base_image_files/TSA
index 2cd29e92a..4b26b2d43 100755
--- a/dockers/docker-fpm-frr/base_image_files/TSA
+++ b/dockers/docker-fpm-frr/base_image_files/TSA
@@ -7,18 +7,7 @@ if [ "$EUID" -ne 0 ] ; then
 fi
 
 if [ -f /etc/sonic/chassisdb.conf ]; then
-  CHASSIS_TSA_STATE_UPDATE="CHASSIS_APP_DB HMSET "BGP_DEVICE_GLOBAL\|STATE" tsa_enabled "true""
-  CONFIG_DB_TSA_STATE_UPDATE='{"BGP_DEVICE_GLOBAL":{"STATE":{"tsa_enabled": "true"}}}'
-  current_tsa_state="$(sonic-cfggen -d -v BGP_DEVICE_GLOBAL.STATE.tsa_enabled)"
-  if [[ $current_tsa_state  == true ]]; then
-    echo "Chassis is already in Maintenance"
-    logger -t TSA -p user.info "Chassis is already in Maintenance"
-  else
-    sonic-db-cli $CHASSIS_TSA_STATE_UPDATE
-    sonic-cfggen -a "$CONFIG_DB_TSA_STATE_UPDATE" -w
-    echo "Chassis Mode: Normal -> Maintenance"
-    logger -t TSA -p user.info "Chassis Mode: Normal -> Maintenance"
-  fi
+  rexec all -c "sudo TSA chassis"
   echo "Please execute \"rexec all -c 'sudo config save -y'\" to preserve System mode in Maintenance after reboot\
   or config reload on all linecards"
   exit 0
diff --git a/dockers/docker-fpm-frr/base_image_files/TSB b/dockers/docker-fpm-frr/base_image_files/TSB
index c09126e1d..ec353148a 100755
--- a/dockers/docker-fpm-frr/base_image_files/TSB
+++ b/dockers/docker-fpm-frr/base_image_files/TSB
@@ -6,21 +6,11 @@ if [ "$EUID" -ne 0 ] ; then
   exit 1
 fi
 
+# If run on supervisor of chassis, trigger remote execution of TSB on all linecards
 if [ -f /etc/sonic/chassisdb.conf ]; then
-  CHASSIS_TSA_STATE_UPDATE="CHASSIS_APP_DB HMSET "BGP_DEVICE_GLOBAL\|STATE" tsa_enabled "false""
-  CONFIG_DB_TSA_STATE_UPDATE='{"BGP_DEVICE_GLOBAL":{"STATE":{"tsa_enabled": "false"}}}'
-  current_tsa_state="$(sonic-cfggen -d -v BGP_DEVICE_GLOBAL.STATE.tsa_enabled)"
-  if [[ $current_tsa_state  == false ]]; then
-    echo "Chassis is already in Normal mode"
-    logger -t TSB -p user.info "Chassis is already in Normal mode"
-  else
-    sonic-db-cli $CHASSIS_TSA_STATE_UPDATE
-    sonic-cfggen -a "$CONFIG_DB_TSA_STATE_UPDATE" -w
-    echo "Chassis Mode: Maintenance -> Normal"
-    logger -t TSB -p user.info "Chassis Mode: Maintenance -> Normal"
-  fi
+  rexec all -c "sudo TSB chassis"
   echo "Please execute \"rexec all -c 'sudo config save -y'\" to preserve System mode in Normal state after reboot\
-  or config reload on all linecards"
+ or config reload on all linecards"
   exit 0
 fi
 
diff --git a/files/build_templates/docker_image_ctl.j2 b/files/build_templates/docker_image_ctl.j2
index 626c2de63..f0208d32f 100644
--- a/files/build_templates/docker_image_ctl.j2
+++ b/files/build_templates/docker_image_ctl.j2
@@ -269,14 +269,6 @@ function postStartAction()
             $SONIC_DB_CLI CONFIG_DB SET "CONFIG_DB_INITIALIZED" "1"
         fi
 
-        # In SUP, enforce CHASSIS_APP_DB.tsa_enabled to be in sync with BGP_DEVICE_GLOBAL.STATE.tsa_enabled
-        if [[ -z "$DEV" ]] && [[ -f /etc/sonic/chassisdb.conf ]]; then
-           tsa_cfg="$($SONIC_DB_CLI CONFIG_DB HGET "BGP_DEVICE_GLOBAL|STATE" "tsa_enabled")"
-           if [[ -n "$tsa_cfg" ]]; then
-              docker exec -i ${DOCKERNAME} $SONIC_DB_CLI CHASSIS_APP_DB HMSET "BGP_DEVICE_GLOBAL|STATE" tsa_enabled ${tsa_cfg}
-           fi
-        fi
-
         # Add redis UDS to the redis group and give read/write access to the group
         REDIS_SOCK="/var/run/redis${DEV}/redis.sock"
     else
diff --git a/files/image_config/config-setup/config-setup b/files/image_config/config-setup/config-setup
index f66409913..21d56217c 100755
--- a/files/image_config/config-setup/config-setup
+++ b/files/image_config/config-setup/config-setup
@@ -330,12 +330,6 @@ do_db_migration()
         /usr/local/bin/db_migrator.py -o migrate
     fi
     sonic-db-cli CONFIG_DB SET "CONFIG_DB_INITIALIZED" "1"
-    #Enforce CHASSIS_APP_DB.tsa_enabled to be in sync with BGP_DEVICE_GLOBAL.STATE.tsa_enabled
-
-    if [[ -f /etc/sonic/chassisdb.conf ]]; then
-       tsa_cfg="$(sonic-db-cli CONFIG_DB HGET "BGP_DEVICE_GLOBAL|STATE" "tsa_enabled")"
-       sonic-db-cli CHASSIS_APP_DB HMSET "BGP_DEVICE_GLOBAL|STATE" tsa_enabled ${tsa_cfg}
-    fi
 }
 
 # Perform configuration migration from backup copy.
diff --git a/src/sonic-bgpcfgd/bgpcfgd/main.py b/src/sonic-bgpcfgd/bgpcfgd/main.py
index b6580ab91..624d31103 100644
--- a/src/sonic-bgpcfgd/bgpcfgd/main.py
+++ b/src/sonic-bgpcfgd/bgpcfgd/main.py
@@ -20,7 +20,6 @@
 from .managers_static_rt import StaticRouteMgr
 from .managers_rm import RouteMapMgr
 from .managers_device_global import DeviceGlobalCfgMgr
-from .managers_chassis_app_db import ChassisAppDbMgr
 from .static_rt_timer import StaticRouteTimer
 from .runner import Runner, signal_handler
 from .template import TemplateFabric
@@ -74,7 +73,6 @@ def do_work():
         RouteMapMgr(common_objs, "APPL_DB", swsscommon.APP_BGP_PROFILE_TABLE_NAME),
         # Device Global Manager
         DeviceGlobalCfgMgr(common_objs, "CONFIG_DB", swsscommon.CFG_BGP_DEVICE_GLOBAL_TABLE_NAME),
-        ChassisAppDbMgr(common_objs, "CHASSIS_APP_DB", "BGP_DEVICE_GLOBAL"),
     ]
     runner = Runner(common_objs['cfg_mgr'])
     for mgr in managers:
diff --git a/src/sonic-bgpcfgd/bgpcfgd/managers_chassis_app_db.py b/src/sonic-bgpcfgd/bgpcfgd/managers_chassis_app_db.py
deleted file mode 100644
index 7969ae828..000000000
--- a/src/sonic-bgpcfgd/bgpcfgd/managers_chassis_app_db.py
+++ /dev/null
@@ -1,50 +0,0 @@
-from .manager import Manager
-from .managers_device_global import DeviceGlobalCfgMgr
-from .log import log_err, log_debug, log_notice
-import re
-from swsscommon import swsscommon
-
-class ChassisAppDbMgr(Manager):
-    """This class responds to change in tsa_enabled state of the supervisor"""
-
-    def __init__(self, common_objs, db, table):
-        """
-        Initialize the object
-        :param common_objs: common object dictionary
-        :param db: name of the db
-        :param table: name of the table in the db
-        """
-        self.lc_tsa = ""
-        self.directory = common_objs['directory']
-        self.dev_cfg_mgr = DeviceGlobalCfgMgr(common_objs, "CONFIG_DB", swsscommon.CFG_BGP_DEVICE_GLOBAL_TABLE_NAME)
-        self.directory.subscribe([("CONFIG_DB", swsscommon.CFG_BGP_DEVICE_GLOBAL_TABLE_NAME, "tsa_enabled"),], self.on_lc_tsa_status_change)
-        super(ChassisAppDbMgr, self).__init__(
-            common_objs,
-            [],
-            db,
-            table,
-        )
-
-    def on_lc_tsa_status_change(self):
-        if self.directory.path_exist("CONFIG_DB", swsscommon.CFG_BGP_DEVICE_GLOBAL_TABLE_NAME, "tsa_enabled"):
-            self.lc_tsa = self.directory.get_slot("CONFIG_DB", swsscommon.CFG_BGP_DEVICE_GLOBAL_TABLE_NAME)["tsa_enabled"]
-        log_debug("ChassisAppDbMgr:: LC TSA update handler status %s" % self.lc_tsa)
-
-    def set_handler(self, key, data):
-        log_debug("ChassisAppDbMgr:: set handler")
-
-        if not data:
-            log_err("ChassisAppDbMgr:: data is None")
-            return False
-
-        if "tsa_enabled" in data:
-            if self.lc_tsa == "false":
-                self.dev_cfg_mgr.cfg_mgr.commit()
-                self.dev_cfg_mgr.cfg_mgr.update()
-                self.dev_cfg_mgr.isolate_unisolate_device(data["tsa_enabled"])
-            return True
-        return False
-
-    def del_handler(self, key):
-        log_debug("ChassisAppDbMgr:: del handler")
-        return True
diff --git a/src/sonic-bgpcfgd/bgpcfgd/managers_device_global.py b/src/sonic-bgpcfgd/bgpcfgd/managers_device_global.py
index 639624128..5c42e4415 100644
--- a/src/sonic-bgpcfgd/bgpcfgd/managers_device_global.py
+++ b/src/sonic-bgpcfgd/bgpcfgd/managers_device_global.py
@@ -14,7 +14,6 @@ def __init__(self, common_objs, db, table):
         :param table: name of the table in the db
         """
         self.switch_type = ""
-        self.chassis_tsa = ""
         self.directory = common_objs['directory']
         self.cfg_mgr = common_objs['cfg_mgr']
         self.constants = common_objs['constants']
@@ -55,13 +54,12 @@ def set_handler(self, key, data):
 
         if "tsa_enabled" in data:
             self.directory.put(self.db_name, self.table_name, "tsa_enabled", data["tsa_enabled"])
-
-            self.chassis_tsa = self.get_chassis_tsa_status()
-            if self.chassis_tsa == "false" and tsa_status != data["tsa_enabled"]:
+            if tsa_status != data["tsa_enabled"]:
                 self.cfg_mgr.commit()
                 self.cfg_mgr.update()
                 self.isolate_unisolate_device(data["tsa_enabled"])
 
+            
         if "idf_isolation_state" in data:
             self.directory.put(self.db_name, self.table_name, "idf_isolation_state", data["idf_isolation_state"])
             if idf_isolation_state != data["idf_isolation_state"]:
@@ -81,9 +79,7 @@ def check_state_and_get_tsa_routemaps(self, cfg):
         cmd = ""
         if self.directory.path_exist("CONFIG_DB", swsscommon.CFG_BGP_DEVICE_GLOBAL_TABLE_NAME, "tsa_enabled"):
             tsa_status = self.directory.get_slot("CONFIG_DB", swsscommon.CFG_BGP_DEVICE_GLOBAL_TABLE_NAME)["tsa_enabled"]
-            chassis_tsa = self.get_chassis_tsa_status()
-
-            if tsa_status == "true" or chassis_tsa == "true":
+            if tsa_status == "true":
                 cmds = cfg.replace("#012", "\n").split("\n")
                 log_notice("DeviceGlobalCfgMgr:: Device is isolated. Applying TSA route-maps")
                 cmd = self.get_ts_routemaps(cmds, self.tsa_template)
@@ -137,17 +133,6 @@ def __extract_out_route_map_names(self, cmds):
                 route_map_names.add(result.group(1))
         return route_map_names
 
-    def get_chassis_tsa_status(self):
-        chassis_tsa_status = "false"
-        try:
-            ch = swsscommon.SonicV2Connector(use_unix_socket_path=False)
-            ch.connect(ch.CHASSIS_APP_DB, False)
-            chassis_tsa_status = ch.get(ch.CHASSIS_APP_DB, "BGP_DEVICE_GLOBAL|STATE", 'tsa_enabled')
-        except Exception:
-            pass
-
-        return chassis_tsa_status
-
     def downstream_isolate_unisolate(self, idf_isolation_state):
         cmd = "\n"
         if idf_isolation_state == "unisolated":
@@ -168,4 +153,4 @@ def check_state_and_get_idf_isolation_routemaps(self):
             if idf_isolation_state != "unisolated":                
                 log_notice("DeviceGlobalCfgMgr:: IDF is isolated. Applying required route-maps")
                 cmd = self.idf_isolate_template.render(isolation_status=idf_isolation_state, constants=self.constants)           
-        return cmd
+        return cmd
\ No newline at end of file
diff --git a/src/sonic-bgpcfgd/bgpcfgd/runner.py b/src/sonic-bgpcfgd/bgpcfgd/runner.py
index 75df6f902..4c160e596 100644
--- a/src/sonic-bgpcfgd/bgpcfgd/runner.py
+++ b/src/sonic-bgpcfgd/bgpcfgd/runner.py
@@ -39,10 +39,7 @@ def add_manager(self, manager):
         table_name = manager.get_table_name()
         db = swsscommon.SonicDBConfig.getDbId(db_name)
         if db not in self.db_connectors:
-            if db_name == "CHASSIS_APP_DB":
-                self.db_connectors[db] = swsscommon.DBConnector(db_name, 0, True, '')
-            else:
-                self.db_connectors[db] = swsscommon.DBConnector(db_name, 0)
+            self.db_connectors[db] = swsscommon.DBConnector(db_name, 0)
 
         if table_name not in self.callbacks[db]:
             conn = self.db_connectors[db]
diff --git a/src/sonic-bgpcfgd/tests/test_chassis_app_db.py b/src/sonic-bgpcfgd/tests/test_chassis_app_db.py
deleted file mode 100644
index edb08595a..000000000
--- a/src/sonic-bgpcfgd/tests/test_chassis_app_db.py
+++ /dev/null
@@ -1,142 +0,0 @@
-from unittest.mock import MagicMock, patch
-
-import os
-from bgpcfgd.directory import Directory
-from bgpcfgd.template import TemplateFabric
-from . import swsscommon_test
-from .util import load_constants
-import bgpcfgd.managers_chassis_app_db
-import bgpcfgd.managers_device_global
-from swsscommon import swsscommon
-from copy import deepcopy
-
-TEMPLATE_PATH = os.path.abspath('../../dockers/docker-fpm-frr/frr')
-BASE_PATH = os.path.abspath('../sonic-bgpcfgd/tests/data/general/peer-group.conf/')
-INTERNAL_BASE_PATH = os.path.abspath('../sonic-bgpcfgd/tests/data/internal/peer-group.conf/')
-global_constants = {
-    "bgp":  {
-        "traffic_shift_community" :"12345:12345",
-        "internal_community_match_tag" : "1001"
-    }
-}
-
-def constructor(check_internal=False):
-    cfg_mgr = MagicMock()
-    def get_text():
-        text = []
-        for line in cfg_mgr.changes.split('\n'):
-            if line.lstrip().startswith('!'):
-                continue
-            text.append(line)
-        text += ["     "]
-        return text
-    def update():
-        if check_internal:
-            cfg_mgr.changes = get_string_from_file("/result_chasiss_packet.conf", INTERNAL_BASE_PATH)
-        else:
-            cfg_mgr.changes = get_string_from_file("/result_all.conf")
-    def push(cfg):
-        cfg_mgr.changes += cfg + "\n"
-    def get_config():
-        return cfg_mgr.changes
-    cfg_mgr.get_text = get_text
-    cfg_mgr.update = update
-    cfg_mgr.push = push
-    cfg_mgr.get_config = get_config
-
-    constants = deepcopy(global_constants)
-    common_objs = {
-        'directory': Directory(),
-        'cfg_mgr':   cfg_mgr,
-        'tf':        TemplateFabric(TEMPLATE_PATH),
-        'constants': constants
-    }
-    mgr = bgpcfgd.managers_chassis_app_db.ChassisAppDbMgr(common_objs, "CHASSIS_APP_DB", "BGP_DEVICE_GLOBAL")
-    cfg_mgr.update()
-    return mgr
-
-
-@patch('bgpcfgd.managers_device_global.log_debug')
-def test_isolate_device(mocked_log_info):
-    m = constructor()
-
-    m.lc_tsa = "false"
-    res = m.set_handler("STATE", {"tsa_enabled": "true"})
-    assert res, "Expect True return value for set_handler"
-    mocked_log_info.assert_called_with("DeviceGlobalCfgMgr::Done")
-    assert m.cfg_mgr.get_config() == get_string_from_file("/result_all_isolate.conf")
-
-    curr_cfg = m.cfg_mgr.get_config()
-    m.lc_tsa = "true"
-    res = m.set_handler("STATE", {"tsa_enabled": "true"})
-    assert res, "Expect True return value for set_handler"
-    assert m.cfg_mgr.get_config() == curr_cfg
-
-@patch('bgpcfgd.managers_device_global.log_debug')
-def test_isolate_device_internal_session(mocked_log_info):
-    m = constructor(check_internal=True)
-
-    m.lc_tsa = "false"
-    res = m.set_handler("STATE", {"tsa_enabled": "true"})
-    assert res, "Expect True return value for set_handler"
-    mocked_log_info.assert_called_with("DeviceGlobalCfgMgr::Done")
-    assert m.cfg_mgr.get_config() == get_string_from_file("/result_chassis_packet_isolate.conf", INTERNAL_BASE_PATH)
-
-    curr_cfg = m.cfg_mgr.get_config()
-    m.lc_tsa = "true"
-    res = m.set_handler("STATE", {"tsa_enabled": "true"})
-    assert res, "Expect True return value for set_handler"
-    assert m.cfg_mgr.get_config() == curr_cfg
-
-
-@patch('bgpcfgd.managers_device_global.log_debug')
-def test_unisolate_device(mocked_log_info):
-    m = constructor()
-
-    m.lc_tsa = "false"
-    res = m.set_handler("STATE", {"tsa_enabled": "false"})
-    assert res, "Expect True return value for set_handler"
-    mocked_log_info.assert_called_with("DeviceGlobalCfgMgr::Done")
-    assert m.cfg_mgr.get_config() == get_string_from_file("/result_all_unisolate.conf")
-
-    curr_cfg = m.cfg_mgr.get_config()
-    m.lc_tsa = "true"
-    res = m.set_handler("STATE", {"tsa_enabled": "false"})
-    assert res, "Expect True return value for set_handler"
-    assert m.cfg_mgr.get_config() == curr_cfg
-
-@patch('bgpcfgd.managers_device_global.log_debug')
-def test_unisolate_device_internal_session(mocked_log_info):
-    m = constructor(check_internal=True)
-
-    m.lc_tsa = "false"
-    res = m.set_handler("STATE", {"tsa_enabled": "false"})
-    assert res, "Expect True return value for set_handler"
-    mocked_log_info.assert_called_with("DeviceGlobalCfgMgr::Done")
-    assert m.cfg_mgr.get_config() == get_string_from_file("/result_chassis_packet_unisolate.conf", INTERNAL_BASE_PATH)
-
-    curr_cfg = m.cfg_mgr.get_config()
-    m.lc_tsa = "true"
-    res = m.set_handler("STATE", {"tsa_enabled": "false"})
-    assert res, "Expect True return value for set_handler"
-    assert m.cfg_mgr.get_config() == curr_cfg
-
-
-def get_string_from_file(filename, base_path=BASE_PATH):
-    fp = open(base_path + filename, "r")
-    cfg = fp.read()
-    fp.close()
-
-    return cfg
-
-@patch('bgpcfgd.managers_chassis_app_db.log_err')
-def test_set_handler_failure_case(mocked_log_info):
-    m = constructor()
-    res = m.set_handler("STATE", {})
-    assert res == False, "Expect False return value for invalid data passed to set_handler"
-    mocked_log_info.assert_called_with("ChassisAppDbMgr:: data is None")
-
-def test_del_handler():
-    m = constructor()
-    res = m.del_handler("STATE")
-    assert res, "Expect True return value for del_handler"
diff --git a/src/sonic-bgpcfgd/tests/test_device_global.py b/src/sonic-bgpcfgd/tests/test_device_global.py
index bed0a3271..12dd895f5 100644
--- a/src/sonic-bgpcfgd/tests/test_device_global.py
+++ b/src/sonic-bgpcfgd/tests/test_device_global.py
@@ -55,24 +55,14 @@ def get_config():
     return mgr
 
 
-@patch('bgpcfgd.managers_device_global.DeviceGlobalCfgMgr.get_chassis_tsa_status')
 @patch('bgpcfgd.managers_device_global.log_debug')
-def test_isolate_device(mocked_log_info, mock_get_chassis_tsa_status):
+def test_isolate_device(mocked_log_info):
     m = constructor()
-
-    mock_get_chassis_tsa_status.return_value = "false"
     res = m.set_handler("STATE", {"tsa_enabled": "true"})
     assert res, "Expect True return value for set_handler"
     mocked_log_info.assert_called_with("DeviceGlobalCfgMgr::Done")
     assert m.cfg_mgr.get_config() == get_string_from_file("/result_all_isolate.conf")
 
-    curr_cfg = m.cfg_mgr.get_config()
-    mock_get_chassis_tsa_status.return_value = "true"
-    res = m.set_handler("STATE", {"tsa_enabled": "true"})
-    assert res, "Expect True return value for set_handler"
-    assert m.cfg_mgr.get_config() == curr_cfg
-
-
 @patch('bgpcfgd.managers_device_global.log_debug')
 def test_idf_isolation_no_export(mocked_log_info): 
     m = constructor()
@@ -98,89 +88,44 @@ def test_idf_unisolation(mocked_log_info):
     mocked_log_info.assert_called_with("DeviceGlobalCfgMgr::Done")
     assert m.cfg_mgr.get_config() == get_string_from_file("/result_all_idf_unisolated.conf")
 
-@patch('bgpcfgd.managers_device_global.DeviceGlobalCfgMgr.get_chassis_tsa_status')
 @patch('bgpcfgd.managers_device_global.log_debug')
-def test_isolate_device_internal_session(mocked_log_info, mock_get_chassis_tsa_status):
+def test_isolate_device_internal_session(mocked_log_info):
     m = constructor(check_internal=True)
-
-    mock_get_chassis_tsa_status.return_value = "false"
     res = m.set_handler("STATE", {"tsa_enabled": "true"})
     assert res, "Expect True return value for set_handler"
     mocked_log_info.assert_called_with("DeviceGlobalCfgMgr::Done")
     assert m.cfg_mgr.get_config() == get_string_from_file("/result_chassis_packet_isolate.conf", INTERNAL_BASE_PATH)
 
-    curr_cfg = m.cfg_mgr.get_config()
-    mock_get_chassis_tsa_status.return_value = "true"
-    res = m.set_handler("STATE", {"tsa_enabled": "true"})
-    assert res, "Expect True return value for set_handler"
-    assert m.cfg_mgr.get_config() == curr_cfg
 
-
-@patch('bgpcfgd.managers_device_global.DeviceGlobalCfgMgr.get_chassis_tsa_status')
 @patch('bgpcfgd.managers_device_global.log_debug')
-def test_unisolate_device(mocked_log_info, mock_get_chassis_tsa_status):
+def test_unisolate_device(mocked_log_info):
     m = constructor()
-
-    mock_get_chassis_tsa_status.return_value = "false"
     m.directory.put(m.db_name, m.table_name, "tsa_enabled", "true")
-
     res = m.set_handler("STATE", {"tsa_enabled": "false"})
     assert res, "Expect True return value for set_handler"
     mocked_log_info.assert_called_with("DeviceGlobalCfgMgr::Done")
     assert m.cfg_mgr.get_config() == get_string_from_file("/result_all_unisolate.conf")
 
-    curr_cfg = m.cfg_mgr.get_config()
-    mock_get_chassis_tsa_status.return_value = "true"
-    res = m.set_handler("STATE", {"tsa_enabled": "false"})
-    assert res, "Expect True return value for set_handler"
-    assert m.cfg_mgr.get_config() == curr_cfg
-
-
-@patch('bgpcfgd.managers_device_global.DeviceGlobalCfgMgr.get_chassis_tsa_status')
 @patch('bgpcfgd.managers_device_global.log_debug')
-def test_unisolate_device_internal_session(mocked_log_info, mock_get_chassis_tsa_status):
+def test_unisolate_device_internal_session(mocked_log_info):
     m = constructor(check_internal=True)
-
-    mock_get_chassis_tsa_status.return_value = "false"
     m.directory.put(m.db_name, m.table_name, "tsa_enabled", "true")    
-
     res = m.set_handler("STATE", {"tsa_enabled": "false"})
     assert res, "Expect True return value for set_handler"
     mocked_log_info.assert_called_with("DeviceGlobalCfgMgr::Done")
     assert m.cfg_mgr.get_config() == get_string_from_file("/result_chassis_packet_unisolate.conf", INTERNAL_BASE_PATH)
 
-    curr_cfg = m.cfg_mgr.get_config()
-    mock_get_chassis_tsa_status.return_value = "true"
-    res = m.set_handler("STATE", {"tsa_enabled": "false"})
-    assert res, "Expect True return value for set_handler"
-    assert m.cfg_mgr.get_config() == curr_cfg
-
 
-@patch('bgpcfgd.managers_device_global.DeviceGlobalCfgMgr.get_chassis_tsa_status')
-def test_check_state_and_get_tsa_routemaps(mock_get_chassis_tsa_status):
+def test_check_state_and_get_tsa_routemaps():
     m = constructor()
-
-    mock_get_chassis_tsa_status.return_value = "false"
     m.set_handler("STATE", {"tsa_enabled": "true"})
     res = m.check_state_and_get_tsa_routemaps(m.cfg_mgr.get_config())
     assert res == get_string_from_file("/result_isolate.conf")
 
-    mock_get_chassis_tsa_status.return_value = "true"
-    m.set_handler("STATE", {"tsa_enabled": "true"})
-    res = m.check_state_and_get_tsa_routemaps(m.cfg_mgr.get_config())
-    assert res == get_string_from_file("/result_isolate.conf")
-
-    mock_get_chassis_tsa_status.return_value = "false"
     m.set_handler("STATE", {"tsa_enabled": "false"})
     res = m.check_state_and_get_tsa_routemaps(m.cfg_mgr.get_config())
     assert res == ""
 
-    mock_get_chassis_tsa_status.return_value = "true"
-    m.set_handler("STATE", {"tsa_enabled": "false"})
-    res = m.check_state_and_get_tsa_routemaps(m.cfg_mgr.get_config())
-    assert res == get_string_from_file("/result_isolate.conf")
-
-
 def test_check_state_and_get_idf_isolation_routemaps():
     m = constructor()
     m.set_handler("STATE", {"idf_isolation_state": "isolated_no_export"})

From 9cbaf42f10a6843ec16c1c8a70c8cfa0853caf78 Mon Sep 17 00:00:00 2001
From: Hasan Naqvi <56742004+hasan-brcm@users.noreply.github.com>
Date: Mon, 3 Jun 2024 09:48:43 -0700
Subject: [PATCH 0692/1115] [Frr]: Frr bookworm upgrade (#18233)

Co-authored-by: Kalimuthu Velappan <kalimuthu.velappan@broadcom.com>
---
 dockers/docker-fpm-frr/Dockerfile.j2   |  2 +-
 rules/docker-fpm-frr.mk                | 10 +++++-----
 rules/libyang.mk                       |  3 ---
 src/sonic-bgpcfgd/tests/test_bbr.py    |  5 +++--
 src/sonic-bgpcfgd/tests/test_setsrc.py |  6 ++++--
 src/sonic-frr/Makefile                 |  3 +++
 6 files changed, 16 insertions(+), 13 deletions(-)

diff --git a/dockers/docker-fpm-frr/Dockerfile.j2 b/dockers/docker-fpm-frr/Dockerfile.j2
index d0cb32d02..b0dc413c8 100644
--- a/dockers/docker-fpm-frr/Dockerfile.j2
+++ b/dockers/docker-fpm-frr/Dockerfile.j2
@@ -1,5 +1,5 @@
 {% from "dockers/dockerfile-macros.j2" import install_debian_packages, install_python_wheels, copy_files %}
-FROM docker-swss-layer-bullseye-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}}
+FROM docker-swss-layer-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}}
 
 ARG docker_container_name
 ARG frr_user_uid
diff --git a/rules/docker-fpm-frr.mk b/rules/docker-fpm-frr.mk
index b866960d6..f3353e3a3 100644
--- a/rules/docker-fpm-frr.mk
+++ b/rules/docker-fpm-frr.mk
@@ -8,13 +8,13 @@ $(DOCKER_FPM_FRR)_PATH = $(DOCKERS_PATH)/$(DOCKER_FPM_FRR_STEM)
 $(DOCKER_FPM_FRR)_PYTHON_WHEELS += $(SONIC_BGPCFGD) $(SONIC_FRR_MGMT_FRAMEWORK)
 
 $(DOCKER_FPM_FRR)_DEPENDS += $(FRR) $(FRR_SNMP) $(SWSS) $(LIBYANG2) $(SONIC_RSYSLOG_PLUGIN)
-$(DOCKER_FPM_FRR)_DBG_DEPENDS = $($(DOCKER_SWSS_LAYER_BULLSEYE)_DBG_DEPENDS)
+$(DOCKER_FPM_FRR)_DBG_DEPENDS = $($(DOCKER_SWSS_LAYER_BOOKWORM)_DBG_DEPENDS)
 $(DOCKER_FPM_FRR)_DBG_DEPENDS += $(SWSS_DBG) $(LIBSWSSCOMMON_DBG) \
                                 $(FRR_DBG) $(FRR_SNMP_DBG) $(LIBYANG2_DBG) $(SONIC_RSYSLOG_PLUGIN)
 
-$(DOCKER_FPM_FRR)_DBG_IMAGE_PACKAGES = $($(DOCKER_SWSS_LAYER_BULLSEYE)_DBG_IMAGE_PACKAGES)
+$(DOCKER_FPM_FRR)_DBG_IMAGE_PACKAGES = $($(DOCKER_SWSS_LAYER_BOOKWORM)_DBG_IMAGE_PACKAGES)
 
-$(DOCKER_FPM_FRR)_LOAD_DOCKERS += $(DOCKER_SWSS_LAYER_BULLSEYE)
+$(DOCKER_FPM_FRR)_LOAD_DOCKERS += $(DOCKER_SWSS_LAYER_BOOKWORM)
 
 $(DOCKER_FPM_FRR)_VERSION = 1.0.0
 $(DOCKER_FPM_FRR)_PACKAGE_NAME = fpm-frr
@@ -42,5 +42,5 @@ $(DOCKER_FPM_FRR)_BASE_IMAGE_FILES += TSC:/usr/bin/TSC
 $(DOCKER_FPM_FRR)_BASE_IMAGE_FILES += TS:/usr/bin/TS
 $(DOCKER_FPM_FRR)_BASE_IMAGE_FILES += idf_isolation:/usr/bin/idf_isolation
 
-SONIC_BULLSEYE_DOCKERS += $(DOCKER_FPM_FRR)
-SONIC_BULLSEYE_DBG_DOCKERS += $(DOCKER_FPM_FRR_DBG)
+SONIC_BOOKWORM_DOCKERS += $(DOCKER_FPM_FRR)
+SONIC_BOOKWORM_DBG_DOCKERS += $(DOCKER_FPM_FRR_DBG)
diff --git a/rules/libyang.mk b/rules/libyang.mk
index 6f7483ee5..a8e673445 100644
--- a/rules/libyang.mk
+++ b/rules/libyang.mk
@@ -12,10 +12,7 @@ LIBYANG = libyang_$(LIBYANG_VERSION)_$(CONFIGURED_ARCH).deb
 $(LIBYANG)_SRC_PATH = $(SRC_PATH)/libyang
 # introduce artifical dependency between LIBYANG and FRR
 # make sure LIBYANG is compile after FRR
-# TODO: Remove once snmp build has been updated
-ifeq ($(BLDENV),bullseye)
 $(LIBYANG)_AFTER = $(FRR)
-endif
 SONIC_MAKE_DEBS += $(LIBYANG)
 
 LIBYANG_DEV = libyang-dev_$(LIBYANG_VERSION)_$(CONFIGURED_ARCH).deb
diff --git a/src/sonic-bgpcfgd/tests/test_bbr.py b/src/sonic-bgpcfgd/tests/test_bbr.py
index b11277bae..b95b94493 100644
--- a/src/sonic-bgpcfgd/tests/test_bbr.py
+++ b/src/sonic-bgpcfgd/tests/test_bbr.py
@@ -5,9 +5,10 @@
 from copy import deepcopy
 from . import swsscommon_test
 
+import sys
+sys.modules["swsscommon"] = swsscommon_test
 
-with patch.dict("sys.modules", swsscommon=swsscommon_test):
-    from bgpcfgd.managers_bbr import BBRMgr
+from bgpcfgd.managers_bbr import BBRMgr
 
 global_constants = {
     "bgp": {
diff --git a/src/sonic-bgpcfgd/tests/test_setsrc.py b/src/sonic-bgpcfgd/tests/test_setsrc.py
index 4de72102b..17d6ea96f 100644
--- a/src/sonic-bgpcfgd/tests/test_setsrc.py
+++ b/src/sonic-bgpcfgd/tests/test_setsrc.py
@@ -7,8 +7,10 @@
 from . import swsscommon_test
 from swsscommon import swsscommon
 
-with patch.dict("sys.modules", swsscommon=swsscommon_test):
-    from bgpcfgd.managers_setsrc import ZebraSetSrc
+import sys
+sys.modules["swsscommon"] = swsscommon_test
+
+from bgpcfgd.managers_setsrc import ZebraSetSrc
 
 TEMPLATE_PATH = os.path.abspath('../../dockers/docker-fpm-frr/frr')
 
diff --git a/src/sonic-frr/Makefile b/src/sonic-frr/Makefile
index 704786daa..c7c43ccec 100644
--- a/src/sonic-frr/Makefile
+++ b/src/sonic-frr/Makefile
@@ -7,6 +7,9 @@ DERIVED_TARGET = $(FRR_PYTHONTOOLS) $(FRR_DBG) $(FRR_SNMP) $(FRR_SNMP_DBG)
 SUFFIX = $(shell date +%Y%m%d\.%H%M%S)
 STG_BRANCH = stg_temp.$(SUFFIX)
 
+# DEBEMAIL required by gpb dch
+export DEBEMAIL := sonicproject@googlegroups.com
+
 $(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% :
 	# Build the package
 	pushd ./frr

From 9d9d843c950795be7e0cf5034aeb5935b66d1490 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Tue, 4 Jun 2024 19:01:08 +0800
Subject: [PATCH 0693/1115] [submodule] Update submodule sonic-restapi to the
 latest HEAD automatically (#19169)

#### Why I did it
src/sonic-restapi
```
* 4a564ba - (HEAD -> master, origin/master, origin/HEAD) Fix buster-backports debian mirror issue. (#152) (4 days ago) [Liu Shilong]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-restapi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-restapi b/src/sonic-restapi
index 24d440ff6..4a564badd 160000
--- a/src/sonic-restapi
+++ b/src/sonic-restapi
@@ -1 +1 @@
-Subproject commit 24d440ff6469432001a82be3e6f44579afcba395
+Subproject commit 4a564baddf7abe8fb904ed9fbb4f713954a84573

From 15e4976155bdfb594c5d1c94bc92371589ee42a3 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Tue, 4 Jun 2024 19:01:13 +0800
Subject: [PATCH 0694/1115] [submodule] Update submodule sonic-mgmt-common to
 the latest HEAD automatically (#19168)

#### Why I did it
src/sonic-mgmt-common
```
* 81bf799 - (HEAD -> master, origin/master, origin/HEAD) Adding subscription support for ethernet interfaces. (#140) (3 days ago) [Nikita Agarwal]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-mgmt-common | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-mgmt-common b/src/sonic-mgmt-common
index 8b1879532..81bf799d8 160000
--- a/src/sonic-mgmt-common
+++ b/src/sonic-mgmt-common
@@ -1 +1 @@
-Subproject commit 8b18795325b2b47f8863ab9497fa844501a2f08c
+Subproject commit 81bf799d8e346817ccd335dcd4da6258f8edd7f1

From f4fa96c215cafb6c19b3729c98c885d27675aae8 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Tue, 4 Jun 2024 19:01:18 +0800
Subject: [PATCH 0695/1115] [submodule] Update submodule sonic-host-services to
 the latest HEAD automatically (#19167)

#### Why I did it
src/sonic-host-services
```
* 29a04f5 - (HEAD -> master, origin/master, origin/HEAD) Add dbus service to support restart and kill process (#111) (4 days ago) [isabelmsft]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-host-services | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-host-services b/src/sonic-host-services
index 36e410d24..29a04f5bc 160000
--- a/src/sonic-host-services
+++ b/src/sonic-host-services
@@ -1 +1 @@
-Subproject commit 36e410d24e66ab717c3c83e95630436cc6efb729
+Subproject commit 29a04f5bc06fbb2772565d404d91e0452d229f19

From 359453e2412d9ee69f9114ac2b16591789692d33 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Tue, 4 Jun 2024 19:01:32 +0800
Subject: [PATCH 0696/1115] [submodule] Update submodule sonic-platform-daemons
 to the latest HEAD automatically (#19130)

#### Why I did it
src/sonic-platform-daemons
```
* 76cf1dc - (HEAD -> master, origin/master, origin/HEAD) Fix for #19116 [xcvrd] typo "log_notifce" results in port oper down (#493) (4 days ago) [Anoop Kamath]
* f41ecca - Implementation of a Monitoring Daemon for storage devices in SONiC switches (#433) (4 days ago) [Ashwin Srinivasan]
* 28302d4 - Update for the procedures for insertion/hot swap of Switch Fabric Module (SFM) by using "config chassis modules shutdown/startup" commands (#491) (5 days ago) [JunhongMao]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-platform-daemons | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-platform-daemons b/src/sonic-platform-daemons
index 9ffce2036..76cf1dc9f 160000
--- a/src/sonic-platform-daemons
+++ b/src/sonic-platform-daemons
@@ -1 +1 @@
-Subproject commit 9ffce2036d53571bd23b4a630ac285039e383c4f
+Subproject commit 76cf1dc9fd8fb609dbf071be7028c09b61c83815

From 99b31c22e00e8844985ca4abf08b6cb3eb3537c1 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Tue, 4 Jun 2024 19:01:37 +0800
Subject: [PATCH 0697/1115] [submodule] Update submodule sonic-gnmi to the
 latest HEAD automatically (#19129)

#### Why I did it
src/sonic-gnmi
```
* 50817e6 - (HEAD -> master, origin/master, origin/HEAD) Add KillProcess gNOI API (#213) (3 days ago) [isabelmsft]
* 3ea4fe5 - Revert "Account for GLOBAL key in PFC_WD (#178)" (#221) (5 days ago) [Zain Budhwani]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-gnmi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-gnmi b/src/sonic-gnmi
index 585f4419f..50817e697 160000
--- a/src/sonic-gnmi
+++ b/src/sonic-gnmi
@@ -1 +1 @@
-Subproject commit 585f4419f983b8d931121fdcb8acfe549bb06fba
+Subproject commit 50817e697d3c85abc8aac7d4a1565e003bf5159a

From 3bfbb15f16fc8aad953571d2561add22daabdbce Mon Sep 17 00:00:00 2001
From: Liu Shilong <shilongliu@microsoft.com>
Date: Tue, 4 Jun 2024 20:57:23 +0800
Subject: [PATCH 0698/1115] [ci] Fix false reference in docker slave build
 pipeline. #19188

Why I did it
When upgrade to bookworm container, this file is changed by mistake.
bookworm branch is out of date. It breaks pipeline to build sonic-slave-*.

Work item tracking
Microsoft ADO (number only): 28290170
How I did it
How to verify it
---
 .azure-pipelines/docker-sonic-slave.yml | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/.azure-pipelines/docker-sonic-slave.yml b/.azure-pipelines/docker-sonic-slave.yml
index 9633c32f6..9d8b30210 100644
--- a/.azure-pipelines/docker-sonic-slave.yml
+++ b/.azure-pipelines/docker-sonic-slave.yml
@@ -8,7 +8,7 @@ resources:
   - repository: buildimage
     type: github
     name: sonic-net/sonic-buildimage
-    ref: bookworm
+    ref: master
     endpoint: sonic-net
 
 schedules:

From f7d86153e5910927219c867ab45ba4f09dbb1fdb Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Tue, 4 Jun 2024 22:01:08 +0800
Subject: [PATCH 0699/1115] [submodule] Update submodule sonic-swss to the
 latest HEAD automatically (#19132)
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

#### Why I did it
src/sonic-swss
```
* 98012ed4 - (HEAD -> master, origin/master, origin/HEAD) [build-docker-sonic-vs] Allowing partial build for sairedis (#3177) (3 days ago) [Nikola Dancejic]
* 6568193c - Do not apply QoS mapping item on the switch until the object is created (#3163) (3 days ago) [Stephen Sun]
* 1876a306 - Revert "Added support for "UNDERLAY_SET_DSCP" and "UNDERLAY_SET_DSCPV6" table…" (#3175) (3 days ago) [Prince Sunny]
* 1f12a8db - [subnet decap] Add subnet decap rule based on overlay ECMP (#3153) (3 days ago) [Longxiang Lyu]
* 8e8fc66c - [ci] Migrate from sonicbld to sonicbld-1es to fix S360 alert. (#3171) (4 days ago) [Liu Shilong]
* 4ae8bfa3 - Read switch_id of fabric switch from config_db (#3102) (4 days ago) [Song Yuan]
* f7376636 - Add sai call to isolate/unisolate a fabric port (#3141) (4 days ago) [jfeng-arista]
* 7c7cece4 - [Chassis][voq] remote link down ECMP acceleration (#3150) (4 days ago) [Arvindsrinivasan Lakshmi Narasimhan]
* c7ecd7db - Add fabric port monitoring toggle check (#3132) (4 days ago) [jfeng-arista]
* 9ffbcd58 - Added support for "UNDERLAY_SET_DSCP" and "UNDERLAY_SET_DSCPV6" tables (#3145) (4 days ago) [siqbal1986]
* ef9dcdbe - Handle learning duplicate IPs on different VRFs (#3165) (5 days ago) [Lawrence Lee]
* cc5a02c4 - [ci] use sonictest instead of sonic-common-test #3170 (6 days ago) [Liu Shilong]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-swss | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-swss b/src/sonic-swss
index 835e576db..98012ed41 160000
--- a/src/sonic-swss
+++ b/src/sonic-swss
@@ -1 +1 @@
-Subproject commit 835e576dbaca4391277002f1856db629f91d783f
+Subproject commit 98012ed411d4e83ac01dabbb6d03e4f122ad1545

From f01becdd0d382af7f9e681d7dc3e8c0447f9d970 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Tue, 4 Jun 2024 22:01:16 +0800
Subject: [PATCH 0700/1115] [submodule] Update submodule sonic-swss-common to
 the latest HEAD automatically (#19121)

#### Why I did it
src/sonic-swss-common
```
* 391e27b - (HEAD -> master, origin/master, origin/HEAD) Add new table schema for BMP feature. (#879) (4 days ago) [Feng-msft]
* 138b32e - [swig]: Fix swig template memory leak on issue 17025 (#876) (6 days ago) [Ze Gan]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-swss-common | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-swss-common b/src/sonic-swss-common
index 3750752df..391e27bd6 160000
--- a/src/sonic-swss-common
+++ b/src/sonic-swss-common
@@ -1 +1 @@
-Subproject commit 3750752dfaf68d3d2cecf49ad77cdadde3c9a955
+Subproject commit 391e27bd6769fa64d483c2c67a1079c174f4975f

From c2d06ee77a6d114e8c6ef19d708f33ca1ca78395 Mon Sep 17 00:00:00 2001
From: Tomer Shalvi <116184476+tshalvi@users.noreply.github.com>
Date: Tue, 4 Jun 2024 17:18:52 +0300
Subject: [PATCH 0701/1115] [Mellanox] Validate Module Presence Via Sysfs
 Before Accessing EEPROM in Thermal Control Daemon (#19178)

- Why I did it
Currently, on Mellanox platforms, when trying to read from the EEPROM of an unplugged module from thermalctld, we get the following error:
ERR kernel: [ 2446.261799] sxd_kernel: [error] Failed to get module page valid, err: -5
We need to ensure the EEPROM is not accessed if a module is not connected.

- How I did it
I updated the logic of get_presence() to rely on the present/hw_present sysfs values and called get_presence() from within the relevant methods in thermalctld.

- How to verify it
Unplug a module and ensure the following error does not appear:
ERR kernel: [ 2446.261799] sxd_kernel: [error] Failed to get module page valid, err: -5
---
 .../mellanox/mlnx-platform-api/sonic_platform/sfp.py |  3 +++
 .../mlnx-platform-api/sonic_platform/thermal.py      |  6 ++++++
 .../mellanox/mlnx-platform-api/tests/test_sfp.py     | 12 ++++++++++--
 .../mellanox/mlnx-platform-api/tests/test_thermal.py |  9 +++++++++
 4 files changed, 28 insertions(+), 2 deletions(-)

diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py b/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py
index 7b21f22ca..58fe71b84 100644
--- a/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py
+++ b/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py
@@ -483,6 +483,9 @@ def get_presence(self):
         Returns:
             bool: True if device is present, False if not
         """
+        presence_sysfs = f'/sys/module/sx_core/asic0/module{self.sdk_index}/hw_present' if self.is_sw_control() else f'/sys/module/sx_core/asic0/module{self.sdk_index}/present'
+        if utils.read_int_from_file(presence_sysfs) != 1:
+            return False
         eeprom_raw = self._read_eeprom(0, 1, log_on_error=False)
         return eeprom_raw is not None
 
diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/thermal.py b/platform/mellanox/mlnx-platform-api/sonic_platform/thermal.py
index 7ac703b78..219fe2418 100644
--- a/platform/mellanox/mlnx-platform-api/sonic_platform/thermal.py
+++ b/platform/mellanox/mlnx-platform-api/sonic_platform/thermal.py
@@ -435,6 +435,8 @@ def get_temperature(self):
             A float number of current temperature in Celsius up to nearest thousandth
             of one degree Celsius, e.g. 30.125
         """
+        if not self.sfp.get_presence():
+            return None
         value = self.sfp.get_temperature()
         return value if (value != 0.0 and value is not None) else None
 
@@ -446,6 +448,8 @@ def get_high_threshold(self):
             A float number, the high threshold temperature of thermal in Celsius
             up to nearest thousandth of one degree Celsius, e.g. 30.125
         """
+        if not self.sfp.get_presence():
+            return None
         value = self.sfp.get_temperature_warning_threshold()
         return value if (value != 0.0 and value is not None) else None
 
@@ -457,6 +461,8 @@ def get_high_critical_threshold(self):
             A float number, the high critical threshold temperature of thermal in Celsius
             up to nearest thousandth of one degree Celsius, e.g. 30.125
         """
+        if not self.sfp.get_presence():
+            return None
         value = self.sfp.get_temperature_critical_threshold()
         return value if (value != 0.0 and value is not None) else None
 
diff --git a/platform/mellanox/mlnx-platform-api/tests/test_sfp.py b/platform/mellanox/mlnx-platform-api/tests/test_sfp.py
index 92f5d0d51..947736f36 100644
--- a/platform/mellanox/mlnx-platform-api/tests/test_sfp.py
+++ b/platform/mellanox/mlnx-platform-api/tests/test_sfp.py
@@ -247,15 +247,23 @@ def test_get_page_and_page_offset(self, mock_get_type_str, mock_eeprom_path, moc
         assert page == '/tmp/1/data'
         assert page_offset is 0
 
+    @mock.patch('sonic_platform.utils.read_int_from_file')
     @mock.patch('sonic_platform.sfp.SFP._read_eeprom')
-    def test_sfp_get_presence(self, mock_read):
+    def test_sfp_get_presence(self, mock_read, mock_read_int):
         sfp = SFP(0)
+
+        mock_read_int.return_value = 1
         mock_read.return_value = None
         assert not sfp.get_presence()
-
         mock_read.return_value = 0
         assert sfp.get_presence()
 
+        mock_read_int.return_value = 0
+        mock_read.return_value = None
+        assert not sfp.get_presence()
+        mock_read.return_value = 0
+        assert not sfp.get_presence()
+
     @mock.patch('sonic_platform.utils.read_int_from_file')
     def test_rj45_get_presence(self, mock_read_int):
         sfp = RJ45Port(0)
diff --git a/platform/mellanox/mlnx-platform-api/tests/test_thermal.py b/platform/mellanox/mlnx-platform-api/tests/test_thermal.py
index e17d91cb0..a92322264 100644
--- a/platform/mellanox/mlnx-platform-api/tests/test_thermal.py
+++ b/platform/mellanox/mlnx-platform-api/tests/test_thermal.py
@@ -159,12 +159,21 @@ def test_sfp_thermal(self):
         assert thermal.get_name() == rule['name'].format(start_index)
         assert thermal.get_position_in_parent() == 1
         assert thermal.is_replaceable() == False
+        sfp.get_presence = mock.MagicMock(return_value=True)
         sfp.get_temperature = mock.MagicMock(return_value=35.4)
         sfp.get_temperature_warning_threshold = mock.MagicMock(return_value=70)
         sfp.get_temperature_critical_threshold = mock.MagicMock(return_value=80)
         assert thermal.get_temperature() == 35.4
         assert thermal.get_high_threshold() == 70
         assert thermal.get_high_critical_threshold() == 80
+        sfp.get_presence = mock.MagicMock(return_value=False)
+        sfp.get_temperature = mock.MagicMock(return_value=35.4)
+        sfp.get_temperature_warning_threshold = mock.MagicMock(return_value=70)
+        sfp.get_temperature_critical_threshold = mock.MagicMock(return_value=80)
+        assert thermal.get_temperature() is None
+        assert thermal.get_high_threshold() is None
+        assert thermal.get_high_critical_threshold() is None
+        sfp.get_presence = mock.MagicMock(return_value=True)
         sfp.get_temperature = mock.MagicMock(return_value=0)
         sfp.get_temperature_warning_threshold = mock.MagicMock(return_value=0)
         sfp.get_temperature_critical_threshold = mock.MagicMock(return_value=None)

From 6d4a9159a6f1b838919c5a4f8d55c5facb306837 Mon Sep 17 00:00:00 2001
From: sophiek <skravitz@nvidia.com>
Date: Tue, 4 Jun 2024 18:30:13 +0300
Subject: [PATCH 0702/1115] [Mellanox] Changed platform summary to reflect HW
 revision from vpd_data (#19098)

- Why I did it
The command 'show platform summary' reflected the wrong HW revision.
In order to have the correct HW revision, we need to read it from vpd_data file that HW management provide.

- How I did it
Changed the source from which the HW revision is taken.
---
 .../sonic_platform/chassis.py                 |  45 +++++-----------
 .../mellanox/mlnx-platform-api/tests/dmi_file | Bin 96 -> 0 bytes
 .../mlnx-platform-api/tests/test_chassis.py   |  19 ++-----
 .../mlnx-platform-api/tests/vpd_data_file     |  51 ++++++++++++++++++
 4 files changed, 66 insertions(+), 49 deletions(-)
 delete mode 100644 platform/mellanox/mlnx-platform-api/tests/dmi_file
 create mode 100644 platform/mellanox/mlnx-platform-api/tests/vpd_data_file

diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/chassis.py b/platform/mellanox/mlnx-platform-api/sonic_platform/chassis.py
index 935a2fa5f..a616b28e0 100644
--- a/platform/mellanox/mlnx-platform-api/sonic_platform/chassis.py
+++ b/platform/mellanox/mlnx-platform-api/sonic_platform/chassis.py
@@ -41,22 +41,8 @@
 
 RJ45_TYPE = "RJ45"
 
-DMI_FILE = '/sys/firmware/dmi/entries/2-0/raw'
-DMI_HEADER_LEN = 15
-DMI_PRODUCT_NAME = "Product Name"
-DMI_MANUFACTURER = "Manufacturer"
-DMI_VERSION = "Version"
-DMI_SERIAL = "Serial Number"
-DMI_ASSET_TAG = "Asset Tag"
-DMI_LOC = "Location In Chassis"
-DMI_TABLE_MAP = {
-                    DMI_PRODUCT_NAME: 0,
-                    DMI_MANUFACTURER: 1,
-                    DMI_VERSION: 2,
-                    DMI_SERIAL: 3,
-                    DMI_ASSET_TAG: 4,
-                    DMI_LOC: 5
-                }
+VPD_DATA_FILE = "/var/run/hw-management/eeprom/vpd_data"
+REVISION = "REV"
 
 HWMGMT_SYSTEM_ROOT = '/var/run/hw-management/system/'
 
@@ -87,8 +73,8 @@ class Chassis(ChassisBase):
     def __init__(self):
         super(Chassis, self).__init__()
 
-        # Initialize DMI data
-        self.dmi_data = None
+        # Initialize vpd data
+        self.vpd_data = None
 
         # move the initialization of each components to their dedicated initializer
         # which will be called from platform
@@ -933,14 +919,14 @@ def get_revision(self):
         Returns:
             string: Revision value of device
         """
-        if self.dmi_data is None:
-            self.dmi_data = self._parse_dmi(DMI_FILE)
+        if not self.vpd_data:
+            self.vpd_data = self._parse_vpd_data(VPD_DATA_FILE)
 
-        return self.dmi_data.get(DMI_VERSION, "N/A")
+        return self.vpd_data.get(REVISION, "N/A")
 
-    def _parse_dmi(self, filename):
+    def _parse_vpd_data(self, filename):
         """
-        Read DMI data chassis data and returns a dictionary of values
+        Read vpd_data and returns a dictionary of values
 
         Returns:
             A dictionary containing the dmi table of the switch chassis info
@@ -950,17 +936,10 @@ def _parse_dmi(self, filename):
             if not os.access(filename, os.R_OK):
                 return result
 
-            with open(filename, "rb") as fileobj:
-                data = fileobj.read()
-
-            body = data[DMI_HEADER_LEN:]
-            records = body.split(b'\x00')
-
-            for k, v in DMI_TABLE_MAP.items():
-                result[k] = records[v].decode("utf-8")
-
+            result = utils.read_key_value_file(filename, delimeter=": ")
+                
         except Exception as e:
-            logger.log_error("Fail to decode DMI {} due to {}".format(filename, repr(e)))
+            logger.log_error("Fail to decode vpd_data {} due to {}".format(filename, repr(e)))
 
         return result
 
diff --git a/platform/mellanox/mlnx-platform-api/tests/dmi_file b/platform/mellanox/mlnx-platform-api/tests/dmi_file
deleted file mode 100644
index f9b1cdcd505ba559c54cfa755445eaf08d4817ca..0000000000000000000000000000000000000000
GIT binary patch
literal 0
HcmV?d00001

literal 96
zcmZSLXJTMvVrF6GWMgLFV(?AP$w|!1uTTg{P0q;6&&f~EOf6RMDM`^|2=n!KF)%PN
mWpFfM@C`AvG&YGaFfcSTV(`l^Q3x(bP0mcqOie-KF#rH7UKrv4

diff --git a/platform/mellanox/mlnx-platform-api/tests/test_chassis.py b/platform/mellanox/mlnx-platform-api/tests/test_chassis.py
index 49dfa8ff3..19ceb7f29 100644
--- a/platform/mellanox/mlnx-platform-api/tests/test_chassis.py
+++ b/platform/mellanox/mlnx-platform-api/tests/test_chassis.py
@@ -324,19 +324,6 @@ def test_module(self):
         assert len(module_list) == 3
         assert chassis.module_initialized_count == 3
 
-    def test_revision_permission(self):
-        old_dmi_file =  sonic_platform.chassis.DMI_FILE
-        #Override the dmi file
-        sonic_platform.chassis.DMI_FILE = "/tmp/dmi_file"
-        new_dmi_file = sonic_platform.chassis.DMI_FILE
-        subprocess.call(["touch", new_dmi_file])
-        subprocess.call(["chmod", "-r", new_dmi_file])
-        chassis = Chassis()
-        rev = chassis.get_revision()
-        sonic_platform.chassis.DMI_FILE = old_dmi_file
-        subprocess.call(["rm", "-f", new_dmi_file])
-        assert rev == "N/A"
-
     def test_get_port_or_cage_type(self):
         chassis = Chassis()
         chassis._RJ45_port_inited = True
@@ -351,7 +338,7 @@ def test_get_port_or_cage_type(self):
 
         assert exceptionRaised
 
-    def test_parse_dmi(self):
+    def test_parse_vpd(self):
         chassis = Chassis()
-        content = chassis._parse_dmi(os.path.join(test_path, 'dmi_file'))
-        assert content.get('Version') == 'A4'
+        content = chassis._parse_vpd_data(os.path.join(test_path, 'vpd_data_file'))
+        assert content.get('REV') == 'A7'
diff --git a/platform/mellanox/mlnx-platform-api/tests/vpd_data_file b/platform/mellanox/mlnx-platform-api/tests/vpd_data_file
new file mode 100644
index 000000000..a46087b84
--- /dev/null
+++ b/platform/mellanox/mlnx-platform-api/tests/vpd_data_file
@@ -0,0 +1,51 @@
+Part Number:             MSN4700-WS2FO
+Serial Number:           MT2022X08597
+Base MAC Address:        1c34da1d4200
+Manufacture Date:        07/02/2020 02:38:26
+MAC Addresses:           254
+SN:                      MT2022X08597
+PN:                      MSN4700-WS2FO
+REV:                     A7
+MFG_DATE:                8561348
+PROD_NAME:               Leopard Eth 400
+HW_MGT_ID:               122
+HW_MGT_REV:              0
+SW_MGT_ID:               4700
+SYS_DISPLAY:             MSN4700
+MAX_POWER:               0
+CRIT_AMB_TEMP:           0
+CRIT_IC_TEMP:            0
+ALERT_AMB_TEMP:          0
+ALERT_IC_TEMP:           0
+FAN_DIR:                 0
+LENGTH:                  0
+WIDTH:                   0
+LED:                     0
+GUID_TYPE:               0xd
+BASE_MAC_1:              1C:34:DA:1D:42:00
+MAC_RANGE_1:             0xfe00
+BASE_GUID_1:             1C:34:DA:03:00:1D:42:00
+FEATURE_EN_0:            0
+FEATURE_EN_1:            70
+FEATURE_EN_2:            0
+FEATURE_EN_3:            0
+FEATURE_EN_4:            8
+FEATURE_EN_5:            0
+FEATURE_EN_6:            7
+FEATURE_EN_7:            7
+FEATURE_EN_8:            7
+FEATURE_EN_9:            7
+FEATURE_EN_10:           0
+FEATURE_EN_11:           0
+NUM_SCHEME:              0
+EN_PORTS_NUM:            32
+PORTS_INC_SCHEME:        0
+PORTS_INC_ORDER_0:       0
+PORTS_INC_ORDER_1:       0
+PORTS_INC_ORDER_2:       0
+PORTS_INC_ORDER_3:       0
+Product Name:            MSN4700
+Manufacturer:            Mellanox
+Platform Name:           x86_64-mlnx_msn4700-r0
+ONIE Version:            2023.11-5.3.0011-9600
+CHSUM_FIELD:             0XBB262C35
\ No newline at end of file

From 7a3b651d590129617c9b583e798f47851e68206e Mon Sep 17 00:00:00 2001
From: Saikrishna Arcot <sarcot@microsoft.com>
Date: Tue, 4 Jun 2024 10:50:15 -0700
Subject: [PATCH 0703/1115] [baseimage]: Upgrade docker-py to 7.1.0 (#19181)

This version of docker-py has the fix for the issue caused by requests
2.32, and has the added benefit of upgrading to the latest version of
docker-py.

Signed-off-by: Saikrishna Arcot <sarcot@microsoft.com>
---
 build_debian.sh | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/build_debian.sh b/build_debian.sh
index 352c642ca..08b2b720f 100755
--- a/build_debian.sh
+++ b/build_debian.sh
@@ -537,7 +537,7 @@ sudo cp files/image_config/pip/pip.conf $FILESYSTEM_ROOT/etc/pip.conf
 sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install python3-setuptools python3-wheel
 
 # docker Python API package is needed by Ansible docker module as well as some SONiC applications
-sudo https_proxy=$https_proxy LANG=C chroot $FILESYSTEM_ROOT pip3 install 'docker==6.1.1'
+sudo https_proxy=$https_proxy LANG=C chroot $FILESYSTEM_ROOT pip3 install 'docker==7.1.0'
 
 # Install scapy
 sudo https_proxy=$https_proxy LANG=C chroot $FILESYSTEM_ROOT pip3 install 'scapy==2.4.4'

From 6fb279aa0b1067b548f7e7b3e5e280cfb2a40032 Mon Sep 17 00:00:00 2001
From: Patrick MacArthur <pmacarthur@arista.com>
Date: Tue, 4 Jun 2024 14:18:56 -0400
Subject: [PATCH 0704/1115] Arista: Fix fabric monitor monState (#19183)

Fix the missing quotes in the new monState field in the fabric monitor config.
---
 .../Arista-7804R3-FM/fabric_monitor_config.json                 | 2 +-
 .../Arista-7808R3-FM/fabric_monitor_config.json                 | 2 +-
 .../Arista-7808R3A-FM/fabric_monitor_config.json                | 2 +-
 .../Arista-7800R3-48CQ2-C48/fabric_monitor_config.json          | 2 +-
 .../x86_64-arista_7800r3_48cq2_lc/fabric_monitor_config.json    | 2 +-
 .../Arista-7800R3-48CQM2-C48/fabric_monitor_config.json         | 2 +-
 .../x86_64-arista_7800r3_48cqm2_lc/fabric_monitor_config.json   | 2 +-
 .../Arista-7800R3A-36D2-C36/fabric_monitor_config.json          | 2 +-
 .../Arista-7800R3A-36D2-C72/fabric_monitor_config.json          | 2 +-
 .../Arista-7800R3A-36D2-D36/fabric_monitor_config.json          | 2 +-
 10 files changed, 10 insertions(+), 10 deletions(-)

diff --git a/device/arista/x86_64-arista_7800_sup/Arista-7804R3-FM/fabric_monitor_config.json b/device/arista/x86_64-arista_7800_sup/Arista-7804R3-FM/fabric_monitor_config.json
index 0476a2c15..acea5cc6b 100644
--- a/device/arista/x86_64-arista_7800_sup/Arista-7804R3-FM/fabric_monitor_config.json
+++ b/device/arista/x86_64-arista_7800_sup/Arista-7804R3-FM/fabric_monitor_config.json
@@ -5,6 +5,6 @@
       "monPollThreshRecovery": 8,
       "monPollThreshIsolation": 1,
       "monCapacityThreshWarn": 10,
-      "monState": enable
+      "monState": "enable"
    }
 }
diff --git a/device/arista/x86_64-arista_7800_sup/Arista-7808R3-FM/fabric_monitor_config.json b/device/arista/x86_64-arista_7800_sup/Arista-7808R3-FM/fabric_monitor_config.json
index 0476a2c15..acea5cc6b 100644
--- a/device/arista/x86_64-arista_7800_sup/Arista-7808R3-FM/fabric_monitor_config.json
+++ b/device/arista/x86_64-arista_7800_sup/Arista-7808R3-FM/fabric_monitor_config.json
@@ -5,6 +5,6 @@
       "monPollThreshRecovery": 8,
       "monPollThreshIsolation": 1,
       "monCapacityThreshWarn": 10,
-      "monState": enable
+      "monState": "enable"
    }
 }
diff --git a/device/arista/x86_64-arista_7800_sup/Arista-7808R3A-FM/fabric_monitor_config.json b/device/arista/x86_64-arista_7800_sup/Arista-7808R3A-FM/fabric_monitor_config.json
index 0476a2c15..acea5cc6b 100644
--- a/device/arista/x86_64-arista_7800_sup/Arista-7808R3A-FM/fabric_monitor_config.json
+++ b/device/arista/x86_64-arista_7800_sup/Arista-7808R3A-FM/fabric_monitor_config.json
@@ -5,6 +5,6 @@
       "monPollThreshRecovery": 8,
       "monPollThreshIsolation": 1,
       "monCapacityThreshWarn": 10,
-      "monState": enable
+      "monState": "enable"
    }
 }
diff --git a/device/arista/x86_64-arista_7800r3_48cq2_lc/Arista-7800R3-48CQ2-C48/fabric_monitor_config.json b/device/arista/x86_64-arista_7800r3_48cq2_lc/Arista-7800R3-48CQ2-C48/fabric_monitor_config.json
index f5a6ea72b..d67ec1518 100644
--- a/device/arista/x86_64-arista_7800r3_48cq2_lc/Arista-7800R3-48CQ2-C48/fabric_monitor_config.json
+++ b/device/arista/x86_64-arista_7800r3_48cq2_lc/Arista-7800R3-48CQ2-C48/fabric_monitor_config.json
@@ -5,6 +5,6 @@
       "monPollThreshRecovery": 8,
       "monPollThreshIsolation": 1,
       "monCapacityThreshWarn": 86,
-      "monState": enable
+      "monState": "enable"
    }
 }
diff --git a/device/arista/x86_64-arista_7800r3_48cq2_lc/fabric_monitor_config.json b/device/arista/x86_64-arista_7800r3_48cq2_lc/fabric_monitor_config.json
index f5a6ea72b..d67ec1518 100644
--- a/device/arista/x86_64-arista_7800r3_48cq2_lc/fabric_monitor_config.json
+++ b/device/arista/x86_64-arista_7800r3_48cq2_lc/fabric_monitor_config.json
@@ -5,6 +5,6 @@
       "monPollThreshRecovery": 8,
       "monPollThreshIsolation": 1,
       "monCapacityThreshWarn": 86,
-      "monState": enable
+      "monState": "enable"
    }
 }
diff --git a/device/arista/x86_64-arista_7800r3_48cqm2_lc/Arista-7800R3-48CQM2-C48/fabric_monitor_config.json b/device/arista/x86_64-arista_7800r3_48cqm2_lc/Arista-7800R3-48CQM2-C48/fabric_monitor_config.json
index f5a6ea72b..d67ec1518 100644
--- a/device/arista/x86_64-arista_7800r3_48cqm2_lc/Arista-7800R3-48CQM2-C48/fabric_monitor_config.json
+++ b/device/arista/x86_64-arista_7800r3_48cqm2_lc/Arista-7800R3-48CQM2-C48/fabric_monitor_config.json
@@ -5,6 +5,6 @@
       "monPollThreshRecovery": 8,
       "monPollThreshIsolation": 1,
       "monCapacityThreshWarn": 86,
-      "monState": enable
+      "monState": "enable"
    }
 }
diff --git a/device/arista/x86_64-arista_7800r3_48cqm2_lc/fabric_monitor_config.json b/device/arista/x86_64-arista_7800r3_48cqm2_lc/fabric_monitor_config.json
index f5a6ea72b..d67ec1518 100644
--- a/device/arista/x86_64-arista_7800r3_48cqm2_lc/fabric_monitor_config.json
+++ b/device/arista/x86_64-arista_7800r3_48cqm2_lc/fabric_monitor_config.json
@@ -5,6 +5,6 @@
       "monPollThreshRecovery": 8,
       "monPollThreshIsolation": 1,
       "monCapacityThreshWarn": 86,
-      "monState": enable
+      "monState": "enable"
    }
 }
diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/fabric_monitor_config.json b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/fabric_monitor_config.json
index f34b21d3f..34e3f5e6e 100644
--- a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/fabric_monitor_config.json
+++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/fabric_monitor_config.json
@@ -5,6 +5,6 @@
       "monPollThreshRecovery": 8,
       "monPollThreshIsolation": 1,
       "monCapacityThreshWarn": 100,
-      "monState": enable
+      "monState": "enable"
    }
 }
diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/fabric_monitor_config.json b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/fabric_monitor_config.json
index f5a6ea72b..d67ec1518 100644
--- a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/fabric_monitor_config.json
+++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/fabric_monitor_config.json
@@ -5,6 +5,6 @@
       "monPollThreshRecovery": 8,
       "monPollThreshIsolation": 1,
       "monCapacityThreshWarn": 86,
-      "monState": enable
+      "monState": "enable"
    }
 }
diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/fabric_monitor_config.json b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/fabric_monitor_config.json
index f34b21d3f..34e3f5e6e 100644
--- a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/fabric_monitor_config.json
+++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/fabric_monitor_config.json
@@ -5,6 +5,6 @@
       "monPollThreshRecovery": 8,
       "monPollThreshIsolation": 1,
       "monCapacityThreshWarn": 100,
-      "monState": enable
+      "monState": "enable"
    }
 }

From ca5e3b2c78f05073f5a6862056facc21861355bd Mon Sep 17 00:00:00 2001
From: Longxiang Lyu <35479537+lolyu@users.noreply.github.com>
Date: Wed, 5 Jun 2024 02:59:49 +0800
Subject: [PATCH 0705/1115] [subnet_decap] Use new tunnel&&decap term db schema
 and add subnet decap tunnel to `ipinip.json` (#18752)

* [decap] Enhance `ipinip.json.j2` template to use new db schema

Signed-off-by: Longxiang Lyu <lolv@microsoft.com>
Co-authored-by: bingwang <bingwang@microsoft.com>
---
 dockers/docker-orchagent/ipinip.json.j2       |  65 +++++++++-
 .../tests/multi_npu_data/py2/ipinip.json      |  53 +++++++-
 .../tests/multi_npu_data/py3/ipinip.json      |  53 +++++++-
 .../tests/sample_output/py2/ipinip.json       |  89 ++++++++++++-
 .../py2/ipinip_subnet_decap_enable.json       | 122 ++++++++++++++++++
 .../tests/sample_output/py3/ipinip.json       |  89 ++++++++++++-
 .../py3/ipinip_subnet_decap_enable.json       | 122 ++++++++++++++++++
 src/sonic-config-engine/tests/test_j2files.py |   9 ++
 8 files changed, 583 insertions(+), 19 deletions(-)
 create mode 100644 src/sonic-config-engine/tests/sample_output/py2/ipinip_subnet_decap_enable.json
 create mode 100644 src/sonic-config-engine/tests/sample_output/py3/ipinip_subnet_decap_enable.json

diff --git a/dockers/docker-orchagent/ipinip.json.j2 b/dockers/docker-orchagent/ipinip.json.j2
index 9d40ec68c..f25f7d9fb 100644
--- a/dockers/docker-orchagent/ipinip.json.j2
+++ b/dockers/docker-orchagent/ipinip.json.j2
@@ -20,6 +20,12 @@
         {%- set ipv6_loopback_addresses = ipv6_loopback_addresses.append(prefix) %}
     {%- endif %}
 {% endfor %}
+{% set subnet_decap = namespace(enable=false) %}
+{% for config in SUBNET_DECAP %}
+    {%- if SUBNET_DECAP[config].status == 'enable' %}
+        {%- set subnet_decap.enable = true %}
+    {%- endif %}
+{% endfor %}
 {% for (name, prefix) in INTERFACE|pfx_filter %}
     {%- if prefix | ipv4 %}
         {%- set ipv4_addresses = ipv4_addresses.append(prefix) %}
@@ -46,10 +52,24 @@
 {% endfor %}
 [
 {% if ipv4_loopback_addresses %}
+{% if subnet_decap.enable %}
+    {
+        "TUNNEL_DECAP_TABLE:IPINIP_SUBNET" : {
+            "tunnel_type":"IPINIP",
+            "dscp_mode":"uniform",
+{% if "mlnx" in DEVICE_METADATA.localhost.platform %}
+            "ecn_mode":"standard",
+{% else %}
+            "ecn_mode":"copy_from_outer",
+{% endif %}
+            "ttl_mode":"pipe"
+        },
+        "OP": "SET"
+    },
+{% endif %}
     {
         "TUNNEL_DECAP_TABLE:IPINIP_TUNNEL" : {
             "tunnel_type":"IPINIP",
-            "dst_ip":"{% for prefix in ipv4_addresses|sort %}{{ prefix | ip }}{% if not loop.last %},{% endif %}{% endfor %}",
             "dscp_mode":"uniform",
 {% if "mlnx" in DEVICE_METADATA.localhost.platform %}
             "ecn_mode":"standard",
@@ -60,14 +80,40 @@
         },
         "OP": "SET"
     }
+{%- if ipv4_addresses -%}
+,
+{% endif %}
+{% for prefix in ipv4_addresses|sort %}
+    {
+        "TUNNEL_DECAP_TERM_TABLE:IPINIP_TUNNEL:{{ prefix | ip }}" : {
+            "term_type":"P2MP"
+        },
+        "OP": "SET"
+    }{% if not loop.last %},
+{% endif %}
+{% endfor %}
 {% endif %}
-{% if ipv4_loopback_addresses and ipv6_loopback_addresses %}    ,
+{% if ipv4_loopback_addresses and ipv6_loopback_addresses %},
 {% endif %}
 {% if ipv6_loopback_addresses %}
+{% if subnet_decap.enable %}
+    {
+        "TUNNEL_DECAP_TABLE:IPINIP_SUBNET_V6" : {
+            "tunnel_type":"IPINIP",
+            "dscp_mode":"uniform",
+{% if "mlnx" in DEVICE_METADATA.localhost.platform %}
+            "ecn_mode":"standard",
+{% else %}
+            "ecn_mode":"copy_from_outer",
+{% endif %}
+            "ttl_mode":"pipe"
+        },
+        "OP": "SET"
+    },
+{% endif %}
     {
         "TUNNEL_DECAP_TABLE:IPINIP_V6_TUNNEL" : {
             "tunnel_type":"IPINIP",
-            "dst_ip":"{% for prefix in ipv6_addresses|sort %}{{ prefix | ip }}{% if not loop.last %},{% endif %}{% endfor %}",
             "dscp_mode":"uniform",
 {% if "mlnx" in DEVICE_METADATA.localhost.platform %}
             "ecn_mode":"standard",
@@ -77,8 +123,21 @@
             "ttl_mode":"pipe"
         },
         "OP": "SET"
+    }{% if ipv6_addresses %},
+{% endif %}
+{% for prefix in ipv6_addresses|sort %}
+    {
+        "TUNNEL_DECAP_TERM_TABLE:IPINIP_V6_TUNNEL:{{ prefix | ip }}" : {
+            "term_type":"P2MP"
+        },
+        "OP": "SET"
     }
+{%- if not loop.last -%}
+,
+{% endif %}
+{% endfor %}
 {% endif %}
+
 ]
 {% endif %}
 
diff --git a/src/sonic-config-engine/tests/multi_npu_data/py2/ipinip.json b/src/sonic-config-engine/tests/multi_npu_data/py2/ipinip.json
index 82d583de6..94196a0a4 100644
--- a/src/sonic-config-engine/tests/multi_npu_data/py2/ipinip.json
+++ b/src/sonic-config-engine/tests/multi_npu_data/py2/ipinip.json
@@ -2,22 +2,67 @@
     {
         "TUNNEL_DECAP_TABLE:IPINIP_TUNNEL" : {
             "tunnel_type":"IPINIP",
-            "dst_ip":"10.0.0.0,10.1.0.1,10.1.0.3,10.1.0.32,8.0.0.0",
             "dscp_mode":"uniform",
             "ecn_mode":"copy_from_outer",
             "ttl_mode":"pipe"
         },
         "OP": "SET"
-    }
-    ,
+    },
+    {
+        "TUNNEL_DECAP_TERM_TABLE:IPINIP_TUNNEL:10.0.0.0" : {
+            "term_type":"P2MP"
+        },
+        "OP": "SET"
+    },
+    {
+        "TUNNEL_DECAP_TERM_TABLE:IPINIP_TUNNEL:10.1.0.1" : {
+            "term_type":"P2MP"
+        },
+        "OP": "SET"
+    },
+    {
+        "TUNNEL_DECAP_TERM_TABLE:IPINIP_TUNNEL:10.1.0.3" : {
+            "term_type":"P2MP"
+        },
+        "OP": "SET"
+    },
+    {
+        "TUNNEL_DECAP_TERM_TABLE:IPINIP_TUNNEL:10.1.0.32" : {
+            "term_type":"P2MP"
+        },
+        "OP": "SET"
+    },
+    {
+        "TUNNEL_DECAP_TERM_TABLE:IPINIP_TUNNEL:8.0.0.0" : {
+            "term_type":"P2MP"
+        },
+        "OP": "SET"
+    },
     {
         "TUNNEL_DECAP_TABLE:IPINIP_V6_TUNNEL" : {
             "tunnel_type":"IPINIP",
-            "dst_ip":"fc00:1::32,fc00::1,fd00:1::32",
             "dscp_mode":"uniform",
             "ecn_mode":"copy_from_outer",
             "ttl_mode":"pipe"
         },
         "OP": "SET"
+    },
+    {
+        "TUNNEL_DECAP_TERM_TABLE:IPINIP_V6_TUNNEL:fc00:1::32" : {
+            "term_type":"P2MP"
+        },
+        "OP": "SET"
+    },
+    {
+        "TUNNEL_DECAP_TERM_TABLE:IPINIP_V6_TUNNEL:fc00::1" : {
+            "term_type":"P2MP"
+        },
+        "OP": "SET"
+    },
+    {
+        "TUNNEL_DECAP_TERM_TABLE:IPINIP_V6_TUNNEL:fd00:1::32" : {
+            "term_type":"P2MP"
+        },
+        "OP": "SET"
     }
 ]
diff --git a/src/sonic-config-engine/tests/multi_npu_data/py3/ipinip.json b/src/sonic-config-engine/tests/multi_npu_data/py3/ipinip.json
index 82d583de6..94196a0a4 100644
--- a/src/sonic-config-engine/tests/multi_npu_data/py3/ipinip.json
+++ b/src/sonic-config-engine/tests/multi_npu_data/py3/ipinip.json
@@ -2,22 +2,67 @@
     {
         "TUNNEL_DECAP_TABLE:IPINIP_TUNNEL" : {
             "tunnel_type":"IPINIP",
-            "dst_ip":"10.0.0.0,10.1.0.1,10.1.0.3,10.1.0.32,8.0.0.0",
             "dscp_mode":"uniform",
             "ecn_mode":"copy_from_outer",
             "ttl_mode":"pipe"
         },
         "OP": "SET"
-    }
-    ,
+    },
+    {
+        "TUNNEL_DECAP_TERM_TABLE:IPINIP_TUNNEL:10.0.0.0" : {
+            "term_type":"P2MP"
+        },
+        "OP": "SET"
+    },
+    {
+        "TUNNEL_DECAP_TERM_TABLE:IPINIP_TUNNEL:10.1.0.1" : {
+            "term_type":"P2MP"
+        },
+        "OP": "SET"
+    },
+    {
+        "TUNNEL_DECAP_TERM_TABLE:IPINIP_TUNNEL:10.1.0.3" : {
+            "term_type":"P2MP"
+        },
+        "OP": "SET"
+    },
+    {
+        "TUNNEL_DECAP_TERM_TABLE:IPINIP_TUNNEL:10.1.0.32" : {
+            "term_type":"P2MP"
+        },
+        "OP": "SET"
+    },
+    {
+        "TUNNEL_DECAP_TERM_TABLE:IPINIP_TUNNEL:8.0.0.0" : {
+            "term_type":"P2MP"
+        },
+        "OP": "SET"
+    },
     {
         "TUNNEL_DECAP_TABLE:IPINIP_V6_TUNNEL" : {
             "tunnel_type":"IPINIP",
-            "dst_ip":"fc00:1::32,fc00::1,fd00:1::32",
             "dscp_mode":"uniform",
             "ecn_mode":"copy_from_outer",
             "ttl_mode":"pipe"
         },
         "OP": "SET"
+    },
+    {
+        "TUNNEL_DECAP_TERM_TABLE:IPINIP_V6_TUNNEL:fc00:1::32" : {
+            "term_type":"P2MP"
+        },
+        "OP": "SET"
+    },
+    {
+        "TUNNEL_DECAP_TERM_TABLE:IPINIP_V6_TUNNEL:fc00::1" : {
+            "term_type":"P2MP"
+        },
+        "OP": "SET"
+    },
+    {
+        "TUNNEL_DECAP_TERM_TABLE:IPINIP_V6_TUNNEL:fd00:1::32" : {
+            "term_type":"P2MP"
+        },
+        "OP": "SET"
     }
 ]
diff --git a/src/sonic-config-engine/tests/sample_output/py2/ipinip.json b/src/sonic-config-engine/tests/sample_output/py2/ipinip.json
index 0a0105846..755e954cf 100644
--- a/src/sonic-config-engine/tests/sample_output/py2/ipinip.json
+++ b/src/sonic-config-engine/tests/sample_output/py2/ipinip.json
@@ -2,22 +2,103 @@
     {
         "TUNNEL_DECAP_TABLE:IPINIP_TUNNEL" : {
             "tunnel_type":"IPINIP",
-            "dst_ip":"10.0.0.56,10.0.0.58,10.0.0.60,10.0.0.62,10.1.0.32,10.21.0.64,10.21.64.2,192.168.0.1,192.168.200.1",
             "dscp_mode":"uniform",
             "ecn_mode":"copy_from_outer",
             "ttl_mode":"pipe"
         },
         "OP": "SET"
-    }
-    ,
+    },
+    {
+        "TUNNEL_DECAP_TERM_TABLE:IPINIP_TUNNEL:10.0.0.56" : {
+            "term_type":"P2MP"
+        },
+        "OP": "SET"
+    },
+    {
+        "TUNNEL_DECAP_TERM_TABLE:IPINIP_TUNNEL:10.0.0.58" : {
+            "term_type":"P2MP"
+        },
+        "OP": "SET"
+    },
+    {
+        "TUNNEL_DECAP_TERM_TABLE:IPINIP_TUNNEL:10.0.0.60" : {
+            "term_type":"P2MP"
+        },
+        "OP": "SET"
+    },
+    {
+        "TUNNEL_DECAP_TERM_TABLE:IPINIP_TUNNEL:10.0.0.62" : {
+            "term_type":"P2MP"
+        },
+        "OP": "SET"
+    },
+    {
+        "TUNNEL_DECAP_TERM_TABLE:IPINIP_TUNNEL:10.1.0.32" : {
+            "term_type":"P2MP"
+        },
+        "OP": "SET"
+    },
+    {
+        "TUNNEL_DECAP_TERM_TABLE:IPINIP_TUNNEL:10.21.0.64" : {
+            "term_type":"P2MP"
+        },
+        "OP": "SET"
+    },
+    {
+        "TUNNEL_DECAP_TERM_TABLE:IPINIP_TUNNEL:10.21.64.2" : {
+            "term_type":"P2MP"
+        },
+        "OP": "SET"
+    },
+    {
+        "TUNNEL_DECAP_TERM_TABLE:IPINIP_TUNNEL:192.168.0.1" : {
+            "term_type":"P2MP"
+        },
+        "OP": "SET"
+    },
+    {
+        "TUNNEL_DECAP_TERM_TABLE:IPINIP_TUNNEL:192.168.200.1" : {
+            "term_type":"P2MP"
+        },
+        "OP": "SET"
+    },
     {
         "TUNNEL_DECAP_TABLE:IPINIP_V6_TUNNEL" : {
             "tunnel_type":"IPINIP",
-            "dst_ip":"fc00:1::32,fc00::71,fc00::75,fc00::79,fc00::7d",
             "dscp_mode":"uniform",
             "ecn_mode":"copy_from_outer",
             "ttl_mode":"pipe"
         },
         "OP": "SET"
+    },
+    {
+        "TUNNEL_DECAP_TERM_TABLE:IPINIP_V6_TUNNEL:fc00:1::32" : {
+            "term_type":"P2MP"
+        },
+        "OP": "SET"
+    },
+    {
+        "TUNNEL_DECAP_TERM_TABLE:IPINIP_V6_TUNNEL:fc00::71" : {
+            "term_type":"P2MP"
+        },
+        "OP": "SET"
+    },
+    {
+        "TUNNEL_DECAP_TERM_TABLE:IPINIP_V6_TUNNEL:fc00::75" : {
+            "term_type":"P2MP"
+        },
+        "OP": "SET"
+    },
+    {
+        "TUNNEL_DECAP_TERM_TABLE:IPINIP_V6_TUNNEL:fc00::79" : {
+            "term_type":"P2MP"
+        },
+        "OP": "SET"
+    },
+    {
+        "TUNNEL_DECAP_TERM_TABLE:IPINIP_V6_TUNNEL:fc00::7d" : {
+            "term_type":"P2MP"
+        },
+        "OP": "SET"
     }
 ]
diff --git a/src/sonic-config-engine/tests/sample_output/py2/ipinip_subnet_decap_enable.json b/src/sonic-config-engine/tests/sample_output/py2/ipinip_subnet_decap_enable.json
new file mode 100644
index 000000000..ad978b886
--- /dev/null
+++ b/src/sonic-config-engine/tests/sample_output/py2/ipinip_subnet_decap_enable.json
@@ -0,0 +1,122 @@
+[
+    {
+        "TUNNEL_DECAP_TABLE:IPINIP_SUBNET" : {
+            "tunnel_type":"IPINIP",
+            "dscp_mode":"uniform",
+            "ecn_mode":"copy_from_outer",
+            "ttl_mode":"pipe"
+        },
+        "OP": "SET"
+    },
+    {
+        "TUNNEL_DECAP_TABLE:IPINIP_TUNNEL" : {
+            "tunnel_type":"IPINIP",
+            "dscp_mode":"uniform",
+            "ecn_mode":"copy_from_outer",
+            "ttl_mode":"pipe"
+        },
+        "OP": "SET"
+    },
+    {
+        "TUNNEL_DECAP_TERM_TABLE:IPINIP_TUNNEL:10.0.0.56" : {
+            "term_type":"P2MP"
+        },
+        "OP": "SET"
+    },
+    {
+        "TUNNEL_DECAP_TERM_TABLE:IPINIP_TUNNEL:10.0.0.58" : {
+            "term_type":"P2MP"
+        },
+        "OP": "SET"
+    },
+    {
+        "TUNNEL_DECAP_TERM_TABLE:IPINIP_TUNNEL:10.0.0.60" : {
+            "term_type":"P2MP"
+        },
+        "OP": "SET"
+    },
+    {
+        "TUNNEL_DECAP_TERM_TABLE:IPINIP_TUNNEL:10.0.0.62" : {
+            "term_type":"P2MP"
+        },
+        "OP": "SET"
+    },
+    {
+        "TUNNEL_DECAP_TERM_TABLE:IPINIP_TUNNEL:10.1.0.32" : {
+            "term_type":"P2MP"
+        },
+        "OP": "SET"
+    },
+    {
+        "TUNNEL_DECAP_TERM_TABLE:IPINIP_TUNNEL:10.21.0.64" : {
+            "term_type":"P2MP"
+        },
+        "OP": "SET"
+    },
+    {
+        "TUNNEL_DECAP_TERM_TABLE:IPINIP_TUNNEL:10.21.64.2" : {
+            "term_type":"P2MP"
+        },
+        "OP": "SET"
+    },
+    {
+        "TUNNEL_DECAP_TERM_TABLE:IPINIP_TUNNEL:192.168.0.1" : {
+            "term_type":"P2MP"
+        },
+        "OP": "SET"
+    },
+    {
+        "TUNNEL_DECAP_TERM_TABLE:IPINIP_TUNNEL:192.168.200.1" : {
+            "term_type":"P2MP"
+        },
+        "OP": "SET"
+    },
+    {
+        "TUNNEL_DECAP_TABLE:IPINIP_SUBNET_V6" : {
+            "tunnel_type":"IPINIP",
+            "dscp_mode":"uniform",
+            "ecn_mode":"copy_from_outer",
+            "ttl_mode":"pipe"
+        },
+        "OP": "SET"
+    },
+    {
+        "TUNNEL_DECAP_TABLE:IPINIP_V6_TUNNEL" : {
+            "tunnel_type":"IPINIP",
+            "dscp_mode":"uniform",
+            "ecn_mode":"copy_from_outer",
+            "ttl_mode":"pipe"
+        },
+        "OP": "SET"
+    },
+    {
+        "TUNNEL_DECAP_TERM_TABLE:IPINIP_V6_TUNNEL:fc00:1::32" : {
+            "term_type":"P2MP"
+        },
+        "OP": "SET"
+    },
+    {
+        "TUNNEL_DECAP_TERM_TABLE:IPINIP_V6_TUNNEL:fc00::71" : {
+            "term_type":"P2MP"
+        },
+        "OP": "SET"
+    },
+    {
+        "TUNNEL_DECAP_TERM_TABLE:IPINIP_V6_TUNNEL:fc00::75" : {
+            "term_type":"P2MP"
+        },
+        "OP": "SET"
+    },
+    {
+        "TUNNEL_DECAP_TERM_TABLE:IPINIP_V6_TUNNEL:fc00::79" : {
+            "term_type":"P2MP"
+        },
+        "OP": "SET"
+    },
+    {
+        "TUNNEL_DECAP_TERM_TABLE:IPINIP_V6_TUNNEL:fc00::7d" : {
+            "term_type":"P2MP"
+        },
+        "OP": "SET"
+    }
+]
diff --git a/src/sonic-config-engine/tests/sample_output/py3/ipinip.json b/src/sonic-config-engine/tests/sample_output/py3/ipinip.json
index 0a0105846..755e954cf 100644
--- a/src/sonic-config-engine/tests/sample_output/py3/ipinip.json
+++ b/src/sonic-config-engine/tests/sample_output/py3/ipinip.json
@@ -2,22 +2,103 @@
     {
         "TUNNEL_DECAP_TABLE:IPINIP_TUNNEL" : {
             "tunnel_type":"IPINIP",
-            "dst_ip":"10.0.0.56,10.0.0.58,10.0.0.60,10.0.0.62,10.1.0.32,10.21.0.64,10.21.64.2,192.168.0.1,192.168.200.1",
             "dscp_mode":"uniform",
             "ecn_mode":"copy_from_outer",
             "ttl_mode":"pipe"
         },
         "OP": "SET"
-    }
-    ,
+    },
+    {
+        "TUNNEL_DECAP_TERM_TABLE:IPINIP_TUNNEL:10.0.0.56" : {
+            "term_type":"P2MP"
+        },
+        "OP": "SET"
+    },
+    {
+        "TUNNEL_DECAP_TERM_TABLE:IPINIP_TUNNEL:10.0.0.58" : {
+            "term_type":"P2MP"
+        },
+        "OP": "SET"
+    },
+    {
+        "TUNNEL_DECAP_TERM_TABLE:IPINIP_TUNNEL:10.0.0.60" : {
+            "term_type":"P2MP"
+        },
+        "OP": "SET"
+    },
+    {
+        "TUNNEL_DECAP_TERM_TABLE:IPINIP_TUNNEL:10.0.0.62" : {
+            "term_type":"P2MP"
+        },
+        "OP": "SET"
+    },
+    {
+        "TUNNEL_DECAP_TERM_TABLE:IPINIP_TUNNEL:10.1.0.32" : {
+            "term_type":"P2MP"
+        },
+        "OP": "SET"
+    },
+    {
+        "TUNNEL_DECAP_TERM_TABLE:IPINIP_TUNNEL:10.21.0.64" : {
+            "term_type":"P2MP"
+        },
+        "OP": "SET"
+    },
+    {
+        "TUNNEL_DECAP_TERM_TABLE:IPINIP_TUNNEL:10.21.64.2" : {
+            "term_type":"P2MP"
+        },
+        "OP": "SET"
+    },
+    {
+        "TUNNEL_DECAP_TERM_TABLE:IPINIP_TUNNEL:192.168.0.1" : {
+            "term_type":"P2MP"
+        },
+        "OP": "SET"
+    },
+    {
+        "TUNNEL_DECAP_TERM_TABLE:IPINIP_TUNNEL:192.168.200.1" : {
+            "term_type":"P2MP"
+        },
+        "OP": "SET"
+    },
     {
         "TUNNEL_DECAP_TABLE:IPINIP_V6_TUNNEL" : {
             "tunnel_type":"IPINIP",
-            "dst_ip":"fc00:1::32,fc00::71,fc00::75,fc00::79,fc00::7d",
             "dscp_mode":"uniform",
             "ecn_mode":"copy_from_outer",
             "ttl_mode":"pipe"
         },
         "OP": "SET"
+    },
+    {
+        "TUNNEL_DECAP_TERM_TABLE:IPINIP_V6_TUNNEL:fc00:1::32" : {
+            "term_type":"P2MP"
+        },
+        "OP": "SET"
+    },
+    {
+        "TUNNEL_DECAP_TERM_TABLE:IPINIP_V6_TUNNEL:fc00::71" : {
+            "term_type":"P2MP"
+        },
+        "OP": "SET"
+    },
+    {
+        "TUNNEL_DECAP_TERM_TABLE:IPINIP_V6_TUNNEL:fc00::75" : {
+            "term_type":"P2MP"
+        },
+        "OP": "SET"
+    },
+    {
+        "TUNNEL_DECAP_TERM_TABLE:IPINIP_V6_TUNNEL:fc00::79" : {
+            "term_type":"P2MP"
+        },
+        "OP": "SET"
+    },
+    {
+        "TUNNEL_DECAP_TERM_TABLE:IPINIP_V6_TUNNEL:fc00::7d" : {
+            "term_type":"P2MP"
+        },
+        "OP": "SET"
     }
 ]
diff --git a/src/sonic-config-engine/tests/sample_output/py3/ipinip_subnet_decap_enable.json b/src/sonic-config-engine/tests/sample_output/py3/ipinip_subnet_decap_enable.json
new file mode 100644
index 000000000..ad978b886
--- /dev/null
+++ b/src/sonic-config-engine/tests/sample_output/py3/ipinip_subnet_decap_enable.json
@@ -0,0 +1,122 @@
+[
+    {
+        "TUNNEL_DECAP_TABLE:IPINIP_SUBNET" : {
+            "tunnel_type":"IPINIP",
+            "dscp_mode":"uniform",
+            "ecn_mode":"copy_from_outer",
+            "ttl_mode":"pipe"
+        },
+        "OP": "SET"
+    },
+    {
+        "TUNNEL_DECAP_TABLE:IPINIP_TUNNEL" : {
+            "tunnel_type":"IPINIP",
+            "dscp_mode":"uniform",
+            "ecn_mode":"copy_from_outer",
+            "ttl_mode":"pipe"
+        },
+        "OP": "SET"
+    },
+    {
+        "TUNNEL_DECAP_TERM_TABLE:IPINIP_TUNNEL:10.0.0.56" : {
+            "term_type":"P2MP"
+        },
+        "OP": "SET"
+    },
+    {
+        "TUNNEL_DECAP_TERM_TABLE:IPINIP_TUNNEL:10.0.0.58" : {
+            "term_type":"P2MP"
+        },
+        "OP": "SET"
+    },
+    {
+        "TUNNEL_DECAP_TERM_TABLE:IPINIP_TUNNEL:10.0.0.60" : {
+            "term_type":"P2MP"
+        },
+        "OP": "SET"
+    },
+    {
+        "TUNNEL_DECAP_TERM_TABLE:IPINIP_TUNNEL:10.0.0.62" : {
+            "term_type":"P2MP"
+        },
+        "OP": "SET"
+    },
+    {
+        "TUNNEL_DECAP_TERM_TABLE:IPINIP_TUNNEL:10.1.0.32" : {
+            "term_type":"P2MP"
+        },
+        "OP": "SET"
+    },
+    {
+        "TUNNEL_DECAP_TERM_TABLE:IPINIP_TUNNEL:10.21.0.64" : {
+            "term_type":"P2MP"
+        },
+        "OP": "SET"
+    },
+    {
+        "TUNNEL_DECAP_TERM_TABLE:IPINIP_TUNNEL:10.21.64.2" : {
+            "term_type":"P2MP"
+        },
+        "OP": "SET"
+    },
+    {
+        "TUNNEL_DECAP_TERM_TABLE:IPINIP_TUNNEL:192.168.0.1" : {
+            "term_type":"P2MP"
+        },
+        "OP": "SET"
+    },
+    {
+        "TUNNEL_DECAP_TERM_TABLE:IPINIP_TUNNEL:192.168.200.1" : {
+            "term_type":"P2MP"
+        },
+        "OP": "SET"
+    },
+    {
+        "TUNNEL_DECAP_TABLE:IPINIP_SUBNET_V6" : {
+            "tunnel_type":"IPINIP",
+            "dscp_mode":"uniform",
+            "ecn_mode":"copy_from_outer",
+            "ttl_mode":"pipe"
+        },
+        "OP": "SET"
+    },
+    {
+        "TUNNEL_DECAP_TABLE:IPINIP_V6_TUNNEL" : {
+            "tunnel_type":"IPINIP",
+            "dscp_mode":"uniform",
+            "ecn_mode":"copy_from_outer",
+            "ttl_mode":"pipe"
+        },
+        "OP": "SET"
+    },
+    {
+        "TUNNEL_DECAP_TERM_TABLE:IPINIP_V6_TUNNEL:fc00:1::32" : {
+            "term_type":"P2MP"
+        },
+        "OP": "SET"
+    },
+    {
+        "TUNNEL_DECAP_TERM_TABLE:IPINIP_V6_TUNNEL:fc00::71" : {
+            "term_type":"P2MP"
+        },
+        "OP": "SET"
+    },
+    {
+        "TUNNEL_DECAP_TERM_TABLE:IPINIP_V6_TUNNEL:fc00::75" : {
+            "term_type":"P2MP"
+        },
+        "OP": "SET"
+    },
+    {
+        "TUNNEL_DECAP_TERM_TABLE:IPINIP_V6_TUNNEL:fc00::79" : {
+            "term_type":"P2MP"
+        },
+        "OP": "SET"
+    },
+    {
+        "TUNNEL_DECAP_TERM_TABLE:IPINIP_V6_TUNNEL:fc00::7d" : {
+            "term_type":"P2MP"
+        },
+        "OP": "SET"
+    }
+]
diff --git a/src/sonic-config-engine/tests/test_j2files.py b/src/sonic-config-engine/tests/test_j2files.py
index b83926d4c..cf8907bf1 100644
--- a/src/sonic-config-engine/tests/test_j2files.py
+++ b/src/sonic-config-engine/tests/test_j2files.py
@@ -223,6 +223,15 @@ def test_ipinip(self):
         sample_output_file = os.path.join(self.test_dir, 'sample_output', utils.PYvX_DIR, 'ipinip.json')
         assert utils.cmp(sample_output_file, self.output_file), self.run_diff(sample_output_file, self.output_file)
 
+    def test_ipinip_subnet_decap_enable(self):
+        ipinip_file = os.path.join(self.test_dir, '..', '..', '..', 'dockers', 'docker-orchagent', 'ipinip.json.j2')
+        extra_data = {"SUBNET_DECAP": {"AZURE": {"status": "enable"}}}
+        argument = ['-m', self.t0_minigraph, '-p', self.t0_port_config, '-a', json.dumps(extra_data), '-t', ipinip_file]
+        self.run_script(argument, output_file=self.output_file)
+
+        sample_output_file = os.path.join(self.test_dir, 'sample_output', utils.PYvX_DIR, 'ipinip_subnet_decap_enable.json')
+        assert utils.cmp(sample_output_file, self.output_file), self.run_diff(sample_output_file, self.output_file)
+
     def test_l2switch_template(self):
         argument = ['-k', 'Mellanox-SN2700', '--preset', 'l2', '-p', self.t0_port_config]
         output = self.run_script(argument)

From df553ec32068ad83488b4e15b9a7ca504c674b0d Mon Sep 17 00:00:00 2001
From: sophiek <skravitz@nvidia.com>
Date: Tue, 4 Jun 2024 22:19:25 +0300
Subject: [PATCH 0706/1115] [Mellanox] Fix SN5400 lane number of service port
 from 513 to 520 (#19137)

Fixed a lane numbering bug with service ports on SN5400
---
 device/mellanox/x86_64-nvidia_sn5400-r0/ACS-SN5400/hwsku.json | 2 +-
 .../x86_64-nvidia_sn5400-r0/ACS-SN5400/port_config.ini        | 2 +-
 device/mellanox/x86_64-nvidia_sn5400-r0/platform.json         | 4 ++--
 device/mellanox/x86_64-nvidia_sn5400_simx-r0/platform.json    | 4 ++--
 4 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/device/mellanox/x86_64-nvidia_sn5400-r0/ACS-SN5400/hwsku.json b/device/mellanox/x86_64-nvidia_sn5400-r0/ACS-SN5400/hwsku.json
index abe6649e7..096249718 100644
--- a/device/mellanox/x86_64-nvidia_sn5400-r0/ACS-SN5400/hwsku.json
+++ b/device/mellanox/x86_64-nvidia_sn5400-r0/ACS-SN5400/hwsku.json
@@ -195,7 +195,7 @@
         "Ethernet512": {
             "default_brkout_mode": "1x25G[10G]"
         },
-        "Ethernet513": {
+        "Ethernet520": {
             "default_brkout_mode": "1x25G[10G]"
         }
     }
diff --git a/device/mellanox/x86_64-nvidia_sn5400-r0/ACS-SN5400/port_config.ini b/device/mellanox/x86_64-nvidia_sn5400-r0/ACS-SN5400/port_config.ini
index 4b62d3abf..3fe2027e9 100644
--- a/device/mellanox/x86_64-nvidia_sn5400-r0/ACS-SN5400/port_config.ini
+++ b/device/mellanox/x86_64-nvidia_sn5400-r0/ACS-SN5400/port_config.ini
@@ -81,4 +81,4 @@ Ethernet488     488,489,490,491,492,493,494,495     etp62     62
 Ethernet496     496,497,498,499,500,501,502,503     etp63     63
 Ethernet504     504,505,506,507,508,509,510,511     etp64     64
 Ethernet512     512                                 etp65     65
-Ethernet513     513                                 etp66     66
+Ethernet520     520                                 etp66     66
diff --git a/device/mellanox/x86_64-nvidia_sn5400-r0/platform.json b/device/mellanox/x86_64-nvidia_sn5400-r0/platform.json
index 274a12d0c..f4f9ed17d 100644
--- a/device/mellanox/x86_64-nvidia_sn5400-r0/platform.json
+++ b/device/mellanox/x86_64-nvidia_sn5400-r0/platform.json
@@ -1322,9 +1322,9 @@
                 "1x25G[10G]": ["etp65"]
             }
         },
-        "Ethernet513": {
+        "Ethernet520": {
             "index": "66",
-            "lanes": "513",
+            "lanes": "520",
             "breakout_modes": {
                 "1x25G[10G]": ["etp66"]
             }
diff --git a/device/mellanox/x86_64-nvidia_sn5400_simx-r0/platform.json b/device/mellanox/x86_64-nvidia_sn5400_simx-r0/platform.json
index a2a9ad437..e85c160d0 100644
--- a/device/mellanox/x86_64-nvidia_sn5400_simx-r0/platform.json
+++ b/device/mellanox/x86_64-nvidia_sn5400_simx-r0/platform.json
@@ -1325,9 +1325,9 @@
                 "1x25G[10G]": ["etp65"]
             }
         },
-        "Ethernet513": {
+        "Ethernet520": {
             "index": "66",
-            "lanes": "513",
+            "lanes": "520",
             "breakout_modes": {
                 "1x25G[10G]": ["etp66"]
             }

From 268e02ffe3f5b584085c81004c6d9da376b8944a Mon Sep 17 00:00:00 2001
From: Konstantin Vasin <126960927+k-v1@users.noreply.github.com>
Date: Tue, 4 Jun 2024 22:20:08 +0300
Subject: [PATCH 0707/1115] [Build]: Fix dep files for sairedis, syncd and
 libsaithrift-dev (#19172)

Fix DPKG cache errors when configure or build SONiC:

/bin/bash: line 1: cd: src/sonic-sairedis/SAI/bm/behavioral-model: No such file or directory
/bin/bash: line 1: cd: src/sonic-sairedis/SAI/bm/behavioral-model: No such file or directory
Submodule bm/behavioral-model has been removed from SAI repo in opencomputeproject/SAI#1954

But dep files in sonic-buildimage haven't been updated.
---
 platform/broadcom/libsaithrift-dev.dep | 2 +-
 platform/innovium/libsaithrift-dev.dep | 2 +-
 platform/marvell/libsaithrift-dev.dep  | 2 +-
 platform/vs/libsaithrift-dev.dep       | 2 +-
 rules/sairedis.dep                     | 2 +-
 rules/syncd.dep                        | 2 +-
 6 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/platform/broadcom/libsaithrift-dev.dep b/platform/broadcom/libsaithrift-dev.dep
index 2ae010624..632095d3a 100644
--- a/platform/broadcom/libsaithrift-dev.dep
+++ b/platform/broadcom/libsaithrift-dev.dep
@@ -2,7 +2,7 @@
 SPATH       := $($(LIBSAITHRIFT_DEV)_SRC_PATH)
 DEP_FILES   := $(SONIC_COMMON_FILES_LIST) platform/broadcom/libsaithrift-dev.mk platform/broadcom/libsaithrift-dev.dep   
 DEP_FILES   += $(SONIC_COMMON_BASE_FILES_LIST)
-SMDEP_PATHS := $(SPATH)  $(SPATH)/bm/behavioral-model  $(SPATH)/test/ptf  $(SPATH)/test/saithrift/ctypesgen
+SMDEP_PATHS := $(SPATH) $(SPATH)/test/ptf  $(SPATH)/test/saithrift/ctypesgen
 $(foreach path, $(SMDEP_PATHS), $(eval $(path) :=$(filter-out $(SMDEP_PATHS),$(addprefix $(path)/, $(shell cd $(path) &&  git ls-files | grep -Ev " " )))))
 
 $(LIBSAITHRIFT_DEV)_CACHE_MODE  := GIT_CONTENT_SHA 
diff --git a/platform/innovium/libsaithrift-dev.dep b/platform/innovium/libsaithrift-dev.dep
index f9d75d284..eee628b5f 100644
--- a/platform/innovium/libsaithrift-dev.dep
+++ b/platform/innovium/libsaithrift-dev.dep
@@ -2,7 +2,7 @@
 SPATH       := $($(LIBSAITHRIFT_DEV)_SRC_PATH)
 DEP_FILES   := $(SONIC_COMMON_FILES_LIST) platform/innovium/libsaithrift-dev.mk platform/innovium/libsaithrift-dev.dep
 DEP_FILES   += $(SONIC_COMMON_BASE_FILES_LIST)
-SMDEP_PATHS := $(SPATH)  $(SPATH)/bm/behavioral-model  $(SPATH)/test/ptf  $(SPATH)/test/saithrift/ctypesgen
+SMDEP_PATHS := $(SPATH)  $(SPATH)/test/ptf  $(SPATH)/test/saithrift/ctypesgen
 $(foreach path, $(SMDEP_PATHS), $(eval $(path) :=$(filter-out $(SMDEP_PATHS),$(addprefix $(path)/, $(shell cd $(path) &&  git ls-files | grep -Ev " " )))))
 
 $(LIBSAITHRIFT_DEV)_CACHE_MODE  := GIT_CONTENT_SHA
diff --git a/platform/marvell/libsaithrift-dev.dep b/platform/marvell/libsaithrift-dev.dep
index d7d08f14a..7260effa0 100644
--- a/platform/marvell/libsaithrift-dev.dep
+++ b/platform/marvell/libsaithrift-dev.dep
@@ -1,7 +1,7 @@
 SPATH       := $($(LIBSAITHRIFT_DEV)_SRC_PATH)
 DEP_FILES   := $(SONIC_COMMON_FILES_LIST) $(PLATFORM_PATH)/libsaithrift-dev.mk $(PLATFORM_PATH)/libsaithrift-dev.dep
 DEP_FILES   += $(SONIC_COMMON_BASE_FILES_LIST)
-SMDEP_PATHS := $(SPATH)  $(SPATH)/bm/behavioral-model  $(SPATH)/test/ptf  $(SPATH)/test/saithrift/ctypesgen
+SMDEP_PATHS := $(SPATH)  $(SPATH)/test/ptf  $(SPATH)/test/saithrift/ctypesgen
 $(foreach path, $(SMDEP_PATHS), $(eval $(path) :=$(filter-out $(SMDEP_PATHS),$(addprefix $(path)/, $(shell cd $(path) &&  git ls-files | grep -Ev " " )))))
 
 $(LIBSAITHRIFT_DEV)_CACHE_MODE  := GIT_CONTENT_SHA
diff --git a/platform/vs/libsaithrift-dev.dep b/platform/vs/libsaithrift-dev.dep
index be1d3f74b..ed69b297e 100644
--- a/platform/vs/libsaithrift-dev.dep
+++ b/platform/vs/libsaithrift-dev.dep
@@ -2,7 +2,7 @@
 SPATH       := $($(LIBSAITHRIFT_DEV)_SRC_PATH)
 DEP_FILES   := $(SONIC_COMMON_FILES_LIST) platform/broadcom/libsaithrift-dev.mk platform/broadcom/libsaithrift-dev.dep
 DEP_FILES   += $(SONIC_COMMON_BASE_FILES_LIST)
-SMDEP_PATHS := $(SPATH)  $(SPATH)/bm/behavioral-model  $(SPATH)/test/ptf  $(SPATH)/test/saithrift/ctypesgen
+SMDEP_PATHS := $(SPATH)  $(SPATH)/test/ptf  $(SPATH)/test/saithrift/ctypesgen
 $(foreach path, $(SMDEP_PATHS), $(eval $(path) :=$(filter-out $(SMDEP_PATHS),$(addprefix $(path)/, $(shell cd $(path) &&  git ls-files | grep -Ev " " )))))
 
 $(LIBSAITHRIFT_DEV)_CACHE_MODE  := GIT_CONTENT_SHA
diff --git a/rules/sairedis.dep b/rules/sairedis.dep
index f501a7893..8674dc293 100644
--- a/rules/sairedis.dep
+++ b/rules/sairedis.dep
@@ -4,7 +4,7 @@ SPATH       := $($(LIBSAIREDIS)_SRC_PATH)
 DEP_FILES   := $(SONIC_COMMON_FILES_LIST) rules/sairedis.mk rules/sairedis.dep   
 DEP_FILES   += $(SONIC_COMMON_BASE_FILES_LIST)
 
-SMDEP_PATHS := $(SPATH) $(SPATH)/SAI $(SPATH)/SAI/bm/behavioral-model $(SPATH)/SAI/test/ptf $(SPATH)/SAI/test/saithrift/ctypesgen
+SMDEP_PATHS := $(SPATH) $(SPATH)/SAI $(SPATH)/SAI/test/ptf $(SPATH)/SAI/test/saithrift/ctypesgen
 $(foreach path, $(SMDEP_PATHS), $(eval $(path) :=$(filter-out $(SMDEP_PATHS),$(addprefix $(path)/, \
 					$(shell cd $(path)  && git ls-files | grep -v " ")))))
 
diff --git a/rules/syncd.dep b/rules/syncd.dep
index fe0706ff9..a9a72d4f2 100644
--- a/rules/syncd.dep
+++ b/rules/syncd.dep
@@ -6,7 +6,7 @@ SPATH       := $($(SYNCD)_SRC_PATH)
 DEP_FILES   := $(SONIC_COMMON_FILES_LIST) rules/syncd.mk rules/syncd.dep
 DEP_FILES   += $(SONIC_COMMON_BASE_FILES_LIST)
 
-SMDEP_PATHS := $(SPATH) $(SPATH)/SAI $(SPATH)/SAI/bm/behavioral-model $(SPATH)/SAI/test/ptf $(SPATH)/SAI/test/saithrift/ctypesgen
+SMDEP_PATHS := $(SPATH) $(SPATH)/SAI $(SPATH)/SAI/test/ptf $(SPATH)/SAI/test/saithrift/ctypesgen
 $(foreach path, $(SMDEP_PATHS), $(eval $(path) :=$(filter-out $(SMDEP_PATHS),$(addprefix $(path)/, \
 					$(shell cd $(path)  && git ls-files | grep -v " ")))))
 

From 4d6d808b850ecd56d42739a5313d1fb17483fe04 Mon Sep 17 00:00:00 2001
From: Ashwin Srinivasan <93744978+assrinivasan@users.noreply.github.com>
Date: Tue, 4 Jun 2024 22:00:56 -0700
Subject: [PATCH 0708/1115] Added makefile and dependencies for building
 sonic-stormond whl (#19042)

* Added makefile and dependencies for building sonic-stormond whl

* Added sonic-stormond to supervisord and wheel to pmon container makefile

* Advanced submodules of platform-common and daemons to pick up stormond

* Changed the import path of ssdutil in vendor ssdutil to match stormon changes

* Advancing the sonic-utilities submodule to include stormon-related change

* Advanced sonic-platform-daemons submodule to the latest HEAD

* Advanced sonic-utilities to include fix for test_iface_namingmode
---
 .../arista/x86_64-arista_common/plugins/ssd_util.py |  2 +-
 .../plugins/ssd_util.py                             |  4 ++--
 .../plugins/ssd_util.py                             |  4 ++--
 .../arm64-nokia_ixs7215_52xb-r0/plugins/ssd_util.py |  2 +-
 .../plugins/ssd_util.py                             |  4 ++--
 .../pensando/arm64-elba-asic-r0/plugins/ssd_util.py |  4 ++--
 .../plugins/ssd_util.py                             |  4 ++--
 .../plugins/ssd_util.py                             |  4 ++--
 .../plugins/ssd_util.py                             |  2 +-
 .../docker-pmon.supervisord.conf.j2                 | 13 +++++++++++++
 .../sonic-platform-nokia/7215-a1/utils/sonic_ssd.py |  6 +++---
 rules/docker-platform-monitor.mk                    |  1 +
 rules/sonic-stormond.dep                            | 10 ++++++++++
 rules/sonic-stormond.mk                             |  9 +++++++++
 src/sonic-platform-common                           |  2 +-
 src/sonic-utilities                                 |  2 +-
 16 files changed, 53 insertions(+), 20 deletions(-)
 create mode 100644 rules/sonic-stormond.dep
 create mode 100644 rules/sonic-stormond.mk

diff --git a/device/arista/x86_64-arista_common/plugins/ssd_util.py b/device/arista/x86_64-arista_common/plugins/ssd_util.py
index c9ca1e2a7..6e5b2ab91 100644
--- a/device/arista/x86_64-arista_common/plugins/ssd_util.py
+++ b/device/arista/x86_64-arista_common/plugins/ssd_util.py
@@ -2,4 +2,4 @@
 try:
    from arista.utils.sonic_ssd import SsdUtil
 except ImportError:
-   from sonic_platform_base.sonic_ssd.ssd_generic import SsdUtil
+   from sonic_platform_base.sonic_storage.ssd import SsdUtil
diff --git a/device/micas/arm64-micas_m2-w6010-48gt4x-fa-r0/plugins/ssd_util.py b/device/micas/arm64-micas_m2-w6010-48gt4x-fa-r0/plugins/ssd_util.py
index 95ca23e8b..d7bc16462 100644
--- a/device/micas/arm64-micas_m2-w6010-48gt4x-fa-r0/plugins/ssd_util.py
+++ b/device/micas/arm64-micas_m2-w6010-48gt4x-fa-r0/plugins/ssd_util.py
@@ -9,7 +9,7 @@
 
 try:
     import subprocess
-    from sonic_platform_base.sonic_ssd.ssd_base import SsdBase
+    from sonic_platform_base.sonic_storage.storage_base import StorageBase
 except ImportError as e:
     raise ImportError (str(e) + "- required module not found")
 
@@ -18,7 +18,7 @@
 FIRMWARE_CMD = "cat /sys/kernel/debug/mmc0/mmc0:0001/ext_csd | cut -c 509-522"
 NOT_AVAILABLE = "N/A"
 
-class SsdUtil(SsdBase):
+class SsdUtil(StorageBase):
     """
     Generic implementation of the SSD health API
     """
diff --git a/device/micas/arm64-micas_m2-w6010-48gt4x-ra-r0/plugins/ssd_util.py b/device/micas/arm64-micas_m2-w6010-48gt4x-ra-r0/plugins/ssd_util.py
index 95ca23e8b..d7bc16462 100644
--- a/device/micas/arm64-micas_m2-w6010-48gt4x-ra-r0/plugins/ssd_util.py
+++ b/device/micas/arm64-micas_m2-w6010-48gt4x-ra-r0/plugins/ssd_util.py
@@ -9,7 +9,7 @@
 
 try:
     import subprocess
-    from sonic_platform_base.sonic_ssd.ssd_base import SsdBase
+    from sonic_platform_base.sonic_storage.storage_base import StorageBase
 except ImportError as e:
     raise ImportError (str(e) + "- required module not found")
 
@@ -18,7 +18,7 @@
 FIRMWARE_CMD = "cat /sys/kernel/debug/mmc0/mmc0:0001/ext_csd | cut -c 509-522"
 NOT_AVAILABLE = "N/A"
 
-class SsdUtil(SsdBase):
+class SsdUtil(StorageBase):
     """
     Generic implementation of the SSD health API
     """
diff --git a/device/nokia/arm64-nokia_ixs7215_52xb-r0/plugins/ssd_util.py b/device/nokia/arm64-nokia_ixs7215_52xb-r0/plugins/ssd_util.py
index 11b407bb8..5ec00b69e 100644
--- a/device/nokia/arm64-nokia_ixs7215_52xb-r0/plugins/ssd_util.py
+++ b/device/nokia/arm64-nokia_ixs7215_52xb-r0/plugins/ssd_util.py
@@ -1,4 +1,4 @@
 try:
    from sonic_ssd import SsdUtil
 except ImportError:
-   from sonic_platform_base.sonic_ssd.ssd_generic import SsdUtil
\ No newline at end of file
+   from sonic_platform_base.sonic_storage.ssd import SsdUtil
\ No newline at end of file
diff --git a/device/nvidia-bluefield/arm64-nvda_bf-9009d3b600cvaa/plugins/ssd_util.py b/device/nvidia-bluefield/arm64-nvda_bf-9009d3b600cvaa/plugins/ssd_util.py
index de570f00f..22a6f3eca 100644
--- a/device/nvidia-bluefield/arm64-nvda_bf-9009d3b600cvaa/plugins/ssd_util.py
+++ b/device/nvidia-bluefield/arm64-nvda_bf-9009d3b600cvaa/plugins/ssd_util.py
@@ -1,8 +1,8 @@
 
 import os
 
-from sonic_platform_base.sonic_ssd.ssd_emmc import EmmcUtil
-from sonic_platform_base.sonic_ssd.ssd_generic import SsdUtil as SsdUtilDefault
+from sonic_platform_base.sonic_storage.emmc import EmmcUtil
+from sonic_platform_base.sonic_storage.ssd import SsdUtil as SsdUtilDefault
 
 def SsdUtil(diskdev):
    if os.path.basename(diskdev).startswith('mmcblk'):
diff --git a/device/pensando/arm64-elba-asic-r0/plugins/ssd_util.py b/device/pensando/arm64-elba-asic-r0/plugins/ssd_util.py
index 6ca016e20..e6c1b157f 100644
--- a/device/pensando/arm64-elba-asic-r0/plugins/ssd_util.py
+++ b/device/pensando/arm64-elba-asic-r0/plugins/ssd_util.py
@@ -10,14 +10,14 @@
 try:
     import re
     import subprocess
-    from sonic_platform_base.sonic_ssd.ssd_base import SsdBase
+    from sonic_platform_base.sonic_storage.storage_base import StorageBase
 except ImportError as e:
     raise ImportError (str(e) + "- required module not found")
 
 NOT_AVAILABLE = "N/A"
 MMC_DATA_PATH = "/sys/class/mmc_host/mmc0/mmc0:0001/{}"
 
-class SsdUtil(SsdBase):
+class SsdUtil(StorageBase):
     """
     Generic implementation of the SSD health API
     """
diff --git a/device/ragile/x86_64-ragile_ra-b6510-48v8c-r0/plugins/ssd_util.py b/device/ragile/x86_64-ragile_ra-b6510-48v8c-r0/plugins/ssd_util.py
index 89d3ccd77..beec4c17f 100755
--- a/device/ragile/x86_64-ragile_ra-b6510-48v8c-r0/plugins/ssd_util.py
+++ b/device/ragile/x86_64-ragile_ra-b6510-48v8c-r0/plugins/ssd_util.py
@@ -11,7 +11,7 @@
     import re
     import os
     import subprocess
-    from sonic_platform_base.sonic_ssd.ssd_base import SsdBase
+    from sonic_platform_base.sonic_storage.storage_base import StorageBase
 except ImportError as e:
     raise ImportError (str(e) + "- required module not found")
 
@@ -30,7 +30,7 @@
 INNODISK_HEALTH_ID = 169
 INNODISK_TEMPERATURE_ID = 194
 
-class SsdUtil(SsdBase):
+class SsdUtil(StorageBase):
     """
     Generic implementation of the SSD health API
     """
diff --git a/device/ragile/x86_64-ragile_ra-b6920-4s-r0/plugins/ssd_util.py b/device/ragile/x86_64-ragile_ra-b6920-4s-r0/plugins/ssd_util.py
index 268d9ab63..214c563df 100644
--- a/device/ragile/x86_64-ragile_ra-b6920-4s-r0/plugins/ssd_util.py
+++ b/device/ragile/x86_64-ragile_ra-b6920-4s-r0/plugins/ssd_util.py
@@ -2,14 +2,14 @@
 # ssd_health
 #
 
-from sonic_platform_base.sonic_ssd.ssd_base import SsdBase
+from sonic_platform_base.sonic_storage.storage_base import StorageBase
 from subprocess import Popen, PIPE
 from re import findall
 from os.path import exists
 
 NOT_AVAILABLE = "N/A"
 
-class SsdUtil(SsdBase):
+class SsdUtil(StorageBase):
 
     def __init__(self, diskdev):
         """
diff --git a/device/supermicro/x86_64-supermicro_sse_t7132s-r0/plugins/ssd_util.py b/device/supermicro/x86_64-supermicro_sse_t7132s-r0/plugins/ssd_util.py
index 3a26dbfe4..627d41f27 100644
--- a/device/supermicro/x86_64-supermicro_sse_t7132s-r0/plugins/ssd_util.py
+++ b/device/supermicro/x86_64-supermicro_sse_t7132s-r0/plugins/ssd_util.py
@@ -1,4 +1,4 @@
-from sonic_platform_base.sonic_ssd.ssd_generic import SsdUtil as SsdUtilGeneric
+from sonic_platform_base.sonic_storage.ssd import SsdUtil as SsdUtilGeneric
 
 class SsdUtil(SsdUtilGeneric):
     def parse_innodisk_info(self):
diff --git a/dockers/docker-platform-monitor/docker-pmon.supervisord.conf.j2 b/dockers/docker-platform-monitor/docker-pmon.supervisord.conf.j2
index 4673b62da..1cfd61ee8 100644
--- a/dockers/docker-platform-monitor/docker-pmon.supervisord.conf.j2
+++ b/dockers/docker-platform-monitor/docker-pmon.supervisord.conf.j2
@@ -206,3 +206,16 @@ startsecs=10
 dependent_startup=true
 dependent_startup_wait_for=rsyslogd:running
 {% endif %}
+
+{% if not skip_stormond %}
+[program:stormond]
+command=/usr/local/bin/stormond
+priority=10
+autostart=false
+autorestart=unexpected
+stdout_logfile=syslog
+stderr_logfile=syslog
+startsecs=10
+dependent_startup=true
+dependent_startup_wait_for=rsyslogd:running
+{% endif %}
diff --git a/platform/marvell/sonic-platform-nokia/7215-a1/utils/sonic_ssd.py b/platform/marvell/sonic-platform-nokia/7215-a1/utils/sonic_ssd.py
index 563a0b22c..6b2eac445 100644
--- a/platform/marvell/sonic-platform-nokia/7215-a1/utils/sonic_ssd.py
+++ b/platform/marvell/sonic-platform-nokia/7215-a1/utils/sonic_ssd.py
@@ -2,10 +2,10 @@
 import os
 
 # pylint: disable=import-error
-from sonic_platform_base.sonic_ssd.ssd_base import SsdBase
-from sonic_platform_base.sonic_ssd.ssd_generic import SsdUtil as SsdUtilDefault
+from sonic_platform_base.sonic_storage.storage_base import StorageBase
+from sonic_platform_base.sonic_storage.ssd import SsdUtil as SsdUtilDefault
 
-class EmmcUtil(SsdBase):
+class EmmcUtil(StorageBase):
    def __init__(self, diskdev):
       self.diskdev = diskdev
       self.path = os.path.join('/sys/block', os.path.basename(diskdev))
diff --git a/rules/docker-platform-monitor.mk b/rules/docker-platform-monitor.mk
index bf72808e0..71f9678b5 100644
--- a/rules/docker-platform-monitor.mk
+++ b/rules/docker-platform-monitor.mk
@@ -22,6 +22,7 @@ $(DOCKER_PLATFORM_MONITOR)_PYTHON_WHEELS += $(SONIC_SENSORMOND_PY3)
 $(DOCKER_PLATFORM_MONITOR)_PYTHON_WHEELS += $(SONIC_XCVRD_PY3)
 $(DOCKER_PLATFORM_MONITOR)_PYTHON_WHEELS += $(SONIC_YCABLED_PY3)
 $(DOCKER_PLATFORM_MONITOR)_PYTHON_WHEELS += $(SONIC_CHASSISD_PY3)
+$(DOCKER_PLATFORM_MONITOR)_PYTHON_WHEELS += $(SONIC_STORMOND_PY3)
 
 ifeq ($(PDDF_SUPPORT),y)
 $(DOCKER_PLATFORM_MONITOR)_PYTHON_WHEELS += $(PDDF_PLATFORM_API_BASE_PY3)
diff --git a/rules/sonic-stormond.dep b/rules/sonic-stormond.dep
new file mode 100644
index 000000000..94b019913
--- /dev/null
+++ b/rules/sonic-stormond.dep
@@ -0,0 +1,10 @@
+SPATH:= $($(SONIC_STORMOND_PY3)_SRC_PATH)
+DEP_FILES:= $(SONIC_COMMON_FILES_LIST) rules/sonic-stormond.mk rules/sonic-stormond.dep
+DEP_FILES+= $(SONIC_COMMON_BASE_FILES_LIST)
+SMDEP_FILES:= $(addprefix $(SPATH)/,$(shell cd $(SPATH) && git ls-files))
+
+$(SONIC_STORMOND_PY3)_CACHE_MODE:= GIT_CONTENT_SHA
+$(SONIC_STORMOND_PY3)_DEP_FLAGS:= $(SONIC_COMMON_FLAGS_LIST)
+$(SONIC_STORMOND_PY3)_DEP_FILES:= $(DEP_FILES)
+$(SONIC_STORMOND_PY3)_SMDEP_FILES:= $(SMDEP_FILES)
+$(SONIC_STORMOND_PY3)_SMDEP_PATHS:= $(SPATH)
diff --git a/rules/sonic-stormond.mk b/rules/sonic-stormond.mk
new file mode 100644
index 000000000..714dd61df
--- /dev/null
+++ b/rules/sonic-stormond.mk
@@ -0,0 +1,9 @@
+# sonic-stormond (SONiC Storage Monitoring daemon) Debian package
+
+# SONIC_STORMOND_PY3 package
+
+SONIC_STORMOND_PY3 = sonic_stormond-1.0-py3-none-any.whl
+$(SONIC_STORMOND_PY3)_SRC_PATH = $(SRC_PATH)/sonic-platform-daemons/sonic-stormond
+$(SONIC_STORMOND_PY3)_DEPENDS = $(SONIC_PY_COMMON_PY3)
+$(SONIC_STORMOND_PY3)_PYTHON_VERSION = 3
+SONIC_PYTHON_WHEELS += $(SONIC_STORMOND_PY3)
diff --git a/src/sonic-platform-common b/src/sonic-platform-common
index 862a67c59..cd6a5a42d 160000
--- a/src/sonic-platform-common
+++ b/src/sonic-platform-common
@@ -1 +1 @@
-Subproject commit 862a67c59de267567563e003f5d0845b5f939527
+Subproject commit cd6a5a42d2d9e4973afe1bc5d8b1b5ff5f02d54c
diff --git a/src/sonic-utilities b/src/sonic-utilities
index 9b463ca54..f14ed66e8 160000
--- a/src/sonic-utilities
+++ b/src/sonic-utilities
@@ -1 +1 @@
-Subproject commit 9b463ca54b4d65cb77aa733224e2bed2ec4cd22a
+Subproject commit f14ed66e8b37801ffd217276d3103c8a881983f9

From 5c9ec20c4676e8b21004c7493d43e0d50d4e7063 Mon Sep 17 00:00:00 2001
From: abdosi <58047199+abdosi@users.noreply.github.com>
Date: Wed, 5 Jun 2024 17:54:39 +1000
Subject: [PATCH 0709/1115] [Secureboot] Revert the changes done to only do
 Kernel Signnning (#19199)

What I did:

Before this feature sonic-net/SONiC#1028 got merged their was intermediate change done to just support Kernel Signing via: #10557. However once this feature is merged : sonic-net/SONiC#1028 (Which support sign of all boot components not just Kernel) we do not need the Kernel only signing changes as it define new rules macro which just create confusion.

So as part of this PR i am reverting the Kernel -only sign PR #10557

Signed-off-by: Abhishek Dosi <abdosi@microsoft.com>
---
 Makefile.work   | 12 ------------
 build_debian.sh | 23 +----------------------
 rules/config    |  7 -------
 slave.mk        |  6 ------
 4 files changed, 1 insertion(+), 47 deletions(-)

diff --git a/Makefile.work b/Makefile.work
index 69cf6e5b1..c81fe2483 100644
--- a/Makefile.work
+++ b/Makefile.work
@@ -339,17 +339,6 @@ ifneq ($(SONIC_VERSION_CACHE_SOURCE),)
 	DOCKER_RUN += -v "$(SONIC_VERSION_CACHE_SOURCE):/vcache:rw"
 endif
 
-ifeq ($(SONIC_ENABLE_SECUREBOOT_SIGNATURE), y)
-ifneq ($(SIGNING_KEY),)
-	DOCKER_SIGNING_SOURCE := $(shell dirname $(SIGNING_KEY))
-	DOCKER_RUN += -v "$(DOCKER_SIGNING_SOURCE):$(DOCKER_SIGNING_SOURCE):ro"
-endif
-ifneq ($(SIGNING_CERT),)
-	DOCKER_SIGNING_SOURCE := $(shell dirname $(SIGNING_CERT))
-	DOCKER_RUN += -v "$(DOCKER_SIGNING_SOURCE):$(DOCKER_SIGNING_SOURCE):ro"
-endif
-endif
-
 # User name and tag for "docker-*" images created by native dockerd mode.
 ifeq ($(strip $(SONIC_CONFIG_USE_NATIVE_DOCKERD_FOR_BUILD)),y)
 DOCKER_USERNAME = $(USER_LC)
@@ -551,7 +540,6 @@ SONIC_BUILD_INSTRUCTION :=  $(MAKE) \
                            EXTRA_DOCKER_TARGETS=$(EXTRA_DOCKER_TARGETS) \
                            BUILD_LOG_TIMESTAMP=$(BUILD_LOG_TIMESTAMP) \
                            SONIC_ENABLE_IMAGE_SIGNATURE=$(ENABLE_IMAGE_SIGNATURE) \
-                           SONIC_ENABLE_SECUREBOOT_SIGNATURE=$(SONIC_ENABLE_SECUREBOOT_SIGNATURE) \
                            SECURE_UPGRADE_MODE=$(SECURE_UPGRADE_MODE) \
                            SECURE_UPGRADE_DEV_SIGNING_KEY=$(SECURE_UPGRADE_DEV_SIGNING_KEY) \
                            SECURE_UPGRADE_SIGNING_CERT=$(SECURE_UPGRADE_SIGNING_CERT) \
diff --git a/build_debian.sh b/build_debian.sh
index 08b2b720f..3763e5e25 100755
--- a/build_debian.sh
+++ b/build_debian.sh
@@ -172,24 +172,6 @@ if [[ $CONFIGURED_ARCH == amd64 ]]; then
     sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install dmidecode hdparm
 fi
 
-## Sign the Linux kernel
-# note: when flag SONIC_ENABLE_SECUREBOOT_SIGNATURE is enabled the Secure Upgrade flags should be disabled (no_sign) to avoid conflict between the features.
-if [ "$SONIC_ENABLE_SECUREBOOT_SIGNATURE" = "y" ] && [ "$SECURE_UPGRADE_MODE" != 'dev' ] && [ "$SECURE_UPGRADE_MODE" != "prod" ]; then
-    if [ ! -f $SIGNING_KEY ]; then
-       echo "Error: SONiC linux kernel signing key missing"
-       exit 1
-    fi
-    if [ ! -f $SIGNING_CERT ]; then
-       echo "Error: SONiC linux kernel signing certificate missing"
-       exit 1
-    fi
-
-    echo '[INFO] Signing SONiC linux kernel image'
-    K=$FILESYSTEM_ROOT/boot/vmlinuz-${LINUX_KERNEL_VERSION}-${CONFIGURED_ARCH}
-    sbsign --key $SIGNING_KEY --cert $SIGNING_CERT --output /tmp/${K##*/} ${K}
-    sudo cp -f /tmp/${K##*/} ${K}
-fi
-
 ## Update initramfs for booting with squashfs+overlay
 cat files/initramfs-tools/modules | sudo tee -a $FILESYSTEM_ROOT/etc/initramfs-tools/modules > /dev/null
 
@@ -696,10 +678,7 @@ sudo LANG=C chroot $FILESYSTEM_ROOT /bin/bash -c "echo 0 > /etc/fips/fips_enable
 # #################
 #   secure boot
 # #################
-if [[ $SECURE_UPGRADE_MODE == 'dev' || $SECURE_UPGRADE_MODE == "prod" && $SONIC_ENABLE_SECUREBOOT_SIGNATURE != 'y' ]]; then
-    # note: SONIC_ENABLE_SECUREBOOT_SIGNATURE is a feature that signing just kernel,
-    # SECURE_UPGRADE_MODE is signing all the boot component including kernel.
-    # its required to do not enable both features together to avoid conflicts.
+if [[ $SECURE_UPGRADE_MODE == 'dev' || $SECURE_UPGRADE_MODE == "prod" ]]; then
     echo "Secure Boot support build stage: Starting .."
 
     # debian secure boot dependecies
diff --git a/rules/config b/rules/config
index d081fd5aa..06a6f256f 100644
--- a/rules/config
+++ b/rules/config
@@ -227,13 +227,6 @@ MASTER_FLUENTD_VERSION = mariner_20230517.1
 # The relative path is build root folder.
 SONIC_ENABLE_IMAGE_SIGNATURE ?= n
 
-# SONIC_ENABLE_SECUREBOOT_SIGNATURE - enable SONiC kernel signing to support UEFI secureboot
-# To support UEFI secureboot chain of trust requires EFI kernel to be signed as a PE binary
-#     SIGNING_KEY =
-#     SIGNING_CERT =
-# The absolute path should be provided.
-SONIC_ENABLE_SECUREBOOT_SIGNATURE ?= n
-
 # Full Secure Boot feature flags.
 # SECURE_UPGRADE_DEV_SIGNING_KEY - path to development signing key, used for image signing during build
 # SECURE_UPGRADE_SIGNING_CERT - path to development signing certificate, used for image signing during build
diff --git a/slave.mk b/slave.mk
index 29f6baa25..a08778bed 100644
--- a/slave.mk
+++ b/slave.mk
@@ -1327,9 +1327,6 @@ $(addprefix $(TARGET_PATH)/, $(SONIC_RFS_TARGETS)) : $(TARGET_PATH)/% : \
 		IMAGE_TYPE=$($(installer)_IMAGE_TYPE) \
 		TARGET_PATH=$(TARGET_PATH) \
 		TRUSTED_GPG_URLS=$(TRUSTED_GPG_URLS) \
-		SONIC_ENABLE_SECUREBOOT_SIGNATURE="$(SONIC_ENABLE_SECUREBOOT_SIGNATURE)" \
-		SIGNING_KEY="$(SIGNING_KEY)" \
-		SIGNING_CERT="$(SIGNING_CERT)" \
 		PACKAGE_URL_PREFIX=$(PACKAGE_URL_PREFIX) \
 		DBGOPT='$(DBGOPT)' \
 		SONIC_VERSION_CACHE=$(SONIC_VERSION_CACHE) \
@@ -1581,9 +1578,6 @@ $(addprefix $(TARGET_PATH)/, $(SONIC_INSTALLERS)) : $(TARGET_PATH)/% : \
 		ONIE_IMAGE_PART_SIZE=$(ONIE_IMAGE_PART_SIZE) \
 		SONIC_ENFORCE_VERSIONS=$(SONIC_ENFORCE_VERSIONS) \
 		TRUSTED_GPG_URLS=$(TRUSTED_GPG_URLS) \
-		SONIC_ENABLE_SECUREBOOT_SIGNATURE="$(SONIC_ENABLE_SECUREBOOT_SIGNATURE)" \
-		SIGNING_KEY="$(SIGNING_KEY)" \
-		SIGNING_CERT="$(SIGNING_CERT)" \
 		PACKAGE_URL_PREFIX=$(PACKAGE_URL_PREFIX) \
 		DBGOPT='$(DBGOPT)' \
 		SONIC_VERSION_CACHE=$(SONIC_VERSION_CACHE) \

From ac9ca022ceef471df826f1061df54f222b2ce7fe Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Wed, 5 Jun 2024 22:01:23 +0800
Subject: [PATCH 0710/1115] [submodule] Update submodule sonic-linux-kernel to
 the latest HEAD automatically (#19201)

#### Why I did it
src/sonic-linux-kernel
```
* f9bfb90 - (HEAD -> master, origin/master, origin/HEAD) [ci] Migrate to sonicbld1es agent pool. (#397) (15 minutes ago) [Liu Shilong]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-linux-kernel | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-linux-kernel b/src/sonic-linux-kernel
index 9770e1382..f9bfb90ce 160000
--- a/src/sonic-linux-kernel
+++ b/src/sonic-linux-kernel
@@ -1 +1 @@
-Subproject commit 9770e1382add4f667d1e809a7d03de76e69a6c60
+Subproject commit f9bfb90cefbd00e0a485a0ce4f7bd60134f3eabf

From ff39ff6b13fb8fad16de31d5a72371dfb4fced05 Mon Sep 17 00:00:00 2001
From: Konstantin Vasin <126960927+k-v1@users.noreply.github.com>
Date: Wed, 5 Jun 2024 17:51:47 +0300
Subject: [PATCH 0711/1115] [build] use overlay2 for DinD by default (#19078)

overlay2 is more faster comparing to vfs (more info in #11111)
And we use this option to build SONiC almost two years.
But it may be not obvious for some people that default choice is slow.
I think we should set overlay2 as a default storage driver for DinD.
---
 rules/config | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/rules/config b/rules/config
index 06a6f256f..6425005d6 100644
--- a/rules/config
+++ b/rules/config
@@ -306,7 +306,7 @@ INCLUDE_FIPS ?= y
 ENABLE_FIPS ?= n
 
 # SONIC_SLAVE_DOCKER_DRIVER - set the sonic slave docker storage driver
-SONIC_SLAVE_DOCKER_DRIVER ?= vfs
+SONIC_SLAVE_DOCKER_DRIVER ?= overlay2
 
 # SONIC_OS_VERSION - sonic os version
 SONIC_OS_VERSION ?= 12

From f161794eda45dc3e76cbc151da000c4b4051de86 Mon Sep 17 00:00:00 2001
From: Yaqiang Zhu <zyq1512099831@gmail.com>
Date: Thu, 6 Jun 2024 00:22:24 +0800
Subject: [PATCH 0712/1115] [dhcp_relay] Revert cli for dhcp per-interface
 counter (#19154)

* Revert "add show dhcp_relay ipv4 counter entry, fix interface name offset issue (#16507)"

This reverts commit 9c1c82e9ff708616017d391213751a3b02492e6d.

* Revert "[dhcp-relay]: dhcp/dhcpv6 per interface counter support (#16377)"

This reverts commit a522a63e25e2a17ce04c57540117d339fadfb5c5.

* Remove test_show_dhcp_relay_ipv4_counter_with_enabled_dhcp_server
---
 dockers/docker-dhcp-relay/Dockerfile.j2       |   2 -
 .../test_show_dhcp6relay_counters.py          |  44 +++---
 .../cli-plugin-tests/test_show_dhcp_relay.py  |  10 --
 .../cli/show/plugins/show_dhcp_relay.py       | 131 +++---------------
 sonic-slave-bullseye/Dockerfile.j2            |   1 -
 5 files changed, 38 insertions(+), 150 deletions(-)

diff --git a/dockers/docker-dhcp-relay/Dockerfile.j2 b/dockers/docker-dhcp-relay/Dockerfile.j2
index 9d0614ce4..48375e214 100644
--- a/dockers/docker-dhcp-relay/Dockerfile.j2
+++ b/dockers/docker-dhcp-relay/Dockerfile.j2
@@ -19,8 +19,6 @@ RUN apt-get install -y libjsoncpp-dev \
 
 RUN pip3 install psutil
 
-RUN apt-get install -y libjsoncpp-dev
-
 {% if docker_dhcp_relay_debs.strip() -%}
 # Copy built Debian packages
 {{ copy_files("debs/", docker_dhcp_relay_debs.split(' '), "/debs/") }}
diff --git a/dockers/docker-dhcp-relay/cli-plugin-tests/test_show_dhcp6relay_counters.py b/dockers/docker-dhcp-relay/cli-plugin-tests/test_show_dhcp6relay_counters.py
index 7f7edca64..3cb2d2bb5 100644
--- a/dockers/docker-dhcp-relay/cli-plugin-tests/test_show_dhcp6relay_counters.py
+++ b/dockers/docker-dhcp-relay/cli-plugin-tests/test_show_dhcp6relay_counters.py
@@ -17,21 +17,24 @@
 except KeyError:
     pass
 
-expected_counts_v6 = """\
-  Message Type     Vlan1000(RX)
---------------  ---------------
-
-  Message Type     Vlan1000(TX)
---------------  ---------------
-
-"""
-
-expected_counts_v4 = """\
-  Message Type     Vlan1000(RX)
---------------  ---------------
-
-  Message Type     Vlan1000(TX)
---------------  ---------------
+expected_counts = """\
+       Message Type     Vlan1000
+-------------------  -----------
+            Unknown
+            Solicit
+          Advertise
+            Request
+            Confirm
+              Renew
+             Rebind
+              Reply
+            Release
+            Decline
+        Reconfigure
+Information-Request
+      Relay-Forward
+        Relay-Reply
+          Malformed
 
 """
 
@@ -40,14 +43,5 @@ class TestDhcp6RelayCounters(object):
     def test_show_counts(self):           
         runner = CliRunner()
         result = runner.invoke(show.dhcp6relay_counters.commands["counts"], ["-i Vlan1000"])
-        print(result.output)
-        assert result.output == expected_counts_v6
-
-class TestDhcpRelayCounters(object):
-
-    def test_show_counts(self):           
-        runner = CliRunner()
-        result = runner.invoke(show.dhcp4relay_counters.commands["counts"], ["-i Vlan1000"])
-        print(result.output)
-        assert result.output == expected_counts_v4
+        assert result.output == expected_counts
 
diff --git a/dockers/docker-dhcp-relay/cli-plugin-tests/test_show_dhcp_relay.py b/dockers/docker-dhcp-relay/cli-plugin-tests/test_show_dhcp_relay.py
index 387e052c1..de55af82d 100644
--- a/dockers/docker-dhcp-relay/cli-plugin-tests/test_show_dhcp_relay.py
+++ b/dockers/docker-dhcp-relay/cli-plugin-tests/test_show_dhcp_relay.py
@@ -173,16 +173,6 @@ def test_show_multi_dhcp_relay(test_name, test_data, fs):
     assert result == expected_output
 
 
-def test_show_dhcp_relay_ipv4_counter_with_enabled_dhcp_server():
-    with mock.patch.object(show, "is_dhcp_server_enabled", return_value=True), \
-         mock.patch.object(swsscommon.ConfigDBConnector, "connect", return_value=None), \
-         mock.patch.object(swsscommon.ConfigDBConnector, "get_table", return_value=None), \
-         mock.patch.object(click, "echo", return_value=None) as mock_echo:
-        show.ipv4_counters("Etherner1")
-        expected_param = "Unsupport to check dhcp_relay ipv4 counter when dhcp_server feature is enabled"
-        mock_echo.assert_called_once_with(expected_param)
-
-
 @pytest.mark.parametrize("enable_dhcp_server", [True, False])
 def test_is_dhcp_server_enabled(enable_dhcp_server):
     result = show.is_dhcp_server_enabled({"dhcp_server": {"state": "enabled" if enable_dhcp_server else "disabled"}})
diff --git a/dockers/docker-dhcp-relay/cli/show/plugins/show_dhcp_relay.py b/dockers/docker-dhcp-relay/cli/show/plugins/show_dhcp_relay.py
index 7f99102f9..d9e87b2b3 100644
--- a/dockers/docker-dhcp-relay/cli/show/plugins/show_dhcp_relay.py
+++ b/dockers/docker-dhcp-relay/cli/show/plugins/show_dhcp_relay.py
@@ -1,5 +1,4 @@
 import click
-import ast
 from natsort import natsorted
 from tabulate import tabulate
 import show.vlan as show_vlan
@@ -8,20 +7,13 @@
 from swsscommon.swsscommon import ConfigDBConnector
 from swsscommon.swsscommon import SonicV2Connector
 
+
 # STATE_DB Table
-DHCPv4_COUNTER_TABLE = 'DHCP_COUNTER_TABLE'
 DHCPv6_COUNTER_TABLE = 'DHCPv6_COUNTER_TABLE'
 
-# DHCPv4 Counter Messages
-dhcpv4_messages = [
-    "Unknown", "Discover", "Offer", "Request", "Decline", "Ack", "Nack", "Release", "Inform"
-]
-
 # DHCPv6 Counter Messages
-dhcpv6_messages = [
-    "Unknown", "Solicit", "Advertise", "Request", "Confirm", "Renew", "Rebind", "Reply", "Release", 
-    "Decline", "Reconfigure", "Information-Request", "Relay-Forward", "Relay-Reply", "Malformed"
-]
+messages = ["Unknown", "Solicit", "Advertise", "Request", "Confirm", "Renew", "Rebind", "Reply", "Release", "Decline",
+            "Reconfigure", "Information-Request", "Relay-Forward", "Relay-Reply", "Malformed"]
 
 # DHCP_RELAY Config Table
 DHCP_RELAY = 'DHCP_RELAY'
@@ -47,80 +39,6 @@ def get_dhcp_helper_address(ctx, vlan):
 
 show_vlan.VlanBrief.register_column('DHCP Helper Address', get_dhcp_helper_address)
 
-class DHCPv4_Counter(object):
-    def __init__(self):
-        self.db = SonicV2Connector(use_unix_socket_path=False)
-        self.db.connect(self.db.STATE_DB)
-        self.table_name = DHCPv4_COUNTER_TABLE + self.db.get_db_separator(self.db.STATE_DB)
-
-    def get_interface(self):
-        """ Get all names of all interfaces in DHCPv4_COUNTER_TABLE """
-        interfaces = []
-        for key in self.db.keys(self.db.STATE_DB):
-            if DHCPv4_COUNTER_TABLE in key:
-                interfaces.append(key[19:])
-        return interfaces
-
-    def get_dhcp4relay_msg_count(self, interface, dir):
-        """ Get count of a dhcprelay message """
-        value = self.db.get(self.db.STATE_DB, self.table_name + str(interface), str(dir))
-        cnts = ast.literal_eval(str(value))
-        data = []
-        if cnts is not None:
-            for k, v in cnts.items():
-                data.append([k, v])
-        return data
-
-    def clear_table(self, interface):
-        """ Reset all message counts to 0 """
-        v4_cnts = {}
-        for msg in dhcpv4_messages:
-            v4_cnts[msg] = '0'
-        self.db.set(self.db.STATE_DB, self.table_name + str(interface), str("RX"), str(v4_cnts))
-        self.db.set(self.db.STATE_DB, self.table_name + str(interface), str("TX"), str(v4_cnts))
-
-def print_dhcpv4_count(counter, intf):
-    """Print count of each message"""
-    rx_data = counter.get_dhcp4relay_msg_count(intf, "RX")
-    print(tabulate(rx_data, headers=["Message Type", intf+"(RX)"], tablefmt='simple', stralign='right') + "\n")
-    tx_data = counter.get_dhcp4relay_msg_count(intf, "TX")
-    print(tabulate(tx_data, headers=["Message Type", intf+"(TX)"], tablefmt='simple', stralign='right') + "\n")
-
-#
-# 'dhcp4relay_counters' group ###
-#
-
-
-@click.group(cls=clicommon.AliasedGroup, name="dhcp4relay_counters")
-def dhcp4relay_counters():
-    """Show DHCPv4 counter"""
-    pass
-
-
-def ipv4_counters(interface):
-    config_db.connect()
-    feature_tbl = config_db.get_table("FEATURE")
-    if is_dhcp_server_enabled(feature_tbl):
-        click.echo("Unsupport to check dhcp_relay ipv4 counter when dhcp_server feature is enabled")
-        return
-    counter = DHCPv4_Counter()
-    counter_intf = counter.get_interface()
-
-    if interface:
-        print_dhcpv4_count(counter, interface)
-    else:
-        for intf in counter_intf:
-            print_dhcpv4_count(counter, intf)
-
-
-# 'counts' subcommand ("show dhcp4relay_counters counts")
-@dhcp4relay_counters.command('counts')
-@click.option('-i', '--interface', required=False)
-@click.option('--verbose', is_flag=True, help="Enable verbose output")
-def counts(interface, verbose):
-    """Show dhcp4relay message counts"""
-    ipv4_counters(interface)
-
 
 class DHCPv6_Counter(object):
     def __init__(self):
@@ -130,37 +48,30 @@ def __init__(self):
 
     def get_interface(self):
         """ Get all names of all interfaces in DHCPv6_COUNTER_TABLE """
-        interfaces = []
+        vlans = []
         for key in self.db.keys(self.db.STATE_DB):
             if DHCPv6_COUNTER_TABLE in key:
-                interfaces.append(key[21:])
-        return interfaces
+                vlans.append(key[21:])
+        return vlans
 
-    def get_dhcp6relay_msg_count(self, interface, dir):
+    def get_dhcp6relay_msg_count(self, interface, msg):
         """ Get count of a dhcp6relay message """
-        value = self.db.get(self.db.STATE_DB, self.table_name + str(interface), str(dir))
-        cnts = ast.literal_eval(str(value))
-        data = []
-        if cnts is not None:
-            for k, v in cnts.items():
-                data.append([k, v])
+        count = self.db.get(self.db.STATE_DB, self.table_name + str(interface), str(msg))
+        data = [str(msg), count]
         return data
 
     def clear_table(self, interface):
         """ Reset all message counts to 0 """
-        v6_cnts = {}
-        for msg in dhcpv6_messages:
-            v6_cnts[msg] = '0'
-        self.db.set(self.db.STATE_DB, self.table_name + str(interface), str("RX"), str(v6_cnts))
-        self.db.set(self.db.STATE_DB, self.table_name + str(interface), str("TX"), str(v6_cnts))
+        for msg in messages:
+            self.db.set(self.db.STATE_DB, self.table_name + str(interface), str(msg), '0')
 
 
-def print_dhcpv6_count(counter, intf):
+def print_count(counter, intf):
     """Print count of each message"""
-    rx_data = counter.get_dhcp6relay_msg_count(intf, "RX")
-    print(tabulate(rx_data, headers=["Message Type", intf+"(RX)"], tablefmt='simple', stralign='right') + "\n")
-    tx_data = counter.get_dhcp6relay_msg_count(intf, "TX")
-    print(tabulate(tx_data, headers=["Message Type", intf+"(TX)"], tablefmt='simple', stralign='right') + "\n")
+    data = []
+    for i in messages:
+        data.append(counter.get_dhcp6relay_msg_count(intf, i))
+    print(tabulate(data, headers=["Message Type", intf], tablefmt='simple', stralign='right') + "\n")
 
 
 #
@@ -179,10 +90,10 @@ def ipv6_counters(interface):
     counter_intf = counter.get_interface()
 
     if interface:
-        print_dhcpv6_count(counter, interface)
+        print_count(counter, interface)
     else:
         for intf in counter_intf:
-            print_dhcpv6_count(counter, intf)
+            print_count(counter, intf)
 
 
 # 'counts' subcommand ("show dhcp6relay_counters counts")
@@ -191,6 +102,7 @@ def ipv6_counters(interface):
 @click.option('--verbose', is_flag=True, help="Enable verbose output")
 def counts(interface, verbose):
     """Show dhcp6relay message counts"""
+
     ipv6_counters(interface)
 
 
@@ -296,10 +208,6 @@ def dhcp_relay_ipv4_destination():
 def dhcp_relay_ipv6_destination():
     get_dhcp_relay(DHCP_RELAY, DHCPV6_SERVERS, with_header=True)
 
-@dhcp_relay_ipv4.command("counters")
-@click.option('-i', '--interface', required=False)
-def dhcp_relay_ip4counters(interface):
-    ipv4_counters(interface)
 
 @dhcp_relay_ipv6.command("counters")
 @click.option('-i', '--interface', required=False)
@@ -308,7 +216,6 @@ def dhcp_relay_ip6counters(interface):
 
 
 def register(cli):
-    cli.add_command(dhcp4relay_counters)
     cli.add_command(dhcp6relay_counters)
     cli.add_command(dhcp_relay_helper)
     cli.add_command(dhcp_relay)
diff --git a/sonic-slave-bullseye/Dockerfile.j2 b/sonic-slave-bullseye/Dockerfile.j2
index 2272dac60..ea3cd41ef 100644
--- a/sonic-slave-bullseye/Dockerfile.j2
+++ b/sonic-slave-bullseye/Dockerfile.j2
@@ -359,7 +359,6 @@ RUN apt-get update && apt-get install -y eatmydata && eatmydata apt-get install
 # For DHCP Monitor tool
         libexplain-dev \
         libevent-dev \
-        libjsoncpp-dev \
 # For libyang
         swig \
 # For build dtb

From 7966f8acdbdcbac66d892267e6333368616da78a Mon Sep 17 00:00:00 2001
From: Pavan Prakash <120486223+Pavan-Nokia@users.noreply.github.com>
Date: Wed, 5 Jun 2024 17:27:54 -0400
Subject: [PATCH 0713/1115] [Nokia-7215] Enhance Watchdog service (#18850)

Mask Watchdog-control.service and make sure only one watchdog service
starts on this platform
---
 .../marvell/sonic-platform-nokia/7215/service/cpu_wdt.service   | 1 +
 .../debian/sonic-platform-nokia-7215.postinst                   | 2 ++
 2 files changed, 3 insertions(+)

diff --git a/platform/marvell/sonic-platform-nokia/7215/service/cpu_wdt.service b/platform/marvell/sonic-platform-nokia/7215/service/cpu_wdt.service
index 761deec56..993070a14 100644
--- a/platform/marvell/sonic-platform-nokia/7215/service/cpu_wdt.service
+++ b/platform/marvell/sonic-platform-nokia/7215/service/cpu_wdt.service
@@ -1,5 +1,6 @@
 [Unit]
 Description=CPU WDT
+Conflicts=watchdog-control.service
 After=nokia-7215init.service
 [Service]
 ExecStart=/usr/local/bin/cpu_wdt.py
diff --git a/platform/marvell/sonic-platform-nokia/debian/sonic-platform-nokia-7215.postinst b/platform/marvell/sonic-platform-nokia/debian/sonic-platform-nokia-7215.postinst
index 9dfcc91de..1a5f95c1a 100644
--- a/platform/marvell/sonic-platform-nokia/debian/sonic-platform-nokia-7215.postinst
+++ b/platform/marvell/sonic-platform-nokia/debian/sonic-platform-nokia-7215.postinst
@@ -9,6 +9,8 @@ systemctl restart kmod
 systemctl enable nokia-7215init.service
 systemctl start nokia-7215init.service
 
+systemctl mask --now watchdog-control.service
+
 systemctl enable cpu_wdt.service
 systemctl start cpu_wdt.service
 

From 222ce1717d2d581f7b99214af5120b8f6bc00f63 Mon Sep 17 00:00:00 2001
From: Lawrence Lee <lawlee@microsoft.com>
Date: Wed, 5 Jun 2024 15:54:38 -0700
Subject: [PATCH 0714/1115] Include unresolved neighbors when comparing APPL_DB
 and kernel neighbors (#19164)

Signed-off-by: Lawrence Lee <lawlee@microsoft.com>

Include unresolved neighbors when comparing APPL_DB and kernel neighbors.
---
 files/scripts/arp_update | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/files/scripts/arp_update b/files/scripts/arp_update
index 7fd5667bc..5b2b6989e 100755
--- a/files/scripts/arp_update
+++ b/files/scripts/arp_update
@@ -178,8 +178,8 @@ while /bin/true; do
   # resolve neighbor entries from CONFIG_DB in case of mismatch with kernel
   DBNEIGH="$DBNEIGH $(sonic-db-cli CONFIG_DB keys NEIGH* | sed -e 's/|/:/g')"
 
-  KERNEIGH4=$(ip -4 neigh show | grep Vlan | grep -v 'FAILED\|INCOMPLETE' | cut -d ' ' -f 1,3  --output-delimiter=',')
-  KERNEIGH6=$(ip -6 neigh show | grep -v fe80 | grep Vlan | grep -v 'FAILED\|INCOMPLETE' | cut -d ' ' -f 1,3  --output-delimiter=',')
+  KERNEIGH4=$(ip -4 neigh show | grep Vlan | cut -d ' ' -f 1,3  --output-delimiter=',')
+  KERNEIGH6=$(ip -6 neigh show | grep -v fe80 | grep Vlan | cut -d ' ' -f 1,3  --output-delimiter=',')
   for neigh in $DBNEIGH; do
       intf="$( cut -d ':' -f 2 <<< "$neigh" )"
       ip="$( cut -d ':' -f 3- <<< "$neigh" )"

From 962577ac0245063df69969b9fe74fa028b69b933 Mon Sep 17 00:00:00 2001
From: Sudharsan Dhamal Gopalarathnam <sudharsand@nvidia.com>
Date: Wed, 5 Jun 2024 15:57:47 -0700
Subject: [PATCH 0715/1115] [Mellanox]Updating SDK/FW to 4.6.4062/2012.4062 SAI
 to SAIBuild2405.28.0.30 (#19198)

- Why I did it
Updating SDK/FW to 4.6.4062/2012.4062
SAI to SAIBuild2405.28.0.30

- How I did it
Updating Makefiles

- How to verify it
Running sonic-mgmt tests
---
 platform/mellanox/fw.mk       | 12 ++++++------
 platform/mellanox/mlnx-sai.mk |  2 +-
 platform/mellanox/sdk.mk      |  2 +-
 3 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/platform/mellanox/fw.mk b/platform/mellanox/fw.mk
index 8409f6086..62014478b 100644
--- a/platform/mellanox/fw.mk
+++ b/platform/mellanox/fw.mk
@@ -21,33 +21,33 @@ MLNX_FW_BASE_PATH = $(MLNX_SDK_BASE_PATH)
 # Place an URL here to FW if you want to download FW instead
 MLNX_FW_BASE_URL =
 
-SIMX_VERSION = 24.4-1067
+SIMX_VERSION = 24.4-1091
 
 FW_FROM_URL = y
 
-MLNX_FW_ASSETS_RELEASE_TAG = fw-2012.3064
+MLNX_FW_ASSETS_RELEASE_TAG = fw-2012.4062
 MLNX_FW_ASSETS_URL = $(MLNX_ASSETS_GITHUB_URL)/releases/download/$(MLNX_FW_ASSETS_RELEASE_TAG)
 
 ifeq ($(MLNX_FW_BASE_URL), )
 MLNX_FW_BASE_URL = $(MLNX_FW_ASSETS_URL)
 endif
 
-MLNX_SPC_FW_VERSION = 13.2012.3064
+MLNX_SPC_FW_VERSION = 13.2012.4062
 MLNX_SPC_FW_FILE = fw-SPC-rel-$(subst .,_,$(MLNX_SPC_FW_VERSION))-EVB.mfa
 $(MLNX_SPC_FW_FILE)_PATH = $(MLNX_FW_BASE_PATH)
 $(MLNX_SPC_FW_FILE)_URL = $(MLNX_FW_BASE_URL)/$(MLNX_SPC_FW_FILE)
 
-MLNX_SPC2_FW_VERSION = 29.2012.3064
+MLNX_SPC2_FW_VERSION = 29.2012.4062
 MLNX_SPC2_FW_FILE = fw-SPC2-rel-$(subst .,_,$(MLNX_SPC2_FW_VERSION))-EVB.mfa
 $(MLNX_SPC2_FW_FILE)_PATH = $(MLNX_FW_BASE_PATH)
 $(MLNX_SPC2_FW_FILE)_URL = $(MLNX_FW_BASE_URL)/$(MLNX_SPC2_FW_FILE)
 
-MLNX_SPC3_FW_VERSION = 30.2012.3064
+MLNX_SPC3_FW_VERSION = 30.2012.4062
 MLNX_SPC3_FW_FILE = fw-SPC3-rel-$(subst .,_,$(MLNX_SPC3_FW_VERSION))-EVB.mfa
 $(MLNX_SPC3_FW_FILE)_PATH = $(MLNX_FW_BASE_PATH)
 $(MLNX_SPC3_FW_FILE)_URL = $(MLNX_FW_BASE_URL)/$(MLNX_SPC3_FW_FILE)
 
-MLNX_SPC4_FW_VERSION = 34.2012.3064
+MLNX_SPC4_FW_VERSION = 34.2012.4062
 MLNX_SPC4_FW_FILE = fw-SPC4-rel-$(subst .,_,$(MLNX_SPC4_FW_VERSION))-EVB.mfa
 $(MLNX_SPC4_FW_FILE)_PATH = $(MLNX_FW_BASE_PATH)
 $(MLNX_SPC4_FW_FILE)_URL = $(MLNX_FW_BASE_URL)/$(MLNX_SPC4_FW_FILE)
diff --git a/platform/mellanox/mlnx-sai.mk b/platform/mellanox/mlnx-sai.mk
index d9b3102b3..8eae89f3a 100644
--- a/platform/mellanox/mlnx-sai.mk
+++ b/platform/mellanox/mlnx-sai.mk
@@ -1,6 +1,6 @@
 # Mellanox SAI
 
-MLNX_SAI_VERSION = SAIBuild2311.27.0.16
+MLNX_SAI_VERSION = SAIBuild2405.28.0.30
 MLNX_SAI_ASSETS_GITHUB_URL = https://github.com/Mellanox/Spectrum-SDK-Drivers-SONiC-Bins
 MLNX_SAI_ASSETS_RELEASE_TAG = sai-$(MLNX_SAI_VERSION)-$(BLDENV)-$(CONFIGURED_ARCH)
 MLNX_SAI_ASSETS_URL = $(MLNX_SAI_ASSETS_GITHUB_URL)/releases/download/$(MLNX_SAI_ASSETS_RELEASE_TAG)
diff --git a/platform/mellanox/sdk.mk b/platform/mellanox/sdk.mk
index 8554e9a03..15ccedc7b 100644
--- a/platform/mellanox/sdk.mk
+++ b/platform/mellanox/sdk.mk
@@ -14,7 +14,7 @@
 # See the License for the specific language governing permissions and
 # limitations under the License.
 #
-MLNX_SDK_VERSION = 4.6.3064
+MLNX_SDK_VERSION = 4.6.4062
 MLNX_SDK_ISSU_VERSION = 101
 
 MLNX_SDK_DRIVERS_GITHUB_URL = https://github.com/Mellanox/Spectrum-SDK-Drivers

From 6fdb3cacadc842e537fb03bcced16850ab446546 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Thu, 6 Jun 2024 07:57:18 +0800
Subject: [PATCH 0716/1115] [ci/build]: Upgrade SONiC package versions (#19207)

---
 .../versions-deb-bookworm                     |  22 +-
 .../build-sonic-slave-bookworm/versions-py3   |   3 +-
 .../build-sonic-slave-bullseye/versions-py3   |   3 +-
 files/build/versions/default/versions-docker  |  29 ++-
 files/build/versions/default/versions-git     |  17 +-
 files/build/versions/default/versions-mirror  |  40 +--
 files/build/versions/default/versions-web     | 238 +++++++++++++-----
 .../versions-deb-bookworm                     |  10 +-
 .../versions-deb-bullseye                     |   1 -
 .../versions-deb-bullseye-armhf               |   1 -
 .../versions-py3                              |   2 +-
 .../versions-deb-bullseye                     |   2 +-
 .../versions-py3                              |   2 +-
 .../docker-fpm-frr/versions-deb-bookworm      |  49 ++++
 .../docker-fpm-frr/versions-deb-bullseye      |  45 ----
 .../versions-deb-bullseye                     |   2 +-
 .../versions-deb-bookworm                     |   1 +
 .../docker-platform-monitor/versions-py3      |   4 +-
 .../dockers/docker-ptf/versions-deb-buster    |   6 +-
 .../docker-sonic-mgmt-framework/versions-py3  |   4 +-
 .../docker-sonic-vs/versions-deb-bullseye     |   2 +-
 .../dockers/docker-sonic-vs/versions-py3      |   8 +-
 .../versions-deb-bullseye                     |   1 +
 .../versions-deb-bookworm                     |  53 ++++
 .../versions-deb-bullseye                     |   2 +-
 .../versions-deb-bullseye                     |   2 +-
 .../versions-deb-bullseye                     |   2 +-
 .../docker-syncd-mlnx/versions-deb-bookworm   |   2 +-
 .../versions-deb-bookworm                     |  15 +-
 .../versions-deb-bullseye                     |  23 +-
 .../versions-deb-bullseye-armhf               |   8 +-
 .../sonic-slave-buster/versions-deb-buster    |  11 +-
 .../versions/host-image/versions-deb-bookworm |  33 ++-
 files/build/versions/host-image/versions-py3  |  10 +-
 34 files changed, 429 insertions(+), 224 deletions(-)
 delete mode 100644 files/build/versions/dockers/docker-base-bullseye/versions-deb-bullseye-armhf
 create mode 100644 files/build/versions/dockers/docker-fpm-frr/versions-deb-bookworm
 delete mode 100644 files/build/versions/dockers/docker-fpm-frr/versions-deb-bullseye
 create mode 100644 files/build/versions/dockers/docker-syncd-bluefield/versions-deb-bookworm

diff --git a/files/build/versions/build/build-sonic-slave-bookworm/versions-deb-bookworm b/files/build/versions/build/build-sonic-slave-bookworm/versions-deb-bookworm
index d53a235ff..97bc192b0 100644
--- a/files/build/versions/build/build-sonic-slave-bookworm/versions-deb-bookworm
+++ b/files/build/versions/build/build-sonic-slave-bookworm/versions-deb-bookworm
@@ -1,7 +1,15 @@
 applibs==1.mlnx.4.6.3064
 applibs-dev==1.mlnx.4.6.3064
-kernel-mft-dkms==4.27.0-83
+bfscripts==4.6.0-13035
+doca-cx-libs==2.7.0034-1
+ibverbs-providers==2307mlnx47-1.2310036
+kernel-mft-dkms==4.28.0-96
+kernel-mft-dkms-modules-6.1.0-11-2-arm64==4.26.1
 libdashapi==1.0.0
+libdoca-cx-libs-dev==2.7.0034-1
+libgrpc-dev==1.39.0-1
+libibverbs-dev==2307mlnx47-1.2310036
+libibverbs1==2307mlnx47-1.2310036
 libnl-3-200==3.5.0-1
 libnl-3-dev==3.5.0-1
 libnl-cli-3-200==3.5.0-1
@@ -12,6 +20,7 @@ libnl-nf-3-200==3.5.0-1
 libnl-nf-3-dev==3.5.0-1
 libnl-route-3-200==3.5.0-1
 libnl-route-3-dev==3.5.0-1
+librxpcompiler-dev==22.05.1
 libsai==1.0.0
 libsaimetadata==1.0.0
 libsaimetadata-dev==1.0.0
@@ -33,11 +42,22 @@ libyang-dev==1.0.73
 linux-headers-6.1.0-11-2-amd64==6.1.38-4
 linux-headers-6.1.0-11-2-arm64==6.1.38-4
 linux-headers-6.1.0-11-2-common==6.1.38-4
+mft==4.26.1-3
+mlnx-dpdk==22.11.0-2404.0.2
+mlnx-dpdk-dev==22.11.0-2404.0.2
+mlnx-iproute2==6.4.0-1.2310036
+mlnx-ofed-kernel-utils==23.10.OFED.23.10.0.3.6.1-1
+mlnx-tools==23.10.0-1.2310036
+mlxbf-bootctl==2.1
+mlxbf-bootimages==4.6.0-13035
 p4lang-bmv2==1.15.0-7
 p4lang-p4c==1.2.4.2-2
 p4lang-pi==0.1.0-15
 python3-swsscommon==1.0.0
 python3-yang==1.0.73
+rdma-core==2307mlnx47-1.2310036
+rxp-compiler==22.05.1
+sdn-appliance==1.5-1mlnx1
 sonic-mgmt-common==1.0.0
 sonic-mgmt-common-codegen==1.0.0
 sonic-platform-pddf==1.1
diff --git a/files/build/versions/build/build-sonic-slave-bookworm/versions-py3 b/files/build/versions/build/build-sonic-slave-bookworm/versions-py3
index eb8e16615..cabe3e8db 100644
--- a/files/build/versions/build/build-sonic-slave-bookworm/versions-py3
+++ b/files/build/versions/build/build-sonic-slave-bookworm/versions-py3
@@ -5,7 +5,7 @@ click==7.0
 click-log==0.4.0
 colorful==0.5.6
 deepdiff==6.2.2
-docker==7.0.0
+docker==7.1.0
 docker-image-py==0.1.12
 enlighten==1.12.4
 filelock==3.14.0
@@ -40,3 +40,4 @@ urllib3==2.2.1
 wcwidth==0.2.13
 www-authenticate==0.9.2
 xmltodict==0.12.0
+zipp==1.2.0
diff --git a/files/build/versions/build/build-sonic-slave-bullseye/versions-py3 b/files/build/versions/build/build-sonic-slave-bullseye/versions-py3
index 97b8c8233..ab8c14a49 100644
--- a/files/build/versions/build/build-sonic-slave-bullseye/versions-py3
+++ b/files/build/versions/build/build-sonic-slave-bullseye/versions-py3
@@ -4,7 +4,7 @@ cffi==1.16.0
 charset-normalizer==3.3.2
 click-log==0.4.0
 colorful==0.5.6
-docker==7.0.0
+docker==7.1.0
 docker-image-py==0.1.12
 enlighten==1.12.4
 filelock==3.14.0
@@ -29,4 +29,3 @@ tabulate==0.9.0
 toposort==1.6
 www-authenticate==0.9.2
 xmltodict==0.12.0
-zipp==1.2.0
diff --git a/files/build/versions/default/versions-docker b/files/build/versions/default/versions-docker
index 75ade2ee9..0a1839900 100644
--- a/files/build/versions/default/versions-docker
+++ b/files/build/versions/default/versions-docker
@@ -1,16 +1,15 @@
-amd64:amd64/debian:bookworm==sha256:40f71cd223a60afc1bac2adf1b204bfabef29cdef725e74993f86098ff87f92f
-amd64:amd64/debian:bullseye==sha256:38fb0f1618bfa65b0cf1dd279293ebc70ef94aab2f2dc49274a2efc6ee29880e
-amd64:debian:bookworm==sha256:1aadfee8d292f64b045adb830f8a58bfacc15789ae5f489a0fedcd517a862cb9
-amd64:debian:bullseye==sha256:f860cec7ccaf31b42cd60b6a409f9dad9510ea27fca9c2864741087b4298a1e3
-amd64:debian:buster==sha256:bce46a1c39574f98c845df4a5acc6c70c211df5a6182e428c1155c33317d4920
+amd64:amd64/debian:bookworm==sha256:08f76151d500d9e021b9f793364a3e9e534433297d16ba0152d69d1914b64d17
+amd64:amd64/debian:bullseye==sha256:5f2875f43c30349791f096598cbc96a774c422eeb2405e09ac4a7fc97492b623
+amd64:debian:bookworm==sha256:fac2c0fd33e88dfd3bc88a872cfb78dcb167e74af6162d31724df69e482f886c
+amd64:debian:bullseye==sha256:2c7a92a41cb814c00e7d455b2bc0c90ccdb9a4ced2ffdc10e562c7a84a186032
+amd64:debian:buster==sha256:6e7bd55a5705914837aad8db01b349f4617510c11e47ccae8e87f6f14e489626
 amd64:p4lang/behavioral-model@sha256:ce45720e28a96a50f275c1b511cd84c2558b62f2cf7a7e506765183bc3fb2e32==sha256:ce45720e28a96a50f275c1b511cd84c2558b62f2cf7a7e506765183bc3fb2e32
-arm64:arm64v8/debian:bookworm==sha256:40374b5cdc928ffc606cb5c2bbf5e2b2eb6eb918a8e62104ae1f001c49dcbe3a
-arm64:arm64v8/debian:bullseye==sha256:284d075b0fd0350198c79fcb19b9b0fccac6ade8ada1b1309aee35dd223fc802
-arm64:debian:bookworm==sha256:1aadfee8d292f64b045adb830f8a58bfacc15789ae5f489a0fedcd517a862cb9
-arm64:debian:bullseye==sha256:f860cec7ccaf31b42cd60b6a409f9dad9510ea27fca9c2864741087b4298a1e3
-arm64:debian:buster==sha256:bce46a1c39574f98c845df4a5acc6c70c211df5a6182e428c1155c33317d4920
-armhf:arm32v7/debian:bookworm==sha256:4c1f203254edd0f60bf8269d57f64c3cfc238af1d13d4f8e484c05af2154046b
-armhf:arm32v7/debian:bullseye==sha256:c1205d95cc1479322f5c34df0a98f62ede571d041cb02a48ccca34209b3f7be9
-armhf:debian:bookworm==sha256:1aadfee8d292f64b045adb830f8a58bfacc15789ae5f489a0fedcd517a862cb9
-armhf:debian:bullseye==sha256:f860cec7ccaf31b42cd60b6a409f9dad9510ea27fca9c2864741087b4298a1e3
-armhf:debian:buster==sha256:bce46a1c39574f98c845df4a5acc6c70c211df5a6182e428c1155c33317d4920
+arm64:arm64v8/debian:bookworm==sha256:3d67cec2f6aa8a4d6aa496ae8097747f216fe850aebc8db99548cb8a85e73181
+arm64:arm64v8/debian:bullseye==sha256:2fcb4b943d3c026dff3bb55f470140bea8c1ce2e05a03e62185d6f12dd131ac2
+arm64:debian:bookworm==sha256:fac2c0fd33e88dfd3bc88a872cfb78dcb167e74af6162d31724df69e482f886c
+arm64:debian:bullseye==sha256:2c7a92a41cb814c00e7d455b2bc0c90ccdb9a4ced2ffdc10e562c7a84a186032
+arm64:debian:buster==sha256:6e7bd55a5705914837aad8db01b349f4617510c11e47ccae8e87f6f14e489626
+armhf:arm32v7/debian:bookworm==sha256:c5f29bcdb75f6a394c94d3f57daa79503870d45a3cd48b4a04fda725e9bd45db
+armhf:debian:bookworm==sha256:fac2c0fd33e88dfd3bc88a872cfb78dcb167e74af6162d31724df69e482f886c
+armhf:debian:bullseye==sha256:2c7a92a41cb814c00e7d455b2bc0c90ccdb9a4ced2ffdc10e562c7a84a186032
+armhf:debian:buster==sha256:6e7bd55a5705914837aad8db01b349f4617510c11e47ccae8e87f6f14e489626
diff --git a/files/build/versions/default/versions-git b/files/build/versions/default/versions-git
index db1e94a1a..7ac0b5c3b 100644
--- a/files/build/versions/default/versions-git
+++ b/files/build/versions/default/versions-git
@@ -1,11 +1,11 @@
-https://chromium.googlesource.com/chromium/tools/depot_tools.git==6708d95ec6d819098093cd57c746636a5bb9a4ea
+https://chromium.googlesource.com/chromium/tools/depot_tools.git==ada9211999786073eb44acab46e596311523e0df
 https://github.com/aristanetworks/swi-tools.git==b5f087e4774168bf536360d43c9c509c8f14ad9f
 https://github.com/CESNET/libyang.git==4c733412e7173219166be7053940326a92699765
 https://github.com/daveolson53/audisp-tacplus.git==559c9f22edd4f2dea0ecedffb3ad9502b12a75b6
 https://github.com/daveolson53/libnss-tacplus.git==19008ab68d9d504aa58eb34d5f564755a1613b8b
 https://github.com/dyninc/OpenBFDD.git==e35f43ad8d2b3f084e96a84c392528a90d05a287
-https://github.com/flashrom/flashrom.git==85b977151b8f5717ad00b7b7204521a823ac1ad2
-https://github.com/FreeRADIUS/freeradius-server.git==3310bf65f2912231fcb1dc59b1624d6894e3ca2a
+https://github.com/flashrom/flashrom.git==e25129d9b6cf5bc39fed03cbf60af2378a3e745f
+https://github.com/FreeRADIUS/freeradius-server.git==3eb4a4b01e4b33a44b07a6ae6b50071fe09ad1f8
 https://github.com/FreeRADIUS/pam_radius.git==d802da75cbfc3062ae1b18d0bf26ac2a030ffdaa
 https://github.com/jeroennijhof/pam_tacplus.git==b839c440e33c36eced9dcbc287fcfe6237c4c4ce
 https://github.com/lguohan/gnxi.git==3adf8b97755b49947e465b5a14645f11e79fa0cd
@@ -13,10 +13,11 @@ https://github.com/Mellanox/libpsample.git==62bb27d9a49424e45191eee81df7ce0d8c74
 https://github.com/openconfig/oc-pyang.git==4607fd1987d4f586aba03b40f222015cb3ef8161
 https://github.com/p4lang/ptf.git==c554f83685186be4cfa9387eb5d6d700d2bbd7c0
 https://github.com/p4lang/scapy-vxlan.git==85ffe83da156568ee47a0750f638227e6e1d7479
-https://github.com/sflow/host-sflow==6edc82d62a1cf0f7fb821587af67e5520624f50d
+https://github.com/sflow/host-sflow==a3ce4814bb6673a314142183e22c0e710cd21292
 https://github.com/sflow/sflowtool==c42c49cb80b927a4c02e54fc26430417f18f4833
-https://github.com/sonic-net/DASH.git==2cb918fbe22eee60296c7326af530bd25b23398f
-https://github.com/thom311/libnl==49f7822961f5bc6b18cd2a2d3f3b8d2ab0896d3f
-https://salsa.debian.org/kernel-team/initramfs-tools.git==b7f5a3ceaa306212aa5c7810d5fc5faf82bc4ffe
+https://github.com/sonic-net/DASH.git==b3d7a6a61bb1d9322718e3e289603512a692b31f
+https://github.com/thom311/libnl==5248e1a45576617b349465997822cef34cbc5053
+https://salsa.debian.org/kernel-team/initramfs-tools.git==84e5c0f7dac1a17e980ed8dfb0e0e8729d9388db
 https://salsa.debian.org/sk-guest/monit.git==c9da7ebb1f35dfba17b50b5969a6e75e29cbec0d
-https://salsa.debian.org/ssh-team/openssh.git==d150d0d69246f55c711684078f47f999a4bfd6bc
+https://salsa.debian.org/ssh-team/openssh.git==096572ea878f93fe2c85d8e86e43e2281f3f46d7
+https://salsa.debian.org/tai271828/rasdaemon.git==51a7f485f8b2e2ae43e613f19c5a387595174132
diff --git a/files/build/versions/default/versions-mirror b/files/build/versions/default/versions-mirror
index 9ed36688b..8fbce29f2 100644
--- a/files/build/versions/default/versions-mirror
+++ b/files/build/versions/default/versions-mirror
@@ -1,24 +1,24 @@
 archive.ubuntu.com_ubuntu_dists_focal==2020-04-23T17:33:17Z
-archive.ubuntu.com_ubuntu_dists_focal-backports==2023-11-13T00:36:10Z
-archive.ubuntu.com_ubuntu_dists_focal-updates==2024-05-20T01:41:38Z
+archive.ubuntu.com_ubuntu_dists_focal-backports==2024-05-31T11:48:10Z
+archive.ubuntu.com_ubuntu_dists_focal-updates==2024-06-05T02:25:09Z
 deb.nodesource.com_node%5f14.x_dists_bookworm==2023-02-17T00:35:29Z
 deb.nodesource.com_node%5f14.x_dists_bullseye==2023-02-17T00:35:28Z
 deb.nodesource.com_node%5f14.x_dists_buster==2023-02-17T00:35:28Z
-debian==20240519T000308Z
-debian-security==20240519T000258Z
-download.docker.com_linux_debian_dists_bookworm==2024-05-16T12:25:40Z
-download.docker.com_linux_debian_dists_bullseye==2024-05-16T12:25:40Z
-download.docker.com_linux_debian_dists_buster==2024-05-16T12:25:40Z
-packages.trafficmanager.net_snapshot_debian-security_20240519T000258Z_dists_bookworm-security==2024-05-17T18:44:06Z
-packages.trafficmanager.net_snapshot_debian-security_20240519T000258Z_dists_bullseye-security==2024-05-17T18:44:06Z
-packages.trafficmanager.net_snapshot_debian-security_20240519T000258Z_dists_buster_updates==2024-05-17T18:44:07Z
-packages.trafficmanager.net_snapshot_debian_20240519T000308Z_dists_bookworm==2024-02-10T11:07:25Z
-packages.trafficmanager.net_snapshot_debian_20240519T000308Z_dists_bookworm-backports==2024-05-18T20:11:44Z
-packages.trafficmanager.net_snapshot_debian_20240519T000308Z_dists_bookworm-updates==2024-05-18T20:11:44Z
-packages.trafficmanager.net_snapshot_debian_20240519T000308Z_dists_bullseye==2024-02-10T12:40:37Z
-packages.trafficmanager.net_snapshot_debian_20240519T000308Z_dists_bullseye-backports==2024-05-18T20:11:44Z
-packages.trafficmanager.net_snapshot_debian_20240519T000308Z_dists_bullseye-updates==2024-05-18T20:11:43Z
-packages.trafficmanager.net_snapshot_debian_20240519T000308Z_dists_buster==2023-06-10T08:53:33Z
-packages.trafficmanager.net_snapshot_debian_20240519T000308Z_dists_buster-backports==2024-03-09T20:54:54Z
-packages.trafficmanager.net_snapshot_debian_20240519T000308Z_dists_buster-updates==2023-06-10T08:55:10Z
-security.ubuntu.com_ubuntu_dists_focal-security==2024-05-15T17:54:08Z
+debian==20240605T000248Z
+debian-security==20240605T000248Z
+download.docker.com_linux_debian_dists_bookworm==2024-05-28T14:05:22Z
+download.docker.com_linux_debian_dists_bullseye==2024-05-28T14:05:22Z
+download.docker.com_linux_debian_dists_buster==2024-05-23T13:29:25Z
+packages.trafficmanager.net_snapshot_debian-security_20240605T000248Z_dists_bookworm-security==2024-06-02T16:19:05Z
+packages.trafficmanager.net_snapshot_debian-security_20240605T000248Z_dists_bullseye-security==2024-06-02T16:19:06Z
+packages.trafficmanager.net_snapshot_debian-security_20240605T000248Z_dists_buster_updates==2024-06-02T16:19:05Z
+packages.trafficmanager.net_snapshot_debian_20240605T000248Z_dists_bookworm==2024-02-10T11:07:25Z
+packages.trafficmanager.net_snapshot_debian_20240605T000248Z_dists_bookworm-backports==2024-06-04T20:13:32Z
+packages.trafficmanager.net_snapshot_debian_20240605T000248Z_dists_bookworm-updates==2024-06-04T20:13:32Z
+packages.trafficmanager.net_snapshot_debian_20240605T000248Z_dists_bullseye==2024-02-10T12:40:37Z
+packages.trafficmanager.net_snapshot_debian_20240605T000248Z_dists_bullseye-backports==2024-06-04T20:13:32Z
+packages.trafficmanager.net_snapshot_debian_20240605T000248Z_dists_bullseye-updates==2024-06-04T20:13:32Z
+packages.trafficmanager.net_snapshot_debian_20240605T000248Z_dists_buster==2023-06-10T08:53:33Z
+packages.trafficmanager.net_snapshot_debian_20240605T000248Z_dists_buster-backports==2024-03-09T20:54:54Z
+packages.trafficmanager.net_snapshot_debian_20240605T000248Z_dists_buster-updates==2023-06-10T08:55:10Z
+security.ubuntu.com_ubuntu_dists_focal-security==2024-05-31T18:15:07Z
diff --git a/files/build/versions/default/versions-web b/files/build/versions/default/versions-web
index bb9655609..1147fa6e5 100644
--- a/files/build/versions/default/versions-web
+++ b/files/build/versions/default/versions-web
@@ -23,8 +23,9 @@ http://download.opensuse.org/repositories/home:/p4lang/Debian_11/p4lang-p4c_1.2.
 http://download.opensuse.org/repositories/home:/p4lang/Debian_11/p4lang-pi_0.1.0-15.debian.tar.xz==b9d8e4ce4cb66385250cf6dded0ef57a
 http://download.opensuse.org/repositories/home:/p4lang/Debian_11/p4lang-pi_0.1.0-15.dsc==9bfdfc3b6bf96e4e8c3a6a72fc56fded
 http://download.opensuse.org/repositories/home:/p4lang/Debian_11/p4lang-pi_0.1.0.orig.tar.gz==551d3780d615557674e93fa11210499d
-http://www.iana.org/assignments/enterprise-numbers.txt==a08ba53e0976a8776b3b1a2cc9f91feb
-http://www.mellanox.com/downloads/MFT/mft-4.27.0-83-x86_64-deb.tgz==e475ca87a9252ba8d0abb6b05d5d94d0
+http://www.iana.org/assignments/enterprise-numbers.txt==63fa3879db4888f790293029f63dbac6
+http://www.mellanox.com/downloads/MFT/mft-4.26.1-3-arm64-deb.tgz==0dda58196e4a303be1b7d570d3c25e68
+http://www.mellanox.com/downloads/MFT/mft-4.28.0-96-x86_64-deb.tgz==f552e1faddc8f76fe4eb0b8902606c2a
 https://archive.apache.org/dist/thrift/0.14.1/thrift-0.14.1.tar.gz==c64434548438df2cb1e53fb27c600e85
 https://bootstrap.pypa.io/pip/2.7/get-pip.py==60e8267eb1b7bc71dc4843eb7bd294d3
 https://deb.debian.org/debian/pool/main/i/ipmitool/ipmitool_1.8.19-4.debian.tar.xz==aee97d7c05ca32815652bf899a029f9d
@@ -51,6 +52,43 @@ https://github.com/CentecNetworks/sonic-binaries/raw/master/amd64/third_party/ad
 https://github.com/CentecNetworks/sonic-binaries/raw/master/arm64/sai/libsaictc-dev_1.13.0-1_arm64.deb==1162131e154bba573bf7502d743f1d81
 https://github.com/CentecNetworks/sonic-binaries/raw/master/arm64/sai/libsaictc_1.13.0-1_arm64.deb==b8b25694a1dc9b4d8dffc2f2c04ddaed
 https://github.com/CumulusNetworks/ifupdown2/archive/3.0.0-1.tar.gz==755459b3a58fbc11625336846cea7420
+https://github.com/Mellanox/sonic-bluefield-packages/releases/download/dpu-bfsoc-4.6.0-13035-bookworm/bfscripts_4.6.0-13035_all.deb==232bdd3dcdf705530b82d1079a4bcd60
+https://github.com/Mellanox/sonic-bluefield-packages/releases/download/dpu-bfsoc-4.6.0-13035-bookworm/gpio-mlxbf3.ko==0397c082e8127d7d529e4f1dc1551855
+https://github.com/Mellanox/sonic-bluefield-packages/releases/download/dpu-bfsoc-4.6.0-13035-bookworm/mlx-bootctl.ko==addf7a88f10e8bc3278d222437aefdbb
+https://github.com/Mellanox/sonic-bluefield-packages/releases/download/dpu-bfsoc-4.6.0-13035-bookworm/mlxbf-bootctl_2.1_arm64.deb==aa521424ae27f4ec6e3348143ff1087a
+https://github.com/Mellanox/sonic-bluefield-packages/releases/download/dpu-bfsoc-4.6.0-13035-bookworm/mlxbf-bootimages-signed_4.6.0-13035_arm64.deb==4a91c6143375cf4a8bb7cfecf961c16d
+https://github.com/Mellanox/sonic-bluefield-packages/releases/download/dpu-bfsoc-4.6.0-13035-bookworm/mlxbf-gige.ko==4a439c3b2fb924f4fce5ba4293bb962e
+https://github.com/Mellanox/sonic-bluefield-packages/releases/download/dpu-bfsoc-4.6.0-13035-bookworm/mlxbf-pka.ko==7cfa549ce77aa57698864b9b3fe81ae2
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@@ -95,6 +133,9 @@ https://sonicstorage.blob.core.windows.net/debian/pool/main/l/lldpd/lldpd_1.0.16
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@@ -112,62 +153,143 @@ https://sonicstorage.blob.core.windows.net/public/debian/socat_1.7.4.1.orig.tar.
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+https://sonicstorage.blob.core.windows.net/public/fips/bullseye/0.12/arm64/python3.9-minimal_3.9.2-1+fips_arm64.deb==846cdb2b1b7a5677699128021c4a40f3
+https://sonicstorage.blob.core.windows.net/public/fips/bullseye/0.12/arm64/python3.9_3.9.2-1+fips_arm64.deb==4d6307dabcd3060235d6188cfa0346b8
+https://sonicstorage.blob.core.windows.net/public/fips/bullseye/0.12/arm64/ssh_8.4p1-5+deb11u2+fips_all.deb==d1f50482046b4b4e39fd2a0273f5ecef
+https://sonicstorage.blob.core.windows.net/public/fips/bullseye/0.12/arm64/symcrypt-openssl_0.12_arm64.deb==d59b59b4d157feedeaa27a23b35007b4
+https://sonicstorage.blob.core.windows.net/public/fips/bullseye/0.12/armhf/golang-1.15-go_1.15.15-1~deb11u4+fips_armhf.deb==62c200bd7bf79df11cfdace12a351a73
+https://sonicstorage.blob.core.windows.net/public/fips/bullseye/0.12/armhf/golang-1.15-src_1.15.15-1~deb11u4+fips_armhf.deb==644145b4473d863edc1aaf98dfc92acf
 https://sonicstorage.blob.core.windows.net/public/onie/onie-recovery-x86_64-kvm_x86_64-r0.iso==54e11e450a461b1f4ae39c3ce3f15eff
 https://sonicstorage.blob.core.windows.net/public/onie/onie-recovery-x86_64-kvm_x86_64_4_asic-r0.iso==1d8b8d3fa37f842d0184b5205be22be9
 https://sonicstorage.blob.core.windows.net/public/onie/onie-recovery-x86_64-kvm_x86_64_6_asic-r0.iso==58494305d4ac201daedf9364a1018a1b
diff --git a/files/build/versions/dockers/docker-base-bookworm/versions-deb-bookworm b/files/build/versions/dockers/docker-base-bookworm/versions-deb-bookworm
index 501094edf..023141a8f 100644
--- a/files/build/versions/dockers/docker-base-bookworm/versions-deb-bookworm
+++ b/files/build/versions/dockers/docker-base-bookworm/versions-deb-bookworm
@@ -7,8 +7,6 @@ libatomic1==12.2.0-14
 libbpf1==1:1.1.0-1
 libbrotli1==1.0.9-2+b6
 libbsd0==0.11.7-2
-libc-bin==2.36-9+deb12u7
-libc6==2.36-9+deb12u7
 libcap2-bin==1:2.66-4
 libcurl4==7.88.1-10+deb12u5
 libdaemon0==0.14-7.1
@@ -23,7 +21,7 @@ libgssapi-krb5-2==1.20.1-2+deb12u1
 libjansson4==2.14-2
 libjemalloc2==5.3.0-1
 libjq1==1.6-2.1
-libk5crypto3==1.20.1-2+deb12u1
+libk5crypto3==1.20.1-2+deb12u1+fips
 libkeyutils1==1.6.3-2
 libkrb5-3==1.20.1-2+deb12u1
 libkrb5support0==1.20.1-2+deb12u1
@@ -50,7 +48,8 @@ libsasl2-modules-db==2.1.28+dfsg-10
 libsodium23==1.0.18-1
 libsqlite3-0==3.40.1-2
 libssh2-1==1.10.0-3+b1
-libssl3==3.0.11-1~deb12u2
+libssl-dev==3.0.11-1~deb12u2+fips
+libssl3==3.0.11-1~deb12u2+fips
 libtirpc-common==1.3.3+ds-1
 libtirpc3==1.3.3+ds-1
 libwrap0==7.6.q-32
@@ -58,7 +57,7 @@ libxtables12==1.8.9-2
 libzmq5==4.3.4-6
 media-types==10.0.0
 net-tools==2.10-0.1
-openssl==3.0.11-1~deb12u2
+openssl==3.0.11-1~deb12u2+fips
 perl==5.36.0-7+deb12u1
 perl-modules-5.36==5.36.0-7+deb12u1
 procps==2:4.0.2-3
@@ -76,5 +75,6 @@ readline-common==8.2-1.3
 redis-tools==5:7.0.15-1~deb12u1
 rsyslog==8.2302.0-1
 socat==1.7.4.1-3
+symcrypt-openssl==0.1
 vim-common==2:9.0.1378-2
 vim-tiny==2:9.0.1378-2
diff --git a/files/build/versions/dockers/docker-base-bullseye/versions-deb-bullseye b/files/build/versions/dockers/docker-base-bullseye/versions-deb-bullseye
index 1a43c5332..f27b2dcab 100644
--- a/files/build/versions/dockers/docker-base-bullseye/versions-deb-bullseye
+++ b/files/build/versions/dockers/docker-base-bullseye/versions-deb-bullseye
@@ -7,7 +7,6 @@ libatomic1==10.2.1-6
 libbpf0==1:0.3-2
 libbrotli1==1.0.9-2+b2
 libbsd0==0.11.3-1+deb11u1
-libc6==2.31-13+deb11u10
 libcap2==1:2.44-1
 libcap2-bin==1:2.44-1
 libcurl4==7.74.0-1.3+deb11u11
diff --git a/files/build/versions/dockers/docker-base-bullseye/versions-deb-bullseye-armhf b/files/build/versions/dockers/docker-base-bullseye/versions-deb-bullseye-armhf
deleted file mode 100644
index 3546f534b..000000000
--- a/files/build/versions/dockers/docker-base-bullseye/versions-deb-bullseye-armhf
+++ /dev/null
@@ -1 +0,0 @@
-openssl==1.1.1w-0+deb11u1
diff --git a/files/build/versions/dockers/docker-config-engine-bookworm/versions-py3 b/files/build/versions/dockers/docker-config-engine-bookworm/versions-py3
index d28ce7ea2..22c19f5eb 100644
--- a/files/build/versions/dockers/docker-config-engine-bookworm/versions-py3
+++ b/files/build/versions/dockers/docker-config-engine-bookworm/versions-py3
@@ -5,7 +5,7 @@ jsondiff==2.0.0
 lxml==4.9.1
 natsort==6.2.1
 netaddr==0.8.0
-pyang==2.6.0
+pyang==2.6.1
 pyangbind==0.8.2
 pyyaml==6.0.1
 redis==5.0.1
diff --git a/files/build/versions/dockers/docker-config-engine-bullseye/versions-deb-bullseye b/files/build/versions/dockers/docker-config-engine-bullseye/versions-deb-bullseye
index f833c3a67..e1c0445e1 100644
--- a/files/build/versions/dockers/docker-config-engine-bullseye/versions-deb-bullseye
+++ b/files/build/versions/dockers/docker-config-engine-bullseye/versions-deb-bullseye
@@ -24,7 +24,7 @@ libxslt1-dev==1.1.34-4+deb11u1
 libxslt1.1==1.1.34-4+deb11u1
 libyang==1.0.73
 libyang-cpp==1.0.73
-linux-libc-dev==5.10.216-1
+linux-libc-dev==5.10.218-1
 python3-swsscommon==1.0.0
 python3-yang==1.0.73
 sonic-db-cli==1.0.0
diff --git a/files/build/versions/dockers/docker-config-engine-bullseye/versions-py3 b/files/build/versions/dockers/docker-config-engine-bullseye/versions-py3
index e3564c3c8..4ee744dae 100644
--- a/files/build/versions/dockers/docker-config-engine-bullseye/versions-py3
+++ b/files/build/versions/dockers/docker-config-engine-bullseye/versions-py3
@@ -5,7 +5,7 @@ jsondiff==2.0.0
 lxml==4.9.1
 natsort==6.2.1
 netaddr==0.8.0
-pyang==2.6.0
+pyang==2.6.1
 pyangbind==0.8.1
 pyyaml==6.0.1
 redis==4.5.4
diff --git a/files/build/versions/dockers/docker-fpm-frr/versions-deb-bookworm b/files/build/versions/dockers/docker-fpm-frr/versions-deb-bookworm
new file mode 100644
index 000000000..0da31e794
--- /dev/null
+++ b/files/build/versions/dockers/docker-fpm-frr/versions-deb-bookworm
@@ -0,0 +1,49 @@
+cron==3.0pl1-162
+cron-daemon-common==3.0pl1-162
+frr==8.5.4-sonic-0
+frr-dbgsym==8.5.4-sonic-0
+frr-snmp==8.5.4-sonic-0
+frr-snmp-dbgsym==8.5.4-sonic-0
+gdb==13.1-3
+gdbserver==13.1-3
+libbabeltrace1==1.5.11-1+b2
+libboost-regex1.74.0==1.74.0+ds1-21
+libc-ares2==1.18.1-3
+libcbor0.8==0.8.0-2+b1
+libcurl3-gnutls==7.88.1-10+deb12u5
+libdebuginfod-common==0.188-2.1
+libdebuginfod1==0.188-2.1
+libdw1==0.188-2.1
+libedit2==3.1-20221030-2
+libfido2-1==1.12.0-2+b1
+libglib2.0-0==2.74.6-2+deb12u2
+libgpm2==1.20.7-10+b1
+libicu72==72.1-3
+libipt2==2.0.5-1
+libjson-c5==0.16-2
+liblua5.1-0==5.1.5-9
+libmpfr6==4.2.0-1
+libpci3==1:3.9.0-4
+libpopt0==1.19+dfsg-1
+libsensors-config==1:3.6.0-7.1
+libsensors5==1:3.6.0-7.1
+libsnmp-base==5.9.3+dfsg-2
+libsnmp40==5.9.3+dfsg-2
+libsource-highlight-common==3.1.9-4.2
+libsource-highlight4v5==3.1.9-4.2+b3
+libswsscommon-dbgsym==1.0.0
+libunwind8==1.6.2-3
+libyang2==2.0.112-6
+libyang2-dbgsym==2.0.112-6
+logrotate==3.21.0-1
+lsof==4.95.0-1
+openssh-client==1:9.2p1-2+deb12u2
+pci.ids==0.0~2023.04.11-1
+sensible-utils==0.0.17+nmu1
+sonic-rsyslog-plugin==1.0.0-0
+sshpass==1.09-1+b1
+strace==6.1-0.1
+swss-dbg==1.0.0
+ucf==3.0043+nmu1
+vim==2:9.0.1378-2
+vim-runtime==2:9.0.1378-2
diff --git a/files/build/versions/dockers/docker-fpm-frr/versions-deb-bullseye b/files/build/versions/dockers/docker-fpm-frr/versions-deb-bullseye
deleted file mode 100644
index 551d1b7e5..000000000
--- a/files/build/versions/dockers/docker-fpm-frr/versions-deb-bullseye
+++ /dev/null
@@ -1,45 +0,0 @@
-cron==3.0pl1-137
-frr==8.5.4-sonic-0
-frr-dbgsym==8.5.4-sonic-0
-frr-snmp==8.5.4-sonic-0
-frr-snmp-dbgsym==8.5.4-sonic-0
-gdb==10.1-1.7
-gdbserver==10.1-1.7
-libbabeltrace1==1.5.8-1+b3
-libboost-regex1.74.0==1.74.0-9
-libc-ares2==1.17.1-1+deb11u3
-libcbor0==0.5.0+dfsg-2
-libcurl3-gnutls==7.74.0-1.3+deb11u11
-libdebuginfod1==0.183-1
-libdw1==0.183-1
-libedit2==3.1-20191231-2+b1
-libfido2-1==1.6.0-2
-libglib2.0-0==2.66.8-1+deb11u3
-libgpm2==1.20.7-8
-libicu67==67.1-7
-libipt2==2.0.3-1
-libjson-c5==0.15-2+deb11u1
-libmpfr6==4.1.0-3
-libpci3==1:3.7.0-5
-libpopt0==1.18-2
-libsensors-config==1:3.6.0-7
-libsensors5==1:3.6.0-7
-libsnmp-base==5.9+dfsg-4+deb11u1
-libsnmp40==5.9+dfsg-4+deb11u1
-libsource-highlight-common==3.1.9-3
-libsource-highlight4v5==3.1.9-3+b1
-libswsscommon-dbgsym==1.0.0
-libunwind8==1.3.2-2
-libyang2==2.0.112-6
-libyang2-dbgsym==2.0.112-6
-logrotate==3.18.0-2+deb11u2
-lsof==4.93.2+dfsg-1.1
-openssh-client==1:8.4p1-5+deb11u3
-pci.ids==0.0~2021.02.08-1
-sensible-utils==0.0.14
-sonic-rsyslog-plugin==1.0.0-0
-sshpass==1.09-1+b1
-strace==5.10-1
-swss-dbg==1.0.0
-vim==2:8.2.2434-3+deb11u1
-vim-runtime==2:8.2.2434-3+deb11u1
diff --git a/files/build/versions/dockers/docker-gbsyncd-broncos/versions-deb-bullseye b/files/build/versions/dockers/docker-gbsyncd-broncos/versions-deb-bullseye
index 99169d93b..5c4d5df38 100644
--- a/files/build/versions/dockers/docker-gbsyncd-broncos/versions-deb-bullseye
+++ b/files/build/versions/dockers/docker-gbsyncd-broncos/versions-deb-bullseye
@@ -28,7 +28,7 @@ libsource-highlight4v5==3.1.9-3+b1
 libswsscommon-dbgsym==1.0.0
 libtirpc-dev==1.3.1-1+deb11u1
 libunwind8==1.3.2-2
-linux-libc-dev==5.10.216-1
+linux-libc-dev==5.10.218-1
 openssh-client==1:8.4p1-5+deb11u3
 sshpass==1.09-1+b1
 strace==5.10-1
diff --git a/files/build/versions/dockers/docker-platform-monitor/versions-deb-bookworm b/files/build/versions/dockers/docker-platform-monitor/versions-deb-bookworm
index 066fa012d..293dabbf9 100644
--- a/files/build/versions/dockers/docker-platform-monitor/versions-deb-bookworm
+++ b/files/build/versions/dockers/docker-platform-monitor/versions-deb-bookworm
@@ -67,6 +67,7 @@ libxml2==2.9.14+dfsg-1.3~deb12u1
 libxrender1==1:0.9.10-1.1
 lm-sensors==1:3.6.0-7.1
 lm-sensors-dbgsym==1:3.6.0-7.1
+mft==4.26.1-3
 nvme-cli==2.4+really2.3-3
 openssh-client==1:9.2p1-2+deb12u2
 pci.ids==0.0~2023.04.11-1
diff --git a/files/build/versions/dockers/docker-platform-monitor/versions-py3 b/files/build/versions/dockers/docker-platform-monitor/versions-py3
index 40dd5328c..62d7ff68a 100644
--- a/files/build/versions/dockers/docker-platform-monitor/versions-py3
+++ b/files/build/versions/dockers/docker-platform-monitor/versions-py3
@@ -1,5 +1,5 @@
 attrs==22.2.0
-certifi==2024.2.2
+certifi==2024.6.2
 charset-normalizer==3.3.2
 grpcio==1.51.1
 grpcio-tools==1.51.1
@@ -12,6 +12,6 @@ protobuf==4.25.3
 psutil==5.9.8
 pyrsistent==0.18.1
 python-sdk-api==4.6.3064
-requests==2.31.0
+requests==2.32.3
 thrift==0.13.0
 urllib3==2.2.1
diff --git a/files/build/versions/dockers/docker-ptf/versions-deb-buster b/files/build/versions/dockers/docker-ptf/versions-deb-buster
index dd4ff86f9..529178c9c 100644
--- a/files/build/versions/dockers/docker-ptf/versions-deb-buster
+++ b/files/build/versions/dockers/docker-ptf/versions-deb-buster
@@ -63,7 +63,7 @@ gpgconf==2.2.12-1+deb10u2
 gpgsm==2.2.12-1+deb10u2
 graphviz==2.40.1-6+deb10u1
 gsettings-desktop-schemas==3.28.1-1
-gstreamer1.0-plugins-base==1.14.4-2+deb10u2
+gstreamer1.0-plugins-base==1.14.4-2+deb10u3
 gtk-update-icon-cache==3.24.5-1
 hicolor-icon-theme==0.17-2
 hping3==3.a2.ds2-7
@@ -71,7 +71,7 @@ ipython3==5.8.0-1+deb10u1
 iso-codes==4.2-1
 javascript-common==11
 krb5-locales==1.17-3+deb10u6
-less==487-0.1+b1
+less==487-0.1+deb10u1
 libalgorithm-diff-perl==1.19.03-2
 libalgorithm-diff-xs-perl==0.04-5+b1
 libalgorithm-merge-perl==0.08-3
@@ -187,7 +187,7 @@ libgraphite2-3==1.3.13-7
 libgs9==9.27~dfsg-2+deb10u9
 libgs9-common==9.27~dfsg-2+deb10u9
 libgssapi-krb5-2==1.17-3+deb10u6
-libgstreamer-plugins-base1.0-0==1.14.4-2+deb10u2
+libgstreamer-plugins-base1.0-0==1.14.4-2+deb10u3
 libgstreamer1.0-0==1.14.4-1
 libgtk-3-0==3.24.5-1
 libgtk-3-bin==3.24.5-1
diff --git a/files/build/versions/dockers/docker-sonic-mgmt-framework/versions-py3 b/files/build/versions/dockers/docker-sonic-mgmt-framework/versions-py3
index 2179078d0..fd8654bb5 100644
--- a/files/build/versions/dockers/docker-sonic-mgmt-framework/versions-py3
+++ b/files/build/versions/dockers/docker-sonic-mgmt-framework/versions-py3
@@ -1,5 +1,5 @@
-certifi==2024.2.2
+certifi==2024.6.2
 charset-normalizer==3.3.2
 idna==3.7
-requests==2.31.0
+requests==2.32.3
 urllib3==2.2.1
diff --git a/files/build/versions/dockers/docker-sonic-vs/versions-deb-bullseye b/files/build/versions/dockers/docker-sonic-vs/versions-deb-bullseye
index 27ec4b678..c8b815af3 100644
--- a/files/build/versions/dockers/docker-sonic-vs/versions-deb-bullseye
+++ b/files/build/versions/dockers/docker-sonic-vs/versions-deb-bullseye
@@ -104,7 +104,7 @@ libxml2==2.9.10+dfsg-6.7+deb11u4
 libxml2-dev==2.9.10+dfsg-6.7+deb11u4
 libyang2==2.0.112-6
 libzmq3-dev==4.3.4-1+deb11u1
-linux-libc-dev==5.10.216-1
+linux-libc-dev==5.10.218-1
 logrotate==3.18.0-2+deb11u2
 lsof==4.93.2+dfsg-1.1
 mailcap==3.69
diff --git a/files/build/versions/dockers/docker-sonic-vs/versions-py3 b/files/build/versions/dockers/docker-sonic-vs/versions-py3
index d0d352f18..72e3c60d5 100644
--- a/files/build/versions/dockers/docker-sonic-vs/versions-py3
+++ b/files/build/versions/dockers/docker-sonic-vs/versions-py3
@@ -1,15 +1,15 @@
 async-timeout==4.0.2
 bcrypt==3.2.2
 blessed==1.20.0
-certifi==2024.2.2
+certifi==2024.6.2
 cffi==1.16.0
 charset-normalizer==3.3.2
 click==7.0
 click-log==0.4.0
 colorful==0.5.6
-cryptography==42.0.7
+cryptography==42.0.8
 dbus-python==1.3.2
-docker==7.0.0
+docker==7.1.0
 docker-image-py==0.1.12
 enlighten==1.12.4
 filelock==3.14.0
@@ -34,7 +34,7 @@ pygobject==3.48.2
 pynacl==1.5.0
 pyroute2==0.5.14
 redis==4.5.2
-requests==2.31.0
+requests==2.32.3
 scapy==2.4.4
 semantic-version==2.10.0
 systemd-python==235
diff --git a/files/build/versions/dockers/docker-swss-layer-bullseye/versions-deb-bullseye b/files/build/versions/dockers/docker-swss-layer-bullseye/versions-deb-bullseye
index 214df182b..d917398cb 100644
--- a/files/build/versions/dockers/docker-swss-layer-bullseye/versions-deb-bullseye
+++ b/files/build/versions/dockers/docker-swss-layer-bullseye/versions-deb-bullseye
@@ -1,4 +1,5 @@
 iputils-ping==3:20210202-1
+libasan6==10.2.1-6
 libdashapi==1.0.0
 libprotobuf-lite32==3.21.12-3
 libprotobuf32==3.21.12-3
diff --git a/files/build/versions/dockers/docker-syncd-bluefield/versions-deb-bookworm b/files/build/versions/dockers/docker-syncd-bluefield/versions-deb-bookworm
new file mode 100644
index 000000000..15f6df1d4
--- /dev/null
+++ b/files/build/versions/dockers/docker-syncd-bluefield/versions-deb-bookworm
@@ -0,0 +1,53 @@
+binutils==2.40-2
+binutils-aarch64-linux-gnu==2.40-2
+binutils-dev==2.40-2
+doca-cx-libs==2.7.0034-1
+ethtool==1:6.1-1
+hwdata==0.368-1
+ibverbs-providers==2307mlnx47-1.2310036
+kmod==30+20221128-1
+libatm1==1:2.5.1-4+b2
+libbinutils==2.40-2
+libctf-nobfd0==2.40-2
+libctf0==2.40-2
+libexpat1-dev==2.5.0-1
+libgprofng0==2.40-2
+libgrpc-dev==1.39.0-1
+libibverbs-dev==2307mlnx47-1.2310036
+libibverbs1==2307mlnx47-1.2310036
+libjs-sphinxdoc==5.3.0-4
+libjs-underscore==1.13.4~dfsg+~1.11.4-3
+libjson-c5==0.16-2
+libkmod2==30+20221128-1
+libnl-3-200==3.7.0-0.2+b1
+libnl-3-dev==3.7.0-0.2+b1
+libnl-cli-3-200==3.7.0-0.2+b1
+libnl-genl-3-200==3.7.0-0.2+b1
+libnl-nf-3-200==3.7.0-0.2+b1
+libnl-route-3-200==3.7.0-0.2+b1
+libnl-route-3-dev==3.7.0-0.2+b1
+libnuma1==2.0.16-1
+libpcap0.8==1.10.3-1
+libpci3==1:3.9.0-4
+libpython3-dev==3.11.2-1+b1
+libpython3.11-dev==3.11.2-6
+librxpcompiler-dev==22.05.1
+libsaimetadata==1.0.0
+libsairedis==1.0.0
+lsof==4.95.0-1
+mft==4.26.1-3
+mlnx-dpdk==22.11.0-2404.0.2
+mlnx-iproute2==6.4.0-1.2310036
+mlnx-ofed-kernel-utils==23.10.OFED.23.10.0.3.6.1-1
+mlnx-sai==1.mlnx.SAIBuild0.0.30.0
+mlnx-tools==23.10.0-1.2310036
+pci.ids==0.0~2023.04.11-1
+pciutils==1:3.9.0-4
+python3-dev==3.11.2-1+b1
+python3-pip==23.0.1+dfsg-1
+python3.11-dev==3.11.2-6
+rxp-compiler==22.05.1
+sdn-appliance==1.5-1mlnx1
+syncd==1.0.0
+udev==252.22-1~deb12u1
+usb.ids==2024.01.20-0+deb12u1
diff --git a/files/build/versions/dockers/docker-syncd-brcm-dnx-rpc/versions-deb-bullseye b/files/build/versions/dockers/docker-syncd-brcm-dnx-rpc/versions-deb-bullseye
index ccec9b25c..200b0c679 100644
--- a/files/build/versions/dockers/docker-syncd-brcm-dnx-rpc/versions-deb-bullseye
+++ b/files/build/versions/dockers/docker-syncd-brcm-dnx-rpc/versions-deb-bullseye
@@ -57,7 +57,7 @@ libtsan0==10.2.1-6
 libubsan1==10.2.1-6
 libuv1==1.40.0-2+deb11u1
 libxml2==2.9.10+dfsg-6.7+deb11u4
-linux-libc-dev==5.10.216-1
+linux-libc-dev==5.10.218-1
 mailcap==3.69
 make==4.3-4.1
 mime-support==3.66
diff --git a/files/build/versions/dockers/docker-syncd-brcm-rpc/versions-deb-bullseye b/files/build/versions/dockers/docker-syncd-brcm-rpc/versions-deb-bullseye
index ccec9b25c..200b0c679 100644
--- a/files/build/versions/dockers/docker-syncd-brcm-rpc/versions-deb-bullseye
+++ b/files/build/versions/dockers/docker-syncd-brcm-rpc/versions-deb-bullseye
@@ -57,7 +57,7 @@ libtsan0==10.2.1-6
 libubsan1==10.2.1-6
 libuv1==1.40.0-2+deb11u1
 libxml2==2.9.10+dfsg-6.7+deb11u4
-linux-libc-dev==5.10.216-1
+linux-libc-dev==5.10.218-1
 mailcap==3.69
 make==4.3-4.1
 mime-support==3.66
diff --git a/files/build/versions/dockers/docker-syncd-centec-rpc/versions-deb-bullseye b/files/build/versions/dockers/docker-syncd-centec-rpc/versions-deb-bullseye
index ccec9b25c..200b0c679 100644
--- a/files/build/versions/dockers/docker-syncd-centec-rpc/versions-deb-bullseye
+++ b/files/build/versions/dockers/docker-syncd-centec-rpc/versions-deb-bullseye
@@ -57,7 +57,7 @@ libtsan0==10.2.1-6
 libubsan1==10.2.1-6
 libuv1==1.40.0-2+deb11u1
 libxml2==2.9.10+dfsg-6.7+deb11u4
-linux-libc-dev==5.10.216-1
+linux-libc-dev==5.10.218-1
 mailcap==3.69
 make==4.3-4.1
 mime-support==3.66
diff --git a/files/build/versions/dockers/docker-syncd-mlnx/versions-deb-bookworm b/files/build/versions/dockers/docker-syncd-mlnx/versions-deb-bookworm
index c6b09dbd0..f0be6ba0d 100644
--- a/files/build/versions/dockers/docker-syncd-mlnx/versions-deb-bookworm
+++ b/files/build/versions/dockers/docker-syncd-mlnx/versions-deb-bookworm
@@ -36,7 +36,7 @@ libtirpc-dev==1.3.3+ds-1
 libunwind8==1.6.2-3
 libxml2==2.9.14+dfsg-1.3~deb12u1
 linux-libc-dev==6.1.90-1
-mft==4.27.0-83
+mft==4.28.0-96
 mft-fwtrace-cfg==1.0.0
 mlnx-sai==1.mlnx.SAIBuild2311.27.0.16
 openssh-client==1:9.2p1-2+deb12u2
diff --git a/files/build/versions/dockers/sonic-slave-bookworm/versions-deb-bookworm b/files/build/versions/dockers/sonic-slave-bookworm/versions-deb-bookworm
index 7b30e7e95..dabe98c5a 100644
--- a/files/build/versions/dockers/sonic-slave-bookworm/versions-deb-bookworm
+++ b/files/build/versions/dockers/sonic-slave-bookworm/versions-deb-bookworm
@@ -191,8 +191,8 @@ gobject-introspection==1.74.0-3
 golang==2:1.19~1
 golang-1.19==1.19.8-2
 golang-1.19-doc==1.19.8-2
-golang-1.19-go==1.19.8-2
-golang-1.19-src==1.19.8-2
+golang-1.19-go==1.19.8-2+fips
+golang-1.19-src==1.19.8-2+fips
 golang-doc==2:1.19~1
 golang-go==2:1.19~1
 golang-src==2:1.19~1
@@ -213,9 +213,9 @@ grub2-common==2.06-13+deb12u1
 gsettings-desktop-schemas==43.0-1
 gsfonts==2:20200910-7
 gstreamer1.0-libav==1.22.0-2
-gstreamer1.0-plugins-base==1.22.0-3+deb12u1
+gstreamer1.0-plugins-base==1.22.0-3+deb12u2
 gstreamer1.0-plugins-good==1.22.0-5+deb12u1
-gstreamer1.0-x==1.22.0-3+deb12u1
+gstreamer1.0-x==1.22.0-3+deb12u2
 gtk-update-icon-cache==3.24.38-2~deb12u1
 guile-3.0-libs==3.0.8-2
 hicolor-icon-theme==0.17-2
@@ -451,11 +451,9 @@ libbsh-java==2.0b4-20
 libbz2-dev==1.0.8-5+b1
 libc-ares-dev==1.18.1-3
 libc-ares2==1.18.1-3
-libc-bin==2.36-9+deb12u7
 libc-dev-bin==2.36-9+deb12u7
 libc-devtools==2.36-9+deb12u7
 libc-l10n==2.36-9+deb12u7
-libc6==2.36-9+deb12u7
 libc6-armhf-cross==2.36-8cross1
 libc6-dbg==2.36-9+deb12u7
 libc6-dev==2.36-9+deb12u7
@@ -711,6 +709,8 @@ libgdk-pixbuf2.0-common==2.42.10+dfsg-1
 libgeronimo-annotation-1.3-spec-java==1.3-1
 libgeronimo-interceptor-3.0-spec-java==1.0.1-4
 libgetopt-long-descriptive-perl==0.111-1
+libgettextpo-dev==0.21-12
+libgettextpo0==0.21-12
 libgfapi0==10.3-5
 libgfortran-12-dev==12.2.0-14
 libgfortran5==12.2.0-14
@@ -770,7 +770,7 @@ libgspell-1-2==1.12.0-1+b2
 libgspell-1-common==1.12.0-1
 libgssapi-krb5-2==1.20.1-2+deb12u1
 libgssrpc4==1.20.1-2+deb12u1
-libgstreamer-plugins-base1.0-0==1.22.0-3+deb12u1
+libgstreamer-plugins-base1.0-0==1.22.0-3+deb12u2
 libgstreamer1.0-0==1.22.0-2
 libgtest-dev==1.12.1-0.2
 libgtk-3-0==3.24.38-2~deb12u1
@@ -1315,6 +1315,7 @@ libspice-server1==0.15.1-1
 libspreadsheet-parseexcel-perl==0.6500-4~deb12u1
 libspreadsheet-writeexcel-perl==2.40-4
 libsqlite3-0==3.40.1-2
+libsqlite3-dev==3.40.1-2
 libsratom-0-0==0.6.14-1
 libsrt1.5-gnutls==1.5.1-1
 libssh-4==0.10.6-0+deb12u1
diff --git a/files/build/versions/dockers/sonic-slave-bullseye/versions-deb-bullseye b/files/build/versions/dockers/sonic-slave-bullseye/versions-deb-bullseye
index 7e60275d0..055af05f9 100644
--- a/files/build/versions/dockers/sonic-slave-bullseye/versions-deb-bullseye
+++ b/files/build/versions/dockers/sonic-slave-bullseye/versions-deb-bullseye
@@ -205,9 +205,9 @@ gsasl-common==1.10.0-4+deb11u1
 gsettings-desktop-schemas==3.38.0-2
 gsfonts==1:8.11+urwcyr1.0.7~pre44-4.5
 gstreamer1.0-libav==1.18.4-3
-gstreamer1.0-plugins-base==1.18.4-2+deb11u1
+gstreamer1.0-plugins-base==1.18.4-2+deb11u2
 gstreamer1.0-plugins-good==1.18.4-2+deb11u2
-gstreamer1.0-x==1.18.4-2+deb11u1
+gstreamer1.0-x==1.18.4-2+deb11u2
 gtk-update-icon-cache==3.24.24-4+deb11u3
 guile-2.2-libs==2.2.7+1-6
 guile-3.0-libs==3.0.5-4
@@ -438,7 +438,6 @@ libc-ares2==1.17.1-1+deb11u3
 libc-dev-bin==2.31-13+deb11u10
 libc-devtools==2.31-13+deb11u10
 libc-l10n==2.31-13+deb11u10
-libc6==2.31-13+deb11u10
 libc6-armhf-cross==2.31-9cross4
 libc6-dbg==2.31-13+deb11u10
 libc6-dev==2.31-13+deb11u10
@@ -719,7 +718,7 @@ libgs9-common==9.53.3~dfsg-7+deb11u7
 libgsasl7==1.10.0-4+deb11u1
 libgsm1==1.0.18-2
 libgssrpc4==1.18.3-6+deb11u4
-libgstreamer-plugins-base1.0-0==1.18.4-2+deb11u1
+libgstreamer-plugins-base1.0-0==1.18.4-2+deb11u2
 libgstreamer1.0-0==1.18.4-2.1
 libgtest-dev==1.10.0.20201025-1.1
 libgtk-3-0==3.24.24-4+deb11u3
@@ -1491,14 +1490,14 @@ libzvbi0==0.2.35-18
 libzzip-0-13==0.13.62-3.3+deb11u1
 licensecheck==3.1.1-2
 lintian==2.104.0
-linux-compiler-gcc-10-x86==5.10.216-1
-linux-headers-5.10.0-29-amd64==5.10.216-1
-linux-headers-5.10.0-29-arm64==5.10.216-1
-linux-headers-5.10.0-29-common==5.10.216-1
-linux-headers-amd64==5.10.216-1
-linux-headers-arm64==5.10.216-1
-linux-kbuild-5.10==5.10.216-1
-linux-libc-dev==5.10.216-1
+linux-compiler-gcc-10-x86==5.10.218-1
+linux-headers-5.10.0-30-amd64==5.10.218-1
+linux-headers-5.10.0-30-arm64==5.10.218-1
+linux-headers-5.10.0-30-common==5.10.218-1
+linux-headers-amd64==5.10.218-1
+linux-headers-arm64==5.10.218-1
+linux-kbuild-5.10==5.10.218-1
+linux-libc-dev==5.10.218-1
 linuxdoc-tools==0.9.82-1
 llvm==1:11.0-51+nmu5
 llvm-11==1:11.0.1-2
diff --git a/files/build/versions/dockers/sonic-slave-bullseye/versions-deb-bullseye-armhf b/files/build/versions/dockers/sonic-slave-bullseye/versions-deb-bullseye-armhf
index 27aa80758..bd29040d6 100644
--- a/files/build/versions/dockers/sonic-slave-bullseye/versions-deb-bullseye-armhf
+++ b/files/build/versions/dockers/sonic-slave-bullseye/versions-deb-bullseye-armhf
@@ -1,11 +1,9 @@
 dctrl-tools==2.24-3
 dvipng==1.15-1.1
-golang-1.15-go==1.15.15-1~deb11u4
-golang-1.15-src==1.15.15-1~deb11u4
 libjpeg-dev==1:2.0.6-4
 libjpeg62-turbo-dev==1:2.0.6-4
 libunicode-linebreak-perl==0.0.20190101-1+b2
-linux-compiler-gcc-10-arm==5.10.216-1
-linux-headers-5.10.0-29-armmp==5.10.216-1
-linux-headers-armmp==5.10.216-1
+linux-compiler-gcc-10-arm==5.10.218-1
+linux-headers-5.10.0-30-armmp==5.10.218-1
+linux-headers-armmp==5.10.218-1
 nasm==2.15.05-1
diff --git a/files/build/versions/dockers/sonic-slave-buster/versions-deb-buster b/files/build/versions/dockers/sonic-slave-buster/versions-deb-buster
index cb3a5da28..c51600950 100644
--- a/files/build/versions/dockers/sonic-slave-buster/versions-deb-buster
+++ b/files/build/versions/dockers/sonic-slave-buster/versions-deb-buster
@@ -180,10 +180,10 @@ groff-base==1.22.4-3+deb10u1
 gsettings-desktop-schemas==3.28.1-1
 gsfonts==1:8.11+urwcyr1.0.7~pre44-4.4
 gstreamer1.0-libav==1.15.0.1+git20180723+db823502-2+deb10u1
-gstreamer1.0-plugins-base==1.14.4-2+deb10u2
+gstreamer1.0-plugins-base==1.14.4-2+deb10u3
 gstreamer1.0-plugins-good==1.14.4-1+deb10u3
 gstreamer1.0-plugins-ugly==1.14.4-1+deb10u2
-gstreamer1.0-x==1.14.4-2+deb10u2
+gstreamer1.0-x==1.14.4-2+deb10u3
 gtk-update-icon-cache==3.24.5-1
 guile-2.0-libs==2.0.13+1-5.1
 hicolor-icon-theme==0.17-2
@@ -211,7 +211,7 @@ kmod==26-1
 krb5-locales==1.17-3+deb10u6
 krb5-multidev==1.17-3+deb10u6
 lcov==1.13-4
-less==487-0.1+b1
+less==487-0.1+deb10u1
 lib32asan5==8.3.0-6
 lib32atomic1==8.3.0-6
 lib32gcc-8-dev==8.3.0-6
@@ -293,7 +293,7 @@ libbinutils==2.31.1-16
 libbison-dev==2:3.3.2.dfsg-1
 libbit-vector-perl==7.4-1+b5
 libblkid-dev==2.33.1-0.1+deb10u1
-libbluetooth3==5.50-1.2~deb10u4
+libbluetooth3==5.50-1.2~deb10u5
 libbluray2==1:1.1.0-1+deb10u1
 libboost-atomic1.71-dev==1.71.0-6~bpo10+1
 libboost-atomic1.71.0==1.71.0-6~bpo10+1
@@ -344,7 +344,6 @@ libc-ares-dev==1.14.0-1+deb10u4
 libc-ares2==1.14.0-1+deb10u4
 libc-dev-bin==2.28-10+deb10u3
 libc-l10n==2.28-10+deb10u3
-libc6==2.28-10+deb10u3
 libc6-dbg==2.28-10+deb10u3
 libc6-dev==2.28-10+deb10u3
 libc6-dev-i386==2.28-10+deb10u3
@@ -601,7 +600,7 @@ libgs9-common==9.27~dfsg-2+deb10u9
 libgsm1==1.0.18-2
 libgssapi-krb5-2==1.17-3+deb10u6
 libgssrpc4==1.17-3+deb10u6
-libgstreamer-plugins-base1.0-0==1.14.4-2+deb10u2
+libgstreamer-plugins-base1.0-0==1.14.4-2+deb10u3
 libgstreamer1.0-0==1.14.4-1
 libgtest-dev==1.8.1-3
 libgtk-3-0==3.24.5-1
diff --git a/files/build/versions/host-image/versions-deb-bookworm b/files/build/versions/host-image/versions-deb-bookworm
index d5af0316f..b3d1df0f7 100644
--- a/files/build/versions/host-image/versions-deb-bookworm
+++ b/files/build/versions/host-image/versions-deb-bookworm
@@ -7,10 +7,12 @@ auditd==1:3.0.9-1
 bash==5.1-2
 bash-completion==1:2.11-6
 bash-tacplus==1.0.0
+bfscripts==4.6.0-13035
 binutils==2.40-2
 binutils-aarch64-linux-gnu==2.40-2
 binutils-common==2.40-2
 binutils-x86-64-linux-gnu==2.40-2
+bluefield-platform-modules==1.0
 bridge-utils==1.7.1-1
 bsdextrautils==2.38.1-5+deb12u1
 bsdmainutils==12.1.8
@@ -80,7 +82,8 @@ isc-dhcp-client==4.4.3-P1-2
 j2cli==0.3.12b-4
 jq==1.6-2.1
 kdump-tools==1:1.8.1
-kernel-mft-dkms-modules-6.1.0-11-2-amd64==4.27.0
+kernel-mft-dkms-modules-6.1.0-11-2-amd64==4.28.0
+kernel-mft-dkms-modules-6.1.0-11-2-arm64==4.26.1
 kexec-tools==1:2.0.25-3+b1
 klibc-utils==2.0.12-1
 kmod==30+20221128-1
@@ -91,6 +94,7 @@ libapparmor1==3.0.8-3
 libargon2-1==0~20171227-0.3+deb12u1
 libasan8==12.2.0-14
 libassuan0==2.5.5-5
+libatm1==1:2.5.1-4+b2
 libatomic1==12.2.0-14
 libauparse0==1:3.0.9-1
 libbabeltrace1==1.5.11-1+b2
@@ -161,7 +165,7 @@ libjansson4==2.14-2
 libjq1==1.6-2.1
 libjs-jquery==3.6.1+dfsg+~3.5.14-1
 libjson-c5==0.16-2
-libk5crypto3==1.20.1-2+deb12u1
+libk5crypto3==1.20.1-2+deb12u1+fips
 libkeyutils1==1.6.3-2
 libklibc==2.0.12-1
 libkmod2==30+20221128-1
@@ -234,8 +238,8 @@ libsmartcols1==2.38.1-5+deb12u1
 libsodium23==1.0.18-1
 libsqlite3-0==3.40.1-2
 libssh2-1==1.10.0-3+b1
-libssl-dev==3.0.11-1~deb12u2
-libssl3==3.0.11-1~deb12u2
+libssl-dev==3.0.11-1~deb12u2+fips
+libssl3==3.0.11-1~deb12u2+fips
 libswsscommon==1.0.0
 libsysfs2==2.1.1-4
 libsystemd-shared==252.22-1~deb12u1
@@ -284,10 +288,16 @@ lsof==4.95.0-1
 makedev==2.3.1-97
 makedumpfile==1:1.7.2-1
 media-types==10.0.0
-mft==4.27.0-83
+mft==4.28.0-96
 mft-fwtrace-cfg==1.0.0
-mft-oem==4.27.0-83
+mft-oem==4.28.0-96
 minicom==2.8-2
+mlnx-iproute2==6.4.0-1.2310036
+mlnx-ofed-kernel-modules-6.1.0-11-2-arm64==23.10.OFED.23.10.0.3.6.1
+mlnx-ofed-kernel-utils==23.10.OFED.23.10.0.3.6.1-1
+mlnx-tools==23.10.0-1.2310036
+mlxbf-bootctl==2.1
+mlxbf-bootimages==4.6.0-13035
 mokutil==0.6.0-2
 monit==1:5.20.0-6
 mount==2.38.1-5+deb12u1
@@ -307,10 +317,10 @@ ntpsec-ntpdig==1.2.2+dfsg1-1+deb12u1
 ntpstat==0.0.0.1-2+b1
 nvme-cli==2.4+really2.3-3
 opennsl-modules==7.1.0.0
-openssh-client==1:9.2p1-2+deb12u1
-openssh-server==1:9.2p1-2+deb12u1
-openssh-sftp-server==1:9.2p1-2+deb12u1
-openssl==3.0.11-1~deb12u2
+openssh-client==1:9.2p1-2+deb12u2+fips
+openssh-server==1:9.2p1-2+deb12u2+fips
+openssh-sftp-server==1:9.2p1-2+deb12u2+fips
+openssl==3.0.11-1~deb12u2+fips
 pci.ids==0.0~2023.04.11-1
 pciutils==1:3.9.0-4
 perl==5.36.0-7+deb12u1
@@ -347,7 +357,7 @@ python3-yaml==6.0-3+b2
 python3-yang==1.0.73
 python3.11==3.11.2-6
 python3.11-minimal==3.11.2-6
-rasdaemon==0.6.8-1.1
+rasdaemon==0.6.8-1
 readline-common==8.2-1.3
 resolvconf==1.91+nmu1
 rpcsvc-proto==1.4.3-1
@@ -369,6 +379,7 @@ sqlite3==3.40.1-2
 squashfs-tools==1:4.5.1-1
 sudo==1.9.13p3-1+deb12u1
 sx-kernel==1.mlnx.4.6.3064
+symcrypt-openssl==0.1
 sysfsutils==2.1.1-4
 sysstat==12.6.1-1
 systemd==252.22-1~deb12u1
diff --git a/files/build/versions/host-image/versions-py3 b/files/build/versions/host-image/versions-py3
index eae03d6c4..34011efb4 100644
--- a/files/build/versions/host-image/versions-py3
+++ b/files/build/versions/host-image/versions-py3
@@ -4,7 +4,7 @@ azure-storage==0.36.0
 bcrypt==3.2.2
 bitarray==2.8.1
 blessed==1.20.0
-certifi==2024.2.2
+certifi==2024.6.2
 cffi==1.15.1
 charset-normalizer==3.3.2
 click==7.0
@@ -12,7 +12,7 @@ click-log==0.4.0
 colorful==0.5.6
 cryptography==38.0.4
 dbus-python==1.3.2
-docker==6.1.1
+docker==7.1.0
 docker-image-py==0.1.12
 enlighten==1.12.4
 filelock==3.14.0
@@ -36,7 +36,6 @@ natsort==6.2.1
 netaddr==0.8.0
 netifaces==0.11.0
 ntpsec==1.2.2
-packaging==24.0
 paramiko==2.11.0
 pathtools==0.1.2
 perf==0.1
@@ -48,7 +47,7 @@ prettyprinter==0.18.0
 protobuf==4.25.3
 psutil==5.9.8
 ptyprocess==0.7.0
-pyang==2.6.0
+pyang==2.6.1
 pyangbind==0.8.2
 pycairo==1.26.0
 pycparser==2.21
@@ -61,7 +60,7 @@ python-dateutil==2.9.0.post0
 pyyaml==6.0.1
 redis==3.5.3
 regex==2024.5.15
-requests==2.31.0
+requests==2.32.3
 scapy==2.4.4
 semantic-version==2.10.0
 setuptools==66.1.1
@@ -72,7 +71,6 @@ toposort==1.6
 urllib3==2.2.1
 watchdog==0.10.3
 wcwidth==0.2.13
-websocket-client==1.8.0
 wheel==0.38.4
 www-authenticate==0.9.2
 xmltodict==0.12.0

From bd7733774bdca3d553d4feecb7f960b6059072c9 Mon Sep 17 00:00:00 2001
From: abdosi <58047199+abdosi@users.noreply.github.com>
Date: Thu, 6 Jun 2024 17:05:18 +1000
Subject: [PATCH 0717/1115] [minigraph] Added support to parse
 "AssociatedSliceStr" attribute of minigraph (#19160)

What I did:
Added support to parse "AssociatedSliceStr" attribute of minigraph and save as slice_type as part of DEVICE_METADATA for Chassis Device Type.
Yang model are done as part of : #19094

Also as part of this change fixed issue of current device not selected correctly as asic_hostname not being correct.

Why I did:
In BGP Templates we need to take different action based on this attribute.

Signed-off-by: Abhishek Dosi <abdosi@microsoft.com>
---
 src/sonic-config-engine/minigraph.py          | 22 +++++++++++----
 .../voq_chassis_lc_single_asic.xml            | 28 +++++++++----------
 .../tests/test_chassis_cfggen.py              |  5 ++--
 3 files changed, 34 insertions(+), 21 deletions(-)

diff --git a/src/sonic-config-engine/minigraph.py b/src/sonic-config-engine/minigraph.py
index 390410067..0d5d4424c 100644
--- a/src/sonic-config-engine/minigraph.py
+++ b/src/sonic-config-engine/minigraph.py
@@ -470,6 +470,7 @@ def parse_device(device):
     deployment_id = None
     cluster = None
     d_subtype = None
+    slice_type = None
 
     for node in device:
         if node.tag == str(QName(ns, "Address")):
@@ -492,11 +493,13 @@ def parse_device(device):
             cluster = node.text
         elif node.tag == str(QName(ns, "SubType")):
             d_subtype = node.text
+        elif node.tag == str(QName(ns, "AssociatedSliceStr")) and node.text and "AZNG_Production" in node.text:
+            slice_type = "AZNG_Production"
 
     if d_type is None and str(QName(ns3, "type")) in device.attrib:
         d_type = device.attrib[str(QName(ns3, "type"))]
 
-    return (lo_prefix, lo_prefix_v6, mgmt_prefix, mgmt_prefix_v6, name, hwsku, d_type, deployment_id, cluster, d_subtype)
+    return (lo_prefix, lo_prefix_v6, mgmt_prefix, mgmt_prefix_v6, name, hwsku, d_type, deployment_id, cluster, d_subtype, slice_type)
 
 
 def calculate_lcm_for_ecmp (nhdevices_bank_map, nhip_bank_map):
@@ -634,7 +637,8 @@ def parse_png(png, hname, dpg_ecmp_content = None):
 
         if child.tag == str(QName(ns, "Devices")):
             for device in child.findall(str(QName(ns, "Device"))):
-                (lo_prefix, lo_prefix_v6, mgmt_prefix, mgmt_prefix_v6, name, hwsku, d_type, deployment_id, cluster, d_subtype) = parse_device(device)
+                (lo_prefix, lo_prefix_v6, mgmt_prefix, mgmt_prefix_v6, name, hwsku, d_type, deployment_id, cluster, d_subtype, slice_type) = \
+                                        parse_device(device)
                 device_data = {}
                 if hwsku != None:
                     device_data['hwsku'] = hwsku
@@ -654,6 +658,8 @@ def parse_png(png, hname, dpg_ecmp_content = None):
                     device_data['type'] = d_type
                 if d_subtype != None:
                     device_data['subtype'] = d_subtype
+                if slice_type != None:
+                    device_data['slice_type'] = slice_type
                 devices[name] = device_data
 
         if child.tag == str(QName(ns, "DeviceInterfaceLinks")):
@@ -775,7 +781,7 @@ def parse_asic_png(png, asic_name, hostname):
 
         if child.tag == str(QName(ns, "Devices")):
             for device in child.findall(str(QName(ns, "Device"))):
-                (lo_prefix, lo_prefix_v6, mgmt_prefix, mgmt_prefix_v6, name, hwsku, d_type, deployment_id, cluster, _) = parse_device(device)
+                (lo_prefix, lo_prefix_v6, mgmt_prefix, mgmt_prefix_v6, name, hwsku, d_type, deployment_id, cluster, _, slice_type) = parse_device(device)
                 device_data = {}
                 if hwsku != None:
                     device_data['hwsku'] = hwsku
@@ -793,6 +799,8 @@ def parse_asic_png(png, asic_name, hostname):
                     device_data['mgmt_addr_v6'] = mgmt_prefix_v6
                 if d_type != None:
                     device_data['type'] = d_type
+                if slice_type != None:
+                    device_data['slice_type'] = slice_type
                 devices[name] = device_data
 
     return (neighbors, devices, port_speeds)
@@ -2101,7 +2109,7 @@ def parse_xml(filename, platform=None, port_config_file=None, asic_name=None, hw
         current_device = [devices[key] for key in devices if key.lower() == hostname.lower()][0]
     else:
         try:
-            current_device = [devices[key] for key in devices if key.lower() == asic_name.lower()][0]
+            current_device = [devices[key] for key in devices if key.lower() == asic_hostname.lower()][0]
         except:
             current_device = {}
 
@@ -2137,6 +2145,10 @@ def parse_xml(filename, platform=None, port_config_file=None, asic_name=None, hw
     if cluster:
         results['DEVICE_METADATA']['localhost']['cluster'] = cluster
 
+    # Update Slice Type for T2/Chassis Role
+    if current_device and 'slice_type' in current_device and current_device['slice_type'] and chassis_hostname:
+        results['DEVICE_METADATA']['localhost']['slice_type'] = current_device['slice_type']
+
     if kube_data:
         results['KUBERNETES_MASTER'] = {
             'SERVER': {
@@ -2809,7 +2821,7 @@ def get_mux_cable_entries(ports, mux_cable_ports, active_active_ports, neighbors
 
 def parse_device_desc_xml(filename):
     root = ET.parse(filename).getroot()
-    (lo_prefix, lo_prefix_v6, mgmt_prefix, mgmt_prefix_v6, hostname, hwsku, d_type, _, _, _) = parse_device(root)
+    (lo_prefix, lo_prefix_v6, mgmt_prefix, mgmt_prefix_v6, hostname, hwsku, d_type, _, _, _, _) = parse_device(root)
 
     results = {}
     results['DEVICE_METADATA'] = {'localhost': {
diff --git a/src/sonic-config-engine/tests/chassis_data/voq_chassis_data/voq_chassis_lc_single_asic.xml b/src/sonic-config-engine/tests/chassis_data/voq_chassis_data/voq_chassis_lc_single_asic.xml
index 1e80a5bcb..bb237ecbd 100644
--- a/src/sonic-config-engine/tests/chassis_data/voq_chassis_data/voq_chassis_lc_single_asic.xml
+++ b/src/sonic-config-engine/tests/chassis_data/voq_chassis_data/voq_chassis_lc_single_asic.xml
@@ -45188,7 +45188,7 @@
           <a:IPPrefix>::/0</a:IPPrefix>
         </AddressV6>
         <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
-        <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+        <AssociatedSliceStr>AZNG_Production</AssociatedSliceStr>
         <AssociatedTagsStr/>
         <ChassisInternalDevices/>
         <ClusterName>TestbedForstr-sonic</ClusterName>
@@ -45215,7 +45215,7 @@
           <a:IPPrefix>::/0</a:IPPrefix>
         </AddressV6>
         <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
-        <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+        <AssociatedSliceStr>AZNG_Production</AssociatedSliceStr>
         <AssociatedTagsStr/>
         <ChassisInternalDevices/>
         <ClusterName>TestbedForstr-sonic</ClusterName>
@@ -45242,7 +45242,7 @@
           <a:IPPrefix>::/0</a:IPPrefix>
         </AddressV6>
         <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
-        <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+        <AssociatedSliceStr>AZNG_Production</AssociatedSliceStr>
         <AssociatedTagsStr/>
         <ChassisInternalDevices/>
         <ClusterName>TestbedForstr-sonic</ClusterName>
@@ -45269,7 +45269,7 @@
           <a:IPPrefix>::/0</a:IPPrefix>
         </AddressV6>
         <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
-        <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+        <AssociatedSliceStr>AZNG_Production</AssociatedSliceStr>
         <AssociatedTagsStr/>
         <ChassisInternalDevices/>
         <ClusterName>TestbedForstr-sonic</ClusterName>
@@ -45296,7 +45296,7 @@
           <a:IPPrefix>::/0</a:IPPrefix>
         </AddressV6>
         <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
-        <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+        <AssociatedSliceStr>AZNG_Production</AssociatedSliceStr>
         <AssociatedTagsStr/>
         <ChassisInternalDevices/>
         <ClusterName>TestbedForstr-sonic</ClusterName>
@@ -45323,7 +45323,7 @@
           <a:IPPrefix>::/0</a:IPPrefix>
         </AddressV6>
         <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
-        <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+        <AssociatedSliceStr>AZNG_Production</AssociatedSliceStr>
         <AssociatedTagsStr/>
         <ChassisInternalDevices/>
         <ClusterName>TestbedForstr-sonic</ClusterName>
@@ -45350,7 +45350,7 @@
           <a:IPPrefix>::/0</a:IPPrefix>
         </AddressV6>
         <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
-        <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+        <AssociatedSliceStr>AZNG_Production</AssociatedSliceStr>
         <AssociatedTagsStr/>
         <ChassisInternalDevices/>
         <ClusterName>TestbedForstr-sonic</ClusterName>
@@ -45377,7 +45377,7 @@
           <a:IPPrefix>::/0</a:IPPrefix>
         </AddressV6>
         <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
-        <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+        <AssociatedSliceStr>AZNG_Production</AssociatedSliceStr>
         <AssociatedTagsStr/>
         <ChassisInternalDevices/>
         <ClusterName>TestbedForstr-sonic</ClusterName>
@@ -45404,7 +45404,7 @@
           <a:IPPrefix>::/0</a:IPPrefix>
         </AddressV6>
         <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
-        <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+        <AssociatedSliceStr>AZNG_Production</AssociatedSliceStr>
         <AssociatedTagsStr/>
         <ChassisInternalDevices/>
         <ClusterName>TestbedForstr-sonic</ClusterName>
@@ -45431,7 +45431,7 @@
           <a:IPPrefix>::/0</a:IPPrefix>
         </AddressV6>
         <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
-        <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+        <AssociatedSliceStr>AZNG_Production</AssociatedSliceStr>
         <AssociatedTagsStr/>
         <ChassisInternalDevices/>
         <ClusterName>TestbedForstr-sonic</ClusterName>
@@ -45458,7 +45458,7 @@
           <a:IPPrefix>::/0</a:IPPrefix>
         </AddressV6>
         <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
-        <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+        <AssociatedSliceStr>AZNG_Production</AssociatedSliceStr>
         <AssociatedTagsStr/>
         <ChassisInternalDevices/>
         <ClusterName>TestbedForstr-sonic</ClusterName>
@@ -46133,7 +46133,7 @@
           <a:IPPrefix>fc00:23::1/128</a:IPPrefix>
         </AddressV6>
         <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
-        <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+        <AssociatedSliceStr>AZNG_Production</AssociatedSliceStr>
         <AssociatedTagsStr/>
         <ChassisInternalDevices/>
         <ClusterName>TestbedForstr-sonic</ClusterName>
@@ -46160,7 +46160,7 @@
           <a:IPPrefix>2a01:111:e210:5e::/128</a:IPPrefix>
         </AddressV6>
         <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
-        <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+        <AssociatedSliceStr>AZNG_Production</AssociatedSliceStr>
         <AssociatedTagsStr/>
         <ChassisInternalDevices/>
         <ClusterName>TestbedForstr-sonic</ClusterName>
@@ -46187,7 +46187,7 @@
           <a:IPPrefix>2a01:111:e210:5e::/128</a:IPPrefix>
         </AddressV6>
         <AssociatedClustersStr>TestbedForstr-sonic</AssociatedClustersStr>
-        <AssociatedSliceStr>TestbedForstr-sonic</AssociatedSliceStr>
+        <AssociatedSliceStr>AZNG_Production</AssociatedSliceStr>
         <AssociatedTagsStr>None</AssociatedTagsStr>
         <ChassisInternalDevices/>
         <ClusterName>TestbedForstr-sonic</ClusterName>
diff --git a/src/sonic-config-engine/tests/test_chassis_cfggen.py b/src/sonic-config-engine/tests/test_chassis_cfggen.py
index b4cd571bd..c309e7f2d 100644
--- a/src/sonic-config-engine/tests/test_chassis_cfggen.py
+++ b/src/sonic-config-engine/tests/test_chassis_cfggen.py
@@ -137,7 +137,8 @@ def test_device_metadata(self):
             'sub_role': 'FrontEnd',
             'switch_type': 'voq',
             'switch_id': 20,
-            'max_cores': 64})
+            'max_cores': 64,
+            'slice_type': 'AZNG_Production'})
 
     def test_port(self):
         argument = ['-m', self.sample_graph, '-p',
@@ -1156,4 +1157,4 @@ def tearDown(self):
         os.environ['CFGGEN_UNIT_TESTING'] = ''
         os.environ['CFGGEN_UNIT_TESTING_TOPOLOGY'] = ''
         if os.path.exists(self.output_file):
-            os.remove(self.output_file)
\ No newline at end of file
+            os.remove(self.output_file)

From dadf0ddf5a4d4dce6636fed8e7923dfd2b1c131d Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Thu, 6 Jun 2024 16:01:17 +0800
Subject: [PATCH 0718/1115] [submodule] Update submodule sonic-utilities to the
 latest HEAD automatically (#19225)

#### Why I did it
src/sonic-utilities
```
* 1ebd0993 - (HEAD -> master, origin/master, origin/HEAD) Fix show fabric monitor capacity command when the feature is disabled. (#3347) (8 hours ago) [jfeng-arista]
* 6829ded4 - Add W-ECMP CLI (#3253) (10 hours ago) [Nazarii Hnydyn]
* 4133ef54 - [chassis][voq] Added support for Voq Counters(SAI_SWITCH_STAT_PACKET_INTEGRITY_DROP,SAI_QUEUE_STAT_CREDIT_WD_DELETED_PACKETS) for Voq/Fabric switches (#3322) (25 hours ago) [saksarav-nokia]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-utilities | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-utilities b/src/sonic-utilities
index f14ed66e8..1ebd09938 160000
--- a/src/sonic-utilities
+++ b/src/sonic-utilities
@@ -1 +1 @@
-Subproject commit f14ed66e8b37801ffd217276d3103c8a881983f9
+Subproject commit 1ebd09938c5c95746a957d5f40009950d63a8ce1

From 68815b7c5f88e3a938249a65428aae1c5450b1ba Mon Sep 17 00:00:00 2001
From: Junchao-Mellanox <57339448+Junchao-Mellanox@users.noreply.github.com>
Date: Thu, 6 Jun 2024 17:27:18 +0800
Subject: [PATCH 0719/1115] [Mellanox] Disable TPM on SN5600 and SN5400
 platform (#19221)

Disable TPM module for SN5600 and SN5400 to avoid following error message:

ERR kernel: [    3.434153] tpm tpm0: [Firmware Bug]: TPM interrupt not working, polling instead
---
 device/mellanox/x86_64-nvidia_sn5400-r0/installer.conf | 1 +
 device/mellanox/x86_64-nvidia_sn5600-r0/installer.conf | 2 +-
 2 files changed, 2 insertions(+), 1 deletion(-)
 create mode 100644 device/mellanox/x86_64-nvidia_sn5400-r0/installer.conf

diff --git a/device/mellanox/x86_64-nvidia_sn5400-r0/installer.conf b/device/mellanox/x86_64-nvidia_sn5400-r0/installer.conf
new file mode 100644
index 000000000..d43a240ee
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5400-r0/installer.conf
@@ -0,0 +1 @@
+ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="modprobe.blacklist=tpm_tis,tpm_crb,tpm"
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/installer.conf b/device/mellanox/x86_64-nvidia_sn5600-r0/installer.conf
index c46f0eb7a..306cde03b 100644
--- a/device/mellanox/x86_64-nvidia_sn5600-r0/installer.conf
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/installer.conf
@@ -1 +1 @@
-ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="libata.force=noncq"
+ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="libata.force=noncq modprobe.blacklist=tpm_tis,tpm_crb,tpm"

From 54628b208f5ef22d32b8aaa3af4c70f23746cddf Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Thu, 6 Jun 2024 19:01:24 +0800
Subject: [PATCH 0720/1115] [submodule] Update submodule sonic-swss to the
 latest HEAD automatically (#19203)

#### Why I did it
src/sonic-swss
```
* 8f333b69 - (HEAD -> master, origin/master, origin/HEAD, origin/202405) [subnet decap] Support decap rule generation based on T0 VIP route (#3183) (22 hours ago) [Longxiang Lyu]
* 9bcb9b6e - Fixing appl_db FABRIC_MONITOR notification issue. (#3176) (25 hours ago) [jfeng-arista]
* fff544e6 - Rotate record file before writing new log. (#3158) (29 hours ago) [mint570]
* 80f52079 - Add SWSS support for link event damping feature (#2933) (29 hours ago) [Roy Yi]
* b3ebfc46 - [muxorch] Using bulker to program routes/neighbors during switchover (#3148) (29 hours ago) [Nikola Dancejic]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-swss | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-swss b/src/sonic-swss
index 98012ed41..8f333b692 160000
--- a/src/sonic-swss
+++ b/src/sonic-swss
@@ -1 +1 @@
-Subproject commit 98012ed411d4e83ac01dabbb6d03e4f122ad1545
+Subproject commit 8f333b6923083d6c575a5a5db9aa448d9cb74abc

From 78e139389c0d4520f5190ef86fb8d437da667b08 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Thu, 6 Jun 2024 19:01:30 +0800
Subject: [PATCH 0721/1115] [submodule] Update submodule sonic-sairedis to the
 latest HEAD automatically (#19131)

#### Why I did it
src/sonic-sairedis
```
* c8cede0f - (HEAD -> master, origin/master, origin/HEAD) [syncd] Enable bulk api for neighbor entries (#1373) (6 days ago) [Nikola Dancejic]
* 270fed7e - Clean up and refactor duplicated code and auto generate sai stub for libraries (#1384) (8 days ago) [Kamil Cudnik]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-sairedis | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-sairedis b/src/sonic-sairedis
index 20bcfe196..c8cede0f4 160000
--- a/src/sonic-sairedis
+++ b/src/sonic-sairedis
@@ -1 +1 @@
-Subproject commit 20bcfe1965a8f9f64e25355783994165b780839a
+Subproject commit c8cede0f405b6f6ee65fca48a8c5e4261e93fb04

From b1491945f61cb57890796c5896d7fc8c174f077d Mon Sep 17 00:00:00 2001
From: Nazarii Hnydyn <nazariig@nvidia.com>
Date: Thu, 6 Jun 2024 18:18:14 +0300
Subject: [PATCH 0722/1115] Add W-ECMP to BGP OA (#18533)

- Why I did it
W-ECMP feature implementation is according to the HLD

- How I did it
Added W-ECMP YANG model implementation
Added W-ECMP BGP OA implementation

- How to verify it
Run UTs
Verified manually with the feature qualification

Signed-off-by: Nazarii Hnydyn <nazariig@nvidia.com>
---
 .../frr/bgpd/wcmp/bgpd.wcmp.conf.j2           |  21 +++
 files/build_templates/init_cfg.json.j2        |   1 +
 .../bgpcfgd/managers_device_global.py         | 165 +++++++++++++++---
 .../tests/data/wcmp/wcmp.set.conf             |  14 ++
 .../tests/data/wcmp/wcmp.unset.conf           |  14 ++
 src/sonic-bgpcfgd/tests/test_device_global.py | 156 +++++++++++++----
 src/sonic-yang-models/doc/Configuration.md    |  35 +++-
 .../tests/files/sample_config_db.json         |   1 +
 .../tests/bgp_device_global.json              |  71 ++++++--
 .../tests_config/bgp_device_global.json       |  76 +++++---
 .../yang-models/sonic-bgp-device-global.yang  |  37 +++-
 11 files changed, 477 insertions(+), 114 deletions(-)
 create mode 100644 dockers/docker-fpm-frr/frr/bgpd/wcmp/bgpd.wcmp.conf.j2
 create mode 100644 src/sonic-bgpcfgd/tests/data/wcmp/wcmp.set.conf
 create mode 100644 src/sonic-bgpcfgd/tests/data/wcmp/wcmp.unset.conf

diff --git a/dockers/docker-fpm-frr/frr/bgpd/wcmp/bgpd.wcmp.conf.j2 b/dockers/docker-fpm-frr/frr/bgpd/wcmp/bgpd.wcmp.conf.j2
new file mode 100644
index 000000000..a570c89ac
--- /dev/null
+++ b/dockers/docker-fpm-frr/frr/bgpd/wcmp/bgpd.wcmp.conf.j2
@@ -0,0 +1,21 @@
+!
+! template: bgpd/wcmp/bgpd.wcmp.conf.j2
+!
+route-map TO_BGP_PEER_V4 permit 100
+{%- if wcmp_enabled == 'true' %}
+  set extcommunity bandwidth num-multipaths
+{%- else %}
+  no set extcommunity bandwidth
+{%- endif %}
+exit
+!
+route-map TO_BGP_PEER_V6 permit 100
+{%- if wcmp_enabled == 'true' %}
+  set extcommunity bandwidth num-multipaths
+{%- else %}
+  no set extcommunity bandwidth
+{%- endif %}
+exit
+!
+! end of template: bgpd/wcmp/bgpd.wcmp.conf.j2
+!
diff --git a/files/build_templates/init_cfg.json.j2 b/files/build_templates/init_cfg.json.j2
index 31be59e35..0a185680e 100644
--- a/files/build_templates/init_cfg.json.j2
+++ b/files/build_templates/init_cfg.json.j2
@@ -31,6 +31,7 @@
     "BGP_DEVICE_GLOBAL": {
         "STATE": {
             "tsa_enabled": "false",
+            "wcmp_enabled": "false",
             "idf_isolation_state": "unisolated"
         }
     },
diff --git a/src/sonic-bgpcfgd/bgpcfgd/managers_device_global.py b/src/sonic-bgpcfgd/bgpcfgd/managers_device_global.py
index 5c42e4415..1943dfa5d 100644
--- a/src/sonic-bgpcfgd/bgpcfgd/managers_device_global.py
+++ b/src/sonic-bgpcfgd/bgpcfgd/managers_device_global.py
@@ -1,11 +1,17 @@
+import re
+import jinja2
+
 from .manager import Manager
 from .log import log_err, log_debug, log_notice
-import re
 from swsscommon import swsscommon
 
 class DeviceGlobalCfgMgr(Manager):
     """This class responds to change in device-specific state"""
 
+    TSA_DEFAULTS = "false"
+    WCMP_DEFAULTS = "false"
+    IDF_DEFAULTS = "unisolated"
+
     def __init__(self, common_objs, db, table):
         """
         Initialize the object
@@ -19,6 +25,7 @@ def __init__(self, common_objs, db, table):
         self.constants = common_objs['constants']
         self.tsa_template = common_objs['tf'].from_file("bgpd/tsa/bgpd.tsa.isolate.conf.j2")
         self.tsb_template = common_objs['tf'].from_file("bgpd/tsa/bgpd.tsa.unisolate.conf.j2")
+        self.wcmp_template = common_objs['tf'].from_file("bgpd/wcmp/bgpd.wcmp.conf.j2")
         self.idf_isolate_template = common_objs['tf'].from_file("bgpd/idf_isolate/idf_isolate.conf.j2")
         self.idf_unisolate_template = common_objs['tf'].from_file("bgpd/idf_isolate/idf_unisolate.conf.j2")
         self.directory.subscribe([("CONFIG_DB", swsscommon.CFG_DEVICE_METADATA_TABLE_NAME, "localhost/switch_type"),], self.on_switch_type_change)
@@ -29,6 +36,16 @@ def __init__(self, common_objs, db, table):
             table,
         )
 
+        # By default TSA feature is disabled
+        if not self.directory.path_exist(self.db_name, self.table_name, "tsa_enabled"):
+            self.directory.put(self.db_name, self.table_name, "tsa_enabled", self.TSA_DEFAULTS)
+        # By default W-ECMP feature is disabled
+        if not self.directory.path_exist(self.db_name, self.table_name, "wcmp_enabled"):
+            self.directory.put(self.db_name, self.table_name, "wcmp_enabled", self.WCMP_DEFAULTS)
+        # By default IDF feature is unisolated
+        if not self.directory.path_exist(self.db_name, self.table_name, "idf_isolation_state"):
+            self.directory.put(self.db_name, self.table_name, "idf_isolation_state", self.IDF_DEFAULTS)
+
     def on_switch_type_change(self):
         log_debug("DeviceGlobalCfgMgr:: Switch type update handler")
         if self.directory.path_exist("CONFIG_DB", swsscommon.CFG_DEVICE_METADATA_TABLE_NAME, "localhost/switch_type"):
@@ -36,42 +53,113 @@ def on_switch_type_change(self):
         log_debug("DeviceGlobalCfgMgr:: Switch type: %s" % self.switch_type)
 
     def set_handler(self, key, data):
+        """ Handle device TSA/W-ECMP state change """
         log_debug("DeviceGlobalCfgMgr:: set handler")
+
         if self.switch_type:
             log_debug("DeviceGlobalCfgMgr:: Switch type: %s" % self.switch_type)
-        """ Handle device tsa_enabled state change """
         if not data:
             log_err("DeviceGlobalCfgMgr:: data is None")
             return False
 
-        tsa_status = "false"
-        idf_isolation_state = "unisolated"
+        # TSA configuration
+        self.configure_tsa(data)
+        # W-ECMP configuration
+        self.configure_wcmp(data)
+        # IDF configuration
+        self.configure_idf(data)
 
-        if self.directory.path_exist("CONFIG_DB", swsscommon.CFG_BGP_DEVICE_GLOBAL_TABLE_NAME, "tsa_enabled"):
-            tsa_status = self.directory.get_slot("CONFIG_DB", swsscommon.CFG_BGP_DEVICE_GLOBAL_TABLE_NAME)["tsa_enabled"]
-        if self.directory.path_exist("CONFIG_DB", swsscommon.CFG_BGP_DEVICE_GLOBAL_TABLE_NAME, "idf_isolation_state"):
-            idf_isolation_state = self.directory.get_slot("CONFIG_DB", swsscommon.CFG_BGP_DEVICE_GLOBAL_TABLE_NAME)["idf_isolation_state"]
-
-        if "tsa_enabled" in data:
-            self.directory.put(self.db_name, self.table_name, "tsa_enabled", data["tsa_enabled"])
-            if tsa_status != data["tsa_enabled"]:
-                self.cfg_mgr.commit()
-                self.cfg_mgr.update()
-                self.isolate_unisolate_device(data["tsa_enabled"])
-
-            
-        if "idf_isolation_state" in data:
-            self.directory.put(self.db_name, self.table_name, "idf_isolation_state", data["idf_isolation_state"])
-            if idf_isolation_state != data["idf_isolation_state"]:
-                if self.switch_type and self.switch_type != "SpineRouter":
-                    log_debug("DeviceGlobalCfgMgr:: Skipping IDF isolation configuration on Switch type: %s" % self.switch_type)
-                    return True
-                self.downstream_isolate_unisolate(data["idf_isolation_state"])
-            
         return True
 
     def del_handler(self, key):
         log_debug("DeviceGlobalCfgMgr:: del handler")
+
+        # TSA configuration
+        self.configure_tsa()
+        # W-ECMP configuration
+        self.configure_wcmp()
+        # IDF configuration
+        self.configure_idf()
+
+        return True
+
+    def is_update_required(self, key, value):
+        if self.directory.path_exist(self.db_name, self.table_name, key):
+            return value != self.directory.get(self.db_name, self.table_name, key)
+        return True
+
+    def configure_tsa(self, data=None):
+        """ Configure TSA feature"""
+
+        state = self.TSA_DEFAULTS
+
+        if data is not None:
+            if "tsa_enabled" in data:
+                state = data["tsa_enabled"]
+
+        if self.is_update_required("tsa_enabled", state):
+            self.cfg_mgr.commit()
+            self.cfg_mgr.update()
+            if self.isolate_unisolate_device(state):
+                self.directory.put(self.db_name, self.table_name, "tsa_enabled", state)
+        else:
+            log_notice("DeviceGlobalCfgMgr:: TSA configuration is up-to-date")
+
+    def configure_wcmp(self, data=None):
+        """ Configure W-ECMP feature"""
+
+        state = self.WCMP_DEFAULTS
+
+        if data is not None:
+            if "wcmp_enabled" in data:
+                state = data["wcmp_enabled"]
+
+        if self.is_update_required("wcmp_enabled", state):
+            if self.set_wcmp(state):
+                self.directory.put(self.db_name, self.table_name, "wcmp_enabled", state)
+        else:
+            log_notice("DeviceGlobalCfgMgr:: W-ECMP configuration is up-to-date")
+
+    def configure_idf(self, data=None):
+        """ Configure IDF feature"""
+
+        state = self.IDF_DEFAULTS
+
+        if data is not None:
+            if "idf_isolation_state" in data:
+                state = data["idf_isolation_state"]
+
+        if self.is_update_required("idf_isolation_state", state):
+            if self.downstream_isolate_unisolate(state):
+                self.directory.put(self.db_name, self.table_name, "idf_isolation_state", state)
+        else:
+            log_notice("DeviceGlobalCfgMgr:: IDF configuration is up-to-date")
+
+    def set_wcmp(self, status):
+        """ API to set/unset W-ECMP """
+
+        if status not in ["true", "false"]:
+            log_err("W-ECMP: invalid value({}) is provided".format(status))
+            return False
+
+        if status == "true":
+            log_notice("DeviceGlobalCfgMgr:: Enabling W-ECMP...")
+        else:
+            log_notice("DeviceGlobalCfgMgr:: Disabling W-ECMP...")
+
+        cmd = "\n"
+
+        try:
+            cmd += self.wcmp_template.render(wcmp_enabled=status)
+        except jinja2.TemplateError as e:
+            msg = "W-ECMP: error in template rendering"
+            log_err("%s: %s" % (msg, str(e)))
+            return False
+
+        self.cfg_mgr.push(cmd)
+
+        log_debug("DeviceGlobalCfgMgr::Done")
+
         return True
 
     def check_state_and_get_tsa_routemaps(self, cfg):
@@ -87,6 +175,11 @@ def check_state_and_get_tsa_routemaps(self, cfg):
 
     def isolate_unisolate_device(self, tsa_status):
         """ API to get TSA/TSB route-maps and apply configuration"""
+
+        if tsa_status not in ["true", "false"]:
+            log_err("TSA: invalid value({}) is provided".format(tsa_status))
+            return False
+
         cmd = "\n"
         if tsa_status == "true":
             log_notice("DeviceGlobalCfgMgr:: Device isolated. Executing TSA")
@@ -98,6 +191,8 @@ def isolate_unisolate_device(self, tsa_status):
         self.cfg_mgr.push(cmd)
         log_debug("DeviceGlobalCfgMgr::Done")
 
+        return True
+
     def get_ts_routemaps(self, cmds, ts_template):
         if not cmds:
             return ""
@@ -134,6 +229,16 @@ def __extract_out_route_map_names(self, cmds):
         return route_map_names
 
     def downstream_isolate_unisolate(self, idf_isolation_state):
+        """ API to apply IDF configuration """
+
+        if idf_isolation_state not in ["unisolated", "isolated_withdraw_all", "isolated_no_export"]:
+            log_err("IDF: invalid value({}) is provided".format(idf_isolation_state))
+            return False
+
+        if self.switch_type and self.switch_type != "SpineRouter":
+            log_debug("DeviceGlobalCfgMgr:: Skipping IDF isolation configuration on Switch type: %s" % self.switch_type)
+            return True
+
         cmd = "\n"
         if idf_isolation_state == "unisolated":
             cmd += self.idf_unisolate_template.render(constants=self.constants)
@@ -145,12 +250,16 @@ def downstream_isolate_unisolate(self, idf_isolation_state):
         self.cfg_mgr.push(cmd)
         log_debug("DeviceGlobalCfgMgr::Done")
 
+        return True
+
     def check_state_and_get_idf_isolation_routemaps(self):
         """ API to get TSA route-maps if device is isolated"""
+
         cmd = ""
         if self.directory.path_exist("CONFIG_DB", swsscommon.CFG_BGP_DEVICE_GLOBAL_TABLE_NAME, "idf_isolation_state"):
             idf_isolation_state = self.directory.get_slot("CONFIG_DB", swsscommon.CFG_BGP_DEVICE_GLOBAL_TABLE_NAME)["idf_isolation_state"]
-            if idf_isolation_state != "unisolated":                
+            if idf_isolation_state != "unisolated":
                 log_notice("DeviceGlobalCfgMgr:: IDF is isolated. Applying required route-maps")
-                cmd = self.idf_isolate_template.render(isolation_status=idf_isolation_state, constants=self.constants)           
-        return cmd
\ No newline at end of file
+                cmd = self.idf_isolate_template.render(isolation_status=idf_isolation_state, constants=self.constants)
+
+        return cmd
diff --git a/src/sonic-bgpcfgd/tests/data/wcmp/wcmp.set.conf b/src/sonic-bgpcfgd/tests/data/wcmp/wcmp.set.conf
new file mode 100644
index 000000000..77066a305
--- /dev/null
+++ b/src/sonic-bgpcfgd/tests/data/wcmp/wcmp.set.conf
@@ -0,0 +1,14 @@
+
+!
+! template: bgpd/wcmp/bgpd.wcmp.conf.j2
+!
+route-map TO_BGP_PEER_V4 permit 100
+  set extcommunity bandwidth num-multipaths
+exit
+!
+route-map TO_BGP_PEER_V6 permit 100
+  set extcommunity bandwidth num-multipaths
+exit
+!
+! end of template: bgpd/wcmp/bgpd.wcmp.conf.j2
+!
diff --git a/src/sonic-bgpcfgd/tests/data/wcmp/wcmp.unset.conf b/src/sonic-bgpcfgd/tests/data/wcmp/wcmp.unset.conf
new file mode 100644
index 000000000..df107e432
--- /dev/null
+++ b/src/sonic-bgpcfgd/tests/data/wcmp/wcmp.unset.conf
@@ -0,0 +1,14 @@
+
+!
+! template: bgpd/wcmp/bgpd.wcmp.conf.j2
+!
+route-map TO_BGP_PEER_V4 permit 100
+  no set extcommunity bandwidth
+exit
+!
+route-map TO_BGP_PEER_V6 permit 100
+  no set extcommunity bandwidth
+exit
+!
+! end of template: bgpd/wcmp/bgpd.wcmp.conf.j2
+!
diff --git a/src/sonic-bgpcfgd/tests/test_device_global.py b/src/sonic-bgpcfgd/tests/test_device_global.py
index 12dd895f5..fc1c5e702 100644
--- a/src/sonic-bgpcfgd/tests/test_device_global.py
+++ b/src/sonic-bgpcfgd/tests/test_device_global.py
@@ -1,3 +1,4 @@
+import pytest
 from unittest.mock import MagicMock, patch
 
 import os
@@ -9,9 +10,14 @@
 from swsscommon import swsscommon
 from copy import deepcopy
 
+#
+# Constants -----------------------------------------------------------------------------------------------------------
+#
+
 TEMPLATE_PATH = os.path.abspath('../../dockers/docker-fpm-frr/frr')
 BASE_PATH = os.path.abspath('../sonic-bgpcfgd/tests/data/general/peer-group.conf/')
 INTERNAL_BASE_PATH = os.path.abspath('../sonic-bgpcfgd/tests/data/internal/peer-group.conf/')
+WCMP_BASE_PATH = os.path.abspath('../sonic-bgpcfgd/tests/data/wcmp/')
 global_constants = {
     "bgp":  {
         "traffic_shift_community" :"12345:12345",
@@ -19,6 +25,10 @@
     }
 }
 
+#
+# Helpers -------------------------------------------------------------------------------------------------------------
+#
+
 def constructor(check_internal=False):
     cfg_mgr = MagicMock()
     def get_text():
@@ -54,6 +64,9 @@ def get_config():
     cfg_mgr.update()
     return mgr
 
+#
+# TSA -----------------------------------------------------------------------------------------------------------------
+#
 
 @patch('bgpcfgd.managers_device_global.log_debug')
 def test_isolate_device(mocked_log_info):
@@ -63,31 +76,6 @@ def test_isolate_device(mocked_log_info):
     mocked_log_info.assert_called_with("DeviceGlobalCfgMgr::Done")
     assert m.cfg_mgr.get_config() == get_string_from_file("/result_all_isolate.conf")
 
-@patch('bgpcfgd.managers_device_global.log_debug')
-def test_idf_isolation_no_export(mocked_log_info): 
-    m = constructor()
-    res = m.set_handler("STATE", {"idf_isolation_state": "isolated_no_export"})
-    assert res, "Expect True return value for set_handler"
-    mocked_log_info.assert_called_with("DeviceGlobalCfgMgr::Done")
-    assert m.cfg_mgr.get_config() == get_string_from_file("/result_all_idf_isolated_no_export.conf")
-
-@patch('bgpcfgd.managers_device_global.log_debug')
-def test_idf_isolation_withdraw_all(mocked_log_info): 
-    m = constructor()
-    res = m.set_handler("STATE", {"idf_isolation_state": "isolated_withdraw_all"})
-    assert res, "Expect True return value for set_handler"
-    mocked_log_info.assert_called_with("DeviceGlobalCfgMgr::Done")
-    assert m.cfg_mgr.get_config() == get_string_from_file("/result_all_idf_isolated_withdraw_all.conf")
-
-@patch('bgpcfgd.managers_device_global.log_debug')
-def test_idf_unisolation(mocked_log_info): 
-    m = constructor()
-    m.directory.put(m.db_name, m.table_name, "idf_isolation_state", "isolated_no_export")
-    res = m.set_handler("STATE", {"idf_isolation_state": "unisolated"})
-    assert res, "Expect True return value for set_handler"
-    mocked_log_info.assert_called_with("DeviceGlobalCfgMgr::Done")
-    assert m.cfg_mgr.get_config() == get_string_from_file("/result_all_idf_unisolated.conf")
-
 @patch('bgpcfgd.managers_device_global.log_debug')
 def test_isolate_device_internal_session(mocked_log_info):
     m = constructor(check_internal=True)
@@ -96,10 +84,10 @@ def test_isolate_device_internal_session(mocked_log_info):
     mocked_log_info.assert_called_with("DeviceGlobalCfgMgr::Done")
     assert m.cfg_mgr.get_config() == get_string_from_file("/result_chassis_packet_isolate.conf", INTERNAL_BASE_PATH)
 
-
 @patch('bgpcfgd.managers_device_global.log_debug')
 def test_unisolate_device(mocked_log_info):
     m = constructor()
+    # By default feature is disabled. Simulate enabled state
     m.directory.put(m.db_name, m.table_name, "tsa_enabled", "true")
     res = m.set_handler("STATE", {"tsa_enabled": "false"})
     assert res, "Expect True return value for set_handler"
@@ -109,13 +97,13 @@ def test_unisolate_device(mocked_log_info):
 @patch('bgpcfgd.managers_device_global.log_debug')
 def test_unisolate_device_internal_session(mocked_log_info):
     m = constructor(check_internal=True)
-    m.directory.put(m.db_name, m.table_name, "tsa_enabled", "true")    
+    # By default feature is disabled. Simulate enabled state
+    m.directory.put(m.db_name, m.table_name, "tsa_enabled", "true")
     res = m.set_handler("STATE", {"tsa_enabled": "false"})
     assert res, "Expect True return value for set_handler"
     mocked_log_info.assert_called_with("DeviceGlobalCfgMgr::Done")
     assert m.cfg_mgr.get_config() == get_string_from_file("/result_chassis_packet_unisolate.conf", INTERNAL_BASE_PATH)
 
-
 def test_check_state_and_get_tsa_routemaps():
     m = constructor()
     m.set_handler("STATE", {"tsa_enabled": "true"})
@@ -126,16 +114,6 @@ def test_check_state_and_get_tsa_routemaps():
     res = m.check_state_and_get_tsa_routemaps(m.cfg_mgr.get_config())
     assert res == ""
 
-def test_check_state_and_get_idf_isolation_routemaps():
-    m = constructor()
-    m.set_handler("STATE", {"idf_isolation_state": "isolated_no_export"})
-    res = m.check_state_and_get_idf_isolation_routemaps()
-    assert res == get_string_from_file("/result_idf_isolated.conf")
-
-    m.set_handler("STATE", {"idf_isolation_state": "unisolated"})
-    res = m.check_state_and_get_idf_isolation_routemaps()
-    assert res == ""
-
 def test_get_tsa_routemaps():
     m = constructor()
     assert m.get_ts_routemaps([], m.tsa_template) == ""
@@ -171,3 +149,105 @@ def test_del_handler():
     res = m.del_handler("STATE")
     assert res, "Expect True return value for del_handler"
 
+@pytest.mark.parametrize(
+    "value", [ "invalid_value" ]
+)
+@patch('bgpcfgd.managers_device_global.log_err')
+def test_tsa_neg(mocked_log_err, value):
+    m = constructor()
+    m.cfg_mgr.changes = ""
+    res = m.set_handler("STATE", {"tsa_enabled": value})
+    assert res, "Expect True return value for set_handler"
+    mocked_log_err.assert_called_with("TSA: invalid value({}) is provided".format(value))
+
+#
+# W-ECMP --------------------------------------------------------------------------------------------------------------
+#
+
+@pytest.mark.parametrize(
+    "value,result", [
+        pytest.param(
+            "true",
+            get_string_from_file("/wcmp.set.conf", WCMP_BASE_PATH),
+            id="enabled"
+        ),
+        pytest.param(
+            "false",
+            get_string_from_file("/wcmp.unset.conf", WCMP_BASE_PATH),
+            id="disabled"
+        )
+    ]
+)
+@patch('bgpcfgd.managers_device_global.log_debug')
+def test_wcmp(mocked_log_info, value, result):
+    m = constructor()
+    m.cfg_mgr.changes = ""
+    if value == "false":
+        # By default feature is disabled. Simulate enabled state
+        m.directory.put(m.db_name, m.table_name, "wcmp_enabled", "true")
+    res = m.set_handler("STATE", {"wcmp_enabled": value})
+    assert res, "Expect True return value for set_handler"
+    mocked_log_info.assert_called_with("DeviceGlobalCfgMgr::Done")
+    assert m.cfg_mgr.get_config() == result
+
+@pytest.mark.parametrize(
+    "value", [ "invalid_value" ]
+)
+@patch('bgpcfgd.managers_device_global.log_err')
+def test_wcmp_neg(mocked_log_err, value):
+    m = constructor()
+    m.cfg_mgr.changes = ""
+    res = m.set_handler("STATE", {"wcmp_enabled": value})
+    assert res, "Expect True return value for set_handler"
+    mocked_log_err.assert_called_with("W-ECMP: invalid value({}) is provided".format(value))
+
+#
+# IDF -----------------------------------------------------------------------------------------------------------------
+#
+
+@patch('bgpcfgd.managers_device_global.log_debug')
+def test_idf_isolation_no_export(mocked_log_info):
+    m = constructor()
+    res = m.set_handler("STATE", {"idf_isolation_state": "isolated_no_export"})
+    assert res, "Expect True return value for set_handler"
+    mocked_log_info.assert_called_with("DeviceGlobalCfgMgr::Done")
+    assert m.cfg_mgr.get_config() == get_string_from_file("/result_all_idf_isolated_no_export.conf")
+
+@patch('bgpcfgd.managers_device_global.log_debug')
+def test_idf_isolation_withdraw_all(mocked_log_info):
+    m = constructor()
+    res = m.set_handler("STATE", {"idf_isolation_state": "isolated_withdraw_all"})
+    assert res, "Expect True return value for set_handler"
+    mocked_log_info.assert_called_with("DeviceGlobalCfgMgr::Done")
+    assert m.cfg_mgr.get_config() == get_string_from_file("/result_all_idf_isolated_withdraw_all.conf")
+
+@patch('bgpcfgd.managers_device_global.log_debug')
+def test_idf_unisolation(mocked_log_info):
+    m = constructor()
+    # By default feature is unisolated. Simulate a different state
+    m.directory.put(m.db_name, m.table_name, "idf_isolation_state", "isolated_no_export")
+    res = m.set_handler("STATE", {"idf_isolation_state": "unisolated"})
+    assert res, "Expect True return value for set_handler"
+    mocked_log_info.assert_called_with("DeviceGlobalCfgMgr::Done")
+    assert m.cfg_mgr.get_config() == get_string_from_file("/result_all_idf_unisolated.conf")
+
+def test_check_state_and_get_idf_isolation_routemaps():
+    m = constructor()
+    m.set_handler("STATE", {"idf_isolation_state": "isolated_no_export"})
+    res = m.check_state_and_get_idf_isolation_routemaps()
+    assert res == get_string_from_file("/result_idf_isolated.conf")
+
+    m.set_handler("STATE", {"idf_isolation_state": "unisolated"})
+    res = m.check_state_and_get_idf_isolation_routemaps()
+    assert res == ""
+
+@pytest.mark.parametrize(
+    "value", [ "invalid_value" ]
+)
+@patch('bgpcfgd.managers_device_global.log_err')
+def test_idf_neg(mocked_log_err, value):
+    m = constructor()
+    m.cfg_mgr.changes = ""
+    res = m.set_handler("STATE", {"idf_isolation_state": value})
+    assert res, "Expect True return value for set_handler"
+    mocked_log_err.assert_called_with("IDF: invalid value({}) is provided".format(value))
diff --git a/src/sonic-yang-models/doc/Configuration.md b/src/sonic-yang-models/doc/Configuration.md
index f1bc162cb..cafc4fcaa 100644
--- a/src/sonic-yang-models/doc/Configuration.md
+++ b/src/sonic-yang-models/doc/Configuration.md
@@ -384,6 +384,7 @@ The **BGP_BBR** table contains device-level BBR state.
         }
 }
 ```
+
 ### ASIC SDK health event
 
 ASIC/SDK health event related configuration is defined in **SUPPRESS_ASIC_SDK_HEALTH_EVENT** table.
@@ -407,21 +408,43 @@ ASIC/SDK health event related configuration is defined in **SUPPRESS_ASIC_SDK_HE
 
 ### BGP Device Global
 
-The **BGP_DEVICE_GLOBAL** table contains device-level BGP global state. 
-It has a STATE object containing device state like **tsa_enabled** 
-which is set to true if device is currently isolated using 
-traffic-shift-away (TSA) route-maps in BGP. It also holds IDF isolation state
-which could be one of isolated_no_export, isolated_withdraw_all or unisolated
+The **BGP_DEVICE_GLOBAL** table contains device-level BGP global state.  
+It has a STATE object containing device state like **tsa_enabled**, **wcmp_enabled** and **idf_isolation_state**.
+
+When **tsa_enabled** is set to true, the device is isolated using traffic-shift-away (TSA) route-maps in BGP.
 
+```json
+{
+"BGP_DEVICE_GLOBAL": {
+    "STATE": {
+        "tsa_enabled": "true"
+    }
+}
 ```
+
+When **wcmp_enabled** is set to true, the device is configured to use BGP Link Bandwidth Extended Community.  
+Weighted ECMP load balances traffic between the equal cost paths in proportion to the capacity of the local links.
+
+```json
+{
+"BGP_DEVICE_GLOBAL": {
+    "STATE": {
+        "wcmp_enabled": "true"
+    }
+}
+```
+
+The IDF isolation state **idf_isolation_state** could be one of isolated_no_export, isolated_withdraw_all or unisolated.
+
+```json
 {
 "BGP_DEVICE_GLOBAL": {
     "STATE": {
-        "tsa_enabled": "true",
         "idf_isolation_state": "isolated_no_export"
     }
 }
 ```
+
 ### BGP Sessions
 
 BGP session configuration is defined in **BGP_NEIGHBOR** table. BGP
diff --git a/src/sonic-yang-models/tests/files/sample_config_db.json b/src/sonic-yang-models/tests/files/sample_config_db.json
index 850785624..ed1f75c65 100644
--- a/src/sonic-yang-models/tests/files/sample_config_db.json
+++ b/src/sonic-yang-models/tests/files/sample_config_db.json
@@ -1710,6 +1710,7 @@
         "BGP_DEVICE_GLOBAL": {
             "STATE": {
                 "tsa_enabled": "false",
+                "wcmp_enabled": "false",
                 "idf_isolation_state": "unisolated"
             }
         },
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/bgp_device_global.json b/src/sonic-yang-models/tests/yang_model_tests/tests/bgp_device_global.json
index 3c3a8559b..b9cc07ed5 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests/bgp_device_global.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests/bgp_device_global.json
@@ -1,6 +1,12 @@
 {
-    "BGP_DEVICE_GLOBAL_WITH_DEFAULT_VALUES": {
-        "desc": "Load bgp device global table with fields set to default values"
+    "BGP_DEVICE_GLOBAL_WITH_TSA_DEFAULT_VALUE": {
+        "desc": "Load bgp device global table with tsa_enabled set to default value",
+        "eStrKey": "Verify",
+        "verify": {
+            "xpath": "/sonic-bgp-device-global:sonic-bgp-device-global/BGP_DEVICE_GLOBAL/STATE/tsa_enabled",
+            "key": "sonic-bgp-device-global:tsa_enabled",
+            "value": false
+        }
     },
     "BGP_DEVICE_GLOBAL_WITH_TSA_TEST": {
         "desc": "Load bgp device global table with tsa_enabled set to true"
@@ -8,23 +14,64 @@
     "BGP_DEVICE_GLOBAL_WITH_TSB_TEST": {
         "desc": "Load bgp device global table with tsa_enabled set to false"
     },
+    "BGP_DEVICE_GLOBAL_WITH_TSA_INVALID_VALUE": {
+        "desc": "Load bgp device global table with tsa_enabled set to invalid value",
+        "eStrKey": "InvalidValue",
+        "eStr": ["tsa_enabled"]
+    },
+    "BGP_DEVICE_GLOBAL_WITH_WCMP_DEFAULT_VALUE": {
+        "desc": "Verify default value for WCMP_ENABLED field in BGP_DEVICE_GLOBAL.",
+        "eStrKey": "Verify",
+        "verify": {
+            "xpath": "/sonic-bgp-device-global:sonic-bgp-device-global/BGP_DEVICE_GLOBAL/STATE/wcmp_enabled",
+            "key": "sonic-bgp-device-global:wcmp_enabled",
+            "value": false
+        }
+    },
+    "BGP_DEVICE_GLOBAL_WITH_WCMP_ENABLED": {
+        "desc": "Verify value for WCMP_ENABLED in BGP_DEVICE_GLOBAL is set to true.",
+        "eStrKey": "Verify",
+        "verify": {
+            "xpath": "/sonic-bgp-device-global:sonic-bgp-device-global/BGP_DEVICE_GLOBAL/STATE/wcmp_enabled",
+            "key": "sonic-bgp-device-global:wcmp_enabled",
+            "value": true
+        }
+    },
+    "BGP_DEVICE_GLOBAL_WITH_WCMP_DISABLED": {
+        "desc": "Verify value for WCMP_ENABLED in BGP_DEVICE_GLOBAL is set to false.",
+        "eStrKey": "Verify",
+        "verify": {
+            "xpath": "/sonic-bgp-device-global:sonic-bgp-device-global/BGP_DEVICE_GLOBAL/STATE/wcmp_enabled",
+            "key": "sonic-bgp-device-global:wcmp_enabled",
+            "value": false
+        }
+    },
+    "BGP_DEVICE_GLOBAL_WITH_WCMP_INVALID_VALUE": {
+        "desc": "Configure invalid WCMP_ENABLED in BGP_DEVICE_GLOBAL.",
+        "eStrKey": "InvalidValue",
+        "eStr": ["wcmp_enabled"]
+    },
+    "BGP_DEVICE_GLOBAL_WITH_IDF_ISOLATION_DEFAULT_VALUE": {
+        "desc": "Load bgp device global table with idf_isolation_state set to default value",
+        "eStrKey": "Verify",
+        "verify": {
+            "xpath": "/sonic-bgp-device-global:sonic-bgp-device-global/BGP_DEVICE_GLOBAL/STATE/idf_isolation_state",
+            "key": "sonic-bgp-device-global:idf_isolation_state",
+            "value": "unisolated"
+        }
+    },
     "BGP_DEVICE_GLOBAL_WITH_IDF_ISOLATION_TEST_1": {
         "desc": "Load bgp device global table with idf_isolation_state set to isolated_no_export"
     },
     "BGP_DEVICE_GLOBAL_WITH_IDF_ISOLATION_TEST_2": {
-        "desc": "Load bgp device global table with idf_isolation_state set to isolated_withdraw_all"        
+        "desc": "Load bgp device global table with idf_isolation_state set to isolated_withdraw_all"
     },
     "BGP_DEVICE_GLOBAL_WITH_IDF_ISOLATION_TEST_3": {
-        "desc": "Load bgp device global table with idf_isolation_state set to unisolated"        
-    },
-    "BGP_DEVICE_GLOBAL_WITH_INVALID_VALUE_1": {
-        "desc": "Load bgp device global table with invalid value",
-        "eStrKey": "InvalidValue",
-        "eStr": ["tsa_enabled"]
+        "desc": "Load bgp device global table with idf_isolation_state set to unisolated"
     },
-    "BGP_DEVICE_GLOBAL_WITH_INVALID_VALUE_2": {
-        "desc": "Load bgp device global table with invalid value",
+    "BGP_DEVICE_GLOBAL_WITH_IDF_INVALID_VALUE": {
+        "desc": "Load bgp device global table with idf_isolation_state set to invalid value",
         "eStrKey": "InvalidValue",
         "eStr": ["idf_isolation_state"]
     }
-}
\ No newline at end of file
+}
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/bgp_device_global.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/bgp_device_global.json
index b9bb4fe00..f1be80b6b 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/bgp_device_global.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/bgp_device_global.json
@@ -1,10 +1,8 @@
 {
-    "BGP_DEVICE_GLOBAL_WITH_DEFAULT_VALUES": {
+    "BGP_DEVICE_GLOBAL_WITH_TSA_DEFAULT_VALUE": {
         "sonic-bgp-device-global:sonic-bgp-device-global": {
             "sonic-bgp-device-global:BGP_DEVICE_GLOBAL": {
                 "STATE":{
-                    "tsa_enabled": "false",
-                    "idf_isolation_state": "unisolated"
                 }
             }
         }
@@ -13,8 +11,7 @@
         "sonic-bgp-device-global:sonic-bgp-device-global": {
             "sonic-bgp-device-global:BGP_DEVICE_GLOBAL": {
                 "STATE":{
-                    "tsa_enabled": "true",
-                    "idf_isolation_state": "unisolated"
+                    "tsa_enabled": "true"
                 }
             }
         }
@@ -23,58 +20,95 @@
         "sonic-bgp-device-global:sonic-bgp-device-global": {
             "sonic-bgp-device-global:BGP_DEVICE_GLOBAL": {
                 "STATE":{
-                    "tsa_enabled": "false",
-                    "idf_isolation_state": "unisolated"
+                    "tsa_enabled": "false"
                 }
             }
         }
     },
-    "BGP_DEVICE_GLOBAL_WITH_IDF_ISOLATION_TEST_1": {
+    "BGP_DEVICE_GLOBAL_WITH_TSA_INVALID_VALUE": {
         "sonic-bgp-device-global:sonic-bgp-device-global": {
             "sonic-bgp-device-global:BGP_DEVICE_GLOBAL": {
                 "STATE":{
-                    "tsa_enabled": "true",
-                    "idf_isolation_state": "isolated_no_export"
+                    "tsa_enabled": "invalid_value"
                 }
             }
         }
     },
-    "BGP_DEVICE_GLOBAL_WITH_IDF_ISOLATION_TEST_2": {
+    "BGP_DEVICE_GLOBAL_WITH_WCMP_DEFAULT_VALUE": {
+        "sonic-bgp-device-global:sonic-bgp-device-global": {
+            "sonic-bgp-device-global:BGP_DEVICE_GLOBAL": {
+                "STATE": {
+                }
+            }
+        }
+    },
+    "BGP_DEVICE_GLOBAL_WITH_WCMP_ENABLED": {
+        "sonic-bgp-device-global:sonic-bgp-device-global": {
+            "sonic-bgp-device-global:BGP_DEVICE_GLOBAL": {
+                "STATE": {
+                    "wcmp_enabled": "true"
+                }
+            }
+        }
+    },
+    "BGP_DEVICE_GLOBAL_WITH_WCMP_DISABLED": {
+        "sonic-bgp-device-global:sonic-bgp-device-global": {
+            "sonic-bgp-device-global:BGP_DEVICE_GLOBAL": {
+                "STATE": {
+                    "wcmp_enabled": "false"
+                }
+            }
+        }
+    },
+    "BGP_DEVICE_GLOBAL_WITH_WCMP_INVALID_VALUE": {
+        "sonic-bgp-device-global:sonic-bgp-device-global": {
+            "sonic-bgp-device-global:BGP_DEVICE_GLOBAL": {
+                "STATE": {
+                    "wcmp_enabled": "invalid_value"
+                }
+            }
+        }
+    },
+    "BGP_DEVICE_GLOBAL_WITH_IDF_ISOLATION_DEFAULT_VALUE": {
         "sonic-bgp-device-global:sonic-bgp-device-global": {
             "sonic-bgp-device-global:BGP_DEVICE_GLOBAL": {
                 "STATE":{
-                    "tsa_enabled": "false",
-                    "idf_isolation_state": "isolated_withdraw_all"
                 }
             }
         }
     },
-    "BGP_DEVICE_GLOBAL_WITH_IDF_ISOLATION_TEST_3": {
+    "BGP_DEVICE_GLOBAL_WITH_IDF_ISOLATION_TEST_1": {
         "sonic-bgp-device-global:sonic-bgp-device-global": {
             "sonic-bgp-device-global:BGP_DEVICE_GLOBAL": {
                 "STATE":{
-                    "tsa_enabled": "false",
-                    "idf_isolation_state": "unisolated"
+                    "idf_isolation_state": "isolated_no_export"
                 }
             }
         }
     },
-    "BGP_DEVICE_GLOBAL_WITH_INVALID_VALUE_1": {
+    "BGP_DEVICE_GLOBAL_WITH_IDF_ISOLATION_TEST_2": {
+        "sonic-bgp-device-global:sonic-bgp-device-global": {
+            "sonic-bgp-device-global:BGP_DEVICE_GLOBAL": {
+                "STATE":{
+                    "idf_isolation_state": "isolated_withdraw_all"
+                }
+            }
+        }
+    },
+    "BGP_DEVICE_GLOBAL_WITH_IDF_ISOLATION_TEST_3": {
         "sonic-bgp-device-global:sonic-bgp-device-global": {
             "sonic-bgp-device-global:BGP_DEVICE_GLOBAL": {
                 "STATE":{
-                    "tsa_enabled": "FALSE",
                     "idf_isolation_state": "unisolated"
                 }
             }
         }
     },
-    "BGP_DEVICE_GLOBAL_WITH_INVALID_VALUE_2": {
+    "BGP_DEVICE_GLOBAL_WITH_IDF_INVALID_VALUE": {
         "sonic-bgp-device-global:sonic-bgp-device-global": {
             "sonic-bgp-device-global:BGP_DEVICE_GLOBAL": {
                 "STATE":{
-                    "tsa_enabled": "false",
-                    "idf_isolation_state": "isolated"
+                    "idf_isolation_state": "invalid_value"
                 }
             }
         }
diff --git a/src/sonic-yang-models/yang-models/sonic-bgp-device-global.yang b/src/sonic-yang-models/yang-models/sonic-bgp-device-global.yang
index 07e763735..447b89f10 100644
--- a/src/sonic-yang-models/yang-models/sonic-bgp-device-global.yang
+++ b/src/sonic-yang-models/yang-models/sonic-bgp-device-global.yang
@@ -12,22 +12,39 @@ module sonic-bgp-device-global {
     description
         "SONIC Device-specific BGP global data";
 
+    revision 2024-01-28 {
+        description "Add Weighted ECMP using BGP link bandwidth";
+    }
+
     revision 2022-06-26 {
-        description
-            "Initial revision";
+        description "Initial revision";
     }
 
     container sonic-bgp-device-global {
+
         container BGP_DEVICE_GLOBAL {
+
+            description "BGP_DEVICE_GLOBAL part of config_db.json";
+
             container STATE {
+
                 description "BGP device-specific global data";
+
                 leaf tsa_enabled {
                     type boolean;
                     default "false";
                     description
                     "When set to true, Traffic is shifted away (TSA), i.e, BGP routes are not advertised to neighboring routers";
                 }
+
+                leaf wcmp_enabled {
+                    description "Enables/Disables Weighted-Equal Cost-Multipath using BGP link bandwidth";
+                    type boolean;
+                    default "false";
+                }
+
                 leaf idf_isolation_state {
+                    description "Configures device IDF isolation state";
                     type enumeration {
                         enum isolated_no_export {
                             description "IDF isolated using no-export community tag";
@@ -39,12 +56,14 @@ module sonic-bgp-device-global {
                             description "IDF un-isolated";
                         }
                     }
-                    default unisolated;
+                    default "unisolated";
                 }
-            } /* end of STATE container */
-        } /* end of BGP_DEVICE_GLOBAL container */
-
-    } /* end of top level container */
-
-} /* end of module sonic-bgp-device-global */
 
+            }
+            /* end of STATE container */
+        }
+        /* end of BGP_DEVICE_GLOBAL container */
+    }
+    /* end of container sonic-bgp-device-global */
+}
+/* end of module sonic-bgp-device-global */

From 17f3d7db439dd1370f1539ce64c43c5c7b82e56d Mon Sep 17 00:00:00 2001
From: Dror Prital <76714716+dprital@users.noreply.github.com>
Date: Thu, 6 Jun 2024 20:25:34 +0300
Subject: [PATCH 0723/1115] [Mellanox] route config/set/delete performance
 improvement(#18801)

- Why I did it
Increase significantly the rate of routes config/set/delete to HW.

- How I did it
Add required flag in sai.profile and increase orchagent bulk size.

- How to verify it
Measure rate of route set/del operations at scale.
---
 platform/mellanox/docker-syncd-mlnx/sai-common.profile | 1 +
 1 file changed, 1 insertion(+)

diff --git a/platform/mellanox/docker-syncd-mlnx/sai-common.profile b/platform/mellanox/docker-syncd-mlnx/sai-common.profile
index 3b9e6fe00..62e4323e2 100644
--- a/platform/mellanox/docker-syncd-mlnx/sai-common.profile
+++ b/platform/mellanox/docker-syncd-mlnx/sai-common.profile
@@ -1,2 +1,3 @@
 SAI_DUMP_STORE_PATH=/var/log/mellanox/sdk-dumps
 SAI_DUMP_STORE_AMOUNT=10
+SAI_ASYNC_ROUTING_ENABLED=1

From 6968aaa85d37b6d83549d0d4ea25c56d16f7207f Mon Sep 17 00:00:00 2001
From: Stepan Blyshchak <38952541+stepanblyschak@users.noreply.github.com>
Date: Fri, 7 Jun 2024 00:48:46 +0300
Subject: [PATCH 0724/1115] [Mellanox] Remove pmon delay for certain platforms
 (#19190)

* [nvidia] Remove pmon delay for certain platforms

Signed-off-by: Stepan Blyschak <stepanb@nvidia.com>
---
 .../x86_64-mlnx_msn4410-r0/pmon_daemon_control.json |  2 +-
 .../x86_64-mlnx_msn4410-r0/pmon_immediate_start     |  0
 .../x86_64-mlnx_msn4600-r0/pmon_daemon_control.json |  2 +-
 .../x86_64-mlnx_msn4600-r0/pmon_immediate_start     |  0
 .../pmon_daemon_control.json                        |  2 +-
 .../x86_64-mlnx_msn4600c-r0/pmon_immediate_start    |  0
 .../Mellanox-SN4700-O8C48/pmon_daemon_control.json  |  2 +-
 .../Mellanox-SN4700-O8V48/pmon_daemon_control.json  |  2 +-
 .../x86_64-mlnx_msn4700-r0/pmon_daemon_control.json |  7 ++++++-
 .../x86_64-mlnx_msn4700-r0/pmon_immediate_start     |  0
 .../pmon_immediate_start                            |  0
 .../pmon_daemon_control.json                        |  6 +-----
 .../pmon_immediate_start                            |  0
 .../pmon_daemon_control.json                        |  2 +-
 .../x86_64-nvidia_sn4800-r0/pmon_immediate_start    |  0
 .../pmon_daemon_control.json                        |  2 +-
 .../pmon_immediate_start                            |  0
 .../pmon_daemon_control.json                        |  2 +-
 .../x86_64-nvidia_sn5400-r0/pmon_immediate_start    |  0
 .../pmon_daemon_control.json                        |  2 +-
 .../pmon_immediate_start                            |  0
 .../pmon_daemon_control.json                        |  7 ++++++-
 .../x86_64-nvidia_sn5600-r0/pmon_immediate_start    |  0
 .../pmon_immediate_start                            |  0
 files/scripts/syncd.sh                              | 13 +++++--------
 25 files changed, 27 insertions(+), 24 deletions(-)
 create mode 100644 device/mellanox/x86_64-mlnx_msn4410-r0/pmon_immediate_start
 create mode 100644 device/mellanox/x86_64-mlnx_msn4600-r0/pmon_immediate_start
 create mode 100644 device/mellanox/x86_64-mlnx_msn4600c-r0/pmon_immediate_start
 mode change 120000 => 100644 device/mellanox/x86_64-mlnx_msn4700-r0/pmon_daemon_control.json
 create mode 100644 device/mellanox/x86_64-mlnx_msn4700-r0/pmon_immediate_start
 create mode 100644 device/mellanox/x86_64-mlnx_msn4700_simx-r0/pmon_immediate_start
 mode change 100644 => 120000 device/mellanox/x86_64-nvidia_sn4280_simx-r0/pmon_daemon_control.json
 create mode 100644 device/mellanox/x86_64-nvidia_sn4280_simx-r0/pmon_immediate_start
 create mode 100644 device/mellanox/x86_64-nvidia_sn4800-r0/pmon_immediate_start
 create mode 100644 device/mellanox/x86_64-nvidia_sn4800_simx-r0/pmon_immediate_start
 create mode 100644 device/mellanox/x86_64-nvidia_sn5400-r0/pmon_immediate_start
 create mode 100644 device/mellanox/x86_64-nvidia_sn5400_simx-r0/pmon_immediate_start
 mode change 120000 => 100644 device/mellanox/x86_64-nvidia_sn5600-r0/pmon_daemon_control.json
 create mode 100644 device/mellanox/x86_64-nvidia_sn5600-r0/pmon_immediate_start
 create mode 100644 device/mellanox/x86_64-nvidia_sn5600_simx-r0/pmon_immediate_start

diff --git a/device/mellanox/x86_64-mlnx_msn4410-r0/pmon_daemon_control.json b/device/mellanox/x86_64-mlnx_msn4410-r0/pmon_daemon_control.json
index 435a2ce7c..af0a90e77 120000
--- a/device/mellanox/x86_64-mlnx_msn4410-r0/pmon_daemon_control.json
+++ b/device/mellanox/x86_64-mlnx_msn4410-r0/pmon_daemon_control.json
@@ -1 +1 @@
-../x86_64-mlnx_msn2700-r0/pmon_daemon_control.json
\ No newline at end of file
+../x86_64-mlnx_msn4700-r0/pmon_daemon_control.json
\ No newline at end of file
diff --git a/device/mellanox/x86_64-mlnx_msn4410-r0/pmon_immediate_start b/device/mellanox/x86_64-mlnx_msn4410-r0/pmon_immediate_start
new file mode 100644
index 000000000..e69de29bb
diff --git a/device/mellanox/x86_64-mlnx_msn4600-r0/pmon_daemon_control.json b/device/mellanox/x86_64-mlnx_msn4600-r0/pmon_daemon_control.json
index 435a2ce7c..af0a90e77 120000
--- a/device/mellanox/x86_64-mlnx_msn4600-r0/pmon_daemon_control.json
+++ b/device/mellanox/x86_64-mlnx_msn4600-r0/pmon_daemon_control.json
@@ -1 +1 @@
-../x86_64-mlnx_msn2700-r0/pmon_daemon_control.json
\ No newline at end of file
+../x86_64-mlnx_msn4700-r0/pmon_daemon_control.json
\ No newline at end of file
diff --git a/device/mellanox/x86_64-mlnx_msn4600-r0/pmon_immediate_start b/device/mellanox/x86_64-mlnx_msn4600-r0/pmon_immediate_start
new file mode 100644
index 000000000..e69de29bb
diff --git a/device/mellanox/x86_64-mlnx_msn4600c-r0/pmon_daemon_control.json b/device/mellanox/x86_64-mlnx_msn4600c-r0/pmon_daemon_control.json
index 435a2ce7c..af0a90e77 120000
--- a/device/mellanox/x86_64-mlnx_msn4600c-r0/pmon_daemon_control.json
+++ b/device/mellanox/x86_64-mlnx_msn4600c-r0/pmon_daemon_control.json
@@ -1 +1 @@
-../x86_64-mlnx_msn2700-r0/pmon_daemon_control.json
\ No newline at end of file
+../x86_64-mlnx_msn4700-r0/pmon_daemon_control.json
\ No newline at end of file
diff --git a/device/mellanox/x86_64-mlnx_msn4600c-r0/pmon_immediate_start b/device/mellanox/x86_64-mlnx_msn4600c-r0/pmon_immediate_start
new file mode 100644
index 000000000..e69de29bb
diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/pmon_daemon_control.json b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/pmon_daemon_control.json
index ac8cc05f6..3ada0d344 100644
--- a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/pmon_daemon_control.json
+++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/pmon_daemon_control.json
@@ -1,6 +1,6 @@
 {
     "skip_ledd": true,
     "skip_fancontrol": true,
-    "delay_xcvrd": true,
+    "delay_xcvrd": false,
     "skip_xcvrd_cmis_mgr": false
 }
diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/pmon_daemon_control.json b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/pmon_daemon_control.json
index ac8cc05f6..3ada0d344 100644
--- a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/pmon_daemon_control.json
+++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/pmon_daemon_control.json
@@ -1,6 +1,6 @@
 {
     "skip_ledd": true,
     "skip_fancontrol": true,
-    "delay_xcvrd": true,
+    "delay_xcvrd": false,
     "skip_xcvrd_cmis_mgr": false
 }
diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/pmon_daemon_control.json b/device/mellanox/x86_64-mlnx_msn4700-r0/pmon_daemon_control.json
deleted file mode 120000
index 435a2ce7c..000000000
--- a/device/mellanox/x86_64-mlnx_msn4700-r0/pmon_daemon_control.json
+++ /dev/null
@@ -1 +0,0 @@
-../x86_64-mlnx_msn2700-r0/pmon_daemon_control.json
\ No newline at end of file
diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/pmon_daemon_control.json b/device/mellanox/x86_64-mlnx_msn4700-r0/pmon_daemon_control.json
new file mode 100644
index 000000000..fefdfb327
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn4700-r0/pmon_daemon_control.json
@@ -0,0 +1,6 @@
+{
+    "skip_ledd": true,
+    "skip_fancontrol": true,
+    "skip_xcvrd_cmis_mgr": true
+}
+
diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/pmon_immediate_start b/device/mellanox/x86_64-mlnx_msn4700-r0/pmon_immediate_start
new file mode 100644
index 000000000..e69de29bb
diff --git a/device/mellanox/x86_64-mlnx_msn4700_simx-r0/pmon_immediate_start b/device/mellanox/x86_64-mlnx_msn4700_simx-r0/pmon_immediate_start
new file mode 100644
index 000000000..e69de29bb
diff --git a/device/mellanox/x86_64-nvidia_sn4280_simx-r0/pmon_daemon_control.json b/device/mellanox/x86_64-nvidia_sn4280_simx-r0/pmon_daemon_control.json
deleted file mode 100644
index b2c37062f..000000000
--- a/device/mellanox/x86_64-nvidia_sn4280_simx-r0/pmon_daemon_control.json
+++ /dev/null
@@ -1,5 +0,0 @@
-{
-        "skip_ledd": true,
-        "skip_xcvrd": true,
-        "skip_fancontrol": true
-}
diff --git a/device/mellanox/x86_64-nvidia_sn4280_simx-r0/pmon_daemon_control.json b/device/mellanox/x86_64-nvidia_sn4280_simx-r0/pmon_daemon_control.json
new file mode 120000
index 000000000..af0a90e77
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280_simx-r0/pmon_daemon_control.json
@@ -0,0 +1 @@
+../x86_64-mlnx_msn4700-r0/pmon_daemon_control.json
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn4280_simx-r0/pmon_immediate_start b/device/mellanox/x86_64-nvidia_sn4280_simx-r0/pmon_immediate_start
new file mode 100644
index 000000000..e69de29bb
diff --git a/device/mellanox/x86_64-nvidia_sn4800-r0/pmon_daemon_control.json b/device/mellanox/x86_64-nvidia_sn4800-r0/pmon_daemon_control.json
index 435a2ce7c..af0a90e77 120000
--- a/device/mellanox/x86_64-nvidia_sn4800-r0/pmon_daemon_control.json
+++ b/device/mellanox/x86_64-nvidia_sn4800-r0/pmon_daemon_control.json
@@ -1 +1 @@
-../x86_64-mlnx_msn2700-r0/pmon_daemon_control.json
\ No newline at end of file
+../x86_64-mlnx_msn4700-r0/pmon_daemon_control.json
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn4800-r0/pmon_immediate_start b/device/mellanox/x86_64-nvidia_sn4800-r0/pmon_immediate_start
new file mode 100644
index 000000000..e69de29bb
diff --git a/device/mellanox/x86_64-nvidia_sn4800_simx-r0/pmon_daemon_control.json b/device/mellanox/x86_64-nvidia_sn4800_simx-r0/pmon_daemon_control.json
index d9fa54f8d..af0a90e77 120000
--- a/device/mellanox/x86_64-nvidia_sn4800_simx-r0/pmon_daemon_control.json
+++ b/device/mellanox/x86_64-nvidia_sn4800_simx-r0/pmon_daemon_control.json
@@ -1 +1 @@
-../x86_64-mlnx_msn2700_simx-r0/pmon_daemon_control.json
\ No newline at end of file
+../x86_64-mlnx_msn4700-r0/pmon_daemon_control.json
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn4800_simx-r0/pmon_immediate_start b/device/mellanox/x86_64-nvidia_sn4800_simx-r0/pmon_immediate_start
new file mode 100644
index 000000000..e69de29bb
diff --git a/device/mellanox/x86_64-nvidia_sn5400-r0/pmon_daemon_control.json b/device/mellanox/x86_64-nvidia_sn5400-r0/pmon_daemon_control.json
index 435a2ce7c..f56b32678 120000
--- a/device/mellanox/x86_64-nvidia_sn5400-r0/pmon_daemon_control.json
+++ b/device/mellanox/x86_64-nvidia_sn5400-r0/pmon_daemon_control.json
@@ -1 +1 @@
-../x86_64-mlnx_msn2700-r0/pmon_daemon_control.json
\ No newline at end of file
+../x86_64-nvidia_sn5600-r0/pmon_daemon_control.json
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn5400-r0/pmon_immediate_start b/device/mellanox/x86_64-nvidia_sn5400-r0/pmon_immediate_start
new file mode 100644
index 000000000..e69de29bb
diff --git a/device/mellanox/x86_64-nvidia_sn5400_simx-r0/pmon_daemon_control.json b/device/mellanox/x86_64-nvidia_sn5400_simx-r0/pmon_daemon_control.json
index 435a2ce7c..f56b32678 120000
--- a/device/mellanox/x86_64-nvidia_sn5400_simx-r0/pmon_daemon_control.json
+++ b/device/mellanox/x86_64-nvidia_sn5400_simx-r0/pmon_daemon_control.json
@@ -1 +1 @@
-../x86_64-mlnx_msn2700-r0/pmon_daemon_control.json
\ No newline at end of file
+../x86_64-nvidia_sn5600-r0/pmon_daemon_control.json
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn5400_simx-r0/pmon_immediate_start b/device/mellanox/x86_64-nvidia_sn5400_simx-r0/pmon_immediate_start
new file mode 100644
index 000000000..e69de29bb
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/pmon_daemon_control.json b/device/mellanox/x86_64-nvidia_sn5600-r0/pmon_daemon_control.json
deleted file mode 120000
index 435a2ce7c..000000000
--- a/device/mellanox/x86_64-nvidia_sn5600-r0/pmon_daemon_control.json
+++ /dev/null
@@ -1 +0,0 @@
-../x86_64-mlnx_msn2700-r0/pmon_daemon_control.json
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/pmon_daemon_control.json b/device/mellanox/x86_64-nvidia_sn5600-r0/pmon_daemon_control.json
new file mode 100644
index 000000000..fefdfb327
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/pmon_daemon_control.json
@@ -0,0 +1,6 @@
+{
+    "skip_ledd": true,
+    "skip_fancontrol": true,
+    "skip_xcvrd_cmis_mgr": true
+}
+
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/pmon_immediate_start b/device/mellanox/x86_64-nvidia_sn5600-r0/pmon_immediate_start
new file mode 100644
index 000000000..e69de29bb
diff --git a/device/mellanox/x86_64-nvidia_sn5600_simx-r0/pmon_immediate_start b/device/mellanox/x86_64-nvidia_sn5600_simx-r0/pmon_immediate_start
new file mode 100644
index 000000000..e69de29bb
diff --git a/files/scripts/syncd.sh b/files/scripts/syncd.sh
index c6fbf008c..0930de72b 100755
--- a/files/scripts/syncd.sh
+++ b/files/scripts/syncd.sh
@@ -57,7 +57,7 @@ function startplatform() {
                 platform=$aboot_platform
             elif [ -n "$onie_platform" ]; then
                 platform=$onie_platform
-            else 
+            else
                 platform="unknown"
             fi
             if [[ x"$platform" == x"x86_64-arista_720dt_48s" ]]; then
@@ -96,13 +96,10 @@ function waitplatform() {
 
     BOOT_TYPE=`getBootType`
     if [[ x"$sonic_asic_platform" == x"mellanox" ]]; then
-        if [[ x"$BOOT_TYPE" = @(x"fast"|x"warm"|x"fastfast") ]]; then
-            PMON_TIMER_STATUS=$(systemctl is-active pmon.timer)
-            if [[ x"$PMON_TIMER_STATUS" = x"inactive" ]]; then
-                systemctl start pmon.timer
-            else
-                debug "PMON service is delayed by a timer for better fast/warm boot performance"
-            fi
+        PLATFORM=`$SONIC_DB_CLI CONFIG_DB hget 'DEVICE_METADATA|localhost' platform`
+        PMON_IMMEDIATE_START="/usr/share/sonic/device/$PLATFORM/pmon_immediate_start"
+        if [[ x"$BOOT_TYPE" = @(x"fast"|x"warm"|x"fastfast") ]] && [[ ! -f $PMON_IMMEDIATE_START ]]; then
+            debug "PMON service is delayed by for better fast/warm boot performance"
         else
             debug "Starting pmon service..."
             /bin/systemctl start pmon

From a81b7dce185872eb552ef38e97dd98d4370c7fed Mon Sep 17 00:00:00 2001
From: anamehra <54692434+anamehra@users.noreply.github.com>
Date: Fri, 7 Jun 2024 15:25:15 -0700
Subject: [PATCH 0725/1115] [cisco]: Update cisco-8000.ini to 0.master.0.2
 release (#19247)

Signed-off-by: anamehra anamehra@cisco.com
---
 platform/checkout/cisco-8000.ini | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/platform/checkout/cisco-8000.ini b/platform/checkout/cisco-8000.ini
index 709f576b1..6c33ec6a8 100644
--- a/platform/checkout/cisco-8000.ini
+++ b/platform/checkout/cisco-8000.ini
@@ -1,3 +1,3 @@
 [module]
 repo=git@github.com:Cisco-8000-sonic/platform-cisco-8000.git
-ref=0.master.0.1
+ref=0.master.0.2

From 04bad023340c57154fb600ad204f1f8a7885e47b Mon Sep 17 00:00:00 2001
From: Oleksandr Ivantsiv <oivantsiv@nvidia.com>
Date: Fri, 7 Jun 2024 15:34:20 -0700
Subject: [PATCH 0726/1115] [database] Fix database config template for remote
 Redis instance (#19239)

The local Redis daemon should not run for a remote database.

How I did it
Do not generate a supervisord configuration entry for the remote database instances.

How to verify it
Compile and run the DPU image. The database container on the DPU should run Redis daemons only for local DB instances.
---
 dockers/docker-database/database_config.json.j2 | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/dockers/docker-database/database_config.json.j2 b/dockers/docker-database/database_config.json.j2
index b5c231a93..65db6cb72 100644
--- a/dockers/docker-database/database_config.json.j2
+++ b/dockers/docker-database/database_config.json.j2
@@ -20,7 +20,7 @@
         ,"remote_redis":{
             "hostname" : "{{REMOTE_DB_IP}}",
             "port" : {{REMOTE_DB_PORT}},
-            "unix_socket_path": ""
+            "unix_socket_path": "",
             "persistence_for_warm_boot" : "yes"
         }
 {% endif %}

From c617e81608d7276feb11c17e94e2f5e6d42a5f02 Mon Sep 17 00:00:00 2001
From: Oleksandr Ivantsiv <oivantsiv@nvidia.com>
Date: Fri, 7 Jun 2024 15:36:08 -0700
Subject: [PATCH 0727/1115] [database] Do not run local a Redis instance for
 the remote database (#19238)

The local Redis daemon should not run for a remote database.

How I did it
Do not generate a supervisord configuration entry for the remote database instances.

How to verify it
Compile and run the DPU image. The database container on the DPU should run Redis daemons only for local DB instances.
---
 dockers/docker-database/supervisord.conf.j2 | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/dockers/docker-database/supervisord.conf.j2 b/dockers/docker-database/supervisord.conf.j2
index 62909aae3..232b8ffcb 100644
--- a/dockers/docker-database/supervisord.conf.j2
+++ b/dockers/docker-database/supervisord.conf.j2
@@ -30,6 +30,7 @@ dependent_startup=true
 
 {% if INSTANCES %}
 {%     for redis_inst, redis_items in INSTANCES.items() %}
+{%- if redis_inst != 'remote_redis' %}
 [program:{{ redis_inst }}]
 {% if redis_items['hostname'] != '127.0.0.1' %}
 {%- set ADDITIONAL_OPTS = '--protected-mode no' %}
@@ -47,6 +48,7 @@ autostart=true
 autorestart=false
 stdout_logfile=syslog
 stderr_logfile=syslog
+{%- endif -%}
 {%     endfor %}
 {% endif %}
 

From cd578ac9c2aa1e7d12cd3f7a0da7ba65c6d8e283 Mon Sep 17 00:00:00 2001
From: rick-arista <148895369+rick-arista@users.noreply.github.com>
Date: Fri, 7 Jun 2024 19:02:44 -0700
Subject: [PATCH 0728/1115] [Arista]: Add QoS configurations for Quicksilver
 (#19161)

These are likely not the optimal configurations but a first draft.
Most of QuicksilverP and QuicksilverDD HwSku should be supported.

Co-authored-by: Samuel Angebault <staphylo@arista.com>
---
 .../Arista-7060X6-64DE-64x400G/BALANCED       |  1 +
 .../buffers.json.j2                           |  2 ++
 .../buffers_defaults_t0.j2                    |  1 +
 .../buffers_defaults_t1.j2                    |  1 +
 .../pg_profile_lookup.ini                     |  1 +
 .../Arista-7060X6-64DE-64x400G/qos.json.j2    |  1 +
 .../Arista-7060X6-64DE/BALANCED               |  1 +
 .../Arista-7060X6-64DE/buffers.json.j2        |  2 ++
 .../Arista-7060X6-64DE/buffers_defaults_t0.j2 |  1 +
 .../Arista-7060X6-64DE/buffers_defaults_t1.j2 |  1 +
 .../Arista-7060X6-64DE/pg_profile_lookup.ini  |  1 +
 .../Arista-7060X6-64DE/qos.json.j2            |  1 +
 .../Arista-7060X6-64PE-128x400G/BALANCED      |  1 +
 .../buffer_ports.j2                           |  6 ++++
 .../buffers.json.j2                           |  2 ++
 .../buffers_defaults_t0.j2                    |  1 +
 .../buffers_defaults_t1.j2                    |  1 +
 .../pg_profile_lookup.ini                     |  1 +
 .../Arista-7060X6-64PE-128x400G/qos.json.j2   |  1 +
 .../Arista-7060X6-64PE-256x200G/BALANCED      |  1 +
 .../buffer_ports.j2                           |  6 ++++
 .../buffers.json.j2                           |  2 ++
 .../buffers_defaults_t0.j2                    |  1 +
 .../buffers_defaults_t1.j2                    |  1 +
 .../pg_profile_lookup.ini                     |  1 +
 .../Arista-7060X6-64PE-256x200G/qos.json.j2   |  1 +
 .../Arista-7060X6-64PE-64x400G/BALANCED       |  1 +
 .../buffer_ports.j2                           |  6 ++++
 .../buffers.json.j2                           |  2 ++
 .../buffers_defaults_t0.j2                    |  1 +
 .../buffers_defaults_t1.j2                    |  1 +
 .../pg_profile_lookup.ini                     |  1 +
 .../Arista-7060X6-64PE-64x400G/qos.json.j2    |  1 +
 .../Arista-7060X6-64PE/BALANCED               |  1 +
 .../Arista-7060X6-64PE/buffer_ports.j2        |  6 ++++
 .../Arista-7060X6-64PE/buffers.json.j2        |  2 ++
 .../Arista-7060X6-64PE/buffers_defaults_t0.j2 |  1 +
 .../Arista-7060X6-64PE/buffers_defaults_t1.j2 |  1 +
 .../Arista-7060X6-64PE/pg_profile_lookup.ini  |  1 +
 .../Arista-7060X6-64PE/qos.json.j2            |  1 +
 .../th5/gen/BALANCED/buffers_defaults_t0.j2   | 36 +++++++++++++++++++
 .../th5/gen/BALANCED/buffers_defaults_t1.j2   | 36 +++++++++++++++++++
 .../th5/gen/BALANCED/pg_profile_lookup.ini    | 20 +++++++++++
 43 files changed, 158 insertions(+)
 create mode 120000 device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-64x400G/BALANCED
 create mode 100644 device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-64x400G/buffers.json.j2
 create mode 120000 device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-64x400G/buffers_defaults_t0.j2
 create mode 120000 device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-64x400G/buffers_defaults_t1.j2
 create mode 120000 device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-64x400G/pg_profile_lookup.ini
 create mode 100644 device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-64x400G/qos.json.j2
 create mode 120000 device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE/BALANCED
 create mode 100644 device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE/buffers.json.j2
 create mode 120000 device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE/buffers_defaults_t0.j2
 create mode 120000 device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE/buffers_defaults_t1.j2
 create mode 120000 device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE/pg_profile_lookup.ini
 create mode 100644 device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE/qos.json.j2
 create mode 120000 device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-128x400G/BALANCED
 create mode 100644 device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-128x400G/buffer_ports.j2
 create mode 100644 device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-128x400G/buffers.json.j2
 create mode 120000 device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-128x400G/buffers_defaults_t0.j2
 create mode 120000 device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-128x400G/buffers_defaults_t1.j2
 create mode 120000 device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-128x400G/pg_profile_lookup.ini
 create mode 100644 device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-128x400G/qos.json.j2
 create mode 120000 device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/BALANCED
 create mode 100644 device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/buffer_ports.j2
 create mode 100644 device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/buffers.json.j2
 create mode 120000 device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/buffers_defaults_t0.j2
 create mode 120000 device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/buffers_defaults_t1.j2
 create mode 120000 device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/pg_profile_lookup.ini
 create mode 100644 device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/qos.json.j2
 create mode 120000 device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-64x400G/BALANCED
 create mode 100644 device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-64x400G/buffer_ports.j2
 create mode 100644 device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-64x400G/buffers.json.j2
 create mode 120000 device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-64x400G/buffers_defaults_t0.j2
 create mode 120000 device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-64x400G/buffers_defaults_t1.j2
 create mode 120000 device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-64x400G/pg_profile_lookup.ini
 create mode 100644 device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-64x400G/qos.json.j2
 create mode 120000 device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE/BALANCED
 create mode 100644 device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE/buffer_ports.j2
 create mode 100644 device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE/buffers.json.j2
 create mode 120000 device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE/buffers_defaults_t0.j2
 create mode 120000 device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE/buffers_defaults_t1.j2
 create mode 120000 device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE/pg_profile_lookup.ini
 create mode 100644 device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE/qos.json.j2
 create mode 100644 device/common/profiles/th5/gen/BALANCED/buffers_defaults_t0.j2
 create mode 100644 device/common/profiles/th5/gen/BALANCED/buffers_defaults_t1.j2
 create mode 100644 device/common/profiles/th5/gen/BALANCED/pg_profile_lookup.ini

diff --git a/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-64x400G/BALANCED b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-64x400G/BALANCED
new file mode 120000
index 000000000..afd21766c
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-64x400G/BALANCED
@@ -0,0 +1 @@
+../../../common/profiles/th5/gen/BALANCED
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-64x400G/buffers.json.j2 b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-64x400G/buffers.json.j2
new file mode 100644
index 000000000..0b1cb2c54
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-64x400G/buffers.json.j2
@@ -0,0 +1,2 @@
+{%- set default_topo = 't1' %}
+{%- include 'buffers_config.j2' %}
diff --git a/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-64x400G/buffers_defaults_t0.j2 b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-64x400G/buffers_defaults_t0.j2
new file mode 120000
index 000000000..9524e6a47
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-64x400G/buffers_defaults_t0.j2
@@ -0,0 +1 @@
+BALANCED/buffers_defaults_t0.j2
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-64x400G/buffers_defaults_t1.j2 b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-64x400G/buffers_defaults_t1.j2
new file mode 120000
index 000000000..c25cc95d6
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-64x400G/buffers_defaults_t1.j2
@@ -0,0 +1 @@
+BALANCED/buffers_defaults_t1.j2
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-64x400G/pg_profile_lookup.ini b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-64x400G/pg_profile_lookup.ini
new file mode 120000
index 000000000..297cddb2d
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-64x400G/pg_profile_lookup.ini
@@ -0,0 +1 @@
+BALANCED/pg_profile_lookup.ini
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-64x400G/qos.json.j2 b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-64x400G/qos.json.j2
new file mode 100644
index 000000000..3e548325e
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-64x400G/qos.json.j2
@@ -0,0 +1 @@
+{%- include 'qos_config.j2' %}
diff --git a/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE/BALANCED b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE/BALANCED
new file mode 120000
index 000000000..afd21766c
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE/BALANCED
@@ -0,0 +1 @@
+../../../common/profiles/th5/gen/BALANCED
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE/buffers.json.j2 b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE/buffers.json.j2
new file mode 100644
index 000000000..0b1cb2c54
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE/buffers.json.j2
@@ -0,0 +1,2 @@
+{%- set default_topo = 't1' %}
+{%- include 'buffers_config.j2' %}
diff --git a/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE/buffers_defaults_t0.j2 b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE/buffers_defaults_t0.j2
new file mode 120000
index 000000000..9524e6a47
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE/buffers_defaults_t0.j2
@@ -0,0 +1 @@
+BALANCED/buffers_defaults_t0.j2
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE/buffers_defaults_t1.j2 b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE/buffers_defaults_t1.j2
new file mode 120000
index 000000000..c25cc95d6
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE/buffers_defaults_t1.j2
@@ -0,0 +1 @@
+BALANCED/buffers_defaults_t1.j2
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE/pg_profile_lookup.ini b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE/pg_profile_lookup.ini
new file mode 120000
index 000000000..297cddb2d
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE/pg_profile_lookup.ini
@@ -0,0 +1 @@
+BALANCED/pg_profile_lookup.ini
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE/qos.json.j2 b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE/qos.json.j2
new file mode 100644
index 000000000..3e548325e
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE/qos.json.j2
@@ -0,0 +1 @@
+{%- include 'qos_config.j2' %}
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-128x400G/BALANCED b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-128x400G/BALANCED
new file mode 120000
index 000000000..afd21766c
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-128x400G/BALANCED
@@ -0,0 +1 @@
+../../../common/profiles/th5/gen/BALANCED
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-128x400G/buffer_ports.j2 b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-128x400G/buffer_ports.j2
new file mode 100644
index 000000000..725347049
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-128x400G/buffer_ports.j2
@@ -0,0 +1,6 @@
+{%- macro generate_port_lists(PORT_ALL) %}
+    {# Generate list of ports #}
+    {%- for port_idx in range(0, 512, 4) %}
+        {%- if PORT_ALL.append("Ethernet%d" % (port_idx)) %}{%- endif %}
+    {%- endfor %}
+{%- endmacro %}
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-128x400G/buffers.json.j2 b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-128x400G/buffers.json.j2
new file mode 100644
index 000000000..0b1cb2c54
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-128x400G/buffers.json.j2
@@ -0,0 +1,2 @@
+{%- set default_topo = 't1' %}
+{%- include 'buffers_config.j2' %}
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-128x400G/buffers_defaults_t0.j2 b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-128x400G/buffers_defaults_t0.j2
new file mode 120000
index 000000000..9524e6a47
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-128x400G/buffers_defaults_t0.j2
@@ -0,0 +1 @@
+BALANCED/buffers_defaults_t0.j2
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-128x400G/buffers_defaults_t1.j2 b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-128x400G/buffers_defaults_t1.j2
new file mode 120000
index 000000000..c25cc95d6
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-128x400G/buffers_defaults_t1.j2
@@ -0,0 +1 @@
+BALANCED/buffers_defaults_t1.j2
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-128x400G/pg_profile_lookup.ini b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-128x400G/pg_profile_lookup.ini
new file mode 120000
index 000000000..297cddb2d
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-128x400G/pg_profile_lookup.ini
@@ -0,0 +1 @@
+BALANCED/pg_profile_lookup.ini
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-128x400G/qos.json.j2 b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-128x400G/qos.json.j2
new file mode 100644
index 000000000..3e548325e
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-128x400G/qos.json.j2
@@ -0,0 +1 @@
+{%- include 'qos_config.j2' %}
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/BALANCED b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/BALANCED
new file mode 120000
index 000000000..afd21766c
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/BALANCED
@@ -0,0 +1 @@
+../../../common/profiles/th5/gen/BALANCED
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/buffer_ports.j2 b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/buffer_ports.j2
new file mode 100644
index 000000000..55d8aacb3
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/buffer_ports.j2
@@ -0,0 +1,6 @@
+{%- macro generate_port_lists(PORT_ALL) %}
+    {# Generate list of ports #}
+    {%- for port_idx in range(0, 512, 2) %}
+        {%- if PORT_ALL.append("Ethernet%d" % (port_idx)) %}{%- endif %}
+    {%- endfor %}
+{%- endmacro %}
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/buffers.json.j2 b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/buffers.json.j2
new file mode 100644
index 000000000..0b1cb2c54
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/buffers.json.j2
@@ -0,0 +1,2 @@
+{%- set default_topo = 't1' %}
+{%- include 'buffers_config.j2' %}
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/buffers_defaults_t0.j2 b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/buffers_defaults_t0.j2
new file mode 120000
index 000000000..9524e6a47
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/buffers_defaults_t0.j2
@@ -0,0 +1 @@
+BALANCED/buffers_defaults_t0.j2
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/buffers_defaults_t1.j2 b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/buffers_defaults_t1.j2
new file mode 120000
index 000000000..c25cc95d6
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/buffers_defaults_t1.j2
@@ -0,0 +1 @@
+BALANCED/buffers_defaults_t1.j2
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/pg_profile_lookup.ini b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/pg_profile_lookup.ini
new file mode 120000
index 000000000..297cddb2d
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/pg_profile_lookup.ini
@@ -0,0 +1 @@
+BALANCED/pg_profile_lookup.ini
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/qos.json.j2 b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/qos.json.j2
new file mode 100644
index 000000000..3e548325e
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/qos.json.j2
@@ -0,0 +1 @@
+{%- include 'qos_config.j2' %}
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-64x400G/BALANCED b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-64x400G/BALANCED
new file mode 120000
index 000000000..afd21766c
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-64x400G/BALANCED
@@ -0,0 +1 @@
+../../../common/profiles/th5/gen/BALANCED
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-64x400G/buffer_ports.j2 b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-64x400G/buffer_ports.j2
new file mode 100644
index 000000000..6b6ae10e5
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-64x400G/buffer_ports.j2
@@ -0,0 +1,6 @@
+{%- macro generate_port_lists(PORT_ALL) %}
+    {# Generate list of ports #}
+    {%- for port_idx in range(0, 512, 8) %}
+        {%- if PORT_ALL.append("Ethernet%d" % (port_idx)) %}{%- endif %}
+    {%- endfor %}
+{%- endmacro %}
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-64x400G/buffers.json.j2 b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-64x400G/buffers.json.j2
new file mode 100644
index 000000000..0b1cb2c54
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-64x400G/buffers.json.j2
@@ -0,0 +1,2 @@
+{%- set default_topo = 't1' %}
+{%- include 'buffers_config.j2' %}
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-64x400G/buffers_defaults_t0.j2 b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-64x400G/buffers_defaults_t0.j2
new file mode 120000
index 000000000..9524e6a47
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-64x400G/buffers_defaults_t0.j2
@@ -0,0 +1 @@
+BALANCED/buffers_defaults_t0.j2
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-64x400G/buffers_defaults_t1.j2 b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-64x400G/buffers_defaults_t1.j2
new file mode 120000
index 000000000..c25cc95d6
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-64x400G/buffers_defaults_t1.j2
@@ -0,0 +1 @@
+BALANCED/buffers_defaults_t1.j2
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-64x400G/pg_profile_lookup.ini b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-64x400G/pg_profile_lookup.ini
new file mode 120000
index 000000000..297cddb2d
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-64x400G/pg_profile_lookup.ini
@@ -0,0 +1 @@
+BALANCED/pg_profile_lookup.ini
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-64x400G/qos.json.j2 b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-64x400G/qos.json.j2
new file mode 100644
index 000000000..3e548325e
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-64x400G/qos.json.j2
@@ -0,0 +1 @@
+{%- include 'qos_config.j2' %}
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE/BALANCED b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE/BALANCED
new file mode 120000
index 000000000..afd21766c
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE/BALANCED
@@ -0,0 +1 @@
+../../../common/profiles/th5/gen/BALANCED
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE/buffer_ports.j2 b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE/buffer_ports.j2
new file mode 100644
index 000000000..6b6ae10e5
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE/buffer_ports.j2
@@ -0,0 +1,6 @@
+{%- macro generate_port_lists(PORT_ALL) %}
+    {# Generate list of ports #}
+    {%- for port_idx in range(0, 512, 8) %}
+        {%- if PORT_ALL.append("Ethernet%d" % (port_idx)) %}{%- endif %}
+    {%- endfor %}
+{%- endmacro %}
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE/buffers.json.j2 b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE/buffers.json.j2
new file mode 100644
index 000000000..0b1cb2c54
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE/buffers.json.j2
@@ -0,0 +1,2 @@
+{%- set default_topo = 't1' %}
+{%- include 'buffers_config.j2' %}
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE/buffers_defaults_t0.j2 b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE/buffers_defaults_t0.j2
new file mode 120000
index 000000000..9524e6a47
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE/buffers_defaults_t0.j2
@@ -0,0 +1 @@
+BALANCED/buffers_defaults_t0.j2
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE/buffers_defaults_t1.j2 b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE/buffers_defaults_t1.j2
new file mode 120000
index 000000000..c25cc95d6
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE/buffers_defaults_t1.j2
@@ -0,0 +1 @@
+BALANCED/buffers_defaults_t1.j2
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE/pg_profile_lookup.ini b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE/pg_profile_lookup.ini
new file mode 120000
index 000000000..297cddb2d
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE/pg_profile_lookup.ini
@@ -0,0 +1 @@
+BALANCED/pg_profile_lookup.ini
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE/qos.json.j2 b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE/qos.json.j2
new file mode 100644
index 000000000..3e548325e
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE/qos.json.j2
@@ -0,0 +1 @@
+{%- include 'qos_config.j2' %}
diff --git a/device/common/profiles/th5/gen/BALANCED/buffers_defaults_t0.j2 b/device/common/profiles/th5/gen/BALANCED/buffers_defaults_t0.j2
new file mode 100644
index 000000000..dc707599f
--- /dev/null
+++ b/device/common/profiles/th5/gen/BALANCED/buffers_defaults_t0.j2
@@ -0,0 +1,36 @@
+{%- set default_cable = '5m' %}
+
+{%- include 'buffer_ports.j2' %}
+
+{%- macro generate_buffer_pool_and_profiles() %}
+    "BUFFER_POOL": {
+        "ingress_lossless_pool": {
+            "type": "ingress",
+            "mode": "dynamic",
+            "size": "60000000",
+            "xoff": "22600000"
+        },
+        "egress_lossless_pool": {
+            "type": "egress",
+            "mode": "static",
+            "size": "82600000"
+        }
+    },
+    "BUFFER_PROFILE": {
+        "ingress_lossy_profile": {
+            "pool": "ingress_lossless_pool",
+            "size": "0",
+            "dynamic_th": "3"
+        },
+        "egress_lossless_profile": {
+            "pool": "egress_lossless_pool",
+            "size": "0",
+            "static_th": "82600000"
+        },
+        "egress_lossy_profile": {
+            "pool": "egress_lossless_pool",
+            "size": "0",
+            "dynamic_th": "3"
+        }
+    },
+{%- endmacro %}
diff --git a/device/common/profiles/th5/gen/BALANCED/buffers_defaults_t1.j2 b/device/common/profiles/th5/gen/BALANCED/buffers_defaults_t1.j2
new file mode 100644
index 000000000..dc707599f
--- /dev/null
+++ b/device/common/profiles/th5/gen/BALANCED/buffers_defaults_t1.j2
@@ -0,0 +1,36 @@
+{%- set default_cable = '5m' %}
+
+{%- include 'buffer_ports.j2' %}
+
+{%- macro generate_buffer_pool_and_profiles() %}
+    "BUFFER_POOL": {
+        "ingress_lossless_pool": {
+            "type": "ingress",
+            "mode": "dynamic",
+            "size": "60000000",
+            "xoff": "22600000"
+        },
+        "egress_lossless_pool": {
+            "type": "egress",
+            "mode": "static",
+            "size": "82600000"
+        }
+    },
+    "BUFFER_PROFILE": {
+        "ingress_lossy_profile": {
+            "pool": "ingress_lossless_pool",
+            "size": "0",
+            "dynamic_th": "3"
+        },
+        "egress_lossless_profile": {
+            "pool": "egress_lossless_pool",
+            "size": "0",
+            "static_th": "82600000"
+        },
+        "egress_lossy_profile": {
+            "pool": "egress_lossless_pool",
+            "size": "0",
+            "dynamic_th": "3"
+        }
+    },
+{%- endmacro %}
diff --git a/device/common/profiles/th5/gen/BALANCED/pg_profile_lookup.ini b/device/common/profiles/th5/gen/BALANCED/pg_profile_lookup.ini
new file mode 100644
index 000000000..ec695eca6
--- /dev/null
+++ b/device/common/profiles/th5/gen/BALANCED/pg_profile_lookup.ini
@@ -0,0 +1,20 @@
+# PG lossless profiles.
+# speed cable size    xon  xoff threshold xon_offset
+  10000  5m   1248    2288 35776   0        2288
+  25000  5m   1248    2288 53248   0        2288
+  40000  5m   1248    2288 66560   0        2288
+  50000  5m   1248    2288 90272   0        2288
+ 100000  5m   1248    2288 165568  0        2288
+ 400000  5m   1248    2288 165568  0        2288
+  10000  40m  1248    2288 37024   0        2288
+  25000  40m  1248    2288 53248   0        2288
+  40000  40m  1248    2288 71552   0        2288
+  50000  40m  1248    2288 96096   0        2288
+ 100000  40m  1248    2288 177632  0        2288
+ 400000  40m  1248    2288 177632  0        2288
+  10000  300m 1248    2288 46176   0        2288
+  25000  300m 1248    2288 79040   0        2288
+  40000  300m 1248    2288 108160  0        2288
+  50000  300m 1248    2288 141856  0        2288
+ 100000  300m 1248    2288 268736  0        2288
+ 400000  300m 1248    2288 268736  0        2288

From ff77018ef5df3ac800070767e576d64d9e3d7374 Mon Sep 17 00:00:00 2001
From: Lawrence Lee <lawlee@microsoft.com>
Date: Fri, 7 Jun 2024 22:24:47 -0700
Subject: [PATCH 0729/1115] used parent script PID for logger calls (#19219)

[arp_update]: Use parent script PID for logger calls

Signed-off-by: Lawrence Lee <lawlee@microsoft.com>
---
 files/scripts/arp_update | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/files/scripts/arp_update b/files/scripts/arp_update
index 5b2b6989e..73a454ea2 100755
--- a/files/scripts/arp_update
+++ b/files/scripts/arp_update
@@ -11,7 +11,7 @@ ARP_UPDATE_VARS_FILE="/usr/share/sonic/templates/arp_update_vars.j2"
 
 # Overload `logger` command to include arp_update tag
 logger () {
-    command logger -t "arp_update" "$@"
+    command logger -i "$$" -t "arp_update" "$@"
 }
 
 while /bin/true; do

From 843ebf77b2fa624011886a95b157b423158a31cb Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sat, 8 Jun 2024 19:04:58 +0800
Subject: [PATCH 0730/1115] [submodule] Update submodule sonic-swss to the
 latest HEAD automatically (#19250)

#### Why I did it
src/sonic-swss
```
* f497c4a0 - (HEAD -> master, origin/master, origin/HEAD) [muxorch] Fixing bug with updateRoute and mux neighbors (#3187) (3 hours ago) [Nikola Dancejic]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-swss | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-swss b/src/sonic-swss
index 8f333b692..f497c4a0d 160000
--- a/src/sonic-swss
+++ b/src/sonic-swss
@@ -1 +1 @@
-Subproject commit 8f333b6923083d6c575a5a5db9aa448d9cb74abc
+Subproject commit f497c4a0da2ac040e36dcf72433d5b20a93639fe

From 797b183d6f229b577fbf338e3ffe180d92b54630 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sat, 8 Jun 2024 19:05:02 +0800
Subject: [PATCH 0731/1115] [submodule] Update submodule sonic-sairedis to the
 latest HEAD automatically (#19242)

#### Why I did it
src/sonic-sairedis
```
* 10483502 - (HEAD -> master, origin/master, origin/HEAD) [saiproxy] Implement all APIs except bulk (#1386) (30 hours ago) [Kamil Cudnik]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-sairedis | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-sairedis b/src/sonic-sairedis
index c8cede0f4..104835026 160000
--- a/src/sonic-sairedis
+++ b/src/sonic-sairedis
@@ -1 +1 @@
-Subproject commit c8cede0f405b6f6ee65fca48a8c5e4261e93fb04
+Subproject commit 104835026159093aca3438548dcb129dfd940441

From 8877bdfd10aa456d3e8762983f3304145d403439 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sun, 9 Jun 2024 16:10:31 +0800
Subject: [PATCH 0732/1115] [submodule] Update submodule sonic-utilities to the
 latest HEAD automatically (#19255)

#### Why I did it
src/sonic-utilities
```
* f96a1322 - (HEAD -> master, origin/master, origin/HEAD) [consutil] Fix consule CLI and enhance unittest (#3360) (7 minutes ago) [Zhijian Li]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-utilities | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-utilities b/src/sonic-utilities
index 1ebd09938..f96a13227 160000
--- a/src/sonic-utilities
+++ b/src/sonic-utilities
@@ -1 +1 @@
-Subproject commit 1ebd09938c5c95746a957d5f40009950d63a8ce1
+Subproject commit f96a132278fdc3545c3f6a609dc5a21149c49240

From f99ac6cd753527c3d8e6c1d226a8c64e3c91dc5e Mon Sep 17 00:00:00 2001
From: DavidZagury <32644413+DavidZagury@users.noreply.github.com>
Date: Mon, 10 Jun 2024 13:55:46 +0300
Subject: [PATCH 0733/1115] [Mellanox] Support SKU Mellanox-SN5600-V256
 (#18926)

- Why I did it
Support Mellanox-SN5600-V256

- How I did it
Add relevant files to support the new SKU

- How to verify it
Regression test
---
 .../Mellanox-SN5600-V256/buffers.json.j2      |   1 +
 .../buffers_defaults_objects.j2               |   1 +
 .../buffers_defaults_t0.j2                    |  47 ++
 .../buffers_defaults_t1.j2                    |  47 ++
 .../buffers_dynamic.json.j2                   |  16 +
 .../create_only_config_db_buffers.json        |   7 +
 .../Mellanox-SN5600-V256/hwsku.json           | 775 ++++++++++++++++++
 .../pg_profile_lookup.ini                     |  42 +
 .../Mellanox-SN5600-V256/port_config.ini      | 275 +++++++
 .../Mellanox-SN5600-V256/qos.json.j2          |   1 +
 .../Mellanox-SN5600-V256/sai.profile          |   1 +
 .../sai_5600_256x200g.xml                     | 627 ++++++++++++++
 12 files changed, 1840 insertions(+)
 create mode 120000 device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/buffers.json.j2
 create mode 120000 device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/buffers_defaults_objects.j2
 create mode 100644 device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/buffers_defaults_t0.j2
 create mode 100644 device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/buffers_defaults_t1.j2
 create mode 100644 device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/buffers_dynamic.json.j2
 create mode 100644 device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/create_only_config_db_buffers.json
 create mode 100644 device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/hwsku.json
 create mode 100644 device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/pg_profile_lookup.ini
 create mode 100644 device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/port_config.ini
 create mode 120000 device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/qos.json.j2
 create mode 100644 device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/sai.profile
 create mode 100644 device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/sai_5600_256x200g.xml

diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/buffers.json.j2 b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/buffers.json.j2
new file mode 120000
index 000000000..add8bf8bb
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/buffers.json.j2
@@ -0,0 +1 @@
+../../x86_64-mlnx_msn2700-r0/ACS-MSN2700/buffers.json.j2
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/buffers_defaults_objects.j2 b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/buffers_defaults_objects.j2
new file mode 120000
index 000000000..c01aebb7a
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/buffers_defaults_objects.j2
@@ -0,0 +1 @@
+../../x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D48C8/buffers_defaults_objects.j2
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/buffers_defaults_t0.j2 b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/buffers_defaults_t0.j2
new file mode 100644
index 000000000..70e701884
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/buffers_defaults_t0.j2
@@ -0,0 +1,47 @@
+{#
+    Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+    Apache-2.0
+
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+
+    http://www.apache.org/licenses/LICENSE-2.0
+
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+#}
+{% set default_cable = '300m' %}
+{% set ingress_lossless_pool_size =  '73684992' %}
+{% set ingress_lossless_pool_xoff =  '60293120' %}
+{% set egress_lossless_pool_size =  '158229504' %}
+{% set egress_lossy_pool_size =  '73684992' %}
+
+{% import 'buffers_defaults_objects.j2' as defs with context %}
+
+{%- macro generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) %}
+{{ defs.generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_profile_lists_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_profile_lists(port_names_active, port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_queue_buffers_with_extra_lossless_queues_with_inactive_ports(port_names_active, port_names_extra_queues, port_names_inactive) %}
+{{ defs.generate_queue_buffers_with_extra_lossless_queues(port_names_active, port_names_extra_queues, port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_queue_buffers_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_queue_buffers(port_names_active, port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_pg_profiles_with_extra_lossless_pgs_with_inactive_ports(port_names_active, port_names_extra_pgs, port_names_inactive) %}
+{{ defs.generate_pg_profiles_with_extra_lossless_pgs(port_names_active, port_names_extra_pgs, port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_pg_profiles_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_pg_profiles(port_names_active, port_names_inactive) }}
+{%- endmacro %}
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/buffers_defaults_t1.j2 b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/buffers_defaults_t1.j2
new file mode 100644
index 000000000..70e701884
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/buffers_defaults_t1.j2
@@ -0,0 +1,47 @@
+{#
+    Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+    Apache-2.0
+
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+
+    http://www.apache.org/licenses/LICENSE-2.0
+
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+#}
+{% set default_cable = '300m' %}
+{% set ingress_lossless_pool_size =  '73684992' %}
+{% set ingress_lossless_pool_xoff =  '60293120' %}
+{% set egress_lossless_pool_size =  '158229504' %}
+{% set egress_lossy_pool_size =  '73684992' %}
+
+{% import 'buffers_defaults_objects.j2' as defs with context %}
+
+{%- macro generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) %}
+{{ defs.generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_profile_lists_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_profile_lists(port_names_active, port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_queue_buffers_with_extra_lossless_queues_with_inactive_ports(port_names_active, port_names_extra_queues, port_names_inactive) %}
+{{ defs.generate_queue_buffers_with_extra_lossless_queues(port_names_active, port_names_extra_queues, port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_queue_buffers_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_queue_buffers(port_names_active, port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_pg_profiles_with_extra_lossless_pgs_with_inactive_ports(port_names_active, port_names_extra_pgs, port_names_inactive) %}
+{{ defs.generate_pg_profiles_with_extra_lossless_pgs(port_names_active, port_names_extra_pgs, port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_pg_profiles_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_pg_profiles(port_names_active, port_names_inactive) }}
+{%- endmacro %}
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/buffers_dynamic.json.j2 b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/buffers_dynamic.json.j2
new file mode 100644
index 000000000..b2cc958b7
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/buffers_dynamic.json.j2
@@ -0,0 +1,16 @@
+{#
+    Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+    Apache-2.0
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+    http://www.apache.org/licenses/LICENSE-2.0
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+#}
+{%- set default_topo = 't0' %}
+{%- set dynamic_mode = 'true' %}
+{%- include 'buffers_config.j2' %}
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/create_only_config_db_buffers.json b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/create_only_config_db_buffers.json
new file mode 100644
index 000000000..6feb15671
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/create_only_config_db_buffers.json
@@ -0,0 +1,7 @@
+{
+    "DEVICE_METADATA": {
+        "localhost": {
+            "create_only_config_db_buffers": "true"
+        }
+    }
+}
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/hwsku.json b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/hwsku.json
new file mode 100644
index 000000000..04211490c
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/hwsku.json
@@ -0,0 +1,775 @@
+{
+    "interfaces": {
+        "Ethernet0": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet2": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet4": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet6": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet8": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet10": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet12": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet14": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet16": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet18": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet20": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet22": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet24": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet26": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet28": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet30": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet32": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet34": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet36": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet38": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet40": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet42": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet44": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet46": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet48": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet50": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet52": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet54": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet56": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet58": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet60": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet62": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet64": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet66": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet68": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet70": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet72": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet74": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet76": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet78": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet80": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet82": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet84": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet86": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet88": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet90": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet92": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet94": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet96": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet98": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet100": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet102": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet104": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet106": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet108": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet110": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet112": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet114": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet116": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet118": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet120": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet122": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet124": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet126": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet128": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet130": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet132": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet134": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet136": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet138": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet140": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet142": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet144": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet146": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet148": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet150": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet152": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet154": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet156": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet158": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet160": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet162": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet164": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet166": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet168": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet170": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet172": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet174": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet176": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet178": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet180": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet182": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet184": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet186": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet188": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet190": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet192": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet194": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet196": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet198": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet200": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet202": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet204": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet206": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet208": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet210": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet212": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet214": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet216": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet218": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet220": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet222": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet224": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet226": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet228": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet230": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet232": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet234": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet236": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet238": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet240": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet242": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet244": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet246": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet248": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet250": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet252": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet254": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet256": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet258": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet260": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet262": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet264": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet266": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet268": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet270": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet272": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet274": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet276": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet278": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet280": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet282": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet284": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet286": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet288": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet290": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet292": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet294": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet296": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet298": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet300": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet302": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet304": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet306": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet308": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet310": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet312": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet314": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet316": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet318": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet320": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet322": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet324": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet326": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet328": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet330": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet332": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet334": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet336": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet338": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet340": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet342": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet344": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet346": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet348": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet350": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet352": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet354": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet356": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet358": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet360": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet362": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet364": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet366": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet368": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet370": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet372": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet374": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet376": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet378": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet380": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet382": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet384": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet386": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet388": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet390": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet392": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet394": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet396": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet398": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet400": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet402": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet404": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet406": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet408": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet410": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet412": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet414": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet416": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet418": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet420": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet422": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet424": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet426": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet428": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet430": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet432": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet434": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet436": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet438": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet440": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet442": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet444": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet446": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet448": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet450": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet452": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet454": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet456": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet458": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet460": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet462": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet464": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet466": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet468": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet470": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet472": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet474": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet476": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet478": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet480": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet482": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet484": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet486": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet488": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet490": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet492": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet494": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet496": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet498": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet500": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet502": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet504": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet506": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet508": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet510": {
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+        },
+        "Ethernet512": {
+            "default_brkout_mode": "1x25G[10G]"
+        }
+    }
+}
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/pg_profile_lookup.ini b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/pg_profile_lookup.ini
new file mode 100644
index 000000000..c7d8a3b5c
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/pg_profile_lookup.ini
@@ -0,0 +1,42 @@
+##
+## Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+## Apache-2.0
+##
+## Licensed under the Apache License, Version 2.0 (the "License");
+## you may not use this file except in compliance with the License.
+## You may obtain a copy of the License at
+##
+## http://www.apache.org/licenses/LICENSE-2.0
+##
+## Unless required by applicable law or agreed to in writing, software
+## distributed under the License is distributed on an "AS IS" BASIS,
+## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+## See the License for the specific language governing permissions and
+## limitations under the License.
+##
+#  PG lossless profiles.
+# speed cable  size  xon    xoff   threshold
+  10000    5m 19456  19456  33792         0
+  25000    5m 19456  19456  35840         0
+  40000    5m 19456  19456  41984         0
+  50000    5m 19456  19456  46080         0
+ 100000    5m 19456  19456  79872         0
+ 200000    5m 19456  19456  91136         0
+ 400000    5m 19456  19456  157696        0
+ 800000    5m 38912  38912  175104        0
+  10000   40m 19456  19456  34816         0
+  25000   40m 19456  19456  37888         0
+  40000   40m 19456  19456  45056         0
+  50000   40m 19456  19456  50176         0
+ 100000   40m 19456  19456  88064         0
+ 200000   40m 19456  19456  108544        0
+ 400000   40m 19456  19456  192512        0
+ 800000   40m 38912  38912  245760        0
+  10000  300m 19456  19456  40960         0
+  25000  300m 19456  19456  54272         0
+  40000  300m 19456  19456  71680         0
+  50000  300m 19456  19456  82944         0
+ 100000  300m 19456  19456  153600        0
+ 200000  300m 19456  19456  240640        0
+ 400000  300m 19456  19456  455680        0
+ 800000  300m 38912  38912  771072        0
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/port_config.ini b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/port_config.ini
new file mode 100644
index 000000000..a995d8ed2
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/port_config.ini
@@ -0,0 +1,275 @@
+##
+## Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+## Apache-2.0
+##
+## Licensed under the Apache License, Version 2.0 (the "License");
+## you may not use this file except in compliance with the License.
+## You may obtain a copy of the License at
+##
+## http://www.apache.org/licenses/LICENSE-2.0
+##
+## Unless required by applicable law or agreed to in writing, software
+## distributed under the License is distributed on an "AS IS" BASIS,
+## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+## See the License for the specific language governing permissions and
+## limitations under the License.
+##
+
+# name         lanes                                  alias     index    speed    fec
+Ethernet0      0,1                                    etp1a     1        200000   rs
+Ethernet2      2,3                                    etp1b     1        200000   rs
+Ethernet4      4,5                                    etp1c     1        200000   rs
+Ethernet6      6,7                                    etp1d     1        200000   rs
+Ethernet8      8,9                                    etp2a     2        200000   rs
+Ethernet10     10,11                                  etp2b     2        200000   rs
+Ethernet12     12,13                                  etp2c     2        200000   rs
+Ethernet14     14,15                                  etp2d     2        200000   rs
+Ethernet16     16,17                                  etp3a     3        200000   rs
+Ethernet18     18,19                                  etp3b     3        200000   rs
+Ethernet20     20,21                                  etp3c     3        200000   rs
+Ethernet22     22,23                                  etp3d     3        200000   rs
+Ethernet24     24,25                                  etp4a     4        200000   rs
+Ethernet26     26,27                                  etp4b     4        200000   rs
+Ethernet28     28,29                                  etp4c     4        200000   rs
+Ethernet30     30,31                                  etp4d     4        200000   rs
+Ethernet32     32,33                                  etp5a     5        200000   rs
+Ethernet34     34,35                                  etp5b     5        200000   rs
+Ethernet36     36,37                                  etp5c     5        200000   rs
+Ethernet38     38,39                                  etp5d     5        200000   rs
+Ethernet40     40,41                                  etp6a     6        200000   rs
+Ethernet42     42,43                                  etp6b     6        200000   rs
+Ethernet44     44,45                                  etp6c     6        200000   rs
+Ethernet46     46,47                                  etp6d     6        200000   rs
+Ethernet48     48,49                                  etp7a     7        200000   rs
+Ethernet50     50,51                                  etp7b     7        200000   rs
+Ethernet52     52,53                                  etp7c     7        200000   rs
+Ethernet54     54,55                                  etp7d     7        200000   rs
+Ethernet56     56,57                                  etp8a     8        200000   rs
+Ethernet58     58,59                                  etp8b     8        200000   rs
+Ethernet60     60,61                                  etp8c     8        200000   rs
+Ethernet62     62,63                                  etp8d     8        200000   rs
+Ethernet64     64,65                                  etp9a     9        200000   rs
+Ethernet66     66,67                                  etp9b     9        200000   rs
+Ethernet68     68,69                                  etp9c     9        200000   rs
+Ethernet70     70,71                                  etp9d     9        200000   rs
+Ethernet72     72,73                                  etp10a    10       200000   rs
+Ethernet74     74,75                                  etp10b    10       200000   rs
+Ethernet76     76,77                                  etp10c    10       200000   rs
+Ethernet78     78,79                                  etp10d    10       200000   rs
+Ethernet80     80,81                                  etp11a    11       200000   rs
+Ethernet82     82,83                                  etp11b    11       200000   rs
+Ethernet84     84,85                                  etp11c    11       200000   rs
+Ethernet86     86,87                                  etp11d    11       200000   rs
+Ethernet88     88,89                                  etp12a    12       200000   rs
+Ethernet90     90,91                                  etp12b    12       200000   rs
+Ethernet92     92,93                                  etp12c    12       200000   rs
+Ethernet94     94,95                                  etp12d    12       200000   rs
+Ethernet96     96,97                                  etp13a    13       200000   rs
+Ethernet98     98,99                                  etp13b    13       200000   rs
+Ethernet100    100,101                                etp13c    13       200000   rs
+Ethernet102    102,103                                etp13d    13       200000   rs
+Ethernet104    104,105                                etp14a    14       200000   rs
+Ethernet106    106,107                                etp14b    14       200000   rs
+Ethernet108    108,109                                etp14c    14       200000   rs
+Ethernet110    110,111                                etp14d    14       200000   rs
+Ethernet112    112,113                                etp15a    15       200000   rs
+Ethernet114    114,115                                etp15b    15       200000   rs
+Ethernet116    116,117                                etp15c    15       200000   rs
+Ethernet118    118,119                                etp15d    15       200000   rs
+Ethernet120    120,121                                etp16a    16       200000   rs
+Ethernet122    122,123                                etp16b    16       200000   rs
+Ethernet124    124,125                                etp16c    16       200000   rs
+Ethernet126    126,127                                etp16d    16       200000   rs
+Ethernet128    128,129                                etp17a    17       200000   rs
+Ethernet130    130,131                                etp17b    17       200000   rs
+Ethernet132    132,133                                etp17c    17       200000   rs
+Ethernet134    134,135                                etp17d    17       200000   rs
+Ethernet136    136,137                                etp18a    18       200000   rs
+Ethernet138    138,139                                etp18b    18       200000   rs
+Ethernet140    140,141                                etp18c    18       200000   rs
+Ethernet142    142,143                                etp18d    18       200000   rs
+Ethernet144    144,145                                etp19a    19       200000   rs
+Ethernet146    146,147                                etp19b    19       200000   rs
+Ethernet148    148,149                                etp19c    19       200000   rs
+Ethernet150    150,151                                etp19d    19       200000   rs
+Ethernet152    152,153                                etp20a    20       200000   rs
+Ethernet154    154,155                                etp20b    20       200000   rs
+Ethernet156    156,157                                etp20c    20       200000   rs
+Ethernet158    158,159                                etp20d    20       200000   rs
+Ethernet160    160,161                                etp21a    21       200000   rs
+Ethernet162    162,163                                etp21b    21       200000   rs
+Ethernet164    164,165                                etp21c    21       200000   rs
+Ethernet166    166,167                                etp21d    21       200000   rs
+Ethernet168    168,169                                etp22a    22       200000   rs
+Ethernet170    170,171                                etp22b    22       200000   rs
+Ethernet172    172,173                                etp22c    22       200000   rs
+Ethernet174    174,175                                etp22d    22       200000   rs
+Ethernet176    176,177                                etp23a    23       200000   rs
+Ethernet178    178,179                                etp23b    23       200000   rs
+Ethernet180    180,181                                etp23c    23       200000   rs
+Ethernet182    182,183                                etp23d    23       200000   rs
+Ethernet184    184,185                                etp24a    24       200000   rs
+Ethernet186    186,187                                etp24b    24       200000   rs
+Ethernet188    188,189                                etp24c    24       200000   rs
+Ethernet190    190,191                                etp24d    24       200000   rs
+Ethernet192    192,193                                etp25a    25       200000   rs
+Ethernet194    194,195                                etp25b    25       200000   rs
+Ethernet196    196,197                                etp25c    25       200000   rs
+Ethernet198    198,199                                etp25d    25       200000   rs
+Ethernet200    200,201                                etp26a    26       200000   rs
+Ethernet202    202,203                                etp26b    26       200000   rs
+Ethernet204    204,205                                etp26c    26       200000   rs
+Ethernet206    206,207                                etp26d    26       200000   rs
+Ethernet208    208,209                                etp27a    27       200000   rs
+Ethernet210    210,211                                etp27b    27       200000   rs
+Ethernet212    212,213                                etp27c    27       200000   rs
+Ethernet214    214,215                                etp27d    27       200000   rs
+Ethernet216    216,217                                etp28a    28       200000   rs
+Ethernet218    218,219                                etp28b    28       200000   rs
+Ethernet220    220,221                                etp28c    28       200000   rs
+Ethernet222    222,223                                etp28d    28       200000   rs
+Ethernet224    224,225                                etp29a    29       200000   rs
+Ethernet226    226,227                                etp29b    29       200000   rs
+Ethernet228    228,229                                etp29c    29       200000   rs
+Ethernet230    230,231                                etp29d    29       200000   rs
+Ethernet232    232,233                                etp30a    30       200000   rs
+Ethernet234    234,235                                etp30b    30       200000   rs
+Ethernet236    236,237                                etp30c    30       200000   rs
+Ethernet238    238,239                                etp30d    30       200000   rs
+Ethernet240    240,241                                etp31a    31       200000   rs
+Ethernet242    242,243                                etp31b    31       200000   rs
+Ethernet244    244,245                                etp31c    31       200000   rs
+Ethernet246    246,247                                etp31d    31       200000   rs
+Ethernet248    248,249                                etp32a    32       200000   rs
+Ethernet250    250,251                                etp32b    32       200000   rs
+Ethernet252    252,253                                etp32c    32       200000   rs
+Ethernet254    254,255                                etp32d    32       200000   rs
+Ethernet256    256,257                                etp33a    33       200000   rs
+Ethernet258    258,259                                etp33b    33       200000   rs
+Ethernet260    260,261                                etp33c    33       200000   rs
+Ethernet262    262,263                                etp33d    33       200000   rs
+Ethernet264    264,265                                etp34a    34       200000   rs
+Ethernet266    266,267                                etp34b    34       200000   rs
+Ethernet268    268,269                                etp34c    34       200000   rs
+Ethernet270    270,271                                etp34d    34       200000   rs
+Ethernet272    272,273                                etp35a    35       200000   rs
+Ethernet274    274,275                                etp35b    35       200000   rs
+Ethernet276    276,277                                etp35c    35       200000   rs
+Ethernet278    278,279                                etp35d    35       200000   rs
+Ethernet280    280,281                                etp36a    36       200000   rs
+Ethernet282    282,283                                etp36b    36       200000   rs
+Ethernet284    284,285                                etp36c    36       200000   rs
+Ethernet286    286,287                                etp36d    36       200000   rs
+Ethernet288    288,289                                etp37a    37       200000   rs
+Ethernet290    290,291                                etp37b    37       200000   rs
+Ethernet292    292,293                                etp37c    37       200000   rs
+Ethernet294    294,295                                etp37d    37       200000   rs
+Ethernet296    296,297                                etp38a    38       200000   rs
+Ethernet298    298,299                                etp38b    38       200000   rs
+Ethernet300    300,301                                etp38c    38       200000   rs
+Ethernet302    302,303                                etp38d    38       200000   rs
+Ethernet304    304,305                                etp39a    39       200000   rs
+Ethernet306    306,307                                etp39b    39       200000   rs
+Ethernet308    308,309                                etp39c    39       200000   rs
+Ethernet310    310,311                                etp39d    39       200000   rs
+Ethernet312    312,313                                etp40a    40       200000   rs
+Ethernet314    314,315                                etp40b    40       200000   rs
+Ethernet316    316,317                                etp40c    40       200000   rs
+Ethernet318    318,319                                etp40d    40       200000   rs
+Ethernet320    320,321                                etp41a    41       200000   rs
+Ethernet322    322,323                                etp41b    41       200000   rs
+Ethernet324    324,325                                etp41c    41       200000   rs
+Ethernet326    326,327                                etp41d    41       200000   rs
+Ethernet328    328,329                                etp42a    42       200000   rs
+Ethernet330    330,331                                etp42b    42       200000   rs
+Ethernet332    332,333                                etp42c    42       200000   rs
+Ethernet334    334,335                                etp42d    42       200000   rs
+Ethernet336    336,337                                etp43a    43       200000   rs
+Ethernet338    338,339                                etp43b    43       200000   rs
+Ethernet340    340,341                                etp43c    43       200000   rs
+Ethernet342    342,343                                etp43d    43       200000   rs
+Ethernet344    344,345                                etp44a    44       200000   rs
+Ethernet346    346,347                                etp44b    44       200000   rs
+Ethernet348    348,349                                etp44c    44       200000   rs
+Ethernet350    350,351                                etp44d    44       200000   rs
+Ethernet352    352,353                                etp45a    45       200000   rs
+Ethernet354    354,355                                etp45b    45       200000   rs
+Ethernet356    356,357                                etp45c    45       200000   rs
+Ethernet358    358,359                                etp45d    45       200000   rs
+Ethernet360    360,361                                etp46a    46       200000   rs
+Ethernet362    362,363                                etp46b    46       200000   rs
+Ethernet364    364,365                                etp46c    46       200000   rs
+Ethernet366    366,367                                etp46d    46       200000   rs
+Ethernet368    368,369                                etp47a    47       200000   rs
+Ethernet370    370,371                                etp47b    47       200000   rs
+Ethernet372    372,373                                etp47c    47       200000   rs
+Ethernet374    374,375                                etp47d    47       200000   rs
+Ethernet376    376,377                                etp48a    48       200000   rs
+Ethernet378    378,379                                etp48b    48       200000   rs
+Ethernet380    380,381                                etp48c    48       200000   rs
+Ethernet382    382,383                                etp48d    48       200000   rs
+Ethernet384    384,385                                etp49a    49       200000   rs
+Ethernet386    386,387                                etp49b    49       200000   rs
+Ethernet388    388,389                                etp49c    49       200000   rs
+Ethernet390    390,391                                etp49d    49       200000   rs
+Ethernet392    392,393                                etp50a    50       200000   rs
+Ethernet394    394,395                                etp50b    50       200000   rs
+Ethernet396    396,397                                etp50c    50       200000   rs
+Ethernet398    398,399                                etp50d    50       200000   rs
+Ethernet400    400,401                                etp51a    51       200000   rs
+Ethernet402    402,403                                etp51b    51       200000   rs
+Ethernet404    404,405                                etp51c    51       200000   rs
+Ethernet406    406,407                                etp51d    51       200000   rs
+Ethernet408    408,409                                etp52a    52       200000   rs
+Ethernet410    410,411                                etp52b    52       200000   rs
+Ethernet412    412,413                                etp52c    52       200000   rs
+Ethernet414    414,415                                etp52d    52       200000   rs
+Ethernet416    416,417                                etp53a    53       200000   rs
+Ethernet418    418,419                                etp53b    53       200000   rs
+Ethernet420    420,421                                etp53c    53       200000   rs
+Ethernet422    422,423                                etp53d    53       200000   rs
+Ethernet424    424,425                                etp54a    54       200000   rs
+Ethernet426    426,427                                etp54b    54       200000   rs
+Ethernet428    428,429                                etp54c    54       200000   rs
+Ethernet430    430,431                                etp54d    54       200000   rs
+Ethernet432    432,433                                etp55a    55       200000   rs
+Ethernet434    434,435                                etp55b    55       200000   rs
+Ethernet436    436,437                                etp55c    55       200000   rs
+Ethernet438    438,439                                etp55d    55       200000   rs
+Ethernet440    440,441                                etp56a    56       200000   rs
+Ethernet442    442,443                                etp56b    56       200000   rs
+Ethernet444    444,445                                etp56c    56       200000   rs
+Ethernet446    446,447                                etp56d    56       200000   rs
+Ethernet448    448,449                                etp57a    57       200000   rs
+Ethernet450    450,451                                etp57b    57       200000   rs
+Ethernet452    452,453                                etp57c    57       200000   rs
+Ethernet454    454,455                                etp57d    57       200000   rs
+Ethernet456    456,457                                etp58a    58       200000   rs
+Ethernet458    458,459                                etp58b    58       200000   rs
+Ethernet460    460,461                                etp58c    58       200000   rs
+Ethernet462    462,463                                etp58d    58       200000   rs
+Ethernet464    464,465                                etp59a    59       200000   rs
+Ethernet466    466,467                                etp59b    59       200000   rs
+Ethernet468    468,469                                etp59c    59       200000   rs
+Ethernet470    470,471                                etp59d    59       200000   rs
+Ethernet472    472,473                                etp60a    60       200000   rs
+Ethernet474    474,475                                etp60b    60       200000   rs
+Ethernet476    476,477                                etp60c    60       200000   rs
+Ethernet478    478,479                                etp60d    60       200000   rs
+Ethernet480    480,481                                etp61a    61       200000   rs
+Ethernet482    482,483                                etp61b    61       200000   rs
+Ethernet484    484,485                                etp61c    61       200000   rs
+Ethernet486    486,487                                etp61d    61       200000   rs
+Ethernet488    488,489                                etp62a    62       200000   rs
+Ethernet490    490,491                                etp62b    62       200000   rs
+Ethernet492    492,493                                etp62c    62       200000   rs
+Ethernet494    494,495                                etp62d    62       200000   rs
+Ethernet496    496,497                                etp63a    63       200000   rs
+Ethernet498    498,499                                etp63b    63       200000   rs
+Ethernet500    500,501                                etp63c    63       200000   rs
+Ethernet502    502,503                                etp63d    63       200000   rs
+Ethernet504    504,505                                etp64a    64       200000   rs
+Ethernet506    506,507                                etp64b    64       200000   rs
+Ethernet508    508,509                                etp64c    64       200000   rs
+Ethernet510    510,511                                etp64d    64       200000   rs
+Ethernet512    512                                    etp65     65        25000   rs
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/qos.json.j2 b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/qos.json.j2
new file mode 120000
index 000000000..eccf286dc
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/qos.json.j2
@@ -0,0 +1 @@
+../../x86_64-mlnx_msn2700-r0/ACS-MSN2700/qos.json.j2
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/sai.profile b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/sai.profile
new file mode 100644
index 000000000..0d93ea989
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/sai.profile
@@ -0,0 +1 @@
+SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_5600_256x200g.xml
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/sai_5600_256x200g.xml b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/sai_5600_256x200g.xml
new file mode 100644
index 000000000..89518aa8c
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/sai_5600_256x200g.xml
@@ -0,0 +1,627 @@
+<?xml version="1.0"?>
+<!--
+  Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+  Apache-2.0
+
+  Licensed under the Apache License, Version 2.0 (the "License");
+  you may not use this file except in compliance with the License.
+  You may obtain a copy of the License at
+
+  http://www.apache.org/licenses/LICENSE-2.0
+
+  Unless required by applicable law or agreed to in writing, software
+  distributed under the License is distributed on an "AS IS" BASIS,
+  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+  See the License for the specific language governing permissions and
+  limitations under the License.
+-->
+<root>
+    <platform_info type="5600">
+
+        <!-- Device MAC address  -->
+        <device-mac-address>00:02:03:04:05:00</device-mac-address>
+
+        <!-- ISSU enabled -->
+        <issu-enabled>0</issu-enabled>
+
+        <!-- Number of ports in the following port list -->
+        <number-of-physical-ports>65</number-of-physical-ports>
+
+        <!-- List of ports in the device -->
+        <ports-list>
+            <port-info>
+                <local-port>1</local-port>
+                <width>8</width>
+                <module>34</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>4</split>
+                <late-create>true</late-create>
+            </port-info>
+            <port-info>
+                <local-port>5</local-port>
+                <width>8</width>
+                <module>35</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>4</split>
+                <late-create>true</late-create>
+            </port-info>
+            <port-info>
+                <local-port>9</local-port>
+                <width>8</width>
+                <module>33</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>4</split>
+                <late-create>true</late-create>
+            </port-info>
+            <port-info>
+                <local-port>13</local-port>
+                <width>8</width>
+                <module>32</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>4</split>
+                <late-create>true</late-create>
+            </port-info>
+            <port-info>
+                <local-port>17</local-port>
+                <width>8</width>
+                <module>38</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>4</split>
+                <late-create>true</late-create>
+            </port-info>
+            <port-info>
+                <local-port>21</local-port>
+                <width>8</width>
+                <module>39</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>4</split>
+                <late-create>true</late-create>
+            </port-info>
+            <port-info>
+                <local-port>25</local-port>
+                <width>8</width>
+                <module>37</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>4</split>
+                <late-create>true</late-create>
+            </port-info>
+            <port-info>
+                <local-port>29</local-port>
+                <width>8</width>
+                <module>36</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>4</split>
+                <late-create>true</late-create>
+            </port-info>
+            <port-info>
+                <local-port>33</local-port>
+                <width>8</width>
+                <module>42</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>4</split>
+                <late-create>true</late-create>
+            </port-info>
+            <port-info>
+                <local-port>37</local-port>
+                <width>8</width>
+                <module>43</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>4</split>
+                <late-create>true</late-create>
+            </port-info>
+            <port-info>
+                <local-port>41</local-port>
+                <width>8</width>
+                <module>41</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>4</split>
+                <late-create>true</late-create>
+            </port-info>
+            <port-info>
+                <local-port>45</local-port>
+                <width>8</width>
+                <module>40</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>4</split>
+                <late-create>true</late-create>
+            </port-info>
+            <port-info>
+                <local-port>49</local-port>
+                <width>8</width>
+                <module>46</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>4</split>
+                <late-create>true</late-create>
+            </port-info>
+            <port-info>
+                <local-port>53</local-port>
+                <width>8</width>
+                <module>47</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>4</split>
+                <late-create>true</late-create>
+            </port-info>
+            <port-info>
+                <local-port>57</local-port>
+                <width>8</width>
+                <module>45</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>4</split>
+                <late-create>true</late-create>
+            </port-info>
+            <port-info>
+                <local-port>61</local-port>
+                <width>8</width>
+                <module>44</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>4</split>
+                <late-create>true</late-create>
+            </port-info>
+            <port-info>
+                <local-port>65</local-port>
+                <width>8</width>
+                <module>51</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>4</split>
+                <late-create>true</late-create>
+            </port-info>
+            <port-info>
+                <local-port>69</local-port>
+                <width>8</width>
+                <module>50</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>4</split>
+                <late-create>true</late-create>
+            </port-info>
+            <port-info>
+                <local-port>73</local-port>
+                <width>8</width>
+                <module>48</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>4</split>
+                <late-create>true</late-create>
+            </port-info>
+            <port-info>
+                <local-port>77</local-port>
+                <width>8</width>
+                <module>49</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>4</split>
+                <late-create>true</late-create>
+            </port-info>
+            <port-info>
+                <local-port>81</local-port>
+                <width>8</width>
+                <module>55</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>4</split>
+                <late-create>true</late-create>
+            </port-info>
+            <port-info>
+                <local-port>85</local-port>
+                <width>8</width>
+                <module>54</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>4</split>
+                <late-create>true</late-create>
+            </port-info>
+            <port-info>
+                <local-port>89</local-port>
+                <width>8</width>
+                <module>52</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>4</split>
+                <late-create>true</late-create>
+            </port-info>
+            <port-info>
+                <local-port>93</local-port>
+                <width>8</width>
+                <module>53</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>4</split>
+                <late-create>true</late-create>
+            </port-info>
+            <port-info>
+                <local-port>97</local-port>
+                <width>8</width>
+                <module>59</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>4</split>
+                <late-create>true</late-create>
+            </port-info>
+            <port-info>
+                <local-port>101</local-port>
+                <width>8</width>
+                <module>58</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>4</split>
+                <late-create>true</late-create>
+            </port-info>
+            <port-info>
+                <local-port>105</local-port>
+                <width>8</width>
+                <module>56</module>
+
+                <!-- 0 none, 1=2, 2=4, 3=2,4 -->
+                <breakout-modes>3</breakout-modes>
+
+                <!-- (BITMASK) 2 - 1Gb , 16 - 10Gb , 32 - 40Gb , 384 - 50Gb , 4096 - 100Gb , 4096 - 200Gb, 32768 - 400G, 262144 - 800G -->
+                <port-speed>4096</port-speed>
+                <split>4</split>
+                <late-create>true</late-create>
+            </port-info>
+            <port-info>
+                <local-port>109</local-port>
+                <width>8</width>
+                <module>57</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>4</split>
+                <late-create>true</late-create>
+            </port-info>
+            <port-info>
+                <local-port>113</local-port>
+                <width>8</width>
+                <module>63</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>4</split>
+                <late-create>true</late-create>
+            </port-info>
+            <port-info>
+                <local-port>117</local-port>
+                <width>8</width>
+                <module>62</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>4</split>
+                <late-create>true</late-create>
+            </port-info>
+            <port-info>
+                <local-port>121</local-port>
+                <width>8</width>
+                <module>60</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>4</split>
+                <late-create>true</late-create>
+            </port-info>
+            <port-info>
+                <local-port>125</local-port>
+                <width>8</width>
+                <module>61</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>4</split>
+                <late-create>true</late-create>
+            </port-info>
+            <port-info>
+                <local-port>129</local-port>
+                <width>8</width>
+                <module>29</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>4</split>
+                <late-create>true</late-create>
+            </port-info>
+            <port-info>
+                <local-port>133</local-port>
+                <width>8</width>
+                <module>28</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>4</split>
+                <late-create>true</late-create>
+            </port-info>
+            <port-info>
+                <local-port>137</local-port>
+                <width>8</width>
+                <module>30</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>4</split>
+                <late-create>true</late-create>
+            </port-info>
+            <port-info>
+                <local-port>141</local-port>
+                <width>8</width>
+                <module>31</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>4</split>
+                <late-create>true</late-create>
+            </port-info>
+            <port-info>
+                <local-port>145</local-port>
+                <width>8</width>
+                <module>25</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>4</split>
+                <late-create>true</late-create>
+            </port-info>
+            <port-info>
+                <local-port>149</local-port>
+                <width>8</width>
+                <module>24</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>4</split>
+                <late-create>true</late-create>
+            </port-info>
+            <port-info>
+                <local-port>153</local-port>
+                <width>8</width>
+                <module>26</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>4</split>
+                <late-create>true</late-create>
+            </port-info>
+            <port-info>
+                <local-port>157</local-port>
+                <width>8</width>
+                <module>27</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>4</split>
+                <late-create>true</late-create>
+            </port-info>
+            <port-info>
+                <local-port>161</local-port>
+                <width>8</width>
+                <module>21</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>4</split>
+                <late-create>true</late-create>
+            </port-info>
+            <port-info>
+                <local-port>165</local-port>
+                <width>8</width>
+                <module>20</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>4</split>
+                <late-create>true</late-create>
+            </port-info>
+            <port-info>
+                <local-port>169</local-port>
+                <width>8</width>
+                <module>22</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>4</split>
+                <late-create>true</late-create>
+            </port-info>
+            <port-info>
+                <local-port>173</local-port>
+                <width>8</width>
+                <module>23</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>4</split>
+                <late-create>true</late-create>
+            </port-info>
+            <port-info>
+                <local-port>177</local-port>
+                <width>8</width>
+                <module>17</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>4</split>
+                <late-create>true</late-create>
+            </port-info>
+            <port-info>
+                <local-port>181</local-port>
+                <width>8</width>
+                <module>16</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>4</split>
+                <late-create>true</late-create>
+            </port-info>
+            <port-info>
+                <local-port>185</local-port>
+                <width>8</width>
+                <module>18</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>4</split>
+                <late-create>true</late-create>
+            </port-info>
+            <port-info>
+                <local-port>189</local-port>
+                <width>8</width>
+                <module>19</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>4</split>
+                <late-create>true</late-create>
+            </port-info>
+            <port-info>
+                <local-port>193</local-port>
+                <width>8</width>
+                <module>12</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>4</split>
+                <late-create>true</late-create>
+            </port-info>
+            <port-info>
+                <local-port>197</local-port>
+                <width>8</width>
+                <module>13</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>4</split>
+                <late-create>true</late-create>
+            </port-info>
+            <port-info>
+                <local-port>201</local-port>
+                <width>8</width>
+                <module>15</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>4</split>
+                <late-create>true</late-create>
+            </port-info>
+            <port-info>
+                <local-port>205</local-port>
+                <width>8</width>
+                <module>14</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>4</split>
+                <late-create>true</late-create>
+            </port-info>
+            <port-info>
+                <local-port>209</local-port>
+                <width>8</width>
+                <module>8</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>4</split>
+                <late-create>true</late-create>
+            </port-info>
+            <port-info>
+                <local-port>213</local-port>
+                <width>8</width>
+                <module>9</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>4</split>
+                <late-create>true</late-create>
+            </port-info>
+            <port-info>
+                <local-port>217</local-port>
+                <width>8</width>
+                <module>11</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>4</split>
+                <late-create>true</late-create>
+            </port-info>
+            <port-info>
+                <local-port>221</local-port>
+                <width>8</width>
+                <module>10</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>4</split>
+                <late-create>true</late-create>
+            </port-info>
+            <port-info>
+                <local-port>225</local-port>
+                <width>8</width>
+                <module>4</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>4</split>
+                <late-create>true</late-create>
+            </port-info>
+            <port-info>
+                <local-port>229</local-port>
+                <width>8</width>
+                <module>5</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>4</split>
+                <late-create>true</late-create>
+            </port-info>
+            <port-info>
+                <local-port>233</local-port>
+                <width>8</width>
+                <module>7</module>
+
+                <!-- 0 none, 1=2, 2=4, 3=2,4 -->
+                <breakout-modes>3</breakout-modes>
+
+                <!-- (BITMASK) 2 - 1Gb , 16 - 10Gb , 32 - 40Gb , 384 - 50Gb , 4096 - 100Gb , 4096 - 200Gb -->
+                <port-speed>4096</port-speed>
+                <split>4</split>
+                <late-create>true</late-create>
+            </port-info>
+            <port-info>
+                <local-port>237</local-port>
+                <width>8</width>
+                <module>6</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>4</split>
+                <late-create>true</late-create>
+            </port-info>
+            <port-info>
+                <local-port>241</local-port>
+                <width>8</width>
+                <module>0</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>4</split>
+                <late-create>true</late-create>
+            </port-info>
+            <port-info>
+                <local-port>245</local-port>
+                <width>8</width>
+                <module>1</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>4</split>
+                <late-create>true</late-create>
+            </port-info>
+            <port-info>
+                <local-port>249</local-port>
+                <width>8</width>
+                <module>3</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>4</split>
+                <late-create>true</late-create>
+            </port-info>
+            <port-info>
+                <local-port>253</local-port>
+                <width>8</width>
+                <module>2</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>4</split>
+                <late-create>true</late-create>
+            </port-info>
+            <port-info>
+                <local-port>257</local-port>
+                <width>1</width>
+                <module>64</module>
+                <breakout-modes>0</breakout-modes>
+                <port-speed>64</port-speed>
+                <late-create>true</late-create>
+            </port-info>
+        </ports-list>
+    </platform_info>
+</root>
+

From c1b6154428e86c0c685bb3fc46b22bdd35ee4416 Mon Sep 17 00:00:00 2001
From: Sudharsan Dhamal Gopalarathnam <sudharsand@nvidia.com>
Date: Mon, 10 Jun 2024 03:58:07 -0700
Subject: [PATCH 0734/1115] [Mellanox] Updating SAI version to
 SAIBuild2405.28.0.33 (#19244)

---
 platform/mellanox/mlnx-sai.mk | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/platform/mellanox/mlnx-sai.mk b/platform/mellanox/mlnx-sai.mk
index 8eae89f3a..6e184f670 100644
--- a/platform/mellanox/mlnx-sai.mk
+++ b/platform/mellanox/mlnx-sai.mk
@@ -1,6 +1,6 @@
 # Mellanox SAI
 
-MLNX_SAI_VERSION = SAIBuild2405.28.0.30
+MLNX_SAI_VERSION = SAIBuild2405.28.0.33
 MLNX_SAI_ASSETS_GITHUB_URL = https://github.com/Mellanox/Spectrum-SDK-Drivers-SONiC-Bins
 MLNX_SAI_ASSETS_RELEASE_TAG = sai-$(MLNX_SAI_VERSION)-$(BLDENV)-$(CONFIGURED_ARCH)
 MLNX_SAI_ASSETS_URL = $(MLNX_SAI_ASSETS_GITHUB_URL)/releases/download/$(MLNX_SAI_ASSETS_RELEASE_TAG)

From 39658593cf399f6f19be98eae141df38d8512be8 Mon Sep 17 00:00:00 2001
From: Nazarii Hnydyn <nazariig@nvidia.com>
Date: Mon, 10 Jun 2024 14:00:02 +0300
Subject: [PATCH 0735/1115] [Mellanox] Improve FW upgrade: add locking
 mechanism. (#18925)

User implications:
On cold/warm/fast reboot if there is a syncd service start ongoing, the target procedure will stay blocked until the original call is done. This may delay the action in time.

- Why I did it
Improve the upgrade fw script avoiding errors in the logs when cold reboot is executed during service restart
Work item tracking

- How I did it
Added locking mechanism for Mellanox FW upgrade

- How to verify it
Run cold reboot after DUT first install

Signed-off-by: Nazarii Hnydyn <nazariig@nvidia.com>
---
 platform/mellanox/mlnx-fw-upgrade.j2 | 26 ++++++++++++++++++++++++++
 1 file changed, 26 insertions(+)

diff --git a/platform/mellanox/mlnx-fw-upgrade.j2 b/platform/mellanox/mlnx-fw-upgrade.j2
index eb2886249..e4c567c1b 100755
--- a/platform/mellanox/mlnx-fw-upgrade.j2
+++ b/platform/mellanox/mlnx-fw-upgrade.j2
@@ -20,6 +20,8 @@ declare -r SCRIPT_NAME="$(basename "$0")"
 declare -r SCRIPT_PATH="$(readlink -f "$0")"
 declare -r SCRIPT_DIR="$(dirname "$SCRIPT_PATH")"
 
+declare -r LOCKFILE="/tmp/mlxfwmanager-lock"
+
 declare -r YES_PARAM="yes"
 declare -r NO_PARAM="no"
 
@@ -163,6 +165,20 @@ function ExitSuccess() {
     exit "${EXIT_SUCCESS}"
 }
 
+function LockStateChange() {
+    LogInfo "Locking ${LOCKFILE} from ${SCRIPT_NAME}"
+
+    exec {LOCKFD}>${LOCKFILE}
+    /usr/bin/flock -x ${LOCKFD}
+
+    LogInfo "Locked ${LOCKFILE} (${LOCKFD}) from ${SCRIPT_NAME}"
+}
+
+function UnlockStateChange() {
+    LogInfo "Unlocking ${LOCKFILE} (${LOCKFD}) from ${SCRIPT_NAME}"
+    /usr/bin/flock -u ${LOCKFD}
+}
+
 function WaitForDevice() {
     local -i QUERY_RETRY_COUNT_MAX="10"
     local -i QUERY_RETRY_COUNT="0"
@@ -372,10 +388,20 @@ function ExitIfQEMU() {
     fi
 }
 
+function Cleanup() {
+    if [[ -n "${LOCKFD}" ]]; then
+        UnlockStateChange
+    fi
+}
+
+trap Cleanup EXIT
+
 ParseArguments "$@"
 
 ExitIfQEMU
 
+LockStateChange
+
 WaitForDevice
 
 if [ "${IMAGE_UPGRADE}" != "${YES_PARAM}" ]; then

From 792aa2368df9d77ae131475dd4a072e915f34295 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Mon, 10 Jun 2024 19:01:02 +0800
Subject: [PATCH 0736/1115] [submodule] Update submodule sonic-sairedis to the
 latest HEAD automatically (#19260)

#### Why I did it
src/sonic-sairedis
```
* 1f2c861a - (HEAD -> master, origin/master, origin/HEAD) Update SAI submodule to latest master (#1388) (18 hours ago) [Kamil Cudnik]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-sairedis | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-sairedis b/src/sonic-sairedis
index 104835026..1f2c861aa 160000
--- a/src/sonic-sairedis
+++ b/src/sonic-sairedis
@@ -1 +1 @@
-Subproject commit 104835026159093aca3438548dcb129dfd940441
+Subproject commit 1f2c861aafe751e62ad8510419a4da7c795f4bb5

From a9bd05c4f7105ef57cd546b160587bd8e6935c11 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Mon, 10 Jun 2024 19:01:06 +0800
Subject: [PATCH 0737/1115] [submodule] Update submodule sonic-linux-kernel to
 the latest HEAD automatically (#19241)

#### Why I did it
src/sonic-linux-kernel
```
* 93b8fe9 - (HEAD -> master, origin/master, origin/HEAD) [Mellanox] Integrate HW-MGMT 7.0030.4003 Changes (#396) (3 days ago) [Vivek]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-linux-kernel | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-linux-kernel b/src/sonic-linux-kernel
index f9bfb90ce..93b8fe9a9 160000
--- a/src/sonic-linux-kernel
+++ b/src/sonic-linux-kernel
@@ -1 +1 @@
-Subproject commit f9bfb90cefbd00e0a485a0ce4f7bd60134f3eabf
+Subproject commit 93b8fe9a9f657eae2438c94b9625d2ae34274eb1

From b386af662c42bcfece3ea3d2fbcd697f0c3d5d88 Mon Sep 17 00:00:00 2001
From: Vivek <vkarri@nvidia.com>
Date: Mon, 10 Jun 2024 09:34:33 -0700
Subject: [PATCH 0738/1115] [Mellanox] Integrate HW-MGMT 7.0030.4003 Changes
 (#19184)

- Why I did it
Integrate HW-MGMT 7.0030.4003 Changes
Requires sonic-net/sonic-linux-kernel#396

- How I did it
Run make integrate-mlnx-hw-mgmt

- How to verify it
Build an image and run tests from "sonic-mgmt".
---
 platform/mellanox/hw-management.mk                   |  2 +-
 platform/mellanox/hw-management/hw-mgmt              |  2 +-
 .../non-upstream-patches/external-changes.patch      | 12 ++++++++++++
 3 files changed, 14 insertions(+), 2 deletions(-)

diff --git a/platform/mellanox/hw-management.mk b/platform/mellanox/hw-management.mk
index e2de01b04..9664435a1 100644
--- a/platform/mellanox/hw-management.mk
+++ b/platform/mellanox/hw-management.mk
@@ -16,7 +16,7 @@
 #
 # Mellanox HW Management
 
-MLNX_HW_MANAGEMENT_VERSION = 7.0030.3008
+MLNX_HW_MANAGEMENT_VERSION = 7.0030.4003
 
 export MLNX_HW_MANAGEMENT_VERSION
 
diff --git a/platform/mellanox/hw-management/hw-mgmt b/platform/mellanox/hw-management/hw-mgmt
index 82a14a789..6cf13ac60 160000
--- a/platform/mellanox/hw-management/hw-mgmt
+++ b/platform/mellanox/hw-management/hw-mgmt
@@ -1 +1 @@
-Subproject commit 82a14a789e8755cfe7be863833d41817a9b07ad9
+Subproject commit 6cf13ac6000ad7be68ef9b6b25261bbb0fd5d5a5
diff --git a/platform/mellanox/non-upstream-patches/external-changes.patch b/platform/mellanox/non-upstream-patches/external-changes.patch
index 8b1378917..ffc749cfc 100644
--- a/platform/mellanox/non-upstream-patches/external-changes.patch
+++ b/platform/mellanox/non-upstream-patches/external-changes.patch
@@ -1 +1,13 @@
 
+--- a/patch/kconfig-inclusions
++++ b/patch/kconfig-inclusions
+@@ -117,6 +117,9 @@
+ CONFIG_PINCTRL_AMD=y
+ CONFIG_EDAC_AMD64=m
+ CONFIG_AMD_XGBE_DCB=y
++CONFIG_USB_NET_DRIVERS=m
++CONFIG_USB_USBNET=m
++CONFIG_USB_NET_CDCETHER=m
+ ###-> mellanox_amd64-end
+ # For Cisco 8000
+ CONFIG_PHYLIB=m

From c57ac6894d4b22c0a34b965b06d4ec2c3dbb8aeb Mon Sep 17 00:00:00 2001
From: Yuanzhe <150663541+yuazhe@users.noreply.github.com>
Date: Tue, 11 Jun 2024 15:13:49 +0800
Subject: [PATCH 0739/1115] [Mellanox]PSU sensors dynamic configuration
 (#18528)
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

- Why I did it
Previously, the PSU sensor configuration inside sensors.conf is hardcoded for each platform, allowing no flexibility for other PSU combination possibilities. However, there exists a scenario that user has a second source of PSU which has different sensors compared to the original sensors.conf. Thereby it requires the system to have the ability to dynamically detect the PSU model in using and load relevant sensor’s configuration file.

- How I did it
This PR involves a new script and a corresponding data file which contains all PSU model’s sensor configuration info. The script reads the hardware PSU information through hw-management and determines its model. Based on that, it searches for the corresponding pre-defined PSU sensor data, integrate them into the sensors.conf, and let PMON copy it for further loading by lm-sensor.

It also integrates the script inside the platform's get_model() API. Therefore, each time this API is called by the psud code, it checks whether there has been a change in the PSU model. If a change is detected, it updates the PSU sensors configuration by calling the script.

- How to verify it
use sensors command and check the psu section is rightly labeled.

Signed-off-by: Yuanzhe, Liu <yualiu@nvidia.com>
---
 .../x86_64-mlnx_msn2010-r0/psu_sensors.json   |   1 +
 .../psu_sensors_conf_updater                  |   1 +
 .../x86_64-mlnx_msn2010-r0/sensors.conf       |   2 +
 .../x86_64-mlnx_msn2100-r0/psu_sensors.json   |   1 +
 .../psu_sensors_conf_updater                  |   1 +
 .../x86_64-mlnx_msn2100-r0/sensors.conf       |   2 +
 .../x86_64-mlnx_msn2410-r0/psu_sensors.json   |   1 +
 .../psu_sensors_conf_updater                  |   1 +
 .../x86_64-mlnx_msn2410-r0/sensors.conf       |   2 +
 .../x86_64-mlnx_msn2700-r0/psu_sensors.json   | 418 ++++++++++++++++++
 .../psu_sensors_conf_updater                  |  81 ++++
 .../x86_64-mlnx_msn2700-r0/sensors.conf       |   2 +
 .../x86_64-mlnx_msn2700a1-r0/psu_sensors.json |   1 +
 .../psu_sensors_conf_updater                  |   1 +
 .../x86_64-mlnx_msn2700a1-r0/sensors.conf     |   2 +
 .../x86_64-mlnx_msn2740-r0/psu_sensors.json   |   1 +
 .../psu_sensors_conf_updater                  |   1 +
 .../x86_64-mlnx_msn2740-r0/sensors.conf       |   2 +
 .../x86_64-mlnx_msn3420-r0/psu_sensors.json   |   1 +
 .../psu_sensors_conf_updater                  |   1 +
 .../x86_64-mlnx_msn3420-r0/sensors.conf       |   2 +
 .../x86_64-mlnx_msn3700-r0/psu_sensors.json   |   1 +
 .../psu_sensors_conf_updater                  |   1 +
 .../x86_64-mlnx_msn3700-r0/sensors.conf       |   2 +
 .../sensors_respin.conf                       |   2 +
 .../sensors_swb_respin.conf                   |   2 +
 .../x86_64-mlnx_msn3700c-r0/psu_sensors.json  |   1 +
 .../psu_sensors_conf_updater                  |   1 +
 .../x86_64-mlnx_msn3700c-r0/sensors.conf      |   2 +
 .../sensors_respin.conf                       |   2 +
 .../sensors_swb_respin.conf                   |   2 +
 .../x86_64-mlnx_msn3800-r0/psu_sensors.json   |   1 +
 .../psu_sensors_conf_updater                  |   1 +
 .../x86_64-mlnx_msn3800-r0/sensors.conf       |   2 +
 .../x86_64-mlnx_msn4410-r0/psu_sensors.json   |   1 +
 .../psu_sensors_conf_updater                  |   1 +
 .../x86_64-mlnx_msn4600-r0/psu_sensors.json   |   1 +
 .../psu_sensors_conf_updater                  |   1 +
 .../x86_64-mlnx_msn4600-r0/sensors.conf       |   2 +
 .../x86_64-mlnx_msn4600c-r0/psu_sensors.json  |   1 +
 .../psu_sensors_conf_updater                  |   1 +
 .../x86_64-mlnx_msn4600c-r0/sensors.conf      |   2 +
 .../x86_64-mlnx_msn4600c-r0/sensors.conf.a1   |   2 +
 .../sensors_respin.conf                       |   2 +
 .../sensors_respin.conf.a1                    |   2 +
 .../x86_64-mlnx_msn4700-r0/psu_sensors.json   |   1 +
 .../psu_sensors_conf_updater                  |   1 +
 .../x86_64-mlnx_msn4700-r0/sensors.conf       |   2 +
 .../x86_64-mlnx_msn4700-r0/sensors.conf.a1    |   2 +
 .../x86_64-nvidia_sn2201-r0/psu_sensors.json  |   1 +
 .../psu_sensors_conf_updater                  |   1 +
 .../x86_64-nvidia_sn2201-r0/sensors.conf      |   2 +
 .../x86_64-nvidia_sn4800-r0/psu_sensors.json  |   1 +
 .../psu_sensors_conf_updater                  |   1 +
 .../x86_64-nvidia_sn4800-r0/sensors.conf      |   2 +
 .../x86_64-nvidia_sn5400-r0/psu_sensors.json  |   1 +
 .../psu_sensors_conf_updater                  |   1 +
 .../x86_64-nvidia_sn5400-r0/sensors.conf      |   2 +
 .../x86_64-nvidia_sn5600-r0/psu_sensors.json  |   1 +
 .../psu_sensors_conf_updater                  |   1 +
 .../x86_64-nvidia_sn5600-r0/sensors.conf      |   2 +
 .../docker-platform-monitor/docker_init.j2    |   8 +
 .../mlnx-platform-api/sonic_platform/psu.py   |  13 +-
 63 files changed, 603 insertions(+), 1 deletion(-)
 create mode 120000 device/mellanox/x86_64-mlnx_msn2010-r0/psu_sensors.json
 create mode 120000 device/mellanox/x86_64-mlnx_msn2010-r0/psu_sensors_conf_updater
 create mode 120000 device/mellanox/x86_64-mlnx_msn2100-r0/psu_sensors.json
 create mode 120000 device/mellanox/x86_64-mlnx_msn2100-r0/psu_sensors_conf_updater
 create mode 120000 device/mellanox/x86_64-mlnx_msn2410-r0/psu_sensors.json
 create mode 120000 device/mellanox/x86_64-mlnx_msn2410-r0/psu_sensors_conf_updater
 create mode 100644 device/mellanox/x86_64-mlnx_msn2700-r0/psu_sensors.json
 create mode 100644 device/mellanox/x86_64-mlnx_msn2700-r0/psu_sensors_conf_updater
 create mode 120000 device/mellanox/x86_64-mlnx_msn2700a1-r0/psu_sensors.json
 create mode 120000 device/mellanox/x86_64-mlnx_msn2700a1-r0/psu_sensors_conf_updater
 create mode 120000 device/mellanox/x86_64-mlnx_msn2740-r0/psu_sensors.json
 create mode 120000 device/mellanox/x86_64-mlnx_msn2740-r0/psu_sensors_conf_updater
 create mode 120000 device/mellanox/x86_64-mlnx_msn3420-r0/psu_sensors.json
 create mode 120000 device/mellanox/x86_64-mlnx_msn3420-r0/psu_sensors_conf_updater
 create mode 120000 device/mellanox/x86_64-mlnx_msn3700-r0/psu_sensors.json
 create mode 120000 device/mellanox/x86_64-mlnx_msn3700-r0/psu_sensors_conf_updater
 create mode 120000 device/mellanox/x86_64-mlnx_msn3700c-r0/psu_sensors.json
 create mode 120000 device/mellanox/x86_64-mlnx_msn3700c-r0/psu_sensors_conf_updater
 create mode 120000 device/mellanox/x86_64-mlnx_msn3800-r0/psu_sensors.json
 create mode 120000 device/mellanox/x86_64-mlnx_msn3800-r0/psu_sensors_conf_updater
 create mode 120000 device/mellanox/x86_64-mlnx_msn4410-r0/psu_sensors.json
 create mode 120000 device/mellanox/x86_64-mlnx_msn4410-r0/psu_sensors_conf_updater
 create mode 120000 device/mellanox/x86_64-mlnx_msn4600-r0/psu_sensors.json
 create mode 120000 device/mellanox/x86_64-mlnx_msn4600-r0/psu_sensors_conf_updater
 create mode 120000 device/mellanox/x86_64-mlnx_msn4600c-r0/psu_sensors.json
 create mode 120000 device/mellanox/x86_64-mlnx_msn4600c-r0/psu_sensors_conf_updater
 create mode 120000 device/mellanox/x86_64-mlnx_msn4700-r0/psu_sensors.json
 create mode 120000 device/mellanox/x86_64-mlnx_msn4700-r0/psu_sensors_conf_updater
 create mode 120000 device/mellanox/x86_64-nvidia_sn2201-r0/psu_sensors.json
 create mode 120000 device/mellanox/x86_64-nvidia_sn2201-r0/psu_sensors_conf_updater
 create mode 120000 device/mellanox/x86_64-nvidia_sn4800-r0/psu_sensors.json
 create mode 120000 device/mellanox/x86_64-nvidia_sn4800-r0/psu_sensors_conf_updater
 create mode 120000 device/mellanox/x86_64-nvidia_sn5400-r0/psu_sensors.json
 create mode 120000 device/mellanox/x86_64-nvidia_sn5400-r0/psu_sensors_conf_updater
 create mode 120000 device/mellanox/x86_64-nvidia_sn5600-r0/psu_sensors.json
 create mode 120000 device/mellanox/x86_64-nvidia_sn5600-r0/psu_sensors_conf_updater

diff --git a/device/mellanox/x86_64-mlnx_msn2010-r0/psu_sensors.json b/device/mellanox/x86_64-mlnx_msn2010-r0/psu_sensors.json
new file mode 120000
index 000000000..581669431
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn2010-r0/psu_sensors.json
@@ -0,0 +1 @@
+../x86_64-mlnx_msn2700-r0/psu_sensors.json
\ No newline at end of file
diff --git a/device/mellanox/x86_64-mlnx_msn2010-r0/psu_sensors_conf_updater b/device/mellanox/x86_64-mlnx_msn2010-r0/psu_sensors_conf_updater
new file mode 120000
index 000000000..b9686d838
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn2010-r0/psu_sensors_conf_updater
@@ -0,0 +1 @@
+../x86_64-mlnx_msn2700-r0/psu_sensors_conf_updater
\ No newline at end of file
diff --git a/device/mellanox/x86_64-mlnx_msn2010-r0/sensors.conf b/device/mellanox/x86_64-mlnx_msn2010-r0/sensors.conf
index 92d742c18..d3a0ab69b 100644
--- a/device/mellanox/x86_64-mlnx_msn2010-r0/sensors.conf
+++ b/device/mellanox/x86_64-mlnx_msn2010-r0/sensors.conf
@@ -4,6 +4,8 @@
 # Platform specific sensors config for SN2010
 ################################################################################
 
+# Hardware revision default
+
 # Temperature sensors
 bus "i2c-2" "i2c-1-mux (chan_id 1)"
     chip "mlxsw-i2c-*-48"
diff --git a/device/mellanox/x86_64-mlnx_msn2100-r0/psu_sensors.json b/device/mellanox/x86_64-mlnx_msn2100-r0/psu_sensors.json
new file mode 120000
index 000000000..581669431
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn2100-r0/psu_sensors.json
@@ -0,0 +1 @@
+../x86_64-mlnx_msn2700-r0/psu_sensors.json
\ No newline at end of file
diff --git a/device/mellanox/x86_64-mlnx_msn2100-r0/psu_sensors_conf_updater b/device/mellanox/x86_64-mlnx_msn2100-r0/psu_sensors_conf_updater
new file mode 120000
index 000000000..b9686d838
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn2100-r0/psu_sensors_conf_updater
@@ -0,0 +1 @@
+../x86_64-mlnx_msn2700-r0/psu_sensors_conf_updater
\ No newline at end of file
diff --git a/device/mellanox/x86_64-mlnx_msn2100-r0/sensors.conf b/device/mellanox/x86_64-mlnx_msn2100-r0/sensors.conf
index 22b8e4dd8..bccc08540 100644
--- a/device/mellanox/x86_64-mlnx_msn2100-r0/sensors.conf
+++ b/device/mellanox/x86_64-mlnx_msn2100-r0/sensors.conf
@@ -4,6 +4,8 @@
 # Platform specific sensors config for SN2100
 ################################################################################
 
+# Hardware revision default
+
 # Temperature sensors
 bus "i2c-2" "i2c-1-mux (chan_id 1)"
     chip "mlxsw-i2c-*-48"
diff --git a/device/mellanox/x86_64-mlnx_msn2410-r0/psu_sensors.json b/device/mellanox/x86_64-mlnx_msn2410-r0/psu_sensors.json
new file mode 120000
index 000000000..581669431
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn2410-r0/psu_sensors.json
@@ -0,0 +1 @@
+../x86_64-mlnx_msn2700-r0/psu_sensors.json
\ No newline at end of file
diff --git a/device/mellanox/x86_64-mlnx_msn2410-r0/psu_sensors_conf_updater b/device/mellanox/x86_64-mlnx_msn2410-r0/psu_sensors_conf_updater
new file mode 120000
index 000000000..b9686d838
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn2410-r0/psu_sensors_conf_updater
@@ -0,0 +1 @@
+../x86_64-mlnx_msn2700-r0/psu_sensors_conf_updater
\ No newline at end of file
diff --git a/device/mellanox/x86_64-mlnx_msn2410-r0/sensors.conf b/device/mellanox/x86_64-mlnx_msn2410-r0/sensors.conf
index fa446832f..47ed0e33b 100644
--- a/device/mellanox/x86_64-mlnx_msn2410-r0/sensors.conf
+++ b/device/mellanox/x86_64-mlnx_msn2410-r0/sensors.conf
@@ -4,6 +4,8 @@
 # Platform specific sensors config for SN2410
 ################################################################################
 
+# Hardware revision default
+
 # Temperature sensors
 bus "i2c-2" "i2c-1-mux (chan_id 1)"
     chip "mlxsw-i2c-*-48"
diff --git a/device/mellanox/x86_64-mlnx_msn2700-r0/psu_sensors.json b/device/mellanox/x86_64-mlnx_msn2700-r0/psu_sensors.json
new file mode 100644
index 000000000..983325f1e
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn2700-r0/psu_sensors.json
@@ -0,0 +1,418 @@
+{
+    "platform": {
+        "MSN2410": {
+            "default": {
+                "bus": [
+                    "i2c-10",
+                    "i2c-1-mux (chan_id 10)"
+                ],
+                "chip": {
+                    "dps460-i2c-*-58": ["2", "R"],
+                    "dps460-i2c-*-59": ["1", "L"]
+                }
+            }
+        },
+        "MSN2700": {
+            "default": {
+                "bus": [
+                    "i2c-10",
+                    "i2c-1-mux (chan_id 10)"
+                ],
+                "chip": {
+                    "dps460-i2c-*-58": ["2", "R"],
+                    "dps460-i2c-*-59": ["1", "L"]
+                }
+            }
+        },
+        "MSN2700-A1": {
+            "default": {
+                "bus": [],
+                "chip": {
+                    "dps460-i2c-*-58": ["2", "R"],
+                    "dps460-i2c-*-59": ["1", "L"]
+                }
+            }
+        },
+        "MSN2740": {
+            "default": {
+                "bus": [
+                    "i2c-4",
+                    "i2c-1-mux (chan_id 3)"
+                ],
+                "chip": {
+                    "dps460-i2c-*-58": ["2", "R"],
+                    "dps460-i2c-*-59": ["1", "L"]
+                }
+            }
+        },
+        "MSN3420": {
+            "default": {
+                "bus": [
+                    "i2c-4",
+                    "i2c-1-mux (chan_id 3)"
+                ],
+                "chip": {
+                    "dps460-i2c-*-58": ["2"],
+                    "dps460-i2c-*-59": ["1"]
+                }
+            }
+        },
+        "MSN3700": {
+            "default": {
+                "bus": [
+                    "i2c-4", 
+                    "i2c-1-mux (chan_id 3)"
+                ],
+                "chip": {
+                    "dps460-i2c-*-58": ["2"],
+                    "dps460-i2c-*-59": ["1"]
+                }
+            },
+            "respin": {
+                "bus": [
+                    "i2c-4", 
+                    "i2c-1-mux (chan_id 3)"
+                ],
+                "chip": {
+                    "dps460-i2c-*-58": ["1"],
+                    "dps460-i2c-*-59": ["2"]
+                }
+            },
+            "swb_respin": {
+                "bus": [
+                    "i2c-4", 
+                    "i2c-1-mux (chan_id 3)"
+                ],
+                "chip": {
+                    "dps460-i2c-*-58": ["1"],
+                    "dps460-i2c-*-59": ["2"]
+                }
+            }
+        },
+        "MSN3700C": {
+            "default": {
+                "bus": [
+                    "i2c-4",
+                    "i2c-1-mux (chan_id 3)"
+                ],
+                "chip": {
+                    "dps460-i2c-*-58": ["2"],
+                    "dps460-i2c-*-59": ["1"]
+                }
+            },
+            "respin": {
+                "bus": [
+                    "i2c-4",
+                    "i2c-1-mux (chan_id 3)"
+                ],
+                "chip": {
+                    "dps460-i2c-*-58": ["1"],
+                    "dps460-i2c-*-59": ["2"]
+                }
+            },
+            "swb_respin": {
+                "bus": [
+                    "i2c-4",
+                    "i2c-1-mux (chan_id 3)"
+                ],
+                "chip": {
+                    "dps460-i2c-*-58": ["1"],
+                    "dps460-i2c-*-59": ["2"]
+                }
+            }
+        },
+        "MSN3800": {
+            "default": {
+                "bus": [
+                    "i2c-4",
+                    "i2c-1-mux (chan_id 3)"
+                ],
+                "chip": {
+                    "dps460-i2c-*-58": ["2"],
+                    "dps460-i2c-*-59": ["1"]
+                }
+            }
+        },
+        "MSN4410": {
+            "default": {
+                "bus": [
+                    "i2c-4",
+                    "i2c-1-mux (chan_id 3)"
+                ],
+                "chip": {
+                    "dps460-i2c-*-58": ["1", "L"],
+                    "dps460-i2c-*-59": ["2", "R"]
+                }
+            },
+            "a1": {
+                "bus": [
+                    "i2c-4",
+                    "i2c-1-mux (chan_id 3)"
+                ],
+                "chip": {
+                    "dps460-i2c-*-58": ["1", "L"],
+                    "dps460-i2c-*-59": ["2", "R"]
+                }                
+            }
+        },
+        "MSN4600": {
+            "default": {
+                "bus": [
+                    "i2c-4",
+                    "i2c-1-mux (chan_id 3)"
+                ],
+                "chip": {
+                    "dps460-i2c-*-58": ["2", "R"],
+                    "dps460-i2c-*-59": ["1", "L"]
+                }
+            }
+        },
+        "MSN4600C": {
+            "default": {
+                "bus": [
+                    "i2c-4",
+                    "i2c-1-mux (chan_id 3)"
+                ],
+                "chip": {
+                    "dps460-i2c-*-58": ["2", "R"],
+                    "dps460-i2c-*-59": ["1", "L"]
+                }
+            },
+            "a1": {
+                "bus": [
+                    "i2c-4",
+                    "i2c-1-mux (chan_id 3)"
+                ],
+                "chip": {
+                    "dps460-i2c-*-58": ["1", "L"],
+                    "dps460-i2c-*-59": ["2", "R"]
+                }
+            },
+            "respin": {
+                "bus": [
+                    "i2c-4",
+                    "i2c-1-mux (chan_id 3)"
+                ],
+                "chip": {
+                    "dps460-i2c-*-58": ["2", "R"],
+                    "dps460-i2c-*-59": ["1", "L"]
+                }                
+            },
+            "respin_a1": {
+                "bus": [
+                    "i2c-4",
+                    "i2c-1-mux (chan_id 3)"
+                ],
+                "chip": {
+                    "dps460-i2c-*-58": ["1", "L"],
+                    "dps460-i2c-*-59": ["2", "R"]
+                }  
+            }
+        },
+        "MSN4700": {
+            "default": {
+                "bus": [
+                    "i2c-4",
+                    "i2c-1-mux (chan_id 3)"
+                ],
+                "chip": {
+                    "dps460-i2c-*-58": ["1", "L"],
+                    "dps460-i2c-*-59": ["2", "R"]
+                }
+            },
+            "a1": {
+                "bus": [
+                    "i2c-4",
+                    "i2c-1-mux (chan_id 3)"
+                ],
+                "chip": {
+                    "dps460-i2c-*-58": ["1", "L"],
+                    "dps460-i2c-*-59": ["2", "R"]
+                }                
+            }
+        },
+        "SN2201": {
+            "default": {
+                "bus": [
+                    "i2c-3",
+                    "i2c-1-mux (chan_id 1)"
+                ],
+                "chip": {
+                    "pmbus-i2c-3-58": ["1"],
+                    "pmbus-i2c-4-58": ["2"]
+                }
+            }
+        },
+        "SN5400": {
+            "default": {
+                "bus": [
+
+                ],
+                "chip": {
+                    "dps460-i2c-*-59": ["1", "L"],
+                    "dps460-i2c-*-5a": ["2", "R"]
+                }
+            }
+        },
+        "SN5600": {
+            "default": {
+                "bus": [
+
+                ],
+                "chip": {
+                    "dps460-i2c-*-59": ["1", "L"],
+                    "dps460-i2c-*-5a": ["2", "R"]
+                }
+            }
+        }
+    },
+
+    "psu": {
+        "MTEF-AC-A": {
+            "label": [
+                "in1 PSU 220V Rail (in)",
+                "in2 PSU 12V Rail (out)",
+                "fan1 PSU Fan 1",
+                "temp1 PSU Temp 1",
+                "temp2 PSU Temp 2",
+                "power1 PSU 220V Rail Pwr (in)",
+                "power2 PSU 12V Rail Pwr (out)",
+                "curr1 PSU 220V Rail Curr (in)",
+                "curr2 PSU 12V Rail Curr (out)"
+            ]
+        }, 
+        "MTEF-AC-C": {
+            "label": [
+                "in1 PSU 220V Rail (in)",
+                "in3 PSU 12V Rail (out)",
+                "fan1 PSU Fan 1",
+                "temp1 PSU Temp 1",
+                "temp2 PSU Temp 2",
+                "temp3 PSU Temp 3",
+                "power1 PSU 220V Rail Pwr (in)",
+                "power2 PSU 12V Rail Pwr (out)",
+                "curr1 PSU 220V Rail Curr (in)",
+                "curr2 PSU 12V Rail Curr (out)"
+            ],
+            "ignore": [
+                "in2",
+                "fan2",
+                "fan3"
+            ],
+            "set": [
+                "in3_lcrit in3_crit * 0.662",
+                "in3_min in3_crit * 0.745",
+                "in3_max in3_crit * 0.952"
+            ]
+        },
+        "MTEF-AC-C-SS1": {
+            "label": [
+                "in1 PSU 220V Rail (in)",
+                "in3 PSU 12V Rail (out)",
+                "fan1 PSU Fan 1",
+                "temp1 PSU Temp 1",
+                "temp2 PSU Temp 2",
+                "temp3 PSU Temp 3",
+                "power1 PSU 220V Rail Pwr (in)",
+                "power2 PSU 12V Rail Pwr (out)",
+                "curr1 PSU 220V Rail Curr (in)",
+                "curr2 PSU 12V Rail Curr (out)"
+            ],
+            "ignore": [
+                "in2",
+                "fan2",
+                "fan3"
+            ],
+            "set": [
+                "in3_lcrit in3_crit * 0.662",
+                "in3_min in3_crit * 0.745",
+                "in3_max in3_crit * 0.952"
+            ]
+        },
+        "MTEF-AC-E": {
+            "label": [
+                "in1 PSU 220V Rail (in)",
+                "in3 PSU 12V Rail (out)",
+                "fan1 PSU Fan 1",
+                "temp1 PSU Temp 1",
+                "temp2 PSU Temp 2",
+                "temp3 PSU Temp 3",
+                "power1 PSU 220V Rail Pwr (in)",
+                "power2 PSU 12V Rail Pwr (out)",
+                "curr1 PSU 220V Rail Curr (in)",
+                "curr2 PSU 12V Rail Curr (out)"
+            ]
+        },
+        "MTEF-AC-F": {
+            "label": [
+                "in1 PSU 220V Rail (in)",
+                "in3 PSU 12V Rail (out)",
+                "fan1 PSU Fan 1",
+                "temp1 PSU Temp 1",
+                "temp2 PSU Temp 2",
+                "temp3 PSU Temp 3",
+                "power1 PSU 220V Rail Pwr (in)",
+                "power2 PSU 12V Rail Pwr (out)",
+                "curr1 PSU 220V Rail Curr (in)",
+                "curr2 PSU 12V Rail Curr (out)"                    
+            ],
+            "ignore": [
+                "in2"
+            ]
+        },
+        "MTEF-AC-G-ACBEL": {
+            "label": [
+                "in1 PSU 220V Rail (in)",
+                "in3 PSU 12V Rail (out)",
+                "fan1 PSU Fan 1",
+                "temp1 PSU Temp 1",
+                "temp2 PSU Temp 2",
+                "power1 PSU 220V Rail Pwr (in)",
+                "power2 PSU 12V Rail Pwr (out)",
+                "curr1 PSU 220V Rail Curr (in)",
+                "curr2 PSU 12V Rail Curr (out)"
+            ]
+        },
+        "MTEF-AC-I": {
+
+        },
+        "MTEF-AC-M": {
+            "label": [
+                "in1  PSU 220V Rail(in)",
+                "in2  PSU 12V Rail(out)",
+                "fan1  PSU Fan1",
+                "temp1  PSU Temp1",
+                "temp2  PSU Temp2",
+                "temp3  PSU Temp3",
+                "curr1  PSU 220V Rail Curr(in)",
+                "curr2  PSU 12V Rail Curr(out)",
+                "power1  PSU 220V Rail Pwr(in)",
+                "power2  PSU 12V Rail Pwr(out)"
+            ],
+            "ignore": [
+                "in3", 
+                "curr3",
+                "power3"
+            ]
+        },
+        "930-9SPSU-00RA-00B" :{
+            "label": [
+                "in1 PSU 220V Rail (in)",
+                "in3 PSU 12V Rail (out)",
+                "fan1 PSU Fan 1",
+                "temp1 PSU Temp 1",
+                "temp2 PSU Temp 2",
+                "power1 PSU 220V Rail Pwr (in)",
+                "power2 PSU 12V Rail Pwr (out)",
+                "curr1 PSU 220V Rail Curr (in)",
+                "curr2 PSU 12V Rail Curr (out)"
+            ],
+            "ignore": [
+                "in2"
+            ],
+            "set": [
+                "power2_cap 0"
+            ]
+        }
+    }
+}
diff --git a/device/mellanox/x86_64-mlnx_msn2700-r0/psu_sensors_conf_updater b/device/mellanox/x86_64-mlnx_msn2700-r0/psu_sensors_conf_updater
new file mode 100644
index 000000000..a548d7f98
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn2700-r0/psu_sensors_conf_updater
@@ -0,0 +1,81 @@
+#!/bin/bash
+
+function update_psu_sensors_configuration() {
+    local SENSORS_CONFIG_FILE="/tmp/sensors.conf"
+    local PSU_SENSORS_CONFIG="/usr/share/sonic/platform/psu_sensors.json"
+
+    if [ -f $SENSORS_CONFIG_FILE ]; then
+        rm $SENSORS_CONFIG_FILE
+    fi
+
+    if [ -z "$1" ]; then
+        echo "psu_sensors_conf_updater ERROR: no sensors configuration file had been selected"
+        return
+    else
+        cp $1 $SENSORS_CONFIG_FILE
+    fi
+
+    platform=$(jq -r '.chassis.name' /usr/share/sonic/platform/platform.json)
+    # built-in psu, no need for dynamic configruation
+    if [[ "$platform" == "MSN2100" || "$platform" == "MSN2010" ]]; then return; fi
+    # incase we don't have this platform's info
+    if [[ $(jq -r --arg platform "$platform" '.platform[$platform]' $PSU_SENSORS_CONFIG) == "null" ]]; then return; fi
+
+    local rev=$(cat "$1" | grep "Hardware revision" | awk '{print $NF}')
+    # incase we don't find the revision number
+    if [ ! $rev ]; then return; fi
+    # incase we don't have that revision's data
+    if [[ $(jq -r --arg platform "$platform" --arg rev "$rev" '.platform[$platform][$rev]' $PSU_SENSORS_CONFIG) == "null" ]]; then return; fi
+
+    start_marker_number=$(grep -n "Power supplies" $SENSORS_CONFIG_FILE |  cut -f1 -d:)
+    end_marker_number=$(($(tail -n +$(($start_marker_number + 1)) $SENSORS_CONFIG_FILE | grep -n '^$' | head -n 1 | cut -d: -f1) + $start_marker_number))
+    # In some cases, the PSU sensor section may be at the end of the file,
+    # so using grep alone may not match it. Let's set the end marker
+    # to the total number of lines in the file directly.
+    if [ "$end_marker_number" == "$start_marker_number" ]; then
+        end_marker_number=$(wc -l $SENSORS_CONFIG_FILE | cut -f1 -d' ')
+    fi
+    
+    sed -i "${start_marker_number},${end_marker_number}d" $SENSORS_CONFIG_FILE
+
+    echo "" >> $SENSORS_CONFIG_FILE
+    echo "# Power supplies" >> $SENSORS_CONFIG_FILE
+
+    bus=$(jq -r --arg platform "$platform" --arg rev "$rev" '.platform[$platform][$rev].bus | map("\"" + . + "\"") | join(" ")' $PSU_SENSORS_CONFIG)
+    if [ "$bus" ]; then echo "bus $bus" >> $SENSORS_CONFIG_FILE; fi
+
+    mapfile -t chips < <(jq -r --arg platform "$platform" --arg rev "$rev" '.platform[$platform][$rev].chip | to_entries[] | .key' $PSU_SENSORS_CONFIG )
+
+    for chip in "${chips[@]}"; do
+        number=$(jq -r --arg platform "$platform" --arg rev "$rev" --arg chip "$chip" '.platform[$platform][$rev].chip[$chip] | to_entries | .[0].value' $PSU_SENSORS_CONFIG)
+        side=$(jq -r --arg platform "$platform" --arg rev "$rev" --arg chip "$chip" '.platform[$platform][$rev].chip[$chip] | to_entries | .[1].value' $PSU_SENSORS_CONFIG)
+        psu=$(cat /var/run/hw-management/eeprom/psu${number}_vpd | grep "PN_VPD_FIELD" | cut -d ' ' -f 2 2>&1)
+        if [ ! "$psu" ]; then
+            echo "psu_sensors_conf_updater ERROR: Failed to read from /var/run/hw-management/eeprom/psu${number}_vpd"
+            # keep looking for the rest psus
+            continue
+        else
+            if [ "$psu" == "MTEF-PSF-AC-G" ]; then
+                vendor=$(cat /var/run/hw-management/eeprom/psu${number}_vpd | grep "MFR_NAME:" | cut -d ' ' -f 2 2>&1)
+                psu="${psu}-${vendor}"
+            fi
+            psu=$(echo "$psu" | sed -r 's/-PSR|-PSF//g')
+
+            echo "    chip \""$chip"\"" >> $SENSORS_CONFIG_FILE
+            mapfile -t opers < <(jq -r --arg psu "$psu" '.psu[$psu] | keys[]' $PSU_SENSORS_CONFIG)
+            for oper in "${opers[@]}"; do
+                if [ "$oper" == "label" ]; then
+                    section=$(jq -r --arg psu "$psu" --arg oper "$oper" '.psu[$psu][$oper] | map("        " + $oper + " " + . + "\"") | join("\n")' $PSU_SENSORS_CONFIG)                
+                    if [[ ! "$side" || "$side" == "null" ]]; then
+                        echo "$section" | sed "s/PSU/\"PSU-$number/g"   >> $SENSORS_CONFIG_FILE
+                    else
+                        echo "$section" | sed "s/PSU/\"PSU-$number($side)/g" >> $SENSORS_CONFIG_FILE
+                    fi
+                else
+                    jq -r --arg psu "$psu" --arg oper "$oper" '.psu[$psu][$oper] | map("        " + $oper + " "  + .) | join("\n")' $PSU_SENSORS_CONFIG >> $SENSORS_CONFIG_FILE   
+                fi
+            done
+        fi
+    done
+
+}
diff --git a/device/mellanox/x86_64-mlnx_msn2700-r0/sensors.conf b/device/mellanox/x86_64-mlnx_msn2700-r0/sensors.conf
index 8197e191b..c04f4328d 100644
--- a/device/mellanox/x86_64-mlnx_msn2700-r0/sensors.conf
+++ b/device/mellanox/x86_64-mlnx_msn2700-r0/sensors.conf
@@ -4,6 +4,8 @@
 # Platform specific sensors config for SN2700
 ################################################################################
 
+# Hardware revision default
+
 # Temperature sensors
 bus "i2c-2" "i2c-1-mux (chan_id 2)"
     chip "mlxsw-i2c-*-48"
diff --git a/device/mellanox/x86_64-mlnx_msn2700a1-r0/psu_sensors.json b/device/mellanox/x86_64-mlnx_msn2700a1-r0/psu_sensors.json
new file mode 120000
index 000000000..581669431
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn2700a1-r0/psu_sensors.json
@@ -0,0 +1 @@
+../x86_64-mlnx_msn2700-r0/psu_sensors.json
\ No newline at end of file
diff --git a/device/mellanox/x86_64-mlnx_msn2700a1-r0/psu_sensors_conf_updater b/device/mellanox/x86_64-mlnx_msn2700a1-r0/psu_sensors_conf_updater
new file mode 120000
index 000000000..b9686d838
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn2700a1-r0/psu_sensors_conf_updater
@@ -0,0 +1 @@
+../x86_64-mlnx_msn2700-r0/psu_sensors_conf_updater
\ No newline at end of file
diff --git a/device/mellanox/x86_64-mlnx_msn2700a1-r0/sensors.conf b/device/mellanox/x86_64-mlnx_msn2700a1-r0/sensors.conf
index e8f5e1568..495627c1b 100644
--- a/device/mellanox/x86_64-mlnx_msn2700a1-r0/sensors.conf
+++ b/device/mellanox/x86_64-mlnx_msn2700a1-r0/sensors.conf
@@ -15,6 +15,8 @@
 # limitations under the License.
 #
 
+# Hardware revision default
+
 # Bus names
 bus "i2c-17" "i2c-1-mux (chan_id 8)"
 
diff --git a/device/mellanox/x86_64-mlnx_msn2740-r0/psu_sensors.json b/device/mellanox/x86_64-mlnx_msn2740-r0/psu_sensors.json
new file mode 120000
index 000000000..581669431
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn2740-r0/psu_sensors.json
@@ -0,0 +1 @@
+../x86_64-mlnx_msn2700-r0/psu_sensors.json
\ No newline at end of file
diff --git a/device/mellanox/x86_64-mlnx_msn2740-r0/psu_sensors_conf_updater b/device/mellanox/x86_64-mlnx_msn2740-r0/psu_sensors_conf_updater
new file mode 120000
index 000000000..b9686d838
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn2740-r0/psu_sensors_conf_updater
@@ -0,0 +1 @@
+../x86_64-mlnx_msn2700-r0/psu_sensors_conf_updater
\ No newline at end of file
diff --git a/device/mellanox/x86_64-mlnx_msn2740-r0/sensors.conf b/device/mellanox/x86_64-mlnx_msn2740-r0/sensors.conf
index 2e60f6b45..80382cb83 100644
--- a/device/mellanox/x86_64-mlnx_msn2740-r0/sensors.conf
+++ b/device/mellanox/x86_64-mlnx_msn2740-r0/sensors.conf
@@ -4,6 +4,8 @@
 # Platform specific sensors config for SN2740
 ################################################################################
 
+# Hardware revision default
+
 # Temperature sensors
 bus "i2c-2" "i2c-1-mux (chan_id 1)"
     chip "mlxsw-i2c-*-48"
diff --git a/device/mellanox/x86_64-mlnx_msn3420-r0/psu_sensors.json b/device/mellanox/x86_64-mlnx_msn3420-r0/psu_sensors.json
new file mode 120000
index 000000000..581669431
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn3420-r0/psu_sensors.json
@@ -0,0 +1 @@
+../x86_64-mlnx_msn2700-r0/psu_sensors.json
\ No newline at end of file
diff --git a/device/mellanox/x86_64-mlnx_msn3420-r0/psu_sensors_conf_updater b/device/mellanox/x86_64-mlnx_msn3420-r0/psu_sensors_conf_updater
new file mode 120000
index 000000000..b9686d838
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn3420-r0/psu_sensors_conf_updater
@@ -0,0 +1 @@
+../x86_64-mlnx_msn2700-r0/psu_sensors_conf_updater
\ No newline at end of file
diff --git a/device/mellanox/x86_64-mlnx_msn3420-r0/sensors.conf b/device/mellanox/x86_64-mlnx_msn3420-r0/sensors.conf
index 83a5c7ce4..6880f21b1 100644
--- a/device/mellanox/x86_64-mlnx_msn3420-r0/sensors.conf
+++ b/device/mellanox/x86_64-mlnx_msn3420-r0/sensors.conf
@@ -4,6 +4,8 @@
 # Platform specific sensors config for SN3420
 ################################################################################
 
+# Hardware revision default
+
 # Temperature sensors
 bus "i2c-2" "i2c-1-mux (chan_id 1)"
     chip "mlxsw-i2c-*-48"
diff --git a/device/mellanox/x86_64-mlnx_msn3700-r0/psu_sensors.json b/device/mellanox/x86_64-mlnx_msn3700-r0/psu_sensors.json
new file mode 120000
index 000000000..581669431
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn3700-r0/psu_sensors.json
@@ -0,0 +1 @@
+../x86_64-mlnx_msn2700-r0/psu_sensors.json
\ No newline at end of file
diff --git a/device/mellanox/x86_64-mlnx_msn3700-r0/psu_sensors_conf_updater b/device/mellanox/x86_64-mlnx_msn3700-r0/psu_sensors_conf_updater
new file mode 120000
index 000000000..b9686d838
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn3700-r0/psu_sensors_conf_updater
@@ -0,0 +1 @@
+../x86_64-mlnx_msn2700-r0/psu_sensors_conf_updater
\ No newline at end of file
diff --git a/device/mellanox/x86_64-mlnx_msn3700-r0/sensors.conf b/device/mellanox/x86_64-mlnx_msn3700-r0/sensors.conf
index 37446268a..e0a847aa3 100644
--- a/device/mellanox/x86_64-mlnx_msn3700-r0/sensors.conf
+++ b/device/mellanox/x86_64-mlnx_msn3700-r0/sensors.conf
@@ -4,6 +4,8 @@
 # Platform specific sensors config for SN3700
 ################################################################################
 
+# Hardware revision default
+
 # Temperature sensors
 bus "i2c-2" "i2c-1-mux (chan_id 1)"
     chip "mlxsw-i2c-*-48"
diff --git a/device/mellanox/x86_64-mlnx_msn3700-r0/sensors_respin.conf b/device/mellanox/x86_64-mlnx_msn3700-r0/sensors_respin.conf
index db5cd3009..81e22d59c 100644
--- a/device/mellanox/x86_64-mlnx_msn3700-r0/sensors_respin.conf
+++ b/device/mellanox/x86_64-mlnx_msn3700-r0/sensors_respin.conf
@@ -15,6 +15,8 @@
 ## limitations under the License.
 ##
 
+# Hardware revision respin
+
 # Temperature sensors
 bus "i2c-2" "i2c-1-mux (chan_id 1)"
     chip "mlxsw-i2c-*-48"
diff --git a/device/mellanox/x86_64-mlnx_msn3700-r0/sensors_swb_respin.conf b/device/mellanox/x86_64-mlnx_msn3700-r0/sensors_swb_respin.conf
index 8c546c107..f5cf3d5df 100644
--- a/device/mellanox/x86_64-mlnx_msn3700-r0/sensors_swb_respin.conf
+++ b/device/mellanox/x86_64-mlnx_msn3700-r0/sensors_swb_respin.conf
@@ -15,6 +15,8 @@
 ## limitations under the License.
 ##
 
+# Hardware revision swb_respin
+
 # Temperature sensors
 bus "i2c-2" "i2c-1-mux (chan_id 1)"
     chip "mlxsw-i2c-*-48"
diff --git a/device/mellanox/x86_64-mlnx_msn3700c-r0/psu_sensors.json b/device/mellanox/x86_64-mlnx_msn3700c-r0/psu_sensors.json
new file mode 120000
index 000000000..581669431
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn3700c-r0/psu_sensors.json
@@ -0,0 +1 @@
+../x86_64-mlnx_msn2700-r0/psu_sensors.json
\ No newline at end of file
diff --git a/device/mellanox/x86_64-mlnx_msn3700c-r0/psu_sensors_conf_updater b/device/mellanox/x86_64-mlnx_msn3700c-r0/psu_sensors_conf_updater
new file mode 120000
index 000000000..b9686d838
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn3700c-r0/psu_sensors_conf_updater
@@ -0,0 +1 @@
+../x86_64-mlnx_msn2700-r0/psu_sensors_conf_updater
\ No newline at end of file
diff --git a/device/mellanox/x86_64-mlnx_msn3700c-r0/sensors.conf b/device/mellanox/x86_64-mlnx_msn3700c-r0/sensors.conf
index ed6cebd1d..b5105b871 100644
--- a/device/mellanox/x86_64-mlnx_msn3700c-r0/sensors.conf
+++ b/device/mellanox/x86_64-mlnx_msn3700c-r0/sensors.conf
@@ -4,6 +4,8 @@
 # Platform specific sensors config for SN3700C
 ################################################################################
 
+# Hardware revision default
+
 # Temperature sensors
 bus "i2c-2" "i2c-1-mux (chan_id 1)"
     chip "mlxsw-i2c-*-48"
diff --git a/device/mellanox/x86_64-mlnx_msn3700c-r0/sensors_respin.conf b/device/mellanox/x86_64-mlnx_msn3700c-r0/sensors_respin.conf
index fdc7bac39..228c87fc1 100644
--- a/device/mellanox/x86_64-mlnx_msn3700c-r0/sensors_respin.conf
+++ b/device/mellanox/x86_64-mlnx_msn3700c-r0/sensors_respin.conf
@@ -15,6 +15,8 @@
 ## limitations under the License.
 ##
 
+# Hardware revision respin
+
 # Temperature sensors
 bus "i2c-2" "i2c-1-mux (chan_id 1)"
     chip "mlxsw-i2c-*-48"
diff --git a/device/mellanox/x86_64-mlnx_msn3700c-r0/sensors_swb_respin.conf b/device/mellanox/x86_64-mlnx_msn3700c-r0/sensors_swb_respin.conf
index 2b0394f80..ecc6ba13c 100644
--- a/device/mellanox/x86_64-mlnx_msn3700c-r0/sensors_swb_respin.conf
+++ b/device/mellanox/x86_64-mlnx_msn3700c-r0/sensors_swb_respin.conf
@@ -15,6 +15,8 @@
 ## limitations under the License.
 ##
 
+# Hardware revision swb_respin
+
 # Temperature sensors
 bus "i2c-2" "i2c-1-mux (chan_id 1)"
     chip "mlxsw-i2c-*-48"
diff --git a/device/mellanox/x86_64-mlnx_msn3800-r0/psu_sensors.json b/device/mellanox/x86_64-mlnx_msn3800-r0/psu_sensors.json
new file mode 120000
index 000000000..581669431
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn3800-r0/psu_sensors.json
@@ -0,0 +1 @@
+../x86_64-mlnx_msn2700-r0/psu_sensors.json
\ No newline at end of file
diff --git a/device/mellanox/x86_64-mlnx_msn3800-r0/psu_sensors_conf_updater b/device/mellanox/x86_64-mlnx_msn3800-r0/psu_sensors_conf_updater
new file mode 120000
index 000000000..b9686d838
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn3800-r0/psu_sensors_conf_updater
@@ -0,0 +1 @@
+../x86_64-mlnx_msn2700-r0/psu_sensors_conf_updater
\ No newline at end of file
diff --git a/device/mellanox/x86_64-mlnx_msn3800-r0/sensors.conf b/device/mellanox/x86_64-mlnx_msn3800-r0/sensors.conf
index 5400269b3..b40375a24 100644
--- a/device/mellanox/x86_64-mlnx_msn3800-r0/sensors.conf
+++ b/device/mellanox/x86_64-mlnx_msn3800-r0/sensors.conf
@@ -4,6 +4,8 @@
 # Platform specific sensors config for SN3800
 ################################################################################
 
+# Hardware revision default
+
 # Temperature sensors
 bus "i2c-2" "i2c-1-mux (chan_id 1)"
     chip "mlxsw-i2c-*-48"
diff --git a/device/mellanox/x86_64-mlnx_msn4410-r0/psu_sensors.json b/device/mellanox/x86_64-mlnx_msn4410-r0/psu_sensors.json
new file mode 120000
index 000000000..581669431
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn4410-r0/psu_sensors.json
@@ -0,0 +1 @@
+../x86_64-mlnx_msn2700-r0/psu_sensors.json
\ No newline at end of file
diff --git a/device/mellanox/x86_64-mlnx_msn4410-r0/psu_sensors_conf_updater b/device/mellanox/x86_64-mlnx_msn4410-r0/psu_sensors_conf_updater
new file mode 120000
index 000000000..b9686d838
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn4410-r0/psu_sensors_conf_updater
@@ -0,0 +1 @@
+../x86_64-mlnx_msn2700-r0/psu_sensors_conf_updater
\ No newline at end of file
diff --git a/device/mellanox/x86_64-mlnx_msn4600-r0/psu_sensors.json b/device/mellanox/x86_64-mlnx_msn4600-r0/psu_sensors.json
new file mode 120000
index 000000000..581669431
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn4600-r0/psu_sensors.json
@@ -0,0 +1 @@
+../x86_64-mlnx_msn2700-r0/psu_sensors.json
\ No newline at end of file
diff --git a/device/mellanox/x86_64-mlnx_msn4600-r0/psu_sensors_conf_updater b/device/mellanox/x86_64-mlnx_msn4600-r0/psu_sensors_conf_updater
new file mode 120000
index 000000000..b9686d838
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn4600-r0/psu_sensors_conf_updater
@@ -0,0 +1 @@
+../x86_64-mlnx_msn2700-r0/psu_sensors_conf_updater
\ No newline at end of file
diff --git a/device/mellanox/x86_64-mlnx_msn4600-r0/sensors.conf b/device/mellanox/x86_64-mlnx_msn4600-r0/sensors.conf
index 4c374a839..a5b03ba37 100644
--- a/device/mellanox/x86_64-mlnx_msn4600-r0/sensors.conf
+++ b/device/mellanox/x86_64-mlnx_msn4600-r0/sensors.conf
@@ -4,6 +4,8 @@
 # Platform specific sensors config for SN4600
 ################################################################################
 
+# Hardware revision default
+
 # Temperature sensors
 bus "i2c-2" "i2c-1-mux (chan_id 1)"
     chip "mlxsw-i2c-*-48"
diff --git a/device/mellanox/x86_64-mlnx_msn4600c-r0/psu_sensors.json b/device/mellanox/x86_64-mlnx_msn4600c-r0/psu_sensors.json
new file mode 120000
index 000000000..581669431
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn4600c-r0/psu_sensors.json
@@ -0,0 +1 @@
+../x86_64-mlnx_msn2700-r0/psu_sensors.json
\ No newline at end of file
diff --git a/device/mellanox/x86_64-mlnx_msn4600c-r0/psu_sensors_conf_updater b/device/mellanox/x86_64-mlnx_msn4600c-r0/psu_sensors_conf_updater
new file mode 120000
index 000000000..b9686d838
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn4600c-r0/psu_sensors_conf_updater
@@ -0,0 +1 @@
+../x86_64-mlnx_msn2700-r0/psu_sensors_conf_updater
\ No newline at end of file
diff --git a/device/mellanox/x86_64-mlnx_msn4600c-r0/sensors.conf b/device/mellanox/x86_64-mlnx_msn4600c-r0/sensors.conf
index 4f60ceb02..add442165 100644
--- a/device/mellanox/x86_64-mlnx_msn4600c-r0/sensors.conf
+++ b/device/mellanox/x86_64-mlnx_msn4600c-r0/sensors.conf
@@ -4,6 +4,8 @@
 # Platform specific sensors config for SN4600C
 ################################################################################
 
+# Hardware revision default
+
 # Temperature sensors
 bus "i2c-2" "i2c-1-mux (chan_id 1)"
     chip "mlxsw-i2c-*-48"
diff --git a/device/mellanox/x86_64-mlnx_msn4600c-r0/sensors.conf.a1 b/device/mellanox/x86_64-mlnx_msn4600c-r0/sensors.conf.a1
index 4200febc3..12f758a43 100644
--- a/device/mellanox/x86_64-mlnx_msn4600c-r0/sensors.conf.a1
+++ b/device/mellanox/x86_64-mlnx_msn4600c-r0/sensors.conf.a1
@@ -15,6 +15,8 @@
 ## limitations under the License.
 ##
 
+# Hardware revision a1
+
 
 # Temperature sensors
 bus "i2c-2" "i2c-1-mux (chan_id 1)"
diff --git a/device/mellanox/x86_64-mlnx_msn4600c-r0/sensors_respin.conf b/device/mellanox/x86_64-mlnx_msn4600c-r0/sensors_respin.conf
index 0e346b31e..b23cfc74b 100644
--- a/device/mellanox/x86_64-mlnx_msn4600c-r0/sensors_respin.conf
+++ b/device/mellanox/x86_64-mlnx_msn4600c-r0/sensors_respin.conf
@@ -15,6 +15,8 @@
 ## limitations under the License.
 ##
 
+# Hardware revision respin
+
 # Temperature sensors
 bus "i2c-2" "i2c-1-mux (chan_id 1)"
     chip "mlxsw-i2c-*-48"
diff --git a/device/mellanox/x86_64-mlnx_msn4600c-r0/sensors_respin.conf.a1 b/device/mellanox/x86_64-mlnx_msn4600c-r0/sensors_respin.conf.a1
index a959a7a2c..772cd455d 100644
--- a/device/mellanox/x86_64-mlnx_msn4600c-r0/sensors_respin.conf.a1
+++ b/device/mellanox/x86_64-mlnx_msn4600c-r0/sensors_respin.conf.a1
@@ -15,6 +15,8 @@
 ## limitations under the License.
 ##
 
+# Hardware revision respin_a1
+
 # Temperature sensors
 bus "i2c-2" "i2c-1-mux (chan_id 1)"
     chip "mlxsw-i2c-*-48"
diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/psu_sensors.json b/device/mellanox/x86_64-mlnx_msn4700-r0/psu_sensors.json
new file mode 120000
index 000000000..581669431
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn4700-r0/psu_sensors.json
@@ -0,0 +1 @@
+../x86_64-mlnx_msn2700-r0/psu_sensors.json
\ No newline at end of file
diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/psu_sensors_conf_updater b/device/mellanox/x86_64-mlnx_msn4700-r0/psu_sensors_conf_updater
new file mode 120000
index 000000000..b9686d838
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn4700-r0/psu_sensors_conf_updater
@@ -0,0 +1 @@
+../x86_64-mlnx_msn2700-r0/psu_sensors_conf_updater
\ No newline at end of file
diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/sensors.conf b/device/mellanox/x86_64-mlnx_msn4700-r0/sensors.conf
index e4c6724b6..280118e43 100644
--- a/device/mellanox/x86_64-mlnx_msn4700-r0/sensors.conf
+++ b/device/mellanox/x86_64-mlnx_msn4700-r0/sensors.conf
@@ -4,6 +4,8 @@
 # Platform specific sensors config for SN4700
 ################################################################################
 
+# Hardware revision default
+
 # Temperature sensors
 bus "i2c-2" "i2c-1-mux (chan_id 1)"
     chip "mlxsw-i2c-*-48"
diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/sensors.conf.a1 b/device/mellanox/x86_64-mlnx_msn4700-r0/sensors.conf.a1
index d609b4321..e85dca5ae 100644
--- a/device/mellanox/x86_64-mlnx_msn4700-r0/sensors.conf.a1
+++ b/device/mellanox/x86_64-mlnx_msn4700-r0/sensors.conf.a1
@@ -5,6 +5,8 @@
 # Platform specific sensors config for SN4700 A0/A1
 ################################################################################
 
+# Hardware revision a1
+
 # Temperature sensors
 bus "i2c-2" "i2c-1-mux (chan_id 1)"
     chip "mlxsw-i2c-*-48"
diff --git a/device/mellanox/x86_64-nvidia_sn2201-r0/psu_sensors.json b/device/mellanox/x86_64-nvidia_sn2201-r0/psu_sensors.json
new file mode 120000
index 000000000..581669431
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn2201-r0/psu_sensors.json
@@ -0,0 +1 @@
+../x86_64-mlnx_msn2700-r0/psu_sensors.json
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn2201-r0/psu_sensors_conf_updater b/device/mellanox/x86_64-nvidia_sn2201-r0/psu_sensors_conf_updater
new file mode 120000
index 000000000..b9686d838
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn2201-r0/psu_sensors_conf_updater
@@ -0,0 +1 @@
+../x86_64-mlnx_msn2700-r0/psu_sensors_conf_updater
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn2201-r0/sensors.conf b/device/mellanox/x86_64-nvidia_sn2201-r0/sensors.conf
index 5024abd70..19624b1c9 100644
--- a/device/mellanox/x86_64-nvidia_sn2201-r0/sensors.conf
+++ b/device/mellanox/x86_64-nvidia_sn2201-r0/sensors.conf
@@ -4,6 +4,8 @@
 # Platform specific sensors config for SN2201
 ################################################################################
 
+# Hardware revision default
+
 # Fan Controller emc2305.
 bus "i2c-7" "i2c-1-mux (chan_id 5)"
     chip "emc2305-i2c-7-4d"
diff --git a/device/mellanox/x86_64-nvidia_sn4800-r0/psu_sensors.json b/device/mellanox/x86_64-nvidia_sn4800-r0/psu_sensors.json
new file mode 120000
index 000000000..581669431
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4800-r0/psu_sensors.json
@@ -0,0 +1 @@
+../x86_64-mlnx_msn2700-r0/psu_sensors.json
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn4800-r0/psu_sensors_conf_updater b/device/mellanox/x86_64-nvidia_sn4800-r0/psu_sensors_conf_updater
new file mode 120000
index 000000000..b9686d838
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4800-r0/psu_sensors_conf_updater
@@ -0,0 +1 @@
+../x86_64-mlnx_msn2700-r0/psu_sensors_conf_updater
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn4800-r0/sensors.conf b/device/mellanox/x86_64-nvidia_sn4800-r0/sensors.conf
index 3cf718641..669fbec4a 100644
--- a/device/mellanox/x86_64-nvidia_sn4800-r0/sensors.conf
+++ b/device/mellanox/x86_64-nvidia_sn4800-r0/sensors.conf
@@ -4,6 +4,8 @@
 # Platform specific sensors config for SN4800
 ################################################################################
 
+# Hardware revision default
+
 # Line card power manager devices (bus is variable)
 bus "i2c-59" "i2c-34-mux (chan_id 4)"
     chip "mp2975-i2c-59-62"
diff --git a/device/mellanox/x86_64-nvidia_sn5400-r0/psu_sensors.json b/device/mellanox/x86_64-nvidia_sn5400-r0/psu_sensors.json
new file mode 120000
index 000000000..581669431
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5400-r0/psu_sensors.json
@@ -0,0 +1 @@
+../x86_64-mlnx_msn2700-r0/psu_sensors.json
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn5400-r0/psu_sensors_conf_updater b/device/mellanox/x86_64-nvidia_sn5400-r0/psu_sensors_conf_updater
new file mode 120000
index 000000000..b9686d838
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5400-r0/psu_sensors_conf_updater
@@ -0,0 +1 @@
+../x86_64-mlnx_msn2700-r0/psu_sensors_conf_updater
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn5400-r0/sensors.conf b/device/mellanox/x86_64-nvidia_sn5400-r0/sensors.conf
index e858a0311..0b2b7c9c7 100644
--- a/device/mellanox/x86_64-nvidia_sn5400-r0/sensors.conf
+++ b/device/mellanox/x86_64-nvidia_sn5400-r0/sensors.conf
@@ -15,6 +15,8 @@
 ## limitations under the License.
 ##
 
+# Hardware revision default
+
 # Bus names
 bus "i2c-39" "i2c-1-mux (chan_id 6)"
 
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/psu_sensors.json b/device/mellanox/x86_64-nvidia_sn5600-r0/psu_sensors.json
new file mode 120000
index 000000000..581669431
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/psu_sensors.json
@@ -0,0 +1 @@
+../x86_64-mlnx_msn2700-r0/psu_sensors.json
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/psu_sensors_conf_updater b/device/mellanox/x86_64-nvidia_sn5600-r0/psu_sensors_conf_updater
new file mode 120000
index 000000000..b9686d838
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/psu_sensors_conf_updater
@@ -0,0 +1 @@
+../x86_64-mlnx_msn2700-r0/psu_sensors_conf_updater
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/sensors.conf b/device/mellanox/x86_64-nvidia_sn5600-r0/sensors.conf
index e64aabae6..fdd642edc 100644
--- a/device/mellanox/x86_64-nvidia_sn5600-r0/sensors.conf
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/sensors.conf
@@ -4,6 +4,8 @@
 # Platform specific sensors config for SN5600
 ##################################################################################
 
+# Hardware revision default
+
 # Bus names
 bus "i2c-39" "i2c-1-mux (chan_id 6)"
 
diff --git a/dockers/docker-platform-monitor/docker_init.j2 b/dockers/docker-platform-monitor/docker_init.j2
index 765f7c863..ebef713e2 100755
--- a/dockers/docker-platform-monitor/docker_init.j2
+++ b/dockers/docker-platform-monitor/docker_init.j2
@@ -98,6 +98,14 @@ fi
 if [ -e $SENSORS_CONF_FILE ]; then
     HAVE_SENSORS_CONF=1
     mkdir -p /etc/sensors.d
+    PSU_SENSORS_CONF_UPDATER="/usr/share/sonic/platform/psu_sensors_conf_updater"
+    if [ -e $PSU_SENSORS_CONF_UPDATER ]; then
+        source $PSU_SENSORS_CONF_UPDATER 
+        update_psu_sensors_configuration $SENSORS_CONF_FILE
+        if [ -f /tmp/sensors.conf ]; then
+            SENSORS_CONF_FILE="/tmp/sensors.conf"
+        fi
+    fi
     /bin/cp -f $SENSORS_CONF_FILE /etc/sensors.d/sensors.conf
 fi
 
diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/psu.py b/platform/mellanox/mlnx-platform-api/sonic_platform/psu.py
index 977ac5f86..92b434839 100644
--- a/platform/mellanox/mlnx-platform-api/sonic_platform/psu.py
+++ b/platform/mellanox/mlnx-platform-api/sonic_platform/psu.py
@@ -46,6 +46,7 @@ def __init__(self, psu_index):
         super(FixedPsu, self).__init__()
         self.index = psu_index + 1
         self._name = "PSU {}".format(self.index)
+        self.model = 'N/A'
         self.psu_oper_status = os.path.join(PSU_PATH, "thermal/psu{}_pwr_status".format(self.index))
         self._led = None
 
@@ -256,6 +257,9 @@ def __init__(self, psu_index):
         from .thermal import initialize_psu_thermal
         self._thermal_list = initialize_psu_thermal(psu_index, self.get_power_available_status)
 
+        # initialize psu model
+        self.model = self.vpd_parser.get_model()
+
     @property
     def psu_voltage(self):
         if not self._psu_voltage:
@@ -304,7 +308,14 @@ def get_model(self):
         Returns:
             string: Model/part number of device
         """
-        return self.vpd_parser.get_model()
+        current_model = self.vpd_parser.get_model()
+        if current_model != self.model and os.path.exists('/usr/share/sonic/platform/psu_sensors_conf_updater'):
+            utils.run_command(['cp', '-f', '/etc/sensors.d/sensors.conf', '/tmp/sensors.conf.orig'])
+            utils.run_command(['bash', '-c','source /usr/share/sonic/platform/psu_sensors_conf_updater && update_psu_sensors_configuration /tmp/sensors.conf.orig'])
+            utils.run_command(['cp', '-f', '/tmp/sensors.conf', '/etc/sensors.d/'])
+            utils.run_command(['service', 'sensord', 'restart'])
+        self.model = current_model
+        return current_model
 
     def get_serial(self):
         """

From 34a1143204d41754067057c6fa172de14438fada Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Tue, 11 Jun 2024 19:02:25 +0800
Subject: [PATCH 0740/1115] [submodule] Update submodule sonic-utilities to the
 latest HEAD automatically (#19274)

#### Why I did it
src/sonic-utilities
```
* c2370f88 - (HEAD -> master, origin/master, origin/HEAD) [DPB]Fixing return code of breakout command on failure (#3357) (8 hours ago) [Sudharsan Dhamal Gopalarathnam]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-utilities | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-utilities b/src/sonic-utilities
index f96a13227..c2370f88d 160000
--- a/src/sonic-utilities
+++ b/src/sonic-utilities
@@ -1 +1 @@
-Subproject commit f96a132278fdc3545c3f6a609dc5a21149c49240
+Subproject commit c2370f88d896abbe9dc7b48acf66ebd2477ecdaa

From 438df3877bfc275176d7144f53ed22a997bd56be Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Tue, 11 Jun 2024 19:02:30 +0800
Subject: [PATCH 0741/1115] [submodule] Update submodule sonic-swss to the
 latest HEAD automatically (#19273)
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

#### Why I did it
src/sonic-swss
```
* 70eb7663 - (HEAD -> master, origin/master, origin/HEAD) ADD VOQ COUNTERS(SAI_SWITCH_STAT_PACKET_INTEGRITY_DROP, SAI_QUEUE_ST…T_CREDIT_WD_DELETED_PACKETS) support for VOQ/Fabric switches (#3152) (10 hours ago) [saksarav-nokia]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-swss | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-swss b/src/sonic-swss
index f497c4a0d..70eb76632 160000
--- a/src/sonic-swss
+++ b/src/sonic-swss
@@ -1 +1 @@
-Subproject commit f497c4a0da2ac040e36dcf72433d5b20a93639fe
+Subproject commit 70eb7663280c7b37a969d6305aa4a24e17e32fa3

From 0b9ff357b9506b643edb78e52ab23a31c1f0fb0c Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Tue, 11 Jun 2024 19:02:37 +0800
Subject: [PATCH 0742/1115] [submodule] Update submodule sonic-platform-daemons
 to the latest HEAD automatically (#19271)

#### Why I did it
src/sonic-platform-daemons
```
* efb4dbd - (HEAD -> master, origin/master, origin/HEAD) [CMIS] Skip re-init flow for SW-controlled ports in case of fastboot (#497) (11 hours ago) [Stepan Blyshchak]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-platform-daemons | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-platform-daemons b/src/sonic-platform-daemons
index 76cf1dc9f..efb4dbd31 160000
--- a/src/sonic-platform-daemons
+++ b/src/sonic-platform-daemons
@@ -1 +1 @@
-Subproject commit 76cf1dc9fd8fb609dbf071be7028c09b61c83815
+Subproject commit efb4dbd31006f7f0d44069b215c361ef0e1c2bc3

From 2a2f3bdcddcf4b0261f3f2b21ae495e12fb1ffea Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Tue, 11 Jun 2024 19:02:42 +0800
Subject: [PATCH 0743/1115] [submodule] Update submodule sonic-linux-kernel to
 the latest HEAD automatically (#19270)

#### Why I did it
src/sonic-linux-kernel
```
* 1f101c1 - (HEAD -> master, origin/master, origin/HEAD) Remove compiled artifact download and rename base url (#400) (83 minutes ago) [Vivek]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-linux-kernel | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-linux-kernel b/src/sonic-linux-kernel
index 93b8fe9a9..1f101c13d 160000
--- a/src/sonic-linux-kernel
+++ b/src/sonic-linux-kernel
@@ -1 +1 @@
-Subproject commit 93b8fe9a9f657eae2438c94b9625d2ae34274eb1
+Subproject commit 1f101c13d3ccd692638f0aa253b0097f38783a6d

From 9bc9bb37271ab585712de9c27085cb2b571b0a03 Mon Sep 17 00:00:00 2001
From: Liu Shilong <shilongliu@microsoft.com>
Date: Wed, 12 Jun 2024 18:51:43 +0800
Subject: [PATCH 0744/1115] [build] Fix restapi debian package false dependency
 (#19246)

Why I did it
Fix build error when enable restapi and debug.
the derived package function is not called correctly.

Work item tracking
Microsoft ADO (number only): 28376451
How I did it
How to verify it
---
 rules/restapi.mk | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/rules/restapi.mk b/rules/restapi.mk
index b603ecd7a..2962cf604 100644
--- a/rules/restapi.mk
+++ b/rules/restapi.mk
@@ -10,4 +10,4 @@ $(RESTAPI)_RDEPENDS += $(LIBNL3) $(LIBNL_GENL3) \
 SONIC_DPKG_DEBS += $(RESTAPI)
 
 RESTAPI_DBG = sonic-rest-api-dbgsym_1.0.1_$(CONFIGURED_ARCH).deb
-$(eval $(call add_derived_package,$(RESTAPI_DBG),$(RESTAPI_DBG)))
+$(eval $(call add_derived_package,$(RESTAPI),$(RESTAPI_DBG)))

From de2306850d7977d4dbd7ca3f975150d196503837 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Thu, 13 Jun 2024 01:01:14 +0800
Subject: [PATCH 0745/1115] [submodule] Update submodule sonic-swss-common to
 the latest HEAD automatically (#19283)

#### Why I did it
src/sonic-swss-common
```
* e37bfea - (HEAD -> master, origin/master, origin/HEAD) Don't use unix socket on for redis_chassis.server (#873) (3 hours ago) [arista-nwolfe]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-swss-common | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-swss-common b/src/sonic-swss-common
index 391e27bd6..e37bfea64 160000
--- a/src/sonic-swss-common
+++ b/src/sonic-swss-common
@@ -1 +1 @@
-Subproject commit 391e27bd6769fa64d483c2c67a1079c174f4975f
+Subproject commit e37bfea64fb9e1f40f7c9b6ad759e92f5f15bec9

From 39b711c3805c0fa3c607ad5a079e77694bdfdbfb Mon Sep 17 00:00:00 2001
From: Vivek Verma <137406113+vivekverma-arista@users.noreply.github.com>
Date: Thu, 13 Jun 2024 11:56:14 +0530
Subject: [PATCH 0746/1115] Update sonic-mux-linkmgr yang model (#19275)

Why I did it
A new flag was introduced in sonic-net/sonic-linkmgrd#250 to disable mux oscillations but yang model wasn't updated. We are seeing multiple tests failing due to this, some of them are -

generic_config_updater/test_dynamic_acl.py
passw_hardening/test_passw_hardening.py
dualtor_mgmt/test_toggle_mux.py
---
 .../tests/files/sample_config_db.json          |  3 +++
 .../yang_model_tests/tests/mux-linkmgr.json    |  5 ++++-
 .../tests_config/mux-linkmgr.json              | 12 +++++++++++-
 .../yang-models/sonic-mux-linkmgr.yang         | 18 +++++++++++++++++-
 4 files changed, 35 insertions(+), 3 deletions(-)

diff --git a/src/sonic-yang-models/tests/files/sample_config_db.json b/src/sonic-yang-models/tests/files/sample_config_db.json
index ed1f75c65..8ebb1d655 100644
--- a/src/sonic-yang-models/tests/files/sample_config_db.json
+++ b/src/sonic-yang-models/tests/files/sample_config_db.json
@@ -2335,6 +2335,9 @@
                 "src_mac": "ToRMac",
                 "interval_pck_loss_count_update": "3"
             },
+            "TIMED_OSCILLATION": {
+                "oscillation_enabled": "false"
+            },
             "MUXLOGGER": {
                 "log_verbosity": "debug"
             },
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/mux-linkmgr.json b/src/sonic-yang-models/tests/yang_model_tests/tests/mux-linkmgr.json
index 7c4aeadff..050728cb9 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests/mux-linkmgr.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests/mux-linkmgr.json
@@ -5,10 +5,13 @@
     "MUX_LINKMGR_LINK_PROBER_CHANGE_MAC_ADDR": {
         "desc": "Use well-known mac and vlan mac as dst/src in linkmgrd link prober. "
     },
+    "MUX_LINKMGR_TIMED_OSCILLATION_DISABLE_OSCILLATION": {
+        "desc": "Disable timed oscillation."
+    },
     "MUX_LINKMGR_MUXLOGGER_CHANGE_VERBOSITY_LEVEL": {
         "desc": "Consume verbosity level config changes. "
     },
     "MUX_LINKMGR_SERVICE_MGMT_KILL_RADV_DISABLED": {
         "desc": "Disable feature to kill radv."
     }
-}
\ No newline at end of file
+}
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/mux-linkmgr.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/mux-linkmgr.json
index 1feff4f44..8a9f9e01c 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/mux-linkmgr.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/mux-linkmgr.json
@@ -23,6 +23,16 @@
             }
         }
     },
+    "MUX_LINKMGR_TIMED_OSCILLATION_DISABLE_OSCILLATION": {
+        "sonic-mux-linkmgr:sonic-mux-linkmgr": {
+            "sonic-mux-linkmgr:MUX_LINKMGR": {
+                "sonic-mux-linkmgr:TIMED_OSCILLATION":
+                    {
+                        "oscillation_enabled": "false"
+                    }
+            }
+        }
+    },
     "MUX_LINKMGR_MUXLOGGER_CHANGE_VERBOSITY_LEVEL": {
         "sonic-mux-linkmgr:sonic-mux-linkmgr": {
             "sonic-mux-linkmgr:MUX_LINKMGR": {
@@ -43,4 +53,4 @@
             }
         }
     }
-}
\ No newline at end of file
+}
diff --git a/src/sonic-yang-models/yang-models/sonic-mux-linkmgr.yang b/src/sonic-yang-models/yang-models/sonic-mux-linkmgr.yang
index d7b07ed73..001ec4298 100644
--- a/src/sonic-yang-models/yang-models/sonic-mux-linkmgr.yang
+++ b/src/sonic-yang-models/yang-models/sonic-mux-linkmgr.yang
@@ -84,6 +84,22 @@ module sonic-mux-linkmgr {
                 }
             }
 
+            container TIMED_OSCILLATION {
+
+                leaf oscillation_enabled {
+                    type boolean;
+                    default true;
+                    description "Flag to enable/disable timed oscillation. ";
+                }
+
+                leaf interval_sec {
+                    type uint32;
+                    default 300;
+                    units seconds;
+                    description "Interval between MUX oscillations. ";
+                }
+            }
+
             container MUXLOGGER {
 
                 leaf log_verbosity {
@@ -114,4 +130,4 @@ module sonic-mux-linkmgr {
             }
         }
     }
-}
\ No newline at end of file
+}

From e6192bf0fdba74e686e96f488217c37cc64a239e Mon Sep 17 00:00:00 2001
From: Tomer Shalvi <116184476+tshalvi@users.noreply.github.com>
Date: Thu, 13 Jun 2024 17:07:58 +0300
Subject: [PATCH 0747/1115] [Mellanox] Enhance is_module_host_management_mode
 to also check syncd's sai.profile (#19261)

- Why I did it
Two steps (among others) are required to enable the host CMIS management feature: enabling it in the switch's sai.profile and performing a config reload. During the timeframe between these two steps, the control sysfs might be accessed, but they will not be present on the system until the latter step, the config reload, is completed. The code should try to access the control sysfs only after the config reload step. A good indication that this has been done is to check if the relevant entry is included in syncd's sai.profile. In contrast to the switch's sai.profile, syncd's sai.profile is only updated with the Host CMIS management support flag after the reload is complete.

- How I did it
I updated the is_module_host_management_mode() implementation to first look for the Host CMIS management support flag in syncd's sai.profile, and only if it does not exist for some reason, look for it in the switch's sai.profile.

- How to verify it
Add the Host CMIS management support flag to the switch's sai.profile and verify that the following log does not appear:
ERR pmon#xcvrd: Exception occured at DomInfoUpdateTask thread due to Exception('control sysfs for SFP 20 does not exist')
---
 .../mlnx-platform-api/sonic_platform/device_data.py    | 10 ++++++----
 1 file changed, 6 insertions(+), 4 deletions(-)

diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/device_data.py b/platform/mellanox/mlnx-platform-api/sonic_platform/device_data.py
index 9ee37af99..35c40476b 100644
--- a/platform/mellanox/mlnx-platform-api/sonic_platform/device_data.py
+++ b/platform/mellanox/mlnx-platform-api/sonic_platform/device_data.py
@@ -267,12 +267,14 @@ def get_cpld_component_list(cls):
     @classmethod
     @utils.read_only_cache()
     def is_module_host_management_mode(cls):
-        from sonic_py_common import device_info
-        _, hwsku_dir = device_info.get_paths_to_platform_and_hwsku_dirs()
-        sai_profile_file = os.path.join(hwsku_dir, 'sai.profile')
+        sai_profile_file = '/tmp/sai.profile'
+        if not os.path.exists(sai_profile_file):
+            from sonic_py_common import device_info
+            _, hwsku_dir = device_info.get_paths_to_platform_and_hwsku_dirs()
+            sai_profile_file = os.path.join(hwsku_dir, 'sai.profile')
         data = utils.read_key_value_file(sai_profile_file, delimeter='=')
         return data.get('SAI_INDEPENDENT_MODULE_MODE') == '1'
-    
+
     @classmethod
     def wait_platform_ready(cls):
         """

From a2b3ca87a34e2908177e25a2f5abe7b6cdc5d53c Mon Sep 17 00:00:00 2001
From: wenyiz2021 <91497961+wenyiz2021@users.noreply.github.com>
Date: Thu, 13 Jun 2024 17:09:54 -0700
Subject: [PATCH 0748/1115] [master] [DNX SAI] bump SAI version to 10.1.21.1
 (#19304)

Microsoft ADO (number only): 28321093

Loaded sonic image with this SAI version on chassis device, dockers are up, no crash
---
 platform/broadcom/sai-modules.mk | 2 +-
 platform/broadcom/sai.mk         | 4 ++--
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/platform/broadcom/sai-modules.mk b/platform/broadcom/sai-modules.mk
index 6271942cc..f9fcef135 100644
--- a/platform/broadcom/sai-modules.mk
+++ b/platform/broadcom/sai-modules.mk
@@ -10,7 +10,7 @@ $(BRCM_OPENNSL_KERNEL)_MACHINE = broadcom
 SONIC_DPKG_DEBS += $(BRCM_OPENNSL_KERNEL)
 
 # SAI bcm modules for DNX family ASIC
-BRCM_DNX_OPENNSL_KERNEL_VERSION = 10.1.13.0
+BRCM_DNX_OPENNSL_KERNEL_VERSION = 10.1.21.0
 
 BRCM_DNX_OPENNSL_KERNEL = opennsl-modules-dnx_$(BRCM_DNX_OPENNSL_KERNEL_VERSION)_amd64.deb
 $(BRCM_DNX_OPENNSL_KERNEL)_SRC_PATH = $(PLATFORM_PATH)/saibcm-modules-dnx
diff --git a/platform/broadcom/sai.mk b/platform/broadcom/sai.mk
index 2512caad2..78507f9a2 100644
--- a/platform/broadcom/sai.mk
+++ b/platform/broadcom/sai.mk
@@ -1,7 +1,7 @@
 LIBSAIBCM_XGS_VERSION = 10.1.7.0
-LIBSAIBCM_DNX_VERSION = 10.1.13.0
+LIBSAIBCM_DNX_VERSION = 10.1.21.0
 LIBSAIBCM_XGS_BRANCH_NAME = SAI_10.1.0_GA
-LIBSAIBCM_DNX_BRANCH_NAME = SAI_10.1.0_GA
+LIBSAIBCM_DNX_BRANCH_NAME = SAI_10.1.21.1
 LIBSAIBCM_XGS_URL_PREFIX = "https://sonicstorage.blob.core.windows.net/public/sai/sai-broadcom/$(LIBSAIBCM_XGS_BRANCH_NAME)/$(LIBSAIBCM_XGS_VERSION)/xgs"
 LIBSAIBCM_DNX_URL_PREFIX = "https://sonicstorage.blob.core.windows.net/public/sai/sai-broadcom/$(LIBSAIBCM_DNX_BRANCH_NAME)/$(LIBSAIBCM_DNX_VERSION)/dnx"
 

From 7f32712f4208f091a38224eb1809f242f2a10b79 Mon Sep 17 00:00:00 2001
From: zitingguo-ms <zitingguo@microsoft.com>
Date: Fri, 14 Jun 2024 23:21:15 +0800
Subject: [PATCH 0749/1115] Upgrade xgs SAI version to 10.1.21.0 (#19302)

Why I did it
Upgrade the xgs SAI version to 10.1.21.0 to include the following changes:

10.1.8.0: Support _brcm_sai_port_unlos_set when external port_phy_addr is 0xff
10.1.9.0: [CS00012330893]With PFC test, egress drop observed for lossless queues
10.1.11.0: Include the bcmsim in the odp package
10.1.13.0: handle bind of egress and ingress groups to same lag
10.1.14.0: Backport SDK-381920 to rel_ocp_sai_10_1 High CPU due to SDK calling soc_dnxc_port_resource_get
10.1.16.0: [CSP CS00012336644] callback called twice with same event type
10.1.17.0: [CSP 00012320736][SAI_BRANCH rel_ocp_sai_10_1]Back port MMU related Fixes to 10.1 specific to LTSW/TH4 devices-HSDK
10.1.18.0: [CSP CS00012351984] Backport SONIC-81526 to 10.1 Fixes for rate class bound setting and UCQ stats
10.1.19.0: Reset EGR_L3_NEXT_HOP_2 for TH3
10.1.20.0: Sonic crash due to unsupported return from SAI_SWITCH_ATTR_ECMP_DEFAULT_HASH_OFFSET
Work item tracking
Microsoft ADO (number only): 28356083
How I did it
Upgrade the SAI version in the sai.mk file.

How to verify it
Run the SONiC basic test in the SAI release pipeline:
https://dev.azure.com/mssonic/internal/_build/results?buildId=570565&view=results
---
 platform/broadcom/sai.mk | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/platform/broadcom/sai.mk b/platform/broadcom/sai.mk
index 78507f9a2..048d120e8 100644
--- a/platform/broadcom/sai.mk
+++ b/platform/broadcom/sai.mk
@@ -1,4 +1,4 @@
-LIBSAIBCM_XGS_VERSION = 10.1.7.0
+LIBSAIBCM_XGS_VERSION = 10.1.21.0
 LIBSAIBCM_DNX_VERSION = 10.1.21.0
 LIBSAIBCM_XGS_BRANCH_NAME = SAI_10.1.0_GA
 LIBSAIBCM_DNX_BRANCH_NAME = SAI_10.1.21.1

From 911350550591ef33b886aa0a62222e2b70c564a3 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sat, 15 Jun 2024 16:01:27 +0800
Subject: [PATCH 0750/1115] [submodule] Update submodule sonic-gnmi to the
 latest HEAD automatically (#19296)

#### Why I did it
src/sonic-gnmi
```
* 5357f93 - (HEAD -> master, origin/master, origin/HEAD) Fix yang validation (#244) (19 hours ago) [ganglv]
* 20aba13 - Improve GNMI incremental config and add unit test for BGP (#239) (2 days ago) [ganglv]
* f0d0959 - Merge pull request #241 from liuh-80/dev/liuh/add_gnmi_cert_name (2 days ago) [Hua Liu]
|\
| failure_prs.log 9b65bde - Merge branch 'master' into dev/liuh/add_gnmi_cert_name (2 days ago) [Hua Liu]
| |\
| |/
|/|
* | 424212b - Add aaa ut (#222) (2 days ago) [ganglv]
 /
* 90322b3 - Revert unecessary change (10 days ago) [liuh-80]
* b7abf5a - Fix comments (10 days ago) [liuh-80]
* f47be1c - Update server_test.go (11 days ago) [Hua Liu]
* 0ae9398 - Fix test case (12 days ago) [liuh-80]
* d305bca - Fix build issue (12 days ago) [liuh-80]
* 518b332 - Merge remote-tracking branch 'origin/master' into dev/liuh/add_gnmi_cert_name (12 days ago) [liuh-80]
* 0d30cfc - Fix yang issue (12 days ago) [liuh-80]
* f2882dd - Add cert role mapping (12 days ago) [liuh-80]
* 3ee207a - Update server_test.go (2 weeks ago) [Hua Liu]
* 0f211bf - Update server_test.go (2 weeks ago) [Hua Liu]
* 6b85507 - Improve coverage (2 weeks ago) [liuh-80]
* ec096c3 - Fix split method (2 weeks ago) [liuh-80]
* 43e7a43 - Improve code (2 weeks ago) [liuh-80]
* 7c4b830 - Improve code (3 weeks ago) [liuh-80]
* b998f4e - Improve code (3 weeks ago) [liuh-80]
* 795a52b - Improve code (3 weeks ago) [liuh-80]
* 08571e3 - Add cert authorization with common name support (3 weeks ago) [liuh-80]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-gnmi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-gnmi b/src/sonic-gnmi
index 50817e697..5357f932a 160000
--- a/src/sonic-gnmi
+++ b/src/sonic-gnmi
@@ -1 +1 @@
-Subproject commit 50817e697d3c85abc8aac7d4a1565e003bf5159a
+Subproject commit 5357f932ad5fab01ad51684be08d3909b9f7eedf

From 41cc4870e86388b7ec49ceac9e531bd8cc4e9bf0 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sat, 15 Jun 2024 19:01:05 +0800
Subject: [PATCH 0751/1115] [submodule] Update submodule sonic-utilities to the
 latest HEAD automatically (#19321)

#### Why I did it
src/sonic-utilities
```
* d0856afa - (HEAD -> master, origin/master, origin/HEAD) Add Checkpoint and Rollback for Multi ASIC. (#3299) (19 hours ago) [Xincun Li]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-utilities | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-utilities b/src/sonic-utilities
index c2370f88d..d0856afad 160000
--- a/src/sonic-utilities
+++ b/src/sonic-utilities
@@ -1 +1 @@
-Subproject commit c2370f88d896abbe9dc7b48acf66ebd2477ecdaa
+Subproject commit d0856afad1c6f7ead6eeca70531c988fb448c335

From e25e755e33f32c608082b36f07eae1e29ea32564 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sat, 15 Jun 2024 19:01:28 +0800
Subject: [PATCH 0752/1115] [submodule] Update submodule sonic-sairedis to the
 latest HEAD automatically (#19272)

#### Why I did it
src/sonic-sairedis
```
* a988dd1b - (HEAD -> master, origin/master, origin/HEAD) Sairedis support SAI api/object type extenstion range (#1390) (32 hours ago) [Kamil Cudnik]
* fd8f890f - [saisubmodule] Update SAI submodule to latest master (#1395) (32 hours ago) [Kamil Cudnik]
* 9574a3c6 - [proxy] Support notifications (#1393) (2 days ago) [Kamil Cudnik]
* 4f0fcafe - [proxy] Support load profile map from file (#1389) (5 days ago) [Kamil Cudnik]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-sairedis | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-sairedis b/src/sonic-sairedis
index 1f2c861aa..a988dd1b7 160000
--- a/src/sonic-sairedis
+++ b/src/sonic-sairedis
@@ -1 +1 @@
-Subproject commit 1f2c861aafe751e62ad8510419a4da7c795f4bb5
+Subproject commit a988dd1b7b9044fd7ca859ecdfa1eb858cc3ea08

From 157818104e4a109421a72d4753b07a442c19e8be Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Mon, 17 Jun 2024 19:04:22 +0800
Subject: [PATCH 0753/1115] [submodule] Update submodule sonic-platform-daemons
 to the latest HEAD automatically (#19326)

#### Why I did it
src/sonic-platform-daemons
```
* 6694d3b - (HEAD -> master, origin/master, origin/HEAD) [xcvrd] Fix issue: do not print error log when module support non-ethernet application (#501) (16 minutes ago) [Junchao-Mellanox]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-platform-daemons | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-platform-daemons b/src/sonic-platform-daemons
index efb4dbd31..6694d3b97 160000
--- a/src/sonic-platform-daemons
+++ b/src/sonic-platform-daemons
@@ -1 +1 @@
-Subproject commit efb4dbd31006f7f0d44069b215c361ef0e1c2bc3
+Subproject commit 6694d3b97c6d7d52c9f1544f22c5fd107bff3727

From 1fba66c5d41a19ce9b02f64cd2091c0783da0a78 Mon Sep 17 00:00:00 2001
From: ganglv <88995770+ganglyu@users.noreply.github.com>
Date: Tue, 18 Jun 2024 10:13:58 +0800
Subject: [PATCH 0754/1115] Improve service checker for gnmi/telemetry
 container (#19153)

Why I did it
Fix #19081
We have used gnmi container to replace telemetry container, and telemetry is still enabled after upgrade.
service_checker script reads from features table and check if the container is running, telemetry is enabled but there's no telemetry container.
It's difficult to disable telemetry in feature table for warm reboot and cold reboot, we need to check docker image in db migrator and minigraph.py.
When we use warm reboot to upgrade from 202305 to 202311, config_db still has telemetry configuration, and we can't simply remove related configuration.

Work item tracking
Microsoft ADO (number only):
How I did it
I modify service_checker script:
If there's docker-sonic-telemetry image, check telemetry container.
If there's no docker-sonic-telemetry image, check gnmi container instead.
If there's no docker-sonic-telemetry image and docker-sonic-gnmi image, do not check telemetry.

How to verify it
Run unit test and end to end test.
---
 .../health_checker/service_checker.py         | 47 +++++++++++++++---
 .../etc/supervisor/critical_processes         |  1 +
 src/system-health/tests/test_system_health.py | 49 +++++++++++++++++++
 3 files changed, 89 insertions(+), 8 deletions(-)
 create mode 100644 src/system-health/tests/telemetry/etc/supervisor/critical_processes

diff --git a/src/system-health/health_checker/service_checker.py b/src/system-health/health_checker/service_checker.py
index bc38bd43a..10ec7e678 100644
--- a/src/system-health/health_checker/service_checker.py
+++ b/src/system-health/health_checker/service_checker.py
@@ -15,6 +15,19 @@
 EVENTS_PUBLISHER_SOURCE = "sonic-events-host"
 EVENTS_PUBLISHER_TAG = "process-not-running"
 
+def check_docker_image(image_name):
+    """
+    @summary: This function will check if docker image exists.
+    @return:  True if the image exists, otherwise False.
+    """
+    try:
+        DOCKER_CLIENT = docker.DockerClient(base_url='unix://var/run/docker.sock')
+        DOCKER_CLIENT.images.get(image_name)
+        return True
+    except (docker.errors.ImageNotFound, docker.errors.APIError) as err:
+        logger.log_warning("Failed to get image '{}'. Error: '{}'".format(image_name, err))
+        return False
+
 class ServiceChecker(HealthChecker):
     """
     Checker that checks critical system service status via monit service.
@@ -84,21 +97,39 @@ def get_expected_running_containers(self, feature_table):
         # it will be removed from exception list.
         run_all_instance_list = ['database', 'bgp']
 
-        for feature_name, feature_entry in feature_table.items():
+        container_list = []
+        for container_name in feature_table.keys():
+            # slim image does not have telemetry container and corresponding docker image
+            if container_name == "telemetry":
+                ret = check_docker_image("docker-sonic-telemetry")
+                if not ret:
+                    # If telemetry container image is not present, check gnmi container image
+                    # If gnmi container image is not present, ignore telemetry container check
+                    # if gnmi container image is present, check gnmi container instead of telemetry
+                    ret = check_docker_image("docker-sonic-gnmi")
+                    if not ret:
+                        logger.log_debug("Ignoring telemetry container check on image which has no corresponding docker image")
+                    else:
+                        container_list.append("gnmi")
+                    continue
+            container_list.append(container_name)
+
+        for container_name in container_list:
+            feature_entry = feature_table[container_name]
             if feature_entry["state"] not in ["disabled", "always_disabled"]:
                 if multi_asic.is_multi_asic():
                     if feature_entry.get("has_global_scope", "True") == "True":
-                        expected_running_containers.add(feature_name)
-                        container_feature_dict[feature_name] = feature_name
+                        expected_running_containers.add(container_name)
+                        container_feature_dict[container_name] = container_name
                     if feature_entry.get("has_per_asic_scope", "False") == "True":
                         num_asics = multi_asic.get_num_asics()
                         for asic_id in range(num_asics):
-                            if asic_id in asics_id_presence or feature_name in run_all_instance_list:
-                                expected_running_containers.add(feature_name + str(asic_id))
-                                container_feature_dict[feature_name + str(asic_id)] = feature_name
+                            if asic_id in asics_id_presence or container_name in run_all_instance_list:
+                                expected_running_containers.add(container_name + str(asic_id))
+                                container_feature_dict[container_name + str(asic_id)] = container_name
                 else:
-                    expected_running_containers.add(feature_name)
-                    container_feature_dict[feature_name] = feature_name
+                    expected_running_containers.add(container_name)
+                    container_feature_dict[container_name] = container_name
                     
         if device_info.is_supervisor():
             expected_running_containers.add("database-chassis")
diff --git a/src/system-health/tests/telemetry/etc/supervisor/critical_processes b/src/system-health/tests/telemetry/etc/supervisor/critical_processes
new file mode 100644
index 000000000..fd693f800
--- /dev/null
+++ b/src/system-health/tests/telemetry/etc/supervisor/critical_processes
@@ -0,0 +1 @@
+program:gnmi-native
diff --git a/src/system-health/tests/test_system_health.py b/src/system-health/tests/test_system_health.py
index ab44fcd66..4aeb3b18f 100644
--- a/src/system-health/tests/test_system_health.py
+++ b/src/system-health/tests/test_system_health.py
@@ -12,6 +12,7 @@
 import copy
 import os
 import sys
+import docker
 from imp import load_source
 from swsscommon import swsscommon
 
@@ -23,6 +24,7 @@
 swsscommon.SonicV2Connector = MockConnector
 
 test_path = os.path.dirname(os.path.abspath(__file__))
+telemetry_path = os.path.join(test_path, 'telemetry')
 modules_path = os.path.dirname(test_path)
 scripts_path = os.path.join(modules_path, 'scripts')
 sys.path.insert(0, modules_path)
@@ -166,6 +168,53 @@ def test_service_checker_single_asic(mock_config_db, mock_run, mock_docker_clien
     assert origin_container_critical_processes == checker.container_critical_processes
 
 
+@patch('swsscommon.swsscommon.ConfigDBConnector.connect', MagicMock())
+@patch('health_checker.service_checker.ServiceChecker._get_container_folder', MagicMock(return_value=telemetry_path))
+@patch('sonic_py_common.multi_asic.is_multi_asic', MagicMock(return_value=False))
+@patch('docker.DockerClient')
+@patch('health_checker.utils.run_command')
+@patch('swsscommon.swsscommon.ConfigDBConnector')
+def test_service_checker_telemetry(mock_config_db, mock_run, mock_docker_client):
+    setup()
+    mock_db_data = MagicMock()
+    mock_get_table = MagicMock()
+    mock_db_data.get_table = mock_get_table
+    mock_config_db.return_value = mock_db_data
+    mock_get_table.return_value = {
+        'gnmi': {
+            'state': 'enabled',
+            'has_global_scope': 'True',
+            'has_per_asic_scope': 'False',
+
+        },
+        'telemetry': {
+            'state': 'enabled',
+            'has_global_scope': 'True',
+            'has_per_asic_scope': 'False',
+
+        }
+    }
+    mock_containers = MagicMock()
+    mock_gnmi_container = MagicMock()
+    mock_gnmi_container.name = 'gnmi'
+    mock_containers.list = MagicMock(return_value=[mock_gnmi_container])
+    mock_docker_client_object = MagicMock()
+    mock_docker_client.return_value = mock_docker_client_object
+    mock_docker_client_object.containers = mock_containers
+    mock_docker_client_object.images = MagicMock()
+    mock_docker_client_object.images.get = MagicMock()
+    except_err = docker.errors.ImageNotFound("Unit test")
+    mock_docker_client_object.images.get.side_effect = [except_err, None]
+
+    mock_run.return_value = "gnmi-native                       RUNNING   pid 67, uptime 1:03:56"
+
+    checker = ServiceChecker()
+    assert checker.get_category() == 'Services'
+    config = Config()
+    checker.check(config)
+    assert 'gnmi:gnmi-native' in checker._info
+    assert checker._info['gnmi:gnmi-native'][HealthChecker.INFO_FIELD_OBJECT_STATUS] == HealthChecker.STATUS_OK
+
 
 @patch('swsscommon.swsscommon.ConfigDBConnector.connect', MagicMock())
 @patch('health_checker.service_checker.ServiceChecker._get_container_folder', MagicMock(return_value=test_path))

From 44ae9e7a6d3fc5a3127835ca4ec72bfeaeda28ea Mon Sep 17 00:00:00 2001
From: zitingguo-ms <zitingguo@microsoft.com>
Date: Tue, 18 Jun 2024 23:12:16 +0800
Subject: [PATCH 0755/1115] Revert "Upgrade xgs SAI version to 10.1.21.0
 (#19302)" (#19337)

This reverts commit 7f32712f4208f091a38224eb1809f242f2a10b79.
---
 platform/broadcom/sai.mk | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/platform/broadcom/sai.mk b/platform/broadcom/sai.mk
index 048d120e8..78507f9a2 100644
--- a/platform/broadcom/sai.mk
+++ b/platform/broadcom/sai.mk
@@ -1,4 +1,4 @@
-LIBSAIBCM_XGS_VERSION = 10.1.21.0
+LIBSAIBCM_XGS_VERSION = 10.1.7.0
 LIBSAIBCM_DNX_VERSION = 10.1.21.0
 LIBSAIBCM_XGS_BRANCH_NAME = SAI_10.1.0_GA
 LIBSAIBCM_DNX_BRANCH_NAME = SAI_10.1.21.1

From 0ffdf4e11942b0d2f90d1cc7ea2a4ee56a3c1d11 Mon Sep 17 00:00:00 2001
From: Zain Budhwani <99770260+zbud-msft@users.noreply.github.com>
Date: Tue, 18 Jun 2024 18:13:41 -0700
Subject: [PATCH 0756/1115] Fix rsyslog plugin slim image logic (#19034)

* Fix rsyslog plugin slim image logic

* Remove asic check for broadcom when checking for eventd enabled and slim image
---
 dockers/docker-dhcp-relay/Dockerfile.j2               |  4 +---
 dockers/docker-fpm-frr/Dockerfile.j2                  |  4 +---
 dockers/docker-orchagent/Dockerfile.j2                |  4 +---
 files/build_templates/init_cfg.json.j2                |  2 +-
 files/build_templates/sonic_debian_extension.j2       |  4 +---
 files/image_config/rsyslog/rsyslog.d/00-sonic.conf.j2 | 11 +++++++----
 6 files changed, 12 insertions(+), 17 deletions(-)

diff --git a/dockers/docker-dhcp-relay/Dockerfile.j2 b/dockers/docker-dhcp-relay/Dockerfile.j2
index 48375e214..5b0dc82c3 100644
--- a/dockers/docker-dhcp-relay/Dockerfile.j2
+++ b/dockers/docker-dhcp-relay/Dockerfile.j2
@@ -50,8 +50,7 @@ COPY ["files/supervisor-proc-exit-listener", "/usr/bin"]
 COPY ["critical_processes", "/etc/supervisor"]
 COPY ["cli", "/cli/"]
 
-{% if include_system_eventd == "y" %}
-{% if build_reduce_image_size != "y" or sonic_asic_platform != "broadcom" %}
+{% if include_system_eventd == "y" and build_reduce_image_size != "y" %}
 # Copy regex json and rsyslog_plugin.conf file into rsyslog.d
 COPY ["*.json", "/etc/rsyslog.d/"]
 COPY ["files/rsyslog_plugin.conf.j2", "/etc/rsyslog.d/"]
@@ -60,6 +59,5 @@ RUN j2 -f json /etc/rsyslog.d/rsyslog_plugin.conf.j2 /etc/rsyslog.d/events_info.
 RUN rm -f /etc/rsyslog.d/rsyslog_plugin.conf.j2
 RUN rm -f /etc/rsyslog.d/events_info.json
 {% endif %}
-{% endif %}
 
 ENTRYPOINT ["/usr/bin/docker_init.sh"]
diff --git a/dockers/docker-fpm-frr/Dockerfile.j2 b/dockers/docker-fpm-frr/Dockerfile.j2
index b0dc413c8..98c459381 100644
--- a/dockers/docker-fpm-frr/Dockerfile.j2
+++ b/dockers/docker-fpm-frr/Dockerfile.j2
@@ -59,14 +59,12 @@ RUN chmod a+x /usr/bin/TSA && \
     chmod a+x /usr/bin/TSC && \
     chmod a+x /usr/bin/zsocket.sh
 
-{% if include_system_eventd == "y" %}
-{% if build_reduce_image_size != "y" or sonic_asic_platform != "broadcom" %}
+{% if include_system_eventd == "y" and build_reduce_image_size != "y" %}
 COPY ["*.json", "/etc/rsyslog.d/"]
 COPY ["files/rsyslog_plugin.conf.j2", "/etc/rsyslog.d/"]
 RUN j2 -f json /etc/rsyslog.d/rsyslog_plugin.conf.j2 /etc/rsyslog.d/events_info.json  > /etc/rsyslog.d/bgp_events.conf
 RUN rm -f /etc/rsyslog.d/rsyslog_plugin.conf.j2
 RUN rm -f /etc/rsyslog.d/events_info.json
 {% endif %}
-{% endif %}
 
 ENTRYPOINT ["/usr/bin/docker_init.sh"]
diff --git a/dockers/docker-orchagent/Dockerfile.j2 b/dockers/docker-orchagent/Dockerfile.j2
index 3bc02a9d8..fb90b4f09 100755
--- a/dockers/docker-orchagent/Dockerfile.j2
+++ b/dockers/docker-orchagent/Dockerfile.j2
@@ -80,8 +80,7 @@ RUN sonic-cfggen -a "{\"ENABLE_ASAN\":\"{{ENABLE_ASAN}}\"}" -t /usr/share/sonic/
 RUN rm -f /usr/share/sonic/templates/docker-init.j2
 RUN chmod 755 /usr/bin/docker-init.sh
 
-{% if include_system_eventd == "y" %}
-{% if build_reduce_image_size != "y" or sonic_asic_platform != "broadcom" %}
+{% if include_system_eventd == "y" and build_reduce_image_size != "y" %}
 # Copy all regex json files and rsyslog_plugin.conf to rsyslog.d
 COPY ["*.json", "/etc/rsyslog.d/"]
 COPY ["files/rsyslog_plugin.conf.j2", "/etc/rsyslog.d/"]
@@ -90,6 +89,5 @@ RUN j2 -f json /etc/rsyslog.d/rsyslog_plugin.conf.j2 /etc/rsyslog.d/events_info.
 RUN rm -f /etc/rsyslog.d/rsyslog_plugin.conf.j2
 RUN rm -f /etc/rsyslog.d/events_info.json
 {% endif %}
-{% endif %}
 
 ENTRYPOINT ["/usr/bin/docker-init.sh"]
diff --git a/files/build_templates/init_cfg.json.j2 b/files/build_templates/init_cfg.json.j2
index 0a185680e..dc7e4aab7 100644
--- a/files/build_templates/init_cfg.json.j2
+++ b/files/build_templates/init_cfg.json.j2
@@ -61,7 +61,7 @@
 {%- if include_macsec == "y" %}{% do features.append(("macsec", "{% if 'type' in DEVICE_METADATA['localhost'] and DEVICE_METADATA['localhost']['type'] == 'SpineRouter' and DEVICE_RUNTIME_METADATA['MACSEC_SUPPORTED'] %}enabled{% else %}disabled{% endif %}", false, "enabled")) %}{% endif %}
 {%- if include_system_gnmi == "y" %}{% do features.append(("gnmi", "enabled", true, "enabled")) %}{% endif %}
 {%- if include_system_telemetry == "y" %}{% do features.append(("telemetry", "enabled", true, "enabled")) %}{% endif %}
-{%- if include_system_eventd == "y" and BUILD_REDUCE_IMAGE_SIZE == "y" and sonic_asic_platform == "broadcom" %}
+{%- if include_system_eventd == "y" and BUILD_REDUCE_IMAGE_SIZE == "y" %}
     {% do features.append(("eventd","disabled", false, "enabled")) %}
 {%- elif include_system_eventd == "y" %}
     {% do features.append(("eventd", "enabled", false, "enabled")) %}
diff --git a/files/build_templates/sonic_debian_extension.j2 b/files/build_templates/sonic_debian_extension.j2
index ece833119..52f12b4ef 100644
--- a/files/build_templates/sonic_debian_extension.j2
+++ b/files/build_templates/sonic_debian_extension.j2
@@ -354,8 +354,7 @@ sudo dpkg --root=$FILESYSTEM_ROOT -i $debs_path/sonic-db-cli_*.deb || \
     sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install -f
 
 
-{% if include_system_eventd == "y" %}
-{% if build_reduce_image_size != "y" or sonic_asic_platform != "broadcom" %}
+{% if include_system_eventd == "y" and build_reduce_image_size != "y" %}
 # Install sonic-rsyslog-plugin
 sudo dpkg --root=$FILESYSTEM_ROOT -i $debs_path/sonic-rsyslog-plugin_*.deb || \
     sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install -f
@@ -375,7 +374,6 @@ sudo cp $BUILD_TEMPLATES/bgpd_regex.json $FILESYSTEM_ROOT_ETC/rsyslog.d/
 j2 -f json $BUILD_TEMPLATES/rsyslog_plugin.conf.j2 $BUILD_TEMPLATES/syncd_events_info.json | sudo tee $FILESYSTEM_ROOT_ETC/rsyslog.d/syncd_events.conf
 sudo cp $BUILD_TEMPLATES/syncd_regex.json $FILESYSTEM_ROOT_ETC/rsyslog.d/
 
-{% endif %}
 {% endif %}
 
 # Install custom-built monit package and SONiC configuration files
diff --git a/files/image_config/rsyslog/rsyslog.d/00-sonic.conf.j2 b/files/image_config/rsyslog/rsyslog.d/00-sonic.conf.j2
index 66eb13463..a5b468974 100644
--- a/files/image_config/rsyslog/rsyslog.d/00-sonic.conf.j2
+++ b/files/image_config/rsyslog/rsyslog.d/00-sonic.conf.j2
@@ -5,31 +5,34 @@ template(name="prog_msg" type="list") {
     constant(value="\n")
 }
 
-{% if include_system_eventd == "y" %}
-{% if build_reduce_image_size != "y" or sonic_asic_platform != "broadcom" %}
+{% if include_system_eventd == "y" and build_reduce_image_size != "y" %}
 
 $ModLoad omprog
 
+{% endif %}
+
 if re_match($programname, "bgp[0-9]*#(frr|zebra|staticd|watchfrr)") then {
     /var/log/frr/zebra.log
+    {% if include_system_eventd == "y" and build_reduce_image_size != "y" %}
     action(type="omprog"
         binary="/usr/bin/rsyslog_plugin -r /etc/rsyslog.d/zebra_regex.json -m sonic-events-bgp"
         output="/var/log/rsyslog_plugin.log"
         template="prog_msg")
+    {% endif %}
     stop
 }
 
 if re_match($programname, "bgp[0-9]*#bgpd") then {
     /var/log/frr/bgpd.log
+    {% if include_system_eventd == "y" and build_reduce_image_size != "y" %}
     action(type="omprog"
         binary="/usr/bin/rsyslog_plugin -r /etc/rsyslog.d/bgpd_regex.json -m sonic-events-bgp"
         output="/var/log/rsyslog_plugin.log"
         template="prog_msg")
+    {% endif %}
     stop
 }
 
-{% endif %}
-{% endif %}
 
 ## Teamd rules
 

From 881bb40c62192e1a12752ed538a8a763391cbd2c Mon Sep 17 00:00:00 2001
From: Yuanzhe <150663541+yuazhe@users.noreply.github.com>
Date: Wed, 19 Jun 2024 14:33:40 +0800
Subject: [PATCH 0757/1115] [Mellanox] Enable get_tx_fault support in CMIS
 cable host mgmt mode (#18984)

- Why I did it
Enable get_tx_fault support in CMIS cable host mgmt mode on Mellanox platforms

- How I did it
Use community get_tx_fault implementation instead of the dummy one

- How to verify it
API call and run API Test

Signed-off-by: Yuanzhe, Liu <yualiu@nvidia.com>
---
 platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py b/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py
index 58fe71b84..a457b7458 100644
--- a/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py
+++ b/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py
@@ -1054,6 +1054,11 @@ def get_tx_fault(self):
             list: [False] * channels
         """
         api = self.get_xcvr_api()
+        try:
+            if self.is_sw_control():
+                return api.get_tx_fault() if api else None
+        except Exception as e:
+            print(e)
         return [False] * api.NUM_CHANNELS if api else None
 
     def get_temperature(self):
@@ -1154,7 +1159,6 @@ def get_xcvr_api(self):
             self.refresh_xcvr_api()
             if self._xcvr_api is not None:
                 self._xcvr_api.get_rx_los = self.get_rx_los
-                self._xcvr_api.get_tx_fault = self.get_tx_fault
         return self._xcvr_api
 
     def is_sw_control(self):

From 76069eb1a58366522fc39f2e92b14b69b2359fd3 Mon Sep 17 00:00:00 2001
From: Song Yuan <64041228+ysmanman@users.noreply.github.com>
Date: Wed, 19 Jun 2024 10:10:24 -0700
Subject: [PATCH 0758/1115] Add environs to test PFCWD on DNX (#19108)

- Add ASIC_TYPE to force orchagent to run with the given ASIC.
- Add PFC_DLR_INIT_ENABLE to allow test to override PfcDlrInitEnable for VS switch.
  This is required to test PfcWdAclHandler, instead of PfcWdDlrHandler.
---
 platform/vs/docker-sonic-vs/orchagent.sh | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/platform/vs/docker-sonic-vs/orchagent.sh b/platform/vs/docker-sonic-vs/orchagent.sh
index 8bd365e13..f044bc922 100755
--- a/platform/vs/docker-sonic-vs/orchagent.sh
+++ b/platform/vs/docker-sonic-vs/orchagent.sh
@@ -8,6 +8,20 @@ else
     export platform=vs
 fi
 
+# Force orchagent to run with the given ASIC.
+if [ "$ASIC_TYPE" == "broadcom-dnx" ]; then
+    export platform="broadcom"
+    export sub_platform="broadcom-dnx"
+fi
+
+# Allow test to override PfcDlrInitEnable for VS switch so that
+# we can test PfcWdAclHandler, instead of PfcWdDlrHandler.
+if [ "$PFC_DLR_INIT_ENABLE" == "1" ]; then
+    export pfcDlrInitEnable="1"
+elif [ "$PFC_DLR_INIT_ENABLE" == "0" ]; then
+    export pfcDlrInitEnable="0"
+fi
+
 SWSS_VARS_FILE=/usr/share/sonic/templates/swss_vars.j2
 
 # Retrieve SWSS vars from sonic-cfggen

From 99e0e1ade0199b8660deb4fd49dd4903f4df9adb Mon Sep 17 00:00:00 2001
From: fountzou <169114916+fountzou@users.noreply.github.com>
Date: Wed, 19 Jun 2024 20:53:28 +0300
Subject: [PATCH 0759/1115] [TSA] Reliable TSA: Addressing pizza box issues
 (#19217)

* [TSA] Reliable TSA: Addressing pizza box issues

- Why I did it
Implement HLD https://github.com/skeesara-nokia/SONiC/blob/master/doc/voq/Reliable_TSA.md

OB- How I did it
A new attribute "tsa_enabled" has been added in CHASSIS_APP_DB the value of which changes whenever TSA/TSB is issued in the supervisor (default value is false). bgpcfgd subscribes to CHASSIS_APP_DB to receive updates on the newly added "tsa_enabled" attribute and in conjunction with the CONFIG_DB "tsa_enabled" attribute value, determine the BGP operational state is determined to be in TSA or TSB.

Signed-off-by: fountzou <ioannis.fountzoulas@nokia.com>
---
 dockers/docker-fpm-frr/base_image_files/TS    |  22 ++-
 dockers/docker-fpm-frr/base_image_files/TSA   |  13 +-
 dockers/docker-fpm-frr/base_image_files/TSB   |  16 +-
 files/build_templates/docker_image_ctl.j2     |  12 ++
 files/image_config/config-setup/config-setup  |  13 ++
 src/sonic-bgpcfgd/bgpcfgd/main.py             |   6 +
 .../bgpcfgd/managers_chassis_app_db.py        |  50 ++++++
 .../bgpcfgd/managers_device_global.py         |  32 +++-
 src/sonic-bgpcfgd/bgpcfgd/runner.py           |   5 +-
 .../tests/test_chassis_app_db.py              | 142 ++++++++++++++++++
 src/sonic-bgpcfgd/tests/test_device_global.py |  73 ++++++++-
 11 files changed, 365 insertions(+), 19 deletions(-)
 create mode 100644 src/sonic-bgpcfgd/bgpcfgd/managers_chassis_app_db.py
 create mode 100644 src/sonic-bgpcfgd/tests/test_chassis_app_db.py

diff --git a/dockers/docker-fpm-frr/base_image_files/TS b/dockers/docker-fpm-frr/base_image_files/TS
index fcff1f806..0084bd5f2 100755
--- a/dockers/docker-fpm-frr/base_image_files/TS
+++ b/dockers/docker-fpm-frr/base_image_files/TS
@@ -4,17 +4,31 @@
 [ -f /etc/sonic/sonic-environment ] && . /etc/sonic/sonic-environment
 
 PLATFORM=${PLATFORM:-`sonic-cfggen -H -v DEVICE_METADATA.localhost.platform`}
+switch_type=`sonic-db-cli CONFIG_DB hget 'DEVICE_METADATA|localhost' 'switch_type'`
+TSA_CHASSIS_STATE=false
+
+if [[ $switch_type == 'voq' ]]; then
+ TSA_CHASSIS_STATE="$(sonic-db-cli CHASSIS_APP_DB HGET "BGP_DEVICE_GLOBAL|STATE" tsa_enabled)"
+fi
 
 if [[ $1 == "TSA" ]]; then
     TSA_STATE_UPDATE='{"BGP_DEVICE_GLOBAL":{"STATE":{"tsa_enabled": "true"}}}'
-    log_msg='System Mode: Normal -> Maintenance'
+    if [[ $TSA_CHASSIS_STATE == true ]]; then
+        log_msg='System Mode: Maintenance -> Maintenance'
+    else
+        log_msg='System Mode: Normal -> Maintenance'
+    fi
     err_msg='System is already in Maintenance'
-    desired_tsa_state=true 
+    desired_tsa_state=true
 elif [[ $1 == "TSB" ]]; then
     TSA_STATE_UPDATE='{"BGP_DEVICE_GLOBAL":{"STATE":{"tsa_enabled": "false"}}}'
-    log_msg='System Mode: Maintenance -> Normal'
+    if [[ $TSA_CHASSIS_STATE == true ]]; then
+        log_msg='System Mode: Maintenance -> Maintenance'
+    else
+        log_msg='System Mode: Maintenance -> Normal'
+    fi
     err_msg='System is already in Normal mode'
-    desired_tsa_state=false    
+    desired_tsa_state=false
 fi
 
 # Parse the device specific asic conf file, if it exists
diff --git a/dockers/docker-fpm-frr/base_image_files/TSA b/dockers/docker-fpm-frr/base_image_files/TSA
index 4b26b2d43..2cd29e92a 100755
--- a/dockers/docker-fpm-frr/base_image_files/TSA
+++ b/dockers/docker-fpm-frr/base_image_files/TSA
@@ -7,7 +7,18 @@ if [ "$EUID" -ne 0 ] ; then
 fi
 
 if [ -f /etc/sonic/chassisdb.conf ]; then
-  rexec all -c "sudo TSA chassis"
+  CHASSIS_TSA_STATE_UPDATE="CHASSIS_APP_DB HMSET "BGP_DEVICE_GLOBAL\|STATE" tsa_enabled "true""
+  CONFIG_DB_TSA_STATE_UPDATE='{"BGP_DEVICE_GLOBAL":{"STATE":{"tsa_enabled": "true"}}}'
+  current_tsa_state="$(sonic-cfggen -d -v BGP_DEVICE_GLOBAL.STATE.tsa_enabled)"
+  if [[ $current_tsa_state  == true ]]; then
+    echo "Chassis is already in Maintenance"
+    logger -t TSA -p user.info "Chassis is already in Maintenance"
+  else
+    sonic-db-cli $CHASSIS_TSA_STATE_UPDATE
+    sonic-cfggen -a "$CONFIG_DB_TSA_STATE_UPDATE" -w
+    echo "Chassis Mode: Normal -> Maintenance"
+    logger -t TSA -p user.info "Chassis Mode: Normal -> Maintenance"
+  fi
   echo "Please execute \"rexec all -c 'sudo config save -y'\" to preserve System mode in Maintenance after reboot\
   or config reload on all linecards"
   exit 0
diff --git a/dockers/docker-fpm-frr/base_image_files/TSB b/dockers/docker-fpm-frr/base_image_files/TSB
index ec353148a..c09126e1d 100755
--- a/dockers/docker-fpm-frr/base_image_files/TSB
+++ b/dockers/docker-fpm-frr/base_image_files/TSB
@@ -6,11 +6,21 @@ if [ "$EUID" -ne 0 ] ; then
   exit 1
 fi
 
-# If run on supervisor of chassis, trigger remote execution of TSB on all linecards
 if [ -f /etc/sonic/chassisdb.conf ]; then
-  rexec all -c "sudo TSB chassis"
+  CHASSIS_TSA_STATE_UPDATE="CHASSIS_APP_DB HMSET "BGP_DEVICE_GLOBAL\|STATE" tsa_enabled "false""
+  CONFIG_DB_TSA_STATE_UPDATE='{"BGP_DEVICE_GLOBAL":{"STATE":{"tsa_enabled": "false"}}}'
+  current_tsa_state="$(sonic-cfggen -d -v BGP_DEVICE_GLOBAL.STATE.tsa_enabled)"
+  if [[ $current_tsa_state  == false ]]; then
+    echo "Chassis is already in Normal mode"
+    logger -t TSB -p user.info "Chassis is already in Normal mode"
+  else
+    sonic-db-cli $CHASSIS_TSA_STATE_UPDATE
+    sonic-cfggen -a "$CONFIG_DB_TSA_STATE_UPDATE" -w
+    echo "Chassis Mode: Maintenance -> Normal"
+    logger -t TSB -p user.info "Chassis Mode: Maintenance -> Normal"
+  fi
   echo "Please execute \"rexec all -c 'sudo config save -y'\" to preserve System mode in Normal state after reboot\
- or config reload on all linecards"
+  or config reload on all linecards"
   exit 0
 fi
 
diff --git a/files/build_templates/docker_image_ctl.j2 b/files/build_templates/docker_image_ctl.j2
index f0208d32f..36cf32771 100644
--- a/files/build_templates/docker_image_ctl.j2
+++ b/files/build_templates/docker_image_ctl.j2
@@ -269,6 +269,18 @@ function postStartAction()
             $SONIC_DB_CLI CONFIG_DB SET "CONFIG_DB_INITIALIZED" "1"
         fi
 
+        # In SUP, enforce CHASSIS_APP_DB.tsa_enabled to be in sync with BGP_DEVICE_GLOBAL.STATE.tsa_enabled
+        if [[ -z "$DEV" ]] && [[ -f /etc/sonic/chassisdb.conf ]]; then
+           tsa_cfg="$($SONIC_DB_CLI CONFIG_DB HGET "BGP_DEVICE_GLOBAL|STATE" "tsa_enabled")"
+           if [[ -n "$tsa_cfg" ]]; then
+              docker exec -i ${DOCKERNAME} $SONIC_DB_CLI CHASSIS_APP_DB HMSET "BGP_DEVICE_GLOBAL|STATE" tsa_enabled ${tsa_cfg}
+              OP_CODE=$?
+              if [ $OP_CODE -ne 0 ]; then
+                echo "Err: Cmd failed (exit code $OP_CODE). CHASSIS_APP_DB and CONFIG_DB may be incosistent wrt tsa_enabled"
+              fi
+           fi
+        fi
+
         # Add redis UDS to the redis group and give read/write access to the group
         REDIS_SOCK="/var/run/redis${DEV}/redis.sock"
     else
diff --git a/files/image_config/config-setup/config-setup b/files/image_config/config-setup/config-setup
index 21d56217c..a823d8497 100755
--- a/files/image_config/config-setup/config-setup
+++ b/files/image_config/config-setup/config-setup
@@ -330,6 +330,19 @@ do_db_migration()
         /usr/local/bin/db_migrator.py -o migrate
     fi
     sonic-db-cli CONFIG_DB SET "CONFIG_DB_INITIALIZED" "1"
+
+    #Enforce CHASSIS_APP_DB.tsa_enabled to be in sync with BGP_DEVICE_GLOBAL.STATE.tsa_enabled
+    if [[ -f /etc/sonic/chassisdb.conf ]]; then
+       tsa_cfg="$(sonic-db-cli CONFIG_DB HGET "BGP_DEVICE_GLOBAL|STATE" "tsa_enabled")"
+       sonic-db-cli CHASSIS_APP_DB HMSET "BGP_DEVICE_GLOBAL|STATE" tsa_enabled ${tsa_cfg}
+       OP_CODE=$?
+
+       if [ $OP_CODE -ne 0 ]; then
+         err_msg="Cmd failed (exit code $OP_CODE). CHASSIS_APP_DB and CONFIG_DB may be incosistent wrt tsa_enabled."
+         echo "$err_msg"
+         logger -t CHASSIS_APP_DB -p user.info "$err_msg"
+       fi
+    fi
 }
 
 # Perform configuration migration from backup copy.
diff --git a/src/sonic-bgpcfgd/bgpcfgd/main.py b/src/sonic-bgpcfgd/bgpcfgd/main.py
index 624d31103..4b41e6825 100644
--- a/src/sonic-bgpcfgd/bgpcfgd/main.py
+++ b/src/sonic-bgpcfgd/bgpcfgd/main.py
@@ -6,6 +6,7 @@
 import traceback
 
 from swsscommon import swsscommon
+from sonic_py_common import device_info
 
 from .config import ConfigMgr
 from .directory import Directory
@@ -20,6 +21,7 @@
 from .managers_static_rt import StaticRouteMgr
 from .managers_rm import RouteMapMgr
 from .managers_device_global import DeviceGlobalCfgMgr
+from .managers_chassis_app_db import ChassisAppDbMgr
 from .static_rt_timer import StaticRouteTimer
 from .runner import Runner, signal_handler
 from .template import TemplateFabric
@@ -74,6 +76,10 @@ def do_work():
         # Device Global Manager
         DeviceGlobalCfgMgr(common_objs, "CONFIG_DB", swsscommon.CFG_BGP_DEVICE_GLOBAL_TABLE_NAME),
     ]
+
+    if device_info.is_chassis():
+        managers.append(ChassisAppDbMgr(common_objs, "CHASSIS_APP_DB", "BGP_DEVICE_GLOBAL"))
+
     runner = Runner(common_objs['cfg_mgr'])
     for mgr in managers:
         runner.add_manager(mgr)
diff --git a/src/sonic-bgpcfgd/bgpcfgd/managers_chassis_app_db.py b/src/sonic-bgpcfgd/bgpcfgd/managers_chassis_app_db.py
new file mode 100644
index 000000000..7969ae828
--- /dev/null
+++ b/src/sonic-bgpcfgd/bgpcfgd/managers_chassis_app_db.py
@@ -0,0 +1,50 @@
+from .manager import Manager
+from .managers_device_global import DeviceGlobalCfgMgr
+from .log import log_err, log_debug, log_notice
+import re
+from swsscommon import swsscommon
+
+class ChassisAppDbMgr(Manager):
+    """This class responds to change in tsa_enabled state of the supervisor"""
+
+    def __init__(self, common_objs, db, table):
+        """
+        Initialize the object
+        :param common_objs: common object dictionary
+        :param db: name of the db
+        :param table: name of the table in the db
+        """
+        self.lc_tsa = ""
+        self.directory = common_objs['directory']
+        self.dev_cfg_mgr = DeviceGlobalCfgMgr(common_objs, "CONFIG_DB", swsscommon.CFG_BGP_DEVICE_GLOBAL_TABLE_NAME)
+        self.directory.subscribe([("CONFIG_DB", swsscommon.CFG_BGP_DEVICE_GLOBAL_TABLE_NAME, "tsa_enabled"),], self.on_lc_tsa_status_change)
+        super(ChassisAppDbMgr, self).__init__(
+            common_objs,
+            [],
+            db,
+            table,
+        )
+
+    def on_lc_tsa_status_change(self):
+        if self.directory.path_exist("CONFIG_DB", swsscommon.CFG_BGP_DEVICE_GLOBAL_TABLE_NAME, "tsa_enabled"):
+            self.lc_tsa = self.directory.get_slot("CONFIG_DB", swsscommon.CFG_BGP_DEVICE_GLOBAL_TABLE_NAME)["tsa_enabled"]
+        log_debug("ChassisAppDbMgr:: LC TSA update handler status %s" % self.lc_tsa)
+
+    def set_handler(self, key, data):
+        log_debug("ChassisAppDbMgr:: set handler")
+
+        if not data:
+            log_err("ChassisAppDbMgr:: data is None")
+            return False
+
+        if "tsa_enabled" in data:
+            if self.lc_tsa == "false":
+                self.dev_cfg_mgr.cfg_mgr.commit()
+                self.dev_cfg_mgr.cfg_mgr.update()
+                self.dev_cfg_mgr.isolate_unisolate_device(data["tsa_enabled"])
+            return True
+        return False
+
+    def del_handler(self, key):
+        log_debug("ChassisAppDbMgr:: del handler")
+        return True
diff --git a/src/sonic-bgpcfgd/bgpcfgd/managers_device_global.py b/src/sonic-bgpcfgd/bgpcfgd/managers_device_global.py
index 1943dfa5d..26c0a1ee6 100644
--- a/src/sonic-bgpcfgd/bgpcfgd/managers_device_global.py
+++ b/src/sonic-bgpcfgd/bgpcfgd/managers_device_global.py
@@ -4,6 +4,7 @@
 from .manager import Manager
 from .log import log_err, log_debug, log_notice
 from swsscommon import swsscommon
+from sonic_py_common import device_info
 
 class DeviceGlobalCfgMgr(Manager):
     """This class responds to change in device-specific state"""
@@ -20,6 +21,7 @@ def __init__(self, common_objs, db, table):
         :param table: name of the table in the db
         """
         self.switch_type = ""
+        self.chassis_tsa = ""
         self.directory = common_objs['directory']
         self.cfg_mgr = common_objs['cfg_mgr']
         self.constants = common_objs['constants']
@@ -97,11 +99,16 @@ def configure_tsa(self, data=None):
             if "tsa_enabled" in data:
                 state = data["tsa_enabled"]
 
-        if self.is_update_required("tsa_enabled", state):
+        self.chassis_tsa = self.get_chassis_tsa_status()
+        requires_update = self.is_update_required("tsa_enabled", state)
+
+        if state in ["true", "false"] and self.directory.path_exist(self.db_name, self.table_name, "tsa_enabled"):
+            self.directory.put(self.db_name, self.table_name, "tsa_enabled", state)
+
+        if requires_update and self.chassis_tsa == "false":
             self.cfg_mgr.commit()
             self.cfg_mgr.update()
-            if self.isolate_unisolate_device(state):
-                self.directory.put(self.db_name, self.table_name, "tsa_enabled", state)
+            self.isolate_unisolate_device(state)
         else:
             log_notice("DeviceGlobalCfgMgr:: TSA configuration is up-to-date")
 
@@ -167,7 +174,9 @@ def check_state_and_get_tsa_routemaps(self, cfg):
         cmd = ""
         if self.directory.path_exist("CONFIG_DB", swsscommon.CFG_BGP_DEVICE_GLOBAL_TABLE_NAME, "tsa_enabled"):
             tsa_status = self.directory.get_slot("CONFIG_DB", swsscommon.CFG_BGP_DEVICE_GLOBAL_TABLE_NAME)["tsa_enabled"]
-            if tsa_status == "true":
+            chassis_tsa = self.get_chassis_tsa_status()
+
+            if tsa_status == "true" or chassis_tsa == "true":
                 cmds = cfg.replace("#012", "\n").split("\n")
                 log_notice("DeviceGlobalCfgMgr:: Device is isolated. Applying TSA route-maps")
                 cmd = self.get_ts_routemaps(cmds, self.tsa_template)
@@ -228,6 +237,21 @@ def __extract_out_route_map_names(self, cmds):
                 route_map_names.add(result.group(1))
         return route_map_names
 
+    def get_chassis_tsa_status(self):
+        chassis_tsa_status = "false"
+
+        if not device_info.is_chassis():
+            return chassis_tsa_status
+
+        try:
+            ch = swsscommon.SonicV2Connector(use_unix_socket_path=False)
+            ch.connect(ch.CHASSIS_APP_DB, False)
+            chassis_tsa_status = ch.get(ch.CHASSIS_APP_DB, "BGP_DEVICE_GLOBAL|STATE", 'tsa_enabled')
+        except Exception as e:
+            log_err("Got an exception {}".format(e))
+
+        return chassis_tsa_status
+
     def downstream_isolate_unisolate(self, idf_isolation_state):
         """ API to apply IDF configuration """
 
diff --git a/src/sonic-bgpcfgd/bgpcfgd/runner.py b/src/sonic-bgpcfgd/bgpcfgd/runner.py
index 4c160e596..75df6f902 100644
--- a/src/sonic-bgpcfgd/bgpcfgd/runner.py
+++ b/src/sonic-bgpcfgd/bgpcfgd/runner.py
@@ -39,7 +39,10 @@ def add_manager(self, manager):
         table_name = manager.get_table_name()
         db = swsscommon.SonicDBConfig.getDbId(db_name)
         if db not in self.db_connectors:
-            self.db_connectors[db] = swsscommon.DBConnector(db_name, 0)
+            if db_name == "CHASSIS_APP_DB":
+                self.db_connectors[db] = swsscommon.DBConnector(db_name, 0, True, '')
+            else:
+                self.db_connectors[db] = swsscommon.DBConnector(db_name, 0)
 
         if table_name not in self.callbacks[db]:
             conn = self.db_connectors[db]
diff --git a/src/sonic-bgpcfgd/tests/test_chassis_app_db.py b/src/sonic-bgpcfgd/tests/test_chassis_app_db.py
new file mode 100644
index 000000000..edb08595a
--- /dev/null
+++ b/src/sonic-bgpcfgd/tests/test_chassis_app_db.py
@@ -0,0 +1,142 @@
+from unittest.mock import MagicMock, patch
+
+import os
+from bgpcfgd.directory import Directory
+from bgpcfgd.template import TemplateFabric
+from . import swsscommon_test
+from .util import load_constants
+import bgpcfgd.managers_chassis_app_db
+import bgpcfgd.managers_device_global
+from swsscommon import swsscommon
+from copy import deepcopy
+
+TEMPLATE_PATH = os.path.abspath('../../dockers/docker-fpm-frr/frr')
+BASE_PATH = os.path.abspath('../sonic-bgpcfgd/tests/data/general/peer-group.conf/')
+INTERNAL_BASE_PATH = os.path.abspath('../sonic-bgpcfgd/tests/data/internal/peer-group.conf/')
+global_constants = {
+    "bgp":  {
+        "traffic_shift_community" :"12345:12345",
+        "internal_community_match_tag" : "1001"
+    }
+}
+
+def constructor(check_internal=False):
+    cfg_mgr = MagicMock()
+    def get_text():
+        text = []
+        for line in cfg_mgr.changes.split('\n'):
+            if line.lstrip().startswith('!'):
+                continue
+            text.append(line)
+        text += ["     "]
+        return text
+    def update():
+        if check_internal:
+            cfg_mgr.changes = get_string_from_file("/result_chasiss_packet.conf", INTERNAL_BASE_PATH)
+        else:
+            cfg_mgr.changes = get_string_from_file("/result_all.conf")
+    def push(cfg):
+        cfg_mgr.changes += cfg + "\n"
+    def get_config():
+        return cfg_mgr.changes
+    cfg_mgr.get_text = get_text
+    cfg_mgr.update = update
+    cfg_mgr.push = push
+    cfg_mgr.get_config = get_config
+
+    constants = deepcopy(global_constants)
+    common_objs = {
+        'directory': Directory(),
+        'cfg_mgr':   cfg_mgr,
+        'tf':        TemplateFabric(TEMPLATE_PATH),
+        'constants': constants
+    }
+    mgr = bgpcfgd.managers_chassis_app_db.ChassisAppDbMgr(common_objs, "CHASSIS_APP_DB", "BGP_DEVICE_GLOBAL")
+    cfg_mgr.update()
+    return mgr
+
+
+@patch('bgpcfgd.managers_device_global.log_debug')
+def test_isolate_device(mocked_log_info):
+    m = constructor()
+
+    m.lc_tsa = "false"
+    res = m.set_handler("STATE", {"tsa_enabled": "true"})
+    assert res, "Expect True return value for set_handler"
+    mocked_log_info.assert_called_with("DeviceGlobalCfgMgr::Done")
+    assert m.cfg_mgr.get_config() == get_string_from_file("/result_all_isolate.conf")
+
+    curr_cfg = m.cfg_mgr.get_config()
+    m.lc_tsa = "true"
+    res = m.set_handler("STATE", {"tsa_enabled": "true"})
+    assert res, "Expect True return value for set_handler"
+    assert m.cfg_mgr.get_config() == curr_cfg
+
+@patch('bgpcfgd.managers_device_global.log_debug')
+def test_isolate_device_internal_session(mocked_log_info):
+    m = constructor(check_internal=True)
+
+    m.lc_tsa = "false"
+    res = m.set_handler("STATE", {"tsa_enabled": "true"})
+    assert res, "Expect True return value for set_handler"
+    mocked_log_info.assert_called_with("DeviceGlobalCfgMgr::Done")
+    assert m.cfg_mgr.get_config() == get_string_from_file("/result_chassis_packet_isolate.conf", INTERNAL_BASE_PATH)
+
+    curr_cfg = m.cfg_mgr.get_config()
+    m.lc_tsa = "true"
+    res = m.set_handler("STATE", {"tsa_enabled": "true"})
+    assert res, "Expect True return value for set_handler"
+    assert m.cfg_mgr.get_config() == curr_cfg
+
+
+@patch('bgpcfgd.managers_device_global.log_debug')
+def test_unisolate_device(mocked_log_info):
+    m = constructor()
+
+    m.lc_tsa = "false"
+    res = m.set_handler("STATE", {"tsa_enabled": "false"})
+    assert res, "Expect True return value for set_handler"
+    mocked_log_info.assert_called_with("DeviceGlobalCfgMgr::Done")
+    assert m.cfg_mgr.get_config() == get_string_from_file("/result_all_unisolate.conf")
+
+    curr_cfg = m.cfg_mgr.get_config()
+    m.lc_tsa = "true"
+    res = m.set_handler("STATE", {"tsa_enabled": "false"})
+    assert res, "Expect True return value for set_handler"
+    assert m.cfg_mgr.get_config() == curr_cfg
+
+@patch('bgpcfgd.managers_device_global.log_debug')
+def test_unisolate_device_internal_session(mocked_log_info):
+    m = constructor(check_internal=True)
+
+    m.lc_tsa = "false"
+    res = m.set_handler("STATE", {"tsa_enabled": "false"})
+    assert res, "Expect True return value for set_handler"
+    mocked_log_info.assert_called_with("DeviceGlobalCfgMgr::Done")
+    assert m.cfg_mgr.get_config() == get_string_from_file("/result_chassis_packet_unisolate.conf", INTERNAL_BASE_PATH)
+
+    curr_cfg = m.cfg_mgr.get_config()
+    m.lc_tsa = "true"
+    res = m.set_handler("STATE", {"tsa_enabled": "false"})
+    assert res, "Expect True return value for set_handler"
+    assert m.cfg_mgr.get_config() == curr_cfg
+
+
+def get_string_from_file(filename, base_path=BASE_PATH):
+    fp = open(base_path + filename, "r")
+    cfg = fp.read()
+    fp.close()
+
+    return cfg
+
+@patch('bgpcfgd.managers_chassis_app_db.log_err')
+def test_set_handler_failure_case(mocked_log_info):
+    m = constructor()
+    res = m.set_handler("STATE", {})
+    assert res == False, "Expect False return value for invalid data passed to set_handler"
+    mocked_log_info.assert_called_with("ChassisAppDbMgr:: data is None")
+
+def test_del_handler():
+    m = constructor()
+    res = m.del_handler("STATE")
+    assert res, "Expect True return value for del_handler"
diff --git a/src/sonic-bgpcfgd/tests/test_device_global.py b/src/sonic-bgpcfgd/tests/test_device_global.py
index fc1c5e702..60c791bf5 100644
--- a/src/sonic-bgpcfgd/tests/test_device_global.py
+++ b/src/sonic-bgpcfgd/tests/test_device_global.py
@@ -68,52 +68,111 @@ def get_config():
 # TSA -----------------------------------------------------------------------------------------------------------------
 #
 
+@patch('bgpcfgd.managers_device_global.DeviceGlobalCfgMgr.get_chassis_tsa_status')
 @patch('bgpcfgd.managers_device_global.log_debug')
-def test_isolate_device(mocked_log_info):
+def test_isolate_device(mocked_log_info, mock_get_chassis_tsa_status):
     m = constructor()
+
+    mock_get_chassis_tsa_status.return_value = "false"
     res = m.set_handler("STATE", {"tsa_enabled": "true"})
     assert res, "Expect True return value for set_handler"
     mocked_log_info.assert_called_with("DeviceGlobalCfgMgr::Done")
     assert m.cfg_mgr.get_config() == get_string_from_file("/result_all_isolate.conf")
 
+    curr_cfg = m.cfg_mgr.get_config()
+    mock_get_chassis_tsa_status.return_value = "true"
+    res = m.set_handler("STATE", {"tsa_enabled": "true"})
+    assert res, "Expect True return value for set_handler"
+    assert m.cfg_mgr.get_config() == curr_cfg
+
+
+@patch('bgpcfgd.managers_device_global.DeviceGlobalCfgMgr.get_chassis_tsa_status')
 @patch('bgpcfgd.managers_device_global.log_debug')
-def test_isolate_device_internal_session(mocked_log_info):
+def test_isolate_device_internal_session(mocked_log_info, mock_get_chassis_tsa_status):
     m = constructor(check_internal=True)
+
+    mock_get_chassis_tsa_status.return_value = "false"
     res = m.set_handler("STATE", {"tsa_enabled": "true"})
     assert res, "Expect True return value for set_handler"
     mocked_log_info.assert_called_with("DeviceGlobalCfgMgr::Done")
     assert m.cfg_mgr.get_config() == get_string_from_file("/result_chassis_packet_isolate.conf", INTERNAL_BASE_PATH)
 
+    curr_cfg = m.cfg_mgr.get_config()
+    mock_get_chassis_tsa_status.return_value = "true"
+    res = m.set_handler("STATE", {"tsa_enabled": "true"})
+    assert res, "Expect True return value for set_handler"
+    assert m.cfg_mgr.get_config() == curr_cfg
+
+
+@patch('bgpcfgd.managers_device_global.DeviceGlobalCfgMgr.get_chassis_tsa_status')
 @patch('bgpcfgd.managers_device_global.log_debug')
-def test_unisolate_device(mocked_log_info):
+def test_unisolate_device(mocked_log_info, mock_get_chassis_tsa_status):
     m = constructor()
+
+    mock_get_chassis_tsa_status.return_value = "false"
+
     # By default feature is disabled. Simulate enabled state
     m.directory.put(m.db_name, m.table_name, "tsa_enabled", "true")
+
     res = m.set_handler("STATE", {"tsa_enabled": "false"})
     assert res, "Expect True return value for set_handler"
     mocked_log_info.assert_called_with("DeviceGlobalCfgMgr::Done")
     assert m.cfg_mgr.get_config() == get_string_from_file("/result_all_unisolate.conf")
 
+    curr_cfg = m.cfg_mgr.get_config()
+    mock_get_chassis_tsa_status.return_value = "true"
+    res = m.set_handler("STATE", {"tsa_enabled": "false"})
+    assert res, "Expect True return value for set_handler"
+    assert m.cfg_mgr.get_config() == curr_cfg
+
+
+@patch('bgpcfgd.managers_device_global.DeviceGlobalCfgMgr.get_chassis_tsa_status')
 @patch('bgpcfgd.managers_device_global.log_debug')
-def test_unisolate_device_internal_session(mocked_log_info):
+def test_unisolate_device_internal_session(mocked_log_info, mock_get_chassis_tsa_status):
     m = constructor(check_internal=True)
+
+    mock_get_chassis_tsa_status.return_value = "false"
+
     # By default feature is disabled. Simulate enabled state
     m.directory.put(m.db_name, m.table_name, "tsa_enabled", "true")
+
     res = m.set_handler("STATE", {"tsa_enabled": "false"})
     assert res, "Expect True return value for set_handler"
     mocked_log_info.assert_called_with("DeviceGlobalCfgMgr::Done")
     assert m.cfg_mgr.get_config() == get_string_from_file("/result_chassis_packet_unisolate.conf", INTERNAL_BASE_PATH)
 
-def test_check_state_and_get_tsa_routemaps():
+    curr_cfg = m.cfg_mgr.get_config()
+    mock_get_chassis_tsa_status.return_value = "true"
+    res = m.set_handler("STATE", {"tsa_enabled": "false"})
+    assert res, "Expect True return value for set_handler"
+    assert m.cfg_mgr.get_config() == curr_cfg
+
+
+@patch('bgpcfgd.managers_device_global.DeviceGlobalCfgMgr.get_chassis_tsa_status')
+def test_check_state_and_get_tsa_routemaps(mock_get_chassis_tsa_status):
     m = constructor()
+
+    mock_get_chassis_tsa_status.return_value = "false"
     m.set_handler("STATE", {"tsa_enabled": "true"})
     res = m.check_state_and_get_tsa_routemaps(m.cfg_mgr.get_config())
     assert res == get_string_from_file("/result_isolate.conf")
 
+    mock_get_chassis_tsa_status.return_value = "true"
+    m.set_handler("STATE", {"tsa_enabled": "true"})
+    res = m.check_state_and_get_tsa_routemaps(m.cfg_mgr.get_config())
+    assert res == get_string_from_file("/result_isolate.conf")
+
+    mock_get_chassis_tsa_status.return_value = "false"
     m.set_handler("STATE", {"tsa_enabled": "false"})
     res = m.check_state_and_get_tsa_routemaps(m.cfg_mgr.get_config())
     assert res == ""
 
+    mock_get_chassis_tsa_status.return_value = "true"
+    m.set_handler("STATE", {"tsa_enabled": "false"})
+    res = m.check_state_and_get_tsa_routemaps(m.cfg_mgr.get_config())
+    assert res == get_string_from_file("/result_isolate.conf")
+
+
 def test_get_tsa_routemaps():
     m = constructor()
     assert m.get_ts_routemaps([], m.tsa_template) == ""
@@ -153,9 +212,11 @@ def test_del_handler():
     "value", [ "invalid_value" ]
 )
 @patch('bgpcfgd.managers_device_global.log_err')
-def test_tsa_neg(mocked_log_err, value):
+@patch('bgpcfgd.managers_device_global.DeviceGlobalCfgMgr.get_chassis_tsa_status')
+def test_tsa_neg(mock_get_chassis_tsa_status, mocked_log_err, value):
     m = constructor()
     m.cfg_mgr.changes = ""
+    mock_get_chassis_tsa_status.return_value = "false"
     res = m.set_handler("STATE", {"tsa_enabled": value})
     assert res, "Expect True return value for set_handler"
     mocked_log_err.assert_called_with("TSA: invalid value({}) is provided".format(value))

From 2d4f3f8d36f4968a105d1607c32dca10cdcb0f38 Mon Sep 17 00:00:00 2001
From: Oleksandr Ivantsiv <oivantsiv@nvidia.com>
Date: Fri, 21 Jun 2024 09:38:15 -0700
Subject: [PATCH 0760/1115] [dhcp_server] Fix the issue with "kea-dhcp4.conf"
 file generation for Smart Switch. (#19200)

The configuration generated from the template for the Smart Switch contained incorrect data in the "subnet4:id" field. For regular cases, the subnet ID is deduced from the VLAN name. For the Smart Switch, there is always one subnet, and the ID is set to 0.
---
 .../dhcp_utilities/dhcpservd/dhcp_cfggen.py   |  8 ++--
 .../dhcp_utilities/dhcpservd/dhcp_lease.py    | 16 ++++++-
 .../tests/test_data/kea-dhcp4.conf.j2         |  1 +
 .../test_data/kea-lease_smart_switch.csv      |  5 ++
 .../tests/test_dhcp_cfggen.py                 |  1 +
 .../tests/test_dhcp_lease.py                  | 46 ++++++++++---------
 .../tests/test_dhcpservd.py                   |  5 +-
 .../tests/test_smart_switch.py                | 35 ++++++++++++++
 8 files changed, 90 insertions(+), 27 deletions(-)
 create mode 100644 src/sonic-dhcp-utilities/tests/test_data/kea-lease_smart_switch.csv

diff --git a/src/sonic-dhcp-utilities/dhcp_utilities/dhcpservd/dhcp_cfggen.py b/src/sonic-dhcp-utilities/dhcp_utilities/dhcpservd/dhcp_cfggen.py
index eb7ae34d8..c41e61d5f 100755
--- a/src/sonic-dhcp-utilities/dhcp_utilities/dhcpservd/dhcp_cfggen.py
+++ b/src/sonic-dhcp-utilities/dhcp_utilities/dhcpservd/dhcp_cfggen.py
@@ -16,6 +16,7 @@
 VLAN_MEMBER = "VLAN_MEMBER"
 DPUS = "DPUS"
 MID_PLANE_BRIDGE = "MID_PLANE_BRIDGE"
+MID_PLANE_BRIDGE_SUBNET_ID = 10000
 PORT_MODE_CHECKER = ["DhcpServerTableCfgChangeEventChecker", "DhcpPortTableEventChecker", "DhcpRangeTableEventChecker",
                      "DhcpOptionTableEventChecker", "VlanTableEventChecker", "VlanIntfTableEventChecker",
                      "VlanMemberTableEventChecker"]
@@ -90,7 +91,7 @@ def generate(self):
         port_ips, used_ranges = self._parse_port(port_ipv4, dhcp_interfaces, dhcp_members, ranges)
         customized_options = self._parse_customized_options(customized_options_ipv4)
         render_obj, enabled_dhcp_interfaces, used_options, subscribe_table = \
-            self._construct_obj_for_template(dhcp_server_ipv4, port_ips, hostname, customized_options)
+            self._construct_obj_for_template(dhcp_server_ipv4, port_ips, hostname, customized_options, smart_switch)
 
         if smart_switch:
             subscribe_table |= set(SMART_SWITCH_CHECKER)
@@ -175,7 +176,7 @@ def _parse_port_map_alias(self):
         for pc_name in pc_table.keys():
             self.port_alias_map[pc_name] = pc_name
 
-    def _construct_obj_for_template(self, dhcp_server_ipv4, port_ips, hostname, customized_options):
+    def _construct_obj_for_template(self, dhcp_server_ipv4, port_ips, hostname, customized_options, smart_switch=False):
         subnets = []
         client_classes = []
         enabled_dhcp_interfaces = set()
@@ -223,8 +224,9 @@ def _construct_obj_for_template(self, dhcp_server_ipv4, port_ips, hostname, cust
                                 "condition": "substring(relay4[1].hex, -{}, {}) == '{}'".format(class_len, class_len,
                                                                                                 client_class)
                             })
+
                     subnet_obj = {
-                        "id": dhcp_interface_name.replace("Vlan", ""),
+                        "id": MID_PLANE_BRIDGE_SUBNET_ID if smart_switch else dhcp_interface_name.replace("Vlan", ""),
                         "subnet": str(ipaddress.ip_network(dhcp_interface_ip, strict=False)),
                         "pools": pools,
                         "gateway": dhcp_config["gateway"],
diff --git a/src/sonic-dhcp-utilities/dhcp_utilities/dhcpservd/dhcp_lease.py b/src/sonic-dhcp-utilities/dhcp_utilities/dhcpservd/dhcp_lease.py
index 6dda76728..e2e95fb7b 100644
--- a/src/sonic-dhcp-utilities/dhcp_utilities/dhcpservd/dhcp_lease.py
+++ b/src/sonic-dhcp-utilities/dhcp_utilities/dhcpservd/dhcp_lease.py
@@ -5,6 +5,7 @@
 from abc import abstractmethod
 from collections import deque
 from datetime import datetime
+from dhcp_utilities.common.utils import is_smart_switch
 
 DHCP_SERVER_IPV4_LEASE = "DHCP_SERVER_IPV4_LEASE"
 KEA_LEASE_FILE_PATH = "/tmp/kea-lease.csv"
@@ -29,6 +30,13 @@ def __init__(self, db_connector, lease_update_interval=DEFAULE_LEASE_UPDATE_INTE
         self.lease_update_interval = lease_update_interval
         self.last_update_time = None
         self.lock = threading.Lock()
+        device_metadata = self.db_connector.get_config_db_table("DEVICE_METADATA")
+        self.is_smart_switch = is_smart_switch(device_metadata)
+
+        if self.is_smart_switch:
+            mid_plane_table = self.db_connector.get_config_db_table("MID_PLANE_BRIDGE")
+            if "GLOBAL" in mid_plane_table and mid_plane_table["GLOBAL"]:
+                self.midplane_bridge_name = mid_plane_table["GLOBAL"]["bridge"]
 
     @abstractmethod
     def _read(self):
@@ -97,6 +105,12 @@ def register(self):
         """
         signal.signal(signal.SIGUSR1, self._update_lease)
 
+    def _lease_key(self, subnet_id, mac_address):
+        if self.is_smart_switch:
+            return f"{self.midplane_bridge_name}|{mac_address}"
+        else:
+            return f"Vlan{subnet_id}|{mac_address}"
+
     def _read(self):
         # Read lease file generated by kea-dhcp4
         try:
@@ -120,7 +134,7 @@ def _read(self):
             lease_end = splits[4]
             subnet_id = splits[5]
 
-            new_key = "{}|{}".format("Vlan" + subnet_id, mac_address)
+            new_key = self._lease_key(subnet_id, mac_address)
             if new_key in new_lease:
                 continue
             new_lease[new_key] = {
diff --git a/src/sonic-dhcp-utilities/tests/test_data/kea-dhcp4.conf.j2 b/src/sonic-dhcp-utilities/tests/test_data/kea-dhcp4.conf.j2
index 082cbca14..f5f7a9b05 100644
--- a/src/sonic-dhcp-utilities/tests/test_data/kea-dhcp4.conf.j2
+++ b/src/sonic-dhcp-utilities/tests/test_data/kea-dhcp4.conf.j2
@@ -42,6 +42,7 @@
     {%- if add_subnet_preceding_comma.flag -%},{%- endif -%}
     {%- set _dummy = add_subnet_preceding_comma.update({'flag': True}) %}
             {
+                "id": {{ subnet_info["id"] }},
                 "subnet": "{{ subnet_info["subnet"] }}",
                 "pools": [
     {%- set add_pool_preceding_comma = { 'flag': False } %}
diff --git a/src/sonic-dhcp-utilities/tests/test_data/kea-lease_smart_switch.csv b/src/sonic-dhcp-utilities/tests/test_data/kea-lease_smart_switch.csv
new file mode 100644
index 000000000..ea7d4ed2c
--- /dev/null
+++ b/src/sonic-dhcp-utilities/tests/test_data/kea-lease_smart_switch.csv
@@ -0,0 +1,5 @@
+address,hwaddr,client_id,valid_lifetime,expire,subnet_id,fqdn_fwd,fqdn_rev,hostname,state,user_context
+169.254.200.4,aa:bb:cc:dd:ff:04,,900,1718053209,10000,0,0,sonic,0,
+169.254.200.1,aa:bb:cc:dd:ff:01,,900,1718053209,10000,0,0,sonic,0,
+169.254.200.3,aa:bb:cc:dd:ff:03,,900,1718053210,10000,0,0,sonic,0,
+169.254.200.2,aa:bb:cc:dd:ff:02,,900,1718053210,10000,0,0,sonic,0,
\ No newline at end of file
diff --git a/src/sonic-dhcp-utilities/tests/test_dhcp_cfggen.py b/src/sonic-dhcp-utilities/tests/test_dhcp_cfggen.py
index 723731839..3548e39c1 100644
--- a/src/sonic-dhcp-utilities/tests/test_dhcp_cfggen.py
+++ b/src/sonic-dhcp-utilities/tests/test_dhcp_cfggen.py
@@ -42,6 +42,7 @@
         },
         "subnet4": [
             {
+                "id": 1000,
                 "subnet": "192.168.0.0/21",
                 "pools": [
                     {
diff --git a/src/sonic-dhcp-utilities/tests/test_dhcp_lease.py b/src/sonic-dhcp-utilities/tests/test_dhcp_lease.py
index a831b2ad5..04009d2ee 100644
--- a/src/sonic-dhcp-utilities/tests/test_dhcp_lease.py
+++ b/src/sonic-dhcp-utilities/tests/test_dhcp_lease.py
@@ -3,6 +3,7 @@
 from freezegun import freeze_time
 from swsscommon import swsscommon
 from unittest.mock import patch, call, MagicMock
+from common_utils import mock_get_config_db_table
 
 expected_lease = {
     "Vlan1000|10:70:fd:b6:13:00": {
@@ -34,20 +35,22 @@
 
 
 def test_read_kea_lease_with_file_not_found(mock_swsscommon_dbconnector_init):
-    db_connector = DhcpDbConnector()
-    kea_lease_handler = KeaDhcp4LeaseHandler(db_connector)
-    try:
-        kea_lease_handler._read()
-    except FileNotFoundError:
-        pass
+    with patch.object(DhcpDbConnector, "get_config_db_table", side_effect=mock_get_config_db_table):
+        db_connector = DhcpDbConnector()
+        kea_lease_handler = KeaDhcp4LeaseHandler(db_connector)
+        try:
+            kea_lease_handler._read()
+        except FileNotFoundError:
+            pass
 
 
 def test_read_kea_lease(mock_swsscommon_dbconnector_init):
-    db_connector = DhcpDbConnector()
-    kea_lease_handler = KeaDhcp4LeaseHandler(db_connector, lease_file="tests/test_data/kea-lease.csv")
-    # Verify whether lease information read is as expected
-    lease = kea_lease_handler._read()
-    assert lease == expected_lease
+    with patch.object(DhcpDbConnector, "get_config_db_table", side_effect=mock_get_config_db_table):
+        db_connector = DhcpDbConnector()
+        kea_lease_handler = KeaDhcp4LeaseHandler(db_connector, lease_file="tests/test_data/kea-lease.csv")
+        # Verify whether lease information read is as expected
+        lease = kea_lease_handler._read()
+        assert lease == expected_lease
 
 
 # Cannot mock built-in/extension type function(datetime.datetime.timestamp), need to free time
@@ -88,13 +91,14 @@ def test_update_kea_lease(mock_swsscommon_dbconnector_init, mock_swsscommon_tabl
 
 
 def test_no_implement(mock_swsscommon_dbconnector_init):
-    db_connector = DhcpDbConnector()
-    lease_handler = LeaseHanlder(db_connector)
-    try:
-        lease_handler._read()
-    except NotImplementedError:
-        pass
-    try:
-        lease_handler.register()
-    except NotImplementedError:
-        pass
+    with patch.object(DhcpDbConnector, "get_config_db_table", side_effect=mock_get_config_db_table):
+        db_connector = DhcpDbConnector()
+        lease_handler = LeaseHanlder(db_connector)
+        try:
+            lease_handler._read()
+        except NotImplementedError:
+            pass
+        try:
+            lease_handler.register()
+        except NotImplementedError:
+            pass
diff --git a/src/sonic-dhcp-utilities/tests/test_dhcpservd.py b/src/sonic-dhcp-utilities/tests/test_dhcpservd.py
index f11ffdbba..4c8175b7e 100644
--- a/src/sonic-dhcp-utilities/tests/test_dhcpservd.py
+++ b/src/sonic-dhcp-utilities/tests/test_dhcpservd.py
@@ -4,7 +4,7 @@
 import signal
 import sys
 import time
-from common_utils import MockProc
+from common_utils import MockProc, mock_get_config_db_table
 from dhcp_utilities.common.utils import DhcpDbConnector
 from dhcp_utilities.common.dhcp_db_monitor import DhcpServdDbMonitor
 from dhcp_utilities.dhcpservd.dhcp_cfggen import DhcpServCfgGenerator
@@ -110,7 +110,8 @@ def test_update_dhcp_server_ip(mock_swsscommon_dbconnector_init, mock_parse_port
 def test_start(mock_swsscommon_dbconnector_init, mock_parse_port_map_alias, mock_get_render_template):
     with patch.object(DhcpServd, "dump_dhcp4_config") as mock_dump, \
          patch.object(DhcpServd, "_update_dhcp_server_ip") as mock_update_dhcp_server_ip, \
-         patch.object(DhcpServdDbMonitor, "enable_checkers"):
+         patch.object(DhcpServdDbMonitor, "enable_checkers"), \
+         patch.object(DhcpDbConnector, "get_config_db_table", side_effect=mock_get_config_db_table):
         dhcp_db_connector = DhcpDbConnector()
         dhcp_cfg_generator = DhcpServCfgGenerator(dhcp_db_connector, "/usr/local/lib/kea/hooks/libdhcp_run_script.so")
         dhcpservd = DhcpServd(dhcp_cfg_generator, dhcp_db_connector, MagicMock())
diff --git a/src/sonic-dhcp-utilities/tests/test_smart_switch.py b/src/sonic-dhcp-utilities/tests/test_smart_switch.py
index 0347d5df2..a5c6be2fd 100644
--- a/src/sonic-dhcp-utilities/tests/test_smart_switch.py
+++ b/src/sonic-dhcp-utilities/tests/test_smart_switch.py
@@ -1,6 +1,7 @@
 import json
 import pytest
 from common_utils import MockConfigDb, dhcprelayd_refresh_dhcrelay_test, dhcprelayd_proceed_with_check_res_test
+from dhcp_utilities.dhcpservd.dhcp_lease import KeaDhcp4LeaseHandler
 from dhcp_utilities.dhcprelayd.dhcprelayd import DHCP_SERVER_CHECKER, MID_PLANE_CHECKER
 from dhcp_utilities.dhcpservd.dhcp_cfggen import DhcpServCfgGenerator
 from dhcp_utilities.common.utils import DhcpDbConnector
@@ -35,6 +36,7 @@
         },
         "subnet4": [
             {
+                "id": 10000,
                 "subnet": "169.254.200.0/24",
                 "pools": [
                     {
@@ -103,6 +105,30 @@
 }
 
 
+expected_lease = {
+    'bridge_midplane|aa:bb:cc:dd:ff:01': {
+        'ip': '169.254.200.1',
+        'lease_end': '1718053209',
+        'lease_start': '1718052309'
+    },
+    'bridge_midplane|aa:bb:cc:dd:ff:02': {
+        'ip': '169.254.200.2',
+        'lease_end': '1718053210',
+        'lease_start': '1718052310'
+    },
+    'bridge_midplane|aa:bb:cc:dd:ff:03': {
+        'ip': '169.254.200.3',
+        'lease_end': '1718053210',
+        'lease_start': '1718052310'
+    },
+   'bridge_midplane|aa:bb:cc:dd:ff:04': {
+       'ip': '169.254.200.4',
+       'lease_end': '1718053209',
+       'lease_start': '1718052309'
+    }
+}
+
+
 def test_dhcprelayd_refresh_dhcrelay(mock_swsscommon_dbconnector_init):
     expected_checkers = set(["MidPlaneTableEventChecker"])
     dhcprelayd_refresh_dhcrelay_test(expected_checkers, True, mock_get_config_db_table)
@@ -140,3 +166,12 @@ def test_dhcp_dhcp_cfggen_generate(mock_swsscommon_dbconnector_init, mock_parse_
 def mock_get_config_db_table(table_name):
     mock_config_db = MockConfigDb(MOCK_CONFIG_DB_PATH_SMART_SWITCH)
     return mock_config_db.get_config_db_table(table_name)
+
+
+def test_read_kea_lease(mock_swsscommon_dbconnector_init):
+    with patch.object(DhcpDbConnector, "get_config_db_table", side_effect=mock_get_config_db_table):
+        db_connector = DhcpDbConnector()
+        kea_lease_handler = KeaDhcp4LeaseHandler(db_connector, lease_file="tests/test_data/kea-lease_smart_switch.csv")
+        # Verify whether lease information read is as expected
+        lease = kea_lease_handler._read()
+        assert lease == expected_lease

From 1e4789b289234526972d449d41622361704b94ad Mon Sep 17 00:00:00 2001
From: Stephen Sun <5379172+stephenxs@users.noreply.github.com>
Date: Mon, 24 Jun 2024 09:39:02 +0800
Subject: [PATCH 0761/1115] Create counters only for configured buffer objects
 on 5400 (#19152)

Signed-off-by: Stephen Sun <stephens@nvidia.com>
---
 .../ACS-SN5400/create_only_config_db_buffers.json          | 7 +++++++
 1 file changed, 7 insertions(+)
 create mode 100644 device/mellanox/x86_64-nvidia_sn5400-r0/ACS-SN5400/create_only_config_db_buffers.json

diff --git a/device/mellanox/x86_64-nvidia_sn5400-r0/ACS-SN5400/create_only_config_db_buffers.json b/device/mellanox/x86_64-nvidia_sn5400-r0/ACS-SN5400/create_only_config_db_buffers.json
new file mode 100644
index 000000000..6feb15671
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5400-r0/ACS-SN5400/create_only_config_db_buffers.json
@@ -0,0 +1,7 @@
+{
+    "DEVICE_METADATA": {
+        "localhost": {
+            "create_only_config_db_buffers": "true"
+        }
+    }
+}

From 63c78c2f0db4f382bec337b380aafd8d164080f0 Mon Sep 17 00:00:00 2001
From: Nonodark Huang <ef67891@yahoo.com.tw>
Date: Mon, 24 Jun 2024 09:50:33 +0800
Subject: [PATCH 0762/1115] [UfiSpace][Bookworm][PDDF] Update UfiSpace platfrom
 codes to support bookworm and add new platforms support. (#18936)

* Update old platform code.
* s6301-56st
* s7801-54xs
* s8901-54xc
* s9110-32x
* s9300-32d

* Update code to support Bookworm
* s6301-56st
* s7801-54xs
* s8901-54dc
* s9110-32x
* s9300-32d

* Add new ufispace platforms.
* s9301-32d
* s9301-32db

* Update s9300-32d and s9301-32db bcm port config
---
 .../installer.conf                            |    2 +-
 .../pddf/pd-plugin.json                       |   24 +-
 .../pddf/pddf-device.json                     |  131 +-
 .../sensors.conf                              |    1 -
 .../installer.conf                            |    2 +-
 .../pddf/pd-plugin.json                       |   13 +-
 .../pddf/pddf-device.json                     |   47 +-
 .../sensors.conf                              |    1 -
 .../installer.conf                            |    2 +-
 .../pddf/pd-plugin.json                       |   13 +-
 .../pddf/pddf-device.json                     |   47 +-
 .../sensors.conf                              |    1 -
 .../UFISPACE-S9110-32X/sai.profile            |    0
 .../td3-x7-s9110-32x.config.bcm               |    0
 .../custom_led.bin                            |  Bin
 .../installer.conf                            |    2 +-
 .../led_proc_init.soc                         |    0
 .../pddf/pd-plugin.json                       |    8 +-
 .../pddf/pddf-device-beta.json                |  139 +-
 .../pddf/pddf-device-pvt.json                 |  139 +-
 .../x86_64-ufispace_s9110_32x-r0/sensors.conf |    1 -
 .../td4-s9300-32x400G.config.yml              |   11 +-
 .../custom_led.bin                            |  Bin 356 -> 716 bytes
 .../installer.conf                            |    2 +-
 .../pddf/pd-plugin.json                       |    6 +-
 .../pddf/pddf-device.json                     |  200 +-
 .../platform_components.json                  |   13 +
 .../UFISPACE-S9301-32D/hwsku.json             |  140 +
 .../UFISPACE-S9301-32D/port_config.ini        |   35 +
 .../UFISPACE-S9301-32D/sai.profile            |    1 +
 .../th3-s9301-32x400G.config.bcm              |  284 +
 .../cmicx_customer_led.bin                    |  Bin 0 -> 356 bytes
 .../x86_64-ufispace_s9301_32d-r0/default_sku  |    1 +
 .../x86_64-ufispace_s9301_32d-r0/fancontrol   |   10 +
 .../installer.conf                            |    4 +
 .../led_proc_init.soc                         |    3 +
 .../x86_64-ufispace_s9301_32d-r0/pcie.yaml    |  742 +++
 .../pddf/pd-plugin.json                       |   86 +
 .../pddf/pddf-device.json                     | 5092 +++++++++++++++++
 .../x86_64-ufispace_s9301_32d-r0/pddf_support |    0
 .../platform.json                             |  659 +++
 .../platform_asic                             |    1 +
 .../platform_components.json                  |   13 +
 .../platform_env.conf                         |    1 +
 .../pmon_daemon_control.json                  |    9 +
 .../x86_64-ufispace_s9301_32d-r0/sensors.conf |    9 +
 .../system_health_monitoring_config.json      |   15 +
 .../UFISPACE-S9301-32DB/hwsku.json            |  101 +
 .../UFISPACE-S9301-32DB/port_config.ini       |   33 +
 .../UFISPACE-S9301-32DB/sai.profile           |    1 +
 .../td4-s9301-24x200G-8x400G.config.yml       |  503 ++
 .../custom_led.bin                            |  Bin 0 -> 648 bytes
 .../x86_64-ufispace_s9301_32db-r0/default_sku |    1 +
 .../x86_64-ufispace_s9301_32db-r0/fancontrol  |   10 +
 .../installer.conf                            |    4 +
 .../led_proc_init.soc                         |    4 +
 .../x86_64-ufispace_s9301_32db-r0/pcie.yaml   |  741 +++
 .../pddf/pd-plugin.json                       |   86 +
 .../pddf/pddf-device.json                     | 4886 ++++++++++++++++
 .../pddf_support                              |    0
 .../platform.json                             |  613 ++
 .../platform_asic                             |    1 +
 .../platform_components.json                  |   13 +
 .../platform_env.conf                         |    2 +
 .../pmon_daemon_control.json                  |    9 +
 .../sensors.conf                              |    9 +
 .../system_health_monitoring_config.json      |   15 +
 platform/broadcom/one-image.mk                |   10 +-
 .../broadcom/platform-modules-ufispace.dep    |   10 +
 .../broadcom/platform-modules-ufispace.mk     |   12 +
 platform/broadcom/rules.dep                   |    1 +
 platform/broadcom/rules.mk                    |    3 +-
 .../debian/changelog                          |    7 +
 .../debian/control                            |   12 +-
 .../debian/rules                              |    4 +-
 .../sonic-platform-ufispace-s9300-32d.prerm   |    2 +
 .../sonic-platform-ufispace-s9301-32d.install |    1 +
 ...sonic-platform-ufispace-s9301-32d.postinst |    3 +
 .../sonic-platform-ufispace-s9301-32d.prerm   |    2 +
 ...sonic-platform-ufispace-s9301-32db.install |    1 +
 ...onic-platform-ufispace-s9301-32db.postinst |    3 +
 .../sonic-platform-ufispace-s9301-32db.prerm  |    2 +
 .../s6301-56st/modules/Makefile               |    2 +-
 .../s6301-56st/modules/pddf_custom_psu.c      |  124 +
 .../modules/x86-64-ufispace-s6301-56st-lpc.c  |  130 +-
 .../x86-64-ufispace-s6301-56st-sys-eeprom.c   |   14 +-
 .../s6301-56st/sonic_platform/chassis.py      |   36 +-
 .../s6301-56st/sonic_platform/fan.py          |   58 +-
 .../s6301-56st/sonic_platform/psu.py          |   42 +-
 .../utils/pddf_pre_driver_install.sh          |   11 -
 .../modules/pddf_custom_sysstatus_module.c    |   10 +-
 .../modules/x86-64-ufispace-s7801-54xs-cpld.c |   12 +-
 .../x86-64-ufispace-s7801-54xs-sys-eeprom.c   |   14 +-
 .../s7801-54xs/sonic_platform/chassis.py      |   11 +
 .../s7801-54xs/sonic_platform/component.py    |   20 +-
 .../s7801-54xs/sonic_platform/psu.py          |   29 +
 .../utils/pddf_post_device_create.sh          |    2 +-
 .../utils/pddf_pre_driver_install.sh          |    8 -
 .../s7801-54xs/utils/pre_pddf_init.sh         |    5 -
 .../modules/pddf_custom_sysstatus_module.c    |   10 +-
 .../modules/x86-64-ufispace-s8901-54xc-cpld.c |   12 +-
 .../x86-64-ufispace-s8901-54xc-sys-eeprom.c   |   14 +-
 .../s8901-54xc/sonic_platform/chassis.py      |   11 +
 .../s8901-54xc/sonic_platform/component.py    |   20 +-
 .../s8901-54xc/sonic_platform/psu.py          |   29 +
 .../utils/pddf_post_device_create.sh          |    2 +-
 .../utils/pddf_pre_driver_install.sh          |    8 -
 .../s8901-54xc/utils/pre_pddf_init.sh         |    5 -
 .../modules/pddf_custom_sysstatus_module.c    |   10 +-
 .../modules/x86-64-ufispace-s9110-32x-cpld.c  |   14 +-
 .../x86-64-ufispace-s9110-32x-sys-eeprom.c    |   14 +-
 .../s9110-32x/sonic_platform/chassis.py       |   11 +
 .../s9110-32x/sonic_platform/component.py     |   20 +-
 .../s9110-32x/sonic_platform/fan.py           |    1 -
 .../s9110-32x/sonic_platform/psu.py           |   31 +-
 .../utils/pddf_post_device_create.sh          |    2 +-
 .../utils/pddf_pre_driver_install.sh          |   11 -
 .../modules/pddf_custom_sysstatus_module.c    |    9 +-
 .../modules/x86-64-ufispace-s9300-32d-cpld.c  | 3284 +++++------
 .../modules/x86-64-ufispace-s9300-32d-cpld.h  |  502 +-
 .../modules/x86-64-ufispace-s9300-32d-lpc.c   | 1666 +++---
 .../x86-64-ufispace-s9300-32d-sys-eeprom.c    |  556 +-
 .../s9300-32d/sonic_platform/chassis.py       |   14 +-
 .../s9300-32d/sonic_platform/component.py     |   20 +-
 .../s9300-32d/sonic_platform/fan.py           |    6 +-
 .../s9300-32d/sonic_platform/psu.py           |   20 +-
 .../s9300-32d/sonic_platform/sfp.py           |   14 +
 .../utils/pddf_post_device_create.sh          |    3 +
 .../utils/pddf_pre_driver_install.sh          |   11 -
 .../s9301-32d/modules/Makefile                |    6 +
 .../modules/pddf_custom_sysstatus_module.c    |  266 +
 .../modules/x86-64-ufispace-s9301-32d-cpld.c  | 1646 ++++++
 .../modules/x86-64-ufispace-s9301-32d-cpld.h  |  251 +
 .../modules/x86-64-ufispace-s9301-32d-lpc.c   |  850 +++
 .../x86-64-ufispace-s9301-32d-sys-eeprom.c    |  283 +
 .../service/pddf-platform-init.service        |    1 +
 .../s9301-32d/sonic_platform/__init__.py      |    4 +
 .../s9301-32d/sonic_platform/chassis.py       |  189 +
 .../s9301-32d/sonic_platform/component.py     |  131 +
 .../s9301-32d/sonic_platform/eeprom.py        |   21 +
 .../s9301-32d/sonic_platform/fan.py           |  172 +
 .../s9301-32d/sonic_platform/fan_drawer.py    |   17 +
 .../sonic_platform/platform.py}               |   16 +-
 .../s9301-32d/sonic_platform/psu.py           |   56 +
 .../s9301-32d/sonic_platform/sfp.py           |   31 +
 .../s9301-32d/sonic_platform/thermal.py       |   17 +
 .../s9301-32d/sonic_platform_setup.py         |   27 +
 .../utils/pddf_post_device_create.sh          |    6 +
 .../utils/pddf_post_driver_install.sh         |    2 +
 .../s9301-32d/utils/pddf_switch_svc.py        |   86 +
 .../s9301-32db/modules/Makefile               |    6 +
 .../modules/pddf_custom_sysstatus_module.c    |  266 +
 .../modules/x86-64-ufispace-s9301-32db-cpld.c | 1656 ++++++
 .../modules/x86-64-ufispace-s9301-32db-cpld.h |  256 +
 .../modules/x86-64-ufispace-s9301-32db-lpc.c  |  850 +++
 .../x86-64-ufispace-s9301-32db-sys-eeprom.c   |  283 +
 .../service/pddf-platform-init.service        |   14 +
 .../s9301-32db/sonic_platform/__init__.py     |    4 +
 .../s9301-32db/sonic_platform/chassis.py      |  189 +
 .../s9301-32db/sonic_platform/component.py    |  131 +
 .../s9301-32db/sonic_platform/eeprom.py       |   21 +
 .../s9301-32db/sonic_platform/fan.py          |  172 +
 .../s9301-32db/sonic_platform/fan_drawer.py   |   17 +
 .../sonic_platform/platform.py}               |   16 +-
 .../s9301-32db/sonic_platform/psu.py          |   56 +
 .../s9301-32db/sonic_platform/sfp.py          |   31 +
 .../s9301-32db/sonic_platform/thermal.py      |   17 +
 .../s9301-32db/sonic_platform_setup.py        |   27 +
 .../utils/pddf_post_device_create.sh          |    6 +
 .../utils/pddf_post_driver_install.sh         |    2 +
 .../s9301-32db/utils/pddf_switch_svc.py       |   86 +
 171 files changed, 26521 insertions(+), 3536 deletions(-)
 delete mode 100644 device/ufispace/x86_64-ufispace_s6301_56st-r0/sensors.conf
 delete mode 100644 device/ufispace/x86_64-ufispace_s7801_54xs-r0/sensors.conf
 delete mode 100644 device/ufispace/x86_64-ufispace_s8901_54xc-r0/sensors.conf
 mode change 100755 => 100644 device/ufispace/x86_64-ufispace_s9110_32x-r0/UFISPACE-S9110-32X/sai.profile
 mode change 100755 => 100644 device/ufispace/x86_64-ufispace_s9110_32x-r0/UFISPACE-S9110-32X/td3-x7-s9110-32x.config.bcm
 mode change 100755 => 100644 device/ufispace/x86_64-ufispace_s9110_32x-r0/custom_led.bin
 mode change 100755 => 100644 device/ufispace/x86_64-ufispace_s9110_32x-r0/led_proc_init.soc
 delete mode 100644 device/ufispace/x86_64-ufispace_s9110_32x-r0/sensors.conf
 mode change 100644 => 100755 device/ufispace/x86_64-ufispace_s9300_32d-r0/UFISPACE-S9300-32D/td4-s9300-32x400G.config.yml
 create mode 100644 device/ufispace/x86_64-ufispace_s9300_32d-r0/platform_components.json
 create mode 100644 device/ufispace/x86_64-ufispace_s9301_32d-r0/UFISPACE-S9301-32D/hwsku.json
 create mode 100644 device/ufispace/x86_64-ufispace_s9301_32d-r0/UFISPACE-S9301-32D/port_config.ini
 create mode 100644 device/ufispace/x86_64-ufispace_s9301_32d-r0/UFISPACE-S9301-32D/sai.profile
 create mode 100644 device/ufispace/x86_64-ufispace_s9301_32d-r0/UFISPACE-S9301-32D/th3-s9301-32x400G.config.bcm
 create mode 100644 device/ufispace/x86_64-ufispace_s9301_32d-r0/cmicx_customer_led.bin
 create mode 100644 device/ufispace/x86_64-ufispace_s9301_32d-r0/default_sku
 create mode 100644 device/ufispace/x86_64-ufispace_s9301_32d-r0/fancontrol
 create mode 100644 device/ufispace/x86_64-ufispace_s9301_32d-r0/installer.conf
 create mode 100644 device/ufispace/x86_64-ufispace_s9301_32d-r0/led_proc_init.soc
 create mode 100644 device/ufispace/x86_64-ufispace_s9301_32d-r0/pcie.yaml
 create mode 100644 device/ufispace/x86_64-ufispace_s9301_32d-r0/pddf/pd-plugin.json
 create mode 100644 device/ufispace/x86_64-ufispace_s9301_32d-r0/pddf/pddf-device.json
 create mode 100644 device/ufispace/x86_64-ufispace_s9301_32d-r0/pddf_support
 create mode 100644 device/ufispace/x86_64-ufispace_s9301_32d-r0/platform.json
 create mode 100644 device/ufispace/x86_64-ufispace_s9301_32d-r0/platform_asic
 create mode 100644 device/ufispace/x86_64-ufispace_s9301_32d-r0/platform_components.json
 create mode 100644 device/ufispace/x86_64-ufispace_s9301_32d-r0/platform_env.conf
 create mode 100644 device/ufispace/x86_64-ufispace_s9301_32d-r0/pmon_daemon_control.json
 create mode 100644 device/ufispace/x86_64-ufispace_s9301_32d-r0/sensors.conf
 create mode 100644 device/ufispace/x86_64-ufispace_s9301_32d-r0/system_health_monitoring_config.json
 create mode 100644 device/ufispace/x86_64-ufispace_s9301_32db-r0/UFISPACE-S9301-32DB/hwsku.json
 create mode 100644 device/ufispace/x86_64-ufispace_s9301_32db-r0/UFISPACE-S9301-32DB/port_config.ini
 create mode 100644 device/ufispace/x86_64-ufispace_s9301_32db-r0/UFISPACE-S9301-32DB/sai.profile
 create mode 100755 device/ufispace/x86_64-ufispace_s9301_32db-r0/UFISPACE-S9301-32DB/td4-s9301-24x200G-8x400G.config.yml
 create mode 100755 device/ufispace/x86_64-ufispace_s9301_32db-r0/custom_led.bin
 create mode 100644 device/ufispace/x86_64-ufispace_s9301_32db-r0/default_sku
 create mode 100644 device/ufispace/x86_64-ufispace_s9301_32db-r0/fancontrol
 create mode 100644 device/ufispace/x86_64-ufispace_s9301_32db-r0/installer.conf
 create mode 100644 device/ufispace/x86_64-ufispace_s9301_32db-r0/led_proc_init.soc
 create mode 100644 device/ufispace/x86_64-ufispace_s9301_32db-r0/pcie.yaml
 create mode 100644 device/ufispace/x86_64-ufispace_s9301_32db-r0/pddf/pd-plugin.json
 create mode 100644 device/ufispace/x86_64-ufispace_s9301_32db-r0/pddf/pddf-device.json
 create mode 100644 device/ufispace/x86_64-ufispace_s9301_32db-r0/pddf_support
 create mode 100644 device/ufispace/x86_64-ufispace_s9301_32db-r0/platform.json
 create mode 100644 device/ufispace/x86_64-ufispace_s9301_32db-r0/platform_asic
 create mode 100644 device/ufispace/x86_64-ufispace_s9301_32db-r0/platform_components.json
 create mode 100644 device/ufispace/x86_64-ufispace_s9301_32db-r0/platform_env.conf
 create mode 100644 device/ufispace/x86_64-ufispace_s9301_32db-r0/pmon_daemon_control.json
 create mode 100644 device/ufispace/x86_64-ufispace_s9301_32db-r0/sensors.conf
 create mode 100644 device/ufispace/x86_64-ufispace_s9301_32db-r0/system_health_monitoring_config.json
 create mode 100644 platform/broadcom/platform-modules-ufispace.dep
 create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9300-32d.prerm
 create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9301-32d.install
 create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9301-32d.postinst
 create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9301-32d.prerm
 create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9301-32db.install
 create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9301-32db.postinst
 create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9301-32db.prerm
 create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/modules/pddf_custom_psu.c
 delete mode 100755 platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/utils/pddf_pre_driver_install.sh
 delete mode 100755 platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/utils/pddf_pre_driver_install.sh
 delete mode 100755 platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/utils/pre_pddf_init.sh
 delete mode 100755 platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/utils/pddf_pre_driver_install.sh
 delete mode 100755 platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/utils/pre_pddf_init.sh
 delete mode 100755 platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/utils/pddf_pre_driver_install.sh
 delete mode 100755 platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/utils/pddf_pre_driver_install.sh
 create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/modules/Makefile
 create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/modules/pddf_custom_sysstatus_module.c
 create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/modules/x86-64-ufispace-s9301-32d-cpld.c
 create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/modules/x86-64-ufispace-s9301-32d-cpld.h
 create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/modules/x86-64-ufispace-s9301-32d-lpc.c
 create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/modules/x86-64-ufispace-s9301-32d-sys-eeprom.c
 create mode 120000 platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/service/pddf-platform-init.service
 create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform/__init__.py
 create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform/chassis.py
 create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform/component.py
 create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform/eeprom.py
 create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform/fan.py
 create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform/fan_drawer.py
 rename platform/broadcom/sonic-platform-modules-ufispace/{s6301-56st/sonic_platform/watchdog.py => s9301-32d/sonic_platform/platform.py} (58%)
 create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform/psu.py
 create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform/sfp.py
 create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform/thermal.py
 create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform_setup.py
 create mode 100755 platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/utils/pddf_post_device_create.sh
 create mode 100755 platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/utils/pddf_post_driver_install.sh
 create mode 100755 platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/utils/pddf_switch_svc.py
 create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/modules/Makefile
 create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/modules/pddf_custom_sysstatus_module.c
 create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/modules/x86-64-ufispace-s9301-32db-cpld.c
 create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/modules/x86-64-ufispace-s9301-32db-cpld.h
 create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/modules/x86-64-ufispace-s9301-32db-lpc.c
 create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/modules/x86-64-ufispace-s9301-32db-sys-eeprom.c
 create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/service/pddf-platform-init.service
 create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform/__init__.py
 create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform/chassis.py
 create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform/component.py
 create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform/eeprom.py
 create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform/fan.py
 create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform/fan_drawer.py
 rename platform/broadcom/sonic-platform-modules-ufispace/{s9300-32d/sonic_platform/watchdog.py => s9301-32db/sonic_platform/platform.py} (58%)
 create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform/psu.py
 create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform/sfp.py
 create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform/thermal.py
 create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform_setup.py
 create mode 100755 platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/utils/pddf_post_device_create.sh
 create mode 100755 platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/utils/pddf_post_driver_install.sh
 create mode 100755 platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/utils/pddf_switch_svc.py

diff --git a/device/ufispace/x86_64-ufispace_s6301_56st-r0/installer.conf b/device/ufispace/x86_64-ufispace_s6301_56st-r0/installer.conf
index 8f9944da6..74b02f076 100644
--- a/device/ufispace/x86_64-ufispace_s6301_56st-r0/installer.conf
+++ b/device/ufispace/x86_64-ufispace_s6301_56st-r0/installer.conf
@@ -1,4 +1,4 @@
 CONSOLE_PORT=0x3f8
 CONSOLE_DEV=0
 CONSOLE_SPEED=115200
-ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="module_blacklist=gpio_ich nomodeset pcie_aspm=off"
+ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="modprobe.blacklist=gpio_ich,qat_c3xxx nomodeset pcie_aspm=off"
diff --git a/device/ufispace/x86_64-ufispace_s6301_56st-r0/pddf/pd-plugin.json b/device/ufispace/x86_64-ufispace_s6301_56st-r0/pddf/pd-plugin.json
index 49c09b0a7..eae9cd379 100644
--- a/device/ufispace/x86_64-ufispace_s6301_56st-r0/pddf/pd-plugin.json
+++ b/device/ufispace/x86_64-ufispace_s6301_56st-r0/pddf/pd-plugin.json
@@ -21,6 +21,10 @@
         "psu_present":
         {
             "i2c":
+            {
+                "valmap": { "1":true, "0":false }
+            },
+            "bmc":
             {
                 "valmap": { "1":true, "0":false }
             }
@@ -33,14 +37,15 @@
                 "valmap": { "1": true, "0":false }
             }
         },
+        
         "psu_support_list":
         [
-            {"Mfr_id": "ASPOWER","Model": "U1A-K10150-DRB-13", "Dir": "EXHAUST"},
-            {"Mfr_id": "ASPOWER","Model": "U1A-K0150-B-13", "Dir": "INTAKE"},
-            {"Mfr_id": "ASPOWER","Model": "U1D-K0150-A-13", "Dir": "EXHAUST"},
-            {"Mfr_id": "ASPOWER","Model": "U1D-K0150-B-13", "Dir": "INTAKE"}
+            {"Manufacturer": "ASPOWER","Name": "U1A-K10150-DRB-13", "MaxSpd": "PSU_AC_FAN_MAX_SPEED", "Dir": "EXHAUST", "Type": "AC" },
+            {"Manufacturer": "ASPOWER","Name": "U1A-K0150-B-13", "MaxSpd": "PSU_AC_FAN_MAX_SPEED", "Dir": "INTAKE", "Type": "AC"},
+            {"Manufacturer": "ASPOWER","Name": "U1D-K0150-A-13", "MaxSpd": "PSU_DC_FAN_MAX_SPEED", "Dir": "EXHAUST", "Type": "DC"},
+            {"Manufacturer": "ASPOWER","Name": "U1D-K0150-B-13", "MaxSpd": "PSU_DC_FAN_MAX_SPEED", "Dir": "INTAKE", "Type": "DC"}
         ],
-        "PSU_FAN_MAX_SPEED":"13000"
+        "valmap": {"PSU_FAN_MAX_SPEED": "13000", "PSU_AC_FAN_MAX_SPEED": "13000", "PSU_DC_FAN_MAX_SPEED":"13000", "DEFAULT_TYPE": "AC"}
     },
 
     "FAN":
@@ -63,15 +68,6 @@
 
         "FAN_MAX_SPEED":"25000"
     },
-
-    "LED":
-    {
-        "capability":
-        {
-            "ro": ["SYS_LED", "FAN_LED", "PSU1_LED", "PSU2_LED"],
-            "rw": ["ID_LED"]
-        }
-    },
     "REBOOT_CAUSE":
     {
         "reboot_cause_file": "/host/reboot-cause/reboot-cause.txt"
diff --git a/device/ufispace/x86_64-ufispace_s6301_56st-r0/pddf/pddf-device.json b/device/ufispace/x86_64-ufispace_s6301_56st-r0/pddf/pddf-device.json
index abf83dd93..5f906161f 100644
--- a/device/ufispace/x86_64-ufispace_s6301_56st-r0/pddf/pddf-device.json
+++ b/device/ufispace/x86_64-ufispace_s6301_56st-r0/pddf/pddf-device.json
@@ -24,9 +24,11 @@
                 "pddf_xcvr"
             ]
         },
+        "std_perm_kos": [
+            "i2c-i801",
+            "i2c-ismt"
+        ],
         "std_kos": [
-            "i2c_i801",
-            "i2c-ismt",
             "i2c_dev",
             "i2c_mux_pca954x",
             "optoe",
@@ -41,9 +43,12 @@
             "pddf_cpld_driver",
             "pddf_mux_module",
             "pddf_xcvr_module",
+            "pddf_fpgapci_driver",
             "pddf_xcvr_driver_module",
             "pddf_psu_driver_module",
             "pddf_psu_module",
+            "pddf_fpgai2c_module",
+            "pddf_fpgai2c_driver",
             "pddf_fan_driver_module",
             "pddf_fan_module",
             "pddf_led_module",
@@ -51,7 +56,8 @@
         ],
         "custom_kos": [
             "x86-64-ufispace-s6301-56st-lpc",
-            "x86-64-ufispace-s6301-56st-sys-eeprom"
+            "x86-64-ufispace-s6301-56st-sys-eeprom",
+            "pddf_custom_psu"
         ]
     },
     "SYSTEM": {
@@ -861,7 +867,19 @@
                 { "itf":"pmbus", "dev":"PSU1-PMBUS" },
                 { "itf":"eeprom", "dev":"PSU1-EEPROM" }
             ]
-        }
+        },
+        "bmc": {
+            "ipmitool": {
+                "attr_list": [
+                    {
+                        "attr_name": "psu_present",
+                        "bmc_cmd": "i2cget -y -f 2 0x58 0x0 > /dev/null 2>&1; [ $? -ne 0 ] && echo '0' || echo '1'",
+                        "raw": "1",
+                        "type": "raw"
+                    }
+                ]
+            }
+        }        
     },
     "PSU1-PMBUS": {
         "dev_info": {
@@ -877,16 +895,6 @@
                 "dev_type": "psu_pmbus"
             },
             "attr_list": [
-                {
-                    "attr_name": "psu_present",
-                    "attr_devaddr":"0x33",
-                    "attr_devtype": "cpld",
-                    "attr_devname":"CPLD1",
-                    "attr_offset": "0x59",
-                    "attr_mask": "0x1",
-                    "attr_cmpval": "0x0",
-                    "attr_len": "1"
-                },
                 {
                     "attr_name": "psu_power_good",
                     "attr_devaddr": "0x33",
@@ -951,6 +959,24 @@
                     "attr_cmpval": "0xff",
                     "attr_len": "2"
                 },
+                {
+                    "attr_name": "psu_v_out_min",
+                    "attr_devaddr": "0x58",
+                    "attr_devtype": "pmbus",
+                    "attr_offset": "0xa4",
+                    "attr_mask": "0x0",
+                    "attr_cmpval": "0xff",
+                    "attr_len": "2"
+                },
+                {
+                    "attr_name": "psu_v_out_max",
+                    "attr_devaddr": "0x58",
+                    "attr_devtype": "pmbus",
+                    "attr_offset": "0xa5",
+                    "attr_mask": "0x0",
+                    "attr_cmpval": "0xff",
+                    "attr_len": "2"
+                },
                 {
                     "attr_name": "psu_i_out",
                     "attr_devaddr": "0x58",
@@ -969,6 +995,15 @@
                     "attr_cmpval": "0xff",
                     "attr_len": "2"
                 },
+                {
+                    "attr_name": "psu_p_out_max",
+                    "attr_devaddr": "0x58",
+                    "attr_devtype": "pmbus",
+                    "attr_offset": "0xa7",
+                    "attr_mask": "0x0",
+                    "attr_cmpval": "0xff",
+                    "attr_len": "2"
+                },
                 {
                     "attr_name": "psu_fan1_speed_rpm",
                     "attr_devaddr": "0x58",
@@ -1026,7 +1061,19 @@
                 { "itf":"pmbus", "dev":"PSU2-PMBUS" },
                 { "itf":"eeprom", "dev":"PSU2-EEPROM" }
             ]
-        }
+        },
+        "bmc": {
+            "ipmitool": {
+                "attr_list": [
+                    {
+                        "attr_name": "psu_present",
+                        "bmc_cmd": "i2cget -y -f 2 0x59 0x0 > /dev/null 2>&1; [ $? -ne 0 ] && echo '0' || echo '1'",
+                        "raw": "1",
+                        "type": "raw"
+                    }
+                ]
+            }
+        }        
     },
     "PSU2-PMBUS": {
         "dev_info": {
@@ -1042,16 +1089,6 @@
                 "dev_type": "psu_pmbus"
             },
             "attr_list": [
-                {
-                    "attr_name": "psu_present",
-                    "attr_devaddr":"0x33",
-                    "attr_devtype": "cpld",
-                    "attr_devname":"CPLD1",
-                    "attr_offset": "0x59",
-                    "attr_mask": "0x2",
-                    "attr_cmpval": "0x0",
-                    "attr_len": "1"
-                },
                 {
                     "attr_name": "psu_power_good",
                     "attr_devaddr": "0x33",
@@ -1116,6 +1153,24 @@
                     "attr_cmpval": "0xff",
                     "attr_len": "2"
                 },
+                {
+                    "attr_name": "psu_v_out_min",
+                    "attr_devaddr": "0x59",
+                    "attr_devtype": "pmbus",
+                    "attr_offset": "0xa4",
+                    "attr_mask": "0x0",
+                    "attr_cmpval": "0xff",
+                    "attr_len": "2"
+                },
+                {
+                    "attr_name": "psu_v_out_max",
+                    "attr_devaddr": "0x59",
+                    "attr_devtype": "pmbus",
+                    "attr_offset": "0xa5",
+                    "attr_mask": "0x0",
+                    "attr_cmpval": "0xff",
+                    "attr_len": "2"
+                },
                 {
                     "attr_name": "psu_i_out",
                     "attr_devaddr": "0x59",
@@ -1134,6 +1189,15 @@
                     "attr_cmpval": "0xff",
                     "attr_len": "2"
                 },
+                {
+                    "attr_name": "psu_p_out_max",
+                    "attr_devaddr": "0x59",
+                    "attr_devtype": "pmbus",
+                    "attr_offset": "0xa7",
+                    "attr_mask": "0x0",
+                    "attr_cmpval": "0xff",
+                    "attr_len": "2"
+                },
                 {
                     "attr_name": "psu_fan1_speed_rpm",
                     "attr_devaddr": "0x59",
@@ -1239,7 +1303,8 @@
             "device_name": "SYS_LED"
         },
         "dev_attr": {
-            "index": "0"
+            "index": "0",
+            "flag": "ro"
         },
         "i2c": {
             "attr_list": [
@@ -1286,13 +1351,14 @@
             ]
         }
     },
-    "ID_LED": {
+    "LOC_LED": {
         "dev_info": {
             "device_type": "LED",
             "device_name": "LOC_LED"
         },
         "dev_attr": {
-            "index": "0"
+            "index": "0",
+            "flag": "rw"
         },
         "i2c": {
             "attr_list": [
@@ -1329,7 +1395,8 @@
             "device_name": "FAN_LED"
         },
         "dev_attr": {
-            "index": "0"
+            "index": "0",
+            "flag": "ro"
         },
         "i2c": {
             "attr_list": [
@@ -1382,7 +1449,8 @@
             "device_name": "PSU_LED"
         },
         "dev_attr": {
-            "index": "1"
+            "index": "1",
+            "flag": "ro"
         },
         "i2c": {
             "attr_list": [
@@ -1435,7 +1503,8 @@
             "device_name": "PSU_LED"
         },
         "dev_attr": {
-            "index": "0"
+            "index": "0",
+            "flag": "ro"
         },
         "i2c": {
             "attr_list": [
diff --git a/device/ufispace/x86_64-ufispace_s6301_56st-r0/sensors.conf b/device/ufispace/x86_64-ufispace_s6301_56st-r0/sensors.conf
deleted file mode 100644
index b1a694334..000000000
--- a/device/ufispace/x86_64-ufispace_s6301_56st-r0/sensors.conf
+++ /dev/null
@@ -1 +0,0 @@
-# libsensors configuration file
diff --git a/device/ufispace/x86_64-ufispace_s7801_54xs-r0/installer.conf b/device/ufispace/x86_64-ufispace_s7801_54xs-r0/installer.conf
index 8f9944da6..74b02f076 100644
--- a/device/ufispace/x86_64-ufispace_s7801_54xs-r0/installer.conf
+++ b/device/ufispace/x86_64-ufispace_s7801_54xs-r0/installer.conf
@@ -1,4 +1,4 @@
 CONSOLE_PORT=0x3f8
 CONSOLE_DEV=0
 CONSOLE_SPEED=115200
-ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="module_blacklist=gpio_ich nomodeset pcie_aspm=off"
+ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="modprobe.blacklist=gpio_ich,qat_c3xxx nomodeset pcie_aspm=off"
diff --git a/device/ufispace/x86_64-ufispace_s7801_54xs-r0/pddf/pd-plugin.json b/device/ufispace/x86_64-ufispace_s7801_54xs-r0/pddf/pd-plugin.json
index 81ff5e283..842d9996a 100644
--- a/device/ufispace/x86_64-ufispace_s7801_54xs-r0/pddf/pd-plugin.json
+++ b/device/ufispace/x86_64-ufispace_s7801_54xs-r0/pddf/pd-plugin.json
@@ -55,16 +55,19 @@
 
         "psu_support_list":
         [
-            {"Manufacturer": "FSPGROUP", "Name": "YNEB0450BM",   "MaxSpd": "PSU_FAN_MAX_SPEED_AC"},
-            {"Manufacturer": "FSPGROUP", "Name": "YNEB0450AM",   "MaxSpd": "PSU_FAN_MAX_SPEED_DC"},
-            {"Manufacturer": "DELTA",    "Name": "DPS-450AB-27", "MaxSpd": "PSU_FAN_MAX_SPEED_AC"},
-            {"Manufacturer": "DELTA",    "Name": "DPS-450AB-28", "MaxSpd": "PSU_FAN_MAX_SPEED_DC"}
+            {"Manufacturer": "FSPGROUP", "Name": "YNEB0450BM",   "MaxSpd": "PSU_FAN_MAX_SPEED_AC", "Type": "AC"},
+            {"Manufacturer": "FSPGROUP", "Name": "YNEB0450AM",   "MaxSpd": "PSU_FAN_MAX_SPEED_DC", "Type": "DC"},
+            {"Manufacturer": "DELTA",    "Name": "DPS-450AB-27", "MaxSpd": "PSU_FAN_MAX_SPEED_AC", "Type": "AC"},
+            {"Manufacturer": "DELTA",    "Name": "DPS-450AB-28", "MaxSpd": "PSU_FAN_MAX_SPEED_DC", "Type": "DC"},
+            {"Manufacturer": "DELTA",    "Name": "DPS-450AB-32", "MaxSpd": "PSU_FAN_MAX_SPEED_DC", "Type": "DC"},
+            {"Manufacturer": "DELTA",    "Name": "DPS-450AB-33", "MaxSpd": "PSU_FAN_MAX_SPEED_AC", "Type": "AC"}
         ],
 
         "valmap": {
             "PSU_FAN_MAX_SPEED":"20000",
             "PSU_FAN_MAX_SPEED_AC":"20000",
-            "PSU_FAN_MAX_SPEED_DC":"18000"
+            "PSU_FAN_MAX_SPEED_DC":"18000",
+            "DEFAULT_TYPE": "AC"
         }
     },
     "FAN":
diff --git a/device/ufispace/x86_64-ufispace_s7801_54xs-r0/pddf/pddf-device.json b/device/ufispace/x86_64-ufispace_s7801_54xs-r0/pddf/pddf-device.json
index 7110b2ed6..640a61800 100644
--- a/device/ufispace/x86_64-ufispace_s7801_54xs-r0/pddf/pddf-device.json
+++ b/device/ufispace/x86_64-ufispace_s7801_54xs-r0/pddf/pddf-device.json
@@ -18,9 +18,11 @@
                 "pddf_xcvr"
             ]
         },
+        "std_perm_kos": [
+            "i2c-i801",
+            "i2c-ismt"
+        ],
         "std_kos": [
-            "i2c_i801",
-            "i2c_ismt",
             "i2c_dev",
             "i2c_mux_pca954x",
             "coretemp",
@@ -33,9 +35,12 @@
             "pddf_cpld_driver",
             "pddf_mux_module",
             "pddf_xcvr_module",
+            "pddf_fpgapci_driver",
             "pddf_xcvr_driver_module",
             "pddf_psu_driver_module",
             "pddf_psu_module",
+            "pddf_fpgai2c_module",
+            "pddf_fpgai2c_driver",
             "pddf_fan_driver_module",
             "pddf_fan_module",
             "pddf_led_module",
@@ -1907,6 +1912,24 @@
                         "bmc_cmd": "ipmitool raw 0x3c 0x30 0x0 | xargs | cut -d' ' -f1",
                         "raw": "1",
                         "type": "raw"
+                    },
+                    {
+                        "attr_name": "psu_v_in",
+                        "bmc_cmd": "ipmitool sdr get -c PSU0_VIN | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "PSU0_VIN",
+                        "field_pos": "2",
+                        "mult": "1000"
+                    },
+                    {
+                        "attr_name": "psu_i_in",
+                        "bmc_cmd": "ipmitool sdr get -c PSU0_IIN | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "PSU0_IIN",
+                        "field_pos": "2",
+                        "mult": "1000"
                     }
                 ]
             }
@@ -2030,6 +2053,24 @@
                         "bmc_cmd": "ipmitool raw 0x3c 0x30 0x0 | xargs | cut -d' ' -f2",
                         "raw": "1",
                         "type": "raw"
+                    },
+                    {
+                        "attr_name": "psu_v_in",
+                        "bmc_cmd": "ipmitool sdr get -c PSU1_VIN | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "PSU1_VIN",
+                        "field_pos": "2",
+                        "mult": "1000"
+                    },
+                    {
+                        "attr_name": "psu_i_in",
+                        "bmc_cmd": "ipmitool sdr get -c PSU1_IIN | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "PSU1_IIN",
+                        "field_pos": "2",
+                        "mult": "1000"
                     }
                 ]
             }
@@ -2463,7 +2504,7 @@
             ]
         }
     },
-    "ID_LED": {
+    "LOC_LED": {
         "dev_info": {
             "device_type": "LED",
             "device_name": "LOC_LED"
diff --git a/device/ufispace/x86_64-ufispace_s7801_54xs-r0/sensors.conf b/device/ufispace/x86_64-ufispace_s7801_54xs-r0/sensors.conf
deleted file mode 100644
index b1a694334..000000000
--- a/device/ufispace/x86_64-ufispace_s7801_54xs-r0/sensors.conf
+++ /dev/null
@@ -1 +0,0 @@
-# libsensors configuration file
diff --git a/device/ufispace/x86_64-ufispace_s8901_54xc-r0/installer.conf b/device/ufispace/x86_64-ufispace_s8901_54xc-r0/installer.conf
index 8f9944da6..74b02f076 100644
--- a/device/ufispace/x86_64-ufispace_s8901_54xc-r0/installer.conf
+++ b/device/ufispace/x86_64-ufispace_s8901_54xc-r0/installer.conf
@@ -1,4 +1,4 @@
 CONSOLE_PORT=0x3f8
 CONSOLE_DEV=0
 CONSOLE_SPEED=115200
-ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="module_blacklist=gpio_ich nomodeset pcie_aspm=off"
+ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="modprobe.blacklist=gpio_ich,qat_c3xxx nomodeset pcie_aspm=off"
diff --git a/device/ufispace/x86_64-ufispace_s8901_54xc-r0/pddf/pd-plugin.json b/device/ufispace/x86_64-ufispace_s8901_54xc-r0/pddf/pd-plugin.json
index 81ff5e283..842d9996a 100644
--- a/device/ufispace/x86_64-ufispace_s8901_54xc-r0/pddf/pd-plugin.json
+++ b/device/ufispace/x86_64-ufispace_s8901_54xc-r0/pddf/pd-plugin.json
@@ -55,16 +55,19 @@
 
         "psu_support_list":
         [
-            {"Manufacturer": "FSPGROUP", "Name": "YNEB0450BM",   "MaxSpd": "PSU_FAN_MAX_SPEED_AC"},
-            {"Manufacturer": "FSPGROUP", "Name": "YNEB0450AM",   "MaxSpd": "PSU_FAN_MAX_SPEED_DC"},
-            {"Manufacturer": "DELTA",    "Name": "DPS-450AB-27", "MaxSpd": "PSU_FAN_MAX_SPEED_AC"},
-            {"Manufacturer": "DELTA",    "Name": "DPS-450AB-28", "MaxSpd": "PSU_FAN_MAX_SPEED_DC"}
+            {"Manufacturer": "FSPGROUP", "Name": "YNEB0450BM",   "MaxSpd": "PSU_FAN_MAX_SPEED_AC", "Type": "AC"},
+            {"Manufacturer": "FSPGROUP", "Name": "YNEB0450AM",   "MaxSpd": "PSU_FAN_MAX_SPEED_DC", "Type": "DC"},
+            {"Manufacturer": "DELTA",    "Name": "DPS-450AB-27", "MaxSpd": "PSU_FAN_MAX_SPEED_AC", "Type": "AC"},
+            {"Manufacturer": "DELTA",    "Name": "DPS-450AB-28", "MaxSpd": "PSU_FAN_MAX_SPEED_DC", "Type": "DC"},
+            {"Manufacturer": "DELTA",    "Name": "DPS-450AB-32", "MaxSpd": "PSU_FAN_MAX_SPEED_DC", "Type": "DC"},
+            {"Manufacturer": "DELTA",    "Name": "DPS-450AB-33", "MaxSpd": "PSU_FAN_MAX_SPEED_AC", "Type": "AC"}
         ],
 
         "valmap": {
             "PSU_FAN_MAX_SPEED":"20000",
             "PSU_FAN_MAX_SPEED_AC":"20000",
-            "PSU_FAN_MAX_SPEED_DC":"18000"
+            "PSU_FAN_MAX_SPEED_DC":"18000",
+            "DEFAULT_TYPE": "AC"
         }
     },
     "FAN":
diff --git a/device/ufispace/x86_64-ufispace_s8901_54xc-r0/pddf/pddf-device.json b/device/ufispace/x86_64-ufispace_s8901_54xc-r0/pddf/pddf-device.json
index 18d0dd9ab..2fb21d277 100644
--- a/device/ufispace/x86_64-ufispace_s8901_54xc-r0/pddf/pddf-device.json
+++ b/device/ufispace/x86_64-ufispace_s8901_54xc-r0/pddf/pddf-device.json
@@ -18,9 +18,11 @@
                 "pddf_xcvr"
             ]
         },
+        "std_perm_kos": [
+            "i2c-i801",
+            "i2c-ismt"
+        ],
         "std_kos": [
-            "i2c_i801",
-            "i2c_ismt",
             "i2c_dev",
             "i2c_mux_pca954x",
             "coretemp",
@@ -33,9 +35,12 @@
             "pddf_cpld_driver",
             "pddf_mux_module",
             "pddf_xcvr_module",
+            "pddf_fpgapci_driver",
             "pddf_xcvr_driver_module",
             "pddf_psu_driver_module",
             "pddf_psu_module",
+            "pddf_fpgai2c_module",
+            "pddf_fpgai2c_driver",
             "pddf_fan_driver_module",
             "pddf_fan_module",
             "pddf_led_module",
@@ -1907,6 +1912,24 @@
                         "bmc_cmd": "ipmitool raw 0x3c 0x30 0x0 | xargs | cut -d' ' -f1",
                         "raw": "1",
                         "type": "raw"
+                    },
+                    {
+                        "attr_name": "psu_v_in",
+                        "bmc_cmd": "ipmitool sdr get -c PSU0_VIN | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "PSU0_VIN",
+                        "field_pos": "2",
+                        "mult": "1000"
+                    },
+                    {
+                        "attr_name": "psu_i_in",
+                        "bmc_cmd": "ipmitool sdr get -c PSU0_IIN | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "PSU0_IIN",
+                        "field_pos": "2",
+                        "mult": "1000"
                     }
                 ]
             }
@@ -2030,6 +2053,24 @@
                         "bmc_cmd": "ipmitool raw 0x3c 0x30 0x0 | xargs | cut -d' ' -f2",
                         "raw": "1",
                         "type": "raw"
+                    },
+                    {
+                        "attr_name": "psu_v_in",
+                        "bmc_cmd": "ipmitool sdr get -c PSU1_VIN | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "PSU1_VIN",
+                        "field_pos": "2",
+                        "mult": "1000"
+                    },
+                    {
+                        "attr_name": "psu_i_in",
+                        "bmc_cmd": "ipmitool sdr get -c PSU1_IIN | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "PSU1_IIN",
+                        "field_pos": "2",
+                        "mult": "1000"
                     }
                 ]
             }
@@ -2463,7 +2504,7 @@
             ]
         }
     },
-    "ID_LED": {
+    "LOC_LED": {
         "dev_info": {
             "device_type": "LED",
             "device_name": "LOC_LED"
diff --git a/device/ufispace/x86_64-ufispace_s8901_54xc-r0/sensors.conf b/device/ufispace/x86_64-ufispace_s8901_54xc-r0/sensors.conf
deleted file mode 100644
index b1a694334..000000000
--- a/device/ufispace/x86_64-ufispace_s8901_54xc-r0/sensors.conf
+++ /dev/null
@@ -1 +0,0 @@
-# libsensors configuration file
diff --git a/device/ufispace/x86_64-ufispace_s9110_32x-r0/UFISPACE-S9110-32X/sai.profile b/device/ufispace/x86_64-ufispace_s9110_32x-r0/UFISPACE-S9110-32X/sai.profile
old mode 100755
new mode 100644
diff --git a/device/ufispace/x86_64-ufispace_s9110_32x-r0/UFISPACE-S9110-32X/td3-x7-s9110-32x.config.bcm b/device/ufispace/x86_64-ufispace_s9110_32x-r0/UFISPACE-S9110-32X/td3-x7-s9110-32x.config.bcm
old mode 100755
new mode 100644
diff --git a/device/ufispace/x86_64-ufispace_s9110_32x-r0/custom_led.bin b/device/ufispace/x86_64-ufispace_s9110_32x-r0/custom_led.bin
old mode 100755
new mode 100644
diff --git a/device/ufispace/x86_64-ufispace_s9110_32x-r0/installer.conf b/device/ufispace/x86_64-ufispace_s9110_32x-r0/installer.conf
index 8f9944da6..74b02f076 100644
--- a/device/ufispace/x86_64-ufispace_s9110_32x-r0/installer.conf
+++ b/device/ufispace/x86_64-ufispace_s9110_32x-r0/installer.conf
@@ -1,4 +1,4 @@
 CONSOLE_PORT=0x3f8
 CONSOLE_DEV=0
 CONSOLE_SPEED=115200
-ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="module_blacklist=gpio_ich nomodeset pcie_aspm=off"
+ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="modprobe.blacklist=gpio_ich,qat_c3xxx nomodeset pcie_aspm=off"
diff --git a/device/ufispace/x86_64-ufispace_s9110_32x-r0/led_proc_init.soc b/device/ufispace/x86_64-ufispace_s9110_32x-r0/led_proc_init.soc
old mode 100755
new mode 100644
diff --git a/device/ufispace/x86_64-ufispace_s9110_32x-r0/pddf/pd-plugin.json b/device/ufispace/x86_64-ufispace_s9110_32x-r0/pddf/pd-plugin.json
index 775f0c934..99e551ed2 100644
--- a/device/ufispace/x86_64-ufispace_s9110_32x-r0/pddf/pd-plugin.json
+++ b/device/ufispace/x86_64-ufispace_s9110_32x-r0/pddf/pd-plugin.json
@@ -45,12 +45,12 @@
         },
         "psu_support_list":
         [
-            {"Manufacturer": "FSPGROUP","Name": "YNEE0750EM", "MaxSpd": "PSU_AC_FAN_MAX_SPEED"},
-            {"Manufacturer": "FSPGROUP","Name": "YNEE0750BM", "MaxSpd": "PSU_AC_FAN_MAX_SPEED"},
-            {"Manufacturer": "FSPGROUP","Name": "YNEE0750AM", "MaxSpd": "PSU_DC_FAN_MAX_SPEED"}
+            {"Manufacturer": "FSPGROUP","Name": "YNEE0750EM", "MaxSpd": "PSU_AC_FAN_MAX_SPEED", "Type":"AC"},
+            {"Manufacturer": "FSPGROUP","Name": "YNEE0750BM", "MaxSpd": "PSU_AC_FAN_MAX_SPEED", "Type":"AC"},
+            {"Manufacturer": "FSPGROUP","Name": "YNEE0750AM", "MaxSpd": "PSU_DC_FAN_MAX_SPEED", "Type":"DC"}
         ],
 
-        "valmap": {"PSU_AC_FAN_MAX_SPEED": "26500", "PSU_DC_FAN_MAX_SPEED":"29000"}
+        "valmap": {"PSU_AC_FAN_MAX_SPEED": "26500", "PSU_DC_FAN_MAX_SPEED":"29000", "DEFAULT_TYPE": "AC"}
     },
 
     "FAN":
diff --git a/device/ufispace/x86_64-ufispace_s9110_32x-r0/pddf/pddf-device-beta.json b/device/ufispace/x86_64-ufispace_s9110_32x-r0/pddf/pddf-device-beta.json
index d55cf071f..aafa6cc81 100644
--- a/device/ufispace/x86_64-ufispace_s9110_32x-r0/pddf/pddf-device-beta.json
+++ b/device/ufispace/x86_64-ufispace_s9110_32x-r0/pddf/pddf-device-beta.json
@@ -18,9 +18,11 @@
                 "pddf_xcvr"
             ]
         },
+        "std_perm_kos": [
+            "i2c-i801",
+            "i2c-ismt"
+        ],
         "std_kos": [
-            "i2c_i801",
-            "i2c-ismt",
             "i2c_dev",
             "i2c_mux_pca954x",
             "optoe"
@@ -31,9 +33,12 @@
             "pddf_cpld_driver",
             "pddf_mux_module",
             "pddf_xcvr_module",
+            "pddf_fpgapci_driver",
             "pddf_xcvr_driver_module",
             "pddf_psu_driver_module",
             "pddf_psu_module",
+            "pddf_fpgai2c_module",
+            "pddf_fpgai2c_driver",
             "pddf_fan_driver_module",
             "pddf_fan_module",
             "pddf_led_module"
@@ -65,7 +70,7 @@
     },
     "SMBUS1": {
         "dev_info": {
-            "device_type": "SMBUS", "device_name": "SMBUS1", "device_parent": "SYSTEM" 
+            "device_type": "SMBUS", "device_name": "SMBUS1", "device_parent": "SYSTEM"
         },
         "i2c": {
             "topo_info": {
@@ -752,6 +757,24 @@
                         "bmc_cmd": "ipmitool raw 0x3c 0x30 0x0 | xargs | cut -d' ' -f1",
                         "raw": "1",
                         "type": "raw"
+                    },
+                    {
+                        "attr_name": "psu_v_in",
+                        "bmc_cmd": "ipmitool sdr get -c PSU0_VIN | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "PSU0_VIN",
+                        "field_pos": "2",
+                        "mult": "1000"
+                    },
+                    {
+                        "attr_name": "psu_i_in",
+                        "bmc_cmd": "ipmitool sdr get -c PSU0_IIN | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "PSU0_IIN",
+                        "field_pos": "2",
+                        "mult": "1000"
                     }
                 ]
             }
@@ -875,6 +898,24 @@
                         "bmc_cmd": "ipmitool raw 0x3c 0x30 0x0 | xargs | cut -d' ' -f2",
                         "raw": "1",
                         "type": "raw"
+                    },
+                    {
+                        "attr_name": "psu_v_in",
+                        "bmc_cmd": "ipmitool sdr get -c PSU1_VIN | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "PSU1_VIN",
+                        "field_pos": "2",
+                        "mult": "1000"
+                    },
+                    {
+                        "attr_name": "psu_i_in",
+                        "bmc_cmd": "ipmitool sdr get -c PSU1_IIN | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "PSU1_IIN",
+                        "field_pos": "2",
+                        "mult": "1000"
                     }
                 ]
             }
@@ -1320,7 +1361,7 @@
             ]
         }
     },
-    "ID_LED": {
+    "LOC_LED": {
         "dev_info": {
             "device_type": "LED",
             "device_name": "LOC_LED"
@@ -1360,7 +1401,7 @@
     },
     "PORT1": {
         "dev_info": {
-            "device_type": "QSFP",
+            "device_type": "QSFP28",
             "device_name": "PORT1",
             "device_parent": "MUX3"
         },
@@ -1459,7 +1500,7 @@
     },
     "PORT2": {
         "dev_info": {
-            "device_type": "QSFP",
+            "device_type": "QSFP28",
             "device_name": "PORT2",
             "device_parent": "MUX3"
         },
@@ -1558,7 +1599,7 @@
     },
     "PORT3": {
         "dev_info": {
-            "device_type": "QSFP",
+            "device_type": "QSFP28",
             "device_name": "PORT3",
             "device_parent": "MUX3"
         },
@@ -1657,7 +1698,7 @@
     },
     "PORT4": {
         "dev_info": {
-            "device_type": "QSFP",
+            "device_type": "QSFP28",
             "device_name": "PORT4",
             "device_parent": "MUX3"
         },
@@ -1756,7 +1797,7 @@
     },
     "PORT5": {
         "dev_info": {
-            "device_type": "QSFP",
+            "device_type": "QSFP28",
             "device_name": "PORT5",
             "device_parent": "MUX3"
         },
@@ -1855,7 +1896,7 @@
     },
     "PORT6": {
         "dev_info": {
-            "device_type": "QSFP",
+            "device_type": "QSFP28",
             "device_name": "PORT6",
             "device_parent": "MUX3"
         },
@@ -1954,7 +1995,7 @@
     },
     "PORT7": {
         "dev_info": {
-            "device_type": "QSFP",
+            "device_type": "QSFP28",
             "device_name": "PORT7",
             "device_parent": "MUX3"
         },
@@ -2053,7 +2094,7 @@
     },
     "PORT8": {
         "dev_info": {
-            "device_type": "QSFP",
+            "device_type": "QSFP28",
             "device_name": "PORT8",
             "device_parent": "MUX3"
         },
@@ -2152,7 +2193,7 @@
     },
     "PORT9": {
         "dev_info": {
-            "device_type": "QSFP",
+            "device_type": "QSFP28",
             "device_name": "PORT9",
             "device_parent": "MUX4"
         },
@@ -2251,7 +2292,7 @@
     },
     "PORT10": {
         "dev_info": {
-            "device_type": "QSFP",
+            "device_type": "QSFP28",
             "device_name": "PORT10",
             "device_parent": "MUX4"
         },
@@ -2350,7 +2391,7 @@
     },
     "PORT11": {
         "dev_info": {
-            "device_type": "QSFP",
+            "device_type": "QSFP28",
             "device_name": "PORT11",
             "device_parent": "MUX4"
         },
@@ -2449,7 +2490,7 @@
     },
     "PORT12": {
         "dev_info": {
-            "device_type": "QSFP",
+            "device_type": "QSFP28",
             "device_name": "PORT12",
             "device_parent": "MUX4"
         },
@@ -2548,7 +2589,7 @@
     },
     "PORT13": {
         "dev_info": {
-            "device_type": "QSFP",
+            "device_type": "QSFP28",
             "device_name": "PORT13",
             "device_parent": "MUX4"
         },
@@ -2647,7 +2688,7 @@
     },
     "PORT14": {
         "dev_info": {
-            "device_type": "QSFP",
+            "device_type": "QSFP28",
             "device_name": "PORT14",
             "device_parent": "MUX4"
         },
@@ -2746,7 +2787,7 @@
     },
     "PORT15": {
         "dev_info": {
-            "device_type": "QSFP",
+            "device_type": "QSFP28",
             "device_name": "PORT15",
             "device_parent": "MUX4"
         },
@@ -2845,7 +2886,7 @@
     },
     "PORT16": {
         "dev_info": {
-            "device_type": "QSFP",
+            "device_type": "QSFP28",
             "device_name": "PORT16",
             "device_parent": "MUX4"
         },
@@ -2944,7 +2985,7 @@
     },
     "PORT17": {
         "dev_info": {
-            "device_type": "QSFP",
+            "device_type": "QSFP28",
             "device_name": "PORT17",
             "device_parent": "MUX5"
         },
@@ -3043,7 +3084,7 @@
     },
     "PORT18": {
         "dev_info": {
-            "device_type": "QSFP",
+            "device_type": "QSFP28",
             "device_name": "PORT18",
             "device_parent": "MUX5"
         },
@@ -3142,7 +3183,7 @@
     },
     "PORT19": {
         "dev_info": {
-            "device_type": "QSFP",
+            "device_type": "QSFP28",
             "device_name": "PORT19",
             "device_parent": "MUX5"
         },
@@ -3241,7 +3282,7 @@
     },
     "PORT20": {
         "dev_info": {
-            "device_type": "QSFP",
+            "device_type": "QSFP28",
             "device_name": "PORT20",
             "device_parent": "MUX5"
         },
@@ -3340,7 +3381,7 @@
     },
     "PORT21": {
         "dev_info": {
-            "device_type": "QSFP",
+            "device_type": "QSFP28",
             "device_name": "PORT21",
             "device_parent": "MUX5"
         },
@@ -3439,7 +3480,7 @@
     },
     "PORT22": {
         "dev_info": {
-            "device_type": "QSFP",
+            "device_type": "QSFP28",
             "device_name": "PORT22",
             "device_parent": "MUX5"
         },
@@ -3538,7 +3579,7 @@
     },
     "PORT23": {
         "dev_info": {
-            "device_type": "QSFP",
+            "device_type": "QSFP28",
             "device_name": "PORT23",
             "device_parent": "MUX5"
         },
@@ -3635,17 +3676,17 @@
             ]
         }
     },
-        "PORT24": {
-                "dev_info": {
-                        "device_type": "QSFP",
-                        "device_name": "PORT24",
-                        "device_parent": "MUX5"
-                },
-                "dev_attr": {
-                        "dev_idx": "24"
-                },
-                "i2c": {
-                        "interface": [
+    "PORT24": {
+        "dev_info": {
+            "device_type": "QSFP28",
+            "device_name": "PORT24",
+            "device_parent": "MUX5"
+        },
+        "dev_attr": {
+            "dev_idx": "24"
+        },
+        "i2c": {
+            "interface": [
                 {
                         "itf": "eeprom",
                         "dev": "PORT24-EEPROM"
@@ -3654,9 +3695,9 @@
                         "itf": "control",
                         "dev": "PORT24-CTRL"
                 }
-                        ]
-                }
-        },
+            ]
+        }
+    },
     "PORT24-EEPROM": {
         "dev_info": {
             "device_type": "",
@@ -3736,7 +3777,7 @@
     },
     "PORT25": {
         "dev_info": {
-            "device_type": "QSFP",
+            "device_type": "QSFP28",
             "device_name": "PORT25",
             "device_parent": "MUX6"
         },
@@ -3835,7 +3876,7 @@
     },
     "PORT26": {
         "dev_info": {
-            "device_type": "QSFP",
+            "device_type": "QSFP28",
             "device_name": "PORT26",
             "device_parent": "MUX6"
         },
@@ -3934,7 +3975,7 @@
     },
     "PORT27": {
         "dev_info": {
-            "device_type": "QSFP",
+            "device_type": "QSFP28",
             "device_name": "PORT27",
             "device_parent": "MUX6"
         },
@@ -4033,7 +4074,7 @@
     },
     "PORT28": {
         "dev_info": {
-            "device_type": "QSFP",
+            "device_type": "QSFP28",
             "device_name": "PORT28",
             "device_parent": "MUX6"
         },
@@ -4132,7 +4173,7 @@
     },
     "PORT29": {
         "dev_info": {
-            "device_type": "QSFP",
+            "device_type": "QSFP28",
             "device_name": "PORT29",
             "device_parent": "MUX6"
         },
@@ -4231,7 +4272,7 @@
     },
     "PORT30": {
         "dev_info": {
-            "device_type": "QSFP",
+            "device_type": "QSFP28",
             "device_name": "PORT30",
             "device_parent": "MUX6"
         },
@@ -4330,7 +4371,7 @@
     },
     "PORT31": {
         "dev_info": {
-            "device_type": "QSFP",
+            "device_type": "QSFP28",
             "device_name": "PORT31",
             "device_parent": "MUX6"
         },
@@ -4429,7 +4470,7 @@
     },
     "PORT32": {
         "dev_info": {
-            "device_type": "QSFP",
+            "device_type": "QSFP28",
             "device_name": "PORT32",
             "device_parent": "MUX6"
         },
diff --git a/device/ufispace/x86_64-ufispace_s9110_32x-r0/pddf/pddf-device-pvt.json b/device/ufispace/x86_64-ufispace_s9110_32x-r0/pddf/pddf-device-pvt.json
index 4f86b045c..dec149491 100644
--- a/device/ufispace/x86_64-ufispace_s9110_32x-r0/pddf/pddf-device-pvt.json
+++ b/device/ufispace/x86_64-ufispace_s9110_32x-r0/pddf/pddf-device-pvt.json
@@ -18,9 +18,11 @@
                 "pddf_xcvr"
             ]
         },
+        "std_perm_kos": [
+            "i2c-i801",
+            "i2c-ismt"
+        ],
         "std_kos": [
-            "i2c_i801",
-            "i2c-ismt",
             "i2c_dev",
             "i2c_mux_pca954x",
             "optoe"
@@ -31,9 +33,12 @@
             "pddf_cpld_driver",
             "pddf_mux_module",
             "pddf_xcvr_module",
+            "pddf_fpgapci_driver",
             "pddf_xcvr_driver_module",
             "pddf_psu_driver_module",
             "pddf_psu_module",
+            "pddf_fpgai2c_module",
+            "pddf_fpgai2c_driver",
             "pddf_fan_driver_module",
             "pddf_fan_module",
             "pddf_led_module"
@@ -65,7 +70,7 @@
     },
     "SMBUS1": {
         "dev_info": {
-            "device_type": "SMBUS", "device_name": "SMBUS1", "device_parent": "SYSTEM" 
+            "device_type": "SMBUS", "device_name": "SMBUS1", "device_parent": "SYSTEM"
         },
         "i2c": {
             "topo_info": {
@@ -752,6 +757,24 @@
                         "bmc_cmd": "ipmitool raw 0x3c 0x30 0x0 | xargs | cut -d' ' -f1",
                         "raw": "1",
                         "type": "raw"
+                    },
+                    {
+                        "attr_name": "psu_v_in",
+                        "bmc_cmd": "ipmitool sdr get -c PSU0_VIN | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "PSU0_VIN",
+                        "field_pos": "2",
+                        "mult": "1000"
+                    },
+                    {
+                        "attr_name": "psu_i_in",
+                        "bmc_cmd": "ipmitool sdr get -c PSU0_IIN | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "PSU0_IIN",
+                        "field_pos": "2",
+                        "mult": "1000"
                     }
                 ]
             }
@@ -875,6 +898,24 @@
                         "bmc_cmd": "ipmitool raw 0x3c 0x30 0x0 | xargs | cut -d' ' -f2",
                         "raw": "1",
                         "type": "raw"
+                    },
+                    {
+                        "attr_name": "psu_v_in",
+                        "bmc_cmd": "ipmitool sdr get -c PSU1_VIN | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "PSU1_VIN",
+                        "field_pos": "2",
+                        "mult": "1000"
+                    },
+                    {
+                        "attr_name": "psu_i_in",
+                        "bmc_cmd": "ipmitool sdr get -c PSU1_IIN | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "PSU1_IIN",
+                        "field_pos": "2",
+                        "mult": "1000"
                     }
                 ]
             }
@@ -1276,7 +1317,7 @@
             ]
         }
     },
-    "ID_LED": {
+    "LOC_LED": {
         "dev_info": {
             "device_type": "LED",
             "device_name": "LOC_LED"
@@ -1316,7 +1357,7 @@
     },
     "PORT1": {
         "dev_info": {
-            "device_type": "QSFP",
+            "device_type": "QSFP28",
             "device_name": "PORT1",
             "device_parent": "MUX3"
         },
@@ -1415,7 +1456,7 @@
     },
     "PORT2": {
         "dev_info": {
-            "device_type": "QSFP",
+            "device_type": "QSFP28",
             "device_name": "PORT2",
             "device_parent": "MUX3"
         },
@@ -1514,7 +1555,7 @@
     },
     "PORT3": {
         "dev_info": {
-            "device_type": "QSFP",
+            "device_type": "QSFP28",
             "device_name": "PORT3",
             "device_parent": "MUX3"
         },
@@ -1613,7 +1654,7 @@
     },
     "PORT4": {
         "dev_info": {
-            "device_type": "QSFP",
+            "device_type": "QSFP28",
             "device_name": "PORT4",
             "device_parent": "MUX3"
         },
@@ -1712,7 +1753,7 @@
     },
     "PORT5": {
         "dev_info": {
-            "device_type": "QSFP",
+            "device_type": "QSFP28",
             "device_name": "PORT5",
             "device_parent": "MUX3"
         },
@@ -1811,7 +1852,7 @@
     },
     "PORT6": {
         "dev_info": {
-            "device_type": "QSFP",
+            "device_type": "QSFP28",
             "device_name": "PORT6",
             "device_parent": "MUX3"
         },
@@ -1910,7 +1951,7 @@
     },
     "PORT7": {
         "dev_info": {
-            "device_type": "QSFP",
+            "device_type": "QSFP28",
             "device_name": "PORT7",
             "device_parent": "MUX3"
         },
@@ -2009,7 +2050,7 @@
     },
     "PORT8": {
         "dev_info": {
-            "device_type": "QSFP",
+            "device_type": "QSFP28",
             "device_name": "PORT8",
             "device_parent": "MUX3"
         },
@@ -2108,7 +2149,7 @@
     },
     "PORT9": {
         "dev_info": {
-            "device_type": "QSFP",
+            "device_type": "QSFP28",
             "device_name": "PORT9",
             "device_parent": "MUX4"
         },
@@ -2207,7 +2248,7 @@
     },
     "PORT10": {
         "dev_info": {
-            "device_type": "QSFP",
+            "device_type": "QSFP28",
             "device_name": "PORT10",
             "device_parent": "MUX4"
         },
@@ -2306,7 +2347,7 @@
     },
     "PORT11": {
         "dev_info": {
-            "device_type": "QSFP",
+            "device_type": "QSFP28",
             "device_name": "PORT11",
             "device_parent": "MUX4"
         },
@@ -2405,7 +2446,7 @@
     },
     "PORT12": {
         "dev_info": {
-            "device_type": "QSFP",
+            "device_type": "QSFP28",
             "device_name": "PORT12",
             "device_parent": "MUX4"
         },
@@ -2504,7 +2545,7 @@
     },
     "PORT13": {
         "dev_info": {
-            "device_type": "QSFP",
+            "device_type": "QSFP28",
             "device_name": "PORT13",
             "device_parent": "MUX4"
         },
@@ -2603,7 +2644,7 @@
     },
     "PORT14": {
         "dev_info": {
-            "device_type": "QSFP",
+            "device_type": "QSFP28",
             "device_name": "PORT14",
             "device_parent": "MUX4"
         },
@@ -2702,7 +2743,7 @@
     },
     "PORT15": {
         "dev_info": {
-            "device_type": "QSFP",
+            "device_type": "QSFP28",
             "device_name": "PORT15",
             "device_parent": "MUX4"
         },
@@ -2801,7 +2842,7 @@
     },
     "PORT16": {
         "dev_info": {
-            "device_type": "QSFP",
+            "device_type": "QSFP28",
             "device_name": "PORT16",
             "device_parent": "MUX4"
         },
@@ -2900,7 +2941,7 @@
     },
     "PORT17": {
         "dev_info": {
-            "device_type": "QSFP",
+            "device_type": "QSFP28",
             "device_name": "PORT17",
             "device_parent": "MUX5"
         },
@@ -2999,7 +3040,7 @@
     },
     "PORT18": {
         "dev_info": {
-            "device_type": "QSFP",
+            "device_type": "QSFP28",
             "device_name": "PORT18",
             "device_parent": "MUX5"
         },
@@ -3098,7 +3139,7 @@
     },
     "PORT19": {
         "dev_info": {
-            "device_type": "QSFP",
+            "device_type": "QSFP28",
             "device_name": "PORT19",
             "device_parent": "MUX5"
         },
@@ -3197,7 +3238,7 @@
     },
     "PORT20": {
         "dev_info": {
-            "device_type": "QSFP",
+            "device_type": "QSFP28",
             "device_name": "PORT20",
             "device_parent": "MUX5"
         },
@@ -3296,7 +3337,7 @@
     },
     "PORT21": {
         "dev_info": {
-            "device_type": "QSFP",
+            "device_type": "QSFP28",
             "device_name": "PORT21",
             "device_parent": "MUX5"
         },
@@ -3395,7 +3436,7 @@
     },
     "PORT22": {
         "dev_info": {
-            "device_type": "QSFP",
+            "device_type": "QSFP28",
             "device_name": "PORT22",
             "device_parent": "MUX5"
         },
@@ -3494,7 +3535,7 @@
     },
     "PORT23": {
         "dev_info": {
-            "device_type": "QSFP",
+            "device_type": "QSFP28",
             "device_name": "PORT23",
             "device_parent": "MUX5"
         },
@@ -3591,17 +3632,17 @@
             ]
         }
     },
-        "PORT24": {
-                "dev_info": {
-                        "device_type": "QSFP",
-                        "device_name": "PORT24",
-                        "device_parent": "MUX5"
-                },
-                "dev_attr": {
-                        "dev_idx": "24"
-                },
-                "i2c": {
-                        "interface": [
+    "PORT24": {
+        "dev_info": {
+            "device_type": "QSFP28",
+            "device_name": "PORT24",
+            "device_parent": "MUX5"
+        },
+        "dev_attr": {
+            "dev_idx": "24"
+        },
+        "i2c": {
+            "interface": [
                 {
                         "itf": "eeprom",
                         "dev": "PORT24-EEPROM"
@@ -3610,9 +3651,9 @@
                         "itf": "control",
                         "dev": "PORT24-CTRL"
                 }
-                        ]
-                }
-        },
+            ]
+        }
+    },
     "PORT24-EEPROM": {
         "dev_info": {
             "device_type": "",
@@ -3692,7 +3733,7 @@
     },
     "PORT25": {
         "dev_info": {
-            "device_type": "QSFP",
+            "device_type": "QSFP28",
             "device_name": "PORT25",
             "device_parent": "MUX6"
         },
@@ -3791,7 +3832,7 @@
     },
     "PORT26": {
         "dev_info": {
-            "device_type": "QSFP",
+            "device_type": "QSFP28",
             "device_name": "PORT26",
             "device_parent": "MUX6"
         },
@@ -3890,7 +3931,7 @@
     },
     "PORT27": {
         "dev_info": {
-            "device_type": "QSFP",
+            "device_type": "QSFP28",
             "device_name": "PORT27",
             "device_parent": "MUX6"
         },
@@ -3989,7 +4030,7 @@
     },
     "PORT28": {
         "dev_info": {
-            "device_type": "QSFP",
+            "device_type": "QSFP28",
             "device_name": "PORT28",
             "device_parent": "MUX6"
         },
@@ -4088,7 +4129,7 @@
     },
     "PORT29": {
         "dev_info": {
-            "device_type": "QSFP",
+            "device_type": "QSFP28",
             "device_name": "PORT29",
             "device_parent": "MUX6"
         },
@@ -4187,7 +4228,7 @@
     },
     "PORT30": {
         "dev_info": {
-            "device_type": "QSFP",
+            "device_type": "QSFP28",
             "device_name": "PORT30",
             "device_parent": "MUX6"
         },
@@ -4286,7 +4327,7 @@
     },
     "PORT31": {
         "dev_info": {
-            "device_type": "QSFP",
+            "device_type": "QSFP28",
             "device_name": "PORT31",
             "device_parent": "MUX6"
         },
@@ -4385,7 +4426,7 @@
     },
     "PORT32": {
         "dev_info": {
-            "device_type": "QSFP",
+            "device_type": "QSFP28",
             "device_name": "PORT32",
             "device_parent": "MUX6"
         },
diff --git a/device/ufispace/x86_64-ufispace_s9110_32x-r0/sensors.conf b/device/ufispace/x86_64-ufispace_s9110_32x-r0/sensors.conf
deleted file mode 100644
index 29e3604b4..000000000
--- a/device/ufispace/x86_64-ufispace_s9110_32x-r0/sensors.conf
+++ /dev/null
@@ -1 +0,0 @@
-# libsensors configuration file
\ No newline at end of file
diff --git a/device/ufispace/x86_64-ufispace_s9300_32d-r0/UFISPACE-S9300-32D/td4-s9300-32x400G.config.yml b/device/ufispace/x86_64-ufispace_s9300_32d-r0/UFISPACE-S9300-32D/td4-s9300-32x400G.config.yml
old mode 100644
new mode 100755
index a661adfdc..a96a32294
--- a/device/ufispace/x86_64-ufispace_s9300_32d-r0/UFISPACE-S9300-32D/td4-s9300-32x400G.config.yml
+++ b/device/ufispace/x86_64-ufispace_s9300_32d-r0/UFISPACE-S9300-32D/td4-s9300-32x400G.config.yml
@@ -1,4 +1,4 @@
-#r1.0.0
+#r1.0.2
 #
 # BCM56880 32x400g port configuration.
 #
@@ -26,7 +26,6 @@ device:
             CORE_CLK_FREQ: CLK_1350MHZ
             # PP CLOCK FREQUENCY
             PP_CLK_FREQ: CLK_1350MHZ
-            VARIANT: DNA_4_9_5_0
 ...
 ---
 device:
@@ -35,12 +34,6 @@ device:
             FP_ING_OPERMODE: GLOBAL_PIPE_AWARE
 ...
 ---
-device:
-    0:
-        TM_SCHEDULER_CONFIG:
-            NUM_MC_Q: NUM_MC_Q_4
-...
----
 bcm_device:
     0:
         global:
@@ -249,7 +242,7 @@ device:
                 SPEED: 400000
                 NUM_LANES: 8
                 FEC_MODE: PC_FEC_RS544_2XN
-                LINK_TRAINING: 1
+                LINK_TRAINING: 0
                 MAX_FRAME_SIZE: 9416
             ?
                 PORT_ID: [38,     # Management port 0 (Pipe 1)
diff --git a/device/ufispace/x86_64-ufispace_s9300_32d-r0/custom_led.bin b/device/ufispace/x86_64-ufispace_s9300_32d-r0/custom_led.bin
index 1cbd43d6a5f1d6e1da31a2b34dbe7888311c98b0..968e54a03e12a9bc347fef7dfde01c14da67b15b 100644
GIT binary patch
literal 716
zcmYk(Ur1A70EY4N9W}8LA`%wM<m{-SX`vP=lD5r0kq8rs6p48{8%`u7A~Zsr9ZE!^
zKO!O$5h4*0EmJ~Fmdl6`u_;j@l_4=CLL($1LLbPBE`IRv-oC4&<uWjGIcVFZqzgw*
zg~*7>3`#Y#;E2cNak}M#UG$hWp4}m3i$7Es$lm(?s((b9Wun;Ln(EpYS=Xh1usUJ!
z|21oK75TS@V-Hx_pCZB$u2(c+r08x#)h%Pv2%p)Z3A0jjnwA+hPiVs1t~tGyH|z~K
zR9}a~<+FUYMKK^{iEAdJ>eJDGJx9NZs=?T2H{|NXb2(M0C_+(`7{nnS39w-s5|M;t
zY)1-q!j4p=L4%GA>_HaxA{YCShXNeLArzq)hfxYA+&GGIRNxqnqY_o9#z~w)E$VO@
z9vCp;LjxMogtKVIIh@A@wBRBxp$+ZmfQ2jQL>Ibo4cBoKJ?KRr`Z0jpxP!YG#1QV`
zJ|5s99^o;bU=&X=hH*?Fgh{->OT5BsOk)PKh+rOX@eUubfRFf$FId7?M6rx-_>L9)
Tz)!5<7k=Xp{$d?M@IN*H$)APp

literal 356
zcmYkyJxBs!9LMqJQG3y;cPONM?lMq`kP0dqx=a6H&`@FYLfE|sS6f?+*${0xN>fdB
z(oob8*dVtQEnbsBgH6&9*w|#hwuaC0<=eQ=&?+rbf*N;$ARFd#JjF-6;Uam$HucV3
zQZ$%Wca<%&2lAw^r3bHBoAtFBigi?vtrF=8KGU_|r%t*}$yc+bB(YIeX-Y{;U-8%e
z9}ygXm5-m@`X=O9)#b9Y%>>t4Bvosda#~q)^j5)*ZlM@C!!ddUH;05`=1j*7$=<Ax
z=d&L9C>yA4P*i<#ZRw@HKp7fSU)^P@)MrblRG<qgQseP`iZRX@^Ft@}gMbLcVHy-j
p!4j;420O3^2XF`{kcR@C!xh}X1C-$zTzG>I_=Iox0nQoo!Y>}STr2<p

diff --git a/device/ufispace/x86_64-ufispace_s9300_32d-r0/installer.conf b/device/ufispace/x86_64-ufispace_s9300_32d-r0/installer.conf
index 8f9944da6..81844d3a8 100644
--- a/device/ufispace/x86_64-ufispace_s9300_32d-r0/installer.conf
+++ b/device/ufispace/x86_64-ufispace_s9300_32d-r0/installer.conf
@@ -1,4 +1,4 @@
 CONSOLE_PORT=0x3f8
 CONSOLE_DEV=0
 CONSOLE_SPEED=115200
-ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="module_blacklist=gpio_ich nomodeset pcie_aspm=off"
+ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="modprobe.blacklist=i40e,gpio_ich,qat_c3xxx nomodeset pcie_aspm=off"
diff --git a/device/ufispace/x86_64-ufispace_s9300_32d-r0/pddf/pd-plugin.json b/device/ufispace/x86_64-ufispace_s9300_32d-r0/pddf/pd-plugin.json
index 5467dad66..c741940a1 100644
--- a/device/ufispace/x86_64-ufispace_s9300_32d-r0/pddf/pd-plugin.json
+++ b/device/ufispace/x86_64-ufispace_s9300_32d-r0/pddf/pd-plugin.json
@@ -27,7 +27,7 @@
             },
             "bmc":
             {
-                "valmap": { "0x0280|":true, "0x0180|":false }
+                "valmap": { "Device Present":true, "Device Absent":false }
             }
         }, 
 		
@@ -39,7 +39,7 @@
             },
             "bmc":
             {
-                "valmap": { "0x0280|":true, "0x0180|":false }
+                "valmap": { "State Asserted":true, "State Deasserted":false }
             }        
         },
 
@@ -50,7 +50,7 @@
                 "valmap": { "F2B":"EXHAUST", "B2F":"INTAKE" }
             }
         },
-
+        "DEFAULT_TYPE": "AC",
         "PSU_FAN_MAX_SPEED":"30000"
     },
 
diff --git a/device/ufispace/x86_64-ufispace_s9300_32d-r0/pddf/pddf-device.json b/device/ufispace/x86_64-ufispace_s9300_32d-r0/pddf/pddf-device.json
index 90cf4037b..dbb64c7db 100644
--- a/device/ufispace/x86_64-ufispace_s9300_32d-r0/pddf/pddf-device.json
+++ b/device/ufispace/x86_64-ufispace_s9300_32d-r0/pddf/pddf-device.json
@@ -18,6 +18,10 @@
                 "pddf_xcvr"
             ]
         },
+        "std_perm_kos": [
+            "igb",
+            "i40e"
+        ],
         "std_kos": [
             "i2c_i801",
             "i2c_dev",
@@ -32,9 +36,12 @@
             "pddf_cpld_driver",
             "pddf_mux_module",
             "pddf_xcvr_module",
+            "pddf_fpgapci_driver",
             "pddf_xcvr_driver_module",
             "pddf_psu_driver_module",
             "pddf_psu_module",
+            "pddf_fpgai2c_module",
+            "pddf_fpgai2c_driver",
             "pddf_fan_driver_module",
             "pddf_fan_module",
             "pddf_led_module",
@@ -141,13 +148,6 @@
                         "raw": "0",
                         "field_name": "TEMP_CPU_PECI",
                         "field_pos": "18"
-                    },
-                    {
-                        "attr_name": "temp1_low_threshold",
-                        "bmc_cmd": "ipmitool sensor",
-                        "raw": "0",
-                        "field_name": "TEMP_CPU_PECI",
-                        "field_pos": "16"
                     }
                 ]
             }
@@ -185,14 +185,7 @@
                         "raw": "0",
                         "field_name": "TEMP_CPU_ENV",
                         "field_pos": "18"
-                    },
-                    {
-                        "attr_name": "temp1_low_threshold",
-                        "bmc_cmd": "ipmitool sensor",
-                        "raw": "0",
-                        "field_name": "TEMP_CPU_ENV",
-                        "field_pos": "16"
-                    }                
+                    }               
                 ]
             }
         }
@@ -229,13 +222,6 @@
                         "raw": "0",
                         "field_name": "TEMP_CPU_ENV_2",
                         "field_pos": "18"
-                    },
-                    {
-                        "attr_name": "temp1_low_threshold",
-                        "bmc_cmd": "ipmitool sensor",
-                        "raw": "0",
-                        "field_name": "TEMP_CPU_ENV_2",
-                        "field_pos": "16"
                     }
                 ]
             }
@@ -273,13 +259,6 @@
                         "raw": "0",
                         "field_name": "TEMP_MAC_ENV",
                         "field_pos": "18"
-                    },
-                    {
-                        "attr_name": "temp1_low_threshold",
-                        "bmc_cmd": "ipmitool sensor",
-                        "raw": "0",
-                        "field_name": "TEMP_MAC_ENV",
-                        "field_pos": "16"
                     }
                 ]
             }
@@ -317,13 +296,6 @@
                         "raw": "0",
                         "field_name": "TEMP_MAC_DIE",
                         "field_pos": "18"
-                    },
-                    {
-                        "attr_name": "temp1_low_threshold",
-                        "bmc_cmd": "ipmitool sensor",
-                        "raw": "0",
-                        "field_name": "TEMP_MAC_DIE",
-                        "field_pos": "16"
                     }
                 ]
             }
@@ -361,13 +333,6 @@
                         "raw": "0",
                         "field_name": "TEMP_CAGE",
                         "field_pos": "18"
-                    },
-                    {
-                        "attr_name": "temp1_low_threshold",
-                        "bmc_cmd": "ipmitool sensor",
-                        "raw": "0",
-                        "field_name": "TEMP_CAGE",
-                        "field_pos": "16"
                     }
                 ]
             }
@@ -405,13 +370,6 @@
                         "raw": "0",
                         "field_name": "TEMP_PSU_CONN",
                         "field_pos": "18"
-                    },
-                    {
-                        "attr_name": "temp1_low_threshold",
-                        "bmc_cmd": "ipmitool sensor",
-                        "raw": "0",
-                        "field_name": "TEMP_PSU_CONN",
-                        "field_pos": "16"
                     }
                 ]
             }
@@ -1116,72 +1074,96 @@
                 "attr_list": [
                     {
                         "attr_name": "psu_present",
-                        "bmc_cmd": "ipmitool sensor",
+                        "bmc_cmd": "ipmitool sdr -c get PSU0_PRSNT_L | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
                         "raw": "0",
                         "field_name": "PSU0_PRSNT_L",
-                        "field_pos": "7"
+                        "field_pos": "5",
+                        "separator": ","
                     },
                     {
                         "attr_name": "psu_power_good",
-                        "bmc_cmd": "ipmitool sensor",
+                        "bmc_cmd": "ipmitool sdr -c get PSU0_PWROK_H | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
                         "raw": "0",
                         "field_name": "PSU0_PWROK_H",
-                        "field_pos": "7"
+                        "field_pos": "5",
+                        "separator": ","
                     },
                     {
                         "attr_name": "psu_v_out",
-                        "bmc_cmd": "ipmitool sensor",
+                        "bmc_cmd": "ipmitool sdr -c get PSU0_VOUT | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
                         "raw": "0",
                         "field_name": "PSU0_VOUT",
-                        "field_pos": "3",
-                        "mult": "1000"
+                        "field_pos": "2",
+                        "mult": "1000",
+                        "separator": ","
                     },
                     {
                         "attr_name": "psu_i_out",
-                        "bmc_cmd": "ipmitool sensor",
+                        "bmc_cmd": "ipmitool sdr -c get PSU0_IOUT | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
                         "raw": "0",
                         "field_name": "PSU0_IOUT",
-                        "field_pos": "3",
+                        "field_pos": "2",
+                        "mult": "1000",
+                        "separator": ","
+                    },
+                    {
+                        "attr_name": "psu_v_in",
+                        "bmc_cmd": "ipmitool sdr get -c PSU0_VIN | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "PSU0_VIN",
+                        "field_pos": "2",
+                        "mult": "1000"
+                    },
+                    {
+                        "attr_name": "psu_i_in",
+                        "bmc_cmd": "ipmitool sdr get -c PSU0_IIN | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "PSU0_IIN",
+                        "field_pos": "2",
                         "mult": "1000"
                     },
                     {
                         "attr_name": "psu_temp1_input",
-                        "bmc_cmd": "ipmitool sensor",
+                        "bmc_cmd": "ipmitool sdr -c get PSU0_TEMP | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
                         "raw": "0",
                         "field_name": "PSU0_TEMP",
-                        "field_pos": "3",
-                        "mult": "1000"
+                        "field_pos": "2",
+                        "mult": "1000",
+                        "separator": ","
                     },
                     {
                         "attr_name": "psu_fan1_speed_rpm",
-                        "bmc_cmd": "ipmitool sensor",
+                        "bmc_cmd": "ipmitool sdr -c get PSU0_FAN1 | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
                         "raw": "0",
                         "field_name": "PSU0_FAN1",
-                        "field_pos": "3"
+                        "field_pos": "2",
+                        "separator": ","
                     },
                     {
                         "attr_name": "psu_mfr_id",
-                        "bmc_cmd": "ipmitool fru print 1 | tr -s ' ' | cut -d' ' -f3-5",
+                        "bmc_cmd": "_rv=$(ipmitool fru print 1 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Manufacturer') && echo $_rv || echo 'Manufacturer : N/A'",
                         "raw": "0",
+                        "separator": ":",
                         "field_name": "Manufacturer",
-                        "field_pos": "3",
-                        "delimiter": ":"
+                        "field_pos": "2"
                     },
                     {
                         "attr_name": "psu_model_name",
-                        "bmc_cmd": "ipmitool fru print 1 | tr -s ' ' | cut -d' ' -f3-5",
+                        "bmc_cmd": "_rv=$(ipmitool fru print 1 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Name') && echo $_rv || echo 'Name : N/A'",
                         "raw": "0",
+                        "separator": ":",
                         "field_name": "Name",
-                        "field_pos": "3",
-                        "delimiter": ":"
+                        "field_pos": "2"
                     },
                     {
                         "attr_name": "psu_serial_num",
-                        "bmc_cmd": "ipmitool fru print 1 | tr -s ' ' | cut -d' ' -f3-5",
+                        "bmc_cmd": "_rv=$(ipmitool fru print 1 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Serial') && echo $_rv || echo 'Serial : N/A'",
                         "raw": "0",
+                        "separator": ":",
                         "field_name": "Serial",
-                        "field_pos": "3",
-                        "delimiter": ":"
+                        "field_pos": "2"
                     },
                     {
                         "attr_name": "psu_fan1_dir",
@@ -1211,72 +1193,96 @@
                 "attr_list": [
                     {
                         "attr_name": "psu_present",
-                        "bmc_cmd": "ipmitool sensor",
+                        "bmc_cmd": "ipmitool sdr -c get PSU1_PRSNT_L | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
                         "raw": "0",
                         "field_name": "PSU1_PRSNT_L",
-                        "field_pos": "7"
+                        "field_pos": "5",
+                        "separator": ","
                     },
                     {
                         "attr_name": "psu_power_good",
-                        "bmc_cmd": "ipmitool sensor",
+                        "bmc_cmd": "ipmitool sdr -c get PSU1_PWROK_H | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
                         "raw": "0",
                         "field_name": "PSU1_PWROK_H",
-                        "field_pos": "7"
+                        "field_pos": "5",
+                        "separator": ","
                     },
                     {
                         "attr_name": "psu_v_out",
-                        "bmc_cmd": "ipmitool sensor",
+                        "bmc_cmd": "ipmitool sdr -c get PSU1_VOUT | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
                         "raw": "0",
                         "field_name": "PSU1_VOUT",
-                        "field_pos": "3",
-                        "mult": "1000"
+                        "field_pos": "2",
+                        "mult": "1000",
+                        "separator": ","
                     },
                     {
                         "attr_name": "psu_i_out",
-                        "bmc_cmd": "ipmitool sensor",
+                        "bmc_cmd": "ipmitool sdr -c get PSU1_IOUT | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
                         "raw": "0",
                         "field_name": "PSU1_IOUT",
-                        "field_pos": "3",
+                        "field_pos": "2",
+                        "mult": "1000",
+                        "separator": ","
+                    },
+                    {
+                        "attr_name": "psu_v_in",
+                        "bmc_cmd": "ipmitool sdr get -c PSU1_VIN | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "PSU1_VIN",
+                        "field_pos": "2",
+                        "mult": "1000"
+                    },
+                    {
+                        "attr_name": "psu_i_in",
+                        "bmc_cmd": "ipmitool sdr get -c PSU1_IIN | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "PSU1_IIN",
+                        "field_pos": "2",
                         "mult": "1000"
                     },
                     {
                         "attr_name": "psu_temp1_input",
-                        "bmc_cmd": "ipmitool sensor",
+                        "bmc_cmd": "ipmitool sdr -c get PSU1_TEMP | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
                         "raw": "0",
                         "field_name": "PSU1_TEMP",
-                        "field_pos": "3",
-                        "mult": "1000"
+                        "field_pos": "2",
+                        "mult": "1000",
+                        "separator": ","
                     },
                     {
                         "attr_name": "psu_fan1_speed_rpm",
-                        "bmc_cmd": "ipmitool sensor",
+                        "bmc_cmd": "ipmitool sdr -c get PSU1_FAN1 | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
                         "raw": "0",
                         "field_name": "PSU1_FAN1",
-                        "field_pos": "3"
+                        "field_pos": "2",
+                        "separator": ","
                     },
                     {
                         "attr_name": "psu_mfr_id",
-                        "bmc_cmd": "ipmitool fru print 2 | tr -s ' ' | cut -d' ' -f3-5",
+                        "bmc_cmd": "_rv=$(ipmitool fru print 2 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Manufacturer') && echo $_rv || echo 'Manufacturer : N/A'",
                         "raw": "0",
+                        "separator": ":",
                         "field_name": "Manufacturer",
-                        "field_pos": "3",
-                        "delimiter": ":"
+                        "field_pos": "2"
                     },
                     {
                         "attr_name": "psu_model_name",
-                        "bmc_cmd": "ipmitool fru print 2 | tr -s ' ' | cut -d' ' -f3-5",
+                        "bmc_cmd": "_rv=$(ipmitool fru print 2 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Name') && echo $_rv || echo 'Name : N/A'",
                         "raw": "0",
+                        "separator": ":",
                         "field_name": "Name",
-                        "field_pos": "3",
-                        "delimiter": ":"
+                        "field_pos": "2"
                     },
                     {
                         "attr_name": "psu_serial_num",
-                        "bmc_cmd": "ipmitool fru print 2 | tr -s ' ' | cut -d' ' -f3-5",
+                        "bmc_cmd": "_rv=$(ipmitool fru print 2 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Serial') && echo $_rv || echo 'Serial : N/A'",
                         "raw": "0",
+                        "separator": ":",
                         "field_name": "Serial",
-                        "field_pos": "3",
-                        "delimiter": ":"
+                        "field_pos": "2"
                     },
                     {
                         "attr_name": "psu_fan1_dir",
@@ -1679,7 +1685,7 @@
             ]
         }
     },
-    "ID_LED": {
+    "LOC_LED": {
         "dev_info": {
             "device_type": "LED",
             "device_name": "LOC_LED"
diff --git a/device/ufispace/x86_64-ufispace_s9300_32d-r0/platform_components.json b/device/ufispace/x86_64-ufispace_s9300_32d-r0/platform_components.json
new file mode 100644
index 000000000..30f8635ca
--- /dev/null
+++ b/device/ufispace/x86_64-ufispace_s9300_32d-r0/platform_components.json
@@ -0,0 +1,13 @@
+{
+    "chassis": {
+        "x86_64-ufispace_s9300_32d-r0": {
+            "component": {
+                "CPLD1": { },
+                "CPLD2": { },
+                "CPLD3": { },
+                "BIOS": { },
+                "BMC": {}
+            }
+        }
+    }
+}
diff --git a/device/ufispace/x86_64-ufispace_s9301_32d-r0/UFISPACE-S9301-32D/hwsku.json b/device/ufispace/x86_64-ufispace_s9301_32d-r0/UFISPACE-S9301-32D/hwsku.json
new file mode 100644
index 000000000..066985e74
--- /dev/null
+++ b/device/ufispace/x86_64-ufispace_s9301_32d-r0/UFISPACE-S9301-32D/hwsku.json
@@ -0,0 +1,140 @@
+{
+    "interfaces": {
+        "Ethernet0": {
+            "default_brkout_mode": "1x400G"
+        },
+
+        "Ethernet8": {
+            "default_brkout_mode": "1x400G"
+        },
+
+        "Ethernet16": {
+            "default_brkout_mode": "1x400G"
+        },
+
+        "Ethernet24": {
+            "default_brkout_mode": "1x400G"
+        },
+
+        "Ethernet32": {
+            "default_brkout_mode": "1x400G"
+        },
+
+        "Ethernet40": {
+            "default_brkout_mode": "1x400G"
+        },
+
+        "Ethernet48": {
+            "default_brkout_mode": "1x400G"
+        },
+
+        "Ethernet56": {
+            "default_brkout_mode": "1x400G"
+        },
+
+        "Ethernet64": {
+            "default_brkout_mode": "1x400G"
+        },
+
+        "Ethernet72": {
+            "default_brkout_mode": "1x400G"
+        },
+
+        "Ethernet80": {
+            "default_brkout_mode": "1x400G"
+        },
+
+        "Ethernet88": {
+            "default_brkout_mode": "1x400G"
+        },
+
+        "Ethernet96": {
+            "default_brkout_mode": "1x400G"
+        },
+
+        "Ethernet104": {
+            "default_brkout_mode": "1x400G"
+        },
+
+        "Ethernet112": {
+            "default_brkout_mode": "1x400G"
+        },
+
+        "Ethernet120": {
+            "default_brkout_mode": "1x400G"
+        },
+
+        "Ethernet128": {
+            "default_brkout_mode": "1x400G"
+        },
+
+        "Ethernet136": {
+            "default_brkout_mode": "1x400G"
+        },
+
+        "Ethernet144": {
+            "default_brkout_mode": "1x400G"
+        },
+
+        "Ethernet152": {
+            "default_brkout_mode": "1x400G"
+        },
+
+        "Ethernet160": {
+            "default_brkout_mode": "1x400G"
+        },
+
+        "Ethernet168": {
+            "default_brkout_mode": "1x400G"
+        },
+
+        "Ethernet176": {
+            "default_brkout_mode": "1x400G"
+        },
+
+        "Ethernet184": {
+            "default_brkout_mode": "1x400G"
+        },
+
+        "Ethernet192": {
+            "default_brkout_mode": "1x400G"
+        },
+
+        "Ethernet200": {
+            "default_brkout_mode": "1x400G"
+        },
+
+        "Ethernet208": {
+            "default_brkout_mode": "1x400G"
+        },
+
+        "Ethernet216": {
+            "default_brkout_mode": "1x400G"
+        },
+
+        "Ethernet224": {
+            "default_brkout_mode": "1x400G"
+        },
+
+        "Ethernet232": {
+            "default_brkout_mode": "1x400G"
+        },
+
+        "Ethernet240": {
+            "default_brkout_mode": "1x400G"
+        },
+
+        "Ethernet248": {
+            "default_brkout_mode": "1x400G"
+        },
+
+        "Ethernet256": {
+            "default_brkout_mode": "1x10G"
+        },
+
+        "Ethernet257": {
+            "default_brkout_mode": "1x10G"
+        }
+    }
+}
+
diff --git a/device/ufispace/x86_64-ufispace_s9301_32d-r0/UFISPACE-S9301-32D/port_config.ini b/device/ufispace/x86_64-ufispace_s9301_32d-r0/UFISPACE-S9301-32D/port_config.ini
new file mode 100644
index 000000000..9bbc85e11
--- /dev/null
+++ b/device/ufispace/x86_64-ufispace_s9301_32d-r0/UFISPACE-S9301-32D/port_config.ini
@@ -0,0 +1,35 @@
+# name         lanes                              alias           index    speed
+Ethernet0      1,2,3,4,5,6,7,8                    Ethernet1/1      0       400000
+Ethernet8      9,10,11,12,13,14,15,16             Ethernet2/1      1       400000
+Ethernet16     17,18,19,20,21,22,23,24            Ethernet3/1      2       400000
+Ethernet24     25,26,27,28,29,30,31,32            Ethernet4/1      3       400000
+Ethernet32     33,34,35,36,37,38,39,40            Ethernet5/1      4       400000
+Ethernet40     41,42,43,44,45,46,47,48            Ethernet6/1      5       400000
+Ethernet48     49,50,51,52,53,54,55,56            Ethernet7/1      6       400000
+Ethernet56     57,58,59,60,61,62,63,64            Ethernet8/1      7       400000
+Ethernet64     65,66,67,68,69,70,71,72            Ethernet9/1      8       400000
+Ethernet72     73,74,75,76,77,78,79,80            Ethernet10/1     9       400000
+Ethernet80     81,82,83,84,85,86,87,88            Ethernet11/1    10       400000
+Ethernet88     89,90,91,92,93,94,95,96            Ethernet12/1    11       400000
+Ethernet96     97,98,99,100,101,102,103,104       Ethernet13/1    12       400000
+Ethernet104    105,106,107,108,109,110,111,112    Ethernet14/1    13       400000
+Ethernet112    113,114,115,116,117,118,119,120    Ethernet15/1    14       400000
+Ethernet120    121,122,123,124,125,126,127,128    Ethernet16/1    15       400000
+Ethernet128    129,130,131,132,133,134,135,136    Ethernet17/1    16       400000
+Ethernet136    137,138,139,140,141,142,143,144    Ethernet18/1    17       400000
+Ethernet144    145,146,147,148,149,150,151,152    Ethernet19/1    18       400000
+Ethernet152    153,154,155,156,157,158,159,160    Ethernet20/1    19       400000
+Ethernet160    161,162,163,164,165,166,167,168    Ethernet21/1    20       400000
+Ethernet168    169,170,171,172,173,174,175,176    Ethernet22/1    21       400000
+Ethernet176    177,178,179,180,181,182,183,184    Ethernet23/1    22       400000
+Ethernet184    185,186,187,188,189,190,191,192    Ethernet24/1    23       400000
+Ethernet192    193,194,195,196,197,198,199,200    Ethernet25/1    24       400000
+Ethernet200    201,202,203,204,205,206,207,208    Ethernet26/1    25       400000
+Ethernet208    209,210,211,212,213,214,215,216    Ethernet27/1    26       400000
+Ethernet216    217,218,219,220,221,222,223,224    Ethernet28/1    27       400000
+Ethernet224    225,226,227,228,229,230,231,232    Ethernet29/1    28       400000
+Ethernet232    233,234,235,236,237,238,239,240    Ethernet30/1    29       400000
+Ethernet240    241,242,243,244,245,246,247,248    Ethernet31/1    30       400000
+Ethernet248    249,250,251,252,253,254,255,256    Ethernet32/1    31       400000
+Ethernet256    257                                Ethernet33      32        10000
+Ethernet257    258                                Ethernet34      33        10000
diff --git a/device/ufispace/x86_64-ufispace_s9301_32d-r0/UFISPACE-S9301-32D/sai.profile b/device/ufispace/x86_64-ufispace_s9301_32d-r0/UFISPACE-S9301-32D/sai.profile
new file mode 100644
index 000000000..19d521413
--- /dev/null
+++ b/device/ufispace/x86_64-ufispace_s9301_32d-r0/UFISPACE-S9301-32D/sai.profile
@@ -0,0 +1 @@
+SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th3-s9301-32x400G.config.bcm
diff --git a/device/ufispace/x86_64-ufispace_s9301_32d-r0/UFISPACE-S9301-32D/th3-s9301-32x400G.config.bcm b/device/ufispace/x86_64-ufispace_s9301_32d-r0/UFISPACE-S9301-32D/th3-s9301-32x400G.config.bcm
new file mode 100644
index 000000000..6f6e84b4d
--- /dev/null
+++ b/device/ufispace/x86_64-ufispace_s9301_32d-r0/UFISPACE-S9301-32D/th3-s9301-32x400G.config.bcm
@@ -0,0 +1,284 @@
+# r1.0.0
+sai_tunnel_global_sip_mask_enable=1
+bcm_tunnel_term_compatible_mode=1
+sai_tunnel_support=0
+
+pbmp_xport_xe.0=0x8ffff8ffffcffff8ffff8ffff8ffffcffff9fffe
+
+ccm_dma_enable=0
+ccmdma_intr_enable=0
+mem_cache_enable=0
+parity_correction=0
+parity_enable=0
+phy_enable=0
+phy_null=1
+
+core_clock_frequency=1325
+dpr_clock_frequency=1000
+device_clock_frequency=1325
+port_flex_enable=1
+load_firmware=0x2
+
+portmap_1=1:400
+portmap_5=9:400
+portmap_9=17:400
+portmap_13=25:400
+
+portmap_19=259:10
+
+portmap_20=33:400
+portmap_24=41:400
+portmap_28=49:400
+portmap_32=57:400
+
+portmap_38=257:10
+#portmap_38=257:10:1
+
+portmap_39=260:10
+
+portmap_40=65:400
+portmap_44=73:400
+portmap_48=81:400
+portmap_52=89:400
+
+portmap_59=261:10
+
+portmap_60=97:400
+portmap_64=105:400
+portmap_68=113:400
+portmap_72=121:400
+
+portmap_79=262:10
+
+portmap_80=129:400
+portmap_84=137:400
+portmap_88=145:400
+portmap_92=153:400
+
+portmap_99=263:10
+
+portmap_100=161:400
+portmap_104=169:400
+portmap_108=177:400
+portmap_112=185:400
+
+portmap_118=258:10
+#portmap_118=258:10:1
+
+portmap_119=264:10
+
+portmap_120=193:400
+portmap_124=201:400
+portmap_128=209:400
+portmap_132=217:400
+
+portmap_139=265:10
+
+portmap_140=225:400
+portmap_144=233:400
+portmap_148=241:400
+portmap_152=249:400
+
+portmap_159=266:10
+
+port_fec_cd=9
+
+
+phy_chain_rx_lane_map_physical{1}=0x60357412
+phy_chain_tx_lane_map_physical{1}=0x02537164
+serdes_core_rx_polarity_flip_physical{1}=0x53
+serdes_core_tx_polarity_flip_physical{1}=0xa5
+
+phy_chain_rx_lane_map_physical{9}=0x31472056
+phy_chain_tx_lane_map_physical{9}=0x51306274
+serdes_core_rx_polarity_flip_physical{9}=0x1e
+serdes_core_tx_polarity_flip_physical{9}=0x7d
+
+phy_chain_rx_lane_map_physical{17}=0x21347065
+phy_chain_tx_lane_map_physical{17}=0x73046512
+serdes_core_rx_polarity_flip_physical{17}=0x78
+serdes_core_tx_polarity_flip_physical{17}=0x1d
+
+phy_chain_rx_lane_map_physical{25}=0x36507124
+phy_chain_tx_lane_map_physical{25}=0x45102736
+serdes_core_rx_polarity_flip_physical{25}=0xb0
+serdes_core_tx_polarity_flip_physical{25}=0x46
+
+phy_chain_rx_lane_map_physical{33}=0x27603145
+phy_chain_tx_lane_map_physical{33}=0x06372514
+serdes_core_rx_polarity_flip_physical{33}=0x24
+serdes_core_tx_polarity_flip_physical{33}=0x66
+
+phy_chain_rx_lane_map_physical{41}=0x20643175
+phy_chain_tx_lane_map_physical{41}=0x65107423
+serdes_core_rx_polarity_flip_physical{41}=0xc3
+serdes_core_tx_polarity_flip_physical{41}=0x5a
+
+phy_chain_rx_lane_map_physical{49}=0x20653174
+phy_chain_tx_lane_map_physical{49}=0x65217043
+serdes_core_rx_polarity_flip_physical{49}=0x27
+serdes_core_tx_polarity_flip_physical{49}=0x92
+
+phy_chain_rx_lane_map_physical{57}=0x23417065
+phy_chain_tx_lane_map_physical{57}=0x46102735
+serdes_core_rx_polarity_flip_physical{57}=0x8d
+serdes_core_tx_polarity_flip_physical{57}=0x17
+
+phy_chain_rx_lane_map_physical{65}=0x32406175
+phy_chain_tx_lane_map_physical{65}=0x26073415
+serdes_core_rx_polarity_flip_physical{65}=0xa6
+serdes_core_tx_polarity_flip_physical{65}=0x4b
+
+phy_chain_rx_lane_map_physical{73}=0x30642175
+phy_chain_tx_lane_map_physical{73}=0x76415230
+serdes_core_rx_polarity_flip_physical{73}=0x4b
+serdes_core_tx_polarity_flip_physical{73}=0x8f
+
+phy_chain_rx_lane_map_physical{81}=0x21743065
+phy_chain_tx_lane_map_physical{81}=0x42507361
+serdes_core_rx_polarity_flip_physical{81}=0x50
+serdes_core_tx_polarity_flip_physical{81}=0xb2
+
+phy_chain_rx_lane_map_physical{89}=0x23407165
+phy_chain_tx_lane_map_physical{89}=0x30147625
+serdes_core_rx_polarity_flip_physical{89}=0x99
+serdes_core_tx_polarity_flip_physical{89}=0x0b
+
+phy_chain_rx_lane_map_physical{97}=0x10652437
+phy_chain_tx_lane_map_physical{97}=0x76352014
+serdes_core_rx_polarity_flip_physical{97}=0xac
+serdes_core_tx_polarity_flip_physical{97}=0xe6
+
+phy_chain_rx_lane_map_physical{105}=0x74306521
+phy_chain_tx_lane_map_physical{105}=0x73046215
+serdes_core_rx_polarity_flip_physical{105}=0x96
+serdes_core_tx_polarity_flip_physical{105}=0xaf
+
+phy_chain_rx_lane_map_physical{113}=0x02741365
+phy_chain_tx_lane_map_physical{113}=0x60425371
+serdes_core_rx_polarity_flip_physical{113}=0x14
+serdes_core_tx_polarity_flip_physical{113}=0xa5
+
+phy_chain_rx_lane_map_physical{121}=0x76241503
+phy_chain_tx_lane_map_physical{121}=0x76541320
+serdes_core_rx_polarity_flip_physical{121}=0x59
+serdes_core_tx_polarity_flip_physical{121}=0x5f
+
+phy_chain_rx_lane_map_physical{129}=0x67351402
+phy_chain_tx_lane_map_physical{129}=0x61047253
+serdes_core_rx_polarity_flip_physical{129}=0x59
+serdes_core_tx_polarity_flip_physical{129}=0x63
+
+phy_chain_rx_lane_map_physical{137}=0x21743065
+phy_chain_tx_lane_map_physical{137}=0x61405372
+serdes_core_rx_polarity_flip_physical{137}=0xa5
+serdes_core_tx_polarity_flip_physical{137}=0x31
+
+phy_chain_rx_lane_map_physical{145}=0x21743065
+phy_chain_tx_lane_map_physical{145}=0x76503214
+serdes_core_rx_polarity_flip_physical{145}=0x50
+serdes_core_tx_polarity_flip_physical{145}=0x46
+
+phy_chain_rx_lane_map_physical{153}=0x10652437
+phy_chain_tx_lane_map_physical{153}=0x42537160
+serdes_core_rx_polarity_flip_physical{153}=0x59
+serdes_core_tx_polarity_flip_physical{153}=0x63
+
+phy_chain_rx_lane_map_physical{161}=0x76125340
+phy_chain_tx_lane_map_physical{161}=0x25043716
+serdes_core_rx_polarity_flip_physical{161}=0x6c
+serdes_core_tx_polarity_flip_physical{161}=0x1e
+
+phy_chain_rx_lane_map_physical{169}=0x20743165
+phy_chain_tx_lane_map_physical{169}=0x41507263
+serdes_core_rx_polarity_flip_physical{169}=0xe1
+serdes_core_tx_polarity_flip_physical{169}=0x36
+
+phy_chain_rx_lane_map_physical{177}=0x30742165
+phy_chain_tx_lane_map_physical{177}=0x74036125
+serdes_core_rx_polarity_flip_physical{177}=0x9c
+serdes_core_tx_polarity_flip_physical{177}=0x58
+
+phy_chain_rx_lane_map_physical{185}=0x23406175
+phy_chain_tx_lane_map_physical{185}=0x63127450
+serdes_core_rx_polarity_flip_physical{185}=0x93
+serdes_core_tx_polarity_flip_physical{185}=0x11
+
+phy_chain_rx_lane_map_physical{193}=0x23507164
+phy_chain_tx_lane_map_physical{193}=0x75140326
+serdes_core_rx_polarity_flip_physical{193}=0x4d
+serdes_core_tx_polarity_flip_physical{193}=0x30
+
+phy_chain_rx_lane_map_physical{201}=0x20743165
+phy_chain_tx_lane_map_physical{201}=0x13640275
+serdes_core_rx_polarity_flip_physical{201}=0xe1
+serdes_core_tx_polarity_flip_physical{201}=0x05
+
+phy_chain_rx_lane_map_physical{209}=0x30742165
+phy_chain_tx_lane_map_physical{209}=0x03645271
+serdes_core_rx_polarity_flip_physical{209}=0x9c
+serdes_core_tx_polarity_flip_physical{209}=0x74
+
+phy_chain_rx_lane_map_physical{217}=0x32604175
+phy_chain_tx_lane_map_physical{217}=0x46213750
+serdes_core_rx_polarity_flip_physical{217}=0x53
+serdes_core_tx_polarity_flip_physical{217}=0x2d
+
+phy_chain_rx_lane_map_physical{225}=0x23471605
+phy_chain_tx_lane_map_physical{225}=0x16304725
+serdes_core_rx_polarity_flip_physical{225}=0x66
+serdes_core_tx_polarity_flip_physical{225}=0xef
+
+phy_chain_rx_lane_map_physical{233}=0x63051274
+phy_chain_tx_lane_map_physical{233}=0x73046251
+serdes_core_rx_polarity_flip_physical{233}=0x9c
+serdes_core_tx_polarity_flip_physical{233}=0xae
+
+phy_chain_rx_lane_map_physical{241}=0x21473056
+phy_chain_tx_lane_map_physical{241}=0x74503261
+serdes_core_rx_polarity_flip_physical{241}=0x63
+serdes_core_tx_polarity_flip_physical{241}=0x4e
+
+phy_chain_rx_lane_map_physical{249}=0x76341502
+phy_chain_tx_lane_map_physical{249}=0x45603271
+serdes_core_rx_polarity_flip_physical{249}=0x78
+serdes_core_tx_polarity_flip_physical{249}=0x03
+
+
+dport_map_enable=1
+
+dport_map_port_1=0
+dport_map_port_5=1
+dport_map_port_9=2
+dport_map_port_13=3
+dport_map_port_20=4
+dport_map_port_24=5
+dport_map_port_28=6
+dport_map_port_32=7
+dport_map_port_40=8
+dport_map_port_44=9
+dport_map_port_48=10
+dport_map_port_52=11
+dport_map_port_60=12
+dport_map_port_64=13
+dport_map_port_68=14
+dport_map_port_72=15
+dport_map_port_80=16
+dport_map_port_84=17
+dport_map_port_88=18
+dport_map_port_92=19
+dport_map_port_100=20
+dport_map_port_104=21
+dport_map_port_108=22
+dport_map_port_112=23
+dport_map_port_120=24
+dport_map_port_124=25
+dport_map_port_128=26
+dport_map_port_132=27
+dport_map_port_140=28
+dport_map_port_144=29
+dport_map_port_148=30
+dport_map_port_152=31
+
+dport_map_port_38=32
+dport_map_port_118=33
\ No newline at end of file
diff --git a/device/ufispace/x86_64-ufispace_s9301_32d-r0/cmicx_customer_led.bin b/device/ufispace/x86_64-ufispace_s9301_32d-r0/cmicx_customer_led.bin
new file mode 100644
index 0000000000000000000000000000000000000000..1cbd43d6a5f1d6e1da31a2b34dbe7888311c98b0
GIT binary patch
literal 356
zcmYkyJxBs!9LMqJQG3y;cPONM?lMq`kP0dqx=a6H&`@FYLfE|sS6f?+*${0xN>fdB
z(oob8*dVtQEnbsBgH6&9*w|#hwuaC0<=eQ=&?+rbf*N;$ARFd#JjF-6;Uam$HucV3
zQZ$%Wca<%&2lAw^r3bHBoAtFBigi?vtrF=8KGU_|r%t*}$yc+bB(YIeX-Y{;U-8%e
z9}ygXm5-m@`X=O9)#b9Y%>>t4Bvosda#~q)^j5)*ZlM@C!!ddUH;05`=1j*7$=<Ax
z=d&L9C>yA4P*i<#ZRw@HKp7fSU)^P@)MrblRG<qgQseP`iZRX@^Ft@}gMbLcVHy-j
p!4j;420O3^2XF`{kcR@C!xh}X1C-$zTzG>I_=Iox0nQoo!Y>}STr2<p

literal 0
HcmV?d00001

diff --git a/device/ufispace/x86_64-ufispace_s9301_32d-r0/default_sku b/device/ufispace/x86_64-ufispace_s9301_32d-r0/default_sku
new file mode 100644
index 000000000..90501be97
--- /dev/null
+++ b/device/ufispace/x86_64-ufispace_s9301_32d-r0/default_sku
@@ -0,0 +1 @@
+UFISPACE-S9301-32D t1
diff --git a/device/ufispace/x86_64-ufispace_s9301_32d-r0/fancontrol b/device/ufispace/x86_64-ufispace_s9301_32d-r0/fancontrol
new file mode 100644
index 000000000..1234cd994
--- /dev/null
+++ b/device/ufispace/x86_64-ufispace_s9301_32d-r0/fancontrol
@@ -0,0 +1,10 @@
+# Configuration file generated by pwmconfig, changes will be lost
+INTERVAL=10
+DEVPATH=
+DEVNAME=
+FCTEMPS=
+FCFANS=
+MINTEMP=
+MAXTEMP=
+MINSTART=
+MINSTOP=
diff --git a/device/ufispace/x86_64-ufispace_s9301_32d-r0/installer.conf b/device/ufispace/x86_64-ufispace_s9301_32d-r0/installer.conf
new file mode 100644
index 000000000..81844d3a8
--- /dev/null
+++ b/device/ufispace/x86_64-ufispace_s9301_32d-r0/installer.conf
@@ -0,0 +1,4 @@
+CONSOLE_PORT=0x3f8
+CONSOLE_DEV=0
+CONSOLE_SPEED=115200
+ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="modprobe.blacklist=i40e,gpio_ich,qat_c3xxx nomodeset pcie_aspm=off"
diff --git a/device/ufispace/x86_64-ufispace_s9301_32d-r0/led_proc_init.soc b/device/ufispace/x86_64-ufispace_s9301_32d-r0/led_proc_init.soc
new file mode 100644
index 000000000..1c9cb334d
--- /dev/null
+++ b/device/ufispace/x86_64-ufispace_s9301_32d-r0/led_proc_init.soc
@@ -0,0 +1,3 @@
+m0 load 0 0x3800 /usr/share/sonic/platform/cmicx_customer_led.bin
+led auto on
+led start
diff --git a/device/ufispace/x86_64-ufispace_s9301_32d-r0/pcie.yaml b/device/ufispace/x86_64-ufispace_s9301_32d-r0/pcie.yaml
new file mode 100644
index 000000000..ce0a45f5d
--- /dev/null
+++ b/device/ufispace/x86_64-ufispace_s9301_32d-r0/pcie.yaml
@@ -0,0 +1,742 @@
+- bus: '00'
+  dev: '00'
+  fn: '0'
+  id: '2020'
+  name: 'Host bridge: Intel Corporation Sky Lake-E DMI3 Registers (rev 04)'
+- bus: '00'
+  dev: '04'
+  fn: '0'
+  id: '2021'
+  name: 'System peripheral: Intel Corporation Sky Lake-E CBDMA Registers (rev 04)'
+- bus: '00'
+  dev: '04'
+  fn: '1'
+  id: '2021'
+  name: 'System peripheral: Intel Corporation Sky Lake-E CBDMA Registers (rev 04)'
+- bus: '00'
+  dev: '04'
+  fn: '2'
+  id: '2021'
+  name: 'System peripheral: Intel Corporation Sky Lake-E CBDMA Registers (rev 04)'
+- bus: '00'
+  dev: '04'
+  fn: '3'
+  id: '2021'
+  name: 'System peripheral: Intel Corporation Sky Lake-E CBDMA Registers (rev 04)'
+- bus: '00'
+  dev: '04'
+  fn: '4'
+  id: '2021'
+  name: 'System peripheral: Intel Corporation Sky Lake-E CBDMA Registers (rev 04)'
+- bus: '00'
+  dev: '04'
+  fn: '5'
+  id: '2021'
+  name: 'System peripheral: Intel Corporation Sky Lake-E CBDMA Registers (rev 04)'
+- bus: '00'
+  dev: '04'
+  fn: '6'
+  id: '2021'
+  name: 'System peripheral: Intel Corporation Sky Lake-E CBDMA Registers (rev 04)'
+- bus: '00'
+  dev: '04'
+  fn: '7'
+  id: '2021'
+  name: 'System peripheral: Intel Corporation Sky Lake-E CBDMA Registers (rev 04)'
+- bus: '00'
+  dev: '05'
+  fn: '0'
+  id: '2024'
+  name: 'System peripheral: Intel Corporation Sky Lake-E MM/Vt-d Configuration Registers
+    (rev 04)'
+- bus: '00'
+  dev: '05'
+  fn: '2'
+  id: '2025'
+  name: 'System peripheral: Intel Corporation Sky Lake-E RAS (rev 04)'
+- bus: '00'
+  dev: '05'
+  fn: '4'
+  id: '2026'
+  name: 'PIC: Intel Corporation Sky Lake-E IOAPIC (rev 04)'
+- bus: '00'
+  dev: 08
+  fn: '0'
+  id: '2014'
+  name: 'System peripheral: Intel Corporation Sky Lake-E Ubox Registers (rev 04)'
+- bus: '00'
+  dev: 08
+  fn: '1'
+  id: '2015'
+  name: 'Performance counters: Intel Corporation Sky Lake-E Ubox Registers (rev 04)'
+- bus: '00'
+  dev: 08
+  fn: '2'
+  id: '2016'
+  name: 'System peripheral: Intel Corporation Sky Lake-E Ubox Registers (rev 04)'
+- bus: '00'
+  dev: '11'
+  fn: '0'
+  id: a1ec
+  name: 'Unassigned class [ff00]: Intel Corporation C620 Series Chipset Family MROM
+    0 (rev 04)'
+- bus: '00'
+  dev: '11'
+  fn: '1'
+  id: a1ed
+  name: 'Unassigned class [ff00]: Intel Corporation C620 Series Chipset Family MROM
+    1 (rev 04)'
+- bus: '00'
+  dev: '14'
+  fn: '0'
+  id: a1af
+  name: 'USB controller: Intel Corporation C620 Series Chipset Family USB 3.0 xHCI
+    Controller (rev 04)'
+- bus: '00'
+  dev: '14'
+  fn: '2'
+  id: a1b1
+  name: 'Signal processing controller: Intel Corporation C620 Series Chipset Family
+    Thermal Subsystem (rev 04)'
+- bus: '00'
+  dev: '16'
+  fn: '0'
+  id: a1ba
+  name: 'Communication controller: Intel Corporation C620 Series Chipset Family MEI
+    Controller #1 (rev 04)'
+- bus: '00'
+  dev: '16'
+  fn: '4'
+  id: a1be
+  name: 'Communication controller: Intel Corporation C620 Series Chipset Family MEI
+    Controller #3 (rev 04)'
+- bus: '00'
+  dev: 1c
+  fn: '0'
+  id: a190
+  name: 'PCI bridge: Intel Corporation C620 Series Chipset Family PCI Express Root
+    Port #1 (rev f4)'
+- bus: '00'
+  dev: 1c
+  fn: '4'
+  id: a194
+  name: 'PCI bridge: Intel Corporation C620 Series Chipset Family PCI Express Root
+    Port #5 (rev f4)'
+- bus: '00'
+  dev: 1c
+  fn: '5'
+  id: a195
+  name: 'PCI bridge: Intel Corporation C620 Series Chipset Family PCI Express Root
+    Port #6 (rev f4)'
+- bus: '00'
+  dev: 1d
+  fn: '0'
+  id: a198
+  name: 'PCI bridge: Intel Corporation C620 Series Chipset Family PCI Express Root
+    Port #9 (rev f4)'
+- bus: '00'
+  dev: 1d
+  fn: '2'
+  id: a19a
+  name: 'PCI bridge: Intel Corporation C620 Series Chipset Family PCI Express Root
+    Port #11 (rev f4)'
+- bus: '00'
+  dev: 1f
+  fn: '0'
+  id: a1c8
+  name: 'ISA bridge: Intel Corporation Device a1c8 (rev 04)'
+- bus: '00'
+  dev: 1f
+  fn: '2'
+  id: a1a1
+  name: 'Memory controller: Intel Corporation C620 Series Chipset Family Power Management
+    Controller (rev 04)'
+- bus: '00'
+  dev: 1f
+  fn: '4'
+  id: a1a3
+  name: 'SMBus: Intel Corporation C620 Series Chipset Family SMBus (rev 04)'
+- bus: '00'
+  dev: 1f
+  fn: '5'
+  id: a1a4
+  name: 'Serial bus controller [0c80]: Intel Corporation C620 Series Chipset Family
+    SPI Controller (rev 04)'
+- bus: '02'
+  dev: '00'
+  fn: '0'
+  id: '1533'
+  name: 'Ethernet controller: Intel Corporation I210 Gigabit Network Connection (rev
+    03)'
+- bus: '03'
+  dev: '00'
+  fn: '0'
+  id: '1150'
+  name: 'PCI bridge: ASPEED Technology, Inc. AST1150 PCI-to-PCI Bridge (rev 03)'
+- bus: '04'
+  dev: '00'
+  fn: '0'
+  id: '2000'
+  name: 'VGA compatible controller: ASPEED Technology, Inc. ASPEED Graphics Family
+    (rev 30)'
+- bus: '06'
+  dev: '00'
+  fn: '0'
+  id: '0625'
+  name: 'SATA controller: ASMedia Technology Inc. Device 0625 (rev 01)'
+- bus: '16'
+  dev: '00'
+  fn: '0'
+  id: '2030'
+  name: 'PCI bridge: Intel Corporation Sky Lake-E PCI Express Root Port A (rev 04)'
+- bus: '16'
+  dev: '01'
+  fn: '0'
+  id: '2031'
+  name: 'PCI bridge: Intel Corporation Sky Lake-E PCI Express Root Port B (rev 04)'
+- bus: '16'
+  dev: '02'
+  fn: '0'
+  id: '2032'
+  name: 'PCI bridge: Intel Corporation Sky Lake-E PCI Express Root Port C (rev 04)'
+- bus: '16'
+  dev: '03'
+  fn: '0'
+  id: '2033'
+  name: 'PCI bridge: Intel Corporation Sky Lake-E PCI Express Root Port D (rev 04)'
+- bus: '16'
+  dev: '05'
+  fn: '0'
+  id: '2034'
+  name: 'System peripheral: Intel Corporation Sky Lake-E VT-d (rev 04)'
+- bus: '16'
+  dev: '05'
+  fn: '2'
+  id: '2035'
+  name: 'System peripheral: Intel Corporation Sky Lake-E RAS Configuration Registers
+    (rev 04)'
+- bus: '16'
+  dev: '05'
+  fn: '4'
+  id: '2036'
+  name: 'PIC: Intel Corporation Sky Lake-E IOxAPIC Configuration Registers (rev 04)'
+- bus: '16'
+  dev: 08
+  fn: '0'
+  id: 208d
+  name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
+- bus: '16'
+  dev: 08
+  fn: '1'
+  id: 208d
+  name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
+- bus: '16'
+  dev: 08
+  fn: '2'
+  id: 208d
+  name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
+- bus: '16'
+  dev: 08
+  fn: '3'
+  id: 208d
+  name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
+- bus: '16'
+  dev: 08
+  fn: '4'
+  id: 208d
+  name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
+- bus: '16'
+  dev: 08
+  fn: '5'
+  id: 208d
+  name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
+- bus: '16'
+  dev: 08
+  fn: '6'
+  id: 208d
+  name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
+- bus: '16'
+  dev: 08
+  fn: '7'
+  id: 208d
+  name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
+- bus: '16'
+  dev: 09
+  fn: '0'
+  id: 208d
+  name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
+- bus: '16'
+  dev: 09
+  fn: '1'
+  id: 208d
+  name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
+- bus: '16'
+  dev: 09
+  fn: '2'
+  id: 208d
+  name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
+- bus: '16'
+  dev: 09
+  fn: '3'
+  id: 208d
+  name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
+- bus: '16'
+  dev: 09
+  fn: '4'
+  id: 208d
+  name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
+- bus: '16'
+  dev: 09
+  fn: '5'
+  id: 208d
+  name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
+- bus: '16'
+  dev: 09
+  fn: '6'
+  id: 208d
+  name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
+- bus: '16'
+  dev: 09
+  fn: '7'
+  id: 208d
+  name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
+- bus: '16'
+  dev: 0a
+  fn: '0'
+  id: 208d
+  name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
+- bus: '16'
+  dev: 0a
+  fn: '1'
+  id: 208d
+  name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
+- bus: '16'
+  dev: 0e
+  fn: '0'
+  id: 208e
+  name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
+- bus: '16'
+  dev: 0e
+  fn: '1'
+  id: 208e
+  name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
+- bus: '16'
+  dev: 0e
+  fn: '2'
+  id: 208e
+  name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
+- bus: '16'
+  dev: 0e
+  fn: '3'
+  id: 208e
+  name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
+- bus: '16'
+  dev: 0e
+  fn: '4'
+  id: 208e
+  name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
+- bus: '16'
+  dev: 0e
+  fn: '5'
+  id: 208e
+  name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
+- bus: '16'
+  dev: 0e
+  fn: '6'
+  id: 208e
+  name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
+- bus: '16'
+  dev: 0e
+  fn: '7'
+  id: 208e
+  name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
+- bus: '16'
+  dev: 0f
+  fn: '0'
+  id: 208e
+  name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
+- bus: '16'
+  dev: 0f
+  fn: '1'
+  id: 208e
+  name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
+- bus: '16'
+  dev: 0f
+  fn: '2'
+  id: 208e
+  name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
+- bus: '16'
+  dev: 0f
+  fn: '3'
+  id: 208e
+  name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
+- bus: '16'
+  dev: 0f
+  fn: '4'
+  id: 208e
+  name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
+- bus: '16'
+  dev: 0f
+  fn: '5'
+  id: 208e
+  name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
+- bus: '16'
+  dev: 0f
+  fn: '6'
+  id: 208e
+  name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
+- bus: '16'
+  dev: 0f
+  fn: '7'
+  id: 208e
+  name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
+- bus: '16'
+  dev: '10'
+  fn: '0'
+  id: 208e
+  name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
+- bus: '16'
+  dev: '10'
+  fn: '1'
+  id: 208e
+  name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
+- bus: '16'
+  dev: 1d
+  fn: '0'
+  id: '2054'
+  name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
+- bus: '16'
+  dev: 1d
+  fn: '1'
+  id: '2055'
+  name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
+- bus: '16'
+  dev: 1d
+  fn: '2'
+  id: '2056'
+  name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
+- bus: '16'
+  dev: 1d
+  fn: '3'
+  id: '2057'
+  name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
+- bus: '16'
+  dev: 1e
+  fn: '0'
+  id: '2080'
+  name: 'System peripheral: Intel Corporation Sky Lake-E PCU Registers (rev 04)'
+- bus: '16'
+  dev: 1e
+  fn: '1'
+  id: '2081'
+  name: 'System peripheral: Intel Corporation Sky Lake-E PCU Registers (rev 04)'
+- bus: '16'
+  dev: 1e
+  fn: '2'
+  id: '2082'
+  name: 'System peripheral: Intel Corporation Sky Lake-E PCU Registers (rev 04)'
+- bus: '16'
+  dev: 1e
+  fn: '3'
+  id: '2083'
+  name: 'System peripheral: Intel Corporation Sky Lake-E PCU Registers (rev 04)'
+- bus: '16'
+  dev: 1e
+  fn: '4'
+  id: '2084'
+  name: 'System peripheral: Intel Corporation Sky Lake-E PCU Registers (rev 04)'
+- bus: '16'
+  dev: 1e
+  fn: '5'
+  id: '2085'
+  name: 'System peripheral: Intel Corporation Sky Lake-E PCU Registers (rev 04)'
+- bus: '16'
+  dev: 1e
+  fn: '6'
+  id: '2086'
+  name: 'System peripheral: Intel Corporation Sky Lake-E PCU Registers (rev 04)'
+- bus: '17'
+  dev: '00'
+  fn: '0'
+  id: b880
+  name: 'Ethernet controller: Broadcom Inc. and subsidiaries BCM56880 Switch ASIC
+    (rev 11)'
+- bus: '64'
+  dev: '00'
+  fn: '0'
+  id: '2030'
+  name: 'PCI bridge: Intel Corporation Sky Lake-E PCI Express Root Port A (rev 04)'
+- bus: '64'
+  dev: '01'
+  fn: '0'
+  id: '2031'
+  name: 'PCI bridge: Intel Corporation Sky Lake-E PCI Express Root Port B (rev 04)'
+- bus: '64'
+  dev: '02'
+  fn: '0'
+  id: '2032'
+  name: 'PCI bridge: Intel Corporation Sky Lake-E PCI Express Root Port C (rev 04)'
+- bus: '64'
+  dev: '03'
+  fn: '0'
+  id: '2033'
+  name: 'PCI bridge: Intel Corporation Sky Lake-E PCI Express Root Port D (rev 04)'
+- bus: '64'
+  dev: '05'
+  fn: '0'
+  id: '2034'
+  name: 'System peripheral: Intel Corporation Sky Lake-E VT-d (rev 04)'
+- bus: '64'
+  dev: '05'
+  fn: '2'
+  id: '2035'
+  name: 'System peripheral: Intel Corporation Sky Lake-E RAS Configuration Registers
+    (rev 04)'
+- bus: '64'
+  dev: '05'
+  fn: '4'
+  id: '2036'
+  name: 'PIC: Intel Corporation Sky Lake-E IOxAPIC Configuration Registers (rev 04)'
+- bus: '64'
+  dev: 08
+  fn: '0'
+  id: '2066'
+  name: 'System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller
+    (rev 04)'
+- bus: '64'
+  dev: 09
+  fn: '0'
+  id: '2066'
+  name: 'System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller
+    (rev 04)'
+- bus: '64'
+  dev: 0a
+  fn: '0'
+  id: '2040'
+  name: 'System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller
+    (rev 04)'
+- bus: '64'
+  dev: 0a
+  fn: '1'
+  id: '2041'
+  name: 'System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller
+    (rev 04)'
+- bus: '64'
+  dev: 0a
+  fn: '2'
+  id: '2042'
+  name: 'System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller
+    (rev 04)'
+- bus: '64'
+  dev: 0a
+  fn: '3'
+  id: '2043'
+  name: 'System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller
+    (rev 04)'
+- bus: '64'
+  dev: 0a
+  fn: '4'
+  id: '2044'
+  name: 'System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller
+    (rev 04)'
+- bus: '64'
+  dev: 0a
+  fn: '5'
+  id: '2045'
+  name: 'System peripheral: Intel Corporation Sky Lake-E LM Channel 1 (rev 04)'
+- bus: '64'
+  dev: 0a
+  fn: '6'
+  id: '2046'
+  name: 'System peripheral: Intel Corporation Sky Lake-E LMS Channel 1 (rev 04)'
+- bus: '64'
+  dev: 0a
+  fn: '7'
+  id: '2047'
+  name: 'System peripheral: Intel Corporation Sky Lake-E LMDP Channel 1 (rev 04)'
+- bus: '64'
+  dev: 0b
+  fn: '0'
+  id: '2048'
+  name: 'System peripheral: Intel Corporation Sky Lake-E DECS Channel 2 (rev 04)'
+- bus: '64'
+  dev: 0b
+  fn: '1'
+  id: '2049'
+  name: 'System peripheral: Intel Corporation Sky Lake-E LM Channel 2 (rev 04)'
+- bus: '64'
+  dev: 0b
+  fn: '2'
+  id: 204a
+  name: 'System peripheral: Intel Corporation Sky Lake-E LMS Channel 2 (rev 04)'
+- bus: '64'
+  dev: 0b
+  fn: '3'
+  id: 204b
+  name: 'System peripheral: Intel Corporation Sky Lake-E LMDP Channel 2 (rev 04)'
+- bus: '64'
+  dev: 0c
+  fn: '0'
+  id: '2040'
+  name: 'System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller
+    (rev 04)'
+- bus: '64'
+  dev: 0c
+  fn: '1'
+  id: '2041'
+  name: 'System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller
+    (rev 04)'
+- bus: '64'
+  dev: 0c
+  fn: '2'
+  id: '2042'
+  name: 'System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller
+    (rev 04)'
+- bus: '64'
+  dev: 0c
+  fn: '3'
+  id: '2043'
+  name: 'System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller
+    (rev 04)'
+- bus: '64'
+  dev: 0c
+  fn: '4'
+  id: '2044'
+  name: 'System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller
+    (rev 04)'
+- bus: '64'
+  dev: 0c
+  fn: '5'
+  id: '2045'
+  name: 'System peripheral: Intel Corporation Sky Lake-E LM Channel 1 (rev 04)'
+- bus: '64'
+  dev: 0c
+  fn: '6'
+  id: '2046'
+  name: 'System peripheral: Intel Corporation Sky Lake-E LMS Channel 1 (rev 04)'
+- bus: '64'
+  dev: 0c
+  fn: '7'
+  id: '2047'
+  name: 'System peripheral: Intel Corporation Sky Lake-E LMDP Channel 1 (rev 04)'
+- bus: '64'
+  dev: 0d
+  fn: '0'
+  id: '2048'
+  name: 'System peripheral: Intel Corporation Sky Lake-E DECS Channel 2 (rev 04)'
+- bus: '64'
+  dev: 0d
+  fn: '1'
+  id: '2049'
+  name: 'System peripheral: Intel Corporation Sky Lake-E LM Channel 2 (rev 04)'
+- bus: '64'
+  dev: 0d
+  fn: '2'
+  id: 204a
+  name: 'System peripheral: Intel Corporation Sky Lake-E LMS Channel 2 (rev 04)'
+- bus: '64'
+  dev: 0d
+  fn: '3'
+  id: 204b
+  name: 'System peripheral: Intel Corporation Sky Lake-E LMDP Channel 2 (rev 04)'
+- bus: b2
+  dev: '00'
+  fn: '0'
+  id: '2030'
+  name: 'PCI bridge: Intel Corporation Sky Lake-E PCI Express Root Port A (rev 04)'
+- bus: b2
+  dev: '05'
+  fn: '0'
+  id: '2034'
+  name: 'System peripheral: Intel Corporation Sky Lake-E VT-d (rev 04)'
+- bus: b2
+  dev: '05'
+  fn: '2'
+  id: '2035'
+  name: 'System peripheral: Intel Corporation Sky Lake-E RAS Configuration Registers
+    (rev 04)'
+- bus: b2
+  dev: '05'
+  fn: '4'
+  id: '2036'
+  name: 'PIC: Intel Corporation Sky Lake-E IOxAPIC Configuration Registers (rev 04)'
+- bus: b2
+  dev: '12'
+  fn: '0'
+  id: 204c
+  name: 'Performance counters: Intel Corporation Sky Lake-E M3KTI Registers (rev 04)'
+- bus: b2
+  dev: '12'
+  fn: '1'
+  id: 204d
+  name: 'Performance counters: Intel Corporation Sky Lake-E M3KTI Registers (rev 04)'
+- bus: b2
+  dev: '12'
+  fn: '2'
+  id: 204e
+  name: 'System peripheral: Intel Corporation Sky Lake-E M3KTI Registers (rev 04)'
+- bus: b2
+  dev: '15'
+  fn: '0'
+  id: '2018'
+  name: 'System peripheral: Intel Corporation Sky Lake-E M2PCI Registers (rev 04)'
+- bus: b2
+  dev: '16'
+  fn: '0'
+  id: '2018'
+  name: 'System peripheral: Intel Corporation Sky Lake-E M2PCI Registers (rev 04)'
+- bus: b2
+  dev: '16'
+  fn: '4'
+  id: '2018'
+  name: 'System peripheral: Intel Corporation Sky Lake-E M2PCI Registers (rev 04)'
+- bus: b2
+  dev: '17'
+  fn: '0'
+  id: '2018'
+  name: 'System peripheral: Intel Corporation Sky Lake-E M2PCI Registers (rev 04)'
+- bus: b3
+  dev: '00'
+  fn: '0'
+  id: 37c0
+  name: 'PCI bridge: Intel Corporation Device 37c0 (rev 04)'
+- bus: b4
+  dev: '00'
+  fn: '0'
+  id: 37c2
+  name: 'PCI bridge: Intel Corporation Device 37c2 (rev 04)'
+- bus: b4
+  dev: '03'
+  fn: '0'
+  id: 37c5
+  name: 'PCI bridge: Intel Corporation Device 37c5 (rev 04)'
+- bus: b5
+  dev: '00'
+  fn: '0'
+  id: 37c8
+  name: 'Co-processor: Intel Corporation C62x Chipset QuickAssist Technology (rev
+    04)'
+- bus: b6
+  dev: '00'
+  fn: '0'
+  id: 37d3
+  name: 'Ethernet controller: Intel Corporation Ethernet Connection X722 for 10GbE
+    SFP+ (rev 04)'
+- bus: b6
+  dev: '00'
+  fn: '1'
+  id: 37d3
+  name: 'Ethernet controller: Intel Corporation Ethernet Connection X722 for 10GbE
+    SFP+ (rev 04)'
+- bus: b6
+  dev: '00'
+  fn: '2'
+  id: 37ce
+  name: 'Ethernet controller: Intel Corporation Ethernet Connection X722 for 10GbE
+    backplane (rev 04)'
+- bus: b6
+  dev: '00'
+  fn: '3'
+  id: 37ce
+  name: 'Ethernet controller: Intel Corporation Ethernet Connection X722 for 10GbE
+    backplane (rev 04)'
diff --git a/device/ufispace/x86_64-ufispace_s9301_32d-r0/pddf/pd-plugin.json b/device/ufispace/x86_64-ufispace_s9301_32d-r0/pddf/pd-plugin.json
new file mode 100644
index 000000000..24aa151f8
--- /dev/null
+++ b/device/ufispace/x86_64-ufispace_s9301_32d-r0/pddf/pd-plugin.json
@@ -0,0 +1,86 @@
+{
+    
+    "XCVR":
+    {
+        "xcvr_present":
+        {
+           "i2c":
+           {
+               "valmap-SFP": {"1":true, "0":false },
+               "valmap-QSFP-DD": {"1":true, "0":false}
+           }
+
+        },
+        "plug_status":
+        {
+            "inserted": "1",
+            "removed": "0"
+        }
+    },
+    "PSU":
+    {
+        "psu_present": 
+        {
+            "i2c":
+            {
+                "valmap": { "1":true, "0":false }
+            },
+            "bmc":
+            {
+                "valmap": { "Device Present":true, "Device Absent":false }
+            }
+        }, 
+		
+        "psu_power_good": 
+        {
+            "i2c":
+            {
+                "valmap": { "1": true, "0":false }
+            },
+            "bmc":
+            {
+                "valmap": { "State Asserted":true, "State Deasserted":false }
+            }        
+        },
+
+        "psu_fan_dir":
+        {
+            "i2c":
+            {
+                "valmap": { "F2B":"EXHAUST", "B2F":"INTAKE" }
+            }
+        },
+        "DEFAULT_TYPE": "AC",
+        "PSU_FAN_MAX_SPEED":"30000"
+    },
+
+    "FAN":
+    {
+        "direction":
+        {
+            "bmc":
+            {
+                "valmap": {"0": "UNKNOW", "1":"INTAKE", "2":"EXHAUST"}
+            }
+        },
+
+        "present":
+        {
+            "i2c":
+            {
+                "valmap": {"1":true, "0":false}
+            },
+            "bmc":
+            {
+                "valmap": { "0x0280|":true, "0x0180|":false }
+            }      
+        },       
+        "FAN_R_MAX_SPEED":"32000",
+        "FAN_F_MAX_SPEED":"36200"
+    },
+
+    "REBOOT_CAUSE":
+    {
+        "reboot_cause_file": "/host/reboot-cause/reboot-cause.txt"
+    }
+}
diff --git a/device/ufispace/x86_64-ufispace_s9301_32d-r0/pddf/pddf-device.json b/device/ufispace/x86_64-ufispace_s9301_32d-r0/pddf/pddf-device.json
new file mode 100644
index 000000000..ac5052e64
--- /dev/null
+++ b/device/ufispace/x86_64-ufispace_s9301_32d-r0/pddf/pddf-device.json
@@ -0,0 +1,5092 @@
+{
+    "PLATFORM": {
+        "num_psus": 2,
+        "num_fantrays": 6,
+        "num_fans_pertray": 2,
+        "num_ports": 34,
+        "num_temps": 7,
+        "pddf_dev_types": {
+            "description": "PDDF supported devices",
+            "CPLD": [
+                "i2c_cpld"
+            ],
+            "PSU": [
+                "psu_eeprom",
+                "psu_pmbus"
+            ],
+            "PORT_MODULE": [
+                "pddf_xcvr"
+            ]
+        },
+        "std_perm_kos": [
+            "igb",
+            "i40e"
+        ],
+        "std_kos": [
+            "i2c_i801",
+            "i2c_dev",
+            "i2c_mux_pca954x",
+            "optoe",
+            "lm75",
+            "gpio-pca953x"
+        ],
+        "pddf_kos": [
+            "pddf_client_module",
+            "pddf_cpld_module",
+            "pddf_cpld_driver",
+            "pddf_mux_module",
+            "pddf_xcvr_module",
+            "pddf_fpgapci_driver",
+            "pddf_xcvr_driver_module",
+            "pddf_psu_driver_module",
+            "pddf_psu_module",
+            "pddf_fpgai2c_module",
+            "pddf_fpgai2c_driver",
+            "pddf_fan_driver_module",
+            "pddf_fan_module",
+            "pddf_led_module",
+            "pddf_gpio_module"
+        ],
+        "custom_kos": [
+            "x86-64-ufispace-s9301-32d-lpc",
+            "x86-64-ufispace-s9301-32d-sys-eeprom",
+            "pddf_custom_sysstatus_module"
+        ]
+    },
+    "SYSTEM": {
+        "dev_info": {
+            "device_type": "CPU",
+            "device_name": "ROOT_COMPLEX",
+            "device_parent": null
+        },
+        "i2c": {
+            "CONTROLLERS": [
+                {
+                    "dev_name": "i2c-0",
+                    "dev": "SMBUS0"
+                }
+            ]
+        }
+    },
+    "SMBUS0": {
+        "dev_info": {
+            "device_type": "SMBUS",
+            "device_name": "SMBUS0",
+            "device_parent": "SYSTEM"
+        },
+        "i2c": {
+            "topo_info": {
+                "dev_addr": "0x0"
+            },
+            "DEVICES": [
+                {
+                    "dev": "EEPROM1"
+                },
+                {
+                    "dev": "MUX1"
+                },
+                {
+                    "dev": "MUX2"
+                },
+                {
+                    "dev": "GPIO1"
+                }
+            ]
+        }
+    },
+    "EEPROM1": {
+        "dev_info": {
+            "device_type": "EEPROM",
+            "device_name": "EEPROM1",
+            "device_parent": "SMBUS0"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x0",
+                "dev_addr": "0x57",
+                "dev_type": "sys_eeprom"
+            },
+            "dev_attr": {
+                "access_mode": "BLOCK"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "TEMP1": {
+        "dev_info": {
+            "device_type": "TEMP_SENSOR",
+            "device_name": "TEMP1",
+            "device_parent": "SMBUS0"
+        },
+        "dev_attr": {
+            "display_name": "Temp_CPU_PECI"
+        },
+        "bmc": {
+            "ipmitool": {
+                "attr_list": [
+                    {
+                        "attr_name": "temp1_input",
+                        "bmc_cmd": "ipmitool sensor",
+                        "raw": "0",
+                        "field_name": "TEMP_CPU_PECI",
+                        "field_pos": "3"
+                    },
+                    {
+                        "attr_name": "temp1_high_crit_threshold",
+                        "bmc_cmd": "ipmitool sensor",
+                        "raw": "0",
+                        "field_name": "TEMP_CPU_PECI",
+                        "field_pos": "20"
+                    },
+                    {
+                        "attr_name": "temp1_high_threshold",
+                        "bmc_cmd": "ipmitool sensor",
+                        "raw": "0",
+                        "field_name": "TEMP_CPU_PECI",
+                        "field_pos": "18"
+                    }              
+                ]
+            }
+        }
+    },
+    "TEMP2": {
+        "dev_info": {
+            "device_type": "TEMP_SENSOR",
+            "device_name": "TEMP2",
+            "device_parent": "SMBUS0"
+        },
+        "dev_attr": {
+            "display_name": "Temp_CPU_ENV"
+        },
+        "bmc": {
+            "ipmitool": {
+                "attr_list": [
+                    {
+                        "attr_name": "temp1_input",
+                        "bmc_cmd": "ipmitool sensor",
+                        "raw": "0",
+                        "field_name": "TEMP_CPU_ENV",
+                        "field_pos": "3"
+                    },
+                    {
+                        "attr_name": "temp1_high_crit_threshold",
+                        "bmc_cmd": "ipmitool sensor",
+                        "raw": "0",
+                        "field_name": "TEMP_CPU_ENV",
+                        "field_pos": "20"
+                    },
+                    {
+                        "attr_name": "temp1_high_threshold",
+                        "bmc_cmd": "ipmitool sensor",
+                        "raw": "0",
+                        "field_name": "TEMP_CPU_ENV",
+                        "field_pos": "18"
+                    }               
+                ]
+            }
+        }
+    },
+    "TEMP3": {
+        "dev_info": {
+            "device_type": "TEMP_SENSOR",
+            "device_name": "TEMP3",
+            "device_parent": "SMBUS0"
+        },
+        "dev_attr": {
+            "display_name": "Temp_CPU_ENV2"
+        },
+        "bmc": {
+            "ipmitool": {
+                "attr_list": [
+                    {
+                        "attr_name": "temp1_input",
+                        "bmc_cmd": "ipmitool sensor",
+                        "raw": "0",
+                        "field_name": "TEMP_CPU_ENV_2",
+                        "field_pos": "3"
+                    },
+                    {
+                        "attr_name": "temp1_high_crit_threshold",
+                        "bmc_cmd": "ipmitool sensor",
+                        "raw": "0",
+                        "field_name": "TEMP_CPU_ENV_2",
+                        "field_pos": "20"
+                    },
+                    {
+                        "attr_name": "temp1_high_threshold",
+                        "bmc_cmd": "ipmitool sensor",
+                        "raw": "0",
+                        "field_name": "TEMP_CPU_ENV_2",
+                        "field_pos": "18"
+                    }              
+                ]
+            }
+        }
+    },
+    "TEMP4": {
+        "dev_info": {
+            "device_type": "TEMP_SENSOR",
+            "device_name": "TEMP4",
+            "device_parent": "SMBUS0"
+        },
+        "dev_attr": {
+            "display_name": "Temp_MAC_ENV"
+        },
+        "bmc": {
+            "ipmitool": {
+                "attr_list": [
+                    {
+                        "attr_name": "temp1_input",
+                        "bmc_cmd": "ipmitool sensor",
+                        "raw": "0",
+                        "field_name": "TEMP_MAC_ENV",
+                        "field_pos": "3"
+                    },
+                    {
+                        "attr_name": "temp1_high_crit_threshold",
+                        "bmc_cmd": "ipmitool sensor",
+                        "raw": "0",
+                        "field_name": "TEMP_MAC_ENV",
+                        "field_pos": "20"
+                    },
+                    {
+                        "attr_name": "temp1_high_threshold",
+                        "bmc_cmd": "ipmitool sensor",
+                        "raw": "0",
+                        "field_name": "TEMP_MAC_ENV",
+                        "field_pos": "18"
+                    }               
+                ]
+            }
+        }
+    },
+    "TEMP5": {
+        "dev_info": {
+            "device_type": "TEMP_SENSOR",
+            "device_name": "TEMP5",
+            "device_parent": "SMBUS0"
+        },
+        "dev_attr": {
+            "display_name": "Temp_MAC_DIE"
+        },
+        "bmc": {
+            "ipmitool": {
+                "attr_list": [
+                    {
+                        "attr_name": "temp1_input",
+                        "bmc_cmd": "ipmitool sensor",
+                        "raw": "0",
+                        "field_name": "TEMP_MAC_DIE",
+                        "field_pos": "3"
+                    },
+                    {
+                        "attr_name": "temp1_high_crit_threshold",
+                        "bmc_cmd": "ipmitool sensor",
+                        "raw": "0",
+                        "field_name": "TEMP_MAC_DIE",
+                        "field_pos": "20"
+                    },
+                    {
+                        "attr_name": "temp1_high_threshold",
+                        "bmc_cmd": "ipmitool sensor",
+                        "raw": "0",
+                        "field_name": "TEMP_MAC_DIE",
+                        "field_pos": "18"
+                    }              
+                ]
+            }
+        }
+    },
+    "TEMP6": {
+        "dev_info": {
+            "device_type": "TEMP_SENSOR",
+            "device_name": "TEMP6",
+            "device_parent": "SMBUS0"
+        },
+        "dev_attr": {
+            "display_name": "Temp_CAGE"
+        },
+        "bmc": {
+            "ipmitool": {
+                "attr_list": [
+                    {
+                        "attr_name": "temp1_input",
+                        "bmc_cmd": "ipmitool sensor",
+                        "raw": "0",
+                        "field_name": "TEMP_CAGE",
+                        "field_pos": "3"
+                    },
+                    {
+                        "attr_name": "temp1_high_crit_threshold",
+                        "bmc_cmd": "ipmitool sensor",
+                        "raw": "0",
+                        "field_name": "TEMP_CAGE",
+                        "field_pos": "20"
+                    },
+                    {
+                        "attr_name": "temp1_high_threshold",
+                        "bmc_cmd": "ipmitool sensor",
+                        "raw": "0",
+                        "field_name": "TEMP_CAGE",
+                        "field_pos": "18"
+                    }              
+                ]
+            }
+        }
+    },
+    "TEMP7": {
+        "dev_info": {
+            "device_type": "TEMP_SENSOR",
+            "device_name": "TEMP7",
+            "device_parent": "SMBUS0"
+        },
+        "dev_attr": {
+            "display_name": "Temp_PSU_CONNTOR"
+        },
+        "bmc": {
+            "ipmitool": {
+                "attr_list": [
+                    {
+                        "attr_name": "temp1_input",
+                        "bmc_cmd": "ipmitool sensor",
+                        "raw": "0",
+                        "field_name": "TEMP_PSU_CONN",
+                        "field_pos": "3"
+                    },
+                    {
+                        "attr_name": "temp1_high_crit_threshold",
+                        "bmc_cmd": "ipmitool sensor",
+                        "raw": "0",
+                        "field_name": "TEMP_PSU_CONN",
+                        "field_pos": "20"
+                    },
+                    {
+                        "attr_name": "temp1_high_threshold",
+                        "bmc_cmd": "ipmitool sensor",
+                        "raw": "0",
+                        "field_name": "TEMP_PSU_CONN",
+                        "field_pos": "18"
+                    }              
+                ]
+            }
+        }
+    },
+    "MUX1": {
+        "dev_info": {
+            "device_type": "MUX",
+            "device_name": "MUX1",
+            "device_parent": "SMBUS0"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x0",
+                "dev_addr": "0x73",
+                "dev_type": "pca9548"
+            },
+            "dev_attr": {
+                "virt_bus": "0x1",
+                "idle_state": "-2"
+            },
+            "channel": [
+                {
+                    "chn": "1",
+                    "dev": "CPLD1"
+                },
+                {
+                    "chn": "1",
+                    "dev": "CPLD2"
+                },
+                {
+                    "chn": "1",
+                    "dev": "CPLD3"
+                },
+                {
+                    "chn": "4",
+                    "dev": "GPIO2"
+                }
+            ]
+        }
+    },
+    "MUX2": {
+        "dev_info": {
+            "device_type": "MUX",
+            "device_name": "MUX2",
+            "device_parent": "SMBUS0"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x0",
+                "dev_addr": "0x72",
+                "dev_type": "pca9548"
+            },
+            "dev_attr": {
+                "virt_bus": "0x9",
+                "idle_state": "-2"
+            },
+            "channel": [
+                {
+                    "chn": "0",
+                    "dev": "MUX3"
+                },
+                {
+                    "chn": "1",
+                    "dev": "MUX4"
+                },
+                {
+                    "chn": "2",
+                    "dev": "MUX5"
+                },
+                {
+                    "chn": "3",
+                    "dev": "MUX6"
+                },
+                {
+                    "chn": "4",
+                    "dev": "PORT33"
+                },
+                {
+                    "chn": "5",
+                    "dev": "PORT34"
+                }
+            ]
+        }
+    },
+    "MUX3": {
+        "dev_info": {
+            "device_type": "MUX",
+            "device_name": "MUX3",
+            "device_parent": "MUX2"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x9",
+                "dev_addr": "0x76",
+                "dev_type": "pca9548"
+            },
+            "dev_attr": {
+                "virt_bus": "0x11",
+                "idle_state": "-2"
+            },
+            "channel": [
+                {
+                    "chn": "0",
+                    "dev": "PORT1"
+                },
+                {
+                    "chn": "1",
+                    "dev": "PORT2"
+                },
+                {
+                    "chn": "2",
+                    "dev": "PORT3"
+                },
+                {
+                    "chn": "3",
+                    "dev": "PORT4"
+                },
+                {
+                    "chn": "4",
+                    "dev": "PORT5"
+                },
+                {
+                    "chn": "5",
+                    "dev": "PORT6"
+                },
+                {
+                    "chn": "6",
+                    "dev": "PORT7"
+                },
+                {
+                    "chn": "7",
+                    "dev": "PORT8"
+                }
+            ]
+        }
+    },
+    "MUX4": {
+        "dev_info": {
+            "device_type": "MUX",
+            "device_name": "MUX4",
+            "device_parent": "MUX2"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0xa",
+                "dev_addr": "0x76",
+                "dev_type": "pca9548"
+            },
+            "dev_attr": {
+                "virt_bus": "0x19",
+                "idle_state": "-2"
+            },
+            "channel": [
+                {
+                    "chn": "0",
+                    "dev": "PORT9"
+                },
+                {
+                    "chn": "1",
+                    "dev": "PORT10"
+                },
+                {
+                    "chn": "2",
+                    "dev": "PORT11"
+                },
+                {
+                    "chn": "3",
+                    "dev": "PORT12"
+                },
+                {
+                    "chn": "4",
+                    "dev": "PORT13"
+                },
+                {
+                    "chn": "5",
+                    "dev": "PORT14"
+                },
+                {
+                    "chn": "6",
+                    "dev": "PORT15"
+                },
+                {
+                    "chn": "7",
+                    "dev": "PORT16"
+                }
+            ]
+        }
+    },
+    "MUX5": {
+        "dev_info": {
+            "device_type": "MUX",
+            "device_name": "MUX5",
+            "device_parent": "MUX2"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0xb",
+                "dev_addr": "0x76",
+                "dev_type": "pca9548"
+            },
+            "dev_attr": {
+                "virt_bus": "0x21",
+                "idle_state": "-2"
+            },
+            "channel": [
+                {
+                    "chn": "0",
+                    "dev": "PORT17"
+                },
+                {
+                    "chn": "1",
+                    "dev": "PORT18"
+                },
+                {
+                    "chn": "2",
+                    "dev": "PORT19"
+                },
+                {
+                    "chn": "3",
+                    "dev": "PORT20"
+                },
+                {
+                    "chn": "4",
+                    "dev": "PORT21"
+                },
+                {
+                    "chn": "5",
+                    "dev": "PORT22"
+                },
+                {
+                    "chn": "6",
+                    "dev": "PORT23"
+                },
+                {
+                    "chn": "7",
+                    "dev": "PORT24"
+                }
+            ]
+        }
+    },
+    "MUX6": {
+        "dev_info": {
+            "device_type": "MUX",
+            "device_name": "MUX6",
+            "device_parent": "MUX2"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0xc",
+                "dev_addr": "0x76",
+                "dev_type": "pca9548"
+            },
+            "dev_attr": {
+                "virt_bus": "0x29",
+                "idle_state": "-2"
+            },
+            "channel": [
+                {
+                    "chn": "0",
+                    "dev": "PORT25"
+                },
+                {
+                    "chn": "1",
+                    "dev": "PORT26"
+                },
+                {
+                    "chn": "2",
+                    "dev": "PORT27"
+                },
+                {
+                    "chn": "3",
+                    "dev": "PORT28"
+                },
+                {
+                    "chn": "4",
+                    "dev": "PORT29"
+                },
+                {
+                    "chn": "5",
+                    "dev": "PORT30"
+                },
+                {
+                    "chn": "6",
+                    "dev": "PORT31"
+                },
+                {
+                    "chn": "7",
+                    "dev": "PORT32"
+                }
+            ]
+        }
+    },
+    "GPIO1": {
+        "dev_info": {
+            "device_type": "GPIO",
+            "device_name": "GPIO1",
+            "device_parent": "SMBUS0"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x0",
+                "dev_addr": "0x77",
+                "dev_type": "pca9539"
+            },
+            "dev_attr": {
+                "gpio_base": "0x1f0"
+            },
+            "ports": [
+                {
+                    "port_num": "0",
+                    "direction": "in",
+                    "value": "",
+                    "edge": "",
+                    "active_low": ""
+                },
+                {
+                    "port_num": "1",
+                    "direction": "in",
+                    "value": "",
+                    "edge": "",
+                    "active_low": ""
+                },
+                {
+                    "port_num": "2",
+                    "direction": "in",
+                    "value": "",
+                    "edge": "",
+                    "active_low": ""
+                },
+                {
+                    "port_num": "3",
+                    "direction": "in",
+                    "value": "",
+                    "edge": "",
+                    "active_low": ""
+                },
+                {
+                    "port_num": "4",
+                    "direction": "in",
+                    "value": "",
+                    "edge": "",
+                    "active_low": ""
+                },
+                {
+                    "port_num": "5",
+                    "direction": "in",
+                    "value": "",
+                    "edge": "",
+                    "active_low": ""
+                },
+                {
+                    "port_num": "6",
+                    "direction": "in",
+                    "value": "",
+                    "edge": "",
+                    "active_low": ""
+                },
+                {
+                    "port_num": "7",
+                    "direction": "in",
+                    "value": "",
+                    "edge": "",
+                    "active_low": ""
+                },
+                {
+                    "port_num": "8",
+                    "direction": "in",
+                    "value": "",
+                    "edge": "",
+                    "active_low": ""
+                },
+                {
+                    "port_num": "9",
+                    "direction": "in",
+                    "value": "",
+                    "edge": "",
+                    "active_low": ""
+                },
+                {
+                    "port_num": "10",
+                    "direction": "in",
+                    "value": "",
+                    "edge": "",
+                    "active_low": ""
+                },
+                {
+                    "port_num": "11",
+                    "direction": "in",
+                    "value": "",
+                    "edge": "",
+                    "active_low": ""
+                },
+                {
+                    "port_num": "12",
+                    "direction": "in",
+                    "value": "",
+                    "edge": "",
+                    "active_low": ""
+                },
+                {
+                    "port_num": "13",
+                    "direction": "in",
+                    "value": "",
+                    "edge": "",
+                    "active_low": ""
+                },
+                {
+                    "port_num": "14",
+                    "direction": "in",
+                    "value": "",
+                    "edge": "",
+                    "active_low": ""
+                },
+                {
+                    "port_num": "15",
+                    "direction": "in",
+                    "value": "",
+                    "edge": "",
+                    "active_low": ""
+                }
+            ]
+        }
+    },
+    "GPIO2": {
+        "dev_info": {
+            "device_type": "GPIO",
+            "device_name": "GPIO2",
+            "device_parent": "MUX1"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x6",
+                "dev_addr": "0x76",
+                "dev_type": "pca9539"
+            },
+            "dev_attr": {
+                "gpio_base": "0x1e0"
+            },
+            "ports": [
+                {
+                    "port_num": "0",
+                    "direction": "in",
+                    "value": "",
+                    "edge": "",
+                    "active_low": ""
+                },
+                {
+                    "port_num": "1",
+                    "direction": "in",
+                    "value": "",
+                    "edge": "",
+                    "active_low": ""
+                },
+                {
+                    "port_num": "2",
+                    "direction": "in",
+                    "value": "",
+                    "edge": "",
+                    "active_low": ""
+                },
+                {
+                    "port_num": "3",
+                    "direction": "in",
+                    "value": "",
+                    "edge": "",
+                    "active_low": ""
+                },
+                {
+                    "port_num": "4",
+                    "direction": "in",
+                    "value": "",
+                    "edge": "",
+                    "active_low": ""
+                },
+                {
+                    "port_num": "5",
+                    "direction": "in",
+                    "value": "",
+                    "edge": "",
+                    "active_low": ""
+                },
+                {
+                    "port_num": "6",
+                    "direction": "in",
+                    "value": "",
+                    "edge": "",
+                    "active_low": ""
+                },
+                {
+                    "port_num": "7",
+                    "direction": "in",
+                    "value": "",
+                    "edge": "",
+                    "active_low": ""
+                },
+                {
+                    "port_num": "8",
+                    "direction": "in",
+                    "value": "",
+                    "edge": "",
+                    "active_low": ""
+                },
+                {
+                    "port_num": "9",
+                    "direction": "in",
+                    "value": "",
+                    "edge": "",
+                    "active_low": ""
+                },
+                {
+                    "port_num": "10",
+                    "direction": "in",
+                    "value": "",
+                    "edge": "",
+                    "active_low": ""
+                },
+                {
+                    "port_num": "11",
+                    "direction": "in",
+                    "value": "",
+                    "edge": "",
+                    "active_low": ""
+                },
+                {
+                    "port_num": "12",
+                    "direction": "in",
+                    "value": "",
+                    "edge": "",
+                    "active_low": ""
+                },
+                {
+                    "port_num": "13",
+                    "direction": "in",
+                    "value": "",
+                    "edge": "",
+                    "active_low": ""
+                },
+                {
+                    "port_num": "14",
+                    "direction": "in",
+                    "value": "",
+                    "edge": "",
+                    "active_low": ""
+                },
+                {
+                    "port_num": "15",
+                    "direction": "in",
+                    "value": "",
+                    "edge": "",
+                    "active_low": ""
+                }
+            ]
+        }
+    },
+    "CPLD1": {
+        "dev_info": {
+            "device_type": "CPLD",
+            "device_name": "CPLD1",
+            "device_parent": "MUX1"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x2",
+                "dev_addr": "0x30",
+                "dev_type": "i2c_cpld"
+            },
+            "dev_attr": {}
+        }
+    },
+    "CPLD2": {
+        "dev_info": {
+            "device_type": "CPLD",
+            "device_name": "CPLD2",
+            "device_parent": "MUX1"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x2",
+                "dev_addr": "0x31",
+                "dev_type": "i2c_cpld"
+            },
+            "dev_attr": {}
+        }
+    },
+    "CPLD3": {
+        "dev_info": {
+            "device_type": "CPLD",
+            "device_name": "CPLD3",
+            "device_parent": "MUX1"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x2",
+                "dev_addr": "0x32",
+                "dev_type": "i2c_cpld"
+            },
+            "dev_attr": {}
+        }
+    },
+    "SYSSTATUS": {
+        "dev_info": {
+            "device_type": "SYSSTAT",
+            "device_name": "SYSSTATUS"
+        },
+        "dev_attr": {},
+        "attr_list": [
+            {
+                "attr_name": "board_info",
+                "attr_devaddr": "0x30",
+                "attr_offset": "0x0",
+                "attr_mask": "0xff",
+                "attr_len": "0x1"
+            },
+            {
+                "attr_name": "cpld1_version",
+                "attr_devaddr": "0x30",
+                "attr_offset": "0x2",
+                "attr_mask": "0xff",
+                "attr_len": "0x1"
+            },
+            {
+                "attr_name": "cpld2_version",
+                "attr_devaddr": "0x31",
+                "attr_offset": "0x2",
+                "attr_mask": "0xff",
+                "attr_len": "0x1"
+            },
+            {
+                "attr_name": "cpld3_version",
+                "attr_devaddr": "0x32",
+                "attr_offset": "0x2",
+                "attr_mask": "0xff",
+                "attr_len": "0x1"
+            },
+            {
+                "attr_name": "mac_reset",
+                "attr_devaddr": "0x30",
+                "attr_offset": "0x40",
+                "attr_mask": "0xff",
+                "attr_len": "0x1"
+            },
+            {
+                "attr_name": "mux_reset",
+                "attr_devaddr": "0x30",
+                "attr_offset": "0x46",
+                "attr_mask": "0xff",
+                "attr_len": "0x1"
+            },
+            {
+                "attr_name": "psu_status",
+                "attr_devaddr": "0x30",
+                "attr_offset": "0x51",
+                "attr_mask": "0xff",
+                "attr_len": "0x1"
+            },
+            {
+                "attr_name": "system_led_0",
+                "attr_devaddr": "0x30",
+                "attr_offset": "0x80",
+                "attr_mask": "0xff",
+                "attr_len": "0x1"
+            },
+            {
+                "attr_name": "system_led_1",
+                "attr_devaddr": "0x30",
+                "attr_offset": "0x81",
+                "attr_mask": "0xff",
+                "attr_len": "0x1"
+            },
+            {
+                "attr_name": "beacon_led",
+                "attr_devaddr": "0x30",
+                "attr_offset": "0x84",
+                "attr_mask": "0xff",
+                "attr_len": "0x1"
+            },
+            {
+                "attr_name": "port_led_clr_ctrl",
+                "attr_devaddr": "0x30",
+                "attr_offset": "0x85",
+                "attr_mask": "0xff",
+                "attr_len": "0x1"
+            }
+        ]
+    },
+    "PSU1": {
+        "dev_info": {
+            "device_type": "PSU",
+            "device_name": "PSU1",
+            "device_parent": "SMBUS0"
+        },
+        "dev_attr": {
+            "dev_idx": "1",
+            "num_psu_fans": "1"
+        },
+        "i2c": {
+            "interface": []
+        },
+        "bmc": {
+            "ipmitool": {
+                "attr_list": [
+                    {
+                        "attr_name": "psu_present",
+                        "bmc_cmd": "ipmitool sdr -c get PSU0_PRSNT_L | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
+                        "raw": "0",
+                        "field_name": "PSU0_PRSNT_L",
+                        "field_pos": "5",
+                        "separator": ","
+                    },
+                    {
+                        "attr_name": "psu_power_good",
+                        "bmc_cmd": "ipmitool sdr -c get PSU0_PWROK_H | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
+                        "raw": "0",
+                        "field_name": "PSU0_PWROK_H",
+                        "field_pos": "5",
+                        "separator": ","
+                    },
+                    {
+                        "attr_name": "psu_v_out",
+                        "bmc_cmd": "ipmitool sdr -c get PSU0_VOUT | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
+                        "raw": "0",
+                        "field_name": "PSU0_VOUT",
+                        "field_pos": "2",
+                        "mult": "1000",
+                        "separator": ","
+                    },
+                    {
+                        "attr_name": "psu_i_out",
+                        "bmc_cmd": "ipmitool sdr -c get PSU0_IOUT | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
+                        "raw": "0",
+                        "field_name": "PSU0_IOUT",
+                        "field_pos": "2",
+                        "mult": "1000",
+                        "separator": ","
+                    },
+                    {
+                        "attr_name": "psu_v_in",
+                        "bmc_cmd": "ipmitool sdr get -c PSU0_VIN | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "PSU0_VIN",
+                        "field_pos": "2",
+                        "mult": "1000"
+                    },
+                    {
+                        "attr_name": "psu_i_in",
+                        "bmc_cmd": "ipmitool sdr get -c PSU0_IIN | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "PSU0_IIN",
+                        "field_pos": "2",
+                        "mult": "1000"
+                    },
+                    {
+                        "attr_name": "psu_temp1_input",
+                        "bmc_cmd": "ipmitool sdr -c get PSU0_TEMP | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
+                        "raw": "0",
+                        "field_name": "PSU0_TEMP",
+                        "field_pos": "2",
+                        "mult": "1000",
+                        "separator": ","
+                    },
+                    {
+                        "attr_name": "psu_fan1_speed_rpm",
+                        "bmc_cmd": "ipmitool sdr -c get PSU0_FAN1 | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
+                        "raw": "0",
+                        "field_name": "PSU0_FAN1",
+                        "field_pos": "2",
+                        "separator": ","
+                    },
+                    {
+                        "attr_name": "psu_mfr_id",
+                        "bmc_cmd": "_rv=$(ipmitool fru print 1 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Manufacturer') && echo $_rv || echo 'Manufacturer : N/A'",
+                        "raw": "0",
+                        "separator": ":",
+                        "field_name": "Manufacturer",
+                        "field_pos": "2"
+                    },
+                    {
+                        "attr_name": "psu_model_name",
+                        "bmc_cmd": "_rv=$(ipmitool fru print 1 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Name') && echo $_rv || echo 'Name : N/A'",
+                        "raw": "0",
+                        "separator": ":",
+                        "field_name": "Name",
+                        "field_pos": "2"
+                    },
+                    {
+                        "attr_name": "psu_serial_num",
+                        "bmc_cmd": "_rv=$(ipmitool fru print 1 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Serial') && echo $_rv || echo 'Serial : N/A'",
+                        "raw": "0",
+                        "separator": ":",
+                        "field_name": "Serial",
+                        "field_pos": "2"
+                    },
+                    {
+                        "attr_name": "psu_fan1_dir",
+                        "bmc_cmd": "ipmitool raw 0x3c 0x30 0x0 | xargs | cut -d' ' -f1",
+                        "raw": "1",
+                        "type": "raw"
+                    }
+                ]
+            }
+        }
+    },
+    "PSU2": {
+        "dev_info": {
+            "device_type": "PSU",
+            "device_name": "PSU2",
+            "device_parent": "SMBUS0"
+        },
+        "dev_attr": {
+            "dev_idx": "2",
+            "num_psu_fans": "1"
+        },
+        "i2c": {
+            "interface": []
+        },
+        "bmc": {
+            "ipmitool": {
+                "attr_list": [
+                    {
+                        "attr_name": "psu_present",
+                        "bmc_cmd": "ipmitool sdr -c get PSU1_PRSNT_L | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
+                        "raw": "0",
+                        "field_name": "PSU1_PRSNT_L",
+                        "field_pos": "5",
+                        "separator": ","
+                    },
+                    {
+                        "attr_name": "psu_power_good",
+                        "bmc_cmd": "ipmitool sdr -c get PSU1_PWROK_H | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
+                        "raw": "0",
+                        "field_name": "PSU1_PWROK_H",
+                        "field_pos": "5",
+                        "separator": ","
+                    },
+                    {
+                        "attr_name": "psu_v_out",
+                        "bmc_cmd": "ipmitool sdr -c get PSU1_VOUT | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
+                        "raw": "0",
+                        "field_name": "PSU1_VOUT",
+                        "field_pos": "2",
+                        "mult": "1000",
+                        "separator": ","
+                    },
+                    {
+                        "attr_name": "psu_i_out",
+                        "bmc_cmd": "ipmitool sdr -c get PSU1_IOUT | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
+                        "raw": "0",
+                        "field_name": "PSU1_IOUT",
+                        "field_pos": "2",
+                        "mult": "1000",
+                        "separator": ","
+                    },
+                    {
+                        "attr_name": "psu_v_in",
+                        "bmc_cmd": "ipmitool sdr get -c PSU1_VIN | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "PSU1_VIN",
+                        "field_pos": "2",
+                        "mult": "1000"
+                    },
+                    {
+                        "attr_name": "psu_i_in",
+                        "bmc_cmd": "ipmitool sdr get -c PSU1_IIN | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "PSU1_IIN",
+                        "field_pos": "2",
+                        "mult": "1000"
+                    },
+                    {
+                        "attr_name": "psu_temp1_input",
+                        "bmc_cmd": "ipmitool sdr -c get PSU1_TEMP | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
+                        "raw": "0",
+                        "field_name": "PSU1_TEMP",
+                        "field_pos": "2",
+                        "mult": "1000",
+                        "separator": ","
+                    },
+                    {
+                        "attr_name": "psu_fan1_speed_rpm",
+                        "bmc_cmd": "ipmitool sdr -c get PSU1_FAN1 | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
+                        "raw": "0",
+                        "field_name": "PSU1_FAN1",
+                        "field_pos": "2",
+                        "separator": ","
+                    },
+                    {
+                        "attr_name": "psu_mfr_id",
+                        "bmc_cmd": "_rv=$(ipmitool fru print 2 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Manufacturer') && echo $_rv || echo 'Manufacturer : N/A'",
+                        "raw": "0",
+                        "separator": ":",
+                        "field_name": "Manufacturer",
+                        "field_pos": "2"
+                    },
+                    {
+                        "attr_name": "psu_model_name",
+                        "bmc_cmd": "_rv=$(ipmitool fru print 2 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Name') && echo $_rv || echo 'Name : N/A'",
+                        "raw": "0",
+                        "separator": ":",
+                        "field_name": "Name",
+                        "field_pos": "2"
+                    },
+                    {
+                        "attr_name": "psu_serial_num",
+                        "bmc_cmd": "_rv=$(ipmitool fru print 2 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Serial') && echo $_rv || echo 'Serial : N/A'",
+                        "raw": "0",
+                        "separator": ":",
+                        "field_name": "Serial",
+                        "field_pos": "2"
+                    },
+                    {
+                        "attr_name": "psu_fan1_dir",
+                        "bmc_cmd": "ipmitool raw 0x3c 0x30 0x0 | xargs | cut -d' ' -f2",
+                        "raw": "1",
+                        "type": "raw"
+                    }
+                ]
+            }
+        }
+    },
+    "FAN-CTRL": {
+        "dev_info": {
+            "device_type": "FAN",
+            "device_name": "FAN-CTRL",
+            "device_parent": ""
+        },
+        "bmc": {
+            "ipmitool": {
+                "attr_list": [
+                    {
+                        "attr_name": "fan1_present",
+                        "bmc_cmd": "ipmitool sensor",
+                        "raw": "0",
+                        "field_name": "FAN0_PSNT_L",
+                        "field_pos": "7"
+                    },
+                    {
+                        "attr_name": "fan2_present",
+                        "bmc_cmd": "ipmitool sensor",
+                        "raw": "0",
+                        "field_name": "FAN1_PSNT_L",
+                        "field_pos": "7"
+                    },
+                    {
+                        "attr_name": "fan3_present",
+                        "bmc_cmd": "ipmitool sensor",
+                        "raw": "0",
+                        "field_name": "FAN2_PSNT_L",
+                        "field_pos": "7"
+                    },
+                    {
+                        "attr_name": "fan4_present",
+                        "bmc_cmd": "ipmitool sensor",
+                        "raw": "0",
+                        "field_name": "FAN3_PSNT_L",
+                        "field_pos": "7"
+                    },
+                    {
+                        "attr_name": "fan5_present",
+                        "bmc_cmd": "ipmitool sensor",
+                        "raw": "0",
+                        "field_name": "FAN4_PSNT_L",
+                        "field_pos": "7"
+                    },
+                    {
+                        "attr_name": "fan6_present",
+                        "bmc_cmd": "ipmitool sensor",
+                        "raw": "0",
+                        "field_name": "FAN5_PSNT_L",
+                        "field_pos": "7"
+                    },
+                    {
+                        "attr_name": "fan1_f_speed_rpm",
+                        "bmc_cmd": "ipmitool sensor",
+                        "raw": "0",
+                        "field_name": "FAN0_RPM_F",
+                        "field_pos": "3"
+                    },
+                    {
+                        "attr_name": "fan1_r_speed_rpm",
+                        "bmc_cmd": "ipmitool sensor",
+                        "raw": "0",
+                        "field_name": "FAN0_RPM_R",
+                        "field_pos": "3"
+                    },
+                    {
+                        "attr_name": "fan2_f_speed_rpm",
+                        "bmc_cmd": "ipmitool sensor",
+                        "raw": "0",
+                        "field_name": "FAN1_RPM_F",
+                        "field_pos": "3"
+                    },
+                    {
+                        "attr_name": "fan2_r_speed_rpm",
+                        "bmc_cmd": "ipmitool sensor",
+                        "raw": "0",
+                        "field_name": "FAN1_RPM_R",
+                        "field_pos": "3"
+                    },
+                    {
+                        "attr_name": "fan3_f_speed_rpm",
+                        "bmc_cmd": "ipmitool sensor",
+                        "raw": "0",
+                        "field_name": "FAN2_RPM_F",
+                        "field_pos": "3"
+                    },
+                    {
+                        "attr_name": "fan3_r_speed_rpm",
+                        "bmc_cmd": "ipmitool sensor",
+                        "raw": "0",
+                        "field_name": "FAN2_RPM_R",
+                        "field_pos": "3"
+                    },
+                    {
+                        "attr_name": "fan4_f_speed_rpm",
+                        "bmc_cmd": "ipmitool sensor",
+                        "raw": "0",
+                        "field_name": "FAN3_RPM_F",
+                        "field_pos": "3"
+                    },
+                    {
+                        "attr_name": "fan4_r_speed_rpm",
+                        "bmc_cmd": "ipmitool sensor",
+                        "raw": "0",
+                        "field_name": "FAN3_RPM_R",
+                        "field_pos": "3"
+                    },
+                    {
+                        "attr_name": "fan5_f_speed_rpm",
+                        "bmc_cmd": "ipmitool sensor",
+                        "raw": "0",
+                        "field_name": "FAN4_RPM_F",
+                        "field_pos": "3"
+                    },
+                    {
+                        "attr_name": "fan5_r_speed_rpm",
+                        "bmc_cmd": "ipmitool sensor",
+                        "raw": "0",
+                        "field_name": "FAN4_RPM_R",
+                        "field_pos": "3"
+                    },
+                    {
+                        "attr_name": "fan6_f_speed_rpm",
+                        "bmc_cmd": "ipmitool sensor",
+                        "raw": "0",
+                        "field_name": "FAN5_RPM_F",
+                        "field_pos": "3"
+                    },
+                    {
+                        "attr_name": "fan6_r_speed_rpm",
+                        "bmc_cmd": "ipmitool sensor",
+                        "raw": "0",
+                        "field_name": "FAN5_RPM_R",
+                        "field_pos": "3"
+                    },
+                    {
+                        "attr_name": "fan1_dir",
+                        "bmc_cmd": "ipmitool raw 0x3c 0x31 0x0 | xargs | cut -d' ' -f1",
+                        "raw": "1",
+                        "type": "raw"
+                    },
+                    {
+                        "attr_name": "fan2_dir",
+                        "bmc_cmd": "ipmitool raw 0x3c 0x31 0x0 | xargs | cut -d' ' -f2",
+                        "raw": "1",
+                        "type": "raw"
+                    },
+                    {
+                        "attr_name": "fan3_dir",
+                        "bmc_cmd": "ipmitool raw 0x3c 0x31 0x0 | xargs | cut -d' ' -f3",
+                        "raw": "1",
+                        "type": "raw"
+                    },
+                    {
+                        "attr_name": "fan4_dir",
+                        "bmc_cmd": "ipmitool raw 0x3c 0x31 0x0 | xargs | cut -d' ' -f4",
+                        "raw": "1",
+                        "type": "raw"
+                    },
+                    {
+                        "attr_name": "fan5_dir",
+                        "bmc_cmd": "ipmitool raw 0x3c 0x31 0x0 | xargs | cut -d' ' -f5",
+                        "raw": "1",
+                        "type": "raw"
+                    },
+                    {
+                        "attr_name": "fan6_dir",
+                        "bmc_cmd": "ipmitool raw 0x3c 0x31 0x0 | xargs | cut -d' ' -f6",
+                        "raw": "1",
+                        "type": "raw"
+                    }
+                ]
+            }
+        }
+    },
+    "SYS_LED": {
+        "dev_info": {
+            "device_type": "LED",
+            "device_name": "SYS_LED"
+        },
+        "dev_attr": {
+            "index": "0",
+            "flag": "ro"
+        },
+        "i2c": {
+            "attr_list": [
+                {
+                    "attr_name": "green",
+                    "bits": "7:4",
+                    "descr": "Green",
+                    "value": "0x09;0x0b",
+                    "swpld_addr": "0x30",
+                    "swpld_addr_offset": "0x80"
+                },
+                {
+                    "attr_name": "green_blink",
+                    "bits": "7:4",
+                    "descr": "Green Blinking",
+                    "value": "0x0d;0x0f",
+                    "swpld_addr": "0x30",
+                    "swpld_addr_offset": "0x80"
+                },
+                {
+                    "attr_name": "yellow",
+                    "bits": "7:4",
+                    "descr": "Yellow",
+                    "value": "0x08;0x0a",
+                    "swpld_addr": "0x30",
+                    "swpld_addr_offset": "0x80"
+                },
+                {
+                    "attr_name": "yellow_blink",
+                    "bits": "7:4",
+                    "descr": "Yellow Blinking",
+                    "value": "0x0c;0x0e",
+                    "swpld_addr": "0x30",
+                    "swpld_addr_offset": "0x80"
+                },
+                {
+                    "attr_name": "off",
+                    "bits": "7",
+                    "descr": "Off",
+                    "value": "0x0",
+                    "swpld_addr": "0x30",
+                    "swpld_addr_offset": "0x80"
+                }
+            ]
+        }
+    },
+    "FAN_LED": {
+        "dev_info": {
+            "device_type": "LED",
+            "device_name": "FAN_LED"
+        },
+        "dev_attr": {
+            "index": "0",
+            "flag": "ro"
+        },
+        "i2c": {
+            "attr_list": [
+                {
+                    "attr_name": "green",
+                    "bits": "3:0",
+                    "descr": "Green",
+                    "value": "0x09;0x0b",
+                    "swpld_addr": "0x30",
+                    "swpld_addr_offset": "0x80"
+                },
+                {
+                    "attr_name": "green_blink",
+                    "bits": "3:0",
+                    "descr": "Green Blinking",
+                    "value": "0x0d;0x0f",
+                    "swpld_addr": "0x30",
+                    "swpld_addr_offset": "0x80"
+                },
+                {
+                    "attr_name": "yellow",
+                    "bits": "3:0",
+                    "descr": "Yellow",
+                    "value": "0x08;0x0a",
+                    "swpld_addr": "0x30",
+                    "swpld_addr_offset": "0x80"
+                },
+                {
+                    "attr_name": "yellow_blink",
+                    "bits": "3:0",
+                    "descr": "Yellow Blinking",
+                    "value": "0x0c;0x0e",
+                    "swpld_addr": "0x30",
+                    "swpld_addr_offset": "0x80"
+                },
+                {
+                    "attr_name": "off",
+                    "bits": "3",
+                    "descr": "Off",
+                    "value": "0x0",
+                    "swpld_addr": "0x30",
+                    "swpld_addr_offset": "0x80"
+                }
+            ]
+        }
+    },
+    "PSU1_LED": {
+        "dev_info": {
+            "device_type": "LED",
+            "device_name": "PSU_LED"
+        },
+        "dev_attr": {
+            "index": "0",
+            "flag": "ro"
+        },
+        "i2c": {
+            "attr_list": [
+                {
+                    "attr_name": "green",
+                    "bits": "3:0",
+                    "descr": "Green",
+                    "value": "0x09;0x0b",
+                    "swpld_addr": "0x30",
+                    "swpld_addr_offset": "0x81"
+                },
+                {
+                    "attr_name": "green_blink",
+                    "bits": "3:0",
+                    "descr": "Green Blinking",
+                    "value": "0x0d;0x0f",
+                    "swpld_addr": "0x30",
+                    "swpld_addr_offset": "0x81"
+                },
+                {
+                    "attr_name": "yellow",
+                    "bits": "3:0",
+                    "descr": "Yellow",
+                    "value": "0x08;0x0a",
+                    "swpld_addr": "0x30",
+                    "swpld_addr_offset": "0x81"
+                },
+                {
+                    "attr_name": "yellow_blink",
+                    "bits": "3:0",
+                    "descr": "Yellow Blinking",
+                    "value": "0x0c;0x0e",
+                    "swpld_addr": "0x30",
+                    "swpld_addr_offset": "0x81"
+                },
+                {
+                    "attr_name": "off",
+                    "bits": "3",
+                    "descr": "Off",
+                    "value": "0x0",
+                    "swpld_addr": "0x30",
+                    "swpld_addr_offset": "0x81"
+                }
+            ]
+        }
+    },
+    "PSU2_LED": {
+        "dev_info": {
+            "device_type": "LED",
+            "device_name": "PSU_LED"
+        },
+        "dev_attr": {
+            "index": "1",
+            "flag": "ro"
+        },
+        "i2c": {
+            "attr_list": [
+                {
+                    "attr_name": "green",
+                    "bits": "7:4",
+                    "descr": "Green",
+                    "value": "0x09;0x0b",
+                    "swpld_addr": "0x30",
+                    "swpld_addr_offset": "0x81"
+                },
+                {
+                    "attr_name": "green_blink",
+                    "bits": "7:4",
+                    "descr": "Green Blinking",
+                    "value": "0x0d;0x0f",
+                    "swpld_addr": "0x30",
+                    "swpld_addr_offset": "0x81"
+                },
+                {
+                    "attr_name": "yellow",
+                    "bits": "7:4",
+                    "descr": "Yellow",
+                    "value": "0x08;0x0a",
+                    "swpld_addr": "0x30",
+                    "swpld_addr_offset": "0x81"
+                },
+                {
+                    "attr_name": "yellow_blink",
+                    "bits": "7:4",
+                    "descr": "Yellow Blinking",
+                    "value": "0x0c;0x0e",
+                    "swpld_addr": "0x30",
+                    "swpld_addr_offset": "0x81"
+                },
+                {
+                    "attr_name": "off",
+                    "bits": "7",
+                    "descr": "Off",
+                    "value": "0x0",
+                    "swpld_addr": "0x30",
+                    "swpld_addr_offset": "0x81"
+                }
+            ]
+        }
+    },
+    "LOC_LED": {
+        "dev_info": {
+            "device_type": "LED",
+            "device_name": "LOC_LED"
+        },
+        "dev_attr": {
+            "index": "0",
+            "flag": "rw"
+        },
+        "i2c": {
+            "attr_list": [
+                {
+                    "attr_name": "blue",
+                    "bits": "2:1",
+                    "descr": "Blue",
+                    "value": "0x02",
+                    "swpld_addr": "0x30",
+                    "swpld_addr_offset": "0x84"
+                },
+                {
+                    "attr_name": "blue_blink",
+                    "bits": "2:1",
+                    "descr": "Blue Blinking",
+                    "value": "0x03",
+                    "swpld_addr": "0x30",
+                    "swpld_addr_offset": "0x84"
+                },
+                {
+                    "attr_name": "off",
+                    "bits": "2",
+                    "descr": "Off",
+                    "value": "0x0",
+                    "swpld_addr": "0x30",
+                    "swpld_addr_offset": "0x84"
+                }
+            ]
+        }
+    },    
+    "PORT1": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT1",
+            "device_parent": "MUX3"
+        },
+        "dev_attr": {
+            "dev_idx": "1"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT1-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT1-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT1-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT1-EEPROM",
+            "device_parent": "MUX3",
+            "virt_parent": "PORT1"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x11",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT1-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT1-CTRL",
+            "device_parent": "MUX3",
+            "virt_parent": "PORT1"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x11",
+                "dev_addr": "0x53",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x10",
+                    "attr_mask": "0",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x14",
+                    "attr_mask": "0",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x40",
+                    "attr_mask": "0",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x44",
+                    "attr_mask": "0",
+                    "attr_cmpval": "0x1",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT2": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT2",
+            "device_parent": "MUX3"
+        },
+        "dev_attr": {
+            "dev_idx": "2"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT2-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT2-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT2-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT2-EEPROM",
+            "device_parent": "MUX3",
+            "virt_parent": "PORT2"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x12",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT2-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT2-CTRL",
+            "device_parent": "MUX3",
+            "virt_parent": "PORT2"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x12",
+                "dev_addr": "0x53",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x10",
+                    "attr_mask": "1",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x14",
+                    "attr_mask": "1",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x40",
+                    "attr_mask": "1",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x44",
+                    "attr_mask": "1",
+                    "attr_cmpval": "0x2",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT3": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT3",
+            "device_parent": "MUX3"
+        },
+        "dev_attr": {
+            "dev_idx": "3"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT3-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT3-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT3-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT3-EEPROM",
+            "device_parent": "MUX3",
+            "virt_parent": "PORT3"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x13",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT3-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT3-CTRL",
+            "device_parent": "MUX3",
+            "virt_parent": "PORT3"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x13",
+                "dev_addr": "0x53",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x10",
+                    "attr_mask": "2",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x14",
+                    "attr_mask": "2",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x40",
+                    "attr_mask": "2",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x44",
+                    "attr_mask": "2",
+                    "attr_cmpval": "0x4",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },    
+    "PORT4": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT4",
+            "device_parent": "MUX3"
+        },
+        "dev_attr": {
+            "dev_idx": "4"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT4-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT4-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT4-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT4-EEPROM",
+            "device_parent": "MUX3",
+            "virt_parent": "PORT4"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x14",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT4-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT4-CTRL",
+            "device_parent": "MUX3",
+            "virt_parent": "PORT4"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x14",
+                "dev_addr": "0x53",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x10",
+                    "attr_mask": "3",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x14",
+                    "attr_mask": "3",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x40",
+                    "attr_mask": "3",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x44",
+                    "attr_mask": "3",
+                    "attr_cmpval": "0x8",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },    
+    "PORT5": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT5",
+            "device_parent": "MUX3"
+        },
+        "dev_attr": {
+            "dev_idx": "5"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT5-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT5-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT5-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT5-EEPROM",
+            "device_parent": "MUX3",
+            "virt_parent": "PORT5"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x15",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT5-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT5-CTRL",
+            "device_parent": "MUX3",
+            "virt_parent": "PORT5"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x15",
+                "dev_addr": "0x53",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x10",
+                    "attr_mask": "4",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x14",
+                    "attr_mask": "4",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x40",
+                    "attr_mask": "4",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x44",
+                    "attr_mask": "4",
+                    "attr_cmpval": "0x10",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },    
+    "PORT6": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT6",
+            "device_parent": "MUX3"
+        },
+        "dev_attr": {
+            "dev_idx": "6"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT6-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT6-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT6-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT6-EEPROM",
+            "device_parent": "MUX3",
+            "virt_parent": "PORT6"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x16",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT6-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT6-CTRL",
+            "device_parent": "MUX3",
+            "virt_parent": "PORT6"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x16",
+                "dev_addr": "0x53",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x10",
+                    "attr_mask": "5",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x14",
+                    "attr_mask": "5",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x40",
+                    "attr_mask": "5",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x44",
+                    "attr_mask": "5",
+                    "attr_cmpval": "0x20",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },    
+    "PORT7": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT7",
+            "device_parent": "MUX3"
+        },
+        "dev_attr": {
+            "dev_idx": "7"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT7-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT7-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT7-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT7-EEPROM",
+            "device_parent": "MUX3",
+            "virt_parent": "PORT7"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x17",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT7-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT7-CTRL",
+            "device_parent": "MUX3",
+            "virt_parent": "PORT7"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x17",
+                "dev_addr": "0x53",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x10",
+                    "attr_mask": "6",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x14",
+                    "attr_mask": "6",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x40",
+                    "attr_mask": "6",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x44",
+                    "attr_mask": "6",
+                    "attr_cmpval": "0x40",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },    
+    "PORT8": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT8",
+            "device_parent": "MUX3"
+        },
+        "dev_attr": {
+            "dev_idx": "8"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT8-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT8-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT8-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT8-EEPROM",
+            "device_parent": "MUX3",
+            "virt_parent": "PORT8"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x18",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT8-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT8-CTRL",
+            "device_parent": "MUX3",
+            "virt_parent": "PORT8"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x18",
+                "dev_addr": "0x53",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x10",
+                    "attr_mask": "7",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x14",
+                    "attr_mask": "7",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x40",
+                    "attr_mask": "7",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x44",
+                    "attr_mask": "7",
+                    "attr_cmpval": "0x80",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },    
+    "PORT9": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT9",
+            "device_parent": "MUX4"
+        },
+        "dev_attr": {
+            "dev_idx": "9"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT9-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT9-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT9-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT9-EEPROM",
+            "device_parent": "MUX4",
+            "virt_parent": "PORT9"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x19",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT9-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT9-CTRL",
+            "device_parent": "MUX4",
+            "virt_parent": "PORT9"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x19",
+                "dev_addr": "0x53",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x11",
+                    "attr_mask": "0",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x15",
+                    "attr_mask": "0",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x41",
+                    "attr_mask": "0",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x45",
+                    "attr_mask": "0",
+                    "attr_cmpval": "0x1",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },    
+    "PORT10": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT10",
+            "device_parent": "MUX4"
+        },
+        "dev_attr": {
+            "dev_idx": "10"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT10-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT10-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT10-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT10-EEPROM",
+            "device_parent": "MUX4",
+            "virt_parent": "PORT10"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x1a",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT10-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT10-CTRL",
+            "device_parent": "MUX4",
+            "virt_parent": "PORT10"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x1a",
+                "dev_addr": "0x53",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x11",
+                    "attr_mask": "1",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x15",
+                    "attr_mask": "1",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x41",
+                    "attr_mask": "1",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x45",
+                    "attr_mask": "1",
+                    "attr_cmpval": "0x2",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT11": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT11",
+            "device_parent": "MUX4"
+        },
+        "dev_attr": {
+            "dev_idx": "11"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT11-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT11-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT11-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT11-EEPROM",
+            "device_parent": "MUX4",
+            "virt_parent": "PORT11"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x1b",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT11-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT11-CTRL",
+            "device_parent": "MUX4",
+            "virt_parent": "PORT11"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x1b",
+                "dev_addr": "0x53",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x11",
+                    "attr_mask": "2",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x15",
+                    "attr_mask": "2",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x41",
+                    "attr_mask": "2",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x45",
+                    "attr_mask": "2",
+                    "attr_cmpval": "0x4",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },    
+    "PORT12": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT12",
+            "device_parent": "MUX4"
+        },
+        "dev_attr": {
+            "dev_idx": "12"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT12-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT12-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT12-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT12-EEPROM",
+            "device_parent": "MUX4",
+            "virt_parent": "PORT12"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x1c",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT12-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT12-CTRL",
+            "device_parent": "MUX4",
+            "virt_parent": "PORT12"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x1c",
+                "dev_addr": "0x53",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x11",
+                    "attr_mask": "3",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x15",
+                    "attr_mask": "3",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x41",
+                    "attr_mask": "3",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x45",
+                    "attr_mask": "3",
+                    "attr_cmpval": "0x8",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },    
+    "PORT13": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT13",
+            "device_parent": "MUX4"
+        },
+        "dev_attr": {
+            "dev_idx": "13"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT13-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT13-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT13-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT13-EEPROM",
+            "device_parent": "MUX4",
+            "virt_parent": "PORT13"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x1d",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT13-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT13-CTRL",
+            "device_parent": "MUX4",
+            "virt_parent": "PORT13"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x1d",
+                "dev_addr": "0x53",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x11",
+                    "attr_mask": "4",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x15",
+                    "attr_mask": "4",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x41",
+                    "attr_mask": "4",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x45",
+                    "attr_mask": "4",
+                    "attr_cmpval": "0x10",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },        
+    "PORT14": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT14",
+            "device_parent": "MUX4"
+        },
+        "dev_attr": {
+            "dev_idx": "14"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT14-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT14-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT14-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT14-EEPROM",
+            "device_parent": "MUX4",
+            "virt_parent": "PORT14"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x1e",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT14-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT14-CTRL",
+            "device_parent": "MUX4",
+            "virt_parent": "PORT14"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x1e",
+                "dev_addr": "0x53",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x11",
+                    "attr_mask": "5",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x15",
+                    "attr_mask": "5",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x41",
+                    "attr_mask": "5",
+                    "attr_cmpval": "0x20",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x45",
+                    "attr_mask": "5",
+                    "attr_cmpval": "0x20",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT15": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT15",
+            "device_parent": "MUX4"
+        },
+        "dev_attr": {
+            "dev_idx": "15"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT15-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT15-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT15-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT15-EEPROM",
+            "device_parent": "MUX4",
+            "virt_parent": "PORT15"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x1f",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT15-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT15-CTRL",
+            "device_parent": "MUX4",
+            "virt_parent": "PORT15"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x1f",
+                "dev_addr": "0x53",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x11",
+                    "attr_mask": "6",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x15",
+                    "attr_mask": "6",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x41",
+                    "attr_mask": "6",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x45",
+                    "attr_mask": "6",
+                    "attr_cmpval": "0x40",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },    
+    "PORT16": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT16",
+            "device_parent": "MUX4"
+        },
+        "dev_attr": {
+            "dev_idx": "16"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT16-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT16-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT16-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT16-EEPROM",
+            "device_parent": "MUX4",
+            "virt_parent": "PORT16"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x20",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT16-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT16-CTRL",
+            "device_parent": "MUX4",
+            "virt_parent": "PORT16"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x20",
+                "dev_addr": "0x53",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x11",
+                    "attr_mask": "7",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x15",
+                    "attr_mask": "7",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x41",
+                    "attr_mask": "7",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x45",
+                    "attr_mask": "7",
+                    "attr_cmpval": "0x80",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },    
+    "PORT17": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT17",
+            "device_parent": "MUX5"
+        },
+        "dev_attr": {
+            "dev_idx": "17"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT17-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT17-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT17-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT17-EEPROM",
+            "device_parent": "MUX5",
+            "virt_parent": "PORT17"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x21",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT17-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT17-CTRL",
+            "device_parent": "MUX5",
+            "virt_parent": "PORT17"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x21",
+                "dev_addr": "0x53",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x12",
+                    "attr_mask": "0",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x16",
+                    "attr_mask": "0",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x42",
+                    "attr_mask": "0",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x46",
+                    "attr_mask": "0",
+                    "attr_cmpval": "0x1",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT18": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT18",
+            "device_parent": "MUX5"
+        },
+        "dev_attr": {
+            "dev_idx": "18"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT18-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT18-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT18-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT18-EEPROM",
+            "device_parent": "MUX5",
+            "virt_parent": "PORT18"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x22",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT18-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT18-CTRL",
+            "device_parent": "MUX5",
+            "virt_parent": "PORT18"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x22",
+                "dev_addr": "0x53",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x12",
+                    "attr_mask": "1",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x16",
+                    "attr_mask": "1",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x42",
+                    "attr_mask": "1",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x46",
+                    "attr_mask": "1",
+                    "attr_cmpval": "0x2",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },    
+    "PORT19": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT19",
+            "device_parent": "MUX5"
+        },
+        "dev_attr": {
+            "dev_idx": "19"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT19-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT19-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT19-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT19-EEPROM",
+            "device_parent": "MUX5",
+            "virt_parent": "PORT19"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x23",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT19-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT19-CTRL",
+            "device_parent": "MUX5",
+            "virt_parent": "PORT19"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x23",
+                "dev_addr": "0x53",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x12",
+                    "attr_mask": "2",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x16",
+                    "attr_mask": "2",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x42",
+                    "attr_mask": "2",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x46",
+                    "attr_mask": "2",
+                    "attr_cmpval": "0x4",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },            
+    "PORT20": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT20",
+            "device_parent": "MUX5"
+        },
+        "dev_attr": {
+            "dev_idx": "20"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT20-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT20-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT20-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT20-EEPROM",
+            "device_parent": "MUX5",
+            "virt_parent": "PORT20"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x24",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT20-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT20-CTRL",
+            "device_parent": "MUX5",
+            "virt_parent": "PORT20"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x24",
+                "dev_addr": "0x53",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x12",
+                    "attr_mask": "3",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x16",
+                    "attr_mask": "3",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x42",
+                    "attr_mask": "3",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x46",
+                    "attr_mask": "3",
+                    "attr_cmpval": "0x8",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT21": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT21",
+            "device_parent": "MUX5"
+        },
+        "dev_attr": {
+            "dev_idx": "21"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT21-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT21-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT21-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT21-EEPROM",
+            "device_parent": "MUX5",
+            "virt_parent": "PORT21"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x25",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT21-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT21-CTRL",
+            "device_parent": "MUX5",
+            "virt_parent": "PORT21"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x25",
+                "dev_addr": "0x53",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x12",
+                    "attr_mask": "4",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x16",
+                    "attr_mask": "4",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x42",
+                    "attr_mask": "4",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x46",
+                    "attr_mask": "4",
+                    "attr_cmpval": "0x10",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT22": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT22",
+            "device_parent": "MUX5"
+        },
+        "dev_attr": {
+            "dev_idx": "22"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT22-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT22-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT22-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT22-EEPROM",
+            "device_parent": "MUX5",
+            "virt_parent": "PORT22"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x26",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT22-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT22-CTRL",
+            "device_parent": "MUX5",
+            "virt_parent": "PORT22"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x26",
+                "dev_addr": "0x53",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x12",
+                    "attr_mask": "5",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x16",
+                    "attr_mask": "5",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x42",
+                    "attr_mask": "5",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x46",
+                    "attr_mask": "5",
+                    "attr_cmpval": "0x20",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT23": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT23",
+            "device_parent": "MUX5"
+        },
+        "dev_attr": {
+            "dev_idx": "23"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT23-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT23-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT23-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT23-EEPROM",
+            "device_parent": "MUX5",
+            "virt_parent": "PORT23"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x27",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT23-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT23-CTRL",
+            "device_parent": "MUX5",
+            "virt_parent": "PORT23"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x27",
+                "dev_addr": "0x53",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x12",
+                    "attr_mask": "6",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x16",
+                    "attr_mask": "6",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x42",
+                    "attr_mask": "6",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x46",
+                    "attr_mask": "6",
+                    "attr_cmpval": "0x40",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },    
+    "PORT24": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT24",
+            "device_parent": "MUX5"
+        },
+        "dev_attr": {
+            "dev_idx": "24"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT24-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT24-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT24-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT24-EEPROM",
+            "device_parent": "MUX5",
+            "virt_parent": "PORT24"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x28",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT24-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT24-CTRL",
+            "device_parent": "MUX5",
+            "virt_parent": "PORT24"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x28",
+                "dev_addr": "0x53",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x12",
+                    "attr_mask": "7",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x16",
+                    "attr_mask": "7",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x42",
+                    "attr_mask": "7",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x46",
+                    "attr_mask": "7",
+                    "attr_cmpval": "0x80",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },    
+    "PORT25": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT25",
+            "device_parent": "MUX6"
+        },
+        "dev_attr": {
+            "dev_idx": "25"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT25-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT25-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT25-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT25-EEPROM",
+            "device_parent": "MUX6",
+            "virt_parent": "PORT25"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x29",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT25-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT25-CTRL",
+            "device_parent": "MUX6",
+            "virt_parent": "PORT25"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x29",
+                "dev_addr": "0x53",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x13",
+                    "attr_mask": "0",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x17",
+                    "attr_mask": "0",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x43",
+                    "attr_mask": "0",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x47",
+                    "attr_mask": "0",
+                    "attr_cmpval": "0x1",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT26": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT26",
+            "device_parent": "MUX6"
+        },
+        "dev_attr": {
+            "dev_idx": "26"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT26-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT26-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT26-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT26-EEPROM",
+            "device_parent": "MUX6",
+            "virt_parent": "PORT26"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x2a",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT26-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT26-CTRL",
+            "device_parent": "MUX6",
+            "virt_parent": "PORT26"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x2a",
+                "dev_addr": "0x53",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x13",
+                    "attr_mask": "1",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x17",
+                    "attr_mask": "1",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x43",
+                    "attr_mask": "1",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x47",
+                    "attr_mask": "1",
+                    "attr_cmpval": "0x2",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },    
+    "PORT27": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT27",
+            "device_parent": "MUX6"
+        },
+        "dev_attr": {
+            "dev_idx": "27"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT27-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT27-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT27-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT27-EEPROM",
+            "device_parent": "MUX6",
+            "virt_parent": "PORT27"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x2b",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT27-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT27-CTRL",
+            "device_parent": "MUX6",
+            "virt_parent": "PORT27"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x2b",
+                "dev_addr": "0x53",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x13",
+                    "attr_mask": "2",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x17",
+                    "attr_mask": "2",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x43",
+                    "attr_mask": "2",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x47",
+                    "attr_mask": "2",
+                    "attr_cmpval": "0x4",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },    
+    "PORT28": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT28",
+            "device_parent": "MUX6"
+        },
+        "dev_attr": {
+            "dev_idx": "28"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT28-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT28-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT28-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT28-EEPROM",
+            "device_parent": "MUX6",
+            "virt_parent": "PORT28"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x2c",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT28-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT28-CTRL",
+            "device_parent": "MUX6",
+            "virt_parent": "PORT28"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x2c",
+                "dev_addr": "0x53",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x13",
+                    "attr_mask": "3",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x17",
+                    "attr_mask": "3",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x43",
+                    "attr_mask": "3",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x47",
+                    "attr_mask": "3",
+                    "attr_cmpval": "0x8",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },    
+    "PORT29": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT29",
+            "device_parent": "MUX6"
+        },
+        "dev_attr": {
+            "dev_idx": "29"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT29-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT29-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT29-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT29-EEPROM",
+            "device_parent": "MUX6",
+            "virt_parent": "PORT29"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x2d",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT29-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT29-CTRL",
+            "device_parent": "MUX6",
+            "virt_parent": "PORT29"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x2d",
+                "dev_addr": "0x53",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x13",
+                    "attr_mask": "4",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x17",
+                    "attr_mask": "4",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x43",
+                    "attr_mask": "4",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x47",
+                    "attr_mask": "4",
+                    "attr_cmpval": "0x10",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },        
+    "PORT30": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT30",
+            "device_parent": "MUX6"
+        },
+        "dev_attr": {
+            "dev_idx": "30"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT30-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT30-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT30-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT30-EEPROM",
+            "device_parent": "MUX6",
+            "virt_parent": "PORT30"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x2e",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT30-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT30-CTRL",
+            "device_parent": "MUX6",
+            "virt_parent": "PORT30"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x2e",
+                "dev_addr": "0x53",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x13",
+                    "attr_mask": "5",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x17",
+                    "attr_mask": "5",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x43",
+                    "attr_mask": "5",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x47",
+                    "attr_mask": "5",
+                    "attr_cmpval": "0x20",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },        
+    "PORT31": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT31",
+            "device_parent": "MUX6"
+        },
+        "dev_attr": {
+            "dev_idx": "31"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT31-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT31-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT31-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT31-EEPROM",
+            "device_parent": "MUX6",
+            "virt_parent": "PORT31"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x2f",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT31-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT31-CTRL",
+            "device_parent": "MUX6",
+            "virt_parent": "PORT31"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x2f",
+                "dev_addr": "0x53",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x13",
+                    "attr_mask": "6",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x17",
+                    "attr_mask": "6",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x43",
+                    "attr_mask": "6",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x47",
+                    "attr_mask": "6",
+                    "attr_cmpval": "0x40",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT32": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT32",
+            "device_parent": "MUX6"
+        },
+        "dev_attr": {
+            "dev_idx": "32"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT32-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT32-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT32-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT32-EEPROM",
+            "device_parent": "MUX6",
+            "virt_parent": "PORT32"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x30",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT32-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT32-CTRL",
+            "device_parent": "MUX6",
+            "virt_parent": "PORT32"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x30",
+                "dev_addr": "0x53",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x13",
+                    "attr_mask": "7",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x17",
+                    "attr_mask": "7",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x43",
+                    "attr_mask": "7",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x47",
+                    "attr_mask": "7",
+                    "attr_cmpval": "0x80",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },    
+    "PORT33": {
+        "dev_info": {
+            "device_type": "SFP",
+            "device_name": "PORT33",
+            "device_parent": "MUX2"
+        },
+        "dev_attr": {
+            "dev_idx": "33"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT33-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT33-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT33-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT33",
+            "device_parent": "MUX2",
+            "virt_parent": "PORT33"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0xd",
+                "dev_addr": "0x50",
+                "dev_type": "optoe2"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT33-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT33-CTRL",
+            "device_parent": "MUX2",
+            "virt_parent": "PORT33"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0xd",
+                "dev_addr": "0x53",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x1e",
+                    "attr_mask": "2",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_rxlos",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x1f",
+                    "attr_mask": "2",
+                    "attr_cmpval": "0x4",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_txfault",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x1d",
+                    "attr_mask": "2",
+                    "attr_cmpval": "0x4",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_txdisable",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x55",
+                    "attr_mask": "2",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT34": {
+        "dev_info": {
+            "device_type": "SFP",
+            "device_name": "PORT34",
+            "device_parent": "MUX2"
+        },
+        "dev_attr": {
+            "dev_idx": "34"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT34-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT34-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT34-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT34",
+            "device_parent": "MUX2",
+            "virt_parent": "PORT34"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0xe",
+                "dev_addr": "0x50",
+                "dev_type": "optoe2"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT34-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT34-CTRL",
+            "device_parent": "MUX2",
+            "virt_parent": "PORT34"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0xe",
+                "dev_addr": "0x53",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x1e",
+                    "attr_mask": "3",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_rxlos",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x1f",
+                    "attr_mask": "3",
+                    "attr_cmpval": "0x8",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_txfault",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x1d",
+                    "attr_mask": "3",
+                    "attr_cmpval": "0x8",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_txdisable",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x55",
+                    "attr_mask": "3",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    }    
+}
diff --git a/device/ufispace/x86_64-ufispace_s9301_32d-r0/pddf_support b/device/ufispace/x86_64-ufispace_s9301_32d-r0/pddf_support
new file mode 100644
index 000000000..e69de29bb
diff --git a/device/ufispace/x86_64-ufispace_s9301_32d-r0/platform.json b/device/ufispace/x86_64-ufispace_s9301_32d-r0/platform.json
new file mode 100644
index 000000000..de873b4d5
--- /dev/null
+++ b/device/ufispace/x86_64-ufispace_s9301_32d-r0/platform.json
@@ -0,0 +1,659 @@
+{
+    "chassis": {
+        "name": "S9301-32D",
+        "components": [
+            {
+                "name": "CPLD1"
+            },
+            {
+                "name": "CPLD2"
+            },
+            {
+                "name": "CPLD3"
+            },
+            {
+                "name": "BIOS"
+            },
+            {
+                "name": "BMC"
+            }
+        ],
+        "fans": [
+            {
+                "name": "Fantray1_1"
+            },
+            {
+                "name": "Fantray1_2"
+            },
+            {
+                "name": "Fantray2_1"
+            },
+            {
+                "name": "Fantray2_2"
+            },
+            {
+                "name": "Fantray3_1"
+            },
+            {
+                "name": "Fantray3_2"
+            },
+            {
+                "name": "Fantray4_1"
+            },
+            {
+                "name": "Fantray4_2"
+            },
+            {
+                "name": "Fantray5_1"
+            },
+            {
+                "name": "Fantray5_2"
+            },
+            {
+                "name": "Fantray6_1"
+            },
+            {
+                "name": "Fantray6_2"
+            }   
+        ],
+        "fan_drawers":[
+            {
+                "name": "Fantray1",
+                "num_fans" : 2,
+                "fans": [
+                    {
+                        "name": "Fantray1_1"
+                    },
+                    {
+                        "name": "Fantray1_2"
+                    }
+                ]
+            },
+            {
+                "name": "Fantray2",
+                "num_fans" : 2,
+                "fans": [
+                    {
+                        "name": "Fantray2_1"
+                    },
+                    {
+                        "name": "Fantray2_2"
+                    }
+                ]
+            },
+            {
+                "name": "Fantray3",
+                "num_fans" : 2,
+                "fans": [
+                    {
+                        "name": "Fantray3_1"
+                    },
+                    {
+                        "name": "Fantray3_2"
+                    }
+                ]
+            },
+            {
+                "name": "Fantray4",
+                "num_fans" : 2,
+                "fans": [
+                    {
+                        "name": "Fantray4_1"
+                    },
+                    {
+                        "name": "Fantray4_2"
+                    }
+                ]
+            },
+            {
+                "name": "Fantray5",
+                "num_fans" : 2,
+                "fans": [
+                    {
+                        "name": "Fantray5_1"
+                    },
+                    {
+                        "name": "Fantray5_2"
+                    }
+                ]
+            },
+            {
+                "name": "Fantray6",
+                "num_fans" : 2,
+                "fans": [
+                    {
+                        "name": "Fantray6_1"
+                    },
+                    {
+                        "name": "Fantray6_2"
+                    }
+                ]
+            }            	
+        ],
+        "psus": [
+            {
+                "name": "PSU1",
+                "fans": [
+                    {
+                        "name": "PSU1_FAN1"
+                    }
+                ],
+                "thermals": [
+                    {
+                        "name": "PSU1_TEMP1"
+                    }
+                ]
+            },
+            {
+                "name": "PSU2",
+                "fans": [
+                    {
+                        "name": "PSU2_FAN1"
+                    }
+                ],
+                "thermals": [
+                    {
+                        "name": "PSU2_TEMP1"
+                    }
+                ]
+            }
+        ],
+        "thermals": [
+            {
+                "name": "Temp_CPU_PECI"
+            },
+            {
+                "name": "Temp_CPU_ENV"
+            },
+            {
+                "name": "Temp_CPU_ENV2"
+            },
+            {
+                "name": "Temp_CPU_PECI"
+            },
+            {
+                "name": "Temp_MAC_DIE"
+            },
+            {
+                "name": "Temp_MAC_ENV"
+            },
+            {
+                "name": "Temp_PSU_CONNTOR"
+            }
+        ],
+        "sfps": [
+            {
+                "name": "Ethernet0"
+            },
+            {
+                "name": "Ethernet8"
+            },
+            {
+                "name": "Ethernet16"
+            },
+            {
+                "name": "Ethernet24"
+            },
+            {
+                "name": "Ethernet32"
+            },
+            {
+                "name": "Ethernet40"
+            },
+            {
+                "name": "Ethernet48"
+            },
+            {
+                "name": "Ethernet56"
+            },
+            {
+                "name": "Ethernet64"
+            },
+            {
+                "name": "Ethernet72"
+            },
+            {
+                "name": "Ethernet80"
+            },
+            {
+                "name": "Ethernet88"
+            },
+            {
+                "name": "Ethernet96"
+            },
+            {
+                "name": "Ethernet104"
+            },
+            {
+                "name": "Ethernet112"
+            },
+            {
+                "name": "Ethernet120"
+            },
+            {
+                "name": "Ethernet128"
+            },
+            {
+                "name": "Ethernet136"
+            },
+            {
+                "name": "Ethernet144"
+            },
+            {
+                "name": "Ethernet152"
+            },
+            {
+                "name": "Ethernet160"
+            },
+            {
+                "name": "Ethernet168"
+            },
+            {
+                "name": "Ethernet176"
+            },
+            {
+                "name": "Ethernet184"
+            },
+            {
+                "name": "Ethernet192"
+            },
+            {
+                "name": "Ethernet200"
+            },
+            {
+                "name": "Ethernet208"
+            },
+            {
+                "name": "Ethernet216"
+            },
+            {
+                "name": "Ethernet224"
+            },
+            {
+                "name": "Ethernet232"
+            },
+            {
+                "name": "Ethernet240"
+            },
+            {
+                "name": "Ethernet248"
+            },
+            {
+                "name": "Ethernet256"
+            },
+            {
+                "name": "Ethernet257"
+            }
+        ]
+    },
+    "interfaces": {
+        "Ethernet0": {
+            "index": "0,0,0,0,0,0,0,0",
+            "lanes": "1,2,3,4,5,6,7,8",
+            "breakout_modes": {
+                "1x400G": ["Eth0(Port0)"],
+                "2x200G": ["Eth0/1(Port0)", "Eth0/2(Port0)"],
+                "4x100G": ["Eth0/1(Port0)", "Eth0/2(Port0)", "Eth0/3(Port0)", "Eth0/4(Port0)"],
+                "8x50G": ["Eth0/1(Port0)", "Eth0/2(Port0)", "Eth0/3(Port0)", "Eth0/4(Port0)", "Eth0/5(Port0)", "Eth0/6(Port0)", "Eth0/7(Port0)", "Eth0/8(Port0)"]
+            }
+        },
+
+        "Ethernet8": {
+            "index": "1,1,1,1,1,1,1,1",
+            "lanes": "9,10,11,12,13,14,15,16",
+            "breakout_modes": {
+                "1x400G": ["Eth1(Port1)"],
+                "2x200G": ["Eth1/1(Port1)", "Eth1/2(Port1)"],
+                "4x100G": ["Eth1/1(Port1)", "Eth1/2(Port1)", "Eth1/3(Port1)", "Eth1/4(Port1)"],
+                "8x50G": ["Eth1/1(Port1)", "Eth1/2(Port1)", "Eth1/3(Port1)", "Eth1/4(Port1)", "Eth1/5(Port1)", "Eth1/6(Port1)", "Eth1/7(Port1)", "Eth1/8(Port1)"]
+            }
+       },
+
+        "Ethernet16": {
+            "index": "2,2,2,2,2,2,2,2",
+            "lanes": "17,18,19,20,21,22,23,24",
+            "breakout_modes": {
+                "1x400G": ["Eth2(Port2)"],
+                "2x200G": ["Eth2/1(Port2)", "Eth2/2(Port2)"],
+                "4x100G": ["Eth2/1(Port2)", "Eth2/2(Port2)", "Eth2/3(Port2)", "Eth2/4(Port2)"],
+                "8x50G": ["Eth2/1(Port2)", "Eth2/2(Port2)", "Eth2/3(Port2)", "Eth2/4(Port2)", "Eth2/5(Port2)", "Eth2/6(Port2)", "Eth2/7(Port2)", "Eth2/8(Port2)"]
+            }
+        },
+
+        "Ethernet24": {
+            "index": "3,3,3,3,3,3,3,3",
+            "lanes": "25,26,27,28,29,30,31,32",
+            "breakout_modes": {
+                "1x400G": ["Eth3(Port3)"],
+                "2x200G": ["Eth3/1(Port3)", "Eth3/2(Port3)"],
+                "4x100G": ["Eth3/1(Port3)", "Eth3/2(Port3)", "Eth3/3(Port3)", "Eth3/4(Port3)"],
+                "8x50G": ["Eth3/1(Port3)", "Eth3/2(Port3)", "Eth3/3(Port3)", "Eth3/4(Port3)", "Eth3/5(Port3)", "Eth3/6(Port3)", "Eth3/7(Port3)", "Eth3/8(Port3)"]
+            }
+        },
+
+        "Ethernet32": {
+            "index": "4,4,4,4,4,4,4,4",
+            "lanes": "33,34,35,36,37,38,39,40",
+            "breakout_modes": {
+                "1x400G": ["Eth4(Port4)"],
+                "2x200G": ["Eth4/1(Port4)", "Eth4/2(Port4)"],
+                "4x100G": ["Eth4/1(Port4)", "Eth4/2(Port4)", "Eth4/3(Port4)", "Eth4/4(Port4)"],
+                "8x50G": ["Eth4/1(Port4)", "Eth4/2(Port4)", "Eth4/3(Port4)", "Eth4/4(Port4)", "Eth4/5(Port4)", "Eth4/6(Port4)", "Eth4/7(Port4)", "Eth4/8(Port4)"]
+            }
+        },
+
+        "Ethernet40": {
+            "index": "5,5,5,5,5,5,5,5",
+            "lanes": "41,42,43,44,45,46,47,48",
+            "breakout_modes": {
+                "1x400G": ["Eth5(Port5)"],
+                "2x200G": ["Eth5/1(Port5)", "Eth5/2(Port5)"],
+                "4x100G": ["Eth5/1(Port5)", "Eth5/2(Port5)", "Eth5/3(Port5)", "Eth5/4(Port5)"],
+                "8x50G": ["Eth5/1(Port5)", "Eth5/2(Port5)", "Eth5/3(Port5)", "Eth5/4(Port5)", "Eth5/5(Port5)", "Eth5/6(Port5)", "Eth5/7(Port5)", "Eth5/8(Port5)"]
+            }
+        },
+
+        "Ethernet48": {
+            "index": "6,6,6,6,6,6,6,6",
+            "lanes": "49,50,51,52,53,54,55,56",
+            "breakout_modes": {
+                "1x400G": ["Eth6(Port6)"],
+                "2x200G": ["Eth6/1(Port6)", "Eth6/2(Port6)"],
+                "4x100G": ["Eth6/1(Port6)", "Eth6/2(Port6)", "Eth6/3(Port6)", "Eth6/4(Port6)"],
+                "8x50G": ["Eth6/1(Port6)", "Eth6/2(Port6)", "Eth6/3(Port6)", "Eth6/4(Port6)", "Eth6/5(Port6)", "Eth6/6(Port6)", "Eth6/7(Port6)", "Eth6/8(Port6)"]
+            }
+        },
+
+        "Ethernet56": {
+            "index": "7,7,7,7,7,7,7,7",
+            "lanes": "57,58,59,60,61,62,63,64",
+            "breakout_modes": {
+                "1x400G": ["Eth7(Port7)"],
+                "2x200G": ["Eth7/1(Port7)", "Eth7/2(Port7)"],
+                "4x100G": ["Eth7/1(Port7)", "Eth7/2(Port7)", "Eth7/3(Port7)", "Eth7/4(Port7)"],
+                "8x50G": ["Eth7/1(Port7)", "Eth7/2(Port7)", "Eth7/3(Port7)", "Eth7/4(Port7)", "Eth7/5(Port7)", "Eth7/6(Port7)", "Eth7/7(Port7)", "Eth7/8(Port7)"]
+            }
+        },
+
+        "Ethernet64": {
+            "index": "8,8,8,8,8,8,8,8",
+            "lanes": "65,66,67,68,69,70,71,72",
+            "breakout_modes": {
+                "1x400G": ["Eth8(Port8)"],
+                "2x200G": ["Eth8/1(Port8)", "Eth8/2(Port8)"],
+                "4x100G": ["Eth8/1(Port8)", "Eth8/2(Port8)", "Eth8/3(Port8)", "Eth8/4(Port8)"],
+                "8x50G": ["Eth8/1(Port8)", "Eth8/2(Port8)", "Eth8/3(Port8)", "Eth8/4(Port8)", "Eth8/5(Port8)", "Eth8/6(Port8)", "Eth8/7(Port8)", "Eth8/8(Port8)"]
+            }
+        },
+
+        "Ethernet72": {
+            "index": "9,9,9,9,9,9,9,9",
+            "lanes": "73,74,75,76,77,78,79,80",
+            "breakout_modes": {
+                "1x400G": ["Eth9(Port9)"],
+                "2x200G": ["Eth9/1(Port9)", "Eth9/2(Port9)"],
+                "4x100G": ["Eth9/1(Port9)", "Eth9/2(Port9)", "Eth9/3(Port9)", "Eth9/4(Port9)"],
+                "8x50G": ["Eth9/1(Port9)", "Eth9/2(Port9)", "Eth9/3(Port9)", "Eth9/4(Port9)", "Eth9/5(Port9)", "Eth9/6(Port9)", "Eth9/7(Port9)", "Eth9/8(Port9)"]
+            }
+        },
+
+        "Ethernet80": {
+            "index": "10,10,10,10,10,10,10,10",
+            "lanes": "81,82,83,84,85,86,87,88",
+            "breakout_modes": {
+                "1x400G": ["Eth10(Port10)"],
+                "2x200G": ["Eth10/1(Port10)", "Eth10/2(Port10)"],
+                "4x100G": ["Eth10/1(Port10)", "Eth10/2(Port10)", "Eth10/3(Port10)", "Eth10/4(Port10)"],
+                "8x50G": ["Eth10/1(Port10)", "Eth10/2(Port10)", "Eth10/3(Port10)", "Eth10/4(Port10)", "Eth10/5(Port10)", "Eth10/6(Port10)", "Eth10/7(Port10)", "Eth10/8(Port10)"]
+            }
+        },
+        
+        "Ethernet88": {
+            "index": "11,11,11,11,11,11,11,11",
+            "lanes": "89,90,91,92,93,94,95,96",
+            "breakout_modes": {
+                "1x400G": ["Eth11(Port11)"],
+                "2x200G": ["Eth11/1(Port11)", "Eth11/2(Port11)"],
+                "4x100G": ["Eth11/1(Port11)", "Eth11/2(Port11)", "Eth11/3(Port11)", "Eth11/4(Port11)"],
+                "8x50G": ["Eth11/1(Port11)", "Eth11/2(Port11)", "Eth11/3(Port11)", "Eth11/4(Port11)", "Eth11/5(Port11)", "Eth11/6(Port11)", "Eth11/7(Port11)", "Eth11/8(Port11)"]
+            }
+        },
+        
+        "Ethernet96": {
+            "index": "12,12,12,12,12,12,12,12",
+            "lanes": "97,98,99,100,101,102,103,104",
+            "breakout_modes": {
+                "1x400G": ["Eth12(Port12)"],
+                "2x200G": ["Eth12/1(Port12)", "Eth12/2(Port12)"],
+                "4x100G": ["Eth12/1(Port12)", "Eth12/2(Port12)", "Eth12/3(Port12)", "Eth12/4(Port12)"],
+                "8x50G": ["Eth12/1(Port12)", "Eth12/2(Port12)", "Eth12/3(Port12)", "Eth12/4(Port12)", "Eth12/5(Port12)", "Eth12/6(Port12)", "Eth12/7(Port12)", "Eth12/8(Port12)"]
+            }
+        },
+
+        "Ethernet104": {
+            "index": "13,13,13,13,13,13,13,13",
+            "lanes": "105,106,107,108,109,110,111,112",
+            "breakout_modes": {
+                "1x400G": ["Eth13(Port13)"],
+                "2x200G": ["Eth13/1(Port13)", "Eth13/2(Port13)"],
+                "4x100G": ["Eth13/1(Port13)", "Eth13/2(Port13)", "Eth13/3(Port13)", "Eth13/4(Port13)"],
+                "8x50G": ["Eth13/1(Port13)", "Eth13/2(Port13)", "Eth13/3(Port13)", "Eth13/4(Port13)", "Eth13/5(Port13)", "Eth13/6(Port13)", "Eth13/7(Port13)", "Eth13/8(Port13)"]
+            }
+        },
+
+        "Ethernet112": {
+            "index": "14,14,14,14,14,14,14,14",
+            "lanes": "113,114,115,116,117,118,119,120",
+            "breakout_modes": {
+                "1x400G": ["Eth14(Port14)"],
+                "2x200G": ["Eth14/1(Port14)", "Eth14/2(Port14)"],
+                "4x100G": ["Eth14/1(Port14)", "Eth14/2(Port14)", "Eth14/3(Port14)", "Eth14/4(Port14)"],
+                "8x50G": ["Eth14/1(Port14)", "Eth14/2(Port14)", "Eth14/3(Port14)", "Eth14/4(Port14)", "Eth14/5(Port14)", "Eth14/6(Port14)", "Eth14/7(Port14)", "Eth14/8(Port14)"]
+            }
+        },
+
+        "Ethernet120": {
+            "index": "15,15,15,15,15,15,15,15",
+            "lanes": "121,122,123,124,125,126,127,128",
+            "breakout_modes": {
+                "1x400G": ["Eth15(Port15)"],
+                "2x200G": ["Eth15/1(Port15)", "Eth15/2(Port15)"],
+                "4x100G": ["Eth15/1(Port15)", "Eth15/2(Port15)", "Eth15/3(Port15)", "Eth15/4(Port15)"],
+                "8x50G": ["Eth15/1(Port15)", "Eth15/2(Port15)", "Eth15/3(Port15)", "Eth15/4(Port15)", "Eth15/5(Port15)", "Eth15/6(Port15)", "Eth15/7(Port15)", "Eth15/8(Port15)"]
+            }
+        },
+
+        "Ethernet128": {
+            "index": "16,16,16,16,16,16,16,16",
+            "lanes": "129,130,131,132,133,134,135,136",
+            "breakout_modes": {
+                "1x400G": ["Eth16(Port16)"],
+                "2x200G": ["Eth16/1(Port16)", "Eth16/2(Port16)"],
+                "4x100G": ["Eth16/1(Port16)", "Eth16/2(Port16)", "Eth16/3(Port16)", "Eth16/4(Port16)"],
+                "8x50G": ["Eth16/1(Port16)", "Eth16/2(Port16)", "Eth16/3(Port16)", "Eth16/4(Port16)", "Eth16/5(Port16)", "Eth16/6(Port16)", "Eth16/7(Port16)", "Eth16/8(Port16)"]
+            }
+        },
+
+        "Ethernet136": {
+            "index": "17,17,17,17,17,17,17,17",
+            "lanes": "137,138,139,140,141,142,143,144",
+            "breakout_modes": {
+                "1x400G": ["Eth17(Port17)"],
+                "2x200G": ["Eth17/1(Port17)", "Eth17/2(Port17)"],
+                "4x100G": ["Eth17/1(Port17)", "Eth17/2(Port17)", "Eth17/3(Port17)", "Eth17/4(Port17)"],
+                "8x50G": ["Eth17/1(Port17)", "Eth17/2(Port17)", "Eth17/3(Port17)", "Eth17/4(Port17)", "Eth17/5(Port17)", "Eth17/6(Port17)", "Eth17/7(Port17)", "Eth17/8(Port17)"]
+            }
+        },
+
+        "Ethernet144": {
+            "index": "18,18,18,18,18,18,18,18",
+            "lanes": "145,146,147,148,149,150,151,152",
+            "breakout_modes": {
+                "1x400G": ["Eth18(Port18)"],
+                "2x200G": ["Eth18/1(Port18)", "Eth18/2(Port18)"],
+                "4x100G": ["Eth18/1(Port18)", "Eth18/2(Port18)", "Eth18/3(Port18)", "Eth18/4(Port18)"],
+                "8x50G": ["Eth18/1(Port18)", "Eth18/2(Port18)", "Eth18/3(Port18)", "Eth18/4(Port18)", "Eth18/5(Port18)", "Eth18/6(Port18)", "Eth18/7(Port18)", "Eth18/8(Port18)"]
+            }
+        },
+
+        "Ethernet152": {
+            "index": "19,19,19,19,19,19,19,19",
+            "lanes": "153,154,155,156,157,158,159,160",
+            "breakout_modes": {
+                "1x400G": ["Eth19(Port19)"],
+                "2x200G": ["Eth19/1(Port19)", "Eth19/2(Port19)"],
+                "4x100G": ["Eth19/1(Port19)", "Eth19/2(Port19)", "Eth19/3(Port19)", "Eth19/4(Port19)"],
+                "8x50G": ["Eth19/1(Port19)", "Eth19/2(Port19)", "Eth19/3(Port19)", "Eth19/4(Port19)", "Eth19/5(Port19)", "Eth19/6(Port19)", "Eth19/7(Port19)", "Eth19/8(Port19)"]
+            }
+        },
+
+        "Ethernet160": {
+            "index": "20,20,20,20,20,20,20,20",
+            "lanes": "161,162,163,164,165,166,167,168",
+            "breakout_modes": {
+                "1x400G": ["Eth20(Port20)"],
+                "2x200G": ["Eth20/1(Port20)", "Eth20/2(Port20)"],
+                "4x100G": ["Eth20/1(Port20)", "Eth20/2(Port20)", "Eth20/3(Port20)", "Eth20/4(Port20)"],
+                "8x50G": ["Eth20/1(Port20)", "Eth20/2(Port20)", "Eth20/3(Port20)", "Eth20/4(Port20)", "Eth20/5(Port20)", "Eth20/6(Port20)", "Eth20/7(Port20)", "Eth20/8(Port20)"]
+            }
+        },
+
+        "Ethernet168": {
+            "index": "21,21,21,21,21,21,21,21",
+            "lanes": "169,170,171,172,173,174,175,176",
+            "breakout_modes": {
+                "1x400G": ["Eth21(Port21)"],
+                "2x200G": ["Eth21/1(Port21)", "Eth21/2(Port21)"],
+                "4x100G": ["Eth21/1(Port21)", "Eth21/2(Port21)", "Eth21/3(Port21)", "Eth21/4(Port21)"],
+                "8x50G": ["Eth21/1(Port21)", "Eth21/2(Port21)", "Eth21/3(Port21)", "Eth21/4(Port21)", "Eth21/5(Port21)", "Eth21/6(Port21)", "Eth21/7(Port21)", "Eth21/8(Port21)"]
+            }
+        },                        
+
+        "Ethernet176": {
+            "index": "22,22,22,22,22,22,22,22",
+            "lanes": "177,178,179,180,181,182,183,184",
+            "breakout_modes": {
+                "1x400G": ["Eth22(Port22)"],
+                "2x200G": ["Eth22/1(Port22)", "Eth22/2(Port22)"],
+                "4x100G": ["Eth22/1(Port22)", "Eth22/2(Port22)", "Eth22/3(Port22)", "Eth22/4(Port22)"],
+                "8x50G": ["Eth22/1(Port22)", "Eth22/2(Port22)", "Eth22/3(Port22)", "Eth22/4(Port22)", "Eth22/5(Port22)", "Eth22/6(Port22)", "Eth22/7(Port22)", "Eth22/8(Port22)"]
+            }
+        },
+      
+        "Ethernet184": {
+            "index": "23,23,23,23,23,23,23,23",
+            "lanes": "185,186,187,188,189,190,191,192",
+            "breakout_modes": {
+                "1x400G": ["Eth23(Port23)"],
+                "2x200G": ["Eth23/1(Port23)", "Eth23/2(Port23)"],
+                "4x100G": ["Eth23/1(Port23)", "Eth23/2(Port23)", "Eth23/3(Port23)", "Eth23/4(Port23)"],
+                "8x50G": ["Eth23/1(Port23)", "Eth23/2(Port23)", "Eth23/3(Port23)", "Eth23/4(Port23)", "Eth23/5(Port23)", "Eth23/6(Port23)", "Eth23/7(Port23)", "Eth23/8(Port23)"]
+            }
+        },
+
+        "Ethernet192": {
+            "index": "24,24,24,24,24,24,24,24",
+            "lanes": "193,194,195,196,197,198,199,200",
+            "breakout_modes": {
+                "1x400G": ["Eth24(Port24)"],
+                "2x200G": ["Eth24/1(Port24)", "Eth24/2(Port24)"],
+                "4x100G": ["Eth24/1(Port24)", "Eth24/2(Port24)", "Eth24/3(Port24)", "Eth24/4(Port24)"],
+                "8x50G": ["Eth24/1(Port24)", "Eth24/2(Port24)", "Eth24/3(Port24)", "Eth24/4(Port24)", "Eth24/5(Port24)", "Eth24/6(Port24)", "Eth24/7(Port24)", "Eth24/8(Port24)"]
+            }
+        },
+
+        "Ethernet200": {
+            "index": "25,25,25,25,25,25,25,25",
+            "lanes": "201,202,203,204,205,206,207,208",
+            "breakout_modes": {
+                "1x400G": ["Eth25(Port25)"],
+                "2x200G": ["Eth25/1(Port25)", "Eth25/2(Port25)"],
+                "4x100G": ["Eth25/1(Port25)", "Eth25/2(Port25)", "Eth25/3(Port25)", "Eth25/4(Port25)"],
+                "8x50G": ["Eth25/1(Port25)", "Eth25/2(Port25)", "Eth25/3(Port25)", "Eth25/4(Port25)", "Eth25/5(Port25)", "Eth25/6(Port25)", "Eth25/7(Port25)", "Eth25/8(Port25)"]
+            }
+        },
+
+        "Ethernet208": {
+            "index": "26,26,26,26,26,26,26,26",
+            "lanes": "209,210,211,212,213,214,215,216",
+            "breakout_modes": {
+                "1x400G": ["Eth26(Port26)"],
+                "2x200G": ["Eth26/1(Port26)", "Eth26/2(Port26)"],
+                "4x100G": ["Eth26/1(Port26)", "Eth26/2(Port26)", "Eth26/3(Port26)", "Eth26/4(Port26)"],
+                "8x50G": ["Eth26/1(Port26)", "Eth26/2(Port26)", "Eth26/3(Port26)", "Eth26/4(Port26)", "Eth26/5(Port26)", "Eth26/6(Port26)", "Eth26/7(Port26)", "Eth26/8(Port26)"]
+            }
+        },
+        
+        "Ethernet216": {
+            "index": "27,27,27,27,27,27,27,27",
+            "lanes": "217,218,219,220,221,222,223,224",
+            "breakout_modes": {
+                "1x400G": ["Eth27(Port27)"],
+                "2x200G": ["Eth27/1(Port27)", "Eth27/2(Port27)"],
+                "4x100G": ["Eth27/1(Port27)", "Eth27/2(Port27)", "Eth27/3(Port27)", "Eth27/4(Port27)"],
+                "8x50G": ["Eth27/1(Port27)", "Eth27/2(Port27)", "Eth27/3(Port27)", "Eth27/4(Port27)", "Eth27/5(Port27)", "Eth27/6(Port27)", "Eth27/7(Port27)", "Eth27/8(Port27)"]
+            }
+        },
+
+        "Ethernet224": {
+            "index": "28,28,28,28,28,28,28,28",
+            "lanes": "225,226,227,228,229,230,231,232",
+            "breakout_modes": {
+                "1x400G": ["Eth28(Port28)"],
+                "2x200G": ["Eth28/1(Port28)", "Eth28/2(Port28)"],
+                "4x100G": ["Eth28/1(Port28)", "Eth28/2(Port28)", "Eth28/3(Port28)", "Eth28/4(Port28)"],
+                "8x50G": ["Eth28/1(Port28)", "Eth28/2(Port28)", "Eth28/3(Port28)", "Eth28/4(Port28)", "Eth28/5(Port28)", "Eth28/6(Port28)", "Eth28/7(Port28)", "Eth28/8(Port28)"]
+            }
+        },
+
+        "Ethernet232": {
+            "index": "29,29,29,29,29,29,29,29",
+            "lanes": "233,234,235,236,237,238,239,240",
+            "breakout_modes": {
+                "1x400G": ["Eth29(Port29)"],
+                "2x200G": ["Eth29/1(Port29)", "Eth29/2(Port29)"],
+                "4x100G": ["Eth29/1(Port29)", "Eth29/2(Port29)", "Eth29/3(Port29)", "Eth29/4(Port29)"],
+                "8x50G": ["Eth29/1(Port29)", "Eth29/2(Port29)", "Eth29/3(Port29)", "Eth29/4(Port29)", "Eth29/5(Port29)", "Eth29/6(Port29)", "Eth29/7(Port29)", "Eth29/8(Port29)"]
+            }
+        },
+
+        "Ethernet240": {
+            "index": "30,30,30,30,30,30,30,30",
+            "lanes": "241,242,243,244,245,246,247,248",
+            "breakout_modes": {
+                "1x400G": ["Eth30(Port30)"],
+                "2x200G": ["Eth30/1(Port30)", "Eth30/2(Port30)"],
+                "4x100G": ["Eth30/1(Port30)", "Eth30/2(Port30)", "Eth30/3(Port30)", "Eth30/4(Port30)"],
+                "8x50G": ["Eth30/1(Port30)", "Eth30/2(Port30)", "Eth30/3(Port30)", "Eth30/4(Port30)", "Eth30/5(Port30)", "Eth30/6(Port30)", "Eth30/7(Port30)", "Eth30/8(Port30)"]
+            }
+        },
+
+        "Ethernet248": {
+            "index": "31,31,31,31,31,31,31,31",
+            "lanes": "249,250,251,252,253,254,255,256",
+            "breakout_modes": {
+                "1x400G": ["Eth31(Port31)"],
+                "2x200G": ["Eth31/1(Port31)", "Eth31/2(Port31)"],
+                "4x100G": ["Eth31/1(Port31)", "Eth31/2(Port31)", "Eth31/3(Port31)", "Eth31/4(Port31)"],
+                "8x50G": ["Eth31/1(Port31)", "Eth31/2(Port31)", "Eth31/3(Port31)", "Eth31/4(Port31)", "Eth31/5(Port31)", "Eth31/6(Port31)", "Eth31/7(Port31)", "Eth31/8(Port31)"]
+            }
+        },
+
+        "Ethernet256": {
+            "index": "32",
+            "lanes": "257",
+            "breakout_modes": {
+                "1x10G": ["Eth32(Port32)"]
+            }
+        },
+        
+        "Ethernet257": {
+            "index": "33",
+            "lanes": "258",
+            "breakout_modes": {
+                "1x10G": ["Eth33(Port33)"]
+            }
+        }
+    }
+}
+
diff --git a/device/ufispace/x86_64-ufispace_s9301_32d-r0/platform_asic b/device/ufispace/x86_64-ufispace_s9301_32d-r0/platform_asic
new file mode 100644
index 000000000..960467652
--- /dev/null
+++ b/device/ufispace/x86_64-ufispace_s9301_32d-r0/platform_asic
@@ -0,0 +1 @@
+broadcom
diff --git a/device/ufispace/x86_64-ufispace_s9301_32d-r0/platform_components.json b/device/ufispace/x86_64-ufispace_s9301_32d-r0/platform_components.json
new file mode 100644
index 000000000..af225f80c
--- /dev/null
+++ b/device/ufispace/x86_64-ufispace_s9301_32d-r0/platform_components.json
@@ -0,0 +1,13 @@
+{
+    "chassis": {
+        "x86_64-ufispace_s9301_32d-r0": {
+            "component": {
+                "CPLD1": { },
+                "CPLD2": { },
+                "CPLD3": { },
+                "BIOS": { },
+                "BMC": {}
+            }
+        }
+    }
+}
diff --git a/device/ufispace/x86_64-ufispace_s9301_32d-r0/platform_env.conf b/device/ufispace/x86_64-ufispace_s9301_32d-r0/platform_env.conf
new file mode 100644
index 000000000..03a43af97
--- /dev/null
+++ b/device/ufispace/x86_64-ufispace_s9301_32d-r0/platform_env.conf
@@ -0,0 +1 @@
+SYNCD_SHM_SIZE=512m
diff --git a/device/ufispace/x86_64-ufispace_s9301_32d-r0/pmon_daemon_control.json b/device/ufispace/x86_64-ufispace_s9301_32d-r0/pmon_daemon_control.json
new file mode 100644
index 000000000..e348e0168
--- /dev/null
+++ b/device/ufispace/x86_64-ufispace_s9301_32d-r0/pmon_daemon_control.json
@@ -0,0 +1,9 @@
+{
+    "skip_pcied": false,
+    "skip_fancontrol": false,
+    "skip_thermalctld": false,
+    "skip_ledd": true,
+    "skip_xcvrd": false,
+    "skip_psud": false,
+    "skip_syseepromd": false
+}
diff --git a/device/ufispace/x86_64-ufispace_s9301_32d-r0/sensors.conf b/device/ufispace/x86_64-ufispace_s9301_32d-r0/sensors.conf
new file mode 100644
index 000000000..7a1c04088
--- /dev/null
+++ b/device/ufispace/x86_64-ufispace_s9301_32d-r0/sensors.conf
@@ -0,0 +1,9 @@
+# libsensors configuration file
+
+bus "i2c-0" "I2C I801"
+chip "tmp75-i2c-*-4f"
+    label temp1 "CPU Board Temp"
+    set temp1_max 70
+    set temp1_max_hyst 75
+    set temp1_crit 85
+
diff --git a/device/ufispace/x86_64-ufispace_s9301_32d-r0/system_health_monitoring_config.json b/device/ufispace/x86_64-ufispace_s9301_32d-r0/system_health_monitoring_config.json
new file mode 100644
index 000000000..6291e81a0
--- /dev/null
+++ b/device/ufispace/x86_64-ufispace_s9301_32d-r0/system_health_monitoring_config.json
@@ -0,0 +1,15 @@
+{
+    "services_to_ignore": [],
+    "devices_to_ignore": [
+        "asic",
+        "psu",
+        "fan"
+    ],
+    "user_defined_checkers": [],
+    "polling_interval": 60,
+    "led_color": {
+        "fault": "yellow",
+        "normal": "green",
+        "booting": "blinking_green"
+    }
+}
\ No newline at end of file
diff --git a/device/ufispace/x86_64-ufispace_s9301_32db-r0/UFISPACE-S9301-32DB/hwsku.json b/device/ufispace/x86_64-ufispace_s9301_32db-r0/UFISPACE-S9301-32DB/hwsku.json
new file mode 100644
index 000000000..c104b8d8c
--- /dev/null
+++ b/device/ufispace/x86_64-ufispace_s9301_32db-r0/UFISPACE-S9301-32DB/hwsku.json
@@ -0,0 +1,101 @@
+{
+    "interfaces": {
+        "Ethernet0": {
+            "default_brkout_mode": "1x200G"
+        },
+        "Ethernet4": {
+            "default_brkout_mode": "1x200G"
+        },
+        "Ethernet8": {
+            "default_brkout_mode": "1x200G"
+        },
+        "Ethernet12": {
+            "default_brkout_mode": "1x200G"
+        },
+        "Ethernet16": {
+            "default_brkout_mode": "1x200G"
+        },
+        "Ethernet20": {
+            "default_brkout_mode": "1x200G"
+        },
+        "Ethernet24": {
+            "default_brkout_mode": "1x200G"
+        },
+        "Ethernet28": {
+            "default_brkout_mode": "1x200G"
+        },
+        "Ethernet32": {
+            "default_brkout_mode": "1x200G"
+        },
+        "Ethernet36": {
+            "default_brkout_mode": "1x200G"
+        },
+        "Ethernet40": {
+            "default_brkout_mode": "1x200G"
+        },
+        "Ethernet44": {
+            "default_brkout_mode": "1x200G"
+        },
+        "Ethernet48": {
+            "default_brkout_mode": "1x200G"
+        },
+        "Ethernet52": {
+            "default_brkout_mode": "1x200G"
+        },
+        "Ethernet56": {
+            "default_brkout_mode": "1x200G"
+        },
+        "Ethernet60": {
+            "default_brkout_mode": "1x200G"
+        },
+        "Ethernet64": {
+            "default_brkout_mode": "1x200G"
+        },
+        "Ethernet68": {
+            "default_brkout_mode": "1x200G"
+        },
+        "Ethernet72": {
+            "default_brkout_mode": "1x200G"
+        },
+        "Ethernet76": {
+            "default_brkout_mode": "1x200G"
+        },
+        "Ethernet80": {
+            "default_brkout_mode": "1x200G"
+        },
+        "Ethernet84": {
+            "default_brkout_mode": "1x200G"
+        },
+        "Ethernet88": {
+            "default_brkout_mode": "1x200G"
+        },
+        "Ethernet92": {
+            "default_brkout_mode": "1x200G"
+        },
+        "Ethernet96": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet104": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet112": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet120": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet128": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet136": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet144": {
+            "default_brkout_mode": "1x400G"
+        },
+        "Ethernet152": {
+            "default_brkout_mode": "1x400G"
+        }
+    }
+}
+
diff --git a/device/ufispace/x86_64-ufispace_s9301_32db-r0/UFISPACE-S9301-32DB/port_config.ini b/device/ufispace/x86_64-ufispace_s9301_32db-r0/UFISPACE-S9301-32DB/port_config.ini
new file mode 100644
index 000000000..ad745c44d
--- /dev/null
+++ b/device/ufispace/x86_64-ufispace_s9301_32db-r0/UFISPACE-S9301-32DB/port_config.ini
@@ -0,0 +1,33 @@
+# name         lanes                              alias           index    speed
+Ethernet0     1,2,3,4                             Ethernet1/1     0        200000
+Ethernet4     5,6,7,8                             Ethernet2/1     1        200000
+Ethernet8     9,10,11,12                          Ethernet3/1     2        200000
+Ethernet12    13,14,15,16                         Ethernet4/1     3        200000
+Ethernet16    17,18,19,20                         Ethernet5/1     4        200000
+Ethernet20    21,22,23,24                         Ethernet6/1     5        200000
+Ethernet24    25,26,27,28                         Ethernet7/1     6        200000
+Ethernet28    29,30,31,32                         Ethernet8/1     7        200000
+Ethernet32    33,34,35,36                         Ethernet9/1     8        200000
+Ethernet36    37,38,39,40                         Ethernet10/1    9        200000
+Ethernet40    41,42,43,44                         Ethernet11/1    10       200000
+Ethernet44    45,46,47,48                         Ethernet12/1    11       200000
+Ethernet48    49,50,51,52                         Ethernet13/1    12       200000
+Ethernet52    53,54,55,56                         Ethernet14/1    13       200000
+Ethernet56    57,58,59,60                         Ethernet15/1    14       200000
+Ethernet60    61,62,63,64                         Ethernet16/1    15       200000
+Ethernet64    65,66,67,68                         Ethernet17/1    16       200000
+Ethernet68    69,70,71,72                         Ethernet18/1    17       200000
+Ethernet72    73,74,75,76                         Ethernet19/1    18       200000
+Ethernet76    77,78,79,80                         Ethernet20/1    19       200000
+Ethernet80    81,82,83,84                         Ethernet21/1    20       200000
+Ethernet84    85,86,87,88                         Ethernet22/1    21       200000
+Ethernet88    89,90,91,92                         Ethernet23/1    22       200000
+Ethernet92    93,94,95,96                         Ethernet24/1    23       200000
+Ethernet96    97,98,99,100,101,102,103,104        Ethernet25/1    24       400000
+Ethernet104   105,106,107,108,109,110,111,112     Ethernet26/1    25       400000
+Ethernet112   113,114,115,116,117,118,119,120     Ethernet27/1    26       400000
+Ethernet120   121,122,123,124,125,126,127,128     Ethernet28/1    27       400000
+Ethernet128   129,130,131,132,133,134,135,136     Ethernet29/1    28       400000
+Ethernet136   137,138,139,140,141,142,143,144     Ethernet30/1    29       400000
+Ethernet144   145,146,147,148,149,150,151,152     Ethernet31/1    30       400000
+Ethernet152   153,154,155,156,157,158,159,160     Ethernet32/1    31       400000
diff --git a/device/ufispace/x86_64-ufispace_s9301_32db-r0/UFISPACE-S9301-32DB/sai.profile b/device/ufispace/x86_64-ufispace_s9301_32db-r0/UFISPACE-S9301-32DB/sai.profile
new file mode 100644
index 000000000..f0f476720
--- /dev/null
+++ b/device/ufispace/x86_64-ufispace_s9301_32db-r0/UFISPACE-S9301-32DB/sai.profile
@@ -0,0 +1 @@
+SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td4-s9301-24x200G-8x400G.config.yml
diff --git a/device/ufispace/x86_64-ufispace_s9301_32db-r0/UFISPACE-S9301-32DB/td4-s9301-24x200G-8x400G.config.yml b/device/ufispace/x86_64-ufispace_s9301_32db-r0/UFISPACE-S9301-32DB/td4-s9301-24x200G-8x400G.config.yml
new file mode 100755
index 000000000..149e549bb
--- /dev/null
+++ b/device/ufispace/x86_64-ufispace_s9301_32db-r0/UFISPACE-S9301-32DB/td4-s9301-24x200G-8x400G.config.yml
@@ -0,0 +1,503 @@
+#r1.0.2
+#
+# BCM56780 24x200g 8x400g port configuration.
+#
+# configuration yaml file
+#   device:
+#       <unit>:
+#           <table>:
+#               ?
+#                   <key_fld_1>: <value>
+#                   <key_fld_2>: <value>
+#                   ...
+#                   <key_fld_n>: <value>
+#               :
+#                   <data_fld_1>: <value>
+#                   <data_fld_2>: <value>
+#                   ...
+#                   <data_fld_n>: <value>
+#
+
+---
+device:
+    0:
+        DEVICE_CONFIG:
+            # CORE CLOCK FREQUENCY
+            CORE_CLK_FREQ: CLK_1350MHZ
+            # PP CLOCK FREQUENCY
+            PP_CLK_FREQ: CLK_1350MHZ
+...
+---
+device:
+    0:  
+        FP_CONFIG:
+            FP_ING_OPERMODE: GLOBAL_PIPE_AWARE
+...
+---
+bcm_device:
+    0:  
+        global:
+            sai_remap_prio_on_tnl_egress: 1
+            global_flexctr_ing_action_num_reserved: 32
+            global_flexctr_ing_group_num_reserved: 2
+            global_flexctr_ing_pool_num_reserved: 12
+            global_flexctr_ing_quant_num_reserved: 2
+            global_flexctr_ing_op_profile_num_reserved: 32
+            l3_intf_vlan_split_egress: 1
+            pktio_mode: 1
+            bcm_tunnel_term_compatible_mode: 1
+            vlan_flooding_l2mc_num_reserved: 0
+            l3_alpm_template: 1
+            l3_alpm2_bnk_threshold: 100 
+            l2_hitbit_enable: 0
+            uft_mode: 1
+            l3_enable: 1
+            ipv6_lpm_128b_enable: 1
+            shared_block_mask_section: uc_bc
+            skip_protocol_default_entries: 1
+            sai_tunnel_support: 0
+            flexctr_action_reserved_ipmc_hitbit: 1
+            sai_nbr_bcast_ifp_optimized: 1
+            use_all_splithorizon_groups: 1
+            riot_enable: 1
+            riot_overlay_l3_intf_mem_size: 8192
+            riot_overlay_l3_egress_mem_size: 32768
+            l3_ecmp_levels: 2
+            riot_overlay_ecmp_resilient_hash_size: 16384
+            sai_feat_tail_timestamp: 1
+            sai_port_queue_ecn_counter: 1
+            sai_field_group_auto_prioritize: 1
+...
+---
+device:
+    0:
+        PC_PORT_PHYS_MAP:
+            ?
+                # CPU port
+                PORT_ID: 0
+            :
+                PC_PHYS_PORT_ID: 0
+            ?
+                # pipe 0
+                PORT_ID: 1
+            :
+                PC_PHYS_PORT_ID: 1
+            ?
+                PORT_ID: 2
+            :
+                PC_PHYS_PORT_ID: 5
+            ?
+                PORT_ID: 3
+            :
+                PC_PHYS_PORT_ID: 9
+            ?
+                PORT_ID: 4
+            :
+                PC_PHYS_PORT_ID: 13
+            ?
+                PORT_ID: 5
+            :
+                PC_PHYS_PORT_ID: 17
+            ?
+                PORT_ID: 6
+            :
+                PC_PHYS_PORT_ID: 21
+            ?
+                PORT_ID: 7
+            :
+                PC_PHYS_PORT_ID: 25
+            ?
+                PORT_ID: 8
+            :
+                PC_PHYS_PORT_ID: 29
+            ?
+                PORT_ID: 9
+            :
+                PC_PHYS_PORT_ID: 33
+            ?
+                PORT_ID: 10
+            :
+                PC_PHYS_PORT_ID: 37
+            ?
+                # pipe 1
+                PORT_ID: 20
+            :
+                PC_PHYS_PORT_ID: 41
+            ?
+                PORT_ID: 21
+            :
+                PC_PHYS_PORT_ID: 45
+            ?
+                PORT_ID: 22
+            :
+                PC_PHYS_PORT_ID: 49
+            ?
+                PORT_ID: 23
+            :
+                PC_PHYS_PORT_ID: 53
+            ?
+                PORT_ID: 24
+            :
+                PC_PHYS_PORT_ID: 57
+            ?
+                PORT_ID: 25
+            :
+                PC_PHYS_PORT_ID: 61
+            ?
+                PORT_ID: 26
+            :
+                PC_PHYS_PORT_ID: 65
+            ?
+                PORT_ID: 27
+            :
+                PC_PHYS_PORT_ID: 69
+            ?
+                PORT_ID: 28
+            :
+                PC_PHYS_PORT_ID: 73
+            ?
+                PORT_ID: 29
+            :
+                PC_PHYS_PORT_ID: 77
+            ?
+                # pipe 2
+                PORT_ID: 40
+            :
+                PC_PHYS_PORT_ID: 81
+            ?
+                PORT_ID: 41
+            :
+                PC_PHYS_PORT_ID: 85
+            ?
+                PORT_ID: 42
+            :
+                PC_PHYS_PORT_ID: 89
+            ?
+                PORT_ID: 43
+            :
+                PC_PHYS_PORT_ID: 93
+            ?
+                # BC12 400G
+                PORT_ID: 44
+            :
+                PC_PHYS_PORT_ID: 97
+            ?
+                PORT_ID: 45
+            :
+                PC_PHYS_PORT_ID: 105
+            ?
+                PORT_ID: 46
+            :
+                PC_PHYS_PORT_ID: 113
+            ?
+                # pipe 3
+                PORT_ID: 60
+            :
+                PC_PHYS_PORT_ID: 121
+            ?
+                PORT_ID: 61
+            :
+                PC_PHYS_PORT_ID: 129
+            ?
+                PORT_ID: 62
+            :
+                PC_PHYS_PORT_ID: 137
+            ?
+                PORT_ID: 63
+            :
+                PC_PHYS_PORT_ID: 145
+            ?
+                PORT_ID: 64
+            :
+                PC_PHYS_PORT_ID: 153
+...
+---
+device:
+    0:
+        PC_PORT:
+            ?
+                PORT_ID: 0
+            :
+                &port_mode_10g
+                ENABLE: 1
+                SPEED: 10000
+                NUM_LANES: 1
+            ?
+                PORT_ID: [[1, 10],
+                          [20, 29],
+                          [40, 43]]
+            :
+                &port_mode_200g
+                ENABLE: 0
+                SPEED: 200000
+                NUM_LANES: 4
+                FEC_MODE: PC_FEC_RS544_2XN
+                LINK_TRAINING: 0
+                MAX_FRAME_SIZE: 9416
+            ?
+                PORT_ID: [[44, 46],
+                          [60, 64]]
+            :
+                &port_mode_400g
+                ENABLE: 0
+                SPEED: 400000
+                NUM_LANES: 8
+                FEC_MODE: PC_FEC_RS544_2XN
+                LINK_TRAINING: 0
+                MAX_FRAME_SIZE: 9416
+...
+---
+device:
+    0:
+        # Per pipe flex counter configuration
+        CTR_EFLEX_CONFIG:
+            CTR_ING_EFLEX_OPERMODE_PIPEUNIQUE: 0
+            CTR_EGR_EFLEX_OPERMODE_PIPEUNIQUE: 0
+...
+---
+device:
+    0:
+        PC_PM_CORE:
+            ?
+                PC_PM_ID: 1
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32105476
+                TX_LANE_MAP: 0x54763210
+                RX_POLARITY_FLIP: 0x0f
+                TX_POLARITY_FLIP: 0xfa
+            ?
+                PC_PM_ID: 2
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x75043216
+                TX_LANE_MAP: 0x32107456
+                RX_POLARITY_FLIP: 0x53
+                TX_POLARITY_FLIP: 0x5e
+            ?
+                PC_PM_ID: 3
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54763210
+                TX_LANE_MAP: 0x23104567
+                RX_POLARITY_FLIP: 0x4c
+                TX_POLARITY_FLIP: 0x03
+            ?
+                PC_PM_ID: 4
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54763210
+                TX_LANE_MAP: 0x23104756
+                RX_POLARITY_FLIP: 0x14
+                TX_POLARITY_FLIP: 0xa6
+            ?
+                PC_PM_ID: 5
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x54763210
+                TX_LANE_MAP: 0x23104576
+                RX_POLARITY_FLIP: 0x0c
+                TX_POLARITY_FLIP: 0x80
+            ?
+                PC_PM_ID: 6
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13206475
+                TX_LANE_MAP: 0x46573210
+                RX_POLARITY_FLIP: 0x00
+                TX_POLARITY_FLIP: 0xc0
+            ?
+                PC_PM_ID: 7
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13206475
+                TX_LANE_MAP: 0x46573210
+                RX_POLARITY_FLIP: 0x10
+                TX_POLARITY_FLIP: 0xc0
+            ?
+                PC_PM_ID: 8
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13206475
+                TX_LANE_MAP: 0x46573210
+                RX_POLARITY_FLIP: 0x00
+                TX_POLARITY_FLIP: 0xc0
+            ?
+                PC_PM_ID: 9
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x05674123
+                TX_LANE_MAP: 0x76543210
+                RX_POLARITY_FLIP: 0xb5
+                TX_POLARITY_FLIP: 0x0e
+            ?
+                PC_PM_ID: 10
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x45763210
+                TX_LANE_MAP: 0x32105476
+                RX_POLARITY_FLIP: 0x60
+                TX_POLARITY_FLIP: 0x50
+            ?
+                PC_PM_ID: 11
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x32105476
+                TX_LANE_MAP: 0x54763210
+                RX_POLARITY_FLIP: 0x4f
+                TX_POLARITY_FLIP: 0x2f
+            ?
+                PC_PM_ID: 12
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x41230567
+                TX_LANE_MAP: 0x31207564
+                RX_POLARITY_FLIP: 0xa
+                TX_POLARITY_FLIP: 0x2a
+            ?
+                PC_PM_ID: 13
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x67243501
+                TX_LANE_MAP: 0x53426170
+                RX_POLARITY_FLIP: 0x3f
+                TX_POLARITY_FLIP: 0xC3
+            ?
+                PC_PM_ID: 14
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x12743065
+                TX_LANE_MAP: 0x42537061
+                RX_POLARITY_FLIP: 0xd1
+                TX_POLARITY_FLIP: 0x33
+            ?
+                PC_PM_ID: 15
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x74126530
+                TX_LANE_MAP: 0x02136574
+                RX_POLARITY_FLIP: 0x7e
+                TX_POLARITY_FLIP: 0x33
+            ?
+                PC_PM_ID: 16
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x46352701
+                TX_LANE_MAP: 0x27360514
+                RX_POLARITY_FLIP: 0x36
+                TX_POLARITY_FLIP: 0x61
+            ?
+                PC_PM_ID: 17
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x20534167
+                TX_LANE_MAP: 0x34250617
+                RX_POLARITY_FLIP: 0x7b
+                TX_POLARITY_FLIP: 0xcc
+            ?
+                PC_PM_ID: 18
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x65034721
+                TX_LANE_MAP: 0x24351607
+                RX_POLARITY_FLIP: 0x74
+                TX_POLARITY_FLIP: 0x63
+            ?
+                PC_PM_ID: 19
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x15473620
+                TX_LANE_MAP: 0x57640213
+                RX_POLARITY_FLIP: 0xf9
+                TX_POLARITY_FLIP: 0x56
+            ?
+                PC_PM_ID: 20
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x23504167
+                TX_LANE_MAP: 0x32056714
+                RX_POLARITY_FLIP: 0x65
+                TX_POLARITY_FLIP: 0x02
+...
+
+
diff --git a/device/ufispace/x86_64-ufispace_s9301_32db-r0/custom_led.bin b/device/ufispace/x86_64-ufispace_s9301_32db-r0/custom_led.bin
new file mode 100755
index 0000000000000000000000000000000000000000..6d45222731c47014555a2404c044e2f9226ddf4e
GIT binary patch
literal 648
zcmWO1+b>&j0KoCz={e>)_j^&Nr(<k3_v<!#baksSby?>!$7!P?A|ir_ptT^2EFvN_
zvX}h<UOX<*_zU_dUiRj}i~oS{!{-n9JYIz_h27RKmCI!ot)RoBdz^Jv>DcS@l^h5q
zm^i*0{OdMdQk!+nrmL|h%^CC#DYe^LM4amnF-eV13r#li?7CsGhm0E|I+O2E%mIhX
z44F}LP?h{!s?#6x-}vP~XCNF<{!5Wm{VrzFZtvyG$A8!E{bnH~A%q1o6vW{L;*o$v
zBq13oc!^Y`AsrdWL>97<gIwex9|b6c6-6jU32Z2Z3Oh77@Cs!p$7@ue5^wMpRd|Q@
zs74KHQHOdopb<@=CtA>oHhjQGd_p@q;DnA&xbPWnbfFtP=tUnq=*JffU=Uw11TTg$
zf>Dg&8+`bVaZF$mQ}}^t7%&mQEaote1uS9-%UHoG*0F(2Y+(ms{KOs(@C%3djUyc6
M1gAJd1Q+;&XQS^=TL1t6

literal 0
HcmV?d00001

diff --git a/device/ufispace/x86_64-ufispace_s9301_32db-r0/default_sku b/device/ufispace/x86_64-ufispace_s9301_32db-r0/default_sku
new file mode 100644
index 000000000..0125446bf
--- /dev/null
+++ b/device/ufispace/x86_64-ufispace_s9301_32db-r0/default_sku
@@ -0,0 +1 @@
+UFISPACE-S9301-32DB t1
diff --git a/device/ufispace/x86_64-ufispace_s9301_32db-r0/fancontrol b/device/ufispace/x86_64-ufispace_s9301_32db-r0/fancontrol
new file mode 100644
index 000000000..1234cd994
--- /dev/null
+++ b/device/ufispace/x86_64-ufispace_s9301_32db-r0/fancontrol
@@ -0,0 +1,10 @@
+# Configuration file generated by pwmconfig, changes will be lost
+INTERVAL=10
+DEVPATH=
+DEVNAME=
+FCTEMPS=
+FCFANS=
+MINTEMP=
+MAXTEMP=
+MINSTART=
+MINSTOP=
diff --git a/device/ufispace/x86_64-ufispace_s9301_32db-r0/installer.conf b/device/ufispace/x86_64-ufispace_s9301_32db-r0/installer.conf
new file mode 100644
index 000000000..81844d3a8
--- /dev/null
+++ b/device/ufispace/x86_64-ufispace_s9301_32db-r0/installer.conf
@@ -0,0 +1,4 @@
+CONSOLE_PORT=0x3f8
+CONSOLE_DEV=0
+CONSOLE_SPEED=115200
+ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="modprobe.blacklist=i40e,gpio_ich,qat_c3xxx nomodeset pcie_aspm=off"
diff --git a/device/ufispace/x86_64-ufispace_s9301_32db-r0/led_proc_init.soc b/device/ufispace/x86_64-ufispace_s9301_32db-r0/led_proc_init.soc
new file mode 100644
index 000000000..eda09a0dd
--- /dev/null
+++ b/device/ufispace/x86_64-ufispace_s9301_32db-r0/led_proc_init.soc
@@ -0,0 +1,4 @@
+led stop
+led load /usr/share/sonic/platform/custom_led.bin
+led auto on
+led start
diff --git a/device/ufispace/x86_64-ufispace_s9301_32db-r0/pcie.yaml b/device/ufispace/x86_64-ufispace_s9301_32db-r0/pcie.yaml
new file mode 100644
index 000000000..131d55222
--- /dev/null
+++ b/device/ufispace/x86_64-ufispace_s9301_32db-r0/pcie.yaml
@@ -0,0 +1,741 @@
+- bus: '00'
+  dev: '00'
+  fn: '0'
+  id: '2020'
+  name: 'Host bridge: Intel Corporation Sky Lake-E DMI3 Registers (rev 04)'
+- bus: '00'
+  dev: '04'
+  fn: '0'
+  id: '2021'
+  name: 'System peripheral: Intel Corporation Sky Lake-E CBDMA Registers (rev 04)'
+- bus: '00'
+  dev: '04'
+  fn: '1'
+  id: '2021'
+  name: 'System peripheral: Intel Corporation Sky Lake-E CBDMA Registers (rev 04)'
+- bus: '00'
+  dev: '04'
+  fn: '2'
+  id: '2021'
+  name: 'System peripheral: Intel Corporation Sky Lake-E CBDMA Registers (rev 04)'
+- bus: '00'
+  dev: '04'
+  fn: '3'
+  id: '2021'
+  name: 'System peripheral: Intel Corporation Sky Lake-E CBDMA Registers (rev 04)'
+- bus: '00'
+  dev: '04'
+  fn: '4'
+  id: '2021'
+  name: 'System peripheral: Intel Corporation Sky Lake-E CBDMA Registers (rev 04)'
+- bus: '00'
+  dev: '04'
+  fn: '5'
+  id: '2021'
+  name: 'System peripheral: Intel Corporation Sky Lake-E CBDMA Registers (rev 04)'
+- bus: '00'
+  dev: '04'
+  fn: '6'
+  id: '2021'
+  name: 'System peripheral: Intel Corporation Sky Lake-E CBDMA Registers (rev 04)'
+- bus: '00'
+  dev: '04'
+  fn: '7'
+  id: '2021'
+  name: 'System peripheral: Intel Corporation Sky Lake-E CBDMA Registers (rev 04)'
+- bus: '00'
+  dev: '05'
+  fn: '0'
+  id: '2024'
+  name: 'System peripheral: Intel Corporation Sky Lake-E MM/Vt-d Configuration Registers
+    (rev 04)'
+- bus: '00'
+  dev: '05'
+  fn: '2'
+  id: '2025'
+  name: 'System peripheral: Intel Corporation Sky Lake-E RAS (rev 04)'
+- bus: '00'
+  dev: '05'
+  fn: '4'
+  id: '2026'
+  name: 'PIC: Intel Corporation Sky Lake-E IOAPIC (rev 04)'
+- bus: '00'
+  dev: 08
+  fn: '0'
+  id: '2014'
+  name: 'System peripheral: Intel Corporation Sky Lake-E Ubox Registers (rev 04)'
+- bus: '00'
+  dev: 08
+  fn: '1'
+  id: '2015'
+  name: 'Performance counters: Intel Corporation Sky Lake-E Ubox Registers (rev 04)'
+- bus: '00'
+  dev: 08
+  fn: '2'
+  id: '2016'
+  name: 'System peripheral: Intel Corporation Sky Lake-E Ubox Registers (rev 04)'
+- bus: '00'
+  dev: '11'
+  fn: '0'
+  id: a1ec
+  name: 'Unassigned class [ff00]: Intel Corporation C620 Series Chipset Family MROM
+    0 (rev 04)'
+- bus: '00'
+  dev: '11'
+  fn: '1'
+  id: a1ed
+  name: 'Unassigned class [ff00]: Intel Corporation C620 Series Chipset Family MROM
+    1 (rev 04)'
+- bus: '00'
+  dev: '14'
+  fn: '0'
+  id: a1af
+  name: 'USB controller: Intel Corporation C620 Series Chipset Family USB 3.0 xHCI
+    Controller (rev 04)'
+- bus: '00'
+  dev: '14'
+  fn: '2'
+  id: a1b1
+  name: 'Signal processing controller: Intel Corporation C620 Series Chipset Family
+    Thermal Subsystem (rev 04)'
+- bus: '00'
+  dev: '16'
+  fn: '0'
+  id: a1ba
+  name: 'Communication controller: Intel Corporation C620 Series Chipset Family MEI
+    Controller #1 (rev 04)'
+- bus: '00'
+  dev: '16'
+  fn: '4'
+  id: a1be
+  name: 'Communication controller: Intel Corporation C620 Series Chipset Family MEI
+    Controller #3 (rev 04)'
+- bus: '00'
+  dev: 1c
+  fn: '0'
+  id: a190
+  name: 'PCI bridge: Intel Corporation C620 Series Chipset Family PCI Express Root
+    Port #1 (rev f4)'
+- bus: '00'
+  dev: 1c
+  fn: '4'
+  id: a194
+  name: 'PCI bridge: Intel Corporation C620 Series Chipset Family PCI Express Root
+    Port #5 (rev f4)'
+- bus: '00'
+  dev: 1c
+  fn: '5'
+  id: a195
+  name: 'PCI bridge: Intel Corporation C620 Series Chipset Family PCI Express Root
+    Port #6 (rev f4)'
+- bus: '00'
+  dev: 1d
+  fn: '0'
+  id: a198
+  name: 'PCI bridge: Intel Corporation C620 Series Chipset Family PCI Express Root
+    Port #9 (rev f4)'
+- bus: '00'
+  dev: 1d
+  fn: '2'
+  id: a19a
+  name: 'PCI bridge: Intel Corporation C620 Series Chipset Family PCI Express Root
+    Port #11 (rev f4)'
+- bus: '00'
+  dev: 1f
+  fn: '0'
+  id: a1c8
+  name: 'ISA bridge: Intel Corporation Device a1c8 (rev 04)'
+- bus: '00'
+  dev: 1f
+  fn: '2'
+  id: a1a1
+  name: 'Memory controller: Intel Corporation C620 Series Chipset Family Power Management
+    Controller (rev 04)'
+- bus: '00'
+  dev: 1f
+  fn: '4'
+  id: a1a3
+  name: 'SMBus: Intel Corporation C620 Series Chipset Family SMBus (rev 04)'
+- bus: '00'
+  dev: 1f
+  fn: '5'
+  id: a1a4
+  name: 'Serial bus controller [0c80]: Intel Corporation C620 Series Chipset Family
+    SPI Controller (rev 04)'
+- bus: '02'
+  dev: '00'
+  fn: '0'
+  id: '1533'
+  name: 'Ethernet controller: Intel Corporation I210 Gigabit Network Connection (rev
+    03)'
+- bus: '03'
+  dev: '00'
+  fn: '0'
+  id: '1150'
+  name: 'PCI bridge: ASPEED Technology, Inc. AST1150 PCI-to-PCI Bridge (rev 03)'
+- bus: '04'
+  dev: '00'
+  fn: '0'
+  id: '2000'
+  name: 'VGA compatible controller: ASPEED Technology, Inc. ASPEED Graphics Family
+    (rev 30)'
+- bus: '06'
+  dev: '00'
+  fn: '0'
+  id: '0625'
+  name: 'SATA controller: ASMedia Technology Inc. Device 0625 (rev 01)'
+- bus: '16'
+  dev: '00'
+  fn: '0'
+  id: '2030'
+  name: 'PCI bridge: Intel Corporation Sky Lake-E PCI Express Root Port A (rev 04)'
+- bus: '16'
+  dev: '01'
+  fn: '0'
+  id: '2031'
+  name: 'PCI bridge: Intel Corporation Sky Lake-E PCI Express Root Port B (rev 04)'
+- bus: '16'
+  dev: '02'
+  fn: '0'
+  id: '2032'
+  name: 'PCI bridge: Intel Corporation Sky Lake-E PCI Express Root Port C (rev 04)'
+- bus: '16'
+  dev: '03'
+  fn: '0'
+  id: '2033'
+  name: 'PCI bridge: Intel Corporation Sky Lake-E PCI Express Root Port D (rev 04)'
+- bus: '16'
+  dev: '05'
+  fn: '0'
+  id: '2034'
+  name: 'System peripheral: Intel Corporation Sky Lake-E VT-d (rev 04)'
+- bus: '16'
+  dev: '05'
+  fn: '2'
+  id: '2035'
+  name: 'System peripheral: Intel Corporation Sky Lake-E RAS Configuration Registers
+    (rev 04)'
+- bus: '16'
+  dev: '05'
+  fn: '4'
+  id: '2036'
+  name: 'PIC: Intel Corporation Sky Lake-E IOxAPIC Configuration Registers (rev 04)'
+- bus: '16'
+  dev: 08
+  fn: '0'
+  id: 208d
+  name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
+- bus: '16'
+  dev: 08
+  fn: '1'
+  id: 208d
+  name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
+- bus: '16'
+  dev: 08
+  fn: '2'
+  id: 208d
+  name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
+- bus: '16'
+  dev: 08
+  fn: '3'
+  id: 208d
+  name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
+- bus: '16'
+  dev: 08
+  fn: '4'
+  id: 208d
+  name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
+- bus: '16'
+  dev: 08
+  fn: '5'
+  id: 208d
+  name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
+- bus: '16'
+  dev: 08
+  fn: '6'
+  id: 208d
+  name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
+- bus: '16'
+  dev: 08
+  fn: '7'
+  id: 208d
+  name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
+- bus: '16'
+  dev: 09
+  fn: '0'
+  id: 208d
+  name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
+- bus: '16'
+  dev: 09
+  fn: '1'
+  id: 208d
+  name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
+- bus: '16'
+  dev: 09
+  fn: '2'
+  id: 208d
+  name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
+- bus: '16'
+  dev: 09
+  fn: '3'
+  id: 208d
+  name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
+- bus: '16'
+  dev: 09
+  fn: '4'
+  id: 208d
+  name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
+- bus: '16'
+  dev: 09
+  fn: '5'
+  id: 208d
+  name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
+- bus: '16'
+  dev: 09
+  fn: '6'
+  id: 208d
+  name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
+- bus: '16'
+  dev: 09
+  fn: '7'
+  id: 208d
+  name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
+- bus: '16'
+  dev: 0a
+  fn: '0'
+  id: 208d
+  name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
+- bus: '16'
+  dev: 0a
+  fn: '1'
+  id: 208d
+  name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
+- bus: '16'
+  dev: 0e
+  fn: '0'
+  id: 208e
+  name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
+- bus: '16'
+  dev: 0e
+  fn: '1'
+  id: 208e
+  name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
+- bus: '16'
+  dev: 0e
+  fn: '2'
+  id: 208e
+  name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
+- bus: '16'
+  dev: 0e
+  fn: '3'
+  id: 208e
+  name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
+- bus: '16'
+  dev: 0e
+  fn: '4'
+  id: 208e
+  name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
+- bus: '16'
+  dev: 0e
+  fn: '5'
+  id: 208e
+  name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
+- bus: '16'
+  dev: 0e
+  fn: '6'
+  id: 208e
+  name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
+- bus: '16'
+  dev: 0e
+  fn: '7'
+  id: 208e
+  name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
+- bus: '16'
+  dev: 0f
+  fn: '0'
+  id: 208e
+  name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
+- bus: '16'
+  dev: 0f
+  fn: '1'
+  id: 208e
+  name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
+- bus: '16'
+  dev: 0f
+  fn: '2'
+  id: 208e
+  name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
+- bus: '16'
+  dev: 0f
+  fn: '3'
+  id: 208e
+  name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
+- bus: '16'
+  dev: 0f
+  fn: '4'
+  id: 208e
+  name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
+- bus: '16'
+  dev: 0f
+  fn: '5'
+  id: 208e
+  name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
+- bus: '16'
+  dev: 0f
+  fn: '6'
+  id: 208e
+  name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
+- bus: '16'
+  dev: 0f
+  fn: '7'
+  id: 208e
+  name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
+- bus: '16'
+  dev: '10'
+  fn: '0'
+  id: 208e
+  name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
+- bus: '16'
+  dev: '10'
+  fn: '1'
+  id: 208e
+  name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
+- bus: '16'
+  dev: 1d
+  fn: '0'
+  id: '2054'
+  name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
+- bus: '16'
+  dev: 1d
+  fn: '1'
+  id: '2055'
+  name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
+- bus: '16'
+  dev: 1d
+  fn: '2'
+  id: '2056'
+  name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
+- bus: '16'
+  dev: 1d
+  fn: '3'
+  id: '2057'
+  name: 'System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)'
+- bus: '16'
+  dev: 1e
+  fn: '0'
+  id: '2080'
+  name: 'System peripheral: Intel Corporation Sky Lake-E PCU Registers (rev 04)'
+- bus: '16'
+  dev: 1e
+  fn: '1'
+  id: '2081'
+  name: 'System peripheral: Intel Corporation Sky Lake-E PCU Registers (rev 04)'
+- bus: '16'
+  dev: 1e
+  fn: '2'
+  id: '2082'
+  name: 'System peripheral: Intel Corporation Sky Lake-E PCU Registers (rev 04)'
+- bus: '16'
+  dev: 1e
+  fn: '3'
+  id: '2083'
+  name: 'System peripheral: Intel Corporation Sky Lake-E PCU Registers (rev 04)'
+- bus: '16'
+  dev: 1e
+  fn: '4'
+  id: '2084'
+  name: 'System peripheral: Intel Corporation Sky Lake-E PCU Registers (rev 04)'
+- bus: '16'
+  dev: 1e
+  fn: '5'
+  id: '2085'
+  name: 'System peripheral: Intel Corporation Sky Lake-E PCU Registers (rev 04)'
+- bus: '16'
+  dev: 1e
+  fn: '6'
+  id: '2086'
+  name: 'System peripheral: Intel Corporation Sky Lake-E PCU Registers (rev 04)'
+- bus: '17'
+  dev: '00'
+  fn: '0'
+  id: b780
+  name: 'Ethernet controller: Broadcom Inc. and subsidiaries Device b780 (rev 01)'
+- bus: '64'
+  dev: '00'
+  fn: '0'
+  id: '2030'
+  name: 'PCI bridge: Intel Corporation Sky Lake-E PCI Express Root Port A (rev 04)'
+- bus: '64'
+  dev: '01'
+  fn: '0'
+  id: '2031'
+  name: 'PCI bridge: Intel Corporation Sky Lake-E PCI Express Root Port B (rev 04)'
+- bus: '64'
+  dev: '02'
+  fn: '0'
+  id: '2032'
+  name: 'PCI bridge: Intel Corporation Sky Lake-E PCI Express Root Port C (rev 04)'
+- bus: '64'
+  dev: '03'
+  fn: '0'
+  id: '2033'
+  name: 'PCI bridge: Intel Corporation Sky Lake-E PCI Express Root Port D (rev 04)'
+- bus: '64'
+  dev: '05'
+  fn: '0'
+  id: '2034'
+  name: 'System peripheral: Intel Corporation Sky Lake-E VT-d (rev 04)'
+- bus: '64'
+  dev: '05'
+  fn: '2'
+  id: '2035'
+  name: 'System peripheral: Intel Corporation Sky Lake-E RAS Configuration Registers
+    (rev 04)'
+- bus: '64'
+  dev: '05'
+  fn: '4'
+  id: '2036'
+  name: 'PIC: Intel Corporation Sky Lake-E IOxAPIC Configuration Registers (rev 04)'
+- bus: '64'
+  dev: 08
+  fn: '0'
+  id: '2066'
+  name: 'System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller
+    (rev 04)'
+- bus: '64'
+  dev: 09
+  fn: '0'
+  id: '2066'
+  name: 'System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller
+    (rev 04)'
+- bus: '64'
+  dev: 0a
+  fn: '0'
+  id: '2040'
+  name: 'System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller
+    (rev 04)'
+- bus: '64'
+  dev: 0a
+  fn: '1'
+  id: '2041'
+  name: 'System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller
+    (rev 04)'
+- bus: '64'
+  dev: 0a
+  fn: '2'
+  id: '2042'
+  name: 'System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller
+    (rev 04)'
+- bus: '64'
+  dev: 0a
+  fn: '3'
+  id: '2043'
+  name: 'System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller
+    (rev 04)'
+- bus: '64'
+  dev: 0a
+  fn: '4'
+  id: '2044'
+  name: 'System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller
+    (rev 04)'
+- bus: '64'
+  dev: 0a
+  fn: '5'
+  id: '2045'
+  name: 'System peripheral: Intel Corporation Sky Lake-E LM Channel 1 (rev 04)'
+- bus: '64'
+  dev: 0a
+  fn: '6'
+  id: '2046'
+  name: 'System peripheral: Intel Corporation Sky Lake-E LMS Channel 1 (rev 04)'
+- bus: '64'
+  dev: 0a
+  fn: '7'
+  id: '2047'
+  name: 'System peripheral: Intel Corporation Sky Lake-E LMDP Channel 1 (rev 04)'
+- bus: '64'
+  dev: 0b
+  fn: '0'
+  id: '2048'
+  name: 'System peripheral: Intel Corporation Sky Lake-E DECS Channel 2 (rev 04)'
+- bus: '64'
+  dev: 0b
+  fn: '1'
+  id: '2049'
+  name: 'System peripheral: Intel Corporation Sky Lake-E LM Channel 2 (rev 04)'
+- bus: '64'
+  dev: 0b
+  fn: '2'
+  id: 204a
+  name: 'System peripheral: Intel Corporation Sky Lake-E LMS Channel 2 (rev 04)'
+- bus: '64'
+  dev: 0b
+  fn: '3'
+  id: 204b
+  name: 'System peripheral: Intel Corporation Sky Lake-E LMDP Channel 2 (rev 04)'
+- bus: '64'
+  dev: 0c
+  fn: '0'
+  id: '2040'
+  name: 'System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller
+    (rev 04)'
+- bus: '64'
+  dev: 0c
+  fn: '1'
+  id: '2041'
+  name: 'System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller
+    (rev 04)'
+- bus: '64'
+  dev: 0c
+  fn: '2'
+  id: '2042'
+  name: 'System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller
+    (rev 04)'
+- bus: '64'
+  dev: 0c
+  fn: '3'
+  id: '2043'
+  name: 'System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller
+    (rev 04)'
+- bus: '64'
+  dev: 0c
+  fn: '4'
+  id: '2044'
+  name: 'System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller
+    (rev 04)'
+- bus: '64'
+  dev: 0c
+  fn: '5'
+  id: '2045'
+  name: 'System peripheral: Intel Corporation Sky Lake-E LM Channel 1 (rev 04)'
+- bus: '64'
+  dev: 0c
+  fn: '6'
+  id: '2046'
+  name: 'System peripheral: Intel Corporation Sky Lake-E LMS Channel 1 (rev 04)'
+- bus: '64'
+  dev: 0c
+  fn: '7'
+  id: '2047'
+  name: 'System peripheral: Intel Corporation Sky Lake-E LMDP Channel 1 (rev 04)'
+- bus: '64'
+  dev: 0d
+  fn: '0'
+  id: '2048'
+  name: 'System peripheral: Intel Corporation Sky Lake-E DECS Channel 2 (rev 04)'
+- bus: '64'
+  dev: 0d
+  fn: '1'
+  id: '2049'
+  name: 'System peripheral: Intel Corporation Sky Lake-E LM Channel 2 (rev 04)'
+- bus: '64'
+  dev: 0d
+  fn: '2'
+  id: 204a
+  name: 'System peripheral: Intel Corporation Sky Lake-E LMS Channel 2 (rev 04)'
+- bus: '64'
+  dev: 0d
+  fn: '3'
+  id: 204b
+  name: 'System peripheral: Intel Corporation Sky Lake-E LMDP Channel 2 (rev 04)'
+- bus: b2
+  dev: '00'
+  fn: '0'
+  id: '2030'
+  name: 'PCI bridge: Intel Corporation Sky Lake-E PCI Express Root Port A (rev 04)'
+- bus: b2
+  dev: '05'
+  fn: '0'
+  id: '2034'
+  name: 'System peripheral: Intel Corporation Sky Lake-E VT-d (rev 04)'
+- bus: b2
+  dev: '05'
+  fn: '2'
+  id: '2035'
+  name: 'System peripheral: Intel Corporation Sky Lake-E RAS Configuration Registers
+    (rev 04)'
+- bus: b2
+  dev: '05'
+  fn: '4'
+  id: '2036'
+  name: 'PIC: Intel Corporation Sky Lake-E IOxAPIC Configuration Registers (rev 04)'
+- bus: b2
+  dev: '12'
+  fn: '0'
+  id: 204c
+  name: 'Performance counters: Intel Corporation Sky Lake-E M3KTI Registers (rev 04)'
+- bus: b2
+  dev: '12'
+  fn: '1'
+  id: 204d
+  name: 'Performance counters: Intel Corporation Sky Lake-E M3KTI Registers (rev 04)'
+- bus: b2
+  dev: '12'
+  fn: '2'
+  id: 204e
+  name: 'System peripheral: Intel Corporation Sky Lake-E M3KTI Registers (rev 04)'
+- bus: b2
+  dev: '15'
+  fn: '0'
+  id: '2018'
+  name: 'System peripheral: Intel Corporation Sky Lake-E M2PCI Registers (rev 04)'
+- bus: b2
+  dev: '16'
+  fn: '0'
+  id: '2018'
+  name: 'System peripheral: Intel Corporation Sky Lake-E M2PCI Registers (rev 04)'
+- bus: b2
+  dev: '16'
+  fn: '4'
+  id: '2018'
+  name: 'System peripheral: Intel Corporation Sky Lake-E M2PCI Registers (rev 04)'
+- bus: b2
+  dev: '17'
+  fn: '0'
+  id: '2018'
+  name: 'System peripheral: Intel Corporation Sky Lake-E M2PCI Registers (rev 04)'
+- bus: b3
+  dev: '00'
+  fn: '0'
+  id: 37c0
+  name: 'PCI bridge: Intel Corporation Device 37c0 (rev 04)'
+- bus: b4
+  dev: '02'
+  fn: '0'
+  id: 37c4
+  name: 'PCI bridge: Intel Corporation Device 37c4 (rev 04)'
+- bus: b4
+  dev: '03'
+  fn: '0'
+  id: 37c5
+  name: 'PCI bridge: Intel Corporation Device 37c5 (rev 04)'
+- bus: b5
+  dev: '00'
+  fn: '0'
+  id: 37c8
+  name: 'Co-processor: Intel Corporation C62x Chipset QuickAssist Technology (rev
+    04)'
+- bus: b6
+  dev: '00'
+  fn: '0'
+  id: 37d3
+  name: 'Ethernet controller: Intel Corporation Ethernet Connection X722 for 10GbE
+    SFP+ (rev 04)'
+- bus: b6
+  dev: '00'
+  fn: '1'
+  id: 37d3
+  name: 'Ethernet controller: Intel Corporation Ethernet Connection X722 for 10GbE
+    SFP+ (rev 04)'
+- bus: b6
+  dev: '00'
+  fn: '2'
+  id: 37ce
+  name: 'Ethernet controller: Intel Corporation Ethernet Connection X722 for 10GbE
+    backplane (rev 04)'
+- bus: b6
+  dev: '00'
+  fn: '3'
+  id: 37ce
+  name: 'Ethernet controller: Intel Corporation Ethernet Connection X722 for 10GbE
+    backplane (rev 04)'
diff --git a/device/ufispace/x86_64-ufispace_s9301_32db-r0/pddf/pd-plugin.json b/device/ufispace/x86_64-ufispace_s9301_32db-r0/pddf/pd-plugin.json
new file mode 100644
index 000000000..76096d82e
--- /dev/null
+++ b/device/ufispace/x86_64-ufispace_s9301_32db-r0/pddf/pd-plugin.json
@@ -0,0 +1,86 @@
+{
+    
+    "XCVR":
+    {
+        "xcvr_present":
+        {
+           "i2c":
+           {
+               "valmap-QSFP28": {"1":true, "0":false },
+               "valmap-QSFP-DD": {"1":true, "0":false}
+           }
+
+        },
+        "plug_status":
+        {
+            "inserted": "1",
+            "removed": "0"
+        }
+    },
+    "PSU":
+    {
+        "psu_present": 
+        {
+            "i2c":
+            {
+                "valmap": { "1":true, "0":false }
+            },
+            "bmc":
+            {
+                "valmap": { "Device Present":true, "Device Absent":false }
+            }
+        }, 
+		
+        "psu_power_good": 
+        {
+            "i2c":
+            {
+                "valmap": { "1": true, "0":false }
+            },
+            "bmc":
+            {
+                "valmap": { "State Asserted":true, "State Deasserted":false }
+            }        
+        },
+
+        "psu_fan_dir":
+        {
+            "i2c":
+            {
+                "valmap": { "F2B":"EXHAUST", "B2F":"INTAKE" }
+            }
+        },
+        "DEFAULT_TYPE": "AC",
+        "PSU_FAN_MAX_SPEED":"30000"
+    },
+
+    "FAN":
+    {
+        "direction":
+        {
+            "bmc":
+            {
+                "valmap": {"0": "UNKNOW", "1":"INTAKE", "2":"EXHAUST"}
+            }
+        },
+
+        "present":
+        {
+            "i2c":
+            {
+                "valmap": {"1":true, "0":false}
+            },
+            "bmc":
+            {
+                "valmap": { "0x0280|":true, "0x0180|":false }
+            }      
+        },       
+        "FAN_R_MAX_SPEED":"32000",
+        "FAN_F_MAX_SPEED":"36200"
+    },
+
+    "REBOOT_CAUSE":
+    {
+        "reboot_cause_file": "/host/reboot-cause/reboot-cause.txt"
+    }
+}
diff --git a/device/ufispace/x86_64-ufispace_s9301_32db-r0/pddf/pddf-device.json b/device/ufispace/x86_64-ufispace_s9301_32db-r0/pddf/pddf-device.json
new file mode 100644
index 000000000..a7b4bf73d
--- /dev/null
+++ b/device/ufispace/x86_64-ufispace_s9301_32db-r0/pddf/pddf-device.json
@@ -0,0 +1,4886 @@
+{
+    "PLATFORM": {
+        "num_psus": 2,
+        "num_fantrays": 6,
+        "num_fans_pertray": 2,
+        "num_ports": 32,
+        "num_temps": 7,
+        "pddf_dev_types": {
+            "description": "PDDF supported devices",
+            "CPLD": [
+                "i2c_cpld"
+            ],
+            "PSU": [
+                "psu_eeprom",
+                "psu_pmbus"
+            ],
+            "PORT_MODULE": [
+                "pddf_xcvr"
+            ]
+        },
+        "std_perm_kos": [
+            "igb",
+            "i40e"
+        ],
+        "std_kos": [
+            "i2c_i801",
+            "i2c_dev",
+            "i2c_mux_pca954x",
+            "optoe",
+            "lm75",
+            "gpio-pca953x"
+        ],
+        "pddf_kos": [
+            "pddf_client_module",
+            "pddf_cpld_module",
+            "pddf_cpld_driver",
+            "pddf_mux_module",
+            "pddf_xcvr_module",
+            "pddf_fpgapci_driver",
+            "pddf_xcvr_driver_module",
+            "pddf_psu_driver_module",
+            "pddf_psu_module",
+            "pddf_fpgai2c_module",
+            "pddf_fpgai2c_driver",
+            "pddf_fan_driver_module",
+            "pddf_fan_module",
+            "pddf_led_module",
+            "pddf_gpio_module"
+        ],
+        "custom_kos": [
+            "x86-64-ufispace-s9301-32db-lpc",
+            "x86-64-ufispace-s9301-32db-sys-eeprom",
+            "pddf_custom_sysstatus_module"
+        ]
+    },
+    "SYSTEM": {
+        "dev_info": {
+            "device_type": "CPU",
+            "device_name": "ROOT_COMPLEX",
+            "device_parent": null
+        },
+        "i2c": {
+            "CONTROLLERS": [
+                {
+                    "dev_name": "i2c-0",
+                    "dev": "SMBUS0"
+                }
+            ]
+        }
+    },
+    "SMBUS0": {
+        "dev_info": {
+            "device_type": "SMBUS",
+            "device_name": "SMBUS0",
+            "device_parent": "SYSTEM"
+        },
+        "i2c": {
+            "topo_info": {
+                "dev_addr": "0x0"
+            },
+            "DEVICES": [
+                {
+                    "dev": "EEPROM1"
+                },
+                {
+                    "dev": "MUX1"
+                },
+                {
+                    "dev": "MUX2"
+                },
+                {
+                    "dev": "GPIO1"
+                }
+            ]
+        }
+    },
+    "EEPROM1": {
+        "dev_info": {
+            "device_type": "EEPROM",
+            "device_name": "EEPROM1",
+            "device_parent": "SMBUS0"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x0",
+                "dev_addr": "0x57",
+                "dev_type": "sys_eeprom"
+            },
+            "dev_attr": {
+                "access_mode": "BLOCK"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "TEMP1": {
+        "dev_info": {
+            "device_type": "TEMP_SENSOR",
+            "device_name": "TEMP1",
+            "device_parent": "SMBUS0"
+        },
+        "dev_attr": {
+            "display_name": "Temp_CPU_PECI"
+        },
+        "bmc": {
+            "ipmitool": {
+                "attr_list": [
+                    {
+                        "attr_name": "temp1_input",
+                        "bmc_cmd": "ipmitool sensor",
+                        "raw": "0",
+                        "field_name": "TEMP_CPU_PECI",
+                        "field_pos": "3"
+                    },
+                    {
+                        "attr_name": "temp1_high_crit_threshold",
+                        "bmc_cmd": "ipmitool sensor",
+                        "raw": "0",
+                        "field_name": "TEMP_CPU_PECI",
+                        "field_pos": "20"
+                    },
+                    {
+                        "attr_name": "temp1_high_threshold",
+                        "bmc_cmd": "ipmitool sensor",
+                        "raw": "0",
+                        "field_name": "TEMP_CPU_PECI",
+                        "field_pos": "18"
+                    }              
+                ]
+            }
+        }
+    },
+    "TEMP2": {
+        "dev_info": {
+            "device_type": "TEMP_SENSOR",
+            "device_name": "TEMP2",
+            "device_parent": "SMBUS0"
+        },
+        "dev_attr": {
+            "display_name": "Temp_CPU_ENV"
+        },
+        "bmc": {
+            "ipmitool": {
+                "attr_list": [
+                    {
+                        "attr_name": "temp1_input",
+                        "bmc_cmd": "ipmitool sensor",
+                        "raw": "0",
+                        "field_name": "TEMP_CPU_ENV",
+                        "field_pos": "3"
+                    },
+                    {
+                        "attr_name": "temp1_high_crit_threshold",
+                        "bmc_cmd": "ipmitool sensor",
+                        "raw": "0",
+                        "field_name": "TEMP_CPU_ENV",
+                        "field_pos": "20"
+                    },
+                    {
+                        "attr_name": "temp1_high_threshold",
+                        "bmc_cmd": "ipmitool sensor",
+                        "raw": "0",
+                        "field_name": "TEMP_CPU_ENV",
+                        "field_pos": "18"
+                    }               
+                ]
+            }
+        }
+    },
+    "TEMP3": {
+        "dev_info": {
+            "device_type": "TEMP_SENSOR",
+            "device_name": "TEMP3",
+            "device_parent": "SMBUS0"
+        },
+        "dev_attr": {
+            "display_name": "Temp_CPU_ENV2"
+        },
+        "bmc": {
+            "ipmitool": {
+                "attr_list": [
+                    {
+                        "attr_name": "temp1_input",
+                        "bmc_cmd": "ipmitool sensor",
+                        "raw": "0",
+                        "field_name": "TEMP_CPU_ENV_2",
+                        "field_pos": "3"
+                    },
+                    {
+                        "attr_name": "temp1_high_crit_threshold",
+                        "bmc_cmd": "ipmitool sensor",
+                        "raw": "0",
+                        "field_name": "TEMP_CPU_ENV_2",
+                        "field_pos": "20"
+                    },
+                    {
+                        "attr_name": "temp1_high_threshold",
+                        "bmc_cmd": "ipmitool sensor",
+                        "raw": "0",
+                        "field_name": "TEMP_CPU_ENV_2",
+                        "field_pos": "18"
+                    }               
+                ]
+            }
+        }
+    },
+    "TEMP4": {
+        "dev_info": {
+            "device_type": "TEMP_SENSOR",
+            "device_name": "TEMP4",
+            "device_parent": "SMBUS0"
+        },
+        "dev_attr": {
+            "display_name": "Temp_MAC_ENV"
+        },
+        "bmc": {
+            "ipmitool": {
+                "attr_list": [
+                    {
+                        "attr_name": "temp1_input",
+                        "bmc_cmd": "ipmitool sensor",
+                        "raw": "0",
+                        "field_name": "TEMP_MAC_ENV",
+                        "field_pos": "3"
+                    },
+                    {
+                        "attr_name": "temp1_high_crit_threshold",
+                        "bmc_cmd": "ipmitool sensor",
+                        "raw": "0",
+                        "field_name": "TEMP_MAC_ENV",
+                        "field_pos": "20"
+                    },
+                    {
+                        "attr_name": "temp1_high_threshold",
+                        "bmc_cmd": "ipmitool sensor",
+                        "raw": "0",
+                        "field_name": "TEMP_MAC_ENV",
+                        "field_pos": "18"
+                    }               
+                ]
+            }
+        }
+    },
+    "TEMP5": {
+        "dev_info": {
+            "device_type": "TEMP_SENSOR",
+            "device_name": "TEMP5",
+            "device_parent": "SMBUS0"
+        },
+        "dev_attr": {
+            "display_name": "Temp_MAC_DIE"
+        },
+        "bmc": {
+            "ipmitool": {
+                "attr_list": [
+                    {
+                        "attr_name": "temp1_input",
+                        "bmc_cmd": "ipmitool sensor",
+                        "raw": "0",
+                        "field_name": "TEMP_MAC_DIE",
+                        "field_pos": "3"
+                    },
+                    {
+                        "attr_name": "temp1_high_crit_threshold",
+                        "bmc_cmd": "ipmitool sensor",
+                        "raw": "0",
+                        "field_name": "TEMP_MAC_DIE",
+                        "field_pos": "20"
+                    },
+                    {
+                        "attr_name": "temp1_high_threshold",
+                        "bmc_cmd": "ipmitool sensor",
+                        "raw": "0",
+                        "field_name": "TEMP_MAC_DIE",
+                        "field_pos": "18"
+                    }               
+                ]
+            }
+        }
+    },
+    "TEMP6": {
+        "dev_info": {
+            "device_type": "TEMP_SENSOR",
+            "device_name": "TEMP6",
+            "device_parent": "SMBUS0"
+        },
+        "dev_attr": {
+            "display_name": "Temp_CAGE"
+        },
+        "bmc": {
+            "ipmitool": {
+                "attr_list": [
+                    {
+                        "attr_name": "temp1_input",
+                        "bmc_cmd": "ipmitool sensor",
+                        "raw": "0",
+                        "field_name": "TEMP_CAGE",
+                        "field_pos": "3"
+                    },
+                    {
+                        "attr_name": "temp1_high_crit_threshold",
+                        "bmc_cmd": "ipmitool sensor",
+                        "raw": "0",
+                        "field_name": "TEMP_CAGE",
+                        "field_pos": "20"
+                    },
+                    {
+                        "attr_name": "temp1_high_threshold",
+                        "bmc_cmd": "ipmitool sensor",
+                        "raw": "0",
+                        "field_name": "TEMP_CAGE",
+                        "field_pos": "18"
+                    }               
+                ]
+            }
+        }
+    },
+    "TEMP7": {
+        "dev_info": {
+            "device_type": "TEMP_SENSOR",
+            "device_name": "TEMP7",
+            "device_parent": "SMBUS0"
+        },
+        "dev_attr": {
+            "display_name": "Temp_PSU_CONNTOR"
+        },
+        "bmc": {
+            "ipmitool": {
+                "attr_list": [
+                    {
+                        "attr_name": "temp1_input",
+                        "bmc_cmd": "ipmitool sensor",
+                        "raw": "0",
+                        "field_name": "TEMP_PSU_CONN",
+                        "field_pos": "3"
+                    },
+                    {
+                        "attr_name": "temp1_high_crit_threshold",
+                        "bmc_cmd": "ipmitool sensor",
+                        "raw": "0",
+                        "field_name": "TEMP_PSU_CONN",
+                        "field_pos": "20"
+                    },
+                    {
+                        "attr_name": "temp1_high_threshold",
+                        "bmc_cmd": "ipmitool sensor",
+                        "raw": "0",
+                        "field_name": "TEMP_PSU_CONN",
+                        "field_pos": "18"
+                    }              
+                ]
+            }
+        }
+    },
+    "MUX1": {
+        "dev_info": {
+            "device_type": "MUX",
+            "device_name": "MUX1",
+            "device_parent": "SMBUS0"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x0",
+                "dev_addr": "0x73",
+                "dev_type": "pca9548"
+            },
+            "dev_attr": {
+                "virt_bus": "0x1",
+                "idle_state": "-2"
+            },
+            "channel": [
+                {
+                    "chn": "1",
+                    "dev": "CPLD1"
+                },
+                {
+                    "chn": "1",
+                    "dev": "CPLD2"
+                },
+                {
+                    "chn": "1",
+                    "dev": "CPLD3"
+                },
+                {
+                    "chn": "4",
+                    "dev": "GPIO2"
+                }
+            ]
+        }
+    },
+    "MUX2": {
+        "dev_info": {
+            "device_type": "MUX",
+            "device_name": "MUX2",
+            "device_parent": "SMBUS0"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x0",
+                "dev_addr": "0x72",
+                "dev_type": "pca9548"
+            },
+            "dev_attr": {
+                "virt_bus": "0x9",
+                "idle_state": "-2"
+            },
+            "channel": [
+                {
+                    "chn": "0",
+                    "dev": "MUX3"
+                },
+                {
+                    "chn": "1",
+                    "dev": "MUX4"
+                },
+                {
+                    "chn": "2",
+                    "dev": "MUX5"
+                },
+                {
+                    "chn": "3",
+                    "dev": "MUX6"
+                }
+            ]
+        }
+    },
+    "MUX3": {
+        "dev_info": {
+            "device_type": "MUX",
+            "device_name": "MUX3",
+            "device_parent": "MUX2"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x9",
+                "dev_addr": "0x76",
+                "dev_type": "pca9548"
+            },
+            "dev_attr": {
+                "virt_bus": "0x11",
+                "idle_state": "-2"
+            },
+            "channel": [
+                {
+                    "chn": "0",
+                    "dev": "PORT1"
+                },
+                {
+                    "chn": "1",
+                    "dev": "PORT2"
+                },
+                {
+                    "chn": "2",
+                    "dev": "PORT3"
+                },
+                {
+                    "chn": "3",
+                    "dev": "PORT4"
+                },
+                {
+                    "chn": "4",
+                    "dev": "PORT5"
+                },
+                {
+                    "chn": "5",
+                    "dev": "PORT6"
+                },
+                {
+                    "chn": "6",
+                    "dev": "PORT7"
+                },
+                {
+                    "chn": "7",
+                    "dev": "PORT8"
+                }
+            ]
+        }
+    },
+    "MUX4": {
+        "dev_info": {
+            "device_type": "MUX",
+            "device_name": "MUX4",
+            "device_parent": "MUX2"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0xa",
+                "dev_addr": "0x76",
+                "dev_type": "pca9548"
+            },
+            "dev_attr": {
+                "virt_bus": "0x19",
+                "idle_state": "-2"
+            },
+            "channel": [
+                {
+                    "chn": "0",
+                    "dev": "PORT9"
+                },
+                {
+                    "chn": "1",
+                    "dev": "PORT10"
+                },
+                {
+                    "chn": "2",
+                    "dev": "PORT11"
+                },
+                {
+                    "chn": "3",
+                    "dev": "PORT12"
+                },
+                {
+                    "chn": "4",
+                    "dev": "PORT13"
+                },
+                {
+                    "chn": "5",
+                    "dev": "PORT14"
+                },
+                {
+                    "chn": "6",
+                    "dev": "PORT15"
+                },
+                {
+                    "chn": "7",
+                    "dev": "PORT16"
+                }
+            ]
+        }
+    },
+    "MUX5": {
+        "dev_info": {
+            "device_type": "MUX",
+            "device_name": "MUX5",
+            "device_parent": "MUX2"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0xb",
+                "dev_addr": "0x76",
+                "dev_type": "pca9548"
+            },
+            "dev_attr": {
+                "virt_bus": "0x21",
+                "idle_state": "-2"
+            },
+            "channel": [
+                {
+                    "chn": "0",
+                    "dev": "PORT17"
+                },
+                {
+                    "chn": "1",
+                    "dev": "PORT18"
+                },
+                {
+                    "chn": "2",
+                    "dev": "PORT19"
+                },
+                {
+                    "chn": "3",
+                    "dev": "PORT20"
+                },
+                {
+                    "chn": "4",
+                    "dev": "PORT21"
+                },
+                {
+                    "chn": "5",
+                    "dev": "PORT22"
+                },
+                {
+                    "chn": "6",
+                    "dev": "PORT23"
+                },
+                {
+                    "chn": "7",
+                    "dev": "PORT24"
+                }
+            ]
+        }
+    },
+    "MUX6": {
+        "dev_info": {
+            "device_type": "MUX",
+            "device_name": "MUX6",
+            "device_parent": "MUX2"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0xc",
+                "dev_addr": "0x76",
+                "dev_type": "pca9548"
+            },
+            "dev_attr": {
+                "virt_bus": "0x29",
+                "idle_state": "-2"
+            },
+            "channel": [
+                {
+                    "chn": "0",
+                    "dev": "PORT25"
+                },
+                {
+                    "chn": "1",
+                    "dev": "PORT26"
+                },
+                {
+                    "chn": "2",
+                    "dev": "PORT27"
+                },
+                {
+                    "chn": "3",
+                    "dev": "PORT28"
+                },
+                {
+                    "chn": "4",
+                    "dev": "PORT29"
+                },
+                {
+                    "chn": "5",
+                    "dev": "PORT30"
+                },
+                {
+                    "chn": "6",
+                    "dev": "PORT31"
+                },
+                {
+                    "chn": "7",
+                    "dev": "PORT32"
+                }
+            ]
+        }
+    },
+    "GPIO1": {
+        "dev_info": {
+            "device_type": "GPIO",
+            "device_name": "GPIO1",
+            "device_parent": "SMBUS0"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x0",
+                "dev_addr": "0x77",
+                "dev_type": "pca9539"
+            },
+            "dev_attr": {
+                "gpio_base": "0x1f0"
+            },
+            "ports": [
+                {
+                    "port_num": "0",
+                    "direction": "in",
+                    "value": "",
+                    "edge": "",
+                    "active_low": ""
+                },
+                {
+                    "port_num": "1",
+                    "direction": "in",
+                    "value": "",
+                    "edge": "",
+                    "active_low": ""
+                },
+                {
+                    "port_num": "2",
+                    "direction": "in",
+                    "value": "",
+                    "edge": "",
+                    "active_low": ""
+                },
+                {
+                    "port_num": "3",
+                    "direction": "in",
+                    "value": "",
+                    "edge": "",
+                    "active_low": ""
+                },
+                {
+                    "port_num": "4",
+                    "direction": "in",
+                    "value": "",
+                    "edge": "",
+                    "active_low": ""
+                },
+                {
+                    "port_num": "5",
+                    "direction": "in",
+                    "value": "",
+                    "edge": "",
+                    "active_low": ""
+                },
+                {
+                    "port_num": "6",
+                    "direction": "in",
+                    "value": "",
+                    "edge": "",
+                    "active_low": ""
+                },
+                {
+                    "port_num": "7",
+                    "direction": "in",
+                    "value": "",
+                    "edge": "",
+                    "active_low": ""
+                },
+                {
+                    "port_num": "8",
+                    "direction": "in",
+                    "value": "",
+                    "edge": "",
+                    "active_low": ""
+                },
+                {
+                    "port_num": "9",
+                    "direction": "in",
+                    "value": "",
+                    "edge": "",
+                    "active_low": ""
+                },
+                {
+                    "port_num": "10",
+                    "direction": "in",
+                    "value": "",
+                    "edge": "",
+                    "active_low": ""
+                },
+                {
+                    "port_num": "11",
+                    "direction": "in",
+                    "value": "",
+                    "edge": "",
+                    "active_low": ""
+                },
+                {
+                    "port_num": "12",
+                    "direction": "in",
+                    "value": "",
+                    "edge": "",
+                    "active_low": ""
+                },
+                {
+                    "port_num": "13",
+                    "direction": "in",
+                    "value": "",
+                    "edge": "",
+                    "active_low": ""
+                },
+                {
+                    "port_num": "14",
+                    "direction": "in",
+                    "value": "",
+                    "edge": "",
+                    "active_low": ""
+                },
+                {
+                    "port_num": "15",
+                    "direction": "in",
+                    "value": "",
+                    "edge": "",
+                    "active_low": ""
+                }
+            ]
+        }
+    },
+    "GPIO2": {
+        "dev_info": {
+            "device_type": "GPIO",
+            "device_name": "GPIO2",
+            "device_parent": "MUX1"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x6",
+                "dev_addr": "0x76",
+                "dev_type": "pca9539"
+            },
+            "dev_attr": {
+                "gpio_base": "0x1e0"
+            },
+            "ports": [
+                {
+                    "port_num": "0",
+                    "direction": "in",
+                    "value": "",
+                    "edge": "",
+                    "active_low": ""
+                },
+                {
+                    "port_num": "1",
+                    "direction": "in",
+                    "value": "",
+                    "edge": "",
+                    "active_low": ""
+                },
+                {
+                    "port_num": "2",
+                    "direction": "in",
+                    "value": "",
+                    "edge": "",
+                    "active_low": ""
+                },
+                {
+                    "port_num": "3",
+                    "direction": "in",
+                    "value": "",
+                    "edge": "",
+                    "active_low": ""
+                },
+                {
+                    "port_num": "4",
+                    "direction": "in",
+                    "value": "",
+                    "edge": "",
+                    "active_low": ""
+                },
+                {
+                    "port_num": "5",
+                    "direction": "in",
+                    "value": "",
+                    "edge": "",
+                    "active_low": ""
+                },
+                {
+                    "port_num": "6",
+                    "direction": "in",
+                    "value": "",
+                    "edge": "",
+                    "active_low": ""
+                },
+                {
+                    "port_num": "7",
+                    "direction": "in",
+                    "value": "",
+                    "edge": "",
+                    "active_low": ""
+                },
+                {
+                    "port_num": "8",
+                    "direction": "in",
+                    "value": "",
+                    "edge": "",
+                    "active_low": ""
+                },
+                {
+                    "port_num": "9",
+                    "direction": "in",
+                    "value": "",
+                    "edge": "",
+                    "active_low": ""
+                },
+                {
+                    "port_num": "10",
+                    "direction": "in",
+                    "value": "",
+                    "edge": "",
+                    "active_low": ""
+                },
+                {
+                    "port_num": "11",
+                    "direction": "in",
+                    "value": "",
+                    "edge": "",
+                    "active_low": ""
+                },
+                {
+                    "port_num": "12",
+                    "direction": "in",
+                    "value": "",
+                    "edge": "",
+                    "active_low": ""
+                },
+                {
+                    "port_num": "13",
+                    "direction": "in",
+                    "value": "",
+                    "edge": "",
+                    "active_low": ""
+                },
+                {
+                    "port_num": "14",
+                    "direction": "in",
+                    "value": "",
+                    "edge": "",
+                    "active_low": ""
+                },
+                {
+                    "port_num": "15",
+                    "direction": "in",
+                    "value": "",
+                    "edge": "",
+                    "active_low": ""
+                }
+            ]
+        }
+    },
+    "CPLD1": {
+        "dev_info": {
+            "device_type": "CPLD",
+            "device_name": "CPLD1",
+            "device_parent": "MUX1"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x2",
+                "dev_addr": "0x30",
+                "dev_type": "i2c_cpld"
+            },
+            "dev_attr": {}
+        }
+    },
+    "CPLD2": {
+        "dev_info": {
+            "device_type": "CPLD",
+            "device_name": "CPLD2",
+            "device_parent": "MUX1"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x2",
+                "dev_addr": "0x31",
+                "dev_type": "i2c_cpld"
+            },
+            "dev_attr": {}
+        }
+    },
+    "CPLD3": {
+        "dev_info": {
+            "device_type": "CPLD",
+            "device_name": "CPLD3",
+            "device_parent": "MUX1"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x2",
+                "dev_addr": "0x32",
+                "dev_type": "i2c_cpld"
+            },
+            "dev_attr": {}
+        }
+    },
+    "SYSSTATUS": {
+        "dev_info": {
+            "device_type": "SYSSTAT",
+            "device_name": "SYSSTATUS"
+        },
+        "dev_attr": {},
+        "attr_list": [
+            {
+                "attr_name": "board_info",
+                "attr_devaddr": "0x30",
+                "attr_offset": "0x0",
+                "attr_mask": "0xff",
+                "attr_len": "0x1"
+            },
+            {
+                "attr_name": "cpld1_version",
+                "attr_devaddr": "0x30",
+                "attr_offset": "0x2",
+                "attr_mask": "0xff",
+                "attr_len": "0x1"
+            },
+            {
+                "attr_name": "cpld2_version",
+                "attr_devaddr": "0x31",
+                "attr_offset": "0x2",
+                "attr_mask": "0xff",
+                "attr_len": "0x1"
+            },
+            {
+                "attr_name": "cpld3_version",
+                "attr_devaddr": "0x32",
+                "attr_offset": "0x2",
+                "attr_mask": "0xff",
+                "attr_len": "0x1"
+            },
+            {
+                "attr_name": "mac_reset",
+                "attr_devaddr": "0x30",
+                "attr_offset": "0x40",
+                "attr_mask": "0xff",
+                "attr_len": "0x1"
+            },
+            {
+                "attr_name": "mux_reset",
+                "attr_devaddr": "0x30",
+                "attr_offset": "0x46",
+                "attr_mask": "0xff",
+                "attr_len": "0x1"
+            },
+            {
+                "attr_name": "psu_status",
+                "attr_devaddr": "0x30",
+                "attr_offset": "0x51",
+                "attr_mask": "0xff",
+                "attr_len": "0x1"
+            },
+            {
+                "attr_name": "system_led_0",
+                "attr_devaddr": "0x30",
+                "attr_offset": "0x80",
+                "attr_mask": "0xff",
+                "attr_len": "0x1"
+            },
+            {
+                "attr_name": "system_led_1",
+                "attr_devaddr": "0x30",
+                "attr_offset": "0x81",
+                "attr_mask": "0xff",
+                "attr_len": "0x1"
+            },
+            {
+                "attr_name": "beacon_led",
+                "attr_devaddr": "0x30",
+                "attr_offset": "0x84",
+                "attr_mask": "0xff",
+                "attr_len": "0x1"
+            },
+            {
+                "attr_name": "port_led_clr_ctrl",
+                "attr_devaddr": "0x30",
+                "attr_offset": "0x85",
+                "attr_mask": "0xff",
+                "attr_len": "0x1"
+            }
+        ]
+    },
+    "PSU1": {
+        "dev_info": {
+            "device_type": "PSU",
+            "device_name": "PSU1",
+            "device_parent": "SMBUS0"
+        },
+        "dev_attr": {
+            "dev_idx": "1",
+            "num_psu_fans": "1"
+        },
+        "i2c": {
+            "interface": []
+        },
+        "bmc": {
+            "ipmitool": {
+                "attr_list": [
+                    {
+                        "attr_name": "psu_present",
+                        "bmc_cmd": "ipmitool sdr -c get PSU0_PRSNT_L | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
+                        "raw": "0",
+                        "field_name": "PSU0_PRSNT_L",
+                        "field_pos": "5",
+                        "separator": ","
+                    },
+                    {
+                        "attr_name": "psu_power_good",
+                        "bmc_cmd": "ipmitool sdr -c get PSU0_PWROK_H | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
+                        "raw": "0",
+                        "field_name": "PSU0_PWROK_H",
+                        "field_pos": "5",
+                        "separator": ","
+                    },
+                    {
+                        "attr_name": "psu_v_out",
+                        "bmc_cmd": "ipmitool sdr -c get PSU0_VOUT | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
+                        "raw": "0",
+                        "field_name": "PSU0_VOUT",
+                        "field_pos": "2",
+                        "mult": "1000",
+                        "separator": ","
+                    },
+                    {
+                        "attr_name": "psu_i_out",
+                        "bmc_cmd": "ipmitool sdr -c get PSU0_IOUT | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
+                        "raw": "0",
+                        "field_name": "PSU0_IOUT",
+                        "field_pos": "2",
+                        "mult": "1000",
+                        "separator": ","
+                    },
+                    {
+                        "attr_name": "psu_v_in",
+                        "bmc_cmd": "ipmitool sdr get -c PSU0_VIN | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "PSU0_VIN",
+                        "field_pos": "2",
+                        "mult": "1000"
+                    },
+                    {
+                        "attr_name": "psu_i_in",
+                        "bmc_cmd": "ipmitool sdr get -c PSU0_IIN | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "PSU0_IIN",
+                        "field_pos": "2",
+                        "mult": "1000"
+                    },
+                    {
+                        "attr_name": "psu_temp1_input",
+                        "bmc_cmd": "ipmitool sdr -c get PSU0_TEMP | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
+                        "raw": "0",
+                        "field_name": "PSU0_TEMP",
+                        "field_pos": "2",
+                        "mult": "1000",
+                        "separator": ","
+                    },
+                    {
+                        "attr_name": "psu_fan1_speed_rpm",
+                        "bmc_cmd": "ipmitool sdr -c get PSU0_FAN1 | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
+                        "raw": "0",
+                        "field_name": "PSU0_FAN1",
+                        "field_pos": "2",
+                        "separator": ","
+                    },
+                    {
+                        "attr_name": "psu_mfr_id",
+                        "bmc_cmd": "_rv=$(ipmitool fru print 1 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Manufacturer') && echo $_rv || echo 'Manufacturer : N/A'",
+                        "raw": "0",
+                        "separator": ":",
+                        "field_name": "Manufacturer",
+                        "field_pos": "2"
+                    },
+                    {
+                        "attr_name": "psu_model_name",
+                        "bmc_cmd": "_rv=$(ipmitool fru print 1 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Name') && echo $_rv || echo 'Name : N/A'",
+                        "raw": "0",
+                        "separator": ":",
+                        "field_name": "Name",
+                        "field_pos": "2"
+                    },
+                    {
+                        "attr_name": "psu_serial_num",
+                        "bmc_cmd": "_rv=$(ipmitool fru print 1 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Serial') && echo $_rv || echo 'Serial : N/A'",
+                        "raw": "0",
+                        "separator": ":",
+                        "field_name": "Serial",
+                        "field_pos": "2"
+                    },
+                    {
+                        "attr_name": "psu_fan1_dir",
+                        "bmc_cmd": "ipmitool raw 0x3c 0x30 0x0 | xargs | cut -d' ' -f1",
+                        "raw": "1",
+                        "type": "raw"
+                    }                 
+                ]
+            }
+        }
+    },
+    "PSU2": {
+        "dev_info": {
+            "device_type": "PSU",
+            "device_name": "PSU2",
+            "device_parent": "SMBUS0"
+        },
+        "dev_attr": {
+            "dev_idx": "2",
+            "num_psu_fans": "1"
+        },
+        "i2c": {
+            "interface": []
+        },
+        "bmc": {
+            "ipmitool": {
+                "attr_list": [
+                    {
+                        "attr_name": "psu_present",
+                        "bmc_cmd": "ipmitool sdr -c get PSU1_PRSNT_L | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
+                        "raw": "0",
+                        "field_name": "PSU1_PRSNT_L",
+                        "field_pos": "5",
+                        "separator": ","
+                    },
+                    {
+                        "attr_name": "psu_power_good",
+                        "bmc_cmd": "ipmitool sdr -c get PSU1_PWROK_H | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
+                        "raw": "0",
+                        "field_name": "PSU1_PWROK_H",
+                        "field_pos": "5",
+                        "separator": ","
+                    },
+                    {
+                        "attr_name": "psu_v_out",
+                        "bmc_cmd": "ipmitool sdr -c get PSU1_VOUT | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
+                        "raw": "0",
+                        "field_name": "PSU1_VOUT",
+                        "field_pos": "2",
+                        "mult": "1000",
+                        "separator": ","
+                    },
+                    {
+                        "attr_name": "psu_i_out",
+                        "bmc_cmd": "ipmitool sdr -c get PSU1_IOUT | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
+                        "raw": "0",
+                        "field_name": "PSU1_IOUT",
+                        "field_pos": "2",
+                        "mult": "1000",
+                        "separator": ","
+                    },
+                    {
+                        "attr_name": "psu_v_in",
+                        "bmc_cmd": "ipmitool sdr get -c PSU1_VIN | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "PSU1_VIN",
+                        "field_pos": "2",
+                        "mult": "1000"
+                    },
+                    {
+                        "attr_name": "psu_i_in",
+                        "bmc_cmd": "ipmitool sdr get -c PSU1_IIN | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
+                        "raw": "0",
+                        "separator": ",",
+                        "field_name": "PSU1_IIN",
+                        "field_pos": "2",
+                        "mult": "1000"
+                    },
+                    {
+                        "attr_name": "psu_temp1_input",
+                        "bmc_cmd": "ipmitool sdr -c get PSU1_TEMP | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
+                        "raw": "0",
+                        "field_name": "PSU1_TEMP",
+                        "field_pos": "2",
+                        "mult": "1000",
+                        "separator": ","
+                    },
+                    {
+                        "attr_name": "psu_fan1_speed_rpm",
+                        "bmc_cmd": "ipmitool sdr -c get PSU1_FAN1 | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'",
+                        "raw": "0",
+                        "field_name": "PSU1_FAN1",
+                        "field_pos": "2",
+                        "separator": ","
+                    },
+                    {
+                        "attr_name": "psu_mfr_id",
+                        "bmc_cmd": "_rv=$(ipmitool fru print 2 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Manufacturer') && echo $_rv || echo 'Manufacturer : N/A'",
+                        "raw": "0",
+                        "separator": ":",
+                        "field_name": "Manufacturer",
+                        "field_pos": "2"
+                    },
+                    {
+                        "attr_name": "psu_model_name",
+                        "bmc_cmd": "_rv=$(ipmitool fru print 2 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Name') && echo $_rv || echo 'Name : N/A'",
+                        "raw": "0",
+                        "separator": ":",
+                        "field_name": "Name",
+                        "field_pos": "2"
+                    },
+                    {
+                        "attr_name": "psu_serial_num",
+                        "bmc_cmd": "_rv=$(ipmitool fru print 2 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Serial') && echo $_rv || echo 'Serial : N/A'",
+                        "raw": "0",
+                        "separator": ":",
+                        "field_name": "Serial",
+                        "field_pos": "2"
+                    },
+                    {
+                        "attr_name": "psu_fan1_dir",
+                        "bmc_cmd": "ipmitool raw 0x3c 0x30 0x0 | xargs | cut -d' ' -f2",
+                        "raw": "1",
+                        "type": "raw"
+                    }
+                ]
+            }
+        }
+    },
+    "FAN-CTRL": {
+        "dev_info": {
+            "device_type": "FAN",
+            "device_name": "FAN-CTRL",
+            "device_parent": ""
+        },
+        "bmc": {
+            "ipmitool": {
+                "attr_list": [
+                    {
+                        "attr_name": "fan1_present",
+                        "bmc_cmd": "ipmitool sensor",
+                        "raw": "0",
+                        "field_name": "FAN0_PSNT_L",
+                        "field_pos": "7"
+                    },
+                    {
+                        "attr_name": "fan2_present",
+                        "bmc_cmd": "ipmitool sensor",
+                        "raw": "0",
+                        "field_name": "FAN1_PSNT_L",
+                        "field_pos": "7"
+                    },
+                    {
+                        "attr_name": "fan3_present",
+                        "bmc_cmd": "ipmitool sensor",
+                        "raw": "0",
+                        "field_name": "FAN2_PSNT_L",
+                        "field_pos": "7"
+                    },
+                    {
+                        "attr_name": "fan4_present",
+                        "bmc_cmd": "ipmitool sensor",
+                        "raw": "0",
+                        "field_name": "FAN3_PSNT_L",
+                        "field_pos": "7"
+                    },
+                    {
+                        "attr_name": "fan5_present",
+                        "bmc_cmd": "ipmitool sensor",
+                        "raw": "0",
+                        "field_name": "FAN4_PSNT_L",
+                        "field_pos": "7"
+                    },
+                    {
+                        "attr_name": "fan6_present",
+                        "bmc_cmd": "ipmitool sensor",
+                        "raw": "0",
+                        "field_name": "FAN5_PSNT_L",
+                        "field_pos": "7"
+                    },
+                    {
+                        "attr_name": "fan1_f_speed_rpm",
+                        "bmc_cmd": "ipmitool sensor",
+                        "raw": "0",
+                        "field_name": "FAN0_RPM_F",
+                        "field_pos": "3"
+                    },
+                    {
+                        "attr_name": "fan1_r_speed_rpm",
+                        "bmc_cmd": "ipmitool sensor",
+                        "raw": "0",
+                        "field_name": "FAN0_RPM_R",
+                        "field_pos": "3"
+                    },
+                    {
+                        "attr_name": "fan2_f_speed_rpm",
+                        "bmc_cmd": "ipmitool sensor",
+                        "raw": "0",
+                        "field_name": "FAN1_RPM_F",
+                        "field_pos": "3"
+                    },
+                    {
+                        "attr_name": "fan2_r_speed_rpm",
+                        "bmc_cmd": "ipmitool sensor",
+                        "raw": "0",
+                        "field_name": "FAN1_RPM_R",
+                        "field_pos": "3"
+                    },
+                    {
+                        "attr_name": "fan3_f_speed_rpm",
+                        "bmc_cmd": "ipmitool sensor",
+                        "raw": "0",
+                        "field_name": "FAN2_RPM_F",
+                        "field_pos": "3"
+                    },
+                    {
+                        "attr_name": "fan3_r_speed_rpm",
+                        "bmc_cmd": "ipmitool sensor",
+                        "raw": "0",
+                        "field_name": "FAN2_RPM_R",
+                        "field_pos": "3"
+                    },
+                    {
+                        "attr_name": "fan4_f_speed_rpm",
+                        "bmc_cmd": "ipmitool sensor",
+                        "raw": "0",
+                        "field_name": "FAN3_RPM_F",
+                        "field_pos": "3"
+                    },
+                    {
+                        "attr_name": "fan4_r_speed_rpm",
+                        "bmc_cmd": "ipmitool sensor",
+                        "raw": "0",
+                        "field_name": "FAN3_RPM_R",
+                        "field_pos": "3"
+                    },
+                    {
+                        "attr_name": "fan5_f_speed_rpm",
+                        "bmc_cmd": "ipmitool sensor",
+                        "raw": "0",
+                        "field_name": "FAN4_RPM_F",
+                        "field_pos": "3"
+                    },
+                    {
+                        "attr_name": "fan5_r_speed_rpm",
+                        "bmc_cmd": "ipmitool sensor",
+                        "raw": "0",
+                        "field_name": "FAN4_RPM_R",
+                        "field_pos": "3"
+                    },
+                    {
+                        "attr_name": "fan6_f_speed_rpm",
+                        "bmc_cmd": "ipmitool sensor",
+                        "raw": "0",
+                        "field_name": "FAN5_RPM_F",
+                        "field_pos": "3"
+                    },
+                    {
+                        "attr_name": "fan6_r_speed_rpm",
+                        "bmc_cmd": "ipmitool sensor",
+                        "raw": "0",
+                        "field_name": "FAN5_RPM_R",
+                        "field_pos": "3"
+                    },
+                    {
+                        "attr_name": "fan1_dir",
+                        "bmc_cmd": "ipmitool raw 0x3c 0x31 0x0 | xargs | cut -d' ' -f1",
+                        "raw": "1",
+                        "type": "raw"
+                    },
+                    {
+                        "attr_name": "fan2_dir",
+                        "bmc_cmd": "ipmitool raw 0x3c 0x31 0x0 | xargs | cut -d' ' -f2",
+                        "raw": "1",
+                        "type": "raw"
+                    },
+                    {
+                        "attr_name": "fan3_dir",
+                        "bmc_cmd": "ipmitool raw 0x3c 0x31 0x0 | xargs | cut -d' ' -f3",
+                        "raw": "1",
+                        "type": "raw"
+                    },
+                    {
+                        "attr_name": "fan4_dir",
+                        "bmc_cmd": "ipmitool raw 0x3c 0x31 0x0 | xargs | cut -d' ' -f4",
+                        "raw": "1",
+                        "type": "raw"
+                    },
+                    {
+                        "attr_name": "fan5_dir",
+                        "bmc_cmd": "ipmitool raw 0x3c 0x31 0x0 | xargs | cut -d' ' -f5",
+                        "raw": "1",
+                        "type": "raw"
+                    },
+                    {
+                        "attr_name": "fan6_dir",
+                        "bmc_cmd": "ipmitool raw 0x3c 0x31 0x0 | xargs | cut -d' ' -f6",
+                        "raw": "1",
+                        "type": "raw"
+                    }
+                ]
+            }
+        }
+    },
+    "SYS_LED": {
+        "dev_info": {
+            "device_type": "LED",
+            "device_name": "SYS_LED"
+        },
+        "dev_attr": {
+            "index": "0",
+            "flag": "ro"
+        },
+        "i2c": {
+            "attr_list": [
+                {
+                    "attr_name": "green",
+                    "bits": "7:4",
+                    "descr": "Green",
+                    "value": "0x09;0x0b",
+                    "swpld_addr": "0x30",
+                    "swpld_addr_offset": "0x80"
+                },
+                {
+                    "attr_name": "green_blink",
+                    "bits": "7:4",
+                    "descr": "Green Blinking",
+                    "value": "0x0d;0x0f",
+                    "swpld_addr": "0x30",
+                    "swpld_addr_offset": "0x80"
+                },
+                {
+                    "attr_name": "yellow",
+                    "bits": "7:4",
+                    "descr": "Yellow",
+                    "value": "0x08;0x0a",
+                    "swpld_addr": "0x30",
+                    "swpld_addr_offset": "0x80"
+                },
+                {
+                    "attr_name": "yellow_blink",
+                    "bits": "7:4",
+                    "descr": "Yellow Blinking",
+                    "value": "0x0c;0x0e",
+                    "swpld_addr": "0x30",
+                    "swpld_addr_offset": "0x80"
+                },
+                {
+                    "attr_name": "off",
+                    "bits": "7",
+                    "descr": "Off",
+                    "value": "0x0",
+                    "swpld_addr": "0x30",
+                    "swpld_addr_offset": "0x80"
+                }
+            ]
+        }
+    },
+    "FAN_LED": {
+        "dev_info": {
+            "device_type": "LED",
+            "device_name": "FAN_LED"
+        },
+        "dev_attr": {
+            "index": "0",
+            "flag": "ro"
+        },
+        "i2c": {
+            "attr_list": [
+                {
+                    "attr_name": "green",
+                    "bits": "3:0",
+                    "descr": "Green",
+                    "value": "0x09;0x0b",
+                    "swpld_addr": "0x30",
+                    "swpld_addr_offset": "0x80"
+                },
+                {
+                    "attr_name": "green_blink",
+                    "bits": "3:0",
+                    "descr": "Green Blinking",
+                    "value": "0x0d;0x0f",
+                    "swpld_addr": "0x30",
+                    "swpld_addr_offset": "0x80"
+                },
+                {
+                    "attr_name": "yellow",
+                    "bits": "3:0",
+                    "descr": "Yellow",
+                    "value": "0x08;0x0a",
+                    "swpld_addr": "0x30",
+                    "swpld_addr_offset": "0x80"
+                },
+                {
+                    "attr_name": "yellow_blink",
+                    "bits": "3:0",
+                    "descr": "Yellow Blinking",
+                    "value": "0x0c;0x0e",
+                    "swpld_addr": "0x30",
+                    "swpld_addr_offset": "0x80"
+                },
+                {
+                    "attr_name": "off",
+                    "bits": "3",
+                    "descr": "Off",
+                    "value": "0x0",
+                    "swpld_addr": "0x30",
+                    "swpld_addr_offset": "0x80"
+                }
+            ]
+        }
+    },
+    "PSU1_LED": {
+        "dev_info": {
+            "device_type": "LED",
+            "device_name": "PSU_LED"
+        },
+        "dev_attr": {
+            "index": "0",
+            "flag": "ro"
+        },
+        "i2c": {
+            "attr_list": [
+                {
+                    "attr_name": "green",
+                    "bits": "3:0",
+                    "descr": "Green",
+                    "value": "0x09;0x0b",
+                    "swpld_addr": "0x30",
+                    "swpld_addr_offset": "0x81"
+                },
+                {
+                    "attr_name": "green_blink",
+                    "bits": "3:0",
+                    "descr": "Green Blinking",
+                    "value": "0x0d;0x0f",
+                    "swpld_addr": "0x30",
+                    "swpld_addr_offset": "0x81"
+                },
+                {
+                    "attr_name": "yellow",
+                    "bits": "3:0",
+                    "descr": "Yellow",
+                    "value": "0x08;0x0a",
+                    "swpld_addr": "0x30",
+                    "swpld_addr_offset": "0x81"
+                },
+                {
+                    "attr_name": "yellow_blink",
+                    "bits": "3:0",
+                    "descr": "Yellow Blinking",
+                    "value": "0x0c;0x0e",
+                    "swpld_addr": "0x30",
+                    "swpld_addr_offset": "0x81"
+                },
+                {
+                    "attr_name": "off",
+                    "bits": "3",
+                    "descr": "Off",
+                    "value": "0x0",
+                    "swpld_addr": "0x30",
+                    "swpld_addr_offset": "0x81"
+                }
+            ]
+        }
+    },
+    "PSU2_LED": {
+        "dev_info": {
+            "device_type": "LED",
+            "device_name": "PSU_LED"
+        },
+        "dev_attr": {
+            "index": "1",
+            "flag": "ro"
+        },
+        "i2c": {
+            "attr_list": [
+                {
+                    "attr_name": "green",
+                    "bits": "7:4",
+                    "descr": "Green",
+                    "value": "0x09;0x0b",
+                    "swpld_addr": "0x30",
+                    "swpld_addr_offset": "0x81"
+                },
+                {
+                    "attr_name": "green_blink",
+                    "bits": "7:4",
+                    "descr": "Green Blinking",
+                    "value": "0x0d;0x0f",
+                    "swpld_addr": "0x30",
+                    "swpld_addr_offset": "0x81"
+                },
+                {
+                    "attr_name": "yellow",
+                    "bits": "7:4",
+                    "descr": "Yellow",
+                    "value": "0x08;0x0a",
+                    "swpld_addr": "0x30",
+                    "swpld_addr_offset": "0x81"
+                },
+                {
+                    "attr_name": "yellow_blink",
+                    "bits": "7:4",
+                    "descr": "Yellow Blinking",
+                    "value": "0x0c;0x0e",
+                    "swpld_addr": "0x30",
+                    "swpld_addr_offset": "0x81"
+                },
+                {
+                    "attr_name": "off",
+                    "bits": "7",
+                    "descr": "Off",
+                    "value": "0x0",
+                    "swpld_addr": "0x30",
+                    "swpld_addr_offset": "0x81"
+                }
+            ]
+        }
+    },
+    "LOC_LED": {
+        "dev_info": {
+            "device_type": "LED",
+            "device_name": "LOC_LED"
+        },
+        "dev_attr": {
+            "index": "0",
+            "flag": "rw"
+        },
+        "i2c": {
+            "attr_list": [
+                {
+                    "attr_name": "blue",
+                    "bits": "2:1",
+                    "descr": "Blue",
+                    "value": "0x02",
+                    "swpld_addr": "0x30",
+                    "swpld_addr_offset": "0x84"
+                },
+                {
+                    "attr_name": "blue_blink",
+                    "bits": "2:1",
+                    "descr": "Blue Blinking",
+                    "value": "0x03",
+                    "swpld_addr": "0x30",
+                    "swpld_addr_offset": "0x84"
+                },
+                {
+                    "attr_name": "off",
+                    "bits": "2",
+                    "descr": "Off",
+                    "value": "0x0",
+                    "swpld_addr": "0x30",
+                    "swpld_addr_offset": "0x84"
+                }
+            ]
+        }
+    },    
+    "PORT1": {
+        "dev_info": {
+            "device_type": "QSFP28",
+            "device_name": "PORT1",
+            "device_parent": "MUX3"
+        },
+        "dev_attr": {
+            "dev_idx": "1"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT1-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT1-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT1-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT1-EEPROM",
+            "device_parent": "MUX3",
+            "virt_parent": "PORT1"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x11",
+                "dev_addr": "0x50",
+                "dev_type": "optoe1"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT1-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT1-CTRL",
+            "device_parent": "MUX3",
+            "virt_parent": "PORT1"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x11",
+                "dev_addr": "0x53",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x10",
+                    "attr_mask": "0",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x14",
+                    "attr_mask": "0",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x40",
+                    "attr_mask": "0",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x44",
+                    "attr_mask": "0",
+                    "attr_cmpval": "0x1",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT2": {
+        "dev_info": {
+            "device_type": "QSFP28",
+            "device_name": "PORT2",
+            "device_parent": "MUX3"
+        },
+        "dev_attr": {
+            "dev_idx": "2"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT2-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT2-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT2-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT2-EEPROM",
+            "device_parent": "MUX3",
+            "virt_parent": "PORT2"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x12",
+                "dev_addr": "0x50",
+                "dev_type": "optoe1"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT2-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT2-CTRL",
+            "device_parent": "MUX3",
+            "virt_parent": "PORT2"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x12",
+                "dev_addr": "0x53",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x10",
+                    "attr_mask": "1",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x14",
+                    "attr_mask": "1",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x40",
+                    "attr_mask": "1",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x44",
+                    "attr_mask": "1",
+                    "attr_cmpval": "0x2",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT3": {
+        "dev_info": {
+            "device_type": "QSFP28",
+            "device_name": "PORT3",
+            "device_parent": "MUX3"
+        },
+        "dev_attr": {
+            "dev_idx": "3"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT3-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT3-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT3-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT3-EEPROM",
+            "device_parent": "MUX3",
+            "virt_parent": "PORT3"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x13",
+                "dev_addr": "0x50",
+                "dev_type": "optoe1"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT3-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT3-CTRL",
+            "device_parent": "MUX3",
+            "virt_parent": "PORT3"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x13",
+                "dev_addr": "0x53",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x10",
+                    "attr_mask": "2",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x14",
+                    "attr_mask": "2",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x40",
+                    "attr_mask": "2",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x44",
+                    "attr_mask": "2",
+                    "attr_cmpval": "0x4",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },    
+    "PORT4": {
+        "dev_info": {
+            "device_type": "QSFP28",
+            "device_name": "PORT4",
+            "device_parent": "MUX3"
+        },
+        "dev_attr": {
+            "dev_idx": "4"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT4-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT4-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT4-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT4-EEPROM",
+            "device_parent": "MUX3",
+            "virt_parent": "PORT4"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x14",
+                "dev_addr": "0x50",
+                "dev_type": "optoe1"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT4-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT4-CTRL",
+            "device_parent": "MUX3",
+            "virt_parent": "PORT4"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x14",
+                "dev_addr": "0x53",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x10",
+                    "attr_mask": "3",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x14",
+                    "attr_mask": "3",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x40",
+                    "attr_mask": "3",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x44",
+                    "attr_mask": "3",
+                    "attr_cmpval": "0x8",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },    
+    "PORT5": {
+        "dev_info": {
+            "device_type": "QSFP28",
+            "device_name": "PORT5",
+            "device_parent": "MUX3"
+        },
+        "dev_attr": {
+            "dev_idx": "5"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT5-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT5-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT5-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT5-EEPROM",
+            "device_parent": "MUX3",
+            "virt_parent": "PORT5"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x15",
+                "dev_addr": "0x50",
+                "dev_type": "optoe1"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT5-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT5-CTRL",
+            "device_parent": "MUX3",
+            "virt_parent": "PORT5"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x15",
+                "dev_addr": "0x53",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x10",
+                    "attr_mask": "4",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x14",
+                    "attr_mask": "4",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x40",
+                    "attr_mask": "4",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x44",
+                    "attr_mask": "4",
+                    "attr_cmpval": "0x10",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },    
+    "PORT6": {
+        "dev_info": {
+            "device_type": "QSFP28",
+            "device_name": "PORT6",
+            "device_parent": "MUX3"
+        },
+        "dev_attr": {
+            "dev_idx": "6"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT6-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT6-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT6-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT6-EEPROM",
+            "device_parent": "MUX3",
+            "virt_parent": "PORT6"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x16",
+                "dev_addr": "0x50",
+                "dev_type": "optoe1"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT6-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT6-CTRL",
+            "device_parent": "MUX3",
+            "virt_parent": "PORT6"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x16",
+                "dev_addr": "0x53",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x10",
+                    "attr_mask": "5",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x14",
+                    "attr_mask": "5",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x40",
+                    "attr_mask": "5",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x44",
+                    "attr_mask": "5",
+                    "attr_cmpval": "0x20",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },    
+    "PORT7": {
+        "dev_info": {
+            "device_type": "QSFP28",
+            "device_name": "PORT7",
+            "device_parent": "MUX3"
+        },
+        "dev_attr": {
+            "dev_idx": "7"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT7-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT7-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT7-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT7-EEPROM",
+            "device_parent": "MUX3",
+            "virt_parent": "PORT7"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x17",
+                "dev_addr": "0x50",
+                "dev_type": "optoe1"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT7-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT7-CTRL",
+            "device_parent": "MUX3",
+            "virt_parent": "PORT7"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x17",
+                "dev_addr": "0x53",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x10",
+                    "attr_mask": "6",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x14",
+                    "attr_mask": "6",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x40",
+                    "attr_mask": "6",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x44",
+                    "attr_mask": "6",
+                    "attr_cmpval": "0x40",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },    
+    "PORT8": {
+        "dev_info": {
+            "device_type": "QSFP28",
+            "device_name": "PORT8",
+            "device_parent": "MUX3"
+        },
+        "dev_attr": {
+            "dev_idx": "8"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT8-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT8-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT8-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT8-EEPROM",
+            "device_parent": "MUX3",
+            "virt_parent": "PORT8"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x18",
+                "dev_addr": "0x50",
+                "dev_type": "optoe1"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT8-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT8-CTRL",
+            "device_parent": "MUX3",
+            "virt_parent": "PORT8"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x18",
+                "dev_addr": "0x53",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x10",
+                    "attr_mask": "7",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x14",
+                    "attr_mask": "7",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x40",
+                    "attr_mask": "7",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x44",
+                    "attr_mask": "7",
+                    "attr_cmpval": "0x80",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },    
+    "PORT9": {
+        "dev_info": {
+            "device_type": "QSFP28",
+            "device_name": "PORT9",
+            "device_parent": "MUX4"
+        },
+        "dev_attr": {
+            "dev_idx": "9"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT9-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT9-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT9-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT9-EEPROM",
+            "device_parent": "MUX4",
+            "virt_parent": "PORT9"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x19",
+                "dev_addr": "0x50",
+                "dev_type": "optoe1"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT9-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT9-CTRL",
+            "device_parent": "MUX4",
+            "virt_parent": "PORT9"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x19",
+                "dev_addr": "0x53",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x11",
+                    "attr_mask": "0",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x15",
+                    "attr_mask": "0",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x41",
+                    "attr_mask": "0",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x45",
+                    "attr_mask": "0",
+                    "attr_cmpval": "0x1",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },    
+    "PORT10": {
+        "dev_info": {
+            "device_type": "QSFP28",
+            "device_name": "PORT10",
+            "device_parent": "MUX4"
+        },
+        "dev_attr": {
+            "dev_idx": "10"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT10-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT10-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT10-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT10-EEPROM",
+            "device_parent": "MUX4",
+            "virt_parent": "PORT10"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x1a",
+                "dev_addr": "0x50",
+                "dev_type": "optoe1"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT10-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT10-CTRL",
+            "device_parent": "MUX4",
+            "virt_parent": "PORT10"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x1a",
+                "dev_addr": "0x53",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x11",
+                    "attr_mask": "1",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x15",
+                    "attr_mask": "1",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x41",
+                    "attr_mask": "1",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x45",
+                    "attr_mask": "1",
+                    "attr_cmpval": "0x2",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT11": {
+        "dev_info": {
+            "device_type": "QSFP28",
+            "device_name": "PORT11",
+            "device_parent": "MUX4"
+        },
+        "dev_attr": {
+            "dev_idx": "11"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT11-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT11-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT11-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT11-EEPROM",
+            "device_parent": "MUX4",
+            "virt_parent": "PORT11"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x1b",
+                "dev_addr": "0x50",
+                "dev_type": "optoe1"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT11-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT11-CTRL",
+            "device_parent": "MUX4",
+            "virt_parent": "PORT11"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x1b",
+                "dev_addr": "0x53",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x11",
+                    "attr_mask": "2",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x15",
+                    "attr_mask": "2",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x41",
+                    "attr_mask": "2",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x45",
+                    "attr_mask": "2",
+                    "attr_cmpval": "0x4",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },    
+    "PORT12": {
+        "dev_info": {
+            "device_type": "QSFP28",
+            "device_name": "PORT12",
+            "device_parent": "MUX4"
+        },
+        "dev_attr": {
+            "dev_idx": "12"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT12-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT12-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT12-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT12-EEPROM",
+            "device_parent": "MUX4",
+            "virt_parent": "PORT12"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x1c",
+                "dev_addr": "0x50",
+                "dev_type": "optoe1"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT12-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT12-CTRL",
+            "device_parent": "MUX4",
+            "virt_parent": "PORT12"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x1c",
+                "dev_addr": "0x53",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x11",
+                    "attr_mask": "3",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x15",
+                    "attr_mask": "3",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x41",
+                    "attr_mask": "3",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x45",
+                    "attr_mask": "3",
+                    "attr_cmpval": "0x8",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },    
+    "PORT13": {
+        "dev_info": {
+            "device_type": "QSFP28",
+            "device_name": "PORT13",
+            "device_parent": "MUX4"
+        },
+        "dev_attr": {
+            "dev_idx": "13"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT13-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT13-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT13-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT13-EEPROM",
+            "device_parent": "MUX4",
+            "virt_parent": "PORT13"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x1d",
+                "dev_addr": "0x50",
+                "dev_type": "optoe1"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT13-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT13-CTRL",
+            "device_parent": "MUX4",
+            "virt_parent": "PORT13"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x1d",
+                "dev_addr": "0x53",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x11",
+                    "attr_mask": "4",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x15",
+                    "attr_mask": "4",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x41",
+                    "attr_mask": "4",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x45",
+                    "attr_mask": "4",
+                    "attr_cmpval": "0x10",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },        
+    "PORT14": {
+        "dev_info": {
+            "device_type": "QSFP28",
+            "device_name": "PORT14",
+            "device_parent": "MUX4"
+        },
+        "dev_attr": {
+            "dev_idx": "14"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT14-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT14-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT14-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT14-EEPROM",
+            "device_parent": "MUX4",
+            "virt_parent": "PORT14"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x1e",
+                "dev_addr": "0x50",
+                "dev_type": "optoe1"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT14-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT14-CTRL",
+            "device_parent": "MUX4",
+            "virt_parent": "PORT14"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x1e",
+                "dev_addr": "0x53",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x11",
+                    "attr_mask": "5",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x15",
+                    "attr_mask": "5",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x41",
+                    "attr_mask": "5",
+                    "attr_cmpval": "0x20",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x45",
+                    "attr_mask": "5",
+                    "attr_cmpval": "0x20",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT15": {
+        "dev_info": {
+            "device_type": "QSFP28",
+            "device_name": "PORT15",
+            "device_parent": "MUX4"
+        },
+        "dev_attr": {
+            "dev_idx": "15"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT15-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT15-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT15-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT15-EEPROM",
+            "device_parent": "MUX4",
+            "virt_parent": "PORT15"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x1f",
+                "dev_addr": "0x50",
+                "dev_type": "optoe1"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT15-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT15-CTRL",
+            "device_parent": "MUX4",
+            "virt_parent": "PORT15"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x1f",
+                "dev_addr": "0x53",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x11",
+                    "attr_mask": "6",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x15",
+                    "attr_mask": "6",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x41",
+                    "attr_mask": "6",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x45",
+                    "attr_mask": "6",
+                    "attr_cmpval": "0x40",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },    
+    "PORT16": {
+        "dev_info": {
+            "device_type": "QSFP28",
+            "device_name": "PORT16",
+            "device_parent": "MUX4"
+        },
+        "dev_attr": {
+            "dev_idx": "16"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT16-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT16-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT16-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT16-EEPROM",
+            "device_parent": "MUX4",
+            "virt_parent": "PORT16"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x20",
+                "dev_addr": "0x50",
+                "dev_type": "optoe1"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT16-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT16-CTRL",
+            "device_parent": "MUX4",
+            "virt_parent": "PORT16"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x20",
+                "dev_addr": "0x53",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x11",
+                    "attr_mask": "7",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x15",
+                    "attr_mask": "7",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x41",
+                    "attr_mask": "7",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x45",
+                    "attr_mask": "7",
+                    "attr_cmpval": "0x80",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },    
+    "PORT17": {
+        "dev_info": {
+            "device_type": "QSFP28",
+            "device_name": "PORT17",
+            "device_parent": "MUX5"
+        },
+        "dev_attr": {
+            "dev_idx": "17"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT17-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT17-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT17-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT17-EEPROM",
+            "device_parent": "MUX5",
+            "virt_parent": "PORT17"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x21",
+                "dev_addr": "0x50",
+                "dev_type": "optoe1"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT17-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT17-CTRL",
+            "device_parent": "MUX5",
+            "virt_parent": "PORT17"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x21",
+                "dev_addr": "0x53",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x12",
+                    "attr_mask": "0",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x16",
+                    "attr_mask": "0",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x42",
+                    "attr_mask": "0",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x46",
+                    "attr_mask": "0",
+                    "attr_cmpval": "0x1",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT18": {
+        "dev_info": {
+            "device_type": "QSFP28",
+            "device_name": "PORT18",
+            "device_parent": "MUX5"
+        },
+        "dev_attr": {
+            "dev_idx": "18"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT18-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT18-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT18-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT18-EEPROM",
+            "device_parent": "MUX5",
+            "virt_parent": "PORT18"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x22",
+                "dev_addr": "0x50",
+                "dev_type": "optoe1"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT18-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT18-CTRL",
+            "device_parent": "MUX5",
+            "virt_parent": "PORT18"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x22",
+                "dev_addr": "0x53",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x12",
+                    "attr_mask": "1",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x16",
+                    "attr_mask": "1",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x42",
+                    "attr_mask": "1",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x46",
+                    "attr_mask": "1",
+                    "attr_cmpval": "0x2",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },    
+    "PORT19": {
+        "dev_info": {
+            "device_type": "QSFP28",
+            "device_name": "PORT19",
+            "device_parent": "MUX5"
+        },
+        "dev_attr": {
+            "dev_idx": "19"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT19-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT19-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT19-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT19-EEPROM",
+            "device_parent": "MUX5",
+            "virt_parent": "PORT19"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x23",
+                "dev_addr": "0x50",
+                "dev_type": "optoe1"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT19-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT19-CTRL",
+            "device_parent": "MUX5",
+            "virt_parent": "PORT19"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x23",
+                "dev_addr": "0x53",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x12",
+                    "attr_mask": "2",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x16",
+                    "attr_mask": "2",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x42",
+                    "attr_mask": "2",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x46",
+                    "attr_mask": "2",
+                    "attr_cmpval": "0x4",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },            
+    "PORT20": {
+        "dev_info": {
+            "device_type": "QSFP28",
+            "device_name": "PORT20",
+            "device_parent": "MUX5"
+        },
+        "dev_attr": {
+            "dev_idx": "20"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT20-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT20-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT20-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT20-EEPROM",
+            "device_parent": "MUX5",
+            "virt_parent": "PORT20"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x24",
+                "dev_addr": "0x50",
+                "dev_type": "optoe1"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT20-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT20-CTRL",
+            "device_parent": "MUX5",
+            "virt_parent": "PORT20"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x24",
+                "dev_addr": "0x53",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x12",
+                    "attr_mask": "3",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x16",
+                    "attr_mask": "3",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x42",
+                    "attr_mask": "3",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x46",
+                    "attr_mask": "3",
+                    "attr_cmpval": "0x8",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT21": {
+        "dev_info": {
+            "device_type": "QSFP28",
+            "device_name": "PORT21",
+            "device_parent": "MUX5"
+        },
+        "dev_attr": {
+            "dev_idx": "21"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT21-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT21-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT21-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT21-EEPROM",
+            "device_parent": "MUX5",
+            "virt_parent": "PORT21"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x25",
+                "dev_addr": "0x50",
+                "dev_type": "optoe1"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT21-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT21-CTRL",
+            "device_parent": "MUX5",
+            "virt_parent": "PORT21"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x25",
+                "dev_addr": "0x53",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x12",
+                    "attr_mask": "4",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x16",
+                    "attr_mask": "4",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x42",
+                    "attr_mask": "4",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x46",
+                    "attr_mask": "4",
+                    "attr_cmpval": "0x10",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT22": {
+        "dev_info": {
+            "device_type": "QSFP28",
+            "device_name": "PORT22",
+            "device_parent": "MUX5"
+        },
+        "dev_attr": {
+            "dev_idx": "22"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT22-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT22-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT22-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT22-EEPROM",
+            "device_parent": "MUX5",
+            "virt_parent": "PORT22"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x26",
+                "dev_addr": "0x50",
+                "dev_type": "optoe1"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT22-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT22-CTRL",
+            "device_parent": "MUX5",
+            "virt_parent": "PORT22"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x26",
+                "dev_addr": "0x53",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x12",
+                    "attr_mask": "5",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x16",
+                    "attr_mask": "5",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x42",
+                    "attr_mask": "5",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x46",
+                    "attr_mask": "5",
+                    "attr_cmpval": "0x20",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT23": {
+        "dev_info": {
+            "device_type": "QSFP28",
+            "device_name": "PORT23",
+            "device_parent": "MUX5"
+        },
+        "dev_attr": {
+            "dev_idx": "23"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT23-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT23-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT23-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT23-EEPROM",
+            "device_parent": "MUX5",
+            "virt_parent": "PORT23"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x27",
+                "dev_addr": "0x50",
+                "dev_type": "optoe1"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT23-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT23-CTRL",
+            "device_parent": "MUX5",
+            "virt_parent": "PORT23"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x27",
+                "dev_addr": "0x53",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x12",
+                    "attr_mask": "6",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x16",
+                    "attr_mask": "6",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x42",
+                    "attr_mask": "6",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x46",
+                    "attr_mask": "6",
+                    "attr_cmpval": "0x40",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },    
+    "PORT24": {
+        "dev_info": {
+            "device_type": "QSFP28",
+            "device_name": "PORT24",
+            "device_parent": "MUX5"
+        },
+        "dev_attr": {
+            "dev_idx": "24"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT24-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT24-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT24-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT24-EEPROM",
+            "device_parent": "MUX5",
+            "virt_parent": "PORT24"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x28",
+                "dev_addr": "0x50",
+                "dev_type": "optoe1"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT24-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT24-CTRL",
+            "device_parent": "MUX5",
+            "virt_parent": "PORT24"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x28",
+                "dev_addr": "0x53",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x12",
+                    "attr_mask": "7",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x16",
+                    "attr_mask": "7",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x42",
+                    "attr_mask": "7",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x46",
+                    "attr_mask": "7",
+                    "attr_cmpval": "0x80",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },    
+    "PORT25": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT25",
+            "device_parent": "MUX6"
+        },
+        "dev_attr": {
+            "dev_idx": "25"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT25-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT25-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT25-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT25-EEPROM",
+            "device_parent": "MUX6",
+            "virt_parent": "PORT25"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x29",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT25-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT25-CTRL",
+            "device_parent": "MUX6",
+            "virt_parent": "PORT25"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x29",
+                "dev_addr": "0x53",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x13",
+                    "attr_mask": "0",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x17",
+                    "attr_mask": "0",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x43",
+                    "attr_mask": "0",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x47",
+                    "attr_mask": "0",
+                    "attr_cmpval": "0x1",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT26": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT26",
+            "device_parent": "MUX6"
+        },
+        "dev_attr": {
+            "dev_idx": "26"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT26-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT26-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT26-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT26-EEPROM",
+            "device_parent": "MUX6",
+            "virt_parent": "PORT26"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x2a",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT26-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT26-CTRL",
+            "device_parent": "MUX6",
+            "virt_parent": "PORT26"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x2a",
+                "dev_addr": "0x53",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x13",
+                    "attr_mask": "1",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x17",
+                    "attr_mask": "1",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x43",
+                    "attr_mask": "1",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x47",
+                    "attr_mask": "1",
+                    "attr_cmpval": "0x2",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },    
+    "PORT27": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT27",
+            "device_parent": "MUX6"
+        },
+        "dev_attr": {
+            "dev_idx": "27"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT27-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT27-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT27-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT27-EEPROM",
+            "device_parent": "MUX6",
+            "virt_parent": "PORT27"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x2b",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT27-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT27-CTRL",
+            "device_parent": "MUX6",
+            "virt_parent": "PORT27"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x2b",
+                "dev_addr": "0x53",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x13",
+                    "attr_mask": "2",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x17",
+                    "attr_mask": "2",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x43",
+                    "attr_mask": "2",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x47",
+                    "attr_mask": "2",
+                    "attr_cmpval": "0x4",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },    
+    "PORT28": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT28",
+            "device_parent": "MUX6"
+        },
+        "dev_attr": {
+            "dev_idx": "28"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT28-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT28-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT28-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT28-EEPROM",
+            "device_parent": "MUX6",
+            "virt_parent": "PORT28"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x2c",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT28-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT28-CTRL",
+            "device_parent": "MUX6",
+            "virt_parent": "PORT28"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x2c",
+                "dev_addr": "0x53",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x13",
+                    "attr_mask": "3",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x17",
+                    "attr_mask": "3",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x43",
+                    "attr_mask": "3",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x47",
+                    "attr_mask": "3",
+                    "attr_cmpval": "0x8",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },    
+    "PORT29": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT29",
+            "device_parent": "MUX6"
+        },
+        "dev_attr": {
+            "dev_idx": "29"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT29-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT29-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT29-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT29-EEPROM",
+            "device_parent": "MUX6",
+            "virt_parent": "PORT29"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x2d",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT29-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT29-CTRL",
+            "device_parent": "MUX6",
+            "virt_parent": "PORT29"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x2d",
+                "dev_addr": "0x53",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x13",
+                    "attr_mask": "4",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x17",
+                    "attr_mask": "4",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x43",
+                    "attr_mask": "4",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x47",
+                    "attr_mask": "4",
+                    "attr_cmpval": "0x10",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },        
+    "PORT30": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT30",
+            "device_parent": "MUX6"
+        },
+        "dev_attr": {
+            "dev_idx": "30"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT30-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT30-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT30-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT30-EEPROM",
+            "device_parent": "MUX6",
+            "virt_parent": "PORT30"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x2e",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT30-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT30-CTRL",
+            "device_parent": "MUX6",
+            "virt_parent": "PORT30"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x2e",
+                "dev_addr": "0x53",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x13",
+                    "attr_mask": "5",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x17",
+                    "attr_mask": "5",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x43",
+                    "attr_mask": "5",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x47",
+                    "attr_mask": "5",
+                    "attr_cmpval": "0x20",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },        
+    "PORT31": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT31",
+            "device_parent": "MUX6"
+        },
+        "dev_attr": {
+            "dev_idx": "31"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT31-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT31-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT31-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT31-EEPROM",
+            "device_parent": "MUX6",
+            "virt_parent": "PORT31"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x2f",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT31-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT31-CTRL",
+            "device_parent": "MUX6",
+            "virt_parent": "PORT31"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x2f",
+                "dev_addr": "0x53",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x13",
+                    "attr_mask": "6",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x17",
+                    "attr_mask": "6",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x43",
+                    "attr_mask": "6",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x47",
+                    "attr_mask": "6",
+                    "attr_cmpval": "0x40",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    },
+    "PORT32": {
+        "dev_info": {
+            "device_type": "QSFP-DD",
+            "device_name": "PORT32",
+            "device_parent": "MUX6"
+        },
+        "dev_attr": {
+            "dev_idx": "32"
+        },
+        "i2c": {
+            "interface": [
+                {
+                    "itf": "eeprom",
+                    "dev": "PORT32-EEPROM"
+                },
+                {
+                    "itf": "control",
+                    "dev": "PORT32-CTRL"
+                }
+            ]
+        }
+    },
+    "PORT32-EEPROM": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT32-EEPROM",
+            "device_parent": "MUX6",
+            "virt_parent": "PORT32"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x30",
+                "dev_addr": "0x50",
+                "dev_type": "optoe3"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "eeprom"
+                }
+            ]
+        }
+    },
+    "PORT32-CTRL": {
+        "dev_info": {
+            "device_type": "",
+            "device_name": "PORT32-CTRL",
+            "device_parent": "MUX6",
+            "virt_parent": "PORT32"
+        },
+        "i2c": {
+            "topo_info": {
+                "parent_bus": "0x30",
+                "dev_addr": "0x53",
+                "dev_type": "pddf_xcvr"
+            },
+            "attr_list": [
+                {
+                    "attr_name": "xcvr_intr_status",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x13",
+                    "attr_mask": "7",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_present",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x17",
+                    "attr_mask": "7",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_reset",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x43",
+                    "attr_mask": "7",
+                    "attr_cmpval": "0x0",
+                    "attr_len": "1"
+                },
+                {
+                    "attr_name": "xcvr_lpmode",
+                    "attr_devaddr": "0x31",
+                    "attr_devname": "CPLD2",
+                    "attr_devtype": "cpld",
+                    "attr_offset": "0x47",
+                    "attr_mask": "7",
+                    "attr_cmpval": "0x80",
+                    "attr_len": "1"
+                }
+            ]
+        }
+    }
+}
diff --git a/device/ufispace/x86_64-ufispace_s9301_32db-r0/pddf_support b/device/ufispace/x86_64-ufispace_s9301_32db-r0/pddf_support
new file mode 100644
index 000000000..e69de29bb
diff --git a/device/ufispace/x86_64-ufispace_s9301_32db-r0/platform.json b/device/ufispace/x86_64-ufispace_s9301_32db-r0/platform.json
new file mode 100644
index 000000000..65a45fd24
--- /dev/null
+++ b/device/ufispace/x86_64-ufispace_s9301_32db-r0/platform.json
@@ -0,0 +1,613 @@
+{
+    "chassis": {
+        "name": "S9301-32DB",
+        "components": [
+            {
+                "name": "CPLD1"
+            },
+            {
+                "name": "CPLD2"
+            },
+            {
+                "name": "CPLD3"
+            },
+            {
+                "name": "BIOS"
+            },
+            {
+                "name": "BMC"
+            }
+        ],
+        "fans": [
+            {
+                "name": "Fantray1_1"
+            },
+            {
+                "name": "Fantray1_2"
+            },
+            {
+                "name": "Fantray2_1"
+            },
+            {
+                "name": "Fantray2_2"
+            },
+            {
+                "name": "Fantray3_1"
+            },
+            {
+                "name": "Fantray3_2"
+            },
+            {
+                "name": "Fantray4_1"
+            },
+            {
+                "name": "Fantray4_2"
+            },
+            {
+                "name": "Fantray5_1"
+            },
+            {
+                "name": "Fantray5_2"
+            },
+            {
+                "name": "Fantray6_1"
+            },
+            {
+                "name": "Fantray6_2"
+            }   
+        ],
+        "fan_drawers":[
+            {
+                "name": "Fantray1",
+                "num_fans" : 2,
+                "fans": [
+                    {
+                        "name": "Fantray1_1"
+                    },
+                    {
+                        "name": "Fantray1_2"
+                    }
+                ]
+            },
+            {
+                "name": "Fantray2",
+                "num_fans" : 2,
+                "fans": [
+                    {
+                        "name": "Fantray2_1"
+                    },
+                    {
+                        "name": "Fantray2_2"
+                    }
+                ]
+            },
+            {
+                "name": "Fantray3",
+                "num_fans" : 2,
+                "fans": [
+                    {
+                        "name": "Fantray3_1"
+                    },
+                    {
+                        "name": "Fantray3_2"
+                    }
+                ]
+            },
+            {
+                "name": "Fantray4",
+                "num_fans" : 2,
+                "fans": [
+                    {
+                        "name": "Fantray4_1"
+                    },
+                    {
+                        "name": "Fantray4_2"
+                    }
+                ]
+            },
+            {
+                "name": "Fantray5",
+                "num_fans" : 2,
+                "fans": [
+                    {
+                        "name": "Fantray5_1"
+                    },
+                    {
+                        "name": "Fantray5_2"
+                    }
+                ]
+            },
+            {
+                "name": "Fantray6",
+                "num_fans" : 2,
+                "fans": [
+                    {
+                        "name": "Fantray6_1"
+                    },
+                    {
+                        "name": "Fantray6_2"
+                    }
+                ]
+            }            	
+        ],
+        "psus": [
+            {
+                "name": "PSU1",
+                "fans": [
+                    {
+                        "name": "PSU1_FAN1"
+                    }
+                ],
+                "thermals": [
+                    {
+                        "name": "PSU1_TEMP1"
+                    }
+                ]
+            },
+            {
+                "name": "PSU2",
+                "fans": [
+                    {
+                        "name": "PSU2_FAN1"
+                    }
+                ],
+                "thermals": [
+                    {
+                        "name": "PSU2_TEMP1"
+                    }
+                ]
+            }
+        ],
+        "thermals": [
+            {
+                "name": "Temp_CPU_PECI"
+            },
+            {
+                "name": "Temp_CPU_ENV"
+            },
+            {
+                "name": "Temp_CPU_ENV2"
+            },
+            {
+                "name": "Temp_CPU_PECI"
+            },
+            {
+                "name": "Temp_MAC_DIE"
+            },
+            {
+                "name": "Temp_MAC_ENV"
+            },
+            {
+                "name": "Temp_PSU_CONNTOR"
+            }
+        ],
+        "sfps": [
+            {
+                "name": "Ethernet0"
+            },
+            {
+                "name": "Ethernet4"
+            },
+            {
+                "name": "Ethernet8"
+            },
+            {
+                "name": "Ethernet12"
+            },
+            {
+                "name": "Ethernet16"
+            },
+            {
+                "name": "Ethernet20"
+            },
+            {
+                "name": "Ethernet24"
+            },
+            {
+                "name": "Ethernet28"
+            },
+            {
+                "name": "Ethernet32"
+            },
+            {
+                "name": "Ethernet36"
+            },
+            {
+                "name": "Ethernet40"
+            },
+            {
+                "name": "Ethernet44"
+            },
+            {
+                "name": "Ethernet48"
+            },
+            {
+                "name": "Ethernet52"
+            },
+            {
+                "name": "Ethernet56"
+            },
+            {
+                "name": "Ethernet60"
+            },
+            {
+                "name": "Ethernet64"
+            },
+            {
+                "name": "Ethernet68"
+            },
+            {
+                "name": "Ethernet72"
+            },
+            {
+                "name": "Ethernet76"
+            },
+            {
+                "name": "Ethernet80"
+            },
+            {
+                "name": "Ethernet84"
+            },
+            {
+                "name": "Ethernet88"
+            },
+            {
+                "name": "Ethernet92"
+            },
+            {
+                "name": "Ethernet96"
+            },
+            {
+                "name": "Ethernet104"
+            },
+            {
+                "name": "Ethernet112"
+            },
+            {
+                "name": "Ethernet120"
+            },
+            {
+                "name": "Ethernet128"
+            },
+            {
+                "name": "Ethernet136"
+            },
+            {
+                "name": "Ethernet144"
+            },
+            {
+                "name": "Ethernet152"
+            }
+        ]
+    },
+    "interfaces": {
+        "Ethernet0": {
+            "index": "0,0,0,0",
+            "lanes": "1,2,3,4",
+            "breakout_modes": {
+                "1x200G": ["Eth0(Port0)"],
+                "2x100G": ["Eth0/1(Port0)", "Eth0/2(Port0)"],
+                "4x50G": ["Eth0/1(Port0)", "Eth0/2(Port0)", "Eth0/3(Port0)", "Eth0/4(Port0)"]
+            }
+        },
+
+        "Ethernet4": {
+            "index": "1,1,1,1",
+            "lanes": "5,6,7,8",
+            "breakout_modes": {
+                "1x200G": ["Eth1(Port1)"],
+                "2x100G": ["Eth1/1(Port1)", "Eth1/2(Port1)"],
+                "4x50G": ["Eth1/1(Port1)", "Eth1/2(Port1)", "Eth1/3(Port1)", "Eth1/4(Port1)"]
+            }
+        },
+
+        "Ethernet8": {
+            "index": "2,2,2,2",
+            "lanes": "9,10,11,12",
+            "breakout_modes": {
+                "1x200G": ["Eth2(Port2)"],
+                "2x100G": ["Eth2/1(Port2)", "Eth2/2(Port2)"],
+                "4x50G": ["Eth2/1(Port2)", "Eth2/2(Port2)", "Eth2/3(Port2)", "Eth2/4(Port2)"]
+            }
+        },
+
+        "Ethernet12": {
+            "index": "3,3,3,3",
+            "lanes": "13,14,15,16",
+            "breakout_modes": {
+                "1x200G": ["Eth3(Port3)"],
+                "2x100G": ["Eth3/1(Port3)", "Eth3/2(Port3)"],
+                "4x50G": ["Eth3/1(Port3)", "Eth3/2(Port3)", "Eth3/3(Port3)", "Eth3/4(Port3)"]
+            }
+        },
+
+        "Ethernet16": {
+            "index": "4,4,4,4",
+            "lanes": "17,18,19,20",
+            "breakout_modes": {
+                "1x200G": ["Eth4(Port4)"],
+                "2x100G": ["Eth4/1(Port4)", "Eth4/2(Port4)"],
+                "4x50G": ["Eth4/1(Port4)", "Eth4/2(Port4)", "Eth4/3(Port4)", "Eth4/4(Port4)"]
+            }
+        },
+
+        "Ethernet20": {
+            "index": "5,5,5,5",
+            "lanes": "21,22,23,24",
+            "breakout_modes": {
+                "1x200G": ["Eth5(Port5)"],
+                "2x100G": ["Eth5/1(Port5)", "Eth5/2(Port5)"],
+                "4x50G": ["Eth5/1(Port5)", "Eth5/2(Port5)", "Eth5/3(Port5)", "Eth5/4(Port5)"]
+            }
+        },
+
+        "Ethernet24": {
+            "index": "6,6,6,6",
+            "lanes": "25,26,27,28",
+            "breakout_modes": {
+                "1x200G": ["Eth6(Port6)"],
+                "2x100G": ["Eth6/1(Port6)", "Eth6/2(Port6)"],
+                "4x50G": ["Eth6/1(Port6)", "Eth6/2(Port6)", "Eth6/3(Port6)", "Eth6/4(Port6)"]
+            }
+        },
+
+        "Ethernet28": {
+            "index": "7,7,7,7",
+            "lanes": "29,30,31,32",
+            "breakout_modes": {
+                "1x200G": ["Eth7(Port7)"],
+                "2x100G": ["Eth7/1(Port7)", "Eth7/2(Port7)"],
+                "4x50G": ["Eth7/1(Port7)", "Eth7/2(Port7)", "Eth7/3(Port7)", "Eth7/4(Port7)"]
+            }
+        },
+
+        "Ethernet32": {
+            "index": "8,8,8,8",
+            "lanes": "33,34,35,36",
+            "breakout_modes": {
+                "1x200G": ["Eth8(Port8)"],
+                "2x100G": ["Eth8/1(Port8)", "Eth8/2(Port8)"],
+                "4x50G": ["Eth8/1(Port8)", "Eth8/2(Port8)", "Eth8/3(Port8)", "Eth8/4(Port8)"]
+            }
+        },
+
+        "Ethernet36": {
+            "index": "9,9,9,9",
+            "lanes": "37,38,39,40",
+            "breakout_modes": {
+                "1x200G": ["Eth9(Port9)"],
+                "2x100G": ["Eth9/1(Port9)", "Eth9/2(Port9)"],
+                "4x50G": ["Eth9/1(Port9)", "Eth9/2(Port9)", "Eth9/3(Port9)", "Eth9/4(Port9)"]
+            }
+        },
+
+        "Ethernet40": {
+            "index": "10,10,10,10",
+            "lanes": "41,42,43,44",
+            "breakout_modes": {
+                "1x200G": ["Eth10(Port10)"],
+                "2x100G": ["Eth10/1(Port10)", "Eth10/2(Port10)"],
+                "4x50G": ["Eth10/1(Port10)", "Eth10/2(Port10)", "Eth10/3(Port10)", "Eth10/4(Port10)"]
+            }
+        },
+
+        "Ethernet44": {
+            "index": "11,11,11,11",
+            "lanes": "45,46,47,48",
+            "breakout_modes": {
+                "1x200G": ["Eth11(Port11)"],
+                "2x100G": ["Eth11/1(Port11)", "Eth11/2(Port11)"],
+                "4x50G": ["Eth11/1(Port11)", "Eth11/2(Port11)", "Eth11/3(Port11)", "Eth11/4(Port11)"]
+            }
+        },
+
+        "Ethernet48": {
+            "index": "12,12,12,12",
+            "lanes": "49,50,51,52",
+            "breakout_modes": {
+                "1x200G": ["Eth12(Port12)"],
+                "2x100G": ["Eth12/1(Port12)", "Eth12/2(Port12)"],
+                "4x50G": ["Eth12/1(Port12)", "Eth12/2(Port12)", "Eth12/3(Port12)", "Eth12/4(Port12)"]
+            }
+        },
+
+        "Ethernet52": {
+            "index": "13,13,13,13",
+            "lanes": "53,54,55,56",
+            "breakout_modes": {
+                "1x200G": ["Eth13(Port13)"],
+                "2x100G": ["Eth13/1(Port13)", "Eth13/2(Port13)"],
+                "4x50G": ["Eth13/1(Port13)", "Eth13/2(Port13)", "Eth13/3(Port13)", "Eth13/4(Port13)"]
+            }
+        },
+
+        "Ethernet56": {
+            "index": "14,14,14,14",
+            "lanes": "57,58,59,60",
+            "breakout_modes": {
+                "1x200G": ["Eth14(Port14)"],
+                "2x100G": ["Eth14/1(Port14)", "Eth14/2(Port14)"],
+                "4x50G": ["Eth14/1(Port14)", "Eth14/2(Port14)", "Eth14/3(Port14)", "Eth14/4(Port14)"]
+            }
+        },
+
+        "Ethernet60": {
+            "index": "15,15,15,15",
+            "lanes": "61,62,63,64",
+            "breakout_modes": {
+                "1x200G": ["Eth15(Port15)"],
+                "2x100G": ["Eth15/1(Port15)", "Eth15/2(Port15)"],
+                "4x50G": ["Eth15/1(Port15)", "Eth15/2(Port15)", "Eth15/3(Port15)", "Eth15/4(Port15)"]
+            }
+        },
+
+        "Ethernet64": {
+            "index": "16,16,16,16",
+            "lanes": "65,66,67,68",
+            "breakout_modes": {
+                "1x200G": ["Eth16(Port16)"],
+                "2x100G": ["Eth16/1(Port16)", "Eth16/2(Port16)"],
+                "4x50G": ["Eth16/1(Port16)", "Eth16/2(Port16)", "Eth16/3(Port16)", "Eth16/4(Port16)"]
+            }
+        },
+
+        "Ethernet68": {
+            "index": "17,17,17,17",
+            "lanes": "69,70,71,72",
+            "breakout_modes": {
+                "1x200G": ["Eth17(Port17)"],
+                "2x100G": ["Eth17/1(Port17)", "Eth17/2(Port17)"],
+                "4x50G": ["Eth17/1(Port17)", "Eth17/2(Port17)", "Eth17/3(Port17)", "Eth17/4(Port17)"]
+            }
+        },
+
+        "Ethernet72": {
+            "index": "18,18,18,18",
+            "lanes": "73,74,75,76",
+            "breakout_modes": {
+                "1x200G": ["Eth18(Port18)"],
+                "2x100G": ["Eth18/1(Port18)", "Eth18/2(Port18)"],
+                "4x50G": ["Eth18/1(Port18)", "Eth18/2(Port18)", "Eth18/3(Port18)", "Eth18/4(Port18)"]
+            }
+        },
+
+        "Ethernet76": {
+            "index": "19,19,19,19",
+            "lanes": "77,78,79,80",
+            "breakout_modes": {
+                "1x200G": ["Eth19(Port19)"],
+                "2x100G": ["Eth19/1(Port19)", "Eth19/2(Port19)"],
+                "4x50G": ["Eth19/1(Port19)", "Eth19/2(Port19)", "Eth19/3(Port19)", "Eth19/4(Port19)"]
+            }
+        },
+
+        "Ethernet80": {
+            "index": "20,20,20,20",
+            "lanes": "81,82,83,84",
+            "breakout_modes": {
+                "1x200G": ["Eth20(Port20)"],
+                "2x100G": ["Eth20/1(Port20)", "Eth20/2(Port20)"],
+                "4x50G": ["Eth20/1(Port20)", "Eth20/2(Port20)", "Eth20/3(Port20)", "Eth20/4(Port20)"]
+            }
+        },
+
+        "Ethernet84": {
+            "index": "21,21,21,21",
+            "lanes": "85,86,87,88",
+            "breakout_modes": {
+                "1x200G": ["Eth21(Port21)"],
+                "2x100G": ["Eth21/1(Port21)", "Eth21/2(Port21)"],
+                "4x50G": ["Eth21/1(Port21)", "Eth21/2(Port21)", "Eth21/3(Port21)", "Eth21/4(Port21)"]
+            }
+        },
+
+        "Ethernet88": {
+            "index": "22,22,22,22",
+            "lanes": "89,90,91,92",
+            "breakout_modes": {
+                "1x200G": ["Eth22(Port22)"],
+                "2x100G": ["Eth22/1(Port22)", "Eth22/2(Port22)"],
+                "4x50G": ["Eth22/1(Port22)", "Eth22/2(Port22)", "Eth22/3(Port22)", "Eth22/4(Port22)"]
+            }
+        },
+
+        "Ethernet92": {
+            "index": "23,23,23,23",
+            "lanes": "93,94,95,96",
+            "breakout_modes": {
+                "1x200G": ["Eth23(Port23)"],
+                "2x100G": ["Eth23/1(Port23)", "Eth23/2(Port23)"],
+                "4x50G": ["Eth23/1(Port23)", "Eth23/2(Port23)", "Eth23/3(Port23)", "Eth23/4(Port23)"]
+            }
+        },
+
+        "Ethernet96": {
+            "index": "24,24,24,24,24,24,24,24",
+            "lanes": "97,98,99,100,101,102,103,104",
+            "breakout_modes": {
+                "1x400G": ["Eth24(Port24)"],
+                "2x200G": ["Eth24/1(Port24)", "Eth24/2(Port24)"],
+                "4x100G": ["Eth24/1(Port24)", "Eth24/2(Port24)", "Eth24/3(Port24)", "Eth24/4(Port24)"],
+                "8x50G": ["Eth24/1(Port24)", "Eth24/2(Port24)", "Eth24/3(Port24)", "Eth24/4(Port24)", "Eth24/5(Port24)", "Eth24/6(Port24)", "Eth24/7(Port24)", "Eth24/8(Port24)"]
+            }
+        },
+
+        "Ethernet104": {
+            "index": "25,25,25,25,25,25,25,25",
+            "lanes": "105,106,107,108,109,110,111,112",
+            "breakout_modes": {
+                "1x400G": ["Eth25(Port25)"],
+                "2x200G": ["Eth25/1(Port25)", "Eth25/2(Port25)"],
+                "4x100G": ["Eth25/1(Port25)", "Eth25/2(Port25)", "Eth25/3(Port25)", "Eth25/4(Port25)"],
+                "8x50G": ["Eth25/1(Port25)", "Eth25/2(Port25)", "Eth25/3(Port25)", "Eth25/4(Port25)", "Eth25/5(Port25)", "Eth25/6(Port25)", "Eth25/7(Port25)", "Eth25/8(Port25)"]
+            }
+        },
+
+        "Ethernet112": {
+            "index": "26,26,26,26,26,26,26,26",
+            "lanes": "113,114,115,116,117,118,119,120",
+            "breakout_modes": {
+                "1x400G": ["Eth26(Port26)"],
+                "2x200G": ["Eth26/1(Port26)", "Eth26/2(Port26)"],
+                "4x100G": ["Eth26/1(Port26)", "Eth26/2(Port26)", "Eth26/3(Port26)", "Eth26/4(Port26)"],
+                "8x50G": ["Eth26/1(Port26)", "Eth26/2(Port26)", "Eth26/3(Port26)", "Eth26/4(Port26)", "Eth26/5(Port26)", "Eth26/6(Port26)", "Eth26/7(Port26)", "Eth26/8(Port26)"]
+            }
+        },
+        
+        "Ethernet120": {
+            "index": "27,27,27,27,27,27,27,27",
+            "lanes": "121,122,123,124,125,126,127,128",
+            "breakout_modes": {
+                "1x400G": ["Eth27(Port27)"],
+                "2x200G": ["Eth27/1(Port27)", "Eth27/2(Port27)"],
+                "4x100G": ["Eth27/1(Port27)", "Eth27/2(Port27)", "Eth27/3(Port27)", "Eth27/4(Port27)"],
+                "8x50G": ["Eth27/1(Port27)", "Eth27/2(Port27)", "Eth27/3(Port27)", "Eth27/4(Port27)", "Eth27/5(Port27)", "Eth27/6(Port27)", "Eth27/7(Port27)", "Eth27/8(Port27)"]
+            }
+        },
+
+        "Ethernet128": {
+            "index": "28,28,28,28,28,28,28,28",
+            "lanes": "129,130,131,132,133,134,135,136",
+            "breakout_modes": {
+                "1x400G": ["Eth28(Port28)"],
+                "2x200G": ["Eth28/1(Port28)", "Eth28/2(Port28)"],
+                "4x100G": ["Eth28/1(Port28)", "Eth28/2(Port28)", "Eth28/3(Port28)", "Eth28/4(Port28)"],
+                "8x50G": ["Eth28/1(Port28)", "Eth28/2(Port28)", "Eth28/3(Port28)", "Eth28/4(Port28)", "Eth28/5(Port28)", "Eth28/6(Port28)", "Eth28/7(Port28)", "Eth28/8(Port28)"]
+            }
+        },
+
+        "Ethernet136": {
+            "index": "29,29,29,29,29,29,29,29",
+            "lanes": "137,138,139,140,141,142,143,144",
+            "breakout_modes": {
+                "1x400G": ["Eth29(Port29)"],
+                "2x200G": ["Eth29/1(Port29)", "Eth29/2(Port29)"],
+                "4x100G": ["Eth29/1(Port29)", "Eth29/2(Port29)", "Eth29/3(Port29)", "Eth29/4(Port29)"],
+                "8x50G": ["Eth29/1(Port29)", "Eth29/2(Port29)", "Eth29/3(Port29)", "Eth29/4(Port29)", "Eth29/5(Port29)", "Eth29/6(Port29)", "Eth29/7(Port29)", "Eth29/8(Port29)"]
+            }
+        },
+
+        "Ethernet144": {
+            "index": "30,30,30,30,30,30,30,30",
+            "lanes": "145,146,147,148,149,150,151,152",
+            "breakout_modes": {
+                "1x400G": ["Eth30(Port30)"],
+                "2x200G": ["Eth30/1(Port30)", "Eth30/2(Port30)"],
+                "4x100G": ["Eth30/1(Port30)", "Eth30/2(Port30)", "Eth30/3(Port30)", "Eth30/4(Port30)"],
+                "8x50G": ["Eth30/1(Port30)", "Eth30/2(Port30)", "Eth30/3(Port30)", "Eth30/4(Port30)", "Eth30/5(Port30)", "Eth30/6(Port30)", "Eth30/7(Port30)", "Eth30/8(Port30)"]
+            }
+        },
+
+        "Ethernet152": {
+            "index": "31,31,31,31,31,31,31,31",
+            "lanes": "153,154,155,156,157,158,159,160",
+            "breakout_modes": {
+                "1x400G": ["Eth31(Port31)"],
+                "2x200G": ["Eth31/1(Port31)", "Eth31/2(Port31)"],
+                "4x100G": ["Eth31/1(Port31)", "Eth31/2(Port31)", "Eth31/3(Port31)", "Eth31/4(Port31)"],
+                "8x50G": ["Eth31/1(Port31)", "Eth31/2(Port31)", "Eth31/3(Port31)", "Eth31/4(Port31)", "Eth31/5(Port31)", "Eth31/6(Port31)", "Eth31/7(Port31)", "Eth31/8(Port31)"]
+            }
+        }
+    }
+}
+
diff --git a/device/ufispace/x86_64-ufispace_s9301_32db-r0/platform_asic b/device/ufispace/x86_64-ufispace_s9301_32db-r0/platform_asic
new file mode 100644
index 000000000..960467652
--- /dev/null
+++ b/device/ufispace/x86_64-ufispace_s9301_32db-r0/platform_asic
@@ -0,0 +1 @@
+broadcom
diff --git a/device/ufispace/x86_64-ufispace_s9301_32db-r0/platform_components.json b/device/ufispace/x86_64-ufispace_s9301_32db-r0/platform_components.json
new file mode 100644
index 000000000..4274a7977
--- /dev/null
+++ b/device/ufispace/x86_64-ufispace_s9301_32db-r0/platform_components.json
@@ -0,0 +1,13 @@
+{
+    "chassis": {
+        "x86_64-ufispace_s9301_32db-r0": {
+            "component": {
+                "CPLD1": { },
+                "CPLD2": { },
+                "CPLD3": { },
+                "BIOS": { },
+                "BMC": {}
+            }
+        }
+    }
+}
diff --git a/device/ufispace/x86_64-ufispace_s9301_32db-r0/platform_env.conf b/device/ufispace/x86_64-ufispace_s9301_32db-r0/platform_env.conf
new file mode 100644
index 000000000..dd7cf4fe0
--- /dev/null
+++ b/device/ufispace/x86_64-ufispace_s9301_32db-r0/platform_env.conf
@@ -0,0 +1,2 @@
+SYNCD_SHM_SIZE=512m
+is_ltsw_chip=1
diff --git a/device/ufispace/x86_64-ufispace_s9301_32db-r0/pmon_daemon_control.json b/device/ufispace/x86_64-ufispace_s9301_32db-r0/pmon_daemon_control.json
new file mode 100644
index 000000000..e348e0168
--- /dev/null
+++ b/device/ufispace/x86_64-ufispace_s9301_32db-r0/pmon_daemon_control.json
@@ -0,0 +1,9 @@
+{
+    "skip_pcied": false,
+    "skip_fancontrol": false,
+    "skip_thermalctld": false,
+    "skip_ledd": true,
+    "skip_xcvrd": false,
+    "skip_psud": false,
+    "skip_syseepromd": false
+}
diff --git a/device/ufispace/x86_64-ufispace_s9301_32db-r0/sensors.conf b/device/ufispace/x86_64-ufispace_s9301_32db-r0/sensors.conf
new file mode 100644
index 000000000..7a1c04088
--- /dev/null
+++ b/device/ufispace/x86_64-ufispace_s9301_32db-r0/sensors.conf
@@ -0,0 +1,9 @@
+# libsensors configuration file
+
+bus "i2c-0" "I2C I801"
+chip "tmp75-i2c-*-4f"
+    label temp1 "CPU Board Temp"
+    set temp1_max 70
+    set temp1_max_hyst 75
+    set temp1_crit 85
+
diff --git a/device/ufispace/x86_64-ufispace_s9301_32db-r0/system_health_monitoring_config.json b/device/ufispace/x86_64-ufispace_s9301_32db-r0/system_health_monitoring_config.json
new file mode 100644
index 000000000..6291e81a0
--- /dev/null
+++ b/device/ufispace/x86_64-ufispace_s9301_32db-r0/system_health_monitoring_config.json
@@ -0,0 +1,15 @@
+{
+    "services_to_ignore": [],
+    "devices_to_ignore": [
+        "asic",
+        "psu",
+        "fan"
+    ],
+    "user_defined_checkers": [],
+    "polling_interval": 60,
+    "led_color": {
+        "fault": "yellow",
+        "normal": "green",
+        "booting": "blinking_green"
+    }
+}
\ No newline at end of file
diff --git a/platform/broadcom/one-image.mk b/platform/broadcom/one-image.mk
index 4e86423bd..0b93b3b2b 100755
--- a/platform/broadcom/one-image.mk
+++ b/platform/broadcom/one-image.mk
@@ -85,11 +85,13 @@ $(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(DELL_S6000_PLATFORM_MODULE) \
                                $(NOKIA_IXR7220H5_64D_PLATFORM_MODULE) \
                                $(TENCENT_TCS8400_PLATFORM_MODULE) \
                                $(TENCENT_TCS9400_PLATFORM_MODULE) \
-                               $(UFISPACE_S9300_32D_PLATFORM_MODULE) \
-                               $(UFISPACE_S9110_32X_PLATFORM_MODULE) \
-                               $(UFISPACE_S8901_54XC_PLATFORM_MODULE) \
-                               $(UFISPACE_S7801_54XS_PLATFORM_MODULE) \
                                $(UFISPACE_S6301_56ST_PLATFORM_MODULE) \
+                               $(UFISPACE_S7801_54XS_PLATFORM_MODULE) \
+                               $(UFISPACE_S8901_54XC_PLATFORM_MODULE) \
+                               $(UFISPACE_S9110_32X_PLATFORM_MODULE) \
+                               $(UFISPACE_S9300_32D_PLATFORM_MODULE) \
+                               $(UFISPACE_S9301_32D_PLATFORM_MODULE) \
+                               $(UFISPACE_S9301_32DB_PLATFORM_MODULE) \
                                $(MICAS_M2_W6510_48V8C_PLATFORM_MODULE)
 
 $(SONIC_ONE_IMAGE)_LAZY_BUILD_INSTALLS = $(BRCM_OPENNSL_KERNEL) $(BRCM_DNX_OPENNSL_KERNEL)
diff --git a/platform/broadcom/platform-modules-ufispace.dep b/platform/broadcom/platform-modules-ufispace.dep
new file mode 100644
index 000000000..a6609b3c6
--- /dev/null
+++ b/platform/broadcom/platform-modules-ufispace.dep
@@ -0,0 +1,10 @@
+
+MPATH       := $($(UFISPACE_S9300_32D_PLATFORM_MODULE)_SRC_PATH)
+DEP_FILES   := $(SONIC_COMMON_FILES_LIST) platform/broadcom/platform-modules-ufispace.mk platform/broadcom/platform-modules-ufispace.dep
+DEP_FILES   += $(SONIC_COMMON_BASE_FILES_LIST)
+DEP_FILES   += $(shell git ls-files $(MPATH))
+
+$(UFISPACE_S9300_32D_PLATFORM_MODULE)_CACHE_MODE  := GIT_CONTENT_SHA 
+$(UFISPACE_S9300_32D_PLATFORM_MODULE)_DEP_FLAGS   := $(SONIC_COMMON_FLAGS_LIST)
+$(UFISPACE_S9300_32D_PLATFORM_MODULE)_DEP_FILES   := $(DEP_FILES)
+
diff --git a/platform/broadcom/platform-modules-ufispace.mk b/platform/broadcom/platform-modules-ufispace.mk
index 2c202cbba..18bba6f50 100644
--- a/platform/broadcom/platform-modules-ufispace.mk
+++ b/platform/broadcom/platform-modules-ufispace.mk
@@ -1,12 +1,16 @@
 # UfiSpace Platform modules
 
 UFISPACE_S9300_32D_PLATFORM_MODULE_VERSION = 1.0.0
+UFISPACE_S9301_32D_PLATFORM_MODULE_VERSION = 1.0.0
+UFISPACE_S9301_32DB_PLATFORM_MODULE_VERSION = 1.0.0
 UFISPACE_S9110_32X_PLATFORM_MODULE_VERSION = 1.0.0
 UFISPACE_S8901_54XC_PLATFORM_MODULE_VERSION = 1.0.0
 UFISPACE_S7801_54XS_PLATFORM_MODULE_VERSION = 1.0.0
 UFISPACE_S6301_56ST_PLATFORM_MODULE_VERSION = 1.0.0
 
 export UFISPACE_S9300_32D_PLATFORM_MODULE_VERSION
+export UFISPACE_S9301_32D_PLATFORM_MODULE_VERSION
+export UFISPACE_S9301_32DB_PLATFORM_MODULE_VERSION
 export UFISPACE_S9110_32X_PLATFORM_MODULE_VERSION
 export UFISPACE_S8901_54XC_PLATFORM_MODULE_VERSION
 export UFISPACE_S7801_54XS_PLATFORM_MODULE_VERSION
@@ -18,6 +22,14 @@ $(UFISPACE_S9300_32D_PLATFORM_MODULE)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADER
 $(UFISPACE_S9300_32D_PLATFORM_MODULE)_PLATFORM = x86_64-ufispace_s9300_32d-r0
 SONIC_DPKG_DEBS += $(UFISPACE_S9300_32D_PLATFORM_MODULE)
 
+UFISPACE_S9301_32D_PLATFORM_MODULE = sonic-platform-ufispace-s9301-32d_$(UFISPACE_S9301_32D_PLATFORM_MODULE_VERSION)_amd64.deb
+$(UFISPACE_S9301_32D_PLATFORM_MODULE)_PLATFORM = x86_64-ufispace_s9301_32d-r0
+$(eval $(call add_extra_package,$(UFISPACE_S9300_32D_PLATFORM_MODULE),$(UFISPACE_S9301_32D_PLATFORM_MODULE)))
+
+UFISPACE_S9301_32DB_PLATFORM_MODULE = sonic-platform-ufispace-s9301-32db_$(UFISPACE_S9301_32DB_PLATFORM_MODULE_VERSION)_amd64.deb
+$(UFISPACE_S9301_32DB_PLATFORM_MODULE)_PLATFORM = x86_64-ufispace_s9301_32db-r0
+$(eval $(call add_extra_package,$(UFISPACE_S9300_32D_PLATFORM_MODULE),$(UFISPACE_S9301_32DB_PLATFORM_MODULE)))
+
 UFISPACE_S9110_32X_PLATFORM_MODULE = sonic-platform-ufispace-s9110-32x_$(UFISPACE_S9110_32X_PLATFORM_MODULE_VERSION)_amd64.deb
 $(UFISPACE_S9110_32X_PLATFORM_MODULE)_PLATFORM = x86_64-ufispace_s9110_32x-r0
 $(eval $(call add_extra_package,$(UFISPACE_S9300_32D_PLATFORM_MODULE),$(UFISPACE_S9110_32X_PLATFORM_MODULE)))
diff --git a/platform/broadcom/rules.dep b/platform/broadcom/rules.dep
index 51cca1baa..fbdbb865e 100644
--- a/platform/broadcom/rules.dep
+++ b/platform/broadcom/rules.dep
@@ -20,6 +20,7 @@ include $(PLATFORM_PATH)/platform-modules-quanta.dep
 #include $(PLATFORM_PATH)/platform-modules-ragile.dep
 include $(PLATFORM_PATH)/platform-modules-ruijie.dep
 include $(PLATFORM_PATH)/platform-modules-brcm-xlr-gts.dep
+include $(PLATFORM_PATH)/platform-modules-ufispace.dep
 include $(PLATFORM_PATH)/platform-modules-micas.dep
 include $(PLATFORM_PATH)/docker-syncd-brcm.dep
 include $(PLATFORM_PATH)/docker-syncd-brcm-rpc.dep
diff --git a/platform/broadcom/rules.mk b/platform/broadcom/rules.mk
index 3349e6717..4070f7be0 100755
--- a/platform/broadcom/rules.mk
+++ b/platform/broadcom/rules.mk
@@ -4,7 +4,6 @@ include $(PLATFORM_PATH)/sai.mk
 # * Nokia
 # * Juniper
 # * Ragile
-# * Ufispace
 include $(PLATFORM_PATH)/platform-modules-nokia.mk
 include $(PLATFORM_PATH)/platform-modules-dell.mk
 include $(PLATFORM_PATH)/platform-modules-arista.mk
@@ -21,7 +20,7 @@ include $(PLATFORM_PATH)/platform-modules-quanta.mk
 #include $(PLATFORM_PATH)/platform-modules-ruijie.mk
 #include $(PLATFORM_PATH)/platform-modules-ragile.mk
 #include $(PLATFORM_PATH)/platform-modules-tencent.mk
-#include $(PLATFORM_PATH)/platform-modules-ufispace.mk
+include $(PLATFORM_PATH)/platform-modules-ufispace.mk
 include $(PLATFORM_PATH)/platform-modules-micas.mk
 include $(PLATFORM_PATH)/docker-syncd-brcm.mk
 include $(PLATFORM_PATH)/docker-syncd-brcm-rpc.mk
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/debian/changelog b/platform/broadcom/sonic-platform-modules-ufispace/debian/changelog
index 029c0374d..f6a51fb47 100644
--- a/platform/broadcom/sonic-platform-modules-ufispace/debian/changelog
+++ b/platform/broadcom/sonic-platform-modules-ufispace/debian/changelog
@@ -1,3 +1,10 @@
+sonic-ufispace-platform-modules (1.0.0) unstable; urgency=low
+
+  * Add support for S9301-32D
+  * Add support for S9301-32DB
+
+ -- ufispace <leo.yt.lin@ufispace.com>  Mon, 06 May 2024 17:54:25 +0800
+
 sonic-ufispace-platform-modules (1.0.0) unstable; urgency=low
 
   * Add support for S6301-56ST
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/debian/control b/platform/broadcom/sonic-platform-modules-ufispace/debian/control
index 798179f6e..2c39dd2f4 100644
--- a/platform/broadcom/sonic-platform-modules-ufispace/debian/control
+++ b/platform/broadcom/sonic-platform-modules-ufispace/debian/control
@@ -6,9 +6,17 @@ Build-Depends: debhelper (>= 9), bzip2
 Standards-Version: 1.0.0
 
 Package: sonic-platform-ufispace-s9300-32d
-Architecture: amd64 
+Architecture: amd64
 Description: This package contains s9300-32d platform driver utility for SONiC project.
 
+Package: sonic-platform-ufispace-s9301-32d
+Architecture: amd64
+Description: This package contains s9301-32d platform driver utility for SONiC project.
+
+Package: sonic-platform-ufispace-s9301-32db
+Architecture: amd64
+Description: This package contains s9301-32db platform driver utility for SONiC project.
+
 Package: sonic-platform-ufispace-s9110-32x
 Architecture: amd64
 Description: This package contains s9110-32x platform driver utility for SONiC project.
@@ -23,4 +31,4 @@ Description: This package contains s7801-54xs platform driver utility for SONiC
 
 Package: sonic-platform-ufispace-s6301-56st
 Architecture: amd64
-Description: This package contains s6301-56st platform driver utility for SONiC project.
\ No newline at end of file
+Description: This package contains s6301-56st platform driver utility for SONiC project.
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/debian/rules b/platform/broadcom/sonic-platform-modules-ufispace/debian/rules
index d36b48dbc..092bbb5bb 100755
--- a/platform/broadcom/sonic-platform-modules-ufispace/debian/rules
+++ b/platform/broadcom/sonic-platform-modules-ufispace/debian/rules
@@ -19,7 +19,9 @@ PACKAGE_PRE_NAME := sonic-platform-ufispace
 KVERSION   ?= $(shell uname -r)
 KERNEL_SRC :=  /lib/modules/$(KVERSION)
 MOD_SRC_DIR:= $(shell pwd)
-MODULE_DIRS:= s9300-32d
+MODULE_DIRS := s9300-32d
+MODULE_DIRS += s9301-32d
+MODULE_DIRS += s9301-32db
 MODULE_DIRS += s9110-32x
 MODULE_DIRS += s8901-54xc
 MODULE_DIRS += s7801-54xs
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9300-32d.prerm b/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9300-32d.prerm
new file mode 100644
index 000000000..f9fe8c017
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9300-32d.prerm
@@ -0,0 +1,2 @@
+systemctl stop pddf-platform-init.service
+systemctl disable pddf-platform-init.service
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9301-32d.install b/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9301-32d.install
new file mode 100644
index 000000000..fa71db5ec
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9301-32d.install
@@ -0,0 +1 @@
+s9301-32d/sonic_platform-1.0-py3-none-any.whl usr/share/sonic/device/x86_64-ufispace_s9301_32d-r0/pddf
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9301-32d.postinst b/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9301-32d.postinst
new file mode 100644
index 000000000..01666039c
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9301-32d.postinst
@@ -0,0 +1,3 @@
+depmod -a
+systemctl enable pddf-platform-init.service
+systemctl start pddf-platform-init.service
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9301-32d.prerm b/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9301-32d.prerm
new file mode 100644
index 000000000..f9fe8c017
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9301-32d.prerm
@@ -0,0 +1,2 @@
+systemctl stop pddf-platform-init.service
+systemctl disable pddf-platform-init.service
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9301-32db.install b/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9301-32db.install
new file mode 100644
index 000000000..64349db9a
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9301-32db.install
@@ -0,0 +1 @@
+s9301-32db/sonic_platform-1.0-py3-none-any.whl usr/share/sonic/device/x86_64-ufispace_s9301_32db-r0/pddf
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9301-32db.postinst b/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9301-32db.postinst
new file mode 100644
index 000000000..01666039c
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9301-32db.postinst
@@ -0,0 +1,3 @@
+depmod -a
+systemctl enable pddf-platform-init.service
+systemctl start pddf-platform-init.service
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9301-32db.prerm b/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9301-32db.prerm
new file mode 100644
index 000000000..f9fe8c017
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9301-32db.prerm
@@ -0,0 +1,2 @@
+systemctl stop pddf-platform-init.service
+systemctl disable pddf-platform-init.service
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/modules/Makefile b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/modules/Makefile
index 7c2273d00..e27865a9b 100644
--- a/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/modules/Makefile
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/modules/Makefile
@@ -1,5 +1,5 @@
 
-MODULE_NAME  = x86-64-ufispace-s6301-56st-sys-eeprom.o x86-64-ufispace-s6301-56st-lpc.o 
+MODULE_NAME  = x86-64-ufispace-s6301-56st-sys-eeprom.o x86-64-ufispace-s6301-56st-lpc.o pddf_custom_psu.o
 obj-m       := $(MODULE_NAME)
 
 CFLAGS_pddf_custom_sysstatus_module.o := -I$(M)/../../../../pddf/i2c/modules/include
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/modules/pddf_custom_psu.c b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/modules/pddf_custom_psu.c
new file mode 100644
index 000000000..b71f0b90b
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/modules/pddf_custom_psu.c
@@ -0,0 +1,124 @@
+#include <linux/module.h>
+#include <linux/jiffies.h>
+#include <linux/i2c.h>
+#include <linux/hwmon.h>
+#include <linux/hwmon-sysfs.h>
+#include <linux/err.h>
+#include <linux/delay.h>
+#include <linux/mutex.h>
+#include <linux/sysfs.h>
+#include <linux/slab.h>
+#include <linux/dmi.h>
+#include "../../../../pddf/i2c/modules/include/pddf_psu_defs.h"
+
+#define PSU_REG_VOUT_MODE 0x20
+#define PSU_REG_READ_VOUT 0x8b
+
+ssize_t pddf_show_custom_psu_v_out(struct device *dev, struct device_attribute *da, char *buf);
+extern PSU_SYSFS_ATTR_DATA access_psu_v_out;
+
+static int two_complement_to_int(u16 data, u8 valid_bit, int mask)
+{
+  u16  valid_data  = data & mask;
+  bool is_negative = valid_data >> (valid_bit - 1);
+
+  return is_negative ? (-(((~valid_data) & mask) + 1)) : valid_data;
+}
+
+static u8 psu_get_vout_mode(struct i2c_client *client)
+{
+  u8 status = 0, retry = 10;
+  uint8_t offset = PSU_REG_VOUT_MODE;
+
+  while (retry) {
+    status = i2c_smbus_read_byte_data((struct i2c_client *)client, offset);
+    if (unlikely(status < 0)) {
+      msleep(60);
+      retry--;
+      continue;
+    }
+    break;
+  }
+
+  if (status < 0)
+  {
+    printk(KERN_ERR "%s: Get PSU Vout mode failed\n", __func__);
+    return 0;
+  }
+  else
+  {
+    /*printk(KERN_ERR "%s: vout_mode reg value 0x%x\n", __func__, status);*/
+    return status;
+  }
+}
+
+static u16 psu_get_v_out(struct i2c_client *client)
+{
+  u16 status = 0, retry = 10;
+  uint8_t offset = PSU_REG_READ_VOUT;
+
+  while (retry) {
+    status = i2c_smbus_read_word_data((struct i2c_client *)client, offset);
+    if (unlikely(status < 0)) {
+        msleep(60);
+        retry--;
+        continue;
+    }
+    break;
+  }
+
+  if (status < 0)
+  {
+    printk(KERN_ERR "%s: Get PSU Vout failed\n", __func__);
+    return 0;
+  }
+  else
+  {
+    /*printk(KERN_ERR "%s: vout reg value 0x%x\n", __func__, status);*/
+    return status;
+  }
+}
+
+ssize_t pddf_show_custom_psu_v_out(struct device *dev, struct device_attribute *da, char *buf)
+{
+  struct i2c_client *client = to_i2c_client(dev);
+  struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
+  int exponent, mantissa;
+  int multiplier = 1000;
+
+  u16 value = psu_get_v_out(client);
+  u8 vout_mode = psu_get_vout_mode(client);
+
+  if ((vout_mode >> 5) == 0)
+     exponent = two_complement_to_int(vout_mode & 0x1f, 5, 0x1f);
+  else
+  {
+     /*printk(KERN_ERR "%s: Only support linear mode for vout mode\n", __func__);*/
+     exponent = 0;
+  }
+  mantissa = value;
+  if (exponent >= 0)
+      return sprintf(buf, "%d\n", (mantissa << exponent) * multiplier);
+  else
+      return sprintf(buf, "%d\n", (mantissa * multiplier) / (1 << -exponent));
+}
+
+static int __init pddf_custom_psu_init(void)
+{
+  access_psu_v_out.show = pddf_show_custom_psu_v_out;
+  access_psu_v_out.do_get = NULL;
+  return 0;
+}
+
+static void __exit pddf_custom_psu_exit(void)
+{
+  return;
+}
+
+MODULE_AUTHOR("Broadcom");
+MODULE_DESCRIPTION("pddf custom psu api");
+MODULE_LICENSE("GPL");
+
+module_init(pddf_custom_psu_init);
+module_exit(pddf_custom_psu_exit);
+
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/modules/x86-64-ufispace-s6301-56st-lpc.c b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/modules/x86-64-ufispace-s6301-56st-lpc.c
index 9b42c8f2b..5858d989a 100644
--- a/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/modules/x86-64-ufispace-s6301-56st-lpc.c
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/modules/x86-64-ufispace-s6301-56st-lpc.c
@@ -26,7 +26,7 @@
 #include <linux/delay.h>
 #include <linux/io.h>
 #include <linux/platform_device.h>
-#include <stdbool.h>
+#include <linux/types.h>
 #include <linux/hwmon-sysfs.h>
 #include <linux/gpio.h>
 
@@ -44,6 +44,7 @@
 
 #define REG_BASE_CPU                      0x600
 #define REG_BASE_MB                       0x700
+#define REG_BASE_EC                       0xe000
 
 //MB CPLD
 #define REG_MB_BRD_ID_0                   (REG_BASE_MB + 0x00)
@@ -59,6 +60,10 @@
 #define REG_MB_SYS_LED_STATUS_1           (REG_BASE_MB + 0x82)
 #define REG_MB_SYS_LED_STATUS_2           (REG_BASE_MB + 0x83)
 #define REG_MB_SYS_LED_STATUS_3           (REG_BASE_MB + 0x84)
+#define REG_MB_POWER_EN                   (REG_BASE_MB + 0x95)
+//EC
+#define REG_EC_SEL                        (REG_BASE_EC + 0x394)
+#define REG_EC_PSU_RST                    (REG_BASE_EC + 0x392)
 
 #define MASK_ALL                          (0xFF)
 
@@ -94,6 +99,9 @@ enum lpc_sysfs_attributes {
     ATT_MB_LED_LNK,
     ATT_MB_LED_PWR0,
     ATT_MB_LED_PWR1,
+    ATT_MB_POWER_EN,
+    //EC
+    ATT_EC_PSU_RESET,
     //BSP
     ATT_BSP_VERSION,
     ATT_BSP_DEBUG,
@@ -477,6 +485,10 @@ static ssize_t read_lpc_callback(struct device *dev,
             mask = 0xF;
             base = BASE_HEX;
             break;
+        case ATT_MB_POWER_EN:
+            reg = REG_MB_POWER_EN;
+            base = BASE_HEX;
+            break;
         //BSP
         case ATT_BSP_REG_VALUE:
             if (kstrtou16(bsp_reg, 0, &reg) < 0)
@@ -511,6 +523,9 @@ static ssize_t write_lpc_callback(struct device *dev,
             reg = REG_MB_SYS_LED_CTRL_1;
             mask = 0xF;
             break;
+        case ATT_MB_POWER_EN:
+            reg = REG_MB_POWER_EN;
+            break;
         default:
             return -EINVAL;
     }
@@ -557,18 +572,18 @@ static ssize_t write_bsp_callback(struct device *dev,
     switch (attr->index) {
         case ATT_BSP_VERSION:
             str = bsp_version;
-            str_len = sizeof(str);
+            str_len = sizeof(bsp_version);
             break;
         case ATT_BSP_DEBUG:
             str = bsp_debug;
-            str_len = sizeof(str);
+            str_len = sizeof(bsp_debug);
             break;
         case ATT_BSP_REG:
             if(kstrtou16(buf, 0, &reg) < 0)
                 return -EINVAL;
 
             str = bsp_reg;
-            str_len = sizeof(str);
+            str_len = sizeof(bsp_reg);
             break;
         default:
             return -EINVAL;
@@ -621,6 +636,41 @@ static ssize_t read_gpio_max_callback(struct device *dev,
     return -1;
 }
 
+/* set psu_reset register value */
+static ssize_t write_ec_psu_reset(struct device *dev,
+        struct device_attribute *da, const char *buf, size_t count)
+{
+    u8 val = 0;
+    u8 reg_val = 0;
+    static int psu_reset_flag = 0;
+
+    if (kstrtou8(buf, 0, &val) < 0)
+        return -EINVAL;
+
+    if (psu_reset_flag == 0) {
+        if (val == 0) {
+            mutex_lock(&lpc_data->access_lock);
+            psu_reset_flag = 1;
+            reg_val = 0x1;
+            outb(reg_val, REG_EC_SEL);
+            BSP_LOG_W("reg=0x%04x, reg_val=0x%02x", REG_EC_SEL, reg_val);
+            reg_val = 0x21;
+            outb(reg_val, REG_EC_PSU_RST);
+            BSP_LOG_W("reg=0x%04x, reg_val=0x%02x", REG_EC_PSU_RST, reg_val);
+            psu_reset_flag = 0;
+            mutex_unlock(&lpc_data->access_lock);
+        } else {
+            return -EINVAL;
+        }
+    } else {
+        printk(KERN_INFO "PSU is resetting... (ignore)\n");
+        mutex_lock(&lpc_data->access_lock);
+        mutex_unlock(&lpc_data->access_lock);
+    }
+
+    return count;
+}
+
 //SENSOR_DEVICE_ATTR - MB
 static SENSOR_DEVICE_ATTR(board_id_0,        S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_ID_0);
 static SENSOR_DEVICE_ATTR(board_id_1,        S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_ID_1);
@@ -644,7 +694,9 @@ static SENSOR_DEVICE_ATTR(led_fan,           S_IRUGO, read_lpc_callback, NULL, A
 static SENSOR_DEVICE_ATTR(led_lnk,           S_IRUGO, read_lpc_callback, NULL, ATT_MB_LED_LNK);
 static SENSOR_DEVICE_ATTR(led_pwr1,          S_IRUGO, read_lpc_callback, NULL, ATT_MB_LED_PWR1);
 static SENSOR_DEVICE_ATTR(led_pwr0,          S_IRUGO, read_lpc_callback, NULL, ATT_MB_LED_PWR0);
-
+static SENSOR_DEVICE_ATTR(power_en,          S_IRUGO | S_IWUSR, read_lpc_callback, write_lpc_callback, ATT_MB_POWER_EN);
+//SENSOR_DEVICE_ATTR - EC
+static SENSOR_DEVICE_ATTR(psu_reset,         S_IRUGO | S_IWUSR, NULL, write_ec_psu_reset, ATT_EC_PSU_RESET);
 //SENSOR_DEVICE_ATTR - BSP
 static SENSOR_DEVICE_ATTR(bsp_version , S_IRUGO | S_IWUSR, read_bsp_callback, write_bsp_callback,       ATT_BSP_VERSION);
 static SENSOR_DEVICE_ATTR(bsp_debug   , S_IRUGO | S_IWUSR, read_bsp_callback, write_bsp_callback,       ATT_BSP_DEBUG);
@@ -659,25 +711,31 @@ static struct attribute *mb_cpld_attrs[] = {
     &sensor_dev_attr_board_id_0.dev_attr.attr,
     &sensor_dev_attr_board_id_1.dev_attr.attr,
     &sensor_dev_attr_mb_cpld_1_version.dev_attr.attr,
-	&sensor_dev_attr_mb_cpld_1_version_h.dev_attr.attr,
-	&sensor_dev_attr_board_sku_id.dev_attr.attr,
-	&sensor_dev_attr_board_hw_id.dev_attr.attr,
-	&sensor_dev_attr_board_id_type.dev_attr.attr,
-	&sensor_dev_attr_board_build_id.dev_attr.attr,
-	&sensor_dev_attr_board_deph_id.dev_attr.attr,
-	&sensor_dev_attr_board_ext_id.dev_attr.attr,
-	&sensor_dev_attr_mux_reset.dev_attr.attr,
-	&sensor_dev_attr_fan_status.dev_attr.attr,
-	&sensor_dev_attr_psu_status.dev_attr.attr,
-	&sensor_dev_attr_port_led_clear.dev_attr.attr,
-	&sensor_dev_attr_led_sys.dev_attr.attr,
-	&sensor_dev_attr_led_id.dev_attr.attr,
-	&sensor_dev_attr_led_poe.dev_attr.attr,
-	&sensor_dev_attr_led_spd.dev_attr.attr,
-	&sensor_dev_attr_led_fan.dev_attr.attr,
-	&sensor_dev_attr_led_lnk.dev_attr.attr,
-	&sensor_dev_attr_led_pwr0.dev_attr.attr,
-	&sensor_dev_attr_led_pwr1.dev_attr.attr,
+    &sensor_dev_attr_mb_cpld_1_version_h.dev_attr.attr,
+    &sensor_dev_attr_board_sku_id.dev_attr.attr,
+    &sensor_dev_attr_board_hw_id.dev_attr.attr,
+    &sensor_dev_attr_board_id_type.dev_attr.attr,
+    &sensor_dev_attr_board_build_id.dev_attr.attr,
+    &sensor_dev_attr_board_deph_id.dev_attr.attr,
+    &sensor_dev_attr_board_ext_id.dev_attr.attr,
+    &sensor_dev_attr_mux_reset.dev_attr.attr,
+    &sensor_dev_attr_fan_status.dev_attr.attr,
+    &sensor_dev_attr_psu_status.dev_attr.attr,
+    &sensor_dev_attr_port_led_clear.dev_attr.attr,
+    &sensor_dev_attr_led_sys.dev_attr.attr,
+    &sensor_dev_attr_led_id.dev_attr.attr,
+    &sensor_dev_attr_led_poe.dev_attr.attr,
+    &sensor_dev_attr_led_spd.dev_attr.attr,
+    &sensor_dev_attr_led_fan.dev_attr.attr,
+    &sensor_dev_attr_led_lnk.dev_attr.attr,
+    &sensor_dev_attr_led_pwr0.dev_attr.attr,
+    &sensor_dev_attr_led_pwr1.dev_attr.attr,
+    &sensor_dev_attr_power_en.dev_attr.attr,
+    NULL,
+};
+
+static struct attribute *ec_attrs[] = {
+    &sensor_dev_attr_psu_reset.dev_attr.attr,
     NULL,
 };
 
@@ -697,6 +755,11 @@ static struct attribute_group mb_cpld_attr_grp = {
     .attrs = mb_cpld_attrs,
 };
 
+static struct attribute_group ec_attr_grp = {
+    .name = "ec",
+    .attrs = ec_attrs,
+};
+
 static struct attribute_group bsp_attr_grp = {
     .name = "bsp",
     .attrs = bsp_attrs,
@@ -717,7 +780,7 @@ static struct platform_device lpc_dev = {
 
 static int lpc_drv_probe(struct platform_device *pdev)
 {
-    int i = 0, grp_num = 2;
+    int i = 0, grp_num = 3;
     int err[5] = {0};
     struct attribute_group *grp;
 
@@ -734,6 +797,9 @@ static int lpc_drv_probe(struct platform_device *pdev)
                 grp = &mb_cpld_attr_grp;
                 break;
             case 1:
+                grp = &ec_attr_grp;
+                break;
+            case 2:
                 grp = &bsp_attr_grp;
                 break;
             default:
@@ -758,6 +824,9 @@ static int lpc_drv_probe(struct platform_device *pdev)
                 grp = &mb_cpld_attr_grp;
                 break;
             case 1:
+                grp = &ec_attr_grp;
+                break;
+            case 2:
                 grp = &bsp_attr_grp;
                 break;
             default:
@@ -779,6 +848,7 @@ static int lpc_drv_probe(struct platform_device *pdev)
 static int lpc_drv_remove(struct platform_device *pdev)
 {
     sysfs_remove_group(&pdev->dev.kobj, &mb_cpld_attr_grp);
+    sysfs_remove_group(&pdev->dev.kobj, &ec_attr_grp);
     sysfs_remove_group(&pdev->dev.kobj, &bsp_attr_grp);
 
     return 0;
@@ -798,18 +868,18 @@ int lpc_init(void)
 
     err = platform_driver_register(&lpc_drv);
     if(err) {
-    	printk(KERN_ERR "%s(#%d): platform_driver_register failed(%d)\n",
+        printk(KERN_ERR "%s(#%d): platform_driver_register failed(%d)\n",
                 __func__, __LINE__, err);
 
-    	return err;
+        return err;
     }
 
     err = platform_device_register(&lpc_dev);
     if(err) {
-    	printk(KERN_ERR "%s(#%d): platform_device_register failed(%d)\n",
+        printk(KERN_ERR "%s(#%d): platform_device_register failed(%d)\n",
                 __func__, __LINE__, err);
-    	platform_driver_unregister(&lpc_drv);
-    	return err;
+        platform_driver_unregister(&lpc_drv);
+        return err;
     }
 
     return err;
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/modules/x86-64-ufispace-s6301-56st-sys-eeprom.c b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/modules/x86-64-ufispace-s6301-56st-sys-eeprom.c
index 5c6dec193..f1d0bbc45 100644
--- a/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/modules/x86-64-ufispace-s6301-56st-sys-eeprom.c
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/modules/x86-64-ufispace-s6301-56st-sys-eeprom.c
@@ -27,6 +27,9 @@
 #include <linux/jiffies.h>
 #include <linux/i2c.h>
 #include <linux/mutex.h>
+#include <linux/version.h>
+
+#define _memset(s, c, n) memset(s, c, n)
 
 /* Addresses to scan */
 static const unsigned short normal_i2c[] = { /*0x50, 0x51, 0x52, 0x53, 0x54,
@@ -220,7 +223,7 @@ static int sys_eeprom_probe(struct i2c_client *client,
 #ifdef __STDC_LIB_EXT1__
     memset_s(data->data, EEPROM_SIZE, 0xff, EEPROM_SIZE);
 #else
-    memset(data->data, 0xff, EEPROM_SIZE);
+    _memset(data->data, 0xff, EEPROM_SIZE);
 #endif
 
     i2c_set_clientdata(client, data);
@@ -240,12 +243,19 @@ static int sys_eeprom_probe(struct i2c_client *client,
     return err;
 }
 
-static int sys_eeprom_remove(struct i2c_client *client)
+#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0)
+static int
+#else
+static void
+#endif
+sys_eeprom_remove(struct i2c_client *client)
 {
     sysfs_remove_bin_file(&client->dev.kobj, &sys_eeprom_attr);
     kfree(i2c_get_clientdata(client));
 
+#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0)
     return 0;
+#endif
 }
 
 static const struct i2c_device_id sys_eeprom_id[] = {
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/chassis.py b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/chassis.py
index ab3e44f74..585ecdbe1 100644
--- a/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/chassis.py
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/chassis.py
@@ -39,7 +39,7 @@ def get_name(self):
         Returns:
             string: The name of the chassis
         """
-        return device_info.get_platform()
+        return self._eeprom.platform_name_str()
 
     def initizalize_system_led(self):
         return True
@@ -175,26 +175,7 @@ def get_sfp(self, index):
         except IndexError:
             sys.stderr.write("SFP index {} out of range (1-{})\n".format(
                              index, len(self._sfp_list)))
-        return sfp
-
-    def set_system_led(self, led_device_name, color):
-        """
-        Sets the color of an System LED device
-        Args:
-           led_device_name: a pre-defined LED device name list used in pddf-device.json.
-           color: A string representing the color with which to set a LED
-        Returns:
-           bool: True if the LED state is set successfully, False if not
-        """
-
-        if led_device_name in self.plugin_data['LED']['capability']['rw']:
-            result, msg  = self.pddf_obj.set_system_led_color(led_device_name, color)
-            if not result and msg:
-                print(msg)
-            return (result)
-        else:
-            print("Not Support")
-            return False            
+        return sfp        
 
     def get_reboot_cause(self):
         """
@@ -217,4 +198,15 @@ def get_reboot_cause(self):
         except IOError:
             sw_reboot_cause = "Unknown"
 
-        return ('REBOOT_CAUSE_NON_HARDWARE', sw_reboot_cause)
\ No newline at end of file
+        return ('REBOOT_CAUSE_NON_HARDWARE', sw_reboot_cause)
+
+    def get_serial_number(self):
+        """
+        Retrieves the hardware serial number for the chassis
+
+        Returns:
+            A string containing the hardware serial number for this
+            chassis.
+        """
+
+        return self.get_serial()
\ No newline at end of file
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/fan.py b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/fan.py
index 2eadfd0a4..6685e8c89 100644
--- a/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/fan.py
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/fan.py
@@ -19,6 +19,25 @@ def __init__(self, tray_idx, fan_idx=0, pddf_data=None, pddf_plugin_data=None, i
     # Provide the functions/variables below for which implementation is to be overwritten
     # Since psu_fan airflow direction cant be read from sysfs, it is fixed as 'F2B' or 'intake'
 
+    def get_max_speed(self):
+        """
+        Retrieves the max speed
+
+        Returns:
+            An Integer, the max speed
+        """
+        if self.is_psu_fan:
+            psu_fru = PsuFru(self.fans_psu_index)
+            max_speed = int(self.plugin_data['PSU']['valmap']['PSU_FAN_MAX_SPEED'])
+            for dev in self.plugin_data['PSU']['psu_support_list']:
+                if dev['Manufacturer'] == psu_fru.mfr_id and dev['Name'] == psu_fru.model:
+                    max_speed = int(self.plugin_data['PSU']['valmap'][dev['MaxSpd']])
+                    break           
+        else:
+            max_speed = int(self.plugin_data['FAN']['FAN_MAX_SPEED'])
+
+        return max_speed
+
     def get_speed(self):
         """
         Retrieves the speed of fan as a percentage of full speed
@@ -28,15 +47,12 @@ def get_speed(self):
                  to 100 (full speed)
         """
         speed_percentage = 0
-        if self.is_psu_fan:
-            max_speed = int(self.plugin_data['PSU']['PSU_FAN_MAX_SPEED'])
-        else:
-            max_speed = int(self.plugin_data['FAN']['FAN_MAX_SPEED'])
 
+        max_speed = self.get_max_speed()
         speed = int(self.get_speed_rpm())
 
-
         speed_percentage = round((speed*100)/max_speed)
+        
         return min(speed_percentage, 100)
 
     def get_speed_rpm(self):
@@ -63,7 +79,7 @@ def get_speed_rpm(self):
             ucd_path = "/sys/bus/i2c/devices/5-0034/hwmon/"
             if os.path.exists(ucd_path):
                 hwmon_dir = os.listdir(ucd_path)
-                with open("{}/{}/temp{}_input".format(ucd_path, hwmon_dir[0], self.fantray_index), "rb") as f:
+                with open("{}/{}/fan{}_input".format(ucd_path, hwmon_dir[0], self.fantray_index), "rb") as f:
                     rpm_speed = int(f.read().strip())
 
         return rpm_speed
@@ -81,7 +97,7 @@ def get_direction(self):
             if psu_fru.mfr_id == "not available":
                 return direction
             for dev in self.plugin_data['PSU']['psu_support_list']:
-                if dev['Mfr_id'] == psu_fru.mfr_id and dev['Model'] == psu_fru.model:
+                if dev['Manufacturer'] == psu_fru.mfr_id and dev['Name'] == psu_fru.model:
                     dir = dev['Dir']
                     break
         else:
@@ -98,34 +114,6 @@ def get_direction(self):
 
         return dir
 
-    def get_presence(self):
-        """
-        Retrieves the presence of the device
-        Returns:
-            bool: True if device is present, False if not
-        """
-        presence = False
-        if self.is_psu_fan:
-            attr = "psu_present"
-            device = "PSU{}".format(self.fans_psu_index)
-        else:
-            attr = "fan{}_present".format(self.fantray_index)
-            device = "FAN-CTRL"
-
-        output = self.pddf_obj.get_attr_name_output(device, attr)
-        if not output:
-            return presence
-
-
-        mode = output['mode']
-        val = output['status'].strip()
-        vmap = self.plugin_data['FAN']['present'][mode]['valmap']
-
-        if val in vmap:
-            presence = vmap[val]
-
-        return presence
-
     def get_target_speed(self):
         """
         Retrieves the target (expected) speed of the fan
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/psu.py b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/psu.py
index 008aa600c..fff8de4aa 100644
--- a/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/psu.py
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/psu.py
@@ -10,23 +10,12 @@
 
 class Psu(PddfPsu):
     """PDDF Platform-Specific PSU class"""
-    
-    PLATFORM_PSU_CAPACITY = 750
 
     def __init__(self, index, pddf_data=None, pddf_plugin_data=None):
         PddfPsu.__init__(self, index, pddf_data, pddf_plugin_data)
         self.psu_fru = PsuFru(self.psu_index)
                
     # Provide the functions/variables below for which implementation is to be overwritten
-    def get_maximum_supplied_power(self):
-        """
-        Retrieves the maximum supplied power by PSU (or PSU capacity)
-        Returns:
-            A float number, the maximum power output in Watts.
-            e.g. 1200.1
-        """
-        return float(self.PLATFORM_PSU_CAPACITY)
-
     def get_power(self):
         """
         Retrieves current energy supplied by PSU
@@ -65,3 +54,34 @@ def get_serial(self):
             string: Serial number of device
         """
         return self.psu_fru.serial.rstrip()
+
+    def get_capacity(self):
+        """
+        Retrieves the maximum supplied power by PSU (or PSU capacity)
+        Returns:
+            A float number, the maximum power output in Watts.
+            e.g. 1200.1
+        """
+        return self.get_maximum_supplied_power()
+
+    def get_type(self):
+        """
+        Gets the type of the PSU
+
+        Returns:
+            A string, the type of PSU (AC/DC)
+        """
+        mfr = self.get_mfr_id()
+        model = self.get_model()
+        ptype = self.plugin_data['PSU']['valmap']['DEFAULT_TYPE']
+
+        if mfr and model :
+            for dev in self.plugin_data['PSU']['psu_support_list']:
+                if dev['Manufacturer'] == mfr and dev['Name'] == model:
+                    ptype = dev['Type']
+                    break
+
+
+        return ptype
+
+
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/utils/pddf_pre_driver_install.sh b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/utils/pddf_pre_driver_install.sh
deleted file mode 100755
index 187943061..000000000
--- a/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/utils/pddf_pre_driver_install.sh
+++ /dev/null
@@ -1,11 +0,0 @@
-#!/bin/bash
-#rmmod gpio_ich
-if [ ! -f /tmp/._pddf_pre_driver_init_completion ]; then
-    # make sure igb/i40e init in correct order
-    rmmod i2c-i801
-    rmmod i2c_ismt
-    modprobe -r i2c-i801
-    modprobe -r i2c_ismt
-    date > /tmp/._pddf_pre_driver_init_completion
-fi
-echo "PDDF driver pre-install completed"
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/modules/pddf_custom_sysstatus_module.c b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/modules/pddf_custom_sysstatus_module.c
index b50bb4280..d68f85670 100644
--- a/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/modules/pddf_custom_sysstatus_module.c
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/modules/pddf_custom_sysstatus_module.c
@@ -1,6 +1,6 @@
 /*
  * Copyright 2019 Broadcom.
- * The term ��Broadcom�� refers to Broadcom Inc. and/or its subsidiaries.
+ * The term "Broadcom" refers to Broadcom Inc. and/or its subsidiaries.
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
@@ -33,6 +33,7 @@
 #include "../../../../pddf/i2c/modules/include/pddf_client_defs.h"
 #include "../../../../pddf/i2c/modules/include/pddf_sysstatus_defs.h"
 
+#define _memset(s, c, n) memset(s, c, n)
 
 SYSSTATUS_DATA sysstatus_data = {0};
 
@@ -142,8 +143,9 @@ ssize_t show_sysstatus_data(struct device *dev, struct device_attribute *da, cha
 
     if (sysstatus_addr_attrs==NULL )
     {
-        printk(KERN_DEBUG "%s is not supported attribute for this client\n",data->sysstatus_addr_attrs[i].aname);
+        printk(KERN_DEBUG "%s is not supported attribute for this client\n",attr->dev_attr.attr.name);
         status = 0;
+        return sprintf(buf, "0x%x\n", status);
     }
     else
     {
@@ -173,7 +175,7 @@ ssize_t store_sysstatus_data(struct device *dev, struct device_attribute *da, co
 
     if (sysstatus_addr_attrs==NULL)
     {
-        printk(KERN_DEBUG "%s is not supported attribute for this client\n",data->sysstatus_addr_attrs[i].aname);
+        printk(KERN_DEBUG "%s is not supported attribute for this client\n",attr->dev_attr.attr.name);
         return -EINVAL;
     }
     else
@@ -207,7 +209,7 @@ static ssize_t do_attr_operation(struct device *dev, struct device_attribute *da
 #ifdef __STDC_LIB_EXT1__
     memset_s(&pdata->sysstatus_addr_attr, sizeof(pdata->sysstatus_addr_attr, 0, sizeof(pdata->sysstatus_addr_attr));
 #else
-    memset(&pdata->sysstatus_addr_attr, 0, sizeof(pdata->sysstatus_addr_attr));
+    _memset(&pdata->sysstatus_addr_attr, 0, sizeof(pdata->sysstatus_addr_attr));
 #endif
 
     return count;
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/modules/x86-64-ufispace-s7801-54xs-cpld.c b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/modules/x86-64-ufispace-s7801-54xs-cpld.c
index 0cefcb8aa..28dfdce93 100644
--- a/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/modules/x86-64-ufispace-s7801-54xs-cpld.c
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/modules/x86-64-ufispace-s7801-54xs-cpld.c
@@ -31,6 +31,7 @@
 #include <linux/err.h>
 #include <linux/mutex.h>
 #include <linux/delay.h>
+#include <linux/version.h>
 #include "x86-64-ufispace-s7801-54xs-cpld.h"
 
 #ifdef DEBUG
@@ -1050,7 +1051,7 @@ static ssize_t write_bsp_callback(struct device *dev,
     switch (attr->index) {
         case BSP_DEBUG:
             str = bsp_debug;
-            str_len = sizeof(str);
+            str_len = sizeof(bsp_debug);
             ret = write_bsp(buf, str, str_len, count);
 
             if (kstrtou8(buf, 0, &bsp_debug_u8) < 0) {
@@ -1332,7 +1333,12 @@ static int cpld_probe(struct i2c_client *client,
 }
 
 /* cpld drvier remove */
-static int cpld_remove(struct i2c_client *client)
+#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0)
+static int
+#else
+static void
+#endif
+cpld_remove(struct i2c_client *client)
 {
     struct cpld_data *data = i2c_get_clientdata(client);
 
@@ -1346,7 +1352,9 @@ static int cpld_remove(struct i2c_client *client)
     }
 
     cpld_remove_client(client);
+#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0)
     return 0;
+#endif
 }
 
 static int s7801_54xs_cpld_read_internal(struct i2c_client *client, u8 reg)
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/modules/x86-64-ufispace-s7801-54xs-sys-eeprom.c b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/modules/x86-64-ufispace-s7801-54xs-sys-eeprom.c
index f9f7728de..f2f27cb0a 100644
--- a/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/modules/x86-64-ufispace-s7801-54xs-sys-eeprom.c
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/modules/x86-64-ufispace-s7801-54xs-sys-eeprom.c
@@ -27,6 +27,9 @@
 #include <linux/jiffies.h>
 #include <linux/i2c.h>
 #include <linux/mutex.h>
+#include <linux/version.h>
+
+#define _memset(s, c, n) memset(s, c, n)
 
 /* Addresses to scan */
 static const unsigned short normal_i2c[] = { /*0x50, 0x51, 0x52, 0x53, 0x54,
@@ -220,7 +223,7 @@ static int sys_eeprom_probe(struct i2c_client *client,
 #ifdef __STDC_LIB_EXT1__
     memset_s(data->data, EEPROM_SIZE, 0xff, EEPROM_SIZE);
 #else
-    memset(data->data, 0xff, EEPROM_SIZE);
+    _memset(data->data, 0xff, EEPROM_SIZE);
 #endif
     i2c_set_clientdata(client, data);
     mutex_init(&data->update_lock);
@@ -239,12 +242,19 @@ static int sys_eeprom_probe(struct i2c_client *client,
     return err;
 }
 
-static int sys_eeprom_remove(struct i2c_client *client)
+#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0)
+static int
+#else
+static void
+#endif
+sys_eeprom_remove(struct i2c_client *client)
 {
     sysfs_remove_bin_file(&client->dev.kobj, &sys_eeprom_attr);
     kfree(i2c_get_clientdata(client));
 
+#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0)
     return 0;
+#endif
 }
 
 static const struct i2c_device_id sys_eeprom_id[] = {
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/sonic_platform/chassis.py b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/sonic_platform/chassis.py
index 085f2af2f..0b02f9a83 100644
--- a/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/sonic_platform/chassis.py
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/sonic_platform/chassis.py
@@ -191,3 +191,14 @@ def get_reboot_cause(self):
             sw_reboot_cause = "Unknown"
 
         return ('REBOOT_CAUSE_NON_HARDWARE', sw_reboot_cause)
+
+    def get_serial_number(self):
+        """
+        Retrieves the hardware serial number for the chassis
+
+        Returns:
+            A string containing the hardware serial number for this
+            chassis.
+        """
+
+        return self.get_serial()
\ No newline at end of file
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/sonic_platform/component.py b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/sonic_platform/component.py
index 1c583079f..d5d8d8226 100644
--- a/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/sonic_platform/component.py
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/sonic_platform/component.py
@@ -18,9 +18,7 @@
 }
 
 BMC_CMDS = {
-    "VER1": "ipmitool mc info | grep 'Firmware Revision' | cut -d':' -f2 | cut -d'.' -f1",
-    "VER2": "ipmitool mc info | grep 'Firmware Revision' | cut -d':' -f2 | cut -d'.' -f2",
-    "VER3": "echo $((`ipmitool mc info | grep 'Aux Firmware Rev Info' -A 2 | sed -n '2p'` + 0))",
+    "BMC": "bash -c 'tmp=$(ipmitool raw 0x6 0x1) && r=($(echo \"$tmp\" | cut -d \" \" -f 4,5,16,15,14)) && echo ${r[0]}.${r[1]}.${r[4]}.${r[3]}${r[2]}'",
 }
 
 BIOS_VERSION_PATH = "/sys/class/dmi/id/bios_version"
@@ -69,17 +67,11 @@ def _get_cpld_version(self):
 
     def _get_bmc_version(self):
         # Retrieves the BMC firmware version
-        bmc_ver = dict()
-        for ver in BMC_CMDS:
-            status, value = subprocess.getstatusoutput(BMC_CMDS[ver])
-            if not status:
-                bmc_ver[ver] = int(value.rstrip())
-            else:
-                return None
-
-        bmc_version = "{}.{}.{}".format(bmc_ver["VER1"], bmc_ver["VER2"], bmc_ver["VER3"])
-
-        return bmc_version
+        status, value = subprocess.getstatusoutput(BMC_CMDS["BMC"])
+        if not status:
+            return value
+        else:
+            return None
 
     def get_name(self):
         """
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/sonic_platform/psu.py b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/sonic_platform/psu.py
index 38b32412d..cae583254 100644
--- a/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/sonic_platform/psu.py
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/sonic_platform/psu.py
@@ -36,3 +36,32 @@ def get_power(self):
 
         # power is returned in micro watts
         return round(float(self.get_voltage()*self.get_current()), 2)
+
+    def get_capacity(self):
+        """
+        Retrieves the maximum supplied power by PSU (or PSU capacity)
+        Returns:
+            A float number, the maximum power output in Watts.
+            e.g. 1200.1
+        """
+        return self.get_maximum_supplied_power()
+
+    def get_type(self):
+        """
+        Gets the type of the PSU
+
+        Returns:
+            A string, the type of PSU (AC/DC)
+        """
+        mfr = self.get_mfr_id()
+        model = self.get_model()
+        ptype = self.plugin_data['PSU']['valmap']['DEFAULT_TYPE']
+
+        if mfr and model :
+            for dev in self.plugin_data['PSU']['psu_support_list']:
+                if dev['Manufacturer'] == mfr and dev['Name'] == model:
+                    ptype = dev['Type']
+                    break
+
+
+        return ptype
\ No newline at end of file
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/utils/pddf_post_device_create.sh b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/utils/pddf_post_device_create.sh
index 4a55252ea..c6fe10aba 100755
--- a/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/utils/pddf_post_device_create.sh
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/utils/pddf_post_device_create.sh
@@ -6,7 +6,7 @@ timeout 3 ipmitool mc watchdog off
 
 pddf_ledutil setstatusled SYNC_LED off
 pddf_ledutil setstatusled SYS_LED off
-pddf_ledutil setstatusled ID_LED off
+pddf_ledutil setstatusled LOC_LED off
 
 #set status led to green to indicate platform init done
 curr_led=$(pddf_ledutil getstatusled SYS_LED)
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/utils/pddf_pre_driver_install.sh b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/utils/pddf_pre_driver_install.sh
deleted file mode 100755
index 9ada6c235..000000000
--- a/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/utils/pddf_pre_driver_install.sh
+++ /dev/null
@@ -1,8 +0,0 @@
-#!/bin/bash
-#rmmod gpio_ich
-if [ ! -f /tmp/._pddf_pre_driver_init_completion ]; then
-    rmmod i2c_i801
-    rmmod i2c_ismt
-    date > /tmp/._pddf_pre_driver_init_completion
-fi
-echo "PDDF driver pre-install completed"
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/utils/pre_pddf_init.sh b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/utils/pre_pddf_init.sh
deleted file mode 100755
index 63a2e2058..000000000
--- a/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/utils/pre_pddf_init.sh
+++ /dev/null
@@ -1,5 +0,0 @@
-#!/bin/bash
-#rmmod gpio_ich
-modprobe -rq i2c_i801
-modprobe -rq i2c_smbus
-echo "Pre PDDF init steps completed successully"
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/modules/pddf_custom_sysstatus_module.c b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/modules/pddf_custom_sysstatus_module.c
index b50bb4280..d68f85670 100644
--- a/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/modules/pddf_custom_sysstatus_module.c
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/modules/pddf_custom_sysstatus_module.c
@@ -1,6 +1,6 @@
 /*
  * Copyright 2019 Broadcom.
- * The term ��Broadcom�� refers to Broadcom Inc. and/or its subsidiaries.
+ * The term "Broadcom" refers to Broadcom Inc. and/or its subsidiaries.
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
@@ -33,6 +33,7 @@
 #include "../../../../pddf/i2c/modules/include/pddf_client_defs.h"
 #include "../../../../pddf/i2c/modules/include/pddf_sysstatus_defs.h"
 
+#define _memset(s, c, n) memset(s, c, n)
 
 SYSSTATUS_DATA sysstatus_data = {0};
 
@@ -142,8 +143,9 @@ ssize_t show_sysstatus_data(struct device *dev, struct device_attribute *da, cha
 
     if (sysstatus_addr_attrs==NULL )
     {
-        printk(KERN_DEBUG "%s is not supported attribute for this client\n",data->sysstatus_addr_attrs[i].aname);
+        printk(KERN_DEBUG "%s is not supported attribute for this client\n",attr->dev_attr.attr.name);
         status = 0;
+        return sprintf(buf, "0x%x\n", status);
     }
     else
     {
@@ -173,7 +175,7 @@ ssize_t store_sysstatus_data(struct device *dev, struct device_attribute *da, co
 
     if (sysstatus_addr_attrs==NULL)
     {
-        printk(KERN_DEBUG "%s is not supported attribute for this client\n",data->sysstatus_addr_attrs[i].aname);
+        printk(KERN_DEBUG "%s is not supported attribute for this client\n",attr->dev_attr.attr.name);
         return -EINVAL;
     }
     else
@@ -207,7 +209,7 @@ static ssize_t do_attr_operation(struct device *dev, struct device_attribute *da
 #ifdef __STDC_LIB_EXT1__
     memset_s(&pdata->sysstatus_addr_attr, sizeof(pdata->sysstatus_addr_attr, 0, sizeof(pdata->sysstatus_addr_attr));
 #else
-    memset(&pdata->sysstatus_addr_attr, 0, sizeof(pdata->sysstatus_addr_attr));
+    _memset(&pdata->sysstatus_addr_attr, 0, sizeof(pdata->sysstatus_addr_attr));
 #endif
 
     return count;
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/modules/x86-64-ufispace-s8901-54xc-cpld.c b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/modules/x86-64-ufispace-s8901-54xc-cpld.c
index 63eec91d4..cff824efd 100644
--- a/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/modules/x86-64-ufispace-s8901-54xc-cpld.c
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/modules/x86-64-ufispace-s8901-54xc-cpld.c
@@ -31,6 +31,7 @@
 #include <linux/err.h>
 #include <linux/mutex.h>
 #include <linux/delay.h>
+#include <linux/version.h>
 #include "x86-64-ufispace-s8901-54xc-cpld.h"
 
 #ifdef DEBUG
@@ -1050,7 +1051,7 @@ static ssize_t write_bsp_callback(struct device *dev,
     switch (attr->index) {
         case BSP_DEBUG:
             str = bsp_debug;
-            str_len = sizeof(str);
+            str_len = sizeof(bsp_debug);
             ret = write_bsp(buf, str, str_len, count);
 
             if (kstrtou8(buf, 0, &bsp_debug_u8) < 0) {
@@ -1332,7 +1333,12 @@ static int cpld_probe(struct i2c_client *client,
 }
 
 /* cpld drvier remove */
-static int cpld_remove(struct i2c_client *client)
+#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0)
+static int
+#else
+static void
+#endif
+cpld_remove(struct i2c_client *client)
 {
     struct cpld_data *data = i2c_get_clientdata(client);
 
@@ -1346,7 +1352,9 @@ static int cpld_remove(struct i2c_client *client)
     }
 
     cpld_remove_client(client);
+#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0)
     return 0;
+#endif
 }
 
 static int s8901_54xc_cpld_read_internal(struct i2c_client *client, u8 reg)
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/modules/x86-64-ufispace-s8901-54xc-sys-eeprom.c b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/modules/x86-64-ufispace-s8901-54xc-sys-eeprom.c
index f9f7728de..f2f27cb0a 100644
--- a/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/modules/x86-64-ufispace-s8901-54xc-sys-eeprom.c
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/modules/x86-64-ufispace-s8901-54xc-sys-eeprom.c
@@ -27,6 +27,9 @@
 #include <linux/jiffies.h>
 #include <linux/i2c.h>
 #include <linux/mutex.h>
+#include <linux/version.h>
+
+#define _memset(s, c, n) memset(s, c, n)
 
 /* Addresses to scan */
 static const unsigned short normal_i2c[] = { /*0x50, 0x51, 0x52, 0x53, 0x54,
@@ -220,7 +223,7 @@ static int sys_eeprom_probe(struct i2c_client *client,
 #ifdef __STDC_LIB_EXT1__
     memset_s(data->data, EEPROM_SIZE, 0xff, EEPROM_SIZE);
 #else
-    memset(data->data, 0xff, EEPROM_SIZE);
+    _memset(data->data, 0xff, EEPROM_SIZE);
 #endif
     i2c_set_clientdata(client, data);
     mutex_init(&data->update_lock);
@@ -239,12 +242,19 @@ static int sys_eeprom_probe(struct i2c_client *client,
     return err;
 }
 
-static int sys_eeprom_remove(struct i2c_client *client)
+#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0)
+static int
+#else
+static void
+#endif
+sys_eeprom_remove(struct i2c_client *client)
 {
     sysfs_remove_bin_file(&client->dev.kobj, &sys_eeprom_attr);
     kfree(i2c_get_clientdata(client));
 
+#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0)
     return 0;
+#endif
 }
 
 static const struct i2c_device_id sys_eeprom_id[] = {
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/sonic_platform/chassis.py b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/sonic_platform/chassis.py
index 085f2af2f..0b02f9a83 100644
--- a/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/sonic_platform/chassis.py
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/sonic_platform/chassis.py
@@ -191,3 +191,14 @@ def get_reboot_cause(self):
             sw_reboot_cause = "Unknown"
 
         return ('REBOOT_CAUSE_NON_HARDWARE', sw_reboot_cause)
+
+    def get_serial_number(self):
+        """
+        Retrieves the hardware serial number for the chassis
+
+        Returns:
+            A string containing the hardware serial number for this
+            chassis.
+        """
+
+        return self.get_serial()
\ No newline at end of file
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/sonic_platform/component.py b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/sonic_platform/component.py
index 1c583079f..d5d8d8226 100644
--- a/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/sonic_platform/component.py
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/sonic_platform/component.py
@@ -18,9 +18,7 @@
 }
 
 BMC_CMDS = {
-    "VER1": "ipmitool mc info | grep 'Firmware Revision' | cut -d':' -f2 | cut -d'.' -f1",
-    "VER2": "ipmitool mc info | grep 'Firmware Revision' | cut -d':' -f2 | cut -d'.' -f2",
-    "VER3": "echo $((`ipmitool mc info | grep 'Aux Firmware Rev Info' -A 2 | sed -n '2p'` + 0))",
+    "BMC": "bash -c 'tmp=$(ipmitool raw 0x6 0x1) && r=($(echo \"$tmp\" | cut -d \" \" -f 4,5,16,15,14)) && echo ${r[0]}.${r[1]}.${r[4]}.${r[3]}${r[2]}'",
 }
 
 BIOS_VERSION_PATH = "/sys/class/dmi/id/bios_version"
@@ -69,17 +67,11 @@ def _get_cpld_version(self):
 
     def _get_bmc_version(self):
         # Retrieves the BMC firmware version
-        bmc_ver = dict()
-        for ver in BMC_CMDS:
-            status, value = subprocess.getstatusoutput(BMC_CMDS[ver])
-            if not status:
-                bmc_ver[ver] = int(value.rstrip())
-            else:
-                return None
-
-        bmc_version = "{}.{}.{}".format(bmc_ver["VER1"], bmc_ver["VER2"], bmc_ver["VER3"])
-
-        return bmc_version
+        status, value = subprocess.getstatusoutput(BMC_CMDS["BMC"])
+        if not status:
+            return value
+        else:
+            return None
 
     def get_name(self):
         """
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/sonic_platform/psu.py b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/sonic_platform/psu.py
index 38b32412d..cae583254 100644
--- a/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/sonic_platform/psu.py
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/sonic_platform/psu.py
@@ -36,3 +36,32 @@ def get_power(self):
 
         # power is returned in micro watts
         return round(float(self.get_voltage()*self.get_current()), 2)
+
+    def get_capacity(self):
+        """
+        Retrieves the maximum supplied power by PSU (or PSU capacity)
+        Returns:
+            A float number, the maximum power output in Watts.
+            e.g. 1200.1
+        """
+        return self.get_maximum_supplied_power()
+
+    def get_type(self):
+        """
+        Gets the type of the PSU
+
+        Returns:
+            A string, the type of PSU (AC/DC)
+        """
+        mfr = self.get_mfr_id()
+        model = self.get_model()
+        ptype = self.plugin_data['PSU']['valmap']['DEFAULT_TYPE']
+
+        if mfr and model :
+            for dev in self.plugin_data['PSU']['psu_support_list']:
+                if dev['Manufacturer'] == mfr and dev['Name'] == model:
+                    ptype = dev['Type']
+                    break
+
+
+        return ptype
\ No newline at end of file
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/utils/pddf_post_device_create.sh b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/utils/pddf_post_device_create.sh
index 4a55252ea..c6fe10aba 100755
--- a/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/utils/pddf_post_device_create.sh
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/utils/pddf_post_device_create.sh
@@ -6,7 +6,7 @@ timeout 3 ipmitool mc watchdog off
 
 pddf_ledutil setstatusled SYNC_LED off
 pddf_ledutil setstatusled SYS_LED off
-pddf_ledutil setstatusled ID_LED off
+pddf_ledutil setstatusled LOC_LED off
 
 #set status led to green to indicate platform init done
 curr_led=$(pddf_ledutil getstatusled SYS_LED)
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/utils/pddf_pre_driver_install.sh b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/utils/pddf_pre_driver_install.sh
deleted file mode 100755
index 9ada6c235..000000000
--- a/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/utils/pddf_pre_driver_install.sh
+++ /dev/null
@@ -1,8 +0,0 @@
-#!/bin/bash
-#rmmod gpio_ich
-if [ ! -f /tmp/._pddf_pre_driver_init_completion ]; then
-    rmmod i2c_i801
-    rmmod i2c_ismt
-    date > /tmp/._pddf_pre_driver_init_completion
-fi
-echo "PDDF driver pre-install completed"
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/utils/pre_pddf_init.sh b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/utils/pre_pddf_init.sh
deleted file mode 100755
index 63a2e2058..000000000
--- a/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/utils/pre_pddf_init.sh
+++ /dev/null
@@ -1,5 +0,0 @@
-#!/bin/bash
-#rmmod gpio_ich
-modprobe -rq i2c_i801
-modprobe -rq i2c_smbus
-echo "Pre PDDF init steps completed successully"
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/modules/pddf_custom_sysstatus_module.c b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/modules/pddf_custom_sysstatus_module.c
index 35a032f42..ace5c9d8c 100644
--- a/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/modules/pddf_custom_sysstatus_module.c
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/modules/pddf_custom_sysstatus_module.c
@@ -1,6 +1,6 @@
 /*
  * Copyright 2019 Broadcom.
- * The term ��Broadcom�� refers to Broadcom Inc. and/or its subsidiaries.
+ * The term "Broadcom" refers to Broadcom Inc. and/or its subsidiaries.
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
@@ -33,6 +33,7 @@
 #include "../../../../pddf/i2c/modules/include/pddf_client_defs.h"
 #include "../../../../pddf/i2c/modules/include/pddf_sysstatus_defs.h"
 
+#define _memset(s, c, n) memset(s, c, n)
 
 SYSSTATUS_DATA sysstatus_data = {0};
 
@@ -140,8 +141,9 @@ ssize_t show_sysstatus_data(struct device *dev, struct device_attribute *da, cha
 
     if (sysstatus_addr_attrs==NULL )
     {
-        printk(KERN_DEBUG "%s is not supported attribute for this client\n",data->sysstatus_addr_attrs[i].aname);
+        printk(KERN_DEBUG "%s is not supported attribute for this client\n",attr->dev_attr.attr.name);
         status = 0;
+        return sprintf(buf, "0x%x\n", status);
     }
     else
     {
@@ -171,7 +173,7 @@ ssize_t store_sysstatus_data(struct device *dev, struct device_attribute *da, co
 
     if (sysstatus_addr_attrs==NULL)
     {
-        printk(KERN_DEBUG "%s is not supported attribute for this client\n",data->sysstatus_addr_attrs[i].aname);
+        printk(KERN_DEBUG "%s is not supported attribute for this client\n",attr->dev_attr.attr.name);
         return -EINVAL;
     }
     else
@@ -205,7 +207,7 @@ static ssize_t do_attr_operation(struct device *dev, struct device_attribute *da
 #ifdef __STDC_LIB_EXT1__
     memset_s(&pdata->sysstatus_addr_attr, sizeof(pdata->sysstatus_addr_attr, 0, sizeof(pdata->sysstatus_addr_attr));
 #else
-    memset(&pdata->sysstatus_addr_attr, 0, sizeof(pdata->sysstatus_addr_attr));
+    _memset(&pdata->sysstatus_addr_attr, 0, sizeof(pdata->sysstatus_addr_attr));
 #endif
 
     return count;
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/modules/x86-64-ufispace-s9110-32x-cpld.c b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/modules/x86-64-ufispace-s9110-32x-cpld.c
index af54108ee..9d0d359ea 100644
--- a/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/modules/x86-64-ufispace-s9110-32x-cpld.c
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/modules/x86-64-ufispace-s9110-32x-cpld.c
@@ -31,6 +31,7 @@
 #include <linux/err.h>
 #include <linux/mutex.h>
 #include <linux/delay.h>
+#include <linux/version.h>
 #include "x86-64-ufispace-s9110-32x-cpld.h"
 
 #if !defined(SENSOR_DEVICE_ATTR_RO)
@@ -863,7 +864,7 @@ static ssize_t bsp_callback_store(struct device *dev,
     switch (attr->index) {
         case BSP_DEBUG:
             str = bsp_debug;
-            str_len = sizeof(str);
+            str_len = sizeof(bsp_debug);
             ret = bsp_write(buf, str, str_len, count);
 
             if (kstrtou8(buf, 0, &bsp_debug_u8) < 0) {
@@ -1272,8 +1273,6 @@ static int cpld_probe(struct i2c_client *client,
     if (INVALID(ret, cpld1, cpld2)) {
         dev_info(&client->dev,
             "cpld id %d(device) not valid\n", ret);
-        //status = -EPERM;
-        //goto exit;
     }
 
     data->index = dev_id->driver_data;
@@ -1317,7 +1316,12 @@ static int cpld_probe(struct i2c_client *client,
 }
 
 /* cpld drvier remove */
-static int cpld_remove(struct i2c_client *client)
+#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0)
+static int
+#else
+static void
+#endif
+cpld_remove(struct i2c_client *client)
 {
     struct cpld_data *data = i2c_get_clientdata(client);
 
@@ -1331,7 +1335,9 @@ static int cpld_remove(struct i2c_client *client)
     }
 
     cpld_remove_client(client);
+#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0)
     return 0;
+#endif
 }
 
 #if 0 /* FIXME */
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/modules/x86-64-ufispace-s9110-32x-sys-eeprom.c b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/modules/x86-64-ufispace-s9110-32x-sys-eeprom.c
index 976ba0505..c0b3ac20f 100644
--- a/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/modules/x86-64-ufispace-s9110-32x-sys-eeprom.c
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/modules/x86-64-ufispace-s9110-32x-sys-eeprom.c
@@ -27,6 +27,9 @@
 #include <linux/jiffies.h>
 #include <linux/i2c.h>
 #include <linux/mutex.h>
+#include <linux/version.h>
+
+#define _memset(s, c, n) memset(s, c, n)
 
 /* Addresses to scan */
 static const unsigned short normal_i2c[] = { /*0x50, 0x51, 0x52, 0x53, 0x54,
@@ -220,7 +223,7 @@ static int sys_eeprom_probe(struct i2c_client *client,
 #ifdef __STDC_LIB_EXT1__
     memset_s(data->data, EEPROM_SIZE, 0xff, EEPROM_SIZE);
 #else
-    memset(data->data, 0xff, EEPROM_SIZE);
+    _memset(data->data, 0xff, EEPROM_SIZE);
 #endif
     i2c_set_clientdata(client, data);
     mutex_init(&data->update_lock);
@@ -239,12 +242,19 @@ static int sys_eeprom_probe(struct i2c_client *client,
     return err;
 }
 
-static int sys_eeprom_remove(struct i2c_client *client)
+#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0)
+static int
+#else
+static void
+#endif
+sys_eeprom_remove(struct i2c_client *client)
 {
     sysfs_remove_bin_file(&client->dev.kobj, &sys_eeprom_attr);
     kfree(i2c_get_clientdata(client));
 
+#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0)
     return 0;
+#endif
 }
 
 static const struct i2c_device_id sys_eeprom_id[] = {
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform/chassis.py b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform/chassis.py
index 530332cf1..78a3d9d41 100644
--- a/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform/chassis.py
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform/chassis.py
@@ -189,3 +189,14 @@ def get_reboot_cause(self):
             sw_reboot_cause = "Unknown"
 
         return ('REBOOT_CAUSE_NON_HARDWARE', sw_reboot_cause)
+
+    def get_serial_number(self):
+        """
+        Retrieves the hardware serial number for the chassis
+
+        Returns:
+            A string containing the hardware serial number for this
+            chassis.
+        """
+
+        return self.get_serial()
\ No newline at end of file
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform/component.py b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform/component.py
index 1c583079f..d5d8d8226 100644
--- a/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform/component.py
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform/component.py
@@ -18,9 +18,7 @@
 }
 
 BMC_CMDS = {
-    "VER1": "ipmitool mc info | grep 'Firmware Revision' | cut -d':' -f2 | cut -d'.' -f1",
-    "VER2": "ipmitool mc info | grep 'Firmware Revision' | cut -d':' -f2 | cut -d'.' -f2",
-    "VER3": "echo $((`ipmitool mc info | grep 'Aux Firmware Rev Info' -A 2 | sed -n '2p'` + 0))",
+    "BMC": "bash -c 'tmp=$(ipmitool raw 0x6 0x1) && r=($(echo \"$tmp\" | cut -d \" \" -f 4,5,16,15,14)) && echo ${r[0]}.${r[1]}.${r[4]}.${r[3]}${r[2]}'",
 }
 
 BIOS_VERSION_PATH = "/sys/class/dmi/id/bios_version"
@@ -69,17 +67,11 @@ def _get_cpld_version(self):
 
     def _get_bmc_version(self):
         # Retrieves the BMC firmware version
-        bmc_ver = dict()
-        for ver in BMC_CMDS:
-            status, value = subprocess.getstatusoutput(BMC_CMDS[ver])
-            if not status:
-                bmc_ver[ver] = int(value.rstrip())
-            else:
-                return None
-
-        bmc_version = "{}.{}.{}".format(bmc_ver["VER1"], bmc_ver["VER2"], bmc_ver["VER3"])
-
-        return bmc_version
+        status, value = subprocess.getstatusoutput(BMC_CMDS["BMC"])
+        if not status:
+            return value
+        else:
+            return None
 
     def get_name(self):
         """
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform/fan.py b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform/fan.py
index c38ebdede..3705fae2b 100644
--- a/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform/fan.py
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform/fan.py
@@ -108,7 +108,6 @@ def get_presence(self):
         if not output:
             return False
 
-
         mode = output['mode']
         presence = output['status'].rstrip()
         vmap = self.plugin_data['FAN']['present'][mode]['valmap']
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform/psu.py b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform/psu.py
index 4f7e84336..091926788 100644
--- a/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform/psu.py
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform/psu.py
@@ -35,4 +35,33 @@ def get_maximum_supplied_power(self):
             A float number, the maximum power output in Watts.
             e.g. 1200.1
         """
-        return float(self.PLATFORM_PSU_CAPACITY)
\ No newline at end of file
+        return float(self.PLATFORM_PSU_CAPACITY)
+
+    def get_capacity(self):
+        """
+        Retrieves the maximum supplied power by PSU (or PSU capacity)
+        Returns:
+            A float number, the maximum power output in Watts.
+            e.g. 1200.1
+        """
+        return self.get_maximum_supplied_power()
+
+    def get_type(self):
+        """
+        Gets the type of the PSU
+
+        Returns:
+            A string, the type of PSU (AC/DC)
+        """
+        mfr = self.get_mfr_id()
+        model = self.get_model()
+        ptype = self.plugin_data['PSU']['valmap']['DEFAULT_TYPE']
+
+        if mfr and model :
+            for dev in self.plugin_data['PSU']['psu_support_list']:
+                if dev['Manufacturer'] == mfr and dev['Name'] == model:
+                    ptype = dev['Type']
+                    break
+
+
+        return ptype
\ No newline at end of file
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/utils/pddf_post_device_create.sh b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/utils/pddf_post_device_create.sh
index 47076d99c..f38d42026 100755
--- a/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/utils/pddf_post_device_create.sh
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/utils/pddf_post_device_create.sh
@@ -5,7 +5,7 @@ echo "Disable BMC watchdog"
 timeout 3 ipmitool mc watchdog off
 
 pddf_ledutil setstatusled SYS_LED off
-pddf_ledutil setstatusled ID_LED off
+pddf_ledutil setstatusled LOC_LED off
 
 curr_led=$(pddf_ledutil getstatusled SYS_LED)
 pddf_ledutil setstatusled SYS_LED green
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/utils/pddf_pre_driver_install.sh b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/utils/pddf_pre_driver_install.sh
deleted file mode 100755
index 187943061..000000000
--- a/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/utils/pddf_pre_driver_install.sh
+++ /dev/null
@@ -1,11 +0,0 @@
-#!/bin/bash
-#rmmod gpio_ich
-if [ ! -f /tmp/._pddf_pre_driver_init_completion ]; then
-    # make sure igb/i40e init in correct order
-    rmmod i2c-i801
-    rmmod i2c_ismt
-    modprobe -r i2c-i801
-    modprobe -r i2c_ismt
-    date > /tmp/._pddf_pre_driver_init_completion
-fi
-echo "PDDF driver pre-install completed"
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/modules/pddf_custom_sysstatus_module.c b/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/modules/pddf_custom_sysstatus_module.c
index 7a0b03a70..b61219c00 100644
--- a/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/modules/pddf_custom_sysstatus_module.c
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/modules/pddf_custom_sysstatus_module.c
@@ -1,6 +1,6 @@
 /*
  * Copyright 2019 Broadcom.
- * The term ��Broadcom�� refers to Broadcom Inc. and/or its subsidiaries.
+ * The term "Broadcom" refers to Broadcom Inc. and/or its subsidiaries.
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
@@ -33,6 +33,7 @@
 #include "../../../../pddf/i2c/modules/include/pddf_client_defs.h"
 #include "../../../../pddf/i2c/modules/include/pddf_sysstatus_defs.h"
 
+#define _memset(s, c, n) memset(s, c, n)
 
 SYSSTATUS_DATA sysstatus_data = {0};
 
@@ -132,7 +133,7 @@ ssize_t show_sysstatus_data(struct device *dev, struct device_attribute *da, cha
 
     if (sysstatus_addr_attrs==NULL )
     {
-        printk(KERN_DEBUG "%s is not supported attribute for this client\n",data->sysstatus_addr_attrs[i].aname);
+        printk(KERN_DEBUG "%s is not supported attribute for this client\n",attr->dev_attr.attr.name);
         status = 0;
     }
     else
@@ -163,7 +164,7 @@ ssize_t store_sysstatus_data(struct device *dev, struct device_attribute *da, co
 
     if (sysstatus_addr_attrs==NULL)
     {
-        printk(KERN_DEBUG "%s is not supported attribute for this client\n",data->sysstatus_addr_attrs[i].aname);
+        printk(KERN_DEBUG "%s is not supported attribute for this client\n",attr->dev_attr.attr.name);
         return -EINVAL;
     }
     else
@@ -196,7 +197,7 @@ static ssize_t do_attr_operation(struct device *dev, struct device_attribute *da
 #ifdef __STDC_LIB_EXT1__
     memset_s(&pdata->sysstatus_addr_attr, sizeof(pdata->sysstatus_addr_attr), 0, sizeof(pdata->sysstatus_addr_attr));
 #else
-    memset(&pdata->sysstatus_addr_attr, 0, sizeof(pdata->sysstatus_addr_attr));
+    _memset(&pdata->sysstatus_addr_attr, 0, sizeof(pdata->sysstatus_addr_attr));
 #endif
 
     return count;
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/modules/x86-64-ufispace-s9300-32d-cpld.c b/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/modules/x86-64-ufispace-s9300-32d-cpld.c
index 39f669414..3ff229710 100644
--- a/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/modules/x86-64-ufispace-s9300-32d-cpld.c
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/modules/x86-64-ufispace-s9300-32d-cpld.c
@@ -1,1638 +1,1646 @@
-/*
- * A i2c cpld driver for the ufispace_s9300_32d
- *
- * Copyright (C) 2017-2019 UfiSpace Technology Corporation.
- * Jason Tsai <jason.cy.tsai@ufispace.com>
- *
- * Based on ad7414.c
- * Copyright 2006 Stefan Roese <sr at denx.de>, DENX Software Engineering
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-#include <linux/module.h>
-#include <linux/i2c.h>
-#include <linux/slab.h>
-#include <linux/list.h>
-#include <linux/dmi.h>
-#include <linux/hwmon.h>
-#include <linux/hwmon-sysfs.h>
-#include <linux/err.h>
-#include <linux/mutex.h>
-#include "x86-64-ufispace-s9300-32d-cpld.h"
-
-#ifdef DEBUG
-#define DEBUG_PRINT(fmt, args...) \
-    printk(KERN_INFO "%s:%s[%d]: " fmt "\r\n", \
-            __FILE__, __func__, __LINE__, ##args)
-#else
-#define DEBUG_PRINT(fmt, args...)
-#endif
-
-#define BSP_LOG_R(fmt, args...) \
-    _bsp_log (LOG_READ, KERN_INFO "%s:%s[%d]: " fmt "\r\n", \
-            __FILE__, __func__, __LINE__, ##args)
-#define BSP_LOG_W(fmt, args...) \
-    _bsp_log (LOG_WRITE, KERN_INFO "%s:%s[%d]: " fmt "\r\n", \
-            __FILE__, __func__, __LINE__, ##args)
-
-#define I2C_READ_BYTE_DATA(ret, lock, i2c_client, reg) \
-{ \
-    mutex_lock(lock); \
-    ret = i2c_smbus_read_byte_data(i2c_client, reg); \
-    mutex_unlock(lock); \
-    BSP_LOG_R("cpld[%d], reg=0x%03x, reg_val=0x%02x", data->index, reg, ret); \
-}
-#define I2C_WRITE_BYTE_DATA(ret, lock, i2c_client, reg, val) \
-{ \
-    mutex_lock(lock); \
-    ret = i2c_smbus_write_byte_data(i2c_client, reg, val); \
-    mutex_unlock(lock); \
-    BSP_LOG_W("cpld[%d], reg=0x%03x, reg_val=0x%02x", data->index, reg, val); \
-}
-
-/* CPLD sysfs attributes index  */
-enum s9300_cpld_sysfs_attributes {
-    /* CPLD1 */
-    CPLD_ACCESS_REG,
-    CPLD_REGISTER_VAL,
-    CPLD_SKU_ID,
-    CPLD_HW_REV,
-    CPLD_DEPH_REV,
-    CPLD_BUILD_REV,
-    CPLD_ID_TYPE,
-    CPLD_MAJOR_VER,
-    CPLD_MINOR_VER,
-    CPLD_BUILD_VER,
-    CPLD_VERION_H,
-    CPLD_ID,
-    CPLD_MAC_INTR,
-    CPLD_10G_PHY_INTR,
-    CPLD_CPLD_FRU_INTR,
-    CPLD_THERMAL_ALERT_INTR,
-    CPLD_MISC_INTR,
-    CPLD_SYSTEM_INTR,
-    CPLD_MAC_INTR_MASK,
-    CPLD_10G_PHY_INTR_MASK,
-    CPLD_CPLD_FRU_INTR_MASK,
-    CPLD_THERMAL_ALERT_INTR_MASK,
-    CPLD_MISC_INTR_MASK,
-    CPLD_MAC_INTR_EVENT,
-    CPLD_10G_PHY_INTR_EVENT,
-    CPLD_CPLD_FRU_INTR_EVENT,
-    CPLD_THERMAL_ALERT_INTR_EVENT,
-    CPLD_MISC_INTR_EVENT,
-    CPLD_MAC_RST,
-    CPLD_10G_PHY_RST,
-    CPLD_BMC_RST,
-    CPLD_USB_RST,
-    CPLD_MUX_RST,
-    CPLD_MISC_RST,
-    CPLD_BMC_WATCHDOG,
-    CPLD_DAU_BD_PRES,
-    CPLD_PSU_STATUS,
-    CPLD_SYS_PW_STATUS,
-    CPLD_MISC,
-    CPLD_MUX_CTRL,
-    CPLD_MAC_QSFP_SEL_CTRL,
-    CPLD_SYS_LED_CTRL_1,
-    CPLD_SYS_LED_CTRL_2,
-    CPLD_BEACON_LED_CTRL,
-    CPLD_PORT_LED_CLR_CTRL,
-    CPLD_EVENT_DETECT_CTRL,
-    /* CPLD2 */
-    CPLD_QSFPDD_MOD_INT_G0,
-    CPLD_QSFPDD_MOD_INT_G1,
-    CPLD_QSFPDD_MOD_INT_G2,
-    CPLD_QSFPDD_MOD_INT_G3,
-    CPLD_QSFPDD_PRES_G0,
-    CPLD_QSFPDD_PRES_G1,
-    CPLD_QSFPDD_PRES_G2,
-    CPLD_QSFPDD_PRES_G3,
-    CPLD_QSFPDD_FUSE_INT_G0,
-    CPLD_QSFPDD_FUSE_INT_G1,
-    CPLD_QSFPDD_FUSE_INT_G2,
-    CPLD_QSFPDD_FUSE_INT_G3,
-    CPLD_SFP_TXFAULT,
-    CPLD_SFP_ABS,
-    CPLD_SFP_RXLOS,
-    CPLD_QSFPDD_MOD_INT_MASK_G0,
-    CPLD_QSFPDD_MOD_INT_MASK_G1,
-    CPLD_QSFPDD_MOD_INT_MASK_G2,
-    CPLD_QSFPDD_MOD_INT_MASK_G3,
-    CPLD_QSFPDD_PRES_MASK_G0,
-    CPLD_QSFPDD_PRES_MASK_G1,
-    CPLD_QSFPDD_PRES_MASK_G2,
-    CPLD_QSFPDD_PRES_MASK_G3,
-    CPLD_QSFPDD_FUSE_INT_MASK_G0,
-    CPLD_QSFPDD_FUSE_INT_MASK_G1,
-    CPLD_QSFPDD_FUSE_INT_MASK_G2,
-    CPLD_QSFPDD_FUSE_INT_MASK_G3,
-    CPLD_SFP_TXFAULT_MASK,
-    CPLD_SFP_ABS_MASK,
-    CPLD_SFP_RXLOS_MASK,
-    CPLD_QSFPDD_MOD_INT_EVENT_G0,
-    CPLD_QSFPDD_MOD_INT_EVENT_G1,
-    CPLD_QSFPDD_MOD_INT_EVENT_G2,
-    CPLD_QSFPDD_MOD_INT_EVENT_G3,
-    CPLD_QSFPDD_PRES_EVENT_G0,
-    CPLD_QSFPDD_PRES_EVENT_G1,
-    CPLD_QSFPDD_PRES_EVENT_G2,
-    CPLD_QSFPDD_PRES_EVENT_G3,
-    CPLD_QSFPDD_FUSE_INT_EVENT_G0,
-    CPLD_QSFPDD_FUSE_INT_EVENT_G1,
-    CPLD_QSFPDD_FUSE_INT_EVENT_G2,
-    CPLD_QSFPDD_FUSE_INT_EVENT_G3,
-    CPLD_SFP_TXFAULT_EVENT,
-    CPLD_SFP_ABS_EVENT,
-    CPLD_SFP_RXLOS_EVENT,
-    CPLD_QSFPDD_RESET_CTRL_G0,
-    CPLD_QSFPDD_RESET_CTRL_G1,
-    CPLD_QSFPDD_RESET_CTRL_G2,
-    CPLD_QSFPDD_RESET_CTRL_G3,
-    CPLD_QSFPDD_LP_MODE_G0,
-    CPLD_QSFPDD_LP_MODE_G1,
-    CPLD_QSFPDD_LP_MODE_G2,
-    CPLD_QSFPDD_LP_MODE_G3,
-    CPLD_SFP_TX_DIS,
-    CPLD_SFP_RS,
-    CPLD_SFP_TS,
-    CPLD_PORT_INT_STATUS,
-
-    //BSP DEBUG
-    BSP_DEBUG
-};
-
-enum bsp_log_types {
-    LOG_NONE,
-    LOG_RW,
-    LOG_READ,
-    LOG_WRITE
-};
-
-enum bsp_log_ctrl {
-    LOG_DISABLE,
-    LOG_ENABLE
-};
-
-/* CPLD sysfs attributes hook functions  */
-static ssize_t read_access_register(struct device *dev,
-                struct device_attribute *da, char *buf);
-static ssize_t write_access_register(struct device *dev,
-        struct device_attribute *da, const char *buf, size_t count);
-static ssize_t read_register_value(struct device *dev,
-                struct device_attribute *da, char *buf);
-static ssize_t write_register_value(struct device *dev,
-        struct device_attribute *da, const char *buf, size_t count);
-static ssize_t read_hw_rev_cb(struct device *dev,
-        struct device_attribute *da, char *buf);
-static ssize_t read_cpld_version_cb(struct device *dev,
-        struct device_attribute *da, char *buf);
-static ssize_t read_cpld_callback(struct device *dev,
-        struct device_attribute *da, char *buf);
-static ssize_t write_cpld_callback(struct device *dev,
-        struct device_attribute *da, const char *buf, size_t count);
-static ssize_t read_cpld_version_h_cb(struct device *dev,
-        struct device_attribute *da, char *buf);
-// cpld access api
-static ssize_t read_cpld_reg(struct device *dev, char *buf, u8 reg);
-static ssize_t write_cpld_reg(struct device *dev, const char *buf, size_t count, u8 reg);
-static bool read_cpld_reg_raw_byte(struct device *dev, u8 reg, u8 *val, int *errno);
-static bool read_cpld_reg_raw_int(struct device *dev, u8 reg, int *val);
-// bsp debug api
-static ssize_t read_bsp(char *buf, char *str);
-static ssize_t write_bsp(const char *buf, char *str, size_t str_len, size_t count);
-static ssize_t read_bsp_callback(struct device *dev,
-        struct device_attribute *da, char *buf);
-static ssize_t write_bsp_callback(struct device *dev,
-        struct device_attribute *da, const char *buf, size_t count);
-
-static LIST_HEAD(cpld_client_list);  /* client list for cpld */
-static struct mutex list_lock;  /* mutex for client list */
-
-struct cpld_client_node {
-    struct i2c_client *client;
-    struct list_head   list;
-};
-
-struct cpld_data {
-    int index;                  /* CPLD index */
-    struct mutex access_lock;       /* mutex for cpld access */
-    u8 access_reg;              /* register to access */
-};
-
-/* CPLD device id and data */
-static const struct i2c_device_id s9300_cpld_id[] = {
-    { "s9300_32d_cpld1",  cpld1 },
-    { "s9300_32d_cpld2",  cpld2 },
-    { "s9300_32d_cpld3",  cpld3 },
-    {}
-};
-
-char bsp_debug[2]="0";
-u8 enable_log_read=LOG_DISABLE;
-u8 enable_log_write=LOG_DISABLE;
-
-/* Addresses scanned for s9300_cpld */
-static const unsigned short cpld_i2c_addr[] = { 0x30, 0x31, 0x32, I2C_CLIENT_END };
-
-/* define all support register access of cpld in attribute */
-/* CPLD1 */
-static SENSOR_DEVICE_ATTR(cpld_access_register, S_IWUSR | S_IRUGO, \
-        read_access_register, write_access_register, CPLD_ACCESS_REG);
-static SENSOR_DEVICE_ATTR(cpld_register_value, S_IWUSR | S_IRUGO, \
-        read_register_value, write_register_value, CPLD_REGISTER_VAL);
-static SENSOR_DEVICE_ATTR(cpld_sku_id, S_IRUGO, \
-        read_cpld_callback, NULL, CPLD_SKU_ID);
-static SENSOR_DEVICE_ATTR(cpld_hw_rev, S_IRUGO, \
-        read_hw_rev_cb, NULL, CPLD_HW_REV);
-static SENSOR_DEVICE_ATTR(cpld_deph_rev, S_IRUGO, \
-        read_hw_rev_cb, NULL, CPLD_DEPH_REV);
-static SENSOR_DEVICE_ATTR(cpld_build_rev, S_IRUGO, \
-        read_hw_rev_cb, NULL, CPLD_BUILD_REV);
-static SENSOR_DEVICE_ATTR(cpld_id_type, S_IRUGO, \
-        read_hw_rev_cb, NULL, CPLD_ID_TYPE);
-static SENSOR_DEVICE_ATTR(cpld_major_ver, S_IRUGO, \
-        read_cpld_version_cb, NULL, CPLD_MAJOR_VER);
-static SENSOR_DEVICE_ATTR(cpld_minor_ver, S_IRUGO, \
-        read_cpld_version_cb, NULL, CPLD_MINOR_VER);
-static SENSOR_DEVICE_ATTR(cpld_build_ver, S_IRUGO, \
-        read_cpld_callback, NULL, CPLD_BUILD_VER);
-static SENSOR_DEVICE_ATTR(cpld_version_h, S_IRUGO, \
-        read_cpld_version_h_cb, NULL, CPLD_VERION_H);
-static SENSOR_DEVICE_ATTR(cpld_id, S_IRUGO, \
-        read_cpld_callback, NULL, CPLD_ID);
-static SENSOR_DEVICE_ATTR(cpld_mac_intr, S_IRUGO, \
-        read_cpld_callback, NULL, CPLD_MAC_INTR);
-static SENSOR_DEVICE_ATTR(cpld_10g_phy_intr, S_IRUGO, \
-        read_cpld_callback, NULL, CPLD_10G_PHY_INTR);
-static SENSOR_DEVICE_ATTR(cpld_cpld_fru_intr, S_IRUGO, \
-        read_cpld_callback, NULL, CPLD_CPLD_FRU_INTR);
-static SENSOR_DEVICE_ATTR(cpld_thermal_alert_intr, S_IRUGO, \
-        read_cpld_callback, NULL, CPLD_THERMAL_ALERT_INTR);
-static SENSOR_DEVICE_ATTR(cpld_misc_intr, S_IRUGO, \
-        read_cpld_callback, NULL, CPLD_MISC_INTR);
-static SENSOR_DEVICE_ATTR(cpld_system_intr, S_IRUGO, \
-        read_cpld_callback, NULL, CPLD_SYSTEM_INTR);
-static SENSOR_DEVICE_ATTR(cpld_mac_intr_mask, S_IWUSR | S_IRUGO, \
-        read_cpld_callback, write_cpld_callback, CPLD_MAC_INTR_MASK);
-static SENSOR_DEVICE_ATTR(cpld_10g_phy_intr_mask, S_IWUSR | S_IRUGO, \
-        read_cpld_callback, write_cpld_callback, CPLD_10G_PHY_INTR_MASK);
-static SENSOR_DEVICE_ATTR(cpld_cpld_fru_intr_mask, S_IWUSR | S_IRUGO, \
-        read_cpld_callback, write_cpld_callback, CPLD_CPLD_FRU_INTR_MASK);
-static SENSOR_DEVICE_ATTR(cpld_thermal_alert_intr_mask, S_IWUSR | S_IRUGO, \
-        read_cpld_callback, write_cpld_callback, CPLD_THERMAL_ALERT_INTR_MASK);
-static SENSOR_DEVICE_ATTR(cpld_misc_intr_mask, S_IWUSR | S_IRUGO, \
-        read_cpld_callback, write_cpld_callback, CPLD_MISC_INTR_MASK);
-static SENSOR_DEVICE_ATTR(cpld_mac_intr_event, S_IRUGO, \
-        read_cpld_callback, NULL, CPLD_MAC_INTR_EVENT);
-static SENSOR_DEVICE_ATTR(cpld_10g_phy_intr_event, S_IRUGO, \
-        read_cpld_callback, NULL, CPLD_10G_PHY_INTR_EVENT);
-static SENSOR_DEVICE_ATTR(cpld_cpld_fru_intr_event, S_IRUGO, \
-        read_cpld_callback, NULL, CPLD_CPLD_FRU_INTR_EVENT);
-static SENSOR_DEVICE_ATTR(cpld_thermal_alert_intr_event, S_IRUGO, \
-        read_cpld_callback, NULL, CPLD_THERMAL_ALERT_INTR_EVENT);
-static SENSOR_DEVICE_ATTR(cpld_misc_intr_event, S_IRUGO, \
-        read_cpld_callback, NULL, CPLD_MISC_INTR_EVENT);
-static SENSOR_DEVICE_ATTR(cpld_mac_rst, S_IWUSR | S_IRUGO, \
-        read_cpld_callback, write_cpld_callback, CPLD_MAC_RST);
-static SENSOR_DEVICE_ATTR(cpld_10g_phy_rst, S_IWUSR | S_IRUGO, \
-        read_cpld_callback, write_cpld_callback, CPLD_10G_PHY_RST);
-static SENSOR_DEVICE_ATTR(cpld_bmc_rst, S_IWUSR | S_IRUGO, \
-        read_cpld_callback, write_cpld_callback, CPLD_BMC_RST);
-static SENSOR_DEVICE_ATTR(cpld_usb_rst, S_IWUSR | S_IRUGO, \
-        read_cpld_callback, write_cpld_callback, CPLD_USB_RST);
-static SENSOR_DEVICE_ATTR(cpld_mux_rst, S_IWUSR | S_IRUGO, \
-        read_cpld_callback, write_cpld_callback, CPLD_MUX_RST);
-static SENSOR_DEVICE_ATTR(cpld_misc_rst, S_IWUSR | S_IRUGO, \
-        read_cpld_callback, write_cpld_callback, CPLD_MISC_RST);
-static SENSOR_DEVICE_ATTR(cpld_bmc_watchdog, S_IWUSR | S_IRUGO, \
-        read_cpld_callback, write_cpld_callback, CPLD_BMC_WATCHDOG);
-static SENSOR_DEVICE_ATTR(cpld_dau_bd_pres, S_IRUGO, \
-        read_cpld_callback, NULL, CPLD_DAU_BD_PRES);
-static SENSOR_DEVICE_ATTR(cpld_psu_status, S_IRUGO, \
-        read_cpld_callback, NULL, CPLD_PSU_STATUS);
-static SENSOR_DEVICE_ATTR(cpld_sys_pw_status, S_IRUGO, \
-        read_cpld_callback, NULL, CPLD_SYS_PW_STATUS);
-static SENSOR_DEVICE_ATTR(cpld_misc, S_IRUGO, \
-        read_cpld_callback, NULL, CPLD_MISC);
-static SENSOR_DEVICE_ATTR(cpld_mux_ctrl, S_IWUSR | S_IRUGO, \
-        read_cpld_callback, write_cpld_callback, CPLD_MUX_CTRL);
-static SENSOR_DEVICE_ATTR(cpld_mac_qsfp_sel_ctrl, S_IWUSR | S_IRUGO, \
-        read_cpld_callback, write_cpld_callback, CPLD_MAC_QSFP_SEL_CTRL);
-static SENSOR_DEVICE_ATTR(cpld_sys_led_ctrl_1, S_IRUGO, \
-        read_cpld_callback, NULL, CPLD_SYS_LED_CTRL_1);
-static SENSOR_DEVICE_ATTR(cpld_sys_led_ctrl_2, S_IRUGO, \
-        read_cpld_callback, NULL, CPLD_SYS_LED_CTRL_2);
-static SENSOR_DEVICE_ATTR(cpld_beacon_led_ctrl, S_IWUSR | S_IRUGO, \
-        read_cpld_callback, write_cpld_callback, CPLD_BEACON_LED_CTRL);
-static SENSOR_DEVICE_ATTR(cpld_port_led_clr_ctrl, S_IWUSR | S_IRUGO, \
-        read_cpld_callback, write_cpld_callback, CPLD_PORT_LED_CLR_CTRL);
-static SENSOR_DEVICE_ATTR(cpld_event_detect_ctrl, S_IWUSR | S_IRUGO, \
-        read_cpld_callback, write_cpld_callback, CPLD_EVENT_DETECT_CTRL);
-/* CPLD2 */
-static SENSOR_DEVICE_ATTR(cpld_qsfpdd_mod_int_g0, S_IRUGO, \
-        read_cpld_callback, NULL, CPLD_QSFPDD_MOD_INT_G0);
-static SENSOR_DEVICE_ATTR(cpld_qsfpdd_mod_int_g1, S_IRUGO, \
-        read_cpld_callback, NULL, CPLD_QSFPDD_MOD_INT_G1);
-static SENSOR_DEVICE_ATTR(cpld_qsfpdd_mod_int_g2, S_IRUGO, \
-        read_cpld_callback, NULL, CPLD_QSFPDD_MOD_INT_G2);
-static SENSOR_DEVICE_ATTR(cpld_qsfpdd_mod_int_g3, S_IRUGO, \
-        read_cpld_callback, NULL, CPLD_QSFPDD_MOD_INT_G3);
-static SENSOR_DEVICE_ATTR(cpld_qsfpdd_pres_g0, S_IRUGO, \
-        read_cpld_callback, NULL, CPLD_QSFPDD_PRES_G0);
-static SENSOR_DEVICE_ATTR(cpld_qsfpdd_pres_g1, S_IRUGO, \
-        read_cpld_callback, NULL, CPLD_QSFPDD_PRES_G1);
-static SENSOR_DEVICE_ATTR(cpld_qsfpdd_pres_g2, S_IRUGO, \
-        read_cpld_callback, NULL, CPLD_QSFPDD_PRES_G2);
-static SENSOR_DEVICE_ATTR(cpld_qsfpdd_pres_g3, S_IRUGO, \
-        read_cpld_callback, NULL, CPLD_QSFPDD_PRES_G3);
-static SENSOR_DEVICE_ATTR(cpld_qsfpdd_fuse_int_g0, S_IRUGO, \
-        read_cpld_callback, NULL, CPLD_QSFPDD_FUSE_INT_G0);
-static SENSOR_DEVICE_ATTR(cpld_qsfpdd_fuse_int_g1, S_IRUGO, \
-        read_cpld_callback, NULL, CPLD_QSFPDD_FUSE_INT_G1);
-static SENSOR_DEVICE_ATTR(cpld_qsfpdd_fuse_int_g2, S_IRUGO, \
-        read_cpld_callback, NULL, CPLD_QSFPDD_FUSE_INT_G2);
-static SENSOR_DEVICE_ATTR(cpld_qsfpdd_fuse_int_g3, S_IRUGO, \
-        read_cpld_callback, NULL, CPLD_QSFPDD_FUSE_INT_G3);
-static SENSOR_DEVICE_ATTR(cpld_sfp_txfault, S_IRUGO, \
-        read_cpld_callback, NULL, CPLD_SFP_TXFAULT);
-static SENSOR_DEVICE_ATTR(cpld_sfp_abs, S_IRUGO, \
-        read_cpld_callback, NULL, CPLD_SFP_ABS);
-static SENSOR_DEVICE_ATTR(cpld_sfp_rxlos, S_IRUGO, \
-        read_cpld_callback, NULL, CPLD_SFP_RXLOS);
-static SENSOR_DEVICE_ATTR(cpld_qsfpdd_mod_int_mask_g0, S_IWUSR | S_IRUGO, \
-        read_cpld_callback, write_cpld_callback, CPLD_QSFPDD_MOD_INT_MASK_G0);
-static SENSOR_DEVICE_ATTR(cpld_qsfpdd_mod_int_mask_g1, S_IWUSR | S_IRUGO, \
-        read_cpld_callback, write_cpld_callback, CPLD_QSFPDD_MOD_INT_MASK_G1);
-static SENSOR_DEVICE_ATTR(cpld_qsfpdd_mod_int_mask_g2, S_IWUSR | S_IRUGO, \
-        read_cpld_callback, write_cpld_callback, CPLD_QSFPDD_MOD_INT_MASK_G2);
-static SENSOR_DEVICE_ATTR(cpld_qsfpdd_mod_int_mask_g3, S_IWUSR | S_IRUGO, \
-        read_cpld_callback, write_cpld_callback, CPLD_QSFPDD_MOD_INT_MASK_G3);
-static SENSOR_DEVICE_ATTR(cpld_qsfpdd_pres_mask_g0, S_IWUSR | S_IRUGO, \
-        read_cpld_callback, write_cpld_callback, CPLD_QSFPDD_PRES_MASK_G0);
-static SENSOR_DEVICE_ATTR(cpld_qsfpdd_pres_mask_g1, S_IWUSR | S_IRUGO, \
-        read_cpld_callback, write_cpld_callback, CPLD_QSFPDD_PRES_MASK_G1);
-static SENSOR_DEVICE_ATTR(cpld_qsfpdd_pres_mask_g2, S_IWUSR | S_IRUGO, \
-        read_cpld_callback, write_cpld_callback, CPLD_QSFPDD_PRES_MASK_G2);
-static SENSOR_DEVICE_ATTR(cpld_qsfpdd_pres_mask_g3, S_IWUSR | S_IRUGO, \
-        read_cpld_callback, write_cpld_callback, CPLD_QSFPDD_PRES_MASK_G3);
-static SENSOR_DEVICE_ATTR(cpld_qsfpdd_fuse_int_mask_g0, S_IWUSR | S_IRUGO, \
-        read_cpld_callback, write_cpld_callback, CPLD_QSFPDD_FUSE_INT_MASK_G0);
-static SENSOR_DEVICE_ATTR(cpld_qsfpdd_fuse_int_mask_g1, S_IWUSR | S_IRUGO, \
-        read_cpld_callback, write_cpld_callback, CPLD_QSFPDD_FUSE_INT_MASK_G1);
-static SENSOR_DEVICE_ATTR(cpld_qsfpdd_fuse_int_mask_g2, S_IWUSR | S_IRUGO, \
-        read_cpld_callback, write_cpld_callback, CPLD_QSFPDD_FUSE_INT_MASK_G2);
-static SENSOR_DEVICE_ATTR(cpld_qsfpdd_fuse_int_mask_g3, S_IWUSR | S_IRUGO, \
-        read_cpld_callback, write_cpld_callback, CPLD_QSFPDD_FUSE_INT_MASK_G3);
-static SENSOR_DEVICE_ATTR(cpld_sfp_txfault_mask, S_IWUSR | S_IRUGO, \
-        read_cpld_callback, write_cpld_callback, CPLD_SFP_TXFAULT_MASK);
-static SENSOR_DEVICE_ATTR(cpld_sfp_abs_mask, S_IWUSR | S_IRUGO, \
-        read_cpld_callback, write_cpld_callback, CPLD_SFP_ABS_MASK);
-static SENSOR_DEVICE_ATTR(cpld_sfp_rxlos_mask, S_IWUSR | S_IRUGO, \
-        read_cpld_callback, write_cpld_callback, CPLD_SFP_RXLOS_MASK);
-static SENSOR_DEVICE_ATTR(cpld_qsfpdd_mod_int_event_g0, S_IRUGO, \
-        read_cpld_callback, NULL, CPLD_QSFPDD_MOD_INT_EVENT_G0);
-static SENSOR_DEVICE_ATTR(cpld_qsfpdd_mod_int_event_g1, S_IRUGO, \
-        read_cpld_callback, NULL, CPLD_QSFPDD_MOD_INT_EVENT_G1);
-static SENSOR_DEVICE_ATTR(cpld_qsfpdd_mod_int_event_g2, S_IRUGO, \
-        read_cpld_callback, NULL, CPLD_QSFPDD_MOD_INT_EVENT_G2);
-static SENSOR_DEVICE_ATTR(cpld_qsfpdd_mod_int_event_g3, S_IRUGO, \
-        read_cpld_callback, NULL, CPLD_QSFPDD_MOD_INT_EVENT_G3);
-static SENSOR_DEVICE_ATTR(cpld_qsfpdd_pres_event_g0, S_IRUGO, \
-        read_cpld_callback, NULL, CPLD_QSFPDD_PRES_EVENT_G0);
-static SENSOR_DEVICE_ATTR(cpld_qsfpdd_pres_event_g1, S_IRUGO, \
-        read_cpld_callback, NULL, CPLD_QSFPDD_PRES_EVENT_G1);
-static SENSOR_DEVICE_ATTR(cpld_qsfpdd_pres_event_g2, S_IRUGO, \
-        read_cpld_callback, NULL, CPLD_QSFPDD_PRES_EVENT_G2);
-static SENSOR_DEVICE_ATTR(cpld_qsfpdd_pres_event_g3, S_IRUGO, \
-        read_cpld_callback, NULL, CPLD_QSFPDD_PRES_EVENT_G3);
-static SENSOR_DEVICE_ATTR(cpld_qsfpdd_fuse_int_event_g0, S_IRUGO, \
-        read_cpld_callback, NULL, CPLD_QSFPDD_FUSE_INT_EVENT_G0);
-static SENSOR_DEVICE_ATTR(cpld_qsfpdd_fuse_int_event_g1, S_IRUGO, \
-        read_cpld_callback, NULL, CPLD_QSFPDD_FUSE_INT_EVENT_G1);
-static SENSOR_DEVICE_ATTR(cpld_qsfpdd_fuse_int_event_g2, S_IRUGO, \
-        read_cpld_callback, NULL, CPLD_QSFPDD_FUSE_INT_EVENT_G2);
-static SENSOR_DEVICE_ATTR(cpld_qsfpdd_fuse_int_event_g3, S_IRUGO, \
-        read_cpld_callback, NULL, CPLD_QSFPDD_FUSE_INT_EVENT_G3);
-static SENSOR_DEVICE_ATTR(cpld_sfp_txfault_event, S_IRUGO, \
-        read_cpld_callback, NULL, CPLD_SFP_TXFAULT_EVENT);
-static SENSOR_DEVICE_ATTR(cpld_sfp_abs_event, S_IRUGO, \
-        read_cpld_callback, NULL, CPLD_SFP_ABS_EVENT);
-static SENSOR_DEVICE_ATTR(cpld_sfp_rxlos_event, S_IRUGO, \
-        read_cpld_callback, NULL, CPLD_SFP_RXLOS_EVENT);
-static SENSOR_DEVICE_ATTR(cpld_qsfpdd_reset_ctrl_g0, \
-	    S_IWUSR | S_IRUGO, \
-        read_cpld_callback, write_cpld_callback, \
-        CPLD_QSFPDD_RESET_CTRL_G0);
-static SENSOR_DEVICE_ATTR(cpld_qsfpdd_reset_ctrl_g1, \
-	    S_IWUSR | S_IRUGO, \
-        read_cpld_callback, write_cpld_callback, \
-        CPLD_QSFPDD_RESET_CTRL_G1);
-static SENSOR_DEVICE_ATTR(cpld_qsfpdd_reset_ctrl_g2, \
-	    S_IWUSR | S_IRUGO, \
-        read_cpld_callback, write_cpld_callback, \
-        CPLD_QSFPDD_RESET_CTRL_G2);
-static SENSOR_DEVICE_ATTR(cpld_qsfpdd_reset_ctrl_g3, \
-	    S_IWUSR | S_IRUGO, \
-        read_cpld_callback, write_cpld_callback, \
-        CPLD_QSFPDD_RESET_CTRL_G3);
-static SENSOR_DEVICE_ATTR(cpld_qsfpdd_lp_mode_g0, \
-	    S_IWUSR | S_IRUGO, \
-        read_cpld_callback, write_cpld_callback, \
-        CPLD_QSFPDD_LP_MODE_G0);
-static SENSOR_DEVICE_ATTR(cpld_qsfpdd_lp_mode_g1, \
-	    S_IWUSR | S_IRUGO, \
-        read_cpld_callback, write_cpld_callback, \
-        CPLD_QSFPDD_LP_MODE_G1);
-static SENSOR_DEVICE_ATTR(cpld_qsfpdd_lp_mode_g2, \
-	    S_IWUSR | S_IRUGO, \
-        read_cpld_callback, write_cpld_callback, \
-        CPLD_QSFPDD_LP_MODE_G2);
-static SENSOR_DEVICE_ATTR(cpld_qsfpdd_lp_mode_g3, \
-	    S_IWUSR | S_IRUGO, \
-        read_cpld_callback, write_cpld_callback, \
-        CPLD_QSFPDD_LP_MODE_G3);
-static SENSOR_DEVICE_ATTR(cpld_sfp_tx_dis, S_IWUSR | S_IRUGO, \
-        read_cpld_callback, write_cpld_callback, CPLD_SFP_TX_DIS);
-static SENSOR_DEVICE_ATTR(cpld_sfp_rs, S_IWUSR | S_IRUGO, \
-        read_cpld_callback, write_cpld_callback, CPLD_SFP_RS);
-static SENSOR_DEVICE_ATTR(cpld_sfp_ts, S_IWUSR | S_IRUGO, \
-        read_cpld_callback, write_cpld_callback, CPLD_SFP_TS);
-static SENSOR_DEVICE_ATTR(cpld_port_int_status, S_IRUGO, \
-        read_cpld_callback, NULL, CPLD_PORT_INT_STATUS);
-//BSP DEBUG
-static SENSOR_DEVICE_ATTR(bsp_debug, S_IRUGO | S_IWUSR, \
-        read_bsp_callback, write_bsp_callback, BSP_DEBUG);
-
-/* define support attributes of cpldx , total 3 */
-/* cpld 1 */
-static struct attribute *s9300_cpld1_attributes[] = {
-    &sensor_dev_attr_cpld_access_register.dev_attr.attr,
-    &sensor_dev_attr_cpld_register_value.dev_attr.attr,
-    &sensor_dev_attr_cpld_sku_id.dev_attr.attr,
-    &sensor_dev_attr_cpld_hw_rev.dev_attr.attr,
-    &sensor_dev_attr_cpld_deph_rev.dev_attr.attr,
-    &sensor_dev_attr_cpld_build_rev.dev_attr.attr,
-    &sensor_dev_attr_cpld_id_type.dev_attr.attr,
-    &sensor_dev_attr_cpld_major_ver.dev_attr.attr,
-    &sensor_dev_attr_cpld_minor_ver.dev_attr.attr,
-    &sensor_dev_attr_cpld_build_ver.dev_attr.attr,
-    &sensor_dev_attr_cpld_version_h.dev_attr.attr,
-    &sensor_dev_attr_cpld_id.dev_attr.attr,
-    &sensor_dev_attr_cpld_mac_intr.dev_attr.attr,
-    &sensor_dev_attr_cpld_10g_phy_intr.dev_attr.attr,
-    &sensor_dev_attr_cpld_cpld_fru_intr.dev_attr.attr,
-    &sensor_dev_attr_cpld_thermal_alert_intr.dev_attr.attr,
-    &sensor_dev_attr_cpld_misc_intr.dev_attr.attr,
-    &sensor_dev_attr_cpld_system_intr.dev_attr.attr,
-    &sensor_dev_attr_cpld_mac_intr_mask.dev_attr.attr,
-    &sensor_dev_attr_cpld_10g_phy_intr_mask.dev_attr.attr,
-    &sensor_dev_attr_cpld_cpld_fru_intr_mask.dev_attr.attr,
-    &sensor_dev_attr_cpld_thermal_alert_intr_mask.dev_attr.attr,
-    &sensor_dev_attr_cpld_misc_intr_mask.dev_attr.attr,
-    &sensor_dev_attr_cpld_mac_intr_event.dev_attr.attr,
-    &sensor_dev_attr_cpld_10g_phy_intr_event.dev_attr.attr,
-    &sensor_dev_attr_cpld_cpld_fru_intr_event.dev_attr.attr,
-    &sensor_dev_attr_cpld_thermal_alert_intr_event.dev_attr.attr,
-    &sensor_dev_attr_cpld_misc_intr_event.dev_attr.attr,
-    &sensor_dev_attr_cpld_mac_rst.dev_attr.attr,
-    &sensor_dev_attr_cpld_10g_phy_rst.dev_attr.attr,
-    &sensor_dev_attr_cpld_bmc_rst.dev_attr.attr,
-    &sensor_dev_attr_cpld_usb_rst.dev_attr.attr,
-    &sensor_dev_attr_cpld_mux_rst.dev_attr.attr,
-    &sensor_dev_attr_cpld_misc_rst.dev_attr.attr,
-    &sensor_dev_attr_cpld_bmc_watchdog.dev_attr.attr,
-    &sensor_dev_attr_cpld_dau_bd_pres.dev_attr.attr,
-    &sensor_dev_attr_cpld_psu_status.dev_attr.attr,
-    &sensor_dev_attr_cpld_sys_pw_status.dev_attr.attr,
-    &sensor_dev_attr_cpld_misc.dev_attr.attr,
-    &sensor_dev_attr_cpld_mux_ctrl.dev_attr.attr,
-    &sensor_dev_attr_cpld_mac_qsfp_sel_ctrl.dev_attr.attr,
-    &sensor_dev_attr_cpld_sys_led_ctrl_1.dev_attr.attr,
-    &sensor_dev_attr_cpld_sys_led_ctrl_2.dev_attr.attr,
-    &sensor_dev_attr_cpld_beacon_led_ctrl.dev_attr.attr,
-    &sensor_dev_attr_cpld_port_led_clr_ctrl.dev_attr.attr,
-    &sensor_dev_attr_cpld_event_detect_ctrl.dev_attr.attr,
-    &sensor_dev_attr_bsp_debug.dev_attr.attr,
-    NULL
-};
-
-/* cpld 2 */
-static struct attribute *s9300_cpld2_attributes[] = {
-    &sensor_dev_attr_cpld_access_register.dev_attr.attr,
-    &sensor_dev_attr_cpld_register_value.dev_attr.attr,
-    &sensor_dev_attr_cpld_major_ver.dev_attr.attr,
-    &sensor_dev_attr_cpld_minor_ver.dev_attr.attr,
-    &sensor_dev_attr_cpld_build_ver.dev_attr.attr,
-    &sensor_dev_attr_cpld_version_h.dev_attr.attr,
-    &sensor_dev_attr_cpld_id.dev_attr.attr,
-    &sensor_dev_attr_cpld_qsfpdd_mod_int_g0.dev_attr.attr,
-    &sensor_dev_attr_cpld_qsfpdd_mod_int_g1.dev_attr.attr,
-    &sensor_dev_attr_cpld_qsfpdd_mod_int_g2.dev_attr.attr,
-    &sensor_dev_attr_cpld_qsfpdd_mod_int_g3.dev_attr.attr,
-    &sensor_dev_attr_cpld_qsfpdd_pres_g0.dev_attr.attr,
-    &sensor_dev_attr_cpld_qsfpdd_pres_g1.dev_attr.attr,
-    &sensor_dev_attr_cpld_qsfpdd_pres_g2.dev_attr.attr,
-    &sensor_dev_attr_cpld_qsfpdd_pres_g3.dev_attr.attr,
-    &sensor_dev_attr_cpld_qsfpdd_fuse_int_g0.dev_attr.attr,
-    &sensor_dev_attr_cpld_qsfpdd_fuse_int_g1.dev_attr.attr,
-    &sensor_dev_attr_cpld_qsfpdd_fuse_int_g2.dev_attr.attr,
-    &sensor_dev_attr_cpld_qsfpdd_fuse_int_g3.dev_attr.attr,
-    &sensor_dev_attr_cpld_sfp_txfault.dev_attr.attr,
-    &sensor_dev_attr_cpld_sfp_abs.dev_attr.attr,
-    &sensor_dev_attr_cpld_sfp_rxlos.dev_attr.attr,
-    &sensor_dev_attr_cpld_qsfpdd_mod_int_mask_g0.dev_attr.attr,
-    &sensor_dev_attr_cpld_qsfpdd_mod_int_mask_g1.dev_attr.attr,
-    &sensor_dev_attr_cpld_qsfpdd_mod_int_mask_g2.dev_attr.attr,
-    &sensor_dev_attr_cpld_qsfpdd_mod_int_mask_g3.dev_attr.attr,
-    &sensor_dev_attr_cpld_qsfpdd_pres_mask_g0.dev_attr.attr,
-    &sensor_dev_attr_cpld_qsfpdd_pres_mask_g1.dev_attr.attr,
-    &sensor_dev_attr_cpld_qsfpdd_pres_mask_g2.dev_attr.attr,
-    &sensor_dev_attr_cpld_qsfpdd_pres_mask_g3.dev_attr.attr,
-    &sensor_dev_attr_cpld_qsfpdd_fuse_int_mask_g0.dev_attr.attr,
-    &sensor_dev_attr_cpld_qsfpdd_fuse_int_mask_g1.dev_attr.attr,
-    &sensor_dev_attr_cpld_qsfpdd_fuse_int_mask_g2.dev_attr.attr,
-    &sensor_dev_attr_cpld_qsfpdd_fuse_int_mask_g3.dev_attr.attr,
-    &sensor_dev_attr_cpld_sfp_txfault_mask.dev_attr.attr,
-    &sensor_dev_attr_cpld_sfp_abs_mask.dev_attr.attr,
-    &sensor_dev_attr_cpld_sfp_rxlos_mask.dev_attr.attr,
-    &sensor_dev_attr_cpld_qsfpdd_mod_int_event_g0.dev_attr.attr,
-    &sensor_dev_attr_cpld_qsfpdd_mod_int_event_g1.dev_attr.attr,
-    &sensor_dev_attr_cpld_qsfpdd_mod_int_event_g2.dev_attr.attr,
-    &sensor_dev_attr_cpld_qsfpdd_mod_int_event_g3.dev_attr.attr,
-    &sensor_dev_attr_cpld_qsfpdd_pres_event_g0.dev_attr.attr,
-    &sensor_dev_attr_cpld_qsfpdd_pres_event_g1.dev_attr.attr,
-    &sensor_dev_attr_cpld_qsfpdd_pres_event_g2.dev_attr.attr,
-    &sensor_dev_attr_cpld_qsfpdd_pres_event_g3.dev_attr.attr,
-    &sensor_dev_attr_cpld_qsfpdd_fuse_int_event_g0.dev_attr.attr,
-    &sensor_dev_attr_cpld_qsfpdd_fuse_int_event_g1.dev_attr.attr,
-    &sensor_dev_attr_cpld_qsfpdd_fuse_int_event_g2.dev_attr.attr,
-    &sensor_dev_attr_cpld_qsfpdd_fuse_int_event_g3.dev_attr.attr,
-    &sensor_dev_attr_cpld_sfp_txfault_event.dev_attr.attr,
-    &sensor_dev_attr_cpld_sfp_abs_event.dev_attr.attr,
-    &sensor_dev_attr_cpld_sfp_rxlos_event.dev_attr.attr,
-    &sensor_dev_attr_cpld_qsfpdd_reset_ctrl_g0.dev_attr.attr,
-    &sensor_dev_attr_cpld_qsfpdd_reset_ctrl_g1.dev_attr.attr,
-    &sensor_dev_attr_cpld_qsfpdd_reset_ctrl_g2.dev_attr.attr,
-    &sensor_dev_attr_cpld_qsfpdd_reset_ctrl_g3.dev_attr.attr,
-    &sensor_dev_attr_cpld_qsfpdd_lp_mode_g0.dev_attr.attr,
-    &sensor_dev_attr_cpld_qsfpdd_lp_mode_g1.dev_attr.attr,
-    &sensor_dev_attr_cpld_qsfpdd_lp_mode_g2.dev_attr.attr,
-    &sensor_dev_attr_cpld_qsfpdd_lp_mode_g3.dev_attr.attr,
-    &sensor_dev_attr_cpld_sfp_tx_dis.dev_attr.attr,
-    &sensor_dev_attr_cpld_sfp_rs.dev_attr.attr,
-    &sensor_dev_attr_cpld_sfp_ts.dev_attr.attr,
-    &sensor_dev_attr_cpld_port_int_status.dev_attr.attr,
-    NULL
-};
-
-/* cpld 3 */
-static struct attribute *s9300_cpld3_attributes[] = {
-    &sensor_dev_attr_cpld_access_register.dev_attr.attr,
-    &sensor_dev_attr_cpld_register_value.dev_attr.attr,
-    &sensor_dev_attr_cpld_major_ver.dev_attr.attr,
-    &sensor_dev_attr_cpld_minor_ver.dev_attr.attr,
-    &sensor_dev_attr_cpld_build_ver.dev_attr.attr,
-    &sensor_dev_attr_cpld_version_h.dev_attr.attr,
-    &sensor_dev_attr_cpld_id.dev_attr.attr,
-    NULL
-};
-
-/* cpld 1 attributes group */
-static const struct attribute_group s9300_cpld1_group = {
-    .attrs = s9300_cpld1_attributes,
-};
-/* cpld 2 attributes group */
-static const struct attribute_group s9300_cpld2_group = {
-    .attrs = s9300_cpld2_attributes,
-};
-/* cpld 3 attributes group */
-static const struct attribute_group s9300_cpld3_group = {
-    .attrs = s9300_cpld3_attributes,
-};
-
-static int _bsp_log(u8 log_type, char *fmt, ...)
-{
-    if ((log_type==LOG_READ  && enable_log_read) ||
-        (log_type==LOG_WRITE && enable_log_write)) {
-        va_list args;
-        int r;
-
-        va_start(args, fmt);
-        r = vprintk(fmt, args);
-        va_end(args);
-
-        return r;
-    } else {
-        return 0;
-    }
-}
-
-static int _config_bsp_log(u8 log_type)
-{
-    switch(log_type) {
-        case LOG_NONE:
-            enable_log_read = LOG_DISABLE;
-            enable_log_write = LOG_DISABLE;
-            break;
-        case LOG_RW:
-            enable_log_read = LOG_ENABLE;
-            enable_log_write = LOG_ENABLE;
-            break;
-        case LOG_READ:
-            enable_log_read = LOG_ENABLE;
-            enable_log_write = LOG_DISABLE;
-            break;
-        case LOG_WRITE:
-            enable_log_read = LOG_DISABLE;
-            enable_log_write = LOG_ENABLE;
-            break;
-        default:
-            return -EINVAL;
-    }
-    return 0;
-}
-
-/* get bsp value */
-static ssize_t read_bsp(char *buf, char *str)
-{
-    ssize_t len=0;
-
-    len=sprintf(buf, "%s", str);
-    BSP_LOG_R("reg_val=%s", str);
-
-    return len;
-}
-
-/* set bsp value */
-static ssize_t write_bsp(const char *buf, char *str, size_t str_len, size_t count)
-{
-    snprintf(str, str_len, "%s", buf);
-    BSP_LOG_W("reg_val=%s", str);
-
-    return count;
-}
-
-/* get bsp parameter value */
-static ssize_t read_bsp_callback(struct device *dev,
-        struct device_attribute *da, char *buf)
-{
-    struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
-    int str_len=0;
-    char *str=NULL;
-
-    switch (attr->index) {
-        case BSP_DEBUG:
-            str = bsp_debug;
-            str_len = sizeof(bsp_debug);
-            break;
-        default:
-            return -EINVAL;
-    }
-    return read_bsp(buf, str);
-}
-
-/* set bsp parameter value */
-static ssize_t write_bsp_callback(struct device *dev,
-        struct device_attribute *da, const char *buf, size_t count)
-{
-    struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
-    int str_len=0;
-    char *str=NULL;
-    ssize_t ret = 0;
-    u8 bsp_debug_u8 = 0;
-
-    switch (attr->index) {
-        case BSP_DEBUG:
-            str = bsp_debug;
-            str_len = sizeof(str);
-            ret = write_bsp(buf, str, str_len, count);
-
-            if (kstrtou8(buf, 0, &bsp_debug_u8) < 0) {
-                return -EINVAL;
-            } else if (_config_bsp_log(bsp_debug_u8) < 0) {
-                return -EINVAL;
-            }
-            return ret;
-        default:
-            return -EINVAL;
-    }
-    return 0;
-}
-
-/* read access register from cpld data */
-static ssize_t read_access_register(struct device *dev,
-                    struct device_attribute *da,
-                    char *buf)
-{
-    struct i2c_client *client = to_i2c_client(dev);
-    struct cpld_data *data = i2c_get_clientdata(client);
-    u8 reg = data->access_reg;
-
-    return sprintf(buf, "0x%x\n", reg);
-}
-
-/* write access register to cpld data */
-static ssize_t write_access_register(struct device *dev,
-                    struct device_attribute *da,
-                    const char *buf,
-                    size_t count)
-{
-    struct i2c_client *client = to_i2c_client(dev);
-    struct cpld_data *data = i2c_get_clientdata(client);
-    u8 reg;
-
-    if (kstrtou8(buf, 0, &reg) < 0)
-        return -EINVAL;
-
-    data->access_reg = reg;
-    return count;
-}
-
-/* read the value of access register in cpld data */
-static ssize_t read_register_value(struct device *dev,
-                    struct device_attribute *da,
-                    char *buf)
-{
-    struct i2c_client *client = to_i2c_client(dev);
-    struct cpld_data *data = i2c_get_clientdata(client);
-    u8 reg = data->access_reg;
-    int reg_val;
-
-    I2C_READ_BYTE_DATA(reg_val, &data->access_lock, client, reg);
-
-    if (reg_val < 0)
-        return reg_val;
-
-    return sprintf(buf, "0x%x\n", reg_val);
-}
-
-/* wrtie the value to access register in cpld data */
-static ssize_t write_register_value(struct device *dev,
-                    struct device_attribute *da,
-                    const char *buf,
-                    size_t count)
-{
-    struct i2c_client *client = to_i2c_client(dev);
-    struct cpld_data *data = i2c_get_clientdata(client);
-    int ret = -EIO;
-    u8 reg = data->access_reg;
-    u8 reg_val;
-
-    if (kstrtou8(buf, 0, &reg_val) < 0)
-        return -EINVAL;
-
-    I2C_WRITE_BYTE_DATA(ret, &data->access_lock, client, reg, reg_val);
-
-    if (unlikely(ret < 0)) {
-        dev_err(dev, "I2C_WRITE_BYTE_DATA error, return=%d\n", ret);
-        return ret;
-    }
-
-    return count;
-}
-
-/* get cpld register value */
-static ssize_t read_cpld_reg(struct device *dev,
-                    char *buf,
-                    u8 reg)
-{
-    int reg_val;
-
-    if (read_cpld_reg_raw_int(dev, reg, &reg_val))
-        return sprintf(buf, "0x%02x\n", reg_val);
-    else
-        return reg_val;
-}
-
-static bool read_cpld_reg_raw_int(struct device *dev, u8 reg, int *val)
-{
-    struct i2c_client *client = to_i2c_client(dev);
-    struct cpld_data *data = i2c_get_clientdata(client);
-    I2C_READ_BYTE_DATA(*val, &data->access_lock, client, reg);
-    if (unlikely(*val < 0)) {
-        dev_err(dev, "read_cpld_reg_raw_int() error, return=%d\n", *val);
-        return false;
-    }
-    return true;
-}
-
-static bool read_cpld_reg_raw_byte(struct device *dev, u8 reg, u8 *val, int *errno)
-{
-    int reg_val;
-
-    if (read_cpld_reg_raw_int(dev, reg, &reg_val)) {
-        *val = (u8)reg_val;
-        return true;
-    } else {
-        *errno = reg_val;
-        return false;
-    }
-}
-
-/* handle read for attributes */
-static ssize_t read_cpld_callback(struct device *dev,
-        struct device_attribute *da, char *buf)
-{
-    struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
-    u8 reg = 0;
-
-    switch (attr->index) {
-        case CPLD_SKU_ID:
-             reg = CPLD_SKU_ID_REG;
-             break;
-        case CPLD_ID:
-             reg = CPLD_ID_REG;
-             break;
-        case CPLD_BUILD_VER:
-             reg = CPLD_BUILD_VER_REG;
-             break;
-        case CPLD_MAC_INTR:
-             reg = CPLD_MAC_INTR_REG;
-             break;
-        case CPLD_10G_PHY_INTR:
-             reg = CPLD_10G_PHY_INTR_REG;
-             break;
-        case CPLD_CPLD_FRU_INTR:
-             reg = CPLD_CPLD_FRU_INTR_REG;
-             break;
-        case CPLD_THERMAL_ALERT_INTR:
-             reg = CPLD_THERMAL_ALERT_INTR_REG;
-             break;
-        case CPLD_MISC_INTR:
-             reg = CPLD_MISC_INTR_REG;
-             break;
-        case CPLD_SYSTEM_INTR:
-             reg = CPLD_SYSTEM_INTR_REG;
-             break;
-        case CPLD_MAC_INTR_MASK:
-             reg = CPLD_MAC_INTR_MASK_REG;
-             break;
-        case CPLD_10G_PHY_INTR_MASK:
-             reg = CPLD_10G_PHY_INTR_MASK_REG;
-             break;
-        case CPLD_CPLD_FRU_INTR_MASK:
-             reg = CPLD_CPLD_FRU_INTR_MASK_REG;
-             break;
-        case CPLD_THERMAL_ALERT_INTR_MASK:
-             reg = CPLD_THERMAL_ALERT_INTR_MASK_REG;
-             break;
-        case CPLD_MISC_INTR_MASK:
-             reg = CPLD_MISC_INTR_MASK_REG;
-             break;
-        case CPLD_MAC_INTR_EVENT:
-             reg = CPLD_MAC_INTR_EVENT_REG;
-             break;
-        case CPLD_10G_PHY_INTR_EVENT:
-             reg = CPLD_10G_PHY_INTR_EVENT_REG;
-             break;
-        case CPLD_CPLD_FRU_INTR_EVENT:
-             reg = CPLD_CPLD_FRU_INTR_EVENT_REG;
-             break;
-        case CPLD_THERMAL_ALERT_INTR_EVENT:
-             reg = CPLD_THERMAL_ALERT_INTR_EVENT_REG;
-             break;
-        case CPLD_MISC_INTR_EVENT:
-             reg = CPLD_MISC_INTR_EVENT_REG;
-             break;
-        case CPLD_MAC_RST:
-             reg = CPLD_MAC_RST_REG;
-             break;
-        case CPLD_10G_PHY_RST:
-             reg = CPLD_10G_PHY_RST_REG;
-             break;
-        case CPLD_BMC_RST:
-             reg = CPLD_BMC_RST_REG;
-             break;
-        case CPLD_USB_RST:
-             reg = CPLD_USB_RST_REG;
-             break;
-        case CPLD_MUX_RST:
-             reg = CPLD_MUX_RST_REG;
-             break;
-        case CPLD_MISC_RST:
-             reg = CPLD_MISC_RST_REG;
-             break;
-        case CPLD_BMC_WATCHDOG:
-             reg = CPLD_BMC_WATCHDOG_REG;
-             break;
-        case CPLD_DAU_BD_PRES:
-             reg = CPLD_DAU_BD_PRES_REG;
-             break;
-        case CPLD_PSU_STATUS:
-             reg = CPLD_PSU_STATUS_REG;
-             break;
-        case CPLD_SYS_PW_STATUS:
-             reg = CPLD_SYS_PW_STATUS_REG;
-             break;
-        case CPLD_MISC:
-             reg = CPLD_MISC_REG;
-             break;
-        case CPLD_MUX_CTRL:
-             reg = CPLD_MUX_CTRL_REG;
-             break;
-        case CPLD_MAC_QSFP_SEL_CTRL:
-             reg = CPLD_MAC_QSFP_SEL_CTRL_REG;
-             break;
-        case CPLD_SYS_LED_CTRL_1:
-             reg = CPLD_SYS_LED_CTRL_1_REG;
-             break;
-        case CPLD_SYS_LED_CTRL_2:
-             reg = CPLD_SYS_LED_CTRL_2_REG;
-             break;
-        case CPLD_BEACON_LED_CTRL:
-             reg = CPLD_BEACON_LED_CTRL_REG;
-             break;
-        case CPLD_PORT_LED_CLR_CTRL:
-             reg = CPLD_PORT_LED_CLR_CTRL_REG;
-             break;
-        case CPLD_EVENT_DETECT_CTRL:
-             reg = CPLD_EVENT_DETECT_CTRL_REG;
-             break;
-        case CPLD_QSFPDD_MOD_INT_G0:
-             reg = CPLD_QSFPDD_MOD_INT_G0_REG;
-             break;
-        case CPLD_QSFPDD_MOD_INT_G1:
-             reg = CPLD_QSFPDD_MOD_INT_G1_REG;
-             break;
-        case CPLD_QSFPDD_MOD_INT_G2:
-             reg = CPLD_QSFPDD_MOD_INT_G2_REG;
-             break;
-        case CPLD_QSFPDD_MOD_INT_G3:
-             reg = CPLD_QSFPDD_MOD_INT_G3_REG;
-             break;
-        case CPLD_QSFPDD_PRES_G0:
-             reg = CPLD_QSFPDD_PRES_G0_REG;
-             break;
-        case CPLD_QSFPDD_PRES_G1:
-             reg = CPLD_QSFPDD_PRES_G1_REG;
-             break;
-        case CPLD_QSFPDD_PRES_G2:
-             reg = CPLD_QSFPDD_PRES_G2_REG;
-             break;
-        case CPLD_QSFPDD_PRES_G3:
-             reg = CPLD_QSFPDD_PRES_G3_REG;
-             break;
-        case CPLD_QSFPDD_FUSE_INT_G0:
-             reg = CPLD_QSFPDD_FUSE_INT_G0_REG;
-             break;
-        case CPLD_QSFPDD_FUSE_INT_G1:
-             reg = CPLD_QSFPDD_FUSE_INT_G1_REG;
-             break;
-        case CPLD_QSFPDD_FUSE_INT_G2:
-             reg = CPLD_QSFPDD_FUSE_INT_G2_REG;
-             break;
-        case CPLD_QSFPDD_FUSE_INT_G3:
-             reg = CPLD_QSFPDD_FUSE_INT_G3_REG;
-             break;
-        case CPLD_SFP_TXFAULT:
-             reg = CPLD_SFP_TXFAULT_REG;
-             break;
-        case CPLD_SFP_ABS:
-             reg = CPLD_SFP_ABS_REG;
-             break;
-        case CPLD_SFP_RXLOS:
-             reg = CPLD_SFP_RXLOS_REG;
-             break;
-        case CPLD_QSFPDD_MOD_INT_MASK_G0:
-             reg = CPLD_QSFPDD_MOD_INT_MASK_G0_REG;
-             break;
-        case CPLD_QSFPDD_MOD_INT_MASK_G1:
-             reg = CPLD_QSFPDD_MOD_INT_MASK_G1_REG;
-             break;
-        case CPLD_QSFPDD_MOD_INT_MASK_G2:
-             reg = CPLD_QSFPDD_MOD_INT_MASK_G2_REG;
-             break;
-        case CPLD_QSFPDD_MOD_INT_MASK_G3:
-             reg = CPLD_QSFPDD_MOD_INT_MASK_G3_REG;
-             break;
-        case CPLD_QSFPDD_PRES_MASK_G0:
-             reg = CPLD_QSFPDD_PRES_MASK_G0_REG;
-             break;
-        case CPLD_QSFPDD_PRES_MASK_G1:
-             reg = CPLD_QSFPDD_PRES_MASK_G1_REG;
-             break;
-        case CPLD_QSFPDD_PRES_MASK_G2:
-             reg = CPLD_QSFPDD_PRES_MASK_G2_REG;
-             break;
-        case CPLD_QSFPDD_PRES_MASK_G3:
-             reg = CPLD_QSFPDD_PRES_MASK_G3_REG;
-             break;
-        case CPLD_QSFPDD_FUSE_INT_MASK_G0:
-             reg = CPLD_QSFPDD_FUSE_INT_MASK_G0_REG;
-             break;
-        case CPLD_QSFPDD_FUSE_INT_MASK_G1:
-             reg = CPLD_QSFPDD_FUSE_INT_MASK_G1_REG;
-             break;
-        case CPLD_QSFPDD_FUSE_INT_MASK_G2:
-             reg = CPLD_QSFPDD_FUSE_INT_MASK_G2_REG;
-             break;
-        case CPLD_QSFPDD_FUSE_INT_MASK_G3:
-             reg = CPLD_QSFPDD_FUSE_INT_MASK_G3_REG;
-             break;
-        case CPLD_SFP_TXFAULT_MASK:
-             reg = CPLD_SFP_TXFAULT_MASK_REG;
-             break;
-        case CPLD_SFP_ABS_MASK:
-             reg = CPLD_SFP_ABS_MASK_REG;
-             break;
-        case CPLD_SFP_RXLOS_MASK:
-             reg = CPLD_SFP_RXLOS_MASK_REG;
-             break;
-        case CPLD_QSFPDD_MOD_INT_EVENT_G0:
-             reg = CPLD_QSFPDD_MOD_INT_EVENT_G0_REG;
-             break;
-        case CPLD_QSFPDD_MOD_INT_EVENT_G1:
-             reg = CPLD_QSFPDD_MOD_INT_EVENT_G1_REG;
-             break;
-        case CPLD_QSFPDD_MOD_INT_EVENT_G2:
-             reg = CPLD_QSFPDD_MOD_INT_EVENT_G2_REG;
-             break;
-        case CPLD_QSFPDD_MOD_INT_EVENT_G3:
-             reg = CPLD_QSFPDD_MOD_INT_EVENT_G3_REG;
-             break;
-        case CPLD_QSFPDD_PRES_EVENT_G0:
-             reg = CPLD_QSFPDD_PRES_EVENT_G0_REG;
-             break;
-        case CPLD_QSFPDD_PRES_EVENT_G1:
-             reg = CPLD_QSFPDD_PRES_EVENT_G1_REG;
-             break;
-        case CPLD_QSFPDD_PRES_EVENT_G2:
-             reg = CPLD_QSFPDD_PRES_EVENT_G2_REG;
-             break;
-        case CPLD_QSFPDD_PRES_EVENT_G3:
-             reg = CPLD_QSFPDD_PRES_EVENT_G3_REG;
-             break;
-        case CPLD_QSFPDD_FUSE_INT_EVENT_G0:
-             reg = CPLD_QSFPDD_FUSE_INT_EVENT_G0_REG;
-             break;
-        case CPLD_QSFPDD_FUSE_INT_EVENT_G1:
-             reg = CPLD_QSFPDD_FUSE_INT_EVENT_G1_REG;
-             break;
-        case CPLD_QSFPDD_FUSE_INT_EVENT_G2:
-             reg = CPLD_QSFPDD_FUSE_INT_EVENT_G2_REG;
-             break;
-        case CPLD_QSFPDD_FUSE_INT_EVENT_G3:
-             reg = CPLD_QSFPDD_FUSE_INT_EVENT_G3_REG;
-             break;
-        case CPLD_SFP_TXFAULT_EVENT:
-             reg = CPLD_SFP_TXFAULT_EVENT_REG;
-             break;
-        case CPLD_SFP_ABS_EVENT:
-             reg = CPLD_SFP_ABS_EVENT_REG;
-             break;
-        case CPLD_SFP_RXLOS_EVENT:
-             reg = CPLD_SFP_RXLOS_EVENT_REG;
-             break;
-        case CPLD_QSFPDD_RESET_CTRL_G0:
-             reg = CPLD_QSFPDD_RESET_CTRL_G0_REG;
-             break;
-        case CPLD_QSFPDD_RESET_CTRL_G1:
-             reg = CPLD_QSFPDD_RESET_CTRL_G1_REG;
-             break;
-        case CPLD_QSFPDD_RESET_CTRL_G2:
-             reg = CPLD_QSFPDD_RESET_CTRL_G2_REG;
-             break;
-        case CPLD_QSFPDD_RESET_CTRL_G3:
-             reg = CPLD_QSFPDD_RESET_CTRL_G3_REG;
-             break;
-        case CPLD_QSFPDD_LP_MODE_G0:
-             reg = CPLD_QSFPDD_LP_MODE_G0_REG;
-             break;
-        case CPLD_QSFPDD_LP_MODE_G1:
-             reg = CPLD_QSFPDD_LP_MODE_G1_REG;
-             break;
-        case CPLD_QSFPDD_LP_MODE_G2:
-             reg = CPLD_QSFPDD_LP_MODE_G2_REG;
-             break;
-        case CPLD_QSFPDD_LP_MODE_G3:
-             reg = CPLD_QSFPDD_LP_MODE_G3_REG;
-             break;
-        case CPLD_SFP_TX_DIS:
-             reg = CPLD_SFP_TX_DIS_REG;
-             break;
-        case CPLD_SFP_RS:
-             reg = CPLD_SFP_RS_REG;
-             break;
-        case CPLD_SFP_TS:
-             reg = CPLD_SFP_TS_REG;
-             break;
-        case CPLD_PORT_INT_STATUS:
-             reg = CPLD_PORT_INT_STATUS_REG;
-             break;
-        default:
-            return -EINVAL;
-    }
-    return read_cpld_reg(dev, buf, reg);
-}
-
-/* handle read for hw_rev attributes */
-static ssize_t read_hw_rev_cb(struct device *dev,
-        struct device_attribute *da, char *buf)
-{
-    struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
-    u8 reg = CPLD_HW_REV_REG;
-    u8 reg_val = 0;
-    int errno = 0;
-    u8 res;
-
-    if (!read_cpld_reg_raw_byte(dev, reg, &reg_val, &errno))
-        return errno;
-
-    switch (attr->index) {
-        case CPLD_HW_REV:
-             HW_REV_GET(reg_val, res);
-             break;
-        case CPLD_DEPH_REV:
-             DEPH_REV_GET(reg_val, res);
-             break;
-        case CPLD_BUILD_REV:
-             BUILD_REV_GET(reg_val, res);
-             break;
-        case CPLD_ID_TYPE:
-             ID_TYPE_GET(reg_val, res);
-             break;
-        default:
-            return -EINVAL;
-    }
-    return sprintf(buf, "0x%02x\n", res);
-}
-
-/* handle read for cpld_version attributes */
-static ssize_t read_cpld_version_cb(struct device *dev,
-        struct device_attribute *da, char *buf)
-{
-    struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
-    u8 reg = CPLD_VERSION_REG;
-    u8 reg_val = 0;
-    int errno = 0;
-    u8 res;
-
-    if (!read_cpld_reg_raw_byte(dev, reg, &reg_val, &errno))
-        return errno;
-
-    switch (attr->index) {
-        case CPLD_MAJOR_VER:
-             CPLD_MAJOR_VERSION_GET(reg_val, res);
-             break;
-        case CPLD_MINOR_VER:
-             CPLD_MINOR_VERSION_GET(reg_val, res);
-             break;
-        default:
-            return -EINVAL;
-    }
-    return sprintf(buf, "0x%02x\n", res);
-}
-
-/* handle read human-readable string for cpld_version attributes */
-static ssize_t read_cpld_version_h_cb(struct device *dev,
-        struct device_attribute *da, char *buf)
-{
-    u8 reg = CPLD_VERSION_REG;
-    u8 reg_val = 0;
-    int errno = 0;
-    u8 major, minor, build;
-
-    //get major/minor register value
-    if(!read_cpld_reg_raw_byte(dev, reg, &reg_val, &errno))
-        return errno;
-    CPLD_MAJOR_VERSION_GET(reg_val, major);
-    CPLD_MINOR_VERSION_GET(reg_val, minor);
-
-    //get build register value
-    reg = CPLD_BUILD_VER_REG;
-    if(!read_cpld_reg_raw_byte(dev, reg, &build, &errno))
-        return errno;
-
-    //version string format : xx.xx.xxx
-    return sprintf(buf, "%d.%02d.%03d\n", major, minor, build);
-}
-
-/* handle write for attributes */
-static ssize_t write_cpld_callback(struct device *dev,
-        struct device_attribute *da, const char *buf, size_t count)
-{
-    struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
-    u8 reg = 0;
-
-    switch (attr->index) {
-        case CPLD_MAC_INTR_MASK:
-             reg = CPLD_MAC_INTR_MASK_REG;
-             break;
-        case CPLD_10G_PHY_INTR_MASK:
-             reg = CPLD_10G_PHY_INTR_MASK_REG;
-             break;
-        case CPLD_CPLD_FRU_INTR_MASK:
-             reg = CPLD_CPLD_FRU_INTR_MASK_REG;
-             break;
-        case CPLD_THERMAL_ALERT_INTR_MASK:
-             reg = CPLD_THERMAL_ALERT_INTR_MASK_REG;
-             break;
-        case CPLD_MISC_INTR_MASK:
-             reg = CPLD_MISC_INTR_MASK_REG;
-             break;
-        case CPLD_MAC_RST:
-             reg = CPLD_MAC_RST_REG;
-             break;
-        case CPLD_10G_PHY_RST:
-             reg = CPLD_10G_PHY_RST_REG;
-             break;
-        case CPLD_BMC_RST:
-             reg = CPLD_BMC_RST_REG;
-             break;
-        case CPLD_USB_RST:
-             reg = CPLD_USB_RST_REG;
-             break;
-        case CPLD_MUX_RST:
-             reg = CPLD_MUX_RST_REG;
-             break;
-        case CPLD_MISC_RST:
-             reg = CPLD_MISC_RST_REG;
-             break;
-        case CPLD_BMC_WATCHDOG:
-             reg = CPLD_BMC_WATCHDOG_REG;
-             break;
-        case CPLD_MUX_CTRL:
-             reg = CPLD_MUX_CTRL_REG;
-             break;
-        case CPLD_MAC_QSFP_SEL_CTRL:
-             reg = CPLD_MAC_QSFP_SEL_CTRL_REG;
-             break;
-        case CPLD_BEACON_LED_CTRL:
-             reg = CPLD_BEACON_LED_CTRL_REG;
-             break;
-        case CPLD_PORT_LED_CLR_CTRL:
-             reg = CPLD_PORT_LED_CLR_CTRL_REG;
-             break;
-        case CPLD_EVENT_DETECT_CTRL:
-             reg = CPLD_EVENT_DETECT_CTRL_REG;
-             break;
-        case CPLD_QSFPDD_MOD_INT_MASK_G0:
-             reg = CPLD_QSFPDD_MOD_INT_MASK_G0_REG;
-             break;
-        case CPLD_QSFPDD_MOD_INT_MASK_G1:
-             reg = CPLD_QSFPDD_MOD_INT_MASK_G1_REG;
-             break;
-        case CPLD_QSFPDD_MOD_INT_MASK_G2:
-             reg = CPLD_QSFPDD_MOD_INT_MASK_G2_REG;
-             break;
-        case CPLD_QSFPDD_MOD_INT_MASK_G3:
-             reg = CPLD_QSFPDD_MOD_INT_MASK_G3_REG;
-             break;
-        case CPLD_QSFPDD_PRES_MASK_G0:
-             reg = CPLD_QSFPDD_PRES_MASK_G0_REG;
-             break;
-        case CPLD_QSFPDD_PRES_MASK_G1:
-             reg = CPLD_QSFPDD_PRES_MASK_G1_REG;
-             break;
-        case CPLD_QSFPDD_PRES_MASK_G2:
-             reg = CPLD_QSFPDD_PRES_MASK_G2_REG;
-             break;
-        case CPLD_QSFPDD_PRES_MASK_G3:
-             reg = CPLD_QSFPDD_PRES_MASK_G3_REG;
-             break;
-        case CPLD_QSFPDD_FUSE_INT_MASK_G0:
-             reg = CPLD_QSFPDD_FUSE_INT_MASK_G0_REG;
-             break;
-        case CPLD_QSFPDD_FUSE_INT_MASK_G1:
-             reg = CPLD_QSFPDD_FUSE_INT_MASK_G1_REG;
-             break;
-        case CPLD_QSFPDD_FUSE_INT_MASK_G2:
-             reg = CPLD_QSFPDD_FUSE_INT_MASK_G2_REG;
-             break;
-        case CPLD_QSFPDD_FUSE_INT_MASK_G3:
-             reg = CPLD_QSFPDD_FUSE_INT_MASK_G3_REG;
-             break;
-        case CPLD_SFP_TXFAULT_MASK:
-             reg = CPLD_SFP_TXFAULT_MASK_REG;
-             break;
-        case CPLD_SFP_ABS_MASK:
-             reg = CPLD_SFP_ABS_MASK_REG;
-             break;
-        case CPLD_SFP_RXLOS_MASK:
-             reg = CPLD_SFP_RXLOS_MASK_REG;
-             break;
-        case CPLD_QSFPDD_RESET_CTRL_G0:
-             reg = CPLD_QSFPDD_RESET_CTRL_G0_REG;
-             break;
-        case CPLD_QSFPDD_RESET_CTRL_G1:
-             reg = CPLD_QSFPDD_RESET_CTRL_G1_REG;
-             break;
-        case CPLD_QSFPDD_RESET_CTRL_G2:
-             reg = CPLD_QSFPDD_RESET_CTRL_G2_REG;
-             break;
-        case CPLD_QSFPDD_RESET_CTRL_G3:
-             reg = CPLD_QSFPDD_RESET_CTRL_G3_REG;
-             break;
-        case CPLD_QSFPDD_LP_MODE_G0:
-             reg = CPLD_QSFPDD_LP_MODE_G0_REG;
-             break;
-        case CPLD_QSFPDD_LP_MODE_G1:
-             reg = CPLD_QSFPDD_LP_MODE_G1_REG;
-             break;
-        case CPLD_QSFPDD_LP_MODE_G2:
-             reg = CPLD_QSFPDD_LP_MODE_G2_REG;
-             break;
-        case CPLD_QSFPDD_LP_MODE_G3:
-             reg = CPLD_QSFPDD_LP_MODE_G3_REG;
-             break;
-        case CPLD_SFP_TX_DIS:
-             reg = CPLD_SFP_TX_DIS_REG;
-             break;
-        case CPLD_SFP_RS:
-             reg = CPLD_SFP_RS_REG;
-             break;
-        case CPLD_SFP_TS:
-             reg = CPLD_SFP_TS_REG;
-             break;
-        default:
-            return -EINVAL;
-    }
-    return write_cpld_reg(dev, buf, count, reg);
-}
-
-/* set cpld register value */
-static ssize_t write_cpld_reg(struct device *dev,
-                    const char *buf,
-                    size_t count,
-                    u8 reg)
-{
-    struct i2c_client *client = to_i2c_client(dev);
-    struct cpld_data *data = i2c_get_clientdata(client);
-    u8 reg_val;
-    int ret;
-
-    if (kstrtou8(buf, 0, &reg_val) < 0)
-        return -EINVAL;
-
-    I2C_WRITE_BYTE_DATA(ret, &data->access_lock,
-               client, reg, reg_val);
-
-    if (unlikely(ret < 0)) {
-        dev_err(dev, "I2C_WRITE_BYTE_DATA error, return=%d\n", ret);
-        return ret;
-    }
-
-    return count;
-}
-
-/* add valid cpld client to list */
-static void s9300_cpld_add_client(struct i2c_client *client)
-{
-    struct cpld_client_node *node = NULL;
-
-    node = kzalloc(sizeof(struct cpld_client_node), GFP_KERNEL);
-    if (!node) {
-        dev_info(&client->dev,
-            "Can't allocate cpld_client_node for index %d\n",
-            client->addr);
-        return;
-    }
-
-    node->client = client;
-
-    mutex_lock(&list_lock);
-    list_add(&node->list, &cpld_client_list);
-    mutex_unlock(&list_lock);
-}
-
-/* remove exist cpld client in list */
-static void s9300_cpld_remove_client(struct i2c_client *client)
-{
-    struct list_head    *list_node = NULL;
-    struct cpld_client_node *cpld_node = NULL;
-    int found = 0;
-
-    mutex_lock(&list_lock);
-    list_for_each(list_node, &cpld_client_list) {
-        cpld_node = list_entry(list_node,
-                struct cpld_client_node, list);
-
-        if (cpld_node->client == client) {
-            found = 1;
-            break;
-        }
-    }
-
-    if (found) {
-        list_del(list_node);
-        kfree(cpld_node);
-    }
-    mutex_unlock(&list_lock);
-}
-
-/* cpld drvier probe */
-static int s9300_cpld_probe(struct i2c_client *client,
-                    const struct i2c_device_id *dev_id)
-{
-    int status;
-    struct cpld_data *data = NULL;
-    int ret = -EPERM;
-    int idx;
-
-    data = kzalloc(sizeof(struct cpld_data), GFP_KERNEL);
-    if (!data)
-        return -ENOMEM;
-
-    /* init cpld data for client */
-    i2c_set_clientdata(client, data);
-    mutex_init(&data->access_lock);
-
-    if (!i2c_check_functionality(client->adapter,
-                I2C_FUNC_SMBUS_BYTE_DATA)) {
-        dev_info(&client->dev,
-            "i2c_check_functionality failed (0x%x)\n",
-            client->addr);
-        status = -EIO;
-        goto exit;
-    }
-
-    /* get cpld id from device */
-    ret = i2c_smbus_read_byte_data(client, CPLD_ID_REG);
-
-    if (ret < 0) {
-        dev_info(&client->dev,
-            "fail to get cpld id (0x%x) at addr (0x%x)\n",
-            CPLD_ID_REG, client->addr);
-        status = -EIO;
-        goto exit;
-    }
-
-    CPLD_ID_ID_GET(ret,  idx);
-
-    if (INVALID(idx, cpld1, cpld3)) {
-        dev_info(&client->dev,
-            "cpld id %d(device) not valid\n", idx);
-        //status = -EPERM;
-        //goto exit;
-    }
-
-    data->index = dev_id->driver_data;
-
-    /* register sysfs hooks for different cpld group */
-    dev_info(&client->dev, "probe cpld with index %d\n", data->index);
-    switch (data->index) {
-    case cpld1:
-        status = sysfs_create_group(&client->dev.kobj,
-                    &s9300_cpld1_group);
-        break;
-    case cpld2:
-        status = sysfs_create_group(&client->dev.kobj,
-                    &s9300_cpld2_group);
-        break;
-    case cpld3:
-        status = sysfs_create_group(&client->dev.kobj,
-                    &s9300_cpld3_group);
-        break;
-    default:
-        status = -EINVAL;
-    }
-
-    if (status)
-        goto exit;
-
-    dev_info(&client->dev, "chip found\n");
-
-    /* add probe chip to client list */
-    s9300_cpld_add_client(client);
-
-    return 0;
-exit:
-    switch (data->index) {
-    case cpld1:
-        sysfs_remove_group(&client->dev.kobj, &s9300_cpld1_group);
-        break;
-    case cpld2:
-    	  sysfs_remove_group(&client->dev.kobj, &s9300_cpld2_group);
-        break;
-    case cpld3:
-    	  sysfs_remove_group(&client->dev.kobj, &s9300_cpld3_group);
-        break;
-    default:
-        break;
-    }
-    return status;
-}
-
-/* cpld drvier remove */
-static int s9300_cpld_remove(struct i2c_client *client)
-{
-    struct cpld_data *data = i2c_get_clientdata(client);
-
-    switch (data->index) {
-    case cpld1:
-        sysfs_remove_group(&client->dev.kobj, &s9300_cpld1_group);
-        break;
-    case cpld2:
-    	  sysfs_remove_group(&client->dev.kobj, &s9300_cpld2_group);
-        break;
-    case cpld3:
-    	  sysfs_remove_group(&client->dev.kobj, &s9300_cpld3_group);
-        break;
-    }
-
-    s9300_cpld_remove_client(client);
-    return 0;
-}
-
-MODULE_DEVICE_TABLE(i2c, s9300_cpld_id);
-
-static struct i2c_driver s9300_cpld_driver = {
-    .class      = I2C_CLASS_HWMON,
-    .driver = {
-        .name = "x86_64_ufispace_s9300_32d_cpld",
-    },
-    .probe = s9300_cpld_probe,
-    .remove = s9300_cpld_remove,
-    .id_table = s9300_cpld_id,
-    .address_list = cpld_i2c_addr,
-};
-
-/* provide cpld register read */
-/* cpld_idx indicate the index of cpld device */
-int s9300_cpld_read(u8 cpld_idx,
-                u8 reg)
-{
-    struct list_head *list_node = NULL;
-    struct cpld_client_node *cpld_node = NULL;
-    int ret = -EPERM;
-    struct cpld_data *data;
-
-    list_for_each(list_node, &cpld_client_list) {
-        cpld_node = list_entry(list_node,
-                    struct cpld_client_node, list);
-        data = i2c_get_clientdata(cpld_node->client);
-        if (data->index == cpld_idx) {
-            DEBUG_PRINT("cpld_idx=%d, read reg 0x%02x",
-                    cpld_idx, reg);
-            I2C_READ_BYTE_DATA(ret, &data->access_lock,
-                    cpld_node->client, reg);
-            DEBUG_PRINT("cpld_idx=%d, read reg 0x%02x = 0x%02x",
-                    cpld_idx, reg, ret);
-        break;
-        }
-    }
-
-    return ret;
-}
-EXPORT_SYMBOL(s9300_cpld_read);
-
-/* provide cpld register write */
-/* cpld_idx indicate the index of cpld device */
-int s9300_cpld_write(u8 cpld_idx,
-                u8 reg,
-                u8 value)
-{
-    struct list_head *list_node = NULL;
-    struct cpld_client_node *cpld_node = NULL;
-    int ret = -EIO;
-    struct cpld_data *data;
-
-    list_for_each(list_node, &cpld_client_list) {
-        cpld_node = list_entry(list_node,
-                    struct cpld_client_node, list);
-        data = i2c_get_clientdata(cpld_node->client);
-
-        if (data->index == cpld_idx) {
-                        I2C_WRITE_BYTE_DATA(ret, &data->access_lock,
-                        cpld_node->client,
-                        reg, value);
-            DEBUG_PRINT("cpld_idx=%d, write reg 0x%02x val 0x%02x, ret=%d",
-                            cpld_idx, reg, value, ret);
-            break;
-        }
-    }
-
-    return ret;
-}
-EXPORT_SYMBOL(s9300_cpld_write);
-
-static int __init s9300_cpld_init(void)
-{
-    mutex_init(&list_lock);
-    return i2c_add_driver(&s9300_cpld_driver);
-}
-
-static void __exit s9300_cpld_exit(void)
-{
-    i2c_del_driver(&s9300_cpld_driver);
-}
-
-MODULE_AUTHOR("Leo Lin <leo.yt.lin@ufispace.com>");
-MODULE_DESCRIPTION("x86_64_ufispace_s9300_cpld driver");
-MODULE_LICENSE("GPL");
-
-module_init(s9300_cpld_init);
-module_exit(s9300_cpld_exit);
+/*
+ * A i2c cpld driver for the ufispace_s9300_32d
+ *
+ * Copyright (C) 2017-2019 UfiSpace Technology Corporation.
+ * Jason Tsai <jason.cy.tsai@ufispace.com>
+ *
+ * Based on ad7414.c
+ * Copyright 2006 Stefan Roese <sr at denx.de>, DENX Software Engineering
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#include <linux/module.h>
+#include <linux/i2c.h>
+#include <linux/slab.h>
+#include <linux/list.h>
+#include <linux/dmi.h>
+#include <linux/hwmon.h>
+#include <linux/hwmon-sysfs.h>
+#include <linux/err.h>
+#include <linux/mutex.h>
+#include <linux/version.h>
+#include "x86-64-ufispace-s9300-32d-cpld.h"
+
+#ifdef DEBUG
+#define DEBUG_PRINT(fmt, args...) \
+    printk(KERN_INFO "%s:%s[%d]: " fmt "\r\n", \
+            __FILE__, __func__, __LINE__, ##args)
+#else
+#define DEBUG_PRINT(fmt, args...)
+#endif
+
+#define BSP_LOG_R(fmt, args...) \
+    _bsp_log (LOG_READ, KERN_INFO "%s:%s[%d]: " fmt "\r\n", \
+            __FILE__, __func__, __LINE__, ##args)
+#define BSP_LOG_W(fmt, args...) \
+    _bsp_log (LOG_WRITE, KERN_INFO "%s:%s[%d]: " fmt "\r\n", \
+            __FILE__, __func__, __LINE__, ##args)
+
+#define I2C_READ_BYTE_DATA(ret, lock, i2c_client, reg) \
+{ \
+    mutex_lock(lock); \
+    ret = i2c_smbus_read_byte_data(i2c_client, reg); \
+    mutex_unlock(lock); \
+    BSP_LOG_R("cpld[%d], reg=0x%03x, reg_val=0x%02x", data->index, reg, ret); \
+}
+#define I2C_WRITE_BYTE_DATA(ret, lock, i2c_client, reg, val) \
+{ \
+    mutex_lock(lock); \
+    ret = i2c_smbus_write_byte_data(i2c_client, reg, val); \
+    mutex_unlock(lock); \
+    BSP_LOG_W("cpld[%d], reg=0x%03x, reg_val=0x%02x", data->index, reg, val); \
+}
+
+/* CPLD sysfs attributes index  */
+enum s9300_cpld_sysfs_attributes {
+    /* CPLD1 */
+    CPLD_ACCESS_REG,
+    CPLD_REGISTER_VAL,
+    CPLD_SKU_ID,
+    CPLD_HW_REV,
+    CPLD_DEPH_REV,
+    CPLD_BUILD_REV,
+    CPLD_ID_TYPE,
+    CPLD_MAJOR_VER,
+    CPLD_MINOR_VER,
+    CPLD_BUILD_VER,
+    CPLD_VERION_H,
+    CPLD_ID,
+    CPLD_MAC_INTR,
+    CPLD_10G_PHY_INTR,
+    CPLD_CPLD_FRU_INTR,
+    CPLD_THERMAL_ALERT_INTR,
+    CPLD_MISC_INTR,
+    CPLD_SYSTEM_INTR,
+    CPLD_MAC_INTR_MASK,
+    CPLD_10G_PHY_INTR_MASK,
+    CPLD_CPLD_FRU_INTR_MASK,
+    CPLD_THERMAL_ALERT_INTR_MASK,
+    CPLD_MISC_INTR_MASK,
+    CPLD_MAC_INTR_EVENT,
+    CPLD_10G_PHY_INTR_EVENT,
+    CPLD_CPLD_FRU_INTR_EVENT,
+    CPLD_THERMAL_ALERT_INTR_EVENT,
+    CPLD_MISC_INTR_EVENT,
+    CPLD_MAC_RST,
+    CPLD_10G_PHY_RST,
+    CPLD_BMC_RST,
+    CPLD_USB_RST,
+    CPLD_MUX_RST,
+    CPLD_MISC_RST,
+    CPLD_BMC_WATCHDOG,
+    CPLD_DAU_BD_PRES,
+    CPLD_PSU_STATUS,
+    CPLD_SYS_PW_STATUS,
+    CPLD_MISC,
+    CPLD_MUX_CTRL,
+    CPLD_MAC_QSFP_SEL_CTRL,
+    CPLD_SYS_LED_CTRL_1,
+    CPLD_SYS_LED_CTRL_2,
+    CPLD_BEACON_LED_CTRL,
+    CPLD_PORT_LED_CLR_CTRL,
+    CPLD_EVENT_DETECT_CTRL,
+    /* CPLD2 */
+    CPLD_QSFPDD_MOD_INT_G0,
+    CPLD_QSFPDD_MOD_INT_G1,
+    CPLD_QSFPDD_MOD_INT_G2,
+    CPLD_QSFPDD_MOD_INT_G3,
+    CPLD_QSFPDD_PRES_G0,
+    CPLD_QSFPDD_PRES_G1,
+    CPLD_QSFPDD_PRES_G2,
+    CPLD_QSFPDD_PRES_G3,
+    CPLD_QSFPDD_FUSE_INT_G0,
+    CPLD_QSFPDD_FUSE_INT_G1,
+    CPLD_QSFPDD_FUSE_INT_G2,
+    CPLD_QSFPDD_FUSE_INT_G3,
+    CPLD_SFP_TXFAULT,
+    CPLD_SFP_ABS,
+    CPLD_SFP_RXLOS,
+    CPLD_QSFPDD_MOD_INT_MASK_G0,
+    CPLD_QSFPDD_MOD_INT_MASK_G1,
+    CPLD_QSFPDD_MOD_INT_MASK_G2,
+    CPLD_QSFPDD_MOD_INT_MASK_G3,
+    CPLD_QSFPDD_PRES_MASK_G0,
+    CPLD_QSFPDD_PRES_MASK_G1,
+    CPLD_QSFPDD_PRES_MASK_G2,
+    CPLD_QSFPDD_PRES_MASK_G3,
+    CPLD_QSFPDD_FUSE_INT_MASK_G0,
+    CPLD_QSFPDD_FUSE_INT_MASK_G1,
+    CPLD_QSFPDD_FUSE_INT_MASK_G2,
+    CPLD_QSFPDD_FUSE_INT_MASK_G3,
+    CPLD_SFP_TXFAULT_MASK,
+    CPLD_SFP_ABS_MASK,
+    CPLD_SFP_RXLOS_MASK,
+    CPLD_QSFPDD_MOD_INT_EVENT_G0,
+    CPLD_QSFPDD_MOD_INT_EVENT_G1,
+    CPLD_QSFPDD_MOD_INT_EVENT_G2,
+    CPLD_QSFPDD_MOD_INT_EVENT_G3,
+    CPLD_QSFPDD_PRES_EVENT_G0,
+    CPLD_QSFPDD_PRES_EVENT_G1,
+    CPLD_QSFPDD_PRES_EVENT_G2,
+    CPLD_QSFPDD_PRES_EVENT_G3,
+    CPLD_QSFPDD_FUSE_INT_EVENT_G0,
+    CPLD_QSFPDD_FUSE_INT_EVENT_G1,
+    CPLD_QSFPDD_FUSE_INT_EVENT_G2,
+    CPLD_QSFPDD_FUSE_INT_EVENT_G3,
+    CPLD_SFP_TXFAULT_EVENT,
+    CPLD_SFP_ABS_EVENT,
+    CPLD_SFP_RXLOS_EVENT,
+    CPLD_QSFPDD_RESET_CTRL_G0,
+    CPLD_QSFPDD_RESET_CTRL_G1,
+    CPLD_QSFPDD_RESET_CTRL_G2,
+    CPLD_QSFPDD_RESET_CTRL_G3,
+    CPLD_QSFPDD_LP_MODE_G0,
+    CPLD_QSFPDD_LP_MODE_G1,
+    CPLD_QSFPDD_LP_MODE_G2,
+    CPLD_QSFPDD_LP_MODE_G3,
+    CPLD_SFP_TX_DIS,
+    CPLD_SFP_RS,
+    CPLD_SFP_TS,
+    CPLD_PORT_INT_STATUS,
+
+    //BSP DEBUG
+    BSP_DEBUG
+};
+
+enum bsp_log_types {
+    LOG_NONE,
+    LOG_RW,
+    LOG_READ,
+    LOG_WRITE
+};
+
+enum bsp_log_ctrl {
+    LOG_DISABLE,
+    LOG_ENABLE
+};
+
+/* CPLD sysfs attributes hook functions  */
+static ssize_t read_access_register(struct device *dev,
+                struct device_attribute *da, char *buf);
+static ssize_t write_access_register(struct device *dev,
+        struct device_attribute *da, const char *buf, size_t count);
+static ssize_t read_register_value(struct device *dev,
+                struct device_attribute *da, char *buf);
+static ssize_t write_register_value(struct device *dev,
+        struct device_attribute *da, const char *buf, size_t count);
+static ssize_t read_hw_rev_cb(struct device *dev,
+        struct device_attribute *da, char *buf);
+static ssize_t read_cpld_version_cb(struct device *dev,
+        struct device_attribute *da, char *buf);
+static ssize_t read_cpld_callback(struct device *dev,
+        struct device_attribute *da, char *buf);
+static ssize_t write_cpld_callback(struct device *dev,
+        struct device_attribute *da, const char *buf, size_t count);
+static ssize_t read_cpld_version_h_cb(struct device *dev,
+        struct device_attribute *da, char *buf);
+// cpld access api
+static ssize_t read_cpld_reg(struct device *dev, char *buf, u8 reg);
+static ssize_t write_cpld_reg(struct device *dev, const char *buf, size_t count, u8 reg);
+static bool read_cpld_reg_raw_byte(struct device *dev, u8 reg, u8 *val, int *errno);
+static bool read_cpld_reg_raw_int(struct device *dev, u8 reg, int *val);
+// bsp debug api
+static ssize_t read_bsp(char *buf, char *str);
+static ssize_t write_bsp(const char *buf, char *str, size_t str_len, size_t count);
+static ssize_t read_bsp_callback(struct device *dev,
+        struct device_attribute *da, char *buf);
+static ssize_t write_bsp_callback(struct device *dev,
+        struct device_attribute *da, const char *buf, size_t count);
+
+static LIST_HEAD(cpld_client_list);  /* client list for cpld */
+static struct mutex list_lock;  /* mutex for client list */
+
+struct cpld_client_node {
+    struct i2c_client *client;
+    struct list_head   list;
+};
+
+struct cpld_data {
+    int index;                  /* CPLD index */
+    struct mutex access_lock;       /* mutex for cpld access */
+    u8 access_reg;              /* register to access */
+};
+
+/* CPLD device id and data */
+static const struct i2c_device_id s9300_cpld_id[] = {
+    { "s9300_32d_cpld1",  cpld1 },
+    { "s9300_32d_cpld2",  cpld2 },
+    { "s9300_32d_cpld3",  cpld3 },
+    {}
+};
+
+char bsp_debug[2]="0";
+u8 enable_log_read=LOG_DISABLE;
+u8 enable_log_write=LOG_DISABLE;
+
+/* Addresses scanned for s9300_cpld */
+static const unsigned short cpld_i2c_addr[] = { 0x30, 0x31, 0x32, I2C_CLIENT_END };
+
+/* define all support register access of cpld in attribute */
+/* CPLD1 */
+static SENSOR_DEVICE_ATTR(cpld_access_register, S_IWUSR | S_IRUGO, \
+        read_access_register, write_access_register, CPLD_ACCESS_REG);
+static SENSOR_DEVICE_ATTR(cpld_register_value, S_IWUSR | S_IRUGO, \
+        read_register_value, write_register_value, CPLD_REGISTER_VAL);
+static SENSOR_DEVICE_ATTR(cpld_sku_id, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_SKU_ID);
+static SENSOR_DEVICE_ATTR(cpld_hw_rev, S_IRUGO, \
+        read_hw_rev_cb, NULL, CPLD_HW_REV);
+static SENSOR_DEVICE_ATTR(cpld_deph_rev, S_IRUGO, \
+        read_hw_rev_cb, NULL, CPLD_DEPH_REV);
+static SENSOR_DEVICE_ATTR(cpld_build_rev, S_IRUGO, \
+        read_hw_rev_cb, NULL, CPLD_BUILD_REV);
+static SENSOR_DEVICE_ATTR(cpld_id_type, S_IRUGO, \
+        read_hw_rev_cb, NULL, CPLD_ID_TYPE);
+static SENSOR_DEVICE_ATTR(cpld_major_ver, S_IRUGO, \
+        read_cpld_version_cb, NULL, CPLD_MAJOR_VER);
+static SENSOR_DEVICE_ATTR(cpld_minor_ver, S_IRUGO, \
+        read_cpld_version_cb, NULL, CPLD_MINOR_VER);
+static SENSOR_DEVICE_ATTR(cpld_build_ver, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_BUILD_VER);
+static SENSOR_DEVICE_ATTR(cpld_version_h, S_IRUGO, \
+        read_cpld_version_h_cb, NULL, CPLD_VERION_H);
+static SENSOR_DEVICE_ATTR(cpld_id, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_ID);
+static SENSOR_DEVICE_ATTR(cpld_mac_intr, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_MAC_INTR);
+static SENSOR_DEVICE_ATTR(cpld_10g_phy_intr, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_10G_PHY_INTR);
+static SENSOR_DEVICE_ATTR(cpld_cpld_fru_intr, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_CPLD_FRU_INTR);
+static SENSOR_DEVICE_ATTR(cpld_thermal_alert_intr, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_THERMAL_ALERT_INTR);
+static SENSOR_DEVICE_ATTR(cpld_misc_intr, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_MISC_INTR);
+static SENSOR_DEVICE_ATTR(cpld_system_intr, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_SYSTEM_INTR);
+static SENSOR_DEVICE_ATTR(cpld_mac_intr_mask, S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, CPLD_MAC_INTR_MASK);
+static SENSOR_DEVICE_ATTR(cpld_10g_phy_intr_mask, S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, CPLD_10G_PHY_INTR_MASK);
+static SENSOR_DEVICE_ATTR(cpld_cpld_fru_intr_mask, S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, CPLD_CPLD_FRU_INTR_MASK);
+static SENSOR_DEVICE_ATTR(cpld_thermal_alert_intr_mask, S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, CPLD_THERMAL_ALERT_INTR_MASK);
+static SENSOR_DEVICE_ATTR(cpld_misc_intr_mask, S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, CPLD_MISC_INTR_MASK);
+static SENSOR_DEVICE_ATTR(cpld_mac_intr_event, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_MAC_INTR_EVENT);
+static SENSOR_DEVICE_ATTR(cpld_10g_phy_intr_event, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_10G_PHY_INTR_EVENT);
+static SENSOR_DEVICE_ATTR(cpld_cpld_fru_intr_event, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_CPLD_FRU_INTR_EVENT);
+static SENSOR_DEVICE_ATTR(cpld_thermal_alert_intr_event, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_THERMAL_ALERT_INTR_EVENT);
+static SENSOR_DEVICE_ATTR(cpld_misc_intr_event, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_MISC_INTR_EVENT);
+static SENSOR_DEVICE_ATTR(cpld_mac_rst, S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, CPLD_MAC_RST);
+static SENSOR_DEVICE_ATTR(cpld_10g_phy_rst, S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, CPLD_10G_PHY_RST);
+static SENSOR_DEVICE_ATTR(cpld_bmc_rst, S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, CPLD_BMC_RST);
+static SENSOR_DEVICE_ATTR(cpld_usb_rst, S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, CPLD_USB_RST);
+static SENSOR_DEVICE_ATTR(cpld_mux_rst, S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, CPLD_MUX_RST);
+static SENSOR_DEVICE_ATTR(cpld_misc_rst, S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, CPLD_MISC_RST);
+static SENSOR_DEVICE_ATTR(cpld_bmc_watchdog, S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, CPLD_BMC_WATCHDOG);
+static SENSOR_DEVICE_ATTR(cpld_dau_bd_pres, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_DAU_BD_PRES);
+static SENSOR_DEVICE_ATTR(cpld_psu_status, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_PSU_STATUS);
+static SENSOR_DEVICE_ATTR(cpld_sys_pw_status, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_SYS_PW_STATUS);
+static SENSOR_DEVICE_ATTR(cpld_misc, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_MISC);
+static SENSOR_DEVICE_ATTR(cpld_mux_ctrl, S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, CPLD_MUX_CTRL);
+static SENSOR_DEVICE_ATTR(cpld_mac_qsfp_sel_ctrl, S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, CPLD_MAC_QSFP_SEL_CTRL);
+static SENSOR_DEVICE_ATTR(cpld_sys_led_ctrl_1, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_SYS_LED_CTRL_1);
+static SENSOR_DEVICE_ATTR(cpld_sys_led_ctrl_2, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_SYS_LED_CTRL_2);
+static SENSOR_DEVICE_ATTR(cpld_beacon_led_ctrl, S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, CPLD_BEACON_LED_CTRL);
+static SENSOR_DEVICE_ATTR(cpld_port_led_clr_ctrl, S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, CPLD_PORT_LED_CLR_CTRL);
+static SENSOR_DEVICE_ATTR(cpld_event_detect_ctrl, S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, CPLD_EVENT_DETECT_CTRL);
+/* CPLD2 */
+static SENSOR_DEVICE_ATTR(cpld_qsfpdd_mod_int_g0, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_QSFPDD_MOD_INT_G0);
+static SENSOR_DEVICE_ATTR(cpld_qsfpdd_mod_int_g1, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_QSFPDD_MOD_INT_G1);
+static SENSOR_DEVICE_ATTR(cpld_qsfpdd_mod_int_g2, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_QSFPDD_MOD_INT_G2);
+static SENSOR_DEVICE_ATTR(cpld_qsfpdd_mod_int_g3, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_QSFPDD_MOD_INT_G3);
+static SENSOR_DEVICE_ATTR(cpld_qsfpdd_pres_g0, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_QSFPDD_PRES_G0);
+static SENSOR_DEVICE_ATTR(cpld_qsfpdd_pres_g1, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_QSFPDD_PRES_G1);
+static SENSOR_DEVICE_ATTR(cpld_qsfpdd_pres_g2, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_QSFPDD_PRES_G2);
+static SENSOR_DEVICE_ATTR(cpld_qsfpdd_pres_g3, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_QSFPDD_PRES_G3);
+static SENSOR_DEVICE_ATTR(cpld_qsfpdd_fuse_int_g0, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_QSFPDD_FUSE_INT_G0);
+static SENSOR_DEVICE_ATTR(cpld_qsfpdd_fuse_int_g1, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_QSFPDD_FUSE_INT_G1);
+static SENSOR_DEVICE_ATTR(cpld_qsfpdd_fuse_int_g2, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_QSFPDD_FUSE_INT_G2);
+static SENSOR_DEVICE_ATTR(cpld_qsfpdd_fuse_int_g3, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_QSFPDD_FUSE_INT_G3);
+static SENSOR_DEVICE_ATTR(cpld_sfp_txfault, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_SFP_TXFAULT);
+static SENSOR_DEVICE_ATTR(cpld_sfp_abs, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_SFP_ABS);
+static SENSOR_DEVICE_ATTR(cpld_sfp_rxlos, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_SFP_RXLOS);
+static SENSOR_DEVICE_ATTR(cpld_qsfpdd_mod_int_mask_g0, S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, CPLD_QSFPDD_MOD_INT_MASK_G0);
+static SENSOR_DEVICE_ATTR(cpld_qsfpdd_mod_int_mask_g1, S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, CPLD_QSFPDD_MOD_INT_MASK_G1);
+static SENSOR_DEVICE_ATTR(cpld_qsfpdd_mod_int_mask_g2, S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, CPLD_QSFPDD_MOD_INT_MASK_G2);
+static SENSOR_DEVICE_ATTR(cpld_qsfpdd_mod_int_mask_g3, S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, CPLD_QSFPDD_MOD_INT_MASK_G3);
+static SENSOR_DEVICE_ATTR(cpld_qsfpdd_pres_mask_g0, S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, CPLD_QSFPDD_PRES_MASK_G0);
+static SENSOR_DEVICE_ATTR(cpld_qsfpdd_pres_mask_g1, S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, CPLD_QSFPDD_PRES_MASK_G1);
+static SENSOR_DEVICE_ATTR(cpld_qsfpdd_pres_mask_g2, S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, CPLD_QSFPDD_PRES_MASK_G2);
+static SENSOR_DEVICE_ATTR(cpld_qsfpdd_pres_mask_g3, S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, CPLD_QSFPDD_PRES_MASK_G3);
+static SENSOR_DEVICE_ATTR(cpld_qsfpdd_fuse_int_mask_g0, S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, CPLD_QSFPDD_FUSE_INT_MASK_G0);
+static SENSOR_DEVICE_ATTR(cpld_qsfpdd_fuse_int_mask_g1, S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, CPLD_QSFPDD_FUSE_INT_MASK_G1);
+static SENSOR_DEVICE_ATTR(cpld_qsfpdd_fuse_int_mask_g2, S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, CPLD_QSFPDD_FUSE_INT_MASK_G2);
+static SENSOR_DEVICE_ATTR(cpld_qsfpdd_fuse_int_mask_g3, S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, CPLD_QSFPDD_FUSE_INT_MASK_G3);
+static SENSOR_DEVICE_ATTR(cpld_sfp_txfault_mask, S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, CPLD_SFP_TXFAULT_MASK);
+static SENSOR_DEVICE_ATTR(cpld_sfp_abs_mask, S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, CPLD_SFP_ABS_MASK);
+static SENSOR_DEVICE_ATTR(cpld_sfp_rxlos_mask, S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, CPLD_SFP_RXLOS_MASK);
+static SENSOR_DEVICE_ATTR(cpld_qsfpdd_mod_int_event_g0, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_QSFPDD_MOD_INT_EVENT_G0);
+static SENSOR_DEVICE_ATTR(cpld_qsfpdd_mod_int_event_g1, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_QSFPDD_MOD_INT_EVENT_G1);
+static SENSOR_DEVICE_ATTR(cpld_qsfpdd_mod_int_event_g2, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_QSFPDD_MOD_INT_EVENT_G2);
+static SENSOR_DEVICE_ATTR(cpld_qsfpdd_mod_int_event_g3, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_QSFPDD_MOD_INT_EVENT_G3);
+static SENSOR_DEVICE_ATTR(cpld_qsfpdd_pres_event_g0, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_QSFPDD_PRES_EVENT_G0);
+static SENSOR_DEVICE_ATTR(cpld_qsfpdd_pres_event_g1, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_QSFPDD_PRES_EVENT_G1);
+static SENSOR_DEVICE_ATTR(cpld_qsfpdd_pres_event_g2, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_QSFPDD_PRES_EVENT_G2);
+static SENSOR_DEVICE_ATTR(cpld_qsfpdd_pres_event_g3, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_QSFPDD_PRES_EVENT_G3);
+static SENSOR_DEVICE_ATTR(cpld_qsfpdd_fuse_int_event_g0, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_QSFPDD_FUSE_INT_EVENT_G0);
+static SENSOR_DEVICE_ATTR(cpld_qsfpdd_fuse_int_event_g1, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_QSFPDD_FUSE_INT_EVENT_G1);
+static SENSOR_DEVICE_ATTR(cpld_qsfpdd_fuse_int_event_g2, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_QSFPDD_FUSE_INT_EVENT_G2);
+static SENSOR_DEVICE_ATTR(cpld_qsfpdd_fuse_int_event_g3, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_QSFPDD_FUSE_INT_EVENT_G3);
+static SENSOR_DEVICE_ATTR(cpld_sfp_txfault_event, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_SFP_TXFAULT_EVENT);
+static SENSOR_DEVICE_ATTR(cpld_sfp_abs_event, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_SFP_ABS_EVENT);
+static SENSOR_DEVICE_ATTR(cpld_sfp_rxlos_event, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_SFP_RXLOS_EVENT);
+static SENSOR_DEVICE_ATTR(cpld_qsfpdd_reset_ctrl_g0, \
+	    S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, \
+        CPLD_QSFPDD_RESET_CTRL_G0);
+static SENSOR_DEVICE_ATTR(cpld_qsfpdd_reset_ctrl_g1, \
+	    S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, \
+        CPLD_QSFPDD_RESET_CTRL_G1);
+static SENSOR_DEVICE_ATTR(cpld_qsfpdd_reset_ctrl_g2, \
+	    S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, \
+        CPLD_QSFPDD_RESET_CTRL_G2);
+static SENSOR_DEVICE_ATTR(cpld_qsfpdd_reset_ctrl_g3, \
+	    S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, \
+        CPLD_QSFPDD_RESET_CTRL_G3);
+static SENSOR_DEVICE_ATTR(cpld_qsfpdd_lp_mode_g0, \
+	    S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, \
+        CPLD_QSFPDD_LP_MODE_G0);
+static SENSOR_DEVICE_ATTR(cpld_qsfpdd_lp_mode_g1, \
+	    S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, \
+        CPLD_QSFPDD_LP_MODE_G1);
+static SENSOR_DEVICE_ATTR(cpld_qsfpdd_lp_mode_g2, \
+	    S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, \
+        CPLD_QSFPDD_LP_MODE_G2);
+static SENSOR_DEVICE_ATTR(cpld_qsfpdd_lp_mode_g3, \
+	    S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, \
+        CPLD_QSFPDD_LP_MODE_G3);
+static SENSOR_DEVICE_ATTR(cpld_sfp_tx_dis, S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, CPLD_SFP_TX_DIS);
+static SENSOR_DEVICE_ATTR(cpld_sfp_rs, S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, CPLD_SFP_RS);
+static SENSOR_DEVICE_ATTR(cpld_sfp_ts, S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, CPLD_SFP_TS);
+static SENSOR_DEVICE_ATTR(cpld_port_int_status, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_PORT_INT_STATUS);
+//BSP DEBUG
+static SENSOR_DEVICE_ATTR(bsp_debug, S_IRUGO | S_IWUSR, \
+        read_bsp_callback, write_bsp_callback, BSP_DEBUG);
+
+/* define support attributes of cpldx , total 3 */
+/* cpld 1 */
+static struct attribute *s9300_cpld1_attributes[] = {
+    &sensor_dev_attr_cpld_access_register.dev_attr.attr,
+    &sensor_dev_attr_cpld_register_value.dev_attr.attr,
+    &sensor_dev_attr_cpld_sku_id.dev_attr.attr,
+    &sensor_dev_attr_cpld_hw_rev.dev_attr.attr,
+    &sensor_dev_attr_cpld_deph_rev.dev_attr.attr,
+    &sensor_dev_attr_cpld_build_rev.dev_attr.attr,
+    &sensor_dev_attr_cpld_id_type.dev_attr.attr,
+    &sensor_dev_attr_cpld_major_ver.dev_attr.attr,
+    &sensor_dev_attr_cpld_minor_ver.dev_attr.attr,
+    &sensor_dev_attr_cpld_build_ver.dev_attr.attr,
+    &sensor_dev_attr_cpld_version_h.dev_attr.attr,
+    &sensor_dev_attr_cpld_id.dev_attr.attr,
+    &sensor_dev_attr_cpld_mac_intr.dev_attr.attr,
+    &sensor_dev_attr_cpld_10g_phy_intr.dev_attr.attr,
+    &sensor_dev_attr_cpld_cpld_fru_intr.dev_attr.attr,
+    &sensor_dev_attr_cpld_thermal_alert_intr.dev_attr.attr,
+    &sensor_dev_attr_cpld_misc_intr.dev_attr.attr,
+    &sensor_dev_attr_cpld_system_intr.dev_attr.attr,
+    &sensor_dev_attr_cpld_mac_intr_mask.dev_attr.attr,
+    &sensor_dev_attr_cpld_10g_phy_intr_mask.dev_attr.attr,
+    &sensor_dev_attr_cpld_cpld_fru_intr_mask.dev_attr.attr,
+    &sensor_dev_attr_cpld_thermal_alert_intr_mask.dev_attr.attr,
+    &sensor_dev_attr_cpld_misc_intr_mask.dev_attr.attr,
+    &sensor_dev_attr_cpld_mac_intr_event.dev_attr.attr,
+    &sensor_dev_attr_cpld_10g_phy_intr_event.dev_attr.attr,
+    &sensor_dev_attr_cpld_cpld_fru_intr_event.dev_attr.attr,
+    &sensor_dev_attr_cpld_thermal_alert_intr_event.dev_attr.attr,
+    &sensor_dev_attr_cpld_misc_intr_event.dev_attr.attr,
+    &sensor_dev_attr_cpld_mac_rst.dev_attr.attr,
+    &sensor_dev_attr_cpld_10g_phy_rst.dev_attr.attr,
+    &sensor_dev_attr_cpld_bmc_rst.dev_attr.attr,
+    &sensor_dev_attr_cpld_usb_rst.dev_attr.attr,
+    &sensor_dev_attr_cpld_mux_rst.dev_attr.attr,
+    &sensor_dev_attr_cpld_misc_rst.dev_attr.attr,
+    &sensor_dev_attr_cpld_bmc_watchdog.dev_attr.attr,
+    &sensor_dev_attr_cpld_dau_bd_pres.dev_attr.attr,
+    &sensor_dev_attr_cpld_psu_status.dev_attr.attr,
+    &sensor_dev_attr_cpld_sys_pw_status.dev_attr.attr,
+    &sensor_dev_attr_cpld_misc.dev_attr.attr,
+    &sensor_dev_attr_cpld_mux_ctrl.dev_attr.attr,
+    &sensor_dev_attr_cpld_mac_qsfp_sel_ctrl.dev_attr.attr,
+    &sensor_dev_attr_cpld_sys_led_ctrl_1.dev_attr.attr,
+    &sensor_dev_attr_cpld_sys_led_ctrl_2.dev_attr.attr,
+    &sensor_dev_attr_cpld_beacon_led_ctrl.dev_attr.attr,
+    &sensor_dev_attr_cpld_port_led_clr_ctrl.dev_attr.attr,
+    &sensor_dev_attr_cpld_event_detect_ctrl.dev_attr.attr,
+    &sensor_dev_attr_bsp_debug.dev_attr.attr,
+    NULL
+};
+
+/* cpld 2 */
+static struct attribute *s9300_cpld2_attributes[] = {
+    &sensor_dev_attr_cpld_access_register.dev_attr.attr,
+    &sensor_dev_attr_cpld_register_value.dev_attr.attr,
+    &sensor_dev_attr_cpld_major_ver.dev_attr.attr,
+    &sensor_dev_attr_cpld_minor_ver.dev_attr.attr,
+    &sensor_dev_attr_cpld_build_ver.dev_attr.attr,
+    &sensor_dev_attr_cpld_version_h.dev_attr.attr,
+    &sensor_dev_attr_cpld_id.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfpdd_mod_int_g0.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfpdd_mod_int_g1.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfpdd_mod_int_g2.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfpdd_mod_int_g3.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfpdd_pres_g0.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfpdd_pres_g1.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfpdd_pres_g2.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfpdd_pres_g3.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfpdd_fuse_int_g0.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfpdd_fuse_int_g1.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfpdd_fuse_int_g2.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfpdd_fuse_int_g3.dev_attr.attr,
+    &sensor_dev_attr_cpld_sfp_txfault.dev_attr.attr,
+    &sensor_dev_attr_cpld_sfp_abs.dev_attr.attr,
+    &sensor_dev_attr_cpld_sfp_rxlos.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfpdd_mod_int_mask_g0.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfpdd_mod_int_mask_g1.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfpdd_mod_int_mask_g2.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfpdd_mod_int_mask_g3.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfpdd_pres_mask_g0.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfpdd_pres_mask_g1.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfpdd_pres_mask_g2.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfpdd_pres_mask_g3.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfpdd_fuse_int_mask_g0.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfpdd_fuse_int_mask_g1.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfpdd_fuse_int_mask_g2.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfpdd_fuse_int_mask_g3.dev_attr.attr,
+    &sensor_dev_attr_cpld_sfp_txfault_mask.dev_attr.attr,
+    &sensor_dev_attr_cpld_sfp_abs_mask.dev_attr.attr,
+    &sensor_dev_attr_cpld_sfp_rxlos_mask.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfpdd_mod_int_event_g0.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfpdd_mod_int_event_g1.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfpdd_mod_int_event_g2.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfpdd_mod_int_event_g3.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfpdd_pres_event_g0.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfpdd_pres_event_g1.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfpdd_pres_event_g2.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfpdd_pres_event_g3.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfpdd_fuse_int_event_g0.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfpdd_fuse_int_event_g1.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfpdd_fuse_int_event_g2.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfpdd_fuse_int_event_g3.dev_attr.attr,
+    &sensor_dev_attr_cpld_sfp_txfault_event.dev_attr.attr,
+    &sensor_dev_attr_cpld_sfp_abs_event.dev_attr.attr,
+    &sensor_dev_attr_cpld_sfp_rxlos_event.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfpdd_reset_ctrl_g0.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfpdd_reset_ctrl_g1.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfpdd_reset_ctrl_g2.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfpdd_reset_ctrl_g3.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfpdd_lp_mode_g0.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfpdd_lp_mode_g1.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfpdd_lp_mode_g2.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfpdd_lp_mode_g3.dev_attr.attr,
+    &sensor_dev_attr_cpld_sfp_tx_dis.dev_attr.attr,
+    &sensor_dev_attr_cpld_sfp_rs.dev_attr.attr,
+    &sensor_dev_attr_cpld_sfp_ts.dev_attr.attr,
+    &sensor_dev_attr_cpld_port_int_status.dev_attr.attr,
+    NULL
+};
+
+/* cpld 3 */
+static struct attribute *s9300_cpld3_attributes[] = {
+    &sensor_dev_attr_cpld_access_register.dev_attr.attr,
+    &sensor_dev_attr_cpld_register_value.dev_attr.attr,
+    &sensor_dev_attr_cpld_major_ver.dev_attr.attr,
+    &sensor_dev_attr_cpld_minor_ver.dev_attr.attr,
+    &sensor_dev_attr_cpld_build_ver.dev_attr.attr,
+    &sensor_dev_attr_cpld_version_h.dev_attr.attr,
+    &sensor_dev_attr_cpld_id.dev_attr.attr,
+    NULL
+};
+
+/* cpld 1 attributes group */
+static const struct attribute_group s9300_cpld1_group = {
+    .attrs = s9300_cpld1_attributes,
+};
+/* cpld 2 attributes group */
+static const struct attribute_group s9300_cpld2_group = {
+    .attrs = s9300_cpld2_attributes,
+};
+/* cpld 3 attributes group */
+static const struct attribute_group s9300_cpld3_group = {
+    .attrs = s9300_cpld3_attributes,
+};
+
+static int _bsp_log(u8 log_type, char *fmt, ...)
+{
+    if ((log_type==LOG_READ  && enable_log_read) ||
+        (log_type==LOG_WRITE && enable_log_write)) {
+        va_list args;
+        int r;
+
+        va_start(args, fmt);
+        r = vprintk(fmt, args);
+        va_end(args);
+
+        return r;
+    } else {
+        return 0;
+    }
+}
+
+static int _config_bsp_log(u8 log_type)
+{
+    switch(log_type) {
+        case LOG_NONE:
+            enable_log_read = LOG_DISABLE;
+            enable_log_write = LOG_DISABLE;
+            break;
+        case LOG_RW:
+            enable_log_read = LOG_ENABLE;
+            enable_log_write = LOG_ENABLE;
+            break;
+        case LOG_READ:
+            enable_log_read = LOG_ENABLE;
+            enable_log_write = LOG_DISABLE;
+            break;
+        case LOG_WRITE:
+            enable_log_read = LOG_DISABLE;
+            enable_log_write = LOG_ENABLE;
+            break;
+        default:
+            return -EINVAL;
+    }
+    return 0;
+}
+
+/* get bsp value */
+static ssize_t read_bsp(char *buf, char *str)
+{
+    ssize_t len=0;
+
+    len=sprintf(buf, "%s", str);
+    BSP_LOG_R("reg_val=%s", str);
+
+    return len;
+}
+
+/* set bsp value */
+static ssize_t write_bsp(const char *buf, char *str, size_t str_len, size_t count)
+{
+    snprintf(str, str_len, "%s", buf);
+    BSP_LOG_W("reg_val=%s", str);
+
+    return count;
+}
+
+/* get bsp parameter value */
+static ssize_t read_bsp_callback(struct device *dev,
+        struct device_attribute *da, char *buf)
+{
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
+    int str_len=0;
+    char *str=NULL;
+
+    switch (attr->index) {
+        case BSP_DEBUG:
+            str = bsp_debug;
+            str_len = sizeof(bsp_debug);
+            break;
+        default:
+            return -EINVAL;
+    }
+    return read_bsp(buf, str);
+}
+
+/* set bsp parameter value */
+static ssize_t write_bsp_callback(struct device *dev,
+        struct device_attribute *da, const char *buf, size_t count)
+{
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
+    int str_len=0;
+    char *str=NULL;
+    ssize_t ret = 0;
+    u8 bsp_debug_u8 = 0;
+
+    switch (attr->index) {
+        case BSP_DEBUG:
+            str = bsp_debug;
+            str_len = sizeof(bsp_debug);
+            ret = write_bsp(buf, str, str_len, count);
+
+            if (kstrtou8(buf, 0, &bsp_debug_u8) < 0) {
+                return -EINVAL;
+            } else if (_config_bsp_log(bsp_debug_u8) < 0) {
+                return -EINVAL;
+            }
+            return ret;
+        default:
+            return -EINVAL;
+    }
+    return 0;
+}
+
+/* read access register from cpld data */
+static ssize_t read_access_register(struct device *dev,
+                    struct device_attribute *da,
+                    char *buf)
+{
+    struct i2c_client *client = to_i2c_client(dev);
+    struct cpld_data *data = i2c_get_clientdata(client);
+    u8 reg = data->access_reg;
+
+    return sprintf(buf, "0x%x\n", reg);
+}
+
+/* write access register to cpld data */
+static ssize_t write_access_register(struct device *dev,
+                    struct device_attribute *da,
+                    const char *buf,
+                    size_t count)
+{
+    struct i2c_client *client = to_i2c_client(dev);
+    struct cpld_data *data = i2c_get_clientdata(client);
+    u8 reg;
+
+    if (kstrtou8(buf, 0, &reg) < 0)
+        return -EINVAL;
+
+    data->access_reg = reg;
+    return count;
+}
+
+/* read the value of access register in cpld data */
+static ssize_t read_register_value(struct device *dev,
+                    struct device_attribute *da,
+                    char *buf)
+{
+    struct i2c_client *client = to_i2c_client(dev);
+    struct cpld_data *data = i2c_get_clientdata(client);
+    u8 reg = data->access_reg;
+    int reg_val;
+
+    I2C_READ_BYTE_DATA(reg_val, &data->access_lock, client, reg);
+
+    if (reg_val < 0)
+        return reg_val;
+
+    return sprintf(buf, "0x%x\n", reg_val);
+}
+
+/* wrtie the value to access register in cpld data */
+static ssize_t write_register_value(struct device *dev,
+                    struct device_attribute *da,
+                    const char *buf,
+                    size_t count)
+{
+    struct i2c_client *client = to_i2c_client(dev);
+    struct cpld_data *data = i2c_get_clientdata(client);
+    int ret = -EIO;
+    u8 reg = data->access_reg;
+    u8 reg_val;
+
+    if (kstrtou8(buf, 0, &reg_val) < 0)
+        return -EINVAL;
+
+    I2C_WRITE_BYTE_DATA(ret, &data->access_lock, client, reg, reg_val);
+
+    if (unlikely(ret < 0)) {
+        dev_err(dev, "I2C_WRITE_BYTE_DATA error, return=%d\n", ret);
+        return ret;
+    }
+
+    return count;
+}
+
+/* get cpld register value */
+static ssize_t read_cpld_reg(struct device *dev,
+                    char *buf,
+                    u8 reg)
+{
+    int reg_val;
+
+    if (read_cpld_reg_raw_int(dev, reg, &reg_val))
+        return sprintf(buf, "0x%02x\n", reg_val);
+    else
+        return reg_val;
+}
+
+static bool read_cpld_reg_raw_int(struct device *dev, u8 reg, int *val)
+{
+    struct i2c_client *client = to_i2c_client(dev);
+    struct cpld_data *data = i2c_get_clientdata(client);
+    I2C_READ_BYTE_DATA(*val, &data->access_lock, client, reg);
+    if (unlikely(*val < 0)) {
+        dev_err(dev, "read_cpld_reg_raw_int() error, return=%d\n", *val);
+        return false;
+    }
+    return true;
+}
+
+static bool read_cpld_reg_raw_byte(struct device *dev, u8 reg, u8 *val, int *errno)
+{
+    int reg_val;
+
+    if (read_cpld_reg_raw_int(dev, reg, &reg_val)) {
+        *val = (u8)reg_val;
+        return true;
+    } else {
+        *errno = reg_val;
+        return false;
+    }
+}
+
+/* handle read for attributes */
+static ssize_t read_cpld_callback(struct device *dev,
+        struct device_attribute *da, char *buf)
+{
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
+    u8 reg = 0;
+
+    switch (attr->index) {
+        case CPLD_SKU_ID:
+             reg = CPLD_SKU_ID_REG;
+             break;
+        case CPLD_ID:
+             reg = CPLD_ID_REG;
+             break;
+        case CPLD_BUILD_VER:
+             reg = CPLD_BUILD_VER_REG;
+             break;
+        case CPLD_MAC_INTR:
+             reg = CPLD_MAC_INTR_REG;
+             break;
+        case CPLD_10G_PHY_INTR:
+             reg = CPLD_10G_PHY_INTR_REG;
+             break;
+        case CPLD_CPLD_FRU_INTR:
+             reg = CPLD_CPLD_FRU_INTR_REG;
+             break;
+        case CPLD_THERMAL_ALERT_INTR:
+             reg = CPLD_THERMAL_ALERT_INTR_REG;
+             break;
+        case CPLD_MISC_INTR:
+             reg = CPLD_MISC_INTR_REG;
+             break;
+        case CPLD_SYSTEM_INTR:
+             reg = CPLD_SYSTEM_INTR_REG;
+             break;
+        case CPLD_MAC_INTR_MASK:
+             reg = CPLD_MAC_INTR_MASK_REG;
+             break;
+        case CPLD_10G_PHY_INTR_MASK:
+             reg = CPLD_10G_PHY_INTR_MASK_REG;
+             break;
+        case CPLD_CPLD_FRU_INTR_MASK:
+             reg = CPLD_CPLD_FRU_INTR_MASK_REG;
+             break;
+        case CPLD_THERMAL_ALERT_INTR_MASK:
+             reg = CPLD_THERMAL_ALERT_INTR_MASK_REG;
+             break;
+        case CPLD_MISC_INTR_MASK:
+             reg = CPLD_MISC_INTR_MASK_REG;
+             break;
+        case CPLD_MAC_INTR_EVENT:
+             reg = CPLD_MAC_INTR_EVENT_REG;
+             break;
+        case CPLD_10G_PHY_INTR_EVENT:
+             reg = CPLD_10G_PHY_INTR_EVENT_REG;
+             break;
+        case CPLD_CPLD_FRU_INTR_EVENT:
+             reg = CPLD_CPLD_FRU_INTR_EVENT_REG;
+             break;
+        case CPLD_THERMAL_ALERT_INTR_EVENT:
+             reg = CPLD_THERMAL_ALERT_INTR_EVENT_REG;
+             break;
+        case CPLD_MISC_INTR_EVENT:
+             reg = CPLD_MISC_INTR_EVENT_REG;
+             break;
+        case CPLD_MAC_RST:
+             reg = CPLD_MAC_RST_REG;
+             break;
+        case CPLD_10G_PHY_RST:
+             reg = CPLD_10G_PHY_RST_REG;
+             break;
+        case CPLD_BMC_RST:
+             reg = CPLD_BMC_RST_REG;
+             break;
+        case CPLD_USB_RST:
+             reg = CPLD_USB_RST_REG;
+             break;
+        case CPLD_MUX_RST:
+             reg = CPLD_MUX_RST_REG;
+             break;
+        case CPLD_MISC_RST:
+             reg = CPLD_MISC_RST_REG;
+             break;
+        case CPLD_BMC_WATCHDOG:
+             reg = CPLD_BMC_WATCHDOG_REG;
+             break;
+        case CPLD_DAU_BD_PRES:
+             reg = CPLD_DAU_BD_PRES_REG;
+             break;
+        case CPLD_PSU_STATUS:
+             reg = CPLD_PSU_STATUS_REG;
+             break;
+        case CPLD_SYS_PW_STATUS:
+             reg = CPLD_SYS_PW_STATUS_REG;
+             break;
+        case CPLD_MISC:
+             reg = CPLD_MISC_REG;
+             break;
+        case CPLD_MUX_CTRL:
+             reg = CPLD_MUX_CTRL_REG;
+             break;
+        case CPLD_MAC_QSFP_SEL_CTRL:
+             reg = CPLD_MAC_QSFP_SEL_CTRL_REG;
+             break;
+        case CPLD_SYS_LED_CTRL_1:
+             reg = CPLD_SYS_LED_CTRL_1_REG;
+             break;
+        case CPLD_SYS_LED_CTRL_2:
+             reg = CPLD_SYS_LED_CTRL_2_REG;
+             break;
+        case CPLD_BEACON_LED_CTRL:
+             reg = CPLD_BEACON_LED_CTRL_REG;
+             break;
+        case CPLD_PORT_LED_CLR_CTRL:
+             reg = CPLD_PORT_LED_CLR_CTRL_REG;
+             break;
+        case CPLD_EVENT_DETECT_CTRL:
+             reg = CPLD_EVENT_DETECT_CTRL_REG;
+             break;
+        case CPLD_QSFPDD_MOD_INT_G0:
+             reg = CPLD_QSFPDD_MOD_INT_G0_REG;
+             break;
+        case CPLD_QSFPDD_MOD_INT_G1:
+             reg = CPLD_QSFPDD_MOD_INT_G1_REG;
+             break;
+        case CPLD_QSFPDD_MOD_INT_G2:
+             reg = CPLD_QSFPDD_MOD_INT_G2_REG;
+             break;
+        case CPLD_QSFPDD_MOD_INT_G3:
+             reg = CPLD_QSFPDD_MOD_INT_G3_REG;
+             break;
+        case CPLD_QSFPDD_PRES_G0:
+             reg = CPLD_QSFPDD_PRES_G0_REG;
+             break;
+        case CPLD_QSFPDD_PRES_G1:
+             reg = CPLD_QSFPDD_PRES_G1_REG;
+             break;
+        case CPLD_QSFPDD_PRES_G2:
+             reg = CPLD_QSFPDD_PRES_G2_REG;
+             break;
+        case CPLD_QSFPDD_PRES_G3:
+             reg = CPLD_QSFPDD_PRES_G3_REG;
+             break;
+        case CPLD_QSFPDD_FUSE_INT_G0:
+             reg = CPLD_QSFPDD_FUSE_INT_G0_REG;
+             break;
+        case CPLD_QSFPDD_FUSE_INT_G1:
+             reg = CPLD_QSFPDD_FUSE_INT_G1_REG;
+             break;
+        case CPLD_QSFPDD_FUSE_INT_G2:
+             reg = CPLD_QSFPDD_FUSE_INT_G2_REG;
+             break;
+        case CPLD_QSFPDD_FUSE_INT_G3:
+             reg = CPLD_QSFPDD_FUSE_INT_G3_REG;
+             break;
+        case CPLD_SFP_TXFAULT:
+             reg = CPLD_SFP_TXFAULT_REG;
+             break;
+        case CPLD_SFP_ABS:
+             reg = CPLD_SFP_ABS_REG;
+             break;
+        case CPLD_SFP_RXLOS:
+             reg = CPLD_SFP_RXLOS_REG;
+             break;
+        case CPLD_QSFPDD_MOD_INT_MASK_G0:
+             reg = CPLD_QSFPDD_MOD_INT_MASK_G0_REG;
+             break;
+        case CPLD_QSFPDD_MOD_INT_MASK_G1:
+             reg = CPLD_QSFPDD_MOD_INT_MASK_G1_REG;
+             break;
+        case CPLD_QSFPDD_MOD_INT_MASK_G2:
+             reg = CPLD_QSFPDD_MOD_INT_MASK_G2_REG;
+             break;
+        case CPLD_QSFPDD_MOD_INT_MASK_G3:
+             reg = CPLD_QSFPDD_MOD_INT_MASK_G3_REG;
+             break;
+        case CPLD_QSFPDD_PRES_MASK_G0:
+             reg = CPLD_QSFPDD_PRES_MASK_G0_REG;
+             break;
+        case CPLD_QSFPDD_PRES_MASK_G1:
+             reg = CPLD_QSFPDD_PRES_MASK_G1_REG;
+             break;
+        case CPLD_QSFPDD_PRES_MASK_G2:
+             reg = CPLD_QSFPDD_PRES_MASK_G2_REG;
+             break;
+        case CPLD_QSFPDD_PRES_MASK_G3:
+             reg = CPLD_QSFPDD_PRES_MASK_G3_REG;
+             break;
+        case CPLD_QSFPDD_FUSE_INT_MASK_G0:
+             reg = CPLD_QSFPDD_FUSE_INT_MASK_G0_REG;
+             break;
+        case CPLD_QSFPDD_FUSE_INT_MASK_G1:
+             reg = CPLD_QSFPDD_FUSE_INT_MASK_G1_REG;
+             break;
+        case CPLD_QSFPDD_FUSE_INT_MASK_G2:
+             reg = CPLD_QSFPDD_FUSE_INT_MASK_G2_REG;
+             break;
+        case CPLD_QSFPDD_FUSE_INT_MASK_G3:
+             reg = CPLD_QSFPDD_FUSE_INT_MASK_G3_REG;
+             break;
+        case CPLD_SFP_TXFAULT_MASK:
+             reg = CPLD_SFP_TXFAULT_MASK_REG;
+             break;
+        case CPLD_SFP_ABS_MASK:
+             reg = CPLD_SFP_ABS_MASK_REG;
+             break;
+        case CPLD_SFP_RXLOS_MASK:
+             reg = CPLD_SFP_RXLOS_MASK_REG;
+             break;
+        case CPLD_QSFPDD_MOD_INT_EVENT_G0:
+             reg = CPLD_QSFPDD_MOD_INT_EVENT_G0_REG;
+             break;
+        case CPLD_QSFPDD_MOD_INT_EVENT_G1:
+             reg = CPLD_QSFPDD_MOD_INT_EVENT_G1_REG;
+             break;
+        case CPLD_QSFPDD_MOD_INT_EVENT_G2:
+             reg = CPLD_QSFPDD_MOD_INT_EVENT_G2_REG;
+             break;
+        case CPLD_QSFPDD_MOD_INT_EVENT_G3:
+             reg = CPLD_QSFPDD_MOD_INT_EVENT_G3_REG;
+             break;
+        case CPLD_QSFPDD_PRES_EVENT_G0:
+             reg = CPLD_QSFPDD_PRES_EVENT_G0_REG;
+             break;
+        case CPLD_QSFPDD_PRES_EVENT_G1:
+             reg = CPLD_QSFPDD_PRES_EVENT_G1_REG;
+             break;
+        case CPLD_QSFPDD_PRES_EVENT_G2:
+             reg = CPLD_QSFPDD_PRES_EVENT_G2_REG;
+             break;
+        case CPLD_QSFPDD_PRES_EVENT_G3:
+             reg = CPLD_QSFPDD_PRES_EVENT_G3_REG;
+             break;
+        case CPLD_QSFPDD_FUSE_INT_EVENT_G0:
+             reg = CPLD_QSFPDD_FUSE_INT_EVENT_G0_REG;
+             break;
+        case CPLD_QSFPDD_FUSE_INT_EVENT_G1:
+             reg = CPLD_QSFPDD_FUSE_INT_EVENT_G1_REG;
+             break;
+        case CPLD_QSFPDD_FUSE_INT_EVENT_G2:
+             reg = CPLD_QSFPDD_FUSE_INT_EVENT_G2_REG;
+             break;
+        case CPLD_QSFPDD_FUSE_INT_EVENT_G3:
+             reg = CPLD_QSFPDD_FUSE_INT_EVENT_G3_REG;
+             break;
+        case CPLD_SFP_TXFAULT_EVENT:
+             reg = CPLD_SFP_TXFAULT_EVENT_REG;
+             break;
+        case CPLD_SFP_ABS_EVENT:
+             reg = CPLD_SFP_ABS_EVENT_REG;
+             break;
+        case CPLD_SFP_RXLOS_EVENT:
+             reg = CPLD_SFP_RXLOS_EVENT_REG;
+             break;
+        case CPLD_QSFPDD_RESET_CTRL_G0:
+             reg = CPLD_QSFPDD_RESET_CTRL_G0_REG;
+             break;
+        case CPLD_QSFPDD_RESET_CTRL_G1:
+             reg = CPLD_QSFPDD_RESET_CTRL_G1_REG;
+             break;
+        case CPLD_QSFPDD_RESET_CTRL_G2:
+             reg = CPLD_QSFPDD_RESET_CTRL_G2_REG;
+             break;
+        case CPLD_QSFPDD_RESET_CTRL_G3:
+             reg = CPLD_QSFPDD_RESET_CTRL_G3_REG;
+             break;
+        case CPLD_QSFPDD_LP_MODE_G0:
+             reg = CPLD_QSFPDD_LP_MODE_G0_REG;
+             break;
+        case CPLD_QSFPDD_LP_MODE_G1:
+             reg = CPLD_QSFPDD_LP_MODE_G1_REG;
+             break;
+        case CPLD_QSFPDD_LP_MODE_G2:
+             reg = CPLD_QSFPDD_LP_MODE_G2_REG;
+             break;
+        case CPLD_QSFPDD_LP_MODE_G3:
+             reg = CPLD_QSFPDD_LP_MODE_G3_REG;
+             break;
+        case CPLD_SFP_TX_DIS:
+             reg = CPLD_SFP_TX_DIS_REG;
+             break;
+        case CPLD_SFP_RS:
+             reg = CPLD_SFP_RS_REG;
+             break;
+        case CPLD_SFP_TS:
+             reg = CPLD_SFP_TS_REG;
+             break;
+        case CPLD_PORT_INT_STATUS:
+             reg = CPLD_PORT_INT_STATUS_REG;
+             break;
+        default:
+            return -EINVAL;
+    }
+    return read_cpld_reg(dev, buf, reg);
+}
+
+/* handle read for hw_rev attributes */
+static ssize_t read_hw_rev_cb(struct device *dev,
+        struct device_attribute *da, char *buf)
+{
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
+    u8 reg = CPLD_HW_REV_REG;
+    u8 reg_val = 0;
+    int errno = 0;
+    u8 res;
+
+    if (!read_cpld_reg_raw_byte(dev, reg, &reg_val, &errno))
+        return errno;
+
+    switch (attr->index) {
+        case CPLD_HW_REV:
+             HW_REV_GET(reg_val, res);
+             break;
+        case CPLD_DEPH_REV:
+             DEPH_REV_GET(reg_val, res);
+             break;
+        case CPLD_BUILD_REV:
+             BUILD_REV_GET(reg_val, res);
+             break;
+        case CPLD_ID_TYPE:
+             ID_TYPE_GET(reg_val, res);
+             break;
+        default:
+            return -EINVAL;
+    }
+    return sprintf(buf, "0x%02x\n", res);
+}
+
+/* handle read for cpld_version attributes */
+static ssize_t read_cpld_version_cb(struct device *dev,
+        struct device_attribute *da, char *buf)
+{
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
+    u8 reg = CPLD_VERSION_REG;
+    u8 reg_val = 0;
+    int errno = 0;
+    u8 res;
+
+    if (!read_cpld_reg_raw_byte(dev, reg, &reg_val, &errno))
+        return errno;
+
+    switch (attr->index) {
+        case CPLD_MAJOR_VER:
+             CPLD_MAJOR_VERSION_GET(reg_val, res);
+             break;
+        case CPLD_MINOR_VER:
+             CPLD_MINOR_VERSION_GET(reg_val, res);
+             break;
+        default:
+            return -EINVAL;
+    }
+    return sprintf(buf, "0x%02x\n", res);
+}
+
+/* handle read human-readable string for cpld_version attributes */
+static ssize_t read_cpld_version_h_cb(struct device *dev,
+        struct device_attribute *da, char *buf)
+{
+    u8 reg = CPLD_VERSION_REG;
+    u8 reg_val = 0;
+    int errno = 0;
+    u8 major, minor, build;
+
+    //get major/minor register value
+    if(!read_cpld_reg_raw_byte(dev, reg, &reg_val, &errno))
+        return errno;
+    CPLD_MAJOR_VERSION_GET(reg_val, major);
+    CPLD_MINOR_VERSION_GET(reg_val, minor);
+
+    //get build register value
+    reg = CPLD_BUILD_VER_REG;
+    if(!read_cpld_reg_raw_byte(dev, reg, &build, &errno))
+        return errno;
+
+    //version string format : xx.xx.xxx
+    return sprintf(buf, "%d.%02d.%03d\n", major, minor, build);
+}
+
+/* handle write for attributes */
+static ssize_t write_cpld_callback(struct device *dev,
+        struct device_attribute *da, const char *buf, size_t count)
+{
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
+    u8 reg = 0;
+
+    switch (attr->index) {
+        case CPLD_MAC_INTR_MASK:
+             reg = CPLD_MAC_INTR_MASK_REG;
+             break;
+        case CPLD_10G_PHY_INTR_MASK:
+             reg = CPLD_10G_PHY_INTR_MASK_REG;
+             break;
+        case CPLD_CPLD_FRU_INTR_MASK:
+             reg = CPLD_CPLD_FRU_INTR_MASK_REG;
+             break;
+        case CPLD_THERMAL_ALERT_INTR_MASK:
+             reg = CPLD_THERMAL_ALERT_INTR_MASK_REG;
+             break;
+        case CPLD_MISC_INTR_MASK:
+             reg = CPLD_MISC_INTR_MASK_REG;
+             break;
+        case CPLD_MAC_RST:
+             reg = CPLD_MAC_RST_REG;
+             break;
+        case CPLD_10G_PHY_RST:
+             reg = CPLD_10G_PHY_RST_REG;
+             break;
+        case CPLD_BMC_RST:
+             reg = CPLD_BMC_RST_REG;
+             break;
+        case CPLD_USB_RST:
+             reg = CPLD_USB_RST_REG;
+             break;
+        case CPLD_MUX_RST:
+             reg = CPLD_MUX_RST_REG;
+             break;
+        case CPLD_MISC_RST:
+             reg = CPLD_MISC_RST_REG;
+             break;
+        case CPLD_BMC_WATCHDOG:
+             reg = CPLD_BMC_WATCHDOG_REG;
+             break;
+        case CPLD_MUX_CTRL:
+             reg = CPLD_MUX_CTRL_REG;
+             break;
+        case CPLD_MAC_QSFP_SEL_CTRL:
+             reg = CPLD_MAC_QSFP_SEL_CTRL_REG;
+             break;
+        case CPLD_BEACON_LED_CTRL:
+             reg = CPLD_BEACON_LED_CTRL_REG;
+             break;
+        case CPLD_PORT_LED_CLR_CTRL:
+             reg = CPLD_PORT_LED_CLR_CTRL_REG;
+             break;
+        case CPLD_EVENT_DETECT_CTRL:
+             reg = CPLD_EVENT_DETECT_CTRL_REG;
+             break;
+        case CPLD_QSFPDD_MOD_INT_MASK_G0:
+             reg = CPLD_QSFPDD_MOD_INT_MASK_G0_REG;
+             break;
+        case CPLD_QSFPDD_MOD_INT_MASK_G1:
+             reg = CPLD_QSFPDD_MOD_INT_MASK_G1_REG;
+             break;
+        case CPLD_QSFPDD_MOD_INT_MASK_G2:
+             reg = CPLD_QSFPDD_MOD_INT_MASK_G2_REG;
+             break;
+        case CPLD_QSFPDD_MOD_INT_MASK_G3:
+             reg = CPLD_QSFPDD_MOD_INT_MASK_G3_REG;
+             break;
+        case CPLD_QSFPDD_PRES_MASK_G0:
+             reg = CPLD_QSFPDD_PRES_MASK_G0_REG;
+             break;
+        case CPLD_QSFPDD_PRES_MASK_G1:
+             reg = CPLD_QSFPDD_PRES_MASK_G1_REG;
+             break;
+        case CPLD_QSFPDD_PRES_MASK_G2:
+             reg = CPLD_QSFPDD_PRES_MASK_G2_REG;
+             break;
+        case CPLD_QSFPDD_PRES_MASK_G3:
+             reg = CPLD_QSFPDD_PRES_MASK_G3_REG;
+             break;
+        case CPLD_QSFPDD_FUSE_INT_MASK_G0:
+             reg = CPLD_QSFPDD_FUSE_INT_MASK_G0_REG;
+             break;
+        case CPLD_QSFPDD_FUSE_INT_MASK_G1:
+             reg = CPLD_QSFPDD_FUSE_INT_MASK_G1_REG;
+             break;
+        case CPLD_QSFPDD_FUSE_INT_MASK_G2:
+             reg = CPLD_QSFPDD_FUSE_INT_MASK_G2_REG;
+             break;
+        case CPLD_QSFPDD_FUSE_INT_MASK_G3:
+             reg = CPLD_QSFPDD_FUSE_INT_MASK_G3_REG;
+             break;
+        case CPLD_SFP_TXFAULT_MASK:
+             reg = CPLD_SFP_TXFAULT_MASK_REG;
+             break;
+        case CPLD_SFP_ABS_MASK:
+             reg = CPLD_SFP_ABS_MASK_REG;
+             break;
+        case CPLD_SFP_RXLOS_MASK:
+             reg = CPLD_SFP_RXLOS_MASK_REG;
+             break;
+        case CPLD_QSFPDD_RESET_CTRL_G0:
+             reg = CPLD_QSFPDD_RESET_CTRL_G0_REG;
+             break;
+        case CPLD_QSFPDD_RESET_CTRL_G1:
+             reg = CPLD_QSFPDD_RESET_CTRL_G1_REG;
+             break;
+        case CPLD_QSFPDD_RESET_CTRL_G2:
+             reg = CPLD_QSFPDD_RESET_CTRL_G2_REG;
+             break;
+        case CPLD_QSFPDD_RESET_CTRL_G3:
+             reg = CPLD_QSFPDD_RESET_CTRL_G3_REG;
+             break;
+        case CPLD_QSFPDD_LP_MODE_G0:
+             reg = CPLD_QSFPDD_LP_MODE_G0_REG;
+             break;
+        case CPLD_QSFPDD_LP_MODE_G1:
+             reg = CPLD_QSFPDD_LP_MODE_G1_REG;
+             break;
+        case CPLD_QSFPDD_LP_MODE_G2:
+             reg = CPLD_QSFPDD_LP_MODE_G2_REG;
+             break;
+        case CPLD_QSFPDD_LP_MODE_G3:
+             reg = CPLD_QSFPDD_LP_MODE_G3_REG;
+             break;
+        case CPLD_SFP_TX_DIS:
+             reg = CPLD_SFP_TX_DIS_REG;
+             break;
+        case CPLD_SFP_RS:
+             reg = CPLD_SFP_RS_REG;
+             break;
+        case CPLD_SFP_TS:
+             reg = CPLD_SFP_TS_REG;
+             break;
+        default:
+            return -EINVAL;
+    }
+    return write_cpld_reg(dev, buf, count, reg);
+}
+
+/* set cpld register value */
+static ssize_t write_cpld_reg(struct device *dev,
+                    const char *buf,
+                    size_t count,
+                    u8 reg)
+{
+    struct i2c_client *client = to_i2c_client(dev);
+    struct cpld_data *data = i2c_get_clientdata(client);
+    u8 reg_val;
+    int ret;
+
+    if (kstrtou8(buf, 0, &reg_val) < 0)
+        return -EINVAL;
+
+    I2C_WRITE_BYTE_DATA(ret, &data->access_lock,
+               client, reg, reg_val);
+
+    if (unlikely(ret < 0)) {
+        dev_err(dev, "I2C_WRITE_BYTE_DATA error, return=%d\n", ret);
+        return ret;
+    }
+
+    return count;
+}
+
+/* add valid cpld client to list */
+static void s9300_cpld_add_client(struct i2c_client *client)
+{
+    struct cpld_client_node *node = NULL;
+
+    node = kzalloc(sizeof(struct cpld_client_node), GFP_KERNEL);
+    if (!node) {
+        dev_info(&client->dev,
+            "Can't allocate cpld_client_node for index %d\n",
+            client->addr);
+        return;
+    }
+
+    node->client = client;
+
+    mutex_lock(&list_lock);
+    list_add(&node->list, &cpld_client_list);
+    mutex_unlock(&list_lock);
+}
+
+/* remove exist cpld client in list */
+static void s9300_cpld_remove_client(struct i2c_client *client)
+{
+    struct list_head    *list_node = NULL;
+    struct cpld_client_node *cpld_node = NULL;
+    int found = 0;
+
+    mutex_lock(&list_lock);
+    list_for_each(list_node, &cpld_client_list) {
+        cpld_node = list_entry(list_node,
+                struct cpld_client_node, list);
+
+        if (cpld_node->client == client) {
+            found = 1;
+            break;
+        }
+    }
+
+    if (found) {
+        list_del(list_node);
+        kfree(cpld_node);
+    }
+    mutex_unlock(&list_lock);
+}
+
+/* cpld drvier probe */
+static int s9300_cpld_probe(struct i2c_client *client,
+                    const struct i2c_device_id *dev_id)
+{
+    int status;
+    struct cpld_data *data = NULL;
+    int ret = -EPERM;
+    int idx;
+
+    data = kzalloc(sizeof(struct cpld_data), GFP_KERNEL);
+    if (!data)
+        return -ENOMEM;
+
+    /* init cpld data for client */
+    i2c_set_clientdata(client, data);
+    mutex_init(&data->access_lock);
+
+    if (!i2c_check_functionality(client->adapter,
+                I2C_FUNC_SMBUS_BYTE_DATA)) {
+        dev_info(&client->dev,
+            "i2c_check_functionality failed (0x%x)\n",
+            client->addr);
+        status = -EIO;
+        goto exit;
+    }
+
+    /* get cpld id from device */
+    ret = i2c_smbus_read_byte_data(client, CPLD_ID_REG);
+
+    if (ret < 0) {
+        dev_info(&client->dev,
+            "fail to get cpld id (0x%x) at addr (0x%x)\n",
+            CPLD_ID_REG, client->addr);
+        status = -EIO;
+        goto exit;
+    }
+
+    CPLD_ID_ID_GET(ret,  idx);
+
+    if (INVALID(idx, cpld1, cpld3)) {
+        dev_info(&client->dev,
+            "cpld id %d(device) not valid\n", idx);
+        //status = -EPERM;
+        //goto exit;
+    }
+
+    data->index = dev_id->driver_data;
+
+    /* register sysfs hooks for different cpld group */
+    dev_info(&client->dev, "probe cpld with index %d\n", data->index);
+    switch (data->index) {
+    case cpld1:
+        status = sysfs_create_group(&client->dev.kobj,
+                    &s9300_cpld1_group);
+        break;
+    case cpld2:
+        status = sysfs_create_group(&client->dev.kobj,
+                    &s9300_cpld2_group);
+        break;
+    case cpld3:
+        status = sysfs_create_group(&client->dev.kobj,
+                    &s9300_cpld3_group);
+        break;
+    default:
+        status = -EINVAL;
+    }
+
+    if (status)
+        goto exit;
+
+    dev_info(&client->dev, "chip found\n");
+
+    /* add probe chip to client list */
+    s9300_cpld_add_client(client);
+
+    return 0;
+exit:
+    switch (data->index) {
+    case cpld1:
+        sysfs_remove_group(&client->dev.kobj, &s9300_cpld1_group);
+        break;
+    case cpld2:
+    	  sysfs_remove_group(&client->dev.kobj, &s9300_cpld2_group);
+        break;
+    case cpld3:
+    	  sysfs_remove_group(&client->dev.kobj, &s9300_cpld3_group);
+        break;
+    default:
+        break;
+    }
+    return status;
+}
+
+/* cpld drvier remove */
+#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0)
+static int
+#else
+static void
+#endif
+s9300_cpld_remove(struct i2c_client *client)
+{
+    struct cpld_data *data = i2c_get_clientdata(client);
+
+    switch (data->index) {
+    case cpld1:
+        sysfs_remove_group(&client->dev.kobj, &s9300_cpld1_group);
+        break;
+    case cpld2:
+    	  sysfs_remove_group(&client->dev.kobj, &s9300_cpld2_group);
+        break;
+    case cpld3:
+    	  sysfs_remove_group(&client->dev.kobj, &s9300_cpld3_group);
+        break;
+    }
+
+    s9300_cpld_remove_client(client);
+#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0)
+    return 0;
+#endif
+}
+
+MODULE_DEVICE_TABLE(i2c, s9300_cpld_id);
+
+static struct i2c_driver s9300_cpld_driver = {
+    .class      = I2C_CLASS_HWMON,
+    .driver = {
+        .name = "x86_64_ufispace_s9300_32d_cpld",
+    },
+    .probe = s9300_cpld_probe,
+    .remove = s9300_cpld_remove,
+    .id_table = s9300_cpld_id,
+    .address_list = cpld_i2c_addr,
+};
+
+/* provide cpld register read */
+/* cpld_idx indicate the index of cpld device */
+int s9300_cpld_read(u8 cpld_idx,
+                u8 reg)
+{
+    struct list_head *list_node = NULL;
+    struct cpld_client_node *cpld_node = NULL;
+    int ret = -EPERM;
+    struct cpld_data *data;
+
+    list_for_each(list_node, &cpld_client_list) {
+        cpld_node = list_entry(list_node,
+                    struct cpld_client_node, list);
+        data = i2c_get_clientdata(cpld_node->client);
+        if (data->index == cpld_idx) {
+            DEBUG_PRINT("cpld_idx=%d, read reg 0x%02x",
+                    cpld_idx, reg);
+            I2C_READ_BYTE_DATA(ret, &data->access_lock,
+                    cpld_node->client, reg);
+            DEBUG_PRINT("cpld_idx=%d, read reg 0x%02x = 0x%02x",
+                    cpld_idx, reg, ret);
+        break;
+        }
+    }
+
+    return ret;
+}
+EXPORT_SYMBOL(s9300_cpld_read);
+
+/* provide cpld register write */
+/* cpld_idx indicate the index of cpld device */
+int s9300_cpld_write(u8 cpld_idx,
+                u8 reg,
+                u8 value)
+{
+    struct list_head *list_node = NULL;
+    struct cpld_client_node *cpld_node = NULL;
+    int ret = -EIO;
+    struct cpld_data *data;
+
+    list_for_each(list_node, &cpld_client_list) {
+        cpld_node = list_entry(list_node,
+                    struct cpld_client_node, list);
+        data = i2c_get_clientdata(cpld_node->client);
+
+        if (data->index == cpld_idx) {
+                        I2C_WRITE_BYTE_DATA(ret, &data->access_lock,
+                        cpld_node->client,
+                        reg, value);
+            DEBUG_PRINT("cpld_idx=%d, write reg 0x%02x val 0x%02x, ret=%d",
+                            cpld_idx, reg, value, ret);
+            break;
+        }
+    }
+
+    return ret;
+}
+EXPORT_SYMBOL(s9300_cpld_write);
+
+static int __init s9300_cpld_init(void)
+{
+    mutex_init(&list_lock);
+    return i2c_add_driver(&s9300_cpld_driver);
+}
+
+static void __exit s9300_cpld_exit(void)
+{
+    i2c_del_driver(&s9300_cpld_driver);
+}
+
+MODULE_AUTHOR("Leo Lin <leo.yt.lin@ufispace.com>");
+MODULE_DESCRIPTION("x86_64_ufispace_s9300_cpld driver");
+MODULE_LICENSE("GPL");
+
+module_init(s9300_cpld_init);
+module_exit(s9300_cpld_exit);
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/modules/x86-64-ufispace-s9300-32d-cpld.h b/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/modules/x86-64-ufispace-s9300-32d-cpld.h
index d135e476e..e2fd7e44a 100644
--- a/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/modules/x86-64-ufispace-s9300-32d-cpld.h
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/modules/x86-64-ufispace-s9300-32d-cpld.h
@@ -1,251 +1,251 @@
-/* header file for i2c cpld driver of ufispace_s9300_32d
- *
- * Copyright (C) 2017 UfiSpace Technology Corporation.
- * Leo Lin <leo.yt.lin@ufispace.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-#ifndef UFISPACE_S9300_I2C_CPLD_H
-#define UFISPACE_S9300_I2C_CPLD_H
-
-/* CPLD device index value */
-enum cpld_id {
-    cpld1,
-    cpld2,
-    cpld3,
-};
-
-enum LED_BLINK {
-    NOBLINK,
-    BLINK,
-};
-
-enum LED_BLINK_SPEED {
-    BLINK_1X,  // 0.5hz
-    BLINK_4X,  // 2hz
-};
-
-enum LED_STATUS {
-    OFF,
-    ON,
-};
-
-enum LED_YELLOW {
-    YELLOW_OFF,
-    YELLOW_ON,
-};
-
-enum LED_GREEN {
-    GREEN_OFF,
-    GREEN_ON,
-};
-
-/* QSFPDD port number */
-#define QSFPDD_MAX_PORT_NUM   32
-#define QSFPDD_MIN_PORT_NUM   1
-
-/* SFP+ port number */
-#define SFP_MAX_PORT_NUM    4
-#define SFP_MIN_PORT_NUM    1
-
-
-/* CPLD registers */
-/* CPLD 1 */
-#define CPLD_SKU_ID_REG                     0x00
-#define CPLD_HW_REV_REG	                    0x01
-#define CPLD_VERSION_REG                    0x02
-#define CPLD_ID_REG                         0x03
-#define CPLD_BUILD_VER_REG                  0x04
-// Interrupt status
-#define CPLD_MAC_INTR_REG                   0x10
-#define CPLD_10G_PHY_INTR_REG               0x13
-#define CPLD_CPLD_FRU_INTR_REG              0x14
-#define CPLD_THERMAL_ALERT_INTR_REG         0x16
-#define CPLD_MISC_INTR_REG                  0x1B
-#define CPLD_SYSTEM_INTR_REG                0x1D
-// Interrupt mask
-#define CPLD_MAC_INTR_MASK_REG              0x20
-#define CPLD_10G_PHY_INTR_MASK_REG          0x23
-#define CPLD_CPLD_FRU_INTR_MASK_REG         0x24
-#define CPLD_THERMAL_ALERT_INTR_MASK_REG    0x26
-#define CPLD_MISC_INTR_MASK_REG             0x2B
-// Interrupt event
-#define CPLD_MAC_INTR_EVENT_REG             0x30
-#define CPLD_10G_PHY_INTR_EVENT_REG         0x33
-#define CPLD_CPLD_FRU_INTR_EVENT_REG        0x14
-#define CPLD_THERMAL_ALERT_INTR_EVENT_REG   0x16
-#define CPLD_MISC_INTR_EVENT_REG            0x1B
-// Reset ctrl
-#define CPLD_MAC_RST_REG                    0x40
-#define CPLD_10G_PHY_RST_REG                0x42
-#define CPLD_BMC_RST_REG                    0x43
-#define CPLD_USB_RST_REG                    0x44
-#define CPLD_MUX_RST_REG                    0x46
-#define CPLD_MISC_RST_REG                   0x48
-#define CPLD_BMC_WATCHDOG_REG               0x4D
-// Sys status
-#define CPLD_DAU_BD_PRES_REG                0x50
-#define CPLD_PSU_STATUS_REG                 0x51
-#define CPLD_SYS_PW_STATUS_REG              0x52
-#define CPLD_MISC_REG                       0x5B
-// Mux ctrl
-#define CPLD_MUX_CTRL_REG                   0x5C
-#define CPLD_MAC_QSFP_SEL_CTRL_REG          0x5F
-// Led ctrl
-#define CPLD_SYS_LED_CTRL_1_REG             0x80
-#define CPLD_SYS_LED_CTRL_2_REG             0x81
-#define CPLD_BEACON_LED_CTRL_REG            0x84
-#define CPLD_PORT_LED_CLR_CTRL_REG          0x85
-// Event Detect Ctrl
-#define CPLD_EVENT_DETECT_CTRL_REG          0x5D
-
-/* CPLD 2 */
-/*  G0 - port 0 ~ 7
-    G1 - port 8 ~ 15
-    G2 - port 16 ~ 23
-    G3 - port 24 ~ 31
-  */
-// Interrupt status
-#define CPLD_QSFPDD_MOD_INT_G0_REG	    	0x10
-#define CPLD_QSFPDD_MOD_INT_G1_REG	    	0x11
-#define CPLD_QSFPDD_MOD_INT_G2_REG	    	0x12
-#define CPLD_QSFPDD_MOD_INT_G3_REG	    	0x13
-#define CPLD_QSFPDD_PRES_G0_REG			    0x14
-#define CPLD_QSFPDD_PRES_G1_REG			    0x15
-#define CPLD_QSFPDD_PRES_G2_REG		    	0x16
-#define CPLD_QSFPDD_PRES_G3_REG		    	0x17
-#define CPLD_QSFPDD_FUSE_INT_G0_REG	    	0x18
-#define CPLD_QSFPDD_FUSE_INT_G1_REG	    	0x19
-#define CPLD_QSFPDD_FUSE_INT_G2_REG	    	0x1A
-#define CPLD_QSFPDD_FUSE_INT_G3_REG	    	0x1B
-#define CPLD_SFP_TXFAULT_REG			    0x1D
-#define CPLD_SFP_ABS_REG				    0x1E
-#define CPLD_SFP_RXLOS_REG			    	0x1F
-// Interrupt mask
-#define CPLD_QSFPDD_MOD_INT_MASK_G0_REG		0x20
-#define CPLD_QSFPDD_MOD_INT_MASK_G1_REG		0x21
-#define CPLD_QSFPDD_MOD_INT_MASK_G2_REG		0x22
-#define CPLD_QSFPDD_MOD_INT_MASK_G3_REG		0x23
-#define CPLD_QSFPDD_PRES_MASK_G0_REG		0x24
-#define CPLD_QSFPDD_PRES_MASK_G1_REG		0x25
-#define CPLD_QSFPDD_PRES_MASK_G2_REG		0x26
-#define CPLD_QSFPDD_PRES_MASK_G3_REG		0x27
-#define CPLD_QSFPDD_FUSE_INT_MASK_G0_REG	0x28
-#define CPLD_QSFPDD_FUSE_INT_MASK_G1_REG	0x29
-#define CPLD_QSFPDD_FUSE_INT_MASK_G2_REG	0x2A
-#define CPLD_QSFPDD_FUSE_INT_MASK_G3_REG	0x2B
-#define CPLD_SFP_TXFAULT_MASK_REG			0x2D
-#define CPLD_SFP_ABS_MASK_REG				0x2E
-#define CPLD_SFP_RXLOS_MASK_REG				0x2F
-// Interrupt event
-#define CPLD_QSFPDD_MOD_INT_EVENT_G0_REG    0x30
-#define CPLD_QSFPDD_MOD_INT_EVENT_G1_REG	0x31
-#define CPLD_QSFPDD_MOD_INT_EVENT_G2_REG	0x32
-#define CPLD_QSFPDD_MOD_INT_EVENT_G3_REG	0x33
-#define CPLD_QSFPDD_PRES_EVENT_G0_REG		0x34
-#define CPLD_QSFPDD_PRES_EVENT_G1_REG		0x35
-#define CPLD_QSFPDD_PRES_EVENT_G2_REG		0x36
-#define CPLD_QSFPDD_PRES_EVENT_G3_REG		0x37
-#define CPLD_QSFPDD_FUSE_INT_EVENT_G0_REG	0x38
-#define CPLD_QSFPDD_FUSE_INT_EVENT_G1_REG	0x39
-#define CPLD_QSFPDD_FUSE_INT_EVENT_G2_REG	0x3A
-#define CPLD_QSFPDD_FUSE_INT_EVENT_G3_REG	0x3B
-#define CPLD_SFP_TXFAULT_EVENT_REG			0x3D
-#define CPLD_SFP_ABS_EVENT_REG				0x3E
-#define CPLD_SFP_RXLOS_EVENT_REG			0x3F
-// Port ctrl
-#define CPLD_QSFPDD_RESET_CTRL_G0_REG	    0x40
-#define CPLD_QSFPDD_RESET_CTRL_G1_REG	    0x41
-#define CPLD_QSFPDD_RESET_CTRL_G2_REG	    0x42
-#define CPLD_QSFPDD_RESET_CTRL_G3_REG	    0x43
-#define CPLD_QSFPDD_LP_MODE_G0_REG		    0x44
-#define CPLD_QSFPDD_LP_MODE_G1_REG		    0x45
-#define CPLD_QSFPDD_LP_MODE_G2_REG		    0x46
-#define CPLD_QSFPDD_LP_MODE_G3_REG		    0x47
-#define CPLD_SFP_TX_DIS_REG				    0x55
-#define CPLD_SFP_RS_REG					    0x56
-#define CPLD_SFP_TS_REG					    0x57
-// Port status
-#define CPLD_PORT_INT_STATUS_REG            0x58
-
-
-/* bit field structure for register value */
-struct cpld_reg_sku_id_t {
-    u8 model_id:8;
-};
-
-struct cpld_reg_hw_rev_t {
-    u8 hw_rev:2;
-    u8 deph_rev:1;
-    u8 build_rev:3;
-    u8 reserved:1;
-    u8 id_type:1;
-};
-
-struct cpld_reg_version_t {
-    u8 minor:6;
-    u8 major:2;
-};
-
-struct cpld_reg_id_t {
-    u8 id:3;
-    u8 release:5;
-};
-
-struct cpld_reg_beacon_led_ctrl_t {
-    u8 reserve:5;
-    u8 speed:1;
-    u8 blink:1;
-    u8 onoff:1;
-};
-
-/* common manipulation */
-#define INVALID(i, min, max)    ((i < min) || (i > max) ? 1u : 0u)
-#define READ_BIT(val, bit)      ((0u == (val & (1<<bit))) ? 0u : 1u)
-#define SET_BIT(val, bit)       (val |= (1 << bit))
-#define CLEAR_BIT(val, bit)     (val &= ~(1 << bit))
-#define TOGGLE_BIT(val, bit)    (val ^= (1 << bit))
-#define _BIT(n)                 (1<<(n))
-#define _BIT_MASK(len)          (BIT(len)-1)
-
-/* bitfield of register manipulation */
-#define READ_BF(bf_struct, val, bf_name, bf_value) \
-    (bf_value = ((struct bf_struct *)&val)->bf_name)
-#define READ_BF_1(bf_struct, val, bf_name, bf_value) \
-    bf_struct bf; \
-    bf.data = val; \
-    bf_value = bf.bf_name
-#define HW_REV_GET(val, res) \
-    READ_BF(cpld_reg_hw_rev_t, val, hw_rev, res)
-#define DEPH_REV_GET(val, res) \
-    READ_BF(cpld_reg_hw_rev_t, val, deph_rev, res)
-#define BUILD_REV_GET(val, res) \
-    READ_BF(cpld_reg_hw_rev_t, val, build_rev, res)
-#define ID_TYPE_GET(val, res) \
-    READ_BF(cpld_reg_hw_rev_t, val, id_type, res)
-#define CPLD_MAJOR_VERSION_GET(val, res) \
-    READ_BF(cpld_reg_version_t, val, major, res)
-#define CPLD_MINOR_VERSION_GET(val, res) \
-    READ_BF(cpld_reg_version_t, val, minor, res)
-#define CPLD_ID_ID_GET(val, res) \
-    READ_BF(cpld_reg_id_t, val, id, res)
-
-/* CPLD access functions */
-extern int s9300_cpld_read(u8 cpld_idx, u8 reg);
-extern int s9300_cpld_write(u8 cpld_idx, u8 reg, u8 value);
-
-#endif
-
+/* header file for i2c cpld driver of ufispace_s9300_32d
+ *
+ * Copyright (C) 2017 UfiSpace Technology Corporation.
+ * Leo Lin <leo.yt.lin@ufispace.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef UFISPACE_S9300_I2C_CPLD_H
+#define UFISPACE_S9300_I2C_CPLD_H
+
+/* CPLD device index value */
+enum cpld_id {
+    cpld1,
+    cpld2,
+    cpld3,
+};
+
+enum LED_BLINK {
+    NOBLINK,
+    BLINK,
+};
+
+enum LED_BLINK_SPEED {
+    BLINK_1X,  // 0.5hz
+    BLINK_4X,  // 2hz
+};
+
+enum LED_STATUS {
+    OFF,
+    ON,
+};
+
+enum LED_YELLOW {
+    YELLOW_OFF,
+    YELLOW_ON,
+};
+
+enum LED_GREEN {
+    GREEN_OFF,
+    GREEN_ON,
+};
+
+/* QSFPDD port number */
+#define QSFPDD_MAX_PORT_NUM   32
+#define QSFPDD_MIN_PORT_NUM   1
+
+/* SFP+ port number */
+#define SFP_MAX_PORT_NUM    4
+#define SFP_MIN_PORT_NUM    1
+
+
+/* CPLD registers */
+/* CPLD 1 */
+#define CPLD_SKU_ID_REG                     0x00
+#define CPLD_HW_REV_REG	                    0x01
+#define CPLD_VERSION_REG                    0x02
+#define CPLD_ID_REG                         0x03
+#define CPLD_BUILD_VER_REG                  0x04
+// Interrupt status
+#define CPLD_MAC_INTR_REG                   0x10
+#define CPLD_10G_PHY_INTR_REG               0x13
+#define CPLD_CPLD_FRU_INTR_REG              0x14
+#define CPLD_THERMAL_ALERT_INTR_REG         0x16
+#define CPLD_MISC_INTR_REG                  0x1B
+#define CPLD_SYSTEM_INTR_REG                0x1D
+// Interrupt mask
+#define CPLD_MAC_INTR_MASK_REG              0x20
+#define CPLD_10G_PHY_INTR_MASK_REG          0x23
+#define CPLD_CPLD_FRU_INTR_MASK_REG         0x24
+#define CPLD_THERMAL_ALERT_INTR_MASK_REG    0x26
+#define CPLD_MISC_INTR_MASK_REG             0x2B
+// Interrupt event
+#define CPLD_MAC_INTR_EVENT_REG             0x30
+#define CPLD_10G_PHY_INTR_EVENT_REG         0x33
+#define CPLD_CPLD_FRU_INTR_EVENT_REG        0x14
+#define CPLD_THERMAL_ALERT_INTR_EVENT_REG   0x16
+#define CPLD_MISC_INTR_EVENT_REG            0x1B
+// Reset ctrl
+#define CPLD_MAC_RST_REG                    0x40
+#define CPLD_10G_PHY_RST_REG                0x42
+#define CPLD_BMC_RST_REG                    0x43
+#define CPLD_USB_RST_REG                    0x44
+#define CPLD_MUX_RST_REG                    0x46
+#define CPLD_MISC_RST_REG                   0x48
+#define CPLD_BMC_WATCHDOG_REG               0x4D
+// Sys status
+#define CPLD_DAU_BD_PRES_REG                0x50
+#define CPLD_PSU_STATUS_REG                 0x51
+#define CPLD_SYS_PW_STATUS_REG              0x52
+#define CPLD_MISC_REG                       0x5B
+// Mux ctrl
+#define CPLD_MUX_CTRL_REG                   0x5C
+#define CPLD_MAC_QSFP_SEL_CTRL_REG          0x5F
+// Led ctrl
+#define CPLD_SYS_LED_CTRL_1_REG             0x80
+#define CPLD_SYS_LED_CTRL_2_REG             0x81
+#define CPLD_BEACON_LED_CTRL_REG            0x84
+#define CPLD_PORT_LED_CLR_CTRL_REG          0x85
+// Event Detect Ctrl
+#define CPLD_EVENT_DETECT_CTRL_REG          0x5D
+
+/* CPLD 2 */
+/*  G0 - port 0 ~ 7
+    G1 - port 8 ~ 15
+    G2 - port 16 ~ 23
+    G3 - port 24 ~ 31
+  */
+// Interrupt status
+#define CPLD_QSFPDD_MOD_INT_G0_REG	    	0x10
+#define CPLD_QSFPDD_MOD_INT_G1_REG	    	0x11
+#define CPLD_QSFPDD_MOD_INT_G2_REG	    	0x12
+#define CPLD_QSFPDD_MOD_INT_G3_REG	    	0x13
+#define CPLD_QSFPDD_PRES_G0_REG			    0x14
+#define CPLD_QSFPDD_PRES_G1_REG			    0x15
+#define CPLD_QSFPDD_PRES_G2_REG		    	0x16
+#define CPLD_QSFPDD_PRES_G3_REG		    	0x17
+#define CPLD_QSFPDD_FUSE_INT_G0_REG	    	0x18
+#define CPLD_QSFPDD_FUSE_INT_G1_REG	    	0x19
+#define CPLD_QSFPDD_FUSE_INT_G2_REG	    	0x1A
+#define CPLD_QSFPDD_FUSE_INT_G3_REG	    	0x1B
+#define CPLD_SFP_TXFAULT_REG			    0x1D
+#define CPLD_SFP_ABS_REG				    0x1E
+#define CPLD_SFP_RXLOS_REG			    	0x1F
+// Interrupt mask
+#define CPLD_QSFPDD_MOD_INT_MASK_G0_REG		0x20
+#define CPLD_QSFPDD_MOD_INT_MASK_G1_REG		0x21
+#define CPLD_QSFPDD_MOD_INT_MASK_G2_REG		0x22
+#define CPLD_QSFPDD_MOD_INT_MASK_G3_REG		0x23
+#define CPLD_QSFPDD_PRES_MASK_G0_REG		0x24
+#define CPLD_QSFPDD_PRES_MASK_G1_REG		0x25
+#define CPLD_QSFPDD_PRES_MASK_G2_REG		0x26
+#define CPLD_QSFPDD_PRES_MASK_G3_REG		0x27
+#define CPLD_QSFPDD_FUSE_INT_MASK_G0_REG	0x28
+#define CPLD_QSFPDD_FUSE_INT_MASK_G1_REG	0x29
+#define CPLD_QSFPDD_FUSE_INT_MASK_G2_REG	0x2A
+#define CPLD_QSFPDD_FUSE_INT_MASK_G3_REG	0x2B
+#define CPLD_SFP_TXFAULT_MASK_REG			0x2D
+#define CPLD_SFP_ABS_MASK_REG				0x2E
+#define CPLD_SFP_RXLOS_MASK_REG				0x2F
+// Interrupt event
+#define CPLD_QSFPDD_MOD_INT_EVENT_G0_REG    0x30
+#define CPLD_QSFPDD_MOD_INT_EVENT_G1_REG	0x31
+#define CPLD_QSFPDD_MOD_INT_EVENT_G2_REG	0x32
+#define CPLD_QSFPDD_MOD_INT_EVENT_G3_REG	0x33
+#define CPLD_QSFPDD_PRES_EVENT_G0_REG		0x34
+#define CPLD_QSFPDD_PRES_EVENT_G1_REG		0x35
+#define CPLD_QSFPDD_PRES_EVENT_G2_REG		0x36
+#define CPLD_QSFPDD_PRES_EVENT_G3_REG		0x37
+#define CPLD_QSFPDD_FUSE_INT_EVENT_G0_REG	0x38
+#define CPLD_QSFPDD_FUSE_INT_EVENT_G1_REG	0x39
+#define CPLD_QSFPDD_FUSE_INT_EVENT_G2_REG	0x3A
+#define CPLD_QSFPDD_FUSE_INT_EVENT_G3_REG	0x3B
+#define CPLD_SFP_TXFAULT_EVENT_REG			0x3D
+#define CPLD_SFP_ABS_EVENT_REG				0x3E
+#define CPLD_SFP_RXLOS_EVENT_REG			0x3F
+// Port ctrl
+#define CPLD_QSFPDD_RESET_CTRL_G0_REG	    0x40
+#define CPLD_QSFPDD_RESET_CTRL_G1_REG	    0x41
+#define CPLD_QSFPDD_RESET_CTRL_G2_REG	    0x42
+#define CPLD_QSFPDD_RESET_CTRL_G3_REG	    0x43
+#define CPLD_QSFPDD_LP_MODE_G0_REG		    0x44
+#define CPLD_QSFPDD_LP_MODE_G1_REG		    0x45
+#define CPLD_QSFPDD_LP_MODE_G2_REG		    0x46
+#define CPLD_QSFPDD_LP_MODE_G3_REG		    0x47
+#define CPLD_SFP_TX_DIS_REG				    0x55
+#define CPLD_SFP_RS_REG					    0x56
+#define CPLD_SFP_TS_REG					    0x57
+// Port status
+#define CPLD_PORT_INT_STATUS_REG            0x58
+
+
+/* bit field structure for register value */
+struct cpld_reg_sku_id_t {
+    u8 model_id:8;
+};
+
+struct cpld_reg_hw_rev_t {
+    u8 hw_rev:2;
+    u8 deph_rev:1;
+    u8 build_rev:3;
+    u8 reserved:1;
+    u8 id_type:1;
+};
+
+struct cpld_reg_version_t {
+    u8 minor:6;
+    u8 major:2;
+};
+
+struct cpld_reg_id_t {
+    u8 id:3;
+    u8 release:5;
+};
+
+struct cpld_reg_beacon_led_ctrl_t {
+    u8 reserve:5;
+    u8 speed:1;
+    u8 blink:1;
+    u8 onoff:1;
+};
+
+/* common manipulation */
+#define INVALID(i, min, max)    ((i < min) || (i > max) ? 1u : 0u)
+#define READ_BIT(val, bit)      ((0u == (val & (1<<bit))) ? 0u : 1u)
+#define SET_BIT(val, bit)       (val |= (1 << bit))
+#define CLEAR_BIT(val, bit)     (val &= ~(1 << bit))
+#define TOGGLE_BIT(val, bit)    (val ^= (1 << bit))
+#define _BIT(n)                 (1<<(n))
+#define _BIT_MASK(len)          (BIT(len)-1)
+
+/* bitfield of register manipulation */
+#define READ_BF(bf_struct, val, bf_name, bf_value) \
+    (bf_value = ((struct bf_struct *)&val)->bf_name)
+#define READ_BF_1(bf_struct, val, bf_name, bf_value) \
+    bf_struct bf; \
+    bf.data = val; \
+    bf_value = bf.bf_name
+#define HW_REV_GET(val, res) \
+    READ_BF(cpld_reg_hw_rev_t, val, hw_rev, res)
+#define DEPH_REV_GET(val, res) \
+    READ_BF(cpld_reg_hw_rev_t, val, deph_rev, res)
+#define BUILD_REV_GET(val, res) \
+    READ_BF(cpld_reg_hw_rev_t, val, build_rev, res)
+#define ID_TYPE_GET(val, res) \
+    READ_BF(cpld_reg_hw_rev_t, val, id_type, res)
+#define CPLD_MAJOR_VERSION_GET(val, res) \
+    READ_BF(cpld_reg_version_t, val, major, res)
+#define CPLD_MINOR_VERSION_GET(val, res) \
+    READ_BF(cpld_reg_version_t, val, minor, res)
+#define CPLD_ID_ID_GET(val, res) \
+    READ_BF(cpld_reg_id_t, val, id, res)
+
+/* CPLD access functions */
+extern int s9300_cpld_read(u8 cpld_idx, u8 reg);
+extern int s9300_cpld_write(u8 cpld_idx, u8 reg, u8 value);
+
+#endif
+
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/modules/x86-64-ufispace-s9300-32d-lpc.c b/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/modules/x86-64-ufispace-s9300-32d-lpc.c
index a00d83202..d227f6317 100644
--- a/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/modules/x86-64-ufispace-s9300-32d-lpc.c
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/modules/x86-64-ufispace-s9300-32d-lpc.c
@@ -1,816 +1,850 @@
-/*
- * A lpc driver for the ufispace_s9300_32d
- *
- * Copyright (C) 2017-2020 UfiSpace Technology Corporation.
- * Jason Tsai <jason.cy.tsai@ufispace.com>
- *
- * Based on ad7414.c
- * Copyright 2006 Stefan Roese <sr at denx.de>, DENX Software Engineering
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-#include <linux/module.h>
-#include <linux/delay.h>
-#include <linux/io.h>
-#include <linux/platform_device.h>
-#include <linux/hwmon-sysfs.h>
-
-#define BSP_LOG_R(fmt, args...) \
-    _bsp_log (LOG_READ, KERN_INFO "%s:%s[%d]: " fmt "\r\n", \
-            __FILE__, __func__, __LINE__, ##args)
-#define BSP_LOG_W(fmt, args...) \
-    _bsp_log (LOG_WRITE, KERN_INFO "%s:%s[%d]: " fmt "\r\n", \
-            __FILE__, __func__, __LINE__, ##args)
-
-#define DRIVER_NAME "x86_64_ufispace_s9300_32d_lpc"
-#define CPU_BDE 0
-#define CPU_SKY 1
-#define CPU_TYPE CPU_SKY
-
-/* LPC registers */
-
-#define REG_BASE_CPU                      0x600
-
-#if CPU_TYPE == CPU_SKY
-#define REG_BASE_MB                       0xE00
-#define REG_BASE_I2C_ALERT                0x700
-#else
-#define REG_BASE_MB                       0x700
-#define REG_BASE_I2C_ALERT                0xF000
-#endif
-
-//CPU CPLD
-#define REG_CPU_CPLD_VERSION              (REG_BASE_CPU + 0x00)
-#define REG_CPU_STATUS_0                  (REG_BASE_CPU + 0x01)
-#define REG_CPU_STATUS_1                  (REG_BASE_CPU + 0x02)
-#define REG_CPU_CTRL_0                    (REG_BASE_CPU + 0x03)
-#define REG_CPU_CTRL_1                    (REG_BASE_CPU + 0x04)
-#define REG_CPU_CPLD_BUILD                (REG_BASE_CPU + 0xE0)
-
-//MB CPLD
-//TBD, need to change after CPLD spec release
-#define REG_MB_BRD_ID_0                   (REG_BASE_MB + 0x00)
-#define REG_MB_BRD_ID_1                   (REG_BASE_MB + 0x01)
-#define REG_MB_CPLD_VERSION               (REG_BASE_MB + 0x02)
-#define REG_MB_CPLD_BUILD                 (REG_BASE_MB + 0x04)
-#define REG_MB_MUX_RESET                  (REG_BASE_MB + 0x46)
-#define REG_MB_MUX_CTRL                   (REG_BASE_MB + 0x5c)
-
-//I2C Alert
-#if CPU_TYPE == CPU_SKY
-#define REG_ALERT_STATUS                  (REG_BASE_I2C_ALERT + 0x80)
-#else
-#define REG_ALERT_STATUS                  (REG_BASE_I2C_ALERT + 0x00)
-#define REG_ALERT_DISABLE                 (REG_BASE_I2C_ALERT + 0x11)
-#endif
-
-#define MASK_ALL                          (0xFF)
-#define LPC_MDELAY                        (5)
-
-/* LPC sysfs attributes index  */
-enum lpc_sysfs_attributes {
-    //CPU CPLD
-    ATT_CPU_CPLD_VERSION,
-    ATT_CPU_CPLD_VERSION_H,
-    ATT_CPU_BIOS_BOOT_ROM,
-    ATT_CPU_BIOS_BOOT_CFG,
-    ATT_CPU_CPLD_BUILD,
-    //MB CPLD
-    ATT_MB_BRD_ID_0,
-    ATT_MB_BRD_ID_1,
-    ATT_MB_CPLD_1_VERSION,
-    ATT_MB_CPLD_1_VERSION_H,
-    ATT_MB_CPLD_1_BUILD,
-    ATT_MB_MUX_CTRL,
-    ATT_MB_MUX_RESET,
-    ATT_MB_BRD_SKU_ID,
-    ATT_MB_BRD_HW_ID,
-    ATT_MB_BRD_ID_TYPE,
-    ATT_MB_BRD_BUILD_ID,
-    ATT_MB_BRD_DEPH_ID,
-    //I2C Alert
-    ATT_ALERT_STATUS,
-#if CPU_TYPE == CPU_BDE
-    ATT_ALERT_DISABLE,
-#endif
-    //BSP
-    ATT_BSP_VERSION,
-    ATT_BSP_DEBUG,
-    ATT_BSP_REG,
-    ATT_MAX
-};
-
-enum bsp_log_types {
-    LOG_NONE,
-    LOG_RW,
-    LOG_READ,
-    LOG_WRITE
-};
-
-enum bsp_log_ctrl {
-    LOG_DISABLE,
-    LOG_ENABLE
-};
-
-struct lpc_data_s {
-    struct mutex    access_lock;
-};
-
-struct lpc_data_s *lpc_data;
-char bsp_version[16]="";
-char bsp_debug[2]="0";
-char bsp_reg[8]="0x0";
-u8 enable_log_read=LOG_DISABLE;
-u8 enable_log_write=LOG_DISABLE;
-
-/* reg shift */
-static u8 _shift(u8 mask)
-{
-    int i=0, mask_one=1;
-
-    for(i=0; i<8; ++i) {
-	      if ((mask & mask_one) == 1)
-	    	    return i;
-        else
-            mask >>= 1;
-    }
-
-    return -1;
-}
-
-/* reg mask and shift */
-static u8 _mask_shift(u8 val, u8 mask)
-{
-    int shift=0;
-
-    shift = _shift(mask);
-
-    return (val & mask) >> shift;
-}
-
-static u8 _bit_operation(u8 reg_val, u8 bit, u8 bit_val)
-{
-    if (bit_val == 0)
-        reg_val = reg_val & ~(1 << bit);
-    else
-        reg_val = reg_val | (1 << bit);
-    return reg_val;
-}
-
-static int _bsp_log(u8 log_type, char *fmt, ...)
-{
-    if ((log_type==LOG_READ  && enable_log_read) ||
-        (log_type==LOG_WRITE && enable_log_write)) {
-        va_list args;
-        int r;
-
-        va_start(args, fmt);
-        r = vprintk(fmt, args);
-        va_end(args);
-
-        return r;
-    } else {
-        return 0;
-    }
-}
-
-static int _config_bsp_log(u8 log_type)
-{
-    switch(log_type) {
-        case LOG_NONE:
-            enable_log_read = LOG_DISABLE;
-            enable_log_write = LOG_DISABLE;
-            break;
-        case LOG_RW:
-            enable_log_read = LOG_ENABLE;
-            enable_log_write = LOG_ENABLE;
-            break;
-        case LOG_READ:
-            enable_log_read = LOG_ENABLE;
-            enable_log_write = LOG_DISABLE;
-            break;
-        case LOG_WRITE:
-            enable_log_read = LOG_DISABLE;
-            enable_log_write = LOG_ENABLE;
-            break;
-        default:
-            return -EINVAL;
-    }
-    return 0;
-}
-
-/* get lpc register value */
-static u8 _read_lpc_reg(u16 reg, u8 mask)
-{
-    u8 reg_val;
-
-    mutex_lock(&lpc_data->access_lock);
-    reg_val=_mask_shift(inb(reg), mask);
-    mutex_unlock(&lpc_data->access_lock);
-
-    BSP_LOG_R("reg=0x%03x, reg_val=0x%02x", reg, reg_val);
-
-    return reg_val;
-}
-
-/* get lpc register value */
-static ssize_t read_lpc_reg(u16 reg, u8 mask, char *buf)
-{
-    u8 reg_val;
-    int len=0;
-
-    reg_val = _read_lpc_reg(reg, mask);
-    len=sprintf(buf,"0x%x\n", reg_val);
-
-    return len;
-}
-
-/* set lpc register value */
-static ssize_t write_lpc_reg(u16 reg, u8 mask, const char *buf, size_t count)
-{
-    u8 reg_val, reg_val_now, shift;
-
-    if (kstrtou8(buf, 0, &reg_val) < 0)
-        return -EINVAL;
-
-    //apply SINGLE BIT operation if mask is specified, multiple bits are not supported
-    if (mask != MASK_ALL) {
-        reg_val_now = _read_lpc_reg(reg, 0x0);
-        shift = _shift(mask);
-        reg_val = _bit_operation(reg_val_now, shift, reg_val);
-    }
-
-    mutex_lock(&lpc_data->access_lock);
-
-    outb(reg_val, reg);
-    mdelay(LPC_MDELAY);
-
-    mutex_unlock(&lpc_data->access_lock);
-
-    BSP_LOG_W("reg=0x%03x, reg_val=0x%02x", reg, reg_val);
-
-    return count;
-}
-
-/* get bsp value */
-static ssize_t read_bsp(char *buf, char *str)
-{
-    ssize_t len=0;
-
-    mutex_lock(&lpc_data->access_lock);
-    len=sprintf(buf, "%s", str);
-    mutex_unlock(&lpc_data->access_lock);
-
-    BSP_LOG_R("reg_val=%s", str);
-
-    return len;
-}
-
-/* set bsp value */
-static ssize_t write_bsp(const char *buf, char *str, size_t str_len, size_t count)
-{
-    mutex_lock(&lpc_data->access_lock);
-    snprintf(str, str_len, "%s", buf);
-    mutex_unlock(&lpc_data->access_lock);
-
-    BSP_LOG_W("reg_val=%s", str);
-
-    return count;
-}
-
-/* get cpu cpld version in human readable format */
-static ssize_t read_cpu_cpld_version_h(struct device *dev,
-        struct device_attribute *da, char *buf)
-{
-    ssize_t len=0;
-    u16 reg = REG_CPU_CPLD_VERSION;
-    u8 mask = MASK_ALL;
-    u8 mask_major = 0b11000000;
-    u8 mask_minor = 0b00111111;
-    u8 reg_val;
-    u8 major, minor, build;
-
-    mutex_lock(&lpc_data->access_lock);
-    reg_val = _mask_shift(inb(reg), mask);
-    major = _mask_shift(reg_val, mask_major);
-    minor = _mask_shift(reg_val, mask_minor);
-    reg = REG_CPU_CPLD_BUILD;
-    build = _mask_shift(inb(reg), mask);
-    len = sprintf(buf, "%d.%02d.%03d\n", major, minor, build);
-    mutex_unlock(&lpc_data->access_lock);
-
-    BSP_LOG_R("reg=0x%03x, reg_val=0x%02x", reg, reg_val);
-
-    return len;
-}
-
-/* get mb cpld version in human readable format */
-static ssize_t read_mb_cpld_1_version_h(struct device *dev,
-        struct device_attribute *da, char *buf)
-{
-    ssize_t len=0;
-    u16 reg = REG_MB_CPLD_VERSION;
-    u8 mask = MASK_ALL;
-    u8 mask_major = 0b11000000;
-    u8 mask_minor = 0b00111111;
-    u8 reg_val;
-    u8 major, minor, build;
-
-    mutex_lock(&lpc_data->access_lock);
-    reg_val = _mask_shift(inb(reg), mask);
-    major = _mask_shift(reg_val, mask_major);
-    minor = _mask_shift(reg_val, mask_minor);
-    reg = REG_MB_CPLD_BUILD;
-    build = _mask_shift(inb(reg), mask);
-    len = sprintf(buf, "%d.%02d.%03d\n", major, minor, build);
-    mutex_unlock(&lpc_data->access_lock);
-
-    BSP_LOG_R("reg=0x%03x, reg_val=0x%02x", reg, reg_val);
-
-    return len;
-}
-
-/* get mux_reset register value */
-static ssize_t read_mux_reset_callback(struct device *dev,
-        struct device_attribute *da, char *buf)
-{
-    int len = 0;
-    u16 reg = REG_MB_MUX_RESET;
-    u8 mask = 0b00011111;
-    u8 reg_val;
-
-    mutex_lock(&lpc_data->access_lock);
-    reg_val=_mask_shift(inb(reg), mask);
-    BSP_LOG_R("reg=0x%03x, reg_val=0x%02x", reg, reg_val);
-    len=sprintf(buf, "%d\n", reg_val);
-    mutex_unlock(&lpc_data->access_lock);
-
-    return len;
-}
-
-/* set mux_reset register value */
-static ssize_t write_mux_reset_callback(struct device *dev,
-        struct device_attribute *da, const char *buf, size_t count)
-{
-    u8 val = 0;
-    u16 reg = REG_MB_MUX_RESET;
-    u8 reg_val = 0;
-    u8 mask = 0b00011111;
-    static int mux_reset_flag = 0;
-
-    if (kstrtou8(buf, 0, &val) < 0)
-        return -EINVAL;
-
-    if (mux_reset_flag == 0) {
-        if (val == 0) {
-            mutex_lock(&lpc_data->access_lock);
-            mux_reset_flag = 1;
-            BSP_LOG_W("i2c mux reset is triggered...");
-
-            reg_val = inb(reg);
-            outb((reg_val & ~mask), reg);
-            mdelay(LPC_MDELAY);
-            BSP_LOG_W("reg=0x%03x, reg_val=0x%02x", reg, reg_val & ~mask);
-            mdelay(500);
-            outb((reg_val | mask), reg);
-            mdelay(LPC_MDELAY);
-            BSP_LOG_W("reg=0x%03x, reg_val=0x%02x", reg, reg_val | mask);
-            mdelay(500);
-            mux_reset_flag = 0;
-            mutex_unlock(&lpc_data->access_lock);
-        } else {
-            return -EINVAL;
-        }
-    } else {
-        BSP_LOG_W("i2c mux is resetting... (ignore)");
-        mutex_lock(&lpc_data->access_lock);
-        mutex_unlock(&lpc_data->access_lock);
-    }
-
-    return count;
-}
-
-/* get lpc register value */
-static ssize_t read_lpc_callback(struct device *dev,
-        struct device_attribute *da, char *buf)
-{
-    struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
-    u16 reg = 0;
-    u8 mask = MASK_ALL;
-
-    switch (attr->index) {
-        //CPU CPLD
-        case ATT_CPU_CPLD_VERSION:
-            reg = REG_CPU_CPLD_VERSION;
-            break;
-        case ATT_CPU_BIOS_BOOT_ROM:
-            reg = REG_CPU_STATUS_1;
-            mask = 0x80;
-            break;
-        case ATT_CPU_BIOS_BOOT_CFG:
-            reg = REG_CPU_CTRL_1;
-            mask = 0x80;
-            break;
-        case ATT_CPU_CPLD_BUILD:
-            reg = REG_CPU_CPLD_BUILD;
-            break;
-        //MB CPLD
-        case ATT_MB_BRD_ID_0:
-            reg = REG_MB_BRD_ID_0;
-            break;
-        case ATT_MB_BRD_ID_1:
-            reg = REG_MB_BRD_ID_1;
-            break;
-        case ATT_MB_CPLD_1_VERSION:
-            reg = REG_MB_CPLD_VERSION;
-            break;
-        case ATT_MB_CPLD_1_BUILD:
-            reg = REG_MB_CPLD_BUILD;
-            break;
-        case ATT_MB_BRD_SKU_ID:
-            reg = REG_MB_BRD_ID_0;
-            mask = 0xFF;
-            break;
-        case ATT_MB_BRD_HW_ID:
-            reg = REG_MB_BRD_ID_1;
-            mask = 0x03;
-            break;
-        case ATT_MB_BRD_ID_TYPE:
-            reg = REG_MB_BRD_ID_1;
-            mask = 0x80;
-            break;
-        case ATT_MB_BRD_BUILD_ID:
-            reg = REG_MB_BRD_ID_1;
-            mask = 0x38;
-            break;
-        case ATT_MB_BRD_DEPH_ID:
-            reg = REG_MB_BRD_ID_1;
-            mask = 0x04;
-            break;
-        case ATT_MB_MUX_CTRL:
-            reg = REG_MB_MUX_CTRL;
-            break;
-        //I2C Alert
-        case ATT_ALERT_STATUS:
-            reg = REG_ALERT_STATUS;
-            mask = 0x20;
-            break;
-#if CPU_TYPE == CPU_BDE
-        case ATT_ALERT_DISABLE:
-            reg = REG_ALERT_DISABLE;
-            mask = 0x04;
-            break;
-#endif
-        //BSP
-        case ATT_BSP_REG:
-            if (kstrtou16(bsp_reg, 0, &reg) < 0)
-                return -EINVAL;
-            break;
-        default:
-            return -EINVAL;
-    }
-    return read_lpc_reg(reg, mask, buf);
-}
-
-/* set lpc register value */
-static ssize_t write_lpc_callback(struct device *dev,
-        struct device_attribute *da, const char *buf, size_t count)
-{
-    struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
-    u16 reg = 0;
-    u8 mask = MASK_ALL;
-
-    switch (attr->index) {
-        case ATT_MB_MUX_CTRL:
-            reg = REG_MB_MUX_CTRL;
-            break;
-        default:
-            return -EINVAL;
-    }
-    return write_lpc_reg(reg, mask, buf, count);
-}
-
-/* get bsp parameter value */
-static ssize_t read_bsp_callback(struct device *dev,
-        struct device_attribute *da, char *buf)
-{
-    struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
-    int str_len=0;
-    char *str=NULL;
-
-    switch (attr->index) {
-        case ATT_BSP_VERSION:
-        	str = bsp_version;
-            str_len = sizeof(bsp_version);
-            break;
-        case ATT_BSP_DEBUG:
-        	str = bsp_debug;
-            str_len = sizeof(bsp_debug);
-            break;
-        case ATT_BSP_REG:
-            str = bsp_reg;
-            str_len = sizeof(bsp_reg);
-            break;
-        default:
-            return -EINVAL;
-    }
-    return read_bsp(buf, str);
-}
-
-/* set bsp parameter value */
-static ssize_t write_bsp_callback(struct device *dev,
-        struct device_attribute *da, const char *buf, size_t count)
-{
-    struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
-    int str_len=0;
-    char *str=NULL;
-    u16 reg = 0;
-    u8 bsp_debug_u8 = 0;
-
-    switch (attr->index) {
-        case ATT_BSP_VERSION:
-        	str = bsp_version;
-            str_len = sizeof(str);
-            break;
-        case ATT_BSP_DEBUG:
-        	str = bsp_debug;
-            str_len = sizeof(str);
-            break;
-        case ATT_BSP_REG:
-        	if (kstrtou16(buf, 0, &reg) < 0)
-                return -EINVAL;
-
-        	str = bsp_reg;
-            str_len = sizeof(str);
-            break;
-        default:
-            return -EINVAL;
-    }
-
-    if (attr->index == ATT_BSP_DEBUG) {
-        if (kstrtou8(buf, 0, &bsp_debug_u8) < 0) {
-            return -EINVAL;
-        } else if (_config_bsp_log(bsp_debug_u8) < 0) {
-            return -EINVAL;
-        }
-    }
-
-    return write_bsp(buf, str, str_len, count);
-}
-
-//SENSOR_DEVICE_ATTR - CPU
-static SENSOR_DEVICE_ATTR(cpu_cpld_version, S_IRUGO, read_lpc_callback, NULL, ATT_CPU_CPLD_VERSION);
-static SENSOR_DEVICE_ATTR(cpu_cpld_version_h, S_IRUGO, read_cpu_cpld_version_h, NULL, ATT_CPU_CPLD_VERSION_H);
-static SENSOR_DEVICE_ATTR(boot_rom,         S_IRUGO, read_lpc_callback, NULL, ATT_CPU_BIOS_BOOT_ROM);
-static SENSOR_DEVICE_ATTR(boot_cfg,         S_IRUGO, read_lpc_callback, NULL, ATT_CPU_BIOS_BOOT_CFG);
-static SENSOR_DEVICE_ATTR(cpu_cpld_build,     S_IRUGO, read_lpc_callback, NULL, ATT_CPU_CPLD_BUILD);
-//SENSOR_DEVICE_ATTR - MB
-static SENSOR_DEVICE_ATTR(board_id_0,      S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_ID_0);
-static SENSOR_DEVICE_ATTR(board_id_1,      S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_ID_1);
-static SENSOR_DEVICE_ATTR(mb_cpld_1_version,   S_IRUGO, read_lpc_callback, NULL, ATT_MB_CPLD_1_VERSION);
-static SENSOR_DEVICE_ATTR(mb_cpld_1_version_h, S_IRUGO, read_mb_cpld_1_version_h, NULL, ATT_MB_CPLD_1_VERSION_H);
-static SENSOR_DEVICE_ATTR(mb_cpld_1_build,   S_IRUGO, read_lpc_callback, NULL, ATT_MB_CPLD_1_BUILD);
-static SENSOR_DEVICE_ATTR(mux_ctrl,        S_IRUGO | S_IWUSR, read_lpc_callback, write_lpc_callback, ATT_MB_MUX_CTRL);
-static SENSOR_DEVICE_ATTR(mux_reset,        S_IRUGO | S_IWUSR, read_mux_reset_callback, write_mux_reset_callback, ATT_MB_MUX_RESET);
-static SENSOR_DEVICE_ATTR(board_sku_id,    S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_SKU_ID);
-static SENSOR_DEVICE_ATTR(board_hw_id,     S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_HW_ID);
-static SENSOR_DEVICE_ATTR(board_id_type,     S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_ID_TYPE);
-static SENSOR_DEVICE_ATTR(board_build_id,  S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_BUILD_ID);
-static SENSOR_DEVICE_ATTR(board_deph_id,     S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_DEPH_ID);
-//SENSOR_DEVICE_ATTR - I2C Alert
-static SENSOR_DEVICE_ATTR(alert_status,    S_IRUGO, read_lpc_callback, NULL, ATT_ALERT_STATUS);
-#if CPU_TYPE == CPU_BDE
-static SENSOR_DEVICE_ATTR(alert_disable,   S_IRUGO, read_lpc_callback, NULL, ATT_ALERT_DISABLE);
-#endif
-//SENSOR_DEVICE_ATTR - BSP
-static SENSOR_DEVICE_ATTR(bsp_version,     S_IRUGO | S_IWUSR, read_bsp_callback, write_bsp_callback, ATT_BSP_VERSION);
-static SENSOR_DEVICE_ATTR(bsp_debug,       S_IRUGO | S_IWUSR, read_bsp_callback, write_bsp_callback, ATT_BSP_DEBUG);
-static SENSOR_DEVICE_ATTR(bsp_reg,         S_IRUGO | S_IWUSR, read_lpc_callback, write_bsp_callback, ATT_BSP_REG);
-
-static struct attribute *cpu_cpld_attrs[] = {
-    &sensor_dev_attr_cpu_cpld_version.dev_attr.attr,
-	&sensor_dev_attr_cpu_cpld_version_h.dev_attr.attr,
-    &sensor_dev_attr_cpu_cpld_build.dev_attr.attr,
-    NULL,
-};
-
-static struct attribute *mb_cpld_attrs[] = {
-    &sensor_dev_attr_board_id_0.dev_attr.attr,
-    &sensor_dev_attr_board_id_1.dev_attr.attr,
-    &sensor_dev_attr_mb_cpld_1_version.dev_attr.attr,
-	&sensor_dev_attr_mb_cpld_1_version_h.dev_attr.attr,
-    &sensor_dev_attr_mb_cpld_1_build.dev_attr.attr,
-	&sensor_dev_attr_board_sku_id.dev_attr.attr,
-	&sensor_dev_attr_board_hw_id.dev_attr.attr,
-	&sensor_dev_attr_board_id_type.dev_attr.attr,
-	&sensor_dev_attr_board_build_id.dev_attr.attr,
-	&sensor_dev_attr_board_deph_id.dev_attr.attr,
-	&sensor_dev_attr_mux_ctrl.dev_attr.attr,
-	&sensor_dev_attr_mux_reset.dev_attr.attr,
-    NULL,
-};
-
-static struct attribute *bios_attrs[] = {
-    &sensor_dev_attr_boot_rom.dev_attr.attr,
-    &sensor_dev_attr_boot_cfg.dev_attr.attr,
-    NULL,
-};
-
-static struct attribute *i2c_alert_attrs[] = {
-    &sensor_dev_attr_alert_status.dev_attr.attr,
-#if CPU_TYPE == CPU_BDE
-    &sensor_dev_attr_alert_disable.dev_attr.attr,
-#endif
-    NULL,
-};
-
-static struct attribute *bsp_attrs[] = {
-    &sensor_dev_attr_bsp_version.dev_attr.attr,
-    &sensor_dev_attr_bsp_debug.dev_attr.attr,
-    &sensor_dev_attr_bsp_reg.dev_attr.attr,
-    NULL,
-};
-
-static struct attribute_group cpu_cpld_attr_grp = {
-	.name = "cpu_cpld",
-    .attrs = cpu_cpld_attrs,
-};
-
-static struct attribute_group mb_cpld_attr_grp = {
-	.name = "mb_cpld",
-    .attrs = mb_cpld_attrs,
-};
-
-static struct attribute_group bios_attr_grp = {
-	.name = "bios",
-    .attrs = bios_attrs,
-};
-
-static struct attribute_group i2c_alert_attr_grp = {
-	.name = "i2c_alert",
-    .attrs = i2c_alert_attrs,
-};
-
-static struct attribute_group bsp_attr_grp = {
-	.name = "bsp",
-    .attrs = bsp_attrs,
-};
-
-static void lpc_dev_release( struct device * dev)
-{
-    return;
-}
-
-static struct platform_device lpc_dev = {
-    .name           = DRIVER_NAME,
-    .id             = -1,
-    .dev = {
-                    .release = lpc_dev_release,
-    }
-};
-
-static int lpc_drv_probe(struct platform_device *pdev)
-{
-    int i = 0, grp_num = 5;
-    int err[5] = {0};
-    struct attribute_group *grp;
-
-    lpc_data = devm_kzalloc(&pdev->dev, sizeof(struct lpc_data_s),
-                            GFP_KERNEL);
-    if (!lpc_data)
-        return -ENOMEM;
-
-    mutex_init(&lpc_data->access_lock);
-
-    for (i=0; i<grp_num; ++i) {
-        switch (i) {
-            case 0:
-                grp = &cpu_cpld_attr_grp;
-                break;
-            case 1:
-            	grp = &mb_cpld_attr_grp;
-                break;
-            case 2:
-            	grp = &bios_attr_grp;
-            	break;
-            case 3:
-            	grp = &i2c_alert_attr_grp;
-            	break;
-            case 4:
-            	grp = &bsp_attr_grp;
-                break;
-            default:
-                break;
-        }
-
-        err[i] = sysfs_create_group(&pdev->dev.kobj, grp);
-        if (err[i]) {
-            printk(KERN_ERR "Cannot create sysfs for group %s\n", grp->name);
-            goto exit;
-        } else {
-        	continue;
-        }
-    }
-
-    return 0;
-
-exit:
-    for (i=0; i<grp_num; ++i) {
-        switch (i) {
-            case 0:
-                grp = &cpu_cpld_attr_grp;
-                break;
-            case 1:
-            	grp = &mb_cpld_attr_grp;
-                break;
-            case 2:
-            	grp = &bios_attr_grp;
-            	break;
-            case 3:
-            	grp = &i2c_alert_attr_grp;
-            	break;
-            case 4:
-            	grp = &bsp_attr_grp;
-                break;
-            default:
-                break;
-        }
-
-        sysfs_remove_group(&pdev->dev.kobj, grp);
-        if (!err[i]) {
-            //remove previous successful cases
-            continue;
-        } else {
-            //remove first failed case, then return
-            return err[i];
-        }
-    }
-    return 0;
-}
-
-static int lpc_drv_remove(struct platform_device *pdev)
-{
-    sysfs_remove_group(&pdev->dev.kobj, &cpu_cpld_attr_grp);
-    sysfs_remove_group(&pdev->dev.kobj, &mb_cpld_attr_grp);
-    sysfs_remove_group(&pdev->dev.kobj, &bios_attr_grp);
-    sysfs_remove_group(&pdev->dev.kobj, &i2c_alert_attr_grp);
-    sysfs_remove_group(&pdev->dev.kobj, &bsp_attr_grp);
-
-    return 0;
-}
-
-static struct platform_driver lpc_drv = {
-    .probe  = lpc_drv_probe,
-    .remove = __exit_p(lpc_drv_remove),
-    .driver = {
-    .name   = DRIVER_NAME,
-    },
-};
-
-int lpc_init(void)
-{
-    int err = 0;
-
-    err = platform_driver_register(&lpc_drv);
-    if (err) {
-    	printk(KERN_ERR "%s(#%d): platform_driver_register failed(%d)\n",
-                __func__, __LINE__, err);
-
-    	return err;
-    }
-
-    err = platform_device_register(&lpc_dev);
-    if (err) {
-    	printk(KERN_ERR "%s(#%d): platform_device_register failed(%d)\n",
-                __func__, __LINE__, err);
-    	platform_driver_unregister(&lpc_drv);
-    	return err;
-    }
-
-    return err;
-}
-
-void lpc_exit(void)
-{
-    platform_driver_unregister(&lpc_drv);
-    platform_device_unregister(&lpc_dev);
-}
-
-MODULE_AUTHOR("Leo Lin <leo.yt.lin@ufispace.com>");
-MODULE_DESCRIPTION("x86_64_ufispace_s9300_32d_lpc driver");
-MODULE_LICENSE("GPL");
-
-module_init(lpc_init);
-module_exit(lpc_exit);
+/*
+ * A lpc driver for the ufispace_s9300_32d
+ *
+ * Copyright (C) 2017-2020 UfiSpace Technology Corporation.
+ * Jason Tsai <jason.cy.tsai@ufispace.com>
+ *
+ * Based on ad7414.c
+ * Copyright 2006 Stefan Roese <sr at denx.de>, DENX Software Engineering
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#include <linux/module.h>
+#include <linux/delay.h>
+#include <linux/io.h>
+#include <linux/platform_device.h>
+#include <linux/hwmon-sysfs.h>
+
+#define BSP_LOG_R(fmt, args...) \
+    _bsp_log (LOG_READ, KERN_INFO "%s:%s[%d]: " fmt "\r\n", \
+            __FILE__, __func__, __LINE__, ##args)
+#define BSP_LOG_W(fmt, args...) \
+    _bsp_log (LOG_WRITE, KERN_INFO "%s:%s[%d]: " fmt "\r\n", \
+            __FILE__, __func__, __LINE__, ##args)
+
+#define BSP_PR(level, fmt, args...) _bsp_log (LOG_SYS, level "[BSP]" fmt "\r\n", ##args)
+
+#define DRIVER_NAME "x86_64_ufispace_s9300_32d_lpc"
+#define CPU_BDE 0
+#define CPU_SKY 1
+#define CPU_TYPE CPU_SKY
+
+/* LPC registers */
+
+#define REG_BASE_CPU                      0x600
+
+#if CPU_TYPE == CPU_SKY
+#define REG_BASE_MB                       0xE00
+#define REG_BASE_I2C_ALERT                0x700
+#else
+#define REG_BASE_MB                       0x700
+#define REG_BASE_I2C_ALERT                0xF000
+#endif
+
+//CPU CPLD
+#define REG_CPU_CPLD_VERSION              (REG_BASE_CPU + 0x00)
+#define REG_CPU_STATUS_0                  (REG_BASE_CPU + 0x01)
+#define REG_CPU_STATUS_1                  (REG_BASE_CPU + 0x02)
+#define REG_CPU_CTRL_0                    (REG_BASE_CPU + 0x03)
+#define REG_CPU_CTRL_1                    (REG_BASE_CPU + 0x04)
+#define REG_CPU_CPLD_BUILD                (REG_BASE_CPU + 0xE0)
+
+//MB CPLD
+//TBD, need to change after CPLD spec release
+#define REG_MB_BRD_ID_0                   (REG_BASE_MB + 0x00)
+#define REG_MB_BRD_ID_1                   (REG_BASE_MB + 0x01)
+#define REG_MB_CPLD_VERSION               (REG_BASE_MB + 0x02)
+#define REG_MB_CPLD_BUILD                 (REG_BASE_MB + 0x04)
+#define REG_MB_MUX_RESET                  (REG_BASE_MB + 0x46)
+#define REG_MB_MUX_CTRL                   (REG_BASE_MB + 0x5c)
+
+//I2C Alert
+#if CPU_TYPE == CPU_SKY
+#define REG_ALERT_STATUS                  (REG_BASE_I2C_ALERT + 0x80)
+#else
+#define REG_ALERT_STATUS                  (REG_BASE_I2C_ALERT + 0x00)
+#define REG_ALERT_DISABLE                 (REG_BASE_I2C_ALERT + 0x11)
+#endif
+
+#define MASK_ALL                          (0xFF)
+#define LPC_MDELAY                        (5)
+
+/* LPC sysfs attributes index  */
+enum lpc_sysfs_attributes {
+    //CPU CPLD
+    ATT_CPU_CPLD_VERSION,
+    ATT_CPU_CPLD_VERSION_H,
+    ATT_CPU_BIOS_BOOT_ROM,
+    ATT_CPU_BIOS_BOOT_CFG,
+    ATT_CPU_CPLD_BUILD,
+    //MB CPLD
+    ATT_MB_BRD_ID_0,
+    ATT_MB_BRD_ID_1,
+    ATT_MB_CPLD_1_VERSION,
+    ATT_MB_CPLD_1_VERSION_H,
+    ATT_MB_CPLD_1_BUILD,
+    ATT_MB_MUX_CTRL,
+    ATT_MB_MUX_RESET,
+    ATT_MB_BRD_SKU_ID,
+    ATT_MB_BRD_HW_ID,
+    ATT_MB_BRD_ID_TYPE,
+    ATT_MB_BRD_BUILD_ID,
+    ATT_MB_BRD_DEPH_ID,
+    //I2C Alert
+    ATT_ALERT_STATUS,
+#if CPU_TYPE == CPU_BDE
+    ATT_ALERT_DISABLE,
+#endif
+    //BSP
+    ATT_BSP_VERSION,
+    ATT_BSP_DEBUG,
+    ATT_BSP_PR_INFO,
+    ATT_BSP_PR_ERR,
+    ATT_BSP_REG,
+    ATT_MAX
+};
+
+enum bsp_log_types {
+    LOG_NONE,
+    LOG_RW,
+    LOG_READ,
+    LOG_WRITE,
+    LOG_SYS
+};
+
+enum bsp_log_ctrl {
+    LOG_DISABLE,
+    LOG_ENABLE
+};
+
+struct lpc_data_s {
+    struct mutex    access_lock;
+};
+
+struct lpc_data_s *lpc_data;
+char bsp_version[16]="";
+char bsp_debug[2]="0";
+char bsp_reg[8]="0x0";
+u8 enable_log_read=LOG_DISABLE;
+u8 enable_log_write=LOG_DISABLE;
+u8 enable_log_sys=LOG_ENABLE;
+
+/* reg shift */
+static u8 _shift(u8 mask)
+{
+    int i=0, mask_one=1;
+
+    for(i=0; i<8; ++i) {
+        if ((mask & mask_one) == 1)
+            return i;
+        else
+            mask >>= 1;
+    }
+
+    return -1;
+}
+
+/* reg mask and shift */
+static u8 _mask_shift(u8 val, u8 mask)
+{
+    int shift=0;
+
+    shift = _shift(mask);
+
+    return (val & mask) >> shift;
+}
+
+static u8 _bit_operation(u8 reg_val, u8 bit, u8 bit_val)
+{
+    if (bit_val == 0)
+        reg_val = reg_val & ~(1 << bit);
+    else
+        reg_val = reg_val | (1 << bit);
+    return reg_val;
+}
+
+static int _bsp_log(u8 log_type, char *fmt, ...)
+{
+    if ((log_type==LOG_READ  && enable_log_read) ||
+        (log_type==LOG_WRITE && enable_log_write) ||
+        (log_type==LOG_SYS && enable_log_sys) ) {
+        va_list args;
+        int r;
+
+        va_start(args, fmt);
+        r = vprintk(fmt, args);
+        va_end(args);
+
+        return r;
+    } else {
+        return 0;
+    }
+}
+
+static int _config_bsp_log(u8 log_type)
+{
+    switch(log_type) {
+        case LOG_NONE:
+            enable_log_read = LOG_DISABLE;
+            enable_log_write = LOG_DISABLE;
+            break;
+        case LOG_RW:
+            enable_log_read = LOG_ENABLE;
+            enable_log_write = LOG_ENABLE;
+            break;
+        case LOG_READ:
+            enable_log_read = LOG_ENABLE;
+            enable_log_write = LOG_DISABLE;
+            break;
+        case LOG_WRITE:
+            enable_log_read = LOG_DISABLE;
+            enable_log_write = LOG_ENABLE;
+            break;
+        default:
+            return -EINVAL;
+    }
+    return 0;
+}
+
+/* get lpc register value */
+static u8 _read_lpc_reg(u16 reg, u8 mask)
+{
+    u8 reg_val;
+
+    mutex_lock(&lpc_data->access_lock);
+    reg_val=_mask_shift(inb(reg), mask);
+    mutex_unlock(&lpc_data->access_lock);
+
+    BSP_LOG_R("reg=0x%03x, reg_val=0x%02x", reg, reg_val);
+
+    return reg_val;
+}
+
+/* get lpc register value */
+static ssize_t read_lpc_reg(u16 reg, u8 mask, char *buf)
+{
+    u8 reg_val;
+    int len=0;
+
+    reg_val = _read_lpc_reg(reg, mask);
+    len=sprintf(buf,"0x%x\n", reg_val);
+
+    return len;
+}
+
+/* set lpc register value */
+static ssize_t write_lpc_reg(u16 reg, u8 mask, const char *buf, size_t count)
+{
+    u8 reg_val, reg_val_now, shift;
+
+    if (kstrtou8(buf, 0, &reg_val) < 0)
+        return -EINVAL;
+
+    //apply SINGLE BIT operation if mask is specified, multiple bits are not supported
+    if (mask != MASK_ALL) {
+        reg_val_now = _read_lpc_reg(reg, 0x0);
+        shift = _shift(mask);
+        reg_val = _bit_operation(reg_val_now, shift, reg_val);
+    }
+
+    mutex_lock(&lpc_data->access_lock);
+
+    outb(reg_val, reg);
+    mdelay(LPC_MDELAY);
+
+    mutex_unlock(&lpc_data->access_lock);
+
+    BSP_LOG_W("reg=0x%03x, reg_val=0x%02x", reg, reg_val);
+
+    return count;
+}
+
+/* get bsp value */
+static ssize_t read_bsp(char *buf, char *str)
+{
+    ssize_t len=0;
+
+    mutex_lock(&lpc_data->access_lock);
+    len=sprintf(buf, "%s", str);
+    mutex_unlock(&lpc_data->access_lock);
+
+    BSP_LOG_R("reg_val=%s", str);
+
+    return len;
+}
+
+/* set bsp value */
+static ssize_t write_bsp(const char *buf, char *str, size_t str_len, size_t count)
+{
+    mutex_lock(&lpc_data->access_lock);
+    snprintf(str, str_len, "%s", buf);
+    mutex_unlock(&lpc_data->access_lock);
+
+    BSP_LOG_W("reg_val=%s", str);
+
+    return count;
+}
+
+/* get cpu cpld version in human readable format */
+static ssize_t read_cpu_cpld_version_h(struct device *dev,
+        struct device_attribute *da, char *buf)
+{
+    ssize_t len=0;
+    u16 reg = REG_CPU_CPLD_VERSION;
+    u8 mask = MASK_ALL;
+    u8 mask_major = 0b11000000;
+    u8 mask_minor = 0b00111111;
+    u8 reg_val;
+    u8 major, minor, build;
+
+    mutex_lock(&lpc_data->access_lock);
+    reg_val = _mask_shift(inb(reg), mask);
+    major = _mask_shift(reg_val, mask_major);
+    minor = _mask_shift(reg_val, mask_minor);
+    reg = REG_CPU_CPLD_BUILD;
+    build = _mask_shift(inb(reg), mask);
+    len = sprintf(buf, "%d.%02d.%03d\n", major, minor, build);
+    mutex_unlock(&lpc_data->access_lock);
+
+    BSP_LOG_R("reg=0x%03x, reg_val=0x%02x", reg, reg_val);
+
+    return len;
+}
+
+/* get mb cpld version in human readable format */
+static ssize_t read_mb_cpld_1_version_h(struct device *dev,
+        struct device_attribute *da, char *buf)
+{
+    ssize_t len=0;
+    u16 reg = REG_MB_CPLD_VERSION;
+    u8 mask = MASK_ALL;
+    u8 mask_major = 0b11000000;
+    u8 mask_minor = 0b00111111;
+    u8 reg_val;
+    u8 major, minor, build;
+
+    mutex_lock(&lpc_data->access_lock);
+    reg_val = _mask_shift(inb(reg), mask);
+    major = _mask_shift(reg_val, mask_major);
+    minor = _mask_shift(reg_val, mask_minor);
+    reg = REG_MB_CPLD_BUILD;
+    build = _mask_shift(inb(reg), mask);
+    len = sprintf(buf, "%d.%02d.%03d\n", major, minor, build);
+    mutex_unlock(&lpc_data->access_lock);
+
+    BSP_LOG_R("reg=0x%03x, reg_val=0x%02x", reg, reg_val);
+
+    return len;
+}
+
+/* get mux_reset register value */
+static ssize_t read_mux_reset_callback(struct device *dev,
+        struct device_attribute *da, char *buf)
+{
+    int len = 0;
+    u16 reg = REG_MB_MUX_RESET;
+    u8 mask = 0b00011111;
+    u8 reg_val;
+
+    mutex_lock(&lpc_data->access_lock);
+    reg_val=_mask_shift(inb(reg), mask);
+    BSP_LOG_R("reg=0x%03x, reg_val=0x%02x", reg, reg_val);
+    len=sprintf(buf, "%d\n", reg_val);
+    mutex_unlock(&lpc_data->access_lock);
+
+    return len;
+}
+
+/* set mux_reset register value */
+static ssize_t write_mux_reset_callback(struct device *dev,
+        struct device_attribute *da, const char *buf, size_t count)
+{
+    u8 val = 0;
+    u16 reg = REG_MB_MUX_RESET;
+    u8 reg_val = 0;
+    u8 mask = 0b00011111;
+    static int mux_reset_flag = 0;
+
+    if (kstrtou8(buf, 0, &val) < 0)
+        return -EINVAL;
+
+    if (mux_reset_flag == 0) {
+        if (val == 0) {
+            mutex_lock(&lpc_data->access_lock);
+            mux_reset_flag = 1;
+            BSP_LOG_W("i2c mux reset is triggered...");
+
+            reg_val = inb(reg);
+            outb((reg_val & ~mask), reg);
+            mdelay(LPC_MDELAY);
+            BSP_LOG_W("reg=0x%03x, reg_val=0x%02x", reg, reg_val & ~mask);
+            mdelay(500);
+            outb((reg_val | mask), reg);
+            mdelay(LPC_MDELAY);
+            BSP_LOG_W("reg=0x%03x, reg_val=0x%02x", reg, reg_val | mask);
+            mdelay(500);
+            mux_reset_flag = 0;
+            mutex_unlock(&lpc_data->access_lock);
+        } else {
+            return -EINVAL;
+        }
+    } else {
+        BSP_LOG_W("i2c mux is resetting... (ignore)");
+        mutex_lock(&lpc_data->access_lock);
+        mutex_unlock(&lpc_data->access_lock);
+    }
+
+    return count;
+}
+
+/* get lpc register value */
+static ssize_t read_lpc_callback(struct device *dev,
+        struct device_attribute *da, char *buf)
+{
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
+    u16 reg = 0;
+    u8 mask = MASK_ALL;
+
+    switch (attr->index) {
+        //CPU CPLD
+        case ATT_CPU_CPLD_VERSION:
+            reg = REG_CPU_CPLD_VERSION;
+            break;
+        case ATT_CPU_BIOS_BOOT_ROM:
+            reg = REG_CPU_STATUS_1;
+            mask = 0x80;
+            break;
+        case ATT_CPU_BIOS_BOOT_CFG:
+            reg = REG_CPU_CTRL_1;
+            mask = 0x80;
+            break;
+        case ATT_CPU_CPLD_BUILD:
+            reg = REG_CPU_CPLD_BUILD;
+            break;
+        //MB CPLD
+        case ATT_MB_BRD_ID_0:
+            reg = REG_MB_BRD_ID_0;
+            break;
+        case ATT_MB_BRD_ID_1:
+            reg = REG_MB_BRD_ID_1;
+            break;
+        case ATT_MB_CPLD_1_VERSION:
+            reg = REG_MB_CPLD_VERSION;
+            break;
+        case ATT_MB_CPLD_1_BUILD:
+            reg = REG_MB_CPLD_BUILD;
+            break;
+        case ATT_MB_BRD_SKU_ID:
+            reg = REG_MB_BRD_ID_0;
+            mask = 0xFF;
+            break;
+        case ATT_MB_BRD_HW_ID:
+            reg = REG_MB_BRD_ID_1;
+            mask = 0x03;
+            break;
+        case ATT_MB_BRD_ID_TYPE:
+            reg = REG_MB_BRD_ID_1;
+            mask = 0x80;
+            break;
+        case ATT_MB_BRD_BUILD_ID:
+            reg = REG_MB_BRD_ID_1;
+            mask = 0x38;
+            break;
+        case ATT_MB_BRD_DEPH_ID:
+            reg = REG_MB_BRD_ID_1;
+            mask = 0x04;
+            break;
+        case ATT_MB_MUX_CTRL:
+            reg = REG_MB_MUX_CTRL;
+            break;
+        //I2C Alert
+        case ATT_ALERT_STATUS:
+            reg = REG_ALERT_STATUS;
+            mask = 0x20;
+            break;
+#if CPU_TYPE == CPU_BDE
+        case ATT_ALERT_DISABLE:
+            reg = REG_ALERT_DISABLE;
+            mask = 0x04;
+            break;
+#endif
+        //BSP
+        case ATT_BSP_REG:
+            if (kstrtou16(bsp_reg, 0, &reg) < 0)
+                return -EINVAL;
+            break;
+        default:
+            return -EINVAL;
+    }
+    return read_lpc_reg(reg, mask, buf);
+}
+
+/* set lpc register value */
+static ssize_t write_lpc_callback(struct device *dev,
+        struct device_attribute *da, const char *buf, size_t count)
+{
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
+    u16 reg = 0;
+    u8 mask = MASK_ALL;
+
+    switch (attr->index) {
+        case ATT_MB_MUX_CTRL:
+            reg = REG_MB_MUX_CTRL;
+            break;
+        default:
+            return -EINVAL;
+    }
+    return write_lpc_reg(reg, mask, buf, count);
+}
+
+/* get bsp parameter value */
+static ssize_t read_bsp_callback(struct device *dev,
+        struct device_attribute *da, char *buf)
+{
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
+    int str_len=0;
+    char *str=NULL;
+
+    switch (attr->index) {
+        case ATT_BSP_VERSION:
+            str = bsp_version;
+            str_len = sizeof(bsp_version);
+            break;
+        case ATT_BSP_DEBUG:
+            str = bsp_debug;
+            str_len = sizeof(bsp_debug);
+            break;
+        case ATT_BSP_REG:
+            str = bsp_reg;
+            str_len = sizeof(bsp_reg);
+            break;
+        default:
+            return -EINVAL;
+    }
+    return read_bsp(buf, str);
+}
+
+/* set bsp parameter value */
+static ssize_t write_bsp_callback(struct device *dev,
+        struct device_attribute *da, const char *buf, size_t count)
+{
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
+    int str_len=0;
+    char *str=NULL;
+    u16 reg = 0;
+    u8 bsp_debug_u8 = 0;
+
+    switch (attr->index) {
+        case ATT_BSP_VERSION:
+            str = bsp_version;
+            str_len = sizeof(bsp_version);
+            break;
+        case ATT_BSP_DEBUG:
+            str = bsp_debug;
+            str_len = sizeof(bsp_debug);
+            break;
+        case ATT_BSP_REG:
+            if (kstrtou16(buf, 0, &reg) < 0)
+                return -EINVAL;
+
+            str = bsp_reg;
+            str_len = sizeof(bsp_reg);
+            break;
+        default:
+            return -EINVAL;
+    }
+
+    if (attr->index == ATT_BSP_DEBUG) {
+        if (kstrtou8(buf, 0, &bsp_debug_u8) < 0) {
+            return -EINVAL;
+        } else if (_config_bsp_log(bsp_debug_u8) < 0) {
+            return -EINVAL;
+        }
+    }
+
+    return write_bsp(buf, str, str_len, count);
+}
+
+static ssize_t write_bsp_pr_callback(struct device *dev,
+        struct device_attribute *da, const char *buf, size_t count)
+{
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
+    int str_len = strlen(buf);
+
+    if(str_len <= 0)
+        return str_len;
+
+    switch (attr->index) {
+        case ATT_BSP_PR_INFO:
+            BSP_PR(KERN_INFO, "%s", buf);
+            break;
+        case ATT_BSP_PR_ERR:
+            BSP_PR(KERN_ERR, "%s", buf);
+            break;
+        default:
+            return -EINVAL;
+    }
+
+    return str_len;
+}
+
+//SENSOR_DEVICE_ATTR - CPU
+static SENSOR_DEVICE_ATTR(cpu_cpld_version, S_IRUGO, read_lpc_callback, NULL, ATT_CPU_CPLD_VERSION);
+static SENSOR_DEVICE_ATTR(cpu_cpld_version_h, S_IRUGO, read_cpu_cpld_version_h, NULL, ATT_CPU_CPLD_VERSION_H);
+static SENSOR_DEVICE_ATTR(boot_rom,         S_IRUGO, read_lpc_callback, NULL, ATT_CPU_BIOS_BOOT_ROM);
+static SENSOR_DEVICE_ATTR(boot_cfg,         S_IRUGO, read_lpc_callback, NULL, ATT_CPU_BIOS_BOOT_CFG);
+static SENSOR_DEVICE_ATTR(cpu_cpld_build,   S_IRUGO, read_lpc_callback, NULL, ATT_CPU_CPLD_BUILD);
+//SENSOR_DEVICE_ATTR - MB
+static SENSOR_DEVICE_ATTR(board_id_0,       S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_ID_0);
+static SENSOR_DEVICE_ATTR(board_id_1,       S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_ID_1);
+static SENSOR_DEVICE_ATTR(mb_cpld_1_version,   S_IRUGO, read_lpc_callback, NULL, ATT_MB_CPLD_1_VERSION);
+static SENSOR_DEVICE_ATTR(mb_cpld_1_version_h, S_IRUGO, read_mb_cpld_1_version_h, NULL, ATT_MB_CPLD_1_VERSION_H);
+static SENSOR_DEVICE_ATTR(mb_cpld_1_build,  S_IRUGO, read_lpc_callback, NULL, ATT_MB_CPLD_1_BUILD);
+static SENSOR_DEVICE_ATTR(mux_ctrl,         S_IRUGO | S_IWUSR, read_lpc_callback, write_lpc_callback, ATT_MB_MUX_CTRL);
+static SENSOR_DEVICE_ATTR(mux_reset,        S_IRUGO | S_IWUSR, read_mux_reset_callback, write_mux_reset_callback, ATT_MB_MUX_RESET);
+static SENSOR_DEVICE_ATTR(board_sku_id,     S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_SKU_ID);
+static SENSOR_DEVICE_ATTR(board_hw_id,      S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_HW_ID);
+static SENSOR_DEVICE_ATTR(board_id_type,    S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_ID_TYPE);
+static SENSOR_DEVICE_ATTR(board_build_id,   S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_BUILD_ID);
+static SENSOR_DEVICE_ATTR(board_deph_id,    S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_DEPH_ID);
+//SENSOR_DEVICE_ATTR - I2C Alert
+static SENSOR_DEVICE_ATTR(alert_status,     S_IRUGO, read_lpc_callback, NULL, ATT_ALERT_STATUS);
+#if CPU_TYPE == CPU_BDE
+static SENSOR_DEVICE_ATTR(alert_disable,    S_IRUGO, read_lpc_callback, NULL, ATT_ALERT_DISABLE);
+#endif
+//SENSOR_DEVICE_ATTR - BSP
+static SENSOR_DEVICE_ATTR(bsp_version,      S_IRUGO | S_IWUSR, read_bsp_callback, write_bsp_callback, ATT_BSP_VERSION);
+static SENSOR_DEVICE_ATTR(bsp_debug,        S_IRUGO | S_IWUSR, read_bsp_callback, write_bsp_callback, ATT_BSP_DEBUG);
+static SENSOR_DEVICE_ATTR(bsp_pr_info,      S_IWUSR, NULL, write_bsp_pr_callback, ATT_BSP_PR_INFO);
+static SENSOR_DEVICE_ATTR(bsp_pr_err,       S_IWUSR, NULL, write_bsp_pr_callback, ATT_BSP_PR_ERR);
+static SENSOR_DEVICE_ATTR(bsp_reg,          S_IRUGO | S_IWUSR, read_lpc_callback, write_bsp_callback, ATT_BSP_REG);
+
+static struct attribute *cpu_cpld_attrs[] = {
+    &sensor_dev_attr_cpu_cpld_version.dev_attr.attr,
+    &sensor_dev_attr_cpu_cpld_version_h.dev_attr.attr,
+    &sensor_dev_attr_cpu_cpld_build.dev_attr.attr,
+    NULL,
+};
+
+static struct attribute *mb_cpld_attrs[] = {
+    &sensor_dev_attr_board_id_0.dev_attr.attr,
+    &sensor_dev_attr_board_id_1.dev_attr.attr,
+    &sensor_dev_attr_mb_cpld_1_version.dev_attr.attr,
+    &sensor_dev_attr_mb_cpld_1_version_h.dev_attr.attr,
+    &sensor_dev_attr_mb_cpld_1_build.dev_attr.attr,
+    &sensor_dev_attr_board_sku_id.dev_attr.attr,
+    &sensor_dev_attr_board_hw_id.dev_attr.attr,
+    &sensor_dev_attr_board_id_type.dev_attr.attr,
+    &sensor_dev_attr_board_build_id.dev_attr.attr,
+    &sensor_dev_attr_board_deph_id.dev_attr.attr,
+    &sensor_dev_attr_mux_ctrl.dev_attr.attr,
+    &sensor_dev_attr_mux_reset.dev_attr.attr,
+    NULL,
+};
+
+static struct attribute *bios_attrs[] = {
+    &sensor_dev_attr_boot_rom.dev_attr.attr,
+    &sensor_dev_attr_boot_cfg.dev_attr.attr,
+    NULL,
+};
+
+static struct attribute *i2c_alert_attrs[] = {
+    &sensor_dev_attr_alert_status.dev_attr.attr,
+#if CPU_TYPE == CPU_BDE
+    &sensor_dev_attr_alert_disable.dev_attr.attr,
+#endif
+    NULL,
+};
+
+static struct attribute *bsp_attrs[] = {
+    &sensor_dev_attr_bsp_version.dev_attr.attr,
+    &sensor_dev_attr_bsp_debug.dev_attr.attr,
+    &sensor_dev_attr_bsp_pr_info.dev_attr.attr,
+    &sensor_dev_attr_bsp_pr_err.dev_attr.attr,
+    &sensor_dev_attr_bsp_reg.dev_attr.attr,
+    NULL,
+};
+
+static struct attribute_group cpu_cpld_attr_grp = {
+    .name = "cpu_cpld",
+    .attrs = cpu_cpld_attrs,
+};
+
+static struct attribute_group mb_cpld_attr_grp = {
+    .name = "mb_cpld",
+    .attrs = mb_cpld_attrs,
+};
+
+static struct attribute_group bios_attr_grp = {
+    .name = "bios",
+    .attrs = bios_attrs,
+};
+
+static struct attribute_group i2c_alert_attr_grp = {
+    .name = "i2c_alert",
+    .attrs = i2c_alert_attrs,
+};
+
+static struct attribute_group bsp_attr_grp = {
+    .name = "bsp",
+    .attrs = bsp_attrs,
+};
+
+static void lpc_dev_release( struct device * dev)
+{
+    return;
+}
+
+static struct platform_device lpc_dev = {
+    .name           = DRIVER_NAME,
+    .id             = -1,
+    .dev = {
+                    .release = lpc_dev_release,
+    }
+};
+
+static int lpc_drv_probe(struct platform_device *pdev)
+{
+    int i = 0, grp_num = 5;
+    int err[5] = {0};
+    struct attribute_group *grp;
+
+    lpc_data = devm_kzalloc(&pdev->dev, sizeof(struct lpc_data_s),
+                            GFP_KERNEL);
+    if (!lpc_data)
+        return -ENOMEM;
+
+    mutex_init(&lpc_data->access_lock);
+
+    for (i=0; i<grp_num; ++i) {
+        switch (i) {
+            case 0:
+                grp = &cpu_cpld_attr_grp;
+                break;
+            case 1:
+                grp = &mb_cpld_attr_grp;
+                break;
+            case 2:
+                grp = &bios_attr_grp;
+                break;
+            case 3:
+                grp = &i2c_alert_attr_grp;
+                break;
+            case 4:
+                grp = &bsp_attr_grp;
+                break;
+            default:
+                break;
+        }
+
+        err[i] = sysfs_create_group(&pdev->dev.kobj, grp);
+        if (err[i]) {
+            printk(KERN_ERR "Cannot create sysfs for group %s\n", grp->name);
+            goto exit;
+        } else {
+            continue;
+        }
+    }
+
+    return 0;
+
+exit:
+    for (i=0; i<grp_num; ++i) {
+        switch (i) {
+            case 0:
+                grp = &cpu_cpld_attr_grp;
+                break;
+            case 1:
+                grp = &mb_cpld_attr_grp;
+                break;
+            case 2:
+                grp = &bios_attr_grp;
+                break;
+            case 3:
+                grp = &i2c_alert_attr_grp;
+                break;
+            case 4:
+                grp = &bsp_attr_grp;
+                break;
+            default:
+                break;
+        }
+
+        sysfs_remove_group(&pdev->dev.kobj, grp);
+        if (!err[i]) {
+            //remove previous successful cases
+            continue;
+        } else {
+            //remove first failed case, then return
+            return err[i];
+        }
+    }
+    return 0;
+}
+
+static int lpc_drv_remove(struct platform_device *pdev)
+{
+    sysfs_remove_group(&pdev->dev.kobj, &cpu_cpld_attr_grp);
+    sysfs_remove_group(&pdev->dev.kobj, &mb_cpld_attr_grp);
+    sysfs_remove_group(&pdev->dev.kobj, &bios_attr_grp);
+    sysfs_remove_group(&pdev->dev.kobj, &i2c_alert_attr_grp);
+    sysfs_remove_group(&pdev->dev.kobj, &bsp_attr_grp);
+
+    return 0;
+}
+
+static struct platform_driver lpc_drv = {
+    .probe  = lpc_drv_probe,
+    .remove = __exit_p(lpc_drv_remove),
+    .driver = {
+    .name   = DRIVER_NAME,
+    },
+};
+
+int lpc_init(void)
+{
+    int err = 0;
+
+    err = platform_driver_register(&lpc_drv);
+    if (err) {
+        printk(KERN_ERR "%s(#%d): platform_driver_register failed(%d)\n",
+                __func__, __LINE__, err);
+
+        return err;
+    }
+
+    err = platform_device_register(&lpc_dev);
+    if (err) {
+        printk(KERN_ERR "%s(#%d): platform_device_register failed(%d)\n",
+                __func__, __LINE__, err);
+        platform_driver_unregister(&lpc_drv);
+        return err;
+    }
+
+    return err;
+}
+
+void lpc_exit(void)
+{
+    platform_driver_unregister(&lpc_drv);
+    platform_device_unregister(&lpc_dev);
+}
+
+MODULE_AUTHOR("Leo Lin <leo.yt.lin@ufispace.com>");
+MODULE_DESCRIPTION("x86_64_ufispace_s9300_32d_lpc driver");
+MODULE_LICENSE("GPL");
+
+module_init(lpc_init);
+module_exit(lpc_exit);
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/modules/x86-64-ufispace-s9300-32d-sys-eeprom.c b/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/modules/x86-64-ufispace-s9300-32d-sys-eeprom.c
index 225a8c50d..fae50d0b0 100644
--- a/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/modules/x86-64-ufispace-s9300-32d-sys-eeprom.c
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/modules/x86-64-ufispace-s9300-32d-sys-eeprom.c
@@ -1,273 +1,283 @@
-/*
- * Copyright (C) 1998, 1999  Frodo Looijaard <frodol@dds.nl> and
- *                           Philip Edelbrock <phil@netroedge.com>
- * Copyright (C) 2003 Greg Kroah-Hartman <greg@kroah.com>
- * Copyright (C) 2003 IBM Corp.
- * Copyright (C) 2004 Jean Delvare <jdelvare@suse.de>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-/* enable dev_dbg print out */
-//#define DEBUG 
-
-#define __STDC_WANT_LIB_EXT1__ 1
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <linux/slab.h>
-#include <linux/delay.h>
-#include <linux/jiffies.h>
-#include <linux/i2c.h>
-#include <linux/mutex.h>
-
-/* Addresses to scan */
-static const unsigned short normal_i2c[] = { /*0x50, 0x51, 0x52, 0x53, 0x54,
-                    0x55, 0x56, 0x57,*/ I2C_CLIENT_END };
-
-/* Size of EEPROM in bytes */
-#define EEPROM_SIZE     512
-
-#define SLICE_BITS      (6)
-#define SLICE_SIZE      (1 << SLICE_BITS)
-#define SLICE_NUM       (EEPROM_SIZE/SLICE_SIZE)
-
-/* Each client has this additional data */
-struct eeprom_data {
-    struct mutex update_lock;
-    u8 valid;           /* bitfield, bit!=0 if slice is valid */
-    unsigned long last_updated[SLICE_NUM];  /* In jiffies, 8 slices */
-    u8 data[EEPROM_SIZE];       /* Register values */
-};
-
-
-static void sys_eeprom_update_client(struct i2c_client *client, u8 slice)
-{
-    struct eeprom_data *data = i2c_get_clientdata(client);
-    int i, j;
-    int ret;
-    int addr;
-
-    mutex_lock(&data->update_lock);
-
-    if (!(data->valid & (1 << slice)) ||
-        time_after(jiffies, data->last_updated[slice] + 300 * HZ)) {
-        dev_dbg(&client->dev, "Starting eeprom update, slice %u\n", slice);
-
-        addr = slice << SLICE_BITS;
-
-        ret = i2c_smbus_write_byte_data(client, (u8)((addr >> 8) & 0xFF), (u8)(addr & 0xFF));
-        /* select the eeprom address */
-        if (ret < 0) {
-            dev_err(&client->dev, "address set failed\n");
-            goto exit;
-        }
-
-        if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_READ_BYTE)) {
-            goto exit;
-        }
-
-        for (i = slice << SLICE_BITS; i < (slice + 1) << SLICE_BITS; i+= SLICE_SIZE) {
-            for (j = i; j < (i+SLICE_SIZE); j++) {
-                int res;
-
-                res = i2c_smbus_read_byte(client);
-                if (res < 0) {
-                    goto exit;
-                }
-
-                data->data[j] = res & 0xFF;
-            }
-        }
-        
-        data->last_updated[slice] = jiffies;
-        data->valid |= (1 << slice);
-    }
-exit:
-    mutex_unlock(&data->update_lock);
-}
-
-static ssize_t sys_eeprom_read(struct file *filp, struct kobject *kobj,
-               struct bin_attribute *bin_attr,
-               char *buf, loff_t off, size_t count)
-{
-    struct i2c_client *client = to_i2c_client(container_of(kobj, struct device, kobj));
-    struct eeprom_data *data = i2c_get_clientdata(client);
-    u8 slice;
-
-    if (off > EEPROM_SIZE) {
-        return 0;
-    }
-    if (off + count > EEPROM_SIZE) {
-        count = EEPROM_SIZE - off;
-    }
-    if (count == 0) {
-        return 0;
-    }
-
-    /* Only refresh slices which contain requested bytes */
-    for (slice = off >> SLICE_BITS; slice <= (off + count - 1) >> SLICE_BITS; slice++) {
-        sys_eeprom_update_client(client, slice);
-    }
-
-    memcpy(buf, &data->data[off], count);
-
-    return count;
-}
-
-static ssize_t sys_eeprom_write(struct file *filp, struct kobject *kobj,
-                       struct bin_attribute *bin_attr,
-                       char *buf, loff_t off, size_t count)
-{
-    struct i2c_client *client = to_i2c_client(container_of(kobj, struct device, kobj));
-    struct eeprom_data *data = i2c_get_clientdata(client);
-    int ret;
-    int i;
-    u8 cmd;
-    u16 value16;
-
-    dev_dbg(&client->dev, "sys_eeprom_write off=%d, count=%d\n", (int)off, (int)count);
-
-    if (off > EEPROM_SIZE) {
-        return 0;
-    }
-    if (off + count > EEPROM_SIZE) {
-        count = EEPROM_SIZE - off;
-    }
-    if (count == 0) {
-        return 0;
-    }
-
-    mutex_lock(&data->update_lock);
-
-    for(i=0; i < count; i++) {
-        /* write command */
-        cmd = (off >> 8) & 0xff;
-        value16 = off & 0xff;
-        value16 |= buf[i] << 8;
-        ret = i2c_smbus_write_word_data(client, cmd, value16);
-
-        if (ret < 0) {
-            dev_err(&client->dev, "write address failed at %d \n", (int)off);
-            goto exit;
-        }
-
-        off++;
-        
-        /* need to wait for write complete */
-        udelay(10000);
-    }
-exit:
-    mutex_unlock(&data->update_lock);
-    /* force to update client when reading */
-    for(i=0; i < SLICE_NUM; i++) {
-        data->last_updated[i] = 0;
-    }
-
-    return count;
-}
-
-static struct bin_attribute sys_eeprom_attr = {
-    .attr = {
-        .name = "eeprom",
-        .mode = S_IRUGO | S_IWUSR,
-    },
-    .size = EEPROM_SIZE,
-    .read = sys_eeprom_read,
-    .write = sys_eeprom_write,
-};
-
-/* Return 0 if detection is successful, -ENODEV otherwise */
-static int sys_eeprom_detect(struct i2c_client *client, struct i2c_board_info *info)
-{
-    struct i2c_adapter *adapter = client->adapter;
-
-    /* EDID EEPROMs are often 24C00 EEPROMs, which answer to all
-       addresses 0x50-0x57, but we only care about 0x51 and 0x55. So decline
-       attaching to addresses >= 0x56 on DDC buses */
-    if (!(adapter->class & I2C_CLASS_SPD) && client->addr >= 0x56) {
-        return -ENODEV;
-    }
-
-    if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_READ_BYTE)
-     && !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_WRITE_BYTE_DATA)) {
-        return -ENODEV;
-    }
-
-    strlcpy(info->type, "eeprom", I2C_NAME_SIZE);
-
-    return 0;
-}
-
-static int sys_eeprom_probe(struct i2c_client *client,
-            const struct i2c_device_id *id)
-{
-    struct eeprom_data *data;
-    int err;
-
-    if (!(data = kzalloc(sizeof(struct eeprom_data), GFP_KERNEL))) {
-        err = -ENOMEM;
-        goto exit;
-    }
-
-#ifdef __STDC_LIB_EXT1__
-    memset_s(data->data, EEPROM_SIZE, 0xff, EEPROM_SIZE);
-#else
-    memset(data->data, 0xff, EEPROM_SIZE);
-#endif
-
-    i2c_set_clientdata(client, data);
-    mutex_init(&data->update_lock);
-
-    /* create the sysfs eeprom file */
-    err = sysfs_create_bin_file(&client->dev.kobj, &sys_eeprom_attr);
-    if (err) {
-        goto exit_kfree;
-    }
-
-    return 0;
-
-exit_kfree:
-    kfree(data);
-exit:
-    return err;
-}
-
-static int sys_eeprom_remove(struct i2c_client *client)
-{
-    sysfs_remove_bin_file(&client->dev.kobj, &sys_eeprom_attr);
-    kfree(i2c_get_clientdata(client));
-
-    return 0;
-}
-
-static const struct i2c_device_id sys_eeprom_id[] = {
-    { "sys_eeprom", 0 },
-    { }
-};
-
-static struct i2c_driver sys_eeprom_driver = {
-    .driver = {
-        .name   = "sys_eeprom",
-    },
-    .probe      = sys_eeprom_probe,
-    .remove     = sys_eeprom_remove,
-    .id_table   = sys_eeprom_id,
-
-    .class      = I2C_CLASS_DDC | I2C_CLASS_SPD,
-    .detect     = sys_eeprom_detect,
-    .address_list   = normal_i2c,
-};
-
-module_i2c_driver(sys_eeprom_driver);
-
-MODULE_AUTHOR("Wade <wade.ce.he@ufispace.com>");
-MODULE_DESCRIPTION("UfiSpace Mother Board EEPROM driver");
-MODULE_LICENSE("GPL");
+/*
+ * Copyright (C) 1998, 1999  Frodo Looijaard <frodol@dds.nl> and
+ *                           Philip Edelbrock <phil@netroedge.com>
+ * Copyright (C) 2003 Greg Kroah-Hartman <greg@kroah.com>
+ * Copyright (C) 2003 IBM Corp.
+ * Copyright (C) 2004 Jean Delvare <jdelvare@suse.de>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+/* enable dev_dbg print out */
+//#define DEBUG 
+
+#define __STDC_WANT_LIB_EXT1__ 1
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/slab.h>
+#include <linux/delay.h>
+#include <linux/jiffies.h>
+#include <linux/i2c.h>
+#include <linux/mutex.h>
+#include <linux/version.h>
+
+#define _memset(s, c, n) memset(s, c, n)
+
+/* Addresses to scan */
+static const unsigned short normal_i2c[] = { /*0x50, 0x51, 0x52, 0x53, 0x54,
+                    0x55, 0x56, 0x57,*/ I2C_CLIENT_END };
+
+/* Size of EEPROM in bytes */
+#define EEPROM_SIZE     512
+
+#define SLICE_BITS      (6)
+#define SLICE_SIZE      (1 << SLICE_BITS)
+#define SLICE_NUM       (EEPROM_SIZE/SLICE_SIZE)
+
+/* Each client has this additional data */
+struct eeprom_data {
+    struct mutex update_lock;
+    u8 valid;           /* bitfield, bit!=0 if slice is valid */
+    unsigned long last_updated[SLICE_NUM];  /* In jiffies, 8 slices */
+    u8 data[EEPROM_SIZE];       /* Register values */
+};
+
+
+static void sys_eeprom_update_client(struct i2c_client *client, u8 slice)
+{
+    struct eeprom_data *data = i2c_get_clientdata(client);
+    int i, j;
+    int ret;
+    int addr;
+
+    mutex_lock(&data->update_lock);
+
+    if (!(data->valid & (1 << slice)) ||
+        time_after(jiffies, data->last_updated[slice] + 300 * HZ)) {
+        dev_dbg(&client->dev, "Starting eeprom update, slice %u\n", slice);
+
+        addr = slice << SLICE_BITS;
+
+        ret = i2c_smbus_write_byte_data(client, (u8)((addr >> 8) & 0xFF), (u8)(addr & 0xFF));
+        /* select the eeprom address */
+        if (ret < 0) {
+            dev_err(&client->dev, "address set failed\n");
+            goto exit;
+        }
+
+        if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_READ_BYTE)) {
+            goto exit;
+        }
+
+        for (i = slice << SLICE_BITS; i < (slice + 1) << SLICE_BITS; i+= SLICE_SIZE) {
+            for (j = i; j < (i+SLICE_SIZE); j++) {
+                int res;
+
+                res = i2c_smbus_read_byte(client);
+                if (res < 0) {
+                    goto exit;
+                }
+
+                data->data[j] = res & 0xFF;
+            }
+        }
+
+        data->last_updated[slice] = jiffies;
+        data->valid |= (1 << slice);
+    }
+exit:
+    mutex_unlock(&data->update_lock);
+}
+
+static ssize_t sys_eeprom_read(struct file *filp, struct kobject *kobj,
+               struct bin_attribute *bin_attr,
+               char *buf, loff_t off, size_t count)
+{
+    struct i2c_client *client = to_i2c_client(container_of(kobj, struct device, kobj));
+    struct eeprom_data *data = i2c_get_clientdata(client);
+    u8 slice;
+
+    if (off > EEPROM_SIZE) {
+        return 0;
+    }
+    if (off + count > EEPROM_SIZE) {
+        count = EEPROM_SIZE - off;
+    }
+    if (count == 0) {
+        return 0;
+    }
+
+    /* Only refresh slices which contain requested bytes */
+    for (slice = off >> SLICE_BITS; slice <= (off + count - 1) >> SLICE_BITS; slice++) {
+        sys_eeprom_update_client(client, slice);
+    }
+
+    memcpy(buf, &data->data[off], count);
+
+    return count;
+}
+
+static ssize_t sys_eeprom_write(struct file *filp, struct kobject *kobj,
+                       struct bin_attribute *bin_attr,
+                       char *buf, loff_t off, size_t count)
+{
+    struct i2c_client *client = to_i2c_client(container_of(kobj, struct device, kobj));
+    struct eeprom_data *data = i2c_get_clientdata(client);
+    int ret;
+    int i;
+    u8 cmd;
+    u16 value16;
+
+    dev_dbg(&client->dev, "sys_eeprom_write off=%d, count=%d\n", (int)off, (int)count);
+
+    if (off > EEPROM_SIZE) {
+        return 0;
+    }
+    if (off + count > EEPROM_SIZE) {
+        count = EEPROM_SIZE - off;
+    }
+    if (count == 0) {
+        return 0;
+    }
+
+    mutex_lock(&data->update_lock);
+
+    for(i=0; i < count; i++) {
+        /* write command */
+        cmd = (off >> 8) & 0xff;
+        value16 = off & 0xff;
+        value16 |= buf[i] << 8;
+        ret = i2c_smbus_write_word_data(client, cmd, value16);
+
+        if (ret < 0) {
+            dev_err(&client->dev, "write address failed at %d \n", (int)off);
+            goto exit;
+        }
+
+        off++;
+
+        /* need to wait for write complete */
+        udelay(10000);
+    }
+exit:
+    mutex_unlock(&data->update_lock);
+    /* force to update client when reading */
+    for(i=0; i < SLICE_NUM; i++) {
+        data->last_updated[i] = 0;
+    }
+
+    return count;
+}
+
+static struct bin_attribute sys_eeprom_attr = {
+    .attr = {
+        .name = "eeprom",
+        .mode = S_IRUGO | S_IWUSR,
+    },
+    .size = EEPROM_SIZE,
+    .read = sys_eeprom_read,
+    .write = sys_eeprom_write,
+};
+
+/* Return 0 if detection is successful, -ENODEV otherwise */
+static int sys_eeprom_detect(struct i2c_client *client, struct i2c_board_info *info)
+{
+    struct i2c_adapter *adapter = client->adapter;
+
+    /* EDID EEPROMs are often 24C00 EEPROMs, which answer to all
+       addresses 0x50-0x57, but we only care about 0x51 and 0x55. So decline
+       attaching to addresses >= 0x56 on DDC buses */
+    if (!(adapter->class & I2C_CLASS_SPD) && client->addr >= 0x56) {
+        return -ENODEV;
+    }
+
+    if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_READ_BYTE)
+     && !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_WRITE_BYTE_DATA)) {
+        return -ENODEV;
+    }
+
+    strlcpy(info->type, "eeprom", I2C_NAME_SIZE);
+
+    return 0;
+}
+
+static int sys_eeprom_probe(struct i2c_client *client,
+            const struct i2c_device_id *id)
+{
+    struct eeprom_data *data;
+    int err;
+
+    if (!(data = kzalloc(sizeof(struct eeprom_data), GFP_KERNEL))) {
+        err = -ENOMEM;
+        goto exit;
+    }
+
+#ifdef __STDC_LIB_EXT1__
+    memset_s(data->data, EEPROM_SIZE, 0xff, EEPROM_SIZE);
+#else
+    _memset(data->data, 0xff, EEPROM_SIZE);
+#endif
+
+    i2c_set_clientdata(client, data);
+    mutex_init(&data->update_lock);
+
+    /* create the sysfs eeprom file */
+    err = sysfs_create_bin_file(&client->dev.kobj, &sys_eeprom_attr);
+    if (err) {
+        goto exit_kfree;
+    }
+
+    return 0;
+
+exit_kfree:
+    kfree(data);
+exit:
+    return err;
+}
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0)
+static int
+#else
+static void
+#endif
+sys_eeprom_remove(struct i2c_client *client)
+{
+    sysfs_remove_bin_file(&client->dev.kobj, &sys_eeprom_attr);
+    kfree(i2c_get_clientdata(client));
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0)
+    return 0;
+#endif
+}
+
+static const struct i2c_device_id sys_eeprom_id[] = {
+    { "sys_eeprom", 0 },
+    { }
+};
+
+static struct i2c_driver sys_eeprom_driver = {
+    .driver = {
+        .name   = "sys_eeprom",
+    },
+    .probe      = sys_eeprom_probe,
+    .remove     = sys_eeprom_remove,
+    .id_table   = sys_eeprom_id,
+
+    .class      = I2C_CLASS_DDC | I2C_CLASS_SPD,
+    .detect     = sys_eeprom_detect,
+    .address_list   = normal_i2c,
+};
+
+module_i2c_driver(sys_eeprom_driver);
+
+MODULE_AUTHOR("Wade <wade.ce.he@ufispace.com>");
+MODULE_DESCRIPTION("UfiSpace Mother Board EEPROM driver");
+MODULE_LICENSE("GPL");
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/sonic_platform/chassis.py b/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/sonic_platform/chassis.py
index 267add075..3f02f73da 100644
--- a/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/sonic_platform/chassis.py
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/sonic_platform/chassis.py
@@ -9,6 +9,7 @@
 try:
     import time
     from sonic_platform_pddf_base.pddf_chassis import PddfChassis
+    from sonic_py_common import device_info
 except ImportError as e:
     raise ImportError(str(e) + "- required module not found")
 
@@ -174,4 +175,15 @@ def get_reboot_cause(self):
         except IOError:
             sw_reboot_cause = "Unknown"
 
-        return ('REBOOT_CAUSE_NON_HARDWARE', sw_reboot_cause)
\ No newline at end of file
+        return ('REBOOT_CAUSE_NON_HARDWARE', sw_reboot_cause)
+
+    def get_serial_number(self):
+        """
+        Retrieves the hardware serial number for the chassis
+
+        Returns:
+            A string containing the hardware serial number for this
+            chassis.
+        """
+
+        return self.get_serial()
\ No newline at end of file
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/sonic_platform/component.py b/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/sonic_platform/component.py
index f3346725c..b94a10d61 100644
--- a/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/sonic_platform/component.py
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/sonic_platform/component.py
@@ -18,9 +18,7 @@
 }
 
 BMC_CMDS = {
-    "VER1": "ipmitool mc info | grep 'Firmware Revision' | cut -d':' -f2 | cut -d'.' -f1",
-    "VER2": "ipmitool mc info | grep 'Firmware Revision' | cut -d':' -f2 | cut -d'.' -f2",
-    "VER3": "echo $((`ipmitool mc info | grep 'Aux Firmware Rev Info' -A 2 | sed -n '2p'` + 0))",
+    "BMC": "bash -c 'tmp=$(ipmitool raw 0x6 0x1) && r=($(echo \"$tmp\" | cut -d \" \" -f 4,5,16,15,14)) && echo ${r[0]}.${r[1]}.${r[4]}.${r[3]}${r[2]}'",
 }
 
 BIOS_VERSION_PATH = "/sys/class/dmi/id/bios_version"
@@ -83,17 +81,11 @@ def _get_cpld_version(self):
 
     def _get_bmc_version(self):
         # Retrieves the BMC firmware version
-        bmc_ver = dict()
-        for ver in BMC_CMDS:            
-            status, value = subprocess.getstatusoutput(BMC_CMDS[ver])
-            if not status:
-                bmc_ver[ver] = int(value.rstrip())
-            else:
-                return None
-                
-        bmc_version = "{}.{}.{}".format(bmc_ver["VER1"], bmc_ver["VER2"], bmc_ver["VER3"])
-
-        return bmc_version
+        status, value = subprocess.getstatusoutput(BMC_CMDS["BMC"])
+        if not status:
+            return value
+        else:
+            return None
 
     def get_name(self):
         """
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/sonic_platform/fan.py b/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/sonic_platform/fan.py
index 6b99493ec..a2ef7be03 100644
--- a/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/sonic_platform/fan.py
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/sonic_platform/fan.py
@@ -135,7 +135,11 @@ def get_presence(self):
 
         mode = output['mode']
         val = output['status'].strip()
-        vmap = self.plugin_data['FAN']['present'][mode]['valmap']
+        
+        if self.is_psu_fan:
+            vmap = self.plugin_data['PSU']['psu_present'][mode]['valmap']
+        else:
+            vmap = self.plugin_data['FAN']['present'][mode]['valmap']
 
         if val in vmap:
             presence = vmap[val]
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/sonic_platform/psu.py b/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/sonic_platform/psu.py
index 29319e424..3e213415f 100644
--- a/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/sonic_platform/psu.py
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/sonic_platform/psu.py
@@ -10,7 +10,7 @@
 class Psu(PddfPsu):
     """PDDF Platform-Specific PSU class"""
     
-    PLATFORM_PSU_CAPACITY = 2000
+    PLATFORM_PSU_CAPACITY = 1300
 
     def __init__(self, index, pddf_data=None, pddf_plugin_data=None):
         PddfPsu.__init__(self, index, pddf_data, pddf_plugin_data)
@@ -36,3 +36,21 @@ def get_power(self):
 
         # power is returned in micro watts
         return round(float(self.get_voltage()*self.get_current()), 2)
+
+    def get_capacity(self):
+        """
+        Retrieves the maximum supplied power by PSU (or PSU capacity)
+        Returns:
+            A float number, the maximum power output in Watts.
+            e.g. 1200.1
+        """
+        return self.get_maximum_supplied_power()
+
+    def get_type(self):
+        """
+        Gets the type of the PSU
+
+        Returns:
+            A string, the type of PSU (AC/DC)
+        """
+        return self.plugin_data['PSU']['DEFAULT_TYPE']
\ No newline at end of file
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/sonic_platform/sfp.py b/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/sonic_platform/sfp.py
index d9b6e491b..c7919482f 100644
--- a/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/sonic_platform/sfp.py
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/sonic_platform/sfp.py
@@ -13,5 +13,19 @@ class Sfp(PddfSfp):
 
     def __init__(self, index, pddf_data=None, pddf_plugin_data=None):
         PddfSfp.__init__(self, index, pddf_data, pddf_plugin_data)
+        self.index = index
 
     # Provide the functions/variables below for which implementation is to be overwritten
+
+    def get_error_description(self):
+        """
+        Retrives the error descriptions of the SFP module
+        Returns:
+            String that represents the current error descriptions of vendor specific errors
+            In case there are multiple errors, they should be joined by '|',
+            like: "Bad EEPROM|Unsupported cable"
+        """
+        if not self.get_presence():
+            return self.SFP_STATUS_UNPLUGGED
+
+        return self.SFP_STATUS_OK
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/utils/pddf_post_device_create.sh b/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/utils/pddf_post_device_create.sh
index 69e75aeef..e4de7ae36 100755
--- a/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/utils/pddf_post_device_create.sh
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/utils/pddf_post_device_create.sh
@@ -1,3 +1,6 @@
 #!/bin/bash
+#disable bmc watchdog
+timeout 3 ipmitool mc watchdog off
+
 echo 1 > /sys/kernel/pddf/devices/sysstatus/sysstatus_data/port_led_clr_ctrl
 echo "PDDF device post-create completed"
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/utils/pddf_pre_driver_install.sh b/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/utils/pddf_pre_driver_install.sh
deleted file mode 100755
index 52bcb3962..000000000
--- a/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/utils/pddf_pre_driver_install.sh
+++ /dev/null
@@ -1,11 +0,0 @@
-#!/bin/bash
-#rmmod gpio_ich
-if [ ! -f /tmp/._pddf_pre_driver_init_completion ]; then
-    # make sure igb/i40e init in correct order
-    rmmod i40e
-    rmmod igb
-    modprobe igb
-    modprobe i40e
-    date > /tmp/._pddf_pre_driver_init_completion
-fi
-echo "PDDF driver pre-install completed"
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/modules/Makefile b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/modules/Makefile
new file mode 100644
index 000000000..0f44e14f0
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/modules/Makefile
@@ -0,0 +1,6 @@
+
+MODULE_NAME  = x86-64-ufispace-s9301-32d-cpld.o x86-64-ufispace-s9301-32d-sys-eeprom.o x86-64-ufispace-s9301-32d-lpc.o pddf_custom_sysstatus_module.o 
+obj-m       := $(MODULE_NAME)
+
+CFLAGS_pddf_custom_sysstatus_module.o := -I$(M)/../../../../pddf/i2c/modules/include
+KBUILD_EXTRA_SYMBOLS := $(M)/../../../../pddf/i2c/Module.symvers.PDDF
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/modules/pddf_custom_sysstatus_module.c b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/modules/pddf_custom_sysstatus_module.c
new file mode 100644
index 000000000..b61219c00
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/modules/pddf_custom_sysstatus_module.c
@@ -0,0 +1,266 @@
+/*
+ * Copyright 2019 Broadcom.
+ * The term "Broadcom" refers to Broadcom Inc. and/or its subsidiaries.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ *
+ * A pddf kernel module for system status registers
+ */
+
+#define __STDC_WANT_LIB_EXT1__ 1
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/jiffies.h>
+#include <linux/i2c.h>
+#include <linux/hwmon.h>
+#include <linux/hwmon-sysfs.h>
+#include <linux/err.h>
+#include <linux/mutex.h>
+#include <linux/sysfs.h>
+#include <linux/slab.h>
+#include <linux/delay.h>
+#include <linux/dmi.h>
+#include <linux/kobject.h>
+#include "../../../../pddf/i2c/modules/include/pddf_client_defs.h"
+#include "../../../../pddf/i2c/modules/include/pddf_sysstatus_defs.h"
+
+#define _memset(s, c, n) memset(s, c, n)
+
+SYSSTATUS_DATA sysstatus_data = {0};
+
+extern int board_i2c_cpld_read(unsigned short cpld_addr, u8 reg);
+extern int board_i2c_cpld_write(unsigned short cpld_addr, u8 reg, u8 value);
+
+static ssize_t do_attr_operation(struct device *dev, struct device_attribute *da, const char *buf, size_t count);
+ssize_t show_sysstatus_data(struct device *dev, struct device_attribute *da, char *buf);
+ssize_t store_sysstatus_data(struct device *dev, struct device_attribute *da, const char *buf, size_t count);
+
+
+PDDF_DATA_ATTR(attr_name, S_IWUSR|S_IRUGO, show_pddf_data, store_pddf_data, PDDF_CHAR, 32,
+             (void*)&sysstatus_data.sysstatus_addr_attr.aname, NULL);
+PDDF_DATA_ATTR(attr_devaddr, S_IWUSR|S_IRUGO, show_pddf_data, store_pddf_data, PDDF_UINT32,
+              sizeof(uint32_t),  (void*)&sysstatus_data.sysstatus_addr_attr.devaddr , NULL);
+PDDF_DATA_ATTR(attr_offset, S_IWUSR|S_IRUGO, show_pddf_data, store_pddf_data, PDDF_UINT32,
+              sizeof(uint32_t), (void*)&sysstatus_data.sysstatus_addr_attr.offset, NULL);
+PDDF_DATA_ATTR(attr_mask, S_IWUSR|S_IRUGO, show_pddf_data, store_pddf_data, PDDF_UINT32,
+              sizeof(uint32_t), (void*)&sysstatus_data.sysstatus_addr_attr.mask , NULL);
+PDDF_DATA_ATTR(attr_len, S_IWUSR|S_IRUGO, show_pddf_data, store_pddf_data, PDDF_UINT32,
+              sizeof(uint32_t), (void*)&sysstatus_data.sysstatus_addr_attr.len , NULL);
+PDDF_DATA_ATTR(attr_ops, S_IWUSR, NULL, do_attr_operation, PDDF_CHAR, 8, (void*)&sysstatus_data, NULL);
+
+
+
+static struct attribute *sysstatus_addr_attributes[] = {
+    &attr_attr_name.dev_attr.attr,
+    &attr_attr_devaddr.dev_attr.attr,
+    &attr_attr_offset.dev_attr.attr,
+    &attr_attr_mask.dev_attr.attr,
+    &attr_attr_len.dev_attr.attr,
+    &attr_attr_ops.dev_attr.attr,
+    NULL
+};
+
+PDDF_DATA_ATTR(board_info,    S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL);
+PDDF_DATA_ATTR(cpld1_version, S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL);
+PDDF_DATA_ATTR(cpld2_version, S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL);
+PDDF_DATA_ATTR(cpld3_version, S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL);
+PDDF_DATA_ATTR(mac_reset,     S_IWUSR|S_IRUGO, show_sysstatus_data, store_sysstatus_data, PDDF_UCHAR, sizeof(u8), NULL, NULL);
+PDDF_DATA_ATTR(mux_reset,     S_IWUSR|S_IRUGO, show_sysstatus_data, store_sysstatus_data, PDDF_UCHAR, sizeof(u8), NULL, NULL);
+PDDF_DATA_ATTR(psu_status,    S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL);
+PDDF_DATA_ATTR(system_led_0,  S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL);
+PDDF_DATA_ATTR(system_led_1,  S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL);
+PDDF_DATA_ATTR(beacon_led,    S_IWUSR|S_IRUGO, show_sysstatus_data, store_sysstatus_data, PDDF_UCHAR, sizeof(u8), NULL, NULL);
+PDDF_DATA_ATTR(port_led_clr_ctrl, S_IWUSR|S_IRUGO, show_sysstatus_data, store_sysstatus_data, PDDF_UCHAR, sizeof(u8), NULL, NULL);
+
+static struct attribute *sysstatus_data_attributes[] = {
+    &attr_board_info.dev_attr.attr,
+    &attr_cpld1_version.dev_attr.attr,
+    &attr_cpld2_version.dev_attr.attr,
+    &attr_cpld3_version.dev_attr.attr,
+    &attr_mac_reset.dev_attr.attr,
+    &attr_mux_reset.dev_attr.attr,
+    &attr_psu_status.dev_attr.attr,
+    &attr_system_led_0.dev_attr.attr,
+    &attr_system_led_1.dev_attr.attr,
+    &attr_beacon_led.dev_attr.attr,
+    &attr_port_led_clr_ctrl.dev_attr.attr,
+    NULL
+};
+
+
+static const struct attribute_group pddf_sysstatus_addr_group = {
+    .attrs = sysstatus_addr_attributes,
+};
+
+
+static const struct attribute_group pddf_sysstatus_data_group = {
+    .attrs = sysstatus_data_attributes,
+};
+
+
+static struct kobject *sysstatus_addr_kobj;
+static struct kobject *sysstatus_data_kobj;
+
+
+
+ssize_t show_sysstatus_data(struct device *dev, struct device_attribute *da, char *buf)
+{
+
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
+
+    SYSSTATUS_DATA *data = &sysstatus_data;
+    struct SYSSTATUS_ADDR_ATTR *sysstatus_addr_attrs = NULL;
+    int i, status ;
+
+
+    for (i=0;i<MAX_ATTRS;i++)
+    {
+        if (strcmp(data->sysstatus_addr_attrs[i].aname, attr->dev_attr.attr.name) == 0 )
+        {
+            sysstatus_addr_attrs = &data->sysstatus_addr_attrs[i];
+
+        }
+    }
+
+    if (sysstatus_addr_attrs==NULL )
+    {
+        printk(KERN_DEBUG "%s is not supported attribute for this client\n",attr->dev_attr.attr.name);
+        status = 0;
+    }
+    else
+    {
+        status = board_i2c_cpld_read( sysstatus_addr_attrs->devaddr, sysstatus_addr_attrs->offset);
+    }
+
+    return sprintf(buf, "0x%x\n", (status&sysstatus_addr_attrs->mask));
+
+}
+
+ssize_t store_sysstatus_data(struct device *dev, struct device_attribute *da, const char *buf, size_t count)
+{
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
+
+    SYSSTATUS_DATA *data = &sysstatus_data;
+    struct SYSSTATUS_ADDR_ATTR *sysstatus_addr_attrs = NULL;
+    int i, status ;
+    u8 reg_val;
+
+    for (i=0;i<MAX_ATTRS;i++)
+    {
+        if (strcmp(data->sysstatus_addr_attrs[i].aname, attr->dev_attr.attr.name) == 0 )
+        {
+            sysstatus_addr_attrs = &data->sysstatus_addr_attrs[i];
+        }
+    }
+
+    if (sysstatus_addr_attrs==NULL)
+    {
+        printk(KERN_DEBUG "%s is not supported attribute for this client\n",attr->dev_attr.attr.name);
+        return -EINVAL;
+    }
+    else
+    {
+        if (kstrtou8(buf, 0, &reg_val) < 0)
+            return -EINVAL;
+
+        status = board_i2c_cpld_write(sysstatus_addr_attrs->devaddr, sysstatus_addr_attrs->offset, reg_val);
+
+        if (status!=0)
+        {
+            printk(KERN_DEBUG "store_sysstatus_data() %s failed, status=%d\n",data->sysstatus_addr_attrs[i].aname, status);
+            return status;
+        }
+    }
+
+    return count;
+}
+
+
+
+static ssize_t do_attr_operation(struct device *dev, struct device_attribute *da, const char *buf, size_t count)
+{
+    PDDF_ATTR *ptr = (PDDF_ATTR *)da;
+    SYSSTATUS_DATA *pdata = (SYSSTATUS_DATA *)(ptr->addr);
+
+    pdata->sysstatus_addr_attrs[pdata->len] = pdata->sysstatus_addr_attr;
+    pdata->len++;
+    pddf_dbg(SYSSTATUS, KERN_ERR "%s: Populating the data for %s\n", __FUNCTION__, pdata->sysstatus_addr_attr.aname);
+#ifdef __STDC_LIB_EXT1__
+    memset_s(&pdata->sysstatus_addr_attr, sizeof(pdata->sysstatus_addr_attr), 0, sizeof(pdata->sysstatus_addr_attr));
+#else
+    _memset(&pdata->sysstatus_addr_attr, 0, sizeof(pdata->sysstatus_addr_attr));
+#endif
+
+    return count;
+}
+
+
+
+
+int __init sysstatus_data_init(void)
+{
+    struct kobject *device_kobj;
+    int ret = 0;
+
+
+    pddf_dbg(SYSSTATUS, "PDDF SYSSTATUS MODULE.. init\n");
+
+    device_kobj = get_device_i2c_kobj();
+    if(!device_kobj)
+        return -ENOMEM;
+
+    sysstatus_addr_kobj = kobject_create_and_add("sysstatus", device_kobj);
+    if(!sysstatus_addr_kobj)
+        return -ENOMEM;
+
+    sysstatus_data_kobj = kobject_create_and_add("sysstatus_data", sysstatus_addr_kobj);
+    if(!sysstatus_data_kobj)
+        return -ENOMEM;
+
+
+    ret = sysfs_create_group(sysstatus_addr_kobj, &pddf_sysstatus_addr_group);
+    if (ret)
+    {
+        kobject_put(sysstatus_addr_kobj);
+        return ret;
+    }
+
+    ret = sysfs_create_group(sysstatus_data_kobj, &pddf_sysstatus_data_group);
+    if (ret)
+    {
+        sysfs_remove_group(sysstatus_addr_kobj, &pddf_sysstatus_addr_group);
+        kobject_put(sysstatus_data_kobj);
+        kobject_put(sysstatus_addr_kobj);
+        return ret;
+    }
+
+
+    return ret;
+}
+
+void __exit sysstatus_data_exit(void)
+{
+    pddf_dbg(SYSSTATUS, "PDDF SYSSTATUS  MODULE.. exit\n");
+    sysfs_remove_group(sysstatus_data_kobj, &pddf_sysstatus_data_group);
+    sysfs_remove_group(sysstatus_addr_kobj, &pddf_sysstatus_addr_group);
+    kobject_put(sysstatus_data_kobj);
+    kobject_put(sysstatus_addr_kobj);
+    pddf_dbg(SYSSTATUS, KERN_ERR "%s: Removed the kobjects for 'SYSSTATUS'\n",__FUNCTION__);
+    return;
+}
+
+module_init(sysstatus_data_init);
+module_exit(sysstatus_data_exit);
+
+MODULE_AUTHOR("Broadcom");
+MODULE_DESCRIPTION("SYSSTATUS platform data");
+MODULE_LICENSE("GPL");
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/modules/x86-64-ufispace-s9301-32d-cpld.c b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/modules/x86-64-ufispace-s9301-32d-cpld.c
new file mode 100644
index 000000000..39e85e880
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/modules/x86-64-ufispace-s9301-32d-cpld.c
@@ -0,0 +1,1646 @@
+/*
+ * A i2c cpld driver for the ufispace_s9301_32d
+ *
+ * Copyright (C) 2017-2019 UfiSpace Technology Corporation.
+ * Jason Tsai <jason.cy.tsai@ufispace.com>
+ *
+ * Based on ad7414.c
+ * Copyright 2006 Stefan Roese <sr at denx.de>, DENX Software Engineering
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#include <linux/module.h>
+#include <linux/i2c.h>
+#include <linux/slab.h>
+#include <linux/list.h>
+#include <linux/dmi.h>
+#include <linux/hwmon.h>
+#include <linux/hwmon-sysfs.h>
+#include <linux/err.h>
+#include <linux/mutex.h>
+#include <linux/version.h>
+#include "x86-64-ufispace-s9301-32d-cpld.h"
+
+#ifdef DEBUG
+#define DEBUG_PRINT(fmt, args...) \
+    printk(KERN_INFO "%s:%s[%d]: " fmt "\r\n", \
+            __FILE__, __func__, __LINE__, ##args)
+#else
+#define DEBUG_PRINT(fmt, args...)
+#endif
+
+#define BSP_LOG_R(fmt, args...) \
+    _bsp_log (LOG_READ, KERN_INFO "%s:%s[%d]: " fmt "\r\n", \
+            __FILE__, __func__, __LINE__, ##args)
+#define BSP_LOG_W(fmt, args...) \
+    _bsp_log (LOG_WRITE, KERN_INFO "%s:%s[%d]: " fmt "\r\n", \
+            __FILE__, __func__, __LINE__, ##args)
+
+#define I2C_READ_BYTE_DATA(ret, lock, i2c_client, reg) \
+{ \
+    mutex_lock(lock); \
+    ret = i2c_smbus_read_byte_data(i2c_client, reg); \
+    mutex_unlock(lock); \
+    BSP_LOG_R("cpld[%d], reg=0x%03x, reg_val=0x%02x", data->index, reg, ret); \
+}
+#define I2C_WRITE_BYTE_DATA(ret, lock, i2c_client, reg, val) \
+{ \
+    mutex_lock(lock); \
+    ret = i2c_smbus_write_byte_data(i2c_client, reg, val); \
+    mutex_unlock(lock); \
+    BSP_LOG_W("cpld[%d], reg=0x%03x, reg_val=0x%02x", data->index, reg, val); \
+}
+
+/* CPLD sysfs attributes index  */
+enum s9301_cpld_sysfs_attributes {
+    /* CPLD1 */
+    CPLD_ACCESS_REG,
+    CPLD_REGISTER_VAL,
+    CPLD_SKU_ID,
+    CPLD_HW_REV,
+    CPLD_DEPH_REV,
+    CPLD_BUILD_REV,
+    CPLD_ID_TYPE,
+    CPLD_MAJOR_VER,
+    CPLD_MINOR_VER,
+    CPLD_BUILD_VER,
+    CPLD_VERION_H,
+    CPLD_ID,
+    CPLD_MAC_INTR,
+    CPLD_10G_PHY_INTR,
+    CPLD_CPLD_FRU_INTR,
+    CPLD_THERMAL_ALERT_INTR,
+    CPLD_MISC_INTR,
+    CPLD_SYSTEM_INTR,
+    CPLD_MAC_INTR_MASK,
+    CPLD_10G_PHY_INTR_MASK,
+    CPLD_CPLD_FRU_INTR_MASK,
+    CPLD_THERMAL_ALERT_INTR_MASK,
+    CPLD_MISC_INTR_MASK,
+    CPLD_MAC_INTR_EVENT,
+    CPLD_10G_PHY_INTR_EVENT,
+    CPLD_CPLD_FRU_INTR_EVENT,
+    CPLD_THERMAL_ALERT_INTR_EVENT,
+    CPLD_MISC_INTR_EVENT,
+    CPLD_MAC_RST,
+    CPLD_10G_PHY_RST,
+    CPLD_BMC_RST,
+    CPLD_USB_RST,
+    CPLD_MUX_RST,
+    CPLD_MISC_RST,
+    CPLD_BMC_WATCHDOG,
+    CPLD_DAU_BD_PRES,
+    CPLD_PSU_STATUS,
+    CPLD_SYS_PW_STATUS,
+    CPLD_MISC,
+    CPLD_MUX_CTRL,
+    CPLD_MAC_QSFP_SEL_CTRL,
+    CPLD_SYS_LED_CTRL_1,
+    CPLD_SYS_LED_CTRL_2,
+    CPLD_BEACON_LED_CTRL,
+    CPLD_PORT_LED_CLR_CTRL,
+    CPLD_EVENT_DETECT_CTRL,
+    /* CPLD2 */
+    CPLD_QSFPDD_MOD_INT_G0,
+    CPLD_QSFPDD_MOD_INT_G1,
+    CPLD_QSFPDD_MOD_INT_G2,
+    CPLD_QSFPDD_MOD_INT_G3,
+    CPLD_QSFPDD_PRES_G0,
+    CPLD_QSFPDD_PRES_G1,
+    CPLD_QSFPDD_PRES_G2,
+    CPLD_QSFPDD_PRES_G3,
+    CPLD_QSFPDD_FUSE_INT_G0,
+    CPLD_QSFPDD_FUSE_INT_G1,
+    CPLD_QSFPDD_FUSE_INT_G2,
+    CPLD_QSFPDD_FUSE_INT_G3,
+    CPLD_SFP_TXFAULT,
+    CPLD_SFP_ABS,
+    CPLD_SFP_RXLOS,
+    CPLD_QSFPDD_MOD_INT_MASK_G0,
+    CPLD_QSFPDD_MOD_INT_MASK_G1,
+    CPLD_QSFPDD_MOD_INT_MASK_G2,
+    CPLD_QSFPDD_MOD_INT_MASK_G3,
+    CPLD_QSFPDD_PRES_MASK_G0,
+    CPLD_QSFPDD_PRES_MASK_G1,
+    CPLD_QSFPDD_PRES_MASK_G2,
+    CPLD_QSFPDD_PRES_MASK_G3,
+    CPLD_QSFPDD_FUSE_INT_MASK_G0,
+    CPLD_QSFPDD_FUSE_INT_MASK_G1,
+    CPLD_QSFPDD_FUSE_INT_MASK_G2,
+    CPLD_QSFPDD_FUSE_INT_MASK_G3,
+    CPLD_SFP_TXFAULT_MASK,
+    CPLD_SFP_ABS_MASK,
+    CPLD_SFP_RXLOS_MASK,
+    CPLD_QSFPDD_MOD_INT_EVENT_G0,
+    CPLD_QSFPDD_MOD_INT_EVENT_G1,
+    CPLD_QSFPDD_MOD_INT_EVENT_G2,
+    CPLD_QSFPDD_MOD_INT_EVENT_G3,
+    CPLD_QSFPDD_PRES_EVENT_G0,
+    CPLD_QSFPDD_PRES_EVENT_G1,
+    CPLD_QSFPDD_PRES_EVENT_G2,
+    CPLD_QSFPDD_PRES_EVENT_G3,
+    CPLD_QSFPDD_FUSE_INT_EVENT_G0,
+    CPLD_QSFPDD_FUSE_INT_EVENT_G1,
+    CPLD_QSFPDD_FUSE_INT_EVENT_G2,
+    CPLD_QSFPDD_FUSE_INT_EVENT_G3,
+    CPLD_SFP_TXFAULT_EVENT,
+    CPLD_SFP_ABS_EVENT,
+    CPLD_SFP_RXLOS_EVENT,
+    CPLD_QSFPDD_RESET_CTRL_G0,
+    CPLD_QSFPDD_RESET_CTRL_G1,
+    CPLD_QSFPDD_RESET_CTRL_G2,
+    CPLD_QSFPDD_RESET_CTRL_G3,
+    CPLD_QSFPDD_LP_MODE_G0,
+    CPLD_QSFPDD_LP_MODE_G1,
+    CPLD_QSFPDD_LP_MODE_G2,
+    CPLD_QSFPDD_LP_MODE_G3,
+    CPLD_SFP_TX_DIS,
+    CPLD_SFP_RS,
+    CPLD_SFP_TS,
+    CPLD_PORT_INT_STATUS,
+
+    //BSP DEBUG
+    BSP_DEBUG
+};
+
+enum bsp_log_types {
+    LOG_NONE,
+    LOG_RW,
+    LOG_READ,
+    LOG_WRITE
+};
+
+enum bsp_log_ctrl {
+    LOG_DISABLE,
+    LOG_ENABLE
+};
+
+/* CPLD sysfs attributes hook functions  */
+static ssize_t read_access_register(struct device *dev,
+                struct device_attribute *da, char *buf);
+static ssize_t write_access_register(struct device *dev,
+        struct device_attribute *da, const char *buf, size_t count);
+static ssize_t read_register_value(struct device *dev,
+                struct device_attribute *da, char *buf);
+static ssize_t write_register_value(struct device *dev,
+        struct device_attribute *da, const char *buf, size_t count);
+static ssize_t read_hw_rev_cb(struct device *dev,
+        struct device_attribute *da, char *buf);
+static ssize_t read_cpld_version_cb(struct device *dev,
+        struct device_attribute *da, char *buf);
+static ssize_t read_cpld_callback(struct device *dev,
+        struct device_attribute *da, char *buf);
+static ssize_t write_cpld_callback(struct device *dev,
+        struct device_attribute *da, const char *buf, size_t count);
+static ssize_t read_cpld_version_h_cb(struct device *dev,
+        struct device_attribute *da, char *buf);
+// cpld access api
+static ssize_t read_cpld_reg(struct device *dev, char *buf, u8 reg);
+static ssize_t write_cpld_reg(struct device *dev, const char *buf, size_t count, u8 reg);
+static bool read_cpld_reg_raw_byte(struct device *dev, u8 reg, u8 *val, int *errno);
+static bool read_cpld_reg_raw_int(struct device *dev, u8 reg, int *val);
+// bsp debug api
+static ssize_t read_bsp(char *buf, char *str);
+static ssize_t write_bsp(const char *buf, char *str, size_t str_len, size_t count);
+static ssize_t read_bsp_callback(struct device *dev,
+        struct device_attribute *da, char *buf);
+static ssize_t write_bsp_callback(struct device *dev,
+        struct device_attribute *da, const char *buf, size_t count);
+
+static LIST_HEAD(cpld_client_list);  /* client list for cpld */
+static struct mutex list_lock;  /* mutex for client list */
+
+struct cpld_client_node {
+    struct i2c_client *client;
+    struct list_head   list;
+};
+
+struct cpld_data {
+    int index;                  /* CPLD index */
+    struct mutex access_lock;       /* mutex for cpld access */
+    u8 access_reg;              /* register to access */
+};
+
+/* CPLD device id and data */
+static const struct i2c_device_id s9301_cpld_id[] = {
+    { "s9301_32d_cpld1",  cpld1 },
+    { "s9301_32d_cpld2",  cpld2 },
+    { "s9301_32d_cpld3",  cpld3 },
+    {}
+};
+
+char bsp_debug[2]="0";
+u8 enable_log_read=LOG_DISABLE;
+u8 enable_log_write=LOG_DISABLE;
+
+/* Addresses scanned for s9301_cpld */
+static const unsigned short cpld_i2c_addr[] = { 0x30, 0x31, 0x32, I2C_CLIENT_END };
+
+/* define all support register access of cpld in attribute */
+/* CPLD1 */
+static SENSOR_DEVICE_ATTR(cpld_access_register, S_IWUSR | S_IRUGO, \
+        read_access_register, write_access_register, CPLD_ACCESS_REG);
+static SENSOR_DEVICE_ATTR(cpld_register_value, S_IWUSR | S_IRUGO, \
+        read_register_value, write_register_value, CPLD_REGISTER_VAL);
+static SENSOR_DEVICE_ATTR(cpld_sku_id, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_SKU_ID);
+static SENSOR_DEVICE_ATTR(cpld_hw_rev, S_IRUGO, \
+        read_hw_rev_cb, NULL, CPLD_HW_REV);
+static SENSOR_DEVICE_ATTR(cpld_deph_rev, S_IRUGO, \
+        read_hw_rev_cb, NULL, CPLD_DEPH_REV);
+static SENSOR_DEVICE_ATTR(cpld_build_rev, S_IRUGO, \
+        read_hw_rev_cb, NULL, CPLD_BUILD_REV);
+static SENSOR_DEVICE_ATTR(cpld_id_type, S_IRUGO, \
+        read_hw_rev_cb, NULL, CPLD_ID_TYPE);
+static SENSOR_DEVICE_ATTR(cpld_major_ver, S_IRUGO, \
+        read_cpld_version_cb, NULL, CPLD_MAJOR_VER);
+static SENSOR_DEVICE_ATTR(cpld_minor_ver, S_IRUGO, \
+        read_cpld_version_cb, NULL, CPLD_MINOR_VER);
+static SENSOR_DEVICE_ATTR(cpld_build_ver, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_BUILD_VER);
+static SENSOR_DEVICE_ATTR(cpld_version_h, S_IRUGO, \
+        read_cpld_version_h_cb, NULL, CPLD_VERION_H);
+static SENSOR_DEVICE_ATTR(cpld_id, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_ID);
+static SENSOR_DEVICE_ATTR(cpld_mac_intr, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_MAC_INTR);
+static SENSOR_DEVICE_ATTR(cpld_10g_phy_intr, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_10G_PHY_INTR);
+static SENSOR_DEVICE_ATTR(cpld_cpld_fru_intr, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_CPLD_FRU_INTR);
+static SENSOR_DEVICE_ATTR(cpld_thermal_alert_intr, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_THERMAL_ALERT_INTR);
+static SENSOR_DEVICE_ATTR(cpld_misc_intr, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_MISC_INTR);
+static SENSOR_DEVICE_ATTR(cpld_system_intr, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_SYSTEM_INTR);
+static SENSOR_DEVICE_ATTR(cpld_mac_intr_mask, S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, CPLD_MAC_INTR_MASK);
+static SENSOR_DEVICE_ATTR(cpld_10g_phy_intr_mask, S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, CPLD_10G_PHY_INTR_MASK);
+static SENSOR_DEVICE_ATTR(cpld_cpld_fru_intr_mask, S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, CPLD_CPLD_FRU_INTR_MASK);
+static SENSOR_DEVICE_ATTR(cpld_thermal_alert_intr_mask, S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, CPLD_THERMAL_ALERT_INTR_MASK);
+static SENSOR_DEVICE_ATTR(cpld_misc_intr_mask, S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, CPLD_MISC_INTR_MASK);
+static SENSOR_DEVICE_ATTR(cpld_mac_intr_event, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_MAC_INTR_EVENT);
+static SENSOR_DEVICE_ATTR(cpld_10g_phy_intr_event, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_10G_PHY_INTR_EVENT);
+static SENSOR_DEVICE_ATTR(cpld_cpld_fru_intr_event, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_CPLD_FRU_INTR_EVENT);
+static SENSOR_DEVICE_ATTR(cpld_thermal_alert_intr_event, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_THERMAL_ALERT_INTR_EVENT);
+static SENSOR_DEVICE_ATTR(cpld_misc_intr_event, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_MISC_INTR_EVENT);
+static SENSOR_DEVICE_ATTR(cpld_mac_rst, S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, CPLD_MAC_RST);
+static SENSOR_DEVICE_ATTR(cpld_10g_phy_rst, S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, CPLD_10G_PHY_RST);
+static SENSOR_DEVICE_ATTR(cpld_bmc_rst, S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, CPLD_BMC_RST);
+static SENSOR_DEVICE_ATTR(cpld_usb_rst, S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, CPLD_USB_RST);
+static SENSOR_DEVICE_ATTR(cpld_mux_rst, S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, CPLD_MUX_RST);
+static SENSOR_DEVICE_ATTR(cpld_misc_rst, S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, CPLD_MISC_RST);
+static SENSOR_DEVICE_ATTR(cpld_bmc_watchdog, S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, CPLD_BMC_WATCHDOG);
+static SENSOR_DEVICE_ATTR(cpld_dau_bd_pres, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_DAU_BD_PRES);
+static SENSOR_DEVICE_ATTR(cpld_psu_status, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_PSU_STATUS);
+static SENSOR_DEVICE_ATTR(cpld_sys_pw_status, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_SYS_PW_STATUS);
+static SENSOR_DEVICE_ATTR(cpld_misc, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_MISC);
+static SENSOR_DEVICE_ATTR(cpld_mux_ctrl, S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, CPLD_MUX_CTRL);
+static SENSOR_DEVICE_ATTR(cpld_mac_qsfp_sel_ctrl, S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, CPLD_MAC_QSFP_SEL_CTRL);
+static SENSOR_DEVICE_ATTR(cpld_sys_led_ctrl_1, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_SYS_LED_CTRL_1);
+static SENSOR_DEVICE_ATTR(cpld_sys_led_ctrl_2, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_SYS_LED_CTRL_2);
+static SENSOR_DEVICE_ATTR(cpld_beacon_led_ctrl, S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, CPLD_BEACON_LED_CTRL);
+static SENSOR_DEVICE_ATTR(cpld_port_led_clr_ctrl, S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, CPLD_PORT_LED_CLR_CTRL);
+static SENSOR_DEVICE_ATTR(cpld_event_detect_ctrl, S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, CPLD_EVENT_DETECT_CTRL);
+/* CPLD2 */
+static SENSOR_DEVICE_ATTR(cpld_qsfpdd_mod_int_g0, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_QSFPDD_MOD_INT_G0);
+static SENSOR_DEVICE_ATTR(cpld_qsfpdd_mod_int_g1, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_QSFPDD_MOD_INT_G1);
+static SENSOR_DEVICE_ATTR(cpld_qsfpdd_mod_int_g2, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_QSFPDD_MOD_INT_G2);
+static SENSOR_DEVICE_ATTR(cpld_qsfpdd_mod_int_g3, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_QSFPDD_MOD_INT_G3);
+static SENSOR_DEVICE_ATTR(cpld_qsfpdd_pres_g0, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_QSFPDD_PRES_G0);
+static SENSOR_DEVICE_ATTR(cpld_qsfpdd_pres_g1, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_QSFPDD_PRES_G1);
+static SENSOR_DEVICE_ATTR(cpld_qsfpdd_pres_g2, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_QSFPDD_PRES_G2);
+static SENSOR_DEVICE_ATTR(cpld_qsfpdd_pres_g3, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_QSFPDD_PRES_G3);
+static SENSOR_DEVICE_ATTR(cpld_qsfpdd_fuse_int_g0, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_QSFPDD_FUSE_INT_G0);
+static SENSOR_DEVICE_ATTR(cpld_qsfpdd_fuse_int_g1, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_QSFPDD_FUSE_INT_G1);
+static SENSOR_DEVICE_ATTR(cpld_qsfpdd_fuse_int_g2, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_QSFPDD_FUSE_INT_G2);
+static SENSOR_DEVICE_ATTR(cpld_qsfpdd_fuse_int_g3, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_QSFPDD_FUSE_INT_G3);
+static SENSOR_DEVICE_ATTR(cpld_sfp_txfault, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_SFP_TXFAULT);
+static SENSOR_DEVICE_ATTR(cpld_sfp_abs, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_SFP_ABS);
+static SENSOR_DEVICE_ATTR(cpld_sfp_rxlos, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_SFP_RXLOS);
+static SENSOR_DEVICE_ATTR(cpld_qsfpdd_mod_int_mask_g0, S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, CPLD_QSFPDD_MOD_INT_MASK_G0);
+static SENSOR_DEVICE_ATTR(cpld_qsfpdd_mod_int_mask_g1, S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, CPLD_QSFPDD_MOD_INT_MASK_G1);
+static SENSOR_DEVICE_ATTR(cpld_qsfpdd_mod_int_mask_g2, S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, CPLD_QSFPDD_MOD_INT_MASK_G2);
+static SENSOR_DEVICE_ATTR(cpld_qsfpdd_mod_int_mask_g3, S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, CPLD_QSFPDD_MOD_INT_MASK_G3);
+static SENSOR_DEVICE_ATTR(cpld_qsfpdd_pres_mask_g0, S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, CPLD_QSFPDD_PRES_MASK_G0);
+static SENSOR_DEVICE_ATTR(cpld_qsfpdd_pres_mask_g1, S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, CPLD_QSFPDD_PRES_MASK_G1);
+static SENSOR_DEVICE_ATTR(cpld_qsfpdd_pres_mask_g2, S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, CPLD_QSFPDD_PRES_MASK_G2);
+static SENSOR_DEVICE_ATTR(cpld_qsfpdd_pres_mask_g3, S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, CPLD_QSFPDD_PRES_MASK_G3);
+static SENSOR_DEVICE_ATTR(cpld_qsfpdd_fuse_int_mask_g0, S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, CPLD_QSFPDD_FUSE_INT_MASK_G0);
+static SENSOR_DEVICE_ATTR(cpld_qsfpdd_fuse_int_mask_g1, S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, CPLD_QSFPDD_FUSE_INT_MASK_G1);
+static SENSOR_DEVICE_ATTR(cpld_qsfpdd_fuse_int_mask_g2, S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, CPLD_QSFPDD_FUSE_INT_MASK_G2);
+static SENSOR_DEVICE_ATTR(cpld_qsfpdd_fuse_int_mask_g3, S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, CPLD_QSFPDD_FUSE_INT_MASK_G3);
+static SENSOR_DEVICE_ATTR(cpld_sfp_txfault_mask, S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, CPLD_SFP_TXFAULT_MASK);
+static SENSOR_DEVICE_ATTR(cpld_sfp_abs_mask, S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, CPLD_SFP_ABS_MASK);
+static SENSOR_DEVICE_ATTR(cpld_sfp_rxlos_mask, S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, CPLD_SFP_RXLOS_MASK);
+static SENSOR_DEVICE_ATTR(cpld_qsfpdd_mod_int_event_g0, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_QSFPDD_MOD_INT_EVENT_G0);
+static SENSOR_DEVICE_ATTR(cpld_qsfpdd_mod_int_event_g1, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_QSFPDD_MOD_INT_EVENT_G1);
+static SENSOR_DEVICE_ATTR(cpld_qsfpdd_mod_int_event_g2, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_QSFPDD_MOD_INT_EVENT_G2);
+static SENSOR_DEVICE_ATTR(cpld_qsfpdd_mod_int_event_g3, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_QSFPDD_MOD_INT_EVENT_G3);
+static SENSOR_DEVICE_ATTR(cpld_qsfpdd_pres_event_g0, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_QSFPDD_PRES_EVENT_G0);
+static SENSOR_DEVICE_ATTR(cpld_qsfpdd_pres_event_g1, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_QSFPDD_PRES_EVENT_G1);
+static SENSOR_DEVICE_ATTR(cpld_qsfpdd_pres_event_g2, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_QSFPDD_PRES_EVENT_G2);
+static SENSOR_DEVICE_ATTR(cpld_qsfpdd_pres_event_g3, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_QSFPDD_PRES_EVENT_G3);
+static SENSOR_DEVICE_ATTR(cpld_qsfpdd_fuse_int_event_g0, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_QSFPDD_FUSE_INT_EVENT_G0);
+static SENSOR_DEVICE_ATTR(cpld_qsfpdd_fuse_int_event_g1, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_QSFPDD_FUSE_INT_EVENT_G1);
+static SENSOR_DEVICE_ATTR(cpld_qsfpdd_fuse_int_event_g2, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_QSFPDD_FUSE_INT_EVENT_G2);
+static SENSOR_DEVICE_ATTR(cpld_qsfpdd_fuse_int_event_g3, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_QSFPDD_FUSE_INT_EVENT_G3);
+static SENSOR_DEVICE_ATTR(cpld_sfp_txfault_event, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_SFP_TXFAULT_EVENT);
+static SENSOR_DEVICE_ATTR(cpld_sfp_abs_event, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_SFP_ABS_EVENT);
+static SENSOR_DEVICE_ATTR(cpld_sfp_rxlos_event, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_SFP_RXLOS_EVENT);
+static SENSOR_DEVICE_ATTR(cpld_qsfpdd_reset_ctrl_g0, \
+        S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, \
+        CPLD_QSFPDD_RESET_CTRL_G0);
+static SENSOR_DEVICE_ATTR(cpld_qsfpdd_reset_ctrl_g1, \
+        S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, \
+        CPLD_QSFPDD_RESET_CTRL_G1);
+static SENSOR_DEVICE_ATTR(cpld_qsfpdd_reset_ctrl_g2, \
+        S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, \
+        CPLD_QSFPDD_RESET_CTRL_G2);
+static SENSOR_DEVICE_ATTR(cpld_qsfpdd_reset_ctrl_g3, \
+        S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, \
+        CPLD_QSFPDD_RESET_CTRL_G3);
+static SENSOR_DEVICE_ATTR(cpld_qsfpdd_lp_mode_g0, \
+        S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, \
+        CPLD_QSFPDD_LP_MODE_G0);
+static SENSOR_DEVICE_ATTR(cpld_qsfpdd_lp_mode_g1, \
+        S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, \
+        CPLD_QSFPDD_LP_MODE_G1);
+static SENSOR_DEVICE_ATTR(cpld_qsfpdd_lp_mode_g2, \
+        S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, \
+        CPLD_QSFPDD_LP_MODE_G2);
+static SENSOR_DEVICE_ATTR(cpld_qsfpdd_lp_mode_g3, \
+        S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, \
+        CPLD_QSFPDD_LP_MODE_G3);
+static SENSOR_DEVICE_ATTR(cpld_sfp_tx_dis, S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, CPLD_SFP_TX_DIS);
+static SENSOR_DEVICE_ATTR(cpld_sfp_rs, S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, CPLD_SFP_RS);
+static SENSOR_DEVICE_ATTR(cpld_sfp_ts, S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, CPLD_SFP_TS);
+static SENSOR_DEVICE_ATTR(cpld_port_int_status, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_PORT_INT_STATUS);
+//BSP DEBUG
+static SENSOR_DEVICE_ATTR(bsp_debug, S_IRUGO | S_IWUSR, \
+        read_bsp_callback, write_bsp_callback, BSP_DEBUG);
+
+/* define support attributes of cpldx , total 3 */
+/* cpld 1 */
+static struct attribute *s9301_cpld1_attributes[] = {
+    &sensor_dev_attr_cpld_access_register.dev_attr.attr,
+    &sensor_dev_attr_cpld_register_value.dev_attr.attr,
+    &sensor_dev_attr_cpld_sku_id.dev_attr.attr,
+    &sensor_dev_attr_cpld_hw_rev.dev_attr.attr,
+    &sensor_dev_attr_cpld_deph_rev.dev_attr.attr,
+    &sensor_dev_attr_cpld_build_rev.dev_attr.attr,
+    &sensor_dev_attr_cpld_id_type.dev_attr.attr,
+    &sensor_dev_attr_cpld_major_ver.dev_attr.attr,
+    &sensor_dev_attr_cpld_minor_ver.dev_attr.attr,
+    &sensor_dev_attr_cpld_build_ver.dev_attr.attr,
+    &sensor_dev_attr_cpld_version_h.dev_attr.attr,
+    &sensor_dev_attr_cpld_id.dev_attr.attr,
+    &sensor_dev_attr_cpld_mac_intr.dev_attr.attr,
+    &sensor_dev_attr_cpld_10g_phy_intr.dev_attr.attr,
+    &sensor_dev_attr_cpld_cpld_fru_intr.dev_attr.attr,
+    &sensor_dev_attr_cpld_thermal_alert_intr.dev_attr.attr,
+    &sensor_dev_attr_cpld_misc_intr.dev_attr.attr,
+    &sensor_dev_attr_cpld_system_intr.dev_attr.attr,
+    &sensor_dev_attr_cpld_mac_intr_mask.dev_attr.attr,
+    &sensor_dev_attr_cpld_10g_phy_intr_mask.dev_attr.attr,
+    &sensor_dev_attr_cpld_cpld_fru_intr_mask.dev_attr.attr,
+    &sensor_dev_attr_cpld_thermal_alert_intr_mask.dev_attr.attr,
+    &sensor_dev_attr_cpld_misc_intr_mask.dev_attr.attr,
+    &sensor_dev_attr_cpld_mac_intr_event.dev_attr.attr,
+    &sensor_dev_attr_cpld_10g_phy_intr_event.dev_attr.attr,
+    &sensor_dev_attr_cpld_cpld_fru_intr_event.dev_attr.attr,
+    &sensor_dev_attr_cpld_thermal_alert_intr_event.dev_attr.attr,
+    &sensor_dev_attr_cpld_misc_intr_event.dev_attr.attr,
+    &sensor_dev_attr_cpld_mac_rst.dev_attr.attr,
+    &sensor_dev_attr_cpld_10g_phy_rst.dev_attr.attr,
+    &sensor_dev_attr_cpld_bmc_rst.dev_attr.attr,
+    &sensor_dev_attr_cpld_usb_rst.dev_attr.attr,
+    &sensor_dev_attr_cpld_mux_rst.dev_attr.attr,
+    &sensor_dev_attr_cpld_misc_rst.dev_attr.attr,
+    &sensor_dev_attr_cpld_bmc_watchdog.dev_attr.attr,
+    &sensor_dev_attr_cpld_dau_bd_pres.dev_attr.attr,
+    &sensor_dev_attr_cpld_psu_status.dev_attr.attr,
+    &sensor_dev_attr_cpld_sys_pw_status.dev_attr.attr,
+    &sensor_dev_attr_cpld_misc.dev_attr.attr,
+    &sensor_dev_attr_cpld_mux_ctrl.dev_attr.attr,
+    &sensor_dev_attr_cpld_mac_qsfp_sel_ctrl.dev_attr.attr,
+    &sensor_dev_attr_cpld_sys_led_ctrl_1.dev_attr.attr,
+    &sensor_dev_attr_cpld_sys_led_ctrl_2.dev_attr.attr,
+    &sensor_dev_attr_cpld_beacon_led_ctrl.dev_attr.attr,
+    &sensor_dev_attr_cpld_port_led_clr_ctrl.dev_attr.attr,
+    &sensor_dev_attr_cpld_event_detect_ctrl.dev_attr.attr,
+    &sensor_dev_attr_bsp_debug.dev_attr.attr,
+    NULL
+};
+
+/* cpld 2 */
+static struct attribute *s9301_cpld2_attributes[] = {
+    &sensor_dev_attr_cpld_access_register.dev_attr.attr,
+    &sensor_dev_attr_cpld_register_value.dev_attr.attr,
+    &sensor_dev_attr_cpld_major_ver.dev_attr.attr,
+    &sensor_dev_attr_cpld_minor_ver.dev_attr.attr,
+    &sensor_dev_attr_cpld_build_ver.dev_attr.attr,
+    &sensor_dev_attr_cpld_version_h.dev_attr.attr,
+    &sensor_dev_attr_cpld_id.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfpdd_mod_int_g0.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfpdd_mod_int_g1.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfpdd_mod_int_g2.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfpdd_mod_int_g3.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfpdd_pres_g0.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfpdd_pres_g1.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfpdd_pres_g2.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfpdd_pres_g3.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfpdd_fuse_int_g0.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfpdd_fuse_int_g1.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfpdd_fuse_int_g2.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfpdd_fuse_int_g3.dev_attr.attr,
+    &sensor_dev_attr_cpld_sfp_txfault.dev_attr.attr,
+    &sensor_dev_attr_cpld_sfp_abs.dev_attr.attr,
+    &sensor_dev_attr_cpld_sfp_rxlos.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfpdd_mod_int_mask_g0.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfpdd_mod_int_mask_g1.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfpdd_mod_int_mask_g2.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfpdd_mod_int_mask_g3.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfpdd_pres_mask_g0.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfpdd_pres_mask_g1.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfpdd_pres_mask_g2.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfpdd_pres_mask_g3.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfpdd_fuse_int_mask_g0.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfpdd_fuse_int_mask_g1.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfpdd_fuse_int_mask_g2.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfpdd_fuse_int_mask_g3.dev_attr.attr,
+    &sensor_dev_attr_cpld_sfp_txfault_mask.dev_attr.attr,
+    &sensor_dev_attr_cpld_sfp_abs_mask.dev_attr.attr,
+    &sensor_dev_attr_cpld_sfp_rxlos_mask.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfpdd_mod_int_event_g0.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfpdd_mod_int_event_g1.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfpdd_mod_int_event_g2.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfpdd_mod_int_event_g3.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfpdd_pres_event_g0.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfpdd_pres_event_g1.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfpdd_pres_event_g2.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfpdd_pres_event_g3.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfpdd_fuse_int_event_g0.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfpdd_fuse_int_event_g1.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfpdd_fuse_int_event_g2.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfpdd_fuse_int_event_g3.dev_attr.attr,
+    &sensor_dev_attr_cpld_sfp_txfault_event.dev_attr.attr,
+    &sensor_dev_attr_cpld_sfp_abs_event.dev_attr.attr,
+    &sensor_dev_attr_cpld_sfp_rxlos_event.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfpdd_reset_ctrl_g0.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfpdd_reset_ctrl_g1.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfpdd_reset_ctrl_g2.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfpdd_reset_ctrl_g3.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfpdd_lp_mode_g0.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfpdd_lp_mode_g1.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfpdd_lp_mode_g2.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfpdd_lp_mode_g3.dev_attr.attr,
+    &sensor_dev_attr_cpld_sfp_tx_dis.dev_attr.attr,
+    &sensor_dev_attr_cpld_sfp_rs.dev_attr.attr,
+    &sensor_dev_attr_cpld_sfp_ts.dev_attr.attr,
+    &sensor_dev_attr_cpld_port_int_status.dev_attr.attr,
+    NULL
+};
+
+/* cpld 3 */
+static struct attribute *s9301_cpld3_attributes[] = {
+    &sensor_dev_attr_cpld_access_register.dev_attr.attr,
+    &sensor_dev_attr_cpld_register_value.dev_attr.attr,
+    &sensor_dev_attr_cpld_major_ver.dev_attr.attr,
+    &sensor_dev_attr_cpld_minor_ver.dev_attr.attr,
+    &sensor_dev_attr_cpld_build_ver.dev_attr.attr,
+    &sensor_dev_attr_cpld_version_h.dev_attr.attr,
+    &sensor_dev_attr_cpld_id.dev_attr.attr,
+    NULL
+};
+
+/* cpld 1 attributes group */
+static const struct attribute_group s9301_cpld1_group = {
+    .attrs = s9301_cpld1_attributes,
+};
+/* cpld 2 attributes group */
+static const struct attribute_group s9301_cpld2_group = {
+    .attrs = s9301_cpld2_attributes,
+};
+/* cpld 3 attributes group */
+static const struct attribute_group s9301_cpld3_group = {
+    .attrs = s9301_cpld3_attributes,
+};
+
+static int _bsp_log(u8 log_type, char *fmt, ...)
+{
+    if ((log_type==LOG_READ  && enable_log_read) ||
+        (log_type==LOG_WRITE && enable_log_write)) {
+        va_list args;
+        int r;
+
+        va_start(args, fmt);
+        r = vprintk(fmt, args);
+        va_end(args);
+
+        return r;
+    } else {
+        return 0;
+    }
+}
+
+static int _config_bsp_log(u8 log_type)
+{
+    switch(log_type) {
+        case LOG_NONE:
+            enable_log_read = LOG_DISABLE;
+            enable_log_write = LOG_DISABLE;
+            break;
+        case LOG_RW:
+            enable_log_read = LOG_ENABLE;
+            enable_log_write = LOG_ENABLE;
+            break;
+        case LOG_READ:
+            enable_log_read = LOG_ENABLE;
+            enable_log_write = LOG_DISABLE;
+            break;
+        case LOG_WRITE:
+            enable_log_read = LOG_DISABLE;
+            enable_log_write = LOG_ENABLE;
+            break;
+        default:
+            return -EINVAL;
+    }
+    return 0;
+}
+
+/* get bsp value */
+static ssize_t read_bsp(char *buf, char *str)
+{
+    ssize_t len=0;
+
+    len=sprintf(buf, "%s", str);
+    BSP_LOG_R("reg_val=%s", str);
+
+    return len;
+}
+
+/* set bsp value */
+static ssize_t write_bsp(const char *buf, char *str, size_t str_len, size_t count)
+{
+    snprintf(str, str_len, "%s", buf);
+    BSP_LOG_W("reg_val=%s", str);
+
+    return count;
+}
+
+/* get bsp parameter value */
+static ssize_t read_bsp_callback(struct device *dev,
+        struct device_attribute *da, char *buf)
+{
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
+    int str_len=0;
+    char *str=NULL;
+
+    switch (attr->index) {
+        case BSP_DEBUG:
+            str = bsp_debug;
+            str_len = sizeof(bsp_debug);
+            break;
+        default:
+            return -EINVAL;
+    }
+    return read_bsp(buf, str);
+}
+
+/* set bsp parameter value */
+static ssize_t write_bsp_callback(struct device *dev,
+        struct device_attribute *da, const char *buf, size_t count)
+{
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
+    int str_len=0;
+    char *str=NULL;
+    ssize_t ret = 0;
+    u8 bsp_debug_u8 = 0;
+
+    switch (attr->index) {
+        case BSP_DEBUG:
+            str = bsp_debug;
+            str_len = sizeof(bsp_debug);
+            ret = write_bsp(buf, str, str_len, count);
+
+            if (kstrtou8(buf, 0, &bsp_debug_u8) < 0) {
+                return -EINVAL;
+            } else if (_config_bsp_log(bsp_debug_u8) < 0) {
+                return -EINVAL;
+            }
+            return ret;
+        default:
+            return -EINVAL;
+    }
+    return 0;
+}
+
+/* read access register from cpld data */
+static ssize_t read_access_register(struct device *dev,
+                    struct device_attribute *da,
+                    char *buf)
+{
+    struct i2c_client *client = to_i2c_client(dev);
+    struct cpld_data *data = i2c_get_clientdata(client);
+    u8 reg = data->access_reg;
+
+    return sprintf(buf, "0x%x\n", reg);
+}
+
+/* write access register to cpld data */
+static ssize_t write_access_register(struct device *dev,
+                    struct device_attribute *da,
+                    const char *buf,
+                    size_t count)
+{
+    struct i2c_client *client = to_i2c_client(dev);
+    struct cpld_data *data = i2c_get_clientdata(client);
+    u8 reg;
+
+    if (kstrtou8(buf, 0, &reg) < 0)
+        return -EINVAL;
+
+    data->access_reg = reg;
+    return count;
+}
+
+/* read the value of access register in cpld data */
+static ssize_t read_register_value(struct device *dev,
+                    struct device_attribute *da,
+                    char *buf)
+{
+    struct i2c_client *client = to_i2c_client(dev);
+    struct cpld_data *data = i2c_get_clientdata(client);
+    u8 reg = data->access_reg;
+    int reg_val;
+
+    I2C_READ_BYTE_DATA(reg_val, &data->access_lock, client, reg);
+
+    if (reg_val < 0)
+        return reg_val;
+
+    return sprintf(buf, "0x%x\n", reg_val);
+}
+
+/* wrtie the value to access register in cpld data */
+static ssize_t write_register_value(struct device *dev,
+                    struct device_attribute *da,
+                    const char *buf,
+                    size_t count)
+{
+    struct i2c_client *client = to_i2c_client(dev);
+    struct cpld_data *data = i2c_get_clientdata(client);
+    int ret = -EIO;
+    u8 reg = data->access_reg;
+    u8 reg_val;
+
+    if (kstrtou8(buf, 0, &reg_val) < 0)
+        return -EINVAL;
+
+    I2C_WRITE_BYTE_DATA(ret, &data->access_lock, client, reg, reg_val);
+
+    if (unlikely(ret < 0)) {
+        dev_err(dev, "I2C_WRITE_BYTE_DATA error, return=%d\n", ret);
+        return ret;
+    }
+
+    return count;
+}
+
+/* get cpld register value */
+static ssize_t read_cpld_reg(struct device *dev,
+                    char *buf,
+                    u8 reg)
+{
+    int reg_val;
+
+    if (read_cpld_reg_raw_int(dev, reg, &reg_val))
+        return sprintf(buf, "0x%02x\n", reg_val);
+    else
+        return reg_val;
+}
+
+static bool read_cpld_reg_raw_int(struct device *dev, u8 reg, int *val)
+{
+    struct i2c_client *client = to_i2c_client(dev);
+    struct cpld_data *data = i2c_get_clientdata(client);
+    I2C_READ_BYTE_DATA(*val, &data->access_lock, client, reg);
+    if (unlikely(*val < 0)) {
+        dev_err(dev, "read_cpld_reg_raw_int() error, return=%d\n", *val);
+        return false;
+    }
+    return true;
+}
+
+static bool read_cpld_reg_raw_byte(struct device *dev, u8 reg, u8 *val, int *errno)
+{
+    int reg_val;
+
+    if (read_cpld_reg_raw_int(dev, reg, &reg_val)) {
+        *val = (u8)reg_val;
+        return true;
+    } else {
+        *errno = reg_val;
+        return false;
+    }
+}
+
+/* handle read for attributes */
+static ssize_t read_cpld_callback(struct device *dev,
+        struct device_attribute *da, char *buf)
+{
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
+    u8 reg = 0;
+
+    switch (attr->index) {
+        case CPLD_SKU_ID:
+             reg = CPLD_SKU_ID_REG;
+             break;
+        case CPLD_ID:
+             reg = CPLD_ID_REG;
+             break;
+        case CPLD_BUILD_VER:
+             reg = CPLD_BUILD_VER_REG;
+             break;
+        case CPLD_MAC_INTR:
+             reg = CPLD_MAC_INTR_REG;
+             break;
+        case CPLD_10G_PHY_INTR:
+             reg = CPLD_10G_PHY_INTR_REG;
+             break;
+        case CPLD_CPLD_FRU_INTR:
+             reg = CPLD_CPLD_FRU_INTR_REG;
+             break;
+        case CPLD_THERMAL_ALERT_INTR:
+             reg = CPLD_THERMAL_ALERT_INTR_REG;
+             break;
+        case CPLD_MISC_INTR:
+             reg = CPLD_MISC_INTR_REG;
+             break;
+        case CPLD_SYSTEM_INTR:
+             reg = CPLD_SYSTEM_INTR_REG;
+             break;
+        case CPLD_MAC_INTR_MASK:
+             reg = CPLD_MAC_INTR_MASK_REG;
+             break;
+        case CPLD_10G_PHY_INTR_MASK:
+             reg = CPLD_10G_PHY_INTR_MASK_REG;
+             break;
+        case CPLD_CPLD_FRU_INTR_MASK:
+             reg = CPLD_CPLD_FRU_INTR_MASK_REG;
+             break;
+        case CPLD_THERMAL_ALERT_INTR_MASK:
+             reg = CPLD_THERMAL_ALERT_INTR_MASK_REG;
+             break;
+        case CPLD_MISC_INTR_MASK:
+             reg = CPLD_MISC_INTR_MASK_REG;
+             break;
+        case CPLD_MAC_INTR_EVENT:
+             reg = CPLD_MAC_INTR_EVENT_REG;
+             break;
+        case CPLD_10G_PHY_INTR_EVENT:
+             reg = CPLD_10G_PHY_INTR_EVENT_REG;
+             break;
+        case CPLD_CPLD_FRU_INTR_EVENT:
+             reg = CPLD_CPLD_FRU_INTR_EVENT_REG;
+             break;
+        case CPLD_THERMAL_ALERT_INTR_EVENT:
+             reg = CPLD_THERMAL_ALERT_INTR_EVENT_REG;
+             break;
+        case CPLD_MISC_INTR_EVENT:
+             reg = CPLD_MISC_INTR_EVENT_REG;
+             break;
+        case CPLD_MAC_RST:
+             reg = CPLD_MAC_RST_REG;
+             break;
+        case CPLD_10G_PHY_RST:
+             reg = CPLD_10G_PHY_RST_REG;
+             break;
+        case CPLD_BMC_RST:
+             reg = CPLD_BMC_RST_REG;
+             break;
+        case CPLD_USB_RST:
+             reg = CPLD_USB_RST_REG;
+             break;
+        case CPLD_MUX_RST:
+             reg = CPLD_MUX_RST_REG;
+             break;
+        case CPLD_MISC_RST:
+             reg = CPLD_MISC_RST_REG;
+             break;
+        case CPLD_BMC_WATCHDOG:
+             reg = CPLD_BMC_WATCHDOG_REG;
+             break;
+        case CPLD_DAU_BD_PRES:
+             reg = CPLD_DAU_BD_PRES_REG;
+             break;
+        case CPLD_PSU_STATUS:
+             reg = CPLD_PSU_STATUS_REG;
+             break;
+        case CPLD_SYS_PW_STATUS:
+             reg = CPLD_SYS_PW_STATUS_REG;
+             break;
+        case CPLD_MISC:
+             reg = CPLD_MISC_REG;
+             break;
+        case CPLD_MUX_CTRL:
+             reg = CPLD_MUX_CTRL_REG;
+             break;
+        case CPLD_MAC_QSFP_SEL_CTRL:
+             reg = CPLD_MAC_QSFP_SEL_CTRL_REG;
+             break;
+        case CPLD_SYS_LED_CTRL_1:
+             reg = CPLD_SYS_LED_CTRL_1_REG;
+             break;
+        case CPLD_SYS_LED_CTRL_2:
+             reg = CPLD_SYS_LED_CTRL_2_REG;
+             break;
+        case CPLD_BEACON_LED_CTRL:
+             reg = CPLD_BEACON_LED_CTRL_REG;
+             break;
+        case CPLD_PORT_LED_CLR_CTRL:
+             reg = CPLD_PORT_LED_CLR_CTRL_REG;
+             break;
+        case CPLD_EVENT_DETECT_CTRL:
+             reg = CPLD_EVENT_DETECT_CTRL_REG;
+             break;
+        case CPLD_QSFPDD_MOD_INT_G0:
+             reg = CPLD_QSFPDD_MOD_INT_G0_REG;
+             break;
+        case CPLD_QSFPDD_MOD_INT_G1:
+             reg = CPLD_QSFPDD_MOD_INT_G1_REG;
+             break;
+        case CPLD_QSFPDD_MOD_INT_G2:
+             reg = CPLD_QSFPDD_MOD_INT_G2_REG;
+             break;
+        case CPLD_QSFPDD_MOD_INT_G3:
+             reg = CPLD_QSFPDD_MOD_INT_G3_REG;
+             break;
+        case CPLD_QSFPDD_PRES_G0:
+             reg = CPLD_QSFPDD_PRES_G0_REG;
+             break;
+        case CPLD_QSFPDD_PRES_G1:
+             reg = CPLD_QSFPDD_PRES_G1_REG;
+             break;
+        case CPLD_QSFPDD_PRES_G2:
+             reg = CPLD_QSFPDD_PRES_G2_REG;
+             break;
+        case CPLD_QSFPDD_PRES_G3:
+             reg = CPLD_QSFPDD_PRES_G3_REG;
+             break;
+        case CPLD_QSFPDD_FUSE_INT_G0:
+             reg = CPLD_QSFPDD_FUSE_INT_G0_REG;
+             break;
+        case CPLD_QSFPDD_FUSE_INT_G1:
+             reg = CPLD_QSFPDD_FUSE_INT_G1_REG;
+             break;
+        case CPLD_QSFPDD_FUSE_INT_G2:
+             reg = CPLD_QSFPDD_FUSE_INT_G2_REG;
+             break;
+        case CPLD_QSFPDD_FUSE_INT_G3:
+             reg = CPLD_QSFPDD_FUSE_INT_G3_REG;
+             break;
+        case CPLD_SFP_TXFAULT:
+             reg = CPLD_SFP_TXFAULT_REG;
+             break;
+        case CPLD_SFP_ABS:
+             reg = CPLD_SFP_ABS_REG;
+             break;
+        case CPLD_SFP_RXLOS:
+             reg = CPLD_SFP_RXLOS_REG;
+             break;
+        case CPLD_QSFPDD_MOD_INT_MASK_G0:
+             reg = CPLD_QSFPDD_MOD_INT_MASK_G0_REG;
+             break;
+        case CPLD_QSFPDD_MOD_INT_MASK_G1:
+             reg = CPLD_QSFPDD_MOD_INT_MASK_G1_REG;
+             break;
+        case CPLD_QSFPDD_MOD_INT_MASK_G2:
+             reg = CPLD_QSFPDD_MOD_INT_MASK_G2_REG;
+             break;
+        case CPLD_QSFPDD_MOD_INT_MASK_G3:
+             reg = CPLD_QSFPDD_MOD_INT_MASK_G3_REG;
+             break;
+        case CPLD_QSFPDD_PRES_MASK_G0:
+             reg = CPLD_QSFPDD_PRES_MASK_G0_REG;
+             break;
+        case CPLD_QSFPDD_PRES_MASK_G1:
+             reg = CPLD_QSFPDD_PRES_MASK_G1_REG;
+             break;
+        case CPLD_QSFPDD_PRES_MASK_G2:
+             reg = CPLD_QSFPDD_PRES_MASK_G2_REG;
+             break;
+        case CPLD_QSFPDD_PRES_MASK_G3:
+             reg = CPLD_QSFPDD_PRES_MASK_G3_REG;
+             break;
+        case CPLD_QSFPDD_FUSE_INT_MASK_G0:
+             reg = CPLD_QSFPDD_FUSE_INT_MASK_G0_REG;
+             break;
+        case CPLD_QSFPDD_FUSE_INT_MASK_G1:
+             reg = CPLD_QSFPDD_FUSE_INT_MASK_G1_REG;
+             break;
+        case CPLD_QSFPDD_FUSE_INT_MASK_G2:
+             reg = CPLD_QSFPDD_FUSE_INT_MASK_G2_REG;
+             break;
+        case CPLD_QSFPDD_FUSE_INT_MASK_G3:
+             reg = CPLD_QSFPDD_FUSE_INT_MASK_G3_REG;
+             break;
+        case CPLD_SFP_TXFAULT_MASK:
+             reg = CPLD_SFP_TXFAULT_MASK_REG;
+             break;
+        case CPLD_SFP_ABS_MASK:
+             reg = CPLD_SFP_ABS_MASK_REG;
+             break;
+        case CPLD_SFP_RXLOS_MASK:
+             reg = CPLD_SFP_RXLOS_MASK_REG;
+             break;
+        case CPLD_QSFPDD_MOD_INT_EVENT_G0:
+             reg = CPLD_QSFPDD_MOD_INT_EVENT_G0_REG;
+             break;
+        case CPLD_QSFPDD_MOD_INT_EVENT_G1:
+             reg = CPLD_QSFPDD_MOD_INT_EVENT_G1_REG;
+             break;
+        case CPLD_QSFPDD_MOD_INT_EVENT_G2:
+             reg = CPLD_QSFPDD_MOD_INT_EVENT_G2_REG;
+             break;
+        case CPLD_QSFPDD_MOD_INT_EVENT_G3:
+             reg = CPLD_QSFPDD_MOD_INT_EVENT_G3_REG;
+             break;
+        case CPLD_QSFPDD_PRES_EVENT_G0:
+             reg = CPLD_QSFPDD_PRES_EVENT_G0_REG;
+             break;
+        case CPLD_QSFPDD_PRES_EVENT_G1:
+             reg = CPLD_QSFPDD_PRES_EVENT_G1_REG;
+             break;
+        case CPLD_QSFPDD_PRES_EVENT_G2:
+             reg = CPLD_QSFPDD_PRES_EVENT_G2_REG;
+             break;
+        case CPLD_QSFPDD_PRES_EVENT_G3:
+             reg = CPLD_QSFPDD_PRES_EVENT_G3_REG;
+             break;
+        case CPLD_QSFPDD_FUSE_INT_EVENT_G0:
+             reg = CPLD_QSFPDD_FUSE_INT_EVENT_G0_REG;
+             break;
+        case CPLD_QSFPDD_FUSE_INT_EVENT_G1:
+             reg = CPLD_QSFPDD_FUSE_INT_EVENT_G1_REG;
+             break;
+        case CPLD_QSFPDD_FUSE_INT_EVENT_G2:
+             reg = CPLD_QSFPDD_FUSE_INT_EVENT_G2_REG;
+             break;
+        case CPLD_QSFPDD_FUSE_INT_EVENT_G3:
+             reg = CPLD_QSFPDD_FUSE_INT_EVENT_G3_REG;
+             break;
+        case CPLD_SFP_TXFAULT_EVENT:
+             reg = CPLD_SFP_TXFAULT_EVENT_REG;
+             break;
+        case CPLD_SFP_ABS_EVENT:
+             reg = CPLD_SFP_ABS_EVENT_REG;
+             break;
+        case CPLD_SFP_RXLOS_EVENT:
+             reg = CPLD_SFP_RXLOS_EVENT_REG;
+             break;
+        case CPLD_QSFPDD_RESET_CTRL_G0:
+             reg = CPLD_QSFPDD_RESET_CTRL_G0_REG;
+             break;
+        case CPLD_QSFPDD_RESET_CTRL_G1:
+             reg = CPLD_QSFPDD_RESET_CTRL_G1_REG;
+             break;
+        case CPLD_QSFPDD_RESET_CTRL_G2:
+             reg = CPLD_QSFPDD_RESET_CTRL_G2_REG;
+             break;
+        case CPLD_QSFPDD_RESET_CTRL_G3:
+             reg = CPLD_QSFPDD_RESET_CTRL_G3_REG;
+             break;
+        case CPLD_QSFPDD_LP_MODE_G0:
+             reg = CPLD_QSFPDD_LP_MODE_G0_REG;
+             break;
+        case CPLD_QSFPDD_LP_MODE_G1:
+             reg = CPLD_QSFPDD_LP_MODE_G1_REG;
+             break;
+        case CPLD_QSFPDD_LP_MODE_G2:
+             reg = CPLD_QSFPDD_LP_MODE_G2_REG;
+             break;
+        case CPLD_QSFPDD_LP_MODE_G3:
+             reg = CPLD_QSFPDD_LP_MODE_G3_REG;
+             break;
+        case CPLD_SFP_TX_DIS:
+             reg = CPLD_SFP_TX_DIS_REG;
+             break;
+        case CPLD_SFP_RS:
+             reg = CPLD_SFP_RS_REG;
+             break;
+        case CPLD_SFP_TS:
+             reg = CPLD_SFP_TS_REG;
+             break;
+        case CPLD_PORT_INT_STATUS:
+             reg = CPLD_PORT_INT_STATUS_REG;
+             break;
+        default:
+            return -EINVAL;
+    }
+    return read_cpld_reg(dev, buf, reg);
+}
+
+/* handle read for hw_rev attributes */
+static ssize_t read_hw_rev_cb(struct device *dev,
+        struct device_attribute *da, char *buf)
+{
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
+    u8 reg = CPLD_HW_REV_REG;
+    u8 reg_val = 0;
+    int errno = 0;
+    u8 res;
+
+    if (!read_cpld_reg_raw_byte(dev, reg, &reg_val, &errno))
+        return errno;
+
+    switch (attr->index) {
+        case CPLD_HW_REV:
+             HW_REV_GET(reg_val, res);
+             break;
+        case CPLD_DEPH_REV:
+             DEPH_REV_GET(reg_val, res);
+             break;
+        case CPLD_BUILD_REV:
+             BUILD_REV_GET(reg_val, res);
+             break;
+        case CPLD_ID_TYPE:
+             ID_TYPE_GET(reg_val, res);
+             break;
+        default:
+            return -EINVAL;
+    }
+    return sprintf(buf, "0x%02x\n", res);
+}
+
+/* handle read for cpld_version attributes */
+static ssize_t read_cpld_version_cb(struct device *dev,
+        struct device_attribute *da, char *buf)
+{
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
+    u8 reg = CPLD_VERSION_REG;
+    u8 reg_val = 0;
+    int errno = 0;
+    u8 res;
+
+    if (!read_cpld_reg_raw_byte(dev, reg, &reg_val, &errno))
+        return errno;
+
+    switch (attr->index) {
+        case CPLD_MAJOR_VER:
+             CPLD_MAJOR_VERSION_GET(reg_val, res);
+             break;
+        case CPLD_MINOR_VER:
+             CPLD_MINOR_VERSION_GET(reg_val, res);
+             break;
+        default:
+            return -EINVAL;
+    }
+    return sprintf(buf, "0x%02x\n", res);
+}
+
+/* handle read human-readable string for cpld_version attributes */
+static ssize_t read_cpld_version_h_cb(struct device *dev,
+        struct device_attribute *da, char *buf)
+{
+    u8 reg = CPLD_VERSION_REG;
+    u8 reg_val = 0;
+    int errno = 0;
+    u8 major, minor, build;
+
+    //get major/minor register value
+    if(!read_cpld_reg_raw_byte(dev, reg, &reg_val, &errno))
+        return errno;
+    CPLD_MAJOR_VERSION_GET(reg_val, major);
+    CPLD_MINOR_VERSION_GET(reg_val, minor);
+
+    //get build register value
+    reg = CPLD_BUILD_VER_REG;
+    if(!read_cpld_reg_raw_byte(dev, reg, &build, &errno))
+        return errno;
+
+    //version string format : xx.xx.xxx
+    return sprintf(buf, "%d.%02d.%03d\n", major, minor, build);
+}
+
+/* handle write for attributes */
+static ssize_t write_cpld_callback(struct device *dev,
+        struct device_attribute *da, const char *buf, size_t count)
+{
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
+    u8 reg = 0;
+
+    switch (attr->index) {
+        case CPLD_MAC_INTR_MASK:
+             reg = CPLD_MAC_INTR_MASK_REG;
+             break;
+        case CPLD_10G_PHY_INTR_MASK:
+             reg = CPLD_10G_PHY_INTR_MASK_REG;
+             break;
+        case CPLD_CPLD_FRU_INTR_MASK:
+             reg = CPLD_CPLD_FRU_INTR_MASK_REG;
+             break;
+        case CPLD_THERMAL_ALERT_INTR_MASK:
+             reg = CPLD_THERMAL_ALERT_INTR_MASK_REG;
+             break;
+        case CPLD_MISC_INTR_MASK:
+             reg = CPLD_MISC_INTR_MASK_REG;
+             break;
+        case CPLD_MAC_RST:
+             reg = CPLD_MAC_RST_REG;
+             break;
+        case CPLD_10G_PHY_RST:
+             reg = CPLD_10G_PHY_RST_REG;
+             break;
+        case CPLD_BMC_RST:
+             reg = CPLD_BMC_RST_REG;
+             break;
+        case CPLD_USB_RST:
+             reg = CPLD_USB_RST_REG;
+             break;
+        case CPLD_MUX_RST:
+             reg = CPLD_MUX_RST_REG;
+             break;
+        case CPLD_MISC_RST:
+             reg = CPLD_MISC_RST_REG;
+             break;
+        case CPLD_BMC_WATCHDOG:
+             reg = CPLD_BMC_WATCHDOG_REG;
+             break;
+        case CPLD_MUX_CTRL:
+             reg = CPLD_MUX_CTRL_REG;
+             break;
+        case CPLD_MAC_QSFP_SEL_CTRL:
+             reg = CPLD_MAC_QSFP_SEL_CTRL_REG;
+             break;
+        case CPLD_BEACON_LED_CTRL:
+             reg = CPLD_BEACON_LED_CTRL_REG;
+             break;
+        case CPLD_PORT_LED_CLR_CTRL:
+             reg = CPLD_PORT_LED_CLR_CTRL_REG;
+             break;
+        case CPLD_EVENT_DETECT_CTRL:
+             reg = CPLD_EVENT_DETECT_CTRL_REG;
+             break;
+        case CPLD_QSFPDD_MOD_INT_MASK_G0:
+             reg = CPLD_QSFPDD_MOD_INT_MASK_G0_REG;
+             break;
+        case CPLD_QSFPDD_MOD_INT_MASK_G1:
+             reg = CPLD_QSFPDD_MOD_INT_MASK_G1_REG;
+             break;
+        case CPLD_QSFPDD_MOD_INT_MASK_G2:
+             reg = CPLD_QSFPDD_MOD_INT_MASK_G2_REG;
+             break;
+        case CPLD_QSFPDD_MOD_INT_MASK_G3:
+             reg = CPLD_QSFPDD_MOD_INT_MASK_G3_REG;
+             break;
+        case CPLD_QSFPDD_PRES_MASK_G0:
+             reg = CPLD_QSFPDD_PRES_MASK_G0_REG;
+             break;
+        case CPLD_QSFPDD_PRES_MASK_G1:
+             reg = CPLD_QSFPDD_PRES_MASK_G1_REG;
+             break;
+        case CPLD_QSFPDD_PRES_MASK_G2:
+             reg = CPLD_QSFPDD_PRES_MASK_G2_REG;
+             break;
+        case CPLD_QSFPDD_PRES_MASK_G3:
+             reg = CPLD_QSFPDD_PRES_MASK_G3_REG;
+             break;
+        case CPLD_QSFPDD_FUSE_INT_MASK_G0:
+             reg = CPLD_QSFPDD_FUSE_INT_MASK_G0_REG;
+             break;
+        case CPLD_QSFPDD_FUSE_INT_MASK_G1:
+             reg = CPLD_QSFPDD_FUSE_INT_MASK_G1_REG;
+             break;
+        case CPLD_QSFPDD_FUSE_INT_MASK_G2:
+             reg = CPLD_QSFPDD_FUSE_INT_MASK_G2_REG;
+             break;
+        case CPLD_QSFPDD_FUSE_INT_MASK_G3:
+             reg = CPLD_QSFPDD_FUSE_INT_MASK_G3_REG;
+             break;
+        case CPLD_SFP_TXFAULT_MASK:
+             reg = CPLD_SFP_TXFAULT_MASK_REG;
+             break;
+        case CPLD_SFP_ABS_MASK:
+             reg = CPLD_SFP_ABS_MASK_REG;
+             break;
+        case CPLD_SFP_RXLOS_MASK:
+             reg = CPLD_SFP_RXLOS_MASK_REG;
+             break;
+        case CPLD_QSFPDD_RESET_CTRL_G0:
+             reg = CPLD_QSFPDD_RESET_CTRL_G0_REG;
+             break;
+        case CPLD_QSFPDD_RESET_CTRL_G1:
+             reg = CPLD_QSFPDD_RESET_CTRL_G1_REG;
+             break;
+        case CPLD_QSFPDD_RESET_CTRL_G2:
+             reg = CPLD_QSFPDD_RESET_CTRL_G2_REG;
+             break;
+        case CPLD_QSFPDD_RESET_CTRL_G3:
+             reg = CPLD_QSFPDD_RESET_CTRL_G3_REG;
+             break;
+        case CPLD_QSFPDD_LP_MODE_G0:
+             reg = CPLD_QSFPDD_LP_MODE_G0_REG;
+             break;
+        case CPLD_QSFPDD_LP_MODE_G1:
+             reg = CPLD_QSFPDD_LP_MODE_G1_REG;
+             break;
+        case CPLD_QSFPDD_LP_MODE_G2:
+             reg = CPLD_QSFPDD_LP_MODE_G2_REG;
+             break;
+        case CPLD_QSFPDD_LP_MODE_G3:
+             reg = CPLD_QSFPDD_LP_MODE_G3_REG;
+             break;
+        case CPLD_SFP_TX_DIS:
+             reg = CPLD_SFP_TX_DIS_REG;
+             break;
+        case CPLD_SFP_RS:
+             reg = CPLD_SFP_RS_REG;
+             break;
+        case CPLD_SFP_TS:
+             reg = CPLD_SFP_TS_REG;
+             break;
+        default:
+            return -EINVAL;
+    }
+    return write_cpld_reg(dev, buf, count, reg);
+}
+
+/* set cpld register value */
+static ssize_t write_cpld_reg(struct device *dev,
+                    const char *buf,
+                    size_t count,
+                    u8 reg)
+{
+    struct i2c_client *client = to_i2c_client(dev);
+    struct cpld_data *data = i2c_get_clientdata(client);
+    u8 reg_val;
+    int ret;
+
+    if (kstrtou8(buf, 0, &reg_val) < 0)
+        return -EINVAL;
+
+    I2C_WRITE_BYTE_DATA(ret, &data->access_lock,
+               client, reg, reg_val);
+
+    if (unlikely(ret < 0)) {
+        dev_err(dev, "I2C_WRITE_BYTE_DATA error, return=%d\n", ret);
+        return ret;
+    }
+
+    return count;
+}
+
+/* add valid cpld client to list */
+static void s9301_cpld_add_client(struct i2c_client *client)
+{
+    struct cpld_client_node *node = NULL;
+
+    node = kzalloc(sizeof(struct cpld_client_node), GFP_KERNEL);
+    if (!node) {
+        dev_info(&client->dev,
+            "Can't allocate cpld_client_node for index %d\n",
+            client->addr);
+        return;
+    }
+
+    node->client = client;
+
+    mutex_lock(&list_lock);
+    list_add(&node->list, &cpld_client_list);
+    mutex_unlock(&list_lock);
+}
+
+/* remove exist cpld client in list */
+static void s9301_cpld_remove_client(struct i2c_client *client)
+{
+    struct list_head    *list_node = NULL;
+    struct cpld_client_node *cpld_node = NULL;
+    int found = 0;
+
+    mutex_lock(&list_lock);
+    list_for_each(list_node, &cpld_client_list) {
+        cpld_node = list_entry(list_node,
+                struct cpld_client_node, list);
+
+        if (cpld_node->client == client) {
+            found = 1;
+            break;
+        }
+    }
+
+    if (found) {
+        list_del(list_node);
+        kfree(cpld_node);
+    }
+    mutex_unlock(&list_lock);
+}
+
+/* cpld drvier probe */
+static int s9301_cpld_probe(struct i2c_client *client,
+                    const struct i2c_device_id *dev_id)
+{
+    int status;
+    struct cpld_data *data = NULL;
+    int ret = -EPERM;
+    int idx;
+
+    data = kzalloc(sizeof(struct cpld_data), GFP_KERNEL);
+    if (!data)
+        return -ENOMEM;
+
+    /* init cpld data for client */
+    i2c_set_clientdata(client, data);
+    mutex_init(&data->access_lock);
+
+    if (!i2c_check_functionality(client->adapter,
+                I2C_FUNC_SMBUS_BYTE_DATA)) {
+        dev_info(&client->dev,
+            "i2c_check_functionality failed (0x%x)\n",
+            client->addr);
+        status = -EIO;
+        goto exit;
+    }
+
+    /* get cpld id from device */
+    ret = i2c_smbus_read_byte_data(client, CPLD_ID_REG);
+
+    if (ret < 0) {
+        dev_info(&client->dev,
+            "fail to get cpld id (0x%x) at addr (0x%x)\n",
+            CPLD_ID_REG, client->addr);
+        status = -EIO;
+        goto exit;
+    }
+
+    CPLD_ID_ID_GET(ret,  idx);
+
+    if (INVALID(idx, cpld1, cpld3)) {
+        dev_info(&client->dev,
+            "cpld id %d(device) not valid\n", idx);
+        //status = -EPERM;
+        //goto exit;
+    }
+
+    data->index = dev_id->driver_data;
+
+    /* register sysfs hooks for different cpld group */
+    dev_info(&client->dev, "probe cpld with index %d\n", data->index);
+    switch (data->index) {
+    case cpld1:
+        status = sysfs_create_group(&client->dev.kobj,
+                    &s9301_cpld1_group);
+        break;
+    case cpld2:
+        status = sysfs_create_group(&client->dev.kobj,
+                    &s9301_cpld2_group);
+        break;
+    case cpld3:
+        status = sysfs_create_group(&client->dev.kobj,
+                    &s9301_cpld3_group);
+        break;
+    default:
+        status = -EINVAL;
+    }
+
+    if (status)
+        goto exit;
+
+    dev_info(&client->dev, "chip found\n");
+
+    /* add probe chip to client list */
+    s9301_cpld_add_client(client);
+
+    return 0;
+exit:
+    switch (data->index) {
+    case cpld1:
+        sysfs_remove_group(&client->dev.kobj, &s9301_cpld1_group);
+        break;
+    case cpld2:
+        sysfs_remove_group(&client->dev.kobj, &s9301_cpld2_group);
+        break;
+    case cpld3:
+        sysfs_remove_group(&client->dev.kobj, &s9301_cpld3_group);
+        break;
+    default:
+        break;
+    }
+    return status;
+}
+
+/* cpld drvier remove */
+#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0)
+static int
+#else
+static void
+#endif
+s9301_cpld_remove(struct i2c_client *client)
+{
+    struct cpld_data *data = i2c_get_clientdata(client);
+
+    switch (data->index) {
+    case cpld1:
+        sysfs_remove_group(&client->dev.kobj, &s9301_cpld1_group);
+        break;
+    case cpld2:
+        sysfs_remove_group(&client->dev.kobj, &s9301_cpld2_group);
+        break;
+    case cpld3:
+        sysfs_remove_group(&client->dev.kobj, &s9301_cpld3_group);
+        break;
+    }
+
+    s9301_cpld_remove_client(client);
+#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0)
+    return 0;
+#endif
+}
+
+MODULE_DEVICE_TABLE(i2c, s9301_cpld_id);
+
+static struct i2c_driver s9301_cpld_driver = {
+    .class      = I2C_CLASS_HWMON,
+    .driver = {
+        .name = "x86_64_ufispace_s9301_32d_cpld",
+    },
+    .probe = s9301_cpld_probe,
+    .remove = s9301_cpld_remove,
+    .id_table = s9301_cpld_id,
+    .address_list = cpld_i2c_addr,
+};
+
+/* provide cpld register read */
+/* cpld_idx indicate the index of cpld device */
+int s9301_cpld_read(u8 cpld_idx,
+                u8 reg)
+{
+    struct list_head *list_node = NULL;
+    struct cpld_client_node *cpld_node = NULL;
+    int ret = -EPERM;
+    struct cpld_data *data;
+
+    list_for_each(list_node, &cpld_client_list) {
+        cpld_node = list_entry(list_node,
+                    struct cpld_client_node, list);
+        data = i2c_get_clientdata(cpld_node->client);
+        if (data->index == cpld_idx) {
+            DEBUG_PRINT("cpld_idx=%d, read reg 0x%02x",
+                    cpld_idx, reg);
+            I2C_READ_BYTE_DATA(ret, &data->access_lock,
+                    cpld_node->client, reg);
+            DEBUG_PRINT("cpld_idx=%d, read reg 0x%02x = 0x%02x",
+                    cpld_idx, reg, ret);
+        break;
+        }
+    }
+
+    return ret;
+}
+EXPORT_SYMBOL(s9301_cpld_read);
+
+/* provide cpld register write */
+/* cpld_idx indicate the index of cpld device */
+int s9301_cpld_write(u8 cpld_idx,
+                u8 reg,
+                u8 value)
+{
+    struct list_head *list_node = NULL;
+    struct cpld_client_node *cpld_node = NULL;
+    int ret = -EIO;
+    struct cpld_data *data;
+
+    list_for_each(list_node, &cpld_client_list) {
+        cpld_node = list_entry(list_node,
+                    struct cpld_client_node, list);
+        data = i2c_get_clientdata(cpld_node->client);
+
+        if (data->index == cpld_idx) {
+                        I2C_WRITE_BYTE_DATA(ret, &data->access_lock,
+                        cpld_node->client,
+                        reg, value);
+            DEBUG_PRINT("cpld_idx=%d, write reg 0x%02x val 0x%02x, ret=%d",
+                            cpld_idx, reg, value, ret);
+            break;
+        }
+    }
+
+    return ret;
+}
+EXPORT_SYMBOL(s9301_cpld_write);
+
+static int __init s9301_cpld_init(void)
+{
+    mutex_init(&list_lock);
+    return i2c_add_driver(&s9301_cpld_driver);
+}
+
+static void __exit s9301_cpld_exit(void)
+{
+    i2c_del_driver(&s9301_cpld_driver);
+}
+
+MODULE_AUTHOR("Leo Lin <leo.yt.lin@ufispace.com>");
+MODULE_DESCRIPTION("x86_64_ufispace_s9301_cpld driver");
+MODULE_LICENSE("GPL");
+
+module_init(s9301_cpld_init);
+module_exit(s9301_cpld_exit);
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/modules/x86-64-ufispace-s9301-32d-cpld.h b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/modules/x86-64-ufispace-s9301-32d-cpld.h
new file mode 100644
index 000000000..9eca44006
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/modules/x86-64-ufispace-s9301-32d-cpld.h
@@ -0,0 +1,251 @@
+/* header file for i2c cpld driver of ufispace_s9301_32d
+ *
+ * Copyright (C) 2017 UfiSpace Technology Corporation.
+ * Leo Lin <leo.yt.lin@ufispace.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef UFISPACE_S9301_I2C_CPLD_H
+#define UFISPACE_S9301_I2C_CPLD_H
+
+/* CPLD device index value */
+enum cpld_id {
+    cpld1,
+    cpld2,
+    cpld3,
+};
+
+enum LED_BLINK {
+    NOBLINK,
+    BLINK,
+};
+
+enum LED_BLINK_SPEED {
+    BLINK_1X,  // 0.5hz
+    BLINK_4X,  // 2hz
+};
+
+enum LED_STATUS {
+    OFF,
+    ON,
+};
+
+enum LED_YELLOW {
+    YELLOW_OFF,
+    YELLOW_ON,
+};
+
+enum LED_GREEN {
+    GREEN_OFF,
+    GREEN_ON,
+};
+
+/* QSFPDD port number */
+#define QSFPDD_MAX_PORT_NUM   32
+#define QSFPDD_MIN_PORT_NUM   1
+
+/* SFP+ port number */
+#define SFP_MAX_PORT_NUM    4
+#define SFP_MIN_PORT_NUM    1
+
+
+/* CPLD registers */
+/* CPLD 1 */
+#define CPLD_SKU_ID_REG                     0x00
+#define CPLD_HW_REV_REG	                    0x01
+#define CPLD_VERSION_REG                    0x02
+#define CPLD_ID_REG                         0x03
+#define CPLD_BUILD_VER_REG                  0x04
+// Interrupt status
+#define CPLD_MAC_INTR_REG                   0x10
+#define CPLD_10G_PHY_INTR_REG               0x13
+#define CPLD_CPLD_FRU_INTR_REG              0x14
+#define CPLD_THERMAL_ALERT_INTR_REG         0x16
+#define CPLD_MISC_INTR_REG                  0x1B
+#define CPLD_SYSTEM_INTR_REG                0x1D
+// Interrupt mask
+#define CPLD_MAC_INTR_MASK_REG              0x20
+#define CPLD_10G_PHY_INTR_MASK_REG          0x23
+#define CPLD_CPLD_FRU_INTR_MASK_REG         0x24
+#define CPLD_THERMAL_ALERT_INTR_MASK_REG    0x26
+#define CPLD_MISC_INTR_MASK_REG             0x2B
+// Interrupt event
+#define CPLD_MAC_INTR_EVENT_REG             0x30
+#define CPLD_10G_PHY_INTR_EVENT_REG         0x33
+#define CPLD_CPLD_FRU_INTR_EVENT_REG        0x14
+#define CPLD_THERMAL_ALERT_INTR_EVENT_REG   0x16
+#define CPLD_MISC_INTR_EVENT_REG            0x1B
+// Reset ctrl
+#define CPLD_MAC_RST_REG                    0x40
+#define CPLD_10G_PHY_RST_REG                0x42
+#define CPLD_BMC_RST_REG                    0x43
+#define CPLD_USB_RST_REG                    0x44
+#define CPLD_MUX_RST_REG                    0x46
+#define CPLD_MISC_RST_REG                   0x48
+#define CPLD_BMC_WATCHDOG_REG               0x4D
+// Sys status
+#define CPLD_DAU_BD_PRES_REG                0x50
+#define CPLD_PSU_STATUS_REG                 0x51
+#define CPLD_SYS_PW_STATUS_REG              0x52
+#define CPLD_MISC_REG                       0x5B
+// Mux ctrl
+#define CPLD_MUX_CTRL_REG                   0x5C
+#define CPLD_MAC_QSFP_SEL_CTRL_REG          0x5F
+// Led ctrl
+#define CPLD_SYS_LED_CTRL_1_REG             0x80
+#define CPLD_SYS_LED_CTRL_2_REG             0x81
+#define CPLD_BEACON_LED_CTRL_REG            0x84
+#define CPLD_PORT_LED_CLR_CTRL_REG          0x85
+// Event Detect Ctrl
+#define CPLD_EVENT_DETECT_CTRL_REG          0x5D
+
+/* CPLD 2 */
+/*  G0 - port 0 ~ 7
+    G1 - port 8 ~ 15
+    G2 - port 16 ~ 23
+    G3 - port 24 ~ 31
+  */
+// Interrupt status
+#define CPLD_QSFPDD_MOD_INT_G0_REG	    	0x10
+#define CPLD_QSFPDD_MOD_INT_G1_REG	    	0x11
+#define CPLD_QSFPDD_MOD_INT_G2_REG	    	0x12
+#define CPLD_QSFPDD_MOD_INT_G3_REG	    	0x13
+#define CPLD_QSFPDD_PRES_G0_REG			    0x14
+#define CPLD_QSFPDD_PRES_G1_REG			    0x15
+#define CPLD_QSFPDD_PRES_G2_REG		    	0x16
+#define CPLD_QSFPDD_PRES_G3_REG		    	0x17
+#define CPLD_QSFPDD_FUSE_INT_G0_REG	    	0x18
+#define CPLD_QSFPDD_FUSE_INT_G1_REG	    	0x19
+#define CPLD_QSFPDD_FUSE_INT_G2_REG	    	0x1A
+#define CPLD_QSFPDD_FUSE_INT_G3_REG	    	0x1B
+#define CPLD_SFP_TXFAULT_REG			    0x1D
+#define CPLD_SFP_ABS_REG				    0x1E
+#define CPLD_SFP_RXLOS_REG			    	0x1F
+// Interrupt mask
+#define CPLD_QSFPDD_MOD_INT_MASK_G0_REG		0x20
+#define CPLD_QSFPDD_MOD_INT_MASK_G1_REG		0x21
+#define CPLD_QSFPDD_MOD_INT_MASK_G2_REG		0x22
+#define CPLD_QSFPDD_MOD_INT_MASK_G3_REG		0x23
+#define CPLD_QSFPDD_PRES_MASK_G0_REG		0x24
+#define CPLD_QSFPDD_PRES_MASK_G1_REG		0x25
+#define CPLD_QSFPDD_PRES_MASK_G2_REG		0x26
+#define CPLD_QSFPDD_PRES_MASK_G3_REG		0x27
+#define CPLD_QSFPDD_FUSE_INT_MASK_G0_REG	0x28
+#define CPLD_QSFPDD_FUSE_INT_MASK_G1_REG	0x29
+#define CPLD_QSFPDD_FUSE_INT_MASK_G2_REG	0x2A
+#define CPLD_QSFPDD_FUSE_INT_MASK_G3_REG	0x2B
+#define CPLD_SFP_TXFAULT_MASK_REG			0x2D
+#define CPLD_SFP_ABS_MASK_REG				0x2E
+#define CPLD_SFP_RXLOS_MASK_REG				0x2F
+// Interrupt event
+#define CPLD_QSFPDD_MOD_INT_EVENT_G0_REG    0x30
+#define CPLD_QSFPDD_MOD_INT_EVENT_G1_REG	0x31
+#define CPLD_QSFPDD_MOD_INT_EVENT_G2_REG	0x32
+#define CPLD_QSFPDD_MOD_INT_EVENT_G3_REG	0x33
+#define CPLD_QSFPDD_PRES_EVENT_G0_REG		0x34
+#define CPLD_QSFPDD_PRES_EVENT_G1_REG		0x35
+#define CPLD_QSFPDD_PRES_EVENT_G2_REG		0x36
+#define CPLD_QSFPDD_PRES_EVENT_G3_REG		0x37
+#define CPLD_QSFPDD_FUSE_INT_EVENT_G0_REG	0x38
+#define CPLD_QSFPDD_FUSE_INT_EVENT_G1_REG	0x39
+#define CPLD_QSFPDD_FUSE_INT_EVENT_G2_REG	0x3A
+#define CPLD_QSFPDD_FUSE_INT_EVENT_G3_REG	0x3B
+#define CPLD_SFP_TXFAULT_EVENT_REG			0x3D
+#define CPLD_SFP_ABS_EVENT_REG				0x3E
+#define CPLD_SFP_RXLOS_EVENT_REG			0x3F
+// Port ctrl
+#define CPLD_QSFPDD_RESET_CTRL_G0_REG	    0x40
+#define CPLD_QSFPDD_RESET_CTRL_G1_REG	    0x41
+#define CPLD_QSFPDD_RESET_CTRL_G2_REG	    0x42
+#define CPLD_QSFPDD_RESET_CTRL_G3_REG	    0x43
+#define CPLD_QSFPDD_LP_MODE_G0_REG		    0x44
+#define CPLD_QSFPDD_LP_MODE_G1_REG		    0x45
+#define CPLD_QSFPDD_LP_MODE_G2_REG		    0x46
+#define CPLD_QSFPDD_LP_MODE_G3_REG		    0x47
+#define CPLD_SFP_TX_DIS_REG				    0x55
+#define CPLD_SFP_RS_REG					    0x56
+#define CPLD_SFP_TS_REG					    0x57
+// Port status
+#define CPLD_PORT_INT_STATUS_REG            0x58
+
+
+/* bit field structure for register value */
+struct cpld_reg_sku_id_t {
+    u8 model_id:8;
+};
+
+struct cpld_reg_hw_rev_t {
+    u8 hw_rev:2;
+    u8 deph_rev:1;
+    u8 build_rev:3;
+    u8 reserved:1;
+    u8 id_type:1;
+};
+
+struct cpld_reg_version_t {
+    u8 minor:6;
+    u8 major:2;
+};
+
+struct cpld_reg_id_t {
+    u8 id:3;
+    u8 release:5;
+};
+
+struct cpld_reg_beacon_led_ctrl_t {
+    u8 reserve:5;
+    u8 speed:1;
+    u8 blink:1;
+    u8 onoff:1;
+};
+
+/* common manipulation */
+#define INVALID(i, min, max)    ((i < min) || (i > max) ? 1u : 0u)
+#define READ_BIT(val, bit)      ((0u == (val & (1<<bit))) ? 0u : 1u)
+#define SET_BIT(val, bit)       (val |= (1 << bit))
+#define CLEAR_BIT(val, bit)     (val &= ~(1 << bit))
+#define TOGGLE_BIT(val, bit)    (val ^= (1 << bit))
+#define _BIT(n)                 (1<<(n))
+#define _BIT_MASK(len)          (BIT(len)-1)
+
+/* bitfield of register manipulation */
+#define READ_BF(bf_struct, val, bf_name, bf_value) \
+    (bf_value = ((struct bf_struct *)&val)->bf_name)
+#define READ_BF_1(bf_struct, val, bf_name, bf_value) \
+    bf_struct bf; \
+    bf.data = val; \
+    bf_value = bf.bf_name
+#define HW_REV_GET(val, res) \
+    READ_BF(cpld_reg_hw_rev_t, val, hw_rev, res)
+#define DEPH_REV_GET(val, res) \
+    READ_BF(cpld_reg_hw_rev_t, val, deph_rev, res)
+#define BUILD_REV_GET(val, res) \
+    READ_BF(cpld_reg_hw_rev_t, val, build_rev, res)
+#define ID_TYPE_GET(val, res) \
+    READ_BF(cpld_reg_hw_rev_t, val, id_type, res)
+#define CPLD_MAJOR_VERSION_GET(val, res) \
+    READ_BF(cpld_reg_version_t, val, major, res)
+#define CPLD_MINOR_VERSION_GET(val, res) \
+    READ_BF(cpld_reg_version_t, val, minor, res)
+#define CPLD_ID_ID_GET(val, res) \
+    READ_BF(cpld_reg_id_t, val, id, res)
+
+/* CPLD access functions */
+extern int s9301_cpld_read(u8 cpld_idx, u8 reg);
+extern int s9301_cpld_write(u8 cpld_idx, u8 reg, u8 value);
+
+#endif
+
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/modules/x86-64-ufispace-s9301-32d-lpc.c b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/modules/x86-64-ufispace-s9301-32d-lpc.c
new file mode 100644
index 000000000..23245ebc9
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/modules/x86-64-ufispace-s9301-32d-lpc.c
@@ -0,0 +1,850 @@
+/*
+ * A lpc driver for the ufispace_s9301_32d
+ *
+ * Copyright (C) 2017-2020 UfiSpace Technology Corporation.
+ * Jason Tsai <jason.cy.tsai@ufispace.com>
+ *
+ * Based on ad7414.c
+ * Copyright 2006 Stefan Roese <sr at denx.de>, DENX Software Engineering
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#include <linux/module.h>
+#include <linux/delay.h>
+#include <linux/io.h>
+#include <linux/platform_device.h>
+#include <linux/hwmon-sysfs.h>
+
+#define BSP_LOG_R(fmt, args...) \
+    _bsp_log (LOG_READ, KERN_INFO "%s:%s[%d]: " fmt "\r\n", \
+            __FILE__, __func__, __LINE__, ##args)
+#define BSP_LOG_W(fmt, args...) \
+    _bsp_log (LOG_WRITE, KERN_INFO "%s:%s[%d]: " fmt "\r\n", \
+            __FILE__, __func__, __LINE__, ##args)
+
+#define BSP_PR(level, fmt, args...) _bsp_log (LOG_SYS, level "[BSP]" fmt "\r\n", ##args)
+
+#define DRIVER_NAME "x86_64_ufispace_s9301_32d_lpc"
+#define CPU_BDE 0
+#define CPU_SKY 1
+#define CPU_TYPE CPU_SKY
+
+/* LPC registers */
+
+#define REG_BASE_CPU                      0x600
+
+#if CPU_TYPE == CPU_SKY
+#define REG_BASE_MB                       0xE00
+#define REG_BASE_I2C_ALERT                0x700
+#else
+#define REG_BASE_MB                       0x700
+#define REG_BASE_I2C_ALERT                0xF000
+#endif
+
+//CPU CPLD
+#define REG_CPU_CPLD_VERSION              (REG_BASE_CPU + 0x00)
+#define REG_CPU_STATUS_0                  (REG_BASE_CPU + 0x01)
+#define REG_CPU_STATUS_1                  (REG_BASE_CPU + 0x02)
+#define REG_CPU_CTRL_0                    (REG_BASE_CPU + 0x03)
+#define REG_CPU_CTRL_1                    (REG_BASE_CPU + 0x04)
+#define REG_CPU_CPLD_BUILD                (REG_BASE_CPU + 0xE0)
+
+//MB CPLD
+//TBD, need to change after CPLD spec release
+#define REG_MB_BRD_ID_0                   (REG_BASE_MB + 0x00)
+#define REG_MB_BRD_ID_1                   (REG_BASE_MB + 0x01)
+#define REG_MB_CPLD_VERSION               (REG_BASE_MB + 0x02)
+#define REG_MB_CPLD_BUILD                 (REG_BASE_MB + 0x04)
+#define REG_MB_MUX_RESET                  (REG_BASE_MB + 0x46)
+#define REG_MB_MUX_CTRL                   (REG_BASE_MB + 0x5c)
+
+//I2C Alert
+#if CPU_TYPE == CPU_SKY
+#define REG_ALERT_STATUS                  (REG_BASE_I2C_ALERT + 0x80)
+#else
+#define REG_ALERT_STATUS                  (REG_BASE_I2C_ALERT + 0x00)
+#define REG_ALERT_DISABLE                 (REG_BASE_I2C_ALERT + 0x11)
+#endif
+
+#define MASK_ALL                          (0xFF)
+#define LPC_MDELAY                        (5)
+
+/* LPC sysfs attributes index  */
+enum lpc_sysfs_attributes {
+    //CPU CPLD
+    ATT_CPU_CPLD_VERSION,
+    ATT_CPU_CPLD_VERSION_H,
+    ATT_CPU_BIOS_BOOT_ROM,
+    ATT_CPU_BIOS_BOOT_CFG,
+    ATT_CPU_CPLD_BUILD,
+    //MB CPLD
+    ATT_MB_BRD_ID_0,
+    ATT_MB_BRD_ID_1,
+    ATT_MB_CPLD_1_VERSION,
+    ATT_MB_CPLD_1_VERSION_H,
+    ATT_MB_CPLD_1_BUILD,
+    ATT_MB_MUX_CTRL,
+    ATT_MB_MUX_RESET,
+    ATT_MB_BRD_SKU_ID,
+    ATT_MB_BRD_HW_ID,
+    ATT_MB_BRD_ID_TYPE,
+    ATT_MB_BRD_BUILD_ID,
+    ATT_MB_BRD_DEPH_ID,
+    //I2C Alert
+    ATT_ALERT_STATUS,
+#if CPU_TYPE == CPU_BDE
+    ATT_ALERT_DISABLE,
+#endif
+    //BSP
+    ATT_BSP_VERSION,
+    ATT_BSP_DEBUG,
+    ATT_BSP_PR_INFO,
+    ATT_BSP_PR_ERR,
+    ATT_BSP_REG,
+    ATT_MAX
+};
+
+enum bsp_log_types {
+    LOG_NONE,
+    LOG_RW,
+    LOG_READ,
+    LOG_WRITE,
+    LOG_SYS
+};
+
+enum bsp_log_ctrl {
+    LOG_DISABLE,
+    LOG_ENABLE
+};
+
+struct lpc_data_s {
+    struct mutex    access_lock;
+};
+
+struct lpc_data_s *lpc_data;
+char bsp_version[16]="";
+char bsp_debug[2]="0";
+char bsp_reg[8]="0x0";
+u8 enable_log_read=LOG_DISABLE;
+u8 enable_log_write=LOG_DISABLE;
+u8 enable_log_sys=LOG_ENABLE;
+
+/* reg shift */
+static u8 _shift(u8 mask)
+{
+    int i=0, mask_one=1;
+
+    for(i=0; i<8; ++i) {
+        if ((mask & mask_one) == 1)
+            return i;
+        else
+            mask >>= 1;
+    }
+
+    return -1;
+}
+
+/* reg mask and shift */
+static u8 _mask_shift(u8 val, u8 mask)
+{
+    int shift=0;
+
+    shift = _shift(mask);
+
+    return (val & mask) >> shift;
+}
+
+static u8 _bit_operation(u8 reg_val, u8 bit, u8 bit_val)
+{
+    if (bit_val == 0)
+        reg_val = reg_val & ~(1 << bit);
+    else
+        reg_val = reg_val | (1 << bit);
+    return reg_val;
+}
+
+static int _bsp_log(u8 log_type, char *fmt, ...)
+{
+    if ((log_type==LOG_READ  && enable_log_read) ||
+        (log_type==LOG_WRITE && enable_log_write) ||
+        (log_type==LOG_SYS && enable_log_sys) ) {
+        va_list args;
+        int r;
+
+        va_start(args, fmt);
+        r = vprintk(fmt, args);
+        va_end(args);
+
+        return r;
+    } else {
+        return 0;
+    }
+}
+
+static int _config_bsp_log(u8 log_type)
+{
+    switch(log_type) {
+        case LOG_NONE:
+            enable_log_read = LOG_DISABLE;
+            enable_log_write = LOG_DISABLE;
+            break;
+        case LOG_RW:
+            enable_log_read = LOG_ENABLE;
+            enable_log_write = LOG_ENABLE;
+            break;
+        case LOG_READ:
+            enable_log_read = LOG_ENABLE;
+            enable_log_write = LOG_DISABLE;
+            break;
+        case LOG_WRITE:
+            enable_log_read = LOG_DISABLE;
+            enable_log_write = LOG_ENABLE;
+            break;
+        default:
+            return -EINVAL;
+    }
+    return 0;
+}
+
+/* get lpc register value */
+static u8 _read_lpc_reg(u16 reg, u8 mask)
+{
+    u8 reg_val;
+
+    mutex_lock(&lpc_data->access_lock);
+    reg_val=_mask_shift(inb(reg), mask);
+    mutex_unlock(&lpc_data->access_lock);
+
+    BSP_LOG_R("reg=0x%03x, reg_val=0x%02x", reg, reg_val);
+
+    return reg_val;
+}
+
+/* get lpc register value */
+static ssize_t read_lpc_reg(u16 reg, u8 mask, char *buf)
+{
+    u8 reg_val;
+    int len=0;
+
+    reg_val = _read_lpc_reg(reg, mask);
+    len=sprintf(buf,"0x%x\n", reg_val);
+
+    return len;
+}
+
+/* set lpc register value */
+static ssize_t write_lpc_reg(u16 reg, u8 mask, const char *buf, size_t count)
+{
+    u8 reg_val, reg_val_now, shift;
+
+    if (kstrtou8(buf, 0, &reg_val) < 0)
+        return -EINVAL;
+
+    //apply SINGLE BIT operation if mask is specified, multiple bits are not supported
+    if (mask != MASK_ALL) {
+        reg_val_now = _read_lpc_reg(reg, 0x0);
+        shift = _shift(mask);
+        reg_val = _bit_operation(reg_val_now, shift, reg_val);
+    }
+
+    mutex_lock(&lpc_data->access_lock);
+
+    outb(reg_val, reg);
+    mdelay(LPC_MDELAY);
+
+    mutex_unlock(&lpc_data->access_lock);
+
+    BSP_LOG_W("reg=0x%03x, reg_val=0x%02x", reg, reg_val);
+
+    return count;
+}
+
+/* get bsp value */
+static ssize_t read_bsp(char *buf, char *str)
+{
+    ssize_t len=0;
+
+    mutex_lock(&lpc_data->access_lock);
+    len=sprintf(buf, "%s", str);
+    mutex_unlock(&lpc_data->access_lock);
+
+    BSP_LOG_R("reg_val=%s", str);
+
+    return len;
+}
+
+/* set bsp value */
+static ssize_t write_bsp(const char *buf, char *str, size_t str_len, size_t count)
+{
+    mutex_lock(&lpc_data->access_lock);
+    snprintf(str, str_len, "%s", buf);
+    mutex_unlock(&lpc_data->access_lock);
+
+    BSP_LOG_W("reg_val=%s", str);
+
+    return count;
+}
+
+/* get cpu cpld version in human readable format */
+static ssize_t read_cpu_cpld_version_h(struct device *dev,
+        struct device_attribute *da, char *buf)
+{
+    ssize_t len=0;
+    u16 reg = REG_CPU_CPLD_VERSION;
+    u8 mask = MASK_ALL;
+    u8 mask_major = 0b11000000;
+    u8 mask_minor = 0b00111111;
+    u8 reg_val;
+    u8 major, minor, build;
+
+    mutex_lock(&lpc_data->access_lock);
+    reg_val = _mask_shift(inb(reg), mask);
+    major = _mask_shift(reg_val, mask_major);
+    minor = _mask_shift(reg_val, mask_minor);
+    reg = REG_CPU_CPLD_BUILD;
+    build = _mask_shift(inb(reg), mask);
+    len = sprintf(buf, "%d.%02d.%03d\n", major, minor, build);
+    mutex_unlock(&lpc_data->access_lock);
+
+    BSP_LOG_R("reg=0x%03x, reg_val=0x%02x", reg, reg_val);
+
+    return len;
+}
+
+/* get mb cpld version in human readable format */
+static ssize_t read_mb_cpld_1_version_h(struct device *dev,
+        struct device_attribute *da, char *buf)
+{
+    ssize_t len=0;
+    u16 reg = REG_MB_CPLD_VERSION;
+    u8 mask = MASK_ALL;
+    u8 mask_major = 0b11000000;
+    u8 mask_minor = 0b00111111;
+    u8 reg_val;
+    u8 major, minor, build;
+
+    mutex_lock(&lpc_data->access_lock);
+    reg_val = _mask_shift(inb(reg), mask);
+    major = _mask_shift(reg_val, mask_major);
+    minor = _mask_shift(reg_val, mask_minor);
+    reg = REG_MB_CPLD_BUILD;
+    build = _mask_shift(inb(reg), mask);
+    len = sprintf(buf, "%d.%02d.%03d\n", major, minor, build);
+    mutex_unlock(&lpc_data->access_lock);
+
+    BSP_LOG_R("reg=0x%03x, reg_val=0x%02x", reg, reg_val);
+
+    return len;
+}
+
+/* get mux_reset register value */
+static ssize_t read_mux_reset_callback(struct device *dev,
+        struct device_attribute *da, char *buf)
+{
+    int len = 0;
+    u16 reg = REG_MB_MUX_RESET;
+    u8 mask = 0b00011111;
+    u8 reg_val;
+
+    mutex_lock(&lpc_data->access_lock);
+    reg_val=_mask_shift(inb(reg), mask);
+    BSP_LOG_R("reg=0x%03x, reg_val=0x%02x", reg, reg_val);
+    len=sprintf(buf, "%d\n", reg_val);
+    mutex_unlock(&lpc_data->access_lock);
+
+    return len;
+}
+
+/* set mux_reset register value */
+static ssize_t write_mux_reset_callback(struct device *dev,
+        struct device_attribute *da, const char *buf, size_t count)
+{
+    u8 val = 0;
+    u16 reg = REG_MB_MUX_RESET;
+    u8 reg_val = 0;
+    u8 mask = 0b00011111;
+    static int mux_reset_flag = 0;
+
+    if (kstrtou8(buf, 0, &val) < 0)
+        return -EINVAL;
+
+    if (mux_reset_flag == 0) {
+        if (val == 0) {
+            mutex_lock(&lpc_data->access_lock);
+            mux_reset_flag = 1;
+            BSP_LOG_W("i2c mux reset is triggered...");
+
+            reg_val = inb(reg);
+            outb((reg_val & ~mask), reg);
+            mdelay(LPC_MDELAY);
+            BSP_LOG_W("reg=0x%03x, reg_val=0x%02x", reg, reg_val & ~mask);
+            mdelay(500);
+            outb((reg_val | mask), reg);
+            mdelay(LPC_MDELAY);
+            BSP_LOG_W("reg=0x%03x, reg_val=0x%02x", reg, reg_val | mask);
+            mdelay(500);
+            mux_reset_flag = 0;
+            mutex_unlock(&lpc_data->access_lock);
+        } else {
+            return -EINVAL;
+        }
+    } else {
+        BSP_LOG_W("i2c mux is resetting... (ignore)");
+        mutex_lock(&lpc_data->access_lock);
+        mutex_unlock(&lpc_data->access_lock);
+    }
+
+    return count;
+}
+
+/* get lpc register value */
+static ssize_t read_lpc_callback(struct device *dev,
+        struct device_attribute *da, char *buf)
+{
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
+    u16 reg = 0;
+    u8 mask = MASK_ALL;
+
+    switch (attr->index) {
+        //CPU CPLD
+        case ATT_CPU_CPLD_VERSION:
+            reg = REG_CPU_CPLD_VERSION;
+            break;
+        case ATT_CPU_BIOS_BOOT_ROM:
+            reg = REG_CPU_STATUS_1;
+            mask = 0x80;
+            break;
+        case ATT_CPU_BIOS_BOOT_CFG:
+            reg = REG_CPU_CTRL_1;
+            mask = 0x80;
+            break;
+        case ATT_CPU_CPLD_BUILD:
+            reg = REG_CPU_CPLD_BUILD;
+            break;
+        //MB CPLD
+        case ATT_MB_BRD_ID_0:
+            reg = REG_MB_BRD_ID_0;
+            break;
+        case ATT_MB_BRD_ID_1:
+            reg = REG_MB_BRD_ID_1;
+            break;
+        case ATT_MB_CPLD_1_VERSION:
+            reg = REG_MB_CPLD_VERSION;
+            break;
+        case ATT_MB_CPLD_1_BUILD:
+            reg = REG_MB_CPLD_BUILD;
+            break;
+        case ATT_MB_BRD_SKU_ID:
+            reg = REG_MB_BRD_ID_0;
+            mask = 0xFF;
+            break;
+        case ATT_MB_BRD_HW_ID:
+            reg = REG_MB_BRD_ID_1;
+            mask = 0x03;
+            break;
+        case ATT_MB_BRD_ID_TYPE:
+            reg = REG_MB_BRD_ID_1;
+            mask = 0x80;
+            break;
+        case ATT_MB_BRD_BUILD_ID:
+            reg = REG_MB_BRD_ID_1;
+            mask = 0x38;
+            break;
+        case ATT_MB_BRD_DEPH_ID:
+            reg = REG_MB_BRD_ID_1;
+            mask = 0x04;
+            break;
+        case ATT_MB_MUX_CTRL:
+            reg = REG_MB_MUX_CTRL;
+            break;
+        //I2C Alert
+        case ATT_ALERT_STATUS:
+            reg = REG_ALERT_STATUS;
+            mask = 0x20;
+            break;
+#if CPU_TYPE == CPU_BDE
+        case ATT_ALERT_DISABLE:
+            reg = REG_ALERT_DISABLE;
+            mask = 0x04;
+            break;
+#endif
+        //BSP
+        case ATT_BSP_REG:
+            if (kstrtou16(bsp_reg, 0, &reg) < 0)
+                return -EINVAL;
+            break;
+        default:
+            return -EINVAL;
+    }
+    return read_lpc_reg(reg, mask, buf);
+}
+
+/* set lpc register value */
+static ssize_t write_lpc_callback(struct device *dev,
+        struct device_attribute *da, const char *buf, size_t count)
+{
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
+    u16 reg = 0;
+    u8 mask = MASK_ALL;
+
+    switch (attr->index) {
+        case ATT_MB_MUX_CTRL:
+            reg = REG_MB_MUX_CTRL;
+            break;
+        default:
+            return -EINVAL;
+    }
+    return write_lpc_reg(reg, mask, buf, count);
+}
+
+/* get bsp parameter value */
+static ssize_t read_bsp_callback(struct device *dev,
+        struct device_attribute *da, char *buf)
+{
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
+    int str_len=0;
+    char *str=NULL;
+
+    switch (attr->index) {
+        case ATT_BSP_VERSION:
+            str = bsp_version;
+            str_len = sizeof(bsp_version);
+            break;
+        case ATT_BSP_DEBUG:
+            str = bsp_debug;
+            str_len = sizeof(bsp_debug);
+            break;
+        case ATT_BSP_REG:
+            str = bsp_reg;
+            str_len = sizeof(bsp_reg);
+            break;
+        default:
+            return -EINVAL;
+    }
+    return read_bsp(buf, str);
+}
+
+/* set bsp parameter value */
+static ssize_t write_bsp_callback(struct device *dev,
+        struct device_attribute *da, const char *buf, size_t count)
+{
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
+    int str_len=0;
+    char *str=NULL;
+    u16 reg = 0;
+    u8 bsp_debug_u8 = 0;
+
+    switch (attr->index) {
+        case ATT_BSP_VERSION:
+            str = bsp_version;
+            str_len = sizeof(bsp_version);
+            break;
+        case ATT_BSP_DEBUG:
+            str = bsp_debug;
+            str_len = sizeof(bsp_debug);
+            break;
+        case ATT_BSP_REG:
+            if (kstrtou16(buf, 0, &reg) < 0)
+                return -EINVAL;
+
+            str = bsp_reg;
+            str_len = sizeof(bsp_reg);
+            break;
+        default:
+            return -EINVAL;
+    }
+
+    if (attr->index == ATT_BSP_DEBUG) {
+        if (kstrtou8(buf, 0, &bsp_debug_u8) < 0) {
+            return -EINVAL;
+        } else if (_config_bsp_log(bsp_debug_u8) < 0) {
+            return -EINVAL;
+        }
+    }
+
+    return write_bsp(buf, str, str_len, count);
+}
+
+static ssize_t write_bsp_pr_callback(struct device *dev,
+        struct device_attribute *da, const char *buf, size_t count)
+{
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
+    int str_len = strlen(buf);
+
+    if(str_len <= 0)
+        return str_len;
+
+    switch (attr->index) {
+        case ATT_BSP_PR_INFO:
+            BSP_PR(KERN_INFO, "%s", buf);
+            break;
+        case ATT_BSP_PR_ERR:
+            BSP_PR(KERN_ERR, "%s", buf);
+            break;
+        default:
+            return -EINVAL;
+    }
+
+    return str_len;
+}
+
+//SENSOR_DEVICE_ATTR - CPU
+static SENSOR_DEVICE_ATTR(cpu_cpld_version, S_IRUGO, read_lpc_callback, NULL, ATT_CPU_CPLD_VERSION);
+static SENSOR_DEVICE_ATTR(cpu_cpld_version_h, S_IRUGO, read_cpu_cpld_version_h, NULL, ATT_CPU_CPLD_VERSION_H);
+static SENSOR_DEVICE_ATTR(boot_rom,         S_IRUGO, read_lpc_callback, NULL, ATT_CPU_BIOS_BOOT_ROM);
+static SENSOR_DEVICE_ATTR(boot_cfg,         S_IRUGO, read_lpc_callback, NULL, ATT_CPU_BIOS_BOOT_CFG);
+static SENSOR_DEVICE_ATTR(cpu_cpld_build,   S_IRUGO, read_lpc_callback, NULL, ATT_CPU_CPLD_BUILD);
+//SENSOR_DEVICE_ATTR - MB
+static SENSOR_DEVICE_ATTR(board_id_0,       S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_ID_0);
+static SENSOR_DEVICE_ATTR(board_id_1,       S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_ID_1);
+static SENSOR_DEVICE_ATTR(mb_cpld_1_version, S_IRUGO, read_lpc_callback, NULL, ATT_MB_CPLD_1_VERSION);
+static SENSOR_DEVICE_ATTR(mb_cpld_1_version_h, S_IRUGO, read_mb_cpld_1_version_h, NULL, ATT_MB_CPLD_1_VERSION_H);
+static SENSOR_DEVICE_ATTR(mb_cpld_1_build,  S_IRUGO, read_lpc_callback, NULL, ATT_MB_CPLD_1_BUILD);
+static SENSOR_DEVICE_ATTR(mux_ctrl,         S_IRUGO | S_IWUSR, read_lpc_callback, write_lpc_callback, ATT_MB_MUX_CTRL);
+static SENSOR_DEVICE_ATTR(mux_reset,        S_IRUGO | S_IWUSR, read_mux_reset_callback, write_mux_reset_callback, ATT_MB_MUX_RESET);
+static SENSOR_DEVICE_ATTR(board_sku_id,     S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_SKU_ID);
+static SENSOR_DEVICE_ATTR(board_hw_id,      S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_HW_ID);
+static SENSOR_DEVICE_ATTR(board_id_type,    S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_ID_TYPE);
+static SENSOR_DEVICE_ATTR(board_build_id,   S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_BUILD_ID);
+static SENSOR_DEVICE_ATTR(board_deph_id,    S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_DEPH_ID);
+//SENSOR_DEVICE_ATTR - I2C Alert
+static SENSOR_DEVICE_ATTR(alert_status,     S_IRUGO, read_lpc_callback, NULL, ATT_ALERT_STATUS);
+#if CPU_TYPE == CPU_BDE
+static SENSOR_DEVICE_ATTR(alert_disable,    S_IRUGO, read_lpc_callback, NULL, ATT_ALERT_DISABLE);
+#endif
+//SENSOR_DEVICE_ATTR - BSP
+static SENSOR_DEVICE_ATTR(bsp_version,      S_IRUGO | S_IWUSR, read_bsp_callback, write_bsp_callback, ATT_BSP_VERSION);
+static SENSOR_DEVICE_ATTR(bsp_debug,        S_IRUGO | S_IWUSR, read_bsp_callback, write_bsp_callback, ATT_BSP_DEBUG);
+static SENSOR_DEVICE_ATTR(bsp_pr_info,      S_IWUSR, NULL, write_bsp_pr_callback, ATT_BSP_PR_INFO);
+static SENSOR_DEVICE_ATTR(bsp_pr_err,       S_IWUSR, NULL, write_bsp_pr_callback, ATT_BSP_PR_ERR);
+static SENSOR_DEVICE_ATTR(bsp_reg,          S_IRUGO | S_IWUSR, read_lpc_callback, write_bsp_callback, ATT_BSP_REG);
+
+static struct attribute *cpu_cpld_attrs[] = {
+    &sensor_dev_attr_cpu_cpld_version.dev_attr.attr,
+    &sensor_dev_attr_cpu_cpld_version_h.dev_attr.attr,
+    &sensor_dev_attr_cpu_cpld_build.dev_attr.attr,
+    NULL,
+};
+
+static struct attribute *mb_cpld_attrs[] = {
+    &sensor_dev_attr_board_id_0.dev_attr.attr,
+    &sensor_dev_attr_board_id_1.dev_attr.attr,
+    &sensor_dev_attr_mb_cpld_1_version.dev_attr.attr,
+    &sensor_dev_attr_mb_cpld_1_version_h.dev_attr.attr,
+    &sensor_dev_attr_mb_cpld_1_build.dev_attr.attr,
+    &sensor_dev_attr_board_sku_id.dev_attr.attr,
+    &sensor_dev_attr_board_hw_id.dev_attr.attr,
+    &sensor_dev_attr_board_id_type.dev_attr.attr,
+    &sensor_dev_attr_board_build_id.dev_attr.attr,
+    &sensor_dev_attr_board_deph_id.dev_attr.attr,
+    &sensor_dev_attr_mux_ctrl.dev_attr.attr,
+    &sensor_dev_attr_mux_reset.dev_attr.attr,
+    NULL,
+};
+
+static struct attribute *bios_attrs[] = {
+    &sensor_dev_attr_boot_rom.dev_attr.attr,
+    &sensor_dev_attr_boot_cfg.dev_attr.attr,
+    NULL,
+};
+
+static struct attribute *i2c_alert_attrs[] = {
+    &sensor_dev_attr_alert_status.dev_attr.attr,
+#if CPU_TYPE == CPU_BDE
+    &sensor_dev_attr_alert_disable.dev_attr.attr,
+#endif
+    NULL,
+};
+
+static struct attribute *bsp_attrs[] = {
+    &sensor_dev_attr_bsp_version.dev_attr.attr,
+    &sensor_dev_attr_bsp_debug.dev_attr.attr,
+    &sensor_dev_attr_bsp_pr_info.dev_attr.attr,
+    &sensor_dev_attr_bsp_pr_err.dev_attr.attr,
+    &sensor_dev_attr_bsp_reg.dev_attr.attr,
+    NULL,
+};
+
+static struct attribute_group cpu_cpld_attr_grp = {
+    .name = "cpu_cpld",
+    .attrs = cpu_cpld_attrs,
+};
+
+static struct attribute_group mb_cpld_attr_grp = {
+    .name = "mb_cpld",
+    .attrs = mb_cpld_attrs,
+};
+
+static struct attribute_group bios_attr_grp = {
+    .name = "bios",
+    .attrs = bios_attrs,
+};
+
+static struct attribute_group i2c_alert_attr_grp = {
+    .name = "i2c_alert",
+    .attrs = i2c_alert_attrs,
+};
+
+static struct attribute_group bsp_attr_grp = {
+    .name = "bsp",
+    .attrs = bsp_attrs,
+};
+
+static void lpc_dev_release( struct device * dev)
+{
+    return;
+}
+
+static struct platform_device lpc_dev = {
+    .name           = DRIVER_NAME,
+    .id             = -1,
+    .dev = {
+                    .release = lpc_dev_release,
+    }
+};
+
+static int lpc_drv_probe(struct platform_device *pdev)
+{
+    int i = 0, grp_num = 5;
+    int err[5] = {0};
+    struct attribute_group *grp;
+
+    lpc_data = devm_kzalloc(&pdev->dev, sizeof(struct lpc_data_s),
+                            GFP_KERNEL);
+    if (!lpc_data)
+        return -ENOMEM;
+
+    mutex_init(&lpc_data->access_lock);
+
+    for (i=0; i<grp_num; ++i) {
+        switch (i) {
+            case 0:
+                grp = &cpu_cpld_attr_grp;
+                break;
+            case 1:
+                grp = &mb_cpld_attr_grp;
+                break;
+            case 2:
+                grp = &bios_attr_grp;
+                break;
+            case 3:
+                grp = &i2c_alert_attr_grp;
+                break;
+            case 4:
+                grp = &bsp_attr_grp;
+                break;
+            default:
+                break;
+        }
+
+        err[i] = sysfs_create_group(&pdev->dev.kobj, grp);
+        if (err[i]) {
+            printk(KERN_ERR "Cannot create sysfs for group %s\n", grp->name);
+            goto exit;
+        } else {
+            continue;
+        }
+    }
+
+    return 0;
+
+exit:
+    for (i=0; i<grp_num; ++i) {
+        switch (i) {
+            case 0:
+                grp = &cpu_cpld_attr_grp;
+                break;
+            case 1:
+                grp = &mb_cpld_attr_grp;
+                break;
+            case 2:
+                grp = &bios_attr_grp;
+                break;
+            case 3:
+                grp = &i2c_alert_attr_grp;
+                break;
+            case 4:
+                grp = &bsp_attr_grp;
+                break;
+            default:
+                break;
+        }
+
+        sysfs_remove_group(&pdev->dev.kobj, grp);
+        if (!err[i]) {
+            //remove previous successful cases
+            continue;
+        } else {
+            //remove first failed case, then return
+            return err[i];
+        }
+    }
+    return 0;
+}
+
+static int lpc_drv_remove(struct platform_device *pdev)
+{
+    sysfs_remove_group(&pdev->dev.kobj, &cpu_cpld_attr_grp);
+    sysfs_remove_group(&pdev->dev.kobj, &mb_cpld_attr_grp);
+    sysfs_remove_group(&pdev->dev.kobj, &bios_attr_grp);
+    sysfs_remove_group(&pdev->dev.kobj, &i2c_alert_attr_grp);
+    sysfs_remove_group(&pdev->dev.kobj, &bsp_attr_grp);
+
+    return 0;
+}
+
+static struct platform_driver lpc_drv = {
+    .probe  = lpc_drv_probe,
+    .remove = __exit_p(lpc_drv_remove),
+    .driver = {
+    .name   = DRIVER_NAME,
+    },
+};
+
+int lpc_init(void)
+{
+    int err = 0;
+
+    err = platform_driver_register(&lpc_drv);
+    if (err) {
+        printk(KERN_ERR "%s(#%d): platform_driver_register failed(%d)\n",
+                __func__, __LINE__, err);
+
+        return err;
+    }
+
+    err = platform_device_register(&lpc_dev);
+    if (err) {
+        printk(KERN_ERR "%s(#%d): platform_device_register failed(%d)\n",
+                __func__, __LINE__, err);
+        platform_driver_unregister(&lpc_drv);
+        return err;
+    }
+
+    return err;
+}
+
+void lpc_exit(void)
+{
+    platform_driver_unregister(&lpc_drv);
+    platform_device_unregister(&lpc_dev);
+}
+
+MODULE_AUTHOR("Leo Lin <leo.yt.lin@ufispace.com>");
+MODULE_DESCRIPTION("x86_64_ufispace_s9301_32d_lpc driver");
+MODULE_LICENSE("GPL");
+
+module_init(lpc_init);
+module_exit(lpc_exit);
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/modules/x86-64-ufispace-s9301-32d-sys-eeprom.c b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/modules/x86-64-ufispace-s9301-32d-sys-eeprom.c
new file mode 100644
index 000000000..3fa3ae4c9
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/modules/x86-64-ufispace-s9301-32d-sys-eeprom.c
@@ -0,0 +1,283 @@
+/*
+ * Copyright (C) 1998, 1999  Frodo Looijaard <frodol@dds.nl> and
+ *                           Philip Edelbrock <phil@netroedge.com>
+ * Copyright (C) 2003 Greg Kroah-Hartman <greg@kroah.com>
+ * Copyright (C) 2003 IBM Corp.
+ * Copyright (C) 2004 Jean Delvare <jdelvare@suse.de>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+/* enable dev_dbg print out */
+//#define DEBUG 
+
+#define __STDC_WANT_LIB_EXT1__ 1
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/slab.h>
+#include <linux/delay.h>
+#include <linux/jiffies.h>
+#include <linux/i2c.h>
+#include <linux/mutex.h>
+#include <linux/version.h>
+
+#define _memset(s, c, n) memset(s, c, n)
+
+/* Addresses to scan */
+static const unsigned short normal_i2c[] = { /*0x50, 0x51, 0x52, 0x53, 0x54,
+                    0x55, 0x56, 0x57,*/ I2C_CLIENT_END };
+
+/* Size of EEPROM in bytes */
+#define EEPROM_SIZE     512
+
+#define SLICE_BITS      (6)
+#define SLICE_SIZE      (1 << SLICE_BITS)
+#define SLICE_NUM       (EEPROM_SIZE/SLICE_SIZE)
+
+/* Each client has this additional data */
+struct eeprom_data {
+    struct mutex update_lock;
+    u8 valid;           /* bitfield, bit!=0 if slice is valid */
+    unsigned long last_updated[SLICE_NUM];  /* In jiffies, 8 slices */
+    u8 data[EEPROM_SIZE];       /* Register values */
+};
+
+
+static void sys_eeprom_update_client(struct i2c_client *client, u8 slice)
+{
+    struct eeprom_data *data = i2c_get_clientdata(client);
+    int i, j;
+    int ret;
+    int addr;
+
+    mutex_lock(&data->update_lock);
+
+    if (!(data->valid & (1 << slice)) ||
+        time_after(jiffies, data->last_updated[slice] + 300 * HZ)) {
+        dev_dbg(&client->dev, "Starting eeprom update, slice %u\n", slice);
+
+        addr = slice << SLICE_BITS;
+
+        ret = i2c_smbus_write_byte_data(client, (u8)((addr >> 8) & 0xFF), (u8)(addr & 0xFF));
+        /* select the eeprom address */
+        if (ret < 0) {
+            dev_err(&client->dev, "address set failed\n");
+            goto exit;
+        }
+
+        if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_READ_BYTE)) {
+            goto exit;
+        }
+
+        for (i = slice << SLICE_BITS; i < (slice + 1) << SLICE_BITS; i+= SLICE_SIZE) {
+            for (j = i; j < (i+SLICE_SIZE); j++) {
+                int res;
+
+                res = i2c_smbus_read_byte(client);
+                if (res < 0) {
+                    goto exit;
+                }
+
+                data->data[j] = res & 0xFF;
+            }
+        }
+        
+        data->last_updated[slice] = jiffies;
+        data->valid |= (1 << slice);
+    }
+exit:
+    mutex_unlock(&data->update_lock);
+}
+
+static ssize_t sys_eeprom_read(struct file *filp, struct kobject *kobj,
+               struct bin_attribute *bin_attr,
+               char *buf, loff_t off, size_t count)
+{
+    struct i2c_client *client = to_i2c_client(container_of(kobj, struct device, kobj));
+    struct eeprom_data *data = i2c_get_clientdata(client);
+    u8 slice;
+
+    if (off > EEPROM_SIZE) {
+        return 0;
+    }
+    if (off + count > EEPROM_SIZE) {
+        count = EEPROM_SIZE - off;
+    }
+    if (count == 0) {
+        return 0;
+    }
+
+    /* Only refresh slices which contain requested bytes */
+    for (slice = off >> SLICE_BITS; slice <= (off + count - 1) >> SLICE_BITS; slice++) {
+        sys_eeprom_update_client(client, slice);
+    }
+
+    memcpy(buf, &data->data[off], count);
+
+    return count;
+}
+
+static ssize_t sys_eeprom_write(struct file *filp, struct kobject *kobj,
+                       struct bin_attribute *bin_attr,
+                       char *buf, loff_t off, size_t count)
+{
+    struct i2c_client *client = to_i2c_client(container_of(kobj, struct device, kobj));
+    struct eeprom_data *data = i2c_get_clientdata(client);
+    int ret;
+    int i;
+    u8 cmd;
+    u16 value16;
+
+    dev_dbg(&client->dev, "sys_eeprom_write off=%d, count=%d\n", (int)off, (int)count);
+
+    if (off > EEPROM_SIZE) {
+        return 0;
+    }
+    if (off + count > EEPROM_SIZE) {
+        count = EEPROM_SIZE - off;
+    }
+    if (count == 0) {
+        return 0;
+    }
+
+    mutex_lock(&data->update_lock);
+
+    for(i=0; i < count; i++) {
+        /* write command */
+        cmd = (off >> 8) & 0xff;
+        value16 = off & 0xff;
+        value16 |= buf[i] << 8;
+        ret = i2c_smbus_write_word_data(client, cmd, value16);
+
+        if (ret < 0) {
+            dev_err(&client->dev, "write address failed at %d \n", (int)off);
+            goto exit;
+        }
+
+        off++;
+        
+        /* need to wait for write complete */
+        udelay(10000);
+    }
+exit:
+    mutex_unlock(&data->update_lock);
+    /* force to update client when reading */
+    for(i=0; i < SLICE_NUM; i++) {
+        data->last_updated[i] = 0;
+    }
+
+    return count;
+}
+
+static struct bin_attribute sys_eeprom_attr = {
+    .attr = {
+        .name = "eeprom",
+        .mode = S_IRUGO | S_IWUSR,
+    },
+    .size = EEPROM_SIZE,
+    .read = sys_eeprom_read,
+    .write = sys_eeprom_write,
+};
+
+/* Return 0 if detection is successful, -ENODEV otherwise */
+static int sys_eeprom_detect(struct i2c_client *client, struct i2c_board_info *info)
+{
+    struct i2c_adapter *adapter = client->adapter;
+
+    /* EDID EEPROMs are often 24C00 EEPROMs, which answer to all
+       addresses 0x50-0x57, but we only care about 0x51 and 0x55. So decline
+       attaching to addresses >= 0x56 on DDC buses */
+    if (!(adapter->class & I2C_CLASS_SPD) && client->addr >= 0x56) {
+        return -ENODEV;
+    }
+
+    if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_READ_BYTE)
+     && !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_WRITE_BYTE_DATA)) {
+        return -ENODEV;
+    }
+
+    strlcpy(info->type, "eeprom", I2C_NAME_SIZE);
+
+    return 0;
+}
+
+static int sys_eeprom_probe(struct i2c_client *client,
+            const struct i2c_device_id *id)
+{
+    struct eeprom_data *data;
+    int err;
+
+    if (!(data = kzalloc(sizeof(struct eeprom_data), GFP_KERNEL))) {
+        err = -ENOMEM;
+        goto exit;
+    }
+
+#ifdef __STDC_LIB_EXT1__
+    memset_s(data->data, EEPROM_SIZE, 0xff, EEPROM_SIZE);
+#else
+    _memset(data->data, 0xff, EEPROM_SIZE);
+#endif
+
+    i2c_set_clientdata(client, data);
+    mutex_init(&data->update_lock);
+
+    /* create the sysfs eeprom file */
+    err = sysfs_create_bin_file(&client->dev.kobj, &sys_eeprom_attr);
+    if (err) {
+        goto exit_kfree;
+    }
+
+    return 0;
+
+exit_kfree:
+    kfree(data);
+exit:
+    return err;
+}
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0)
+static int
+#else
+static void
+#endif
+sys_eeprom_remove(struct i2c_client *client)
+{
+    sysfs_remove_bin_file(&client->dev.kobj, &sys_eeprom_attr);
+    kfree(i2c_get_clientdata(client));
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0)
+    return 0;
+#endif
+}
+
+static const struct i2c_device_id sys_eeprom_id[] = {
+    { "sys_eeprom", 0 },
+    { }
+};
+
+static struct i2c_driver sys_eeprom_driver = {
+    .driver = {
+        .name   = "sys_eeprom",
+    },
+    .probe      = sys_eeprom_probe,
+    .remove     = sys_eeprom_remove,
+    .id_table   = sys_eeprom_id,
+
+    .class      = I2C_CLASS_DDC | I2C_CLASS_SPD,
+    .detect     = sys_eeprom_detect,
+    .address_list   = normal_i2c,
+};
+
+module_i2c_driver(sys_eeprom_driver);
+
+MODULE_AUTHOR("Wade <wade.ce.he@ufispace.com>");
+MODULE_DESCRIPTION("UfiSpace Mother Board EEPROM driver");
+MODULE_LICENSE("GPL");
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/service/pddf-platform-init.service b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/service/pddf-platform-init.service
new file mode 120000
index 000000000..0fd9f25b6
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/service/pddf-platform-init.service
@@ -0,0 +1 @@
+../../../../pddf/i2c/service/pddf-platform-init.service
\ No newline at end of file
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform/__init__.py b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform/__init__.py
new file mode 100644
index 000000000..593867d31
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform/__init__.py
@@ -0,0 +1,4 @@
+# All the derived classes for PDDF
+__all__ = ["platform", "chassis", "sfp", "psu", "thermal", "fan"]
+from . import platform
+
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform/chassis.py b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform/chassis.py
new file mode 100644
index 000000000..6c77e2424
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform/chassis.py
@@ -0,0 +1,189 @@
+#!/usr/bin/env python
+
+#############################################################################
+# PDDF
+# Module contains an implementation of SONiC Chassis API
+#
+#############################################################################
+
+try:
+    import time
+    from sonic_platform_pddf_base.pddf_chassis import PddfChassis
+    from sonic_py_common import device_info
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+NUM_COMPONENT = 5
+
+class Chassis(PddfChassis):
+    """
+    PDDF Platform-specific Chassis class
+    """
+
+    port_dict = {}
+
+    def __init__(self, pddf_data=None, pddf_plugin_data=None):
+        PddfChassis.__init__(self, pddf_data, pddf_plugin_data)
+        self._initialize_components()
+
+    def _initialize_components(self):
+        from sonic_platform.component import Component
+        for index in range(NUM_COMPONENT):
+            component = Component(index)
+            self._component_list.append(component)
+            
+    # Provide the functions/variables below for which implementation is to be overwritten
+
+    def get_name(self):
+        """
+        Retrieves the name of the chassis
+        Returns:
+            string: The name of the chassis
+        """
+        return self._eeprom.platform_name_str()
+
+    def initizalize_system_led(self):
+        return True
+
+    def get_status_led(self):
+        return self.get_system_led("SYS_LED")
+
+    def get_change_event(self, timeout=0):
+        """
+        Returns a nested dictionary containing all devices which have
+        experienced a change at chassis level
+        Args:
+            timeout: Timeout in milliseconds (optional). If timeout == 0,
+                this method will block until a change is detected.
+        Returns:
+            (bool, dict):
+                - bool: True if call successful, False if not;
+                - dict: A nested dictionary where key is a device type,
+                        value is a dictionary with key:value pairs in the format of
+                        {'device_id':'device_event'}, where device_id is the device ID
+                        for this device and device_event.
+                        The known devices's device_id and device_event was defined as table below.
+                         -----------------------------------------------------------------
+                         device   |     device_id       |  device_event  |  annotate
+                         -----------------------------------------------------------------
+                         'sfp'          '<sfp number>'     '0'              Sfp removed
+                                                           '1'              Sfp inserted
+                                                           '2'              I2C bus stuck
+                                                           '3'              Bad eeprom
+                                                           '4'              Unsupported cable
+                                                           '5'              High Temperature
+                                                           '6'              Bad cable
+                         --------------------------------------------------------------------
+                  Ex. 'sfp':{'11':'0', '12':'1'},
+                  Indicates that:
+                     sfp 11 has been removed, sfp 12 has been inserted.
+                  Note: For sfp, when event 3-6 happened, the module will not be avalaible,
+                        XCVRD shall stop to read eeprom before SFP recovered from error status.
+        """
+
+        change_event_dict = {"sfp": {}}
+
+        start_time = time.time()
+        forever = False
+
+        if timeout == 0:
+            forever = True
+        elif timeout > 0:
+            timeout = timeout / float(1000)  # Convert to secs
+        else:
+            print("get_change_event:Invalid timeout value", timeout)
+            return False, change_event_dict
+
+        end_time = start_time + timeout
+        if start_time > end_time:
+            print(
+                "get_change_event:" "time wrap / invalid timeout value",
+                timeout,
+            )   
+            return False, change_event_dict  # Time wrap or possibly incorrect timeout
+        try:
+            while timeout >= 0:
+                # check for sfp
+                sfp_change_dict = self.get_transceiver_change_event()
+
+                if sfp_change_dict:
+                    change_event_dict["sfp"] = sfp_change_dict
+                    return True, change_event_dict
+                if forever:
+                    time.sleep(1)
+                else:
+                    timeout = end_time - time.time()
+                    if timeout >= 1:
+                        time.sleep(1)  # We poll at 1 second granularity
+                    else:
+                        if timeout > 0:
+                            time.sleep(timeout)
+                        return True, change_event_dict
+        except Exception as e:
+            print(e)
+        print("get_change_event: Should not reach here.")
+        return False, change_event_dict
+
+    def get_transceiver_change_event(self, timeout=0):
+        current_port_dict = {}
+        ret_dict = {}
+
+        # Check for OIR events and return ret_dict
+        for index in range(self.platform_inventory['num_ports']):
+            if self._sfp_list[index].get_presence():
+                current_port_dict[index] = self.plugin_data['XCVR']['plug_status']['inserted']
+            else:
+                current_port_dict[index] = self.plugin_data['XCVR']['plug_status']['removed']
+
+        if len(self.port_dict) == 0:       # first time
+            self.port_dict = current_port_dict
+            return {}
+
+        if current_port_dict == self.port_dict:
+            return {}
+
+        # Update reg value
+        for index, status in current_port_dict.items():
+            if self.port_dict[index] != status:
+                ret_dict[index] = status
+                #ret_dict[str(index)] = status
+        self.port_dict = current_port_dict
+        for index, status in ret_dict.items():
+            if int(status) == 1:
+                pass
+                #self._sfp_list[int(index)].check_sfp_optoe_type()
+        return ret_dict
+
+    def get_reboot_cause(self):
+        """
+        Retrieves the cause of the previous reboot
+
+        Returns:
+            A tuple (string, string) where the first element is a string
+            containing the cause of the previous reboot. This string must be
+            one of the predefined strings in this class. If the first string
+            is "REBOOT_CAUSE_HARDWARE_OTHER", the second string can be used
+            to pass a description of the reboot cause.
+        """
+
+        reboot_cause_path = self.plugin_data['REBOOT_CAUSE']['reboot_cause_file']
+
+        try:
+            with open(reboot_cause_path, 'r', errors='replace') as fd:
+                data = fd.read()
+                sw_reboot_cause = data.strip()
+        except IOError:
+            sw_reboot_cause = "Unknown"
+
+        return ('REBOOT_CAUSE_NON_HARDWARE', sw_reboot_cause)
+
+    def get_serial_number(self):
+        """
+        Retrieves the hardware serial number for the chassis
+
+        Returns:
+            A string containing the hardware serial number for this
+            chassis.
+        """
+
+        return self.get_serial()
\ No newline at end of file
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform/component.py b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform/component.py
new file mode 100644
index 000000000..b94a10d61
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform/component.py
@@ -0,0 +1,131 @@
+#############################################################################
+# 
+# Component contains an implementation of SONiC Platform Base API and
+# provides the components firmware management function
+#
+#############################################################################
+
+try:
+    import subprocess
+    from sonic_platform_base.component_base import ComponentBase
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+CPLD_SYSFS = {
+    "CPLD1": "/sys/kernel/pddf/devices/sysstatus/sysstatus_data/cpld1_version",
+    "CPLD2": "/sys/kernel/pddf/devices/sysstatus/sysstatus_data/cpld2_version",
+    "CPLD3": "/sys/kernel/pddf/devices/sysstatus/sysstatus_data/cpld3_version",
+}
+
+BMC_CMDS = {
+    "BMC": "bash -c 'tmp=$(ipmitool raw 0x6 0x1) && r=($(echo \"$tmp\" | cut -d \" \" -f 4,5,16,15,14)) && echo ${r[0]}.${r[1]}.${r[4]}.${r[3]}${r[2]}'",
+}
+
+BIOS_VERSION_PATH = "/sys/class/dmi/id/bios_version"
+COMPONENT_LIST= [
+   ("CPLD1", "CPLD 1"),
+   ("CPLD2", "CPLD 2"),
+   ("CPLD3", "CPLD 3"),
+   ("BIOS", "Basic Input/Output System"),
+   ("BMC", "BMC"),
+   
+]
+
+class Component(ComponentBase):
+    """Platform-specific Component class"""
+
+    DEVICE_TYPE = "component"
+
+    def __init__(self, component_index=0):
+        self.index = component_index
+        self.name = self.get_name()
+
+    def _run_command(self, command):
+        # Run bash command and print output to stdout
+        try:
+            process = subprocess.Popen(
+                shlex.split(command), stdout=subprocess.PIPE)
+            while True:
+                output = process.stdout.readline()
+                if output == '' and process.poll() is not None:
+                    break
+            rc = process.poll()
+            if rc != 0:
+                return False
+        except Exception:
+            return False
+        return True
+
+    def _get_bios_version(self):
+        # Retrieves the BIOS firmware version
+        try:
+            with open(BIOS_VERSION_PATH, 'r') as fd:
+                bios_version = fd.read()
+                return bios_version.strip()
+        except Exception as e:
+            return None
+   
+    def _get_cpld_version(self):
+        # Retrieves the CPLD firmware version
+        cpld_version = dict()
+        for cpld_name in CPLD_SYSFS:            
+            cmd = "cat {}".format(CPLD_SYSFS[cpld_name])
+            status, value = subprocess.getstatusoutput(cmd)
+            if not status:
+                cpld_version_raw = value.rstrip()
+                cpld_version_int = int(cpld_version_raw,16)
+                cpld_version[cpld_name] = "{}.{:02d}".format(cpld_version_int >> 6,
+                                                             cpld_version_int & 0b00111111)
+
+        return cpld_version
+
+    def _get_bmc_version(self):
+        # Retrieves the BMC firmware version
+        status, value = subprocess.getstatusoutput(BMC_CMDS["BMC"])
+        if not status:
+            return value
+        else:
+            return None
+
+    def get_name(self):
+        """
+        Retrieves the name of the component
+         Returns:
+            A string containing the name of the component
+        """
+        return COMPONENT_LIST[self.index][0]
+
+    def get_description(self):
+        """
+        Retrieves the description of the component
+            Returns:
+            A string containing the description of the component
+        """
+        return COMPONENT_LIST[self.index][1]
+
+    def get_firmware_version(self):
+        """
+        Retrieves the firmware version of module
+        Returns:
+            string: The firmware versions of the module
+        """
+        fw_version = None
+
+        if self.name == "BIOS":
+            fw_version = self._get_bios_version()
+        elif "CPLD" in self.name:
+            cpld_version = self._get_cpld_version()
+            fw_version = cpld_version.get(self.name)
+        elif self.name == "BMC":
+            fw_version = self._get_bmc_version()
+        return fw_version
+
+    def install_firmware(self, image_path):
+        """
+        Install firmware to module
+        Args:
+            image_path: A string, path to firmware image
+        Returns:
+            A boolean, True if install successfully, False if not
+        """
+        raise NotImplementedError
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform/eeprom.py b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform/eeprom.py
new file mode 100644
index 000000000..90ab1c779
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform/eeprom.py
@@ -0,0 +1,21 @@
+#!/usr/bin/env python
+
+try:
+    from sonic_platform_pddf_base.pddf_eeprom import PddfEeprom
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+
+class Eeprom(PddfEeprom):
+
+    def __init__(self, pddf_data=None, pddf_plugin_data=None):
+        PddfEeprom.__init__(self, pddf_data, pddf_plugin_data)
+
+    # Provide the functions/variables below for which implementation is to be overwritten
+
+    def platform_name_str(self):
+        (is_valid, results) = self.get_tlv_field(self.eeprom_data, self._TLV_CODE_PLATFORM_NAME)
+        if not is_valid:
+            return "N/A"
+
+        return results[2].decode('ascii')
\ No newline at end of file
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform/fan.py b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform/fan.py
new file mode 100644
index 000000000..3082de54a
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform/fan.py
@@ -0,0 +1,172 @@
+#!/usr/bin/env python
+
+
+try:
+    from sonic_platform_pddf_base.pddf_fan import PddfFan
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+
+class Fan(PddfFan):
+    """PDDF Platform-Specific Fan class"""
+
+    def __init__(self, tray_idx, fan_idx=0, pddf_data=None, pddf_plugin_data=None, is_psu_fan=False, psu_index=0):
+        # idx is 0-based 
+        PddfFan.__init__(self, tray_idx, fan_idx, pddf_data, pddf_plugin_data, is_psu_fan, psu_index)
+
+    # Provide the functions/variables below for which implementation is to be overwritten
+    # Since psu_fan airflow direction cant be read from sysfs, it is fixed as 'F2B' or 'intake'
+
+    def get_speed(self):
+        """
+        Retrieves the speed of fan as a percentage of full speed
+
+        Returns:
+            An integer, the percentage of full fan speed, in the range 0 (off)
+                 to 100 (full speed)
+        """
+        speed_percentage = 0
+        if self.is_psu_fan:
+            attr = "psu_fan{}_speed_rpm".format(self.fan_index)
+            device = "PSU{}".format(self.fans_psu_index)
+            max_speed = int(self.plugin_data['PSU']['PSU_FAN_MAX_SPEED']) 
+        else:
+            if self.fan_index == 1:
+                pos = "f"
+                max_speed = int(self.plugin_data['FAN']['FAN_F_MAX_SPEED']) 
+            else:
+                pos = "r"
+                max_speed = int(self.plugin_data['FAN']['FAN_R_MAX_SPEED']) 
+            attr = "fan{}_{}_speed_rpm".format(self.fantray_index, pos)
+            device = "FAN-CTRL"
+
+        output = self.pddf_obj.get_attr_name_output(device, attr)
+        if not output:
+            return speed_percentage
+
+        output['status'] = output['status'].rstrip()
+        if output['status'].isalpha():
+            return speed_percentage
+        else:
+            speed = int(float(output['status']))
+
+        speed_percentage = round((speed*100)/max_speed)
+        
+        return min(speed_percentage, 100)
+
+    def get_speed_rpm(self):
+        """
+        Retrieves the speed of fan in RPM
+
+        Returns:
+            An integer, Speed of fan in RPM
+        """
+        rpm_speed = 0
+        if self.is_psu_fan:
+            attr = "psu_fan{}_speed_rpm".format(self.fan_index)
+            device = "PSU{}".format(self.fans_psu_index)
+        else:
+            if self.fan_index == 1:
+                pos = "f"
+            else:
+                pos = "r"
+            attr = "fan{}_{}_speed_rpm".format(self.fantray_index, pos)
+            device = "FAN-CTRL"
+
+        output = self.pddf_obj.get_attr_name_output(device, attr)
+
+        if output is None:
+            return rpm_speed
+
+        output['status'] = output['status'].rstrip()
+        if output['status'].isalpha():
+            return rpm_speed
+        else:
+            rpm_speed = int(float(output['status']))
+
+        return rpm_speed
+
+    def get_direction(self):
+        """
+        Retrieves the direction of fan
+        Returns:
+            A string, either FAN_DIRECTION_INTAKE or FAN_DIRECTION_EXHAUST
+            depending on fan direction
+        """
+        direction = self.FAN_DIRECTION_INTAKE
+        if self.is_psu_fan:
+            attr = "psu_fan{}_dir".format(self.fan_index)
+            device = "PSU{}".format(self.fans_psu_index)
+        else:
+            attr = "fan{}_dir".format(self.fantray_index)
+            device = "FAN-CTRL"
+
+        output = self.pddf_obj.get_attr_name_output(device, attr)
+        if not output:
+            return direction
+
+        mode = output['mode']
+        val = output['status'].strip()
+        vmap = self.plugin_data['FAN']['direction'][mode]['valmap']
+   
+        if val in vmap:
+            direction = vmap[val]
+            
+        return direction
+
+    def get_presence(self):
+        """
+        Retrieves the presence of the device
+        Returns:
+            bool: True if device is present, False if not
+        """
+        presence = False
+        if self.is_psu_fan:
+            attr = "psu_present"
+            device = "PSU{}".format(self.fans_psu_index)
+        else:
+            attr = "fan{}_present".format(self.fantray_index)
+            device = "FAN-CTRL"
+
+        output = self.pddf_obj.get_attr_name_output(device, attr)
+        if not output:
+            return presence
+
+
+        mode = output['mode']
+        val = output['status'].strip()
+
+        if self.is_psu_fan:
+            vmap = self.plugin_data['PSU']['psu_present'][mode]['valmap']
+        else:
+            vmap = self.plugin_data['FAN']['present'][mode]['valmap']
+
+        if val in vmap:
+            presence = vmap[val]
+
+        return presence
+
+    def get_target_speed(self):
+        """
+        Retrieves the target (expected) speed of the fan
+        Returns:
+            An integer, the percentage of full fan speed, in the range 0 (off)
+                 to 100 (full speed)
+        """
+        return self.get_speed()
+
+    def set_speed(self, speed):
+        """
+        Sets the fan speed
+
+        Args:
+            speed: An integer, the percentage of full fan speed to set fan to,
+                   in the range 0 (off) to 100 (full speed)
+
+        Returns:
+            A boolean, True if speed is set successfully, False if not
+        """
+
+        print("Setting Fan speed is not allowed")
+        return False
+
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform/fan_drawer.py b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform/fan_drawer.py
new file mode 100644
index 000000000..3b9bb607f
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform/fan_drawer.py
@@ -0,0 +1,17 @@
+#!/usr/bin/env python
+
+
+try:
+    from sonic_platform_pddf_base.pddf_fan_drawer import PddfFanDrawer
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+
+class FanDrawer(PddfFanDrawer):
+    """PDDF Platform-Specific Fan-Drawer class"""
+
+    def __init__(self, tray_idx, pddf_data=None, pddf_plugin_data=None):
+        # idx is 0-based 
+        PddfFanDrawer.__init__(self, tray_idx, pddf_data, pddf_plugin_data)
+
+    # Provide the functions/variables below for which implementation is to be overwritten
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/watchdog.py b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform/platform.py
similarity index 58%
rename from platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/watchdog.py
rename to platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform/platform.py
index 88660b1a1..406b1179a 100644
--- a/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/watchdog.py
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform/platform.py
@@ -1,23 +1,25 @@
 #!/usr/bin/env python
 
 #############################################################################
-#
-# Module contains an implementation of platform specific watchdog API's
+# PDDF
+# Module contains an implementation of SONiC Platform Base API and
+# provides the platform information
 #
 #############################################################################
 
+
 try:
-    from sonic_platform_pddf_base.pddf_watchdog import PddfWatchdog
+    from sonic_platform_pddf_base.pddf_platform import PddfPlatform
 except ImportError as e:
     raise ImportError(str(e) + "- required module not found")
 
-class Watchdog(PddfWatchdog):
+
+class Platform(PddfPlatform):
     """
-    PDDF Platform-specific Chassis class
+    PDDF Platform-Specific Platform Class
     """
 
     def __init__(self):
-        PddfWatchdog.__init__(self)
-        self.timeout= 180
+        PddfPlatform.__init__(self)
 
     # Provide the functions/variables below for which implementation is to be overwritten
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform/psu.py b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform/psu.py
new file mode 100644
index 000000000..3e213415f
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform/psu.py
@@ -0,0 +1,56 @@
+#!/usr/bin/env python
+
+
+try:
+    from sonic_platform_pddf_base.pddf_psu import PddfPsu
+except ImportError as e:
+    raise ImportError (str(e) + "- required module not found")
+
+
+class Psu(PddfPsu):
+    """PDDF Platform-Specific PSU class"""
+    
+    PLATFORM_PSU_CAPACITY = 1300
+
+    def __init__(self, index, pddf_data=None, pddf_plugin_data=None):
+        PddfPsu.__init__(self, index, pddf_data, pddf_plugin_data)
+        
+    # Provide the functions/variables below for which implementation is to be overwritten
+    def get_maximum_supplied_power(self):
+        """
+        Retrieves the maximum supplied power by PSU (or PSU capacity)
+        Returns:
+            A float number, the maximum power output in Watts.
+            e.g. 1200.1
+        """
+        return float(self.PLATFORM_PSU_CAPACITY)
+
+    def get_power(self):
+        """
+        Retrieves current energy supplied by PSU
+
+        Returns:
+            A float number, the power in watts,
+            e.g. 302.6
+        """
+
+        # power is returned in micro watts
+        return round(float(self.get_voltage()*self.get_current()), 2)
+
+    def get_capacity(self):
+        """
+        Retrieves the maximum supplied power by PSU (or PSU capacity)
+        Returns:
+            A float number, the maximum power output in Watts.
+            e.g. 1200.1
+        """
+        return self.get_maximum_supplied_power()
+
+    def get_type(self):
+        """
+        Gets the type of the PSU
+
+        Returns:
+            A string, the type of PSU (AC/DC)
+        """
+        return self.plugin_data['PSU']['DEFAULT_TYPE']
\ No newline at end of file
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform/sfp.py b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform/sfp.py
new file mode 100644
index 000000000..c7919482f
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform/sfp.py
@@ -0,0 +1,31 @@
+#!/usr/bin/env python
+
+try:
+    from sonic_platform_pddf_base.pddf_sfp import PddfSfp
+except ImportError as e:
+    raise ImportError (str(e) + "- required module not found")
+
+
+class Sfp(PddfSfp):
+    """
+    PDDF Platform-Specific Sfp class
+    """
+
+    def __init__(self, index, pddf_data=None, pddf_plugin_data=None):
+        PddfSfp.__init__(self, index, pddf_data, pddf_plugin_data)
+        self.index = index
+
+    # Provide the functions/variables below for which implementation is to be overwritten
+
+    def get_error_description(self):
+        """
+        Retrives the error descriptions of the SFP module
+        Returns:
+            String that represents the current error descriptions of vendor specific errors
+            In case there are multiple errors, they should be joined by '|',
+            like: "Bad EEPROM|Unsupported cable"
+        """
+        if not self.get_presence():
+            return self.SFP_STATUS_UNPLUGGED
+
+        return self.SFP_STATUS_OK
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform/thermal.py b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform/thermal.py
new file mode 100644
index 000000000..77d6ec7ae
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform/thermal.py
@@ -0,0 +1,17 @@
+#!/usr/bin/env python
+
+
+try:
+    from sonic_platform_pddf_base.pddf_thermal import PddfThermal
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+
+
+class Thermal(PddfThermal):
+    """PDDF Platform-Specific Thermal class"""
+
+    def __init__(self, index, pddf_data=None, pddf_plugin_data=None, is_psu_thermal=False, psu_index=0):
+        PddfThermal.__init__(self, index, pddf_data, pddf_plugin_data, is_psu_thermal, psu_index)
+
+    # Provide the functions/variables below for which implementation is to be overwritten
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform_setup.py b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform_setup.py
new file mode 100644
index 000000000..3661c84a0
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/sonic_platform_setup.py
@@ -0,0 +1,27 @@
+from setuptools import setup
+
+setup(
+    name='sonic-platform',
+    version='1.0',
+    description='SONiC platform API implementation on ufispace platform',
+    license='Apache 2.0',
+    author='SONiC Team',
+    author_email='linuxnetdev@microsoft.com',
+    url='https://github.com/Azure/sonic-buildimage',
+    maintainer='Leo Lin',
+    maintainer_email='leo.yt.lin@ufispace.com',
+    packages=['sonic_platform'],
+    classifiers=[
+        'Development Status :: 3 - Alpha',
+        'Environment :: Plugins',
+        'Intended Audience :: Developers',
+        'Intended Audience :: Information Technology',
+        'Intended Audience :: System Administrators',
+        'License :: OSI Approved :: Apache Software License',
+        'Natural Language :: English',
+        'Operating System :: POSIX :: Linux',
+        'Programming Language :: Python :: 3.7',
+        'Topic :: Utilities',
+    ],
+    keywords='sonic SONiC platform PLATFORM',
+)
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/utils/pddf_post_device_create.sh b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/utils/pddf_post_device_create.sh
new file mode 100755
index 000000000..e4de7ae36
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/utils/pddf_post_device_create.sh
@@ -0,0 +1,6 @@
+#!/bin/bash
+#disable bmc watchdog
+timeout 3 ipmitool mc watchdog off
+
+echo 1 > /sys/kernel/pddf/devices/sysstatus/sysstatus_data/port_led_clr_ctrl
+echo "PDDF device post-create completed"
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/utils/pddf_post_driver_install.sh b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/utils/pddf_post_driver_install.sh
new file mode 100755
index 000000000..ed2559977
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/utils/pddf_post_driver_install.sh
@@ -0,0 +1,2 @@
+#!/bin/bash
+echo "PDDF driver post-install completed"
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/utils/pddf_switch_svc.py b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/utils/pddf_switch_svc.py
new file mode 100755
index 000000000..3be0d61b5
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32d/utils/pddf_switch_svc.py
@@ -0,0 +1,86 @@
+#!/usr/bin/env python
+# Script to stop and start the respective platforms default services. 
+# This will be used while switching the pddf->non-pddf mode and vice versa
+import commands
+
+def check_pddf_support():
+    return True
+
+def stop_platform_svc():
+    
+    '''
+    status, output = commands.getstatusoutput("systemctl stop s9301-32d-platform-monitor-fan.service")
+    if status:
+        print "Stop s9301-32d-platform-fan.service failed %d"%status
+        return False
+    
+    status, output = commands.getstatusoutput("systemctl stop s9301-32d-platform-monitor-psu.service")
+    if status:
+        print "Stop s9301-32d-platform-psu.service failed %d"%status
+        return False
+    
+    status, output = commands.getstatusoutput("systemctl stop s9301-32d-platform-monitor.service")
+    if status:
+        print "Stop s9301-32d-platform-init.service failed %d"%status
+        return False
+    status, output = commands.getstatusoutput("systemctl disable s9301-32d-platform-monitor.service")
+    if status:
+        print "Disable s9301-32d-platform-monitor.service failed %d"%status
+        return False
+    '''
+    
+    status, output = commands.getstatusoutput("/usr/local/bin/platform_utility.py deinit")
+    if status:
+        print "platform_utility.py deinit command failed %d"%status
+        return False
+
+    # HACK , stop the pddf-platform-init service if it is active
+    status, output = commands.getstatusoutput("systemctl stop pddf-platform-init.service")
+    if status:
+        print "Stop pddf-platform-init.service along with other platform serives failed %d"%status
+        return False
+
+    return True
+    
+def start_platform_svc():
+    
+    status, output = commands.getstatusoutput("/usr/local/bin/platform_utility.py init")
+    if status:
+        print "platform_utility.py init command failed %d"%status
+        return False
+
+    '''
+    status, output = commands.getstatusoutput("systemctl enable s9301-32d-platform-monitor.service")
+    if status:
+        print "Enable s9301-32d-platform-monitor.service failed %d"%status
+        return False
+    status, output = commands.getstatusoutput("systemctl start s9301-32d-platform-monitor-fan.service")
+    if status:
+        print "Start s9301-32d-platform-monitor-fan.service failed %d"%status
+        return False
+        
+    status, output = commands.getstatusoutput("systemctl start s9301-32d-platform-monitor-psu.service")
+    if status:
+        print "Start s9301-32d-platform-monitor-psu.service failed %d"%status
+        return False
+    '''
+    return True
+
+def start_platform_pddf():   
+
+    status, output = commands.getstatusoutput("systemctl start pddf-platform-init.service")
+    if status:
+        print "Start pddf-platform-init.service failed %d"%status
+        return False
+    
+    return True
+
+def stop_platform_pddf():   
+
+    status, output = commands.getstatusoutput("systemctl stop pddf-platform-init.service")
+    if status:
+        print "Stop pddf-platform-init.service failed %d"%status
+        return False
+
+    return True
+
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/modules/Makefile b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/modules/Makefile
new file mode 100644
index 000000000..2f8a4deb8
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/modules/Makefile
@@ -0,0 +1,6 @@
+
+MODULE_NAME  = x86-64-ufispace-s9301-32db-cpld.o x86-64-ufispace-s9301-32db-sys-eeprom.o x86-64-ufispace-s9301-32db-lpc.o pddf_custom_sysstatus_module.o 
+obj-m       := $(MODULE_NAME)
+
+CFLAGS_pddf_custom_sysstatus_module.o := -I$(M)/../../../../pddf/i2c/modules/include
+KBUILD_EXTRA_SYMBOLS := $(M)/../../../../pddf/i2c/Module.symvers.PDDF
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/modules/pddf_custom_sysstatus_module.c b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/modules/pddf_custom_sysstatus_module.c
new file mode 100644
index 000000000..b61219c00
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/modules/pddf_custom_sysstatus_module.c
@@ -0,0 +1,266 @@
+/*
+ * Copyright 2019 Broadcom.
+ * The term "Broadcom" refers to Broadcom Inc. and/or its subsidiaries.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ *
+ * A pddf kernel module for system status registers
+ */
+
+#define __STDC_WANT_LIB_EXT1__ 1
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/jiffies.h>
+#include <linux/i2c.h>
+#include <linux/hwmon.h>
+#include <linux/hwmon-sysfs.h>
+#include <linux/err.h>
+#include <linux/mutex.h>
+#include <linux/sysfs.h>
+#include <linux/slab.h>
+#include <linux/delay.h>
+#include <linux/dmi.h>
+#include <linux/kobject.h>
+#include "../../../../pddf/i2c/modules/include/pddf_client_defs.h"
+#include "../../../../pddf/i2c/modules/include/pddf_sysstatus_defs.h"
+
+#define _memset(s, c, n) memset(s, c, n)
+
+SYSSTATUS_DATA sysstatus_data = {0};
+
+extern int board_i2c_cpld_read(unsigned short cpld_addr, u8 reg);
+extern int board_i2c_cpld_write(unsigned short cpld_addr, u8 reg, u8 value);
+
+static ssize_t do_attr_operation(struct device *dev, struct device_attribute *da, const char *buf, size_t count);
+ssize_t show_sysstatus_data(struct device *dev, struct device_attribute *da, char *buf);
+ssize_t store_sysstatus_data(struct device *dev, struct device_attribute *da, const char *buf, size_t count);
+
+
+PDDF_DATA_ATTR(attr_name, S_IWUSR|S_IRUGO, show_pddf_data, store_pddf_data, PDDF_CHAR, 32,
+             (void*)&sysstatus_data.sysstatus_addr_attr.aname, NULL);
+PDDF_DATA_ATTR(attr_devaddr, S_IWUSR|S_IRUGO, show_pddf_data, store_pddf_data, PDDF_UINT32,
+              sizeof(uint32_t),  (void*)&sysstatus_data.sysstatus_addr_attr.devaddr , NULL);
+PDDF_DATA_ATTR(attr_offset, S_IWUSR|S_IRUGO, show_pddf_data, store_pddf_data, PDDF_UINT32,
+              sizeof(uint32_t), (void*)&sysstatus_data.sysstatus_addr_attr.offset, NULL);
+PDDF_DATA_ATTR(attr_mask, S_IWUSR|S_IRUGO, show_pddf_data, store_pddf_data, PDDF_UINT32,
+              sizeof(uint32_t), (void*)&sysstatus_data.sysstatus_addr_attr.mask , NULL);
+PDDF_DATA_ATTR(attr_len, S_IWUSR|S_IRUGO, show_pddf_data, store_pddf_data, PDDF_UINT32,
+              sizeof(uint32_t), (void*)&sysstatus_data.sysstatus_addr_attr.len , NULL);
+PDDF_DATA_ATTR(attr_ops, S_IWUSR, NULL, do_attr_operation, PDDF_CHAR, 8, (void*)&sysstatus_data, NULL);
+
+
+
+static struct attribute *sysstatus_addr_attributes[] = {
+    &attr_attr_name.dev_attr.attr,
+    &attr_attr_devaddr.dev_attr.attr,
+    &attr_attr_offset.dev_attr.attr,
+    &attr_attr_mask.dev_attr.attr,
+    &attr_attr_len.dev_attr.attr,
+    &attr_attr_ops.dev_attr.attr,
+    NULL
+};
+
+PDDF_DATA_ATTR(board_info,    S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL);
+PDDF_DATA_ATTR(cpld1_version, S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL);
+PDDF_DATA_ATTR(cpld2_version, S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL);
+PDDF_DATA_ATTR(cpld3_version, S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL);
+PDDF_DATA_ATTR(mac_reset,     S_IWUSR|S_IRUGO, show_sysstatus_data, store_sysstatus_data, PDDF_UCHAR, sizeof(u8), NULL, NULL);
+PDDF_DATA_ATTR(mux_reset,     S_IWUSR|S_IRUGO, show_sysstatus_data, store_sysstatus_data, PDDF_UCHAR, sizeof(u8), NULL, NULL);
+PDDF_DATA_ATTR(psu_status,    S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL);
+PDDF_DATA_ATTR(system_led_0,  S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL);
+PDDF_DATA_ATTR(system_led_1,  S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL);
+PDDF_DATA_ATTR(beacon_led,    S_IWUSR|S_IRUGO, show_sysstatus_data, store_sysstatus_data, PDDF_UCHAR, sizeof(u8), NULL, NULL);
+PDDF_DATA_ATTR(port_led_clr_ctrl, S_IWUSR|S_IRUGO, show_sysstatus_data, store_sysstatus_data, PDDF_UCHAR, sizeof(u8), NULL, NULL);
+
+static struct attribute *sysstatus_data_attributes[] = {
+    &attr_board_info.dev_attr.attr,
+    &attr_cpld1_version.dev_attr.attr,
+    &attr_cpld2_version.dev_attr.attr,
+    &attr_cpld3_version.dev_attr.attr,
+    &attr_mac_reset.dev_attr.attr,
+    &attr_mux_reset.dev_attr.attr,
+    &attr_psu_status.dev_attr.attr,
+    &attr_system_led_0.dev_attr.attr,
+    &attr_system_led_1.dev_attr.attr,
+    &attr_beacon_led.dev_attr.attr,
+    &attr_port_led_clr_ctrl.dev_attr.attr,
+    NULL
+};
+
+
+static const struct attribute_group pddf_sysstatus_addr_group = {
+    .attrs = sysstatus_addr_attributes,
+};
+
+
+static const struct attribute_group pddf_sysstatus_data_group = {
+    .attrs = sysstatus_data_attributes,
+};
+
+
+static struct kobject *sysstatus_addr_kobj;
+static struct kobject *sysstatus_data_kobj;
+
+
+
+ssize_t show_sysstatus_data(struct device *dev, struct device_attribute *da, char *buf)
+{
+
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
+
+    SYSSTATUS_DATA *data = &sysstatus_data;
+    struct SYSSTATUS_ADDR_ATTR *sysstatus_addr_attrs = NULL;
+    int i, status ;
+
+
+    for (i=0;i<MAX_ATTRS;i++)
+    {
+        if (strcmp(data->sysstatus_addr_attrs[i].aname, attr->dev_attr.attr.name) == 0 )
+        {
+            sysstatus_addr_attrs = &data->sysstatus_addr_attrs[i];
+
+        }
+    }
+
+    if (sysstatus_addr_attrs==NULL )
+    {
+        printk(KERN_DEBUG "%s is not supported attribute for this client\n",attr->dev_attr.attr.name);
+        status = 0;
+    }
+    else
+    {
+        status = board_i2c_cpld_read( sysstatus_addr_attrs->devaddr, sysstatus_addr_attrs->offset);
+    }
+
+    return sprintf(buf, "0x%x\n", (status&sysstatus_addr_attrs->mask));
+
+}
+
+ssize_t store_sysstatus_data(struct device *dev, struct device_attribute *da, const char *buf, size_t count)
+{
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
+
+    SYSSTATUS_DATA *data = &sysstatus_data;
+    struct SYSSTATUS_ADDR_ATTR *sysstatus_addr_attrs = NULL;
+    int i, status ;
+    u8 reg_val;
+
+    for (i=0;i<MAX_ATTRS;i++)
+    {
+        if (strcmp(data->sysstatus_addr_attrs[i].aname, attr->dev_attr.attr.name) == 0 )
+        {
+            sysstatus_addr_attrs = &data->sysstatus_addr_attrs[i];
+        }
+    }
+
+    if (sysstatus_addr_attrs==NULL)
+    {
+        printk(KERN_DEBUG "%s is not supported attribute for this client\n",attr->dev_attr.attr.name);
+        return -EINVAL;
+    }
+    else
+    {
+        if (kstrtou8(buf, 0, &reg_val) < 0)
+            return -EINVAL;
+
+        status = board_i2c_cpld_write(sysstatus_addr_attrs->devaddr, sysstatus_addr_attrs->offset, reg_val);
+
+        if (status!=0)
+        {
+            printk(KERN_DEBUG "store_sysstatus_data() %s failed, status=%d\n",data->sysstatus_addr_attrs[i].aname, status);
+            return status;
+        }
+    }
+
+    return count;
+}
+
+
+
+static ssize_t do_attr_operation(struct device *dev, struct device_attribute *da, const char *buf, size_t count)
+{
+    PDDF_ATTR *ptr = (PDDF_ATTR *)da;
+    SYSSTATUS_DATA *pdata = (SYSSTATUS_DATA *)(ptr->addr);
+
+    pdata->sysstatus_addr_attrs[pdata->len] = pdata->sysstatus_addr_attr;
+    pdata->len++;
+    pddf_dbg(SYSSTATUS, KERN_ERR "%s: Populating the data for %s\n", __FUNCTION__, pdata->sysstatus_addr_attr.aname);
+#ifdef __STDC_LIB_EXT1__
+    memset_s(&pdata->sysstatus_addr_attr, sizeof(pdata->sysstatus_addr_attr), 0, sizeof(pdata->sysstatus_addr_attr));
+#else
+    _memset(&pdata->sysstatus_addr_attr, 0, sizeof(pdata->sysstatus_addr_attr));
+#endif
+
+    return count;
+}
+
+
+
+
+int __init sysstatus_data_init(void)
+{
+    struct kobject *device_kobj;
+    int ret = 0;
+
+
+    pddf_dbg(SYSSTATUS, "PDDF SYSSTATUS MODULE.. init\n");
+
+    device_kobj = get_device_i2c_kobj();
+    if(!device_kobj)
+        return -ENOMEM;
+
+    sysstatus_addr_kobj = kobject_create_and_add("sysstatus", device_kobj);
+    if(!sysstatus_addr_kobj)
+        return -ENOMEM;
+
+    sysstatus_data_kobj = kobject_create_and_add("sysstatus_data", sysstatus_addr_kobj);
+    if(!sysstatus_data_kobj)
+        return -ENOMEM;
+
+
+    ret = sysfs_create_group(sysstatus_addr_kobj, &pddf_sysstatus_addr_group);
+    if (ret)
+    {
+        kobject_put(sysstatus_addr_kobj);
+        return ret;
+    }
+
+    ret = sysfs_create_group(sysstatus_data_kobj, &pddf_sysstatus_data_group);
+    if (ret)
+    {
+        sysfs_remove_group(sysstatus_addr_kobj, &pddf_sysstatus_addr_group);
+        kobject_put(sysstatus_data_kobj);
+        kobject_put(sysstatus_addr_kobj);
+        return ret;
+    }
+
+
+    return ret;
+}
+
+void __exit sysstatus_data_exit(void)
+{
+    pddf_dbg(SYSSTATUS, "PDDF SYSSTATUS  MODULE.. exit\n");
+    sysfs_remove_group(sysstatus_data_kobj, &pddf_sysstatus_data_group);
+    sysfs_remove_group(sysstatus_addr_kobj, &pddf_sysstatus_addr_group);
+    kobject_put(sysstatus_data_kobj);
+    kobject_put(sysstatus_addr_kobj);
+    pddf_dbg(SYSSTATUS, KERN_ERR "%s: Removed the kobjects for 'SYSSTATUS'\n",__FUNCTION__);
+    return;
+}
+
+module_init(sysstatus_data_init);
+module_exit(sysstatus_data_exit);
+
+MODULE_AUTHOR("Broadcom");
+MODULE_DESCRIPTION("SYSSTATUS platform data");
+MODULE_LICENSE("GPL");
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/modules/x86-64-ufispace-s9301-32db-cpld.c b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/modules/x86-64-ufispace-s9301-32db-cpld.c
new file mode 100644
index 000000000..e18e1f39c
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/modules/x86-64-ufispace-s9301-32db-cpld.c
@@ -0,0 +1,1656 @@
+/*
+ * A i2c cpld driver for the ufispace_s9301_32db
+ *
+ * Copyright (C) 2017-2019 UfiSpace Technology Corporation.
+ * Jason Tsai <jason.cy.tsai@ufispace.com>
+ *
+ * Based on ad7414.c
+ * Copyright 2006 Stefan Roese <sr at denx.de>, DENX Software Engineering
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#include <linux/module.h>
+#include <linux/i2c.h>
+#include <linux/slab.h>
+#include <linux/list.h>
+#include <linux/dmi.h>
+#include <linux/hwmon.h>
+#include <linux/hwmon-sysfs.h>
+#include <linux/err.h>
+#include <linux/mutex.h>
+#include <linux/version.h>
+#include "x86-64-ufispace-s9301-32db-cpld.h"
+
+#ifdef DEBUG
+#define DEBUG_PRINT(fmt, args...) \
+    printk(KERN_INFO "%s:%s[%d]: " fmt "\r\n", \
+            __FILE__, __func__, __LINE__, ##args)
+#else
+#define DEBUG_PRINT(fmt, args...)
+#endif
+
+#define BSP_LOG_R(fmt, args...) \
+    _bsp_log (LOG_READ, KERN_INFO "%s:%s[%d]: " fmt "\r\n", \
+            __FILE__, __func__, __LINE__, ##args)
+#define BSP_LOG_W(fmt, args...) \
+    _bsp_log (LOG_WRITE, KERN_INFO "%s:%s[%d]: " fmt "\r\n", \
+            __FILE__, __func__, __LINE__, ##args)
+
+#define I2C_READ_BYTE_DATA(ret, lock, i2c_client, reg) \
+{ \
+    mutex_lock(lock); \
+    ret = i2c_smbus_read_byte_data(i2c_client, reg); \
+    mutex_unlock(lock); \
+    BSP_LOG_R("cpld[%d], reg=0x%03x, reg_val=0x%02x", data->index, reg, ret); \
+}
+#define I2C_WRITE_BYTE_DATA(ret, lock, i2c_client, reg, val) \
+{ \
+    mutex_lock(lock); \
+    ret = i2c_smbus_write_byte_data(i2c_client, reg, val); \
+    mutex_unlock(lock); \
+    BSP_LOG_W("cpld[%d], reg=0x%03x, reg_val=0x%02x", data->index, reg, val); \
+}
+
+/* CPLD sysfs attributes index  */
+enum s9301_cpld_sysfs_attributes {
+    /* CPLD1 */
+    CPLD_ACCESS_REG,
+    CPLD_REGISTER_VAL,
+    CPLD_SKU_ID,
+    CPLD_HW_REV,
+    CPLD_DEPH_REV,
+    CPLD_BUILD_REV,
+    CPLD_ID_TYPE,
+    CPLD_MAJOR_VER,
+    CPLD_MINOR_VER,
+    CPLD_BUILD_VER,
+    CPLD_VERION_H,
+    CPLD_ID,
+    CPLD_MAC_INTR,
+    CPLD_10G_PHY_INTR,
+    CPLD_CPLD_FRU_INTR,
+    CPLD_THERMAL_ALERT_INTR,
+    CPLD_MISC_INTR,
+    CPLD_SYSTEM_INTR,
+    CPLD_MAC_INTR_MASK,
+    CPLD_10G_PHY_INTR_MASK,
+    CPLD_CPLD_FRU_INTR_MASK,
+    CPLD_THERMAL_ALERT_INTR_MASK,
+    CPLD_MISC_INTR_MASK,
+    CPLD_MAC_INTR_EVENT,
+    CPLD_10G_PHY_INTR_EVENT,
+    CPLD_CPLD_FRU_INTR_EVENT,
+    CPLD_THERMAL_ALERT_INTR_EVENT,
+    CPLD_MISC_INTR_EVENT,
+    CPLD_MAC_RST,
+    CPLD_10G_PHY_RST,
+    CPLD_BMC_RST,
+    CPLD_USB_RST,
+    CPLD_MUX_RST,
+    CPLD_MISC_RST,
+    CPLD_BMC_WATCHDOG,
+    CPLD_DAU_BD_PRES,
+    CPLD_PSU_STATUS,
+    CPLD_SYS_PW_STATUS,
+    CPLD_MISC,
+    CPLD_MUX_CTRL,
+    CPLD_10GMUX_SEL,
+    CPLD_MAC_QSFP_SEL_CTRL,
+    CPLD_SYS_LED_CTRL_1,
+    CPLD_SYS_LED_CTRL_2,
+    CPLD_BEACON_LED_CTRL,
+    CPLD_PORT_LED_CLR_CTRL,
+    CPLD_EVENT_DETECT_CTRL,
+    /* CPLD2 */
+    CPLD_QSFP56_MOD_INT_G0,
+    CPLD_QSFP56_MOD_INT_G1,
+    CPLD_QSFP56_MOD_INT_G2,
+    CPLD_QSFPDD_MOD_INT,
+    CPLD_QSFP56_PRES_G0,
+    CPLD_QSFP56_PRES_G1,
+    CPLD_QSFP56_PRES_G2,
+    CPLD_QSFPDD_PRES,
+    CPLD_QSFP56_FUSE_INT_G0,
+    CPLD_QSFP56_FUSE_INT_G1,
+    CPLD_QSFP56_FUSE_INT_G2,
+    CPLD_QSFPDD_FUSE_INT,
+    CPLD_SFP_TXFAULT,
+    CPLD_SFP_ABS,
+    CPLD_SFP_RXLOS,
+    CPLD_QSFP56_MOD_INT_MASK_G0,
+    CPLD_QSFP56_MOD_INT_MASK_G1,
+    CPLD_QSFP56_MOD_INT_MASK_G2,
+    CPLD_QSFPDD_MOD_INT_MASK,
+    CPLD_QSFP56_PRES_MASK_G0,
+    CPLD_QSFP56_PRES_MASK_G1,
+    CPLD_QSFP56_PRES_MASK_G2,
+    CPLD_QSFPDD_PRES_MASK,
+    CPLD_QSFP56_FUSE_INT_MASK_G0,
+    CPLD_QSFP56_FUSE_INT_MASK_G1,
+    CPLD_QSFP56_FUSE_INT_MASK_G2,
+    CPLD_QSFPDD_FUSE_INT_MASK,
+    CPLD_SFP_TXFAULT_MASK,
+    CPLD_SFP_ABS_MASK,
+    CPLD_SFP_RXLOS_MASK,
+    CPLD_QSFP56_MOD_INT_EVENT_G0,
+    CPLD_QSFP56_MOD_INT_EVENT_G1,
+    CPLD_QSFP56_MOD_INT_EVENT_G2,
+    CPLD_QSFPDD_MOD_INT_EVENT,
+    CPLD_QSFP56_PRES_EVENT_G0,
+    CPLD_QSFP56_PRES_EVENT_G1,
+    CPLD_QSFP56_PRES_EVENT_G2,
+    CPLD_QSFPDD_PRES_EVENT,
+    CPLD_QSFP56_FUSE_INT_EVENT_G0,
+    CPLD_QSFP56_FUSE_INT_EVENT_G1,
+    CPLD_QSFP56_FUSE_INT_EVENT_G2,
+    CPLD_QSFPDD_FUSE_INT_EVENT,
+    CPLD_SFP_TXFAULT_EVENT,
+    CPLD_SFP_ABS_EVENT,
+    CPLD_SFP_RXLOS_EVENT,
+    CPLD_QSFP56_RESET_CTRL_G0,
+    CPLD_QSFP56_RESET_CTRL_G1,
+    CPLD_QSFP56_RESET_CTRL_G2,
+    CPLD_QSFPDD_RESET_CTRL,
+    CPLD_QSFP56_LP_MODE_G0,
+    CPLD_QSFP56_LP_MODE_G1,
+    CPLD_QSFP56_LP_MODE_G2,
+    CPLD_QSFPDD_LP_MODE,
+    CPLD_SFP_TX_DIS,
+    CPLD_SFP_RS,
+    CPLD_SFP_TS,
+    CPLD_PORT_INT_STATUS,
+
+    //BSP DEBUG
+    BSP_DEBUG
+};
+
+enum bsp_log_types {
+    LOG_NONE,
+    LOG_RW,
+    LOG_READ,
+    LOG_WRITE
+};
+
+enum bsp_log_ctrl {
+    LOG_DISABLE,
+    LOG_ENABLE
+};
+
+/* CPLD sysfs attributes hook functions  */
+static ssize_t read_access_register(struct device *dev,
+                struct device_attribute *da, char *buf);
+static ssize_t write_access_register(struct device *dev,
+        struct device_attribute *da, const char *buf, size_t count);
+static ssize_t read_register_value(struct device *dev,
+                struct device_attribute *da, char *buf);
+static ssize_t write_register_value(struct device *dev,
+        struct device_attribute *da, const char *buf, size_t count);
+static ssize_t read_hw_rev_cb(struct device *dev,
+        struct device_attribute *da, char *buf);
+static ssize_t read_cpld_version_cb(struct device *dev,
+        struct device_attribute *da, char *buf);
+static ssize_t read_cpld_callback(struct device *dev,
+        struct device_attribute *da, char *buf);
+static ssize_t write_cpld_callback(struct device *dev,
+        struct device_attribute *da, const char *buf, size_t count);
+static ssize_t read_cpld_version_h_cb(struct device *dev,
+        struct device_attribute *da, char *buf);
+// cpld access api
+static ssize_t read_cpld_reg(struct device *dev, char *buf, u8 reg);
+static ssize_t write_cpld_reg(struct device *dev, const char *buf, size_t count, u8 reg);
+static bool read_cpld_reg_raw_byte(struct device *dev, u8 reg, u8 *val, int *errno);
+static bool read_cpld_reg_raw_int(struct device *dev, u8 reg, int *val);
+// bsp debug api
+static ssize_t read_bsp(char *buf, char *str);
+static ssize_t write_bsp(const char *buf, char *str, size_t str_len, size_t count);
+static ssize_t read_bsp_callback(struct device *dev,
+        struct device_attribute *da, char *buf);
+static ssize_t write_bsp_callback(struct device *dev,
+        struct device_attribute *da, const char *buf, size_t count);
+
+static LIST_HEAD(cpld_client_list);  /* client list for cpld */
+static struct mutex list_lock;  /* mutex for client list */
+
+struct cpld_client_node {
+    struct i2c_client *client;
+    struct list_head   list;
+};
+
+struct cpld_data {
+    int index;                  /* CPLD index */
+    struct mutex access_lock;       /* mutex for cpld access */
+    u8 access_reg;              /* register to access */
+};
+
+/* CPLD device id and data */
+static const struct i2c_device_id s9301_cpld_id[] = {
+    { "s9301_32db_cpld1",  cpld1 },
+    { "s9301_32db_cpld2",  cpld2 },
+    { "s9301_32db_cpld3",  cpld3 },
+    {}
+};
+
+char bsp_debug[2]="0";
+u8 enable_log_read=LOG_DISABLE;
+u8 enable_log_write=LOG_DISABLE;
+
+/* Addresses scanned for s9301_cpld */
+static const unsigned short cpld_i2c_addr[] = { 0x30, 0x31, 0x32, I2C_CLIENT_END };
+
+/* define all support register access of cpld in attribute */
+/* CPLD1 */
+static SENSOR_DEVICE_ATTR(cpld_access_register, S_IWUSR | S_IRUGO, \
+        read_access_register, write_access_register, CPLD_ACCESS_REG);
+static SENSOR_DEVICE_ATTR(cpld_register_value, S_IWUSR | S_IRUGO, \
+        read_register_value, write_register_value, CPLD_REGISTER_VAL);
+static SENSOR_DEVICE_ATTR(cpld_sku_id, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_SKU_ID);
+static SENSOR_DEVICE_ATTR(cpld_hw_rev, S_IRUGO, \
+        read_hw_rev_cb, NULL, CPLD_HW_REV);
+static SENSOR_DEVICE_ATTR(cpld_deph_rev, S_IRUGO, \
+        read_hw_rev_cb, NULL, CPLD_DEPH_REV);
+static SENSOR_DEVICE_ATTR(cpld_build_rev, S_IRUGO, \
+        read_hw_rev_cb, NULL, CPLD_BUILD_REV);
+static SENSOR_DEVICE_ATTR(cpld_id_type, S_IRUGO, \
+        read_hw_rev_cb, NULL, CPLD_ID_TYPE);
+static SENSOR_DEVICE_ATTR(cpld_major_ver, S_IRUGO, \
+        read_cpld_version_cb, NULL, CPLD_MAJOR_VER);
+static SENSOR_DEVICE_ATTR(cpld_minor_ver, S_IRUGO, \
+        read_cpld_version_cb, NULL, CPLD_MINOR_VER);
+static SENSOR_DEVICE_ATTR(cpld_build_ver, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_BUILD_VER);
+static SENSOR_DEVICE_ATTR(cpld_version_h, S_IRUGO, \
+        read_cpld_version_h_cb, NULL, CPLD_VERION_H);
+static SENSOR_DEVICE_ATTR(cpld_id, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_ID);
+static SENSOR_DEVICE_ATTR(cpld_mac_intr, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_MAC_INTR);
+static SENSOR_DEVICE_ATTR(cpld_10g_phy_intr, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_10G_PHY_INTR);
+static SENSOR_DEVICE_ATTR(cpld_cpld_fru_intr, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_CPLD_FRU_INTR);
+static SENSOR_DEVICE_ATTR(cpld_thermal_alert_intr, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_THERMAL_ALERT_INTR);
+static SENSOR_DEVICE_ATTR(cpld_misc_intr, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_MISC_INTR);
+static SENSOR_DEVICE_ATTR(cpld_system_intr, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_SYSTEM_INTR);
+static SENSOR_DEVICE_ATTR(cpld_mac_intr_mask, S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, CPLD_MAC_INTR_MASK);
+static SENSOR_DEVICE_ATTR(cpld_10g_phy_intr_mask, S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, CPLD_10G_PHY_INTR_MASK);
+static SENSOR_DEVICE_ATTR(cpld_cpld_fru_intr_mask, S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, CPLD_CPLD_FRU_INTR_MASK);
+static SENSOR_DEVICE_ATTR(cpld_thermal_alert_intr_mask, S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, CPLD_THERMAL_ALERT_INTR_MASK);
+static SENSOR_DEVICE_ATTR(cpld_misc_intr_mask, S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, CPLD_MISC_INTR_MASK);
+static SENSOR_DEVICE_ATTR(cpld_mac_intr_event, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_MAC_INTR_EVENT);
+static SENSOR_DEVICE_ATTR(cpld_10g_phy_intr_event, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_10G_PHY_INTR_EVENT);
+static SENSOR_DEVICE_ATTR(cpld_cpld_fru_intr_event, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_CPLD_FRU_INTR_EVENT);
+static SENSOR_DEVICE_ATTR(cpld_thermal_alert_intr_event, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_THERMAL_ALERT_INTR_EVENT);
+static SENSOR_DEVICE_ATTR(cpld_misc_intr_event, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_MISC_INTR_EVENT);
+static SENSOR_DEVICE_ATTR(cpld_mac_rst, S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, CPLD_MAC_RST);
+static SENSOR_DEVICE_ATTR(cpld_10g_phy_rst, S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, CPLD_10G_PHY_RST);
+static SENSOR_DEVICE_ATTR(cpld_bmc_rst, S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, CPLD_BMC_RST);
+static SENSOR_DEVICE_ATTR(cpld_usb_rst, S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, CPLD_USB_RST);
+static SENSOR_DEVICE_ATTR(cpld_mux_rst, S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, CPLD_MUX_RST);
+static SENSOR_DEVICE_ATTR(cpld_misc_rst, S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, CPLD_MISC_RST);
+static SENSOR_DEVICE_ATTR(cpld_bmc_watchdog, S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, CPLD_BMC_WATCHDOG);
+static SENSOR_DEVICE_ATTR(cpld_dau_bd_pres, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_DAU_BD_PRES);
+static SENSOR_DEVICE_ATTR(cpld_psu_status, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_PSU_STATUS);
+static SENSOR_DEVICE_ATTR(cpld_sys_pw_status, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_SYS_PW_STATUS);
+static SENSOR_DEVICE_ATTR(cpld_misc, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_MISC);
+static SENSOR_DEVICE_ATTR(cpld_mux_ctrl, S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, CPLD_MUX_CTRL);
+static SENSOR_DEVICE_ATTR(cpld_10gmux_sel, S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, CPLD_10GMUX_SEL);
+static SENSOR_DEVICE_ATTR(cpld_mac_qsfp_sel_ctrl, S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, CPLD_MAC_QSFP_SEL_CTRL);
+static SENSOR_DEVICE_ATTR(cpld_sys_led_ctrl_1, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_SYS_LED_CTRL_1);
+static SENSOR_DEVICE_ATTR(cpld_sys_led_ctrl_2, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_SYS_LED_CTRL_2);
+static SENSOR_DEVICE_ATTR(cpld_beacon_led_ctrl, S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, CPLD_BEACON_LED_CTRL);
+static SENSOR_DEVICE_ATTR(cpld_port_led_clr_ctrl, S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, CPLD_PORT_LED_CLR_CTRL);
+static SENSOR_DEVICE_ATTR(cpld_event_detect_ctrl, S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, CPLD_EVENT_DETECT_CTRL);
+/* CPLD2 */
+static SENSOR_DEVICE_ATTR(cpld_qsfp56_mod_int_g0, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_QSFP56_MOD_INT_G0);
+static SENSOR_DEVICE_ATTR(cpld_qsfp56_mod_int_g1, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_QSFP56_MOD_INT_G1);
+static SENSOR_DEVICE_ATTR(cpld_qsfp56_mod_int_g2, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_QSFP56_MOD_INT_G2);
+static SENSOR_DEVICE_ATTR(cpld_qsfpdd_mod_int, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_QSFPDD_MOD_INT);
+static SENSOR_DEVICE_ATTR(cpld_qsfp56_pres_g0, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_QSFP56_PRES_G0);
+static SENSOR_DEVICE_ATTR(cpld_qsfp56_pres_g1, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_QSFP56_PRES_G1);
+static SENSOR_DEVICE_ATTR(cpld_qsfp56_pres_g2, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_QSFP56_PRES_G2);
+static SENSOR_DEVICE_ATTR(cpld_qsfpdd_pres, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_QSFPDD_PRES);
+static SENSOR_DEVICE_ATTR(cpld_qsfp56_fuse_int_g0, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_QSFP56_FUSE_INT_G0);
+static SENSOR_DEVICE_ATTR(cpld_qsfp56_fuse_int_g1, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_QSFP56_FUSE_INT_G1);
+static SENSOR_DEVICE_ATTR(cpld_qsfp56_fuse_int_g2, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_QSFP56_FUSE_INT_G2);
+static SENSOR_DEVICE_ATTR(cpld_qsfpdd_fuse_int, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_QSFPDD_FUSE_INT);
+static SENSOR_DEVICE_ATTR(cpld_sfp_txfault, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_SFP_TXFAULT);
+static SENSOR_DEVICE_ATTR(cpld_sfp_abs, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_SFP_ABS);
+static SENSOR_DEVICE_ATTR(cpld_sfp_rxlos, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_SFP_RXLOS);
+static SENSOR_DEVICE_ATTR(cpld_qsfp56_mod_int_mask_g0, S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, CPLD_QSFP56_MOD_INT_MASK_G0);
+static SENSOR_DEVICE_ATTR(cpld_qsfp56_mod_int_mask_g1, S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, CPLD_QSFP56_MOD_INT_MASK_G1);
+static SENSOR_DEVICE_ATTR(cpld_qsfp56_mod_int_mask_g2, S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, CPLD_QSFP56_MOD_INT_MASK_G2);
+static SENSOR_DEVICE_ATTR(cpld_qsfpdd_mod_int_mask, S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, CPLD_QSFPDD_MOD_INT_MASK);
+static SENSOR_DEVICE_ATTR(cpld_qsfp56_pres_mask_g0, S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, CPLD_QSFP56_PRES_MASK_G0);
+static SENSOR_DEVICE_ATTR(cpld_qsfp56_pres_mask_g1, S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, CPLD_QSFP56_PRES_MASK_G1);
+static SENSOR_DEVICE_ATTR(cpld_qsfp56_pres_mask_g2, S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, CPLD_QSFP56_PRES_MASK_G2);
+static SENSOR_DEVICE_ATTR(cpld_qsfpdd_pres_mask, S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, CPLD_QSFPDD_PRES_MASK);
+static SENSOR_DEVICE_ATTR(cpld_qsfp56_fuse_int_mask_g0, S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, CPLD_QSFP56_FUSE_INT_MASK_G0);
+static SENSOR_DEVICE_ATTR(cpld_qsfp56_fuse_int_mask_g1, S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, CPLD_QSFP56_FUSE_INT_MASK_G1);
+static SENSOR_DEVICE_ATTR(cpld_qsfp56_fuse_int_mask_g2, S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, CPLD_QSFP56_FUSE_INT_MASK_G2);
+static SENSOR_DEVICE_ATTR(cpld_qsfpdd_fuse_int_mask, S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, CPLD_QSFPDD_FUSE_INT_MASK);
+static SENSOR_DEVICE_ATTR(cpld_sfp_txfault_mask, S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, CPLD_SFP_TXFAULT_MASK);
+static SENSOR_DEVICE_ATTR(cpld_sfp_abs_mask, S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, CPLD_SFP_ABS_MASK);
+static SENSOR_DEVICE_ATTR(cpld_sfp_rxlos_mask, S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, CPLD_SFP_RXLOS_MASK);
+static SENSOR_DEVICE_ATTR(cpld_qsfp56_mod_int_event_g0, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_QSFP56_MOD_INT_EVENT_G0);
+static SENSOR_DEVICE_ATTR(cpld_qsfp56_mod_int_event_g1, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_QSFP56_MOD_INT_EVENT_G1);
+static SENSOR_DEVICE_ATTR(cpld_qsfp56_mod_int_event_g2, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_QSFP56_MOD_INT_EVENT_G2);
+static SENSOR_DEVICE_ATTR(cpld_qsfpdd_mod_int_event, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_QSFPDD_MOD_INT_EVENT);
+static SENSOR_DEVICE_ATTR(cpld_qsfp56_pres_event_g0, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_QSFP56_PRES_EVENT_G0);
+static SENSOR_DEVICE_ATTR(cpld_qsfp56_pres_event_g1, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_QSFP56_PRES_EVENT_G1);
+static SENSOR_DEVICE_ATTR(cpld_qsfp56_pres_event_g2, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_QSFP56_PRES_EVENT_G2);
+static SENSOR_DEVICE_ATTR(cpld_qsfpdd_pres_event, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_QSFPDD_PRES_EVENT);
+static SENSOR_DEVICE_ATTR(cpld_qsfp56_fuse_int_event_g0, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_QSFP56_FUSE_INT_EVENT_G0);
+static SENSOR_DEVICE_ATTR(cpld_qsfp56_fuse_int_event_g1, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_QSFP56_FUSE_INT_EVENT_G1);
+static SENSOR_DEVICE_ATTR(cpld_qsfp56_fuse_int_event_g2, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_QSFP56_FUSE_INT_EVENT_G2);
+static SENSOR_DEVICE_ATTR(cpld_qsfpdd_fuse_int_event, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_QSFPDD_FUSE_INT_EVENT);
+static SENSOR_DEVICE_ATTR(cpld_sfp_txfault_event, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_SFP_TXFAULT_EVENT);
+static SENSOR_DEVICE_ATTR(cpld_sfp_abs_event, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_SFP_ABS_EVENT);
+static SENSOR_DEVICE_ATTR(cpld_sfp_rxlos_event, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_SFP_RXLOS_EVENT);
+static SENSOR_DEVICE_ATTR(cpld_qsfp56_reset_ctrl_g0, \
+       S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, \
+        CPLD_QSFP56_RESET_CTRL_G0);
+static SENSOR_DEVICE_ATTR(cpld_qsfp56_reset_ctrl_g1, \
+        S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, \
+        CPLD_QSFP56_RESET_CTRL_G1);
+static SENSOR_DEVICE_ATTR(cpld_qsfp56_reset_ctrl_g2, \
+        S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, \
+        CPLD_QSFP56_RESET_CTRL_G2);
+static SENSOR_DEVICE_ATTR(cpld_qsfpdd_reset_ctrl, \
+        S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, \
+        CPLD_QSFPDD_RESET_CTRL);
+static SENSOR_DEVICE_ATTR(cpld_qsfp56_lp_mode_g0, \
+        S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, \
+        CPLD_QSFP56_LP_MODE_G0);
+static SENSOR_DEVICE_ATTR(cpld_qsfp56_lp_mode_g1, \
+        S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, \
+        CPLD_QSFP56_LP_MODE_G1);
+static SENSOR_DEVICE_ATTR(cpld_qsfp56_lp_mode_g2, \
+        S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, \
+        CPLD_QSFP56_LP_MODE_G2);
+static SENSOR_DEVICE_ATTR(cpld_qsfpdd_lp_mode, \
+        S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, \
+        CPLD_QSFPDD_LP_MODE);
+static SENSOR_DEVICE_ATTR(cpld_sfp_tx_dis, S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, CPLD_SFP_TX_DIS);
+static SENSOR_DEVICE_ATTR(cpld_sfp_rs, S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, CPLD_SFP_RS);
+static SENSOR_DEVICE_ATTR(cpld_sfp_ts, S_IWUSR | S_IRUGO, \
+        read_cpld_callback, write_cpld_callback, CPLD_SFP_TS);
+static SENSOR_DEVICE_ATTR(cpld_port_int_status, S_IRUGO, \
+        read_cpld_callback, NULL, CPLD_PORT_INT_STATUS);
+//BSP DEBUG
+static SENSOR_DEVICE_ATTR(bsp_debug, S_IRUGO | S_IWUSR, \
+        read_bsp_callback, write_bsp_callback, BSP_DEBUG);
+
+/* define support attributes of cpldx , total 3 */
+/* cpld 1 */
+static struct attribute *s9301_cpld1_attributes[] = {
+    &sensor_dev_attr_cpld_access_register.dev_attr.attr,
+    &sensor_dev_attr_cpld_register_value.dev_attr.attr,
+    &sensor_dev_attr_cpld_sku_id.dev_attr.attr,
+    &sensor_dev_attr_cpld_hw_rev.dev_attr.attr,
+    &sensor_dev_attr_cpld_deph_rev.dev_attr.attr,
+    &sensor_dev_attr_cpld_build_rev.dev_attr.attr,
+    &sensor_dev_attr_cpld_version_h.dev_attr.attr,
+    &sensor_dev_attr_cpld_id_type.dev_attr.attr,
+    &sensor_dev_attr_cpld_major_ver.dev_attr.attr,
+    &sensor_dev_attr_cpld_minor_ver.dev_attr.attr,
+    &sensor_dev_attr_cpld_build_ver.dev_attr.attr,
+    &sensor_dev_attr_cpld_id.dev_attr.attr,
+    &sensor_dev_attr_cpld_mac_intr.dev_attr.attr,
+    &sensor_dev_attr_cpld_10g_phy_intr.dev_attr.attr,
+    &sensor_dev_attr_cpld_cpld_fru_intr.dev_attr.attr,
+    &sensor_dev_attr_cpld_thermal_alert_intr.dev_attr.attr,
+    &sensor_dev_attr_cpld_misc_intr.dev_attr.attr,
+    &sensor_dev_attr_cpld_system_intr.dev_attr.attr,
+    &sensor_dev_attr_cpld_mac_intr_mask.dev_attr.attr,
+    &sensor_dev_attr_cpld_10g_phy_intr_mask.dev_attr.attr,
+    &sensor_dev_attr_cpld_cpld_fru_intr_mask.dev_attr.attr,
+    &sensor_dev_attr_cpld_thermal_alert_intr_mask.dev_attr.attr,
+    &sensor_dev_attr_cpld_misc_intr_mask.dev_attr.attr,
+    &sensor_dev_attr_cpld_mac_intr_event.dev_attr.attr,
+    &sensor_dev_attr_cpld_10g_phy_intr_event.dev_attr.attr,
+    &sensor_dev_attr_cpld_cpld_fru_intr_event.dev_attr.attr,
+    &sensor_dev_attr_cpld_thermal_alert_intr_event.dev_attr.attr,
+    &sensor_dev_attr_cpld_misc_intr_event.dev_attr.attr,
+    &sensor_dev_attr_cpld_mac_rst.dev_attr.attr,
+    &sensor_dev_attr_cpld_10g_phy_rst.dev_attr.attr,
+    &sensor_dev_attr_cpld_bmc_rst.dev_attr.attr,
+    &sensor_dev_attr_cpld_usb_rst.dev_attr.attr,
+    &sensor_dev_attr_cpld_mux_rst.dev_attr.attr,
+    &sensor_dev_attr_cpld_misc_rst.dev_attr.attr,
+    &sensor_dev_attr_cpld_bmc_watchdog.dev_attr.attr,
+    &sensor_dev_attr_cpld_dau_bd_pres.dev_attr.attr,
+    &sensor_dev_attr_cpld_psu_status.dev_attr.attr,
+    &sensor_dev_attr_cpld_sys_pw_status.dev_attr.attr,
+    &sensor_dev_attr_cpld_misc.dev_attr.attr,
+    &sensor_dev_attr_cpld_mux_ctrl.dev_attr.attr,
+    &sensor_dev_attr_cpld_10gmux_sel.dev_attr.attr,
+    &sensor_dev_attr_cpld_mac_qsfp_sel_ctrl.dev_attr.attr,
+    &sensor_dev_attr_cpld_sys_led_ctrl_1.dev_attr.attr,
+    &sensor_dev_attr_cpld_sys_led_ctrl_2.dev_attr.attr,
+    &sensor_dev_attr_cpld_beacon_led_ctrl.dev_attr.attr,
+    &sensor_dev_attr_cpld_port_led_clr_ctrl.dev_attr.attr,
+    &sensor_dev_attr_cpld_event_detect_ctrl.dev_attr.attr,
+    &sensor_dev_attr_bsp_debug.dev_attr.attr,
+    NULL
+};
+
+/* cpld 2 */
+static struct attribute *s9301_cpld2_attributes[] = {
+    &sensor_dev_attr_cpld_access_register.dev_attr.attr,
+    &sensor_dev_attr_cpld_register_value.dev_attr.attr,
+    &sensor_dev_attr_cpld_major_ver.dev_attr.attr,
+    &sensor_dev_attr_cpld_minor_ver.dev_attr.attr,
+    &sensor_dev_attr_cpld_build_ver.dev_attr.attr,
+    &sensor_dev_attr_cpld_version_h.dev_attr.attr,
+    &sensor_dev_attr_cpld_id.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfp56_mod_int_g0.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfp56_mod_int_g1.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfp56_mod_int_g2.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfpdd_mod_int.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfp56_pres_g0.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfp56_pres_g1.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfp56_pres_g2.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfpdd_pres.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfp56_fuse_int_g0.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfp56_fuse_int_g1.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfp56_fuse_int_g2.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfpdd_fuse_int.dev_attr.attr,
+    &sensor_dev_attr_cpld_sfp_txfault.dev_attr.attr,
+    &sensor_dev_attr_cpld_sfp_abs.dev_attr.attr,
+    &sensor_dev_attr_cpld_sfp_rxlos.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfp56_mod_int_mask_g0.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfp56_mod_int_mask_g1.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfp56_mod_int_mask_g2.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfpdd_mod_int_mask.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfp56_pres_mask_g0.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfp56_pres_mask_g1.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfp56_pres_mask_g2.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfpdd_pres_mask.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfp56_fuse_int_mask_g0.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfp56_fuse_int_mask_g1.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfp56_fuse_int_mask_g2.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfpdd_fuse_int_mask.dev_attr.attr,
+    &sensor_dev_attr_cpld_sfp_txfault_mask.dev_attr.attr,
+    &sensor_dev_attr_cpld_sfp_abs_mask.dev_attr.attr,
+    &sensor_dev_attr_cpld_sfp_rxlos_mask.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfp56_mod_int_event_g0.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfp56_mod_int_event_g1.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfp56_mod_int_event_g2.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfpdd_mod_int_event.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfp56_pres_event_g0.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfp56_pres_event_g1.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfp56_pres_event_g2.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfpdd_pres_event.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfp56_fuse_int_event_g0.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfp56_fuse_int_event_g1.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfp56_fuse_int_event_g2.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfpdd_fuse_int_event.dev_attr.attr,
+    &sensor_dev_attr_cpld_sfp_txfault_event.dev_attr.attr,
+    &sensor_dev_attr_cpld_sfp_abs_event.dev_attr.attr,
+    &sensor_dev_attr_cpld_sfp_rxlos_event.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfp56_reset_ctrl_g0.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfp56_reset_ctrl_g1.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfp56_reset_ctrl_g2.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfpdd_reset_ctrl.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfp56_lp_mode_g0.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfp56_lp_mode_g1.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfp56_lp_mode_g2.dev_attr.attr,
+    &sensor_dev_attr_cpld_qsfpdd_lp_mode.dev_attr.attr,
+    &sensor_dev_attr_cpld_sfp_tx_dis.dev_attr.attr,
+    &sensor_dev_attr_cpld_sfp_rs.dev_attr.attr,
+    &sensor_dev_attr_cpld_sfp_ts.dev_attr.attr,
+    &sensor_dev_attr_cpld_port_int_status.dev_attr.attr,
+    NULL
+};
+
+/* cpld 3 */
+static struct attribute *s9301_cpld3_attributes[] = {
+    &sensor_dev_attr_cpld_access_register.dev_attr.attr,
+    &sensor_dev_attr_cpld_register_value.dev_attr.attr,
+    &sensor_dev_attr_cpld_major_ver.dev_attr.attr,
+    &sensor_dev_attr_cpld_minor_ver.dev_attr.attr,
+    &sensor_dev_attr_cpld_build_ver.dev_attr.attr,
+    &sensor_dev_attr_cpld_version_h.dev_attr.attr,
+    &sensor_dev_attr_cpld_id.dev_attr.attr,
+    NULL
+};
+
+/* cpld 1 attributes group */
+static const struct attribute_group s9301_cpld1_group = {
+    .attrs = s9301_cpld1_attributes,
+};
+/* cpld 2 attributes group */
+static const struct attribute_group s9301_cpld2_group = {
+    .attrs = s9301_cpld2_attributes,
+};
+/* cpld 3 attributes group */
+static const struct attribute_group s9301_cpld3_group = {
+    .attrs = s9301_cpld3_attributes,
+};
+
+static int _bsp_log(u8 log_type, char *fmt, ...)
+{
+    if((log_type==LOG_READ  && enable_log_read) ||
+        (log_type==LOG_WRITE && enable_log_write)) {
+        va_list args;
+        int r;
+
+        va_start(args, fmt);
+        r = vprintk(fmt, args);
+        va_end(args);
+
+        return r;
+    } else {
+        return 0;
+    }
+}
+
+static int _config_bsp_log(u8 log_type)
+{
+    switch(log_type) {
+        case LOG_NONE:
+            enable_log_read = LOG_DISABLE;
+            enable_log_write = LOG_DISABLE;
+            break;
+        case LOG_RW:
+            enable_log_read = LOG_ENABLE;
+            enable_log_write = LOG_ENABLE;
+            break;
+        case LOG_READ:
+            enable_log_read = LOG_ENABLE;
+            enable_log_write = LOG_DISABLE;
+            break;
+        case LOG_WRITE:
+            enable_log_read = LOG_DISABLE;
+            enable_log_write = LOG_ENABLE;
+            break;
+        default:
+            return -EINVAL;
+    }
+    return 0;
+}
+
+/* get bsp value */
+static ssize_t read_bsp(char *buf, char *str)
+{
+    ssize_t len=0;
+
+    len=sprintf(buf, "%s", str);
+    BSP_LOG_R("reg_val=%s", str);
+
+    return len;
+}
+
+/* set bsp value */
+static ssize_t write_bsp(const char *buf, char *str, size_t str_len, size_t count)
+{
+    snprintf(str, str_len, "%s", buf);
+    BSP_LOG_W("reg_val=%s", str);
+
+    return count;
+}
+
+/* get bsp parameter value */
+static ssize_t read_bsp_callback(struct device *dev,
+        struct device_attribute *da, char *buf)
+{
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
+    int str_len=0;
+    char *str=NULL;
+
+    switch(attr->index) {
+        case BSP_DEBUG:
+            str = bsp_debug;
+            str_len = sizeof(bsp_debug);
+            break;
+        default:
+            return -EINVAL;
+    }
+    return read_bsp(buf, str);
+}
+
+/* set bsp parameter value */
+static ssize_t write_bsp_callback(struct device *dev,
+        struct device_attribute *da, const char *buf, size_t count)
+{
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
+    int str_len=0;
+    char *str=NULL;
+    ssize_t ret = 0;
+    u8 bsp_debug_u8 = 0;
+
+    switch(attr->index) {
+        case BSP_DEBUG:
+            str = bsp_debug;
+            str_len = sizeof(bsp_debug);
+            ret = write_bsp(buf, str, str_len, count);
+
+            if(kstrtou8(buf, 0, &bsp_debug_u8) < 0) {
+                return -EINVAL;
+            } else if(_config_bsp_log(bsp_debug_u8) < 0) {
+                return -EINVAL;
+            }
+            return ret;
+        default:
+            return -EINVAL;
+    }
+    return 0;
+}
+
+/* read access register from cpld data */
+static ssize_t read_access_register(struct device *dev,
+                    struct device_attribute *da,
+                    char *buf)
+{
+    struct i2c_client *client = to_i2c_client(dev);
+    struct cpld_data *data = i2c_get_clientdata(client);
+    u8 reg = data->access_reg;
+
+    return sprintf(buf, "0x%x\n", reg);
+}
+
+/* write access register to cpld data */
+static ssize_t write_access_register(struct device *dev,
+                    struct device_attribute *da,
+                    const char *buf,
+                    size_t count)
+{
+    struct i2c_client *client = to_i2c_client(dev);
+    struct cpld_data *data = i2c_get_clientdata(client);
+    u8 reg;
+
+    if(kstrtou8(buf, 0, &reg) < 0)
+        return -EINVAL;
+
+    data->access_reg = reg;
+    return count;
+}
+
+/* read the value of access register in cpld data */
+static ssize_t read_register_value(struct device *dev,
+                    struct device_attribute *da,
+                    char *buf)
+{
+    struct i2c_client *client = to_i2c_client(dev);
+    struct cpld_data *data = i2c_get_clientdata(client);
+    u8 reg = data->access_reg;
+    int reg_val;
+
+    I2C_READ_BYTE_DATA(reg_val, &data->access_lock, client, reg);
+
+    if(reg_val < 0)
+        return reg_val;
+
+    return sprintf(buf, "0x%x\n", reg_val);
+}
+
+/* wrtie the value to access register in cpld data */
+static ssize_t write_register_value(struct device *dev,
+                    struct device_attribute *da,
+                    const char *buf,
+                    size_t count)
+{
+    struct i2c_client *client = to_i2c_client(dev);
+    struct cpld_data *data = i2c_get_clientdata(client);
+    int ret = -EIO;
+    u8 reg = data->access_reg;
+    u8 reg_val;
+
+    if(kstrtou8(buf, 0, &reg_val) < 0)
+        return -EINVAL;
+
+    I2C_WRITE_BYTE_DATA(ret, &data->access_lock, client, reg, reg_val);
+
+    if(unlikely(ret < 0)) {
+        dev_err(dev, "I2C_WRITE_BYTE_DATA error, return=%d\n", ret);
+        return ret;
+    }
+
+    return count;
+}
+
+/* get cpld register value */
+static ssize_t read_cpld_reg(struct device *dev,
+                    char *buf,
+                    u8 reg)
+{
+    int reg_val;
+
+    if(read_cpld_reg_raw_int(dev, reg, &reg_val))
+        return sprintf(buf, "0x%02x\n", reg_val);
+    else
+        return reg_val;
+}
+
+static bool read_cpld_reg_raw_int(struct device *dev, u8 reg, int *val)
+{
+    struct i2c_client *client = to_i2c_client(dev);
+    struct cpld_data *data = i2c_get_clientdata(client);
+    I2C_READ_BYTE_DATA(*val, &data->access_lock, client, reg);
+    if(unlikely(*val < 0)) {
+        dev_err(dev, "read_cpld_reg_raw_int() error, return=%d\n", *val);
+        return false;
+    }
+    return true;
+}
+
+static bool read_cpld_reg_raw_byte(struct device *dev, u8 reg, u8 *val, int *errno)
+{
+    int reg_val;
+
+    if(read_cpld_reg_raw_int(dev, reg, &reg_val)) {
+        *val = (u8)reg_val;
+        return true;
+    } else {
+        *errno = reg_val;
+        return false;
+    }
+}
+
+/* handle read for attributes */
+static ssize_t read_cpld_callback(struct device *dev,
+        struct device_attribute *da, char *buf)
+{
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
+    u8 reg = 0;
+
+    switch(attr->index) {
+        case CPLD_SKU_ID:
+             reg = CPLD_SKU_ID_REG;
+             break;
+        case CPLD_ID:
+             reg = CPLD_ID_REG;
+             break;
+        case CPLD_BUILD_VER:
+             reg = CPLD_BUILD_VER_REG;
+             break;
+        case CPLD_MAC_INTR:
+             reg = CPLD_MAC_INTR_REG;
+             break;
+        case CPLD_10G_PHY_INTR:
+             reg = CPLD_10G_PHY_INTR_REG;
+             break;
+        case CPLD_CPLD_FRU_INTR:
+             reg = CPLD_CPLD_FRU_INTR_REG;
+             break;
+        case CPLD_THERMAL_ALERT_INTR:
+             reg = CPLD_THERMAL_ALERT_INTR_REG;
+             break;
+        case CPLD_MISC_INTR:
+             reg = CPLD_MISC_INTR_REG;
+             break;
+        case CPLD_SYSTEM_INTR:
+             reg = CPLD_SYSTEM_INTR_REG;
+             break;
+        case CPLD_MAC_INTR_MASK:
+             reg = CPLD_MAC_INTR_MASK_REG;
+             break;
+        case CPLD_10G_PHY_INTR_MASK:
+             reg = CPLD_10G_PHY_INTR_MASK_REG;
+             break;
+        case CPLD_CPLD_FRU_INTR_MASK:
+             reg = CPLD_CPLD_FRU_INTR_MASK_REG;
+             break;
+        case CPLD_THERMAL_ALERT_INTR_MASK:
+             reg = CPLD_THERMAL_ALERT_INTR_MASK_REG;
+             break;
+        case CPLD_MISC_INTR_MASK:
+             reg = CPLD_MISC_INTR_MASK_REG;
+             break;
+        case CPLD_MAC_INTR_EVENT:
+             reg = CPLD_MAC_INTR_EVENT_REG;
+             break;
+        case CPLD_10G_PHY_INTR_EVENT:
+             reg = CPLD_10G_PHY_INTR_EVENT_REG;
+             break;
+        case CPLD_CPLD_FRU_INTR_EVENT:
+             reg = CPLD_CPLD_FRU_INTR_EVENT_REG;
+             break;
+        case CPLD_THERMAL_ALERT_INTR_EVENT:
+             reg = CPLD_THERMAL_ALERT_INTR_EVENT_REG;
+             break;
+        case CPLD_MISC_INTR_EVENT:
+             reg = CPLD_MISC_INTR_EVENT_REG;
+             break;
+        case CPLD_MAC_RST:
+             reg = CPLD_MAC_RST_REG;
+             break;
+        case CPLD_10G_PHY_RST:
+             reg = CPLD_10G_PHY_RST_REG;
+             break;
+        case CPLD_BMC_RST:
+             reg = CPLD_BMC_RST_REG;
+             break;
+        case CPLD_USB_RST:
+             reg = CPLD_USB_RST_REG;
+             break;
+        case CPLD_MUX_RST:
+             reg = CPLD_MUX_RST_REG;
+             break;
+        case CPLD_MISC_RST:
+             reg = CPLD_MISC_RST_REG;
+             break;
+        case CPLD_BMC_WATCHDOG:
+             reg = CPLD_BMC_WATCHDOG_REG;
+             break;
+        case CPLD_DAU_BD_PRES:
+             reg = CPLD_DAU_BD_PRES_REG;
+             break;
+        case CPLD_PSU_STATUS:
+             reg = CPLD_PSU_STATUS_REG;
+             break;
+        case CPLD_SYS_PW_STATUS:
+             reg = CPLD_SYS_PW_STATUS_REG;
+             break;
+        case CPLD_MISC:
+             reg = CPLD_MISC_REG;
+             break;
+        case CPLD_MUX_CTRL:
+             reg = CPLD_MUX_CTRL_REG;
+             break;
+        case CPLD_10GMUX_SEL:
+             reg = CPLD_10GMUX_SEL_REG;
+             break;
+        case CPLD_MAC_QSFP_SEL_CTRL:
+             reg = CPLD_MAC_QSFP_SEL_CTRL_REG;
+             break;
+        case CPLD_SYS_LED_CTRL_1:
+             reg = CPLD_SYS_LED_CTRL_1_REG;
+             break;
+        case CPLD_SYS_LED_CTRL_2:
+             reg = CPLD_SYS_LED_CTRL_2_REG;
+             break;
+        case CPLD_BEACON_LED_CTRL:
+             reg = CPLD_BEACON_LED_CTRL_REG;
+             break;
+        case CPLD_PORT_LED_CLR_CTRL:
+             reg = CPLD_PORT_LED_CLR_CTRL_REG;
+             break;
+        case CPLD_EVENT_DETECT_CTRL:
+             reg = CPLD_EVENT_DETECT_CTRL_REG;
+             break;
+        case CPLD_QSFP56_MOD_INT_G0:
+             reg = CPLD_QSFP56_MOD_INT_G0_REG;
+             break;
+        case CPLD_QSFP56_MOD_INT_G1:
+             reg = CPLD_QSFP56_MOD_INT_G1_REG;
+             break;
+        case CPLD_QSFP56_MOD_INT_G2:
+             reg = CPLD_QSFP56_MOD_INT_G2_REG;
+             break;
+        case CPLD_QSFPDD_MOD_INT:
+             reg = CPLD_QSFPDD_MOD_INT_REG;
+             break;
+        case CPLD_QSFP56_PRES_G0:
+             reg = CPLD_QSFP56_PRES_G0_REG;
+             break;
+        case CPLD_QSFP56_PRES_G1:
+             reg = CPLD_QSFP56_PRES_G1_REG;
+             break;
+        case CPLD_QSFP56_PRES_G2:
+             reg = CPLD_QSFP56_PRES_G2_REG;
+             break;
+        case CPLD_QSFPDD_PRES:
+             reg = CPLD_QSFPDD_PRES_REG;
+             break;
+        case CPLD_QSFP56_FUSE_INT_G0:
+             reg = CPLD_QSFP56_FUSE_INT_G0_REG;
+             break;
+        case CPLD_QSFP56_FUSE_INT_G1:
+             reg = CPLD_QSFP56_FUSE_INT_G1_REG;
+             break;
+        case CPLD_QSFP56_FUSE_INT_G2:
+             reg = CPLD_QSFP56_FUSE_INT_G2_REG;
+             break;
+        case CPLD_QSFPDD_FUSE_INT:
+             reg = CPLD_QSFPDD_FUSE_INT_REG;
+             break;
+        case CPLD_SFP_TXFAULT:
+             reg = CPLD_SFP_TXFAULT_REG;
+             break;
+        case CPLD_SFP_ABS:
+             reg = CPLD_SFP_ABS_REG;
+             break;
+        case CPLD_SFP_RXLOS:
+             reg = CPLD_SFP_RXLOS_REG;
+             break;
+        case CPLD_QSFP56_MOD_INT_MASK_G0:
+             reg = CPLD_QSFP56_MOD_INT_MASK_G0_REG;
+             break;
+        case CPLD_QSFP56_MOD_INT_MASK_G1:
+             reg = CPLD_QSFP56_MOD_INT_MASK_G1_REG;
+             break;
+        case CPLD_QSFP56_MOD_INT_MASK_G2:
+             reg = CPLD_QSFP56_MOD_INT_MASK_G2_REG;
+             break;
+        case CPLD_QSFPDD_MOD_INT_MASK:
+             reg = CPLD_QSFPDD_MOD_INT_MASK_REG;
+             break;
+        case CPLD_QSFP56_PRES_MASK_G0:
+             reg = CPLD_QSFP56_PRES_MASK_G0_REG;
+             break;
+        case CPLD_QSFP56_PRES_MASK_G1:
+             reg = CPLD_QSFP56_PRES_MASK_G1_REG;
+             break;
+        case CPLD_QSFP56_PRES_MASK_G2:
+             reg = CPLD_QSFP56_PRES_MASK_G2_REG;
+             break;
+        case CPLD_QSFPDD_PRES_MASK:
+             reg = CPLD_QSFPDD_PRES_MASK_REG;
+             break;
+        case CPLD_QSFP56_FUSE_INT_MASK_G0:
+             reg = CPLD_QSFP56_FUSE_INT_MASK_G0_REG;
+             break;
+        case CPLD_QSFP56_FUSE_INT_MASK_G1:
+             reg = CPLD_QSFP56_FUSE_INT_MASK_G1_REG;
+             break;
+        case CPLD_QSFP56_FUSE_INT_MASK_G2:
+             reg = CPLD_QSFP56_FUSE_INT_MASK_G2_REG;
+             break;
+        case CPLD_QSFPDD_FUSE_INT_MASK:
+             reg = CPLD_QSFPDD_FUSE_INT_MASK_REG;
+             break;
+        case CPLD_SFP_TXFAULT_MASK:
+             reg = CPLD_SFP_TXFAULT_MASK_REG;
+             break;
+        case CPLD_SFP_ABS_MASK:
+             reg = CPLD_SFP_ABS_MASK_REG;
+             break;
+        case CPLD_SFP_RXLOS_MASK:
+             reg = CPLD_SFP_RXLOS_MASK_REG;
+             break;
+        case CPLD_QSFP56_MOD_INT_EVENT_G0:
+             reg = CPLD_QSFP56_MOD_INT_EVENT_G0_REG;
+             break;
+        case CPLD_QSFP56_MOD_INT_EVENT_G1:
+             reg = CPLD_QSFP56_MOD_INT_EVENT_G1_REG;
+             break;
+        case CPLD_QSFP56_MOD_INT_EVENT_G2:
+             reg = CPLD_QSFP56_MOD_INT_EVENT_G2_REG;
+             break;
+        case CPLD_QSFPDD_MOD_INT_EVENT:
+             reg = CPLD_QSFPDD_MOD_INT_EVENT_REG;
+             break;
+        case CPLD_QSFP56_PRES_EVENT_G0:
+             reg = CPLD_QSFP56_PRES_EVENT_G0_REG;
+             break;
+        case CPLD_QSFP56_PRES_EVENT_G1:
+             reg = CPLD_QSFP56_PRES_EVENT_G1_REG;
+             break;
+        case CPLD_QSFP56_PRES_EVENT_G2:
+             reg = CPLD_QSFP56_PRES_EVENT_G2_REG;
+             break;
+        case CPLD_QSFPDD_PRES_EVENT:
+             reg = CPLD_QSFPDD_PRES_EVENT_REG;
+             break;
+        case CPLD_QSFP56_FUSE_INT_EVENT_G0:
+             reg = CPLD_QSFP56_FUSE_INT_EVENT_G0_REG;
+             break;
+        case CPLD_QSFP56_FUSE_INT_EVENT_G1:
+             reg = CPLD_QSFP56_FUSE_INT_EVENT_G1_REG;
+             break;
+        case CPLD_QSFP56_FUSE_INT_EVENT_G2:
+             reg = CPLD_QSFP56_FUSE_INT_EVENT_G2_REG;
+             break;
+        case CPLD_QSFPDD_FUSE_INT_EVENT:
+             reg = CPLD_QSFPDD_FUSE_INT_EVENT_REG;
+             break;
+        case CPLD_SFP_TXFAULT_EVENT:
+             reg = CPLD_SFP_TXFAULT_EVENT_REG;
+             break;
+        case CPLD_SFP_ABS_EVENT:
+             reg = CPLD_SFP_ABS_EVENT_REG;
+             break;
+        case CPLD_SFP_RXLOS_EVENT:
+             reg = CPLD_SFP_RXLOS_EVENT_REG;
+             break;
+        case CPLD_QSFP56_RESET_CTRL_G0:
+             reg = CPLD_QSFP56_RESET_CTRL_G0_REG;
+             break;
+        case CPLD_QSFP56_RESET_CTRL_G1:
+             reg = CPLD_QSFP56_RESET_CTRL_G1_REG;
+             break;
+        case CPLD_QSFP56_RESET_CTRL_G2:
+             reg = CPLD_QSFP56_RESET_CTRL_G2_REG;
+             break;
+        case CPLD_QSFPDD_RESET_CTRL:
+             reg = CPLD_QSFPDD_RESET_CTRL_REG;
+             break;
+        case CPLD_QSFP56_LP_MODE_G0:
+             reg = CPLD_QSFP56_LP_MODE_G0_REG;
+             break;
+        case CPLD_QSFP56_LP_MODE_G1:
+             reg = CPLD_QSFP56_LP_MODE_G1_REG;
+             break;
+        case CPLD_QSFP56_LP_MODE_G2:
+             reg = CPLD_QSFP56_LP_MODE_G2_REG;
+             break;
+        case CPLD_QSFPDD_LP_MODE:
+             reg = CPLD_QSFPDD_LP_MODE_REG;
+             break;
+        case CPLD_SFP_TX_DIS:
+             reg = CPLD_SFP_TX_DIS_REG;
+             break;
+        case CPLD_SFP_RS:
+             reg = CPLD_SFP_RS_REG;
+             break;
+        case CPLD_SFP_TS:
+             reg = CPLD_SFP_TS_REG;
+             break;
+        case CPLD_PORT_INT_STATUS:
+             reg = CPLD_PORT_INT_STATUS_REG;
+             break;
+        default:
+            return -EINVAL;
+    }
+    return read_cpld_reg(dev, buf, reg);
+}
+
+/* handle read for hw_rev attributes */
+static ssize_t read_hw_rev_cb(struct device *dev,
+        struct device_attribute *da, char *buf)
+{
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
+    u8 reg = CPLD_HW_REV_REG;
+    u8 reg_val = 0;
+    int errno = 0;
+    u8 res;
+
+    if(!read_cpld_reg_raw_byte(dev, reg, &reg_val, &errno))
+        return errno;
+
+    switch(attr->index) {
+        case CPLD_HW_REV:
+             HW_REV_GET(reg_val, res);
+             break;
+        case CPLD_DEPH_REV:
+             DEPH_REV_GET(reg_val, res);
+             break;
+        case CPLD_BUILD_REV:
+             BUILD_REV_GET(reg_val, res);
+             break;
+        case CPLD_ID_TYPE:
+             ID_TYPE_GET(reg_val, res);
+             break;
+        default:
+            return -EINVAL;
+    }
+    return sprintf(buf, "0x%02x\n", res);
+}
+
+/* handle read for cpld_version attributes */
+static ssize_t read_cpld_version_cb(struct device *dev,
+        struct device_attribute *da, char *buf)
+{
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
+    u8 reg = CPLD_VERSION_REG;
+    u8 reg_val = 0;
+    int errno = 0;
+    u8 res;
+
+    if(!read_cpld_reg_raw_byte(dev, reg, &reg_val, &errno))
+        return errno;
+
+    switch(attr->index) {
+        case CPLD_MAJOR_VER:
+             CPLD_MAJOR_VERSION_GET(reg_val, res);
+             break;
+        case CPLD_MINOR_VER:
+             CPLD_MINOR_VERSION_GET(reg_val, res);
+             break;
+        default:
+            return -EINVAL;
+    }
+    return sprintf(buf, "0x%02x\n", res);
+}
+
+/* handle read human-readable string for cpld_version attributes */
+static ssize_t read_cpld_version_h_cb(struct device *dev,
+        struct device_attribute *da, char *buf)
+{
+    u8 reg = CPLD_VERSION_REG;
+    u8 reg_val = 0;
+    int errno = 0;
+    u8 major, minor, build;
+
+    //get major/minor register value
+    if(!read_cpld_reg_raw_byte(dev, reg, &reg_val, &errno))
+        return errno;
+    CPLD_MAJOR_VERSION_GET(reg_val, major);
+    CPLD_MINOR_VERSION_GET(reg_val, minor);
+
+    //get build register value
+    reg = CPLD_BUILD_VER_REG;
+    if(!read_cpld_reg_raw_byte(dev, reg, &build, &errno))
+        return errno;
+
+    //version string format : xx.xx.xxx
+    return sprintf(buf, "%d.%02d.%03d\n", major, minor, build);
+}
+
+/* handle write for attributes */
+static ssize_t write_cpld_callback(struct device *dev,
+        struct device_attribute *da, const char *buf, size_t count)
+{
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
+    u8 reg = 0;
+
+    switch(attr->index) {
+        case CPLD_MAC_INTR_MASK:
+             reg = CPLD_MAC_INTR_MASK_REG;
+             break;
+        case CPLD_10G_PHY_INTR_MASK:
+             reg = CPLD_10G_PHY_INTR_MASK_REG;
+             break;
+        case CPLD_CPLD_FRU_INTR_MASK:
+             reg = CPLD_CPLD_FRU_INTR_MASK_REG;
+             break;
+        case CPLD_THERMAL_ALERT_INTR_MASK:
+             reg = CPLD_THERMAL_ALERT_INTR_MASK_REG;
+             break;
+        case CPLD_MISC_INTR_MASK:
+             reg = CPLD_MISC_INTR_MASK_REG;
+             break;
+        case CPLD_MAC_RST:
+             reg = CPLD_MAC_RST_REG;
+             break;
+        case CPLD_10G_PHY_RST:
+             reg = CPLD_10G_PHY_RST_REG;
+             break;
+        case CPLD_BMC_RST:
+             reg = CPLD_BMC_RST_REG;
+             break;
+        case CPLD_USB_RST:
+             reg = CPLD_USB_RST_REG;
+             break;
+        case CPLD_MUX_RST:
+             reg = CPLD_MUX_RST_REG;
+             break;
+        case CPLD_MISC_RST:
+             reg = CPLD_MISC_RST_REG;
+             break;
+        case CPLD_BMC_WATCHDOG:
+             reg = CPLD_BMC_WATCHDOG_REG;
+             break;
+        case CPLD_MUX_CTRL:
+             reg = CPLD_MUX_CTRL_REG;
+             break;
+        case CPLD_10GMUX_SEL:
+             reg = CPLD_10GMUX_SEL_REG;
+             break;
+        case CPLD_MAC_QSFP_SEL_CTRL:
+             reg = CPLD_MAC_QSFP_SEL_CTRL_REG;
+             break;
+        case CPLD_BEACON_LED_CTRL:
+             reg = CPLD_BEACON_LED_CTRL_REG;
+             break;
+        case CPLD_PORT_LED_CLR_CTRL:
+             reg = CPLD_PORT_LED_CLR_CTRL_REG;
+             break;
+        case CPLD_EVENT_DETECT_CTRL:
+             reg = CPLD_EVENT_DETECT_CTRL_REG;
+             break;
+        case CPLD_QSFP56_MOD_INT_MASK_G0:
+             reg = CPLD_QSFP56_MOD_INT_MASK_G0_REG;
+             break;
+        case CPLD_QSFP56_MOD_INT_MASK_G1:
+             reg = CPLD_QSFP56_MOD_INT_MASK_G1_REG;
+             break;
+        case CPLD_QSFP56_MOD_INT_MASK_G2:
+             reg = CPLD_QSFP56_MOD_INT_MASK_G2_REG;
+             break;
+        case CPLD_QSFPDD_MOD_INT_MASK:
+             reg = CPLD_QSFPDD_MOD_INT_MASK_REG;
+             break;
+        case CPLD_QSFP56_PRES_MASK_G0:
+             reg = CPLD_QSFP56_PRES_MASK_G0_REG;
+             break;
+        case CPLD_QSFP56_PRES_MASK_G1:
+             reg = CPLD_QSFP56_PRES_MASK_G1_REG;
+             break;
+        case CPLD_QSFP56_PRES_MASK_G2:
+             reg = CPLD_QSFP56_PRES_MASK_G2_REG;
+             break;
+        case CPLD_QSFPDD_PRES_MASK:
+             reg = CPLD_QSFPDD_PRES_MASK_REG;
+             break;
+        case CPLD_QSFP56_FUSE_INT_MASK_G0:
+             reg = CPLD_QSFP56_FUSE_INT_MASK_G0_REG;
+             break;
+        case CPLD_QSFP56_FUSE_INT_MASK_G1:
+             reg = CPLD_QSFP56_FUSE_INT_MASK_G1_REG;
+             break;
+        case CPLD_QSFP56_FUSE_INT_MASK_G2:
+             reg = CPLD_QSFP56_FUSE_INT_MASK_G2_REG;
+             break;
+        case CPLD_QSFPDD_FUSE_INT_MASK:
+             reg = CPLD_QSFPDD_FUSE_INT_MASK_REG;
+             break;
+        case CPLD_SFP_TXFAULT_MASK:
+             reg = CPLD_SFP_TXFAULT_MASK_REG;
+             break;
+        case CPLD_SFP_ABS_MASK:
+             reg = CPLD_SFP_ABS_MASK_REG;
+             break;
+        case CPLD_SFP_RXLOS_MASK:
+             reg = CPLD_SFP_RXLOS_MASK_REG;
+             break;
+        case CPLD_QSFP56_RESET_CTRL_G0:
+             reg = CPLD_QSFP56_RESET_CTRL_G0_REG;
+             break;
+        case CPLD_QSFP56_RESET_CTRL_G1:
+             reg = CPLD_QSFP56_RESET_CTRL_G1_REG;
+             break;
+        case CPLD_QSFP56_RESET_CTRL_G2:
+             reg = CPLD_QSFP56_RESET_CTRL_G2_REG;
+             break;
+        case CPLD_QSFPDD_RESET_CTRL:
+             reg = CPLD_QSFPDD_RESET_CTRL_REG;
+             break;
+        case CPLD_QSFP56_LP_MODE_G0:
+             reg = CPLD_QSFP56_LP_MODE_G0_REG;
+             break;
+        case CPLD_QSFP56_LP_MODE_G1:
+             reg = CPLD_QSFP56_LP_MODE_G1_REG;
+             break;
+        case CPLD_QSFP56_LP_MODE_G2:
+             reg = CPLD_QSFP56_LP_MODE_G2_REG;
+             break;
+        case CPLD_QSFPDD_LP_MODE:
+             reg = CPLD_QSFPDD_LP_MODE_REG;
+             break;
+        case CPLD_SFP_TX_DIS:
+             reg = CPLD_SFP_TX_DIS_REG;
+             break;
+        case CPLD_SFP_RS:
+             reg = CPLD_SFP_RS_REG;
+             break;
+        case CPLD_SFP_TS:
+             reg = CPLD_SFP_TS_REG;
+             break;
+        default:
+            return -EINVAL;
+    }
+    return write_cpld_reg(dev, buf, count, reg);
+}
+
+/* set cpld register value */
+static ssize_t write_cpld_reg(struct device *dev,
+                    const char *buf,
+                    size_t count,
+                    u8 reg)
+{
+    struct i2c_client *client = to_i2c_client(dev);
+    struct cpld_data *data = i2c_get_clientdata(client);
+    u8 reg_val;
+    int ret;
+
+    if(kstrtou8(buf, 0, &reg_val) < 0)
+        return -EINVAL;
+
+    I2C_WRITE_BYTE_DATA(ret, &data->access_lock,
+               client, reg, reg_val);
+
+    if(unlikely(ret < 0)) {
+        dev_err(dev, "I2C_WRITE_BYTE_DATA error, return=%d\n", ret);
+        return ret;
+    }
+
+    return count;
+}
+
+/* add valid cpld client to list */
+static void s9301_cpld_add_client(struct i2c_client *client)
+{
+    struct cpld_client_node *node = NULL;
+
+    node = kzalloc(sizeof(struct cpld_client_node), GFP_KERNEL);
+    if(!node) {
+        dev_info(&client->dev,
+            "Can't allocate cpld_client_node for index %d\n",
+            client->addr);
+        return;
+    }
+
+    node->client = client;
+
+    mutex_lock(&list_lock);
+    list_add(&node->list, &cpld_client_list);
+    mutex_unlock(&list_lock);
+}
+
+/* remove exist cpld client in list */
+static void s9301_cpld_remove_client(struct i2c_client *client)
+{
+    struct list_head    *list_node = NULL;
+    struct cpld_client_node *cpld_node = NULL;
+    int found = 0;
+
+    mutex_lock(&list_lock);
+    list_for_each(list_node, &cpld_client_list) {
+        cpld_node = list_entry(list_node,
+                struct cpld_client_node, list);
+
+        if(cpld_node->client == client) {
+            found = 1;
+            break;
+        }
+    }
+
+    if(found) {
+        list_del(list_node);
+        kfree(cpld_node);
+    }
+    mutex_unlock(&list_lock);
+}
+
+/* cpld drvier probe */
+static int s9301_cpld_probe(struct i2c_client *client,
+                    const struct i2c_device_id *dev_id)
+{
+    int status;
+    struct cpld_data *data = NULL;
+    int ret = -EPERM;
+    int idx;
+
+    data = kzalloc(sizeof(struct cpld_data), GFP_KERNEL);
+    if(!data)
+        return -ENOMEM;
+
+    /* init cpld data for client */
+    i2c_set_clientdata(client, data);
+    mutex_init(&data->access_lock);
+
+    if(!i2c_check_functionality(client->adapter,
+                I2C_FUNC_SMBUS_BYTE_DATA)) {
+        dev_info(&client->dev,
+            "i2c_check_functionality failed (0x%x)\n",
+            client->addr);
+        status = -EIO;
+        goto exit;
+    }
+
+    /* get cpld id from device */
+    ret = i2c_smbus_read_byte_data(client, CPLD_ID_REG);
+
+    if(ret < 0) {
+        dev_info(&client->dev,
+            "fail to get cpld id (0x%x) at addr (0x%x)\n",
+            CPLD_ID_REG, client->addr);
+        status = -EIO;
+        goto exit;
+    }
+
+    CPLD_ID_ID_GET(ret,  idx);
+
+    if(INVALID(idx, cpld1, cpld3)) {
+        dev_info(&client->dev,
+            "cpld id %d(device) not valid\n", idx);
+        //status = -EPERM;
+        //goto exit;
+    }
+
+    data->index = dev_id->driver_data;
+
+    /* register sysfs hooks for different cpld group */
+    dev_info(&client->dev, "probe cpld with index %d\n", data->index);
+    switch(data->index) {
+    case cpld1:
+        status = sysfs_create_group(&client->dev.kobj,
+                    &s9301_cpld1_group);
+        break;
+    case cpld2:
+        status = sysfs_create_group(&client->dev.kobj,
+                    &s9301_cpld2_group);
+        break;
+    case cpld3:
+        status = sysfs_create_group(&client->dev.kobj,
+                    &s9301_cpld3_group);
+        break;
+    default:
+        status = -EINVAL;
+    }
+
+    if(status)
+        goto exit;
+
+    dev_info(&client->dev, "chip found\n");
+
+    /* add probe chip to client list */
+    s9301_cpld_add_client(client);
+
+    return 0;
+exit:
+    switch(data->index) {
+    case cpld1:
+        sysfs_remove_group(&client->dev.kobj, &s9301_cpld1_group);
+        break;
+    case cpld2:
+        sysfs_remove_group(&client->dev.kobj, &s9301_cpld2_group);
+        break;
+    case cpld3:
+        sysfs_remove_group(&client->dev.kobj, &s9301_cpld3_group);
+        break;
+    default:
+        break;
+    }
+    return status;
+}
+
+/* cpld drvier remove */
+#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0)
+static int
+#else
+static void
+#endif
+s9301_cpld_remove(struct i2c_client *client)
+{
+    struct cpld_data *data = i2c_get_clientdata(client);
+
+    switch(data->index) {
+    case cpld1:
+        sysfs_remove_group(&client->dev.kobj, &s9301_cpld1_group);
+        break;
+    case cpld2:
+        sysfs_remove_group(&client->dev.kobj, &s9301_cpld2_group);
+        break;
+    case cpld3:
+        sysfs_remove_group(&client->dev.kobj, &s9301_cpld3_group);
+        break;
+    }
+
+    s9301_cpld_remove_client(client);
+#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0)
+    return 0;
+#endif
+}
+
+MODULE_DEVICE_TABLE(i2c, s9301_cpld_id);
+
+static struct i2c_driver s9301_cpld_driver = {
+    .class      = I2C_CLASS_HWMON,
+    .driver = {
+        .name = "x86_64_ufispace_s9301_32db_cpld",
+    },
+    .probe = s9301_cpld_probe,
+    .remove = s9301_cpld_remove,
+    .id_table = s9301_cpld_id,
+    .address_list = cpld_i2c_addr,
+};
+
+/* provide cpld register read */
+/* cpld_idx indicate the index of cpld device */
+int s9301_cpld_read(u8 cpld_idx,
+                u8 reg)
+{
+    struct list_head *list_node = NULL;
+    struct cpld_client_node *cpld_node = NULL;
+    int ret = -EPERM;
+    struct cpld_data *data;
+
+    list_for_each(list_node, &cpld_client_list) {
+        cpld_node = list_entry(list_node,
+                    struct cpld_client_node, list);
+        data = i2c_get_clientdata(cpld_node->client);
+        if(data->index == cpld_idx) {
+            DEBUG_PRINT("cpld_idx=%d, read reg 0x%02x",
+                    cpld_idx, reg);
+            I2C_READ_BYTE_DATA(ret, &data->access_lock,
+                    cpld_node->client, reg);
+            DEBUG_PRINT("cpld_idx=%d, read reg 0x%02x = 0x%02x",
+                    cpld_idx, reg, ret);
+        break;
+        }
+    }
+
+    return ret;
+}
+EXPORT_SYMBOL(s9301_cpld_read);
+
+/* provide cpld register write */
+/* cpld_idx indicate the index of cpld device */
+int s9301_cpld_write(u8 cpld_idx,
+                u8 reg,
+                u8 value)
+{
+    struct list_head *list_node = NULL;
+    struct cpld_client_node *cpld_node = NULL;
+    int ret = -EIO;
+    struct cpld_data *data;
+
+    list_for_each(list_node, &cpld_client_list) {
+        cpld_node = list_entry(list_node,
+                    struct cpld_client_node, list);
+        data = i2c_get_clientdata(cpld_node->client);
+
+        if(data->index == cpld_idx) {
+                        I2C_WRITE_BYTE_DATA(ret, &data->access_lock,
+                        cpld_node->client,
+                        reg, value);
+            DEBUG_PRINT("cpld_idx=%d, write reg 0x%02x val 0x%02x, ret=%d",
+                            cpld_idx, reg, value, ret);
+            break;
+        }
+    }
+
+    return ret;
+}
+EXPORT_SYMBOL(s9301_cpld_write);
+
+static int __init s9301_cpld_init(void)
+{
+    mutex_init(&list_lock);
+    return i2c_add_driver(&s9301_cpld_driver);
+}
+
+static void __exit s9301_cpld_exit(void)
+{
+    i2c_del_driver(&s9301_cpld_driver);
+}
+
+MODULE_AUTHOR("Leo Lin <leo.yt.lin@ufispace.com>");
+MODULE_DESCRIPTION("x86_64_ufispace_s9301_cpld driver");
+MODULE_LICENSE("GPL");
+
+module_init(s9301_cpld_init);
+module_exit(s9301_cpld_exit);
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/modules/x86-64-ufispace-s9301-32db-cpld.h b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/modules/x86-64-ufispace-s9301-32db-cpld.h
new file mode 100644
index 000000000..2022a1301
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/modules/x86-64-ufispace-s9301-32db-cpld.h
@@ -0,0 +1,256 @@
+/* header file for i2c cpld driver of ufispace_s9301_32db
+ *
+ * Copyright (C) 2017 UfiSpace Technology Corporation.
+ * Leo Lin <leo.yt.lin@ufispace.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef UFISPACE_S9301_I2C_CPLD_H
+#define UFISPACE_S9301_I2C_CPLD_H
+
+/* CPLD device index value */
+enum cpld_id {
+    cpld1,
+    cpld2,
+    cpld3,
+};
+
+enum LED_BLINK {
+    NOBLINK,
+    BLINK,
+};
+
+enum LED_BLINK_SPEED {
+    BLINK_1X,  //0.5hz
+    BLINK_4X,  //2hz
+};
+
+enum LED_STATUS {
+    OFF,
+    ON,
+};
+
+enum LED_YELLOW {
+    YELLOW_OFF,
+    YELLOW_ON,
+};
+
+enum LED_GREEN {
+    GREEN_OFF,
+    GREEN_ON,
+};
+
+/* QSFP56 port number */
+#define QSFP56_MAX_PORT_NUM   24
+#define QSFP56_MIN_PORT_NUM   1
+
+/* QSFPDD port number */
+#define QSFPDD_MAX_PORT_NUM   8
+#define QSFPDD_MIN_PORT_NUM   1
+
+/* SFP+ port number */
+#define SFP_MAX_PORT_NUM    4
+#define SFP_MIN_PORT_NUM    1
+
+
+/* CPLD registers */
+/* CPLD 1 */
+#define CPLD_SKU_ID_REG                     0x00
+#define CPLD_HW_REV_REG                     0x01
+#define CPLD_VERSION_REG                    0x02
+#define CPLD_ID_REG                         0x03
+#define CPLD_BUILD_VER_REG                  0x04
+//Interrupt status
+#define CPLD_MAC_INTR_REG                   0x10
+#define CPLD_10G_PHY_INTR_REG               0x13
+#define CPLD_CPLD_FRU_INTR_REG              0x14
+#define CPLD_THERMAL_ALERT_INTR_REG         0x16
+#define CPLD_MISC_INTR_REG                  0x1B
+#define CPLD_SYSTEM_INTR_REG                0x1D
+//Interrupt mask
+#define CPLD_MAC_INTR_MASK_REG              0x20
+#define CPLD_10G_PHY_INTR_MASK_REG          0x23
+#define CPLD_CPLD_FRU_INTR_MASK_REG         0x24
+#define CPLD_THERMAL_ALERT_INTR_MASK_REG    0x26
+#define CPLD_MISC_INTR_MASK_REG             0x2B
+//Interrupt event
+#define CPLD_MAC_INTR_EVENT_REG             0x30
+#define CPLD_10G_PHY_INTR_EVENT_REG         0x33
+#define CPLD_CPLD_FRU_INTR_EVENT_REG        0x14
+#define CPLD_THERMAL_ALERT_INTR_EVENT_REG   0x16
+#define CPLD_MISC_INTR_EVENT_REG            0x1B
+//Reset ctrl
+#define CPLD_MAC_RST_REG                    0x40
+#define CPLD_10G_PHY_RST_REG                0x42
+#define CPLD_BMC_RST_REG                    0x43
+#define CPLD_USB_RST_REG                    0x44
+#define CPLD_MUX_RST_REG                    0x46
+#define CPLD_MISC_RST_REG                   0x48
+#define CPLD_BMC_WATCHDOG_REG               0x4D
+//Sys status
+#define CPLD_DAU_BD_PRES_REG                0x50
+#define CPLD_PSU_STATUS_REG                 0x51
+#define CPLD_SYS_PW_STATUS_REG              0x52
+#define CPLD_MISC_REG                       0x5B
+//Mux ctrl
+#define CPLD_MUX_CTRL_REG                   0x5C
+#define CPLD_10GMUX_SEL_REG                 0x5E
+#define CPLD_MAC_QSFP_SEL_CTRL_REG          0x5F
+//Led ctrl
+#define CPLD_SYS_LED_CTRL_1_REG             0x80
+#define CPLD_SYS_LED_CTRL_2_REG             0x81
+#define CPLD_BEACON_LED_CTRL_REG            0x84
+#define CPLD_PORT_LED_CLR_CTRL_REG          0x85
+//Event Detect Ctrl
+#define CPLD_EVENT_DETECT_CTRL_REG          0x5D
+
+/* CPLD 2 */
+/*  QSFP56 G0 - port 0 ~ 7
+    QSFP56 G1 - port 8 ~ 15
+    QSFP56 G2 - port 16 ~ 23
+    QSFPDD    - port 24 ~ 31
+ */
+//Interrupt status
+#define CPLD_QSFP56_MOD_INT_G0_REG          0x10
+#define CPLD_QSFP56_MOD_INT_G1_REG          0x11
+#define CPLD_QSFP56_MOD_INT_G2_REG          0x12
+#define CPLD_QSFPDD_MOD_INT_REG             0x13
+#define CPLD_QSFP56_PRES_G0_REG             0x14
+#define CPLD_QSFP56_PRES_G1_REG             0x15
+#define CPLD_QSFP56_PRES_G2_REG             0x16
+#define CPLD_QSFPDD_PRES_REG                0x17
+#define CPLD_QSFP56_FUSE_INT_G0_REG         0x18
+#define CPLD_QSFP56_FUSE_INT_G1_REG         0x19
+#define CPLD_QSFP56_FUSE_INT_G2_REG         0x1A
+#define CPLD_QSFPDD_FUSE_INT_REG            0x1B
+#define CPLD_SFP_TXFAULT_REG                0x1D
+#define CPLD_SFP_ABS_REG                    0x1E
+#define CPLD_SFP_RXLOS_REG                  0x1F
+//Interrupt mask
+#define CPLD_QSFP56_MOD_INT_MASK_G0_REG     0x20
+#define CPLD_QSFP56_MOD_INT_MASK_G1_REG     0x21
+#define CPLD_QSFP56_MOD_INT_MASK_G2_REG     0x22
+#define CPLD_QSFPDD_MOD_INT_MASK_REG        0x23
+#define CPLD_QSFP56_PRES_MASK_G0_REG        0x24
+#define CPLD_QSFP56_PRES_MASK_G1_REG        0x25
+#define CPLD_QSFP56_PRES_MASK_G2_REG        0x26
+#define CPLD_QSFPDD_PRES_MASK_REG           0x27
+#define CPLD_QSFP56_FUSE_INT_MASK_G0_REG    0x28
+#define CPLD_QSFP56_FUSE_INT_MASK_G1_REG    0x29
+#define CPLD_QSFP56_FUSE_INT_MASK_G2_REG    0x2A
+#define CPLD_QSFPDD_FUSE_INT_MASK_REG       0x2B
+#define CPLD_SFP_TXFAULT_MASK_REG           0x2D
+#define CPLD_SFP_ABS_MASK_REG               0x2E
+#define CPLD_SFP_RXLOS_MASK_REG             0x2F
+//Interrupt event
+#define CPLD_QSFP56_MOD_INT_EVENT_G0_REG    0x30
+#define CPLD_QSFP56_MOD_INT_EVENT_G1_REG    0x31
+#define CPLD_QSFP56_MOD_INT_EVENT_G2_REG    0x32
+#define CPLD_QSFPDD_MOD_INT_EVENT_REG       0x33
+#define CPLD_QSFP56_PRES_EVENT_G0_REG       0x34
+#define CPLD_QSFP56_PRES_EVENT_G1_REG       0x35
+#define CPLD_QSFP56_PRES_EVENT_G2_REG       0x36
+#define CPLD_QSFPDD_PRES_EVENT_REG          0x37
+#define CPLD_QSFP56_FUSE_INT_EVENT_G0_REG   0x38
+#define CPLD_QSFP56_FUSE_INT_EVENT_G1_REG   0x39
+#define CPLD_QSFP56_FUSE_INT_EVENT_G2_REG   0x3A
+#define CPLD_QSFPDD_FUSE_INT_EVENT_REG      0x3B
+#define CPLD_SFP_TXFAULT_EVENT_REG          0x3D
+#define CPLD_SFP_ABS_EVENT_REG              0x3E
+#define CPLD_SFP_RXLOS_EVENT_REG            0x3F
+//Port ctrl
+#define CPLD_QSFP56_RESET_CTRL_G0_REG       0x40
+#define CPLD_QSFP56_RESET_CTRL_G1_REG       0x41
+#define CPLD_QSFP56_RESET_CTRL_G2_REG       0x42
+#define CPLD_QSFPDD_RESET_CTRL_REG          0x43
+#define CPLD_QSFP56_LP_MODE_G0_REG          0x44
+#define CPLD_QSFP56_LP_MODE_G1_REG          0x45
+#define CPLD_QSFP56_LP_MODE_G2_REG          0x46
+#define CPLD_QSFPDD_LP_MODE_REG             0x47
+#define CPLD_SFP_TX_DIS_REG                 0x55
+#define CPLD_SFP_RS_REG                     0x56
+#define CPLD_SFP_TS_REG                     0x57
+//Port status
+#define CPLD_PORT_INT_STATUS_REG            0x58
+
+
+/* bit field structure for register value */
+struct cpld_reg_sku_id_t {
+    u8 model_id:8;
+};
+
+struct cpld_reg_hw_rev_t {
+    u8 hw_rev:2;
+    u8 deph_rev:1;
+    u8 build_rev:3;
+    u8 reserved:1;
+    u8 id_type:1;
+};
+
+struct cpld_reg_version_t {
+    u8 minor:6;
+    u8 major:2;
+};
+
+struct cpld_reg_id_t {
+    u8 id:3;
+    u8 release:5;
+};
+
+struct cpld_reg_beacon_led_ctrl_t {
+    u8 reserve:5;
+    u8 speed:1;
+    u8 blink:1;
+    u8 onoff:1;
+};
+
+/* common manipulation */
+#define INVALID(i, min, max)    ((i < min) || (i > max) ? 1u : 0u)
+#define READ_BIT(val, bit)      ((0u == (val & (1<<bit))) ? 0u : 1u)
+#define SET_BIT(val, bit)       (val |= (1 << bit))
+#define CLEAR_BIT(val, bit)     (val &= ~(1 << bit))
+#define TOGGLE_BIT(val, bit)    (val ^= (1 << bit))
+#define _BIT(n)                 (1<<(n))
+#define _BIT_MASK(len)          (BIT(len)-1)
+
+/* bitfield of register manipulation */
+#define READ_BF(bf_struct, val, bf_name, bf_value) \
+    (bf_value = ((struct bf_struct *)&val)->bf_name)
+#define READ_BF_1(bf_struct, val, bf_name, bf_value) \
+    bf_struct bf; \
+    bf.data = val; \
+    bf_value = bf.bf_name
+#define HW_REV_GET(val, res) \
+    READ_BF(cpld_reg_hw_rev_t, val, hw_rev, res)
+#define DEPH_REV_GET(val, res) \
+    READ_BF(cpld_reg_hw_rev_t, val, deph_rev, res)
+#define BUILD_REV_GET(val, res) \
+    READ_BF(cpld_reg_hw_rev_t, val, build_rev, res)
+#define ID_TYPE_GET(val, res) \
+    READ_BF(cpld_reg_hw_rev_t, val, id_type, res)
+#define CPLD_MAJOR_VERSION_GET(val, res) \
+    READ_BF(cpld_reg_version_t, val, major, res)
+#define CPLD_MINOR_VERSION_GET(val, res) \
+    READ_BF(cpld_reg_version_t, val, minor, res)
+#define CPLD_ID_ID_GET(val, res) \
+    READ_BF(cpld_reg_id_t, val, id, res)
+
+/* CPLD access functions */
+extern int s9301_cpld_read(u8 cpld_idx, u8 reg);
+extern int s9301_cpld_write(u8 cpld_idx, u8 reg, u8 value);
+
+#endif
+
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/modules/x86-64-ufispace-s9301-32db-lpc.c b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/modules/x86-64-ufispace-s9301-32db-lpc.c
new file mode 100644
index 000000000..01801b6c8
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/modules/x86-64-ufispace-s9301-32db-lpc.c
@@ -0,0 +1,850 @@
+/*
+ * A lpc driver for the ufispace_s9301_32db
+ *
+ * Copyright (C) 2017-2020 UfiSpace Technology Corporation.
+ * Jason Tsai <jason.cy.tsai@ufispace.com>
+ *
+ * Based on ad7414.c
+ * Copyright 2006 Stefan Roese <sr at denx.de>, DENX Software Engineering
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#include <linux/module.h>
+#include <linux/delay.h>
+#include <linux/io.h>
+#include <linux/platform_device.h>
+#include <linux/hwmon-sysfs.h>
+
+#define BSP_LOG_R(fmt, args...) \
+    _bsp_log (LOG_READ, KERN_INFO "%s:%s[%d]: " fmt "\r\n", \
+            __FILE__, __func__, __LINE__, ##args)
+#define BSP_LOG_W(fmt, args...) \
+    _bsp_log (LOG_WRITE, KERN_INFO "%s:%s[%d]: " fmt "\r\n", \
+            __FILE__, __func__, __LINE__, ##args)
+
+#define BSP_PR(level, fmt, args...) _bsp_log (LOG_SYS, level "[BSP]" fmt "\r\n", ##args)
+
+#define DRIVER_NAME "x86_64_ufispace_s9301_32db_lpc"
+#define CPU_BDE 0
+#define CPU_SKY 1
+#define CPU_TYPE CPU_SKY
+
+/* LPC registers */
+
+#define REG_BASE_CPU                      0x600
+
+#if CPU_TYPE == CPU_SKY
+#define REG_BASE_MB                       0xE00
+#define REG_BASE_I2C_ALERT                0x700
+#else
+#define REG_BASE_MB                       0x700
+#define REG_BASE_I2C_ALERT                0xF000
+#endif
+
+//CPU CPLD
+#define REG_CPU_CPLD_VERSION              (REG_BASE_CPU + 0x00)
+#define REG_CPU_STATUS_0                  (REG_BASE_CPU + 0x01)
+#define REG_CPU_STATUS_1                  (REG_BASE_CPU + 0x02)
+#define REG_CPU_CTRL_0                    (REG_BASE_CPU + 0x03)
+#define REG_CPU_CTRL_1                    (REG_BASE_CPU + 0x04)
+#define REG_CPU_CPLD_BUILD                (REG_BASE_CPU + 0xE0)
+
+//MB CPLD
+//TBD, need to change after CPLD spec release
+#define REG_MB_BRD_ID_0                   (REG_BASE_MB + 0x00)
+#define REG_MB_BRD_ID_1                   (REG_BASE_MB + 0x01)
+#define REG_MB_CPLD_VERSION               (REG_BASE_MB + 0x02)
+#define REG_MB_CPLD_BUILD                 (REG_BASE_MB + 0x04)
+#define REG_MB_MUX_RESET                  (REG_BASE_MB + 0x46)
+#define REG_MB_MUX_CTRL                   (REG_BASE_MB + 0x5c)
+
+//I2C Alert
+#if CPU_TYPE == CPU_SKY
+#define REG_ALERT_STATUS                  (REG_BASE_I2C_ALERT + 0x80)
+#else
+#define REG_ALERT_STATUS                  (REG_BASE_I2C_ALERT + 0x00)
+#define REG_ALERT_DISABLE                 (REG_BASE_I2C_ALERT + 0x11)
+#endif
+
+#define MASK_ALL                          (0xFF)
+#define LPC_MDELAY                        (5)
+
+/* LPC sysfs attributes index  */
+enum lpc_sysfs_attributes {
+    //CPU CPLD
+    ATT_CPU_CPLD_VERSION,
+    ATT_CPU_CPLD_VERSION_H,
+    ATT_CPU_BIOS_BOOT_ROM,
+    ATT_CPU_BIOS_BOOT_CFG,
+    ATT_CPU_CPLD_BUILD,
+    //MB CPLD
+    ATT_MB_BRD_ID_0,
+    ATT_MB_BRD_ID_1,
+    ATT_MB_CPLD_1_VERSION,
+    ATT_MB_CPLD_1_VERSION_H,
+    ATT_MB_CPLD_1_BUILD,
+    ATT_MB_MUX_CTRL,
+    ATT_MB_MUX_RESET,
+    ATT_MB_BRD_SKU_ID,
+    ATT_MB_BRD_HW_ID,
+    ATT_MB_BRD_ID_TYPE,
+    ATT_MB_BRD_BUILD_ID,
+    ATT_MB_BRD_DEPH_ID,
+    //I2C Alert
+    ATT_ALERT_STATUS,
+#if CPU_TYPE == CPU_BDE
+    ATT_ALERT_DISABLE,
+#endif
+    //BSP
+    ATT_BSP_VERSION,
+    ATT_BSP_DEBUG,
+    ATT_BSP_PR_INFO,
+    ATT_BSP_PR_ERR,
+    ATT_BSP_REG,
+    ATT_MAX
+};
+
+enum bsp_log_types {
+    LOG_NONE,
+    LOG_RW,
+    LOG_READ,
+    LOG_WRITE,
+    LOG_SYS
+};
+
+enum bsp_log_ctrl {
+    LOG_DISABLE,
+    LOG_ENABLE
+};
+
+struct lpc_data_s {
+    struct mutex    access_lock;
+};
+
+struct lpc_data_s *lpc_data;
+char bsp_version[16]="";
+char bsp_debug[2]="0";
+char bsp_reg[8]="0x0";
+u8 enable_log_read=LOG_DISABLE;
+u8 enable_log_write=LOG_DISABLE;
+u8 enable_log_sys=LOG_ENABLE;
+
+/* reg shift */
+static u8 _shift(u8 mask)
+{
+    int i=0, mask_one=1;
+
+    for(i=0; i<8; ++i) {
+        if((mask & mask_one) == 1)
+            return i;
+        else
+            mask >>= 1;
+    }
+
+    return -1;
+}
+
+/* reg mask and shift */
+static u8 _mask_shift(u8 val, u8 mask)
+{
+    int shift=0;
+
+    shift = _shift(mask);
+
+    return (val & mask) >> shift;
+}
+
+static u8 _bit_operation(u8 reg_val, u8 bit, u8 bit_val)
+{
+    if(bit_val == 0)
+        reg_val = reg_val & ~(1 << bit);
+    else
+        reg_val = reg_val | (1 << bit);
+    return reg_val;
+}
+
+static int _bsp_log(u8 log_type, char *fmt, ...)
+{
+    if((log_type==LOG_READ  && enable_log_read) ||
+        (log_type==LOG_WRITE && enable_log_write) ||
+        (log_type==LOG_SYS && enable_log_sys) ) {
+        va_list args;
+        int r;
+
+        va_start(args, fmt);
+        r = vprintk(fmt, args);
+        va_end(args);
+
+        return r;
+    } else {
+        return 0;
+    }
+}
+
+static int _config_bsp_log(u8 log_type)
+{
+    switch(log_type) {
+        case LOG_NONE:
+            enable_log_read = LOG_DISABLE;
+            enable_log_write = LOG_DISABLE;
+            break;
+        case LOG_RW:
+            enable_log_read = LOG_ENABLE;
+            enable_log_write = LOG_ENABLE;
+            break;
+        case LOG_READ:
+            enable_log_read = LOG_ENABLE;
+            enable_log_write = LOG_DISABLE;
+            break;
+        case LOG_WRITE:
+            enable_log_read = LOG_DISABLE;
+            enable_log_write = LOG_ENABLE;
+            break;
+        default:
+            return -EINVAL;
+    }
+    return 0;
+}
+
+/* get lpc register value */
+static u8 _read_lpc_reg(u16 reg, u8 mask)
+{
+    u8 reg_val;
+
+    mutex_lock(&lpc_data->access_lock);
+    reg_val=_mask_shift(inb(reg), mask);
+    mutex_unlock(&lpc_data->access_lock);
+
+    BSP_LOG_R("reg=0x%03x, reg_val=0x%02x", reg, reg_val);
+
+    return reg_val;
+}
+
+/* get lpc register value */
+static ssize_t read_lpc_reg(u16 reg, u8 mask, char *buf)
+{
+    u8 reg_val;
+    int len=0;
+
+    reg_val = _read_lpc_reg(reg, mask);
+    len=sprintf(buf,"0x%x\n", reg_val);
+
+    return len;
+}
+
+/* set lpc register value */
+static ssize_t write_lpc_reg(u16 reg, u8 mask, const char *buf, size_t count)
+{
+    u8 reg_val, reg_val_now, shift;
+
+    if(kstrtou8(buf, 0, &reg_val) < 0)
+        return -EINVAL;
+
+    //apply SINGLE BIT operation if mask is specified, multiple bits are not supported
+    if(mask != MASK_ALL) {
+        reg_val_now = _read_lpc_reg(reg, 0x0);
+        shift = _shift(mask);
+        reg_val = _bit_operation(reg_val_now, shift, reg_val);
+    }
+
+    mutex_lock(&lpc_data->access_lock);
+
+    outb(reg_val, reg);
+    mdelay(LPC_MDELAY);
+
+    mutex_unlock(&lpc_data->access_lock);
+
+    BSP_LOG_W("reg=0x%03x, reg_val=0x%02x", reg, reg_val);
+
+    return count;
+}
+
+/* get bsp value */
+static ssize_t read_bsp(char *buf, char *str)
+{
+    ssize_t len=0;
+
+    mutex_lock(&lpc_data->access_lock);
+    len=sprintf(buf, "%s", str);
+    mutex_unlock(&lpc_data->access_lock);
+
+    BSP_LOG_R("reg_val=%s", str);
+
+    return len;
+}
+
+/* set bsp value */
+static ssize_t write_bsp(const char *buf, char *str, size_t str_len, size_t count)
+{
+    mutex_lock(&lpc_data->access_lock);
+    snprintf(str, str_len, "%s", buf);
+    mutex_unlock(&lpc_data->access_lock);
+
+    BSP_LOG_W("reg_val=%s", str);
+
+    return count;
+}
+
+/* get cpu cpld version in human readable format */
+static ssize_t read_cpu_cpld_version_h(struct device *dev,
+        struct device_attribute *da, char *buf)
+{
+    ssize_t len=0;
+    u16 reg = REG_CPU_CPLD_VERSION;
+    u8 mask = MASK_ALL;
+    u8 mask_major = 0b11000000;
+    u8 mask_minor = 0b00111111;
+    u8 reg_val;
+    u8 major, minor, build;
+
+    mutex_lock(&lpc_data->access_lock);
+    reg_val = _mask_shift(inb(reg), mask);
+    major = _mask_shift(reg_val, mask_major);
+    minor = _mask_shift(reg_val, mask_minor);
+    reg = REG_CPU_CPLD_BUILD;
+    build = _mask_shift(inb(reg), mask);
+    len = sprintf(buf, "%d.%02d.%03d\n", major, minor, build);
+    mutex_unlock(&lpc_data->access_lock);
+
+    BSP_LOG_R("reg=0x%03x, reg_val=0x%02x", reg, reg_val);
+
+    return len;
+}
+
+/* get mb cpld version in human readable format */
+static ssize_t read_mb_cpld_1_version_h(struct device *dev,
+        struct device_attribute *da, char *buf)
+{
+    ssize_t len=0;
+    u16 reg = REG_MB_CPLD_VERSION;
+    u8 mask = MASK_ALL;
+    u8 mask_major = 0b11000000;
+    u8 mask_minor = 0b00111111;
+    u8 reg_val;
+    u8 major, minor, build;
+
+    mutex_lock(&lpc_data->access_lock);
+    reg_val = _mask_shift(inb(reg), mask);
+    major = _mask_shift(reg_val, mask_major);
+    minor = _mask_shift(reg_val, mask_minor);
+    reg = REG_MB_CPLD_BUILD;
+    build = _mask_shift(inb(reg), mask);
+    len = sprintf(buf, "%d.%02d.%03d\n", major, minor, build);
+    mutex_unlock(&lpc_data->access_lock);
+
+    BSP_LOG_R("reg=0x%03x, reg_val=0x%02x", reg, reg_val);
+
+    return len;
+}
+
+/* get mux_reset register value */
+static ssize_t read_mux_reset_callback(struct device *dev,
+        struct device_attribute *da, char *buf)
+{
+    int len = 0;
+    u16 reg = REG_MB_MUX_RESET;
+    u8 mask = 0b00011111;
+    u8 reg_val;
+
+    mutex_lock(&lpc_data->access_lock);
+    reg_val=_mask_shift(inb(reg), mask);
+    BSP_LOG_R("reg=0x%03x, reg_val=0x%02x", reg, reg_val);
+    len=sprintf(buf, "%d\n", reg_val);
+    mutex_unlock(&lpc_data->access_lock);
+
+    return len;
+}
+
+/* set mux_reset register value */
+static ssize_t write_mux_reset_callback(struct device *dev,
+        struct device_attribute *da, const char *buf, size_t count)
+{
+    u8 val = 0;
+    u16 reg = REG_MB_MUX_RESET;
+    u8 reg_val = 0;
+    u8 mask = 0b00011111;
+    static int mux_reset_flag = 0;
+
+    if(kstrtou8(buf, 0, &val) < 0)
+        return -EINVAL;
+
+    if(mux_reset_flag == 0) {
+        if(val == 0) {
+            mutex_lock(&lpc_data->access_lock);
+            mux_reset_flag = 1;
+            BSP_LOG_W("i2c mux reset is triggered...");
+
+            reg_val = inb(reg);
+            outb((reg_val & ~mask), reg);
+            mdelay(LPC_MDELAY);
+            BSP_LOG_W("reg=0x%03x, reg_val=0x%02x", reg, reg_val & ~mask);
+            mdelay(500);
+            outb((reg_val | mask), reg);
+            mdelay(LPC_MDELAY);
+            BSP_LOG_W("reg=0x%03x, reg_val=0x%02x", reg, reg_val | mask);
+            mdelay(500);
+            mux_reset_flag = 0;
+            mutex_unlock(&lpc_data->access_lock);
+        } else {
+            return -EINVAL;
+        }
+    } else {
+        BSP_LOG_W("i2c mux is resetting... (ignore)");
+        mutex_lock(&lpc_data->access_lock);
+        mutex_unlock(&lpc_data->access_lock);
+    }
+
+    return count;
+}
+
+/* get lpc register value */
+static ssize_t read_lpc_callback(struct device *dev,
+        struct device_attribute *da, char *buf)
+{
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
+    u16 reg = 0;
+    u8 mask = MASK_ALL;
+
+    switch(attr->index) {
+        //CPU CPLD
+        case ATT_CPU_CPLD_VERSION:
+            reg = REG_CPU_CPLD_VERSION;
+            break;
+        case ATT_CPU_BIOS_BOOT_ROM:
+            reg = REG_CPU_STATUS_1;
+            mask = 0x80;
+            break;
+        case ATT_CPU_BIOS_BOOT_CFG:
+            reg = REG_CPU_CTRL_1;
+            mask = 0x80;
+            break;
+        case ATT_CPU_CPLD_BUILD:
+            reg = REG_CPU_CPLD_BUILD;
+            break;
+        //MB CPLD
+        case ATT_MB_BRD_ID_0:
+            reg = REG_MB_BRD_ID_0;
+            break;
+        case ATT_MB_BRD_ID_1:
+            reg = REG_MB_BRD_ID_1;
+            break;
+        case ATT_MB_CPLD_1_VERSION:
+            reg = REG_MB_CPLD_VERSION;
+            break;
+        case ATT_MB_CPLD_1_BUILD:
+            reg = REG_MB_CPLD_BUILD;
+            break;
+        case ATT_MB_BRD_SKU_ID:
+            reg = REG_MB_BRD_ID_0;
+            mask = 0xFF;
+            break;
+        case ATT_MB_BRD_HW_ID:
+            reg = REG_MB_BRD_ID_1;
+            mask = 0x03;
+            break;
+        case ATT_MB_BRD_ID_TYPE:
+            reg = REG_MB_BRD_ID_1;
+            mask = 0x80;
+            break;
+        case ATT_MB_BRD_BUILD_ID:
+            reg = REG_MB_BRD_ID_1;
+            mask = 0x38;
+            break;
+        case ATT_MB_BRD_DEPH_ID:
+            reg = REG_MB_BRD_ID_1;
+            mask = 0x04;
+            break;
+        case ATT_MB_MUX_CTRL:
+            reg = REG_MB_MUX_CTRL;
+            break;
+        //I2C Alert
+        case ATT_ALERT_STATUS:
+            reg = REG_ALERT_STATUS;
+            mask = 0x20;
+            break;
+#if CPU_TYPE == CPU_BDE
+        case ATT_ALERT_DISABLE:
+            reg = REG_ALERT_DISABLE;
+            mask = 0x04;
+            break;
+#endif
+        //BSP
+        case ATT_BSP_REG:
+            if(kstrtou16(bsp_reg, 0, &reg) < 0)
+                return -EINVAL;
+            break;
+        default:
+            return -EINVAL;
+    }
+    return read_lpc_reg(reg, mask, buf);
+}
+
+/* set lpc register value */
+static ssize_t write_lpc_callback(struct device *dev,
+        struct device_attribute *da, const char *buf, size_t count)
+{
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
+    u16 reg = 0;
+    u8 mask = MASK_ALL;
+
+    switch(attr->index) {
+        case ATT_MB_MUX_CTRL:
+            reg = REG_MB_MUX_CTRL;
+            break;
+        default:
+            return -EINVAL;
+    }
+    return write_lpc_reg(reg, mask, buf, count);
+}
+
+/* get bsp parameter value */
+static ssize_t read_bsp_callback(struct device *dev,
+        struct device_attribute *da, char *buf)
+{
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
+    int str_len=0;
+    char *str=NULL;
+
+    switch(attr->index) {
+        case ATT_BSP_VERSION:
+            str = bsp_version;
+            str_len = sizeof(bsp_version);
+            break;
+        case ATT_BSP_DEBUG:
+            str = bsp_debug;
+            str_len = sizeof(bsp_debug);
+            break;
+        case ATT_BSP_REG:
+            str = bsp_reg;
+            str_len = sizeof(bsp_reg);
+            break;
+        default:
+            return -EINVAL;
+    }
+    return read_bsp(buf, str);
+}
+
+/* set bsp parameter value */
+static ssize_t write_bsp_callback(struct device *dev,
+        struct device_attribute *da, const char *buf, size_t count)
+{
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
+    int str_len=0;
+    char *str=NULL;
+    u16 reg = 0;
+    u8 bsp_debug_u8 = 0;
+
+    switch(attr->index) {
+        case ATT_BSP_VERSION:
+            str = bsp_version;
+            str_len = sizeof(bsp_version);
+            break;
+        case ATT_BSP_DEBUG:
+            str = bsp_debug;
+            str_len = sizeof(bsp_debug);
+            break;
+        case ATT_BSP_REG:
+            if(kstrtou16(buf, 0, &reg) < 0)
+                return -EINVAL;
+
+            str = bsp_reg;
+            str_len = sizeof(bsp_reg);
+            break;
+        default:
+            return -EINVAL;
+    }
+
+    if(attr->index == ATT_BSP_DEBUG) {
+        if(kstrtou8(buf, 0, &bsp_debug_u8) < 0) {
+            return -EINVAL;
+        } else if(_config_bsp_log(bsp_debug_u8) < 0) {
+            return -EINVAL;
+        }
+    }
+
+    return write_bsp(buf, str, str_len, count);
+}
+
+static ssize_t write_bsp_pr_callback(struct device *dev,
+        struct device_attribute *da, const char *buf, size_t count)
+{
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
+    int str_len = strlen(buf);
+
+    if(str_len <= 0)
+        return str_len;
+
+    switch (attr->index) {
+        case ATT_BSP_PR_INFO:
+            BSP_PR(KERN_INFO, "%s", buf);
+            break;
+        case ATT_BSP_PR_ERR:
+            BSP_PR(KERN_ERR, "%s", buf);
+            break;
+        default:
+            return -EINVAL;
+    }
+
+    return str_len;
+}
+
+//SENSOR_DEVICE_ATTR - CPU
+static SENSOR_DEVICE_ATTR(cpu_cpld_version, S_IRUGO, read_lpc_callback, NULL, ATT_CPU_CPLD_VERSION);
+static SENSOR_DEVICE_ATTR(cpu_cpld_version_h, S_IRUGO, read_cpu_cpld_version_h, NULL, ATT_CPU_CPLD_VERSION_H);
+static SENSOR_DEVICE_ATTR(boot_rom,         S_IRUGO, read_lpc_callback, NULL, ATT_CPU_BIOS_BOOT_ROM);
+static SENSOR_DEVICE_ATTR(boot_cfg,         S_IRUGO, read_lpc_callback, NULL, ATT_CPU_BIOS_BOOT_CFG);
+static SENSOR_DEVICE_ATTR(cpu_cpld_build,   S_IRUGO, read_lpc_callback, NULL, ATT_CPU_CPLD_BUILD);
+//SENSOR_DEVICE_ATTR - MB
+static SENSOR_DEVICE_ATTR(board_id_0,       S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_ID_0);
+static SENSOR_DEVICE_ATTR(board_id_1,       S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_ID_1);
+static SENSOR_DEVICE_ATTR(mb_cpld_1_version, S_IRUGO, read_lpc_callback, NULL, ATT_MB_CPLD_1_VERSION);
+static SENSOR_DEVICE_ATTR(mb_cpld_1_version_h, S_IRUGO, read_mb_cpld_1_version_h, NULL, ATT_MB_CPLD_1_VERSION_H);
+static SENSOR_DEVICE_ATTR(mb_cpld_1_build,  S_IRUGO, read_lpc_callback, NULL, ATT_MB_CPLD_1_BUILD);
+static SENSOR_DEVICE_ATTR(mux_ctrl,         S_IRUGO | S_IWUSR, read_lpc_callback, write_lpc_callback, ATT_MB_MUX_CTRL);
+static SENSOR_DEVICE_ATTR(mux_reset,        S_IRUGO | S_IWUSR, read_mux_reset_callback, write_mux_reset_callback, ATT_MB_MUX_RESET);
+static SENSOR_DEVICE_ATTR(board_sku_id,     S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_SKU_ID);
+static SENSOR_DEVICE_ATTR(board_hw_id,      S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_HW_ID);
+static SENSOR_DEVICE_ATTR(board_id_type,    S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_ID_TYPE);
+static SENSOR_DEVICE_ATTR(board_build_id,   S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_BUILD_ID);
+static SENSOR_DEVICE_ATTR(board_deph_id,    S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_DEPH_ID);
+//SENSOR_DEVICE_ATTR - I2C Alert
+static SENSOR_DEVICE_ATTR(alert_status,     S_IRUGO, read_lpc_callback, NULL, ATT_ALERT_STATUS);
+#if CPU_TYPE == CPU_BDE
+static SENSOR_DEVICE_ATTR(alert_disable,    S_IRUGO, read_lpc_callback, NULL, ATT_ALERT_DISABLE);
+#endif
+//SENSOR_DEVICE_ATTR - BSP
+static SENSOR_DEVICE_ATTR(bsp_version,      S_IRUGO | S_IWUSR, read_bsp_callback, write_bsp_callback, ATT_BSP_VERSION);
+static SENSOR_DEVICE_ATTR(bsp_debug,        S_IRUGO | S_IWUSR, read_bsp_callback, write_bsp_callback, ATT_BSP_DEBUG);
+static SENSOR_DEVICE_ATTR(bsp_pr_info,      S_IWUSR, NULL, write_bsp_pr_callback, ATT_BSP_PR_INFO);
+static SENSOR_DEVICE_ATTR(bsp_pr_err,       S_IWUSR, NULL, write_bsp_pr_callback, ATT_BSP_PR_ERR);
+static SENSOR_DEVICE_ATTR(bsp_reg,          S_IRUGO | S_IWUSR, read_lpc_callback, write_bsp_callback, ATT_BSP_REG);
+
+static struct attribute *cpu_cpld_attrs[] = {
+    &sensor_dev_attr_cpu_cpld_version.dev_attr.attr,
+    &sensor_dev_attr_cpu_cpld_version_h.dev_attr.attr,
+    &sensor_dev_attr_cpu_cpld_build.dev_attr.attr,
+    NULL,
+};
+
+static struct attribute *mb_cpld_attrs[] = {
+    &sensor_dev_attr_board_id_0.dev_attr.attr,
+    &sensor_dev_attr_board_id_1.dev_attr.attr,
+    &sensor_dev_attr_mb_cpld_1_version.dev_attr.attr,
+    &sensor_dev_attr_mb_cpld_1_version_h.dev_attr.attr,
+    &sensor_dev_attr_mb_cpld_1_build.dev_attr.attr,
+    &sensor_dev_attr_board_sku_id.dev_attr.attr,
+    &sensor_dev_attr_board_hw_id.dev_attr.attr,
+    &sensor_dev_attr_board_id_type.dev_attr.attr,
+    &sensor_dev_attr_board_build_id.dev_attr.attr,
+    &sensor_dev_attr_board_deph_id.dev_attr.attr,
+    &sensor_dev_attr_mux_ctrl.dev_attr.attr,
+    &sensor_dev_attr_mux_reset.dev_attr.attr,
+    NULL,
+};
+
+static struct attribute *bios_attrs[] = {
+    &sensor_dev_attr_boot_rom.dev_attr.attr,
+    &sensor_dev_attr_boot_cfg.dev_attr.attr,
+    NULL,
+};
+
+static struct attribute *i2c_alert_attrs[] = {
+    &sensor_dev_attr_alert_status.dev_attr.attr,
+#if CPU_TYPE == CPU_BDE
+    &sensor_dev_attr_alert_disable.dev_attr.attr,
+#endif
+    NULL,
+};
+
+static struct attribute *bsp_attrs[] = {
+    &sensor_dev_attr_bsp_version.dev_attr.attr,
+    &sensor_dev_attr_bsp_debug.dev_attr.attr,
+    &sensor_dev_attr_bsp_pr_info.dev_attr.attr,
+    &sensor_dev_attr_bsp_pr_err.dev_attr.attr,
+    &sensor_dev_attr_bsp_reg.dev_attr.attr,
+    NULL,
+};
+
+static struct attribute_group cpu_cpld_attr_grp = {
+    .name = "cpu_cpld",
+    .attrs = cpu_cpld_attrs,
+};
+
+static struct attribute_group mb_cpld_attr_grp = {
+    .name = "mb_cpld",
+    .attrs = mb_cpld_attrs,
+};
+
+static struct attribute_group bios_attr_grp = {
+    .name = "bios",
+    .attrs = bios_attrs,
+};
+
+static struct attribute_group i2c_alert_attr_grp = {
+    .name = "i2c_alert",
+    .attrs = i2c_alert_attrs,
+};
+
+static struct attribute_group bsp_attr_grp = {
+    .name = "bsp",
+    .attrs = bsp_attrs,
+};
+
+static void lpc_dev_release( struct device * dev)
+{
+    return;
+}
+
+static struct platform_device lpc_dev = {
+    .name           = DRIVER_NAME,
+    .id             = -1,
+    .dev = {
+                    .release = lpc_dev_release,
+    }
+};
+
+static int lpc_drv_probe(struct platform_device *pdev)
+{
+    int i = 0, grp_num = 5;
+    int err[5] = {0};
+    struct attribute_group *grp;
+
+    lpc_data = devm_kzalloc(&pdev->dev, sizeof(struct lpc_data_s),
+                            GFP_KERNEL);
+    if(!lpc_data)
+        return -ENOMEM;
+
+    mutex_init(&lpc_data->access_lock);
+
+    for (i=0; i<grp_num; ++i) {
+        switch(i) {
+            case 0:
+                grp = &cpu_cpld_attr_grp;
+                break;
+            case 1:
+                grp = &mb_cpld_attr_grp;
+                break;
+            case 2:
+                grp = &bios_attr_grp;
+                break;
+            case 3:
+                grp = &i2c_alert_attr_grp;
+                break;
+            case 4:
+                grp = &bsp_attr_grp;
+                break;
+            default:
+                break;
+        }
+
+        err[i] = sysfs_create_group(&pdev->dev.kobj, grp);
+        if(err[i]) {
+            printk(KERN_ERR "Cannot create sysfs for group %s\n", grp->name);
+            goto exit;
+        } else {
+            continue;
+        }
+    }
+
+    return 0;
+
+exit:
+    for (i=0; i<grp_num; ++i) {
+        switch(i) {
+            case 0:
+                grp = &cpu_cpld_attr_grp;
+                break;
+            case 1:
+                grp = &mb_cpld_attr_grp;
+                break;
+            case 2:
+                grp = &bios_attr_grp;
+                break;
+            case 3:
+                grp = &i2c_alert_attr_grp;
+                break;
+            case 4:
+                grp = &bsp_attr_grp;
+                break;
+            default:
+                break;
+        }
+
+        sysfs_remove_group(&pdev->dev.kobj, grp);
+        if(!err[i]) {
+            //remove previous successful cases
+            continue;
+        } else {
+            //remove first failed case, then return
+            return err[i];
+        }
+    }
+    return 0;
+}
+
+static int lpc_drv_remove(struct platform_device *pdev)
+{
+    sysfs_remove_group(&pdev->dev.kobj, &cpu_cpld_attr_grp);
+    sysfs_remove_group(&pdev->dev.kobj, &mb_cpld_attr_grp);
+    sysfs_remove_group(&pdev->dev.kobj, &bios_attr_grp);
+    sysfs_remove_group(&pdev->dev.kobj, &i2c_alert_attr_grp);
+    sysfs_remove_group(&pdev->dev.kobj, &bsp_attr_grp);
+
+    return 0;
+}
+
+static struct platform_driver lpc_drv = {
+    .probe  = lpc_drv_probe,
+    .remove = __exit_p(lpc_drv_remove),
+    .driver = {
+    .name   = DRIVER_NAME,
+    },
+};
+
+int lpc_init(void)
+{
+    int err = 0;
+
+    err = platform_driver_register(&lpc_drv);
+    if(err) {
+        printk(KERN_ERR "%s(#%d): platform_driver_register failed(%d)\n",
+                __func__, __LINE__, err);
+
+        return err;
+    }
+
+    err = platform_device_register(&lpc_dev);
+    if(err) {
+        printk(KERN_ERR "%s(#%d): platform_device_register failed(%d)\n",
+                __func__, __LINE__, err);
+        platform_driver_unregister(&lpc_drv);
+        return err;
+    }
+
+    return err;
+}
+
+void lpc_exit(void)
+{
+    platform_driver_unregister(&lpc_drv);
+    platform_device_unregister(&lpc_dev);
+}
+
+MODULE_AUTHOR("Leo Lin <leo.yt.lin@ufispace.com>");
+MODULE_DESCRIPTION("x86_64_ufispace_s9301_32db_lpc driver");
+MODULE_LICENSE("GPL");
+
+module_init(lpc_init);
+module_exit(lpc_exit);
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/modules/x86-64-ufispace-s9301-32db-sys-eeprom.c b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/modules/x86-64-ufispace-s9301-32db-sys-eeprom.c
new file mode 100644
index 000000000..3fa3ae4c9
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/modules/x86-64-ufispace-s9301-32db-sys-eeprom.c
@@ -0,0 +1,283 @@
+/*
+ * Copyright (C) 1998, 1999  Frodo Looijaard <frodol@dds.nl> and
+ *                           Philip Edelbrock <phil@netroedge.com>
+ * Copyright (C) 2003 Greg Kroah-Hartman <greg@kroah.com>
+ * Copyright (C) 2003 IBM Corp.
+ * Copyright (C) 2004 Jean Delvare <jdelvare@suse.de>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+/* enable dev_dbg print out */
+//#define DEBUG 
+
+#define __STDC_WANT_LIB_EXT1__ 1
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/slab.h>
+#include <linux/delay.h>
+#include <linux/jiffies.h>
+#include <linux/i2c.h>
+#include <linux/mutex.h>
+#include <linux/version.h>
+
+#define _memset(s, c, n) memset(s, c, n)
+
+/* Addresses to scan */
+static const unsigned short normal_i2c[] = { /*0x50, 0x51, 0x52, 0x53, 0x54,
+                    0x55, 0x56, 0x57,*/ I2C_CLIENT_END };
+
+/* Size of EEPROM in bytes */
+#define EEPROM_SIZE     512
+
+#define SLICE_BITS      (6)
+#define SLICE_SIZE      (1 << SLICE_BITS)
+#define SLICE_NUM       (EEPROM_SIZE/SLICE_SIZE)
+
+/* Each client has this additional data */
+struct eeprom_data {
+    struct mutex update_lock;
+    u8 valid;           /* bitfield, bit!=0 if slice is valid */
+    unsigned long last_updated[SLICE_NUM];  /* In jiffies, 8 slices */
+    u8 data[EEPROM_SIZE];       /* Register values */
+};
+
+
+static void sys_eeprom_update_client(struct i2c_client *client, u8 slice)
+{
+    struct eeprom_data *data = i2c_get_clientdata(client);
+    int i, j;
+    int ret;
+    int addr;
+
+    mutex_lock(&data->update_lock);
+
+    if (!(data->valid & (1 << slice)) ||
+        time_after(jiffies, data->last_updated[slice] + 300 * HZ)) {
+        dev_dbg(&client->dev, "Starting eeprom update, slice %u\n", slice);
+
+        addr = slice << SLICE_BITS;
+
+        ret = i2c_smbus_write_byte_data(client, (u8)((addr >> 8) & 0xFF), (u8)(addr & 0xFF));
+        /* select the eeprom address */
+        if (ret < 0) {
+            dev_err(&client->dev, "address set failed\n");
+            goto exit;
+        }
+
+        if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_READ_BYTE)) {
+            goto exit;
+        }
+
+        for (i = slice << SLICE_BITS; i < (slice + 1) << SLICE_BITS; i+= SLICE_SIZE) {
+            for (j = i; j < (i+SLICE_SIZE); j++) {
+                int res;
+
+                res = i2c_smbus_read_byte(client);
+                if (res < 0) {
+                    goto exit;
+                }
+
+                data->data[j] = res & 0xFF;
+            }
+        }
+        
+        data->last_updated[slice] = jiffies;
+        data->valid |= (1 << slice);
+    }
+exit:
+    mutex_unlock(&data->update_lock);
+}
+
+static ssize_t sys_eeprom_read(struct file *filp, struct kobject *kobj,
+               struct bin_attribute *bin_attr,
+               char *buf, loff_t off, size_t count)
+{
+    struct i2c_client *client = to_i2c_client(container_of(kobj, struct device, kobj));
+    struct eeprom_data *data = i2c_get_clientdata(client);
+    u8 slice;
+
+    if (off > EEPROM_SIZE) {
+        return 0;
+    }
+    if (off + count > EEPROM_SIZE) {
+        count = EEPROM_SIZE - off;
+    }
+    if (count == 0) {
+        return 0;
+    }
+
+    /* Only refresh slices which contain requested bytes */
+    for (slice = off >> SLICE_BITS; slice <= (off + count - 1) >> SLICE_BITS; slice++) {
+        sys_eeprom_update_client(client, slice);
+    }
+
+    memcpy(buf, &data->data[off], count);
+
+    return count;
+}
+
+static ssize_t sys_eeprom_write(struct file *filp, struct kobject *kobj,
+                       struct bin_attribute *bin_attr,
+                       char *buf, loff_t off, size_t count)
+{
+    struct i2c_client *client = to_i2c_client(container_of(kobj, struct device, kobj));
+    struct eeprom_data *data = i2c_get_clientdata(client);
+    int ret;
+    int i;
+    u8 cmd;
+    u16 value16;
+
+    dev_dbg(&client->dev, "sys_eeprom_write off=%d, count=%d\n", (int)off, (int)count);
+
+    if (off > EEPROM_SIZE) {
+        return 0;
+    }
+    if (off + count > EEPROM_SIZE) {
+        count = EEPROM_SIZE - off;
+    }
+    if (count == 0) {
+        return 0;
+    }
+
+    mutex_lock(&data->update_lock);
+
+    for(i=0; i < count; i++) {
+        /* write command */
+        cmd = (off >> 8) & 0xff;
+        value16 = off & 0xff;
+        value16 |= buf[i] << 8;
+        ret = i2c_smbus_write_word_data(client, cmd, value16);
+
+        if (ret < 0) {
+            dev_err(&client->dev, "write address failed at %d \n", (int)off);
+            goto exit;
+        }
+
+        off++;
+        
+        /* need to wait for write complete */
+        udelay(10000);
+    }
+exit:
+    mutex_unlock(&data->update_lock);
+    /* force to update client when reading */
+    for(i=0; i < SLICE_NUM; i++) {
+        data->last_updated[i] = 0;
+    }
+
+    return count;
+}
+
+static struct bin_attribute sys_eeprom_attr = {
+    .attr = {
+        .name = "eeprom",
+        .mode = S_IRUGO | S_IWUSR,
+    },
+    .size = EEPROM_SIZE,
+    .read = sys_eeprom_read,
+    .write = sys_eeprom_write,
+};
+
+/* Return 0 if detection is successful, -ENODEV otherwise */
+static int sys_eeprom_detect(struct i2c_client *client, struct i2c_board_info *info)
+{
+    struct i2c_adapter *adapter = client->adapter;
+
+    /* EDID EEPROMs are often 24C00 EEPROMs, which answer to all
+       addresses 0x50-0x57, but we only care about 0x51 and 0x55. So decline
+       attaching to addresses >= 0x56 on DDC buses */
+    if (!(adapter->class & I2C_CLASS_SPD) && client->addr >= 0x56) {
+        return -ENODEV;
+    }
+
+    if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_READ_BYTE)
+     && !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_WRITE_BYTE_DATA)) {
+        return -ENODEV;
+    }
+
+    strlcpy(info->type, "eeprom", I2C_NAME_SIZE);
+
+    return 0;
+}
+
+static int sys_eeprom_probe(struct i2c_client *client,
+            const struct i2c_device_id *id)
+{
+    struct eeprom_data *data;
+    int err;
+
+    if (!(data = kzalloc(sizeof(struct eeprom_data), GFP_KERNEL))) {
+        err = -ENOMEM;
+        goto exit;
+    }
+
+#ifdef __STDC_LIB_EXT1__
+    memset_s(data->data, EEPROM_SIZE, 0xff, EEPROM_SIZE);
+#else
+    _memset(data->data, 0xff, EEPROM_SIZE);
+#endif
+
+    i2c_set_clientdata(client, data);
+    mutex_init(&data->update_lock);
+
+    /* create the sysfs eeprom file */
+    err = sysfs_create_bin_file(&client->dev.kobj, &sys_eeprom_attr);
+    if (err) {
+        goto exit_kfree;
+    }
+
+    return 0;
+
+exit_kfree:
+    kfree(data);
+exit:
+    return err;
+}
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0)
+static int
+#else
+static void
+#endif
+sys_eeprom_remove(struct i2c_client *client)
+{
+    sysfs_remove_bin_file(&client->dev.kobj, &sys_eeprom_attr);
+    kfree(i2c_get_clientdata(client));
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0)
+    return 0;
+#endif
+}
+
+static const struct i2c_device_id sys_eeprom_id[] = {
+    { "sys_eeprom", 0 },
+    { }
+};
+
+static struct i2c_driver sys_eeprom_driver = {
+    .driver = {
+        .name   = "sys_eeprom",
+    },
+    .probe      = sys_eeprom_probe,
+    .remove     = sys_eeprom_remove,
+    .id_table   = sys_eeprom_id,
+
+    .class      = I2C_CLASS_DDC | I2C_CLASS_SPD,
+    .detect     = sys_eeprom_detect,
+    .address_list   = normal_i2c,
+};
+
+module_i2c_driver(sys_eeprom_driver);
+
+MODULE_AUTHOR("Wade <wade.ce.he@ufispace.com>");
+MODULE_DESCRIPTION("UfiSpace Mother Board EEPROM driver");
+MODULE_LICENSE("GPL");
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/service/pddf-platform-init.service b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/service/pddf-platform-init.service
new file mode 100644
index 000000000..41fa67214
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/service/pddf-platform-init.service
@@ -0,0 +1,14 @@
+[Unit]
+Description=PDDF module and device initialization service
+Before=pmon.service
+DefaultDependencies=no
+
+[Service]
+Type=oneshot
+ExecStartPre=-/usr/local/bin/pre_pddf_init.sh
+ExecStart=/usr/local/bin/pddf_util.py install
+ExecStop=/usr/local/bin/pddf_util.py clean
+RemainAfterExit=yes
+
+[Install]
+WantedBy=multi-user.target
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform/__init__.py b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform/__init__.py
new file mode 100644
index 000000000..593867d31
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform/__init__.py
@@ -0,0 +1,4 @@
+# All the derived classes for PDDF
+__all__ = ["platform", "chassis", "sfp", "psu", "thermal", "fan"]
+from . import platform
+
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform/chassis.py b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform/chassis.py
new file mode 100644
index 000000000..6c77e2424
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform/chassis.py
@@ -0,0 +1,189 @@
+#!/usr/bin/env python
+
+#############################################################################
+# PDDF
+# Module contains an implementation of SONiC Chassis API
+#
+#############################################################################
+
+try:
+    import time
+    from sonic_platform_pddf_base.pddf_chassis import PddfChassis
+    from sonic_py_common import device_info
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+NUM_COMPONENT = 5
+
+class Chassis(PddfChassis):
+    """
+    PDDF Platform-specific Chassis class
+    """
+
+    port_dict = {}
+
+    def __init__(self, pddf_data=None, pddf_plugin_data=None):
+        PddfChassis.__init__(self, pddf_data, pddf_plugin_data)
+        self._initialize_components()
+
+    def _initialize_components(self):
+        from sonic_platform.component import Component
+        for index in range(NUM_COMPONENT):
+            component = Component(index)
+            self._component_list.append(component)
+            
+    # Provide the functions/variables below for which implementation is to be overwritten
+
+    def get_name(self):
+        """
+        Retrieves the name of the chassis
+        Returns:
+            string: The name of the chassis
+        """
+        return self._eeprom.platform_name_str()
+
+    def initizalize_system_led(self):
+        return True
+
+    def get_status_led(self):
+        return self.get_system_led("SYS_LED")
+
+    def get_change_event(self, timeout=0):
+        """
+        Returns a nested dictionary containing all devices which have
+        experienced a change at chassis level
+        Args:
+            timeout: Timeout in milliseconds (optional). If timeout == 0,
+                this method will block until a change is detected.
+        Returns:
+            (bool, dict):
+                - bool: True if call successful, False if not;
+                - dict: A nested dictionary where key is a device type,
+                        value is a dictionary with key:value pairs in the format of
+                        {'device_id':'device_event'}, where device_id is the device ID
+                        for this device and device_event.
+                        The known devices's device_id and device_event was defined as table below.
+                         -----------------------------------------------------------------
+                         device   |     device_id       |  device_event  |  annotate
+                         -----------------------------------------------------------------
+                         'sfp'          '<sfp number>'     '0'              Sfp removed
+                                                           '1'              Sfp inserted
+                                                           '2'              I2C bus stuck
+                                                           '3'              Bad eeprom
+                                                           '4'              Unsupported cable
+                                                           '5'              High Temperature
+                                                           '6'              Bad cable
+                         --------------------------------------------------------------------
+                  Ex. 'sfp':{'11':'0', '12':'1'},
+                  Indicates that:
+                     sfp 11 has been removed, sfp 12 has been inserted.
+                  Note: For sfp, when event 3-6 happened, the module will not be avalaible,
+                        XCVRD shall stop to read eeprom before SFP recovered from error status.
+        """
+
+        change_event_dict = {"sfp": {}}
+
+        start_time = time.time()
+        forever = False
+
+        if timeout == 0:
+            forever = True
+        elif timeout > 0:
+            timeout = timeout / float(1000)  # Convert to secs
+        else:
+            print("get_change_event:Invalid timeout value", timeout)
+            return False, change_event_dict
+
+        end_time = start_time + timeout
+        if start_time > end_time:
+            print(
+                "get_change_event:" "time wrap / invalid timeout value",
+                timeout,
+            )   
+            return False, change_event_dict  # Time wrap or possibly incorrect timeout
+        try:
+            while timeout >= 0:
+                # check for sfp
+                sfp_change_dict = self.get_transceiver_change_event()
+
+                if sfp_change_dict:
+                    change_event_dict["sfp"] = sfp_change_dict
+                    return True, change_event_dict
+                if forever:
+                    time.sleep(1)
+                else:
+                    timeout = end_time - time.time()
+                    if timeout >= 1:
+                        time.sleep(1)  # We poll at 1 second granularity
+                    else:
+                        if timeout > 0:
+                            time.sleep(timeout)
+                        return True, change_event_dict
+        except Exception as e:
+            print(e)
+        print("get_change_event: Should not reach here.")
+        return False, change_event_dict
+
+    def get_transceiver_change_event(self, timeout=0):
+        current_port_dict = {}
+        ret_dict = {}
+
+        # Check for OIR events and return ret_dict
+        for index in range(self.platform_inventory['num_ports']):
+            if self._sfp_list[index].get_presence():
+                current_port_dict[index] = self.plugin_data['XCVR']['plug_status']['inserted']
+            else:
+                current_port_dict[index] = self.plugin_data['XCVR']['plug_status']['removed']
+
+        if len(self.port_dict) == 0:       # first time
+            self.port_dict = current_port_dict
+            return {}
+
+        if current_port_dict == self.port_dict:
+            return {}
+
+        # Update reg value
+        for index, status in current_port_dict.items():
+            if self.port_dict[index] != status:
+                ret_dict[index] = status
+                #ret_dict[str(index)] = status
+        self.port_dict = current_port_dict
+        for index, status in ret_dict.items():
+            if int(status) == 1:
+                pass
+                #self._sfp_list[int(index)].check_sfp_optoe_type()
+        return ret_dict
+
+    def get_reboot_cause(self):
+        """
+        Retrieves the cause of the previous reboot
+
+        Returns:
+            A tuple (string, string) where the first element is a string
+            containing the cause of the previous reboot. This string must be
+            one of the predefined strings in this class. If the first string
+            is "REBOOT_CAUSE_HARDWARE_OTHER", the second string can be used
+            to pass a description of the reboot cause.
+        """
+
+        reboot_cause_path = self.plugin_data['REBOOT_CAUSE']['reboot_cause_file']
+
+        try:
+            with open(reboot_cause_path, 'r', errors='replace') as fd:
+                data = fd.read()
+                sw_reboot_cause = data.strip()
+        except IOError:
+            sw_reboot_cause = "Unknown"
+
+        return ('REBOOT_CAUSE_NON_HARDWARE', sw_reboot_cause)
+
+    def get_serial_number(self):
+        """
+        Retrieves the hardware serial number for the chassis
+
+        Returns:
+            A string containing the hardware serial number for this
+            chassis.
+        """
+
+        return self.get_serial()
\ No newline at end of file
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform/component.py b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform/component.py
new file mode 100644
index 000000000..b94a10d61
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform/component.py
@@ -0,0 +1,131 @@
+#############################################################################
+# 
+# Component contains an implementation of SONiC Platform Base API and
+# provides the components firmware management function
+#
+#############################################################################
+
+try:
+    import subprocess
+    from sonic_platform_base.component_base import ComponentBase
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+CPLD_SYSFS = {
+    "CPLD1": "/sys/kernel/pddf/devices/sysstatus/sysstatus_data/cpld1_version",
+    "CPLD2": "/sys/kernel/pddf/devices/sysstatus/sysstatus_data/cpld2_version",
+    "CPLD3": "/sys/kernel/pddf/devices/sysstatus/sysstatus_data/cpld3_version",
+}
+
+BMC_CMDS = {
+    "BMC": "bash -c 'tmp=$(ipmitool raw 0x6 0x1) && r=($(echo \"$tmp\" | cut -d \" \" -f 4,5,16,15,14)) && echo ${r[0]}.${r[1]}.${r[4]}.${r[3]}${r[2]}'",
+}
+
+BIOS_VERSION_PATH = "/sys/class/dmi/id/bios_version"
+COMPONENT_LIST= [
+   ("CPLD1", "CPLD 1"),
+   ("CPLD2", "CPLD 2"),
+   ("CPLD3", "CPLD 3"),
+   ("BIOS", "Basic Input/Output System"),
+   ("BMC", "BMC"),
+   
+]
+
+class Component(ComponentBase):
+    """Platform-specific Component class"""
+
+    DEVICE_TYPE = "component"
+
+    def __init__(self, component_index=0):
+        self.index = component_index
+        self.name = self.get_name()
+
+    def _run_command(self, command):
+        # Run bash command and print output to stdout
+        try:
+            process = subprocess.Popen(
+                shlex.split(command), stdout=subprocess.PIPE)
+            while True:
+                output = process.stdout.readline()
+                if output == '' and process.poll() is not None:
+                    break
+            rc = process.poll()
+            if rc != 0:
+                return False
+        except Exception:
+            return False
+        return True
+
+    def _get_bios_version(self):
+        # Retrieves the BIOS firmware version
+        try:
+            with open(BIOS_VERSION_PATH, 'r') as fd:
+                bios_version = fd.read()
+                return bios_version.strip()
+        except Exception as e:
+            return None
+   
+    def _get_cpld_version(self):
+        # Retrieves the CPLD firmware version
+        cpld_version = dict()
+        for cpld_name in CPLD_SYSFS:            
+            cmd = "cat {}".format(CPLD_SYSFS[cpld_name])
+            status, value = subprocess.getstatusoutput(cmd)
+            if not status:
+                cpld_version_raw = value.rstrip()
+                cpld_version_int = int(cpld_version_raw,16)
+                cpld_version[cpld_name] = "{}.{:02d}".format(cpld_version_int >> 6,
+                                                             cpld_version_int & 0b00111111)
+
+        return cpld_version
+
+    def _get_bmc_version(self):
+        # Retrieves the BMC firmware version
+        status, value = subprocess.getstatusoutput(BMC_CMDS["BMC"])
+        if not status:
+            return value
+        else:
+            return None
+
+    def get_name(self):
+        """
+        Retrieves the name of the component
+         Returns:
+            A string containing the name of the component
+        """
+        return COMPONENT_LIST[self.index][0]
+
+    def get_description(self):
+        """
+        Retrieves the description of the component
+            Returns:
+            A string containing the description of the component
+        """
+        return COMPONENT_LIST[self.index][1]
+
+    def get_firmware_version(self):
+        """
+        Retrieves the firmware version of module
+        Returns:
+            string: The firmware versions of the module
+        """
+        fw_version = None
+
+        if self.name == "BIOS":
+            fw_version = self._get_bios_version()
+        elif "CPLD" in self.name:
+            cpld_version = self._get_cpld_version()
+            fw_version = cpld_version.get(self.name)
+        elif self.name == "BMC":
+            fw_version = self._get_bmc_version()
+        return fw_version
+
+    def install_firmware(self, image_path):
+        """
+        Install firmware to module
+        Args:
+            image_path: A string, path to firmware image
+        Returns:
+            A boolean, True if install successfully, False if not
+        """
+        raise NotImplementedError
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform/eeprom.py b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform/eeprom.py
new file mode 100644
index 000000000..90ab1c779
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform/eeprom.py
@@ -0,0 +1,21 @@
+#!/usr/bin/env python
+
+try:
+    from sonic_platform_pddf_base.pddf_eeprom import PddfEeprom
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+
+class Eeprom(PddfEeprom):
+
+    def __init__(self, pddf_data=None, pddf_plugin_data=None):
+        PddfEeprom.__init__(self, pddf_data, pddf_plugin_data)
+
+    # Provide the functions/variables below for which implementation is to be overwritten
+
+    def platform_name_str(self):
+        (is_valid, results) = self.get_tlv_field(self.eeprom_data, self._TLV_CODE_PLATFORM_NAME)
+        if not is_valid:
+            return "N/A"
+
+        return results[2].decode('ascii')
\ No newline at end of file
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform/fan.py b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform/fan.py
new file mode 100644
index 000000000..3082de54a
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform/fan.py
@@ -0,0 +1,172 @@
+#!/usr/bin/env python
+
+
+try:
+    from sonic_platform_pddf_base.pddf_fan import PddfFan
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+
+class Fan(PddfFan):
+    """PDDF Platform-Specific Fan class"""
+
+    def __init__(self, tray_idx, fan_idx=0, pddf_data=None, pddf_plugin_data=None, is_psu_fan=False, psu_index=0):
+        # idx is 0-based 
+        PddfFan.__init__(self, tray_idx, fan_idx, pddf_data, pddf_plugin_data, is_psu_fan, psu_index)
+
+    # Provide the functions/variables below for which implementation is to be overwritten
+    # Since psu_fan airflow direction cant be read from sysfs, it is fixed as 'F2B' or 'intake'
+
+    def get_speed(self):
+        """
+        Retrieves the speed of fan as a percentage of full speed
+
+        Returns:
+            An integer, the percentage of full fan speed, in the range 0 (off)
+                 to 100 (full speed)
+        """
+        speed_percentage = 0
+        if self.is_psu_fan:
+            attr = "psu_fan{}_speed_rpm".format(self.fan_index)
+            device = "PSU{}".format(self.fans_psu_index)
+            max_speed = int(self.plugin_data['PSU']['PSU_FAN_MAX_SPEED']) 
+        else:
+            if self.fan_index == 1:
+                pos = "f"
+                max_speed = int(self.plugin_data['FAN']['FAN_F_MAX_SPEED']) 
+            else:
+                pos = "r"
+                max_speed = int(self.plugin_data['FAN']['FAN_R_MAX_SPEED']) 
+            attr = "fan{}_{}_speed_rpm".format(self.fantray_index, pos)
+            device = "FAN-CTRL"
+
+        output = self.pddf_obj.get_attr_name_output(device, attr)
+        if not output:
+            return speed_percentage
+
+        output['status'] = output['status'].rstrip()
+        if output['status'].isalpha():
+            return speed_percentage
+        else:
+            speed = int(float(output['status']))
+
+        speed_percentage = round((speed*100)/max_speed)
+        
+        return min(speed_percentage, 100)
+
+    def get_speed_rpm(self):
+        """
+        Retrieves the speed of fan in RPM
+
+        Returns:
+            An integer, Speed of fan in RPM
+        """
+        rpm_speed = 0
+        if self.is_psu_fan:
+            attr = "psu_fan{}_speed_rpm".format(self.fan_index)
+            device = "PSU{}".format(self.fans_psu_index)
+        else:
+            if self.fan_index == 1:
+                pos = "f"
+            else:
+                pos = "r"
+            attr = "fan{}_{}_speed_rpm".format(self.fantray_index, pos)
+            device = "FAN-CTRL"
+
+        output = self.pddf_obj.get_attr_name_output(device, attr)
+
+        if output is None:
+            return rpm_speed
+
+        output['status'] = output['status'].rstrip()
+        if output['status'].isalpha():
+            return rpm_speed
+        else:
+            rpm_speed = int(float(output['status']))
+
+        return rpm_speed
+
+    def get_direction(self):
+        """
+        Retrieves the direction of fan
+        Returns:
+            A string, either FAN_DIRECTION_INTAKE or FAN_DIRECTION_EXHAUST
+            depending on fan direction
+        """
+        direction = self.FAN_DIRECTION_INTAKE
+        if self.is_psu_fan:
+            attr = "psu_fan{}_dir".format(self.fan_index)
+            device = "PSU{}".format(self.fans_psu_index)
+        else:
+            attr = "fan{}_dir".format(self.fantray_index)
+            device = "FAN-CTRL"
+
+        output = self.pddf_obj.get_attr_name_output(device, attr)
+        if not output:
+            return direction
+
+        mode = output['mode']
+        val = output['status'].strip()
+        vmap = self.plugin_data['FAN']['direction'][mode]['valmap']
+   
+        if val in vmap:
+            direction = vmap[val]
+            
+        return direction
+
+    def get_presence(self):
+        """
+        Retrieves the presence of the device
+        Returns:
+            bool: True if device is present, False if not
+        """
+        presence = False
+        if self.is_psu_fan:
+            attr = "psu_present"
+            device = "PSU{}".format(self.fans_psu_index)
+        else:
+            attr = "fan{}_present".format(self.fantray_index)
+            device = "FAN-CTRL"
+
+        output = self.pddf_obj.get_attr_name_output(device, attr)
+        if not output:
+            return presence
+
+
+        mode = output['mode']
+        val = output['status'].strip()
+
+        if self.is_psu_fan:
+            vmap = self.plugin_data['PSU']['psu_present'][mode]['valmap']
+        else:
+            vmap = self.plugin_data['FAN']['present'][mode]['valmap']
+
+        if val in vmap:
+            presence = vmap[val]
+
+        return presence
+
+    def get_target_speed(self):
+        """
+        Retrieves the target (expected) speed of the fan
+        Returns:
+            An integer, the percentage of full fan speed, in the range 0 (off)
+                 to 100 (full speed)
+        """
+        return self.get_speed()
+
+    def set_speed(self, speed):
+        """
+        Sets the fan speed
+
+        Args:
+            speed: An integer, the percentage of full fan speed to set fan to,
+                   in the range 0 (off) to 100 (full speed)
+
+        Returns:
+            A boolean, True if speed is set successfully, False if not
+        """
+
+        print("Setting Fan speed is not allowed")
+        return False
+
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform/fan_drawer.py b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform/fan_drawer.py
new file mode 100644
index 000000000..3b9bb607f
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform/fan_drawer.py
@@ -0,0 +1,17 @@
+#!/usr/bin/env python
+
+
+try:
+    from sonic_platform_pddf_base.pddf_fan_drawer import PddfFanDrawer
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+
+class FanDrawer(PddfFanDrawer):
+    """PDDF Platform-Specific Fan-Drawer class"""
+
+    def __init__(self, tray_idx, pddf_data=None, pddf_plugin_data=None):
+        # idx is 0-based 
+        PddfFanDrawer.__init__(self, tray_idx, pddf_data, pddf_plugin_data)
+
+    # Provide the functions/variables below for which implementation is to be overwritten
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/sonic_platform/watchdog.py b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform/platform.py
similarity index 58%
rename from platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/sonic_platform/watchdog.py
rename to platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform/platform.py
index 88660b1a1..406b1179a 100644
--- a/platform/broadcom/sonic-platform-modules-ufispace/s9300-32d/sonic_platform/watchdog.py
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform/platform.py
@@ -1,23 +1,25 @@
 #!/usr/bin/env python
 
 #############################################################################
-#
-# Module contains an implementation of platform specific watchdog API's
+# PDDF
+# Module contains an implementation of SONiC Platform Base API and
+# provides the platform information
 #
 #############################################################################
 
+
 try:
-    from sonic_platform_pddf_base.pddf_watchdog import PddfWatchdog
+    from sonic_platform_pddf_base.pddf_platform import PddfPlatform
 except ImportError as e:
     raise ImportError(str(e) + "- required module not found")
 
-class Watchdog(PddfWatchdog):
+
+class Platform(PddfPlatform):
     """
-    PDDF Platform-specific Chassis class
+    PDDF Platform-Specific Platform Class
     """
 
     def __init__(self):
-        PddfWatchdog.__init__(self)
-        self.timeout= 180
+        PddfPlatform.__init__(self)
 
     # Provide the functions/variables below for which implementation is to be overwritten
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform/psu.py b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform/psu.py
new file mode 100644
index 000000000..3e213415f
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform/psu.py
@@ -0,0 +1,56 @@
+#!/usr/bin/env python
+
+
+try:
+    from sonic_platform_pddf_base.pddf_psu import PddfPsu
+except ImportError as e:
+    raise ImportError (str(e) + "- required module not found")
+
+
+class Psu(PddfPsu):
+    """PDDF Platform-Specific PSU class"""
+    
+    PLATFORM_PSU_CAPACITY = 1300
+
+    def __init__(self, index, pddf_data=None, pddf_plugin_data=None):
+        PddfPsu.__init__(self, index, pddf_data, pddf_plugin_data)
+        
+    # Provide the functions/variables below for which implementation is to be overwritten
+    def get_maximum_supplied_power(self):
+        """
+        Retrieves the maximum supplied power by PSU (or PSU capacity)
+        Returns:
+            A float number, the maximum power output in Watts.
+            e.g. 1200.1
+        """
+        return float(self.PLATFORM_PSU_CAPACITY)
+
+    def get_power(self):
+        """
+        Retrieves current energy supplied by PSU
+
+        Returns:
+            A float number, the power in watts,
+            e.g. 302.6
+        """
+
+        # power is returned in micro watts
+        return round(float(self.get_voltage()*self.get_current()), 2)
+
+    def get_capacity(self):
+        """
+        Retrieves the maximum supplied power by PSU (or PSU capacity)
+        Returns:
+            A float number, the maximum power output in Watts.
+            e.g. 1200.1
+        """
+        return self.get_maximum_supplied_power()
+
+    def get_type(self):
+        """
+        Gets the type of the PSU
+
+        Returns:
+            A string, the type of PSU (AC/DC)
+        """
+        return self.plugin_data['PSU']['DEFAULT_TYPE']
\ No newline at end of file
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform/sfp.py b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform/sfp.py
new file mode 100644
index 000000000..c7919482f
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform/sfp.py
@@ -0,0 +1,31 @@
+#!/usr/bin/env python
+
+try:
+    from sonic_platform_pddf_base.pddf_sfp import PddfSfp
+except ImportError as e:
+    raise ImportError (str(e) + "- required module not found")
+
+
+class Sfp(PddfSfp):
+    """
+    PDDF Platform-Specific Sfp class
+    """
+
+    def __init__(self, index, pddf_data=None, pddf_plugin_data=None):
+        PddfSfp.__init__(self, index, pddf_data, pddf_plugin_data)
+        self.index = index
+
+    # Provide the functions/variables below for which implementation is to be overwritten
+
+    def get_error_description(self):
+        """
+        Retrives the error descriptions of the SFP module
+        Returns:
+            String that represents the current error descriptions of vendor specific errors
+            In case there are multiple errors, they should be joined by '|',
+            like: "Bad EEPROM|Unsupported cable"
+        """
+        if not self.get_presence():
+            return self.SFP_STATUS_UNPLUGGED
+
+        return self.SFP_STATUS_OK
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform/thermal.py b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform/thermal.py
new file mode 100644
index 000000000..77d6ec7ae
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform/thermal.py
@@ -0,0 +1,17 @@
+#!/usr/bin/env python
+
+
+try:
+    from sonic_platform_pddf_base.pddf_thermal import PddfThermal
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+
+
+class Thermal(PddfThermal):
+    """PDDF Platform-Specific Thermal class"""
+
+    def __init__(self, index, pddf_data=None, pddf_plugin_data=None, is_psu_thermal=False, psu_index=0):
+        PddfThermal.__init__(self, index, pddf_data, pddf_plugin_data, is_psu_thermal, psu_index)
+
+    # Provide the functions/variables below for which implementation is to be overwritten
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform_setup.py b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform_setup.py
new file mode 100644
index 000000000..3661c84a0
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/sonic_platform_setup.py
@@ -0,0 +1,27 @@
+from setuptools import setup
+
+setup(
+    name='sonic-platform',
+    version='1.0',
+    description='SONiC platform API implementation on ufispace platform',
+    license='Apache 2.0',
+    author='SONiC Team',
+    author_email='linuxnetdev@microsoft.com',
+    url='https://github.com/Azure/sonic-buildimage',
+    maintainer='Leo Lin',
+    maintainer_email='leo.yt.lin@ufispace.com',
+    packages=['sonic_platform'],
+    classifiers=[
+        'Development Status :: 3 - Alpha',
+        'Environment :: Plugins',
+        'Intended Audience :: Developers',
+        'Intended Audience :: Information Technology',
+        'Intended Audience :: System Administrators',
+        'License :: OSI Approved :: Apache Software License',
+        'Natural Language :: English',
+        'Operating System :: POSIX :: Linux',
+        'Programming Language :: Python :: 3.7',
+        'Topic :: Utilities',
+    ],
+    keywords='sonic SONiC platform PLATFORM',
+)
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/utils/pddf_post_device_create.sh b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/utils/pddf_post_device_create.sh
new file mode 100755
index 000000000..e4de7ae36
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/utils/pddf_post_device_create.sh
@@ -0,0 +1,6 @@
+#!/bin/bash
+#disable bmc watchdog
+timeout 3 ipmitool mc watchdog off
+
+echo 1 > /sys/kernel/pddf/devices/sysstatus/sysstatus_data/port_led_clr_ctrl
+echo "PDDF device post-create completed"
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/utils/pddf_post_driver_install.sh b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/utils/pddf_post_driver_install.sh
new file mode 100755
index 000000000..ed2559977
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/utils/pddf_post_driver_install.sh
@@ -0,0 +1,2 @@
+#!/bin/bash
+echo "PDDF driver post-install completed"
diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/utils/pddf_switch_svc.py b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/utils/pddf_switch_svc.py
new file mode 100755
index 000000000..f5e45045f
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-ufispace/s9301-32db/utils/pddf_switch_svc.py
@@ -0,0 +1,86 @@
+#!/usr/bin/env python
+# Script to stop and start the respective platforms default services. 
+# This will be used while switching the pddf->non-pddf mode and vice versa
+import commands
+
+def check_pddf_support():
+    return True
+
+def stop_platform_svc():
+    
+    '''
+    status, output = commands.getstatusoutput("systemctl stop s9301-32db-platform-monitor-fan.service")
+    if status:
+        print "Stop s9301-32db-platform-fan.service failed %d"%status
+        return False
+    
+    status, output = commands.getstatusoutput("systemctl stop s9301-32db-platform-monitor-psu.service")
+    if status:
+        print "Stop s9301-32db-platform-psu.service failed %d"%status
+        return False
+    
+    status, output = commands.getstatusoutput("systemctl stop s9301-32db-platform-monitor.service")
+    if status:
+        print "Stop s9301-32db-platform-init.service failed %d"%status
+        return False
+    status, output = commands.getstatusoutput("systemctl disable s9301-32db-platform-monitor.service")
+    if status:
+        print "Disable s9301-32db-platform-monitor.service failed %d"%status
+        return False
+    '''
+    
+    status, output = commands.getstatusoutput("/usr/local/bin/platform_utility.py deinit")
+    if status:
+        print "platform_utility.py deinit command failed %d"%status
+        return False
+
+    # HACK , stop the pddf-platform-init service if it is active
+    status, output = commands.getstatusoutput("systemctl stop pddf-platform-init.service")
+    if status:
+        print "Stop pddf-platform-init.service along with other platform serives failed %d"%status
+        return False
+
+    return True
+    
+def start_platform_svc():
+    
+    status, output = commands.getstatusoutput("/usr/local/bin/platform_utility.py init")
+    if status:
+        print "platform_utility.py init command failed %d"%status
+        return False
+
+    '''
+    status, output = commands.getstatusoutput("systemctl enable s9301-32db-platform-monitor.service")
+    if status:
+        print "Enable s9301-32db-platform-monitor.service failed %d"%status
+        return False
+    status, output = commands.getstatusoutput("systemctl start s9301-32db-platform-monitor-fan.service")
+    if status:
+        print "Start s9301-32db-platform-monitor-fan.service failed %d"%status
+        return False
+        
+    status, output = commands.getstatusoutput("systemctl start s9301-32db-platform-monitor-psu.service")
+    if status:
+        print "Start s9301-32db-platform-monitor-psu.service failed %d"%status
+        return False
+    '''
+    return True
+
+def start_platform_pddf():   
+
+    status, output = commands.getstatusoutput("systemctl start pddf-platform-init.service")
+    if status:
+        print "Start pddf-platform-init.service failed %d"%status
+        return False
+    
+    return True
+
+def stop_platform_pddf():   
+
+    status, output = commands.getstatusoutput("systemctl stop pddf-platform-init.service")
+    if status:
+        print "Stop pddf-platform-init.service failed %d"%status
+        return False
+
+    return True
+

From 8c45508d23a048f83da39838d31a432bef89ae82 Mon Sep 17 00:00:00 2001
From: Stepan Blyshchak <38952541+stepanblyschak@users.noreply.github.com>
Date: Mon, 24 Jun 2024 18:44:26 +0300
Subject: [PATCH 0763/1115] [docker_image_ctl] flush ASIC_DB on fast boot
 (#19106)

- Why I did it

I observed an issue with fast-reboot that in a rare circumstances a queued FDB event might be written to ASIC_DB by a thread inside syncd after a call to FLUSHDB ASIC_DB was made.
That left ASIC_DB only with one record about that FDB entry and caused syncd to crash at start:

Mar 15 13:28:42.765108 sonic NOTICE syncd#SAI: :- Syncd: syncd started
Mar 15 13:28:42.765268 sonic NOTICE syncd#SAI: :- onSyncdStart: performing hard reinit since COLD start was performed
Mar 15 13:28:42.765451 sonic NOTICE syncd#SAI: :- readAsicState: loaded 1 switches
Mar 15 13:28:42.765465 sonic NOTICE syncd#SAI: :- readAsicState: switch VID: oid:0x21000000000000
Mar 15 13:28:42.765465 sonic NOTICE syncd#SAI: :- readAsicState: read asic state took 0.000205 sec
Mar 15 13:28:42.766364 sonic NOTICE syncd#SAI: :- onSyncdStart: on syncd start took 0.001097 sec
Mar 15 13:28:42.766376 sonic ERR syncd#SAI: :- run: Runtime error during syncd init: map::at
Mar 15 13:28:42.766376 sonic NOTICE syncd#SAI: :- sendShutdownRequest: sending switch_shutdown_request notification to OA for switch: oid:0x0
Mar 15 13:28:42.766518 sonic NOTICE syncd#SAI: :- sendShutdownRequestAfterException: notification send successfully
The fix is done in utilities in fast-reboot script, however in order to allow upgrade from a version without the fix, flush ASIC_DB at boot in fast-reboot as well.

Related to sonic-net/sonic-utilities#3342

- How I did it
Flush ASIC_DB on fast boot.

- How to verify it
Run fast-reboot.

Signed-off-by: Stepan Blyschak <stepanb@nvidia.com>
---
 files/build_templates/docker_image_ctl.j2 | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/files/build_templates/docker_image_ctl.j2 b/files/build_templates/docker_image_ctl.j2
index 36cf32771..1fb2dd5e8 100644
--- a/files/build_templates/docker_image_ctl.j2
+++ b/files/build_templates/docker_image_ctl.j2
@@ -243,6 +243,9 @@ function postStartAction()
             fi
 
             if [[ "$BOOT_TYPE" == "fast" ]]; then
+                # Flush ASIC DB. On fast-boot there should be nothing in there.
+                # In the older versions there has been an issue where a queued FDB event might get into ASIC_DB causing syncd crash at boot.
+                $SONIC_DB_CLI ASIC_DB FLUSHDB
                 # this is the case when base OS version does not support fast-reboot with reconciliation logic (dump.rdb is absent)
                 # In this case, we need to set the flag to indicate fast-reboot is in progress. Set the key to expire in 3 minutes
                 $SONIC_DB_CLI STATE_DB SET "FAST_REBOOT|system" "1" "EX" "180"

From d913b1b96f8417c1e1b7ddd863115b82fbbfbca8 Mon Sep 17 00:00:00 2001
From: Yutong Zhang <90831468+yutongzhang-microsoft@users.noreply.github.com>
Date: Tue, 25 Jun 2024 09:19:32 +0800
Subject: [PATCH 0764/1115] Pass two parameters into non-blocking PR test
 (#19346)

In this PR, we add two parameters STOP_ON_FAILURE: "False" and RETRY_TIMES: 0 into non-blocking T0 PR checker. Which means, one script will only execute once in a testplan, no matter if it fails. And one failed script will not block other remaining test scripts. Test plan will finish executing all test scripts.
---
 azure-pipelines.yml | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/azure-pipelines.yml b/azure-pipelines.yml
index 4144bf801..2a401789a 100644
--- a/azure-pipelines.yml
+++ b/azure-pipelines.yml
@@ -270,6 +270,8 @@ stages:
       - template: .azure-pipelines/run-test-elastictest-template.yml@sonic-mgmt
         parameters:
           TOPOLOGY: t0
+          STOP_ON_FAILURE: "False"
+          RETRY_TIMES: 0
           MIN_WORKER: $(T0_ONBOARDING_SONIC_INSTANCE_NUM)
           MAX_WORKER: $(T0_ONBOARDING_SONIC_INSTANCE_NUM)
           KVM_IMAGE_BRANCH: $(BUILD_BRANCH)

From 3d69f90e1556117197adb50d65f352f66198aac2 Mon Sep 17 00:00:00 2001
From: wenyiz2021 <91497961+wenyiz2021@users.noreply.github.com>
Date: Mon, 24 Jun 2024 18:22:15 -0700
Subject: [PATCH 0765/1115] Update sai.mk (#19382)

update SAI version to 10.1.25
update dnx debian name by adding "_dnx_" to avoid name conflict with XGS
---
 platform/broadcom/sai.mk | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/platform/broadcom/sai.mk b/platform/broadcom/sai.mk
index 78507f9a2..a6a9f6f98 100644
--- a/platform/broadcom/sai.mk
+++ b/platform/broadcom/sai.mk
@@ -1,7 +1,7 @@
 LIBSAIBCM_XGS_VERSION = 10.1.7.0
-LIBSAIBCM_DNX_VERSION = 10.1.21.0
+LIBSAIBCM_DNX_VERSION = 10.1.25.0
 LIBSAIBCM_XGS_BRANCH_NAME = SAI_10.1.0_GA
-LIBSAIBCM_DNX_BRANCH_NAME = SAI_10.1.21.1
+LIBSAIBCM_DNX_BRANCH_NAME = SAI_10.1.0_GA
 LIBSAIBCM_XGS_URL_PREFIX = "https://sonicstorage.blob.core.windows.net/public/sai/sai-broadcom/$(LIBSAIBCM_XGS_BRANCH_NAME)/$(LIBSAIBCM_XGS_VERSION)/xgs"
 LIBSAIBCM_DNX_URL_PREFIX = "https://sonicstorage.blob.core.windows.net/public/sai/sai-broadcom/$(LIBSAIBCM_DNX_BRANCH_NAME)/$(LIBSAIBCM_DNX_VERSION)/dnx"
 
@@ -12,7 +12,7 @@ $(eval $(call add_derived_package,$(BRCM_XGS_SAI),$(BRCM_XGS_SAI_DEV)))
 $(BRCM_XGS_SAI_DEV)_URL = "$(LIBSAIBCM_XGS_URL_PREFIX)/$(BRCM_XGS_SAI_DEV)"
 
 # SAI module for DNX Asic family
-BRCM_DNX_SAI = libsaibcm_$(LIBSAIBCM_DNX_VERSION)_amd64.deb
+BRCM_DNX_SAI = libsaibcm_dnx_$(LIBSAIBCM_DNX_VERSION)_amd64.deb
 $(BRCM_DNX_SAI)_URL = "$(LIBSAIBCM_DNX_URL_PREFIX)/$(BRCM_DNX_SAI)"
 
 SONIC_ONLINE_DEBS += $(BRCM_XGS_SAI)

From 1abd0deae1cf13c193715cf5225a9993c04936b9 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Tue, 25 Jun 2024 10:59:37 +0800
Subject: [PATCH 0766/1115] [submodule] Update submodule sonic-swss to the
 latest HEAD automatically (#19374)

#### Why I did it
src/sonic-swss
```
* 78af15dd - (HEAD -> master, origin/master, origin/HEAD) Use unix socket for redis connection (#3190) (2 days ago) [Junchao-Mellanox]
* 4b4aaf91 - [vlanmgr] use IP command for vlan_filtering and no_linklocal_learn, remove echo command (#3198) (2 days ago) [Mai Bui]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-swss | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-swss b/src/sonic-swss
index 70eb76632..78af15dd0 160000
--- a/src/sonic-swss
+++ b/src/sonic-swss
@@ -1 +1 @@
-Subproject commit 70eb7663280c7b37a969d6305aa4a24e17e32fa3
+Subproject commit 78af15dd0563046d7110f262e64ed4e5b4a1d3d2

From f147f1f742a0dfdf7f57a74d582f578bc39d1bbc Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Tue, 25 Jun 2024 19:10:05 +0800
Subject: [PATCH 0767/1115] [submodule] Update submodule linkmgrd to the latest
 HEAD automatically (#19371)

#### Why I did it
src/linkmgrd
```
* d0124f5 - (HEAD -> master, origin/master, origin/HEAD) [active-standby] Fix default route handler race condition (#254) (3 days ago) [Longxiang Lyu]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/linkmgrd | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/linkmgrd b/src/linkmgrd
index f96d40cfb..d0124f525 160000
--- a/src/linkmgrd
+++ b/src/linkmgrd
@@ -1 +1 @@
-Subproject commit f96d40cfbe4a771c60579935998ae2c52816c4ea
+Subproject commit d0124f5254395ca1dc4aa0853769ac8efdbf380d

From 885b79290f14992f67e6c1af4066ba4bc8dfdfb0 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Tue, 25 Jun 2024 22:04:24 +0800
Subject: [PATCH 0768/1115] [submodule] Update submodule sonic-linux-kernel to
 the latest HEAD automatically (#19367)

#### Why I did it
src/sonic-linux-kernel
```
* a128c86 - (HEAD -> master, origin/master, origin/HEAD) Add DesignWare PCI Core Support for AMD Ryzen Embedded processors (#395) (4 days ago) [Roger Ho]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-linux-kernel | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-linux-kernel b/src/sonic-linux-kernel
index 1f101c13d..a128c8653 160000
--- a/src/sonic-linux-kernel
+++ b/src/sonic-linux-kernel
@@ -1 +1 @@
-Subproject commit 1f101c13d3ccd692638f0aa253b0097f38783a6d
+Subproject commit a128c86539ab63afbce811a364ded5f670d4b8c3

From 8157b6658e245b4030a8fba288324e8cad60a415 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Tue, 25 Jun 2024 22:04:34 +0800
Subject: [PATCH 0769/1115] [submodule] Update submodule sonic-utilities to the
 latest HEAD automatically (#19333)

#### Why I did it
src/sonic-utilities
```
* 0e6a55ef - (HEAD -> master, origin/master, origin/HEAD) [fast-reboot] Backup database after syncd/swss stopped (#3342) (20 hours ago) [Stepan Blyshchak]
* c51758df - fix: fix show bgp summary output typo (#3375) (25 hours ago) [Chenyang Wang]
* cf7bfa29 - Add the definition of `log` in `script decode-syseeprom` (#3383) (4 days ago) [Yutong Zhang]
* 9d206af7 - [chassis][mutli-asic][lldp] "show lldp table/neighbors" displays error message in output on multi-asis linecard. (#3358) (5 days ago) [Marty Y. Lok]
* 515265a5 - Update TRANSCEIVER_FIRMWARE_INFO table for all targets in sfputil (#3370) (6 days ago) [mihirpat1]
* 3df762f1 - [config] no op if Golden Config is invalid (#3367) (7 days ago) [jingwenxie]
* 8f715acf - [config]Support single file reload for multiasic (#3349) (7 days ago) [jingwenxie]
* 31f5fa8e - Improve load_mingraph to wait eth0 restart before exit (#3365) (7 days ago) [Hua Liu]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-utilities | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-utilities b/src/sonic-utilities
index d0856afad..0e6a55ef5 160000
--- a/src/sonic-utilities
+++ b/src/sonic-utilities
@@ -1 +1 @@
-Subproject commit d0856afad1c6f7ead6eeca70531c988fb448c335
+Subproject commit 0e6a55ef5eac306ef61d6f0241625a6baee42ab8

From 898c42b1e97f197f74add7698c322f529cb03145 Mon Sep 17 00:00:00 2001
From: Chris <156943338+ccroy-arista@users.noreply.github.com>
Date: Tue, 25 Jun 2024 10:44:01 -0700
Subject: [PATCH 0770/1115] add 200G values to pg profile lookup (#19342)

This change adds 200G settings for Tomahawk 5 to the pg_profile_lookup.

Fixes: aristanetworks/sonic-qual.msft#159

Why I did it
This change is needed in order for some qos tests to run against TH5.

How I did it
Added the values then manually ran qos tests identified in the issue above to verify fix.

How to verify it
Run qos/test_qos_sai.py::TestQosSai::testParameter and confirm that the IndexError in the issue above does not occur.
---
 device/common/profiles/th5/gen/BALANCED/pg_profile_lookup.ini | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/device/common/profiles/th5/gen/BALANCED/pg_profile_lookup.ini b/device/common/profiles/th5/gen/BALANCED/pg_profile_lookup.ini
index ec695eca6..090370bc5 100644
--- a/device/common/profiles/th5/gen/BALANCED/pg_profile_lookup.ini
+++ b/device/common/profiles/th5/gen/BALANCED/pg_profile_lookup.ini
@@ -5,16 +5,19 @@
   40000  5m   1248    2288 66560   0        2288
   50000  5m   1248    2288 90272   0        2288
  100000  5m   1248    2288 165568  0        2288
+ 200000  5m   1248    2288 165568  0        2288
  400000  5m   1248    2288 165568  0        2288
   10000  40m  1248    2288 37024   0        2288
   25000  40m  1248    2288 53248   0        2288
   40000  40m  1248    2288 71552   0        2288
   50000  40m  1248    2288 96096   0        2288
  100000  40m  1248    2288 177632  0        2288
+ 200000  40m  1248    2288 177632  0        2288
  400000  40m  1248    2288 177632  0        2288
   10000  300m 1248    2288 46176   0        2288
   25000  300m 1248    2288 79040   0        2288
   40000  300m 1248    2288 108160  0        2288
   50000  300m 1248    2288 141856  0        2288
  100000  300m 1248    2288 268736  0        2288
+ 200000  300m 1248    2288 268736  0        2288
  400000  300m 1248    2288 268736  0        2288

From d23f4e3f102b869d92095ea3f17b192969c58a03 Mon Sep 17 00:00:00 2001
From: rick-arista <148895369+rick-arista@users.noreply.github.com>
Date: Tue, 25 Jun 2024 11:31:23 -0700
Subject: [PATCH 0771/1115] Fix QoS configuations for Quicksilver (#19315)

Adds egress_lossy_pool and fixes SAI error caused by TH5 default config

Why I did it
This change is needed to fix a SAI crash on boot. These values zero out the reserved buffer space that by default would cause the pools defined in config_db.json to fail to create due to insufficient remaining room.

How I did it
The buffer pool values were chosen by simply dividing the total available MMU memory into 3 pools.

How to verify it
Without this change device fails to boot correctly.
---
 .../th5-a7060x6-64de.config.bcm               | 92 +++++++++++++++++++
 .../buffer_ports.j2                           |  6 ++
 .../Arista-7060X6-64DE/buffer_ports.j2        |  6 ++
 .../th5-a7060x6-64de.config.bcm               | 92 +++++++++++++++++++
 .../th5-a7060x6-64pe.config.bcm               | 92 +++++++++++++++++++
 .../th5-a7060x6-64pe.config.bcm               | 92 +++++++++++++++++++
 .../th5-a7060x6-64pe.config.bcm               | 92 +++++++++++++++++++
 .../th5-a7060x6-64pe.config.bcm               | 92 +++++++++++++++++++
 .../th5/gen/BALANCED/buffers_defaults_t0.j2   | 33 ++++---
 .../th5/gen/BALANCED/buffers_defaults_t1.j2   | 33 ++++---
 10 files changed, 602 insertions(+), 28 deletions(-)
 create mode 100644 device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-64x400G/buffer_ports.j2
 create mode 100644 device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE/buffer_ports.j2

diff --git a/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-256x200G/th5-a7060x6-64de.config.bcm b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-256x200G/th5-a7060x6-64de.config.bcm
index 79ebb0dfe..bcd5bb3e5 100644
--- a/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-256x200G/th5-a7060x6-64de.config.bcm
+++ b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-256x200G/th5-a7060x6-64de.config.bcm
@@ -1926,3 +1926,95 @@ device:
         DEVICE_CONFIG:
             AUTOLOAD_BOARD_SETTINGS: 0
 ...
+## Baseline
+---
+device:
+    0:
+        TM_THD_CONFIG:
+            SKIP_BUFFER_RESERVATION: 1
+            THRESHOLD_MODE: LOSSY_AND_LOSSLESS
+...
+---
+device:
+    0:
+        TM_ING_THD_HEADROOM_POOL:
+            ?
+                BUFFER_POOL: [[0,1]]
+                TM_HEADROOM_POOL_ID: [[0,3]]
+            :
+                LIMIT_CELLS: 0
+
+        TM_ING_THD_SERVICE_POOL:
+            ?
+                BUFFER_POOL: [[0,1]]
+                TM_ING_SERVICE_POOL_ID: [[0,3]]
+            :
+                SHARED_LIMIT_CELLS: 0
+                SHARED_RESUME_OFFSET_CELLS: 0
+                COLOR_SPECIFIC_LIMITS: 0
+
+        TM_EGR_THD_SERVICE_POOL:
+            ?
+                BUFFER_POOL: [[0,1]]
+                TM_EGR_SERVICE_POOL_ID: [[0,3]]
+            :
+                SHARED_LIMIT_CELLS: 0
+                SHARED_RESUME_LIMIT_CELLS: 0
+                COLOR_SPECIFIC_LIMITS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 0
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 0
+                RED_SHARED_LIMIT_CELLS: 0
+                RED_SHARED_RESUME_LIMIT_CELLS: 0
+
+        TM_THD_MC_EGR_SERVICE_POOL:
+            ?
+                BUFFER_POOL: [[0,1]]
+                TM_EGR_SERVICE_POOL_ID: [[0,3]]
+            :
+                SHARED_LIMIT_CELLS: 0
+                SHARED_RESUME_LIMIT_CELLS: 0
+                COLOR_SPECIFIC_LIMITS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 0
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 0
+                RED_SHARED_LIMIT_CELLS: 0
+                RED_SHARED_RESUME_LIMIT_CELLS: 0
+
+        TM_ING_PORT_PRI_GRP:
+            ?
+                PORT_ID: [[1, 8],
+                          [11, 18],
+                          [22, 29],
+                          [33, 40],
+                          [44, 51],
+                          [55, 62],
+                          [66, 73],
+                          [77, 84],
+                          [88, 95],
+                          [99, 106],
+                          [110, 117],
+                          [121, 128],
+                          [132, 139],
+                          [143, 150],
+                          [154, 161],
+                          [165, 172],
+                          [176, 183],
+                          [187, 194],
+                          [198, 205],
+                          [209, 216],
+                          [220, 227],
+                          [231, 238],
+                          [242, 249],
+                          [253, 260],
+                          [264, 271],
+                          [275, 282],
+                          [286, 293],
+                          [297, 304],
+                          [308, 315],
+                          [319, 326],
+                          [330, 337],
+                          [341, 348]]
+                TM_PRI_GRP_ID: 3
+            :
+                PFC: 1
+                LOSSLESS: 1
+...
diff --git a/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-64x400G/buffer_ports.j2 b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-64x400G/buffer_ports.j2
new file mode 100644
index 000000000..6b6ae10e5
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-64x400G/buffer_ports.j2
@@ -0,0 +1,6 @@
+{%- macro generate_port_lists(PORT_ALL) %}
+    {# Generate list of ports #}
+    {%- for port_idx in range(0, 512, 8) %}
+        {%- if PORT_ALL.append("Ethernet%d" % (port_idx)) %}{%- endif %}
+    {%- endfor %}
+{%- endmacro %}
diff --git a/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE/buffer_ports.j2 b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE/buffer_ports.j2
new file mode 100644
index 000000000..6b6ae10e5
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE/buffer_ports.j2
@@ -0,0 +1,6 @@
+{%- macro generate_port_lists(PORT_ALL) %}
+    {# Generate list of ports #}
+    {%- for port_idx in range(0, 512, 8) %}
+        {%- if PORT_ALL.append("Ethernet%d" % (port_idx)) %}{%- endif %}
+    {%- endfor %}
+{%- endmacro %}
diff --git a/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE/th5-a7060x6-64de.config.bcm b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE/th5-a7060x6-64de.config.bcm
index afe53dfe8..ee71dbf00 100644
--- a/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE/th5-a7060x6-64de.config.bcm
+++ b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE/th5-a7060x6-64de.config.bcm
@@ -1158,3 +1158,95 @@ device:
         DEVICE_CONFIG:
             AUTOLOAD_BOARD_SETTINGS: 0
 ...
+## Baseline
+---
+device:
+    0:
+        TM_THD_CONFIG:
+            SKIP_BUFFER_RESERVATION: 1
+            THRESHOLD_MODE: LOSSY_AND_LOSSLESS
+...
+---
+device:
+    0:
+        TM_ING_THD_HEADROOM_POOL:
+            ?
+                BUFFER_POOL: [[0,1]]
+                TM_HEADROOM_POOL_ID: [[0,3]]
+            :
+                LIMIT_CELLS: 0
+
+        TM_ING_THD_SERVICE_POOL:
+            ?
+                BUFFER_POOL: [[0,1]]
+                TM_ING_SERVICE_POOL_ID: [[0,3]]
+            :
+                SHARED_LIMIT_CELLS: 0
+                SHARED_RESUME_OFFSET_CELLS: 0
+                COLOR_SPECIFIC_LIMITS: 0
+
+        TM_EGR_THD_SERVICE_POOL:
+            ?
+                BUFFER_POOL: [[0,1]]
+                TM_EGR_SERVICE_POOL_ID: [[0,3]]
+            :
+                SHARED_LIMIT_CELLS: 0
+                SHARED_RESUME_LIMIT_CELLS: 0
+                COLOR_SPECIFIC_LIMITS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 0
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 0
+                RED_SHARED_LIMIT_CELLS: 0
+                RED_SHARED_RESUME_LIMIT_CELLS: 0
+
+        TM_THD_MC_EGR_SERVICE_POOL:
+            ?
+                BUFFER_POOL: [[0,1]]
+                TM_EGR_SERVICE_POOL_ID: [[0,3]]
+            :
+                SHARED_LIMIT_CELLS: 0
+                SHARED_RESUME_LIMIT_CELLS: 0
+                COLOR_SPECIFIC_LIMITS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 0
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 0
+                RED_SHARED_LIMIT_CELLS: 0
+                RED_SHARED_RESUME_LIMIT_CELLS: 0
+
+        TM_ING_PORT_PRI_GRP:
+            ?
+                PORT_ID: [[1, 2],
+                          [11, 12],
+                          [22, 23],
+                          [33, 34],
+                          [44, 45],
+                          [55, 56],
+                          [66, 67],
+                          [77, 78],
+                          [88, 89],
+                          [99, 100],
+                          [110, 111],
+                          [121, 122],
+                          [132, 133],
+                          [143, 144],
+                          [154, 155],
+                          [165, 166],
+                          [176, 177],
+                          [187, 188],
+                          [198, 199],
+                          [209, 210],
+                          [220, 221],
+                          [231, 232],
+                          [242, 243],
+                          [253, 254],
+                          [264, 265],
+                          [275, 276],
+                          [286, 287],
+                          [297, 298],
+                          [308, 309],
+                          [319, 320],
+                          [330, 331],
+                          [341, 342]]
+                TM_PRI_GRP_ID: 3
+            :
+                PFC: 1
+                LOSSLESS: 1
+...
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-128x400G/th5-a7060x6-64pe.config.bcm b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-128x400G/th5-a7060x6-64pe.config.bcm
index 6915862e1..fb8b08882 100644
--- a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-128x400G/th5-a7060x6-64pe.config.bcm
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-128x400G/th5-a7060x6-64pe.config.bcm
@@ -1414,3 +1414,95 @@ device:
         DEVICE_CONFIG:
             AUTOLOAD_BOARD_SETTINGS: 0
 ...
+## Baseline
+---
+device:
+    0:
+        TM_THD_CONFIG:
+            SKIP_BUFFER_RESERVATION: 1
+            THRESHOLD_MODE: LOSSY_AND_LOSSLESS
+...
+---
+device:
+    0:
+        TM_ING_THD_HEADROOM_POOL:
+            ?
+                BUFFER_POOL: [[0,1]]
+                TM_HEADROOM_POOL_ID: [[0,3]]
+            :
+                LIMIT_CELLS: 0
+
+        TM_ING_THD_SERVICE_POOL:
+            ?
+                BUFFER_POOL: [[0,1]]
+                TM_ING_SERVICE_POOL_ID: [[0,3]]
+            :
+                SHARED_LIMIT_CELLS: 0
+                SHARED_RESUME_OFFSET_CELLS: 0
+                COLOR_SPECIFIC_LIMITS: 0
+
+        TM_EGR_THD_SERVICE_POOL:
+            ?
+                BUFFER_POOL: [[0,1]]
+                TM_EGR_SERVICE_POOL_ID: [[0,3]]
+            :
+                SHARED_LIMIT_CELLS: 0
+                SHARED_RESUME_LIMIT_CELLS: 0
+                COLOR_SPECIFIC_LIMITS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 0
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 0
+                RED_SHARED_LIMIT_CELLS: 0
+                RED_SHARED_RESUME_LIMIT_CELLS: 0
+
+        TM_THD_MC_EGR_SERVICE_POOL:
+            ?
+                BUFFER_POOL: [[0,1]]
+                TM_EGR_SERVICE_POOL_ID: [[0,3]]
+            :
+                SHARED_LIMIT_CELLS: 0
+                SHARED_RESUME_LIMIT_CELLS: 0
+                COLOR_SPECIFIC_LIMITS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 0
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 0
+                RED_SHARED_LIMIT_CELLS: 0
+                RED_SHARED_RESUME_LIMIT_CELLS: 0
+
+        TM_ING_PORT_PRI_GRP:
+            ?
+                PORT_ID: [[1, 4],
+                          [11, 14],
+                          [22, 25],
+                          [33, 36],
+                          [44, 47],
+                          [55, 58],
+                          [66, 69],
+                          [77, 80],
+                          [88, 91],
+                          [99, 102],
+                          [110, 113],
+                          [121, 124],
+                          [132, 135],
+                          [143, 146],
+                          [154, 157],
+                          [165, 168],
+                          [176, 179],
+                          [187, 190],
+                          [198, 201],
+                          [209, 212],
+                          [220, 223],
+                          [231, 234],
+                          [242, 245],
+                          [253, 256],
+                          [264, 267],
+                          [275, 278],
+                          [286, 289],
+                          [297, 300],
+                          [308, 311],
+                          [319, 322],
+                          [330, 333],
+                          [341, 344]]
+                TM_PRI_GRP_ID: 3
+            :
+                PFC: 1
+                LOSSLESS: 1
+...
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/th5-a7060x6-64pe.config.bcm b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/th5-a7060x6-64pe.config.bcm
index 103fff69e..7df89f432 100644
--- a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/th5-a7060x6-64pe.config.bcm
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/th5-a7060x6-64pe.config.bcm
@@ -1926,3 +1926,95 @@ device:
         DEVICE_CONFIG:
             AUTOLOAD_BOARD_SETTINGS: 0
 ...
+## Baseline
+---
+device:
+    0:
+        TM_THD_CONFIG:
+            SKIP_BUFFER_RESERVATION: 1
+            THRESHOLD_MODE: LOSSY_AND_LOSSLESS
+...
+---
+device:
+    0:
+        TM_ING_THD_HEADROOM_POOL:
+            ?
+                BUFFER_POOL: [[0,1]]
+                TM_HEADROOM_POOL_ID: [[0,3]]
+            :
+                LIMIT_CELLS: 0
+
+        TM_ING_THD_SERVICE_POOL:
+            ?
+                BUFFER_POOL: [[0,1]]
+                TM_ING_SERVICE_POOL_ID: [[0,3]]
+            :
+                SHARED_LIMIT_CELLS: 0
+                SHARED_RESUME_OFFSET_CELLS: 0
+                COLOR_SPECIFIC_LIMITS: 0
+
+        TM_EGR_THD_SERVICE_POOL:
+            ?
+                BUFFER_POOL: [[0,1]]
+                TM_EGR_SERVICE_POOL_ID: [[0,3]]
+            :
+                SHARED_LIMIT_CELLS: 0
+                SHARED_RESUME_LIMIT_CELLS: 0
+                COLOR_SPECIFIC_LIMITS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 0
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 0
+                RED_SHARED_LIMIT_CELLS: 0
+                RED_SHARED_RESUME_LIMIT_CELLS: 0
+
+        TM_THD_MC_EGR_SERVICE_POOL:
+            ?
+                BUFFER_POOL: [[0,1]]
+                TM_EGR_SERVICE_POOL_ID: [[0,3]]
+            :
+                SHARED_LIMIT_CELLS: 0
+                SHARED_RESUME_LIMIT_CELLS: 0
+                COLOR_SPECIFIC_LIMITS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 0
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 0
+                RED_SHARED_LIMIT_CELLS: 0
+                RED_SHARED_RESUME_LIMIT_CELLS: 0
+
+        TM_ING_PORT_PRI_GRP:
+            ?
+                PORT_ID: [[1, 8],
+                          [11, 18],
+                          [22, 29],
+                          [33, 40],
+                          [44, 51],
+                          [55, 62],
+                          [66, 73],
+                          [77, 84],
+                          [88, 95],
+                          [99, 106],
+                          [110, 117],
+                          [121, 128],
+                          [132, 139],
+                          [143, 150],
+                          [154, 161],
+                          [165, 172],
+                          [176, 183],
+                          [187, 194],
+                          [198, 205],
+                          [209, 216],
+                          [220, 227],
+                          [231, 238],
+                          [242, 249],
+                          [253, 260],
+                          [264, 271],
+                          [275, 282],
+                          [286, 293],
+                          [297, 304],
+                          [308, 315],
+                          [319, 326],
+                          [330, 337],
+                          [341, 348]]
+                TM_PRI_GRP_ID: 3
+            :
+                PFC: 1
+                LOSSLESS: 1
+...
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-64x400G/th5-a7060x6-64pe.config.bcm b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-64x400G/th5-a7060x6-64pe.config.bcm
index a8f3023f9..7f9f846f1 100644
--- a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-64x400G/th5-a7060x6-64pe.config.bcm
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-64x400G/th5-a7060x6-64pe.config.bcm
@@ -1158,3 +1158,95 @@ device:
         DEVICE_CONFIG:
             AUTOLOAD_BOARD_SETTINGS: 0
 ...
+## Baseline
+---
+device:
+    0:
+        TM_THD_CONFIG:
+            SKIP_BUFFER_RESERVATION: 1
+            THRESHOLD_MODE: LOSSY_AND_LOSSLESS
+...
+---
+device:
+    0:
+        TM_ING_THD_HEADROOM_POOL:
+            ?
+                BUFFER_POOL: [[0,1]]
+                TM_HEADROOM_POOL_ID: [[0,3]]
+            :
+                LIMIT_CELLS: 0
+
+        TM_ING_THD_SERVICE_POOL:
+            ?
+                BUFFER_POOL: [[0,1]]
+                TM_ING_SERVICE_POOL_ID: [[0,3]]
+            :
+                SHARED_LIMIT_CELLS: 0
+                SHARED_RESUME_OFFSET_CELLS: 0
+                COLOR_SPECIFIC_LIMITS: 0
+
+        TM_EGR_THD_SERVICE_POOL:
+            ?
+                BUFFER_POOL: [[0,1]]
+                TM_EGR_SERVICE_POOL_ID: [[0,3]]
+            :
+                SHARED_LIMIT_CELLS: 0
+                SHARED_RESUME_LIMIT_CELLS: 0
+                COLOR_SPECIFIC_LIMITS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 0
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 0
+                RED_SHARED_LIMIT_CELLS: 0
+                RED_SHARED_RESUME_LIMIT_CELLS: 0
+
+        TM_THD_MC_EGR_SERVICE_POOL:
+            ?
+                BUFFER_POOL: [[0,1]]
+                TM_EGR_SERVICE_POOL_ID: [[0,3]]
+            :
+                SHARED_LIMIT_CELLS: 0
+                SHARED_RESUME_LIMIT_CELLS: 0
+                COLOR_SPECIFIC_LIMITS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 0
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 0
+                RED_SHARED_LIMIT_CELLS: 0
+                RED_SHARED_RESUME_LIMIT_CELLS: 0
+
+        TM_ING_PORT_PRI_GRP:
+            ?
+                PORT_ID: [[1, 2],
+                          [11, 12],
+                          [22, 23],
+                          [33, 34],
+                          [44, 45],
+                          [55, 56],
+                          [66, 67],
+                          [77, 78],
+                          [88, 89],
+                          [99, 100],
+                          [110, 111],
+                          [121, 122],
+                          [132, 133],
+                          [143, 144],
+                          [154, 155],
+                          [165, 166],
+                          [176, 177],
+                          [187, 188],
+                          [198, 199],
+                          [209, 210],
+                          [220, 221],
+                          [231, 232],
+                          [242, 243],
+                          [253, 254],
+                          [264, 265],
+                          [275, 276],
+                          [286, 287],
+                          [297, 298],
+                          [308, 309],
+                          [319, 320],
+                          [330, 331],
+                          [341, 342]]
+                TM_PRI_GRP_ID: 3
+            :
+                PFC: 1
+                LOSSLESS: 1
+...
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE/th5-a7060x6-64pe.config.bcm b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE/th5-a7060x6-64pe.config.bcm
index 2db52548e..b1de8f9e1 100644
--- a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE/th5-a7060x6-64pe.config.bcm
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE/th5-a7060x6-64pe.config.bcm
@@ -1158,3 +1158,95 @@ device:
         DEVICE_CONFIG:
             AUTOLOAD_BOARD_SETTINGS: 0
 ...
+## Baseline
+---
+device:
+    0:
+        TM_THD_CONFIG:
+            SKIP_BUFFER_RESERVATION: 1
+            THRESHOLD_MODE: LOSSY_AND_LOSSLESS
+...
+---
+device:
+    0:
+        TM_ING_THD_HEADROOM_POOL:
+            ?
+                BUFFER_POOL: [[0,1]]
+                TM_HEADROOM_POOL_ID: [[0,3]]
+            :
+                LIMIT_CELLS: 0
+
+        TM_ING_THD_SERVICE_POOL:
+            ?
+                BUFFER_POOL: [[0,1]]
+                TM_ING_SERVICE_POOL_ID: [[0,3]]
+            :
+                SHARED_LIMIT_CELLS: 0
+                SHARED_RESUME_OFFSET_CELLS: 0
+                COLOR_SPECIFIC_LIMITS: 0
+
+        TM_EGR_THD_SERVICE_POOL:
+            ?
+                BUFFER_POOL: [[0,1]]
+                TM_EGR_SERVICE_POOL_ID: [[0,3]]
+            :
+                SHARED_LIMIT_CELLS: 0
+                SHARED_RESUME_LIMIT_CELLS: 0
+                COLOR_SPECIFIC_LIMITS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 0
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 0
+                RED_SHARED_LIMIT_CELLS: 0
+                RED_SHARED_RESUME_LIMIT_CELLS: 0
+
+        TM_THD_MC_EGR_SERVICE_POOL:
+            ?
+                BUFFER_POOL: [[0,1]]
+                TM_EGR_SERVICE_POOL_ID: [[0,3]]
+            :
+                SHARED_LIMIT_CELLS: 0
+                SHARED_RESUME_LIMIT_CELLS: 0
+                COLOR_SPECIFIC_LIMITS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 0
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 0
+                RED_SHARED_LIMIT_CELLS: 0
+                RED_SHARED_RESUME_LIMIT_CELLS: 0
+
+        TM_ING_PORT_PRI_GRP:
+            ?
+                PORT_ID: [[1, 2],
+                          [11, 12],
+                          [22, 23],
+                          [33, 34],
+                          [44, 45],
+                          [55, 56],
+                          [66, 67],
+                          [77, 78],
+                          [88, 89],
+                          [99, 100],
+                          [110, 111],
+                          [121, 122],
+                          [132, 133],
+                          [143, 144],
+                          [154, 155],
+                          [165, 166],
+                          [176, 177],
+                          [187, 188],
+                          [198, 199],
+                          [209, 210],
+                          [220, 221],
+                          [231, 232],
+                          [242, 243],
+                          [253, 254],
+                          [264, 265],
+                          [275, 276],
+                          [286, 287],
+                          [297, 298],
+                          [308, 309],
+                          [319, 320],
+                          [330, 331],
+                          [341, 342]]
+                TM_PRI_GRP_ID: 3
+            :
+                PFC: 1
+                LOSSLESS: 1
+...
diff --git a/device/common/profiles/th5/gen/BALANCED/buffers_defaults_t0.j2 b/device/common/profiles/th5/gen/BALANCED/buffers_defaults_t0.j2
index dc707599f..bc3aadd26 100644
--- a/device/common/profiles/th5/gen/BALANCED/buffers_defaults_t0.j2
+++ b/device/common/profiles/th5/gen/BALANCED/buffers_defaults_t0.j2
@@ -5,32 +5,37 @@
 {%- macro generate_buffer_pool_and_profiles() %}
     "BUFFER_POOL": {
         "ingress_lossless_pool": {
+            "size": "60000000",
             "type": "ingress",
             "mode": "dynamic",
-            "size": "60000000",
             "xoff": "22600000"
         },
+        "egress_lossy_pool": {
+            "size": "41300000",
+            "type": "egress",
+            "mode": "dynamic"
+        },
         "egress_lossless_pool": {
+            "size": "41300000",
             "type": "egress",
-            "mode": "static",
-            "size": "82600000"
+            "mode": "static"
         }
     },
     "BUFFER_PROFILE": {
         "ingress_lossy_profile": {
-            "pool": "ingress_lossless_pool",
-            "size": "0",
-            "dynamic_th": "3"
-        },
-        "egress_lossless_profile": {
-            "pool": "egress_lossless_pool",
-            "size": "0",
-            "static_th": "82600000"
+            "pool":"ingress_lossless_pool",
+            "size":"0",
+            "dynamic_th":"3"
         },
         "egress_lossy_profile": {
-            "pool": "egress_lossless_pool",
-            "size": "0",
-            "dynamic_th": "3"
+            "pool":"egress_lossy_pool",
+            "size":"4096",
+            "dynamic_th":"3"
+        },
+        "egress_lossless_profile": {
+            "pool":"egress_lossless_pool",
+            "size":"4096",
+            "static_th":"41300000"
         }
     },
 {%- endmacro %}
diff --git a/device/common/profiles/th5/gen/BALANCED/buffers_defaults_t1.j2 b/device/common/profiles/th5/gen/BALANCED/buffers_defaults_t1.j2
index dc707599f..bc3aadd26 100644
--- a/device/common/profiles/th5/gen/BALANCED/buffers_defaults_t1.j2
+++ b/device/common/profiles/th5/gen/BALANCED/buffers_defaults_t1.j2
@@ -5,32 +5,37 @@
 {%- macro generate_buffer_pool_and_profiles() %}
     "BUFFER_POOL": {
         "ingress_lossless_pool": {
+            "size": "60000000",
             "type": "ingress",
             "mode": "dynamic",
-            "size": "60000000",
             "xoff": "22600000"
         },
+        "egress_lossy_pool": {
+            "size": "41300000",
+            "type": "egress",
+            "mode": "dynamic"
+        },
         "egress_lossless_pool": {
+            "size": "41300000",
             "type": "egress",
-            "mode": "static",
-            "size": "82600000"
+            "mode": "static"
         }
     },
     "BUFFER_PROFILE": {
         "ingress_lossy_profile": {
-            "pool": "ingress_lossless_pool",
-            "size": "0",
-            "dynamic_th": "3"
-        },
-        "egress_lossless_profile": {
-            "pool": "egress_lossless_pool",
-            "size": "0",
-            "static_th": "82600000"
+            "pool":"ingress_lossless_pool",
+            "size":"0",
+            "dynamic_th":"3"
         },
         "egress_lossy_profile": {
-            "pool": "egress_lossless_pool",
-            "size": "0",
-            "dynamic_th": "3"
+            "pool":"egress_lossy_pool",
+            "size":"4096",
+            "dynamic_th":"3"
+        },
+        "egress_lossless_profile": {
+            "pool":"egress_lossless_pool",
+            "size":"4096",
+            "static_th":"41300000"
         }
     },
 {%- endmacro %}

From a42e9aa9f8b26e86384ece3981e6d2c050a55562 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Wed, 26 Jun 2024 16:01:23 +0800
Subject: [PATCH 0772/1115] [submodule] Update submodule sonic-platform-daemons
 to the latest HEAD automatically (#19354)

#### Why I did it
src/sonic-platform-daemons
```
* b145f32 - (HEAD -> master, origin/master, origin/HEAD) [xcvrd] change log content and log level when application is not found (#503) (7 days ago) [Junchao-Mellanox]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-platform-daemons | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-platform-daemons b/src/sonic-platform-daemons
index 6694d3b97..b145f32c1 160000
--- a/src/sonic-platform-daemons
+++ b/src/sonic-platform-daemons
@@ -1 +1 @@
-Subproject commit 6694d3b97c6d7d52c9f1544f22c5fd107bff3727
+Subproject commit b145f32c10de705bdd1c46a5d2857703e173b895

From 19ac10b014afff6a28a5832fe274d7c425211382 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Wed, 26 Jun 2024 16:01:30 +0800
Subject: [PATCH 0773/1115] [submodule] Update submodule sonic-platform-common
 to the latest HEAD automatically (#19150)

#### Why I did it
src/sonic-platform-common
```
* 8e673d5 - (HEAD -> master, origin/master, origin/HEAD) Update additional PN for Innolight and Eoptolink (#476) (21 hours ago) [Anoop Kamath]
* 51c6207 - Fix the temperature parsing in nvme disks (#475) (8 days ago) [Vivek]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-platform-common | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-platform-common b/src/sonic-platform-common
index cd6a5a42d..8e673d5cf 160000
--- a/src/sonic-platform-common
+++ b/src/sonic-platform-common
@@ -1 +1 @@
-Subproject commit cd6a5a42d2d9e4973afe1bc5d8b1b5ff5f02d54c
+Subproject commit 8e673d5cfcb9ee184950f4fb1d32f999cbb39735

From 1a2e7d1ab32b773712e82cceefe28786b2341bce Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Wed, 26 Jun 2024 19:04:54 +0800
Subject: [PATCH 0774/1115] [submodule] Update submodule sonic-swss to the
 latest HEAD automatically (#19394)

#### Why I did it
src/sonic-swss
```
* d20294a3 - (HEAD -> master, origin/master, origin/HEAD) Remove buffer maximum parameter table when the port is removed (#3199) (9 hours ago) [Stephen Sun]
* 1b87ce91 - Update oper_status of LAG_TABLE in state_db (#3195) (9 hours ago) [super-jiying]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-swss | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-swss b/src/sonic-swss
index 78af15dd0..d20294a38 160000
--- a/src/sonic-swss
+++ b/src/sonic-swss
@@ -1 +1 @@
-Subproject commit 78af15dd0563046d7110f262e64ed4e5b4a1d3d2
+Subproject commit d20294a3853d4de08e897c5c4a66c159ef2d9cdd

From 6d39f70ec73aa5518bec50865a9821e72ecbb409 Mon Sep 17 00:00:00 2001
From: Yaqiang Zhu <zyq1512099831@gmail.com>
Date: Thu, 27 Jun 2024 01:42:46 +0800
Subject: [PATCH 0775/1115] [dhcp_server] Add rsyslog support for dhcp_server
 (#19303)

Why I did it
Fix issue that dhcp_server doesn't create syslog into host #18472

Work item tracking
Microsoft ADO (number only): 28396389
How I did it
Modify rsyslog config template

How to verify it
UTs passed
Buildimage and install in testbed to verify
---
 dockers/docker-dhcp-server/Dockerfile.j2      |  6 +-
 dockers/docker-dhcp-server/docker_init.sh     |  5 -
 .../docker-dhcp-server/rsyslog/default.conf   | 27 ------
 files/build_templates/docker_image_ctl.j2     |  4 +
 files/image_config/rsyslog/rsyslog-config.sh  |  8 +-
 files/image_config/rsyslog/rsyslog.conf.j2    |  4 +
 .../tests/data/rsyslog/config_db.json         | 18 ++--
 .../tests/sample_output/py3/rsyslog.conf      | 24 ++---
 .../py3/rsyslog_with_docker0.conf             | 92 +++++++++++++++++++
 src/sonic-config-engine/tests/test_j2files.py | 23 ++++-
 10 files changed, 147 insertions(+), 64 deletions(-)
 delete mode 100644 dockers/docker-dhcp-server/rsyslog/default.conf
 rename dockers/docker-dhcp-server/rsyslog/rsyslog.conf.j2 => src/sonic-config-engine/tests/sample_output/py3/rsyslog.conf (67%)
 create mode 100644 src/sonic-config-engine/tests/sample_output/py3/rsyslog_with_docker0.conf

diff --git a/dockers/docker-dhcp-server/Dockerfile.j2 b/dockers/docker-dhcp-server/Dockerfile.j2
index 4ca46d5c5..3b4bf7587 100755
--- a/dockers/docker-dhcp-server/Dockerfile.j2
+++ b/dockers/docker-dhcp-server/Dockerfile.j2
@@ -3,7 +3,6 @@ FROM docker-config-engine-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}}
 
 ARG docker_container_name
 ARG image_version
-RUN [ -f /etc/rsyslog.conf ] && sed -ri "s/%syslogtag%/$docker_container_name#%syslogtag%/;" /etc/rsyslog.conf
 
 ## Make apt-get non-interactive
 ENV DEBIAN_FRONTEND=noninteractive
@@ -21,8 +20,6 @@ RUN apt-get update &&       \
 RUN mkdir -p /var/run/kea
 
 RUN pip3 install psutil
-# TODO issue on remote rsyslog server in non-host container
-RUN rm -f /etc/supervisor/conf.d/containercfgd.conf
 
 {% if docker_dhcp_server_debs.strip() -%}
 # Copy locally-built Debian package dependencies
@@ -52,11 +49,10 @@ RUN apt-get clean -y        && \
 COPY ["docker_init.sh", "start.sh", "/usr/bin/"]
 COPY ["supervisord.conf", "/etc/supervisor/conf.d/"]
 COPY ["files/supervisor-proc-exit-listener", "/usr/bin"]
-COPY ["rsyslog/rsyslog.conf.j2", "kea-dhcp4.conf.j2", "/usr/share/sonic/templates/"]
+COPY ["kea-dhcp4.conf.j2", "/usr/share/sonic/templates/"]
 COPY ["critical_processes", "/etc/supervisor/"]
 COPY ["lease_update.sh", "/etc/kea/"]
 COPY ["kea-dhcp4-init.conf", "/etc/kea/kea-dhcp4.conf"]
 COPY ["cli", "/cli/"]
-COPY ["rsyslog/default.conf", "/etc/rsyslog.d"]
 
 ENTRYPOINT ["/usr/bin/docker_init.sh"]
diff --git a/dockers/docker-dhcp-server/docker_init.sh b/dockers/docker-dhcp-server/docker_init.sh
index 5220f9ffe..a9ffc2735 100755
--- a/dockers/docker-dhcp-server/docker_init.sh
+++ b/dockers/docker-dhcp-server/docker_init.sh
@@ -7,11 +7,6 @@ mkdir -p /etc/supervisor/conf.d/
 mkdir -p /etc/kea/
 udp_server_ip=$(ip -j -4 addr list lo scope host | jq -r -M '.[0].addr_info[0].local')
 hostname=$(hostname)
-# Generate the following files from templates:
-# port-to-alias name map
-sonic-cfggen -d -t /usr/share/sonic/templates/rsyslog.conf.j2 \
-    -a "{\"udp_server_ip\": \"$udp_server_ip\", \"hostname\": \"$hostname\"}" \
-    > /etc/rsyslog.conf
 
 # Make the script that waits for all interfaces to come up executable
 chmod +x /etc/kea/lease_update.sh /usr/bin/start.sh
diff --git a/dockers/docker-dhcp-server/rsyslog/default.conf b/dockers/docker-dhcp-server/rsyslog/default.conf
deleted file mode 100644
index 77609410c..000000000
--- a/dockers/docker-dhcp-server/rsyslog/default.conf
+++ /dev/null
@@ -1,27 +0,0 @@
-#
-# First some standard log files.  Log by facility.
-#
-
-# Log all facilities to /var/log/syslog except cron, auth
-# and authpriv. They are noisy - log them to their own files
-*.*;cron,auth,authpriv.none     -/var/log/syslog
-auth,authpriv.*                 /var/log/auth.log
-cron.*                          /var/log/cron.log
-
-#
-# Emergencies are sent to everybody logged in.
-#
-*.emerg                         :omusrmsg:*
-
-# The named pipe /dev/xconsole is for the `xconsole' utility.  To use it,
-# you must invoke `xconsole' with the `-file' option:
-#
-#    $ xconsole -file /dev/xconsole [...]
-#
-# NOTE: adjust the list below, or you'll go crazy if you have a reasonably
-#      busy site..
-#
-#daemon.*;mail.*;\
-#        news.err;\
-#        *.=debug;*.=info;\
-#        *.=notice;*.=warn       |/dev/xconsole
diff --git a/files/build_templates/docker_image_ctl.j2 b/files/build_templates/docker_image_ctl.j2
index 1fb2dd5e8..7e64845c8 100644
--- a/files/build_templates/docker_image_ctl.j2
+++ b/files/build_templates/docker_image_ctl.j2
@@ -346,7 +346,11 @@ start() {
     fi
 
     # Default rsyslog target IP for single ASIC platform
+{%- if docker_container_name == "dhcp_server" %}
+    SYSLOG_TARGET_IP=$(docker network inspect bridge --format={{ "'{{(index .IPAM.Config 0).Gateway}}'" }})
+{%- else %}
     SYSLOG_TARGET_IP=127.0.0.1
+{%- endif %}
     if [[ ($NUM_ASIC -gt 1) ]]; then
         SYSLOG_TARGET_IP=$(docker network inspect bridge --format={{ "'{{(index .IPAM.Config 0).Gateway}}'" }})
     fi
diff --git a/files/image_config/rsyslog/rsyslog-config.sh b/files/image_config/rsyslog/rsyslog-config.sh
index 576351711..5f2870821 100755
--- a/files/image_config/rsyslog/rsyslog-config.sh
+++ b/files/image_config/rsyslog/rsyslog-config.sh
@@ -17,10 +17,16 @@ if [[ ($NUM_ASIC -gt 1) ]]; then
 else
     udp_server_ip=$(ip -j -4 addr list lo scope host | jq -r -M '.[0].addr_info[0].local')
 fi
+
+contain_dhcp_server=$(sonic-db-cli CONFIG_DB keys "FEATURE|dhcp_server")
+if [ $contain_dhcp_server ]; then
+    docker0_ip=$(ip -o -4 addr list docker0 | awk '{print $4}' | cut -d/ -f1)
+fi
+
 hostname=$(hostname)
 
 sonic-cfggen -d -t /usr/share/sonic/templates/rsyslog.conf.j2 \
-    -a "{\"udp_server_ip\": \"$udp_server_ip\", \"hostname\": \"$hostname\"}" \
+    -a "{\"udp_server_ip\": \"$udp_server_ip\", \"hostname\": \"$hostname\", \"docker0_ip\": \"$docker0_ip\"}" \
     > /etc/rsyslog.conf
 
 systemctl restart rsyslog
diff --git a/files/image_config/rsyslog/rsyslog.conf.j2 b/files/image_config/rsyslog/rsyslog.conf.j2
index dc88fc886..b68ba2e77 100644
--- a/files/image_config/rsyslog/rsyslog.conf.j2
+++ b/files/image_config/rsyslog/rsyslog.conf.j2
@@ -33,6 +33,10 @@ $ModLoad imklog   # provides kernel logging support
 $ModLoad imudp
 $UDPServerAddress {{udp_server_ip}}  #bind to localhost before udp server run
 $UDPServerRun 514
+{% if docker0_ip and docker0_ip != "" %}
+$UDPServerAddress {{docker0_ip}}
+$UDPServerRun 514
+{% endif%}
 
 # provides TCP syslog reception
 #$ModLoad imtcp
diff --git a/src/sonic-config-engine/tests/data/rsyslog/config_db.json b/src/sonic-config-engine/tests/data/rsyslog/config_db.json
index 74f7f8ecb..7cc58a131 100644
--- a/src/sonic-config-engine/tests/data/rsyslog/config_db.json
+++ b/src/sonic-config-engine/tests/data/rsyslog/config_db.json
@@ -207,22 +207,22 @@
     "DEVICE_NEIGHBOR_METADATA": {
         "ARISTA01T1": {
             "hwsku": "Arista-VM",
-            "mgmt_addr": "172.16.190.114",
+            "mgmt_addr": "3.3.3.14",
             "type": "LeafRouter"
         },
         "ARISTA02T1": {
             "hwsku": "Arista-VM",
-            "mgmt_addr": "172.16.190.115",
+            "mgmt_addr": "3.3.3.15",
             "type": "LeafRouter"
         },
         "ARISTA03T1": {
             "hwsku": "Arista-VM",
-            "mgmt_addr": "172.16.190.116",
+            "mgmt_addr": "3.3.3.16",
             "type": "LeafRouter"
         },
         "ARISTA04T1": {
             "hwsku": "Arista-VM",
-            "mgmt_addr": "172.16.190.117",
+            "mgmt_addr": "3.3.3.17",
             "type": "LeafRouter"
         }
     },
@@ -411,11 +411,11 @@
         "Loopback0|FC00:1::32/128": {}
     },
     "MGMT_INTERFACE": {
-        "eth0|10.150.22.115/23": {
-            "gwaddr": "10.150.22.1"
+        "eth0|1.1.1.15/23": {
+            "gwaddr": "1.1.1.10"
         },
-        "eth0|2404:f801:10:2200::a96:1673/64": {
-            "gwaddr": "2404:f801:10:2200::1"
+        "eth0|2404:::2/64": {
+            "gwaddr": "2404::1"
         }
     },
     "MGMT_PORT": {
@@ -867,7 +867,7 @@
         }
     },
     "SYSLOG_SERVER": {
-        "10.150.22.222": {}
+        "3.3.3.3": {}
     },
     "VERSIONS": {
         "DATABASE": {
diff --git a/dockers/docker-dhcp-server/rsyslog/rsyslog.conf.j2 b/src/sonic-config-engine/tests/sample_output/py3/rsyslog.conf
similarity index 67%
rename from dockers/docker-dhcp-server/rsyslog/rsyslog.conf.j2
rename to src/sonic-config-engine/tests/sample_output/py3/rsyslog.conf
index 664a6a5fb..e62c29781 100644
--- a/dockers/docker-dhcp-server/rsyslog/rsyslog.conf.j2
+++ b/src/sonic-config-engine/tests/sample_output/py3/rsyslog.conf
@@ -15,23 +15,14 @@
 
 $ModLoad imuxsock # provides support for local system logging
 
-{% set gconf = (SYSLOG_CONFIG | d({})).get('GLOBAL', {}) -%}
-{% set rate_limit_interval = gconf.get('rate_limit_interval') %}
-{% set rate_limit_burst = gconf.get('rate_limit_burst') %}
 
-{% if rate_limit_interval is not none %}
-$SystemLogRateLimitInterval {{ rate_limit_interval }}
-{% endif %}
-{% if rate_limit_burst is not none %}
-$SystemLogRateLimitBurst {{ rate_limit_burst }}
-{% endif %}
 
 $ModLoad imklog   # provides kernel logging support
 #$ModLoad immark  # provides --MARK-- message capability
 
 # provides UDP syslog reception
 $ModLoad imudp
-$UDPServerAddress {{udp_server_ip}}  #bind to localhost before udp server run
+$UDPServerAddress 1.1.1.1  #bind to localhost before udp server run
 $UDPServerRun 514
 
 # provides TCP syslog reception
@@ -42,8 +33,6 @@ $UDPServerRun 514
 ###########################
 #### GLOBAL DIRECTIVES ####
 ###########################
-{% set format = gconf.get('format', 'standard') -%}
-{% set fw_name = gconf.get('welf_firewall_name', hostname) -%}
 #
 # Use traditional timestamp format.
 # To enable high precision timestamps, comment out the following line.
@@ -51,12 +40,14 @@ $UDPServerRun 514
 #$ActionFileDefaultTemplate RSYSLOG_TraditionalFileFormat
 
 # Define a custom template
-$template SONiCFileFormat,"%TIMESTAMP%.%timestamp:::date-subseconds% %HOSTNAME% %syslogseverity-text:::uppercase% dhcp_server#%syslogtag%%msg:::sp-if-no-1st-sp%%msg:::drop-last-lf%\n"
+$template SONiCFileFormat,"%timegenerated:::date-year% %timegenerated%.%timegenerated:::date-subseconds% %HOSTNAME% %syslogseverity-text:::uppercase% %syslogtag%%msg:::sp-if-no-1st-sp%%msg:::drop-last-lf%\n"
 $ActionFileDefaultTemplate SONiCFileFormat
+$template SONiCForwardFormat,"<%PRI%>%TIMESTAMP:::date-rfc3339% %HOSTNAME% %syslogseverity-text:::uppercase% %syslogtag%%msg:::sp-if-no-1st-sp%%msg:::drop-last-lf%\n"
+$ActionForwardDefaultTemplate SONiCForwardFormat
 
 template(name="WelfRemoteFormat" type="string" string="%TIMESTAMP% id=firewall time=\"%timereported\
 :::date-year%-%timereported:::date-month%-%timereported:::date-day% %timereported:::date-hour%:%timereported:::date-minute%:%timereported\
-:::date-second%\" fw=\"{{ fw_name }}\" pri=%syslogpriority% msg=\"%syslogtag%%msg:::sp-if-no-1st-sp%%msg:::drop-last-lf%\"\n")
+:::date-second%\" fw=\"kvm-host\" pri=%syslogpriority% msg=\"%syslogtag%%msg:::sp-if-no-1st-sp%%msg:::drop-last-lf%\"\n")
 
 #
 # Set the default permissions for all log files.
@@ -93,4 +84,7 @@ $RepeatedMsgReduction on
 # The omfwd plug-in provides the core functionality of traditional message
 # forwarding via UDP and plain TCP. It is a built-in module that does not need
 # to be loaded.
-# TODO rsyslog issue in bridge mode container, don't update to remote server for now
+
+*.*
+action(type="omfwd" Target="3.3.3.3" Port="514" Protocol="udp" Template="SONiCForwardFormat")
+
diff --git a/src/sonic-config-engine/tests/sample_output/py3/rsyslog_with_docker0.conf b/src/sonic-config-engine/tests/sample_output/py3/rsyslog_with_docker0.conf
new file mode 100644
index 000000000..0c845227a
--- /dev/null
+++ b/src/sonic-config-engine/tests/sample_output/py3/rsyslog_with_docker0.conf
@@ -0,0 +1,92 @@
+###############################################################################
+# Managed by Ansible
+# file: ansible/roles/acs/templates/rsyslog.conf.j2
+###############################################################################
+#
+#  /etc/rsyslog.conf    Configuration file for rsyslog.
+#
+#                       For more information see
+#                       /usr/share/doc/rsyslog-doc/html/rsyslog_conf.html
+
+
+#################
+#### MODULES ####
+#################
+
+$ModLoad imuxsock # provides support for local system logging
+
+
+
+$ModLoad imklog   # provides kernel logging support
+#$ModLoad immark  # provides --MARK-- message capability
+
+# provides UDP syslog reception
+$ModLoad imudp
+$UDPServerAddress 1.1.1.1  #bind to localhost before udp server run
+$UDPServerRun 514
+$UDPServerAddress 2.2.2.2
+$UDPServerRun 514
+
+# provides TCP syslog reception
+#$ModLoad imtcp
+#$InputTCPServerRun 514
+
+
+###########################
+#### GLOBAL DIRECTIVES ####
+###########################
+#
+# Use traditional timestamp format.
+# To enable high precision timestamps, comment out the following line.
+#
+#$ActionFileDefaultTemplate RSYSLOG_TraditionalFileFormat
+
+# Define a custom template
+$template SONiCFileFormat,"%timegenerated:::date-year% %timegenerated%.%timegenerated:::date-subseconds% %HOSTNAME% %syslogseverity-text:::uppercase% %syslogtag%%msg:::sp-if-no-1st-sp%%msg:::drop-last-lf%\n"
+$ActionFileDefaultTemplate SONiCFileFormat
+$template SONiCForwardFormat,"<%PRI%>%TIMESTAMP:::date-rfc3339% %HOSTNAME% %syslogseverity-text:::uppercase% %syslogtag%%msg:::sp-if-no-1st-sp%%msg:::drop-last-lf%\n"
+$ActionForwardDefaultTemplate SONiCForwardFormat
+
+template(name="WelfRemoteFormat" type="string" string="%TIMESTAMP% id=firewall time=\"%timereported\
+:::date-year%-%timereported:::date-month%-%timereported:::date-day% %timereported:::date-hour%:%timereported:::date-minute%:%timereported\
+:::date-second%\" fw=\"kvm-host\" pri=%syslogpriority% msg=\"%syslogtag%%msg:::sp-if-no-1st-sp%%msg:::drop-last-lf%\"\n")
+
+#
+# Set the default permissions for all log files.
+#
+$FileOwner root
+$FileGroup adm
+$FileCreateMode 0640
+$DirCreateMode 0755
+$Umask 0022
+
+#
+# Where to place spool and state files
+#
+$WorkDirectory /var/spool/rsyslog
+
+#
+# Include all config files in /etc/rsyslog.d/
+#
+$IncludeConfig /etc/rsyslog.d/*.conf
+
+#
+# Suppress duplicate messages and report "message repeated n times"
+#
+$RepeatedMsgReduction on
+
+###############
+#### RULES ####
+###############
+
+#
+# Remote syslog logging
+#
+
+# The omfwd plug-in provides the core functionality of traditional message
+# forwarding via UDP and plain TCP. It is a built-in module that does not need
+# to be loaded.
+
+*.*
+action(type="omfwd" Target="3.3.3.3" Port="514" Protocol="udp" Template="SONiCForwardFormat")
+
diff --git a/src/sonic-config-engine/tests/test_j2files.py b/src/sonic-config-engine/tests/test_j2files.py
index cf8907bf1..4eca4fdfd 100644
--- a/src/sonic-config-engine/tests/test_j2files.py
+++ b/src/sonic-config-engine/tests/test_j2files.py
@@ -759,9 +759,10 @@ def test_rsyslog_conf(self):
             # Skip on python2 as the change will not be backported to previous version
             return
 
-        conf_template = os.path.join(self.test_dir, '..', '..', '..', 'files', 'image_config', 'rsyslog', 'rsyslog.conf.j2')
+        conf_template = os.path.join(self.test_dir, '..', '..', '..', 'files', 'image_config', 'rsyslog',
+                                     'rsyslog.conf.j2')
         config_db_json = os.path.join(self.test_dir, "data", "rsyslog", "config_db.json")
-        additional_data = "{\"udp_server_ip\": \"10.150.22.222\", \"hostname\": \"kvm-host\"}"
+        additional_data = "{\"udp_server_ip\": \"1.1.1.1\", \"hostname\": \"kvm-host\"}"
 
         argument = ['-j', config_db_json, '-t', conf_template, '-a', additional_data]
         self.run_script(argument, output_file=self.output_file)
@@ -769,6 +770,24 @@ def test_rsyslog_conf(self):
             pattern = r'^action.*Device="eth0".*'
             for line in file:
                 assert not bool(re.match(pattern, line.strip())), "eth0 is not allowed in Mgfx device"
+        self.assertTrue(utils.cmp(os.path.join(self.test_dir, 'sample_output', utils.PYvX_DIR, 'rsyslog.conf'),
+                                  self.output_file))
+
+    def test_rsyslog_conf_docker0_ip(self):
+        if utils.PYvX_DIR != 'py3':
+            # Skip on python2 as the change will not be backported to previous version
+            return
+
+        conf_template = os.path.join(self.test_dir, '..', '..', '..', 'files', 'image_config', 'rsyslog',
+                                     'rsyslog.conf.j2')
+        config_db_json = os.path.join(self.test_dir, "data", "rsyslog", "config_db.json")
+        additional_data = "{\"udp_server_ip\": \"1.1.1.1\", \"hostname\": \"kvm-host\", " + \
+                          "\"docker0_ip\": \"2.2.2.2\"}"
+
+        argument = ['-j', config_db_json, '-t', conf_template, '-a', additional_data]
+        self.run_script(argument, output_file=self.output_file)
+        self.assertTrue(utils.cmp(os.path.join(self.test_dir, 'sample_output', utils.PYvX_DIR,
+                                               'rsyslog_with_docker0.conf'), self.output_file))
 
     def tearDown(self):
         os.environ["CFGGEN_UNIT_TESTING"] = ""

From 11b5e378eb90ca5c7d62ace2beddc9bfa3d93b6a Mon Sep 17 00:00:00 2001
From: vmittal-msft <46945843+vmittal-msft@users.noreply.github.com>
Date: Wed, 26 Jun 2024 14:27:27 -0700
Subject: [PATCH 0776/1115] Updated MMU settings for Nokia 400g and 100g HWSKUs
 (#18239)

* Updated MMU settings for Nokia 400g and 100g HWSKUs
* Updated Nokia MMU settings for dynamic threholding
---
 .../0/buffers_defaults_t2.j2                  |  8 ++---
 .../0/pg_profile_lookup.ini                   | 30 +++++++++----------
 .../1/buffers_defaults_t2.j2                  |  8 ++---
 .../1/pg_profile_lookup.ini                   | 30 +++++++++----------
 .../0/buffers_defaults_t2.j2                  |  8 ++---
 .../0/pg_profile_lookup.ini                   | 30 +++++++++----------
 .../1/buffers_defaults_t2.j2                  |  8 ++---
 .../1/pg_profile_lookup.ini                   | 30 +++++++++----------
 .../py2/buffer-nokia-ixr7250e-36x100g.json    |  8 ++---
 .../py2/buffer-nokia-ixr7250e-36x400g.json    |  8 ++---
 .../py3/buffer-nokia-ixr7250e-36x100g.json    |  8 ++---
 .../py3/buffer-nokia-ixr7250e-36x400g.json    |  8 ++---
 12 files changed, 92 insertions(+), 92 deletions(-)

diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/0/buffers_defaults_t2.j2 b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/0/buffers_defaults_t2.j2
index 4862eca56..efa127423 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/0/buffers_defaults_t2.j2
+++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/0/buffers_defaults_t2.j2
@@ -28,14 +28,14 @@
     "BUFFER_PROFILE": {
         "ingress_lossy_profile": {
             "pool":"ingress_lossless_pool",
-            "size":"1280",
-	    "xon_offset": "2560",
-            "dynamic_th":"0"
+            "size":"0",
+	    "xon_offset": "0",
+            "dynamic_th":"-6"
         },
         "egress_lossless_profile": {
             "pool":"ingress_lossless_pool",
             "size":"0",
-            "static_th":"33030144"
+            "dynamic_th":"-1"
         },
         "egress_lossy_profile": {
             "pool":"ingress_lossless_pool",
diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/0/pg_profile_lookup.ini b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/0/pg_profile_lookup.ini
index e8289ab03..5670401e0 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/0/pg_profile_lookup.ini
+++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/0/pg_profile_lookup.ini
@@ -1,17 +1,17 @@
 # PG lossless profiles.
 # speed cable    size    xon  xoff threshold xon_offset
- 40000   300m    1280    2560 69632    0        1280
- 100000  300m    1280    2560 110592   0        1280
- 400000  300m    1280    2560 315392   0        1280
- 40000   1000m   1280    2560 114688   0        1280
- 100000  1000m   1280    2560 225280   0        1280
- 400000  1000m   1280    2560 778240   0        1280
- 40000   2000m   1280    2560 184320   0        1280
- 100000  2000m   1280    2560 393216   0        1280
- 400000  2000m   1280    2560 1445888  0        1280
- 40000   80000m  1280    2560 5369856  0        1280
- 100000  80000m  1280    2560 13357056 0        1280
- 400000  80000m  1280    2560 53305344 0        1280
- 40000   120000m 1280    2560 8028160  0        1280
- 100000  120000m 1280    2560 20004864 0        1280
- 400000  120000m 1280    2560 79900672 0        1280
+ 40000   300m      0    2560 69632    -6      181753
+ 100000  300m      0    2560 110592   -6      363506
+ 400000  300m      0    2560 315392   -6      1454025
+ 40000   1000m     0    2560 114688   -6      181753
+ 100000  1000m     0    2560 225280   -6      363506
+ 400000  1000m     0    2560 778240   -6      1454025
+ 40000   2000m     0    2560 184320   -6      181753
+ 100000  2000m     0    2560 393216   -6      363506
+ 400000  2000m     0    2560 1445888  -6      1454025
+ 40000   80000m    0    2560 5369856  -6      181753
+ 100000  80000m    0    2560 13357056 -6      363506
+ 400000  80000m    0    2560 53305344 -6      1454025
+ 40000   120000m   0    2560 8028160  -6      181753
+ 100000  120000m   0    2560 20004864 -6      363506
+ 400000  120000m   0    2560 79900672 -6      1454025
diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/1/buffers_defaults_t2.j2 b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/1/buffers_defaults_t2.j2
index 4862eca56..efa127423 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/1/buffers_defaults_t2.j2
+++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/1/buffers_defaults_t2.j2
@@ -28,14 +28,14 @@
     "BUFFER_PROFILE": {
         "ingress_lossy_profile": {
             "pool":"ingress_lossless_pool",
-            "size":"1280",
-	    "xon_offset": "2560",
-            "dynamic_th":"0"
+            "size":"0",
+	    "xon_offset": "0",
+            "dynamic_th":"-6"
         },
         "egress_lossless_profile": {
             "pool":"ingress_lossless_pool",
             "size":"0",
-            "static_th":"33030144"
+            "dynamic_th":"-1"
         },
         "egress_lossy_profile": {
             "pool":"ingress_lossless_pool",
diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/1/pg_profile_lookup.ini b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/1/pg_profile_lookup.ini
index e8289ab03..b1dd17d9d 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/1/pg_profile_lookup.ini
+++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/1/pg_profile_lookup.ini
@@ -1,17 +1,17 @@
 # PG lossless profiles.
 # speed cable    size    xon  xoff threshold xon_offset
- 40000   300m    1280    2560 69632    0        1280
- 100000  300m    1280    2560 110592   0        1280
- 400000  300m    1280    2560 315392   0        1280
- 40000   1000m   1280    2560 114688   0        1280
- 100000  1000m   1280    2560 225280   0        1280
- 400000  1000m   1280    2560 778240   0        1280
- 40000   2000m   1280    2560 184320   0        1280
- 100000  2000m   1280    2560 393216   0        1280
- 400000  2000m   1280    2560 1445888  0        1280
- 40000   80000m  1280    2560 5369856  0        1280
- 100000  80000m  1280    2560 13357056 0        1280
- 400000  80000m  1280    2560 53305344 0        1280
- 40000   120000m 1280    2560 8028160  0        1280
- 100000  120000m 1280    2560 20004864 0        1280
- 400000  120000m 1280    2560 79900672 0        1280
+ 40000   300m      0    2560 69632    -6      181753
+ 100000  300m      0    2560 110592   -6      363506
+ 400000  300m      0    2560 315392   -6      1454025
+ 40000   1000m     0    2560 114688   -6      181753
+ 100000  1000m     0    2560 225280   -6      363506
+ 400000  1000m     0    2560 778240   -6      1454025
+ 40000   2000m     0    2560 184320   -6      181753
+ 100000  2000m     0    2560 393216   -6      363506
+ 400000  2000m     0    2560 1445888  -6      1454025
+ 40000   80000m    0    2560 5369856  -6      181753
+ 100000  80000m    0    2560 13357056 -6      363506
+ 400000  80000m    0    2560 53305344 -6      1454025
+ 40000   120000m   0    2560 8028160  -6      181753
+ 100000  120000m   0    2560 20004864 -6      363506
+ 400000  120000m   0    2560 79900672 -6      1454025 
diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/0/buffers_defaults_t2.j2 b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/0/buffers_defaults_t2.j2
index f6ceecc55..2b6dd17b6 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/0/buffers_defaults_t2.j2
+++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/0/buffers_defaults_t2.j2
@@ -28,14 +28,14 @@
     "BUFFER_PROFILE": {
         "ingress_lossy_profile": {
             "pool":"ingress_lossless_pool",
-            "size":"1280",
-	    "xon_offset": "2560",
-            "dynamic_th":"0"
+            "size":"0",
+	    "xon_offset": "0",
+            "dynamic_th":"-5"
         },
         "egress_lossless_profile": {
             "pool":"ingress_lossless_pool",
             "size":"0",
-            "static_th":"33030144"
+            "dynamic_th":"-1"
         },
         "egress_lossy_profile": {
             "pool":"ingress_lossless_pool",
diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/0/pg_profile_lookup.ini b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/0/pg_profile_lookup.ini
index e8289ab03..99fbd830e 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/0/pg_profile_lookup.ini
+++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/0/pg_profile_lookup.ini
@@ -1,17 +1,17 @@
 # PG lossless profiles.
 # speed cable    size    xon  xoff threshold xon_offset
- 40000   300m    1280    2560 69632    0        1280
- 100000  300m    1280    2560 110592   0        1280
- 400000  300m    1280    2560 315392   0        1280
- 40000   1000m   1280    2560 114688   0        1280
- 100000  1000m   1280    2560 225280   0        1280
- 400000  1000m   1280    2560 778240   0        1280
- 40000   2000m   1280    2560 184320   0        1280
- 100000  2000m   1280    2560 393216   0        1280
- 400000  2000m   1280    2560 1445888  0        1280
- 40000   80000m  1280    2560 5369856  0        1280
- 100000  80000m  1280    2560 13357056 0        1280
- 400000  80000m  1280    2560 53305344 0        1280
- 40000   120000m 1280    2560 8028160  0        1280
- 100000  120000m 1280    2560 20004864 0        1280
- 400000  120000m 1280    2560 79900672 0        1280
+ 40000   300m      0    2560 69632    -5      181753
+ 100000  300m      0    2560 110592   -5      363506
+ 400000  300m      0    2560 315392   -5      1454025
+ 40000   1000m     0    2560 114688   -5      181753
+ 100000  1000m     0    2560 225280   -5      363506
+ 400000  1000m     0    2560 778240   -5      1454025
+ 40000   2000m     0    2560 184320   -5      181753
+ 100000  2000m     0    2560 393216   -5      363506
+ 400000  2000m     0    2560 1445888  -5      1454025
+ 40000   80000m    0    2560 5369856  -5      181753
+ 100000  80000m    0    2560 13357056 -5      363506
+ 400000  80000m    0    2560 53305344 -5      1454025
+ 40000   120000m   0    2560 8028160  -5      181753
+ 100000  120000m   0    2560 20004864 -5      363506
+ 400000  120000m   0    2560 79900672 -5      1454025
diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/1/buffers_defaults_t2.j2 b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/1/buffers_defaults_t2.j2
index f6ceecc55..2b6dd17b6 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/1/buffers_defaults_t2.j2
+++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/1/buffers_defaults_t2.j2
@@ -28,14 +28,14 @@
     "BUFFER_PROFILE": {
         "ingress_lossy_profile": {
             "pool":"ingress_lossless_pool",
-            "size":"1280",
-	    "xon_offset": "2560",
-            "dynamic_th":"0"
+            "size":"0",
+	    "xon_offset": "0",
+            "dynamic_th":"-5"
         },
         "egress_lossless_profile": {
             "pool":"ingress_lossless_pool",
             "size":"0",
-            "static_th":"33030144"
+            "dynamic_th":"-1"
         },
         "egress_lossy_profile": {
             "pool":"ingress_lossless_pool",
diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/1/pg_profile_lookup.ini b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/1/pg_profile_lookup.ini
index e8289ab03..99fbd830e 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/1/pg_profile_lookup.ini
+++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/1/pg_profile_lookup.ini
@@ -1,17 +1,17 @@
 # PG lossless profiles.
 # speed cable    size    xon  xoff threshold xon_offset
- 40000   300m    1280    2560 69632    0        1280
- 100000  300m    1280    2560 110592   0        1280
- 400000  300m    1280    2560 315392   0        1280
- 40000   1000m   1280    2560 114688   0        1280
- 100000  1000m   1280    2560 225280   0        1280
- 400000  1000m   1280    2560 778240   0        1280
- 40000   2000m   1280    2560 184320   0        1280
- 100000  2000m   1280    2560 393216   0        1280
- 400000  2000m   1280    2560 1445888  0        1280
- 40000   80000m  1280    2560 5369856  0        1280
- 100000  80000m  1280    2560 13357056 0        1280
- 400000  80000m  1280    2560 53305344 0        1280
- 40000   120000m 1280    2560 8028160  0        1280
- 100000  120000m 1280    2560 20004864 0        1280
- 400000  120000m 1280    2560 79900672 0        1280
+ 40000   300m      0    2560 69632    -5      181753
+ 100000  300m      0    2560 110592   -5      363506
+ 400000  300m      0    2560 315392   -5      1454025
+ 40000   1000m     0    2560 114688   -5      181753
+ 100000  1000m     0    2560 225280   -5      363506
+ 400000  1000m     0    2560 778240   -5      1454025
+ 40000   2000m     0    2560 184320   -5      181753
+ 100000  2000m     0    2560 393216   -5      363506
+ 400000  2000m     0    2560 1445888  -5      1454025
+ 40000   80000m    0    2560 5369856  -5      181753
+ 100000  80000m    0    2560 13357056 -5      363506
+ 400000  80000m    0    2560 53305344 -5      1454025
+ 40000   120000m   0    2560 8028160  -5      181753
+ 100000  120000m   0    2560 20004864 -5      363506
+ 400000  120000m   0    2560 79900672 -5      1454025
diff --git a/src/sonic-config-engine/tests/sample_output/py2/buffer-nokia-ixr7250e-36x100g.json b/src/sonic-config-engine/tests/sample_output/py2/buffer-nokia-ixr7250e-36x100g.json
index 3eb37c2ea..29201518d 100644
--- a/src/sonic-config-engine/tests/sample_output/py2/buffer-nokia-ixr7250e-36x100g.json
+++ b/src/sonic-config-engine/tests/sample_output/py2/buffer-nokia-ixr7250e-36x100g.json
@@ -33,14 +33,14 @@
     "BUFFER_PROFILE": {
         "ingress_lossy_profile": {
             "pool":"ingress_lossless_pool",
-            "size":"1280",
-	    "xon_offset": "2560",
-            "dynamic_th":"0"
+            "size":"0",
+	    "xon_offset": "0",
+            "dynamic_th":"-6"
         },
         "egress_lossless_profile": {
             "pool":"ingress_lossless_pool",
             "size":"0",
-            "static_th":"33030144"
+            "dynamic_th":"-1"
         },
         "egress_lossy_profile": {
             "pool":"ingress_lossless_pool",
diff --git a/src/sonic-config-engine/tests/sample_output/py2/buffer-nokia-ixr7250e-36x400g.json b/src/sonic-config-engine/tests/sample_output/py2/buffer-nokia-ixr7250e-36x400g.json
index ef1882e06..9e5058ec1 100644
--- a/src/sonic-config-engine/tests/sample_output/py2/buffer-nokia-ixr7250e-36x400g.json
+++ b/src/sonic-config-engine/tests/sample_output/py2/buffer-nokia-ixr7250e-36x400g.json
@@ -33,14 +33,14 @@
     "BUFFER_PROFILE": {
         "ingress_lossy_profile": {
             "pool":"ingress_lossless_pool",
-            "size":"1280",
-	    "xon_offset": "2560",
-            "dynamic_th":"0"
+            "size":"0",
+	    "xon_offset": "0",
+            "dynamic_th":"-5"
         },
         "egress_lossless_profile": {
             "pool":"ingress_lossless_pool",
             "size":"0",
-            "static_th":"33030144"
+            "dynamic_th":"-1"
         },
         "egress_lossy_profile": {
             "pool":"ingress_lossless_pool",
diff --git a/src/sonic-config-engine/tests/sample_output/py3/buffer-nokia-ixr7250e-36x100g.json b/src/sonic-config-engine/tests/sample_output/py3/buffer-nokia-ixr7250e-36x100g.json
index 3eb37c2ea..29201518d 100644
--- a/src/sonic-config-engine/tests/sample_output/py3/buffer-nokia-ixr7250e-36x100g.json
+++ b/src/sonic-config-engine/tests/sample_output/py3/buffer-nokia-ixr7250e-36x100g.json
@@ -33,14 +33,14 @@
     "BUFFER_PROFILE": {
         "ingress_lossy_profile": {
             "pool":"ingress_lossless_pool",
-            "size":"1280",
-	    "xon_offset": "2560",
-            "dynamic_th":"0"
+            "size":"0",
+	    "xon_offset": "0",
+            "dynamic_th":"-6"
         },
         "egress_lossless_profile": {
             "pool":"ingress_lossless_pool",
             "size":"0",
-            "static_th":"33030144"
+            "dynamic_th":"-1"
         },
         "egress_lossy_profile": {
             "pool":"ingress_lossless_pool",
diff --git a/src/sonic-config-engine/tests/sample_output/py3/buffer-nokia-ixr7250e-36x400g.json b/src/sonic-config-engine/tests/sample_output/py3/buffer-nokia-ixr7250e-36x400g.json
index ef1882e06..9e5058ec1 100644
--- a/src/sonic-config-engine/tests/sample_output/py3/buffer-nokia-ixr7250e-36x400g.json
+++ b/src/sonic-config-engine/tests/sample_output/py3/buffer-nokia-ixr7250e-36x400g.json
@@ -33,14 +33,14 @@
     "BUFFER_PROFILE": {
         "ingress_lossy_profile": {
             "pool":"ingress_lossless_pool",
-            "size":"1280",
-	    "xon_offset": "2560",
-            "dynamic_th":"0"
+            "size":"0",
+	    "xon_offset": "0",
+            "dynamic_th":"-5"
         },
         "egress_lossless_profile": {
             "pool":"ingress_lossless_pool",
             "size":"0",
-            "static_th":"33030144"
+            "dynamic_th":"-1"
         },
         "egress_lossy_profile": {
             "pool":"ingress_lossless_pool",

From fe6a1247c3c339981eef72cb2a6b416e06aa2a2a Mon Sep 17 00:00:00 2001
From: xwjiang-ms <96218837+xwjiang-ms@users.noreply.github.com>
Date: Thu, 27 Jun 2024 09:42:10 +0800
Subject: [PATCH 0777/1115] Add a separate non-blocking PR check for onboarding
 T1 tests (#19398)

Why I did it
Elastictest performs well in distribute running PR test in multiple KVMs, which support us to add more test scripts to PR checker.
To achieve our goal without disrupting the existing PR test processes, add a separate non-blocking T1 PR checker for onboarding new tests.
---
 azure-pipelines.yml | 18 +++++++++++++++++-
 1 file changed, 17 insertions(+), 1 deletion(-)

diff --git a/azure-pipelines.yml b/azure-pipelines.yml
index 2a401789a..966ebc551 100644
--- a/azure-pipelines.yml
+++ b/azure-pipelines.yml
@@ -262,7 +262,7 @@ stages:
           MGMT_BRANCH: $(BUILD_BRANCH)
 
   - job: onboarding_elastictest_t0
-    displayName: "onboarding testcases by Elastictest"
+    displayName: "onboarding t0 testcases by Elastictest - optional"
     timeoutInMinutes: 240
     continueOnError: true
     pool: sonic-ubuntu-1c
@@ -278,6 +278,22 @@ stages:
           MGMT_BRANCH: $(BUILD_BRANCH)
           TEST_SET: onboarding_t0
 
+  - job: onboarding_elastictest_t1
+    displayName: "onboarding t1 testcases by Elastictest - optional"
+    timeoutInMinutes: 240
+    continueOnError: true
+    pool: sonic-ubuntu-1c
+    steps:
+      - template: .azure-pipelines/run-test-elastictest-template.yml@sonic-mgmt
+        parameters:
+          TOPOLOGY: t1-lag
+          STOP_ON_FAILURE: "False"
+          RETRY_TIMES: 0
+          MIN_WORKER: $(T1_LAG_ONBOARDING_INSTANCE_NUM)
+          MAX_WORKER: $(T1_LAG_ONBOARDING_INSTANCE_NUM)
+          KVM_IMAGE_BRANCH: $(BUILD_BRANCH)
+          MGMT_BRANCH: $(BUILD_BRANCH)
+          TEST_SET: onboarding_t1
 
 #  - job: wan_elastictest
 #    displayName: "kvmtest-wan by Elastictest"

From 22a2c93d66548a72f86598be535e8af198b9e438 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Thu, 27 Jun 2024 19:00:46 +0800
Subject: [PATCH 0778/1115] [submodule] Update submodule linkmgrd to the latest
 HEAD automatically (#19402)

#### Why I did it
src/linkmgrd
```
* 9768268 - (HEAD -> master, origin/master, origin/HEAD) Fix default route race condition UT (#258) (22 hours ago) [Longxiang Lyu]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/linkmgrd | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/linkmgrd b/src/linkmgrd
index d0124f525..9768268cf 160000
--- a/src/linkmgrd
+++ b/src/linkmgrd
@@ -1 +1 @@
-Subproject commit d0124f5254395ca1dc4aa0853769ac8efdbf380d
+Subproject commit 9768268cf11cdfab1eccb194c0ce762e372aa536

From 982a0b97e067446eb0e60cef23300fee28a9def7 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Thu, 27 Jun 2024 19:00:51 +0800
Subject: [PATCH 0779/1115] [submodule] Update submodule sonic-host-services to
 the latest HEAD automatically (#19373)

#### Why I did it
src/sonic-host-services
```
* 37c24a9 - (HEAD -> master, origin/master, origin/HEAD) Ignore sonic_platform package fileNotFoundError on non-chassis vs platforms (#133) (5 days ago) [Deepak Singhal]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-host-services | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-host-services b/src/sonic-host-services
index 29a04f5bc..37c24a935 160000
--- a/src/sonic-host-services
+++ b/src/sonic-host-services
@@ -1 +1 @@
-Subproject commit 29a04f5bc06fbb2772565d404d91e0452d229f19
+Subproject commit 37c24a9354200e147ed2aaf3dccb11d65d4f24ec

From 52757522fcea4566423986e2da2c87a761987a2e Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Thu, 27 Jun 2024 19:00:59 +0800
Subject: [PATCH 0780/1115] [submodule] Update submodule sonic-gnmi to the
 latest HEAD automatically (#19325)

#### Why I did it
src/sonic-gnmi
```
* a610784 - (HEAD -> master, origin/master, origin/HEAD) Improve timeout for GNMI dbus service (#265) (3 days ago) [ganglv]
* b1c90c9 - Add unit test for vlan interface (#264) (6 days ago) [ganglv]
* fbf0234 - Add unit test for syslog config (#263) (6 days ago) [ganglv]
* 047fc29 - Add unit test for portchannel interface (#262) (6 days ago) [ganglv]
* 52dd8e7 - Add unit test for pg headroom (#261) (6 days ago) [ganglv]
* 8a10d9f - Add unit test for pfcwd status (#260) (6 days ago) [ganglv]
* 65a43bc - Add unit test for pfcwd interval (#259) (6 days ago) [ganglv]
* 0bbb9ef - Add unit test for ntp (#258) (7 days ago) [ganglv]
* e5c43a4 - Add unit test for monitor config (#257) (7 days ago) [ganglv]
* 8a8881e - Add unit test for mmu dynamic threshold (#256) (7 days ago) [ganglv]
* 76857df - Add unit test for lo interface (#255) (7 days ago) [ganglv]
* c35c69d - Add unit test for k8s config (#254) (8 days ago) [ganglv]
* dd0bdcf - Add unit test for IPV6 (#253) (8 days ago) [ganglv]
* 9a1133f - Add unit test for incremental qos (#252) (8 days ago) [ganglv]
* 9bf7969 - Add unit test for eth interface (#251) (8 days ago) [ganglv]
* 2e1eb05 - Add unit test for ECN config (#250) (8 days ago) [ganglv]
* 56f17eb - Add unit test for dynamic ACL (#249) (8 days ago) [ganglv]
* 388eba8 - Add unit test for DHCP relay (#245) (10 days ago) [ganglv]
* fd2fdf6 - Add unit test for CACL (#243) (11 days ago) [ganglv]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-gnmi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-gnmi b/src/sonic-gnmi
index 5357f932a..a6107849a 160000
--- a/src/sonic-gnmi
+++ b/src/sonic-gnmi
@@ -1 +1 @@
-Subproject commit 5357f932ad5fab01ad51684be08d3909b9f7eedf
+Subproject commit a6107849a5d02d0477a5c071892f1a6af26ee8fc

From bc978eb51678e9e41cd45fa449f6dc892dfe60f5 Mon Sep 17 00:00:00 2001
From: vmittal-msft <46945843+vmittal-msft@users.noreply.github.com>
Date: Thu, 27 Jun 2024 09:08:37 -0700
Subject: [PATCH 0781/1115] Updated MMU settings for Arista 400g and 100g
 HWSKUs (#18500)

Why I did it
Updated MMU settings to enhance performance for RDMA traffic in production.
---
 .../buffers_defaults_t2.j2                    |  8 ++---
 .../pg_profile_lookup.ini                     | 30 +++++++++----------
 .../buffers_defaults_t2.j2                    |  8 ++---
 .../pg_profile_lookup.ini                     | 30 +++++++++----------
 .../0/buffers_defaults_t2.j2                  |  8 ++---
 .../0/pg_profile_lookup.ini                   | 30 +++++++++----------
 .../1/buffers_defaults_t2.j2                  |  8 ++---
 .../1/pg_profile_lookup.ini                   | 30 +++++++++----------
 .../0/buffers_defaults_t2.j2                  |  8 ++---
 .../0/pg_profile_lookup.ini                   | 30 +++++++++----------
 .../1/buffers_defaults_t2.j2                  |  8 ++---
 .../1/pg_profile_lookup.ini                   | 30 +++++++++----------
 .../0/buffers_defaults_t2.j2                  |  8 ++---
 .../0/pg_profile_lookup.ini                   | 30 +++++++++----------
 .../1/buffers_defaults_t2.j2                  |  8 ++---
 .../1/pg_profile_lookup.ini                   | 30 +++++++++----------
 .../py2/buffer-arista7800r3-48cq2-lc.json     |  8 ++---
 .../py2/buffer-arista7800r3-48cqm2-lc.json    |  8 ++---
 .../buffer-arista7800r3a-36dm2-c36-lc.json    |  8 ++---
 .../buffer-arista7800r3a-36dm2-d36-lc.json    |  8 ++---
 .../py3/buffer-arista7800r3-48cq2-lc.json     |  8 ++---
 .../py3/buffer-arista7800r3-48cqm2-lc.json    |  8 ++---
 .../buffer-arista7800r3a-36dm2-c36-lc.json    |  8 ++---
 .../buffer-arista7800r3a-36dm2-d36-lc.json    |  8 ++---
 24 files changed, 184 insertions(+), 184 deletions(-)

diff --git a/device/arista/x86_64-arista_7800r3_48cq2_lc/Arista-7800R3-48CQ2-C48/buffers_defaults_t2.j2 b/device/arista/x86_64-arista_7800r3_48cq2_lc/Arista-7800R3-48CQ2-C48/buffers_defaults_t2.j2
index 6ff77dc43..815ebd405 100644
--- a/device/arista/x86_64-arista_7800r3_48cq2_lc/Arista-7800R3-48CQ2-C48/buffers_defaults_t2.j2
+++ b/device/arista/x86_64-arista_7800r3_48cq2_lc/Arista-7800R3-48CQ2-C48/buffers_defaults_t2.j2
@@ -28,14 +28,14 @@
     "BUFFER_PROFILE": {
         "ingress_lossy_profile": {
             "pool":"ingress_lossless_pool",
-            "size":"1280",
-	    "xon_offset": "2560",
-            "dynamic_th":"0"
+            "size":"0",
+	    "xon_offset": "0",
+            "dynamic_th":"-6"
         },
         "egress_lossless_profile": {
             "pool":"ingress_lossless_pool",
             "size":"0",
-            "static_th":"33030144"
+            "dynamic_th":"-1"
         },
         "egress_lossy_profile": {
             "pool":"ingress_lossless_pool",
diff --git a/device/arista/x86_64-arista_7800r3_48cq2_lc/Arista-7800R3-48CQ2-C48/pg_profile_lookup.ini b/device/arista/x86_64-arista_7800r3_48cq2_lc/Arista-7800R3-48CQ2-C48/pg_profile_lookup.ini
index e8289ab03..5670401e0 100644
--- a/device/arista/x86_64-arista_7800r3_48cq2_lc/Arista-7800R3-48CQ2-C48/pg_profile_lookup.ini
+++ b/device/arista/x86_64-arista_7800r3_48cq2_lc/Arista-7800R3-48CQ2-C48/pg_profile_lookup.ini
@@ -1,17 +1,17 @@
 # PG lossless profiles.
 # speed cable    size    xon  xoff threshold xon_offset
- 40000   300m    1280    2560 69632    0        1280
- 100000  300m    1280    2560 110592   0        1280
- 400000  300m    1280    2560 315392   0        1280
- 40000   1000m   1280    2560 114688   0        1280
- 100000  1000m   1280    2560 225280   0        1280
- 400000  1000m   1280    2560 778240   0        1280
- 40000   2000m   1280    2560 184320   0        1280
- 100000  2000m   1280    2560 393216   0        1280
- 400000  2000m   1280    2560 1445888  0        1280
- 40000   80000m  1280    2560 5369856  0        1280
- 100000  80000m  1280    2560 13357056 0        1280
- 400000  80000m  1280    2560 53305344 0        1280
- 40000   120000m 1280    2560 8028160  0        1280
- 100000  120000m 1280    2560 20004864 0        1280
- 400000  120000m 1280    2560 79900672 0        1280
+ 40000   300m      0    2560 69632    -6      181753
+ 100000  300m      0    2560 110592   -6      363506
+ 400000  300m      0    2560 315392   -6      1454025
+ 40000   1000m     0    2560 114688   -6      181753
+ 100000  1000m     0    2560 225280   -6      363506
+ 400000  1000m     0    2560 778240   -6      1454025
+ 40000   2000m     0    2560 184320   -6      181753
+ 100000  2000m     0    2560 393216   -6      363506
+ 400000  2000m     0    2560 1445888  -6      1454025
+ 40000   80000m    0    2560 5369856  -6      181753
+ 100000  80000m    0    2560 13357056 -6      363506
+ 400000  80000m    0    2560 53305344 -6      1454025
+ 40000   120000m   0    2560 8028160  -6      181753
+ 100000  120000m   0    2560 20004864 -6      363506
+ 400000  120000m   0    2560 79900672 -6      1454025
diff --git a/device/arista/x86_64-arista_7800r3_48cqm2_lc/Arista-7800R3-48CQM2-C48/buffers_defaults_t2.j2 b/device/arista/x86_64-arista_7800r3_48cqm2_lc/Arista-7800R3-48CQM2-C48/buffers_defaults_t2.j2
index 068cb8a63..f91b03d4c 100644
--- a/device/arista/x86_64-arista_7800r3_48cqm2_lc/Arista-7800R3-48CQM2-C48/buffers_defaults_t2.j2
+++ b/device/arista/x86_64-arista_7800r3_48cqm2_lc/Arista-7800R3-48CQM2-C48/buffers_defaults_t2.j2
@@ -28,14 +28,14 @@
     "BUFFER_PROFILE": {
         "ingress_lossy_profile": {
             "pool":"ingress_lossless_pool",
-            "size":"1280",
-	    "xon_offset": "2560",
-            "dynamic_th":"0"
+            "size":"0",
+	    "xon_offset": "0",
+            "dynamic_th":"-6"
         },
         "egress_lossless_profile": {
             "pool":"ingress_lossless_pool",
             "size":"0",
-            "static_th":"33030144"
+            "dynamic_th":"-1"
         },
         "egress_lossy_profile": {
             "pool":"ingress_lossless_pool",
diff --git a/device/arista/x86_64-arista_7800r3_48cqm2_lc/Arista-7800R3-48CQM2-C48/pg_profile_lookup.ini b/device/arista/x86_64-arista_7800r3_48cqm2_lc/Arista-7800R3-48CQM2-C48/pg_profile_lookup.ini
index e8289ab03..5670401e0 100644
--- a/device/arista/x86_64-arista_7800r3_48cqm2_lc/Arista-7800R3-48CQM2-C48/pg_profile_lookup.ini
+++ b/device/arista/x86_64-arista_7800r3_48cqm2_lc/Arista-7800R3-48CQM2-C48/pg_profile_lookup.ini
@@ -1,17 +1,17 @@
 # PG lossless profiles.
 # speed cable    size    xon  xoff threshold xon_offset
- 40000   300m    1280    2560 69632    0        1280
- 100000  300m    1280    2560 110592   0        1280
- 400000  300m    1280    2560 315392   0        1280
- 40000   1000m   1280    2560 114688   0        1280
- 100000  1000m   1280    2560 225280   0        1280
- 400000  1000m   1280    2560 778240   0        1280
- 40000   2000m   1280    2560 184320   0        1280
- 100000  2000m   1280    2560 393216   0        1280
- 400000  2000m   1280    2560 1445888  0        1280
- 40000   80000m  1280    2560 5369856  0        1280
- 100000  80000m  1280    2560 13357056 0        1280
- 400000  80000m  1280    2560 53305344 0        1280
- 40000   120000m 1280    2560 8028160  0        1280
- 100000  120000m 1280    2560 20004864 0        1280
- 400000  120000m 1280    2560 79900672 0        1280
+ 40000   300m      0    2560 69632    -6      181753
+ 100000  300m      0    2560 110592   -6      363506
+ 400000  300m      0    2560 315392   -6      1454025
+ 40000   1000m     0    2560 114688   -6      181753
+ 100000  1000m     0    2560 225280   -6      363506
+ 400000  1000m     0    2560 778240   -6      1454025
+ 40000   2000m     0    2560 184320   -6      181753
+ 100000  2000m     0    2560 393216   -6      363506
+ 400000  2000m     0    2560 1445888  -6      1454025
+ 40000   80000m    0    2560 5369856  -6      181753
+ 100000  80000m    0    2560 13357056 -6      363506
+ 400000  80000m    0    2560 53305344 -6      1454025
+ 40000   120000m   0    2560 8028160  -6      181753
+ 100000  120000m   0    2560 20004864 -6      363506
+ 400000  120000m   0    2560 79900672 -6      1454025
diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/0/buffers_defaults_t2.j2 b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/0/buffers_defaults_t2.j2
index d6e346689..101abdf63 100644
--- a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/0/buffers_defaults_t2.j2
+++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/0/buffers_defaults_t2.j2
@@ -28,14 +28,14 @@
     "BUFFER_PROFILE": {
         "ingress_lossy_profile": {
             "pool":"ingress_lossless_pool",
-            "size":"1280",
-	    "xon_offset": "2560",
-            "dynamic_th":"0"
+            "size":"0",
+	    "xon_offset": "0",
+            "dynamic_th":"-6"
         },
         "egress_lossless_profile": {
             "pool":"ingress_lossless_pool",
             "size":"0",
-            "static_th":"33030144"
+            "dynamic_th":"-1"
         },
         "egress_lossy_profile": {
             "pool":"ingress_lossless_pool",
diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/0/pg_profile_lookup.ini b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/0/pg_profile_lookup.ini
index e8289ab03..5670401e0 100644
--- a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/0/pg_profile_lookup.ini
+++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/0/pg_profile_lookup.ini
@@ -1,17 +1,17 @@
 # PG lossless profiles.
 # speed cable    size    xon  xoff threshold xon_offset
- 40000   300m    1280    2560 69632    0        1280
- 100000  300m    1280    2560 110592   0        1280
- 400000  300m    1280    2560 315392   0        1280
- 40000   1000m   1280    2560 114688   0        1280
- 100000  1000m   1280    2560 225280   0        1280
- 400000  1000m   1280    2560 778240   0        1280
- 40000   2000m   1280    2560 184320   0        1280
- 100000  2000m   1280    2560 393216   0        1280
- 400000  2000m   1280    2560 1445888  0        1280
- 40000   80000m  1280    2560 5369856  0        1280
- 100000  80000m  1280    2560 13357056 0        1280
- 400000  80000m  1280    2560 53305344 0        1280
- 40000   120000m 1280    2560 8028160  0        1280
- 100000  120000m 1280    2560 20004864 0        1280
- 400000  120000m 1280    2560 79900672 0        1280
+ 40000   300m      0    2560 69632    -6      181753
+ 100000  300m      0    2560 110592   -6      363506
+ 400000  300m      0    2560 315392   -6      1454025
+ 40000   1000m     0    2560 114688   -6      181753
+ 100000  1000m     0    2560 225280   -6      363506
+ 400000  1000m     0    2560 778240   -6      1454025
+ 40000   2000m     0    2560 184320   -6      181753
+ 100000  2000m     0    2560 393216   -6      363506
+ 400000  2000m     0    2560 1445888  -6      1454025
+ 40000   80000m    0    2560 5369856  -6      181753
+ 100000  80000m    0    2560 13357056 -6      363506
+ 400000  80000m    0    2560 53305344 -6      1454025
+ 40000   120000m   0    2560 8028160  -6      181753
+ 100000  120000m   0    2560 20004864 -6      363506
+ 400000  120000m   0    2560 79900672 -6      1454025
diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/1/buffers_defaults_t2.j2 b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/1/buffers_defaults_t2.j2
index 341fa591d..f95714f3a 100644
--- a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/1/buffers_defaults_t2.j2
+++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/1/buffers_defaults_t2.j2
@@ -28,14 +28,14 @@
     "BUFFER_PROFILE": {
         "ingress_lossy_profile": {
             "pool":"ingress_lossless_pool",
-            "size":"1280",
-	    "xon_offset": "2560",
-            "dynamic_th":"0"
+            "size":"0",
+	    "xon_offset": "0",
+            "dynamic_th":"-6"
         },
         "egress_lossless_profile": {
             "pool":"ingress_lossless_pool",
             "size":"0",
-            "static_th":"33030144"
+            "dynamic_th":"-1"
         },
         "egress_lossy_profile": {
             "pool":"ingress_lossless_pool",
diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/1/pg_profile_lookup.ini b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/1/pg_profile_lookup.ini
index e8289ab03..5670401e0 100644
--- a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/1/pg_profile_lookup.ini
+++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/1/pg_profile_lookup.ini
@@ -1,17 +1,17 @@
 # PG lossless profiles.
 # speed cable    size    xon  xoff threshold xon_offset
- 40000   300m    1280    2560 69632    0        1280
- 100000  300m    1280    2560 110592   0        1280
- 400000  300m    1280    2560 315392   0        1280
- 40000   1000m   1280    2560 114688   0        1280
- 100000  1000m   1280    2560 225280   0        1280
- 400000  1000m   1280    2560 778240   0        1280
- 40000   2000m   1280    2560 184320   0        1280
- 100000  2000m   1280    2560 393216   0        1280
- 400000  2000m   1280    2560 1445888  0        1280
- 40000   80000m  1280    2560 5369856  0        1280
- 100000  80000m  1280    2560 13357056 0        1280
- 400000  80000m  1280    2560 53305344 0        1280
- 40000   120000m 1280    2560 8028160  0        1280
- 100000  120000m 1280    2560 20004864 0        1280
- 400000  120000m 1280    2560 79900672 0        1280
+ 40000   300m      0    2560 69632    -6      181753
+ 100000  300m      0    2560 110592   -6      363506
+ 400000  300m      0    2560 315392   -6      1454025
+ 40000   1000m     0    2560 114688   -6      181753
+ 100000  1000m     0    2560 225280   -6      363506
+ 400000  1000m     0    2560 778240   -6      1454025
+ 40000   2000m     0    2560 184320   -6      181753
+ 100000  2000m     0    2560 393216   -6      363506
+ 400000  2000m     0    2560 1445888  -6      1454025
+ 40000   80000m    0    2560 5369856  -6      181753
+ 100000  80000m    0    2560 13357056 -6      363506
+ 400000  80000m    0    2560 53305344 -6      1454025
+ 40000   120000m   0    2560 8028160  -6      181753
+ 100000  120000m   0    2560 20004864 -6      363506
+ 400000  120000m   0    2560 79900672 -6      1454025
diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/0/buffers_defaults_t2.j2 b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/0/buffers_defaults_t2.j2
index 012a369b5..a6315537d 100644
--- a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/0/buffers_defaults_t2.j2
+++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/0/buffers_defaults_t2.j2
@@ -28,14 +28,14 @@
     "BUFFER_PROFILE": {
         "ingress_lossy_profile": {
             "pool":"ingress_lossless_pool",
-            "size":"1280",
-	    "xon_offset": "2560",
-            "dynamic_th":"0"
+            "size":"0   ",
+	    "xon_offset": "0",
+            "dynamic_th":"-6"
         },
         "egress_lossless_profile": {
             "pool":"ingress_lossless_pool",
             "size":"0",
-            "static_th":"33030144"
+            "dynamic_th":"-1"
         },
         "egress_lossy_profile": {
             "pool":"ingress_lossless_pool",
diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/0/pg_profile_lookup.ini b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/0/pg_profile_lookup.ini
index e8289ab03..5670401e0 100644
--- a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/0/pg_profile_lookup.ini
+++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/0/pg_profile_lookup.ini
@@ -1,17 +1,17 @@
 # PG lossless profiles.
 # speed cable    size    xon  xoff threshold xon_offset
- 40000   300m    1280    2560 69632    0        1280
- 100000  300m    1280    2560 110592   0        1280
- 400000  300m    1280    2560 315392   0        1280
- 40000   1000m   1280    2560 114688   0        1280
- 100000  1000m   1280    2560 225280   0        1280
- 400000  1000m   1280    2560 778240   0        1280
- 40000   2000m   1280    2560 184320   0        1280
- 100000  2000m   1280    2560 393216   0        1280
- 400000  2000m   1280    2560 1445888  0        1280
- 40000   80000m  1280    2560 5369856  0        1280
- 100000  80000m  1280    2560 13357056 0        1280
- 400000  80000m  1280    2560 53305344 0        1280
- 40000   120000m 1280    2560 8028160  0        1280
- 100000  120000m 1280    2560 20004864 0        1280
- 400000  120000m 1280    2560 79900672 0        1280
+ 40000   300m      0    2560 69632    -6      181753
+ 100000  300m      0    2560 110592   -6      363506
+ 400000  300m      0    2560 315392   -6      1454025
+ 40000   1000m     0    2560 114688   -6      181753
+ 100000  1000m     0    2560 225280   -6      363506
+ 400000  1000m     0    2560 778240   -6      1454025
+ 40000   2000m     0    2560 184320   -6      181753
+ 100000  2000m     0    2560 393216   -6      363506
+ 400000  2000m     0    2560 1445888  -6      1454025
+ 40000   80000m    0    2560 5369856  -6      181753
+ 100000  80000m    0    2560 13357056 -6      363506
+ 400000  80000m    0    2560 53305344 -6      1454025
+ 40000   120000m   0    2560 8028160  -6      181753
+ 100000  120000m   0    2560 20004864 -6      363506
+ 400000  120000m   0    2560 79900672 -6      1454025
diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/1/buffers_defaults_t2.j2 b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/1/buffers_defaults_t2.j2
index 012a369b5..1510e398a 100644
--- a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/1/buffers_defaults_t2.j2
+++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/1/buffers_defaults_t2.j2
@@ -28,14 +28,14 @@
     "BUFFER_PROFILE": {
         "ingress_lossy_profile": {
             "pool":"ingress_lossless_pool",
-            "size":"1280",
-	    "xon_offset": "2560",
-            "dynamic_th":"0"
+            "size":"0",
+	    "xon_offset": "0",
+            "dynamic_th":"-6"
         },
         "egress_lossless_profile": {
             "pool":"ingress_lossless_pool",
             "size":"0",
-            "static_th":"33030144"
+            "dynamic_th":"-1"
         },
         "egress_lossy_profile": {
             "pool":"ingress_lossless_pool",
diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/1/pg_profile_lookup.ini b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/1/pg_profile_lookup.ini
index e8289ab03..5670401e0 100644
--- a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/1/pg_profile_lookup.ini
+++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/1/pg_profile_lookup.ini
@@ -1,17 +1,17 @@
 # PG lossless profiles.
 # speed cable    size    xon  xoff threshold xon_offset
- 40000   300m    1280    2560 69632    0        1280
- 100000  300m    1280    2560 110592   0        1280
- 400000  300m    1280    2560 315392   0        1280
- 40000   1000m   1280    2560 114688   0        1280
- 100000  1000m   1280    2560 225280   0        1280
- 400000  1000m   1280    2560 778240   0        1280
- 40000   2000m   1280    2560 184320   0        1280
- 100000  2000m   1280    2560 393216   0        1280
- 400000  2000m   1280    2560 1445888  0        1280
- 40000   80000m  1280    2560 5369856  0        1280
- 100000  80000m  1280    2560 13357056 0        1280
- 400000  80000m  1280    2560 53305344 0        1280
- 40000   120000m 1280    2560 8028160  0        1280
- 100000  120000m 1280    2560 20004864 0        1280
- 400000  120000m 1280    2560 79900672 0        1280
+ 40000   300m      0    2560 69632    -6      181753
+ 100000  300m      0    2560 110592   -6      363506
+ 400000  300m      0    2560 315392   -6      1454025
+ 40000   1000m     0    2560 114688   -6      181753
+ 100000  1000m     0    2560 225280   -6      363506
+ 400000  1000m     0    2560 778240   -6      1454025
+ 40000   2000m     0    2560 184320   -6      181753
+ 100000  2000m     0    2560 393216   -6      363506
+ 400000  2000m     0    2560 1445888  -6      1454025
+ 40000   80000m    0    2560 5369856  -6      181753
+ 100000  80000m    0    2560 13357056 -6      363506
+ 400000  80000m    0    2560 53305344 -6      1454025
+ 40000   120000m   0    2560 8028160  -6      181753
+ 100000  120000m   0    2560 20004864 -6      363506
+ 400000  120000m   0    2560 79900672 -6      1454025
diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/0/buffers_defaults_t2.j2 b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/0/buffers_defaults_t2.j2
index a7ba10216..0df82f166 100644
--- a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/0/buffers_defaults_t2.j2
+++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/0/buffers_defaults_t2.j2
@@ -28,14 +28,14 @@
     "BUFFER_PROFILE": {
         "ingress_lossy_profile": {
             "pool":"ingress_lossless_pool",
-            "size":"1280",
-	    "xon_offset": "2560",
-            "dynamic_th":"0"
+            "size":"0",
+	    "xon_offset": "0",
+            "dynamic_th":"-5"
         },
         "egress_lossless_profile": {
             "pool":"ingress_lossless_pool",
             "size":"0",
-            "static_th":"33030144"
+            "dynamic_th":"-1"
         },
         "egress_lossy_profile": {
             "pool":"ingress_lossless_pool",
diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/0/pg_profile_lookup.ini b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/0/pg_profile_lookup.ini
index e8289ab03..99fbd830e 100644
--- a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/0/pg_profile_lookup.ini
+++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/0/pg_profile_lookup.ini
@@ -1,17 +1,17 @@
 # PG lossless profiles.
 # speed cable    size    xon  xoff threshold xon_offset
- 40000   300m    1280    2560 69632    0        1280
- 100000  300m    1280    2560 110592   0        1280
- 400000  300m    1280    2560 315392   0        1280
- 40000   1000m   1280    2560 114688   0        1280
- 100000  1000m   1280    2560 225280   0        1280
- 400000  1000m   1280    2560 778240   0        1280
- 40000   2000m   1280    2560 184320   0        1280
- 100000  2000m   1280    2560 393216   0        1280
- 400000  2000m   1280    2560 1445888  0        1280
- 40000   80000m  1280    2560 5369856  0        1280
- 100000  80000m  1280    2560 13357056 0        1280
- 400000  80000m  1280    2560 53305344 0        1280
- 40000   120000m 1280    2560 8028160  0        1280
- 100000  120000m 1280    2560 20004864 0        1280
- 400000  120000m 1280    2560 79900672 0        1280
+ 40000   300m      0    2560 69632    -5      181753
+ 100000  300m      0    2560 110592   -5      363506
+ 400000  300m      0    2560 315392   -5      1454025
+ 40000   1000m     0    2560 114688   -5      181753
+ 100000  1000m     0    2560 225280   -5      363506
+ 400000  1000m     0    2560 778240   -5      1454025
+ 40000   2000m     0    2560 184320   -5      181753
+ 100000  2000m     0    2560 393216   -5      363506
+ 400000  2000m     0    2560 1445888  -5      1454025
+ 40000   80000m    0    2560 5369856  -5      181753
+ 100000  80000m    0    2560 13357056 -5      363506
+ 400000  80000m    0    2560 53305344 -5      1454025
+ 40000   120000m   0    2560 8028160  -5      181753
+ 100000  120000m   0    2560 20004864 -5      363506
+ 400000  120000m   0    2560 79900672 -5      1454025
diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/1/buffers_defaults_t2.j2 b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/1/buffers_defaults_t2.j2
index e61ada6f0..4e66dfe09 100644
--- a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/1/buffers_defaults_t2.j2
+++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/1/buffers_defaults_t2.j2
@@ -28,14 +28,14 @@
     "BUFFER_PROFILE": {
         "ingress_lossy_profile": {
             "pool":"ingress_lossless_pool",
-            "size":"1280",
-	    "xon_offset": "2560",
-            "dynamic_th":"0"
+            "size":"0",
+	    "xon_offset": "0",
+            "dynamic_th":"-5"
         },
         "egress_lossless_profile": {
             "pool":"ingress_lossless_pool",
             "size":"0",
-            "static_th":"33030144"
+            "dynamic_th":"-1"
         },
         "egress_lossy_profile": {
             "pool":"ingress_lossless_pool",
diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/1/pg_profile_lookup.ini b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/1/pg_profile_lookup.ini
index e8289ab03..99fbd830e 100644
--- a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/1/pg_profile_lookup.ini
+++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/1/pg_profile_lookup.ini
@@ -1,17 +1,17 @@
 # PG lossless profiles.
 # speed cable    size    xon  xoff threshold xon_offset
- 40000   300m    1280    2560 69632    0        1280
- 100000  300m    1280    2560 110592   0        1280
- 400000  300m    1280    2560 315392   0        1280
- 40000   1000m   1280    2560 114688   0        1280
- 100000  1000m   1280    2560 225280   0        1280
- 400000  1000m   1280    2560 778240   0        1280
- 40000   2000m   1280    2560 184320   0        1280
- 100000  2000m   1280    2560 393216   0        1280
- 400000  2000m   1280    2560 1445888  0        1280
- 40000   80000m  1280    2560 5369856  0        1280
- 100000  80000m  1280    2560 13357056 0        1280
- 400000  80000m  1280    2560 53305344 0        1280
- 40000   120000m 1280    2560 8028160  0        1280
- 100000  120000m 1280    2560 20004864 0        1280
- 400000  120000m 1280    2560 79900672 0        1280
+ 40000   300m      0    2560 69632    -5      181753
+ 100000  300m      0    2560 110592   -5      363506
+ 400000  300m      0    2560 315392   -5      1454025
+ 40000   1000m     0    2560 114688   -5      181753
+ 100000  1000m     0    2560 225280   -5      363506
+ 400000  1000m     0    2560 778240   -5      1454025
+ 40000   2000m     0    2560 184320   -5      181753
+ 100000  2000m     0    2560 393216   -5      363506
+ 400000  2000m     0    2560 1445888  -5      1454025
+ 40000   80000m    0    2560 5369856  -5      181753
+ 100000  80000m    0    2560 13357056 -5      363506
+ 400000  80000m    0    2560 53305344 -5      1454025
+ 40000   120000m   0    2560 8028160  -5      181753
+ 100000  120000m   0    2560 20004864 -5      363506
+ 400000  120000m   0    2560 79900672 -5      1454025
diff --git a/src/sonic-config-engine/tests/sample_output/py2/buffer-arista7800r3-48cq2-lc.json b/src/sonic-config-engine/tests/sample_output/py2/buffer-arista7800r3-48cq2-lc.json
index 305640a45..c0d5fcded 100644
--- a/src/sonic-config-engine/tests/sample_output/py2/buffer-arista7800r3-48cq2-lc.json
+++ b/src/sonic-config-engine/tests/sample_output/py2/buffer-arista7800r3-48cq2-lc.json
@@ -63,14 +63,14 @@
     "BUFFER_PROFILE": {
         "ingress_lossy_profile": {
             "pool":"ingress_lossless_pool",
-            "size":"1280",
-            "xon_offset":"2560",
-            "dynamic_th":"0"
+            "size":"0",
+            "xon_offset":"0",
+            "dynamic_th":"-6"
         },
         "egress_lossless_profile": {
             "pool":"ingress_lossless_pool",
             "size":"0",
-            "static_th":"33030144"
+            "dynamic_th":"-1"
         },
         "egress_lossy_profile": {
             "pool":"ingress_lossless_pool",
diff --git a/src/sonic-config-engine/tests/sample_output/py2/buffer-arista7800r3-48cqm2-lc.json b/src/sonic-config-engine/tests/sample_output/py2/buffer-arista7800r3-48cqm2-lc.json
index 8dacec342..880e426c5 100644
--- a/src/sonic-config-engine/tests/sample_output/py2/buffer-arista7800r3-48cqm2-lc.json
+++ b/src/sonic-config-engine/tests/sample_output/py2/buffer-arista7800r3-48cqm2-lc.json
@@ -63,14 +63,14 @@
     "BUFFER_PROFILE": {
         "ingress_lossy_profile": {
             "pool":"ingress_lossless_pool",
-            "size":"1280",
-            "xon_offset":"2560",
-            "dynamic_th":"0"
+            "size":"0",
+            "xon_offset":"0",
+            "dynamic_th":"-6"
         },
         "egress_lossless_profile": {
             "pool":"ingress_lossless_pool",
             "size":"0",
-            "static_th":"33030144"
+            "dynamic_th":"-1"
         },
         "egress_lossy_profile": {
             "pool":"ingress_lossless_pool",
diff --git a/src/sonic-config-engine/tests/sample_output/py2/buffer-arista7800r3a-36dm2-c36-lc.json b/src/sonic-config-engine/tests/sample_output/py2/buffer-arista7800r3a-36dm2-c36-lc.json
index fa6b56ab0..fc22a9c48 100644
--- a/src/sonic-config-engine/tests/sample_output/py2/buffer-arista7800r3a-36dm2-c36-lc.json
+++ b/src/sonic-config-engine/tests/sample_output/py2/buffer-arista7800r3a-36dm2-c36-lc.json
@@ -33,14 +33,14 @@
     "BUFFER_PROFILE": {
         "ingress_lossy_profile": {
             "pool":"ingress_lossless_pool",
-            "size":"1280",
-	    "xon_offset": "2560",
-            "dynamic_th":"0"
+            "size":"0",
+	    "xon_offset": "0",
+            "dynamic_th":"-6"
         },
         "egress_lossless_profile": {
             "pool":"ingress_lossless_pool",
             "size":"0",
-            "static_th":"33030144"
+            "dynamic_th":"-1"
         },
         "egress_lossy_profile": {
             "pool":"ingress_lossless_pool",
diff --git a/src/sonic-config-engine/tests/sample_output/py2/buffer-arista7800r3a-36dm2-d36-lc.json b/src/sonic-config-engine/tests/sample_output/py2/buffer-arista7800r3a-36dm2-d36-lc.json
index 026f88f03..09278e3ef 100644
--- a/src/sonic-config-engine/tests/sample_output/py2/buffer-arista7800r3a-36dm2-d36-lc.json
+++ b/src/sonic-config-engine/tests/sample_output/py2/buffer-arista7800r3a-36dm2-d36-lc.json
@@ -33,14 +33,14 @@
     "BUFFER_PROFILE": {
         "ingress_lossy_profile": {
             "pool":"ingress_lossless_pool",
-            "size":"1280",
-	    "xon_offset": "2560",
-            "dynamic_th":"0"
+            "size":"0",
+	    "xon_offset": "0",
+            "dynamic_th":"-5"
         },
         "egress_lossless_profile": {
             "pool":"ingress_lossless_pool",
             "size":"0",
-            "static_th":"33030144"
+            "dynamic_th":"-1"
         },
         "egress_lossy_profile": {
             "pool":"ingress_lossless_pool",
diff --git a/src/sonic-config-engine/tests/sample_output/py3/buffer-arista7800r3-48cq2-lc.json b/src/sonic-config-engine/tests/sample_output/py3/buffer-arista7800r3-48cq2-lc.json
index 305640a45..c0d5fcded 100644
--- a/src/sonic-config-engine/tests/sample_output/py3/buffer-arista7800r3-48cq2-lc.json
+++ b/src/sonic-config-engine/tests/sample_output/py3/buffer-arista7800r3-48cq2-lc.json
@@ -63,14 +63,14 @@
     "BUFFER_PROFILE": {
         "ingress_lossy_profile": {
             "pool":"ingress_lossless_pool",
-            "size":"1280",
-            "xon_offset":"2560",
-            "dynamic_th":"0"
+            "size":"0",
+            "xon_offset":"0",
+            "dynamic_th":"-6"
         },
         "egress_lossless_profile": {
             "pool":"ingress_lossless_pool",
             "size":"0",
-            "static_th":"33030144"
+            "dynamic_th":"-1"
         },
         "egress_lossy_profile": {
             "pool":"ingress_lossless_pool",
diff --git a/src/sonic-config-engine/tests/sample_output/py3/buffer-arista7800r3-48cqm2-lc.json b/src/sonic-config-engine/tests/sample_output/py3/buffer-arista7800r3-48cqm2-lc.json
index 8dacec342..880e426c5 100644
--- a/src/sonic-config-engine/tests/sample_output/py3/buffer-arista7800r3-48cqm2-lc.json
+++ b/src/sonic-config-engine/tests/sample_output/py3/buffer-arista7800r3-48cqm2-lc.json
@@ -63,14 +63,14 @@
     "BUFFER_PROFILE": {
         "ingress_lossy_profile": {
             "pool":"ingress_lossless_pool",
-            "size":"1280",
-            "xon_offset":"2560",
-            "dynamic_th":"0"
+            "size":"0",
+            "xon_offset":"0",
+            "dynamic_th":"-6"
         },
         "egress_lossless_profile": {
             "pool":"ingress_lossless_pool",
             "size":"0",
-            "static_th":"33030144"
+            "dynamic_th":"-1"
         },
         "egress_lossy_profile": {
             "pool":"ingress_lossless_pool",
diff --git a/src/sonic-config-engine/tests/sample_output/py3/buffer-arista7800r3a-36dm2-c36-lc.json b/src/sonic-config-engine/tests/sample_output/py3/buffer-arista7800r3a-36dm2-c36-lc.json
index fa6b56ab0..fc22a9c48 100644
--- a/src/sonic-config-engine/tests/sample_output/py3/buffer-arista7800r3a-36dm2-c36-lc.json
+++ b/src/sonic-config-engine/tests/sample_output/py3/buffer-arista7800r3a-36dm2-c36-lc.json
@@ -33,14 +33,14 @@
     "BUFFER_PROFILE": {
         "ingress_lossy_profile": {
             "pool":"ingress_lossless_pool",
-            "size":"1280",
-	    "xon_offset": "2560",
-            "dynamic_th":"0"
+            "size":"0",
+	    "xon_offset": "0",
+            "dynamic_th":"-6"
         },
         "egress_lossless_profile": {
             "pool":"ingress_lossless_pool",
             "size":"0",
-            "static_th":"33030144"
+            "dynamic_th":"-1"
         },
         "egress_lossy_profile": {
             "pool":"ingress_lossless_pool",
diff --git a/src/sonic-config-engine/tests/sample_output/py3/buffer-arista7800r3a-36dm2-d36-lc.json b/src/sonic-config-engine/tests/sample_output/py3/buffer-arista7800r3a-36dm2-d36-lc.json
index 026f88f03..09278e3ef 100644
--- a/src/sonic-config-engine/tests/sample_output/py3/buffer-arista7800r3a-36dm2-d36-lc.json
+++ b/src/sonic-config-engine/tests/sample_output/py3/buffer-arista7800r3a-36dm2-d36-lc.json
@@ -33,14 +33,14 @@
     "BUFFER_PROFILE": {
         "ingress_lossy_profile": {
             "pool":"ingress_lossless_pool",
-            "size":"1280",
-	    "xon_offset": "2560",
-            "dynamic_th":"0"
+            "size":"0",
+	    "xon_offset": "0",
+            "dynamic_th":"-5"
         },
         "egress_lossless_profile": {
             "pool":"ingress_lossless_pool",
             "size":"0",
-            "static_th":"33030144"
+            "dynamic_th":"-1"
         },
         "egress_lossy_profile": {
             "pool":"ingress_lossless_pool",

From b0788265136783a43ad6c64d9cbe3e02209561f8 Mon Sep 17 00:00:00 2001
From: anamehra <54692434+anamehra@users.noreply.github.com>
Date: Thu, 27 Jun 2024 21:14:40 -0700
Subject: [PATCH 0782/1115] Update cisco-8000.ini (#19401)

Signed-off-by: anamehra anamehra@cisco.com

Cisco platform 202405.0.1 release
---
 platform/checkout/cisco-8000.ini | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/platform/checkout/cisco-8000.ini b/platform/checkout/cisco-8000.ini
index 6c33ec6a8..fdfc8c4e5 100644
--- a/platform/checkout/cisco-8000.ini
+++ b/platform/checkout/cisco-8000.ini
@@ -1,3 +1,3 @@
 [module]
 repo=git@github.com:Cisco-8000-sonic/platform-cisco-8000.git
-ref=0.master.0.2
+ref=202405.0.1

From 333b5913f6af5bcd396f644ec110639ffa1eaa85 Mon Sep 17 00:00:00 2001
From: saksarav-nokia <sakthivadivu.saravanaraj@nokia.com>
Date: Fri, 28 Jun 2024 12:40:11 -0400
Subject: [PATCH 0783/1115] [Nokia][Device] Fix monState in farbic monitor
 config (#19196)

Signed-off-by: saksarav <sakthivadivu.saravanaraj@nokia.com>
---
 .../Nokia-IXR7250E-36x100G/fabric_monitor_config.json           | 2 +-
 .../Nokia-IXR7250E-36x400G/fabric_monitor_config.json           | 2 +-
 .../Nokia-IXR7250E-SUP-10/fabric_monitor_config.json            | 2 +-
 3 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/fabric_monitor_config.json b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/fabric_monitor_config.json
index 2d641f92a..7c360948f 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/fabric_monitor_config.json
+++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/fabric_monitor_config.json
@@ -5,6 +5,6 @@
       "monPollThreshRecovery": 8,
       "monPollThreshIsolation": 1,
       "monCapacityThreshWarn": 85,
-      "monState": enable
+      "monState": "enable"
    }
 }
diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/fabric_monitor_config.json b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/fabric_monitor_config.json
index 2d641f92a..7c360948f 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/fabric_monitor_config.json
+++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/fabric_monitor_config.json
@@ -5,6 +5,6 @@
       "monPollThreshRecovery": 8,
       "monPollThreshIsolation": 1,
       "monCapacityThreshWarn": 85,
-      "monState": enable
+      "monState": "enable"
    }
 }
diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/fabric_monitor_config.json b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/fabric_monitor_config.json
index 0476a2c15..acea5cc6b 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/fabric_monitor_config.json
+++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/fabric_monitor_config.json
@@ -5,6 +5,6 @@
       "monPollThreshRecovery": 8,
       "monPollThreshIsolation": 1,
       "monCapacityThreshWarn": 10,
-      "monState": enable
+      "monState": "enable"
    }
 }

From 499b354870c53aa6382e80f36a6f1ac301ecb22c Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sat, 29 Jun 2024 19:04:25 +0800
Subject: [PATCH 0784/1115] [submodule] Update submodule sonic-swss to the
 latest HEAD automatically (#19417)

#### Why I did it
src/sonic-swss
```
* b02181ae - (HEAD -> master, origin/master, origin/HEAD) Use shared egress ACL table for PFCWD in BRCM DNX platform (#3136) (9 hours ago) [Song Yuan]
* 21378131 - [dash] align dash inbound route actions with the latest SAI headers (#3206) (30 hours ago) [Yakiv Huryk]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-swss | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-swss b/src/sonic-swss
index d20294a38..b02181ae5 160000
--- a/src/sonic-swss
+++ b/src/sonic-swss
@@ -1 +1 @@
-Subproject commit d20294a3853d4de08e897c5c4a66c159ef2d9cdd
+Subproject commit b02181ae529f2bc493926b8151f971632fe413fa

From 53025993f303345d75464c77dfab3a225bbd6939 Mon Sep 17 00:00:00 2001
From: Vivek <vkarri@nvidia.com>
Date: Sun, 30 Jun 2024 22:45:48 -0700
Subject: [PATCH 0785/1115] [Cache] Truly disable loading the RFS cache
 (#19395)

Why I did it
Bug Fix: RFS is still loading from cache

user@build-server:/sonic-buildimage$ cat target/sonic-mellanox.bin__mellanox__rfs.squashfs.log
Build start time: Tue Jun 25 20:13:00 UTC 2024
[ FLAGS  FILE   ] : [mellanox amd64 bookworm]
[ FLAGS  DEPENDS ] : [mellanox amd64 bookworm]
[ FLAGS  DIFF   ] : []
target/sonic-mellanox.bin__mellanox__rfs.squashfs
target/sonic-mellanox.bin__mellanox__rfs.squashfs.cached.log
File /dpkg_cache/sonic-mellanox.bin__mellanox__rfs.squashfs-adc83b19e793491b1c6ea0f-3bc3261c3a235b9c15daac9.tgz  is loaded from cache into /sonic
[ CACHE::LOADED ] /dpkg_cache/sonic-mellanox.bin__mellanox__rfs.squashfs-adc83b19e793491b1c6ea0f-3bc3261c3a235b9c15daac9.tgz
File /dpkg_cache/sonic-mellanox.bin__mellanox__rfs.squashfs-adc83b19e793491b1c6ea0f-3bc3261c3a235b9c15daac9.tgz  is not present in cache or cache mode set as cache !
[ CACHE::SKIPPED ] /dpkg_cache/sonic-mellanox.bin__mellanox__rfs.squashfs-adc83b19e793491b1c6ea0f-3bc3261c3a235b9c15daac9.tgz
[ CACHE::SKIPPED ] DEP_FILES - Modified Files: []
[ CACHE::SKIPPED ] DEPENDS   - Modified Files: [.platform build_debian.sh target/debs/bookworm/initramfs-tools_0.142_all.deb target/debs/bookworm/linux-image-6.1.0-11-2-amd64-unsigned_6.1.38-4_amd64.deb target/sonic-mellanox.bin__mellanox__rfs.squashfs.dep]
Build end time: Tue Jun 25 20:13:04 UTC 2024
Elapsed time: 0h 0m 4s

- How I did it
Replace the tab before the comment so that Make subsystem doesn't run the LOAD_CACHE

- How to verify it
Re-trigger the RFS and see it being built and not getting loaded from cache

Signed-off-by: Vivek Reddy <vkarri@nvidia.com>
---
 slave.mk | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/slave.mk b/slave.mk
index a08778bed..017a90242 100644
--- a/slave.mk
+++ b/slave.mk
@@ -1298,7 +1298,7 @@ $(addprefix $(TARGET_PATH)/, $(SONIC_RFS_TARGETS)) : $(TARGET_PATH)/% : \
         $(call dpkg_depend,$(TARGET_PATH)/%.dep)
 	$(HEADER)
 
-	# $(call LOAD_CACHE,$*,$@)
+    # $(call LOAD_CACHE,$*,$@)
 
 	# Skip building the target if it is already loaded from cache
 	if [ -z '$($*_CACHE_LOADED)' ] ; then

From 2960b76b92af16bfe1f1a6ca8f49107481cf9031 Mon Sep 17 00:00:00 2001
From: Sudharsan Dhamal Gopalarathnam <sudharsand@nvidia.com>
Date: Mon, 1 Jul 2024 11:16:38 +0530
Subject: [PATCH 0786/1115] [Mellanox]Removing 8x DPB mode from SN5400 and simx
 platforms (#19265)

- Why I did it
Removed 8x mode from SN5400 and simx platforms as current DPB infrastructure doesn't support 8x mode with the subsequent port need to be disabled

- How I did it
Updated platform.json of both devices.

- How to verify it
Running show interfaces breakout command and verifying this mode doesn't exist.
---
 .../x86_64-nvidia_sn5400-r0/platform.json     | 192 ++++++------------
 .../platform.json                             | 192 ++++++------------
 2 files changed, 128 insertions(+), 256 deletions(-)

diff --git a/device/mellanox/x86_64-nvidia_sn5400-r0/platform.json b/device/mellanox/x86_64-nvidia_sn5400-r0/platform.json
index f4f9ed17d..b2c0264ba 100644
--- a/device/mellanox/x86_64-nvidia_sn5400-r0/platform.json
+++ b/device/mellanox/x86_64-nvidia_sn5400-r0/platform.json
@@ -681,8 +681,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp1"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp1a", "etp1b"],
-                "4x100G[50G,25G,10G]": ["etp1a", "etp1b", "etp1c", "etp1d"],
-                "8x50G[25G,10G]": ["etp1a", "etp1b", "etp1c", "etp1d", "etp1e", "etp1f", "etp1g", "etp1h"]
+                "4x100G[50G,25G,10G]": ["etp1a", "etp1b", "etp1c", "etp1d"]
             }
         },
         "Ethernet8": {
@@ -691,8 +690,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp2"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp2a", "etp2b"],
-                "4x100G[50G,25G,10G]": ["etp2a", "etp2b", "etp2c", "etp2d"],
-                "8x50G[25G,10G]": ["etp2a", "etp2b", "etp2c", "etp2d", "etp2e", "etp2f", "etp2g", "etp2h"]
+                "4x100G[50G,25G,10G]": ["etp2a", "etp2b", "etp2c", "etp2d"]
             }
         },
         "Ethernet16": {
@@ -701,8 +699,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp3"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp3a", "etp3b"],
-                "4x100G[50G,25G,10G]": ["etp3a", "etp3b", "etp3c", "etp3d"],
-                "8x50G[25G,10G]": ["etp3a", "etp3b", "etp3c", "etp3d", "etp3e", "etp3f", "etp3g", "etp3h"]
+                "4x100G[50G,25G,10G]": ["etp3a", "etp3b", "etp3c", "etp3d"]
             }
         },
         "Ethernet24": {
@@ -711,8 +708,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp4"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp4a", "etp4b"],
-                "4x100G[50G,25G,10G]": ["etp4a", "etp4b", "etp4c", "etp4d"],
-                "8x50G[25G,10G]": ["etp4a", "etp4b", "etp4c", "etp4d", "etp4e", "etp4f", "etp4g", "etp4h"]
+                "4x100G[50G,25G,10G]": ["etp4a", "etp4b", "etp4c", "etp4d"]
             }
         },
         "Ethernet32": {
@@ -721,8 +717,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp5"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp5a", "etp5b"],
-                "4x100G[50G,25G,10G]": ["etp5a", "etp5b", "etp5c", "etp5d"],
-                "8x50G[25G,10G]": ["etp5a", "etp5b", "etp5c", "etp5d", "etp5e", "etp5f", "etp5g", "etp5h"]
+                "4x100G[50G,25G,10G]": ["etp5a", "etp5b", "etp5c", "etp5d"]
             }
         },
         "Ethernet40": {
@@ -731,8 +726,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp6"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp6a", "etp6b"],
-                "4x100G[50G,25G,10G]": ["etp6a", "etp6b", "etp6c", "etp6d"],
-                "8x50G[25G,10G]": ["etp6a", "etp6b", "etp6c", "etp6d", "etp6e", "etp6f", "etp6g", "etp6h"]
+                "4x100G[50G,25G,10G]": ["etp6a", "etp6b", "etp6c", "etp6d"]
             }
         },
         "Ethernet48": {
@@ -741,8 +735,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp7"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp7a", "etp7b"],
-                "4x100G[50G,25G,10G]": ["etp7a", "etp7b", "etp7c", "etp7d"],
-                "8x50G[25G,10G]": ["etp7a", "etp7b", "etp7c", "etp7d", "etp7e", "etp7f", "etp7g", "etp7h"]
+                "4x100G[50G,25G,10G]": ["etp7a", "etp7b", "etp7c", "etp7d"]
             }
         },
         "Ethernet56": {
@@ -751,8 +744,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp8"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp8a", "etp8b"],
-                "4x100G[50G,25G,10G]": ["etp8a", "etp8b", "etp8c", "etp8d"],
-                "8x50G[25G,10G]": ["etp8a", "etp8b", "etp8c", "etp8d", "etp8e", "etp8f", "etp8g", "etp8h"]
+                "4x100G[50G,25G,10G]": ["etp8a", "etp8b", "etp8c", "etp8d"]
             }
         },
         "Ethernet64": {
@@ -761,8 +753,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp9"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp9a", "etp9b"],
-                "4x100G[50G,25G,10G]": ["etp9a", "etp9b", "etp9c", "etp9d"],
-                "8x50G[25G,10G]": ["etp9a", "etp9b", "etp9c", "etp9d", "etp9e", "etp9f", "etp9g", "etp9h"]
+                "4x100G[50G,25G,10G]": ["etp9a", "etp9b", "etp9c", "etp9d"]
             }
         },
         "Ethernet72": {
@@ -771,8 +762,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp10"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp10a", "etp10b"],
-                "4x100G[50G,25G,10G]": ["etp10a", "etp10b", "etp10c", "etp10d"],
-                "8x50G[25G,10G]": ["etp10a", "etp10b", "etp10c", "etp10d", "etp10e", "etp10f", "etp10g", "etp10h"]
+                "4x100G[50G,25G,10G]": ["etp10a", "etp10b", "etp10c", "etp10d"]
             }
         },
         "Ethernet80": {
@@ -781,8 +771,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp11"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp11a", "etp11b"],
-                "4x100G[50G,25G,10G]": ["etp11a", "etp11b", "etp11c", "etp11d"],
-                "8x50G[25G,10G]": ["etp11a", "etp11b", "etp11c", "etp11d", "etp11e", "etp11f", "etp11g", "etp11h"]
+                "4x100G[50G,25G,10G]": ["etp11a", "etp11b", "etp11c", "etp11d"]
             }
         },
         "Ethernet88": {
@@ -791,8 +780,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp12"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp12a", "etp12b"],
-                "4x100G[50G,25G,10G]": ["etp12a", "etp12b", "etp12c", "etp12d"],
-                "8x50G[25G,10G]": ["etp12a", "etp12b", "etp12c", "etp12d", "etp12e", "etp12f", "etp12g", "etp12h"]
+                "4x100G[50G,25G,10G]": ["etp12a", "etp12b", "etp12c", "etp12d"]
             }
         },
         "Ethernet96": {
@@ -801,8 +789,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp13"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp13a", "etp13b"],
-                "4x100G[50G,25G,10G]": ["etp13a", "etp13b", "etp13c", "etp13d"],
-                "8x50G[25G,10G]": ["etp13a", "etp13b", "etp13c", "etp13d", "etp13e", "etp13f", "etp13g", "etp13h"]
+                "4x100G[50G,25G,10G]": ["etp13a", "etp13b", "etp13c", "etp13d"]
             }
         },
         "Ethernet104": {
@@ -811,8 +798,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp14"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp14a", "etp14b"],
-                "4x100G[50G,25G,10G]": ["etp14a", "etp14b", "etp14c", "etp14d"],
-                "8x50G[25G,10G]": ["etp14a", "etp14b", "etp14c", "etp14d", "etp14e", "etp14f", "etp14g", "etp14h"]
+                "4x100G[50G,25G,10G]": ["etp14a", "etp14b", "etp14c", "etp14d"]
             }
         },
         "Ethernet112": {
@@ -821,8 +807,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp15"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp15a", "etp15b"],
-                "4x100G[50G,25G,10G]": ["etp15a", "etp15b", "etp15c", "etp15d"],
-                "8x50G[25G,10G]": ["etp15a", "etp15b", "etp15c", "etp15d", "etp15e", "etp15f", "etp15g", "etp15h"]
+                "4x100G[50G,25G,10G]": ["etp15a", "etp15b", "etp15c", "etp15d"]
             }
         },
         "Ethernet120": {
@@ -831,8 +816,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp16"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp16a", "etp16b"],
-                "4x100G[50G,25G,10G]": ["etp16a", "etp16b", "etp16c", "etp16d"],
-                "8x50G[25G,10G]": ["etp16a", "etp16b", "etp16c", "etp16d", "etp16e", "etp16f", "etp16g", "etp16h"]
+                "4x100G[50G,25G,10G]": ["etp16a", "etp16b", "etp16c", "etp16d"]
             }
         },
         "Ethernet128": {
@@ -841,8 +825,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp17"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp17a", "etp17b"],
-                "4x100G[50G,25G,10G]": ["etp17a", "etp17b", "etp17c", "etp17d"],
-                "8x50G[25G,10G]": ["etp17a", "etp17b", "etp17c", "etp17d", "etp17e", "etp17f", "etp17g", "etp17h"]
+                "4x100G[50G,25G,10G]": ["etp17a", "etp17b", "etp17c", "etp17d"]
             }
         },
         "Ethernet136": {
@@ -851,8 +834,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp18"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp18a", "etp18b"],
-                "4x100G[50G,25G,10G]": ["etp18a", "etp18b", "etp18c", "etp18d"],
-                "8x50G[25G,10G]": ["etp18a", "etp18b", "etp18c", "etp18d", "etp18e", "etp18f", "etp18g", "etp18h"]
+                "4x100G[50G,25G,10G]": ["etp18a", "etp18b", "etp18c", "etp18d"]
             }
         },
         "Ethernet144": {
@@ -861,8 +843,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp19"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp19a", "etp19b"],
-                "4x100G[50G,25G,10G]": ["etp19a", "etp19b", "etp19c", "etp19d"],
-                "8x50G[25G,10G]": ["etp19a", "etp19b", "etp19c", "etp19d", "etp19e", "etp19f", "etp19g", "etp19h"]
+                "4x100G[50G,25G,10G]": ["etp19a", "etp19b", "etp19c", "etp19d"]
             }
         },
         "Ethernet152": {
@@ -871,8 +852,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp20"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp20a", "etp20b"],
-                "4x100G[50G,25G,10G]": ["etp20a", "etp20b", "etp20c", "etp20d"],
-                "8x50G[25G,10G]": ["etp20a", "etp20b", "etp20c", "etp20d", "etp20e", "etp20f", "etp20g", "etp20h"]
+                "4x100G[50G,25G,10G]": ["etp20a", "etp20b", "etp20c", "etp20d"]
             }
         },
         "Ethernet160": {
@@ -881,8 +861,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp21"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp21a", "etp21b"],
-                "4x100G[50G,25G,10G]": ["etp21a", "etp21b", "etp21c", "etp21d"],
-                "8x50G[25G,10G]": ["etp21a", "etp21b", "etp21c", "etp21d", "etp21e", "etp21f", "etp21g", "etp21h"]
+                "4x100G[50G,25G,10G]": ["etp21a", "etp21b", "etp21c", "etp21d"]
             }
         },
         "Ethernet168": {
@@ -891,8 +870,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp22"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp22a", "etp22b"],
-                "4x100G[50G,25G,10G]": ["etp22a", "etp22b", "etp22c", "etp22d"],
-                "8x50G[25G,10G]": ["etp22a", "etp22b", "etp22c", "etp22d", "etp22e", "etp22f", "etp22g", "etp22h"]
+                "4x100G[50G,25G,10G]": ["etp22a", "etp22b", "etp22c", "etp22d"]
             }
         },
         "Ethernet176": {
@@ -901,8 +879,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp23"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp23a", "etp23b"],
-                "4x100G[50G,25G,10G]": ["etp23a", "etp23b", "etp23c", "etp23d"],
-                "8x50G[25G,10G]": ["etp23a", "etp23b", "etp23c", "etp23d", "etp23e", "etp23f", "etp23g", "etp23h"]
+                "4x100G[50G,25G,10G]": ["etp23a", "etp23b", "etp23c", "etp23d"]
             }
         },
         "Ethernet184": {
@@ -911,8 +888,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp24"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp24a", "etp24b"],
-                "4x100G[50G,25G,10G]": ["etp24a", "etp24b", "etp24c", "etp24d"],
-                "8x50G[25G,10G]": ["etp24a", "etp24b", "etp24c", "etp24d", "etp24e", "etp24f", "etp24g", "etp24h"]
+                "4x100G[50G,25G,10G]": ["etp24a", "etp24b", "etp24c", "etp24d"]
             }
         },
         "Ethernet192": {
@@ -921,8 +897,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp25"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp25a", "etp25b"],
-                "4x100G[50G,25G,10G]": ["etp25a", "etp25b", "etp25c", "etp25d"],
-                "8x50G[25G,10G]": ["etp25a", "etp25b", "etp25c", "etp25d", "etp25e", "etp25f", "etp25g", "etp25h"]
+                "4x100G[50G,25G,10G]": ["etp25a", "etp25b", "etp25c", "etp25d"]
             }
         },
         "Ethernet200": {
@@ -931,8 +906,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp26"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp26a", "etp26b"],
-                "4x100G[50G,25G,10G]": ["etp26a", "etp26b", "etp26c", "etp26d"],
-                "8x50G[25G,10G]": ["etp26a", "etp26b", "etp26c", "etp26d", "etp26e", "etp26f", "etp26g", "etp26h"]
+                "4x100G[50G,25G,10G]": ["etp26a", "etp26b", "etp26c", "etp26d"]
             }
         },
         "Ethernet208": {
@@ -941,8 +915,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp27"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp27a", "etp27b"],
-                "4x100G[50G,25G,10G]": ["etp27a", "etp27b", "etp27c", "etp27d"],
-                "8x50G[25G,10G]": ["etp27a", "etp27b", "etp27c", "etp27d", "etp27e", "etp27f", "etp27g", "etp27h"]
+                "4x100G[50G,25G,10G]": ["etp27a", "etp27b", "etp27c", "etp27d"]
             }
         },
         "Ethernet216": {
@@ -951,8 +924,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp28"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp28a", "etp28b"],
-                "4x100G[50G,25G,10G]": ["etp28a", "etp28b", "etp28c", "etp28d"],
-                "8x50G[25G,10G]": ["etp28a", "etp28b", "etp28c", "etp28d", "etp28e", "etp28f", "etp28g", "etp28h"]
+                "4x100G[50G,25G,10G]": ["etp28a", "etp28b", "etp28c", "etp28d"]
             }
         },
         "Ethernet224": {
@@ -961,8 +933,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp29"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp29a", "etp29b"],
-                "4x100G[50G,25G,10G]": ["etp29a", "etp29b", "etp29c", "etp29d"],
-                "8x50G[25G,10G]": ["etp29a", "etp29b", "etp29c", "etp29d", "etp29e", "etp29f", "etp29g", "etp29h"]
+                "4x100G[50G,25G,10G]": ["etp29a", "etp29b", "etp29c", "etp29d"]
             }
         },
         "Ethernet232": {
@@ -971,8 +942,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp30"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp30a", "etp30b"],
-                "4x100G[50G,25G,10G]": ["etp30a", "etp30b", "etp30c", "etp30d"],
-                "8x50G[25G,10G]": ["etp30a", "etp30b", "etp30c", "etp30d", "etp30e", "etp30f", "etp30g", "etp30h"]
+                "4x100G[50G,25G,10G]": ["etp30a", "etp30b", "etp30c", "etp30d"]
             }
         },
         "Ethernet240": {
@@ -981,8 +951,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp31"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp31a", "etp31b"],
-                "4x100G[50G,25G,10G]": ["etp31a", "etp31b", "etp31c", "etp31d"],
-                "8x50G[25G,10G]": ["etp31a", "etp31b", "etp31c", "etp31d", "etp31e", "etp31f", "etp31g", "etp31h"]
+                "4x100G[50G,25G,10G]": ["etp31a", "etp31b", "etp31c", "etp31d"]
             }
         },
         "Ethernet248": {
@@ -991,8 +960,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp32"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp32a", "etp32b"],
-                "4x100G[50G,25G,10G]": ["etp32a", "etp32b", "etp32c", "etp32d"],
-                "8x50G[25G,10G]": ["etp32a", "etp32b", "etp32c", "etp32d", "etp32e", "etp32f", "etp32g", "etp32h"]
+                "4x100G[50G,25G,10G]": ["etp32a", "etp32b", "etp32c", "etp32d"]
             }
         },
         "Ethernet256": {
@@ -1001,8 +969,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp33"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp33a", "etp33b"],
-                "4x100G[50G,25G,10G]": ["etp33a", "etp33b", "etp33c", "etp33d"],
-                "8x50G[25G,10G]": ["etp33a", "etp33b", "etp33c", "etp33d", "etp33e", "etp33f", "etp33g", "etp33h"]
+                "4x100G[50G,25G,10G]": ["etp33a", "etp33b", "etp33c", "etp33d"]
             }
         },
         "Ethernet264": {
@@ -1011,8 +978,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp34"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp34a", "etp34b"],
-                "4x100G[50G,25G,10G]": ["etp34a", "etp34b", "etp34c", "etp34d"],
-                "8x50G[25G,10G]": ["etp34a", "etp34b", "etp34c", "etp34d", "etp34e", "etp34f", "etp34g", "etp34h"]
+                "4x100G[50G,25G,10G]": ["etp34a", "etp34b", "etp34c", "etp34d"]
             }
         },
         "Ethernet272": {
@@ -1021,8 +987,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp35"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp35a", "etp35b"],
-                "4x100G[50G,25G,10G]": ["etp35a", "etp35b", "etp35c", "etp35d"],
-                "8x50G[25G,10G]": ["etp35a", "etp35b", "etp35c", "etp35d", "etp35e", "etp35f", "etp35g", "etp35h"]
+                "4x100G[50G,25G,10G]": ["etp35a", "etp35b", "etp35c", "etp35d"]
             }
         },
         "Ethernet280": {
@@ -1031,8 +996,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp36"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp36a", "etp36b"],
-                "4x100G[50G,25G,10G]": ["etp36a", "etp36b", "etp36c", "etp36d"],
-                "8x50G[25G,10G]": ["etp36a", "etp36b", "etp36c", "etp36d", "etp36e", "etp36f", "etp36g", "etp36h"]
+                "4x100G[50G,25G,10G]": ["etp36a", "etp36b", "etp36c", "etp36d"]
             }
         },
         "Ethernet288": {
@@ -1041,8 +1005,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp37"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp37a", "etp37b"],
-                "4x100G[50G,25G,10G]": ["etp37a", "etp37b", "etp37c", "etp37d"],
-                "8x50G[25G,10G]": ["etp37a", "etp37b", "etp37c", "etp37d", "etp37e", "etp37f", "etp37g", "etp37h"]
+                "4x100G[50G,25G,10G]": ["etp37a", "etp37b", "etp37c", "etp37d"]
             }
         },
         "Ethernet296": {
@@ -1051,8 +1014,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp38"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp38a", "etp38b"],
-                "4x100G[50G,25G,10G]": ["etp38a", "etp38b", "etp38c", "etp38d"],
-                "8x50G[25G,10G]": ["etp38a", "etp38b", "etp38c", "etp38d", "etp38e", "etp38f", "etp38g", "etp38h"]
+                "4x100G[50G,25G,10G]": ["etp38a", "etp38b", "etp38c", "etp38d"]
             }
         },
         "Ethernet304": {
@@ -1061,8 +1023,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp39"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp39a", "etp39b"],
-                "4x100G[50G,25G,10G]": ["etp39a", "etp39b", "etp39c", "etp39d"],
-                "8x50G[25G,10G]": ["etp39a", "etp39b", "etp39c", "etp39d", "etp39e", "etp39f", "etp39g", "etp39h"]
+                "4x100G[50G,25G,10G]": ["etp39a", "etp39b", "etp39c", "etp39d"]
             }
         },
         "Ethernet312": {
@@ -1071,8 +1032,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp40"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp40a", "etp40b"],
-                "4x100G[50G,25G,10G]": ["etp40a", "etp40b", "etp40c", "etp40d"],
-                "8x50G[25G,10G]": ["etp40a", "etp40b", "etp40c", "etp40d", "etp40e", "etp40f", "etp40g", "etp40h"]
+                "4x100G[50G,25G,10G]": ["etp40a", "etp40b", "etp40c", "etp40d"]
             }
         },
         "Ethernet320": {
@@ -1081,8 +1041,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp41"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp41a", "etp41b"],
-                "4x100G[50G,25G,10G]": ["etp41a", "etp41b", "etp41c", "etp41d"],
-                "8x50G[25G,10G]": ["etp41a", "etp41b", "etp41c", "etp41d", "etp41e", "etp41f", "etp41g", "etp41h"]
+                "4x100G[50G,25G,10G]": ["etp41a", "etp41b", "etp41c", "etp41d"]
             }
         },
         "Ethernet328": {
@@ -1091,8 +1050,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp42"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp42a", "etp42b"],
-                "4x100G[50G,25G,10G]": ["etp42a", "etp42b", "etp42c", "etp42d"],
-                "8x50G[25G,10G]": ["etp42a", "etp42b", "etp42c", "etp42d", "etp42e", "etp42f", "etp42g", "etp42h"]
+                "4x100G[50G,25G,10G]": ["etp42a", "etp42b", "etp42c", "etp42d"]
             }
         },
         "Ethernet336": {
@@ -1101,8 +1059,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp43"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp43a", "etp43b"],
-                "4x100G[50G,25G,10G]": ["etp43a", "etp43b", "etp43c", "etp43d"],
-                "8x50G[25G,10G]": ["etp43a", "etp43b", "etp43c", "etp43d", "etp43e", "etp43f", "etp43g", "etp43h"]
+                "4x100G[50G,25G,10G]": ["etp43a", "etp43b", "etp43c", "etp43d"]
             }
         },
         "Ethernet344": {
@@ -1111,8 +1068,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp44"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp44a", "etp44b"],
-                "4x100G[50G,25G,10G]": ["etp44a", "etp44b", "etp44c", "etp44d"],
-                "8x50G[25G,10G]": ["etp44a", "etp44b", "etp44c", "etp44d", "etp44e", "etp44f", "etp44g", "etp44h"]
+                "4x100G[50G,25G,10G]": ["etp44a", "etp44b", "etp44c", "etp44d"]
             }
         },
         "Ethernet352": {
@@ -1121,8 +1077,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp45"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp45a", "etp45b"],
-                "4x100G[50G,25G,10G]": ["etp45a", "etp45b", "etp45c", "etp45d"],
-                "8x50G[25G,10G]": ["etp45a", "etp45b", "etp45c", "etp45d", "etp45e", "etp45f", "etp45g", "etp45h"]
+                "4x100G[50G,25G,10G]": ["etp45a", "etp45b", "etp45c", "etp45d"]
             }
         },
         "Ethernet360": {
@@ -1131,8 +1086,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp46"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp46a", "etp46b"],
-                "4x100G[50G,25G,10G]": ["etp46a", "etp46b", "etp46c", "etp46d"],
-                "8x50G[25G,10G]": ["etp46a", "etp46b", "etp46c", "etp46d", "etp46e", "etp46f", "etp46g", "etp46h"]
+                "4x100G[50G,25G,10G]": ["etp46a", "etp46b", "etp46c", "etp46d"]
             }
         },
         "Ethernet368": {
@@ -1141,8 +1095,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp47"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp47a", "etp47b"],
-                "4x100G[50G,25G,10G]": ["etp47a", "etp47b", "etp47c", "etp47d"],
-                "8x50G[25G,10G]": ["etp47a", "etp47b", "etp47c", "etp47d", "etp47e", "etp47f", "etp47g", "etp47h"]
+                "4x100G[50G,25G,10G]": ["etp47a", "etp47b", "etp47c", "etp47d"]
             }
         },
         "Ethernet376": {
@@ -1151,8 +1104,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp48"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp48a", "etp48b"],
-                "4x100G[50G,25G,10G]": ["etp48a", "etp48b", "etp48c", "etp48d"],
-                "8x50G[25G,10G]": ["etp48a", "etp48b", "etp48c", "etp48d", "etp48e", "etp48f", "etp48g", "etp48h"]
+                "4x100G[50G,25G,10G]": ["etp48a", "etp48b", "etp48c", "etp48d"]
             }
         },
         "Ethernet384": {
@@ -1161,8 +1113,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp49"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp49a", "etp49b"],
-                "4x100G[50G,25G,10G]": ["etp49a", "etp49b", "etp49c", "etp49d"],
-                "8x50G[25G,10G]": ["etp49a", "etp49b", "etp49c", "etp49d", "etp49e", "etp49f", "etp49g", "etp49h"]
+                "4x100G[50G,25G,10G]": ["etp49a", "etp49b", "etp49c", "etp49d"]
             }
         },
         "Ethernet392": {
@@ -1171,8 +1122,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp50"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp50a", "etp50b"],
-                "4x100G[50G,25G,10G]": ["etp50a", "etp50b", "etp50c", "etp50d"],
-                "8x50G[25G,10G]": ["etp50a", "etp50b", "etp50c", "etp50d", "etp50e", "etp50f", "etp50g", "etp50h"]
+                "4x100G[50G,25G,10G]": ["etp50a", "etp50b", "etp50c", "etp50d"]
             }
         },
         "Ethernet400": {
@@ -1181,8 +1131,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp51"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp51a", "etp51b"],
-                "4x100G[50G,25G,10G]": ["etp51a", "etp51b", "etp51c", "etp51d"],
-                "8x50G[25G,10G]": ["etp51a", "etp51b", "etp51c", "etp51d", "etp51e", "etp51f", "etp51g", "etp51h"]
+                "4x100G[50G,25G,10G]": ["etp51a", "etp51b", "etp51c", "etp51d"]
             }
         },
         "Ethernet408": {
@@ -1191,8 +1140,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp52"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp52a", "etp52b"],
-                "4x100G[50G,25G,10G]": ["etp52a", "etp52b", "etp52c", "etp52d"],
-                "8x50G[25G,10G]": ["etp52a", "etp52b", "etp52c", "etp52d", "etp52e", "etp52f", "etp52g", "etp52h"]
+                "4x100G[50G,25G,10G]": ["etp52a", "etp52b", "etp52c", "etp52d"]
             }
         },
         "Ethernet416": {
@@ -1201,8 +1149,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp53"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp53a", "etp53b"],
-                "4x100G[50G,25G,10G]": ["etp53a", "etp53b", "etp53c", "etp53d"],
-                "8x50G[25G,10G]": ["etp53a", "etp53b", "etp53c", "etp53d", "etp53e", "etp53f", "etp53g", "etp53h"]
+                "4x100G[50G,25G,10G]": ["etp53a", "etp53b", "etp53c", "etp53d"]
             }
         },
         "Ethernet424": {
@@ -1211,8 +1158,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp54"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp54a", "etp54b"],
-                "4x100G[50G,25G,10G]": ["etp54a", "etp54b", "etp54c", "etp54d"],
-                "8x50G[25G,10G]": ["etp54a", "etp54b", "etp54c", "etp54d", "etp54e", "etp54f", "etp54g", "etp54h"]
+                "4x100G[50G,25G,10G]": ["etp54a", "etp54b", "etp54c", "etp54d"]
             }
         },
         "Ethernet432": {
@@ -1221,8 +1167,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp55"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp55a", "etp55b"],
-                "4x100G[50G,25G,10G]": ["etp55a", "etp55b", "etp55c", "etp55d"],
-                "8x50G[25G,10G]": ["etp55a", "etp55b", "etp55c", "etp55d", "etp55e", "etp55f", "etp55g", "etp55h"]
+                "4x100G[50G,25G,10G]": ["etp55a", "etp55b", "etp55c", "etp55d"]
             }
         },
         "Ethernet440": {
@@ -1231,8 +1176,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp56"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp56a", "etp56b"],
-                "4x100G[50G,25G,10G]": ["etp56a", "etp56b", "etp56c", "etp56d"],
-                "8x50G[25G,10G]": ["etp56a", "etp56b", "etp56c", "etp56d", "etp56e", "etp56f", "etp56g", "etp56h"]
+                "4x100G[50G,25G,10G]": ["etp56a", "etp56b", "etp56c", "etp56d"]
             }
         },
         "Ethernet448": {
@@ -1241,8 +1185,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp57"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp57a", "etp57b"],
-                "4x100G[50G,25G,10G]": ["etp57a", "etp57b", "etp57c", "etp57d"],
-                "8x50G[25G,10G]": ["etp57a", "etp57b", "etp57c", "etp57d", "etp57e", "etp57f", "etp57g", "etp57h"]
+                "4x100G[50G,25G,10G]": ["etp57a", "etp57b", "etp57c", "etp57d"]
             }
         },
         "Ethernet456": {
@@ -1251,8 +1194,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp58"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp58a", "etp58b"],
-                "4x100G[50G,25G,10G]": ["etp58a", "etp58b", "etp58c", "etp58d"],
-                "8x50G[25G,10G]": ["etp58a", "etp58b", "etp58c", "etp58d", "etp58e", "etp58f", "etp58g", "etp58h"]
+                "4x100G[50G,25G,10G]": ["etp58a", "etp58b", "etp58c", "etp58d"]
             }
         },
         "Ethernet464": {
@@ -1261,8 +1203,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp59"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp59a", "etp59b"],
-                "4x100G[50G,25G,10G]": ["etp59a", "etp59b", "etp59c", "etp59d"],
-                "8x50G[25G,10G]": ["etp59a", "etp59b", "etp59c", "etp59d", "etp59e", "etp59f", "etp59g", "etp59h"]
+                "4x100G[50G,25G,10G]": ["etp59a", "etp59b", "etp59c", "etp59d"]
             }
         },
         "Ethernet472": {
@@ -1271,8 +1212,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp60"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp60a", "etp60b"],
-                "4x100G[50G,25G,10G]": ["etp60a", "etp60b", "etp60c", "etp60d"],
-                "8x50G[25G,10G]": ["etp60a", "etp60b", "etp60c", "etp60d", "etp60e", "etp60f", "etp60g", "etp60h"]
+                "4x100G[50G,25G,10G]": ["etp60a", "etp60b", "etp60c", "etp60d"]
             }
         },
         "Ethernet480": {
@@ -1281,8 +1221,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp61"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp61a", "etp61b"],
-                "4x100G[50G,25G,10G]": ["etp61a", "etp61b", "etp61c", "etp61d"],
-                "8x50G[25G,10G]": ["etp61a", "etp61b", "etp61c", "etp61d", "etp61e", "etp61f", "etp61g", "etp61h"]
+                "4x100G[50G,25G,10G]": ["etp61a", "etp61b", "etp61c", "etp61d"]
             }
         },
         "Ethernet488": {
@@ -1291,8 +1230,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp62"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp62a", "etp62b"],
-                "4x100G[50G,25G,10G]": ["etp62a", "etp62b", "etp62c", "etp62d"],
-                "8x50G[25G,10G]": ["etp62a", "etp62b", "etp62c", "etp62d", "etp62e", "etp62f", "etp62g", "etp62h"]
+                "4x100G[50G,25G,10G]": ["etp62a", "etp62b", "etp62c", "etp62d"]
             }
         },
         "Ethernet496": {
@@ -1301,8 +1239,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp63"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp63a", "etp63b"],
-                "4x100G[50G,25G,10G]": ["etp63a", "etp63b", "etp63c", "etp63d"],
-                "8x50G[25G,10G]": ["etp63a", "etp63b", "etp63c", "etp63d", "etp63e", "etp63f", "etp63g", "etp63h"]
+                "4x100G[50G,25G,10G]": ["etp63a", "etp63b", "etp63c", "etp63d"]
             }
         },
         "Ethernet504": {
@@ -1311,8 +1248,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp64"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp64a", "etp64b"],
-                "4x100G[50G,25G,10G]": ["etp64a", "etp64b", "etp64c", "etp64d"],
-                "8x50G[25G,10G]": ["etp64a", "etp64b", "etp64c", "etp64d", "etp64e", "etp64f", "etp64g", "etp64h"]
+                "4x100G[50G,25G,10G]": ["etp64a", "etp64b", "etp64c", "etp64d"]
             }
         },
         "Ethernet512": {
diff --git a/device/mellanox/x86_64-nvidia_sn5400_simx-r0/platform.json b/device/mellanox/x86_64-nvidia_sn5400_simx-r0/platform.json
index e85c160d0..ff58f12ed 100644
--- a/device/mellanox/x86_64-nvidia_sn5400_simx-r0/platform.json
+++ b/device/mellanox/x86_64-nvidia_sn5400_simx-r0/platform.json
@@ -684,8 +684,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp1"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp1a", "etp1b"],
-                "4x100G[50G,25G,10G]": ["etp1a", "etp1b", "etp1c", "etp1d"],
-                "8x50G[25G,10G]": ["etp1a", "etp1b", "etp1c", "etp1d", "etp1e", "etp1f", "etp1g", "etp1h"]
+                "4x100G[50G,25G,10G]": ["etp1a", "etp1b", "etp1c", "etp1d"]
             }
         },
         "Ethernet8": {
@@ -694,8 +693,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp2"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp2a", "etp2b"],
-                "4x100G[50G,25G,10G]": ["etp2a", "etp2b", "etp2c", "etp2d"],
-                "8x50G[25G,10G]": ["etp2a", "etp2b", "etp2c", "etp2d", "etp2e", "etp2f", "etp2g", "etp2h"]
+                "4x100G[50G,25G,10G]": ["etp2a", "etp2b", "etp2c", "etp2d"]
             }
         },
         "Ethernet16": {
@@ -704,8 +702,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp3"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp3a", "etp3b"],
-                "4x100G[50G,25G,10G]": ["etp3a", "etp3b", "etp3c", "etp3d"],
-                "8x50G[25G,10G]": ["etp3a", "etp3b", "etp3c", "etp3d", "etp3e", "etp3f", "etp3g", "etp3h"]
+                "4x100G[50G,25G,10G]": ["etp3a", "etp3b", "etp3c", "etp3d"]
             }
         },
         "Ethernet24": {
@@ -714,8 +711,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp4"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp4a", "etp4b"],
-                "4x100G[50G,25G,10G]": ["etp4a", "etp4b", "etp4c", "etp4d"],
-                "8x50G[25G,10G]": ["etp4a", "etp4b", "etp4c", "etp4d", "etp4e", "etp4f", "etp4g", "etp4h"]
+                "4x100G[50G,25G,10G]": ["etp4a", "etp4b", "etp4c", "etp4d"]
             }
         },
         "Ethernet32": {
@@ -724,8 +720,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp5"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp5a", "etp5b"],
-                "4x100G[50G,25G,10G]": ["etp5a", "etp5b", "etp5c", "etp5d"],
-                "8x50G[25G,10G]": ["etp5a", "etp5b", "etp5c", "etp5d", "etp5e", "etp5f", "etp5g", "etp5h"]
+                "4x100G[50G,25G,10G]": ["etp5a", "etp5b", "etp5c", "etp5d"]
             }
         },
         "Ethernet40": {
@@ -734,8 +729,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp6"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp6a", "etp6b"],
-                "4x100G[50G,25G,10G]": ["etp6a", "etp6b", "etp6c", "etp6d"],
-                "8x50G[25G,10G]": ["etp6a", "etp6b", "etp6c", "etp6d", "etp6e", "etp6f", "etp6g", "etp6h"]
+                "4x100G[50G,25G,10G]": ["etp6a", "etp6b", "etp6c", "etp6d"]
             }
         },
         "Ethernet48": {
@@ -744,8 +738,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp7"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp7a", "etp7b"],
-                "4x100G[50G,25G,10G]": ["etp7a", "etp7b", "etp7c", "etp7d"],
-                "8x50G[25G,10G]": ["etp7a", "etp7b", "etp7c", "etp7d", "etp7e", "etp7f", "etp7g", "etp7h"]
+                "4x100G[50G,25G,10G]": ["etp7a", "etp7b", "etp7c", "etp7d"]
             }
         },
         "Ethernet56": {
@@ -754,8 +747,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp8"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp8a", "etp8b"],
-                "4x100G[50G,25G,10G]": ["etp8a", "etp8b", "etp8c", "etp8d"],
-                "8x50G[25G,10G]": ["etp8a", "etp8b", "etp8c", "etp8d", "etp8e", "etp8f", "etp8g", "etp8h"]
+                "4x100G[50G,25G,10G]": ["etp8a", "etp8b", "etp8c", "etp8d"]
             }
         },
         "Ethernet64": {
@@ -764,8 +756,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp9"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp9a", "etp9b"],
-                "4x100G[50G,25G,10G]": ["etp9a", "etp9b", "etp9c", "etp9d"],
-                "8x50G[25G,10G]": ["etp9a", "etp9b", "etp9c", "etp9d", "etp9e", "etp9f", "etp9g", "etp9h"]
+                "4x100G[50G,25G,10G]": ["etp9a", "etp9b", "etp9c", "etp9d"]
             }
         },
         "Ethernet72": {
@@ -774,8 +765,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp10"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp10a", "etp10b"],
-                "4x100G[50G,25G,10G]": ["etp10a", "etp10b", "etp10c", "etp10d"],
-                "8x50G[25G,10G]": ["etp10a", "etp10b", "etp10c", "etp10d", "etp10e", "etp10f", "etp10g", "etp10h"]
+                "4x100G[50G,25G,10G]": ["etp10a", "etp10b", "etp10c", "etp10d"]
             }
         },
         "Ethernet80": {
@@ -784,8 +774,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp11"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp11a", "etp11b"],
-                "4x100G[50G,25G,10G]": ["etp11a", "etp11b", "etp11c", "etp11d"],
-                "8x50G[25G,10G]": ["etp11a", "etp11b", "etp11c", "etp11d", "etp11e", "etp11f", "etp11g", "etp11h"]
+                "4x100G[50G,25G,10G]": ["etp11a", "etp11b", "etp11c", "etp11d"]
             }
         },
         "Ethernet88": {
@@ -794,8 +783,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp12"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp12a", "etp12b"],
-                "4x100G[50G,25G,10G]": ["etp12a", "etp12b", "etp12c", "etp12d"],
-                "8x50G[25G,10G]": ["etp12a", "etp12b", "etp12c", "etp12d", "etp12e", "etp12f", "etp12g", "etp12h"]
+                "4x100G[50G,25G,10G]": ["etp12a", "etp12b", "etp12c", "etp12d"]
             }
         },
         "Ethernet96": {
@@ -804,8 +792,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp13"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp13a", "etp13b"],
-                "4x100G[50G,25G,10G]": ["etp13a", "etp13b", "etp13c", "etp13d"],
-                "8x50G[25G,10G]": ["etp13a", "etp13b", "etp13c", "etp13d", "etp13e", "etp13f", "etp13g", "etp13h"]
+                "4x100G[50G,25G,10G]": ["etp13a", "etp13b", "etp13c", "etp13d"]
             }
         },
         "Ethernet104": {
@@ -814,8 +801,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp14"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp14a", "etp14b"],
-                "4x100G[50G,25G,10G]": ["etp14a", "etp14b", "etp14c", "etp14d"],
-                "8x50G[25G,10G]": ["etp14a", "etp14b", "etp14c", "etp14d", "etp14e", "etp14f", "etp14g", "etp14h"]
+                "4x100G[50G,25G,10G]": ["etp14a", "etp14b", "etp14c", "etp14d"]
             }
         },
         "Ethernet112": {
@@ -824,8 +810,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp15"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp15a", "etp15b"],
-                "4x100G[50G,25G,10G]": ["etp15a", "etp15b", "etp15c", "etp15d"],
-                "8x50G[25G,10G]": ["etp15a", "etp15b", "etp15c", "etp15d", "etp15e", "etp15f", "etp15g", "etp15h"]
+                "4x100G[50G,25G,10G]": ["etp15a", "etp15b", "etp15c", "etp15d"]
             }
         },
         "Ethernet120": {
@@ -834,8 +819,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp16"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp16a", "etp16b"],
-                "4x100G[50G,25G,10G]": ["etp16a", "etp16b", "etp16c", "etp16d"],
-                "8x50G[25G,10G]": ["etp16a", "etp16b", "etp16c", "etp16d", "etp16e", "etp16f", "etp16g", "etp16h"]
+                "4x100G[50G,25G,10G]": ["etp16a", "etp16b", "etp16c", "etp16d"]
             }
         },
         "Ethernet128": {
@@ -844,8 +828,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp17"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp17a", "etp17b"],
-                "4x100G[50G,25G,10G]": ["etp17a", "etp17b", "etp17c", "etp17d"],
-                "8x50G[25G,10G]": ["etp17a", "etp17b", "etp17c", "etp17d", "etp17e", "etp17f", "etp17g", "etp17h"]
+                "4x100G[50G,25G,10G]": ["etp17a", "etp17b", "etp17c", "etp17d"]
             }
         },
         "Ethernet136": {
@@ -854,8 +837,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp18"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp18a", "etp18b"],
-                "4x100G[50G,25G,10G]": ["etp18a", "etp18b", "etp18c", "etp18d"],
-                "8x50G[25G,10G]": ["etp18a", "etp18b", "etp18c", "etp18d", "etp18e", "etp18f", "etp18g", "etp18h"]
+                "4x100G[50G,25G,10G]": ["etp18a", "etp18b", "etp18c", "etp18d"]
             }
         },
         "Ethernet144": {
@@ -864,8 +846,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp19"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp19a", "etp19b"],
-                "4x100G[50G,25G,10G]": ["etp19a", "etp19b", "etp19c", "etp19d"],
-                "8x50G[25G,10G]": ["etp19a", "etp19b", "etp19c", "etp19d", "etp19e", "etp19f", "etp19g", "etp19h"]
+                "4x100G[50G,25G,10G]": ["etp19a", "etp19b", "etp19c", "etp19d"]
             }
         },
         "Ethernet152": {
@@ -874,8 +855,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp20"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp20a", "etp20b"],
-                "4x100G[50G,25G,10G]": ["etp20a", "etp20b", "etp20c", "etp20d"],
-                "8x50G[25G,10G]": ["etp20a", "etp20b", "etp20c", "etp20d", "etp20e", "etp20f", "etp20g", "etp20h"]
+                "4x100G[50G,25G,10G]": ["etp20a", "etp20b", "etp20c", "etp20d"]
             }
         },
         "Ethernet160": {
@@ -884,8 +864,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp21"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp21a", "etp21b"],
-                "4x100G[50G,25G,10G]": ["etp21a", "etp21b", "etp21c", "etp21d"],
-                "8x50G[25G,10G]": ["etp21a", "etp21b", "etp21c", "etp21d", "etp21e", "etp21f", "etp21g", "etp21h"]
+                "4x100G[50G,25G,10G]": ["etp21a", "etp21b", "etp21c", "etp21d"]
             }
         },
         "Ethernet168": {
@@ -894,8 +873,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp22"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp22a", "etp22b"],
-                "4x100G[50G,25G,10G]": ["etp22a", "etp22b", "etp22c", "etp22d"],
-                "8x50G[25G,10G]": ["etp22a", "etp22b", "etp22c", "etp22d", "etp22e", "etp22f", "etp22g", "etp22h"]
+                "4x100G[50G,25G,10G]": ["etp22a", "etp22b", "etp22c", "etp22d"]
             }
         },
         "Ethernet176": {
@@ -904,8 +882,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp23"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp23a", "etp23b"],
-                "4x100G[50G,25G,10G]": ["etp23a", "etp23b", "etp23c", "etp23d"],
-                "8x50G[25G,10G]": ["etp23a", "etp23b", "etp23c", "etp23d", "etp23e", "etp23f", "etp23g", "etp23h"]
+                "4x100G[50G,25G,10G]": ["etp23a", "etp23b", "etp23c", "etp23d"]
             }
         },
         "Ethernet184": {
@@ -914,8 +891,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp24"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp24a", "etp24b"],
-                "4x100G[50G,25G,10G]": ["etp24a", "etp24b", "etp24c", "etp24d"],
-                "8x50G[25G,10G]": ["etp24a", "etp24b", "etp24c", "etp24d", "etp24e", "etp24f", "etp24g", "etp24h"]
+                "4x100G[50G,25G,10G]": ["etp24a", "etp24b", "etp24c", "etp24d"]
             }
         },
         "Ethernet192": {
@@ -924,8 +900,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp25"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp25a", "etp25b"],
-                "4x100G[50G,25G,10G]": ["etp25a", "etp25b", "etp25c", "etp25d"],
-                "8x50G[25G,10G]": ["etp25a", "etp25b", "etp25c", "etp25d", "etp25e", "etp25f", "etp25g", "etp25h"]
+                "4x100G[50G,25G,10G]": ["etp25a", "etp25b", "etp25c", "etp25d"]
             }
         },
         "Ethernet200": {
@@ -934,8 +909,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp26"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp26a", "etp26b"],
-                "4x100G[50G,25G,10G]": ["etp26a", "etp26b", "etp26c", "etp26d"],
-                "8x50G[25G,10G]": ["etp26a", "etp26b", "etp26c", "etp26d", "etp26e", "etp26f", "etp26g", "etp26h"]
+                "4x100G[50G,25G,10G]": ["etp26a", "etp26b", "etp26c", "etp26d"]
             }
         },
         "Ethernet208": {
@@ -944,8 +918,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp27"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp27a", "etp27b"],
-                "4x100G[50G,25G,10G]": ["etp27a", "etp27b", "etp27c", "etp27d"],
-                "8x50G[25G,10G]": ["etp27a", "etp27b", "etp27c", "etp27d", "etp27e", "etp27f", "etp27g", "etp27h"]
+                "4x100G[50G,25G,10G]": ["etp27a", "etp27b", "etp27c", "etp27d"]
             }
         },
         "Ethernet216": {
@@ -954,8 +927,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp28"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp28a", "etp28b"],
-                "4x100G[50G,25G,10G]": ["etp28a", "etp28b", "etp28c", "etp28d"],
-                "8x50G[25G,10G]": ["etp28a", "etp28b", "etp28c", "etp28d", "etp28e", "etp28f", "etp28g", "etp28h"]
+                "4x100G[50G,25G,10G]": ["etp28a", "etp28b", "etp28c", "etp28d"]
             }
         },
         "Ethernet224": {
@@ -964,8 +936,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp29"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp29a", "etp29b"],
-                "4x100G[50G,25G,10G]": ["etp29a", "etp29b", "etp29c", "etp29d"],
-                "8x50G[25G,10G]": ["etp29a", "etp29b", "etp29c", "etp29d", "etp29e", "etp29f", "etp29g", "etp29h"]
+                "4x100G[50G,25G,10G]": ["etp29a", "etp29b", "etp29c", "etp29d"]
             }
         },
         "Ethernet232": {
@@ -974,8 +945,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp30"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp30a", "etp30b"],
-                "4x100G[50G,25G,10G]": ["etp30a", "etp30b", "etp30c", "etp30d"],
-                "8x50G[25G,10G]": ["etp30a", "etp30b", "etp30c", "etp30d", "etp30e", "etp30f", "etp30g", "etp30h"]
+                "4x100G[50G,25G,10G]": ["etp30a", "etp30b", "etp30c", "etp30d"]
             }
         },
         "Ethernet240": {
@@ -984,8 +954,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp31"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp31a", "etp31b"],
-                "4x100G[50G,25G,10G]": ["etp31a", "etp31b", "etp31c", "etp31d"],
-                "8x50G[25G,10G]": ["etp31a", "etp31b", "etp31c", "etp31d", "etp31e", "etp31f", "etp31g", "etp31h"]
+                "4x100G[50G,25G,10G]": ["etp31a", "etp31b", "etp31c", "etp31d"]
             }
         },
         "Ethernet248": {
@@ -994,8 +963,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp32"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp32a", "etp32b"],
-                "4x100G[50G,25G,10G]": ["etp32a", "etp32b", "etp32c", "etp32d"],
-                "8x50G[25G,10G]": ["etp32a", "etp32b", "etp32c", "etp32d", "etp32e", "etp32f", "etp32g", "etp32h"]
+                "4x100G[50G,25G,10G]": ["etp32a", "etp32b", "etp32c", "etp32d"]
             }
         },
         "Ethernet256": {
@@ -1004,8 +972,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp33"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp33a", "etp33b"],
-                "4x100G[50G,25G,10G]": ["etp33a", "etp33b", "etp33c", "etp33d"],
-                "8x50G[25G,10G]": ["etp33a", "etp33b", "etp33c", "etp33d", "etp33e", "etp33f", "etp33g", "etp33h"]
+                "4x100G[50G,25G,10G]": ["etp33a", "etp33b", "etp33c", "etp33d"]
             }
         },
         "Ethernet264": {
@@ -1014,8 +981,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp34"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp34a", "etp34b"],
-                "4x100G[50G,25G,10G]": ["etp34a", "etp34b", "etp34c", "etp34d"],
-                "8x50G[25G,10G]": ["etp34a", "etp34b", "etp34c", "etp34d", "etp34e", "etp34f", "etp34g", "etp34h"]
+                "4x100G[50G,25G,10G]": ["etp34a", "etp34b", "etp34c", "etp34d"]
             }
         },
         "Ethernet272": {
@@ -1024,8 +990,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp35"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp35a", "etp35b"],
-                "4x100G[50G,25G,10G]": ["etp35a", "etp35b", "etp35c", "etp35d"],
-                "8x50G[25G,10G]": ["etp35a", "etp35b", "etp35c", "etp35d", "etp35e", "etp35f", "etp35g", "etp35h"]
+                "4x100G[50G,25G,10G]": ["etp35a", "etp35b", "etp35c", "etp35d"]
             }
         },
         "Ethernet280": {
@@ -1034,8 +999,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp36"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp36a", "etp36b"],
-                "4x100G[50G,25G,10G]": ["etp36a", "etp36b", "etp36c", "etp36d"],
-                "8x50G[25G,10G]": ["etp36a", "etp36b", "etp36c", "etp36d", "etp36e", "etp36f", "etp36g", "etp36h"]
+                "4x100G[50G,25G,10G]": ["etp36a", "etp36b", "etp36c", "etp36d"]
             }
         },
         "Ethernet288": {
@@ -1044,8 +1008,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp37"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp37a", "etp37b"],
-                "4x100G[50G,25G,10G]": ["etp37a", "etp37b", "etp37c", "etp37d"],
-                "8x50G[25G,10G]": ["etp37a", "etp37b", "etp37c", "etp37d", "etp37e", "etp37f", "etp37g", "etp37h"]
+                "4x100G[50G,25G,10G]": ["etp37a", "etp37b", "etp37c", "etp37d"]
             }
         },
         "Ethernet296": {
@@ -1054,8 +1017,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp38"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp38a", "etp38b"],
-                "4x100G[50G,25G,10G]": ["etp38a", "etp38b", "etp38c", "etp38d"],
-                "8x50G[25G,10G]": ["etp38a", "etp38b", "etp38c", "etp38d", "etp38e", "etp38f", "etp38g", "etp38h"]
+                "4x100G[50G,25G,10G]": ["etp38a", "etp38b", "etp38c", "etp38d"]
             }
         },
         "Ethernet304": {
@@ -1064,8 +1026,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp39"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp39a", "etp39b"],
-                "4x100G[50G,25G,10G]": ["etp39a", "etp39b", "etp39c", "etp39d"],
-                "8x50G[25G,10G]": ["etp39a", "etp39b", "etp39c", "etp39d", "etp39e", "etp39f", "etp39g", "etp39h"]
+                "4x100G[50G,25G,10G]": ["etp39a", "etp39b", "etp39c", "etp39d"]
             }
         },
         "Ethernet312": {
@@ -1074,8 +1035,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp40"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp40a", "etp40b"],
-                "4x100G[50G,25G,10G]": ["etp40a", "etp40b", "etp40c", "etp40d"],
-                "8x50G[25G,10G]": ["etp40a", "etp40b", "etp40c", "etp40d", "etp40e", "etp40f", "etp40g", "etp40h"]
+                "4x100G[50G,25G,10G]": ["etp40a", "etp40b", "etp40c", "etp40d"]
             }
         },
         "Ethernet320": {
@@ -1084,8 +1044,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp41"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp41a", "etp41b"],
-                "4x100G[50G,25G,10G]": ["etp41a", "etp41b", "etp41c", "etp41d"],
-                "8x50G[25G,10G]": ["etp41a", "etp41b", "etp41c", "etp41d", "etp41e", "etp41f", "etp41g", "etp41h"]
+                "4x100G[50G,25G,10G]": ["etp41a", "etp41b", "etp41c", "etp41d"]
             }
         },
         "Ethernet328": {
@@ -1094,8 +1053,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp42"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp42a", "etp42b"],
-                "4x100G[50G,25G,10G]": ["etp42a", "etp42b", "etp42c", "etp42d"],
-                "8x50G[25G,10G]": ["etp42a", "etp42b", "etp42c", "etp42d", "etp42e", "etp42f", "etp42g", "etp42h"]
+                "4x100G[50G,25G,10G]": ["etp42a", "etp42b", "etp42c", "etp42d"]
             }
         },
         "Ethernet336": {
@@ -1104,8 +1062,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp43"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp43a", "etp43b"],
-                "4x100G[50G,25G,10G]": ["etp43a", "etp43b", "etp43c", "etp43d"],
-                "8x50G[25G,10G]": ["etp43a", "etp43b", "etp43c", "etp43d", "etp43e", "etp43f", "etp43g", "etp43h"]
+                "4x100G[50G,25G,10G]": ["etp43a", "etp43b", "etp43c", "etp43d"]
             }
         },
         "Ethernet344": {
@@ -1114,8 +1071,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp44"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp44a", "etp44b"],
-                "4x100G[50G,25G,10G]": ["etp44a", "etp44b", "etp44c", "etp44d"],
-                "8x50G[25G,10G]": ["etp44a", "etp44b", "etp44c", "etp44d", "etp44e", "etp44f", "etp44g", "etp44h"]
+                "4x100G[50G,25G,10G]": ["etp44a", "etp44b", "etp44c", "etp44d"]
             }
         },
         "Ethernet352": {
@@ -1124,8 +1080,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp45"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp45a", "etp45b"],
-                "4x100G[50G,25G,10G]": ["etp45a", "etp45b", "etp45c", "etp45d"],
-                "8x50G[25G,10G]": ["etp45a", "etp45b", "etp45c", "etp45d", "etp45e", "etp45f", "etp45g", "etp45h"]
+                "4x100G[50G,25G,10G]": ["etp45a", "etp45b", "etp45c", "etp45d"]
             }
         },
         "Ethernet360": {
@@ -1134,8 +1089,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp46"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp46a", "etp46b"],
-                "4x100G[50G,25G,10G]": ["etp46a", "etp46b", "etp46c", "etp46d"],
-                "8x50G[25G,10G]": ["etp46a", "etp46b", "etp46c", "etp46d", "etp46e", "etp46f", "etp46g", "etp46h"]
+                "4x100G[50G,25G,10G]": ["etp46a", "etp46b", "etp46c", "etp46d"]
             }
         },
         "Ethernet368": {
@@ -1144,8 +1098,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp47"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp47a", "etp47b"],
-                "4x100G[50G,25G,10G]": ["etp47a", "etp47b", "etp47c", "etp47d"],
-                "8x50G[25G,10G]": ["etp47a", "etp47b", "etp47c", "etp47d", "etp47e", "etp47f", "etp47g", "etp47h"]
+                "4x100G[50G,25G,10G]": ["etp47a", "etp47b", "etp47c", "etp47d"]
             }
         },
         "Ethernet376": {
@@ -1154,8 +1107,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp48"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp48a", "etp48b"],
-                "4x100G[50G,25G,10G]": ["etp48a", "etp48b", "etp48c", "etp48d"],
-                "8x50G[25G,10G]": ["etp48a", "etp48b", "etp48c", "etp48d", "etp48e", "etp48f", "etp48g", "etp48h"]
+                "4x100G[50G,25G,10G]": ["etp48a", "etp48b", "etp48c", "etp48d"]
             }
         },
         "Ethernet384": {
@@ -1164,8 +1116,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp49"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp49a", "etp49b"],
-                "4x100G[50G,25G,10G]": ["etp49a", "etp49b", "etp49c", "etp49d"],
-                "8x50G[25G,10G]": ["etp49a", "etp49b", "etp49c", "etp49d", "etp49e", "etp49f", "etp49g", "etp49h"]
+                "4x100G[50G,25G,10G]": ["etp49a", "etp49b", "etp49c", "etp49d"]
             }
         },
         "Ethernet392": {
@@ -1174,8 +1125,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp50"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp50a", "etp50b"],
-                "4x100G[50G,25G,10G]": ["etp50a", "etp50b", "etp50c", "etp50d"],
-                "8x50G[25G,10G]": ["etp50a", "etp50b", "etp50c", "etp50d", "etp50e", "etp50f", "etp50g", "etp50h"]
+                "4x100G[50G,25G,10G]": ["etp50a", "etp50b", "etp50c", "etp50d"]
             }
         },
         "Ethernet400": {
@@ -1184,8 +1134,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp51"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp51a", "etp51b"],
-                "4x100G[50G,25G,10G]": ["etp51a", "etp51b", "etp51c", "etp51d"],
-                "8x50G[25G,10G]": ["etp51a", "etp51b", "etp51c", "etp51d", "etp51e", "etp51f", "etp51g", "etp51h"]
+                "4x100G[50G,25G,10G]": ["etp51a", "etp51b", "etp51c", "etp51d"]
             }
         },
         "Ethernet408": {
@@ -1194,8 +1143,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp52"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp52a", "etp52b"],
-                "4x100G[50G,25G,10G]": ["etp52a", "etp52b", "etp52c", "etp52d"],
-                "8x50G[25G,10G]": ["etp52a", "etp52b", "etp52c", "etp52d", "etp52e", "etp52f", "etp52g", "etp52h"]
+                "4x100G[50G,25G,10G]": ["etp52a", "etp52b", "etp52c", "etp52d"]
             }
         },
         "Ethernet416": {
@@ -1204,8 +1152,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp53"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp53a", "etp53b"],
-                "4x100G[50G,25G,10G]": ["etp53a", "etp53b", "etp53c", "etp53d"],
-                "8x50G[25G,10G]": ["etp53a", "etp53b", "etp53c", "etp53d", "etp53e", "etp53f", "etp53g", "etp53h"]
+                "4x100G[50G,25G,10G]": ["etp53a", "etp53b", "etp53c", "etp53d"]
             }
         },
         "Ethernet424": {
@@ -1214,8 +1161,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp54"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp54a", "etp54b"],
-                "4x100G[50G,25G,10G]": ["etp54a", "etp54b", "etp54c", "etp54d"],
-                "8x50G[25G,10G]": ["etp54a", "etp54b", "etp54c", "etp54d", "etp54e", "etp54f", "etp54g", "etp54h"]
+                "4x100G[50G,25G,10G]": ["etp54a", "etp54b", "etp54c", "etp54d"]
             }
         },
         "Ethernet432": {
@@ -1224,8 +1170,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp55"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp55a", "etp55b"],
-                "4x100G[50G,25G,10G]": ["etp55a", "etp55b", "etp55c", "etp55d"],
-                "8x50G[25G,10G]": ["etp55a", "etp55b", "etp55c", "etp55d", "etp55e", "etp55f", "etp55g", "etp55h"]
+                "4x100G[50G,25G,10G]": ["etp55a", "etp55b", "etp55c", "etp55d"]
             }
         },
         "Ethernet440": {
@@ -1234,8 +1179,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp56"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp56a", "etp56b"],
-                "4x100G[50G,25G,10G]": ["etp56a", "etp56b", "etp56c", "etp56d"],
-                "8x50G[25G,10G]": ["etp56a", "etp56b", "etp56c", "etp56d", "etp56e", "etp56f", "etp56g", "etp56h"]
+                "4x100G[50G,25G,10G]": ["etp56a", "etp56b", "etp56c", "etp56d"]
             }
         },
         "Ethernet448": {
@@ -1244,8 +1188,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp57"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp57a", "etp57b"],
-                "4x100G[50G,25G,10G]": ["etp57a", "etp57b", "etp57c", "etp57d"],
-                "8x50G[25G,10G]": ["etp57a", "etp57b", "etp57c", "etp57d", "etp57e", "etp57f", "etp57g", "etp57h"]
+                "4x100G[50G,25G,10G]": ["etp57a", "etp57b", "etp57c", "etp57d"]
             }
         },
         "Ethernet456": {
@@ -1254,8 +1197,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp58"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp58a", "etp58b"],
-                "4x100G[50G,25G,10G]": ["etp58a", "etp58b", "etp58c", "etp58d"],
-                "8x50G[25G,10G]": ["etp58a", "etp58b", "etp58c", "etp58d", "etp58e", "etp58f", "etp58g", "etp58h"]
+                "4x100G[50G,25G,10G]": ["etp58a", "etp58b", "etp58c", "etp58d"]
             }
         },
         "Ethernet464": {
@@ -1264,8 +1206,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp59"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp59a", "etp59b"],
-                "4x100G[50G,25G,10G]": ["etp59a", "etp59b", "etp59c", "etp59d"],
-                "8x50G[25G,10G]": ["etp59a", "etp59b", "etp59c", "etp59d", "etp59e", "etp59f", "etp59g", "etp59h"]
+                "4x100G[50G,25G,10G]": ["etp59a", "etp59b", "etp59c", "etp59d"]
             }
         },
         "Ethernet472": {
@@ -1274,8 +1215,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp60"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp60a", "etp60b"],
-                "4x100G[50G,25G,10G]": ["etp60a", "etp60b", "etp60c", "etp60d"],
-                "8x50G[25G,10G]": ["etp60a", "etp60b", "etp60c", "etp60d", "etp60e", "etp60f", "etp60g", "etp60h"]
+                "4x100G[50G,25G,10G]": ["etp60a", "etp60b", "etp60c", "etp60d"]
             }
         },
         "Ethernet480": {
@@ -1284,8 +1224,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp61"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp61a", "etp61b"],
-                "4x100G[50G,25G,10G]": ["etp61a", "etp61b", "etp61c", "etp61d"],
-                "8x50G[25G,10G]": ["etp61a", "etp61b", "etp61c", "etp61d", "etp61e", "etp61f", "etp61g", "etp61h"]
+                "4x100G[50G,25G,10G]": ["etp61a", "etp61b", "etp61c", "etp61d"]
             }
         },
         "Ethernet488": {
@@ -1294,8 +1233,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp62"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp62a", "etp62b"],
-                "4x100G[50G,25G,10G]": ["etp62a", "etp62b", "etp62c", "etp62d"],
-                "8x50G[25G,10G]": ["etp62a", "etp62b", "etp62c", "etp62d", "etp62e", "etp62f", "etp62g", "etp62h"]
+                "4x100G[50G,25G,10G]": ["etp62a", "etp62b", "etp62c", "etp62d"]
             }
         },
         "Ethernet496": {
@@ -1304,8 +1242,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp63"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp63a", "etp63b"],
-                "4x100G[50G,25G,10G]": ["etp63a", "etp63b", "etp63c", "etp63d"],
-                "8x50G[25G,10G]": ["etp63a", "etp63b", "etp63c", "etp63d", "etp63e", "etp63f", "etp63g", "etp63h"]
+                "4x100G[50G,25G,10G]": ["etp63a", "etp63b", "etp63c", "etp63d"]
             }
         },
         "Ethernet504": {
@@ -1314,8 +1251,7 @@
             "breakout_modes": {
                 "1x400G[200G,100G,50G,40G,25G,10G]": ["etp64"],
                 "2x200G[100G,50G,40G,25G,10G]": ["etp64a", "etp64b"],
-                "4x100G[50G,25G,10G]": ["etp64a", "etp64b", "etp64c", "etp64d"],
-                "8x50G[25G,10G]": ["etp64a", "etp64b", "etp64c", "etp64d", "etp64e", "etp64f", "etp64g", "etp64h"]
+                "4x100G[50G,25G,10G]": ["etp64a", "etp64b", "etp64c", "etp64d"]
             }
         },
         "Ethernet512": {

From 6728c3e0c82947749f467c17a9baef9bd3069f1f Mon Sep 17 00:00:00 2001
From: Vivek <vkarri@nvidia.com>
Date: Sun, 30 Jun 2024 22:47:29 -0700
Subject: [PATCH 0787/1115] [Mellanox] Remove lm-sensors dependency from
 hw-management (#19300)

- Why I did it
Remove lm-sensors dependency on hw-mgmt. lm-sensors installs a oneshot lm-sensors.service which starts early in the boot and can sometime gets stuck in activating state blocking hostcfgd to progress further
---
 platform/mellanox/hw-management/Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/platform/mellanox/hw-management/Makefile b/platform/mellanox/hw-management/Makefile
index 3ada49920..a42bcdfea 100644
--- a/platform/mellanox/hw-management/Makefile
+++ b/platform/mellanox/hw-management/Makefile
@@ -9,7 +9,7 @@ $(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% :
 	git stash
 	git apply -3 ../*.patch || exit 1
 	chmod +x ./debian/rules
-	KVERSION=$(KVERSION) dpkg-buildpackage -us -uc -b -rfakeroot -j$(SONIC_CONFIG_MAKE_JOBS) --admindir $(SONIC_DPKG_ADMINDIR)
+	KVERSION=$(KVERSION) LM_DEPENDS=0 dpkg-buildpackage -us -uc -b -rfakeroot -j$(SONIC_CONFIG_MAKE_JOBS) --admindir $(SONIC_DPKG_ADMINDIR)
 	popd
 
 	mv $* $(DEST)/

From e488f10a78cafa280a516e8f3d6dd4cc56fe51bf Mon Sep 17 00:00:00 2001
From: Gagan Punathil Ellath <gpunathilell@nvidia.com>
Date: Mon, 1 Jul 2024 21:00:14 -0700
Subject: [PATCH 0788/1115] [Mellanox] Addition of minicom configuration file
 (#19234)

- Why I did it
For setting the rts and cts configuration for the minicom package to the switch image, The file is copied to minicom configuration location in the switch image
This is a machine generated file in minicom , so the configuration can be present in the switch image upon installation
---
 files/build_templates/sonic_debian_extension.j2 | 2 ++
 platform/mellanox/minirc.dfl                    | 2 ++
 2 files changed, 4 insertions(+)
 create mode 100644 platform/mellanox/minirc.dfl

diff --git a/files/build_templates/sonic_debian_extension.j2 b/files/build_templates/sonic_debian_extension.j2
index 52f12b4ef..766874571 100644
--- a/files/build_templates/sonic_debian_extension.j2
+++ b/files/build_templates/sonic_debian_extension.j2
@@ -1075,6 +1075,8 @@ sudo LANG=C chroot $FILESYSTEM_ROOT systemctl enable nv-syncd-shared
 
 # Install required packages specific for mellanox platform
 sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install minicom xmlstarlet
+sudo mkdir -p $FILESYSTEM_ROOT/etc/minicom/
+sudo cp platform/mellanox/minirc.dfl $FILESYSTEM_ROOT/etc/minicom/
 
 sudo LANG=C chroot $FILESYSTEM_ROOT systemctl disable rshim.service
 {% endif %}
diff --git a/platform/mellanox/minirc.dfl b/platform/mellanox/minirc.dfl
new file mode 100644
index 000000000..193cf47d9
--- /dev/null
+++ b/platform/mellanox/minirc.dfl
@@ -0,0 +1,2 @@
+# Machine-generated file - use "minicom -s" to change parameters.
+pu rtscts           No

From 011437310366db80a21cf484b1e5e9636bf519f4 Mon Sep 17 00:00:00 2001
From: Yakiv Huryk <62013282+Yakiv-Huryk@users.noreply.github.com>
Date: Tue, 2 Jul 2024 07:02:11 +0300
Subject: [PATCH 0789/1115] [nvidia-bluefield] update platform-api thermal
 logic (#19409)

- Why I did it
For setting the rts and cts configuration for the minicom package to the switch image, The file is copied to minicom configuration location in the switch image
This is a machine generated file in minicom , so the configuration can be present in the switch image upon installation
---
 .../sonic_platform/thermal_bf3.py             | 94 +++++++++++++++----
 .../platform-api/tests/test_thermal_bf3.py    | 44 ++++-----
 .../platform-api/tests/utils.py               | 12 +++
 3 files changed, 109 insertions(+), 41 deletions(-)

diff --git a/platform/nvidia-bluefield/platform-api/sonic_platform/thermal_bf3.py b/platform/nvidia-bluefield/platform-api/sonic_platform/thermal_bf3.py
index c769a5e37..c1e2ea5fd 100644
--- a/platform/nvidia-bluefield/platform-api/sonic_platform/thermal_bf3.py
+++ b/platform/nvidia-bluefield/platform-api/sonic_platform/thermal_bf3.py
@@ -18,7 +18,11 @@
 try:
     from sonic_platform_base.thermal_base import ThermalBase
     from sonic_py_common.logger import Logger
+    from .device_data import DeviceDataManager
+    from enum import Enum, auto
     import os
+    import json
+    import subprocess
 except ImportError as e:
     raise ImportError (str(e) + "- required module not found")
 
@@ -26,28 +30,75 @@
 logger = Logger()
 
 MLXBF_BASE_PATH = '/sys/kernel/debug/mlxbf-ptm/monitors/status'
+SSD_DEV='nvme0'
 
-SENSORS = [
-    {'name': 'CPU', 'mlxbf_sensor_name': 'core_temp', 'ht': 95, 'cht': 100},
-    {'name': 'DDR', 'mlxbf_sensor_name': 'ddr_temp', 'ht': 95, 'cht': 100},
-    {'name': 'SFP0', 'iface': 'Ethernet0', 'hwmon_path': None},
-    {'name': 'SFP1', 'iface': 'Ethernet4', 'hwmon_path': None},
+class ThermalType(Enum):
+    MLXBF = auto()
+    SFP = auto()
+    SSD = auto()
+
+MLXBF_SENSORS = [
+    {'name': 'CPU', 'thermal_type': ThermalType.MLXBF, 'mlxbf_sensor_name': 'core_temp', 'ht': 95, 'cht': 100},
+    {'name': 'DDR', 'thermal_type': ThermalType.MLXBF, 'mlxbf_sensor_name': 'ddr_temp', 'ht': 95, 'cht': 100},
 ]
 
-def set_hwmon_path(sensor):
-    base = f'/sys/class/net/{sensor["iface"]}/device/hwmon'
+def get_hwmon_path(iface):
+    base = f'/sys/class/net/{iface}/device/hwmon'
     dirs = os.listdir(base)
     if len(dirs) != 1 or not dirs[0].startswith('hwmon'):
-        logger.log_error(f'Failed to find hwmon path for {sensor["iface"]}')
+        logger.log_error(f'Failed to find hwmon path for {iface}')
         return
-    sensor['hwmon_path'] = f'{base}/{dirs[0]}'
+    return f'{base}/{dirs[0]}'
+
+def initialize_sfp_thermals():
+    sfps = []
+    sfp_count = DeviceDataManager().get_sfp_count()
+    for i in range(sfp_count):
+        iface = f'Ethernet{i * 4}'
+        sfp_thermal = Thermal(name=f'SFP{i}', thermal_type=ThermalType.SFP, hwmon_path=get_hwmon_path(iface))
+        sfps.append(sfp_thermal)
+    return sfps
+
+def read_smartctl(dev, all=False):
+    all_flag = 'u' if all else ''
+    cmd = f'smartctl -x /dev/{dev} --json=v{all_flag}'
+    try:
+        output = subprocess.check_output(cmd.split(' ')).decode().strip()
+        return json.loads(output)
+    except:
+        logger.log_error('Failed to read smartctl output')
+        return {}
+
+def read_ssd_temperatrue(dev):
+    try:
+        return int(read_smartctl(dev)['temperature']['current'])
+    except:
+        logger.log_error('Failed to read nvme0 temperature')
+        return 'N/A'
+
+def read_ssd_thresholds(dev):
+    higt_th = None
+    crit_th = None
+    def parse_value(v):
+        return int(v.split(':')[1].strip().split(' ')[0])
+
+    output = read_smartctl(dev, all=True)
+    for k,v in output.items():
+        if "smartctl" in k:
+            if not higt_th and "Warning  Comp. Temp. Threshold" in v:
+                higt_th = parse_value(v)
+            if not crit_th and "Critical Comp. Temp. Threshold" in v:
+                crit_th = parse_value(v)
+    return higt_th or 'N/A', crit_th or 'N/A'
+
+def initialize_ssd_thermals():
+    higt_th, crit_th = read_ssd_thresholds(SSD_DEV)
+    return [Thermal(name=f'NVME', thermal_type=ThermalType.SSD, dev=SSD_DEV, ht=higt_th, cht=crit_th)]
 
 def initialize_chassis_thermals():
-    thermal_list = []
-    for s in SENSORS:
-        if 'hwmon_path' in s:
-            set_hwmon_path(s)
-        thermal_list.append(Thermal(**s))
+    thermal_list = [Thermal(**x) for x in MLXBF_SENSORS]
+    thermal_list += initialize_sfp_thermals()
+    thermal_list += initialize_ssd_thermals()
     return thermal_list
 
 def read_fs(path, name):
@@ -72,10 +123,12 @@ def read_temp_hwmon(hwmon_path, sensor):
     return v / 1000
 
 class Thermal(ThermalBase):
-    def __init__(self, name, mlxbf_sensor_name=None, iface=None, hwmon_path=None, ht='N/A', cht='N/A'):
+    def __init__(self, name, thermal_type=None, mlxbf_sensor_name=None, dev=None, hwmon_path=None, ht='N/A', cht='N/A'):
         super(Thermal, self).__init__()
         self.name = name
+        self.thermal_type = thermal_type
         self.mlxbf_sensor_name = mlxbf_sensor_name
+        self.dev = dev
         self.hwmon_path = hwmon_path
         self.ht = ht
         self.cht = cht
@@ -97,10 +150,13 @@ def get_temperature(self):
             A float number of current temperature in Celsius up to nearest thousandth
             of one degree Celsius, e.g. 30.125
         """
-        if self.mlxbf_sensor_name:
-            return read_temp_mlxbf(self.mlxbf_sensor_name)
-        else:
-            return read_temp_hwmon(self.hwmon_path, 'temp1_input')
+        match self.thermal_type:
+            case ThermalType.MLXBF:
+                return read_temp_mlxbf(self.mlxbf_sensor_name)
+            case ThermalType.SFP:
+                return read_temp_hwmon(self.hwmon_path, 'temp1_input')
+            case ThermalType.SSD:
+                return read_ssd_temperatrue(self.dev)
 
     def get_high_threshold(self):
         """
diff --git a/platform/nvidia-bluefield/platform-api/tests/test_thermal_bf3.py b/platform/nvidia-bluefield/platform-api/tests/test_thermal_bf3.py
index 1ceac45d8..991f15edd 100644
--- a/platform/nvidia-bluefield/platform-api/tests/test_thermal_bf3.py
+++ b/platform/nvidia-bluefield/platform-api/tests/test_thermal_bf3.py
@@ -17,6 +17,7 @@
 
 import os
 import sys
+import json
 
 from unittest.mock import patch
 from unittest.mock import mock_open
@@ -27,7 +28,7 @@
 sys.path.insert(0, modules_path)
 
 from sonic_platform.chassis import Chassis
-from .utils import platform_sample_bf3
+from .utils import platform_sample_bf3, smartctl_output
 
 
 @patch('sonic_py_common.device_info.get_platform', MagicMock(return_value=""))
@@ -38,54 +39,53 @@
 class TestThermal:
 
     def test_chassis_thermal(self, *args):
-        from sonic_platform.thermal_bf3 import SENSORS
         chassis = Chassis()
         thermal_list = chassis.get_all_thermals()
         assert thermal_list
 
-        for s in SENSORS:
-            assert 'name' in s
-            assert 'mlxbf_sensor_name' in s or 'hwmon_path' in s
-
-        sensor_names = list(map(lambda x: x.get('name'), SENSORS))
-        thermal_names = list(map(lambda x: x.get_name(), thermal_list))
-        for sn in sensor_names:
-            assert sn in thermal_names
-
 
     def test_hwmon_read(self, *args):
         from sonic_platform import thermal_bf3 as thermal
-        from sonic_platform.thermal_bf3 import Thermal
+        from sonic_platform.thermal_bf3 import Thermal, ThermalType
 
         thermal.read_fs = MagicMock(return_value=83123)
-        sensor = {'name': 'test', 'hwmon_path': '/tmp/', 'ht': 95, 'cht': 100}
-        t = Thermal(**sensor)
+        t = Thermal(name='test', thermal_type=ThermalType.SFP, hwmon_path='/tmp/', ht=95, cht=100)
         assert t.get_temperature() == 83.123
         assert t.get_high_critical_threshold() == 83.123
 
 
+    def test_ssd(self, *args):
+        from sonic_platform import thermal_bf3 as thermal
+        from sonic_platform.thermal_bf3 import initialize_ssd_thermals
+        thermal.read_smartctl = MagicMock(return_value=json.loads(smartctl_output))
+        t = initialize_ssd_thermals()
+        assert len(t) == 1
+        assert t[0].get_temperature() == 42
+        assert t[0].get_high_threshold() == 90
+        assert t[0].get_high_critical_threshold() == 100
+
+
     def test_thermal_get(self, *args):
         from sonic_platform import thermal_bf3 as thermal
-        from sonic_platform.thermal_bf3 import Thermal
+        from sonic_platform.thermal_bf3 import Thermal, ThermalType
 
         temp_test_mocked_vals = [123, 10.5, -1, None]
 
         for tv in temp_test_mocked_vals:
             thermal.read_temp_mlxbf = MagicMock(return_value=tv)
-            sensor = {'name': 'test', 'mlxbf_sensor_name': 'test', 'ht': 95, 'cht': 100}
-            t = Thermal(**sensor)
+            t = Thermal(name='test', thermal_type=ThermalType.MLXBF, mlxbf_sensor_name='test', ht=95, cht=100)
             assert t.get_temperature() == tv
-            assert t.get_high_threshold() == sensor['ht']
-            assert t.get_high_critical_threshold() == sensor['cht']
+            assert t.get_high_threshold() == 95
+
+            assert t.get_high_critical_threshold() == 100
             assert t.get_low_threshold() == 'N/A'
             assert t.get_low_critical_threshold() == 'N/A'
 
         for tv in temp_test_mocked_vals:
             thermal.read_temp_hwmon = MagicMock(return_value=tv)
-            sensor = {'name': 'test', 'hwmon_path': '/tmp/', 'ht': 95, 'cht': 100}
-            t = Thermal(**sensor)
+            t = Thermal(name='test', thermal_type=ThermalType.SFP, hwmon_path='/tmp/', ht=95)
             assert t.get_temperature() == tv
-            assert t.get_high_threshold() == sensor['ht']
+            assert t.get_high_threshold() == 95
             assert t.get_high_critical_threshold() == tv
             assert t.get_low_threshold() == 'N/A'
             assert t.get_low_critical_threshold() == 'N/A'
diff --git a/platform/nvidia-bluefield/platform-api/tests/utils.py b/platform/nvidia-bluefield/platform-api/tests/utils.py
index 8c9878e0c..e40bbe8e2 100644
--- a/platform/nvidia-bluefield/platform-api/tests/utils.py
+++ b/platform/nvidia-bluefield/platform-api/tests/utils.py
@@ -92,6 +92,18 @@
 }
 """
 
+smartctl_output = """
+{
+    "smartctl_0004_u": "=== START OF INFORMATION SECTION ===",
+    "smartctl_0023_u": "Maximum Data Transfer Size:         512 Pages",
+    "smartctl_0024_u": "Warning  Comp. Temp. Threshold:     90 Celsius",
+    "smartctl_0025_u": "Critical Comp. Temp. Threshold:     100 Celsius",
+    "temperature": {
+        "current": 42
+    }
+}
+"""
+
 # Utilities for throttling tests
 class LogRecorderMock(object):
     def __init__(self):

From dda96cf14784aa02a672bd758add27491e00ca0f Mon Sep 17 00:00:00 2001
From: abdosi <58047199+abdosi@users.noreply.github.com>
Date: Tue, 2 Jul 2024 12:22:40 -0700
Subject: [PATCH 0790/1115] [minigraph] populate bgp_asn in DEVICE_METADATA
 only if it is valid. (#19413)

What I did:-
Populate bgp_asn in DEVICE_METADATA only if is present/valid.

Why I did:
Without this it causes Yang Validation failure for Systems that are Pure
L2/Chassis Supervisor (no BGP) as Yang expects bgp_asn as valid
as_number

---------

Signed-off-by: Abhishek Dosi <abdosi@microsoft.com>
---
 src/sonic-config-engine/minigraph.py                 | 4 +++-
 src/sonic-config-engine/tests/sample-voq-graph.xml   | 9 +--------
 src/sonic-config-engine/tests/test_chassis_cfggen.py | 5 -----
 3 files changed, 4 insertions(+), 14 deletions(-)

diff --git a/src/sonic-config-engine/minigraph.py b/src/sonic-config-engine/minigraph.py
index 0d5d4424c..b6375b80d 100644
--- a/src/sonic-config-engine/minigraph.py
+++ b/src/sonic-config-engine/minigraph.py
@@ -2120,7 +2120,6 @@ def parse_xml(filename, platform=None, port_config_file=None, asic_name=None, hw
         
     results = {}
     results['DEVICE_METADATA'] = {'localhost': {
-        'bgp_asn': bgp_asn,
         'region': region,
         'cloudtype': cloudtype,
         'docker_routing_config_mode': docker_routing_config_mode,
@@ -2132,6 +2131,9 @@ def parse_xml(filename, platform=None, port_config_file=None, asic_name=None, hw
         }
     }
 
+    if bgp_asn:
+        results['DEVICE_METADATA']['localhost']['bgp_asn'] = bgp_asn
+
     if chassis_hostname:
         results['DEVICE_METADATA']['localhost']['chassis_hostname'] = chassis_hostname
         
diff --git a/src/sonic-config-engine/tests/sample-voq-graph.xml b/src/sonic-config-engine/tests/sample-voq-graph.xml
index b6e8ff152..ab9a1b8b8 100644
--- a/src/sonic-config-engine/tests/sample-voq-graph.xml
+++ b/src/sonic-config-engine/tests/sample-voq-graph.xml
@@ -1,14 +1,7 @@
 <DeviceMiniGraph xmlns="Microsoft.Search.Autopilot.Evolution" xmlns:i="http://www.w3.org/2001/XMLSchema-instance">
   <CpgDec>
     <PeeringSessions/>
-    <Routers xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution">
-      <a:BGPRouterDeclaration>
-        <a:ASN>65100</a:ASN>
-          <a:Hostname>linecard-1</a:Hostname>
-          <a:Peers/>
-        <a:RouteMaps/>
-      </a:BGPRouterDeclaration>
-    </Routers>
+    <Routers xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
   </CpgDec>
   <DpgDec>
     <DeviceDataPlaneInfo>
diff --git a/src/sonic-config-engine/tests/test_chassis_cfggen.py b/src/sonic-config-engine/tests/test_chassis_cfggen.py
index c309e7f2d..a2be6ed6b 100644
--- a/src/sonic-config-engine/tests/test_chassis_cfggen.py
+++ b/src/sonic-config-engine/tests/test_chassis_cfggen.py
@@ -433,7 +433,6 @@ def test_device_metadata(self):
         output = json.loads(self.run_script(argument))
         print(output['localhost'])
         self.assertDictEqual(output['localhost'], {
-            'bgp_asn': None,
             'region': 'test',
             'cloudtype': 'Public',
             'docker_routing_config_mode': 'separated',
@@ -910,7 +909,6 @@ def test_device_metadata(self):
         print(output['localhost'])
         self.assertDictEqual(output['localhost'], 
             {
-                "bgp_asn": None,
                 "region": "test",
                 "cloudtype": "Public",
                 "docker_routing_config_mode": "separated",
@@ -938,7 +936,6 @@ def test_device_metadata_for_namespace(self):
         print(output['localhost'])
         self.assertDictEqual(output['localhost'], 
             {
-                "bgp_asn": None,
                 "region": "test",
                 "cloudtype": None,
                 "docker_routing_config_mode": "separated",
@@ -1046,7 +1043,6 @@ def test_device_metadata(self):
         print(output['localhost'])
         self.assertDictEqual(output['localhost'], 
             {
-                "bgp_asn": None,
                 "region": "test",
                 "cloudtype": "Public",
                 "docker_routing_config_mode": "separated",
@@ -1074,7 +1070,6 @@ def test_device_metadata_for_namespace(self):
         print(output['localhost'])
         self.assertDictEqual(output['localhost'], 
             {
-                "bgp_asn": None,
                 "region": "test",
                 "cloudtype": None,
                 "docker_routing_config_mode": "separated",

From 0bcf2deb5ea7e9363eba25b4814aff1cdd163904 Mon Sep 17 00:00:00 2001
From: zitingguo-ms <zitingguo@microsoft.com>
Date: Wed, 3 Jul 2024 22:32:59 +0800
Subject: [PATCH 0791/1115] Upgrade xgs SAI version to 10.1.21.0 (#19334)

Why I did it
Upgrade the xgs SAI version to 10.1.21.0 to include the following changes:

10.1.8.0: Support _brcm_sai_port_unlos_set when external port_phy_addr is 0xff
10.1.9.0: [CS00012330893]With PFC test, egress drop observed for lossless queues
10.1.11.0: Include the bcmsim in the odp package
10.1.13.0: handle bind of egress and ingress groups to same lag
10.1.14.0: Backport SDK-381920 to rel_ocp_sai_10_1 High CPU due to SDK calling soc_dnxc_port_resource_get
10.1.16.0: [CSP CS00012336644] callback called twice with same event type
10.1.17.0: [CSP 00012320736][SAI_BRANCH rel_ocp_sai_10_1]Back port MMU related Fixes to 10.1 specific to LTSW/TH4 devices-HSDK
10.1.18.0: [CSP CS00012351984] Backport SONIC-81526 to 10.1 Fixes for rate class bound setting and UCQ stats
10.1.19.0: Reset EGR_L3_NEXT_HOP_2 for TH3
10.1.20.0: Sonic crash due to unsupported return from SAI_SWITCH_ATTR_ECMP_DEFAULT_HASH_OFFSET
Work item tracking
Microsoft ADO (number only): 28356083
How I did it
Upgrade the SAI version in the sai.mk file.

How to verify it
Run the SONiC basic test:
https://elastictest.org/scheduler/testplan/66742d7ef6db3102cef61056
---
 platform/broadcom/sai.mk | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/platform/broadcom/sai.mk b/platform/broadcom/sai.mk
index a6a9f6f98..ddf43a6e7 100644
--- a/platform/broadcom/sai.mk
+++ b/platform/broadcom/sai.mk
@@ -1,4 +1,4 @@
-LIBSAIBCM_XGS_VERSION = 10.1.7.0
+LIBSAIBCM_XGS_VERSION = 10.1.21.0
 LIBSAIBCM_DNX_VERSION = 10.1.25.0
 LIBSAIBCM_XGS_BRANCH_NAME = SAI_10.1.0_GA
 LIBSAIBCM_DNX_BRANCH_NAME = SAI_10.1.0_GA

From aac617a690c13c24f10c4705f5b7955e80b7237c Mon Sep 17 00:00:00 2001
From: DavidZagury <32644413+DavidZagury@users.noreply.github.com>
Date: Wed, 3 Jul 2024 17:59:09 +0300
Subject: [PATCH 0792/1115] [Mellanox] Use efibootmgr for supported device on
 fwutil (#19407)

- Why I did it
Add the force flag to the reboot, which is needed now that we no longer use power cycle due to # 18325

- How I did it
Update the onie fw update script to use efibootmgr for the supported devices, and on the reboot command, call the reboot script with the f flag.

- How to verify it
Run ONIE upgrade using fwutil
---
 platform/mellanox/mlnx-onie-fw-update.sh | 17 +++++++++++++----
 1 file changed, 13 insertions(+), 4 deletions(-)

diff --git a/platform/mellanox/mlnx-onie-fw-update.sh b/platform/mellanox/mlnx-onie-fw-update.sh
index 35fdb55df..56b251a96 100755
--- a/platform/mellanox/mlnx-onie-fw-update.sh
+++ b/platform/mellanox/mlnx-onie-fw-update.sh
@@ -68,8 +68,12 @@ enable_onie_fw_update_mode() {
     fi
 
     register_terminate_handler
-
-    grub-editenv ${os_boot}/grub/grubenv set onie_entry="ONIE" || return $?
+    if [ -d /sys/firmware/efi/efivars ]; then
+        onie_boot_num=$(efibootmgr | grep "ONIE:" | awk '{ print $1 }' | cut -b 5-8 )
+        efibootmgr -n $onie_boot_num
+    else
+        grub-editenv ${os_boot}/grub/grubenv set onie_entry="ONIE" || return $?
+    fi
     grub-editenv ${onie_mount}/grub/grubenv set onie_mode="update" || return $?
 
     return 0
@@ -80,7 +84,12 @@ disable_onie_fw_update_mode() {
         return 1
     fi
 
-    grub-editenv ${os_boot}/grub/grubenv unset onie_entry || return $?
+    if [ -d /sys/firmware/efi/efivars ]; then
+        sonic_boot_num=$(efibootmgr | grep "SONiC-OS" | awk '{ print $1 }' | cut -b 5-8 )
+        efibootmgr -n $sonic_boot_num
+    else
+        grub-editenv ${os_boot}/grub/grubenv unset onie_entry || return $?
+    fi
     grub-editenv ${onie_mount}/grub/grubenv set onie_mode="install" || return $?
 
     return 0
@@ -106,7 +115,7 @@ system_reboot() {
     sleep 5s
 
     # Use SONiC reboot scenario
-    /usr/local/bin/reboot
+    /usr/local/bin/reboot -f
     exit $?
 }
 

From 6a6ae553b529242a42c80c7cc0330ae7b295f104 Mon Sep 17 00:00:00 2001
From: wumiao_nokia <wu.miao@nokia.com>
Date: Wed, 3 Jul 2024 12:39:41 -0400
Subject: [PATCH 0793/1115] Update Nokia platform submodule to the latest
 (#19390)

Why I did it
Update sonic-platform submodule for Nokia-7250IXRE Platform.

How I did it
Update submodule sonic-platform for Nokia-7250IXRE platform. This contains fix for changing log level so mgmt test cases will not fail because of error log.
---
 platform/broadcom/sonic-platform-modules-nokia | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/platform/broadcom/sonic-platform-modules-nokia b/platform/broadcom/sonic-platform-modules-nokia
index 87915b727..a04cc6b22 160000
--- a/platform/broadcom/sonic-platform-modules-nokia
+++ b/platform/broadcom/sonic-platform-modules-nokia
@@ -1 +1 @@
-Subproject commit 87915b72714d4f76f3ff1359fea730385235954b
+Subproject commit a04cc6b2291ad23ae26ad45dfcaed2715dde05b3

From 4a3deddc65e8aa8d19e15cdde40828b4e4c5e68c Mon Sep 17 00:00:00 2001
From: Zain Budhwani <99770260+zbud-msft@users.noreply.github.com>
Date: Wed, 3 Jul 2024 10:20:44 -0700
Subject: [PATCH 0794/1115] Expand pattern for dhcp relay discarding interface
 (#19430)

Why I did it
Currently yang pattern is restricting interfaces to those that start with Ethernet however interfaces that discard can start with "eth", "Vlan", "PortChannel", and others as well.

How I did it
Update YANG file and UT

How to verify it
sonic-mgmt test and UT
---
 .../yang_model_tests/tests_config/sonic-events-dhcp-relay.json  | 2 +-
 src/sonic-yang-models/yang-models/sonic-events-dhcp-relay.yang  | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/sonic-events-dhcp-relay.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/sonic-events-dhcp-relay.json
index 9d68a99c5..6dcd71d79 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/sonic-events-dhcp-relay.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/sonic-events-dhcp-relay.json
@@ -2,7 +2,7 @@
     "SONIC_EVENTS_DHCP_RELAY_DHCP_RELAY_DISCARD_INCORRECT_IFNAME": {
         "sonic-events-dhcp-relay:sonic-events-dhcp-relay": {
             "sonic-events-dhcp-relay:dhcp-relay-discard": {
-                "ifname": "Eth",
+                "ifname": "@@@!!!",
                 "timestamp": "1985-04-12T23:20:50.52Z"
             }
         }
diff --git a/src/sonic-yang-models/yang-models/sonic-events-dhcp-relay.yang b/src/sonic-yang-models/yang-models/sonic-events-dhcp-relay.yang
index 4b83c14b4..e38b70e82 100644
--- a/src/sonic-yang-models/yang-models/sonic-events-dhcp-relay.yang
+++ b/src/sonic-yang-models/yang-models/sonic-events-dhcp-relay.yang
@@ -41,7 +41,7 @@ module sonic-events-dhcp-relay {
 
             leaf ifname {
                 type string {
-                    pattern 'Ethernet[0-9]{1,3}';
+                    pattern '[a-zA-Z0-9]+';
                 }
                 description "Name of the i/f discarding";
             }

From ec0d1b08a89269f8412f3b86b91b3b091e60471d Mon Sep 17 00:00:00 2001
From: Zain Budhwani <99770260+zbud-msft@users.noreply.github.com>
Date: Wed, 3 Jul 2024 10:22:05 -0700
Subject: [PATCH 0795/1115] Modify regex for watchdog-timeout (#19383)

How I did it
Modify regex for rsyslog_plugin to detect watchdog-timeout

How to verify it
Manual test/Pipeline test once sonic-mgmt test case is merged
---
 files/build_templates/systemd_regex.json | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/files/build_templates/systemd_regex.json b/files/build_templates/systemd_regex.json
index 0ffa99156..ccb063da6 100644
--- a/files/build_templates/systemd_regex.json
+++ b/files/build_templates/systemd_regex.json
@@ -6,7 +6,7 @@
     },
     {
         "tag": "watchdog-timeout",
-        "regex": "(?:watchdog|Watchdog) timeout .limit.([0-9])min.",
+        "regex": ".*(?:watchdog|Watchdog) timeout .limit.([0-9])min.",
         "params": [ "limit" ]
     }
 ]

From 6e991a5ecd063916717fae3277a5a94e74673022 Mon Sep 17 00:00:00 2001
From: Liu Shilong <shilongliu@microsoft.com>
Date: Thu, 4 Jul 2024 04:26:57 +0800
Subject: [PATCH 0796/1115] fix (#19445)

Why I did it
DEFAULT_CONTAINER_REGISTRY didn't work as expected in some scenario.

How I did it
When check for docker arch, use DEFAULT_CONTAINER_REGISTRY if it is not null.
---
 Makefile.work | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/Makefile.work b/Makefile.work
index c81fe2483..22dbac2ce 100644
--- a/Makefile.work
+++ b/Makefile.work
@@ -68,7 +68,11 @@ SHELL = /bin/bash
 USER := $(shell id -un)
 PWD := $(shell pwd)
 USER_LC := $(shell echo $(USER) | tr A-Z a-z)
+ifneq ($(DEFAULT_CONTAINER_REGISTRY),)
+DOCKER_MACHINE := $(shell docker run --rm $(DEFAULT_CONTAINER_REGISTRY)/debian:buster uname -m)
+else
 DOCKER_MACHINE := $(shell docker run --rm debian:buster uname -m)
+endif
 HOST_DOCKERD_GID := $(shell getent group docker | cut -d : -f3)
 
 comma := ,

From 11730d52bb17c42bc2760a9174aa2c176211429f Mon Sep 17 00:00:00 2001
From: anamehra <54692434+anamehra@users.noreply.github.com>
Date: Thu, 4 Jul 2024 13:18:17 -0700
Subject: [PATCH 0797/1115] Update cisco-8000.ini to 202405.0.2 release
 (#19443)

Signed-off-by: anamehra anamehra@cisco.com

Cisco platform 202405.0.2 release
---
 platform/checkout/cisco-8000.ini | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/platform/checkout/cisco-8000.ini b/platform/checkout/cisco-8000.ini
index fdfc8c4e5..c1930b7c3 100644
--- a/platform/checkout/cisco-8000.ini
+++ b/platform/checkout/cisco-8000.ini
@@ -1,3 +1,3 @@
 [module]
 repo=git@github.com:Cisco-8000-sonic/platform-cisco-8000.git
-ref=202405.0.1
+ref=202405.0.2

From dacab25ec839f2e7a65ac21845612a850d94a006 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sat, 6 Jul 2024 19:00:59 +0800
Subject: [PATCH 0798/1115] [submodule] Update submodule sonic-platform-daemons
 to the latest HEAD automatically (#19498)

#### Why I did it
src/sonic-platform-daemons
```
* 74881e1 - (HEAD -> master, origin/master, origin/HEAD) [xcvrd] Modify to support regular expression when parsing the key in media_settings.json (#471) (10 hours ago) [DennisChiuEC]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-platform-daemons | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-platform-daemons b/src/sonic-platform-daemons
index b145f32c1..74881e1b3 160000
--- a/src/sonic-platform-daemons
+++ b/src/sonic-platform-daemons
@@ -1 +1 @@
-Subproject commit b145f32c10de705bdd1c46a5d2857703e173b895
+Subproject commit 74881e1b31371bbd9c0966c48402a3058181bc4b

From e1a52a3bcde1291c3ed0c7bad82605fc5e79e9b4 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sat, 6 Jul 2024 19:01:15 +0800
Subject: [PATCH 0799/1115] [submodule] Update submodule sonic-swss to the
 latest HEAD automatically (#19461)

#### Why I did it
src/sonic-swss
```
* 43ac585c - (HEAD -> master, origin/master, origin/HEAD) Revamp module build script to make it work for 5.15 on Ubuntu 20.04 (#3212) (3 days ago) [Saikrishna Arcot]
* c9c78dc4 - Fix in switchorch: unsupported attribute causes skipping of processing the rest of configurations (#3209) (3 days ago) [Amir]
* 0158d27d - [Chassis][voq] do not synchronize the system interface state if there is no rif assciated with the port (#3207) (3 days ago) [Arvindsrinivasan Lakshmi Narasimhan]
* fdd5bdc9 - [vxlanmgr]: Add disabling of fdb learning for linux vxlan interfaces (#3205) (3 days ago) [yfedoriachenko]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-swss | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-swss b/src/sonic-swss
index b02181ae5..43ac585cf 160000
--- a/src/sonic-swss
+++ b/src/sonic-swss
@@ -1 +1 @@
-Subproject commit b02181ae529f2bc493926b8151f971632fe413fa
+Subproject commit 43ac585cf0634d1bc27d28637c6db7069460ee25

From 427b9cd6c09eb2041bb411b0698f5213e06c666b Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sat, 6 Jul 2024 19:01:20 +0800
Subject: [PATCH 0800/1115] [submodule] Update submodule sonic-gnmi to the
 latest HEAD automatically (#19460)

#### Why I did it
src/sonic-gnmi
```
* 7801415 - (HEAD -> master, origin/master, origin/HEAD) Use server GracefulStop instead of force stop (#219) (3 days ago) [Zain Budhwani]
* 7631184 - make save on set only when err is nil (#242) (3 days ago) [Ryan Lucus]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-gnmi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-gnmi b/src/sonic-gnmi
index a6107849a..78014155a 160000
--- a/src/sonic-gnmi
+++ b/src/sonic-gnmi
@@ -1 +1 @@
-Subproject commit a6107849a5d02d0477a5c071892f1a6af26ee8fc
+Subproject commit 78014155a59ebdaa61ccec5f036835089f289238

From b1519232ac8959600d5d88f6178e1148ea3226ba Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sat, 6 Jul 2024 19:01:29 +0800
Subject: [PATCH 0801/1115] [submodule] Update submodule sonic-utilities to the
 latest HEAD automatically (#19419)

#### Why I did it
src/sonic-utilities
```
* fb2e5cda - (HEAD -> master, origin/master, origin/HEAD) Remove secret from golden_config_db.json and old_config files (#3390) (2 days ago) [Hua Liu]
* 414cf3bb - [DPB]Fix return code in case of failure (#3389) (4 days ago) [Sudharsan Dhamal Gopalarathnam]
* 06965df2 - Remove suppress-fib-pending CLI and make route_check.py check suppress-fib in BGP configuration (#3331) (5 days ago) [Stepan Blyshchak]
* 3a8f0be0 - [Mellanox] Add support for ACS-4280 (#3368) (8 days ago) [Vivek]
* 667a1509 - [pbh]: Fix show PBH counters when cache is partial (#3356) (8 days ago) [Nazarii Hnydyn]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-utilities | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-utilities b/src/sonic-utilities
index 0e6a55ef5..fb2e5cda9 160000
--- a/src/sonic-utilities
+++ b/src/sonic-utilities
@@ -1 +1 @@
-Subproject commit 0e6a55ef5eac306ef61d6f0241625a6baee42ab8
+Subproject commit fb2e5cda90ced88249e06b18d8c5717a89ff62b9

From b1cb4e70170bff8cd593e360f9abebe8cd0bfcc4 Mon Sep 17 00:00:00 2001
From: Junchao-Mellanox <57339448+Junchao-Mellanox@users.noreply.github.com>
Date: Mon, 8 Jul 2024 18:35:44 +0800
Subject: [PATCH 0802/1115] [Mellanox] implement state machine for always
 firmware control ports (#19473)

- Why I did it
When module host management is enabled, all modules are managed by the same state machine which initializes all modules/ports. However, on 5600 and 5400, there is a type of port which we called "service port". Those ports are always under firmware control. In that case, those ports should be managed by a different state machine. This PR is to implement the state machine for always firmware control ports.

- How I did it
Implement a state machine for always firmware control ports.

- How to verify it
Manual test
unit test
---
 .../sonic_platform/device_data.py             | 19 +++++++
 .../mlnx-platform-api/sonic_platform/sfp.py   | 53 +++++++++++++++----
 .../mlnx-platform-api/tests/test_sfp_sm.py    | 13 +++++
 3 files changed, 74 insertions(+), 11 deletions(-)

diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/device_data.py b/platform/mellanox/mlnx-platform-api/sonic_platform/device_data.py
index 35c40476b..1f2b3164a 100644
--- a/platform/mellanox/mlnx-platform-api/sonic_platform/device_data.py
+++ b/platform/mellanox/mlnx-platform-api/sonic_platform/device_data.py
@@ -126,6 +126,9 @@
                 "comex_amb": False,
                 "pch_temp": True
             }
+        },
+        'sfp': {
+            'fw_control_ports': [64, 65]  # 0 based sfp index list
         }
     },
     'x86_64-nvidia_sn5600-r0': {
@@ -134,6 +137,9 @@
                 "comex_amb": False,
                 "pch_temp": True
             }
+        },
+        'sfp': {
+            'fw_control_ports': [64]  # 0 based sfp index list
         }
     },
     'x86_64-nvidia_sn4280_simx-r0': {
@@ -307,3 +313,16 @@ def get_watchdog_max_period(cls):
             return DEFAULT_WD_PERIOD
 
         return watchdog_data.get('max_period', None)
+    
+    @classmethod
+    @utils.read_only_cache()
+    def get_always_fw_control_ports(cls):
+        platform_data = DEVICE_DATA.get(cls.get_platform_name())
+        if not platform_data:
+            return None
+        
+        sfp_data = platform_data.get('sfp')
+        if not sfp_data:
+            return None
+        
+        return sfp_data.get('fw_control_ports')
diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py b/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py
index a457b7458..8ced4a08d 100644
--- a/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py
+++ b/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py
@@ -253,6 +253,14 @@
 ACTION_ON_FW_CONTROL = 'On Firmware Control'
 ACTION_ON_POWER_LIMIT_ERROR = 'On Power Limit Error'
 ACTION_ON_CANCEL_WAIT = 'On Cancel Wait'
+
+# States/actions for always firmware control ports
+STATE_FCP_DOWN = 'Down(Firmware Control)'
+STATE_FCP_INIT = 'Initializing(Firmware Control)'
+STATE_FCP_NOT_PRESENT = 'Not Present(Firmware Control)'
+STATE_FCP_PRESENT = 'Present(Firmware Control)'
+
+ACTION_FCP_ON_START = 'On Start(Firmware Control)'
 # Module host management definitions end
 
 # SFP EEPROM limited bytes
@@ -463,7 +471,11 @@ def __init__(self, sfp_index, sfp_type=None, slot_id=0, linecard_port_count=0, l
         self.slot_id = slot_id
         self._sfp_type_str = None
         # SFP state, only applicable for module host management
-        self.state = STATE_DOWN
+        fw_control_ports = DeviceDataManager.get_always_fw_control_ports()
+        if not fw_control_ports or self.sdk_index not in fw_control_ports:
+            self.state = STATE_DOWN
+        else:
+            self.state = STATE_FCP_DOWN
 
     def __str__(self):
         return f'SFP {self.sdk_index}'
@@ -1430,7 +1442,7 @@ def get_state_machine(cls):
             sm.add_state(STATE_POWER_LIMIT_ERROR).set_entry_action(ACTION_ON_POWER_LIMIT_ERROR) \
               .add_transition(EVENT_POWER_GOOD, STATE_POWERED_ON) \
               .add_transition(EVENT_NOT_PRESENT, STATE_NOT_PRESENT)
-              
+                          
             cls.action_table = {}
             cls.action_table[ACTION_ON_START] = cls.action_on_start
             cls.action_table[ACTION_ON_RESET] = cls.action_on_reset
@@ -1440,6 +1452,16 @@ def get_state_machine(cls):
             cls.action_table[ACTION_ON_CANCEL_WAIT] = cls.action_on_cancel_wait
             cls.action_table[ACTION_ON_POWER_LIMIT_ERROR] = cls.action_on_power_limit_error
             
+            # For always firewire control ports
+            sm.add_state(STATE_FCP_DOWN).add_transition(EVENT_START, STATE_FCP_INIT)
+            sm.add_state(STATE_FCP_INIT).set_entry_action(ACTION_FCP_ON_START) \
+              .add_transition(EVENT_NOT_PRESENT, STATE_FCP_NOT_PRESENT) \
+              .add_transition(EVENT_PRESENT, STATE_FCP_PRESENT)
+            sm.add_state(STATE_FCP_NOT_PRESENT).add_transition(EVENT_PRESENT, STATE_FCP_PRESENT)
+            sm.add_state(STATE_FCP_PRESENT).add_transition(EVENT_NOT_PRESENT, STATE_FCP_NOT_PRESENT)
+            
+            cls.action_table[ACTION_FCP_ON_START] = cls.action_fcp_on_start
+            
             cls.sm = sm
             
         return cls.sm
@@ -1468,6 +1490,14 @@ def action_on_start(cls, sfp):
                 sfp.on_event(EVENT_RESET)
             else:
                 sfp.on_event(EVENT_POWER_ON)
+
+    @classmethod
+    def action_fcp_on_start(cls, sfp):
+        present = utils.read_int_from_file(f'/sys/module/sx_core/asic0/module{sfp.sdk_index}/present')
+        if present:
+            sfp.on_event(EVENT_PRESENT)
+        else:
+            sfp.on_event(EVENT_NOT_PRESENT)
             
     @classmethod
     def action_on_reset(cls, sfp):
@@ -1564,10 +1594,12 @@ def in_stable_state(self):
         Returns:
             bool: True if the module is in a stable state
         """
-        return self.state in (STATE_NOT_PRESENT, STATE_SW_CONTROL, STATE_FW_CONTROL, STATE_POWER_BAD, STATE_POWER_LIMIT_ERROR)
+        return self.state in (STATE_NOT_PRESENT, STATE_SW_CONTROL, STATE_FW_CONTROL, 
+                              STATE_POWER_BAD, STATE_POWER_LIMIT_ERROR, STATE_FCP_NOT_PRESENT,
+                              STATE_FCP_PRESENT)
         
     def get_fds_for_poling(self):            
-        if self.state == STATE_FW_CONTROL:
+        if self.state == STATE_FW_CONTROL or self.state == STATE_FCP_NOT_PRESENT or self.state == STATE_FCP_PRESENT:
             return {
                 'present': self.get_fd('present')
             } 
@@ -1583,11 +1615,9 @@ def fill_change_event(self, port_dict):
         Args:
             port_dict (dict): {<sfp_index>:<sfp_state>}
         """
-        if self.state == STATE_NOT_PRESENT:
+        if self.state == STATE_NOT_PRESENT or self.state == STATE_FCP_NOT_PRESENT:
             port_dict[self.sdk_index + 1] = SFP_STATUS_REMOVED
-        elif self.state == STATE_SW_CONTROL:
-            port_dict[self.sdk_index + 1] = SFP_STATUS_INSERTED
-        elif self.state == STATE_FW_CONTROL:
+        elif self.state == STATE_SW_CONTROL or self.state == STATE_FW_CONTROL or self.state == STATE_FCP_PRESENT:
             port_dict[self.sdk_index + 1] = SFP_STATUS_INSERTED
         elif self.state == STATE_POWER_BAD or self.state == STATE_POWER_LIMIT_ERROR:
             sfp_state = SFP.SFP_ERROR_BIT_POWER_BUDGET_EXCEEDED | SFP.SFP_STATUS_BIT_INSERTED
@@ -1606,7 +1636,7 @@ def refresh_poll_obj(self, poll_obj, all_registered_fds):
         # find fds registered by this SFP
         current_registered_fds = {item[2]: (fileno, item[1]) for fileno, item in all_registered_fds.items() if item[0] == self.sdk_index}
         logger.log_debug(f'SFP {self.sdk_index} registered fds are: {current_registered_fds}')
-        if self.state == STATE_FW_CONTROL:
+        if self.state == STATE_FW_CONTROL or self.state == STATE_FCP_NOT_PRESENT or self.state == STATE_FCP_PRESENT:
             target_poll_types = ['present']
         else:
             target_poll_types = ['hw_present', 'power_good']
@@ -1642,9 +1672,10 @@ def is_dummy_event(self, fd_type, fd_value):
         """
         if fd_type == 'hw_present' or fd_type == 'present':
             if fd_value == int(SFP_STATUS_INSERTED):
-                return self.state in (STATE_SW_CONTROL, STATE_FW_CONTROL, STATE_POWER_BAD, STATE_POWER_LIMIT_ERROR)
+                return self.state in (STATE_SW_CONTROL, STATE_FW_CONTROL, STATE_POWER_BAD,
+                                      STATE_POWER_LIMIT_ERROR, STATE_FCP_PRESENT)
             elif fd_value == int(SFP_STATUS_REMOVED):
-                return self.state == STATE_NOT_PRESENT
+                return self.state in (STATE_NOT_PRESENT, STATE_FCP_NOT_PRESENT)
         elif fd_type == 'power_good':
             if fd_value == 1:
                 return self.state in (STATE_SW_CONTROL, STATE_NOT_PRESENT, STATE_RESETTING)
diff --git a/platform/mellanox/mlnx-platform-api/tests/test_sfp_sm.py b/platform/mellanox/mlnx-platform-api/tests/test_sfp_sm.py
index 9f2154173..a1e4a0280 100644
--- a/platform/mellanox/mlnx-platform-api/tests/test_sfp_sm.py
+++ b/platform/mellanox/mlnx-platform-api/tests/test_sfp_sm.py
@@ -168,3 +168,16 @@ def test_sw_control(self):
         s.disable_tx_for_sff_optics = mock.MagicMock()
         s.on_event(sfp.EVENT_START)
         assert s.get_state() == sfp.STATE_SW_CONTROL
+        
+    @mock.patch('sonic_platform.device_data.DeviceDataManager.get_always_fw_control_ports', mock.MagicMock(return_value=[0]))
+    def test_fcp_state(self):
+        self.mock_value('present', 1)
+        s = sfp.SFP(0)
+        s.on_event(sfp.EVENT_START)
+        assert s.get_state() == sfp.STATE_FCP_PRESENT
+        
+        self.mock_value('present', 0)
+        s = sfp.SFP(0)
+        s.on_event(sfp.EVENT_START)
+        assert s.get_state() == sfp.STATE_FCP_NOT_PRESENT
+        

From 9ca1464f70ffb67f1745867248fd25f63ea5fcbb Mon Sep 17 00:00:00 2001
From: noaOrMlnx <58519608+noaOrMlnx@users.noreply.github.com>
Date: Mon, 8 Jul 2024 16:27:38 +0300
Subject: [PATCH 0803/1115] [Mellanox] Update SDK/FW to 4.6.4072/2012.4072
 (#19467)

- Why I did it
Update SDK/FW to 4.6.4072/2012.4072
Now, CMIS host mgmt feature is enabled to work on every SN4700 PSID

Work item tracking

- How I did it
Update Makefiles

- How to verify it
Run tests
---
 platform/mellanox/fw.mk  | 10 +++++-----
 platform/mellanox/sdk.mk |  2 +-
 2 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/platform/mellanox/fw.mk b/platform/mellanox/fw.mk
index 62014478b..2b6931d5e 100644
--- a/platform/mellanox/fw.mk
+++ b/platform/mellanox/fw.mk
@@ -25,29 +25,29 @@ SIMX_VERSION = 24.4-1091
 
 FW_FROM_URL = y
 
-MLNX_FW_ASSETS_RELEASE_TAG = fw-2012.4062
+MLNX_FW_ASSETS_RELEASE_TAG = fw-2012.4072
 MLNX_FW_ASSETS_URL = $(MLNX_ASSETS_GITHUB_URL)/releases/download/$(MLNX_FW_ASSETS_RELEASE_TAG)
 
 ifeq ($(MLNX_FW_BASE_URL), )
 MLNX_FW_BASE_URL = $(MLNX_FW_ASSETS_URL)
 endif
 
-MLNX_SPC_FW_VERSION = 13.2012.4062
+MLNX_SPC_FW_VERSION = 13.2012.4072
 MLNX_SPC_FW_FILE = fw-SPC-rel-$(subst .,_,$(MLNX_SPC_FW_VERSION))-EVB.mfa
 $(MLNX_SPC_FW_FILE)_PATH = $(MLNX_FW_BASE_PATH)
 $(MLNX_SPC_FW_FILE)_URL = $(MLNX_FW_BASE_URL)/$(MLNX_SPC_FW_FILE)
 
-MLNX_SPC2_FW_VERSION = 29.2012.4062
+MLNX_SPC2_FW_VERSION = 29.2012.4072
 MLNX_SPC2_FW_FILE = fw-SPC2-rel-$(subst .,_,$(MLNX_SPC2_FW_VERSION))-EVB.mfa
 $(MLNX_SPC2_FW_FILE)_PATH = $(MLNX_FW_BASE_PATH)
 $(MLNX_SPC2_FW_FILE)_URL = $(MLNX_FW_BASE_URL)/$(MLNX_SPC2_FW_FILE)
 
-MLNX_SPC3_FW_VERSION = 30.2012.4062
+MLNX_SPC3_FW_VERSION = 30.2012.4072
 MLNX_SPC3_FW_FILE = fw-SPC3-rel-$(subst .,_,$(MLNX_SPC3_FW_VERSION))-EVB.mfa
 $(MLNX_SPC3_FW_FILE)_PATH = $(MLNX_FW_BASE_PATH)
 $(MLNX_SPC3_FW_FILE)_URL = $(MLNX_FW_BASE_URL)/$(MLNX_SPC3_FW_FILE)
 
-MLNX_SPC4_FW_VERSION = 34.2012.4062
+MLNX_SPC4_FW_VERSION = 34.2012.4072
 MLNX_SPC4_FW_FILE = fw-SPC4-rel-$(subst .,_,$(MLNX_SPC4_FW_VERSION))-EVB.mfa
 $(MLNX_SPC4_FW_FILE)_PATH = $(MLNX_FW_BASE_PATH)
 $(MLNX_SPC4_FW_FILE)_URL = $(MLNX_FW_BASE_URL)/$(MLNX_SPC4_FW_FILE)
diff --git a/platform/mellanox/sdk.mk b/platform/mellanox/sdk.mk
index 15ccedc7b..422bb9f5f 100644
--- a/platform/mellanox/sdk.mk
+++ b/platform/mellanox/sdk.mk
@@ -14,7 +14,7 @@
 # See the License for the specific language governing permissions and
 # limitations under the License.
 #
-MLNX_SDK_VERSION = 4.6.4062
+MLNX_SDK_VERSION = 4.6.4072
 MLNX_SDK_ISSU_VERSION = 101
 
 MLNX_SDK_DRIVERS_GITHUB_URL = https://github.com/Mellanox/Spectrum-SDK-Drivers

From 1c35c627ae6e1313df005379329aa11d16f5bd2b Mon Sep 17 00:00:00 2001
From: Oleksandr Ivantsiv <oivantsiv@nvidia.com>
Date: Tue, 9 Jul 2024 09:32:09 -0700
Subject: [PATCH 0804/1115] [nvidia-bluefield] Update SAI to SAIBuild0.0.32.0,
 SDK to v24.7-RC4 (#19456)

- Why I did it
To include the latest fixes and new functionality

- How I did it
SDK_VERSION 24.7-RC2 -> 24.7-RC4
SAI_VERSION SAIBuild0.0.31.0 -> SAIBuild0.0.32.0

- How to verify it
Build an image and run tests from "sonic-mgmt".
---
 .../bluefield-platform-modules/bin/bfnet.sh    | 14 +++++++++++++-
 .../systemd/dpu.service                        |  3 ++-
 .../udev/91-tmfifo_net.rules                   |  2 +-
 .../nvidia-bluefield/pinctrl-mlxbf3/Makefile   |  2 --
 .../pinctrl-mlxbf3/pinctrl-mlxbf3.c.patch      | 13 -------------
 .../platform-api/sonic_platform/device_data.py |  1 -
 .../nvidia-bluefield/recipes/bluefield-soc.mk  | 18 ++++++++++--------
 platform/nvidia-bluefield/recipes/dpu-sai.mk   |  2 +-
 platform/nvidia-bluefield/recipes/fw.mk        |  2 +-
 .../recipes/installer-image.mk                 |  4 ++--
 platform/nvidia-bluefield/recipes/mft.mk       |  4 ++--
 platform/nvidia-bluefield/recipes/sdk.mk       |  2 +-
 12 files changed, 33 insertions(+), 34 deletions(-)
 delete mode 100644 platform/nvidia-bluefield/pinctrl-mlxbf3/pinctrl-mlxbf3.c.patch

diff --git a/platform/nvidia-bluefield/bluefield-platform-modules/bin/bfnet.sh b/platform/nvidia-bluefield/bluefield-platform-modules/bin/bfnet.sh
index 0c74cfbe5..76b785c9b 100755
--- a/platform/nvidia-bluefield/bluefield-platform-modules/bin/bfnet.sh
+++ b/platform/nvidia-bluefield/bluefield-platform-modules/bin/bfnet.sh
@@ -16,6 +16,7 @@
 # limitations under the License.
 #
 
+pci_iface=eth0-midplane
 cp_iface=Ethernet0
 pidfile=/run/dhcl-internal.$cp_iface.pid
 leasefile=/var/lib/dhcp/dhcl-internal.$cp_iface.leases
@@ -55,12 +56,23 @@ stop()
     rmmod mlx5_ib mlx5_core
 }
 
+configure_pci_iface()
+{
+    mgmt_mac=$(cat /sys/devices/platform/MLNXBF17:00/net/*/address)
+
+    # Set PCI interface MAC address to the MAC address of the mgmt interface
+    ip link set dev $pci_iface address $mgmt_mac
+}
+
 case "$1" in
     start|stop)
         $1
         ;;
+    configure-pci-iface)
+        configure_pci_iface
+        ;;
     *)
-        echo "Usage: $0 {start|stop}"
+        echo "Usage: $0 {start|stop|configure-pci-iface}"
         exit 1
         ;;
 esac
diff --git a/platform/nvidia-bluefield/bluefield-platform-modules/systemd/dpu.service b/platform/nvidia-bluefield/bluefield-platform-modules/systemd/dpu.service
index e713ca18e..fc4c50d69 100644
--- a/platform/nvidia-bluefield/bluefield-platform-modules/systemd/dpu.service
+++ b/platform/nvidia-bluefield/bluefield-platform-modules/systemd/dpu.service
@@ -5,7 +5,8 @@ After=getty.target
 [Service]
 Type=oneshot
 ExecStartPre=/usr/bin/bfrshlog "Linux up"
-ExecStart=/usr/bin/bfrshlog "DPU is ready"
+ExecStartPre=/usr/bin/bfrshlog "DPU is ready"
+ExecStart=/usr/bin/bfup
 StandardOutput=journal+console
 
 [Install]
diff --git a/platform/nvidia-bluefield/bluefield-platform-modules/udev/91-tmfifo_net.rules b/platform/nvidia-bluefield/bluefield-platform-modules/udev/91-tmfifo_net.rules
index 540908d69..af1c3f8e5 100644
--- a/platform/nvidia-bluefield/bluefield-platform-modules/udev/91-tmfifo_net.rules
+++ b/platform/nvidia-bluefield/bluefield-platform-modules/udev/91-tmfifo_net.rules
@@ -1 +1 @@
-SUBSYSTEM=="net", ACTION=="add", DEVPATH=="/devices/platform/MLNXBF01:00/virtio1/net/eth*", NAME="tmfifo_net0"
\ No newline at end of file
+SUBSYSTEM=="net", ACTION=="add", DEVPATH=="/devices/platform/MLNXBF01:00/virtio1/net/eth*", NAME="eth0-midplane", RUN+="/usr/bin/bfnet.sh configure-pci-iface"
diff --git a/platform/nvidia-bluefield/pinctrl-mlxbf3/Makefile b/platform/nvidia-bluefield/pinctrl-mlxbf3/Makefile
index ca56f30f8..04fab4b51 100644
--- a/platform/nvidia-bluefield/pinctrl-mlxbf3/Makefile
+++ b/platform/nvidia-bluefield/pinctrl-mlxbf3/Makefile
@@ -32,8 +32,6 @@ $(addprefix $(DEST)/, $(MLXBF3_PINCTRL_DRIVER)): $(DEST)/% :
 
 	pushd ${MLXBF3_PINCTRL}
 
-	patch -p1 < ../../pinctrl-mlxbf3.c.patch
-
 	# Build the package
 	make -C /lib/modules/$(KVERSION)/build M=$(MODULE_DIR)
 
diff --git a/platform/nvidia-bluefield/pinctrl-mlxbf3/pinctrl-mlxbf3.c.patch b/platform/nvidia-bluefield/pinctrl-mlxbf3/pinctrl-mlxbf3.c.patch
deleted file mode 100644
index c78afc4b2..000000000
--- a/platform/nvidia-bluefield/pinctrl-mlxbf3/pinctrl-mlxbf3.c.patch
+++ /dev/null
@@ -1,13 +0,0 @@
-diff --git a/pinctrl-mlxbf3.c b/pinctrl-mlxbf3.c
-index 8371d83..d3746f6 100644
---- a/pinctrl-mlxbf3.c
-+++ b/pinctrl-mlxbf3.c
-@@ -18,7 +18,7 @@
- 
- #define DRV_VERSION "1.0"
- 
--#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0)
-+#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 0, 0)
- struct pinfunction {
- 	const char *name;
- 	const char * const *groups;
diff --git a/platform/nvidia-bluefield/platform-api/sonic_platform/device_data.py b/platform/nvidia-bluefield/platform-api/sonic_platform/device_data.py
index c4d3e902f..5c62ec51b 100644
--- a/platform/nvidia-bluefield/platform-api/sonic_platform/device_data.py
+++ b/platform/nvidia-bluefield/platform-api/sonic_platform/device_data.py
@@ -30,7 +30,6 @@ def __init__(self, name, thermals=None):
         self.name = name
         self.thermals = thermals
 
-
 class DeviceDataManager:
 
     def __init__(self):
diff --git a/platform/nvidia-bluefield/recipes/bluefield-soc.mk b/platform/nvidia-bluefield/recipes/bluefield-soc.mk
index 3ff258936..dc256b6b6 100644
--- a/platform/nvidia-bluefield/recipes/bluefield-soc.mk
+++ b/platform/nvidia-bluefield/recipes/bluefield-soc.mk
@@ -16,8 +16,8 @@
 #
 
 # Bluefied Software Distribution Version
-BFSOC_VERSION = 4.6.0
-BFSOC_REVISION = 13035
+BFSOC_VERSION = 4.7.0
+BFSOC_REVISION = 13127
 BFB_IMG_TYPE = prod
 BFSOC_BUILD_DATE =
 
@@ -34,6 +34,7 @@ BSD_BASE_URL = $(BSD_INTERNAL_BASE_URL)/$(BFSOC_BUILD_DATE)
 endif
 
 BSD_BASE_SOURCE_URL = $(BSD_BASE_URL)/build/install/distro/SRPMS/
+QP_BOOTIMAGES_BASE_URL = $(BSD_BASE_URL)/build/install/distro/DEBS/
 DEV_BOOTIMAGES_BASE_URL = $(BSD_BASE_URL)/build/install/distro/dev-release/DEBS/
 PROD_BOOTIMAGES_BASE_URL = $(BSD_BASE_URL)/build/install/distro/ga-release/DEBS/
 endif
@@ -133,7 +134,10 @@ $(MLXBF_PTM_DRIVER)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON)
 BF_PLATFORM_DRIVERS += $(MLXBF_PTM_DRIVER)
 export MLXBF_PTM_DRIVER_VERSION MLXBF_PTM_DRIVER
 
-ifeq ($(BFB_IMG_TYPE), prod)
+ifeq ($(BFB_IMG_TYPE), qp)
+BOOTIMAGES_BASE_URL = $(QP_BOOTIMAGES_BASE_URL)
+BOOTIMAGES = mlxbf-bootimages_$(BFSOC_VERSION)-$(BFSOC_REVISION)_arm64.deb
+else ifeq ($(BFB_IMG_TYPE), prod)
 BOOTIMAGES_BASE_URL = $(PROD_BOOTIMAGES_BASE_URL)
 BOOTIMAGES = mlxbf-bootimages-signed_$(BFSOC_VERSION)-$(BFSOC_REVISION)_arm64.deb
 else
@@ -160,15 +164,13 @@ $(BF_PLATFORM_MODULE)_SRC_PATH = $(PLATFORM_PATH)/bluefield-platform-modules
 
 $(BF_PLATFORM_MODULE)_FILES = $(BF_PLATFORM_DRIVERS)
 
-SONIC_MAKE_DEBS += $(BF_PLATFORM_MODULE)
 export BF_PLATFORM_MODULE_VERSION BF_PLATFORM_MODULE BF_PLATFORM_DRIVERS
 
 ifeq ($(BFSOC_FROM_INTERNAL), y)
 SONIC_MAKE_FILES += $(BF_PLATFORM_DRIVERS)
-SONIC_MAKE_DEBS += $(BFSOC_MAKE_DEBS)
+SONIC_MAKE_DEBS += $(BFSOC_MAKE_DEBS) $(BF_PLATFORM_MODULE)
 SONIC_ONLINE_DEBS += $(BFSOC_ONLINE_DEBS)
 else
-$(eval $(foreach file,$(BF_PLATFORM_DRIVERS) $(BFSOC_MAKE_DEBS) $(BFSOC_MAKE_DEBS_DERIVED) $(BFSOC_ONLINE_DEBS), $(call make_url_bfsoc,$(file))))
-SONIC_ONLINE_FILES += $(BF_PLATFORM_DRIVERS)
-SONIC_ONLINE_DEBS += $(BFSOC_MAKE_DEBS) $(BFSOC_MAKE_DEBS_DERIVED) $(BFSOC_ONLINE_DEBS)
+$(eval $(foreach file, $(BFSOC_MAKE_DEBS) $(BFSOC_MAKE_DEBS_DERIVED) $(BFSOC_ONLINE_DEBS) $(BF_PLATFORM_MODULE), $(call make_url_bfsoc,$(file))))
+SONIC_ONLINE_DEBS += $(BFSOC_MAKE_DEBS) $(BFSOC_MAKE_DEBS_DERIVED) $(BFSOC_ONLINE_DEBS) $(BF_PLATFORM_MODULE)
 endif
diff --git a/platform/nvidia-bluefield/recipes/dpu-sai.mk b/platform/nvidia-bluefield/recipes/dpu-sai.mk
index 6cac410ec..706fd6d65 100644
--- a/platform/nvidia-bluefield/recipes/dpu-sai.mk
+++ b/platform/nvidia-bluefield/recipes/dpu-sai.mk
@@ -15,7 +15,7 @@
 # limitations under the License.
 #
 
-DPU_SAI_VERSION = SAIBuild0.0.30.0
+DPU_SAI_VERSION = SAIBuild0.0.32.0
 
 # Place here URL where SAI sources exist
 DPU_SAI_SOURCE_BASE_URL=
diff --git a/platform/nvidia-bluefield/recipes/fw.mk b/platform/nvidia-bluefield/recipes/fw.mk
index 94b0486e9..344ed49b1 100644
--- a/platform/nvidia-bluefield/recipes/fw.mk
+++ b/platform/nvidia-bluefield/recipes/fw.mk
@@ -17,7 +17,7 @@
 
 BF3_FW_BASE_URL =
 
-BF3_FW_VERSION = 32.39.1002
+BF3_FW_VERSION = 32.41.1000
 
 BF3_FW_FILE = fw-BlueField-3-rel-$(subst .,_,$(BF3_FW_VERSION)).mfa
 
diff --git a/platform/nvidia-bluefield/recipes/installer-image.mk b/platform/nvidia-bluefield/recipes/installer-image.mk
index e3831a54d..e87fcb03d 100644
--- a/platform/nvidia-bluefield/recipes/installer-image.mk
+++ b/platform/nvidia-bluefield/recipes/installer-image.mk
@@ -67,7 +67,7 @@ $(SONIC_BF_IMAGE_PXE)_INSTALLS += $($(SONIC_BF_IMAGE_BASE)_INSTALLS)
 $(SONIC_BF_IMAGE_PXE)_DEPENDS += $($(SONIC_BF_IMAGE_BASE)_DEPENDS)
 $(SONIC_BF_IMAGE_PXE)_DOCKERS += $($(SONIC_BF_IMAGE_BASE)_DOCKERS)
 $(SONIC_BF_IMAGE_PXE)_LAZY_INSTALLS += $($(SONIC_BF_IMAGE_BASE)_LAZY_INSTALLS)
-$(SONIC_BF_IMAGE_PXE)_FILES += $($(SONIC_BF_IMAGE_BASE)_FILES) $(MLX_BOOTCTL_DRIVER)
+$(SONIC_BF_IMAGE_PXE)_FILES += $($(SONIC_BF_IMAGE_BASE)_FILES)
 
 # The traditional *.bin image. Works for sonic-sonic upgrade.
 SONIC_BF_IMAGE_BIN = $(SONIC_BF_IMAGE_BASE).bin
@@ -87,6 +87,6 @@ $(SONIC_BF_IMAGE_BFB)_INSTALLS += $($(SONIC_BF_IMAGE_BASE)_INSTALLS)
 $(SONIC_BF_IMAGE_BFB)_DEPENDS += $($(SONIC_BF_IMAGE_BASE)_DEPENDS)
 $(SONIC_BF_IMAGE_BFB)_DOCKERS += $($(SONIC_BF_IMAGE_BASE)_DOCKERS)
 $(SONIC_BF_IMAGE_BFB)_LAZY_INSTALLS += $($(SONIC_BF_IMAGE_BASE)_LAZY_INSTALLS)
-$(SONIC_BF_IMAGE_BFB)_FILES += $($(SONIC_BF_IMAGE_BASE)_FILES) $(MLX_BOOTCTL_DRIVER)
+$(SONIC_BF_IMAGE_BFB)_FILES += $($(SONIC_BF_IMAGE_BASE)_FILES)
 
 SONIC_INSTALLERS += $(SONIC_BF_IMAGE_PXE) $(SONIC_BF_IMAGE_BIN) $(SONIC_BF_IMAGE_BFB)
diff --git a/platform/nvidia-bluefield/recipes/mft.mk b/platform/nvidia-bluefield/recipes/mft.mk
index 7f5615865..f4b3722a1 100644
--- a/platform/nvidia-bluefield/recipes/mft.mk
+++ b/platform/nvidia-bluefield/recipes/mft.mk
@@ -14,8 +14,8 @@
 # See the License for the specific language governing permissions and
 # limitations under the License.
 
-MFT_VERSION = 4.26.1
-MFT_REVISION = 3
+MFT_VERSION = 4.28.0
+MFT_REVISION = 96
 
 MFT_INTERNAL_SOURCE_BASE_URL =
 
diff --git a/platform/nvidia-bluefield/recipes/sdk.mk b/platform/nvidia-bluefield/recipes/sdk.mk
index 0e0a048ae..fbe53fddd 100644
--- a/platform/nvidia-bluefield/recipes/sdk.mk
+++ b/platform/nvidia-bluefield/recipes/sdk.mk
@@ -19,7 +19,7 @@ SDK_BASE_PATH = $(PLATFORM_PATH)/sdk-src/sonic-bluefield-packages/bin
 
 # Place here URL where SDK sources exist
 SDK_SOURCE_BASE_URL =
-SDK_VERSION = 24.4-RC2
+SDK_VERSION = 24.7-RC4
 
 SDK_COLLECTX_URL = https://linux.mellanox.com/public/repo/doca/1.5.2/debian12/aarch64/
 

From c2055abbcfba01ef1946b7d8eb9b111b6dfd23f2 Mon Sep 17 00:00:00 2001
From: jingwenxie <jingwenxie@microsoft.com>
Date: Thu, 11 Jul 2024 12:38:56 +0800
Subject: [PATCH 0805/1115] Fix no standalone lo_v6 entry which break YANG
 validation (#19514)

### Why I did it
The load_mgmt_config generated lo_v6 is missing standalone entry which fail YANG validation

##### Work item tracking
- Microsoft ADO **(number only)**:28665800

#### How I did it
Add the standalone entry
#### How to verify it
Manual test in DUT

Before change:
```
admin@str-msn2700a1-03:~$ sonic-cfggen -M /etc/sonic/device_desc.xml --print-data
{
    "DEVICE_METADATA": {
        "localhost": {
            "hostname": "CPQ21-0101-0509-04T0",
            "hwsku": "Arista-7260CX3-D108C8"
        }
    },
    "LOOPBACK_INTERFACE": {
        "lo_v6|2603:10d0:e:5eb::/128": {}         <==== missing standalone entry which fail YANG
    },
    "MGMT_INTERFACE": {
        "eth0|100.84.101.139/26": {
            "gwaddr": "100.84.101.129"
        },
        "eth0|2603:10e2:f0:7478::b/64": {
            "gwaddr": "2603:10e2:f0:7478::1"
        }
    }
}
```
After change:
```
admin@str-msn2700a1-03:~$ sonic-cfggen -M /etc/sonic/device_desc.xml --print-data
{
    "DEVICE_METADATA": {
        "localhost": {
            "hostname": "CPQ21-0101-0509-04T0",
            "hwsku": "Arista-7260CX3-D108C8"
        }
    },
    "LOOPBACK_INTERFACE": {
        "lo_v6": {},                                          <=== added standalone entry
        "lo_v6|2603:10d0:e:5eb::/128": {}
    },
    "MGMT_INTERFACE": {
        "eth0|100.84.101.139/26": {
            "gwaddr": "100.84.101.129"
        },
        "eth0|2603:10e2:f0:7478::b/64": {
            "gwaddr": "2603:10e2:f0:7478::1"
        }
    }
}
```
---
 src/sonic-config-engine/minigraph.py | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/sonic-config-engine/minigraph.py b/src/sonic-config-engine/minigraph.py
index b6375b80d..b2e87aa05 100644
--- a/src/sonic-config-engine/minigraph.py
+++ b/src/sonic-config-engine/minigraph.py
@@ -2831,9 +2831,9 @@ def parse_device_desc_xml(filename):
         'hwsku': hwsku,
         }}
 
-    results['LOOPBACK_INTERFACE'] = {('lo', lo_prefix): {}}
+    results['LOOPBACK_INTERFACE'] = {'lo': {}, ('lo', lo_prefix): {}}
     if lo_prefix_v6:
-        results['LOOPBACK_INTERFACE'] = {('lo_v6', lo_prefix_v6): {}}
+        results['LOOPBACK_INTERFACE'] = {'lo_v6': {}, ('lo_v6', lo_prefix_v6): {}}
 
     results['MGMT_INTERFACE'] = {}
     if mgmt_prefix:

From 12542bf1ba653e82d61d69a777fe731500e3ca7a Mon Sep 17 00:00:00 2001
From: sophiek <skravitz@nvidia.com>
Date: Thu, 11 Jul 2024 18:36:43 +0300
Subject: [PATCH 0806/1115] [Mellanox] CMIS host management script (#19509)

- Why I did it
Added a script for CMIS Host Management enabling and disabling on a running switch.
This intend to prevent issues caused by wrong configuration of the feature.
The idea is to provide a more convenient way for users to configure the feature.

- How I did it
Add the script to /usr/bin/ that supports two options:
--enable - receives paths to config files for Port SI parameters and Module SI parameters:
media_settings.json, optics_si_settings.json, and enables the feature
--disable - disables the feature
---
 .../build_templates/sonic_debian_extension.j2 |   2 +
 .../mellanox/cmis_host_mgmt/cmis_host_mgmt.py | 171 ++++++++++++++++++
 2 files changed, 173 insertions(+)
 create mode 100644 platform/mellanox/cmis_host_mgmt/cmis_host_mgmt.py

diff --git a/files/build_templates/sonic_debian_extension.j2 b/files/build_templates/sonic_debian_extension.j2
index 766874571..40d721220 100644
--- a/files/build_templates/sonic_debian_extension.j2
+++ b/files/build_templates/sonic_debian_extension.j2
@@ -1060,6 +1060,8 @@ for MLNX_CPLD_ARCHIVE in $MLNX_CPLD_ARCHIVES; do
 done
 sudo cp platform/mellanox/get_component_versions/get_component_versions.py $FILESYSTEM_ROOT/usr/bin/get_component_versions.py
 sudo chmod 755 $FILESYSTEM_ROOT/usr/bin/get_component_versions.py
+sudo cp platform/mellanox/cmis_host_mgmt/cmis_host_mgmt.py $FILESYSTEM_ROOT/usr/bin/cmis_host_mgmt.py
+sudo chmod 755 $FILESYSTEM_ROOT/usr/bin/cmis_host_mgmt.py
 j2 platform/mellanox/mlnx-fw-upgrade.j2 | sudo tee $FILESYSTEM_ROOT/usr/bin/mlnx-fw-upgrade.sh
 sudo chmod 755 $FILESYSTEM_ROOT/usr/bin/mlnx-fw-upgrade.sh
 
diff --git a/platform/mellanox/cmis_host_mgmt/cmis_host_mgmt.py b/platform/mellanox/cmis_host_mgmt/cmis_host_mgmt.py
new file mode 100644
index 000000000..aaedbe4a5
--- /dev/null
+++ b/platform/mellanox/cmis_host_mgmt/cmis_host_mgmt.py
@@ -0,0 +1,171 @@
+#!/usr/bin/env python3
+#
+# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+import shutil
+import click
+import re
+import os
+import subprocess
+
+
+class CMISHostMgmtActivator:
+    PARAMS = {
+        "sai_profile": {
+            "file_name": "sai.profile",
+            "enabled_param": "SAI_INDEPENDENT_MODULE_MODE=1",
+            "disabled_param": "SAI_INDEPENDENT_MODULE_MODE=0"
+        },
+        "pmon_daemon_control": {
+            "file_name": "pmon_daemon_control.json",
+            "enabled_param": "\"skip_xcvrd_cmis_mgr\": false",
+            "disabled_param": "\"skip_xcvrd_cmis_mgr\": true",
+        },
+        "sai_xml": {
+            "file_name": "sai_<>.xml", # will be filled at main, since we can't know the SKU here 
+            "enabled_param": "<late-create-all-ports>1</late-create-all-ports>",
+            "disabled_param": "<late-create-all-ports>1</late-create-all-ports>" # Shouldn't be called
+        }
+    }
+
+    @staticmethod
+    def change_param(param, path, action):
+        file_path = '{}/{}'.format(path, CMISHostMgmtActivator.PARAMS[param]["file_name"])
+        lines = None
+
+        try:
+            with open(file_path, 'r') as param_file:
+                lines = param_file.read()
+
+                if lines:
+                    if action == "disable":
+                        lines = re.sub(CMISHostMgmtActivator.PARAMS[param]["enabled_param"],
+                                    CMISHostMgmtActivator.PARAMS[param]["disabled_param"],
+                                    lines)
+                    elif action == "enable":
+                        if param == "sai_profile" and not re.search(CMISHostMgmtActivator.PARAMS[param]["disabled_param"], lines):
+                            if not re.search(CMISHostMgmtActivator.PARAMS[param]["enabled_param"], lines): 
+                                with open(file_path, 'a') as param_file:
+                                    param_file.write(CMISHostMgmtActivator.PARAMS[param]["enabled_param"])
+                                return
+
+                        lines = re.sub(CMISHostMgmtActivator.PARAMS[param]["disabled_param"],
+                                    CMISHostMgmtActivator.PARAMS[param]["enabled_param"],
+                                    lines)
+
+            with open(file_path, 'w') as param_file:
+                param_file.write(lines)
+
+        except FileNotFoundError as e:
+            print('Missing file: {}'.format(e.filename))
+
+
+    @staticmethod
+    def parse_show_platform_summary():
+        summary = subprocess.check_output(['show', 'platform', 'summary'])
+        summary = summary.decode('utf-8')
+        summary = [x for x in summary.split('\n') if x]
+
+        for field in summary:
+            key, value = field.split(": ")
+            
+            if key == 'Platform':
+                platform = value
+
+            elif key == 'HwSKU':
+                sku = value
+
+        return platform, sku
+
+
+    @staticmethod
+    def remove_file(file_path):
+        if os.path.isfile(file_path):
+            os.remove(file_path)
+
+
+    @staticmethod
+    def copy_file(src_path, dest_path):
+        if os.path.isfile(src_path):
+            shutil.copy(src_path, dest_path)
+
+
+    @staticmethod
+    def is_spc_supported(spc):
+        return int(spc) >= 4000
+
+    @staticmethod
+    def disable():
+        platform, sku = CMISHostMgmtActivator.parse_show_platform_summary()
+        sku_path = '/usr/share/sonic/device/{0}/{1}'.format(platform, sku)
+        platform_path = '/usr/share/sonic/device/{0}'.format(platform)
+        CMISHostMgmtActivator.change_param("sai_profile", sku_path, 'disable')
+        
+        if os.path.isfile('{0}/{1}'.format(platform_path, 'pmon_daemon_control.json')):
+            CMISHostMgmtActivator.change_param("pmon_daemon_control", platform_path, 'disable')
+            CMISHostMgmtActivator.remove_file('{0}/{1}'.format(sku_path, 'pmon_daemon_control.json'))
+        else:
+            CMISHostMgmtActivator.change_param("pmon_daemon_control", sku_path, 'disable')
+
+        CMISHostMgmtActivator.remove_file('{0}/{1}'.format(sku_path, 'media_settings.json'))
+        CMISHostMgmtActivator.remove_file('{0}/{1}'.format(sku_path,'optics_si_settings.json'))
+        CMISHostMgmtActivator.remove_file('{0}/{1}'.format(platform_path, 'media_settings.json'))
+        CMISHostMgmtActivator.remove_file('{0}/{1}'.format(platform_path, 'optics_si_settings.json'))
+
+
+    @staticmethod
+    def enable(args):
+        platform, sku = CMISHostMgmtActivator.parse_show_platform_summary()
+        sku_path = '/usr/share/sonic/device/{0}/{1}'.format(platform, sku)
+        platform_path = '/usr/share/sonic/device/{0}'.format(platform)
+
+        sku_num = re.search('[0-9]{4}', sku).group()
+
+        if not CMISHostMgmtActivator.is_spc_supported(sku_num):
+            print("Error: unsupported platform - feature is supported on SPC3 and higher.")
+            
+        CMISHostMgmtActivator.PARAMS["sai_xml"]["file_name"] = "sai_{0}.xml".format(sku_num)
+
+        CMISHostMgmtActivator.copy_file(args[0], sku_path)
+        CMISHostMgmtActivator.copy_file(args[1], sku_path)
+        CMISHostMgmtActivator.copy_file('{0}/{1}'.format(platform_path, 'pmon_daemon_control.json'), sku_path)
+
+        CMISHostMgmtActivator.change_param("sai_profile", sku_path, 'enable')
+        CMISHostMgmtActivator.change_param("pmon_daemon_control", sku_path, 'enable')
+        CMISHostMgmtActivator.change_param("sai_xml", sku_path, 'enable')
+        
+
+@click.command()
+@click.option('--disable', is_flag=True, help='Disable CMIS Host Management')
+@click.option('--enable', nargs=2, type=click.Path(), help='Enable CMIS Host Management, receives two arguments: media_settings.json path, and optics_si_settings.json path')
+def main(disable, enable):
+
+    if disable and enable:
+        print("Error: can't use both options, please choose one.")
+        return
+
+    if disable:
+        CMISHostMgmtActivator.disable()
+
+    elif enable:
+        CMISHostMgmtActivator.enable(enable)
+
+    else:
+        print("Error: no option was provided - nothing to execute.")
+
+if __name__ == '__main__':
+    main()

From 1c2aa3262826034b6b44f299d17584dff3333b38 Mon Sep 17 00:00:00 2001
From: Oleksandr Ivantsiv <oivantsiv@nvidia.com>
Date: Thu, 11 Jul 2024 10:20:42 -0700
Subject: [PATCH 0807/1115] [nvidia-bluefield] Add the possibility to compile
 BFB image (#19512)

- Why I did it
Add the possibility to compile BFB (BlueField boot stream) image for the nvidia-bluefield platform.
The BFB image fully overwrites the DPU's SSD and can be used for DPU recovery.

- How I did it
Add new bfb image type to build_image.sh script. Add scripts under the "nvidia-bluefield" platform to create the binary file.

- How to verify it
Configure nvidia-bluefield platform. Run make target/sonic-nvidia-bluefield.bfb command to compile the image.
---
 build_image.sh                                |  11 +
 onie-image-arm64.conf                         |   3 +
 .../installer/create_sonic_image              | 420 ++++++++++++++++++
 .../nvidia-bluefield/installer/install.sh.j2  | 390 ++++++++++++++++
 .../nvidia-bluefield/installer/sonic-grub.cfg |  27 ++
 .../recipes/installer-image.dep               |   1 -
 .../recipes/installer-image.mk                |  13 +-
 7 files changed, 852 insertions(+), 13 deletions(-)
 create mode 100755 platform/nvidia-bluefield/installer/create_sonic_image
 create mode 100755 platform/nvidia-bluefield/installer/install.sh.j2
 create mode 100644 platform/nvidia-bluefield/installer/sonic-grub.cfg

diff --git a/build_image.sh b/build_image.sh
index 571febe5c..2ef9be097 100755
--- a/build_image.sh
+++ b/build_image.sh
@@ -253,6 +253,17 @@ elif [ "$IMAGE_TYPE" = "dsc" ]; then
 
     generate_onie_installer_image
 
+elif [ "$IMAGE_TYPE" = "bfb" ]; then
+    echo "Build BFB installer"
+
+    if [[ $SECURE_UPGRADE_MODE != "no_sign" ]]; then
+         secure_upgrade_keys="--signing-key "$SECURE_UPGRADE_DEV_SIGNING_KEY" --signing-cert "$SECURE_UPGRADE_SIGNING_CERT""
+    fi
+
+    sudo -E ./platform/${CONFIGURED_PLATFORM}/installer/create_sonic_image --kernel $KVERSION "$secure_upgrade_keys"
+
+    sudo chown $USER $OUTPUT_BFB_IMAGE
+
 else
     echo "Error: Non supported image type $IMAGE_TYPE"
     exit 1
diff --git a/onie-image-arm64.conf b/onie-image-arm64.conf
index b8a199c70..28f83855d 100644
--- a/onie-image-arm64.conf
+++ b/onie-image-arm64.conf
@@ -53,3 +53,6 @@ ABOOT_BOOT_IMAGE=.sonic-boot.swi
 
 ## Output file name for dsc installer
 OUTPUT_DSC_IMAGE=target/sonic-$TARGET_MACHINE.tar
+
+## Output file name for bfb image
+OUTPUT_BFB_IMAGE=target/sonic-$TARGET_MACHINE.bfb
diff --git a/platform/nvidia-bluefield/installer/create_sonic_image b/platform/nvidia-bluefield/installer/create_sonic_image
new file mode 100755
index 000000000..8e18f1b7f
--- /dev/null
+++ b/platform/nvidia-bluefield/installer/create_sonic_image
@@ -0,0 +1,420 @@
+#!/bin/bash
+#
+# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+set -x
+set -e
+
+WDIR=
+IMAGE_VERSION=
+KERNEL_VERSION=
+CHROOT_DIR=
+INITRD=
+VMLINUZ=
+MODULES_DIR=
+
+SIGNING_CERT=
+SIGNING_KEY=
+CDIR=/sonic/
+SDIR=$CDIR/platform/${CONFIGURED_PLATFORM}/installer/
+DDIR=$CDIR
+CAPSULE=/lib/firmware/mellanox/boot/capsule/boot_update2.cap
+BOOTCTL_DRIVER=
+TMFIFO_DRIVER=
+SDHCI_OF_DWCMSHC_DRIVER=
+TARGET_MACHINE=nvidia-bluefield
+BFB="${BFB:-/lib/firmware/mellanox/boot/default.bfb}"
+GRUB_AA64=grubnetaa64.efi
+GRUB_CFG="" # Common Grub Config
+BF2_BOOT_ARGS="console=ttyAMA1 console=hvc0 console=ttyAMA0 earlycon=pl011,0x01000000 earlycon=pl011,0x01800000"
+BF2_GRUB_CFG="$BF2_BOOT_ARGS isolcpus=1-7 nohz_full=1-7 rcu_nocbs=1-7"
+BF3_BOOT_ARGS="console=ttyAMA1 console=hvc0 console=ttyAMA0 earlycon=pl011,0x13010000"
+BF3_GRUB_CFG="$BF3_BOOT_ARGS isolcpus=1-13 nohz_full=1-13 rcu_nocbs=1-13"
+
+usage() {
+cat << EOF
+Usage: `basename $0` [ OPTIONS ]
+OPTIONS:
+-k, --kernel <kernel version>     Kernel version for the SmartNIC.
+-sc, --signing-cert               Secure upgrade signing certificate.
+-sk, --signing-key                Secure upgrade signing key.
+-v, --verbose                     Run script in verbose mode. Will print out each step of execution.
+-h, --help                        Display help
+EOF
+}
+parse_args() {
+    while [[ $@ != "" ]]; do
+        case $1 in
+            -h|--help)
+                usage
+                exit 0
+                ;;
+            -v|--verbose)
+                shift
+                set -x
+                ;;
+            -k|--kernel)
+                shift
+                KERNEL_VERSION=$1
+                ;;
+        -sc|--signing-cert)
+            shift
+        echo "signing cert $1"
+        SIGNING_CERT="$1"
+        ;;
+            -sk|--signing-key)
+        shift
+        echo "signing key $1"
+        SIGNING_KEY="$1"
+        ;;
+            *)
+                usage
+                exit 1
+                ;;
+        esac
+        shift
+    done
+}
+
+clean_dir()
+{
+    rm -rf $1
+    exit $2
+}
+
+validate_config() {
+    if [[ ! -f "$INITRD" ]]; then
+        echo "[create_sonic_image] Error! SONiC INITRD not found"
+        exit 1
+    fi
+
+    if [[ ! -f "$VMLINUZ" ]]; then
+        echo "[create_sonic_image] Error! SONiC VMLINUZ not found"
+        exit 1
+    fi
+
+    if [[ ! -d "$MODULES_DIR" ]]; then
+        echo "[create_sonic_image] Error! Path to Kernel Modules not found"
+        exit 1
+    fi
+
+    if [[ ! -n "$OUTPUT_BFB_IMAGE" ]]; then
+        echo "[create_sonic_image] Error! OUTPUT_BFB_IMAGE name not defined. Exiting.."
+        exit 1
+    fi
+
+    if [[ ! -f "$CDIR/$INSTALLER_PAYLOAD" ]]; then
+        echo "$INSTALLER_PAYLOAD not found. Exiting.."
+        exit 1
+    fi
+
+    mkbfb=`which mlx-mkbfb`
+    if [[ ! -x "${mkbfb}" ]]; then
+        echo "Error! mlx-mkbfb is required to build BFB image"
+        exit 1
+    fi
+
+    if [[ ! -f $CAPSULE ]]; then
+        echo "ERROR: Capsule file $CAPSULE does not exist"
+        exit 1
+    fi
+
+    if [[ ! -f $BOOTCTL_DRIVER ]]; then
+        echo "ERROR: Bootctl driver $BOOTCTL_DRIVER does not exist"
+        exit 1
+    fi
+
+    if [[ ! -f $TMFIFO_DRIVER ]]; then
+        echo "ERROR: Bootctl driver $TMFIFO_DRIVER does not exist"
+        exit 1
+    fi
+
+    if [[ ! -f $SDHCI_OF_DWCMSHC_DRIVER ]]; then
+        echo "ERROR: Bootctl driver $SDHCI_OF_DWCMSHC_DRIVER does not exist"
+        exit 1
+    fi
+
+    if [[ ! -f $BFB ]]; then
+        echo "ERROR: Default BFB $BFB does not exist"
+        exit 1
+    fi
+}
+
+cleanup_workdir() {
+    rm -rf $boot_args $boot_args2 $boot_path $boot_desc $WDIR
+}
+
+create_workdir() {
+    if [[ $WDIR == "" ]]; then
+        WDIR=$(mktemp -d /sonic/bfb-wd-XXXX)
+    else
+        rm -rf $WDIR/*
+    fi
+    boot_args=$(mktemp /tmp/boot-args-XXXX)
+    boot_args2=$(mktemp /tmp/boot-args2-XXXX)
+    boot_path=$(mktemp /tmp/boot-path-XXXX)
+    boot_desc=$(mktemp /tmp/boot-desc-XXXX)
+    trap cleanup_workdir EXIT
+}
+
+add_sonic_to_initramfs() {
+    # Add the logic to put second stage installer into bfb initramfs
+    mkdir -p debian
+
+    j2 ${SDIR}/install.sh.j2 -o ./debian/install.sh -e SECURE_UPGRADE_MODE="$SECURE_UPGRADE_MODE"
+    chmod 0755 ./debian/install.sh
+
+    # Copy the INSTALLER payload
+    cp $CDIR/$INSTALLER_PAYLOAD ./debian/
+
+cat > scripts/initrd-install << EOF
+#!/bin/bash
+
+printf_msg()
+{
+	echo "$@" | tee /dev/kmsg
+	return 0
+}
+
+depmod -a $KERNEL_VERSION > /dev/null 2>&1
+insmod /mlx-bootctl.ko
+insmod /sdhci-of-dwcmshc.ko
+insmod /sbsa_gwdt.ko
+/usr/sbin/watchdog
+
+printf_msg "================================="
+printf_msg "Installing SONiC. Please wait..."
+printf_msg "================================="
+
+/bin/bash /debian/install.sh
+if [ \$? -eq 0 ]; then
+	printf_msg "==================================="
+	printf_msg "Installation finished. Rebooting..."
+	printf_msg "==================================="
+	printf_msg
+	reboot -f
+else
+	printf_msg "========================"
+	printf_msg "Failed to install SONiC"
+	printf_msg "========================"
+fi
+EOF
+    chmod +x scripts/initrd-install
+    sudo rm -f conf/conf.d/debian-core*
+    sudo sh -c 'echo "BOOT=initrd-install" > conf/conf.d/initrd_install'
+    sudo sh -c 'echo "ROOT=\"LABEL=writable\"" > conf/conf.d/default_root'
+}
+
+copy_bin()
+{
+    from=$(realpath $1)
+
+    if [ -e $from/$2 ]; then
+        bin=$2
+    else
+        bin=$(sudo chroot $from bash -c "which $2 2> /dev/null")
+    fi
+
+    echo "copy from" $from file: $bin
+
+    if [ -h $from/$bin ]; then
+        if [[ $from == "/" ]]; then
+            tbin=`readlink -f $bin`
+        else
+            tbin=`readlink -f $from/$bin | sed -e "s~$from~~"`
+        fi
+
+        if [ ! -e .$tbin ]; then
+            sudo mkdir -p .`dirname $tbin`
+            sudo cp $from/$tbin .$tbin
+        fi
+
+        if [ ! -e .${bin} ]; then
+            sudo mkdir -p .`dirname $bin`
+            sudo cp -a $from/$bin .${bin}
+        fi
+    elif [ -e $from/$bin ]; then
+        sudo mkdir -p .`dirname $bin`
+        sudo cp -a $from/$bin .${bin}
+    else
+        echo "ERROR: Cannot find $2"
+        exit 1
+    fi
+
+    # Copy dependencies
+    for lib in `ldd $from/$bin 2> /dev/null | grep '=>' | awk '{print $3}'`
+    do
+        if [ -e .$lib ]; then
+            continue
+        fi
+
+        sudo mkdir -p .`dirname $lib`
+        sudo cp -a $from/$lib .$lib
+        echo sudo cp -a $from/$lib .$lib
+        if [ -h $from/.$lib ]; then
+            if [[ $from == "/" ]]; then
+                tlib=`readlink -f $lib`
+            else
+                tlib=`readlink -f $from/$lib | sed -e "s~$from~~"`
+            fi
+            if [ ! -e .$tlib ]; then
+                sudo mkdir -p .`dirname $tlib`
+                sudo cp $from/$tlib .$tlib
+            fi
+        fi
+    done
+ }
+
+create_bfb_image() {
+
+    pushd $WDIR
+
+    # Copy the initrd into the work directory
+    initramfs=$(realpath $INITRD)
+    cp $initramfs $WDIR/dump-initramfs-v0
+    initramfs=$WDIR/dump-initramfs-v0
+
+    case "$(file --brief --mime-type "$initramfs")" in
+        "application/x-lzma")
+            cat_initrd="lzcat" ;;
+        "application/x-lz4")
+            cat_initrd="lz4cat" ;;
+        "application/zstd")
+            cat_initrd="zstdcat" ;;
+        *)
+            cat_initrd="zcat" ;;
+    esac
+
+    echo "Rebuilding $initramfs"
+
+    mkdir -p ${WDIR}/initramfs
+    pushd initramfs
+    $cat_initrd "$initramfs" | cpio -i
+
+    # Remove tools coming with busybox
+    for tool in `dpkg -L grub2-common` \
+            `dpkg -L e2fsprogs` \
+            `dpkg -L kmod | grep -v share` \
+            `dpkg -L pciutils | grep -v share` \
+            `dpkg -L usbutils | grep -v share` \
+            `dpkg -L tar` \
+            /usr/sbin/watchdog
+    do
+        if [ -d $tool ]; then
+            continue
+        fi
+        /bin/rm -f .${tool}
+    done
+
+    for tool in `dpkg -L bfscripts | grep bin/` \
+            `dpkg -L e2fsprogs | grep -v share` \
+            `dpkg -L grub2-common` \
+            `dpkg -L kmod | grep -v share` \
+            `dpkg -L pciutils | grep -v share` \
+            `dpkg -L usbutils | grep -v share` \
+            `dpkg -L tar | grep -v share` \
+            `dpkg -L grub-efi-arm64-bin` \
+            `dpkg -L dmidecode | grep -v share` \
+            xz efibootmgr bash getopt hexdump lspci perl \
+            lsblk shutdown systemctl strings aarch64-linux-gnu-strings \
+            mlxbf-bootctl id mkfs fsck watchdog  dirname curl openssl
+    do
+        if [ -d $tool ]; then
+            continue
+        fi
+        copy_bin / $tool
+    done
+
+    sudo depmod -a -b ./ $KERNEL_VERSION
+    mkdir -p usr/share/misc/ bin/ var/log/watchdog
+    sudo cp /etc/watchdog.conf etc
+    sudo cp /usr/share/misc/pci.ids usr/share/misc/
+    cp $CHROOT_DIR/usr/share/misc/pci.ids usr/share/misc/
+    cp $BOOTCTL_DRIVER .
+    cp $TMFIFO_DRIVER .
+    cp $SDHCI_OF_DWCMSHC_DRIVER .
+    cp $WATCHDOG .
+    mkdir -p ./secure-boot
+    cp -r $CDIR/$FILESYSTEM_ROOT/boot/* ./secure-boot
+
+    mkdir -p ./lib/firmware/mellanox/boot/
+    cp /lib/firmware/mellanox/boot/default.bfb ./lib/firmware/mellanox/boot/default.bfb
+    cp -a /lib/firmware/mellanox/boot/capsule ./lib/firmware/mellanox/boot/
+    mkdir -p mnt dev sys proc
+
+    add_sonic_to_initramfs
+
+    # Make initramfs with new debian
+    find . -print0 | sudo cpio --null -o --format=newc | gzip -9 > "$initramfs"
+
+    popd
+
+    printf "$BF2_BOOT_ARGS initrd=initramfs" > \
+        "$boot_args"
+    printf "$BF3_BOOT_ARGS initrd=initramfs" > \
+        "$boot_args2"
+
+    printf "VenHw(F019E406-8C9C-11E5-8797-001ACA00BFC4)/Image" > "$boot_path"
+    printf "Linux from rshim" > "$boot_desc"
+    vmlinuz=$WDIR/vmlinuz
+    cat $VMLINUZ > "$vmlinuz"
+
+    $mkbfb --image "$vmlinuz" \
+           --initramfs "$initramfs" \
+           --capsule "$CAPSULE" \
+           --boot-args-v0 "$boot_args" \
+           --boot-args-v2 "$boot_args2" \
+           --boot-path "$boot_path" \
+           --boot-desc "$boot_desc" \
+            ${BFB} ${DDIR}/${OUTPUT_BFB_IMAGE}
+
+    echo "BFB is ready: $(readlink -f  ${DDIR}/${OUTPUT_BFB_IMAGE})"
+
+    popd
+}
+
+main() {
+    echo $@
+    parse_args $@
+    . $CDIR/onie-image-arm64.conf
+    # Export ENV Variables for j2cli
+    CHROOT_DIR=$CDIR/$FILESYSTEM_ROOT
+    if [[ ! -d "$CHROOT_DIR" ]]; then
+        echo "[create_sonic_image] Error! Path to CHROOT not found"
+        exit 1
+    fi
+    export GRUB_CFG=$(cat $SDIR/sonic-grub.cfg)
+    export IMAGE_VERSION=$(cat $CHROOT_DIR/etc/sonic/sonic_version.yml | grep "build_version" | sed -e "s/build_version: //g;s/'//g")
+    export BF2_BOOT_ARGS BF3_BOOT_ARGS BF2_GRUB_CFG BF3_GRUB_CFG INSTALLER_PAYLOAD FILESYSTEM_DOCKERFS DOCKERFS_DIR FILESYSTEM_SQUASHFS KERNEL_VERSION SECURE_UPGRADE_MODE SIGNING_KEY SIGNING_CERT
+
+    INITRD=$CDIR/$FILESYSTEM_ROOT/boot/initrd.img-$KERNEL_VERSION
+    VMLINUZ=$CDIR/$FILESYSTEM_ROOT/boot/vmlinuz-$KERNEL_VERSION
+    MODULES_DIR=$CDIR/$FILESYSTEM_ROOT/lib/modules/$KERNEL_VERSION
+    WATCHDOG=$MODULES_DIR/kernel/drivers/watchdog/sbsa_gwdt.ko
+    BOOTCTL_DRIVER=$CHROOT_DIR/usr/lib/modules/$KERNEL_VERSION/extra/mlx-bootctl.ko
+    TMFIFO_DRIVER=$CHROOT_DIR/usr/lib/modules/$KERNEL_VERSION/extra/mlxbf-tmfifo.ko
+    SDHCI_OF_DWCMSHC_DRIVER=$CHROOT_DIR/usr/lib/modules/$KERNEL_VERSION/extra/sdhci-of-dwcmshc.ko
+
+    validate_config
+
+    create_workdir
+    echo "Work directory: $WDIR"
+
+    create_bfb_image
+}
+
+main $@
diff --git a/platform/nvidia-bluefield/installer/install.sh.j2 b/platform/nvidia-bluefield/installer/install.sh.j2
new file mode 100755
index 000000000..e8167f4ab
--- /dev/null
+++ b/platform/nvidia-bluefield/installer/install.sh.j2
@@ -0,0 +1,390 @@
+#
+# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+#!/bin/bash
+
+# This script will run after being booted into a installer kernel 
+# This will setup the disk, grub etc for the actual SONiC to boot from
+
+# NOTE: Replace these flag at build time
+IMAGE_VERSION="{{IMAGE_VERSION}}"
+INSTALLER_PAYLOAD="{{INSTALLER_PAYLOAD}}"
+FILESYSTEM_DOCKERFS="{{FILESYSTEM_DOCKERFS}}"
+DOCKERFS_DIR="{{DOCKERFS_DIR}}"
+FILESYSTEM_SQUASHFS="{{FILESYSTEM_SQUASHFS}}"
+KERNEL_VERSION="{{KERNEL_VERSION}}"
+BF2_GRUB_CFG="{{BF2_GRUB_CFG}}"
+BF3_GRUB_CFG="{{BF3_GRUB_CFG}}"
+
+image_dir="image-$IMAGE_VERSION"
+demo_volume_revision_label="SONiC-OS-${IMAGE_VERSION}"
+
+PATH="/usr/local/sbin:/usr/local/bin:/sbin:/bin:/usr/sbin:/usr/bin:/opt/mellanox/scripts"
+CHROOT_PATH="/usr/local/sbin:/usr/local/bin:/usr/sbin:/usr/bin:/sbin:/bin"
+
+rshimlog=`which bfrshlog 2> /dev/null`
+distro="SONiC"
+
+device_nvmv=/dev/nvme0n1
+device_emmc=/dev/mmcblk0
+
+capsule=/lib/firmware/mellanox/boot/capsule/boot_update2.cap
+
+rshim_log()
+{
+	# Write a message to rshim. Rshim can handle only a limited number of bites.
+	# It should be used only for critical messages.
+	echo "INFO: $*"
+	if [ -n "$rshimlog" ]; then
+		$rshimlog "INFO: $*"
+	fi
+}
+
+log()
+{
+	# Write message to serial concole
+	if [ -e /dev/ttyAMA0 ]; then
+		echo "INFO: $*" > /dev/ttyAMA0
+	fi
+}
+
+function_exists()
+{
+	declare -f -F "$1" > /dev/null
+	return $?
+}
+
+#
+# Check auto configuration passed from boot-fifo
+#
+
+boot_fifo_path="/sys/bus/platform/devices/MLNXBF04:00/bootfifo"
+if [ -e "${boot_fifo_path}" ]; then
+	cfg_file=$(mktemp)
+	# Get 16KB assuming it's big enough to hold the config file.
+	dd if=${boot_fifo_path} of=${cfg_file} bs=4096 count=4
+
+	#
+	# Check the .xz signature {0xFD, '7', 'z', 'X', 'Z', 0x00} and extract the
+	# config file from it. Then start decompression in the background.
+	#
+	offset=$(strings -a -t d ${cfg_file} | grep -m 1 "7zXZ" | awk '{print $1}')
+	if [ -s "${cfg_file}" -a ."${offset}" != ."1" ]; then
+		log "Found bf.cfg"
+		cat ${cfg_file} | tr -d '\0' > /etc/bf.cfg
+	fi
+	rm -f $cfg_file
+fi
+
+if [ -e /etc/bf.cfg ]; then
+	. /etc/bf.cfg
+fi
+
+ex() {
+    echo "Executing command: $@" > /dev/ttyAMA0
+
+    local rc=0
+    $@ 2>&1 > /dev/ttyAMA0
+    rc=$?
+
+    if [[ $rc -ne 0 ]]; then
+        echo "RC: $rc" > /dev/ttyAMA0
+    fi
+}
+
+if (lspci -n -d 15b3: | grep -wq 'a2dc'); then
+	module=BF3
+	if [[ $DHCP_CLASS_ID != "" ]]; then
+		DHCP_CLASS_ID="BF3Client"
+	fi
+else
+	module=BF2
+	if [[ $DHCP_CLASS_ID != "" ]]; then
+		DHCP_CLASS_ID="BF2Client"
+	fi
+fi
+
+log "$distro installation started on $module module"
+
+default_device_label="SONiC-OS"
+
+device_label=${device_label:-$default_device_label}
+
+if [[ $module == "BF3" ]]; then
+	default_device=$device_nvmv
+	if [[ $(blkid -L $device_label) =~ ${device_emmc} ]] && [[ -b ${device_emmc}p1 ]]; then
+		# Delete EFi boot partition on eMMC device. This is required to migrate to NVME device and boot from NVME correctly
+		sfdisk --force ${device_emmc} --delete 1
+	fi
+else
+	default_device=$device_emmc
+fi
+
+device=${device:-$default_device}
+
+log "Using $device device and $device_label device label"
+
+# We cannot use wait-for-root as it expects the device to contain a
+# known filesystem, which might not be the case here.
+while [ ! -b $device ]; do
+    log "Waiting for $device to be ready"
+    sleep 1
+done
+
+# Flash image
+bs=512
+reserved=34
+boot_size_megs=50
+mega=$((2**20))
+boot_size_bytes=$(($boot_size_megs * $mega))
+
+disk_sectors=`fdisk -l $device | grep "Disk $device:" | awk '{print $7}'`
+disk_end=$((disk_sectors - reserved))
+boot_start=2048
+boot_size=$(($boot_size_bytes/$bs))
+root_start=$((2048 + $boot_size))
+root_end=$disk_end
+root_size=$(($root_end - $root_start + 1))
+
+dd if=/dev/zero of="$device" bs="$bs" count=1
+sfdisk -f "$device" << EOF
+label: gpt
+label-id: A2DF9E70-6329-4679-9C1F-1DAF38AE25AE
+device: ${device}
+unit: sectors
+first-lba: $reserved
+last-lba: $disk_end
+
+${device}p1 : start=$boot_start, size=$boot_size, type=C12A7328-F81F-11D2-BA4B-00A0C93EC93B, uuid=CEAEF8AC-B559-4D83-ACB1-A4F45B26E7F0, name="EFI System", bootable
+${device}p2 : start=$root_start ,size=$root_size, type=0FC63DAF-8483-4772-8E79-3D69D8477DE4, uuid=F093FF4B-CC26-408F-81F5-FF2DD6AE139F, name=$device_label
+EOF
+sync
+
+# Refresh partition table
+ex blockdev --rereadpt ${device}
+
+if function_exists bfb_pre_install; then
+	log "Running bfb_pre_install from bf.cfg"
+	bfb_pre_install
+fi
+
+# Generate some entropy
+ex mke2fs -F ${device}p2
+ex mkdosfs ${device}p1 -n "system-boot"
+ex mkfs.ext4 -F ${device}p2 -L $device_label
+ex fsck.vfat -a ${device}p1
+mkdir -p /mnt
+ex mount -t ext4 ${device}p2 /mnt
+mkdir -p /mnt/boot/efi
+ex mount -t vfat ${device}p1 /mnt/boot/efi
+log "Extracting SONiC files"
+
+mkdir -p /mnt/$image_dir
+
+# Extract the INSTALLER_PAYLOAD to the $image_dir
+export EXTRACT_UNSAFE_SYMLINKS=1
+ex unzip -o /debian/$INSTALLER_PAYLOAD -x $FILESYSTEM_DOCKERFS "platform.tar.gz" -d /mnt/$image_dir
+mkdir -p /mnt/$image_dir/$DOCKERFS_DIR
+unzip -op /debian/$INSTALLER_PAYLOAD "$FILESYSTEM_DOCKERFS" | tar xz --warning=no-timestamp -f - -C /mnt/$image_dir/$DOCKERFS_DIR
+
+mkdir -p /mnt/$image_dir/platform
+unzip -op /debian/$INSTALLER_PAYLOAD "platform.tar.gz" | tar xz --warning=no-timestamp -f - -C /mnt/$image_dir/platform
+
+platform=$(dmidecode -t 4 | grep "Part Number" | awk '{split($NF,a,"-"); print tolower(a[1])}')
+platform=arm64-nvda_bf-$platform
+
+# Copy in the machine.conf file
+cat <<EOF > /mnt/machine.conf
+onie_arch=arm64
+onie_platform=$platform
+EOF
+
+chmod a+r /mnt/machine.conf
+
+sync
+{% if SECURE_UPGRADE_MODE in ['dev', 'prod'] %}
+demo_volume_label="SONiC-OS"
+log "creating demo_volume_label=$demo_volume_label dir under EFI partition to include all boot related modules"
+mkdir -p /mnt/boot/efi/EFI/$demo_volume_label
+
+if [ ! -f /secure-boot/mmaa64.efi ]; then
+   echo "ERROR: /secure-boot/mmaa64.efi file does not exist"
+   exit 1
+fi
+
+if [ ! -f /secure-boot/shimaa64.efi ]; then
+   echo "ERROR: /secure-boot/shimaa64.efi file does not exist"
+   exit 1
+fi
+
+if [ ! -f /secure-boot/grubaa64.efi ]; then
+   echo "ERROR: /secure-boot/grubaa64.efi file does not exist"
+   exit 1
+fi
+
+log "copying signed shim, mm, grub, grub.cfg from /secure-boot to /boot/efi/EFI/$demo_volume_label directory"
+MNT_DIR="/mnt/boot/efi/EFI/$demo_volume_label"
+cp /secure-boot/shimaa64.efi $MNT_DIR
+cp /secure-boot/grubaa64.efi $MNT_DIR
+cp /secure-boot/mmaa64.efi $MNT_DIR
+{% else %}
+log "Installing GRUB"
+{% endif %}
+# Create a minimal grub.cfg that allows for:
+#   - configure the serial console
+#   - allows for grub-reboot to work
+#   - a menu entry for the DEMO OS
+
+grub_cfg=$(mktemp)
+
+# Modify GRUB_CMDLINE_LINUX from bf.cfg file if required
+
+if [[ $module == "BF3" ]]; then
+    DEFAULT_GRUB_CMDLINE_LINUX=$BF3_GRUB_CFG
+else
+    DEFAULT_GRUB_CMDLINE_LINUX=$BF2_GRUB_CFG
+fi
+
+GRUB_CMDLINE_LINUX=${GRUB_CMDLINE_LINUX:-"$DEFAULT_GRUB_CMDLINE_LINUX"}
+export GRUB_CMDLINE_LINUX
+
+# Add a menu entry for the SONiC OS
+# Note: assume that apparmor is supported in the kernel
+demo_grub_entry="$demo_volume_revision_label"
+
+# Find the grub_cfg_root
+uuid=$(blkid ${device}p2 | sed -ne 's/.* UUID=\"\([^"]*\)\".*/\1/p')
+if [ -z "$uuid" ]; then
+	grub_cfg_root=${device}p2
+else
+	grub_cfg_root=UUID=$uuid
+fi
+
+cat <<EOF >> $grub_cfg
+{{GRUB_CFG}}
+EOF
+
+# Copy the grub.cfg onto the boot-directory as specified in the grub-install
+{% if SECURE_UPGRADE_MODE in ['dev', 'prod'] %}
+ex cp $grub_cfg /mnt/boot/efi/EFI/$demo_volume_label/grub.cfg
+ex mkdir -p /mnt/grub
+ex cp $grub_cfg /mnt/grub/grub.cfg
+{% else %}
+ex mkdir -p /mnt/grub
+ex cp $grub_cfg /mnt/grub/grub.cfg
+
+{% endif %}
+sync
+
+log "GRUB CFG Updated"
+
+# Update HW-dependant files
+
+umount /mnt/boot/efi
+umount /mnt
+
+ex blockdev --rereadpt ${device}
+
+ex fsck.vfat -a ${device}p1
+sync
+
+if function_exists bfb_pre_bootmgr_update; then
+    log "Running bfb_pre_bootmgr_update from bf.cfg"
+    bfb_pre_bootmgr_update
+fi
+
+if [ -e ${capsule} ]; then
+    log "Update capsule: ${capsule}"
+    ex bfrec --capsule ${capsule}
+fi
+
+log "Updating EFIBootMgr"
+
+if [ ! -d /sys/firmware/efi/efivars ]; then
+	ex mount -t efivarfs none /sys/firmware/efi/efivars
+fi
+
+# Cleanup boot partition
+ex bfbootmgr --cleanall
+ex rm -f /sys/firmware/efi/efivars/Boot*
+ex rm -f /sys/firmware/efi/efivars/dump-*
+
+# If any of the following commands fail or the image is not booting after the installation check if efivars driver is available and loaded
+if [[ $(which grub-install) != "" ]]; then
+	log "Installing grub with grub-install utility"
+
+	ex mount ${device}p2 /mnt/
+	ex mount ${device}p1 /mnt/boot/efi/
+	ex grub-install ${device}p1 --bootloader-id=$device_label --locale-directory=/mnt/usr/share/locale --efi-directory=/mnt/boot/efi/ --boot-directory=/mnt/
+	ex umount /mnt/boot/efi
+	ex umount /mnt
+else
+	log "Updating bootmgr with efibootmgr utility"
+
+	if efibootmgr | grep $device_label; then
+		ex efibootmgr --delete-bootnum  -b "$(efibootmgr | grep $device_label | cut -c 5-8)"
+	fi
+	ex efibootmgr -c -d "$device" -p 1 -L $device_label -l "\EFI\\$device_label\grubaa64.efi"
+fi
+{% if SECURE_UPGRADE_MODE in ['dev', 'prod'] %}
+uefi_part=1
+ex efibootmgr --create \
+    --label "$demo_volume_label" \
+    --disk "$device" --part $uefi_part \
+    --loader "\EFI\$demo_volume_label\shimaa64.efi" || {
+    echo "ERROR: efibootmgr failed to create new boot variable on: $device"
+    exit 1
+}
+echo "uefi_shim: Secure Boot components installed successfully"
+{% endif %}
+BFCFG=`which bfcfg 2> /dev/null`
+if [ -n "$BFCFG" ]; then
+	# Create PXE boot entries
+	# Not adding CX ifaces because presumably they'll not be used for PXE
+	if [ -e /etc/bf.cfg ]; then
+		mv /etc/bf.cfg /etc/bf.cfg.orig
+	fi
+
+	cat > /etc/bf.cfg << EOF
+BOOT0=DISK
+BOOT1=NET-OOB-IPV4
+BOOT2=NET-OOB-IPV6
+BOOT3=NET-RSHIM-IPV4
+BOOT4=NET-RSHIM-IPV6
+PXE_DHCP_CLASS_ID=$DHCP_CLASS_ID
+EOF
+
+	ex $BFCFG
+
+	# Restore the original bf.cfg
+	/bin/rm -f /etc/bf.cfg
+	if [ -e /etc/bf.cfg.orig ]; then
+		mv /etc/bf.cfg.orig /etc/bf.cfg
+	fi
+fi
+
+if [ -n "$BFCFG" ]; then
+	ex $BFCFG
+fi
+
+if function_exists bfb_post_install; then
+	ex bfb_post_install
+fi
+
+rshim_log "Installation finished"
+rshim_log "Rebooting..."
+# Wait for these messages to be pulled by the rshim service
+sleep 3
diff --git a/platform/nvidia-bluefield/installer/sonic-grub.cfg b/platform/nvidia-bluefield/installer/sonic-grub.cfg
new file mode 100644
index 000000000..59b037b5a
--- /dev/null
+++ b/platform/nvidia-bluefield/installer/sonic-grub.cfg
@@ -0,0 +1,27 @@
+set timeout=5
+
+if [ -s \$prefix/grubenv ]; then
+    load_env
+fi
+if [ "\${saved_entry}" ]; then
+    set default="\${saved_entry}"
+fi
+if [ "\${next_entry}" ]; then
+    set default="\${next_entry}"
+    unset next_entry
+    save_env next_entry
+fi
+
+menuentry '$demo_grub_entry' {
+        insmod gzio
+        insmod part_gpt
+        insmod ext2
+        search --no-floppy --label --set=root $device_label
+        if [ x$grub_platform = xxen ]; then insmod xzio; insmod lzopio; fi
+        echo 'Loading SONiC-OS Kernel'
+        linux   /$image_dir/boot/vmlinuz-$KERNEL_VERSION root=$grub_cfg_root rw $GRUB_CMDLINE_LINUX fixrtc \
+                loop=$image_dir/$FILESYSTEM_SQUASHFS loopfstype=squashfs systemd.unified_cgroup_hierarchy=0 \
+                apparmor=1 security=apparmor varlog_size=4096 systemd.unified_cgroup_hierarchy=0
+        echo    'Loading SONiC-OS initial ramdisk ...'
+        initrd  /$image_dir/boot/initrd.img-$KERNEL_VERSION
+}
diff --git a/platform/nvidia-bluefield/recipes/installer-image.dep b/platform/nvidia-bluefield/recipes/installer-image.dep
index 74214c648..43a4d4e1f 100644
--- a/platform/nvidia-bluefield/recipes/installer-image.dep
+++ b/platform/nvidia-bluefield/recipes/installer-image.dep
@@ -1,5 +1,4 @@
 # DPKG FRK
 
-(SONIC_BF_IMAGE_PXE)_CACHE_MODE := none
 (SONIC_BF_IMAGE_BIN)_CACHE_MODE := none
 (SONIC_BF_IMAGE_BFB)_CACHE_MODE := none
diff --git a/platform/nvidia-bluefield/recipes/installer-image.mk b/platform/nvidia-bluefield/recipes/installer-image.mk
index e87fcb03d..08592bcd3 100644
--- a/platform/nvidia-bluefield/recipes/installer-image.mk
+++ b/platform/nvidia-bluefield/recipes/installer-image.mk
@@ -58,17 +58,6 @@ $(foreach feature, $(DISABLED_FEATURE_FLAGS), $(eval override $(feature)=n ))
 $(SONIC_BF_IMAGE_BASE)_DOCKERS = $(filter-out $(DISABLED_DOCKERS), $(SONIC_INSTALL_DOCKER_IMAGES))
 $(SONIC_BF_IMAGE_BASE)_FILES = $(BF_FW_FILES)
 
-# A compressed archive which contains individual files required for PXE boot
-# A BFB image is also generated as a by-product of PXE image generation
-SONIC_BF_IMAGE_PXE = $(SONIC_BF_IMAGE_BASE).tar.gz
-$(SONIC_BF_IMAGE_PXE)_IMAGE_TYPE = pxe
-$(SONIC_BF_IMAGE_PXE)_MACHINE = $($(SONIC_BF_IMAGE_BASE)_MACHINE)
-$(SONIC_BF_IMAGE_PXE)_INSTALLS += $($(SONIC_BF_IMAGE_BASE)_INSTALLS)
-$(SONIC_BF_IMAGE_PXE)_DEPENDS += $($(SONIC_BF_IMAGE_BASE)_DEPENDS)
-$(SONIC_BF_IMAGE_PXE)_DOCKERS += $($(SONIC_BF_IMAGE_BASE)_DOCKERS)
-$(SONIC_BF_IMAGE_PXE)_LAZY_INSTALLS += $($(SONIC_BF_IMAGE_BASE)_LAZY_INSTALLS)
-$(SONIC_BF_IMAGE_PXE)_FILES += $($(SONIC_BF_IMAGE_BASE)_FILES)
-
 # The traditional *.bin image. Works for sonic-sonic upgrade.
 SONIC_BF_IMAGE_BIN = $(SONIC_BF_IMAGE_BASE).bin
 $(SONIC_BF_IMAGE_BIN)_IMAGE_TYPE = onie
@@ -89,4 +78,4 @@ $(SONIC_BF_IMAGE_BFB)_DOCKERS += $($(SONIC_BF_IMAGE_BASE)_DOCKERS)
 $(SONIC_BF_IMAGE_BFB)_LAZY_INSTALLS += $($(SONIC_BF_IMAGE_BASE)_LAZY_INSTALLS)
 $(SONIC_BF_IMAGE_BFB)_FILES += $($(SONIC_BF_IMAGE_BASE)_FILES)
 
-SONIC_INSTALLERS += $(SONIC_BF_IMAGE_PXE) $(SONIC_BF_IMAGE_BIN) $(SONIC_BF_IMAGE_BFB)
+SONIC_INSTALLERS += $(SONIC_BF_IMAGE_BIN) $(SONIC_BF_IMAGE_BFB)

From b87521d59ff6c81470c851d5ccc90a5f4c6a7fc2 Mon Sep 17 00:00:00 2001
From: Yakiv Huryk <62013282+Yakiv-Huryk@users.noreply.github.com>
Date: Thu, 11 Jul 2024 20:22:14 +0300
Subject: [PATCH 0808/1115] [nvidia-bluefield] add arm64-nvda_bf-bf3comdpu
 platform (#19408)

- Why I did it
To add support for the arm64-nvda_bf-bf3comdpu platform

- How I did it
Added arm64-nvda_bf-bf3comdpu directory to the devices

Signed-off-by: Yakiv Huryk <yhuryk@nvidia.com>
---
 .../Nvidia-bf3-com-dpu/hwsku.json             |  9 ++++
 .../Nvidia-bf3-com-dpu/port_config.ini        | 18 +++++++
 .../Nvidia-bf3-com-dpu/sai.profile            |  5 ++
 .../arm64-nvda_bf-bf3comdpu/default_sku       |  1 +
 .../arm64-nvda_bf-bf3comdpu/installer.conf    |  2 +
 .../arm64-nvda_bf-bf3comdpu/pcie.yaml         | 47 +++++++++++++++++++
 .../arm64-nvda_bf-bf3comdpu/platform.json     | 21 +++++++++
 .../arm64-nvda_bf-bf3comdpu/platform_asic     |  1 +
 .../plugins/ssd_util.py                       | 10 ++++
 .../pmon_daemon_control.json                  |  7 +++
 .../system_health_monitoring_config.json      |  6 +++
 11 files changed, 127 insertions(+)
 create mode 100644 device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/Nvidia-bf3-com-dpu/hwsku.json
 create mode 100644 device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/Nvidia-bf3-com-dpu/port_config.ini
 create mode 100644 device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/Nvidia-bf3-com-dpu/sai.profile
 create mode 100644 device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/default_sku
 create mode 100644 device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/installer.conf
 create mode 100644 device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/pcie.yaml
 create mode 100644 device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/platform.json
 create mode 100644 device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/platform_asic
 create mode 100644 device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/plugins/ssd_util.py
 create mode 100644 device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/pmon_daemon_control.json
 create mode 100644 device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/system_health_monitoring_config.json

diff --git a/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/Nvidia-bf3-com-dpu/hwsku.json b/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/Nvidia-bf3-com-dpu/hwsku.json
new file mode 100644
index 000000000..a0f9dda6b
--- /dev/null
+++ b/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/Nvidia-bf3-com-dpu/hwsku.json
@@ -0,0 +1,9 @@
+{
+    "interfaces": {
+        "Ethernet0": {
+            "default_brkout_mode": "1x400G",
+            "autoneg": "on",
+            "role": "Dpc"
+        }
+    }
+}
diff --git a/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/Nvidia-bf3-com-dpu/port_config.ini b/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/Nvidia-bf3-com-dpu/port_config.ini
new file mode 100644
index 000000000..6cfe733cb
--- /dev/null
+++ b/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/Nvidia-bf3-com-dpu/port_config.ini
@@ -0,0 +1,18 @@
+##
+## Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+## Apache-2.0
+##
+## Licensed under the Apache License, Version 2.0 (the "License");
+## you may not use this file except in compliance with the License.
+## You may obtain a copy of the License at
+##
+## http://www.apache.org/licenses/LICENSE-2.0
+##
+## Unless required by applicable law or agreed to in writing, software
+## distributed under the License is distributed on an "AS IS" BASIS,
+## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+## See the License for the specific language governing permissions and
+## limitations under the License.
+##
+# name          lanes               alias     index
+Ethernet0       0,1,2,3             etp1      1
diff --git a/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/Nvidia-bf3-com-dpu/sai.profile b/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/Nvidia-bf3-com-dpu/sai.profile
new file mode 100644
index 000000000..d86d58acb
--- /dev/null
+++ b/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/Nvidia-bf3-com-dpu/sai.profile
@@ -0,0 +1,5 @@
+SAI_DUMP_STORE_PATH=/var/log/bluefield/sdk-dumps
+SAI_DUMP_STORE_AMOUNT=10
+DASH_ACL_DEFAULT_RULE_ACTION=permit
+PORT_LAYOUT=1x400G
+HAIRPIN=false
diff --git a/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/default_sku b/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/default_sku
new file mode 100644
index 000000000..41bda2fe9
--- /dev/null
+++ b/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/default_sku
@@ -0,0 +1 @@
+Nvidia-bf3-com-dpu appliance
diff --git a/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/installer.conf b/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/installer.conf
new file mode 100644
index 000000000..66c2a99a3
--- /dev/null
+++ b/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/installer.conf
@@ -0,0 +1,2 @@
+GRUB_CMDLINE_LINUX="console=ttyAMA1 console=hvc0 console=ttyAMA0 earlycon=pl011,0x13010000 quiet"
+ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="isolcpus=1-13 nohz_full=1-13 rcu_nocbs=1-13"
diff --git a/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/pcie.yaml b/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/pcie.yaml
new file mode 100644
index 000000000..bb2a783fe
--- /dev/null
+++ b/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/pcie.yaml
@@ -0,0 +1,47 @@
+- bus: '00'
+  dev: '00'
+  fn: '0'
+  id: a2da
+  name: 'PCI bridge: Mellanox Technologies MT43244 BlueField-3 SoC Crypto enabled
+    (rev 01)'
+- bus: '01'
+  dev: '00'
+  fn: '0'
+  id: 197b
+  name: 'PCI bridge: Mellanox Technologies MT43244 Family [BlueField-3 SoC PCIe Bridge]
+    (rev 01)'
+- bus: '02'
+  dev: '00'
+  fn: '0'
+  id: 197b
+  name: 'PCI bridge: Mellanox Technologies MT43244 Family [BlueField-3 SoC PCIe Bridge]
+    (rev 01)'
+- bus: '02'
+  dev: '03'
+  fn: '0'
+  id: 197b
+  name: 'PCI bridge: Mellanox Technologies MT43244 Family [BlueField-3 SoC PCIe Bridge]
+    (rev 01)'
+- bus: '03'
+  dev: '00'
+  fn: '0'
+  id: a2dc
+  name: 'Ethernet controller: Mellanox Technologies MT43244 BlueField-3 integrated
+    ConnectX-7 network controller (rev 01)'
+- bus: '04'
+  dev: '00'
+  fn: '0'
+  id: 197b
+  name: 'PCI bridge: Mellanox Technologies MT43244 Family [BlueField-3 SoC PCIe Bridge]
+    (rev 01)'
+- bus: '05'
+  dev: '00'
+  fn: '0'
+  id: 197b
+  name: 'PCI bridge: Mellanox Technologies MT43244 Family [BlueField-3 SoC PCIe Bridge]
+    (rev 01)'
+- bus: '06'
+  dev: '00'
+  fn: '0'
+  id: '5765'
+  name: 'Non-Volatile memory controller: Device 1f9f:5765 (rev 01)'
diff --git a/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/platform.json b/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/platform.json
new file mode 100644
index 000000000..b50809fd4
--- /dev/null
+++ b/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/platform.json
@@ -0,0 +1,21 @@
+{
+    "chassis": {
+        "name": "Nvidia-bf3-com-dpu",
+        "components": [],
+        "fans": [],
+        "fan_drawers": [],
+        "psus": [],
+        "thermals": [],
+        "sfps": []
+    },
+    "interfaces": {
+        "Ethernet0": {
+            "index": "1,1,1,1",
+            "lanes": "0,1,2,3",
+            "breakout_modes": {
+                "1x400G": ["etp1"]
+            }
+        }
+    },
+    "DPU": {}
+}
diff --git a/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/platform_asic b/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/platform_asic
new file mode 100644
index 000000000..ce453ec80
--- /dev/null
+++ b/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/platform_asic
@@ -0,0 +1 @@
+nvidia-bluefield
diff --git a/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/plugins/ssd_util.py b/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/plugins/ssd_util.py
new file mode 100644
index 000000000..22a6f3eca
--- /dev/null
+++ b/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/plugins/ssd_util.py
@@ -0,0 +1,10 @@
+
+import os
+
+from sonic_platform_base.sonic_storage.emmc import EmmcUtil
+from sonic_platform_base.sonic_storage.ssd import SsdUtil as SsdUtilDefault
+
+def SsdUtil(diskdev):
+   if os.path.basename(diskdev).startswith('mmcblk'):
+      return EmmcUtil(diskdev)
+   return SsdUtilDefault(diskdev)
diff --git a/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/pmon_daemon_control.json b/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/pmon_daemon_control.json
new file mode 100644
index 000000000..86f807221
--- /dev/null
+++ b/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/pmon_daemon_control.json
@@ -0,0 +1,7 @@
+{
+    "skip_ledd": true,
+    "skip_psud": true,
+    "skip_fancontrol": true,
+    "skip_chassisd": true,
+    "skip_ycabled": true
+}
diff --git a/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/system_health_monitoring_config.json b/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/system_health_monitoring_config.json
new file mode 100644
index 000000000..fff1c7ca7
--- /dev/null
+++ b/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/system_health_monitoring_config.json
@@ -0,0 +1,6 @@
+{
+    "services_to_ignore": [],
+    "devices_to_ignore": ["psu", "fan"],
+    "user_defined_checkers": [],
+    "polling_interval": 60
+}

From 990a72546e9dc8db0c846b2b515aa1cb768a146b Mon Sep 17 00:00:00 2001
From: Saikrishna Arcot <sarcot@microsoft.com>
Date: Thu, 11 Jul 2024 16:14:58 -0700
Subject: [PATCH 0809/1115] Enable iburst option for NTP servers loaded from
 minigraph (#19424)

Why I did it
In #15058, the NTP server configuration was modified to add additional options, such as conditionally enabling iburst, specifying the association type, and specifying the NTP version. One side effect of this was that the iburst option which was previously always enabled now requires it to be explicitly enabled in the config_db.

Fixes #19425.

How I did it
To restore the old behavior, when loading from minigraph, add "iburst": "true" for each NTP server loaded from minigraph.

How to verify it
Tested on a KVM setup, verified that the generated ntp.conf file had the iburst option.

Signed-off-by: Saikrishna Arcot <sarcot@microsoft.com>
---
 src/sonic-config-engine/minigraph.py                  | 2 +-
 src/sonic-config-engine/tests/test_cfggen.py          | 2 +-
 src/sonic-config-engine/tests/test_chassis_cfggen.py  | 8 ++++----
 src/sonic-config-engine/tests/test_minigraph_case.py  | 2 +-
 src/sonic-config-engine/tests/test_multinpu_cfggen.py | 2 +-
 5 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/src/sonic-config-engine/minigraph.py b/src/sonic-config-engine/minigraph.py
index b2e87aa05..ca34726d5 100644
--- a/src/sonic-config-engine/minigraph.py
+++ b/src/sonic-config-engine/minigraph.py
@@ -2612,7 +2612,7 @@ def parse_xml(filename, platform=None, port_config_file=None, asic_name=None, hw
         results['SYSLOG_SERVER'] = dict((item, {}) for item in syslog_servers)
         results['DHCP_SERVER'] = dict((item, {}) for item in dhcp_servers)
         results['DHCP_RELAY'] = dhcp_relay_table
-        results['NTP_SERVER'] = dict((item, {}) for item in ntp_servers)
+        results['NTP_SERVER'] = dict((item, {'iburst': 'on'}) for item in ntp_servers)
         # Set default DNS nameserver from dns.j2
         results['DNS_NAMESERVER'] = {}
         if os.environ.get("CFGGEN_UNIT_TESTING", "0") == "2":
diff --git a/src/sonic-config-engine/tests/test_cfggen.py b/src/sonic-config-engine/tests/test_cfggen.py
index 6126522bb..19e0af5cd 100644
--- a/src/sonic-config-engine/tests/test_cfggen.py
+++ b/src/sonic-config-engine/tests/test_cfggen.py
@@ -696,7 +696,7 @@ def test_metadata_tacacs(self):
     def test_metadata_ntp(self):
         argument = ['-m', self.sample_graph_metadata, '-p', self.port_config, '-v', "NTP_SERVER"]
         output = self.run_script(argument)
-        self.assertEqual(utils.to_dict(output.strip()), utils.to_dict("{'10.0.10.1': {}, '10.0.10.2': {}}"))
+        self.assertEqual(utils.to_dict(output.strip()), utils.to_dict("{'10.0.10.1': {'iburst': 'on'}, '10.0.10.2': {'iburst': 'on'}}"))
 
     def test_dns_nameserver(self):
         argument = ['-m', self.sample_graph_metadata, '-p', self.port_config, '-v', "DNS_NAMESERVER"]
diff --git a/src/sonic-config-engine/tests/test_chassis_cfggen.py b/src/sonic-config-engine/tests/test_chassis_cfggen.py
index a2be6ed6b..c5f1e148e 100644
--- a/src/sonic-config-engine/tests/test_chassis_cfggen.py
+++ b/src/sonic-config-engine/tests/test_chassis_cfggen.py
@@ -104,7 +104,7 @@ def test_ntp(self):
         argument = ['-m', self.sample_graph, '-p',
                     self.sample_port_config, '--var-json', 'NTP_SERVER']
         output = json.loads(self.run_script(argument))
-        self.assertDictEqual(output, {'17.39.1.130': {}, '17.39.1.129': {}})
+        self.assertDictEqual(output, {'17.39.1.130': {'iburst': 'on'}, '17.39.1.129': {'iburst': 'on'}})
         # NTP data is present only in the host config
         argument = ['-m', self.sample_graph, '--var-json', 'NTP_SERVER']
 
@@ -416,7 +416,7 @@ def test_ntp(self):
         argument = ['-m', self.sample_graph, '-p',
                     self.sample_port_config, '--var-json', 'NTP_SERVER']
         output = json.loads(self.run_script(argument))
-        self.assertDictEqual(output, {'17.39.1.130': {}, '17.39.1.129': {}})
+        self.assertDictEqual(output, {'17.39.1.130': {'iburst': 'on'}, '17.39.1.129': {'iburst': 'on'}})
         # NTP data is present only in the host config
         argument = ['-m', self.sample_graph, '--var-json', 'NTP_SERVER']
 
@@ -884,7 +884,7 @@ def test_ntp(self):
             '--var-json', 'NTP_SERVER'
         ]
         output = json.loads(self.run_script(argument))
-        self.assertDictEqual(output, {'17.39.1.130': {}, '17.39.1.129': {}})
+        self.assertDictEqual(output, {'17.39.1.130': {'iburst': 'on'}, '17.39.1.129': {'iburst': 'on'}})
 
 
     def test_mgmt_port(self):
@@ -1019,7 +1019,7 @@ def test_ntp(self):
             '--var-json', 'NTP_SERVER'
         ]
         output = json.loads(self.run_script(argument))
-        self.assertDictEqual(output, {'17.39.1.130': {}, '17.39.1.129': {}})
+        self.assertDictEqual(output, {'17.39.1.130': {'iburst': 'on'}, '17.39.1.129': {'iburst': 'on'}})
         # NTP data is present only in the host config
         argument = ['-m', self.sample_graph, '--var-json', 'NTP_SERVER']
 
diff --git a/src/sonic-config-engine/tests/test_minigraph_case.py b/src/sonic-config-engine/tests/test_minigraph_case.py
index a5578b841..9e19fbdae 100644
--- a/src/sonic-config-engine/tests/test_minigraph_case.py
+++ b/src/sonic-config-engine/tests/test_minigraph_case.py
@@ -283,7 +283,7 @@ def test_minigraph_mgmt_port(self):
     def test_metadata_ntp(self):
         argument = ['-m', self.sample_graph, '-p', self.port_config, '-v', "NTP_SERVER"]
         output = self.run_script(argument)
-        self.assertEqual(output.strip(), "{'10.0.10.1': {}, '10.0.10.2': {}}")
+        self.assertEqual(output.strip(), "{'10.0.10.1': {'iburst': 'on'}, '10.0.10.2': {'iburst': 'on'}}")
 
     def test_minigraph_vnet(self):
         argument = ['-m', self.sample_graph, '-p', self.port_config, '-v', "VNET"]
diff --git a/src/sonic-config-engine/tests/test_multinpu_cfggen.py b/src/sonic-config-engine/tests/test_multinpu_cfggen.py
index bba0adeae..5f7646f48 100644
--- a/src/sonic-config-engine/tests/test_multinpu_cfggen.py
+++ b/src/sonic-config-engine/tests/test_multinpu_cfggen.py
@@ -151,7 +151,7 @@ def test_metadata_tacacs(self):
     def test_metadata_ntp(self):
         argument = ['-m', self.sample_graph, '-p', self.sample_port_config, '--var-json', "NTP_SERVER"]
         output = json.loads(self.run_script(argument))
-        self.assertDictEqual(output, {'17.39.1.130': {}, '17.39.1.129': {}})
+        self.assertDictEqual(output, {'17.39.1.130': {'iburst': 'on'}, '17.39.1.129': {'iburst': 'on'}})
         #NTP data is present only in the host config
         argument = ['-m', self.sample_graph, '--var-json', "NTP_SERVER"]
         for asic in range(NUM_ASIC):

From ecb1d1e82ed0ed778e9d03e1ec5cb38a1ad5f08c Mon Sep 17 00:00:00 2001
From: fountzou <169114916+fountzou@users.noreply.github.com>
Date: Fri, 12 Jul 2024 04:09:58 +0300
Subject: [PATCH 0810/1115] Reliable TSA: Addressing review comments to use
 SpineRouter in checks instead of 'voq' and fix few echo msgs. (#19527)

use 'SpineRouter' in checks instead of 'voq' and fix few echo msgs.

Signed-off-by: fountzou <ioannis.fountzoulas@nokia.com>
---
 dockers/docker-fpm-frr/base_image_files/TS  | 4 ++--
 dockers/docker-fpm-frr/base_image_files/TSA | 2 +-
 dockers/docker-fpm-frr/base_image_files/TSB | 2 +-
 3 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/dockers/docker-fpm-frr/base_image_files/TS b/dockers/docker-fpm-frr/base_image_files/TS
index 0084bd5f2..fb1c077cb 100755
--- a/dockers/docker-fpm-frr/base_image_files/TS
+++ b/dockers/docker-fpm-frr/base_image_files/TS
@@ -4,10 +4,10 @@
 [ -f /etc/sonic/sonic-environment ] && . /etc/sonic/sonic-environment
 
 PLATFORM=${PLATFORM:-`sonic-cfggen -H -v DEVICE_METADATA.localhost.platform`}
-switch_type=`sonic-db-cli CONFIG_DB hget 'DEVICE_METADATA|localhost' 'switch_type'`
+type=`sonic-db-cli CONFIG_DB hget 'DEVICE_METADATA|localhost' 'type'`
 TSA_CHASSIS_STATE=false
 
-if [[ $switch_type == 'voq' ]]; then
+if [[ $type == *"SpineRouter"* ]]; then
  TSA_CHASSIS_STATE="$(sonic-db-cli CHASSIS_APP_DB HGET "BGP_DEVICE_GLOBAL|STATE" tsa_enabled)"
 fi
 
diff --git a/dockers/docker-fpm-frr/base_image_files/TSA b/dockers/docker-fpm-frr/base_image_files/TSA
index 2cd29e92a..beeb86819 100755
--- a/dockers/docker-fpm-frr/base_image_files/TSA
+++ b/dockers/docker-fpm-frr/base_image_files/TSA
@@ -19,7 +19,7 @@ if [ -f /etc/sonic/chassisdb.conf ]; then
     echo "Chassis Mode: Normal -> Maintenance"
     logger -t TSA -p user.info "Chassis Mode: Normal -> Maintenance"
   fi
-  echo "Please execute \"rexec all -c 'sudo config save -y'\" to preserve System mode in Maintenance after reboot\
+  echo "Please execute 'sudo config save' to preserve System mode in Maintenance after reboot\
   or config reload on all linecards"
   exit 0
 fi
diff --git a/dockers/docker-fpm-frr/base_image_files/TSB b/dockers/docker-fpm-frr/base_image_files/TSB
index c09126e1d..36c69843b 100755
--- a/dockers/docker-fpm-frr/base_image_files/TSB
+++ b/dockers/docker-fpm-frr/base_image_files/TSB
@@ -19,7 +19,7 @@ if [ -f /etc/sonic/chassisdb.conf ]; then
     echo "Chassis Mode: Maintenance -> Normal"
     logger -t TSB -p user.info "Chassis Mode: Maintenance -> Normal"
   fi
-  echo "Please execute \"rexec all -c 'sudo config save -y'\" to preserve System mode in Normal state after reboot\
+  echo "Please execute 'sudo config save' to preserve System mode in Normal state after reboot\
   or config reload on all linecards"
   exit 0
 fi

From 287500285cde1d6276a80651241f64a3a725bee9 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Fri, 12 Jul 2024 10:01:29 +0800
Subject: [PATCH 0811/1115] [submodule] Update submodule sonic-host-services to
 the latest HEAD automatically (#19415)

#### Why I did it
src/sonic-host-services
```
* 02d9b55 - (HEAD -> master, origin/master, origin/HEAD) Added support to render template format of `delayed` flag on Feature Table. (#135) (28 hours ago) [abdosi]
* 60fdfea - Fixed determine/process reboot-cause service dependency (#17406) (#132) (13 days ago) [anamehra]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-host-services | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-host-services b/src/sonic-host-services
index 37c24a935..02d9b55c2 160000
--- a/src/sonic-host-services
+++ b/src/sonic-host-services
@@ -1 +1 @@
-Subproject commit 37c24a9354200e147ed2aaf3dccb11d65d4f24ec
+Subproject commit 02d9b55c29394510cdab9725bbbdbf3e9ae2cadf

From a5aee14653c200b66fca8b7c4c55feb126176048 Mon Sep 17 00:00:00 2001
From: Yutong Zhang <90831468+yutongzhang-microsoft@users.noreply.github.com>
Date: Fri, 12 Jul 2024 10:03:22 +0800
Subject: [PATCH 0812/1115] Add onboarding dualtor PR checker (#19503)

In this PR, we add a new PR checker called onboarding dualtor. This new PR checker is for onboarding dualtor speific test scripts.
---
 azure-pipelines.yml | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

diff --git a/azure-pipelines.yml b/azure-pipelines.yml
index 966ebc551..b72aa967c 100644
--- a/azure-pipelines.yml
+++ b/azure-pipelines.yml
@@ -295,6 +295,23 @@ stages:
           MGMT_BRANCH: $(BUILD_BRANCH)
           TEST_SET: onboarding_t1
 
+  - job: onboarding_elastictest_dualtor
+    displayName: "onboarding dualtor testcases by Elastictest - optional"
+    timeoutInMinutes: 240
+    continueOnError: true
+    pool: sonic-ubuntu-1c
+    steps:
+      - template: .azure-pipelines/run-test-elastictest-template.yml@sonic-mgmt
+        parameters:
+          TOPOLOGY: dualtor
+          STOP_ON_FAILURE: "False"
+          RETRY_TIMES: 0
+          MIN_WORKER: $(T0_DUALTOR_INSTANCE_NUM)
+          MAX_WORKER: $(T0_DUALTOR_INSTANCE_NUM)
+          KVM_IMAGE_BRANCH: $(BUILD_BRANCH)
+          MGMT_BRANCH: $(BUILD_BRANCH)
+          TEST_SET: onboarding_dualtor
+
 #  - job: wan_elastictest
 #    displayName: "kvmtest-wan by Elastictest"
 #    pool: sonic-ubuntu-1c

From 4397a85564f0991339536a7ce15dd00743df999b Mon Sep 17 00:00:00 2001
From: Stepan Blyshchak <38952541+stepanblyschak@users.noreply.github.com>
Date: Fri, 12 Jul 2024 07:47:44 +0300
Subject: [PATCH 0813/1115] Revert suppress FIB pending feature (#19027)

Why I did it
Revert BGP suppress FIB pending due to unresolved FRR issues in current version

Work item tracking
Microsoft ADO (number only):
How I did it
Revert it

How to verify it
Build and run
---
 .../docker-fpm-frr/frr/bgpd/bgpd.main.conf.j2 |  1 -
 .../frr/supervisord/supervisord.conf.j2       |  2 +-
 .../vs/docker-sonic-vs/supervisord.conf.j2    |  2 +-
 src/sonic-bgpcfgd/bgpcfgd/managers_bgp.py     |  5 ++--
 .../data/sonic-cfggen/bgpd.conf.j2/all.conf   |  1 -
 .../sonic-cfggen/bgpd.main.conf.j2/all.conf   |  1 -
 .../sonic-cfggen/bgpd.main.conf.j2/base.conf  |  1 -
 .../bgpd.main.conf.j2/defaults.conf           |  1 -
 .../bgpd.main.conf.j2/defaults_router_id.conf |  1 -
 .../bgpd.main.conf.j2/ipv6_lo.conf            |  1 -
 .../bgpd.main.conf.j2/lo0_ipv6_only.conf      |  1 -
 .../lo0_ipv6_only_router_id.conf              |  1 -
 .../bgpd.main.conf.j2/packet_chassis.conf     |  1 -
 .../packet_chassis_ipv6_lo4096.conf           |  1 -
 .../packet_chassis_ipv6_lo4096_router_id.conf |  1 -
 .../packet_chassis_router_id.conf             |  1 -
 .../bgpd.main.conf.j2/voq_chassis.conf        |  1 -
 .../data/sonic-cfggen/frr.conf.j2/all.conf    |  1 -
 src/sonic-config-engine/minigraph.py          |  5 ----
 .../tests/sample_output/py2/bgpd_frr.conf     |  1 -
 .../py2/bgpd_frr_backend_asic.conf            |  1 -
 .../sample_output/py2/bgpd_frr_dualtor.conf   |  1 -
 .../py2/bgpd_frr_frontend_asic.conf           |  1 -
 .../tests/sample_output/py2/frr.conf          |  1 -
 .../sample_output/py2/t2-chassis-fe-bgpd.conf |  1 -
 .../tests/sample_output/py3/bgpd_frr.conf     |  1 -
 .../py3/bgpd_frr_backend_asic.conf            |  1 -
 .../sample_output/py3/bgpd_frr_dualtor.conf   |  1 -
 .../py3/bgpd_frr_frontend_asic.conf           |  1 -
 .../tests/sample_output/py3/frr.conf          |  1 -
 .../sample_output/py3/t2-chassis-fe-bgpd.conf |  1 -
 .../tests/device_metadata.json                | 10 -------
 .../tests_config/device_metadata.json         | 30 -------------------
 .../yang-models/sonic-device_metadata.yang    | 12 --------
 34 files changed, 4 insertions(+), 89 deletions(-)

diff --git a/dockers/docker-fpm-frr/frr/bgpd/bgpd.main.conf.j2 b/dockers/docker-fpm-frr/frr/bgpd/bgpd.main.conf.j2
index da6358a00..1b920e7a5 100644
--- a/dockers/docker-fpm-frr/frr/bgpd/bgpd.main.conf.j2
+++ b/dockers/docker-fpm-frr/frr/bgpd/bgpd.main.conf.j2
@@ -70,7 +70,6 @@ router bgp {{ DEVICE_METADATA['localhost']['bgp_asn'] }}
 !
 {% block bgp_init %}
   bgp log-neighbor-changes
-  bgp suppress-fib-pending
   no bgp default ipv4-unicast
   no bgp ebgp-requires-policy
 {% if (DEVICE_METADATA is defined) and ('localhost' in DEVICE_METADATA) and ('subtype' in DEVICE_METADATA['localhost']) and (DEVICE_METADATA['localhost']['subtype'].lower() == 'dualtor') %}
diff --git a/dockers/docker-fpm-frr/frr/supervisord/supervisord.conf.j2 b/dockers/docker-fpm-frr/frr/supervisord/supervisord.conf.j2
index 0b26be8d3..4ee96cf84 100644
--- a/dockers/docker-fpm-frr/frr/supervisord/supervisord.conf.j2
+++ b/dockers/docker-fpm-frr/frr/supervisord/supervisord.conf.j2
@@ -30,7 +30,7 @@ stderr_logfile=syslog
 dependent_startup=true
 
 [program:zebra]
-command=/usr/lib/frr/zebra -A 127.0.0.1 -s 90000000 -M dplane_fpm_nl -M snmp --asic-offload=notify_on_offload
+command=/usr/lib/frr/zebra -A 127.0.0.1 -s 90000000 -M dplane_fpm_nl -M snmp
 priority=4
 autostart=false
 autorestart=false
diff --git a/platform/vs/docker-sonic-vs/supervisord.conf.j2 b/platform/vs/docker-sonic-vs/supervisord.conf.j2
index 5b988a5a5..ae32fe41d 100644
--- a/platform/vs/docker-sonic-vs/supervisord.conf.j2
+++ b/platform/vs/docker-sonic-vs/supervisord.conf.j2
@@ -164,7 +164,7 @@ environment=ASAN_OPTIONS="log_path=/var/log/asan/teammgrd-asan.log{{ asan_extra_
 {% endif %}
 
 [program:zebra]
-command=/usr/lib/frr/zebra -A 127.0.0.1 -s 90000000 -M dplane_fpm_nl --asic-offload=notify_on_offload
+command=/usr/lib/frr/zebra -A 127.0.0.1 -s 90000000 -M dplane_fpm_nl
 priority=13
 autostart=false
 autorestart=false
diff --git a/src/sonic-bgpcfgd/bgpcfgd/managers_bgp.py b/src/sonic-bgpcfgd/bgpcfgd/managers_bgp.py
index 3708b5b30..ce3f60fad 100644
--- a/src/sonic-bgpcfgd/bgpcfgd/managers_bgp.py
+++ b/src/sonic-bgpcfgd/bgpcfgd/managers_bgp.py
@@ -311,11 +311,10 @@ def apply_op(self, cmd, vrf):
         :return: True if no errors, False if there are errors
         """
         bgp_asn = self.directory.get_slot("CONFIG_DB", swsscommon.CFG_DEVICE_METADATA_TABLE_NAME)["localhost"]["bgp_asn"]
-        enable_bgp_suppress_fib_pending_cmd = 'bgp suppress-fib-pending'
         if vrf == 'default':
-            cmd = ('router bgp %s\n %s\n' % (bgp_asn, enable_bgp_suppress_fib_pending_cmd)) + cmd
+            cmd = ('router bgp %s\n' % bgp_asn) + cmd
         else:
-            cmd = ('router bgp %s vrf %s\n %s\n' % (bgp_asn, vrf, enable_bgp_suppress_fib_pending_cmd)) + cmd
+            cmd = ('router bgp %s vrf %s\n' % (bgp_asn, vrf)) + cmd
         self.cfg_mgr.push(cmd)
         return True
 
diff --git a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.conf.j2/all.conf b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.conf.j2/all.conf
index a7f342458..c39115706 100644
--- a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.conf.j2/all.conf
+++ b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.conf.j2/all.conf
@@ -55,7 +55,6 @@ route-map HIDE_INTERNAL permit 20
 router bgp 55555
 !
   bgp log-neighbor-changes
-  bgp suppress-fib-pending
   no bgp default ipv4-unicast
   no bgp ebgp-requires-policy
 !
diff --git a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/all.conf b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/all.conf
index d2dc9e40e..c5ba79d34 100644
--- a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/all.conf
+++ b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/all.conf
@@ -34,7 +34,6 @@ route-map HIDE_INTERNAL permit 10
 router bgp 55555
 !
   bgp log-neighbor-changes
-  bgp suppress-fib-pending
   no bgp default ipv4-unicast
   no bgp ebgp-requires-policy
 !
diff --git a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/base.conf b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/base.conf
index 27d04b953..77cc9d6ff 100644
--- a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/base.conf
+++ b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/base.conf
@@ -12,7 +12,6 @@ ip prefix-list PL_LoopbackV4 permit 55.55.55.55/32
 router bgp 55555
 !
   bgp log-neighbor-changes
-  bgp suppress-fib-pending
   no bgp default ipv4-unicast
   no bgp ebgp-requires-policy
 !
diff --git a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/defaults.conf b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/defaults.conf
index b85dd67a5..00b09bd40 100644
--- a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/defaults.conf
+++ b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/defaults.conf
@@ -34,7 +34,6 @@ route-map HIDE_INTERNAL permit 10
 router bgp 55555
 !
   bgp log-neighbor-changes
-  bgp suppress-fib-pending
   no bgp default ipv4-unicast
   no bgp ebgp-requires-policy
 !
diff --git a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/defaults_router_id.conf b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/defaults_router_id.conf
index 96a30d0ab..c042f00a7 100644
--- a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/defaults_router_id.conf
+++ b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/defaults_router_id.conf
@@ -34,7 +34,6 @@ route-map HIDE_INTERNAL permit 10
 router bgp 55555
 !
   bgp log-neighbor-changes
-  bgp suppress-fib-pending
   no bgp default ipv4-unicast
   no bgp ebgp-requires-policy
 !
diff --git a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/ipv6_lo.conf b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/ipv6_lo.conf
index 5ee5ce544..50414a89a 100644
--- a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/ipv6_lo.conf
+++ b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/ipv6_lo.conf
@@ -14,7 +14,6 @@ ipv6 prefix-list PL_LoopbackV6 permit fc00::1/128
 router bgp 55555
 !
   bgp log-neighbor-changes
-  bgp suppress-fib-pending
   no bgp default ipv4-unicast
   no bgp ebgp-requires-policy
 !
diff --git a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/lo0_ipv6_only.conf b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/lo0_ipv6_only.conf
index b181dbd5e..31e0e66cb 100644
--- a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/lo0_ipv6_only.conf
+++ b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/lo0_ipv6_only.conf
@@ -32,7 +32,6 @@ route-map HIDE_INTERNAL permit 10
 router bgp 55555
 !
   bgp log-neighbor-changes
-  bgp suppress-fib-pending
   no bgp default ipv4-unicast
   no bgp ebgp-requires-policy
 !
diff --git a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/lo0_ipv6_only_router_id.conf b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/lo0_ipv6_only_router_id.conf
index c41fa0cfe..f0526d739 100644
--- a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/lo0_ipv6_only_router_id.conf
+++ b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/lo0_ipv6_only_router_id.conf
@@ -32,7 +32,6 @@ route-map HIDE_INTERNAL permit 10
 router bgp 55555
 !
   bgp log-neighbor-changes
-  bgp suppress-fib-pending
   no bgp default ipv4-unicast
   no bgp ebgp-requires-policy
 !
diff --git a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/packet_chassis.conf b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/packet_chassis.conf
index 6b2e1f257..a949ce6e4 100644
--- a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/packet_chassis.conf
+++ b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/packet_chassis.conf
@@ -34,7 +34,6 @@ route-map HIDE_INTERNAL permit 10
 router bgp 55555
 !
   bgp log-neighbor-changes
-  bgp suppress-fib-pending
   no bgp default ipv4-unicast
   no bgp ebgp-requires-policy
 !
diff --git a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/packet_chassis_ipv6_lo4096.conf b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/packet_chassis_ipv6_lo4096.conf
index 381c5b05a..81c7d0f2b 100644
--- a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/packet_chassis_ipv6_lo4096.conf
+++ b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/packet_chassis_ipv6_lo4096.conf
@@ -34,7 +34,6 @@ route-map HIDE_INTERNAL permit 10
 router bgp 55555
 !
   bgp log-neighbor-changes
-  bgp suppress-fib-pending
   no bgp default ipv4-unicast
   no bgp ebgp-requires-policy
 !
diff --git a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/packet_chassis_ipv6_lo4096_router_id.conf b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/packet_chassis_ipv6_lo4096_router_id.conf
index 213872f45..3acce1ffb 100644
--- a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/packet_chassis_ipv6_lo4096_router_id.conf
+++ b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/packet_chassis_ipv6_lo4096_router_id.conf
@@ -34,7 +34,6 @@ route-map HIDE_INTERNAL permit 10
 router bgp 55555
 !
   bgp log-neighbor-changes
-  bgp suppress-fib-pending
   no bgp default ipv4-unicast
   no bgp ebgp-requires-policy
 !
diff --git a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/packet_chassis_router_id.conf b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/packet_chassis_router_id.conf
index 213872f45..3acce1ffb 100644
--- a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/packet_chassis_router_id.conf
+++ b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/packet_chassis_router_id.conf
@@ -34,7 +34,6 @@ route-map HIDE_INTERNAL permit 10
 router bgp 55555
 !
   bgp log-neighbor-changes
-  bgp suppress-fib-pending
   no bgp default ipv4-unicast
   no bgp ebgp-requires-policy
 !
diff --git a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/voq_chassis.conf b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/voq_chassis.conf
index efd45eda1..0d9eeebe9 100644
--- a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/voq_chassis.conf
+++ b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/voq_chassis.conf
@@ -34,7 +34,6 @@ route-map HIDE_INTERNAL permit 10
 router bgp 55555
 !
   bgp log-neighbor-changes
-  bgp suppress-fib-pending
   no bgp default ipv4-unicast
   no bgp ebgp-requires-policy
 !
diff --git a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/frr.conf.j2/all.conf b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/frr.conf.j2/all.conf
index 8856e58db..af2e974ee 100644
--- a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/frr.conf.j2/all.conf
+++ b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/frr.conf.j2/all.conf
@@ -71,7 +71,6 @@ route-map HIDE_INTERNAL permit 10
 router bgp 55555
 !
   bgp log-neighbor-changes
-  bgp suppress-fib-pending
   no bgp default ipv4-unicast
   no bgp ebgp-requires-policy
 !
diff --git a/src/sonic-config-engine/minigraph.py b/src/sonic-config-engine/minigraph.py
index ca34726d5..d6c811552 100644
--- a/src/sonic-config-engine/minigraph.py
+++ b/src/sonic-config-engine/minigraph.py
@@ -52,7 +52,6 @@
 console_device_types = ['MgmtTsToR']
 dhcp_server_enabled_device_types = ['BmcMgmtToRRouter']
 mgmt_device_types = ['BmcMgmtToRRouter', 'MgmtToRRouter', 'MgmtTsToR']
-leafrouter_device_types = ['LeafRouter']
 
 # Counters disabled on management devices
 mgmt_disabled_counters = ["BUFFER_POOL_WATERMARK", "PFCWD", "PG_DROP", "PG_WATERMARK", "PORT_BUFFER_DROP", "QUEUE", "QUEUE_WATERMARK"]
@@ -2708,10 +2707,6 @@ def parse_xml(filename, platform=None, port_config_file=None, asic_name=None, hw
     if current_device and current_device['type'] in mgmt_device_types:
         results["FLEX_COUNTER_TABLE"] = {counter: {"FLEX_COUNTER_STATUS": "disable"} for counter in mgmt_disabled_counters}
 
-    # Enable bgp-suppress-fib by default for leafrouter
-    if current_device and current_device['type'] in leafrouter_device_types:
-        results['DEVICE_METADATA']['localhost']['suppress-fib-pending'] = 'enabled'
-
     return results
 
 def get_tunnel_entries(tunnel_intfs, tunnel_intfs_qos_remap_config, lo_intfs, tunnel_qos_remap, mux_tunnel_name, peer_switch_ip):
diff --git a/src/sonic-config-engine/tests/sample_output/py2/bgpd_frr.conf b/src/sonic-config-engine/tests/sample_output/py2/bgpd_frr.conf
index 3828af13f..2c146698a 100644
--- a/src/sonic-config-engine/tests/sample_output/py2/bgpd_frr.conf
+++ b/src/sonic-config-engine/tests/sample_output/py2/bgpd_frr.conf
@@ -42,7 +42,6 @@ ip prefix-list LOCAL_VLAN_IPV4_PREFIX seq 10 permit 192.168.0.0/27
 router bgp 65100
 !
   bgp log-neighbor-changes
-  bgp suppress-fib-pending
   no bgp default ipv4-unicast
   no bgp ebgp-requires-policy
 !
diff --git a/src/sonic-config-engine/tests/sample_output/py2/bgpd_frr_backend_asic.conf b/src/sonic-config-engine/tests/sample_output/py2/bgpd_frr_backend_asic.conf
index 45cd03a54..d793dfa39 100644
--- a/src/sonic-config-engine/tests/sample_output/py2/bgpd_frr_backend_asic.conf
+++ b/src/sonic-config-engine/tests/sample_output/py2/bgpd_frr_backend_asic.conf
@@ -53,7 +53,6 @@ route-map HIDE_INTERNAL permit 10
 router bgp 65100
 !
   bgp log-neighbor-changes
-  bgp suppress-fib-pending
   no bgp default ipv4-unicast
   no bgp ebgp-requires-policy
 !
diff --git a/src/sonic-config-engine/tests/sample_output/py2/bgpd_frr_dualtor.conf b/src/sonic-config-engine/tests/sample_output/py2/bgpd_frr_dualtor.conf
index eda11ab9f..364a2c34b 100644
--- a/src/sonic-config-engine/tests/sample_output/py2/bgpd_frr_dualtor.conf
+++ b/src/sonic-config-engine/tests/sample_output/py2/bgpd_frr_dualtor.conf
@@ -42,7 +42,6 @@ ip prefix-list LOCAL_VLAN_IPV4_PREFIX seq 10 permit 192.168.0.0/27
 router bgp 65100
 !
   bgp log-neighbor-changes
-  bgp suppress-fib-pending
   no bgp default ipv4-unicast
   no bgp ebgp-requires-policy
   coalesce-time 10000
diff --git a/src/sonic-config-engine/tests/sample_output/py2/bgpd_frr_frontend_asic.conf b/src/sonic-config-engine/tests/sample_output/py2/bgpd_frr_frontend_asic.conf
index 8daeff2a6..94bd37e3b 100644
--- a/src/sonic-config-engine/tests/sample_output/py2/bgpd_frr_frontend_asic.conf
+++ b/src/sonic-config-engine/tests/sample_output/py2/bgpd_frr_frontend_asic.conf
@@ -53,7 +53,6 @@ route-map HIDE_INTERNAL permit 10
 router bgp 65100
 !
   bgp log-neighbor-changes
-  bgp suppress-fib-pending
   no bgp default ipv4-unicast
   no bgp ebgp-requires-policy
 !
diff --git a/src/sonic-config-engine/tests/sample_output/py2/frr.conf b/src/sonic-config-engine/tests/sample_output/py2/frr.conf
index 032adb8c5..2653f8fc0 100644
--- a/src/sonic-config-engine/tests/sample_output/py2/frr.conf
+++ b/src/sonic-config-engine/tests/sample_output/py2/frr.conf
@@ -62,7 +62,6 @@ ip prefix-list LOCAL_VLAN_IPV4_PREFIX seq 10 permit 192.168.0.0/27
 router bgp 65100
 !
   bgp log-neighbor-changes
-  bgp suppress-fib-pending
   no bgp default ipv4-unicast
   no bgp ebgp-requires-policy
 !
diff --git a/src/sonic-config-engine/tests/sample_output/py2/t2-chassis-fe-bgpd.conf b/src/sonic-config-engine/tests/sample_output/py2/t2-chassis-fe-bgpd.conf
index 32a9abf88..20744efaa 100644
--- a/src/sonic-config-engine/tests/sample_output/py2/t2-chassis-fe-bgpd.conf
+++ b/src/sonic-config-engine/tests/sample_output/py2/t2-chassis-fe-bgpd.conf
@@ -58,7 +58,6 @@ ip prefix-list PL_LoopbackV4 permit 4.0.0.0/32
 router bgp 4000
 !
   bgp log-neighbor-changes
-  bgp suppress-fib-pending
   no bgp default ipv4-unicast
   no bgp ebgp-requires-policy
 !
diff --git a/src/sonic-config-engine/tests/sample_output/py3/bgpd_frr.conf b/src/sonic-config-engine/tests/sample_output/py3/bgpd_frr.conf
index e5ad89644..e7534d4b9 100644
--- a/src/sonic-config-engine/tests/sample_output/py3/bgpd_frr.conf
+++ b/src/sonic-config-engine/tests/sample_output/py3/bgpd_frr.conf
@@ -42,7 +42,6 @@ ip prefix-list LOCAL_VLAN_IPV4_PREFIX seq 10 permit 192.168.200.0/27
 router bgp 65100
 !
   bgp log-neighbor-changes
-  bgp suppress-fib-pending
   no bgp default ipv4-unicast
   no bgp ebgp-requires-policy
 !
diff --git a/src/sonic-config-engine/tests/sample_output/py3/bgpd_frr_backend_asic.conf b/src/sonic-config-engine/tests/sample_output/py3/bgpd_frr_backend_asic.conf
index 45cd03a54..d793dfa39 100644
--- a/src/sonic-config-engine/tests/sample_output/py3/bgpd_frr_backend_asic.conf
+++ b/src/sonic-config-engine/tests/sample_output/py3/bgpd_frr_backend_asic.conf
@@ -53,7 +53,6 @@ route-map HIDE_INTERNAL permit 10
 router bgp 65100
 !
   bgp log-neighbor-changes
-  bgp suppress-fib-pending
   no bgp default ipv4-unicast
   no bgp ebgp-requires-policy
 !
diff --git a/src/sonic-config-engine/tests/sample_output/py3/bgpd_frr_dualtor.conf b/src/sonic-config-engine/tests/sample_output/py3/bgpd_frr_dualtor.conf
index 0ada9a4f8..4f606b808 100644
--- a/src/sonic-config-engine/tests/sample_output/py3/bgpd_frr_dualtor.conf
+++ b/src/sonic-config-engine/tests/sample_output/py3/bgpd_frr_dualtor.conf
@@ -42,7 +42,6 @@ ip prefix-list LOCAL_VLAN_IPV4_PREFIX seq 10 permit 192.168.200.0/27
 router bgp 65100
 !
   bgp log-neighbor-changes
-  bgp suppress-fib-pending
   no bgp default ipv4-unicast
   no bgp ebgp-requires-policy
   coalesce-time 10000
diff --git a/src/sonic-config-engine/tests/sample_output/py3/bgpd_frr_frontend_asic.conf b/src/sonic-config-engine/tests/sample_output/py3/bgpd_frr_frontend_asic.conf
index 8daeff2a6..94bd37e3b 100644
--- a/src/sonic-config-engine/tests/sample_output/py3/bgpd_frr_frontend_asic.conf
+++ b/src/sonic-config-engine/tests/sample_output/py3/bgpd_frr_frontend_asic.conf
@@ -53,7 +53,6 @@ route-map HIDE_INTERNAL permit 10
 router bgp 65100
 !
   bgp log-neighbor-changes
-  bgp suppress-fib-pending
   no bgp default ipv4-unicast
   no bgp ebgp-requires-policy
 !
diff --git a/src/sonic-config-engine/tests/sample_output/py3/frr.conf b/src/sonic-config-engine/tests/sample_output/py3/frr.conf
index d0821f1b1..5b7eacefe 100644
--- a/src/sonic-config-engine/tests/sample_output/py3/frr.conf
+++ b/src/sonic-config-engine/tests/sample_output/py3/frr.conf
@@ -62,7 +62,6 @@ ip prefix-list LOCAL_VLAN_IPV4_PREFIX seq 10 permit 192.168.200.0/27
 router bgp 65100
 !
   bgp log-neighbor-changes
-  bgp suppress-fib-pending
   no bgp default ipv4-unicast
   no bgp ebgp-requires-policy
 !
diff --git a/src/sonic-config-engine/tests/sample_output/py3/t2-chassis-fe-bgpd.conf b/src/sonic-config-engine/tests/sample_output/py3/t2-chassis-fe-bgpd.conf
index 32a9abf88..20744efaa 100644
--- a/src/sonic-config-engine/tests/sample_output/py3/t2-chassis-fe-bgpd.conf
+++ b/src/sonic-config-engine/tests/sample_output/py3/t2-chassis-fe-bgpd.conf
@@ -58,7 +58,6 @@ ip prefix-list PL_LoopbackV4 permit 4.0.0.0/32
 router bgp 4000
 !
   bgp log-neighbor-changes
-  bgp suppress-fib-pending
   no bgp default ipv4-unicast
   no bgp ebgp-requires-policy
 !
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/device_metadata.json b/src/sonic-yang-models/tests/yang_model_tests/tests/device_metadata.json
index 3acfff5c4..11d0c9e9d 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests/device_metadata.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests/device_metadata.json
@@ -132,16 +132,6 @@
     "DEVICE_METADATA_ADVERTISE_LO_PREFIX_AS_128": {
         "desc": "Verifying advertising lo prefix as /128."
     },
-    "DEVICE_METADATA_SUPPRESS_PENDING_FIB_ENABLED": {
-        "desc": "Enable bgp-suppress-fib-pending"
-    },
-    "DEVICE_METADATA_SUPPRESS_PENDING_FIB_DISABLED": {
-        "desc": "Disable bgp-suppress-fib-pending"
-    },
-    "DEVICE_METADATA_SUPPRESS_PENDING_FIB_ENABLED_SYNCHRONOUS_MODE_DISABLED": {
-        "desc": "Enable bgp-suppress-fib-pending when synchronous mode is disabled",
-        "eStr": ["ASIC synchronous mode must be enabled in order to enable suppress FIB pending feature"]
-    },
     "DEVICE_METADATA_VALID_RACK_MGMT_MAP": {
         "desc": "Verifying rack_mgmt_map configuration."
     },
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/device_metadata.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/device_metadata.json
index 74f4d17dd..bc977e7da 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/device_metadata.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/device_metadata.json
@@ -361,36 +361,6 @@
             }
         }
     },
-    "DEVICE_METADATA_SUPPRESS_PENDING_FIB_ENABLED": {
-        "sonic-device_metadata:sonic-device_metadata": {
-            "sonic-device_metadata:DEVICE_METADATA": {
-                "sonic-device_metadata:localhost": {
-                    "synchronous_mode": "enable",
-                    "suppress-fib-pending": "enabled"
-                }
-            }
-        }
-    },
-    "DEVICE_METADATA_SUPPRESS_PENDING_FIB_DISABLED": {
-        "sonic-device_metadata:sonic-device_metadata": {
-            "sonic-device_metadata:DEVICE_METADATA": {
-                "sonic-device_metadata:localhost": {
-                    "synchronous_mode": "disable",
-                    "suppress-fib-pending": "disabled"
-                }
-            }
-        }
-    },
-    "DEVICE_METADATA_SUPPRESS_PENDING_FIB_ENABLED_SYNCHRONOUS_MODE_DISABLED": {
-        "sonic-device_metadata:sonic-device_metadata": {
-            "sonic-device_metadata:DEVICE_METADATA": {
-                "sonic-device_metadata:localhost": {
-                    "synchronous_mode": "disable",
-                    "suppress-fib-pending": "enabled"
-                }
-            }
-        }
-    },
     "DEVICE_METADATA_VALID_RACK_MGMT_MAP": {
         "sonic-device_metadata:sonic-device_metadata": {
             "sonic-device_metadata:DEVICE_METADATA": {
diff --git a/src/sonic-yang-models/yang-models/sonic-device_metadata.yang b/src/sonic-yang-models/yang-models/sonic-device_metadata.yang
index 61f6888de..7bd936e83 100644
--- a/src/sonic-yang-models/yang-models/sonic-device_metadata.yang
+++ b/src/sonic-yang-models/yang-models/sonic-device_metadata.yang
@@ -212,18 +212,6 @@ module sonic-device_metadata {
                                  By default SONiC advertises /128 subnet prefix in Loopback0 as /64 subnet route";
                 }
 
-                leaf suppress-fib-pending {
-                    description "Enable BGP suppress FIB pending feature. BGP will wait for route FIB installation before announcing routes";
-                    type enumeration {
-                        enum enabled;
-                        enum disabled;
-                    }
-                    default disabled;
-
-                    must "((current() = 'disabled') or (current() = 'enabled' and ../synchronous_mode = 'enable'))" {
-                        error-message "ASIC synchronous mode must be enabled in order to enable suppress FIB pending feature";
-                    }
-                }
                 leaf rack_mgmt_map {
                     type string {
                         length 0..128 {

From c52462808fa737bc640d389db7b82ee9f74bf0d4 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Fri, 12 Jul 2024 19:57:08 +0800
Subject: [PATCH 0814/1115] [submodule] Update submodule sonic-dash-api to the
 latest HEAD automatically (#19459)

#### Why I did it
src/sonic-dash-api
```
* 5809048 - (HEAD -> master, origin/master, origin/HEAD) [build]Update pool sonicbld to sonic-ububtu-1c since it's deprecated (#21) (10 days ago) [Jianquan Ye]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-dash-api | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-dash-api b/src/sonic-dash-api
index d033898e7..5809048ab 160000
--- a/src/sonic-dash-api
+++ b/src/sonic-dash-api
@@ -1 +1 @@
-Subproject commit d033898e7e4774fad88229610a5bb502b4152a5a
+Subproject commit 5809048abbc52ce1762f3ed29eb77483051176dd

From 339a4e62ce88c90b3fde5b2e192576740f2ce757 Mon Sep 17 00:00:00 2001
From: abdosi <58047199+abdosi@users.noreply.github.com>
Date: Fri, 12 Jul 2024 19:29:51 -0700
Subject: [PATCH 0815/1115] [healthd] Added change to handle Feature Table
 exception (#19480)

*Fix: #18818

Handle any exception in API get_service_from_feature_table() gracefully .

---------

Signed-off-by: Abhishek Dosi <abdosi@microsoft.com>
---
 .../health_checker/sysmonitor.py              | 31 ++++++++++---------
 1 file changed, 17 insertions(+), 14 deletions(-)

diff --git a/src/system-health/health_checker/sysmonitor.py b/src/system-health/health_checker/sysmonitor.py
index 115dbfbe9..c07b58b54 100755
--- a/src/system-health/health_checker/sysmonitor.py
+++ b/src/system-health/health_checker/sysmonitor.py
@@ -204,20 +204,23 @@ def get_service_from_feature_table(self, dir_list):
 
         while max_retry > 0:
             success = True
-            feature_table = self.config_db.get_table("FEATURE")
-            device_config = {}
-            device_config['DEVICE_METADATA'] = self.config_db.get_table('DEVICE_METADATA')
-            device_config.update(device_info.get_device_runtime_metadata())
-            for srv, fields in feature_table.items():
-                if 'state' not in fields:
-                    success = False
-                    logger.log_warning("FEATURE table is not fully ready: {}, retrying".format(feature_table))
-                    break
-                state = self.get_render_value_for_field(fields["state"], device_config, ['enabled', 'disabled', 'always_enabled', 'always_disabled'])
-                if state not in ["disabled", "always_disabled"]:
-                    srvext = srv + ".service"
-                    if srvext not in dir_list:
-                        dir_list.append(srvext)
+            try:
+                feature_table = self.config_db.get_table("FEATURE")
+                device_config = {}
+                device_config['DEVICE_METADATA'] = self.config_db.get_table('DEVICE_METADATA')
+                device_config.update(device_info.get_device_runtime_metadata())
+                for srv, fields in feature_table.items():
+                    if 'state' not in fields:
+                        success = False
+                        logger.log_warning("FEATURE table is not fully ready: {}, retrying".format(feature_table))
+                        break
+                    state = self.get_render_value_for_field(fields["state"], device_config, ['enabled', 'disabled', 'always_enabled', 'always_disabled'])
+                    if state not in ["disabled", "always_disabled"]:
+                        srvext = srv + ".service"
+                        if srvext not in dir_list:
+                            dir_list.append(srvext)
+            except:
+                success = False
             if not success:
                 max_retry -= 1
                 time.sleep(retry_delay)

From a14681fb23cb3e899151584ebf0e2fa43a4b755b Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sat, 13 Jul 2024 19:00:58 +0800
Subject: [PATCH 0816/1115] [submodule] Update submodule sonic-host-services to
 the latest HEAD automatically (#19568)

#### Why I did it
src/sonic-host-services
```
* cfb3cb8 - (HEAD -> master, origin/master, origin/HEAD) Modified scripts: replaced deprecated 'logger' with 'syslogger' (#136) (2 hours ago) [Ashwin Srinivasan]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-host-services | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-host-services b/src/sonic-host-services
index 02d9b55c2..cfb3cb89a 160000
--- a/src/sonic-host-services
+++ b/src/sonic-host-services
@@ -1 +1 @@
-Subproject commit 02d9b55c29394510cdab9725bbbdbf3e9ae2cadf
+Subproject commit cfb3cb89aff003290db547b78657528d0f20914c

From dd09d9ea98d8f5138a3478e06b00271f0e116c35 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sat, 13 Jul 2024 19:01:27 +0800
Subject: [PATCH 0817/1115] [submodule] Update submodule sonic-linux-kernel to
 the latest HEAD automatically (#19548)

#### Why I did it
src/sonic-linux-kernel
```
* 88c1826 - (HEAD -> master, origin/master, origin/HEAD) [Micas] Kernel configuration is enabled to support mdio-gpio and spi-gpio (#411) (27 hours ago) [Philo]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-linux-kernel | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-linux-kernel b/src/sonic-linux-kernel
index a128c8653..88c1826e5 160000
--- a/src/sonic-linux-kernel
+++ b/src/sonic-linux-kernel
@@ -1 +1 @@
-Subproject commit a128c86539ab63afbce811a364ded5f670d4b8c3
+Subproject commit 88c1826e5e1e96cc016f633f1d3c250b6694abda

From a74777d25f3223c0735853477c467f76456b6da7 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sat, 13 Jul 2024 19:01:43 +0800
Subject: [PATCH 0818/1115] [submodule] Update submodule sonic-utilities to the
 latest HEAD automatically (#19522)
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

#### Why I did it
src/sonic-utilities
```
* b6f7c2b7 - (HEAD -> master, origin/master, origin/HEAD) [sfputil] Add loopback sub-command for debugging and module diagnosti… (#3369) (27 hours ago) [Xinyu Lin]
* 1f944447 - Fix multi-asic behaviour for pg-drop (#3058) (2 days ago) [bktsim]
* 789ef634 - Add Parallel option for apply-patch (#3373) (3 days ago) [Xincun Li]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-utilities | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-utilities b/src/sonic-utilities
index fb2e5cda9..b6f7c2b7d 160000
--- a/src/sonic-utilities
+++ b/src/sonic-utilities
@@ -1 +1 @@
-Subproject commit fb2e5cda90ced88249e06b18d8c5717a89ff62b9
+Subproject commit b6f7c2b7d138299475d994d251721455deab668f

From 293bc71f35bd2f8ce47b843336f7b5b0d119066f Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sat, 13 Jul 2024 19:01:47 +0800
Subject: [PATCH 0819/1115] [submodule] Update submodule sonic-gnmi to the
 latest HEAD automatically (#19513)

#### Why I did it
src/sonic-gnmi
```
* a85dfc1 - (HEAD -> master, origin/master, origin/HEAD) Subscribe COUNTERS_DB (#268) (4 days ago) [ganglv]
* 1e90d23 - Update gnmi-native to support subscribe poll mode (#267) (5 days ago) [ganglv]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-gnmi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-gnmi b/src/sonic-gnmi
index 78014155a..a85dfc112 160000
--- a/src/sonic-gnmi
+++ b/src/sonic-gnmi
@@ -1 +1 @@
-Subproject commit 78014155a59ebdaa61ccec5f036835089f289238
+Subproject commit a85dfc112da34e2577272484b2ecbbb7f629a3b9

From 3c6e347f4ef9a8ba6c110e7c06efeb00f8bb40e6 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sat, 13 Jul 2024 19:01:52 +0800
Subject: [PATCH 0820/1115] [submodule] Update submodule linkmgrd to the latest
 HEAD automatically (#19458)

#### Why I did it
src/linkmgrd
```
* 6fcab47 - (HEAD -> master, origin/master, origin/HEAD) [active-standby] raising log level to notice for timed oscillation config change (#262) (28 hours ago) [Jing Zhang]
* 2b7e4f9 - [active-standby] Fix the oscillation logic (#261) (11 days ago) [Longxiang Lyu]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/linkmgrd | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/linkmgrd b/src/linkmgrd
index 9768268cf..6fcab4740 160000
--- a/src/linkmgrd
+++ b/src/linkmgrd
@@ -1 +1 @@
-Subproject commit 9768268cf11cdfab1eccb194c0ce762e372aa536
+Subproject commit 6fcab47406502cd41d60267b36dc362555487d7c

From e2b30cc49cae3d4f91126ca8dc4dd2d7b232c708 Mon Sep 17 00:00:00 2001
From: Arvindsrinivasan Lakshmi Narasimhan
 <55814491+arlakshm@users.noreply.github.com>
Date: Sat, 13 Jul 2024 15:26:52 -0700
Subject: [PATCH 0821/1115] [Chassis][Voq][Yang] Make asic_name case sensitive
 in yang models (#19486)

* make asic_name case sensitive

* address comment
---
 .../tests_config/system_port.json             | 76 +++++++++++++++++++
 .../yang-models/sonic-buffer-queue.yang       |  4 +-
 .../yang-models/sonic-queue.yang              |  4 +-
 .../yang-models/sonic-system-port.yang        |  4 +-
 .../yang-templates/sonic-types.yang.j2        |  6 ++
 5 files changed, 85 insertions(+), 9 deletions(-)

diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/system_port.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/system_port.json
index 28edae572..837d5a677 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/system_port.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/system_port.json
@@ -86,6 +86,82 @@
                 ]
             }
         }
+    },
+    "SYSTEM_ASIC_NAME_UPPERCASE": {
+        "sonic-system-port:sonic-system-port": {
+            "sonic-system-port:SYSTEM_PORT": {
+                "SYSTEM_PORT_LIST": [
+                    {
+                        "hostname": "host456",
+                        "asic_name": "ASIC0",
+                        "ifname": "Ethernet0",
+                        "core_index": "1",
+                        "core_port_index": "20",
+                        "num_voq": "8",
+                        "speed": "900000",
+                        "switch_id": "1",
+                        "system_port_id": "200"
+                    }
+                ]
+            }
+        }
+    },
+    "SYSTEM_ASIC_NAME_INVALID": {
+        "sonic-system-port:sonic-system-port": {
+            "sonic-system-port:SYSTEM_PORT": {
+                "SYSTEM_PORT_LIST": [
+                    {
+                        "hostname": "host456",
+                        "asic_name": "INVALIDASIC0",
+                        "ifname": "Ethernet0",
+                        "core_index": "1",
+                        "core_port_index": "20",
+                        "num_voq": "8",
+                        "speed": "900000",
+                        "switch_id": "1",
+                        "system_port_id": "200"
+                    }
+                ]
+            }
+        }
+    },
+    "SYSTEM_ASIC_NAME_SUP": {
+        "sonic-system-port:sonic-system-port": {
+            "sonic-system-port:SYSTEM_PORT": {
+                "SYSTEM_PORT_LIST": [
+                    {
+                        "hostname": "host456",
+                        "asic_name": "ASIC12",
+                        "ifname": "Ethernet0",
+                        "core_index": "1",
+                        "core_port_index": "20",
+                        "num_voq": "8",
+                        "speed": "900000",
+                        "switch_id": "1",
+                        "system_port_id": "200"
+                    }
+                ]
+            }
+        }
+    },
+    "SYSTEM_ASIC_NAME_MIXED_CASE": {
+        "sonic-system-port:sonic-system-port": {
+            "sonic-system-port:SYSTEM_PORT": {
+                "SYSTEM_PORT_LIST": [
+                    {
+                        "hostname": "host456",
+                        "asic_name": "Asic2",
+                        "ifname": "Ethernet0",
+                        "core_index": "1",
+                        "core_port_index": "20",
+                        "num_voq": "8",
+                        "speed": "900000",
+                        "switch_id": "1",
+                        "system_port_id": "200"
+                    }
+                ]
+            }
+        }
     }
 
 }
diff --git a/src/sonic-yang-models/yang-models/sonic-buffer-queue.yang b/src/sonic-yang-models/yang-models/sonic-buffer-queue.yang
index 3e96db23c..685ed026d 100644
--- a/src/sonic-yang-models/yang-models/sonic-buffer-queue.yang
+++ b/src/sonic-yang-models/yang-models/sonic-buffer-queue.yang
@@ -84,9 +84,7 @@ module sonic-buffer-queue {
                 }
 
                 leaf asic_name {
-                    type string {
-                        pattern "[Aa]sic[0-4]";
-                    }
+                    type stypes:asic_name;
                 }
 
                 leaf port {
diff --git a/src/sonic-yang-models/yang-models/sonic-queue.yang b/src/sonic-yang-models/yang-models/sonic-queue.yang
index e491a50b0..453950f8b 100644
--- a/src/sonic-yang-models/yang-models/sonic-queue.yang
+++ b/src/sonic-yang-models/yang-models/sonic-queue.yang
@@ -105,9 +105,7 @@ module sonic-queue {
                 }
 
                 leaf asic_name {
-                    type string {
-                        pattern "[Aa]sic[0-4]";
-                    }
+                    type stypes:asic_name;
                 }
 
                 leaf ifname {
diff --git a/src/sonic-yang-models/yang-models/sonic-system-port.yang b/src/sonic-yang-models/yang-models/sonic-system-port.yang
index f95405ac6..25d18e9a5 100644
--- a/src/sonic-yang-models/yang-models/sonic-system-port.yang
+++ b/src/sonic-yang-models/yang-models/sonic-system-port.yang
@@ -34,9 +34,7 @@ module sonic-system-port {
                 }
 
                 leaf asic_name {
-                    type string {
-                        pattern "[Aa]sic[0-4]";
-                    }
+                    type stypes:asic_name;
                 }
 
                 leaf ifname {
diff --git a/src/sonic-yang-models/yang-templates/sonic-types.yang.j2 b/src/sonic-yang-models/yang-templates/sonic-types.yang.j2
index 6d3d3db00..df9b3c91d 100644
--- a/src/sonic-yang-models/yang-templates/sonic-types.yang.j2
+++ b/src/sonic-yang-models/yang-templates/sonic-types.yang.j2
@@ -386,6 +386,12 @@ module sonic-types {
         }
     }
 
+    typedef asic_name {
+        type string {
+            pattern '[Aa][Ss][Ii][Cc][0-9]{1,2}';
+        }
+    }
+
     {% if yang_model_type == "cvl" %}
     /* Required for CVL */
     container operation {

From dc3c0451b1f8853bfd4a41b02ad6800a7080f0fa Mon Sep 17 00:00:00 2001
From: Yaqiang Zhu <zyq1512099831@gmail.com>
Date: Wed, 17 Jul 2024 04:55:19 +0800
Subject: [PATCH 0822/1115] [DHCP] Add try/exception when using
 psutil.process_iter (#19537)

Why I did it
After got running process list by psutil, if some of the processes exited, but invoke name() / cmdline() function of them, it will raise NoSuchProcess exception
Fix issue #19507

How I did it
Add try/exception in process execution
Change func get_target_process_cmds to get_target_process for reuse

How to verify it
UT passed
---
 .../dhcp_utilities/common/utils.py            |  7 ++++--
 .../dhcp_utilities/dhcprelayd/dhcprelayd.py   | 23 +++++++++++--------
 .../dhcp_utilities/dhcpservd/dhcpservd.py     |  9 +++++---
 .../tests/common_utils.py                     |  7 +++++-
 .../tests/test_dhcprelayd.py                  | 17 +++++++-------
 .../tests/test_dhcpservd.py                   |  1 +
 src/sonic-dhcp-utilities/tests/test_utils.py  |  4 +++-
 7 files changed, 43 insertions(+), 25 deletions(-)

diff --git a/src/sonic-dhcp-utilities/dhcp_utilities/common/utils.py b/src/sonic-dhcp-utilities/dhcp_utilities/common/utils.py
index f6975c452..325553f53 100644
--- a/src/sonic-dhcp-utilities/dhcp_utilities/common/utils.py
+++ b/src/sonic-dhcp-utilities/dhcp_utilities/common/utils.py
@@ -160,8 +160,11 @@ def get_target_process_cmds(process_name):
     """
     res = []
     for proc in psutil.process_iter():
-        if proc.name() == process_name:
-            res.append(proc.cmdline())
+        try:
+            if proc.name() == process_name:
+                res.append(proc.cmdline())
+        except psutil.NoSuchProcess:
+            continue
     return res
 
 
diff --git a/src/sonic-dhcp-utilities/dhcp_utilities/dhcprelayd/dhcprelayd.py b/src/sonic-dhcp-utilities/dhcp_utilities/dhcprelayd/dhcprelayd.py
index 66139500d..01e6d5499 100644
--- a/src/sonic-dhcp-utilities/dhcp_utilities/dhcprelayd/dhcprelayd.py
+++ b/src/sonic-dhcp-utilities/dhcp_utilities/dhcprelayd/dhcprelayd.py
@@ -319,16 +319,19 @@ def _kill_exist_relay_releated_process(self, new_dhcp_interfaces, process_name,
 
         # Get old dhcrelay process and get old dhcp interfaces
         for proc in psutil.process_iter():
-            if proc.name() == process_name:
-                cmds = proc.cmdline()
-                index = 0
-                target_procs.append(proc)
-                while index < len(cmds):
-                    if cmds[index] == "-id":
-                        old_dhcp_interfaces.add(cmds[index + 1])
-                        index += 2
-                    else:
-                        index += 1
+            try:
+                if proc.name() == process_name:
+                    cmds = proc.cmdline()
+                    index = 0
+                    target_procs.append(proc)
+                    while index < len(cmds):
+                        if cmds[index] == "-id":
+                            old_dhcp_interfaces.add(cmds[index + 1])
+                            index += 2
+                        else:
+                            index += 1
+            except psutil.NoSuchProcess:
+                continue
         if len(target_procs) == 0:
             return NOT_FOUND_PROC
 
diff --git a/src/sonic-dhcp-utilities/dhcp_utilities/dhcpservd/dhcpservd.py b/src/sonic-dhcp-utilities/dhcp_utilities/dhcpservd/dhcpservd.py
index e8341e436..73a928eb0 100644
--- a/src/sonic-dhcp-utilities/dhcp_utilities/dhcpservd/dhcpservd.py
+++ b/src/sonic-dhcp-utilities/dhcp_utilities/dhcpservd/dhcpservd.py
@@ -39,9 +39,12 @@ def _notify_kea_dhcp4_proc(self):
         Send SIGHUP signal to kea-dhcp4 process
         """
         for proc in psutil.process_iter():
-            if KEA_DHCP4_PROC_NAME in proc.name():
-                proc.send_signal(signal.SIGHUP)
-                break
+            try:
+                if KEA_DHCP4_PROC_NAME in proc.name():
+                    proc.send_signal(signal.SIGHUP)
+                    break
+            except psutil.NoSuchProcess:
+                continue
 
     def dump_dhcp4_config(self):
         """
diff --git a/src/sonic-dhcp-utilities/tests/common_utils.py b/src/sonic-dhcp-utilities/tests/common_utils.py
index 6f3c07a17..f5eb4e018 100644
--- a/src/sonic-dhcp-utilities/tests/common_utils.py
+++ b/src/sonic-dhcp-utilities/tests/common_utils.py
@@ -65,17 +65,22 @@ def mock_get_config_db_table(table_name):
 
 
 class MockProc(object):
-    def __init__(self, name, pid=None, status=psutil.STATUS_RUNNING):
+    def __init__(self, name, pid=1, exited=False):
         self.proc_name = name
         self.pid = pid
+        self.exited = exited
 
     def name(self):
+        if self.exited:
+            raise psutil.NoSuchProcess(self.pid)
         return self.proc_name
 
     def send_signal(self, sig_num):
         pass
 
     def cmdline(self):
+        if self.exited:
+            raise psutil.NoSuchProcess(self.pid)
         if self.proc_name == "dhcrelay":
             return ["/usr/sbin/dhcrelay", "-d", "-m", "discard", "-a", "%h:%p", "%P", "--name-alias-map-file",
                     "/tmp/port-name-alias-map.txt", "-id", "Vlan1000", "-iu", "docker0", "240.127.1.2"]
diff --git a/src/sonic-dhcp-utilities/tests/test_dhcprelayd.py b/src/sonic-dhcp-utilities/tests/test_dhcprelayd.py
index 0cc95ad6a..4914ff020 100644
--- a/src/sonic-dhcp-utilities/tests/test_dhcprelayd.py
+++ b/src/sonic-dhcp-utilities/tests/test_dhcprelayd.py
@@ -111,6 +111,7 @@ def test_kill_exist_relay_releated_process(mock_swsscommon_dbconnector_init, new
     process_iter_ret = []
     for running_proc in running_procs:
         process_iter_ret.append(MockProc(running_proc))
+    process_iter_ret.append(MockProc("exited_proc", exited=True))
     with patch.object(psutil, "process_iter", return_value=process_iter_ret), \
          patch.object(ConfigDbEventChecker, "enable"):
         dhcp_db_connector = DhcpDbConnector()
@@ -194,23 +195,23 @@ def test_execute_supervisor_dhcp_relay_process(mock_swsscommon_dbconnector_init,
             mock_run.assert_called_once_with(["supervisorctl", op, "dhcpmon-Vlan1000"], check=True)
 
 
-@pytest.mark.parametrize("target_cmds", [[["/usr/bin/dhcrelay"]], [["/usr/bin/dhcpmon"]]])
-def test_check_dhcp_relay_process(mock_swsscommon_dbconnector_init, mock_swsscommon_table_init, target_cmds):
-    exp_config = {"isc-dhcpv4-relay-Vlan1000": ["/usr/bin/dhcrelay"]}
-    with patch("dhcp_utilities.dhcprelayd.dhcprelayd.get_target_process_cmds", return_value=target_cmds), \
+@pytest.mark.parametrize("target_procs_cmds", [[["dhcrelay", "-d"]], [["dhcpmon"]]])
+def test_check_dhcp_relay_process(mock_swsscommon_dbconnector_init, mock_swsscommon_table_init, target_procs_cmds):
+    exp_config = {
+        "isc-dhcpv4-relay-Vlan1000": ["dhcrelay", "-d"]
+    }
+    with patch("dhcp_utilities.dhcprelayd.dhcprelayd.get_target_process_cmds", return_value=target_procs_cmds), \
          patch.object(DhcpRelayd, "dhcp_relay_supervisor_config",
                       return_value=exp_config, new_callable=PropertyMock), \
          patch.object(sys, "exit", mock_exit_func):
         dhcp_db_connector = DhcpDbConnector()
         dhcprelayd = DhcpRelayd(dhcp_db_connector, None)
-        exp_cmds = [value for key, value in exp_config.items() if "isc-dhcpv4-relay" in key]
-        exp_cmds.sort()
         try:
             dhcprelayd._check_dhcp_relay_processes()
         except SystemExit:
-            assert exp_cmds != target_cmds
+            assert target_procs_cmds[0] != exp_config["isc-dhcpv4-relay-Vlan1000"]
         else:
-            assert exp_cmds == target_cmds
+            assert target_procs_cmds[0] == exp_config["isc-dhcpv4-relay-Vlan1000"]
 
 
 def test_get_dhcp_relay_config(mock_swsscommon_dbconnector_init, mock_swsscommon_table_init):
diff --git a/src/sonic-dhcp-utilities/tests/test_dhcpservd.py b/src/sonic-dhcp-utilities/tests/test_dhcpservd.py
index 4c8175b7e..b55703aeb 100644
--- a/src/sonic-dhcp-utilities/tests/test_dhcpservd.py
+++ b/src/sonic-dhcp-utilities/tests/test_dhcpservd.py
@@ -66,6 +66,7 @@ def test_dump_dhcp4_config(mock_swsscommon_dbconnector_init, enabled_checker):
 def test_notify_kea_dhcp4_proc(process_list, mock_swsscommon_dbconnector_init, mock_get_render_template,
                                mock_parse_port_map_alias):
     proc_list = [MockProc(process_name) for process_name in process_list]
+    proc_list.append(MockProc("exited_proc", exited=True))
     with patch.object(psutil, "process_iter", return_value=proc_list), \
          patch.object(MockProc, "send_signal", MagicMock()) as mock_send_signal:
         dhcp_db_connector = DhcpDbConnector()
diff --git a/src/sonic-dhcp-utilities/tests/test_utils.py b/src/sonic-dhcp-utilities/tests/test_utils.py
index cf69c2f93..4a41049fe 100644
--- a/src/sonic-dhcp-utilities/tests/test_utils.py
+++ b/src/sonic-dhcp-utilities/tests/test_utils.py
@@ -142,7 +142,9 @@ def test_validate_ttr_type(test_data):
 
 
 def test_get_target_process_cmds():
-    with patch.object(psutil, "process_iter", return_value=[MockProc("dhcrelay", 1), MockProc("dhcpmon", 2)],
+    with patch.object(psutil, "process_iter", return_value=[MockProc("dhcrelay", 1),
+                                                            MockProc("dhcrelay", 1, exited=True),
+                                                            MockProc("dhcpmon", 2)],
                       new_callable=PropertyMock):
         res = utils.get_target_process_cmds("dhcrelay")
         expected_res = [

From 14eb4ca944ca4d08f984fa5599e461c05a77b100 Mon Sep 17 00:00:00 2001
From: xumia <59720581+xumia@users.noreply.github.com>
Date: Wed, 17 Jul 2024 20:05:08 +0800
Subject: [PATCH 0823/1115] [Security] Fix krb5 CVE-2024-37370 (#19577)

Why I did it
[Security] Fix krb5 CVE-2024-37370

Work item tracking
Microsoft ADO (number only): 28432951
How I did it
Upgrade krb5 to version 1.18.3-6+deb11u5+fips
---
 rules/sonic-fips.mk | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/rules/sonic-fips.mk b/rules/sonic-fips.mk
index 0ec82b266..524da2c61 100644
--- a/rules/sonic-fips.mk
+++ b/rules/sonic-fips.mk
@@ -12,14 +12,14 @@ FIPS_KRB5_VERSION = 1.20.1-2+deb12u1+fips
 endif
 
 ifeq ($(BLDENV), bullseye)
-FIPS_VERSION = 0.12
+FIPS_VERSION = 0.13
 FIPS_OPENSSL_VERSION = 1.1.1n-0+deb11u5+fips
 FIPS_OPENSSH_VERSION = 8.4p1-5+deb11u2+fips
 FIPS_PYTHON_MAIN_VERSION = 3.9
 FIPS_PYTHON_VERSION = 3.9.2-1+fips
 FIPS_GOLANG_MAIN_VERSION = 1.15
 FIPS_GOLANG_VERSION = 1.15.15-1~deb11u4+fips
-FIPS_KRB5_VERSION = 1.18.3-6+deb11u4+fips
+FIPS_KRB5_VERSION = 1.18.3-6+deb11u5+fips
 endif
 
 FIPS_URL_PREFIX = https://sonicstorage.blob.core.windows.net/public/fips/$(BLDENV)/$(FIPS_VERSION)/$(CONFIGURED_ARCH)

From 68136cb440614127f60848b751e0f9ebb0ab15c6 Mon Sep 17 00:00:00 2001
From: Riff <r12f.code@gmail.com>
Date: Wed, 17 Jul 2024 09:55:55 -0700
Subject: [PATCH 0824/1115] [Arista]: Update Arista7060X6-PE 256x200G mmu
 configuration. (#19570)

Why I did it
This PR updates the MMU related configurations on Arista 7060X6-PE device with 256x200G breakout.

Work item tracking
Microsoft ADO (number only): 28707303
How I did it
This PR updates 3 things:

- Updated bcm file for optimal MMU settings.
- Updated buffer defaults to accommodate the TH5 architecture with 1 ingress pool + 1 egress pool and updated to optimal value.
- Updated PG lookups for buffer setups.

How to verify it

Tested with sonic-mgmt tests with xoff/xon tests with updated QoS parameter: https://github.com/sonic-net/sonic-mgmt/pull/13656/files
Local ixia test is passing in lab.
Both verified using 202311 branch for backporting.
---
 .../Arista-7060X6-64PE-256x200G/BALANCED      |    1 -
 .../BALANCED/buffers_defaults_t0.j2           |   36 +
 .../BALANCED/buffers_defaults_t1.j2           |   36 +
 .../BALANCED/pg_profile_lookup.ini            |   23 +
 .../th5-a7060x6-64pe.config.bcm               | 1180 ++++++++++++++++-
 5 files changed, 1230 insertions(+), 46 deletions(-)
 delete mode 120000 device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/BALANCED
 create mode 100644 device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/BALANCED/buffers_defaults_t0.j2
 create mode 100644 device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/BALANCED/buffers_defaults_t1.j2
 create mode 100644 device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/BALANCED/pg_profile_lookup.ini

diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/BALANCED b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/BALANCED
deleted file mode 120000
index afd21766c..000000000
--- a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/BALANCED
+++ /dev/null
@@ -1 +0,0 @@
-../../../common/profiles/th5/gen/BALANCED
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/BALANCED/buffers_defaults_t0.j2 b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/BALANCED/buffers_defaults_t0.j2
new file mode 100644
index 000000000..f4b26e0f3
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/BALANCED/buffers_defaults_t0.j2
@@ -0,0 +1,36 @@
+{%- set default_cable = '5m' %}
+
+{%- include 'buffer_ports.j2' %}
+
+{%- macro generate_buffer_pool_and_profiles() %}
+    "BUFFER_POOL": {
+        "ingress_lossless_pool": {
+            "size": "165660324",
+            "type": "ingress",
+            "mode": "dynamic",
+            "xoff": "29520896"
+        },
+        "egress_lossless_pool": {
+            "size": "165660324",
+            "type": "egress",
+            "mode": "dynamic"
+        }
+    },
+    "BUFFER_PROFILE": {
+        "ingress_lossy_profile": {
+            "pool": "ingress_lossless_pool",
+            "size": "0",
+            "static_th": "167546528"
+        },
+        "egress_lossy_profile": {
+            "pool": "egress_lossless_pool",
+            "size": "1778",
+            "dynamic_th": "0"
+        },
+        "egress_lossless_profile": {
+            "pool": "egress_lossless_pool",
+            "size": "0",
+            "static_th": "167546528"
+        }
+    },
+{%- endmacro %}
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/BALANCED/buffers_defaults_t1.j2 b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/BALANCED/buffers_defaults_t1.j2
new file mode 100644
index 000000000..46a7b799a
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/BALANCED/buffers_defaults_t1.j2
@@ -0,0 +1,36 @@
+{%- set default_cable = '5m' %}
+
+{%- include 'buffer_ports.j2' %}
+
+{%- macro generate_buffer_pool_and_profiles() %}
+    "BUFFER_POOL": {
+        "ingress_lossless_pool": {
+            "size": "121964196",
+            "type": "ingress",
+            "mode": "dynamic",
+            "xoff": "29520896"
+        },
+        "egress_lossless_pool": {
+            "size": "121964196",
+            "type": "egress",
+            "mode": "static"
+        }
+    },
+    "BUFFER_PROFILE": {
+        "ingress_lossy_profile": {
+            "pool": "ingress_lossless_pool",
+            "size": "0",
+            "static_th": "167546528"
+        },
+        "egress_lossy_profile": {
+            "pool": "egress_lossless_pool",
+            "size": "1778",
+            "dynamic_th": "1"
+        },
+        "egress_lossless_profile": {
+            "pool": "egress_lossless_pool",
+            "size": "0",
+            "static_th": "125995684"
+        }
+    },
+{%- endmacro %}
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/BALANCED/pg_profile_lookup.ini b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/BALANCED/pg_profile_lookup.ini
new file mode 100644
index 000000000..064222610
--- /dev/null
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/BALANCED/pg_profile_lookup.ini
@@ -0,0 +1,23 @@
+# PG lossless profiles.
+# speed cable size    xon  xoff    threshold xon_offset
+  10000  5m   1248    2288 35776   0         2288
+  25000  5m   1248    2288 53248   0         2288
+  40000  5m   1248    2288 66560   0         2288
+  50000  5m   1248    2288 90272   0         2288
+ 100000  5m   18796   3556 300990  -2        3556
+ 200000  5m   18796   3556 300990  -2        3556
+ 400000  5m   18796   3556 300990  -2        3556
+  10000  40m  1248    2288 37024   0         2288
+  25000  40m  1248    2288 53248   0         2288
+  40000  40m  1248    2288 71552   0         2288
+  50000  40m  1248    2288 96096   0         2288
+ 100000  40m  18796   3556 300990  -2        3556
+ 200000  40m  18796   3556 300990  -2        3556
+ 400000  40m  18796   3556 300990  -2        3556
+  10000  300m 1248    2288 46176   0         2288
+  25000  300m 1248    2288 79040   0         2288
+  40000  300m 1248    2288 108160  0         2288
+  50000  300m 1248    2288 141856  0         2288
+ 100000  300m 18796   3556 300990  -2        3556
+ 200000  300m 18796   3556 300990  -2        3556
+ 400000  300m 18796   3556 300990  -2        3556
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/th5-a7060x6-64pe.config.bcm b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/th5-a7060x6-64pe.config.bcm
index 7df89f432..a7fc7551e 100644
--- a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/th5-a7060x6-64pe.config.bcm
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/th5-a7060x6-64pe.config.bcm
@@ -19,7 +19,6 @@
 #                   ...
 #                   <data_fld_n>: <value>
 #
-
 ---
 bcm_device:
     0:
@@ -40,6 +39,7 @@ bcm_device:
             l3_intf_vlan_split_egress : 1
             pfc_deadlock_seq_control : 1
             sai_tunnel_support: 2
+            mmu_init_config: "\"TH5-MSFT-PROD\""
             bcm_tunnel_term_compatible_mode: 1
             l3_ecmp_member_first_lkup_mem_size: 12288
 ---
@@ -1926,95 +1926,1185 @@ device:
         DEVICE_CONFIG:
             AUTOLOAD_BOARD_SETTINGS: 0
 ...
-## Baseline
+### Baseline
+# Skipping buffer reservation. This means that don't use SDK default setings.
 ---
 device:
     0:
         TM_THD_CONFIG:
             SKIP_BUFFER_RESERVATION: 1
             THRESHOLD_MODE: LOSSY_AND_LOSSLESS
+
+        TM_SCHEDULER_CONFIG:
+            NUM_MC_Q: NUM_MC_Q_2
+
 ...
+
+# Initialize the various thresholds to zero
 ---
+# Ingress service pool level initialization
 device:
     0:
+        # Ingress service pool
+        TM_ING_THD_SERVICE_POOL:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_ING_SERVICE_POOL_ID: [[0,3]]
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                SHARED_LIMIT_CELLS: 0
+                SHARED_RESUME_OFFSET_CELLS: 0
+                YELLOW_OFFSET_CELLS: 0
+                RED_OFFSET_CELLS: 0
+        
+        # Ingress headroom pool
         TM_ING_THD_HEADROOM_POOL:
             ?
-                BUFFER_POOL: [[0,1]]
+                BUFFER_POOL: [0,1]
                 TM_HEADROOM_POOL_ID: [[0,3]]
             :
                 LIMIT_CELLS: 0
+        
+...
+# Ingress priority to PG mappings
+---
+device:
+    0:
+        # priority to PG mapping for UC traffic, 8 profiles (IDs), 16 priorties
+        TM_ING_UC_ING_PRI_MAP:
+            ?
+                # Profile 0
+                TM_ING_UC_ING_PRI_MAP_ID: [0,7]
+                ING_PRI: [0,15]
+            :
+                TM_PRI_GRP_ID: 0
 
-        TM_ING_THD_SERVICE_POOL:
+        # priority to PG mapping for MC traffic, 8 profiles( IDs) 16 priorities
+        TM_ING_NONUC_ING_PRI_MAP:
             ?
-                BUFFER_POOL: [[0,1]]
-                TM_ING_SERVICE_POOL_ID: [[0,3]]
+                # Profile 0
+                TM_ING_NONUC_ING_PRI_MAP_ID: [0,7]
+                ING_PRI: [0,15]
             :
-                SHARED_LIMIT_CELLS: 0
-                SHARED_RESUME_OFFSET_CELLS: 0
-                COLOR_SPECIFIC_LIMITS: 0
+                TM_PRI_GRP_ID: 0
+
+        TM_PRI_GRP_POOL_MAP:
+            ?
+                TM_PRI_GRP_POOL_MAP_ID: [0,7]
+                TM_PRI_GRP_ID: [[0,7]]
+            :
+                TM_ING_SERVICE_POOL_ID: 0
+                TM_HEADROOM_POOL_ID: 0
 
+        # PFC generation: Priority group(s) 
+        TM_PFC_PRI_TO_PRI_GRP_MAP:
+            ?
+                TM_PFC_PRI_TO_PRI_GRP_MAP_ID: [0,7]
+                PFC_PRI: [0,7]
+            :
+                TM_PRI_GRP_ID: 0
+
+...
+# Egress service pool level initialization
+# Output port Thresholds
+---
+device:
+    0:
+        # Egress unicast shared pool
         TM_EGR_THD_SERVICE_POOL:
             ?
-                BUFFER_POOL: [[0,1]]
+                BUFFER_POOL: [0,1]
                 TM_EGR_SERVICE_POOL_ID: [[0,3]]
             :
+                COLOR_SPECIFIC_LIMITS: 0
                 SHARED_LIMIT_CELLS: 0
                 SHARED_RESUME_LIMIT_CELLS: 0
-                COLOR_SPECIFIC_LIMITS: 0
                 YELLOW_SHARED_LIMIT_CELLS: 0
                 YELLOW_SHARED_RESUME_LIMIT_CELLS: 0
                 RED_SHARED_LIMIT_CELLS: 0
                 RED_SHARED_RESUME_LIMIT_CELLS: 0
 
+        # Egress multicast CQE pool        
         TM_THD_MC_EGR_SERVICE_POOL:
             ?
-                BUFFER_POOL: [[0,1]]
+                BUFFER_POOL: [0,1]
                 TM_EGR_SERVICE_POOL_ID: [[0,3]]
             :
+                COLOR_SPECIFIC_LIMITS: 0
                 SHARED_LIMIT_CELLS: 0
                 SHARED_RESUME_LIMIT_CELLS: 0
-                COLOR_SPECIFIC_LIMITS: 0
                 YELLOW_SHARED_LIMIT_CELLS: 0
                 YELLOW_SHARED_RESUME_LIMIT_CELLS: 0
                 RED_SHARED_LIMIT_CELLS: 0
                 RED_SHARED_RESUME_LIMIT_CELLS: 0
 
+
+        TM_THD_DYNAMIC_MARGIN:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: [0,3]
+            :
+                MARGIN: [8256,16513,24769,33026,41282,49539,57795,66052,82565,99078]
+        
+...
+#Per Port Registers
+#Input Port Thresholds
+---
+device:
+    0:
+        # Set PG is LOSSLESS, PFC enable bit
         TM_ING_PORT_PRI_GRP:
             ?
-                PORT_ID: [[1, 8],
-                          [11, 18],
-                          [22, 29],
-                          [33, 40],
-                          [44, 51],
-                          [55, 62],
-                          [66, 73],
-                          [77, 84],
-                          [88, 95],
-                          [99, 106],
-                          [110, 117],
-                          [121, 128],
-                          [132, 139],
-                          [143, 150],
-                          [154, 161],
-                          [165, 172],
-                          [176, 183],
-                          [187, 194],
-                          [198, 205],
-                          [209, 216],
-                          [220, 227],
-                          [231, 238],
-                          [242, 249],
-                          [253, 260],
-                          [264, 271],
-                          [275, 282],
-                          [286, 293],
-                          [297, 304],
-                          [308, 315],
-                          [319, 326],
-                          [330, 337],
-                          [341, 348]]
+                PORT_ID: [[0,8], [11,18], [21,29], [33,40], [43,51], [55,62], [65,73], [76,84], [87,95], [99,106], [109,117], [121,128], [131,139], [143,150], [153,161], [165,172], [175,183], [187,194], [197,205], [209,216], [219,227], [231,238], [241,249], [253,260], [263,271], [274,282], [285,293], [297,304], [307,315], [319,326], [329,337], [341,348], 351]
+                TM_PRI_GRP_ID: [[0,7]]
+            :
+                PFC: 0
+                LOSSLESS: 0
+                ING_MIN_MODE: USE_PRI_GRP_MIN
+        
+        TM_ING_PORT:
+            ?
+                PORT_ID: [[0,8], [11,18], [21,29], [33,40], [43,51], [55,62], [65,73], [76,84], [87,95], [99,106], [109,117], [121,128], [131,139], [143,150], [153,161], [165,172], [175,183], [187,194], [197,205], [209,216], [219,227], [231,238], [241,249], [253,260], [263,271], [274,282], [285,293], [297,304], [307,315], [319,326], [329,337], [341,348], 351]
+            :
+                # Pause enable bit, 
+                PAUSE: 0
+                # Ingress priority profile select, maps to priority group
+                ING_PRI_MAP_ID: 0
+                #Priority group profile select, maps to service pool
+                PRI_GRP_MAP_ID: 0
+        
+        # Ingress port Level to Service Pool limits
+        TM_ING_THD_PORT_SERVICE_POOL: 
+            ?
+               PORT_ID: [[0,8], [11,18], [21,29], [33,40], [43,51], [55,62], [65,73], [76,84], [87,95], [99,106], [109,117], [121,128], [131,139], [143,150], [153,161], [165,172], [175,183], [187,194], [197,205], [209,216], [219,227], [231,238], [241,249], [253,260], [263,271], [274,282], [285,293], [297,304], [307,315], [319,326], [329,337], [341,348], 351] 
+               TM_ING_SERVICE_POOL_ID: [[0,3]]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                SHARED_LIMIT_CELLS: 0
+                RESUME_LIMIT_CELLS: 0
+         
+        # Port level PG limits
+        TM_ING_THD_PORT_PRI_GRP:
+            ?
+                PORT_ID: [[0,8], [11,18], [21,29], [33,40], [43,51], [55,62], [65,73], [76,84], [87,95], [99,106], [109,117], [121,128], [131,139], [143,150], [153,161], [165,172], [175,183], [187,194], [197,205], [209,216], [219,227], [231,238], [241,249], [253,260], [263,271], [274,282], [285,293], [297,304], [307,315], [319,326], [329,337], [341,348], 351]
+                TM_PRI_GRP_ID: [[0,7]]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                DYNAMIC_SHARED_LIMITS: 0
+                SHARED_LIMIT_CELLS_STATIC: 0
+                RESUME_OFFSET_CELLS: 0
+                RESUME_FLOOR_CELLS: 0
+                HEADROOM_LIMIT_AUTO: 0
+                HEADROOM_LIMIT_CELLS: 0
+                EARLY_PFC_XOFF_OFFSET_CELLS: 0
+                EARLY_PFC_XON_OFFSET_CELLS: 0
+                EARLY_PFC_FLOOR_CELLS: 0
+        
+...
+# Output Port Thresholds -2 
+# Per Unicast Queue Thresholds
+---
+device:
+    0:
+        TM_EGR_SERVICE_POOL_DYNAMIC:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: [0,3]
+            :
+                ADAPTIVE_DYNAMIC: ALPHA_1
+
+        TM_PORT_UC_Q_TO_SERVICE_POOL:
+            ?
+                PORT_ID: [[1,8], [11,18], [21,29], [33,40], [43,51], [55,62], [65,73], [76,84], [87,95], [99,106], [109,117], [121,128], [131,139], [143,150], [153,161], [165,172], [175,183], [187,194], [197,205], [209,216], [219,227], [231,238], [241,249], [253,260], [263,271], [274,282], [285,293], [297,304], [307,315], [319,326], [329,337], [341,348], 351]
+                TM_UC_Q_ID: [[0,7]]
+            :
+                USE_QGROUP_MIN: 0
+        
+        TM_THD_UC_Q:
+            ?
+                PORT_ID: [[1,8], [11,18], [21,29], [33,40], [43,51], [55,62], [65,73], [76,84], [87,95], [99,106], [109,117], [121,128], [131,139], [143,150], [153,161], [165,172], [175,183], [187,194], [197,205], [209,216], [219,227], [231,238], [241,249], [253,260], [263,271], [274,282], [285,293], [297,304], [307,315], [319,326], [329,337], [341,348], 351]
+                TM_UC_Q_ID: [[0,7]]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                SHARED_LIMITS: 1
+                DYNAMIC_SHARED_LIMITS: 0
+                SHARED_LIMIT_CELLS_STATIC: 0
+        
+        TM_PORT_MC_Q_TO_SERVICE_POOL:
+            ?
+                PORT_ID: [[1,8], [11,18], [21,29], [33,40], [43,51], [55,62], [65,73], [76,84], [87,95], [99,106], [109,117], [121,128], [131,139], [143,150], [153,161], [165,172], [175,183], [187,194], [197,205], [209,216], [219,227], [231,238], [241,249], [253,260], [263,271], [274,282], [285,293], [297,304], [307,315], [319,326], [329,337], [341,348], 351]
+                TM_MC_Q_ID: [[0,1]]
+            :
+                USE_QGROUP_MIN: 0
+
+        TM_THD_MC_Q:
+            ?
+                # CPU port, 48 MC queues
+                PORT_ID: 0
+                TM_MC_Q_ID: [[0,47]]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                SHARED_LIMITS: 1
+                DYNAMIC_SHARED_LIMITS: 0
+                SHARED_LIMIT_CELLS_STATIC: 0
+            ?
+                # uplink, downlink and loopback ports, 2 MC queues
+                PORT_ID: [[1,8], [11,18], [21,29], [33,40], [43,51], [55,62], [65,73], [76,84], [87,95], [99,106], [109,117], [121,128], [131,139], [143,150], [153,161], [165,172], [175,183], [187,194], [197,205], [209,216], [219,227], [231,238], [241,249], [253,260], [263,271], [274,282], [285,293], [297,304], [307,315], [319,326], [329,337], [341,348], 351]
+                TM_MC_Q_ID: [[0,1]]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                SHARED_LIMITS: 1
+                DYNAMIC_SHARED_LIMITS: 0
+                SHARED_LIMIT_CELLS_STATIC: 0
+
+        TM_THD_Q_GRP:
+            ?
+                PORT_ID: [[1,8], [11,18], [21,29], [33,40], [43,51], [55,62], [65,73], [76,84], [87,95], [99,106], [109,117], [121,128], [131,139], [143,150], [153,161], [165,172], [175,183], [187,194], [197,205], [209,216], [219,227], [231,238], [241,249], [253,260], [263,271], [274,282], [285,293], [297,304], [307,315], [319,326], [329,337], [341,348], 351]
+            :
+                UC_Q_GRP_MIN_GUARANTEE_CELLS: 0
+                MC_Q_GRP_MIN_GUARANTEE_CELLS: 0
+        
+        TM_EGR_THD_UC_PORT_SERVICE_POOL:
+            ?
+                PORT_ID: [[1,8], [11,18], [21,29], [33,40], [43,51], [55,62], [65,73], [76,84], [87,95], [99,106], [109,117], [121,128], [131,139], [143,150], [153,161], [165,172], [175,183], [187,194], [197,205], [209,216], [219,227], [231,238], [241,249], [253,260], [263,271], [274,282], [285,293], [297,304], [307,315], [319,326], [329,337], [341,348], 351]
+                TM_EGR_SERVICE_POOL_ID: [0,3]
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                SHARED_LIMIT_CELLS: 0
+                SHARED_RESUME_LIMIT_CELLS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 0
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 0
+                RED_SHARED_LIMIT_CELLS: 0
+                RED_SHARED_RESUME_LIMIT_CELLS: 0
+
+        TM_EGR_THD_MC_PORT_SERVICE_POOL:
+            ?
+                PORT_ID: [[0,8], [11,18], [21,29], [33,40], [43,51], [55,62], [65,73], [76,84], [87,95], [99,106], [109,117], [121,128], [131,139], [143,150], [153,161], [165,172], [175,183], [187,194], [197,205], [209,216], [219,227], [231,238], [241,249], [253,260], [263,271], [274,282], [285,293], [297,304], [307,315], [319,326], [329,337], [341,348], 351]
+                TM_EGR_SERVICE_POOL_ID: [0,3]
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                RED_SHARED_LIMIT_CELLS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 0
+                SHARED_LIMIT_CELLS: 0
+                RED_SHARED_RESUME_LIMIT_CELLS: 0
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 0
+                SHARED_RESUME_LIMIT_CELLS: 0
+...
+### THDR Limits : initialization
+---
+device:
+    0:
+        TM_THD_REPL_Q:
+            ?
+                REPL_Q_NUM: [0,6]
+            :
+                SHARED_LIMITS: 0
+                DYNAMIC_SHARED_LIMITS: 0
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                RESUME_OFFSET_CELLS: 0
+                COLOR_SPECIFIC_LIMITS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
+                YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750
+                RED_LIMIT_DYNAMIC: PERCENTAGE_625
+                SHARED_LIMIT_PKTS: 0
+                DYNAMIC_SHARED_LIMIT_PKTS: 0
+                SHARED_LIMIT_DYNAMIC_PKTS: ALPHA_1
+                RESUME_OFFSET_PKTS: 0
+                COLOR_SPECIFIC_LIMIT_PKTS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMIT_PKTS: 0
+                YELLOW_LIMIT_DYNAMIC_PKTS: PERCENTAGE_750
+                RED_LIMIT_DYNAMIC_PKTS: PERCENTAGE_625
+                MIN_GUARANTEE_CELLS: 0
+                MIN_GUARANTEE_PKTS: 0
+
+        TM_THD_REPL_SERVICE_POOL:
+                SHARED_LIMIT_CELLS: 0
+                SHARED_RESUME_LIMIT_CELLS: 0
+                COLOR_SPECIFIC_LIMITS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 0
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 0
+                RED_SHARED_LIMIT_CELLS: 0
+                RED_SHARED_RESUME_LIMIT_CELLS: 0
+                SHARED_LIMIT_PKTS: 0
+                SHARED_RESUME_LIMIT_PKTS: 0
+                COLOR_SPECIFIC_LIMITS: 0
+                YELLOW_SHARED_LIMIT_PKTS: 0
+                YELLOW_SHARED_RESUME_LIMIT_PKTS: 0
+                RED_SHARED_LIMIT_PKTS: 0
+                RED_SHARED_RESUME_LIMIT_PKTS: 0
+
+...
+### Begin MMU ingress threshold settings
+
+### Pools
+---
+device:
+    0:
+# Ingress Service Pool Thresholds
+        TM_ING_THD_SERVICE_POOL:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_ING_SERVICE_POOL_ID: 0
+            :
+                SHARED_LIMIT_CELLS: 240087
+                SHARED_RESUME_OFFSET_CELLS: 74
+                COLOR_SPECIFIC_LIMITS: 0
+            ?
+                BUFFER_POOL: [0,1]
+                TM_ING_SERVICE_POOL_ID: 1
+            :
+                SHARED_LIMIT_CELLS: 605
+                SHARED_RESUME_OFFSET_CELLS: 74
+                COLOR_SPECIFIC_LIMITS: 0
+        
+        
+# Ingress Headroom Pool Thresholds
+        TM_ING_THD_HEADROOM_POOL:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_HEADROOM_POOL_ID: 0
+            :
+                LIMIT_CELLS: 58112
+        
+...
+---
+device:
+    0:
+# UC Traffic Priority to PG mapping
+        TM_ING_UC_ING_PRI_MAP:
+            ?
+                # Profile 0
+                TM_ING_UC_ING_PRI_MAP_ID: 0
+                ING_PRI: [0, 1, 2, 5, 6, [8,15]]
+            :
+                TM_PRI_GRP_ID: 0
+            ?
+                TM_ING_UC_ING_PRI_MAP_ID: 0
+                ING_PRI: 3
+            :
+                TM_PRI_GRP_ID: 3
+            ?
+                TM_ING_UC_ING_PRI_MAP_ID: 0
+                ING_PRI: 4
+            :
+                TM_PRI_GRP_ID: 4
+            ?
+                TM_ING_UC_ING_PRI_MAP_ID: 0
+                ING_PRI: 7
+            :
+                TM_PRI_GRP_ID: 7
+            ?
+                # Profile 1
+                TM_ING_UC_ING_PRI_MAP_ID: 1
+                ING_PRI: [[0,7]]
+            :
+                TM_PRI_GRP_ID: 7
+            ?
+                TM_ING_UC_ING_PRI_MAP_ID: 1
+                ING_PRI: [[8,15]]
+            :
+                TM_PRI_GRP_ID: 0
+        
+# MC Traffic Priority to PG mapping
+        TM_ING_NONUC_ING_PRI_MAP:
+            ?
+                # Profile 0
+                TM_ING_NONUC_ING_PRI_MAP_ID: 0
+                ING_PRI: [0, 1, 2, 5, 6, [8,15]]
+            :
+                TM_PRI_GRP_ID: 0
+            ?
+                TM_ING_NONUC_ING_PRI_MAP_ID: 0
+                ING_PRI: 3
+            :
+                TM_PRI_GRP_ID: 3
+            ?
+                TM_ING_NONUC_ING_PRI_MAP_ID: 0
+                ING_PRI: 4
+            :
+                TM_PRI_GRP_ID: 4
+            ?
+                TM_ING_NONUC_ING_PRI_MAP_ID: 0
+                ING_PRI: 7
+            :
+                TM_PRI_GRP_ID: 7
+            ?
+                # Profile 1
+                TM_ING_NONUC_ING_PRI_MAP_ID: 1
+                ING_PRI: [[0,7]]
+            :
+                TM_PRI_GRP_ID: 7
+            ?
+                TM_ING_NONUC_ING_PRI_MAP_ID: 1
+                ING_PRI: [[8,15]]
+            :
+                TM_PRI_GRP_ID: 0
+        
+# PG to Headroom Pool Mapping
+        TM_PRI_GRP_POOL_MAP:
+            ?
+                TM_PRI_GRP_POOL_MAP_ID: 0
+                TM_PRI_GRP_ID: [[0,6]]
+            :
+                TM_HEADROOM_POOL_ID: 0
+            ?
+                TM_PRI_GRP_POOL_MAP_ID: 0
+                TM_PRI_GRP_ID: 7
+            :
+                TM_HEADROOM_POOL_ID: 1
+        
+# PG to Service Pool Mapping
+        TM_PRI_GRP_POOL_MAP:
+            ?
+                TM_PRI_GRP_POOL_MAP_ID: 0
+                TM_PRI_GRP_ID: [[0,6]]
+            :
+                TM_ING_SERVICE_POOL_ID: 0
+            ?
+                TM_PRI_GRP_POOL_MAP_ID: 0
+                TM_PRI_GRP_ID: 7
+            :
+                TM_ING_SERVICE_POOL_ID: 1
+        
+# Ingress PG to PFC priority mapping
+# TM_PFC_PRI_TO_PRI_GRP_MAP is mapped to MMU_THDI_PFCPRI_PG_PROFILE in physical table. There are 8 profiles to configure the PFC to priority group mappings. For exmple, you could map multiple PG to a PFC.  This is needed to generate PFC when a PG is hitting the limits.
+        TM_PFC_PRI_TO_PRI_GRP_MAP:
+            ?
+                TM_PFC_PRI_TO_PRI_GRP_MAP_ID: 0
+                PFC_PRI: 3
+            :
                 TM_PRI_GRP_ID: 3
+            ?
+                TM_PFC_PRI_TO_PRI_GRP_MAP_ID: 0
+                PFC_PRI: 4
+            :
+                TM_PRI_GRP_ID: 4
+
+# Per input port PG and flow control configurations
+# TM_ING_PORT_PRI_GRP is mapped to MMU_THDI_ING_PORT_CONFIG in physical table
+        TM_ING_PORT_PRI_GRP:
+            ?
+                PORT_ID: [[1,8], [11,18], [22,29], [33,40], [44,51], [55,62], [66,73], [77,84], [88,95], [99,106], [110,117], [121,128], [132,139], [143,150], [154,161], [165,172]]
+                TM_PRI_GRP_ID: [3,4]
+            :
+                PFC: 1
+                LOSSLESS: 1
+            ?
+                PORT_ID: [[176,183], [187,194], [198,205], [209,216], [220,227], [231,238], [242,249], [253,260], [264,271], [275,282], [286,293], [297,304], [308,315], [319,326], [330,337], [341,348]]
+                TM_PRI_GRP_ID: [3,4]
             :
                 PFC: 1
                 LOSSLESS: 1
+        
+# ING_PRI_MAP_ID is the ingress priority PG profile select, which maps to the Priority Group
+# PRI_GRP_MAP_ID is the Priority Group profile select, which maps to service pool
+        TM_ING_PORT:
+            ?
+                PORT_ID: [0]
+            :
+                ING_PRI_MAP_ID: 1
+                PRI_GRP_MAP_ID: 0
+            ?
+                PORT_ID: [[1,8], [11,18], [22,29], [33,40], [44,51], [55,62], [66,73], [77,84], [88,95], [99,106], [110,117], [121,128], [132,139], [143,150], [154,161], [165,172]]
+            :
+                ING_PRI_MAP_ID: 0
+                PRI_GRP_MAP_ID: 0
+            ?
+                PORT_ID: [[176,183], [187,194], [198,205], [209,216], [220,227], [231,238], [242,249], [253,260], [264,271], [275,282], [286,293], [297,304], [308,315], [319,326], [330,337], [341,348]]
+            :
+                ING_PRI_MAP_ID: 0
+                PRI_GRP_MAP_ID: 0
+            ?
+                PORT_ID: [76, 274]
+            :
+                ING_PRI_MAP_ID: 1
+                PRI_GRP_MAP_ID: 0
+            ?
+                PORT_ID: [21, 43, 65, 87, 109, 131, 153, 175, 197, 219, 241, 263, 285, 307, 329, 351]
+            :
+                ING_PRI_MAP_ID: 1
+                PRI_GRP_MAP_ID: 0
+        
+...
+
+
+######################################
+---
+device:
+    0:
+# Per input port Service  Pool Thresholds
+        TM_ING_THD_PORT_SERVICE_POOL:
+            ?
+                PORT_ID: [[0,8], [11,18], [21,29], [33,40], [43,51], [55,62], [65,73], [76,84], [87,95], [99,106], [109,117], [121,128], [131,139], [143,150], [153,161], [165,172], [175,183], [187,194], [197,205], [209,216], [219,227], [231,238], [241,249], [253,260], [263,271], [274,282], [285,293], [297,304], [307,315], [319,326], [329,337], [341,348], 351]
+                TM_ING_SERVICE_POOL_ID: [0, 1]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                SHARED_LIMIT_CELLS: 329816
+                RESUME_LIMIT_CELLS: 329816
+        
+# Per input Port PG Thresholds
+        TM_ING_THD_PORT_PRI_GRP:
+            ?
+                PORT_ID: [[0,8], [11,18], [21,29], [33,40], [43,51], [55,62], [65,73], [76,84], [87,95], [99,106], [109,117], [121,128], [131,139], [143,150], [153,161], [165,172], [175,183], [187,194], [197,205], [209,216], [219,227], [231,238], [241,249], [253,260], [263,271], [274,282], [285,293], [297,304], [307,315], [319,326], [329,337], [341,348], 351]
+                TM_PRI_GRP_ID: [0, 1, 2, 5, 6, 7]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                DYNAMIC_SHARED_LIMITS: 0
+                SHARED_LIMIT_CELLS_STATIC: 329816
+                HEADROOM_LIMIT_CELLS: 0
+                RESUME_OFFSET_CELLS: 0
+                RESUME_FLOOR_CELLS: 0
+                HEADROOM_LIMIT_AUTO: 0
+            ?
+                PORT_ID: [[1,8], [11,18], [22,29], [33,40], [44,51], [55,62], [66,73], [77,84], [88,95], [99,106], [110,117], [121,128], [132,139], [143,150], [154,161], [165,172]]
+                TM_PRI_GRP_ID: [3,4]
+            :
+                MIN_GUARANTEE_CELLS: 74
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_DYNAMIC: ALPHA_1_4
+                RESUME_OFFSET_CELLS: 14
+                RESUME_FLOOR_CELLS: 0
+                HEADROOM_LIMIT_AUTO: 0
+                HEADROOM_LIMIT_CELLS: 1185
+            ?
+                PORT_ID: [[176,183], [187,194], [198,205], [209,216], [220,227], [231,238], [242,249], [253,260], [264,271], [275,282], [286,293], [297,304], [308,315], [319,326], [330,337], [341,348]]
+                TM_PRI_GRP_ID: [3,4]
+            :
+                MIN_GUARANTEE_CELLS: 74
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_DYNAMIC: ALPHA_1_4
+                RESUME_OFFSET_CELLS: 14
+                RESUME_FLOOR_CELLS: 0
+                HEADROOM_LIMIT_AUTO: 0
+                HEADROOM_LIMIT_CELLS: 1185
+            ?
+                PORT_ID: [76, 274]
+                TM_PRI_GRP_ID: [3,4]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_DYNAMIC: ALPHA_1_4
+                RESUME_OFFSET_CELLS: 0
+                RESUME_FLOOR_CELLS: 0
+                HEADROOM_LIMIT_AUTO: 0
+                HEADROOM_LIMIT_CELLS: 0
+            ?
+                PORT_ID: [21, 43, 65, 87, 109, 131, 153, 175, 197, 219, 241, 263, 285, 307, 329, 351]
+                TM_PRI_GRP_ID: [3,4]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_DYNAMIC: ALPHA_1_4
+                RESUME_OFFSET_CELLS: 0
+                RESUME_FLOOR_CELLS: 0
+                HEADROOM_LIMIT_AUTO: 0
+            ?
+                PORT_ID: [0]
+                TM_PRI_GRP_ID: [3,4]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_DYNAMIC: ALPHA_1_4
+                RESUME_OFFSET_CELLS: 0
+                RESUME_FLOOR_CELLS: 0
+                HEADROOM_LIMIT_AUTO: 0
+
+...
+
+
+### Egress Service Pools
+---
+device:
+    0:
+# Unicast Egress Service Pool Limits
+        TM_EGR_THD_SERVICE_POOL:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: 0
+            :
+                SHARED_LIMIT_CELLS: 240087
+                SHARED_RESUME_LIMIT_CELLS: 30001
+                COLOR_SPECIFIC_LIMITS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 22509
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 22499
+                RED_SHARED_LIMIT_CELLS: 18757
+                RED_SHARED_RESUME_LIMIT_CELLS: 18747
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: 1
+            :
+                SHARED_LIMIT_CELLS: 605
+                SHARED_RESUME_LIMIT_CELLS: 73
+                COLOR_SPECIFIC_LIMITS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 57
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 55
+                RED_SHARED_LIMIT_CELLS: 48
+                RED_SHARED_RESUME_LIMIT_CELLS: 46
+...
+---
+device:
+    0:
+# Multicast Egress Service Pool Limits, CQEs
+        TM_THD_MC_EGR_SERVICE_POOL:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: 0
+            :
+                SHARED_LIMIT_CELLS: 19538
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: 1
+            :
+                SHARED_LIMIT_CELLS: 605
+...
+---
+device:
+    0:
+# Multicast Egress Service Pool Limits, CQEs
+        TM_THD_MC_EGR_SERVICE_POOL:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: 0
+            :
+                SHARED_RESUME_LIMIT_CELLS: 2432
+                COLOR_SPECIFIC_LIMITS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 1832
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 1822
+                RED_SHARED_LIMIT_CELLS: 1527
+                RED_SHARED_RESUME_LIMIT_CELLS: 1517
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: 1
+            :
+                SHARED_RESUME_LIMIT_CELLS: 73
+                COLOR_SPECIFIC_LIMITS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 57
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 55
+                RED_SHARED_LIMIT_CELLS: 48
+                RED_SHARED_RESUME_LIMIT_CELLS: 46
+...
+
+...
+### Adaptive Alpha
+---
+device:
+    0:
+        TM_EGR_SERVICE_POOL_DYNAMIC:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: [0]
+            :
+                ADAPTIVE_DYNAMIC: ALPHA_1
+
+        TM_THD_DYNAMIC_MARGIN:
+            ?
+                BUFFER_POOL: [0,1]
+                TM_EGR_SERVICE_POOL_ID: [0]
+            :
+                MARGIN: [16513, 33026, 49539, 66052, 82565, 99078, 115591, 132104, 148617, 165130]
+        
+...
+
+---
+device:
+    0:
+        TM_PORT_UC_Q_TO_SERVICE_POOL:
+            ?
+                PORT_ID: [[1,8], [11,18], [21,29], [33,40], [43,51], [55,62], [65,73], [76,84], [87,95], [99,106], [109,117], [121,128], [131,139], [143,150], [153,161], [165,172], [175,183], [187,194], [197,205], [209,216], [219,227], [231,238], [241,249], [253,260], [263,271], [274,282], [285,293], [297,304], [307,315], [319,326], [329,337], [341,348], 351]
+                TM_UC_Q_ID: [0,1,2,5,6,8,9]
+            :
+                USE_QGROUP_MIN: 0
+                TM_EGR_SERVICE_POOL_ID: 0
+            ?
+                PORT_ID: [[1,8], [11,18], [21,29], [33,40], [43,51], [55,62], [65,73], [76,84], [87,95], [99,106], [109,117], [121,128], [131,139], [143,150], [153,161], [165,172], [175,183], [187,194], [197,205], [209,216], [219,227], [231,238], [241,249], [253,260], [263,271], [274,282], [285,293], [297,304], [307,315], [319,326], [329,337], [341,348], 351]
+                TM_UC_Q_ID: [3,4]
+            :
+                USE_QGROUP_MIN: 0
+                TM_EGR_SERVICE_POOL_ID: 0
+            ?
+                PORT_ID: [[1,8], [11,18], [21,29], [33,40], [43,51], [55,62], [65,73], [76,84], [87,95], [99,106], [109,117], [121,128], [131,139], [143,150], [153,161], [165,172], [175,183], [187,194], [197,205], [209,216], [219,227], [231,238], [241,249], [253,260], [263,271], [274,282], [285,293], [297,304], [307,315], [319,326], [329,337], [341,348], 351]
+                TM_UC_Q_ID: 7
+            :
+                USE_QGROUP_MIN: 0
+                TM_EGR_SERVICE_POOL_ID: 1
+        
+        TM_PORT_MC_Q_TO_SERVICE_POOL:
+            ?
+                PORT_ID: [0]
+                TM_MC_Q_ID: [[0,47]]
+            :
+                USE_QGROUP_MIN: 0
+                TM_EGR_SERVICE_POOL_ID: 1
+            ?
+                PORT_ID: [[1,8], [11,18], [21,29], [33,40], [43,51], [55,62], [65,73], [76,84], [87,95], [99,106], [109,117], [121,128], [131,139], [143,150], [153,161], [165,172], [175,183], [187,194], [197,205], [209,216], [219,227], [231,238], [241,249], [253,260], [263,271], [274,282], [285,293], [297,304], [307,315], [319,326], [329,337], [341,348], 351]
+                TM_MC_Q_ID: [[0,1]]
+            :
+                USE_QGROUP_MIN: 0
+                TM_EGR_SERVICE_POOL_ID: 0
+...
+### Queue Thresholds
+######################################
+---
+device:
+    0:
+        TM_THD_UC_Q:
+            ?
+                PORT_ID: [[1,8], [11,18], [22,29], [33,40], [44,51], [55,62], [66,73], [77,84], [88,95], [99,106], [110,117], [121,128], [132,139], [143,150], [154,161], [165,172]]
+                TM_UC_Q_ID: [0, 1, 2, 5, 6, 7]
+            :
+                MIN_GUARANTEE_CELLS: 7
+                SHARED_LIMITS: 1
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_CELLS_STATIC: 0
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                DYNAMIC_GROUP: MID_PRI_GROUP
+                RESUME_OFFSET_CELLS: 2
+                COLOR_SPECIFIC_LIMITS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
+                YELLOW_LIMIT_CELLS_STATIC: 0
+                YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750
+                RED_LIMIT_CELLS_STATIC: 0
+                RED_LIMIT_DYNAMIC: PERCENTAGE_625
+            ?
+                PORT_ID: [[1,8], [11,18], [22,29], [33,40], [44,51], [55,62], [66,73], [77,84], [88,95], [99,106], [110,117], [121,128], [132,139], [143,150], [154,161], [165,172]]
+                TM_UC_Q_ID: [8,9]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                SHARED_LIMITS: 1
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_CELLS_STATIC: 0
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                DYNAMIC_GROUP: MID_PRI_GROUP
+                RESUME_OFFSET_CELLS: 2
+                COLOR_SPECIFIC_LIMITS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
+                YELLOW_LIMIT_CELLS_STATIC: 0
+                YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750
+                RED_LIMIT_CELLS_STATIC: 0
+                RED_LIMIT_DYNAMIC: PERCENTAGE_625
+            ?
+                PORT_ID: [[1,8], [11,18], [22,29], [33,40], [44,51], [55,62], [66,73], [77,84], [88,95], [99,106], [110,117], [121,128], [132,139], [143,150], [154,161], [165,172]]
+                TM_UC_Q_ID: [3,4]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                SHARED_LIMITS: 0
+                DYNAMIC_SHARED_LIMITS: 0
+                SHARED_LIMIT_CELLS_STATIC: 329816
+                DYNAMIC_GROUP: MID_PRI_GROUP
+                RESUME_OFFSET_CELLS: 2
+                COLOR_SPECIFIC_LIMITS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
+                YELLOW_LIMIT_CELLS_STATIC: 0
+                RED_LIMIT_CELLS_STATIC: 0
+            ?
+                PORT_ID: [[176,183], [187,194], [198,205], [209,216], [220,227], [231,238], [242,249], [253,260], [264,271], [275,282], [286,293], [297,304], [308,315], [319,326], [330,337], [341,348]]
+                TM_UC_Q_ID: [0, 1, 2, 5, 6, 7]
+            :
+                MIN_GUARANTEE_CELLS: 7
+                SHARED_LIMITS: 1
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_CELLS_STATIC: 0
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                DYNAMIC_GROUP: MID_PRI_GROUP
+                RESUME_OFFSET_CELLS: 2
+                COLOR_SPECIFIC_LIMITS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
+                YELLOW_LIMIT_CELLS_STATIC: 0
+                YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750
+                RED_LIMIT_CELLS_STATIC: 0
+                RED_LIMIT_DYNAMIC: PERCENTAGE_625
+            ?
+                PORT_ID: [[176,183], [187,194], [198,205], [209,216], [220,227], [231,238], [242,249], [253,260], [264,271], [275,282], [286,293], [297,304], [308,315], [319,326], [330,337], [341,348]]
+                TM_UC_Q_ID: [8,9]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                SHARED_LIMITS: 1
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_CELLS_STATIC: 0
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                DYNAMIC_GROUP: MID_PRI_GROUP
+                RESUME_OFFSET_CELLS: 2
+                COLOR_SPECIFIC_LIMITS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
+                YELLOW_LIMIT_CELLS_STATIC: 0
+                YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750
+                RED_LIMIT_CELLS_STATIC: 0
+                RED_LIMIT_DYNAMIC: PERCENTAGE_625
+            ?
+                PORT_ID: [[176,183], [187,194], [198,205], [209,216], [220,227], [231,238], [242,249], [253,260], [264,271], [275,282], [286,293], [297,304], [308,315], [319,326], [330,337], [341,348]]
+                TM_UC_Q_ID: [3,4]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                SHARED_LIMITS: 0
+                DYNAMIC_SHARED_LIMITS: 0
+                SHARED_LIMIT_CELLS_STATIC: 329816
+                DYNAMIC_GROUP: MID_PRI_GROUP
+                RESUME_OFFSET_CELLS: 2
+                COLOR_SPECIFIC_LIMITS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
+                YELLOW_LIMIT_CELLS_STATIC: 0
+                RED_LIMIT_CELLS_STATIC: 0
+        
+        TM_THD_Q_GRP:
+            ?
+                PORT_ID: [[1,8], [11,18], [21,29], [33,40], [43,51], [55,62], [65,73], [76,84], [87,95], [99,106], [109,117], [121,128], [131,139], [143,150], [153,161], [165,172], [175,183], [187,194], [197,205], [209,216], [219,227], [231,238], [241,249], [253,260], [263,271], [274,282], [285,293], [297,304], [307,315], [319,326], [329,337], [341,348], 351]
+            :
+                UC_Q_GRP_MIN_GUARANTEE_CELLS: 0
+                MC_Q_GRP_MIN_GUARANTEE_CELLS: 0
+        
+        TM_THD_MC_Q:
+            ?
+                PORT_ID: [0]
+                TM_MC_Q_ID: [[0,47]]
+            :
+                MIN_GUARANTEE_CELLS: 7
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_DYNAMIC: ALPHA_1_4
+                COLOR_SPECIFIC_LIMITS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
+                YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750
+                RED_LIMIT_DYNAMIC: PERCENTAGE_625
+                RESUME_OFFSET_CELLS: 2
+            ?
+                PORT_ID: [[1,8], [11,18], [21,29], [33,40], [43,51], [55,62], [65,73], [76,84], [87,95], [99,106], [109,117], [121,128], [131,139], [143,150], [153,161], [165,172], [175,183], [187,194], [197,205], [209,216], [219,227], [231,238], [241,249], [253,260], [263,271], [274,282], [285,293], [297,304], [307,315], [319,326], [329,337], [341,348], 351]
+                TM_MC_Q_ID: [0,1]
+                SHARED_LIMIT_DYNAMIC: ALPHA_2
+            :
+                SHARED_LIMITS: 1
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                COLOR_SPECIFIC_LIMITS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
+                YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750
+                RED_LIMIT_DYNAMIC: PERCENTAGE_625
+                RESUME_OFFSET_CELLS: 2
+        
+        TM_EGR_THD_UC_PORT_SERVICE_POOL:
+            ?
+                PORT_ID: [[1,8], [11,18], [21,29], [33,40], [43,51], [55,62], [65,73], [76,84], [87,95], [99,106], [109,117], [121,128], [131,139], [143,150], [153,161], [165,172], [175,183], [187,194], [197,205], [209,216], [219,227], [231,238], [241,249], [253,260], [263,271], [274,282], [285,293], [297,304], [307,315], [319,326], [329,337], [341,348], 351]
+                TM_EGR_SERVICE_POOL_ID: 0
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                RED_SHARED_LIMIT_CELLS: 18756
+                YELLOW_SHARED_LIMIT_CELLS: 22508
+                SHARED_LIMIT_CELLS: 240087
+                RED_SHARED_RESUME_LIMIT_CELLS: 18754
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 22506
+                SHARED_RESUME_LIMIT_CELLS: 30009
+            ?
+                PORT_ID: [[1,8], [11,18], [21,29], [33,40], [43,51], [55,62], [65,73], [76,84], [87,95], [99,106], [109,117], [121,128], [131,139], [143,150], [153,161], [165,172], [175,183], [187,194], [197,205], [209,216], [219,227], [231,238], [241,249], [253,260], [263,271], [274,282], [285,293], [297,304], [307,315], [319,326], [329,337], [341,348], 351]
+                TM_EGR_SERVICE_POOL_ID: 1
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                RED_SHARED_LIMIT_CELLS: 47
+                YELLOW_SHARED_LIMIT_CELLS: 56
+                SHARED_LIMIT_CELLS: 605
+                RED_SHARED_RESUME_LIMIT_CELLS: 45
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 54
+                SHARED_RESUME_LIMIT_CELLS: 73
+        
+        TM_EGR_THD_MC_PORT_SERVICE_POOL:
+            ?
+                PORT_ID: [[0,8], [11,18], [21,29], [33,40], [43,51], [55,62], [65,73], [76,84], [87,95], [99,106], [109,117], [121,128], [131,139], [143,150], [153,161], [165,172], [175,183], [187,194], [197,205], [209,216], [219,227], [231,238], [241,249], [253,260], [263,271], [274,282], [285,293], [297,304], [307,315], [319,326], [329,337], [341,348], 351]
+                TM_EGR_SERVICE_POOL_ID: 0
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                RED_SHARED_LIMIT_CELLS: 1526
+                YELLOW_SHARED_LIMIT_CELLS: 1831
+                SHARED_LIMIT_CELLS: 19538
+                RED_SHARED_RESUME_LIMIT_CELLS: 1524
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 1829
+                SHARED_RESUME_LIMIT_CELLS: 2440
+            ?
+                PORT_ID: [[0,8], [11,18], [21,29], [33,40], [43,51], [55,62], [65,73], [76,84], [87,95], [99,106], [109,117], [121,128], [131,139], [143,150], [153,161], [165,172], [175,183], [187,194], [197,205], [209,216], [219,227], [231,238], [241,249], [253,260], [263,271], [274,282], [285,293], [297,304], [307,315], [319,326], [329,337], [341,348], 351]
+                TM_EGR_SERVICE_POOL_ID: 1
+            :
+                COLOR_SPECIFIC_LIMITS: 0
+                RED_SHARED_LIMIT_CELLS: 47
+                YELLOW_SHARED_LIMIT_CELLS: 56
+                SHARED_LIMIT_CELLS: 605
+                RED_SHARED_RESUME_LIMIT_CELLS: 45
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 54
+                SHARED_RESUME_LIMIT_CELLS: 73
+
+...
+
+
+### PFC mapping
+---
+device:
+    0:
+        PC_MAC_CONTROL:
+            ?
+                PORT_ID: [[1,8], [11,18], [21,29], [33,40], [43,51], [55,62], [65,73], [76,84], [87,95], [99,106], [109,117], [121,128], [131,139], [143,150], [153,161], [165,172], [175,183], [187,194], [197,205], [209,216], [219,227], [231,238], [241,249], [253,260], [263,271], [274,282], [285,293], [297,304], [307,315], [319,326], [329,337], [341,348], 351]
+            :
+                PAUSE_TX: 0
+                PAUSE_RX: 0
+        
+        TM_PFC_EGR:
+            ?
+                PORT_ID: [[1,8], [11,18], [22,29], [33,40], [44,51], [55,62], [66,73], [77,84], [88,95], [99,106], [110,117], [121,128], [132,139], [143,150], [154,161], [165,172]]
+            :
+                TM_PFC_PRI_PROFILE_ID: 0
+        
+        TM_PFC_EGR:
+            ?
+                PORT_ID: [[176,183], [187,194], [198,205], [209,216], [220,227], [231,238], [242,249], [253,260], [264,271], [275,282], [286,293], [297,304], [308,315], [319,326], [330,337], [341,348]]
+            :
+                TM_PFC_PRI_PROFILE_ID: 0
+...
+---
+device:
+    0:
+# TM_PFC_PRI_PROFILE is mapped to MMU_INTFI_PFCRPI_PROFILE in physical table. There are 8 profiles to configure the PFC value to COS/priorities mapping. For example, you could map multiple coses to a PFC. This mapping is needed when receiving PFC frames and stopping queues(coses) according to the PFC frame received.      
+        TM_PFC_PRI_PROFILE:
+            ?
+                TM_PFC_PRI_PROFILE_ID: 0
+                PFC_PRI: 3
+            :
+                PFC: 1
+                COS_LIST: [0, 0, 0, 1, 0, 0, 0, 0, 0, 0]
+            ?
+                TM_PFC_PRI_PROFILE_ID: 0
+                PFC_PRI: 4
+            :
+                PFC: 1
+                COS_LIST: [0, 0, 0, 0, 1, 0, 0, 0, 0, 0]
+
+        
+# enable the MAC's PFC controls.
+        PC_PFC:
+            ?
+                PORT_ID: [[1,8], [11,18], [22,29], [33,40], [44,51], [55,62], [66,73], [77,84], [88,95], [99,106], [110,117], [121,128], [132,139], [143,150], [154,161], [165,172]]
+            :
+                ENABLE_RX: 1
+                ENABLE_TX: 1
+                
+        PC_PFC:
+            ?
+                PORT_ID: [[176,183], [187,194], [198,205], [209,216], [220,227], [231,238], [242,249], [253,260], [264,271], [275,282], [286,293], [297,304], [308,315], [319,326], [330,337], [341,348]]
+            :
+                ENABLE_RX: 1
+                ENABLE_TX: 1
+...
+### Mirror-on-drop
+---
+device:
+    0:
+        TM_MIRROR_ON_DROP_CONTROL:
+            RESERVED_LIMIT_CELLS: 0
+        
+        TM_MIRROR_ON_DROP_PROFILE:
+            ?
+                TM_MIRROR_ON_DROP_PROFILE_ID: 0
+            :
+                PERCENTAGE_0_25: 65535
+                PERCENTAGE_25_50: 65535
+                PERCENTAGE_50_75: 65535
+                PERCENTAGE_75_100: 65535
+                INGRESS_LIMIT: 0
+                SHARED_LIMIT: 0
+        
+        TM_MIRROR_ON_DROP_DESTINATION: 
+            ?
+                TM_MIRROR_ON_DROP_DESTINATION_ID: 0
+            :
+                TM_MC_Q_ID: 11
+                PORT_ID: 1
+...
+### THDR Limits
+---
+device:
+    0:
+        TM_THD_REPL_Q:
+            ?
+                REPL_Q_NUM: [0,6]
+            :
+                SHARED_LIMITS: 1
+                DYNAMIC_SHARED_LIMITS: 1
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
+                RESUME_OFFSET_CELLS: 14
+                COLOR_SPECIFIC_LIMITS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
+                YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750
+                RED_LIMIT_DYNAMIC: PERCENTAGE_625
+                SHARED_LIMIT_PKTS: 1
+                DYNAMIC_SHARED_LIMIT_PKTS: 1
+                SHARED_LIMIT_DYNAMIC_PKTS: ALPHA_1
+                RESUME_OFFSET_PKTS: 14
+                COLOR_SPECIFIC_LIMIT_PKTS: 0
+                COLOR_SPECIFIC_DYNAMIC_LIMIT_PKTS: 0
+                YELLOW_LIMIT_DYNAMIC_PKTS: PERCENTAGE_750
+                RED_LIMIT_DYNAMIC_PKTS: PERCENTAGE_625
+
+        TM_THD_REPL_Q:
+            ?
+                REPL_Q_NUM: [0,3]
+            :
+                MIN_GUARANTEE_CELLS: 0
+                MIN_GUARANTEE_PKTS: 0
+            ?
+                REPL_Q_NUM: [4,6]
+            :
+                MIN_GUARANTEE_CELLS: 37
+                MIN_GUARANTEE_PKTS: 7
+
+
+        TM_THD_REPL_SERVICE_POOL:
+                SHARED_LIMIT_CELLS: 11153
+                SHARED_RESUME_LIMIT_CELLS: 11139
+                SHARED_LIMIT_PKTS: 3051
+                SHARED_RESUME_LIMIT_PKTS: 3037
+                COLOR_SPECIFIC_LIMITS: 0
+                YELLOW_SHARED_LIMIT_CELLS: 8364
+                RED_SHARED_LIMIT_CELLS: 6970
+                YELLOW_SHARED_LIMIT_PKTS: 2288
+                RED_SHARED_LIMIT_PKTS: 1906
+                YELLOW_SHARED_RESUME_LIMIT_CELLS: 8350
+                RED_SHARED_RESUME_LIMIT_CELLS: 6956
+                YELLOW_SHARED_RESUME_LIMIT_PKTS: 2274
+                RED_SHARED_RESUME_LIMIT_PKTS: 1892
+
+...
+### OBM
+---
+device:
+    0:
+        TM_OBM_PORT_PKT_PARSE:
+            ?
+                PORT_ID: [[1,8], [11,18], [22,29], [33,40], [44,51], [55,62], [66,73], [77,84], [88,95], [99,106], [110,117], [121,128], [132,139], [143,150], [154,161], [165,172]]
+            :
+                OUTER_TPID: 1
+                HEADER_TYPE: OBM_HEADER_TYPE_ETHERNET
+                DEFAULT_PKT_PRI: 0  # mapp to obm_lossy_low
+
+        TM_OBM_PORT_PKT_PARSE:
+            ?
+                PORT_ID: [[176,183], [187,194], [198,205], [209,216], [220,227], [231,238], [242,249], [253,260], [264,271], [275,282], [286,293], [297,304], [308,315], [319,326], [330,337], [341,348]]
+            :
+                OUTER_TPID: 1
+                HEADER_TYPE: OBM_HEADER_TYPE_ETHERNET
+                DEFAULT_PKT_PRI: 0  # mapp to obm_lossy_low
+
+        TM_OBM_PORT_PKT_PRI_TC_MAP:
+            ?
+                PORT_ID: [[1,8], [11,18], [22,29], [33,40], [44,51], [55,62], [66,73], [77,84], [88,95], [99,106], [110,117], [121,128], [132,139], [143,150], [154,161], [165,172]]
+                PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN
+                PKT_PRI: 1
+            :
+                TRAFFIC_CLASS: OBM_TC_LOSSLESS0
+            ?
+                PORT_ID: [[176,183], [187,194], [198,205], [209,216], [220,227], [231,238], [242,249], [253,260], [264,271], [275,282], [286,293], [297,304], [308,315], [319,326], [330,337], [341,348]]
+                PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN
+                PKT_PRI: 1
+            :
+                TRAFFIC_CLASS: OBM_TC_LOSSLESS0
+
+        TM_OBM_PC_PM_PKT_PARSE:
+            ?
+                PC_PM_ID: [1,65]
+            :
+                OUTER_TPID: 0x8100
+
+        TM_OBM_THD_PORT:
+            ?
+                PORT_ID: [[1,8], [11,18], [22,29], [33,40], [44,51], [55,62], [66,73], [77,84], [88,95], [99,106], [110,117], [121,128], [132,139], [143,150], [154,161], [165,172]]
+            :
+                THD_AUTO: 0
+                MAX_BYTES: 125440
+                LOSSY_LOW_MAX_BYTES: 18688
+                LOSSY_MAX_BYTES: 25472
+                LOSSLESS0_MAX_BYTES: 502528
+                LOSSLESS1_MAX_BYTES: 502528
+            ?
+                PORT_ID: [[176,183], [187,194], [198,205], [209,216], [220,227], [231,238], [242,249], [253,260], [264,271], [275,282], [286,293], [297,304], [308,315], [319,326], [330,337], [341,348]]
+            :
+                THD_AUTO: 0
+                MAX_BYTES: 125440
+                LOSSY_LOW_MAX_BYTES: 18688
+                LOSSY_MAX_BYTES: 25472
+                LOSSLESS0_MAX_BYTES: 502528
+                LOSSLESS1_MAX_BYTES: 502528
+        
+        TM_OBM_THD_PORT_FLOW_CTRL:
+            ?
+                PORT_ID: [[1,8], [11,18], [22,29], [33,40], [44,51], [55,62], [66,73], [77,84], [88,95], [99,106], [110,117], [121,128], [132,139], [143,150], [154,161], [165,172]]
+            :
+                THD_AUTO: 0
+                XOFF_BYTES: 76992
+                XON_BYTES: 76480
+                LOSSLESS0_XOFF_BYTES: 5184
+                LOSSLESS0_XON_BYTES: 4672
+                LOSSLESS1_XOFF_BYTES: 5184
+                LOSSLESS1_XON_BYTES: 4672
+            ?
+                PORT_ID: [[176,183], [187,194], [198,205], [209,216], [220,227], [231,238], [242,249], [253,260], [264,271], [275,282], [286,293], [297,304], [308,315], [319,326], [330,337], [341,348]]
+            :
+                THD_AUTO: 0
+                XOFF_BYTES: 76992
+                XON_BYTES: 76480
+                LOSSLESS0_XOFF_BYTES: 5184
+                LOSSLESS0_XON_BYTES: 4672
+                LOSSLESS1_XOFF_BYTES: 5184
+                LOSSLESS1_XON_BYTES: 4672
+        
+        TM_OBM_PORT_FLOW_CTRL:
+            ?
+                PORT_ID: [[1,8], [11,18], [22,29], [33,40], [44,51], [55,62], [66,73], [77,84], [88,95], [99,106], [110,117], [121,128], [132,139], [143,150], [154,161], [165,172]]
+            :
+                FLOW_CTRL: 1
+                FLOW_CTRL_TYPE: PFC
+                LOSSLESS0_FLOW_CTRL: 1
+                LOSSLESS1_FLOW_CTRL: 0
+                COS_BMAP_LOSSLESS0: [0,0,0,1,1,0,0,0]
+                COS_BMAP_LOSSLESS1: 0
+        
+            ?
+                PORT_ID: [[176,183], [187,194], [198,205], [209,216], [220,227], [231,238], [242,249], [253,260], [264,271], [275,282], [286,293], [297,304], [308,315], [319,326], [330,337], [341,348]]
+            :
+                FLOW_CTRL: 1
+                FLOW_CTRL_TYPE: PFC
+                LOSSLESS0_FLOW_CTRL: 1
+                LOSSLESS1_FLOW_CTRL: 0
+                COS_BMAP_LOSSLESS0: [0,0,0,1,1,0,0,0]
+                COS_BMAP_LOSSLESS1: 0
+
+        TM_OBM_PORT_PKT_PRI_TC_MAP:
+            ?
+                PORT_ID: [[1,8], [11,18], [22,29], [33,40], [44,51], [55,62], [66,73], [77,84], [88,95], [99,106], [110,117], [121,128], [132,139], [143,150], [154,161], [165,172]]
+                PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN
+                PKT_PRI: [0,1,2,5,6,7]
+            :
+                TRAFFIC_CLASS: OBM_TC_LOSSY_LOW
+            ?
+                PORT_ID: [[1,8], [11,18], [22,29], [33,40], [44,51], [55,62], [66,73], [77,84], [88,95], [99,106], [110,117], [121,128], [132,139], [143,150], [154,161], [165,172]]
+                PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN
+                PKT_PRI: [3,4]
+            :
+                TRAFFIC_CLASS: OBM_TC_LOSSLESS0
+            ?
+                PORT_ID: [[176,183], [187,194], [198,205], [209,216], [220,227], [231,238], [242,249], [253,260], [264,271], [275,282], [286,293], [297,304], [308,315], [319,326], [330,337], [341,348]]
+                PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN
+                PKT_PRI: [0,1,2,5,6,7]
+            :
+                TRAFFIC_CLASS: OBM_TC_LOSSY_LOW
+            ?
+                PORT_ID: [[176,183], [187,194], [198,205], [209,216], [220,227], [231,238], [242,249], [253,260], [264,271], [275,282], [286,293], [297,304], [308,315], [319,326], [330,337], [341,348]]
+                PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN
+                PKT_PRI: [3,4]
+            :
+                TRAFFIC_CLASS: OBM_TC_LOSSLESS0
+            ?
+                PORT_ID: [76, 274]
+                PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN
+                PKT_PRI: [0,1,2,5,6,7]
+            :
+                TRAFFIC_CLASS: OBM_TC_LOSSY_LOW
+            ?
+                PORT_ID: [76, 274]
+                PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN
+                PKT_PRI: [3,4]
+            :
+                TRAFFIC_CLASS: OBM_TC_LOSSLESS0
+        
 ...

From 200e4d59736a7788f3455deac8e3291bbef27b8a Mon Sep 17 00:00:00 2001
From: Riff <r12f.code@gmail.com>
Date: Wed, 17 Jul 2024 09:57:07 -0700
Subject: [PATCH 0825/1115] [Broadcom]: Update XGS SAI version to 10.1.35.0
 (#19584)

Why I did it
Upgrade the xgs SAI version to 10.1.35.0 to include the following changes:

10.1.21.0: Update the ACL impelementation to enable the ACL switch bind to support PFCWD on MACSEC devices
10.1.23.0: Handle the FDR stats get not supported more properly.
10.1.24.0: (CSP CS00012316286) Fix LPM Miss ACL with counters fails
10.1.25.0: Improve ECMP performance
10.1.28.0: Fix SAI is not honoring the bcm_linkscan_interval set in .bcm config file for Ramon and error with setting SAI_NEIGHBOR_ENTRY_ATTR_IS_LOCAL attribute for neighbor
10.1.29.0: Fix fabric switch initialization delayed if SW linkscan enabled during platform init
10.1.30.0: (CSP CS00012356911) Fix traffic drops on all priorities when PFC asserted on two priorities.
10.1.31.0: NHG performance fix
10.1.33.0: (CSP CS00012345242) High CPU due to SAI code calls bcm_port_resource_get for every fabric error counter
10.1.35.0: Support MMU configuration updates for TH5.

Work item tracking
Microsoft ADO (number only): 28724885
---
 platform/broadcom/sai.mk | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/platform/broadcom/sai.mk b/platform/broadcom/sai.mk
index ddf43a6e7..4cfd2849e 100644
--- a/platform/broadcom/sai.mk
+++ b/platform/broadcom/sai.mk
@@ -1,4 +1,4 @@
-LIBSAIBCM_XGS_VERSION = 10.1.21.0
+LIBSAIBCM_XGS_VERSION = 10.1.35.0
 LIBSAIBCM_DNX_VERSION = 10.1.25.0
 LIBSAIBCM_XGS_BRANCH_NAME = SAI_10.1.0_GA
 LIBSAIBCM_DNX_BRANCH_NAME = SAI_10.1.0_GA

From bc08470c6c8402cf4c48ca6c11af9504175e74ea Mon Sep 17 00:00:00 2001
From: SuvarnaMeenakshi <50386592+SuvarnaMeenakshi@users.noreply.github.com>
Date: Wed, 17 Jul 2024 16:03:00 -0700
Subject: [PATCH 0826/1115] [sonic-snmpagent]: Advance submodule (#19582)

#### Why I did it
Update sonic-snmpagent submodule to include below commit:
a281f9a [ciscoPfcExtMIB]: Remove returning first intf index if subid is empty (#322)
d532923 Modify path of python-wheels package to use bookworm (#324)
---
 src/sonic-snmpagent | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-snmpagent b/src/sonic-snmpagent
index f65294810..a281f9ab7 160000
--- a/src/sonic-snmpagent
+++ b/src/sonic-snmpagent
@@ -1 +1 @@
-Subproject commit f6529481013dbe736246e7c0b34d4851ce515c2c
+Subproject commit a281f9ab771adaa438f01fd5394d7a73ed6bc1d6

From 21f2d3b79a20fed25f6f80a42b81cede3ba4870a Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Thu, 18 Jul 2024 10:01:22 +0800
Subject: [PATCH 0827/1115] [submodule] Update submodule sonic-gnmi to the
 latest HEAD automatically (#19571)

#### Why I did it
src/sonic-gnmi
```
* 015de94 - (HEAD -> master, origin/master, origin/HEAD) Update gnmi-native to support subscribe stream mode (#271) (2 days ago) [ganglv]
* ccce9a2 - Return GNMI API error when ZMQ operation failed. (#270) (2 days ago) [Hua Liu]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-gnmi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-gnmi b/src/sonic-gnmi
index a85dfc112..015de9423 160000
--- a/src/sonic-gnmi
+++ b/src/sonic-gnmi
@@ -1 +1 @@
-Subproject commit a85dfc112da34e2577272484b2ecbbb7f629a3b9
+Subproject commit 015de9423ae81a0d4c6db9fa4b69f89c631d8862

From 8c08883fc464b6105611b52194faf788129611a3 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Thu, 18 Jul 2024 19:01:05 +0800
Subject: [PATCH 0828/1115] [submodule] Update submodule sonic-platform-daemons
 to the latest HEAD automatically (#19596)

#### Why I did it
src/sonic-platform-daemons
```
* 8c89f6b - (HEAD -> master, origin/master, origin/HEAD) [ycabled][active-active] Fix in gRPC channel callback logic by creating swsscommon table within the context (#509) (10 hours ago) [vdahiya12]
* bc936a4 - Initialize application specific fields as 'N/A' in TRANSCEIVER_INFO table (#511) (34 hours ago) [mihirpat1]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-platform-daemons | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-platform-daemons b/src/sonic-platform-daemons
index 74881e1b3..8c89f6ba2 160000
--- a/src/sonic-platform-daemons
+++ b/src/sonic-platform-daemons
@@ -1 +1 @@
-Subproject commit 74881e1b31371bbd9c0966c48402a3058181bc4b
+Subproject commit 8c89f6ba2975a7699861f2c6d77083cebb62e97c

From c8e46accc10f31c8f71912c205de6eeccca1780a Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Thu, 18 Jul 2024 19:01:10 +0800
Subject: [PATCH 0829/1115] [submodule] Update submodule sonic-linux-kernel to
 the latest HEAD automatically (#19595)

#### Why I did it
src/sonic-linux-kernel
```
* 98e4af9 - (HEAD -> master, origin/master, origin/HEAD) Fix os crash caused by optoe when class switch (#413) (2 days ago) [Philo]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-linux-kernel | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-linux-kernel b/src/sonic-linux-kernel
index 88c1826e5..98e4af96b 160000
--- a/src/sonic-linux-kernel
+++ b/src/sonic-linux-kernel
@@ -1 +1 @@
-Subproject commit 88c1826e5e1e96cc016f633f1d3c250b6694abda
+Subproject commit 98e4af96b65564b161e1fd66f31323121f56b302

From c8d1c1d0ca84562e4743380d4a76fae6e79bea8a Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Thu, 18 Jul 2024 19:01:15 +0800
Subject: [PATCH 0830/1115] [submodule] Update submodule sonic-utilities to the
 latest HEAD automatically (#19586)

#### Why I did it
src/sonic-utilities
```
* b9a6049a - (HEAD -> master, origin/master, origin/HEAD) [Bug Fix] Fix disk check test and drops group test (#3424) (28 hours ago) [Changrong Wu]
* c03c9c84 - Revert "fix: fix show bgp summary output typo" (#3423) (2 days ago) [Jianquan Ye]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-utilities | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-utilities b/src/sonic-utilities
index b6f7c2b7d..b9a6049a9 160000
--- a/src/sonic-utilities
+++ b/src/sonic-utilities
@@ -1 +1 @@
-Subproject commit b6f7c2b7d138299475d994d251721455deab668f
+Subproject commit b9a6049a954f6053b49de198bbacf550d5728de7

From ac0574cee3764e514e52fafee0749e1362218524 Mon Sep 17 00:00:00 2001
From: Mai Bui <maibui@microsoft.com>
Date: Thu, 18 Jul 2024 12:01:55 -0400
Subject: [PATCH 0831/1115] Revert "[sudoers] add `/usr/local/bin/storyteller`
 to `READ_ONLY_CMDS` (#13422)" (#19612)

This reverts commit dabb31c5f6d7c9d3897a14d3851cf7d0de0a4fe6.
---
 files/image_config/sudoers/sudoers | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/files/image_config/sudoers/sudoers b/files/image_config/sudoers/sudoers
index ad50f0f0b..bc0755dd2 100644
--- a/files/image_config/sudoers/sudoers
+++ b/files/image_config/sudoers/sudoers
@@ -43,8 +43,7 @@ Cmnd_Alias      READ_ONLY_CMDS = /bin/cat /var/log/syslog, /bin/cat /var/log/sys
                                  /usr/local/bin/pcieutil *, \
                                  /usr/local/bin/psuutil *, \
                                  /usr/local/bin/sonic-installer list, \
-                                 /usr/local/bin/sfputil show *, \
-                                 /usr/local/bin/storyteller *
+                                 /usr/local/bin/sfputil show *
 
 
 Cmnd_Alias      PASSWD_CMDS = /usr/local/bin/config tacacs passkey *, \

From 34b0d19f4fe1f9ec278e95eafbf64a09f0a30204 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Fri, 19 Jul 2024 19:01:01 +0800
Subject: [PATCH 0832/1115] [submodule] Update submodule sonic-ztp to the
 latest HEAD automatically (#19630)

#### Why I did it
src/sonic-ztp
```
* b4cdd8c - (HEAD -> master, origin/master, origin/HEAD) Add role field to the ztp PORT config (#57) (24 hours ago) [Vivek]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-ztp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-ztp b/src/sonic-ztp
index 56cebaeec..b4cdd8c58 160000
--- a/src/sonic-ztp
+++ b/src/sonic-ztp
@@ -1 +1 @@
-Subproject commit 56cebaeec285c74ef531fa7b8436febe85547608
+Subproject commit b4cdd8c58bc419f37b91e783b357bff4c5174536

From 41d7f446b3a1245ce109e7e809166f13c8af7308 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Fri, 19 Jul 2024 19:01:05 +0800
Subject: [PATCH 0833/1115] [submodule] Update submodule sonic-utilities to the
 latest HEAD automatically (#19627)

#### Why I did it
src/sonic-utilities
```
* f2b76213 - (HEAD -> master, origin/master, origin/HEAD) [SfpUtil] sfp eeprom with option dom is not working on Xcvrs with flat memory (#3385) (4 hours ago) [mihirpat1]
* fd3096c7 - Enable show ip bgp on sup and -n all for show ip bgp network (#3417) (9 hours ago) [Changrong Wu]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-utilities | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-utilities b/src/sonic-utilities
index b9a6049a9..f2b762138 160000
--- a/src/sonic-utilities
+++ b/src/sonic-utilities
@@ -1 +1 @@
-Subproject commit b9a6049a954f6053b49de198bbacf550d5728de7
+Subproject commit f2b762138c3236807bf1995e2e2130f7b8e5f386

From c4a7658fce0de742150e6c4256e63c8932e7bbf4 Mon Sep 17 00:00:00 2001
From: Oleksandr Ivantsiv <oivantsiv@nvidia.com>
Date: Fri, 19 Jul 2024 11:45:41 -0700
Subject: [PATCH 0834/1115] [smart-switch] Extend config generator for
 t1-smartswitch topology. (#19056)

Extend config generator for t1-smartswitch topology
---
 src/sonic-config-engine/config_samples.py     |   69 +-
 src/sonic-config-engine/smartswitch_config.py |   37 +-
 src/sonic-config-engine/sonic-cfggen          |    6 -
 .../smartswitch/SS-DPU-1x400Gb/hwsku.json     |    7 +
 .../smartswitch/SSwitch-32x1000Gb/hwsku.json  |   14 -
 .../data/smartswitch/sample_dpu_platform.json |    3 +
 .../smartswitch/sample_switch_platform.json   |   16 +
 .../sample_output/t1-smartswitch-dpu.json     |   27 +
 .../tests/sample_output/t1-smartswitch.json   | 1202 +++++++++--------
 .../tests/t1-ss-dpu-sample-port-config.ini    |    2 +
 src/sonic-config-engine/tests/test_j2files.py |   12 +
 11 files changed, 759 insertions(+), 636 deletions(-)
 create mode 100644 src/sonic-config-engine/tests/data/smartswitch/SS-DPU-1x400Gb/hwsku.json
 create mode 100644 src/sonic-config-engine/tests/data/smartswitch/sample_dpu_platform.json
 create mode 100644 src/sonic-config-engine/tests/data/smartswitch/sample_switch_platform.json
 create mode 100644 src/sonic-config-engine/tests/sample_output/t1-smartswitch-dpu.json
 create mode 100644 src/sonic-config-engine/tests/t1-ss-dpu-sample-port-config.ini

diff --git a/src/sonic-config-engine/config_samples.py b/src/sonic-config-engine/config_samples.py
index 4989b8802..b5b25757b 100644
--- a/src/sonic-config-engine/config_samples.py
+++ b/src/sonic-config-engine/config_samples.py
@@ -4,6 +4,8 @@
 from ipaddress import ip_interface
 from natsort import natsorted
 
+import smartswitch_config
+
 #TODO: Remove once Python 2 support is removed
 if sys.version_info.major == 3:
     UNICODE_TYPE = str
@@ -75,31 +77,56 @@ def generate_t1_sample_config(data):
         port_count += 1
     return data
 
-def generate_t1_smartswitch_sample_config(data):
+def generate_t1_smartswitch_switch_sample_config(data, ss_config):
     data = generate_t1_sample_config(data)
     data['DEVICE_METADATA']['localhost']['subtype'] = 'SmartSwitch'
 
     mpbr_prefix = '169.254.200'
     mpbr_address = '{}.254'.format(mpbr_prefix)
 
-    bridge_name = 'bridge_midplane'
-    data['MID_PLANE_BRIDGE'] = {
-        'GLOBAL': {
-            'bridge': bridge_name,
-            'ip_prefix': '{}/24'.format(mpbr_address)
-        }
-    }
+    bridge_name = 'bridge-midplane'
 
     dhcp_server_ports = {}
 
-    for dpu_name in natsorted(data.get('DPUS', {})):
-        midplane_interface = data['DPUS'][dpu_name]['midplane_interface']
+    for dpu_name in natsorted(ss_config.get('DPUS', {})):
+        midplane_interface = ss_config['DPUS'][dpu_name]['midplane_interface']
         dpu_id = int(midplane_interface.replace('dpu', ''))
         dhcp_server_ports['{}|{}'.format(bridge_name, midplane_interface)] = {'ips': ['{}.{}'.format(mpbr_prefix, dpu_id + 1)]}
 
     if dhcp_server_ports:
+        data['DPUS'] = ss_config['DPUS']
+
+        data['FEATURE'] = {
+            "dhcp_relay": {
+                "auto_restart": "enabled",
+                "check_up_status": "False",
+                "delayed": "False",
+                "has_global_scope": "True",
+                "has_per_asic_scope": "False",
+                "high_mem_alert": "disabled",
+                "set_owner": "local",
+                "state": "enabled",
+                "support_syslog_rate_limit": "True"
+            },
+            "dhcp_server": {
+                "auto_restart": "enabled",
+                "check_up_status": "False",
+                "delayed": "False",
+                "has_global_scope": "True",
+                "has_per_asic_scope": "False",
+                "high_mem_alert": "disabled",
+                "set_owner": "local",
+                "state": "enabled",
+                "support_syslog_rate_limit": "False"
+            }
+        }
+
         data['DHCP_SERVER_IPV4'] = {
             bridge_name: {
+                'customized_options': [
+                    'option60',
+                    'option223'
+                ],
                 'gateway': mpbr_address,
                 'lease_time': '3600',
                 'mode': 'PORT',
@@ -107,10 +134,32 @@ def generate_t1_smartswitch_sample_config(data):
                 "state": "enabled"
             }
         }
+
         data['DHCP_SERVER_IPV4_PORT'] = dhcp_server_ports
 
     return data
 
+def generate_t1_smartswitch_dpu_sample_config(data, ss_config):
+    data['DEVICE_METADATA']['localhost']['hostname'] = 'sonic'
+    data['DEVICE_METADATA']['localhost']['switch_type'] = 'dpu'
+    data['DEVICE_METADATA']['localhost']['type'] = 'SonicDpu'
+    data['DEVICE_METADATA']['localhost']['subtype'] = 'SmartSwitch'
+    data['DEVICE_METADATA']['localhost']['bgp_asn'] = '65100'
+
+    for port in natsorted(data['PORT']):
+        data['PORT'][port]['admin_status'] = 'up'
+        data['PORT'][port]['mtu'] = '9100'
+
+    return data
+
+def generate_t1_smartswitch_sample_config(data):
+    ss_config = smartswitch_config.get_smartswitch_config(data['DEVICE_METADATA']['localhost']['hwsku'])
+
+    if smartswitch_config.DPU_TABLE in ss_config:
+        return generate_t1_smartswitch_dpu_sample_config(data, ss_config)
+
+    return generate_t1_smartswitch_switch_sample_config(data, ss_config)
+
 def generate_empty_config(data):
     new_data = {'DEVICE_METADATA': data['DEVICE_METADATA']}
     if 'hostname' not in new_data['DEVICE_METADATA']['localhost']:
diff --git a/src/sonic-config-engine/smartswitch_config.py b/src/sonic-config-engine/smartswitch_config.py
index b11c6b558..6c5202a59 100644
--- a/src/sonic-config-engine/smartswitch_config.py
+++ b/src/sonic-config-engine/smartswitch_config.py
@@ -1,6 +1,7 @@
 import os
 import sys
 import portconfig
+from sonic_py_common import device_info
 
 try:
     if os.environ["CFGGEN_UNIT_TESTING"] == "2":
@@ -14,25 +15,29 @@
 except KeyError:
     pass
 
-DPUS_TABLE  = 'DPUS'
+DPU_TABLE = 'DPU'
+DPUS_TABLE = 'DPUS'
 
 
-def get_smartswitch_config(hwsku=None, platform=None):
-    hwsku_json_file = portconfig.get_hwsku_file_name(hwsku, platform)
-
-    if os.environ.get("CFGGEN_UNIT_TESTING") == "2" and hwsku == 'SSwitch-32x1000Gb':
-        hwsku_json_file = os.path.join(tests_path, "data", "smartswitch", hwsku, "hwsku.json")
-
-    if not hwsku_json_file:
-        return {}
-
-    hwsku_dict = portconfig.readJson(hwsku_json_file)
-    if not hwsku_dict:
-        raise Exception("hwsku_dict is none")
-
+def get_smartswitch_config(hwsku=None):
     config = {}
 
-    if DPUS_TABLE in hwsku_dict:
-        config[DPUS_TABLE] = hwsku_dict[DPUS_TABLE]
+    if os.environ.get("CFGGEN_UNIT_TESTING") == "2":
+        if hwsku == 'SSwitch-32x1000Gb':
+            json_file =  os.path.join(tests_path, "data", "smartswitch", "sample_switch_platform.json")
+        elif hwsku == 'SS-DPU-1x400Gb':
+            json_file =  os.path.join(tests_path, "data", "smartswitch", "sample_dpu_platform.json")
+    else:
+        platform_path = device_info.get_path_to_platform_dir()
+        json_file = os.path.join(platform_path, device_info.PLATFORM_JSON_FILE)
+
+    platform_json = portconfig.readJson(json_file)
+    if not platform_json:
+        return config
+
+    if DPU_TABLE in platform_json:
+        config[DPU_TABLE] = platform_json[DPU_TABLE]
+    if DPUS_TABLE in platform_json:
+        config[DPUS_TABLE] = platform_json[DPUS_TABLE]
 
     return config
diff --git a/src/sonic-config-engine/sonic-cfggen b/src/sonic-config-engine/sonic-cfggen
index e3314d34f..9151bfa20 100755
--- a/src/sonic-config-engine/sonic-cfggen
+++ b/src/sonic-config-engine/sonic-cfggen
@@ -33,7 +33,6 @@ from config_samples import generate_sample_config, get_available_config
 from functools import partial
 from minigraph import minigraph_encoder, parse_xml, parse_device_desc_xml, parse_asic_sub_role, parse_asic_switch_type, parse_hostname
 from portconfig import get_port_config, get_breakout_mode
-from smartswitch_config import get_smartswitch_config
 from sonic_py_common.multi_asic import get_asic_id_from_name, get_asic_device_id, is_multi_asic
 from sonic_py_common import device_info
 from swsscommon.swsscommon import ConfigDBConnector, SonicDBConfig, ConfigDBPipeConnector
@@ -371,11 +370,6 @@ def main():
         if  brkout_table is not None:
             deep_update(data, {'BREAKOUT_CFG': brkout_table})
 
-        # Read Smart Switch config
-        smartswitch_config = get_smartswitch_config(hwsku, platform)
-        if smartswitch_config:
-            deep_update(data, smartswitch_config)
-
     _process_json(args, data)
 
     if args.yang is not None:
diff --git a/src/sonic-config-engine/tests/data/smartswitch/SS-DPU-1x400Gb/hwsku.json b/src/sonic-config-engine/tests/data/smartswitch/SS-DPU-1x400Gb/hwsku.json
new file mode 100644
index 000000000..6f9d58a07
--- /dev/null
+++ b/src/sonic-config-engine/tests/data/smartswitch/SS-DPU-1x400Gb/hwsku.json
@@ -0,0 +1,7 @@
+{
+    "interfaces": {
+        "Ethernet0": {
+            "default_brkout_mode": "1x400G"
+        }
+    }
+}
diff --git a/src/sonic-config-engine/tests/data/smartswitch/SSwitch-32x1000Gb/hwsku.json b/src/sonic-config-engine/tests/data/smartswitch/SSwitch-32x1000Gb/hwsku.json
index 9ce920b2d..697fb7b1c 100644
--- a/src/sonic-config-engine/tests/data/smartswitch/SSwitch-32x1000Gb/hwsku.json
+++ b/src/sonic-config-engine/tests/data/smartswitch/SSwitch-32x1000Gb/hwsku.json
@@ -111,19 +111,5 @@
         "Ethernet144": {
             "default_brkout_mode": "1x100000[50G,40000,25G,10000]"
         }
-    },
-    "DPUS": {
-        "dpu0": {
-            "midplane_interface":  "dpu0"
-        },
-        "dpu1": {
-            "midplane_interface":  "dpu1"
-        },
-        "dpu2": {
-            "midplane_interface":  "dpu2"
-        },
-        "dpu3": {
-            "midplane_interface":  "dpu3"
-        }
     }
 }
diff --git a/src/sonic-config-engine/tests/data/smartswitch/sample_dpu_platform.json b/src/sonic-config-engine/tests/data/smartswitch/sample_dpu_platform.json
new file mode 100644
index 000000000..11eb9a4da
--- /dev/null
+++ b/src/sonic-config-engine/tests/data/smartswitch/sample_dpu_platform.json
@@ -0,0 +1,3 @@
+{
+    "DPU": {}
+}
diff --git a/src/sonic-config-engine/tests/data/smartswitch/sample_switch_platform.json b/src/sonic-config-engine/tests/data/smartswitch/sample_switch_platform.json
new file mode 100644
index 000000000..18b525588
--- /dev/null
+++ b/src/sonic-config-engine/tests/data/smartswitch/sample_switch_platform.json
@@ -0,0 +1,16 @@
+{
+    "DPUS": {
+        "dpu0": {
+            "midplane_interface":  "dpu0"
+        },
+        "dpu1": {
+            "midplane_interface":  "dpu1"
+        },
+        "dpu2": {
+            "midplane_interface":  "dpu2"
+        },
+        "dpu3": {
+            "midplane_interface":  "dpu3"
+        }
+    }
+}
diff --git a/src/sonic-config-engine/tests/sample_output/t1-smartswitch-dpu.json b/src/sonic-config-engine/tests/sample_output/t1-smartswitch-dpu.json
new file mode 100644
index 000000000..23a29ba6e
--- /dev/null
+++ b/src/sonic-config-engine/tests/sample_output/t1-smartswitch-dpu.json
@@ -0,0 +1,27 @@
+{
+    "DEVICE_METADATA": {
+        "localhost": {
+            "hwsku": "SS-DPU-1x400Gb",
+            "hostname": "sonic",
+            "switch_type": "dpu",
+            "type": "SonicDpu",
+            "subtype": "SmartSwitch",
+            "bgp_asn": "65100"
+        }
+    },
+    "PORT": {
+        "Ethernet0": {
+            "lanes": "0,1,2,3,4,5,6,7",
+            "alias": "etp1",
+            "admin_status": "up",
+            "mtu": "9100"
+        }
+    },
+    "FLEX_COUNTER_TABLE": {
+        "ACL": {
+            "FLEX_COUNTER_STATUS": "disable",
+            "FLEX_COUNTER_DELAY_STATUS": "true",
+            "POLL_INTERVAL": "10000"
+        }
+    }
+}
diff --git a/src/sonic-config-engine/tests/sample_output/t1-smartswitch.json b/src/sonic-config-engine/tests/sample_output/t1-smartswitch.json
index 58d91aa90..fc305243f 100644
--- a/src/sonic-config-engine/tests/sample_output/t1-smartswitch.json
+++ b/src/sonic-config-engine/tests/sample_output/t1-smartswitch.json
@@ -1,591 +1,613 @@
 {
-    "DEVICE_METADATA": {
-        "localhost": {
-            "hwsku": "SSwitch-32x1000Gb",
-            "hostname": "sonic",
-            "type": "LeafRouter",
-            "bgp_asn": "65100",
-            "subtype": "SmartSwitch"
-        }
-    },
-    "PORT": {
-        "Ethernet0": {
-            "lanes": "0,1,2,3,4,5,6,7",
-            "alias": "etp1",
-            "admin_status": "up",
-            "mtu": "9100"
-        },
-        "Ethernet8": {
-            "lanes": "8,9,10,11,12,13,14,15",
-            "alias": "etp2",
-            "admin_status": "up",
-            "mtu": "9100"
-        },
-        "Ethernet16": {
-            "lanes": "16,17,18,19,20,21,22,23",
-            "alias": "etp3",
-            "admin_status": "up",
-            "mtu": "9100"
-        },
-        "Ethernet24": {
-            "lanes": "24,25,26,27,28,29,30,31",
-            "alias": "etp4",
-            "admin_status": "up",
-            "mtu": "9100"
-        },
-        "Ethernet32": {
-            "lanes": "32,33,34,35,36,37,38,39",
-            "alias": "etp5",
-            "admin_status": "up",
-            "mtu": "9100"
-        },
-        "Ethernet40": {
-            "lanes": "40,41,42,43,44,45,46,47",
-            "alias": "etp6",
-            "admin_status": "up",
-            "mtu": "9100"
-        },
-        "Ethernet48": {
-            "lanes": "48,49,50,51,52,53,54,55",
-            "alias": "etp7",
-            "admin_status": "up",
-            "mtu": "9100"
-        },
-        "Ethernet56": {
-            "lanes": "56,57,58,59,60,61,62,63",
-            "alias": "etp8",
-            "admin_status": "up",
-            "mtu": "9100"
-        },
-        "Ethernet64": {
-            "lanes": "64,65,66,67,68,69,70,71",
-            "alias": "etp9",
-            "admin_status": "up",
-            "mtu": "9100"
-        },
-        "Ethernet72": {
-            "lanes": "72,73,74,75,76,77,78,79",
-            "alias": "etp10",
-            "admin_status": "up",
-            "mtu": "9100"
-        },
-        "Ethernet80": {
-            "lanes": "80,81,82,83,84,85,86,87",
-            "alias": "etp11",
-            "admin_status": "up",
-            "mtu": "9100"
-        },
-        "Ethernet88": {
-            "lanes": "88,89,90,91,92,93,94,95",
-            "alias": "etp12",
-            "admin_status": "up",
-            "mtu": "9100"
-        },
-        "Ethernet96": {
-            "lanes": "96,97,98,99,100,101,102,103",
-            "alias": "etp13",
-            "admin_status": "up",
-            "mtu": "9100"
-        },
-        "Ethernet104": {
-            "lanes": "104,105,106,107,108,109,110,111",
-            "alias": "etp14",
-            "admin_status": "up",
-            "mtu": "9100"
-        },
-        "Ethernet112": {
-            "lanes": "112,113,114,115,116,117,118,119",
-            "alias": "etp15",
-            "admin_status": "up",
-            "mtu": "9100"
-        },
-        "Ethernet120": {
-            "lanes": "120,121,122,123,124,125,126,127",
-            "alias": "etp16",
-            "admin_status": "up",
-            "mtu": "9100"
-        },
-        "Ethernet128": {
-            "lanes": "128,129,130,131,132,133,134,135",
-            "alias": "etp17",
-            "admin_status": "up",
-            "mtu": "9100"
-        },
-        "Ethernet136": {
-            "lanes": "136,137,138,139,140,141,142,143",
-            "alias": "etp18",
-            "admin_status": "up",
-            "mtu": "9100"
-        },
-        "Ethernet144": {
-            "lanes": "144,145,146,147,148,149,150,151",
-            "alias": "etp19",
-            "admin_status": "up",
-            "mtu": "9100"
-        },
-        "Ethernet152": {
-            "lanes": "152,153,154,155,156,157,158,159",
-            "alias": "etp20",
-            "admin_status": "up",
-            "mtu": "9100"
-        },
-        "Ethernet160": {
-            "lanes": "160,161,162,163,164,165,166,167",
-            "alias": "etp21",
-            "admin_status": "up",
-            "mtu": "9100"
-        },
-        "Ethernet168": {
-            "lanes": "168,169,170,171,172,173,174,175",
-            "alias": "etp22",
-            "admin_status": "up",
-            "mtu": "9100"
-        },
-        "Ethernet176": {
-            "lanes": "176,177,178,179,180,181,182,183",
-            "alias": "etp23",
-            "admin_status": "up",
-            "mtu": "9100"
-        },
-        "Ethernet184": {
-            "lanes": "184,185,186,187,188,189,190,191",
-            "alias": "etp24",
-            "admin_status": "up",
-            "mtu": "9100"
-        },
-        "Ethernet192": {
-            "lanes": "192,193,194,195,196,197,198,199",
-            "alias": "etp25",
-            "admin_status": "up",
-            "mtu": "9100"
-        },
-        "Ethernet200": {
-            "lanes": "200,201,202,203,204,205,206,207",
-            "alias": "etp26",
-            "admin_status": "up",
-            "mtu": "9100"
-        },
-        "Ethernet208": {
-            "lanes": "208,209,210,211,212,213,214,215",
-            "alias": "etp27",
-            "admin_status": "up",
-            "mtu": "9100"
-        },
-        "Ethernet216": {
-            "lanes": "216,217,218,219,220,221,222,223",
-            "alias": "etp28",
-            "admin_status": "up",
-            "mtu": "9100"
-        },
-        "Ethernet224": {
-            "lanes": "224,225,226,227,228,229,230,231",
-            "alias": "etp29",
-            "admin_status": "up",
-            "mtu": "9100"
-        },
-        "Ethernet232": {
-            "lanes": "232,233,234,235,236,237,238,239",
-            "alias": "etp30",
-            "admin_status": "up",
-            "mtu": "9100"
-        },
-        "Ethernet240": {
-            "lanes": "240,241,242,243,244,245,246,247",
-            "alias": "etp31",
-            "admin_status": "up",
-            "mtu": "9100"
-        },
-        "Ethernet248": {
-            "lanes": "248,249,250,251,252,253,254,255",
-            "alias": "etp32",
-            "admin_status": "up",
-            "mtu": "9100"
-        }
-    },
-    "DPUS": {
-        "dpu0": {
-            "midplane_interface": "dpu0"
-        },
-        "dpu1": {
-            "midplane_interface": "dpu1"
-        },
-        "dpu2": {
-            "midplane_interface": "dpu2"
-        },
-        "dpu3": {
-            "midplane_interface": "dpu3"
-        }
-    },
-    "FLEX_COUNTER_TABLE": {
-        "ACL": {
-            "FLEX_COUNTER_STATUS": "disable",
-            "FLEX_COUNTER_DELAY_STATUS": "true",
-            "POLL_INTERVAL": "10000"
-        }
-    },
-    "LOOPBACK_INTERFACE": {
-        "Loopback0|10.1.0.1/32": {}
-    },
-    "BGP_NEIGHBOR": {
-        "10.0.0.1": {
-            "rrclient": 0,
-            "name": "ARISTA01T2",
-            "local_addr": "10.0.0.0",
-            "nhopself": 0,
-            "holdtime": "180",
-            "asn": "65200",
-            "keepalive": "60"
-        },
-        "10.0.0.3": {
-            "rrclient": 0,
-            "name": "ARISTA02T2",
-            "local_addr": "10.0.0.2",
-            "nhopself": 0,
-            "holdtime": "180",
-            "asn": "65200",
-            "keepalive": "60"
-        },
-        "10.0.0.5": {
-            "rrclient": 0,
-            "name": "ARISTA03T2",
-            "local_addr": "10.0.0.4",
-            "nhopself": 0,
-            "holdtime": "180",
-            "asn": "65200",
-            "keepalive": "60"
-        },
-        "10.0.0.7": {
-            "rrclient": 0,
-            "name": "ARISTA04T2",
-            "local_addr": "10.0.0.6",
-            "nhopself": 0,
-            "holdtime": "180",
-            "asn": "65200",
-            "keepalive": "60"
-        },
-        "10.0.0.9": {
-            "rrclient": 0,
-            "name": "ARISTA05T2",
-            "local_addr": "10.0.0.8",
-            "nhopself": 0,
-            "holdtime": "180",
-            "asn": "65200",
-            "keepalive": "60"
-        },
-        "10.0.0.11": {
-            "rrclient": 0,
-            "name": "ARISTA06T2",
-            "local_addr": "10.0.0.10",
-            "nhopself": 0,
-            "holdtime": "180",
-            "asn": "65200",
-            "keepalive": "60"
-        },
-        "10.0.0.13": {
-            "rrclient": 0,
-            "name": "ARISTA07T2",
-            "local_addr": "10.0.0.12",
-            "nhopself": 0,
-            "holdtime": "180",
-            "asn": "65200",
-            "keepalive": "60"
-        },
-        "10.0.0.15": {
-            "rrclient": 0,
-            "name": "ARISTA08T2",
-            "local_addr": "10.0.0.14",
-            "nhopself": 0,
-            "holdtime": "180",
-            "asn": "65200",
-            "keepalive": "60"
-        },
-        "10.0.0.17": {
-            "rrclient": 0,
-            "name": "ARISTA09T2",
-            "local_addr": "10.0.0.16",
-            "nhopself": 0,
-            "holdtime": "180",
-            "asn": "65200",
-            "keepalive": "60"
-        },
-        "10.0.0.19": {
-            "rrclient": 0,
-            "name": "ARISTA10T2",
-            "local_addr": "10.0.0.18",
-            "nhopself": 0,
-            "holdtime": "180",
-            "asn": "65200",
-            "keepalive": "60"
-        },
-        "10.0.0.21": {
-            "rrclient": 0,
-            "name": "ARISTA11T2",
-            "local_addr": "10.0.0.20",
-            "nhopself": 0,
-            "holdtime": "180",
-            "asn": "65200",
-            "keepalive": "60"
-        },
-        "10.0.0.23": {
-            "rrclient": 0,
-            "name": "ARISTA12T2",
-            "local_addr": "10.0.0.22",
-            "nhopself": 0,
-            "holdtime": "180",
-            "asn": "65200",
-            "keepalive": "60"
-        },
-        "10.0.0.25": {
-            "rrclient": 0,
-            "name": "ARISTA13T2",
-            "local_addr": "10.0.0.24",
-            "nhopself": 0,
-            "holdtime": "180",
-            "asn": "65200",
-            "keepalive": "60"
-        },
-        "10.0.0.27": {
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-            "asn": "64015",
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-        },
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-            "asn": "64016",
-            "keepalive": "60"
-        }
-    },
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-        "Ethernet8|10.0.0.2/31": {},
-        "Ethernet16|10.0.0.4/31": {},
-        "Ethernet24|10.0.0.6/31": {},
-        "Ethernet32|10.0.0.8/31": {},
-        "Ethernet40|10.0.0.10/31": {},
-        "Ethernet48|10.0.0.12/31": {},
-        "Ethernet56|10.0.0.14/31": {},
-        "Ethernet64|10.0.0.16/31": {},
-        "Ethernet72|10.0.0.18/31": {},
-        "Ethernet80|10.0.0.20/31": {},
-        "Ethernet88|10.0.0.22/31": {},
-        "Ethernet96|10.0.0.24/31": {},
-        "Ethernet104|10.0.0.26/31": {},
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-        "Ethernet184|10.0.0.46/31": {},
-        "Ethernet192|10.0.0.48/31": {},
-        "Ethernet200|10.0.0.50/31": {},
-        "Ethernet208|10.0.0.52/31": {},
-        "Ethernet216|10.0.0.54/31": {},
-        "Ethernet224|10.0.0.56/31": {},
-        "Ethernet232|10.0.0.58/31": {},
-        "Ethernet240|10.0.0.60/31": {},
-        "Ethernet248|10.0.0.62/31": {}
-    },
-    "MID_PLANE_BRIDGE": {
-        "GLOBAL": {
-            "bridge": "bridge_midplane",
-            "ip_prefix": "169.254.200.254/24"
-        }
-    },
-    "DHCP_SERVER_IPV4": {
-        "bridge_midplane": {
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-            "lease_time": "3600",
-            "mode": "PORT",
-            "netmask": "255.255.255.0",
-            "state": "enabled"
-        }
-    },
-    "DHCP_SERVER_IPV4_PORT": {
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-            "ips": [
-                "169.254.200.1"
-            ]
-        },
-        "bridge_midplane|dpu1": {
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-                "169.254.200.2"
-            ]
-        },
-        "bridge_midplane|dpu2": {
-            "ips": [
-                "169.254.200.3"
-            ]
-        },
-        "bridge_midplane|dpu3": {
-            "ips": [
-                "169.254.200.4"
-            ]
-        }
-    }
-}
+	"BGP_NEIGHBOR": {
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+			"holdtime": "180",
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+			"local_addr": "10.0.0.0",
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+		},
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+			"local_addr": "10.0.0.4",
+			"name": "ARISTA03T2",
+			"nhopself": 0,
+			"rrclient": 0
+		},
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+			"local_addr": "10.0.0.50",
+			"name": "ARISTA10T0",
+			"nhopself": 0,
+			"rrclient": 0
+		},
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+			"local_addr": "10.0.0.52",
+			"name": "ARISTA11T0",
+			"nhopself": 0,
+			"rrclient": 0
+		},
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+			"local_addr": "10.0.0.54",
+			"name": "ARISTA12T0",
+			"nhopself": 0,
+			"rrclient": 0
+		},
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+			"local_addr": "10.0.0.56",
+			"name": "ARISTA13T0",
+			"nhopself": 0,
+			"rrclient": 0
+		},
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+			"local_addr": "10.0.0.58",
+			"name": "ARISTA14T0",
+			"nhopself": 0,
+			"rrclient": 0
+		},
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+			"local_addr": "10.0.0.60",
+			"name": "ARISTA15T0",
+			"nhopself": 0,
+			"rrclient": 0
+		},
+		"10.0.0.63": {
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+			"holdtime": "180",
+			"keepalive": "60",
+			"local_addr": "10.0.0.62",
+			"name": "ARISTA16T0",
+			"nhopself": 0,
+			"rrclient": 0
+		},
+		"10.0.0.7": {
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+			"holdtime": "180",
+			"keepalive": "60",
+			"local_addr": "10.0.0.6",
+			"name": "ARISTA04T2",
+			"nhopself": 0,
+			"rrclient": 0
+		},
+		"10.0.0.9": {
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+			"holdtime": "180",
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+			"local_addr": "10.0.0.8",
+			"name": "ARISTA05T2",
+			"nhopself": 0,
+			"rrclient": 0
+		}
+	},
+	"DEVICE_METADATA": {
+		"localhost": {
+			"bgp_asn": "65100",
+			"hostname": "sonic",
+			"hwsku": "SSwitch-32x1000Gb",
+			"subtype": "SmartSwitch",
+			"type": "LeafRouter"
+		}
+	},
+	"DEVICE_NEIGHBOR": {},
+	"DHCP_SERVER_IPV4": {
+		"bridge-midplane": {
+			"customized_options": [
+				"option60",
+				"option223"
+			],
+			"gateway": "169.254.200.254",
+			"lease_time": "3600",
+			"mode": "PORT",
+			"netmask": "255.255.255.0",
+			"state": "enabled"
+		}
+	},
+	"DHCP_SERVER_IPV4_PORT": {
+		"bridge-midplane|dpu0": {
+			"ips": [
+				"169.254.200.1"
+			]
+		},
+		"bridge-midplane|dpu1": {
+			"ips": [
+				"169.254.200.2"
+			]
+		},
+		"bridge-midplane|dpu2": {
+			"ips": [
+				"169.254.200.3"
+			]
+		},
+		"bridge-midplane|dpu3": {
+			"ips": [
+				"169.254.200.4"
+			]
+		}
+	},
+	"DPUS": {
+		"dpu0": {
+			"midplane_interface": "dpu0"
+		},
+		"dpu1": {
+			"midplane_interface": "dpu1"
+		},
+		"dpu2": {
+			"midplane_interface": "dpu2"
+		},
+		"dpu3": {
+			"midplane_interface": "dpu3"
+		}
+	},
+	"FEATURE": {
+		"dhcp_relay": {
+			"auto_restart": "enabled",
+			"check_up_status": "False",
+			"delayed": "False",
+			"has_global_scope": "True",
+			"has_per_asic_scope": "False",
+			"high_mem_alert": "disabled",
+			"set_owner": "local",
+			"state": "enabled",
+			"support_syslog_rate_limit": "True"
+		},
+		"dhcp_server": {
+			"auto_restart": "enabled",
+			"check_up_status": "False",
+			"delayed": "False",
+			"has_global_scope": "True",
+			"has_per_asic_scope": "False",
+			"high_mem_alert": "disabled",
+			"set_owner": "local",
+			"state": "enabled",
+			"support_syslog_rate_limit": "False"
+		}
+	},
+	"FLEX_COUNTER_TABLE": {
+		"ACL": {
+			"FLEX_COUNTER_DELAY_STATUS": "true",
+			"FLEX_COUNTER_STATUS": "disable",
+			"POLL_INTERVAL": "10000"
+		}
+	},
+	"INTERFACE": {
+		"Ethernet0|10.0.0.0/31": {},
+		"Ethernet104|10.0.0.26/31": {},
+		"Ethernet112|10.0.0.28/31": {},
+		"Ethernet120|10.0.0.30/31": {},
+		"Ethernet128|10.0.0.32/31": {},
+		"Ethernet136|10.0.0.34/31": {},
+		"Ethernet144|10.0.0.36/31": {},
+		"Ethernet152|10.0.0.38/31": {},
+		"Ethernet160|10.0.0.40/31": {},
+		"Ethernet168|10.0.0.42/31": {},
+		"Ethernet16|10.0.0.4/31": {},
+		"Ethernet176|10.0.0.44/31": {},
+		"Ethernet184|10.0.0.46/31": {},
+		"Ethernet192|10.0.0.48/31": {},
+		"Ethernet200|10.0.0.50/31": {},
+		"Ethernet208|10.0.0.52/31": {},
+		"Ethernet216|10.0.0.54/31": {},
+		"Ethernet224|10.0.0.56/31": {},
+		"Ethernet232|10.0.0.58/31": {},
+		"Ethernet240|10.0.0.60/31": {},
+		"Ethernet248|10.0.0.62/31": {},
+		"Ethernet24|10.0.0.6/31": {},
+		"Ethernet32|10.0.0.8/31": {},
+		"Ethernet40|10.0.0.10/31": {},
+		"Ethernet48|10.0.0.12/31": {},
+		"Ethernet56|10.0.0.14/31": {},
+		"Ethernet64|10.0.0.16/31": {},
+		"Ethernet72|10.0.0.18/31": {},
+		"Ethernet80|10.0.0.20/31": {},
+		"Ethernet88|10.0.0.22/31": {},
+		"Ethernet8|10.0.0.2/31": {},
+		"Ethernet96|10.0.0.24/31": {}
+	},
+	"LOOPBACK_INTERFACE": {
+		"Loopback0|10.1.0.1/32": {}
+	},
+	"PORT": {
+		"Ethernet0": {
+			"admin_status": "up",
+			"alias": "etp1",
+			"lanes": "0,1,2,3,4,5,6,7",
+			"mtu": "9100"
+		},
+		"Ethernet104": {
+			"admin_status": "up",
+			"alias": "etp14",
+			"lanes": "104,105,106,107,108,109,110,111",
+			"mtu": "9100"
+		},
+		"Ethernet112": {
+			"admin_status": "up",
+			"alias": "etp15",
+			"lanes": "112,113,114,115,116,117,118,119",
+			"mtu": "9100"
+		},
+		"Ethernet120": {
+			"admin_status": "up",
+			"alias": "etp16",
+			"lanes": "120,121,122,123,124,125,126,127",
+			"mtu": "9100"
+		},
+		"Ethernet128": {
+			"admin_status": "up",
+			"alias": "etp17",
+			"lanes": "128,129,130,131,132,133,134,135",
+			"mtu": "9100"
+		},
+		"Ethernet136": {
+			"admin_status": "up",
+			"alias": "etp18",
+			"lanes": "136,137,138,139,140,141,142,143",
+			"mtu": "9100"
+		},
+		"Ethernet144": {
+			"admin_status": "up",
+			"alias": "etp19",
+			"lanes": "144,145,146,147,148,149,150,151",
+			"mtu": "9100"
+		},
+		"Ethernet152": {
+			"admin_status": "up",
+			"alias": "etp20",
+			"lanes": "152,153,154,155,156,157,158,159",
+			"mtu": "9100"
+		},
+		"Ethernet16": {
+			"admin_status": "up",
+			"alias": "etp3",
+			"lanes": "16,17,18,19,20,21,22,23",
+			"mtu": "9100"
+		},
+		"Ethernet160": {
+			"admin_status": "up",
+			"alias": "etp21",
+			"lanes": "160,161,162,163,164,165,166,167",
+			"mtu": "9100"
+		},
+		"Ethernet168": {
+			"admin_status": "up",
+			"alias": "etp22",
+			"lanes": "168,169,170,171,172,173,174,175",
+			"mtu": "9100"
+		},
+		"Ethernet176": {
+			"admin_status": "up",
+			"alias": "etp23",
+			"lanes": "176,177,178,179,180,181,182,183",
+			"mtu": "9100"
+		},
+		"Ethernet184": {
+			"admin_status": "up",
+			"alias": "etp24",
+			"lanes": "184,185,186,187,188,189,190,191",
+			"mtu": "9100"
+		},
+		"Ethernet192": {
+			"admin_status": "up",
+			"alias": "etp25",
+			"lanes": "192,193,194,195,196,197,198,199",
+			"mtu": "9100"
+		},
+		"Ethernet200": {
+			"admin_status": "up",
+			"alias": "etp26",
+			"lanes": "200,201,202,203,204,205,206,207",
+			"mtu": "9100"
+		},
+		"Ethernet208": {
+			"admin_status": "up",
+			"alias": "etp27",
+			"lanes": "208,209,210,211,212,213,214,215",
+			"mtu": "9100"
+		},
+		"Ethernet216": {
+			"admin_status": "up",
+			"alias": "etp28",
+			"lanes": "216,217,218,219,220,221,222,223",
+			"mtu": "9100"
+		},
+		"Ethernet224": {
+			"admin_status": "up",
+			"alias": "etp29",
+			"lanes": "224,225,226,227,228,229,230,231",
+			"mtu": "9100"
+		},
+		"Ethernet232": {
+			"admin_status": "up",
+			"alias": "etp30",
+			"lanes": "232,233,234,235,236,237,238,239",
+			"mtu": "9100"
+		},
+		"Ethernet24": {
+			"admin_status": "up",
+			"alias": "etp4",
+			"lanes": "24,25,26,27,28,29,30,31",
+			"mtu": "9100"
+		},
+		"Ethernet240": {
+			"admin_status": "up",
+			"alias": "etp31",
+			"lanes": "240,241,242,243,244,245,246,247",
+			"mtu": "9100"
+		},
+		"Ethernet248": {
+			"admin_status": "up",
+			"alias": "etp32",
+			"lanes": "248,249,250,251,252,253,254,255",
+			"mtu": "9100"
+		},
+		"Ethernet32": {
+			"admin_status": "up",
+			"alias": "etp5",
+			"lanes": "32,33,34,35,36,37,38,39",
+			"mtu": "9100"
+		},
+		"Ethernet40": {
+			"admin_status": "up",
+			"alias": "etp6",
+			"lanes": "40,41,42,43,44,45,46,47",
+			"mtu": "9100"
+		},
+		"Ethernet48": {
+			"admin_status": "up",
+			"alias": "etp7",
+			"lanes": "48,49,50,51,52,53,54,55",
+			"mtu": "9100"
+		},
+		"Ethernet56": {
+			"admin_status": "up",
+			"alias": "etp8",
+			"lanes": "56,57,58,59,60,61,62,63",
+			"mtu": "9100"
+		},
+		"Ethernet64": {
+			"admin_status": "up",
+			"alias": "etp9",
+			"lanes": "64,65,66,67,68,69,70,71",
+			"mtu": "9100"
+		},
+		"Ethernet72": {
+			"admin_status": "up",
+			"alias": "etp10",
+			"lanes": "72,73,74,75,76,77,78,79",
+			"mtu": "9100"
+		},
+		"Ethernet8": {
+			"admin_status": "up",
+			"alias": "etp2",
+			"lanes": "8,9,10,11,12,13,14,15",
+			"mtu": "9100"
+		},
+		"Ethernet80": {
+			"admin_status": "up",
+			"alias": "etp11",
+			"lanes": "80,81,82,83,84,85,86,87",
+			"mtu": "9100"
+		},
+		"Ethernet88": {
+			"admin_status": "up",
+			"alias": "etp12",
+			"lanes": "88,89,90,91,92,93,94,95",
+			"mtu": "9100"
+		},
+		"Ethernet96": {
+			"admin_status": "up",
+			"alias": "etp13",
+			"lanes": "96,97,98,99,100,101,102,103",
+			"mtu": "9100"
+		}
+	}
+}
\ No newline at end of file
diff --git a/src/sonic-config-engine/tests/t1-ss-dpu-sample-port-config.ini b/src/sonic-config-engine/tests/t1-ss-dpu-sample-port-config.ini
new file mode 100644
index 000000000..eb8916447
--- /dev/null
+++ b/src/sonic-config-engine/tests/t1-ss-dpu-sample-port-config.ini
@@ -0,0 +1,2 @@
+# name          lanes                               alias     
+Ethernet0       0,1,2,3,4,5,6,7                     etp1      
diff --git a/src/sonic-config-engine/tests/test_j2files.py b/src/sonic-config-engine/tests/test_j2files.py
index 4eca4fdfd..5afd6ed0b 100644
--- a/src/sonic-config-engine/tests/test_j2files.py
+++ b/src/sonic-config-engine/tests/test_j2files.py
@@ -29,6 +29,7 @@ def setUp(self):
         self.t0_port_config = os.path.join(self.test_dir, 't0-sample-port-config.ini')
         self.t0_port_config_tiny = os.path.join(self.test_dir, 't0-sample-port-config-tiny.ini')
         self.t1_ss_port_config = os.path.join(self.test_dir, 't1-ss-sample-port-config.ini')
+        self.t1_ss_dpu_port_config = os.path.join(self.test_dir, 't1-ss-dpu-sample-port-config.ini')
         self.l1_l3_port_config = os.path.join(self.test_dir, 'l1-l3-sample-port-config.ini')
         self.t0_7050cx3_port_config = os.path.join(self.test_dir, 't0_7050cx3_d48c8_port_config.ini')
         self.t1_mlnx_minigraph = os.path.join(self.test_dir, 't1-sample-graph-mlnx.xml')
@@ -323,6 +324,17 @@ def test_t1_smartswitch_template(self):
 
         self.assertTrue(json.dumps(sample_output_json, sort_keys=True) == json.dumps(output_json, sort_keys=True))
 
+    def test_t1_smartswitch_dpu_template(self):
+        argument = ['-k', 'SS-DPU-1x400Gb', '--preset', 't1-smartswitch', '-p', self.t1_ss_dpu_port_config]
+        output = self.run_script(argument)
+        output_json = json.loads(output)
+
+        sample_output_file = os.path.join(self.test_dir, 'sample_output', 't1-smartswitch-dpu.json')
+        with open(sample_output_file) as sample_output_fd:
+            sample_output_json = json.load(sample_output_fd)
+
+        self.assertTrue(json.dumps(sample_output_json, sort_keys=True) == json.dumps(output_json, sort_keys=True))
+
     def test_qos_arista7050_render_template(self):
         self._test_qos_render_template('arista', 'x86_64-arista_7050_qx32s', 'Arista-7050-QX-32S', 'sample-arista-7050-t0-minigraph.xml', 'qos-arista7050.json')
 

From 611c8168f4a9dd864f0b50caf046b008a9bd70fc Mon Sep 17 00:00:00 2001
From: Vivek <vkarri@nvidia.com>
Date: Fri, 19 Jul 2024 15:23:55 -0700
Subject: [PATCH 0835/1115] [Mellanox] Add support for SN4280 platform (#19312)

[Mellanox] Add support for SN4280 platform

Signed-off-by: Vivek Reddy <vkarri@nvidia.com>
---
 .../ACS-SN4280/buffers.json.j2                |  18 +
 .../ACS-SN4280/buffers_defaults_objects.j2    |   1 +
 .../ACS-SN4280/buffers_defaults_t0.j2         |  43 ++
 .../ACS-SN4280/buffers_defaults_t1.j2         |  44 ++
 .../ACS-SN4280/buffers_dynamic.json.j2        |  19 +
 .../ACS-SN4280/hwsku.json                     | 140 ++++
 .../ACS-SN4280/pg_profile_lookup.ini          |  53 ++
 .../ACS-SN4280/port_config.ini                |  51 ++
 .../ACS-SN4280/qos.json.j2                    |   1 +
 .../ACS-SN4280/sai.profile                    |   1 +
 .../ACS-SN4280/sai_4280.xml                   | 265 +++++++
 .../Mellanox-SN4280-O28/buffers.json.j2       |   1 +
 .../buffers_defaults_objects.j2               |   1 +
 .../buffers_defaults_t0.j2                    |   1 +
 .../buffers_defaults_t1.j2                    |   1 +
 .../buffers_dynamic.json.j2                   |   1 +
 .../Mellanox-SN4280-O28/hwsku.json            |   1 +
 .../Mellanox-SN4280-O28/pg_profile_lookup.ini |   1 +
 .../Mellanox-SN4280-O28/port_config.ini       |   1 +
 .../Mellanox-SN4280-O28/qos.json.j2           |   1 +
 .../Mellanox-SN4280-O28/sai.profile           |   3 +
 .../Mellanox-SN4280-O28/sai_4280.xml          |   1 +
 .../x86_64-nvidia_sn4280-r0/default_sku       |   1 +
 .../x86_64-nvidia_sn4280-r0/installer.conf    |   1 +
 .../x86_64-nvidia_sn4280-r0/pcie.yaml         | 378 ++++++++++
 .../x86_64-nvidia_sn4280-r0/platform.json     | 664 ++++++++++++++++++
 .../x86_64-nvidia_sn4280-r0/platform_asic     |   1 +
 .../platform_components.json                  |  18 +
 .../x86_64-nvidia_sn4280-r0/platform_wait     |   1 +
 .../x86_64-nvidia_sn4280-r0/plugins/eeprom.py |   1 +
 .../plugins/psuutil.py                        |   1 +
 .../plugins/sfplpmget.py                      |   1 +
 .../plugins/sfplpmset.py                      |   1 +
 .../plugins/sfpreset.py                       |   1 +
 .../plugins/sfputil.py                        |   1 +
 .../pmon_daemon_control.json                  |   1 +
 .../x86_64-nvidia_sn4280-r0/pre_reboot_hook   |   1 +
 .../x86_64-nvidia_sn4280-r0/sensors.conf      | 565 +++++++++++++++
 .../x86_64-nvidia_sn4280-r0/services.conf     |   1 +
 .../system_health_monitoring_config.json      |   1 +
 .../thermal_policy.json                       |   1 +
 platform/mellanox/asic_table.j2               |   1 +
 .../sonic_platform/component.py               |  54 +-
 .../sonic_platform/device_data.py             |  11 +-
 .../mlnx-platform-api/tests/test_component.py |  49 +-
 45 files changed, 2396 insertions(+), 8 deletions(-)
 create mode 100644 device/mellanox/x86_64-nvidia_sn4280-r0/ACS-SN4280/buffers.json.j2
 create mode 120000 device/mellanox/x86_64-nvidia_sn4280-r0/ACS-SN4280/buffers_defaults_objects.j2
 create mode 100644 device/mellanox/x86_64-nvidia_sn4280-r0/ACS-SN4280/buffers_defaults_t0.j2
 create mode 100644 device/mellanox/x86_64-nvidia_sn4280-r0/ACS-SN4280/buffers_defaults_t1.j2
 create mode 100644 device/mellanox/x86_64-nvidia_sn4280-r0/ACS-SN4280/buffers_dynamic.json.j2
 create mode 100644 device/mellanox/x86_64-nvidia_sn4280-r0/ACS-SN4280/hwsku.json
 create mode 100644 device/mellanox/x86_64-nvidia_sn4280-r0/ACS-SN4280/pg_profile_lookup.ini
 create mode 100644 device/mellanox/x86_64-nvidia_sn4280-r0/ACS-SN4280/port_config.ini
 create mode 120000 device/mellanox/x86_64-nvidia_sn4280-r0/ACS-SN4280/qos.json.j2
 create mode 100644 device/mellanox/x86_64-nvidia_sn4280-r0/ACS-SN4280/sai.profile
 create mode 100644 device/mellanox/x86_64-nvidia_sn4280-r0/ACS-SN4280/sai_4280.xml
 create mode 120000 device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/buffers.json.j2
 create mode 120000 device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/buffers_defaults_objects.j2
 create mode 120000 device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/buffers_defaults_t0.j2
 create mode 120000 device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/buffers_defaults_t1.j2
 create mode 120000 device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/buffers_dynamic.json.j2
 create mode 120000 device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/hwsku.json
 create mode 120000 device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/pg_profile_lookup.ini
 create mode 120000 device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/port_config.ini
 create mode 120000 device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/qos.json.j2
 create mode 100644 device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/sai.profile
 create mode 120000 device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/sai_4280.xml
 create mode 100644 device/mellanox/x86_64-nvidia_sn4280-r0/default_sku
 create mode 100644 device/mellanox/x86_64-nvidia_sn4280-r0/installer.conf
 create mode 100644 device/mellanox/x86_64-nvidia_sn4280-r0/pcie.yaml
 create mode 100644 device/mellanox/x86_64-nvidia_sn4280-r0/platform.json
 create mode 100644 device/mellanox/x86_64-nvidia_sn4280-r0/platform_asic
 create mode 100644 device/mellanox/x86_64-nvidia_sn4280-r0/platform_components.json
 create mode 120000 device/mellanox/x86_64-nvidia_sn4280-r0/platform_wait
 create mode 120000 device/mellanox/x86_64-nvidia_sn4280-r0/plugins/eeprom.py
 create mode 120000 device/mellanox/x86_64-nvidia_sn4280-r0/plugins/psuutil.py
 create mode 120000 device/mellanox/x86_64-nvidia_sn4280-r0/plugins/sfplpmget.py
 create mode 120000 device/mellanox/x86_64-nvidia_sn4280-r0/plugins/sfplpmset.py
 create mode 120000 device/mellanox/x86_64-nvidia_sn4280-r0/plugins/sfpreset.py
 create mode 120000 device/mellanox/x86_64-nvidia_sn4280-r0/plugins/sfputil.py
 create mode 120000 device/mellanox/x86_64-nvidia_sn4280-r0/pmon_daemon_control.json
 create mode 120000 device/mellanox/x86_64-nvidia_sn4280-r0/pre_reboot_hook
 create mode 100644 device/mellanox/x86_64-nvidia_sn4280-r0/sensors.conf
 create mode 100644 device/mellanox/x86_64-nvidia_sn4280-r0/services.conf
 create mode 120000 device/mellanox/x86_64-nvidia_sn4280-r0/system_health_monitoring_config.json
 create mode 120000 device/mellanox/x86_64-nvidia_sn4280-r0/thermal_policy.json

diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/ACS-SN4280/buffers.json.j2 b/device/mellanox/x86_64-nvidia_sn4280-r0/ACS-SN4280/buffers.json.j2
new file mode 100644
index 000000000..e7817793b
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/ACS-SN4280/buffers.json.j2
@@ -0,0 +1,18 @@
+{#
+    Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+    Apache-2.0
+
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+
+    http://www.apache.org/licenses/LICENSE-2.0
+
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+#}
+{%- set default_topo = 't1' %}
+{%- include 'buffers_config.j2' %}
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/ACS-SN4280/buffers_defaults_objects.j2 b/device/mellanox/x86_64-nvidia_sn4280-r0/ACS-SN4280/buffers_defaults_objects.j2
new file mode 120000
index 000000000..09998eb83
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/ACS-SN4280/buffers_defaults_objects.j2
@@ -0,0 +1 @@
+../../x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/buffers_defaults_objects.j2
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/ACS-SN4280/buffers_defaults_t0.j2 b/device/mellanox/x86_64-nvidia_sn4280-r0/ACS-SN4280/buffers_defaults_t0.j2
new file mode 100644
index 000000000..0814c1027
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/ACS-SN4280/buffers_defaults_t0.j2
@@ -0,0 +1,43 @@
+{#
+    Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+    Apache-2.0
+
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+    http://www.apache.org/licenses/LICENSE-2.0
+
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+#}
+{% set default_cable = '40m' %}
+{%-set ports2cable = {
+            'leafrouter_torrouter' : '300m',
+            'torrouter_server' : '40m'
+       }
+-%}
+{% set ingress_lossless_pool_size =  '52064208' %}
+{% set ingress_lossless_pool_xoff  =  '3461040' %}
+{% set egress_lossless_pool_size =  '60817392' %}
+{% set egress_lossy_pool_size =  '52064208' %}
+
+{% import 'buffers_defaults_objects.j2' as defs with context %}
+
+{%- macro generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) %}
+{{ defs.generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_profile_lists_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_profile_lists(port_names_active, port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_queue_buffers_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_queue_buffers(port_names_active, port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_pg_profiles_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_pg_profiles(port_names_active, port_names_inactive) }}
+{%- endmacro %}
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/ACS-SN4280/buffers_defaults_t1.j2 b/device/mellanox/x86_64-nvidia_sn4280-r0/ACS-SN4280/buffers_defaults_t1.j2
new file mode 100644
index 000000000..c816c29f5
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/ACS-SN4280/buffers_defaults_t1.j2
@@ -0,0 +1,44 @@
+{#
+    Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+    Apache-2.0
+
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+    http://www.apache.org/licenses/LICENSE-2.0
+
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+#}
+{% set default_cable = '300m' %}
+{%-set ports2cable = {
+            'spinerouter_leafrouter' : '2000m',
+            'leafrouter_torrouter' : '300m'
+       }
+-%}
+{% set ingress_lossless_pool_size =  '46743552' %}
+{% set ingress_lossless_pool_xoff  =  '8781696' %}
+{% set egress_lossless_pool_size =  '60817392' %}
+{% set egress_lossy_pool_size =  '46743552' %}
+
+{% import 'buffers_defaults_objects.j2' as defs with context %}
+
+{%- macro generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) %}
+{{ defs.generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_profile_lists_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_profile_lists(port_names_active, port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_queue_buffers_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_queue_buffers(port_names_active, port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_pg_profiles_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_pg_profiles(port_names_active, port_names_inactive) }}
+{%- endmacro %}
+
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/ACS-SN4280/buffers_dynamic.json.j2 b/device/mellanox/x86_64-nvidia_sn4280-r0/ACS-SN4280/buffers_dynamic.json.j2
new file mode 100644
index 000000000..54964e94b
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/ACS-SN4280/buffers_dynamic.json.j2
@@ -0,0 +1,19 @@
+{#
+    Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+    Apache-2.0
+
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+
+    http://www.apache.org/licenses/LICENSE-2.0
+
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+#}
+{%- set default_topo = 't1' %}
+{%- set dynamic_mode = 'true' %}
+{%- include 'buffers_config.j2' %}
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/ACS-SN4280/hwsku.json b/device/mellanox/x86_64-nvidia_sn4280-r0/ACS-SN4280/hwsku.json
new file mode 100644
index 000000000..44cce9bf4
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/ACS-SN4280/hwsku.json
@@ -0,0 +1,140 @@
+{
+    "interfaces": {
+        "Ethernet0": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
+        },
+        "Ethernet8": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
+        },
+        "Ethernet16": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
+        },
+        "Ethernet24": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
+        },
+        "Ethernet32": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
+        },
+        "Ethernet40": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
+        },
+        "Ethernet48": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
+        },
+        "Ethernet56": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
+        },
+        "Ethernet64": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
+        },
+        "Ethernet72": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
+        },
+        "Ethernet80": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
+        },
+        "Ethernet88": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
+        },
+        "Ethernet96": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
+        },
+        "Ethernet104": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
+        },
+        "Ethernet112": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
+        },
+        "Ethernet120": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
+        },
+        "Ethernet128": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
+        },
+        "Ethernet136": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
+        },
+        "Ethernet144": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
+        },
+        "Ethernet152": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
+        },
+        "Ethernet160": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
+        },
+        "Ethernet168": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
+        },
+        "Ethernet176": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
+        },
+        "Ethernet184": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
+        },
+        "Ethernet192": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
+        },
+        "Ethernet200": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
+        },
+        "Ethernet208": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
+        },
+        "Ethernet216": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1"
+        },
+        "Ethernet224": {
+            "default_brkout_mode": "1x400G",
+            "subport": "1",
+            "autoneg": "on",
+            "role": "Dpc"
+        },
+        "Ethernet232": {
+            "default_brkout_mode": "1x400G",
+            "subport": "1",
+            "autoneg": "on",
+            "role": "Dpc"
+        },
+        "Ethernet240": {
+            "default_brkout_mode": "1x400G",
+            "subport": "1",
+            "autoneg": "on",
+            "role": "Dpc"
+        },
+        "Ethernet248": {
+            "default_brkout_mode": "1x400G",
+            "subport": "1",
+            "autoneg": "on",
+            "role": "Dpc"
+        }
+    }
+}
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/ACS-SN4280/pg_profile_lookup.ini b/device/mellanox/x86_64-nvidia_sn4280-r0/ACS-SN4280/pg_profile_lookup.ini
new file mode 100644
index 000000000..9fbb8eacf
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/ACS-SN4280/pg_profile_lookup.ini
@@ -0,0 +1,53 @@
+##
+## Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+## Apache-2.0
+##
+## Licensed under the Apache License, Version 2.0 (the "License");
+## you may not use this file except in compliance with the License.
+## You may obtain a copy of the License at
+##
+## http://www.apache.org/licenses/LICENSE-2.0
+##
+## Unless required by applicable law or agreed to in writing, software
+## distributed under the License is distributed on an "AS IS" BASIS,
+## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+## See the License for the specific language governing permissions and
+## limitations under the License.
+##
+#  PG lossless profiles.
+# speed cable  size   xon    xoff   threshold
+  10000    5m 19456  19456  16384          0
+  25000    5m 19456  19456  17408          0
+  40000    5m 19456  19456  19456          0
+  50000    5m 19456  19456  21504          0
+ 100000    5m 19456  19456  37888          0
+ 200000    5m 19456  19456  43008          0
+ 400000    5m 38912  38912  73728          0
+  10000   40m 19456  19456  16384          0
+  25000   40m 19456  19456  18432          0
+  40000   40m 19456  19456  21504          0
+  50000   40m 19456  19456  23552          0
+ 100000   40m 19456  19456  43008          0
+ 200000   40m 19456  19456  51200          0
+ 400000   40m 38912  38912  91136          0
+  10000  300m 19456  19456  19456          0
+  25000  300m 19456  19456  26624          0
+  40000  300m 19456  19456  34816          0
+  50000  300m 19456  19456  40960          0
+ 100000  300m 19456  19456  75776          0
+ 200000  300m 19456  19456  118784         0
+ 400000  300m 38912  38912  225280         0
+  10000 1500m 19456  19456  35840          0
+  25000 1500m 19456  19456  65536          0
+  40000 1500m 19456  19456  96256          0
+  50000 1500m 19456  19456  117760         0
+ 100000 1500m 19456  19456  230400         0
+ 200000 1500m 19456  19456  427008         0
+ 400000 1500m 38912  38912  427008         0
+  10000 2000m 19456  19456  41984          0
+  25000 2000m 19456  19456  80896          0
+  40000 2000m 19456  19456  121856         0
+  50000 2000m 19456  19456  149504         0
+ 100000 2000m 19456  19456  293888         0
+ 200000 2000m 19456  19456  555008         0
+ 400000 2000m 38912  38912  555008         0
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/ACS-SN4280/port_config.ini b/device/mellanox/x86_64-nvidia_sn4280-r0/ACS-SN4280/port_config.ini
new file mode 100644
index 000000000..5a5faf7b9
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/ACS-SN4280/port_config.ini
@@ -0,0 +1,51 @@
+##
+## Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+## Apache-2.0
+##
+## Licensed under the Apache License, Version 2.0 (the "License");
+## you may not use this file except in compliance with the License.
+## You may obtain a copy of the License at
+##
+## http://www.apache.org/licenses/LICENSE-2.0
+##
+## Unless required by applicable law or agreed to in writing, software
+## distributed under the License is distributed on an "AS IS" BASIS,
+## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+## See the License for the specific language governing permissions and
+## limitations under the License.
+##
+
+
+# name          lanes                               alias     index
+Ethernet0       0,1,2,3,4,5,6,7                     etp1      1
+Ethernet8       8,9,10,11,12,13,14,15               etp2      2
+Ethernet16      16,17,18,19,20,21,22,23             etp3      3
+Ethernet24      24,25,26,27,28,29,30,31             etp4      4
+Ethernet32      32,33,34,35,36,37,38,39             etp5      5
+Ethernet40      40,41,42,43,44,45,46,47             etp6      6
+Ethernet48      48,49,50,51,52,53,54,55             etp7      7
+Ethernet56      56,57,58,59,60,61,62,63             etp8      8
+Ethernet64      64,65,66,67,68,69,70,71             etp9      9
+Ethernet72      72,73,74,75,76,77,78,79             etp10     10
+Ethernet80      80,81,82,83,84,85,86,87             etp11     11
+Ethernet88      88,89,90,91,92,93,94,95             etp12     12
+Ethernet96      96,97,98,99,100,101,102,103         etp13     13
+Ethernet104     104,105,106,107,108,109,110,111     etp14     14
+Ethernet112     112,113,114,115,116,117,118,119     etp15     15
+Ethernet120     120,121,122,123,124,125,126,127     etp16     16
+Ethernet128     128,129,130,131,132,133,134,135     etp17     17
+Ethernet136     136,137,138,139,140,141,142,143     etp18     18
+Ethernet144     144,145,146,147,148,149,150,151     etp19     19
+Ethernet152     152,153,154,155,156,157,158,159     etp20     20
+Ethernet160     160,161,162,163,164,165,166,167     etp21     21
+Ethernet168     168,169,170,171,172,173,174,175     etp22     22
+Ethernet176     176,177,178,179,180,181,182,183     etp23     23
+Ethernet184     184,185,186,187,188,189,190,191     etp24     24
+Ethernet192     192,193,194,195,196,197,198,199     etp25     25
+Ethernet200     200,201,202,203,204,205,206,207     etp26     26
+Ethernet208     208,209,210,211,212,213,214,215     etp27     27
+Ethernet216     216,217,218,219,220,221,222,223     etp28     28
+Ethernet224     224,225,226,227,228,229,230,231     etp29     29
+Ethernet232     232,233,234,235,236,237,238,239     etp30     30
+Ethernet240     240,241,242,243,244,245,246,247     etp31     31
+Ethernet248     248,249,250,251,252,253,254,255     etp32     32
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/ACS-SN4280/qos.json.j2 b/device/mellanox/x86_64-nvidia_sn4280-r0/ACS-SN4280/qos.json.j2
new file mode 120000
index 000000000..eccf286dc
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/ACS-SN4280/qos.json.j2
@@ -0,0 +1 @@
+../../x86_64-mlnx_msn2700-r0/ACS-MSN2700/qos.json.j2
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/ACS-SN4280/sai.profile b/device/mellanox/x86_64-nvidia_sn4280-r0/ACS-SN4280/sai.profile
new file mode 100644
index 000000000..33a14a2ec
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/ACS-SN4280/sai.profile
@@ -0,0 +1 @@
+SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_4280.xml
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/ACS-SN4280/sai_4280.xml b/device/mellanox/x86_64-nvidia_sn4280-r0/ACS-SN4280/sai_4280.xml
new file mode 100644
index 000000000..185aae6cf
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/ACS-SN4280/sai_4280.xml
@@ -0,0 +1,265 @@
+<?xml version="1.0"?>
+<!--
+  Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+  Apache-2.0
+
+  Licensed under the Apache License, Version 2.0 (the "License");
+  you may not use this file except in compliance with the License.
+  You may obtain a copy of the License at
+
+  http://www.apache.org/licenses/LICENSE-2.0
+
+  Unless required by applicable law or agreed to in writing, software
+  distributed under the License is distributed on an "AS IS" BASIS,
+  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+  See the License for the specific language governing permissions and
+  limitations under the License.
+-->
+<root>
+    <platform_info type="4280">
+
+        <!-- Device MAC address  -->
+        <device-mac-address>00:77:66:55:44:00</device-mac-address>
+
+        <!-- ISSU enabled -->
+        <issu-enabled>1</issu-enabled>
+
+        <!-- Number of ports in the following port list -->
+        <number-of-physical-ports>32</number-of-physical-ports>
+
+        <!-- Global port late create -->
+        <late-create-all-ports>1</late-create-all-ports>
+
+        <!-- List of ports in the device -->
+        <ports-list>
+            <port-info>
+                <local-port>1</local-port>
+                <width>8</width>
+                <module>13</module>
+
+                <!-- 0 none, 1=2, 2=4, 3=2,4 -->
+                <breakout-modes>3</breakout-modes>
+
+                <!-- (BITMASK) 2 - 1Gb , 16 - 10Gb , 32 - 40Gb , 384 - 50Gb , 1536 - 100Gb , 4096 - 200Gb -->
+                <port-speed>32768</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>5</local-port>
+                <width>8</width>
+                <module>12</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>32768</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>9</local-port>
+                <width>8</width>
+                <module>15</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>32768</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>13</local-port>
+                <width>8</width>
+                <module>14</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>32768</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>17</local-port>
+                <width>8</width>
+                <module>17</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>32768</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>21</local-port>
+                <width>8</width>
+                <module>16</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>32768</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>25</local-port>
+                <width>8</width>
+                <module>19</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>32768</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>29</local-port>
+                <width>8</width>
+                <module>18</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>32768</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>33</local-port>
+                <width>8</width>
+                <module>25</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>32768</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>37</local-port>
+                <width>8</width>
+                <module>24</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>32768</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>41</local-port>
+                <width>8</width>
+                <module>27</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>32768</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>45</local-port>
+                <width>8</width>
+                <module>26</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>32768</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>49</local-port>
+                <width>8</width>
+                <module>21</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>32768</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>53</local-port>
+                <width>8</width>
+                <module>20</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>32768</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>57</local-port>
+                <width>8</width>
+                <module>23</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>32768</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>61</local-port>
+                <width>8</width>
+                <module>22</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>32768</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>65</local-port>
+                <width>8</width>
+                <module>10</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>32768</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>69</local-port>
+                <width>8</width>
+                <module>11</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>32768</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>73</local-port>
+                <width>8</width>
+                <module>8</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>32768</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>77</local-port>
+                <width>8</width>
+                <module>9</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>32768</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>81</local-port>
+                <width>8</width>
+                <module>6</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>32768</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>85</local-port>
+                <width>8</width>
+                <module>7</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>32768</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>89</local-port>
+                <width>8</width>
+                <module>4</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>32768</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>93</local-port>
+                <width>8</width>
+                <module>5</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>32768</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>97</local-port>
+                <width>8</width>
+                <module>31</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>32768</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>101</local-port>
+                <width>8</width>
+                <module>30</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>32768</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>105</local-port>
+                <width>8</width>
+                <module>29</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>32768</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>109</local-port>
+                <width>8</width>
+                <module>28</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>32768</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>113</local-port>
+                <width>8</width>
+                <module>2</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>32768</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>117</local-port>
+                <width>8</width>
+                <module>3</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>32768</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>121</local-port>
+                <width>8</width>
+                <module>0</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>32768</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>125</local-port>
+                <width>8</width>
+                <module>1</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>32768</port-speed>
+            </port-info>
+        </ports-list>
+    </platform_info>
+</root>
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/buffers.json.j2 b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/buffers.json.j2
new file mode 120000
index 000000000..16698726c
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/buffers.json.j2
@@ -0,0 +1 @@
+../ACS-SN4280/buffers.json.j2
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/buffers_defaults_objects.j2 b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/buffers_defaults_objects.j2
new file mode 120000
index 000000000..09998eb83
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/buffers_defaults_objects.j2
@@ -0,0 +1 @@
+../../x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/buffers_defaults_objects.j2
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/buffers_defaults_t0.j2 b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/buffers_defaults_t0.j2
new file mode 120000
index 000000000..f6b2affa3
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/buffers_defaults_t0.j2
@@ -0,0 +1 @@
+../ACS-SN4280/buffers_defaults_t0.j2
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/buffers_defaults_t1.j2 b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/buffers_defaults_t1.j2
new file mode 120000
index 000000000..e464a9c5e
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/buffers_defaults_t1.j2
@@ -0,0 +1 @@
+../ACS-SN4280/buffers_defaults_t1.j2
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/buffers_dynamic.json.j2 b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/buffers_dynamic.json.j2
new file mode 120000
index 000000000..12e94d691
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/buffers_dynamic.json.j2
@@ -0,0 +1 @@
+../ACS-SN4280/buffers_dynamic.json.j2
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/hwsku.json b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/hwsku.json
new file mode 120000
index 000000000..049927198
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/hwsku.json
@@ -0,0 +1 @@
+../ACS-SN4280/hwsku.json
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/pg_profile_lookup.ini b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/pg_profile_lookup.ini
new file mode 120000
index 000000000..35b70c764
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/pg_profile_lookup.ini
@@ -0,0 +1 @@
+../ACS-SN4280/pg_profile_lookup.ini
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/port_config.ini b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/port_config.ini
new file mode 120000
index 000000000..155ca39e4
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/port_config.ini
@@ -0,0 +1 @@
+../ACS-SN4280/port_config.ini
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/qos.json.j2 b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/qos.json.j2
new file mode 120000
index 000000000..eb7a6af87
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/qos.json.j2
@@ -0,0 +1 @@
+../ACS-SN4280/qos.json.j2
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/sai.profile b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/sai.profile
new file mode 100644
index 000000000..18fd34bcf
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/sai.profile
@@ -0,0 +1,3 @@
+SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_4280.xml
+SAI_DEFAULT_SWITCHING_MODE_STORE_FORWARD=1
+SAI_NOT_DROP_SIP_DIP_LINK_LOCAL=1
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/sai_4280.xml b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/sai_4280.xml
new file mode 120000
index 000000000..4aa1ca449
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/sai_4280.xml
@@ -0,0 +1 @@
+../ACS-SN4280/sai_4280.xml
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/default_sku b/device/mellanox/x86_64-nvidia_sn4280-r0/default_sku
new file mode 100644
index 000000000..4b5ca0bd1
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/default_sku
@@ -0,0 +1 @@
+ACS-SN4280 t1-smartswitch
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/installer.conf b/device/mellanox/x86_64-nvidia_sn4280-r0/installer.conf
new file mode 100644
index 000000000..b5ee161d1
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/installer.conf
@@ -0,0 +1 @@
+ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="libata.force=noncq module_blacklist=mlx5_ib,mlx5_core"
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/pcie.yaml b/device/mellanox/x86_64-nvidia_sn4280-r0/pcie.yaml
new file mode 100644
index 000000000..c9ef7ee70
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/pcie.yaml
@@ -0,0 +1,378 @@
+##
+## Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+## Apache-2.0
+##
+## Licensed under the Apache License, Version 2.0 (the "License");
+## you may not use this file except in compliance with the License.
+## You may obtain a copy of the License at
+##
+## http://www.apache.org/licenses/LICENSE-2.0
+##
+## Unless required by applicable law or agreed to in writing, software
+## distributed under the License is distributed on an "AS IS" BASIS,
+## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+## See the License for the specific language governing permissions and
+## limitations under the License.
+##
+
+- bus: '00'
+  dev: '00'
+  fn: '0'
+  id: '1450'
+  name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh)
+    Root Complex'
+- bus: '00'
+  dev: '00'
+  fn: '2'
+  id: '1451'
+  name: 'IOMMU: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh) I/O
+    Memory Management Unit'
+- bus: '00'
+  dev: '01'
+  fn: '0'
+  id: '1452'
+  name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-1fh)
+    PCIe Dummy Host Bridge'
+- bus: '00'
+  dev: '01'
+  fn: '2'
+  id: '1453'
+  name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh)
+    PCIe GPP Bridge'
+- bus: '00'
+  dev: '01'
+  fn: '3'
+  id: '1453'
+  name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh)
+    PCIe GPP Bridge'
+- bus: '00'
+  dev: '01'
+  fn: '4'
+  id: '1453'
+  name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh)
+    PCIe GPP Bridge'
+- bus: '00'
+  dev: '02'
+  fn: '0'
+  id: '1452'
+  name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-1fh)
+    PCIe Dummy Host Bridge'
+- bus: '00'
+  dev: '03'
+  fn: '0'
+  id: '1452'
+  name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-1fh)
+    PCIe Dummy Host Bridge'
+- bus: '00'
+  dev: '03'
+  fn: '1'
+  id: '1453'
+  name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh)
+    PCIe GPP Bridge'
+- bus: '00'
+  dev: '03'
+  fn: '2'
+  id: '1453'
+  name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh)
+    PCIe GPP Bridge'
+- bus: '00'
+  dev: '03'
+  fn: '3'
+  id: '1453'
+  name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh)
+    PCIe GPP Bridge'
+- bus: '00'
+  dev: '04'
+  fn: '0'
+  id: '1452'
+  name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-1fh)
+    PCIe Dummy Host Bridge'
+- bus: '00'
+  dev: '07'
+  fn: '0'
+  id: '1452'
+  name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-1fh)
+    PCIe Dummy Host Bridge'
+- bus: '00'
+  dev: '07'
+  fn: '1'
+  id: '1454'
+  name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh)
+    Internal PCIe GPP Bridge 0 to Bus B'
+- bus: '00'
+  dev: 08
+  fn: '0'
+  id: '1452'
+  name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-1fh)
+    PCIe Dummy Host Bridge'
+- bus: '00'
+  dev: 08
+  fn: '1'
+  id: '1454'
+  name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh)
+    Internal PCIe GPP Bridge 0 to Bus B'
+- bus: '00'
+  dev: '14'
+  fn: '0'
+  id: 790b
+  name: 'SMBus: Advanced Micro Devices, Inc. [AMD] FCH SMBus Controller (rev 59)'
+- bus: '00'
+  dev: '14'
+  fn: '3'
+  id: 790e
+  name: 'ISA bridge: Advanced Micro Devices, Inc. [AMD] FCH LPC Bridge (rev 51)'
+- bus: '00'
+  dev: '18'
+  fn: '0'
+  id: '1460'
+  name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh)
+    Data Fabric: Device 18h; Function 0'
+- bus: '00'
+  dev: '18'
+  fn: '1'
+  id: '1461'
+  name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh)
+    Data Fabric: Device 18h; Function 1'
+- bus: '00'
+  dev: '18'
+  fn: '2'
+  id: '1462'
+  name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh)
+    Data Fabric: Device 18h; Function 2'
+- bus: '00'
+  dev: '18'
+  fn: '3'
+  id: '1463'
+  name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh)
+    Data Fabric: Device 18h; Function 3'
+- bus: '00'
+  dev: '18'
+  fn: '4'
+  id: '1464'
+  name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh)
+    Data Fabric: Device 18h; Function 4'
+- bus: '00'
+  dev: '18'
+  fn: '5'
+  id: '1465'
+  name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh)
+    Data Fabric: Device 18h; Function 5'
+- bus: '00'
+  dev: '18'
+  fn: '6'
+  id: '1466'
+  name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh)
+    Data Fabric: Device 18h; Function 6'
+- bus: '00'
+  dev: '18'
+  fn: '7'
+  id: '1467'
+  name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh)
+    Data Fabric: Device 18h; Function 7'
+- bus: '00'
+  dev: '19'
+  fn: '0'
+  id: '1460'
+  name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh)
+    Data Fabric: Device 18h; Function 0'
+- bus: '00'
+  dev: '19'
+  fn: '1'
+  id: '1461'
+  name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh)
+    Data Fabric: Device 18h; Function 1'
+- bus: '00'
+  dev: '19'
+  fn: '2'
+  id: '1462'
+  name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh)
+    Data Fabric: Device 18h; Function 2'
+- bus: '00'
+  dev: '19'
+  fn: '3'
+  id: '1463'
+  name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh)
+    Data Fabric: Device 18h; Function 3'
+- bus: '00'
+  dev: '19'
+  fn: '4'
+  id: '1464'
+  name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh)
+    Data Fabric: Device 18h; Function 4'
+- bus: '00'
+  dev: '19'
+  fn: '5'
+  id: '1465'
+  name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh)
+    Data Fabric: Device 18h; Function 5'
+- bus: '00'
+  dev: '19'
+  fn: '6'
+  id: '1466'
+  name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh)
+    Data Fabric: Device 18h; Function 6'
+- bus: '00'
+  dev: '19'
+  fn: '7'
+  id: '1467'
+  name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh)
+    Data Fabric: Device 18h; Function 7'
+- bus: '01'
+  dev: '00'
+  fn: '0'
+  id: c2d5
+  name: 'DMA controller: Mellanox Technologies MT43244 BlueField-3 SoC Management
+    Interface (rev 01)'
+- bus: '02'
+  dev: '00'
+  fn: '0'
+  id: c2d5
+  name: 'DMA controller: Mellanox Technologies MT43244 BlueField-3 SoC Management
+    Interface (rev 01)'
+- bus: '03'
+  dev: '00'
+  fn: '0'
+  id: '5765'
+  name: 'Non-Volatile memory controller: Device 1f9f:5765 (rev 01)'
+- bus: '04'
+  dev: '00'
+  fn: '0'
+  id: cf70
+  name: 'Ethernet controller: Mellanox Technologies Spectrum-3'
+- bus: '05'
+  dev: '00'
+  fn: '0'
+  id: c2d5
+  name: 'DMA controller: Mellanox Technologies MT43244 BlueField-3 SoC Management
+    Interface (rev 01)'
+- bus: '06'
+  dev: '00'
+  fn: '0'
+  id: c2d5
+  name: 'DMA controller: Mellanox Technologies MT43244 BlueField-3 SoC Management
+    Interface (rev 01)'
+- bus: '07'
+  dev: '00'
+  fn: '0'
+  id: 145a
+  name: 'Non-Essential Instrumentation [1300]: Advanced Micro Devices, Inc. [AMD]
+    Zeppelin/Raven/Raven2 PCIe Dummy Function'
+- bus: '07'
+  dev: '00'
+  fn: '2'
+  id: '1456'
+  name: 'Encryption controller: Advanced Micro Devices, Inc. [AMD] Family 17h (Models
+    00h-0fh) Platform Security Processor (PSP) 3.0 Device'
+- bus: '07'
+  dev: '00'
+  fn: '3'
+  id: 145f
+  name: 'USB controller: Advanced Micro Devices, Inc. [AMD] Zeppelin USB 3.0 xHCI
+    Compliant Host Controller'
+- bus: 08
+  dev: '00'
+  fn: '0'
+  id: '1455'
+  name: 'Non-Essential Instrumentation [1300]: Advanced Micro Devices, Inc. [AMD]
+    Zeppelin/Renoir PCIe Dummy Function'
+- bus: 08
+  dev: '00'
+  fn: '1'
+  id: '1468'
+  name: 'Encryption controller: Advanced Micro Devices, Inc. [AMD] Zeppelin Cryptographic
+    Coprocessor NTBCCP'
+- bus: 08
+  dev: '00'
+  fn: '4'
+  id: '1458'
+  name: 'Ethernet controller: Advanced Micro Devices, Inc. [AMD] XGMAC 10GbE Controller'
+- bus: '40'
+  dev: '00'
+  fn: '0'
+  id: '1450'
+  name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh)
+    Root Complex'
+- bus: '40'
+  dev: '00'
+  fn: '2'
+  id: '1451'
+  name: 'IOMMU: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh) I/O
+    Memory Management Unit'
+- bus: '40'
+  dev: '01'
+  fn: '0'
+  id: '1452'
+  name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-1fh)
+    PCIe Dummy Host Bridge'
+- bus: '40'
+  dev: '02'
+  fn: '0'
+  id: '1452'
+  name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-1fh)
+    PCIe Dummy Host Bridge'
+- bus: '40'
+  dev: '03'
+  fn: '0'
+  id: '1452'
+  name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-1fh)
+    PCIe Dummy Host Bridge'
+- bus: '40'
+  dev: '04'
+  fn: '0'
+  id: '1452'
+  name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-1fh)
+    PCIe Dummy Host Bridge'
+- bus: '40'
+  dev: '07'
+  fn: '0'
+  id: '1452'
+  name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-1fh)
+    PCIe Dummy Host Bridge'
+- bus: '40'
+  dev: '07'
+  fn: '1'
+  id: '1454'
+  name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh)
+    Internal PCIe GPP Bridge 0 to Bus B'
+- bus: '40'
+  dev: 08
+  fn: '0'
+  id: '1452'
+  name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-1fh)
+    PCIe Dummy Host Bridge'
+- bus: '40'
+  dev: 08
+  fn: '1'
+  id: '1454'
+  name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh)
+    Internal PCIe GPP Bridge 0 to Bus B'
+- bus: '41'
+  dev: '00'
+  fn: '0'
+  id: 145a
+  name: 'Non-Essential Instrumentation [1300]: Advanced Micro Devices, Inc. [AMD]
+    Zeppelin/Raven/Raven2 PCIe Dummy Function'
+- bus: '41'
+  dev: '00'
+  fn: '2'
+  id: '1456'
+  name: 'Encryption controller: Advanced Micro Devices, Inc. [AMD] Family 17h (Models
+    00h-0fh) Platform Security Processor (PSP) 3.0 Device'
+- bus: '41'
+  dev: '00'
+  fn: '3'
+  id: 145f
+  name: 'USB controller: Advanced Micro Devices, Inc. [AMD] Zeppelin USB 3.0 xHCI
+    Compliant Host Controller'
+- bus: '42'
+  dev: '00'
+  fn: '0'
+  id: '1455'
+  name: 'Non-Essential Instrumentation [1300]: Advanced Micro Devices, Inc. [AMD]
+    Zeppelin/Renoir PCIe Dummy Function'
+- bus: '42'
+  dev: '00'
+  fn: '1'
+  id: '1468'
+  name: 'Encryption controller: Advanced Micro Devices, Inc. [AMD] Zeppelin Cryptographic
+    Coprocessor NTBCCP'
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/platform.json b/device/mellanox/x86_64-nvidia_sn4280-r0/platform.json
new file mode 100644
index 000000000..8597bb955
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/platform.json
@@ -0,0 +1,664 @@
+{
+    "chassis": {
+        "name": "SN4280",
+        "components": [
+            {
+                "name": "ONIE"
+            },
+            {
+                "name": "SSD"
+            },
+            {
+                "name": "BIOS"
+            },
+            {
+                "name": "CPLD1"
+            },
+            {
+                "name": "CPLD2"
+            },
+            {
+                "name": "CPLD3"
+            }
+        ],
+        "fans": [],
+        "fan_drawers": [
+            {
+                "name": "drawer1",
+                "fans": [
+                    {
+                        "name": "fan1"
+                    }
+                ]
+            },
+            {
+                "name": "drawer2",
+                "fans": [
+                    {
+                        "name": "fan2"
+                    }
+                ]
+            },
+            {
+                "name": "drawer3",
+                "fans": [
+                    {
+                        "name": "fan3"
+                    }
+                ]
+            },
+            {
+                "name": "drawer4",
+                "fans": [
+                    {
+                        "name": "fan4"
+                    }
+                ]
+            }
+        ],
+        "psus": [
+            {
+                "name": "PSU 1",
+                "fans": [
+                    {
+                        "name": "psu1_fan1"
+                    }
+                ],
+                "thermals": [
+                    {
+                        "name": "PSU-1 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "PSU 2",
+                "fans": [
+                    {
+                        "name": "psu2_fan1"
+                    }
+                ],
+                "thermals": [
+                    {
+                        "name": "PSU-2 Temp"
+                    }
+                ]
+            }
+        ],
+        "thermals": [
+            {
+                "name": "ASIC"
+            },
+            {
+                "name": "Ambient Fan Side Temp"
+            },
+            {
+                "name": "Ambient Port Side Temp"
+            },
+            {
+                "name": "CPU Pack Temp"
+            },
+            {
+                "name": "SODIMM 1 Temp"
+            },
+            {
+                "name": "SODIMM 2 Temp"
+            },
+            {
+                "name": "SODIMM 3 Temp"
+            },
+            {
+                "name": "SODIMM 4 Temp"
+            }
+        ],
+        "sfps": [
+            {
+                "name": "sfp1",
+                "thermals": [
+                    {
+                        "name": "xSFP module 1 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp2",
+                "thermals": [
+                    {
+                        "name": "xSFP module 2 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp3",
+                "thermals": [
+                    {
+                        "name": "xSFP module 3 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp4",
+                "thermals": [
+                    {
+                        "name": "xSFP module 4 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp5",
+                "thermals": [
+                    {
+                        "name": "xSFP module 5 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp6",
+                "thermals": [
+                    {
+                        "name": "xSFP module 6 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp7",
+                "thermals": [
+                    {
+                        "name": "xSFP module 7 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp8",
+                "thermals": [
+                    {
+                        "name": "xSFP module 8 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp9",
+                "thermals": [
+                    {
+                        "name": "xSFP module 9 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp10",
+                "thermals": [
+                    {
+                        "name": "xSFP module 10 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp11",
+                "thermals": [
+                    {
+                        "name": "xSFP module 11 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp12",
+                "thermals": [
+                    {
+                        "name": "xSFP module 12 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp13",
+                "thermals": [
+                    {
+                        "name": "xSFP module 13 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp14",
+                "thermals": [
+                    {
+                        "name": "xSFP module 14 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp15",
+                "thermals": [
+                    {
+                        "name": "xSFP module 15 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp16",
+                "thermals": [
+                    {
+                        "name": "xSFP module 16 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp17",
+                "thermals": [
+                    {
+                        "name": "xSFP module 17 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp18",
+                "thermals": [
+                    {
+                        "name": "xSFP module 18 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp19",
+                "thermals": [
+                    {
+                        "name": "xSFP module 19 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp20",
+                "thermals": [
+                    {
+                        "name": "xSFP module 20 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp21",
+                "thermals": [
+                    {
+                        "name": "xSFP module 21 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp22",
+                "thermals": [
+                    {
+                        "name": "xSFP module 22 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp23",
+                "thermals": [
+                    {
+                        "name": "xSFP module 23 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp24",
+                "thermals": [
+                    {
+                        "name": "xSFP module 24 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp25",
+                "thermals": [
+                    {
+                        "name": "xSFP module 25 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp26",
+                "thermals": [
+                    {
+                        "name": "xSFP module 26 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp27",
+                "thermals": [
+                    {
+                        "name": "xSFP module 27 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp28",
+                "thermals": [
+                    {
+                        "name": "xSFP module 28 Temp"
+                    }
+                ]
+            }
+        ]
+    },
+    "interfaces": {
+        "Ethernet0": {
+            "index": "1,1,1,1,1,1,1,1", 
+            "lanes": "0,1,2,3,4,5,6,7",
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G,1G]": ["etp1"],
+                "2x200G[100G,50G,40G,25G,10G,1G]": ["etp1a", "etp1b"],
+                "4x100G[50G,25G,10G,1G]": ["etp1a", "etp1b", "etp1c", "etp1d"],
+                "4x25G(4)[10G,1G]": ["etp1a", "etp1b", "etp1c", "etp1d"]
+            }
+        }, 
+        "Ethernet8": {
+            "index": "2,2,2,2,2,2,2,2", 
+            "lanes": "8,9,10,11,12,13,14,15", 
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G,1G]": ["etp2"],
+                "2x200G[100G,50G,40G,25G,10G,1G]": ["etp2a", "etp2b"],
+                "4x100G[50G,25G,10G,1G]": ["etp2a", "etp2b", "etp2c", "etp2d"],
+                "4x25G(4)[10G,1G]": ["etp2a", "etp2b", "etp2c", "etp2d"]
+            }
+        }, 
+        "Ethernet16": {
+            "index": "3,3,3,3,3,3,3,3", 
+            "lanes": "16,17,18,19,20,21,22,23", 
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G,1G]": ["etp3"],
+                "2x200G[100G,50G,40G,25G,10G,1G]": ["etp3a", "etp3b"],
+                "4x100G[50G,25G,10G,1G]": ["etp3a", "etp3b", "etp3c", "etp3d"],
+                "4x25G(4)[10G,1G]": ["etp3a", "etp3b", "etp3c", "etp3d"]
+            }
+        }, 
+        "Ethernet24": {
+            "index": "4,4,4,4,4,4,4,4", 
+            "lanes": "24,25,26,27,28,29,30,31", 
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G,1G]": ["etp4"],
+                "2x200G[100G,50G,40G,25G,10G,1G]": ["etp4a", "etp4b"],
+                "4x100G[50G,25G,10G,1G]": ["etp4a", "etp4b", "etp4c", "etp4d"],
+                "4x25G(4)[10G,1G]": ["etp4a", "etp4b", "etp4c", "etp4d"]
+            }
+        }, 
+        "Ethernet32": {
+            "index": "5,5,5,5,5,5,5,5", 
+            "lanes": "32,33,34,35,36,37,38,39", 
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G,1G]": ["etp5"],
+                "2x200G[100G,50G,40G,25G,10G,1G]": ["etp5a", "etp5b"],
+                "4x100G[50G,25G,10G,1G]": ["etp5a", "etp5b", "etp5c", "etp5d"],
+                "4x25G(4)[10G,1G]": ["etp5a", "etp5b", "etp5c", "etp5d"]
+            }
+        }, 
+        "Ethernet40": {
+            "index": "6,6,6,6,6,6,6,6", 
+            "lanes": "40,41,42,43,44,45,46,47", 
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G,1G]": ["etp6"],
+                "2x200G[100G,50G,40G,25G,10G,1G]": ["etp6a", "etp6b"],
+                "4x100G[50G,25G,10G,1G]": ["etp6a", "etp6b", "etp6c", "etp6d"],
+                "4x25G(4)[10G,1G]": ["etp6a", "etp6b", "etp6c", "etp6d"]
+            }
+        }, 
+        "Ethernet48": {
+            "index": "7,7,7,7,7,7,7,7", 
+            "lanes": "48,49,50,51,52,53,54,55", 
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G,1G]": ["etp7"],
+                "2x200G[100G,50G,40G,25G,10G,1G]": ["etp7a", "etp7b"],
+                "4x100G[50G,25G,10G,1G]": ["etp7a", "etp7b", "etp7c", "etp7d"],
+                "4x25G(4)[10G,1G]": ["etp7a", "etp7b", "etp7c", "etp7d"]
+            }
+        }, 
+        "Ethernet56": {
+            "index": "8,8,8,8,8,8,8,8", 
+            "lanes": "56,57,58,59,60,61,62,63", 
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G,1G]": ["etp8"],
+                "2x200G[100G,50G,40G,25G,10G,1G]": ["etp8a", "etp8b"],
+                "4x100G[50G,25G,10G,1G]": ["etp8a", "etp8b", "etp8c", "etp8d"],
+                "4x25G(4)[10G,1G]": ["etp8a", "etp8b", "etp8c", "etp8d"]
+            }
+        }, 
+        "Ethernet64": {
+            "index": "9,9,9,9,9,9,9,9", 
+            "lanes": "64,65,66,67,68,69,70,71", 
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G,1G]": ["etp9"],
+                "2x200G[100G,50G,40G,25G,10G,1G]": ["etp9a", "etp9b"],
+                "4x100G[50G,25G,10G,1G]": ["etp9a", "etp9b", "etp9c", "etp9d"],
+                "4x25G(4)[10G,1G]": ["etp9a", "etp9b", "etp9c", "etp9d"]
+            }
+        }, 
+        "Ethernet72": {
+            "index": "10,10,10,10,10,10,10,10", 
+            "lanes": "72,73,74,75,76,77,78,79", 
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G,1G]": ["etp10"],
+                "2x200G[100G,50G,40G,25G,10G,1G]": ["etp10a", "etp10b"],
+                "4x100G[50G,25G,10G,1G]": ["etp10a", "etp10b", "etp10c", "etp10d"],
+                "4x25G(4)[10G,1G]": ["etp10a", "etp10b", "etp10c", "etp10d"]
+            }
+        },
+        "Ethernet80": {
+            "index": "11,11,11,11,11,11,11,11", 
+            "lanes": "80,81,82,83,84,85,86,87", 
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G,1G]": ["etp11"],
+                "2x200G[100G,50G,40G,25G,10G,1G]": ["etp11a", "etp11b"],
+                "4x100G[50G,25G,10G,1G]": ["etp11a", "etp11b", "etp11c", "etp11d"],
+                "4x25G(4)[10G,1G]": ["etp11a", "etp11b", "etp11c", "etp11d"]
+            }
+        }, 
+        "Ethernet88": {
+            "index": "12,12,12,12,12,12,12,12", 
+            "lanes": "88,89,90,91,92,93,94,95", 
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G,1G]": ["etp12"],
+                "2x200G[100G,50G,40G,25G,10G,1G]": ["etp12a", "etp12b"],
+                "4x100G[50G,25G,10G,1G]": ["etp12a", "etp12b", "etp12c", "etp12d"],
+                "4x25G(4)[10G,1G]": ["etp12a", "etp12b", "etp12c", "etp12d"]
+            }
+        }, 
+        "Ethernet96": {
+            "index": "13,13,13,13,13,13,13,13", 
+            "lanes": "96,97,98,99,100,101,102,103", 
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G,1G]": ["etp13"],
+                "2x200G[100G,50G,40G,25G,10G,1G]": ["etp13a", "etp13b"],
+                "4x100G[50G,25G,10G,1G]": ["etp13a", "etp13b", "etp13c", "etp13d"],
+                "4x25G(4)[10G,1G]": ["etp13a", "etp13b", "etp13c", "etp13d"]
+            }
+        }, 
+        "Ethernet104": {
+            "index": "14,14,14,14,14,14,14,14", 
+            "lanes": "104,105,106,107,108,109,110,111", 
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G,1G]": ["etp14"],
+                "2x200G[100G,50G,40G,25G,10G,1G]": ["etp14a", "etp14b"],
+                "4x100G[50G,25G,10G,1G]": ["etp14a", "etp14b", "etp14c", "etp14d"],
+                "4x25G(4)[10G,1G]": ["etp14a", "etp14b", "etp14c", "etp14d"]
+            }
+        }, 
+        "Ethernet112": {
+            "index": "15,15,15,15,15,15,15,15", 
+            "lanes": "112,113,114,115,116,117,118,119", 
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G,1G]": ["etp15"],
+                "2x200G[100G,50G,40G,25G,10G,1G]": ["etp15a", "etp15b"],
+                "4x100G[50G,25G,10G,1G]": ["etp15a", "etp15b", "etp15c", "etp15d"],
+                "4x25G(4)[10G,1G]": ["etp15a", "etp15b", "etp15c", "etp15d"]
+            }
+        }, 
+        "Ethernet120": {
+            "index": "16,16,16,16,16,16,16,16", 
+            "lanes": "120,121,122,123,124,125,126,127", 
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G,1G]": ["etp16"],
+                "2x200G[100G,50G,40G,25G,10G,1G]": ["etp16a", "etp16b"],
+                "4x100G[50G,25G,10G,1G]": ["etp16a", "etp16b", "etp16c", "etp16d"],
+                "4x25G(4)[10G,1G]": ["etp16a", "etp16b", "etp16c", "etp16d"]
+            }
+        }, 
+        "Ethernet128": {
+            "index": "17,17,17,17,17,17,17,17", 
+            "lanes": "128,129,130,131,132,133,134,135", 
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G,1G]": ["etp17"],
+                "2x200G[100G,50G,40G,25G,10G,1G]": ["etp17a", "etp17b"],
+                "4x100G[50G,25G,10G,1G]": ["etp17a", "etp17b", "etp17c", "etp17d"],
+                "4x25G(4)[10G,1G]": ["etp17a", "etp17b", "etp17c", "etp17d"]
+            }
+        }, 
+        "Ethernet136": {
+            "index": "18,18,18,18,18,18,18,18", 
+            "lanes": "136,137,138,139,140,141,142,143", 
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G,1G]": ["etp18"],
+                "2x200G[100G,50G,40G,25G,10G,1G]": ["etp18a", "etp18b"],
+                "4x100G[50G,25G,10G,1G]": ["etp18a", "etp18b", "etp18c", "etp18d"],
+                "4x25G(4)[10G,1G]": ["etp18a", "etp18b", "etp18c", "etp18d"]
+            }
+        }, 
+        "Ethernet144": {
+            "index": "19,19,19,19,19,19,19,19", 
+            "lanes": "144,145,146,147,148,149,150,151", 
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G,1G]": ["etp19"],
+                "2x200G[100G,50G,40G,25G,10G,1G]": ["etp19a", "etp19b"],
+                "4x100G[50G,25G,10G,1G]": ["etp19a", "etp19b", "etp19c", "etp19d"],
+                "4x25G(4)[10G,1G]": ["etp19a", "etp19b", "etp19c", "etp19d"]
+            }
+        }, 
+        "Ethernet152": {
+            "index": "20,20,20,20,20,20,20,20", 
+            "lanes": "152,153,154,155,156,157,158,159", 
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G,1G]": ["etp20"],
+                "2x200G[100G,50G,40G,25G,10G,1G]": ["etp20a", "etp20b"],
+                "4x100G[50G,25G,10G,1G]": ["etp20a", "etp20b", "etp20c", "etp20d"],
+                "4x25G(4)[10G,1G]": ["etp20a", "etp20b", "etp20c", "etp20d"]
+            }
+        }, 
+        "Ethernet160": {
+            "index": "21,21,21,21,21,21,21,21", 
+            "lanes": "160,161,162,163,164,165,166,167", 
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G,1G]": ["etp21"],
+                "2x200G[100G,50G,40G,25G,10G,1G]": ["etp21a", "etp21b"],
+                "4x100G[50G,25G,10G,1G]": ["etp21a", "etp21b", "etp21c", "etp21d"],
+                "4x25G(4)[10G,1G]": ["etp21a", "etp21b", "etp21c", "etp21d"]
+            }
+        }, 
+        "Ethernet168": {
+            "index": "22,22,22,22,22,22,22,22", 
+            "lanes": "168,169,170,171,172,173,174,175", 
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G,1G]": ["etp22"],
+                "2x200G[100G,50G,40G,25G,10G,1G]": ["etp22a", "etp22b"],
+                "4x100G[50G,25G,10G,1G]": ["etp22a", "etp22b", "etp22c", "etp22d"],
+                "4x25G(4)[10G,1G]": ["etp22a", "etp22b", "etp22c", "etp22d"]
+            }
+        }, 
+        "Ethernet176": {
+            "index": "23,23,23,23,23,23,23,23", 
+            "lanes": "176,177,178,179,180,181,182,183", 
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G,1G]": ["etp23"],
+                "2x200G[100G,50G,40G,25G,10G,1G]": ["etp23a", "etp23b"],
+                "4x100G[50G,25G,10G,1G]": ["etp23a", "etp23b", "etp23c", "etp23d"],
+                "4x25G(4)[10G,1G]": ["etp23a", "etp23b", "etp23c", "etp23d"]
+            }
+        }, 
+        "Ethernet184": {
+            "index": "24,24,24,24,24,24,24,24", 
+            "lanes": "184,185,186,187,188,189,190,191", 
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G,1G]": ["etp24"],
+                "2x200G[100G,50G,40G,25G,10G,1G]": ["etp24a", "etp24b"],
+                "4x100G[50G,25G,10G,1G]": ["etp24a", "etp24b", "etp24c", "etp24d"],
+                "4x25G(4)[10G,1G]": ["etp24a", "etp24b", "etp24c", "etp24d"]
+            }
+        }, 
+        "Ethernet192": {
+            "index": "25,25,25,25,25,25,25,25", 
+            "lanes": "192,193,194,195,196,197,198,199", 
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G,1G]": ["etp25"],
+                "2x200G[100G,50G,40G,25G,10G,1G]": ["etp25a", "etp25b"],
+                "4x100G[50G,25G,10G,1G]": ["etp25a", "etp25b", "etp25c", "etp25d"],
+                "4x25G(4)[10G,1G]": ["etp25a", "etp25b", "etp25c", "etp25d"]
+            }
+        }, 
+        "Ethernet200": {
+            "index": "26,26,26,26,26,26,26,26", 
+            "lanes": "200,201,202,203,204,205,206,207", 
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G,1G]": ["etp26"],
+                "2x200G[100G,50G,40G,25G,10G,1G]": ["etp26a", "etp26b"],
+                "4x100G[50G,25G,10G,1G]": ["etp26a", "etp26b", "etp26c", "etp26d"],
+                "4x25G(4)[10G,1G]": ["etp26a", "etp26b", "etp26c", "etp26d"]
+            }
+        }, 
+        "Ethernet208": {
+            "index": "27,27,27,27,27,27,27,27", 
+            "lanes": "208,209,210,211,212,213,214,215", 
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G,1G]": ["etp27"],
+                "2x200G[100G,50G,40G,25G,10G,1G]": ["etp27a", "etp27b"],
+                "4x100G[50G,25G,10G,1G]": ["etp27a", "etp27b", "etp27c", "etp27d"],
+                "4x25G(4)[10G,1G]": ["etp27a", "etp27b", "etp27c", "etp27d"]
+            }
+        }, 
+        "Ethernet216": {
+            "index": "28,28,28,28,28,28,28,28", 
+            "lanes": "216,217,218,219,220,221,222,223", 
+            "breakout_modes": {
+                "1x400G[200G,100G,50G,40G,25G,10G,1G]": ["etp28"],
+                "2x200G[100G,50G,40G,25G,10G,1G]": ["etp28a", "etp28b"],
+                "4x100G[50G,25G,10G,1G]": ["etp28a", "etp28b", "etp28c", "etp28d"],
+                "4x25G(4)[10G,1G]": ["etp28a", "etp28b", "etp28c", "etp28d"]
+            }
+        }, 
+        "Ethernet224": {
+            "index": "29,29,29,29,29,29,29,29", 
+            "lanes": "224,225,226,227,228,229,230,231", 
+            "breakout_modes": {
+                "1x400G": ["etp29"]
+            }
+        }, 
+        "Ethernet232": {
+            "index": "30,30,30,30,30,30,30,30", 
+            "lanes": "232,233,234,235,236,237,238,239", 
+            "breakout_modes": {
+                "1x400G": ["etp30"]
+            }
+        }, 
+        "Ethernet240": {
+            "index": "31,31,31,31,31,31,31,31", 
+            "lanes": "240,241,242,243,244,245,246,247", 
+            "breakout_modes": {
+                "1x400G": ["etp31"]
+            }
+        }, 
+        "Ethernet248": {
+            "index": "32,32,32,32,32,32,32,32", 
+            "lanes": "248,249,250,251,252,253,254,255", 
+            "breakout_modes": {
+                "1x400G": ["etp32"]
+            }
+        }
+    },
+    "DPUS": {
+        "dpu0": {
+            "midplane_interface":  "dpu0"
+        },
+        "dpu1": {
+            "midplane_interface":  "dpu1"
+        },
+        "dpu2": {
+            "midplane_interface":  "dpu2"
+        },
+        "dpu3": {
+            "midplane_interface":  "dpu3"
+        }
+    }
+}
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/platform_asic b/device/mellanox/x86_64-nvidia_sn4280-r0/platform_asic
new file mode 100644
index 000000000..70c074885
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/platform_asic
@@ -0,0 +1 @@
+mellanox
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/platform_components.json b/device/mellanox/x86_64-nvidia_sn4280-r0/platform_components.json
new file mode 100644
index 000000000..ff3e406d8
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/platform_components.json
@@ -0,0 +1,18 @@
+{
+    "chassis": {
+        "SN4280": {
+            "component": {
+                "ONIE": { },
+                "SSD": { },
+                "BIOS": { },
+                "CPLD1": { },
+                "CPLD2": { },
+                "CPLD3": { },
+                "DPU1_FPGA": { },
+                "DPU2_FPGA": { },
+                "DPU3_FPGA": { },
+                "DPU4_FPGA": { }
+            }
+        }
+    }
+}
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/platform_wait b/device/mellanox/x86_64-nvidia_sn4280-r0/platform_wait
new file mode 120000
index 000000000..4b30bd429
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/platform_wait
@@ -0,0 +1 @@
+../x86_64-mlnx_msn2700-r0/platform_wait
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/plugins/eeprom.py b/device/mellanox/x86_64-nvidia_sn4280-r0/plugins/eeprom.py
new file mode 120000
index 000000000..b4e2a6a61
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/plugins/eeprom.py
@@ -0,0 +1 @@
+../../x86_64-mlnx_msn2700-r0/plugins/eeprom.py
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/plugins/psuutil.py b/device/mellanox/x86_64-nvidia_sn4280-r0/plugins/psuutil.py
new file mode 120000
index 000000000..9f724238a
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/plugins/psuutil.py
@@ -0,0 +1 @@
+../../x86_64-mlnx_msn2700-r0/plugins/psuutil.py
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/plugins/sfplpmget.py b/device/mellanox/x86_64-nvidia_sn4280-r0/plugins/sfplpmget.py
new file mode 120000
index 000000000..2e84f435a
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/plugins/sfplpmget.py
@@ -0,0 +1 @@
+../../x86_64-mlnx_msn2700-r0/plugins/sfplpmget.py
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/plugins/sfplpmset.py b/device/mellanox/x86_64-nvidia_sn4280-r0/plugins/sfplpmset.py
new file mode 120000
index 000000000..6a88bac30
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/plugins/sfplpmset.py
@@ -0,0 +1 @@
+../../x86_64-mlnx_msn2700-r0/plugins/sfplpmset.py
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/plugins/sfpreset.py b/device/mellanox/x86_64-nvidia_sn4280-r0/plugins/sfpreset.py
new file mode 120000
index 000000000..fef2063e3
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/plugins/sfpreset.py
@@ -0,0 +1 @@
+../../x86_64-mlnx_msn2700-r0/plugins/sfpreset.py
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/plugins/sfputil.py b/device/mellanox/x86_64-nvidia_sn4280-r0/plugins/sfputil.py
new file mode 120000
index 000000000..45909b880
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/plugins/sfputil.py
@@ -0,0 +1 @@
+../../x86_64-mlnx_msn2700-r0/plugins/sfputil.py
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/pmon_daemon_control.json b/device/mellanox/x86_64-nvidia_sn4280-r0/pmon_daemon_control.json
new file mode 120000
index 000000000..435a2ce7c
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/pmon_daemon_control.json
@@ -0,0 +1 @@
+../x86_64-mlnx_msn2700-r0/pmon_daemon_control.json
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/pre_reboot_hook b/device/mellanox/x86_64-nvidia_sn4280-r0/pre_reboot_hook
new file mode 120000
index 000000000..6fc31078e
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/pre_reboot_hook
@@ -0,0 +1 @@
+../x86_64-mlnx_msn2700-r0/pre_reboot_hook
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/sensors.conf b/device/mellanox/x86_64-nvidia_sn4280-r0/sensors.conf
new file mode 100644
index 000000000..111e46967
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/sensors.conf
@@ -0,0 +1,565 @@
+###########################################################################
+# Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+#
+# Platform specific sensors config for SN4280
+###########################################################################
+
+# Temperature sensors
+bus "i2c-2" "i2c-1-mux (chan_id 1)"
+    chip "mlxsw-i2c-*-48"
+        label temp1 "Ambient ASIC Temp"
+        ignore temp2
+        ignore temp3
+        ignore temp4
+        ignore temp5
+        ignore temp6
+        ignore temp7
+        ignore temp8
+        ignore temp9
+        ignore temp10
+        ignore temp11
+        ignore temp12
+        ignore temp13
+        ignore temp14
+        ignore temp15
+        ignore temp16
+        ignore temp17
+        ignore temp18
+        ignore temp19
+        ignore temp20
+        ignore temp21
+        ignore temp22
+        ignore temp23
+        ignore temp24
+        ignore temp25
+        ignore temp26
+        ignore temp27
+        ignore temp28
+        ignore temp29
+
+bus "i2c-7" "i2c-1-mux (chan_id 6)"
+    chip "tmp102-i2c-*-49"
+    	label temp1 "Ambient Fan Side Temp (air intake)"
+    chip "adt75-i2c-*-49"
+    	label temp1 "Ambient Fan Side Temp (air intake)"
+    chip "stts751-i2c-*-49"
+    	label temp1 "Ambient Fan Side Temp (air intake)"
+    chip "tmp102-i2c-*-4a"
+        label temp1 "Ambient Port Side Temp (air exhaust)"
+    chip "adt75-i2c-*-4a"
+        label temp1 "Ambient Port Side Temp (air exhaust)"
+
+# Power controllers
+bus "i2c-5" "i2c-1-mux (chan_id 4)"
+    chip "xdpe12284-i2c-*-62"
+        label in1 "PMIC-1 12V ASIC VDD_M (in1)"
+        ignore in2 
+        label in3 "PMIC-1 ASIC VCORE_MAIN Rail (out1)"
+        ignore in4 
+        label temp1 "PMIC-1 ASIC VCORE_MAIN Temp 1"
+        ignore temp2 
+        label power1 "PMIC-1 12V ASIC VCORE_MAIN Rail Pwr (in)"
+        ignore power2 
+        label power3 "PMIC-1 ASIC VCORE_MAIN Rail Pwr (out1)"
+        ignore power4 
+        label curr1 "PMIC-1 12V ASIC VCORE_MAIN Rail Curr (in1)"
+        ignore curr2 
+        label curr3 "PMIC-1 ASIC VCORE_MAIN Rail Curr (out1)"
+        ignore curr4
+    chip "mp2975-i2c-*-62"
+        label in1 "PMIC-1 12V ASIC VDD_M (in)"
+        label in2 "PMIC-1 ASIC VCORE_MAIN Rail (out)"
+        ignore in3
+        ignore in4 
+        label temp1 "PMIC-1 ASIC VCORE_MAIN Temp 1"
+        ignore temp2 
+        label power1 "PMIC-1 12V ASIC VCORE_MAIN Rail Pwr (in)"
+        label power2 "PMIC-1 ASIC VCORE_MAIN Rail Pwr (out)"
+        ignore power3 
+        ignore power4 
+        label curr1 "PMIC-1 12V ASIC VCORE_MAIN Rail Curr (in)"
+        label curr2 "PMIC-1 ASIC VCORE_MAIN Rail Curr (out)"
+        ignore curr3 
+        ignore curr4
+
+    chip "xdpe12284-i2c-*-64"
+        label in1 "PMIC-2 12V ASIC VDDI_M VDDHS_M (in1)"
+        label in2 "PMIC-2 12V ASIC VDDI_M VDDHS_M (in2)"
+        label in3 "PMIC-2 ASIC 1.8V_MAIN Rail (out1)"
+        label in4 "PMIC-2 ASIC 1.2V_MAIN Rail (out2)"
+        label temp1 "PMIC-2 ASIC 1.8V_MAIN Temp 1"
+        label temp2 "PMIC-2 ASIC 1.2V_MAIN Temp 2"
+        label power1 "PMIC-2 12V ASIC 1.8V_1.2V_MAIN Rail Pwr (in)"
+        ignore power2 
+        label power3 "PMIC-2 ASIC 1.8V_MAIN Rail Pwr (out1)"
+        label power4 "PMIC-2 ASIC 1.2V_MAIN Rail Pwr (out2)"
+        label curr1 "PMIC-2 12V ASIC 1.8V_MAIN Rail Curr (in1)"
+        label curr2 "PMIC-2 12V ASIC 1.2V_MAIN Rail Curr (in2)"
+        label curr3 "PMIC-2 ASIC 1.8V_MAIN Rail Curr (out1)"
+        label curr4 "PMIC-2 ASIC 1.2V_MAIN Rail Curr (out2)"
+    chip "mp2975-i2c-*-64"
+        label in1 "PMIC-2 12V ASIC VDDI_M VDDHS_M (in)"
+        label in2 "PMIC-2 ASIC 1.8V_MAIN Rail (out1)"
+        label in3 "PMIC-2 ASIC 1.2V_MAIN Rail (out2)"
+        ignore in4
+        label temp1 "PMIC-2 ASIC 1.8V_1.2V_MAIN Temp 1"
+        ignore temp2
+        label power1 "PMIC-2 12V ASIC 1.8V_1.2V_MAIN Rail Pwr (in)"
+        label power2 "PMIC-2 ASIC 1.8V_MAIN Rail Pwr (out1)"
+        label power3 "PMIC-2 ASIC 1.2V_MAIN Rail Pwr (out2)"
+        ignore power4
+        label curr1 "PMIC-2 12V ASIC 1.8V_1.2V_MAIN Rail Curr (in)"
+        label curr2 "PMIC-2 ASIC 1.8V_MAIN Rail Curr (out1)"
+        label curr3 "PMIC-2 ASIC 1.2V_MAIN Rail Curr (out2)"
+        ignore curr4
+
+    chip "xdpe12284-i2c-*-66"
+        label in1 "PMIC-3 12V ASIC VDD_T0_T3 VDDI_T0_T3 (in1)"
+        label in2 "PMIC-3 12V ASIC VDD_T0_T3 VDDI_T0_T3 (in2)"
+        label in3 "PMIC-3 ASIC VCORE_T0_1 Rail (out1)"
+        label in4 "PMIC-3 ASIC 1.8V_T0_1 Rail (out2)"
+        label temp1 "PMIC-3 ASIC VCORE_T0_1 Temp 1"
+        label temp2 "PMIC-3 ASIC 1.8V_T0_1 Temp 2"
+        label power1 "PMIC-3 12V ASIC VCORE_1.8V_T0_1 Rail Pwr (in) "
+        ignore power2 
+        label power3 "PMIC-3 ASIC VCORE_T0_1 Rail Pwr (out1)"
+        label power4 "PMIC-3 ASIC 1.8V_T0_1 Rail Pwr (out2)"
+        label curr1 "PMIC-3 12V ASIC VCORE_T0_1 Rail Curr (in1)"
+        label curr2 "PMIC-3 12V ASIC 1.8V_T0_1 Rail Curr (in2)"
+        label curr3 "PMIC-3 ASIC VCORE_T0_1 Rail Curr (out1)"
+        label curr4 "PMIC-3 ASIC 1.8V_T0_1 Rail Curr (out2)"
+    chip "mp2975-i2c-*-66"
+        label in1 "PMIC-3 12V ASIC VDD_T0_T3 VDDI_T0_T3 (in)"
+        label in2 "PMIC-3 ASIC VCORE_T0_3 Rail (out1)"
+        label in3 "PMIC-3 ASIC 1.8V_T0_3 Rail (out2)"
+        ignore in4
+        label temp1 "PMIC-3 ASIC VCORE_1.8V_T0_3 Temp 1"
+        ignore temp2
+        label power1 "PMIC-3 12V ASIC VCORE_1.8V_T0_3 Rail Pwr (in) "
+        label power2 "PMIC-3 ASIC VCORE_T0_3 Rail Pwr (out1)"
+        label power3 "PMIC-3 ASIC 1.8V_T0_3 Rail Pwr (out2)"
+        ignore power4 
+        label curr1 "PMIC-3 12V ASIC VCORE_1.8V_T0_3 Rail Curr (in)"
+        label curr2 "PMIC-3 ASIC VCORE_T0_3 Rail Curr (out1)"
+        label curr3 "PMIC-3 ASIC 1.8V_T0_3 Rail Curr (out2)"
+        ignore curr4
+
+    chip "xdpe12284-i2c-*-6a"
+        label in1 "PMIC-4 12V ASIC VDD_T4_T7 VDDI_T4_T7 (in1)"
+        label in2 "PMIC-4 12V ASIC VDD_T4_T7 VDDI_T4_T7 (in2)"
+        label in3 "PMIC-4 ASIC VCORE_T2_3 Rail (out1)"
+        label in4 "PMIC-4 ASIC 1.8V_T2_3 Rail (out2)"
+        label temp1 "PMIC-4 ASIC VCORE_T2_3 Temp 1"
+        label temp2 "PMIC-4 ASIC 1.8V_T2_3 Temp 2"
+        label power1 "PMIC-4 12V ASIC VCORE_1.8V_T2_3 Rail Pwr (in) "
+        ignore power2 
+        label power3 "PMIC-4 ASIC VCORE_T2_3 Rail Pwr (out1)"
+        label power4 "PMIC-4 ASIC 1.8V_T2_3 Rail Pwr (out2)"
+        label curr1 "PMIC-4 12V ASIC VCORE_T2_3 Rail Curr (in1)"
+        label curr2 "PMIC-4 12V ASIC 1.8V_T2_3 Rail Curr (in2)"
+        label curr3 "PMIC-4 ASIC VCORE_T2_3 Rail Curr (out1)"
+        label curr4 "PMIC-4 ASIC 1.8V_T2_3 Rail Curr (out2)"
+    chip "mp2975-i2c-*-6a"
+        label in1 "PMIC-4 12V ASIC VDD_T4_T7 VDDI_T4_T7 (in1)"
+        label in2 "PMIC-4 12V ASIC VDD_T4_T7 VDDI_T4_T7 (in2)"
+        label in3 "PMIC-4 ASIC VCORE_T2_3 Rail (out1)"
+        label in4 "PMIC-4 ASIC 1.8V_T2_3 Rail (out2)"
+        label temp1 "PMIC-4 ASIC VCORE_T2_3 Temp 1"
+        label temp2 "PMIC-4 ASIC 1.8V_T2_3 Temp 2"
+        label power1 "PMIC-4 12V ASIC VCORE_1.8V_T2_3 Rail Pwr (in) "
+        ignore power2 
+        label power3 "PMIC-4 ASIC VCORE_T2_3 Rail Pwr (out1)"
+        label power4 "PMIC-4 ASIC 1.8V_T2_3 Rail Pwr (out2)"
+        label curr1 "PMIC-4 12V ASIC VCORE_T2_3 Rail Curr (in1)"
+        label curr2 "PMIC-4 12V ASIC 1.8V_T2_3 Rail Curr (in2)"
+        label curr3 "PMIC-4 ASIC VCORE_T2_3 Rail Curr (out1)"
+        label curr4 "PMIC-4 ASIC 1.8V_T2_3 Rail Curr (out2)"
+
+    chip "xdpe12284-i2c-*-6e"
+        label in1 "PMIC-5 12V ASIC VDDHS_T0_T3 VDDHS_T4_T7 (in1)"
+        label in2 "PMIC-5 12V ASIC VDDHS_T0_T3 VDDHS_T4_T7 (in2)"
+        label in3 "PMIC-5 ASIC 1.2V_T0_3 Rail (out1)"
+        label in4 "PMIC-5 ASIC 1.2V_T4_7 Rail (out2)"
+        label temp1 "PMIC-5 ASIC 1.2V_T0_3 Temp 1"
+        label temp2 "PMIC-5 ASIC 1.2V_T4_7 Temp 2"
+        label power1 "PMIC-5 12V ASIC 1.2V_T0_3_T4_7 Rail Pwr (in) "
+        ignore power2 
+        label power3 "PMIC-5 ASIC 1.2V_T0_3 Rail Pwr (out1)"
+        label power4 "PMIC-5 ASIC 1.2V_T4_7 Rail Pwr (out2)"
+        label curr1 "PMIC-5 12V ASIC 1.2V_T0_3 Rail Curr (in1)"
+        label curr2 "PMIC-5 12V ASIC 1.2V_T4_7 Rail Curr (in2)"
+        label curr3 "PMIC-5 ASIC 1.2V_T0_3 Rail Curr (out1)"
+        label curr4 "PMIC-5 ASIC 1.2V_T4_7 Rail Curr (out2)"
+    chip "mp2975-i2c-*-6e"
+        label in1 "PMIC-5 12V ASIC VDDHS_T0_T3 VDDHS_T4_T7 (in)"
+        label in2 "PMIC-5 12V ASIC VDDHS_T0_T3 VDDHS_T4_T7 Rail (out1)"
+        label in3 "PMIC-5 ASIC 1.2V_T4_7 Rail (out2)"
+        ignore in4
+        label temp1 "PMIC-5 ASIC 1.2V_T0_3_T4_7 Temp 1"
+        ignore temp2
+        label power1 "PMIC-5 12V ASIC 1.2V_T0_3_T4_7 Rail Pwr (in)"
+        label power2 "PMIC-5 ASIC 1.2V_T0_3 Rail Pwr (out1)"
+        label power3 "PMIC-5 ASIC 1.2V_T4_7 Rail Pwr (out2)"
+        ignore power4
+        label curr1 "PMIC-5 12V ASIC 1.2V_T0_3_T4_7 Rail Curr (in)"
+        label curr2 "PMIC-5 ASIC 1.2V_T0_3 Rail Curr (out1)"
+        label curr3 "PMIC-5 ASIC 1.2V_T4_7 Rail Curr (out2)"
+        ignore curr4
+
+# DPU 1
+bus "i2c-18" "i2c-1-mux (chan_id 17)"
+    chip "xdpe12284-i2c-18-69"
+        label in1 "PMIC-6 12V DPU1 VDD VDDQ_DDR (in1)"
+        label in2 "PMIC-6 DPU1 VDD (out1)" 
+        label in3 "PMIC-6 DPU1 VDD_DDR (out2)"
+        ignore in4 
+        label temp1 "PMIC-6 DPU1 VDD VDD_DDR Temp 1"
+        ignore temp2 
+        label power1 "PMIC-6 12V DPU1 VDD VDDQ_DDR (in)"
+        label power2 "PMIC-6 DPU1 VDD Rail Pwr (out1)"
+        label power3 "PMIC-6 DPU1 VDD_DDR Rail Pwr (out1)"
+        ignore power4 
+        label curr1 "PMIC-6 12V DPU1 VDD VDDQ_DDR Rail Curr (in1)"
+        label curr2 "PMIC-6 DPU1 VDD Rail Curr (in1)"
+        label curr3 "PMIC-6 DPU1 VDD_DDR Rail Curr (out1)"
+        ignore curr4
+    chip "mp2975-i2c-18-69"
+        label in1 "PMIC-6 12V DPU1 VDD VDDQ_DDR (in1)"
+        label in2 "PMIC-6 DPU1 VDD (out1)" 
+        label in3 "PMIC-6 DPU1 VDD_DDR (out2)"
+        ignore in4 
+        label temp1 "PMIC-6 DPU1 VDD VDD_DDR Temp 1"
+        ignore temp2 
+        label power1 "PMIC-6 12V DPU1 VDD VDDQ_DDR (in)"
+        label power2 "PMIC-6 DPU1 VDD Rail Pwr (out1)"
+        label power3 "PMIC-6 DPU1 VDD_DDR Rail Pwr (out1)"
+        ignore power4 
+        label curr1 "PMIC-6 12V DPU1 VDD VDDQ_DDR Rail Curr (in1)"
+        label curr2 "PMIC-6 DPU1 VDD Rail Curr (in1)"
+        label curr3 "PMIC-6 DPU1 VDD_DDR Rail Curr (out1)"
+        ignore curr4
+
+    chip "xdpe12284-i2c-18-6A"
+        label in1 "PMIC-7 12V DPU1 VDD_CPU (in1)"
+        label in2 "PMIC-7 DPU1 VDD_CPU (out)" 
+        ignore in3 
+        ignore in4 
+        label temp1 "PMIC-7 DPU1 VDD_CPU Temp 1"
+        ignore temp2 
+        label power1 "PMIC-7 12V DPU1 VDD_CPU (in)"
+        label power2 "PMIC-7 DPU1 VDD_CPU Rail Pwr (out)"
+        ignore power3 
+        ignore power4 
+        label curr1 "PMIC-7 12V DPU1 VDD_CPU Rail Curr (in)"
+        label curr2 "PMIC-7 DPU1 VDD_CPU Rail Curr (out)"
+        ignore curr3 
+        ignore curr4
+    chip "mp2975-i2c-18-6A"
+        label in1 "PMIC-7 12V DPU1 VDD_CPU (in1)"
+        label in2 "PMIC-7 DPU1 VDD_CPU (out)" 
+        ignore in3 
+        ignore in4 
+        label temp1 "PMIC-7 DPU1 VDD_CPU Temp 1"
+        ignore temp2 
+        label power1 "PMIC-7 12V DPU1 VDD_CPU (in)"
+        label power2 "PMIC-7 DPU1 VDD_CPU Rail Pwr (out)"
+        ignore power3 
+        ignore power4 
+        label curr1 "PMIC-7 12V DPU1 VDD_CPU Rail Curr (in)"
+        label curr2 "PMIC-7 DPU1 VDD_CPU Rail Curr (out)"
+        ignore curr3 
+        ignore curr4
+
+    chip "tmp421-i2c-18-1F"
+        label temp1 "Ambient DPU1 Side (air exhaust)"
+
+# DPU 2
+bus "i2c-19" "i2c-1-mux (chan_id 18)"
+    chip "xdpe12284-i2c-19-69"
+        label in1 "PMIC-8 12V DPU2 VDD VDDQ_DDR (in1)"
+        label in2 "PMIC-8 DPU2 VDD (out1)" 
+        label in3 "PMIC-8 DPU2 VDD_DDR (out2)"
+        ignore in4 
+        label temp1 "PMIC-8 DPU2 VDD VDD_DDR Temp 1"
+        ignore temp2 
+        label power1 "PMIC-8 12V DPU2 VDD VDDQ_DDR (in)"
+        label power2 "PMIC-8 DPU2 VDD Rail Pwr (out1)"
+        label power3 "PMIC-8 DPU2 VDD_DDR Rail Pwr (out1)"
+        ignore power4 
+        label curr1 "PMIC-8 12V DPU2 VDD VDDQ_DDR Rail Curr (in1)"
+        label curr2 "PMIC-8 DPU2 VDD Rail Curr (in1)"
+        label curr3 "PMIC-8 DPU2 VDD_DDR Rail Curr (out1)"
+        ignore curr4
+    chip "mp2975-i2c-19-69"
+        label in1 "PMIC-8 12V DPU2 VDD VDDQ_DDR (in1)"
+        label in2 "PMIC-8 DPU2 VDD (out1)" 
+        label in3 "PMIC-8 DPU2 VDD_DDR (out2)"
+        ignore in4 
+        label temp1 "PMIC-8 DPU2 VDD VDD_DDR Temp 1"
+        ignore temp2 
+        label power1 "PMIC-8 12V DPU2 VDD VDDQ_DDR (in)"
+        label power2 "PMIC-8 DPU2 VDD Rail Pwr (out1)"
+        label power3 "PMIC-8 DPU2 VDD_DDR Rail Pwr (out1)"
+        ignore power4 
+        label curr1 "PMIC-8 12V DPU2 VDD VDDQ_DDR Rail Curr (in1)"
+        label curr2 "PMIC-8 DPU2 VDD Rail Curr (in1)"
+        label curr3 "PMIC-8 DPU2 VDD_DDR Rail Curr (out1)"
+        ignore curr4
+    chip "xdpe12284-i2c-19-6A"
+        label in1 "PMIC-9 12V DPU2 VDD_CPU (in1)"
+        label in2 "PMIC-9 DPU2 VDD_CPU (out)" 
+        ignore in3 
+        ignore in4 
+        label temp1 "PMIC-9 DPU2 VDD_CPU Temp 1"
+        ignore temp2 
+        label power1 "PMIC-9 12V DPU2 VDD_CPU (in)"
+        label power2 "PMIC-9 DPU2 VDD_CPU Rail Pwr (out)"
+        ignore power3 
+        ignore power4 
+        label curr1 "PMIC-9 12V DPU2 VDD_CPU Rail Curr (in)"
+        label curr2 "PMIC-9 DPU2 VDD_CPU Rail Curr (out)"
+        ignore curr3 
+        ignore curr4
+    chip "mp2975-i2c-19-6A"
+        label in1 "PMIC-9 12V DPU2 VDD_CPU (in1)"
+        label in2 "PMIC-9 DPU2 VDD_CPU (out)" 
+        ignore in3 
+        ignore in4 
+        label temp1 "PMIC-9 DPU2 VDD_CPU Temp 1"
+        ignore temp2 
+        label power1 "PMIC-9 12V DPU2 VDD_CPU (in)"
+        label power2 "PMIC-9 DPU2 VDD_CPU Rail Pwr (out)"
+        ignore power3 
+        ignore power4 
+        label curr1 "PMIC-9 12V DPU2 VDD_CPU Rail Curr (in)"
+        label curr2 "PMIC-9 DPU2 VDD_CPU Rail Curr (out)"
+        ignore curr3 
+        ignore curr4
+
+    chip "tmp421-i2c-19-1F"
+        label temp1 "Ambient DPU2 Side (air exhaust)"
+
+
+# DPU 3
+bus "i2c-20" "i2c-1-mux (chan_id 19)"
+    chip "xdpe12284-i2c-20-69"
+        label in1 "PMIC-10 12V DPU3 VDD VDDQ_DDR (in1)"
+        label in2 "PMIC-10 DPU3 VDD (out1)" 
+        label in3 "PMIC-10 DPU3 VDD_DDR (out2)"
+        ignore in4 
+        label temp1 "PMIC-10 DPU3 VDD VDD_DDR Temp 1"
+        ignore temp2 
+        label power1 "PMIC-10 12V DPU3 VDD VDDQ_DDR (in)"
+        label power2 "PMIC-10 DPU3 VDD Rail Pwr (out1)"
+        label power3 "PMIC-10 DPU3 VDD_DDR Rail Pwr (out1)"
+        ignore power4 
+        label curr1 "PMIC-10 12V DPU3 VDD VDDQ_DDR Rail Curr (in1)"
+        label curr2 "PMIC-10 DPU3 VDD Rail Curr (in1)"
+        label curr3 "PMIC-10 DPU3 VDD_DDR Rail Curr (out1)"
+        ignore curr4
+    chip "mp2975-i2c-20-69"
+        label in1 "PMIC-10 12V DPU3 VDD VDDQ_DDR (in1)"
+        label in2 "PMIC-10 DPU3 VDD (out1)" 
+        label in3 "PMIC-10 DPU3 VDD_DDR (out2)"
+        ignore in4 
+        label temp1 "PMIC-10 DPU3 VDD VDD_DDR Temp 1"
+        ignore temp2 
+        label power1 "PMIC-10 12V DPU3 VDD VDDQ_DDR (in)"
+        label power2 "PMIC-10 DPU3 VDD Rail Pwr (out1)"
+        label power3 "PMIC-10 DPU3 VDD_DDR Rail Pwr (out1)"
+        ignore power4 
+        label curr1 "PMIC-10 12V DPU3 VDD VDDQ_DDR Rail Curr (in1)"
+        label curr2 "PMIC-10 DPU3 VDD Rail Curr (in1)"
+        label curr3 "PMIC-10 DPU3 VDD_DDR Rail Curr (out1)"
+        ignore curr4
+    chip "xdpe12284-i2c-20-6A"
+        label in1 "PMIC-11 12V DPU3 VDD_CPU (in1)"
+        label in2 "PMIC-11 DPU3 VDD_CPU (out)" 
+        ignore in3 
+        ignore in4 
+        label temp1 "PMIC-11 DPU3 VDD_CPU Temp 1"
+        ignore temp2 
+        label power1 "PMIC-11 12V DPU3 VDD_CPU (in)"
+        label power2 "PMIC-11 DPU3 VDD_CPU Rail Pwr (out)"
+        ignore power3 
+        ignore power4 
+        label curr1 "PMIC-11 12V DPU3 VDD_CPU Rail Curr (in)"
+        label curr2 "PMIC-11 DPU3 VDD_CPU Rail Curr (out)"
+        ignore curr3 
+        ignore curr4
+    chip "mp2975-i2c-20-6A"
+        label in1 "PMIC-11 12V DPU3 VDD_CPU (in1)"
+        label in2 "PMIC-11 DPU3 VDD_CPU (out)" 
+        ignore in3 
+        ignore in4 
+        label temp1 "PMIC-11 DPU3 VDD_CPU Temp 1"
+        ignore temp2 
+        label power1 "PMIC-11 12V DPU3 VDD_CPU (in)"
+        label power2 "PMIC-11 DPU3 VDD_CPU Rail Pwr (out)"
+        ignore power3 
+        ignore power4 
+        label curr1 "PMIC-11 12V DPU3 VDD_CPU Rail Curr (in)"
+        label curr2 "PMIC-11 DPU3 VDD_CPU Rail Curr (out)"
+        ignore curr3 
+        ignore curr4
+
+    chip "tmp421-i2c-20-1F"
+        label temp1 "Ambient DPU3 Side (air exhaust)"
+
+
+# DPU 4
+bus "i2c-21" "i2c-1-mux (chan_id 20)"
+    chip "xdpe12284-i2c-21-69"
+        label in1 "PMIC-12 12V DPU4 VDD VDDQ_DDR (in1)"
+        label in2 "PMIC-12 DPU4 VDD (out1)" 
+        label in3 "PMIC-12 DPU4 VDD_DDR (out2)"
+        ignore in4 
+        label temp1 "PMIC-12 DPU4 VDD VDD_DDR Temp 1"
+        ignore temp2 
+        label power1 "PMIC-12 12V DPU3 VDD VDDQ_DDR (in)"
+        label power2 "PMIC-12 DPU4 VDD Rail Pwr (out1)"
+        label power3 "PMIC-12 DPU4 VDD_DDR Rail Pwr (out1)"
+        ignore power4 
+        label curr1 "PMIC-12 12V DPU4 VDD VDDQ_DDR Rail Curr (in1)"
+        label curr2 "PMIC-12 DPU4 VDD Rail Curr (in1)"
+        label curr3 "PMIC-12 DPU4 VDD_DDR Rail Curr (out1)"
+        ignore curr4
+    chip "mp2975-i2c-21-69"
+        label in1 "PMIC-12 12V DPU4 VDD VDDQ_DDR (in1)"
+        label in2 "PMIC-12 DPU4 VDD (out1)" 
+        label in3 "PMIC-12 DPU4 VDD_DDR (out2)"
+        ignore in4 
+        label temp1 "PMIC-12 DPU4 VDD VDD_DDR Temp 1"
+        ignore temp2 
+        label power1 "PMIC-12 12V DPU3 VDD VDDQ_DDR (in)"
+        label power2 "PMIC-12 DPU4 VDD Rail Pwr (out1)"
+        label power3 "PMIC-12 DPU4 VDD_DDR Rail Pwr (out1)"
+        ignore power4 
+        label curr1 "PMIC-12 12V DPU4 VDD VDDQ_DDR Rail Curr (in1)"
+        label curr2 "PMIC-12 DPU4 VDD Rail Curr (in1)"
+        label curr3 "PMIC-12 DPU4 VDD_DDR Rail Curr (out1)"
+        ignore curr4
+    chip "xdpe12284-i2c-21-6A"
+        label in1 "PMIC-13 12V DPU4 VDD_CPU (in1)"
+        label in2 "PMIC-13 DPU4 VDD_CPU (out)"
+        ignore in3 
+        ignore in4 
+        label temp1 "PMIC-13 DPU4 VDD_CPU Temp 1"
+        ignore temp2 
+        label power1 "PMIC-13 12V DPU4 VDD_CPU (in)"
+        label power2 "PMIC-13 DPU4 VDD_CPU Rail Pwr (out)"
+        ignore power3 
+        ignore power4 
+        label curr1 "PMIC-13 12V DPU4 VDD_CPU Rail Curr (in)"
+        label curr2 "PMIC-13 DPU4 VDD_CPU Rail Curr (out)"
+        ignore curr3 
+        ignore curr4
+    chip "mp2975-i2c-21-6A"
+        label in1 "PMIC-13 12V DPU4 VDD_CPU (in1)"
+        label in2 "PMIC-13 DPU4 VDD_CPU (out)"
+        ignore in3 
+        ignore in4 
+        label temp1 "PMIC-13 DPU4 VDD_CPU Temp 1"
+        ignore temp2 
+        label power1 "PMIC-13 12V DPU4 VDD_CPU (in)"
+        label power2 "PMIC-13 DPU4 VDD_CPU Rail Pwr (out)"
+        ignore power3 
+        ignore power4 
+        label curr1 "PMIC-13 12V DPU4 VDD_CPU Rail Curr (in)"
+        label curr2 "PMIC-13 DPU4 VDD_CPU Rail Curr (out)"
+        ignore curr3 
+        ignore curr4
+
+    chip "tmp421-i2c-21-1F"
+        label temp1 "Ambient DPU4 Side (air exhaust)"
+
+# Power supplies
+bus "i2c-4" "i2c-1-mux (chan_id 3)"
+    chip "dps460-i2c-*-58"
+        label in1 "PSU-2(R) 220V Rail (in)"
+        ignore in2
+        label in3 "PSU-2(R) 12V Rail (out)"
+        label fan1 "PSU-2(R) Fan 1"
+        ignore fan2
+        ignore fan3
+        label temp1 "PSU-2(R) Temp 1"
+        label temp2 "PSU-2(R) Temp 2"
+        label temp3 "PSU-2(R) Temp 3"
+        label power1 "PSU-2(R) 220V Rail Pwr (in)"
+        label power2 "PSU-2(R) 12V Rail Pwr (out)"
+        label curr1 "PSU-2(R) 220V Rail Curr (in)"
+        label curr2 "PSU-2(R) 12V Rail Curr (out)"
+    chip "dps460-i2c-*-59"
+        label in1 "PSU-1(L) 220V Rail (in)"
+        ignore in2
+        label in3 "PSU-1(L) 12V Rail (out)"
+        label fan1 "PSU-1(L) Fan 1"
+        ignore fan2
+        ignore fan3
+        label temp1 "PSU-1(L) Temp 1"
+        label temp2 "PSU-1(L) Temp 2"
+        label temp3 "PSU-1(L) Temp 3"
+        label power1 "PSU-1(L) 220V Rail Pwr (in)"
+        label power2 "PSU-1(L) 12V Rail Pwr (out)"
+        label curr1 "PSU-1(L) 220V Rail Curr (in)"
+        label curr2 "PSU-1(L) 12V Rail Curr (out)"
+
+# Chassis fans
+chip "mlxreg_fan-isa-*"
+    label fan1 "Chassis Fan Drawer-1 Tach 1"
+    label fan2 "Chassis Fan Drawer-2 Tach 1"
+    label fan3 "Chassis Fan Drawer-3 Tach 1"
+    label fan4 "Chassis Fan Drawer-4 Tach 1"
+
+
+# Miscellaneous
+chip "*-virtual-*"
+    ignore temp1
+
+# AMD Comex
+
+bus "i2c-39" "i2c-1-mux (chan_id 6)"
+chip "mp2855-i2c-39-69"
+    label in1 "PMIC-14 COMEX VDDCR INPUT VOLT (in1)"
+    label in2 "PMIC-14 COMEX VDDCR_CPU VOLT (out1)"
+    label in3 "PMIC-14 COMEX VDDCR_SOC VOLT (out2)"
+    label temp1 "PMIC-14 COMEX VDDCR_CPU PHASE TEMP"
+    label temp2 "PMIC-14 COMEX VDDCR_SOC PHASE TEMP"
+    label curr1 "PMIC-14 COMEX VDDCR_CPU CURR"
+    label curr2 "PMIC-14 COMEX VDDCR_SOC CURR"
+
+chip "mp2975-i2c-39-6a"
+    label in1 "PMIC-15 COMEX VDD_MEM INPUT VOLT"
+    label in2 "PMIC-15 COMEX VDD_MEM OUTPUT VOLT"
+    label temp1 "PMIC-15 COMEX VDD_MEM PHASE TEMP"
+    label curr1 "PMIC-15 COMEX VDD_MEM INPUT CURR"
+    label curr2 "PMIC-15 COMEX VDD_MEM OUTPUT CURR"
+    ignore curr1
+    ignore curr2
+    label power1 "PMIC-15 COMEX VDD_MEM INPUT POWER"
+    label power2 "PMIC-15 COMEX VDD_MEM OUTPUT POWER"
+
+bus "i2c-43" "Synopsys DesignWare I2C adapter"
+chip "jc42-i2c-43-1a"
+    label temp1 "SODIMM1 Temp"
+
+chip "jc42-i2c-43-1b"
+    label temp1 "SODIMM2 Temp"
+
+chip "jc42-i2c-43-1e"
+    label temp1 "SODIMM3 Temp"
+
+chip "jc42-i2c-43-1f"
+    label temp1 "SODIMM4 Temp"
+
+chip "k10temp-pci-*"
+    label temp1 "CPU PACKAGE TEMP"
+    label temp2 "CPU DIE0 TEMP"
+
+chip "nvme-pci-*"
+    label temp1 "SSD Temp"
+    ignore temp2
+    ignore temp3
+
+chip "00000400400-mdio-*"
+   label temp1 "PHY TEMP"
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/services.conf b/device/mellanox/x86_64-nvidia_sn4280-r0/services.conf
new file mode 100644
index 000000000..529f66cdf
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/services.conf
@@ -0,0 +1 @@
+rshim.service
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/system_health_monitoring_config.json b/device/mellanox/x86_64-nvidia_sn4280-r0/system_health_monitoring_config.json
new file mode 120000
index 000000000..98df66c27
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/system_health_monitoring_config.json
@@ -0,0 +1 @@
+../x86_64-mlnx_msn2700-r0/system_health_monitoring_config.json
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/thermal_policy.json b/device/mellanox/x86_64-nvidia_sn4280-r0/thermal_policy.json
new file mode 120000
index 000000000..5a25cd87f
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/thermal_policy.json
@@ -0,0 +1 @@
+../x86_64-mlnx_msn2700-r0/thermal_policy.json
\ No newline at end of file
diff --git a/platform/mellanox/asic_table.j2 b/platform/mellanox/asic_table.j2
index 9fa36035a..0069c6b77 100644
--- a/platform/mellanox/asic_table.j2
+++ b/platform/mellanox/asic_table.j2
@@ -49,6 +49,7 @@
         'x86_64-nvidia_sn5600-r0':'MELLANOX-SPECTRUM-4',
         'x86_64-nvidia_sn5400_simx-r0':'MELLANOX-SPECTRUM-4',
         'x86_64-nvidia_sn5600_simx-r0':'MELLANOX-SPECTRUM-4',
+        'x86_64-nvidia_sn4280-r0':'MELLANOX-SPECTRUM-3',
         'vs-platform':'vs'
     }
 %}
diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/component.py b/platform/mellanox/mlnx-platform-api/sonic_platform/component.py
index ef1713f8f..f1ce4d8b1 100644
--- a/platform/mellanox/mlnx-platform-api/sonic_platform/component.py
+++ b/platform/mellanox/mlnx-platform-api/sonic_platform/component.py
@@ -1,5 +1,5 @@
 #
-# Copyright (c) 2019-2023 NVIDIA CORPORATION & AFFILIATES.
+# Copyright (c) 2019-2024 NVIDIA CORPORATION & AFFILIATES.
 # Apache-2.0
 #
 # Licensed under the Apache License, Version 2.0 (the "License");
@@ -130,7 +130,7 @@ class ONIEUpdater(object):
     ONIE_FW_UPDATE_CMD_INSTALL = ['/usr/bin/mlnx-onie-fw-update.sh', 'update', '--no-reboot']
     ONIE_FW_UPDATE_CMD_SHOW_PENDING = ['/usr/bin/mlnx-onie-fw-update.sh', 'show-pending']
 
-    ONIE_VERSION_PARSE_PATTERN = '([0-9]{4})\.([0-9]{2})-([0-9]+)\.([0-9]+)\.([0-9]+)-?(dev)?-([0-9]+)'
+    ONIE_VERSION_PARSE_PATTERN = '([0-9]{4})\.([0-9]{2})-([0-9]+)\.([0-9]+)\.([0-9]+)-?(rc[0-9]+)?-?(dev)?-([0-9]+)'
     ONIE_VERSION_BASE_PARSE_PATTERN = '([0-9]+)\.([0-9]+)\.([0-9]+)'
     ONIE_VERSION_REQUIRED = '5.2.0016'
 
@@ -153,7 +153,7 @@ def __init__(self):
 
     def __add_prefix(self, image_path):
         if image_path.endswith(self.BIOS_UPDATE_FILE_EXT_CAB):
-            return image_path;
+            return image_path
         elif self.BIOS_UPDATE_FILE_EXT_ROM not in image_path:
             rename_path = "/tmp/00-{}".format(os.path.basename(image_path))
         else:
@@ -281,8 +281,9 @@ def parse_onie_version(self, version, is_base=False):
         onie_major = m.group(3)
         onie_minor = m.group(4)
         onie_release = m.group(5)
-        onie_signtype = m.group(6)
-        onie_baudrate = m.group(7)
+        onie_rc = m.group(6)
+        onie_signtype = m.group(7)
+        onie_baudrate = m.group(8)
 
         return onie_year, onie_month, onie_major, onie_minor, onie_release, onie_baudrate
 
@@ -732,6 +733,7 @@ class ComponentCPLD(Component):
 
     MST_DEVICE_PATH = '/dev/mst'
     MST_DEVICE_PATTERN = 'mt[0-9]*_pci_cr0'
+    FW_VERSION_FORMAT = 'CPLD{}_REV{}{}'
 
     CPLD_NUMBER_FILE = '/var/run/hw-management/config/cpld_num'
     CPLD_PART_NUMBER_FILE = '/var/run/hw-management/system/cpld{}_pn'
@@ -833,7 +835,7 @@ def get_firmware_version(self):
         version = version.rstrip('\n').zfill(self.CPLD_VERSION_MAX_LENGTH)
         version_minor = version_minor.rstrip('\n').zfill(self.CPLD_VERSION_MINOR_MAX_LENGTH)
 
-        return "CPLD{}_REV{}{}".format(part_number, version, version_minor)
+        return self.FW_VERSION_FORMAT.format(part_number, version, version_minor)
 
     def get_available_firmware_version(self, image_path):
         with MPFAManager(image_path) as mpfa:
@@ -906,3 +908,43 @@ def _install_firmware(self, image_path):
             return False
 
         return True
+
+class ComponentCPLDSN4280(ComponentCPLD):
+    CPLD_FIRMWARE_UPDATE_COMMAND = ['cpldupdate', '--gpio', '--print-progress', '']
+
+    def _install_firmware(self, image_path):
+        self.CPLD_FIRMWARE_UPDATE_COMMAND[3] = image_path
+
+        try:
+            print("INFO: Installing {} firmware update: path={}".format(self.name, image_path))
+            subprocess.check_call(self.CPLD_FIRMWARE_UPDATE_COMMAND, universal_newlines=True)
+        except subprocess.CalledProcessError as e:
+            print("ERROR: Failed to update {} firmware: {}".format(self.name, str(e)))
+            return False
+
+        return True
+
+class ComponenetFPGADPU(ComponentCPLD):
+    CPLD_NUMBER_FILE = '/var/run/hw-management/config/dpu_num'
+
+    COMPONENT_NAME = 'DPU{}_FPGA'
+    COMPONENT_DESCRIPTION = 'FPGA - Field-Programmable Gate Array'
+    FW_VERSION_FORMAT = 'FPGA{}_REV{}{}'
+
+    CPLD_PART_NUMBER_FILE = '/var/run/hw-management/dpu{}/system/fpga1_pn'
+    CPLD_VERSION_FILE = '/var/run/hw-management/dpu{}/system/fpga1_version'
+    CPLD_VERSION_MINOR_FILE = '/var/run/hw-management/dpu{}/system/fpga1_version_min'
+
+    CPLD_FIRMWARE_UPDATE_COMMAND = ['cpldupdate', '--cpld_chain', '2', '--gpio', '--print-progress', '']
+
+    def _install_firmware(self, image_path):
+        self.CPLD_FIRMWARE_UPDATE_COMMAND[5] = image_path
+
+        try:
+            print("INFO: Installing {} firmware update: path={}".format(self.name, image_path))
+            subprocess.check_call(self.CPLD_FIRMWARE_UPDATE_COMMAND, universal_newlines=True)
+        except subprocess.CalledProcessError as e:
+            print("ERROR: Failed to update {} firmware: {}".format(self.name, str(e)))
+            return False
+
+        return True
diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/device_data.py b/platform/mellanox/mlnx-platform-api/sonic_platform/device_data.py
index 1f2b3164a..676e2b498 100644
--- a/platform/mellanox/mlnx-platform-api/sonic_platform/device_data.py
+++ b/platform/mellanox/mlnx-platform-api/sonic_platform/device_data.py
@@ -102,6 +102,13 @@
     },
     'x86_64-mlnx_msn4600-r0': {
     },
+    'x86_64-nvidia_sn4280-r0': {
+        'thermal': {
+            "capability": {
+                "comex_amb": False
+            }
+        }
+    },
     'x86_64-nvidia_sn4800-r0': {
         'thermal': {
             "capability": {
@@ -263,11 +270,13 @@ def get_bios_component(cls):
 
     @classmethod
     def get_cpld_component_list(cls):
-        from .component import ComponentCPLD, ComponentCPLDSN2201
+        from .component import ComponentCPLD, ComponentCPLDSN2201, ComponentCPLDSN4280, ComponenetFPGADPU
         if cls.get_platform_name() in ['x86_64-nvidia_sn2201-r0']:
             # For SN2201, special chass is required for handle BIOS
             # Currently, only fetching BIOS version is supported
             return ComponentCPLDSN2201.get_component_list()
+        if cls.get_platform_name() in ['x86_64-nvidia_sn4280-r0']:
+            return ComponentCPLDSN4280.get_component_list() + ComponenetFPGADPU.get_component_list()
         return ComponentCPLD.get_component_list()
 
     @classmethod
diff --git a/platform/mellanox/mlnx-platform-api/tests/test_component.py b/platform/mellanox/mlnx-platform-api/tests/test_component.py
index 131220c27..d3f4543fd 100644
--- a/platform/mellanox/mlnx-platform-api/tests/test_component.py
+++ b/platform/mellanox/mlnx-platform-api/tests/test_component.py
@@ -1,5 +1,5 @@
 #
-# Copyright (c) 2023 NVIDIA CORPORATION & AFFILIATES.
+# Copyright (c) 2023-2024 NVIDIA CORPORATION & AFFILIATES.
 # Apache-2.0
 #
 # Licensed under the Apache License, Version 2.0 (the "License");
@@ -35,6 +35,8 @@
                                      ComponentBIOSSN2201, \
                                      ComponentCPLD,       \
                                      ComponentCPLDSN2201, \
+                                     ComponentCPLDSN4280, \
+                                     ComponenetFPGADPU,   \
                                      MPFAManager,         \
                                      ONIEUpdater,         \
                                      Component
@@ -284,6 +286,13 @@ def test_cpld_get_component_list(self):
         for index, item in enumerate(component_list):
             assert item.name == 'CPLD{}'.format(index + 1)
 
+    @mock.patch('sonic_platform.component.ComponenetFPGADPU._read_generic_file', mock.MagicMock(return_value='4'))
+    def test_cpld_get_component_list_dpu(self):
+        component_list = ComponenetFPGADPU.get_component_list()
+        assert len(component_list) == 4
+        for index, item in enumerate(component_list):
+            assert item.name == 'DPU{}_FPGA'.format(index + 1)
+
     def test_cpld_get_mst_device(self):
         ComponentCPLD.MST_DEVICE_PATH = '/tmp/mst'
         os.system('rm -rf /tmp/mst')
@@ -302,6 +311,20 @@ def test_cpld_2201_component(self, mock_check_call):
         mock_check_call.side_effect = subprocess.CalledProcessError(1, None)
         assert not c._install_firmware('')
 
+    @mock.patch('sonic_platform.component.subprocess.check_call')
+    def test_cpld_4280_component(self, mock_check_call):
+        c = ComponentCPLDSN4280(1)
+        assert c._install_firmware('')
+        mock_check_call.side_effect = subprocess.CalledProcessError(1, None)
+        assert not c._install_firmware('')
+
+    @mock.patch('sonic_platform.component.subprocess.check_call')
+    def test_cpld_dpu_component(self, mock_check_call):
+        c = ComponenetFPGADPU(1)
+        assert c._install_firmware('')
+        mock_check_call.side_effect = subprocess.CalledProcessError(1, None)
+        assert not c._install_firmware('')
+
     @mock.patch('sonic_platform.component.MPFAManager.cleanup')
     @mock.patch('sonic_platform.component.MPFAManager.extract')
     def test_mpfa_manager_context(self, mock_extract, mock_cleanup):
@@ -353,6 +376,26 @@ def test_onie_updater_parse_onie_version(self):
         assert onie_minor == '3'
         assert onie_release == '0010'
         assert onie_baudrate == '9600'
+
+        # Verify presence of release candidate (rc) string doesn't throw an exception
+        onie_year, onie_month, onie_major, onie_minor, onie_release, onie_baudrate = \
+            o.parse_onie_version('2023.11-5.3.0012-rc2-9600')
+        assert onie_year == '2023'
+        assert onie_month == '11'
+        assert onie_major == '5'
+        assert onie_minor == '3'
+        assert onie_release == '0012'
+        assert onie_baudrate == '9600'
+
+        onie_year, onie_month, onie_major, onie_minor, onie_release, onie_baudrate = \
+            o.parse_onie_version('2023.11-5.3.0012-rc24-dev-115200')
+        assert onie_year == '2023'
+        assert onie_month == '11'
+        assert onie_major == '5'
+        assert onie_minor == '3'
+        assert onie_release == '0012'
+        assert onie_baudrate == '115200'
+
         with pytest.raises(RuntimeError):
             o.parse_onie_version('invalid', is_base=True)
         with pytest.raises(RuntimeError):
@@ -368,6 +411,10 @@ def test_onie_updater_parse_onie_version(self):
 
         assert o.get_onie_required_version() == o.ONIE_VERSION_REQUIRED
 
+    def test_parse_onie_version_extra_prefix(self):
+        o = ONIEUpdater()
+        
+
     @mock.patch('sonic_platform.component.ONIEUpdater.get_onie_version')
     @mock.patch('sonic_platform.component.device_info.get_platform')
     def test_onie_updater_is_non_onie_firmware_update_supported(self, mock_platform, mock_version):

From 52c00e11e3185354425881ac41a5bb39eca9ad1c Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sat, 20 Jul 2024 19:04:15 +0800
Subject: [PATCH 0836/1115] [submodule] Update submodule sonic-utilities to the
 latest HEAD automatically (#19639)

#### Why I did it
src/sonic-utilities
```
* d1ca905e - (HEAD -> master, origin/master, origin/HEAD) Update DB version to 202411 on master branch. (#3414) (6 hours ago) [ryanzhu706]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-utilities | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-utilities b/src/sonic-utilities
index f2b762138..d1ca905e3 160000
--- a/src/sonic-utilities
+++ b/src/sonic-utilities
@@ -1 +1 @@
-Subproject commit f2b762138c3236807bf1995e2e2130f7b8e5f386
+Subproject commit d1ca905e3b0733170d19abeecad1cfbfd0180698

From 1db8d6d9375c58d14f695ff9dd522a25f8dc64fd Mon Sep 17 00:00:00 2001
From: noaOrMlnx <58519608+noaOrMlnx@users.noreply.github.com>
Date: Sun, 21 Jul 2024 17:32:53 +0300
Subject: [PATCH 0837/1115] [Mellanox] Disable Auto Negotiation by default for
 SN4700 (#19607)

- Why I did it
When CMIS host mgmt is enabled, CMIS active cables' autoneg must be disabled.
Here, it will generate config_db with autoneg:off by default for all ports.

- How I did it

- How to verify it
deploy/sonic-cfggem
---
 .../Mellanox-SN4700-O8C48/hwsku.json          | 168 ++++++++++++------
 .../Mellanox-SN4700-O8V48/hwsku.json          | 168 ++++++++++++------
 2 files changed, 224 insertions(+), 112 deletions(-)

diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/hwsku.json b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/hwsku.json
index d50fae23e..d317f8737 100644
--- a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/hwsku.json
+++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/hwsku.json
@@ -2,227 +2,283 @@
     "interfaces": {
         "Ethernet0": {
             "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
-            "subport": "1"
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet4": {
             "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
-            "subport": "2"
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet8": {
             "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
-            "subport": "1"
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet12": {
             "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
-            "subport": "2"
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet16": {
             "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
-            "subport": "1"
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet20": {
             "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
-            "subport": "2"
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet24": {
             "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
-            "subport": "1"
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet28": {
             "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
-            "subport": "2"
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet32": {
             "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
-            "subport": "1"
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet36": {
             "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
-            "subport": "2"
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet40": {
             "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
-            "subport": "1"
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet44": {
             "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
-            "subport": "2"
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet48": {
             "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
-            "subport": "1"
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet52": {
             "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
-            "subport": "2"
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet56": {
             "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
-            "subport": "1"
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet60": {
             "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
-            "subport": "2"
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet64": {
             "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
-            "subport": "1"
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet68": {
             "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
-            "subport": "2"
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet72": {
             "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
-            "subport": "1"
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet76": {
             "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
-            "subport": "2"
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet80": {
             "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
-            "subport": "1"
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet84": {
             "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
-            "subport": "2"
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet88": {
             "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
-            "subport": "1"
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet92": {
             "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
-            "subport": "2"
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet96": {
             "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
-            "subport": "1"
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet104": {
             "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
-            "subport": "1"
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet112": {
             "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
-            "subport": "1"
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet120": {
             "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
-            "subport": "1"
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet128": {
             "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
-            "subport": "1"
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet136": {
             "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
-            "subport": "1"
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet144": {
             "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
-            "subport": "1"
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet152": {
             "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
-            "subport": "1"
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet160": {
             "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
-            "subport": "1"
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet164": {
             "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
-            "subport": "2"
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet168": {
             "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
-            "subport": "1"
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet172": {
             "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
-            "subport": "2"
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet176": {
             "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
-            "subport": "1"
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet180": {
             "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
-            "subport": "2"
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet184": {
             "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
-            "subport": "1"
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet188": {
             "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
-            "subport": "2"
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet192": {
             "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
-            "subport": "1"
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet196": {
             "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
-            "subport": "2"
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet200": {
             "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
-            "subport": "1"
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet204": {
             "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
-            "subport": "2"
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet208": {
             "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
-            "subport": "1"
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet212": {
             "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
-            "subport": "2"
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet216": {
             "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
-            "subport": "1"
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet220": {
             "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
-            "subport": "2"
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet224": {
             "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
-            "subport": "1"
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet228": {
             "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
-            "subport": "2"
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet232": {
             "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
-            "subport": "1"
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet236": {
             "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
-            "subport": "2"
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet240": {
             "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
-            "subport": "1"
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet244": {
             "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
-            "subport": "2"
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet248": {
             "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
-            "subport": "1"
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet252": {
             "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]",
-            "subport": "2"
+            "subport": "2",
+            "autoneg": "off"
         }
     }
 }
diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/hwsku.json b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/hwsku.json
index 3d51a36be..e3aa3f8d7 100644
--- a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/hwsku.json
+++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/hwsku.json
@@ -2,227 +2,283 @@
     "interfaces": {
         "Ethernet0": {
             "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
-            "subport": "1"
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet4": {
             "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
-            "subport": "2"
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet8": {
             "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
-            "subport": "1"
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet12": {
             "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
-            "subport": "2"
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet16": {
             "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
-            "subport": "1"
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet20": {
             "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
-            "subport": "2"
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet24": {
             "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
-            "subport": "1"
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet28": {
             "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
-            "subport": "2"
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet32": {
             "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
-            "subport": "1"
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet36": {
             "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
-            "subport": "2"
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet40": {
             "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
-            "subport": "1"
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet44": {
             "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
-            "subport": "2"
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet48": {
             "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
-            "subport": "1"
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet52": {
             "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
-            "subport": "2"
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet56": {
             "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
-            "subport": "1"
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet60": {
             "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
-            "subport": "2"
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet64": {
             "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
-            "subport": "1"
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet68": {
             "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
-            "subport": "2"
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet72": {
             "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
-            "subport": "1"
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet76": {
             "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
-            "subport": "2"
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet80": {
             "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
-            "subport": "1"
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet84": {
             "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
-            "subport": "2"
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet88": {
             "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
-            "subport": "1"
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet92": {
             "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
-            "subport": "2"
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet96": {
             "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
-            "subport": "1"
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet104": {
             "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
-            "subport": "1"
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet112": {
             "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
-            "subport": "1"
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet120": {
             "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
-            "subport": "1"
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet128": {
             "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
-            "subport": "1"
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet136": {
             "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
-            "subport": "1"
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet144": {
             "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
-            "subport": "1"
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet152": {
             "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
-            "subport": "1"
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet160": {
             "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
-            "subport": "1"
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet164": {
             "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
-            "subport": "2"
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet168": {
             "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
-            "subport": "1"
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet172": {
             "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
-            "subport": "2"
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet176": {
             "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
-            "subport": "1"
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet180": {
             "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
-            "subport": "2"
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet184": {
             "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
-            "subport": "1"
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet188": {
             "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
-            "subport": "2"
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet192": {
             "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
-            "subport": "1"
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet196": {
             "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
-            "subport": "2"
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet200": {
             "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
-            "subport": "1"
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet204": {
             "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
-            "subport": "2"
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet208": {
             "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
-            "subport": "1"
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet212": {
             "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
-            "subport": "2"
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet216": {
             "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
-            "subport": "1"
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet220": {
             "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
-            "subport": "2"
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet224": {
             "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
-            "subport": "1"
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet228": {
             "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
-            "subport": "2"
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet232": {
             "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
-            "subport": "1"
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet236": {
             "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
-            "subport": "2"
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet240": {
             "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
-            "subport": "1"
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet244": {
             "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
-            "subport": "2"
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet248": {
             "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
-            "subport": "1"
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet252": {
             "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
-            "subport": "2"
+            "subport": "2",
+            "autoneg": "off"
         }
     }
 }

From 0344d4a8ba674d224ade7fc61d30997974697f51 Mon Sep 17 00:00:00 2001
From: Riff <r12f.code@gmail.com>
Date: Sun, 21 Jul 2024 23:23:03 -0700
Subject: [PATCH 0838/1115] [Arista]: Fix TH5 egress pool creation failure with
 BCM YAML file and SAI update on 07/16 (#19640)

Why I did it
The latest TH5 mmu configuration has some issues where egress pool creation fails with the latest BCM SAI updates.

Jul 20 12:04:58.163923 str3-7060x6-64pe-2 ERR syncd#syncd: [none] SAI_API_BUFFER:driverEgressPoolSharedLimitSet:3476 configure egress itm 0 buffer pool 0 with size 82830162, gport 0x 800000b COS 0 current reserved size 21805392 shared size 60996322, requested shared size 61024770 failed with error -1
Jul 20 12:04:58.163923 str3-7060x6-64pe-2 ERR syncd#syncd: [none] SAI_API_BUFFER:ltsw_driverDBLimitSet:3197 set egress buffer pool 0 limit to 82830162 using port 11 queue 0 failed with error -1

Work item tracking
Microsoft ADO (number only): 28775282

How I did it
This PR fixes the issue by updating the egress pool size to match with the one in the ASIC.

How to verify it
Tested on local testbed

Jul 20 19:45:35.767569 str3-7060x6-64pe-2 NOTICE swss#orchagent: :- processQueue: Set buffer queue Ethernet0:0-2 to BUFFER_PROFILE_TABLE:egress_lossy_profile
Jul 20 19:45:35.823139 str3-7060x6-64pe-2 INFO syncd#syncd: [none] SAI_API_BUFFER:ltsw_driverDBLimitSet:3204 Created egress buffer pool 0 with size 82801714 bytes
Jul 20 19:45:35.823139 str3-7060x6-64pe-2 INFO syncd#syncd: [none] SAI_API_BUFFER:ltsw_driverEgressQueueFieldSet:4099 Programming cosq 0 for port 11 control 81 with value 1
Jul 20 19:45:35.823166 str3-7060x6-64pe-2 INFO syncd#syncd: [none]
...
Jul 20 19:45:38.214661 str3-7060x6-64pe-2 INFO syncd#syncd: [none] SAI_API_BUFFER:driverPGAttributeSet:1158 Programming ing cosq 3 for port 70 control 128 with value 3556
Jul 20 19:45:38.216275 str3-7060x6-64pe-2 INFO syncd#rsyslogd: imuxsock[pid: 33, name: /usr/bin/syncd] from str3-7060x6-64pe-2:syncd: begin to drop messages due to rate-limiting
Jul 20 19:45:38.279834 str3-7060x6-64pe-2 NOTICE swss#orchagent: :- processPriorityGroup: Set buffer PG Ethernet106:0 to BUFFER_PROFILE_TABLE:ingress_lossy_profile
---
 .../BALANCED/buffers_defaults_t0.j2                           | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/BALANCED/buffers_defaults_t0.j2 b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/BALANCED/buffers_defaults_t0.j2
index f4b26e0f3..b1418a68e 100644
--- a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/BALANCED/buffers_defaults_t0.j2
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/BALANCED/buffers_defaults_t0.j2
@@ -5,13 +5,13 @@
 {%- macro generate_buffer_pool_and_profiles() %}
     "BUFFER_POOL": {
         "ingress_lossless_pool": {
-            "size": "165660324",
+            "size": "165603428",
             "type": "ingress",
             "mode": "dynamic",
             "xoff": "29520896"
         },
         "egress_lossless_pool": {
-            "size": "165660324",
+            "size": "165603428",
             "type": "egress",
             "mode": "dynamic"
         }

From 64235b54d41b8b926ee5c5775b505dcc192ea733 Mon Sep 17 00:00:00 2001
From: sophiek <skravitz@nvidia.com>
Date: Mon, 22 Jul 2024 15:21:34 +0300
Subject: [PATCH 0839/1115] [Mellanox] Added simx version to Nvidia component
 version listing (#19523)

- Why I did it
Needed to add the SIMX version to the Nvidia component version listing.
Also changed HW-MGMT to be HW_MANAGEMENT

- How I did it
Added simx version to 'component_versions' file that is created during compilation.
---
 platform/mellanox/component-versions/Makefile |  2 +-
 .../create_component_versions.sh              |  5 +-
 platform/mellanox/fw.mk                       |  1 +
 .../get_component_versions.py                 | 63 +++++++++++++------
 .../sonic_platform/device_data.py             |  9 +++
 5 files changed, 58 insertions(+), 22 deletions(-)

diff --git a/platform/mellanox/component-versions/Makefile b/platform/mellanox/component-versions/Makefile
index 6a240bd02..095aad790 100644
--- a/platform/mellanox/component-versions/Makefile
+++ b/platform/mellanox/component-versions/Makefile
@@ -22,5 +22,5 @@ SHELL = /bin/bash
 MAIN_TARGET = component-versions
 
 $(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% :
-	./create_component_versions.sh $(MLNX_SDK_VERSION) $(MLNX_SPC_FW_VERSION) $(MLNX_SAI_VERSION) $(MLNX_HW_MANAGEMENT_VERSION) $(MFT_VERSION) $(MFT_REVISION) $(KVERSION_SHORT)
+	./create_component_versions.sh $(MLNX_SDK_VERSION) $(MLNX_SPC_FW_VERSION) $(MLNX_SAI_VERSION) $(MLNX_HW_MANAGEMENT_VERSION) $(MFT_VERSION) $(MFT_REVISION) $(KVERSION_SHORT) $(SIMX_VERSION)
 	mv temp_versions_file $(DEST)/$(MAIN_TARGET)
diff --git a/platform/mellanox/component-versions/create_component_versions.sh b/platform/mellanox/component-versions/create_component_versions.sh
index 109242de9..b523c0308 100755
--- a/platform/mellanox/component-versions/create_component_versions.sh
+++ b/platform/mellanox/component-versions/create_component_versions.sh
@@ -18,6 +18,7 @@
 echo "SDK $1" > temp_versions_file
 echo $2 | sed -r 's/([0-9]*)\.([0-9]*)\.([0-9]*)/FW \2\.\3/g' >> temp_versions_file
 echo "SAI $3" >> temp_versions_file
-echo "HW-MGMT $4" >> temp_versions_file
+echo "HW_MANAGEMENT $4" >> temp_versions_file
 echo "MFT $5-$6" >> temp_versions_file
-echo "Kernel $7" >> temp_versions_file
+echo "KERNEL $7" >> temp_versions_file
+echo "SIMX $8" >> temp_versions_file
diff --git a/platform/mellanox/fw.mk b/platform/mellanox/fw.mk
index 2b6931d5e..c1f1311d8 100644
--- a/platform/mellanox/fw.mk
+++ b/platform/mellanox/fw.mk
@@ -63,6 +63,7 @@ endif
 MLNX_FILES += $(MLNX_FW_FILES)
 
 export MLNX_SPC_FW_VERSION MLNX_SPC2_FW_VERSION MLNX_SPC3_FW_VERSION MLNX_SPC4_FW_VERSION
+export SIMX_VERSION
 export MLNX_SPC_FW_FILE
 export MLNX_SPC2_FW_FILE
 export MLNX_SPC3_FW_FILE
diff --git a/platform/mellanox/get_component_versions/get_component_versions.py b/platform/mellanox/get_component_versions/get_component_versions.py
index 8e900eb0c..ba75bd8a2 100644
--- a/platform/mellanox/get_component_versions/get_component_versions.py
+++ b/platform/mellanox/get_component_versions/get_component_versions.py
@@ -20,22 +20,28 @@
 import subprocess
 import re
 
-from fwutil.lib import PlatformDataProvider
+try:
+    from fwutil.lib import PlatformDataProvider
+except Exception:
+    PlatformDataProvider = None
+
 from sonic_py_common.general import check_output_pipe
+from sonic_platform.device_data import DeviceDataManager
 from tabulate import tabulate
 
 COMPONENT_VERSIONS_FILE = "/etc/mlnx/component-versions"
 HEADERS = ["COMPONENT", "COMPILATION", "ACTUAL"]
 COMMANDS_FOR_ACTUAL = {
     "MFT": [["dpkg", "-l"], ["grep", "mft "], "mft *([0-9.-]*)"],
-    "HW-MGMT": [["dpkg", "-l"], ["grep", "hw"], ".*1\\.mlnx\\.([0-9.]*)"],
+    "HW_MANAGEMENT": [["dpkg", "-l"], ["grep", "hw"], ".*1\\.mlnx\\.([0-9.]*)"],
     "SDK": [["docker", "exec", "-it", "syncd", "bash", "-c", 'dpkg -l | grep sdk'], ".*1\\.mlnx\\.([0-9.]*)"],
     "SAI": [["docker", "exec", "-it", "syncd", "bash", "-c", 'dpkg -l | grep mlnx-sai'], ".*1\\.mlnx\\.([A-Za-z0-9.]*)"],
     "FW": [["mlxfwmanager", "--query"], "FW * [0-9]{2}\\.([0-9.]*)"],
-    "Kernel": [["uname", "-r"], "([0-9][0-9.-]*)-.*"]
+    "KERNEL": [["uname", "-r"], "([0-9][0-9.-]*)-.*"]
 }
 
 UNAVAILABLE_PLATFORM_VERSIONS = {
+    "ONIE": "N/A",
     "SSD": "N/A",
     "BIOS": "N/A",
     "CPLD": "N/A"
@@ -45,9 +51,9 @@
     "SDK": "N/A",
     "FW": "N/A",
     "SAI": "N/A",
-    "HW-MGMT": "N/A",
+    "HW_MANAGEMENT": "N/A",
     "MFT": "N/A",
-    "Kernel": "N/A"
+    "KERNEL": "N/A"
 }
 
 
@@ -59,15 +65,21 @@ def parse_compiled_components_file():
 
     with open(COMPONENT_VERSIONS_FILE, 'r') as component_versions:
         for line in component_versions.readlines():
-            comp, version = line.split()
-            compiled_versions[comp] = version
+            try:
+                comp, version = line.split()
+                compiled_versions[comp] = version
+            except ValueError:
+                continue 
 
     return compiled_versions
 
 
 def get_platform_component_versions():
-    pdp = PlatformDataProvider()
-    ccm = pdp.chassis_component_map
+    ccm = None
+    
+    if PlatformDataProvider:
+        pdp = PlatformDataProvider()
+        ccm = pdp.chassis_component_map
 
     if not ccm:
         return UNAVAILABLE_PLATFORM_VERSIONS
@@ -91,15 +103,18 @@ def get_platform_component_versions():
 
 def get_current_version(comp):
     version = ""
-    # If there's only one command
-    if len(COMMANDS_FOR_ACTUAL[comp]) == 2:
-        version = subprocess.run(COMMANDS_FOR_ACTUAL[comp][0], shell=False, stdout=subprocess.PIPE, text=True)
-        version = str(version.stdout)
-    #If there are two commands and we need a pipe
-    elif len(COMMANDS_FOR_ACTUAL[comp]) == 3:
-        version = check_output_pipe(COMMANDS_FOR_ACTUAL[comp][0], COMMANDS_FOR_ACTUAL[comp][1])
-    parsed_version = re.search(COMMANDS_FOR_ACTUAL[comp][-1], version)
-    return parsed_version.group(1) if parsed_version else "N/A"
+    try:
+        # If there's only one command
+        if len(COMMANDS_FOR_ACTUAL[comp]) == 2:
+            version = subprocess.run(COMMANDS_FOR_ACTUAL[comp][0], shell=False, stdout=subprocess.PIPE, text=True)
+            version = str(version.stdout)
+        #If there are two commands and we need a pipe
+        elif len(COMMANDS_FOR_ACTUAL[comp]) == 3:
+            version = check_output_pipe(COMMANDS_FOR_ACTUAL[comp][0], COMMANDS_FOR_ACTUAL[comp][1])
+        parsed_version = re.search(COMMANDS_FOR_ACTUAL[comp][-1], version)
+        return parsed_version.group(1) if parsed_version else "N/A"
+    except Exception:
+        return "N/A"
 
 
 def format_output_table(table):
@@ -113,13 +128,23 @@ def main():
         return
 
     compiled_versions = parse_compiled_components_file()
-    platform_versions = get_platform_component_versions()
+    simx_compiled_ver = compiled_versions.pop("SIMX")
 
+    # Add compiled versions to table
     output_table = []
     for comp in compiled_versions.keys():
         actual = get_current_version(comp)
         output_table.append([comp, compiled_versions[comp], actual])
 
+    # Handle if SIMX
+    if DeviceDataManager.is_simx_platform():
+        simx_actual_ver = DeviceDataManager.get_simx_version()
+        output_table.append(["SIMX", simx_compiled_ver, simx_actual_ver])
+        platform_versions = UNAVAILABLE_PLATFORM_VERSIONS
+    else:
+        platform_versions = get_platform_component_versions()
+
+    # Add actual versions to table
     for comp in platform_versions.keys():
         output_table.append([comp, "-", platform_versions[comp]])
 
diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/device_data.py b/platform/mellanox/mlnx-platform-api/sonic_platform/device_data.py
index 676e2b498..673e6258a 100644
--- a/platform/mellanox/mlnx-platform-api/sonic_platform/device_data.py
+++ b/platform/mellanox/mlnx-platform-api/sonic_platform/device_data.py
@@ -18,8 +18,10 @@
 import glob
 import os
 import time
+import re
 
 from . import utils
+from sonic_py_common.general import check_output_pipe
 
 DEFAULT_WD_PERIOD = 65535
 
@@ -173,6 +175,13 @@ def is_simx_platform(cls):
         platform_name = cls.get_platform_name()
         return platform_name and 'simx' in platform_name
 
+    @classmethod
+    @utils.read_only_cache()
+    def get_simx_version(cls):
+        version = check_output_pipe(["lspci", "-vv"], ["grep", "SimX"])
+        parsed_version = re.search("([0-9]+\\.[0-9]+-[0-9]+)", version)
+        return parsed_version.group(1) if parsed_version else "N/A"
+
     @classmethod
     @utils.read_only_cache()
     def get_fan_drawer_count(cls):

From 36f95b796b9d22bf51cda4847b3683913c91fafd Mon Sep 17 00:00:00 2001
From: Mai Bui <maibui@microsoft.com>
Date: Mon, 22 Jul 2024 12:28:40 -0400
Subject: [PATCH 0840/1115] [docker-database] limit privileged flag for
 database container (#19248)

#### Why I did it
HLD implementation: Container Hardening (https://github.com/sonic-net/SONiC/pull/1364)
##### Work item tracking
- Microsoft ADO **(number only)**: 14807420
#### How I did it
Reduce linux capabilities in privileged flag

#### How to verify it
Check container's settings: Privileged is false and container only has default Linux caps, does not have extended caps.
```
admin@vlab-08:~$ docker inspect database0 | jq '.[0] | {CapAdd: .HostConfig.CapAdd, Privileged: .HostConfig.Privileged, AppArmor: .AppArmorProfile, Security
Opt: .HostConfig.SecurityOpt, Devices: .HostConfig.Devices, MaskedPath: .HostConfig.MaskedPaths, ReadonlyPaths: .HostConfig.ReadonlyPaths}'
{
  "CapAdd": null,
  "Privileged": false,
  "AppArmor": "unconfined",
  "SecurityOpt": [
    "apparmor=unconfined"
  ],
  "Devices": [],
  "MaskedPath": [],
  "ReadonlyPaths": []
}
```
---
 rules/docker-database.mk | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/rules/docker-database.mk b/rules/docker-database.mk
index c38f574af..3b16960f6 100644
--- a/rules/docker-database.mk
+++ b/rules/docker-database.mk
@@ -28,7 +28,7 @@ SONIC_BOOKWORM_DBG_DOCKERS += $(DOCKER_DATABASE_DBG)
 SONIC_INSTALL_DOCKER_DBG_IMAGES += $(DOCKER_DATABASE_DBG)
 
 $(DOCKER_DATABASE)_CONTAINER_NAME = database
-$(DOCKER_DATABASE)_RUN_OPT += --privileged -t
+$(DOCKER_DATABASE)_RUN_OPT += -t --security-opt apparmor=unconfined --security-opt="systempaths=unconfined"
 $(DOCKER_DATABASE)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro
 $(DOCKER_DATABASE)_RUN_OPT += -v /etc/timezone:/etc/timezone:ro
 

From 1efb520f9f34b573dd7ac99aeacf762c485258b9 Mon Sep 17 00:00:00 2001
From: Longxiang Lyu <35479537+lolyu@users.noreply.github.com>
Date: Tue, 23 Jul 2024 11:33:24 +0800
Subject: [PATCH 0841/1115] [ctrmgrd] Fix the container restart during config
 reload (#19528)

Signed-off-by: Longxiang Lyu <lolv@microsoft.com>
---
 src/sonic-ctrmgrd/ctrmgr/ctrmgrd.py     |  4 +++-
 src/sonic-ctrmgrd/tests/ctrmgrd_test.py | 32 +++++++++++++++++++++++++
 2 files changed, 35 insertions(+), 1 deletion(-)

diff --git a/src/sonic-ctrmgrd/ctrmgr/ctrmgrd.py b/src/sonic-ctrmgrd/ctrmgr/ctrmgrd.py
index 7e85c22f6..645724214 100755
--- a/src/sonic-ctrmgrd/ctrmgr/ctrmgrd.py
+++ b/src/sonic-ctrmgrd/ctrmgr/ctrmgrd.py
@@ -489,7 +489,9 @@ def handle_update(self, feat, set_owner, ct_owner, remote_state):
         service_restart = False
 
         if set_owner == "local":
-            if ct_owner != "local":
+            # NOTE: no need to restart if the current owner is none,
+            # as none implies the container is not running.
+            if ct_owner != "local" and ct_owner != "none":
                 service_restart = True
         else:
             if (ct_owner != "none") and (remote_state == "pending"):
diff --git a/src/sonic-ctrmgrd/tests/ctrmgrd_test.py b/src/sonic-ctrmgrd/tests/ctrmgrd_test.py
index 76651309c..df7e2729d 100755
--- a/src/sonic-ctrmgrd/tests/ctrmgrd_test.py
+++ b/src/sonic-ctrmgrd/tests/ctrmgrd_test.py
@@ -355,6 +355,38 @@
                 }
             }
         }
+    },
+    5: {
+        common_test.DESCR: "No restart for current_owner == none in config reload",
+        common_test.ARGS: "ctrmgrd",
+        common_test.PRE: {
+            common_test.CONFIG_DB_NO: {
+                common_test.FEATURE_TABLE: {
+                    "swss": {
+                        "set_owner": "local",
+                        "state": "enabled",
+                        "auto_restart": "enabled"
+                    }
+                }
+            }
+        },
+        common_test.UPD: {
+            common_test.STATE_DB_NO: {
+                common_test.FEATURE_TABLE: {
+                    "swss": {
+                        "system_state": "down",
+                        "remote_state": "none",
+                        "current_owner": "none",
+                        "container_id": "",
+                        "state": "enabled"
+                    }
+                }
+            }
+        },
+        common_test.POST: {
+            common_test.STATE_DB_NO: {
+            }
+        }
     }
 }
 

From 6c453322d89ba4a7e68abf9b19b27d34b3bd78f5 Mon Sep 17 00:00:00 2001
From: noaOrMlnx <58519608+noaOrMlnx@users.noreply.github.com>
Date: Tue, 23 Jul 2024 09:29:24 +0300
Subject: [PATCH 0842/1115] [Mellanox] Enable CMIS host mgmt for SN5600
 Mellanox-SN5600-V256 SKU (#19641)

- Why I did it
To enable CMIS host mgmt feature by default on Mellanox-SN5600-V256 SKU

- How I did it
Added needed configuration
---
 .../Mellanox-SN5600-V256/hwsku.json           | 1024 ++++++++++++-----
 .../Mellanox-SN5600-V256/media_settings.json  |  234 ++++
 .../optics_si_settings.json                   |  142 +++
 .../pmon_daemon_control.json                  |    6 +
 .../Mellanox-SN5600-V256/sai.profile          |    1 +
 5 files changed, 1151 insertions(+), 256 deletions(-)
 create mode 100644 device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/media_settings.json
 create mode 100644 device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/optics_si_settings.json
 create mode 100644 device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/pmon_daemon_control.json

diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/hwsku.json b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/hwsku.json
index 04211490c..be1f3c62d 100644
--- a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/hwsku.json
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/hwsku.json
@@ -1,772 +1,1284 @@
 {
     "interfaces": {
         "Ethernet0": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet2": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet4": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "3",
+            "autoneg": "off"
         },
         "Ethernet6": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "4",
+            "autoneg": "off"
         },
         "Ethernet8": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet10": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet12": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "3",
+            "autoneg": "off"
         },
         "Ethernet14": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "4",
+            "autoneg": "off"
         },
         "Ethernet16": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet18": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet20": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "3",
+            "autoneg": "off"
         },
         "Ethernet22": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "4",
+            "autoneg": "off"
         },
         "Ethernet24": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet26": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet28": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "3",
+            "autoneg": "off"
         },
         "Ethernet30": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "4",
+            "autoneg": "off"
         },
         "Ethernet32": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet34": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet36": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "3",
+            "autoneg": "off"
         },
         "Ethernet38": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "4",
+            "autoneg": "off"
         },
         "Ethernet40": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet42": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet44": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "3",
+            "autoneg": "off"
         },
         "Ethernet46": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "4",
+            "autoneg": "off"
         },
         "Ethernet48": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet50": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet52": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "3",
+            "autoneg": "off"
         },
         "Ethernet54": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "4",
+            "autoneg": "off"
         },
         "Ethernet56": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet58": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet60": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "3",
+            "autoneg": "off"
         },
         "Ethernet62": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "4",
+            "autoneg": "off"
         },
         "Ethernet64": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet66": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet68": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "3",
+            "autoneg": "off"
         },
         "Ethernet70": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "4",
+            "autoneg": "off"
         },
         "Ethernet72": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet74": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet76": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "3",
+            "autoneg": "off"
         },
         "Ethernet78": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "4",
+            "autoneg": "off"
         },
         "Ethernet80": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet82": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet84": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "3",
+            "autoneg": "off"
         },
         "Ethernet86": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "4",
+            "autoneg": "off"
         },
         "Ethernet88": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet90": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet92": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "3",
+            "autoneg": "off"
         },
         "Ethernet94": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "4",
+            "autoneg": "off"
         },
         "Ethernet96": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet98": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet100": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "3",
+            "autoneg": "off"
         },
         "Ethernet102": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "4",
+            "autoneg": "off"
         },
         "Ethernet104": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet106": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet108": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "3",
+            "autoneg": "off"
         },
         "Ethernet110": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "4",
+            "autoneg": "off"
         },
         "Ethernet112": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet114": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet116": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "3",
+            "autoneg": "off"
         },
         "Ethernet118": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "4",
+            "autoneg": "off"
         },
         "Ethernet120": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet122": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet124": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "3",
+            "autoneg": "off"
         },
         "Ethernet126": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "4",
+            "autoneg": "off"
         },
         "Ethernet128": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet130": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet132": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "3",
+            "autoneg": "off"
         },
         "Ethernet134": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "4",
+            "autoneg": "off"
         },
         "Ethernet136": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet138": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet140": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "3",
+            "autoneg": "off"
         },
         "Ethernet142": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "4",
+            "autoneg": "off"
         },
         "Ethernet144": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet146": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet148": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "3",
+            "autoneg": "off"
         },
         "Ethernet150": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "4",
+            "autoneg": "off"
         },
         "Ethernet152": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet154": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet156": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "3",
+            "autoneg": "off"
         },
         "Ethernet158": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "4",
+            "autoneg": "off"
         },
         "Ethernet160": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet162": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet164": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "3",
+            "autoneg": "off"
         },
         "Ethernet166": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "4",
+            "autoneg": "off"
         },
         "Ethernet168": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet170": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet172": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "3",
+            "autoneg": "off"
         },
         "Ethernet174": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "4",
+            "autoneg": "off"
         },
         "Ethernet176": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet178": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet180": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "3",
+            "autoneg": "off"
         },
         "Ethernet182": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "4",
+            "autoneg": "off"
         },
         "Ethernet184": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet186": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet188": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "3",
+            "autoneg": "off"
         },
         "Ethernet190": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "4",
+            "autoneg": "off"
         },
         "Ethernet192": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet194": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet196": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "3",
+            "autoneg": "off"
         },
         "Ethernet198": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "4",
+            "autoneg": "off"
         },
         "Ethernet200": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet202": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet204": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "3",
+            "autoneg": "off"
         },
         "Ethernet206": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "4",
+            "autoneg": "off"
         },
         "Ethernet208": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet210": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet212": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "3",
+            "autoneg": "off"
         },
         "Ethernet214": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "4",
+            "autoneg": "off"
         },
         "Ethernet216": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet218": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet220": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "3",
+            "autoneg": "off"
         },
         "Ethernet222": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "4",
+            "autoneg": "off"
         },
         "Ethernet224": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet226": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet228": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "3",
+            "autoneg": "off"
         },
         "Ethernet230": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "4",
+            "autoneg": "off"
         },
         "Ethernet232": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet234": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet236": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "3",
+            "autoneg": "off"
         },
         "Ethernet238": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "4",
+            "autoneg": "off"
         },
         "Ethernet240": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet242": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet244": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "3",
+            "autoneg": "off"
         },
         "Ethernet246": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "4",
+            "autoneg": "off"
         },
         "Ethernet248": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet250": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet252": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "3",
+            "autoneg": "off"
         },
         "Ethernet254": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "4",
+            "autoneg": "off"
         },
         "Ethernet256": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet258": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet260": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "3",
+            "autoneg": "off"
         },
         "Ethernet262": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "4",
+            "autoneg": "off"
         },
         "Ethernet264": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet266": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet268": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "3",
+            "autoneg": "off"
         },
         "Ethernet270": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "4",
+            "autoneg": "off"
         },
         "Ethernet272": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet274": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet276": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "3",
+            "autoneg": "off"
         },
         "Ethernet278": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "4",
+            "autoneg": "off"
         },
         "Ethernet280": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet282": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet284": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "3",
+            "autoneg": "off"
         },
         "Ethernet286": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "4",
+            "autoneg": "off"
         },
         "Ethernet288": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet290": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet292": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "3",
+            "autoneg": "off"
         },
         "Ethernet294": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "4",
+            "autoneg": "off"
         },
         "Ethernet296": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet298": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet300": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "3",
+            "autoneg": "off"
         },
         "Ethernet302": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "4",
+            "autoneg": "off"
         },
         "Ethernet304": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet306": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet308": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "3",
+            "autoneg": "off"
         },
         "Ethernet310": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "4",
+            "autoneg": "off"
         },
         "Ethernet312": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet314": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet316": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "3",
+            "autoneg": "off"
         },
         "Ethernet318": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "4",
+            "autoneg": "off"
         },
         "Ethernet320": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet322": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet324": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "3",
+            "autoneg": "off"
         },
         "Ethernet326": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "4",
+            "autoneg": "off"
         },
         "Ethernet328": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet330": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet332": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "3",
+            "autoneg": "off"
         },
         "Ethernet334": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "4",
+            "autoneg": "off"
         },
         "Ethernet336": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet338": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet340": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "3",
+            "autoneg": "off"
         },
         "Ethernet342": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "4",
+            "autoneg": "off"
         },
         "Ethernet344": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet346": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet348": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "3",
+            "autoneg": "off"
         },
         "Ethernet350": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "4",
+            "autoneg": "off"
         },
         "Ethernet352": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet354": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet356": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "3",
+            "autoneg": "off"
         },
         "Ethernet358": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "4",
+            "autoneg": "off"
         },
         "Ethernet360": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet362": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet364": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "3",
+            "autoneg": "off"
         },
         "Ethernet366": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "4",
+            "autoneg": "off"
         },
         "Ethernet368": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet370": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet372": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "3",
+            "autoneg": "off"
         },
         "Ethernet374": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "4",
+            "autoneg": "off"
         },
         "Ethernet376": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet378": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet380": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "3",
+            "autoneg": "off"
         },
         "Ethernet382": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "4",
+            "autoneg": "off"
         },
         "Ethernet384": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet386": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet388": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "3",
+            "autoneg": "off"
         },
         "Ethernet390": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "4",
+            "autoneg": "off"
         },
         "Ethernet392": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet394": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet396": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "3",
+            "autoneg": "off"
         },
         "Ethernet398": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "4",
+            "autoneg": "off"
         },
         "Ethernet400": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet402": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet404": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "3",
+            "autoneg": "off"
         },
         "Ethernet406": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "4",
+            "autoneg": "off"
         },
         "Ethernet408": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet410": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet412": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "3",
+            "autoneg": "off"
         },
         "Ethernet414": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "4",
+            "autoneg": "off"
         },
         "Ethernet416": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet418": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet420": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "3",
+            "autoneg": "off"
         },
         "Ethernet422": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "4",
+            "autoneg": "off"
         },
         "Ethernet424": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet426": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet428": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "3",
+            "autoneg": "off"
         },
         "Ethernet430": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "4",
+            "autoneg": "off"
         },
         "Ethernet432": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet434": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet436": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "3",
+            "autoneg": "off"
         },
         "Ethernet438": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "4",
+            "autoneg": "off"
         },
         "Ethernet440": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet442": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet444": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "3",
+            "autoneg": "off"
         },
         "Ethernet446": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "4",
+            "autoneg": "off"
         },
         "Ethernet448": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet450": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet452": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "3",
+            "autoneg": "off"
         },
         "Ethernet454": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "4",
+            "autoneg": "off"
         },
         "Ethernet456": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet458": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet460": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "3",
+            "autoneg": "off"
         },
         "Ethernet462": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "4",
+            "autoneg": "off"
         },
         "Ethernet464": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet466": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet468": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "3",
+            "autoneg": "off"
         },
         "Ethernet470": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "4",
+            "autoneg": "off"
         },
         "Ethernet472": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet474": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet476": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "3",
+            "autoneg": "off"
         },
         "Ethernet478": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "4",
+            "autoneg": "off"
         },
         "Ethernet480": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet482": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet484": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "3",
+            "autoneg": "off"
         },
         "Ethernet486": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "4",
+            "autoneg": "off"
         },
         "Ethernet488": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet490": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet492": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "3",
+            "autoneg": "off"
         },
         "Ethernet494": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "4",
+            "autoneg": "off"
         },
         "Ethernet496": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet498": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet500": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "3",
+            "autoneg": "off"
         },
         "Ethernet502": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "4",
+            "autoneg": "off"
         },
         "Ethernet504": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "1",
+            "autoneg": "off"
         },
         "Ethernet506": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "2",
+            "autoneg": "off"
         },
         "Ethernet508": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "3",
+            "autoneg": "off"
         },
         "Ethernet510": {
-            "default_brkout_mode": "4x200G[100G,50G,25G,10G]"
+            "default_brkout_mode": "4x200G[100G,50G,25G,10G]",
+            "subport": "4",
+            "autoneg": "off"
         },
         "Ethernet512": {
             "default_brkout_mode": "1x25G[10G]"
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/media_settings.json b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/media_settings.json
new file mode 100644
index 000000000..d5884a727
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/media_settings.json
@@ -0,0 +1,234 @@
+{
+    "GLOBAL_MEDIA_SETTINGS": {
+        "1-64": {
+            "OSFP-8X-sm_media_interface": {
+                "speed:400GAUI-4-L": {
+                    "pre3": {
+                        "lane0": "0x00000000",
+                        "lane1": "0x00000000",
+                        "lane2": "0x00000000",
+                        "lane3": "0x00000000",
+                        "lane4": "0x00000000",
+                        "lane5": "0x00000000",
+                        "lane6": "0x00000000",
+                        "lane7": "0x00000000"
+                    },
+                    "pre2": {
+                        "lane0": "0x00000005",
+                        "lane1": "0x00000005",
+                        "lane2": "0x00000005",
+                        "lane3": "0x00000005",
+                        "lane4": "0x00000005",
+                        "lane5": "0x00000005",
+                        "lane6": "0x00000005",
+                        "lane7": "0x00000005"
+                    },
+                    "pre1": {
+                        "lane0": "0xfffffff1",
+                        "lane1": "0xfffffff1",
+                        "lane2": "0xfffffff1",
+                        "lane3": "0xfffffff1",
+                        "lane4": "0xfffffff1",
+                        "lane5": "0xfffffff1",
+                        "lane6": "0xfffffff1",
+                        "lane7": "0xfffffff1"
+                    },
+                    "main": {
+                        "lane0": "0x0000002b",
+                        "lane1": "0x0000002b",
+                        "lane2": "0x0000002b",
+                        "lane3": "0x0000002b",
+                        "lane4": "0x0000002b",
+                        "lane5": "0x0000002b",
+                        "lane6": "0x0000002b",
+                        "lane7": "0x0000002b"
+                    },
+                    "post1": {
+                        "lane0": "0x00000000",
+                        "lane1": "0x00000000",
+                        "lane2": "0x00000000",
+                        "lane3": "0x00000000",
+                        "lane4": "0x00000000",
+                        "lane5": "0x00000000",
+                        "lane6": "0x00000000",
+                        "lane7": "0x00000000"
+                    },
+                    "idriver": {
+                        "lane0": "0x00000032",
+                        "lane1": "0x00000032",
+                        "lane2": "0x00000032",
+                        "lane3": "0x00000032",
+                        "lane4": "0x00000032",
+                        "lane5": "0x00000032",
+                        "lane6": "0x00000032",
+                        "lane7": "0x00000032"
+                    }
+                },
+                "speed:400GAUI-4-S": {
+                    "pre3": {
+                        "lane0": "0x00000000",
+                        "lane1": "0x00000000",
+                        "lane2": "0x00000000",
+                        "lane3": "0x00000000",
+                        "lane4": "0x00000000",
+                        "lane5": "0x00000000",
+                        "lane6": "0x00000000",
+                        "lane7": "0x00000000"
+                    },
+                    "pre2": {
+                        "lane0": "0x00000005",
+                        "lane1": "0x00000005",
+                        "lane2": "0x00000005",
+                        "lane3": "0x00000005",
+                        "lane4": "0x00000005",
+                        "lane5": "0x00000005",
+                        "lane6": "0x00000005",
+                        "lane7": "0x00000005"
+                    },
+                    "pre1": {
+                        "lane0": "0xfffffff1",
+                        "lane1": "0xfffffff1",
+                        "lane2": "0xfffffff1",
+                        "lane3": "0xfffffff1",
+                        "lane4": "0xfffffff1",
+                        "lane5": "0xfffffff1",
+                        "lane6": "0xfffffff1",
+                        "lane7": "0xfffffff1"
+                    },
+                    "main": {
+                        "lane0": "0x0000002b",
+                        "lane1": "0x0000002b",
+                        "lane2": "0x0000002b",
+                        "lane3": "0x0000002b",
+                        "lane4": "0x0000002b",
+                        "lane5": "0x0000002b",
+                        "lane6": "0x0000002b",
+                        "lane7": "0x0000002b"
+                    },
+                    "post1": {
+                        "lane0": "0x00000000",
+                        "lane1": "0x00000000",
+                        "lane2": "0x00000000",
+                        "lane3": "0x00000000",
+                        "lane4": "0x00000000",
+                        "lane5": "0x00000000",
+                        "lane6": "0x00000000",
+                        "lane7": "0x00000000"
+                    },
+                    "idriver": {
+                        "lane0": "0x00000032",
+                        "lane1": "0x00000032",
+                        "lane2": "0x00000032",
+                        "lane3": "0x00000032",
+                        "lane4": "0x00000032",
+                        "lane5": "0x00000032",
+                        "lane6": "0x00000032",
+                        "lane7": "0x00000032"
+                    }
+                },
+                "speed:800G": {
+                    "pre3": {
+                        "lane0": "0x00000000",
+                        "lane1": "0x00000000",
+                        "lane2": "0x00000000",
+                        "lane3": "0x00000000",
+                        "lane4": "0x00000000",
+                        "lane5": "0x00000000",
+                        "lane6": "0x00000000",
+                        "lane7": "0x00000000"
+                    },
+                    "pre2": {
+                        "lane0": "0x00000005",
+                        "lane1": "0x00000005",
+                        "lane2": "0x00000005",
+                        "lane3": "0x00000005",
+                        "lane4": "0x00000005",
+                        "lane5": "0x00000005",
+                        "lane6": "0x00000005",
+                        "lane7": "0x00000005"
+                    },
+                    "pre1": {
+                        "lane0": "0xfffffff1",
+                        "lane1": "0xfffffff1",
+                        "lane2": "0xfffffff1",
+                        "lane3": "0xfffffff1",
+                        "lane4": "0xfffffff1",
+                        "lane5": "0xfffffff1",
+                        "lane6": "0xfffffff1",
+                        "lane7": "0xfffffff1"
+                    },
+                    "main": {
+                        "lane0": "0x0000002b",
+                        "lane1": "0x0000002b",
+                        "lane2": "0x0000002b",
+                        "lane3": "0x0000002b",
+                        "lane4": "0x0000002b",
+                        "lane5": "0x0000002b",
+                        "lane6": "0x0000002b",
+                        "lane7": "0x0000002b"
+                    },
+                    "post1": {
+                        "lane0": "0x00000000",
+                        "lane1": "0x00000000",
+                        "lane2": "0x00000000",
+                        "lane3": "0x00000000",
+                        "lane4": "0x00000000",
+                        "lane5": "0x00000000",
+                        "lane6": "0x00000000",
+                        "lane7": "0x00000000"
+                    },
+                    "idriver": {
+                        "lane0": "0x00000032",
+                        "lane1": "0x00000032",
+                        "lane2": "0x00000032",
+                        "lane3": "0x00000032",
+                        "lane4": "0x00000032",
+                        "lane5": "0x00000032",
+                        "lane6": "0x00000032",
+                        "lane7": "0x00000032"
+                    }
+                }
+            },
+            "OSFP-8X-nm_850_media_interface": {
+                "speed:200GAUI-4": {
+                    "post1": {
+                        "lane0": "0x00000000",
+                        "lane1": "0x00000000",
+                        "lane2": "0x00000000",
+                        "lane3": "0x00000000"
+                    },
+                    "idriver": {
+                        "lane0": "0x0000003f",
+                        "lane1": "0x0000003f",
+                        "lane2": "0x0000003f",
+                        "lane3": "0x0000003f"
+                    },
+                    "main": {
+                        "lane0": "0x0000003f",
+                        "lane1": "0x0000003f",
+                        "lane2": "0x0000003f",
+                        "lane3": "0x0000003f"
+                    },
+                    "pre1": {
+                        "lane0": "0x00000000",
+                        "lane1": "0x00000000",
+                        "lane2": "0x00000000",
+                        "lane3": "0x00000000"
+                    },
+                    "pre3": {
+                        "lane0": "0x00000000",
+                        "lane1": "0x00000000",
+                        "lane2": "0x00000000",
+                        "lane3": "0x00000000"
+                    },
+                    "pre2": {
+                        "lane0": "0x00000000",
+                        "lane1": "0x00000000",
+                        "lane2": "0x00000000",
+                        "lane3": "0x00000000"
+                    }
+                }
+            }
+        }
+    }
+}
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/optics_si_settings.json b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/optics_si_settings.json
new file mode 100644
index 000000000..80d06ac74
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/optics_si_settings.json
@@ -0,0 +1,142 @@
+{
+    "GLOBAL_MEDIA_SETTINGS": {
+        "1-64": {
+            "100G_SPEED": {
+                "Default": {
+                    "OutputAmplitudeTargetRx": {
+                        "OutputAmplitudeTargetRx1": 1,
+                        "OutputAmplitudeTargetRx2": 1,
+                        "OutputAmplitudeTargetRx3": 1,
+                        "OutputAmplitudeTargetRx4": 1,
+                        "OutputAmplitudeTargetRx5": 1,
+                        "OutputAmplitudeTargetRx6": 1,
+                        "OutputAmplitudeTargetRx7": 1,
+                        "OutputAmplitudeTargetRx8": 1
+                    },
+                    "OutputEqPreCursorTargetRx": {
+                        "OutputEqPreCursorTargetRx1": 0,
+                        "OutputEqPreCursorTargetRx2": 0,
+                        "OutputEqPreCursorTargetRx3": 0,
+                        "OutputEqPreCursorTargetRx4": 0,
+                        "OutputEqPreCursorTargetRx5": 0,
+                        "OutputEqPreCursorTargetRx6": 0,
+                        "OutputEqPreCursorTargetRx7": 0,
+                        "OutputEqPreCursorTargetRx8": 0
+                    },
+                    "OutputEqPostCursorTargetRx": {
+                        "OutputEqPostCursorTargetRx1": 0,
+                        "OutputEqPostCursorTargetRx2": 0,
+                        "OutputEqPostCursorTargetRx3": 0,
+                        "OutputEqPostCursorTargetRx4": 0,
+                        "OutputEqPostCursorTargetRx5": 0,
+                        "OutputEqPostCursorTargetRx6": 0,
+                        "OutputEqPostCursorTargetRx7": 0,
+                        "OutputEqPostCursorTargetRx8": 0
+                    }
+                }
+            },
+            "50G_SPEED": {
+                "Default": {
+                    "OutputAmplitudeTargetRx": {
+                        "OutputAmplitudeTargetRx1": 1,
+                        "OutputAmplitudeTargetRx2": 1,
+                        "OutputAmplitudeTargetRx3": 1,
+                        "OutputAmplitudeTargetRx4": 1,
+                        "OutputAmplitudeTargetRx5": 1,
+                        "OutputAmplitudeTargetRx6": 1,
+                        "OutputAmplitudeTargetRx7": 1,
+                        "OutputAmplitudeTargetRx8": 1
+                    },
+                    "OutputEqPreCursorTargetRx": {
+                        "OutputEqPreCursorTargetRx1": 0,
+                        "OutputEqPreCursorTargetRx2": 0,
+                        "OutputEqPreCursorTargetRx3": 0,
+                        "OutputEqPreCursorTargetRx4": 0,
+                        "OutputEqPreCursorTargetRx5": 0,
+                        "OutputEqPreCursorTargetRx6": 0,
+                        "OutputEqPreCursorTargetRx7": 0,
+                        "OutputEqPreCursorTargetRx8": 0
+                    },
+                    "OutputEqPostCursorTargetRx": {
+                        "OutputEqPostCursorTargetRx1": 0,
+                        "OutputEqPostCursorTargetRx2": 0,
+                        "OutputEqPostCursorTargetRx3": 0,
+                        "OutputEqPostCursorTargetRx4": 0,
+                        "OutputEqPostCursorTargetRx5": 0,
+                        "OutputEqPostCursorTargetRx6": 0,
+                        "OutputEqPostCursorTargetRx7": 0,
+                        "OutputEqPostCursorTargetRx8": 0
+                    }
+                }
+            },
+            "25G_SPEED": {
+                "Default": {
+                    "OutputAmplitudeTargetRx": {
+                        "OutputAmplitudeTargetRx1": 0,
+                        "OutputAmplitudeTargetRx2": 0,
+                        "OutputAmplitudeTargetRx3": 0,
+                        "OutputAmplitudeTargetRx4": 0,
+                        "OutputAmplitudeTargetRx5": 0,
+                        "OutputAmplitudeTargetRx6": 0,
+                        "OutputAmplitudeTargetRx7": 0,
+                        "OutputAmplitudeTargetRx8": 0
+                    },
+                    "OutputEqPreCursorTargetRx": {
+                        "OutputEqPreCursorTargetRx1": 0,
+                        "OutputEqPreCursorTargetRx2": 0,
+                        "OutputEqPreCursorTargetRx3": 0,
+                        "OutputEqPreCursorTargetRx4": 0,
+                        "OutputEqPreCursorTargetRx5": 0,
+                        "OutputEqPreCursorTargetRx6": 0,
+                        "OutputEqPreCursorTargetRx7": 0,
+                        "OutputEqPreCursorTargetRx8": 0
+                    },
+                    "OutputEqPostCursorTargetRx": {
+                        "OutputEqPostCursorTargetRx1": 0,
+                        "OutputEqPostCursorTargetRx2": 0,
+                        "OutputEqPostCursorTargetRx3": 0,
+                        "OutputEqPostCursorTargetRx4": 0,
+                        "OutputEqPostCursorTargetRx5": 0,
+                        "OutputEqPostCursorTargetRx6": 0,
+                        "OutputEqPostCursorTargetRx7": 0,
+                        "OutputEqPostCursorTargetRx8": 0
+                    }
+                }
+            },
+            "10G_SPEED": {
+                "Default": {
+                    "OutputAmplitudeTargetRx": {
+                        "OutputAmplitudeTargetRx1": 0,
+                        "OutputAmplitudeTargetRx2": 0,
+                        "OutputAmplitudeTargetRx3": 0,
+                        "OutputAmplitudeTargetRx4": 0,
+                        "OutputAmplitudeTargetRx5": 0,
+                        "OutputAmplitudeTargetRx6": 0,
+                        "OutputAmplitudeTargetRx7": 0,
+                        "OutputAmplitudeTargetRx8": 0
+                    },
+                    "OutputEqPreCursorTargetRx": {
+                        "OutputEqPreCursorTargetRx1": 0,
+                        "OutputEqPreCursorTargetRx2": 0,
+                        "OutputEqPreCursorTargetRx3": 0,
+                        "OutputEqPreCursorTargetRx4": 0,
+                        "OutputEqPreCursorTargetRx5": 0,
+                        "OutputEqPreCursorTargetRx6": 0,
+                        "OutputEqPreCursorTargetRx7": 0,
+                        "OutputEqPreCursorTargetRx8": 0
+                    },
+                    "OutputEqPostCursorTargetRx": {
+                        "OutputEqPostCursorTargetRx1": 0,
+                        "OutputEqPostCursorTargetRx2": 0,
+                        "OutputEqPostCursorTargetRx3": 0,
+                        "OutputEqPostCursorTargetRx4": 0,
+                        "OutputEqPostCursorTargetRx5": 0,
+                        "OutputEqPostCursorTargetRx6": 0,
+                        "OutputEqPostCursorTargetRx7": 0,
+                        "OutputEqPostCursorTargetRx8": 0
+                    }
+                }
+            }
+        }
+    }
+}
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/pmon_daemon_control.json b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/pmon_daemon_control.json
new file mode 100644
index 000000000..208fa63ca
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/pmon_daemon_control.json
@@ -0,0 +1,6 @@
+{
+    "skip_ledd": true,
+    "skip_fancontrol": true,
+    "skip_xcvrd_cmis_mgr": false
+}
+
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/sai.profile b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/sai.profile
index 0d93ea989..8677e1faf 100644
--- a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/sai.profile
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/sai.profile
@@ -1 +1,2 @@
 SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_5600_256x200g.xml
+SAI_INDEPENDENT_MODULE_MODE=1

From 38f2b8e36abe108e19b779e94cd36ba48077046c Mon Sep 17 00:00:00 2001
From: Oleksandr Ivantsiv <oivantsiv@nvidia.com>
Date: Mon, 22 Jul 2024 23:31:16 -0700
Subject: [PATCH 0843/1115] [nvidia-bluefield] Update the default topology for
 DPU SKUs (#19609)

- Why I did it
Update the default topology for all Nvidia Bluefield SKUs. The correct topology to be used for Smart Switch devices is t1-smartswitch.

- How I did it
Update default_sku file for all related SKUs

- How to verify it
Compile and run image. The default configuration should be generated for the t1-smartswitch topology.
---
 device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/default_sku | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/default_sku b/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/default_sku
index 41bda2fe9..4653aa86a 100644
--- a/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/default_sku
+++ b/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/default_sku
@@ -1 +1 @@
-Nvidia-bf3-com-dpu appliance
+Nvidia-bf3-com-dpu t1-smartswitch

From bda9dd79b5f6072377ba2af4865adca45bef7020 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Tue, 23 Jul 2024 19:02:09 +0800
Subject: [PATCH 0844/1115] [submodule] Update submodule sonic-swss to the
 latest HEAD automatically (#19654)

#### Why I did it
src/sonic-swss
```
* 2367bca1 - (HEAD -> master, origin/master, origin/HEAD) Add a check if OID exists before setting Host Tx Ready Signal Enable (#3232) (15 hours ago) [noaOrMlnx]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-swss | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-swss b/src/sonic-swss
index 43ac585cf..2367bca14 160000
--- a/src/sonic-swss
+++ b/src/sonic-swss
@@ -1 +1 @@
-Subproject commit 43ac585cf0634d1bc27d28637c6db7069460ee25
+Subproject commit 2367bca143effbda954bdc6aa5700b170c5ad65b

From a8dc94b390fb87bec6e6cde9eec35722b9e15458 Mon Sep 17 00:00:00 2001
From: Ze Gan <zegan@microsoft.com>
Date: Tue, 23 Jul 2024 22:49:43 +0800
Subject: [PATCH 0845/1115] Update threshold of PG profile for Arista7060X6-PE
 256x200G (#19642)

* Update threashold of PG profile for 7060x6-64pe

Signed-off-by: Ze Gan <zegan@microsoft.com>
---
 .../BALANCED/pg_profile_lookup.ini             | 18 +++++++++---------
 .../th5-a7060x6-64pe.config.bcm                |  8 ++++----
 2 files changed, 13 insertions(+), 13 deletions(-)

diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/BALANCED/pg_profile_lookup.ini b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/BALANCED/pg_profile_lookup.ini
index 064222610..bc4b6528e 100644
--- a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/BALANCED/pg_profile_lookup.ini
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/BALANCED/pg_profile_lookup.ini
@@ -4,20 +4,20 @@
   25000  5m   1248    2288 53248   0         2288
   40000  5m   1248    2288 66560   0         2288
   50000  5m   1248    2288 90272   0         2288
- 100000  5m   18796   3556 300990  -2        3556
- 200000  5m   18796   3556 300990  -2        3556
- 400000  5m   18796   3556 300990  -2        3556
+ 100000  5m   18796   3556 300990  0        3556
+ 200000  5m   18796   3556 300990  0        3556
+ 400000  5m   18796   3556 300990  0        3556
   10000  40m  1248    2288 37024   0         2288
   25000  40m  1248    2288 53248   0         2288
   40000  40m  1248    2288 71552   0         2288
   50000  40m  1248    2288 96096   0         2288
- 100000  40m  18796   3556 300990  -2        3556
- 200000  40m  18796   3556 300990  -2        3556
- 400000  40m  18796   3556 300990  -2        3556
+ 100000  40m  18796   3556 300990  0        3556
+ 200000  40m  18796   3556 300990  0        3556
+ 400000  40m  18796   3556 300990  0        3556
   10000  300m 1248    2288 46176   0         2288
   25000  300m 1248    2288 79040   0         2288
   40000  300m 1248    2288 108160  0         2288
   50000  300m 1248    2288 141856  0         2288
- 100000  300m 18796   3556 300990  -2        3556
- 200000  300m 18796   3556 300990  -2        3556
- 400000  300m 18796   3556 300990  -2        3556
+ 100000  300m 18796   3556 300990  0        3556
+ 200000  300m 18796   3556 300990  0        3556
+ 400000  300m 18796   3556 300990  0        3556
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/th5-a7060x6-64pe.config.bcm b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/th5-a7060x6-64pe.config.bcm
index a7fc7551e..af2f5f158 100644
--- a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/th5-a7060x6-64pe.config.bcm
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/th5-a7060x6-64pe.config.bcm
@@ -2461,7 +2461,7 @@ device:
             :
                 MIN_GUARANTEE_CELLS: 74
                 DYNAMIC_SHARED_LIMITS: 1
-                SHARED_LIMIT_DYNAMIC: ALPHA_1_4
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
                 RESUME_OFFSET_CELLS: 14
                 RESUME_FLOOR_CELLS: 0
                 HEADROOM_LIMIT_AUTO: 0
@@ -2472,7 +2472,7 @@ device:
             :
                 MIN_GUARANTEE_CELLS: 74
                 DYNAMIC_SHARED_LIMITS: 1
-                SHARED_LIMIT_DYNAMIC: ALPHA_1_4
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
                 RESUME_OFFSET_CELLS: 14
                 RESUME_FLOOR_CELLS: 0
                 HEADROOM_LIMIT_AUTO: 0
@@ -2483,7 +2483,7 @@ device:
             :
                 MIN_GUARANTEE_CELLS: 0
                 DYNAMIC_SHARED_LIMITS: 1
-                SHARED_LIMIT_DYNAMIC: ALPHA_1_4
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
                 RESUME_OFFSET_CELLS: 0
                 RESUME_FLOOR_CELLS: 0
                 HEADROOM_LIMIT_AUTO: 0
@@ -2494,7 +2494,7 @@ device:
             :
                 MIN_GUARANTEE_CELLS: 0
                 DYNAMIC_SHARED_LIMITS: 1
-                SHARED_LIMIT_DYNAMIC: ALPHA_1_4
+                SHARED_LIMIT_DYNAMIC: ALPHA_1
                 RESUME_OFFSET_CELLS: 0
                 RESUME_FLOOR_CELLS: 0
                 HEADROOM_LIMIT_AUTO: 0

From 0324d9acd2f7223539190792ef7a31d28421210c Mon Sep 17 00:00:00 2001
From: Lawrence Lee <lawlee@microsoft.com>
Date: Tue, 23 Jul 2024 15:35:43 -0700
Subject: [PATCH 0846/1115] Add SonicHost to DEVICE_METADATA yang model
 (#19544)

#### Why I did it
Fixes https://github.com/sonic-net/sonic-mgmt/issues/12297

#### How I did it
Add 'SonicHost' to the allowed device types for the DEVICE_METADATA table
---
 .../tests/yang_model_tests/tests/device_metadata.json  |  3 +++
 .../yang_model_tests/tests_config/device_metadata.json | 10 ++++++++++
 .../yang-models/sonic-device_metadata.yang             |  2 +-
 3 files changed, 14 insertions(+), 1 deletion(-)

diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/device_metadata.json b/src/sonic-yang-models/tests/yang_model_tests/tests/device_metadata.json
index 11d0c9e9d..43100cf3a 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests/device_metadata.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests/device_metadata.json
@@ -45,6 +45,9 @@
     "DEVICE_METADATA_TYPE_BMC_MGMT_TOR_PATTERN": {
         "desc": "DEVICE_METADATA value as BmcMgmtToRRouter for Type field"
     },
+    "DEVICE_METADATA_TYPE_SONIC_HOST_PATTERN": {
+        "desc": "DEVICE_METADATA value as SonicHost for Type field"
+    },
     "DEVICE_METADATA_TYPE_NOT_PROVISIONED_PATTERN": {
         "desc": "DEVICE_METADATA value as not-provisioned for Type field"
     },
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/device_metadata.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/device_metadata.json
index bc977e7da..4efaca823 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/device_metadata.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/device_metadata.json
@@ -92,6 +92,16 @@
             }
         }
     },
+    "DEVICE_METADATA_TYPE_SONIC_HOST_PATTERN": {
+        "sonic-device_metadata:sonic-device_metadata": {
+            "sonic-device_metadata:DEVICE_METADATA": {
+                "sonic-device_metadata:localhost": {
+                    "bgp_asn": "65002",
+                    "type": "SonicHost"
+                }
+            }
+        }
+    },
     "DEVICE_METADATA_TYPE_NOT_PROVISIONED_PATTERN": {
         "sonic-device_metadata:sonic-device_metadata": {
             "sonic-device_metadata:DEVICE_METADATA": {
diff --git a/src/sonic-yang-models/yang-models/sonic-device_metadata.yang b/src/sonic-yang-models/yang-models/sonic-device_metadata.yang
index 7bd936e83..efa1d4c96 100644
--- a/src/sonic-yang-models/yang-models/sonic-device_metadata.yang
+++ b/src/sonic-yang-models/yang-models/sonic-device_metadata.yang
@@ -100,7 +100,7 @@ module sonic-device_metadata {
                 leaf type {
                     type string {
                         length 1..255;
-                        pattern "ToRRouter|LeafRouter|SpineChassisFrontendRouter|ChassisBackendRouter|ASIC|MgmtToRRouter|SpineRouter|BackEndToRRouter|BackEndLeafRouter|EPMS|MgmtTsToR|BmcMgmtToRRouter|not-provisioned";
+                        pattern "ToRRouter|LeafRouter|SpineChassisFrontendRouter|ChassisBackendRouter|ASIC|MgmtToRRouter|SpineRouter|BackEndToRRouter|BackEndLeafRouter|EPMS|MgmtTsToR|BmcMgmtToRRouter|SonicHost|not-provisioned";
                     }
                 }
 

From 2bec02e7ad114da74ac0788ad8c69a329fafc1bc Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Wed, 24 Jul 2024 19:00:47 +0800
Subject: [PATCH 0847/1115] [submodule] Update submodule sonic-utilities to the
 latest HEAD automatically (#19669)

#### Why I did it
src/sonic-utilities
```
* 772ee793 - (HEAD -> master, origin/master, origin/HEAD) IP Assignment Issue (#3408) (5 hours ago) [Rida Hanif]
* f1966227 - fix show techsupport date issue (#3437) (19 hours ago) [ganglv]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-utilities | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-utilities b/src/sonic-utilities
index d1ca905e3..772ee793d 160000
--- a/src/sonic-utilities
+++ b/src/sonic-utilities
@@ -1 +1 @@
-Subproject commit d1ca905e3b0733170d19abeecad1cfbfd0180698
+Subproject commit 772ee793d067be40eeb8779d20b645aa7f97ea30

From 82aecf9c8590ea96259c019f2cf7f42699bad452 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Wed, 24 Jul 2024 19:00:53 +0800
Subject: [PATCH 0848/1115] [submodule] Update submodule sonic-platform-daemons
 to the latest HEAD automatically (#19668)

#### Why I did it
src/sonic-platform-daemons
```
* d6a4635 - (HEAD -> master, origin/master, origin/HEAD) [xcvrd] Fix xcvrd crash for RJ45 cable type (#513) (9 hours ago) [Vivek]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-platform-daemons | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-platform-daemons b/src/sonic-platform-daemons
index 8c89f6ba2..d6a4635fb 160000
--- a/src/sonic-platform-daemons
+++ b/src/sonic-platform-daemons
@@ -1 +1 @@
-Subproject commit 8c89f6ba2975a7699861f2c6d77083cebb62e97c
+Subproject commit d6a4635fb9f8c84d671179a438c2807c0f34bb75

From dc159f2c20250bfe5fa8de6fb57baf0c72f04268 Mon Sep 17 00:00:00 2001
From: arista-nwolfe <94405414+arista-nwolfe@users.noreply.github.com>
Date: Wed, 24 Jul 2024 13:38:49 -0400
Subject: [PATCH 0849/1115] [Arista]: Set soc property
 programmability_ucode_relative_path (#19637)

Broadcom requires that programmability_ucode_relative_path is set in SAI11.
This soc property replaces the legacy custom_feature_ucode_path

Without this we get the following error:

syncd#supervisord: syncd 0:dbx_file_get_db_location: DB Resource not defined#015
syncd#supervisord: syncd #015#015
syncd#supervisord: syncd 0:dnx_init_pemla_get_ucode_filepath:  Error 'Invalid parameter' indicated ; #015#015
---
 .../jr2-a7280cr3-32d4-40x100G.config.bcm                        | 2 +-
 .../0/j2p-a7800r3a-36d-36x400G.config.bcm                       | 1 +
 .../1/j2p-a7800r3a-36d-36x400G.config.bcm                       | 1 +
 .../0/j2p-a7800r3a-36d-36x400G.config.bcm                       | 1 +
 .../1/j2p-a7800r3a-36d-36x400G.config.bcm                       | 1 +
 .../0/j2p-a7800r3a-36d-36x400G.config.bcm                       | 1 +
 .../1/j2p-a7800r3a-36d-36x400G.config.bcm                       | 1 +
 src/sonic-device-data/tests/permitted_list                      | 1 +
 8 files changed, 8 insertions(+), 1 deletion(-)

diff --git a/device/arista/x86_64-arista_7800r3_48cq2_lc/Arista-7800R3-48CQ2-C48/jr2-a7280cr3-32d4-40x100G.config.bcm b/device/arista/x86_64-arista_7800r3_48cq2_lc/Arista-7800R3-48CQ2-C48/jr2-a7280cr3-32d4-40x100G.config.bcm
index f5f261610..43535d05b 100644
--- a/device/arista/x86_64-arista_7800r3_48cq2_lc/Arista-7800R3-48CQ2-C48/jr2-a7280cr3-32d4-40x100G.config.bcm
+++ b/device/arista/x86_64-arista_7800r3_48cq2_lc/Arista-7800R3-48CQ2-C48/jr2-a7280cr3-32d4-40x100G.config.bcm
@@ -2,7 +2,7 @@ soc_family.BCM8869X=BCM8869X
 system_ref_core_clock_khz=1600000
 
 dpp_db_path=/usr/share/bcm/db
-custom_feature_ucode_path=u_code_db2pem.txt
+programmability_ucode_relative_path.BCM8869X=pemla/ucode/standard_1/jer2pemla/u_code_db2pem.txt
 system_headers_mode=1
 suppress_unknown_prop_warnings=1
 l4_protocols_load_balancing_enable=1
diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/0/j2p-a7800r3a-36d-36x400G.config.bcm b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/0/j2p-a7800r3a-36d-36x400G.config.bcm
index b0be0c561..473988f4e 100644
--- a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/0/j2p-a7800r3a-36d-36x400G.config.bcm
+++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/0/j2p-a7800r3a-36d-36x400G.config.bcm
@@ -2,6 +2,7 @@ soc_family=BCM8885X
 system_ref_core_clock_khz=1600000
 
 dpp_db_path=/usr/share/bcm/db
+programmability_ucode_relative_path.BCM8885X=pemla/ucode/standard_1/jer2pemla/u_code_db2pem.txt
 
 ####################################################
 ##Reference applications related properties - Start
diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/1/j2p-a7800r3a-36d-36x400G.config.bcm b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/1/j2p-a7800r3a-36d-36x400G.config.bcm
index 5ece4f833..54cfe519d 100644
--- a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/1/j2p-a7800r3a-36d-36x400G.config.bcm
+++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/1/j2p-a7800r3a-36d-36x400G.config.bcm
@@ -2,6 +2,7 @@ soc_family=BCM8885X
 system_ref_core_clock_khz=1600000
 
 dpp_db_path=/usr/share/bcm/db
+programmability_ucode_relative_path.BCM8885X=pemla/ucode/standard_1/jer2pemla/u_code_db2pem.txt
 
 ####################################################
 ##Reference applications related properties - Start
diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/0/j2p-a7800r3a-36d-36x400G.config.bcm b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/0/j2p-a7800r3a-36d-36x400G.config.bcm
index 34b8c52a9..1582449b6 100644
--- a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/0/j2p-a7800r3a-36d-36x400G.config.bcm
+++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/0/j2p-a7800r3a-36d-36x400G.config.bcm
@@ -2,6 +2,7 @@ soc_family=BCM8885X
 system_ref_core_clock_khz=1600000
 
 dpp_db_path=/usr/share/bcm/db
+programmability_ucode_relative_path.BCM8885X=pemla/ucode/standard_1/jer2pemla/u_code_db2pem.txt
 
 ####################################################
 ##Reference applications related properties - Start
diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/1/j2p-a7800r3a-36d-36x400G.config.bcm b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/1/j2p-a7800r3a-36d-36x400G.config.bcm
index ed7d23113..820bbdf2a 100644
--- a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/1/j2p-a7800r3a-36d-36x400G.config.bcm
+++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/1/j2p-a7800r3a-36d-36x400G.config.bcm
@@ -2,6 +2,7 @@ soc_family=BCM8885X
 system_ref_core_clock_khz=1600000
 
 dpp_db_path=/usr/share/bcm/db
+programmability_ucode_relative_path.BCM8885X=pemla/ucode/standard_1/jer2pemla/u_code_db2pem.txt
 
 ####################################################
 ##Reference applications related properties - Start
diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/0/j2p-a7800r3a-36d-36x400G.config.bcm b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/0/j2p-a7800r3a-36d-36x400G.config.bcm
index bcb27b873..3702d9b3a 100644
--- a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/0/j2p-a7800r3a-36d-36x400G.config.bcm
+++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/0/j2p-a7800r3a-36d-36x400G.config.bcm
@@ -2,6 +2,7 @@ soc_family=BCM8885X
 system_ref_core_clock_khz=1600000
 
 dpp_db_path=/usr/share/bcm/db
+programmability_ucode_relative_path.BCM8885X=pemla/ucode/standard_1/jer2pemla/u_code_db2pem.txt
 
 ####################################################
 ##Reference applications related properties - Start
diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/1/j2p-a7800r3a-36d-36x400G.config.bcm b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/1/j2p-a7800r3a-36d-36x400G.config.bcm
index 30b740af2..1f26bc66d 100644
--- a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/1/j2p-a7800r3a-36d-36x400G.config.bcm
+++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/1/j2p-a7800r3a-36d-36x400G.config.bcm
@@ -2,6 +2,7 @@ soc_family=BCM8885X
 system_ref_core_clock_khz=1600000
 
 dpp_db_path=/usr/share/bcm/db
+programmability_ucode_relative_path.BCM8885X=pemla/ucode/standard_1/jer2pemla/u_code_db2pem.txt
 
 ####################################################
 ##Reference applications related properties - Start
diff --git a/src/sonic-device-data/tests/permitted_list b/src/sonic-device-data/tests/permitted_list
index 625e6afcc..b526724a7 100644
--- a/src/sonic-device-data/tests/permitted_list
+++ b/src/sonic-device-data/tests/permitted_list
@@ -346,3 +346,4 @@ sai_stats_support_mask
 sai_default_cpu_tx_tc
 oversubscribe_mixed_sister_25_50_enable
 sai_disable_srcmacqedstmac_ctrl
+programmability_ucode_relative_path

From 33e0efdbe4c870d0e9fa74b7f8f9be121494a1e7 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Thu, 25 Jul 2024 19:00:52 +0800
Subject: [PATCH 0850/1115] [submodule] Update submodule sonic-utilities to the
 latest HEAD automatically (#19679)

#### Why I did it
src/sonic-utilities
```
* a8132159 - (HEAD -> master, origin/master, origin/HEAD) Fix multi-asic behaviour for dropstat (#3059) (6 hours ago) [bktsim]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-utilities | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-utilities b/src/sonic-utilities
index 772ee793d..a81321595 160000
--- a/src/sonic-utilities
+++ b/src/sonic-utilities
@@ -1 +1 @@
-Subproject commit 772ee793d067be40eeb8779d20b645aa7f97ea30
+Subproject commit a81321595b1f2cf34b26255fb6953f304ba2df14

From 762a9bfc0f320610523f5b5f35cae3b18e99c8f3 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Thu, 25 Jul 2024 19:01:02 +0800
Subject: [PATCH 0851/1115] [submodule] Update submodule sonic-platform-daemons
 to the latest HEAD automatically (#19677)

#### Why I did it
src/sonic-platform-daemons
```
* bf865c6 - (HEAD -> master, origin/master, origin/HEAD) Remove redundant xcvr_table_helper init during CmisManagerTask init (#521) (3 hours ago) [mihirpat1]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-platform-daemons | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-platform-daemons b/src/sonic-platform-daemons
index d6a4635fb..bf865c6b7 160000
--- a/src/sonic-platform-daemons
+++ b/src/sonic-platform-daemons
@@ -1 +1 @@
-Subproject commit d6a4635fb9f8c84d671179a438c2807c0f34bb75
+Subproject commit bf865c6b711833347d3c57e9d84cd366bcd1b776

From d9e6ab7da88911f4651c78e9e13d1624710a8c55 Mon Sep 17 00:00:00 2001
From: Yaqiang Zhu <zyq1512099831@gmail.com>
Date: Thu, 25 Jul 2024 23:02:53 +0800
Subject: [PATCH 0852/1115] [dhcp_server] Remove invoke of dhcpmon when
 dhcp_server is enabled (#19673)

* [dhcp_server] Remove invoke of dhcpmon when dhcp_server is enabled

* set include_dhcp_server to y

* Update log

* Revert "set include_dhcp_server to y"

This reverts commit 985273e0a9672f2e0b506515ff626ae761e0ac74.
---
 .../dhcp_utilities/dhcprelayd/dhcprelayd.py                 | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/src/sonic-dhcp-utilities/dhcp_utilities/dhcprelayd/dhcprelayd.py b/src/sonic-dhcp-utilities/dhcp_utilities/dhcprelayd/dhcprelayd.py
index 01e6d5499..d1b22a315 100644
--- a/src/sonic-dhcp-utilities/dhcp_utilities/dhcprelayd/dhcprelayd.py
+++ b/src/sonic-dhcp-utilities/dhcp_utilities/dhcprelayd/dhcprelayd.py
@@ -109,7 +109,9 @@ def refresh_dhcrelay(self, force_kill=False):
         self._disable_checkers(checkers_to_be_disabled)
 
         self._start_dhcrelay_process(dhcp_interfaces, dhcp_server_ip, force_kill)
-        self._start_dhcpmon_process(dhcp_interfaces, force_kill)
+
+        # TODO dhcpmon is not ready for count packet for dhcp_server, hence comment invoke it for now
+        # self._start_dhcpmon_process(dhcp_interfaces, force_kill)
 
     def wait(self):
         """
@@ -307,7 +309,7 @@ def _start_dhcpmon_process(self, new_dhcp_interfaces, force_kill):
         for pid, cmds in pids_cmds.items():
             proc = psutil.Process(pid)
             if proc.status() == psutil.STATUS_ZOMBIE:
-                syslog.syslog(syslog.LOG_ERR, "Faild to start dhcpmon process: {}".format(cmds))
+                syslog.syslog(syslog.LOG_ERR, "Failed to start dhcpmon process: {}".format(cmds))
                 terminate_proc(proc)
             else:
                 syslog.syslog(syslog.LOG_INFO, "dhcpmon process started successfully, cmds: {}".format(cmds))

From 08f333b79854a63aa2e50aedcc632d64cb1219ff Mon Sep 17 00:00:00 2001
From: Ryan Lucus <ryan.lucus@gmail.com>
Date: Thu, 25 Jul 2024 10:17:00 -0700
Subject: [PATCH 0853/1115] add config_db entries for
 TELEMETRY|gnmi|save_on_set (#19309)

* add config_db entries for TELEMETRY|gnmi|save_on_set

* add save_on_set to sonic-gnmi.yang
---
 src/sonic-yang-models/doc/Configuration.md    |  3 ++-
 .../tests/yang_model_tests/tests/gnmi.json    |  4 ++++
 .../yang_model_tests/tests/telemetry.json     |  4 ++++
 .../yang_model_tests/tests_config/gnmi.json   | 20 ++++++++++++++++++-
 .../tests_config/telemetry.json               | 20 ++++++++++++++++++-
 .../yang-models/sonic-gnmi.yang               |  5 +++++
 .../yang-models/sonic-telemetry.yang          |  5 +++++
 7 files changed, 58 insertions(+), 3 deletions(-)

diff --git a/src/sonic-yang-models/doc/Configuration.md b/src/sonic-yang-models/doc/Configuration.md
index cafc4fcaa..088b4e545 100644
--- a/src/sonic-yang-models/doc/Configuration.md
+++ b/src/sonic-yang-models/doc/Configuration.md
@@ -2332,7 +2332,8 @@ and is listed in this table.
         "gnmi": {
             "client_auth": "true",
             "log_level": "2",
-            "port": "50051"
+            "port": "50051",
+            "save_on_set": "false"
         }
     }
 }
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/gnmi.json b/src/sonic-yang-models/tests/yang_model_tests/tests/gnmi.json
index 5938290f8..0d99fe097 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests/gnmi.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests/gnmi.json
@@ -11,6 +11,10 @@
         "desc": "TABLE_WITH_INCORRECT_PORT failure.",
         "eStrKey": "InvalidValue"
     },
+    "GNMI_TABLE_WITH_INCORRECT_SAVE_ON_SET": {
+        "desc": "TABLE_WITH_INCORRECT_SAVE_ON_SET failure",
+        "eStrKey": "InvalidValue"
+    },
     "GNMI_TABLE_WITH_VALID_CONFIG": {
         "desc": "TABLE WITH VALID CONFIG."
     }
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/telemetry.json b/src/sonic-yang-models/tests/yang_model_tests/tests/telemetry.json
index f79e8ea73..3329abd87 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests/telemetry.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests/telemetry.json
@@ -11,6 +11,10 @@
         "desc": "TABLE_WITH_INCORRECT_PORT failure.",
         "eStrKey": "InvalidValue"
     },
+    "TELEMETRY_TABLE_WITH_INCORRECT_SAVE_ON_SET": {
+        "desc": "TABLE_WITH_INCORRECT_SAVE_ON_SET failure",
+        "eStrKey": "InvalidValue"
+    },
     "TELEMETRY_TABLE_WITH_VALID_CONFIG": {
         "desc": "TABLE WITH VALID CONFIG."
     }
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/gnmi.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/gnmi.json
index db121ae39..62b09a2d5 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/gnmi.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/gnmi.json
@@ -47,6 +47,23 @@
             }
         }
     },
+    "GNMI_TABLE_WITH_INCORRECT_SAVE_ON_SET": {
+        "sonic-gnmi:sonic-gnmi": {
+            "sonic-gnmi:GNMI": {
+                "certs": {
+                    "ca_crt": "/etc/sonic/credentials/dsmsroot.cer",
+                    "server_crt": "/etc/sonic/credentials/server.cer",
+                    "server_key": "/etc/sonic/credentials/server.key"
+                },
+                "gnmi": {
+                    "client_auth": "true",
+                    "log_level": "2",
+                    "port": "50051",
+                    "save_on_set": "wrong"
+                }
+            }
+        }
+    },
     "GNMI_TABLE_WITH_VALID_CONFIG": {
         "sonic-gnmi:sonic-gnmi": {
             "sonic-gnmi:GNMI": {
@@ -58,7 +75,8 @@
                 "gnmi": {
                     "client_auth": "true",
                     "log_level": "2",
-                    "port": "50052"
+                    "port": "50052",
+                    "save_on_set": "false"
                 }
             }
         }
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/telemetry.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/telemetry.json
index 1231a4cee..18e708262 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/telemetry.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/telemetry.json
@@ -47,6 +47,23 @@
             }
         }
     },
+    "TELEMETRY_TABLE_WITH_INCORRECT_SAVE_ON_SET": {
+        "sonic-telemetry:sonic-telemetry": {
+            "sonic-telemetry:TELEMETRY": {
+                "certs": {
+                    "ca_crt": "/etc/sonic/telemetry/dsmsroot.cer",
+                    "server_crt": "/etc/sonic/telemetry/streamingtelemetryserver.cer",
+                    "server_key": "/etc/sonic/telemetry/streamingtelemetryserver.key"
+                },
+                "gnmi": {
+                    "client_auth": "true",
+                    "log_level": "2",
+                    "port": "50051",
+                    "save_on_set": "wrong"
+                }
+            }
+        }
+    },
     "TELEMETRY_TABLE_WITH_VALID_CONFIG": {
         "sonic-telemetry:sonic-telemetry": {
             "sonic-telemetry:TELEMETRY": {
@@ -58,7 +75,8 @@
                 "gnmi": {
                     "client_auth": "true",
                     "log_level": "2",
-                    "port": "50051"
+                    "port": "50051",
+                    "save_on_set": "false"
                 }
             }
         }
diff --git a/src/sonic-yang-models/yang-models/sonic-gnmi.yang b/src/sonic-yang-models/yang-models/sonic-gnmi.yang
index 1d6b22826..eb573e3ff 100644
--- a/src/sonic-yang-models/yang-models/sonic-gnmi.yang
+++ b/src/sonic-yang-models/yang-models/sonic-gnmi.yang
@@ -71,6 +71,11 @@ module sonic-gnmi {
                     description "Port gnmi runs on.";
                 }
 
+                leaf save_on_set {
+                    type boolean;
+                    description "Flag for enabling save on set.";
+                }
+
             }
 
         }
diff --git a/src/sonic-yang-models/yang-models/sonic-telemetry.yang b/src/sonic-yang-models/yang-models/sonic-telemetry.yang
index d3d7600a8..5cbdf2bd9 100644
--- a/src/sonic-yang-models/yang-models/sonic-telemetry.yang
+++ b/src/sonic-yang-models/yang-models/sonic-telemetry.yang
@@ -71,6 +71,11 @@ module sonic-telemetry {
                     description "Port gnmi runs on.";
                 }
 
+                leaf save_on_set {
+                    type boolean;
+                    description "Flag for enabling save on set.";
+                }
+
             }
 
         }

From 4932a383a37c29c3f10def55a53b29aae45452c9 Mon Sep 17 00:00:00 2001
From: Jianquan Ye <jianquanye@microsoft.com>
Date: Fri, 26 Jul 2024 10:07:07 +1000
Subject: [PATCH 0854/1115] Make pmon feature delayed flag as jinja template
 (#19657)

* Fix the Loopback0 IPv6 address of LC's in chassis not reachable from
peer device's

Signed-off-by: Abhishek Dosi <abdosi@microsoft.com>

* Added change to have flag

Signed-off-by: Abhishek Dosi <abdosi@microsoft.com>

* Assign the metric vaule for Ipv6 default route learnt via RA message to
higher value so that BGP learnt default route is higher priority.

Signed-off-by: Abhishek Dosi <abdosi@microsoft.com>

* Add alternate name for bridge interface on supversior in chassis systrem

Signed-off-by: Abhishek Dosi <abdosi@microsoft.com>

* Update service_checker.py

* Update init_cfg.json.j2 to handle global scope for lldp feature

* Update sonic-feature.yang

* Added support to parse "AssociatedSliceStr" attribute of minigraph and
save as `slice_type` as part of DEVICE_METADATA

Signed-off-by: Abhishek Dosi <abdosi@microsoft.com>

* Revert "Added support to parse "AssociatedSliceStr" attribute of minigraph and"

This reverts commit 0f2d26d0efd538fbc9d2ee16cb9600642753a6a7.

* Added support to parse "AssociatedSliceStr" attribute of minigraph and
 save as `slice_type` as part of DEVICE_METADATA for Chassis Device type

Signed-off-by: Abhishek Dosi <abdosi@microsoft.com>

* Update minigraph.py

* pmon need not be delayed for SpineRouter/T2.
pmon need to enable asap to detect ASIC's on Supervisor.
pmonm need to enable asap for bring-up of 400G ports on LC's fast
becuase of CMIS state machine present in PMON.

Signed-off-by: Abhishek Dosi <abdosi@microsoft.com>

* Updated Yang model for Feature delay from boolean to string

Signed-off-by: Abhishek Dosi <abdosi@microsoft.com>

* Fix Build Error

Signed-off-by: Abhishek Dosi <abdosi@microsoft.com>

* Fix build error

Signed-off-by: Abhishek Dosi <abdosi@microsoft.com>

* Update true/false to True/False

---------

Signed-off-by: Abhishek Dosi <abdosi@microsoft.com>
Co-authored-by: Abhishek Dosi <abdosi@microsoft.com>
Co-authored-by: abdosi <58047199+abdosi@users.noreply.github.com>
---
 files/build_templates/init_cfg.json.j2               | 4 ++--
 src/sonic-yang-models/yang-models/sonic-feature.yang | 7 ++++++-
 2 files changed, 8 insertions(+), 3 deletions(-)

diff --git a/files/build_templates/init_cfg.json.j2 b/files/build_templates/init_cfg.json.j2
index dc7e4aab7..f8083f040 100644
--- a/files/build_templates/init_cfg.json.j2
+++ b/files/build_templates/init_cfg.json.j2
@@ -38,7 +38,7 @@
 {%- set features = [("bgp", "{% if not DEVICE_RUNTIME_METADATA['ETHERNET_PORTS_PRESENT'] or ('CHASSIS_METADATA' in DEVICE_RUNTIME_METADATA and DEVICE_RUNTIME_METADATA['CHASSIS_METADATA']['module_type'] in ['supervisor']) %}disabled{% else %}enabled{% endif %}", false, "enabled"),
                    ("database", "always_enabled", false, "always_enabled"),
                    ("lldp", "enabled", true, "enabled"),
-                   ("pmon", "enabled", true, "enabled"),
+                   ("pmon", "enabled", "{% if 'type' in DEVICE_METADATA['localhost'] and DEVICE_METADATA['localhost']['type'] == 'SpineRouter' %}False{% else %}True{% endif %}", "enabled"),
                    ("snmp", "enabled", true, "enabled"),
                    ("swss", "enabled", false, "enabled"),
                    ("syncd", "enabled", false, "enabled")] %}
@@ -71,7 +71,7 @@
 {%- for feature, state, delayed, autorestart in features %}
         "{{feature}}": {
             "state": "{{state}}",
-            "delayed" : {{delayed | lower()}},
+            "delayed" : "{{delayed}}",
 {%- if feature in ["lldp"] %}
             "has_global_scope": {% raw %}"{% if ('CHASSIS_METADATA' in DEVICE_RUNTIME_METADATA and DEVICE_RUNTIME_METADATA['CHASSIS_METADATA']['module_type'] in ['linecard']) %}False{% else %}True{% endif %}"{% endraw %},
             "has_per_asic_scope": {% raw %}"{% if not DEVICE_RUNTIME_METADATA['ETHERNET_PORTS_PRESENT'] or ('CHASSIS_METADATA' in DEVICE_RUNTIME_METADATA and DEVICE_RUNTIME_METADATA['CHASSIS_METADATA']['module_type'] in ['supervisor']) %}False{% else %}True{% endif %}"{% endraw %},
diff --git a/src/sonic-yang-models/yang-models/sonic-feature.yang b/src/sonic-yang-models/yang-models/sonic-feature.yang
index 3ca32ad6a..6939f0044 100644
--- a/src/sonic-yang-models/yang-models/sonic-feature.yang
+++ b/src/sonic-yang-models/yang-models/sonic-feature.yang
@@ -29,6 +29,11 @@ module sonic-feature{
         type string;
     }
 
+    typedef feature-delay-status {
+        description "configuration to set the feature has delay scope as True/False";
+        type string;
+    }
+
     container sonic-feature {
 
         container FEATURE {
@@ -60,7 +65,7 @@ module sonic-feature{
                 leaf delayed {
                     description "This configuration identicates if the feature needs to be delayed until
                                  system initialization";
-                    type stypes:boolean_type;
+                    type feature-delay-status;
                     default "false";
                 }
 

From 3df115472d6f32573296fd034b29fd062f33ed38 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Fri, 26 Jul 2024 19:01:05 +0800
Subject: [PATCH 0855/1115] [submodule] Update submodule sonic-utilities to the
 latest HEAD automatically (#19708)

#### Why I did it
src/sonic-utilities
```
* 9b24421a - (HEAD -> master, origin/master, origin/HEAD) Add sfputil power enable/disable command (#3418) (2 hours ago) [Anoop Kamath]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-utilities | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-utilities b/src/sonic-utilities
index a81321595..9b24421aa 160000
--- a/src/sonic-utilities
+++ b/src/sonic-utilities
@@ -1 +1 @@
-Subproject commit a81321595b1f2cf34b26255fb6953f304ba2df14
+Subproject commit 9b24421aacaaa496f65fbab39e918283886205e5

From 9ece6c6229c9a178c6384018bdf03423a14b573d Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Fri, 26 Jul 2024 19:01:15 +0800
Subject: [PATCH 0856/1115] [submodule] Update submodule sonic-swss to the
 latest HEAD automatically (#19706)

#### Why I did it
src/sonic-swss
```
* 3c9d6b34 - (HEAD -> master, origin/master, origin/HEAD) Support allocate buffer pool based on ratio (#3201) (6 hours ago) [Stephen Sun]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-swss | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-swss b/src/sonic-swss
index 2367bca14..3c9d6b342 160000
--- a/src/sonic-swss
+++ b/src/sonic-swss
@@ -1 +1 @@
-Subproject commit 2367bca143effbda954bdc6aa5700b170c5ad65b
+Subproject commit 3c9d6b342b539b379cf10317e181c9953f57827c

From f528412f65b7dfcf2940d3a34f5871bc7422704d Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Fri, 26 Jul 2024 19:01:24 +0800
Subject: [PATCH 0857/1115] [submodule] Update submodule sonic-platform-common
 to the latest HEAD automatically (#19704)

#### Why I did it
src/sonic-platform-common
```
* 30895d1 - (HEAD -> master, origin/master, origin/HEAD) Add set_power api support to xcvr api (#484) (6 hours ago) [Anoop Kamath]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-platform-common | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-platform-common b/src/sonic-platform-common
index 8e673d5cf..30895d1a9 160000
--- a/src/sonic-platform-common
+++ b/src/sonic-platform-common
@@ -1 +1 @@
-Subproject commit 8e673d5cfcb9ee184950f4fb1d32f999cbb39735
+Subproject commit 30895d1a98099935852c6aa170acd8ab16262039

From f29ece85cc8159c238a69596d6364fa5d1a29f10 Mon Sep 17 00:00:00 2001
From: Vivek <vkarri@nvidia.com>
Date: Fri, 26 Jul 2024 06:47:02 -0700
Subject: [PATCH 0858/1115] [sflow]: Enable linux capabilities on sflow
 container for kernel 6.1.94 compatibility (#19700)

Starting 6.1.94, Kernel mandates the process to have SYS_ADMIN/NET_ADMIN capability to join events/packets multicast group respectively
PSAMPLE used packets and DROPMON uses events

Ref:
https://git.kernel.org/pub/scm/linux/kernel/git/netdev/net.git/commit/?id=e03781879a0d
https://git.kernel.org/pub/scm/linux/kernel/git/netdev/net.git/commit/?id=44ec98ea5ea9

Without this, the following error is observed and host-sflow couldn't use psample and NET_DB

2024 Jul 24 22:38:35.140784 r-tigris-04 ERR sflow#hsflowd: error joining PSAMPLE netlink group 20 : Operation not permitted
2024 Jul 24 22:38:35.849822 r-tigris-04 ERR sflow#hsflowd: error joining DROPMON netlink group 1 : Operation not permitted

Signed-off-by: Vivek Reddy <vkarri@nvidia.com>
---
 rules/docker-sflow.mk | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/rules/docker-sflow.mk b/rules/docker-sflow.mk
index ece35f5cb..cf54436a0 100644
--- a/rules/docker-sflow.mk
+++ b/rules/docker-sflow.mk
@@ -30,7 +30,7 @@ SONIC_INSTALL_DOCKER_DBG_IMAGES += $(DOCKER_SFLOW_DBG)
 endif
 
 $(DOCKER_SFLOW)_CONTAINER_NAME = sflow
-$(DOCKER_SFLOW)_RUN_OPT += -t
+$(DOCKER_SFLOW)_RUN_OPT += -t --cap-add=NET_ADMIN --cap-add=SYS_ADMIN
 $(DOCKER_SFLOW)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro
 $(DOCKER_SFLOW)_RUN_OPT += -v /etc/timezone:/etc/timezone:ro 
 $(DOCKER_SFLOW)_RUN_OPT += -v /host/warmboot:/var/warmboot

From 3e3a1b9e61e3d31b99c995d514b99175f10869da Mon Sep 17 00:00:00 2001
From: Ashwin Srinivasan <93744978+assrinivasan@users.noreply.github.com>
Date: Fri, 26 Jul 2024 06:52:12 -0700
Subject: [PATCH 0859/1115] [logrotate]: Separated sort and head commands to
 prevent broken pipe issues (#19699)

Why I did it
Currently the logrotate script is susceptible to SIGPIPE issue because of a race condition between the sort and head commands that leads to the following error:

Jun 22 03:20:00.331117 sonic-switch INFO logrotate[1494655]: sort: write failed: 'standard output': Broken pipe
Jun 22 03:20:00.331207 sonic-switch INFO logrotate[1494655]: sort: write error
This is because if the sort command has not yet finished writing to stdout and head has finished executing and closes the pipe. Subsequent writes by the previously issued sort command would fail because of the closed pipe.

Work item tracking
Microsoft ADO (number only): 28511764
How I did it
I refactored the code in a way that removes the call to head after sort.

How to verify it
I created a bash script that induces a write failed: Broken pipe error on account of a sort | head combination and verified the SIGPIPE error code. I then removed the head command and replaced it with a call to awk and re-ran the script. This time there was no SIGPIPE.
The script:

#!/usr/bin/bash

var0=$(strace -f -e execve,write bash -c 'ls -l /usr/bin/ /var/lib /usr/lib | sort | head -n 20 > /dev/null')

echo ""
echo "Removed head and modified awk:"
echo ""

var1=$(strace -f -e execve,write bash -c 'ls -l /usr/bin/ /var/lib /usr/lib | sort | awk "NR == 1 {print $2}"')

The output

execve("/usr/bin/bash", ["bash", "-c", "ls -l /usr/bin/ /var/lib /usr/li"...], 0x7ffc34b52f98 /* 17 vars */) = 0
strace: Process 137372 attached
strace: Process 137373 attached
strace: Process 137374 attached
[pid 137373] execve("/usr/bin/sort", ["sort"], 0x55be58b00350 /* 17 vars */ <unfinished ...>
[pid 137372] execve("/usr/bin/ls", ["ls", "-l", "/usr/bin/", "/var/lib", "/usr/lib"], 0x55be58b00350 /* 17 vars */ <unfinished ...>
[pid 137373] <... execve resumed>)      = 0
[pid 137372] <... execve resumed>)      = 0
[pid 137374] execve("/usr/bin/head", ["head", "-n", "20"], 0x55be58b00350 /* 17 vars */) = 0
[pid 137372] write(1, "/usr/bin/:\ntotal 341826\n-rwxr-xr"..., 4096) = 4096
[pid 137372] write(1, "     30960 Jan 20  2022 colrm\n-r"..., 4096) = 4096
[pid 137372] write(1, "-xr-x 1 root root        1866 De"..., 4096) = 4096
[pid 137372] write(1, "2022 gpgv\n-rwxr-xr-x 1 root root"..., 4096) = 4096
[pid 137372] write(1, " 1 root root      315136 Oct  2 "..., 4096) = 4096
[pid 137372] write(1, "ewgrp\n-rwxr-xr-x 1 root root    "..., 4096) = 4096
[pid 137372] write(1, "-rwxr-xr-x 1 root root        43"..., 4096) = 4096
[pid 137372] write(1, "eb 27  2021 screen\n-rwxr-xr-x 1 "..., 4096) = 4096
[pid 137372] write(1, "672 Jun 18  2023 systemd-ask-pas"..., 4096) = 4096
[pid 137372] write(1, "zselect\n-rwxr-xr-x 1 root root  "..., 4096) = 4096
[pid 137372] write(1, "r-xr-x 1 root root        2081 A"..., 4096) = 4096
[pid 137372] write(1, " 115 Jun 19 08:44 pam\ndrwxr-xr-x"..., 533) = 533
[pid 137372] +++ exited with 0 +++
[pid 137373] write(1, "\n\ndrwx------  2 root root 4096 J"..., 4096) = 4096
[pid 137373] write(1, "xrwx 1 root root          12 Jul"..., 4096) = 4096
[pid 137374] write(1, "\n\ndrwx------  2 root root 4096 J"..., 942 <unfinished ...>
[pid 137373] write(1, "Feb  2  2021 ping6 -> ping\nlrwxr"..., 4096 <unfinished ...>
[pid 137374] <... write resumed>)       = 942
[pid 137373] <... write resumed>)       = -1 EPIPE (Broken pipe)
[pid 137373] --- SIGPIPE {si_signo=SIGPIPE, si_code=SI_USER, si_pid=137373, si_uid=1000} ---
[pid 137374] +++ exited with 0 +++
[pid 137373] --- SIGPIPE {si_signo=SIGPIPE, si_code=SI_TKILL, si_pid=137373, si_uid=1000} ---
[pid 137373] +++ killed by SIGPIPE +++
--- SIGCHLD {si_signo=SIGCHLD, si_code=CLD_EXITED, si_pid=137372, si_uid=1000, si_status=0, si_utime=0, si_stime=4} ---
+++ exited with 0 +++

Removed head and modified awk:

execve("/usr/bin/bash", ["bash", "-c", "ls -l /usr/bin/ /var/lib /usr/li"...], 0x7fff94a24d18 /* 17 vars */) = 0
strace: Process 137379 attached
strace: Process 137380 attached
strace: Process 137381 attached
[pid 137379] execve("/usr/bin/ls", ["ls", "-l", "/usr/bin/", "/var/lib", "/usr/lib"], 0x55d437568350 /* 17 vars */ <unfinished ...>
[pid 137380] execve("/usr/bin/sort", ["sort"], 0x55d437568350 /* 17 vars */ <unfinished ...>
[pid 137379] <... execve resumed>)      = 0
[pid 137380] <... execve resumed>)      = 0
[pid 137381] execve("/usr/bin/awk", ["awk", "NR == 1 {print }"], 0x55d437568350 /* 17 vars */) = 0
[pid 137379] write(1, "/usr/bin/:\ntotal 341826\n-rwxr-xr"..., 4096) = 4096
[pid 137379] write(1, "     30960 Jan 20  2022 colrm\n-r"..., 4096) = 4096
[pid 137379] write(1, "-xr-x 1 root root        1866 De"..., 4096) = 4096
[pid 137379] write(1, "2022 gpgv\n-rwxr-xr-x 1 root root"..., 4096) = 4096
[pid 137379] write(1, " 1 root root      315136 Oct  2 "..., 4096) = 4096
[pid 137379] write(1, "ewgrp\n-rwxr-xr-x 1 root root    "..., 4096) = 4096
[pid 137379] write(1, "-rwxr-xr-x 1 root root        43"..., 4096) = 4096
[pid 137379] write(1, "eb 27  2021 screen\n-rwxr-xr-x 1 "..., 4096) = 4096
[pid 137379] write(1, "672 Jun 18  2023 systemd-ask-pas"..., 4096) = 4096
[pid 137379] write(1, "zselect\n-rwxr-xr-x 1 root root  "..., 4096) = 4096
[pid 137379] write(1, "r-xr-x 1 root root        2081 A"..., 4096) = 4096
[pid 137379] write(1, " 115 Jun 19 08:44 pam\ndrwxr-xr-x"..., 533) = 533
[pid 137379] +++ exited with 0 +++
[pid 137380] write(1, "\n\ndrwx------  2 root root 4096 J"..., 4096) = 4096
[pid 137380] write(1, "xrwx 1 root root          12 Jul"..., 4096) = 4096
[pid 137380] write(1, "Feb  2  2021 ping6 -> ping\nlrwxr"..., 4096) = 4096
[pid 137380] write(1, "t       10803 Sep 24  2021 pod2t"..., 4096) = 4096
[pid 137380] write(1, "22 colcrt\n-rwxr-xr-x 1 root root"..., 4096) = 4096
[pid 137380] write(1, "  2022 zmore\n-rwxr-xr-x 1 root r"..., 4096) = 4096
[pid 137380] write(1, "6 Jun 19 08:47 TS\n-rwxr-xr-x 1 r"..., 4096) = 4096
[pid 137380] write(1, "oot       35048 Jan 20  2022 tas"..., 4096) = 4096
[pid 137380] write(1, "     4392 Sep 24  2021 ptargrep\n"..., 4096) = 4096
[pid 137380] write(1, "-xr-x 1 root root       56192 Se"..., 4096) = 4096
[pid 137380] write(1, "    7285 Nov 24  2016 boot-eos\n-"..., 4096) = 4096
[pid 137380] write(1, "ostname-config.sh\n-rwxr-xr-x 2 r"..., 533) = 533
[pid 137381] write(1, "\n", 1)          = 1
[pid 137380] +++ exited with 0 +++
[pid 137381] +++ exited with 0 +++
--- SIGCHLD {si_signo=SIGCHLD, si_code=CLD_EXITED, si_pid=137379, si_uid=1000, si_status=0, si_utime=1, si_stime=5} ---
+++ exited with 0 +++

I created 30 dummy archive files in a dev environment and then ran the modified script to verify that the OLDEST_ARCHIVE_FILE is the archive file that was created first:
The setup:

admin@sonic:~/testpipe/var/log$ pwd
/home/admin/testpipe/var/log

admin@sonic:~/testpipe/var/log$ ls -alrth
total 8.0K
drwxr-xr-x 3 admin admin 4.0K Jul 25 17:12 ..
-rw-r--r-- 1 admin admin    0 Jul 25 17:17 syslog.1.gz
-rw-r--r-- 1 admin admin    0 Jul 25 17:17 syslog.2.gz
-rw-r--r-- 1 admin admin    0 Jul 25 17:17 syslog.3.gz
-rw-r--r-- 1 admin admin    0 Jul 25 17:17 syslog.5.gz
-rw-r--r-- 1 admin admin    0 Jul 25 17:17 syslog.4.gz
-rw-r--r-- 1 admin admin    0 Jul 25 17:17 syslog.6.gz
-rw-r--r-- 1 admin admin    0 Jul 25 17:17 syslog.7.gz
-rw-r--r-- 1 admin admin    0 Jul 25 17:17 syslog.9.gz
-rw-r--r-- 1 admin admin    0 Jul 25 17:17 syslog.8.gz
-rw-r--r-- 1 admin admin    0 Jul 25 17:17 syslog.10.gz
-rw-r--r-- 1 admin admin    0 Jul 25 17:17 syslog.11.gz
-rw-r--r-- 1 admin admin    0 Jul 25 17:17 syslog.12.gz
-rw-r--r-- 1 admin admin    0 Jul 25 17:17 syslog.13.gz
-rw-r--r-- 1 admin admin    0 Jul 25 17:17 syslog.14.gz
-rw-r--r-- 1 admin admin    0 Jul 25 17:17 syslog.15.gz
-rw-r--r-- 1 admin admin    0 Jul 25 17:17 syslog.16.gz
-rw-r--r-- 1 admin admin    0 Jul 25 17:17 syslog.17.gz
-rw-r--r-- 1 admin admin    0 Jul 25 17:17 syslog.18.gz
-rw-r--r-- 1 admin admin    0 Jul 25 17:17 syslog.19.gz
-rw-r--r-- 1 admin admin    0 Jul 25 17:17 syslog.20.gz
-rw-r--r-- 1 admin admin    0 Jul 25 17:17 syslog.21.gz
-rw-r--r-- 1 admin admin    0 Jul 25 17:17 syslog.22.gz
-rw-r--r-- 1 admin admin    0 Jul 25 17:17 syslog.23.gz
-rw-r--r-- 1 admin admin    0 Jul 25 17:17 syslog.24.gz
-rw-r--r-- 1 admin admin    0 Jul 25 17:17 syslog.25.gz
-rw-r--r-- 1 admin admin    0 Jul 25 17:17 syslog.26.gz
-rw-r--r-- 1 admin admin    0 Jul 25 17:17 syslog.27.gz
-rw-r--r-- 1 admin admin    0 Jul 25 17:17 syslog.28.gz
-rw-r--r-- 1 admin admin    0 Jul 25 17:17 syslog.29.gz
-rw-r--r-- 1 admin admin    0 Jul 25 17:17 syslog.30.gz
drwxr-xr-x 2 admin admin 4.0K Jul 25 17:17 .

The script:

admin@sonic:~/testpipe$ cat sort_test.sh
#!/usr/bin/bash

SORTED_ARCHIVE_FILES=$(find ./var/log -type f -printf '%T+ %p\n' | grep -E '.+\.[0-9]+(\.gz)?$' | sort )
OLDEST_ARCHIVE_FILE=$(echo "${SORTED_ARCHIVE_FILES}" | awk 'NR == 1 { print $2; }')
echo $OLDEST_ARCHIVE_FILE



The output:

admin@sonic:~/testpipe$ ./sort_test.sh
./var/log/syslog.1.gz
---
 files/image_config/logrotate/rsyslog.j2 | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/files/image_config/logrotate/rsyslog.j2 b/files/image_config/logrotate/rsyslog.j2
index 77d950eb4..4c40da24d 100644
--- a/files/image_config/logrotate/rsyslog.j2
+++ b/files/image_config/logrotate/rsyslog.j2
@@ -85,7 +85,7 @@
             if [ $USED_KB -lt $THRESHOLD_KB ]; then
                 break
             else
-                OLDEST_ARCHIVE_FILE=$(find /var/log -type f -printf '%T+ %p\n' | grep -E '.+\.[0-9]+(\.gz)?$' | sort | head -n 1 | awk '{ print $2; }')
+                OLDEST_ARCHIVE_FILE=$(find /var/log -type f -printf '%T+ %p\n' | grep -E '.+\.[0-9]+(\.gz)?$' | sort  | awk 'NR == 1 {print $2}')
 
                 if [ -z "$OLDEST_ARCHIVE_FILE" ]; then
                     logger -p syslog.err -t "logrotate" "No archive file to delete -- potential for filling up /var/log partition!"

From 11af27d154598e0390f4c369a96edf2216fef2e3 Mon Sep 17 00:00:00 2001
From: Stephen Sun <5379172+stephenxs@users.noreply.github.com>
Date: Sat, 27 Jul 2024 08:34:40 +0800
Subject: [PATCH 0860/1115] Support yang model for buffer pool percentage
 (#19358)

#### Why I did it

Support yang model for `percentage` field in `BUFFER_POOL` table.
It is used in dynamic buffer model only and represents the percentage of a buffer pool's size compared to the available memory size

#### How I did it

#### How to verify it

Unit test and manual test
---
 src/sonic-yang-models/doc/Configuration.md    |  4 +-
 .../tests/files/sample_config_db.json         |  6 ++
 .../yang_model_tests/tests/buffer_pool.json   | 18 ++++
 .../tests_config/buffer_pool.json             | 85 +++++++++++++++++++
 .../yang-models/sonic-buffer-pool.yang        | 18 ++++
 5 files changed, 130 insertions(+), 1 deletion(-)

diff --git a/src/sonic-yang-models/doc/Configuration.md b/src/sonic-yang-models/doc/Configuration.md
index 088b4e545..3c2401597 100644
--- a/src/sonic-yang-models/doc/Configuration.md
+++ b/src/sonic-yang-models/doc/Configuration.md
@@ -573,6 +573,7 @@ When the system is running in traditional buffer model, the size of all of the b
 ```
 
 When the system is running in dynamic buffer model, the size of some of the buffer pools can be omitted and will be dynamically calculated.
+In this case, A percentage can be configured on a pool, representing how many the available buffer can be allloced to the pool.
 
 ```
 {
@@ -584,11 +585,12 @@ When the system is running in dynamic buffer model, the size of some of the buff
     },
     "egress_lossy_pool": {
         "type": "egress",
-        "mode": "dynamic",
+        "mode": "dynamic"
     },
     "ingress_lossless_pool": {
         "type": "ingress",
         "mode": "dynamic",
+        "percentage": "80"
     }
   }
 }
diff --git a/src/sonic-yang-models/tests/files/sample_config_db.json b/src/sonic-yang-models/tests/files/sample_config_db.json
index 8ebb1d655..534a0d986 100644
--- a/src/sonic-yang-models/tests/files/sample_config_db.json
+++ b/src/sonic-yang-models/tests/files/sample_config_db.json
@@ -36,6 +36,11 @@
                 "size": "12766208",
                 "type": "egress",
                 "mode": "dynamic"
+            },
+            "ingress_percentage_pool": {
+                "type": "ingress",
+                "mode": "dynamic",
+                "percentage": "90"
             }
         },
         "BUFFER_PROFILE": {
@@ -351,6 +356,7 @@
         },
         "DEVICE_METADATA": {
             "localhost": {
+                "buffer_model": "dynamic",
                 "type": "ToRRouter",
                 "asic_id": "06:00.0",
                 "mac": "00:11:22:33:dd:5a",
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/buffer_pool.json b/src/sonic-yang-models/tests/yang_model_tests/tests/buffer_pool.json
index 974ece55d..ff35fc735 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests/buffer_pool.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests/buffer_pool.json
@@ -39,5 +39,23 @@
     "BUFFER_POOL_WRONG_SIZE_VALUE": {
         "desc": "BUFFER_POOL_WRONG_SIZE_VALUE pattern failure.",
         "eStr": "wrong"
+    },
+    "BUFFER_POOL_CORRECT_PERCENTAGE_VALUE": {
+        "desc": "BUFFER_POOL_CORRECT_PERCENTAGE_VALUE no failure."
+    },
+    "BUFFER_POOL_CORRECT_LARGE_PERCENTAGE_VALUE": {
+        "desc": "BUFFER_POOL_CORRECT_PERCENTAGE_VALUE no failure."
+    },
+    "BUFFER_POOL_WRONG_PERCENTAGE_NEGATIVE_VALUE": {
+        "desc": "BUFFER_POOL_WRONG_PERCENTAGE_NEGATIVE_VALUE pattern failure.",
+        "eStr": "Invalid value"
+    },
+    "BUFFER_POOL_WRONG_PERCENTAGE_NOT_A_NUMBER_VALUE": {
+        "desc": "BUFFER_POOL_WRONG_PERCENTAGE_NOT_A_NUMBER_VALUE pattern failure.",
+        "eStr": "Invalid value"
+    },
+    "BUFFER_POOL_WRONG_PERCENTAGE_VALUE_WITH_SIZE": {
+        "desc": "BUFFER_POOL_WRONG_PERCENTAGE_VALUE_WITH_SIZE pattern failure.",
+        "eStr": "Percentage should not be configured along with size"
     }
 }
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/buffer_pool.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/buffer_pool.json
index a2a4d6fc1..47ce26357 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/buffer_pool.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/buffer_pool.json
@@ -167,5 +167,90 @@
                 ]
             }
         }
+    },
+    "BUFFER_POOL_CORRECT_PERCENTAGE_VALUE": {
+        "sonic-device_metadata:sonic-device_metadata": {
+            "sonic-device_metadata:DEVICE_METADATA": {
+                "localhost":{
+                        "buffer_model": "dynamic"
+                }
+            }
+        },
+        "sonic-buffer-pool:sonic-buffer-pool": {
+            "sonic-buffer-pool:BUFFER_POOL": {
+                "BUFFER_POOL_LIST": [
+                {
+                    "name": "ingress_lossless_pool",
+                    "mode": "dynamic",
+                    "percentage": "99",
+                    "type": "ingress"
+                }
+                ]
+            }
+        }
+    },
+    "BUFFER_POOL_CORRECT_LARGE_PERCENTAGE_VALUE": {
+        "sonic-device_metadata:sonic-device_metadata": {
+            "sonic-device_metadata:DEVICE_METADATA": {
+                "localhost":{
+                        "buffer_model": "dynamic"
+                }
+            }
+        },
+        "sonic-buffer-pool:sonic-buffer-pool": {
+            "sonic-buffer-pool:BUFFER_POOL": {
+                "BUFFER_POOL_LIST": [
+                {
+                    "name": "ingress_lossless_pool",
+                    "mode": "dynamic",
+                    "percentage": "200",
+                    "type": "ingress"
+                }
+                ]
+            }
+        }
+    },
+    "BUFFER_POOL_WRONG_PERCENTAGE_NEGATIVE_VALUE": {
+        "sonic-buffer-pool:sonic-buffer-pool": {
+            "sonic-buffer-pool:BUFFER_POOL": {
+                "BUFFER_POOL_LIST": [
+                {
+                    "name": "ingress_lossless_pool",
+                    "mode": "static",
+                    "percentage": "-10",
+                    "type": "ingress"
+                }
+                ]
+            }
+        }
+    },
+    "BUFFER_POOL_WRONG_PERCENTAGE_NOT_A_NUMBER_VALUE": {
+        "sonic-buffer-pool:sonic-buffer-pool": {
+            "sonic-buffer-pool:BUFFER_POOL": {
+                "BUFFER_POOL_LIST": [
+                {
+                    "name": "ingress_lossless_pool",
+                    "mode": "static",
+                    "percentage": "NaN",
+                    "type": "ingress"
+                }
+                ]
+            }
+        }
+    },
+    "BUFFER_POOL_WRONG_PERCENTAGE_VALUE_WITH_SIZE": {
+        "sonic-buffer-pool:sonic-buffer-pool": {
+            "sonic-buffer-pool:BUFFER_POOL": {
+                "BUFFER_POOL_LIST": [
+                {
+                    "name": "ingress_lossless_pool",
+                    "mode": "static",
+                    "percentage": "90",
+                    "size": "12766208",
+                    "type": "ingress"
+                }
+                ]
+            }
+        }
     }
 }
diff --git a/src/sonic-yang-models/yang-models/sonic-buffer-pool.yang b/src/sonic-yang-models/yang-models/sonic-buffer-pool.yang
index dd8c74c13..174e6b2a0 100644
--- a/src/sonic-yang-models/yang-models/sonic-buffer-pool.yang
+++ b/src/sonic-yang-models/yang-models/sonic-buffer-pool.yang
@@ -2,6 +2,10 @@ module sonic-buffer-pool {
     namespace "http://github.com/sonic-net/sonic-buffer-pool";
     prefix bpl;
 
+    import sonic-device_metadata {
+        prefix device_metadata;
+    }
+
     organization
         "SONiC";
 
@@ -57,6 +61,20 @@ module sonic-buffer-pool {
                     type uint64;
                     description "Buffer Pool Xoff Threshold (in Bytes)";
                 }
+
+                leaf percentage {
+                    type uint8;
+                    description "
+                        Buffer Pool percentage.
+                        The buffer pool size will be available_buffer * percentage / 100 if percentage is provided.
+                        It is valid in dynamic buffer model only.";
+                    must "(not(current()/../size))" {
+                        error-message "Percentage should not be configured along with size";
+                    }
+                    must "/device_metadata:sonic-device_metadata/device_metadata:DEVICE_METADATA/device_metadata:localhost/device_metadata:buffer_model = 'dynamic'" {
+                        error-message "Percentage must be configured in dynamic buffer model";
+                    }
+                }
             }
         }
     }

From fee869234aaf89df1b2f979d8d1e143c067682d9 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sat, 27 Jul 2024 19:04:06 +0800
Subject: [PATCH 0861/1115] [submodule] Update submodule sonic-utilities to the
 latest HEAD automatically (#19720)

#### Why I did it
src/sonic-utilities
```
* 84cb00a4 - (HEAD -> master, origin/master, origin/HEAD) Change the default behavior of show ip bgp network (#3447) (11 hours ago) [Changrong Wu]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-utilities | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-utilities b/src/sonic-utilities
index 9b24421aa..84cb00a4b 160000
--- a/src/sonic-utilities
+++ b/src/sonic-utilities
@@ -1 +1 @@
-Subproject commit 9b24421aacaaa496f65fbab39e918283886205e5
+Subproject commit 84cb00a4b2d7e8fb2bcab259367836fa11a17d0a

From 9ed57bc1d887fd20e9b9e6b0c92a9110ecdcbc15 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sat, 27 Jul 2024 19:04:11 +0800
Subject: [PATCH 0862/1115] [submodule] Update submodule sonic-linux-kernel to
 the latest HEAD automatically (#19719)

#### Why I did it
src/sonic-linux-kernel
```
* b9ac5dd - (HEAD -> master, origin/master, origin/HEAD) [Micas] Enable CONFIG_SENSORS_ISL68137 and CONFIG_SENSORS_INA3221 (#417) (4 hours ago) [Philo]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-linux-kernel | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-linux-kernel b/src/sonic-linux-kernel
index 98e4af96b..b9ac5ddff 160000
--- a/src/sonic-linux-kernel
+++ b/src/sonic-linux-kernel
@@ -1 +1 @@
-Subproject commit 98e4af96b65564b161e1fd66f31323121f56b302
+Subproject commit b9ac5ddff682490432c080562670888128f0a2b6

From 3ff9f4fa06603101605fab64d79e56a722b830ba Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sun, 28 Jul 2024 19:04:40 +0800
Subject: [PATCH 0863/1115] [submodule] Update submodule sonic-sairedis to the
 latest HEAD automatically (#19721)

#### Why I did it
src/sonic-sairedis
```
* 8d0f5ebf - (HEAD -> master, origin/master, origin/HEAD) Moving SAI failure dump handling above the ignore for non temp view (#1402) (14 hours ago) [Sudharsan Dhamal Gopalarathnam]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-sairedis | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-sairedis b/src/sonic-sairedis
index a988dd1b7..8d0f5ebf0 160000
--- a/src/sonic-sairedis
+++ b/src/sonic-sairedis
@@ -1 +1 @@
-Subproject commit a988dd1b7b9044fd7ca859ecdfa1eb858cc3ea08
+Subproject commit 8d0f5ebf0163c4d5a68190e9af4ea9ceb7ba987a

From 66e491dc60b614c820fbce4f52694daad5d7875c Mon Sep 17 00:00:00 2001
From: Yuanzhe <150663541+yuazhe@users.noreply.github.com>
Date: Mon, 29 Jul 2024 14:19:46 +0800
Subject: [PATCH 0864/1115] [Mellanox] fix sfp eeprom unreadable after
 switching from SW to FW control mode (#19563)

- Why I did it
The reading of eeprom instantly after switch the module from sw control to fw control might fail, so add a delay

Signed-off-by: Yuanzhe, Liu <yualiu@nvidia.com>
---
 .../sonic_platform/chassis.py                  |  4 +++-
 .../mlnx-platform-api/sonic_platform/sfp.py    | 18 +++++++++++++++++-
 2 files changed, 20 insertions(+), 2 deletions(-)

diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/chassis.py b/platform/mellanox/mlnx-platform-api/sonic_platform/chassis.py
index a616b28e0..1db831f58 100644
--- a/platform/mellanox/mlnx-platform-api/sonic_platform/chassis.py
+++ b/platform/mellanox/mlnx-platform-api/sonic_platform/chassis.py
@@ -499,16 +499,18 @@ def get_change_event_for_module_host_management_mode(self, timeout):
                     s.on_event(event)
                     
                 if s.in_stable_state():
+                    self.sfp_module.SFP.wait_sfp_eeprom_ready([s], 2)
                     s.fill_change_event(port_dict)
                     s.refresh_poll_obj(self.poll_obj, self.registered_fds)
                 else:
                     logger.log_debug(f'SFP {sfp_index} does not reach stable state, state={s.state}')
-                                        
+                    
             ready_sfp_set = wait_ready_task.get_ready_set()
             for sfp_index in ready_sfp_set:
                 s = self._sfp_list[sfp_index]
                 s.on_event(sfp.EVENT_RESET_DONE)
                 if s.in_stable_state():
+                    self.sfp_module.SFP.wait_sfp_eeprom_ready([s], 2)
                     s.fill_change_event(port_dict)
                     s.refresh_poll_obj(self.poll_obj, self.registered_fds)
                 else:
diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py b/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py
index 8ced4a08d..342dff2b6 100644
--- a/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py
+++ b/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py
@@ -500,6 +500,21 @@ def get_presence(self):
             return False
         eeprom_raw = self._read_eeprom(0, 1, log_on_error=False)
         return eeprom_raw is not None
+    
+    @classmethod
+    def wait_sfp_eeprom_ready(cls, sfp_list, wait_time):
+        not_ready_list = sfp_list
+        
+        while wait_time > 0:
+            not_ready_list = [s for s in not_ready_list if s.state == STATE_FW_CONTROL and s._read_eeprom(0, 2,False) is None]
+            if not_ready_list:
+                time.sleep(0.1)
+                wait_time -= 0.1
+            else:
+                return
+        
+        for s in not_ready_list:
+            logger.log_error(f'SFP {s.sdk_index} eeprom is not ready')
 
     # read eeprom specfic bytes beginning from offset with size as num_bytes
     def read_eeprom(self, offset, num_bytes):
@@ -1723,7 +1738,8 @@ def initialize_sfp_modules(cls, sfp_list):
                 logger.log_error(f'SFP {index} is not in stable state after initializing, state={s.state}')
             logger.log_notice(f'SFP {index} is in state {s.state} after module initialization')
 
-
+        cls.wait_sfp_eeprom_ready(sfp_list, 2)
+        
 class RJ45Port(NvidiaSFPCommon):
     """class derived from SFP, representing RJ45 ports"""
 

From 02131809b54f043e524a3786f982965d86c397ff Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Mon, 29 Jul 2024 16:01:23 +0800
Subject: [PATCH 0865/1115] [submodule] Update submodule sonic-host-services to
 the latest HEAD automatically (#19665)

#### Why I did it
src/sonic-host-services
```
* ca6b3cd - (HEAD -> master, origin/master, origin/HEAD) Fix security vulnerability in caclmgrd (#139) (5 days ago) [Zhaohui Sun]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-host-services | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-host-services b/src/sonic-host-services
index cfb3cb89a..ca6b3cdb9 160000
--- a/src/sonic-host-services
+++ b/src/sonic-host-services
@@ -1 +1 @@
-Subproject commit cfb3cb89aff003290db547b78657528d0f20914c
+Subproject commit ca6b3cdb9a56604765ada4ac67234c117f0fb5ad

From d0d8b9f84083e545857749605ea7cf9a342a1f39 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Wed, 31 Jul 2024 19:00:59 +0800
Subject: [PATCH 0866/1115] [submodule] Update submodule sonic-utilities to the
 latest HEAD automatically (#19742)

#### Why I did it
src/sonic-utilities
```
* ff2c73f8 - (HEAD -> master, origin/master, origin/HEAD) Add namespace check for multiasic (#3458) (4 hours ago) [Xincun Li]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-utilities | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-utilities b/src/sonic-utilities
index 84cb00a4b..ff2c73f85 160000
--- a/src/sonic-utilities
+++ b/src/sonic-utilities
@@ -1 +1 @@
-Subproject commit 84cb00a4b2d7e8fb2bcab259367836fa11a17d0a
+Subproject commit ff2c73f85ca24dea2634dc5ec83956f27ab9e32b

From 4e78b11c96192d3c1e4332d5bca9c415ad7c1c9d Mon Sep 17 00:00:00 2001
From: Vivek <vkarri@nvidia.com>
Date: Wed, 31 Jul 2024 08:17:46 -0700
Subject: [PATCH 0867/1115] [Mellanox] Avoid attaching lossless buffer profiles
 for internal ports (#18978)

[Mellanox] Avoid attaching lossless buffer profiles for internal ports (#18978)

Signed-off-by: Vivek Reddy <vkarri@nvidia.com>
---
 .../Mellanox-SN4700-O28/buffers.json.j2       |    2 +-
 .../buffers_defaults_objects.j2               |  436 ++++++-
 .../buffers_defaults_t0.j2                    |   39 +-
 .../buffers_defaults_t1.j2                    |   39 +-
 .../buffers_dynamic.json.j2                   |    2 +-
 .../Mellanox-SN4700-O28/pg_profile_lookup.ini |    2 +-
 .../Mellanox-SN4700-O28/port_config.ini       |    2 +-
 files/build_templates/buffers_config.j2       |    9 +-
 files/build_templates/qos_config.j2           |   27 +-
 src/sonic-config-engine/tests/common_utils.py |   15 +
 ...mellanox-4700-t1-minigraph-smartswitch.xml | 1082 +++++++++++++++++
 .../qos-mellanox4700-o28-t1-smartswitch.json  |  814 +++++++++++++
 ...s-mellanox4700-o28-t1-smartswitch_dyn.json |  870 +++++++++++++
 src/sonic-config-engine/tests/test_j2files.py |   52 +
 14 files changed, 3378 insertions(+), 13 deletions(-)
 mode change 120000 => 100644 device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/buffers_defaults_objects.j2
 mode change 120000 => 100644 device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/buffers_defaults_t0.j2
 mode change 120000 => 100644 device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/buffers_defaults_t1.j2
 create mode 100644 src/sonic-config-engine/tests/sample-mellanox-4700-t1-minigraph-smartswitch.xml
 create mode 100644 src/sonic-config-engine/tests/sample_output/py3/qos-mellanox4700-o28-t1-smartswitch.json
 create mode 100644 src/sonic-config-engine/tests/sample_output/py3/qos-mellanox4700-o28-t1-smartswitch_dyn.json

diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/buffers.json.j2 b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/buffers.json.j2
index add8bf8bb..b57f1dc31 120000
--- a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/buffers.json.j2
+++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/buffers.json.j2
@@ -1 +1 @@
-../../x86_64-mlnx_msn2700-r0/ACS-MSN2700/buffers.json.j2
\ No newline at end of file
+../Mellanox-SN4700-O8C48/buffers.json.j2
\ No newline at end of file
diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/buffers_defaults_objects.j2 b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/buffers_defaults_objects.j2
deleted file mode 120000
index 33b6704f9..000000000
--- a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/buffers_defaults_objects.j2
+++ /dev/null
@@ -1 +0,0 @@
-../../x86_64-mlnx_msn2700-r0/ACS-MSN2700/buffers_defaults_objects.j2
\ No newline at end of file
diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/buffers_defaults_objects.j2 b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/buffers_defaults_objects.j2
new file mode 100644
index 000000000..20273084f
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/buffers_defaults_objects.j2
@@ -0,0 +1,435 @@
+{#
+    Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+    Apache-2.0
+
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+
+    http://www.apache.org/licenses/LICENSE-2.0
+
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+#}
+
+{% set PORT_DPC = [] %}
+{%- for port in PORT %}
+    {%- if 'role' in PORT[port] and PORT[port]['role'] == 'Dpc' %}
+        {%- if PORT_DPC.append(port) %}{%- endif %}
+    {%- endif %}
+{%- endfor %}
+
+{% set PROFILE_PORT_MAP = {
+    "BUFFER_PORT_INGRESS_PROFILE_LIST": {
+        "Dpc": {
+            "active": {
+                "dynamic": "ingress_lossy_profile",
+                "static": "ingress_lossy_profile"
+            },
+            "inactive": {
+                "dynamic": "ingress_lossy_profile",
+                "static": "ingress_lossy_zero_profile"
+            }
+        },
+        "Ext": {
+            "active": {
+                "dynamic": "ingress_lossless_profile",
+                "static": "ingress_lossless_profile"
+            },
+            "inactive": {
+                "dynamic": "ingress_lossless_profile",
+                "static": "ingress_lossless_zero_profile"
+            }
+        }
+    },
+    "BUFFER_PORT_EGRESS_PROFILE_LIST": {
+        "Dpc": {
+            "active": {
+                "dynamic": "egress_lossy_profile",
+                "static": "egress_lossy_profile"
+            },
+            "inactive": {
+                "dynamic": "egress_lossy_profile",
+                "static": "egress_lossy_zero_profile"
+            }
+        },
+        "Ext": {
+            "active": {
+                "dynamic": "egress_lossless_profile,egress_lossy_profile",
+                "static": "egress_lossless_profile,egress_lossy_profile"
+            },
+            "inactive": {
+                "dynamic": "egress_lossless_profile,egress_lossy_profile",
+                "static": "egress_lossless_zero_profile,egress_lossy_zero_profile"
+            }
+        }
+    },
+    "BUFFER_QUEUE": {
+        "Dpc": {
+            "active": {
+                "dynamic": "q_lossy_profile",
+                "static": "q_lossy_profile"
+            },
+            "inactive": {
+                "dynamic": "q_lossy_profile",
+                "static": "egress_lossy_zero_profile"
+            }
+        },
+        "Ext": {
+            "active": {
+                "dynamic": "egress_lossless_profile",
+                "static": "egress_lossless_profile"
+            },
+            "inactive": {
+                "dynamic": "egress_lossless_profile",
+                "static": "egress_lossless_zero_profile"
+            }
+        }
+    },
+    "BUFFER_PG": {
+        "Dpc": {
+            "active": {
+                "dynamic": "ingress_lossy_profile",
+                "static": "ingress_lossy_profile"
+            },
+            "inactive": {
+                "dynamic": "ingress_lossy_profile",
+                "static": "ingress_lossy_pg_zero_profile"
+            }
+        },
+        "Ext": {
+            "active": {
+                "dynamic": "NULL"
+            },
+            "inactive": {
+                "dynamic": "ingress_lossy_profile",
+                "static": "ingress_lossy_pg_zero_profile"
+            }
+        }
+    }
+} %}
+
+{%- macro find_profile_to_attach(table, port, active_status, dynamic_status) -%}
+{% if port in PORT_DPC %}
+"{{PROFILE_PORT_MAP[table]['Dpc'][active_status][dynamic_status]}}"
+{% else %}
+"{{PROFILE_PORT_MAP[table]['Ext'][active_status][dynamic_status]}}"
+{% endif %}
+{%- endmacro %}
+
+{%- macro generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) %}
+    "BUFFER_POOL": {
+        {% if dynamic_mode is not defined and port_names_inactive|length > 0 -%}
+        "ingress_zero_pool" : {
+            "mode": "static",
+            "type": "ingress",
+            "size": "0"
+        },
+        {% endif -%}
+        "ingress_lossless_pool": {
+            {% if dynamic_mode is not defined -%}
+            "size": "{{ ingress_lossless_pool_size }}",
+            "xoff": "{{ ingress_lossless_pool_xoff }}",
+            {% endif -%}
+            "type": "ingress",
+            "mode": "dynamic"
+        },
+        "egress_lossless_pool": {
+            "size": "{{ egress_lossless_pool_size }}",
+            "type": "egress",
+            "mode": "dynamic"
+        },
+        "egress_lossy_pool": {
+            {% if dynamic_mode is not defined -%}
+            "size": "{{ egress_lossy_pool_size }}",
+            {% endif -%}
+            "type": "egress",
+            "mode": "dynamic"
+        }
+    },
+    "BUFFER_PROFILE": {
+        {% if dynamic_mode is not defined and port_names_inactive|length > 0 -%}
+        "ingress_lossy_pg_zero_profile" : {
+          "pool":"ingress_zero_pool",
+          "size":"0",
+          "static_th":"0"
+        },
+        "ingress_lossless_zero_profile" : {
+          "pool":"ingress_lossless_pool",
+          "size":"0",
+          "dynamic_th":"-8"
+        },
+        "egress_lossless_zero_profile" : {
+          "pool":"egress_lossless_pool",
+          "size":"0",
+          "dynamic_th":"-8"
+        },
+        "egress_lossy_zero_profile" : {
+          "pool":"egress_lossy_pool",
+          "size":"0",
+          "dynamic_th":"-8"
+        },
+        {% endif -%}
+        "ingress_lossless_profile": {
+            "pool":"ingress_lossless_pool",
+            "size":"0",
+            "dynamic_th":"7"
+        },
+        "ingress_lossy_profile": {
+            "pool":"ingress_lossless_pool",
+            "size":"0",
+            "dynamic_th":"3"
+        },
+        "egress_lossless_profile": {
+            "pool":"egress_lossless_pool",
+            "size":"0",
+            "dynamic_th":"7"
+        },
+        "egress_lossy_profile": {
+            "pool":"egress_lossy_pool",
+            "size":"9216",
+            "dynamic_th":"7"
+        },
+        "q_lossy_profile": {
+            "pool":"egress_lossy_pool",
+            "size":"0",
+            "dynamic_th":"3"
+        }
+    },
+{%- endmacro %}
+
+{%- macro generate_profile_lists(port_names_active, port_names_inactive) %}
+    "BUFFER_PORT_INGRESS_PROFILE_LIST": {
+{% for port in port_names_active.split(',') %}
+        "{{ port }}": {
+            "profile_list" : {{find_profile_to_attach('BUFFER_PORT_INGRESS_PROFILE_LIST', port, 'active', 'static')}}
+        }{% if not loop.last %},{% endif %}
+
+{% endfor %}
+{% if port_names_inactive|length > 0 %}
+,
+{% for port in port_names_inactive.split(',') %}
+        "{{ port }}": {
+{% if dynamic_mode is defined %}
+            "profile_list" : {{find_profile_to_attach('BUFFER_PORT_INGRESS_PROFILE_LIST', port, 'inactive', 'dynamic')}}
+{% else %}
+            "profile_list" : {{find_profile_to_attach('BUFFER_PORT_INGRESS_PROFILE_LIST', port, 'inactive', 'static')}}
+{% endif %}
+        }{% if not loop.last %},{% endif %}
+
+{% endfor %}
+{% endif %}
+    },
+    "BUFFER_PORT_EGRESS_PROFILE_LIST": {
+{% for port in port_names_active.split(',') %}
+        "{{ port }}": {
+            "profile_list" : {{find_profile_to_attach('BUFFER_PORT_EGRESS_PROFILE_LIST', port, 'active', 'static')}}
+        }{% if not loop.last %},{% endif %}
+
+{% endfor %}
+{% if port_names_inactive|length > 0 %}
+,
+{% for port in port_names_inactive.split(',') %}
+        "{{ port }}": {
+{% if dynamic_mode is defined %}
+            "profile_list" : {{find_profile_to_attach('BUFFER_PORT_EGRESS_PROFILE_LIST', port, 'inactive', 'dynamic')}}
+{% else %}
+            "profile_list" : {{find_profile_to_attach('BUFFER_PORT_EGRESS_PROFILE_LIST', port, 'inactive', 'static')}}
+{% endif %}
+        }{% if not loop.last %},{% endif %}
+
+{% endfor %}
+{% endif %}
+    }
+{%- endmacro %}
+
+{%- macro generate_queue_buffers_with_extra_lossless_queues(port_names_active, port_names_extra_queues, port_names_inactive) %}
+    "BUFFER_QUEUE": {
+{% set q_loop = namespace(last_valid=false) %}
+{% for port in port_names_active.split(',') %}
+{% if port not in port_names_extra_queues.split(',') %}
+        "{{ port }}|3-4": {
+            "profile" : {{find_profile_to_attach('BUFFER_QUEUE', port, 'active', 'static')}}
+        },
+{% endif %}
+{% endfor %}
+{% for port in port_names_active.split(',') %}
+{% if port not in port_names_extra_queues.split(',') %}
+        "{{ port }}|0-2": {
+            "profile" : "q_lossy_profile"
+        },
+{% endif %}
+{% endfor %}
+{% for port in port_names_active.split(',') %}
+{% if port not in port_names_extra_queues.split(',') %}
+{% if port_names_extra_queues|length > 0 %}
+        "{{ port }}|5-7": {
+{% else %}
+        "{{ port }}|5-6": {
+{% endif %}
+            "profile" : "q_lossy_profile"
+        }{% if not loop.last %},{% endif %}
+
+{% set q_loop.last_valid = true %}
+{% else %}
+{% set q_loop.last_valid = false %}
+{% endif %}
+{% endfor %}
+{% if port_names_extra_queues|length > 0 %}
+{% if q_loop.last_valid %},{% endif %}
+{% for port in port_names_extra_queues.split(',') %}
+        "{{ port }}|0-1": {
+            "profile" : "q_lossy_profile"
+        },
+        "{{ port }}|2-4": {
+            "profile" : "egress_lossless_profile"
+        },
+        "{{ port }}|5": {
+            "profile" : "q_lossy_profile"
+        },
+        "{{ port }}|6": {
+            "profile" : "egress_lossless_profile"
+        },
+        "{{ port }}|7": {
+            "profile" : "q_lossy_profile"
+        }{% if not loop.last %},{% endif %}
+
+{% endfor %}
+{% endif %}
+{% if port_names_inactive|length > 0 %}
+,
+{% if dynamic_mode is defined %}
+{% for port in port_names_inactive.split(',') %}
+        "{{ port }}|3-4": {
+            "profile" : {{find_profile_to_attach('BUFFER_QUEUE', port, 'inactive', 'dynamic')}}
+        },
+{% endfor %}
+{% for port in port_names_inactive.split(',') %}
+        "{{ port }}|0-2": {
+            "profile" : "q_lossy_profile"
+        },
+{% endfor %}
+{% for port in port_names_inactive.split(',') %}
+{% if port_names_extra_queues|length > 0 %}
+        "{{ port }}|5-7": {
+{% else %}
+        "{{ port }}|5-6": {
+{% endif %}
+            "profile" : "q_lossy_profile"
+        }{% if not loop.last %},{% endif %}
+
+{% endfor %}
+{% else %}
+{% for port in port_names_inactive.split(',') %}
+        "{{ port }}|3-4": {
+            "profile" : {{find_profile_to_attach('BUFFER_QUEUE', port, 'inactive', 'static')}}
+        },
+{% endfor %}
+{% for port in port_names_inactive.split(',') %}
+        "{{ port }}|0-2": {
+            "profile" : "egress_lossy_zero_profile"
+        },
+{% endfor %}
+{% for port in port_names_inactive.split(',') %}
+{% if port_names_extra_queues|length > 0 %}
+        "{{ port }}|5-7": {
+{% else %}
+        "{{ port }}|5-6": {
+{% endif %}
+            "profile" : "egress_lossy_zero_profile"
+        }{% if not loop.last %},{% endif %}
+
+{% endfor %}
+{% endif %}
+{% endif %}
+    }
+{%- endmacro %}
+
+{%- macro generate_queue_buffers(port_names_active, port_names_inactive) %}
+{{ generate_queue_buffers_with_extra_lossless_queues(port_names_active, "", port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_pg_profiles_with_extra_lossless_pgs(port_names_active, port_names_extra_pgs, port_names_inactive) %}
+    "BUFFER_PG": {
+{% set pg_loop = namespace(last_valid=false) %}
+{% for port in port_names_active.split(',') %}
+{% if port not in port_names_extra_pgs.split(',') %}
+{% if dynamic_mode is defined %}
+        "{{ port }}|3-4": {
+            "profile" : {{find_profile_to_attach('BUFFER_PG', port, 'active', 'dynamic')}}
+        },
+{% else %}
+{% if port in PORT_DPC %}
+        "{{ port }}|3-4": {
+            "profile" : {{find_profile_to_attach('BUFFER_PG', port, 'active', 'static')}}
+        },
+{% endif %}
+{% endif %}
+        "{{ port }}|0": {
+            "profile" : "ingress_lossy_profile"
+        }{% if not loop.last %},{% endif %}
+
+{% set pg_loop.last_valid = true %}
+{% else %}
+{% set pg_loop.last_valid = false %}
+{% endif %}
+{% endfor %}
+{% if port_names_extra_pgs|length > 0 %}
+{% if pg_loop.last_valid %},{% endif %}
+{% for port in port_names_extra_pgs.split(',') %}
+{% if dynamic_mode is defined %}
+        "{{ port }}|2-4": {
+            "profile" : {{find_profile_to_attach('BUFFER_PG', port, 'active', 'dynamic')}}
+        },
+        "{{ port }}|6": {
+            "profile" : {{find_profile_to_attach('BUFFER_PG', port, 'active', 'dynamic')}}
+        },
+{% else %}
+{% if port in PORT_DPC %}
+        "{{ port }}|2-4": {
+            "profile" : {{find_profile_to_attach('BUFFER_PG', port, 'active', 'static')}}
+        },
+        "{{ port }}|6": {
+            "profile" : {{find_profile_to_attach('BUFFER_PG', port, 'active', 'static')}}
+        },
+{% endif %}
+{% endif %}
+        "{{ port }}|0": {
+            "profile" : "ingress_lossy_profile"
+        }{% if not loop.last %},{% endif %}
+
+{% endfor %}
+{% endif %}
+{% if port_names_inactive|length > 0 %}
+{%- for port in port_names_inactive.split(',') %}
+       {%- if loop.first -%},{%- endif -%}
+{% if dynamic_mode is defined %}
+        "{{ port }}|3-4": {
+            "profile" : {{find_profile_to_attach('BUFFER_PG', port, 'inactive', 'dynamic')}}
+        },
+{% else %}
+{% if port in PORT_DPC %}
+        "{{ port }}|3-4": {
+            "profile" : {{find_profile_to_attach('BUFFER_PG', port, 'inactive', 'static')}}
+        },
+{% endif %}
+{% endif %}
+       "{{ port }}|0": {
+{% if dynamic_mode is defined %}
+            "profile" : "ingress_lossy_profile"
+{% else %}
+            "profile" : "ingress_lossy_pg_zero_profile"
+{% endif %}
+        }{% if not loop.last %},{% endif %}
+
+{% endfor %}
+{% endif %}
+    }
+{%- endmacro %}
+
+{%- macro generate_pg_profiles(port_names_active, port_names_inactive) %}
+{{ generate_pg_profiles_with_extra_lossless_pgs(port_names_active, "", port_names_inactive) }}
+{%- endmacro %}
diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/buffers_defaults_t0.j2 b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/buffers_defaults_t0.j2
deleted file mode 120000
index 38216fb84..000000000
--- a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/buffers_defaults_t0.j2
+++ /dev/null
@@ -1 +0,0 @@
-../ACS-MSN4700/buffers_defaults_t0.j2
\ No newline at end of file
diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/buffers_defaults_t0.j2 b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/buffers_defaults_t0.j2
new file mode 100644
index 000000000..175618cc9
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/buffers_defaults_t0.j2
@@ -0,0 +1,38 @@
+{#
+    Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+    Apache-2.0
+
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+    http://www.apache.org/licenses/LICENSE-2.0
+
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+#}
+{% set default_cable = '5m' %}
+{% set ingress_lossless_pool_size =  '52219872' %}
+{% set ingress_lossless_pool_xoff  =  '3305376' %}
+{% set egress_lossless_pool_size =  '60817392' %}
+{% set egress_lossy_pool_size =  '52219872' %}
+
+{% import 'buffers_defaults_objects.j2' as defs with context %}
+
+{%- macro generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) %}
+{{ defs.generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_profile_lists_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_profile_lists(port_names_active, port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_queue_buffers_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_queue_buffers(port_names_active, port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_pg_profiles_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_pg_profiles(port_names_active, port_names_inactive) }}
+{%- endmacro %}
diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/buffers_defaults_t1.j2 b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/buffers_defaults_t1.j2
deleted file mode 120000
index c09ab3850..000000000
--- a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/buffers_defaults_t1.j2
+++ /dev/null
@@ -1 +0,0 @@
-../ACS-MSN4700/buffers_defaults_t1.j2
\ No newline at end of file
diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/buffers_defaults_t1.j2 b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/buffers_defaults_t1.j2
new file mode 100644
index 000000000..39cee7576
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/buffers_defaults_t1.j2
@@ -0,0 +1,38 @@
+{#
+    Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+    Apache-2.0
+
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+    http://www.apache.org/licenses/LICENSE-2.0
+
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+#}
+{% set default_cable = '300m' %}
+{% set ingress_lossless_pool_size =  '49934304' %}
+{% set ingress_lossless_pool_xoff  =  '5590944' %}
+{% set egress_lossless_pool_size =  '60817392' %}
+{% set egress_lossy_pool_size =  '49934304' %}
+
+{% import 'buffers_defaults_objects.j2' as defs with context %}
+
+{%- macro generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) %}
+{{ defs.generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_profile_lists_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_profile_lists(port_names_active, port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_queue_buffers_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_queue_buffers(port_names_active, port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_pg_profiles_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_pg_profiles(port_names_active, port_names_inactive) }}
+{%- endmacro %}
diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/buffers_dynamic.json.j2 b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/buffers_dynamic.json.j2
index 8c4117c66..d5a441408 120000
--- a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/buffers_dynamic.json.j2
+++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/buffers_dynamic.json.j2
@@ -1 +1 @@
-../../x86_64-mlnx_msn2700-r0/ACS-MSN2700/buffers_dynamic.json.j2
\ No newline at end of file
+../Mellanox-SN4700-O8C48/buffers_dynamic.json.j2
\ No newline at end of file
diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/pg_profile_lookup.ini b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/pg_profile_lookup.ini
index 7813e1697..66cab04d2 120000
--- a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/pg_profile_lookup.ini
+++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/pg_profile_lookup.ini
@@ -1 +1 @@
-../ACS-MSN4700/pg_profile_lookup.ini
\ No newline at end of file
+../Mellanox-SN4700-C128/pg_profile_lookup.ini
\ No newline at end of file
diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/port_config.ini b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/port_config.ini
index bdc1dc676..3e9701359 100644
--- a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/port_config.ini
+++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/port_config.ini
@@ -1,5 +1,5 @@
 ##
-## Copyright (c) 2023 NVIDIA CORPORATION & AFFILIATES.
+## Copyright (c) 2023-2024 NVIDIA CORPORATION & AFFILIATES.
 ## Apache-2.0
 ##
 ## Licensed under the Apache License, Version 2.0 (the "License");
diff --git a/files/build_templates/buffers_config.j2 b/files/build_templates/buffers_config.j2
index d6d89e33b..9787bec1b 100644
--- a/files/build_templates/buffers_config.j2
+++ b/files/build_templates/buffers_config.j2
@@ -113,6 +113,7 @@ def
 
 {%- set PORT_ALL  = [] %}
 {%- set PORT_BP  = [] %}
+{%- set PORT_DPC  = [] %}
 {%- set SYSTEM_PORT_ALL = [] %}
 
 {%- if voq_chassis %}
@@ -135,6 +136,9 @@ def
     {%- for port in PORT %}
         {%- if not port.startswith('Ethernet-Rec') and not port.startswith('Ethernet-IB') %}
             {%- if PORT_ALL.append(port) %}{%- endif %}
+            {%- if 'role' in PORT[port] and PORT[port]['role'] == 'Dpc' %}
+                {%- if PORT_DPC.append(port) %}{%- endif %}
+            {%- endif %}
         {%- endif %}
     {%- endfor %}
     {%- if defs.generate_bp_port_list is defined %}
@@ -153,8 +157,11 @@ def
     {%- for port in PORT_BP %}
         {%- if PORT_ACTIVE.append(port) %}{%- endif %}
     {%- endfor %}
+    {%- for port in PORT_DPC %}
+        {%- if PORT_ACTIVE.append(port) %}{%- endif %}
+    {%- endfor %}
     {%- for port in PORT_ALL %}
-        {%- if port not in DEVICE_NEIGHBOR.keys() %}
+        {%- if port not in DEVICE_NEIGHBOR.keys() and port not in PORT_DPC %}
             {%- if PORT_INACTIVE.append(port) %}{%- endif %}
         {%- endif %}
     {%- endfor %}
diff --git a/files/build_templates/qos_config.j2 b/files/build_templates/qos_config.j2
index a85d4f1e4..bf5007471 100644
--- a/files/build_templates/qos_config.j2
+++ b/files/build_templates/qos_config.j2
@@ -1,5 +1,6 @@
 {%- set PORT_ALL = [] %}
 {%- set PORT_BP = [] %}
+{%- set PORT_DPC  = [] %}
 {%- set SYSTEM_PORT_ALL = [] %}
 
 {%- set voq_chassis = false %}
@@ -22,6 +23,9 @@
 {%- for port in PORT %}
     {%- if not port.startswith('Ethernet-Rec') and not port.startswith('Ethernet-IB') %}
         {%- if PORT_ALL.append(port) %}{% endif %}
+        {%- if 'role' in PORT[port] and PORT[port]['role'] == 'Dpc' %}
+            {%- if PORT_DPC.append(port) %}{%- endif %}
+        {%- endif %}
     {%- endif %}
 {%- endfor %}
 {%- if generate_bp_port_list is defined %}
@@ -47,6 +51,9 @@
     {%- for port in PORT_BP %}
         {%- if PORT_ACTIVE.append(port) %}{%- endif %}
     {%- endfor %}
+    {%- for port in PORT_DPC %}
+        {%- if PORT_ACTIVE.append(port) %}{%- endif %}
+    {%- endfor %}
 {%- endif %}
 {%- if PORT_ACTIVE | sort_by_port_index %}{% endif %}
 
@@ -321,8 +328,6 @@
 {% else %}
             "tc_to_queue_map" : "AZURE",
 {% endif %}
-            "tc_to_pg_map"    : "AZURE",
-            "pfc_to_queue_map": "AZURE",
 {% if asic_type in pfc_to_pg_map_supported_asics %}
 {% if port in port_names_list_extra_queues %}
             "pfc_to_pg_map"   : "AZURE_DUALTOR",
@@ -330,12 +335,16 @@
             "pfc_to_pg_map"   : "AZURE",
 {% endif %}
 {% endif %}
+{% if port not in PORT_DPC %}
 {% if port in port_names_list_extra_queues %}
             "pfc_enable"      : "2,3,4,6",
 {% else %}
             "pfc_enable"      : "3,4",
 {% endif %}
-            "pfcwd_sw_enable" : "3,4"
+            "pfcwd_sw_enable" : "3,4",
+{% endif %}
+            "tc_to_pg_map"    : "AZURE",
+            "pfc_to_queue_map": "AZURE"
         }{% if not loop.last %},{% endif %}
 
 {% endfor %}
@@ -426,8 +435,12 @@
 {% else %}
 {% for port in PORT_ACTIVE %}
         "{{ port }}|3": {
+{% if port not in PORT_DPC %}
             "scheduler"   : "scheduler.1",
             "wred_profile": "AZURE_LOSSLESS"
+{% else %}
+            "scheduler": "scheduler.0"
+{% endif %}
         },
 {% endfor %}
 {% if 'resource_type' in DEVICE_METADATA['localhost'] and DEVICE_METADATA['localhost']['resource_type'] in apollo_resource_types %}
@@ -440,8 +453,12 @@
 {% else %}
 {% for port in PORT_ACTIVE %}
         "{{ port }}|4": {
+{% if port not in PORT_DPC %}
             "scheduler"   : "scheduler.1",
             "wred_profile": "AZURE_LOSSLESS"
+{% else %}
+            "scheduler": "scheduler.0"
+{% endif %}
         },
 {% endfor %}
 {% endif %}
@@ -457,7 +474,7 @@
 {% endfor %}
 {% for port in PORT_ACTIVE %}
         "{{ port }}|2": {
-{% if port in port_names_list_extra_queues %}
+{% if port in port_names_list_extra_queues and port not in PORT_DPC %}
             "scheduler"   : "scheduler.1",
             "wred_profile": "AZURE_LOSSLESS"
 {% else %}
@@ -478,7 +495,7 @@
 {% endfor %}
 {% for port in PORT_ACTIVE %}
         "{{ port }}|6": {
-{% if port in port_names_list_extra_queues %}
+{% if port in port_names_list_extra_queues and port not in PORT_DPC %}
             "scheduler"   : "scheduler.1",
             "wred_profile": "AZURE_LOSSLESS"
 {% else %}
diff --git a/src/sonic-config-engine/tests/common_utils.py b/src/sonic-config-engine/tests/common_utils.py
index 1a2a36805..a5a15c45b 100644
--- a/src/sonic-config-engine/tests/common_utils.py
+++ b/src/sonic-config-engine/tests/common_utils.py
@@ -97,3 +97,18 @@ def cmp(file1, file2):
         return obj1 == obj2
     except:
         return filecmp.cmp(file1, file2)
+
+def cmp_tables(f_rcvd, f_exp):
+    """ Check if the tables present in rcvd matches with exp """
+    try:
+        with open(f_rcvd, 'r') as f:
+            rcvd = json.load(f)
+        with open(f_exp, 'r') as f:
+            exp = json.load(f)
+
+        for key in rcvd.keys():
+            print(key, rcvd[key], exp.get(key,{}))
+            assert rcvd[key] == exp.get(key,{})
+    except Exception as e:
+        return False
+    return True
diff --git a/src/sonic-config-engine/tests/sample-mellanox-4700-t1-minigraph-smartswitch.xml b/src/sonic-config-engine/tests/sample-mellanox-4700-t1-minigraph-smartswitch.xml
new file mode 100644
index 000000000..6f47baf93
--- /dev/null
+++ b/src/sonic-config-engine/tests/sample-mellanox-4700-t1-minigraph-smartswitch.xml
@@ -0,0 +1,1082 @@
+<DeviceMiniGraph xmlns="Microsoft.Search.Autopilot.Evolution" xmlns:i="http://www.w3.org/2001/XMLSchema-instance">
+  <CpgDec>
+    <IsisRouters xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+    <PeeringSessions>
+      <BGPSession>
+        <MacSec>false</MacSec>
+        <StartRouter>mtvr-leopard-01</StartRouter>
+        <StartPeer>10.0.0.32</StartPeer>
+        <EndRouter>ARISTA01T0</EndRouter>
+        <EndPeer>10.0.0.33</EndPeer>
+        <Multihop>1</Multihop>
+        <HoldTime>10</HoldTime>
+        <KeepAliveTime>3</KeepAliveTime>
+      </BGPSession>
+      <BGPSession>
+        <StartRouter>mtvr-leopard-01</StartRouter>
+        <StartPeer>FC00::8D</StartPeer>
+        <EndRouter>ARISTA20T0</EndRouter>
+        <EndPeer>FC00::8E</EndPeer>
+        <Multihop>1</Multihop>
+        <HoldTime>10</HoldTime>
+        <KeepAliveTime>3</KeepAliveTime>
+      </BGPSession>
+    </PeeringSessions>
+    <Routers xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution">
+      <a:BGPRouterDeclaration>
+        <a:ASN>65100</a:ASN>
+        <a:Hostname>mtvr-leopard-01</a:Hostname>
+        <a:Peers>
+          <BGPPeer>
+            <Address>10.0.0.33</Address>
+            <RouteMapIn i:nil="true"/>
+            <RouteMapOut i:nil="true"/>
+            <Vrf i:nil="true"/>
+          </BGPPeer>
+          <BGPPeer>
+            <Address>10.0.0.1</Address>
+            <RouteMapIn i:nil="true"/>
+            <RouteMapOut i:nil="true"/>
+            <Vrf i:nil="true"/>
+          </BGPPeer>
+          <BGPPeer>
+            <Address>10.0.0.35</Address>
+            <RouteMapIn i:nil="true"/>
+            <RouteMapOut i:nil="true"/>
+            <Vrf i:nil="true"/>
+          </BGPPeer>
+          <BGPPeer>
+            <Address>10.0.0.37</Address>
+            <RouteMapIn i:nil="true"/>
+            <RouteMapOut i:nil="true"/>
+            <Vrf i:nil="true"/>
+          </BGPPeer>
+          <BGPPeer>
+            <Address>10.0.0.5</Address>
+            <RouteMapIn i:nil="true"/>
+            <RouteMapOut i:nil="true"/>
+            <Vrf i:nil="true"/>
+          </BGPPeer>
+          <BGPPeer>
+            <Address>10.0.0.39</Address>
+            <RouteMapIn i:nil="true"/>
+            <RouteMapOut i:nil="true"/>
+            <Vrf i:nil="true"/>
+          </BGPPeer>
+          <BGPPeer>
+            <Address>10.0.0.41</Address>
+            <RouteMapIn i:nil="true"/>
+            <RouteMapOut i:nil="true"/>
+            <Vrf i:nil="true"/>
+          </BGPPeer>
+          <BGPPeer>
+            <Address>10.0.0.9</Address>
+            <RouteMapIn i:nil="true"/>
+            <RouteMapOut i:nil="true"/>
+            <Vrf i:nil="true"/>
+          </BGPPeer>
+          <BGPPeer>
+            <Address>10.0.0.43</Address>
+            <RouteMapIn i:nil="true"/>
+            <RouteMapOut i:nil="true"/>
+            <Vrf i:nil="true"/>
+          </BGPPeer>
+          <BGPPeer>
+            <Address>10.0.0.45</Address>
+            <RouteMapIn i:nil="true"/>
+            <RouteMapOut i:nil="true"/>
+            <Vrf i:nil="true"/>
+          </BGPPeer>
+          <BGPPeer>
+            <Address>10.0.0.13</Address>
+            <RouteMapIn i:nil="true"/>
+            <RouteMapOut i:nil="true"/>
+            <Vrf i:nil="true"/>
+          </BGPPeer>
+          <BGPPeer>
+            <Address>10.0.0.47</Address>
+            <RouteMapIn i:nil="true"/>
+            <RouteMapOut i:nil="true"/>
+            <Vrf i:nil="true"/>
+          </BGPPeer>
+          <BGPPeer>
+            <Address>10.0.0.49</Address>
+            <RouteMapIn i:nil="true"/>
+            <RouteMapOut i:nil="true"/>
+            <Vrf i:nil="true"/>
+          </BGPPeer>
+          <BGPPeer>
+            <Address>10.0.0.51</Address>
+            <RouteMapIn i:nil="true"/>
+            <RouteMapOut i:nil="true"/>
+            <Vrf i:nil="true"/>
+          </BGPPeer>
+          <BGPPeer>
+            <Address>10.0.0.53</Address>
+            <RouteMapIn i:nil="true"/>
+            <RouteMapOut i:nil="true"/>
+            <Vrf i:nil="true"/>
+          </BGPPeer>
+          <BGPPeer>
+            <Address>10.0.0.55</Address>
+            <RouteMapIn i:nil="true"/>
+            <RouteMapOut i:nil="true"/>
+            <Vrf i:nil="true"/>
+          </BGPPeer>
+          <BGPPeer>
+            <Address>10.0.0.57</Address>
+            <RouteMapIn i:nil="true"/>
+            <RouteMapOut i:nil="true"/>
+            <Vrf i:nil="true"/>
+          </BGPPeer>
+          <BGPPeer>
+            <Address>10.0.0.59</Address>
+            <RouteMapIn i:nil="true"/>
+            <RouteMapOut i:nil="true"/>
+            <Vrf i:nil="true"/>
+          </BGPPeer>
+          <BGPPeer>
+            <Address>10.0.0.61</Address>
+            <RouteMapIn i:nil="true"/>
+            <RouteMapOut i:nil="true"/>
+            <Vrf i:nil="true"/>
+          </BGPPeer>
+          <BGPPeer>
+            <Address>10.0.0.63</Address>
+            <RouteMapIn i:nil="true"/>
+            <RouteMapOut i:nil="true"/>
+            <Vrf i:nil="true"/>
+          </BGPPeer>
+          <BGPPeer>
+            <Address>10.0.0.65</Address>
+            <RouteMapIn i:nil="true"/>
+            <RouteMapOut i:nil="true"/>
+            <Vrf i:nil="true"/>
+          </BGPPeer>
+          <BGPPeer>
+            <Address>10.0.0.67</Address>
+            <RouteMapIn i:nil="true"/>
+            <RouteMapOut i:nil="true"/>
+            <Vrf i:nil="true"/>
+          </BGPPeer>
+          <BGPPeer>
+            <Address>10.0.0.69</Address>
+            <RouteMapIn i:nil="true"/>
+            <RouteMapOut i:nil="true"/>
+            <Vrf i:nil="true"/>
+          </BGPPeer>
+          <BGPPeer>
+            <Address>10.0.0.71</Address>
+            <RouteMapIn i:nil="true"/>
+            <RouteMapOut i:nil="true"/>
+            <Vrf i:nil="true"/>
+          </BGPPeer>
+        </a:Peers>
+        <a:RouteMaps/>
+      </a:BGPRouterDeclaration>
+      <a:BGPRouterDeclaration>
+        <a:ASN>64001</a:ASN>
+        <a:Hostname>ARISTA01T0</a:Hostname>
+        <a:RouteMaps/>
+      </a:BGPRouterDeclaration>
+      <a:BGPRouterDeclaration>
+        <a:ASN>65200</a:ASN>
+        <a:Hostname>ARISTA01T2</a:Hostname>
+        <a:RouteMaps/>
+      </a:BGPRouterDeclaration>
+      <a:BGPRouterDeclaration>
+        <a:ASN>64002</a:ASN>
+        <a:Hostname>ARISTA02T0</a:Hostname>
+        <a:RouteMaps/>
+      </a:BGPRouterDeclaration>
+      <a:BGPRouterDeclaration>
+        <a:ASN>64003</a:ASN>
+        <a:Hostname>ARISTA03T0</a:Hostname>
+        <a:RouteMaps/>
+      </a:BGPRouterDeclaration>
+      <a:BGPRouterDeclaration>
+        <a:ASN>65200</a:ASN>
+        <a:Hostname>ARISTA03T2</a:Hostname>
+        <a:RouteMaps/>
+      </a:BGPRouterDeclaration>
+      <a:BGPRouterDeclaration>
+        <a:ASN>64004</a:ASN>
+        <a:Hostname>ARISTA04T0</a:Hostname>
+        <a:RouteMaps/>
+      </a:BGPRouterDeclaration>
+      <a:BGPRouterDeclaration>
+        <a:ASN>64005</a:ASN>
+        <a:Hostname>ARISTA05T0</a:Hostname>
+        <a:RouteMaps/>
+      </a:BGPRouterDeclaration>
+      <a:BGPRouterDeclaration>
+        <a:ASN>65200</a:ASN>
+        <a:Hostname>ARISTA05T2</a:Hostname>
+        <a:RouteMaps/>
+      </a:BGPRouterDeclaration>
+      <a:BGPRouterDeclaration>
+        <a:ASN>64006</a:ASN>
+        <a:Hostname>ARISTA06T0</a:Hostname>
+        <a:RouteMaps/>
+      </a:BGPRouterDeclaration>
+      <a:BGPRouterDeclaration>
+        <a:ASN>64007</a:ASN>
+        <a:Hostname>ARISTA07T0</a:Hostname>
+        <a:RouteMaps/>
+      </a:BGPRouterDeclaration>
+      <a:BGPRouterDeclaration>
+        <a:ASN>65200</a:ASN>
+        <a:Hostname>ARISTA07T2</a:Hostname>
+        <a:RouteMaps/>
+      </a:BGPRouterDeclaration>
+      <a:BGPRouterDeclaration>
+        <a:ASN>64008</a:ASN>
+        <a:Hostname>ARISTA08T0</a:Hostname>
+        <a:RouteMaps/>
+      </a:BGPRouterDeclaration>
+      <a:BGPRouterDeclaration>
+        <a:ASN>64009</a:ASN>
+        <a:Hostname>ARISTA09T0</a:Hostname>
+        <a:RouteMaps/>
+      </a:BGPRouterDeclaration>
+      <a:BGPRouterDeclaration>
+        <a:ASN>64010</a:ASN>
+        <a:Hostname>ARISTA10T0</a:Hostname>
+        <a:RouteMaps/>
+      </a:BGPRouterDeclaration>
+      <a:BGPRouterDeclaration>
+        <a:ASN>64011</a:ASN>
+        <a:Hostname>ARISTA11T0</a:Hostname>
+        <a:RouteMaps/>
+      </a:BGPRouterDeclaration>
+      <a:BGPRouterDeclaration>
+        <a:ASN>64012</a:ASN>
+        <a:Hostname>ARISTA12T0</a:Hostname>
+        <a:RouteMaps/>
+      </a:BGPRouterDeclaration>
+      <a:BGPRouterDeclaration>
+        <a:ASN>64013</a:ASN>
+        <a:Hostname>ARISTA13T0</a:Hostname>
+        <a:RouteMaps/>
+      </a:BGPRouterDeclaration>
+      <a:BGPRouterDeclaration>
+        <a:ASN>64014</a:ASN>
+        <a:Hostname>ARISTA14T0</a:Hostname>
+        <a:RouteMaps/>
+      </a:BGPRouterDeclaration>
+      <a:BGPRouterDeclaration>
+        <a:ASN>64015</a:ASN>
+        <a:Hostname>ARISTA15T0</a:Hostname>
+        <a:RouteMaps/>
+      </a:BGPRouterDeclaration>
+      <a:BGPRouterDeclaration>
+        <a:ASN>64016</a:ASN>
+        <a:Hostname>ARISTA16T0</a:Hostname>
+        <a:RouteMaps/>
+      </a:BGPRouterDeclaration>
+      <a:BGPRouterDeclaration>
+        <a:ASN>64017</a:ASN>
+        <a:Hostname>ARISTA17T0</a:Hostname>
+        <a:RouteMaps/>
+      </a:BGPRouterDeclaration>
+      <a:BGPRouterDeclaration>
+        <a:ASN>64018</a:ASN>
+        <a:Hostname>ARISTA18T0</a:Hostname>
+        <a:RouteMaps/>
+      </a:BGPRouterDeclaration>
+      <a:BGPRouterDeclaration>
+        <a:ASN>64019</a:ASN>
+        <a:Hostname>ARISTA19T0</a:Hostname>
+        <a:RouteMaps/>
+      </a:BGPRouterDeclaration>
+      <a:BGPRouterDeclaration>
+        <a:ASN>64020</a:ASN>
+        <a:Hostname>ARISTA20T0</a:Hostname>
+        <a:RouteMaps/>
+      </a:BGPRouterDeclaration>
+    </Routers>
+  </CpgDec>  <DpgDec>
+    <DeviceDataPlaneInfo>
+      <IPSecTunnels/>
+      <LoopbackIPInterfaces xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution">
+        <a:LoopbackIPInterface>
+          <Name>HostIP</Name>
+          <AttachTo>Loopback0</AttachTo>
+          <a:Prefix xmlns:b="Microsoft.Search.Autopilot.Evolution">
+            <b:IPPrefix>10.1.0.32/32</b:IPPrefix>
+          </a:Prefix>
+          <a:PrefixStr>10.1.0.32/32</a:PrefixStr>
+        </a:LoopbackIPInterface>
+        <a:LoopbackIPInterface>
+          <Name>HostIP1</Name>
+          <AttachTo>Loopback0</AttachTo>
+          <a:Prefix xmlns:b="Microsoft.Search.Autopilot.Evolution">
+            <b:IPPrefix>FC00:1::32/128</b:IPPrefix>
+          </a:Prefix>
+          <a:PrefixStr>FC00:1::32/128</a:PrefixStr>
+        </a:LoopbackIPInterface>
+      </LoopbackIPInterfaces>
+      <ManagementIPInterfaces xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution">
+        <a:ManagementIPInterface>
+          <Name>HostIP</Name>
+          <AttachTo>eth0</AttachTo>
+          <a:Prefix xmlns:b="Microsoft.Search.Autopilot.Evolution">
+            <b:IPPrefix>10.210.24.184/22</b:IPPrefix>
+          </a:Prefix>
+          <a:PrefixStr>10.210.24.184/22</a:PrefixStr>
+        </a:ManagementIPInterface>
+      </ManagementIPInterfaces>
+      <ManagementVIPInterfaces xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+      <MplsInterfaces/>
+      <MplsTeInterfaces/>
+      <RsvpInterfaces/>
+      <Hostname>mtvr-leopard-01</Hostname>
+      <PortChannelInterfaces>
+        <PortChannel>
+          <Name>PortChannel102</Name>
+          <AttachTo>etp1;etp2</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <Name>PortChannel105</Name>
+          <AttachTo>etp3;etp4</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <Name>PortChannel108</Name>
+          <AttachTo>etp5;etp6</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+        <PortChannel>
+          <Name>PortChannel1011</Name>
+          <AttachTo>etp7;etp8</AttachTo>
+          <SubInterface/>
+        </PortChannel>
+      </PortChannelInterfaces>
+      <VlanInterfaces>
+      </VlanInterfaces>
+      <IPInterfaces>
+        <IPInterface>
+          <Name i:nil="true"/>
+          <AttachTo>etp28</AttachTo>
+          <Prefix>10.0.0.70/31</Prefix>
+        </IPInterface>
+        <IPInterface>
+          <Name i:Name="true"/>
+          <AttachTo>etp28</AttachTo>
+          <Prefix>FC00::8D/126</Prefix>
+        </IPInterface>
+      </IPInterfaces>
+      <DataAcls/>
+      <AclInterfaces>
+        <AclInterface>
+          <InAcl>NTP_ACL</InAcl>
+          <AttachTo>NTP</AttachTo>
+          <Type>NTP</Type>
+        </AclInterface>
+        <AclInterface>
+          <InAcl>SNMP_ACL</InAcl>
+          <AttachTo>SNMP</AttachTo>
+          <Type>SNMP</Type>
+        </AclInterface>
+        <AclInterface>
+          <AttachTo>VTY_LINE</AttachTo>
+          <InAcl>ssh-only</InAcl>
+          <Type>SSH</Type>
+        </AclInterface>
+                <AclInterface>
+          <AttachTo>ERSPAN</AttachTo>
+          <InAcl>Everflow</InAcl>
+          <Type>Everflow</Type>
+        </AclInterface>
+                <AclInterface>
+          <AttachTo>ERSPANV6</AttachTo>
+          <InAcl>EverflowV6</InAcl>
+          <Type>EverflowV6</Type>
+        </AclInterface>
+        <AclInterface>
+          <AttachTo>PortChannel102;PortChannel105;PortChannel108;PortChannel1011;etp9;etp10;etp11;etp12;etp13;etp14;etp15;etp16;etp17;etp18;etp19;etp20;etp21;etp22;etp23;etp24;etp25;etp26;etp27;etp28</AttachTo>
+          <InAcl>DataAcl</InAcl>
+          <Type>DataPlane</Type>
+        </AclInterface>
+      </AclInterfaces>
+      <DownstreamSummaries/>
+      <DownstreamSummarySet xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+    </DeviceDataPlaneInfo>
+  </DpgDec>  <PngDec>
+    <DeviceInterfaceLinks>
+      <DeviceLinkBase>
+        <ElementType>DeviceInterfaceLink</ElementType>
+        <EndDevice>ARISTA20T0</EndDevice>
+        <EndPort>Ethernet1</EndPort>
+        <StartDevice>mtvr-leopard-01</StartDevice>
+        <StartPort>etp28</StartPort>
+        <Bandwidth>400000</Bandwidth>
+      </DeviceLinkBase>
+    </DeviceInterfaceLinks>
+    <Devices>
+      <Device i:type="LeafRouter">
+        <Hostname>mtvr-leopard-01</Hostname>
+        <HwSku>Mellanox-SN4700-O28</HwSku>
+        <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+           <a:IPPrefix>10.245.20.49</a:IPPrefix>
+        </ManagementAddress>
+      </Device>
+      <Device i:type="ToRRouter">
+         <Hostname>ARISTA16T0</Hostname>
+         <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+           <a:IPPrefix>10.245.32.142</a:IPPrefix>
+         </ManagementAddress>
+         <HwSku>Arista-VM</HwSku>
+      </Device>
+      <Device i:type="ToRRouter">
+         <Hostname>ARISTA11T0</Hostname>
+         <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+           <a:IPPrefix>10.245.32.137</a:IPPrefix>
+         </ManagementAddress>
+         <HwSku>Arista-VM</HwSku>
+      </Device>
+      <Device i:type="ToRRouter">
+         <Hostname>ARISTA10T0</Hostname>
+         <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+           <a:IPPrefix>10.245.32.136</a:IPPrefix>
+         </ManagementAddress>
+         <HwSku>Arista-VM</HwSku>
+      </Device>
+      <Device i:type="ToRRouter">
+         <Hostname>ARISTA17T0</Hostname>
+         <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+           <a:IPPrefix>10.245.32.143</a:IPPrefix>
+         </ManagementAddress>
+         <HwSku>Arista-VM</HwSku>
+      </Device>
+      <Device i:type="ToRRouter">
+         <Hostname>ARISTA09T0</Hostname>
+         <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+           <a:IPPrefix>10.245.32.135</a:IPPrefix>
+         </ManagementAddress>
+         <HwSku>Arista-VM</HwSku>
+      </Device>
+      <Device i:type="ToRRouter">
+         <Hostname>ARISTA20T0</Hostname>
+         <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+           <a:IPPrefix>10.245.32.146</a:IPPrefix>
+         </ManagementAddress>
+         <HwSku>Arista-VM</HwSku>
+      </Device>
+      <Device i:type="ToRRouter">
+         <Hostname>ARISTA08T0</Hostname>
+         <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+           <a:IPPrefix>10.245.32.134</a:IPPrefix>
+         </ManagementAddress>
+         <HwSku>Arista-VM</HwSku>
+      </Device>
+      <Device i:type="ToRRouter">
+         <Hostname>ARISTA07T0</Hostname>
+         <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+           <a:IPPrefix>10.245.32.133</a:IPPrefix>
+         </ManagementAddress>
+         <HwSku>Arista-VM</HwSku>
+      </Device>
+      <Device i:type="SpineRouter">
+         <Hostname>ARISTA07T2</Hostname>
+         <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+           <a:IPPrefix>10.245.32.126</a:IPPrefix>
+         </ManagementAddress>
+         <HwSku>Arista-VM</HwSku>
+      </Device>
+      <Device i:type="SpineRouter">
+         <Hostname>ARISTA01T2</Hostname>
+         <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+           <a:IPPrefix>10.245.32.123</a:IPPrefix>
+         </ManagementAddress>
+         <HwSku>Arista-VM</HwSku>
+      </Device>
+      <Device i:type="ToRRouter">
+         <Hostname>ARISTA01T0</Hostname>
+         <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+           <a:IPPrefix>10.245.32.127</a:IPPrefix>
+         </ManagementAddress>
+         <HwSku>Arista-VM</HwSku>
+      </Device>
+      <Device i:type="SpineRouter">
+         <Hostname>ARISTA05T2</Hostname>
+         <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+           <a:IPPrefix>10.245.32.125</a:IPPrefix>
+         </ManagementAddress>
+         <HwSku>Arista-VM</HwSku>
+      </Device>
+      <Device i:type="ToRRouter">
+         <Hostname>ARISTA05T0</Hostname>
+         <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+           <a:IPPrefix>10.245.32.131</a:IPPrefix>
+         </ManagementAddress>
+         <HwSku>Arista-VM</HwSku>
+      </Device>
+      <Device i:type="ToRRouter">
+         <Hostname>ARISTA02T0</Hostname>
+         <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+           <a:IPPrefix>10.245.32.128</a:IPPrefix>
+         </ManagementAddress>
+         <HwSku>Arista-VM</HwSku>
+      </Device>
+      <Device i:type="ToRRouter">
+         <Hostname>ARISTA03T0</Hostname>
+         <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+           <a:IPPrefix>10.245.32.129</a:IPPrefix>
+         </ManagementAddress>
+         <HwSku>Arista-VM</HwSku>
+      </Device>
+      <Device i:type="SpineRouter">
+         <Hostname>ARISTA03T2</Hostname>
+         <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+           <a:IPPrefix>10.245.32.124</a:IPPrefix>
+         </ManagementAddress>
+         <HwSku>Arista-VM</HwSku>
+      </Device>
+      <Device i:type="ToRRouter">
+         <Hostname>ARISTA04T0</Hostname>
+         <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+           <a:IPPrefix>10.245.32.130</a:IPPrefix>
+         </ManagementAddress>
+         <HwSku>Arista-VM</HwSku>
+      </Device>
+      <Device i:type="ToRRouter">
+         <Hostname>ARISTA18T0</Hostname>
+         <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+           <a:IPPrefix>10.245.32.144</a:IPPrefix>
+         </ManagementAddress>
+         <HwSku>Arista-VM</HwSku>
+      </Device>
+      <Device i:type="ToRRouter">
+         <Hostname>ARISTA15T0</Hostname>
+         <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+           <a:IPPrefix>10.245.32.141</a:IPPrefix>
+         </ManagementAddress>
+         <HwSku>Arista-VM</HwSku>
+      </Device>
+      <Device i:type="ToRRouter">
+         <Hostname>ARISTA19T0</Hostname>
+         <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+           <a:IPPrefix>10.245.32.145</a:IPPrefix>
+         </ManagementAddress>
+         <HwSku>Arista-VM</HwSku>
+      </Device>
+      <Device i:type="ToRRouter">
+         <Hostname>ARISTA14T0</Hostname>
+         <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+           <a:IPPrefix>10.245.32.140</a:IPPrefix>
+         </ManagementAddress>
+         <HwSku>Arista-VM</HwSku>
+      </Device>
+      <Device i:type="ToRRouter">
+         <Hostname>ARISTA12T0</Hostname>
+         <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+           <a:IPPrefix>10.245.32.138</a:IPPrefix>
+         </ManagementAddress>
+         <HwSku>Arista-VM</HwSku>
+      </Device>
+      <Device i:type="ToRRouter">
+         <Hostname>ARISTA13T0</Hostname>
+         <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+           <a:IPPrefix>10.245.32.139</a:IPPrefix>
+         </ManagementAddress>
+         <HwSku>Arista-VM</HwSku>
+      </Device>
+      <Device i:type="ToRRouter">
+         <Hostname>ARISTA06T0</Hostname>
+         <ManagementAddress xmlns:a="Microsoft.Search.Autopilot.NetMux">
+           <a:IPPrefix>10.245.32.132</a:IPPrefix>
+         </ManagementAddress>
+         <HwSku>Arista-VM</HwSku>
+      </Device>
+    </Devices>
+  </PngDec>  <DeviceInfos>
+    <DeviceInfo>
+      <AutoNegotiation>true</AutoNegotiation>
+      <EthernetInterfaces xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution">
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableAutoNegotiation>true</EnableAutoNegotiation>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>etp1</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableAutoNegotiation>true</EnableAutoNegotiation>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>etp2</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableAutoNegotiation>true</EnableAutoNegotiation>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>etp3</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableAutoNegotiation>true</EnableAutoNegotiation>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>etp4</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableAutoNegotiation>true</EnableAutoNegotiation>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>etp5</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableAutoNegotiation>true</EnableAutoNegotiation>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>etp6</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableAutoNegotiation>true</EnableAutoNegotiation>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>etp7</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableAutoNegotiation>true</EnableAutoNegotiation>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>etp8</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableAutoNegotiation>true</EnableAutoNegotiation>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>etp9</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableAutoNegotiation>true</EnableAutoNegotiation>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>etp10</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableAutoNegotiation>true</EnableAutoNegotiation>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>etp11</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableAutoNegotiation>true</EnableAutoNegotiation>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>etp12</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableAutoNegotiation>true</EnableAutoNegotiation>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>etp13</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableAutoNegotiation>true</EnableAutoNegotiation>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>etp14</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableAutoNegotiation>true</EnableAutoNegotiation>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>etp15</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableAutoNegotiation>true</EnableAutoNegotiation>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>etp16</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableAutoNegotiation>true</EnableAutoNegotiation>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>etp17</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableAutoNegotiation>true</EnableAutoNegotiation>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>etp18</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableAutoNegotiation>true</EnableAutoNegotiation>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>etp19</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableAutoNegotiation>true</EnableAutoNegotiation>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>etp20</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableAutoNegotiation>true</EnableAutoNegotiation>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>etp21</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableAutoNegotiation>true</EnableAutoNegotiation>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>etp22</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableAutoNegotiation>true</EnableAutoNegotiation>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>etp23</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableAutoNegotiation>true</EnableAutoNegotiation>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>etp24</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableAutoNegotiation>true</EnableAutoNegotiation>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>etp25</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableAutoNegotiation>true</EnableAutoNegotiation>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>etp26</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableAutoNegotiation>true</EnableAutoNegotiation>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>etp27</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableAutoNegotiation>true</EnableAutoNegotiation>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>etp28</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>400000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableAutoNegotiation>true</EnableAutoNegotiation>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>etp29</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>200000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableAutoNegotiation>true</EnableAutoNegotiation>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>etp30</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>200000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableAutoNegotiation>true</EnableAutoNegotiation>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>etp31</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>200000</Speed>
+        </a:EthernetInterface>
+        <a:EthernetInterface>
+          <ElementType>DeviceInterface</ElementType>
+          <AlternateSpeeds i:nil="true"/>
+          <EnableAutoNegotiation>true</EnableAutoNegotiation>
+          <EnableFlowControl>true</EnableFlowControl>
+          <Index>1</Index>
+          <InterfaceName>etp32</InterfaceName>
+          <InterfaceType i:nil="true"/>
+          <MultiPortsInterface>false</MultiPortsInterface>
+          <PortName>0</PortName>
+          <Priority>0</Priority>
+          <Speed>200000</Speed>
+        </a:EthernetInterface>
+      </EthernetInterfaces>
+      <FlowControl>true</FlowControl>
+      <Height>0</Height>
+      <HwSku>Mellanox-SN4700-O28</HwSku>
+      <ManagementInterfaces/>
+    </DeviceInfo>
+  </DeviceInfos>  <MetadataDeclaration>
+    <Devices xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution">
+      <a:DeviceMetadata>
+        <a:Name>mtvr-leopard-01</a:Name>
+        <a:Properties>
+          <a:DeviceProperty>
+            <a:Name>DeploymentId</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>1</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>CloudType</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Public</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>QosProfile</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>Profile0</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>DhcpResources</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>192.0.0.1;192.0.0.2;192.0.0.3;192.0.0.4</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>NtpResources</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>10.210.25.32;10.75.202.2</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>SnmpResources</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>10.0.0.9</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>TacacsGroup</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>testlab</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>TacacsServer</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>10.7.34.20</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>ForcedMgmtRoutes</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>10.75.0.0/16;10.213.0.0/16;10.215.0.0/16;10.9.0.0/16;10.212.0.0/16</a:Value>
+          </a:DeviceProperty>
+          <a:DeviceProperty>
+            <a:Name>ErspanDestinationIpv4</a:Name>
+            <a:Reference i:nil="true"/>
+            <a:Value>10.0.0.7</a:Value>
+         </a:DeviceProperty>
+        </a:Properties>
+      </a:DeviceMetadata>
+    </Devices>
+    <Properties xmlns:a="http://schemas.datacontract.org/2004/07/Microsoft.Search.Autopilot.Evolution"/>
+  </MetadataDeclaration>
+  <Hostname>mtvr-leopard-01</Hostname>
+  <HwSku>Mellanox-SN4700-O28</HwSku>
+</DeviceMiniGraph>
\ No newline at end of file
diff --git a/src/sonic-config-engine/tests/sample_output/py3/qos-mellanox4700-o28-t1-smartswitch.json b/src/sonic-config-engine/tests/sample_output/py3/qos-mellanox4700-o28-t1-smartswitch.json
new file mode 100644
index 000000000..95add1de5
--- /dev/null
+++ b/src/sonic-config-engine/tests/sample_output/py3/qos-mellanox4700-o28-t1-smartswitch.json
@@ -0,0 +1,814 @@
+{
+    "PORT_QOS_MAP": {
+        "global": {
+            "dscp_to_tc_map": "AZURE"
+        },
+        "Ethernet216": {
+            "dscp_to_tc_map": "AZURE",
+            "tc_to_queue_map": "AZURE",
+            "pfc_enable": "3,4",
+            "pfcwd_sw_enable": "3,4",
+            "tc_to_pg_map": "AZURE",
+            "pfc_to_queue_map": "AZURE"
+        },
+        "Ethernet224": {
+            "dscp_to_tc_map": "AZURE",
+            "tc_to_queue_map": "AZURE",
+            "tc_to_pg_map": "AZURE",
+            "pfc_to_queue_map": "AZURE"
+        },
+        "Ethernet232": {
+            "dscp_to_tc_map": "AZURE",
+            "tc_to_queue_map": "AZURE",
+            "tc_to_pg_map": "AZURE",
+            "pfc_to_queue_map": "AZURE"
+        },
+        "Ethernet240": {
+            "dscp_to_tc_map": "AZURE",
+            "tc_to_queue_map": "AZURE",
+            "tc_to_pg_map": "AZURE",
+            "pfc_to_queue_map": "AZURE"
+        },
+        "Ethernet248": {
+            "dscp_to_tc_map": "AZURE",
+            "tc_to_queue_map": "AZURE",
+            "tc_to_pg_map": "AZURE",
+            "pfc_to_queue_map": "AZURE"
+        }
+    },
+    "QUEUE": {
+        "Ethernet216|3": {
+            "scheduler": "scheduler.1",
+            "wred_profile": "AZURE_LOSSLESS"
+        },
+        "Ethernet224|3": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet232|3": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet240|3": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet248|3": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet216|4": {
+            "scheduler": "scheduler.1",
+            "wred_profile": "AZURE_LOSSLESS"
+        },
+        "Ethernet224|4": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet232|4": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet240|4": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet248|4": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet216|0": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet224|0": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet232|0": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet240|0": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet248|0": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet216|1": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet224|1": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet232|1": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet240|1": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet248|1": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet216|2": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet224|2": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet232|2": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet240|2": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet248|2": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet216|5": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet224|5": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet232|5": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet240|5": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet248|5": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet216|6": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet224|6": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet232|6": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet240|6": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet248|6": {
+            "scheduler": "scheduler.0"
+        }
+    },
+    "BUFFER_POOL": {
+        "ingress_zero_pool": {
+            "mode": "static",
+            "type": "ingress",
+            "size": "0"
+        },
+        "ingress_lossless_pool": {
+            "size": "49934304",
+            "xoff": "5590944",
+            "type": "ingress",
+            "mode": "dynamic"
+        },
+        "egress_lossless_pool": {
+            "size": "60817392",
+            "type": "egress",
+            "mode": "dynamic"
+        },
+        "egress_lossy_pool": {
+            "size": "49934304",
+            "type": "egress",
+            "mode": "dynamic"
+        }
+    },
+    "BUFFER_PROFILE": {
+        "ingress_lossy_pg_zero_profile": {
+            "pool": "ingress_zero_pool",
+            "size": "0",
+            "static_th": "0"
+        },
+        "ingress_lossless_zero_profile": {
+            "pool": "ingress_lossless_pool",
+            "size": "0",
+            "dynamic_th": "-8"
+        },
+        "egress_lossless_zero_profile": {
+            "pool": "egress_lossless_pool",
+            "size": "0",
+            "dynamic_th": "-8"
+        },
+        "egress_lossy_zero_profile": {
+            "pool": "egress_lossy_pool",
+            "size": "0",
+            "dynamic_th": "-8"
+        },
+        "ingress_lossless_profile": {
+            "pool": "ingress_lossless_pool",
+            "size": "0",
+            "dynamic_th": "7"
+        },
+        "ingress_lossy_profile": {
+            "pool": "ingress_lossless_pool",
+            "size": "0",
+            "dynamic_th": "3"
+        },
+        "egress_lossless_profile": {
+            "pool": "egress_lossless_pool",
+            "size": "0",
+            "dynamic_th": "7"
+        },
+        "egress_lossy_profile": {
+            "pool": "egress_lossy_pool",
+            "size": "9216",
+            "dynamic_th": "7"
+        },
+        "q_lossy_profile": {
+            "pool": "egress_lossy_pool",
+            "size": "0",
+            "dynamic_th": "3"
+        }
+    },
+    "BUFFER_PORT_INGRESS_PROFILE_LIST": {
+        "Ethernet216": {
+            "profile_list": "ingress_lossless_profile"
+        },
+        "Ethernet224": {
+            "profile_list": "ingress_lossy_profile"
+        },
+        "Ethernet232": {
+            "profile_list": "ingress_lossy_profile"
+        },
+        "Ethernet240": {
+            "profile_list": "ingress_lossy_profile"
+        },
+        "Ethernet248": {
+            "profile_list": "ingress_lossy_profile"
+        },
+        "Ethernet0": {
+            "profile_list": "ingress_lossless_zero_profile"
+        },
+        "Ethernet8": {
+            "profile_list": "ingress_lossless_zero_profile"
+        },
+        "Ethernet16": {
+            "profile_list": "ingress_lossless_zero_profile"
+        },
+        "Ethernet24": {
+            "profile_list": "ingress_lossless_zero_profile"
+        },
+        "Ethernet32": {
+            "profile_list": "ingress_lossless_zero_profile"
+        },
+        "Ethernet40": {
+            "profile_list": "ingress_lossless_zero_profile"
+        },
+        "Ethernet48": {
+            "profile_list": "ingress_lossless_zero_profile"
+        },
+        "Ethernet56": {
+            "profile_list": "ingress_lossless_zero_profile"
+        },
+        "Ethernet64": {
+            "profile_list": "ingress_lossless_zero_profile"
+        },
+        "Ethernet72": {
+            "profile_list": "ingress_lossless_zero_profile"
+        },
+        "Ethernet80": {
+            "profile_list": "ingress_lossless_zero_profile"
+        },
+        "Ethernet88": {
+            "profile_list": "ingress_lossless_zero_profile"
+        },
+        "Ethernet96": {
+            "profile_list": "ingress_lossless_zero_profile"
+        },
+        "Ethernet104": {
+            "profile_list": "ingress_lossless_zero_profile"
+        },
+        "Ethernet112": {
+            "profile_list": "ingress_lossless_zero_profile"
+        },
+        "Ethernet120": {
+            "profile_list": "ingress_lossless_zero_profile"
+        },
+        "Ethernet128": {
+            "profile_list": "ingress_lossless_zero_profile"
+        },
+        "Ethernet136": {
+            "profile_list": "ingress_lossless_zero_profile"
+        },
+        "Ethernet144": {
+            "profile_list": "ingress_lossless_zero_profile"
+        },
+        "Ethernet152": {
+            "profile_list": "ingress_lossless_zero_profile"
+        },
+        "Ethernet160": {
+            "profile_list": "ingress_lossless_zero_profile"
+        },
+        "Ethernet168": {
+            "profile_list": "ingress_lossless_zero_profile"
+        },
+        "Ethernet176": {
+            "profile_list": "ingress_lossless_zero_profile"
+        },
+        "Ethernet184": {
+            "profile_list": "ingress_lossless_zero_profile"
+        },
+        "Ethernet192": {
+            "profile_list": "ingress_lossless_zero_profile"
+        },
+        "Ethernet200": {
+            "profile_list": "ingress_lossless_zero_profile"
+        },
+        "Ethernet208": {
+            "profile_list": "ingress_lossless_zero_profile"
+        }
+    },
+    "BUFFER_PORT_EGRESS_PROFILE_LIST": {
+        "Ethernet216": {
+            "profile_list": "egress_lossless_profile,egress_lossy_profile"
+        },
+        "Ethernet224": {
+            "profile_list": "egress_lossy_profile"
+        },
+        "Ethernet232": {
+            "profile_list": "egress_lossy_profile"
+        },
+        "Ethernet240": {
+            "profile_list": "egress_lossy_profile"
+        },
+        "Ethernet248": {
+            "profile_list": "egress_lossy_profile"
+        },
+        "Ethernet0": {
+            "profile_list": "egress_lossless_zero_profile,egress_lossy_zero_profile"
+        },
+        "Ethernet8": {
+            "profile_list": "egress_lossless_zero_profile,egress_lossy_zero_profile"
+        },
+        "Ethernet16": {
+            "profile_list": "egress_lossless_zero_profile,egress_lossy_zero_profile"
+        },
+        "Ethernet24": {
+            "profile_list": "egress_lossless_zero_profile,egress_lossy_zero_profile"
+        },
+        "Ethernet32": {
+            "profile_list": "egress_lossless_zero_profile,egress_lossy_zero_profile"
+        },
+        "Ethernet40": {
+            "profile_list": "egress_lossless_zero_profile,egress_lossy_zero_profile"
+        },
+        "Ethernet48": {
+            "profile_list": "egress_lossless_zero_profile,egress_lossy_zero_profile"
+        },
+        "Ethernet56": {
+            "profile_list": "egress_lossless_zero_profile,egress_lossy_zero_profile"
+        },
+        "Ethernet64": {
+            "profile_list": "egress_lossless_zero_profile,egress_lossy_zero_profile"
+        },
+        "Ethernet72": {
+            "profile_list": "egress_lossless_zero_profile,egress_lossy_zero_profile"
+        },
+        "Ethernet80": {
+            "profile_list": "egress_lossless_zero_profile,egress_lossy_zero_profile"
+        },
+        "Ethernet88": {
+            "profile_list": "egress_lossless_zero_profile,egress_lossy_zero_profile"
+        },
+        "Ethernet96": {
+            "profile_list": "egress_lossless_zero_profile,egress_lossy_zero_profile"
+        },
+        "Ethernet104": {
+            "profile_list": "egress_lossless_zero_profile,egress_lossy_zero_profile"
+        },
+        "Ethernet112": {
+            "profile_list": "egress_lossless_zero_profile,egress_lossy_zero_profile"
+        },
+        "Ethernet120": {
+            "profile_list": "egress_lossless_zero_profile,egress_lossy_zero_profile"
+        },
+        "Ethernet128": {
+            "profile_list": "egress_lossless_zero_profile,egress_lossy_zero_profile"
+        },
+        "Ethernet136": {
+            "profile_list": "egress_lossless_zero_profile,egress_lossy_zero_profile"
+        },
+        "Ethernet144": {
+            "profile_list": "egress_lossless_zero_profile,egress_lossy_zero_profile"
+        },
+        "Ethernet152": {
+            "profile_list": "egress_lossless_zero_profile,egress_lossy_zero_profile"
+        },
+        "Ethernet160": {
+            "profile_list": "egress_lossless_zero_profile,egress_lossy_zero_profile"
+        },
+        "Ethernet168": {
+            "profile_list": "egress_lossless_zero_profile,egress_lossy_zero_profile"
+        },
+        "Ethernet176": {
+            "profile_list": "egress_lossless_zero_profile,egress_lossy_zero_profile"
+        },
+        "Ethernet184": {
+            "profile_list": "egress_lossless_zero_profile,egress_lossy_zero_profile"
+        },
+        "Ethernet192": {
+            "profile_list": "egress_lossless_zero_profile,egress_lossy_zero_profile"
+        },
+        "Ethernet200": {
+            "profile_list": "egress_lossless_zero_profile,egress_lossy_zero_profile"
+        },
+        "Ethernet208": {
+            "profile_list": "egress_lossless_zero_profile,egress_lossy_zero_profile"
+        }
+    },
+    "BUFFER_PG": {
+        "Ethernet216|0": {
+            "profile": "ingress_lossy_profile"
+        },
+        "Ethernet224|3-4": {
+            "profile": "ingress_lossy_profile"
+        },
+        "Ethernet224|0": {
+            "profile": "ingress_lossy_profile"
+        },
+        "Ethernet232|3-4": {
+            "profile": "ingress_lossy_profile"
+        },
+        "Ethernet232|0": {
+            "profile": "ingress_lossy_profile"
+        },
+        "Ethernet240|3-4": {
+            "profile": "ingress_lossy_profile"
+        },
+        "Ethernet240|0": {
+            "profile": "ingress_lossy_profile"
+        },
+        "Ethernet248|3-4": {
+            "profile": "ingress_lossy_profile"
+        },
+        "Ethernet248|0": {
+            "profile": "ingress_lossy_profile"
+        },
+        "Ethernet0|0": {
+            "profile": "ingress_lossy_pg_zero_profile"
+        },
+        "Ethernet8|0": {
+            "profile": "ingress_lossy_pg_zero_profile"
+        },
+        "Ethernet16|0": {
+            "profile": "ingress_lossy_pg_zero_profile"
+        },
+        "Ethernet24|0": {
+            "profile": "ingress_lossy_pg_zero_profile"
+        },
+        "Ethernet32|0": {
+            "profile": "ingress_lossy_pg_zero_profile"
+        },
+        "Ethernet40|0": {
+            "profile": "ingress_lossy_pg_zero_profile"
+        },
+        "Ethernet48|0": {
+            "profile": "ingress_lossy_pg_zero_profile"
+        },
+        "Ethernet56|0": {
+            "profile": "ingress_lossy_pg_zero_profile"
+        },
+        "Ethernet64|0": {
+            "profile": "ingress_lossy_pg_zero_profile"
+        },
+        "Ethernet72|0": {
+            "profile": "ingress_lossy_pg_zero_profile"
+        },
+        "Ethernet80|0": {
+            "profile": "ingress_lossy_pg_zero_profile"
+        },
+        "Ethernet88|0": {
+            "profile": "ingress_lossy_pg_zero_profile"
+        },
+        "Ethernet96|0": {
+            "profile": "ingress_lossy_pg_zero_profile"
+        },
+        "Ethernet104|0": {
+            "profile": "ingress_lossy_pg_zero_profile"
+        },
+        "Ethernet112|0": {
+            "profile": "ingress_lossy_pg_zero_profile"
+        },
+        "Ethernet120|0": {
+            "profile": "ingress_lossy_pg_zero_profile"
+        },
+        "Ethernet128|0": {
+            "profile": "ingress_lossy_pg_zero_profile"
+        },
+        "Ethernet136|0": {
+            "profile": "ingress_lossy_pg_zero_profile"
+        },
+        "Ethernet144|0": {
+            "profile": "ingress_lossy_pg_zero_profile"
+        },
+        "Ethernet152|0": {
+            "profile": "ingress_lossy_pg_zero_profile"
+        },
+        "Ethernet160|0": {
+            "profile": "ingress_lossy_pg_zero_profile"
+        },
+        "Ethernet168|0": {
+            "profile": "ingress_lossy_pg_zero_profile"
+        },
+        "Ethernet176|0": {
+            "profile": "ingress_lossy_pg_zero_profile"
+        },
+        "Ethernet184|0": {
+            "profile": "ingress_lossy_pg_zero_profile"
+        },
+        "Ethernet192|0": {
+            "profile": "ingress_lossy_pg_zero_profile"
+        },
+        "Ethernet200|0": {
+            "profile": "ingress_lossy_pg_zero_profile"
+        },
+        "Ethernet208|0": {
+            "profile": "ingress_lossy_pg_zero_profile"
+        }
+    },
+    "BUFFER_QUEUE": {
+        "Ethernet216|3-4": {
+            "profile": "egress_lossless_profile"
+        },
+        "Ethernet224|3-4": {
+            "profile": "q_lossy_profile"
+        },
+        "Ethernet232|3-4": {
+            "profile": "q_lossy_profile"
+        },
+        "Ethernet240|3-4": {
+            "profile": "q_lossy_profile"
+        },
+        "Ethernet248|3-4": {
+            "profile": "q_lossy_profile"
+        },
+        "Ethernet216|0-2": {
+            "profile": "q_lossy_profile"
+        },
+        "Ethernet224|0-2": {
+            "profile": "q_lossy_profile"
+        },
+        "Ethernet232|0-2": {
+            "profile": "q_lossy_profile"
+        },
+        "Ethernet240|0-2": {
+            "profile": "q_lossy_profile"
+        },
+        "Ethernet248|0-2": {
+            "profile": "q_lossy_profile"
+        },
+        "Ethernet216|5-6": {
+            "profile": "q_lossy_profile"
+        },
+        "Ethernet224|5-6": {
+            "profile": "q_lossy_profile"
+        },
+        "Ethernet232|5-6": {
+            "profile": "q_lossy_profile"
+        },
+        "Ethernet240|5-6": {
+            "profile": "q_lossy_profile"
+        },
+        "Ethernet248|5-6": {
+            "profile": "q_lossy_profile"
+        },
+        "Ethernet0|3-4": {
+            "profile": "egress_lossless_zero_profile"
+        },
+        "Ethernet8|3-4": {
+            "profile": "egress_lossless_zero_profile"
+        },
+        "Ethernet16|3-4": {
+            "profile": "egress_lossless_zero_profile"
+        },
+        "Ethernet24|3-4": {
+            "profile": "egress_lossless_zero_profile"
+        },
+        "Ethernet32|3-4": {
+            "profile": "egress_lossless_zero_profile"
+        },
+        "Ethernet40|3-4": {
+            "profile": "egress_lossless_zero_profile"
+        },
+        "Ethernet48|3-4": {
+            "profile": "egress_lossless_zero_profile"
+        },
+        "Ethernet56|3-4": {
+            "profile": "egress_lossless_zero_profile"
+        },
+        "Ethernet64|3-4": {
+            "profile": "egress_lossless_zero_profile"
+        },
+        "Ethernet72|3-4": {
+            "profile": "egress_lossless_zero_profile"
+        },
+        "Ethernet80|3-4": {
+            "profile": "egress_lossless_zero_profile"
+        },
+        "Ethernet88|3-4": {
+            "profile": "egress_lossless_zero_profile"
+        },
+        "Ethernet96|3-4": {
+            "profile": "egress_lossless_zero_profile"
+        },
+        "Ethernet104|3-4": {
+            "profile": "egress_lossless_zero_profile"
+        },
+        "Ethernet112|3-4": {
+            "profile": "egress_lossless_zero_profile"
+        },
+        "Ethernet120|3-4": {
+            "profile": "egress_lossless_zero_profile"
+        },
+        "Ethernet128|3-4": {
+            "profile": "egress_lossless_zero_profile"
+        },
+        "Ethernet136|3-4": {
+            "profile": "egress_lossless_zero_profile"
+        },
+        "Ethernet144|3-4": {
+            "profile": "egress_lossless_zero_profile"
+        },
+        "Ethernet152|3-4": {
+            "profile": "egress_lossless_zero_profile"
+        },
+        "Ethernet160|3-4": {
+            "profile": "egress_lossless_zero_profile"
+        },
+        "Ethernet168|3-4": {
+            "profile": "egress_lossless_zero_profile"
+        },
+        "Ethernet176|3-4": {
+            "profile": "egress_lossless_zero_profile"
+        },
+        "Ethernet184|3-4": {
+            "profile": "egress_lossless_zero_profile"
+        },
+        "Ethernet192|3-4": {
+            "profile": "egress_lossless_zero_profile"
+        },
+        "Ethernet200|3-4": {
+            "profile": "egress_lossless_zero_profile"
+        },
+        "Ethernet208|3-4": {
+            "profile": "egress_lossless_zero_profile"
+        },
+        "Ethernet0|0-2": {
+            "profile": "egress_lossy_zero_profile"
+        },
+        "Ethernet8|0-2": {
+            "profile": "egress_lossy_zero_profile"
+        },
+        "Ethernet16|0-2": {
+            "profile": "egress_lossy_zero_profile"
+        },
+        "Ethernet24|0-2": {
+            "profile": "egress_lossy_zero_profile"
+        },
+        "Ethernet32|0-2": {
+            "profile": "egress_lossy_zero_profile"
+        },
+        "Ethernet40|0-2": {
+            "profile": "egress_lossy_zero_profile"
+        },
+        "Ethernet48|0-2": {
+            "profile": "egress_lossy_zero_profile"
+        },
+        "Ethernet56|0-2": {
+            "profile": "egress_lossy_zero_profile"
+        },
+        "Ethernet64|0-2": {
+            "profile": "egress_lossy_zero_profile"
+        },
+        "Ethernet72|0-2": {
+            "profile": "egress_lossy_zero_profile"
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+        "Ethernet80|0-2": {
+            "profile": "egress_lossy_zero_profile"
+        },
+        "Ethernet88|0-2": {
+            "profile": "egress_lossy_zero_profile"
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+        "Ethernet96|0-2": {
+            "profile": "egress_lossy_zero_profile"
+        },
+        "Ethernet104|0-2": {
+            "profile": "egress_lossy_zero_profile"
+        },
+        "Ethernet112|0-2": {
+            "profile": "egress_lossy_zero_profile"
+        },
+        "Ethernet120|0-2": {
+            "profile": "egress_lossy_zero_profile"
+        },
+        "Ethernet128|0-2": {
+            "profile": "egress_lossy_zero_profile"
+        },
+        "Ethernet136|0-2": {
+            "profile": "egress_lossy_zero_profile"
+        },
+        "Ethernet144|0-2": {
+            "profile": "egress_lossy_zero_profile"
+        },
+        "Ethernet152|0-2": {
+            "profile": "egress_lossy_zero_profile"
+        },
+        "Ethernet160|0-2": {
+            "profile": "egress_lossy_zero_profile"
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+        "Ethernet168|0-2": {
+            "profile": "egress_lossy_zero_profile"
+        },
+        "Ethernet176|0-2": {
+            "profile": "egress_lossy_zero_profile"
+        },
+        "Ethernet184|0-2": {
+            "profile": "egress_lossy_zero_profile"
+        },
+        "Ethernet192|0-2": {
+            "profile": "egress_lossy_zero_profile"
+        },
+        "Ethernet200|0-2": {
+            "profile": "egress_lossy_zero_profile"
+        },
+        "Ethernet208|0-2": {
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+        },
+        "Ethernet8|5-6": {
+            "profile": "egress_lossy_zero_profile"
+        },
+        "Ethernet16|5-6": {
+            "profile": "egress_lossy_zero_profile"
+        },
+        "Ethernet24|5-6": {
+            "profile": "egress_lossy_zero_profile"
+        },
+        "Ethernet32|5-6": {
+            "profile": "egress_lossy_zero_profile"
+        },
+        "Ethernet40|5-6": {
+            "profile": "egress_lossy_zero_profile"
+        },
+        "Ethernet48|5-6": {
+            "profile": "egress_lossy_zero_profile"
+        },
+        "Ethernet56|5-6": {
+            "profile": "egress_lossy_zero_profile"
+        },
+        "Ethernet64|5-6": {
+            "profile": "egress_lossy_zero_profile"
+        },
+        "Ethernet72|5-6": {
+            "profile": "egress_lossy_zero_profile"
+        },
+        "Ethernet80|5-6": {
+            "profile": "egress_lossy_zero_profile"
+        },
+        "Ethernet88|5-6": {
+            "profile": "egress_lossy_zero_profile"
+        },
+        "Ethernet96|5-6": {
+            "profile": "egress_lossy_zero_profile"
+        },
+        "Ethernet104|5-6": {
+            "profile": "egress_lossy_zero_profile"
+        },
+        "Ethernet112|5-6": {
+            "profile": "egress_lossy_zero_profile"
+        },
+        "Ethernet120|5-6": {
+            "profile": "egress_lossy_zero_profile"
+        },
+        "Ethernet128|5-6": {
+            "profile": "egress_lossy_zero_profile"
+        },
+        "Ethernet136|5-6": {
+            "profile": "egress_lossy_zero_profile"
+        },
+        "Ethernet144|5-6": {
+            "profile": "egress_lossy_zero_profile"
+        },
+        "Ethernet152|5-6": {
+            "profile": "egress_lossy_zero_profile"
+        },
+        "Ethernet160|5-6": {
+            "profile": "egress_lossy_zero_profile"
+        },
+        "Ethernet168|5-6": {
+            "profile": "egress_lossy_zero_profile"
+        },
+        "Ethernet176|5-6": {
+            "profile": "egress_lossy_zero_profile"
+        },
+        "Ethernet184|5-6": {
+            "profile": "egress_lossy_zero_profile"
+        },
+        "Ethernet192|5-6": {
+            "profile": "egress_lossy_zero_profile"
+        },
+        "Ethernet200|5-6": {
+            "profile": "egress_lossy_zero_profile"
+        },
+        "Ethernet208|5-6": {
+            "profile": "egress_lossy_zero_profile"
+        }
+    }
+}
diff --git a/src/sonic-config-engine/tests/sample_output/py3/qos-mellanox4700-o28-t1-smartswitch_dyn.json b/src/sonic-config-engine/tests/sample_output/py3/qos-mellanox4700-o28-t1-smartswitch_dyn.json
new file mode 100644
index 000000000..4afe1c8e2
--- /dev/null
+++ b/src/sonic-config-engine/tests/sample_output/py3/qos-mellanox4700-o28-t1-smartswitch_dyn.json
@@ -0,0 +1,870 @@
+{
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+        },
+        "Ethernet216": {
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+            "tc_to_queue_map": "AZURE",
+            "pfc_enable": "3,4",
+            "pfcwd_sw_enable": "3,4",
+            "tc_to_pg_map": "AZURE",
+            "pfc_to_queue_map": "AZURE"
+        },
+        "Ethernet224": {
+            "dscp_to_tc_map": "AZURE",
+            "tc_to_queue_map": "AZURE",
+            "tc_to_pg_map": "AZURE",
+            "pfc_to_queue_map": "AZURE"
+        },
+        "Ethernet232": {
+            "dscp_to_tc_map": "AZURE",
+            "tc_to_queue_map": "AZURE",
+            "tc_to_pg_map": "AZURE",
+            "pfc_to_queue_map": "AZURE"
+        },
+        "Ethernet240": {
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+            "tc_to_queue_map": "AZURE",
+            "tc_to_pg_map": "AZURE",
+            "pfc_to_queue_map": "AZURE"
+        },
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+            "tc_to_queue_map": "AZURE",
+            "tc_to_pg_map": "AZURE",
+            "pfc_to_queue_map": "AZURE"
+        }
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+            "wred_profile": "AZURE_LOSSLESS"
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+        "Ethernet224|3": {
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+        },
+        "Ethernet232|3": {
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+        },
+        "Ethernet240|3": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet248|3": {
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+        },
+        "Ethernet216|4": {
+            "scheduler": "scheduler.1",
+            "wred_profile": "AZURE_LOSSLESS"
+        },
+        "Ethernet224|4": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet232|4": {
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+        "Ethernet240|4": {
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+        "Ethernet248|4": {
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+        "Ethernet216|0": {
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+        "Ethernet224|0": {
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+        "Ethernet232|0": {
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+        "Ethernet240|0": {
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+        },
+        "Ethernet248|0": {
+            "scheduler": "scheduler.0"
+        },
+        "Ethernet216|1": {
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+        "Ethernet224|1": {
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+        "Ethernet232|1": {
+            "scheduler": "scheduler.0"
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+        "Ethernet240|1": {
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+        "Ethernet248|1": {
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+        },
+        "Ethernet216|2": {
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+        "Ethernet224|2": {
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+        "Ethernet232|2": {
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+        "Ethernet240|2": {
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+        "Ethernet248|2": {
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+        "Ethernet216|5": {
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+        "Ethernet224|5": {
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+        "Ethernet232|5": {
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+        "Ethernet240|5": {
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+        "Ethernet248|5": {
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+        "Ethernet216|6": {
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+        "Ethernet224|6": {
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+        },
+        "Ethernet232|6": {
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+        "Ethernet240|6": {
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+        "Ethernet248|6": {
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+        }
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+            "mode": "dynamic"
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+            "type": "egress",
+            "mode": "dynamic"
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+            "mode": "dynamic"
+        }
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+            "size": "0",
+            "dynamic_th": "7"
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+            "size": "0",
+            "dynamic_th": "3"
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+            "size": "0",
+            "dynamic_th": "7"
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+            "size": "9216",
+            "dynamic_th": "7"
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+        "q_lossy_profile": {
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+            "size": "0",
+            "dynamic_th": "3"
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+            "profile_list": "ingress_lossless_profile"
+        },
+        "Ethernet208": {
+            "profile_list": "ingress_lossless_profile"
+        }
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+        },
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+        },
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+        "Ethernet200": {
+            "profile_list": "egress_lossless_profile,egress_lossy_profile"
+        },
+        "Ethernet208": {
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+        }
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+    "BUFFER_PG": {
+        "Ethernet216|3-4": {
+            "profile": "NULL"
+        },
+        "Ethernet216|0": {
+            "profile": "ingress_lossy_profile"
+        },
+        "Ethernet224|3-4": {
+            "profile": "ingress_lossy_profile"
+        },
+        "Ethernet224|0": {
+            "profile": "ingress_lossy_profile"
+        },
+        "Ethernet232|3-4": {
+            "profile": "ingress_lossy_profile"
+        },
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+            "profile": "ingress_lossy_profile"
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+        "Ethernet240|3-4": {
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+        "Ethernet240|0": {
+            "profile": "ingress_lossy_profile"
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+            "profile": "ingress_lossy_profile"
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+        "Ethernet0|0": {
+            "profile": "ingress_lossy_profile"
+        },
+        "Ethernet8|3-4": {
+            "profile": "ingress_lossy_profile"
+        },
+        "Ethernet8|0": {
+            "profile": "ingress_lossy_profile"
+        },
+        "Ethernet16|3-4": {
+            "profile": "ingress_lossy_profile"
+        },
+        "Ethernet16|0": {
+            "profile": "ingress_lossy_profile"
+        },
+        "Ethernet24|3-4": {
+            "profile": "ingress_lossy_profile"
+        },
+        "Ethernet24|0": {
+            "profile": "ingress_lossy_profile"
+        },
+        "Ethernet32|3-4": {
+            "profile": "ingress_lossy_profile"
+        },
+        "Ethernet32|0": {
+            "profile": "ingress_lossy_profile"
+        },
+        "Ethernet40|3-4": {
+            "profile": "ingress_lossy_profile"
+        },
+        "Ethernet40|0": {
+            "profile": "ingress_lossy_profile"
+        },
+        "Ethernet48|3-4": {
+            "profile": "ingress_lossy_profile"
+        },
+        "Ethernet48|0": {
+            "profile": "ingress_lossy_profile"
+        },
+        "Ethernet56|3-4": {
+            "profile": "ingress_lossy_profile"
+        },
+        "Ethernet56|0": {
+            "profile": "ingress_lossy_profile"
+        },
+        "Ethernet64|3-4": {
+            "profile": "ingress_lossy_profile"
+        },
+        "Ethernet64|0": {
+            "profile": "ingress_lossy_profile"
+        },
+        "Ethernet72|3-4": {
+            "profile": "ingress_lossy_profile"
+        },
+        "Ethernet72|0": {
+            "profile": "ingress_lossy_profile"
+        },
+        "Ethernet80|3-4": {
+            "profile": "ingress_lossy_profile"
+        },
+        "Ethernet80|0": {
+            "profile": "ingress_lossy_profile"
+        },
+        "Ethernet88|3-4": {
+            "profile": "ingress_lossy_profile"
+        },
+        "Ethernet88|0": {
+            "profile": "ingress_lossy_profile"
+        },
+        "Ethernet96|3-4": {
+            "profile": "ingress_lossy_profile"
+        },
+        "Ethernet96|0": {
+            "profile": "ingress_lossy_profile"
+        },
+        "Ethernet104|3-4": {
+            "profile": "ingress_lossy_profile"
+        },
+        "Ethernet104|0": {
+            "profile": "ingress_lossy_profile"
+        },
+        "Ethernet112|3-4": {
+            "profile": "ingress_lossy_profile"
+        },
+        "Ethernet112|0": {
+            "profile": "ingress_lossy_profile"
+        },
+        "Ethernet120|3-4": {
+            "profile": "ingress_lossy_profile"
+        },
+        "Ethernet120|0": {
+            "profile": "ingress_lossy_profile"
+        },
+        "Ethernet128|3-4": {
+            "profile": "ingress_lossy_profile"
+        },
+        "Ethernet128|0": {
+            "profile": "ingress_lossy_profile"
+        },
+        "Ethernet136|3-4": {
+            "profile": "ingress_lossy_profile"
+        },
+        "Ethernet136|0": {
+            "profile": "ingress_lossy_profile"
+        },
+        "Ethernet144|3-4": {
+            "profile": "ingress_lossy_profile"
+        },
+        "Ethernet144|0": {
+            "profile": "ingress_lossy_profile"
+        },
+        "Ethernet152|3-4": {
+            "profile": "ingress_lossy_profile"
+        },
+        "Ethernet152|0": {
+            "profile": "ingress_lossy_profile"
+        },
+        "Ethernet160|3-4": {
+            "profile": "ingress_lossy_profile"
+        },
+        "Ethernet160|0": {
+            "profile": "ingress_lossy_profile"
+        },
+        "Ethernet168|3-4": {
+            "profile": "ingress_lossy_profile"
+        },
+        "Ethernet168|0": {
+            "profile": "ingress_lossy_profile"
+        },
+        "Ethernet176|3-4": {
+            "profile": "ingress_lossy_profile"
+        },
+        "Ethernet176|0": {
+            "profile": "ingress_lossy_profile"
+        },
+        "Ethernet184|3-4": {
+            "profile": "ingress_lossy_profile"
+        },
+        "Ethernet184|0": {
+            "profile": "ingress_lossy_profile"
+        },
+        "Ethernet192|3-4": {
+            "profile": "ingress_lossy_profile"
+        },
+        "Ethernet192|0": {
+            "profile": "ingress_lossy_profile"
+        },
+        "Ethernet200|3-4": {
+            "profile": "ingress_lossy_profile"
+        },
+        "Ethernet200|0": {
+            "profile": "ingress_lossy_profile"
+        },
+        "Ethernet208|3-4": {
+            "profile": "ingress_lossy_profile"
+        },
+        "Ethernet208|0": {
+            "profile": "ingress_lossy_profile"
+        }
+    },
+    "BUFFER_QUEUE": {
+        "Ethernet216|3-4": {
+            "profile": "egress_lossless_profile"
+        },
+        "Ethernet224|3-4": {
+            "profile": "q_lossy_profile"
+        },
+        "Ethernet232|3-4": {
+            "profile": "q_lossy_profile"
+        },
+        "Ethernet240|3-4": {
+            "profile": "q_lossy_profile"
+        },
+        "Ethernet248|3-4": {
+            "profile": "q_lossy_profile"
+        },
+        "Ethernet216|0-2": {
+            "profile": "q_lossy_profile"
+        },
+        "Ethernet224|0-2": {
+            "profile": "q_lossy_profile"
+        },
+        "Ethernet232|0-2": {
+            "profile": "q_lossy_profile"
+        },
+        "Ethernet240|0-2": {
+            "profile": "q_lossy_profile"
+        },
+        "Ethernet248|0-2": {
+            "profile": "q_lossy_profile"
+        },
+        "Ethernet216|5-6": {
+            "profile": "q_lossy_profile"
+        },
+        "Ethernet224|5-6": {
+            "profile": "q_lossy_profile"
+        },
+        "Ethernet232|5-6": {
+            "profile": "q_lossy_profile"
+        },
+        "Ethernet240|5-6": {
+            "profile": "q_lossy_profile"
+        },
+        "Ethernet248|5-6": {
+            "profile": "q_lossy_profile"
+        },
+        "Ethernet0|3-4": {
+            "profile": "egress_lossless_profile"
+        },
+        "Ethernet8|3-4": {
+            "profile": "egress_lossless_profile"
+        },
+        "Ethernet16|3-4": {
+            "profile": "egress_lossless_profile"
+        },
+        "Ethernet24|3-4": {
+            "profile": "egress_lossless_profile"
+        },
+        "Ethernet32|3-4": {
+            "profile": "egress_lossless_profile"
+        },
+        "Ethernet40|3-4": {
+            "profile": "egress_lossless_profile"
+        },
+        "Ethernet48|3-4": {
+            "profile": "egress_lossless_profile"
+        },
+        "Ethernet56|3-4": {
+            "profile": "egress_lossless_profile"
+        },
+        "Ethernet64|3-4": {
+            "profile": "egress_lossless_profile"
+        },
+        "Ethernet72|3-4": {
+            "profile": "egress_lossless_profile"
+        },
+        "Ethernet80|3-4": {
+            "profile": "egress_lossless_profile"
+        },
+        "Ethernet88|3-4": {
+            "profile": "egress_lossless_profile"
+        },
+        "Ethernet96|3-4": {
+            "profile": "egress_lossless_profile"
+        },
+        "Ethernet104|3-4": {
+            "profile": "egress_lossless_profile"
+        },
+        "Ethernet112|3-4": {
+            "profile": "egress_lossless_profile"
+        },
+        "Ethernet120|3-4": {
+            "profile": "egress_lossless_profile"
+        },
+        "Ethernet128|3-4": {
+            "profile": "egress_lossless_profile"
+        },
+        "Ethernet136|3-4": {
+            "profile": "egress_lossless_profile"
+        },
+        "Ethernet144|3-4": {
+            "profile": "egress_lossless_profile"
+        },
+        "Ethernet152|3-4": {
+            "profile": "egress_lossless_profile"
+        },
+        "Ethernet160|3-4": {
+            "profile": "egress_lossless_profile"
+        },
+        "Ethernet168|3-4": {
+            "profile": "egress_lossless_profile"
+        },
+        "Ethernet176|3-4": {
+            "profile": "egress_lossless_profile"
+        },
+        "Ethernet184|3-4": {
+            "profile": "egress_lossless_profile"
+        },
+        "Ethernet192|3-4": {
+            "profile": "egress_lossless_profile"
+        },
+        "Ethernet200|3-4": {
+            "profile": "egress_lossless_profile"
+        },
+        "Ethernet208|3-4": {
+            "profile": "egress_lossless_profile"
+        },
+        "Ethernet0|0-2": {
+            "profile": "q_lossy_profile"
+        },
+        "Ethernet8|0-2": {
+            "profile": "q_lossy_profile"
+        },
+        "Ethernet16|0-2": {
+            "profile": "q_lossy_profile"
+        },
+        "Ethernet24|0-2": {
+            "profile": "q_lossy_profile"
+        },
+        "Ethernet32|0-2": {
+            "profile": "q_lossy_profile"
+        },
+        "Ethernet40|0-2": {
+            "profile": "q_lossy_profile"
+        },
+        "Ethernet48|0-2": {
+            "profile": "q_lossy_profile"
+        },
+        "Ethernet56|0-2": {
+            "profile": "q_lossy_profile"
+        },
+        "Ethernet64|0-2": {
+            "profile": "q_lossy_profile"
+        },
+        "Ethernet72|0-2": {
+            "profile": "q_lossy_profile"
+        },
+        "Ethernet80|0-2": {
+            "profile": "q_lossy_profile"
+        },
+        "Ethernet88|0-2": {
+            "profile": "q_lossy_profile"
+        },
+        "Ethernet96|0-2": {
+            "profile": "q_lossy_profile"
+        },
+        "Ethernet104|0-2": {
+            "profile": "q_lossy_profile"
+        },
+        "Ethernet112|0-2": {
+            "profile": "q_lossy_profile"
+        },
+        "Ethernet120|0-2": {
+            "profile": "q_lossy_profile"
+        },
+        "Ethernet128|0-2": {
+            "profile": "q_lossy_profile"
+        },
+        "Ethernet136|0-2": {
+            "profile": "q_lossy_profile"
+        },
+        "Ethernet144|0-2": {
+            "profile": "q_lossy_profile"
+        },
+        "Ethernet152|0-2": {
+            "profile": "q_lossy_profile"
+        },
+        "Ethernet160|0-2": {
+            "profile": "q_lossy_profile"
+        },
+        "Ethernet168|0-2": {
+            "profile": "q_lossy_profile"
+        },
+        "Ethernet176|0-2": {
+            "profile": "q_lossy_profile"
+        },
+        "Ethernet184|0-2": {
+            "profile": "q_lossy_profile"
+        },
+        "Ethernet192|0-2": {
+            "profile": "q_lossy_profile"
+        },
+        "Ethernet200|0-2": {
+            "profile": "q_lossy_profile"
+        },
+        "Ethernet208|0-2": {
+            "profile": "q_lossy_profile"
+        },
+        "Ethernet0|5-6": {
+            "profile": "q_lossy_profile"
+        },
+        "Ethernet8|5-6": {
+            "profile": "q_lossy_profile"
+        },
+        "Ethernet16|5-6": {
+            "profile": "q_lossy_profile"
+        },
+        "Ethernet24|5-6": {
+            "profile": "q_lossy_profile"
+        },
+        "Ethernet32|5-6": {
+            "profile": "q_lossy_profile"
+        },
+        "Ethernet40|5-6": {
+            "profile": "q_lossy_profile"
+        },
+        "Ethernet48|5-6": {
+            "profile": "q_lossy_profile"
+        },
+        "Ethernet56|5-6": {
+            "profile": "q_lossy_profile"
+        },
+        "Ethernet64|5-6": {
+            "profile": "q_lossy_profile"
+        },
+        "Ethernet72|5-6": {
+            "profile": "q_lossy_profile"
+        },
+        "Ethernet80|5-6": {
+            "profile": "q_lossy_profile"
+        },
+        "Ethernet88|5-6": {
+            "profile": "q_lossy_profile"
+        },
+        "Ethernet96|5-6": {
+            "profile": "q_lossy_profile"
+        },
+        "Ethernet104|5-6": {
+            "profile": "q_lossy_profile"
+        },
+        "Ethernet112|5-6": {
+            "profile": "q_lossy_profile"
+        },
+        "Ethernet120|5-6": {
+            "profile": "q_lossy_profile"
+        },
+        "Ethernet128|5-6": {
+            "profile": "q_lossy_profile"
+        },
+        "Ethernet136|5-6": {
+            "profile": "q_lossy_profile"
+        },
+        "Ethernet144|5-6": {
+            "profile": "q_lossy_profile"
+        },
+        "Ethernet152|5-6": {
+            "profile": "q_lossy_profile"
+        },
+        "Ethernet160|5-6": {
+            "profile": "q_lossy_profile"
+        },
+        "Ethernet168|5-6": {
+            "profile": "q_lossy_profile"
+        },
+        "Ethernet176|5-6": {
+            "profile": "q_lossy_profile"
+        },
+        "Ethernet184|5-6": {
+            "profile": "q_lossy_profile"
+        },
+        "Ethernet192|5-6": {
+            "profile": "q_lossy_profile"
+        },
+        "Ethernet200|5-6": {
+            "profile": "q_lossy_profile"
+        },
+        "Ethernet208|5-6": {
+            "profile": "q_lossy_profile"
+        }
+    }
+}
diff --git a/src/sonic-config-engine/tests/test_j2files.py b/src/sonic-config-engine/tests/test_j2files.py
index 5afd6ed0b..ed8ed58e4 100644
--- a/src/sonic-config-engine/tests/test_j2files.py
+++ b/src/sonic-config-engine/tests/test_j2files.py
@@ -506,6 +506,58 @@ def test_qos_dscp_remapping_render_template(self):
             assert utils.cmp(sample_output_file, test_output)
             os.remove(test_output)
 
+    def test_qos_smartswitch_render_template(self):
+        if utils.PYvX_DIR != 'py3':
+            # Skip on python2 as the change will not be backported to previous version
+            return
+
+        dir_paths = [
+            '../../../device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28',
+            '../../../device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28'
+        ]
+        sample_outputs = [
+            'qos-mellanox4700-o28-t1-smartswitch.json',
+            'qos-mellanox4700-o28-t1-smartswitch_dyn.json'
+        ]
+        sample_minigraph_files = [
+            'sample-mellanox-4700-t1-minigraph-smartswitch.xml',
+            'sample-mellanox-4700-t1-minigraph-smartswitch.xml'
+        ]
+        buffer_files = [
+            'buffers.json.j2', # traditional buffer mode
+            'buffers_dynamic.json.j2' # dynamic buffer mode
+        ]
+
+        for i, path in enumerate(dir_paths):
+            device_template_path = os.path.join(self.test_dir, path)
+            sample_output = sample_outputs[i]
+            sample_minigraph_file = os.path.join(self.test_dir,sample_minigraph_files[i])
+            qos_file = os.path.join(device_template_path, 'qos.json.j2')
+            buf_file = os.path.join(device_template_path, buffer_files[i])
+            hwsku_json_file = os.path.join(device_template_path, 'hwsku.json')
+            plat_json_file = os.path.join(device_template_path, '../platform.json')
+            test_output = os.path.join(self.test_dir, 'output.json')
+
+            # copy qos_config.j2 & buffer_config.j2 to the target directory to have all templates in one directory
+            qos_config_file = os.path.join(self.test_dir, '..', '..', '..', 'files', 'build_templates', 'qos_config.j2')
+            shutil.copy2(qos_config_file, device_template_path)
+
+            buf_config_file = os.path.join(self.test_dir, '..', '..', '..', 'files', 'build_templates', 'buffers_config.j2')
+            shutil.copy2(buf_config_file, device_template_path)
+
+            argument = ['-m', sample_minigraph_file, '-p', plat_json_file, '-S', hwsku_json_file, '-t', "{},config-db".format(qos_file), '-t', "{},config-db".format(buf_file), '--print-data']
+            self.run_script(argument, output_file=test_output)
+
+            # cleanup
+            qos_config_file_new = os.path.join(device_template_path, 'qos_config.j2')
+            os.remove(qos_config_file_new)
+            buf_config_file_new = os.path.join(device_template_path, 'buffers_config.j2')
+            os.remove(buf_config_file_new)
+
+            sample_output_file = os.path.join(self.test_dir, 'sample_output', utils.PYvX_DIR, sample_output)
+            assert utils.cmp_tables(sample_output_file, test_output)
+            os.remove(test_output)
+
     def test_config_brcm_render_template(self):
         if utils.PYvX_DIR != 'py3':
             #Skip on python2 as the change will not be backported to previous version

From fb80d37bfe687ee86286c4db1ef85fabf8d365fa Mon Sep 17 00:00:00 2001
From: abdosi <58047199+abdosi@users.noreply.github.com>
Date: Thu, 1 Aug 2024 12:33:23 -0700
Subject: [PATCH 0868/1115] [VOQ] Fix the parsing of core_port_id and core_id
 for Inband and Recirc Port. (#19755)

[VOQ] Fix the parsing of core_port_id and core_id for Inband and Recirc Port.
Signed-off-by: Abhishek Dosi <abdosi@microsoft.com>
---
 src/sonic-config-engine/minigraph.py                 | 4 ++--
 src/sonic-config-engine/tests/test_chassis_cfggen.py | 6 +++---
 2 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/src/sonic-config-engine/minigraph.py b/src/sonic-config-engine/minigraph.py
index d6c811552..ed557d55e 100644
--- a/src/sonic-config-engine/minigraph.py
+++ b/src/sonic-config-engine/minigraph.py
@@ -127,9 +127,9 @@ def get_voq_intf_attributes(ports):
             core_port_index = None
             speed = None
             for k,v in ports.get(port, {}).items():
-                if k.lower() == 'coreid':
+                if k.lower() == 'core_id':
                     core_id = v
-                if k.lower() == 'coreportid':
+                if k.lower() == 'core_port_id':
                     core_port_index = v
                 if k.lower() == 'speed':
                     speed = v
diff --git a/src/sonic-config-engine/tests/test_chassis_cfggen.py b/src/sonic-config-engine/tests/test_chassis_cfggen.py
index c5f1e148e..83d4be6f3 100644
--- a/src/sonic-config-engine/tests/test_chassis_cfggen.py
+++ b/src/sonic-config-engine/tests/test_chassis_cfggen.py
@@ -182,7 +182,7 @@ def test_system_port(self):
         expected_output_file = os.path.join(
             self.test_data_dir, 'system_ports.json')
         self.run_script(argument, output_file=self.output_file)
-        self.assertTrue(self.run_diff(expected_output_file, self.output_file))
+        self.assertFalse(self.run_diff(expected_output_file, self.output_file))
         if os.path.exists(self.output_file):
             os.remove(self.output_file)
 
@@ -479,11 +479,11 @@ def test_system_port(self):
         argument = ['-m', self.sample_graph,
                     '-p', self.sample_port_config,
                     '-n', 'asic0',
-                    '--var-json', 'DEVICE_METADATA']
+                    '--var-json', 'SYSTEM_PORT']
         expected_output_file = os.path.join(
             self.test_data_dir, 'system_ports.json')
         self.run_script(argument, output_file=self.output_file)
-        self.assertTrue(self.run_diff(expected_output_file, self.output_file))
+        self.assertFalse(self.run_diff(expected_output_file, self.output_file))
         if os.path.exists(self.output_file):
             os.remove(self.output_file)
 

From 37f32b1533918ac937c7a5892c3ab4937578ba34 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Fri, 2 Aug 2024 19:06:08 +0800
Subject: [PATCH 0869/1115] [submodule] Update submodule sonic-platform-common
 to the latest HEAD automatically (#19770)

#### Why I did it
src/sonic-platform-common
```
* 7f07fa6 - (HEAD -> master, origin/master, origin/HEAD) Parse all VDM advertised fields during DOM monitoring (#486) (4 hours ago) [mihirpat1]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-platform-common | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-platform-common b/src/sonic-platform-common
index 30895d1a9..7f07fa68e 160000
--- a/src/sonic-platform-common
+++ b/src/sonic-platform-common
@@ -1 +1 @@
-Subproject commit 30895d1a98099935852c6aa170acd8ab16262039
+Subproject commit 7f07fa68eff8954cbd36400d39fd6f3d81b9a850

From 4563c32f5f3e756866706f4c6e056813c3ccdc31 Mon Sep 17 00:00:00 2001
From: Vineet  Mittal <46945843+vmittal-msft@users.noreply.github.com>
Date: Fri, 2 Aug 2024 23:17:23 -0700
Subject: [PATCH 0870/1115] Updated MMU settings for ingress lossy profile
 Nokia and Arista chassis (#19653)

Updated lossy PG threshold to be higher than Queue threshold not to allow PFC generation.
---
 .../Arista-7800R3-48CQ2-C48/buffers_defaults_t2.j2              | 2 +-
 .../Arista-7800R3-48CQM2-C48/buffers_defaults_t2.j2             | 2 +-
 .../Arista-7800R3A-36D2-C36/0/buffers_defaults_t2.j2            | 2 +-
 .../Arista-7800R3A-36D2-C36/1/buffers_defaults_t2.j2            | 2 +-
 .../Arista-7800R3A-36D2-C72/0/buffers_defaults_t2.j2            | 2 +-
 .../Arista-7800R3A-36D2-C72/1/buffers_defaults_t2.j2            | 2 +-
 .../Arista-7800R3A-36D2-D36/0/buffers_defaults_t2.j2            | 2 +-
 .../Arista-7800R3A-36D2-D36/1/buffers_defaults_t2.j2            | 2 +-
 .../Nokia-IXR7250E-36x100G/0/buffers_defaults_t2.j2             | 2 +-
 .../Nokia-IXR7250E-36x100G/1/buffers_defaults_t2.j2             | 2 +-
 .../Nokia-IXR7250E-36x400G/0/buffers_defaults_t2.j2             | 2 +-
 .../Nokia-IXR7250E-36x400G/1/buffers_defaults_t2.j2             | 2 +-
 .../tests/sample_output/py2/buffer-arista7800r3-48cq2-lc.json   | 2 +-
 .../tests/sample_output/py2/buffer-arista7800r3-48cqm2-lc.json  | 2 +-
 .../sample_output/py2/buffer-arista7800r3a-36dm2-c36-lc.json    | 2 +-
 .../sample_output/py2/buffer-arista7800r3a-36dm2-d36-lc.json    | 2 +-
 .../tests/sample_output/py2/buffer-nokia-ixr7250e-36x100g.json  | 2 +-
 .../tests/sample_output/py2/buffer-nokia-ixr7250e-36x400g.json  | 2 +-
 .../tests/sample_output/py3/buffer-arista7800r3-48cq2-lc.json   | 2 +-
 .../tests/sample_output/py3/buffer-arista7800r3-48cqm2-lc.json  | 2 +-
 .../sample_output/py3/buffer-arista7800r3a-36dm2-c36-lc.json    | 2 +-
 .../sample_output/py3/buffer-arista7800r3a-36dm2-d36-lc.json    | 2 +-
 .../tests/sample_output/py3/buffer-nokia-ixr7250e-36x100g.json  | 2 +-
 .../tests/sample_output/py3/buffer-nokia-ixr7250e-36x400g.json  | 2 +-
 24 files changed, 24 insertions(+), 24 deletions(-)

diff --git a/device/arista/x86_64-arista_7800r3_48cq2_lc/Arista-7800R3-48CQ2-C48/buffers_defaults_t2.j2 b/device/arista/x86_64-arista_7800r3_48cq2_lc/Arista-7800R3-48CQ2-C48/buffers_defaults_t2.j2
index 815ebd405..efee1fee3 100644
--- a/device/arista/x86_64-arista_7800r3_48cq2_lc/Arista-7800R3-48CQ2-C48/buffers_defaults_t2.j2
+++ b/device/arista/x86_64-arista_7800r3_48cq2_lc/Arista-7800R3-48CQ2-C48/buffers_defaults_t2.j2
@@ -30,7 +30,7 @@
             "pool":"ingress_lossless_pool",
             "size":"0",
 	    "xon_offset": "0",
-            "dynamic_th":"-6"
+            "dynamic_th":"0"
         },
         "egress_lossless_profile": {
             "pool":"ingress_lossless_pool",
diff --git a/device/arista/x86_64-arista_7800r3_48cqm2_lc/Arista-7800R3-48CQM2-C48/buffers_defaults_t2.j2 b/device/arista/x86_64-arista_7800r3_48cqm2_lc/Arista-7800R3-48CQM2-C48/buffers_defaults_t2.j2
index f91b03d4c..5825848d4 100644
--- a/device/arista/x86_64-arista_7800r3_48cqm2_lc/Arista-7800R3-48CQM2-C48/buffers_defaults_t2.j2
+++ b/device/arista/x86_64-arista_7800r3_48cqm2_lc/Arista-7800R3-48CQM2-C48/buffers_defaults_t2.j2
@@ -30,7 +30,7 @@
             "pool":"ingress_lossless_pool",
             "size":"0",
 	    "xon_offset": "0",
-            "dynamic_th":"-6"
+            "dynamic_th":"0"
         },
         "egress_lossless_profile": {
             "pool":"ingress_lossless_pool",
diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/0/buffers_defaults_t2.j2 b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/0/buffers_defaults_t2.j2
index 101abdf63..35a7f5357 100644
--- a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/0/buffers_defaults_t2.j2
+++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/0/buffers_defaults_t2.j2
@@ -30,7 +30,7 @@
             "pool":"ingress_lossless_pool",
             "size":"0",
 	    "xon_offset": "0",
-            "dynamic_th":"-6"
+            "dynamic_th":"0"
         },
         "egress_lossless_profile": {
             "pool":"ingress_lossless_pool",
diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/1/buffers_defaults_t2.j2 b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/1/buffers_defaults_t2.j2
index f95714f3a..18bf47b01 100644
--- a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/1/buffers_defaults_t2.j2
+++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/1/buffers_defaults_t2.j2
@@ -30,7 +30,7 @@
             "pool":"ingress_lossless_pool",
             "size":"0",
 	    "xon_offset": "0",
-            "dynamic_th":"-6"
+            "dynamic_th":"0"
         },
         "egress_lossless_profile": {
             "pool":"ingress_lossless_pool",
diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/0/buffers_defaults_t2.j2 b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/0/buffers_defaults_t2.j2
index a6315537d..b49aea940 100644
--- a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/0/buffers_defaults_t2.j2
+++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/0/buffers_defaults_t2.j2
@@ -30,7 +30,7 @@
             "pool":"ingress_lossless_pool",
             "size":"0   ",
 	    "xon_offset": "0",
-            "dynamic_th":"-6"
+            "dynamic_th":"0"
         },
         "egress_lossless_profile": {
             "pool":"ingress_lossless_pool",
diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/1/buffers_defaults_t2.j2 b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/1/buffers_defaults_t2.j2
index 1510e398a..9fa59b61c 100644
--- a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/1/buffers_defaults_t2.j2
+++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/1/buffers_defaults_t2.j2
@@ -30,7 +30,7 @@
             "pool":"ingress_lossless_pool",
             "size":"0",
 	    "xon_offset": "0",
-            "dynamic_th":"-6"
+            "dynamic_th":"0"
         },
         "egress_lossless_profile": {
             "pool":"ingress_lossless_pool",
diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/0/buffers_defaults_t2.j2 b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/0/buffers_defaults_t2.j2
index 0df82f166..615280ab2 100644
--- a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/0/buffers_defaults_t2.j2
+++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/0/buffers_defaults_t2.j2
@@ -30,7 +30,7 @@
             "pool":"ingress_lossless_pool",
             "size":"0",
 	    "xon_offset": "0",
-            "dynamic_th":"-5"
+            "dynamic_th":"0"
         },
         "egress_lossless_profile": {
             "pool":"ingress_lossless_pool",
diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/1/buffers_defaults_t2.j2 b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/1/buffers_defaults_t2.j2
index 4e66dfe09..407058909 100644
--- a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/1/buffers_defaults_t2.j2
+++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/1/buffers_defaults_t2.j2
@@ -30,7 +30,7 @@
             "pool":"ingress_lossless_pool",
             "size":"0",
 	    "xon_offset": "0",
-            "dynamic_th":"-5"
+            "dynamic_th":"0"
         },
         "egress_lossless_profile": {
             "pool":"ingress_lossless_pool",
diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/0/buffers_defaults_t2.j2 b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/0/buffers_defaults_t2.j2
index efa127423..030060d45 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/0/buffers_defaults_t2.j2
+++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/0/buffers_defaults_t2.j2
@@ -30,7 +30,7 @@
             "pool":"ingress_lossless_pool",
             "size":"0",
 	    "xon_offset": "0",
-            "dynamic_th":"-6"
+            "dynamic_th":"0"
         },
         "egress_lossless_profile": {
             "pool":"ingress_lossless_pool",
diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/1/buffers_defaults_t2.j2 b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/1/buffers_defaults_t2.j2
index efa127423..030060d45 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/1/buffers_defaults_t2.j2
+++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/1/buffers_defaults_t2.j2
@@ -30,7 +30,7 @@
             "pool":"ingress_lossless_pool",
             "size":"0",
 	    "xon_offset": "0",
-            "dynamic_th":"-6"
+            "dynamic_th":"0"
         },
         "egress_lossless_profile": {
             "pool":"ingress_lossless_pool",
diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/0/buffers_defaults_t2.j2 b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/0/buffers_defaults_t2.j2
index 2b6dd17b6..3fb88267a 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/0/buffers_defaults_t2.j2
+++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/0/buffers_defaults_t2.j2
@@ -30,7 +30,7 @@
             "pool":"ingress_lossless_pool",
             "size":"0",
 	    "xon_offset": "0",
-            "dynamic_th":"-5"
+            "dynamic_th":"0"
         },
         "egress_lossless_profile": {
             "pool":"ingress_lossless_pool",
diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/1/buffers_defaults_t2.j2 b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/1/buffers_defaults_t2.j2
index 2b6dd17b6..3fb88267a 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/1/buffers_defaults_t2.j2
+++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/1/buffers_defaults_t2.j2
@@ -30,7 +30,7 @@
             "pool":"ingress_lossless_pool",
             "size":"0",
 	    "xon_offset": "0",
-            "dynamic_th":"-5"
+            "dynamic_th":"0"
         },
         "egress_lossless_profile": {
             "pool":"ingress_lossless_pool",
diff --git a/src/sonic-config-engine/tests/sample_output/py2/buffer-arista7800r3-48cq2-lc.json b/src/sonic-config-engine/tests/sample_output/py2/buffer-arista7800r3-48cq2-lc.json
index c0d5fcded..35b9c69d4 100644
--- a/src/sonic-config-engine/tests/sample_output/py2/buffer-arista7800r3-48cq2-lc.json
+++ b/src/sonic-config-engine/tests/sample_output/py2/buffer-arista7800r3-48cq2-lc.json
@@ -65,7 +65,7 @@
             "pool":"ingress_lossless_pool",
             "size":"0",
             "xon_offset":"0",
-            "dynamic_th":"-6"
+            "dynamic_th":"0"
         },
         "egress_lossless_profile": {
             "pool":"ingress_lossless_pool",
diff --git a/src/sonic-config-engine/tests/sample_output/py2/buffer-arista7800r3-48cqm2-lc.json b/src/sonic-config-engine/tests/sample_output/py2/buffer-arista7800r3-48cqm2-lc.json
index 880e426c5..ebca473bc 100644
--- a/src/sonic-config-engine/tests/sample_output/py2/buffer-arista7800r3-48cqm2-lc.json
+++ b/src/sonic-config-engine/tests/sample_output/py2/buffer-arista7800r3-48cqm2-lc.json
@@ -65,7 +65,7 @@
             "pool":"ingress_lossless_pool",
             "size":"0",
             "xon_offset":"0",
-            "dynamic_th":"-6"
+            "dynamic_th":"0"
         },
         "egress_lossless_profile": {
             "pool":"ingress_lossless_pool",
diff --git a/src/sonic-config-engine/tests/sample_output/py2/buffer-arista7800r3a-36dm2-c36-lc.json b/src/sonic-config-engine/tests/sample_output/py2/buffer-arista7800r3a-36dm2-c36-lc.json
index fc22a9c48..6ab0f7c68 100644
--- a/src/sonic-config-engine/tests/sample_output/py2/buffer-arista7800r3a-36dm2-c36-lc.json
+++ b/src/sonic-config-engine/tests/sample_output/py2/buffer-arista7800r3a-36dm2-c36-lc.json
@@ -35,7 +35,7 @@
             "pool":"ingress_lossless_pool",
             "size":"0",
 	    "xon_offset": "0",
-            "dynamic_th":"-6"
+            "dynamic_th":"0"
         },
         "egress_lossless_profile": {
             "pool":"ingress_lossless_pool",
diff --git a/src/sonic-config-engine/tests/sample_output/py2/buffer-arista7800r3a-36dm2-d36-lc.json b/src/sonic-config-engine/tests/sample_output/py2/buffer-arista7800r3a-36dm2-d36-lc.json
index 09278e3ef..ba77ebdcf 100644
--- a/src/sonic-config-engine/tests/sample_output/py2/buffer-arista7800r3a-36dm2-d36-lc.json
+++ b/src/sonic-config-engine/tests/sample_output/py2/buffer-arista7800r3a-36dm2-d36-lc.json
@@ -35,7 +35,7 @@
             "pool":"ingress_lossless_pool",
             "size":"0",
 	    "xon_offset": "0",
-            "dynamic_th":"-5"
+            "dynamic_th":"0"
         },
         "egress_lossless_profile": {
             "pool":"ingress_lossless_pool",
diff --git a/src/sonic-config-engine/tests/sample_output/py2/buffer-nokia-ixr7250e-36x100g.json b/src/sonic-config-engine/tests/sample_output/py2/buffer-nokia-ixr7250e-36x100g.json
index 29201518d..4ed219574 100644
--- a/src/sonic-config-engine/tests/sample_output/py2/buffer-nokia-ixr7250e-36x100g.json
+++ b/src/sonic-config-engine/tests/sample_output/py2/buffer-nokia-ixr7250e-36x100g.json
@@ -35,7 +35,7 @@
             "pool":"ingress_lossless_pool",
             "size":"0",
 	    "xon_offset": "0",
-            "dynamic_th":"-6"
+            "dynamic_th":"0"
         },
         "egress_lossless_profile": {
             "pool":"ingress_lossless_pool",
diff --git a/src/sonic-config-engine/tests/sample_output/py2/buffer-nokia-ixr7250e-36x400g.json b/src/sonic-config-engine/tests/sample_output/py2/buffer-nokia-ixr7250e-36x400g.json
index 9e5058ec1..7b8186206 100644
--- a/src/sonic-config-engine/tests/sample_output/py2/buffer-nokia-ixr7250e-36x400g.json
+++ b/src/sonic-config-engine/tests/sample_output/py2/buffer-nokia-ixr7250e-36x400g.json
@@ -35,7 +35,7 @@
             "pool":"ingress_lossless_pool",
             "size":"0",
 	    "xon_offset": "0",
-            "dynamic_th":"-5"
+            "dynamic_th":"0"
         },
         "egress_lossless_profile": {
             "pool":"ingress_lossless_pool",
diff --git a/src/sonic-config-engine/tests/sample_output/py3/buffer-arista7800r3-48cq2-lc.json b/src/sonic-config-engine/tests/sample_output/py3/buffer-arista7800r3-48cq2-lc.json
index c0d5fcded..35b9c69d4 100644
--- a/src/sonic-config-engine/tests/sample_output/py3/buffer-arista7800r3-48cq2-lc.json
+++ b/src/sonic-config-engine/tests/sample_output/py3/buffer-arista7800r3-48cq2-lc.json
@@ -65,7 +65,7 @@
             "pool":"ingress_lossless_pool",
             "size":"0",
             "xon_offset":"0",
-            "dynamic_th":"-6"
+            "dynamic_th":"0"
         },
         "egress_lossless_profile": {
             "pool":"ingress_lossless_pool",
diff --git a/src/sonic-config-engine/tests/sample_output/py3/buffer-arista7800r3-48cqm2-lc.json b/src/sonic-config-engine/tests/sample_output/py3/buffer-arista7800r3-48cqm2-lc.json
index 880e426c5..ebca473bc 100644
--- a/src/sonic-config-engine/tests/sample_output/py3/buffer-arista7800r3-48cqm2-lc.json
+++ b/src/sonic-config-engine/tests/sample_output/py3/buffer-arista7800r3-48cqm2-lc.json
@@ -65,7 +65,7 @@
             "pool":"ingress_lossless_pool",
             "size":"0",
             "xon_offset":"0",
-            "dynamic_th":"-6"
+            "dynamic_th":"0"
         },
         "egress_lossless_profile": {
             "pool":"ingress_lossless_pool",
diff --git a/src/sonic-config-engine/tests/sample_output/py3/buffer-arista7800r3a-36dm2-c36-lc.json b/src/sonic-config-engine/tests/sample_output/py3/buffer-arista7800r3a-36dm2-c36-lc.json
index fc22a9c48..6ab0f7c68 100644
--- a/src/sonic-config-engine/tests/sample_output/py3/buffer-arista7800r3a-36dm2-c36-lc.json
+++ b/src/sonic-config-engine/tests/sample_output/py3/buffer-arista7800r3a-36dm2-c36-lc.json
@@ -35,7 +35,7 @@
             "pool":"ingress_lossless_pool",
             "size":"0",
 	    "xon_offset": "0",
-            "dynamic_th":"-6"
+            "dynamic_th":"0"
         },
         "egress_lossless_profile": {
             "pool":"ingress_lossless_pool",
diff --git a/src/sonic-config-engine/tests/sample_output/py3/buffer-arista7800r3a-36dm2-d36-lc.json b/src/sonic-config-engine/tests/sample_output/py3/buffer-arista7800r3a-36dm2-d36-lc.json
index 09278e3ef..ba77ebdcf 100644
--- a/src/sonic-config-engine/tests/sample_output/py3/buffer-arista7800r3a-36dm2-d36-lc.json
+++ b/src/sonic-config-engine/tests/sample_output/py3/buffer-arista7800r3a-36dm2-d36-lc.json
@@ -35,7 +35,7 @@
             "pool":"ingress_lossless_pool",
             "size":"0",
 	    "xon_offset": "0",
-            "dynamic_th":"-5"
+            "dynamic_th":"0"
         },
         "egress_lossless_profile": {
             "pool":"ingress_lossless_pool",
diff --git a/src/sonic-config-engine/tests/sample_output/py3/buffer-nokia-ixr7250e-36x100g.json b/src/sonic-config-engine/tests/sample_output/py3/buffer-nokia-ixr7250e-36x100g.json
index 29201518d..4ed219574 100644
--- a/src/sonic-config-engine/tests/sample_output/py3/buffer-nokia-ixr7250e-36x100g.json
+++ b/src/sonic-config-engine/tests/sample_output/py3/buffer-nokia-ixr7250e-36x100g.json
@@ -35,7 +35,7 @@
             "pool":"ingress_lossless_pool",
             "size":"0",
 	    "xon_offset": "0",
-            "dynamic_th":"-6"
+            "dynamic_th":"0"
         },
         "egress_lossless_profile": {
             "pool":"ingress_lossless_pool",
diff --git a/src/sonic-config-engine/tests/sample_output/py3/buffer-nokia-ixr7250e-36x400g.json b/src/sonic-config-engine/tests/sample_output/py3/buffer-nokia-ixr7250e-36x400g.json
index 9e5058ec1..7b8186206 100644
--- a/src/sonic-config-engine/tests/sample_output/py3/buffer-nokia-ixr7250e-36x400g.json
+++ b/src/sonic-config-engine/tests/sample_output/py3/buffer-nokia-ixr7250e-36x400g.json
@@ -35,7 +35,7 @@
             "pool":"ingress_lossless_pool",
             "size":"0",
 	    "xon_offset": "0",
-            "dynamic_th":"-5"
+            "dynamic_th":"0"
         },
         "egress_lossless_profile": {
             "pool":"ingress_lossless_pool",

From 16a9e8929d06a8e285e6c17d6da52f6451ae786e Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sat, 3 Aug 2024 19:17:22 +0800
Subject: [PATCH 0871/1115] [submodule] Update submodule sonic-utilities to the
 latest HEAD automatically (#19803)

#### Why I did it
src/sonic-utilities
```
* f50587a1 - (HEAD -> master, origin/master, origin/HEAD) Update README.md (#3406) (5 hours ago) [Changrong Wu]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-utilities | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-utilities b/src/sonic-utilities
index ff2c73f85..f50587a1f 160000
--- a/src/sonic-utilities
+++ b/src/sonic-utilities
@@ -1 +1 @@
-Subproject commit ff2c73f85ca24dea2634dc5ec83956f27ab9e32b
+Subproject commit f50587a1ff65bb489231bfe45cec805fb32dbf00

From 68fc91b804701a034bd4b69e3dca570c1f0e4f70 Mon Sep 17 00:00:00 2001
From: Kumaresh Perumal <kperumal@microsoft.com>
Date: Sat, 3 Aug 2024 09:43:08 -0700
Subject: [PATCH 0872/1115] [Arista]: Update TH5 flex counter configs (#19793)

Why I did it
Enable pipe mode in TH5 flex counter block to support queue counters for all the ports.

Microsoft ADO (number only): 28949528
---
 .../th5-a7060x6-64pe.config.bcm                   | 15 +++++++++++++--
 .../th5-a7060x6-64pe.config.bcm                   | 15 +++++++++++++--
 .../th5-a7060x6-64pe.config.bcm                   | 15 +++++++++++++--
 .../th5-a7060x6-64pe.config.bcm                   | 15 +++++++++++++--
 4 files changed, 52 insertions(+), 8 deletions(-)

diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-128x400G/th5-a7060x6-64pe.config.bcm b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-128x400G/th5-a7060x6-64pe.config.bcm
index fb8b08882..cf48a993b 100644
--- a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-128x400G/th5-a7060x6-64pe.config.bcm
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-128x400G/th5-a7060x6-64pe.config.bcm
@@ -1395,14 +1395,25 @@ bcm_device:
     0:
         global:
             ftem_mem_entries: 65536
+            sai_stats_support_mask: 0
+            global_flexctr_ing_action_num_reserved: 20
+            global_flexctr_ing_pool_num_reserved: 8
+            global_flexctr_ing_op_profile_num_reserved: 20
+            global_flexctr_ing_group_num_reserved: 2
+            global_flexctr_egr_action_num_reserved: 8
+            global_flexctr_egr_pool_num_reserved: 5
+            global_flexctr_egr_op_profile_num_reserved: 10
+            global_flexctr_egr_group_num_reserved: 1
 ...
 ---
 device:
     0:
         # Per pipe flex counter configuration
         CTR_EFLEX_CONFIG:
-            CTR_ING_EFLEX_OPERMODE_PIPEUNIQUE: 0
-            CTR_EGR_EFLEX_OPERMODE_PIPEUNIQUE: 0
+            CTR_ING_EFLEX_OPERMODE_PIPEUNIQUE: 1
+            CTR_ING_EFLEX_OPERMODE_PIPE_INSTANCE_UNIQUE: 1
+            CTR_EGR_EFLEX_OPERMODE_PIPEUNIQUE: 1
+            CTR_EGR_EFLEX_OPERMODE_PIPE_INSTANCE_UNIQUE: 1
 
         # IFP mode
         FP_CONFIG:
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/th5-a7060x6-64pe.config.bcm b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/th5-a7060x6-64pe.config.bcm
index af2f5f158..eecb986fd 100644
--- a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/th5-a7060x6-64pe.config.bcm
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/th5-a7060x6-64pe.config.bcm
@@ -1907,14 +1907,25 @@ bcm_device:
     0:
         global:
             ftem_mem_entries: 65536
+            sai_stats_support_mask: 0
+            global_flexctr_ing_action_num_reserved: 20
+            global_flexctr_ing_pool_num_reserved: 8
+            global_flexctr_ing_op_profile_num_reserved: 20
+            global_flexctr_ing_group_num_reserved: 2
+            global_flexctr_egr_action_num_reserved: 8
+            global_flexctr_egr_pool_num_reserved: 5
+            global_flexctr_egr_op_profile_num_reserved: 10
+            global_flexctr_egr_group_num_reserved: 1
 ...
 ---
 device:
     0:
         # Per pipe flex counter configuration
         CTR_EFLEX_CONFIG:
-            CTR_ING_EFLEX_OPERMODE_PIPEUNIQUE: 0
-            CTR_EGR_EFLEX_OPERMODE_PIPEUNIQUE: 0
+            CTR_ING_EFLEX_OPERMODE_PIPEUNIQUE: 1
+            CTR_ING_EFLEX_OPERMODE_PIPE_INSTANCE_UNIQUE: 1
+            CTR_EGR_EFLEX_OPERMODE_PIPEUNIQUE: 1
+            CTR_EGR_EFLEX_OPERMODE_PIPE_INSTANCE_UNIQUE: 1
 
         # IFP mode
         FP_CONFIG:
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-64x400G/th5-a7060x6-64pe.config.bcm b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-64x400G/th5-a7060x6-64pe.config.bcm
index 7f9f846f1..425915e05 100644
--- a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-64x400G/th5-a7060x6-64pe.config.bcm
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-64x400G/th5-a7060x6-64pe.config.bcm
@@ -1139,14 +1139,25 @@ bcm_device:
     0:
         global:
             ftem_mem_entries: 65536
+            sai_stats_support_mask: 0
+            global_flexctr_ing_action_num_reserved: 20
+            global_flexctr_ing_pool_num_reserved: 8
+            global_flexctr_ing_op_profile_num_reserved: 20
+            global_flexctr_ing_group_num_reserved: 2
+            global_flexctr_egr_action_num_reserved: 8
+            global_flexctr_egr_pool_num_reserved: 5
+            global_flexctr_egr_op_profile_num_reserved: 10
+            global_flexctr_egr_group_num_reserved: 1
 ...
 ---
 device:
     0:
         # Per pipe flex counter configuration
         CTR_EFLEX_CONFIG:
-            CTR_ING_EFLEX_OPERMODE_PIPEUNIQUE: 0
-            CTR_EGR_EFLEX_OPERMODE_PIPEUNIQUE: 0
+            CTR_ING_EFLEX_OPERMODE_PIPEUNIQUE: 1
+            CTR_ING_EFLEX_OPERMODE_PIPE_INSTANCE_UNIQUE: 1
+            CTR_EGR_EFLEX_OPERMODE_PIPEUNIQUE: 1
+            CTR_EGR_EFLEX_OPERMODE_PIPE_INSTANCE_UNIQUE: 1
 
         # IFP mode
         FP_CONFIG:
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE/th5-a7060x6-64pe.config.bcm b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE/th5-a7060x6-64pe.config.bcm
index b1de8f9e1..969e74474 100644
--- a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE/th5-a7060x6-64pe.config.bcm
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE/th5-a7060x6-64pe.config.bcm
@@ -1139,14 +1139,25 @@ bcm_device:
     0:
         global:
             ftem_mem_entries: 65536
+            sai_stats_support_mask: 0
+            global_flexctr_ing_action_num_reserved: 20
+            global_flexctr_ing_pool_num_reserved: 8
+            global_flexctr_ing_op_profile_num_reserved: 20
+            global_flexctr_ing_group_num_reserved: 2
+            global_flexctr_egr_action_num_reserved: 8
+            global_flexctr_egr_pool_num_reserved: 5
+            global_flexctr_egr_op_profile_num_reserved: 10
+            global_flexctr_egr_group_num_reserved: 1
 ...
 ---
 device:
     0:
         # Per pipe flex counter configuration
         CTR_EFLEX_CONFIG:
-            CTR_ING_EFLEX_OPERMODE_PIPEUNIQUE: 0
-            CTR_EGR_EFLEX_OPERMODE_PIPEUNIQUE: 0
+            CTR_ING_EFLEX_OPERMODE_PIPEUNIQUE: 1
+            CTR_ING_EFLEX_OPERMODE_PIPE_INSTANCE_UNIQUE: 1
+            CTR_EGR_EFLEX_OPERMODE_PIPEUNIQUE: 1
+            CTR_EGR_EFLEX_OPERMODE_PIPE_INSTANCE_UNIQUE: 1
 
         # IFP mode
         FP_CONFIG:

From 0ac8679c33149d8d718abeb8bb6922ea13509a69 Mon Sep 17 00:00:00 2001
From: Sai Kiran <110003254+opcoder0@users.noreply.github.com>
Date: Mon, 5 Aug 2024 11:41:45 +1000
Subject: [PATCH 0873/1115] [docker-ptf] sflowtool requires autoconf 2.71+
 (#19761)

Why I did it
Latest changes to sflowtool source mandates autoconf 2.71+ to build it. Bullseye is at autoconf 2.69. This PR builds autoconf from source in the docker-ptf image.

How I did it
Modified dockers/docker-ptf/Dockerfile.j2 to -

Install dependencies to build autoconf
Build and install autoconf

How to verify it
docker-ptf image is built successfully.
---
 dockers/docker-ptf/Dockerfile.j2 | 17 ++++++++++++++++-
 1 file changed, 16 insertions(+), 1 deletion(-)

diff --git a/dockers/docker-ptf/Dockerfile.j2 b/dockers/docker-ptf/Dockerfile.j2
index 95a7cb9ee..087f49f51 100644
--- a/dockers/docker-ptf/Dockerfile.j2
+++ b/dockers/docker-ptf/Dockerfile.j2
@@ -28,7 +28,6 @@ RUN apt-get update          \
     && apt-get upgrade -y   \
     && apt-get dist-upgrade -y  \
     && apt-get install -y   \
-        autoconf            \
         openssh-server      \
         vim                 \
         telnet              \
@@ -97,6 +96,22 @@ RUN update-alternatives --install /usr/bin/python python /usr/bin/python3 1 \
     && update-alternatives --install /usr/bin/pygettext pygettext /usr/bin/pygettext3 1
 {% endif %}
 
+# sflow requires autoconf 2.71; This step builds autoconf from source
+RUN apt-get update \
+    && apt-get install -y \
+        m4 \
+        texinfo \
+        help2man
+# get autoconf, build and install
+RUN git clone http://git.sv.gnu.org/r/autoconf.git \
+    && cd autoconf \
+    && ./bootstrap \
+    && ./configure \
+    && make \
+    && make install \
+    && cd .. \
+    && rm -rf autoconf
+
 # Install all python modules from pypi. python-scapy is exception, ptf debian package requires python-scapy
 # TODO: Clean up this step
 RUN rm -rf /debs \

From 313215d3ec77a908fc008ccee5948c28d7fd6ed6 Mon Sep 17 00:00:00 2001
From: Ze Gan <zegan@microsoft.com>
Date: Tue, 6 Aug 2024 00:05:32 +0800
Subject: [PATCH 0874/1115] [Fixbug][systemctl]: Disable networkd in
 non-smartswitch platform (#19107)

Why I did it
Fix #19058

How I did it
Marked systemd-networkd.service as /dev/null to disable it by default.
systemd-sonic-generator will remove this null link if the target platform is smartswitch.

How to verify it
According to the issue page, we shouldn't get the error logERR systemd-networkd-wait-online[50532]: Timeout occurred while waiting for network connectivity INFO apt-helper[11911]: E: Sub-process /lib/systemd/systemd-networkd-wait-online returned an error code (1) after systemctl start apt-daily.service
Regress test the previous verification: [systemd/systemd-sonic-generator]: Systemd midplane network service of Smart Switch #18178

Signed-off-by: Ze Gan <ganze718@gmail.com>
---
 .../build_templates/sonic_debian_extension.j2 |  2 +-
 src/systemd-sonic-generator/ssg-test.cc       | 30 +++++++++++++++----
 .../systemd-sonic-generator.cpp               |  9 ++++++
 3 files changed, 35 insertions(+), 6 deletions(-)

diff --git a/files/build_templates/sonic_debian_extension.j2 b/files/build_templates/sonic_debian_extension.j2
index 40d721220..65a9739d9 100644
--- a/files/build_templates/sonic_debian_extension.j2
+++ b/files/build_templates/sonic_debian_extension.j2
@@ -699,7 +699,7 @@ sudo LANG=C chroot $FILESYSTEM_ROOT systemctl disable midplane-network-dpu.servi
 # According to the issue: https://github.com/systemd/systemd/issues/19106, To disable ManageForeignRoutingPolicyRules to avoid the ip rules being deleted by systemd-networkd
 sudo sed -i 's/#ManageForeignRoutingPolicyRules=yes/ManageForeignRoutingPolicyRules=no/g' $FILESYSTEM_ROOT/etc/systemd/networkd.conf
 
-sudo LANG=C chroot $FILESYSTEM_ROOT systemctl enable systemd-networkd
+sudo ln -s /dev/null $FILESYSTEM_ROOT/etc/systemd/system/systemd-networkd.service
 sudo LANG=C chroot $FILESYSTEM_ROOT systemctl disable systemd-networkd-wait-online.service
 
 # Copy backend-acl script and service file
diff --git a/src/systemd-sonic-generator/ssg-test.cc b/src/systemd-sonic-generator/ssg-test.cc
index 99b71b9ba..5e336fe2d 100644
--- a/src/systemd-sonic-generator/ssg-test.cc
+++ b/src/systemd-sonic-generator/ssg-test.cc
@@ -53,7 +53,8 @@ const std::string TEST_ASIC_CONF = TEST_PLATFORM_DIR + "asic.conf";
 const std::string TEST_PLATFORM_CONF = TEST_PLATFORM_DIR + "platform.json";
 
 const std::string TEST_OUTPUT_DIR = TEST_ROOT_DIR + "generator/";
-const std::string TEST_ETC_NETWORK = TEST_OUTPUT_DIR + "network/"; 
+const std::string TEST_ETC_NETWORK = TEST_OUTPUT_DIR + "network/";
+const std::string TEST_ETC_SYSTEM = TEST_OUTPUT_DIR + "system/";
 
 const std::string TEST_CONFIG_FILE = TEST_ROOT_DIR + "generated_services.conf";
 
@@ -167,6 +168,8 @@ class SsgFunctionTest : public SystemdSonicGeneratorFixture {
         fs::create_directories(path);
         path = fs::path(TEST_ETC_NETWORK.c_str());
         fs::create_directories(path);
+        path = fs::path(TEST_ETC_SYSTEM.c_str());
+        fs::create_directories(path);
         fp = fopen(TEST_MACHINE_CONF.c_str(), "w");
         ASSERT_NE(fp, nullptr);
         fputs("onie_platform=test_platform", fp);
@@ -266,7 +269,8 @@ class SsgMainTest : public SsgFunctionTest {
     void validate_output_unit_files(std::vector<std::string> strs,
                               std::string target,
                               bool expected_result,
-                              int num_instances) {
+                              int num_instances,
+                              bool dev_null_as_inexistent = true) {
         for (std::string str : strs) {
             bool finished = false;
             for (int i = 0 ; i < num_instances && !finished; ++i) {
@@ -279,9 +283,14 @@ class SsgMainTest : public SsgFunctionTest {
                     finished = true;
                 }
                 fs::path path{TEST_OUTPUT_DIR + target + "/" + str_t};
-                char resolved_path[PATH_MAX];
-                realpath(path.c_str(), resolved_path);
-                bool exist = fs::exists(path) && strcmp(resolved_path, "/dev/null") != 0;
+                bool exist = fs::exists(path);
+                if (exist) {
+                    char resolved_path[PATH_MAX] = { 0 };
+                    realpath(path.c_str(), resolved_path);
+                    if (strcmp(resolved_path, "/dev/null") == 0) {
+                        exist = !dev_null_as_inexistent;
+                    }
+                }
                 EXPECT_EQ(exist, expected_result)
                     << "Failed validation: " << path;
             }
@@ -351,6 +360,8 @@ class SsgMainTest : public SsgFunctionTest {
             test_target, cfg.is_smart_switch_dpu, cfg.num_dpus);
         validate_output_unit_files(dpu_network_service_list,
             "network", cfg.is_smart_switch_dpu, cfg.num_dpus);
+        validate_output_unit_files(non_smart_switch_service_list,
+            "system", !cfg.is_smart_switch_npu && !cfg.is_smart_switch_dpu, cfg.num_dpus, false);
     }
 
     /* ssg_main test routine.
@@ -432,6 +443,7 @@ class SsgMainTest : public SsgFunctionTest {
         for (const auto &service : disabled_service) {
             fs::create_symlink("/dev/null", TEST_ETC_NETWORK + service);
         }
+        fs::create_symlink("/dev/null", TEST_ETC_SYSTEM + "systemd-networkd.service");
     }
 
     /* Restore global vars */
@@ -444,6 +456,7 @@ class SsgMainTest : public SsgFunctionTest {
     static const std::vector<std::string> single_asic_service_list;
     static const std::vector<std::string> multi_asic_service_list;
     static const std::vector<std::string> common_service_list;
+    static const std::vector<std::string> non_smart_switch_service_list;
     static const std::vector<std::string> npu_service_list;
     static const std::vector<std::string> npu_network_service_list;
     static const std::vector<std::string> dpu_service_list;
@@ -487,6 +500,13 @@ SsgMainTest::common_service_list = {
     "database.service",
 };
 
+/* Systemd service list for non Smart Switch */
+const std::vector<std::string>
+SsgMainTest::non_smart_switch_service_list = {
+    "systemd-networkd.service"
+};
+
+
 /* Systemd service Unit file list for Smart Switch NPU. */
 const std::vector<std::string>
 SsgMainTest::npu_service_list = {
diff --git a/src/systemd-sonic-generator/systemd-sonic-generator.cpp b/src/systemd-sonic-generator/systemd-sonic-generator.cpp
index 0569f4dd6..ffef213cd 100644
--- a/src/systemd-sonic-generator/systemd-sonic-generator.cpp
+++ b/src/systemd-sonic-generator/systemd-sonic-generator.cpp
@@ -1076,6 +1076,15 @@ static int install_network_service_for_smart_switch() {
         network_units++;
     }
 
+    // If the systemd-networkd is masked, unmask it
+    std::string systemd_networkd = get_etc_systemd() + std::string("/system/systemd-networkd.service");
+    if (is_devnull(systemd_networkd.c_str())) {
+        if (remove(systemd_networkd.c_str()) != 0) {
+            fprintf(stderr, "Unable to remove existing symlink %s\n", systemd_networkd.c_str());
+            return -1;
+        }
+    }
+
     return 0;
 }
 

From 856bef72f51d09aeca09e4e42d492be7ca53200c Mon Sep 17 00:00:00 2001
From: Ze Gan <zegan@microsoft.com>
Date: Tue, 6 Aug 2024 00:06:53 +0800
Subject: [PATCH 0875/1115] [Fixbug][fast-reboot] [ErrLog] Fix database.sh
 error log for dpu database (#19601)

Fix #19331

How I did it
Skip the namespace setting if the dev is DPU, because the DPU databases are only in the host namespace

How to verify it
Check there is no error log after fast-reboot

admin@vlab-01:~$ sudo cat /var/log/syslog  | grep -i asicdpu

Signed-off-by: Ze Gan <zegan@microsoft.com>
---
 files/scripts/service_mgmt.sh | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/files/scripts/service_mgmt.sh b/files/scripts/service_mgmt.sh
index 6a038c0a3..8229fd8ec 100755
--- a/files/scripts/service_mgmt.sh
+++ b/files/scripts/service_mgmt.sh
@@ -87,7 +87,7 @@ DEV=$2
 SCRIPT_NAME=$(basename -- "$0")
 SERVICE="${SCRIPT_NAME%.*}"
 NAMESPACE_PREFIX="asic"
-if [ "$DEV" ]; then
+if [[ "$DEV" && "$DEV" != *"dpu"* ]]; then
     NET_NS="$NAMESPACE_PREFIX$DEV" #name of the network namespace
     SONIC_DB_CLI="sonic-db-cli -n $NET_NS"
 else

From 978fb9f56c2cea29a32ba79cf9ac4e47c839543e Mon Sep 17 00:00:00 2001
From: Andriy Yurkiv <70649192+ayurkiv-nvda@users.noreply.github.com>
Date: Mon, 5 Aug 2024 19:50:56 +0300
Subject: [PATCH 0876/1115]  [Mellanox]Adding SKU Mellanox-SN4700-O32 and
 Mellanox-SN4700-V64 (#19681)
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

A new SKUs for MSN4700 Platform: Mellanox-SN4700-O32 and Mellanox-SN4700-V64

Requirements for Mellanox-SN4700-O32:

8 x 400Gbps uplink to T2 switch (O13 to O20)
24 x 400Gbps downlinks to T0 switch (O1-O12, O21-O32)
Breakout mode No breakout mode. All ports working in 400Gb mode. .
FEC mode: RS
Type of transceiver: 400Gb Optical.
warm boot should be supported “No for T1 role”
VxLAN source port range set N/A
Static Policy Based Hashing supported N/A
Cable length “T0-T1 40m default, 300m max; T1-T2 2000m”
Tradition buffer model is must “Yes”
Shared headroom should be supported “Yes”
Over-subscription ratio: “2”.
Requirements for Mellanox-SN4700-V64

16 x 200Gbps uplink to T1 switch (V-25&V26 to V-39&40)
48 x 200Gbps downlinks to servers (Left panel downlink ports: V-1&2 to V-23&24; Right panel downlink ports: V-41&42 to V-63&64)
Breakout mode split from 400Gbps ports (2x200)
FEC mode: RS
Type of transceiver: 200Gb AOC between T0 and T1; 200Gb DAC between T0 and host.
warm boot should be supported “Yes for T0 role”
VxLAN source port range set N/A
Static Policy Based Hashing supported N/A
Cable length “T0-T1 40m default, 300m max, T0-Server 5m”
Tradition buffer model is must “Yes”
Shared headroom should be supported “Yes”
Over-subscription ratio: “2”.
Additional Details:

QoS configs for Mellanox-SN4700-V64 updated in order to fulfill Dual-ToR buffer (+DSCP remapping) requirements
Support for independent module added for both SKUs, so Auto-negotiation changed to NO

Signed-off-by: Andriy Yurkiv <ayurkiv@nvidia.com>
---
 .../Mellanox-SN4700-O32/buffers.json.j2       |  15 +
 .../buffers_defaults_objects.j2               |   1 +
 .../buffers_defaults_t0.j2                    |  36 ++
 .../buffers_defaults_t1.j2                    |  37 ++
 .../buffers_dynamic.json.j2                   |  16 +
 .../Mellanox-SN4700-O32/hwsku.json            | 132 +++++++
 .../Mellanox-SN4700-O32/media_settings.json   |   1 +
 .../optics_si_settings.json                   |   1 +
 .../Mellanox-SN4700-O32/pg_profile_lookup.ini |   1 +
 .../pmon_daemon_control.json                  |   6 +
 .../Mellanox-SN4700-O32/port_config.ini       |   1 +
 .../Mellanox-SN4700-O32/qos.json.j2           |   1 +
 .../Mellanox-SN4700-O32/sai.profile           |   2 +
 .../Mellanox-SN4700-O32/sai_4700_32x400g.xml  | 297 ++++++++++++++++
 .../Mellanox-SN4700-V64/buffers.json.j2       |  15 +
 .../buffers_defaults_objects.j2               |   1 +
 .../buffers_defaults_t0.j2                    |  53 +++
 .../buffers_defaults_t1.j2                    |  56 +++
 .../buffers_dynamic.json.j2                   |  18 +
 .../Mellanox-SN4700-V64/hwsku.json            | 324 ++++++++++++++++++
 .../Mellanox-SN4700-V64/media_settings.json   |   1 +
 .../optics_si_settings.json                   |   1 +
 .../Mellanox-SN4700-V64/pg_profile_lookup.ini |   1 +
 .../pmon_daemon_control.json                  |   6 +
 .../Mellanox-SN4700-V64/port_config.ini       |  81 +++++
 .../Mellanox-SN4700-V64/qos.json.j2           |   1 +
 .../Mellanox-SN4700-V64/sai.profile           |   2 +
 .../Mellanox-SN4700-V64/sai_4700_64x200g.xml  | 297 ++++++++++++++++
 28 files changed, 1404 insertions(+)
 create mode 100644 device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/buffers.json.j2
 create mode 120000 device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/buffers_defaults_objects.j2
 create mode 100644 device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/buffers_defaults_t0.j2
 create mode 100644 device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/buffers_defaults_t1.j2
 create mode 100644 device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/buffers_dynamic.json.j2
 create mode 100644 device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/hwsku.json
 create mode 120000 device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/media_settings.json
 create mode 120000 device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/optics_si_settings.json
 create mode 120000 device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/pg_profile_lookup.ini
 create mode 100644 device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/pmon_daemon_control.json
 create mode 120000 device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/port_config.ini
 create mode 120000 device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/qos.json.j2
 create mode 100644 device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/sai.profile
 create mode 100644 device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/sai_4700_32x400g.xml
 create mode 100644 device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/buffers.json.j2
 create mode 120000 device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/buffers_defaults_objects.j2
 create mode 100644 device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/buffers_defaults_t0.j2
 create mode 100644 device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/buffers_defaults_t1.j2
 create mode 100644 device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/buffers_dynamic.json.j2
 create mode 100644 device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/hwsku.json
 create mode 120000 device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/media_settings.json
 create mode 120000 device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/optics_si_settings.json
 create mode 120000 device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/pg_profile_lookup.ini
 create mode 100644 device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/pmon_daemon_control.json
 create mode 100644 device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/port_config.ini
 create mode 120000 device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/qos.json.j2
 create mode 100644 device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/sai.profile
 create mode 100644 device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/sai_4700_64x200g.xml

diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/buffers.json.j2 b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/buffers.json.j2
new file mode 100644
index 000000000..dbcb63bdc
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/buffers.json.j2
@@ -0,0 +1,15 @@
+{#
+    Copyright (c) 2022-2024 NVIDIA CORPORATION & AFFILIATES.
+    Apache-2.0
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+    http://www.apache.org/licenses/LICENSE-2.0
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+#}
+{%- set default_topo = 't1' %}
+{%- include 'buffers_config.j2' %}
diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/buffers_defaults_objects.j2 b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/buffers_defaults_objects.j2
new file mode 120000
index 000000000..c01aebb7a
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/buffers_defaults_objects.j2
@@ -0,0 +1 @@
+../../x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D48C8/buffers_defaults_objects.j2
\ No newline at end of file
diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/buffers_defaults_t0.j2 b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/buffers_defaults_t0.j2
new file mode 100644
index 000000000..ebce770ec
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/buffers_defaults_t0.j2
@@ -0,0 +1,36 @@
+{#
+    Copyright (c) 2022-2024 NVIDIA CORPORATION & AFFILIATES.
+    Apache-2.0
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+    http://www.apache.org/licenses/LICENSE-2.0
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+#}
+{% set default_cable = '5m' %}
+{% set ingress_lossless_pool_size = '51806208' %}
+{% set ingress_lossless_pool_xoff  = '3407872' %}
+{% set egress_lossless_pool_size =  '60817392' %}
+{% set egress_lossy_pool_size =  '51806208' %}
+
+{% import 'buffers_defaults_objects.j2' as defs with context %}
+
+{%- macro generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) %}
+{{ defs.generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_profile_lists_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_profile_lists(port_names_active, port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_queue_buffers_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_queue_buffers(port_names_active, port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_pg_profiles_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_pg_profiles(port_names_active, port_names_inactive) }}
+{%- endmacro %}
diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/buffers_defaults_t1.j2 b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/buffers_defaults_t1.j2
new file mode 100644
index 000000000..9d6fe3da0
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/buffers_defaults_t1.j2
@@ -0,0 +1,37 @@
+{#
+    Copyright (c) 2022-2024 NVIDIA CORPORATION & AFFILIATES.
+    Apache-2.0
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+    http://www.apache.org/licenses/LICENSE-2.0
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+#}
+{% set default_cable = '40m' %}
+{% set ingress_lossless_pool_size =  '45531136' %}
+{% set ingress_lossless_pool_xoff  =  '9682944' %}
+{% set egress_lossless_pool_size =  '60817392' %}
+{% set egress_lossy_pool_size =  '45531136' %}
+
+
+{% import 'buffers_defaults_objects.j2' as defs with context %}
+
+{%- macro generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) %}
+{{ defs.generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_profile_lists_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_profile_lists(port_names_active, port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_queue_buffers_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_queue_buffers(port_names_active, port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_pg_profiles_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_pg_profiles(port_names_active, port_names_inactive) }}
+{%- endmacro %}
diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/buffers_dynamic.json.j2 b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/buffers_dynamic.json.j2
new file mode 100644
index 000000000..84b330d42
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/buffers_dynamic.json.j2
@@ -0,0 +1,16 @@
+{#
+    Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+    Apache-2.0
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+    http://www.apache.org/licenses/LICENSE-2.0
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+#}
+{%- set default_topo = 't1' %}
+{%- set dynamic_mode = 'true' %}
+{%- include 'buffers_config.j2' %}
diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/hwsku.json b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/hwsku.json
new file mode 100644
index 000000000..e316fc1bb
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/hwsku.json
@@ -0,0 +1,132 @@
+{
+    "interfaces": {
+        "Ethernet0": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "autoneg": "off"
+        },
+        "Ethernet8": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "autoneg": "off"
+        },
+        "Ethernet16": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "autoneg": "off"
+        },
+        "Ethernet24": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "autoneg": "off"
+        },
+        "Ethernet32": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "autoneg": "off"
+        },
+        "Ethernet40": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "autoneg": "off"
+        },
+        "Ethernet48": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "autoneg": "off"
+        },
+        "Ethernet56": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "autoneg": "off"
+        },
+        "Ethernet64": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "autoneg": "off"
+        },
+        "Ethernet72": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "autoneg": "off"
+        },
+        "Ethernet80": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "autoneg": "off"
+        },
+        "Ethernet88": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "autoneg": "off"
+        },
+        "Ethernet96": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "autoneg": "off"
+        },
+        "Ethernet104": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "autoneg": "off"
+        },
+        "Ethernet112": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "autoneg": "off"
+        },
+        "Ethernet120": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "autoneg": "off"
+        },
+        "Ethernet128": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "autoneg": "off"
+        },
+        "Ethernet136": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "autoneg": "off"
+        },
+        "Ethernet144": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "autoneg": "off"
+        },
+        "Ethernet152": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "autoneg": "off"
+        },
+        "Ethernet160": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "autoneg": "off"
+        },
+        "Ethernet168": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "autoneg": "off"
+        },
+        "Ethernet176": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "autoneg": "off"
+        },
+        "Ethernet184": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "autoneg": "off"
+        },
+        "Ethernet192": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "autoneg": "off"
+        },
+        "Ethernet200": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "autoneg": "off"
+        },
+        "Ethernet208": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "autoneg": "off"
+        },
+        "Ethernet216": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "autoneg": "off"
+        },
+        "Ethernet224": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "autoneg": "off"
+        },
+        "Ethernet232": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "autoneg": "off"
+        },
+        "Ethernet240": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "autoneg": "off"
+        },
+        "Ethernet248": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "autoneg": "off"
+        }
+    }
+}
diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/media_settings.json b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/media_settings.json
new file mode 120000
index 000000000..79e88a14f
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/media_settings.json
@@ -0,0 +1 @@
+../Mellanox-SN4700-O8C48/media_settings.json
\ No newline at end of file
diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/optics_si_settings.json b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/optics_si_settings.json
new file mode 120000
index 000000000..f2f54cb0b
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/optics_si_settings.json
@@ -0,0 +1 @@
+../Mellanox-SN4700-O8C48/optics_si_settings.json
\ No newline at end of file
diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/pg_profile_lookup.ini b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/pg_profile_lookup.ini
new file mode 120000
index 000000000..745cc6e12
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/pg_profile_lookup.ini
@@ -0,0 +1 @@
+../../x86_64-nvidia_sn4280-r0/ACS-SN4280/pg_profile_lookup.ini
\ No newline at end of file
diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/pmon_daemon_control.json b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/pmon_daemon_control.json
new file mode 100644
index 000000000..208fa63ca
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/pmon_daemon_control.json
@@ -0,0 +1,6 @@
+{
+    "skip_ledd": true,
+    "skip_fancontrol": true,
+    "skip_xcvrd_cmis_mgr": false
+}
+
diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/port_config.ini b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/port_config.ini
new file mode 120000
index 000000000..e5ffca0b3
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/port_config.ini
@@ -0,0 +1 @@
+../ACS-MSN4700/port_config.ini
\ No newline at end of file
diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/qos.json.j2 b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/qos.json.j2
new file mode 120000
index 000000000..eccf286dc
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/qos.json.j2
@@ -0,0 +1 @@
+../../x86_64-mlnx_msn2700-r0/ACS-MSN2700/qos.json.j2
\ No newline at end of file
diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/sai.profile b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/sai.profile
new file mode 100644
index 000000000..b49fe9c19
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/sai.profile
@@ -0,0 +1,2 @@
+SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_4700_32x400g.xml
+SAI_INDEPENDENT_MODULE_MODE=1
diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/sai_4700_32x400g.xml b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/sai_4700_32x400g.xml
new file mode 100644
index 000000000..50bf43b1b
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/sai_4700_32x400g.xml
@@ -0,0 +1,297 @@
+<!--
+  Copyright (c) 2019-2024 NVIDIA CORPORATION & AFFILIATES.
+  Apache-2.0
+
+  Licensed under the Apache License, Version 2.0 (the "License");
+  you may not use this file except in compliance with the License.
+  You may obtain a copy of the License at
+
+  http://www.apache.org/licenses/LICENSE-2.0
+
+  Unless required by applicable law or agreed to in writing, software
+  distributed under the License is distributed on an "AS IS" BASIS,
+  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+  See the License for the specific language governing permissions and
+  limitations under the License.
+-->
+
+<root>
+    <platform_info type="4700">
+
+        <!-- Device MAC address  -->
+        <device-mac-address>00:02:03:04:05:00</device-mac-address>
+
+        <!-- ISSU enabled -->
+        <issu-enabled>1</issu-enabled>
+
+        <!-- Number of ports in the following port list -->
+        <number-of-physical-ports>32</number-of-physical-ports>
+
+        <!-- Global port late create -->
+        <late-create-all-ports>1</late-create-all-ports>
+
+        <!-- List of ports in the device -->
+        <ports-list>
+            <port-info>
+                <local-port>1</local-port>
+                <width>8</width>
+                <module>17</module>
+
+                <!-- 0 none, 1=2, 2=4, 3=2,4 -->
+                <breakout-modes>0</breakout-modes>
+
+                <!-- (BITMASK) 2 - 1Gb , 16 - 10Gb , 32 - 40Gb , 384 - 50Gb , 1536 - 100Gb , 4096 - 200Gb, 32768 - 400G, 262144 - 800G -->-->
+                <port-speed>32768</port-speed>
+                <split>1</split>
+            </port-info>
+            <port-info>
+                <local-port>5</local-port>
+                <width>8</width>
+                <module>16</module>
+                <breakout-modes>0</breakout-modes>
+                <port-speed>32768</port-speed>
+                <split>1</split>
+            </port-info>
+            <port-info>
+                <local-port>9</local-port>
+                <width>8</width>
+                <module>19</module>
+                <breakout-modes>0</breakout-modes>
+                <port-speed>32768</port-speed>
+                <split>1</split>
+            </port-info>
+            <port-info>
+                <local-port>13</local-port>
+                <width>8</width>
+                <module>18</module>
+                <breakout-modes>0</breakout-modes>
+                <port-speed>32768</port-speed>
+                <split>1</split>
+            </port-info>
+            <port-info>
+                <local-port>17</local-port>
+                <width>8</width>
+                <module>21</module>
+                <breakout-modes>0</breakout-modes>
+                <port-speed>32768</port-speed>
+                <split>1</split>
+            </port-info>
+            <port-info>
+                <local-port>21</local-port>
+                <width>8</width>
+                <module>20</module>
+                <breakout-modes>0</breakout-modes>
+                <port-speed>32768</port-speed>
+                <split>1</split>
+            </port-info>
+            <port-info>
+                <local-port>25</local-port>
+                <width>8</width>
+                <module>23</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>32768</port-speed>
+                <split>1</split>
+            </port-info>
+            <port-info>
+                <local-port>29</local-port>
+                <width>8</width>
+                <module>22</module>
+                <breakout-modes>0</breakout-modes>
+                <port-speed>32768</port-speed>
+                <split>1</split>
+            </port-info>
+            <port-info>
+                <local-port>33</local-port>
+                <width>8</width>
+                <module>29</module>
+                <breakout-modes>0</breakout-modes>
+                <port-speed>32768</port-speed>
+                <split>1</split>
+            </port-info>
+            <port-info>
+                <local-port>37</local-port>
+                <width>8</width>
+                <module>28</module>
+                <breakout-modes>0</breakout-modes>
+                <port-speed>32768</port-speed>
+                <split>1</split>
+            </port-info>
+            <port-info>
+                <local-port>41</local-port>
+                <width>8</width>
+                <module>31</module>
+                <breakout-modes>0</breakout-modes>
+                <port-speed>32768</port-speed>
+                <split>1</split>
+            </port-info>
+            <port-info>
+                <local-port>45</local-port>
+                <width>8</width>
+                <module>30</module>
+                <breakout-modes>0</breakout-modes>
+                <port-speed>32768</port-speed>
+                <split>1</split>
+            </port-info>
+            <port-info>
+                <local-port>49</local-port>
+                <width>8</width>
+                <module>25</module>
+                <breakout-modes>0</breakout-modes>
+                <port-speed>32768</port-speed>
+                <split>1</split>
+            </port-info>
+            <port-info>
+                <local-port>53</local-port>
+                <width>8</width>
+                <module>24</module>
+                <breakout-modes>0</breakout-modes>
+                <port-speed>32768</port-speed>
+                <split>1</split>
+            </port-info>
+            <port-info>
+                <local-port>57</local-port>
+                <width>8</width>
+                <module>27</module>
+                <breakout-modes>0</breakout-modes>
+                <port-speed>32768</port-speed>
+                <split>1</split>
+            </port-info>
+            <port-info>
+                <local-port>61</local-port>
+                <width>8</width>
+                <module>26</module>
+                <breakout-modes>0</breakout-modes>
+                <port-speed>32768</port-speed>
+                <split>1</split>
+            </port-info>
+            <port-info>
+                <local-port>65</local-port>
+                <width>8</width>
+                <module>14</module>
+                <breakout-modes>0</breakout-modes>
+                <port-speed>32768</port-speed>
+                <split>1</split>
+            </port-info>
+            <port-info>
+                <local-port>69</local-port>
+                <width>8</width>
+                <module>15</module>
+                <breakout-modes>0</breakout-modes>
+                <port-speed>32768</port-speed>
+                <split>1</split>
+            </port-info>
+            <port-info>
+                <local-port>73</local-port>
+                <width>8</width>
+                <module>12</module>
+                <breakout-modes>0</breakout-modes>
+                <port-speed>32768</port-speed>
+                <split>1</split>
+            </port-info>
+            <port-info>
+                <local-port>77</local-port>
+                <width>8</width>
+                <module>13</module>
+                <breakout-modes>0</breakout-modes>
+                <port-speed>32768</port-speed>
+                <split>1</split>
+            </port-info>
+            <port-info>
+                <local-port>81</local-port>
+                <width>8</width>
+                <module>10</module>
+                <breakout-modes>0</breakout-modes>
+                <port-speed>32768</port-speed>
+                <split>1</split>
+            </port-info>
+            <port-info>
+                <local-port>85</local-port>
+                <width>8</width>
+                <module>11</module>
+                <breakout-modes>0</breakout-modes>
+                <port-speed>32768</port-speed>
+                <split>1</split>
+            </port-info>
+            <port-info>
+                <local-port>89</local-port>
+                <width>8</width>
+                <module>8</module>
+                <breakout-modes>0</breakout-modes>
+                <port-speed>32768</port-speed>
+                <split>1</split>
+            </port-info>
+            <port-info>
+                <local-port>93</local-port>
+                <width>8</width>
+                <module>9</module>
+                <breakout-modes>0</breakout-modes>
+                <port-speed>32768</port-speed>
+                <split>1</split>
+            </port-info>
+            <port-info>
+                <local-port>97</local-port>
+                <width>8</width>
+                <module>2</module>
+                <breakout-modes>0</breakout-modes>
+                <port-speed>32768</port-speed>
+                <split>1</split>
+            </port-info>
+            <port-info>
+                <local-port>101</local-port>
+                <width>8</width>
+                <module>3</module>
+                <breakout-modes>0</breakout-modes>
+                <port-speed>32768</port-speed>
+                <split>1</split>
+            </port-info>
+            <port-info>
+                <local-port>105</local-port>
+                <width>8</width>
+                <module>0</module>
+                <breakout-modes>0</breakout-modes>
+                <port-speed>32768</port-speed>
+                <split>1</split>
+            </port-info>
+            <port-info>
+                <local-port>109</local-port>
+                <width>8</width>
+                <module>1</module>
+                <breakout-modes>0</breakout-modes>
+                <port-speed>32768</port-speed>
+                <split>1</split>
+            </port-info>
+            <port-info>
+                <local-port>113</local-port>
+                <width>8</width>
+                <module>6</module>
+                <breakout-modes>0</breakout-modes>
+                <port-speed>32768</port-speed>
+                <split>1</split>
+            </port-info>
+            <port-info>
+                <local-port>117</local-port>
+                <width>8</width>
+                <module>7</module>
+                <breakout-modes>0</breakout-modes>
+                <port-speed>32768</port-speed>
+                <split>1</split>
+            </port-info>
+            <port-info>
+                <local-port>121</local-port>
+                <width>8</width>
+                <module>4</module>
+                <breakout-modes>0</breakout-modes>
+                <port-speed>32768</port-speed>
+                <split>1</split>
+            </port-info>
+            <port-info>
+                <local-port>125</local-port>
+                <width>8</width>
+                <module>5</module>
+                <breakout-modes>0</breakout-modes>
+                <port-speed>32768</port-speed>
+                <split>1</split>
+            </port-info>
+        </ports-list>
+    </platform_info>
+</root>
diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/buffers.json.j2 b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/buffers.json.j2
new file mode 100644
index 000000000..adf9fec90
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/buffers.json.j2
@@ -0,0 +1,15 @@
+{#
+    Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+    Apache-2.0
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+    http://www.apache.org/licenses/LICENSE-2.0
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+#}
+{%- set default_topo = 't0' %}
+{%- include 'buffers_config.j2' %}
diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/buffers_defaults_objects.j2 b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/buffers_defaults_objects.j2
new file mode 120000
index 000000000..c01aebb7a
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/buffers_defaults_objects.j2
@@ -0,0 +1 @@
+../../x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D48C8/buffers_defaults_objects.j2
\ No newline at end of file
diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/buffers_defaults_t0.j2 b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/buffers_defaults_t0.j2
new file mode 100644
index 000000000..1d9c616b5
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/buffers_defaults_t0.j2
@@ -0,0 +1,53 @@
+{#
+    Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+    Apache-2.0
+
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+    http://www.apache.org/licenses/LICENSE-2.0
+
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+#}
+{% set default_cable = '5m' %}
+{%- if ((SYSTEM_DEFAULTS is defined) and ('tunnel_qos_remap' in SYSTEM_DEFAULTS) and (SYSTEM_DEFAULTS['tunnel_qos_remap']['status'] == 'enabled')) -%}
+{% set ingress_lossless_pool_size =  '47448064' %}
+{% set ingress_lossless_pool_xoff  =  '5537792' %}
+{% set egress_lossless_pool_size =  '60817392' %}
+{% set egress_lossy_pool_size =  '47448064' %}
+{%- else -%}
+{% set ingress_lossless_pool_size =  '49971200' %}
+{% set ingress_lossless_pool_xoff  =  '3637248' %}
+{% set egress_lossless_pool_size =  '60817392' %}
+{% set egress_lossy_pool_size =  '49971200' %}
+{%- endif -%}
+
+{% import 'buffers_defaults_objects.j2' as defs with context %}
+
+{%- macro generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) %}
+{{ defs.generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_profile_lists_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_profile_lists(port_names_active, port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_queue_buffers_with_extra_lossless_queues_with_inactive_ports(port_names_active, port_names_extra_queues, port_names_inactive) %}
+{{ defs.generate_queue_buffers_with_extra_lossless_queues(port_names_active, port_names_extra_queues, port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_queue_buffers_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_queue_buffers(port_names_active, port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_pg_profiles_with_extra_lossless_pgs_with_inactive_ports(port_names_active, port_names_extra_pgs, port_names_inactive) %}
+{{ defs.generate_pg_profiles_with_extra_lossless_pgs(port_names_active, port_names_extra_pgs, port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_pg_profiles_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_pg_profiles(port_names_active, port_names_inactive) }}
+{%- endmacro %}
diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/buffers_defaults_t1.j2 b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/buffers_defaults_t1.j2
new file mode 100644
index 000000000..56ba492c3
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/buffers_defaults_t1.j2
@@ -0,0 +1,56 @@
+{#
+    Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+    Apache-2.0
+
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+    http://www.apache.org/licenses/LICENSE-2.0
+
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+#}
+
+{% set default_cable = '40m' %}
+{%- if ((SYSTEM_DEFAULTS is defined) and ('tunnel_qos_remap' in SYSTEM_DEFAULTS) and (SYSTEM_DEFAULTS['tunnel_qos_remap']['status'] == 'enabled')) -%}
+{% set ingress_lossless_pool_size =  '31784960' %}
+{% set ingress_lossless_pool_xoff  =  '19955712' %}
+{% set egress_lossless_pool_size =  '60817392' %}
+{% set egress_lossy_pool_size =  '31784960' %}
+{%- else -%}
+{% set ingress_lossless_pool_size =  '39354368' %}
+{% set ingress_lossless_pool_xoff  =  '14254080' %}
+{% set egress_lossless_pool_size =  '60817392' %}
+{% set egress_lossy_pool_size =  '39354368' %}
+{%- endif -%}
+
+
+
+{% import 'buffers_defaults_objects.j2' as defs with context %}
+
+{%- macro generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) %}
+{{ defs.generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_profile_lists_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_profile_lists(port_names_active, port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_queue_buffers_with_extra_lossless_queues_with_inactive_ports(port_names_active, port_names_extra_queues, port_names_inactive) %}
+{{ defs.generate_queue_buffers_with_extra_lossless_queues(port_names_active, port_names_extra_queues, port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_queue_buffers_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_queue_buffers(port_names_active, port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_pg_profiles_with_extra_lossless_pgs_with_inactive_ports(port_names_active, port_names_extra_pgs, port_names_inactive) %}
+{{ defs.generate_pg_profiles_with_extra_lossless_pgs(port_names_active, port_names_extra_pgs, port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_pg_profiles_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_pg_profiles(port_names_active, port_names_inactive) }}
+{%- endmacro %}
diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/buffers_dynamic.json.j2 b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/buffers_dynamic.json.j2
new file mode 100644
index 000000000..008ba6d1e
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/buffers_dynamic.json.j2
@@ -0,0 +1,18 @@
+{#
+    Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+    Apache-2.0
+
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+    http://www.apache.org/licenses/LICENSE-2.0
+
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+#}
+{%- set default_topo = 't0' %}
+{%- set dynamic_mode = 'true' %}
+{%- include 'buffers_config.j2' %}
diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/hwsku.json b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/hwsku.json
new file mode 100644
index 000000000..4915aa51b
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/hwsku.json
@@ -0,0 +1,324 @@
+{
+    "interfaces": {
+        "Ethernet0": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet4": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet8": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet12": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet16": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet20": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet24": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet28": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet32": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet36": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet40": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet44": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet48": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet52": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet56": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet60": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet64": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet68": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet72": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet76": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet80": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet84": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet88": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet92": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet96": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet100": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet104": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet108": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet112": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet116": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet120": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet124": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet128": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet132": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet136": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet140": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet144": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet148": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet152": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet156": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet160": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet164": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet168": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet172": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet176": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet180": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet184": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet188": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet192": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet196": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet200": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet204": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet208": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet212": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet216": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet220": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet224": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet228": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet232": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet236": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet240": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet244": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        },
+        "Ethernet248": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet252": {
+            "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]",
+            "subport": "2",
+            "autoneg": "off"
+        }
+    }
+}
diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/media_settings.json b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/media_settings.json
new file mode 120000
index 000000000..79e88a14f
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/media_settings.json
@@ -0,0 +1 @@
+../Mellanox-SN4700-O8C48/media_settings.json
\ No newline at end of file
diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/optics_si_settings.json b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/optics_si_settings.json
new file mode 120000
index 000000000..f2f54cb0b
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/optics_si_settings.json
@@ -0,0 +1 @@
+../Mellanox-SN4700-O8C48/optics_si_settings.json
\ No newline at end of file
diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/pg_profile_lookup.ini b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/pg_profile_lookup.ini
new file mode 120000
index 000000000..745cc6e12
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/pg_profile_lookup.ini
@@ -0,0 +1 @@
+../../x86_64-nvidia_sn4280-r0/ACS-SN4280/pg_profile_lookup.ini
\ No newline at end of file
diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/pmon_daemon_control.json b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/pmon_daemon_control.json
new file mode 100644
index 000000000..208fa63ca
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/pmon_daemon_control.json
@@ -0,0 +1,6 @@
+{
+    "skip_ledd": true,
+    "skip_fancontrol": true,
+    "skip_xcvrd_cmis_mgr": false
+}
+
diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/port_config.ini b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/port_config.ini
new file mode 100644
index 000000000..b055a95ed
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/port_config.ini
@@ -0,0 +1,81 @@
+##
+## Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+## Apache-2.0
+##
+## Licensed under the Apache License, Version 2.0 (the "License");
+## you may not use this file except in compliance with the License.
+## You may obtain a copy of the License at
+##
+## http://www.apache.org/licenses/LICENSE-2.0
+##
+## Unless required by applicable law or agreed to in writing, software
+## distributed under the License is distributed on an "AS IS" BASIS,
+## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+## See the License for the specific language governing permissions and
+## limitations under the License.
+##
+# name          lanes             alias     index    speed
+Ethernet0      0,1,2,3            etp1a     1        200000
+Ethernet4      4,5,6,7            etp1b     1        200000
+Ethernet8      8,9,10,11          etp2a     2        200000
+Ethernet12     12,13,14,15        etp2b     2        200000
+Ethernet16     16,17,18,19        etp3a     3        200000
+Ethernet20     20,21,22,23        etp3b     3        200000
+Ethernet24     24,25,26,27        etp4a     4        200000
+Ethernet28     28,29,30,31        etp4b     4        200000
+Ethernet32     32,33,34,35        etp5a     5        200000
+Ethernet36     36,37,38,39        etp5b     5        200000
+Ethernet40     40,41,42,43        etp6a     6        200000
+Ethernet44     44,45,46,47        etp6b     6        200000
+Ethernet48     48,49,50,51        etp7a     7        200000
+Ethernet52     52,53,54,55        etp7b     7        200000
+Ethernet56     56,57,58,59        etp8a     8        200000
+Ethernet60     60,61,62,63        etp8b     8        200000
+Ethernet64     64,65,66,67        etp9a     9        200000
+Ethernet68     68,69,70,71        etp9b     9        200000
+Ethernet72     72,73,74,75        etp10a    10       200000
+Ethernet76     76,77,78,79        etp10b    10       200000
+Ethernet80     80,81,82,83        etp11a    11       200000
+Ethernet84     84,85,86,87        etp11b    11       200000
+Ethernet88     88,89,90,91        etp12a    12       200000
+Ethernet92     92,93,94,95        etp12b    12       200000
+Ethernet96     96,97,98,99        etp13a    13       200000
+Ethernet100    100,101,102,103    etp13b    13       200000
+Ethernet104    104,105,106,107    etp14a    14       200000
+Ethernet108    108,109,110,111    etp14b    14       200000
+Ethernet112    112,113,114,115    etp15a    15       200000
+Ethernet116    116,117,118,119    etp15b    15       200000
+Ethernet120    120,121,122,123    etp16a    16       200000
+Ethernet124    124,125,126,127    etp16b    16       200000
+Ethernet128    128,129,130,131    etp17a    17       200000
+Ethernet132    132,133,134,135    etp17b    17       200000
+Ethernet136    136,137,138,139    etp18a    18       200000
+Ethernet140    140,141,142,143    etp18b    18       200000
+Ethernet144    144,145,146,147    etp19a    19       200000
+Ethernet148    148,149,150,151    etp19b    19       200000
+Ethernet152    152,153,154,155    etp20a    20       200000
+Ethernet156    156,157,158,159    etp20b    20       200000
+Ethernet160    160,161,162,163    etp21a    21       200000
+Ethernet164    164,165,166,167    etp21b    21       200000
+Ethernet168    168,169,170,171    etp22a    22       200000
+Ethernet172    172,173,174,175    etp22b    22       200000
+Ethernet176    176,177,178,179    etp23a    23       200000
+Ethernet180    180,181,182,183    etp23b    23       200000
+Ethernet184    184,185,186,187    etp24a    24       200000
+Ethernet188    188,189,190,191    etp24b    24       200000
+Ethernet192    192,193,194,195    etp25a    25       200000
+Ethernet196    196,197,198,199    etp25b    25       200000
+Ethernet200    200,201,202,203    etp26a    26       200000
+Ethernet204    204,205,206,207    etp26b    26       200000
+Ethernet208    208,209,210,211    etp27a    27       200000
+Ethernet212    212,213,214,215    etp27b    27       200000
+Ethernet216    216,217,218,219    etp28a    28       200000
+Ethernet220    220,221,222,223    etp28b    28       200000
+Ethernet224    224,225,226,227    etp29a    29       200000
+Ethernet228    228,229,230,231    etp29b    29       200000
+Ethernet232    232,233,234,235    etp30a    30       200000
+Ethernet236    236,237,238,239    etp30b    30       200000
+Ethernet240    240,241,242,243    etp31a    31       200000
+Ethernet244    244,245,246,247    etp31b    31       200000
+Ethernet248    248,249,250,251    etp32a    32       200000
+Ethernet252    252,253,254,255    etp32b    32       200000
diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/qos.json.j2 b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/qos.json.j2
new file mode 120000
index 000000000..48221aa2b
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/qos.json.j2
@@ -0,0 +1 @@
+../../x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-C64/qos.json.j2
\ No newline at end of file
diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/sai.profile b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/sai.profile
new file mode 100644
index 000000000..2ba019b87
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/sai.profile
@@ -0,0 +1,2 @@
+SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_4700_64x200g.xml
+SAI_INDEPENDENT_MODULE_MODE=1
diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/sai_4700_64x200g.xml b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/sai_4700_64x200g.xml
new file mode 100644
index 000000000..4732b2c28
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/sai_4700_64x200g.xml
@@ -0,0 +1,297 @@
+<!--
+  Copyright (c) 2019-2024 NVIDIA CORPORATION & AFFILIATES.
+  Apache-2.0
+
+  Licensed under the Apache License, Version 2.0 (the "License");
+  you may not use this file except in compliance with the License.
+  You may obtain a copy of the License at
+
+  http://www.apache.org/licenses/LICENSE-2.0
+
+  Unless required by applicable law or agreed to in writing, software
+  distributed under the License is distributed on an "AS IS" BASIS,
+  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+  See the License for the specific language governing permissions and
+  limitations under the License.
+-->
+
+<root>
+    <platform_info type="4700">
+
+        <!-- Device MAC address  -->
+        <device-mac-address>00:02:03:04:05:00</device-mac-address>
+
+        <!-- ISSU enabled -->
+        <issu-enabled>1</issu-enabled>
+
+        <!-- Number of ports in the following port list -->
+        <number-of-physical-ports>32</number-of-physical-ports>
+
+        <!-- Global port late create -->
+        <late-create-all-ports>1</late-create-all-ports>
+
+        <!-- List of ports in the device -->
+        <ports-list>
+            <port-info>
+                <local-port>1</local-port>
+                <width>8</width>
+                <module>17</module>
+
+                <!-- 0 none, 1=2, 2=4, 3=2,4 -->
+                <breakout-modes>1</breakout-modes>
+
+                <!-- (BITMASK) 2 - 1Gb , 16 - 10Gb , 32 - 40Gb , 384 - 50Gb , 1536 - 100Gb , 4096 - 200Gb, 32768 - 400G, 262144 - 800G -->-->
+                <port-speed>4096</port-speed>
+                <split>2</split>
+            </port-info>
+            <port-info>
+                <local-port>5</local-port>
+                <width>8</width>
+                <module>16</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>2</split>
+            </port-info>
+            <port-info>
+                <local-port>9</local-port>
+                <width>8</width>
+                <module>19</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>2</split>
+            </port-info>
+            <port-info>
+                <local-port>13</local-port>
+                <width>8</width>
+                <module>18</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>2</split>
+            </port-info>
+            <port-info>
+                <local-port>17</local-port>
+                <width>8</width>
+                <module>21</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>2</split>
+            </port-info>
+            <port-info>
+                <local-port>21</local-port>
+                <width>8</width>
+                <module>20</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>2</split>
+            </port-info>
+            <port-info>
+                <local-port>25</local-port>
+                <width>8</width>
+                <module>23</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>2</split>
+            </port-info>
+            <port-info>
+                <local-port>29</local-port>
+                <width>8</width>
+                <module>22</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>2</split>
+            </port-info>
+            <port-info>
+                <local-port>33</local-port>
+                <width>8</width>
+                <module>29</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>2</split>
+            </port-info>
+            <port-info>
+                <local-port>37</local-port>
+                <width>8</width>
+                <module>28</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>2</split>
+            </port-info>
+            <port-info>
+                <local-port>41</local-port>
+                <width>8</width>
+                <module>31</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>2</split>
+            </port-info>
+            <port-info>
+                <local-port>45</local-port>
+                <width>8</width>
+                <module>30</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>2</split>
+            </port-info>
+            <port-info>
+                <local-port>49</local-port>
+                <width>8</width>
+                <module>25</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>2</split>
+            </port-info>
+            <port-info>
+                <local-port>53</local-port>
+                <width>8</width>
+                <module>24</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>2</split>
+            </port-info>
+            <port-info>
+                <local-port>57</local-port>
+                <width>8</width>
+                <module>27</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>2</split>
+            </port-info>
+            <port-info>
+                <local-port>61</local-port>
+                <width>8</width>
+                <module>26</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>2</split>
+            </port-info>
+            <port-info>
+                <local-port>65</local-port>
+                <width>8</width>
+                <module>14</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>1</split>
+            </port-info>
+            <port-info>
+                <local-port>69</local-port>
+                <width>8</width>
+                <module>15</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>1</split>
+            </port-info>
+            <port-info>
+                <local-port>73</local-port>
+                <width>8</width>
+                <module>12</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>1</split>
+            </port-info>
+            <port-info>
+                <local-port>77</local-port>
+                <width>8</width>
+                <module>13</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>1</split>
+            </port-info>
+            <port-info>
+                <local-port>81</local-port>
+                <width>8</width>
+                <module>10</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>2</split>
+            </port-info>
+            <port-info>
+                <local-port>85</local-port>
+                <width>8</width>
+                <module>11</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>2</split>
+            </port-info>
+            <port-info>
+                <local-port>89</local-port>
+                <width>8</width>
+                <module>8</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>2</split>
+            </port-info>
+            <port-info>
+                <local-port>93</local-port>
+                <width>8</width>
+                <module>9</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>2</split>
+            </port-info>
+            <port-info>
+                <local-port>97</local-port>
+                <width>8</width>
+                <module>2</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>2</split>
+            </port-info>
+            <port-info>
+                <local-port>101</local-port>
+                <width>8</width>
+                <module>3</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>2</split>
+            </port-info>
+            <port-info>
+                <local-port>105</local-port>
+                <width>8</width>
+                <module>0</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>2</split>
+            </port-info>
+            <port-info>
+                <local-port>109</local-port>
+                <width>8</width>
+                <module>1</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>2</split>
+            </port-info>
+            <port-info>
+                <local-port>113</local-port>
+                <width>8</width>
+                <module>6</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>2</split>
+            </port-info>
+            <port-info>
+                <local-port>117</local-port>
+                <width>8</width>
+                <module>7</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>2</split>
+            </port-info>
+            <port-info>
+                <local-port>121</local-port>
+                <width>8</width>
+                <module>4</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>2</split>
+            </port-info>
+            <port-info>
+                <local-port>125</local-port>
+                <width>8</width>
+                <module>5</module>
+                <breakout-modes>1</breakout-modes>
+                <port-speed>4096</port-speed>
+                <split>2</split>
+            </port-info>
+        </ports-list>
+    </platform_info>
+</root>

From 427f91161e361da3ced3466899ef15b61bb7f6b4 Mon Sep 17 00:00:00 2001
From: Gagan Punathil Ellath <gpunathilell@nvidia.com>
Date: Mon, 5 Aug 2024 15:41:47 -0700
Subject: [PATCH 0877/1115] [SmartSwitch] DPU Management Traffic Forwarding
 script (#19431)

[SmartSwitch] DPU Management Traffic Forwarding script
---
 .../build_templates/sonic_debian_extension.j2 |  1 +
 files/scripts/sonic-dpu-mgmt-traffic.sh       | 85 +++++++++++++++++++
 2 files changed, 86 insertions(+)
 create mode 100755 files/scripts/sonic-dpu-mgmt-traffic.sh

diff --git a/files/build_templates/sonic_debian_extension.j2 b/files/build_templates/sonic_debian_extension.j2
index 65a9739d9..f32cd7f22 100644
--- a/files/build_templates/sonic_debian_extension.j2
+++ b/files/build_templates/sonic_debian_extension.j2
@@ -1003,6 +1003,7 @@ sudo LANG=C cp $SCRIPTS_DIR/mgmt-framework.sh $FILESYSTEM_ROOT/usr/local/bin/mgm
 sudo LANG=C cp $SCRIPTS_DIR/asic_status.sh $FILESYSTEM_ROOT/usr/local/bin/asic_status.sh
 sudo LANG=C cp $SCRIPTS_DIR/asic_status.py $FILESYSTEM_ROOT/usr/local/bin/asic_status.py
 sudo LANG=C cp $SCRIPTS_DIR/startup_tsa_tsb.py $FILESYSTEM_ROOT/usr/local/bin/startup_tsa_tsb.py
+sudo LANG=C cp $SCRIPTS_DIR/sonic-dpu-mgmt-traffic.sh $FILESYSTEM_ROOT/usr/local/bin/sonic-dpu-mgmt-traffic.sh
 
 # Copy sonic-netns-exec script
 sudo LANG=C cp $SCRIPTS_DIR/sonic-netns-exec $FILESYSTEM_ROOT/usr/bin/sonic-netns-exec
diff --git a/files/scripts/sonic-dpu-mgmt-traffic.sh b/files/scripts/sonic-dpu-mgmt-traffic.sh
new file mode 100755
index 000000000..71e6ed29b
--- /dev/null
+++ b/files/scripts/sonic-dpu-mgmt-traffic.sh
@@ -0,0 +1,85 @@
+#!/bin/bash
+#Script to control the DPU management traffic forwarding through the SmartSwitch
+
+command_name=$0
+
+usage(){
+    echo "Syntax: $command_name -e|--enable -d|--disable"
+    echo "Arguments:"
+    echo "-e			Enable dpu management traffic forwarding"
+    echo "-d			Disable dpu management traffic forwarding"
+}
+
+add_rem_valid_iptable(){
+    local op=$1
+    local table=$2
+    local chain=$3
+    shift 3
+    local rule="$@"
+    iptables -t $table -C $chain $rule &>/dev/null
+    local exit_status=$?
+    local exec_cond=0
+    if [ "$op" = "enable" ]; then
+        exec_command="iptables -t $table -A $chain $rule"
+        [ "$exit_status" -eq 0 ] || exec_cond=1 # Execute if rule is currently not present
+    else
+        exec_command="iptables -t $table -D $chain $rule"
+        [ "$exit_status" -ne 0 ] || exec_cond=1 # Execute if rule is currently present
+    fi
+    if [ "$exec_cond" -eq 1 ]; then
+        eval "$exec_command"
+    else
+        echo "$exec_command not requried, will not be executed"
+    fi
+}
+
+control_forwarding(){
+    local op=$1
+    local value=0
+    if [ "$op" = "enable" ]; then
+        value=1
+    fi
+    echo $value > /proc/sys/net/ipv4/ip_forward
+    echo $value > /proc/sys/net/ipv4/conf/eth0/forwarding
+}
+
+ctrl_dpu_forwarding(){
+    local op=$1
+    control_forwarding $op
+    add_rem_valid_iptable $op nat POSTROUTING -o ${mgmt_iface}  -j MASQUERADE
+    add_rem_valid_iptable $op filter FORWARD -i ${mgmt_iface} -o ${midplane_iface} -m conntrack --ctstate RELATED,ESTABLISHED -j ACCEPT
+    add_rem_valid_iptable $op filter FORWARD -i ${midplane_iface} -o ${mgmt_iface} -j ACCEPT
+    if [ "$op" = "enable" ]; then
+        echo "Enabled DPU management traffic Forwarding"
+    else
+        echo "Disabled DPU management traffic Forwarding"
+    fi
+}
+
+mgmt_iface=eth0
+midplane_iface=bridge-midplane
+
+if [ "$EUID" -ne 0 ]
+    then
+    echo "Permission denied: Please run the script with elevated privileges using sudo"
+    exit 1
+fi
+
+if ! ifconfig "$midplane_iface" > /dev/null 2>&1; then
+    echo "$midplane_iface doesn't exist! Please run on smart switch system"
+    exit 1
+fi
+
+case $1 in
+    -e|--enable)
+        ctrl_dpu_forwarding enable
+        ;;
+    -d|--disable)
+        ctrl_dpu_forwarding disable
+        ;;
+    *)
+        echo "Incorrect Usage!"
+        usage
+        exit 1
+        ;;
+esac

From c0e5b8e34ac01412895a4fd2855a71198d9704c4 Mon Sep 17 00:00:00 2001
From: Sudharsan Dhamal Gopalarathnam <sudharsand@nvidia.com>
Date: Mon, 5 Aug 2024 21:50:23 -0700
Subject: [PATCH 0878/1115] [FRR] Zebra BGP enhancements to better handle
 memory during route churns (#19717)

Added the below patches which are part of BGP Zebra back pressure feature required to keep the memory usage in check during route churns

How I did it
New patches that were added:

Patch	FRR Pull request
0030-zebra-backpressure-Zebra-push-back-on-Buffer-Stream-.patch	FRRouting/frr#15411
0031-bgpd-backpressure-Add-a-typesafe-list-for-Zebra-Anno.patch	FRRouting/frr#15524
0032-bgpd-fix-flushing-ipv6-flowspec-entries-when-peering.patch	FRRouting/frr#15326
0033-bgpd-backpressure-cleanup-bgp_zebra_XX-func-args.patch	FRRouting/frr#15524
0034-gpd-backpressure-Handle-BGP-Zebra-Install-evt-Creat.patch	FRRouting/frr#15524
0035-bgpd-backpressure-Handle-BGP-Zebra-EPVN-Install-evt-.patch	FRRouting/frr#15624
0036-zebra-backpressure-Fix-Null-ptr-access-Coverity-Issu.patch	FRRouting/frr#15728
0037-bgpd-Increase-install-uninstall-speed-of-evpn-vpn-vn.patch	FRRouting/frr#15727
0038-zebra-Actually-display-I-O-buffer-sizes.patch	FRRouting/frr#15708
0039-zebra-Actually-display-I-O-buffer-sizes-part-2.patch	FRRouting/frr#15769
0040-bgpd-backpressure-Fix-to-withdraw-evpn-type-5-routes.patch	FRRouting/frr#16034
0041-bgpd-backpressure-Fix-to-avoid-CPU-hog.patch	FRRouting/frr#16035
0042-zebra-Use-built-in-data-structure-counter.patch	FRRouting/frr#16221
0043-zebra-Use-the-ctx-queue-counters.patch	FRRouting/frr#16220
0044-zebra-Modify-dplane-loop-to-allow-backpressure-to-fi.patch	FRRouting/frr#16220
0045-zebra-Limit-queue-depth-in-dplane_fpm_nl.patch	FRRouting/frr#16220
0046-zebra-Modify-show-zebra-dplane-providers-to-give-mor.patch	FRRouting/frr#16220
0047-bgpd-backpressure-fix-evpn-route-sync-to-zebra.patch	FRRouting/frr#16234
0048-bgpd-backpressure-fix-to-properly-remove-dest-for-bg.patch	FRRouting/frr#16368
0049-bgpd-backpressure-Improve-debuggability.patch	FRRouting/frr#16368
0050-bgpd-backpressure-Avoid-use-after-free.patch	FRRouting/frr#16437
0051-bgpd-backpressure-fix-ret-value-evpn_route_select_in.patch	FRRouting/frr#16416
0052-bgpd-backpressure-log-error-for-evpn-when-route-inst.patch	FRRouting/frr#16416
---
 ...re-Zebra-push-back-on-Buffer-Stream-.patch | 174 +++
 ...e-Add-a-typesafe-list-for-Zebra-Anno.patch |  90 ++
 ...g-ipv6-flowspec-entries-when-peering.patch | 158 +++
 ...ssure-cleanup-bgp_zebra_XX-func-args.patch | 234 ++++
 ...e-Handle-BGP-Zebra-Install-evt-Creat.patch | 512 +++++++++
 ...e-Handle-BGP-Zebra-EPVN-Install-evt-.patch | 995 ++++++++++++++++++
 ...re-Fix-Null-ptr-access-Coverity-Issu.patch |  29 +
 ...stall-uninstall-speed-of-evpn-vpn-vn.patch | 116 ++
 ...ra-Actually-display-I-O-buffer-sizes.patch |  49 +
 ...ally-display-I-O-buffer-sizes-part-2.patch |  49 +
 ...e-Fix-to-withdraw-evpn-type-5-routes.patch |  63 ++
 ...pd-backpressure-Fix-to-avoid-CPU-hog.patch |  53 +
 ...-Use-built-in-data-structure-counter.patch | 156 +++
 ...043-zebra-Use-the-ctx-queue-counters.patch | 108 ++
 ...ane-loop-to-allow-backpressure-to-fi.patch | 199 ++++
 ...a-Limit-queue-depth-in-dplane_fpm_nl.patch |  52 +
 ...w-zebra-dplane-providers-to-give-mor.patch | 102 ++
 ...ressure-fix-evpn-route-sync-to-zebra.patch |  33 +
 ...e-fix-to-properly-remove-dest-for-bg.patch |  90 ++
 ...d-backpressure-Improve-debuggability.patch |  46 +
 ...pd-backpressure-Avoid-use-after-free.patch |  48 +
 ...e-fix-ret-value-evpn_route_select_in.patch |  73 ++
 ...e-log-error-for-evpn-when-route-inst.patch |  61 ++
 src/sonic-frr/patch/series                    |  23 +
 24 files changed, 3513 insertions(+)
 create mode 100644 src/sonic-frr/patch/0030-zebra-backpressure-Zebra-push-back-on-Buffer-Stream-.patch
 create mode 100644 src/sonic-frr/patch/0031-bgpd-backpressure-Add-a-typesafe-list-for-Zebra-Anno.patch
 create mode 100644 src/sonic-frr/patch/0032-bgpd-fix-flushing-ipv6-flowspec-entries-when-peering.patch
 create mode 100644 src/sonic-frr/patch/0033-bgpd-backpressure-cleanup-bgp_zebra_XX-func-args.patch
 create mode 100644 src/sonic-frr/patch/0034-gpd-backpressure-Handle-BGP-Zebra-Install-evt-Creat.patch
 create mode 100644 src/sonic-frr/patch/0035-bgpd-backpressure-Handle-BGP-Zebra-EPVN-Install-evt-.patch
 create mode 100644 src/sonic-frr/patch/0036-zebra-backpressure-Fix-Null-ptr-access-Coverity-Issu.patch
 create mode 100644 src/sonic-frr/patch/0037-bgpd-Increase-install-uninstall-speed-of-evpn-vpn-vn.patch
 create mode 100644 src/sonic-frr/patch/0038-zebra-Actually-display-I-O-buffer-sizes.patch
 create mode 100644 src/sonic-frr/patch/0039-zebra-Actually-display-I-O-buffer-sizes-part-2.patch
 create mode 100644 src/sonic-frr/patch/0040-bgpd-backpressure-Fix-to-withdraw-evpn-type-5-routes.patch
 create mode 100644 src/sonic-frr/patch/0041-bgpd-backpressure-Fix-to-avoid-CPU-hog.patch
 create mode 100644 src/sonic-frr/patch/0042-zebra-Use-built-in-data-structure-counter.patch
 create mode 100644 src/sonic-frr/patch/0043-zebra-Use-the-ctx-queue-counters.patch
 create mode 100644 src/sonic-frr/patch/0044-zebra-Modify-dplane-loop-to-allow-backpressure-to-fi.patch
 create mode 100644 src/sonic-frr/patch/0045-zebra-Limit-queue-depth-in-dplane_fpm_nl.patch
 create mode 100644 src/sonic-frr/patch/0046-zebra-Modify-show-zebra-dplane-providers-to-give-mor.patch
 create mode 100644 src/sonic-frr/patch/0047-bgpd-backpressure-fix-evpn-route-sync-to-zebra.patch
 create mode 100644 src/sonic-frr/patch/0048-bgpd-backpressure-fix-to-properly-remove-dest-for-bg.patch
 create mode 100644 src/sonic-frr/patch/0049-bgpd-backpressure-Improve-debuggability.patch
 create mode 100644 src/sonic-frr/patch/0050-bgpd-backpressure-Avoid-use-after-free.patch
 create mode 100644 src/sonic-frr/patch/0051-bgpd-backpressure-fix-ret-value-evpn_route_select_in.patch
 create mode 100644 src/sonic-frr/patch/0052-bgpd-backpressure-log-error-for-evpn-when-route-inst.patch

diff --git a/src/sonic-frr/patch/0030-zebra-backpressure-Zebra-push-back-on-Buffer-Stream-.patch b/src/sonic-frr/patch/0030-zebra-backpressure-Zebra-push-back-on-Buffer-Stream-.patch
new file mode 100644
index 000000000..0bebd1ea1
--- /dev/null
+++ b/src/sonic-frr/patch/0030-zebra-backpressure-Zebra-push-back-on-Buffer-Stream-.patch
@@ -0,0 +1,174 @@
+From 7c711ff437985b23a4dd919a98b22b8ea14ef553 Mon Sep 17 00:00:00 2001
+From: Rajasekar Raja <rajasekarr@nvidia.com>
+Date: Mon, 12 Feb 2024 10:44:18 -0800
+Subject: [PATCH 02/11] zebra: backpressure - Zebra push back on Buffer/Stream
+ creation
+
+Currently, the way zebra works is it creates pthread per client (BGP is
+of interest in this case) and this thread loops itself in zserv_read()
+to check for any incoming data. If there is one, then it reads,
+validates and adds it in the ibuf_fifo signalling the main thread to
+process the message. The main thread when it gets a change, processes
+the message, and invokes the function pointer registered in the header
+command. (Ex: zserv_handlers).
+
+Finally, if all of this was successful, this task reschedules itself and
+loops in zserv_read() again
+
+However, if there are already items on ibuf FIFO, that means zebra is
+slow in processing. And with the current mechanism if Zebra main is
+busy, the ibuf FIFO keeps growing holding up the memory.
+
+Show memory zebra:(Example: 15k streams hoarding ~160 MB of data)
+--- qmem libfrr ---
+Stream             :       44 variable   3432352    15042 161243800
+
+Fix:
+Client IO Thread: (zserv_read)
+ - Stop doing the read events when we know there are X number of items
+   on the FIFO already.(X - zebra zapi-packets <1-10000> (Default-1000)
+
+ - Determine the number of items on the zserv->ibuf_fifo. Subtract this
+   from the work items and only pull the number of items off that would
+   take us to X items on the ibuf_fifo again.
+
+ - If the number of items in the ibuf_fifo has reached to the maximum
+      * Either initially when zserv_read() is called (or)
+      * when processing the remainders of the incoming buffer
+   the client IO thread is woken by the the zebra main.
+
+Main thread: (zserv_process_message)
+If the client ibuf always schedules a wakeup to the client IO to read
+more items from the socked buffer. This way we ensure
+ - Client IO thread always tries to read the socket buffer and add more
+   items to the ibuf_fifo (until max limit)
+ - hidden config change (zebra zapi-packets <>) is taken into account
+
+Ticket: #3390099
+
+Signed-off-by: Donald Sharp <sharpd@nvidia.com>
+Signed-off-by: Rajasekar Raja <rajasekarr@nvidia.com>
+
+diff --git a/zebra/zserv.c b/zebra/zserv.c
+index 2024f34534..de6e404fc4 100644
+--- a/zebra/zserv.c
++++ b/zebra/zserv.c
+@@ -318,6 +318,14 @@ zwrite_fail:
+  * this task reschedules itself.
+  *
+  * Any failure in any of these actions is handled by terminating the client.
++ *
++ * The client's input buffer ibuf_fifo can have a maximum items as configured
++ * in the packets_to_process. This way we are not filling up the FIFO more
++ * than the maximum when the zebra main is busy. If the fifo has space, we
++ * reschedule ourselves to read more.
++ *
++ * The main thread processes the items in ibuf_fifo and always signals the
++ * client IO thread.
+  */
+ static void zserv_read(struct thread *thread)
+ {
+@@ -325,15 +333,25 @@ static void zserv_read(struct thread *thread)
+ 	int sock;
+ 	size_t already;
+ 	struct stream_fifo *cache;
+-	uint32_t p2p_orig;
+-
+-	uint32_t p2p;
++	uint32_t p2p;	    /* Temp p2p used to process */
++	uint32_t p2p_orig;  /* Configured p2p (Default-1000) */
++	int p2p_avail;	    /* How much space is available for p2p */
+ 	struct zmsghdr hdr;
++	size_t client_ibuf_fifo_cnt = stream_fifo_count_safe(client->ibuf_fifo);
+ 
+ 	p2p_orig = atomic_load_explicit(&zrouter.packets_to_process,
+ 					memory_order_relaxed);
++	p2p_avail = p2p_orig - client_ibuf_fifo_cnt;
++
++    /*
++     * Do nothing if ibuf_fifo count has reached its max limit. Otherwise
++     * proceed and reschedule ourselves if there is space in the ibuf_fifo.
++     */
++	if (p2p_avail <= 0)
++		return;
++
++	p2p = p2p_avail;
+ 	cache = stream_fifo_new();
+-	p2p = p2p_orig;
+ 	sock = THREAD_FD(thread);
+ 
+ 	while (p2p) {
+@@ -433,7 +451,7 @@ static void zserv_read(struct thread *thread)
+ 		p2p--;
+ 	}
+ 
+-	if (p2p < p2p_orig) {
++	if (p2p < (uint32_t)p2p_avail) {
+ 		uint64_t time_now = monotime(NULL);
+ 
+ 		/* update session statistics */
+@@ -447,19 +465,23 @@ static void zserv_read(struct thread *thread)
+ 			while (cache->head)
+ 				stream_fifo_push(client->ibuf_fifo,
+ 						 stream_fifo_pop(cache));
++			/* Need to update count as main thread could have processed few */
++			client_ibuf_fifo_cnt =
++				stream_fifo_count_safe(client->ibuf_fifo);
+ 		}
+ 
+ 		/* Schedule job to process those packets */
+ 		zserv_event(client, ZSERV_PROCESS_MESSAGES);
+-
+ 	}
+ 
+ 	if (IS_ZEBRA_DEBUG_PACKET)
+-		zlog_debug("Read %d packets from client: %s", p2p_orig - p2p,
+-			   zebra_route_string(client->proto));
++		zlog_debug("Read %d packets from client: %s. Current ibuf fifo count: %zu. Conf P2p %d",
++			   p2p_avail - p2p, zebra_route_string(client->proto),
++			   client_ibuf_fifo_cnt, p2p_orig);
+ 
+-	/* Reschedule ourselves */
+-	zserv_client_event(client, ZSERV_CLIENT_READ);
++	/* Reschedule ourselves since we have space in ibuf_fifo */
++	if (client_ibuf_fifo_cnt < p2p_orig)
++		zserv_client_event(client, ZSERV_CLIENT_READ);
+ 
+ 	stream_fifo_free(cache);
+ 
+@@ -495,14 +517,20 @@ static void zserv_client_event(struct zserv *client,
+  * as the task argument.
+  *
+  * Each message is popped off the client's input queue and the action associated
+- * with the message is executed. This proceeds until there are no more messages,
+- * an error occurs, or the processing limit is reached.
++ * with the message is executed. This proceeds until an error occurs, or the
++ * processing limit is reached.
+  *
+  * The client's I/O thread can push at most zrouter.packets_to_process messages
+  * onto the input buffer before notifying us there are packets to read. As long
+  * as we always process zrouter.packets_to_process messages here, then we can
+  * rely on the read thread to handle queuing this task enough times to process
+  * everything on the input queue.
++ *
++ * If the client ibuf always schedules a wakeup to the client IO to read more
++ * items from the socked buffer. This way we ensure
++ *  - Client IO thread always tries to read the socket buffer and add more
++ *    items to the ibuf_fifo (until max limit)
++ *  - the hidden config change (zebra zapi-packets <>) is taken into account.
+  */
+ static void zserv_process_messages(struct thread *thread)
+ {
+@@ -538,6 +566,9 @@ static void zserv_process_messages(struct thread *thread)
+ 	/* Reschedule ourselves if necessary */
+ 	if (need_resched)
+ 		zserv_event(client, ZSERV_PROCESS_MESSAGES);
++
++	/* Ensure to include the read socket in the select/poll/etc.. */
++	zserv_client_event(client, ZSERV_CLIENT_READ);
+ }
+ 
+ int zserv_send_message(struct zserv *client, struct stream *msg)
+-- 
+2.17.1
+
diff --git a/src/sonic-frr/patch/0031-bgpd-backpressure-Add-a-typesafe-list-for-Zebra-Anno.patch b/src/sonic-frr/patch/0031-bgpd-backpressure-Add-a-typesafe-list-for-Zebra-Anno.patch
new file mode 100644
index 000000000..21a2b90f4
--- /dev/null
+++ b/src/sonic-frr/patch/0031-bgpd-backpressure-Add-a-typesafe-list-for-Zebra-Anno.patch
@@ -0,0 +1,90 @@
+From 7796ce2bb6eb1650ae1bec41ab2f270807b33c62 Mon Sep 17 00:00:00 2001
+From: Donald Sharp <sharpd@nvidia.com>
+Date: Thu, 25 Jan 2024 12:53:24 -0500
+Subject: [PATCH 03/11] bgpd: backpressure - Add a typesafe list for Zebra
+ Announcement
+
+Modify the bgp master to hold a type safe list for bgp_dests that need
+to be passed to zebra.
+
+Future commits will use this.
+
+Ticket: #3390099
+
+Signed-off-by: Donald Sharp <sharpd@nvidia.com>
+Signed-off-by: Rajasekar Raja <rajasekarr@nvidia.com>
+
+diff --git a/bgpd/bgp_main.c b/bgpd/bgp_main.c
+index 90ae580bab..e28dde5d16 100644
+--- a/bgpd/bgp_main.c
++++ b/bgpd/bgp_main.c
+@@ -214,6 +214,8 @@ static __attribute__((__noreturn__)) void bgp_exit(int status)
+ 	bgp_evpn_mh_finish();
+ 	bgp_l3nhg_finish();
+ 
++	zebra_announce_fini(&bm->zebra_announce_head);
++
+ 	/* reverse bgp_dump_init */
+ 	bgp_dump_finish();
+ 
+diff --git a/bgpd/bgp_table.h b/bgpd/bgp_table.h
+index 121afc481f..d43bf86eb9 100644
+--- a/bgpd/bgp_table.h
++++ b/bgpd/bgp_table.h
+@@ -101,6 +101,8 @@ struct bgp_node {
+ 
+ 	STAILQ_ENTRY(bgp_dest) pq;
+ 
++	struct zebra_announce_item zai;
++
+ 	uint64_t version;
+ 
+ 	mpls_label_t local_label;
+@@ -121,6 +123,8 @@ struct bgp_node {
+ 	enum bgp_path_selection_reason reason;
+ };
+ 
++DECLARE_LIST(zebra_announce, struct bgp_dest, zai);
++
+ extern void bgp_delete_listnode(struct bgp_dest *dest);
+ /*
+  * bgp_table_iter_t
+diff --git a/bgpd/bgpd.c b/bgpd/bgpd.c
+index 023047050b..392423e028 100644
+--- a/bgpd/bgpd.c
++++ b/bgpd/bgpd.c
+@@ -8017,6 +8017,8 @@ void bgp_master_init(struct thread_master *master, const int buffer_size,
+ 	memset(&bgp_master, 0, sizeof(bgp_master));
+ 
+ 	bm = &bgp_master;
++
++	zebra_announce_init(&bm->zebra_announce_head);
+ 	bm->bgp = list_new();
+ 	bm->listen_sockets = list_new();
+ 	bm->port = BGP_PORT_DEFAULT;
+diff --git a/bgpd/bgpd.h b/bgpd/bgpd.h
+index 72b5b50fb4..55f53bf9d3 100644
+--- a/bgpd/bgpd.h
++++ b/bgpd/bgpd.h
+@@ -32,6 +32,8 @@
+ #include "srv6.h"
+ #include "iana_afi.h"
+ 
++PREDECL_LIST(zebra_announce);
++
+ /* For union sockunion.  */
+ #include "queue.h"
+ #include "sockunion.h"
+@@ -180,6 +182,9 @@ struct bgp_master {
+ 	uint32_t inq_limit;
+ 	uint32_t outq_limit;
+ 
++	/* To preserve ordering of installations into zebra across all Vrfs */
++	struct zebra_announce_head zebra_announce_head;
++
+ 	QOBJ_FIELDS;
+ };
+ DECLARE_QOBJ_TYPE(bgp_master);
+-- 
+2.17.1
+
diff --git a/src/sonic-frr/patch/0032-bgpd-fix-flushing-ipv6-flowspec-entries-when-peering.patch b/src/sonic-frr/patch/0032-bgpd-fix-flushing-ipv6-flowspec-entries-when-peering.patch
new file mode 100644
index 000000000..bfefcccef
--- /dev/null
+++ b/src/sonic-frr/patch/0032-bgpd-fix-flushing-ipv6-flowspec-entries-when-peering.patch
@@ -0,0 +1,158 @@
+From 69e38aa82f325129ebad4535be5d834c599b5c0b Mon Sep 17 00:00:00 2001
+From: Philippe Guibert <philippe.guibert@6wind.com>
+Date: Wed, 7 Feb 2024 22:34:34 +0100
+Subject: [PATCH 04/11] bgpd: fix flushing ipv6 flowspec entries when peering
+ stops
+
+When a BGP flowspec peering stops, the BGP RIB entries for IPv6
+flowspec entries are removed, but not the ZEBRA RIB IPv6 entries.
+
+Actually, when calling bgp_zebra_withdraw() function call, only
+the AFI_IP parameter is passed to the bgp_pbr_update_entry() function
+in charge of the Flowspec add/delete in zebra. Fix this by passing
+the AFI parameter to the bgp_zebra_withdraw() function.
+
+Note that using topotest does not show up the problem as the
+flowspec driver code is not present and was refused. Without that,
+routes are not installed, and can not be uninstalled.
+
+Fixes: 529efa234655 ("bgpd: allow flowspec entries to be announced to zebra")
+Link: https://github.com/FRRouting/frr/pull/2025
+
+Signed-off-by: Philippe Guibert <philippe.guibert@6wind.com>
+
+diff --git a/bgpd/bgp_route.c b/bgpd/bgp_route.c
+index fbff57634a..455cd6cdbb 100644
+--- a/bgpd/bgp_route.c
++++ b/bgpd/bgp_route.c
+@@ -3312,7 +3312,8 @@ static void bgp_process_main_one(struct bgp *bgp, struct bgp_dest *dest,
+ 			 */
+ 			if (old_select &&
+ 			    is_route_parent_evpn(old_select))
+-				bgp_zebra_withdraw(p, old_select, bgp, safi);
++				bgp_zebra_withdraw(p, old_select, bgp, afi,
++						   safi);
+ 
+ 			bgp_zebra_announce(dest, p, new_select, bgp, afi, safi);
+ 		} else {
+@@ -3322,7 +3323,8 @@ static void bgp_process_main_one(struct bgp *bgp, struct bgp_dest *dest,
+ 				|| old_select->sub_type == BGP_ROUTE_AGGREGATE
+ 				|| old_select->sub_type == BGP_ROUTE_IMPORTED))
+ 
+-				bgp_zebra_withdraw(p, old_select, bgp, safi);
++				bgp_zebra_withdraw(p, old_select, bgp, afi,
++						   safi);
+ 		}
+ 	}
+ 
+@@ -4201,7 +4203,7 @@ void bgp_update(struct peer *peer, const struct prefix *p, uint32_t addpath_id,
+ 	if (pi && pi->attr->rmap_table_id != new_attr.rmap_table_id) {
+ 		if (CHECK_FLAG(pi->flags, BGP_PATH_SELECTED))
+ 			/* remove from RIB previous entry */
+-			bgp_zebra_withdraw(p, pi, bgp, safi);
++			bgp_zebra_withdraw(p, pi, bgp, afi, safi);
+ 	}
+ 
+ 	if (peer->sort == BGP_PEER_EBGP) {
+@@ -5841,7 +5843,7 @@ bool bgp_inbound_policy_exists(struct peer *peer, struct bgp_filter *filter)
+ }
+ 
+ static void bgp_cleanup_table(struct bgp *bgp, struct bgp_table *table,
+-			      safi_t safi)
++			      afi_t afi, safi_t safi)
+ {
+ 	struct bgp_dest *dest;
+ 	struct bgp_path_info *pi;
+@@ -5865,7 +5867,8 @@ static void bgp_cleanup_table(struct bgp *bgp, struct bgp_table *table,
+ 				|| pi->sub_type == BGP_ROUTE_IMPORTED)) {
+ 
+ 				if (bgp_fibupd_safi(safi))
+-					bgp_zebra_withdraw(p, pi, bgp, safi);
++					bgp_zebra_withdraw(p, pi, bgp, afi,
++							   safi);
+ 			}
+ 
+ 			bgp_path_info_reap(dest, pi);
+@@ -5882,7 +5885,7 @@ void bgp_cleanup_routes(struct bgp *bgp)
+ 	for (afi = AFI_IP; afi < AFI_MAX; ++afi) {
+ 		if (afi == AFI_L2VPN)
+ 			continue;
+-		bgp_cleanup_table(bgp, bgp->rib[afi][SAFI_UNICAST],
++		bgp_cleanup_table(bgp, bgp->rib[afi][SAFI_UNICAST], afi,
+ 				  SAFI_UNICAST);
+ 		/*
+ 		 * VPN and ENCAP and EVPN tables are two-level (RD is top level)
+@@ -5894,7 +5897,7 @@ void bgp_cleanup_routes(struct bgp *bgp)
+ 			     dest = bgp_route_next(dest)) {
+ 				table = bgp_dest_get_bgp_table_info(dest);
+ 				if (table != NULL) {
+-					bgp_cleanup_table(bgp, table, safi);
++					bgp_cleanup_table(bgp, table, afi, safi);
+ 					bgp_table_finish(&table);
+ 					bgp_dest_set_bgp_table_info(dest, NULL);
+ 					bgp_dest_unlock_node(dest);
+@@ -5905,7 +5908,7 @@ void bgp_cleanup_routes(struct bgp *bgp)
+ 			     dest = bgp_route_next(dest)) {
+ 				table = bgp_dest_get_bgp_table_info(dest);
+ 				if (table != NULL) {
+-					bgp_cleanup_table(bgp, table, safi);
++					bgp_cleanup_table(bgp, table, afi, safi);
+ 					bgp_table_finish(&table);
+ 					bgp_dest_set_bgp_table_info(dest, NULL);
+ 					bgp_dest_unlock_node(dest);
+@@ -5917,7 +5920,7 @@ void bgp_cleanup_routes(struct bgp *bgp)
+ 	     dest = bgp_route_next(dest)) {
+ 		table = bgp_dest_get_bgp_table_info(dest);
+ 		if (table != NULL) {
+-			bgp_cleanup_table(bgp, table, SAFI_EVPN);
++			bgp_cleanup_table(bgp, table, afi, SAFI_EVPN);
+ 			bgp_table_finish(&table);
+ 			bgp_dest_set_bgp_table_info(dest, NULL);
+ 			bgp_dest_unlock_node(dest);
+diff --git a/bgpd/bgp_zebra.c b/bgpd/bgp_zebra.c
+index ff79746b4c..69240a3b83 100644
+--- a/bgpd/bgp_zebra.c
++++ b/bgpd/bgp_zebra.c
+@@ -1761,7 +1761,7 @@ void bgp_zebra_announce_table_all_subtypes(struct bgp *bgp, afi_t afi,
+ }
+ 
+ void bgp_zebra_withdraw(const struct prefix *p, struct bgp_path_info *info,
+-			struct bgp *bgp, safi_t safi)
++			struct bgp *bgp, afi_t afi, safi_t safi)
+ {
+ 	struct zapi_route api;
+ 	struct peer *peer;
+@@ -1780,7 +1780,7 @@ void bgp_zebra_withdraw(const struct prefix *p, struct bgp_path_info *info,
+ 
+ 	if (safi == SAFI_FLOWSPEC) {
+ 		peer = info->peer;
+-		bgp_pbr_update_entry(peer->bgp, p, info, AFI_IP, safi, false);
++		bgp_pbr_update_entry(peer->bgp, p, info, afi, safi, false);
+ 		return;
+ 	}
+ 
+@@ -1821,7 +1821,7 @@ void bgp_zebra_withdraw_table_all_subtypes(struct bgp *bgp, afi_t afi, safi_t sa
+ 			if (CHECK_FLAG(pi->flags, BGP_PATH_SELECTED)
+ 			    && (pi->type == ZEBRA_ROUTE_BGP))
+ 				bgp_zebra_withdraw(bgp_dest_get_prefix(dest),
+-						   pi, bgp, safi);
++						   pi, bgp, afi, safi);
+ 		}
+ 	}
+ }
+diff --git a/bgpd/bgp_zebra.h b/bgpd/bgp_zebra.h
+index 0a41069411..a5fe8d7ace 100644
+--- a/bgpd/bgp_zebra.h
++++ b/bgpd/bgp_zebra.h
+@@ -49,7 +49,7 @@ extern void bgp_zebra_announce(struct bgp_dest *dest, const struct prefix *p,
+ extern void bgp_zebra_announce_table(struct bgp *bgp, afi_t afi, safi_t safi);
+ extern void bgp_zebra_withdraw(const struct prefix *p,
+ 			       struct bgp_path_info *path, struct bgp *bgp,
+-			       safi_t safi);
++			       afi_t afi, safi_t safi);
+ 
+ /* Announce routes of any bgp subtype of a table to zebra */
+ extern void bgp_zebra_announce_table_all_subtypes(struct bgp *bgp, afi_t afi,
+-- 
+2.17.1
+
diff --git a/src/sonic-frr/patch/0033-bgpd-backpressure-cleanup-bgp_zebra_XX-func-args.patch b/src/sonic-frr/patch/0033-bgpd-backpressure-cleanup-bgp_zebra_XX-func-args.patch
new file mode 100644
index 000000000..16383dc95
--- /dev/null
+++ b/src/sonic-frr/patch/0033-bgpd-backpressure-cleanup-bgp_zebra_XX-func-args.patch
@@ -0,0 +1,234 @@
+From 679ad9ee5f3c15570d697506183d37aa29f6ebf2 Mon Sep 17 00:00:00 2001
+From: Donald Sharp <sharpd@nvidia.com>
+Date: Thu, 25 Jan 2024 13:07:37 -0500
+Subject: [PATCH 05/11] bgpd: backpressure - cleanup bgp_zebra_XX func args
+
+Since installing/withdrawing routes into zebra is going to be changed
+around to be dest based in a list,
+ - Retrieve the afi/safi to use based upon the dest's afi/safi
+   instead of passing it in.
+ - Prefix is known by the dest. Remove this arg as well
+
+Ticket: #3390099
+
+Signed-off-by: Donald Sharp <sharpd@nvidia.com>
+Signed-off-by: Rajasekar Raja <rajasekarr@nvidia.com>
+
+diff --git a/bgpd/bgp_route.c b/bgpd/bgp_route.c
+index 455cd6cdbb..d19f27110e 100644
+--- a/bgpd/bgp_route.c
++++ b/bgpd/bgp_route.c
+@@ -3214,8 +3214,8 @@ static void bgp_process_main_one(struct bgp *bgp, struct bgp_dest *dest,
+ 					|| new_select->sub_type
+ 						   == BGP_ROUTE_IMPORTED))
+ 
+-					bgp_zebra_announce(dest, p, old_select,
+-							   bgp, afi, safi);
++					bgp_zebra_announce(dest, old_select,
++							   bgp);
+ 			}
+ 		}
+ 
+@@ -3312,10 +3312,9 @@ static void bgp_process_main_one(struct bgp *bgp, struct bgp_dest *dest,
+ 			 */
+ 			if (old_select &&
+ 			    is_route_parent_evpn(old_select))
+-				bgp_zebra_withdraw(p, old_select, bgp, afi,
+-						   safi);
++				bgp_zebra_withdraw(dest, old_select, bgp);
+ 
+-			bgp_zebra_announce(dest, p, new_select, bgp, afi, safi);
++			bgp_zebra_announce(dest, new_select, bgp);
+ 		} else {
+ 			/* Withdraw the route from the kernel. */
+ 			if (old_select && old_select->type == ZEBRA_ROUTE_BGP
+@@ -3323,8 +3322,7 @@ static void bgp_process_main_one(struct bgp *bgp, struct bgp_dest *dest,
+ 				|| old_select->sub_type == BGP_ROUTE_AGGREGATE
+ 				|| old_select->sub_type == BGP_ROUTE_IMPORTED))
+ 
+-				bgp_zebra_withdraw(p, old_select, bgp, afi,
+-						   safi);
++				bgp_zebra_withdraw(dest, old_select, bgp);
+ 		}
+ 	}
+ 
+@@ -4203,7 +4201,7 @@ void bgp_update(struct peer *peer, const struct prefix *p, uint32_t addpath_id,
+ 	if (pi && pi->attr->rmap_table_id != new_attr.rmap_table_id) {
+ 		if (CHECK_FLAG(pi->flags, BGP_PATH_SELECTED))
+ 			/* remove from RIB previous entry */
+-			bgp_zebra_withdraw(p, pi, bgp, afi, safi);
++			bgp_zebra_withdraw(dest, pi, bgp);
+ 	}
+ 
+ 	if (peer->sort == BGP_PEER_EBGP) {
+@@ -5867,8 +5865,7 @@ static void bgp_cleanup_table(struct bgp *bgp, struct bgp_table *table,
+ 				|| pi->sub_type == BGP_ROUTE_IMPORTED)) {
+ 
+ 				if (bgp_fibupd_safi(safi))
+-					bgp_zebra_withdraw(p, pi, bgp, afi,
+-							   safi);
++					bgp_zebra_withdraw(dest, pi, bgp);
+ 			}
+ 
+ 			bgp_path_info_reap(dest, pi);
+diff --git a/bgpd/bgp_zebra.c b/bgpd/bgp_zebra.c
+index 69240a3b83..920df835a4 100644
+--- a/bgpd/bgp_zebra.c
++++ b/bgpd/bgp_zebra.c
+@@ -1292,9 +1292,8 @@ static bool bgp_zebra_use_nhop_weighted(struct bgp *bgp, struct attr *attr,
+ 	return true;
+ }
+ 
+-void bgp_zebra_announce(struct bgp_dest *dest, const struct prefix *p,
+-			struct bgp_path_info *info, struct bgp *bgp, afi_t afi,
+-			safi_t safi)
++void bgp_zebra_announce(struct bgp_dest *dest, struct bgp_path_info *info,
++			struct bgp *bgp)
+ {
+ 	struct zapi_route api = { 0 };
+ 	struct zapi_nexthop *api_nh;
+@@ -1321,6 +1320,8 @@ void bgp_zebra_announce(struct bgp_dest *dest, const struct prefix *p,
+ 	uint32_t ttl = 0;
+ 	uint32_t bos = 0;
+ 	uint32_t exp = 0;
++	struct bgp_table *table = bgp_dest_table(dest);
++	const struct prefix *p = bgp_dest_get_prefix(dest);
+ 
+ 	/*
+ 	 * BGP is installing this route and bgp has been configured
+@@ -1339,9 +1340,9 @@ void bgp_zebra_announce(struct bgp_dest *dest, const struct prefix *p,
+ 	if (bgp->main_zebra_update_hold)
+ 		return;
+ 
+-	if (safi == SAFI_FLOWSPEC) {
+-		bgp_pbr_update_entry(bgp, bgp_dest_get_prefix(dest), info, afi,
+-				     safi, true);
++	if (table->safi == SAFI_FLOWSPEC) {
++		bgp_pbr_update_entry(bgp, p, info, table->afi, table->safi,
++				     true);
+ 		return;
+ 	}
+ 
+@@ -1354,7 +1355,7 @@ void bgp_zebra_announce(struct bgp_dest *dest, const struct prefix *p,
+ 	/* Make Zebra API structure. */
+ 	api.vrf_id = bgp->vrf_id;
+ 	api.type = ZEBRA_ROUTE_BGP;
+-	api.safi = safi;
++	api.safi = table->safi;
+ 	api.prefix = *p;
+ 	SET_FLAG(api.message, ZAPI_MESSAGE_NEXTHOP);
+ 
+@@ -1458,12 +1459,13 @@ void bgp_zebra_announce(struct bgp_dest *dest, const struct prefix *p,
+ 			}
+ 		}
+ 
+-		if (bgp->table_map[afi][safi].name) {
++		if (bgp->table_map[table->afi][table->safi].name) {
+ 			/* Copy info and attributes, so the route-map
+ 			   apply doesn't modify the BGP route info. */
+ 			local_attr = *mpinfo->attr;
+ 			mpinfo_cp->attr = &local_attr;
+-			if (!bgp_table_map_apply(bgp->table_map[afi][safi].map,
++			if (!bgp_table_map_apply(bgp->table_map[table->afi]
++						 [table->safi].map,
+ 						 p, mpinfo_cp))
+ 				continue;
+ 
+@@ -1619,7 +1621,7 @@ void bgp_zebra_announce(struct bgp_dest *dest, const struct prefix *p,
+ 		api.tag = tag;
+ 	}
+ 
+-	distance = bgp_distance_apply(p, info, afi, safi, bgp);
++	distance = bgp_distance_apply(p, info, table->afi, table->safi, bgp);
+ 	if (distance) {
+ 		SET_FLAG(api.message, ZAPI_MESSAGE_DISTANCE);
+ 		api.distance = distance;
+@@ -1731,9 +1733,7 @@ void bgp_zebra_announce_table(struct bgp *bgp, afi_t afi, safi_t safi)
+ 			     && (pi->sub_type == BGP_ROUTE_NORMAL
+ 				 || pi->sub_type == BGP_ROUTE_IMPORTED)))
+ 
+-				bgp_zebra_announce(dest,
+-						   bgp_dest_get_prefix(dest),
+-						   pi, bgp, afi, safi);
++				bgp_zebra_announce(dest, pi, bgp);
+ }
+ 
+ /* Announce routes of any bgp subtype of a table to zebra */
+@@ -1755,16 +1755,16 @@ void bgp_zebra_announce_table_all_subtypes(struct bgp *bgp, afi_t afi,
+ 		for (pi = bgp_dest_get_bgp_path_info(dest); pi; pi = pi->next)
+ 			if (CHECK_FLAG(pi->flags, BGP_PATH_SELECTED) &&
+ 			    pi->type == ZEBRA_ROUTE_BGP)
+-				bgp_zebra_announce(dest,
+-						   bgp_dest_get_prefix(dest),
+-						   pi, bgp, afi, safi);
++				bgp_zebra_announce(dest, pi, bgp);
+ }
+ 
+-void bgp_zebra_withdraw(const struct prefix *p, struct bgp_path_info *info,
+-			struct bgp *bgp, afi_t afi, safi_t safi)
++void bgp_zebra_withdraw(struct bgp_dest *dest, struct bgp_path_info *info,
++			struct bgp *bgp)
+ {
+ 	struct zapi_route api;
+ 	struct peer *peer;
++	struct bgp_table *table = bgp_dest_table(dest);
++	const struct prefix *p = bgp_dest_get_prefix(dest);
+ 
+ 	/*
+ 	 * If we are withdrawing the route, we don't need to have this
+@@ -1778,16 +1778,17 @@ void bgp_zebra_withdraw(const struct prefix *p, struct bgp_path_info *info,
+ 	if (!bgp_install_info_to_zebra(bgp))
+ 		return;
+ 
+-	if (safi == SAFI_FLOWSPEC) {
++	if (table->safi == SAFI_FLOWSPEC) {
+ 		peer = info->peer;
+-		bgp_pbr_update_entry(peer->bgp, p, info, afi, safi, false);
++		bgp_pbr_update_entry(peer->bgp, p, info, table->afi,
++				     table->safi, false);
+ 		return;
+ 	}
+ 
+ 	memset(&api, 0, sizeof(api));
+ 	api.vrf_id = bgp->vrf_id;
+ 	api.type = ZEBRA_ROUTE_BGP;
+-	api.safi = safi;
++	api.safi = table->safi;
+ 	api.prefix = *p;
+ 
+ 	if (info->attr->rmap_table_id) {
+@@ -1820,8 +1821,7 @@ void bgp_zebra_withdraw_table_all_subtypes(struct bgp *bgp, afi_t afi, safi_t sa
+ 		for (pi = bgp_dest_get_bgp_path_info(dest); pi; pi = pi->next) {
+ 			if (CHECK_FLAG(pi->flags, BGP_PATH_SELECTED)
+ 			    && (pi->type == ZEBRA_ROUTE_BGP))
+-				bgp_zebra_withdraw(bgp_dest_get_prefix(dest),
+-						   pi, bgp, afi, safi);
++				bgp_zebra_withdraw(dest, pi, bgp);
+ 		}
+ 	}
+ }
+diff --git a/bgpd/bgp_zebra.h b/bgpd/bgp_zebra.h
+index a5fe8d7ace..b77e423f8f 100644
+--- a/bgpd/bgp_zebra.h
++++ b/bgpd/bgp_zebra.h
+@@ -43,13 +43,11 @@ extern void bgp_zebra_destroy(void);
+ extern int bgp_zebra_get_table_range(uint32_t chunk_size,
+ 				     uint32_t *start, uint32_t *end);
+ extern int bgp_if_update_all(void);
+-extern void bgp_zebra_announce(struct bgp_dest *dest, const struct prefix *p,
+-			       struct bgp_path_info *path, struct bgp *bgp,
+-			       afi_t afi, safi_t safi);
++extern void bgp_zebra_announce(struct bgp_dest *dest,
++			       struct bgp_path_info *path, struct bgp *bgp);
+ extern void bgp_zebra_announce_table(struct bgp *bgp, afi_t afi, safi_t safi);
+-extern void bgp_zebra_withdraw(const struct prefix *p,
+-			       struct bgp_path_info *path, struct bgp *bgp,
+-			       afi_t afi, safi_t safi);
++extern void bgp_zebra_withdraw(struct bgp_dest *dest,
++			       struct bgp_path_info *path, struct bgp *bgp);
+ 
+ /* Announce routes of any bgp subtype of a table to zebra */
+ extern void bgp_zebra_announce_table_all_subtypes(struct bgp *bgp, afi_t afi,
+-- 
+2.17.1
+
diff --git a/src/sonic-frr/patch/0034-gpd-backpressure-Handle-BGP-Zebra-Install-evt-Creat.patch b/src/sonic-frr/patch/0034-gpd-backpressure-Handle-BGP-Zebra-Install-evt-Creat.patch
new file mode 100644
index 000000000..724cf1297
--- /dev/null
+++ b/src/sonic-frr/patch/0034-gpd-backpressure-Handle-BGP-Zebra-Install-evt-Creat.patch
@@ -0,0 +1,512 @@
+From 6d5604a9315801e9380c11357d663ad6537ed8ab Mon Sep 17 00:00:00 2001
+From: Donald Sharp <sharpd@nvidia.com>
+Date: Fri, 26 Jan 2024 14:48:53 -0500
+Subject: [PATCH 06/11] bgpd : backpressure - Handle BGP-Zebra Install evt
+ Creation
+
+BGP is now keeping a list of dests with the dest having a pointer
+to the bgp_path_info that it will be working on.
+
+1) When bgp receives a prefix, process it, add the bgp_dest of the
+prefix into the new Fifo list if not present, update the flags (Ex:
+earlier if the prefix was advertised and now it is a withdrawn),
+increment the ref_count and DO NOT advertise the install/withdraw
+to zebra yet.
+
+2) Schedule an event to wake up to invoke the new function which will
+walk the list one by one and installs/withdraws the routes into zebra.
+  a) if BUFFER_EMPTY, process the next item on the list
+  b) if BUFFER_PENDING, bail out and the callback in
+  zclient_flush_data() will invoke the same function when BUFFER_EMPTY
+
+Changes
+ - rename old bgp_zebra_announce to bgp_zebra_announce_actual
+ - rename old bgp_zebra_withdrw to bgp_zebra_withdraw_actual
+ - Handle new fifo list cleanup in bgp_exit()
+ - New funcs: bgp_handle_route_announcements_to_zebra() and
+   bgp_zebra_route_install()
+ - Define a callback function to invoke
+   bgp_handle_route_announcements_to_zebra() when BUFFER_EMPTY in
+   zclient_flush_data()
+
+The current change deals with bgp installing routes via
+bgp_process_main_one()
+
+Ticket: #3390099
+
+Signed-off-by: Donald Sharp <sharpd@nvidia.com>
+Signed-off-by: Rajasekar Raja <rajasekarr@nvidia.com>
+
+diff --git a/bgpd/bgp_route.c b/bgpd/bgp_route.c
+index d19f27110e..c29442d96c 100644
+--- a/bgpd/bgp_route.c
++++ b/bgpd/bgp_route.c
+@@ -3214,8 +3214,8 @@ static void bgp_process_main_one(struct bgp *bgp, struct bgp_dest *dest,
+ 					|| new_select->sub_type
+ 						   == BGP_ROUTE_IMPORTED))
+ 
+-					bgp_zebra_announce(dest, old_select,
+-							   bgp);
++					bgp_zebra_route_install(
++						dest, old_select, bgp, true);
+ 			}
+ 		}
+ 
+@@ -3312,9 +3312,10 @@ static void bgp_process_main_one(struct bgp *bgp, struct bgp_dest *dest,
+ 			 */
+ 			if (old_select &&
+ 			    is_route_parent_evpn(old_select))
+-				bgp_zebra_withdraw(dest, old_select, bgp);
++				bgp_zebra_route_install(dest, old_select, bgp,
++							false);
+ 
+-			bgp_zebra_announce(dest, new_select, bgp);
++			bgp_zebra_route_install(dest, new_select, bgp, true);
+ 		} else {
+ 			/* Withdraw the route from the kernel. */
+ 			if (old_select && old_select->type == ZEBRA_ROUTE_BGP
+@@ -3322,7 +3323,8 @@ static void bgp_process_main_one(struct bgp *bgp, struct bgp_dest *dest,
+ 				|| old_select->sub_type == BGP_ROUTE_AGGREGATE
+ 				|| old_select->sub_type == BGP_ROUTE_IMPORTED))
+ 
+-				bgp_zebra_withdraw(dest, old_select, bgp);
++				bgp_zebra_route_install(dest, old_select, bgp,
++							false);
+ 		}
+ 	}
+ 
+@@ -4201,7 +4203,7 @@ void bgp_update(struct peer *peer, const struct prefix *p, uint32_t addpath_id,
+ 	if (pi && pi->attr->rmap_table_id != new_attr.rmap_table_id) {
+ 		if (CHECK_FLAG(pi->flags, BGP_PATH_SELECTED))
+ 			/* remove from RIB previous entry */
+-			bgp_zebra_withdraw(dest, pi, bgp);
++			bgp_zebra_route_install(dest, pi, bgp, false);
+ 	}
+ 
+ 	if (peer->sort == BGP_PEER_EBGP) {
+@@ -5865,7 +5867,8 @@ static void bgp_cleanup_table(struct bgp *bgp, struct bgp_table *table,
+ 				|| pi->sub_type == BGP_ROUTE_IMPORTED)) {
+ 
+ 				if (bgp_fibupd_safi(safi))
+-					bgp_zebra_withdraw(dest, pi, bgp);
++					bgp_zebra_withdraw_actual(dest, pi,
++								  bgp);
+ 			}
+ 
+ 			bgp_path_info_reap(dest, pi);
+diff --git a/bgpd/bgp_table.h b/bgpd/bgp_table.h
+index d43bf86eb9..45d61f8dfd 100644
+--- a/bgpd/bgp_table.h
++++ b/bgpd/bgp_table.h
+@@ -102,6 +102,7 @@ struct bgp_node {
+ 	STAILQ_ENTRY(bgp_dest) pq;
+ 
+ 	struct zebra_announce_item zai;
++	struct bgp_path_info *za_bgp_pi;
+ 
+ 	uint64_t version;
+ 
+@@ -117,6 +118,8 @@ struct bgp_node {
+ #define BGP_NODE_FIB_INSTALLED          (1 << 6)
+ #define BGP_NODE_LABEL_REQUESTED        (1 << 7)
+ #define BGP_NODE_SOFT_RECONFIG (1 << 8)
++#define BGP_NODE_SCHEDULE_FOR_INSTALL (1 << 10)
++#define BGP_NODE_SCHEDULE_FOR_DELETE (1 << 11)
+ 
+ 	struct bgp_addpath_node_data tx_addpath;
+ 
+diff --git a/bgpd/bgp_zebra.c b/bgpd/bgp_zebra.c
+index 920df835a4..1162941ef1 100644
+--- a/bgpd/bgp_zebra.c
++++ b/bgpd/bgp_zebra.c
+@@ -1292,8 +1292,9 @@ static bool bgp_zebra_use_nhop_weighted(struct bgp *bgp, struct attr *attr,
+ 	return true;
+ }
+ 
+-void bgp_zebra_announce(struct bgp_dest *dest, struct bgp_path_info *info,
+-			struct bgp *bgp)
++static enum zclient_send_status
++bgp_zebra_announce_actual(struct bgp_dest *dest, struct bgp_path_info *info,
++			  struct bgp *bgp)
+ {
+ 	struct zapi_route api = { 0 };
+ 	struct zapi_nexthop *api_nh;
+@@ -1323,27 +1324,10 @@ void bgp_zebra_announce(struct bgp_dest *dest, struct bgp_path_info *info,
+ 	struct bgp_table *table = bgp_dest_table(dest);
+ 	const struct prefix *p = bgp_dest_get_prefix(dest);
+ 
+-	/*
+-	 * BGP is installing this route and bgp has been configured
+-	 * to suppress announcements until the route has been installed
+-	 * let's set the fact that we expect this route to be installed
+-	 */
+-	if (BGP_SUPPRESS_FIB_ENABLED(bgp))
+-		SET_FLAG(dest->flags, BGP_NODE_FIB_INSTALL_PENDING);
+-
+-	/* Don't try to install if we're not connected to Zebra or Zebra doesn't
+-	 * know of this instance.
+-	 */
+-	if (!bgp_install_info_to_zebra(bgp))
+-		return;
+-
+-	if (bgp->main_zebra_update_hold)
+-		return;
+-
+ 	if (table->safi == SAFI_FLOWSPEC) {
+ 		bgp_pbr_update_entry(bgp, p, info, table->afi, table->safi,
+ 				     true);
+-		return;
++		return ZCLIENT_SEND_SUCCESS;
+ 	}
+ 
+ 	/*
+@@ -1704,10 +1688,11 @@ void bgp_zebra_announce(struct bgp_dest *dest, struct bgp_path_info *info,
+ 		zlog_debug("%s: %pFX: announcing to zebra (recursion %sset)",
+ 			   __func__, p, (recursion_flag ? "" : "NOT "));
+ 	}
+-	zclient_route_send(is_add ? ZEBRA_ROUTE_ADD : ZEBRA_ROUTE_DELETE,
+-			   zclient, &api);
++	return zclient_route_send(is_add ? ZEBRA_ROUTE_ADD : ZEBRA_ROUTE_DELETE,
++				  zclient, &api);
+ }
+ 
++
+ /* Announce all routes of a table to zebra */
+ void bgp_zebra_announce_table(struct bgp *bgp, afi_t afi, safi_t safi)
+ {
+@@ -1733,7 +1718,7 @@ void bgp_zebra_announce_table(struct bgp *bgp, afi_t afi, safi_t safi)
+ 			     && (pi->sub_type == BGP_ROUTE_NORMAL
+ 				 || pi->sub_type == BGP_ROUTE_IMPORTED)))
+ 
+-				bgp_zebra_announce(dest, pi, bgp);
++				bgp_zebra_route_install(dest, pi, bgp, true);
+ }
+ 
+ /* Announce routes of any bgp subtype of a table to zebra */
+@@ -1755,34 +1740,23 @@ void bgp_zebra_announce_table_all_subtypes(struct bgp *bgp, afi_t afi,
+ 		for (pi = bgp_dest_get_bgp_path_info(dest); pi; pi = pi->next)
+ 			if (CHECK_FLAG(pi->flags, BGP_PATH_SELECTED) &&
+ 			    pi->type == ZEBRA_ROUTE_BGP)
+-				bgp_zebra_announce(dest, pi, bgp);
++				bgp_zebra_route_install(dest, pi, bgp, true);
+ }
+ 
+-void bgp_zebra_withdraw(struct bgp_dest *dest, struct bgp_path_info *info,
+-			struct bgp *bgp)
++enum zclient_send_status bgp_zebra_withdraw_actual(struct bgp_dest *dest,
++						   struct bgp_path_info *info,
++						   struct bgp *bgp)
+ {
+ 	struct zapi_route api;
+ 	struct peer *peer;
+ 	struct bgp_table *table = bgp_dest_table(dest);
+ 	const struct prefix *p = bgp_dest_get_prefix(dest);
+ 
+-	/*
+-	 * If we are withdrawing the route, we don't need to have this
+-	 * flag set.  So unset it.
+-	 */
+-	UNSET_FLAG(info->net->flags, BGP_NODE_FIB_INSTALL_PENDING);
+-
+-	/* Don't try to install if we're not connected to Zebra or Zebra doesn't
+-	 * know of this instance.
+-	 */
+-	if (!bgp_install_info_to_zebra(bgp))
+-		return;
+-
+ 	if (table->safi == SAFI_FLOWSPEC) {
+ 		peer = info->peer;
+ 		bgp_pbr_update_entry(peer->bgp, p, info, table->afi,
+ 				     table->safi, false);
+-		return;
++		return ZCLIENT_SEND_SUCCESS;
+ 	}
+ 
+ 	memset(&api, 0, sizeof(api));
+@@ -1800,7 +1774,172 @@ void bgp_zebra_withdraw(struct bgp_dest *dest, struct bgp_path_info *info,
+ 		zlog_debug("Tx route delete VRF %u %pFX", bgp->vrf_id,
+ 			   &api.prefix);
+ 
+-	zclient_route_send(ZEBRA_ROUTE_DELETE, zclient, &api);
++	return zclient_route_send(ZEBRA_ROUTE_DELETE, zclient, &api);
++}
++
++/*
++ * Walk the new Fifo list one by one and invoke bgp_zebra_announce/withdraw
++ * to install/withdraw the routes to zebra.
++ *
++ * If status = ZCLIENT_SEND_SUCCESS (Buffer empt)y i.e. Zebra is free to
++ * receive more incoming data, then pick the next item on the list and
++ * continue processing.
++ *
++ * If status = ZCLIENT_SEND_BUFFERED (Buffer pending) i.e. Zebra is busy,
++ * break and bail out of the function because once at some point when zebra
++ * is free, a callback is triggered which inturn call this same function and
++ * continue processing items on list.
++ */
++#define ZEBRA_ANNOUNCEMENTS_LIMIT 1000
++static void bgp_handle_route_announcements_to_zebra(struct thread *e)
++{
++	uint32_t count = 0;
++	struct bgp_dest *dest = NULL;
++	struct bgp_table *table = NULL;
++	enum zclient_send_status status = ZCLIENT_SEND_SUCCESS;
++	bool install;
++
++	while (count < ZEBRA_ANNOUNCEMENTS_LIMIT) {
++		dest = zebra_announce_pop(&bm->zebra_announce_head);
++
++		if (!dest)
++			break;
++
++		table = bgp_dest_table(dest);
++		install =
++			CHECK_FLAG(dest->flags, BGP_NODE_SCHEDULE_FOR_INSTALL);
++
++		if (BGP_DEBUG(zebra, ZEBRA))
++			zlog_debug(
++				"BGP %s route %pBD(%s) with dest %p and flags 0x%x to zebra",
++				install ? "announcing" : "withdrawing", dest,
++				table->bgp->name_pretty, dest, dest->flags);
++
++		if (install) {
++			status = bgp_zebra_announce_actual(
++				dest, dest->za_bgp_pi, table->bgp);
++			UNSET_FLAG(dest->flags, BGP_NODE_SCHEDULE_FOR_INSTALL);
++		} else {
++			status = bgp_zebra_withdraw_actual(
++				dest, dest->za_bgp_pi, table->bgp);
++			UNSET_FLAG(dest->flags, BGP_NODE_SCHEDULE_FOR_DELETE);
++		}
++
++		bgp_path_info_unlock(dest->za_bgp_pi);
++		dest->za_bgp_pi = NULL;
++		bgp_dest_unlock_node(dest);
++
++		if (status == ZCLIENT_SEND_BUFFERED)
++			break;
++
++		count++;
++	}
++
++	if (status != ZCLIENT_SEND_BUFFERED &&
++	    zebra_announce_count(&bm->zebra_announce_head))
++		thread_add_event(bm->master,
++				 bgp_handle_route_announcements_to_zebra, NULL,
++				 0, &bm->t_bgp_zebra_route);
++}
++
++/*
++ * Callback function invoked when zclient_flush_data() receives a BUFFER_EMPTY
++ * i.e. zebra is free to receive more incoming data.
++ */
++static void bgp_zebra_buffer_write_ready(void)
++{
++	bgp_handle_route_announcements_to_zebra(NULL);
++}
++
++/*
++ * BGP is now keeping a list of dests with the dest having a pointer
++ * to the bgp_path_info that it will be working on.
++ * Here is the sequence of events that should happen:
++ *
++ *  Current State      New State       Action
++ *  -------------      ---------       ------
++ *      ----           Install         Place dest on list, save pi, mark
++ *                                     as going to be installed
++ *      ----           Withdrawal      Place dest on list, save pi, mark
++ *                                     as going to be deleted
++ *
++ *    Install          Install         Leave dest on list, release old pi,
++ *                                     save new pi, mark as going to be
++ *                                     Installed
++ *    Install          Withdrawal      Leave dest on list, release old pi,
++ *                                     save new pi, mark as going to be
++ *                                     withdrawan, remove install flag
++ *
++ *    Withdrawal       Install         Special case, send withdrawal immediately
++ *                                     Leave dest on list, release old pi,
++ *                                     save new pi, mark as going to be
++ *                                     installed.  <see note about evpn
++ *                                     in bgp_route.c in bgp_process_main_one>
++ *    Withdrawal       Withdrawal      Leave dest on list, release old pi,
++ *                                     save new pi, mark as going to be
++ *                                     withdrawn.
++ */
++void bgp_zebra_route_install(struct bgp_dest *dest, struct bgp_path_info *info,
++			     struct bgp *bgp, bool install)
++{
++	/*
++	 * BGP is installing this route and bgp has been configured
++	 * to suppress announcements until the route has been installed
++	 * let's set the fact that we expect this route to be installed
++	 */
++	if (install) {
++		if (BGP_SUPPRESS_FIB_ENABLED(bgp))
++			SET_FLAG(dest->flags, BGP_NODE_FIB_INSTALL_PENDING);
++
++		if (bgp->main_zebra_update_hold)
++			return;
++	} else {
++		UNSET_FLAG(dest->flags, BGP_NODE_FIB_INSTALL_PENDING);
++	}
++
++	/*
++	 * Don't try to install if we're not connected to Zebra or Zebra doesn't
++	 * know of this instance.
++	 */
++	if (!bgp_install_info_to_zebra(bgp))
++		return;
++
++	if (!CHECK_FLAG(dest->flags, BGP_NODE_SCHEDULE_FOR_INSTALL) &&
++	    !CHECK_FLAG(dest->flags, BGP_NODE_SCHEDULE_FOR_DELETE)) {
++		zebra_announce_add_tail(&bm->zebra_announce_head, dest);
++		/*
++		 * If neither flag is set and za_bgp_pi is not set then it is a
++		 * bug
++		 */
++		assert(!dest->za_bgp_pi);
++		bgp_path_info_lock(info);
++		bgp_dest_lock_node(dest);
++		dest->za_bgp_pi = info;
++	} else if (CHECK_FLAG(dest->flags, BGP_NODE_SCHEDULE_FOR_INSTALL)) {
++		assert(dest->za_bgp_pi);
++		bgp_path_info_unlock(dest->za_bgp_pi);
++		bgp_path_info_lock(info);
++		dest->za_bgp_pi = info;
++	} else if (CHECK_FLAG(dest->flags, BGP_NODE_SCHEDULE_FOR_DELETE)) {
++		assert(dest->za_bgp_pi);
++		if (install)
++			bgp_zebra_withdraw_actual(dest, dest->za_bgp_pi, bgp);
++
++		bgp_path_info_unlock(dest->za_bgp_pi);
++		bgp_path_info_lock(info);
++		dest->za_bgp_pi = info;
++	}
++
++	if (install) {
++		UNSET_FLAG(dest->flags, BGP_NODE_SCHEDULE_FOR_DELETE);
++		SET_FLAG(dest->flags, BGP_NODE_SCHEDULE_FOR_INSTALL);
++	} else {
++		UNSET_FLAG(dest->flags, BGP_NODE_SCHEDULE_FOR_INSTALL);
++		SET_FLAG(dest->flags, BGP_NODE_SCHEDULE_FOR_DELETE);
++	}
++
++	thread_add_event(bm->master, bgp_handle_route_announcements_to_zebra,
++			 NULL, 0, &bm->t_bgp_zebra_route);
+ }
+ 
+ /* Withdraw all entries in a BGP instances RIB table from Zebra */
+@@ -1821,7 +1960,7 @@ void bgp_zebra_withdraw_table_all_subtypes(struct bgp *bgp, afi_t afi, safi_t sa
+ 		for (pi = bgp_dest_get_bgp_path_info(dest); pi; pi = pi->next) {
+ 			if (CHECK_FLAG(pi->flags, BGP_PATH_SELECTED)
+ 			    && (pi->type == ZEBRA_ROUTE_BGP))
+-				bgp_zebra_withdraw(dest, pi, bgp);
++				bgp_zebra_route_install(dest, pi, bgp, false);
+ 		}
+ 	}
+ }
+@@ -3470,6 +3609,7 @@ void bgp_zebra_init(struct thread_master *master, unsigned short instance)
+ 	zclient = zclient_new(master, &zclient_options_default, bgp_handlers,
+ 			      array_size(bgp_handlers));
+ 	zclient_init(zclient, ZEBRA_ROUTE_BGP, 0, &bgpd_privs);
++	zclient->zebra_buffer_write_ready = bgp_zebra_buffer_write_ready;
+ 	zclient->zebra_connected = bgp_zebra_connected;
+ 	zclient->instance = instance;
+ }
+diff --git a/bgpd/bgp_zebra.h b/bgpd/bgp_zebra.h
+index b77e423f8f..45fcf7f514 100644
+--- a/bgpd/bgp_zebra.h
++++ b/bgpd/bgp_zebra.h
+@@ -43,11 +43,10 @@ extern void bgp_zebra_destroy(void);
+ extern int bgp_zebra_get_table_range(uint32_t chunk_size,
+ 				     uint32_t *start, uint32_t *end);
+ extern int bgp_if_update_all(void);
+-extern void bgp_zebra_announce(struct bgp_dest *dest,
+-			       struct bgp_path_info *path, struct bgp *bgp);
++extern void bgp_zebra_route_install(struct bgp_dest *dest,
++				    struct bgp_path_info *path, struct bgp *bgp,
++				    bool install);
+ extern void bgp_zebra_announce_table(struct bgp *bgp, afi_t afi, safi_t safi);
+-extern void bgp_zebra_withdraw(struct bgp_dest *dest,
+-			       struct bgp_path_info *path, struct bgp *bgp);
+ 
+ /* Announce routes of any bgp subtype of a table to zebra */
+ extern void bgp_zebra_announce_table_all_subtypes(struct bgp *bgp, afi_t afi,
+@@ -131,4 +130,7 @@ extern int bgp_zebra_update(afi_t afi, safi_t safi, vrf_id_t vrf_id, int type);
+ extern int bgp_zebra_stale_timer_update(struct bgp *bgp);
+ extern int bgp_zebra_srv6_manager_get_locator_chunk(const char *name);
+ extern int bgp_zebra_srv6_manager_release_locator_chunk(const char *name);
++extern enum zclient_send_status
++bgp_zebra_withdraw_actual(struct bgp_dest *dest, struct bgp_path_info *info,
++			  struct bgp *bgp);
+ #endif /* _QUAGGA_BGP_ZEBRA_H */
+diff --git a/bgpd/bgpd.c b/bgpd/bgpd.c
+index 392423e028..da133d71c1 100644
+--- a/bgpd/bgpd.c
++++ b/bgpd/bgpd.c
+@@ -3688,10 +3688,20 @@ int bgp_delete(struct bgp *bgp)
+ 	afi_t afi;
+ 	safi_t safi;
+ 	int i;
++	struct bgp_dest *dest = NULL;
+ 	struct graceful_restart_info *gr_info;
+ 
+ 	assert(bgp);
+ 
++	while (zebra_announce_count(&bm->zebra_announce_head)) {
++		dest = zebra_announce_pop(&bm->zebra_announce_head);
++		if (dest->za_bgp_pi->peer->bgp == bgp) {
++			bgp_path_info_unlock(dest->za_bgp_pi);
++			bgp_dest_unlock_node(dest);
++		} else
++			zebra_announce_add_tail(&bm->zebra_announce_head, dest);
++	}
++
+ 	bgp_soft_reconfig_table_task_cancel(bgp, NULL, NULL);
+ 
+ 	/* make sure we withdraw any exported routes */
+@@ -8035,6 +8045,7 @@ void bgp_master_init(struct thread_master *master, const int buffer_size,
+ 	bm->tcp_dscp = IPTOS_PREC_INTERNETCONTROL;
+ 	bm->inq_limit = BM_DEFAULT_Q_LIMIT;
+ 	bm->outq_limit = BM_DEFAULT_Q_LIMIT;
++	bm->t_bgp_zebra_route = NULL;
+ 
+ 	bgp_mac_init();
+ 	/* init the rd id space.
+@@ -8278,6 +8289,7 @@ void bgp_terminate(void)
+ 		list_delete(&bm->listen_sockets);
+ 
+ 	THREAD_OFF(bm->t_rmap_update);
++	THREAD_OFF(bm->t_bgp_zebra_route);
+ 
+ 	bgp_mac_finish();
+ }
+diff --git a/bgpd/bgpd.h b/bgpd/bgpd.h
+index 55f53bf9d3..bdf31f5161 100644
+--- a/bgpd/bgpd.h
++++ b/bgpd/bgpd.h
+@@ -182,6 +182,8 @@ struct bgp_master {
+ 	uint32_t inq_limit;
+ 	uint32_t outq_limit;
+ 
++	struct thread *t_bgp_zebra_route;
++
+ 	/* To preserve ordering of installations into zebra across all Vrfs */
+ 	struct zebra_announce_head zebra_announce_head;
+ 
+diff --git a/lib/zclient.c b/lib/zclient.c
+index 0082b21485..c48c1c6ee4 100644
+--- a/lib/zclient.c
++++ b/lib/zclient.c
+@@ -285,6 +285,7 @@ static void zclient_flush_data(struct thread *thread)
+ 				 zclient->sock, &zclient->t_write);
+ 		break;
+ 	case BUFFER_EMPTY:
++		/* Currently only Sharpd and Bgpd has callbacks defined */
+ 		if (zclient->zebra_buffer_write_ready)
+ 			(*zclient->zebra_buffer_write_ready)();
+ 		break;
+-- 
+2.17.1
+
diff --git a/src/sonic-frr/patch/0035-bgpd-backpressure-Handle-BGP-Zebra-EPVN-Install-evt-.patch b/src/sonic-frr/patch/0035-bgpd-backpressure-Handle-BGP-Zebra-EPVN-Install-evt-.patch
new file mode 100644
index 000000000..e83526b6e
--- /dev/null
+++ b/src/sonic-frr/patch/0035-bgpd-backpressure-Handle-BGP-Zebra-EPVN-Install-evt-.patch
@@ -0,0 +1,995 @@
+From 84f7778808b7fee771f26c3cae46292ef85f06c0 Mon Sep 17 00:00:00 2001
+From: Rajasekar Raja <rajasekarr@nvidia.com>
+Date: Thu, 15 Feb 2024 11:23:51 -0800
+Subject: [PATCH 07/11] bgpd : backpressure - Handle BGP-Zebra(EPVN) Install
+ evt Creation
+
+Current changes deals with EVPN routes installation to zebra.
+
+In evpn_route_select_install() we invoke evpn_zebra_install/uninstall
+which sends zclient_send_message().
+
+This is a continuation of code changes (similar to
+ccfe452763d16c432fa81fd20e805bec819b345e) but to handle evpn part
+of the code.
+
+Ticket: #3390099
+
+Signed-off-by: Rajasekar Raja <rajasekarr@nvidia.com>
+
+diff --git a/bgpd/bgp_evpn.c b/bgpd/bgp_evpn.c
+index 2b2cfa0f4c..622fd6afd2 100644
+--- a/bgpd/bgp_evpn.c
++++ b/bgpd/bgp_evpn.c
+@@ -863,11 +863,10 @@ struct bgp_dest *bgp_evpn_vni_node_lookup(const struct bgpevpn *vpn,
+ /*
+  * Add (update) or delete MACIP from zebra.
+  */
+-static int bgp_zebra_send_remote_macip(struct bgp *bgp, struct bgpevpn *vpn,
+-				       const struct prefix_evpn *p,
+-				       const struct ethaddr *mac,
+-				       struct in_addr remote_vtep_ip, int add,
+-				       uint8_t flags, uint32_t seq, esi_t *esi)
++static enum zclient_send_status bgp_zebra_send_remote_macip(
++	struct bgp *bgp, struct bgpevpn *vpn, const struct prefix_evpn *p,
++	const struct ethaddr *mac, struct in_addr remote_vtep_ip, int add,
++	uint8_t flags, uint32_t seq, esi_t *esi)
+ {
+ 	struct stream *s;
+ 	uint16_t ipa_len;
+@@ -875,8 +874,12 @@ static int bgp_zebra_send_remote_macip(struct bgp *bgp, struct bgpevpn *vpn,
+ 	bool esi_valid;
+ 
+ 	/* Check socket. */
+-	if (!zclient || zclient->sock < 0)
+-		return 0;
++	if (!zclient || zclient->sock < 0) {
++		if (BGP_DEBUG(zebra, ZEBRA))
++			zlog_debug("%s: No zclient or zclient->sock exists",
++				   __func__);
++		return ZCLIENT_SEND_SUCCESS;
++	}
+ 
+ 	/* Don't try to register if Zebra doesn't know of this instance. */
+ 	if (!IS_BGP_INST_KNOWN_TO_ZEBRA(bgp)) {
+@@ -884,7 +887,7 @@ static int bgp_zebra_send_remote_macip(struct bgp *bgp, struct bgpevpn *vpn,
+ 			zlog_debug(
+ 				"%s: No zebra instance to talk to, not installing remote macip",
+ 				__func__);
+-		return 0;
++		return ZCLIENT_SEND_SUCCESS;
+ 	}
+ 
+ 	if (!esi)
+@@ -956,15 +959,20 @@ static int bgp_zebra_send_remote_macip(struct bgp *bgp, struct bgpevpn *vpn,
+ /*
+  * Add (update) or delete remote VTEP from zebra.
+  */
+-static int bgp_zebra_send_remote_vtep(struct bgp *bgp, struct bgpevpn *vpn,
+-				      const struct prefix_evpn *p,
+-				      int flood_control, int add)
++static enum zclient_send_status
++bgp_zebra_send_remote_vtep(struct bgp *bgp, struct bgpevpn *vpn,
++			   const struct prefix_evpn *p, int flood_control,
++			   int add)
+ {
+ 	struct stream *s;
+ 
+ 	/* Check socket. */
+-	if (!zclient || zclient->sock < 0)
+-		return 0;
++	if (!zclient || zclient->sock < 0) {
++		if (BGP_DEBUG(zebra, ZEBRA))
++			zlog_debug("%s: No zclient or zclient->sock exists",
++				   __func__);
++		return ZCLIENT_SEND_SUCCESS;
++	}
+ 
+ 	/* Don't try to register if Zebra doesn't know of this instance. */
+ 	if (!IS_BGP_INST_KNOWN_TO_ZEBRA(bgp)) {
+@@ -972,7 +980,7 @@ static int bgp_zebra_send_remote_vtep(struct bgp *bgp, struct bgpevpn *vpn,
+ 			zlog_debug(
+ 				"%s: No zebra instance to talk to, not installing remote vtep",
+ 				__func__);
+-		return 0;
++		return ZCLIENT_SEND_SUCCESS;
+ 	}
+ 
+ 	s = zclient->obuf;
+@@ -989,7 +997,7 @@ static int bgp_zebra_send_remote_vtep(struct bgp *bgp, struct bgpevpn *vpn,
+ 			EC_BGP_VTEP_INVALID,
+ 			"Bad remote IP when trying to %s remote VTEP for VNI %u",
+ 			add ? "ADD" : "DEL", vpn->vni);
+-		return -1;
++		return ZCLIENT_SEND_FAILURE;
+ 	}
+ 	stream_putl(s, flood_control);
+ 
+@@ -1222,14 +1230,15 @@ static void add_mac_mobility_to_attr(uint32_t seq_num, struct attr *attr)
+ }
+ 
+ /* Install EVPN route into zebra. */
+-static int evpn_zebra_install(struct bgp *bgp, struct bgpevpn *vpn,
+-			      const struct prefix_evpn *p,
+-			      struct bgp_path_info *pi)
++enum zclient_send_status evpn_zebra_install(struct bgp *bgp,
++					    struct bgpevpn *vpn,
++					    const struct prefix_evpn *p,
++					    struct bgp_path_info *pi)
+ {
+-	int ret;
+ 	uint8_t flags;
+ 	int flood_control;
+ 	uint32_t seq;
++	enum zclient_send_status ret = ZCLIENT_SEND_SUCCESS;
+ 
+ 	if (p->prefix.route_type == BGP_EVPN_MAC_IP_ROUTE) {
+ 		flags = 0;
+@@ -1302,6 +1311,7 @@ static int evpn_zebra_install(struct bgp *bgp, struct bgpevpn *vpn,
+ 			flood_control = VXLAN_FLOOD_DISABLED;
+ 			break;
+ 		}
++
+ 		ret = bgp_zebra_send_remote_vtep(bgp, vpn, p, flood_control, 1);
+ 	}
+ 
+@@ -1309,11 +1319,13 @@ static int evpn_zebra_install(struct bgp *bgp, struct bgpevpn *vpn,
+ }
+ 
+ /* Uninstall EVPN route from zebra. */
+-static int evpn_zebra_uninstall(struct bgp *bgp, struct bgpevpn *vpn,
+-				const struct prefix_evpn *p,
+-				struct bgp_path_info *pi, bool is_sync)
++enum zclient_send_status evpn_zebra_uninstall(struct bgp *bgp,
++					      struct bgpevpn *vpn,
++					      const struct prefix_evpn *p,
++					      struct bgp_path_info *pi,
++					      bool is_sync)
+ {
+-	int ret;
++	enum zclient_send_status ret = ZCLIENT_SEND_SUCCESS;
+ 
+ 	if (p->prefix.route_type == BGP_EVPN_MAC_IP_ROUTE)
+ 		ret = bgp_zebra_send_remote_macip(
+@@ -1328,7 +1340,7 @@ static int evpn_zebra_uninstall(struct bgp *bgp, struct bgpevpn *vpn,
+ 		ret = bgp_evpn_remote_es_evi_del(bgp, vpn, p);
+ 	else
+ 		ret = bgp_zebra_send_remote_vtep(bgp, vpn, p,
+-					VXLAN_FLOOD_DISABLED, 0);
++						 VXLAN_FLOOD_DISABLED, 0);
+ 
+ 	return ret;
+ }
+@@ -1419,12 +1431,18 @@ int evpn_route_select_install(struct bgp *bgp, struct bgpevpn *vpn,
+ 	    && !CHECK_FLAG(dest->flags, BGP_NODE_USER_CLEAR)
+ 	    && !CHECK_FLAG(old_select->flags, BGP_PATH_ATTR_CHANGED)
+ 	    && !bgp_addpath_is_addpath_used(&bgp->tx_addpath, afi, safi)) {
+-		if (bgp_zebra_has_route_changed(old_select))
+-			ret = evpn_zebra_install(
+-				bgp, vpn,
+-				(const struct prefix_evpn *)bgp_dest_get_prefix(
+-					dest),
+-				old_select);
++		if (bgp_zebra_has_route_changed(old_select)) {
++			if (CHECK_FLAG(bgp->flags, BGP_FLAG_DELETE_IN_PROGRESS))
++				evpn_zebra_install(
++					bgp, vpn,
++					(const struct prefix_evpn *)
++						bgp_dest_get_prefix(dest),
++					old_select);
++			else
++				bgp_zebra_route_install(dest, old_select, bgp,
++							true, vpn, false);
++		}
++
+ 		UNSET_FLAG(old_select->flags, BGP_PATH_MULTIPATH_CHG);
+ 		UNSET_FLAG(old_select->flags, BGP_PATH_LINK_BW_CHG);
+ 		bgp_zebra_clear_route_change_flags(dest);
+@@ -1456,10 +1474,14 @@ int evpn_route_select_install(struct bgp *bgp, struct bgpevpn *vpn,
+ 	if (new_select && new_select->type == ZEBRA_ROUTE_BGP
+ 	    && (new_select->sub_type == BGP_ROUTE_IMPORTED ||
+ 			bgp_evpn_attr_is_sync(new_select->attr))) {
+-		ret = evpn_zebra_install(
+-			bgp, vpn,
+-			(struct prefix_evpn *)bgp_dest_get_prefix(dest),
+-			new_select);
++		if (CHECK_FLAG(bgp->flags, BGP_FLAG_DELETE_IN_PROGRESS))
++			evpn_zebra_install(bgp, vpn,
++					   (const struct prefix_evpn *)
++						   bgp_dest_get_prefix(dest),
++					   new_select);
++		else
++			bgp_zebra_route_install(dest, new_select, bgp, true,
++						vpn, false);
+ 
+ 		/* If an old best existed and it was a "local" route, the only
+ 		 * reason
+@@ -1476,13 +1498,20 @@ int evpn_route_select_install(struct bgp *bgp, struct bgpevpn *vpn,
+ 			evpn_delete_old_local_route(bgp, vpn, dest,
+ 					old_select, new_select);
+ 	} else {
+-		if (old_select && old_select->type == ZEBRA_ROUTE_BGP
+-		    && old_select->sub_type == BGP_ROUTE_IMPORTED)
+-			ret = evpn_zebra_uninstall(
+-				bgp, vpn,
+-				(const struct prefix_evpn *)bgp_dest_get_prefix(
+-					dest),
+-				old_select, false);
++		if (old_select && old_select->type == ZEBRA_ROUTE_BGP &&
++		    old_select->sub_type == BGP_ROUTE_IMPORTED) {
++			if (CHECK_FLAG(bgp->flags,
++				       BGP_FLAG_DELETE_IN_PROGRESS) ||
++			    CHECK_FLAG(bgp->flags, BGP_FLAG_VNI_DOWN))
++				evpn_zebra_uninstall(
++					bgp, vpn,
++					(const struct prefix_evpn *)
++						bgp_dest_get_prefix(dest),
++					old_select, false);
++			else
++				bgp_zebra_route_install(dest, old_select, bgp,
++							false, vpn, false);
++		}
+ 	}
+ 
+ 	/* Clear any route change flags. */
+@@ -2012,9 +2041,19 @@ static void evpn_zebra_reinstall_best_route(struct bgp *bgp,
+ 	if (curr_select && curr_select->type == ZEBRA_ROUTE_BGP
+ 			&& (curr_select->sub_type == BGP_ROUTE_IMPORTED ||
+ 				bgp_evpn_attr_is_sync(curr_select->attr)))
+-		evpn_zebra_install(bgp, vpn,
+-		   (const struct prefix_evpn *)bgp_dest_get_prefix(dest),
+-		   curr_select);
++		if (curr_select && curr_select->type == ZEBRA_ROUTE_BGP &&
++		    (curr_select->sub_type == BGP_ROUTE_IMPORTED ||
++		     bgp_evpn_attr_is_sync(curr_select->attr))) {
++			if (CHECK_FLAG(bgp->flags, BGP_FLAG_DELETE_IN_PROGRESS))
++				evpn_zebra_install(
++					bgp, vpn,
++					(const struct prefix_evpn *)
++						bgp_dest_get_prefix(dest),
++					curr_select);
++			else
++				bgp_zebra_route_install(dest, curr_select, bgp,
++							true, vpn, false);
++		}
+ }
+ 
+ /*
+@@ -2189,8 +2228,16 @@ static int update_evpn_route(struct bgp *bgp, struct bgpevpn *vpn,
+ 			 * has been removed.
+ 			 */
+ 			new_is_sync = bgp_evpn_attr_is_sync(pi->attr);
+-			if (!new_is_sync && old_is_sync)
+-				evpn_zebra_uninstall(bgp, vpn, p, pi, true);
++			if (!new_is_sync && old_is_sync) {
++				if (CHECK_FLAG(bgp->flags,
++					       BGP_FLAG_DELETE_IN_PROGRESS))
++					evpn_zebra_uninstall(bgp, vpn, p, pi,
++							     true);
++				else
++					bgp_zebra_route_install(dest, pi, bgp,
++								false, vpn,
++								true);
++			}
+ 		}
+ 	}
+ 	bgp_path_info_unlock(pi);
+@@ -2444,8 +2491,16 @@ void bgp_evpn_update_type2_route_entry(struct bgp *bgp, struct bgpevpn *vpn,
+ 			 * has been removed.
+ 			 */
+ 			new_is_sync = bgp_evpn_attr_is_sync(pi->attr);
+-			if (!new_is_sync && old_is_sync)
+-				evpn_zebra_uninstall(bgp, vpn, &evp, pi, true);
++			if (!new_is_sync && old_is_sync) {
++				if (CHECK_FLAG(bgp->flags,
++					       BGP_FLAG_DELETE_IN_PROGRESS))
++					(void)evpn_zebra_uninstall(
++						bgp, vpn, &evp, pi, true);
++				else
++					bgp_zebra_route_install(dest, pi, bgp,
++								false, vpn,
++								true);
++			}
+ 		}
+ 	}
+ 
+@@ -2701,7 +2756,22 @@ static int delete_routes_for_vni(struct bgp *bgp, struct bgpevpn *vpn)
+ 	delete_all_type2_routes(bgp, vpn);
+ 
+ 	build_evpn_type3_prefix(&p, vpn->originator_ip);
++
++	/*
++	 * To handle the following scenario:
++	 *  - Say, the new zebra announce fifo list has few vni Evpn prefixes
++	 * yet to be sent to zebra.
++	 *  - At this point if we have triggers like "no advertise-all-vni" or
++	 *    "networking restart", where a vni is going down.
++	 *
++	 * Perform the below
++	 *    1) send withdraw routes to zebra immediately in case it is
++	 * installed. 2) before we blow up the vni table, we need to walk the
++	 * list and pop all the dest whose za_vpn points to this vni.
++	 */
++	SET_FLAG(bgp->flags, BGP_FLAG_VNI_DOWN);
+ 	ret = delete_evpn_route(bgp, vpn, &p);
++	UNSET_FLAG(bgp->flags, BGP_FLAG_VNI_DOWN);
+ 	if (ret)
+ 		return ret;
+ 
+@@ -6028,6 +6098,17 @@ struct bgpevpn *bgp_evpn_new(struct bgp *bgp, vni_t vni,
+  */
+ void bgp_evpn_free(struct bgp *bgp, struct bgpevpn *vpn)
+ {
++	struct bgp_dest *dest = NULL;
++
++	while (zebra_announce_count(&bm->zebra_announce_head)) {
++		dest = zebra_announce_pop(&bm->zebra_announce_head);
++		if (dest->za_vpn == vpn) {
++			bgp_path_info_unlock(dest->za_bgp_pi);
++			bgp_dest_unlock_node(dest);
++		} else
++			zebra_announce_add_tail(&bm->zebra_announce_head, dest);
++	}
++
+ 	bgp_evpn_remote_ip_hash_destroy(vpn);
+ 	bgp_evpn_vni_es_cleanup(vpn);
+ 	bgpevpn_unlink_from_l3vni(vpn);
+diff --git a/bgpd/bgp_evpn.h b/bgpd/bgp_evpn.h
+index 3cbc5af5af..bf1943a2db 100644
+--- a/bgpd/bgp_evpn.h
++++ b/bgpd/bgp_evpn.h
+@@ -230,4 +230,12 @@ extern void
+ bgp_evpn_handle_resolve_overlay_index_unset(struct hash_bucket *bucket,
+ 					    void *arg);
+ 
++extern enum zclient_send_status evpn_zebra_install(struct bgp *bgp,
++						   struct bgpevpn *vpn,
++						   const struct prefix_evpn *p,
++						   struct bgp_path_info *pi);
++extern enum zclient_send_status
++evpn_zebra_uninstall(struct bgp *bgp, struct bgpevpn *vpn,
++		     const struct prefix_evpn *p, struct bgp_path_info *pi,
++		     bool is_sync);
+ #endif /* _QUAGGA_BGP_EVPN_H */
+diff --git a/bgpd/bgp_evpn_mh.c b/bgpd/bgp_evpn_mh.c
+index 552365959d..40687c558d 100644
+--- a/bgpd/bgp_evpn_mh.c
++++ b/bgpd/bgp_evpn_mh.c
+@@ -56,13 +56,14 @@ static void bgp_evpn_local_es_down(struct bgp *bgp,
+ 		struct bgp_evpn_es *es);
+ static void bgp_evpn_local_type1_evi_route_del(struct bgp *bgp,
+ 		struct bgp_evpn_es *es);
+-static struct bgp_evpn_es_vtep *bgp_evpn_es_vtep_add(struct bgp *bgp,
++static struct bgp_evpn_es_vtep *
++bgp_evpn_es_vtep_add(struct bgp *bgp, struct bgp_evpn_es *es,
++		     struct in_addr vtep_ip, bool esr, uint8_t df_alg,
++		     uint16_t df_pref, int *zret);
++static enum zclient_send_status bgp_evpn_es_vtep_del(struct bgp *bgp,
+ 						     struct bgp_evpn_es *es,
+ 						     struct in_addr vtep_ip,
+-						     bool esr, uint8_t df_alg,
+-						     uint16_t df_pref);
+-static void bgp_evpn_es_vtep_del(struct bgp *bgp,
+-		struct bgp_evpn_es *es, struct in_addr vtep_ip, bool esr);
++						     bool esr);
+ static void bgp_evpn_es_cons_checks_pend_add(struct bgp_evpn_es *es);
+ static void bgp_evpn_es_cons_checks_pend_del(struct bgp_evpn_es *es);
+ static struct bgp_evpn_es_evi *
+@@ -105,6 +106,7 @@ static int bgp_evpn_es_route_select_install(struct bgp *bgp,
+ 					    struct bgp_dest *dest)
+ {
+ 	int ret = 0;
++	int zret = 0;
+ 	afi_t afi = AFI_L2VPN;
+ 	safi_t safi = SAFI_EVPN;
+ 	struct bgp_path_info *old_select; /* old best */
+@@ -131,7 +133,7 @@ static int bgp_evpn_es_route_select_install(struct bgp *bgp,
+ 			bgp_evpn_es_vtep_add(bgp, es, old_select->attr->nexthop,
+ 					     true /*esr*/,
+ 					     old_select->attr->df_alg,
+-					     old_select->attr->df_pref);
++					     old_select->attr->df_pref, &zret);
+ 		}
+ 		UNSET_FLAG(old_select->flags, BGP_PATH_MULTIPATH_CHG);
+ 		bgp_zebra_clear_route_change_flags(dest);
+@@ -160,7 +162,7 @@ static int bgp_evpn_es_route_select_install(struct bgp *bgp,
+ 			&& new_select->sub_type == BGP_ROUTE_IMPORTED) {
+ 		bgp_evpn_es_vtep_add(bgp, es, new_select->attr->nexthop,
+ 				     true /*esr */, new_select->attr->df_alg,
+-				     new_select->attr->df_pref);
++				     new_select->attr->df_pref, &zret);
+ 	} else {
+ 		if (old_select && old_select->type == ZEBRA_ROUTE_BGP
+ 				&& old_select->sub_type == BGP_ROUTE_IMPORTED)
+@@ -447,7 +449,7 @@ int bgp_evpn_mh_route_update(struct bgp *bgp, struct bgp_evpn_es *es,
+ 				&attr->mp_nexthop_global_in);
+ 	}
+ 
+-	/* Return back the route entry. */
++	/* Return back th*e route entry. */
+ 	*ri = tmp_pi;
+ 	return 0;
+ }
+@@ -1366,23 +1368,28 @@ static struct bgp_evpn_es_vtep *bgp_evpn_es_vtep_find(struct bgp_evpn_es *es,
+ }
+ 
+ /* Send the remote ES to zebra for NHG programming */
+-static int bgp_zebra_send_remote_es_vtep(struct bgp *bgp,
+-		struct bgp_evpn_es_vtep *es_vtep, bool add)
++static enum zclient_send_status
++bgp_zebra_send_remote_es_vtep(struct bgp *bgp, struct bgp_evpn_es_vtep *es_vtep,
++			      bool add)
+ {
+ 	struct bgp_evpn_es *es = es_vtep->es;
+ 	struct stream *s;
+ 	uint32_t flags = 0;
+ 
+ 	/* Check socket. */
+-	if (!zclient || zclient->sock < 0)
+-		return 0;
++	if (!zclient || zclient->sock < 0) {
++		if (BGP_DEBUG(zebra, ZEBRA))
++			zlog_debug("%s: No zclient or zclient->sock exists",
++				   __func__);
++		return ZCLIENT_SEND_SUCCESS;
++	}
+ 
+ 	/* Don't try to register if Zebra doesn't know of this instance. */
+ 	if (!IS_BGP_INST_KNOWN_TO_ZEBRA(bgp)) {
+ 		if (BGP_DEBUG(zebra, ZEBRA))
+ 			zlog_debug("No zebra instance, not installing remote es %s",
+ 					es->esi_str);
+-		return 0;
++		return ZCLIENT_SEND_SUCCESS;
+ 	}
+ 
+ 	if (es_vtep->flags & BGP_EVPNES_VTEP_ESR)
+@@ -1413,12 +1420,12 @@ static int bgp_zebra_send_remote_es_vtep(struct bgp *bgp,
+ 	return zclient_send_message(zclient);
+ }
+ 
+-static void bgp_evpn_es_vtep_re_eval_active(struct bgp *bgp,
+-					    struct bgp_evpn_es_vtep *es_vtep,
+-					    bool param_change)
++static enum zclient_send_status bgp_evpn_es_vtep_re_eval_active(
++	struct bgp *bgp, struct bgp_evpn_es_vtep *es_vtep, bool param_change)
+ {
+ 	bool old_active;
+ 	bool new_active;
++	enum zclient_send_status ret = ZCLIENT_SEND_SUCCESS;
+ 
+ 	old_active = CHECK_FLAG(es_vtep->flags, BGP_EVPNES_VTEP_ACTIVE);
+ 	/* currently we need an active EVI reference to use the VTEP as
+@@ -1440,7 +1447,7 @@ static void bgp_evpn_es_vtep_re_eval_active(struct bgp *bgp,
+ 				   es_vtep->df_alg, es_vtep->df_pref);
+ 
+ 		/* send remote ES to zebra */
+-		bgp_zebra_send_remote_es_vtep(bgp, es_vtep, new_active);
++		ret = bgp_zebra_send_remote_es_vtep(bgp, es_vtep, new_active);
+ 
+ 		/* The NHG is updated first for efficient failover handling.
+ 		 * Note the NHG can be de-activated while there are bgp
+@@ -1452,13 +1459,14 @@ static void bgp_evpn_es_vtep_re_eval_active(struct bgp *bgp,
+ 		/* queue up the es for background consistency checks */
+ 		bgp_evpn_es_cons_checks_pend_add(es_vtep->es);
+ 	}
++
++	return ret;
+ }
+ 
+-static struct bgp_evpn_es_vtep *bgp_evpn_es_vtep_add(struct bgp *bgp,
+-						     struct bgp_evpn_es *es,
+-						     struct in_addr vtep_ip,
+-						     bool esr, uint8_t df_alg,
+-						     uint16_t df_pref)
++static struct bgp_evpn_es_vtep *
++bgp_evpn_es_vtep_add(struct bgp *bgp, struct bgp_evpn_es *es,
++		     struct in_addr vtep_ip, bool esr, uint8_t df_alg,
++		     uint16_t df_pref, int *zret)
+ {
+ 	struct bgp_evpn_es_vtep *es_vtep;
+ 	bool param_change = false;
+@@ -1485,15 +1493,17 @@ static struct bgp_evpn_es_vtep *bgp_evpn_es_vtep_add(struct bgp *bgp,
+ 		++es_vtep->evi_cnt;
+ 	}
+ 
+-	bgp_evpn_es_vtep_re_eval_active(bgp, es_vtep, param_change);
++	*zret = bgp_evpn_es_vtep_re_eval_active(bgp, es_vtep, param_change);
+ 
+ 	return es_vtep;
+ }
+ 
+-static void bgp_evpn_es_vtep_do_del(struct bgp *bgp,
+-		struct bgp_evpn_es_vtep *es_vtep, bool esr)
++static enum zclient_send_status
++bgp_evpn_es_vtep_do_del(struct bgp *bgp, struct bgp_evpn_es_vtep *es_vtep,
++			bool esr)
+ {
+ 	bool param_change = false;
++	enum zclient_send_status ret = ZCLIENT_SEND_SUCCESS;
+ 
+ 	if (BGP_DEBUG(evpn_mh, EVPN_MH_ES))
+ 		zlog_debug("es %s vtep %pI4 del %s", es_vtep->es->esi_str,
+@@ -1510,18 +1520,25 @@ static void bgp_evpn_es_vtep_do_del(struct bgp *bgp,
+ 			--es_vtep->evi_cnt;
+ 	}
+ 
+-	bgp_evpn_es_vtep_re_eval_active(bgp, es_vtep, param_change);
++	ret = bgp_evpn_es_vtep_re_eval_active(bgp, es_vtep, param_change);
+ 	bgp_evpn_es_vtep_free(es_vtep);
++
++	return ret;
+ }
+ 
+-static void bgp_evpn_es_vtep_del(struct bgp *bgp,
+-		struct bgp_evpn_es *es, struct in_addr vtep_ip, bool esr)
++static enum zclient_send_status bgp_evpn_es_vtep_del(struct bgp *bgp,
++						     struct bgp_evpn_es *es,
++						     struct in_addr vtep_ip,
++						     bool esr)
+ {
+ 	struct bgp_evpn_es_vtep *es_vtep;
++	enum zclient_send_status ret = ZCLIENT_SEND_SUCCESS;
+ 
+ 	es_vtep = bgp_evpn_es_vtep_find(es, vtep_ip);
+ 	if (es_vtep)
+-		bgp_evpn_es_vtep_do_del(bgp, es_vtep, esr);
++		ret = bgp_evpn_es_vtep_do_del(bgp, es_vtep, esr);
++
++	return ret;
+ }
+ 
+ /********************** ES MAC-IP paths *************************************
+@@ -3382,12 +3399,14 @@ static struct bgp_evpn_es_evi_vtep *bgp_evpn_es_evi_vtep_find(
+ /* A VTEP can be added as "active" attach to an ES if EAD-per-ES and
+  * EAD-per-EVI routes are rxed from it.
+  */
+-static void bgp_evpn_es_evi_vtep_re_eval_active(struct bgp *bgp,
+-		struct bgp_evpn_es_evi_vtep *evi_vtep)
++static enum zclient_send_status
++bgp_evpn_es_evi_vtep_re_eval_active(struct bgp *bgp,
++				    struct bgp_evpn_es_evi_vtep *evi_vtep)
+ {
+ 	bool old_active;
+ 	bool new_active;
+ 	uint32_t ead_activity_flags;
++	enum zclient_send_status ret = ZCLIENT_SEND_SUCCESS;
+ 
+ 	old_active = CHECK_FLAG(evi_vtep->flags, BGP_EVPN_EVI_VTEP_ACTIVE);
+ 
+@@ -3408,7 +3427,7 @@ static void bgp_evpn_es_evi_vtep_re_eval_active(struct bgp *bgp,
+ 	new_active = CHECK_FLAG(evi_vtep->flags, BGP_EVPN_EVI_VTEP_ACTIVE);
+ 
+ 	if (old_active == new_active)
+-		return;
++		return ret;
+ 
+ 	if (BGP_DEBUG(evpn_mh, EVPN_MH_ES))
+ 		zlog_debug("es %s evi %u vtep %pI4 %s",
+@@ -3417,24 +3436,26 @@ static void bgp_evpn_es_evi_vtep_re_eval_active(struct bgp *bgp,
+ 			   new_active ? "active" : "inactive");
+ 
+ 	/* add VTEP to parent es */
+-	if (new_active)
++	if (new_active) {
+ 		evi_vtep->es_vtep = bgp_evpn_es_vtep_add(
+ 			bgp, evi_vtep->es_evi->es, evi_vtep->vtep_ip,
+-			false /*esr*/, 0, 0);
+-	else {
++			false /*esr*/, 0, 0, &ret);
++	} else {
+ 		if (evi_vtep->es_vtep) {
+-			bgp_evpn_es_vtep_do_del(bgp, evi_vtep->es_vtep,
+-					false /*esr*/);
++			ret = bgp_evpn_es_vtep_do_del(bgp, evi_vtep->es_vtep,
++						      false /*esr*/);
+ 			evi_vtep->es_vtep = NULL;
+ 		}
+ 	}
+ 	/* queue up the parent es for background consistency checks */
+ 	bgp_evpn_es_cons_checks_pend_add(evi_vtep->es_evi->es);
++
++	return ret;
+ }
+ 
+-static void bgp_evpn_es_evi_vtep_add(struct bgp *bgp,
+-		struct bgp_evpn_es_evi *es_evi, struct in_addr vtep_ip,
+-		bool ead_es)
++static enum zclient_send_status
++bgp_evpn_es_evi_vtep_add(struct bgp *bgp, struct bgp_evpn_es_evi *es_evi,
++			 struct in_addr vtep_ip, bool ead_es)
+ {
+ 	struct bgp_evpn_es_evi_vtep *evi_vtep;
+ 
+@@ -3454,18 +3475,19 @@ static void bgp_evpn_es_evi_vtep_add(struct bgp *bgp,
+ 	else
+ 		SET_FLAG(evi_vtep->flags, BGP_EVPN_EVI_VTEP_EAD_PER_EVI);
+ 
+-	bgp_evpn_es_evi_vtep_re_eval_active(bgp, evi_vtep);
++	return bgp_evpn_es_evi_vtep_re_eval_active(bgp, evi_vtep);
+ }
+ 
+-static void bgp_evpn_es_evi_vtep_del(struct bgp *bgp,
+-		struct bgp_evpn_es_evi *es_evi, struct in_addr vtep_ip,
+-		bool ead_es)
++static enum zclient_send_status
++bgp_evpn_es_evi_vtep_del(struct bgp *bgp, struct bgp_evpn_es_evi *es_evi,
++			 struct in_addr vtep_ip, bool ead_es)
+ {
+ 	struct bgp_evpn_es_evi_vtep *evi_vtep;
++	enum zclient_send_status ret = ZCLIENT_SEND_SUCCESS;
+ 
+ 	evi_vtep = bgp_evpn_es_evi_vtep_find(es_evi, vtep_ip);
+ 	if (!evi_vtep)
+-		return;
++		return ret;
+ 
+ 	if (BGP_DEBUG(evpn_mh, EVPN_MH_ES))
+ 		zlog_debug("del es %s evi %u vtep %pI4 %s",
+@@ -3478,8 +3500,10 @@ static void bgp_evpn_es_evi_vtep_del(struct bgp *bgp,
+ 	else
+ 		UNSET_FLAG(evi_vtep->flags, BGP_EVPN_EVI_VTEP_EAD_PER_EVI);
+ 
+-	bgp_evpn_es_evi_vtep_re_eval_active(bgp, evi_vtep);
++	ret = bgp_evpn_es_evi_vtep_re_eval_active(bgp, evi_vtep);
+ 	bgp_evpn_es_evi_vtep_free(evi_vtep);
++
++	return ret;
+ }
+ 
+ /* compare ES-IDs for the ES-EVI RB tree maintained per-VNI */
+@@ -3755,18 +3779,20 @@ int bgp_evpn_local_es_evi_add(struct bgp *bgp, esi_t *esi, vni_t vni)
+ /* Add remote ES-EVI entry. This is actually the remote VTEP add and the
+  * ES-EVI is implicity created on first VTEP's reference.
+  */
+-int bgp_evpn_remote_es_evi_add(struct bgp *bgp, struct bgpevpn *vpn,
+-		const struct prefix_evpn *p)
++enum zclient_send_status bgp_evpn_remote_es_evi_add(struct bgp *bgp,
++						    struct bgpevpn *vpn,
++						    const struct prefix_evpn *p)
+ {
+ 	char buf[ESI_STR_LEN];
+ 	struct bgp_evpn_es *es;
+ 	struct bgp_evpn_es_evi *es_evi;
+ 	bool ead_es;
+ 	const esi_t *esi = &p->prefix.ead_addr.esi;
++	enum zclient_send_status ret = ZCLIENT_SEND_SUCCESS;
+ 
+ 	if (!vpn)
+ 		/* local EAD-ES need not be sent back to zebra */
+-		return 0;
++		return ret;
+ 
+ 	if (BGP_DEBUG(evpn_mh, EVPN_MH_ES))
+ 		zlog_debug("add remote %s es %s evi %u vtep %pI4",
+@@ -3783,27 +3809,29 @@ int bgp_evpn_remote_es_evi_add(struct bgp *bgp, struct bgpevpn *vpn,
+ 		es_evi = bgp_evpn_es_evi_new(es, vpn);
+ 
+ 	ead_es = !!p->prefix.ead_addr.eth_tag;
+-	bgp_evpn_es_evi_vtep_add(bgp, es_evi, p->prefix.ead_addr.ip.ipaddr_v4,
+-			ead_es);
++	ret = bgp_evpn_es_evi_vtep_add(bgp, es_evi,
++				       p->prefix.ead_addr.ip.ipaddr_v4, ead_es);
+ 
+ 	bgp_evpn_es_evi_remote_info_re_eval(es_evi);
+-	return 0;
++	return ret;
+ }
+ 
+ /* A remote VTEP has withdrawn. The es-evi-vtep will be deleted and the
+  * parent es-evi freed up implicitly in last VTEP's deref.
+  */
+-int bgp_evpn_remote_es_evi_del(struct bgp *bgp, struct bgpevpn *vpn,
+-		const struct prefix_evpn *p)
++enum zclient_send_status bgp_evpn_remote_es_evi_del(struct bgp *bgp,
++						    struct bgpevpn *vpn,
++						    const struct prefix_evpn *p)
+ {
+ 	char buf[ESI_STR_LEN];
+ 	struct bgp_evpn_es *es;
+ 	struct bgp_evpn_es_evi *es_evi;
+ 	bool ead_es;
++	enum zclient_send_status ret = ZCLIENT_SEND_SUCCESS;
+ 
+ 	if (!vpn)
+ 		/* local EAD-ES need not be sent back to zebra */
+-		return 0;
++		return ret;
+ 
+ 	if (BGP_DEBUG(evpn_mh, EVPN_MH_ES))
+ 		zlog_debug(
+@@ -3822,7 +3850,7 @@ int bgp_evpn_remote_es_evi_del(struct bgp *bgp, struct bgpevpn *vpn,
+ 				esi_to_str(&p->prefix.ead_addr.esi, buf,
+ 					   sizeof(buf)),
+ 				vpn->vni, &p->prefix.ead_addr.ip.ipaddr_v4);
+-		return 0;
++		return ret;
+ 	}
+ 	es_evi = bgp_evpn_es_evi_find(es, vpn);
+ 	if (!es_evi) {
+@@ -3835,14 +3863,15 @@ int bgp_evpn_remote_es_evi_del(struct bgp *bgp, struct bgpevpn *vpn,
+ 					   sizeof(buf)),
+ 				vpn->vni,
+ 				&p->prefix.ead_addr.ip.ipaddr_v4);
+-		return 0;
++		return ret;
+ 	}
+ 
+ 	ead_es = !!p->prefix.ead_addr.eth_tag;
+-	bgp_evpn_es_evi_vtep_del(bgp, es_evi, p->prefix.ead_addr.ip.ipaddr_v4,
+-			ead_es);
++	ret = bgp_evpn_es_evi_vtep_del(bgp, es_evi,
++				       p->prefix.ead_addr.ip.ipaddr_v4, ead_es);
+ 	bgp_evpn_es_evi_remote_info_re_eval(es_evi);
+-	return 0;
++
++	return ret;
+ }
+ 
+ /* If a VNI is being deleted we need to force del all remote VTEPs */
+diff --git a/bgpd/bgp_evpn_mh.h b/bgpd/bgp_evpn_mh.h
+index 11030e323f..d6e77e982f 100644
+--- a/bgpd/bgp_evpn_mh.h
++++ b/bgpd/bgp_evpn_mh.h
+@@ -434,10 +434,12 @@ extern int bgp_evpn_local_es_add(struct bgp *bgp, esi_t *esi,
+ extern int bgp_evpn_local_es_del(struct bgp *bgp, esi_t *esi);
+ extern int bgp_evpn_local_es_evi_add(struct bgp *bgp, esi_t *esi, vni_t vni);
+ extern int bgp_evpn_local_es_evi_del(struct bgp *bgp, esi_t *esi, vni_t vni);
+-extern int bgp_evpn_remote_es_evi_add(struct bgp *bgp, struct bgpevpn *vpn,
+-		const struct prefix_evpn *p);
+-extern int bgp_evpn_remote_es_evi_del(struct bgp *bgp, struct bgpevpn *vpn,
+-		const struct prefix_evpn *p);
++extern enum zclient_send_status
++bgp_evpn_remote_es_evi_add(struct bgp *bgp, struct bgpevpn *vpn,
++			   const struct prefix_evpn *p);
++extern enum zclient_send_status
++bgp_evpn_remote_es_evi_del(struct bgp *bgp, struct bgpevpn *vpn,
++			   const struct prefix_evpn *p);
+ extern void bgp_evpn_mh_init(void);
+ extern void bgp_evpn_mh_finish(void);
+ void bgp_evpn_vni_es_init(struct bgpevpn *vpn);
+diff --git a/bgpd/bgp_route.c b/bgpd/bgp_route.c
+index c29442d96c..679abba463 100644
+--- a/bgpd/bgp_route.c
++++ b/bgpd/bgp_route.c
+@@ -3213,9 +3213,9 @@ static void bgp_process_main_one(struct bgp *bgp, struct bgp_dest *dest,
+ 				    && (new_select->sub_type == BGP_ROUTE_NORMAL
+ 					|| new_select->sub_type
+ 						   == BGP_ROUTE_IMPORTED))
+-
+ 					bgp_zebra_route_install(
+-						dest, old_select, bgp, true);
++						dest, old_select, bgp, true,
++						NULL, false);
+ 			}
+ 		}
+ 
+@@ -3313,9 +3313,10 @@ static void bgp_process_main_one(struct bgp *bgp, struct bgp_dest *dest,
+ 			if (old_select &&
+ 			    is_route_parent_evpn(old_select))
+ 				bgp_zebra_route_install(dest, old_select, bgp,
+-							false);
++							false, NULL, false);
+ 
+-			bgp_zebra_route_install(dest, new_select, bgp, true);
++			bgp_zebra_route_install(dest, new_select, bgp, true,
++						NULL, false);
+ 		} else {
+ 			/* Withdraw the route from the kernel. */
+ 			if (old_select && old_select->type == ZEBRA_ROUTE_BGP
+@@ -3324,7 +3325,7 @@ static void bgp_process_main_one(struct bgp *bgp, struct bgp_dest *dest,
+ 				|| old_select->sub_type == BGP_ROUTE_IMPORTED))
+ 
+ 				bgp_zebra_route_install(dest, old_select, bgp,
+-							false);
++							false, NULL, false);
+ 		}
+ 	}
+ 
+@@ -4203,7 +4204,8 @@ void bgp_update(struct peer *peer, const struct prefix *p, uint32_t addpath_id,
+ 	if (pi && pi->attr->rmap_table_id != new_attr.rmap_table_id) {
+ 		if (CHECK_FLAG(pi->flags, BGP_PATH_SELECTED))
+ 			/* remove from RIB previous entry */
+-			bgp_zebra_route_install(dest, pi, bgp, false);
++			bgp_zebra_route_install(dest, pi, bgp, false, NULL,
++						false);
+ 	}
+ 
+ 	if (peer->sort == BGP_PEER_EBGP) {
+diff --git a/bgpd/bgp_table.h b/bgpd/bgp_table.h
+index 45d61f8dfd..9eb681ea3f 100644
+--- a/bgpd/bgp_table.h
++++ b/bgpd/bgp_table.h
+@@ -103,6 +103,8 @@ struct bgp_node {
+ 
+ 	struct zebra_announce_item zai;
+ 	struct bgp_path_info *za_bgp_pi;
++	struct bgpevpn *za_vpn;
++	bool za_is_sync;
+ 
+ 	uint64_t version;
+ 
+diff --git a/bgpd/bgp_zebra.c b/bgpd/bgp_zebra.c
+index 1162941ef1..b81acaf8ec 100644
+--- a/bgpd/bgp_zebra.c
++++ b/bgpd/bgp_zebra.c
+@@ -1713,12 +1713,11 @@ void bgp_zebra_announce_table(struct bgp *bgp, afi_t afi, safi_t safi)
+ 	for (dest = bgp_table_top(table); dest; dest = bgp_route_next(dest))
+ 		for (pi = bgp_dest_get_bgp_path_info(dest); pi; pi = pi->next)
+ 			if (CHECK_FLAG(pi->flags, BGP_PATH_SELECTED) &&
+-
+-			    (pi->type == ZEBRA_ROUTE_BGP
+-			     && (pi->sub_type == BGP_ROUTE_NORMAL
+-				 || pi->sub_type == BGP_ROUTE_IMPORTED)))
+-
+-				bgp_zebra_route_install(dest, pi, bgp, true);
++			    (pi->type == ZEBRA_ROUTE_BGP &&
++			     (pi->sub_type == BGP_ROUTE_NORMAL ||
++			      pi->sub_type == BGP_ROUTE_IMPORTED)))
++				bgp_zebra_route_install(dest, pi, bgp, true,
++							NULL, false);
+ }
+ 
+ /* Announce routes of any bgp subtype of a table to zebra */
+@@ -1740,7 +1739,8 @@ void bgp_zebra_announce_table_all_subtypes(struct bgp *bgp, afi_t afi,
+ 		for (pi = bgp_dest_get_bgp_path_info(dest); pi; pi = pi->next)
+ 			if (CHECK_FLAG(pi->flags, BGP_PATH_SELECTED) &&
+ 			    pi->type == ZEBRA_ROUTE_BGP)
+-				bgp_zebra_route_install(dest, pi, bgp, true);
++				bgp_zebra_route_install(dest, pi, bgp, true,
++							NULL, false);
+ }
+ 
+ enum zclient_send_status bgp_zebra_withdraw_actual(struct bgp_dest *dest,
+@@ -1793,6 +1793,7 @@ enum zclient_send_status bgp_zebra_withdraw_actual(struct bgp_dest *dest,
+ #define ZEBRA_ANNOUNCEMENTS_LIMIT 1000
+ static void bgp_handle_route_announcements_to_zebra(struct thread *e)
+ {
++	bool is_evpn = false;
+ 	uint32_t count = 0;
+ 	struct bgp_dest *dest = NULL;
+ 	struct bgp_table *table = NULL;
+@@ -1808,6 +1809,9 @@ static void bgp_handle_route_announcements_to_zebra(struct thread *e)
+ 		table = bgp_dest_table(dest);
+ 		install =
+ 			CHECK_FLAG(dest->flags, BGP_NODE_SCHEDULE_FOR_INSTALL);
++		if (table && table->afi == AFI_L2VPN &&
++		    table->safi == SAFI_EVPN)
++			is_evpn = true;
+ 
+ 		if (BGP_DEBUG(zebra, ZEBRA))
+ 			zlog_debug(
+@@ -1816,17 +1820,33 @@ static void bgp_handle_route_announcements_to_zebra(struct thread *e)
+ 				table->bgp->name_pretty, dest, dest->flags);
+ 
+ 		if (install) {
+-			status = bgp_zebra_announce_actual(
+-				dest, dest->za_bgp_pi, table->bgp);
++			if (is_evpn)
++				status = evpn_zebra_install(
++					table->bgp, dest->za_vpn,
++					(const struct prefix_evpn *)
++						bgp_dest_get_prefix(dest),
++					dest->za_bgp_pi);
++			else
++				status = bgp_zebra_announce_actual(
++					dest, dest->za_bgp_pi, table->bgp);
+ 			UNSET_FLAG(dest->flags, BGP_NODE_SCHEDULE_FOR_INSTALL);
+ 		} else {
+-			status = bgp_zebra_withdraw_actual(
+-				dest, dest->za_bgp_pi, table->bgp);
++			if (is_evpn)
++				status = evpn_zebra_uninstall(
++					table->bgp, dest->za_vpn,
++					(const struct prefix_evpn *)
++						bgp_dest_get_prefix(dest),
++					dest->za_bgp_pi, false);
++			else
++				status = bgp_zebra_withdraw_actual(
++					dest, dest->za_bgp_pi, table->bgp);
++
+ 			UNSET_FLAG(dest->flags, BGP_NODE_SCHEDULE_FOR_DELETE);
+ 		}
+ 
+ 		bgp_path_info_unlock(dest->za_bgp_pi);
+ 		dest->za_bgp_pi = NULL;
++		dest->za_vpn = NULL;
+ 		bgp_dest_unlock_node(dest);
+ 
+ 		if (status == ZCLIENT_SEND_BUFFERED)
+@@ -1880,8 +1900,16 @@ static void bgp_zebra_buffer_write_ready(void)
+  *                                     withdrawn.
+  */
+ void bgp_zebra_route_install(struct bgp_dest *dest, struct bgp_path_info *info,
+-			     struct bgp *bgp, bool install)
++			     struct bgp *bgp, bool install, struct bgpevpn *vpn,
++			     bool is_sync)
+ {
++	bool is_evpn = false;
++	struct bgp_table *table = NULL;
++
++	table = bgp_dest_table(dest);
++	if (table && table->afi == AFI_L2VPN && table->safi == SAFI_EVPN)
++		is_evpn = true;
++
+ 	/*
+ 	 * BGP is installing this route and bgp has been configured
+ 	 * to suppress announcements until the route has been installed
+@@ -1891,7 +1919,7 @@ void bgp_zebra_route_install(struct bgp_dest *dest, struct bgp_path_info *info,
+ 		if (BGP_SUPPRESS_FIB_ENABLED(bgp))
+ 			SET_FLAG(dest->flags, BGP_NODE_FIB_INSTALL_PENDING);
+ 
+-		if (bgp->main_zebra_update_hold)
++		if (bgp->main_zebra_update_hold && !is_evpn)
+ 			return;
+ 	} else {
+ 		UNSET_FLAG(dest->flags, BGP_NODE_FIB_INSTALL_PENDING);
+@@ -1901,7 +1929,7 @@ void bgp_zebra_route_install(struct bgp_dest *dest, struct bgp_path_info *info,
+ 	 * Don't try to install if we're not connected to Zebra or Zebra doesn't
+ 	 * know of this instance.
+ 	 */
+-	if (!bgp_install_info_to_zebra(bgp))
++	if (!bgp_install_info_to_zebra(bgp) && !is_evpn)
+ 		return;
+ 
+ 	if (!CHECK_FLAG(dest->flags, BGP_NODE_SCHEDULE_FOR_INSTALL) &&
+@@ -1922,7 +1950,7 @@ void bgp_zebra_route_install(struct bgp_dest *dest, struct bgp_path_info *info,
+ 		dest->za_bgp_pi = info;
+ 	} else if (CHECK_FLAG(dest->flags, BGP_NODE_SCHEDULE_FOR_DELETE)) {
+ 		assert(dest->za_bgp_pi);
+-		if (install)
++		if (install & !is_evpn)
+ 			bgp_zebra_withdraw_actual(dest, dest->za_bgp_pi, bgp);
+ 
+ 		bgp_path_info_unlock(dest->za_bgp_pi);
+@@ -1930,6 +1958,11 @@ void bgp_zebra_route_install(struct bgp_dest *dest, struct bgp_path_info *info,
+ 		dest->za_bgp_pi = info;
+ 	}
+ 
++	if (is_evpn) {
++		dest->za_vpn = vpn;
++		dest->za_is_sync = is_sync;
++	}
++
+ 	if (install) {
+ 		UNSET_FLAG(dest->flags, BGP_NODE_SCHEDULE_FOR_DELETE);
+ 		SET_FLAG(dest->flags, BGP_NODE_SCHEDULE_FOR_INSTALL);
+@@ -1960,7 +1993,8 @@ void bgp_zebra_withdraw_table_all_subtypes(struct bgp *bgp, afi_t afi, safi_t sa
+ 		for (pi = bgp_dest_get_bgp_path_info(dest); pi; pi = pi->next) {
+ 			if (CHECK_FLAG(pi->flags, BGP_PATH_SELECTED)
+ 			    && (pi->type == ZEBRA_ROUTE_BGP))
+-				bgp_zebra_route_install(dest, pi, bgp, false);
++				bgp_zebra_route_install(dest, pi, bgp, false,
++							NULL, false);
+ 		}
+ 	}
+ }
+diff --git a/bgpd/bgp_zebra.h b/bgpd/bgp_zebra.h
+index 45fcf7f514..5186b7454e 100644
+--- a/bgpd/bgp_zebra.h
++++ b/bgpd/bgp_zebra.h
+@@ -45,7 +45,8 @@ extern int bgp_zebra_get_table_range(uint32_t chunk_size,
+ extern int bgp_if_update_all(void);
+ extern void bgp_zebra_route_install(struct bgp_dest *dest,
+ 				    struct bgp_path_info *path, struct bgp *bgp,
+-				    bool install);
++				    bool install, struct bgpevpn *vpn,
++				    bool is_sync);
+ extern void bgp_zebra_announce_table(struct bgp *bgp, afi_t afi, safi_t safi);
+ 
+ /* Announce routes of any bgp subtype of a table to zebra */
+diff --git a/bgpd/bgpd.h b/bgpd/bgpd.h
+index bdf31f5161..dc660fb8f0 100644
+--- a/bgpd/bgpd.h
++++ b/bgpd/bgpd.h
+@@ -512,6 +512,7 @@ struct bgp {
+ #define BGP_FLAG_HARD_ADMIN_RESET (1ULL << 31)
+ /* Evaluate the AIGP attribute during the best path selection process */
+ #define BGP_FLAG_COMPARE_AIGP (1ULL << 32)
++#define BGP_FLAG_VNI_DOWN (1ULL << 38)
+ 
+ 	/* BGP default address-families.
+ 	 * New peers inherit enabled afi/safis from bgp instance.
+-- 
+2.17.1
+
diff --git a/src/sonic-frr/patch/0036-zebra-backpressure-Fix-Null-ptr-access-Coverity-Issu.patch b/src/sonic-frr/patch/0036-zebra-backpressure-Fix-Null-ptr-access-Coverity-Issu.patch
new file mode 100644
index 000000000..a3b1fa5fe
--- /dev/null
+++ b/src/sonic-frr/patch/0036-zebra-backpressure-Fix-Null-ptr-access-Coverity-Issu.patch
@@ -0,0 +1,29 @@
+From b6caf88bd3bce9673d49435453991c49712287aa Mon Sep 17 00:00:00 2001
+From: Rajasekar Raja <rajasekarr@nvidia.com>
+Date: Thu, 11 Apr 2024 22:27:37 -0700
+Subject: [PATCH 08/11] zebra: backpressure - Fix Null ptr access (Coverity
+ Issue)
+
+Fix dereferencing NULL ptr making coverity happy.
+
+Ticket :#3390099
+
+Signed-off-by: Rajasekar Raja <rajasekarr@nvidia.com>
+
+diff --git a/bgpd/bgp_zebra.c b/bgpd/bgp_zebra.c
+index b81acaf8ec..524551b1e0 100644
+--- a/bgpd/bgp_zebra.c
++++ b/bgpd/bgp_zebra.c
+@@ -1809,8 +1809,7 @@ static void bgp_handle_route_announcements_to_zebra(struct thread *e)
+ 		table = bgp_dest_table(dest);
+ 		install =
+ 			CHECK_FLAG(dest->flags, BGP_NODE_SCHEDULE_FOR_INSTALL);
+-		if (table && table->afi == AFI_L2VPN &&
+-		    table->safi == SAFI_EVPN)
++		if (table->afi == AFI_L2VPN && table->safi == SAFI_EVPN)
+ 			is_evpn = true;
+ 
+ 		if (BGP_DEBUG(zebra, ZEBRA))
+-- 
+2.17.1
+
diff --git a/src/sonic-frr/patch/0037-bgpd-Increase-install-uninstall-speed-of-evpn-vpn-vn.patch b/src/sonic-frr/patch/0037-bgpd-Increase-install-uninstall-speed-of-evpn-vpn-vn.patch
new file mode 100644
index 000000000..a360a3101
--- /dev/null
+++ b/src/sonic-frr/patch/0037-bgpd-Increase-install-uninstall-speed-of-evpn-vpn-vn.patch
@@ -0,0 +1,116 @@
+From 7166c2222cb82885510c3e8c7906c1d7de950f9b Mon Sep 17 00:00:00 2001
+From: Donald Sharp <sharpd@nvidia.com>
+Date: Thu, 11 Apr 2024 13:28:30 -0400
+Subject: [PATCH 09/11] bgpd: Increase install/uninstall speed of evpn vpn
+ vni's
+
+BGP receives notification from zebra about an vpn that
+needs to be installed into the evpn tables.  Unfortunately
+this function was walking the entirety of evpn tables
+3 times.  Modify the code to walk the tree 1 time and
+to just look for the needed route types as you go.
+
+This reduces, in a scaled environment, processing
+time of the zclient_read function from 130 seconds
+to 95 seconds.  For a up / down / up interface
+scenario.
+
+Signed-off-by: Rajasekar Raja <rajasekarr@vndia.com>
+Signed-off-by: Donald Sharp <sharpd@nvidia.com>
+
+diff --git a/bgpd/bgp_evpn.c b/bgpd/bgp_evpn.c
+index 622fd6afd2..eb5aa9f077 100644
+--- a/bgpd/bgp_evpn.c
++++ b/bgpd/bgp_evpn.c
+@@ -3752,9 +3752,7 @@ static int install_uninstall_routes_for_vrf(struct bgp *bgp_vrf, int install)
+  * particular VNI.
+  */
+ static int install_uninstall_routes_for_vni(struct bgp *bgp,
+-					    struct bgpevpn *vpn,
+-					    bgp_evpn_route_type rtype,
+-					    int install)
++					    struct bgpevpn *vpn, int install)
+ {
+ 	afi_t afi;
+ 	safi_t safi;
+@@ -3785,7 +3783,9 @@ static int install_uninstall_routes_for_vni(struct bgp *bgp,
+ 				(const struct prefix_evpn *)bgp_dest_get_prefix(
+ 					dest);
+ 
+-			if (evp->prefix.route_type != rtype)
++			if (evp->prefix.route_type != BGP_EVPN_IMET_ROUTE &&
++			    evp->prefix.route_type != BGP_EVPN_AD_ROUTE &&
++			    evp->prefix.route_type != BGP_EVPN_MAC_IP_ROUTE)
+ 				continue;
+ 
+ 			for (pi = bgp_dest_get_bgp_path_info(dest); pi;
+@@ -3812,7 +3812,8 @@ static int install_uninstall_routes_for_vni(struct bgp *bgp,
+ 							bgp->vrf_id,
+ 							install ? "install"
+ 								: "uninstall",
+-							rtype == BGP_EVPN_MAC_IP_ROUTE
++							evp->prefix.route_type ==
++									BGP_EVPN_MAC_IP_ROUTE
+ 								? "MACIP"
+ 								: "IMET",
+ 							vpn->vni);
+@@ -3845,23 +3846,11 @@ static int install_routes_for_vrf(struct bgp *bgp_vrf)
+  */
+ static int install_routes_for_vni(struct bgp *bgp, struct bgpevpn *vpn)
+ {
+-	int ret;
+-
+-	/* Install type-3 routes followed by type-2 routes - the ones applicable
++	/*
++	 * Install type-3 routes followed by type-2 routes - the ones applicable
+ 	 * for this VNI.
+ 	 */
+-	ret = install_uninstall_routes_for_vni(bgp, vpn, BGP_EVPN_IMET_ROUTE,
+-					       1);
+-	if (ret)
+-		return ret;
+-
+-	ret = install_uninstall_routes_for_vni(bgp, vpn, BGP_EVPN_AD_ROUTE,
+-					       1);
+-	if (ret)
+-		return ret;
+-
+-	return install_uninstall_routes_for_vni(bgp, vpn, BGP_EVPN_MAC_IP_ROUTE,
+-						1);
++	return install_uninstall_routes_for_vni(bgp, vpn, 1);
+ }
+ 
+ /* uninstall routes from l3vni vrf. */
+@@ -3877,25 +3866,11 @@ static int uninstall_routes_for_vrf(struct bgp *bgp_vrf)
+  */
+ static int uninstall_routes_for_vni(struct bgp *bgp, struct bgpevpn *vpn)
+ {
+-	int ret;
+-
+-	/* Uninstall type-2 routes followed by type-3 routes - the ones
+-	 * applicable
+-	 * for this VNI.
++	/*
++	 * Uninstall type-2 routes followed by type-3 routes - the ones
++	 * applicable for this VNI.
+ 	 */
+-	ret = install_uninstall_routes_for_vni(bgp, vpn, BGP_EVPN_MAC_IP_ROUTE,
+-					       0);
+-	if (ret)
+-		return ret;
+-
+-	ret = install_uninstall_routes_for_vni(bgp, vpn, BGP_EVPN_AD_ROUTE,
+-					       0);
+-	if (ret)
+-		return ret;
+-
+-
+-	return install_uninstall_routes_for_vni(bgp, vpn, BGP_EVPN_IMET_ROUTE,
+-						0);
++	return install_uninstall_routes_for_vni(bgp, vpn, 0);
+ }
+ 
+ /*
+-- 
+2.17.1
+
diff --git a/src/sonic-frr/patch/0038-zebra-Actually-display-I-O-buffer-sizes.patch b/src/sonic-frr/patch/0038-zebra-Actually-display-I-O-buffer-sizes.patch
new file mode 100644
index 000000000..904cb169b
--- /dev/null
+++ b/src/sonic-frr/patch/0038-zebra-Actually-display-I-O-buffer-sizes.patch
@@ -0,0 +1,49 @@
+From 72781109e5dadafe55f10d72ae2b3505bf0ccb93 Mon Sep 17 00:00:00 2001
+From: Donald Sharp <sharpd@nvidia.com>
+Date: Mon, 8 Apr 2024 16:24:05 -0400
+Subject: [PATCH 10/11] zebra: Actually display I/O buffer sizes
+
+An operator found a situation where zebra was
+backing up in a significant way towards BGP
+with EVPN changes taking up some serious amounts
+of memory.  The key lines that would have clued
+us in on it were behind a dev build.  Let's change
+this.
+
+Signed-off-by: Donald Sharp <sharpd@nvidia.com>
+
+diff --git a/lib/stream.h b/lib/stream.h
+index a3c148c9c9..7acbbd2dc7 100644
+--- a/lib/stream.h
++++ b/lib/stream.h
+@@ -120,9 +120,7 @@ struct stream_fifo {
+ 
+ 	/* number of streams in this fifo */
+ 	atomic_size_t count;
+-#if defined DEV_BUILD
+ 	atomic_size_t max_count;
+-#endif
+ 
+ 	struct stream *head;
+ 	struct stream *tail;
+diff --git a/zebra/zserv.c b/zebra/zserv.c
+index de6e404fc4..daccfa59d5 100644
+--- a/zebra/zserv.c
++++ b/zebra/zserv.c
+@@ -1130,12 +1130,10 @@ static void zebra_show_client_detail(struct vty *vty, struct zserv *client)
+ 	vty_out(vty, "ES-EVI      %-12u%-12u%-12u\n",
+ 		client->local_es_evi_add_cnt, 0, client->local_es_evi_del_cnt);
+ 	vty_out(vty, "Errors: %u\n", client->error_cnt);
+-
+-#if defined DEV_BUILD
+ 	vty_out(vty, "Input Fifo: %zu:%zu Output Fifo: %zu:%zu\n",
+ 		client->ibuf_fifo->count, client->ibuf_fifo->max_count,
+ 		client->obuf_fifo->count, client->obuf_fifo->max_count);
+-#endif
++
+ 	vty_out(vty, "\n");
+ }
+ 
+-- 
+2.17.1
+
diff --git a/src/sonic-frr/patch/0039-zebra-Actually-display-I-O-buffer-sizes-part-2.patch b/src/sonic-frr/patch/0039-zebra-Actually-display-I-O-buffer-sizes-part-2.patch
new file mode 100644
index 000000000..9088bfebb
--- /dev/null
+++ b/src/sonic-frr/patch/0039-zebra-Actually-display-I-O-buffer-sizes-part-2.patch
@@ -0,0 +1,49 @@
+From 981bfca72414bfa7a97b6526e4736ea4f6834620 Mon Sep 17 00:00:00 2001
+From: Rajasekar Raja <rajasekarr@nvidia.com>
+Date: Mon, 22 Apr 2024 13:50:47 -0400
+Subject: [PATCH] From a88498262d8d88fb3846d1a5c1a373751fe6f381 Mon Sep 17
+ 00:00:00 2001 Subject: [PATCH 11/11] zebra: Actually display I/O buffer sizes
+ (part-2)
+
+An extension of commit-8d8f12ba8e5cd11c189b8475b05539fa8415ccb9
+
+Removing ifdef DEV_BUILD in stream_fifo_push as well to make the 'sh
+zebra client' display the current I/O fifo along with max fifo items.
+
+TICKET :#3390099
+
+Signed-off-by: Rajasekar Raja <rajasekarr@nvidia.com>
+
+diff --git a/lib/stream.c b/lib/stream.c
+index 2de3abdf45..3aef70794e 100644
+--- a/lib/stream.c
++++ b/lib/stream.c
+@@ -1256,9 +1256,7 @@ void stream_fifo_init(struct stream_fifo *fifo)
+ /* Add new stream to fifo. */
+ void stream_fifo_push(struct stream_fifo *fifo, struct stream *s)
+ {
+-#if defined DEV_BUILD
+ 	size_t max, curmax;
+-#endif
+ 
+ 	if (fifo->tail)
+ 		fifo->tail->next = s;
+@@ -1267,15 +1265,11 @@ void stream_fifo_push(struct stream_fifo *fifo, struct stream *s)
+ 
+ 	fifo->tail = s;
+ 	fifo->tail->next = NULL;
+-#if !defined DEV_BUILD
+-	atomic_fetch_add_explicit(&fifo->count, 1, memory_order_release);
+-#else
+ 	max = atomic_fetch_add_explicit(&fifo->count, 1, memory_order_release);
+ 	curmax = atomic_load_explicit(&fifo->max_count, memory_order_relaxed);
+ 	if (max > curmax)
+ 		atomic_store_explicit(&fifo->max_count, max,
+ 				      memory_order_relaxed);
+-#endif
+ }
+ 
+ void stream_fifo_push_safe(struct stream_fifo *fifo, struct stream *s)
+-- 
+2.43.2
+
diff --git a/src/sonic-frr/patch/0040-bgpd-backpressure-Fix-to-withdraw-evpn-type-5-routes.patch b/src/sonic-frr/patch/0040-bgpd-backpressure-Fix-to-withdraw-evpn-type-5-routes.patch
new file mode 100644
index 000000000..b74d86881
--- /dev/null
+++ b/src/sonic-frr/patch/0040-bgpd-backpressure-Fix-to-withdraw-evpn-type-5-routes.patch
@@ -0,0 +1,63 @@
+From f3ec35b461a06f1278383d2347dfbc611b6a91a6 Mon Sep 17 00:00:00 2001
+From: Rajasekar Raja <rajasekarr@nvidia.com>
+Date: Fri, 17 May 2024 12:36:31 -0700
+Subject: [PATCH] bgpd: backpressure - Fix to withdraw evpn type-5 routes
+ immediately
+
+As part of backpressure changes, there is a bug where immediate withdraw
+is to be sent for evpn imported type-5 prefix to clear the nh neigh and
+RMAC entry.
+
+Fixing this by sending withdraw immediately to keep it inline with the
+code today
+
+Ticket: #3905571
+
+Signed-off-by: Donald Sharp <sharpd@nvidia.com>
+Signed-off-by: Rajasekar Raja <rajasekarr@nvidia.com>
+
+diff --git a/bgpd/bgp_route.c b/bgpd/bgp_route.c
+index 679abba463..e28069767f 100644
+--- a/bgpd/bgp_route.c
++++ b/bgpd/bgp_route.c
+@@ -3312,8 +3312,7 @@ static void bgp_process_main_one(struct bgp *bgp, struct bgp_dest *dest,
+ 			 */
+ 			if (old_select &&
+ 			    is_route_parent_evpn(old_select))
+-				bgp_zebra_route_install(dest, old_select, bgp,
+-							false, NULL, false);
++				bgp_zebra_withdraw_actual(dest, old_select, bgp);
+ 
+ 			bgp_zebra_route_install(dest, new_select, bgp, true,
+ 						NULL, false);
+diff --git a/bgpd/bgp_zebra.c b/bgpd/bgp_zebra.c
+index 524551b1e0..5d5525156b 100644
+--- a/bgpd/bgp_zebra.c
++++ b/bgpd/bgp_zebra.c
+@@ -1889,11 +1889,9 @@ static void bgp_zebra_buffer_write_ready(void)
+  *                                     save new pi, mark as going to be
+  *                                     withdrawan, remove install flag
+  *
+- *    Withdrawal       Install         Special case, send withdrawal immediately
+- *                                     Leave dest on list, release old pi,
++ *    Withdrawal       Install         Leave dest on list, release old pi,
+  *                                     save new pi, mark as going to be
+- *                                     installed.  <see note about evpn
+- *                                     in bgp_route.c in bgp_process_main_one>
++ *                                     installed.
+  *    Withdrawal       Withdrawal      Leave dest on list, release old pi,
+  *                                     save new pi, mark as going to be
+  *                                     withdrawn.
+@@ -1949,9 +1947,6 @@ void bgp_zebra_route_install(struct bgp_dest *dest, struct bgp_path_info *info,
+ 		dest->za_bgp_pi = info;
+ 	} else if (CHECK_FLAG(dest->flags, BGP_NODE_SCHEDULE_FOR_DELETE)) {
+ 		assert(dest->za_bgp_pi);
+-		if (install & !is_evpn)
+-			bgp_zebra_withdraw_actual(dest, dest->za_bgp_pi, bgp);
+-
+ 		bgp_path_info_unlock(dest->za_bgp_pi);
+ 		bgp_path_info_lock(info);
+ 		dest->za_bgp_pi = info;
+-- 
+2.43.2
+
diff --git a/src/sonic-frr/patch/0041-bgpd-backpressure-Fix-to-avoid-CPU-hog.patch b/src/sonic-frr/patch/0041-bgpd-backpressure-Fix-to-avoid-CPU-hog.patch
new file mode 100644
index 000000000..860d928d3
--- /dev/null
+++ b/src/sonic-frr/patch/0041-bgpd-backpressure-Fix-to-avoid-CPU-hog.patch
@@ -0,0 +1,53 @@
+From 4775b2b2bf39caa4bc5aed10ef44c6dcf9c7fc80 Mon Sep 17 00:00:00 2001
+From: Rajasekar Raja <rajasekarr@nvidia.com>
+Date: Fri, 17 May 2024 15:43:59 -0700
+Subject: [PATCH] bgpd: backpressure - Fix to avoid CPU hog
+
+In case when bgp_evpn_free or bgp_delete is called and the announce_list
+has few items where vpn/bgp does not match, we add the item back to the
+list. Because of this the list count is always > 0 thereby hogging CPU or
+infinite loop.
+
+Ticket: #3905624
+
+Signed-off-by: Rajasekar Raja <rajasekarr@nvidia.com>
+
+diff --git a/bgpd/bgp_evpn.c b/bgpd/bgp_evpn.c
+index eb5aa9f077..2243ffdc77 100644
+--- a/bgpd/bgp_evpn.c
++++ b/bgpd/bgp_evpn.c
+@@ -6074,9 +6074,11 @@ struct bgpevpn *bgp_evpn_new(struct bgp *bgp, vni_t vni,
+ void bgp_evpn_free(struct bgp *bgp, struct bgpevpn *vpn)
+ {
+ 	struct bgp_dest *dest = NULL;
++	uint32_t ann_count = zebra_announce_count(&bm->zebra_announce_head);
+ 
+-	while (zebra_announce_count(&bm->zebra_announce_head)) {
++	while (ann_count) {
+ 		dest = zebra_announce_pop(&bm->zebra_announce_head);
++		ann_count--;
+ 		if (dest->za_vpn == vpn) {
+ 			bgp_path_info_unlock(dest->za_bgp_pi);
+ 			bgp_dest_unlock_node(dest);
+diff --git a/bgpd/bgpd.c b/bgpd/bgpd.c
+index da133d71c1..492566f8c8 100644
+--- a/bgpd/bgpd.c
++++ b/bgpd/bgpd.c
+@@ -3690,11 +3690,13 @@ int bgp_delete(struct bgp *bgp)
+ 	int i;
+ 	struct bgp_dest *dest = NULL;
+ 	struct graceful_restart_info *gr_info;
++	uint32_t ann_count = zebra_announce_count(&bm->zebra_announce_head);
+ 
+ 	assert(bgp);
+ 
+-	while (zebra_announce_count(&bm->zebra_announce_head)) {
++	while (ann_count) {
+ 		dest = zebra_announce_pop(&bm->zebra_announce_head);
++		ann_count--;
+ 		if (dest->za_bgp_pi->peer->bgp == bgp) {
+ 			bgp_path_info_unlock(dest->za_bgp_pi);
+ 			bgp_dest_unlock_node(dest);
+-- 
+2.43.2
+
diff --git a/src/sonic-frr/patch/0042-zebra-Use-built-in-data-structure-counter.patch b/src/sonic-frr/patch/0042-zebra-Use-built-in-data-structure-counter.patch
new file mode 100644
index 000000000..3401dae27
--- /dev/null
+++ b/src/sonic-frr/patch/0042-zebra-Use-built-in-data-structure-counter.patch
@@ -0,0 +1,156 @@
+From 529cdfa09065c6c77aff4a96a52f0d3bcb385b6f Mon Sep 17 00:00:00 2001
+From: Donald Sharp <sharpd@nvidia.com>
+Date: Thu, 13 Jun 2024 15:30:00 -0400
+Subject: [PATCH 1/5] zebra: Use built in data structure counter
+
+Instead of keeping a counter that is independent
+of the queue's data structure.  Just use the queue's
+built-in counter.  Ensure that it's pthread safe by
+keeping it wrapped inside the mutex for adding/deleting
+to the queue.
+
+Signed-off-by: Donald Sharp <sharpd@nvidia.com>
+
+diff --git a/zebra/dplane_fpm_nl.c b/zebra/dplane_fpm_nl.c
+index caa2f988e2..bc9815bb10 100644
+--- a/zebra/dplane_fpm_nl.c
++++ b/zebra/dplane_fpm_nl.c
+@@ -135,8 +135,6 @@ struct fpm_nl_ctx {
+ 
+ 		/* Amount of data plane context processed. */
+ 		_Atomic uint32_t dplane_contexts;
+-		/* Amount of data plane contexts enqueued. */
+-		_Atomic uint32_t ctxqueue_len;
+ 		/* Peak amount of data plane contexts enqueued. */
+ 		_Atomic uint32_t ctxqueue_len_peak;
+ 
+@@ -311,6 +309,12 @@ DEFUN(fpm_show_counters, fpm_show_counters_cmd,
+       FPM_STR
+       "FPM statistic counters\n")
+ {
++	uint32_t curr_queue_len;
++
++	frr_with_mutex (&gfnc->ctxqueue_mutex) {
++		curr_queue_len = dplane_ctx_queue_count(&gfnc->ctxqueue);
++	}
++
+ 	vty_out(vty, "%30s\n%30s\n", "FPM counters", "============");
+ 
+ #define SHOW_COUNTER(label, counter) \
+@@ -324,8 +328,7 @@ DEFUN(fpm_show_counters, fpm_show_counters_cmd,
+ 	SHOW_COUNTER("Connection errors", gfnc->counters.connection_errors);
+ 	SHOW_COUNTER("Data plane items processed",
+ 		     gfnc->counters.dplane_contexts);
+-	SHOW_COUNTER("Data plane items enqueued",
+-		     gfnc->counters.ctxqueue_len);
++	SHOW_COUNTER("Data plane items enqueued", curr_queue_len);
+ 	SHOW_COUNTER("Data plane items queue peak",
+ 		     gfnc->counters.ctxqueue_len_peak);
+ 	SHOW_COUNTER("Buffer full hits", gfnc->counters.buffer_full);
+@@ -344,6 +347,12 @@ DEFUN(fpm_show_counters_json, fpm_show_counters_json_cmd,
+       "FPM statistic counters\n"
+       JSON_STR)
+ {
++	uint32_t curr_queue_len;
++
++	frr_with_mutex (&gfnc->ctxqueue_mutex) {
++		curr_queue_len = dplane_ctx_queue_count(&gfnc->ctxqueue);
++	}
++
+ 	struct json_object *jo;
+ 
+ 	jo = json_object_new_object();
+@@ -357,8 +366,7 @@ DEFUN(fpm_show_counters_json, fpm_show_counters_json_cmd,
+ 			    gfnc->counters.connection_errors);
+ 	json_object_int_add(jo, "data-plane-contexts",
+ 			    gfnc->counters.dplane_contexts);
+-	json_object_int_add(jo, "data-plane-contexts-queue",
+-			    gfnc->counters.ctxqueue_len);
++	json_object_int_add(jo, "data-plane-contexts-queue", curr_queue_len);
+ 	json_object_int_add(jo, "data-plane-contexts-queue-peak",
+ 			    gfnc->counters.ctxqueue_len_peak);
+ 	json_object_int_add(jo, "buffer-full-hits", gfnc->counters.buffer_full);
+@@ -1380,8 +1388,6 @@ static void fpm_process_queue(struct thread *t)
+ 
+ 		/* Account the processed entries. */
+ 		processed_contexts++;
+-		atomic_fetch_sub_explicit(&fnc->counters.ctxqueue_len, 1,
+-					  memory_order_relaxed);
+ 
+ 		dplane_ctx_set_status(ctx, ZEBRA_DPLANE_REQUEST_SUCCESS);
+ 		dplane_provider_enqueue_out_ctx(fnc->prov, ctx);
+@@ -1550,7 +1556,7 @@ static int fpm_nl_process(struct zebra_dplane_provider *prov)
+ 	struct zebra_dplane_ctx *ctx;
+ 	struct fpm_nl_ctx *fnc;
+ 	int counter, limit;
+-	uint64_t cur_queue, peak_queue = 0, stored_peak_queue;
++	uint64_t cur_queue = 0, peak_queue = 0, stored_peak_queue;
+ 
+ 	fnc = dplane_provider_get_data(prov);
+ 	limit = dplane_provider_get_work_limit(prov);
+@@ -1564,20 +1570,12 @@ static int fpm_nl_process(struct zebra_dplane_provider *prov)
+ 		 * anyway.
+ 		 */
+ 		if (fnc->socket != -1 && fnc->connecting == false) {
+-			/*
+-			 * Update the number of queued contexts *before*
+-			 * enqueueing, to ensure counter consistency.
+-			 */
+-			atomic_fetch_add_explicit(&fnc->counters.ctxqueue_len,
+-						  1, memory_order_relaxed);
+-
+ 			frr_with_mutex (&fnc->ctxqueue_mutex) {
+ 				dplane_ctx_enqueue_tail(&fnc->ctxqueue, ctx);
++				cur_queue =
++					dplane_ctx_queue_count(&fnc->ctxqueue);
+ 			}
+ 
+-			cur_queue = atomic_load_explicit(
+-				&fnc->counters.ctxqueue_len,
+-				memory_order_relaxed);
+ 			if (peak_queue < cur_queue)
+ 				peak_queue = cur_queue;
+ 			continue;
+@@ -1594,9 +1592,7 @@ static int fpm_nl_process(struct zebra_dplane_provider *prov)
+ 		atomic_store_explicit(&fnc->counters.ctxqueue_len_peak,
+ 				      peak_queue, memory_order_relaxed);
+ 
+-	if (atomic_load_explicit(&fnc->counters.ctxqueue_len,
+-				 memory_order_relaxed)
+-	    > 0)
++	if (cur_queue > 0)
+ 		thread_add_timer(fnc->fthread->master, fpm_process_queue,
+ 				 fnc, 0, &fnc->t_dequeue);
+ 
+diff --git a/zebra/zebra_dplane.c b/zebra/zebra_dplane.c
+index 59b8d6cc63..c252a370b8 100644
+--- a/zebra/zebra_dplane.c
++++ b/zebra/zebra_dplane.c
+@@ -969,6 +969,11 @@ struct zebra_dplane_ctx *dplane_ctx_dequeue(struct dplane_ctx_list_head *q)
+ 	return ctx;
+ }
+ 
++uint32_t dplane_ctx_queue_count(struct dplane_ctx_list_head *q)
++{
++	return dplane_ctx_list_count(q);
++}
++
+ /*
+  * Accessors for information from the context object
+  */
+diff --git a/zebra/zebra_dplane.h b/zebra/zebra_dplane.h
+index 9f9496c8f4..c29e05bbc9 100644
+--- a/zebra/zebra_dplane.h
++++ b/zebra/zebra_dplane.h
+@@ -324,6 +324,8 @@ struct zebra_dplane_ctx *dplane_ctx_get_head(struct dplane_ctx_list_head *q);
+ /* Init a list of contexts */
+ void dplane_ctx_q_init(struct dplane_ctx_list_head *q);
+ 
++uint32_t dplane_ctx_queue_count(struct dplane_ctx_list_head *q);
++
+ /*
+  * Accessors for information from the context object
+  */
+-- 
+2.43.2
+
diff --git a/src/sonic-frr/patch/0043-zebra-Use-the-ctx-queue-counters.patch b/src/sonic-frr/patch/0043-zebra-Use-the-ctx-queue-counters.patch
new file mode 100644
index 000000000..e57684aee
--- /dev/null
+++ b/src/sonic-frr/patch/0043-zebra-Use-the-ctx-queue-counters.patch
@@ -0,0 +1,108 @@
+From 59e2b19d2d08349ef0197b0adcb13d0bd7de2b79 Mon Sep 17 00:00:00 2001
+From: Donald Sharp <sharpd@nvidia.com>
+Date: Mon, 17 Jun 2024 11:05:28 -0400
+Subject: [PATCH 2/5] zebra: Use the ctx queue counters
+
+The ctx queue data structures already have a counter
+associated with them.  Let's just use them instead.
+
+Signed-off-by: Donald Sharp <sharpd@nvidia.com>
+
+diff --git a/zebra/zebra_dplane.c b/zebra/zebra_dplane.c
+index c252a370b8..c52e032660 100644
+--- a/zebra/zebra_dplane.c
++++ b/zebra/zebra_dplane.c
+@@ -492,10 +492,8 @@ struct zebra_dplane_provider {
+ 	int (*dp_fini)(struct zebra_dplane_provider *prov, bool early_p);
+ 
+ 	_Atomic uint32_t dp_in_counter;
+-	_Atomic uint32_t dp_in_queued;
+ 	_Atomic uint32_t dp_in_max;
+ 	_Atomic uint32_t dp_out_counter;
+-	_Atomic uint32_t dp_out_queued;
+ 	_Atomic uint32_t dp_out_max;
+ 	_Atomic uint32_t dp_error_counter;
+ 
+@@ -6008,17 +6006,19 @@ int dplane_show_provs_helper(struct vty *vty, bool detailed)
+ 
+ 	/* Show counters, useful info from each registered provider */
+ 	while (prov) {
++		dplane_provider_lock(prov);
++		in_q = dplane_ctx_queue_count(&prov->dp_ctx_in_list);
++		out_q = dplane_ctx_queue_count(&prov->dp_ctx_out_list);
++		dplane_provider_unlock(prov);
+ 
+ 		in = atomic_load_explicit(&prov->dp_in_counter,
+ 					  memory_order_relaxed);
+-		in_q = atomic_load_explicit(&prov->dp_in_queued,
+-					    memory_order_relaxed);
++
+ 		in_max = atomic_load_explicit(&prov->dp_in_max,
+ 					      memory_order_relaxed);
+ 		out = atomic_load_explicit(&prov->dp_out_counter,
+ 					   memory_order_relaxed);
+-		out_q = atomic_load_explicit(&prov->dp_out_queued,
+-					     memory_order_relaxed);
++
+ 		out_max = atomic_load_explicit(&prov->dp_out_max,
+ 					       memory_order_relaxed);
+ 
+@@ -6169,10 +6169,6 @@ struct zebra_dplane_ctx *dplane_provider_dequeue_in_ctx(
+ 	dplane_provider_lock(prov);
+ 
+ 	ctx = dplane_ctx_list_pop(&(prov->dp_ctx_in_list));
+-	if (ctx) {
+-		atomic_fetch_sub_explicit(&prov->dp_in_queued, 1,
+-					  memory_order_relaxed);
+-	}
+ 
+ 	dplane_provider_unlock(prov);
+ 
+@@ -6200,10 +6196,6 @@ int dplane_provider_dequeue_in_list(struct zebra_dplane_provider *prov,
+ 			break;
+ 	}
+ 
+-	if (ret > 0)
+-		atomic_fetch_sub_explicit(&prov->dp_in_queued, ret,
+-					  memory_order_relaxed);
+-
+ 	dplane_provider_unlock(prov);
+ 
+ 	return ret;
+@@ -6228,10 +6220,7 @@ void dplane_provider_enqueue_out_ctx(struct zebra_dplane_provider *prov,
+ 	dplane_ctx_list_add_tail(&(prov->dp_ctx_out_list), ctx);
+ 
+ 	/* Maintain out-queue counters */
+-	atomic_fetch_add_explicit(&(prov->dp_out_queued), 1,
+-				  memory_order_relaxed);
+-	curr = atomic_load_explicit(&prov->dp_out_queued,
+-				    memory_order_relaxed);
++	curr = dplane_ctx_queue_count(&prov->dp_ctx_out_list);
+ 	high = atomic_load_explicit(&prov->dp_out_max,
+ 				    memory_order_relaxed);
+ 	if (curr > high)
+@@ -6253,9 +6242,6 @@ dplane_provider_dequeue_out_ctx(struct zebra_dplane_provider *prov)
+ 	if (!ctx)
+ 		return NULL;
+ 
+-	atomic_fetch_sub_explicit(&(prov->dp_out_queued), 1,
+-				  memory_order_relaxed);
+-
+ 	return ctx;
+ }
+ 
+@@ -7260,10 +7246,7 @@ static void dplane_thread_loop(struct thread *event)
+ 
+ 		atomic_fetch_add_explicit(&prov->dp_in_counter, counter,
+ 					  memory_order_relaxed);
+-		atomic_fetch_add_explicit(&prov->dp_in_queued, counter,
+-					  memory_order_relaxed);
+-		curr = atomic_load_explicit(&prov->dp_in_queued,
+-					    memory_order_relaxed);
++		curr = dplane_ctx_queue_count(&prov->dp_ctx_in_list);
+ 		high = atomic_load_explicit(&prov->dp_in_max,
+ 					    memory_order_relaxed);
+ 		if (curr > high)
+-- 
+2.43.2
+
diff --git a/src/sonic-frr/patch/0044-zebra-Modify-dplane-loop-to-allow-backpressure-to-fi.patch b/src/sonic-frr/patch/0044-zebra-Modify-dplane-loop-to-allow-backpressure-to-fi.patch
new file mode 100644
index 000000000..67b76d034
--- /dev/null
+++ b/src/sonic-frr/patch/0044-zebra-Modify-dplane-loop-to-allow-backpressure-to-fi.patch
@@ -0,0 +1,199 @@
+From 4671ddf4920553b663fda129f7c4366839347645 Mon Sep 17 00:00:00 2001
+From: Donald Sharp <sharpd@nvidia.com>
+Date: Wed, 12 Jun 2024 14:14:48 -0400
+Subject: [PATCH 3/5] zebra: Modify dplane loop to allow backpressure to filter
+ up
+
+Currently when the dplane_thread_loop is run, it moves contexts
+from the dg_update_list and puts the contexts on the input queue
+of the first provider.  This provider is given a chance to run
+and then the items on the output queue are pulled off and placed
+on the input queue of the next provider.  Rinse/Repeat down through
+the entire list of providers.  Now imagine that we have a list
+of multiple providers and the last provider is getting backed up.
+Contexts will end up sticking in the input Queue of the `slow`
+provider.  This can grow without bounds.  This is a real problem
+when you have a situation where an interface is flapping and an
+upper level protocol is sending a continous stream of route
+updates to reflect the change in ecmp.  You can end up with
+a very very large backlog of contexts.  This is bad because
+zebra can easily grow to a very very large memory size and on
+restricted systems you can run out of memory.  Fortunately
+for us, the MetaQ already participates with this process
+by not doing more route processing until the dg_update_list
+goes below the working limit of dg_updates_per_cycle.  Thus
+if FRR modifies the behavior of this loop to not move more
+contexts onto the input queue if either the input queue
+or output queue of the next provider has reached this limit.
+FRR will naturaly start auto handling backpressure for the dplane
+context system and memory will not go out of control.
+
+Signed-off-by: Donald Sharp <sharpd@nvidia.com>
+
+diff --git a/zebra/zebra_dplane.c b/zebra/zebra_dplane.c
+index c52e032660..f0e1ff6f27 100644
+--- a/zebra/zebra_dplane.c
++++ b/zebra/zebra_dplane.c
+@@ -7155,10 +7155,10 @@ static void dplane_thread_loop(struct thread *event)
+ {
+ 	struct dplane_ctx_list_head work_list;
+ 	struct dplane_ctx_list_head error_list;
+-	struct zebra_dplane_provider *prov;
++	struct zebra_dplane_provider *prov, *next_prov;
+ 	struct zebra_dplane_ctx *ctx;
+ 	int limit, counter, error_counter;
+-	uint64_t curr, high;
++	uint64_t curr, out_curr, high;
+ 	bool reschedule = false;
+ 
+ 	/* Capture work limit per cycle */
+@@ -7182,18 +7182,48 @@ static void dplane_thread_loop(struct thread *event)
+ 	/* Locate initial registered provider */
+ 	prov = dplane_prov_list_first(&zdplane_info.dg_providers);
+ 
+-	/* Move new work from incoming list to temp list */
+-	for (counter = 0; counter < limit; counter++) {
+-		ctx = dplane_ctx_list_pop(&zdplane_info.dg_update_list);
+-		if (ctx) {
+-			ctx->zd_provider = prov->dp_id;
++	curr = dplane_ctx_queue_count(&prov->dp_ctx_in_list);
++	out_curr = dplane_ctx_queue_count(&prov->dp_ctx_out_list);
+ 
+-			dplane_ctx_list_add_tail(&work_list, ctx);
+-		} else {
+-			break;
++	if (curr >= (uint64_t)limit) {
++		if (IS_ZEBRA_DEBUG_DPLANE_DETAIL)
++			zlog_debug("%s: Current first provider(%s) Input queue is %" PRIu64
++				   ", holding off work",
++				   __func__, prov->dp_name, curr);
++		counter = 0;
++	} else if (out_curr >= (uint64_t)limit) {
++		if (IS_ZEBRA_DEBUG_DPLANE_DETAIL)
++			zlog_debug("%s: Current first provider(%s) Output queue is %" PRIu64
++				   ", holding off work",
++				   __func__, prov->dp_name, out_curr);
++		counter = 0;
++	} else {
++		int tlimit;
++		/*
++		 * Let's limit the work to how what can be put on the
++		 * in or out queue without going over
++		 */
++		tlimit = limit - MAX(curr, out_curr);
++		/* Move new work from incoming list to temp list */
++		for (counter = 0; counter < tlimit; counter++) {
++			ctx = dplane_ctx_list_pop(&zdplane_info.dg_update_list);
++			if (ctx) {
++				ctx->zd_provider = prov->dp_id;
++
++				dplane_ctx_list_add_tail(&work_list, ctx);
++			} else {
++				break;
++			}
+ 		}
+ 	}
+ 
++	/*
++	 * If there is anything still on the two input queues reschedule
++	 */
++	if (dplane_ctx_queue_count(&prov->dp_ctx_in_list) > 0 ||
++	    dplane_ctx_queue_count(&zdplane_info.dg_update_list) > 0)
++		reschedule = true;
++
+ 	DPLANE_UNLOCK();
+ 
+ 	atomic_fetch_sub_explicit(&zdplane_info.dg_routes_queued, counter,
+@@ -7212,8 +7242,9 @@ static void dplane_thread_loop(struct thread *event)
+ 		 * items.
+ 		 */
+ 		if (IS_ZEBRA_DEBUG_DPLANE_DETAIL)
+-			zlog_debug("dplane enqueues %d new work to provider '%s'",
+-				   counter, dplane_provider_get_name(prov));
++			zlog_debug("dplane enqueues %d new work to provider '%s' curr is %" PRIu64,
++				   counter, dplane_provider_get_name(prov),
++				   curr);
+ 
+ 		/* Capture current provider id in each context; check for
+ 		 * error status.
+@@ -7271,18 +7302,61 @@ static void dplane_thread_loop(struct thread *event)
+ 		if (!zdplane_info.dg_run)
+ 			break;
+ 
++		/* Locate next provider */
++		next_prov = dplane_prov_list_next(&zdplane_info.dg_providers,
++						  prov);
++		if (next_prov) {
++			curr = dplane_ctx_queue_count(
++				&next_prov->dp_ctx_in_list);
++			out_curr = dplane_ctx_queue_count(
++				&next_prov->dp_ctx_out_list);
++		} else
++			out_curr = curr = 0;
++
+ 		/* Dequeue completed work from the provider */
+ 		dplane_provider_lock(prov);
+ 
+-		while (counter < limit) {
+-			ctx = dplane_provider_dequeue_out_ctx(prov);
+-			if (ctx) {
+-				dplane_ctx_list_add_tail(&work_list, ctx);
+-				counter++;
+-			} else
+-				break;
++		if (curr >= (uint64_t)limit) {
++			if (IS_ZEBRA_DEBUG_DPLANE_DETAIL)
++				zlog_debug("%s: Next Provider(%s) Input queue is %" PRIu64
++					   ", holding off work",
++					   __func__, next_prov->dp_name, curr);
++			counter = 0;
++		} else if (out_curr >= (uint64_t)limit) {
++			if (IS_ZEBRA_DEBUG_DPLANE_DETAIL)
++				zlog_debug("%s: Next Provider(%s) Output queue is %" PRIu64
++					   ", holding off work",
++					   __func__, next_prov->dp_name,
++					   out_curr);
++			counter = 0;
++		} else {
++			int tlimit;
++
++			/*
++			 * Let's limit the work to how what can be put on the
++			 * in or out queue without going over
++			 */
++			tlimit = limit - MAX(curr, out_curr);
++			while (counter < tlimit) {
++				ctx = dplane_provider_dequeue_out_ctx(prov);
++				if (ctx) {
++					dplane_ctx_list_add_tail(&work_list,
++								 ctx);
++					counter++;
++				} else
++					break;
++			}
+ 		}
+ 
++		/*
++		 * Let's check if there are still any items on the
++		 * input or output queus of the current provider
++		 * if so then we know we need to reschedule.
++		 */
++		if (dplane_ctx_queue_count(&prov->dp_ctx_in_list) > 0 ||
++		    dplane_ctx_queue_count(&prov->dp_ctx_out_list) > 0)
++			reschedule = true;
++
+ 		dplane_provider_unlock(prov);
+ 
+ 		if (counter >= limit)
+@@ -7293,7 +7367,7 @@ static void dplane_thread_loop(struct thread *event)
+ 				   counter, dplane_provider_get_name(prov));
+ 
+ 		/* Locate next provider */
+-		prov = dplane_prov_list_next(&zdplane_info.dg_providers, prov);
++		prov = next_prov;
+ 	}
+ 
+ 	/*
+-- 
+2.43.2
+
diff --git a/src/sonic-frr/patch/0045-zebra-Limit-queue-depth-in-dplane_fpm_nl.patch b/src/sonic-frr/patch/0045-zebra-Limit-queue-depth-in-dplane_fpm_nl.patch
new file mode 100644
index 000000000..7f25a773a
--- /dev/null
+++ b/src/sonic-frr/patch/0045-zebra-Limit-queue-depth-in-dplane_fpm_nl.patch
@@ -0,0 +1,52 @@
+From 50f606c158f6c89abd0d3f531905005d3a48a5b6 Mon Sep 17 00:00:00 2001
+From: Donald Sharp <sharpd@nvidia.com>
+Date: Wed, 12 Jun 2024 15:16:08 -0400
+Subject: [PATCH 4/5] zebra: Limit queue depth in dplane_fpm_nl
+
+The dplane providers have a concept of input queues
+and output queues.  These queues are chained together
+during normal operation.  The code in zebra also has
+a feedback mechanism where the MetaQ will not run when
+the first input queue is backed up.  Having the dplane_fpm_nl
+code grab all contexts when it is backed up prevents
+this system from behaving appropriately.
+
+Modify the code to not add to the dplane_fpm_nl's internal
+queue when it is already full.  This will allow the backpressure
+to work appropriately in zebra proper.
+
+Signed-off-by: Donald Sharp <sharpd@nvidia.com>
+
+diff --git a/zebra/dplane_fpm_nl.c b/zebra/dplane_fpm_nl.c
+index bc9815bb10..4fd42f64a2 100644
+--- a/zebra/dplane_fpm_nl.c
++++ b/zebra/dplane_fpm_nl.c
+@@ -1560,6 +1560,25 @@ static int fpm_nl_process(struct zebra_dplane_provider *prov)
+ 
+ 	fnc = dplane_provider_get_data(prov);
+ 	limit = dplane_provider_get_work_limit(prov);
++
++	frr_with_mutex (&fnc->ctxqueue_mutex) {
++		cur_queue = dplane_ctx_queue_count(&fnc->ctxqueue);
++	}
++
++	if (cur_queue >= (uint64_t)limit) {
++		if (IS_ZEBRA_DEBUG_FPM)
++			zlog_debug("%s: Already at a limit(%" PRIu64
++				   ") of internal work, hold off",
++				   __func__, cur_queue);
++		limit = 0;
++	} else {
++		if (IS_ZEBRA_DEBUG_FPM)
++			zlog_debug("%s: current queue is %" PRIu64
++				   ", limiting to lesser amount of %" PRIu64,
++				   __func__, cur_queue, limit - cur_queue);
++		limit -= cur_queue;
++	}
++
+ 	for (counter = 0; counter < limit; counter++) {
+ 		ctx = dplane_provider_dequeue_in_ctx(prov);
+ 		if (ctx == NULL)
+-- 
+2.43.2
+
diff --git a/src/sonic-frr/patch/0046-zebra-Modify-show-zebra-dplane-providers-to-give-mor.patch b/src/sonic-frr/patch/0046-zebra-Modify-show-zebra-dplane-providers-to-give-mor.patch
new file mode 100644
index 000000000..e865b861d
--- /dev/null
+++ b/src/sonic-frr/patch/0046-zebra-Modify-show-zebra-dplane-providers-to-give-mor.patch
@@ -0,0 +1,102 @@
+From d695dfb88418834f0054255dd4385b293efb5a17 Mon Sep 17 00:00:00 2001
+From: Donald Sharp <sharpd@nvidia.com>
+Date: Mon, 17 Jun 2024 10:42:41 -0400
+Subject: [PATCH 5/5] zebra: Modify show `zebra dplane providers` to give more
+ data
+
+The show zebra dplane provider command was ommitting
+the input and output queues to the dplane itself.
+It would be nice to have this insight as well.
+
+New output:
+r1# show zebra dplane providers
+dataplane Incoming Queue from Zebra: 100
+Zebra dataplane providers:
+  Kernel (1): in: 6, q: 0, q_max: 3, out: 6, q: 14, q_max: 3
+  dplane_fpm_nl (2): in: 6, q: 10, q_max: 3, out: 6, q: 0, q_max: 3
+dataplane Outgoing Queue to Zebra: 43
+r1#
+
+Signed-off-by: Donald Sharp <sharpd@nvidia.com>
+
+diff --git a/zebra/rib.h b/zebra/rib.h
+index 2e62148ea0..b78cd218f6 100644
+--- a/zebra/rib.h
++++ b/zebra/rib.h
+@@ -630,6 +630,7 @@ static inline struct nexthop_group *rib_get_fib_backup_nhg(
+ }
+ 
+ extern void zebra_vty_init(void);
++extern uint32_t zebra_rib_dplane_results_count(void);
+ 
+ extern pid_t pid;
+ 
+diff --git a/zebra/zebra_dplane.c b/zebra/zebra_dplane.c
+index f0e1ff6f27..21c73a3796 100644
+--- a/zebra/zebra_dplane.c
++++ b/zebra/zebra_dplane.c
+@@ -5998,12 +5998,14 @@ int dplane_show_provs_helper(struct vty *vty, bool detailed)
+ 	struct zebra_dplane_provider *prov;
+ 	uint64_t in, in_q, in_max, out, out_q, out_max;
+ 
+-	vty_out(vty, "Zebra dataplane providers:\n");
+-
+ 	DPLANE_LOCK();
+ 	prov = dplane_prov_list_first(&zdplane_info.dg_providers);
++	in = dplane_ctx_queue_count(&zdplane_info.dg_update_list);
+ 	DPLANE_UNLOCK();
+ 
++	vty_out(vty, "dataplane Incoming Queue from Zebra: %" PRIu64 "\n", in);
++	vty_out(vty, "Zebra dataplane providers:\n");
++
+ 	/* Show counters, useful info from each registered provider */
+ 	while (prov) {
+ 		dplane_provider_lock(prov);
+@@ -6022,13 +6024,19 @@ int dplane_show_provs_helper(struct vty *vty, bool detailed)
+ 		out_max = atomic_load_explicit(&prov->dp_out_max,
+ 					       memory_order_relaxed);
+ 
+-		vty_out(vty, "%s (%u): in: %"PRIu64", q: %"PRIu64", q_max: %"PRIu64", out: %"PRIu64", q: %"PRIu64", q_max: %"PRIu64"\n",
+-			prov->dp_name, prov->dp_id, in, in_q, in_max,
+-			out, out_q, out_max);
++		vty_out(vty,
++			"  %s (%u): in: %" PRIu64 ", q: %" PRIu64
++			", q_max: %" PRIu64 ", out: %" PRIu64 ", q: %" PRIu64
++			", q_max: %" PRIu64 "\n",
++			prov->dp_name, prov->dp_id, in, in_q, in_max, out,
++			out_q, out_max);
+ 
+ 		prov = dplane_prov_list_next(&zdplane_info.dg_providers, prov);
+ 	}
+ 
++	out = zebra_rib_dplane_results_count();
++	vty_out(vty, "dataplane Outgoing Queue to Zebra: %" PRIu64 "\n", out);
++
+ 	return CMD_SUCCESS;
+ }
+ 
+diff --git a/zebra/zebra_rib.c b/zebra/zebra_rib.c
+index 1ff3d98545..ae051d37eb 100644
+--- a/zebra/zebra_rib.c
++++ b/zebra/zebra_rib.c
+@@ -4874,6 +4874,17 @@ static int rib_dplane_results(struct dplane_ctx_list_head *ctxlist)
+ 	return 0;
+ }
+ 
++uint32_t zebra_rib_dplane_results_count(void)
++{
++	uint32_t count;
++
++	frr_with_mutex (&dplane_mutex) {
++		count = dplane_ctx_queue_count(&rib_dplane_q);
++	}
++
++	return count;
++}
++
+ /*
+  * Ensure there are no empty slots in the route_info array.
+  * Every route type in zebra should be present there.
+-- 
+2.43.2
+
diff --git a/src/sonic-frr/patch/0047-bgpd-backpressure-fix-evpn-route-sync-to-zebra.patch b/src/sonic-frr/patch/0047-bgpd-backpressure-fix-evpn-route-sync-to-zebra.patch
new file mode 100644
index 000000000..c8e3de24e
--- /dev/null
+++ b/src/sonic-frr/patch/0047-bgpd-backpressure-fix-evpn-route-sync-to-zebra.patch
@@ -0,0 +1,33 @@
+From bed7636621589c139ed8d83842df3ce438b8493f Mon Sep 17 00:00:00 2001
+From: Chirag Shah <chirag@nvidia.com>
+Date: Mon, 17 Jun 2024 13:58:03 -0700
+Subject: [PATCH] bgpd: backpressure - fix evpn route sync to zebra
+
+In scaled EVPN + ipv4/ipv6 uni route sync to zebra,
+some of the ipv4/ipv6 routes skipped reinstallation
+due to incorrect local variable's stale value.
+
+Once the local variable value reset in each loop
+iteration all skipped routes synced to zebra properly.
+
+Ticket: #3948828
+
+Signed-off-by: Rajasekar Raja <rajasekarr@nvidia.com>
+Signed-off-by: Chirag Shah <chirag@nvidia.com>
+
+diff --git a/bgpd/bgp_zebra.c b/bgpd/bgp_zebra.c
+index 5d5525156b..278e228d66 100644
+--- a/bgpd/bgp_zebra.c
++++ b/bgpd/bgp_zebra.c
+@@ -1801,6 +1801,8 @@ static void bgp_handle_route_announcements_to_zebra(struct thread *e)
+ 	bool install;
+ 
+ 	while (count < ZEBRA_ANNOUNCEMENTS_LIMIT) {
++		is_evpn = false;
++
+ 		dest = zebra_announce_pop(&bm->zebra_announce_head);
+ 
+ 		if (!dest)
+-- 
+2.43.2
+
diff --git a/src/sonic-frr/patch/0048-bgpd-backpressure-fix-to-properly-remove-dest-for-bg.patch b/src/sonic-frr/patch/0048-bgpd-backpressure-fix-to-properly-remove-dest-for-bg.patch
new file mode 100644
index 000000000..1731b6d21
--- /dev/null
+++ b/src/sonic-frr/patch/0048-bgpd-backpressure-fix-to-properly-remove-dest-for-bg.patch
@@ -0,0 +1,90 @@
+From 05d2c5b3ba6f83cd42a4dd5f9e40959fc438b0a6 Mon Sep 17 00:00:00 2001
+From: Rajasekar Raja <rajasekarr@nvidia.com>
+Date: Wed, 10 Jul 2024 16:46:29 -0700
+Subject: [PATCH 1/2] bgpd: backpressure - fix to properly remove dest for bgp
+ under deletion
+
+In case of imported routes (L3vni/vrf leaks), when a bgp instance is
+being deleted, the peer->bgp comparision with the incoming bgp to remove
+the dest from the pending fifo is wrong. This can lead to the fifo
+having stale entries resulting in crash.
+
+Two changes are done here.
+ - Instead of pop/push items in list if the struct bgp doesnt match,
+   simply iterate the list and remove the expected ones.
+
+ - Corrected the way bgp is fetched from dest rather than relying on
+   path_info->peer so that it works for all kinds of routes.
+
+Ticket :#3980988
+
+Signed-off-by: Chirag Shah <chirag @nvidia.com>
+Signed-off-by: Rajasekar Raja <rajasekarr@nvidia.com>
+
+diff --git a/bgpd/bgp_evpn.c b/bgpd/bgp_evpn.c
+index 2243ffdc77..b1f8f19594 100644
+--- a/bgpd/bgp_evpn.c
++++ b/bgpd/bgp_evpn.c
+@@ -6074,16 +6074,16 @@ struct bgpevpn *bgp_evpn_new(struct bgp *bgp, vni_t vni,
+ void bgp_evpn_free(struct bgp *bgp, struct bgpevpn *vpn)
+ {
+ 	struct bgp_dest *dest = NULL;
+-	uint32_t ann_count = zebra_announce_count(&bm->zebra_announce_head);
++	struct bgp_dest *dest_next = NULL;
+ 
+-	while (ann_count) {
+-		dest = zebra_announce_pop(&bm->zebra_announce_head);
+-		ann_count--;
++	for (dest = zebra_announce_first(&bm->zebra_announce_head); dest;
++	     dest = dest_next) {
++		dest_next = zebra_announce_next(&bm->zebra_announce_head, dest);
+ 		if (dest->za_vpn == vpn) {
+ 			bgp_path_info_unlock(dest->za_bgp_pi);
+ 			bgp_dest_unlock_node(dest);
+-		} else
+-			zebra_announce_add_tail(&bm->zebra_announce_head, dest);
++			zebra_announce_del(&bm->zebra_announce_head, dest);
++		}
+ 	}
+ 
+ 	bgp_evpn_remote_ip_hash_destroy(vpn);
+diff --git a/bgpd/bgpd.c b/bgpd/bgpd.c
+index 492566f8c8..e16a58b443 100644
+--- a/bgpd/bgpd.c
++++ b/bgpd/bgpd.c
+@@ -3689,19 +3689,25 @@ int bgp_delete(struct bgp *bgp)
+ 	safi_t safi;
+ 	int i;
+ 	struct bgp_dest *dest = NULL;
++	struct bgp_dest *dest_next = NULL;
++	struct bgp_table *dest_table = NULL;
+ 	struct graceful_restart_info *gr_info;
+-	uint32_t ann_count = zebra_announce_count(&bm->zebra_announce_head);
+ 
+ 	assert(bgp);
+ 
+-	while (ann_count) {
+-		dest = zebra_announce_pop(&bm->zebra_announce_head);
+-		ann_count--;
+-		if (dest->za_bgp_pi->peer->bgp == bgp) {
++	/*
++	 * Iterate the pending dest list and remove all the dest pertaininig to
++	 * the bgp under delete.
++	 */
++	for (dest = zebra_announce_first(&bm->zebra_announce_head); dest;
++	     dest = dest_next) {
++		dest_next = zebra_announce_next(&bm->zebra_announce_head, dest);
++		dest_table = bgp_dest_table(dest);
++		if (dest_table->bgp == bgp) {
+ 			bgp_path_info_unlock(dest->za_bgp_pi);
+ 			bgp_dest_unlock_node(dest);
+-		} else
+-			zebra_announce_add_tail(&bm->zebra_announce_head, dest);
++			zebra_announce_del(&bm->zebra_announce_head, dest);
++		}
+ 	}
+ 
+ 	bgp_soft_reconfig_table_task_cancel(bgp, NULL, NULL);
+-- 
+2.43.2
+
diff --git a/src/sonic-frr/patch/0049-bgpd-backpressure-Improve-debuggability.patch b/src/sonic-frr/patch/0049-bgpd-backpressure-Improve-debuggability.patch
new file mode 100644
index 000000000..e74a2a7c3
--- /dev/null
+++ b/src/sonic-frr/patch/0049-bgpd-backpressure-Improve-debuggability.patch
@@ -0,0 +1,46 @@
+From 0dd44dc0d99b69e6c1853f46dbae4a30fc4b9aed Mon Sep 17 00:00:00 2001
+From: Rajasekar Raja <rajasekarr@nvidia.com>
+Date: Wed, 10 Jul 2024 20:17:14 -0700
+Subject: [PATCH 2/2] bgpd: backpressure - Improve debuggability
+
+Improve debuggability in backpressure code.
+
+Ticket :#3980988
+
+Signed-off-by: Rajasekar Raja <rajasekarr@nvidia.com>
+
+diff --git a/bgpd/bgpd.c b/bgpd/bgpd.c
+index e16a58b443..2e1c5e555b 100644
+--- a/bgpd/bgpd.c
++++ b/bgpd/bgpd.c
+@@ -3692,6 +3692,7 @@ int bgp_delete(struct bgp *bgp)
+ 	struct bgp_dest *dest_next = NULL;
+ 	struct bgp_table *dest_table = NULL;
+ 	struct graceful_restart_info *gr_info;
++	uint32_t cnt_before, cnt_after;
+ 
+ 	assert(bgp);
+ 
+@@ -3699,6 +3700,7 @@ int bgp_delete(struct bgp *bgp)
+ 	 * Iterate the pending dest list and remove all the dest pertaininig to
+ 	 * the bgp under delete.
+ 	 */
++	cnt_before = zebra_announce_count(&bm->zebra_announce_head);
+ 	for (dest = zebra_announce_first(&bm->zebra_announce_head); dest;
+ 	     dest = dest_next) {
+ 		dest_next = zebra_announce_next(&bm->zebra_announce_head, dest);
+@@ -3710,6 +3712,11 @@ int bgp_delete(struct bgp *bgp)
+ 		}
+ 	}
+ 
++	cnt_after = zebra_announce_count(&bm->zebra_announce_head);
++	if (BGP_DEBUG(zebra, ZEBRA))
++		zlog_debug("Zebra Announce Fifo cleanup count before %u and after %u during BGP %s deletion",
++			   cnt_before, cnt_after, bgp->name_pretty);
++
+ 	bgp_soft_reconfig_table_task_cancel(bgp, NULL, NULL);
+ 
+ 	/* make sure we withdraw any exported routes */
+-- 
+2.43.2
+
diff --git a/src/sonic-frr/patch/0050-bgpd-backpressure-Avoid-use-after-free.patch b/src/sonic-frr/patch/0050-bgpd-backpressure-Avoid-use-after-free.patch
new file mode 100644
index 000000000..878d60eb5
--- /dev/null
+++ b/src/sonic-frr/patch/0050-bgpd-backpressure-Avoid-use-after-free.patch
@@ -0,0 +1,48 @@
+From df1d28fcc12d4f5541c9335115887d31e6197b80 Mon Sep 17 00:00:00 2001
+From: Rajasekar Raja <rajasekarr@nvidia.com>
+Date: Mon, 22 Jul 2024 10:13:19 -0700
+Subject: [PATCH] bgpd: backpressure - Avoid use after free
+
+Coverity complains there is a use after free (1598495 and 1598496)
+At this point, most likely dest->refcount cannot go 1 and free up
+the dest, but there might be some code path where this can happen.
+
+Fixing this with a simple order change (no harm fix).
+
+Ticket :#4001204
+
+Signed-off-by: Rajasekar Raja <rajasekarr@nvidia.com>
+
+diff --git a/bgpd/bgp_evpn.c b/bgpd/bgp_evpn.c
+index b1f8f19594..bb3cd62950 100644
+--- a/bgpd/bgp_evpn.c
++++ b/bgpd/bgp_evpn.c
+@@ -6080,9 +6080,9 @@ void bgp_evpn_free(struct bgp *bgp, struct bgpevpn *vpn)
+ 	     dest = dest_next) {
+ 		dest_next = zebra_announce_next(&bm->zebra_announce_head, dest);
+ 		if (dest->za_vpn == vpn) {
++			zebra_announce_del(&bm->zebra_announce_head, dest);
+ 			bgp_path_info_unlock(dest->za_bgp_pi);
+ 			bgp_dest_unlock_node(dest);
+-			zebra_announce_del(&bm->zebra_announce_head, dest);
+ 		}
+ 	}
+ 
+diff --git a/bgpd/bgpd.c b/bgpd/bgpd.c
+index 2e1c5e555b..342982069b 100644
+--- a/bgpd/bgpd.c
++++ b/bgpd/bgpd.c
+@@ -3706,9 +3706,9 @@ int bgp_delete(struct bgp *bgp)
+ 		dest_next = zebra_announce_next(&bm->zebra_announce_head, dest);
+ 		dest_table = bgp_dest_table(dest);
+ 		if (dest_table->bgp == bgp) {
++			zebra_announce_del(&bm->zebra_announce_head, dest);
+ 			bgp_path_info_unlock(dest->za_bgp_pi);
+ 			bgp_dest_unlock_node(dest);
+-			zebra_announce_del(&bm->zebra_announce_head, dest);
+ 		}
+ 	}
+ 
+-- 
+2.43.2
+
diff --git a/src/sonic-frr/patch/0051-bgpd-backpressure-fix-ret-value-evpn_route_select_in.patch b/src/sonic-frr/patch/0051-bgpd-backpressure-fix-ret-value-evpn_route_select_in.patch
new file mode 100644
index 000000000..53d12a6a8
--- /dev/null
+++ b/src/sonic-frr/patch/0051-bgpd-backpressure-fix-ret-value-evpn_route_select_in.patch
@@ -0,0 +1,73 @@
+From cc56963da0e8f0ca606bc9b932e9180ad059f8c5 Mon Sep 17 00:00:00 2001
+From: Rajasekar Raja <rajasekarr@nvidia.com>
+Date: Tue, 16 Jul 2024 23:34:15 -0700
+Subject: [PATCH 1/2] bgpd: backpressure - fix ret value
+ evpn_route_select_install
+
+The return value of evpn_route_select_install is ignored in all cases
+except during vni route table install/uninstall and based on the
+returned value, an error is logged. Fixing this.
+
+Ticket :#3992392
+
+Signed-off-by: Rajasekar Raja <rajasekarr@nvidia.com>
+
+diff --git a/bgpd/bgp_evpn.c b/bgpd/bgp_evpn.c
+index bb3cd62950..34128e7c19 100644
+--- a/bgpd/bgp_evpn.c
++++ b/bgpd/bgp_evpn.c
+@@ -1433,11 +1433,12 @@ int evpn_route_select_install(struct bgp *bgp, struct bgpevpn *vpn,
+ 	    && !bgp_addpath_is_addpath_used(&bgp->tx_addpath, afi, safi)) {
+ 		if (bgp_zebra_has_route_changed(old_select)) {
+ 			if (CHECK_FLAG(bgp->flags, BGP_FLAG_DELETE_IN_PROGRESS))
+-				evpn_zebra_install(
+-					bgp, vpn,
+-					(const struct prefix_evpn *)
+-						bgp_dest_get_prefix(dest),
+-					old_select);
++				ret = evpn_zebra_install(bgp, vpn,
++							 (const struct prefix_evpn
++								  *)
++								 bgp_dest_get_prefix(
++									 dest),
++							 old_select);
+ 			else
+ 				bgp_zebra_route_install(dest, old_select, bgp,
+ 							true, vpn, false);
+@@ -1475,10 +1476,11 @@ int evpn_route_select_install(struct bgp *bgp, struct bgpevpn *vpn,
+ 	    && (new_select->sub_type == BGP_ROUTE_IMPORTED ||
+ 			bgp_evpn_attr_is_sync(new_select->attr))) {
+ 		if (CHECK_FLAG(bgp->flags, BGP_FLAG_DELETE_IN_PROGRESS))
+-			evpn_zebra_install(bgp, vpn,
+-					   (const struct prefix_evpn *)
+-						   bgp_dest_get_prefix(dest),
+-					   new_select);
++			ret = evpn_zebra_install(bgp, vpn,
++						 (const struct prefix_evpn *)
++							 bgp_dest_get_prefix(
++								 dest),
++						 new_select);
+ 		else
+ 			bgp_zebra_route_install(dest, new_select, bgp, true,
+ 						vpn, false);
+@@ -1503,11 +1505,12 @@ int evpn_route_select_install(struct bgp *bgp, struct bgpevpn *vpn,
+ 			if (CHECK_FLAG(bgp->flags,
+ 				       BGP_FLAG_DELETE_IN_PROGRESS) ||
+ 			    CHECK_FLAG(bgp->flags, BGP_FLAG_VNI_DOWN))
+-				evpn_zebra_uninstall(
+-					bgp, vpn,
+-					(const struct prefix_evpn *)
+-						bgp_dest_get_prefix(dest),
+-					old_select, false);
++				ret = evpn_zebra_uninstall(bgp, vpn,
++							   (const struct prefix_evpn
++								    *)
++								   bgp_dest_get_prefix(
++									   dest),
++							   old_select, false);
+ 			else
+ 				bgp_zebra_route_install(dest, old_select, bgp,
+ 							false, vpn, false);
+-- 
+2.43.2
+
diff --git a/src/sonic-frr/patch/0052-bgpd-backpressure-log-error-for-evpn-when-route-inst.patch b/src/sonic-frr/patch/0052-bgpd-backpressure-log-error-for-evpn-when-route-inst.patch
new file mode 100644
index 000000000..62ba8a3b7
--- /dev/null
+++ b/src/sonic-frr/patch/0052-bgpd-backpressure-log-error-for-evpn-when-route-inst.patch
@@ -0,0 +1,61 @@
+From dd591de04b0e25c74a9936c854bb6dbe7839bd39 Mon Sep 17 00:00:00 2001
+From: Rajasekar Raja <rajasekarr@nvidia.com>
+Date: Thu, 18 Jul 2024 22:23:23 -0700
+Subject: [PATCH 2/2] bgpd: backpressure - log error for evpn when route
+ install to zebra fails.
+
+log error for evpn in case route install to zebra fails.
+
+Ticket :#3992392
+
+Signed-off-by: Rajasekar Raja <rajasekarr@nvidia.com>
+
+diff --git a/bgpd/bgp_zebra.c b/bgpd/bgp_zebra.c
+index 278e228d66..038d328a60 100644
+--- a/bgpd/bgp_zebra.c
++++ b/bgpd/bgp_zebra.c
+@@ -1799,6 +1799,7 @@ static void bgp_handle_route_announcements_to_zebra(struct thread *e)
+ 	struct bgp_table *table = NULL;
+ 	enum zclient_send_status status = ZCLIENT_SEND_SUCCESS;
+ 	bool install;
++	const struct prefix_evpn *evp = NULL;
+ 
+ 	while (count < ZEBRA_ANNOUNCEMENTS_LIMIT) {
+ 		is_evpn = false;
+@@ -1809,10 +1810,12 @@ static void bgp_handle_route_announcements_to_zebra(struct thread *e)
+ 			break;
+ 
+ 		table = bgp_dest_table(dest);
+-		install =
+-			CHECK_FLAG(dest->flags, BGP_NODE_SCHEDULE_FOR_INSTALL);
+-		if (table->afi == AFI_L2VPN && table->safi == SAFI_EVPN)
++		install = CHECK_FLAG(dest->flags, BGP_NODE_SCHEDULE_FOR_INSTALL);
++		if (table->afi == AFI_L2VPN && table->safi == SAFI_EVPN) {
+ 			is_evpn = true;
++			evp = (const struct prefix_evpn *)bgp_dest_get_prefix(
++				dest);
++		}
+ 
+ 		if (BGP_DEBUG(zebra, ZEBRA))
+ 			zlog_debug(
+@@ -1845,6 +1848,17 @@ static void bgp_handle_route_announcements_to_zebra(struct thread *e)
+ 			UNSET_FLAG(dest->flags, BGP_NODE_SCHEDULE_FOR_DELETE);
+ 		}
+ 
++		if (is_evpn && status == ZCLIENT_SEND_FAILURE)
++			flog_err(EC_BGP_EVPN_FAIL,
++				 "%s (%u): Failed to %s EVPN %pFX %s route in VNI %u",
++				 vrf_id_to_name(table->bgp->vrf_id),
++				 table->bgp->vrf_id,
++				 install ? "install" : "uninstall", evp,
++				 evp->prefix.route_type == BGP_EVPN_MAC_IP_ROUTE
++					 ? "MACIP"
++					 : "IMET",
++				 dest->za_vpn->vni);
++
+ 		bgp_path_info_unlock(dest->za_bgp_pi);
+ 		dest->za_bgp_pi = NULL;
+ 		dest->za_vpn = NULL;
+-- 
+2.43.2
+
diff --git a/src/sonic-frr/patch/series b/src/sonic-frr/patch/series
index 445bc9dd9..7f1d79d81 100644
--- a/src/sonic-frr/patch/series
+++ b/src/sonic-frr/patch/series
@@ -27,3 +27,26 @@
 0027-lib-Do-not-convert-EVPN-prefixes-into-IPv4-IPv6-if-n.patch
 0028-zebra-fix-parse-attr-problems-for-encap.patch
 0029-zebra-nhg-fix-on-intf-up.patch
+0030-zebra-backpressure-Zebra-push-back-on-Buffer-Stream-.patch
+0031-bgpd-backpressure-Add-a-typesafe-list-for-Zebra-Anno.patch
+0032-bgpd-fix-flushing-ipv6-flowspec-entries-when-peering.patch
+0033-bgpd-backpressure-cleanup-bgp_zebra_XX-func-args.patch
+0034-gpd-backpressure-Handle-BGP-Zebra-Install-evt-Creat.patch
+0035-bgpd-backpressure-Handle-BGP-Zebra-EPVN-Install-evt-.patch
+0036-zebra-backpressure-Fix-Null-ptr-access-Coverity-Issu.patch
+0037-bgpd-Increase-install-uninstall-speed-of-evpn-vpn-vn.patch
+0038-zebra-Actually-display-I-O-buffer-sizes.patch
+0039-zebra-Actually-display-I-O-buffer-sizes-part-2.patch
+0040-bgpd-backpressure-Fix-to-withdraw-evpn-type-5-routes.patch
+0041-bgpd-backpressure-Fix-to-avoid-CPU-hog.patch
+0042-zebra-Use-built-in-data-structure-counter.patch
+0043-zebra-Use-the-ctx-queue-counters.patch
+0044-zebra-Modify-dplane-loop-to-allow-backpressure-to-fi.patch
+0045-zebra-Limit-queue-depth-in-dplane_fpm_nl.patch
+0046-zebra-Modify-show-zebra-dplane-providers-to-give-mor.patch
+0047-bgpd-backpressure-fix-evpn-route-sync-to-zebra.patch
+0048-bgpd-backpressure-fix-to-properly-remove-dest-for-bg.patch
+0049-bgpd-backpressure-Improve-debuggability.patch
+0050-bgpd-backpressure-Avoid-use-after-free.patch
+0051-bgpd-backpressure-fix-ret-value-evpn_route_select_in.patch
+0052-bgpd-backpressure-log-error-for-evpn-when-route-inst.patch

From a44d532a48a2dedc6f9918861d5ae4583f83733c Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Tue, 6 Aug 2024 19:06:00 +0800
Subject: [PATCH 0879/1115] [submodule] Update submodule sonic-swss to the
 latest HEAD automatically (#19831)

#### Why I did it
src/sonic-swss
```
* 465391d1 - (HEAD -> master, origin/master, origin/HEAD) Reduce log verbosity when the capability is not implemented (#3240) (6 hours ago) [Vivek]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-swss | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-swss b/src/sonic-swss
index 3c9d6b342..465391d18 160000
--- a/src/sonic-swss
+++ b/src/sonic-swss
@@ -1 +1 @@
-Subproject commit 3c9d6b342b539b379cf10317e181c9953f57827c
+Subproject commit 465391d1825ea3906d27a1285d2da5876f763cd7

From 8bfa0f1c9eab5c9b4697a7253b976cf0a2edf0a0 Mon Sep 17 00:00:00 2001
From: Kumaresh Perumal <kperumal@microsoft.com>
Date: Tue, 6 Aug 2024 10:04:53 -0700
Subject: [PATCH 0880/1115] [Broadcom]: Update XGS SAI version to 10.1.37.0 
 (#19830)

Update max queues in BCM SAI for TH5 in alignment with the flex counter blocks

Update XGS SAI version to 10.1.37.0

Microsoft ADO (number only): 28967795
---
 platform/broadcom/sai.mk | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/platform/broadcom/sai.mk b/platform/broadcom/sai.mk
index 4cfd2849e..477585644 100644
--- a/platform/broadcom/sai.mk
+++ b/platform/broadcom/sai.mk
@@ -1,6 +1,6 @@
-LIBSAIBCM_XGS_VERSION = 10.1.35.0
+LIBSAIBCM_XGS_VERSION = 10.1.37.0
 LIBSAIBCM_DNX_VERSION = 10.1.25.0
-LIBSAIBCM_XGS_BRANCH_NAME = SAI_10.1.0_GA
+LIBSAIBCM_XGS_BRANCH_NAME = SAI_10.1.0_GA_CS00012362288
 LIBSAIBCM_DNX_BRANCH_NAME = SAI_10.1.0_GA
 LIBSAIBCM_XGS_URL_PREFIX = "https://sonicstorage.blob.core.windows.net/public/sai/sai-broadcom/$(LIBSAIBCM_XGS_BRANCH_NAME)/$(LIBSAIBCM_XGS_VERSION)/xgs"
 LIBSAIBCM_DNX_URL_PREFIX = "https://sonicstorage.blob.core.windows.net/public/sai/sai-broadcom/$(LIBSAIBCM_DNX_BRANCH_NAME)/$(LIBSAIBCM_DNX_VERSION)/dnx"

From 9dc28587ee2df3e0f19b489d2eb335a0d4d79d14 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Wed, 7 Aug 2024 19:05:55 +0800
Subject: [PATCH 0881/1115] [submodule] Update submodule sonic-mgmt-common to
 the latest HEAD automatically (#19845)

#### Why I did it
src/sonic-mgmt-common
```
* 966adc0 - (HEAD -> master, origin/master, origin/HEAD) Fix https://github.com/sonic-net/sonic-gnmi/issues/266 (#143) (4 hours ago) [Steve Licking]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-mgmt-common | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-mgmt-common b/src/sonic-mgmt-common
index 81bf799d8..966adc0d9 160000
--- a/src/sonic-mgmt-common
+++ b/src/sonic-mgmt-common
@@ -1 +1 @@
-Subproject commit 81bf799d8e346817ccd335dcd4da6258f8edd7f1
+Subproject commit 966adc0d92f7c5e2f77636288653489bb97d9deb

From 06df23445832a8df4db4692f0e8cfcf2812798f3 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Wed, 7 Aug 2024 19:06:08 +0800
Subject: [PATCH 0882/1115] [submodule] Update submodule sonic-utilities to the
 latest HEAD automatically (#19832)

#### Why I did it
src/sonic-utilities
```
* 317e6495 - (HEAD -> master, origin/master, origin/HEAD) Fix kexec_unload failure on secure boot enabled platforms (#3439) (34 hours ago) [Vivek]
* 557d6886 - [Mellanox] Add support for Mellanox-SN4700-O32 and Mellanox-SN4700-V64 (#3450) (34 hours ago) [Andriy Yurkiv]
* 018eb737 - Fix to use IPv6 linklocal address as snmp agent address (#3215) (35 hours ago) [SuvarnaMeenakshi]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-utilities | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-utilities b/src/sonic-utilities
index f50587a1f..317e64951 160000
--- a/src/sonic-utilities
+++ b/src/sonic-utilities
@@ -1 +1 @@
-Subproject commit f50587a1ff65bb489231bfe45cec805fb32dbf00
+Subproject commit 317e649514c9b205849ffb5ea96a6a233e38290c

From 2ee63c27288265c19377704cd725fed5335223f5 Mon Sep 17 00:00:00 2001
From: Ashwin Srinivasan <93744978+assrinivasan@users.noreply.github.com>
Date: Wed, 7 Aug 2024 18:48:44 -0700
Subject: [PATCH 0883/1115] Added blkinfo module to host for use by ssdutil
 (#19362)

* Added blkinfo module to host for use by ssdutil

* Added blkinfo and psutil (as needed) to the sonic slave dockerfile
---
 files/build_templates/sonic_debian_extension.j2 | 3 +++
 sonic-slave-bookworm/Dockerfile.j2              | 1 +
 sonic-slave-bullseye/Dockerfile.j2              | 2 ++
 sonic-slave-buster/Dockerfile.j2                | 4 ++++
 4 files changed, 10 insertions(+)

diff --git a/files/build_templates/sonic_debian_extension.j2 b/files/build_templates/sonic_debian_extension.j2
index f32cd7f22..cb40986a8 100644
--- a/files/build_templates/sonic_debian_extension.j2
+++ b/files/build_templates/sonic_debian_extension.j2
@@ -132,6 +132,9 @@ sudo rm -rf $FILESYSTEM_ROOT/$REDIS_DUMP_LOAD_PY3_WHEEL_NAME
 # Install Python module for psutil
 sudo https_proxy=$https_proxy LANG=C chroot $FILESYSTEM_ROOT pip3 install psutil
 
+# Install Python module for blkinfo
+sudo https_proxy=$https_proxy LANG=C chroot $FILESYSTEM_ROOT pip3 install blkinfo
+
 # Install Python module for ipaddr
 sudo https_proxy=$https_proxy LANG=C chroot $FILESYSTEM_ROOT pip3 install ipaddr
 
diff --git a/sonic-slave-bookworm/Dockerfile.j2 b/sonic-slave-bookworm/Dockerfile.j2
index a254d3fab..832580e53 100644
--- a/sonic-slave-bookworm/Dockerfile.j2
+++ b/sonic-slave-bookworm/Dockerfile.j2
@@ -565,6 +565,7 @@ RUN pip3 uninstall -y enum34
 # For sonic-platform-common testing
 RUN pip3 install redis
 RUN pip3 install psutil
+RUN pip3 install blkinfo
 
 # For sonic-swss-common testing
 RUN pip3 install Pympler==1.0
diff --git a/sonic-slave-bullseye/Dockerfile.j2 b/sonic-slave-bullseye/Dockerfile.j2
index ea3cd41ef..8de9e586c 100644
--- a/sonic-slave-bullseye/Dockerfile.j2
+++ b/sonic-slave-bullseye/Dockerfile.j2
@@ -587,6 +587,8 @@ RUN pip3 install "lxml==4.9.1"
 
 # For sonic-platform-common testing
 RUN pip3 install redis
+RUN pip3 install psutil
+RUN pip3 install blkinfo
 
 # For vs image build
 RUN pip3 install pexpect==4.8.0
diff --git a/sonic-slave-buster/Dockerfile.j2 b/sonic-slave-buster/Dockerfile.j2
index 151df8243..dce6daa52 100644
--- a/sonic-slave-buster/Dockerfile.j2
+++ b/sonic-slave-buster/Dockerfile.j2
@@ -561,6 +561,10 @@ RUN pip3 install "lxml==4.9.1"
 # For sonic-platform-common testing
 RUN pip2 install redis
 RUN pip3 install redis
+RUN pip2 install psutil
+RUN pip3 install psutil
+RUN pip2 install blkinfo
+RUN pip3 install blkinfo
 
 # For vs image build
 RUN pip2 install pexpect==4.6.0

From 2ab00c7ee63dd5a9bb3cb07f9527db825bec97d1 Mon Sep 17 00:00:00 2001
From: Yaqiang Zhu <zyq1512099831@gmail.com>
Date: Fri, 9 Aug 2024 00:23:07 +0800
Subject: [PATCH 0884/1115] [dhcp_server] Fix dhcp_server mk file mistake
 (#19847)

* [dhcp_server] Fix dhcp_serverer mk file mistake

* Set include_dhcp_server to y

* Revert "Set include_dhcp_server to y"

This reverts commit 88f03562745700db32838b038dfe2f10c5e88378.
---
 rules/docker-dhcp-server.mk | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/rules/docker-dhcp-server.mk b/rules/docker-dhcp-server.mk
index 94ec1bf0a..b3960f16a 100644
--- a/rules/docker-dhcp-server.mk
+++ b/rules/docker-dhcp-server.mk
@@ -38,8 +38,8 @@ $(DOCKER_DHCP_SERVER)_CONTAINER_NAME = dhcp_server
 $(DOCKER_DHCP_SERVER)_VERSION = 1.0.0
 $(DOCKER_DHCP_SERVER)_PACKAGE_NAME = dhcp-server
 
-$(DOCKER_MACSEC)_SERVICE_REQUIRES = config-setup
-$(DOCKER_MACSEC)_SERVICE_AFTER = swss syncd
+$(DOCKER_DHCP_SERVER)_SERVICE_REQUIRES = config-setup
+$(DOCKER_DHCP_SERVER)_SERVICE_AFTER = swss syncd
 
 $(DOCKER_DHCP_SERVER)_CONTAINER_PRIVILEGED = false
 $(DOCKER_DHCP_SERVER)_CONTAINER_VOLUMES += /etc/sonic:/etc/sonic:ro

From ddd5460fcc72e326676d43303f66ded9eab122c0 Mon Sep 17 00:00:00 2001
From: Saikrishna Arcot <sarcot@microsoft.com>
Date: Mon, 12 Aug 2024 12:01:37 -0700
Subject: [PATCH 0885/1115] Update OpenSSH to 9.2p1-2+deb12u3 (#19593)

* Update OpenSSH to 9.2p1-2+deb12u3

This brings in CVE/security fixes.

Signed-off-by: Saikrishna Arcot <sarcot@microsoft.com>
---
 .../build_templates/sonic_debian_extension.j2 |  2 +-
 rules/openssh.mk                              | 11 ++++----
 rules/sonic-fips.mk                           |  4 +--
 src/openssh/Makefile                          | 28 +++++++++++--------
 4 files changed, 25 insertions(+), 20 deletions(-)

diff --git a/files/build_templates/sonic_debian_extension.j2 b/files/build_templates/sonic_debian_extension.j2
index cb40986a8..55511756e 100644
--- a/files/build_templates/sonic_debian_extension.j2
+++ b/files/build_templates/sonic_debian_extension.j2
@@ -399,7 +399,7 @@ sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y in
 sudo cp $IMAGE_CONFIGS/smartmontools/smartmontools $FILESYSTEM_ROOT/etc/default/smartmontools
 
 # Install custom-built openssh sshd
-sudo dpkg --root=$FILESYSTEM_ROOT -i $debs_path/openssh-server_${OPENSSH_VERSION}_*.deb $debs_path/openssh-client_${OPENSSH_VERSION}_*.deb $debs_path/openssh-sftp-server_${OPENSSH_VERSION}_*.deb
+sudo dpkg --root=$FILESYSTEM_ROOT -i $debs_path/openssh-server_${OPENSSH_VERSION_FULL}_*.deb $debs_path/openssh-client_${OPENSSH_VERSION_FULL}_*.deb $debs_path/openssh-sftp-server_${OPENSSH_VERSION_FULL}_*.deb
 
 {% if sonic_asic_platform == 'broadcom' %}
 # Install custom-built flashrom
diff --git a/rules/openssh.mk b/rules/openssh.mk
index 98dda081e..87bc2ee5c 100644
--- a/rules/openssh.mk
+++ b/rules/openssh.mk
@@ -1,18 +1,19 @@
 # openssh package
 
-OPENSSH_VERSION = 9.2p1-2+deb12u1
+OPENSSH_VERSION := 9.2p1
+OPENSSH_VERSION_FULL := $(OPENSSH_VERSION)-2+deb12u3
 
-export OPENSSH_VERSION
+export OPENSSH_VERSION OPENSSH_VERSION_FULL
 
-OPENSSH_SERVER = openssh-server_$(OPENSSH_VERSION)_$(CONFIGURED_ARCH).deb
+OPENSSH_SERVER = openssh-server_$(OPENSSH_VERSION_FULL)_$(CONFIGURED_ARCH).deb
 $(OPENSSH_SERVER)_SRC_PATH = $(SRC_PATH)/openssh
 $(OPENSSH_SERVER)_DEPENDS +=  $(LIBNL3_DEV) $(LIBNL_ROUTE3_DEV)
 SONIC_MAKE_DEBS += $(OPENSSH_SERVER)
 
-OPENSSH_CLIENT = openssh-client_$(OPENSSH_VERSION)_$(CONFIGURED_ARCH).deb
+OPENSSH_CLIENT = openssh-client_$(OPENSSH_VERSION_FULL)_$(CONFIGURED_ARCH).deb
 $(eval $(call add_derived_package,$(OPENSSH_SERVER),$(OPENSSH_CLIENT)))
 
-OPENSSH_SFTP_SERVER = openssh-sftp-server_$(OPENSSH_VERSION)_$(CONFIGURED_ARCH).deb
+OPENSSH_SFTP_SERVER = openssh-sftp-server_$(OPENSSH_VERSION_FULL)_$(CONFIGURED_ARCH).deb
 $(eval $(call add_derived_package,$(OPENSSH_SERVER),$(OPENSSH_SFTP_SERVER)))
 
 # The .c, .cpp, .h & .hpp files under src/{$DBG_SRC_ARCHIVE list}
diff --git a/rules/sonic-fips.mk b/rules/sonic-fips.mk
index 524da2c61..5ab8f1a64 100644
--- a/rules/sonic-fips.mk
+++ b/rules/sonic-fips.mk
@@ -1,9 +1,9 @@
 # fips packages
 
 ifeq ($(BLDENV), bookworm)
-FIPS_VERSION = 1.4.3-preview
+FIPS_VERSION = 1.4.3-1
 FIPS_OPENSSL_VERSION = 3.0.11-1~deb12u2+fips
-FIPS_OPENSSH_VERSION = 9.2p1-2+deb12u2+fips
+FIPS_OPENSSH_VERSION = 9.2p1-2+deb12u3+fips
 FIPS_PYTHON_MAIN_VERSION = 3.11
 FIPS_PYTHON_VERSION = 3.11.2-6+fips
 FIPS_GOLANG_MAIN_VERSION = 1.19
diff --git a/src/openssh/Makefile b/src/openssh/Makefile
index c52a86baf..8ecea0228 100644
--- a/src/openssh/Makefile
+++ b/src/openssh/Makefile
@@ -2,21 +2,25 @@
 SHELL = /bin/bash
 .SHELLFLAGS += -e
 
-MAIN_TARGET = openssh-server_$(OPENSSH_VERSION)_$(CONFIGURED_ARCH).deb
-DERIVED_TARGETS = openssh-server-dbgsym_$(OPENSSH_VERSION)_$(CONFIGURED_ARCH).deb \
-				  openssh-client_$(OPENSSH_VERSION)_$(CONFIGURED_ARCH).deb \
-				  openssh-client-dbgsym_$(OPENSSH_VERSION)_$(CONFIGURED_ARCH).deb \
-				  openssh-sftp-server_$(OPENSSH_VERSION)_$(CONFIGURED_ARCH).deb \
-				  openssh-sftp-server-dbgsym_$(OPENSSH_VERSION)_$(CONFIGURED_ARCH).deb
+MAIN_TARGET = openssh-server_$(OPENSSH_VERSION_FULL)_$(CONFIGURED_ARCH).deb
+DERIVED_TARGETS = openssh-server-dbgsym_$(OPENSSH_VERSION_FULL)_$(CONFIGURED_ARCH).deb \
+				  openssh-client_$(OPENSSH_VERSION_FULL)_$(CONFIGURED_ARCH).deb \
+				  openssh-client-dbgsym_$(OPENSSH_VERSION_FULL)_$(CONFIGURED_ARCH).deb \
+				  openssh-sftp-server_$(OPENSSH_VERSION_FULL)_$(CONFIGURED_ARCH).deb \
+				  openssh-sftp-server-dbgsym_$(OPENSSH_VERSION_FULL)_$(CONFIGURED_ARCH).deb
 
 $(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% :
-	# Obtain openssh: https://salsa.debian.org/ssh-team/openssh/-/tree/debian/1%258.4p1-5
-	rm -rf ./openssh-server
-	git clone https://salsa.debian.org/ssh-team/openssh.git openssh-server
-	pushd ./openssh-server
+	# Remove any stale files
+	rm -rf ./openssh-$(OPENSSH_VERSION)
 
-	# Check out tag: debian/1%8.4p1-5
-	git checkout -b openssh-src -f debian/1\%$(OPENSSH_VERSION)
+	# Get openssh release, debian files
+	dget https://security.debian.org/pool/updates/main/o/openssh/openssh_$(OPENSSH_VERSION_FULL).dsc
+	pushd ./openssh-$(OPENSSH_VERSION)
+
+	# Create a git repository here for stg to apply patches
+	git init
+	git add -f *
+	git commit -qm "initial commit"
 
 	# Apply patch series
 	stg init

From f728ab2caa66d0ecf6bcff3605949c8da1fed2c9 Mon Sep 17 00:00:00 2001
From: Saikrishna Arcot <sarcot@microsoft.com>
Date: Mon, 12 Aug 2024 12:03:13 -0700
Subject: [PATCH 0886/1115] Pin version of sflowtool used for the mixed PTF
 container (#19827)

* Pin version of sflowtool used for the mixed PTF container

Newer versions of sflowtool require autoconf 2.71, which is not
available in Buster.

For the py3-only version of the PTF container, this is currently based
on Bullseye, which should be fine.

Signed-off-by: Saikrishna Arcot <sarcot@microsoft.com>

* Remove code to build autoconf, and use 6.04 for py3 only PTF as well

Signed-off-by: Saikrishna Arcot <sarcot@microsoft.com>

* Re-add autoconf to list of packages to install

Signed-off-by: Saikrishna Arcot <sarcot@microsoft.com>

---------

Signed-off-by: Saikrishna Arcot <sarcot@microsoft.com>
---
 dockers/docker-ptf/Dockerfile.j2 | 18 ++----------------
 1 file changed, 2 insertions(+), 16 deletions(-)

diff --git a/dockers/docker-ptf/Dockerfile.j2 b/dockers/docker-ptf/Dockerfile.j2
index 087f49f51..45aaec8ec 100644
--- a/dockers/docker-ptf/Dockerfile.j2
+++ b/dockers/docker-ptf/Dockerfile.j2
@@ -28,6 +28,7 @@ RUN apt-get update          \
     && apt-get upgrade -y   \
     && apt-get dist-upgrade -y  \
     && apt-get install -y   \
+        autoconf            \
         openssh-server      \
         vim                 \
         telnet              \
@@ -96,22 +97,6 @@ RUN update-alternatives --install /usr/bin/python python /usr/bin/python3 1 \
     && update-alternatives --install /usr/bin/pygettext pygettext /usr/bin/pygettext3 1
 {% endif %}
 
-# sflow requires autoconf 2.71; This step builds autoconf from source
-RUN apt-get update \
-    && apt-get install -y \
-        m4 \
-        texinfo \
-        help2man
-# get autoconf, build and install
-RUN git clone http://git.sv.gnu.org/r/autoconf.git \
-    && cd autoconf \
-    && ./bootstrap \
-    && ./configure \
-    && make \
-    && make install \
-    && cd .. \
-    && rm -rf autoconf
-
 # Install all python modules from pypi. python-scapy is exception, ptf debian package requires python-scapy
 # TODO: Clean up this step
 RUN rm -rf /debs \
@@ -137,6 +122,7 @@ RUN rm -rf /debs \
 {% endif %}
     && git clone https://github.com/sflow/sflowtool \
     && cd sflowtool \
+    && git checkout v6.04 \
     && ./boot.sh \
     && ./configure \
     && make \

From 0efc28de127024c015400bbed2e2d9a507d175e5 Mon Sep 17 00:00:00 2001
From: Saikrishna Arcot <sarcot@microsoft.com>
Date: Mon, 12 Aug 2024 12:03:51 -0700
Subject: [PATCH 0887/1115] Pin pip to version 24.2, and update
 disable-non-manylinux.patch (#19510)

* Update disable-non-manylinux.patch due to pip being updated to 24.1.2.

The code logic in this area has changed, resulting in patch conflicts.

Signed-off-by: Saikrishna Arcot <sarcot@microsoft.com>

* Update the pinned version for pip to explicitly point to 24.1.2

This is needed because the patch file that has been updated can only be
applied to 24.1.2. However, the version pinning for 24.0 will mean that
PR checkers and the daily build will try to continue using 24.0, and
thus fail to apply the patch.

Signed-off-by: Saikrishna Arcot <sarcot@microsoft.com>

* Revert changes to version files, and pin pip to 24.2

Signed-off-by: Saikrishna Arcot <sarcot@microsoft.com>

---------

Signed-off-by: Saikrishna Arcot <sarcot@microsoft.com>
---
 sonic-slave-bookworm/Dockerfile.j2               |  2 +-
 sonic-slave-bookworm/disable-non-manylinux.patch | 16 +++++++++++-----
 sonic-slave-bullseye/Dockerfile.j2               |  2 +-
 sonic-slave-bullseye/disable-non-manylinux.patch | 16 +++++++++++-----
 4 files changed, 24 insertions(+), 12 deletions(-)

diff --git a/sonic-slave-bookworm/Dockerfile.j2 b/sonic-slave-bookworm/Dockerfile.j2
index 832580e53..50b8591e6 100644
--- a/sonic-slave-bookworm/Dockerfile.j2
+++ b/sonic-slave-bookworm/Dockerfile.j2
@@ -520,7 +520,7 @@ RUN eatmydata apt-get install -y golang-go \
  && ln -sf /usr/lib/go-1.19 /usr/local/go
 {%- endif %}
 
-RUN pip3 install --upgrade pip
+RUN pip3 install --upgrade pip==24.2
 RUN apt-get purge -y python3-pip
 
 {%- if CONFIGURED_ARCH == "armhf" %}
diff --git a/sonic-slave-bookworm/disable-non-manylinux.patch b/sonic-slave-bookworm/disable-non-manylinux.patch
index 67e81c4e9..dcdb95358 100644
--- a/sonic-slave-bookworm/disable-non-manylinux.patch
+++ b/sonic-slave-bookworm/disable-non-manylinux.patch
@@ -1,10 +1,16 @@
+Disable any type of wheel besides manylinux wheels. This is to work around an issue where the architecture-specific
+wheel might be built with a newer glibc version than what is supported on the system.
+
+(This patch gets applied only on armhf.)
+
 --- a/tags.py	2022-07-12 00:07:22.710207780 +0000
 +++ b/tags.py	2022-07-12 00:07:13.185890659 +0000
-@@ -424,7 +424,6 @@
-     _, arch = linux.split("_", 1)
-     yield from _manylinux.platform_tags(linux, arch)
-     yield from _musllinux.platform_tags(arch)
--    yield linux
+@@ -498,8 +498,6 @@
+     archs = {"armv8l": ["armv8l", "armv7l"]}.get(arch, [arch])
+     yield from _manylinux.platform_tags(archs)
+     yield from _musllinux.platform_tags(archs)
+-    for arch in archs:
+-        yield f"linux_{arch}"
  
  
  def _generic_platforms() -> Iterator[str]:
diff --git a/sonic-slave-bullseye/Dockerfile.j2 b/sonic-slave-bullseye/Dockerfile.j2
index 8de9e586c..1aca2a0ba 100644
--- a/sonic-slave-bullseye/Dockerfile.j2
+++ b/sonic-slave-bullseye/Dockerfile.j2
@@ -520,7 +520,7 @@ RUN wget -O golang-go.deb 'https://sonicstorage.blob.core.windows.net/public/fip
  && rm golang-go.deb golang-src.deb
 {%- endif %}
 
-RUN pip3 install --upgrade pip
+RUN pip3 install --upgrade pip==24.2
 RUN apt-get purge -y python3-pip python3-yaml
 
 # For building Python packages
diff --git a/sonic-slave-bullseye/disable-non-manylinux.patch b/sonic-slave-bullseye/disable-non-manylinux.patch
index 67e81c4e9..dcdb95358 100644
--- a/sonic-slave-bullseye/disable-non-manylinux.patch
+++ b/sonic-slave-bullseye/disable-non-manylinux.patch
@@ -1,10 +1,16 @@
+Disable any type of wheel besides manylinux wheels. This is to work around an issue where the architecture-specific
+wheel might be built with a newer glibc version than what is supported on the system.
+
+(This patch gets applied only on armhf.)
+
 --- a/tags.py	2022-07-12 00:07:22.710207780 +0000
 +++ b/tags.py	2022-07-12 00:07:13.185890659 +0000
-@@ -424,7 +424,6 @@
-     _, arch = linux.split("_", 1)
-     yield from _manylinux.platform_tags(linux, arch)
-     yield from _musllinux.platform_tags(arch)
--    yield linux
+@@ -498,8 +498,6 @@
+     archs = {"armv8l": ["armv8l", "armv7l"]}.get(arch, [arch])
+     yield from _manylinux.platform_tags(archs)
+     yield from _musllinux.platform_tags(archs)
+-    for arch in archs:
+-        yield f"linux_{arch}"
  
  
  def _generic_platforms() -> Iterator[str]:

From bc1da06ed204cd98f7aa44cc1ed5c59fc11204df Mon Sep 17 00:00:00 2001
From: Arun LK <83708154+arunlk-dell@users.noreply.github.com>
Date: Tue, 13 Aug 2024 04:17:19 +0530
Subject: [PATCH 0888/1115] DellEMC: Z9432F platform TD4 config changes
 (#19749)

Why I did it
DellEMC Z9432F platform onboarding.

How I did it
Config changes with respect to Z9432F SAI bring up.
Also changes from swss is required for complete bring up of Z9432F platform(TD4) will be followed thru (sonic-net/sonic-swss#3244)

How to verify it
The following error message is not seen..
sonic CRIT syncd#syncd: [none] SAI_API_SWITCH:brcm_sai_create_switch:3204 setting inter-frame gap failed with error Feature unavailable (0xfffffff0).
---
 .../td4-z9432f-32x400G.config.yml             | 19 +++++++++++++++----
 1 file changed, 15 insertions(+), 4 deletions(-)

diff --git a/device/dell/x86_64-dellemc_z9432f_c3758-r0/DellEMC-Z9432f-O32/td4-z9432f-32x400G.config.yml b/device/dell/x86_64-dellemc_z9432f_c3758-r0/DellEMC-Z9432f-O32/td4-z9432f-32x400G.config.yml
index c93590a02..ad17e7e28 100644
--- a/device/dell/x86_64-dellemc_z9432f_c3758-r0/DellEMC-Z9432f-O32/td4-z9432f-32x400G.config.yml
+++ b/device/dell/x86_64-dellemc_z9432f_c3758-r0/DellEMC-Z9432f-O32/td4-z9432f-32x400G.config.yml
@@ -5,12 +5,12 @@ bcm_device:
             l2_table_default_view: 1
             pktio_mode: 1
             vlan_flooding_l2mc_num_reserved: 0
-            shared_block_mask_section: uc_mc
+            shared_block_mask_section: uc_bc
             ctr_evict_enable: 0
             uat_mode: 1
             uft_mode: 4
             sai_brcm_sonic_acl_enhancements: 1
-            sai_tunnel_support: 1
+            sai_tunnel_support: 2
             multi_network_groups: 1
             sai_field_group_auto_prioritize: 1
             sai_modify_hash_flexdigest: 1
@@ -24,7 +24,7 @@ device:
             CORE_CLK_FREQ: CLK_1350MHZ
             # PP CLOCK FREQUENCY
             PP_CLK_FREQ: CLK_1350MHZ
-            VARIANT: DNA_4_9_5_0
+            VARIANT: DNA_4_11_4_0
 ...
 ---
 device:
@@ -625,7 +625,7 @@ device:
                 NUM_LANES: 1
                 MAX_FRAME_SIZE: 9416
         SER_CONFIG:
-            SER_ENABLE: 0
+            SER_ENABLE: 1
 ...
 ---
 device:
@@ -690,6 +690,17 @@ device:
     0:
         FP_CONFIG:
             FP_ING_OPERMODE: GLOBAL_PIPE_AWARE
+        
+        TM_ING_PORT_PRI_GRP:
+            ?
+                PORT_ID: [ [1, 18], [20, 38],
+                            [40, 57], [60, 78],
+                            [80, 97], [100, 118],
+                            [120, 137], [140, 158] ]
+
+                TM_PRI_GRP_ID: [[3,4]]
+            :
+                LOSSLESS: 0
 ...
 ---
 device:

From 72b2f79c75705ccdfc73f6b2a0ab05c375eff400 Mon Sep 17 00:00:00 2001
From: Ze Gan <zegan@microsoft.com>
Date: Mon, 12 Aug 2024 20:27:25 -0700
Subject: [PATCH 0889/1115] Hotfix: bypass saimetadatatest for dash sai
 (#19882)

Why I did it
Get the following error due to switch_health_dta size changing

ASSERT TRUE FAILED(5085): sizeof(sai_switch_health_data_t) == (SAI_SWITCH_HEALTH_DATA_T_SIZE): wrong size of sai_switch_health_data_t, expected 16, got 4
Work item tracking
Microsoft ADO (number only): 29062472
How I did it
This PR is just an adhoc fix by disabling saimetadatatest. We should fix the scripts under OCP/SAI/meta

How to verify it
Check Azp
---
 src/dash-sai/Makefile | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/dash-sai/Makefile b/src/dash-sai/Makefile
index 2a188c49f..927f799f9 100644
--- a/src/dash-sai/Makefile
+++ b/src/dash-sai/Makefile
@@ -37,6 +37,7 @@ $(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% :
 	sed -i.bak '/checkenumlock.sh/d' SAI/SAI/meta/Makefile
 	sed -i.bak '/checkancestry.sh/d' SAI/SAI/meta/Makefile
 	sed -i.bak '/checkstructs.sh/d' SAI/SAI/meta/Makefile
+	sed -i.bak "/.\/saimetadatatest >\/dev\/null/d" SAI/SAI/meta/Makefile
 	pushd SAI/SAI/meta/
 	CFLAGS=-Wdangling-pointer=1 make all libsaimetadata.so
 	popd

From b535f285671ee625d057e32b02a686b850d45c18 Mon Sep 17 00:00:00 2001
From: Junchao-Mellanox <57339448+Junchao-Mellanox@users.noreply.github.com>
Date: Wed, 14 Aug 2024 06:51:35 +0800
Subject: [PATCH 0890/1115] Support notice level log (#19232)

#### Why I did it

SysLogger does not support NOTICE level log. The PR is to support it.

#### How I did it

Add a new log level NOTICE to python logging package.

#### How to verify it

Manual test

```
Jun  3 03:09:44.353536 sonic NOTICE test[364076]: This is a notice
```
---
 .../sonic_py_common/syslogger.py              | 11 ++++--
 src/sonic-py-common/tests/test_syslogger.py   | 34 +++++++++++++++++++
 2 files changed, 43 insertions(+), 2 deletions(-)
 create mode 100644 src/sonic-py-common/tests/test_syslogger.py

diff --git a/src/sonic-py-common/sonic_py_common/syslogger.py b/src/sonic-py-common/sonic_py_common/syslogger.py
index b3c8f7265..c45f0cde8 100644
--- a/src/sonic-py-common/sonic_py_common/syslogger.py
+++ b/src/sonic-py-common/sonic_py_common/syslogger.py
@@ -4,13 +4,19 @@
 import socket
 import sys
 
+# customize python logging to support notice logger
+logging.NOTICE = logging.INFO + 1
+logging.addLevelName(logging.NOTICE, "NOTICE")
+SysLogHandler.priority_map['NOTICE'] = 'notice'
+
+
 class SysLogger:
     """
     SysLogger class for Python applications using SysLogHandler
     """
 
     DEFAULT_LOG_FACILITY = SysLogHandler.LOG_USER
-    DEFAULT_LOG_LEVEL = SysLogHandler.LOG_NOTICE
+    DEFAULT_LOG_LEVEL = logging.NOTICE
 
     def __init__(self, log_identifier=None, log_facility=DEFAULT_LOG_FACILITY, log_level=DEFAULT_LOG_LEVEL):
         if log_identifier is None:
@@ -53,10 +59,11 @@ def log_warning(self, msg, also_print_to_console=False):
         self.log(logging.WARNING, msg, also_print_to_console)
 
     def log_notice(self, msg, also_print_to_console=False):
-        self.log(logging.INFO, msg, also_print_to_console)
+        self.log(logging.NOTICE, msg, also_print_to_console)
 
     def log_info(self, msg, also_print_to_console=False):
         self.log(logging.INFO, msg, also_print_to_console)
 
     def log_debug(self, msg, also_print_to_console=False):
         self.log(logging.DEBUG, msg, also_print_to_console)
+    
\ No newline at end of file
diff --git a/src/sonic-py-common/tests/test_syslogger.py b/src/sonic-py-common/tests/test_syslogger.py
new file mode 100644
index 000000000..359120163
--- /dev/null
+++ b/src/sonic-py-common/tests/test_syslogger.py
@@ -0,0 +1,34 @@
+import logging
+import os
+import sys
+from io import StringIO
+from contextlib import redirect_stdout
+
+if sys.version_info.major == 3:
+    from unittest import mock
+else:
+    import mock
+
+modules_path = os.path.dirname(os.path.dirname(os.path.abspath(__file__)))
+sys.path.insert(0, os.path.join(modules_path, 'sonic_py_common'))
+from sonic_py_common import syslogger
+
+
+class TestSysLogger:
+    def test_notice_log(self, capsys):
+        """NOTICE is a customize log level, added a test case here to make sure it works in future
+        """
+        log = syslogger.SysLogger()
+        # remove syslog handler, unit test environment has no rsyslogd
+        for handler in log.logger.handlers[:]:
+            log.logger.removeHandler(handler)
+        
+        # put a stdout log handler 
+        handler = logging.StreamHandler(sys.stdout)
+        formatter = logging.Formatter('%(name)s[%(process)d] - %(levelname)s : %(message)s')
+        handler.setFormatter(formatter)
+        log.logger.addHandler(handler)
+        
+        log.log_notice('this is a message')
+        captured = capsys.readouterr() 
+        assert 'NOTICE' in captured.out

From 3ab2b00c5f49bc86e2b9e4fdfb46d270cb5269e6 Mon Sep 17 00:00:00 2001
From: Junchao-Mellanox <57339448+Junchao-Mellanox@users.noreply.github.com>
Date: Wed, 14 Aug 2024 06:52:12 +0800
Subject: [PATCH 0891/1115] Install tool xxd to platform monitor container
 (#19671)

#### Why I did it

After upgrading from bullseye to bookworm, pmon container no longer default installs tool xxd. The tool is used in mellanox simx platforms. The PR is to install xxd tool in the docker build file.

#### How I did it

Install xxd in platform monitor docker file.

#### How to verify it

Manual test
---
 dockers/docker-platform-monitor/Dockerfile.j2 | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/dockers/docker-platform-monitor/Dockerfile.j2 b/dockers/docker-platform-monitor/Dockerfile.j2
index 9f44ca004..1bd0b1b1c 100755
--- a/dockers/docker-platform-monitor/Dockerfile.j2
+++ b/dockers/docker-platform-monitor/Dockerfile.j2
@@ -27,7 +27,8 @@ RUN apt-get update &&   \
         iputils-ping    \
         pciutils        \
         nvme-cli        \
-        ethtool
+        ethtool         \
+        xxd
 
 # smartmontools version should match the installed smartmontools in sonic_debian_extension build template
 RUN apt-get install -y -t bookworm-backports \

From 3a143adda210e015a47e2374d812355f6b8bcc3f Mon Sep 17 00:00:00 2001
From: Oleksandr Ivantsiv <oivantsiv@nvidia.com>
Date: Tue, 13 Aug 2024 15:53:02 -0700
Subject: [PATCH 0892/1115] [Static DNS] Optimize DNS configuration update
 during interface-config service restart (#19583)

#### Why I did it
The `resolvconfig` service updates the DNS configuration in the host OS and each running Docker container when a configuration change is detected. The DNS configuration update during the shutdown of the management interface is redundant, as the management interface is going down temporarily and, when it is back online, the DNS configuration will remain the same. The update of the DNS configuration adds a couple of seconds (depending on the CPU) to the interface-config service restart time when the management interface uses a dynamic IP address. This can affect the fast boot. To optimize the flow and execute the service restart faster, the update should be skipped.

#### How I did it
Do not run DNS configuration update during the shutdown of the management interface.

#### How to verify it
Measure the execution time of the `service interfaces-config restart` command on the device with the static IP address configuration on the management interface and compare it to the execution time of the same command with the dynamic IP address. The difference should be insignificant.
---
 .../interfaces/interfaces-config.sh           | 21 +++++++++++++++++++
 .../resolv-config/update-containers           |  7 ++++++-
 2 files changed, 27 insertions(+), 1 deletion(-)

diff --git a/files/image_config/interfaces/interfaces-config.sh b/files/image_config/interfaces/interfaces-config.sh
index cb2faea91..669d12849 100755
--- a/files/image_config/interfaces/interfaces-config.sh
+++ b/files/image_config/interfaces/interfaces-config.sh
@@ -1,4 +1,5 @@
 #!/bin/bash
+resolvconf_updates=true
 
 function wait_networking_service_done() {
     local -i _WDOG_CNT="1"
@@ -23,6 +24,24 @@ function wait_networking_service_done() {
     systemctl kill networking 2>&1
 }
 
+function resolvconf_updates_disable() {
+    resolvconf --updates-are-enabled
+    if [[ $? -ne 0 ]]; then
+        resolvconf_updates=false
+    fi
+    resolvconf --disable-updates
+}
+
+function resolvconf_updates_restore() {
+    if [[ $resolvconf_updates == true ]]; then
+        resolvconf --enable-updates
+    fi
+}
+
+# Do not run DNS configuration update during the shutdowning of the management interface. 
+# This operation is redundant as there will be an update after the start of the interface.
+resolvconf_updates_disable
+
 if [[ $(ifquery --running eth0) ]]; then
     wait_networking_service_done
     ifdown --force eth0
@@ -61,6 +80,8 @@ for intf_pid in $(ls -1 /var/run/dhclient*.Ethernet*.pid 2> /dev/null); do
 done
 
 /usr/bin/resolv-config.sh cleanup
+# Restore DNS configuration update to the previous state.
+resolvconf_updates_restore
 
 # Read sysctl conf files again
 sysctl -p /etc/sysctl.d/90-dhcp6-systcl.conf
diff --git a/files/image_config/resolv-config/update-containers b/files/image_config/resolv-config/update-containers
index 47d8328a8..891fd2ea7 100755
--- a/files/image_config/resolv-config/update-containers
+++ b/files/image_config/resolv-config/update-containers
@@ -1,6 +1,11 @@
 #!/bin/bash
 
-for container in $(docker ps -a --format=" {{ .ID }}"); do
+networking_status=$(systemctl is-active networking.service 2>/dev/null)
+if [[ $networking_status != "active" ]]; then
+    exit 0
+fi
+
+for container in $(docker ps -q); do
     docker cp -L /etc/resolv.conf ${container}:/_resolv.conf
     docker exec -t ${container} bash -c "cat /_resolv.conf > /etc/resolv.conf"
     docker exec -t ${container} bash -c "rm /_resolv.conf"

From 6cbdca3209f8bb69db41bb3a171e592a0f268532 Mon Sep 17 00:00:00 2001
From: Lawrence Lee <lawlee@microsoft.com>
Date: Tue, 13 Aug 2024 22:12:41 -0700
Subject: [PATCH 0893/1115] [submodule][master] Update sonic-swss and
 sonic-dash-api submodules (#19900)

Why I did it
The latest swss and dash-api commits are dependent on each other to build properly, if updated separately they won't build.

sonic-swss new commits:

* 29cea04a - (HEAD -> master, origin/master, origin/HEAD) [DASH] Remove deprecated 'action_type' refs (#3257) (3 hours ago) [Lawrence Lee]
sonic-dash-api new commits:

* dbb2d0f - (HEAD -> master, origin/master, origin/HEAD) Update for SAI API changes (3 days ago) [Lawrence Lee]
* 7cd1105 - deprecate pl_sip_encoding (6 days ago) [Lawrence Lee]
* 0df30ee - Merge branch 'master' of github.com:sonic-net/sonic-dash-api into route-group (6 days ago) [Lawrence Lee]
* 2721493 - deprecate privatelinknsg routing type (6 days ago) [Lawrence Lee]
* 3260f6a - update unit tests (6 days ago) [Lawrence Lee]
* 95fa234 - avoid breaking change (6 days ago) [Lawrence Lee]
* ab46204 - EOF newline (6 days ago) [Lawrence Lee]
* 2f58861 - add icmp redirection (6 days ago) [Lawrence Lee]
* 6e9ad22 - non-breaking route metering update (6 days ago) [Lawrence Lee]
* 722b6c2 - Rename action_type to routing type (6 days ago) [Lawrence Lee]
* 76ab87a - add newline to EOF (6 days ago) [Lawrence Lee]
* 747425a - Keep pl_sip_encoding (6 days ago) [Lawrence Lee]
*   597c4b8 - Merge branch 'route-group' of github.com:theasianpianist/sonic-dash-api into route-group (4 months ago) [Lawrence Lee]
|\
| * ecec7fb - Merge branch 'master' into route-group (5 months ago) [Lawrence Lee]
* | 8b3de2d - update API to match new HLD schema (4 months ago) [Lawrence Lee]
|/
* daa54b6 - add new message types to unittest (5 months ago) [Lawrence Lee]
* 16ca9f1 - add PA validation table (5 months ago) [Lawrence Lee]
* 8f7aaef - add route group table (5 months ago) [Lawrence Lee]
Work item tracking
Microsoft ADO (number only):
How I did it
How to verify it
---
 src/sonic-dash-api | 2 +-
 src/sonic-swss     | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/sonic-dash-api b/src/sonic-dash-api
index 5809048ab..dbb2d0fee 160000
--- a/src/sonic-dash-api
+++ b/src/sonic-dash-api
@@ -1 +1 @@
-Subproject commit 5809048abbc52ce1762f3ed29eb77483051176dd
+Subproject commit dbb2d0fee2fcb5cb78bd7c9b0686dc0f8e1db210
diff --git a/src/sonic-swss b/src/sonic-swss
index 465391d18..29cea04a0 160000
--- a/src/sonic-swss
+++ b/src/sonic-swss
@@ -1 +1 @@
-Subproject commit 465391d1825ea3906d27a1285d2da5876f763cd7
+Subproject commit 29cea04a0b98cc440fd5730c758a9b73ac95362c

From 960e27689145c56e96cc99bf8a60fe22398237b7 Mon Sep 17 00:00:00 2001
From: bingwang-ms <66248323+bingwang-ms@users.noreply.github.com>
Date: Tue, 13 Aug 2024 22:21:44 -0700
Subject: [PATCH 0894/1115] Revert "[arista]: Always set sai_tunnel_support on
 Arista-7260cx3 (#16097)" (#19888)

This reverts commit d50ae1fd09c9e1f2f4b736c4e947c1d8e08ac188.
---
 .../x86_64-arista_7260cx3_64/Arista-7260CX3-C64/config.bcm.j2 | 4 ++--
 .../Arista-7260CX3-D108C10/config.bcm.j2                      | 4 ++--
 .../Arista-7260CX3-D108C8/config.bcm.j2                       | 4 ++--
 .../x86_64-arista_7260cx3_64/Arista-7260CX3-Q64/config.bcm.j2 | 4 ++--
 src/sonic-config-engine/tests/data/j2_template/config.bcm.j2  | 4 ++--
 .../tests/sample_output/py3/arista7260-t1.config.bcm          | 1 -
 6 files changed, 10 insertions(+), 11 deletions(-)

diff --git a/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-C64/config.bcm.j2 b/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-C64/config.bcm.j2
index ee67a684b..97040d332 100644
--- a/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-C64/config.bcm.j2
+++ b/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-C64/config.bcm.j2
@@ -14,7 +14,8 @@
 {%-         set switch_subtype = DEVICE_METADATA['localhost']['subtype'] -%}
 {%-         if 'dualtor' in switch_subtype.lower() %}
 {%-             set IPinIP_sock =
-'sai_tunnel_underlay_route_mode=1
+'sai_tunnel_support=1
+sai_tunnel_underlay_route_mode=1
 host_as_route_disable=1
 l3_ecmp_levels=2' -%}
 {%-             set map_prio = 'sai_remap_prio_on_tnl_egress=1' -%}
@@ -1048,6 +1049,5 @@ serdes_preemphasis_116=0x103706
 serdes_preemphasis_117=0x133c06
 
 {{ mmu_sock }}
-sai_tunnel_support=1
 {{ IPinIP_sock }}
 phy_an_lt_msft=1
diff --git a/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D108C10/config.bcm.j2 b/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D108C10/config.bcm.j2
index 9ba820196..019f556ed 100644
--- a/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D108C10/config.bcm.j2
+++ b/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D108C10/config.bcm.j2
@@ -6,7 +6,8 @@
 {%-     set switch_subtype = DEVICE_METADATA['localhost']['subtype'] -%}
 {%-     if 'dualtor' in switch_subtype.lower() %}
 {%-         set IPinIP_sock =
-'sai_tunnel_underlay_route_mode=1
+'sai_tunnel_support=1
+sai_tunnel_underlay_route_mode=1
 host_as_route_disable=1
 l3_ecmp_levels=2' -%}
 {%-         set map_prio = 'sai_remap_prio_on_tnl_egress=1' -%}
@@ -955,6 +956,5 @@ serdes_preemphasis_130=0x580c
 serdes_preemphasis_131=0x580c
 
 mmu_init_config="MSFT-TH2-Tier0"
-sai_tunnel_support=1
 {{ IPinIP_sock }}
 phy_an_lt_msft=1
diff --git a/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D108C8/config.bcm.j2 b/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D108C8/config.bcm.j2
index 70403df33..1efa8ef69 100644
--- a/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D108C8/config.bcm.j2
+++ b/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D108C8/config.bcm.j2
@@ -6,7 +6,8 @@
 {%-     set switch_subtype = DEVICE_METADATA['localhost']['subtype'] -%}
 {%-     if 'dualtor' in switch_subtype.lower() %}
 {%-         set IPinIP_sock =
-'sai_tunnel_underlay_route_mode=1
+'sai_tunnel_support=1
+sai_tunnel_underlay_route_mode=1
 host_as_route_disable=1
 l3_ecmp_levels=2' -%}
 {%-         set map_prio = 'sai_remap_prio_on_tnl_egress=1' -%}
@@ -959,6 +960,5 @@ serdes_preemphasis_130=0x580c
 serdes_preemphasis_131=0x580c
 
 mmu_init_config="MSFT-TH2-Tier0"
-sai_tunnel_support=1
 {{ IPinIP_sock }}
 phy_an_lt_msft=1
diff --git a/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-Q64/config.bcm.j2 b/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-Q64/config.bcm.j2
index 464796bf4..de7cac154 100644
--- a/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-Q64/config.bcm.j2
+++ b/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-Q64/config.bcm.j2
@@ -14,7 +14,8 @@
 {%-         set switch_subtype = DEVICE_METADATA['localhost']['subtype'] -%}
 {%-         if 'dualtor' in switch_subtype.lower() %}
 {%-             set IPinIP_sock =
-'sai_tunnel_underlay_route_mode=1
+'sai_tunnel_support=1
+sai_tunnel_underlay_route_mode=1
 host_as_route_disable=1
 l3_ecmp_levels=2' -%}
 {%-             set map_prio = 'sai_remap_prio_on_tnl_egress=1' -%}
@@ -1047,6 +1048,5 @@ serdes_preemphasis_116=0x105004
 serdes_preemphasis_117=0x105004
 
 {{ mmu_sock }}
-sai_tunnel_support=1
 {{ IPinIP_sock }}
 phy_an_lt_msft=1
diff --git a/src/sonic-config-engine/tests/data/j2_template/config.bcm.j2 b/src/sonic-config-engine/tests/data/j2_template/config.bcm.j2
index 8a10ddb91..61aeb0eff 100644
--- a/src/sonic-config-engine/tests/data/j2_template/config.bcm.j2
+++ b/src/sonic-config-engine/tests/data/j2_template/config.bcm.j2
@@ -14,7 +14,8 @@
 {%-         set switch_subtype = DEVICE_METADATA['localhost']['subtype'] -%}
 {%-         if 'dualtor' in switch_subtype.lower() %}
 {%-             set IPinIP_sock =
-'sai_tunnel_underlay_route_mode=1
+'sai_tunnel_support=1
+sai_tunnel_underlay_route_mode=1
 host_as_route_disable=1
 l3_ecmp_levels=2' -%}
 {%-             set map_prio = 'sai_remap_prio_on_tnl_egress=1' -%}
@@ -32,6 +33,5 @@ sai_pfc_dlr_init_capability=1' -%}
 l3_alpm_hit_skip=1
 {{ map_prio }}
 {{ mmu_sock }}
-sai_tunnel_support=1
 {{ IPinIP_sock }}
 {{ pfcwd_sock }}
diff --git a/src/sonic-config-engine/tests/sample_output/py3/arista7260-t1.config.bcm b/src/sonic-config-engine/tests/sample_output/py3/arista7260-t1.config.bcm
index c3323f545..a76c2173f 100644
--- a/src/sonic-config-engine/tests/sample_output/py3/arista7260-t1.config.bcm
+++ b/src/sonic-config-engine/tests/sample_output/py3/arista7260-t1.config.bcm
@@ -2,7 +2,6 @@
 l3_alpm_hit_skip=1
 
 mmu_init_config="MSFT-TH2-Tier1"
-sai_tunnel_support=1
 
 hybrid_pfc_deadlock_enable=1
 pfc_deadlock_seq_control=1

From 3b27e1ca47b190d24d21a172434bca68fe7c9d1f Mon Sep 17 00:00:00 2001
From: zitingguo-ms <zitingguo@microsoft.com>
Date: Wed, 14 Aug 2024 15:37:49 +0800
Subject: [PATCH 0895/1115] change xgs SAI branch to SAI_10.1.0_GA (#19858)

Why I did it
Upgrade xgs SAI version to 10.1.37.0 with official branch.

10.1.37.0: [CS00012362288][TH5] SAI Queue counters are not reported for all the queues
Work item tracking
Microsoft ADO (number only):
How I did it
Change back xgs SAI branch to SAI_10.1.0_GA.

How to verify it
Run SAI release validation pipeline: https://dev.azure.com/mssonic/internal/_build/results?buildId=613625&view=results
---
 platform/broadcom/sai.mk | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/platform/broadcom/sai.mk b/platform/broadcom/sai.mk
index 477585644..86be717e6 100644
--- a/platform/broadcom/sai.mk
+++ b/platform/broadcom/sai.mk
@@ -1,6 +1,6 @@
 LIBSAIBCM_XGS_VERSION = 10.1.37.0
 LIBSAIBCM_DNX_VERSION = 10.1.25.0
-LIBSAIBCM_XGS_BRANCH_NAME = SAI_10.1.0_GA_CS00012362288
+LIBSAIBCM_XGS_BRANCH_NAME = SAI_10.1.0_GA
 LIBSAIBCM_DNX_BRANCH_NAME = SAI_10.1.0_GA
 LIBSAIBCM_XGS_URL_PREFIX = "https://sonicstorage.blob.core.windows.net/public/sai/sai-broadcom/$(LIBSAIBCM_XGS_BRANCH_NAME)/$(LIBSAIBCM_XGS_VERSION)/xgs"
 LIBSAIBCM_DNX_URL_PREFIX = "https://sonicstorage.blob.core.windows.net/public/sai/sai-broadcom/$(LIBSAIBCM_DNX_BRANCH_NAME)/$(LIBSAIBCM_DNX_VERSION)/dnx"

From 08f8cb6b9c60b8c6c628ff2973e2a9a5ef5032cc Mon Sep 17 00:00:00 2001
From: Liping Xu <108326363+lipxu@users.noreply.github.com>
Date: Thu, 15 Aug 2024 14:26:33 +0800
Subject: [PATCH 0896/1115] check internface status before start bgp (#19189)

Why I did it
With the following PR, make bgp start after swss.
#12381

bgp started after the swss but still ahead of the interface init.

Jun 12 04:53:59.768546 bjw-can-7050qx-1 NOTICE root: Starting swss service...
...
Jun 12 04:54:12.725418 bjw-can-7050qx-1 NOTICE admin: Starting bgp service...
...
Jun 12 04:54:43.036682 bjw-can-7050qx-1 NOTICE swss#orchagent: :- updatePortOperStatus: Port Ethernet0 oper state set from down to up
Jun 12 04:54:43.191143 bjw-can-7050qx-1 NOTICE swss#orchagent: :- updatePortOperStatus: Port Ethernet4 oper state set from down to up
Jun 12 04:54:43.207343 bjw-can-7050qx-1 NOTICE swss#orchagent: :- updatePortOperStatus: Port Ethernet12 oper state set from down to up

Work item tracking
Microsoft ADO (number only):
26557087
How I did it
Check the interface status before start bgp.
waiting timeout is about 60s, will output a warning message if interface still down.

How to verify it
build debug image, boot the image, check the syslog. and bgp process.

syslog:1098:Jun 3 03:10:30.338071 str-a7060cx-acs-10 INFO bgp#root: [bgpd] It took 0.498398 seconds for interface to become ready
---
 dockers/docker-fpm-frr/Dockerfile.j2          |  1 +
 .../docker-fpm-frr/bgpd_wait_for_intf.sh.j2   | 70 +++++++++++++++++++
 dockers/docker-fpm-frr/docker_init.sh         |  3 +
 .../frr/supervisord/supervisord.conf.j2       | 14 +++-
 4 files changed, 87 insertions(+), 1 deletion(-)
 create mode 100755 dockers/docker-fpm-frr/bgpd_wait_for_intf.sh.j2

diff --git a/dockers/docker-fpm-frr/Dockerfile.j2 b/dockers/docker-fpm-frr/Dockerfile.j2
index 98c459381..7ac3e8839 100644
--- a/dockers/docker-fpm-frr/Dockerfile.j2
+++ b/dockers/docker-fpm-frr/Dockerfile.j2
@@ -54,6 +54,7 @@ COPY ["TSC", "/usr/bin/TSC"]
 COPY ["TS", "/usr/bin/TS"]
 COPY ["files/supervisor-proc-exit-listener", "/usr/bin"]
 COPY ["zsocket.sh", "/usr/bin/"]
+COPY ["bgpd_wait_for_intf.sh.j2", "/usr/share/sonic/templates/"]
 RUN chmod a+x /usr/bin/TSA && \
     chmod a+x /usr/bin/TSB && \
     chmod a+x /usr/bin/TSC && \
diff --git a/dockers/docker-fpm-frr/bgpd_wait_for_intf.sh.j2 b/dockers/docker-fpm-frr/bgpd_wait_for_intf.sh.j2
new file mode 100755
index 000000000..ef014d103
--- /dev/null
+++ b/dockers/docker-fpm-frr/bgpd_wait_for_intf.sh.j2
@@ -0,0 +1,70 @@
+#!/usr/bin/env bash
+
+# Define global timeout in seconds
+GLOBAL_TIMEOUT=60
+GLOBAL_TIMEOUT_REACHED="false"
+
+function wait_iface_ready
+{
+    IFACE_NAME=$1
+    IFACE_CIDR=$2
+    START_TIME=$3
+
+    # First phase: wait for all interfaces until the global timeout is reached
+    while [ "$GLOBAL_TIMEOUT_REACHED" == "false" ]; do
+        CURRENT_TIME=$(date +%s.%N)
+        ELAPSED_TIME=$(awk -v current_time=$CURRENT_TIME -v start_time=$START_TIME 'BEGIN {print current_time - start_time}')
+
+        # Check if global timeout is reached
+        if (( $(awk -v elapsed_time=$ELAPSED_TIME -v global_timeout=$GLOBAL_TIMEOUT 'BEGIN {print (elapsed_time >= global_timeout)}') )); then
+            GLOBAL_TIMEOUT_REACHED="true"
+            break
+        fi
+
+        RESULT=$(sonic-db-cli STATE_DB HGET "INTERFACE_TABLE|${IFACE_NAME}|${IFACE_CIDR}" "state" 2> /dev/null)
+        if [ x"$RESULT" == x"ok" ]; then
+            return 0
+        fi
+        sleep 0.5
+    done
+
+    # Second phase: apply per-interface timeout
+    # Counter to track the number of iterations
+    ITERATION=0
+    while [ $ITERATION -lt 3 ]; do
+        RESULT=$(sonic-db-cli STATE_DB HGET "INTERFACE_TABLE|${IFACE_NAME}|${IFACE_CIDR}" "state" 2> /dev/null)
+        if [ x"$RESULT" == x"ok" ]; then
+            return 0
+        fi
+
+        sleep 0.5
+        ((ITERATION++))
+    done
+
+    logger -p warning "[bgpd] warning: Interface ${IFACE_NAME} not ready."
+    return 1
+}
+
+start=$(date +%s.%N)
+
+{% for (name, prefix) in INTERFACE|pfx_filter %}
+{% if prefix | ipv4 %}
+wait_iface_ready {{ name }} {{ prefix }} $start
+{% endif %}
+{% endfor %}
+
+{% for (name, prefix) in VLAN_INTERFACE|pfx_filter %}
+{% if prefix | ipv4 %}
+wait_iface_ready {{ name }} {{ prefix }} $start
+{% endif %}
+{% endfor %}
+
+{% for (name, prefix) in PORTCHANNEL_INTERFACE|pfx_filter %}
+{% if prefix | ipv4 %}
+wait_iface_ready {{ name }} {{ prefix }} $start
+{% endif %}
+{% endfor %}
+
+end=$(date +%s.%N)
+timespan=$(awk -v start=$start -v end=$end 'BEGIN {print end - start}')
+logger -p info "[bgpd] It took ${timespan} seconds for interfaces to become ready"
diff --git a/dockers/docker-fpm-frr/docker_init.sh b/dockers/docker-fpm-frr/docker_init.sh
index 0ed274ec7..f60c5327a 100755
--- a/dockers/docker-fpm-frr/docker_init.sh
+++ b/dockers/docker-fpm-frr/docker_init.sh
@@ -11,6 +11,7 @@ CFGGEN_PARAMS=" \
     -t /usr/share/sonic/templates/supervisord/critical_processes.j2,/etc/supervisor/critical_processes \
     -t /usr/share/sonic/templates/isolate.j2,/usr/sbin/bgp-isolate \
     -t /usr/share/sonic/templates/unisolate.j2,/usr/sbin/bgp-unisolate \
+    -t /usr/share/sonic/templates/bgpd_wait_for_intf.sh.j2,/usr/bin/bgpd_wait_for_intf.sh \
 "
 
 FRR_VARS=$(sonic-cfggen $CFGGEN_PARAMS)
@@ -111,4 +112,6 @@ TZ=$(cat /etc/timezone)
 rm -rf /etc/localtime
 ln -sf /usr/share/zoneinfo/$TZ /etc/localtime
 
+chmod +x /usr/bin/bgpd_wait_for_intf.sh
+
 exec /usr/local/bin/supervisord
diff --git a/dockers/docker-fpm-frr/frr/supervisord/supervisord.conf.j2 b/dockers/docker-fpm-frr/frr/supervisord/supervisord.conf.j2
index 4ee96cf84..0e12fb62b 100644
--- a/dockers/docker-fpm-frr/frr/supervisord/supervisord.conf.j2
+++ b/dockers/docker-fpm-frr/frr/supervisord/supervisord.conf.j2
@@ -76,6 +76,18 @@ dependent_startup=true
 dependent_startup_wait_for=zebra:running
 {% endif %}
 
+[program:bgpd_wait_for_intf]
+command=/usr/bin/bgpd_wait_for_intf.sh
+priority=5
+stopsignal=KILL
+autostart=false
+autorestart=false
+startsecs=0
+stdout_logfile=syslog
+stderr_logfile=syslog
+dependent_startup=true
+dependent_startup_wait_for=zsocket:exited
+
 [program:bgpd]
 command=/usr/lib/frr/bgpd -A 127.0.0.1 -M snmp
 priority=5
@@ -86,7 +98,7 @@ startsecs=0
 stdout_logfile=syslog
 stderr_logfile=syslog
 dependent_startup=true
-dependent_startup_wait_for=zsocket:exited
+dependent_startup_wait_for=bgpd_wait_for_intf:exited
 
 {% if DEVICE_METADATA.localhost.frr_mgmt_framework_config is defined and DEVICE_METADATA.localhost.frr_mgmt_framework_config == "true" %}
 [program:ospfd]

From ce2988220e545c42e969a2f81790c03bd2cddfe5 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Thu, 15 Aug 2024 17:36:09 +0800
Subject: [PATCH 0897/1115] [submodule] Update submodule sonic-host-services to
 the latest HEAD automatically (#19897)

#### Why I did it
src/sonic-host-services
```
* 39e31a9 - (HEAD -> master, origin/master, origin/HEAD) Fix modify_single_file generate empty file issue (#145) (26 hours ago) [Hua Liu]
* 1891b0a - Add dbus service to read file stat (#142) (2 days ago) [isabelmsft]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-host-services | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-host-services b/src/sonic-host-services
index ca6b3cdb9..39e31a95b 160000
--- a/src/sonic-host-services
+++ b/src/sonic-host-services
@@ -1 +1 @@
-Subproject commit ca6b3cdb9a56604765ada4ac67234c117f0fb5ad
+Subproject commit 39e31a95ba96d601bae90c54556a27f84691c910

From aeb339797d03918533731be3a07508bdb045c2f3 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Thu, 15 Aug 2024 17:36:20 +0800
Subject: [PATCH 0898/1115] [submodule] Update submodule linkmgrd to the latest
 HEAD automatically (#19844)

#### Why I did it
src/linkmgrd
```
* 287dbd7 - (HEAD -> master, origin/master, origin/HEAD) [link prober] print out error code message when `sendHeartbeat` fails (#266) (34 hours ago) [Jing Zhang]
* 22f55a7 - Fix state machine handler race conditions introduced by `strand::wrap` (#257) (9 days ago) [Longxiang Lyu]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/linkmgrd | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/linkmgrd b/src/linkmgrd
index 6fcab4740..287dbd702 160000
--- a/src/linkmgrd
+++ b/src/linkmgrd
@@ -1 +1 @@
-Subproject commit 6fcab47406502cd41d60267b36dc362555487d7c
+Subproject commit 287dbd70298c1743668182913644d2bbe3cdcd5b

From 956fc1647feb422566676010448d3f27f7e0398a Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Thu, 15 Aug 2024 19:29:50 +0800
Subject: [PATCH 0899/1115] [submodule] Update submodule sonic-sairedis to the
 latest HEAD automatically (#19911)

#### Why I did it
src/sonic-sairedis
```
* 45ff42c3 - (HEAD -> master, origin/master, origin/HEAD) run VS tests in parallel (#1414) (3 hours ago) [Lawrence Lee]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-sairedis | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-sairedis b/src/sonic-sairedis
index 8d0f5ebf0..45ff42c3c 160000
--- a/src/sonic-sairedis
+++ b/src/sonic-sairedis
@@ -1 +1 @@
-Subproject commit 8d0f5ebf0163c4d5a68190e9af4ea9ceb7ba987a
+Subproject commit 45ff42c3ca002b4426f6dad1fe8fc132be9dece7

From 11e704bd6ec14147aff5227b72856d2ec1b0f422 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Thu, 15 Aug 2024 19:29:55 +0800
Subject: [PATCH 0900/1115] [submodule] Update submodule sonic-swss-common to
 the latest HEAD automatically (#19907)

#### Why I did it
src/sonic-swss-common
```
* aba0f66 - (HEAD -> master, origin/master, origin/HEAD) Add new DASH APPL_DB table names (#897) (2 days ago) [Lawrence Lee]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-swss-common | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-swss-common b/src/sonic-swss-common
index e37bfea64..aba0f66df 160000
--- a/src/sonic-swss-common
+++ b/src/sonic-swss-common
@@ -1 +1 @@
-Subproject commit e37bfea64fb9e1f40f7c9b6ad759e92f5f15bec9
+Subproject commit aba0f66dfe1c77c6256cd6be6d2edeefa611efa4

From 74800220d37b5be96de72fe6ebfb2bdb36a4ac09 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Thu, 15 Aug 2024 19:30:34 +0800
Subject: [PATCH 0901/1115] [submodule] Update submodule sonic-snmpagent to the
 latest HEAD automatically (#19585)

#### Why I did it
src/sonic-snmpagent
```
* deb7b7c - (HEAD -> master, origin/master, origin/HEAD) Aggregate L3 errors with L2 discards for interfaces with RIF (#325) (3 days ago) [Stepan Blyshchak]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-snmpagent | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-snmpagent b/src/sonic-snmpagent
index a281f9ab7..deb7b7c43 160000
--- a/src/sonic-snmpagent
+++ b/src/sonic-snmpagent
@@ -1 +1 @@
-Subproject commit a281f9ab771adaa438f01fd5394d7a73ed6bc1d6
+Subproject commit deb7b7c43c2e9fa26acbac9907443b5d6f7310d2

From 084ba1a00f2f9d0197536d20a5cdc6e392e469aa Mon Sep 17 00:00:00 2001
From: zitingguo-ms <zitingguo@microsoft.com>
Date: Fri, 16 Aug 2024 08:54:04 +0800
Subject: [PATCH 0902/1115] Prioritize configuration from config_db over
 constants.yml during BBR status initialization (#19590)

Why I did it
There are two places which we can configure the BBR disabled/enabled, one is constants.yml, the other is by config_db. During run time, config_db win. But at the init stage, constants.yml win. This is a wrong logic, constants.yml only win when there is no such config in the config_db.

Work item tracking
Microsoft ADO (number only): 28302790
How I did it
Initialize BBR status from constants.yml only when config_db doesn't have BBR entry.

How to verify it
Build image and run the following:

# bbr status in constants.yml is set to disabled
# change the bbr status in config_db to enabled and reload config
admin@str2-7050cx3-acs-01:~$ redis-cli -n 4 hset "BGP_BBR|all" "status" "enabled"
(integer) 0
admin@str2-7050cx3-acs-01:~$ redis-cli -n 4 hget "BGP_BBR|all" "status"
"enabled"
admin@str2-7050cx3-acs-01:~$ vtysh -c 'show run' | grep 'allowas'
  neighbor PEER_V4 allowas-in 1
  neighbor PEER_V6 allowas-in 1
admin@str2-7050cx3-acs-01:~$ sudo config save -y
Running command: /usr/local/bin/sonic-cfggen -d --print-data > /etc/sonic/config_db.json
admin@str2-7050cx3-acs-01:~$ sudo config reload -y

# check bgpcfgd log, bbr default status is enabled
2024 Aug 14 05:42:47.653216 str2-7050cx3-acs-01 INFO bgp#bgpcfgd: BBRMgr::Initialized and enabled from config_db. Default state: 'enabled'
---
 src/sonic-bgpcfgd/bgpcfgd/managers_bbr.py | 71 ++++++++++++++++++-----
 src/sonic-bgpcfgd/tests/test_bbr.py       | 32 +++++++++-
 2 files changed, 85 insertions(+), 18 deletions(-)

diff --git a/src/sonic-bgpcfgd/bgpcfgd/managers_bbr.py b/src/sonic-bgpcfgd/bgpcfgd/managers_bbr.py
index 0e82d0a4b..6e1a33e89 100644
--- a/src/sonic-bgpcfgd/bgpcfgd/managers_bbr.py
+++ b/src/sonic-bgpcfgd/bgpcfgd/managers_bbr.py
@@ -45,26 +45,38 @@ def del_handler(self, key):
 
     def __init(self):
         """ Initialize BBRMgr. Extracted from constructor """
-        if not 'bgp' in self.constants:
-            log_err("BBRMgr::Disabled: 'bgp' key is not found in constants")
-            return
-        if 'bbr' in self.constants['bgp'] \
-                and 'enabled' in self.constants['bgp']['bbr'] \
-                and self.constants['bgp']['bbr']['enabled']:
+        # Check BGP_BBR table from config_db first
+        bbr_status_from_config_db = self.get_bbr_status_from_config_db()
+
+        if bbr_status_from_config_db is None:
+            if not 'bgp' in self.constants:
+                log_err("BBRMgr::Disabled: 'bgp' key is not found in constants")
+                return
+            if 'bbr' in self.constants['bgp'] \
+                    and 'enabled' in self.constants['bgp']['bbr'] \
+                    and self.constants['bgp']['bbr']['enabled']:
+                self.bbr_enabled_pgs = self.__read_pgs()
+                if self.bbr_enabled_pgs:
+                    self.enabled = True
+                    if 'default_state' in self.constants['bgp']['bbr'] \
+                            and self.constants['bgp']['bbr']['default_state'] == 'enabled':
+                        default_status = "enabled"
+                    else:
+                        default_status = "disabled"
+                    self.directory.put(self.db_name, self.table_name, 'status', default_status)
+                    log_info("BBRMgr::Initialized and enabled from constants. Default state: '%s'" % default_status)
+                else:
+                    log_info("BBRMgr::Disabled: no BBR enabled peers")
+            else:
+                log_info("BBRMgr::Disabled: no bgp.bbr.enabled in the constants")
+        else:
             self.bbr_enabled_pgs = self.__read_pgs()
             if self.bbr_enabled_pgs:
                 self.enabled = True
-                if 'default_state' in self.constants['bgp']['bbr'] \
-                        and self.constants['bgp']['bbr']['default_state'] == 'enabled':
-                    default_status = "enabled"
-                else:
-                    default_status = "disabled"
-                self.directory.put(self.db_name, self.table_name, 'status', default_status)
-                log_info("BBRMgr::Initialized and enabled. Default state: '%s'" % default_status)
+                self.directory.put(self.db_name, self.table_name, 'status', bbr_status_from_config_db)
+                log_info("BBRMgr::Initialized and enabled from config_db. Default state: '%s'" % bbr_status_from_config_db)
             else:
                 log_info("BBRMgr::Disabled: no BBR enabled peers")
-        else:
-            log_info("BBRMgr::Disabled: no bgp.bbr.enabled in the constants")
 
     def __read_pgs(self):
         """
@@ -82,6 +94,35 @@ def __read_pgs(self):
                 res[pg_name] = pg_afs
         return res
 
+    def get_bbr_status_from_config_db(self):
+        """
+        Read BBR status from CONFIG_DB
+        :return: BBR status from CONFIG_DB or None if not found
+        """
+        try:
+            config_db = swsscommon.ConfigDBConnector()
+            if config_db is None:
+                log_info("BBRMgr::Failed to connect to CONFIG_DB, get BBR default state from constants.yml")
+                return None
+            config_db.connect()
+        except Exception as e:
+            log_info("BBRMgr::Failed to connect to CONFIG_DB with exception %s, get BBR default state from constants.yml" % str(e))
+            return None
+
+        try:
+            bbr_table_data = config_db.get_table(self.table_name)
+            if bbr_table_data and 'all' in bbr_table_data and 'status' in bbr_table_data["all"]:
+                if bbr_table_data["all"]["status"] == "enabled":
+                    return "enabled"
+                else:
+                    return "disabled"
+            else:
+                log_info("BBRMgr::BBR status is not found in CONFIG_DB, get BBR default state from constants.yml")
+                return None
+        except Exception as e:
+            log_info("BBRMgr::Failed to read BBR status from CONFIG_DB with exception %s, get BBR default state from constants.yml" % str(e))
+            return None
+
     def __set_validation(self, key, data):
         """ Validate set-command arguments
         :param key: key of 'set' command
diff --git a/src/sonic-bgpcfgd/tests/test_bbr.py b/src/sonic-bgpcfgd/tests/test_bbr.py
index b95b94493..554c4acfc 100644
--- a/src/sonic-bgpcfgd/tests/test_bbr.py
+++ b/src/sonic-bgpcfgd/tests/test_bbr.py
@@ -112,6 +112,7 @@ def __init_common(constants,
         'tf':        TemplateFabric(),
         'constants': constants,
     }
+
     m = BBRMgr(common_objs, "CONFIG_DB", "BGP_BBR")
     m._BBRMgr__init()
     assert m.bbr_enabled_pgs == expected_bbr_enabled_pgs
@@ -157,7 +158,7 @@ def test___init_6():
             "bbr": expected_bbr_entries,
         }
     }
-    __init_common(constants, "BBRMgr::Initialized and enabled. Default state: 'disabled'", None, expected_bbr_entries, "disabled")
+    __init_common(constants, "BBRMgr::Initialized and enabled from constants. Default state: 'disabled'", None, expected_bbr_entries, "disabled")
 
 def test___init_7():
     expected_bbr_entries = {
@@ -171,7 +172,7 @@ def test___init_7():
             "bbr": expected_bbr_entries,
         }
     }
-    __init_common(constants, "BBRMgr::Initialized and enabled. Default state: 'disabled'", None, expected_bbr_entries, "disabled")
+    __init_common(constants, "BBRMgr::Initialized and enabled from constants. Default state: 'disabled'", None, expected_bbr_entries, "disabled")
 
 def test___init_8():
     expected_bbr_entries = {
@@ -185,7 +186,32 @@ def test___init_8():
             "bbr": expected_bbr_entries,
         }
     }
-    __init_common(constants, "BBRMgr::Initialized and enabled. Default state: 'enabled'", None, expected_bbr_entries, "enabled")
+    __init_common(constants, "BBRMgr::Initialized and enabled from constants. Default state: 'enabled'", None, expected_bbr_entries, "enabled")
+
+@patch('bgpcfgd.managers_bbr.BBRMgr.get_bbr_status_from_config_db', return_value='disabled')
+def test___init_with_config_db_overwirte_constants(mocked_get_bbr_status_from_config_db):
+    expected_bbr_entries = {
+        "PEER_V4": ["ipv4"],
+        "PEER_V6": ["ipv6"],
+    }
+    constants = deepcopy(global_constants)
+    constants["bgp"]["bbr"] = {"enabled": True, "default_state": "enabled"}
+    constants["bgp"]["peers"] = {
+        "general": {
+            "bbr": expected_bbr_entries,
+        }
+    }
+
+    # BBR status from config_db should be prioritized over constants
+    __init_common(constants, "BBRMgr::Initialized and enabled from config_db. Default state: 'disabled'", None, expected_bbr_entries, "disabled")
+
+@patch('bgpcfgd.managers_bbr.BBRMgr.get_bbr_status_from_config_db', return_value='enabled')
+def test___init_with_config_db_no_peers(mocked_get_bbr_status_from_config_db):
+
+    constants = deepcopy(global_constants)
+    constants["bgp"]["bbr"] = {"enabled": True}
+
+    __init_common(constants, "BBRMgr::Disabled: no BBR enabled peers", None, {}, "disabled")
 
 @patch('bgpcfgd.managers_bbr.log_info')
 def read_pgs_common(constants, expected_log_info, expected_bbr_enabled_pgs, mocked_log_info):

From d0f0a61a72ca8f4d26efe29810a23944d3d396e9 Mon Sep 17 00:00:00 2001
From: Liu Shilong <shilongliu@microsoft.com>
Date: Fri, 16 Aug 2024 15:27:46 +0800
Subject: [PATCH 0903/1115] [build] Add timeout on python target and dpkg
 helper target. (#19355)

Why I did it
Some UT cases are not strong. They maybe hangs in some environment.
Provide a variable to config timeout on some commands which contains UT.

Work item tracking
Microsoft ADO (number only): 28624525
How I did it
Add a timeout when running UT.

How to verify it
---
 Makefile.work |  1 +
 rules/config  |  3 +++
 slave.mk      | 12 ++++++------
 3 files changed, 10 insertions(+), 6 deletions(-)

diff --git a/Makefile.work b/Makefile.work
index 22dbac2ce..6079906a1 100644
--- a/Makefile.work
+++ b/Makefile.work
@@ -567,6 +567,7 @@ SONIC_BUILD_INSTRUCTION :=  $(MAKE) \
                            ONIE_IMAGE_PART_SIZE=$(ONIE_IMAGE_PART_SIZE) \
                            SONIC_OS_VERSION=$(SONIC_OS_VERSION) \
                            PIP_HTTP_TIMEOUT=$(PIP_HTTP_TIMEOUT) \
+                           BUILD_PROCESS_TIMEOUT=$(BUILD_PROCESS_TIMEOUT) \
                            LEGACY_SONIC_MGMT_DOCKER=$(LEGACY_SONIC_MGMT_DOCKER) \
                            SONIC_PTF_ENV_PY_VER=$(SONIC_PTF_ENV_PY_VER) \
                            $(SONIC_OVERRIDE_BUILD_VARS)
diff --git a/rules/config b/rules/config
index 6425005d6..d2ddcb704 100644
--- a/rules/config
+++ b/rules/config
@@ -320,3 +320,6 @@ BUILD_REDUCE_IMAGE_SIZE = n
 # SONIC_PTF_ENV_PY_VER - SONiC PTF test Python version. Set to 'mixed' to build the 
 # image with both Python 2 and 3. Set to 'py3' to build a Python 3 only image
 SONIC_PTF_ENV_PY_VER = mixed
+
+# Add timeout on some process which may hangs
+BUILD_PROCESS_TIMEOUT ?= 0
diff --git a/slave.mk b/slave.mk
index 017a90242..c90af02cc 100644
--- a/slave.mk
+++ b/slave.mk
@@ -789,8 +789,8 @@ $(addprefix $(DEBS_PATH)/, $(SONIC_DPKG_DEBS)) : $(DEBS_PATH)/% : .platform $$(a
 		if [ -f ./autogen.sh ]; then ./autogen.sh $(LOG); fi
 		$(SETUP_OVERLAYFS_FOR_DPKG_ADMINDIR)
 		$(if $($*_DPKG_TARGET),
-			${$*_BUILD_ENV} DEB_BUILD_OPTIONS="${DEB_BUILD_OPTIONS_GENERIC} ${$*_DEB_BUILD_OPTIONS}" DEB_BUILD_PROFILES="${$*_DEB_BUILD_PROFILES}" $(ANT_DEB_CONFIG) $(CROSS_COMPILE_FLAGS) dpkg-buildpackage -rfakeroot -b $(ANT_DEB_CROSS_OPT) -us -uc -tc -j$(SONIC_CONFIG_MAKE_JOBS) --as-root -T$($*_DPKG_TARGET) --admindir $$mergedir $(LOG),
-			${$*_BUILD_ENV} DEB_BUILD_OPTIONS="${DEB_BUILD_OPTIONS_GENERIC} ${$*_DEB_BUILD_OPTIONS}" DEB_BUILD_PROFILES="${$*_DEB_BUILD_PROFILES}" $(ANT_DEB_CONFIG) $(CROSS_COMPILE_FLAGS) dpkg-buildpackage -rfakeroot -b $(ANT_DEB_CROSS_OPT) -us -uc -tc -j$(SONIC_CONFIG_MAKE_JOBS) --admindir $$mergedir $(LOG)
+			${$*_BUILD_ENV} DEB_BUILD_OPTIONS="${DEB_BUILD_OPTIONS_GENERIC} ${$*_DEB_BUILD_OPTIONS}" DEB_BUILD_PROFILES="${$*_DEB_BUILD_PROFILES}" $(ANT_DEB_CONFIG) $(CROSS_COMPILE_FLAGS) timeout --preserve-status -s 9 -k 10 $(BUILD_PROCESS_TIMEOUT) dpkg-buildpackage -rfakeroot -b $(ANT_DEB_CROSS_OPT) -us -uc -tc -j$(SONIC_CONFIG_MAKE_JOBS) --as-root -T$($*_DPKG_TARGET) --admindir $$mergedir $(LOG),
+			${$*_BUILD_ENV} DEB_BUILD_OPTIONS="${DEB_BUILD_OPTIONS_GENERIC} ${$*_DEB_BUILD_OPTIONS}" DEB_BUILD_PROFILES="${$*_DEB_BUILD_PROFILES}" $(ANT_DEB_CONFIG) $(CROSS_COMPILE_FLAGS) timeout --preserve-status -s 9 -k 10 $(BUILD_PROCESS_TIMEOUT) dpkg-buildpackage -rfakeroot -b $(ANT_DEB_CROSS_OPT) -us -uc -tc -j$(SONIC_CONFIG_MAKE_JOBS) --admindir $$mergedir $(LOG)
 		)
 		popd $(LOG_SIMPLE)
 		# Clean up
@@ -940,19 +940,19 @@ $(addprefix $(PYTHON_WHEELS_PATH)/, $(SONIC_PYTHON_WHEELS)) : $(PYTHON_WHEELS_PA
 		if [ -f ../$(notdir $($*_SRC_PATH)).patch/series ]; then ( quilt pop -a -f 1>/dev/null 2>&1 || true ) && QUILT_PATCHES=../$(notdir $($*_SRC_PATH)).patch quilt push -a; fi $(LOG)
 ifneq ($(CROSS_BUILD_ENVIRON),y)
 		# Use pip instead of later setup.py to install dependencies into user home, but uninstall self
-		pip$($*_PYTHON_VERSION) install . && pip$($*_PYTHON_VERSION) uninstall --yes `python$($*_PYTHON_VERSION) setup.py --name`
+		{ pip$($*_PYTHON_VERSION) install . && pip$($*_PYTHON_VERSION) uninstall --yes `python$($*_PYTHON_VERSION) setup.py --name`; } $(LOG)
 ifeq ($(BLDENV),bookworm)
-		if [ ! "$($*_TEST)" = "n" ]; then pip$($*_PYTHON_VERSION) install ".[testing]" && pip$($*_PYTHON_VERSION) uninstall --yes `python$($*_PYTHON_VERSION) setup.py --name` && python$($*_PYTHON_VERSION) -m pytest $(LOG); fi
+		if [ ! "$($*_TEST)" = "n" ]; then pip$($*_PYTHON_VERSION) install ".[testing]" && pip$($*_PYTHON_VERSION) uninstall --yes `python$($*_PYTHON_VERSION) setup.py --name` && timeout --preserve-status -s 9 -k 10 $(BUILD_PROCESS_TIMEOUT) python$($*_PYTHON_VERSION) -m pytest; fi $(LOG)
 		python$($*_PYTHON_VERSION) -m build -n $(LOG)
 else
-		if [ ! "$($*_TEST)" = "n" ]; then python$($*_PYTHON_VERSION) setup.py test $(LOG); fi
+		if [ ! "$($*_TEST)" = "n" ]; then timeout --preserve-status -s 9 -k 10 $(BUILD_PROCESS_TIMEOUT) python$($*_PYTHON_VERSION) setup.py test $(LOG); fi
 		python$($*_PYTHON_VERSION) setup.py bdist_wheel $(LOG)
 endif
 else
 		{
 			export PATH=$(VIRTENV_BIN_CROSS_PYTHON$($*_PYTHON_VERSION)):${PATH}
 			python$($*_PYTHON_VERSION) setup.py build $(LOG)
-			if [ ! "$($*_TEST)" = "n" ]; then python$($*_PYTHON_VERSION) setup.py test $(LOG); fi
+			if [ ! "$($*_TEST)" = "n" ]; then timeout --preserve-status -s 9 -k 10 $(BUILD_PROCESS_TIMEOUT) python$($*_PYTHON_VERSION) setup.py test $(LOG); fi
 			python$($*_PYTHON_VERSION) setup.py bdist_wheel $(LOG)
 		}
 endif

From 92f937858ac4610c9415adbef1c096da1f3999be Mon Sep 17 00:00:00 2001
From: Wenda Chu <32250288+w1nda@users.noreply.github.com>
Date: Sat, 17 Aug 2024 01:25:51 +0800
Subject: [PATCH 0904/1115] [WOL] Implement wake on LAN command line tool
 (#19206)

Why I did it
Implement wake on LAN command line tool to send magic packets to target interface with extra parameters like mac address, password, count and interval.

How I did it
Setup rust compile environment, write code and test to implement the tool.
Set raw socket capacity for wol binary when build image.

How to verify it
Unit test and manually test with packet capture.
---
 .../build_templates/sonic_debian_extension.j2 |   5 +
 rules/sonic-nettools.mk                       |   7 +
 slave.mk                                      |  10 +
 sonic-slave-bookworm/Dockerfile.j2            |  14 +
 src/sonic-nettools/.gitignore                 |   3 +
 src/sonic-nettools/Cargo.lock                 | 442 +++++++++++
 src/sonic-nettools/Cargo.toml                 |   5 +
 src/sonic-nettools/Makefile                   |  17 +
 src/sonic-nettools/debian/changelog           |   5 +
 src/sonic-nettools/debian/compat              |   1 +
 src/sonic-nettools/debian/control             |   9 +
 src/sonic-nettools/debian/install             |   1 +
 src/sonic-nettools/debian/rules               |   3 +
 src/sonic-nettools/wol/Cargo.toml             |   7 +
 src/sonic-nettools/wol/src/main.rs            |  13 +
 src/sonic-nettools/wol/src/wol.rs             | 687 ++++++++++++++++++
 16 files changed, 1229 insertions(+)
 create mode 100644 rules/sonic-nettools.mk
 create mode 100644 src/sonic-nettools/.gitignore
 create mode 100644 src/sonic-nettools/Cargo.lock
 create mode 100644 src/sonic-nettools/Cargo.toml
 create mode 100644 src/sonic-nettools/Makefile
 create mode 100644 src/sonic-nettools/debian/changelog
 create mode 100644 src/sonic-nettools/debian/compat
 create mode 100644 src/sonic-nettools/debian/control
 create mode 100644 src/sonic-nettools/debian/install
 create mode 100755 src/sonic-nettools/debian/rules
 create mode 100644 src/sonic-nettools/wol/Cargo.toml
 create mode 100644 src/sonic-nettools/wol/src/main.rs
 create mode 100644 src/sonic-nettools/wol/src/wol.rs

diff --git a/files/build_templates/sonic_debian_extension.j2 b/files/build_templates/sonic_debian_extension.j2
index 55511756e..12c743d93 100644
--- a/files/build_templates/sonic_debian_extension.j2
+++ b/files/build_templates/sonic_debian_extension.j2
@@ -99,6 +99,11 @@ sudo mkdir -p $FILESYSTEM_ROOT_USR_SHARE_SONIC_FIRMWARE/
 # Keeping it generic. It should not harm anyways.
 sudo mkdir -p $FILESYSTEM_ROOT_USR_LIB_SYSTEMD_SYSTEM
 
+# Install sonic-nettools
+sudo dpkg --root=$FILESYSTEM_ROOT -i $debs_path/sonic-nettools_*.deb || \
+    sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install -f
+sudo setcap 'cap_net_raw=+ep' $FILESYSTEM_ROOT/usr/bin/wol
+
 # Install a patched version of ifupdown2  (and its dependencies via 'apt-get -y install -f')
 sudo dpkg --root=$FILESYSTEM_ROOT -i $debs_path/ifupdown2_*.deb || \
     sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install -f
diff --git a/rules/sonic-nettools.mk b/rules/sonic-nettools.mk
new file mode 100644
index 000000000..44351ec6b
--- /dev/null
+++ b/rules/sonic-nettools.mk
@@ -0,0 +1,7 @@
+SONIC_NETTOOLS_VERSION = 0.0.1-0
+
+export SONIC_NETTOOLS_VERSION
+
+SONIC_NETTOOLS = sonic-nettools_$(SONIC_NETTOOLS_VERSION)_$(CONFIGURED_ARCH).deb
+$(SONIC_NETTOOLS)_SRC_PATH = $(SRC_PATH)/sonic-nettools
+SONIC_DPKG_DEBS += $(SONIC_NETTOOLS)
diff --git a/slave.mk b/slave.mk
index c90af02cc..15abbc725 100644
--- a/slave.mk
+++ b/slave.mk
@@ -362,6 +362,15 @@ CROSS_COMPILE_FLAGS := CGO_ENABLED=1 GOOS=linux GOARCH=$(GOARCH) CROSS_COMPILE=$
 
 endif
 
+ifeq ($(CROSS_BUILD_ENVIRON),y)
+ifeq ($(CONFIGURED_ARCH),armhf)
+RUST_CROSS_COMPILE_TARGET = armv7-unknown-linux-gnueabihf
+else ifeq ($(CONFIGURED_ARCH),arm64)
+RUST_CROSS_COMPILE_TARGET = aarch64-unknown-linux-gnu
+endif
+export RUST_CROSS_COMPILE_TARGET
+endif
+
 ###############################################################################
 ## Routing stack related exports
 ###############################################################################
@@ -1368,6 +1377,7 @@ $(addprefix $(TARGET_PATH)/, $(SONIC_INSTALLERS)) : $(TARGET_PATH)/% : \
                 $(PYTHON_SWSSCOMMON) \
                 $(PYTHON3_SWSSCOMMON) \
                 $(SONIC_DB_CLI) \
+                $(SONIC_NETTOOLS) \
                 $(SONIC_RSYSLOG_PLUGIN) \
                 $(SONIC_UTILITIES_DATA) \
                 $(SONIC_HOST_SERVICES_DATA) \
diff --git a/sonic-slave-bookworm/Dockerfile.j2 b/sonic-slave-bookworm/Dockerfile.j2
index 50b8591e6..92a15eaf9 100644
--- a/sonic-slave-bookworm/Dockerfile.j2
+++ b/sonic-slave-bookworm/Dockerfile.j2
@@ -113,6 +113,7 @@ RUN apt-get update && apt-get install -y eatmydata && eatmydata apt-get install
         git-buildpackage \
         perl-modules \
         libclass-accessor-perl \
+        libcap2-bin \
         libswitch-perl \
         libzmq5 \
         libzmq3-dev \
@@ -656,6 +657,7 @@ RUN eatmydata apt-get install -y \
         pps-tools:$arch \
         libpam-cap:$arch \
         libcap-dev:$arch \
+        libcap2-bin:$arch \
         libpam0g-dev:$arch \
         libaudit-dev:$arch \
         libgtk-3-dev:$arch \
@@ -737,3 +739,15 @@ RUN eatmydata apt install -y python-is-python3
 ARG bazelisk_url=https://github.com/bazelbuild/bazelisk/releases/latest/download/bazelisk-linux-{{ CONFIGURED_ARCH }}
 RUN curl -fsSL -o /usr/local/bin/bazel ${bazelisk_url} && chmod 755 /usr/local/bin/bazel
 {% endif -%}
+
+# Install Rust
+ARG RUST_ROOT=/usr/.cargo
+RUN RUSTUP_HOME=$RUST_ROOT CARGO_HOME=$RUST_ROOT bash -c 'curl --proto "=https" -sSf https://sh.rustup.rs | sh -s -- --default-toolchain 1.79.0 -y'
+{% if CROSS_BUILD_ENVIRON == "y" and CONFIGURED_ARCH == "armhf" %}
+RUN mkdir -p /.cargo && $RUST_ROOT/bin/rustup target add armv7-unknown-linux-gnueabihf && echo "[target.armv7-unknown-linux-gnueabihf]\nlinker = \"arm-linux-gnueabihf-gcc\"" >> /.cargo/config.toml
+{% endif -%}
+{% if CROSS_BUILD_ENVIRON == "y" and CONFIGURED_ARCH == "arm64" %}
+RUN mkdir -p /.cargo && $RUST_ROOT/bin/rustup target add aarch64-unknown-linux-gnu && echo "[target.aarch64-unknown-linux-gnu]\nlinker = \"aarch64-linux-gnu-gcc\"" >> /.cargo/config.toml
+{% endif -%}
+ENV RUSTUP_HOME $RUST_ROOT
+ENV PATH $PATH:$RUST_ROOT/bin
\ No newline at end of file
diff --git a/src/sonic-nettools/.gitignore b/src/sonic-nettools/.gitignore
new file mode 100644
index 000000000..046d25633
--- /dev/null
+++ b/src/sonic-nettools/.gitignore
@@ -0,0 +1,3 @@
+target/
+bin/
+.vscode/
\ No newline at end of file
diff --git a/src/sonic-nettools/Cargo.lock b/src/sonic-nettools/Cargo.lock
new file mode 100644
index 000000000..695393102
--- /dev/null
+++ b/src/sonic-nettools/Cargo.lock
@@ -0,0 +1,442 @@
+# This file is automatically @generated by Cargo.
+# It is not intended for manual editing.
+version = 3
+
+[[package]]
+name = "aho-corasick"
+version = "1.1.3"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "8e60d3430d3a69478ad0993f19238d2df97c507009a52b3c10addcd7f6bcb916"
+dependencies = [
+ "memchr",
+]
+
+[[package]]
+name = "anstream"
+version = "0.6.14"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "418c75fa768af9c03be99d17643f93f79bbba589895012a80e3452a19ddda15b"
+dependencies = [
+ "anstyle",
+ "anstyle-parse",
+ "anstyle-query",
+ "anstyle-wincon",
+ "colorchoice",
+ "is_terminal_polyfill",
+ "utf8parse",
+]
+
+[[package]]
+name = "anstyle"
+version = "1.0.7"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "038dfcf04a5feb68e9c60b21c9625a54c2c0616e79b72b0fd87075a056ae1d1b"
+
+[[package]]
+name = "anstyle-parse"
+version = "0.2.4"
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+checksum = "c03a11a9034d92058ceb6ee011ce58af4a9bf61491aa7e1e59ecd24bd40d22d4"
+dependencies = [
+ "utf8parse",
+]
+
+[[package]]
+name = "anstyle-query"
+version = "1.1.0"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "ad186efb764318d35165f1758e7dcef3b10628e26d41a44bc5550652e6804391"
+dependencies = [
+ "windows-sys",
+]
+
+[[package]]
+name = "anstyle-wincon"
+version = "3.0.3"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "61a38449feb7068f52bb06c12759005cf459ee52bb4adc1d5a7c4322d716fb19"
+dependencies = [
+ "anstyle",
+ "windows-sys",
+]
+
+[[package]]
+name = "clap"
+version = "4.5.8"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "84b3edb18336f4df585bc9aa31dd99c036dfa5dc5e9a2939a722a188f3a8970d"
+dependencies = [
+ "clap_builder",
+ "clap_derive",
+]
+
+[[package]]
+name = "clap_builder"
+version = "4.5.8"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "c1c09dd5ada6c6c78075d6fd0da3f90d8080651e2d6cc8eb2f1aaa4034ced708"
+dependencies = [
+ "anstream",
+ "anstyle",
+ "clap_lex",
+ "strsim",
+]
+
+[[package]]
+name = "clap_derive"
+version = "4.5.8"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "2bac35c6dafb060fd4d275d9a4ffae97917c13a6327903a8be2153cd964f7085"
+dependencies = [
+ "heck",
+ "proc-macro2",
+ "quote",
+ "syn",
+]
+
+[[package]]
+name = "clap_lex"
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+checksum = "4b82cf0babdbd58558212896d1a4272303a57bdb245c2bf1147185fb45640e70"
+
+[[package]]
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+checksum = "0b6a852b24ab71dffc585bcb46eaf7959d175cb865a7152e35b348d1b2960422"
+
+[[package]]
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+
+[[package]]
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+checksum = "2304e00983f87ffb38b55b444b5e3b60a884b5d30c0fca7d82fe33449bbe55ea"
+
+[[package]]
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+checksum = "bf466541e9d546596ee94f9f69590f89473455f88372423e0008fc1a7daf100e"
+dependencies = [
+ "serde",
+]
+
+[[package]]
+name = "is_terminal_polyfill"
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+
+[[package]]
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+checksum = "97b3888a4aecf77e811145cadf6eef5901f4782c53886191b2f693f24761847c"
+
+[[package]]
+name = "memchr"
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+
+[[package]]
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+
+[[package]]
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+dependencies = [
+ "ipnetwork",
+ "pnet_base",
+ "pnet_datalink",
+ "pnet_packet",
+ "pnet_sys",
+ "pnet_transport",
+]
+
+[[package]]
+name = "pnet_base"
+version = "0.35.0"
+source = "registry+https://github.com/rust-lang/crates.io-index"
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+dependencies = [
+ "no-std-net",
+]
+
+[[package]]
+name = "pnet_datalink"
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+source = "registry+https://github.com/rust-lang/crates.io-index"
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+dependencies = [
+ "ipnetwork",
+ "libc",
+ "pnet_base",
+ "pnet_sys",
+ "winapi",
+]
+
+[[package]]
+name = "pnet_macros"
+version = "0.35.0"
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+ "proc-macro2",
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+ "regex",
+ "syn",
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+ "pnet_base",
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+
+[[package]]
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+ "glob",
+ "pnet_base",
+ "pnet_macros",
+ "pnet_macros_support",
+]
+
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+source = "registry+https://github.com/rust-lang/crates.io-index"
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+ "libc",
+ "winapi",
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+
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+ "pnet_sys",
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+dependencies = [
+ "unicode-ident",
+]
+
+[[package]]
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+]
+
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+ "aho-corasick",
+ "memchr",
+ "regex-automata",
+ "regex-syntax",
+]
+
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+name = "regex-automata"
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+ "memchr",
+ "regex-syntax",
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+
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+ "serde_derive",
+]
+
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+ "quote",
+ "syn",
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+dependencies = [
+ "proc-macro2",
+ "quote",
+ "unicode-ident",
+]
+
+[[package]]
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+
+[[package]]
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+dependencies = [
+ "winapi-i686-pc-windows-gnu",
+ "winapi-x86_64-pc-windows-gnu",
+]
+
+[[package]]
+name = "winapi-i686-pc-windows-gnu"
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+
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+
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+checksum = "282be5f36a8ce781fad8c8ae18fa3f9beff57ec1b52cb3de0789201425d9a33d"
+dependencies = [
+ "windows-targets",
+]
+
+[[package]]
+name = "windows-targets"
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+checksum = "9b724f72796e036ab90c1021d4780d4d3d648aca59e491e6b98e725b84e99973"
+dependencies = [
+ "windows_aarch64_gnullvm",
+ "windows_aarch64_msvc",
+ "windows_i686_gnu",
+ "windows_i686_gnullvm",
+ "windows_i686_msvc",
+ "windows_x86_64_gnu",
+ "windows_x86_64_gnullvm",
+ "windows_x86_64_msvc",
+]
+
+[[package]]
+name = "windows_aarch64_gnullvm"
+version = "0.52.6"
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+
+[[package]]
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+
+[[package]]
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+
+[[package]]
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+checksum = "0eee52d38c090b3caa76c563b86c3a4bd71ef1a819287c19d586d7334ae8ed66"
+
+[[package]]
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+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "589f6da84c646204747d1270a2a5661ea66ed1cced2631d546fdfb155959f9ec"
+
+[[package]]
+name = "wol"
+version = "0.0.1"
+dependencies = [
+ "clap",
+ "pnet",
+]
diff --git a/src/sonic-nettools/Cargo.toml b/src/sonic-nettools/Cargo.toml
new file mode 100644
index 000000000..37d4a6460
--- /dev/null
+++ b/src/sonic-nettools/Cargo.toml
@@ -0,0 +1,5 @@
+[workspace]
+
+members = [
+    "wol",
+]
diff --git a/src/sonic-nettools/Makefile b/src/sonic-nettools/Makefile
new file mode 100644
index 000000000..021b1eb80
--- /dev/null
+++ b/src/sonic-nettools/Makefile
@@ -0,0 +1,17 @@
+include ../../rules/sonic-nettools.mk
+
+$(addprefix $(DEST)/, $(SONIC_NETTOOLS)): $(DEST)/% :
+	mkdir -p bin
+ifeq ($(CROSS_BUILD_ENVIRON), y)
+	cargo test --target=$(RUST_CROSS_COMPILE_TARGET)
+	cargo build --release --target=$(RUST_CROSS_COMPILE_TARGET)
+	mv -f target/$(RUST_CROSS_COMPILE_TARGET)/release/wol bin/
+else
+	cargo test
+	cargo build --release
+	mv -f target/release/wol bin/
+endif
+
+clean:
+	rm -rf target
+	rm -rf bin
\ No newline at end of file
diff --git a/src/sonic-nettools/debian/changelog b/src/sonic-nettools/debian/changelog
new file mode 100644
index 000000000..6123545b5
--- /dev/null
+++ b/src/sonic-nettools/debian/changelog
@@ -0,0 +1,5 @@
+sonic-nettools (0.0.1-0) UNRELEASED; urgency=medium
+
+  * Initial release.
+
+ -- Wenda Chu <wendachu@microsoft.com>  Mon, 10 Jun 2024 12:49:43 -0700
diff --git a/src/sonic-nettools/debian/compat b/src/sonic-nettools/debian/compat
new file mode 100644
index 000000000..48082f72f
--- /dev/null
+++ b/src/sonic-nettools/debian/compat
@@ -0,0 +1 @@
+12
diff --git a/src/sonic-nettools/debian/control b/src/sonic-nettools/debian/control
new file mode 100644
index 000000000..b77ec470e
--- /dev/null
+++ b/src/sonic-nettools/debian/control
@@ -0,0 +1,9 @@
+Source: sonic-nettools
+Maintainer: Wenda Chu <wendachu@microsoft.com>
+Standards-Version: 0.0.1
+Section: custom
+
+Package: sonic-nettools
+Priority: optional
+Architecture: any
+Description: Networking command line tools
diff --git a/src/sonic-nettools/debian/install b/src/sonic-nettools/debian/install
new file mode 100644
index 000000000..902a82982
--- /dev/null
+++ b/src/sonic-nettools/debian/install
@@ -0,0 +1 @@
+bin/wol /usr/bin/
diff --git a/src/sonic-nettools/debian/rules b/src/sonic-nettools/debian/rules
new file mode 100755
index 000000000..cbe925d75
--- /dev/null
+++ b/src/sonic-nettools/debian/rules
@@ -0,0 +1,3 @@
+#!/usr/bin/make -f
+%:
+	dh $@
diff --git a/src/sonic-nettools/wol/Cargo.toml b/src/sonic-nettools/wol/Cargo.toml
new file mode 100644
index 000000000..6b2276e79
--- /dev/null
+++ b/src/sonic-nettools/wol/Cargo.toml
@@ -0,0 +1,7 @@
+[package]
+name = "wol"
+version = "0.0.1"
+
+[dependencies]
+pnet = "0.35.0"
+clap = { version  = "4.5.7", features = ["derive"] }
diff --git a/src/sonic-nettools/wol/src/main.rs b/src/sonic-nettools/wol/src/main.rs
new file mode 100644
index 000000000..c04ba9411
--- /dev/null
+++ b/src/sonic-nettools/wol/src/main.rs
@@ -0,0 +1,13 @@
+mod wol;
+
+extern crate clap;
+extern crate pnet;
+
+fn main() {
+    if let Err(e) = wol::build_and_send() {
+        eprintln!("Error: {}", e.msg);
+        std::process::exit(e.code);
+    } else {
+        std::process::exit(0);
+    }
+}
diff --git a/src/sonic-nettools/wol/src/wol.rs b/src/sonic-nettools/wol/src/wol.rs
new file mode 100644
index 000000000..b5d598d36
--- /dev/null
+++ b/src/sonic-nettools/wol/src/wol.rs
@@ -0,0 +1,687 @@
+use clap::builder::ArgPredicate;
+use clap::Parser;
+use pnet::datalink::Channel::Ethernet;
+use pnet::datalink::{self, DataLinkSender, MacAddr, NetworkInterface};
+use std::fs::read_to_string;
+use std::result::Result;
+use std::str::FromStr;
+use std::thread;
+use std::time::Duration;
+
+const BROADCAST_MAC: [u8; 6] = [0xff, 0xff, 0xff, 0xff, 0xff, 0xff];
+
+#[derive(Parser, Debug)]
+#[command(
+    next_line_help = true,
+    about = "
+This tool can generate and send wake on LAN magic packets with target interface and mac
+
+Examples:
+    wol Ethernet10 00:11:22:33:44:55
+    wol Ethernet10 00:11:22:33:44:55 -b
+    wol Vlan1000 00:11:22:33:44:55,11:33:55:77:99:bb -p 00:22:44:66:88:aa
+    wol Vlan1000 00:11:22:33:44:55,11:33:55:77:99:bb -p 192.168.1.1 -c 3 -i 2000"
+)]
+struct WolArgs {
+    /// The name of the network interface to send the magic packet through
+    interface: String,
+
+    /// The MAC address of the target device, formatted as a colon-separated string (e.g. "00:11:22:33:44:55")
+    target_mac: String,
+
+    /// The flag to indicate if use broadcast MAC address instead of target device's MAC address as Destination MAC Address in Ethernet Frame Header [default: false]
+    #[arg(short, long, default_value_t = false)]
+    broadcast: bool,
+
+    /// An optional 4 or 6 byte password, in ethernet hex format or quad-dotted decimal (e.g. "127.0.0.1" or "00:11:22:33:44:55")
+    #[arg(short, long, value_parser = parse_password)]
+    password: Option<Password>,
+
+    /// For each target MAC address, the count of magic packets to send. count must between 1 and 5. This param must use with -i. [default: 1]
+    #[arg(
+        short,
+        long,
+        default_value_t = 1,
+        requires_if(ArgPredicate::IsPresent, "interval")
+    )]
+    count: u8,
+
+    /// Wait interval milliseconds between sending each magic packet. interval must between 0 and 2000. This param must use with -c. [default: 0]
+    #[arg(
+        short,
+        long,
+        default_value_t = 0,
+        requires_if(ArgPredicate::IsPresent, "count")
+    )]
+    interval: u64,
+
+    /// The flag to indicate if we should print verbose output
+    #[arg(short, long)]
+    verbose: bool,
+}
+
+#[derive(Debug, Clone)]
+struct Password(Vec<u8>);
+
+impl Password {
+    fn ref_bytes(&self) -> &Vec<u8> {
+        &self.0
+    }
+}
+
+#[derive(Debug)]
+pub struct WolErr {
+    pub msg: String,
+    pub code: i32,
+}
+
+impl std::error::Error for WolErr {}
+
+impl std::fmt::Display for WolErr {
+    fn fmt(&self, f: &mut std::fmt::Formatter<'_>) -> std::fmt::Result {
+        write!(f, "Error: {}", self.msg)
+    }
+}
+
+enum WolErrCode {
+    SocketError = 1,
+    InvalidArguments = 2,
+    UnknownError = 999,
+}
+
+pub fn build_and_send() -> Result<(), WolErr> {
+    let args = WolArgs::parse();
+    let target_macs = parse_target_macs(&args)?;
+    valide_arguments(&args)?;
+    let src_mac = get_interface_mac(&args.interface)?;
+    let mut tx = open_tx_channel(&args.interface)?;
+    for target_mac in target_macs {
+        if args.verbose {
+            println!(
+                "Building and sending packet to target mac address {}",
+                target_mac
+                    .iter()
+                    .map(|b| format!("{:02X}", b))
+                    .collect::<Vec<String>>()
+                    .join(":")
+            );
+        }
+        let dst_mac = if args.broadcast {
+            BROADCAST_MAC
+        } else {
+            target_mac
+        };
+        let magic_bytes = build_magic_packet(&src_mac, &dst_mac, &target_mac, &args.password)?;
+        send_magic_packet(
+            &mut tx,
+            magic_bytes,
+            &args.count,
+            &args.interval,
+            &args.verbose,
+        )?;
+    }
+
+    Ok(())
+}
+
+fn valide_arguments(args: &WolArgs) -> Result<(), WolErr> {
+    if !is_operstate_up(&args.interface)? {
+        return Err(WolErr {
+            msg: format!(
+                "Invalid value for \"INTERFACE\": interface {} is not up",
+                args.interface
+            ),
+            code: WolErrCode::InvalidArguments as i32,
+        });
+    }
+
+    if args.interval > 2000 {
+        return Err(WolErr {
+            msg: String::from("Invalid value for \"INTERVAL\": interval must between 0 and 2000"),
+            code: WolErrCode::InvalidArguments as i32,
+        });
+    }
+
+    if args.count == 0 || args.count > 5 {
+        return Err(WolErr {
+            msg: String::from("Invalid value for \"COUNT\": count must between 1 and 5"),
+            code: WolErrCode::InvalidArguments as i32,
+        });
+    }
+
+    Ok(())
+}
+
+fn parse_mac_addr(mac_str: &str) -> Result<[u8; 6], WolErr> {
+    MacAddr::from_str(mac_str)
+        .map(|mac| mac.octets())
+        .map_err(|_| WolErr {
+            msg: String::from("Invalid MAC address"),
+            code: WolErrCode::InvalidArguments as i32,
+        })
+}
+
+fn parse_ipv4_addr(ipv4_str: &str) -> Result<Vec<u8>, WolErr> {
+    if !is_ipv4_address_valid(ipv4_str) {
+        Err(WolErr {
+            msg: String::from("Invalid IPv4 address"),
+            code: WolErrCode::InvalidArguments as i32,
+        })
+    } else {
+        ipv4_str
+            .split('.')
+            .map(|octet| octet.parse::<u8>())
+            .collect::<Result<Vec<u8>, _>>()
+            .map_err(|_| WolErr {
+                msg: String::from("Invalid IPv4 address"),
+                code: WolErrCode::InvalidArguments as i32,
+            })
+    }
+}
+
+fn parse_password(password: &str) -> Result<Password, WolErr> {
+    if is_ipv4_address_valid(password) {
+        Ok(Password(parse_ipv4_addr(password)?))
+    } else if is_mac_string_valid(password) {
+        parse_mac_addr(password).map(|mac| Password(mac.to_vec()))
+    } else {
+        Err(WolErr {
+            msg: String::from("Invalid password"),
+            code: WolErrCode::InvalidArguments as i32,
+        })
+    }
+}
+
+fn parse_target_macs(args: &WolArgs) -> Result<Vec<[u8; 6]>, WolErr> {
+    let target_macs: Vec<&str> = args.target_mac.split(',').collect();
+    let mut macs = Vec::new();
+    for mac_str in target_macs {
+        macs.push(parse_mac_addr(mac_str)?);
+    }
+    Ok(macs)
+}
+
+fn is_operstate_up(interface: &str) -> Result<bool, WolErr> {
+    let state_file_path = format!("/sys/class/net/{}/operstate", interface);
+    match read_to_string(state_file_path) {
+        Ok(content) => Ok(content.trim() == "up"),
+        Err(_) => Err(WolErr {
+            msg: format!(
+                "Invalid value for \"INTERFACE\": invalid SONiC interface name {}",
+                interface
+            ),
+            code: WolErrCode::InvalidArguments as i32,
+        }),
+    }
+}
+
+fn is_mac_string_valid(mac_str: &str) -> bool {
+    let mac_str = mac_str.replace(':', "");
+    mac_str.len() == 12 && mac_str.chars().all(|c| c.is_ascii_hexdigit())
+}
+
+fn is_ipv4_address_valid(ipv4_str: &str) -> bool {
+    ipv4_str.split('.').count() == 4
+        && ipv4_str
+            .split('.')
+            .all(|octet| octet.parse::<u64>().map_or(false, |n| n < 256))
+}
+
+fn get_interface_mac(interface_name: &String) -> Result<[u8; 6], WolErr> {
+    if let Some(interface) = datalink::interfaces()
+        .into_iter()
+        .find(|iface: &NetworkInterface| iface.name == *interface_name)
+    {
+        if let Some(mac) = interface.mac {
+            Ok(mac.octets())
+        } else {
+            Err(WolErr {
+                msg: String::from("Could not get MAC address of target interface"),
+                code: WolErrCode::UnknownError as i32,
+            })
+        }
+    } else {
+        Err(WolErr {
+            msg: String::from("Could not find target interface"),
+            code: WolErrCode::InvalidArguments as i32,
+        })
+    }
+}
+
+fn build_magic_packet(
+    src_mac: &[u8; 6],
+    dst_mac: &[u8; 6],
+    target_mac: &[u8; 6],
+    password: &Option<Password>,
+) -> Result<Vec<u8>, WolErr> {
+    let password_len = password.as_ref().map_or(0, |p| p.ref_bytes().len());
+    let mut pkt = vec![0u8; 116 + password_len];
+    pkt[0..6].copy_from_slice(dst_mac);
+    pkt[6..12].copy_from_slice(src_mac);
+    pkt[12..14].copy_from_slice(&[0x08, 0x42]);
+    pkt[14..20].copy_from_slice(&[0xff; 6]);
+    pkt[20..116].copy_from_slice(&target_mac.repeat(16));
+    if let Some(p) = password {
+        pkt[116..116 + password_len].copy_from_slice(p.ref_bytes());
+    }
+    Ok(pkt)
+}
+
+fn send_magic_packet(
+    tx: &mut Box<dyn DataLinkSender>,
+    packet: Vec<u8>,
+    count: &u8,
+    interval: &u64,
+    verbose: &bool,
+) -> Result<(), WolErr> {
+    for nth in 0..*count {
+        match tx.send_to(&packet, None) {
+            Some(Ok(_)) => {}
+            Some(Err(e)) => {
+                return Err(WolErr {
+                    msg: format!("Network is down: {}", e),
+                    code: WolErrCode::SocketError as i32,
+                });
+            }
+            None => {
+                return Err(WolErr {
+                    msg: String::from("Network is down"),
+                    code: WolErrCode::SocketError as i32,
+                });
+            }
+        }
+        if *verbose {
+            println!(
+                "  | -> Sent the {}th packet and sleep for {} seconds",
+                &nth + 1,
+                &interval
+            );
+            println!(
+                "    | -> Packet bytes in hex {}",
+                &packet
+                    .iter()
+                    .fold(String::new(), |acc, b| acc + &format!("{:02X}", b))
+            )
+        }
+        thread::sleep(Duration::from_millis(*interval));
+    }
+    Ok(())
+}
+
+fn open_tx_channel(interface: &str) -> Result<Box<dyn DataLinkSender>, WolErr> {
+    if let Some(interface) = datalink::interfaces()
+        .into_iter()
+        .find(|iface: &NetworkInterface| iface.name == interface)
+    {
+        match datalink::channel(&interface, Default::default()) {
+            Ok(Ethernet(tx, _)) => Ok(tx),
+            Ok(_) => Err(WolErr {
+                msg: String::from("Network is down"),
+                code: WolErrCode::SocketError as i32,
+            }),
+            Err(e) => Err(WolErr {
+                msg: format!("Network is down: {}", e),
+                code: WolErrCode::SocketError as i32,
+            }),
+        }
+    } else {
+        Err(WolErr {
+            msg: format!(
+                "Invalid value for \"INTERFACE\": interface {} is not up",
+                interface
+            ),
+            code: WolErrCode::InvalidArguments as i32,
+        })
+    }
+}
+
+#[cfg(test)]
+mod tests {
+    use super::*;
+
+    #[test]
+    fn test_parse_mac_addr() {
+        let mac_str = "00:11:22:33:44:55";
+        let mac = parse_mac_addr(mac_str).unwrap();
+        assert_eq!(mac, [0x00, 0x11, 0x22, 0x33, 0x44, 0x55]);
+
+        let mac_str = "00:11:22:33:44:GG";
+        assert!(parse_mac_addr(mac_str).is_err());
+        assert_eq!(
+            parse_mac_addr(mac_str).unwrap_err().msg,
+            "Invalid MAC address"
+        );
+        assert_eq!(
+            parse_mac_addr(mac_str).unwrap_err().code,
+            WolErrCode::InvalidArguments as i32
+        );
+
+        let mac_str = "00-01-22-33-44-55";
+        assert!(parse_mac_addr(mac_str).is_err());
+        assert_eq!(
+            parse_mac_addr(mac_str).unwrap_err().msg,
+            "Invalid MAC address"
+        );
+        assert_eq!(
+            parse_mac_addr(mac_str).unwrap_err().code,
+            WolErrCode::InvalidArguments as i32
+        );
+    }
+
+    #[test]
+    fn test_parse_ipv4_addr() {
+        let ipv4_str = "127.0.0.1";
+        let ipv4 = parse_ipv4_addr(ipv4_str).unwrap();
+        assert_eq!(ipv4, [127, 0, 0, 1]);
+
+        let ipv4_str = "127.0.0.256";
+        assert!(parse_ipv4_addr(ipv4_str).is_err());
+        assert_eq!(
+            parse_ipv4_addr(ipv4_str).unwrap_err().msg,
+            "Invalid IPv4 address"
+        );
+        assert_eq!(
+            parse_ipv4_addr(ipv4_str).unwrap_err().code,
+            WolErrCode::InvalidArguments as i32
+        );
+
+        let ipv4_str = "127.0.0";
+        assert!(parse_ipv4_addr(ipv4_str).is_err());
+        assert_eq!(
+            parse_ipv4_addr(ipv4_str).unwrap_err().msg,
+            "Invalid IPv4 address"
+        );
+        assert_eq!(
+            parse_ipv4_addr(ipv4_str).unwrap_err().code,
+            WolErrCode::InvalidArguments as i32
+        );
+
+        let ipv4_str = "::1";
+        assert!(parse_ipv4_addr(ipv4_str).is_err());
+        assert_eq!(
+            parse_ipv4_addr(ipv4_str).unwrap_err().msg,
+            "Invalid IPv4 address"
+        );
+        assert_eq!(
+            parse_ipv4_addr(ipv4_str).unwrap_err().code,
+            WolErrCode::InvalidArguments as i32
+        );
+    }
+
+    #[test]
+    fn test_parse_password() {
+        let password_str = "127.0.0.1";
+        let password = parse_password(password_str);
+        assert_eq!(*password.unwrap().ref_bytes(), [127, 0, 0, 1]);
+
+        let password_str = "00:11:22:33:44:55";
+        let password = parse_password(password_str);
+        assert_eq!(*password.unwrap().ref_bytes(), [0, 17, 34, 51, 68, 85]);
+
+        let password_str = "127.0.0.256";
+        assert!(parse_password(password_str).is_err());
+        assert_eq!(
+            parse_password(password_str).unwrap_err().code,
+            WolErrCode::InvalidArguments as i32
+        );
+
+        let password_str = "127.0.0";
+        assert!(parse_password(password_str).is_err());
+        assert_eq!(
+            parse_password(password_str).unwrap_err().code,
+            WolErrCode::InvalidArguments as i32
+        );
+
+        let password_str = "::1";
+        assert!(parse_password(password_str).is_err());
+        assert_eq!(
+            parse_password(password_str).unwrap_err().code,
+            WolErrCode::InvalidArguments as i32
+        );
+
+        let password_str = "00:11:22:33:44:GG";
+        assert!(parse_password(password_str).is_err());
+        assert_eq!(
+            parse_password(password_str).unwrap_err().code,
+            WolErrCode::InvalidArguments as i32
+        );
+
+        let password_str = "00-01-22-33-44-55";
+        assert!(parse_password(password_str).is_err());
+        assert_eq!(
+            parse_password(password_str).unwrap_err().code,
+            WolErrCode::InvalidArguments as i32
+        );
+    }
+
+    #[test]
+    fn test_parse_target_macs() {
+        let mut args = WolArgs {
+            interface: "Ethernet10".to_string(),
+            target_mac: "00:11:22:33:44:55".to_string(),
+            broadcast: false,
+            password: None,
+            count: 1,
+            interval: 0,
+            verbose: false,
+        };
+        let target_macs = parse_target_macs(&args).unwrap();
+        assert_eq!(target_macs.len(), 1);
+        assert_eq!(target_macs[0], [0x00, 0x11, 0x22, 0x33, 0x44, 0x55]);
+
+        args.target_mac = "00:11:22:33:44:55,11:22:33:44:55:66,22:33:44:55:66:77".to_string();
+        let target_macs = parse_target_macs(&args).unwrap();
+        assert_eq!(target_macs.len(), 3);
+        assert_eq!(target_macs[0], [0x00, 0x11, 0x22, 0x33, 0x44, 0x55]);
+        assert_eq!(target_macs[1], [0x11, 0x22, 0x33, 0x44, 0x55, 0x66]);
+        assert_eq!(target_macs[2], [0x22, 0x33, 0x44, 0x55, 0x66, 0x77]);
+
+        args.target_mac = "00:01".to_string();
+        assert!(parse_target_macs(&args).is_err());
+        assert_eq!(
+            parse_target_macs(&args).unwrap_err().msg,
+            "Invalid MAC address"
+        );
+        assert_eq!(
+            parse_target_macs(&args).unwrap_err().code,
+            WolErrCode::InvalidArguments as i32
+        );
+    }
+
+    #[test]
+    fn test_is_mac_string_valid() {
+        assert!(is_mac_string_valid("00:11:22:33:44:55"));
+        assert!(!is_mac_string_valid(""));
+        assert!(!is_mac_string_valid("0:1:2:3:4:G"));
+        assert!(!is_mac_string_valid("00:11:22:33:44:GG"));
+        assert!(!is_mac_string_valid("00-11-22-33-44-55"));
+        assert!(!is_mac_string_valid("00:11:22:33:44:55:66"));
+    }
+
+    #[test]
+    fn test_is_ipv4_address_valid() {
+        assert!(is_ipv4_address_valid("192.168.1.1"));
+        assert!(!is_ipv4_address_valid(""));
+        assert!(!is_ipv4_address_valid("0::1"));
+        assert!(!is_ipv4_address_valid("192.168.1"));
+        assert!(!is_ipv4_address_valid("192.168.1.256"));
+        assert!(!is_ipv4_address_valid("192.168.1.1.1"));
+    }
+
+    #[test]
+    fn test_build_magic_packet() {
+        let src_mac = [0x00, 0x11, 0x22, 0x33, 0x44, 0x55];
+        let target_mac = [0xff, 0xff, 0xff, 0xff, 0xff, 0xff];
+        let four_bytes_password = Some(Password(vec![0x00, 0x11, 0x22, 0x33]));
+        let magic_packet =
+            build_magic_packet(&src_mac, &target_mac, &target_mac, &four_bytes_password).unwrap();
+        assert_eq!(magic_packet.len(), 120);
+        assert_eq!(&magic_packet[0..6], &target_mac);
+        assert_eq!(&magic_packet[6..12], &src_mac);
+        assert_eq!(&magic_packet[12..14], &[0x08, 0x42]);
+        assert_eq!(&magic_packet[14..20], &[0xff; 6]);
+        assert_eq!(&magic_packet[20..116], target_mac.repeat(16));
+        assert_eq!(&magic_packet[116..120], &[0x00, 0x11, 0x22, 0x33]);
+        let six_bytes_password = Some(Password(vec![0x00, 0x11, 0x22, 0x33, 0x44, 0x55]));
+        let magic_packet =
+            build_magic_packet(&src_mac, &target_mac, &target_mac, &six_bytes_password).unwrap();
+        assert_eq!(magic_packet.len(), 122);
+        assert_eq!(&magic_packet[0..6], &target_mac);
+        assert_eq!(&magic_packet[6..12], &src_mac);
+        assert_eq!(&magic_packet[12..14], &[0x08, 0x42]);
+        assert_eq!(&magic_packet[14..20], &[0xff; 6]);
+        assert_eq!(&magic_packet[20..116], target_mac.repeat(16));
+        assert_eq!(
+            &magic_packet[116..122],
+            &[0x00, 0x11, 0x22, 0x33, 0x44, 0x55]
+        );
+    }
+
+    #[test]
+    fn test_build_magic_packet_without_password() {
+        let src_mac = [0x00, 0x11, 0x22, 0x33, 0x44, 0x55];
+        let dst_mac = [0xff, 0xff, 0xff, 0xff, 0xff, 0xff];
+        let target_mac = [0x01, 0x02, 0x03, 0x04, 0x05, 0x06];
+        let magic_packet = build_magic_packet(&src_mac, &dst_mac, &target_mac, &None).unwrap();
+        assert_eq!(magic_packet.len(), 116);
+        assert_eq!(&magic_packet[0..6], &dst_mac);
+        assert_eq!(&magic_packet[6..12], &src_mac);
+        assert_eq!(&magic_packet[12..14], &[0x08, 0x42]);
+        assert_eq!(&magic_packet[14..20], &[0xff; 6]);
+        assert_eq!(&magic_packet[20..116], target_mac.repeat(16));
+    }
+
+    #[test]
+    fn verify_args_parse() {
+        // Interface and target mac are required
+        let result = WolArgs::try_parse_from(&["wol", "eth0", "00:11:22:33:44:55"]);
+        assert!(result.as_ref().is_ok_and(|a| a.interface == "eth0"));
+        assert!(result.is_ok_and(|a| a.target_mac == "00:11:22:33:44:55"));
+        let result = WolArgs::try_parse_from(&["wol"]);
+        assert!(result.is_err());
+        assert_eq!(
+            result.unwrap_err().to_string(),
+            "error: the following required arguments were not provided:\n  <INTERFACE>\n  <TARGET_MAC>\n\nUsage: wol <INTERFACE> <TARGET_MAC>\n\nFor more information, try '--help'.\n"
+        );
+        // Mac address should valid
+        let args =
+            WolArgs::try_parse_from(&["wol", "Ethernet10", "00:11:22:33:44:55,00:01:02:03:04:05"])
+                .unwrap();
+        let macs = parse_target_macs(&args).unwrap();
+        assert_eq!(macs.len(), 2);
+        assert_eq!(macs[0], [0x00, 0x11, 0x22, 0x33, 0x44, 0x55]);
+        assert_eq!(macs[1], [0x00, 0x01, 0x02, 0x03, 0x04, 0x05]);
+        let args = WolArgs::try_parse_from(&["wol", "Ethernet10", "00:11:22:33:44:GG"]).unwrap();
+        let result: Result<Vec<[u8; 6]>, WolErr> = parse_target_macs(&args);
+        assert!(result.is_err());
+        assert_eq!(result.as_ref().unwrap_err().msg, "Invalid MAC address");
+        assert_eq!(
+            result.unwrap_err().code,
+            WolErrCode::InvalidArguments as i32
+        );
+        // Password can be set
+        let args = WolArgs::try_parse_from(&[
+            "wol",
+            "eth0",
+            "00:01:02:03:04:05",
+            "-b",
+            "-p",
+            "192.168.0.0",
+        ])
+        .unwrap();
+        assert_eq!(args.password.unwrap().ref_bytes(), &[192, 168, 0, 0]);
+        let args = WolArgs::try_parse_from(&[
+            "wol",
+            "eth0",
+            "00:01:02:03:04:05",
+            "-b",
+            "-p",
+            "00:01:02:03:04:05",
+        ])
+        .unwrap();
+        assert_eq!(args.password.unwrap().ref_bytes(), &[0, 1, 2, 3, 4, 5]);
+        let result = WolArgs::try_parse_from(&["wol", "eth0", "-b", "-p", "xxx"]);
+        assert!(result.is_err());
+        assert_eq!(result.unwrap_err().to_string(), "error: invalid value 'xxx' for '--password <PASSWORD>': Error: Invalid password\n\nFor more information, try '--help'.\n");
+        // Count should be between 1 and 5
+        let args = WolArgs::try_parse_from(&["wol", "eth0", "00:01:02:03:04:05", "-b"]).unwrap();
+        assert_eq!(args.count, 1); // default value
+        let args = WolArgs::try_parse_from(&[
+            "wol",
+            "eth0",
+            "00:01:02:03:04:05",
+            "-b",
+            "-c",
+            "5",
+            "-i",
+            "0",
+        ])
+        .unwrap();
+        assert_eq!(args.count, 5);
+        let args = WolArgs::try_parse_from(&[
+            "wol",
+            "eth0",
+            "00:01:02:03:04:05",
+            "-b",
+            "-c",
+            "0",
+            "-i",
+            "0",
+        ]);
+        let result = valide_arguments(&args.unwrap());
+        assert!(result.is_err());
+        assert_eq!(
+            result.unwrap_err().to_string(),
+            "Error: Invalid value for \"COUNT\": count must between 1 and 5"
+        );
+        // Interval should be between 0 and 2000
+        let args = WolArgs::try_parse_from(&["wol", "eth0", "00:01:02:03:04:05", "-b"]).unwrap();
+        assert_eq!(args.interval, 0); // default value
+        let args = WolArgs::try_parse_from(&[
+            "wol",
+            "eth0",
+            "00:01:02:03:04:05",
+            "-b",
+            "-i",
+            "2000",
+            "-c",
+            "0",
+        ])
+        .unwrap();
+        assert_eq!(args.interval, 2000);
+        let args = WolArgs::try_parse_from(&[
+            "wol",
+            "eth0",
+            "00:01:02:03:04:05",
+            "-b",
+            "-i",
+            "2001",
+            "-c",
+            "0",
+        ]);
+        let result = valide_arguments(&args.unwrap());
+        assert!(result.is_err());
+        assert_eq!(
+            result.unwrap_err().to_string(),
+            "Error: Invalid value for \"INTERVAL\": interval must between 0 and 2000"
+        );
+        // Interval and count should specified together
+        let result = WolArgs::try_parse_from(&["wol", "eth0", "00:01:02:03:04:05", "-i", "2000"]);
+        assert!(result.is_err());
+        assert_eq!(
+            result.unwrap_err().to_string(),
+            "error: the following required arguments were not provided:\n  --count <COUNT>\n\nUsage: wol --interval <INTERVAL> --count <COUNT> <INTERFACE> <TARGET_MAC>\n\nFor more information, try '--help'.\n"
+        );
+        let result = WolArgs::try_parse_from(&["wol", "eth0", "00:01:02:03:04:05", "-c", "1"]);
+        assert!(result.is_err());
+        assert_eq!(
+            result.unwrap_err().to_string(),
+            "error: the following required arguments were not provided:\n  --interval <INTERVAL>\n\nUsage: wol --count <COUNT> --interval <INTERVAL> <INTERFACE> <TARGET_MAC>\n\nFor more information, try '--help'.\n"
+        );
+        // Verbose can be set
+        let args =
+            WolArgs::try_parse_from(&["wol", "eth0", "00:01:02:03:04:05", "-b", "--verbose"])
+                .unwrap();
+        assert_eq!(args.verbose, true);
+    }
+}

From 7919c4f0a45b821050e0c220d4ffecc1a37e90d4 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sat, 17 Aug 2024 16:01:17 +0800
Subject: [PATCH 0905/1115] [submodule] Update submodule sonic-platform-daemons
 to the latest HEAD automatically (#19922)

#### Why I did it
src/sonic-platform-daemons
```
* b3189e3 - (HEAD -> master, origin/master, origin/HEAD) [chassis][pmon][chassid] Enhance the chassid module on-line or off-line log messages with physical slot number (#530) (30 hours ago) [Marty Y. Lok]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-platform-daemons | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-platform-daemons b/src/sonic-platform-daemons
index bf865c6b7..b3189e32d 160000
--- a/src/sonic-platform-daemons
+++ b/src/sonic-platform-daemons
@@ -1 +1 @@
-Subproject commit bf865c6b711833347d3c57e9d84cd366bcd1b776
+Subproject commit b3189e32dcc070c09bf575ed7366b6930c50d9ef

From 7e063f791cc846ad0529dd8ba196082a5740897a Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sun, 18 Aug 2024 19:42:05 +0800
Subject: [PATCH 0906/1115] [submodule] Update submodule sonic-gnmi to the
 latest HEAD automatically (#19896)

#### Why I did it
src/sonic-gnmi
```
* 64ed32b - (HEAD -> master, origin/master, origin/HEAD) Merge pull request #274 from isabelmsft/file_stat_gnoi (5 days ago) [isabelmsft]
* 46df786 - fix spacing (8 days ago) [isabelmsft]
* 894ffe6 - fix spacing (8 days ago) [isabelmsft]
* 6fe7d32 - fix formatting (8 days ago) [isabelmsft]
* 6b435c9 - uncomment check (2 weeks ago) [isabelmsft]
* 302ca17 - increase coverage (2 weeks ago) [isabelmsft]
* 0b2cb90 - fix local test (2 weeks ago) [isabelmsft]
* 7c392c8 - fix syntax (2 weeks ago) [isabelmsft]
* e06641d - inc cov atmpt (2 weeks ago) [isabelmsft]
* 328e631 - Merge branch 'file_stat_gnoi' of https://github.com/isabelmsft/sonic-gnmi into file_stat_gnoi (3 weeks ago) [isabelmsft]
|\
| failure_prs.log 8944bb1 - Merge branch 'master' into file_stat_gnoi (3 weeks ago) [isabelmsft]
* | 14bf34a - update test (3 weeks ago) [isabelmsft]
|/
* ad0e226 - add UT, clean error (3 weeks ago) [isabelmsft]
* 34a94d6 - update (3 weeks ago) [isabelmsft]
* d860f28 - update file system (3 weeks ago) [isabelmsft]
* 36ec608 - update (3 weeks ago) [isabelmsft]
* 3430dd2 - update (3 weeks ago) [isabelmsft]
* 0b70222 - update (3 weeks ago) [isabelmsft]
* 5236768 - update (3 weeks ago) [isabelmsft]
* 0fe0971 - feature change (3 weeks ago) [isabelmsft]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-gnmi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-gnmi b/src/sonic-gnmi
index 015de9423..64ed32b71 160000
--- a/src/sonic-gnmi
+++ b/src/sonic-gnmi
@@ -1 +1 @@
-Subproject commit 015de9423ae81a0d4c6db9fa4b69f89c631d8862
+Subproject commit 64ed32b715e1673c3376701ee192d6292f5ec0ec

From fdc6fb608cb667267f232587543ee7f55f52b3ea Mon Sep 17 00:00:00 2001
From: jingwenxie <jingwenxie@microsoft.com>
Date: Mon, 19 Aug 2024 10:34:33 +0000
Subject: [PATCH 0907/1115] Revert "check internface status before start bgp
 (#19189)" (#19939)

This reverts commit 08f8cb6b9c60b8c6c628ff2973e2a9a5ef5032cc.
---
 dockers/docker-fpm-frr/Dockerfile.j2          |  1 -
 .../docker-fpm-frr/bgpd_wait_for_intf.sh.j2   | 70 -------------------
 dockers/docker-fpm-frr/docker_init.sh         |  3 -
 .../frr/supervisord/supervisord.conf.j2       | 14 +---
 4 files changed, 1 insertion(+), 87 deletions(-)
 delete mode 100755 dockers/docker-fpm-frr/bgpd_wait_for_intf.sh.j2

diff --git a/dockers/docker-fpm-frr/Dockerfile.j2 b/dockers/docker-fpm-frr/Dockerfile.j2
index 7ac3e8839..98c459381 100644
--- a/dockers/docker-fpm-frr/Dockerfile.j2
+++ b/dockers/docker-fpm-frr/Dockerfile.j2
@@ -54,7 +54,6 @@ COPY ["TSC", "/usr/bin/TSC"]
 COPY ["TS", "/usr/bin/TS"]
 COPY ["files/supervisor-proc-exit-listener", "/usr/bin"]
 COPY ["zsocket.sh", "/usr/bin/"]
-COPY ["bgpd_wait_for_intf.sh.j2", "/usr/share/sonic/templates/"]
 RUN chmod a+x /usr/bin/TSA && \
     chmod a+x /usr/bin/TSB && \
     chmod a+x /usr/bin/TSC && \
diff --git a/dockers/docker-fpm-frr/bgpd_wait_for_intf.sh.j2 b/dockers/docker-fpm-frr/bgpd_wait_for_intf.sh.j2
deleted file mode 100755
index ef014d103..000000000
--- a/dockers/docker-fpm-frr/bgpd_wait_for_intf.sh.j2
+++ /dev/null
@@ -1,70 +0,0 @@
-#!/usr/bin/env bash
-
-# Define global timeout in seconds
-GLOBAL_TIMEOUT=60
-GLOBAL_TIMEOUT_REACHED="false"
-
-function wait_iface_ready
-{
-    IFACE_NAME=$1
-    IFACE_CIDR=$2
-    START_TIME=$3
-
-    # First phase: wait for all interfaces until the global timeout is reached
-    while [ "$GLOBAL_TIMEOUT_REACHED" == "false" ]; do
-        CURRENT_TIME=$(date +%s.%N)
-        ELAPSED_TIME=$(awk -v current_time=$CURRENT_TIME -v start_time=$START_TIME 'BEGIN {print current_time - start_time}')
-
-        # Check if global timeout is reached
-        if (( $(awk -v elapsed_time=$ELAPSED_TIME -v global_timeout=$GLOBAL_TIMEOUT 'BEGIN {print (elapsed_time >= global_timeout)}') )); then
-            GLOBAL_TIMEOUT_REACHED="true"
-            break
-        fi
-
-        RESULT=$(sonic-db-cli STATE_DB HGET "INTERFACE_TABLE|${IFACE_NAME}|${IFACE_CIDR}" "state" 2> /dev/null)
-        if [ x"$RESULT" == x"ok" ]; then
-            return 0
-        fi
-        sleep 0.5
-    done
-
-    # Second phase: apply per-interface timeout
-    # Counter to track the number of iterations
-    ITERATION=0
-    while [ $ITERATION -lt 3 ]; do
-        RESULT=$(sonic-db-cli STATE_DB HGET "INTERFACE_TABLE|${IFACE_NAME}|${IFACE_CIDR}" "state" 2> /dev/null)
-        if [ x"$RESULT" == x"ok" ]; then
-            return 0
-        fi
-
-        sleep 0.5
-        ((ITERATION++))
-    done
-
-    logger -p warning "[bgpd] warning: Interface ${IFACE_NAME} not ready."
-    return 1
-}
-
-start=$(date +%s.%N)
-
-{% for (name, prefix) in INTERFACE|pfx_filter %}
-{% if prefix | ipv4 %}
-wait_iface_ready {{ name }} {{ prefix }} $start
-{% endif %}
-{% endfor %}
-
-{% for (name, prefix) in VLAN_INTERFACE|pfx_filter %}
-{% if prefix | ipv4 %}
-wait_iface_ready {{ name }} {{ prefix }} $start
-{% endif %}
-{% endfor %}
-
-{% for (name, prefix) in PORTCHANNEL_INTERFACE|pfx_filter %}
-{% if prefix | ipv4 %}
-wait_iface_ready {{ name }} {{ prefix }} $start
-{% endif %}
-{% endfor %}
-
-end=$(date +%s.%N)
-timespan=$(awk -v start=$start -v end=$end 'BEGIN {print end - start}')
-logger -p info "[bgpd] It took ${timespan} seconds for interfaces to become ready"
diff --git a/dockers/docker-fpm-frr/docker_init.sh b/dockers/docker-fpm-frr/docker_init.sh
index f60c5327a..0ed274ec7 100755
--- a/dockers/docker-fpm-frr/docker_init.sh
+++ b/dockers/docker-fpm-frr/docker_init.sh
@@ -11,7 +11,6 @@ CFGGEN_PARAMS=" \
     -t /usr/share/sonic/templates/supervisord/critical_processes.j2,/etc/supervisor/critical_processes \
     -t /usr/share/sonic/templates/isolate.j2,/usr/sbin/bgp-isolate \
     -t /usr/share/sonic/templates/unisolate.j2,/usr/sbin/bgp-unisolate \
-    -t /usr/share/sonic/templates/bgpd_wait_for_intf.sh.j2,/usr/bin/bgpd_wait_for_intf.sh \
 "
 
 FRR_VARS=$(sonic-cfggen $CFGGEN_PARAMS)
@@ -112,6 +111,4 @@ TZ=$(cat /etc/timezone)
 rm -rf /etc/localtime
 ln -sf /usr/share/zoneinfo/$TZ /etc/localtime
 
-chmod +x /usr/bin/bgpd_wait_for_intf.sh
-
 exec /usr/local/bin/supervisord
diff --git a/dockers/docker-fpm-frr/frr/supervisord/supervisord.conf.j2 b/dockers/docker-fpm-frr/frr/supervisord/supervisord.conf.j2
index 0e12fb62b..4ee96cf84 100644
--- a/dockers/docker-fpm-frr/frr/supervisord/supervisord.conf.j2
+++ b/dockers/docker-fpm-frr/frr/supervisord/supervisord.conf.j2
@@ -76,18 +76,6 @@ dependent_startup=true
 dependent_startup_wait_for=zebra:running
 {% endif %}
 
-[program:bgpd_wait_for_intf]
-command=/usr/bin/bgpd_wait_for_intf.sh
-priority=5
-stopsignal=KILL
-autostart=false
-autorestart=false
-startsecs=0
-stdout_logfile=syslog
-stderr_logfile=syslog
-dependent_startup=true
-dependent_startup_wait_for=zsocket:exited
-
 [program:bgpd]
 command=/usr/lib/frr/bgpd -A 127.0.0.1 -M snmp
 priority=5
@@ -98,7 +86,7 @@ startsecs=0
 stdout_logfile=syslog
 stderr_logfile=syslog
 dependent_startup=true
-dependent_startup_wait_for=bgpd_wait_for_intf:exited
+dependent_startup_wait_for=zsocket:exited
 
 {% if DEVICE_METADATA.localhost.frr_mgmt_framework_config is defined and DEVICE_METADATA.localhost.frr_mgmt_framework_config == "true" %}
 [program:ospfd]

From 544eb2ab0cbd0120909b4a6cb8c62abadcab79e9 Mon Sep 17 00:00:00 2001
From: Arun Saravanan Balachandran
 <52521751+ArunSaravananBalachandran@users.noreply.github.com>
Date: Mon, 19 Aug 2024 23:13:26 +0530
Subject: [PATCH 0908/1115] [Dell] S6100 - Do not modify reboot-cause.txt
 (#19908)

---
 .../s6100/scripts/track_reboot_reason.sh        | 17 -----------------
 1 file changed, 17 deletions(-)

diff --git a/platform/broadcom/sonic-platform-modules-dell/s6100/scripts/track_reboot_reason.sh b/platform/broadcom/sonic-platform-modules-dell/s6100/scripts/track_reboot_reason.sh
index 5dbb3e4c9..d6b768ff7 100755
--- a/platform/broadcom/sonic-platform-modules-dell/s6100/scripts/track_reboot_reason.sh
+++ b/platform/broadcom/sonic-platform-modules-dell/s6100/scripts/track_reboot_reason.sh
@@ -5,7 +5,6 @@ reboot_file_found=false
 smf_dir_missing=0
 nvram_missing=0
 
-REBOOT_CAUSE_FILE=/host/reboot-cause/reboot-cause.txt
 REBOOT_REASON_FILE=/host/reboot-cause/platform/reboot_reason
 BIOS_VERSION_FILE=/host/reboot-cause/platform/bios_minor_version
 SMF_MSS_VERSION_FILE=/sys/devices/platform/SMF.512/hwmon/*/smf_firmware_ver
@@ -134,20 +133,6 @@ _is_watchdog_reset(){
     return
 }
 
-_is_unknown_reset(){
-    if [[ -f $REBOOT_CAUSE_FILE ]]; then
-        if [[ $1 = 0 ]]; then
-            echo "Unknown software reboot" > $REBOOT_CAUSE_FILE
-            return
-        fi
-        curr_poweron_reason=$(cat $SMF_POWERON_REASON)
-        curr_reset_reason=$SMF_RESET
-        mb_poweron_reason=$(cat $MAILBOX_POWERON_REASON)
-        echo "Unknown POR: $curr_poweron_reason RST: $curr_reset_reason MBR: $mb_poweron_reason" > $REBOOT_CAUSE_FILE
-    fi
-
-}
-
 _is_software_reboot(){
     SMF_STATUS=`io_rd_wr.py --set --val 06 --offset 210; io_rd_wr.py --set --val 0B --offset 211; io_rd_wr.py --get --offset 212`
     SMF_STATUS=$(echo "$SMF_STATUS" | awk '{print $NF}')
@@ -206,7 +191,6 @@ update_mailbox_register(){
             elif [[ $SMF_RESET = "33" ]]; then
                 echo 0xdd > $MAILBOX_POWERON_REASON
             else
-                echo "Unknown software reboot" > $REBOOT_CAUSE_FILE
                 echo 0x99 > $MAILBOX_POWERON_REASON
             fi
 
@@ -227,7 +211,6 @@ update_mailbox_register(){
             elif [[ $reason = "cc" ]]; then
                 _is_software_reboot
             else
-                _is_unknown_reset $is_thermal_reboot
                 echo 0x99 > $MAILBOX_POWERON_REASON
             fi
         fi

From 674a92fb666b00d90db37666064a58620e70ccb4 Mon Sep 17 00:00:00 2001
From: wenyiz2021 <91497961+wenyiz2021@users.noreply.github.com>
Date: Mon, 19 Aug 2024 11:54:16 -0700
Subject: [PATCH 0909/1115] [DNX SAI] [master] [202405] update to SAI 11
 (#19854)

Microsoft ADO (number only): 28738133

How I did it
- update gpl module 6.5.30 version in saibcm-modules
- build SAI 11.2 with hsdk-all 6.5.30 version
- build master image with SAI 11.2, sdk 6.5.30
---
 platform/broadcom/sai-modules.mk     | 2 +-
 platform/broadcom/sai.mk             | 4 ++--
 platform/broadcom/saibcm-modules-dnx | 2 +-
 3 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/platform/broadcom/sai-modules.mk b/platform/broadcom/sai-modules.mk
index f9fcef135..dd0c05ed4 100644
--- a/platform/broadcom/sai-modules.mk
+++ b/platform/broadcom/sai-modules.mk
@@ -10,7 +10,7 @@ $(BRCM_OPENNSL_KERNEL)_MACHINE = broadcom
 SONIC_DPKG_DEBS += $(BRCM_OPENNSL_KERNEL)
 
 # SAI bcm modules for DNX family ASIC
-BRCM_DNX_OPENNSL_KERNEL_VERSION = 10.1.21.0
+BRCM_DNX_OPENNSL_KERNEL_VERSION = 11.2.4.1
 
 BRCM_DNX_OPENNSL_KERNEL = opennsl-modules-dnx_$(BRCM_DNX_OPENNSL_KERNEL_VERSION)_amd64.deb
 $(BRCM_DNX_OPENNSL_KERNEL)_SRC_PATH = $(PLATFORM_PATH)/saibcm-modules-dnx
diff --git a/platform/broadcom/sai.mk b/platform/broadcom/sai.mk
index 86be717e6..bae4bf67d 100644
--- a/platform/broadcom/sai.mk
+++ b/platform/broadcom/sai.mk
@@ -1,7 +1,7 @@
 LIBSAIBCM_XGS_VERSION = 10.1.37.0
-LIBSAIBCM_DNX_VERSION = 10.1.25.0
+LIBSAIBCM_DNX_VERSION = 11.2.4.1
 LIBSAIBCM_XGS_BRANCH_NAME = SAI_10.1.0_GA
-LIBSAIBCM_DNX_BRANCH_NAME = SAI_10.1.0_GA
+LIBSAIBCM_DNX_BRANCH_NAME = SAI_11.2.0_GA
 LIBSAIBCM_XGS_URL_PREFIX = "https://sonicstorage.blob.core.windows.net/public/sai/sai-broadcom/$(LIBSAIBCM_XGS_BRANCH_NAME)/$(LIBSAIBCM_XGS_VERSION)/xgs"
 LIBSAIBCM_DNX_URL_PREFIX = "https://sonicstorage.blob.core.windows.net/public/sai/sai-broadcom/$(LIBSAIBCM_DNX_BRANCH_NAME)/$(LIBSAIBCM_DNX_VERSION)/dnx"
 
diff --git a/platform/broadcom/saibcm-modules-dnx b/platform/broadcom/saibcm-modules-dnx
index 231e96831..6d2b735f5 160000
--- a/platform/broadcom/saibcm-modules-dnx
+++ b/platform/broadcom/saibcm-modules-dnx
@@ -1 +1 @@
-Subproject commit 231e9683199fec974cf71311b9ba47b3f48b6e7a
+Subproject commit 6d2b735f5c6b66867e01b423f3343ca4119c83b2

From 2acfeab945e8e5f86fa496ad3b554d9574c61d05 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Tue, 20 Aug 2024 17:37:20 +0800
Subject: [PATCH 0910/1115] [submodule] Update submodule sonic-utilities to the
 latest HEAD automatically (#19933)

#### Why I did it
src/sonic-utilities
```
* 1c4300f3 - (HEAD -> master, origin/master, origin/HEAD) Skip default lanes dup check (#3489) (3 days ago) [Xincun Li]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-utilities | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-utilities b/src/sonic-utilities
index 317e64951..1c4300f30 160000
--- a/src/sonic-utilities
+++ b/src/sonic-utilities
@@ -1 +1 @@
-Subproject commit 317e649514c9b205849ffb5ea96a6a233e38290c
+Subproject commit 1c4300f309be95d3b182a490032b3af2de95a89b

From 5b5804dbbbd313b61615f41d0fedc9858cd4ad65 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Tue, 20 Aug 2024 17:37:35 +0800
Subject: [PATCH 0911/1115] [submodule] Update submodule sonic-dash-api to the
 latest HEAD automatically (#19872)

#### Why I did it
src/sonic-dash-api
```
* 39e4a63 - (HEAD -> master, origin/master, origin/HEAD) Add privatelink underlay_sip field for route table (#25) (24 hours ago) [Lawrence Lee]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-dash-api | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-dash-api b/src/sonic-dash-api
index dbb2d0fee..39e4a6319 160000
--- a/src/sonic-dash-api
+++ b/src/sonic-dash-api
@@ -1 +1 @@
-Subproject commit dbb2d0fee2fcb5cb78bd7c9b0686dc0f8e1db210
+Subproject commit 39e4a63195423a18789a209bbec0cb8531215d3a

From ea2020a603fe3c87dbf758bb7aee8e43463655c2 Mon Sep 17 00:00:00 2001
From: wenyiz2021 <91497961+wenyiz2021@users.noreply.github.com>
Date: Tue, 20 Aug 2024 12:21:25 -0700
Subject: [PATCH 0912/1115] [SAI 11] [Arista] Update phy-credo.mk (#19958)

it's needed for Arista CW2 linecard for SAI11.

There is system side mechanism in phy-credo.py to work around the links down issue on CW2 linecard.
This PR is changing $(PHY_CREDO)_URL to point to phy-credo_1.0_amd64.deb that is already merged with the fix in aristanetworks/sonic-firmware#2

Verified links are all up with credo debian update, without this change, 1 portchannel is down on Arista CL2 LC.
---
 rules/phy-credo.mk | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/rules/phy-credo.mk b/rules/phy-credo.mk
index cfc62e77e..3d11475cf 100644
--- a/rules/phy-credo.mk
+++ b/rules/phy-credo.mk
@@ -1,3 +1,3 @@
 PHY_CREDO = phy-credo_1.0_amd64.deb
-$(PHY_CREDO)_URL = "https://github.com/aristanetworks/sonic-firmware/raw/9e34da2a2d2d1e7e972cda3064b7b73c0558b322/phy/phy-credo_1.0_amd64.deb"
+$(PHY_CREDO)_URL = "https://github.com/aristanetworks/sonic-firmware/raw/24716c4e03f223d8e18afff786ac427f6ac77fe0/phy/phy-credo_1.0_amd64.deb"
 SONIC_ONLINE_DEBS += $(PHY_CREDO)

From c5a620bedc4dab73b4d210f28fc6f790204c7720 Mon Sep 17 00:00:00 2001
From: "Marty Y. Lok" <76118573+mlok-nokia@users.noreply.github.com>
Date: Wed, 21 Aug 2024 02:43:54 -0400
Subject: [PATCH 0913/1115] [voq][chassis][dhcp_relay] swss.sh try to start the
 dhcp_relay service although it is masked (#18829)

* [voq][chassis][dhcp_relay] swss.sh try to start the dhcp_relay service althoug it is masked

Signed-off-by: mlok <marty.lok@nokia.com>
---
 files/scripts/swss.sh | 20 +++++++++++++++++++-
 1 file changed, 19 insertions(+), 1 deletion(-)

diff --git a/files/scripts/swss.sh b/files/scripts/swss.sh
index cb51c0bb0..e00cc752e 100755
--- a/files/scripts/swss.sh
+++ b/files/scripts/swss.sh
@@ -242,6 +242,17 @@ function clean_up_chassis_db_tables()
 
 }
 
+is_feature_enabled()
+{
+    s=$1
+    service=${s%@*}
+    state=$(sonic-db-cli CONFIG_DB hget "FEATURE|${service}" "state")
+    if [[ $state == "enabled" ]]; then
+        echo "true"
+    else
+        echo "false"
+    fi
+}
 start_peer_and_dependent_services() {
     check_warm_boot
 
@@ -254,7 +265,14 @@ start_peer_and_dependent_services() {
             fi
         done
         for dep in ${DEPENDENT}; do
-            /bin/systemctl start ${dep}
+            if [[ $dep == "dhcp_relay" ]]; then
+                state=$(is_feature_enabled $dep)
+                if [[ $state == "true" ]]; then
+                    /bin/systemctl start ${dep}
+                fi
+            else
+                /bin/systemctl start ${dep}
+            fi
         done
         for dep in ${MULTI_INST_DEPENDENT}; do
             if [[ ! -z $DEV ]]; then

From 3d143066d6675f02456f15bef39ad9ee0c589272 Mon Sep 17 00:00:00 2001
From: sophiek <skravitz@nvidia.com>
Date: Wed, 21 Aug 2024 11:27:09 +0300
Subject: [PATCH 0914/1115] [Mellanox] Fixed sai xml name format bug (#19967)

- Why I did it
Fixed the name that the script looks for when checking sai_*.xml

- How I did it
Instead of searching with a general regex, the name of sai*.xml is taken from a variable in sai.profile.
---
 .../mellanox/cmis_host_mgmt/cmis_host_mgmt.py | 19 ++++++++++++++++---
 1 file changed, 16 insertions(+), 3 deletions(-)

diff --git a/platform/mellanox/cmis_host_mgmt/cmis_host_mgmt.py b/platform/mellanox/cmis_host_mgmt/cmis_host_mgmt.py
index aaedbe4a5..a1011d244 100644
--- a/platform/mellanox/cmis_host_mgmt/cmis_host_mgmt.py
+++ b/platform/mellanox/cmis_host_mgmt/cmis_host_mgmt.py
@@ -21,6 +21,8 @@
 import re
 import os
 import subprocess
+import glob
+from pathlib import Path
 
 
 class CMISHostMgmtActivator:
@@ -60,7 +62,7 @@ def change_param(param, path, action):
                         if param == "sai_profile" and not re.search(CMISHostMgmtActivator.PARAMS[param]["disabled_param"], lines):
                             if not re.search(CMISHostMgmtActivator.PARAMS[param]["enabled_param"], lines): 
                                 with open(file_path, 'a') as param_file:
-                                    param_file.write(CMISHostMgmtActivator.PARAMS[param]["enabled_param"])
+                                    param_file.write(CMISHostMgmtActivator.PARAMS[param]["enabled_param"] + '\n')
                                 return
 
                         lines = re.sub(CMISHostMgmtActivator.PARAMS[param]["disabled_param"],
@@ -137,8 +139,19 @@ def enable(args):
 
         if not CMISHostMgmtActivator.is_spc_supported(sku_num):
             print("Error: unsupported platform - feature is supported on SPC3 and higher.")
-            
-        CMISHostMgmtActivator.PARAMS["sai_xml"]["file_name"] = "sai_{0}.xml".format(sku_num)
+
+        sai_profile_file = '{}/{}'.format(sku_path, CMISHostMgmtActivator.PARAMS["sai_profile"]["file_name"])
+        lines = None
+        with open(sai_profile_file, 'r') as saiprofile:
+            lines = saiprofile.read()
+        
+        sai_xml_path = re.search("SAI_INIT_CONFIG_FILE.*", lines).group()
+
+        if sai_xml_path:
+            sai_xml_name = Path(sai_xml_path).name
+            CMISHostMgmtActivator.PARAMS["sai_xml"]["file_name"] = sai_xml_name
+        else:
+            print("Error: no sai_*.xml file present")
 
         CMISHostMgmtActivator.copy_file(args[0], sku_path)
         CMISHostMgmtActivator.copy_file(args[1], sku_path)

From ee0aac528e2c22dfef4eb6f77545f422a95e0340 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Wed, 21 Aug 2024 19:21:41 +0800
Subject: [PATCH 0915/1115] [submodule] Update submodule sonic-platform-common
 to the latest HEAD automatically (#19970)

#### Why I did it
src/sonic-platform-common
```
* e55eebf - (HEAD -> master, origin/master, origin/HEAD) Added new APIs and enhanced the required APIs in "module_base.py and (#454) (7 hours ago) [rameshraghupathy]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-platform-common | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-platform-common b/src/sonic-platform-common
index 7f07fa68e..e55eebf00 160000
--- a/src/sonic-platform-common
+++ b/src/sonic-platform-common
@@ -1 +1 @@
-Subproject commit 7f07fa68eff8954cbd36400d39fd6f3d81b9a850
+Subproject commit e55eebf00382642db43026bf39594da7b158dad2

From 7799357fee3727d0c3c75aa00572279e44d97ffc Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Wed, 21 Aug 2024 23:41:52 +0800
Subject: [PATCH 0916/1115] [ci/build]: Upgrade SONiC package versions (#19347)

---
 .../versions-deb-bookworm                     |  60 +--
 .../build-sonic-slave-bookworm/versions-git   |   1 +
 .../build-sonic-slave-bookworm/versions-py3   |  18 +-
 .../build-sonic-slave-bullseye/versions-git   |   1 +
 .../build-sonic-slave-bullseye/versions-py3   |  15 +-
 files/build/versions/default/versions-docker  |  28 +-
 files/build/versions/default/versions-git     |  21 +-
 files/build/versions/default/versions-mirror  |  38 +-
 files/build/versions/default/versions-web     | 407 +++++++++---------
 .../versions-deb-bookworm                     |  20 +-
 .../dockers/docker-base-bookworm/versions-py3 |   4 +-
 .../versions-deb-bullseye                     |   8 +-
 .../dockers/docker-base-bullseye/versions-py3 |   4 +-
 .../versions-deb-bookworm                     |   5 +-
 .../versions-py3                              |   4 +-
 .../versions-deb-bullseye                     |   2 +-
 .../versions-py3                              |   4 +-
 .../docker-dash-engine/versions-deb-focal     |  16 +-
 .../docker-database/versions-deb-bookworm     |   9 +-
 .../docker-dhcp-relay/versions-deb-bookworm   |   9 +-
 .../dockers/docker-dhcp-relay/versions-py3    |   2 +-
 .../docker-eventd/versions-deb-bookworm       |   9 +-
 .../docker-fpm-frr/versions-deb-bookworm      |   9 +-
 .../versions-deb-bullseye                     |   6 +-
 .../versions-deb-bullseye                     |   4 +-
 .../docker-gbsyncd-vs/versions-deb-bookworm   |  30 +-
 .../dockers/docker-lldp/versions-deb-bookworm |   9 +-
 .../docker-macsec/versions-deb-bookworm       |   9 +-
 .../dockers/docker-mux/versions-deb-bookworm  |   9 +-
 .../dockers/docker-nat/versions-deb-bookworm  |   9 +-
 .../docker-orchagent/versions-deb-bookworm    |   9 +-
 .../versions-deb-bookworm                     |  34 +-
 .../docker-platform-monitor/versions-py3      |  11 +-
 .../dockers/docker-ptf-sai/versions-py3       |   4 +-
 .../dockers/docker-ptf/versions-deb-buster    |  20 +-
 .../versions-deb-bookworm                     |   9 +-
 .../docker-sflow/versions-deb-bookworm        |   9 +-
 .../dockers/docker-snmp/versions-deb-bookworm |   9 +-
 .../versions/dockers/docker-snmp/versions-py3 |   4 +-
 .../docker-sonic-gnmi/versions-deb-bookworm   |   9 +-
 .../versions-deb-bookworm                     |  15 +-
 .../docker-sonic-mgmt-framework/versions-py3  |   4 +-
 .../docker-sonic-vs/versions-deb-bullseye     |  30 +-
 .../dockers/docker-sonic-vs/versions-py3      |  25 +-
 .../versions-deb-bookworm                     |  24 +-
 .../versions-deb-bullseye                     |  10 +-
 .../versions-deb-bullseye                     |   4 +-
 .../versions-deb-bullseye                     |  10 +-
 .../docker-syncd-brcm/versions-deb-bullseye   |   4 +-
 .../versions-deb-bullseye                     |  10 +-
 .../docker-syncd-centec/versions-deb-bullseye |   4 +-
 .../versions-deb-bookworm                     |  10 +-
 .../docker-syncd-mlnx/versions-deb-bookworm   |  53 +--
 .../dockers/docker-syncd-mlnx/versions-py3    |   2 +-
 .../versions-deb-bookworm-arm64               |   4 +-
 .../versions-deb-bookworm-armhf               |   4 +-
 .../docker-syncd-vs/versions-deb-bookworm     |  30 +-
 .../docker-teamd/versions-deb-bookworm        |   9 +-
 .../versions-deb-bookworm                     | 252 +++++------
 .../versions-deb-bookworm-armhf               |   6 +-
 .../dockers/sonic-slave-bookworm/versions-py3 |   9 +-
 .../versions-py3-all-arm64                    |   4 +-
 .../versions-py3-all-armhf                    |   4 +-
 .../versions-deb-bullseye                     | 159 ++++---
 .../versions-deb-bullseye-armhf               |   6 +-
 .../dockers/sonic-slave-bullseye/versions-py3 |  11 +-
 .../versions-py3-all-arm64                    |   1 +
 .../versions-py3-all-armhf                    |   1 +
 .../sonic-slave-buster/versions-deb-buster    |  59 +--
 .../versions-deb-buster-armhf                 |   2 +-
 .../dockers/sonic-slave-buster/versions-py2   |   2 +
 .../dockers/sonic-slave-buster/versions-py3   |   8 +-
 .../host-base-image/versions-deb-bookworm     |  32 +-
 .../versions/host-image/versions-deb-bookworm |  85 ++--
 files/build/versions/host-image/versions-py3  |  26 +-
 75 files changed, 938 insertions(+), 869 deletions(-)
 create mode 100644 files/build/versions/build/build-sonic-slave-bookworm/versions-git
 create mode 100644 files/build/versions/build/build-sonic-slave-bullseye/versions-git
 create mode 100644 files/build/versions/dockers/sonic-slave-bullseye/versions-py3-all-arm64
 create mode 100644 files/build/versions/dockers/sonic-slave-bullseye/versions-py3-all-armhf

diff --git a/files/build/versions/build/build-sonic-slave-bookworm/versions-deb-bookworm b/files/build/versions/build/build-sonic-slave-bookworm/versions-deb-bookworm
index 97bc192b0..4c337ee0a 100644
--- a/files/build/versions/build/build-sonic-slave-bookworm/versions-deb-bookworm
+++ b/files/build/versions/build/build-sonic-slave-bookworm/versions-deb-bookworm
@@ -1,15 +1,15 @@
-applibs==1.mlnx.4.6.3064
-applibs-dev==1.mlnx.4.6.3064
-bfscripts==4.6.0-13035
-doca-cx-libs==2.7.0034-1
-ibverbs-providers==2307mlnx47-1.2310036
+applibs==1.mlnx.4.6.4072
+applibs-dev==1.mlnx.4.6.4072
+bfscripts==4.7.0-13127
+doca-cx-libs==2.8.0005-1
+ibverbs-providers==2404mlnx51-1.2404066
 kernel-mft-dkms==4.28.0-96
-kernel-mft-dkms-modules-6.1.0-11-2-arm64==4.26.1
+kernel-mft-dkms-modules-6.1.0-11-2-arm64==4.28.0
 libdashapi==1.0.0
-libdoca-cx-libs-dev==2.7.0034-1
+libdoca-cx-libs-dev==2.8.0005-1
 libgrpc-dev==1.39.0-1
-libibverbs-dev==2307mlnx47-1.2310036
-libibverbs1==2307mlnx47-1.2310036
+libibverbs-dev==2404mlnx51-1.2404066
+libibverbs1==2404mlnx51-1.2404066
 libnl-3-200==3.5.0-1
 libnl-3-dev==3.5.0-1
 libnl-cli-3-200==3.5.0-1
@@ -42,38 +42,38 @@ libyang-dev==1.0.73
 linux-headers-6.1.0-11-2-amd64==6.1.38-4
 linux-headers-6.1.0-11-2-arm64==6.1.38-4
 linux-headers-6.1.0-11-2-common==6.1.38-4
-mft==4.26.1-3
+mft==4.28.0-96
 mlnx-dpdk==22.11.0-2404.0.2
 mlnx-dpdk-dev==22.11.0-2404.0.2
-mlnx-iproute2==6.4.0-1.2310036
-mlnx-ofed-kernel-utils==23.10.OFED.23.10.0.3.6.1-1
-mlnx-tools==23.10.0-1.2310036
+mlnx-iproute2==6.7.0-1.2404066
+mlnx-ofed-kernel-utils==24.04.OFED.24.04.0.6.6.1-1
+mlnx-tools==24.04.0-1.2404066
 mlxbf-bootctl==2.1
-mlxbf-bootimages==4.6.0-13035
+mlxbf-bootimages==4.7.0-13127
 p4lang-bmv2==1.15.0-7
 p4lang-p4c==1.2.4.2-2
 p4lang-pi==0.1.0-15
 python3-swsscommon==1.0.0
 python3-yang==1.0.73
-rdma-core==2307mlnx47-1.2310036
+rdma-core==2404mlnx51-1.2404066
 rxp-compiler==22.05.1
 sdn-appliance==1.5-1mlnx1
 sonic-mgmt-common==1.0.0
 sonic-mgmt-common-codegen==1.0.0
 sonic-platform-pddf==1.1
 sonic-platform-pddf-sym==1.1
-sx-acl-helper==1.mlnx.4.6.3064
-sx-acl-helper-dev==1.mlnx.4.6.3064
-sx-complib==1.mlnx.4.6.3064
-sx-complib-dev==1.mlnx.4.6.3064
-sx-examples==1.mlnx.4.6.3064
-sx-examples-dev==1.mlnx.4.6.3064
-sx-gen-utils==1.mlnx.4.6.3064
-sx-gen-utils-dev==1.mlnx.4.6.3064
-sx-hash-calc==1.mlnx.4.6.3064
-sx-obj-desc-lib==1.mlnx.4.6.3064
-sx-obj-desc-lib-dev==1.mlnx.4.6.3064
-sxd-libs==1.mlnx.4.6.3064
-sxd-libs-dev==1.mlnx.4.6.3064
-wjh-libs==1.mlnx.4.6.3064
-wjh-libs-dev==1.mlnx.4.6.3064
+sx-acl-helper==1.mlnx.4.6.4072
+sx-acl-helper-dev==1.mlnx.4.6.4072
+sx-complib==1.mlnx.4.6.4072
+sx-complib-dev==1.mlnx.4.6.4072
+sx-examples==1.mlnx.4.6.4072
+sx-examples-dev==1.mlnx.4.6.4072
+sx-gen-utils==1.mlnx.4.6.4072
+sx-gen-utils-dev==1.mlnx.4.6.4072
+sx-hash-calc==1.mlnx.4.6.4072
+sx-obj-desc-lib==1.mlnx.4.6.4072
+sx-obj-desc-lib-dev==1.mlnx.4.6.4072
+sxd-libs==1.mlnx.4.6.4072
+sxd-libs-dev==1.mlnx.4.6.4072
+wjh-libs==1.mlnx.4.6.4072
+wjh-libs-dev==1.mlnx.4.6.4072
diff --git a/files/build/versions/build/build-sonic-slave-bookworm/versions-git b/files/build/versions/build/build-sonic-slave-bookworm/versions-git
new file mode 100644
index 000000000..5ba32e1f3
--- /dev/null
+++ b/files/build/versions/build/build-sonic-slave-bookworm/versions-git
@@ -0,0 +1 @@
+https://github.com/thom311/libnl==fa05d58ebef426a545b4170b35214492b401c8af
diff --git a/files/build/versions/build/build-sonic-slave-bookworm/versions-py3 b/files/build/versions/build/build-sonic-slave-bookworm/versions-py3
index cabe3e8db..b73981a6f 100644
--- a/files/build/versions/build/build-sonic-slave-bookworm/versions-py3
+++ b/files/build/versions/build/build-sonic-slave-bookworm/versions-py3
@@ -1,20 +1,21 @@
 bitarray==2.8.1
 blessed==1.20.0
-cffi==1.16.0
+cffi==1.17.0
 click==7.0
 click-log==0.4.0
 colorful==0.5.6
 deepdiff==6.2.2
 docker==7.1.0
-docker-image-py==0.1.12
+docker-image-py==0.1.13
 enlighten==1.12.4
-filelock==3.14.0
+enum34==1.1.10
+filelock==3.15.4
 freezegun==1.5.1
 ijson==3.2.3
 ipaddress==1.0.23
-jsondiff==2.0.0
+jsondiff==2.2.0
 jsonpatch==1.33
-jsonpointer==2.4
+jsonpointer==3.0.0
 jsonschema==2.6.0
 lxml==4.9.1
 natsort==6.2.1
@@ -23,20 +24,21 @@ netifaces==0.11.0
 ordered-set==4.1.0
 paramiko==2.11.0
 pexpect==4.9.0
-prefixed==0.7.1
+prefixed==0.8.0
 prettyprinter==0.18.0
 ptyprocess==0.7.0
-pycairo==1.26.0
+pycairo==1.26.1
 pycparser==2.22
 pynacl==1.5.0
 pyroute2==0.5.19
 python-arptable==0.0.2
 pyyaml==6.0.1
+scp==0.14.5
 semantic-version==2.10.0
 systemd-python==235
 tabulate==0.9.0
 toposort==1.6
-urllib3==2.2.1
+urllib3==2.2.2
 wcwidth==0.2.13
 www-authenticate==0.9.2
 xmltodict==0.12.0
diff --git a/files/build/versions/build/build-sonic-slave-bullseye/versions-git b/files/build/versions/build/build-sonic-slave-bullseye/versions-git
new file mode 100644
index 000000000..5ba32e1f3
--- /dev/null
+++ b/files/build/versions/build/build-sonic-slave-bullseye/versions-git
@@ -0,0 +1 @@
+https://github.com/thom311/libnl==fa05d58ebef426a545b4170b35214492b401c8af
diff --git a/files/build/versions/build/build-sonic-slave-bullseye/versions-py3 b/files/build/versions/build/build-sonic-slave-bullseye/versions-py3
index ab8c14a49..8b7f60378 100644
--- a/files/build/versions/build/build-sonic-slave-bullseye/versions-py3
+++ b/files/build/versions/build/build-sonic-slave-bullseye/versions-py3
@@ -1,28 +1,29 @@
 bitarray==2.8.1
 blessed==1.20.0
-cffi==1.16.0
+cffi==1.17.0
 charset-normalizer==3.3.2
 click-log==0.4.0
 colorful==0.5.6
 docker==7.1.0
-docker-image-py==0.1.12
+docker-image-py==0.1.13
 enlighten==1.12.4
-filelock==3.14.0
+filelock==3.15.4
 ijson==3.2.3
 ipaddress==1.0.23
-jsondiff==2.0.0
+jsondiff==2.2.0
 jsonpatch==1.33
-jsonpointer==2.4
+jsonpointer==3.0.0
 natsort==6.2.1
 netaddr==0.8.0
 netifaces==0.11.0
 paramiko==2.11.0
-prefixed==0.7.1
+prefixed==0.8.0
 prettyprinter==0.18.0
-pycairo==1.26.0
+pycairo==1.26.1
 pycparser==2.22
 pynacl==1.5.0
 pyyaml==6.0.1
+scp==0.14.5
 semantic-version==2.10.0
 systemd-python==235
 tabulate==0.9.0
diff --git a/files/build/versions/default/versions-docker b/files/build/versions/default/versions-docker
index 0a1839900..0a4ed7b06 100644
--- a/files/build/versions/default/versions-docker
+++ b/files/build/versions/default/versions-docker
@@ -1,15 +1,15 @@
-amd64:amd64/debian:bookworm==sha256:08f76151d500d9e021b9f793364a3e9e534433297d16ba0152d69d1914b64d17
-amd64:amd64/debian:bullseye==sha256:5f2875f43c30349791f096598cbc96a774c422eeb2405e09ac4a7fc97492b623
-amd64:debian:bookworm==sha256:fac2c0fd33e88dfd3bc88a872cfb78dcb167e74af6162d31724df69e482f886c
-amd64:debian:bullseye==sha256:2c7a92a41cb814c00e7d455b2bc0c90ccdb9a4ced2ffdc10e562c7a84a186032
-amd64:debian:buster==sha256:6e7bd55a5705914837aad8db01b349f4617510c11e47ccae8e87f6f14e489626
+amd64:amd64/debian:bookworm==sha256:69af26f9843be43dc53ec473972fb9176a1d50551c1dc0a80662ddeb1cb809f7
+amd64:amd64/debian:bullseye==sha256:49f482896ab298ec24b8b6e51aa835e9ae71cffb3c03bb4f7c21303a8b371564
+amd64:debian:bookworm==sha256:aadf411dc9ed5199bc7dab48b3e6ce18f8bbee4f170127f5ff1b75cd8035eb36
+amd64:debian:bullseye==sha256:0bb606aad3307370c8b4502eff11fde298e5b7721e59a0da3ce9b30cb92045ed
+amd64:debian:buster==sha256:58ce6f1271ae1c8a2006ff7d3e54e9874d839f573d8009c20154ad0f2fb0a225
 amd64:p4lang/behavioral-model@sha256:ce45720e28a96a50f275c1b511cd84c2558b62f2cf7a7e506765183bc3fb2e32==sha256:ce45720e28a96a50f275c1b511cd84c2558b62f2cf7a7e506765183bc3fb2e32
-arm64:arm64v8/debian:bookworm==sha256:3d67cec2f6aa8a4d6aa496ae8097747f216fe850aebc8db99548cb8a85e73181
-arm64:arm64v8/debian:bullseye==sha256:2fcb4b943d3c026dff3bb55f470140bea8c1ce2e05a03e62185d6f12dd131ac2
-arm64:debian:bookworm==sha256:fac2c0fd33e88dfd3bc88a872cfb78dcb167e74af6162d31724df69e482f886c
-arm64:debian:bullseye==sha256:2c7a92a41cb814c00e7d455b2bc0c90ccdb9a4ced2ffdc10e562c7a84a186032
-arm64:debian:buster==sha256:6e7bd55a5705914837aad8db01b349f4617510c11e47ccae8e87f6f14e489626
-armhf:arm32v7/debian:bookworm==sha256:c5f29bcdb75f6a394c94d3f57daa79503870d45a3cd48b4a04fda725e9bd45db
-armhf:debian:bookworm==sha256:fac2c0fd33e88dfd3bc88a872cfb78dcb167e74af6162d31724df69e482f886c
-armhf:debian:bullseye==sha256:2c7a92a41cb814c00e7d455b2bc0c90ccdb9a4ced2ffdc10e562c7a84a186032
-armhf:debian:buster==sha256:6e7bd55a5705914837aad8db01b349f4617510c11e47ccae8e87f6f14e489626
+arm64:arm64v8/debian:bookworm==sha256:67b8fe57fcc540f94cf89327ba06e120fdd0ca6637b1f7e5fb003269c49be6fc
+arm64:arm64v8/debian:bullseye==sha256:fdad84a235716d4f605a279cd34fa47d88789f24939cdbdc2e0ecdbc1e525a79
+arm64:debian:bookworm==sha256:aadf411dc9ed5199bc7dab48b3e6ce18f8bbee4f170127f5ff1b75cd8035eb36
+arm64:debian:bullseye==sha256:0bb606aad3307370c8b4502eff11fde298e5b7721e59a0da3ce9b30cb92045ed
+arm64:debian:buster==sha256:58ce6f1271ae1c8a2006ff7d3e54e9874d839f573d8009c20154ad0f2fb0a225
+armhf:arm32v7/debian:bookworm==sha256:f8b683ce2fc0be935a1dd1e531d4fd3ecf56419876dfb1d46f674a972f95aab6
+armhf:debian:bookworm==sha256:aadf411dc9ed5199bc7dab48b3e6ce18f8bbee4f170127f5ff1b75cd8035eb36
+armhf:debian:bullseye==sha256:0bb606aad3307370c8b4502eff11fde298e5b7721e59a0da3ce9b30cb92045ed
+armhf:debian:buster==sha256:58ce6f1271ae1c8a2006ff7d3e54e9874d839f573d8009c20154ad0f2fb0a225
diff --git a/files/build/versions/default/versions-git b/files/build/versions/default/versions-git
index 7ac0b5c3b..0306db65f 100644
--- a/files/build/versions/default/versions-git
+++ b/files/build/versions/default/versions-git
@@ -1,23 +1,22 @@
-https://chromium.googlesource.com/chromium/tools/depot_tools.git==ada9211999786073eb44acab46e596311523e0df
+https://chromium.googlesource.com/chromium/tools/depot_tools.git==0bc7c4832e4f2d453e4826c9a2e1197e11bd6ec7
 https://github.com/aristanetworks/swi-tools.git==b5f087e4774168bf536360d43c9c509c8f14ad9f
-https://github.com/CESNET/libyang.git==4c733412e7173219166be7053940326a92699765
+https://github.com/CESNET/libyang.git==fba28260f382d81cf8f4b91b24cd717b52324fc2
 https://github.com/daveolson53/audisp-tacplus.git==559c9f22edd4f2dea0ecedffb3ad9502b12a75b6
 https://github.com/daveolson53/libnss-tacplus.git==19008ab68d9d504aa58eb34d5f564755a1613b8b
 https://github.com/dyninc/OpenBFDD.git==e35f43ad8d2b3f084e96a84c392528a90d05a287
-https://github.com/flashrom/flashrom.git==e25129d9b6cf5bc39fed03cbf60af2378a3e745f
-https://github.com/FreeRADIUS/freeradius-server.git==3eb4a4b01e4b33a44b07a6ae6b50071fe09ad1f8
-https://github.com/FreeRADIUS/pam_radius.git==d802da75cbfc3062ae1b18d0bf26ac2a030ffdaa
+https://github.com/flashrom/flashrom.git==8685230caa03940772358db6927c6076397a6d78
+https://github.com/FreeRADIUS/freeradius-server.git==da410bd1698ffce69486a94558d61bc13bac9dbc
+https://github.com/FreeRADIUS/pam_radius.git==b6442c3e0147f1019990520483fa3a30e4ccf059
 https://github.com/jeroennijhof/pam_tacplus.git==b839c440e33c36eced9dcbc287fcfe6237c4c4ce
 https://github.com/lguohan/gnxi.git==3adf8b97755b49947e465b5a14645f11e79fa0cd
 https://github.com/Mellanox/libpsample.git==62bb27d9a49424e45191eee81df7ce0d8c74e774
 https://github.com/openconfig/oc-pyang.git==4607fd1987d4f586aba03b40f222015cb3ef8161
 https://github.com/p4lang/ptf.git==c554f83685186be4cfa9387eb5d6d700d2bbd7c0
 https://github.com/p4lang/scapy-vxlan.git==85ffe83da156568ee47a0750f638227e6e1d7479
-https://github.com/sflow/host-sflow==a3ce4814bb6673a314142183e22c0e710cd21292
-https://github.com/sflow/sflowtool==c42c49cb80b927a4c02e54fc26430417f18f4833
-https://github.com/sonic-net/DASH.git==b3d7a6a61bb1d9322718e3e289603512a692b31f
-https://github.com/thom311/libnl==5248e1a45576617b349465997822cef34cbc5053
-https://salsa.debian.org/kernel-team/initramfs-tools.git==84e5c0f7dac1a17e980ed8dfb0e0e8729d9388db
+https://github.com/sflow/host-sflow==2893b4808608233da0c26531dff942a960445006
+https://github.com/sflow/sflowtool==c350bc8a6c5ef73d5b6b6529329391be4a2f5543
+https://github.com/sonic-net/DASH.git==173f1c79e7b549bcf1ad038f3a8eadcd3b309de8
+https://github.com/thom311/libnl==fa05d58ebef426a545b4170b35214492b401c8af
+https://salsa.debian.org/kernel-team/initramfs-tools.git==18b98fa239af9b8a02dd009091b2085193681c64
 https://salsa.debian.org/sk-guest/monit.git==c9da7ebb1f35dfba17b50b5969a6e75e29cbec0d
-https://salsa.debian.org/ssh-team/openssh.git==096572ea878f93fe2c85d8e86e43e2281f3f46d7
 https://salsa.debian.org/tai271828/rasdaemon.git==51a7f485f8b2e2ae43e613f19c5a387595174132
diff --git a/files/build/versions/default/versions-mirror b/files/build/versions/default/versions-mirror
index 8fbce29f2..291de46fb 100644
--- a/files/build/versions/default/versions-mirror
+++ b/files/build/versions/default/versions-mirror
@@ -1,24 +1,24 @@
 archive.ubuntu.com_ubuntu_dists_focal==2020-04-23T17:33:17Z
 archive.ubuntu.com_ubuntu_dists_focal-backports==2024-05-31T11:48:10Z
-archive.ubuntu.com_ubuntu_dists_focal-updates==2024-06-05T02:25:09Z
+archive.ubuntu.com_ubuntu_dists_focal-updates==2024-08-19T02:41:01Z
 deb.nodesource.com_node%5f14.x_dists_bookworm==2023-02-17T00:35:29Z
 deb.nodesource.com_node%5f14.x_dists_bullseye==2023-02-17T00:35:28Z
 deb.nodesource.com_node%5f14.x_dists_buster==2023-02-17T00:35:28Z
-debian==20240605T000248Z
-debian-security==20240605T000248Z
-download.docker.com_linux_debian_dists_bookworm==2024-05-28T14:05:22Z
-download.docker.com_linux_debian_dists_bullseye==2024-05-28T14:05:22Z
-download.docker.com_linux_debian_dists_buster==2024-05-23T13:29:25Z
-packages.trafficmanager.net_snapshot_debian-security_20240605T000248Z_dists_bookworm-security==2024-06-02T16:19:05Z
-packages.trafficmanager.net_snapshot_debian-security_20240605T000248Z_dists_bullseye-security==2024-06-02T16:19:06Z
-packages.trafficmanager.net_snapshot_debian-security_20240605T000248Z_dists_buster_updates==2024-06-02T16:19:05Z
-packages.trafficmanager.net_snapshot_debian_20240605T000248Z_dists_bookworm==2024-02-10T11:07:25Z
-packages.trafficmanager.net_snapshot_debian_20240605T000248Z_dists_bookworm-backports==2024-06-04T20:13:32Z
-packages.trafficmanager.net_snapshot_debian_20240605T000248Z_dists_bookworm-updates==2024-06-04T20:13:32Z
-packages.trafficmanager.net_snapshot_debian_20240605T000248Z_dists_bullseye==2024-02-10T12:40:37Z
-packages.trafficmanager.net_snapshot_debian_20240605T000248Z_dists_bullseye-backports==2024-06-04T20:13:32Z
-packages.trafficmanager.net_snapshot_debian_20240605T000248Z_dists_bullseye-updates==2024-06-04T20:13:32Z
-packages.trafficmanager.net_snapshot_debian_20240605T000248Z_dists_buster==2023-06-10T08:53:33Z
-packages.trafficmanager.net_snapshot_debian_20240605T000248Z_dists_buster-backports==2024-03-09T20:54:54Z
-packages.trafficmanager.net_snapshot_debian_20240605T000248Z_dists_buster-updates==2023-06-10T08:55:10Z
-security.ubuntu.com_ubuntu_dists_focal-security==2024-05-31T18:15:07Z
+debian==20240801T000314Z
+debian-security==20240801T000306Z
+download.docker.com_linux_debian_dists_bookworm==2024-08-16T23:21:06Z
+download.docker.com_linux_debian_dists_bullseye==2024-08-16T23:21:06Z
+download.docker.com_linux_debian_dists_buster==2024-06-17T16:53:50Z
+packages.trafficmanager.net_snapshot_debian-security_20240801T000306Z_dists_bookworm-security==2024-07-31T23:24:08Z
+packages.trafficmanager.net_snapshot_debian-security_20240801T000306Z_dists_bullseye-security==2024-07-31T23:24:07Z
+packages.trafficmanager.net_snapshot_debian-security_20240801T000306Z_dists_buster_updates==2024-07-31T23:24:08Z
+packages.trafficmanager.net_snapshot_debian_20240801T000314Z_dists_bookworm==2024-06-29T09:06:14Z
+packages.trafficmanager.net_snapshot_debian_20240801T000314Z_dists_bookworm-backports==2024-07-31T20:23:42Z
+packages.trafficmanager.net_snapshot_debian_20240801T000314Z_dists_bookworm-updates==2024-07-31T20:23:42Z
+packages.trafficmanager.net_snapshot_debian_20240801T000314Z_dists_bullseye==2024-06-29T10:26:51Z
+packages.trafficmanager.net_snapshot_debian_20240801T000314Z_dists_bullseye-backports==2024-07-31T20:23:42Z
+packages.trafficmanager.net_snapshot_debian_20240801T000314Z_dists_bullseye-updates==2024-07-31T20:23:42Z
+packages.trafficmanager.net_snapshot_debian_20240801T000314Z_dists_buster==2023-06-10T08:53:33Z
+packages.trafficmanager.net_snapshot_debian_20240801T000314Z_dists_buster-backports==2024-03-09T20:54:54Z
+packages.trafficmanager.net_snapshot_debian_20240801T000314Z_dists_buster-updates==2023-06-10T08:55:10Z
+security.ubuntu.com_ubuntu_dists_focal-security==2024-08-15T23:58:16Z
diff --git a/files/build/versions/default/versions-web b/files/build/versions/default/versions-web
index 1147fa6e5..788d0ac5b 100644
--- a/files/build/versions/default/versions-web
+++ b/files/build/versions/default/versions-web
@@ -15,16 +15,16 @@ http://deb.debian.org/debian/pool/main/p/protobuf/protobuf_3.21.12-3.debian.tar.
 http://deb.debian.org/debian/pool/main/p/protobuf/protobuf_3.21.12-3.dsc==d8e34e7b07473c6903f9d245934524fb
 http://deb.debian.org/debian/pool/main/p/protobuf/protobuf_3.21.12.orig.tar.gz==d38562490234d8080bdbe8eb7baf937a
 http://download.opensuse.org/repositories/home:/p4lang/Debian_11/p4lang-bmv2_1.15.0-7.debian.tar.xz==f4d249b77d4f8d120b229834aac02df5
-http://download.opensuse.org/repositories/home:/p4lang/Debian_11/p4lang-bmv2_1.15.0-7.dsc==6882841200ce58acc8db7f3e6a15e91d
+http://download.opensuse.org/repositories/home:/p4lang/Debian_11/p4lang-bmv2_1.15.0-7.dsc==c5856f30948b33bb0a9f6b1e3247c851
 http://download.opensuse.org/repositories/home:/p4lang/Debian_11/p4lang-bmv2_1.15.0.orig.tar.gz==cbbb4a0d5b1e17dca0532c3ca761e05c
 http://download.opensuse.org/repositories/home:/p4lang/Debian_11/p4lang-p4c_1.2.4.2-2.debian.tar.xz==7ea7d64c9147bd93a790af57693ce36f
-http://download.opensuse.org/repositories/home:/p4lang/Debian_11/p4lang-p4c_1.2.4.2-2.dsc==49a4c37e4030348958320e7d95a08209
+http://download.opensuse.org/repositories/home:/p4lang/Debian_11/p4lang-p4c_1.2.4.2-2.dsc==982a0f257dba812dfcfa329c91b9dcfe
 http://download.opensuse.org/repositories/home:/p4lang/Debian_11/p4lang-p4c_1.2.4.2.orig.tar.gz==b1008dffbe236d065c5557f2d4629aa9
 http://download.opensuse.org/repositories/home:/p4lang/Debian_11/p4lang-pi_0.1.0-15.debian.tar.xz==b9d8e4ce4cb66385250cf6dded0ef57a
-http://download.opensuse.org/repositories/home:/p4lang/Debian_11/p4lang-pi_0.1.0-15.dsc==9bfdfc3b6bf96e4e8c3a6a72fc56fded
+http://download.opensuse.org/repositories/home:/p4lang/Debian_11/p4lang-pi_0.1.0-15.dsc==03154ab52843ee9efa380febb8053c06
 http://download.opensuse.org/repositories/home:/p4lang/Debian_11/p4lang-pi_0.1.0.orig.tar.gz==551d3780d615557674e93fa11210499d
-http://www.iana.org/assignments/enterprise-numbers.txt==63fa3879db4888f790293029f63dbac6
-http://www.mellanox.com/downloads/MFT/mft-4.26.1-3-arm64-deb.tgz==0dda58196e4a303be1b7d570d3c25e68
+http://www.iana.org/assignments/enterprise-numbers.txt==a1246c0137a93741b1a68322f3c473c2
+http://www.mellanox.com/downloads/MFT/mft-4.28.0-96-arm64-deb.tgz==39b3244a00029f97734ee75e5a321065
 http://www.mellanox.com/downloads/MFT/mft-4.28.0-96-x86_64-deb.tgz==f552e1faddc8f76fe4eb0b8902606c2a
 https://archive.apache.org/dist/thrift/0.14.1/thrift-0.14.1.tar.gz==c64434548438df2cb1e53fb27c600e85
 https://bootstrap.pypa.io/pip/2.7/get-pip.py==60e8267eb1b7bc71dc4843eb7bd294d3
@@ -52,69 +52,61 @@ https://github.com/CentecNetworks/sonic-binaries/raw/master/amd64/third_party/ad
 https://github.com/CentecNetworks/sonic-binaries/raw/master/arm64/sai/libsaictc-dev_1.13.0-1_arm64.deb==1162131e154bba573bf7502d743f1d81
 https://github.com/CentecNetworks/sonic-binaries/raw/master/arm64/sai/libsaictc_1.13.0-1_arm64.deb==b8b25694a1dc9b4d8dffc2f2c04ddaed
 https://github.com/CumulusNetworks/ifupdown2/archive/3.0.0-1.tar.gz==755459b3a58fbc11625336846cea7420
-https://github.com/Mellanox/sonic-bluefield-packages/releases/download/dpu-bfsoc-4.6.0-13035-bookworm/bfscripts_4.6.0-13035_all.deb==232bdd3dcdf705530b82d1079a4bcd60
-https://github.com/Mellanox/sonic-bluefield-packages/releases/download/dpu-bfsoc-4.6.0-13035-bookworm/gpio-mlxbf3.ko==0397c082e8127d7d529e4f1dc1551855
-https://github.com/Mellanox/sonic-bluefield-packages/releases/download/dpu-bfsoc-4.6.0-13035-bookworm/mlx-bootctl.ko==addf7a88f10e8bc3278d222437aefdbb
-https://github.com/Mellanox/sonic-bluefield-packages/releases/download/dpu-bfsoc-4.6.0-13035-bookworm/mlxbf-bootctl_2.1_arm64.deb==aa521424ae27f4ec6e3348143ff1087a
-https://github.com/Mellanox/sonic-bluefield-packages/releases/download/dpu-bfsoc-4.6.0-13035-bookworm/mlxbf-bootimages-signed_4.6.0-13035_arm64.deb==4a91c6143375cf4a8bb7cfecf961c16d
-https://github.com/Mellanox/sonic-bluefield-packages/releases/download/dpu-bfsoc-4.6.0-13035-bookworm/mlxbf-gige.ko==4a439c3b2fb924f4fce5ba4293bb962e
-https://github.com/Mellanox/sonic-bluefield-packages/releases/download/dpu-bfsoc-4.6.0-13035-bookworm/mlxbf-pka.ko==7cfa549ce77aa57698864b9b3fe81ae2
-https://github.com/Mellanox/sonic-bluefield-packages/releases/download/dpu-bfsoc-4.6.0-13035-bookworm/mlxbf-ptm.ko==7e642ebab66631ff9b4bbb47fd83c32c
-https://github.com/Mellanox/sonic-bluefield-packages/releases/download/dpu-bfsoc-4.6.0-13035-bookworm/mlxbf-tmfifo.ko==5ea4e550f189dd9df5c3ef405e2e6136
-https://github.com/Mellanox/sonic-bluefield-packages/releases/download/dpu-bfsoc-4.6.0-13035-bookworm/pinctrl-mlxbf3.ko==91322cde339d51eee234c430e84cd2e3
-https://github.com/Mellanox/sonic-bluefield-packages/releases/download/dpu-bfsoc-4.6.0-13035-bookworm/pwr-mlxbf.ko==64be93a5e2b03816cb67f1a40105d6d9
-https://github.com/Mellanox/sonic-bluefield-packages/releases/download/dpu-bfsoc-4.6.0-13035-bookworm/sdhci-of-dwcmshc.ko==41d47a5ec7062fb28f444f393685b9f9
-https://github.com/Mellanox/sonic-bluefield-packages/releases/download/dpu-fw-32.39.1002/fw-BlueField-3-rel-32_39_1002.mfa==4c47ee2fc6f7a368617f6bc216f3ddb0
-https://github.com/Mellanox/sonic-bluefield-packages/releases/download/dpu-sai-SAIBuild0.0.30.0-bookworm/mlnx-sai-dbgsym_1.mlnx.SAIBuild0.0.30.0_arm64.deb==938914ad288c4093bbee065e9836554b
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+https://sonicstorage.blob.core.windows.net/public/fips/bullseye/0.13/arm64/ssh_8.4p1-5+deb11u2+fips_all.deb==d1f50482046b4b4e39fd2a0273f5ecef
+https://sonicstorage.blob.core.windows.net/public/fips/bullseye/0.13/arm64/symcrypt-openssl_0.13_arm64.deb==596652c7d5df5981844f5236d5615d40
+https://sonicstorage.blob.core.windows.net/public/fips/bullseye/0.13/armhf/golang-1.15-go_1.15.15-1~deb11u4+fips_armhf.deb==62c200bd7bf79df11cfdace12a351a73
+https://sonicstorage.blob.core.windows.net/public/fips/bullseye/0.13/armhf/golang-1.15-src_1.15.15-1~deb11u4+fips_armhf.deb==644145b4473d863edc1aaf98dfc92acf
 https://sonicstorage.blob.core.windows.net/public/onie/onie-recovery-x86_64-kvm_x86_64-r0.iso==54e11e450a461b1f4ae39c3ce3f15eff
 https://sonicstorage.blob.core.windows.net/public/onie/onie-recovery-x86_64-kvm_x86_64_4_asic-r0.iso==1d8b8d3fa37f842d0184b5205be22be9
 https://sonicstorage.blob.core.windows.net/public/onie/onie-recovery-x86_64-kvm_x86_64_6_asic-r0.iso==58494305d4ac201daedf9364a1018a1b
 https://sonicstorage.blob.core.windows.net/public/sai/bcmpai/REL_3.11/3.11/libsaibroncos_3.11_amd64.deb==6e21a16126e833516a9659d4c35c284e
+https://static.rust-lang.org/rustup/dist/aarch64-unknown-linux-gnu/rustup-init==21b27f4a24c066ff3c4158998d4f794b
+https://static.rust-lang.org/rustup/dist/armv7-unknown-linux-gnueabihf/rustup-init==13b8d6e5edef35414c2e28db31576656
+https://static.rust-lang.org/rustup/dist/x86_64-unknown-linux-gnu/rustup-init==eedd8a5a6ebbc921301660acb99646a5
 https://storage.googleapis.com/golang/go1.15.15.linux-amd64.tar.gz==b75227438c6129b5013da053b3aa3f38
 https://storage.googleapis.com/golang/go1.15.15.linux-arm64.tar.gz==6d721146a9195592d92a80cf27d475f9
 https://storage.googleapis.com/golang/go1.15.15.linux-armv6l.tar.gz==23d140bbeedc978b954de1a199a22bdb
diff --git a/files/build/versions/dockers/docker-base-bookworm/versions-deb-bookworm b/files/build/versions/dockers/docker-base-bookworm/versions-deb-bookworm
index 023141a8f..dcf93868a 100644
--- a/files/build/versions/dockers/docker-base-bookworm/versions-deb-bookworm
+++ b/files/build/versions/dockers/docker-base-bookworm/versions-deb-bookworm
@@ -1,5 +1,5 @@
 ca-certificates==20230311
-curl==7.88.1-10+deb12u5
+curl==7.88.1-10+deb12u6
 iproute2==6.1.0-3
 jq==1.6-2.1
 less==590-2.1~deb12u2
@@ -8,7 +8,7 @@ libbpf1==1:1.1.0-1
 libbrotli1==1.0.9-2+b6
 libbsd0==0.11.7-2
 libcap2-bin==1:2.66-4
-libcurl4==7.88.1-10+deb12u5
+libcurl4==7.88.1-10+deb12u6
 libdaemon0==0.14-7.1
 libdbus-1-3==1.14.10-1~deb12u1
 libelf1==0.188-2.1
@@ -17,14 +17,14 @@ libexpat1==2.5.0-1
 libfastjson4==1.2304.0-1
 libgdbm-compat4==1.23-3
 libgdbm6==1.23-3
-libgssapi-krb5-2==1.20.1-2+deb12u1
+libgssapi-krb5-2==1.20.1-2+deb12u2
 libjansson4==2.14-2
 libjemalloc2==5.3.0-1
 libjq1==1.6-2.1
 libk5crypto3==1.20.1-2+deb12u1+fips
 libkeyutils1==1.6.3-2
-libkrb5-3==1.20.1-2+deb12u1
-libkrb5support0==1.20.1-2+deb12u1
+libkrb5-3==1.20.1-2+deb12u2
+libkrb5support0==1.20.1-2+deb12u2
 libldap-2.5-0==2.5.13+dfsg-5
 liblognorm5==2.0.6-4
 liblzf1==3.6-3
@@ -39,8 +39,8 @@ libpgm-5.3-0==5.3.128~dfsg-2
 libproc2-0==2:4.0.2-3
 libpsl5==0.21.2-1
 libpython3-stdlib==3.11.2-1+b1
-libpython3.11-minimal==3.11.2-6
-libpython3.11-stdlib==3.11.2-6
+libpython3.11-minimal==3.11.2-6+deb12u2
+libpython3.11-stdlib==3.11.2-6+deb12u2
 libreadline8==8.2-1.3
 librtmp1==2.4+20151223.gitfa8646d.1-2+b2
 libsasl2-2==2.1.28+dfsg-10
@@ -61,7 +61,7 @@ openssl==3.0.11-1~deb12u2+fips
 perl==5.36.0-7+deb12u1
 perl-modules-5.36==5.36.0-7+deb12u1
 procps==2:4.0.2-3
-python-is-python3==3.11.1-3
+python-is-python3==3.11.2-1+deb12u1
 python3==3.11.2-1+b1
 python3-distutils==3.11.2-3
 python3-lib2to3==3.11.2-3
@@ -69,8 +69,8 @@ python3-minimal==3.11.2-1+b1
 python3-pkg-resources==66.1.1-1
 python3-setuptools==66.1.1-1
 python3-wheel==0.38.4-2
-python3.11==3.11.2-6
-python3.11-minimal==3.11.2-6
+python3.11==3.11.2-6+deb12u2
+python3.11-minimal==3.11.2-6+deb12u2
 readline-common==8.2-1.3
 redis-tools==5:7.0.15-1~deb12u1
 rsyslog==8.2302.0-1
diff --git a/files/build/versions/dockers/docker-base-bookworm/versions-py3 b/files/build/versions/dockers/docker-base-bookworm/versions-py3
index 13275869a..0b0379415 100644
--- a/files/build/versions/dockers/docker-base-bookworm/versions-py3
+++ b/files/build/versions/dockers/docker-base-bookworm/versions-py3
@@ -2,10 +2,10 @@ async-timeout==4.0.3
 j2cli==0.3.10
 jinja2==3.1.4
 markupsafe==2.1.5
-pip==24.0
+pip==24.2
 python-lzf==0.2.4
 rdbtools==0.1.15
-redis==5.0.4
+redis==5.0.8
 setuptools==66.1.1
 supervisor==4.2.5
 supervisord-dependent-startup==1.4.0
diff --git a/files/build/versions/dockers/docker-base-bullseye/versions-deb-bullseye b/files/build/versions/dockers/docker-base-bullseye/versions-deb-bullseye
index f27b2dcab..2195c07dd 100644
--- a/files/build/versions/dockers/docker-base-bullseye/versions-deb-bullseye
+++ b/files/build/versions/dockers/docker-base-bullseye/versions-deb-bullseye
@@ -1,5 +1,5 @@
 ca-certificates==20210119
-curl==7.74.0-1.3+deb11u11
+curl==7.74.0-1.3+deb11u12
 iproute2==5.10.0-4
 jq==1.6-2.1
 less==551-2+deb11u2
@@ -9,7 +9,7 @@ libbrotli1==1.0.9-2+b2
 libbsd0==0.11.3-1+deb11u1
 libcap2==1:2.44-1
 libcap2-bin==1:2.44-1
-libcurl4==7.74.0-1.3+deb11u11
+libcurl4==7.74.0-1.3+deb11u12
 libdaemon0==0.14-7.1
 libdbus-1-3==1.12.28-0+deb11u1
 libelf1==0.183-1
@@ -21,7 +21,7 @@ libgdbm6==1.19-2
 libjansson4==2.13.1-1.1
 libjemalloc2==5.2.1-3
 libjq1==1.6-2.1
-libk5crypto3==1.18.3-6+deb11u4+fips
+libk5crypto3==1.18.3-6+deb11u5+fips
 libldap-2.4-2==2.4.57+dfsg-3+deb11u1
 liblognorm5==2.0.5-1.1
 liblua5.1-0==5.1.5-8.1+b3
@@ -47,7 +47,7 @@ libsasl2-2==2.1.27+dfsg-2.1+deb11u1
 libsasl2-modules-db==2.1.27+dfsg-2.1+deb11u1
 libsodium23==1.0.18-1
 libsqlite3-0==3.34.1-3
-libssh2-1==1.9.0-2
+libssh2-1==1.9.0-2+deb11u1
 libssl-dev==1.1.1n-0+deb11u5+fips
 libssl1.1==1.1.1n-0+deb11u5+fips
 libwrap0==7.6.q-31
diff --git a/files/build/versions/dockers/docker-base-bullseye/versions-py3 b/files/build/versions/dockers/docker-base-bullseye/versions-py3
index c927d1012..2b94f59fb 100644
--- a/files/build/versions/dockers/docker-base-bullseye/versions-py3
+++ b/files/build/versions/dockers/docker-base-bullseye/versions-py3
@@ -2,10 +2,10 @@ async-timeout==4.0.3
 j2cli==0.3.10
 jinja2==3.1.4
 markupsafe==2.1.5
-pip==24.0
+pip==24.2
 python-lzf==0.2.4
 rdbtools==0.1.15
-redis==5.0.4
+redis==5.0.8
 setuptools==49.6.0
 supervisor==4.2.1
 supervisord-dependent-startup==1.4.0
diff --git a/files/build/versions/dockers/docker-config-engine-bookworm/versions-deb-bookworm b/files/build/versions/dockers/docker-config-engine-bookworm/versions-deb-bookworm
index 4cbe81273..0455e42e3 100644
--- a/files/build/versions/dockers/docker-config-engine-bookworm/versions-deb-bookworm
+++ b/files/build/versions/dockers/docker-config-engine-bookworm/versions-deb-bookworm
@@ -10,6 +10,7 @@ libhiredis0.14==0.14.1-3
 libicu-dev==72.1-3
 libicu72==72.1-3
 libjs-jquery==3.6.1+dfsg+~3.5.14-1
+libk5crypto3==1.20.1-2+deb12u2
 libnl-3-200==3.5.0-1
 libnl-cli-3-200==3.5.0-1
 libnl-genl-3-200==3.5.0-1
@@ -17,7 +18,7 @@ libnl-nf-3-200==3.5.0-1
 libnl-route-3-200==3.5.0-1
 libnsl-dev==1.3.0-2
 libpcre3==2:8.39-15
-libpython3.11==3.11.2-6
+libpython3.11==3.11.2-6+deb12u2
 libswsscommon==1.0.0
 libtirpc-dev==1.3.3+ds-1
 libxml2==2.9.14+dfsg-1.3~deb12u1
@@ -27,7 +28,7 @@ libxslt1.1==1.1.35-1
 libyaml-0-2==0.2.5-1
 libyang==1.0.73
 libyang-cpp==1.0.73
-linux-libc-dev==6.1.90-1
+linux-libc-dev==6.1.99-1
 python3-swsscommon==1.0.0
 python3-yaml==6.0-3+b2
 python3-yang==1.0.73
diff --git a/files/build/versions/dockers/docker-config-engine-bookworm/versions-py3 b/files/build/versions/dockers/docker-config-engine-bookworm/versions-py3
index 22c19f5eb..87add86ea 100644
--- a/files/build/versions/dockers/docker-config-engine-bookworm/versions-py3
+++ b/files/build/versions/dockers/docker-config-engine-bookworm/versions-py3
@@ -1,7 +1,7 @@
 bitarray==2.8.1
 ijson==3.2.3
 ipaddress==1.0.23
-jsondiff==2.0.0
+jsondiff==2.2.0
 lxml==4.9.1
 natsort==6.2.1
 netaddr==0.8.0
@@ -10,7 +10,7 @@ pyangbind==0.8.2
 pyyaml==6.0.1
 redis==5.0.1
 redis-dump-load==1.1
-regex==2024.5.15
+regex==2024.7.24
 six==1.16.0
 tabulate==0.9.0
 xmltodict==0.12.0
diff --git a/files/build/versions/dockers/docker-config-engine-bullseye/versions-deb-bullseye b/files/build/versions/dockers/docker-config-engine-bullseye/versions-deb-bullseye
index e1c0445e1..5e5f371ab 100644
--- a/files/build/versions/dockers/docker-config-engine-bullseye/versions-deb-bullseye
+++ b/files/build/versions/dockers/docker-config-engine-bullseye/versions-deb-bullseye
@@ -24,7 +24,7 @@ libxslt1-dev==1.1.34-4+deb11u1
 libxslt1.1==1.1.34-4+deb11u1
 libyang==1.0.73
 libyang-cpp==1.0.73
-linux-libc-dev==5.10.218-1
+linux-libc-dev==5.10.221-1
 python3-swsscommon==1.0.0
 python3-yang==1.0.73
 sonic-db-cli==1.0.0
diff --git a/files/build/versions/dockers/docker-config-engine-bullseye/versions-py3 b/files/build/versions/dockers/docker-config-engine-bullseye/versions-py3
index 4ee744dae..1a1c92509 100644
--- a/files/build/versions/dockers/docker-config-engine-bullseye/versions-py3
+++ b/files/build/versions/dockers/docker-config-engine-bullseye/versions-py3
@@ -1,7 +1,7 @@
 bitarray==2.8.1
 ijson==3.2.3
 ipaddress==1.0.23
-jsondiff==2.0.0
+jsondiff==2.2.0
 lxml==4.9.1
 natsort==6.2.1
 netaddr==0.8.0
@@ -10,7 +10,7 @@ pyangbind==0.8.1
 pyyaml==6.0.1
 redis==4.5.4
 redis-dump-load==1.1
-regex==2024.5.15
+regex==2024.7.24
 six==1.16.0
 tabulate==0.9.0
 xmltodict==0.12.0
diff --git a/files/build/versions/dockers/docker-dash-engine/versions-deb-focal b/files/build/versions/dockers/docker-dash-engine/versions-deb-focal
index 723eaaedd..e85f77f6c 100644
--- a/files/build/versions/dockers/docker-dash-engine/versions-deb-focal
+++ b/files/build/versions/dockers/docker-dash-engine/versions-deb-focal
@@ -67,10 +67,10 @@ libnpth0==1.6-1
 libperl5.30==5.30.0-9ubuntu0.5
 libpopt0==1.16-14
 libpython3-dev==3.8.2-0ubuntu2
-libpython3.8==3.8.10-0ubuntu1~20.04.9
-libpython3.8-dev==3.8.10-0ubuntu1~20.04.9
-libpython3.8-minimal==3.8.10-0ubuntu1~20.04.9
-libpython3.8-stdlib==3.8.10-0ubuntu1~20.04.9
+libpython3.8==3.8.10-0ubuntu1~20.04.11
+libpython3.8-dev==3.8.10-0ubuntu1~20.04.11
+libpython3.8-minimal==3.8.10-0ubuntu1~20.04.11
+libpython3.8-stdlib==3.8.10-0ubuntu1~20.04.11
 libquadmath0==10.5.0-1ubuntu1~20.04
 libroken18-heimdal==7.7.0+dfsg-1ubuntu1.4
 libstdc++-9-dev==9.4.0-1ubuntu1~20.04.2
@@ -81,7 +81,7 @@ libwind0-heimdal==7.7.0+dfsg-1ubuntu1.4
 logrotate==3.14.0-4ubuntu3
 make==4.2.1-1.2
 netbase==6.1
-openssl==1.1.1f-1ubuntu2.22
+openssl==1.1.1f-1ubuntu2.23
 patch==2.7.6-6
 perl==5.30.0-9ubuntu0.5
 perl-base==5.30.0-9ubuntu0.5
@@ -91,9 +91,9 @@ python-pip-whl==20.0.2-5ubuntu1.10
 python3-dev==3.8.2-0ubuntu2
 python3-pip==20.0.2-5ubuntu1.10
 python3-wheel==0.34.2-1ubuntu0.1
-python3.8==3.8.10-0ubuntu1~20.04.9
-python3.8-dev==3.8.10-0ubuntu1~20.04.9
-python3.8-minimal==3.8.10-0ubuntu1~20.04.9
+python3.8==3.8.10-0ubuntu1~20.04.11
+python3.8-dev==3.8.10-0ubuntu1~20.04.11
+python3.8-minimal==3.8.10-0ubuntu1~20.04.11
 rsyslog==8.2001.0-1ubuntu1.3
 supervisor==4.1.0-1ubuntu1
 ucf==3.0038+nmu1
diff --git a/files/build/versions/dockers/docker-database/versions-deb-bookworm b/files/build/versions/dockers/docker-database/versions-deb-bookworm
index d4a0316f6..252f970eb 100644
--- a/files/build/versions/dockers/docker-database/versions-deb-bookworm
+++ b/files/build/versions/dockers/docker-database/versions-deb-bookworm
@@ -3,14 +3,14 @@ gdbserver==13.1-3
 libbabeltrace1==1.5.11-1+b2
 libboost-regex1.74.0==1.74.0+ds1-21
 libcbor0.8==0.8.0-2+b1
-libcurl3-gnutls==7.88.1-10+deb12u5
+libcurl3-gnutls==7.88.1-10+deb12u6
 libdashapi==1.0.0
 libdebuginfod-common==0.188-2.1
 libdebuginfod1==0.188-2.1
 libdw1==0.188-2.1
 libedit2==3.1-20221030-2
 libfido2-1==1.12.0-2+b1
-libglib2.0-0==2.74.6-2+deb12u2
+libglib2.0-0==2.74.6-2+deb12u3
 libgpm2==1.20.7-10+b1
 libicu72==72.1-3
 libipt2==2.0.5-1
@@ -19,9 +19,12 @@ libprotobuf-lite32==3.21.12-3
 libprotobuf32==3.21.12-3
 libsource-highlight-common==3.1.9-4.2
 libsource-highlight4v5==3.1.9-4.2+b3
+libssl-dev==3.0.13-1~deb12u1
+libssl3==3.0.13-1~deb12u1
 libswsscommon-dbgsym==1.0.0
 libunwind8==1.6.2-3
-openssh-client==1:9.2p1-2+deb12u2
+openssh-client==1:9.2p1-2+deb12u3
+openssl==3.0.13-1~deb12u1
 redis-server==5:7.0.15-1~deb12u1
 sensible-utils==0.0.17+nmu1
 sshpass==1.09-1+b1
diff --git a/files/build/versions/dockers/docker-dhcp-relay/versions-deb-bookworm b/files/build/versions/dockers/docker-dhcp-relay/versions-deb-bookworm
index 3da29ccd3..c89c3cb30 100644
--- a/files/build/versions/dockers/docker-dhcp-relay/versions-deb-bookworm
+++ b/files/build/versions/dockers/docker-dhcp-relay/versions-deb-bookworm
@@ -5,7 +5,7 @@ isc-dhcp-relay-dbgsym==4.4.3-P1-2
 libbabeltrace1==1.5.11-1+b2
 libboost-regex1.74.0==1.74.0+ds1-21
 libcbor0.8==0.8.0-2+b1
-libcurl3-gnutls==7.88.1-10+deb12u5
+libcurl3-gnutls==7.88.1-10+deb12u6
 libdebuginfod-common==0.188-2.1
 libdebuginfod1==0.188-2.1
 libdw1==0.188-2.1
@@ -13,7 +13,7 @@ libedit2==3.1-20221030-2
 libevent-2.1-7==2.1.12-stable-8
 libexplain51==1.4.D001-12+b1
 libfido2-1==1.12.0-2+b1
-libglib2.0-0==2.74.6-2+deb12u2
+libglib2.0-0==2.74.6-2+deb12u3
 libgpm2==1.20.7-10+b1
 libicu72==72.1-3
 libipt2==2.0.5-1
@@ -23,10 +23,13 @@ liblua5.1-0==5.1.5-9
 libmpfr6==4.2.0-1
 libsource-highlight-common==3.1.9-4.2
 libsource-highlight4v5==3.1.9-4.2+b3
+libssl-dev==3.0.13-1~deb12u1
+libssl3==3.0.13-1~deb12u1
 libswsscommon-dbgsym==1.0.0
 libunwind8==1.6.2-3
 lsof==4.95.0-1
-openssh-client==1:9.2p1-2+deb12u2
+openssh-client==1:9.2p1-2+deb12u3
+openssl==3.0.13-1~deb12u1
 sensible-utils==0.0.17+nmu1
 sonic-dhcp6relay==1.0.0-0
 sonic-dhcp6relay-dbgsym==1.0.0-0
diff --git a/files/build/versions/dockers/docker-dhcp-relay/versions-py3 b/files/build/versions/dockers/docker-dhcp-relay/versions-py3
index 7d60ac8db..3ba2e7a2c 100644
--- a/files/build/versions/dockers/docker-dhcp-relay/versions-py3
+++ b/files/build/versions/dockers/docker-dhcp-relay/versions-py3
@@ -1,3 +1,3 @@
 freezegun==1.5.1
-psutil==5.9.8
+psutil==6.0.0
 python-dateutil==2.9.0.post0
diff --git a/files/build/versions/dockers/docker-eventd/versions-deb-bookworm b/files/build/versions/dockers/docker-eventd/versions-deb-bookworm
index f86585305..7b13519ae 100644
--- a/files/build/versions/dockers/docker-eventd/versions-deb-bookworm
+++ b/files/build/versions/dockers/docker-eventd/versions-deb-bookworm
@@ -3,22 +3,25 @@ gdbserver==13.1-3
 libbabeltrace1==1.5.11-1+b2
 libboost-regex1.74.0==1.74.0+ds1-21
 libcbor0.8==0.8.0-2+b1
-libcurl3-gnutls==7.88.1-10+deb12u5
+libcurl3-gnutls==7.88.1-10+deb12u6
 libdebuginfod-common==0.188-2.1
 libdebuginfod1==0.188-2.1
 libdw1==0.188-2.1
 libedit2==3.1-20221030-2
 libfido2-1==1.12.0-2+b1
-libglib2.0-0==2.74.6-2+deb12u2
+libglib2.0-0==2.74.6-2+deb12u3
 libgpm2==1.20.7-10+b1
 libicu72==72.1-3
 libipt2==2.0.5-1
 libmpfr6==4.2.0-1
 libsource-highlight-common==3.1.9-4.2
 libsource-highlight4v5==3.1.9-4.2+b3
+libssl-dev==3.0.13-1~deb12u1
+libssl3==3.0.13-1~deb12u1
 libswsscommon-dbgsym==1.0.0
 libunwind8==1.6.2-3
-openssh-client==1:9.2p1-2+deb12u2
+openssh-client==1:9.2p1-2+deb12u3
+openssl==3.0.13-1~deb12u1
 sensible-utils==0.0.17+nmu1
 sonic-eventd-dbgsym==1.0.0-0
 sshpass==1.09-1+b1
diff --git a/files/build/versions/dockers/docker-fpm-frr/versions-deb-bookworm b/files/build/versions/dockers/docker-fpm-frr/versions-deb-bookworm
index 0da31e794..d994e066d 100644
--- a/files/build/versions/dockers/docker-fpm-frr/versions-deb-bookworm
+++ b/files/build/versions/dockers/docker-fpm-frr/versions-deb-bookworm
@@ -10,13 +10,13 @@ libbabeltrace1==1.5.11-1+b2
 libboost-regex1.74.0==1.74.0+ds1-21
 libc-ares2==1.18.1-3
 libcbor0.8==0.8.0-2+b1
-libcurl3-gnutls==7.88.1-10+deb12u5
+libcurl3-gnutls==7.88.1-10+deb12u6
 libdebuginfod-common==0.188-2.1
 libdebuginfod1==0.188-2.1
 libdw1==0.188-2.1
 libedit2==3.1-20221030-2
 libfido2-1==1.12.0-2+b1
-libglib2.0-0==2.74.6-2+deb12u2
+libglib2.0-0==2.74.6-2+deb12u3
 libgpm2==1.20.7-10+b1
 libicu72==72.1-3
 libipt2==2.0.5-1
@@ -31,13 +31,16 @@ libsnmp-base==5.9.3+dfsg-2
 libsnmp40==5.9.3+dfsg-2
 libsource-highlight-common==3.1.9-4.2
 libsource-highlight4v5==3.1.9-4.2+b3
+libssl-dev==3.0.13-1~deb12u1
+libssl3==3.0.13-1~deb12u1
 libswsscommon-dbgsym==1.0.0
 libunwind8==1.6.2-3
 libyang2==2.0.112-6
 libyang2-dbgsym==2.0.112-6
 logrotate==3.21.0-1
 lsof==4.95.0-1
-openssh-client==1:9.2p1-2+deb12u2
+openssh-client==1:9.2p1-2+deb12u3
+openssl==3.0.13-1~deb12u1
 pci.ids==0.0~2023.04.11-1
 sensible-utils==0.0.17+nmu1
 sonic-rsyslog-plugin==1.0.0-0
diff --git a/files/build/versions/dockers/docker-gbsyncd-broncos/versions-deb-bullseye b/files/build/versions/dockers/docker-gbsyncd-broncos/versions-deb-bullseye
index 5c4d5df38..1b81a7423 100644
--- a/files/build/versions/dockers/docker-gbsyncd-broncos/versions-deb-bullseye
+++ b/files/build/versions/dockers/docker-gbsyncd-broncos/versions-deb-bullseye
@@ -6,12 +6,12 @@ libc-dev-bin==2.31-13+deb11u10
 libc6-dev==2.31-13+deb11u10
 libcbor0==0.5.0+dfsg-2
 libcrypt-dev==1:4.4.18-4
-libcurl3-gnutls==7.74.0-1.3+deb11u11
+libcurl3-gnutls==7.74.0-1.3+deb11u12
 libdebuginfod1==0.183-1
 libdw1==0.183-1
 libedit2==3.1-20191231-2+b1
 libfido2-1==1.6.0-2
-libglib2.0-0==2.66.8-1+deb11u3
+libglib2.0-0==2.66.8-1+deb11u4
 libgpm2==1.20.7-8
 libicu67==67.1-7
 libipt2==2.0.3-1
@@ -28,7 +28,7 @@ libsource-highlight4v5==3.1.9-3+b1
 libswsscommon-dbgsym==1.0.0
 libtirpc-dev==1.3.1-1+deb11u1
 libunwind8==1.3.2-2
-linux-libc-dev==5.10.218-1
+linux-libc-dev==5.10.221-1
 openssh-client==1:8.4p1-5+deb11u3
 sshpass==1.09-1+b1
 strace==5.10-1
diff --git a/files/build/versions/dockers/docker-gbsyncd-credo/versions-deb-bullseye b/files/build/versions/dockers/docker-gbsyncd-credo/versions-deb-bullseye
index d61c9bbe5..2060d9bc5 100644
--- a/files/build/versions/dockers/docker-gbsyncd-credo/versions-deb-bullseye
+++ b/files/build/versions/dockers/docker-gbsyncd-credo/versions-deb-bullseye
@@ -3,12 +3,12 @@ gdbserver==10.1-1.7
 libbabeltrace1==1.5.8-1+b3
 libboost-regex1.74.0==1.74.0-9
 libcbor0==0.5.0+dfsg-2
-libcurl3-gnutls==7.74.0-1.3+deb11u11
+libcurl3-gnutls==7.74.0-1.3+deb11u12
 libdebuginfod1==0.183-1
 libdw1==0.183-1
 libedit2==3.1-20191231-2+b1
 libfido2-1==1.6.0-2
-libglib2.0-0==2.66.8-1+deb11u3
+libglib2.0-0==2.66.8-1+deb11u4
 libgpm2==1.20.7-8
 libicu67==67.1-7
 libipt2==2.0.3-1
diff --git a/files/build/versions/dockers/docker-gbsyncd-vs/versions-deb-bookworm b/files/build/versions/dockers/docker-gbsyncd-vs/versions-deb-bookworm
index 616dcecd8..826787858 100644
--- a/files/build/versions/dockers/docker-gbsyncd-vs/versions-deb-bookworm
+++ b/files/build/versions/dockers/docker-gbsyncd-vs/versions-deb-bookworm
@@ -129,8 +129,8 @@ libclang-cpp14==1:14.0.6-12
 libclang1-14==1:14.0.6-12
 libctf-nobfd0==2.40-2
 libctf0==2.40-2
-libcurl3-gnutls==7.88.1-10+deb12u5
-libcurl3-nss==7.88.1-10+deb12u5
+libcurl3-gnutls==7.88.1-10+deb12u6
+libcurl3-nss==7.88.1-10+deb12u6
 libdbus-1-dev==1.14.10-1~deb12u1
 libdebuginfod-common==0.188-2.1
 libdebuginfod1==0.188-2.1
@@ -154,7 +154,7 @@ libgc1==1:8.2.2-3
 libgcc-12-dev==12.2.0-14
 libgfortran-12-dev==12.2.0-14
 libgfortran5==12.2.0-14
-libglib2.0-0==2.74.6-2+deb12u2
+libglib2.0-0==2.74.6-2+deb12u3
 libgmp-dev==2:6.2.1+dfsg1-1.1
 libgmpxx4ldbl==2:6.2.1+dfsg1-1.1
 libgomp1==12.2.0-14
@@ -179,8 +179,8 @@ libjs-sphinxdoc==5.3.0-4
 libjs-underscore==1.13.4~dfsg+~1.11.4-3
 libllvm14==1:14.0.6-12
 liblsan0==12.2.0-14
-libltdl-dev==2.4.7-5
-libltdl7==2.4.7-5
+libltdl-dev==2.4.7-7~deb12u1
+libltdl7==2.4.7-7~deb12u1
 libmagic-mgc==1:5.44-3
 libmagic1==1:5.44-3
 libmpc3==1.3.1-1
@@ -216,10 +216,10 @@ libprotoc32==3.21.12-3
 libpsm-infinipath1==3.3+20.604758e7-6.2
 libpsm2-2==11.2.185-2
 libpython3-dev==3.11.2-1+b1
-libpython3.11-dev==3.11.2-6
-libqt5core5a==5.15.8+dfsg-11
-libqt5dbus5==5.15.8+dfsg-11
-libqt5network5==5.15.8+dfsg-11
+libpython3.11-dev==3.11.2-6+deb12u2
+libqt5core5a==5.15.8+dfsg-11+deb12u2
+libqt5dbus5==5.15.8+dfsg-11+deb12u2
+libqt5network5==5.15.8+dfsg-11+deb12u2
 libquadmath0==12.2.0-14
 librdmacm1==44.0-2
 libre2-9==20220601+dfsg-1+b1
@@ -233,13 +233,14 @@ libsaivs==1.0.0
 libsaivs-dbgsym==1.0.0
 libsource-highlight-common==3.1.9-4.2
 libsource-highlight4v5==3.1.9-4.2+b3
-libssl-dev==3.0.11-1~deb12u2
+libssl-dev==3.0.13-1~deb12u1
+libssl3==3.0.13-1~deb12u1
 libstdc++-12-dev==12.2.0-14
 libswsscommon-dbgsym==1.0.0
 libthrift-0.17.0==0.17.0-2+b2
 libthrift-dev==0.17.0-2+b2
 libtirpc-dev==1.3.3+ds-1
-libtool==2.4.7-5
+libtool==2.4.7-7~deb12u1
 libtsan2==12.2.0-14
 libubsan1==12.2.0-14
 libucx0==1.13.1-1
@@ -253,7 +254,7 @@ libxext6==2:1.3.4-1+b1
 libxml2==2.9.14+dfsg-1.3~deb12u1
 libxnvctrl0==525.85.05-3~deb12u1
 libz3-4==4.8.12-3.1
-linux-libc-dev==6.1.90-1
+linux-libc-dev==6.1.99-1
 llvm==1:14.0-55.7~deb12u1
 llvm-14==1:14.0.6-12
 llvm-14-linker-tools==1:14.0.6-12
@@ -267,7 +268,8 @@ nss-plugin-pem==1.0.8+1-1
 ocl-icd-libopencl1==2.3.1-1
 openmpi-bin==4.1.4-3+b1
 openmpi-common==4.1.4-3
-openssh-client==1:9.2p1-2+deb12u2
+openssh-client==1:9.2p1-2+deb12u3
+openssl==3.0.13-1~deb12u1
 p4lang-bmv2==1.15.0-7
 p4lang-p4c==1.2.4.2-2
 p4lang-pi==0.1.0-15
@@ -285,7 +287,7 @@ python3-pyroute2==0.7.2-2
 python3-scapy==2.5.0+dfsg-2
 python3-six==1.16.0-4
 python3-thrift==0.17.0-2+b2
-python3.11-dev==3.11.2-6
+python3.11-dev==3.11.2-6+deb12u2
 rpcsvc-proto==1.4.3-1
 sensible-utils==0.0.17+nmu1
 sgml-base==1.31
diff --git a/files/build/versions/dockers/docker-lldp/versions-deb-bookworm b/files/build/versions/dockers/docker-lldp/versions-deb-bookworm
index 3c52fb813..dc68ecce9 100644
--- a/files/build/versions/dockers/docker-lldp/versions-deb-bookworm
+++ b/files/build/versions/dockers/docker-lldp/versions-deb-bookworm
@@ -3,14 +3,14 @@ gdbserver==13.1-3
 libbabeltrace1==1.5.11-1+b2
 libboost-regex1.74.0==1.74.0+ds1-21
 libcbor0.8==0.8.0-2+b1
-libcurl3-gnutls==7.88.1-10+deb12u5
+libcurl3-gnutls==7.88.1-10+deb12u6
 libdebuginfod-common==0.188-2.1
 libdebuginfod1==0.188-2.1
 libdw1==0.188-2.1
 libedit2==3.1-20221030-2
 libevent-2.1-7==2.1.12-stable-8
 libfido2-1==1.12.0-2+b1
-libglib2.0-0==2.74.6-2+deb12u2
+libglib2.0-0==2.74.6-2+deb12u3
 libgpm2==1.20.7-10+b1
 libicu72==72.1-3
 libipt2==2.0.5-1
@@ -22,12 +22,15 @@ libsnmp-base==5.9.3+dfsg-2
 libsnmp40==5.9.3+dfsg-2
 libsource-highlight-common==3.1.9-4.2
 libsource-highlight4v5==3.1.9-4.2+b3
+libssl-dev==3.0.13-1~deb12u1
+libssl3==3.0.13-1~deb12u1
 libswsscommon-dbgsym==1.0.0
 libunwind8==1.6.2-3
 libxml2==2.9.14+dfsg-1.3~deb12u1
 lldpd==1.0.16-1+deb12u1
 lldpd-dbgsym==1.0.16-1+deb12u1
-openssh-client==1:9.2p1-2+deb12u2
+openssh-client==1:9.2p1-2+deb12u3
+openssl==3.0.13-1~deb12u1
 pci.ids==0.0~2023.04.11-1
 sensible-utils==0.0.17+nmu1
 sshpass==1.09-1+b1
diff --git a/files/build/versions/dockers/docker-macsec/versions-deb-bookworm b/files/build/versions/dockers/docker-macsec/versions-deb-bookworm
index ecadea5a6..f94e72cd0 100644
--- a/files/build/versions/dockers/docker-macsec/versions-deb-bookworm
+++ b/files/build/versions/dockers/docker-macsec/versions-deb-bookworm
@@ -3,13 +3,13 @@ gdbserver==13.1-3
 libbabeltrace1==1.5.11-1+b2
 libboost-regex1.74.0==1.74.0+ds1-21
 libcbor0.8==0.8.0-2+b1
-libcurl3-gnutls==7.88.1-10+deb12u5
+libcurl3-gnutls==7.88.1-10+deb12u6
 libdebuginfod-common==0.188-2.1
 libdebuginfod1==0.188-2.1
 libdw1==0.188-2.1
 libedit2==3.1-20221030-2
 libfido2-1==1.12.0-2+b1
-libglib2.0-0==2.74.6-2+deb12u2
+libglib2.0-0==2.74.6-2+deb12u3
 libgpm2==1.20.7-10+b1
 libicu72==72.1-3
 libipt2==2.0.5-1
@@ -17,9 +17,12 @@ libmpfr6==4.2.0-1
 libpcsclite1==1.9.9-2
 libsource-highlight-common==3.1.9-4.2
 libsource-highlight4v5==3.1.9-4.2+b3
+libssl-dev==3.0.13-1~deb12u1
+libssl3==3.0.13-1~deb12u1
 libswsscommon-dbgsym==1.0.0
 libunwind8==1.6.2-3
-openssh-client==1:9.2p1-2+deb12u2
+openssh-client==1:9.2p1-2+deb12u3
+openssl==3.0.13-1~deb12u1
 sensible-utils==0.0.17+nmu1
 sshpass==1.09-1+b1
 strace==6.1-0.1
diff --git a/files/build/versions/dockers/docker-mux/versions-deb-bookworm b/files/build/versions/dockers/docker-mux/versions-deb-bookworm
index 0838f42f9..b5f48ce47 100644
--- a/files/build/versions/dockers/docker-mux/versions-deb-bookworm
+++ b/files/build/versions/dockers/docker-mux/versions-deb-bookworm
@@ -7,22 +7,25 @@ libboost-program-options1.74.0==1.74.0+ds1-21
 libboost-regex1.74.0==1.74.0+ds1-21
 libboost-thread1.74.0==1.74.0+ds1-21
 libcbor0.8==0.8.0-2+b1
-libcurl3-gnutls==7.88.1-10+deb12u5
+libcurl3-gnutls==7.88.1-10+deb12u6
 libdebuginfod-common==0.188-2.1
 libdebuginfod1==0.188-2.1
 libdw1==0.188-2.1
 libedit2==3.1-20221030-2
 libfido2-1==1.12.0-2+b1
-libglib2.0-0==2.74.6-2+deb12u2
+libglib2.0-0==2.74.6-2+deb12u3
 libgpm2==1.20.7-10+b1
 libicu72==72.1-3
 libipt2==2.0.5-1
 libmpfr6==4.2.0-1
 libsource-highlight-common==3.1.9-4.2
 libsource-highlight4v5==3.1.9-4.2+b3
+libssl-dev==3.0.13-1~deb12u1
+libssl3==3.0.13-1~deb12u1
 libswsscommon-dbgsym==1.0.0
 libunwind8==1.6.2-3
-openssh-client==1:9.2p1-2+deb12u2
+openssh-client==1:9.2p1-2+deb12u3
+openssl==3.0.13-1~deb12u1
 sensible-utils==0.0.17+nmu1
 sonic-linkmgrd==1.0.0-1
 sonic-linkmgrd-dbgsym==1.0.0-1
diff --git a/files/build/versions/dockers/docker-nat/versions-deb-bookworm b/files/build/versions/dockers/docker-nat/versions-deb-bookworm
index 6e0af0d6e..d0b5bd2e6 100644
--- a/files/build/versions/dockers/docker-nat/versions-deb-bookworm
+++ b/files/build/versions/dockers/docker-nat/versions-deb-bookworm
@@ -6,13 +6,13 @@ iptables==1.8.9-2
 libbabeltrace1==1.5.11-1+b2
 libboost-regex1.74.0==1.74.0+ds1-21
 libcbor0.8==0.8.0-2+b1
-libcurl3-gnutls==7.88.1-10+deb12u5
+libcurl3-gnutls==7.88.1-10+deb12u6
 libdebuginfod-common==0.188-2.1
 libdebuginfod1==0.188-2.1
 libdw1==0.188-2.1
 libedit2==3.1-20221030-2
 libfido2-1==1.12.0-2+b1
-libglib2.0-0==2.74.6-2+deb12u2
+libglib2.0-0==2.74.6-2+deb12u3
 libgpm2==1.20.7-10+b1
 libicu72==72.1-3
 libip4tc2==1.8.9-2
@@ -25,10 +25,13 @@ libnfnetlink0==1.0.2-2
 libnftnl11==1.2.4-2
 libsource-highlight-common==3.1.9-4.2
 libsource-highlight4v5==3.1.9-4.2+b3
+libssl-dev==3.0.13-1~deb12u1
+libssl3==3.0.13-1~deb12u1
 libswsscommon-dbgsym==1.0.0
 libunwind8==1.6.2-3
 netbase==6.4
-openssh-client==1:9.2p1-2+deb12u2
+openssh-client==1:9.2p1-2+deb12u3
+openssl==3.0.13-1~deb12u1
 sensible-utils==0.0.17+nmu1
 sshpass==1.09-1+b1
 strace==6.1-0.1
diff --git a/files/build/versions/dockers/docker-orchagent/versions-deb-bookworm b/files/build/versions/dockers/docker-orchagent/versions-deb-bookworm
index f606f8ca6..ea57df301 100644
--- a/files/build/versions/dockers/docker-orchagent/versions-deb-bookworm
+++ b/files/build/versions/dockers/docker-orchagent/versions-deb-bookworm
@@ -7,13 +7,13 @@ ifupdown==0.8.41
 libbabeltrace1==1.5.11-1+b2
 libboost-regex1.74.0==1.74.0+ds1-21
 libcbor0.8==0.8.0-2+b1
-libcurl3-gnutls==7.88.1-10+deb12u5
+libcurl3-gnutls==7.88.1-10+deb12u6
 libdebuginfod-common==0.188-2.1
 libdebuginfod1==0.188-2.1
 libdw1==0.188-2.1
 libedit2==3.1-20221030-2
 libfido2-1==1.12.0-2+b1
-libglib2.0-0==2.74.6-2+deb12u2
+libglib2.0-0==2.74.6-2+deb12u3
 libgpm2==1.20.7-10+b1
 libicu72==72.1-3
 libipt2==2.0.5-1
@@ -28,11 +28,14 @@ libpci3==1:3.9.0-4
 libsairedis-dbgsym==1.0.0
 libsource-highlight-common==3.1.9-4.2
 libsource-highlight4v5==3.1.9-4.2+b3
+libssl-dev==3.0.13-1~deb12u1
+libssl3==3.0.13-1~deb12u1
 libswsscommon-dbgsym==1.0.0
 libunwind8==1.6.2-3
 ndisc6==1.0.5-1+b2
 ndppd==0.2.5-6
-openssh-client==1:9.2p1-2+deb12u2
+openssh-client==1:9.2p1-2+deb12u3
+openssl==3.0.13-1~deb12u1
 pci.ids==0.0~2023.04.11-1
 pciutils==1:3.9.0-4
 python3-protobuf==3.21.12-3
diff --git a/files/build/versions/dockers/docker-platform-monitor/versions-deb-bookworm b/files/build/versions/dockers/docker-platform-monitor/versions-deb-bookworm
index 293dabbf9..4e20b15fc 100644
--- a/files/build/versions/dockers/docker-platform-monitor/versions-deb-bookworm
+++ b/files/build/versions/dockers/docker-platform-monitor/versions-deb-bookworm
@@ -1,5 +1,5 @@
-applibs==1.mlnx.4.6.3064
-applibs-dev==1.mlnx.4.6.3064
+applibs==1.mlnx.4.6.4072
+applibs-dev==1.mlnx.4.6.4072
 dmidecode==3.4-1
 ethtool==1:6.1-1
 fancontrol==1:3.6.0-7.1
@@ -16,7 +16,7 @@ libbabeltrace1==1.5.11-1+b2
 libboost-regex1.74.0==1.74.0+ds1-21
 libcairo2==1.16.0-7
 libcbor0.8==0.8.0-2+b1
-libcurl3-gnutls==7.88.1-10+deb12u5
+libcurl3-gnutls==7.88.1-10+deb12u6
 libdatrie1==0.2.13-2+b1
 libdbi1==0.9.0-6
 libdebuginfod-common==0.188-2.1
@@ -25,9 +25,9 @@ libdw1==0.188-2.1
 libedit2==3.1-20221030-2
 libfido2-1==1.12.0-2+b1
 libfontconfig1==2.14.1-4
-libfreetype6==2.12.1+dfsg-5
+libfreetype6==2.12.1+dfsg-5+deb12u3
 libfribidi0==1.0.8-2.1
-libglib2.0-0==2.74.6-2+deb12u2
+libglib2.0-0==2.74.6-2+deb12u3
 libgpm2==1.20.7-10+b1
 libgraphite2-3==1.3.14-1
 libharfbuzz0b==6.0.0+dfsg-3
@@ -51,6 +51,8 @@ libsensors5==1:3.6.0-7.1
 libsensors5-dbgsym==1:3.6.0-7.1
 libsource-highlight-common==3.1.9-4.2
 libsource-highlight4v5==3.1.9-4.2+b3
+libssl-dev==3.0.13-1~deb12u1
+libssl3==3.0.13-1~deb12u1
 libswsscommon-dbgsym==1.0.0
 libthai-data==0.1.29-1
 libthai0==0.1.29-1
@@ -67,13 +69,14 @@ libxml2==2.9.14+dfsg-1.3~deb12u1
 libxrender1==1:0.9.10-1.1
 lm-sensors==1:3.6.0-7.1
 lm-sensors-dbgsym==1:3.6.0-7.1
-mft==4.26.1-3
+mft==4.28.0-96
 nvme-cli==2.4+really2.3-3
-openssh-client==1:9.2p1-2+deb12u2
+openssh-client==1:9.2p1-2+deb12u3
+openssl==3.0.13-1~deb12u1
 pci.ids==0.0~2023.04.11-1
 pciutils==1:3.9.0-4
 psmisc==23.6-1
-python-sdk-api==1.mlnx.4.6.3064
+python-sdk-api==1.mlnx.4.6.4072
 python3-attr==22.2.0-1
 python3-jsonschema==4.10.3-1
 python3-pyrsistent==0.18.1-1+b3
@@ -85,14 +88,15 @@ sensord-dbgsym==1:3.6.0-7.1
 smartmontools==7.4-2~bpo12+1
 sshpass==1.09-1+b1
 strace==6.1-0.1
-sx-complib==1.mlnx.4.6.3064
-sx-complib-dev==1.mlnx.4.6.3064
-sx-gen-utils==1.mlnx.4.6.3064
-sx-gen-utils-dev==1.mlnx.4.6.3064
-sxd-libs==1.mlnx.4.6.3064
-sxd-libs-dev==1.mlnx.4.6.3064
+sx-complib==1.mlnx.4.6.4072
+sx-complib-dev==1.mlnx.4.6.4072
+sx-gen-utils==1.mlnx.4.6.4072
+sx-gen-utils-dev==1.mlnx.4.6.4072
+sxd-libs==1.mlnx.4.6.4072
+sxd-libs-dev==1.mlnx.4.6.4072
 ucf==3.0043+nmu1
-udev==252.22-1~deb12u1
+udev==252.26-1~deb12u2
 uuid-runtime==2.38.1-5+deb12u1
 vim==2:9.0.1378-2
 vim-runtime==2:9.0.1378-2
+xxd==2:9.0.1378-2
diff --git a/files/build/versions/dockers/docker-platform-monitor/versions-py3 b/files/build/versions/dockers/docker-platform-monitor/versions-py3
index 62d7ff68a..960078b05 100644
--- a/files/build/versions/dockers/docker-platform-monitor/versions-py3
+++ b/files/build/versions/dockers/docker-platform-monitor/versions-py3
@@ -1,6 +1,7 @@
 attrs==22.2.0
-certifi==2024.6.2
+certifi==2024.7.4
 charset-normalizer==3.3.2
+enum34==1.1.10
 grpcio==1.51.1
 grpcio-tools==1.51.1
 guacamole==0.9.2
@@ -8,10 +9,10 @@ idna==3.7
 jsonschema==2.6.0
 libpci==0.2
 netifaces==0.11.0
-protobuf==4.25.3
-psutil==5.9.8
+protobuf==4.25.4
+psutil==6.0.0
 pyrsistent==0.18.1
-python-sdk-api==4.6.3064
+python-sdk-api==4.6.4072
 requests==2.32.3
 thrift==0.13.0
-urllib3==2.2.1
+urllib3==2.2.2
diff --git a/files/build/versions/dockers/docker-ptf-sai/versions-py3 b/files/build/versions/dockers/docker-ptf-sai/versions-py3
index 08550dfeb..cd3358c16 100644
--- a/files/build/versions/dockers/docker-ptf-sai/versions-py3
+++ b/files/build/versions/dockers/docker-ptf-sai/versions-py3
@@ -1,10 +1,10 @@
 crc16==0.1.1
-getmac==0.9.4
+getmac==0.9.5
 importlib-metadata==6.7.0
 netifaces==0.11.0
 packaging==24.0
 packet-helper==0.0.1
-psutil==5.9.8
+psutil==6.0.0
 ptf==0.0.0
 pyperclip==1.8.2
 pysubnettree==0.37
diff --git a/files/build/versions/dockers/docker-ptf/versions-deb-buster b/files/build/versions/dockers/docker-ptf/versions-deb-buster
index 529178c9c..225391ea8 100644
--- a/files/build/versions/dockers/docker-ptf/versions-deb-buster
+++ b/files/build/versions/dockers/docker-ptf/versions-deb-buster
@@ -47,8 +47,8 @@ gcc==4:8.3.0-1
 gcc-8==8.3.0-6
 gdb==8.2.1-2+b3
 gir1.2-glib-2.0==1.58.3-2
-git==1:2.20.1-2+deb10u8
-git-man==1:2.20.1-2+deb10u8
+git==1:2.20.1-2+deb10u9
+git-man==1:2.20.1-2+deb10u9
 glib-networking==2.58.0-2+deb10u2
 glib-networking-common==2.58.0-2+deb10u2
 glib-networking-services==2.58.0-2+deb10u2
@@ -99,11 +99,11 @@ libboost-atomic1.71.0==1.71.0-6~bpo10+1
 libbrotli1==1.0.7-2+deb10u1
 libbsd0==0.9.1-2+deb10u1
 libc-ares2==1.14.0-1+deb10u4
-libc-bin==2.28-10+deb10u3
-libc-dev-bin==2.28-10+deb10u3
-libc6==2.28-10+deb10u3
-libc6-dbg==2.28-10+deb10u3
-libc6-dev==2.28-10+deb10u3
+libc-bin==2.28-10+deb10u4
+libc-dev-bin==2.28-10+deb10u4
+libc6==2.28-10+deb10u4
+libc6-dbg==2.28-10+deb10u4
+libc6-dev==2.28-10+deb10u4
 libcairo-gobject2==1.16.0-4+deb10u1
 libcairo2==1.16.0-4+deb10u1
 libcc1-0==8.3.0-6
@@ -113,9 +113,9 @@ libcgraph6==2.40.1-6+deb10u1
 libcolord2==1.4.3-4
 libcroco3==0.6.12-3
 libcryptsetup12==2:2.1.0-5+deb10u2
-libcups2==2.2.10-6+deb10u9
+libcups2==2.2.10-6+deb10u10
 libcupsfilters1==1.21.6-5+deb10u1
-libcupsimage2==2.2.10-6+deb10u9
+libcupsimage2==2.2.10-6+deb10u10
 libcurl3-gnutls==7.64.0-4+deb10u9
 libcurl4==7.64.0-4+deb10u9
 libdaemon0==0.14-7
@@ -464,7 +464,7 @@ libxxf86dga1==2:1.1.4-1+b3
 libxxf86vm1==1:1.1.4-1+b2
 libxxhash0==0.6.5-2
 libzzip-0-13==0.13.62-3.2+deb10u1
-linux-libc-dev==4.19.304-1
+linux-libc-dev==4.19.316-1
 lmodern==2.004.5-6
 logrotate==3.14.0-4
 lsb-base==10.2019051400
diff --git a/files/build/versions/dockers/docker-router-advertiser/versions-deb-bookworm b/files/build/versions/dockers/docker-router-advertiser/versions-deb-bookworm
index 2c7500156..977130141 100644
--- a/files/build/versions/dockers/docker-router-advertiser/versions-deb-bookworm
+++ b/files/build/versions/dockers/docker-router-advertiser/versions-deb-bookworm
@@ -3,22 +3,25 @@ gdbserver==13.1-3
 libbabeltrace1==1.5.11-1+b2
 libboost-regex1.74.0==1.74.0+ds1-21
 libcbor0.8==0.8.0-2+b1
-libcurl3-gnutls==7.88.1-10+deb12u5
+libcurl3-gnutls==7.88.1-10+deb12u6
 libdebuginfod-common==0.188-2.1
 libdebuginfod1==0.188-2.1
 libdw1==0.188-2.1
 libedit2==3.1-20221030-2
 libfido2-1==1.12.0-2+b1
-libglib2.0-0==2.74.6-2+deb12u2
+libglib2.0-0==2.74.6-2+deb12u3
 libgpm2==1.20.7-10+b1
 libicu72==72.1-3
 libipt2==2.0.5-1
 libmpfr6==4.2.0-1
 libsource-highlight-common==3.1.9-4.2
 libsource-highlight4v5==3.1.9-4.2+b3
+libssl-dev==3.0.13-1~deb12u1
+libssl3==3.0.13-1~deb12u1
 libswsscommon-dbgsym==1.0.0
 libunwind8==1.6.2-3
-openssh-client==1:9.2p1-2+deb12u2
+openssh-client==1:9.2p1-2+deb12u3
+openssl==3.0.13-1~deb12u1
 radvd==1:2.19-1+b1
 sensible-utils==0.0.17+nmu1
 sshpass==1.09-1+b1
diff --git a/files/build/versions/dockers/docker-sflow/versions-deb-bookworm b/files/build/versions/dockers/docker-sflow/versions-deb-bookworm
index d4868ac3d..cd199d006 100644
--- a/files/build/versions/dockers/docker-sflow/versions-deb-bookworm
+++ b/files/build/versions/dockers/docker-sflow/versions-deb-bookworm
@@ -6,22 +6,25 @@ hsflowd-dbgsym==2.0.51-26
 libbabeltrace1==1.5.11-1+b2
 libboost-regex1.74.0==1.74.0+ds1-21
 libcbor0.8==0.8.0-2+b1
-libcurl3-gnutls==7.88.1-10+deb12u5
+libcurl3-gnutls==7.88.1-10+deb12u6
 libdebuginfod-common==0.188-2.1
 libdebuginfod1==0.188-2.1
 libdw1==0.188-2.1
 libedit2==3.1-20221030-2
 libfido2-1==1.12.0-2+b1
-libglib2.0-0==2.74.6-2+deb12u2
+libglib2.0-0==2.74.6-2+deb12u3
 libgpm2==1.20.7-10+b1
 libicu72==72.1-3
 libipt2==2.0.5-1
 libmpfr6==4.2.0-1
 libsource-highlight-common==3.1.9-4.2
 libsource-highlight4v5==3.1.9-4.2+b3
+libssl-dev==3.0.13-1~deb12u1
+libssl3==3.0.13-1~deb12u1
 libswsscommon-dbgsym==1.0.0
 libunwind8==1.6.2-3
-openssh-client==1:9.2p1-2+deb12u2
+openssh-client==1:9.2p1-2+deb12u3
+openssl==3.0.13-1~deb12u1
 psample==1.1-1
 sensible-utils==0.0.17+nmu1
 sflowtool==5.04
diff --git a/files/build/versions/dockers/docker-snmp/versions-deb-bookworm b/files/build/versions/dockers/docker-snmp/versions-deb-bookworm
index 80548bf42..32f17d672 100644
--- a/files/build/versions/dockers/docker-snmp/versions-deb-bookworm
+++ b/files/build/versions/dockers/docker-snmp/versions-deb-bookworm
@@ -6,14 +6,14 @@ libbabeltrace1==1.5.11-1+b2
 libboost-regex1.74.0==1.74.0+ds1-21
 libc-l10n==2.36-9+deb12u7
 libcbor0.8==0.8.0-2+b1
-libcurl3-gnutls==7.88.1-10+deb12u5
+libcurl3-gnutls==7.88.1-10+deb12u6
 libdebuginfod-common==0.188-2.1
 libdebuginfod1==0.188-2.1
 libdw1==0.188-2.1
 libedit2==3.1-20221030-2
 libfido2-1==1.12.0-2+b1
 libfreeipmi17==1.6.10-1+b1
-libglib2.0-0==2.74.6-2+deb12u2
+libglib2.0-0==2.74.6-2+deb12u3
 libgpm2==1.20.7-10+b1
 libicu72==72.1-3
 libipt2==2.0.5-1
@@ -26,10 +26,13 @@ libsnmp40==5.9.3+dfsg-2
 libsnmp40-dbgsym==5.9.3+dfsg-2
 libsource-highlight-common==3.1.9-4.2
 libsource-highlight4v5==3.1.9-4.2+b3
+libssl-dev==3.0.13-1~deb12u1
+libssl3==3.0.13-1~deb12u1
 libswsscommon-dbgsym==1.0.0
 libunwind8==1.6.2-3
 locales==2.36-9+deb12u7
-openssh-client==1:9.2p1-2+deb12u2
+openssh-client==1:9.2p1-2+deb12u3
+openssl==3.0.13-1~deb12u1
 pci.ids==0.0~2023.04.11-1
 sensible-utils==0.0.17+nmu1
 snmp==5.9.3+dfsg-2
diff --git a/files/build/versions/dockers/docker-snmp/versions-py3 b/files/build/versions/dockers/docker-snmp/versions-py3
index 6578258d1..2d2c196bb 100644
--- a/files/build/versions/dockers/docker-snmp/versions-py3
+++ b/files/build/versions/dockers/docker-snmp/versions-py3
@@ -1,4 +1,4 @@
-hiredis==2.3.2
-psutil==5.9.8
+hiredis==3.0.0
+psutil==6.0.0
 python-arptable==0.0.2
 smbus==1.1.post2
diff --git a/files/build/versions/dockers/docker-sonic-gnmi/versions-deb-bookworm b/files/build/versions/dockers/docker-sonic-gnmi/versions-deb-bookworm
index 78de7f716..9f7ac26c3 100644
--- a/files/build/versions/dockers/docker-sonic-gnmi/versions-deb-bookworm
+++ b/files/build/versions/dockers/docker-sonic-gnmi/versions-deb-bookworm
@@ -3,22 +3,25 @@ gdbserver==13.1-3
 libbabeltrace1==1.5.11-1+b2
 libboost-regex1.74.0==1.74.0+ds1-21
 libcbor0.8==0.8.0-2+b1
-libcurl3-gnutls==7.88.1-10+deb12u5
+libcurl3-gnutls==7.88.1-10+deb12u6
 libdebuginfod-common==0.188-2.1
 libdebuginfod1==0.188-2.1
 libdw1==0.188-2.1
 libedit2==3.1-20221030-2
 libfido2-1==1.12.0-2+b1
-libglib2.0-0==2.74.6-2+deb12u2
+libglib2.0-0==2.74.6-2+deb12u3
 libgpm2==1.20.7-10+b1
 libicu72==72.1-3
 libipt2==2.0.5-1
 libmpfr6==4.2.0-1
 libsource-highlight-common==3.1.9-4.2
 libsource-highlight4v5==3.1.9-4.2+b3
+libssl-dev==3.0.13-1~deb12u1
+libssl3==3.0.13-1~deb12u1
 libswsscommon-dbgsym==1.0.0
 libunwind8==1.6.2-3
-openssh-client==1:9.2p1-2+deb12u2
+openssh-client==1:9.2p1-2+deb12u3
+openssl==3.0.13-1~deb12u1
 sensible-utils==0.0.17+nmu1
 sonic-gnmi==0.1
 sonic-mgmt-common==1.0.0
diff --git a/files/build/versions/dockers/docker-sonic-mgmt-framework/versions-deb-bookworm b/files/build/versions/dockers/docker-sonic-mgmt-framework/versions-deb-bookworm
index 4ac805e33..c01376c3d 100644
--- a/files/build/versions/dockers/docker-sonic-mgmt-framework/versions-deb-bookworm
+++ b/files/build/versions/dockers/docker-sonic-mgmt-framework/versions-deb-bookworm
@@ -3,26 +3,29 @@ gdbserver==13.1-3
 libbabeltrace1==1.5.11-1+b2
 libboost-regex1.74.0==1.74.0+ds1-21
 libcbor0.8==0.8.0-2+b1
-libcjson-dev==1.7.15-1
-libcjson1==1.7.15-1
-libcurl3-gnutls==7.88.1-10+deb12u5
-libcurl4-openssl-dev==7.88.1-10+deb12u5
+libcjson-dev==1.7.15-1+deb12u1
+libcjson1==1.7.15-1+deb12u1
+libcurl3-gnutls==7.88.1-10+deb12u6
+libcurl4-openssl-dev==7.88.1-10+deb12u6
 libdebuginfod-common==0.188-2.1
 libdebuginfod1==0.188-2.1
 libdw1==0.188-2.1
 libedit2==3.1-20221030-2
 libfido2-1==1.12.0-2+b1
-libglib2.0-0==2.74.6-2+deb12u2
+libglib2.0-0==2.74.6-2+deb12u3
 libgpm2==1.20.7-10+b1
 libicu72==72.1-3
 libipt2==2.0.5-1
 libmpfr6==4.2.0-1
 libsource-highlight-common==3.1.9-4.2
 libsource-highlight4v5==3.1.9-4.2+b3
+libssl-dev==3.0.13-1~deb12u1
+libssl3==3.0.13-1~deb12u1
 libswsscommon-dbgsym==1.0.0
 libunwind8==1.6.2-3
 libxml2==2.9.14+dfsg-1.3~deb12u1
-openssh-client==1:9.2p1-2+deb12u2
+openssh-client==1:9.2p1-2+deb12u3
+openssl==3.0.13-1~deb12u1
 sensible-utils==0.0.17+nmu1
 sonic-mgmt-common==1.0.0
 sonic-mgmt-framework==1.0-01
diff --git a/files/build/versions/dockers/docker-sonic-mgmt-framework/versions-py3 b/files/build/versions/dockers/docker-sonic-mgmt-framework/versions-py3
index fd8654bb5..8fbb76d5f 100644
--- a/files/build/versions/dockers/docker-sonic-mgmt-framework/versions-py3
+++ b/files/build/versions/dockers/docker-sonic-mgmt-framework/versions-py3
@@ -1,5 +1,5 @@
-certifi==2024.6.2
+certifi==2024.7.4
 charset-normalizer==3.3.2
 idna==3.7
 requests==2.32.3
-urllib3==2.2.1
+urllib3==2.2.2
diff --git a/files/build/versions/dockers/docker-sonic-vs/versions-deb-bullseye b/files/build/versions/dockers/docker-sonic-vs/versions-deb-bullseye
index c8b815af3..9086a97ef 100644
--- a/files/build/versions/dockers/docker-sonic-vs/versions-deb-bullseye
+++ b/files/build/versions/dockers/docker-sonic-vs/versions-deb-bullseye
@@ -31,7 +31,7 @@ icu-devtools==67.1-7
 ifupdown==0.8.36
 iproute2==6.1.0-3~bpo11+1
 iptables==1.8.7-1
-krb5-multidev==1.18.3-6+deb11u4+fips
+krb5-multidev==1.18.3-6+deb11u5+fips
 libapparmor1==2.13.6-10
 libassuan0==2.5.3-7.1
 libblkid-dev==2.36.1-8+deb11u2
@@ -52,10 +52,10 @@ libfreetype6==2.10.4+dfsg-1+deb11u1
 libfreetype6-dev==2.10.4+dfsg-1+deb11u1
 libfuse2==2.9.9-5
 libgirepository-1.0-1==1.66.1-1+b1
-libglib2.0-0==2.66.8-1+deb11u3
-libglib2.0-data==2.66.8-1+deb11u3
-libgssapi-krb5-2==1.18.3-6+deb11u4+fips
-libgssrpc4==1.18.3-6+deb11u4+fips
+libglib2.0-0==2.66.8-1+deb11u4
+libglib2.0-data==2.66.8-1+deb11u4
+libgssapi-krb5-2==1.18.3-6+deb11u5+fips
+libgssrpc4==1.18.3-6+deb11u5+fips
 libicu-dev==67.1-7
 libicu67==67.1-7
 libip4tc2==1.8.7-1
@@ -65,12 +65,12 @@ libjs-underscore==1.9.1~dfsg-3
 libjson-c5==0.15-2+deb11u1
 libjudydebian1==1.0.5-5+b2
 libk5crypto3==1.18.3-6+deb11u4
-libkadm5clnt-mit12==1.18.3-6+deb11u4+fips
-libkadm5srv-mit12==1.18.3-6+deb11u4+fips
-libkdb5-10==1.18.3-6+deb11u4
-libkrb5-3==1.18.3-6+deb11u4+fips
-libkrb5-dev==1.18.3-6+deb11u4+fips
-libkrb5support0==1.18.3-6+deb11u4+fips
+libkadm5clnt-mit12==1.18.3-6+deb11u5+fips
+libkadm5srv-mit12==1.18.3-6+deb11u5+fips
+libkdb5-10==1.18.3-6+deb11u5
+libkrb5-3==1.18.3-6+deb11u5+fips
+libkrb5-dev==1.18.3-6+deb11u5+fips
+libkrb5support0==1.18.3-6+deb11u5+fips
 libksba8==1.5.0-3+deb11u2
 libmd-dev==1.0.3-3
 libmount1==2.36.1-8+deb11u2
@@ -89,9 +89,9 @@ libpopt0==1.18-2
 libpython2-stdlib==2.7.18-3
 libpython2.7-minimal==2.7.18-8+deb11u1
 libpython2.7-stdlib==2.7.18-8+deb11u1
-libqt5core5a==5.15.2+dfsg-9
-libqt5dbus5==5.15.2+dfsg-9
-libqt5network5==5.15.2+dfsg-9
+libqt5core5a==5.15.2+dfsg-9+deb11u1
+libqt5dbus5==5.15.2+dfsg-9+deb11u1
+libqt5network5==5.15.2+dfsg-9+deb11u1
 libsaivs==1.0.0
 libsodium-dev==1.0.18-1
 libssl1.1==1.1.1w-0+deb11u1
@@ -104,7 +104,7 @@ libxml2==2.9.10+dfsg-6.7+deb11u4
 libxml2-dev==2.9.10+dfsg-6.7+deb11u4
 libyang2==2.0.112-6
 libzmq3-dev==4.3.4-1+deb11u1
-linux-libc-dev==5.10.218-1
+linux-libc-dev==5.10.221-1
 logrotate==3.18.0-2+deb11u2
 lsof==4.93.2+dfsg-1.1
 mailcap==3.69
diff --git a/files/build/versions/dockers/docker-sonic-vs/versions-py3 b/files/build/versions/dockers/docker-sonic-vs/versions-py3
index 72e3c60d5..a7d5f91d9 100644
--- a/files/build/versions/dockers/docker-sonic-vs/versions-py3
+++ b/files/build/versions/dockers/docker-sonic-vs/versions-py3
@@ -1,46 +1,47 @@
 async-timeout==4.0.2
 bcrypt==3.2.2
 blessed==1.20.0
-certifi==2024.6.2
-cffi==1.16.0
+certifi==2024.7.4
+cffi==1.17.0
 charset-normalizer==3.3.2
 click==7.0
 click-log==0.4.0
 colorful==0.5.6
-cryptography==42.0.8
+cryptography==43.0.0
 dbus-python==1.3.2
 docker==7.1.0
-docker-image-py==0.1.12
+docker-image-py==0.1.13
 enlighten==1.12.4
-filelock==3.14.0
+filelock==3.15.4
 idna==3.7
 importlib-metadata==6.1.0
 jsonpatch==1.33
-jsonpointer==2.4
+jsonpointer==3.0.0
 lazy-object-proxy==1.10.0
-m2crypto==0.41.0
+m2crypto==0.42.0
 netifaces==0.10.9
 packaging==24.0
 paramiko==2.11.0
 pexpect==4.9.0
-prefixed==0.7.1
+prefixed==0.8.0
 prettyprinter==0.18.0
-psutil==5.9.8
+psutil==6.0.0
 ptyprocess==0.7.0
-pycairo==1.26.0
+pycairo==1.26.1
 pycparser==2.22
 pygments==2.18.0
 pygobject==3.48.2
 pynacl==1.5.0
 pyroute2==0.5.14
 redis==4.5.2
-requests==2.32.3
+requests==2.31.0
 scapy==2.4.4
+scp==0.14.5
 semantic-version==2.10.0
 systemd-python==235
 toposort==1.6
 typing_extensions==4.7.1
-urllib3==2.2.1
+urllib3==2.2.2
 wcwidth==0.2.13
 websocket-client==1.6.3
 www-authenticate==0.9.2
diff --git a/files/build/versions/dockers/docker-syncd-bluefield/versions-deb-bookworm b/files/build/versions/dockers/docker-syncd-bluefield/versions-deb-bookworm
index 15f6df1d4..623e589a6 100644
--- a/files/build/versions/dockers/docker-syncd-bluefield/versions-deb-bookworm
+++ b/files/build/versions/dockers/docker-syncd-bluefield/versions-deb-bookworm
@@ -1,10 +1,10 @@
 binutils==2.40-2
 binutils-aarch64-linux-gnu==2.40-2
 binutils-dev==2.40-2
-doca-cx-libs==2.7.0034-1
+doca-cx-libs==2.8.0005-1
 ethtool==1:6.1-1
 hwdata==0.368-1
-ibverbs-providers==2307mlnx47-1.2310036
+ibverbs-providers==2404mlnx51-1.2404066
 kmod==30+20221128-1
 libatm1==1:2.5.1-4+b2
 libbinutils==2.40-2
@@ -13,8 +13,8 @@ libctf0==2.40-2
 libexpat1-dev==2.5.0-1
 libgprofng0==2.40-2
 libgrpc-dev==1.39.0-1
-libibverbs-dev==2307mlnx47-1.2310036
-libibverbs1==2307mlnx47-1.2310036
+libibverbs-dev==2404mlnx51-1.2404066
+libibverbs1==2404mlnx51-1.2404066
 libjs-sphinxdoc==5.3.0-4
 libjs-underscore==1.13.4~dfsg+~1.11.4-3
 libjson-c5==0.16-2
@@ -30,24 +30,24 @@ libnuma1==2.0.16-1
 libpcap0.8==1.10.3-1
 libpci3==1:3.9.0-4
 libpython3-dev==3.11.2-1+b1
-libpython3.11-dev==3.11.2-6
+libpython3.11-dev==3.11.2-6+deb12u2
 librxpcompiler-dev==22.05.1
 libsaimetadata==1.0.0
 libsairedis==1.0.0
 lsof==4.95.0-1
-mft==4.26.1-3
+mft==4.28.0-96
 mlnx-dpdk==22.11.0-2404.0.2
-mlnx-iproute2==6.4.0-1.2310036
-mlnx-ofed-kernel-utils==23.10.OFED.23.10.0.3.6.1-1
-mlnx-sai==1.mlnx.SAIBuild0.0.30.0
-mlnx-tools==23.10.0-1.2310036
+mlnx-iproute2==6.7.0-1.2404066
+mlnx-ofed-kernel-utils==24.04.OFED.24.04.0.6.6.1-1
+mlnx-sai==1.mlnx.SAIBuild0.0.32.0
+mlnx-tools==24.04.0-1.2404066
 pci.ids==0.0~2023.04.11-1
 pciutils==1:3.9.0-4
 python3-dev==3.11.2-1+b1
 python3-pip==23.0.1+dfsg-1
-python3.11-dev==3.11.2-6
+python3.11-dev==3.11.2-6+deb12u2
 rxp-compiler==22.05.1
 sdn-appliance==1.5-1mlnx1
 syncd==1.0.0
-udev==252.22-1~deb12u1
+udev==252.26-1~deb12u2
 usb.ids==2024.01.20-0+deb12u1
diff --git a/files/build/versions/dockers/docker-syncd-brcm-dnx-rpc/versions-deb-bullseye b/files/build/versions/dockers/docker-syncd-brcm-dnx-rpc/versions-deb-bullseye
index 200b0c679..6983b871f 100644
--- a/files/build/versions/dockers/docker-syncd-brcm-dnx-rpc/versions-deb-bullseye
+++ b/files/build/versions/dockers/docker-syncd-brcm-dnx-rpc/versions-deb-bullseye
@@ -26,7 +26,7 @@ libdpkg-perl==1.20.13
 libexpat1-dev==2.2.10-2+deb11u5
 libffi-dev==3.3-6
 libgcc-10-dev==10.2.1-6
-libglib2.0-0==2.66.8-1+deb11u3
+libglib2.0-0==2.66.8-1+deb11u4
 libgomp1==10.2.1-6
 libicu67==67.1-7
 libisl23==0.23-1
@@ -43,9 +43,9 @@ libpython2.7==2.7.18-8+deb11u1
 libpython2.7-dev==2.7.18-8+deb11u1
 libpython2.7-minimal==2.7.18-8+deb11u1
 libpython2.7-stdlib==2.7.18-8+deb11u1
-libqt5core5a==5.15.2+dfsg-9
-libqt5dbus5==5.15.2+dfsg-9
-libqt5network5==5.15.2+dfsg-9
+libqt5core5a==5.15.2+dfsg-9+deb11u1
+libqt5dbus5==5.15.2+dfsg-9+deb11u1
+libqt5network5==5.15.2+dfsg-9+deb11u1
 libquadmath0==10.2.1-6
 librhash0==1.4.1-2
 libssl-dev==1.1.1w-0+deb11u1
@@ -57,7 +57,7 @@ libtsan0==10.2.1-6
 libubsan1==10.2.1-6
 libuv1==1.40.0-2+deb11u1
 libxml2==2.9.10+dfsg-6.7+deb11u4
-linux-libc-dev==5.10.218-1
+linux-libc-dev==5.10.221-1
 mailcap==3.69
 make==4.3-4.1
 mime-support==3.66
diff --git a/files/build/versions/dockers/docker-syncd-brcm-dnx/versions-deb-bullseye b/files/build/versions/dockers/docker-syncd-brcm-dnx/versions-deb-bullseye
index 72bbb5739..b5e8fd335 100644
--- a/files/build/versions/dockers/docker-syncd-brcm-dnx/versions-deb-bullseye
+++ b/files/build/versions/dockers/docker-syncd-brcm-dnx/versions-deb-bullseye
@@ -5,12 +5,12 @@ kmod==28-1
 libbabeltrace1==1.5.8-1+b3
 libboost-regex1.74.0==1.74.0-9
 libcbor0==0.5.0+dfsg-2
-libcurl3-gnutls==7.74.0-1.3+deb11u11
+libcurl3-gnutls==7.74.0-1.3+deb11u12
 libdebuginfod1==0.183-1
 libdw1==0.183-1
 libedit2==3.1-20191231-2+b1
 libfido2-1==1.6.0-2
-libglib2.0-0==2.66.8-1+deb11u3
+libglib2.0-0==2.66.8-1+deb11u4
 libgpm2==1.20.7-8
 libicu67==67.1-7
 libipt2==2.0.3-1
diff --git a/files/build/versions/dockers/docker-syncd-brcm-rpc/versions-deb-bullseye b/files/build/versions/dockers/docker-syncd-brcm-rpc/versions-deb-bullseye
index 200b0c679..6983b871f 100644
--- a/files/build/versions/dockers/docker-syncd-brcm-rpc/versions-deb-bullseye
+++ b/files/build/versions/dockers/docker-syncd-brcm-rpc/versions-deb-bullseye
@@ -26,7 +26,7 @@ libdpkg-perl==1.20.13
 libexpat1-dev==2.2.10-2+deb11u5
 libffi-dev==3.3-6
 libgcc-10-dev==10.2.1-6
-libglib2.0-0==2.66.8-1+deb11u3
+libglib2.0-0==2.66.8-1+deb11u4
 libgomp1==10.2.1-6
 libicu67==67.1-7
 libisl23==0.23-1
@@ -43,9 +43,9 @@ libpython2.7==2.7.18-8+deb11u1
 libpython2.7-dev==2.7.18-8+deb11u1
 libpython2.7-minimal==2.7.18-8+deb11u1
 libpython2.7-stdlib==2.7.18-8+deb11u1
-libqt5core5a==5.15.2+dfsg-9
-libqt5dbus5==5.15.2+dfsg-9
-libqt5network5==5.15.2+dfsg-9
+libqt5core5a==5.15.2+dfsg-9+deb11u1
+libqt5dbus5==5.15.2+dfsg-9+deb11u1
+libqt5network5==5.15.2+dfsg-9+deb11u1
 libquadmath0==10.2.1-6
 librhash0==1.4.1-2
 libssl-dev==1.1.1w-0+deb11u1
@@ -57,7 +57,7 @@ libtsan0==10.2.1-6
 libubsan1==10.2.1-6
 libuv1==1.40.0-2+deb11u1
 libxml2==2.9.10+dfsg-6.7+deb11u4
-linux-libc-dev==5.10.218-1
+linux-libc-dev==5.10.221-1
 mailcap==3.69
 make==4.3-4.1
 mime-support==3.66
diff --git a/files/build/versions/dockers/docker-syncd-brcm/versions-deb-bullseye b/files/build/versions/dockers/docker-syncd-brcm/versions-deb-bullseye
index 1c5b66ad5..dcc9f95ec 100644
--- a/files/build/versions/dockers/docker-syncd-brcm/versions-deb-bullseye
+++ b/files/build/versions/dockers/docker-syncd-brcm/versions-deb-bullseye
@@ -5,12 +5,12 @@ kmod==28-1
 libbabeltrace1==1.5.8-1+b3
 libboost-regex1.74.0==1.74.0-9
 libcbor0==0.5.0+dfsg-2
-libcurl3-gnutls==7.74.0-1.3+deb11u11
+libcurl3-gnutls==7.74.0-1.3+deb11u12
 libdebuginfod1==0.183-1
 libdw1==0.183-1
 libedit2==3.1-20191231-2+b1
 libfido2-1==1.6.0-2
-libglib2.0-0==2.66.8-1+deb11u3
+libglib2.0-0==2.66.8-1+deb11u4
 libgpm2==1.20.7-8
 libicu67==67.1-7
 libipt2==2.0.3-1
diff --git a/files/build/versions/dockers/docker-syncd-centec-rpc/versions-deb-bullseye b/files/build/versions/dockers/docker-syncd-centec-rpc/versions-deb-bullseye
index 200b0c679..6983b871f 100644
--- a/files/build/versions/dockers/docker-syncd-centec-rpc/versions-deb-bullseye
+++ b/files/build/versions/dockers/docker-syncd-centec-rpc/versions-deb-bullseye
@@ -26,7 +26,7 @@ libdpkg-perl==1.20.13
 libexpat1-dev==2.2.10-2+deb11u5
 libffi-dev==3.3-6
 libgcc-10-dev==10.2.1-6
-libglib2.0-0==2.66.8-1+deb11u3
+libglib2.0-0==2.66.8-1+deb11u4
 libgomp1==10.2.1-6
 libicu67==67.1-7
 libisl23==0.23-1
@@ -43,9 +43,9 @@ libpython2.7==2.7.18-8+deb11u1
 libpython2.7-dev==2.7.18-8+deb11u1
 libpython2.7-minimal==2.7.18-8+deb11u1
 libpython2.7-stdlib==2.7.18-8+deb11u1
-libqt5core5a==5.15.2+dfsg-9
-libqt5dbus5==5.15.2+dfsg-9
-libqt5network5==5.15.2+dfsg-9
+libqt5core5a==5.15.2+dfsg-9+deb11u1
+libqt5dbus5==5.15.2+dfsg-9+deb11u1
+libqt5network5==5.15.2+dfsg-9+deb11u1
 libquadmath0==10.2.1-6
 librhash0==1.4.1-2
 libssl-dev==1.1.1w-0+deb11u1
@@ -57,7 +57,7 @@ libtsan0==10.2.1-6
 libubsan1==10.2.1-6
 libuv1==1.40.0-2+deb11u1
 libxml2==2.9.10+dfsg-6.7+deb11u4
-linux-libc-dev==5.10.218-1
+linux-libc-dev==5.10.221-1
 mailcap==3.69
 make==4.3-4.1
 mime-support==3.66
diff --git a/files/build/versions/dockers/docker-syncd-centec/versions-deb-bullseye b/files/build/versions/dockers/docker-syncd-centec/versions-deb-bullseye
index f9547ecf8..e2a04839d 100644
--- a/files/build/versions/dockers/docker-syncd-centec/versions-deb-bullseye
+++ b/files/build/versions/dockers/docker-syncd-centec/versions-deb-bullseye
@@ -4,12 +4,12 @@ kmod==28-1
 libbabeltrace1==1.5.8-1+b3
 libboost-regex1.74.0==1.74.0-9
 libcbor0==0.5.0+dfsg-2
-libcurl3-gnutls==7.74.0-1.3+deb11u11
+libcurl3-gnutls==7.74.0-1.3+deb11u12
 libdebuginfod1==0.183-1
 libdw1==0.183-1
 libedit2==3.1-20191231-2+b1
 libfido2-1==1.6.0-2
-libglib2.0-0==2.66.8-1+deb11u3
+libglib2.0-0==2.66.8-1+deb11u4
 libgpm2==1.20.7-8
 libhiredis0.14-dbgsym==0.14.1-1
 libicu67==67.1-7
diff --git a/files/build/versions/dockers/docker-syncd-mlnx-rpc/versions-deb-bookworm b/files/build/versions/dockers/docker-syncd-mlnx-rpc/versions-deb-bookworm
index 5fa2d43ee..55db77737 100644
--- a/files/build/versions/dockers/docker-syncd-mlnx-rpc/versions-deb-bookworm
+++ b/files/build/versions/dockers/docker-syncd-mlnx-rpc/versions-deb-bookworm
@@ -1,15 +1,17 @@
 cmake-data==3.25.1-1
 libboost-atomic1.74.0==1.74.0+ds1-21
 libdouble-conversion3==3.2.1-1
-libglib2.0-0==2.74.6-2+deb12u2
+libglib2.0-0==2.74.6-2+deb12u3
 libnanomsg-dev==1.1.5+dfsg-1.1+b1
 libnanomsg5==1.1.5+dfsg-1.1+b1
 libpcre2-16-0==10.42-1
-libqt5core5a==5.15.8+dfsg-11
-libqt5dbus5==5.15.8+dfsg-11
-libqt5network5==5.15.8+dfsg-11
+libqt5core5a==5.15.8+dfsg-11+deb12u2
+libqt5dbus5==5.15.8+dfsg-11+deb12u2
+libqt5network5==5.15.8+dfsg-11+deb12u2
+libssl3==3.0.13-1~deb12u1
 libthrift-0.17.0==0.17.0-2+b2
 netbase==6.4
+openssl==3.0.13-1~deb12u1
 python3-scapy==2.5.0+dfsg-2
 python3-thrift==0.17.0-2+b2
 shared-mime-info==2.2-1
diff --git a/files/build/versions/dockers/docker-syncd-mlnx/versions-deb-bookworm b/files/build/versions/dockers/docker-syncd-mlnx/versions-deb-bookworm
index f0be6ba0d..d9ef40d54 100644
--- a/files/build/versions/dockers/docker-syncd-mlnx/versions-deb-bookworm
+++ b/files/build/versions/dockers/docker-syncd-mlnx/versions-deb-bookworm
@@ -1,5 +1,5 @@
-applibs==1.mlnx.4.6.3064
-applibs-dev==1.mlnx.4.6.3064
+applibs==1.mlnx.4.6.4072
+applibs-dev==1.mlnx.4.6.4072
 gdb==13.1-3
 gdbserver==13.1-3
 iproute2-mlnx==6.1.0-3
@@ -8,14 +8,14 @@ libboost-regex1.74.0==1.74.0+ds1-21
 libc-dev-bin==2.36-9+deb12u7
 libc6-dev==2.36-9+deb12u7
 libcbor0.8==0.8.0-2+b1
-libcurl3-gnutls==7.88.1-10+deb12u5
+libcurl3-gnutls==7.88.1-10+deb12u6
 libdebuginfod-common==0.188-2.1
 libdebuginfod1==0.188-2.1
 libdw1==0.188-2.1
 libedit2==3.1-20221030-2
 libexpat1-dev==2.5.0-1
 libfido2-1==1.12.0-2+b1
-libglib2.0-0==2.74.6-2+deb12u2
+libglib2.0-0==2.74.6-2+deb12u3
 libgpm2==1.20.7-10+b1
 libicu72==72.1-3
 libipt2==2.0.5-1
@@ -24,51 +24,54 @@ libjs-underscore==1.13.4~dfsg+~1.11.4-3
 libmpfr6==4.2.0-1
 libnsl-dev==1.3.0-2
 libpython3-dev==3.11.2-1+b1
-libpython3.11-dev==3.11.2-6
+libpython3.11-dev==3.11.2-6+deb12u2
 libsaimetadata==1.0.0
 libsaimetadata-dbgsym==1.0.0
 libsairedis==1.0.0
 libsairedis-dbgsym==1.0.0
 libsource-highlight-common==3.1.9-4.2
 libsource-highlight4v5==3.1.9-4.2+b3
+libssl-dev==3.0.13-1~deb12u1
+libssl3==3.0.13-1~deb12u1
 libswsscommon-dbgsym==1.0.0
 libtirpc-dev==1.3.3+ds-1
 libunwind8==1.6.2-3
 libxml2==2.9.14+dfsg-1.3~deb12u1
-linux-libc-dev==6.1.90-1
+linux-libc-dev==6.1.99-1
 mft==4.28.0-96
 mft-fwtrace-cfg==1.0.0
-mlnx-sai==1.mlnx.SAIBuild2311.27.0.16
-openssh-client==1:9.2p1-2+deb12u2
-python-sdk-api==1.mlnx.4.6.3064
+mlnx-sai==1.mlnx.SAIBuild2405.28.0.33
+openssh-client==1:9.2p1-2+deb12u3
+openssl==3.0.13-1~deb12u1
+python-sdk-api==1.mlnx.4.6.4072
 python3-attr==22.2.0-1
 python3-dev==3.11.2-1+b1
 python3-jsonschema==4.10.3-1
 python3-pip==23.0.1+dfsg-1
 python3-pyrsistent==0.18.1-1+b3
-python3.11-dev==3.11.2-6
+python3.11-dev==3.11.2-6+deb12u2
 rpcsvc-proto==1.4.3-1
 sensible-utils==0.0.17+nmu1
 sshpass==1.09-1+b1
 strace==6.1-0.1
-sx-acl-helper==1.mlnx.4.6.3064
-sx-acl-helper-dev==1.mlnx.4.6.3064
-sx-complib==1.mlnx.4.6.3064
-sx-complib-dev==1.mlnx.4.6.3064
-sx-examples==1.mlnx.4.6.3064
-sx-examples-dev==1.mlnx.4.6.3064
-sx-gen-utils==1.mlnx.4.6.3064
-sx-gen-utils-dev==1.mlnx.4.6.3064
-sx-hash-calc==1.mlnx.4.6.3064
-sx-obj-desc-lib==1.mlnx.4.6.3064
-sx-obj-desc-lib-dev==1.mlnx.4.6.3064
-sxd-libs==1.mlnx.4.6.3064
-sxd-libs-dev==1.mlnx.4.6.3064
+sx-acl-helper==1.mlnx.4.6.4072
+sx-acl-helper-dev==1.mlnx.4.6.4072
+sx-complib==1.mlnx.4.6.4072
+sx-complib-dev==1.mlnx.4.6.4072
+sx-examples==1.mlnx.4.6.4072
+sx-examples-dev==1.mlnx.4.6.4072
+sx-gen-utils==1.mlnx.4.6.4072
+sx-gen-utils-dev==1.mlnx.4.6.4072
+sx-hash-calc==1.mlnx.4.6.4072
+sx-obj-desc-lib==1.mlnx.4.6.4072
+sx-obj-desc-lib-dev==1.mlnx.4.6.4072
+sxd-libs==1.mlnx.4.6.4072
+sxd-libs-dev==1.mlnx.4.6.4072
 syncd==1.0.0
 syncd-dbgsym==1.0.0
 ucf==3.0043+nmu1
 vim==2:9.0.1378-2
 vim-runtime==2:9.0.1378-2
-wjh-libs==1.mlnx.4.6.3064
-wjh-libs-dev==1.mlnx.4.6.3064
+wjh-libs==1.mlnx.4.6.4072
+wjh-libs-dev==1.mlnx.4.6.4072
 zlib1g-dev==1:1.2.13.dfsg-1
diff --git a/files/build/versions/dockers/docker-syncd-mlnx/versions-py3 b/files/build/versions/dockers/docker-syncd-mlnx/versions-py3
index 9330926a7..3ba6921c8 100644
--- a/files/build/versions/dockers/docker-syncd-mlnx/versions-py3
+++ b/files/build/versions/dockers/docker-syncd-mlnx/versions-py3
@@ -3,6 +3,6 @@ importlib-metadata==1.6.0
 jsonschema==4.10.3
 more-itertools==4.2.0
 pyrsistent==0.18.1
-python-sdk-api==4.6.3064
+python-sdk-api==4.6.4072
 python_sdk_api==4.6.3064
 zipp==1.0.0
diff --git a/files/build/versions/dockers/docker-syncd-mrvl/versions-deb-bookworm-arm64 b/files/build/versions/dockers/docker-syncd-mrvl/versions-deb-bookworm-arm64
index 86b1a2416..9b956a86a 100644
--- a/files/build/versions/dockers/docker-syncd-mrvl/versions-deb-bookworm-arm64
+++ b/files/build/versions/dockers/docker-syncd-mrvl/versions-deb-bookworm-arm64
@@ -8,7 +8,7 @@ libpcap0.8==1.10.3-1
 libpcap0.8-dev==1.10.3-1
 libpkgconf3==1.8.1-1
 libpython3-dev==3.11.2-1+b1
-libpython3.11-dev==3.11.2-6
+libpython3.11-dev==3.11.2-6+deb12u2
 libsaimetadata==1.0.0
 libsairedis==1.0.0
 mrvllibsai==1.13.0-1
@@ -16,7 +16,7 @@ pkg-config==1.8.1-1
 pkgconf==1.8.1-1
 pkgconf-bin==1.8.1-1
 python3-dev==3.11.2-1+b1
-python3.11-dev==3.11.2-6
+python3.11-dev==3.11.2-6+deb12u2
 sgml-base==1.31
 swig==4.1.0-0.2
 swig4.0==4.1.0-0.2
diff --git a/files/build/versions/dockers/docker-syncd-mrvl/versions-deb-bookworm-armhf b/files/build/versions/dockers/docker-syncd-mrvl/versions-deb-bookworm-armhf
index 0cc251c1f..637e2933d 100644
--- a/files/build/versions/dockers/docker-syncd-mrvl/versions-deb-bookworm-armhf
+++ b/files/build/versions/dockers/docker-syncd-mrvl/versions-deb-bookworm-armhf
@@ -8,7 +8,7 @@ libpcap0.8==1.10.3-1
 libpcap0.8-dev==1.10.3-1
 libpkgconf3==1.8.1-1
 libpython3-dev==3.11.2-1+b1
-libpython3.11-dev==3.11.2-6
+libpython3.11-dev==3.11.2-6+deb12u2
 libsaimetadata==1.0.0
 libsairedis==1.0.0
 mrvllibsai==1.13.0-3
@@ -16,7 +16,7 @@ pkg-config==1.8.1-1
 pkgconf==1.8.1-1
 pkgconf-bin==1.8.1-1
 python3-dev==3.11.2-1+b1
-python3.11-dev==3.11.2-6
+python3.11-dev==3.11.2-6+deb12u2
 sgml-base==1.31
 swig==4.1.0-0.2
 swig4.0==4.1.0-0.2
diff --git a/files/build/versions/dockers/docker-syncd-vs/versions-deb-bookworm b/files/build/versions/dockers/docker-syncd-vs/versions-deb-bookworm
index 616dcecd8..826787858 100644
--- a/files/build/versions/dockers/docker-syncd-vs/versions-deb-bookworm
+++ b/files/build/versions/dockers/docker-syncd-vs/versions-deb-bookworm
@@ -129,8 +129,8 @@ libclang-cpp14==1:14.0.6-12
 libclang1-14==1:14.0.6-12
 libctf-nobfd0==2.40-2
 libctf0==2.40-2
-libcurl3-gnutls==7.88.1-10+deb12u5
-libcurl3-nss==7.88.1-10+deb12u5
+libcurl3-gnutls==7.88.1-10+deb12u6
+libcurl3-nss==7.88.1-10+deb12u6
 libdbus-1-dev==1.14.10-1~deb12u1
 libdebuginfod-common==0.188-2.1
 libdebuginfod1==0.188-2.1
@@ -154,7 +154,7 @@ libgc1==1:8.2.2-3
 libgcc-12-dev==12.2.0-14
 libgfortran-12-dev==12.2.0-14
 libgfortran5==12.2.0-14
-libglib2.0-0==2.74.6-2+deb12u2
+libglib2.0-0==2.74.6-2+deb12u3
 libgmp-dev==2:6.2.1+dfsg1-1.1
 libgmpxx4ldbl==2:6.2.1+dfsg1-1.1
 libgomp1==12.2.0-14
@@ -179,8 +179,8 @@ libjs-sphinxdoc==5.3.0-4
 libjs-underscore==1.13.4~dfsg+~1.11.4-3
 libllvm14==1:14.0.6-12
 liblsan0==12.2.0-14
-libltdl-dev==2.4.7-5
-libltdl7==2.4.7-5
+libltdl-dev==2.4.7-7~deb12u1
+libltdl7==2.4.7-7~deb12u1
 libmagic-mgc==1:5.44-3
 libmagic1==1:5.44-3
 libmpc3==1.3.1-1
@@ -216,10 +216,10 @@ libprotoc32==3.21.12-3
 libpsm-infinipath1==3.3+20.604758e7-6.2
 libpsm2-2==11.2.185-2
 libpython3-dev==3.11.2-1+b1
-libpython3.11-dev==3.11.2-6
-libqt5core5a==5.15.8+dfsg-11
-libqt5dbus5==5.15.8+dfsg-11
-libqt5network5==5.15.8+dfsg-11
+libpython3.11-dev==3.11.2-6+deb12u2
+libqt5core5a==5.15.8+dfsg-11+deb12u2
+libqt5dbus5==5.15.8+dfsg-11+deb12u2
+libqt5network5==5.15.8+dfsg-11+deb12u2
 libquadmath0==12.2.0-14
 librdmacm1==44.0-2
 libre2-9==20220601+dfsg-1+b1
@@ -233,13 +233,14 @@ libsaivs==1.0.0
 libsaivs-dbgsym==1.0.0
 libsource-highlight-common==3.1.9-4.2
 libsource-highlight4v5==3.1.9-4.2+b3
-libssl-dev==3.0.11-1~deb12u2
+libssl-dev==3.0.13-1~deb12u1
+libssl3==3.0.13-1~deb12u1
 libstdc++-12-dev==12.2.0-14
 libswsscommon-dbgsym==1.0.0
 libthrift-0.17.0==0.17.0-2+b2
 libthrift-dev==0.17.0-2+b2
 libtirpc-dev==1.3.3+ds-1
-libtool==2.4.7-5
+libtool==2.4.7-7~deb12u1
 libtsan2==12.2.0-14
 libubsan1==12.2.0-14
 libucx0==1.13.1-1
@@ -253,7 +254,7 @@ libxext6==2:1.3.4-1+b1
 libxml2==2.9.14+dfsg-1.3~deb12u1
 libxnvctrl0==525.85.05-3~deb12u1
 libz3-4==4.8.12-3.1
-linux-libc-dev==6.1.90-1
+linux-libc-dev==6.1.99-1
 llvm==1:14.0-55.7~deb12u1
 llvm-14==1:14.0.6-12
 llvm-14-linker-tools==1:14.0.6-12
@@ -267,7 +268,8 @@ nss-plugin-pem==1.0.8+1-1
 ocl-icd-libopencl1==2.3.1-1
 openmpi-bin==4.1.4-3+b1
 openmpi-common==4.1.4-3
-openssh-client==1:9.2p1-2+deb12u2
+openssh-client==1:9.2p1-2+deb12u3
+openssl==3.0.13-1~deb12u1
 p4lang-bmv2==1.15.0-7
 p4lang-p4c==1.2.4.2-2
 p4lang-pi==0.1.0-15
@@ -285,7 +287,7 @@ python3-pyroute2==0.7.2-2
 python3-scapy==2.5.0+dfsg-2
 python3-six==1.16.0-4
 python3-thrift==0.17.0-2+b2
-python3.11-dev==3.11.2-6
+python3.11-dev==3.11.2-6+deb12u2
 rpcsvc-proto==1.4.3-1
 sensible-utils==0.0.17+nmu1
 sgml-base==1.31
diff --git a/files/build/versions/dockers/docker-teamd/versions-deb-bookworm b/files/build/versions/dockers/docker-teamd/versions-deb-bookworm
index b2369562d..a14f3b886 100644
--- a/files/build/versions/dockers/docker-teamd/versions-deb-bookworm
+++ b/files/build/versions/dockers/docker-teamd/versions-deb-bookworm
@@ -3,25 +3,28 @@ gdbserver==13.1-3
 libbabeltrace1==1.5.11-1+b2
 libboost-regex1.74.0==1.74.0+ds1-21
 libcbor0.8==0.8.0-2+b1
-libcurl3-gnutls==7.88.1-10+deb12u5
+libcurl3-gnutls==7.88.1-10+deb12u6
 libdebuginfod-common==0.188-2.1
 libdebuginfod1==0.188-2.1
 libdw1==0.188-2.1
 libedit2==3.1-20221030-2
 libfido2-1==1.12.0-2+b1
-libglib2.0-0==2.74.6-2+deb12u2
+libglib2.0-0==2.74.6-2+deb12u3
 libgpm2==1.20.7-10+b1
 libicu72==72.1-3
 libipt2==2.0.5-1
 libmpfr6==4.2.0-1
 libsource-highlight-common==3.1.9-4.2
 libsource-highlight4v5==3.1.9-4.2+b3
+libssl-dev==3.0.13-1~deb12u1
+libssl3==3.0.13-1~deb12u1
 libswsscommon-dbgsym==1.0.0
 libteam-utils==1.31-1
 libteam-utils-dbgsym==1.31-1
 libteamdctl0-dbgsym==1.31-1
 libunwind8==1.6.2-3
-openssh-client==1:9.2p1-2+deb12u2
+openssh-client==1:9.2p1-2+deb12u3
+openssl==3.0.13-1~deb12u1
 sensible-utils==0.0.17+nmu1
 sshpass==1.09-1+b1
 strace==6.1-0.1
diff --git a/files/build/versions/dockers/sonic-slave-bookworm/versions-deb-bookworm b/files/build/versions/dockers/sonic-slave-bookworm/versions-deb-bookworm
index dabe98c5a..902ef9de3 100644
--- a/files/build/versions/dockers/sonic-slave-bookworm/versions-deb-bookworm
+++ b/files/build/versions/dockers/sonic-slave-bookworm/versions-deb-bookworm
@@ -26,9 +26,9 @@ autopoint==0.21-12
 autotools-dev==20220109.1
 bash-completion==1:2.11-6
 bc==1.07.1-3+b1
-bind9-dnsutils==1:9.18.24-1
-bind9-host==1:9.18.24-1
-bind9-libs==1:9.18.24-1
+bind9-dnsutils==1:9.18.28-1~deb12u2
+bind9-host==1:9.18.28-1~deb12u2
+bind9-libs==1:9.18.28-1~deb12u2
 binutils==2.40-2
 binutils-aarch64-linux-gnu==2.40-2
 binutils-arm-linux-gnueabihf==2.40-2
@@ -66,7 +66,7 @@ cppcheck==2.10-2
 cppzmq-dev==4.9.0-1
 cron==3.0pl1-162
 cron-daemon-common==3.0pl1-162
-curl==7.88.1-10+deb12u5
+curl==7.88.1-10+deb12u6
 cython3==0.29.32-2+b1
 dbus==1.14.10-1~deb12u1
 dbus-bin==1.14.10-1~deb12u1
@@ -97,11 +97,11 @@ dh-strip-nondeterminism==1.13.1-1
 dictionaries-common==1.29.5
 diffstat==1.65-1
 dirmngr==2.2.40-1.1
-distro-info-data==0.58+deb12u1
+distro-info-data==0.58+deb12u2
 dkms==3.0.10-8+deb12u1
 dmidecode==3.4-1
 dmsetup==2:1.02.185-2
-dnsutils==1:9.18.24-1
+dnsutils==1:9.18.28-1~deb12u2
 docbook==4.5-10
 docbook-dsssl==1.79-10
 docbook-to-man==1:2.0.0-45
@@ -110,7 +110,7 @@ docbook-xml==4.5-12
 docker-buildx-plugin==0.10.5-1~debian.12~bookworm
 docker-ce==5:24.0.2-1~debian.12~bookworm
 docker-ce-cli==5:24.0.2-1~debian.12~bookworm
-docker-ce-rootless-extras==5:26.1.3-1~debian.12~bookworm
+docker-ce-rootless-extras==5:27.1.2-1~debian.12~bookworm
 docker-compose-plugin==2.18.1-1~debian.12~bookworm
 docutils-common==0.19+dfsg-6
 dosfstools==4.2-1
@@ -126,9 +126,9 @@ efibootmgr==17-2
 emacsen-common==3.0.5
 enchant-2==2.3.3-2
 equivs==2.3.1
-exim4-base==4.96-15+deb12u4
-exim4-config==4.96-15+deb12u4
-exim4-daemon-light==4.96-15+deb12u4
+exim4-base==4.96-15+deb12u5
+exim4-config==4.96-15+deb12u5
+exim4-daemon-light==4.96-15+deb12u5
 expat==2.5.0-1
 fakeroot==1.31-1.2
 fig2dev==1:3.2.8b-3
@@ -171,7 +171,7 @@ ghostscript==10.0.0~dfsg-11+deb12u4
 gir1.2-atk-1.0==2.46.0-5
 gir1.2-atspi-2.0==2.46.0-5
 gir1.2-freedesktop==1.74.0-3
-gir1.2-gdkpixbuf-2.0==2.42.10+dfsg-1+b1
+gir1.2-gdkpixbuf-2.0==2.42.10+dfsg-1+deb12u1
 gir1.2-glib-2.0==1.74.0-3
 gir1.2-gtk-3.0==3.24.38-2~deb12u1
 gir1.2-harfbuzz-0.0==6.0.0+dfsg-3
@@ -250,8 +250,8 @@ junit4==4.13.2-3
 junit5==5.9.2-1
 kernel-wedge==2.104
 kmod==30+20221128-1
-krb5-locales==1.20.1-2+deb12u1
-krb5-multidev==1.20.1-2+deb12u1
+krb5-locales==1.20.1-2+deb12u2
+krb5-multidev==1.20.1-2+deb12u2
 lcov==1.16-1
 less==590-2.1~deb12u2
 lib2geom1.2.0==1.2.2-3
@@ -286,7 +286,7 @@ libappstream4==0.16.1-2
 libapt-pkg-perl==0.1.40+b2
 libarchive-cpio-perl==0.10-3
 libarchive-zip-perl==1.68-1
-libarchive13==3.6.2-1
+libarchive13==3.6.2-1+deb12u1
 libargon2-1==0~20171227-0.3+deb12u1
 libarray-intspan-perl==2.004-2
 libasan8==12.2.0-14
@@ -322,11 +322,11 @@ libavahi-client3==0.8-10
 libavahi-common-data==0.8-10
 libavahi-common3==0.8-10
 libavc1394-0==0.5.4-5
-libavcodec59==7:5.1.4-0+deb12u1
-libavfilter8==7:5.1.4-0+deb12u1
-libavformat59==7:5.1.4-0+deb12u1
+libavcodec59==7:5.1.5-0+deb12u1
+libavfilter8==7:5.1.5-0+deb12u1
+libavformat59==7:5.1.5-0+deb12u1
 libavif15==0.11.1-1
-libavutil57==7:5.1.4-0+deb12u1
+libavutil57==7:5.1.5-0+deb12u1
 libb-hooks-endofscope-perl==0.26-1
 libb-hooks-op-check-perl==0.22-2+b1
 libbabeltrace-dev==1.5.11-1+b2
@@ -485,8 +485,8 @@ libcgi-fast-perl==1:2.15-1
 libcgi-pm-perl==4.55-1
 libcgraph6==2.42.2-7+b3
 libchromaprint1==1.5.1-2+b1
-libcjson-dev==1.7.15-1
-libcjson1==1.7.15-1
+libcjson-dev==1.7.15-1+deb12u1
+libcjson1==1.7.15-1+deb12u1
 libclang-common-14-dev==1:14.0.6-12
 libclang-cpp14==1:14.0.6-12
 libclang-rt-14-dev==1:14.0.6-12
@@ -536,10 +536,10 @@ libctf0==2.40-2
 libcunit1==2.1-3-dfsg-2.6
 libcunit1-dev==2.1-3-dfsg-2.6
 libcups2==2.4.2-3+deb12u5
-libcurl3-gnutls==7.88.1-10+deb12u5
-libcurl3-nss==7.88.1-10+deb12u5
-libcurl4==7.88.1-10+deb12u5
-libcurl4-openssl-dev==7.88.1-10+deb12u5
+libcurl3-gnutls==7.88.1-10+deb12u6
+libcurl3-nss==7.88.1-10+deb12u6
+libcurl4==7.88.1-10+deb12u6
+libcurl4-openssl-dev==7.88.1-10+deb12u6
 libdaemon-dev==0.14-7.1
 libdaemon0==0.14-7.1
 libdata-dpath-perl==0.58-2
@@ -680,8 +680,8 @@ libfontconfig-dev==2.14.1-4
 libfontconfig1==2.14.1-4
 libfontenc1==1:1.1.4-1
 libfop-java==1:2.8-2
-libfreetype-dev==2.12.1+dfsg-5
-libfreetype6==2.12.1+dfsg-5
+libfreetype-dev==2.12.1+dfsg-5+deb12u3
+libfreetype6==2.12.1+dfsg-5+deb12u3
 libfreezethaw-perl==0.5001-3
 libfribidi-dev==1.0.8-2.1
 libfribidi0==1.0.8-2.1
@@ -702,10 +702,10 @@ libgd-perl==2.76-4+b1
 libgd3==2.3.3-9
 libgdbm-compat4==1.23-3
 libgdbm6==1.23-3
-libgdk-pixbuf-2.0-0==2.42.10+dfsg-1+b1
-libgdk-pixbuf-2.0-dev==2.42.10+dfsg-1+b1
-libgdk-pixbuf2.0-bin==2.42.10+dfsg-1+b1
-libgdk-pixbuf2.0-common==2.42.10+dfsg-1
+libgdk-pixbuf-2.0-0==2.42.10+dfsg-1+deb12u1
+libgdk-pixbuf-2.0-dev==2.42.10+dfsg-1+deb12u1
+libgdk-pixbuf2.0-bin==2.42.10+dfsg-1+deb12u1
+libgdk-pixbuf2.0-common==2.42.10+dfsg-1+deb12u1
 libgeronimo-annotation-1.3-spec-java==1.3-1
 libgeronimo-interceptor-3.0-spec-java==1.0.1-4
 libgetopt-long-descriptive-perl==0.111-1
@@ -728,11 +728,11 @@ libglapi-mesa==22.3.6-1+deb12u1
 libgles-dev==1.6.0-1
 libgles1==1.6.0-1
 libgles2==1.6.0-1
-libglib2.0-0==2.74.6-2+deb12u2
-libglib2.0-bin==2.74.6-2+deb12u2
-libglib2.0-data==2.74.6-2+deb12u2
-libglib2.0-dev==2.74.6-2+deb12u2
-libglib2.0-dev-bin==2.74.6-2+deb12u2
+libglib2.0-0==2.74.6-2+deb12u3
+libglib2.0-bin==2.74.6-2+deb12u3
+libglib2.0-data==2.74.6-2+deb12u3
+libglib2.0-dev==2.74.6-2+deb12u3
+libglib2.0-dev-bin==2.74.6-2+deb12u3
 libglibmm-2.4-1v5==2.66.5-2
 libglu1-mesa==9.0.2-1.1
 libglu1-mesa-dev==9.0.2-1.1
@@ -747,7 +747,7 @@ libgme0==0.6.3-6
 libgmock-dev==1.12.1-0.2
 libgmp-dev==2:6.2.1+dfsg1-1.1
 libgmpxx4ldbl==2:6.2.1+dfsg1-1.1
-libgnutls-dane0==3.7.9-2+deb12u2
+libgnutls-dane0==3.7.9-2+deb12u3
 libgomp1==12.2.0-14
 libgomp1-armhf-cross==12.2.0-14cross1
 libgoogle-perftools4==2.10-1
@@ -768,8 +768,8 @@ libgslcblas0==2.7.1+dfsg-5
 libgsm1==1.0.22-1
 libgspell-1-2==1.12.0-1+b2
 libgspell-1-common==1.12.0-1
-libgssapi-krb5-2==1.20.1-2+deb12u1
-libgssrpc4==1.20.1-2+deb12u1
+libgssapi-krb5-2==1.20.1-2+deb12u2
+libgssrpc4==1.20.1-2+deb12u2
 libgstreamer-plugins-base1.0-0==1.22.0-3+deb12u2
 libgstreamer1.0-0==1.22.0-2
 libgtest-dev==1.12.1-0.2
@@ -907,16 +907,16 @@ libjudydebian1==1.0.5-5+b2
 libjxl0.7==0.7.0-10
 libjxr-tools==1.2~git20170615.f752187-5
 libjxr0==1.2~git20170615.f752187-5
-libk5crypto3==1.20.1-2+deb12u1
-libkadm5clnt-mit12==1.20.1-2+deb12u1
-libkadm5srv-mit12==1.20.1-2+deb12u1
-libkdb5-10==1.20.1-2+deb12u1
+libk5crypto3==1.20.1-2+deb12u2
+libkadm5clnt-mit12==1.20.1-2+deb12u2
+libkadm5srv-mit12==1.20.1-2+deb12u2
+libkdb5-10==1.20.1-2+deb12u2
 libkeyutils1==1.6.3-2
 libkmod2==30+20221128-1
 libkpathsea6==2022.20220321.62855-5.1+deb12u1
-libkrb5-3==1.20.1-2+deb12u1
-libkrb5-dev==1.20.1-2+deb12u1
-libkrb5support0==1.20.1-2+deb12u1
+libkrb5-3==1.20.1-2+deb12u2
+libkrb5-dev==1.20.1-2+deb12u2
+libkrb5support0==1.20.1-2+deb12u2
 libksba8==1.6.3-2
 liblab-gamut1==2.42.2-7+b3
 liblapack3==3.11.0-2
@@ -944,8 +944,8 @@ liblog-any-perl==1.713-1
 liblognorm5==2.0.6-4
 liblqr-1-0==0.4.2-2.1
 liblsan0==12.2.0-14
-libltdl-dev==2.4.7-5
-libltdl7==2.4.7-5
+libltdl-dev==2.4.7-7~deb12u1
+libltdl7==2.4.7-7~deb12u1
 liblua5.1-0==5.1.5-9
 liblua5.1-0-dev==5.1.5-9
 liblua5.3-0==5.3.6-2
@@ -1048,14 +1048,14 @@ libnl-3-200==3.7.0-0.2+b1
 libnl-3-dev==3.7.0-0.2+b1
 libnl-route-3-200==3.7.0-0.2+b1
 libnl-route-3-dev==3.7.0-0.2+b1
-libnode108==18.19.0+dfsg-6~deb12u1
+libnode108==18.19.0+dfsg-6~deb12u2
 libnorm-dev==1.5.9+dfsg-2
 libnorm1==1.5.9+dfsg-2
 libnpth0==1.6-3
 libnsl-dev==1.3.0-2
 libnsl2==1.3.0-2
 libnspr4==2:4.35-1
-libnss-systemd==252.22-1~deb12u1
+libnss-systemd==252.26-1~deb12u2
 libnss3==2:3.87.1-1
 libnuma-dev==2.0.16-1
 libnuma1==2.0.16-1
@@ -1094,7 +1094,7 @@ libpackage-stash-xs-perl==0.30-1+b1
 libpackagekit-glib2-18==1.2.6-5
 libpadwalker-perl==2.5-1+b3
 libpam-cap==1:2.66-4
-libpam-systemd==252.22-1~deb12u1
+libpam-systemd==252.26-1~deb12u2
 libpam0g-dev==1.5.2-6+deb12u1
 libpango-1.0-0==1.50.12+ds-1
 libpango1.0-dev==1.50.12+ds-1
@@ -1174,7 +1174,7 @@ libpoppler-glib8==22.12.0-2+b1
 libpoppler126==22.12.0-2+b1
 libpopt-dev==1.19+dfsg-1
 libpopt0==1.19+dfsg-1
-libpostproc56==7:5.1.4-0+deb12u1
+libpostproc56==7:5.1.5-0+deb12u1
 libpotrace0==1.16-2
 libproc-processtable-perl==0.634-1+b2
 libproc2-0==2:4.0.2-3
@@ -1196,33 +1196,33 @@ libpython3-all-dev==3.11.2-1+b1
 libpython3-dbg==3.11.2-1+b1
 libpython3-dev==3.11.2-1+b1
 libpython3-stdlib==3.11.2-1+b1
-libpython3.11==3.11.2-6
-libpython3.11-dbg==3.11.2-6
-libpython3.11-dev==3.11.2-6
-libpython3.11-minimal==3.11.2-6
-libpython3.11-stdlib==3.11.2-6
+libpython3.11==3.11.2-6+deb12u2
+libpython3.11-dbg==3.11.2-6+deb12u2
+libpython3.11-dev==3.11.2-6+deb12u2
+libpython3.11-minimal==3.11.2-6+deb12u2
+libpython3.11-stdlib==3.11.2-6+deb12u2
 libqdox-java==1.12.1-3
 libqdox2-java==2.0.3-1
 libqhull-r8.0==2020.2-5
-libqt5concurrent5==5.15.8+dfsg-11
-libqt5core5a==5.15.8+dfsg-11
-libqt5dbus5==5.15.8+dfsg-11
-libqt5gui5==5.15.8+dfsg-11
-libqt5network5==5.15.8+dfsg-11
-libqt5opengl5==5.15.8+dfsg-11
-libqt5opengl5-dev==5.15.8+dfsg-11
-libqt5printsupport5==5.15.8+dfsg-11
+libqt5concurrent5==5.15.8+dfsg-11+deb12u2
+libqt5core5a==5.15.8+dfsg-11+deb12u2
+libqt5dbus5==5.15.8+dfsg-11+deb12u2
+libqt5gui5==5.15.8+dfsg-11+deb12u2
+libqt5network5==5.15.8+dfsg-11+deb12u2
+libqt5opengl5==5.15.8+dfsg-11+deb12u2
+libqt5opengl5-dev==5.15.8+dfsg-11+deb12u2
+libqt5printsupport5==5.15.8+dfsg-11+deb12u2
 libqt5qml5==5.15.8+dfsg-3
 libqt5qmlmodels5==5.15.8+dfsg-3
 libqt5quick5==5.15.8+dfsg-3
-libqt5sql5==5.15.8+dfsg-11
-libqt5sql5-sqlite==5.15.8+dfsg-11
+libqt5sql5==5.15.8+dfsg-11+deb12u2
+libqt5sql5-sqlite==5.15.8+dfsg-11+deb12u2
 libqt5svg5==5.15.8-3
-libqt5test5==5.15.8+dfsg-11
+libqt5test5==5.15.8+dfsg-11+deb12u2
 libqt5waylandclient5==5.15.8-2
 libqt5waylandcompositor5==5.15.8-2
-libqt5widgets5==5.15.8+dfsg-11
-libqt5xml5==5.15.8+dfsg-11
+libqt5widgets5==5.15.8+dfsg-11+deb12u2
+libqt5xml5==5.15.8+dfsg-11+deb12u2
 libquadmath0==12.2.0-14
 librabbitmq4==0.11.0-1+b1
 librados2==16.2.11+ds-2
@@ -1321,8 +1321,8 @@ libsrt1.5-gnutls==1.5.1-1
 libssh-4==0.10.6-0+deb12u1
 libssh-gcrypt-4==0.10.6-0+deb12u1
 libssh2-1==1.10.0-3+b1
-libssl-dev==3.0.11-1~deb12u2
-libssl3==3.0.11-1~deb12u2
+libssl-dev==3.0.13-1~deb12u1
+libssl3==3.0.13-1~deb12u1
 libstdc++-12-dev==12.2.0-14
 libstdc++6-armhf-cross==12.2.0-14cross1
 libstemmer0d==2.2.0-2
@@ -1343,14 +1343,14 @@ libsubunit0==1.4.0-3
 libsurefire-java==2.22.3-2
 libsvtav1enc1==1.4.1+dfsg-1
 libswitch-perl==2.17-3
-libswresample4==7:5.1.4-0+deb12u1
-libswscale6==7:5.1.4-0+deb12u1
+libswresample4==7:5.1.5-0+deb12u1
+libswscale6==7:5.1.5-0+deb12u1
 libsynctex2==2022.20220321.62855-5.1+deb12u1
 libsyntax-keyword-try-perl==0.28-1
 libsys-cpuaffinity-perl==1.13~03-2+b1
 libsys-hostname-long-perl==1.5-3
-libsystemd-dev==252.22-1~deb12u1
-libsystemd-shared==252.22-1~deb12u1
+libsystemd-dev==252.26-1~deb12u2
+libsystemd-shared==252.26-1~deb12u2
 libtag1v5==1.13-2
 libtag1v5-vanilla==1.13-2
 libtask-weaken-perl==1.06-2
@@ -1390,8 +1390,8 @@ libtirpc-common==1.3.3+ds-1
 libtirpc-dev==1.3.3+ds-1
 libtirpc3==1.3.3+ds-1
 libtk8.6==8.6.13-2
-libtool==2.4.7-5
-libtool-bin==2.4.7-5
+libtool==2.4.7-7~deb12u1
+libtool-bin==2.4.7-7~deb12u1
 libtraceevent-dev==1:1.7.1-1
 libtraceevent1==1:1.7.1-1
 libtracefs-dev==1.6.4-1
@@ -1406,7 +1406,7 @@ libubsan1==12.2.0-14
 libubsan1-armhf-cross==12.2.0-14cross1
 libuchardet0==0.0.7-1
 libucx0==1.13.1-1
-libudev-dev==252.22-1~deb12u1
+libudev-dev==252.26-1~deb12u2
 libudfread0==1.1.2-1
 libunbound8==1.17.1-2+deb12u2
 libunicode-map-perl==0.112-13+b1
@@ -1443,7 +1443,7 @@ libvisual-0.4-0==0.4.0-19
 libvorbis0a==1.3.7-1
 libvorbisenc2==1.3.7-1
 libvorbisfile3==1.3.7-1
-libvpx7==1.12.0-1+deb12u2
+libvpx7==1.12.0-1+deb12u3
 libvte-2.91-0==0.70.6-2~deb12u1
 libvte-2.91-common==0.70.6-2~deb12u1
 libvulkan-dev==1.3.239.0-1
@@ -1607,14 +1607,14 @@ libzvbi0==0.2.41-1
 libzzip-0-13==0.13.72+dfsg.1-1.1
 licensecheck==3.3.5-1
 lintian==2.116.3
-linux-compiler-gcc-12-x86==6.1.90-1
-linux-headers-6.1.0-21-amd64==6.1.90-1
-linux-headers-6.1.0-21-arm64==6.1.90-1
-linux-headers-6.1.0-21-common==6.1.90-1
-linux-headers-amd64==6.1.90-1
-linux-headers-arm64==6.1.90-1
-linux-kbuild-6.1==6.1.90-1
-linux-libc-dev==6.1.90-1
+linux-compiler-gcc-12-x86==6.1.99-1
+linux-headers-6.1.0-23-amd64==6.1.99-1
+linux-headers-6.1.0-23-arm64==6.1.99-1
+linux-headers-6.1.0-23-common==6.1.99-1
+linux-headers-amd64==6.1.99-1
+linux-headers-arm64==6.1.99-1
+linux-kbuild-6.1==6.1.99-1
+linux-libc-dev==6.1.99-1
 linuxdoc-tools==0.9.82-1
 llvm==1:14.0-55.7~deb12u1
 llvm-14==1:14.0.6-12
@@ -1670,10 +1670,10 @@ node-acorn==8.8.1+ds+~cs25.17.7-2
 node-busboy==1.6.0+~cs2.6.0-2
 node-cjs-module-lexer==1.2.2+dfsg-5
 node-jquery==3.6.1+dfsg+~3.5.14-1
-node-undici==5.15.0+dfsg1+~cs20.10.9.3-1+deb12u3
+node-undici==5.15.0+dfsg1+~cs20.10.9.3-1+deb12u4
 node-xtend==4.0.2-3
-nodejs==18.19.0+dfsg-6~deb12u1
-nodejs-doc==18.19.0+dfsg-6~deb12u1
+nodejs==18.19.0+dfsg-6~deb12u2
+nodejs-doc==18.19.0+dfsg-6~deb12u2
 nss-plugin-pem==1.0.8+1-1
 ocl-icd-libopencl1==2.3.1-1
 openjade==1.4devel1-22
@@ -1684,10 +1684,10 @@ openjdk-17-jre-headless==17.0.11+9-1~deb12u1
 openmpi-bin==4.1.4-3+b1
 openmpi-common==4.1.4-3
 opensp==1.5.2-13+b2
-openssh-client==1:9.2p1-2+deb12u2
-openssh-server==1:9.2p1-2+deb12u2
-openssh-sftp-server==1:9.2p1-2+deb12u2
-openssl==3.0.11-1~deb12u2
+openssh-client==1:9.2p1-2+deb12u3
+openssh-server==1:9.2p1-2+deb12u3
+openssh-sftp-server==1:9.2p1-2+deb12u3
+openssl==3.0.13-1~deb12u1
 os-prober==1.81
 ovmf==2022.11-6+deb12u1
 packagekit==1.2.6-5
@@ -1721,12 +1721,12 @@ php-text-template==2.0.4-2
 php-timer==5.0.3-3
 php-tokenizer==1.2.1-1
 php-xml==2:8.2+93
-php8.2-cli==8.2.18-1~deb12u1
-php8.2-common==8.2.18-1~deb12u1
-php8.2-mbstring==8.2.18-1~deb12u1
-php8.2-opcache==8.2.18-1~deb12u1
-php8.2-readline==8.2.18-1~deb12u1
-php8.2-xml==8.2.18-1~deb12u1
+php8.2-cli==8.2.20-1~deb12u1
+php8.2-common==8.2.20-1~deb12u1
+php8.2-mbstring==8.2.20-1~deb12u1
+php8.2-opcache==8.2.20-1~deb12u1
+php8.2-readline==8.2.20-1~deb12u1
+php8.2-xml==8.2.20-1~deb12u1
 phpunit==9.6.7-1
 phpunit-cli-parser==1.0.1-3
 phpunit-code-unit==1.0.8-3
@@ -1769,7 +1769,7 @@ publicsuffix==20230209.2326-1
 pylint==2.16.2-2
 python-apt-common==2.6.0
 python-babel-localedata==2.10.3-1
-python-is-python3==3.11.1-3
+python-is-python3==3.11.2-1+deb12u1
 python-matplotlib-data==3.6.3-1
 python3==3.11.2-1+b1
 python3-alabaster==0.7.12-1
@@ -1823,7 +1823,7 @@ python3-hamcrest==2.0.3-2
 python3-html5lib==1.1-3
 python3-httplib2==0.20.4-3
 python3-hyperlink==21.0.0-5
-python3-idna==3.3-1
+python3-idna==3.3-1+deb12u1
 python3-imagesize==1.4.1-1
 python3-importlib-metadata==4.12.0-1
 python3-incremental==21.3.0-2
@@ -1865,8 +1865,8 @@ python3-parso==0.8.3-1
 python3-pep517==0.13.0-2
 python3-pexpect==4.8.0-4
 python3-pickleshare==0.7.5-5
-python3-pil==9.4.0-1.1+b1
-python3-pil.imagetk==9.4.0-1.1+b1
+python3-pil==9.4.0-1.1+deb12u1
+python3-pil.imagetk==9.4.0-1.1+deb12u1
 python3-pip-whl==23.0.1+dfsg-1
 python3-pkg-resources==66.1.1-1
 python3-platformdirs==2.6.0-1
@@ -1897,7 +1897,7 @@ python3-setuptools==66.1.1-1
 python3-setuptools-whl==66.1.1-1
 python3-six==1.16.0-4
 python3-snowballstemmer==2.2.0-2
-python3-software-properties==0.99.30-4
+python3-software-properties==0.99.30-4.1~deb12u1
 python3-soupsieve==2.3.2-1
 python3-sphinx==5.3.0-4
 python3-sphinx-rtd-theme==1.2.0+dfsg-1
@@ -1926,22 +1926,22 @@ python3-xdg==0.28-2
 python3-yaml==6.0-3+b2
 python3-zipp==1.0.0-6
 python3-zope.interface==5.5.2-1+b1
-python3.11==3.11.2-6
-python3.11-dbg==3.11.2-6
-python3.11-dev==3.11.2-6
-python3.11-minimal==3.11.2-6
-python3.11-venv==3.11.2-6
-qemu-block-extra==1:7.2+dfsg-7+deb12u5
-qemu-system-common==1:7.2+dfsg-7+deb12u5
-qemu-system-data==1:7.2+dfsg-7+deb12u5
-qemu-system-gui==1:7.2+dfsg-7+deb12u5
-qemu-system-x86==1:7.2+dfsg-7+deb12u5
-qemu-utils==1:7.2+dfsg-7+deb12u5
-qt5-gtk-platformtheme==5.15.8+dfsg-11
-qt5-qmake==5.15.8+dfsg-11
-qt5-qmake-bin==5.15.8+dfsg-11
-qtbase5-dev==5.15.8+dfsg-11
-qtbase5-dev-tools==5.15.8+dfsg-11
+python3.11==3.11.2-6+deb12u2
+python3.11-dbg==3.11.2-6+deb12u2
+python3.11-dev==3.11.2-6+deb12u2
+python3.11-minimal==3.11.2-6+deb12u2
+python3.11-venv==3.11.2-6+deb12u2
+qemu-block-extra==1:7.2+dfsg-7+deb12u6
+qemu-system-common==1:7.2+dfsg-7+deb12u6
+qemu-system-data==1:7.2+dfsg-7+deb12u6
+qemu-system-gui==1:7.2+dfsg-7+deb12u6
+qemu-system-x86==1:7.2+dfsg-7+deb12u6
+qemu-utils==1:7.2+dfsg-7+deb12u6
+qt5-gtk-platformtheme==5.15.8+dfsg-11+deb12u2
+qt5-qmake==5.15.8+dfsg-11+deb12u2
+qt5-qmake-bin==5.15.8+dfsg-11+deb12u2
+qtbase5-dev==5.15.8+dfsg-11+deb12u2
+qtbase5-dev-tools==5.15.8+dfsg-11+deb12u2
 qtchooser==66-2
 qttranslations5-l10n==5.15.8-2
 qtwayland5==5.15.8-2
@@ -1983,7 +1983,7 @@ shim-signed==1.39+15.7-1
 shim-signed-common==1.39+15.7-1
 shim-unsigned==15.7-1
 slirp4netns==1.2.0-1
-software-properties-common==0.99.30-4
+software-properties-common==0.99.30-4.1~deb12u1
 sphinx-common==5.3.0-4
 sphinx-rtd-theme-common==1.2.0+dfsg-1
 squashfs-tools==1:4.5.1-1
@@ -1992,9 +1992,9 @@ strace==6.1-0.1
 sudo==1.9.13p3-1+deb12u1
 swig==4.1.0-0.2
 swig4.0==4.1.0-0.2
-systemd==252.22-1~deb12u1
-systemd-sysv==252.22-1~deb12u1
-systemd-timesyncd==252.22-1~deb12u1
+systemd==252.26-1~deb12u2
+systemd-sysv==252.26-1~deb12u2
+systemd-timesyncd==252.26-1~deb12u2
 t1utils==1.41-4
 tcl==8.6.13
 tcl8.6==8.6.13+dfsg-2
@@ -2022,7 +2022,7 @@ tk==8.6.13
 tk8.6==8.6.13-2
 tk8.6-blt2.5==2.5.3+dfsg-4.1
 ucf==3.0043+nmu1
-udev==252.22-1~deb12u1
+udev==252.26-1~deb12u2
 unicode-data==15.0.0-1
 unzip==6.0-28
 usb.ids==2024.01.20-0+deb12u1
diff --git a/files/build/versions/dockers/sonic-slave-bookworm/versions-deb-bookworm-armhf b/files/build/versions/dockers/sonic-slave-bookworm/versions-deb-bookworm-armhf
index 17485c2a2..5a56eb851 100644
--- a/files/build/versions/dockers/sonic-slave-bookworm/versions-deb-bookworm-armhf
+++ b/files/build/versions/dockers/sonic-slave-bookworm/versions-deb-bookworm-armhf
@@ -3,8 +3,8 @@ dctrl-tools==2.24-3
 dvipng==1.15-1.1
 libnanomsg-dev==1.1.5+dfsg-1.1
 libnanomsg5==1.1.5+dfsg-1.1
-linux-compiler-gcc-12-arm==6.1.90-1
-linux-headers-6.1.0-21-armmp==6.1.90-1
-linux-headers-armmp==6.1.90-1
+linux-compiler-gcc-12-arm==6.1.99-1
+linux-headers-6.1.0-23-armmp==6.1.99-1
+linux-headers-armmp==6.1.99-1
 watchdog==5.16-1+b1
 wget==1.21.3-1+b1
diff --git a/files/build/versions/dockers/sonic-slave-bookworm/versions-py3 b/files/build/versions/dockers/sonic-slave-bookworm/versions-py3
index 97db75c96..402f9445a 100644
--- a/files/build/versions/dockers/sonic-slave-bookworm/versions-py3
+++ b/files/build/versions/dockers/sonic-slave-bookworm/versions-py3
@@ -12,6 +12,7 @@ beautifulsoup4==4.11.2
 beniget==0.4.1
 bitarray==2.9.2
 blinker==1.5
+blkinfo==0.2.0
 brotli==1.0.9
 build==0.9.0
 certifi==2022.9.24
@@ -91,7 +92,7 @@ pep517==0.13.0
 pexpect==4.8.0
 pickleshare==0.7.5
 pillow==10.0.0
-pip==24.0
+pip==24.2
 platformdirs==2.6.0
 pluggy==1.0.0+repack
 ply==3.11
@@ -106,7 +107,7 @@ pyangbind==0.8.2
 pyasn1==0.4.8
 pyasn1-modules==0.2.8
 pyelftools==0.29
-pyfakefs==5.5.0
+pyfakefs==5.6.0
 pygments==2.14.0
 pygobject==3.42.2
 pyhamcrest==2.0.3
@@ -127,8 +128,8 @@ pythran==0.11.0
 pytz==2022.7.1
 pyxdg==0.28
 pyyaml==6.0
-redis==5.0.4
-regex==2024.5.15
+redis==5.0.8
+regex==2024.7.24
 requests==2.28.1
 roman==3.3
 scapy==2.5.0
diff --git a/files/build/versions/dockers/sonic-slave-bookworm/versions-py3-all-arm64 b/files/build/versions/dockers/sonic-slave-bookworm/versions-py3-all-arm64
index 980b0b50f..5206c39a5 100644
--- a/files/build/versions/dockers/sonic-slave-bookworm/versions-py3-all-arm64
+++ b/files/build/versions/dockers/sonic-slave-bookworm/versions-py3-all-arm64
@@ -1,2 +1,2 @@
-protobuf==4.25.3
-psutil==5.9.8
+protobuf==4.25.4
+psutil==6.0.0
diff --git a/files/build/versions/dockers/sonic-slave-bookworm/versions-py3-all-armhf b/files/build/versions/dockers/sonic-slave-bookworm/versions-py3-all-armhf
index 980b0b50f..5206c39a5 100644
--- a/files/build/versions/dockers/sonic-slave-bookworm/versions-py3-all-armhf
+++ b/files/build/versions/dockers/sonic-slave-bookworm/versions-py3-all-armhf
@@ -1,2 +1,2 @@
-protobuf==4.25.3
-psutil==5.9.8
+protobuf==4.25.4
+psutil==6.0.0
diff --git a/files/build/versions/dockers/sonic-slave-bullseye/versions-deb-bullseye b/files/build/versions/dockers/sonic-slave-bullseye/versions-deb-bullseye
index 055af05f9..8f0505d04 100644
--- a/files/build/versions/dockers/sonic-slave-bullseye/versions-deb-bullseye
+++ b/files/build/versions/dockers/sonic-slave-bullseye/versions-deb-bullseye
@@ -24,9 +24,9 @@ autopoint==0.21-4
 autotools-dev==20180224.1+nmu1
 bash-completion==1:2.11-2
 bc==1.07.1-2+b2
-bind9-dnsutils==1:9.16.48-1
-bind9-host==1:9.16.48-1
-bind9-libs==1:9.16.48-1
+bind9-dnsutils==1:9.16.50-1~deb11u1
+bind9-host==1:9.16.50-1~deb11u1
+bind9-libs==1:9.16.50-1~deb11u1
 binfmt-support==2.2.1-1+deb11u1
 binutils==2.35.2-2
 binutils-aarch64-linux-gnu==2.35.2-2
@@ -62,7 +62,7 @@ cpp-10-arm-linux-gnueabihf==10.2.1-6cross1
 cpp-arm-linux-gnueabihf==4:10.2.1-1
 cppcheck==2.3-1
 cron==3.0pl1-137
-curl==7.74.0-1.3+deb11u11
+curl==7.74.0-1.3+deb11u12
 cython3==0.29.21-3+b1
 dblatex==0.3.12py3-1
 dblatex-doc==0.3.12py3-1
@@ -92,11 +92,11 @@ dh-strip-nondeterminism==1.12.0-1
 dictionaries-common==1.28.4
 diffstat==1.64-1
 dirmngr==2.2.27-2+deb11u2
-distro-info-data==0.51+deb11u5
+distro-info-data==0.51+deb11u6
 dkms==2.8.4-3
 dmeventd==2:1.02.175-2.1
 dmsetup==2:1.02.175-2.1
-dnsutils==1:9.16.48-1
+dnsutils==1:9.16.50-1~deb11u1
 docbook==4.5-6
 docbook-dsssl==1.79-9.2
 docbook-to-man==1:2.0.0-45
@@ -106,7 +106,7 @@ docbook-xsl==1.79.2+dfsg-1
 docker-buildx-plugin==0.10.5-1~debian.11~bullseye
 docker-ce==5:24.0.2-1~debian.11~bullseye
 docker-ce-cli==5:24.0.2-1~debian.11~bullseye
-docker-ce-rootless-extras==5:26.1.3-1~debian.11~bullseye
+docker-ce-rootless-extras==5:27.1.2-1~debian.11~bullseye
 docker-compose-plugin==2.18.1-1~debian.11~bullseye
 docutils-common==0.16+dfsg-4
 dosfstools==4.2-1
@@ -120,15 +120,15 @@ dwarves==1.20-1
 dwz==0.13+20210201-1
 eatmydata==105-9
 ed==1.17-1
-emacs-bin-common==1:27.1+1-3.1+deb11u2
-emacs-common==1:27.1+1-3.1+deb11u2
-emacs-el==1:27.1+1-3.1+deb11u2
-emacs-nox==1:27.1+1-3.1+deb11u2
+emacs-bin-common==1:27.1+1-3.1+deb11u5
+emacs-common==1:27.1+1-3.1+deb11u5
+emacs-el==1:27.1+1-3.1+deb11u5
+emacs-nox==1:27.1+1-3.1+deb11u5
 emacsen-common==3.0.4
 equivs==2.3.1
-exim4-base==4.94.2-7+deb11u2
-exim4-config==4.94.2-7+deb11u2
-exim4-daemon-light==4.94.2-7+deb11u2
+exim4-base==4.94.2-7+deb11u3
+exim4-config==4.94.2-7+deb11u3
+exim4-daemon-light==4.94.2-7+deb11u3
 expat==2.2.10-2+deb11u5
 fakeroot==1.25.3-1.1
 file==1:5.39-3+deb11u1
@@ -170,7 +170,7 @@ ghostscript==9.53.3~dfsg-7+deb11u7
 gir1.2-atk-1.0==2.36.0-2
 gir1.2-atspi-2.0==2.38.0-4+deb11u1
 gir1.2-freedesktop==1.66.1-1+b1
-gir1.2-gdkpixbuf-2.0==2.42.2+dfsg-1+deb11u1
+gir1.2-gdkpixbuf-2.0==2.42.2+dfsg-1+deb11u2
 gir1.2-glib-2.0==1.66.1-1+b1
 gir1.2-gtk-3.0==3.24.24-4+deb11u3
 gir1.2-harfbuzz-0.0==2.7.4-1
@@ -235,7 +235,7 @@ jq==1.6-2.1
 junit5==5.3.2-4
 kernel-wedge==2.104
 kmod==28-1
-krb5-multidev==1.18.3-6+deb11u4
+krb5-multidev==1.18.3-6+deb11u5
 lcov==1.14-2
 less==551-2+deb11u2
 lib32asan6==10.2.1-6
@@ -307,10 +307,10 @@ libavahi-client3==0.8-5+deb11u2
 libavahi-common-data==0.8-5+deb11u2
 libavahi-common3==0.8-5+deb11u2
 libavc1394-0==0.5.4-5
-libavcodec58==7:4.3.6-0+deb11u1
-libavfilter7==7:4.3.6-0+deb11u1
-libavformat58==7:4.3.6-0+deb11u1
-libavutil56==7:4.3.6-0+deb11u1
+libavcodec58==7:4.3.7-0+deb11u1
+libavfilter7==7:4.3.7-0+deb11u1
+libavformat58==7:4.3.7-0+deb11u1
+libavutil56==7:4.3.7-0+deb11u1
 libb-hooks-endofscope-perl==0.24-1.1
 libb-hooks-op-check-perl==0.22-1+b3
 libbabeltrace-dev==1.5.8-1+b3
@@ -516,9 +516,9 @@ libctf0==2.35.2-2
 libcunit1==2.1-3-dfsg-2.3
 libcunit1-dev==2.1-3-dfsg-2.3
 libcups2==2.3.3op2-3+deb11u6
-libcurl3-gnutls==7.74.0-1.3+deb11u11
-libcurl4==7.74.0-1.3+deb11u11
-libcurl4-openssl-dev==7.74.0-1.3+deb11u11
+libcurl3-gnutls==7.74.0-1.3+deb11u12
+libcurl4==7.74.0-1.3+deb11u12
+libcurl4-openssl-dev==7.74.0-1.3+deb11u12
 libdaemon-dev==0.14-7.1
 libdaemon0==0.14-7.1
 libdata-dpath-perl==0.58-1
@@ -662,10 +662,10 @@ libgd-perl==2.73-1+b1
 libgd3==2.3.0-2
 libgdbm-compat4==1.19-2
 libgdbm6==1.19-2
-libgdk-pixbuf-2.0-0==2.42.2+dfsg-1+deb11u1
-libgdk-pixbuf-2.0-dev==2.42.2+dfsg-1+deb11u1
-libgdk-pixbuf2.0-bin==2.42.2+dfsg-1+deb11u1
-libgdk-pixbuf2.0-common==2.42.2+dfsg-1+deb11u1
+libgdk-pixbuf-2.0-0==2.42.2+dfsg-1+deb11u2
+libgdk-pixbuf-2.0-dev==2.42.2+dfsg-1+deb11u2
+libgdk-pixbuf2.0-bin==2.42.2+dfsg-1+deb11u2
+libgdk-pixbuf2.0-common==2.42.2+dfsg-1+deb11u2
 libgeronimo-annotation-1.3-spec-java==1.3-1
 libgeronimo-interceptor-3.0-spec-java==1.0.1-4
 libgetopt-long-descriptive-perl==0.105-1
@@ -685,11 +685,11 @@ libglapi-mesa==20.3.5-1
 libgles-dev==1.3.2-1
 libgles1==1.3.2-1
 libgles2==1.3.2-1
-libglib2.0-0==2.66.8-1+deb11u3
-libglib2.0-bin==2.66.8-1+deb11u3
-libglib2.0-data==2.66.8-1+deb11u3
-libglib2.0-dev==2.66.8-1+deb11u3
-libglib2.0-dev-bin==2.66.8-1+deb11u3
+libglib2.0-0==2.66.8-1+deb11u4
+libglib2.0-bin==2.66.8-1+deb11u4
+libglib2.0-data==2.66.8-1+deb11u4
+libglib2.0-dev==2.66.8-1+deb11u4
+libglib2.0-dev-bin==2.66.8-1+deb11u4
 libglu1-mesa==9.0.1-1
 libglu1-mesa-dev==9.0.1-1
 libglvnd-dev==1.3.2-1
@@ -701,7 +701,7 @@ libgme0==0.6.3-2
 libgmock-dev==1.10.0.20201025-1.1
 libgmp-dev==2:6.2.1+dfsg-1+deb11u1
 libgmpxx4ldbl==2:6.2.1+dfsg-1+deb11u1
-libgnutls-dane0==3.7.1-5+deb11u4
+libgnutls-dane0==3.7.1-5+deb11u5
 libgomp1==10.2.1-6
 libgomp1-armhf-cross==10.2.1-6cross1
 libgoogle-gson-java==2.8.6-1+deb11u1
@@ -717,7 +717,7 @@ libgs9==9.53.3~dfsg-7+deb11u7
 libgs9-common==9.53.3~dfsg-7+deb11u7
 libgsasl7==1.10.0-4+deb11u1
 libgsm1==1.0.18-2
-libgssrpc4==1.18.3-6+deb11u4
+libgssrpc4==1.18.3-6+deb11u5
 libgstreamer-plugins-base1.0-0==1.18.4-2+deb11u2
 libgstreamer1.0-0==1.18.4-2.1
 libgtest-dev==1.10.0.20201025-1.1
@@ -838,7 +838,6 @@ libjson-glib-1.0-common==1.6.2-1
 libjson-maybexs-perl==1.004003-1
 libjson-perl==4.03000-1
 libjson-xs-perl==4.030-1+b1
-libjsoncpp-dev==1.9.4-4
 libjsoncpp24==1.9.4-4
 libjsp-api-java==2.3.4-3
 libjsr305-java==0.1~+svn49-11
@@ -847,12 +846,12 @@ libjudy-dev==1.0.5-5+b2
 libjudydebian1==1.0.5-5+b2
 libjxr-tools==1.1-6+b1
 libjxr0==1.1-6+b1
-libkadm5clnt-mit12==1.18.3-6+deb11u4
-libkadm5srv-mit12==1.18.3-6+deb11u4
-libkdb5-10==1.18.3-6+deb11u4
+libkadm5clnt-mit12==1.18.3-6+deb11u5
+libkadm5srv-mit12==1.18.3-6+deb11u5
+libkdb5-10==1.18.3-6+deb11u5
 libkmod2==28-1
 libkpathsea6==2020.20200327.54578-7+deb11u1
-libkrb5-dev==1.18.3-6+deb11u4
+libkrb5-dev==1.18.3-6+deb11u5
 libksba8==1.5.0-3+deb11u2
 liblab-gamut1==2.42.2-5
 liblapack3==3.9.0-3+deb11u1
@@ -984,7 +983,7 @@ libnorm1==1.5.9+dfsg-2
 libnpth0==1.6-3
 libnsl-dev==1.3.0-2
 libnspr4==2:4.29-1
-libnss-systemd==247.3-7+deb11u4
+libnss-systemd==247.3-7+deb11u5
 libnss3==2:3.61-1+deb11u3
 libntlm0==1.6-3
 libnuma-dev==2.0.12-1+b1
@@ -1023,7 +1022,7 @@ libpackage-stash-xs-perl==0.29-1+b2
 libpackagekit-glib2-18==1.2.2-2
 libpadwalker-perl==2.5-1+b1
 libpam-cap==1:2.44-1
-libpam-systemd==247.3-7+deb11u4
+libpam-systemd==247.3-7+deb11u5
 libpam0g-dev==1.4.0-9+deb11u1
 libpango-1.0-0==1.46.2-3
 libpango1.0-dev==1.46.2-3
@@ -1097,7 +1096,7 @@ libpod-parser-perl==1.63-2
 libpolkit-agent-1-0==0.105-31+deb11u1
 libpolkit-gobject-1-0==0.105-31+deb11u1
 libpopt0==1.18-2
-libpostproc55==7:4.3.6-0+deb11u1
+libpostproc55==7:4.3.7-0+deb11u1
 libproc-processtable-perl==0.59-2+b1
 libprocps8==2:3.3.17-5
 libprotobuf-c1==1.3.3-1+b2
@@ -1127,20 +1126,20 @@ libpython3.9-minimal==3.9.2-1
 libpython3.9-stdlib==3.9.2-1
 libqdox-java==1.12.1-3
 libqdox2-java==2.0.0-1
-libqt5concurrent5==5.15.2+dfsg-9
-libqt5core5a==5.15.2+dfsg-9
-libqt5dbus5==5.15.2+dfsg-9
-libqt5gui5==5.15.2+dfsg-9
-libqt5network5==5.15.2+dfsg-9
-libqt5opengl5==5.15.2+dfsg-9
-libqt5opengl5-dev==5.15.2+dfsg-9
-libqt5printsupport5==5.15.2+dfsg-9
-libqt5sql5==5.15.2+dfsg-9
-libqt5sql5-sqlite==5.15.2+dfsg-9
+libqt5concurrent5==5.15.2+dfsg-9+deb11u1
+libqt5core5a==5.15.2+dfsg-9+deb11u1
+libqt5dbus5==5.15.2+dfsg-9+deb11u1
+libqt5gui5==5.15.2+dfsg-9+deb11u1
+libqt5network5==5.15.2+dfsg-9+deb11u1
+libqt5opengl5==5.15.2+dfsg-9+deb11u1
+libqt5opengl5-dev==5.15.2+dfsg-9+deb11u1
+libqt5printsupport5==5.15.2+dfsg-9+deb11u1
+libqt5sql5==5.15.2+dfsg-9+deb11u1
+libqt5sql5-sqlite==5.15.2+dfsg-9+deb11u1
 libqt5svg5==5.15.2-3
-libqt5test5==5.15.2+dfsg-9
-libqt5widgets5==5.15.2+dfsg-9
-libqt5xml5==5.15.2+dfsg-9
+libqt5test5==5.15.2+dfsg-9+deb11u1
+libqt5widgets5==5.15.2+dfsg-9+deb11u1
+libqt5xml5==5.15.2+dfsg-9+deb11u1
 libquadmath0==10.2.1-6
 librabbitmq4==0.10.0-1
 libraw1394-11==2.1.2-2
@@ -1220,7 +1219,7 @@ libsqlite3-0==3.34.1-3
 libsratom-0-0==0.6.8-1
 libsrt1.4-gnutls==1.4.2-1.3
 libssh-gcrypt-4==0.9.8-0+deb11u1
-libssh2-1==1.9.0-2
+libssh2-1==1.9.0-2+deb11u1
 libssl-dev==1.1.1w-0+deb11u1
 libstdc++-10-dev==10.2.1-6
 libstdc++6-armhf-cross==10.2.1-6cross1
@@ -1240,12 +1239,12 @@ libsubunit-dev==1.4.0-3
 libsubunit0==1.4.0-3
 libsurefire-java==2.22.3-1
 libswitch-perl==2.17-2.1
-libswresample3==7:4.3.6-0+deb11u1
-libswscale5==7:4.3.6-0+deb11u1
+libswresample3==7:4.3.7-0+deb11u1
+libswscale5==7:4.3.7-0+deb11u1
 libsynctex2==2020.20200327.54578-7+deb11u1
 libsys-cpuaffinity-perl==1.13~03-1
 libsys-hostname-long-perl==1.5-2
-libsystemd-dev==247.3-7+deb11u4
+libsystemd-dev==247.3-7+deb11u5
 libtag1v5==1.11.1+dfsg.1-3
 libtag1v5-vanilla==1.11.1+dfsg.1-3
 libtask-weaken-perl==1.06-1
@@ -1293,7 +1292,7 @@ libubsan1==10.2.1-6
 libubsan1-armhf-cross==10.2.1-6cross1
 libuchardet0==0.0.7-1
 libucx0==1.10.1~rc1+really.1.10.0-1
-libudev-dev==247.3-7+deb11u4
+libudev-dev==247.3-7+deb11u5
 libudfread0==1.1.1-1
 libunbound8==1.13.1-1+deb11u2
 libunicode-linebreak-perl==0.0.20190101-1+b3
@@ -1328,7 +1327,7 @@ libvisual-0.4-0==0.4.0-17
 libvorbis0a==1.3.7-1
 libvorbisenc2==1.3.7-1
 libvorbisfile3==1.3.7-1
-libvpx6==1.9.0-1+deb11u2
+libvpx6==1.9.0-1+deb11u3
 libvte-2.91-0==0.62.3-1
 libvte-2.91-common==0.62.3-1
 libvulkan-dev==1.2.162.0-1
@@ -1454,7 +1453,7 @@ libxmlgraphics-commons-java==2.4-2~deb11u1
 libxmlrpc-lite-perl==0.717-4
 libxmu6==2:1.1.2-2+b3
 libxmuu1==2:1.1.2-2+b3
-libxnvctrl0==470.141.03-1~deb11u1
+libxnvctrl0==470.239.06-1
 libxpm4==1:3.5.12-1.1+deb11u1
 libxrandr-dev==2:1.5.1-1
 libxrandr2==2:1.5.1-1
@@ -1490,14 +1489,14 @@ libzvbi0==0.2.35-18
 libzzip-0-13==0.13.62-3.3+deb11u1
 licensecheck==3.1.1-2
 lintian==2.104.0
-linux-compiler-gcc-10-x86==5.10.218-1
-linux-headers-5.10.0-30-amd64==5.10.218-1
-linux-headers-5.10.0-30-arm64==5.10.218-1
-linux-headers-5.10.0-30-common==5.10.218-1
-linux-headers-amd64==5.10.218-1
-linux-headers-arm64==5.10.218-1
-linux-kbuild-5.10==5.10.218-1
-linux-libc-dev==5.10.218-1
+linux-compiler-gcc-10-x86==5.10.221-1
+linux-headers-5.10.0-31-amd64==5.10.221-1
+linux-headers-5.10.0-31-arm64==5.10.221-1
+linux-headers-5.10.0-31-common==5.10.221-1
+linux-headers-amd64==5.10.221-1
+linux-headers-arm64==5.10.221-1
+linux-kbuild-5.10==5.10.221-1
+linux-libc-dev==5.10.221-1
 linuxdoc-tools==0.9.82-1
 llvm==1:11.0-51+nmu5
 llvm-11==1:11.0.1-2
@@ -1685,7 +1684,7 @@ python3-gpg==1.14.0-1+b2
 python3-hamcrest==1.9.0-3
 python3-html5lib==1.1-3
 python3-hyperlink==19.0.0-2
-python3-idna==2.10-1
+python3-idna==2.10-1+deb11u1
 python3-imagesize==1.2.0-2
 python3-importlib-metadata==1.6.0-2
 python3-incremental==17.5.0-1
@@ -1716,7 +1715,7 @@ python3-parse==1.6.6-0.2
 python3-parso==0.8.1-1
 python3-pexpect==4.8.0-2
 python3-pickleshare==0.7.5-3
-python3-pil==8.1.2+dfsg-0.3+deb11u1
+python3-pil==8.1.2+dfsg-0.3+deb11u2
 python3-pkg-resources==52.0.0-4
 python3-pluggy==0.13.0-6
 python3-ply==3.11-4
@@ -1772,11 +1771,11 @@ qemu-system-data==1:5.2+dfsg-11+deb11u3
 qemu-system-gui==1:5.2+dfsg-11+deb11u3
 qemu-system-x86==1:5.2+dfsg-11+deb11u3
 qemu-utils==1:5.2+dfsg-11+deb11u3
-qt5-gtk-platformtheme==5.15.2+dfsg-9
-qt5-qmake==5.15.2+dfsg-9
-qt5-qmake-bin==5.15.2+dfsg-9
-qtbase5-dev==5.15.2+dfsg-9
-qtbase5-dev-tools==5.15.2+dfsg-9
+qt5-gtk-platformtheme==5.15.2+dfsg-9+deb11u1
+qt5-qmake==5.15.2+dfsg-9+deb11u1
+qt5-qmake-bin==5.15.2+dfsg-9+deb11u1
+qtbase5-dev==5.15.2+dfsg-9+deb11u1
+qtbase5-dev-tools==5.15.2+dfsg-9+deb11u1
 qtchooser==66-2
 qttranslations5-l10n==5.15.2-2
 quilt==0.66-2.1
@@ -1845,9 +1844,9 @@ strace==5.10-1
 sudo==1.9.5p2-3+deb11u1
 swig==4.0.2-1
 swig4.0==4.0.2-1
-systemd==247.3-7+deb11u4
-systemd-sysv==247.3-7+deb11u4
-systemd-timesyncd==247.3-7+deb11u4
+systemd==247.3-7+deb11u5
+systemd-sysv==247.3-7+deb11u5
+systemd-timesyncd==247.3-7+deb11u5
 t1utils==1.41-4
 tcl==8.6.11+1
 tcl8.6==8.6.11+dfsg-1
diff --git a/files/build/versions/dockers/sonic-slave-bullseye/versions-deb-bullseye-armhf b/files/build/versions/dockers/sonic-slave-bullseye/versions-deb-bullseye-armhf
index bd29040d6..eef585c8b 100644
--- a/files/build/versions/dockers/sonic-slave-bullseye/versions-deb-bullseye-armhf
+++ b/files/build/versions/dockers/sonic-slave-bullseye/versions-deb-bullseye-armhf
@@ -3,7 +3,7 @@ dvipng==1.15-1.1
 libjpeg-dev==1:2.0.6-4
 libjpeg62-turbo-dev==1:2.0.6-4
 libunicode-linebreak-perl==0.0.20190101-1+b2
-linux-compiler-gcc-10-arm==5.10.218-1
-linux-headers-5.10.0-30-armmp==5.10.218-1
-linux-headers-armmp==5.10.218-1
+linux-compiler-gcc-10-arm==5.10.221-1
+linux-headers-5.10.0-31-armmp==5.10.221-1
+linux-headers-armmp==5.10.221-1
 nasm==2.15.05-1
diff --git a/files/build/versions/dockers/sonic-slave-bullseye/versions-py3 b/files/build/versions/dockers/sonic-slave-bullseye/versions-py3
index 4bfb6d46b..19ed5b019 100644
--- a/files/build/versions/dockers/sonic-slave-bullseye/versions-py3
+++ b/files/build/versions/dockers/sonic-slave-bullseye/versions-py3
@@ -8,6 +8,7 @@ backcall==0.2.0
 bcrypt==3.1.7
 beautifulsoup4==4.9.3
 bitarray==2.9.2
+blkinfo==0.2.0
 certifi==2020.6.20
 chardet==4.0.0
 click==7.1.2
@@ -69,11 +70,11 @@ parso==0.8.1
 pexpect==4.8.0
 pickleshare==0.7.5
 pillow==9.4.0
-pip==24.0
+pip==24.2
 pluggy==0.13.0
 ply==3.11
 prompt-toolkit==3.0.14
-protobuf==4.25.3
+protobuf==4.25.4
 psutil==5.8.0
 ptyprocess==0.7.0
 py==1.10.0
@@ -82,7 +83,7 @@ pyangbind==0.8.1
 pyasn1==0.4.8
 pyasn1-modules==0.2.1
 pycurl==7.43.0.6
-pyfakefs==5.5.0
+pyfakefs==5.6.0
 pygments==2.7.1
 pygobject==3.38.0
 pyhamcrest==1.9.0
@@ -101,8 +102,8 @@ python-magic==0.4.20
 pytz==2021.1
 pyxdg==0.27
 pyyaml==5.4.1
-redis==5.0.4
-regex==2024.5.15
+redis==5.0.8
+regex==2024.7.24
 requests==2.25.1
 roman==2.0.0
 scapy==2.4.4
diff --git a/files/build/versions/dockers/sonic-slave-bullseye/versions-py3-all-arm64 b/files/build/versions/dockers/sonic-slave-bullseye/versions-py3-all-arm64
new file mode 100644
index 000000000..84f3d20c0
--- /dev/null
+++ b/files/build/versions/dockers/sonic-slave-bullseye/versions-py3-all-arm64
@@ -0,0 +1 @@
+psutil==6.0.0
diff --git a/files/build/versions/dockers/sonic-slave-bullseye/versions-py3-all-armhf b/files/build/versions/dockers/sonic-slave-bullseye/versions-py3-all-armhf
new file mode 100644
index 000000000..84f3d20c0
--- /dev/null
+++ b/files/build/versions/dockers/sonic-slave-bullseye/versions-py3-all-armhf
@@ -0,0 +1 @@
+psutil==6.0.0
diff --git a/files/build/versions/dockers/sonic-slave-buster/versions-deb-buster b/files/build/versions/dockers/sonic-slave-buster/versions-deb-buster
index c51600950..4469ca16b 100644
--- a/files/build/versions/dockers/sonic-slave-buster/versions-deb-buster
+++ b/files/build/versions/dockers/sonic-slave-buster/versions-deb-buster
@@ -95,7 +95,7 @@ docbook-xml==4.5-8
 docker-buildx-plugin==0.10.5-1~debian.10~buster
 docker-ce==5:24.0.2-1~debian.10~buster
 docker-ce-cli==5:24.0.2-1~debian.10~buster
-docker-ce-rootless-extras==5:26.1.3-1~debian.10~buster
+docker-ce-rootless-extras==5:26.1.4-1~debian.10~buster
 docker-compose-plugin==2.18.1-1~debian.10~buster
 docutils-common==0.14+dfsg-4
 docutils-doc==0.14+dfsg-4
@@ -156,9 +156,9 @@ gir1.2-gtk-3.0==3.24.5-1
 gir1.2-harfbuzz-0.0==2.3.1-1
 gir1.2-packagekitglib-1.0==1.1.12-5
 gir1.2-pango-1.0==1.42.4-8~deb10u1
-git==1:2.20.1-2+deb10u8
+git==1:2.20.1-2+deb10u9
 git-buildpackage==0.9.14
-git-man==1:2.20.1-2+deb10u8
+git-man==1:2.20.1-2+deb10u9
 glib-networking==2.58.0-2+deb10u2
 glib-networking-common==2.58.0-2+deb10u2
 glib-networking-services==2.58.0-2+deb10u2
@@ -342,14 +342,15 @@ libbsh-java==2.0b4-19
 libbz2-dev==1.0.6-9.2~deb10u2
 libc-ares-dev==1.14.0-1+deb10u4
 libc-ares2==1.14.0-1+deb10u4
-libc-dev-bin==2.28-10+deb10u3
-libc-l10n==2.28-10+deb10u3
-libc6-dbg==2.28-10+deb10u3
-libc6-dev==2.28-10+deb10u3
-libc6-dev-i386==2.28-10+deb10u3
-libc6-dev-x32==2.28-10+deb10u3
-libc6-i386==2.28-10+deb10u3
-libc6-x32==2.28-10+deb10u3
+libc-dev-bin==2.28-10+deb10u4
+libc-l10n==2.28-10+deb10u4
+libc6==2.28-10+deb10u4
+libc6-dbg==2.28-10+deb10u4
+libc6-dev==2.28-10+deb10u4
+libc6-dev-i386==2.28-10+deb10u4
+libc6-dev-x32==2.28-10+deb10u4
+libc6-i386==2.28-10+deb10u4
+libc6-x32==2.28-10+deb10u4
 libcaca0==0.99.beta19-2.1+deb10u1
 libcacard0==1:2.6.1-1
 libcaf-openmpi-3==2.4.0-2
@@ -415,9 +416,9 @@ libcryptsetup12==2:2.1.0-5+deb10u2
 libcrystalhd3==1:0.0~git20110715.fdd2f19-13
 libcunit1==2.1-3-dfsg-2+b12
 libcunit1-dev==2.1-3-dfsg-2+b12
-libcups2==2.2.10-6+deb10u9
+libcups2==2.2.10-6+deb10u10
 libcupsfilters1==1.21.6-5+deb10u1
-libcupsimage2==2.2.10-6+deb10u9
+libcupsimage2==2.2.10-6+deb10u10
 libcurl3-gnutls==7.64.0-4+deb10u9
 libcurl4==7.64.0-4+deb10u9
 libcurl4-openssl-dev==7.64.0-4+deb10u9
@@ -1194,7 +1195,7 @@ libvisual-0.4-0==0.4.0-15
 libvorbis0a==1.3.6-2
 libvorbisenc2==1.3.6-2
 libvorbisfile3==1.3.6-2
-libvpx5==1.7.0-3+deb10u2
+libvpx5==1.7.0-3+deb10u3
 libvte-2.91-0==0.54.2-2
 libvte-2.91-common==0.54.2-2
 libvulkan-dev==1.1.97-2
@@ -1359,18 +1360,18 @@ libzvbi0==0.2.35-16
 libzzip-0-13==0.13.62-3.2+deb10u1
 licensecheck==3.0.31-3
 lintian==2.15.0
-linux-compiler-gcc-8-x86==4.19.304-1
-linux-headers-4.19.0-26-amd64==4.19.304-1
-linux-headers-4.19.0-26-common==4.19.304-1
-linux-headers-amd64==4.19+105+deb10u21
-linux-kbuild-4.19==4.19.304-1
-linux-libc-dev==4.19.304-1
+linux-compiler-gcc-8-x86==4.19.316-1
+linux-headers-4.19.0-27-amd64==4.19.316-1
+linux-headers-4.19.0-27-common==4.19.316-1
+linux-headers-amd64==4.19+105+deb10u22
+linux-kbuild-4.19==4.19.316-1
+linux-libc-dev==4.19.316-1
 linuxdoc-tools==0.9.73-2
 llvm-7==1:7.0.1-8+deb10u2
 llvm-7-dev==1:7.0.1-8+deb10u2
 llvm-7-runtime==1:7.0.1-8+deb10u2
 lmodern==2.004.5-6
-locales==2.28-10+deb10u3
+locales==2.28-10+deb10u4
 logrotate==3.14.0-4
 lsb-base==10.2019051400
 lsb-release==10.2019051400
@@ -1418,7 +1419,7 @@ openssh-client==1:7.9p1-10+deb10u4
 openssh-server==1:7.9p1-10+deb10u4
 openssh-sftp-server==1:7.9p1-10+deb10u4
 openssl==1.1.1n-0+deb10u6
-ovmf==0~20181115.85588389-3+deb10u3
+ovmf==0~20181115.85588389-3+deb10u4
 packagekit==1.1.12-5
 packagekit-tools==1.1.12-5
 pango1.0-tools==1.42.4-8~deb10u1
@@ -1449,13 +1450,13 @@ php-token-stream==3.0.1-1
 php-tokenizer==1.1.0-1
 php-webmozart-assert==1.4.0-3
 php-xml==2:7.3+69
-php7.3-cli==7.3.31-1~deb10u6
-php7.3-common==7.3.31-1~deb10u6
-php7.3-json==7.3.31-1~deb10u6
-php7.3-mbstring==7.3.31-1~deb10u6
-php7.3-opcache==7.3.31-1~deb10u6
-php7.3-readline==7.3.31-1~deb10u6
-php7.3-xml==7.3.31-1~deb10u6
+php7.3-cli==7.3.31-1~deb10u7
+php7.3-common==7.3.31-1~deb10u7
+php7.3-json==7.3.31-1~deb10u7
+php7.3-mbstring==7.3.31-1~deb10u7
+php7.3-opcache==7.3.31-1~deb10u7
+php7.3-readline==7.3.31-1~deb10u7
+php7.3-xml==7.3.31-1~deb10u7
 phpunit==7.5.6-1
 phpunit-code-unit-reverse-lookup==1.0.1-1
 phpunit-comparator==3.0.2-1
diff --git a/files/build/versions/dockers/sonic-slave-buster/versions-deb-buster-armhf b/files/build/versions/dockers/sonic-slave-buster/versions-deb-buster-armhf
index fc8b535d0..4db6ea2c4 100644
--- a/files/build/versions/dockers/sonic-slave-buster/versions-deb-buster-armhf
+++ b/files/build/versions/dockers/sonic-slave-buster/versions-deb-buster-armhf
@@ -17,7 +17,7 @@ libqt5sql5-sqlite==5.11.3+dfsg1-1+deb10u5
 libqt5test5==5.11.3+dfsg1-1+deb10u5
 libqt5widgets5==5.11.3+dfsg1-1+deb10u5
 libqt5xml5==5.11.3+dfsg1-1+deb10u5
-linux-compiler-gcc-8-arm==4.19.304-1
+linux-compiler-gcc-8-arm==4.19.316-1
 nasm==2.14-1
 qt5-default==5.11.3+dfsg1-1+deb10u5
 qt5-gtk-platformtheme==5.11.3+dfsg1-1+deb10u5
diff --git a/files/build/versions/dockers/sonic-slave-buster/versions-py2 b/files/build/versions/dockers/sonic-slave-buster/versions-py2
index b981e77dd..d043b8e5b 100644
--- a/files/build/versions/dockers/sonic-slave-buster/versions-py2
+++ b/files/build/versions/dockers/sonic-slave-buster/versions-py2
@@ -7,6 +7,7 @@ automat==0.6.0
 babel==2.6.0
 backports.functools-lru-cache==1.5
 beautifulsoup4==4.7.1
+blkinfo==0.2.0
 certifi==2018.8.24
 chardet==3.0.4
 click==7.0
@@ -57,6 +58,7 @@ pexpect==4.6.0
 pillow==5.4.1
 pip==20.3.4
 pluggy==0.8.0
+psutil==6.0.0
 ptyprocess==0.7.0
 py==1.7.0
 pyasn1==0.4.2
diff --git a/files/build/versions/dockers/sonic-slave-buster/versions-py3 b/files/build/versions/dockers/sonic-slave-buster/versions-py3
index 169a0f62a..8274e14ba 100644
--- a/files/build/versions/dockers/sonic-slave-buster/versions-py3
+++ b/files/build/versions/dockers/sonic-slave-buster/versions-py3
@@ -5,6 +5,7 @@ atomicwrites==1.1.5
 attrs==18.2.0
 babel==2.6.0
 bitarray==2.9.2
+blkinfo==0.2.0
 certifi==2018.8.24
 chardet==3.0.4
 cov-core==1.15.0
@@ -25,7 +26,7 @@ jinja2==3.0.3
 keyring==17.1.1
 keyrings.alt==3.1.1
 lxml==4.9.1
-m2crypto==0.41.0
+m2crypto==0.42.0
 mako==1.0.7
 markdown==3.0.1
 markupsafe==2.0.1
@@ -43,13 +44,14 @@ pexpect==4.8.0
 pillow==9.4.0
 pip==24.0
 pluggy==0.8.0
+psutil==6.0.0
 ptyprocess==0.7.0
 py==1.7.0
 pyang==2.4.0
 pyangbind==0.8.1
 pycrypto==2.6.1
 pycurl==7.43.0.2
-pyfakefs==5.5.0
+pyfakefs==5.6.0
 pygments==2.3.1
 pygobject==3.30.4
 pympler==0.8
@@ -64,7 +66,7 @@ python-magic==0.4.16
 pytz==2019.1
 pyxdg==0.25
 pyyaml==5.4.1
-redis==5.0.4
+redis==5.0.8
 regex==2024.4.16
 requests==2.21.0
 roman==2.0.0
diff --git a/files/build/versions/host-base-image/versions-deb-bookworm b/files/build/versions/host-base-image/versions-deb-bookworm
index 6d97d65c7..d14312af2 100644
--- a/files/build/versions/host-base-image/versions-deb-bookworm
+++ b/files/build/versions/host-base-image/versions-deb-bookworm
@@ -1,9 +1,9 @@
 adduser==3.134
 apt==2.6.1
-base-files==12.4+deb12u5
+base-files==12.4+deb12u6
 base-passwd==3.6.1
-bash==5.2.15-2+b2
-bsdutils==1:2.38.1-5+b1
+bash==5.2.15-2+b7
+bsdutils==1:2.38.1-5+deb12u1
 coreutils==9.1-1
 dash==0.5.12-2
 debconf==1.5.82
@@ -24,10 +24,10 @@ libapt-pkg6.0==2.6.1
 libattr1==1:2.5.1-4
 libaudit-common==1:3.0.9-1
 libaudit1==1:3.0.9-1
-libblkid1==2.38.1-5+b1
+libblkid1==2.38.1-5+deb12u1
 libbz2-1.0==1.0.8-5+b1
-libc-bin==2.36-9+deb12u4
-libc6==2.36-9+deb12u4
+libc-bin==2.36-9+deb12u7
+libc6==2.36-9+deb12u7
 libcap-ng0==0.8.3-1+b3
 libcap2==1:2.66-4
 libcom-err2==1.47.0-2
@@ -39,14 +39,14 @@ libffi8==3.4.4-1
 libgcc-s1==12.2.0-14
 libgcrypt20==1.10.1-3
 libgmp10==2:6.2.1+dfsg1-1.1
-libgnutls30==3.7.9-2+deb12u2
+libgnutls30==3.7.9-2+deb12u3
 libgpg-error0==1.46-1
 libhogweed6==3.8.1-2
 libidn2-0==2.3.3-1+b1
 liblz4-1==1.9.4-1
 liblzma5==5.4.1-0.2
 libmd0==1.0.4-2
-libmount1==2.38.1-5+b1
+libmount1==2.38.1-5+deb12u1
 libnettle8==3.8.1-2
 libp11-kit0==0.24.1-2
 libpam-modules==1.5.2-6+deb12u1
@@ -54,26 +54,26 @@ libpam-modules-bin==1.5.2-6+deb12u1
 libpam-runtime==1.5.2-6+deb12u1
 libpam0g==1.5.2-6+deb12u1
 libpcre2-8-0==10.42-1
-libseccomp2==2.5.4-1+b3
+libseccomp2==2.5.4-1+deb12u1
 libselinux1==3.4-1+b6
 libsemanage-common==3.4-1
 libsemanage2==3.4-1+b5
 libsepol2==3.4-2.1
-libsmartcols1==2.38.1-5+b1
+libsmartcols1==2.38.1-5+deb12u1
 libss2==1.47.0-2
 libstdc++6==12.2.0-14
-libsystemd0==252.22-1~deb12u1
+libsystemd0==252.26-1~deb12u2
 libtasn1-6==4.19.0-2
 libtinfo6==6.4-4
-libudev1==252.22-1~deb12u1
+libudev1==252.26-1~deb12u2
 libunistring2==1.0-2
-libuuid1==2.38.1-5+b1
+libuuid1==2.38.1-5+deb12u1
 libxxhash0==0.8.1-1
 libzstd1==1.5.4+dfsg2-5
 login==1:4.13+dfsg1-1+b1
 logsave==1.47.0-2
 mawk==1.3.4.20200120-3.1
-mount==2.38.1-5+b1
+mount==2.38.1-5+deb12u1
 ncurses-base==6.4-4
 ncurses-bin==6.4-4
 passwd==1:4.13+dfsg1-1+b1
@@ -83,6 +83,6 @@ sysvinit-utils==3.06-4
 tar==1.34+dfsg-1.2+deb12u1
 tzdata==2024a-0+deb12u1
 usr-is-merged==37~deb12u1
-util-linux==2.38.1-5+b1
-util-linux-extra==2.38.1-5+b1
+util-linux==2.38.1-5+deb12u1
+util-linux-extra==2.38.1-5+deb12u1
 zlib1g==1:1.2.13.dfsg-1
diff --git a/files/build/versions/host-image/versions-deb-bookworm b/files/build/versions/host-image/versions-deb-bookworm
index b3d1df0f7..820dfc3ab 100644
--- a/files/build/versions/host-image/versions-deb-bookworm
+++ b/files/build/versions/host-image/versions-deb-bookworm
@@ -7,7 +7,7 @@ auditd==1:3.0.9-1
 bash==5.1-2
 bash-completion==1:2.11-6
 bash-tacplus==1.0.0
-bfscripts==4.6.0-13035
+bfscripts==4.7.0-13127
 binutils==2.40-2
 binutils-aarch64-linux-gnu==2.40-2
 binutils-common==2.40-2
@@ -16,7 +16,6 @@ bluefield-platform-modules==1.0
 bridge-utils==1.7.1-1
 bsdextrautils==2.38.1-5+deb12u1
 bsdmainutils==12.1.8
-bsdutils==1:2.38.1-5+deb12u1
 busybox==1:1.35.0-4+b3
 ca-certificates==20230311
 cgroup-tools==2.0.2-2
@@ -27,14 +26,14 @@ cpp==4:12.2.0-3
 cpp-12==12.2.0-14
 cron==3.0pl1-162
 cron-daemon-common==3.0pl1-162
-curl==7.88.1-10+deb12u5
+curl==7.88.1-10+deb12u6
 dbus==1.14.10-1~deb12u1
 dbus-bin==1.14.10-1~deb12u1
 dbus-daemon==1.14.10-1~deb12u1
 dbus-session-bus-common==1.14.10-1~deb12u1
 dbus-system-bus-common==1.14.10-1~deb12u1
 device-tree-compiler==1.6.1-4+b1
-distro-info-data==0.58+deb12u1
+distro-info-data==0.58+deb12u2
 dmidecode==3.4-1
 dmsetup==2:1.02.185-2
 docker-ce==5:24.0.2-1~debian.12~bookworm
@@ -65,7 +64,7 @@ grub2-common==2.06-13+deb12u1
 haveged==1.9.14-1+b1
 hdparm==9.65+ds-1
 hping3==3.a2.ds2-10
-hw-management==1.mlnx.7.0030.3008
+hw-management==1.mlnx.7.0030.4003
 i2c-tools==4.3-2+b3
 icu-devtools==72.1-3
 ifmetric==0.3-5
@@ -83,7 +82,7 @@ j2cli==0.3.12b-4
 jq==1.6-2.1
 kdump-tools==1:1.8.1
 kernel-mft-dkms-modules-6.1.0-11-2-amd64==4.28.0
-kernel-mft-dkms-modules-6.1.0-11-2-arm64==4.26.1
+kernel-mft-dkms-modules-6.1.0-11-2-arm64==4.28.0
 kexec-tools==1:2.0.25-3+b1
 klibc-utils==2.0.12-1
 kmod==30+20221128-1
@@ -94,21 +93,20 @@ libapparmor1==3.0.8-3
 libargon2-1==0~20171227-0.3+deb12u1
 libasan8==12.2.0-14
 libassuan0==2.5.5-5
-libatm1==1:2.5.1-4+b2
 libatomic1==12.2.0-14
 libauparse0==1:3.0.9-1
+libavahi-client3==0.8-10
+libavahi-common-data==0.8-10
+libavahi-common3==0.8-10
 libbabeltrace1==1.5.11-1+b2
 libbinutils==2.40-2
-libblkid1==2.38.1-5+deb12u1
 libboost-serialization1.74.0==1.74.0+ds1-21
 libbpf1==1:1.1.0-1
 libbrotli1==1.0.9-2+b6
 libbsd0==0.11.7-2
 libc-ares2==1.18.1-3
-libc-bin==2.36-9+deb12u7
 libc-dev-bin==2.36-9+deb12u7
 libc-l10n==2.36-9+deb12u7
-libc6==2.36-9+deb12u7
 libc6-dev==2.36-9+deb12u7
 libcap2-bin==1:2.66-4
 libcbor0.8==0.8.0-2+b1
@@ -119,7 +117,7 @@ libcrypt-dev==1:4.4.33-2
 libcryptsetup12==2:2.6.1-4~deb12u2
 libctf-nobfd0==2.40-2
 libctf0==2.40-2
-libcurl4==7.88.1-10+deb12u5
+libcurl4==7.88.1-10+deb12u6
 libdbd-sqlite3-perl==1.72-1
 libdbi-perl==1.643-4
 libdbus-1-3==1.14.10-1~deb12u1
@@ -137,25 +135,27 @@ libfdisk1==2.38.1-5+deb12u1
 libfdt1==1.6.1-4+b1
 libffi-dev==3.4.4-1
 libfido2-1==1.12.0-2+b1
-libfreetype6==2.12.1+dfsg-5
+libfreetype6==2.12.1+dfsg-5+deb12u3
 libfuse2==2.9.9-6+b1
 libgcc-12-dev==12.2.0-14
 libgdbm-compat4==1.23-3
 libgdbm6==1.23-3
 libgirepository-1.0-1==1.74.0-3
-libglib2.0-0==2.74.6-2+deb12u2
+libglib2.0-0==2.74.6-2+deb12u3
 libgomp1==12.2.0-14
 libgpm2==1.20.7-10+b1
 libgprofng0==2.40-2
 libgrpc++1.51==1.51.1-3+b1
 libgrpc29==1.51.1-3+b1
-libgssapi-krb5-2==1.20.1-2+deb12u1
+libgssapi-krb5-2==1.20.1-2+deb12u2
 libhavege2==1.9.14-1+b1
 libhiredis0.14==0.14.1-3
 libhwasan0==12.2.0-14
 libi2c0==4.3-2+b3
 libicu-dev==72.1-3
 libicu72==72.1-3
+libiio-utils==0.24-4
+libiio0==0.24-4
 libiniparser1==4.1-6
 libip4tc2==1.8.9-2
 libip6tc2==1.8.9-2
@@ -165,12 +165,12 @@ libjansson4==2.14-2
 libjq1==1.6-2.1
 libjs-jquery==3.6.1+dfsg+~3.5.14-1
 libjson-c5==0.16-2
-libk5crypto3==1.20.1-2+deb12u1+fips
+libk5crypto3==1.20.1-2+deb12u2
 libkeyutils1==1.6.3-2
 libklibc==2.0.12-1
 libkmod2==30+20221128-1
-libkrb5-3==1.20.1-2+deb12u1
-libkrb5support0==1.20.1-2+deb12u1
+libkrb5-3==1.20.1-2+deb12u2
+libkrb5support0==1.20.1-2+deb12u2
 libldap-2.5-0==2.5.13+dfsg-5
 liblognorm5==2.0.6-4
 liblsan0==12.2.0-14
@@ -179,7 +179,6 @@ liblzo2-2==2.10-2
 libmagic-mgc==1:5.44-3
 libmagic1==1:5.44-3
 libmnl0==1.0.4-3
-libmount1==2.38.1-5+deb12u1
 libmpc3==1.3.1-1
 libmpfr6==4.2.0-1
 libncurses6==6.4-4
@@ -222,9 +221,9 @@ libpsl5==0.21.2-1
 libpwquality-common==1.4.5-1
 libpwquality1==1.4.5-1+b1
 libpython3-stdlib==3.11.2-1+b1
-libpython3.11==3.11.2-6
-libpython3.11-minimal==3.11.2-6
-libpython3.11-stdlib==3.11.2-6
+libpython3.11==3.11.2-6+deb12u2
+libpython3.11-minimal==3.11.2-6+deb12u2
+libpython3.11-stdlib==3.11.2-6+deb12u2
 libquadmath0==12.2.0-14
 libre2-9==20220601+dfsg-1+b1
 libreadline8==8.2-1.3
@@ -234,7 +233,6 @@ libsasl2-modules-db==2.1.28+dfsg-10
 libsensors-config==1:3.6.0-7.1
 libsensors5==1:3.6.0-7.1
 libslang2==2.3.3-3
-libsmartcols1==2.38.1-5+deb12u1
 libsodium23==1.0.18-1
 libsqlite3-0==3.40.1-2
 libssh2-1==1.10.0-3+b1
@@ -242,7 +240,7 @@ libssl-dev==3.0.11-1~deb12u2+fips
 libssl3==3.0.11-1~deb12u2+fips
 libswsscommon==1.0.0
 libsysfs2==2.1.1-4
-libsystemd-shared==252.22-1~deb12u1
+libsystemd-shared==252.26-1~deb12u2
 libtac2==1.4.1-1
 libtcl8.6==8.6.13+dfsg-2
 libtirpc-common==1.3.3+ds-1
@@ -255,7 +253,6 @@ libubsan1==12.2.0-14
 libunwind8==1.6.2-3
 libusb-1.0-0==2:1.0.26-1
 libutempter0==1.2.1-3
-libuuid1==2.38.1-5+deb12u1
 libwrap0==7.6.q-32
 libxencall1==4.17.3+10-g091466ba55-1~deb12u1
 libxendevicemodel1==4.17.3+10-g091466ba55-1~deb12u1
@@ -280,8 +277,8 @@ libzmq5==4.3.4-6
 linux-base==4.9
 linux-image-6.1.0-11-2-amd64-unsigned==6.1.38-4
 linux-image-6.1.0-11-2-arm64-unsigned==6.1.38-4
-linux-libc-dev==6.1.90-1
-linux-perf==6.1.90-1
+linux-libc-dev==6.1.99-1
+linux-perf==6.1.99-1
 locales==2.36-9+deb12u7
 logrotate==3.21.0-1
 lsof==4.95.0-1
@@ -292,15 +289,14 @@ mft==4.28.0-96
 mft-fwtrace-cfg==1.0.0
 mft-oem==4.28.0-96
 minicom==2.8-2
-mlnx-iproute2==6.4.0-1.2310036
-mlnx-ofed-kernel-modules-6.1.0-11-2-arm64==23.10.OFED.23.10.0.3.6.1
-mlnx-ofed-kernel-utils==23.10.OFED.23.10.0.3.6.1-1
-mlnx-tools==23.10.0-1.2310036
+mlnx-iproute2==6.7.0-1.2404066
+mlnx-ofed-kernel-modules-6.1.0-11-2-arm64==24.04.OFED.24.04.0.6.6.1
+mlnx-ofed-kernel-utils==24.04.OFED.24.04.0.6.6.1-1
+mlnx-tools==24.04.0-1.2404066
 mlxbf-bootctl==2.1
-mlxbf-bootimages==4.6.0-13035
+mlxbf-bootimages==4.7.0-13127
 mokutil==0.6.0-2
 monit==1:5.20.0-6
-mount==2.38.1-5+deb12u1
 mtd-utils==1:2.1.5-1
 mtr-tiny==0.95-1
 ncal==12.1.8
@@ -317,9 +313,9 @@ ntpsec-ntpdig==1.2.2+dfsg1-1+deb12u1
 ntpstat==0.0.0.1-2+b1
 nvme-cli==2.4+really2.3-3
 opennsl-modules==7.1.0.0
-openssh-client==1:9.2p1-2+deb12u2+fips
-openssh-server==1:9.2p1-2+deb12u2+fips
-openssh-sftp-server==1:9.2p1-2+deb12u2+fips
+openssh-client==1:9.2p1-2+deb12u3+fips
+openssh-server==1:9.2p1-2+deb12u3+fips
+openssh-sftp-server==1:9.2p1-2+deb12u3+fips
 openssl==3.0.11-1~deb12u2+fips
 pci.ids==0.0~2023.04.11-1
 pciutils==1:3.9.0-4
@@ -331,7 +327,7 @@ pkgconf==1.8.1-1
 procps==2:4.0.2-3
 psmisc==23.6-1
 python-apt-common==2.6.0
-python-is-python3==3.11.1-3
+python-is-python3==3.11.2-1+deb12u1
 python3==3.11.2-1+b1
 python3-apt==2.6.0
 python3-cffi==1.15.1-5
@@ -355,8 +351,8 @@ python3-swsscommon==1.0.0
 python3-wheel==0.38.4-2
 python3-yaml==6.0-3+b2
 python3-yang==1.0.73
-python3.11==3.11.2-6
-python3.11-minimal==3.11.2-6
+python3.11==3.11.2-6+deb12u2
+python3.11-minimal==3.11.2-6+deb12u2
 rasdaemon==0.6.8-1
 readline-common==8.2-1.3
 resolvconf==1.91+nmu1
@@ -372,30 +368,29 @@ smartmontools==7.4-2~bpo12+1
 sonic-db-cli==1.0.0
 sonic-device-data==1.0-1
 sonic-host-services-data==1.0-1
+sonic-nettools==0.0.1-0
 sonic-platform-pddf==1.1
 sonic-rsyslog-plugin==1.0.0-0
 sonic-utilities-data==1.0-1
 sqlite3==3.40.1-2
 squashfs-tools==1:4.5.1-1
 sudo==1.9.13p3-1+deb12u1
-sx-kernel==1.mlnx.4.6.3064
+sx-kernel==1.mlnx.4.6.4072
 symcrypt-openssl==0.1
 sysfsutils==2.1.1-4
 sysstat==12.6.1-1
-systemd==252.22-1~deb12u1
+systemd==252.26-1~deb12u2
 systemd-bootchart==234-2+b1
 systemd-sonic-generator==1.0.0
-systemd-sysv==252.22-1~deb12u1
+systemd-sysv==252.26-1~deb12u2
 tcpdump==4.99.3-1
 tcptraceroute==1.5beta7+debian-4.1+b1
 traceroute==1:2.1.2-1
-u-boot-tools==2023.01+dfsg-2
+u-boot-tools==2023.01+dfsg-2+deb12u1
 ucf==3.0043+nmu1
-udev==252.22-1~deb12u1
+udev==252.26-1~deb12u2
 unzip==6.0-28
 usbutils==1:014-1+deb12u1
-util-linux==2.38.1-5+deb12u1
-util-linux-extra==2.38.1-5+deb12u1
 uuid-runtime==2.38.1-5+deb12u1
 vim==2:9.0.1378-2
 vim-common==2:9.0.1378-2
diff --git a/files/build/versions/host-image/versions-py3 b/files/build/versions/host-image/versions-py3
index 34011efb4..548519d7c 100644
--- a/files/build/versions/host-image/versions-py3
+++ b/files/build/versions/host-image/versions-py3
@@ -4,7 +4,8 @@ azure-storage==0.36.0
 bcrypt==3.2.2
 bitarray==2.8.1
 blessed==1.20.0
-certifi==2024.6.2
+blkinfo==0.2.0
+certifi==2024.7.4
 cffi==1.15.1
 charset-normalizer==3.3.2
 click==7.0
@@ -13,9 +14,9 @@ colorful==0.5.6
 cryptography==38.0.4
 dbus-python==1.3.2
 docker==7.1.0
-docker-image-py==0.1.12
+docker-image-py==0.1.13
 enlighten==1.12.4
-filelock==3.14.0
+filelock==3.15.4
 grpcio==1.51.1
 grpcio-tools==1.51.1
 idna==3.7
@@ -24,9 +25,9 @@ ipaddr==2.2.0
 ipaddress==1.0.23
 j2cli==0.3.12b0
 jinja2==3.1.2
-jsondiff==2.0.0
+jsondiff==2.2.0
 jsonpatch==1.33
-jsonpointer==2.4
+jsonpointer==3.0.0
 jsonschema==2.6.0
 lazy-object-proxy==1.10.0
 lxml==4.9.1
@@ -42,14 +43,14 @@ perf==0.1
 pexpect==4.9.0
 pip==23.0.1
 ply==3.11
-prefixed==0.7.1
+prefixed==0.8.0
 prettyprinter==0.18.0
-protobuf==4.25.3
-psutil==5.9.8
+protobuf==4.25.4
+psutil==6.0.0
 ptyprocess==0.7.0
 pyang==2.6.1
 pyangbind==0.8.2
-pycairo==1.26.0
+pycairo==1.26.1
 pycparser==2.21
 pygments==2.18.0
 pygobject==3.48.2
@@ -59,16 +60,17 @@ python-apt==2.6.0
 python-dateutil==2.9.0.post0
 pyyaml==6.0.1
 redis==3.5.3
-regex==2024.5.15
-requests==2.32.3
+regex==2024.7.24
+requests==2.31.0
 scapy==2.4.4
+scp==0.14.5
 semantic-version==2.10.0
 setuptools==66.1.1
 six==1.16.0
 systemd-python==235
 tabulate==0.9.0
 toposort==1.6
-urllib3==2.2.1
+urllib3==2.2.2
 watchdog==0.10.3
 wcwidth==0.2.13
 wheel==0.38.4

From 80e5153f70d3c780dc9aaf4a7f874c9abcfefa50 Mon Sep 17 00:00:00 2001
From: Tejaswini Chadaga <85581939+tjchadaga@users.noreply.github.com>
Date: Wed, 21 Aug 2024 10:08:39 -0700
Subject: [PATCH 0917/1115] Fixed switch role check for IDF isolation
 configuration (#19543)

Fixed switch role check for IDF isolation configuration
---
 src/sonic-bgpcfgd/bgpcfgd/managers_bgp.py     |  1 +
 .../bgpcfgd/managers_device_global.py         | 24 +++++++++----------
 2 files changed, 12 insertions(+), 13 deletions(-)

diff --git a/src/sonic-bgpcfgd/bgpcfgd/managers_bgp.py b/src/sonic-bgpcfgd/bgpcfgd/managers_bgp.py
index ce3f60fad..cb47d1976 100644
--- a/src/sonic-bgpcfgd/bgpcfgd/managers_bgp.py
+++ b/src/sonic-bgpcfgd/bgpcfgd/managers_bgp.py
@@ -107,6 +107,7 @@ def __init__(self, common_objs, db_name, table_name, peer_type, check_neig_meta)
 
         deps = [
             ("CONFIG_DB", swsscommon.CFG_DEVICE_METADATA_TABLE_NAME, "localhost/bgp_asn"),
+            ("CONFIG_DB", swsscommon.CFG_DEVICE_METADATA_TABLE_NAME, "localhost/type"),
             ("CONFIG_DB", swsscommon.CFG_LOOPBACK_INTERFACE_TABLE_NAME, "Loopback0"),
             ("CONFIG_DB", swsscommon.CFG_BGP_DEVICE_GLOBAL_TABLE_NAME, "tsa_enabled"),
             ("CONFIG_DB", swsscommon.CFG_BGP_DEVICE_GLOBAL_TABLE_NAME, "idf_isolation_state"),
diff --git a/src/sonic-bgpcfgd/bgpcfgd/managers_device_global.py b/src/sonic-bgpcfgd/bgpcfgd/managers_device_global.py
index 26c0a1ee6..30ff726cb 100644
--- a/src/sonic-bgpcfgd/bgpcfgd/managers_device_global.py
+++ b/src/sonic-bgpcfgd/bgpcfgd/managers_device_global.py
@@ -19,8 +19,8 @@ def __init__(self, common_objs, db, table):
         :param common_objs: common object dictionary
         :param db: name of the db
         :param table: name of the table in the db
-        """
-        self.switch_type = ""
+        """        
+        self.switch_role = ""
         self.chassis_tsa = ""
         self.directory = common_objs['directory']
         self.cfg_mgr = common_objs['cfg_mgr']
@@ -29,8 +29,8 @@ def __init__(self, common_objs, db, table):
         self.tsb_template = common_objs['tf'].from_file("bgpd/tsa/bgpd.tsa.unisolate.conf.j2")
         self.wcmp_template = common_objs['tf'].from_file("bgpd/wcmp/bgpd.wcmp.conf.j2")
         self.idf_isolate_template = common_objs['tf'].from_file("bgpd/idf_isolate/idf_isolate.conf.j2")
-        self.idf_unisolate_template = common_objs['tf'].from_file("bgpd/idf_isolate/idf_unisolate.conf.j2")
-        self.directory.subscribe([("CONFIG_DB", swsscommon.CFG_DEVICE_METADATA_TABLE_NAME, "localhost/switch_type"),], self.on_switch_type_change)
+        self.idf_unisolate_template = common_objs['tf'].from_file("bgpd/idf_isolate/idf_unisolate.conf.j2")        
+        self.directory.subscribe([("CONFIG_DB", swsscommon.CFG_DEVICE_METADATA_TABLE_NAME, "localhost/type"),], self.handle_type_update)
         super(DeviceGlobalCfgMgr, self).__init__(
             common_objs,
             [],
@@ -48,18 +48,16 @@ def __init__(self, common_objs, db, table):
         if not self.directory.path_exist(self.db_name, self.table_name, "idf_isolation_state"):
             self.directory.put(self.db_name, self.table_name, "idf_isolation_state", self.IDF_DEFAULTS)
 
-    def on_switch_type_change(self):
-        log_debug("DeviceGlobalCfgMgr:: Switch type update handler")
-        if self.directory.path_exist("CONFIG_DB", swsscommon.CFG_DEVICE_METADATA_TABLE_NAME, "localhost/switch_type"):
-            self.switch_type = self.directory.get_slot("CONFIG_DB", swsscommon.CFG_DEVICE_METADATA_TABLE_NAME)["localhost"]["switch_type"]
-        log_debug("DeviceGlobalCfgMgr:: Switch type: %s" % self.switch_type)
+    def handle_type_update(self):
+        log_debug("DeviceGlobalCfgMgr:: Switch role update handler")
+        if self.directory.path_exist("CONFIG_DB", swsscommon.CFG_DEVICE_METADATA_TABLE_NAME, "localhost/type"):
+            self.switch_role = self.directory.get_slot("CONFIG_DB", swsscommon.CFG_DEVICE_METADATA_TABLE_NAME)["localhost"]["type"]
+        log_debug("DeviceGlobalCfgMgr:: Switch role: %s" % self.switch_role)
 
     def set_handler(self, key, data):
         """ Handle device TSA/W-ECMP state change """
         log_debug("DeviceGlobalCfgMgr:: set handler")
 
-        if self.switch_type:
-            log_debug("DeviceGlobalCfgMgr:: Switch type: %s" % self.switch_type)
         if not data:
             log_err("DeviceGlobalCfgMgr:: data is None")
             return False
@@ -259,8 +257,8 @@ def downstream_isolate_unisolate(self, idf_isolation_state):
             log_err("IDF: invalid value({}) is provided".format(idf_isolation_state))
             return False
 
-        if self.switch_type and self.switch_type != "SpineRouter":
-            log_debug("DeviceGlobalCfgMgr:: Skipping IDF isolation configuration on Switch type: %s" % self.switch_type)
+        if self.switch_role and self.switch_role != "SpineRouter":
+            log_debug("DeviceGlobalCfgMgr:: Skipping IDF isolation configuration on %s" % self.switch_role)
             return True
 
         cmd = "\n"

From 106c38d391cb245030cfbf8cd356c88da360c7e5 Mon Sep 17 00:00:00 2001
From: Hua Liu <58683130+liuh-80@users.noreply.github.com>
Date: Thu, 22 Aug 2024 08:05:45 +0800
Subject: [PATCH 0918/1115] Add GNMI client cert cname check support. (#18709)

Add GNMI client cert cname list to yang model.

#### Why I did it
Allow gnmi service authentication client cert by cname.

### How I did it
Add GNMI client cert cname list to yang model.

#### How to verify it
Pass all UT.

### Description for the changelog
Add GNMI client cert cname list to yang model.
---
 dockers/docker-sonic-gnmi/gnmi-native.sh      |  2 ++
 dockers/docker-sonic-telemetry/telemetry.sh   |  3 +++
 .../tests/files/sample_config_db.json         |  8 ++++++
 .../tests/yang_model_tests/tests/gnmi.json    |  7 +++++
 .../yang_model_tests/tests_config/gnmi.json   | 27 +++++++++++++++++++
 .../yang-models/sonic-gnmi.yang               | 21 +++++++++++++++
 6 files changed, 68 insertions(+)

diff --git a/dockers/docker-sonic-gnmi/gnmi-native.sh b/dockers/docker-sonic-gnmi/gnmi-native.sh
index d9bab2700..e9f15810a 100755
--- a/dockers/docker-sonic-gnmi/gnmi-native.sh
+++ b/dockers/docker-sonic-gnmi/gnmi-native.sh
@@ -33,6 +33,8 @@ if [ -n "$CERTS" ]; then
     if [ ! -z $CA_CRT ]; then
         TELEMETRY_ARGS+=" --ca_crt $CA_CRT"
     fi
+
+    TELEMETRY_ARGS+=" --config_table_name GNMI_CLIENT_CERT"
 elif [ -n "$X509" ]; then
     SERVER_CRT=$(echo $X509 | jq -r '.server_crt')
     SERVER_KEY=$(echo $X509 | jq -r '.server_key')
diff --git a/dockers/docker-sonic-telemetry/telemetry.sh b/dockers/docker-sonic-telemetry/telemetry.sh
index 061046d25..d1c9216d4 100755
--- a/dockers/docker-sonic-telemetry/telemetry.sh
+++ b/dockers/docker-sonic-telemetry/telemetry.sh
@@ -34,6 +34,9 @@ if [ -n "$CERTS" ]; then
     if [ ! -z $CA_CRT ]; then
         TELEMETRY_ARGS+=" --ca_crt $CA_CRT"
     fi
+
+    # Reuse GNMI_CLIENT_CERT for telemetry service
+    TELEMETRY_ARGS+=" --config_table_name GNMI_CLIENT_CERT"
 elif [ -n "$X509" ]; then
     SERVER_CRT=$(echo $X509 | jq -r '.server_crt')
     SERVER_KEY=$(echo $X509 | jq -r '.server_key')
diff --git a/src/sonic-yang-models/tests/files/sample_config_db.json b/src/sonic-yang-models/tests/files/sample_config_db.json
index 534a0d986..05f64029b 100644
--- a/src/sonic-yang-models/tests/files/sample_config_db.json
+++ b/src/sonic-yang-models/tests/files/sample_config_db.json
@@ -1329,6 +1329,14 @@
                 "port": "50052"
             }
         },
+        "GNMI_CLIENT_CERT": {
+            "testcert1": {
+                "role": "RW"
+            },
+            "testcert2": {
+                "role": "RO"
+            }
+        },
         "TUNNEL": {
             "MuxTunnel0": {
                 "dscp_mode": "uniform",
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/gnmi.json b/src/sonic-yang-models/tests/yang_model_tests/tests/gnmi.json
index 0d99fe097..56f855eac 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests/gnmi.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests/gnmi.json
@@ -17,5 +17,12 @@
     },
     "GNMI_TABLE_WITH_VALID_CONFIG": {
         "desc": "TABLE WITH VALID CONFIG."
+    },
+    "GNMI_CLIENT_CERT_LIST_TABLE_WITH_MISSING_ROLE": {
+        "desc": "CLIENT_CERT_LIST_TABLE_WITH_MISSING_ROLE failure.",
+        "eStrKey": "Mandatory"
+    },
+    "GNMI_CLIENT_CERT_LIST_TABLE_WITH_VALID_CONFIG": {
+        "desc": "TABLE WITH VALID CONFIG."
     }
 }
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/gnmi.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/gnmi.json
index 62b09a2d5..cdad6fe31 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/gnmi.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/gnmi.json
@@ -80,5 +80,32 @@
                 }
             }
         }
+    },
+    "GNMI_CLIENT_CERT_LIST_TABLE_WITH_MISSING_ROLE": {
+        "sonic-gnmi:sonic-gnmi": {
+            "sonic-gnmi:GNMI_CLIENT_CERT": {
+                "GNMI_CLIENT_CERT_LIST": [
+                {
+                    "cert_cname": "testcert1"
+                }
+                ]
+            }
+        }
+    },
+    "GNMI_CLIENT_CERT_LIST_TABLE_WITH_VALID_CONFIG": {
+        "sonic-gnmi:sonic-gnmi": {
+            "sonic-gnmi:GNMI_CLIENT_CERT": {
+                "GNMI_CLIENT_CERT_LIST": [
+                {
+                    "cert_cname": "testcert1",
+                    "role": "RW"
+                },
+                {
+                    "cert_cname": "testcert2",
+                    "role": "RO"
+                }
+                ]
+            }
+        }
     }
 }
diff --git a/src/sonic-yang-models/yang-models/sonic-gnmi.yang b/src/sonic-yang-models/yang-models/sonic-gnmi.yang
index eb573e3ff..f7c4fef33 100644
--- a/src/sonic-yang-models/yang-models/sonic-gnmi.yang
+++ b/src/sonic-yang-models/yang-models/sonic-gnmi.yang
@@ -77,7 +77,28 @@ module sonic-gnmi {
                 }
 
             }
+        }
+
+        container GNMI_CLIENT_CERT {
+            description "GNMI client cert list";
 
+            list GNMI_CLIENT_CERT_LIST {
+                max-elements 8;
+                key "cert_cname";
+
+                leaf cert_cname {
+                    type string;
+                    description
+                        "client cert common name";
+                }
+
+                leaf role {
+                    type string;
+                    mandatory true;
+                    description
+                        "role of client cert common name";
+                }
+            }
         }
     }
 }

From f9ec341492a846acb8ee802eb5cd28dcd014c1e0 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Thu, 22 Aug 2024 16:42:44 +0800
Subject: [PATCH 0919/1115] [submodule] Update submodule sonic-utilities to the
 latest HEAD automatically (#19971)

#### Why I did it
src/sonic-utilities
```
* 9a3f359e - (HEAD -> master, origin/master, origin/HEAD) Add timeout for rexec's get_password (#3484) (29 hours ago) [Changrong Wu]
* 4372ced5 - Add lock to config reload/load_minigraph (#3475) (2 days ago) [Longxiang Lyu]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-utilities | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-utilities b/src/sonic-utilities
index 1c4300f30..9a3f359ee 160000
--- a/src/sonic-utilities
+++ b/src/sonic-utilities
@@ -1 +1 @@
-Subproject commit 1c4300f309be95d3b182a490032b3af2de95a89b
+Subproject commit 9a3f359ee8bd4034b191506eb3a6dd203734cbfe

From a3416200b821f5b02218d865b8061b885aa0ba34 Mon Sep 17 00:00:00 2001
From: Sai Kiran <110003254+opcoder0@users.noreply.github.com>
Date: Fri, 23 Aug 2024 11:56:15 +1000
Subject: [PATCH 0920/1115] [docker-ptf] create symlinks for py3-only image
 (#19813)

Why I did it
The mix of docker-ptf with Python 2 + Python 3 (in virtual-env) and Python 3 images only across branches (with possibly some test scripts in sonic-mgmt not migrated to Python 3 in older branches) causes different path references to Python and PTF binaries. This can cause backporting a hassle. To prevent this the PR creates virtual environment (/root/env-python3) path to the real python 3 and PTF binaries. This keeps the paths same across docker-ptf images.

How I did it
Created symlinks for python and PTF from /root/env-python3/bin to /usr/bin.

How to verify it
Image built successfully and manually verified the existence of the links.
---
 dockers/docker-ptf/Dockerfile.j2 | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/dockers/docker-ptf/Dockerfile.j2 b/dockers/docker-ptf/Dockerfile.j2
index 45aaec8ec..d19c14418 100644
--- a/dockers/docker-ptf/Dockerfile.j2
+++ b/dockers/docker-ptf/Dockerfile.j2
@@ -18,6 +18,7 @@ LABEL maintainer="Pavel Shirshov"
 
 COPY ["sources.list.{{ CONFIGURED_ARCH }}", "/etc/apt/sources.list"]
 COPY ["no-check-valid-until", "/etc/apt/apt.conf.d"]
+COPY ["apt-retries-count", "/etc/apt/apt.conf.d"]
 
 ## Make apt-get non-interactive
 ENV DEBIAN_FRONTEND=noninteractive
@@ -266,6 +267,18 @@ RUN dpkg -i \
 debs/{{ deb }}{{' '}}
 {%- endfor %}
 
+{% if PTF_ENV_PY_VER == "py3" %}
+# Create symlink so that test scripts and ptf_runner invocation path
+# is same across python 2 and python 3 envs. Note that for virtual-env 
+# ptf is under /root/env-python3/bin. 
+# TODO - cleanup when the supported PTF image is py3only across all branches
+RUN mkdir -p /root/env-python3/bin \
+    && ln -s /usr/local/bin/ptf /usr/bin/ptf \
+    && ln -s /usr/bin/python /root/env-python3/bin/python3 \
+    && ln -s /usr/bin/python /root/env-python3/bin/python \
+    && ln -s /usr/local/bin/ptf /root/env-python3/bin/ptf
+{% endif %}
+
 COPY ["*.ini", "/etc/ptf/"]
 EXPOSE 22 8009
 

From 4913faba20902647956b5b6835a7490f07180b05 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Fri, 23 Aug 2024 19:05:47 +0800
Subject: [PATCH 0921/1115] [submodule] Update submodule sonic-utilities to the
 latest HEAD automatically (#19990)

#### Why I did it
src/sonic-utilities
```
* e4df80a5 - (HEAD -> master, origin/master, origin/HEAD) Fix multi-asic behaviour for ecnconfig (#3062) (23 hours ago) [bktsim]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-utilities | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-utilities b/src/sonic-utilities
index 9a3f359ee..e4df80a5c 160000
--- a/src/sonic-utilities
+++ b/src/sonic-utilities
@@ -1 +1 @@
-Subproject commit 9a3f359ee8bd4034b191506eb3a6dd203734cbfe
+Subproject commit e4df80a5c89c570dfe6580d91ac25c99e425c02d

From 10f0fe8d8c22f41ae24a264a6e0298864c8eb755 Mon Sep 17 00:00:00 2001
From: bhaveshdell <55215495+bhaveshdell@users.noreply.github.com>
Date: Fri, 23 Aug 2024 15:18:07 -0700
Subject: [PATCH 0922/1115] Event  and alarm management (#17949)

* Support for event persistence in redis-db.

* Updates

* Updates including fix to  eventdb in test enviroment.

* Add sonic yang to model event and alarm table.
remove ack, noack from sonic-common-event yang.

* Add event/alarm  persistence related testscases

* Remove file eventdb_ut.cpp.

* Updates to eventdb testsuite.

* Revert changes to existing eventd UT.
Set eventdb testcases as separate test binary.
Skip testcase execution if DB connection failure.

* Commit test related config files.
---
 .../docker-database/database_config.json.j2   |   6 +
 dockers/docker-eventd/supervisord.conf        |  10 +
 files/build_templates/docker_image_ctl.j2     |  13 +-
 src/sonic-eventd/Makefile                     |  17 +-
 src/sonic-eventd/debian/sonic-eventd.install  |   3 +
 src/sonic-eventd/etc/eventd.json              |   5 +
 src/sonic-eventd/src/eventconsume.cpp         | 662 ++++++++++++++++++
 src/sonic-eventd/src/eventconsume.h           |  54 ++
 src/sonic-eventd/src/eventdb.cpp              |  30 +
 src/sonic-eventd/src/eventutils.cpp           |  76 ++
 src/sonic-eventd/src/eventutils.h             |  43 ++
 src/sonic-eventd/src/loghandler.cpp           |  37 +
 src/sonic-eventd/src/loghandler.h             |   5 +
 src/sonic-eventd/src/subdir.mk                |   6 +-
 src/sonic-eventd/tests/default.json           |  24 +
 src/sonic-eventd/tests/eventd.json            |   5 +
 .../tests/eventdb_database_config.json        | 107 +++
 .../tests/eventdb_database_config_global.json |   8 +
 src/sonic-eventd/tests/eventdb_ut.cpp         | 434 ++++++++++++
 src/sonic-eventd/tests/subdir.mk              |   7 +-
 src/sonic-eventd/var/evprofile/default.json   |   7 +
 .../yang-models/sonic-alarm.yang              | 142 ++++
 .../yang-models/sonic-event.yang              | 134 ++++
 .../yang-models/sonic-events-common.yang      |  41 ++
 24 files changed, 1866 insertions(+), 10 deletions(-)
 create mode 100644 src/sonic-eventd/etc/eventd.json
 create mode 100644 src/sonic-eventd/src/eventconsume.cpp
 create mode 100644 src/sonic-eventd/src/eventconsume.h
 create mode 100644 src/sonic-eventd/src/eventdb.cpp
 create mode 100644 src/sonic-eventd/src/eventutils.cpp
 create mode 100644 src/sonic-eventd/src/eventutils.h
 create mode 100755 src/sonic-eventd/src/loghandler.cpp
 create mode 100644 src/sonic-eventd/src/loghandler.h
 create mode 100755 src/sonic-eventd/tests/default.json
 create mode 100755 src/sonic-eventd/tests/eventd.json
 create mode 100644 src/sonic-eventd/tests/eventdb_database_config.json
 create mode 100644 src/sonic-eventd/tests/eventdb_database_config_global.json
 create mode 100644 src/sonic-eventd/tests/eventdb_ut.cpp
 create mode 100644 src/sonic-eventd/var/evprofile/default.json
 create mode 100644 src/sonic-yang-models/yang-models/sonic-alarm.yang
 create mode 100644 src/sonic-yang-models/yang-models/sonic-event.yang

diff --git a/dockers/docker-database/database_config.json.j2 b/dockers/docker-database/database_config.json.j2
index 65db6cb72..0e772cc06 100644
--- a/dockers/docker-database/database_config.json.j2
+++ b/dockers/docker-database/database_config.json.j2
@@ -130,6 +130,12 @@
             "instance" : {% if include_remote_db %} "remote_redis" {% else %} "redis" {% endif %}
         }
 {% endif %}
+        ,
+        "EVENT_DB" : {
+            "id" : 19,
+            "separator": "|",
+            "instance" : "redis"
+        }
     },
     "VERSION" : "1.0"
 }
diff --git a/dockers/docker-eventd/supervisord.conf b/dockers/docker-eventd/supervisord.conf
index be51f922c..ef8411545 100644
--- a/dockers/docker-eventd/supervisord.conf
+++ b/dockers/docker-eventd/supervisord.conf
@@ -50,3 +50,13 @@ stderr_logfile=syslog
 dependent_startup=true
 dependent_startup_wait_for=start:exited
 
+[program:eventdb]
+command=/usr/bin/eventdb
+priority=3
+autostart=false
+autorestart=false
+stdout_logfile=syslog
+stderr_logfile=syslog
+dependent_startup=true
+dependent_startup_wait_for=start:exited
+
diff --git a/files/build_templates/docker_image_ctl.j2 b/files/build_templates/docker_image_ctl.j2
index 7e64845c8..56e5dc913 100644
--- a/files/build_templates/docker_image_ctl.j2
+++ b/files/build_templates/docker_image_ctl.j2
@@ -91,9 +91,16 @@ function preStartAction()
             # Load redis content from /host/warmboot/dump.rdb
             docker cp $WARM_DIR/dump.rdb database$DEV:/var/lib/redis/dump.rdb
         else
-            # Create an emtpy file and overwrite any RDB if already there
-            echo -n > /tmp/dump.rdb
-            docker cp /tmp/dump.rdb database$DEV:/var/lib/redis/
+            COLD_DIR=/host/coldboot
+            #In case of cold reboot, load redis content from /host/coldboot/dump.rdb
+            if [[ -f $COLD_DIR/dump.rdb ]]; then
+                #Load redis content from /host/coldboot/dump.rdb
+                docker cp $COLD_DIR/dump.rdb database$DEV:/var/lib/redis/dump.rdb
+            else   
+                # Create an emtpy file and overwrite any RDB if already there
+                echo -n > /tmp/dump.rdb
+                docker cp /tmp/dump.rdb database$DEV:/var/lib/redis/
+            fi        
         fi
     fi
 {%- elif docker_container_name == "pde" %}
diff --git a/src/sonic-eventd/Makefile b/src/sonic-eventd/Makefile
index 835d0732a..73adf10ca 100644
--- a/src/sonic-eventd/Makefile
+++ b/src/sonic-eventd/Makefile
@@ -1,12 +1,16 @@
 RM := rm -rf
 EVENTD_TARGET := eventd
 EVENTD_TEST := tests/tests
+EVENTDB_TEST := tests/eventdb
 EVENTD_TOOL := tools/events_tool
 EVENTD_PUBLISH_TOOL := tools/events_publish_tool.py
 RSYSLOG-PLUGIN_TARGET := rsyslog_plugin/rsyslog_plugin
 RSYSLOG-PLUGIN_TEST := rsyslog_plugin_tests/tests
 EVENTD_MONIT := tools/events_monit_test.py
 EVENTD_MONIT_CONF := tools/monit_events
+EVENTDB_TARGET := eventdb
+EVENTDB_DEFAULT_PROFILE := var/evprofile/default.json
+EVENTDB_PROF := etc/eventd.json
 
 CP := cp
 MKDIR := mkdir
@@ -19,7 +23,7 @@ PWD := $(shell pwd)
 
 ifneq ($(MAKECMDGOALS),clean)
 ifneq ($(strip $(C_DEPS)),)
--include $(C_DEPS) $(OBJS)
+-include $(C_DEPS) $(OBJS) $(EVENTDB_OBJS)
 endif
 endif
 
@@ -31,10 +35,11 @@ endif
 
 all: sonic-eventd eventd-tests eventd-tool rsyslog-plugin rsyslog-plugin-tests
 
-sonic-eventd: $(OBJS)
+sonic-eventd: $(OBJS) $(EVENTDB_OBJS)
 	@echo 'Building target: $@'
 	@echo 'Invoking: G++ Linker'
 	$(CC) $(LDFLAGS) -o $(EVENTD_TARGET) $(OBJS) $(LIBS)
+	$(CC) $(LDFLAGS) -o $(EVENTDB_TARGET) $(EVENTDB_OBJS) $(LIBS)
 	@echo 'Finished building target: $@'
 	@echo ' '
 
@@ -52,12 +57,14 @@ rsyslog-plugin: $(RSYSLOG-PLUGIN_OBJS)
 	@echo 'Finished building target: $@'
 	@echo ' '
 
-eventd-tests: $(TEST_OBJS)
+eventd-tests: $(TEST_OBJS) $(EVENTDB_TEST_OBJS)
 	@echo 'Building target: $@'
 	@echo 'Invoking: G++ Linker'
 	$(CC) $(LDFLAGS) -o $(EVENTD_TEST) $(TEST_OBJS) $(LIBS) $(TEST_LIBS)
+	$(CC) $(LDFLAGS) -o $(EVENTDB_TEST) $(EVENTDB_TEST_OBJS) $(LIBS) $(TEST_LIBS)
 	@echo 'Finished building target: $@'
 	$(EVENTD_TEST)
+	$(EVENTDB_TEST)
 	@echo 'Finished running tests'
 	@echo ' '
 
@@ -73,12 +80,16 @@ rsyslog-plugin-tests: $(RSYSLOG-PLUGIN-TEST_OBJS)
 install:
 	$(MKDIR) -p $(DESTDIR)/usr/bin
 	$(MKDIR) -p $(DESTDIR)/etc/monit/conf.d
+	$(MKDIR) -p $(DESTDIR)/etc/evprofile
 	$(CP) $(EVENTD_TARGET) $(DESTDIR)/usr/bin
 	$(CP) $(EVENTD_TOOL) $(DESTDIR)/usr/bin
 	$(CP) $(EVENTD_PUBLISH_TOOL) $(DESTDIR)/usr/bin
 	$(CP) $(RSYSLOG-PLUGIN_TARGET) $(DESTDIR)/usr/bin
 	$(CP) $(EVENTD_MONIT) $(DESTDIR)/usr/bin
 	$(CP) $(EVENTD_MONIT_CONF) $(DESTDIR)/etc/monit/conf.d
+	$(CP) $(EVENTDB_TARGET) $(DESTDIR)/usr/bin
+	$(CP) $(EVENTDB_PROF) $(DESTDIR)/etc/eventd.json
+	$(CP) $(EVENTDB_DEFAULT_PROFILE) $(DESTDIR)/etc/evprofile/default.json
 
 deinstall:
 	$(RM) -rf $(DESTDIR)/usr
diff --git a/src/sonic-eventd/debian/sonic-eventd.install b/src/sonic-eventd/debian/sonic-eventd.install
index bdba566c7..273b07adf 100644
--- a/src/sonic-eventd/debian/sonic-eventd.install
+++ b/src/sonic-eventd/debian/sonic-eventd.install
@@ -1,3 +1,6 @@
 usr/bin/eventd
+usr/bin/eventdb
 usr/bin/events_tool
 usr/bin/events_publish_tool.py
+etc/evprofile/default.json
+etc/eventd.json
diff --git a/src/sonic-eventd/etc/eventd.json b/src/sonic-eventd/etc/eventd.json
new file mode 100644
index 000000000..ee441eb32
--- /dev/null
+++ b/src/sonic-eventd/etc/eventd.json
@@ -0,0 +1,5 @@
+{
+    "__README__": "Specify size of event history table. Whichever limit is hit first, eventd wraps event history table around and deletes older records.",
+    "max-records": 40000,
+    "max-days": 30
+}
diff --git a/src/sonic-eventd/src/eventconsume.cpp b/src/sonic-eventd/src/eventconsume.cpp
new file mode 100644
index 000000000..5ef249e27
--- /dev/null
+++ b/src/sonic-eventd/src/eventconsume.cpp
@@ -0,0 +1,662 @@
+
+#include <math.h>
+#include <syslog.h>
+#include <limits>
+#include <queue>
+#include <unistd.h>
+#include "eventconsume.h"
+#include "loghandler.h"
+#include "eventutils.h"
+#include "events_common.h"
+
+
+using namespace std::chrono;
+
+// map to store sequence-id for alarms
+unordered_map<string, uint64_t> cal_lookup_map;
+
+// temporary map to hold merge of default map of events and any event profile
+EventMap static_event_table;
+
+bool g_run = true;
+uint64_t seq_id = 0;
+uint64_t PURGE_SECONDS = 86400;
+
+typedef pair<uint64_t, uint64_t> pi;
+priority_queue<pi, vector<pi>, greater<pi> > event_history_list;
+
+map<string, int> SYSLOG_SEVERITY = {
+    {EVENT_SEVERITY_CRITICAL_STR,      LOG_ALERT},
+    {EVENT_SEVERITY_MAJOR_STR,         LOG_CRIT},
+    {EVENT_SEVERITY_MINOR_STR,         LOG_ERR},
+    {EVENT_SEVERITY_WARNING_STR,       LOG_WARNING},
+    {EVENT_SEVERITY_INFORMATIONAL_STR, LOG_NOTICE}
+};
+
+map <int, string> SYSLOG_SEVERITY_STR = {
+    {LOG_ALERT   , EVENT_SEVERITY_CRITICAL_STR},
+    {LOG_CRIT    , EVENT_SEVERITY_MAJOR_STR},
+    {LOG_ERR     , EVENT_SEVERITY_MINOR_STR},
+    {LOG_WARNING , EVENT_SEVERITY_WARNING_STR},
+    {LOG_NOTICE  , EVENT_SEVERITY_INFORMATIONAL_STR}
+};
+
+static string flood_ev_id;
+static string flood_ev_action;
+static string flood_ev_resource;
+static string flood_ev_msg;
+
+EventConsume::EventConsume(DBConnector* dbConn,
+                           string evProfile,
+                           string dbProfile):
+    m_eventTable(dbConn, EVENT_HISTORY_TABLE_NAME),
+    m_alarmTable(dbConn, EVENT_CURRENT_ALARM_TABLE_NAME),
+    m_eventStatsTable(dbConn, EVENT_STATS_TABLE_NAME),
+    m_alarmStatsTable(dbConn, EVENT_ALARM_STATS_TABLE_NAME),
+    m_evProfile(evProfile),
+    m_dbProfile(dbProfile) {
+
+    // open syslog connection
+    openSyslog();
+
+    // init stats
+    initStats();
+
+    // populate local queue of event histor table
+    read_events();
+
+    // read and apply eventd configuration files 
+    // read eventd.json and apply it on history table. 
+    // read default and custom profiles, build static_event_table
+    read_eventd_config();
+
+    SWSS_LOG_NOTICE("DONE WITH EventConsume constructor");
+}
+
+EventConsume::~EventConsume() {
+}
+
+void EventConsume::run()
+{
+
+    SWSS_LOG_ENTER();
+    event_handle_t hsub;
+    hsub = events_init_subscriber();
+    
+    while (g_run) {
+        event_receive_op_t evt;
+        map_str_str_t evtOp;
+        int rc = event_receive(hsub, evt); 
+        if (rc != 0) {
+            SWSS_LOG_ERROR("Failed to receive rc=%d", rc);
+             continue;
+        }
+        handle_notification(evt);
+    }
+    events_deinit_subscriber(hsub);
+}
+
+void EventConsume::read_eventd_config(bool read_all) {
+    // read manifest file for config options
+    if (read_all) {
+        read_config_and_purge();
+    }
+
+    // read from default map
+    static_event_table.clear();
+    if (!parse(m_evProfile.c_str(), static_event_table)) {
+        SWSS_LOG_ERROR("Can not initialize event map");
+        closeSyslog();
+        exit(0);
+    }
+
+    SWSS_LOG_NOTICE("Event map is built as follows:");
+    for (auto& x: static_event_table) {
+        SWSS_LOG_NOTICE("    %s (%s %s %s)", x.first.c_str(), x.second.severity.c_str(), x.second.enable.c_str(), x.second.static_event_msg.c_str());
+    }
+}
+
+
+void EventConsume::handle_notification(const event_receive_op_t& evt)
+{
+    SWSS_LOG_ENTER();
+
+    string ev_id, ev_msg, ev_src, ev_act, ev_timestamp, ev_type("EVENT"),
+           ev_static_msg(""), ev_reckey;
+    string ev_sev = string(EVENT_SEVERITY_INFORMATIONAL_STR);
+    bool is_raise = false;
+    bool is_clear = false;
+    bool is_ack = false;
+    vector<FieldValueTuple> vec;
+
+    fetchFieldValues(evt, vec, ev_id, ev_msg, ev_src, ev_act, ev_timestamp);
+
+    // flood protection. If a rogue application sends same event repeatedly, throttle repeated instances of that event
+    if (isFloodedEvent(ev_src, ev_act, ev_id, ev_msg)) {
+        return;
+    }
+
+    // get static info
+    if (!staticInfoExists(ev_id, ev_act, ev_sev, ev_static_msg, vec)) {
+        return;
+    }
+
+    // increment save seq-id for the newly received event
+    uint64_t new_seq_id = seq_id + 1;
+
+    FieldValueTuple seqfv("id", to_string(new_seq_id));
+    vec.push_back(seqfv);
+
+    if (ev_act.length() > 0) {
+        SWSS_LOG_DEBUG("ev_act %s", ev_act.c_str());
+        ev_type = "ALARM";
+        string almkey = ev_id;
+        if (!ev_src.empty()) {
+            almkey += "|" + ev_src;
+        }
+
+        if (ev_act.compare(EVENT_ACTION_RAISE_STR) == 0) {
+            is_raise = true;
+            // add entry to the lookup map
+            cal_lookup_map.insert(make_pair(almkey, new_seq_id));
+
+            // add acknowledged field intializing it to false
+            FieldValueTuple seqfv1("acknowledged", "false");
+            vec.push_back(seqfv1);
+            m_alarmTable.set(to_string(new_seq_id), vec);
+
+            // update alarm counters
+            updateAlarmStatistics(ev_sev, ev_act);
+        } else if (ev_act.compare(EVENT_ACTION_CLEAR_STR) == 0) {
+            is_clear = true;
+            SWSS_LOG_DEBUG(" Received clear alarm for %s", almkey.c_str());
+
+            bool ack_flag = false;
+            // remove entry from local cache, alarm table
+            if (!udpateLocalCacheAndAlarmTable(almkey, ack_flag)) {
+                SWSS_LOG_ERROR("Received clear for non-existent alarm %s", almkey.c_str());
+                return;
+            }
+
+            // update alarm counters ONLY if it has not been ack'd before.
+            // This is because when alarm is ack'd, alarms/severity counter is reduced already.
+            if (!ack_flag) {
+                updateAlarmStatistics(ev_sev, ev_act);
+            } else {
+                // if it has been ack'd before, ack counter would have been incremented for this alrm.
+                // Now is the time reduce it.
+                clearAckAlarmStatistic();
+            }
+        } else {
+            // ack/unack events comes with seq-id of raised alarm as resource field.
+            // fetch details of "raised" alarm record
+            string raise_act;
+            string raise_ack_flag;
+            string raise_ts;
+
+            // fetch information from raised event record
+            if (!fetchRaiseInfo(vec, ev_src, ev_id, ev_sev, raise_act, raise_ack_flag, raise_ts))
+            {
+                SWSS_LOG_ERROR("Action %s on a non-existent Alarm id %s", ev_act.c_str(), ev_src.c_str());
+                return;
+            }
+
+            if (ev_act.compare(EVENT_ACTION_ACK_STR) == 0) {
+                if (raise_ack_flag.compare("true") == 0) {
+                    SWSS_LOG_INFO("%s/%s is already acknowledged", ev_id.c_str(), ev_src.c_str());
+                    return;
+                }
+                if (raise_act.compare(EVENT_ACTION_RAISE_STR) == 0) {
+                    is_ack = true;
+                    SWSS_LOG_DEBUG("Received acknowledge event - %s/%s", ev_id.c_str(), ev_src.c_str());
+
+                    // update the record with ack flag and ack-time and stats
+                    updateAckInfo(is_ack, ev_timestamp, ev_sev, ev_act, ev_src);
+                } else {
+                    SWSS_LOG_ERROR("Alarm %s/%s not in RAISE state", ev_id.c_str(), ev_src.c_str());
+                    return;
+                }
+            } else if (ev_act.compare(EVENT_ACTION_UNACK_STR) == 0) {
+                if (raise_ack_flag.compare("true") == 0) {
+                    SWSS_LOG_DEBUG(" received un-ACKnowledge event - %s/%s", ev_id.c_str(), ev_src.c_str());
+
+                    // update the record with ack flag and ack-time and stats
+                    updateAckInfo(is_ack, ev_timestamp, ev_sev, ev_act, ev_src);
+                } else {
+                    SWSS_LOG_INFO(" %s/%s is already un-acknowledged", ev_id.c_str(), ev_src.c_str());
+                    return;
+                }
+            }
+        }
+    }
+    // verify the size of history table; delete older entry; add new entry
+    seq_id = new_seq_id;
+    update_events(to_string(seq_id), ev_timestamp, vec);
+
+    updateEventStatistics(true, is_raise, is_ack, is_clear);
+
+    // raise a syslog message
+    writeToSyslog(ev_id, (int)(SYSLOG_SEVERITY.find(ev_sev)->second), ev_type, ev_act, ev_msg, ev_static_msg);
+
+    return;
+}
+
+void EventConsume::read_events() {
+    vector<KeyOpFieldsValuesTuple> tuples;
+    m_eventTable.getContent(tuples);
+
+    SWSS_LOG_ENTER();
+    // find out last sequence-id; build local history list
+    for (auto tuple: tuples) {
+        for (auto fv: kfvFieldsValues(tuple)) {
+            if (fvField(fv) == "time-created") {
+                char* end;
+                uint64_t seq = strtoull(kfvKey(tuple).c_str(), &end,10);
+                if (seq > seq_id) {
+                    seq_id = seq;
+                }
+                uint64_t val = strtoull(fvValue(fv).c_str(), &end,10);
+                event_history_list.push(make_pair( seq, val ));
+            }
+        }
+    }
+    SWSS_LOG_NOTICE("eventd sequence-id intialized to %lu", seq_id);
+}
+
+void EventConsume::updateAlarmStatistics(string ev_sev, string ev_act) {
+    vector<FieldValueTuple> vec;
+    vector<FieldValueTuple> temp;
+
+    // severity counter names are of lower case
+    transform(ev_sev.begin(), ev_sev.end(), ev_sev.begin(), ::tolower);
+
+    if (m_alarmStatsTable.get("state", vec)) {
+        for (auto fv: vec) {
+            if (!fv.first.compare("alarms")) {
+                if ((ev_act.compare(EVENT_ACTION_RAISE_STR) == 0) || (ev_act.compare(EVENT_ACTION_UNACK_STR) == 0)) {
+                    fv.second = to_string(stoi(fv.second.c_str())+1);
+                } else {
+                    fv.second = to_string(stoi(fv.second.c_str())-1);
+                }
+                temp.push_back(fv);
+            } else if (!fv.first.compare(ev_sev)) {
+                if ((ev_act.compare(EVENT_ACTION_RAISE_STR) == 0) || (ev_act.compare(EVENT_ACTION_UNACK_STR) == 0)) {
+                    fv.second = to_string(stoi(fv.second.c_str())+1);
+                } else {
+                    fv.second = to_string(stoi(fv.second.c_str())-1);
+                }
+                temp.push_back(fv);
+            } else if (!fv.first.compare("acknowledged")) {
+                if (ev_act.compare(EVENT_ACTION_ACK_STR) == 0)  {
+                    fv.second = to_string(stoi(fv.second.c_str())+1);
+                } else if (ev_act.compare(EVENT_ACTION_UNACK_STR) == 0) { 
+                    fv.second = to_string(stoi(fv.second.c_str())-1);
+                }
+                temp.push_back(fv);
+            }
+        }
+        m_alarmStatsTable.set("state", temp);
+    } else {
+        SWSS_LOG_ERROR("Can not update alarm statistics (table does not exist)");
+    }
+}
+
+void EventConsume::updateEventStatistics(bool is_add, bool is_raise, bool is_ack, bool is_clear) {
+    vector<FieldValueTuple> vec;
+    vector<FieldValueTuple> temp;
+
+    if (m_eventStatsTable.get("state", vec)) {
+        for (auto fv: vec) {
+            if (!fv.first.compare("events")) {
+                if (is_add) {
+                    fv.second = to_string(stoi(fv.second.c_str())+1);
+                } else {
+                    fv.second = to_string(stoi(fv.second.c_str())-1);
+                }
+                temp.push_back(fv);
+            } else if (!fv.first.compare("raised")) {
+                if (is_raise) {
+                    if (is_add) {
+                        fv.second = to_string(stoi(fv.second.c_str())+1);
+                    } else {
+                        fv.second = to_string(stoi(fv.second.c_str())-1);
+                    }
+                    temp.push_back(fv);
+                }
+            } else if (!fv.first.compare("cleared")) {
+                if (is_clear) {
+                    if (is_add) {
+                        fv.second = to_string(stoi(fv.second.c_str())+1);
+                    } else {
+                        fv.second = to_string(stoi(fv.second.c_str())-1);
+                    }
+                    temp.push_back(fv);
+                }
+            } else if (!fv.first.compare("acked")) {
+                if (is_ack) {
+                    if (is_add) {
+                        fv.second = to_string(stoi(fv.second.c_str())+1);
+                    } else {
+                        fv.second = to_string(stoi(fv.second.c_str())-1);
+                    }
+                    temp.push_back(fv);
+                }
+            }
+        }
+
+        m_eventStatsTable.set("state", temp);
+    } else {
+        SWSS_LOG_ERROR("Can not update event statistics (table does not exist)");
+    }
+}
+
+void EventConsume::modifyEventStats(string seq_id) { 
+    vector<FieldValueTuple> rec;
+    m_eventTable.get(seq_id, rec);
+    bool is_raise = false;
+    bool is_clear = false;
+    bool is_ack = false;
+    for (auto fvr: rec) {
+        if (!fvr.first.compare("action")) {
+            if (!fvr.second.compare(EVENT_ACTION_RAISE_STR)) {
+                is_raise = true;
+            } else if (!fvr.second.compare(EVENT_ACTION_CLEAR_STR)) {
+                is_clear = true;
+            }
+        }
+        if (!fvr.first.compare("acknowledged")) {
+            if (!fvr.second.compare("true")) {
+                is_ack = true;
+            }
+        }
+    }
+    updateEventStatistics(false, is_raise, is_ack, is_clear);
+}
+
+void EventConsume::purge_events() {
+    SWSS_LOG_ENTER();
+    uint32_t size = event_history_list.size();
+
+    while (size >= m_count) {
+        pair <uint64_t,uint64_t> oldest_entry = event_history_list.top();
+        SWSS_LOG_NOTICE("Rollover based on count(%d/%d). Deleting %lu", size, m_count, oldest_entry.first);
+        m_eventTable.del(to_string(oldest_entry.first));
+        modifyEventStats(to_string(oldest_entry.first));
+        event_history_list.pop();
+        --size;
+    }
+
+    const auto p1 = system_clock::now();
+    unsigned tnow_seconds = duration_cast<seconds>(p1.time_since_epoch()).count();
+
+    while (!event_history_list.empty()) {
+        pair <uint64_t,uint64_t> oldest_entry = event_history_list.top();
+	    unsigned old_seconds = oldest_entry.second / 1000000000ULL;
+
+        if ((tnow_seconds - old_seconds) > PURGE_SECONDS) {
+            SWSS_LOG_NOTICE("Rollover based on time (%lu days). Deleting %lu.. now %u old %u", (PURGE_SECONDS/m_days), oldest_entry.second, tnow_seconds, old_seconds);
+            m_eventTable.del(to_string(oldest_entry.first));
+            modifyEventStats(to_string(oldest_entry.first));
+            event_history_list.pop();
+        } else {
+            return;
+        }
+    }
+    return;
+}
+
+void EventConsume::read_config_and_purge() {
+    m_days = 0;
+    m_count = 0;
+    // read from the manifest file
+    parse_config(m_dbProfile.c_str(), m_days, m_count);
+    SWSS_LOG_NOTICE("max-days %d max-records %d", m_days, m_count);
+
+    // update the nanosecond limit
+    PURGE_SECONDS *= m_days; 
+
+    // purge events based on # of days
+    purge_events();
+}
+
+void EventConsume::update_events(string seq_id, string ts, vector<FieldValueTuple> vec) {
+    // purge events based on # of days
+    purge_events();
+
+    // now add the event to the event table
+    m_eventTable.set(seq_id, vec);
+
+    // store it into the event history list
+    char* end;
+    uint64_t seq = strtoull(seq_id.c_str(), &end, 10);
+    uint64_t val = strtoull(ts.c_str(), &end, 10);
+    event_history_list.push(make_pair( seq, val ));
+}
+
+void EventConsume::resetAlarmStats(int alarms, int critical, int major, int minor, int warning, int acknowledged) {
+    vector<FieldValueTuple> temp;
+    FieldValueTuple fv;
+    map<int, string>::iterator it;
+    for (it = SYSLOG_SEVERITY_STR.begin(); it != SYSLOG_SEVERITY_STR.end(); it++) {
+        // there wont be any informational alarms
+        if (it->second.compare(EVENT_SEVERITY_CRITICAL_STR) == 0) {
+            fv = FieldValueTuple("critical", to_string(critical));
+            temp.push_back(fv);
+        } else if (it->second.compare(EVENT_SEVERITY_MAJOR_STR) == 0) {
+            fv = FieldValueTuple("major", to_string(major));
+            temp.push_back(fv);
+        } else if (it->second.compare(EVENT_SEVERITY_MINOR_STR) == 0) {
+            fv = FieldValueTuple("minor", to_string(minor));
+            temp.push_back(fv);
+        } else if (it->second.compare(EVENT_SEVERITY_WARNING_STR) == 0) {
+            fv = FieldValueTuple("warning", to_string(warning));
+            temp.push_back(fv);
+        }
+    }
+    fv = FieldValueTuple("alarms", to_string(alarms));
+    temp.push_back(fv);
+    fv = FieldValueTuple("acknowledged", to_string(acknowledged));
+    temp.push_back(fv);
+    m_alarmStatsTable.set("state", temp);
+}
+
+void EventConsume::clearAckAlarmStatistic() {
+    vector<FieldValueTuple> vec;
+    vector<FieldValueTuple> temp;
+
+    if (m_alarmStatsTable.get("state", vec)) {
+        for (auto fv: vec) {
+            if (!fv.first.compare("acknowledged")) {
+                fv.second = to_string(stoi(fv.second.c_str())-1);
+                temp.push_back(fv);
+                m_alarmStatsTable.set("state", temp);
+		return;
+            }
+        }
+    } 
+}
+
+
+void EventConsume::fetchFieldValues(const event_receive_op_t& evt, 
+                                    vector<FieldValueTuple>& vec, 
+                                    string& ev_id, 
+                                    string& ev_msg, 
+                                    string& ev_src, 
+                                    string& ev_act, 
+                                    string &ev_timestamp) {
+
+    ev_timestamp = to_string(evt.publish_epoch_ms);                          
+    vec.push_back(FieldValueTuple("time-created", ev_timestamp));
+    for (const auto& idx : evt.params) {
+        if (idx.first == "type-id") {
+            ev_id = idx.second;
+            vec.push_back(FieldValueTuple("type-id", ev_id));
+            SWSS_LOG_DEBUG("type-id: <%s> ", ev_id.c_str());
+        } else if (idx.first == "text") {
+            ev_msg = idx.second;
+            vec.push_back(FieldValueTuple("text", ev_msg));
+            SWSS_LOG_DEBUG("text: <%s> ", ev_msg.c_str());
+        } else if (idx.first == "resource") {
+            ev_src = idx.second;
+            vec.push_back(idx);
+            SWSS_LOG_DEBUG("resource: <%s> ", ev_src.c_str());
+        } else if (idx.first == "action") {
+            ev_act = idx.second;
+            // for events, action is empty
+            if (!ev_act.empty()) {
+                vec.push_back(FieldValueTuple("action", ev_act));
+            }
+        }
+    }
+}
+
+bool EventConsume::isFloodedEvent(string ev_src, string ev_act, string ev_id, string ev_msg) {
+    // flood protection. If a rogue application sends same event repeatedly, throttle repeated instances of that event
+    if (!flood_ev_resource.compare(ev_src) &&
+        !flood_ev_action.compare(ev_act) &&
+        !flood_ev_id.compare(ev_id) &&
+        !(flood_ev_msg.compare(ev_msg))) {
+            SWSS_LOG_INFO("Ignoring the event %s from %s action %s msg %s as it is repeated", ev_id.c_str(), ev_src.c_str(), ev_act.c_str(), ev_msg.c_str());
+            return true;
+    }
+
+    flood_ev_resource = ev_src;
+    flood_ev_action = ev_act;
+    flood_ev_id = ev_id;
+    flood_ev_msg = ev_msg;
+    return false;
+}
+
+bool EventConsume::staticInfoExists(string &ev_id, string &ev_act, string &ev_sev, string &ev_static_msg, vector<FieldValueTuple> &vec) {
+    auto it = static_event_table.find(ev_id);
+    if (it != static_event_table.end()) {
+        EventInfo tmp = (EventInfo) (it->second);
+        // discard the event as event_static_map shows enable is false for this event
+        if (tmp.enable == EVENT_ENABLE_FALSE_STR) {
+            SWSS_LOG_NOTICE("Discarding event <%s> as it is set to disabled", ev_id.c_str());
+            return false;;
+        }
+
+        // get severity in the map and store it in the db
+        ev_sev = tmp.severity;
+        ev_static_msg = tmp.static_event_msg;
+        SWSS_LOG_DEBUG("static info: <%s> <%s> ", tmp.severity.c_str(), tmp.static_event_msg.c_str());
+
+        FieldValueTuple seqfv1("severity", tmp.severity);
+        vec.push_back(seqfv1);
+        return true;
+    } else {
+        // dont process the incoming alarms if action is neither raise nor clear
+        // for ack/unack, no need for this check
+        if ((ev_act.compare(EVENT_ACTION_ACK_STR) && ev_act.compare(EVENT_ACTION_UNACK_STR))) {
+            // TODO currently, applications may raise events but default evprofile doesnt contain 
+            // ID info. This is planned for later. 
+            // Change it back to SWSS_LOG_ERROR once event profile contains event-ids
+            SWSS_LOG_DEBUG("static info NOT FOUND for <%s> ", ev_id.c_str());
+            return false;
+        }
+    }
+    return true;
+}
+
+bool EventConsume::udpateLocalCacheAndAlarmTable(string almkey, bool &ack_flag) {
+    // find and remove the raised alarm
+    uint64_t lookup_seq_id = 0;
+    auto it = cal_lookup_map.find(almkey);
+    if (it != cal_lookup_map.end()) {
+        lookup_seq_id = (uint64_t) (it->second);
+        cal_lookup_map.erase(almkey);
+
+        // get status of is_aknowledged flag so that we dont decrement counters twice
+        vector<FieldValueTuple> alm_rec;
+        m_alarmTable.get(to_string(lookup_seq_id), alm_rec);
+        for (auto fvr: alm_rec) {
+            if (!fvr.first.compare("acknowledged")) {
+                ack_flag = (fvr.second.compare("true") == 0) ? true : false;
+                break;
+            }
+        }
+
+        // delete the record from alarm table
+        m_alarmTable.del(to_string(lookup_seq_id));
+    } else {
+        // possible - when event profile removes alarms for which enable is false and application cleared them later.
+        // ignore by logging a debug message..
+        SWSS_LOG_INFO("Received alarm-clear for non-existing alarm %s", almkey.c_str());
+        return false;
+    }
+    return true;
+}
+
+void EventConsume::initStats() {
+    vector<FieldValueTuple> vec;
+    // possible after a cold-boot or very first time
+    if (! m_eventStatsTable.get("state", vec)) {
+        FieldValueTuple fv;
+        vector<FieldValueTuple> temp;
+
+        SWSS_LOG_DEBUG("resetting Event Statistics table");
+        fv = FieldValueTuple("events", to_string(0));
+        temp.push_back(fv);
+        fv = FieldValueTuple("raised", to_string(0));
+        temp.push_back(fv);
+        fv = FieldValueTuple("cleared", to_string(0));
+        temp.push_back(fv);
+        fv = FieldValueTuple("acked", to_string(0));
+        temp.push_back(fv);
+        m_eventStatsTable.set("state", temp);
+    }
+    if (! m_alarmStatsTable.get("state", vec)) {
+        SWSS_LOG_DEBUG("resetting Alarm Statistics table");
+        resetAlarmStats(0, 0, 0, 0, 0, 0);
+    }
+}
+
+void EventConsume::updateAckInfo(bool is_ack, string ev_timestamp, string ev_sev, string ev_act, string ev_src) {
+    vector<FieldValueTuple> ack_vec;
+
+    FieldValueTuple seqfv1("acknowledged", (is_ack ? "true" : "false"));
+    ack_vec.push_back(seqfv1);
+
+    FieldValueTuple seqfv2("acknowledge-time", ev_timestamp);
+    ack_vec.push_back(seqfv2);
+
+    // update alarm stats
+    updateAlarmStatistics(ev_sev, ev_act);
+
+    // update alarm/event tables for the "raise" record with ack flag and ack timestamp
+    // for ack/unack, ev_src contains the "seq-id"
+    m_alarmTable.set(ev_src, ack_vec);
+    m_eventTable.set(ev_src, ack_vec);
+}
+
+
+bool EventConsume::fetchRaiseInfo(vector<FieldValueTuple> &vec, string ev_src, string &ev_id, string &ev_sev, string &raise_act, 
+                                  string &raise_ack_flag, string &raise_ts) {
+    vector<FieldValueTuple> raise_vec;
+    if (!m_alarmTable.get(ev_src, raise_vec)) {
+        return false;
+    }
+    for (auto fv: raise_vec) {
+        if (!fv.first.compare("type-id")) {
+            ev_id = fv.second;
+            vec.push_back(fv);
+        }
+        if (!fv.first.compare("severity")) {
+            ev_sev = fv.second;
+            vec.push_back(fv);
+        }
+        if (!fv.first.compare("action")) {
+            raise_act = fv.second;
+        }
+        if (!fv.first.compare("acknowledged")) {
+            raise_ack_flag = fv.second;
+        }
+        if (!fv.first.compare("time-created")) {
+            raise_ts = fv.second;
+        }
+    }
+    return true;
+}
+
+
diff --git a/src/sonic-eventd/src/eventconsume.h b/src/sonic-eventd/src/eventconsume.h
new file mode 100644
index 000000000..36e75f7da
--- /dev/null
+++ b/src/sonic-eventd/src/eventconsume.h
@@ -0,0 +1,54 @@
+#ifndef __EVENTCONSUME_H__
+#define __EVENTCONSUME_H__
+
+#include <string>
+#include <map>
+#include "events.h"
+#include "eventutils.h"
+#include "dbconnector.h"
+#include "subscriberstatetable.h"
+
+using namespace swss;
+using namespace std;
+
+class EventConsume
+{
+public:
+    EventConsume(DBConnector *dbConn,
+                 string evProfile =EVENTD_DEFAULT_MAP_FILE,
+                 string dbProfile =EVENTD_CONF_FILE);
+    ~EventConsume();
+    void read_eventd_config(bool read_all=true);
+    void run();
+
+private:
+    Table m_eventTable;
+    Table m_alarmTable;
+    Table m_eventStatsTable;
+    Table m_alarmStatsTable;
+    u_int32_t m_days, m_count;
+    string m_evProfile;
+    string m_dbProfile;
+
+    void handle_notification(const event_receive_op_t& evt);
+    void read_events();
+    void updateAlarmStatistics(string ev_sev, string ev_act);
+    void updateEventStatistics(bool is_add, bool is_alarm, bool is_ack, bool is_clear);
+    void read_config_and_purge();
+    void update_events(string seq_id, string ts, vector<FieldValueTuple> vec);
+    void purge_events();
+    void modifyEventStats(string seq_id);
+    void clearAckAlarmStatistic();
+    void resetAlarmStats(int, int, int, int, int, int);
+    void fetchFieldValues(const event_receive_op_t& evt , vector<FieldValueTuple> &, string &, string &, string &, string &, string &);
+    bool isFloodedEvent(string, string, string, string);
+    bool staticInfoExists(string &, string &, string &, string &, vector<FieldValueTuple> &);
+    bool udpateLocalCacheAndAlarmTable(string, bool &);
+    void initStats();
+    void updateAckInfo(bool, string, string, string, string);
+    bool fetchRaiseInfo(vector<FieldValueTuple> &, string, string &, string &, string &, string &, string &);
+};
+
+
+#endif /* __EVENTCONSUME_H__ */
+
diff --git a/src/sonic-eventd/src/eventdb.cpp b/src/sonic-eventd/src/eventdb.cpp
new file mode 100644
index 000000000..9b162416b
--- /dev/null
+++ b/src/sonic-eventd/src/eventdb.cpp
@@ -0,0 +1,30 @@
+#include "eventconsume.h"
+#include <csignal>
+
+static EventConsume *evtd_instance = NULL;
+
+void signalHandler(const int signal) { 
+    SWSS_LOG_NOTICE("in signalHandler");
+
+    if (signal == SIGINT) {
+        evtd_instance->read_eventd_config();
+    }
+}
+
+int main()
+{
+    swss::Logger::getInstance().setMinPrio(swss::Logger::SWSS_DEBUG);
+
+    swss::DBConnector eventDb("EVENT_DB", 0);
+    
+    // register signal SIGINT and signal handler  
+    signal(SIGINT, signalHandler);
+
+    EventConsume evtd(&eventDb);
+    evtd_instance = &evtd;
+
+    evtd.run();
+
+    return 0;
+}
+
diff --git a/src/sonic-eventd/src/eventutils.cpp b/src/sonic-eventd/src/eventutils.cpp
new file mode 100644
index 000000000..0a977b447
--- /dev/null
+++ b/src/sonic-eventd/src/eventutils.cpp
@@ -0,0 +1,76 @@
+#include "eventutils.h"
+#include <swss/logger.h>
+#include <swss/table.h>
+#include <string.h>
+#include <cstdlib>
+#include <iostream>
+#include <fstream>
+#include <sstream>
+#include <vector>
+#include <unistd.h>
+#include <nlohmann/json.hpp>
+
+
+using namespace swss;
+using json = nlohmann::json;
+
+bool isValidSeverity(string severityStr) {
+    transform(severityStr.begin(), severityStr.end(), severityStr.begin(), ::toupper);
+    if (severityStr == EVENT_SEVERITY_MAJOR_STR) return true;
+    if (severityStr == EVENT_SEVERITY_CRITICAL_STR) return true;
+    if (severityStr == EVENT_SEVERITY_MINOR_STR) return true;
+    if (severityStr == EVENT_SEVERITY_WARNING_STR) return true;
+    if (severityStr == EVENT_SEVERITY_INFORMATIONAL_STR) return true;
+    return false;
+}
+
+bool isValidEnable(string enableStr) {
+    if (enableStr == EVENT_ENABLE_TRUE_STR) return true;
+    if (enableStr == EVENT_ENABLE_FALSE_STR) return true;
+    return false;
+}
+
+bool parse_config(const char *filename, unsigned int& days, unsigned int& count) {
+    days = EHT_MAX_DAYS;
+    count = EHT_MAX_ELEMS;
+    std::ifstream ifs(filename);
+    json j = json::parse(ifs);
+    for (json::iterator it = j.begin(); it != j.end(); ++it) {
+        if(it.key() == "max-days") {
+            days = it.value();
+        }
+        if(it.key() == "max-records") {
+            count = it.value();
+        }
+    }
+    return true;
+}
+
+bool parse(const char *filename, EventMap& tmp_event_table) {
+    ifstream fs(filename);
+    if (!fs.is_open()) {
+        return false;
+    }
+
+    fstream file(filename, fstream::in);
+    json j;
+    file >> j;
+
+    if (j["events"].size() == 0) {
+        SWSS_LOG_ERROR("No entries in 'events' field in %s", filename);
+        return false;
+    }
+
+    for (size_t i = 0; i < j["events"].size(); i++) {
+        auto elem = j["events"][i];
+        struct EventInfo_t ev_info;
+        string ev_name = elem["name"];
+        ev_info.severity = elem["severity"];
+        ev_info.enable = elem["enable"];
+        ev_info.static_event_msg = elem["message"];
+        tmp_event_table.emplace(ev_name, ev_info);
+    }
+
+    return true;
+}
+
diff --git a/src/sonic-eventd/src/eventutils.h b/src/sonic-eventd/src/eventutils.h
new file mode 100644
index 000000000..8ec6d3955
--- /dev/null
+++ b/src/sonic-eventd/src/eventutils.h
@@ -0,0 +1,43 @@
+#ifndef __EVENTUTILS_H__
+#define __EVENTUTILS_H__
+
+#include <string>
+#include <unordered_map>
+
+using namespace std;
+
+const string EVENT_SEVERITY_CRITICAL_STR = "CRITICAL";
+const string EVENT_SEVERITY_MAJOR_STR    = "MAJOR";
+const string EVENT_SEVERITY_MINOR_STR    = "MINOR";
+const string EVENT_SEVERITY_WARNING_STR  = "WARNING";
+const string EVENT_SEVERITY_INFORMATIONAL_STR = "INFORMATIONAL";
+
+const string EVENT_ENABLE_TRUE_STR  = "true";
+const string EVENT_ENABLE_FALSE_STR = "false";
+
+const string EVENT_ACTION_RAISE_STR  = "RAISE";
+const string EVENT_ACTION_CLEAR_STR  = "CLEAR";
+const string EVENT_ACTION_ACK_STR    = "ACKNOWLEDGE";
+const string EVENT_ACTION_UNACK_STR  = "UNACKNOWLEDGE";
+
+constexpr char EVENTD_DEFAULT_MAP_FILE[] = "/etc/evprofile/default.json";
+
+constexpr size_t EHT_MAX_ELEMS    = 40000;
+constexpr size_t EHT_MAX_DAYS     = 30;
+constexpr char EVENTD_CONF_FILE[] = "/etc/eventd.json";
+
+typedef struct EventInfo_t {
+    string  severity;
+    string  enable;
+    string  static_event_msg;
+} EventInfo;
+
+//unordered_map<string, EventInfo> static_event_table;
+typedef unordered_map<string, EventInfo> EventMap; 
+
+bool isValidSeverity(string severityStr);
+bool isValidEnable(string enableStr);
+bool parse_config(const char *filename, unsigned int& days, unsigned int& count);
+bool parse(const char *filename, EventMap& tmp_event_table);
+
+#endif
diff --git a/src/sonic-eventd/src/loghandler.cpp b/src/sonic-eventd/src/loghandler.cpp
new file mode 100755
index 000000000..d560ccc2e
--- /dev/null
+++ b/src/sonic-eventd/src/loghandler.cpp
@@ -0,0 +1,37 @@
+#include <iostream>
+#include <syslog.h>
+
+extern "C" void openSyslog() {
+    openlog (NULL, LOG_CONS | LOG_PID | LOG_NDELAY, LOG_LOCAL4);
+}
+
+extern "C" void writeToSyslog(std::string ev_id, int ev_sev, std::string ev_type, std::string ev_act, std::string ev_msg, std::string ev_static_msg) {
+    int SYSLOG_FACILITY = LOG_LOCAL4;
+    if (ev_act.empty()) {
+        const char LOG_FORMAT[] = "[%s], %%%s: %s %s"; 
+                                                      // event Type
+                                                      // Event Name
+                                                      // Static Desc
+                                                      // Dynamic Desc
+
+        // raise a syslog message
+        syslog(LOG_MAKEPRI(ev_sev, SYSLOG_FACILITY), LOG_FORMAT,
+            ev_type.c_str(), 
+            ev_id.c_str(), ev_static_msg.c_str(), ev_msg.c_str());
+    } else {
+        const char LOG_FORMAT[] = "[%s] (%s), %%%s: %s %s"; 
+                                                      // event Type
+                                                      // event action
+                                                      // Event Name
+                                                      // Static Desc
+                                                      // Dynamic Desc
+        // raise a syslog message
+        syslog(LOG_MAKEPRI(ev_sev, SYSLOG_FACILITY), LOG_FORMAT,
+            ev_type.c_str(), ev_act.c_str(), 
+            ev_id.c_str(), ev_static_msg.c_str(), ev_msg.c_str());
+    }
+}
+
+extern "C" void closeSyslog() {
+    closelog ();
+}
diff --git a/src/sonic-eventd/src/loghandler.h b/src/sonic-eventd/src/loghandler.h
new file mode 100644
index 000000000..1e98a9401
--- /dev/null
+++ b/src/sonic-eventd/src/loghandler.h
@@ -0,0 +1,5 @@
+#include <iostream>
+extern "C" void openSyslog();
+extern "C" void writeToSyslog(std::string ev_id, int ev_sev, std::string ev_type, std::string ev_act, std::string ev_msg, std::string ev_static_msg);
+extern "C" void closeSyslog();
+
diff --git a/src/sonic-eventd/src/subdir.mk b/src/sonic-eventd/src/subdir.mk
index eb067fd6e..1b03f3d4b 100644
--- a/src/sonic-eventd/src/subdir.mk
+++ b/src/sonic-eventd/src/subdir.mk
@@ -1,9 +1,11 @@
 CC := g++
 
-TEST_OBJS += ./src/eventd.o
+TEST_OBJS += ./src/eventd.o ./src/eventconsume.o ./src/eventutils.o ./src/loghandler.o
+EVENTDB_TEST_OBJS += ./src/eventd.o ./src/eventconsume.o ./src/eventutils.o ./src/loghandler.o
 OBJS += ./src/eventd.o ./src/main.o
+EVENTDB_OBJS += ./src/eventdb.o ./src/eventconsume.o ./src/loghandler.o ./src/eventutils.o
 
-C_DEPS += ./src/eventd.d ./src/main.d
+C_DEPS += ./src/eventd.d ./src/main.d ./src/eventdb.d ./src/eventconsume.d ./src/loghandler.d ./src/eventutils.d
 
 src/%.o: src/%.cpp
 	@echo 'Building file: $<'
diff --git a/src/sonic-eventd/tests/default.json b/src/sonic-eventd/tests/default.json
new file mode 100755
index 000000000..9a1511188
--- /dev/null
+++ b/src/sonic-eventd/tests/default.json
@@ -0,0 +1,24 @@
+{
+    "__README__" : "This is default map of events that eventd uses. Developer can modify this file and send SIGINT to eventd to make it read and use the updated file. Alternatively developer can test the new event by adding it to a custom event profile and use 'event profile <filename>' command to apply that profile without having to send SIGINT to eventd. Developer need to commit default.json file with the new event after testing it out. Supported severities are: CRITICAL, MAJOR, MINOR, WARNING and INFORMATIONAL. Supported enable flag values are: true and false.",
+    "events":[
+        {
+            "name": "SYSTEM_STATE",
+            "severity": "INFORMATIONAL",
+            "enable": "true",
+            "message" : ""
+        },
+        {
+            "name": "SENSOR_TEMP_HIGH",
+            "severity": "WARNING",
+            "enable": "true",
+            "message" : ""
+        },        
+        {
+            "name": "USER_LOGIN",
+            "severity": "INFORMATIONAL",
+            "enable": "true",
+            "message" : ""
+	    }
+    ]
+}
+           
diff --git a/src/sonic-eventd/tests/eventd.json b/src/sonic-eventd/tests/eventd.json
new file mode 100755
index 000000000..2236e0c6a
--- /dev/null
+++ b/src/sonic-eventd/tests/eventd.json
@@ -0,0 +1,5 @@
+{
+    "__README__": "Specify size of event history table. Whichever limit is hit first, eventd wraps event history table around and deletes older records.",
+    "max-records": 200,
+    "max-days": 30
+}
diff --git a/src/sonic-eventd/tests/eventdb_database_config.json b/src/sonic-eventd/tests/eventdb_database_config.json
new file mode 100644
index 000000000..3fb6d6339
--- /dev/null
+++ b/src/sonic-eventd/tests/eventdb_database_config.json
@@ -0,0 +1,107 @@
+{
+    "INSTANCES": {
+        "redis":{
+            "hostname" : "127.0.0.1",
+            "port": 6379,
+            "unix_socket_path": "/var/run/redis/redis.sock"
+        },
+        "redis1":{
+            "hostname" : "127.0.0.1",
+            "port": 6380,
+            "unix_socket_path": "/var/run/redis/redis1.sock"
+        },
+        "redis2":{
+            "hostname" : "127.0.0.1",
+            "port": 6381,
+            "unix_socket_path": "/var/run/redis/redis2.sock"
+        },
+        "redis3":{
+            "hostname" : "127.0.0.1",
+            "port": 6382,
+            "unix_socket_path": "/var/run/redis/redis3.sock"
+        },
+        "redis4":{
+            "hostname" : "127.0.0.1",
+            "port": 6383,
+            "unix_socket_path": "/var/run/redis/redis4.sock"
+        }
+    },
+    "DATABASES" : {
+        "APPL_DB" : {
+            "id" : 0,
+            "separator": ":",
+            "instance" : "redis"
+        },
+        "ASIC_DB" : {
+            "id" : 1,
+            "separator": ":",
+            "instance" : "redis"
+        },
+        "COUNTERS_DB" : {
+            "id" : 2,
+            "separator": ":",
+            "instance" : "redis"
+        },
+        "CONFIG_DB" : {
+            "id" : 4,
+            "separator": "|",
+            "instance" : "redis"
+        },
+        "PFC_WD_DB" : {
+            "id" : 5,
+            "separator": ":",
+            "instance" : "redis"
+        },
+        "FLEX_COUNTER_DB" : {
+            "id" : 5,
+            "separator": ":",
+            "instance" : "redis"
+        },
+        "STATE_DB" : {
+            "id" : 6,
+            "separator": "|",
+            "instance" : "redis"
+        },
+        "SNMP_OVERLAY_DB" : {
+            "id" : 7,
+            "separator": "|",
+            "instance" : "redis"
+        },
+        "RESTAPI_DB": {
+            "id": 8,
+            "separator": "|",
+            "instance": "redis"
+        },
+        "GB_ASIC_DB": {
+            "id": 9,
+            "separator": ":",
+            "instance": "redis"
+        },
+        "GB_COUNTERS_DB": {
+            "id": 10,
+            "separator": ":",
+            "instance": "redis"
+        },
+        "GB_FLEX_COUNTER_DB": {
+            "id": 11,
+            "separator": ":",
+            "instance": "redis"
+        },
+        "STATE_DB2" : {
+            "id" : 13,
+            "separator": "|",
+            "instance" : "redis"
+        },
+        "APPL_STATE_DB" : {
+            "id" : 14,
+            "separator": ":",
+            "instance" : "redis"
+        },
+        "EVENT_DB" : {
+            "id" : 15,
+            "separator": ":",
+            "instance" : "redis"
+        }   
+    },
+    "VERSION" : "1.0"
+}
diff --git a/src/sonic-eventd/tests/eventdb_database_config_global.json b/src/sonic-eventd/tests/eventdb_database_config_global.json
new file mode 100644
index 000000000..e55e1ab1b
--- /dev/null
+++ b/src/sonic-eventd/tests/eventdb_database_config_global.json
@@ -0,0 +1,8 @@
+{
+    "INCLUDES" : [
+        {
+            "include" : "eventdb_database_config.json"
+        }
+    ],
+    "VERSION" : "1.0"
+}
diff --git a/src/sonic-eventd/tests/eventdb_ut.cpp b/src/sonic-eventd/tests/eventdb_ut.cpp
new file mode 100644
index 000000000..a3e9e4aba
--- /dev/null
+++ b/src/sonic-eventd/tests/eventdb_ut.cpp
@@ -0,0 +1,434 @@
+#include<string>
+#include "gtest/gtest.h"
+#include "events_common.h"
+#include "events.h"
+#include <unordered_map>
+#include "dbconnector.h"
+#include <iostream>
+
+#include<sstream>
+#include "../src/eventd.h"
+#include "../src/eventconsume.h"
+
+using namespace std;
+using namespace swss;
+
+extern volatile bool g_run;
+extern uint64_t seq_id;
+extern uint64_t PURGE_SECONDS;
+extern unordered_map<string, uint64_t> cal_lookup_map;
+typedef pair<uint64_t, uint64_t> pi;
+extern priority_queue<pi, vector<pi>, greater<pi> > event_history_list;
+extern EventMap static_event_table;
+
+
+#define TEST_DB  "APPL_DB"
+#define TEST_NAMESPACE  "asic0"
+#define INVALID_NAMESPACE  "invalid"
+
+//extern void run_pub(void *mock_pub, const string wr_source, internal_events_lst_t &lst);
+
+string existing_file = "./tests//eventdb_database_config.json";
+string nonexisting_file = "./tests//database_config_nonexisting.json";
+string global_existing_file = "./tests//eventdb_database_global.json";
+
+
+
+typedef struct {
+    map<string, string> ev_data;
+    string severity;
+} ev_data_struct;
+map<pair<string, string>, ev_data_struct> event_data_t = {
+    {{"SYSTEM_STATE","NOTIFY"}, 
+      {{{"type-id","SYSTEM_STATE"}, {"resource", "system-state"}, {"text", "System Ready"}},
+      "INFORMATIONAL"}},
+    {{"INTERFACE_OPER_STATE", "NOTIFY"}, 
+      {{{"type-id", "INTERFACE_OPER_STATE"}, {"resource", "Ethernet1"}, {"text", "Operational Down"}, {"state", "up"}},
+      "INFORMATIONAL"}},  
+    {{"SENSOR_TEMP_HIGH", "RAISE"},
+        {{{"type-id", "SENSOR_TEMP_HIGH"}, {"resource", "cpu_sensor"}, {"action", "RAISE"}, {"text", "sensor temp 55C, threshold temp 52C"}},
+        "WARNING"}},
+    {{"SENSOR_TEMP_HIGH", "CLEAR"},
+        {{{"type-id", "SENSOR_TEMP_HIGH"}, {"resource", "cpu_sensor"}, {"action", "CLEAR"}, {"text", "sensor temp 50C, threshold temp 52C"}},
+        "WARNING"}}
+};
+
+
+typedef struct {
+    int id;
+    string source;
+    string tag;
+    string rid;
+    string seq;
+} test_data_t;
+
+const string event_profile = "tests/default.json";
+const string event_db_profile = "tests/eventd.json";
+
+void delete_evdb(DBConnector& dbConn)
+{
+    auto keys = dbConn.keys("*");
+    for (const auto& key : keys)
+    {
+        dbConn.del(key);
+    }
+}
+
+void clear_eventdb_data()
+{
+    g_run = true;
+    seq_id =0;
+    cal_lookup_map.clear();
+    PURGE_SECONDS = 86400;
+    event_history_list = priority_queue<pi, vector<pi>, greater<pi> >();
+    static_event_table.clear();
+}
+
+void run_pub(void *mock_pub, const string wr_source, internal_events_lst_t &lst)
+{
+    for(internal_events_lst_t::const_iterator itc = lst.begin(); itc != lst.end(); ++itc) {
+        EXPECT_EQ(0, zmq_message_send(mock_pub, wr_source, *itc));
+    }
+}
+
+class EventDbFixture : public ::testing::Test { 
+    protected:
+    void SetUp() override {
+        zctx = zmq_ctx_new();
+        EXPECT_TRUE(NULL != zctx);
+
+        /* Run proxy to enable receive as capture test needs to receive */
+        pxy = new eventd_proxy(zctx);
+        EXPECT_TRUE(NULL != pxy);
+
+        /* Starting proxy */
+        EXPECT_EQ(0, pxy->init());
+        DBConnector eventDb("EVENT_DB", 0, true);
+        //delete any entries in the EVENT_DB        
+        delete_evdb(eventDb);
+
+        try
+        {
+            /* Start Eventdb in a separate thread*/
+            evtConsume= new EventConsume(&eventDb, event_profile, event_db_profile);
+            thread thr(&EventConsume::run, evtConsume);
+            thr.detach();
+        }
+        catch (exception &e)
+        {
+            printf("EventDbFixture::SetUP: Unable to get DB Connector, e=(%s)\n", e.what());
+       }
+    }
+    
+    void TearDown() override {
+        delete evtConsume;
+        evtConsume = NULL;
+        delete pxy;
+        pxy= NULL;
+        zmq_ctx_term(zctx);
+        zctx = NULL;
+        clear_eventdb_data();
+    }
+    EventConsume *evtConsume;
+    void *zctx;
+    eventd_proxy *pxy;
+};
+
+
+void *init_publish(void *zctx)
+{
+    void *mock_pub = zmq_socket (zctx, ZMQ_PUB);
+    EXPECT_TRUE(NULL != mock_pub);
+    EXPECT_EQ(0, zmq_connect(mock_pub, get_config(XSUB_END_KEY).c_str()));
+
+    /* Provide time for async connect to complete */
+    this_thread::sleep_for(chrono::milliseconds(200));
+
+    return mock_pub;
+}
+
+internal_event_t create_ev(const int id, const int ev_id, const string& event,
+                           const string& action,
+                           map<string, unordered_map<string, string>> &verify_data)
+{
+    internal_event_t event_data;
+    stringstream ss;
+
+    test_data_t data;
+    data.id = id;
+    data.source = "source" + to_string(id);
+    data.tag = "tag" + to_string(id);
+    data.rid = "guid-" + to_string(id);
+    data.seq = to_string(id);
+
+    event_data[EVENT_STR_DATA] = convert_to_json(
+            data.source + ":" + data.tag, map(event_data_t[make_pair(event, action)].ev_data));
+    event_data[EVENT_RUNTIME_ID] = data.rid;
+    event_data[EVENT_SEQUENCE] = data.seq;
+    auto timepoint = system_clock::now();
+    ss << duration_cast<nanoseconds>(timepoint.time_since_epoch()).count();
+
+    event_data[EVENT_EPOCH] = ss.str();
+    unordered_map<string, string> ev_val(event_data_t[make_pair(event, action)].ev_data.begin(),
+                                         event_data_t[make_pair(event, action)].ev_data.end());
+    ev_val.insert({{"id", to_string(ev_id)}});
+    ev_val.insert({{"time-created", ss.str()}});
+    ev_val.insert({{"severity", event_data_t[make_pair(event, action)].severity}});
+
+    if (action == "RAISE") {
+        ev_val.insert({{"acknowledged", "false"}});
+        ev_val.insert({{"action", action}});
+    }
+    verify_data.insert({to_string(ev_id), ev_val});
+
+    return event_data;
+}
+
+
+void verify_events(map<string, unordered_map<string, string>> verifyData) 
+{
+    DBConnector eventDb("EVENT_DB", 0, true);
+    auto dbKeys = eventDb.keys("EVENT:*");
+    EXPECT_EQ(verifyData.size(), dbKeys.size());
+
+    for (const auto& vKey : verifyData)
+    {
+        string evtKey = "EVENT:" + vKey.first;
+        EXPECT_TRUE(count(dbKeys.begin(), dbKeys.end(), evtKey) == 1);
+        auto ev = eventDb.hgetall(evtKey);
+        EXPECT_TRUE(ev == verifyData[vKey.first]);
+    }
+}
+
+
+void verify_alarms_clear(map<string, unordered_map<string, string>> verifyData)
+{
+    DBConnector eventDb("EVENT_DB", 0, true);
+    auto dbKeys = eventDb.keys("ALARM:*");
+    EXPECT_EQ(0, dbKeys.size());
+}
+
+void verify_alarms_raise(map<string, unordered_map<string, string>> verifyData) 
+{
+    DBConnector eventDb("EVENT_DB", 0, true);
+    auto dbKeys = eventDb.keys("ALARM:*");
+    EXPECT_EQ(verifyData.size(), dbKeys.size());
+
+    for (const auto& vKey : verifyData)
+    {
+        string almKey = "ALARM:" + vKey.first;
+        EXPECT_TRUE(count(dbKeys.begin(), dbKeys.end(), almKey) == 1);
+        auto ev = eventDb.hgetall(almKey);
+        EXPECT_TRUE(ev == verifyData[vKey.first]);
+    }
+}
+
+TEST_F(EventDbFixture, validate_events)
+{  
+    printf("Validate events TEST started\n");
+
+    internal_events_lst_t wr_evts;
+    string wr_source("eventd-test");        
+
+    void *mock_pub = init_publish(zctx);
+
+    map<string, unordered_map<string, string>> verify_data;
+
+    wr_evts.push_back(create_ev(1, 1, "SENSOR_TEMP_HIGH", "RAISE", verify_data));
+    wr_evts.push_back(create_ev(2, 2, "SYSTEM_STATE", "NOTIFY", verify_data));
+
+    run_pub(mock_pub, wr_source, wr_evts);
+
+    this_thread::sleep_for(chrono::milliseconds(2000));
+  
+    // verify events logged in DB.
+    verify_events(verify_data);
+
+    //send events to close eventdb task
+    g_run = false;
+        wr_evts.clear();
+    wr_evts.push_back(create_ev(301, 3, "SYSTEM_STATE", "NOTIFY", verify_data));
+    run_pub(mock_pub, wr_source, wr_evts);
+    this_thread::sleep_for(chrono::milliseconds(2000));
+    zmq_close(mock_pub);
+
+    printf("Validate events TEST completed\n");
+ 
+}
+
+
+TEST_F(EventDbFixture, validate_alarms)
+{  
+    printf("Validate alarms TEST started\n");
+    internal_events_lst_t wr_evts;
+    string wr_source("eventd-test");
+    void *mock_pub = init_publish(zctx);
+
+    map<string, unordered_map<string, string>> verify_data;
+    wr_evts.push_back(create_ev(3, 1, "SENSOR_TEMP_HIGH", "RAISE", verify_data));
+ 
+    run_pub(mock_pub, wr_source, wr_evts);
+
+    this_thread::sleep_for(chrono::milliseconds(2000));
+
+    // verify events logged in DB.
+    verify_events(verify_data);
+    verify_alarms_raise(verify_data);
+
+    wr_evts.clear();
+    wr_evts.push_back(create_ev(4, 2, "SENSOR_TEMP_HIGH", "CLEAR", verify_data));
+
+    run_pub(mock_pub, wr_source, wr_evts);
+    this_thread::sleep_for(chrono::milliseconds(2000));
+    verify_events(verify_data);
+    verify_alarms_clear(verify_data);
+    g_run = false;
+        wr_evts.clear();
+    wr_evts.push_back(create_ev(302, 3, "SYSTEM_STATE", "NOTIFY", verify_data));
+    run_pub(mock_pub, wr_source, wr_evts); 
+    this_thread::sleep_for(chrono::milliseconds(2000));
+    zmq_close(mock_pub);
+    printf("Validate alarms TEST completed\n");
+}
+
+
+TEST_F(EventDbFixture, expiry_purge)
+{
+    printf("Expiry purge TEST started\n");
+    internal_events_lst_t wr_evts;
+    string wr_source("eventd-test");
+    void *mock_pub = init_publish(zctx);
+    map<string, unordered_map<string, string>> verify_data;
+    //set epoch time back to 31 days
+    auto timepoint = system_clock::now();
+    auto epochTimeNs = duration_cast<nanoseconds>(timepoint.time_since_epoch()).count();
+    epochTimeNs = epochTimeNs - (32UL * 24 * 60 * 60 * 1000 * 1000 * 1000);
+    auto ev_data = create_ev(5, 1, "SENSOR_TEMP_HIGH", "RAISE", verify_data);
+
+    ev_data[EVENT_EPOCH] = to_string(epochTimeNs);
+    verify_data["1"]["time-created"] = ev_data[EVENT_EPOCH];
+    wr_evts.push_back(ev_data);
+
+    run_pub(mock_pub, wr_source, wr_evts);
+    this_thread::sleep_for(chrono::milliseconds(2000));
+
+    // verify events logged in DB.
+    verify_events(verify_data);
+    verify_alarms_raise(verify_data);
+
+    wr_evts.clear();
+    verify_data.clear();
+    wr_evts.push_back(create_ev(6, 2, "SENSOR_TEMP_HIGH", "CLEAR", verify_data));
+    run_pub(mock_pub, wr_source, wr_evts);
+    this_thread::sleep_for(chrono::milliseconds(2000));
+
+    verify_events(verify_data);
+    verify_alarms_clear(verify_data);
+    wr_evts.clear();
+    g_run = false;
+    wr_evts.push_back(create_ev(303, 3, "SYSTEM_STATE", "NOTIFY", verify_data));
+    run_pub(mock_pub, wr_source, wr_evts); 
+    this_thread::sleep_for(chrono::milliseconds(2000));    
+    zmq_close(mock_pub);
+    printf("Expiry purge TEST completed\n");    
+}
+
+
+TEST_F(EventDbFixture, rollover_purge)
+{
+    printf("Rollover purge TEST started\n");
+    internal_events_lst_t wr_evts;
+    string wr_source("eventd-test");
+    void *mock_pub = init_publish(zctx);
+    map<string, unordered_map<string, string>> verify_data;
+    int i=0,j=6;
+
+    for (; i <= 198; i+=2, j+=2)
+    {
+        wr_evts.push_back(create_ev(j+1, i+1, "SENSOR_TEMP_HIGH", "RAISE", verify_data));
+        wr_evts.push_back(create_ev(j+2, i+2, "SENSOR_TEMP_HIGH", "CLEAR", verify_data));
+    }
+
+    run_pub(mock_pub, wr_source, wr_evts);
+
+    this_thread::sleep_for(chrono::milliseconds(5000));
+
+    // verify events logged in DB.
+    verify_events(verify_data);
+    // This will make it out of limit
+    wr_evts.push_back(create_ev(j+1, i+1, "SENSOR_TEMP_HIGH", "RAISE", verify_data));
+    run_pub(mock_pub, wr_source, wr_evts);
+
+    this_thread::sleep_for(chrono::milliseconds(2000));
+
+    DBConnector eventDb("EVENT_DB", 0, true);
+    auto dbKeys = eventDb.keys("EVENT:*");
+    EXPECT_EQ(200, dbKeys.size());
+    EXPECT_TRUE(count(dbKeys.begin(), dbKeys.end(), "EVENT:1") == 0);
+    EXPECT_TRUE(count(dbKeys.begin(), dbKeys.end(), "EVENT:2") == 1);
+    EXPECT_TRUE(count(dbKeys.begin(), dbKeys.end(), "EVENT:" + to_string(i+1)) == 1);
+    g_run = false;
+    wr_evts.push_back(create_ev(303, 3, "SYSTEM_STATE", "NOTIFY", verify_data));
+    run_pub(mock_pub, wr_source, wr_evts); 
+    this_thread::sleep_for(chrono::milliseconds(2000));        
+    zmq_close(mock_pub);
+    printf("Rollover purge TEST completed\n");
+}
+
+class SwsscommonEnvironment : public ::testing::Environment {
+public:
+    // Override this to define how to set up the environment
+    void SetUp() override {
+        // by default , init should be false
+        cout << "Default : isInit = " << SonicDBConfig::isInit() << endl;
+        EXPECT_FALSE(SonicDBConfig::isInit());
+        EXPECT_THROW(SonicDBConfig::initialize(nonexisting_file), runtime_error);
+
+        EXPECT_FALSE(SonicDBConfig::isInit());
+
+        // load local config file, init should be true
+        SonicDBConfig::initialize(existing_file);
+        cout << "INIT: load local db config file, isInit = " << SonicDBConfig::isInit() << endl;
+        EXPECT_TRUE(SonicDBConfig::isInit());
+
+        // Test the database_global.json file
+        // by default , global_init should be false
+        cout << "Default : isGlobalInit = " << SonicDBConfig::isGlobalInit() << endl;
+        EXPECT_FALSE(SonicDBConfig::isGlobalInit());
+
+        // Call an API which actually needs the data populated by SonicDBConfig::initializeGlobalConfig
+//        EXPECT_THROW(SonicDBConfig::getDbId(EVENT_DB, TEST_NAMESPACE), runtime_error);
+
+        // load local global file, init should be true
+        SonicDBConfig::initializeGlobalConfig(global_existing_file);
+        cout<<"INIT: load global db config file, isInit = "<<SonicDBConfig::isGlobalInit()<<endl;
+        EXPECT_TRUE(SonicDBConfig::isGlobalInit());
+
+        // Call an API with wrong namespace passed
+        cout << "INIT: Invoking SonicDBConfig::getDbId(APPL_DB, invalid)" << endl;
+//        EXPECT_THROW(SonicDBConfig::getDbId(EVENT_DB, INVALID_NAMESPACE), out_of_range);
+
+        // Get this info handy
+        try
+        {
+            DBConnector db("EVENT_DB", 0, true);
+        }
+        catch (exception &e)
+        {
+            printf("Unable to get DB Connector, e=(%s)\n", e.what());            
+            GTEST_SKIP() << "Condition not met";
+        }
+    }
+};
+
+
+int main(int argc, char* argv[])
+{
+    testing::InitGoogleTest(&argc, argv);
+    // Registers a global test environment, and verifies that the
+    // registration function returns its argument.
+    
+    SwsscommonEnvironment* const env = new SwsscommonEnvironment;
+    testing::AddGlobalTestEnvironment(env);
+    return RUN_ALL_TESTS();
+}
diff --git a/src/sonic-eventd/tests/subdir.mk b/src/sonic-eventd/tests/subdir.mk
index a251b4bea..757d7bfdd 100644
--- a/src/sonic-eventd/tests/subdir.mk
+++ b/src/sonic-eventd/tests/subdir.mk
@@ -1,8 +1,10 @@
 CC := g++
 
-TEST_OBJS += ./tests/eventd_ut.o ./tests/main.o
+TEST_OBJS += ./tests/eventd_ut.o  ./tests/main.o 
 
-C_DEPS += ./tests/eventd_ut.d ./tests/main.d
+C_DEPS += ./tests/eventd_ut.d ./tests/main.d ./tests/eventdb_ut.d
+
+EVENTDB_TEST_OBJS += ./tests/eventdb_ut.o
 
 tests/%.o: tests/%.cpp
 	@echo 'Building file: $<'
@@ -10,3 +12,4 @@ tests/%.o: tests/%.cpp
 	$(CC) -D__FILENAME__="$(subst tests/,,$<)" $(CFLAGS) -c -fmessage-length=0 -MMD -MP -MF"$(@:%.o=%.d)" -MT"$(@)" -o "$@" "$<"
 	@echo 'Finished building: $<'
 	@echo ' '
+
diff --git a/src/sonic-eventd/var/evprofile/default.json b/src/sonic-eventd/var/evprofile/default.json
new file mode 100644
index 000000000..af4166fc0
--- /dev/null
+++ b/src/sonic-eventd/var/evprofile/default.json
@@ -0,0 +1,7 @@
+{
+    "__README__" : "This is default map of events that eventd uses. Developer can modify this file and send SIGINT to eventd to make it read and use the updated file. Alternatively developer can test the new event by adding it to a custom event profile and use 'event profile <filename>' command to apply that profile without having to send SIGINT to eventd. Developer need to commit default.json file with the new event after testing it out. Supported severities are: CRITICAL, MAJOR, MINOR, WARNING and INFORMATIONAL. Supported enable flag values are: true and false.",
+    "events":[
+
+    ]
+}
+           
\ No newline at end of file
diff --git a/src/sonic-yang-models/yang-models/sonic-alarm.yang b/src/sonic-yang-models/yang-models/sonic-alarm.yang
new file mode 100644
index 000000000..e54ad6985
--- /dev/null
+++ b/src/sonic-yang-models/yang-models/sonic-alarm.yang
@@ -0,0 +1,142 @@
+  module sonic-alarm {
+
+    namespace "http://github.com/sonic-net/sonic-alarm";
+    prefix salarm;
+    yang-version 1.1;
+
+    import sonic-event {
+        prefix event;
+    }
+
+    // meta
+    organization
+    "SONiC";
+
+    contact
+    "SONiC";
+
+    description
+    "This module defines operational state data for SONiC alarms.";
+
+    revision "2024-01-30" {
+      description
+      "Initial revision.";
+    }
+
+
+    grouping alarm-state {
+
+      leaf id {
+        type string;
+        description "Sequence identifier for an alarm.";
+      }
+
+      leaf resource {
+        type string;
+        description "The item that is under alarm within the device.";
+      }          
+
+      leaf text {
+        type string;
+        description "Dynamic message raised with the alarm.";
+      }
+
+      leaf time-created {
+        type uint64;
+        description
+          "The time at which the alarm was raised by the system.
+          Expressed in nanoseconds since Unix epoch.";
+      }
+
+      leaf type-id {
+        type string;
+        description "Type of the alarm raised";
+      }
+
+      leaf severity {
+        type event:severity-type;
+        description
+        "Severity of a raised condition.";
+      }
+
+      leaf acknowledged {
+        type boolean;
+        description
+        "This denotes whether an alarm is acknowledged by the operator.
+         An acknowledged alarm is not considered in determining the 
+         health of the system.";
+      }
+
+      leaf acknowledge-time {
+        type uint64;
+        description
+         "The time at which alarm is acknowledged by the system.
+          This value is expressed as nanoseconds since the Unix Epoch.";
+      }
+
+    }
+
+    container sonic-alarm {
+
+      container ALARM {
+
+        list ALARM_LIST {
+          key "id";
+          uses alarm-state;
+        }
+      }
+
+      container ALARM_STATS {
+
+
+        list ALARM_STATS_LIST {
+
+          key "id";
+          leaf id {
+            type enumeration {
+              enum state;
+            }
+            description
+            "Table identifier value defined as state.";
+          }
+          
+          leaf alarms {
+            type uint64;
+            description
+            "Total alarms in the system.";
+          }
+
+          leaf critical {
+            type uint64;
+            description
+            "Total critical alarms in the system.";
+          }
+
+          leaf major {
+            type uint64;
+            description
+            "Total major alarms in the system.";
+          }
+
+          leaf minor {
+            type uint64;
+            description
+            "Total minor alarms in the system.";
+          }
+
+          leaf warning {
+            type uint64;
+            description
+            "Total warnings in the system.";
+          }
+
+          leaf acknowledged {
+            type uint64;
+            description
+            "Total acknowledged alarms in the system.";
+          }
+
+        }
+      }
+    }
+}
diff --git a/src/sonic-yang-models/yang-models/sonic-event.yang b/src/sonic-yang-models/yang-models/sonic-event.yang
new file mode 100644
index 000000000..f5bb27782
--- /dev/null
+++ b/src/sonic-yang-models/yang-models/sonic-event.yang
@@ -0,0 +1,134 @@
+  module sonic-event {
+    namespace "http://github.com/sonic-net/sonic-event";
+    prefix sevents;
+    yang-version 1.1;
+
+    organization
+    "SONiC";
+
+    contact
+    "SONiC";
+
+    description
+    "This module defines operational state data for SONiC events.";
+
+    revision "2024-01-30" {
+      description
+      "Initial revision.";
+    }
+
+    typedef severity-type {
+        type enumeration {
+          enum CRITICAL;
+          enum MAJOR;
+          enum MINOR;
+          enum WARNING;
+          enum INFORMATIONAL;
+        }
+        description
+        "Severity of a raised condition.";
+      }
+
+    typedef action-type {
+        type enumeration {
+          enum RAISE;
+          enum CLEAR;
+          enum ACKNOWLEDGE;
+          enum UNACKNOWLEDGE;
+        }
+        description
+        "Action on a raised condition.";
+      }
+
+    grouping event-state {
+
+      leaf id {
+        type string;
+        description "Sequence identifier for events.";
+      }
+
+      leaf resource {
+        type string;
+        description "The item in the device that raised the event.";
+      }          
+
+      leaf text {
+        type string;
+        description "Dynamic message raised with the event.";
+      }
+
+      leaf time-created {
+        type uint64;
+        description
+          "The time at which the event was raised by the system.
+          Expressed in epoch time.";
+      }
+
+      leaf type-id {
+        type string;
+        description "Type of event raised by the device.";
+      }
+
+      leaf severity {
+        type severity-type;
+        description
+        "Severity of the event.";
+      }
+
+      leaf action {
+        type action-type;
+        description "Action on the event.";
+      }
+    }
+
+    container sonic-event {
+
+      container EVENT {
+
+        list EVENT_LIST {
+          key "id";
+          uses event-state;
+        }
+      }
+
+      container EVENT_STATS {
+
+
+        list EVENT_STATS_LIST {
+
+          key "id";
+          leaf id {
+            type enumeration {
+              enum state;
+            }
+            description
+            "Table identifier value defined as state.";
+          }
+          
+          leaf events {
+            type uint64;
+            description
+            "Total number of events in the system store.";
+          }
+
+          leaf raised {
+            type uint64;
+            description
+            "Total number of events for raise operation in system store.";
+          }
+
+          leaf acked {
+            type uint64;
+            description
+            "Total number of events for ack operation in system store.";
+          }
+
+          leaf cleared {
+            type uint64;
+            description
+            "Total number of events for clear operation in system store.";
+          }
+        }
+      }
+    }
+  }
diff --git a/src/sonic-yang-models/yang-models/sonic-events-common.yang b/src/sonic-yang-models/yang-models/sonic-events-common.yang
index ed6c81a7b..cac93a69c 100644
--- a/src/sonic-yang-models/yang-models/sonic-events-common.yang
+++ b/src/sonic-yang-models/yang-models/sonic-events-common.yang
@@ -21,11 +21,52 @@ module sonic-events-common {
             "Common reusable definitions";
     }
 
+    typedef action-type {
+        type enumeration {
+            enum RAISE {
+                description "Event with raise alarm action.";
+            }
+            enum CLEAR {
+                description "Event with clear alarm action.";
+            }
+        }
+        description
+        "This type defines the actions associated with an event notification.";
+    }
+
     grouping sonic-events-cmn {
         leaf timestamp {
             type yang:date-and-time;
             description "time of the event";
         }
+        leaf type-id {
+            type string;
+            description
+            "The abbreviated name of the event, for example FAN_SPEED_STATUS,
+            SYSTEM_STATUS, or PSU_FAULTY.";
+        }
+
+        leaf resource {
+            type string;
+            description
+            "The item generating the event. for example eth1, cpu_sensor";
+        }
+
+        leaf text {
+            type string;
+            description
+            "The string used to inform operators about the event. This
+            MUST contain enough information for an operator to be able
+            to understand the problem. If this string contains structure,
+            this format should be clearly documented for programs to be
+            able to parse that information";
+        }
+
+        leaf action {
+            type action-type;
+            description
+            "This denotes the action associated with the event.";
+        }
     }
 
     grouping sonic-events-usage {

From 4b3916294e8777dc274b0f119761b165bfec88f9 Mon Sep 17 00:00:00 2001
From: Keshav Gupta <keshavg@marvell.com>
Date: Mon, 26 Aug 2024 21:18:11 +0530
Subject: [PATCH 0923/1115] [marvell] Updating sai debian (#19423)

Updating sai debian version to 1.14.0-1

Signed-off-by: Keshav Gupta <keshavg@marvell.com>
---
 platform/marvell/sai.mk | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/platform/marvell/sai.mk b/platform/marvell/sai.mk
index 3a50da904..87bd92448 100644
--- a/platform/marvell/sai.mk
+++ b/platform/marvell/sai.mk
@@ -2,11 +2,11 @@
 
 BRANCH = master
 ifeq ($(CONFIGURED_ARCH),arm64)
-MRVL_SAI_VERSION = 1.13.0-1
+MRVL_SAI_VERSION = 1.14.0-1
 else ifeq ($(CONFIGURED_ARCH),armhf)
-MRVL_SAI_VERSION = 1.13.0-3
+MRVL_SAI_VERSION = 1.14.0-1
 else
-MRVL_SAI_VERSION = 1.13.0-1
+MRVL_SAI_VERSION = 1.14.0-1
 endif
 
 MRVL_SAI_URL_PREFIX = https://github.com/Marvell-switching/sonic-marvell-binaries/raw/master/$(CONFIGURED_ARCH)/sai-plugin/$(BRANCH)/

From f62623360f34b29c3e931c46daa50f57fc14dc54 Mon Sep 17 00:00:00 2001
From: Yuanzhe <150663541+yuazhe@users.noreply.github.com>
Date: Tue, 27 Aug 2024 11:50:21 +0800
Subject: [PATCH 0924/1115] Fix 2700a1 sensors.conf and update psu_sensors.json
 accordingly (#19515)

previously 2700a1 sensors.conf is missing bus section for psu,
so add it and update the psu_sensors.json with the info.

fix psu_sensors_conf_updater to treat PSR psu as same as PSF one.

Signed-off-by: Yuanzhe, Liu <yualiu@nvidia.com>
---
 .../x86_64-mlnx_msn2700-r0/psu_sensors.json   |  7 +++-
 .../psu_sensors_conf_updater                  |  4 +-
 .../x86_64-mlnx_msn2700a1-r0/sensors.conf     | 42 +++++++++----------
 3 files changed, 28 insertions(+), 25 deletions(-)

diff --git a/device/mellanox/x86_64-mlnx_msn2700-r0/psu_sensors.json b/device/mellanox/x86_64-mlnx_msn2700-r0/psu_sensors.json
index 983325f1e..73f011e29 100644
--- a/device/mellanox/x86_64-mlnx_msn2700-r0/psu_sensors.json
+++ b/device/mellanox/x86_64-mlnx_msn2700-r0/psu_sensors.json
@@ -26,7 +26,10 @@
         },
         "MSN2700-A1": {
             "default": {
-                "bus": [],
+                "bus": [
+                    "i2c-10",
+                    "i2c-1-mux (chan_id 10)"
+                ],
                 "chip": {
                     "dps460-i2c-*-58": ["2", "R"],
                     "dps460-i2c-*-59": ["1", "L"]
@@ -363,7 +366,7 @@
         "MTEF-AC-G-ACBEL": {
             "label": [
                 "in1 PSU 220V Rail (in)",
-                "in3 PSU 12V Rail (out)",
+                "in2 PSU 12V Rail (out)",
                 "fan1 PSU Fan 1",
                 "temp1 PSU Temp 1",
                 "temp2 PSU Temp 2",
diff --git a/device/mellanox/x86_64-mlnx_msn2700-r0/psu_sensors_conf_updater b/device/mellanox/x86_64-mlnx_msn2700-r0/psu_sensors_conf_updater
index a548d7f98..1c60a5740 100644
--- a/device/mellanox/x86_64-mlnx_msn2700-r0/psu_sensors_conf_updater
+++ b/device/mellanox/x86_64-mlnx_msn2700-r0/psu_sensors_conf_updater
@@ -55,11 +55,11 @@ function update_psu_sensors_configuration() {
             # keep looking for the rest psus
             continue
         else
-            if [ "$psu" == "MTEF-PSF-AC-G" ]; then
+            psu=$(echo "$psu" | sed -r 's/-PSR|-PSF//g')
+            if [ "$psu" == "MTEF-AC-G" ]; then
                 vendor=$(cat /var/run/hw-management/eeprom/psu${number}_vpd | grep "MFR_NAME:" | cut -d ' ' -f 2 2>&1)
                 psu="${psu}-${vendor}"
             fi
-            psu=$(echo "$psu" | sed -r 's/-PSR|-PSF//g')
 
             echo "    chip \""$chip"\"" >> $SENSORS_CONFIG_FILE
             mapfile -t opers < <(jq -r --arg psu "$psu" '.psu[$psu] | keys[]' $PSU_SENSORS_CONFIG)
diff --git a/device/mellanox/x86_64-mlnx_msn2700a1-r0/sensors.conf b/device/mellanox/x86_64-mlnx_msn2700a1-r0/sensors.conf
index 495627c1b..286685a46 100644
--- a/device/mellanox/x86_64-mlnx_msn2700a1-r0/sensors.conf
+++ b/device/mellanox/x86_64-mlnx_msn2700a1-r0/sensors.conf
@@ -174,27 +174,27 @@ chip "xdpe15284-i2c-*-61"
     ignore curr3
 
 # Power supplies
-chip "dps460-i2c-*-58"
-    label in1 "PSU-2(R) 220V Rail (in)"
-    label in2 "PSU-2(R) 12V Rail (out)"
-    label fan1 "PSU-2(R) Fan 1"
-    label temp1 "PSU-2(R) Temp 1"
-    label temp2 "PSU-2(R) Temp 2"
-    label power1 "PSU-2(R) 220V Rail Pwr (in)"
-    label power2 "PSU-2(R) 12V Rail Pwr (out)"
-    label curr1 "PSU-2(R) 220V Rail Curr (in)"
-    label curr2 "PSU-2(R) 12V Rail Curr (out)"
-
-chip "dps460-i2c-*-59"
-    label in1 "PSU-1(L) 220V Rail (in)"
-    label in2 "PSU-1(L) 12V Rail (out)"
-    label fan1 "PSU-1(L) Fan 1"
-    label temp1 "PSU-1(L) Temp 1"
-    label temp2 "PSU-1(L) Temp 2"
-    label power1 "PSU-1(L) 220V Rail Pwr (in)"
-    label power2 "PSU-1(L) 12V Rail Pwr (out)"
-    label curr1 "PSU-1(L) 220V Rail Curr (in)"
-    label curr2 "PSU-1(L) 12V Rail Curr (out)"
+bus "i2c-10" "i2c-1-mux (chan_id 1)"
+    chip "dps460-i2c-*-58"
+        label in1 "PSU-2(R) 220V Rail (in)"
+        label in2 "PSU-2(R) 12V Rail (out)"
+        label fan1 "PSU-2(R) Fan 1"
+        label temp1 "PSU-2(R) Temp 1"
+        label temp2 "PSU-2(R) Temp 2"
+        label power1 "PSU-2(R) 220V Rail Pwr (in)"
+        label power2 "PSU-2(R) 12V Rail Pwr (out)"
+        label curr1 "PSU-2(R) 220V Rail Curr (in)"
+        label curr2 "PSU-2(R) 12V Rail Curr (out)"
+    chip "dps460-i2c-*-59"
+        label in1 "PSU-1(L) 220V Rail (in)"
+        label in2 "PSU-1(L) 12V Rail (out)"
+        label fan1 "PSU-1(L) Fan 1"
+        label temp1 "PSU-1(L) Temp 1"
+        label temp2 "PSU-1(L) Temp 2"
+        label power1 "PSU-1(L) 220V Rail Pwr (in)"
+        label power2 "PSU-1(L) 12V Rail Pwr (out)"
+        label curr1 "PSU-1(L) 220V Rail Curr (in)"
+        label curr2 "PSU-1(L) 12V Rail Curr (out)"
 
 # Chassis fans
 chip "mlxreg_fan-isa-*"

From 94e0668e85ca8736a4b4a703fd422e38616f2e0a Mon Sep 17 00:00:00 2001
From: zitingguo-ms <zitingguo@microsoft.com>
Date: Tue, 27 Aug 2024 13:28:05 +0800
Subject: [PATCH 0925/1115] [FRR template]Add missing exit to avoid config nht
 via default route in vrf (#19587)

Why I did it
The 'ip nht resolve-via-default' is configured in vrf config by mistake instead of the global setting when vrf is configured causing the bgpl cannot to be established.

Work item tracking
Microsoft ADO (number only): 28726407
How I did it
Add the missing 'exit' line in FRR zebra.interfaces.conf.j2 file to exit vrf config block and ensure the 'ip nht resolve-via-default' is configured in the global setting.
---
 dockers/docker-fpm-frr/frr/zebra/zebra.interfaces.conf.j2       | 1 +
 src/sonic-bgpcfgd/tests/data/sonic-cfggen/zebra/zebra.conf      | 2 ++
 .../tests/sample_output/py2/t2-chassis-fe-vni-zebra.conf        | 1 +
 .../tests/sample_output/py2/t2-chassis-fe-zebra.conf            | 1 +
 .../tests/sample_output/py3/t2-chassis-fe-vni-zebra.conf        | 1 +
 .../tests/sample_output/py3/t2-chassis-fe-zebra.conf            | 1 +
 .../tests/sample_output/t2-chassis-fe-pc-zebra.conf             | 1 +
 7 files changed, 8 insertions(+)

diff --git a/dockers/docker-fpm-frr/frr/zebra/zebra.interfaces.conf.j2 b/dockers/docker-fpm-frr/frr/zebra/zebra.interfaces.conf.j2
index 82b973d37..88ad9b46d 100644
--- a/dockers/docker-fpm-frr/frr/zebra/zebra.interfaces.conf.j2
+++ b/dockers/docker-fpm-frr/frr/zebra/zebra.interfaces.conf.j2
@@ -4,6 +4,7 @@
 {%   for vnet_name, vnet_metadata in VNET.items() %}
 vrf {{ vnet_name }}
 vni {{ vnet_metadata['vni'] }}
+exit
 !
 {%   endfor %}
 {%  endif %}
diff --git a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/zebra/zebra.conf b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/zebra/zebra.conf
index 6b7e1feff..bd8afe7f9 100644
--- a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/zebra/zebra.conf
+++ b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/zebra/zebra.conf
@@ -22,9 +22,11 @@ log facility local4
 !
 vrf First
 vni 10
+exit
 !
 vrf Second
 vni 20
+exit
 !
 ! Enable nht through default route
 ip nht resolve-via-default
diff --git a/src/sonic-config-engine/tests/sample_output/py2/t2-chassis-fe-vni-zebra.conf b/src/sonic-config-engine/tests/sample_output/py2/t2-chassis-fe-vni-zebra.conf
index 8bb483456..4cdb8bcea 100644
--- a/src/sonic-config-engine/tests/sample_output/py2/t2-chassis-fe-vni-zebra.conf
+++ b/src/sonic-config-engine/tests/sample_output/py2/t2-chassis-fe-vni-zebra.conf
@@ -22,6 +22,7 @@ log facility local4
 !
 vrf VnetFE
 vni 9000
+exit
 !
 !
 ! Enable nht through default route
diff --git a/src/sonic-config-engine/tests/sample_output/py2/t2-chassis-fe-zebra.conf b/src/sonic-config-engine/tests/sample_output/py2/t2-chassis-fe-zebra.conf
index 402230348..ca56e9ca0 100644
--- a/src/sonic-config-engine/tests/sample_output/py2/t2-chassis-fe-zebra.conf
+++ b/src/sonic-config-engine/tests/sample_output/py2/t2-chassis-fe-zebra.conf
@@ -22,6 +22,7 @@ log facility local4
 !
 vrf VnetFE
 vni 8000
+exit
 !
 !
 ! Enable nht through default route
diff --git a/src/sonic-config-engine/tests/sample_output/py3/t2-chassis-fe-vni-zebra.conf b/src/sonic-config-engine/tests/sample_output/py3/t2-chassis-fe-vni-zebra.conf
index b55906056..67f4f030d 100644
--- a/src/sonic-config-engine/tests/sample_output/py3/t2-chassis-fe-vni-zebra.conf
+++ b/src/sonic-config-engine/tests/sample_output/py3/t2-chassis-fe-vni-zebra.conf
@@ -22,6 +22,7 @@ log facility local4
 !
 vrf VnetFE
 vni 9000
+exit
 !
 !
 ! Enable nht through default route
diff --git a/src/sonic-config-engine/tests/sample_output/py3/t2-chassis-fe-zebra.conf b/src/sonic-config-engine/tests/sample_output/py3/t2-chassis-fe-zebra.conf
index 19e303639..3b7b1f727 100644
--- a/src/sonic-config-engine/tests/sample_output/py3/t2-chassis-fe-zebra.conf
+++ b/src/sonic-config-engine/tests/sample_output/py3/t2-chassis-fe-zebra.conf
@@ -22,6 +22,7 @@ log facility local4
 !
 vrf VnetFE
 vni 8000
+exit
 !
 !
 ! Enable nht through default route
diff --git a/src/sonic-config-engine/tests/sample_output/t2-chassis-fe-pc-zebra.conf b/src/sonic-config-engine/tests/sample_output/t2-chassis-fe-pc-zebra.conf
index be261bab9..f4d987989 100644
--- a/src/sonic-config-engine/tests/sample_output/t2-chassis-fe-pc-zebra.conf
+++ b/src/sonic-config-engine/tests/sample_output/t2-chassis-fe-pc-zebra.conf
@@ -10,6 +10,7 @@ enable password zebra
 !
 vrf VnetFE
 vni 8000
+exit
 !
 !
 ! Enable nht through default route

From 67df9abf51164987a7c2332d6f07611451908506 Mon Sep 17 00:00:00 2001
From: smagarwal-arista <160662020+smagarwal-arista@users.noreply.github.com>
Date: Tue, 27 Aug 2024 14:59:24 -0400
Subject: [PATCH 0926/1115] [Arista]: Add new HwSKU blackhawk-th4 (#19429)

Add a new HwSku for a different port speed layout

Arista-7060DX5-32-100Gx48-400Gx8
Add HwSKU Arista-7060DX5-32-100Gx48-400Gx8.
Add file media_settings.json
---
 .../hwsku.json                                |  104 +
 .../media_settings.json                       | 2397 +++++++++++++++++
 .../sai.profile                               |    1 +
 .../th4-a7060dx5-32-100Gx48-400Gx8.config.bcm |  789 ++++++
 4 files changed, 3291 insertions(+)
 create mode 100644 device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32-100Gx48-400Gx8/hwsku.json
 create mode 100644 device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32-100Gx48-400Gx8/media_settings.json
 create mode 100644 device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32-100Gx48-400Gx8/sai.profile
 create mode 100644 device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32-100Gx48-400Gx8/th4-a7060dx5-32-100Gx48-400Gx8.config.bcm

diff --git a/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32-100Gx48-400Gx8/hwsku.json b/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32-100Gx48-400Gx8/hwsku.json
new file mode 100644
index 000000000..ad8ffe6d8
--- /dev/null
+++ b/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32-100Gx48-400Gx8/hwsku.json
@@ -0,0 +1,104 @@
+{
+    "interfaces": {
+        "Ethernet0": {
+            "default_brkout_mode": "2x100G[50G,40G,25G,10G]"
+        },
+        "Ethernet8": {
+            "default_brkout_mode": "2x100G[50G,40G,25G,10G]"
+        },
+        "Ethernet16": {
+            "default_brkout_mode": "2x100G[50G,40G,25G,10G]"
+        },
+        "Ethernet24": {
+            "default_brkout_mode": "2x100G[50G,40G,25G,10G]"
+        },
+        "Ethernet32": {
+            "default_brkout_mode": "2x100G[50G,40G,25G,10G]"
+        },
+        "Ethernet40": {
+            "default_brkout_mode": "2x100G[50G,40G,25G,10G]"
+        },
+        "Ethernet48": {
+            "default_brkout_mode": "2x100G[50G,40G,25G,10G]"
+        },
+        "Ethernet56": {
+            "default_brkout_mode": "2x100G[50G,40G,25G,10G]"
+        },
+        "Ethernet64": {
+            "default_brkout_mode": "2x100G[50G,40G,25G,10G]"
+        },
+        "Ethernet72": {
+            "default_brkout_mode": "2x100G[50G,40G,25G,10G]"
+        },
+        "Ethernet80": {
+            "default_brkout_mode": "2x100G[50G,40G,25G,10G]"
+        },
+        "Ethernet88": {
+            "default_brkout_mode": "2x100G[50G,40G,25G,10G]"
+        },
+        "Ethernet96": {
+            "default_brkout_mode": "2x100G[50G,40G,25G,10G]"
+        },
+        "Ethernet104": {
+            "default_brkout_mode": "2x100G[50G,40G,25G,10G]"
+        },
+        "Ethernet112": {
+            "default_brkout_mode": "2x100G[50G,40G,25G,10G]"
+        },
+        "Ethernet120": {
+            "default_brkout_mode": "2x100G[50G,40G,25G,10G]"
+        },
+        "Ethernet128": {
+            "default_brkout_mode": "2x100G[50G,40G,25G,10G]"
+        },
+        "Ethernet136": {
+            "default_brkout_mode": "2x100G[50G,40G,25G,10G]"
+        },
+        "Ethernet144": {
+            "default_brkout_mode": "2x100G[50G,40G,25G,10G]"
+        },
+        "Ethernet152": {
+            "default_brkout_mode": "2x100G[50G,40G,25G,10G]"
+        },
+        "Ethernet160": {
+            "default_brkout_mode": "2x100G[50G,40G,25G,10G]"
+        },
+        "Ethernet168": {
+            "default_brkout_mode": "2x100G[50G,40G,25G,10G]"
+        },
+        "Ethernet176": {
+            "default_brkout_mode": "2x100G[50G,40G,25G,10G]"
+        },
+        "Ethernet184": {
+            "default_brkout_mode": "2x100G[50G,40G,25G,10G]"
+        },
+        "Ethernet192": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet200": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet208": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet216": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet224": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet232": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet240": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet248": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G]"
+        },
+        "Ethernet256": {
+            "default_brkout_mode": "1x10G",
+            "fec": "none"
+        }
+    }
+}
diff --git a/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32-100Gx48-400Gx8/media_settings.json b/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32-100Gx48-400Gx8/media_settings.json
new file mode 100644
index 000000000..080607fa2
--- /dev/null
+++ b/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32-100Gx48-400Gx8/media_settings.json
@@ -0,0 +1,2397 @@
+{
+    "PORT_MEDIA_SETTINGS": {
+        "1": {
+            "Default": {
+                "main": {
+                    "lane0": "0x71",
+                    "lane1": "0x71",
+                    "lane2": "0x71",
+                    "lane3": "0x71",
+                    "lane4": "0x71",
+                    "lane5": "0x71",
+                    "lane6": "0x71",
+                    "lane7": "0x71"
+                },
+                "post1": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff2",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff2",
+                    "lane3": "0xfffffff2",
+                    "lane4": "0xfffffff2",
+                    "lane5": "0xfffffff2",
+                    "lane6": "0xfffffff2",
+                    "lane7": "0xfffffff2"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "2": {
+            "Default": {
+                "main": {
+                    "lane0": "0x71",
+                    "lane1": "0x71",
+                    "lane2": "0x71",
+                    "lane3": "0x71",
+                    "lane4": "0x71",
+                    "lane5": "0x71",
+                    "lane6": "0x71",
+                    "lane7": "0x71"
+                },
+                "post1": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff2",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff2",
+                    "lane3": "0xfffffff2",
+                    "lane4": "0xfffffff2",
+                    "lane5": "0xfffffff2",
+                    "lane6": "0xfffffff2",
+                    "lane7": "0xfffffff2"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "3": {
+            "Default": {
+                "main": {
+                    "lane0": "0x71",
+                    "lane1": "0x71",
+                    "lane2": "0x71",
+                    "lane3": "0x71",
+                    "lane4": "0x71",
+                    "lane5": "0x71",
+                    "lane6": "0x71",
+                    "lane7": "0x71"
+                },
+                "post1": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff2",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff2",
+                    "lane3": "0xfffffff2",
+                    "lane4": "0xfffffff2",
+                    "lane5": "0xfffffff2",
+                    "lane6": "0xfffffff2",
+                    "lane7": "0xfffffff2"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "4": {
+            "Default": {
+                "main": {
+                    "lane0": "0x71",
+                    "lane1": "0x71",
+                    "lane2": "0x71",
+                    "lane3": "0x71",
+                    "lane4": "0x71",
+                    "lane5": "0x71",
+                    "lane6": "0x71",
+                    "lane7": "0x71"
+                },
+                "post1": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff2",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff2",
+                    "lane3": "0xfffffff2",
+                    "lane4": "0xfffffff2",
+                    "lane5": "0xfffffff2",
+                    "lane6": "0xfffffff2",
+                    "lane7": "0xfffffff2"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "5": {
+            "Default": {
+                "main": {
+                    "lane0": "0x71",
+                    "lane1": "0x71",
+                    "lane2": "0x71",
+                    "lane3": "0x71",
+                    "lane4": "0x71",
+                    "lane5": "0x71",
+                    "lane6": "0x71",
+                    "lane7": "0x71"
+                },
+                "post1": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff2",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff2",
+                    "lane3": "0xfffffff2",
+                    "lane4": "0xfffffff2",
+                    "lane5": "0xfffffff2",
+                    "lane6": "0xfffffff2",
+                    "lane7": "0xfffffff2"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "6": {
+            "Default": {
+                "main": {
+                    "lane0": "0x71",
+                    "lane1": "0x71",
+                    "lane2": "0x71",
+                    "lane3": "0x71",
+                    "lane4": "0x71",
+                    "lane5": "0x71",
+                    "lane6": "0x71",
+                    "lane7": "0x71"
+                },
+                "post1": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff2",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff2",
+                    "lane3": "0xfffffff2",
+                    "lane4": "0xfffffff2",
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+                    "lane5": "0xfffffff4",
+                    "lane6": "0xfffffff4",
+                    "lane7": "0xfffffff4"
+                },
+                "pre2": {
+                    "lane0": "0x1",
+                    "lane1": "0x1",
+                    "lane2": "0x1",
+                    "lane3": "0x1",
+                    "lane4": "0x3",
+                    "lane5": "0x1",
+                    "lane6": "0x1",
+                    "lane7": "0x1"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "26": {
+            "Default": {
+                "main": {
+                    "lane0": "0x8d",
+                    "lane1": "0x85",
+                    "lane2": "0x85",
+                    "lane3": "0x8d",
+                    "lane4": "0x8d",
+                    "lane5": "0x85",
+                    "lane6": "0x8d",
+                    "lane7": "0x85"
+                },
+                "post1": {
+                    "lane0": "0xfffffffa",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffffa",
+                    "lane4": "0xfffffffa",
+                    "lane5": "0xfffffff4",
+                    "lane6": "0xfffffffa",
+                    "lane7": "0xfffffff4"
+                },
+                "post2": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffb",
+                    "lane2": "0xfffffffb",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffffb",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffb"
+                },
+                "post3": {
+                    "lane0": "0xfffffffe",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffe",
+                    "lane4": "0xfffffffe",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffe",
+                    "lane7": "0xfffffffd"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff2",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff2",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff2"
+                },
+                "pre2": {
+                    "lane0": "0x2",
+                    "lane1": "0x3",
+                    "lane2": "0x3",
+                    "lane3": "0x2",
+                    "lane4": "0x2",
+                    "lane5": "0x3",
+                    "lane6": "0x2",
+                    "lane7": "0x3"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "27": {
+            "Default": {
+                "main": {
+                    "lane0": "0x82",
+                    "lane1": "0x82",
+                    "lane2": "0x82",
+                    "lane3": "0x82",
+                    "lane4": "0x82",
+                    "lane5": "0x82",
+                    "lane6": "0x82",
+                    "lane7": "0x82"
+                },
+                "post1": {
+                    "lane0": "0xfffffff2",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff2",
+                    "lane3": "0xfffffff2",
+                    "lane4": "0xfffffff2",
+                    "lane5": "0xfffffff2",
+                    "lane6": "0xfffffff2",
+                    "lane7": "0xfffffff2"
+                },
+                "post2": {
+                    "lane0": "0xfffffffb",
+                    "lane1": "0xfffffffb",
+                    "lane2": "0xfffffffb",
+                    "lane3": "0xfffffffb",
+                    "lane4": "0xfffffffb",
+                    "lane5": "0xfffffffb",
+                    "lane6": "0xfffffffb",
+                    "lane7": "0xfffffffb"
+                },
+                "post3": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffd"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff1",
+                    "lane1": "0xfffffff1",
+                    "lane2": "0xfffffff1",
+                    "lane3": "0xfffffff1",
+                    "lane4": "0xfffffff1",
+                    "lane5": "0xfffffff1",
+                    "lane6": "0xfffffff1",
+                    "lane7": "0xfffffff1"
+                },
+                "pre2": {
+                    "lane0": "0x3",
+                    "lane1": "0x3",
+                    "lane2": "0x3",
+                    "lane3": "0x3",
+                    "lane4": "0x3",
+                    "lane5": "0x3",
+                    "lane6": "0x3",
+                    "lane7": "0x3"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "28": {
+            "Default": {
+                "main": {
+                    "lane0": "0x85",
+                    "lane1": "0x80",
+                    "lane2": "0x85",
+                    "lane3": "0x85",
+                    "lane4": "0x80",
+                    "lane5": "0x85",
+                    "lane6": "0x85",
+                    "lane7": "0x85"
+                },
+                "post1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xffffffee",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff4",
+                    "lane4": "0xffffffee",
+                    "lane5": "0xfffffff4",
+                    "lane6": "0xfffffff4",
+                    "lane7": "0xfffffff4"
+                },
+                "post2": {
+                    "lane0": "0xfffffffb",
+                    "lane1": "0xfffffffb",
+                    "lane2": "0xfffffffb",
+                    "lane3": "0xfffffffb",
+                    "lane4": "0xfffffffb",
+                    "lane5": "0xfffffffb",
+                    "lane6": "0xfffffffb",
+                    "lane7": "0xfffffffb"
+                },
+                "post3": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffd"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff2",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff2",
+                    "lane3": "0xfffffff2",
+                    "lane4": "0xfffffff2",
+                    "lane5": "0xfffffff2",
+                    "lane6": "0xfffffff2",
+                    "lane7": "0xfffffff2"
+                },
+                "pre2": {
+                    "lane0": "0x3",
+                    "lane1": "0x2",
+                    "lane2": "0x3",
+                    "lane3": "0x3",
+                    "lane4": "0x2",
+                    "lane5": "0x3",
+                    "lane6": "0x3",
+                    "lane7": "0x3"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "29": {
+            "Default": {
+                "main": {
+                    "lane0": "0x82",
+                    "lane1": "0x82",
+                    "lane2": "0x82",
+                    "lane3": "0x82",
+                    "lane4": "0x82",
+                    "lane5": "0x82",
+                    "lane6": "0x82",
+                    "lane7": "0x82"
+                },
+                "post1": {
+                    "lane0": "0xffffffed",
+                    "lane1": "0xffffffed",
+                    "lane2": "0xffffffed",
+                    "lane3": "0xffffffed",
+                    "lane4": "0xfffffff2",
+                    "lane5": "0xffffffed",
+                    "lane6": "0xfffffff2",
+                    "lane7": "0xfffffff2"
+                },
+                "post2": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xfffffffb",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffb",
+                    "lane7": "0xfffffffb"
+                },
+                "post3": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffd"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff2",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff2",
+                    "lane3": "0xfffffff2",
+                    "lane4": "0xfffffff1",
+                    "lane5": "0xfffffff2",
+                    "lane6": "0xfffffff1",
+                    "lane7": "0xfffffff1"
+                },
+                "pre2": {
+                    "lane0": "0x1",
+                    "lane1": "0x1",
+                    "lane2": "0x1",
+                    "lane3": "0x1",
+                    "lane4": "0x3",
+                    "lane5": "0x1",
+                    "lane6": "0x3",
+                    "lane7": "0x3"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "30": {
+            "Default": {
+                "main": {
+                    "lane0": "0x80",
+                    "lane1": "0x80",
+                    "lane2": "0x80",
+                    "lane3": "0x80",
+                    "lane4": "0x80",
+                    "lane5": "0x80",
+                    "lane6": "0x80",
+                    "lane7": "0x80"
+                },
+                "post1": {
+                    "lane0": "0xffffffee",
+                    "lane1": "0xffffffee",
+                    "lane2": "0xffffffee",
+                    "lane3": "0xffffffee",
+                    "lane4": "0xffffffee",
+                    "lane5": "0xffffffee",
+                    "lane6": "0xffffffee",
+                    "lane7": "0xffffffee"
+                },
+                "post2": {
+                    "lane0": "0xfffffffb",
+                    "lane1": "0xfffffffb",
+                    "lane2": "0xfffffffb",
+                    "lane3": "0xfffffffb",
+                    "lane4": "0xfffffffb",
+                    "lane5": "0xfffffffb",
+                    "lane6": "0xfffffffb",
+                    "lane7": "0xfffffffb"
+                },
+                "post3": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffd"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff2",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff2",
+                    "lane3": "0xfffffff2",
+                    "lane4": "0xfffffff2",
+                    "lane5": "0xfffffff2",
+                    "lane6": "0xfffffff2",
+                    "lane7": "0xfffffff2"
+                },
+                "pre2": {
+                    "lane0": "0x2",
+                    "lane1": "0x2",
+                    "lane2": "0x2",
+                    "lane3": "0x2",
+                    "lane4": "0x2",
+                    "lane5": "0x2",
+                    "lane6": "0x2",
+                    "lane7": "0x2"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "31": {
+            "Default": {
+                "main": {
+                    "lane0": "0x85",
+                    "lane1": "0x85",
+                    "lane2": "0x85",
+                    "lane3": "0x82",
+                    "lane4": "0x85",
+                    "lane5": "0x85",
+                    "lane6": "0x85",
+                    "lane7": "0x85"
+                },
+                "post1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xffffffee",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0xfffffff4",
+                    "lane6": "0xfffffff4",
+                    "lane7": "0xfffffff4"
+                },
+                "post2": {
+                    "lane0": "0xfffffffb",
+                    "lane1": "0xfffffffb",
+                    "lane2": "0xfffffffb",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffb",
+                    "lane5": "0xfffffffb",
+                    "lane6": "0xfffffffb",
+                    "lane7": "0xfffffffb"
+                },
+                "post3": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffd"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff1",
+                    "lane1": "0xfffffff1",
+                    "lane2": "0xfffffff1",
+                    "lane3": "0xfffffff3",
+                    "lane4": "0xfffffff1",
+                    "lane5": "0xfffffff1",
+                    "lane6": "0xfffffff1",
+                    "lane7": "0xfffffff1"
+                },
+                "pre2": {
+                    "lane0": "0x2",
+                    "lane1": "0x2",
+                    "lane2": "0x2",
+                    "lane3": "0x2",
+                    "lane4": "0x2",
+                    "lane5": "0x2",
+                    "lane6": "0x2",
+                    "lane7": "0x2"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "32": {
+            "Default": {
+                "main": {
+                    "lane0": "0x82",
+                    "lane1": "0x7e",
+                    "lane2": "0x7e",
+                    "lane3": "0x7e",
+                    "lane4": "0x82",
+                    "lane5": "0x7e",
+                    "lane6": "0x82",
+                    "lane7": "0x82"
+                },
+                "post1": {
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xffffffef",
+                    "lane2": "0xffffffef",
+                    "lane3": "0xffffffef",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0xffffffef",
+                    "lane6": "0xfffffff4",
+                    "lane7": "0xfffffff4"
+                },
+                "post2": {
+                    "lane0": "0xfffffffa",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffa",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffa",
+                    "lane7": "0xfffffffa"
+                },
+                "post3": {
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffd"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xffffffef",
+                    "lane2": "0xffffffef",
+                    "lane3": "0xffffffef",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xffffffef",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
+                },
+                "pre2": {
+                    "lane0": "0x3",
+                    "lane1": "0x3",
+                    "lane2": "0x3",
+                    "lane3": "0x3",
+                    "lane4": "0x3",
+                    "lane5": "0x3",
+                    "lane6": "0x3",
+                    "lane7": "0x3"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "33": {
+            "Default": {
+                "main": {
+                    "lane0": "0x22"
+                },
+                "post1": {
+                    "lane0": "0x9"
+                },
+                "post2": {
+                    "lane0": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0x1"
+                },
+                "pre2": {
+                    "lane0": "0x0"
+                },
+                "pre3": {
+                    "lane0": "0x0"
+                }
+            }
+        }
+    }
+}
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32-100Gx48-400Gx8/sai.profile b/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32-100Gx48-400Gx8/sai.profile
new file mode 100644
index 000000000..20bd05292
--- /dev/null
+++ b/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32-100Gx48-400Gx8/sai.profile
@@ -0,0 +1 @@
+SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th4-a7060dx5-32-100Gx48-400Gx8.config.bcm
diff --git a/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32-100Gx48-400Gx8/th4-a7060dx5-32-100Gx48-400Gx8.config.bcm b/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32-100Gx48-400Gx8/th4-a7060dx5-32-100Gx48-400Gx8.config.bcm
new file mode 100644
index 000000000..19a537063
--- /dev/null
+++ b/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32-100Gx48-400Gx8/th4-a7060dx5-32-100Gx48-400Gx8.config.bcm
@@ -0,0 +1,789 @@
+# configuration yaml file
+#   device:
+#       <unit>:
+#           <table>:
+#               ?
+#                   <key_fld_1>: <value>
+#                   <key_fld_2>: <value>
+#                   ...
+#                   <key_fld_n>: <value>
+#               :
+#                   <data_fld_1>: <value>
+#                   <data_fld_2>: <value>
+#                   ...
+#                   <data_fld_n>: <value>
+#
+
+---
+bcm_device:
+    0:
+        global:
+            pktio_mode: 1
+            default_cpu_tx_queue: 7
+            vlan_flooding_l2mc_num_reserved: 0
+            ipv6_lpm_128b_enable: 1
+            shared_block_mask_section: uc_bc
+            skip_protocol_default_entries: 1
+            # LTSW uses value 1 for ALPM combined mode
+            l3_alpm_template: 1
+            l3_alpm_hit_skip: 1
+            sai_feat_tail_timestamp : 1
+            sai_field_group_auto_prioritize: 1
+            #l3_intf_vlan_split_egress for MTU at L3IF
+            l3_intf_vlan_split_egress : 1
+
+            # vxlan
+            l3_alpm_template: 1
+            riot_overlay_l3_egress_mem_size: 16384
+            riot_overlay_l3_intf_mem_size: 4096
+            l3_ecmp_member_first_lkup_mem_size: 12288
+            bcm_tunnel_term_compatible_mode: 1
+            shared_l2_tunnel: 1
+            sai_tunnel_support: 10
+            sai_tunnel_underlay_route_mode: 2
+            sai_tunnel_ecmp_sharing_mode: 0 # change to 2 if SAI_NEXT_HOP_GROUP_ATTR_LEVEL_1 used
+
+            # bfd
+            #bfd_enable: 1
+            #bfd_sha1_keys: 5
+            #bfd_num_sessions: 2048
+            #bfd_simple_password_keys: 5
+            #num_queues_pci: 47
+            #num_queues_uc0: 1
+            #bfd_feature_enable: 1
+            #bfd_use_endpoint_id_as_discriminator: 1
+            #bfd_tx_raw_ingress_enable: 1
+            #sai_eapp_config_file: "/usr/share/sonic/device/x86_64-broadcom_common/eapps/eapp_config.json"
+---
+device:
+    0:
+        PC_SERDES_CONFIG:
+            PKG_SWAP_BYPASS: 1
+
+        PC_PM_CORE:
+            ?
+                PC_PM_ID: 1
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x67235401
+                TX_LANE_MAP: 0x2731465
+                RX_POLARITY_FLIP: 0x00
+                TX_POLARITY_FLIP: 0x00
+            ?
+                PC_PM_ID: 2
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x31752064
+                TX_LANE_MAP: 0x76025314
+                RX_POLARITY_FLIP: 0xff
+                TX_POLARITY_FLIP: 0xff
+            ?
+                PC_PM_ID: 3
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x67241503
+                TX_LANE_MAP: 0x13650274
+                RX_POLARITY_FLIP: 0x00
+                TX_POLARITY_FLIP: 0x01
+            ?
+                PC_PM_ID: 4
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x46025713
+                TX_LANE_MAP: 0x31650274
+                RX_POLARITY_FLIP: 0x00
+                TX_POLARITY_FLIP: 0x00
+            ?
+                PC_PM_ID: 5
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x62713054
+                TX_LANE_MAP: 0x21703465
+                RX_POLARITY_FLIP: 0x00
+                TX_POLARITY_FLIP: 0xd8
+            ?
+                PC_PM_ID: 6
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x13460257
+                TX_LANE_MAP: 0x64137502
+                RX_POLARITY_FLIP: 0xff
+                TX_POLARITY_FLIP: 0xff
+            ?
+                PC_PM_ID: 7
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x43512670
+                TX_LANE_MAP: 0x2571364
+                RX_POLARITY_FLIP: 0x00
+                TX_POLARITY_FLIP: 0x00
+            ?
+                PC_PM_ID: 8
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x14270356
+                TX_LANE_MAP: 0x64237501
+                RX_POLARITY_FLIP: 0xfb
+                TX_POLARITY_FLIP: 0xff
+            ?
+                PC_PM_ID: 9
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x76140235
+                TX_LANE_MAP: 0x74036521
+                RX_POLARITY_FLIP: 0xc1
+                TX_POLARITY_FLIP: 0x00
+            ?
+                PC_PM_ID: 10
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x47125603
+                TX_LANE_MAP: 0x30451276
+                RX_POLARITY_FLIP: 0xff
+                TX_POLARITY_FLIP: 0xff
+            ?
+                PC_PM_ID: 11
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x76041235
+                TX_LANE_MAP: 0x74036512
+                RX_POLARITY_FLIP: 0x40
+                TX_POLARITY_FLIP: 0x00
+            ?
+                PC_PM_ID: 12
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x27145603
+                TX_LANE_MAP: 0x21450376
+                RX_POLARITY_FLIP: 0xff
+                TX_POLARITY_FLIP: 0xff
+            ?
+                PC_PM_ID: 13
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x2735146
+                TX_LANE_MAP: 0x3657421
+                RX_POLARITY_FLIP: 0x00
+                TX_POLARITY_FLIP: 0xc8
+            ?
+                PC_PM_ID: 14
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x47306521
+                TX_LANE_MAP: 0x12643075
+                RX_POLARITY_FLIP: 0xff
+                TX_POLARITY_FLIP: 0x33
+            ?
+                PC_PM_ID: 15
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x20157436
+                TX_LANE_MAP: 0x56237104
+                RX_POLARITY_FLIP: 0x08
+                TX_POLARITY_FLIP: 0x00
+            ?
+                PC_PM_ID: 16
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x14270356
+                TX_LANE_MAP: 0x76325014
+                RX_POLARITY_FLIP: 0xff
+                TX_POLARITY_FLIP: 0xff
+            ?
+                PC_PM_ID: 49
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x56704312
+                TX_LANE_MAP: 0x32641570
+                RX_POLARITY_FLIP: 0xff
+                TX_POLARITY_FLIP: 0xff
+            ?
+                PC_PM_ID: 50
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x21564073
+                TX_LANE_MAP: 0x50314762
+                RX_POLARITY_FLIP: 0x00
+                TX_POLARITY_FLIP: 0x00
+            ?
+                PC_PM_ID: 51
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x36715402
+                TX_LANE_MAP: 0x32641075
+                RX_POLARITY_FLIP: 0xff
+                TX_POLARITY_FLIP: 0xff
+            ?
+                PC_PM_ID: 52
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x51462073
+                TX_LANE_MAP: 0x5127634
+                RX_POLARITY_FLIP: 0x69
+                TX_POLARITY_FLIP: 0x08
+            ?
+                PC_PM_ID: 53
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x73204651
+                TX_LANE_MAP: 0x32640175
+                RX_POLARITY_FLIP: 0x69
+                TX_POLARITY_FLIP: 0xff
+            ?
+                PC_PM_ID: 54
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x5134627
+                TX_LANE_MAP: 0x60137254
+                RX_POLARITY_FLIP: 0x00
+                TX_POLARITY_FLIP: 0x00
+            ?
+                PC_PM_ID: 55
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x57420163
+                TX_LANE_MAP: 0x32651074
+                RX_POLARITY_FLIP: 0xff
+                TX_POLARITY_FLIP: 0xff
+            ?
+                PC_PM_ID: 56
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x5134627
+                TX_LANE_MAP: 0x10524376
+                RX_POLARITY_FLIP: 0x05
+                TX_POLARITY_FLIP: 0x00
+            ?
+                PC_PM_ID: 57
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x73520146
+                TX_LANE_MAP: 0x31650274
+                RX_POLARITY_FLIP: 0x3d
+                TX_POLARITY_FLIP: 0xff
+            ?
+                PC_PM_ID: 58
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x16072354
+                TX_LANE_MAP: 0x51634270
+                RX_POLARITY_FLIP: 0x01
+                TX_POLARITY_FLIP: 0x00
+            ?
+                PC_PM_ID: 59
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x72530164
+                TX_LANE_MAP: 0x32506147
+                RX_POLARITY_FLIP: 0xff
+                TX_POLARITY_FLIP: 0xff
+            ?
+                PC_PM_ID: 60
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x4371256
+                TX_LANE_MAP: 0x21673054
+                RX_POLARITY_FLIP: 0x00
+                TX_POLARITY_FLIP: 0xcc
+            ?
+                PC_PM_ID: 61
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x67241503
+                TX_LANE_MAP: 0x12730465
+                RX_POLARITY_FLIP: 0x20
+                TX_POLARITY_FLIP: 0x00
+            ?
+                PC_PM_ID: 62
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x73625140
+                TX_LANE_MAP: 0x12640573
+                RX_POLARITY_FLIP: 0x00
+                TX_POLARITY_FLIP: 0x00
+            ?
+                PC_PM_ID: 63
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x23674015
+                TX_LANE_MAP: 0x57206143
+                RX_POLARITY_FLIP: 0xff
+                TX_POLARITY_FLIP: 0xff
+            ?
+                PC_PM_ID: 64
+                CORE_INDEX: 0
+            :
+                RX_LANE_MAP_AUTO: 0
+                TX_LANE_MAP_AUTO: 0
+                RX_POLARITY_FLIP_AUTO: 0
+                TX_POLARITY_FLIP_AUTO: 0
+                RX_LANE_MAP: 0x57314260
+                TX_LANE_MAP: 0x1735264
+                RX_POLARITY_FLIP: 0x10
+                TX_POLARITY_FLIP: 0x00
+...
+---
+device:
+    0:
+        PC_PORT_PHYS_MAP:
+            ?
+               PORT_ID: 0
+            :
+               PC_PHYS_PORT_ID: 0
+            ?
+               PORT_ID: 1
+            :
+               PC_PHYS_PORT_ID: 1
+            ?
+               PORT_ID: 2
+            :
+               PC_PHYS_PORT_ID: 3
+            ?
+               PORT_ID: 5
+            :
+               PC_PHYS_PORT_ID: 5
+            ?
+               PORT_ID: 6
+            :
+               PC_PHYS_PORT_ID: 7
+            ?
+               PORT_ID: 9
+            :
+               PC_PHYS_PORT_ID: 9
+            ?
+               PORT_ID: 10
+            :
+               PC_PHYS_PORT_ID: 11
+            ?
+               PORT_ID: 13
+            :
+               PC_PHYS_PORT_ID: 13
+            ?
+               PORT_ID: 14
+            :
+               PC_PHYS_PORT_ID: 15
+            ?
+               PORT_ID: 17
+            :
+               PC_PHYS_PORT_ID: 17
+            ?
+               PORT_ID: 18
+            :
+               PC_PHYS_PORT_ID: 19
+            ?
+               PORT_ID: 21
+            :
+               PC_PHYS_PORT_ID: 21
+            ?
+               PORT_ID: 22
+            :
+               PC_PHYS_PORT_ID: 23
+            ?
+               PORT_ID: 25
+            :
+               PC_PHYS_PORT_ID: 25
+            ?
+               PORT_ID: 26
+            :
+               PC_PHYS_PORT_ID: 27
+            ?
+               PORT_ID: 29
+            :
+               PC_PHYS_PORT_ID: 29
+            ?
+               PORT_ID: 30
+            :
+               PC_PHYS_PORT_ID: 31
+            ?
+               PORT_ID: 33
+            :
+               PC_PHYS_PORT_ID: 259
+            ?
+               PORT_ID: 34
+            :
+               PC_PHYS_PORT_ID: 33
+            ?
+               PORT_ID: 35
+            :
+               PC_PHYS_PORT_ID: 35
+            ?
+               PORT_ID: 38
+            :
+               PC_PHYS_PORT_ID: 37
+            ?
+               PORT_ID: 39
+            :
+               PC_PHYS_PORT_ID: 39
+            ?
+               PORT_ID: 42
+            :
+               PC_PHYS_PORT_ID: 41
+            ?
+               PORT_ID: 43
+            :
+               PC_PHYS_PORT_ID: 43
+            ?
+               PORT_ID: 46
+            :
+               PC_PHYS_PORT_ID: 45
+            ?
+               PORT_ID: 47
+            :
+               PC_PHYS_PORT_ID: 47
+            ?
+               PORT_ID: 50
+            :
+               PC_PHYS_PORT_ID: 258
+            ?
+               PORT_ID: 51
+            :
+               PC_PHYS_PORT_ID: 49
+            ?
+               PORT_ID: 52
+            :
+               PC_PHYS_PORT_ID: 51
+            ?
+               PORT_ID: 55
+            :
+               PC_PHYS_PORT_ID: 53
+            ?
+               PORT_ID: 56
+            :
+               PC_PHYS_PORT_ID: 55
+            ?
+               PORT_ID: 59
+            :
+               PC_PHYS_PORT_ID: 57
+            ?
+               PORT_ID: 60
+            :
+               PC_PHYS_PORT_ID: 59
+            ?
+               PORT_ID: 63
+            :
+               PC_PHYS_PORT_ID: 61
+            ?
+               PORT_ID: 64
+            :
+               PC_PHYS_PORT_ID: 63
+            ?
+               PORT_ID: 67
+            :
+               PC_PHYS_PORT_ID: 260
+            ?
+               PORT_ID: 204
+            :
+               PC_PHYS_PORT_ID: 193
+            ?
+               PORT_ID: 205
+            :
+               PC_PHYS_PORT_ID: 195
+            ?
+               PORT_ID: 208
+            :
+               PC_PHYS_PORT_ID: 197
+            ?
+               PORT_ID: 209
+            :
+               PC_PHYS_PORT_ID: 199
+            ?
+               PORT_ID: 212
+            :
+               PC_PHYS_PORT_ID: 201
+            ?
+               PORT_ID: 213
+            :
+               PC_PHYS_PORT_ID: 203
+            ?
+               PORT_ID: 216
+            :
+               PC_PHYS_PORT_ID: 205
+            ?
+               PORT_ID: 217
+            :
+               PC_PHYS_PORT_ID: 207
+            ?
+               PORT_ID: 221
+            :
+               PC_PHYS_PORT_ID: 209
+            ?
+               PORT_ID: 222
+            :
+               PC_PHYS_PORT_ID: 211
+            ?
+               PORT_ID: 225
+            :
+               PC_PHYS_PORT_ID: 213
+            ?
+               PORT_ID: 226
+            :
+               PC_PHYS_PORT_ID: 215
+            ?
+               PORT_ID: 229
+            :
+               PC_PHYS_PORT_ID: 217
+            ?
+               PORT_ID: 230
+            :
+               PC_PHYS_PORT_ID: 219
+            ?
+               PORT_ID: 233
+            :
+               PC_PHYS_PORT_ID: 221
+            ?
+               PORT_ID: 234
+            :
+               PC_PHYS_PORT_ID: 223
+            ?
+               PORT_ID: 237
+            :
+               PC_PHYS_PORT_ID: 265
+            ?
+               PORT_ID: 238
+            :
+               PC_PHYS_PORT_ID: 225
+            ?
+               PORT_ID: 242
+            :
+               PC_PHYS_PORT_ID: 229
+            ?
+               PORT_ID: 246
+            :
+               PC_PHYS_PORT_ID: 233
+            ?
+               PORT_ID: 250
+            :
+               PC_PHYS_PORT_ID: 237
+            ?
+               PORT_ID: 255
+            :
+               PC_PHYS_PORT_ID: 241
+            ?
+               PORT_ID: 259
+            :
+               PC_PHYS_PORT_ID: 245
+            ?
+               PORT_ID: 263
+            :
+               PC_PHYS_PORT_ID: 249
+            ?
+               PORT_ID: 267
+            :
+               PC_PHYS_PORT_ID: 253
+            ?
+               PORT_ID: 271
+            :
+               PC_PHYS_PORT_ID: 266
+            
+
+...
+---
+device:
+    0:
+        PC_PORT:
+            ?
+                PORT_ID: 0
+            :
+                &port_mode_10g
+                ENABLE: 1
+                SPEED: 10000
+                NUM_LANES: 1
+            ?
+                PORT_ID: [[50, 50]]
+            :
+                ENABLE: 0
+                MAX_FRAME_SIZE: 9416
+                SPEED: 10000
+                NUM_LANES: 1
+            ?
+               PORT_ID: [[1, 2],
+                         [5, 6],
+                         [9, 10],
+                         [13, 14],
+                         [17, 18],
+                         [21, 22],
+                         [25, 26],
+                         [29, 30],
+                         [34, 35],
+                         [38, 39],
+                         [42, 43],
+                         [46, 47],
+                         [51, 52],
+                         [55, 56],
+                         [59, 60],
+                         [63, 64],
+                         [204, 205],
+                         [208, 209],
+                         [212, 213],
+                         [216, 217],
+                         [221, 222],
+                         [225, 226],
+                         [229, 230],
+                         [233, 234]]
+            :
+                ENABLE: 0
+                SPEED: 100000
+                NUM_LANES: 4
+                FEC_MODE: PC_FEC_RS528
+                MAX_FRAME_SIZE: 9416
+            ?
+               PORT_ID: [[238],
+                         [242],
+                         [246],
+                         [250],
+                         [255],
+                         [259],
+                         [263],
+                         [267]]
+            :
+                ENABLE: 0
+                SPEED: 400000
+                NUM_LANES: 8
+                FEC_MODE: PC_FEC_RS544_2XN
+                MAX_FRAME_SIZE: 9416
+...
+---
+device:
+    0:
+        # Per pipe flex counter configuration
+        CTR_EFLEX_CONFIG:
+            CTR_ING_EFLEX_OPERMODE_PIPEUNIQUE: 0
+            CTR_EGR_EFLEX_OPERMODE_PIPEUNIQUE: 0
+
+        # Per pipe flex state configuration
+        #FLEX_STATE_CONFIG:
+        #    FLEX_STATE_ING_OPERMODE_PIPEUNIQUE: 0
+        #    FLEX_STATE_EGR_OPERMODE_PIPEUNIQUE: 1
+
+        # Lossy vs Lossless mode
+        TM_THD_CONFIG:
+            THRESHOLD_MODE: LOSSLESS
+
+        # IFP mode
+        FP_CONFIG:
+            FP_ING_OPERMODE: GLOBAL_PIPE_AWARE
+...

From 48fb03b85645f0811d779ec725c8dd2d6eb93d58 Mon Sep 17 00:00:00 2001
From: smagarwal-arista <160662020+smagarwal-arista@users.noreply.github.com>
Date: Tue, 27 Aug 2024 15:05:25 -0400
Subject: [PATCH 0927/1115] 7060dx5 add tuning and suport values for HwSkus
 (#19698)

---
 .../media_settings.json                       | 2397 +++++++++++++++++
 .../media_settings.json                       | 1725 ++++++++++++
 .../port_config.ini                           |  228 +-
 .../Arista-7060DX5-32/media_settings.json     | 2397 +++++++++++++++++
 4 files changed, 6633 insertions(+), 114 deletions(-)
 create mode 100644 device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32-200Gx48-100Gx32/media_settings.json
 create mode 100644 device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32-25Gx96-100Gx8-200Gx8/media_settings.json
 create mode 100644 device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32/media_settings.json

diff --git a/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32-200Gx48-100Gx32/media_settings.json b/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32-200Gx48-100Gx32/media_settings.json
new file mode 100644
index 000000000..40dee2300
--- /dev/null
+++ b/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32-200Gx48-100Gx32/media_settings.json
@@ -0,0 +1,2397 @@
+{
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+        }
+    }
+}
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32-25Gx96-100Gx8-200Gx8/media_settings.json b/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32-25Gx96-100Gx8-200Gx8/media_settings.json
new file mode 100644
index 000000000..0ae0af225
--- /dev/null
+++ b/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32-25Gx96-100Gx8-200Gx8/media_settings.json
@@ -0,0 +1,1725 @@
+{
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+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "26": {
+            "Default": {
+                "main": {
+                    "lane0": "0x71",
+                    "lane1": "0x71",
+                    "lane2": "0x71",
+                    "lane3": "0x71",
+                    "lane4": "0x71",
+                    "lane5": "0x71",
+                    "lane6": "0x71",
+                    "lane7": "0x71"
+                },
+                "post1": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff2",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff2",
+                    "lane3": "0xfffffff2",
+                    "lane4": "0xfffffff2",
+                    "lane5": "0xfffffff2",
+                    "lane6": "0xfffffff2",
+                    "lane7": "0xfffffff2"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "27": {
+            "Default": {
+                "main": {
+                    "lane0": "0x71",
+                    "lane1": "0x71",
+                    "lane2": "0x71",
+                    "lane3": "0x71",
+                    "lane4": "0x71",
+                    "lane5": "0x71",
+                    "lane6": "0x71",
+                    "lane7": "0x71"
+                },
+                "post1": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff2",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff2",
+                    "lane3": "0xfffffff2",
+                    "lane4": "0xfffffff2",
+                    "lane5": "0xfffffff2",
+                    "lane6": "0xfffffff2",
+                    "lane7": "0xfffffff2"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "28": {
+            "Default": {
+                "main": {
+                    "lane0": "0x71",
+                    "lane1": "0x71",
+                    "lane2": "0x71",
+                    "lane3": "0x71",
+                    "lane4": "0x71",
+                    "lane5": "0x71",
+                    "lane6": "0x71",
+                    "lane7": "0x71"
+                },
+                "post1": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xfffffff2",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff2",
+                    "lane3": "0xfffffff2",
+                    "lane4": "0xfffffff2",
+                    "lane5": "0xfffffff2",
+                    "lane6": "0xfffffff2",
+                    "lane7": "0xfffffff2"
+                },
+                "pre2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "29": {
+            "Default": {
+                "main": {
+                    "lane0": "0x82",
+                    "lane1": "0x82",
+                    "lane2": "0x82",
+                    "lane3": "0x82",
+                    "lane4": "0x82",
+                    "lane5": "0x82",
+                    "lane6": "0x82",
+                    "lane7": "0x82"
+                },
+                "post1": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe0",
+                    "lane1": "0xffffffe0",
+                    "lane2": "0xffffffe0",
+                    "lane3": "0xffffffe0",
+                    "lane4": "0xffffffe0",
+                    "lane5": "0xffffffe0",
+                    "lane6": "0xffffffe0",
+                    "lane7": "0xffffffe0"
+                },
+                "pre2": {
+                    "lane0": "0x8",
+                    "lane1": "0x8",
+                    "lane2": "0x8",
+                    "lane3": "0x8",
+                    "lane4": "0x8",
+                    "lane5": "0x8",
+                    "lane6": "0x8",
+                    "lane7": "0x8"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "30": {
+            "Default": {
+                "main": {
+                    "lane0": "0x82",
+                    "lane1": "0x82",
+                    "lane2": "0x82",
+                    "lane3": "0x82",
+                    "lane4": "0x82",
+                    "lane5": "0x82",
+                    "lane6": "0x82",
+                    "lane7": "0x82"
+                },
+                "post1": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe0",
+                    "lane1": "0xffffffe0",
+                    "lane2": "0xffffffe0",
+                    "lane3": "0xffffffe0",
+                    "lane4": "0xffffffe0",
+                    "lane5": "0xffffffe0",
+                    "lane6": "0xffffffe0",
+                    "lane7": "0xffffffe0"
+                },
+                "pre2": {
+                    "lane0": "0x8",
+                    "lane1": "0x8",
+                    "lane2": "0x8",
+                    "lane3": "0x8",
+                    "lane4": "0x8",
+                    "lane5": "0x8",
+                    "lane6": "0x8",
+                    "lane7": "0x8"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "31": {
+            "Default": {
+                "main": {
+                    "lane0": "0x82",
+                    "lane1": "0x82",
+                    "lane2": "0x82",
+                    "lane3": "0x82",
+                    "lane4": "0x82",
+                    "lane5": "0x82",
+                    "lane6": "0x82",
+                    "lane7": "0x82"
+                },
+                "post1": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe0",
+                    "lane1": "0xffffffe0",
+                    "lane2": "0xffffffe0",
+                    "lane3": "0xffffffe0",
+                    "lane4": "0xffffffe0",
+                    "lane5": "0xffffffe0",
+                    "lane6": "0xffffffe0",
+                    "lane7": "0xffffffe0"
+                },
+                "pre2": {
+                    "lane0": "0x8",
+                    "lane1": "0x8",
+                    "lane2": "0x8",
+                    "lane3": "0x8",
+                    "lane4": "0x8",
+                    "lane5": "0x8",
+                    "lane6": "0x8",
+                    "lane7": "0x8"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "32": {
+            "Default": {
+                "main": {
+                    "lane0": "0x82",
+                    "lane1": "0x82",
+                    "lane2": "0x82",
+                    "lane3": "0x82",
+                    "lane4": "0x82",
+                    "lane5": "0x82",
+                    "lane6": "0x82",
+                    "lane7": "0x82"
+                },
+                "post1": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe0",
+                    "lane1": "0xffffffe0",
+                    "lane2": "0xffffffe0",
+                    "lane3": "0xffffffe0",
+                    "lane4": "0xffffffe0",
+                    "lane5": "0xffffffe0",
+                    "lane6": "0xffffffe0",
+                    "lane7": "0xffffffe0"
+                },
+                "pre2": {
+                    "lane0": "0x8",
+                    "lane1": "0x8",
+                    "lane2": "0x8",
+                    "lane3": "0x8",
+                    "lane4": "0x8",
+                    "lane5": "0x8",
+                    "lane6": "0x8",
+                    "lane7": "0x8"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "33": {
+            "Default": {
+                "main": {
+                    "lane0": "0x22"
+                },
+                "post1": {
+                    "lane0": "0x9"
+                },
+                "post2": {
+                    "lane0": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0x1"
+                },
+                "pre2": {
+                    "lane0": "0x0"
+                },
+                "pre3": {
+                    "lane0": "0x0"
+                }
+            }
+        }
+    }
+}
\ No newline at end of file
diff --git a/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32-25Gx96-100Gx8-200Gx8/port_config.ini b/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32-25Gx96-100Gx8-200Gx8/port_config.ini
index 8a509463d..eff97ad32 100644
--- a/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32-25Gx96-100Gx8-200Gx8/port_config.ini
+++ b/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32-25Gx96-100Gx8-200Gx8/port_config.ini
@@ -1,114 +1,114 @@
-#name          lanes              alias        index  speed     fec
-Ethernet0      1                  Ethernet1/1  1      25000
-Ethernet1      5                  Ethernet1/2  1      25000
-Ethernet2      3                  Ethernet1/3  1      25000
-Ethernet3      7                  Ethernet1/4  1      25000
-Ethernet8      9                  Ethernet2/1  2      25000
-Ethernet9      13                 Ethernet2/2  2      25000
-Ethernet10     11                 Ethernet2/3  2      25000
-Ethernet11     15                 Ethernet2/4  2      25000
-Ethernet16     17                 Ethernet3/1  3      25000
-Ethernet17     21                 Ethernet3/2  3      25000
-Ethernet18     19                 Ethernet3/3  3      25000
-Ethernet19     23                 Ethernet3/4  3      25000
-Ethernet24     25                 Ethernet4/1  4      25000
-Ethernet25     29                 Ethernet4/2  4      25000
-Ethernet26     27                 Ethernet4/3  4      25000
-Ethernet27     31                 Ethernet4/4  4      25000
-Ethernet32     33                 Ethernet5/1  5      25000
-Ethernet33     37                 Ethernet5/2  5      25000
-Ethernet34     35                 Ethernet5/3  5      25000
-Ethernet35     39                 Ethernet5/4  5      25000
-Ethernet40     41                 Ethernet6/1  6      25000
-Ethernet41     45                 Ethernet6/2  6      25000
-Ethernet42     43                 Ethernet6/3  6      25000
-Ethernet43     47                 Ethernet6/4  6      25000
-Ethernet48     49                 Ethernet7/1  7      25000
-Ethernet49     53                 Ethernet7/2  7      25000
-Ethernet50     51                 Ethernet7/3  7      25000
-Ethernet51     55                 Ethernet7/4  7      25000
-Ethernet56     57                 Ethernet8/1  8      25000
-Ethernet57     61                 Ethernet8/2  8      25000
-Ethernet58     59                 Ethernet8/3  8      25000
-Ethernet59     63                 Ethernet8/4  8      25000
-Ethernet64     65                 Ethernet9/1  9      25000
-Ethernet65     69                 Ethernet9/2  9      25000
-Ethernet66     67                 Ethernet9/3  9      25000
-Ethernet67     71                 Ethernet9/4  9      25000
-Ethernet72     73                 Ethernet10/1 10     25000
-Ethernet73     77                 Ethernet10/2 10     25000
-Ethernet74     75                 Ethernet10/3 10     25000
-Ethernet75     79                 Ethernet10/4 10     25000
-Ethernet80     81                 Ethernet11/1 11     25000
-Ethernet81     85                 Ethernet11/2 11     25000
-Ethernet82     83                 Ethernet11/3 11     25000
-Ethernet83     87                 Ethernet11/4 11     25000
-Ethernet88     89                 Ethernet12/1 12     25000
-Ethernet89     93                 Ethernet12/2 12     25000
-Ethernet90     91                 Ethernet12/3 12     25000
-Ethernet91     95                 Ethernet12/4 12     25000
-Ethernet96     97                 Ethernet13/1 13     25000
-Ethernet97     101                Ethernet13/2 13     25000
-Ethernet98     99                 Ethernet13/3 13     25000
-Ethernet99     103                Ethernet13/4 13     25000
-Ethernet104    105                Ethernet14/1 14     25000
-Ethernet105    109                Ethernet14/2 14     25000
-Ethernet106    107                Ethernet14/3 14     25000
-Ethernet107    111                Ethernet14/4 14     25000
-Ethernet112    113                Ethernet15/1 15     25000
-Ethernet113    117                Ethernet15/2 15     25000
-Ethernet114    115                Ethernet15/3 15     25000
-Ethernet115    119                Ethernet15/4 15     25000
-Ethernet120    121                Ethernet16/1 16     25000
-Ethernet121    125                Ethernet16/2 16     25000
-Ethernet122    123                Ethernet16/3 16     25000
-Ethernet123    127                Ethernet16/4 16     25000
-Ethernet128    385                Ethernet17/1 17     25000
-Ethernet129    389                Ethernet17/2 17     25000
-Ethernet130    387                Ethernet17/3 17     25000
-Ethernet131    391                Ethernet17/4 17     25000
-Ethernet136    393                Ethernet18/1 18     25000
-Ethernet137    397                Ethernet18/2 18     25000
-Ethernet138    395                Ethernet18/3 18     25000
-Ethernet139    399                Ethernet18/4 18     25000
-Ethernet144    401                Ethernet19/1 19     25000
-Ethernet145    405                Ethernet19/2 19     25000
-Ethernet146    403                Ethernet19/3 19     25000
-Ethernet147    407                Ethernet19/4 19     25000
-Ethernet152    409                Ethernet20/1 20     25000
-Ethernet153    413                Ethernet20/2 20     25000
-Ethernet154    411                Ethernet20/3 20     25000
-Ethernet155    415                Ethernet20/4 20     25000
-Ethernet160    417                Ethernet21/1 21     25000
-Ethernet161    421                Ethernet21/2 21     25000
-Ethernet162    419                Ethernet21/3 21     25000
-Ethernet163    423                Ethernet21/4 21     25000
-Ethernet168    425                Ethernet22/1 22     25000
-Ethernet169    429                Ethernet22/2 22     25000
-Ethernet170    427                Ethernet22/3 22     25000
-Ethernet171    431                Ethernet22/4 22     25000
-Ethernet176    433                Ethernet23/1 23     25000
-Ethernet177    437                Ethernet23/2 23     25000
-Ethernet178    435                Ethernet23/3 23     25000
-Ethernet179    439                Ethernet23/4 23     25000
-Ethernet184    441                Ethernet24/1 24     25000
-Ethernet185    445                Ethernet24/2 24     25000
-Ethernet186    443                Ethernet24/3 24     25000
-Ethernet187    447                Ethernet24/4 24     25000
-Ethernet192    449,450,451,452    Ethernet25/1 25     100000    rs
-Ethernet196    453,454,455,456    Ethernet25/5 25     100000    rs
-Ethernet200    457,458,459,460    Ethernet26/1 26     100000    rs
-Ethernet204    461,462,463,464    Ethernet26/5 26     100000    rs
-Ethernet208    465,466,467,468    Ethernet27/1 27     100000    rs
-Ethernet212    469,470,471,472    Ethernet27/5 27     100000    rs
-Ethernet216    473,474,475,476    Ethernet28/1 28     100000    rs
-Ethernet220    477,478,479,480    Ethernet28/5 28     100000    rs
-Ethernet224    481,482,483,484    Ethernet29/1 29     200000    rs
-Ethernet228    485,486,487,488    Ethernet29/5 29     200000    rs
-Ethernet232    489,490,491,492    Ethernet30/1 30     200000    rs
-Ethernet236    493,494,495,496    Ethernet30/5 30     200000    rs
-Ethernet240    497,498,499,500    Ethernet31/1 31     200000    rs
-Ethernet244    501,502,503,504    Ethernet31/5 31     200000    rs
-Ethernet248    505,506,507,508    Ethernet32/1 32     200000    rs
-Ethernet252    509,510,511,512    Ethernet32/5 32     200000    rs
-Ethernet256    513                Ethernet33   33     10000     none
+#name          lanes              alias        index  speed     fec    subport
+Ethernet0      1                  Ethernet1/1  1      25000     none     1
+Ethernet1      5                  Ethernet1/2  1      25000     none     2
+Ethernet2      3                  Ethernet1/3  1      25000     none     3
+Ethernet3      7                  Ethernet1/4  1      25000     none     4
+Ethernet8      9                  Ethernet2/1  2      25000     none     1
+Ethernet9      13                 Ethernet2/2  2      25000     none     2
+Ethernet10     11                 Ethernet2/3  2      25000     none     3
+Ethernet11     15                 Ethernet2/4  2      25000     none     4
+Ethernet16     17                 Ethernet3/1  3      25000     none     1
+Ethernet17     21                 Ethernet3/2  3      25000     none     2
+Ethernet18     19                 Ethernet3/3  3      25000     none     3
+Ethernet19     23                 Ethernet3/4  3      25000     none     4
+Ethernet24     25                 Ethernet4/1  4      25000     none     1
+Ethernet25     29                 Ethernet4/2  4      25000     none     2
+Ethernet26     27                 Ethernet4/3  4      25000     none     3
+Ethernet27     31                 Ethernet4/4  4      25000     none     4
+Ethernet32     33                 Ethernet5/1  5      25000     none     1
+Ethernet33     37                 Ethernet5/2  5      25000     none     2
+Ethernet34     35                 Ethernet5/3  5      25000     none     3
+Ethernet35     39                 Ethernet5/4  5      25000     none     4
+Ethernet40     41                 Ethernet6/1  6      25000     none     1
+Ethernet41     45                 Ethernet6/2  6      25000     none     2
+Ethernet42     43                 Ethernet6/3  6      25000     none     3
+Ethernet43     47                 Ethernet6/4  6      25000     none     4
+Ethernet48     49                 Ethernet7/1  7      25000     none     1
+Ethernet49     53                 Ethernet7/2  7      25000     none     2
+Ethernet50     51                 Ethernet7/3  7      25000     none     3
+Ethernet51     55                 Ethernet7/4  7      25000     none     4
+Ethernet56     57                 Ethernet8/1  8      25000     none     1
+Ethernet57     61                 Ethernet8/2  8      25000     none     2
+Ethernet58     59                 Ethernet8/3  8      25000     none     3
+Ethernet59     63                 Ethernet8/4  8      25000     none     4
+Ethernet64     65                 Ethernet9/1  9      25000     none     1
+Ethernet65     69                 Ethernet9/2  9      25000     none     2
+Ethernet66     67                 Ethernet9/3  9      25000     none     3
+Ethernet67     71                 Ethernet9/4  9      25000     none     4
+Ethernet72     73                 Ethernet10/1 10     25000     none     1
+Ethernet73     77                 Ethernet10/2 10     25000     none     2
+Ethernet74     75                 Ethernet10/3 10     25000     none     3
+Ethernet75     79                 Ethernet10/4 10     25000     none     4
+Ethernet80     81                 Ethernet11/1 11     25000     none     1
+Ethernet81     85                 Ethernet11/2 11     25000     none     2
+Ethernet82     83                 Ethernet11/3 11     25000     none     3
+Ethernet83     87                 Ethernet11/4 11     25000     none     4
+Ethernet88     89                 Ethernet12/1 12     25000     none     1
+Ethernet89     93                 Ethernet12/2 12     25000     none     2
+Ethernet90     91                 Ethernet12/3 12     25000     none     3
+Ethernet91     95                 Ethernet12/4 12     25000     none     4
+Ethernet96     97                 Ethernet13/1 13     25000     none     1
+Ethernet97     101                Ethernet13/2 13     25000     none     2
+Ethernet98     99                 Ethernet13/3 13     25000     none     3
+Ethernet99     103                Ethernet13/4 13     25000     none     4
+Ethernet104    105                Ethernet14/1 14     25000     none     1
+Ethernet105    109                Ethernet14/2 14     25000     none     2
+Ethernet106    107                Ethernet14/3 14     25000     none     3
+Ethernet107    111                Ethernet14/4 14     25000     none     4
+Ethernet112    113                Ethernet15/1 15     25000     none     1
+Ethernet113    117                Ethernet15/2 15     25000     none     2
+Ethernet114    115                Ethernet15/3 15     25000     none     3
+Ethernet115    119                Ethernet15/4 15     25000     none     4
+Ethernet120    121                Ethernet16/1 16     25000     none     1
+Ethernet121    125                Ethernet16/2 16     25000     none     2
+Ethernet122    123                Ethernet16/3 16     25000     none     3
+Ethernet123    127                Ethernet16/4 16     25000     none     4
+Ethernet128    385                Ethernet17/1 17     25000     none     1
+Ethernet129    389                Ethernet17/2 17     25000     none     2
+Ethernet130    387                Ethernet17/3 17     25000     none     3
+Ethernet131    391                Ethernet17/4 17     25000     none     4
+Ethernet136    393                Ethernet18/1 18     25000     none     1
+Ethernet137    397                Ethernet18/2 18     25000     none     2
+Ethernet138    395                Ethernet18/3 18     25000     none     3
+Ethernet139    399                Ethernet18/4 18     25000     none     4
+Ethernet144    401                Ethernet19/1 19     25000     none     1
+Ethernet145    405                Ethernet19/2 19     25000     none     2
+Ethernet146    403                Ethernet19/3 19     25000     none     3
+Ethernet147    407                Ethernet19/4 19     25000     none     4
+Ethernet152    409                Ethernet20/1 20     25000     none     1
+Ethernet153    413                Ethernet20/2 20     25000     none     2
+Ethernet154    411                Ethernet20/3 20     25000     none     3
+Ethernet155    415                Ethernet20/4 20     25000     none     4
+Ethernet160    417                Ethernet21/1 21     25000     none     1
+Ethernet161    421                Ethernet21/2 21     25000     none     2
+Ethernet162    419                Ethernet21/3 21     25000     none     3
+Ethernet163    423                Ethernet21/4 21     25000     none     4
+Ethernet168    425                Ethernet22/1 22     25000     none     1
+Ethernet169    429                Ethernet22/2 22     25000     none     2
+Ethernet170    427                Ethernet22/3 22     25000     none     3
+Ethernet171    431                Ethernet22/4 22     25000     none     4
+Ethernet176    433                Ethernet23/1 23     25000     none     1
+Ethernet177    437                Ethernet23/2 23     25000     none     2
+Ethernet178    435                Ethernet23/3 23     25000     none     3
+Ethernet179    439                Ethernet23/4 23     25000     none     4
+Ethernet184    441                Ethernet24/1 24     25000     none     1
+Ethernet185    445                Ethernet24/2 24     25000     none     2
+Ethernet186    443                Ethernet24/3 24     25000     none     3
+Ethernet187    447                Ethernet24/4 24     25000     none     4
+Ethernet192    449,450,451,452    Ethernet25/1 25     100000    rs       1
+Ethernet196    453,454,455,456    Ethernet25/5 25     100000    rs       2
+Ethernet200    457,458,459,460    Ethernet26/1 26     100000    rs       1
+Ethernet204    461,462,463,464    Ethernet26/5 26     100000    rs       2
+Ethernet208    465,466,467,468    Ethernet27/1 27     100000    rs       1
+Ethernet212    469,470,471,472    Ethernet27/5 27     100000    rs       2
+Ethernet216    473,474,475,476    Ethernet28/1 28     100000    rs       1
+Ethernet220    477,478,479,480    Ethernet28/5 28     100000    rs       2
+Ethernet224    481,482,483,484    Ethernet29/1 29     200000    rs       1
+Ethernet228    485,486,487,488    Ethernet29/5 29     200000    rs       2
+Ethernet232    489,490,491,492    Ethernet30/1 30     200000    rs       1
+Ethernet236    493,494,495,496    Ethernet30/5 30     200000    rs       2
+Ethernet240    497,498,499,500    Ethernet31/1 31     200000    rs       1
+Ethernet244    501,502,503,504    Ethernet31/5 31     200000    rs       2
+Ethernet248    505,506,507,508    Ethernet32/1 32     200000    rs       1
+Ethernet252    509,510,511,512    Ethernet32/5 32     200000    rs       2
+Ethernet256    513                Ethernet33   33     10000     none     0
diff --git a/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32/media_settings.json b/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32/media_settings.json
new file mode 100644
index 000000000..40dee2300
--- /dev/null
+++ b/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32/media_settings.json
@@ -0,0 +1,2397 @@
+{
+    "PORT_MEDIA_SETTINGS": {
+        "1": {
+            "Default": {
+                "main": {
+                    "lane0": "0x82",
+                    "lane1": "0x82",
+                    "lane2": "0x82",
+                    "lane3": "0x82",
+                    "lane4": "0x82",
+                    "lane5": "0x82",
+                    "lane6": "0x82",
+                    "lane7": "0x82"
+                },
+                "post1": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe0",
+                    "lane1": "0xffffffe0",
+                    "lane2": "0xffffffe0",
+                    "lane3": "0xffffffe0",
+                    "lane4": "0xffffffe0",
+                    "lane5": "0xffffffe0",
+                    "lane6": "0xffffffe0",
+                    "lane7": "0xffffffe0"
+                },
+                "pre2": {
+                    "lane0": "0x8",
+                    "lane1": "0x8",
+                    "lane2": "0x8",
+                    "lane3": "0x8",
+                    "lane4": "0x8",
+                    "lane5": "0x8",
+                    "lane6": "0x8",
+                    "lane7": "0x8"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "2": {
+            "Default": {
+                "main": {
+                    "lane0": "0x82",
+                    "lane1": "0x82",
+                    "lane2": "0x82",
+                    "lane3": "0x82",
+                    "lane4": "0x82",
+                    "lane5": "0x82",
+                    "lane6": "0x82",
+                    "lane7": "0x82"
+                },
+                "post1": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe0",
+                    "lane1": "0xffffffe0",
+                    "lane2": "0xffffffe0",
+                    "lane3": "0xffffffe0",
+                    "lane4": "0xffffffe0",
+                    "lane5": "0xffffffe0",
+                    "lane6": "0xffffffe0",
+                    "lane7": "0xffffffe0"
+                },
+                "pre2": {
+                    "lane0": "0x8",
+                    "lane1": "0x8",
+                    "lane2": "0x8",
+                    "lane3": "0x8",
+                    "lane4": "0x8",
+                    "lane5": "0x8",
+                    "lane6": "0x8",
+                    "lane7": "0x8"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "3": {
+            "Default": {
+                "main": {
+                    "lane0": "0x82",
+                    "lane1": "0x82",
+                    "lane2": "0x82",
+                    "lane3": "0x82",
+                    "lane4": "0x82",
+                    "lane5": "0x82",
+                    "lane6": "0x82",
+                    "lane7": "0x82"
+                },
+                "post1": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe0",
+                    "lane1": "0xffffffe0",
+                    "lane2": "0xffffffe0",
+                    "lane3": "0xffffffe0",
+                    "lane4": "0xffffffe0",
+                    "lane5": "0xffffffe0",
+                    "lane6": "0xffffffe0",
+                    "lane7": "0xffffffe0"
+                },
+                "pre2": {
+                    "lane0": "0x8",
+                    "lane1": "0x8",
+                    "lane2": "0x8",
+                    "lane3": "0x8",
+                    "lane4": "0x8",
+                    "lane5": "0x8",
+                    "lane6": "0x8",
+                    "lane7": "0x8"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "4": {
+            "Default": {
+                "main": {
+                    "lane0": "0x82",
+                    "lane1": "0x82",
+                    "lane2": "0x82",
+                    "lane3": "0x82",
+                    "lane4": "0x82",
+                    "lane5": "0x82",
+                    "lane6": "0x82",
+                    "lane7": "0x82"
+                },
+                "post1": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe0",
+                    "lane1": "0xffffffe0",
+                    "lane2": "0xffffffe0",
+                    "lane3": "0xffffffe0",
+                    "lane4": "0xffffffe0",
+                    "lane5": "0xffffffe0",
+                    "lane6": "0xffffffe0",
+                    "lane7": "0xffffffe0"
+                },
+                "pre2": {
+                    "lane0": "0x8",
+                    "lane1": "0x8",
+                    "lane2": "0x8",
+                    "lane3": "0x8",
+                    "lane4": "0x8",
+                    "lane5": "0x8",
+                    "lane6": "0x8",
+                    "lane7": "0x8"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
+            }
+        },
+        "5": {
+            "Default": {
+                "main": {
+                    "lane0": "0x82",
+                    "lane1": "0x82",
+                    "lane2": "0x82",
+                    "lane3": "0x82",
+                    "lane4": "0x82",
+                    "lane5": "0x82",
+                    "lane6": "0x82",
+                    "lane7": "0x82"
+                },
+                "post1": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post2": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "post3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                },
+                "pre1": {
+                    "lane0": "0xffffffe0",
+                    "lane1": "0xffffffe0",
+                    "lane2": "0xffffffe0",
+                    "lane3": "0xffffffe0",
+                    "lane4": "0xffffffe0",
+                    "lane5": "0xffffffe0",
+                    "lane6": "0xffffffe0",
+                    "lane7": "0xffffffe0"
+                },
+                "pre2": {
+                    "lane0": "0x8",
+                    "lane1": "0x8",
+                    "lane2": "0x8",
+                    "lane3": "0x8",
+                    "lane4": "0x8",
+                    "lane5": "0x8",
+                    "lane6": "0x8",
+                    "lane7": "0x8"
+                },
+                "pre3": {
+                    "lane0": "0x0",
+                    "lane1": "0x0",
+                    "lane2": "0x0",
+                    "lane3": "0x0",
+                    "lane4": "0x0",
+                    "lane5": "0x0",
+                    "lane6": "0x0",
+                    "lane7": "0x0"
+                }
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+                },
+                "pre3": {
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+                }
+            }
+        }
+    }
+}
\ No newline at end of file

From 0b18f5c876b77e37aa4b15d0ed5ebc31074c1d2a Mon Sep 17 00:00:00 2001
From: Samuel Angebault <staphylo@arista.com>
Date: Wed, 28 Aug 2024 07:14:22 +0200
Subject: [PATCH 0928/1115] [Arista] Update platform library submodules
 (#19349)

---
 platform/barefoot/sonic-platform-modules-arista | 2 +-
 platform/broadcom/sonic-platform-modules-arista | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/platform/barefoot/sonic-platform-modules-arista b/platform/barefoot/sonic-platform-modules-arista
index af03fbd9f..522eb5cca 160000
--- a/platform/barefoot/sonic-platform-modules-arista
+++ b/platform/barefoot/sonic-platform-modules-arista
@@ -1 +1 @@
-Subproject commit af03fbd9f67260ba764c833aaaa65b2ff07762d7
+Subproject commit 522eb5cca9de7ddd6b96c5a361913855ad5d8e34
diff --git a/platform/broadcom/sonic-platform-modules-arista b/platform/broadcom/sonic-platform-modules-arista
index af03fbd9f..522eb5cca 160000
--- a/platform/broadcom/sonic-platform-modules-arista
+++ b/platform/broadcom/sonic-platform-modules-arista
@@ -1 +1 @@
-Subproject commit af03fbd9f67260ba764c833aaaa65b2ff07762d7
+Subproject commit 522eb5cca9de7ddd6b96c5a361913855ad5d8e34

From cc22863d1911609722d1c66c7d72a230cc1d98f9 Mon Sep 17 00:00:00 2001
From: Yakiv Huryk <62013282+Yakiv-Huryk@users.noreply.github.com>
Date: Wed, 28 Aug 2024 17:40:16 +0300
Subject: [PATCH 0929/1115] [Mellanox] update rshim logic (#19775)

- Why I did it
To have a dedicated rshim instance per DPU instead of a single instance for all

- How I did it
1. add multi-instance systemd service to run rshim per DPU
2. build rshim w/o default systemd service
3. patch rshim to have the "dpu" interface name
4. update rshim version to 2.0.29

- How to verify it
Manual test on SN4280

Signed-off-by: Yakiv Huryk <yhuryk@nvidia.com>
---
 .../x86_64-nvidia_sn4280-r0/services.conf     |  2 +-
 .../build_templates/sonic_debian_extension.j2 |  7 ++-
 platform/mellanox/rshim.mk                    |  2 +-
 platform/mellanox/rshim/.gitignore            |  1 +
 platform/mellanox/rshim/Makefile              |  4 ++
 .../rshim/files/rshim-manager.service         | 11 +++++
 platform/mellanox/rshim/files/rshim.sh        | 44 +++++++++++++++++++
 platform/mellanox/rshim/files/rshim@.service  | 13 ++++++
 .../mellanox/rshim/rename_tmfifo_to_dpu.patch | 13 ++++++
 9 files changed, 94 insertions(+), 3 deletions(-)
 create mode 100644 platform/mellanox/rshim/files/rshim-manager.service
 create mode 100644 platform/mellanox/rshim/files/rshim.sh
 create mode 100644 platform/mellanox/rshim/files/rshim@.service
 create mode 100644 platform/mellanox/rshim/rename_tmfifo_to_dpu.patch

diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/services.conf b/device/mellanox/x86_64-nvidia_sn4280-r0/services.conf
index 529f66cdf..7621d96e7 100644
--- a/device/mellanox/x86_64-nvidia_sn4280-r0/services.conf
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/services.conf
@@ -1 +1 @@
-rshim.service
+rshim-manager.service
diff --git a/files/build_templates/sonic_debian_extension.j2 b/files/build_templates/sonic_debian_extension.j2
index 12c743d93..1845f9b8c 100644
--- a/files/build_templates/sonic_debian_extension.j2
+++ b/files/build_templates/sonic_debian_extension.j2
@@ -1089,7 +1089,12 @@ sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y in
 sudo mkdir -p $FILESYSTEM_ROOT/etc/minicom/
 sudo cp platform/mellanox/minirc.dfl $FILESYSTEM_ROOT/etc/minicom/
 
-sudo LANG=C chroot $FILESYSTEM_ROOT systemctl disable rshim.service
+# Install rshim script
+sudo install -m 755 platform/mellanox/rshim/files/rshim.sh $FILESYSTEM_ROOT/usr/bin/rshim.sh
+
+# Install rshim services
+sudo cp platform/mellanox/rshim/files/rshim@.service $FILESYSTEM_ROOT_USR_LIB_SYSTEMD_SYSTEM/
+sudo cp platform/mellanox/rshim/files/rshim-manager.service $FILESYSTEM_ROOT_USR_LIB_SYSTEMD_SYSTEM/
 {% endif %}
 
 {% if sonic_asic_platform == "nvidia-bluefield" %}
diff --git a/platform/mellanox/rshim.mk b/platform/mellanox/rshim.mk
index 9a375aec8..13ec5951c 100644
--- a/platform/mellanox/rshim.mk
+++ b/platform/mellanox/rshim.mk
@@ -15,7 +15,7 @@
 # limitations under the License.
 #
 
-MLNX_RSHIM_DRIVER_VERSION = 2.0.19
+MLNX_RSHIM_DRIVER_VERSION = 2.0.29
 MLNX_RSHIM_ASSETS_GITHUB_URL = https://github.com/Mellanox/sonic-bluefield-packages
 MLNX_RSHIM_ASSETS_RELEASE_TAG = rshim-$(MLNX_RSHIM_DRIVER_VERSION)-$(BLDENV)-$(CONFIGURED_ARCH)
 MLNX_RSHIM_ASSETS_URL = $(MLNX_RSHIM_ASSETS_GITHUB_URL)/releases/download/$(MLNX_RSHIM_ASSETS_RELEASE_TAG)
diff --git a/platform/mellanox/rshim/.gitignore b/platform/mellanox/rshim/.gitignore
index 6dbdff457..1ccb02ed8 100644
--- a/platform/mellanox/rshim/.gitignore
+++ b/platform/mellanox/rshim/.gitignore
@@ -3,3 +3,4 @@
 # Except these files
 !.gitignore
 !Makefile
+!files/*
diff --git a/platform/mellanox/rshim/Makefile b/platform/mellanox/rshim/Makefile
index fee2e6ec7..4a8099e61 100644
--- a/platform/mellanox/rshim/Makefile
+++ b/platform/mellanox/rshim/Makefile
@@ -31,6 +31,10 @@ $(addprefix $(DEST)/, $(MLNX_RSHIM)): $(DEST)/% :
 	tar xf rshim-${MLNX_RSHIM_DRIVER_VERSION}.tar.gz -C rshim_src --strip-components=1
 
 	pushd rshim_src
+	patch -p1 < ../rename_tmfifo_to_dpu.patch
+
+	# disable default systemd service
+	sed -i 's/	dh_auto_configure/	dh_auto_configure -- --with-systemdsystemunitdir=no/' debian/rules
 
 	# Build the package
 	DEB_BUILD_OPTIONS=nocheck dpkg-buildpackage -rfakeroot -us -uc -b -j$(SONIC_CONFIG_MAKE_JOBS) --admindir $(SONIC_DPKG_ADMINDIR)
diff --git a/platform/mellanox/rshim/files/rshim-manager.service b/platform/mellanox/rshim/files/rshim-manager.service
new file mode 100644
index 000000000..4998bd3ff
--- /dev/null
+++ b/platform/mellanox/rshim/files/rshim-manager.service
@@ -0,0 +1,11 @@
+[Unit]
+Description=Starts rshim driver for all DPUs
+After=network.target
+Wants=rshim@0.service rshim@1.service rshim@2.service rshim@3.service
+
+[Service]
+Type=oneshot
+ExecStart=/bin/true
+
+[Install]
+WantedBy=multi-user.target
diff --git a/platform/mellanox/rshim/files/rshim.sh b/platform/mellanox/rshim/files/rshim.sh
new file mode 100644
index 000000000..e384ba9c1
--- /dev/null
+++ b/platform/mellanox/rshim/files/rshim.sh
@@ -0,0 +1,44 @@
+#!/usr/bin/env bash
+#
+# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+if [ $# -eq 0 ]; then
+    echo "Usage: $0 <index>"
+    exit 1
+fi
+
+dpu_id=$1
+
+declare -A dpu2pcie
+dpu2pcie[0]="06:00.0"
+dpu2pcie[1]="05:00.0"
+dpu2pcie[2]="01:00.0"
+dpu2pcie[3]="02:00.0"
+
+if [ -z "${dpu2pcie[$dpu_id]}" ]; then
+    echo "Error: Invalid dpu index $dpu_id"
+    exit 1
+fi
+
+pcie=${dpu2pcie[$dpu_id]}
+
+if ! lspci | grep $pcie > /dev/null; then
+    echo "PCIE device $pcie is not available"
+    exit 1
+fi
+
+/usr/sbin/rshim -i $dpu_id -d pcie-0000:$pcie
diff --git a/platform/mellanox/rshim/files/rshim@.service b/platform/mellanox/rshim/files/rshim@.service
new file mode 100644
index 000000000..a3e26418d
--- /dev/null
+++ b/platform/mellanox/rshim/files/rshim@.service
@@ -0,0 +1,13 @@
+[Unit]
+Description=rshim driver for DPU %I
+Documentation=man:rshim(8)
+After=network.target
+
+[Service]
+Restart=always
+Type=forking
+ExecStart=/usr/bin/rshim.sh %i
+KillMode=control-group
+
+[Install]
+WantedBy=multi-user.target
diff --git a/platform/mellanox/rshim/rename_tmfifo_to_dpu.patch b/platform/mellanox/rshim/rename_tmfifo_to_dpu.patch
new file mode 100644
index 000000000..f01880d0c
--- /dev/null
+++ b/platform/mellanox/rshim/rename_tmfifo_to_dpu.patch
@@ -0,0 +1,13 @@
+diff --git a/src/rshim_net.c b/src/rshim_net.c
+index a9e8663..7214df2 100644
+--- a/src/rshim_net.c
++++ b/src/rshim_net.c
+@@ -263,7 +263,7 @@ int rshim_net_init(rshim_backend_t *bd)
+   char ifname[IFNAMSIZ];
+   int rc, fd[2];
+ 
+-  snprintf(ifname, sizeof(ifname), "tmfifo_net%d", bd->index);
++  snprintf(ifname, sizeof(ifname), "dpu%d", bd->index);
+   bd->net_fd = rshim_if_open(ifname, bd->index);
+ 
+   if (bd->net_fd < 0)

From b3c9d2da52072f316f23e4c2ac9e1a2283a0723a Mon Sep 17 00:00:00 2001
From: Andriy Yurkiv <70649192+ayurkiv-nvda@users.noreply.github.com>
Date: Wed, 28 Aug 2024 20:26:41 +0300
Subject: [PATCH 0930/1115] [Mellanox] update buffers and align QoS to add
 support for Dual-Tor on t1 (#20000)

Signed-off-by: Andriy Yurkiv <ayurkiv@nvidia.com>
---
 .../Mellanox-SN4700-O32/buffers_defaults_t0.j2   | 15 +++++++++++++++
 .../Mellanox-SN4700-O32/buffers_defaults_t1.j2   | 16 +++++++++++++++-
 .../Mellanox-SN4700-O32/qos.json.j2              |  2 +-
 3 files changed, 31 insertions(+), 2 deletions(-)

diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/buffers_defaults_t0.j2 b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/buffers_defaults_t0.j2
index ebce770ec..7ab8d1573 100644
--- a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/buffers_defaults_t0.j2
+++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/buffers_defaults_t0.j2
@@ -12,10 +12,17 @@
     limitations under the License.
 #}
 {% set default_cable = '5m' %}
+{%- if ((SYSTEM_DEFAULTS is defined) and ('tunnel_qos_remap' in SYSTEM_DEFAULTS) and (SYSTEM_DEFAULTS['tunnel_qos_remap']['status'] == 'enabled')) -%}
+{% set ingress_lossless_pool_size =  '49381376' %}
+{% set ingress_lossless_pool_xoff  =  '5210112' %}
+{% set egress_lossless_pool_size =  '60817392' %}
+{% set egress_lossy_pool_size =  '49381376' %}
+{%- else -%}
 {% set ingress_lossless_pool_size = '51806208' %}
 {% set ingress_lossless_pool_xoff  = '3407872' %}
 {% set egress_lossless_pool_size =  '60817392' %}
 {% set egress_lossy_pool_size =  '51806208' %}
+{%- endif -%}
 
 {% import 'buffers_defaults_objects.j2' as defs with context %}
 
@@ -27,10 +34,18 @@
 {{ defs.generate_profile_lists(port_names_active, port_names_inactive) }}
 {%- endmacro %}
 
+{%- macro generate_queue_buffers_with_extra_lossless_queues_with_inactive_ports(port_names_active, port_names_extra_queues, port_names_inactive) %}
+{{ defs.generate_queue_buffers_with_extra_lossless_queues(port_names_active, port_names_extra_queues, port_names_inactive) }}
+{%- endmacro %}
+
 {%- macro generate_queue_buffers_with_inactive_ports(port_names_active, port_names_inactive) %}
 {{ defs.generate_queue_buffers(port_names_active, port_names_inactive) }}
 {%- endmacro %}
 
+{%- macro generate_pg_profiles_with_extra_lossless_pgs_with_inactive_ports(port_names_active, port_names_extra_pgs, port_names_inactive) %}
+{{ defs.generate_pg_profiles_with_extra_lossless_pgs(port_names_active, port_names_extra_pgs, port_names_inactive) }}
+{%- endmacro %}
+
 {%- macro generate_pg_profiles_with_inactive_ports(port_names_active, port_names_inactive) %}
 {{ defs.generate_pg_profiles(port_names_active, port_names_inactive) }}
 {%- endmacro %}
diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/buffers_defaults_t1.j2 b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/buffers_defaults_t1.j2
index 9d6fe3da0..d30bedeac 100644
--- a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/buffers_defaults_t1.j2
+++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/buffers_defaults_t1.j2
@@ -12,11 +12,17 @@
     limitations under the License.
 #}
 {% set default_cable = '40m' %}
+{%- if ((SYSTEM_DEFAULTS is defined) and ('tunnel_qos_remap' in SYSTEM_DEFAULTS) and (SYSTEM_DEFAULTS['tunnel_qos_remap']['status'] == 'enabled')) -%}
+{% set ingress_lossless_pool_size =  '38256640' %}
+{% set ingress_lossless_pool_xoff  =  '15089664' %}
+{% set egress_lossless_pool_size =  '60817392' %}
+{% set egress_lossy_pool_size =  '38256640' %}
+{%- else -%}
 {% set ingress_lossless_pool_size =  '45531136' %}
 {% set ingress_lossless_pool_xoff  =  '9682944' %}
 {% set egress_lossless_pool_size =  '60817392' %}
 {% set egress_lossy_pool_size =  '45531136' %}
-
+{%- endif -%}
 
 {% import 'buffers_defaults_objects.j2' as defs with context %}
 
@@ -28,10 +34,18 @@
 {{ defs.generate_profile_lists(port_names_active, port_names_inactive) }}
 {%- endmacro %}
 
+{%- macro generate_queue_buffers_with_extra_lossless_queues_with_inactive_ports(port_names_active, port_names_extra_queues, port_names_inactive) %}
+{{ defs.generate_queue_buffers_with_extra_lossless_queues(port_names_active, port_names_extra_queues, port_names_inactive) }}
+{%- endmacro %}
+
 {%- macro generate_queue_buffers_with_inactive_ports(port_names_active, port_names_inactive) %}
 {{ defs.generate_queue_buffers(port_names_active, port_names_inactive) }}
 {%- endmacro %}
 
+{%- macro generate_pg_profiles_with_extra_lossless_pgs_with_inactive_ports(port_names_active, port_names_extra_pgs, port_names_inactive) %}
+{{ defs.generate_pg_profiles_with_extra_lossless_pgs(port_names_active, port_names_extra_pgs, port_names_inactive) }}
+{%- endmacro %}
+
 {%- macro generate_pg_profiles_with_inactive_ports(port_names_active, port_names_inactive) %}
 {{ defs.generate_pg_profiles(port_names_active, port_names_inactive) }}
 {%- endmacro %}
diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/qos.json.j2 b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/qos.json.j2
index eccf286dc..48221aa2b 120000
--- a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/qos.json.j2
+++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/qos.json.j2
@@ -1 +1 @@
-../../x86_64-mlnx_msn2700-r0/ACS-MSN2700/qos.json.j2
\ No newline at end of file
+../../x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-C64/qos.json.j2
\ No newline at end of file

From 66e141b24d79007525d4a7f16c9a2bfa4312d62a Mon Sep 17 00:00:00 2001
From: zitingguo-ms <zitingguo@microsoft.com>
Date: Thu, 29 Aug 2024 02:32:46 +0800
Subject: [PATCH 0931/1115] [Knet driver] Upgrade Broadcom xgs saibcm-modules
 to 10.1 (#19327)

* commit changes under sdklt/ foloder

Signed-off-by: zitingguo-ms <zitingguo@microsoft.com>

* commit changes under saibcm-modules/ excpet sdklt/

Signed-off-by: zitingguo-ms <zitingguo@microsoft.com>

* upgrade saibcm-modules version to 10.1

Signed-off-by: zitingguo-ms <zitingguo@microsoft.com>

* update changelog

Signed-off-by: zitingguo-ms <zitingguo@microsoft.com>

* add dcb folder

Signed-off-by: zitingguo-ms <zitingguo@microsoft.com>

* move dcb to systems/linux/kernel/modules/

Signed-off-by: zitingguo-ms <zitingguo@microsoft.com>

* fix path

Signed-off-by: zitingguo-ms <zitingguo@microsoft.com>

* fix path

Signed-off-by: zitingguo-ms <zitingguo@microsoft.com>

* fix path

Signed-off-by: zitingguo-ms <zitingguo@microsoft.com>

* try fix include error

Signed-off-by: zitingguo-ms <zitingguo@microsoft.com>

* remove all generated files

Signed-off-by: zitingguo-ms <zitingguo@microsoft.com>

* add sdklt/bcmlrd/include/bcmlrd/chip/generated/ folder

Signed-off-by: zitingguo-ms <zitingguo@microsoft.com>

* add bcmltd/

Signed-off-by: zitingguo-ms <zitingguo@microsoft.com>

* Add missing folder

Signed-off-by: zitingguo-ms <zitingguo@microsoft.com>

* add missing folder

Signed-off-by: zitingguo-ms <zitingguo@microsoft.com>

* Add missing folders

Signed-off-by: zitingguo <zitingguo@microsoft.com>

* Make sure 'genl-packet' is built before 'bcmgenl'

Signed-off-by: zitingguo-ms <zitingguo@microsoft.com>

* sending original pkt size to psample module

Signed-off-by: zitingguo <zitingguo@microsoft.com>

* try pass semgrep check

Signed-off-by: zitingguo-ms <zitingguo@microsoft.com>

* try bypass semgrep check

Signed-off-by: zitingguo-ms <zitingguo@microsoft.com>

---------

Signed-off-by: zitingguo-ms <zitingguo@microsoft.com>
Signed-off-by: zitingguo <zitingguo@microsoft.com>
---
 platform/broadcom/sai-modules.mk              |     2 +-
 platform/broadcom/saibcm-modules/GFILE        |     0
 platform/broadcom/saibcm-modules/GFILES       |     0
 platform/broadcom/saibcm-modules/GLOG         |     2 +
 platform/broadcom/saibcm-modules/GPATH        |     0
 platform/broadcom/saibcm-modules/GRTAGS       |     0
 platform/broadcom/saibcm-modules/GTAGS        |     0
 .../broadcom/saibcm-modules/debian/changelog  |     6 +
 .../broadcom/saibcm-modules/include/ibde.h    |    11 +-
 .../broadcom/saibcm-modules/include/kcom.h    |    14 +-
 .../saibcm-modules/include/sal/core/sync.h    |    11 +-
 .../saibcm-modules/include/sal/core/thread.h  |    11 +-
 .../saibcm-modules/include/sal/types.h        |    11 +-
 .../saibcm-modules/include/sdk_config.h       |    11 +-
 .../saibcm-modules/include/soc/devids.h       |   322 +-
 .../broadcom/saibcm-modules/make/Make.config  |    55 +-
 .../broadcom/saibcm-modules/make/Make.depend  |    53 +-
 .../broadcom/saibcm-modules/make/Make.kernlib |    53 +-
 .../broadcom/saibcm-modules/make/Make.lib     |    55 +-
 .../broadcom/saibcm-modules/make/Make.linux   |    57 +-
 .../broadcom/saibcm-modules/make/Make.subdirs |    53 +-
 .../broadcom/saibcm-modules/make/Make.tools   |    53 +-
 .../saibcm-modules/make/Makefile.linux-gts    |    75 +-
 .../saibcm-modules/make/Makefile.linux-iproc  |    63 +-
 .../make/Makefile.linux-iproc-3_14            |    53 +-
 .../make/Makefile.linux-iproc-4_4             |    53 +-
 .../make/Makefile.linux-iproc_64              |    69 +-
 .../saibcm-modules/make/Makefile.linux-kernel |    53 +-
 .../make/Makefile.linux-kernel-2_6            |    62 +-
 .../make/Makefile.linux-kernel-3_6            |    53 +-
 .../make/Makefile.linux-kernel-4_4            |    53 +-
 .../make/Makefile.linux-kmodule               |    57 +-
 .../saibcm-modules/make/Makefile.linux-slk    |    58 +-
 .../make/Makefile.linux-x86-common-2_6        |    53 +-
 .../Makefile.linux-x86-generic-common-2_6     |    53 +-
 .../Makefile.linux-x86-smp_generic_64-2_6     |    61 +-
 .../saibcm-modules/make/Makefile.linux-xlr    |    75 +-
 .../broadcom/saibcm-modules/sdklt/Makefile    |    24 +-
 .../bcm56080_a0/bcm56080_a0_pdma_attach.c     |     2 +-
 .../bcm56690_a0/bcm56690_a0_pdma_attach.c     |    38 +
 .../bcm56780_a0/bcm56780_a0_pdma_attach.c     |     2 +-
 .../bcm56880_a0/bcm56880_a0_pdma_attach.c     |     2 +-
 .../bcm56890_a0/bcm56890_a0_pdma_attach.c     |     2 +-
 .../bcm56990_a0/bcm56990_a0_pdma_attach.c     |     2 +-
 .../bcm56990_b0/bcm56990_b0_pdma_attach.c     |     2 +-
 .../bcm56996_a0/bcm56996_a0_pdma_attach.c     |     2 +-
 .../bcm56996_b0/bcm56996_b0_pdma_attach.c     |     2 +-
 .../bcm56998_a0/bcm56998_a0_pdma_attach.c     |     2 +-
 .../bcm56999_a0/bcm56999_a0_pdma_attach.c     |     2 +-
 .../bcm78900_b0/bcm78900_b0_pdma_attach.c     |     2 +-
 .../bcm78905_a0/bcm78905_a0_pdma_attach.c     |    38 +
 .../bcmcnet/hmi/cmicd/bcmcnet_cmicd_pdma_hw.c |    13 +-
 .../hmi/cmicd/bcmcnet_cmicd_pdma_rxtx.c       |     2 +-
 .../hmi/cmicr/bcmcnet_cmicr2_pdma_rxtx.c      |   369 +
 .../bcmcnet/hmi/cmicr/bcmcnet_cmicr_pdma_hw.c |     8 +-
 .../hmi/cmicr/bcmcnet_cmicr_pdma_rxtx.c       |     8 +-
 .../bcmcnet/hmi/cmicx/bcmcnet_cmicx_pdma_hw.c |     2 +-
 .../hmi/cmicx/bcmcnet_cmicx_pdma_rxtx.c       |     2 +-
 .../bcmcnet/include/bcmcnet/bcmcnet_cmicd.h   |     2 +-
 .../bcmcnet/include/bcmcnet/bcmcnet_cmicr.h   |     4 +-
 .../bcmcnet/include/bcmcnet/bcmcnet_cmicr2.h  |    50 +
 .../include/bcmcnet/bcmcnet_cmicr_acc.h       |    28 +-
 .../bcmcnet/include/bcmcnet/bcmcnet_cmicx.h   |     2 +-
 .../bcmcnet/include/bcmcnet/bcmcnet_core.h    |    12 +-
 .../bcmcnet/include/bcmcnet/bcmcnet_dev.h     |     2 +-
 .../include/bcmcnet/bcmcnet_internal.h        |     2 +-
 .../bcmcnet/include/bcmcnet/bcmcnet_rxtx.h    |     2 +-
 .../bcmcnet/include/bcmcnet/bcmcnet_types.h   |     2 +-
 .../sdklt/bcmcnet/main/bcmcnet_core.c         |     2 +-
 .../sdklt/bcmcnet/main/bcmcnet_dev.c          |     6 +-
 .../sdklt/bcmcnet/main/bcmcnet_rxtx.c         |     2 +-
 .../bcmdrd/include/bcmdrd/bcmdrd_devlist.h    |   211 +-
 .../include/bcmdrd/bcmdrd_symbol_types.h      |   211 +
 .../bcmdrd/include/bcmdrd/bcmdrd_symbols.h    |  1139 ++
 .../bcmdrd/include/bcmdrd/bcmdrd_types.h      |   634 +
 .../sdklt/bcmdrd/include/bcmdrd_config.h      |    13 +-
 .../bcmdrd/include/bcmdrd_config_chips.h      |   276 +-
 .../include/bcmlrd/bcmlrd_local_types.h       |   127 +
 .../bcmlrd/include/bcmlrd/bcmlrd_variant.h    |     2 +-
 .../include/bcmlrd/chip/bcmlrd_chip_variant.h |     2 +-
 .../chip/generated/bcmlrd_variant_defs.h      |    39 +
 .../generated/bcmlrd_variant_defs_internal.h  |    56 +
 .../chip/generated/bcmlrd_variant_limits.h}   |    12 +-
 .../bcm56080_a0_lrd_variant_def.h}            |    11 +-
 .../bcm56690_a0_lrd_variant_def.h}            |    11 +-
 ...m56690_a0_dna_6_5_29_0_1_lrd_variant_def.h |    36 +
 .../bcm56780_a0_lrd_variant_def.h}            |    11 +-
 .../bcm56780_a0_cna_6_5_29_lrd_variant_def.h  |    36 +
 .../bcm56780_a0_dna_2_9_5_0_lrd_variant_def.h |    36 +
 ...m56780_a0_hna_6_5_29_2_1_lrd_variant_def.h |    36 +
 ...bcm56780_a0_ina_2_6_11_0_lrd_variant_def.h |    36 +
 .../bcm56880_a0/bcm56880_a0_lrd_variant_def.h |    36 +
 .../bcm56880_a0_cna_6_5_29_lrd_variant_def.h  |    36 +
 ...bcm56880_a0_dna_4_11_4_0_lrd_variant_def.h |    36 +
 ...m56880_a0_hna_6_5_29_2_2_lrd_variant_def.h |    36 +
 .../bcm56880_a0_nfa_2_1_7_0_lrd_variant_def.h |    36 +
 .../bcm56890_a0/bcm56890_a0_lrd_variant_def.h |    36 +
 .../bcm56890_a0_cna_6_5_29_lrd_variant_def.h  |    36 +
 ...m56890_a0_dna_6_5_29_1_2_lrd_variant_def.h |    36 +
 .../bcm56990_a0/bcm56990_a0_lrd_variant_def.h |    36 +
 .../bcm56990_b0/bcm56990_b0_lrd_variant_def.h |    36 +
 .../bcm56996_a0/bcm56996_a0_lrd_variant_def.h |    36 +
 .../bcm56996_b0/bcm56996_b0_lrd_variant_def.h |    36 +
 .../bcm56998_a0/bcm56998_a0_lrd_variant_def.h |    36 +
 .../bcm56999_a0/bcm56999_a0_lrd_variant_def.h |    36 +
 .../bcm78900_b0/bcm78900_b0_lrd_variant_def.h |    36 +
 .../bcm78905_a0/bcm78905_a0_lrd_variant_def.h |    36 +
 .../bcmltd/include/bcmltd/bcmltd_variant.h    |     2 +-
 .../include/bcmltd/chip/bcmltd_chip_variant.h |     2 +-
 .../include/bcmltd/chip/bcmltd_variant_defs.h |     2 +-
 .../generated/bcmltd_config_variant.h}        |    23 +-
 .../bcmltd_config_variant_internal.h          |    56 +
 .../chip/generated/bcmltd_variant_defs.h      |    38 +
 .../generated/bcmltd_variant_defs_internal.h  |    56 +
 .../chip/generated/bcmltd_variant_entry.h     |    57 +
 .../chip/generated/bcmltd_variant_limits.h    |    37 +
 .../bcm56080_a0_ltd_config_variant.h}         |    21 +-
 .../bcm56690_a0_ltd_config_variant.h}         |    21 +-
 ...690_a0_dna_6_5_29_0_1_ltd_config_variant.h |    49 +
 .../bcm56780_a0_ltd_config_variant.h}         |    21 +-
 ...cm56780_a0_cna_6_5_29_ltd_config_variant.h |    49 +
 ...m56780_a0_dna_2_9_5_0_ltd_config_variant.h |    49 +
 ...780_a0_hna_6_5_29_2_1_ltd_config_variant.h |    49 +
 ...56780_a0_ina_2_6_11_0_ltd_config_variant.h |    49 +
 .../bcm56880_a0_ltd_config_variant.h          |    45 +
 ...cm56880_a0_cna_6_5_29_ltd_config_variant.h |    49 +
 ...56880_a0_dna_4_11_4_0_ltd_config_variant.h |    49 +
 ...880_a0_hna_6_5_29_2_2_ltd_config_variant.h |    49 +
 ...m56880_a0_nfa_2_1_7_0_ltd_config_variant.h |    49 +
 .../bcm56890_a0_ltd_config_variant.h          |    45 +
 ...cm56890_a0_cna_6_5_29_ltd_config_variant.h |    49 +
 ...890_a0_dna_6_5_29_1_2_ltd_config_variant.h |    49 +
 .../bcm56990_a0_ltd_config_variant.h          |    45 +
 .../bcm56990_b0_ltd_config_variant.h          |    45 +
 .../bcm56996_a0_ltd_config_variant.h          |    45 +
 .../bcm56996_b0_ltd_config_variant.h          |    45 +
 .../bcm56998_a0_ltd_config_variant.h          |    45 +
 .../bcm56999_a0_ltd_config_variant.h          |    45 +
 .../bcm78900_b0_ltd_config_variant.h          |    45 +
 .../bcm78905_a0_ltd_config_variant.h          |    45 +
 .../bcm56080_a0/bcm56080_a0_ltd_variant_def.h |     2 +-
 .../bcm56690_a0/bcm56690_a0_ltd_variant_def.h |    37 +
 ...56690_a0_dna_6_5_29_0_1_ltd_variant_def.h} |    12 +-
 .../bcm56780_a0/bcm56780_a0_ltd_variant_def.h |     4 +-
 .../bcm56780_a0_cna_6_5_29_ltd_variant_def.h} |    12 +-
 .../bcm56780_a0_dna_2_9_5_0_ltd_variant_def.h |     4 +-
 ...m56780_a0_hna_6_5_29_2_1_ltd_variant_def.h |    37 +
 ...cm56780_a0_ina_2_6_11_0_ltd_variant_def.h} |    12 +-
 .../bcm56880_a0/bcm56880_a0_ltd_variant_def.h |     4 +-
 .../bcm56880_a0_cna_6_5_29_ltd_variant_def.h  |    37 +
 ...bcm56880_a0_dna_4_11_4_0_ltd_variant_def.h |     4 +-
 ...m56880_a0_hna_6_5_29_2_2_ltd_variant_def.h |    37 +
 .../bcm56880_a0_nfa_2_1_7_0_ltd_variant_def.h |    37 +
 .../bcm56890_a0/bcm56890_a0_ltd_variant_def.h |     4 +-
 .../bcm56890_a0_cna_6_5_29_ltd_variant_def.h  |    37 +
 ...bcm56890_a0_dna_4_0_17_0_ltd_variant_def.h |    37 -
 ...m56890_a0_dna_6_5_29_1_2_ltd_variant_def.h |    37 +
 .../bcm56990_a0/bcm56990_a0_ltd_variant_def.h |     4 +-
 .../bcm56990_b0/bcm56990_b0_ltd_variant_def.h |     4 +-
 .../bcm56996_a0/bcm56996_a0_ltd_variant_def.h |     4 +-
 .../bcm56996_b0/bcm56996_b0_ltd_variant_def.h |     4 +-
 .../bcm56998_a0/bcm56998_a0_ltd_variant_def.h |     4 +-
 .../bcm56999_a0/bcm56999_a0_ltd_variant_def.h |     4 +-
 .../bcm78900_b0/bcm78900_b0_ltd_variant_def.h |     4 +-
 .../bcm78905_a0/bcm78905_a0_ltd_variant_def.h |    37 +
 .../bcm56080_a0_ltd_variant_entry.h           |     2 +-
 .../bcm56690_a0_ltd_variant_entry.h           |    40 +
 ...690_a0_dna_6_5_29_0_1_ltd_variant_entry.h} |    14 +-
 .../bcm56780_a0_ltd_variant_entry.h           |     2 +-
 ...cm56780_a0_cna_6_5_29_ltd_variant_entry.h} |    14 +-
 ...cm56780_a0_dna_2_9_5_0_ltd_variant_entry.h |     2 +-
 ...6780_a0_hna_6_5_29_2_1_ltd_variant_entry.h |    40 +
 ...56780_a0_ina_2_6_11_0_ltd_variant_entry.h} |    14 +-
 .../bcm56880_a0_ltd_variant_entry.h           |     2 +-
 ...cm56880_a0_cna_6_5_29_ltd_variant_entry.h} |    14 +-
 ...m56880_a0_dna_4_11_4_0_ltd_variant_entry.h |     2 +-
 ...6880_a0_hna_6_5_29_2_2_ltd_variant_entry.h |    40 +
 ...cm56880_a0_nfa_2_1_7_0_ltd_variant_entry.h |    40 +
 .../bcm56890_a0_ltd_variant_entry.h           |     2 +-
 ...bcm56890_a0_cna_6_5_29_ltd_variant_entry.h |    40 +
 ...6890_a0_dna_6_5_29_1_2_ltd_variant_entry.h |    40 +
 .../bcm56990_a0_ltd_variant_entry.h           |     2 +-
 .../bcm56990_b0_ltd_variant_entry.h           |     2 +-
 .../bcm56996_a0_ltd_variant_entry.h           |     2 +-
 .../bcm56996_b0_ltd_variant_entry.h           |     2 +-
 .../bcm56998_a0_ltd_variant_entry.h           |     2 +-
 .../bcm56999_a0_ltd_variant_entry.h           |     2 +-
 .../bcm78900_b0_ltd_variant_entry.h           |     2 +-
 .../bcm78905_a0_ltd_variant_entry.h           |    40 +
 .../chip/bcm56080_a0/bcm56080_a0_pkt_lbhdr.c  |   331 +
 .../chip/bcm56080_a0/bcm56080_a0_pkt_rxpmd.c  |  1147 ++
 .../chip/bcm56080_a0/bcm56080_a0_pkt_txpmd.c  |  1316 ++
 .../chip/bcm56690_a0/bcm56690_a0_pkt_lbhdr.c  |   169 +
 .../chip/bcm56690_a0/bcm56690_a0_pkt_rxpmd.c  |   546 +
 .../bcm56690_a0/bcm56690_a0_pkt_rxpmd_field.c |   105 +
 .../chip/bcm56690_a0/bcm56690_a0_pkt_txpmd.c  |   598 +
 .../chip/bcm56780_a0/bcm56780_a0_pkt_lbhdr.c  |   169 +
 .../chip/bcm56780_a0/bcm56780_a0_pkt_rxpmd.c  |   558 +
 .../bcm56780_a0/bcm56780_a0_pkt_rxpmd_field.c |    95 +
 .../chip/bcm56780_a0/bcm56780_a0_pkt_txpmd.c  |   513 +
 .../chip/bcm56880_a0/bcm56880_a0_pkt_lbhdr.c  |   169 +
 .../chip/bcm56880_a0/bcm56880_a0_pkt_rxpmd.c  |   522 +
 .../bcm56880_a0/bcm56880_a0_pkt_rxpmd_field.c |    95 +
 .../chip/bcm56880_a0/bcm56880_a0_pkt_txpmd.c  |   513 +
 .../chip/bcm56890_a0/bcm56890_a0_pkt_lbhdr.c  |   169 +
 .../chip/bcm56890_a0/bcm56890_a0_pkt_rxpmd.c  |   546 +
 .../bcm56890_a0/bcm56890_a0_pkt_rxpmd_field.c |   107 +
 .../chip/bcm56890_a0/bcm56890_a0_pkt_txpmd.c  |   599 +
 .../chip/bcm56990_a0/bcm56990_a0_pkt_lbhdr.c  |   592 +
 .../chip/bcm56990_a0/bcm56990_a0_pkt_rxpmd.c  |  1086 ++
 .../chip/bcm56990_a0/bcm56990_a0_pkt_txpmd.c  |   526 +
 .../chip/bcm56990_b0/bcm56990_b0_pkt_lbhdr.c  |   592 +
 .../chip/bcm56990_b0/bcm56990_b0_pkt_rxpmd.c  |  1110 ++
 .../chip/bcm56990_b0/bcm56990_b0_pkt_txpmd.c  |   526 +
 .../chip/bcm56996_a0/bcm56996_a0_pkt_lbhdr.c  |   592 +
 .../chip/bcm56996_a0/bcm56996_a0_pkt_rxpmd.c  |  1110 ++
 .../chip/bcm56996_a0/bcm56996_a0_pkt_txpmd.c  |   526 +
 .../chip/bcm56996_b0/bcm56996_b0_pkt_lbhdr.c  |   592 +
 .../chip/bcm56996_b0/bcm56996_b0_pkt_rxpmd.c  |  1110 ++
 .../chip/bcm56996_b0/bcm56996_b0_pkt_txpmd.c  |   526 +
 .../chip/bcm56998_a0/bcm56998_a0_pkt_lbhdr.c  |   592 +
 .../chip/bcm56998_a0/bcm56998_a0_pkt_rxpmd.c  |  1140 ++
 .../chip/bcm56998_a0/bcm56998_a0_pkt_txpmd.c  |   526 +
 .../chip/bcm56999_a0/bcm56999_a0_pkt_lbhdr.c  |   592 +
 .../chip/bcm56999_a0/bcm56999_a0_pkt_rxpmd.c  |  1110 ++
 .../chip/bcm56999_a0/bcm56999_a0_pkt_txpmd.c  |   526 +
 .../chip/bcm78900_b0/bcm78900_b0_pkt_lbhdr.c  |   347 +
 .../chip/bcm78900_b0/bcm78900_b0_pkt_rxpmd.c  |  1124 ++
 .../chip/bcm78900_b0/bcm78900_b0_pkt_txpmd.c  |   871 ++
 .../chip/bcm78905_a0/bcm78905_a0_pkt_lbhdr.c  |   347 +
 .../chip/bcm78905_a0/bcm78905_a0_pkt_rxpmd.c  |  1124 ++
 .../chip/bcm78905_a0/bcm78905_a0_pkt_txpmd.c  |   871 ++
 .../sdklt/bcmpkt/flexhdr/bcmpkt_flexhdr.c     |   516 +
 .../bcmpkt/include/bcmpkt/bcmpkt_flexhdr.h    |   351 +
 .../include/bcmpkt/bcmpkt_flexhdr_field.h     |   100 +
 .../include/bcmpkt/bcmpkt_flexhdr_internal.h  |   160 +
 .../sdklt/bcmpkt/include/bcmpkt/bcmpkt_hg3.h  |    49 +
 .../bcmpkt/include/bcmpkt/bcmpkt_higig_defs.h |   346 +
 .../bcmpkt/include/bcmpkt/bcmpkt_lbhdr.h      |   139 +
 .../bcmpkt/include/bcmpkt/bcmpkt_lbhdr_defs.h |   344 +
 .../include/bcmpkt/bcmpkt_lbhdr_field.h       |    59 +
 .../include/bcmpkt/bcmpkt_lbhdr_internal.h    |    63 +
 .../sdklt/bcmpkt/include/bcmpkt/bcmpkt_pmd.h  |    58 +
 .../include/bcmpkt/bcmpkt_pmd_internal.h      |    61 +
 .../bcmpkt/include/bcmpkt/bcmpkt_rcpu_hdr.h   |   125 +
 .../bcmpkt/include/bcmpkt/bcmpkt_rxpmd.h      |   266 +
 .../bcmpkt/include/bcmpkt/bcmpkt_rxpmd_defs.h |   928 ++
 .../bcmpkt/include/bcmpkt/bcmpkt_rxpmd_fid.h  |    83 +
 .../include/bcmpkt/bcmpkt_rxpmd_field.h       |    80 +
 .../include/bcmpkt/bcmpkt_rxpmd_internal.h    |    82 +
 .../include/bcmpkt/bcmpkt_rxpmd_match_id.h    |   175 +
 .../bcmpkt/bcmpkt_rxpmd_match_id_defs.h       |    38 +
 .../bcmpkt/include/bcmpkt/bcmpkt_txpmd.h      |   157 +
 .../bcmpkt/include/bcmpkt/bcmpkt_txpmd_defs.h |   546 +
 .../include/bcmpkt/bcmpkt_txpmd_field.h       |    59 +
 .../include/bcmpkt/bcmpkt_txpmd_internal.h    |    62 +
 .../sdklt/bcmpkt/include/bcmpkt/bcmpkt_util.h |    54 +
 .../bcm56690_a0/bcmpkt_bcm56690_a0_rxpmd.h    |    60 +
 .../bcm56780_a0/bcmpkt_bcm56780_a0_rxpmd.h    |    60 +
 .../bcm56880_a0/bcmpkt_bcm56880_a0_rxpmd.h    |    60 +
 .../bcm56890_a0/bcmpkt_bcm56890_a0_rxpmd.h    |    60 +
 ...cm56690_a0_dna_6_5_29_0_1_bcmpkt_flexhdr.h |   182 +
 ...90_a0_dna_6_5_29_0_1_bcmpkt_flexhdr_data.h |  1392 ++
 ...a0_dna_6_5_29_0_1_bcmpkt_rxpmd_flex_data.h |   191 +
 ...na_6_5_29_0_1_bcmpkt_rxpmd_match_id_defs.h |   505 +
 .../bcm56780_a0_cna_6_5_29_bcmpkt_flexhdr.h   |    96 +
 ...m56780_a0_cna_6_5_29_bcmpkt_flexhdr_data.h |   592 +
 ...780_a0_cna_6_5_29_bcmpkt_rxpmd_flex_data.h |   124 +
 ...a0_cna_6_5_29_bcmpkt_rxpmd_match_id_defs.h |   213 +
 .../bcm56780_a0_dna_2_9_5_0_bcmpkt_flexhdr.h  |   180 +
 ...56780_a0_dna_2_9_5_0_bcmpkt_flexhdr_data.h |  1343 ++
 ...80_a0_dna_2_9_5_0_bcmpkt_rxpmd_flex_data.h |   180 +
 ...0_dna_2_9_5_0_bcmpkt_rxpmd_match_id_defs.h |   415 +
 ...cm56780_a0_hna_6_5_29_2_1_bcmpkt_flexhdr.h |   174 +
 ...80_a0_hna_6_5_29_2_1_bcmpkt_flexhdr_data.h |  1258 ++
 ...a0_hna_6_5_29_2_1_bcmpkt_rxpmd_flex_data.h |   181 +
 ...na_6_5_29_2_1_bcmpkt_rxpmd_match_id_defs.h |   405 +
 .../bcm56780_a0_ina_2_6_11_0_bcmpkt_flexhdr.h |   166 +
 ...6780_a0_ina_2_6_11_0_bcmpkt_flexhdr_data.h |  1258 ++
 ...0_a0_ina_2_6_11_0_bcmpkt_rxpmd_flex_data.h |   178 +
 ..._ina_2_6_11_0_bcmpkt_rxpmd_match_id_defs.h |   409 +
 .../bcm56880_a0_cna_6_5_29_bcmpkt_flexhdr.h   |    92 +
 ...m56880_a0_cna_6_5_29_bcmpkt_flexhdr_data.h |   539 +
 ...880_a0_cna_6_5_29_bcmpkt_rxpmd_flex_data.h |   117 +
 ...a0_cna_6_5_29_bcmpkt_rxpmd_match_id_defs.h |   209 +
 .../bcm56880_a0_dna_4_11_4_0_bcmpkt_flexhdr.h |   174 +
 ...6880_a0_dna_4_11_4_0_bcmpkt_flexhdr_data.h |  1276 ++
 ...0_a0_dna_4_11_4_0_bcmpkt_rxpmd_flex_data.h |   163 +
 ..._dna_4_11_4_0_bcmpkt_rxpmd_match_id_defs.h |   405 +
 ...cm56880_a0_hna_6_5_29_2_2_bcmpkt_flexhdr.h |   170 +
 ...80_a0_hna_6_5_29_2_2_bcmpkt_flexhdr_data.h |  1212 ++
 ...a0_hna_6_5_29_2_2_bcmpkt_rxpmd_flex_data.h |   165 +
 ...na_6_5_29_2_2_bcmpkt_rxpmd_match_id_defs.h |   395 +
 .../bcm56880_a0_nfa_2_1_7_0_bcmpkt_flexhdr.h  |   158 +
 ...56880_a0_nfa_2_1_7_0_bcmpkt_flexhdr_data.h |  1126 ++
 ...80_a0_nfa_2_1_7_0_bcmpkt_rxpmd_flex_data.h |   173 +
 ...0_nfa_2_1_7_0_bcmpkt_rxpmd_match_id_defs.h |   415 +
 .../bcm56890_a0_cna_6_5_29_bcmpkt_flexhdr.h   |    96 +
 ...m56890_a0_cna_6_5_29_bcmpkt_flexhdr_data.h |   592 +
 ...890_a0_cna_6_5_29_bcmpkt_rxpmd_flex_data.h |   124 +
 ...a0_cna_6_5_29_bcmpkt_rxpmd_match_id_defs.h |   213 +
 ...cm56890_a0_dna_6_5_29_1_2_bcmpkt_flexhdr.h |   184 +
 ...90_a0_dna_6_5_29_1_2_bcmpkt_flexhdr_data.h |  1405 ++
 ...a0_dna_6_5_29_1_2_bcmpkt_rxpmd_flex_data.h |   198 +
 ...na_6_5_29_1_2_bcmpkt_rxpmd_match_id_defs.h |   515 +
 .../sdklt/bcmpkt/lbpmd/bcmpkt_lbhdr.c         |   203 +
 .../sdklt/bcmpkt/rxpmd/bcmpkt_rxpmd.c         |   412 +
 .../bcmpkt/rxpmd/bcmpkt_rxpmd_match_id.c      |   228 +
 .../sdklt/bcmpkt/txpmd/bcmpkt_txpmd.c         |   256 +
 .../sdklt/bcmpkt/util/bcmpkt_util.c           |    78 +
 ..._a0_dna_6_5_29_0_1_bcmpkt_rxpmd_match_id.c |  6760 +++++++++
 .../bcm56690_a0_dna_6_5_29_0_1_pkt_flexhdr.c  | 10552 ++++++++++++++
 ...6780_a0_cna_6_5_29_bcmpkt_rxpmd_match_id.c |  1136 ++
 .../bcm56780_a0_cna_6_5_29_pkt_flexhdr.c      |  4021 ++++++
 ...780_a0_dna_2_9_5_0_bcmpkt_rxpmd_match_id.c |  2550 ++++
 .../bcm56780_a0_dna_2_9_5_0_pkt_flexhdr.c     |  8523 +++++++++++
 ..._a0_hna_6_5_29_2_1_bcmpkt_rxpmd_match_id.c |  2480 ++++
 .../bcm56780_a0_hna_6_5_29_2_1_pkt_flexhdr.c  |  8370 +++++++++++
 ...80_a0_ina_2_6_11_0_bcmpkt_rxpmd_match_id.c |  2508 ++++
 .../bcm56780_a0_ina_2_6_11_0_pkt_flexhdr.c    |  8131 +++++++++++
 ...6880_a0_cna_6_5_29_bcmpkt_rxpmd_match_id.c |  1108 ++
 .../bcm56880_a0_cna_6_5_29_pkt_flexhdr.c      |  3453 +++++
 ...80_a0_dna_4_11_4_0_bcmpkt_rxpmd_match_id.c |  2480 ++++
 .../bcm56880_a0_dna_4_11_4_0_pkt_flexhdr.c    |  7665 ++++++++++
 ..._a0_hna_6_5_29_2_2_bcmpkt_rxpmd_match_id.c |  2410 ++++
 .../bcm56880_a0_hna_6_5_29_2_2_pkt_flexhdr.c  |  7336 ++++++++++
 ...880_a0_nfa_2_1_7_0_bcmpkt_rxpmd_match_id.c |  2550 ++++
 .../bcm56880_a0_nfa_2_1_7_0_pkt_flexhdr.c     |  6947 +++++++++
 ...6890_a0_cna_6_5_29_bcmpkt_rxpmd_match_id.c |  1443 ++
 .../bcm56890_a0_cna_6_5_29_pkt_flexhdr.c      |  4021 ++++++
 ..._a0_dna_6_5_29_1_2_bcmpkt_rxpmd_match_id.c |  7234 ++++++++++
 .../bcm56890_a0_dna_6_5_29_1_2_pkt_flexhdr.c  | 11636 ++++++++++++++++
 .../saibcm-modules/sdklt/linux/bcmgenl/Kbuild |    63 +
 .../sdklt/linux/bcmgenl/Makefile              |    55 +
 .../sdklt/linux/bcmgenl/bcmgenl.c             |   608 +
 .../sdklt/linux/bcmgenl/bcmgenl.h             |   165 +
 .../sdklt/linux/bcmgenl/bcmgenl_packet.c      |   817 ++
 .../sdklt/linux/bcmgenl/bcmgenl_packet.h      |    29 +
 .../sdklt/linux/bcmgenl/bcmgenl_psample.c     |  1076 ++
 .../sdklt/linux/bcmgenl/bcmgenl_psample.h     |    35 +
 .../saibcm-modules/sdklt/linux/bde/Kbuild     |     3 +-
 .../saibcm-modules/sdklt/linux/bde/Makefile   |     2 +-
 .../saibcm-modules/sdklt/linux/bde/ngbde.h    |     2 +-
 .../sdklt/linux/bde/ngbde_dma.c               |     6 +-
 .../sdklt/linux/bde/ngbde_iio.c               |     2 +-
 .../sdklt/linux/bde/ngbde_intr.c              |     2 +-
 .../sdklt/linux/bde/ngbde_ioctl.c             |     2 +-
 .../sdklt/linux/bde/ngbde_iproc_probe.c       |     2 +-
 .../sdklt/linux/bde/ngbde_kapi.c              |     2 +-
 .../sdklt/linux/bde/ngbde_main.c              |     2 +-
 .../sdklt/linux/bde/ngbde_paxb.c              |     2 +-
 .../sdklt/linux/bde/ngbde_pci_probe.c         |     2 +-
 .../sdklt/linux/bde/ngbde_pgmem.c             |     2 +-
 .../sdklt/linux/bde/ngbde_pio.c               |     2 +-
 .../sdklt/linux/bde/ngbde_procfs.c            |     6 +-
 .../sdklt/linux/bde/ngbde_swdev.c             |     2 +-
 .../sdklt/linux/genl-packet/Kbuild            |    13 +
 .../sdklt/linux/genl-packet/Makefile          |    20 +
 .../sdklt/linux/genl-packet/genl-packet.c     |   118 +
 .../sdklt/linux/include/kernel/README         |     8 +
 .../linux/include/kernel/net/genl-packet.h    |     9 +
 .../include/kernel/uapi/linux/genl-packet.h   |    24 +
 .../sdklt/linux/include/lkm/lkm.h             |     2 +-
 .../sdklt/linux/include/lkm/ngbde_ioctl.h     |     2 +-
 .../sdklt/linux/include/lkm/ngbde_kapi.h      |     2 +-
 .../sdklt/linux/include/lkm/ngedk_ioctl.h     |     4 +-
 .../sdklt/linux/include/lkm/ngedk_kapi.h      |    39 +
 .../sdklt/linux/include/lkm/ngknet_dev.h      |    22 +-
 .../sdklt/linux/include/lkm/ngknet_ioctl.h    |     2 +-
 .../sdklt/linux/include/lkm/ngknet_kapi.h     |    56 +-
 .../linux/include/lkm/ngptpclock_ioctl.h      |    43 +
 .../saibcm-modules/sdklt/linux/knet/Kbuild    |     3 +-
 .../saibcm-modules/sdklt/linux/knet/Makefile  |     6 +-
 .../sdklt/linux/knet/ngknet_buff.c            |    22 +-
 .../sdklt/linux/knet/ngknet_buff.h            |     2 +-
 .../sdklt/linux/knet/ngknet_callback.c        |   243 +-
 .../sdklt/linux/knet/ngknet_callback.h        |    53 +-
 .../sdklt/linux/knet/ngknet_dep.h             |     2 +-
 .../sdklt/linux/knet/ngknet_extra.c           |    79 +-
 .../sdklt/linux/knet/ngknet_extra.h           |    19 +-
 .../sdklt/linux/knet/ngknet_linux.c           |     2 +-
 .../sdklt/linux/knet/ngknet_linux.h           |    13 +-
 .../sdklt/linux/knet/ngknet_main.c            |   275 +-
 .../sdklt/linux/knet/ngknet_main.h            |    14 +-
 .../sdklt/linux/knet/ngknet_procfs.c          |     2 +-
 .../sdklt/linux/knet/ngknet_procfs.h          |     2 +-
 .../sdklt/linux/knet/ngknet_ptp.c             |    42 +-
 .../sdklt/linux/knet/ngknet_ptp.h             |    18 +-
 .../saibcm-modules/sdklt/linux/knetcb/Kbuild  |    14 +-
 .../sdklt/linux/knetcb/Makefile               |    26 +-
 .../sdklt/linux/knetcb/ngknetcb_main.c        |    63 +-
 .../sdklt/linux/knetcb/psample-cb.c           |   974 --
 .../sdklt/linux/knetcb/psample-cb.h           |    57 -
 .../saibcm-modules/sdklt/make/kpmd.mk         |   202 +
 .../broadcom/saibcm-modules/sdklt/make/lkm.mk |     8 +-
 .../saibcm-modules/sdklt/make/makeutils.mk    |    42 +
 .../saibcm-modules/sdklt/make/partial.mk      |    65 +
 .../sdklt/sal/include/sal/sal_libc.h          |   266 +
 .../sdklt/sal/include/sal/sal_linux.h         |   170 +
 .../sdklt/sal/include/sal/sal_types.h         |   154 +
 .../sdklt/sal/include/sal_config.h            |   254 +
 .../sdklt/shr/bitop/shr_bitop_range_clear.c   |    79 +
 .../sdklt/shr/include/shr/shr_bitop.h         |   411 +
 .../sdklt/shr/include/shr/shr_error.h         |     2 +-
 .../sdklt/shr/include/shr/shr_types.h         |   161 +
 .../systems/bde/linux/include/linux-bde.h     |    17 +-
 .../systems/bde/linux/include/linux_dma.h     |    15 +-
 .../systems/bde/linux/include/mpool.h         |    11 +-
 .../systems/bde/linux/kernel/Makefile         |    53 +-
 .../bde/linux/kernel/linux-kernel-bde.c       |   212 +-
 .../systems/bde/linux/kernel/linux_dma.c      |    11 +-
 .../systems/bde/linux/kernel/linux_shbde.c    |    11 +-
 .../systems/bde/linux/kernel/linux_shbde.h    |    11 +-
 .../systems/bde/linux/shared/mpool.c          |    11 +-
 .../systems/bde/linux/user/kernel/Makefile    |    55 +-
 .../bde/linux/user/kernel/linux-user-bde.c    |   193 +-
 .../bde/linux/user/kernel/linux-user-bde.h    |    11 +-
 .../systems/bde/shared/include/shbde.h        |    11 +-
 .../systems/bde/shared/include/shbde_iproc.h  |    11 +-
 .../systems/bde/shared/include/shbde_mdio.h   |    11 +-
 .../systems/bde/shared/include/shbde_pci.h    |    11 +-
 .../systems/bde/shared/shbde_iproc.c          |    77 +-
 .../systems/bde/shared/shbde_mdio.c           |    11 +-
 .../systems/bde/shared/shbde_pci.c            |    11 +-
 .../systems/linux/kernel/modules/Makefile     |    53 +-
 .../linux/kernel/modules/bcm-genl/Makefile    |    91 +
 .../kernel/modules/bcm-genl/bcm-genl-dev.c    |   199 +
 .../kernel/modules/bcm-genl/bcm-genl-dev.h    |    55 +
 .../kernel/modules/bcm-genl/bcm-genl-netif.c  |   293 +
 .../kernel/modules/bcm-genl/bcm-genl-netif.h  |    69 +
 .../kernel/modules/bcm-genl/bcm-genl-packet.c |   664 +
 .../kernel/modules/bcm-genl/bcm-genl-packet.h |    38 +
 .../bcm-genl-psample.c}                       |   754 +-
 .../modules/bcm-genl/bcm-genl-psample.h       |    44 +
 .../linux/kernel/modules/bcm-genl/bcm-genl.c  |   253 +
 .../linux/kernel/modules/bcm-knet/Makefile    |    53 +-
 .../linux/kernel/modules/bcm-knet/bcm-knet.c  |  1362 +-
 .../systems/linux/kernel/modules/dcb/README   |   114 +
 .../systems/linux/kernel/modules/dcb/RELEASE  |     1 +
 .../dcb/include/appl/dcb/dcb_handler.h        |   226 +
 .../modules/dcb/include/appl/dcb/dcb_int.h    |   162 +
 .../kernel/modules/dcb/include/sal/types.h    |    85 +
 .../kernel/modules/dcb/include/sdk_config.h   |    30 +
 .../kernel/modules/dcb/include/shared/bsl.h   |    56 +
 .../kernel/modules/dcb/include/shared/rx.h    |   621 +
 .../kernel/modules/dcb/include/soc/dcb.h      |   354 +
 .../modules/dcb/include/soc/dcbformats.h      |   552 +
 .../kernel/modules/dcb/include/soc/defs.h     |  2742 ++++
 .../kernel/modules/dcb/include/soc/devids.h   |  2149 +++
 .../kernel/modules/dcb/include/soc/drv.h      |    39 +
 .../kernel/modules/dcb/include/soc/enet.h     |    30 +
 .../kernel/modules/dcb/include/soc/higig.h    |  1021 ++
 .../kernel/modules/dcb/include/soc/maxdef.h   |    30 +
 .../linux/kernel/modules/dcb/include/soc/rx.h |   269 +
 .../include/soc/shared/dcbformats/type19.h    |   247 +
 .../include/soc/shared/dcbformats/type23.h    |   298 +
 .../include/soc/shared/dcbformats/type24.h    |   280 +
 .../include/soc/shared/dcbformats/type26.h    |   335 +
 .../include/soc/shared/dcbformats/type29.h    |   339 +
 .../include/soc/shared/dcbformats/type31.h    |   251 +
 .../include/soc/shared/dcbformats/type32.h    |   294 +
 .../include/soc/shared/dcbformats/type33.h    |   328 +
 .../include/soc/shared/dcbformats/type34.h    |   251 +
 .../include/soc/shared/dcbformats/type35.h    |   328 +
 .../include/soc/shared/dcbformats/type36.h    |   358 +
 .../include/soc/shared/dcbformats/type37.h    |   251 +
 .../include/soc/shared/dcbformats/type38.h    |   288 +
 .../kernel/modules/dcb/include/soc/types.h    |    41 +
 .../linux/kernel/modules/dcb/make/Makefile    |   153 +
 .../modules/dcb/src/appl/dcb/dcb_handler.c    |   243 +
 .../modules/dcb/src/appl/test/dcb_test.c      |   200 +
 .../kernel/modules/dcb/src/soc/common/dcb.c   |  4891 +++++++
 .../linux/kernel/modules/genl-packet/Makefile |    96 +
 .../kernel/modules/genl-packet/genl-packet.c  |   118 +
 .../linux/kernel/modules/include/bcm-knet.h   |    55 +-
 .../linux/kernel/modules/include/gmodule.h    |    11 +-
 .../kernel/modules/include/kernel/README      |     8 +
 .../modules/include/kernel/net/genl-packet.h  |     9 +
 .../include/kernel/uapi/linux/genl-packet.h   |    25 +
 .../linux/kernel/modules/include/lkm.h        |    11 +-
 .../linux/kernel/modules/knet-cb/Makefile     |    73 +-
 .../linux/kernel/modules/knet-cb/knet-cb.c    |    59 +-
 .../linux/kernel/modules/knet-cb/psample-cb.h |    58 -
 .../linux/kernel/modules/shared/Makefile      |    53 +-
 .../linux/kernel/modules/shared/gmodule.c     |    11 +-
 .../linux/kernel/modules/shared/ksal.c        |    32 +-
 .../systems/linux/user/common/Makefile        |   151 +-
 .../systems/linux/user/gts/Makefile           |    53 +-
 .../systems/linux/user/iproc-3_14/Makefile    |    53 +-
 .../systems/linux/user/iproc-4_4/Makefile     |    53 +-
 .../systems/linux/user/iproc/Makefile         |    55 +-
 .../systems/linux/user/iproc_64/Makefile      |    55 +-
 .../systems/linux/user/slk/Makefile           |    53 +-
 .../user/x86-smp_generic_64-2_6/Makefile      |    53 +-
 .../systems/linux/user/xlr/Makefile           |    53 +-
 .../broadcom/saibcm-modules/tools/mktool.pl   |    53 +-
 496 files changed, 200183 insertions(+), 4050 deletions(-)
 create mode 100644 platform/broadcom/saibcm-modules/GFILE
 create mode 100644 platform/broadcom/saibcm-modules/GFILES
 create mode 100644 platform/broadcom/saibcm-modules/GLOG
 create mode 100644 platform/broadcom/saibcm-modules/GPATH
 create mode 100644 platform/broadcom/saibcm-modules/GRTAGS
 create mode 100644 platform/broadcom/saibcm-modules/GTAGS
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56690_a0/bcm56690_a0_pdma_attach.c
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm78905_a0/bcm78905_a0_pdma_attach.c
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicr/bcmcnet_cmicr2_pdma_rxtx.c
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicr2.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd/bcmdrd_symbol_types.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd/bcmdrd_symbols.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd/bcmdrd_types.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/bcmlrd_local_types.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/chip/generated/bcmlrd_variant_defs.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/chip/generated/bcmlrd_variant_defs_internal.h
 rename platform/broadcom/saibcm-modules/sdklt/{bcmltd/include/bcmltd/defs/generated/bcm56880_a0/utltm/bcm56880_a0_utltm_ltd_variant_def.h => bcmlrd/include/bcmlrd/chip/generated/bcmlrd_variant_limits.h} (77%)
 rename platform/broadcom/saibcm-modules/sdklt/{bcmltd/include/bcmltd/defs/generated/bcm56880_a0/utcfg/bcm56880_a0_utcfg_ltd_variant_def.h => bcmlrd/include/bcmlrd/defs/generated/bcm56080_a0/bcm56080_a0_lrd_variant_def.h} (77%)
 rename platform/broadcom/saibcm-modules/sdklt/{bcmltd/include/bcmltd/defs/generated/bcm56880_a0/utlrd/bcm56880_a0_utlrd_ltd_variant_def.h => bcmlrd/include/bcmlrd/defs/generated/bcm56690_a0/bcm56690_a0_lrd_variant_def.h} (77%)
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_lrd_variant_def.h
 rename platform/broadcom/saibcm-modules/sdklt/{bcmltd/include/bcmltd/defs/generated/bcm56880_a0/cna_1_2_13/bcm56880_a0_cna_1_2_13_ltd_variant_def.h => bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/bcm56780_a0_lrd_variant_def.h} (76%)
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_lrd_variant_def.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_lrd_variant_def.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_lrd_variant_def.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_lrd_variant_def.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/bcm56880_a0_lrd_variant_def.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_lrd_variant_def.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_lrd_variant_def.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_lrd_variant_def.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_lrd_variant_def.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56890_a0/bcm56890_a0_lrd_variant_def.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_lrd_variant_def.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_lrd_variant_def.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56990_a0/bcm56990_a0_lrd_variant_def.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56990_b0/bcm56990_b0_lrd_variant_def.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56996_a0/bcm56996_a0_lrd_variant_def.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56996_b0/bcm56996_b0_lrd_variant_def.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56998_a0/bcm56998_a0_lrd_variant_def.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56999_a0/bcm56999_a0_lrd_variant_def.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78900_b0/bcm78900_b0_lrd_variant_def.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78905_a0/bcm78905_a0_lrd_variant_def.h
 rename platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/{entry/generated/bcm56780_a0/hna_1_2_10_0/bcm56780_a0_hna_1_2_10_0_ltd_variant_entry.h => chip/generated/bcmltd_config_variant.h} (63%)
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_config_variant_internal.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_defs.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_defs_internal.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_entry.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_limits.h
 rename platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/{entry/generated/bcm56880_a0/utcfg/bcm56880_a0_utcfg_ltd_variant_entry.h => conf/generated/bcm56080_a0/bcm56080_a0_ltd_config_variant.h} (66%)
 rename platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/{entry/generated/bcm56880_a0/utlrd/bcm56880_a0_utlrd_ltd_variant_entry.h => conf/generated/bcm56690_a0/bcm56690_a0_ltd_config_variant.h} (66%)
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_ltd_config_variant.h
 rename platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/{entry/generated/bcm56880_a0/utltm/bcm56880_a0_utltm_ltd_variant_entry.h => conf/generated/bcm56780_a0/bcm56780_a0_ltd_config_variant.h} (66%)
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_ltd_config_variant.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_ltd_config_variant.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_ltd_config_variant.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_ltd_config_variant.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/bcm56880_a0_ltd_config_variant.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_ltd_config_variant.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_ltd_config_variant.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_ltd_config_variant.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_ltd_config_variant.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56890_a0/bcm56890_a0_ltd_config_variant.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_ltd_config_variant.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_ltd_config_variant.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56990_a0/bcm56990_a0_ltd_config_variant.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56990_b0/bcm56990_b0_ltd_config_variant.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56996_a0/bcm56996_a0_ltd_config_variant.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56996_b0/bcm56996_b0_ltd_config_variant.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56998_a0/bcm56998_a0_ltd_config_variant.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56999_a0/bcm56999_a0_ltd_config_variant.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78900_b0/bcm78900_b0_ltd_config_variant.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78905_a0/bcm78905_a0_ltd_config_variant.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56690_a0/bcm56690_a0_ltd_variant_def.h
 rename platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/{bcm56880_a0/hna_1_2_10_0/bcm56880_a0_hna_1_2_10_0_ltd_variant_def.h => bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_ltd_variant_def.h} (75%)
 rename platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/{cna_1_2_13/bcm56780_a0_cna_1_2_13_ltd_variant_def.h => cna_6_5_29/bcm56780_a0_cna_6_5_29_ltd_variant_def.h} (76%)
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_ltd_variant_def.h
 rename platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/{hna_1_2_10_0/bcm56780_a0_hna_1_2_10_0_ltd_variant_def.h => ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_ltd_variant_def.h} (75%)
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_ltd_variant_def.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_ltd_variant_def.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_ltd_variant_def.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_ltd_variant_def.h
 delete mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/dna_4_0_17_0/bcm56890_a0_dna_4_0_17_0_ltd_variant_def.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_ltd_variant_def.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78905_a0/bcm78905_a0_ltd_variant_def.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56690_a0/bcm56690_a0_ltd_variant_entry.h
 rename platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/{bcm56880_a0/hna_1_2_10_0/bcm56880_a0_hna_1_2_10_0_ltd_variant_entry.h => bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_ltd_variant_entry.h} (63%)
 rename platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/{cna_1_2_13/bcm56780_a0_cna_1_2_13_ltd_variant_entry.h => cna_6_5_29/bcm56780_a0_cna_6_5_29_ltd_variant_entry.h} (66%)
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_ltd_variant_entry.h
 rename platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/{bcm56890_a0/dna_4_0_17_0/bcm56890_a0_dna_4_0_17_0_ltd_variant_entry.h => bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_ltd_variant_entry.h} (65%)
 rename platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/{cna_1_2_13/bcm56880_a0_cna_1_2_13_ltd_variant_entry.h => cna_6_5_29/bcm56880_a0_cna_6_5_29_ltd_variant_entry.h} (66%)
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_ltd_variant_entry.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_ltd_variant_entry.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_ltd_variant_entry.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_ltd_variant_entry.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78905_a0/bcm78905_a0_ltd_variant_entry.h
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 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56080_a0/bcm56080_a0_pkt_rxpmd.c
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 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56690_a0/bcm56690_a0_pkt_txpmd.c
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 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56880_a0/bcm56880_a0_pkt_txpmd.c
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 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pkt_rxpmd_field.c
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pkt_txpmd.c
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_a0/bcm56990_a0_pkt_lbhdr.c
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_a0/bcm56990_a0_pkt_rxpmd.c
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 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_b0/bcm56990_b0_pkt_lbhdr.c
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_b0/bcm56990_b0_pkt_rxpmd.c
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_b0/bcm56990_b0_pkt_txpmd.c
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_a0/bcm56996_a0_pkt_lbhdr.c
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_a0/bcm56996_a0_pkt_rxpmd.c
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_a0/bcm56996_a0_pkt_txpmd.c
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_b0/bcm56996_b0_pkt_lbhdr.c
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_b0/bcm56996_b0_pkt_rxpmd.c
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_b0/bcm56996_b0_pkt_txpmd.c
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56998_a0/bcm56998_a0_pkt_lbhdr.c
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 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56999_a0/bcm56999_a0_pkt_lbhdr.c
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56999_a0/bcm56999_a0_pkt_rxpmd.c
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56999_a0/bcm56999_a0_pkt_txpmd.c
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78900_b0/bcm78900_b0_pkt_lbhdr.c
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78900_b0/bcm78900_b0_pkt_rxpmd.c
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78900_b0/bcm78900_b0_pkt_txpmd.c
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78905_a0/bcm78905_a0_pkt_lbhdr.c
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78905_a0/bcm78905_a0_pkt_rxpmd.c
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78905_a0/bcm78905_a0_pkt_txpmd.c
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/flexhdr/bcmpkt_flexhdr.c
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_flexhdr.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_flexhdr_field.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_flexhdr_internal.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_hg3.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_higig_defs.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_lbhdr.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_lbhdr_defs.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_lbhdr_field.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_lbhdr_internal.h
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 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd.h
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 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_txpmd.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_txpmd_defs.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_txpmd_field.h
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 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56690_a0/bcmpkt_bcm56690_a0_rxpmd.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56780_a0/bcmpkt_bcm56780_a0_rxpmd.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56880_a0/bcmpkt_bcm56880_a0_rxpmd.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56890_a0/bcmpkt_bcm56890_a0_rxpmd.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_bcmpkt_flexhdr.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_bcmpkt_flexhdr_data.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_bcmpkt_rxpmd_flex_data.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_bcmpkt_rxpmd_match_id_defs.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_bcmpkt_flexhdr.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_bcmpkt_flexhdr_data.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_bcmpkt_rxpmd_flex_data.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_bcmpkt_rxpmd_match_id_defs.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_bcmpkt_flexhdr.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_bcmpkt_flexhdr_data.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_bcmpkt_rxpmd_flex_data.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_bcmpkt_rxpmd_match_id_defs.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_bcmpkt_flexhdr.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_bcmpkt_flexhdr_data.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_bcmpkt_rxpmd_flex_data.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_bcmpkt_rxpmd_match_id_defs.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_bcmpkt_flexhdr.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_bcmpkt_flexhdr_data.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_bcmpkt_rxpmd_flex_data.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_bcmpkt_rxpmd_match_id_defs.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_bcmpkt_flexhdr.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_bcmpkt_flexhdr_data.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_bcmpkt_rxpmd_flex_data.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_bcmpkt_rxpmd_match_id_defs.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_bcmpkt_flexhdr.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_bcmpkt_flexhdr_data.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_bcmpkt_rxpmd_flex_data.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_bcmpkt_rxpmd_match_id_defs.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_bcmpkt_flexhdr.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_bcmpkt_flexhdr_data.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_bcmpkt_rxpmd_flex_data.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_bcmpkt_rxpmd_match_id_defs.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_bcmpkt_flexhdr.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_bcmpkt_flexhdr_data.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_bcmpkt_rxpmd_flex_data.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_bcmpkt_rxpmd_match_id_defs.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_bcmpkt_flexhdr.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_bcmpkt_flexhdr_data.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_bcmpkt_rxpmd_flex_data.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_bcmpkt_rxpmd_match_id_defs.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_bcmpkt_flexhdr.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_bcmpkt_flexhdr_data.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_bcmpkt_rxpmd_flex_data.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_bcmpkt_rxpmd_match_id_defs.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/lbpmd/bcmpkt_lbhdr.c
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/rxpmd/bcmpkt_rxpmd.c
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/rxpmd/bcmpkt_rxpmd_match_id.c
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/txpmd/bcmpkt_txpmd.c
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/util/bcmpkt_util.c
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_bcmpkt_rxpmd_match_id.c
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_pkt_flexhdr.c
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_bcmpkt_rxpmd_match_id.c
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_pkt_flexhdr.c
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_bcmpkt_rxpmd_match_id.c
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_pkt_flexhdr.c
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_bcmpkt_rxpmd_match_id.c
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_pkt_flexhdr.c
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_bcmpkt_rxpmd_match_id.c
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_pkt_flexhdr.c
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_bcmpkt_rxpmd_match_id.c
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_pkt_flexhdr.c
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_bcmpkt_rxpmd_match_id.c
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_pkt_flexhdr.c
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_bcmpkt_rxpmd_match_id.c
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_pkt_flexhdr.c
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_bcmpkt_rxpmd_match_id.c
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_pkt_flexhdr.c
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_bcmpkt_rxpmd_match_id.c
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_pkt_flexhdr.c
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_bcmpkt_rxpmd_match_id.c
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_pkt_flexhdr.c
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/Kbuild
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/Makefile
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl.c
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl_packet.c
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl_packet.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl_psample.c
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl_psample.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/linux/genl-packet/Kbuild
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/linux/genl-packet/Makefile
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/linux/genl-packet/genl-packet.c
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/linux/include/kernel/README
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/linux/include/kernel/net/genl-packet.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/linux/include/kernel/uapi/linux/genl-packet.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngedk_kapi.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngptpclock_ioctl.h
 delete mode 100755 platform/broadcom/saibcm-modules/sdklt/linux/knetcb/psample-cb.c
 delete mode 100755 platform/broadcom/saibcm-modules/sdklt/linux/knetcb/psample-cb.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/make/kpmd.mk
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/make/makeutils.mk
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/make/partial.mk
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/sal/include/sal/sal_libc.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/sal/include/sal/sal_linux.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/sal/include/sal/sal_types.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/sal/include/sal_config.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/shr/bitop/shr_bitop_range_clear.c
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/shr/include/shr/shr_bitop.h
 create mode 100644 platform/broadcom/saibcm-modules/sdklt/shr/include/shr/shr_types.h
 create mode 100644 platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/Makefile
 create mode 100644 platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-dev.c
 create mode 100644 platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-dev.h
 create mode 100644 platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-netif.c
 create mode 100644 platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-netif.h
 create mode 100644 platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-packet.c
 create mode 100644 platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-packet.h
 rename platform/broadcom/saibcm-modules/systems/linux/kernel/modules/{knet-cb/psample-cb.c => bcm-genl/bcm-genl-psample.c} (52%)
 create mode 100644 platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-psample.h
 create mode 100644 platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl.c
 mode change 100755 => 100644 platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-knet/bcm-knet.c
 create mode 100644 platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/README
 create mode 100644 platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/RELEASE
 create mode 100644 platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/appl/dcb/dcb_handler.h
 create mode 100644 platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/appl/dcb/dcb_int.h
 create mode 100644 platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/sal/types.h
 create mode 100644 platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/sdk_config.h
 create mode 100644 platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/shared/bsl.h
 create mode 100644 platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/shared/rx.h
 create mode 100644 platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/dcb.h
 create mode 100644 platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/dcbformats.h
 create mode 100644 platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/defs.h
 create mode 100644 platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/devids.h
 create mode 100644 platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/drv.h
 create mode 100644 platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/enet.h
 create mode 100644 platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/higig.h
 create mode 100644 platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/maxdef.h
 create mode 100644 platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/rx.h
 create mode 100644 platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type19.h
 create mode 100644 platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type23.h
 create mode 100644 platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type24.h
 create mode 100644 platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type26.h
 create mode 100644 platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type29.h
 create mode 100644 platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type31.h
 create mode 100644 platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type32.h
 create mode 100644 platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type33.h
 create mode 100644 platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type34.h
 create mode 100644 platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type35.h
 create mode 100644 platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type36.h
 create mode 100644 platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type37.h
 create mode 100644 platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type38.h
 create mode 100644 platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/types.h
 create mode 100644 platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/make/Makefile
 create mode 100644 platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/src/appl/dcb/dcb_handler.c
 create mode 100644 platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/src/appl/test/dcb_test.c
 create mode 100644 platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/src/soc/common/dcb.c
 create mode 100644 platform/broadcom/saibcm-modules/systems/linux/kernel/modules/genl-packet/Makefile
 create mode 100644 platform/broadcom/saibcm-modules/systems/linux/kernel/modules/genl-packet/genl-packet.c
 create mode 100644 platform/broadcom/saibcm-modules/systems/linux/kernel/modules/include/kernel/README
 create mode 100644 platform/broadcom/saibcm-modules/systems/linux/kernel/modules/include/kernel/net/genl-packet.h
 create mode 100644 platform/broadcom/saibcm-modules/systems/linux/kernel/modules/include/kernel/uapi/linux/genl-packet.h
 delete mode 100644 platform/broadcom/saibcm-modules/systems/linux/kernel/modules/knet-cb/psample-cb.h

diff --git a/platform/broadcom/sai-modules.mk b/platform/broadcom/sai-modules.mk
index dd0c05ed4..b0fdecfa5 100644
--- a/platform/broadcom/sai-modules.mk
+++ b/platform/broadcom/sai-modules.mk
@@ -1,6 +1,6 @@
 # Broadcom SAI modules
 
-BRCM_OPENNSL_KERNEL_VERSION = 8.4.0.2
+BRCM_OPENNSL_KERNEL_VERSION = 10.1.0.0
 
 BRCM_OPENNSL_KERNEL = opennsl-modules_$(BRCM_OPENNSL_KERNEL_VERSION)_amd64.deb
 $(BRCM_OPENNSL_KERNEL)_SRC_PATH = $(PLATFORM_PATH)/saibcm-modules
diff --git a/platform/broadcom/saibcm-modules/GFILE b/platform/broadcom/saibcm-modules/GFILE
new file mode 100644
index 000000000..e69de29bb
diff --git a/platform/broadcom/saibcm-modules/GFILES b/platform/broadcom/saibcm-modules/GFILES
new file mode 100644
index 000000000..e69de29bb
diff --git a/platform/broadcom/saibcm-modules/GLOG b/platform/broadcom/saibcm-modules/GLOG
new file mode 100644
index 000000000..86ed8bca3
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/GLOG
@@ -0,0 +1,2 @@
+CMD = [/projects/csg_sonic2/sk411346/repos/SAI/6.5.29/ocp_sai/sdk-src/hsdk-6.5.29/xgs-sdk-6.5.29-gpl-modules/, gtags --single-update systems/linux/kernel/modules/bcm-knet/bcm-knet.c]
+CMD = [/projects/csg_sonic2/sk411346/repos/SAI/6.5.29/ocp_sai/sdk-src/hsdk-6.5.29/xgs-sdk-6.5.29-gpl-modules/, gtags --single-update systems/linux/kernel/modules/knet-cb/knet-cb.c]
diff --git a/platform/broadcom/saibcm-modules/GPATH b/platform/broadcom/saibcm-modules/GPATH
new file mode 100644
index 000000000..e69de29bb
diff --git a/platform/broadcom/saibcm-modules/GRTAGS b/platform/broadcom/saibcm-modules/GRTAGS
new file mode 100644
index 000000000..e69de29bb
diff --git a/platform/broadcom/saibcm-modules/GTAGS b/platform/broadcom/saibcm-modules/GTAGS
new file mode 100644
index 000000000..e69de29bb
diff --git a/platform/broadcom/saibcm-modules/debian/changelog b/platform/broadcom/saibcm-modules/debian/changelog
index 9233f775a..e4bbafd32 100644
--- a/platform/broadcom/saibcm-modules/debian/changelog
+++ b/platform/broadcom/saibcm-modules/debian/changelog
@@ -1,3 +1,9 @@
+opennsl (10.1.0.0) unstable; urgency=medium
+
+  * Update to Broadcom SAI 10.1.0.0
+
+ -- Ziting Guo <zitingguo@microsoft.com> Mon Jun 17 05:18:47 2024 +0000
+
 opennsl (8.4.0.2) unstable; urgency=medium
 
   * Update to Broadcom SAI 8.4.0.2
diff --git a/platform/broadcom/saibcm-modules/include/ibde.h b/platform/broadcom/saibcm-modules/include/ibde.h
index 12f507ea6..bb6e261e8 100644
--- a/platform/broadcom/saibcm-modules/include/ibde.h
+++ b/platform/broadcom/saibcm-modules/include/ibde.h
@@ -1,5 +1,6 @@
 /*
- * Copyright 2007-2020 Broadcom Inc. All rights reserved.
+ * $Id: ibde.h,v 1.27 Broadcom SDK $
+ * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
  * 
  * Permission is granted to use, copy, modify and/or distribute this
  * software under either one of the licenses below.
@@ -22,12 +23,8 @@
  * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
  * 
  * This software is governed by the Broadcom Open Network Switch APIs license:
- * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa
- */
-/*
- * $Id: ibde.h,v 1.27 Broadcom SDK $
- * $Copyright: (c) 2005 Broadcom Corp.
- * All Rights Reserved.$
+ * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+ * 
  */
 
 #ifndef __IBDE_H__
diff --git a/platform/broadcom/saibcm-modules/include/kcom.h b/platform/broadcom/saibcm-modules/include/kcom.h
index 341ddd0f7..c644828b9 100644
--- a/platform/broadcom/saibcm-modules/include/kcom.h
+++ b/platform/broadcom/saibcm-modules/include/kcom.h
@@ -1,5 +1,6 @@
 /*
- * Copyright 2007-2020 Broadcom Inc. All rights reserved.
+ * $Id: kcom.h,v 1.9 Broadcom SDK $
+ * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
  * 
  * Permission is granted to use, copy, modify and/or distribute this
  * software under either one of the licenses below.
@@ -22,12 +23,8 @@
  * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
  * 
  * This software is governed by the Broadcom Open Network Switch APIs license:
- * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa
- */
-/*
- * $Id: kcom.h,v 1.9 Broadcom SDK $
- * $Copyright: (c) 2005 Broadcom Corp.
- * All Rights Reserved.$
+ * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+ * 
  *
  * File:    kcom.h
  * Purpose: User/Kernel message definitions
@@ -147,8 +144,7 @@ typedef struct kcom_netif_s {
     uint8 type;
     uint8 flags;
     uint32 cb_user_data;
-    uint8 port;
-    uint8 reserved;
+    uint16 port;
     uint16 vlan;
     uint16 qnum;
     uint8 macaddr[6];
diff --git a/platform/broadcom/saibcm-modules/include/sal/core/sync.h b/platform/broadcom/saibcm-modules/include/sal/core/sync.h
index 03fd2facc..b45a15da7 100644
--- a/platform/broadcom/saibcm-modules/include/sal/core/sync.h
+++ b/platform/broadcom/saibcm-modules/include/sal/core/sync.h
@@ -1,5 +1,6 @@
 /*
- * Copyright 2007-2020 Broadcom Inc. All rights reserved.
+ * $Id: sync.h,v 1.1 Broadcom SDK $
+ * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
  * 
  * Permission is granted to use, copy, modify and/or distribute this
  * software under either one of the licenses below.
@@ -22,12 +23,8 @@
  * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
  * 
  * This software is governed by the Broadcom Open Network Switch APIs license:
- * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa
- */
-/*
- * $Id: sync.h,v 1.1 Broadcom SDK $
- * $Copyright: (c) 2005 Broadcom Corp.
- * All Rights Reserved.$
+ * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+ * 
  */
 
 #ifndef _SAL_SYNC_H
diff --git a/platform/broadcom/saibcm-modules/include/sal/core/thread.h b/platform/broadcom/saibcm-modules/include/sal/core/thread.h
index 86713d1e0..062609063 100644
--- a/platform/broadcom/saibcm-modules/include/sal/core/thread.h
+++ b/platform/broadcom/saibcm-modules/include/sal/core/thread.h
@@ -1,5 +1,6 @@
 /*
- * Copyright 2007-2020 Broadcom Inc. All rights reserved.
+ * $Id: thread.h,v 1.1 Broadcom SDK $
+ * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
  * 
  * Permission is granted to use, copy, modify and/or distribute this
  * software under either one of the licenses below.
@@ -22,12 +23,8 @@
  * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
  * 
  * This software is governed by the Broadcom Open Network Switch APIs license:
- * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa
- */
-/*
- * $Id: thread.h,v 1.1 Broadcom SDK $
- * $Copyright: (c) 2005 Broadcom Corp.
- * All Rights Reserved.$
+ * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+ * 
  */
 
 #ifndef _SAL_THREAD_H
diff --git a/platform/broadcom/saibcm-modules/include/sal/types.h b/platform/broadcom/saibcm-modules/include/sal/types.h
index 43d64dbcc..a0ffb72c8 100644
--- a/platform/broadcom/saibcm-modules/include/sal/types.h
+++ b/platform/broadcom/saibcm-modules/include/sal/types.h
@@ -1,5 +1,6 @@
 /*
- * Copyright 2007-2020 Broadcom Inc. All rights reserved.
+ * $Id: types.h,v 1.3 Broadcom SDK $
+ * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
  * 
  * Permission is granted to use, copy, modify and/or distribute this
  * software under either one of the licenses below.
@@ -22,12 +23,8 @@
  * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
  * 
  * This software is governed by the Broadcom Open Network Switch APIs license:
- * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa
- */
-/*
- * $Id: types.h,v 1.3 Broadcom SDK $
- * $Copyright: (c) 2005 Broadcom Corp.
- * All Rights Reserved.$
+ * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+ * 
  *
  * File: 	types.h
  * Purpose: 	SAL type definitions
diff --git a/platform/broadcom/saibcm-modules/include/sdk_config.h b/platform/broadcom/saibcm-modules/include/sdk_config.h
index 6ce7d77d5..93063cd96 100644
--- a/platform/broadcom/saibcm-modules/include/sdk_config.h
+++ b/platform/broadcom/saibcm-modules/include/sdk_config.h
@@ -1,5 +1,6 @@
 /*
- * Copyright 2007-2020 Broadcom Inc. All rights reserved.
+ * $Id: sdk_config.h,v 1.5 Broadcom SDK $
+ * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
  * 
  * Permission is granted to use, copy, modify and/or distribute this
  * software under either one of the licenses below.
@@ -22,12 +23,8 @@
  * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
  * 
  * This software is governed by the Broadcom Open Network Switch APIs license:
- * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa
- */
-/*
- * $Id: sdk_config.h,v 1.5 Broadcom SDK $
- * $Copyright: (c) 2006 Broadcom Corp.
- * All Rights Reserved.$
+ * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+ * 
  *
  *
  */
diff --git a/platform/broadcom/saibcm-modules/include/soc/devids.h b/platform/broadcom/saibcm-modules/include/soc/devids.h
index edbdef32b..de6121370 100644
--- a/platform/broadcom/saibcm-modules/include/soc/devids.h
+++ b/platform/broadcom/saibcm-modules/include/soc/devids.h
@@ -1,5 +1,6 @@
 /*
- * Copyright 2007-2020 Broadcom Inc. All rights reserved.
+ * $Id: devids.h,v 1.309 Broadcom SDK $
+ * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
  * 
  * Permission is granted to use, copy, modify and/or distribute this
  * software under either one of the licenses below.
@@ -22,84 +23,101 @@
  * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
  * 
  * This software is governed by the Broadcom Open Network Switch APIs license:
- * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa
- */
-/*
- * Copyright: (c) 2022 Broadcom.
- * All Rights Reserved.
+ * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+ * 
+ * 
  */
 
 #ifndef _SOC_DEVIDS_H
 #define _SOC_DEVIDS_H
 
+/*
+ * Defines PCI device and revision ID for every recognized device.
+ * All driver routines refer to this ID only.
+ */
 
 #define BROADCOM_VENDOR_ID      0x14e4
 
+/* Draco */
 #define BCM5690_DEVICE_ID       0x5690
 #define BCM5690_A0_REV_ID       1
 #define BCM5690_A1_REV_ID       2
 #define BCM5690_A2_REV_ID       3
 
+/* Draco without HG (Medusa) */
 #define BCM5691_DEVICE_ID       0x5691
 #define BCM5691_A0_REV_ID       1
 #define BCM5691_A1_REV_ID       2
 #define BCM5691_A2_REV_ID       3
 
+/* Draco without L3 */
 #define BCM5692_DEVICE_ID       0x5692
 #define BCM5692_A0_REV_ID       1
 #define BCM5692_A1_REV_ID       2
 #define BCM5692_A2_REV_ID       3
 
+/* Draco without HG or L3 */
 #define BCM5693_DEVICE_ID       0x5693
 #define BCM5693_A0_REV_ID       1
 #define BCM5693_A1_REV_ID       2
 #define BCM5693_A2_REV_ID       3
 
+/* Draco 1.5 */
 #define BCM5695_DEVICE_ID       0x5695
 #define BCM5695_A0_REV_ID       1
 #define BCM5695_A1_REV_ID       2
 #define BCM5695_B0_REV_ID       0x11
 
+/* Draco 1.5 without HG */
 #define BCM5696_DEVICE_ID       0x5696
 #define BCM5696_A0_REV_ID       1
 #define BCM5696_A1_REV_ID       2
 #define BCM5696_B0_REV_ID       0x11
 
+/* Draco 1.5 without L3 */
 #define BCM5697_DEVICE_ID       0x5697
 #define BCM5697_A0_REV_ID       1
 #define BCM5697_A1_REV_ID       2
 #define BCM5697_B0_REV_ID       0x11
 
+/* Draco 1.5 without HG or L3 */
 #define BCM5698_DEVICE_ID       0x5698
 #define BCM5698_A0_REV_ID       1
 #define BCM5698_A1_REV_ID       2
 #define BCM5698_B0_REV_ID       0x11
 
+/* Hercules with 8 ports */
 #define BCM5670_DEVICE_ID       0x5670
 #define BCM5670_A0_REV_ID       1
 #define BCM5670_A1_REV_ID       2
 
+/* Hercules with 4 ports */
 #define BCM5671_DEVICE_ID       0x5671
 #define BCM5671_A0_REV_ID       1
 #define BCM5671_A1_REV_ID       2
-#define BCM5671_A2_REV_ID       3       
+#define BCM5671_A2_REV_ID       3       /* Maxxus */
 
+/* Hercules 1.5 with 8 ports */
 #define BCM5675_DEVICE_ID       0x5675
 #define BCM5675_A0_REV_ID       1
 #define BCM5675_A1_REV_ID       2
 
+/* Hercules 1.5 with 4 ports */
 #define BCM5676_DEVICE_ID       0x5676
 #define BCM5676_A0_REV_ID       1
 #define BCM5676_A1_REV_ID       2
 
+/* Lynx */
 #define BCM5673_DEVICE_ID       0x5673
 #define BCM5673_A0_REV_ID       1
 #define BCM5673_A1_REV_ID       2
 #define BCM5673_A2_REV_ID       3
 
+/* Lynx 1.5 */
 #define BCM5674_DEVICE_ID       0x5674
 #define BCM5674_A0_REV_ID       1
 
+/* Felix */
 #define BCM56100_DEVICE_ID      0xb100
 #define BCM56100_A0_REV_ID      1
 #define BCM56100_A1_REV_ID      2
@@ -119,6 +137,7 @@
 #define BCM56107_A0_REV_ID      1
 #define BCM56107_A1_REV_ID      2
 
+/* Felix 1.5 */
 #define BCM56110_DEVICE_ID      0xb110
 #define BCM56110_A0_REV_ID      1
 #define BCM56111_DEVICE_ID      0xb111
@@ -132,6 +151,7 @@
 #define BCM56117_DEVICE_ID      0xb117
 #define BCM56117_A0_REV_ID      1
 
+/* Helix */
 #define BCM56300_DEVICE_ID      0xb300
 #define BCM56300_A0_REV_ID      1
 #define BCM56300_A1_REV_ID      2
@@ -186,6 +206,7 @@
 #define BCM56309_B0_REV_ID      0x11
 #define BCM56309_B1_REV_ID      0x12
 
+/* Helix 1.5 */
 #define BCM56310_DEVICE_ID      0xb310
 #define BCM56310_A0_REV_ID      1
 #define BCM56311_DEVICE_ID      0xb311
@@ -208,11 +229,12 @@
 #define BCM56319_A0_REV_ID      1
 
 #ifndef EXCLUDE_BCM56324
+/* Helix 2 */
 #define BCM56322_DEVICE_ID      0xb322
 #define BCM56322_A0_REV_ID      1
 #define BCM56324_DEVICE_ID      0xb324
 #define BCM56324_A0_REV_ID      1
-#endif 
+#endif /* EXCLUDE_BCM56324 */
 
 #define BCM53300_DEVICE_ID      0xb006
 #define BCM53300_A0_REV_ID      0x11
@@ -224,6 +246,7 @@
 #define BCM53302_A0_REV_ID      0x11
 #define BCM53302_A1_REV_ID      0x12
 
+/* Firebolt */
 #define BCM56500_DEVICE_ID      0xb500
 #define BCM56500_A0_REV_ID      1
 #define BCM56500_A1_REV_ID      2
@@ -285,6 +308,7 @@
 #define BCM56509_B1_REV_ID      0x12
 #define BCM56509_B2_REV_ID      0x13
 
+/* Easyrider */
 #define BCM56600_DEVICE_ID      0xb600
 #define BCM56600_A0_REV_ID      1
 #define BCM56600_B0_REV_ID      0x11
@@ -318,14 +342,17 @@
 #define BCM56608_B0_REV_ID      0x11
 #define BCM56608_C0_REV_ID      0x21
 
+/* Goldwing */
 #define BCM56580_DEVICE_ID      0xb580
 #define BCM56580_A0_REV_ID      1
 
+/* HUMV */
 #define BCM56700_DEVICE_ID      0xb700
 #define BCM56700_A0_REV_ID      1
 #define BCM56701_DEVICE_ID      0xb701
 #define BCM56701_A0_REV_ID      1
 
+/* Bradley */
 #define BCM56800_DEVICE_ID      0xb800
 #define BCM56800_A0_REV_ID      1
 #define BCM56801_DEVICE_ID      0xb801
@@ -335,6 +362,7 @@
 #define BCM56803_DEVICE_ID      0xb803
 #define BCM56803_A0_REV_ID      1
 
+/* Raven */
 #define BCM56224_DEVICE_ID      0xb224
 #define BCM56224_A0_REV_ID      1
 #define BCM56224_B0_REV_ID      0x11
@@ -366,6 +394,7 @@
 #define BCM53726_A0_REV_ID      1
 #define BCM53726_B0_REV_ID      0x11
 
+/* Hawkeye */
 #define BCM53312_DEVICE_ID      0xc312
 #define BCM53312_A0_REV_ID      1
 #define BCM53312_B0_REV_ID      0x11
@@ -376,6 +405,7 @@
 #define BCM53314_A0_REV_ID      1
 #define BCM53314_B0_REV_ID      0x11
 
+/* Hawkeye EEE */
 #define BCM53322_DEVICE_ID      0xc322
 #define BCM53322_A0_REV_ID      1
 #define BCM53323_DEVICE_ID      0xc323
@@ -384,6 +414,7 @@
 #define BCM53324_A0_REV_ID      1
 
 
+/* Raptor */
 #define BCM56218_DEVICE_ID              0xB218
 #define BCM56218_A0_REV_ID              1
 #define BCM56218_A1_REV_ID              2
@@ -457,6 +488,7 @@
 #define BCM56014_A1_REV_ID              2
 #define BCM56014_A2_REV_ID              3
 
+/* Firebolt2 */
 #define BCM56510_DEVICE_ID      0xb510
 #define BCM56510_A0_REV_ID      1
 #define BCM56511_DEVICE_ID      0xb511
@@ -476,6 +508,7 @@
 #define BCM56519_DEVICE_ID      0xb519
 #define BCM56519_A0_REV_ID      1
 
+/* Triumph */
 #define BCM56620_DEVICE_ID      0xb620
 #define BCM56620_A0_REV_ID      1
 #define BCM56620_A1_REV_ID      2
@@ -507,6 +540,7 @@
 #define BCM56629_B1_REV_ID      0x12
 #define BCM56629_B2_REV_ID      0x13
 
+/* Valkyrie */
 #define BCM56680_DEVICE_ID      0xb680
 #define BCM56680_A0_REV_ID      1
 #define BCM56680_A1_REV_ID      2
@@ -524,6 +558,7 @@
 #define BCM56686_B1_REV_ID      0x12
 #define BCM56686_B2_REV_ID      0x13
 
+/* Scorpion */
 #define BCM56820_DEVICE_ID      0xb820
 #define BCM56820_A0_REV_ID      1
 #define BCM56820_B0_REV_ID      0x11
@@ -539,6 +574,7 @@
 #define BCM56825_DEVICE_ID      0xb825
 #define BCM56825_B0_REV_ID      0x11
 
+/* HUMV Plus */
 #define BCM56720_DEVICE_ID      0xb720
 #define BCM56720_A0_REV_ID      1
 #define BCM56720_B0_REV_ID      0x11
@@ -546,10 +582,12 @@
 #define BCM56721_A0_REV_ID      1
 #define BCM56721_B0_REV_ID      0x11
 
+/* Conqueror */
 #define BCM56725_DEVICE_ID      0xb725
 #define BCM56725_A0_REV_ID      1
 #define BCM56725_B0_REV_ID      0x11
 
+/* Triumph2 */
 #define BCM56630_DEVICE_ID      0xb630
 #define BCM56630_A0_REV_ID      1
 #define BCM56630_B0_REV_ID      0x11
@@ -566,6 +604,7 @@
 #define BCM56639_A0_REV_ID      1
 #define BCM56639_B0_REV_ID      0x11
 
+/* Valkyrie2 */
 #define BCM56685_DEVICE_ID      0xb685
 #define BCM56685_A0_REV_ID      1
 #define BCM56685_B0_REV_ID      0x11
@@ -573,6 +612,7 @@
 #define BCM56689_A0_REV_ID      1
 #define BCM56689_B0_REV_ID      0x11
 
+/* Apollo */
 #define BCM56520_DEVICE_ID      0xb520
 #define BCM56520_A0_REV_ID      1
 #define BCM56520_B0_REV_ID      0x11
@@ -589,11 +629,13 @@
 #define BCM56526_A0_REV_ID      1
 #define BCM56526_B0_REV_ID      0x11
 
+/* Firebolt 3 */
 #define BCM56534_DEVICE_ID      0xb534
 #define BCM56534_B0_REV_ID      0x11
 #define BCM56538_DEVICE_ID      0xb538
 #define BCM56538_B0_REV_ID      0x11
 
+/* Enduro */
 #define BCM56331_DEVICE_ID      0xb331
 #define BCM56331_A0_REV_ID      1
 #define BCM56331_B0_REV_ID      0x11
@@ -611,6 +653,7 @@
 #define BCM56338_B0_REV_ID      0x11
 #define BCM56338_B1_REV_ID      0x12
 
+/* Helix 3 */
 #define BCM56320_DEVICE_ID      0xb320
 #define BCM56320_A0_REV_ID      1
 #define BCM56320_B0_REV_ID      0x11
@@ -621,6 +664,7 @@
 #define BCM56321_B1_REV_ID      0x12
 
 
+/* FireScout */
 #define BCM56548H_DEVICE_ID     0xB54A
 #define BCM56548H_A0_REV_ID     1
 #define BCM56548_DEVICE_ID      0xb548
@@ -628,6 +672,7 @@
 #define BCM56547_DEVICE_ID      0xb547
 #define BCM56547_A0_REV_ID      1
 
+/* Helix 4 */
 #define BCM56346_DEVICE_ID      0xb346
 #define BCM56346_A0_REV_ID      1
 #define BCM56345_DEVICE_ID      0xb345
@@ -639,6 +684,7 @@
 #define BCM56340_DEVICE_ID      0xb340
 #define BCM56340_A0_REV_ID      1
 
+/* Spiral */
 #define BCM56049_DEVICE_ID      0xb049
 #define BCM56049_A0_REV_ID      1
 #define BCM56048_DEVICE_ID      0xb048
@@ -646,6 +692,7 @@
 #define BCM56047_DEVICE_ID      0xb047
 #define BCM56047_A0_REV_ID      1
 
+/* Ranger */
 #define BCM56042_DEVICE_ID      0xb042
 #define BCM56042_A0_REV_ID      1
 #define BCM56041_DEVICE_ID      0xb041
@@ -653,6 +700,7 @@
 #define BCM56040_DEVICE_ID      0xb040
 #define BCM56040_A0_REV_ID      1
 
+/* Stardust */
 #define BCM56132_DEVICE_ID      0xb132
 #define BCM56132_A0_REV_ID      1
 #define BCM56132_B0_REV_ID      0x11
@@ -662,11 +710,13 @@
 #define BCM56134_B0_REV_ID      0x11
 #define BCM56134_B1_REV_ID      0x12
 
+/* Dagger */
 #define BCM56230_DEVICE_ID      0xb230
 #define BCM56230_B1_REV_ID      0x12
 #define BCM56231_DEVICE_ID      0xb231
 #define BCM56231_B1_REV_ID      0x12
 
+/* Hurricane */
 #define BCM56140_DEVICE_ID      0xb140
 #define BCM56140_A0_REV_ID      1
 #define BCM56142_DEVICE_ID      0xb142
@@ -682,6 +732,7 @@
 #define BCM56149_DEVICE_ID      0xb149
 #define BCM56149_A0_REV_ID      1
 
+/* Trident */
 #define BCM56840_DEVICE_ID      0xb840
 #define BCM56840_A0_REV_ID      1
 #define BCM56840_A1_REV_ID      2
@@ -715,6 +766,7 @@
 #define BCM56845_B0_REV_ID      0x11
 #define BCM56845_B1_REV_ID      0x12
 
+/* Titan */
 #define BCM56743_DEVICE_ID      0xb743
 #define BCM56743_A0_REV_ID      1
 #define BCM56743_A1_REV_ID      2
@@ -732,6 +784,7 @@
 #define BCM56745_B0_REV_ID      0x11
 #define BCM56745_B1_REV_ID      0x12
 
+/* Saber 2 */
 #define BCM56260_DEVICE_ID      0xb260
 #define BCM56260_A0_REV_ID      1
 #define BCM56260_B0_REV_ID      0x11
@@ -758,6 +811,7 @@
 #define BCM56268_A0_REV_ID      1
 #define BCM56268_B0_REV_ID      0x11
 
+/*Dagger 2*/
 #define BCM56233_DEVICE_ID      0xb233
 #define BCM56233_B0_REV_ID      0x11
 
@@ -787,6 +841,7 @@
 #define BCM56468_A0_REV_ID      1
 #define BCM56468_B0_REV_ID      0x11
 
+/* Metrolite */
 #define BCM56270_DEVICE_ID      0xb270
 #define BCM56270_A0_REV_ID      1
 #define BCM56271_DEVICE_ID      0xb271
@@ -794,11 +849,13 @@
 #define BCM56272_DEVICE_ID      0xb272
 #define BCM56272_A0_REV_ID      1
 
+/* Beagle */
 #define BCM53460_DEVICE_ID      0x8460
 #define BCM53460_A0_REV_ID      1
 #define BCM53461_DEVICE_ID      0x8461
 #define BCM53461_A0_REV_ID      1
 
+/* Trident Plus */
 #define BCM56842_DEVICE_ID      0xb842
 #define BCM56842_A0_REV_ID      1
 #define BCM56842_A1_REV_ID      2
@@ -835,6 +892,7 @@
 #define BCM56849_A0_REV_ID      1
 #define BCM56849_A1_REV_ID      2
 
+/* Titan Plus */
 #define BCM56742_DEVICE_ID      0xb742
 #define BCM56742_A0_REV_ID      1
 #define BCM56742_A1_REV_ID      2
@@ -847,6 +905,7 @@
 #define BCM56746_A1_REV_ID      2
 
 
+/* Triumph 3 */
 #define BCM56640_DEVICE_ID      0xb640
 #define BCM56640_A0_REV_ID      1
 #define BCM56640_A1_REV_ID      2
@@ -868,6 +927,7 @@
 #define BCM56649_A1_REV_ID      2
 #define BCM56649_B0_REV_ID      0x11
 
+/* Apollo 2 */
 #define BCM56540_DEVICE_ID      0xb540
 #define BCM56540_A0_REV_ID      1
 #define BCM56540_A1_REV_ID      2
@@ -889,6 +949,7 @@
 #define BCM56544_A1_REV_ID      2
 #define BCM56544_B0_REV_ID      0x11
 
+/* Firebolt 4 */
 #define BCM56545_DEVICE_ID      0xb545
 #define BCM56545_A0_REV_ID      1
 #define BCM56545_A1_REV_ID      2
@@ -898,6 +959,7 @@
 #define BCM56546_A1_REV_ID      2
 #define BCM56546_B0_REV_ID      0x11
 
+/* Ranger plus */
 #define BCM56044_DEVICE_ID      0xb044
 #define BCM56044_B0_REV_ID      0x11
 #define BCM56045_DEVICE_ID      0xb045
@@ -910,6 +972,7 @@
 #define BCM56046_B0_REV_ID      0x11
 
 
+/* Katana */
 #define BCM56440_DEVICE_ID      0xb440
 #define BCM56440_A0_REV_ID      1
 #define BCM56440_B0_REV_ID      0x11
@@ -962,6 +1025,7 @@
 #define BCM55441_A0_REV_ID      1
 #define BCM55441_B0_REV_ID      0x11
 
+/* Katana 2 */
 #define BCM55450_DEVICE_ID      0xa450
 #define BCM55450_A0_REV_ID      1
 #define BCM55450_B0_REV_ID      0x11
@@ -1012,6 +1076,7 @@
 #define BCM56458_B0_REV_ID      0x11
 #define BCM56458_B1_REV_ID      0x12
 
+/* Trident 2 */
 #define BCM56850_DEVICE_ID      0xb850
 #define BCM56850_A0_REV_ID      1
 #define BCM56850_A1_REV_ID      2
@@ -1041,6 +1106,7 @@
 #define BCM56834_A1_REV_ID      2
 #define BCM56834_A2_REV_ID      3
 
+/* Trident 2+ */
 #define BCM56860_DEVICE_ID      0xb860
 #define BCM56860_A0_REV_ID      1
 #define BCM56860_A1_REV_ID      2
@@ -1076,16 +1142,19 @@
 #define BCM56836_A1_REV_ID      2
 
 
+/* Titan 2 */
 #define BCM56750_DEVICE_ID      0xb750
 #define BCM56750_A0_REV_ID      1
 #define BCM56750_A1_REV_ID      2
 #define BCM56750_A2_REV_ID      3
 
+/* Scorpion 960 */
 #define BCM56830_DEVICE_ID      0xb830
 #define BCM56830_A0_REV_ID      1
 #define BCM56830_A1_REV_ID      2
 #define BCM56830_A2_REV_ID      3
 
+/* Hurricane 2*/
 #define BCM56150_DEVICE_ID      0xb150
 #define BCM56150_A0_REV_ID      1
 #define BCM56151_DEVICE_ID      0xb151
@@ -1093,6 +1162,7 @@
 #define BCM56152_DEVICE_ID      0xb152
 #define BCM56152_A0_REV_ID      1
 
+/* Wolfhound*/
 #define BCM53342_DEVICE_ID      0x8342
 #define BCM53342_A0_REV_ID      1
 #define BCM53343_DEVICE_ID      0x8343
@@ -1104,19 +1174,22 @@
 #define BCM53347_DEVICE_ID      0x8347
 #define BCM53347_A0_REV_ID      1
 
+/* Foxhound*/
 #define BCM53333_DEVICE_ID      0x8333
 #define BCM53333_A0_REV_ID      1
 #define BCM53334_DEVICE_ID      0x8334
 #define BCM53334_A0_REV_ID      1
 
+/* Deerhound*/
 #define BCM53393_DEVICE_ID      0x8393
 #define BCM53393_A0_REV_ID      1
 #define BCM53394_DEVICE_ID      0x8394
 #define BCM53394_A0_REV_ID      1
 
-#define BCM53400_DEVICE_ID      0x8400 
+/* Greyhound , Ranger 2 */
+#define BCM53400_DEVICE_ID      0x8400 /* FIXME */
 #define BCM53400_A0_REV_ID      1
-#define BCM56060_DEVICE_ID      0xb060  
+#define BCM56060_DEVICE_ID      0xb060
 #define BCM56060_A0_REV_ID      1
 #define BCM56062_DEVICE_ID      0xb062
 #define BCM56062_A0_REV_ID      1
@@ -1154,6 +1227,7 @@
 #define BCM53369_DEVICE_ID      0x8369
 #define BCM53369_A0_REV_ID      1
 
+/* Elkhound */
 #define BCM53454_DEVICE_ID      0x8454
 #define BCM53455_DEVICE_ID      0x8455
 #define BCM53454_A0_REV_ID      1
@@ -1161,6 +1235,7 @@
 #define BCM53457_DEVICE_ID      0x8457
 #define BCM53456_A0_REV_ID      1
 
+/* Bloodhound */
 #define BCM53422_DEVICE_ID      0x8422
 #define BCM53422_A0_REV_ID      1
 #define BCM53424_DEVICE_ID      0x8424
@@ -1168,6 +1243,7 @@
 #define BCM53426_DEVICE_ID      0x8426
 #define BCM53426_A0_REV_ID      1
 
+/* Tomahawk */
 #define BCM56960_DEVICE_ID      0xb960
 #define BCM56960_A0_REV_ID      1
 #define BCM56960_B0_REV_ID      0x11
@@ -1206,6 +1282,7 @@
 #define BCM56939_B0_REV_ID      0x11
 #define BCM56939_C0_REV_ID      0x21
 
+/* Ranger3+ */
 #define BCM56168_DEVICE_ID      0xb168
 #define BCM56168_A0_REV_ID      1
 #define BCM56168_B0_REV_ID      0x11
@@ -1215,6 +1292,7 @@
 #define BCM56169_B0_REV_ID      0x11
 #define BCM56169_B1_REV_ID      0x12
 
+/* Tomahawk 3 */
 #define BCM56980_DEVICE_ID_MASK 0xFFF0
 #define BCM56980_DEVICE_ID      0xb980
 #define BCM56980_A0_REV_ID      1
@@ -1232,28 +1310,32 @@
 #define BCM56984_A0_REV_ID      1
 #define BCM56984_B0_REV_ID      0x11
 
+/* Titanhawk */
 #define BCM56968_DEVICE_ID      0xb968
 #define BCM56968_A0_REV_ID      1
 #define BCM56968_B0_REV_ID      0x11
 #define BCM56968_B1_REV_ID      0x12
 
-#define BCM56160_DEVICE_ID      0xb160  
+/* Hurricane 3 */
+#define BCM56160_DEVICE_ID      0xb160
 #define BCM56160_A0_REV_ID      1
 #define BCM56160_B0_REV_ID      0x11
-#define BCM56162_DEVICE_ID      0xb162  
+#define BCM56162_DEVICE_ID      0xb162
 #define BCM56162_A0_REV_ID      1
 #define BCM56162_B0_REV_ID      0x11
 
-#define BCM56163_DEVICE_ID      0xb163  
+/* Hurricane3 Lite */
+#define BCM56163_DEVICE_ID      0xb163
 #define BCM56163_A0_REV_ID      1
 #define BCM56163_B0_REV_ID      0x11
-#define BCM56164_DEVICE_ID      0xb164  
+#define BCM56164_DEVICE_ID      0xb164
 #define BCM56164_A0_REV_ID      1
 #define BCM56164_B0_REV_ID      0x11
-#define BCM56166_DEVICE_ID      0xb166  
+#define BCM56166_DEVICE_ID      0xb166
 #define BCM56166_A0_REV_ID      1
 #define BCM56166_B0_REV_ID      0x11
 
+/* Hurricane4 */
 #define BCM56273_DEVICE_ID      0xb273
 #define BCM56273_A0_REV_ID      1
 #define BCM56273_A1_REV_ID      2
@@ -1290,20 +1372,23 @@
 #define BCM56176_DEVICE_ID      0xb176
 #define BCM56176_A1_REV_ID      2
 
-#define BCM53440_DEVICE_ID      0x8440  
+/* Buckhound */
+#define BCM53440_DEVICE_ID      0x8440
 #define BCM53440_A0_REV_ID      1
 #define BCM53440_B0_REV_ID      0x11
-#define BCM53442_DEVICE_ID      0x8442  
+#define BCM53442_DEVICE_ID      0x8442
 #define BCM53442_A0_REV_ID      1
 #define BCM53442_B0_REV_ID      0x11
-#define BCM53443_DEVICE_ID      0x8443  
+#define BCM53443_DEVICE_ID      0x8443
 #define BCM53443_A0_REV_ID      1
 #define BCM53443_B0_REV_ID      0x11
 
-#define BCM53434_DEVICE_ID      0x8434  
+/* Foxhound2 */
+#define BCM53434_DEVICE_ID      0x8434
 #define BCM53434_A0_REV_ID      1
 #define BCM53434_B0_REV_ID      0x11
 
+/* Apache */
 #define BCM56560_DEVICE_ID      0xb560
 #define BCM56560_A0_REV_ID      1
 #define BCM56560_B0_REV_ID      0x11
@@ -1316,6 +1401,7 @@
 #define BCM56562_A0_REV_ID      1
 #define BCM56562_B0_REV_ID      0x11
 
+/* MONTEREY */
 #define BCM56670_DEVICE_ID      0xb670
 #define BCM56670_A0_REV_ID      1
 #define BCM56670_B0_REV_ID      0x11
@@ -1337,7 +1423,28 @@
 #define BCM56675_B0_REV_ID      0x11
 #define BCM56675_C0_REV_ID      0x21
 
+/* WOLFHOUND3 PLUS */
+#define BCM53650_DEVICE_ID      0x8650
+#define BCM53650_A0_REV_ID      1
+#define BCM53650_B0_REV_ID      0x11
+#define BCM53650_C0_REV_ID      0x21
+
+#define BCM53651_DEVICE_ID      0x8651
+#define BCM53651_A0_REV_ID      1
+#define BCM53651_B0_REV_ID      0x11
+#define BCM53651_C0_REV_ID      0x21
+
+#define BCM53652_DEVICE_ID      0x8652
+#define BCM53652_A0_REV_ID      1
+#define BCM53652_B0_REV_ID      0x11
+#define BCM53652_C0_REV_ID      0x21
 
+#define BCM53653_DEVICE_ID      0x8653
+#define BCM53653_A0_REV_ID      1
+#define BCM53653_B0_REV_ID      0x11
+#define BCM53653_C0_REV_ID      0x21
+
+/* Firebolt-5 */
 #define BCM56565_DEVICE_ID      0xb565
 #define BCM56565_A0_REV_ID      1
 #define BCM56565_B0_REV_ID      0x11
@@ -1354,6 +1461,7 @@
 #define BCM56568_A0_REV_ID      1
 #define BCM56568_B0_REV_ID      0x11
 
+/* Maverick */
 #define BCM56760_DEVICE_ID      0xb760
 #define BCM56760_A0_REV_ID      1
 #define BCM56760_A1_REV_ID      2
@@ -1386,6 +1494,7 @@
 #define BCM56768_A0_REV_ID      1
 #define BCM56768_B0_REV_ID      0x11
 
+/* Ranger 2+ */
 #define BCM56068_DEVICE_ID      0xb068
 #define BCM56068_A0_REV_ID      1
 #define BCM56068_B0_REV_ID      0x11
@@ -1395,6 +1504,7 @@
 #define BCM56069_A0_REV_ID      1
 #define BCM56069_B0_REV_ID      0x11
 
+/* Hurricane3-MG */
 #define BCM56170_DEVICE_ID      0xb170
 #define BCM56170_A0_REV_ID      1
 #define BCM56170_B0_REV_ID      0x11
@@ -1405,6 +1515,7 @@
 #define BCM56174_A0_REV_ID      1
 #define BCM56174_B0_REV_ID      0x11
 
+/* Quartz, Greyhound 2 */
 #define BCM53570_DEVICE_ID      0x8570
 #define BCM53570_A0_REV_ID      1
 #define BCM53570_B0_REV_ID      0x11
@@ -1412,6 +1523,7 @@
 #define BCM53575_A0_REV_ID      1
 #define BCM53575_B0_REV_ID      0x11
 
+/* FireLight */
 #define BCM56070_DEVICE_ID      0xb070
 #define BCM56070_A0_REV_ID      1
 #define BCM56071_DEVICE_ID      0xb071
@@ -1420,16 +1532,18 @@
 #define BCM56072_A0_REV_ID      1
 
 
+/* Tomahawk+ */
 #define BCM56965_DEVICE_ID      0xb965
 #define BCM56965_A0_REV_ID      1
 #define BCM56965_A1_REV_ID      2
-#define BCM56969_DEVICE_ID      0xb969        
+#define BCM56969_DEVICE_ID      0xb969        /* Corresponds to TH 56961 */
 #define BCM56969_A0_REV_ID      1
-#define BCM56966_DEVICE_ID      0xb966        
+#define BCM56966_DEVICE_ID      0xb966        /* Corresponds to TH 56962 */
 #define BCM56966_A0_REV_ID      1
-#define BCM56967_DEVICE_ID      0xb967        
+#define BCM56967_DEVICE_ID      0xb967        /* Corresponds to TH 56963 */
 #define BCM56967_A0_REV_ID      1
 
+/* Tomahawk 2 */
 #define BCM56970_DEVICE_ID      0xb970
 #define BCM56970_A0_REV_ID      1
 #define BCM56970_B0_REV_ID      0x11
@@ -1446,11 +1560,13 @@
 #define BCM56975_A0_REV_ID      1
 #define BCM56975_B0_REV_ID      0x11
 
+/* Trident3 */
 #define BCM56870_DEVICE_ID      0xb870
 #define BCM56870_A0_REV_ID      1
 #define BCM56873_DEVICE_ID      0xb873
 #define BCM56873_A0_REV_ID      1
 
+/* Helix5 */
 #define BCM56370_DEVICE_ID      0xb370
 #define BCM56370_A0_REV_ID      1
 #define BCM56370_A1_REV_ID      0x02
@@ -1501,12 +1617,14 @@
 #define BCM56579_A1_REV_ID      0x02
 #define BCM56579_A2_REV_ID      0x03
 
+/* Maverick2 */
 #define BCM56770_DEVICE_ID      0xb770
 #define BCM56770_A0_REV_ID      1
 
 #define BCM56771_DEVICE_ID      0xb771
 #define BCM56771_A0_REV_ID      1
 
+/* Firebolt6 */
 #define BCM56470_DEVICE_ID      0xb470
 #define BCM56470_A0_REV_ID      1
 #define BCM56471_DEVICE_ID      0xb471
@@ -1519,6 +1637,7 @@
 #define BCM56474_A0_REV_ID      1
 
 
+/* Wolfhound2 (Hurricane3-CR)*/
 #define BCM53540_DEVICE_ID      0x8540
 #define BCM53540_A0_REV_ID      1
 #define BCM53547_DEVICE_ID      0x8547
@@ -1528,19 +1647,43 @@
 #define BCM53549_DEVICE_ID      0x8549
 #define BCM53549_A0_REV_ID      1
 
+/* Wolfhound3 */
 #define BCM53642_DEVICE_ID      0x8642
 #define BCM53642_A0_REV_ID      1
 
+/*
+ * BCM5665: Tucana48 (48+4+1)
+ * BCM5665L: Tucana24 (24+4+1)
+ * BCM5666: Tucana48 (48+4+1) without L3
+ * BCM5666L: Tucana24 (24+4+1) without L3
+ *
+ * The device ID is 0x5665 for all of these parts.  For BCM5665L and
+ * BCM5666L, the pbmp_valid property must be set to invalidate fe24-fe47
+ * (see $SDK/rc/config.bcm).
+ */
 #define BCM5665_DEVICE_ID       0x5665
 #define BCM5665_A0_REV_ID       1
 #define BCM5665_B0_REV_ID       0x11
 
 
+/*
+ * BCM5655: Titanium48 (48+4)
+ * BCM5656: Titanium48 (48+4) without L3
+ *
+ * The device ID is 0x5655 for both parts.
+ */
 #define BCM5655_DEVICE_ID       0x5655
 #define BCM5655_A0_REV_ID       1
 #define BCM5655_B0_REV_ID       0x11
 
 
+/*
+ * BCM5650: Titanium-II (24+4)
+ * BCM5651: Titanium-II (24+4) without L3
+ *
+ * The device ID is 0x5650 for both parts.
+ * BCM5650C0 is the first spin of a real 24+4 cost-reduced chip.
+ */
 #define BCM5650_DEVICE_ID       0x5650
 #define BCM5650_A0_REV_ID       1
 #define BCM5650_B0_REV_ID       0x11
@@ -1548,9 +1691,10 @@
 
 #define BROADCOM_PHYID_HIGH 0x0040
 
-#define ARAD_DEVICE_ID          0x8650 
+/* Define Dune device IDs */
+#define ARAD_DEVICE_ID          0x8650
 #define ARAD_A0_REV_ID          0x0000
-#define ARAD_B0_REV_ID          0x0011  
+#define ARAD_B0_REV_ID          0x0011
 #define ARAD_B1_REV_ID          0x0012
 #define BCM88770_DEVICE_ID      0x8770
 #define BCM88770_A1_REV_ID      0x0002
@@ -1600,49 +1744,20 @@
 #define BCM8879E_DEVICE_ID      0x879E
 #define BCM8879F_DEVICE_ID      0x879F
 #ifdef BCM_DNXF3_SUPPORT
-#define BCM88910_DEVICE_ID      0x8910
-#define BCM88910_A0_REV_ID      DNXC_A0_REV_ID
-#define BCM88911_DEVICE_ID      0x8911
-#define BCM88912_DEVICE_ID      0x8912
-#define BCM88913_DEVICE_ID      0x8913
-#define BCM88914_DEVICE_ID      0x8914
-#define BCM88915_DEVICE_ID      0x8915
-#define BCM88916_DEVICE_ID      0x8916
-#define BCM88917_DEVICE_ID      0x8917
-#define BCM88918_DEVICE_ID      0x8918
-#define BCM88919_DEVICE_ID      0x8919
-#define BCM8891A_DEVICE_ID      0x891A
-#define BCM8891B_DEVICE_ID      0x891B
-#define BCM8891C_DEVICE_ID      0x891C
-#define BCM8891D_DEVICE_ID      0x891D
-#define BCM8891E_DEVICE_ID      0x891E
+#define RAMON2_DEVICE_ID      0x8910
 #define BCM8891F_DEVICE_ID      0x891F
-#define BCM88920_DEVICE_ID      0x8920
-#define BCM88920_A0_REV_ID      DNXC_A0_REV_ID
-#define BCM88921_DEVICE_ID      0x8921
-#define BCM88922_DEVICE_ID      0x8922
-#define BCM88923_DEVICE_ID      0x8923
-#define BCM88924_DEVICE_ID      0x8924
-#define BCM88925_DEVICE_ID      0x8925
-#define BCM88926_DEVICE_ID      0x8926
-#define BCM88927_DEVICE_ID      0x8927
-#define BCM88928_DEVICE_ID      0x8928
-#define BCM88929_DEVICE_ID      0x8929
-#define BCM8892A_DEVICE_ID      0x892A
-#define BCM8892B_DEVICE_ID      0x892B
-#define BCM8892C_DEVICE_ID      0x892C
-#define BCM8892D_DEVICE_ID      0x892D
-#define BCM8892E_DEVICE_ID      0x892E
-#define BCM8892F_DEVICE_ID      0x892F
+#define RAMON3_DEVICE_ID      0x8920
 #endif
 #define ARADPLUS_DEVICE_ID      0x8660
-#define ARADPLUS_A0_REV_ID      0x0001 
+#define ARADPLUS_A0_REV_ID      0x0001
 #define BCM88660_DEVICE_ID      ARADPLUS_DEVICE_ID
 #define BCM88660_A0_REV_ID      ARADPLUS_A0_REV_ID
-#define JERICHO_DEVICE_ID       0x8675 
+/* Jericho */
+#define JERICHO_DEVICE_ID       0x8675
 #define JERICHO_A0_REV_ID       0x0001
 #define JERICHO_B0_REV_ID       0x0011
 #define JERICHO_A1_REV_ID       0x0002
+/* Jericho SKUs */
 #define BCM88670_DEVICE_ID      0x8670
 #define BCM88670_A0_REV_ID      JERICHO_A0_REV_ID
 #define BCM88670_A1_REV_ID      JERICHO_A1_REV_ID
@@ -1700,10 +1815,12 @@
 #define BCM88677_B0_REV_ID      JERICHO_B0_REV_ID
 #define BCM88678_B0_REV_ID      JERICHO_B0_REV_ID
 #define BCM88679_B0_REV_ID      JERICHO_B0_REV_ID
-#define QMX_DEVICE_ID           0x8375 
+/* Qumran MX */
+#define QMX_DEVICE_ID           0x8375
 #define QMX_A0_REV_ID           0x0001
 #define QMX_B0_REV_ID           0x0011
 #define QMX_A1_REV_ID           0x0002
+/* Qumran MX SKUs*/
 #define BCM88370_DEVICE_ID      0x8370
 #define BCM88370_A0_REV_ID      QMX_A0_REV_ID
 #define BCM88370_A1_REV_ID      QMX_A1_REV_ID
@@ -1743,7 +1860,7 @@
 #define BCM88379_B0_REV_ID      QMX_B0_REV_ID
 
 
-#define JERICHO_PLUS_DEVICE_ID           0x8680 
+#define JERICHO_PLUS_DEVICE_ID           0x8680
 #define JERICHO_PLUS_A0_REV_ID           0x0001
 #define BCM88680_DEVICE_ID      JERICHO_PLUS_DEVICE_ID
 #define BCM88680_A0_REV_ID      JERICHO_PLUS_A0_REV_ID
@@ -1773,7 +1890,7 @@
 #define BCM88381_DEVICE_ID      0x8381
 #define BCM88381_A0_REV_ID      JERICHO_PLUS_A0_REV_ID
 
-#define JERICHO2_DEVICE_ID           0x8690 
+#define JERICHO2_DEVICE_ID           0x8690
 #define JERICHO2_A0_REV_ID     DNXC_A0_REV_ID
 #define JERICHO2_B0_REV_ID     DNXC_B0_REV_ID
 #define JERICHO2_B1_REV_ID     DNXC_B1_REV_ID
@@ -1797,9 +1914,9 @@
 #define BCM8869E_DEVICE_ID      0x869E
 #define BCM8869F_DEVICE_ID      0x869F
 
-#define J2C_DEVICE_ID           0x8800 
-#define J2C_2ND_DEVICE_ID       0x8820 
-#define J2C_DEVID_FAMILY_MASK   0xffd0 
+#define J2C_DEVICE_ID           0x8800
+#define J2C_2ND_DEVICE_ID       0x8820
+#define J2C_DEVID_FAMILY_MASK   0xffd0
 #define J2C_A0_REV_ID           DNXC_A0_REV_ID
 #define J2C_A1_REV_ID           DNXC_A1_REV_ID
 #define BCM88800_DEVICE_ID      J2C_DEVICE_ID
@@ -1899,17 +2016,13 @@
 #define BCM8883F_DEVICE_ID      0x883F
 
 #ifdef BCM_DNX3_SUPPORT
-#define JERICHO3_DEVICE_ID            0x8860
-#define JERICHO3_A0_REV_ID      DNXC_A0_REV_ID
-#define BCM88860_DEVICE_ID      JERICHO3_DEVICE_ID
-#define BCM88860_A0_REV_ID      JERICHO3_A0_REV_ID
-#define Q4_DEVICE_ID            0x8870
-#define Q4_A0_REV_ID            DNXC_A0_REV_ID
-#define BCM88870_DEVICE_ID      Q4_DEVICE_ID
-#define BCM88870_A0_REV_ID      Q4_A0_REV_ID
+#define JERICHO3_DEVICE_ID      0x8860
+#define Q3_DEVICE_ID_START      0x886a
+#define Q3_DEVICE_ID_END        0x886f
+#define J3AI_DEVICE_ID           0x8890
+#define Q3D_DEVICE_ID           0x8870
 #endif
-
-#define Q2A_DEVICE_ID           0x8480 
+#define Q2A_DEVICE_ID           0x8480
 #define Q2A_A0_REV_ID           DNXC_A0_REV_ID
 #define Q2A_B0_REV_ID           DNXC_B0_REV_ID
 #define Q2A_B1_REV_ID           DNXC_B1_REV_ID
@@ -1969,10 +2082,10 @@
 #define BCM8829E_DEVICE_ID      0x829E
 #define BCM8829F_DEVICE_ID      0x829F
 
-#define QAX_DEVICE_ID           0x8470 
+#define QAX_DEVICE_ID           0x8470
 #define QAX_A0_REV_ID           0x0001
 #define QAX_B0_REV_ID           0x0011
-#define BCM88470_DEVICE_ID      QAX_DEVICE_ID	
+#define BCM88470_DEVICE_ID      QAX_DEVICE_ID
 #define BCM88470_B0_REV_ID      QAX_B0_REV_ID
 #define BCM88470P_DEVICE_ID     0x847C
 #define BCM88471_DEVICE_ID      0x8471
@@ -1988,7 +2101,7 @@
 
 #define BCM88470_A0_REV_ID      QAX_A0_REV_ID
 
-#define QUX_DEVICE_ID           0x8270 
+#define QUX_DEVICE_ID           0x8270
 #define QUX_A0_REV_ID           0x0001
 #define QUX_A1_REV_ID           0x0002
 #define QUX_B0_REV_ID           0x0011
@@ -2046,11 +2159,27 @@
 #define BCM88952_A0_REV_ID		0x0001
 #define BCM88952_A1_REV_ID		0x0002
 
-#define PLX9056_DEVICE_ID       0x9056 
+#define PLX9056_DEVICE_ID       0x9056 /* needed for DNX_TEST_BOARD */
 
+/* Trident4 X11c*/
 #define BCM56890_DEVICE_ID 0xb890
 #define BCM56890_A0_REV_ID 0x0001
-
+#define BCM56891_DEVICE_ID 0xb891
+#define BCM56891_A0_REV_ID 0x0001
+#define BCM56892_DEVICE_ID 0xb892
+#define BCM56892_A0_REV_ID 0x0001
+#define BCM56895_DEVICE_ID 0xb895
+#define BCM56895_A0_REV_ID 0x0001
+#define BCM56896_DEVICE_ID 0xb896
+#define BCM56896_A0_REV_ID 0x0001
+
+/* Trident4 X7*/
+#define BCM56690_DEVICE_ID 0xb690
+#define BCM56690_A0_REV_ID 0x0001
+#define BCM56692_DEVICE_ID 0xb692
+#define BCM56692_A0_REV_ID 0x0001
+
+/* Trident4 */
 #define BCM56880_DEVICE_ID 0xb880
 #define BCM56880_A0_REV_ID 0x0001
 #define BCM56880_B0_REV_ID 0x0011
@@ -2061,26 +2190,33 @@
 #define BCM56883_A0_REV_ID 0x0001
 #define BCM56883_B0_REV_ID 0x0011
 
+/* Trident4 X9 */
 #define BCM56780_DEVICE_ID 0xb780
 #define BCM56780_A0_REV_ID 0x0001
 #define BCM56782_DEVICE_ID 0xb782
 #define BCM56782_A0_REV_ID 0x0001
+#define BCM56782_A1_REV_ID 0x0002
 #define BCM56784_DEVICE_ID 0xb784
 #define BCM56784_A0_REV_ID 0x0001
 #define BCM56785_DEVICE_ID 0xb785
 #define BCM56785_A0_REV_ID 0x0001
 #define BCM56786_DEVICE_ID 0xb786
 #define BCM56786_A0_REV_ID 0x0001
+#define BCM56786_A1_REV_ID 0x0002
 #define BCM56787_DEVICE_ID 0xb787
 #define BCM56787_A0_REV_ID 0x0001
+#define BCM56787_A1_REV_ID 0x0002
 #define BCM56788_DEVICE_ID 0xb788
 #define BCM56788_A0_REV_ID 0x0001
+#define BCM56788_A1_REV_ID 0x0002
 #define BCM56789_DEVICE_ID 0xb789
 #define BCM56789_A0_REV_ID 0x0001
 
+/* Tomahawk4 */
 #define BCM56990_DEVICE_ID 0xb990
 #define BCM56990_A0_REV_ID 0x0001
 
+/* Tomahawk4 */
 #ifndef BCM56990_DEVICE_ID
 #define BCM56990_DEVICE_ID 0xb990
 #define BCM56990_A0_REV_ID 0x0001
@@ -2093,11 +2229,13 @@
 #define BCM56993_DEVICE_ID 0xb993
 #define BCM56993_B0_REV_ID 0x0011
 
+/* Tomahawk4G */
 #define BCM56996_DEVICE_ID 0xb996
 #define BCM56996_A0_REV_ID 0x0001
 #define BCM56997_DEVICE_ID 0xb997
 #define BCM56997_A0_REV_ID 0x0001
 
+/* Tomahawk4G */
 #ifndef BCM56996_DEVICE_ID
 #define BCM56996_DEVICE_ID 0xb996
 #define BCM56996_A0_REV_ID 0x0001
@@ -2106,9 +2244,11 @@
 #define BCM56996_B0_REV_ID 0x0011
 #define BCM56997_B0_REV_ID 0x0011
 
+/* Tomahawk4GT */
 #define BCM56998_DEVICE_ID 0xb998
 #define BCM56998_A0_REV_ID 0x0001
 
+/* Tomahawk4D */
 #define BCM56999_DEVICE_ID 0xb999
 #define BCM56999_A0_REV_ID 0x0001
 #define BCM56999_B0_REV_ID 0x0011
@@ -2116,18 +2256,38 @@
 #define BCM56995_A0_REV_ID 0x0001
 #define BCM56995_B0_REV_ID 0x0011
 
+/* Tomahawk5 */
 #define BCM78900_DEVICE_ID 0xf900
 #define BCM78900_B0_REV_ID 0x0011
 
+#define BCM78902_DEVICE_ID 0xf902
+#define BCM78902_B0_REV_ID 0x0011
+
+#define BCM78903_DEVICE_ID 0xf903
+#define BCM78903_B0_REV_ID 0x0011
+
+/* Tomahawk5+ */
+#define BCM78905_DEVICE_ID 0xf905
+#define BCM78905_A0_REV_ID 0x0001
+
+/* Firelight2 */
 #define BCM56080_DEVICE_ID 0xb080
 #define BCM56080_A0_REV_ID 0x0001
+#define BCM56080_A1_REV_ID 0x0002
 #define BCM56081_DEVICE_ID 0xb081
 #define BCM56081_A0_REV_ID 0x0001
+#define BCM56081_A1_REV_ID 0x0002
 #define BCM56082_DEVICE_ID 0xb082
 #define BCM56082_A0_REV_ID 0x0001
+#define BCM56082_A1_REV_ID 0x0002
 #define BCM56083_DEVICE_ID 0xb083
 #define BCM56083_A0_REV_ID 0x0001
+#define BCM56083_A1_REV_ID 0x0002
 #define BCM56084_DEVICE_ID 0xb084
 #define BCM56084_A0_REV_ID 0x0001
+#define BCM56084_A1_REV_ID 0x0002
+#define BCM56085_DEVICE_ID 0xb085
+#define BCM56085_A0_REV_ID 0x0001
+#define BCM56085_A1_REV_ID 0x0002
 
-#endif  
+#endif  /* !_SOC_DEVIDS_H */
diff --git a/platform/broadcom/saibcm-modules/make/Make.config b/platform/broadcom/saibcm-modules/make/Make.config
index 9a881329e..163b08551 100644
--- a/platform/broadcom/saibcm-modules/make/Make.config
+++ b/platform/broadcom/saibcm-modules/make/Make.config
@@ -1,32 +1,29 @@
-#
-#  Copyright 2007-2020 Broadcom Inc. All rights reserved.
-#  
-#  Permission is granted to use, copy, modify and/or distribute this
-#  software under either one of the licenses below.
-#  
-#  License Option 1: GPL
-#  
-#  This program is free software; you can redistribute it and/or modify
-#  it under the terms of the GNU General Public License, version 2, as
-#  published by the Free Software Foundation (the "GPL").
-#  
-#  This program is distributed in the hope that it will be useful, but
-#  WITHOUT ANY WARRANTY; without even the implied warranty of
-#  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
-#  General Public License version 2 (GPLv2) for more details.
-#  
-#  You should have received a copy of the GNU General Public License
-#  version 2 (GPLv2) along with this source code.
-#  
-#  
-#  License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
-#  
-#  This software is governed by the Broadcom Open Network Switch APIs license:
-#  https://www.broadcom.com/products/ethernet-connectivity/software/opennsa
-#
 # $Id: Make.config,v 1.3 Broadcom SDK $
-# $Copyright: (c) 2005 Broadcom Corp.
-# All Rights Reserved.$
+# $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+# 
+# Permission is granted to use, copy, modify and/or distribute this
+# software under either one of the licenses below.
+# 
+# License Option 1: GPL
+# 
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License, version 2, as
+# published by the Free Software Foundation (the "GPL").
+# 
+# This program is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+# General Public License version 2 (GPLv2) for more details.
+# 
+# You should have received a copy of the GNU General Public License
+# version 2 (GPLv2) along with this source code.
+# 
+# 
+# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
+# 
+# This software is governed by the Broadcom Open Network Switch APIs license:
+# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+# 
 #
 
 ifneq ($(strip $(override-target)),)
@@ -119,12 +116,14 @@ else # ifeq "$(HOSTTYPE)" "Windows2000PC"
 ifndef SDKBUILD
 SDKBUILD :=build
 endif
+
 ifdef SDK_OUTDIR
 BLDROOT = ${SDK_OUTDIR}/${SDKBUILD}/$(if ${BLDCONFIG},${BLDCONFIG}/)${target}${all_suffix}${bldroot_suffix}
 export DEST_DIR := ${SDK_OUTDIR}/${SDKBUILD}$(if ${BLDCONFIG},/${BLDCONFIG})$(DEST_DIR_SUFFIX)
 else
 BLDROOT = ${SDK}/${SDKBUILD}/$(if ${BLDCONFIG},${BLDCONFIG}/)${target}${all_suffix}${bldroot_suffix}
 endif
+
 endif # ifeq "$(HOSTTYPE)" "Windows2000PC"
 
 # This is needed because we cannot include Make.vxworks before Make.config
diff --git a/platform/broadcom/saibcm-modules/make/Make.depend b/platform/broadcom/saibcm-modules/make/Make.depend
index 802f5f448..061468fd6 100644
--- a/platform/broadcom/saibcm-modules/make/Make.depend
+++ b/platform/broadcom/saibcm-modules/make/Make.depend
@@ -1,32 +1,29 @@
-#
-#  Copyright 2007-2020 Broadcom Inc. All rights reserved.
-#  
-#  Permission is granted to use, copy, modify and/or distribute this
-#  software under either one of the licenses below.
-#  
-#  License Option 1: GPL
-#  
-#  This program is free software; you can redistribute it and/or modify
-#  it under the terms of the GNU General Public License, version 2, as
-#  published by the Free Software Foundation (the "GPL").
-#  
-#  This program is distributed in the hope that it will be useful, but
-#  WITHOUT ANY WARRANTY; without even the implied warranty of
-#  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
-#  General Public License version 2 (GPLv2) for more details.
-#  
-#  You should have received a copy of the GNU General Public License
-#  version 2 (GPLv2) along with this source code.
-#  
-#  
-#  License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
-#  
-#  This software is governed by the Broadcom Open Network Switch APIs license:
-#  https://www.broadcom.com/products/ethernet-connectivity/software/opennsa
-#
 # $Id: Make.depend,v 1.14 Broadcom SDK $
-# $Copyright: (c) 2005 Broadcom Corp.
-# All Rights Reserved.$
+# $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+# 
+# Permission is granted to use, copy, modify and/or distribute this
+# software under either one of the licenses below.
+# 
+# License Option 1: GPL
+# 
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License, version 2, as
+# published by the Free Software Foundation (the "GPL").
+# 
+# This program is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+# General Public License version 2 (GPLv2) for more details.
+# 
+# You should have received a copy of the GNU General Public License
+# version 2 (GPLv2) along with this source code.
+# 
+# 
+# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
+# 
+# This software is governed by the Broadcom Open Network Switch APIs license:
+# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+# 
 #
 # Default rule to build dependencies.  This builds a x.d file for each
 # x.c file that describes the dependencies.  We then conditionally include 
diff --git a/platform/broadcom/saibcm-modules/make/Make.kernlib b/platform/broadcom/saibcm-modules/make/Make.kernlib
index 56752beca..52f2b7215 100644
--- a/platform/broadcom/saibcm-modules/make/Make.kernlib
+++ b/platform/broadcom/saibcm-modules/make/Make.kernlib
@@ -1,32 +1,29 @@
-#
-#  Copyright 2007-2020 Broadcom Inc. All rights reserved.
-#  
-#  Permission is granted to use, copy, modify and/or distribute this
-#  software under either one of the licenses below.
-#  
-#  License Option 1: GPL
-#  
-#  This program is free software; you can redistribute it and/or modify
-#  it under the terms of the GNU General Public License, version 2, as
-#  published by the Free Software Foundation (the "GPL").
-#  
-#  This program is distributed in the hope that it will be useful, but
-#  WITHOUT ANY WARRANTY; without even the implied warranty of
-#  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
-#  General Public License version 2 (GPLv2) for more details.
-#  
-#  You should have received a copy of the GNU General Public License
-#  version 2 (GPLv2) along with this source code.
-#  
-#  
-#  License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
-#  
-#  This software is governed by the Broadcom Open Network Switch APIs license:
-#  https://www.broadcom.com/products/ethernet-connectivity/software/opennsa
-#
 # $Id: Make.kernlib,v 1.7 Broadcom SDK $
-# $Copyright: (c) 2005 Broadcom Corp.
-# All Rights Reserved.$
+# $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+# 
+# Permission is granted to use, copy, modify and/or distribute this
+# software under either one of the licenses below.
+# 
+# License Option 1: GPL
+# 
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License, version 2, as
+# published by the Free Software Foundation (the "GPL").
+# 
+# This program is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+# General Public License version 2 (GPLv2) for more details.
+# 
+# You should have received a copy of the GNU General Public License
+# version 2 (GPLv2) along with this source code.
+# 
+# 
+# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
+# 
+# This software is governed by the Broadcom Open Network Switch APIs license:
+# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+# 
 #
 # Make rules/targets for handling libraries
 
diff --git a/platform/broadcom/saibcm-modules/make/Make.lib b/platform/broadcom/saibcm-modules/make/Make.lib
index a4f19aad9..c0877fb7a 100644
--- a/platform/broadcom/saibcm-modules/make/Make.lib
+++ b/platform/broadcom/saibcm-modules/make/Make.lib
@@ -1,32 +1,29 @@
-#
-#  Copyright 2007-2020 Broadcom Inc. All rights reserved.
-#  
-#  Permission is granted to use, copy, modify and/or distribute this
-#  software under either one of the licenses below.
-#  
-#  License Option 1: GPL
-#  
-#  This program is free software; you can redistribute it and/or modify
-#  it under the terms of the GNU General Public License, version 2, as
-#  published by the Free Software Foundation (the "GPL").
-#  
-#  This program is distributed in the hope that it will be useful, but
-#  WITHOUT ANY WARRANTY; without even the implied warranty of
-#  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
-#  General Public License version 2 (GPLv2) for more details.
-#  
-#  You should have received a copy of the GNU General Public License
-#  version 2 (GPLv2) along with this source code.
-#  
-#  
-#  License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
-#  
-#  This software is governed by the Broadcom Open Network Switch APIs license:
-#  https://www.broadcom.com/products/ethernet-connectivity/software/opennsa
-#
 # $Id: Make.lib,v 1.14 Broadcom SDK $
-# $Copyright: (c) 2005 Broadcom Corp.
-# All Rights Reserved.$
+# $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+# 
+# Permission is granted to use, copy, modify and/or distribute this
+# software under either one of the licenses below.
+# 
+# License Option 1: GPL
+# 
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License, version 2, as
+# published by the Free Software Foundation (the "GPL").
+# 
+# This program is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+# General Public License version 2 (GPLv2) for more details.
+# 
+# You should have received a copy of the GNU General Public License
+# version 2 (GPLv2) along with this source code.
+# 
+# 
+# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
+# 
+# This software is governed by the Broadcom Open Network Switch APIs license:
+# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+# 
 #
 # Make rules/targets for handling libraries
 
@@ -79,4 +76,4 @@ distclean:: clean
 
 ifeq ($(DNX_FAST_MODE),1)
 -include $(SDK)/tools/dnx/make/lib.mk
-endif
+endif
\ No newline at end of file
diff --git a/platform/broadcom/saibcm-modules/make/Make.linux b/platform/broadcom/saibcm-modules/make/Make.linux
index ad18872a3..ff7fc026f 100644
--- a/platform/broadcom/saibcm-modules/make/Make.linux
+++ b/platform/broadcom/saibcm-modules/make/Make.linux
@@ -1,33 +1,30 @@
 #
-#  Copyright 2007-2020 Broadcom Inc. All rights reserved.
-#  
-#  Permission is granted to use, copy, modify and/or distribute this
-#  software under either one of the licenses below.
-#  
-#  License Option 1: GPL
-#  
-#  This program is free software; you can redistribute it and/or modify
-#  it under the terms of the GNU General Public License, version 2, as
-#  published by the Free Software Foundation (the "GPL").
-#  
-#  This program is distributed in the hope that it will be useful, but
-#  WITHOUT ANY WARRANTY; without even the implied warranty of
-#  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
-#  General Public License version 2 (GPLv2) for more details.
-#  
-#  You should have received a copy of the GNU General Public License
-#  version 2 (GPLv2) along with this source code.
-#  
-#  
-#  License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
-#  
-#  This software is governed by the Broadcom Open Network Switch APIs license:
-#  https://www.broadcom.com/products/ethernet-connectivity/software/opennsa
-#
-#
 # $Id: Make.linux,v 1.18 Broadcom SDK $
-# $Copyright: (c) 2005 Broadcom Corp.
-# All Rights Reserved.$
+# $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+# 
+# Permission is granted to use, copy, modify and/or distribute this
+# software under either one of the licenses below.
+# 
+# License Option 1: GPL
+# 
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License, version 2, as
+# published by the Free Software Foundation (the "GPL").
+# 
+# This program is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+# General Public License version 2 (GPLv2) for more details.
+# 
+# You should have received a copy of the GNU General Public License
+# version 2 (GPLv2) along with this source code.
+# 
+# 
+# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
+# 
+# This software is governed by the Broadcom Open Network Switch APIs license:
+# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+# 
 # 
 # Common make targets for Linux user and kernel builds included by top
 # level Linux makefiles
@@ -68,6 +65,10 @@ LINUX_MAKE_DIR := $(SDK)/systems/linux/kernel/common
 endif
 endif
 
+ifneq (,$(findstring iproc,$(platform)))
+  ADD_TO_CFLAGS += -DINCLUDE_MTD
+endif
+
 ifdef LINUX_MAKE_USER
   CMD = $(LINUX_MAKE_FLAGS) -C $(LINUX_MAKE_DIR) \
         platform=$(platform) bldroot_suffix=/$(platform) kernel_version=$(kernel_version) \
diff --git a/platform/broadcom/saibcm-modules/make/Make.subdirs b/platform/broadcom/saibcm-modules/make/Make.subdirs
index 4016cb832..637f0d376 100644
--- a/platform/broadcom/saibcm-modules/make/Make.subdirs
+++ b/platform/broadcom/saibcm-modules/make/Make.subdirs
@@ -1,32 +1,29 @@
-#
-#  Copyright 2007-2020 Broadcom Inc. All rights reserved.
-#  
-#  Permission is granted to use, copy, modify and/or distribute this
-#  software under either one of the licenses below.
-#  
-#  License Option 1: GPL
-#  
-#  This program is free software; you can redistribute it and/or modify
-#  it under the terms of the GNU General Public License, version 2, as
-#  published by the Free Software Foundation (the "GPL").
-#  
-#  This program is distributed in the hope that it will be useful, but
-#  WITHOUT ANY WARRANTY; without even the implied warranty of
-#  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
-#  General Public License version 2 (GPLv2) for more details.
-#  
-#  You should have received a copy of the GNU General Public License
-#  version 2 (GPLv2) along with this source code.
-#  
-#  
-#  License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
-#  
-#  This software is governed by the Broadcom Open Network Switch APIs license:
-#  https://www.broadcom.com/products/ethernet-connectivity/software/opennsa
-#
 # $Id: Make.subdirs,v 1.8 Broadcom SDK $
-# $Copyright: (c) 2005 Broadcom Corp.
-# All Rights Reserved.$
+# $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+# 
+# Permission is granted to use, copy, modify and/or distribute this
+# software under either one of the licenses below.
+# 
+# License Option 1: GPL
+# 
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License, version 2, as
+# published by the Free Software Foundation (the "GPL").
+# 
+# This program is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+# General Public License version 2 (GPLv2) for more details.
+# 
+# You should have received a copy of the GNU General Public License
+# version 2 (GPLv2) along with this source code.
+# 
+# 
+# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
+# 
+# This software is governed by the Broadcom Open Network Switch APIs license:
+# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+# 
 #
 # Make rules/targets for handling subdirectories
 
diff --git a/platform/broadcom/saibcm-modules/make/Make.tools b/platform/broadcom/saibcm-modules/make/Make.tools
index 0d55eb2e6..7f3a6d832 100644
--- a/platform/broadcom/saibcm-modules/make/Make.tools
+++ b/platform/broadcom/saibcm-modules/make/Make.tools
@@ -1,32 +1,29 @@
-#
-#  Copyright 2007-2020 Broadcom Inc. All rights reserved.
-#  
-#  Permission is granted to use, copy, modify and/or distribute this
-#  software under either one of the licenses below.
-#  
-#  License Option 1: GPL
-#  
-#  This program is free software; you can redistribute it and/or modify
-#  it under the terms of the GNU General Public License, version 2, as
-#  published by the Free Software Foundation (the "GPL").
-#  
-#  This program is distributed in the hope that it will be useful, but
-#  WITHOUT ANY WARRANTY; without even the implied warranty of
-#  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
-#  General Public License version 2 (GPLv2) for more details.
-#  
-#  You should have received a copy of the GNU General Public License
-#  version 2 (GPLv2) along with this source code.
-#  
-#  
-#  License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
-#  
-#  This software is governed by the Broadcom Open Network Switch APIs license:
-#  https://www.broadcom.com/products/ethernet-connectivity/software/opennsa
-#
 # $Id: Make.tools,v 1.2 Broadcom SDK $
-# $Copyright: (c) 2005 Broadcom Corp.
-# All Rights Reserved.$
+# $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+# 
+# Permission is granted to use, copy, modify and/or distribute this
+# software under either one of the licenses below.
+# 
+# License Option 1: GPL
+# 
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License, version 2, as
+# published by the Free Software Foundation (the "GPL").
+# 
+# This program is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+# General Public License version 2 (GPLv2) for more details.
+# 
+# You should have received a copy of the GNU General Public License
+# version 2 (GPLv2) along with this source code.
+# 
+# 
+# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
+# 
+# This software is governed by the Broadcom Open Network Switch APIs license:
+# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+# 
 
 SYSNAME	:= $(shell uname -s)
 HCC ?=/usr/bin/gcc
diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-gts b/platform/broadcom/saibcm-modules/make/Makefile.linux-gts
index 293feaf97..f206b4d9a 100644
--- a/platform/broadcom/saibcm-modules/make/Makefile.linux-gts
+++ b/platform/broadcom/saibcm-modules/make/Makefile.linux-gts
@@ -1,32 +1,29 @@
-#
-#  Copyright 2007-2020 Broadcom Inc. All rights reserved.
-#  
-#  Permission is granted to use, copy, modify and/or distribute this
-#  software under either one of the licenses below.
-#  
-#  License Option 1: GPL
-#  
-#  This program is free software; you can redistribute it and/or modify
-#  it under the terms of the GNU General Public License, version 2, as
-#  published by the Free Software Foundation (the "GPL").
-#  
-#  This program is distributed in the hope that it will be useful, but
-#  WITHOUT ANY WARRANTY; without even the implied warranty of
-#  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
-#  General Public License version 2 (GPLv2) for more details.
-#  
-#  You should have received a copy of the GNU General Public License
-#  version 2 (GPLv2) along with this source code.
-#  
-#  
-#  License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
-#  
-#  This software is governed by the Broadcom Open Network Switch APIs license:
-#  https://www.broadcom.com/products/ethernet-connectivity/software/opennsa
-#
 # $Id: Makefile.linux-xlr-4_19,v 0.1 Broadcom SDK $
-# $Copyright: (c) 2015 Broadcom Corp.
-# All Rights Reserved.$
+# $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+# 
+# Permission is granted to use, copy, modify and/or distribute this
+# software under either one of the licenses below.
+# 
+# License Option 1: GPL
+# 
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License, version 2, as
+# published by the Free Software Foundation (the "GPL").
+# 
+# This program is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+# General Public License version 2 (GPLv2) for more details.
+# 
+# You should have received a copy of the GNU General Public License
+# version 2 (GPLv2) along with this source code.
+# 
+# 
+# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
+# 
+# This software is governed by the Broadcom Open Network Switch APIs license:
+# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+# 
 
 #
 # XLR system make file.
@@ -45,9 +42,9 @@
 #endif
 
 # some basic path variables for tools and kernel source, etc #
-XLR_TOOLS_BASE ?= /projects/ntsw-tools/linux/xlr-510
+XLR_TOOLS_BASE ?= /projects/ntsw-tools/linux/gcc12.2
 TOOLCHAIN_DIR = $(XLR_TOOLS_BASE)/buildroot/host/usr
-KERNDIR       = $(XLR_TOOLS_BASE)/kernel/linux
+KERNDIR       ?= /projects/ntsw-tools/linux/xlr-510/kernel/linux
 # Target machine for EDK-Host defconfig
 TARGET_MACHINE ?= x86_64
 
@@ -72,7 +69,7 @@ export PATH         := $(TOOLCHAIN_DIR)/bin:$(KERNDIR):$(PATH)
 CROSS_GCC_VER ?= $(shell $(TOOLCHAIN_DIR)/bin/$(CROSS_COMPILE)gcc -dumpversion)
 export SYSINC := $(TOOLCHAIN_DIR)/lib/gcc/$(TARGET_ARCHITECTURE)/$(CROSS_GCC_VER)/include
 
-# Glibc 2.27 or later version doesn't support SVID libm error handling. 
+# Glibc 2.27 or later version doesn't support SVID libm error handling.
 # Building tcl 8.3.3 with the new toolchain will occur errors.
 export TCL840  := 1
 
@@ -93,6 +90,10 @@ CFLAGS += -L$(TOOLCHAIN_DIR)/lib64
 ifeq (1,$(USE_CLANG)) # CLANG-specific CFLAGS
 CFLAGS += -Wno-strlcpy-strlcat-size
 CFLAGS += -Wno-strncat-size
+ifeq "$(shell expr `echo $(CROSS_GCC_VER) | cut -f1 -d.` \>= 12)" "1"
+export LIBNSL_DEPRECATED := 1
+endif
+
 else # GCC-specific CFLAGS
 CFLAGS += -Wno-error=unused-but-set-variable
 CFLAGS += -Wno-error=maybe-uninitialized
@@ -116,6 +117,11 @@ ifeq "$(shell expr `echo $(CROSS_GCC_VER) | cut -f2 -d.` \== 2)" "1"
 	CFLAGS += -Wno-zero-length-bounds
 endif
 endif
+ifeq "$(shell expr `echo $(CROSS_GCC_VER) | cut -f1 -d.` \== 12)" "1"
+	CFGFLAGS += -flarge-source-files
+	CFGFLAGS += -Wno-error=address
+	export LIBNSL_DEPRECATED := 1
+endif
 endif # Compiler-specific CFLAGS
 
 #XLDK-568 fix inline references
@@ -131,7 +137,12 @@ CFLAGS += -Wno-deprecated-declarations #SDK-233174
 
 # set up KFLAGS appropriately. #
 ifeq (,$(KFLAGS))
-KFLAGS := -L$(TOOLCHAIN_DIR)/lib -L$(TOOLCHAIN_DIR)/lib64 -I$(KERNDIR) -lc -nostdinc -isystem $(SYSINC) -Iinclude -I$(KERNDIR)/arch/x86/include -I$(KERNDIR)/arch/x86/include/generated -I$(KERNDIR)/arch/x86/include/generated/uapi -I$(KERNDIR)/arch/x86/include/uapi -I$(KERNDIR)/include -I$(KERNDIR)/include/generated -I$(KERNDIR)/include/generated/uapi -I$(KERNDIR)/include/uapi -include $(KERNDIR)/include/generated/autoconf.h -D__KERNEL__ -DNDEBUG -Wundef -Wstrict-prototypes -Wno-trigraphs -fno-strict-aliasing -fno-common -Wno-format-security -fno-delete-null-pointer-checks -Os -mno-sse -m64 -mtune=generic -mno-red-zone -mcmodel=kernel -funit-at-a-time -maccumulate-outgoing-args -fstack-protector -DCONFIG_AS_CFI=1 -DCONFIG_AS_CFI_SIGNAL_FRAME=1 -pipe -Wno-sign-compare -fno-asynchronous-unwind-tables -fno-omit-frame-pointer -Wdeclaration-after-statement -Wno-pointer-sign -fno-dwarf2-cfi-asm -fconserve-stack
+KFLAGS := -L$(TOOLCHAIN_DIR)/lib -L$(TOOLCHAIN_DIR)/lib64 -I$(KERNDIR) -lc -nostdinc -isystem $(SYSINC) -Iinclude -I$(KERNDIR)/arch/x86/include -I$(KERNDIR)/arch/x86/include/generated -I$(KERNDIR)/arch/x86/include/generated/uapi -I$(KERNDIR)/arch/x86/include/uapi -I$(KERNDIR)/include -I$(KERNDIR)/include/generated -I$(KERNDIR)/include/generated/uapi -I$(KERNDIR)/include/uapi -include $(KERNDIR)/include/generated/autoconf.h -D__KERNEL__ -DNDEBUG -Wundef -Wstrict-prototypes -Wno-trigraphs -fno-strict-aliasing -fno-common -Wno-format-security -fno-delete-null-pointer-checks -Os -mno-sse -m64 -mtune=generic -mno-red-zone -mcmodel=kernel -fstack-protector -DCONFIG_AS_CFI=1 -DCONFIG_AS_CFI_SIGNAL_FRAME=1 -pipe -Wno-sign-compare -fno-asynchronous-unwind-tables -fno-omit-frame-pointer -Wdeclaration-after-statement -Wno-pointer-sign -fno-dwarf2-cfi-asm
+ifneq (1,$(USE_CLANG))
+KFLAGS += -funit-at-a-time -maccumulate-outgoing-args -fconserve-stack
+else
+KFLAGS += -fno-pie
+endif
 endif
 
 
diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-iproc b/platform/broadcom/saibcm-modules/make/Makefile.linux-iproc
index 9b08d0b2a..c3648ed85 100644
--- a/platform/broadcom/saibcm-modules/make/Makefile.linux-iproc
+++ b/platform/broadcom/saibcm-modules/make/Makefile.linux-iproc
@@ -1,32 +1,29 @@
-#
-#  Copyright 2007-2020 Broadcom Inc. All rights reserved.
-#  
-#  Permission is granted to use, copy, modify and/or distribute this
-#  software under either one of the licenses below.
-#  
-#  License Option 1: GPL
-#  
-#  This program is free software; you can redistribute it and/or modify
-#  it under the terms of the GNU General Public License, version 2, as
-#  published by the Free Software Foundation (the "GPL").
-#  
-#  This program is distributed in the hope that it will be useful, but
-#  WITHOUT ANY WARRANTY; without even the implied warranty of
-#  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
-#  General Public License version 2 (GPLv2) for more details.
-#  
-#  You should have received a copy of the GNU General Public License
-#  version 2 (GPLv2) along with this source code.
-#  
-#  
-#  License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
-#  
-#  This software is governed by the Broadcom Open Network Switch APIs license:
-#  https://www.broadcom.com/products/ethernet-connectivity/software/opennsa
-#
 # $Id: Makefile.linux-iproc Exp $
-# $Copyright: (c) 2007 Broadcom Corp.
-# All Rights Reserved.$
+# $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+# 
+# Permission is granted to use, copy, modify and/or distribute this
+# software under either one of the licenses below.
+# 
+# License Option 1: GPL
+# 
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License, version 2, as
+# published by the Free Software Foundation (the "GPL").
+# 
+# This program is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+# General Public License version 2 (GPLv2) for more details.
+# 
+# You should have received a copy of the GNU General Public License
+# version 2 (GPLv2) along with this source code.
+# 
+# 
+# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
+# 
+# This software is governed by the Broadcom Open Network Switch APIs license:
+# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+# 
 # Makefile for iproc-CMICd
 
 # User must select one platform from below.By default ARM_LINUX is selected. .
@@ -46,8 +43,8 @@ KERN_BASE_DIR ?= $(TOOLCHAIN_BASE_DIR)
 TARGET_ARCHITECTURE:=armeb-broadcom-linux-uclibcgnueabi
 KERNDIR ?= $(TOOLCHAIN_BASE_DIR)/kernel/linux
 else
-TOOLCHAIN_BASE_DIR ?= /projects/ntsw-tools/linux/iproc_ldks/XLDK_GCC10/XLDK32
-KERN_BASE_DIR ?= /projects/ntsw-tools/linux/iproc_ldks/xldk61/XLDK32
+TOOLCHAIN_BASE_DIR ?= /projects/ntsw-tools/linux/iproc_ldks/xldk62/XLDK32
+KERN_BASE_DIR ?= /projects/ntsw-tools/linux/iproc_ldks/xldk62/XLDK32
 TARGET_ARCHITECTURE:= arm-broadcom-linux-uclibcgnueabi
 KERNDIR ?= $(KERN_BASE_DIR)/kernel/linux
 endif
@@ -96,6 +93,10 @@ ifeq "$(shell expr $(CROSS_GCC_VER_MAJOR) \== 10)" "1"
 	CFLAGS += -Wno-error=format-overflow
 	CFLAGS += -fcommon
 endif
+ifeq "$(shell expr $(CROSS_GCC_VER_MAJOR) \== 12)" "1"
+	CFLAGS += -flarge-source-files
+	CFLAGS += -Wno-error=address
+endif
 
 CFGFLAGS += -D$(ENDIAN) -DIPROC_CMICD
 CFGFLAGS += -DBCM_PLATFORM_STRING=\"IPROC_CMICD\"
@@ -125,7 +126,7 @@ modname_flags  = $(if $(filter 1,$(words $(modname))),\
 KFLAG_INCLD ?= $(LD_LIBRARY_PATH)/gcc/$(TARGET_ARCHITECTURE)/$(CROSS_GCC_VER)/include
 
 ifeq (,$(KFLAGS))
-KFLAGS := -D__LINUX_ARM_ARCH__=7 -D__KERNEL__ -nostdinc  -isystem $(KFLAG_INCLD) -I$(LINUX_INCLUDE) -include $(LINUX_INCLUDE)/generated/autoconf.h -I$(KERNDIR)/arch/arm/include -I$(KERNDIR)/arch/arm/include/generated -I$(KERNDIR)/arch/arm/mach-iproc/include -Wall -Wstrict-prototypes -Wno-trigraphs -Os -fno-strict-aliasing -fno-common -marm -mabi=aapcs-linux -fno-pic -pipe -msoft-float -ffreestanding -march=armv7-a -mfpu=vfp -mfloat-abi=softfp -fomit-frame-pointer -g -fno-stack-protector -Wdeclaration-after-statement -Wno-pointer-sign -mlong-calls
+KFLAGS := -D__LINUX_ARM_ARCH__=7 -D__KERNEL__ -nostdinc  -isystem $(KFLAG_INCLD) -I$(LINUX_INCLUDE) -include $(LINUX_INCLUDE)/generated/autoconf.h -I$(KERNDIR)/arch/arm/include -I$(KERNDIR)/arch/arm/include/generated -I$(KERNDIR)/arch/arm/mach-iproc/include -Wall -Wstrict-prototypes -Wno-trigraphs -Os -fno-strict-aliasing -fno-common -marm -mabi=aapcs-linux -fno-pic -pipe -msoft-float -ffreestanding -march=armv7-a -mfloat-abi=softfp -fomit-frame-pointer -g -fno-stack-protector -Wdeclaration-after-statement -Wno-pointer-sign -mlong-calls
 KFLAGS += -I$(LINUX_INCLUDE)/uapi -I$(LINUX_INCLUDE)/generated/uapi -I$(KERNDIR)/arch/arm/include/uapi -I$(KERNDIR)/arch/arm/include/generated/uapi
 
 ifeq "$(shell expr $(CROSS_GCC_VER_MAJOR) \== 10)" "1"
diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-iproc-3_14 b/platform/broadcom/saibcm-modules/make/Makefile.linux-iproc-3_14
index 8d9f66aa5..a71c3728b 100644
--- a/platform/broadcom/saibcm-modules/make/Makefile.linux-iproc-3_14
+++ b/platform/broadcom/saibcm-modules/make/Makefile.linux-iproc-3_14
@@ -1,32 +1,29 @@
-#
-#  Copyright 2007-2020 Broadcom Inc. All rights reserved.
-#  
-#  Permission is granted to use, copy, modify and/or distribute this
-#  software under either one of the licenses below.
-#  
-#  License Option 1: GPL
-#  
-#  This program is free software; you can redistribute it and/or modify
-#  it under the terms of the GNU General Public License, version 2, as
-#  published by the Free Software Foundation (the "GPL").
-#  
-#  This program is distributed in the hope that it will be useful, but
-#  WITHOUT ANY WARRANTY; without even the implied warranty of
-#  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
-#  General Public License version 2 (GPLv2) for more details.
-#  
-#  You should have received a copy of the GNU General Public License
-#  version 2 (GPLv2) along with this source code.
-#  
-#  
-#  License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
-#  
-#  This software is governed by the Broadcom Open Network Switch APIs license:
-#  https://www.broadcom.com/products/ethernet-connectivity/software/opennsa
-#
 # $Id: Makefile.linux-iproc-3_6,v 1.1 Broadcom SDK $
-# $Copyright: (c) 2007 Broadcom Corp.
-# All Rights Reserved.$
+# $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+# 
+# Permission is granted to use, copy, modify and/or distribute this
+# software under either one of the licenses below.
+# 
+# License Option 1: GPL
+# 
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License, version 2, as
+# published by the Free Software Foundation (the "GPL").
+# 
+# This program is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+# General Public License version 2 (GPLv2) for more details.
+# 
+# You should have received a copy of the GNU General Public License
+# version 2 (GPLv2) along with this source code.
+# 
+# 
+# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
+# 
+# This software is governed by the Broadcom Open Network Switch APIs license:
+# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+# 
 # Makefile for iproc-CMICd
 
 # User must select one platform from below.By default ARM_LINUX is selected. .
diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-iproc-4_4 b/platform/broadcom/saibcm-modules/make/Makefile.linux-iproc-4_4
index bcef1ff69..87e18c1a0 100644
--- a/platform/broadcom/saibcm-modules/make/Makefile.linux-iproc-4_4
+++ b/platform/broadcom/saibcm-modules/make/Makefile.linux-iproc-4_4
@@ -1,32 +1,29 @@
-#
-#  Copyright 2007-2020 Broadcom Inc. All rights reserved.
-#  
-#  Permission is granted to use, copy, modify and/or distribute this
-#  software under either one of the licenses below.
-#  
-#  License Option 1: GPL
-#  
-#  This program is free software; you can redistribute it and/or modify
-#  it under the terms of the GNU General Public License, version 2, as
-#  published by the Free Software Foundation (the "GPL").
-#  
-#  This program is distributed in the hope that it will be useful, but
-#  WITHOUT ANY WARRANTY; without even the implied warranty of
-#  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
-#  General Public License version 2 (GPLv2) for more details.
-#  
-#  You should have received a copy of the GNU General Public License
-#  version 2 (GPLv2) along with this source code.
-#  
-#  
-#  License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
-#  
-#  This software is governed by the Broadcom Open Network Switch APIs license:
-#  https://www.broadcom.com/products/ethernet-connectivity/software/opennsa
-#
 # $Id: Makefile.linux-iproc Exp $
-# $Copyright: (c) 2007 Broadcom Corp.
-# All Rights Reserved.$
+# $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+# 
+# Permission is granted to use, copy, modify and/or distribute this
+# software under either one of the licenses below.
+# 
+# License Option 1: GPL
+# 
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License, version 2, as
+# published by the Free Software Foundation (the "GPL").
+# 
+# This program is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+# General Public License version 2 (GPLv2) for more details.
+# 
+# You should have received a copy of the GNU General Public License
+# version 2 (GPLv2) along with this source code.
+# 
+# 
+# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
+# 
+# This software is governed by the Broadcom Open Network Switch APIs license:
+# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+# 
 # Makefile for iproc-CMICd
 
 # User must select one platform from below.By default ARM_LINUX is selected. .
diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-iproc_64 b/platform/broadcom/saibcm-modules/make/Makefile.linux-iproc_64
index ac7915be9..077d0c803 100644
--- a/platform/broadcom/saibcm-modules/make/Makefile.linux-iproc_64
+++ b/platform/broadcom/saibcm-modules/make/Makefile.linux-iproc_64
@@ -1,32 +1,29 @@
-#
-#  Copyright 2007-2020 Broadcom Inc. All rights reserved.
-#  
-#  Permission is granted to use, copy, modify and/or distribute this
-#  software under either one of the licenses below.
-#  
-#  License Option 1: GPL
-#  
-#  This program is free software; you can redistribute it and/or modify
-#  it under the terms of the GNU General Public License, version 2, as
-#  published by the Free Software Foundation (the "GPL").
-#  
-#  This program is distributed in the hope that it will be useful, but
-#  WITHOUT ANY WARRANTY; without even the implied warranty of
-#  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
-#  General Public License version 2 (GPLv2) for more details.
-#  
-#  You should have received a copy of the GNU General Public License
-#  version 2 (GPLv2) along with this source code.
-#  
-#  
-#  License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
-#  
-#  This software is governed by the Broadcom Open Network Switch APIs license:
-#  https://www.broadcom.com/products/ethernet-connectivity/software/opennsa
-#
 # $Id: Makefile.linux-iproc Exp $
-# $Copyright: (c) 2007 Broadcom Corp.
-# All Rights Reserved.$
+# $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+# 
+# Permission is granted to use, copy, modify and/or distribute this
+# software under either one of the licenses below.
+# 
+# License Option 1: GPL
+# 
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License, version 2, as
+# published by the Free Software Foundation (the "GPL").
+# 
+# This program is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+# General Public License version 2 (GPLv2) for more details.
+# 
+# You should have received a copy of the GNU General Public License
+# version 2 (GPLv2) along with this source code.
+# 
+# 
+# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
+# 
+# This software is governed by the Broadcom Open Network Switch APIs license:
+# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+# 
 # Makefile for iproc-CMICd
 
 # User must select one platform from below.By default ARM_LINUX is selected. .
@@ -34,6 +31,11 @@ ifeq (,$(BUILD_PLATFORM))
 BUILD_PLATFORM=ARM_LINUX
 endif
 
+# Upgrade TCL version from default 8.3 to 8.4
+ifneq ($(ESW_CHIPS)$(LTSW_CHIPS),)
+export TCL840 := 1
+endif
+
 # TOOLCHAIN_BASE_DIR    Toolchain base directory for iPROC-CMICd devices
 # TARGET_ARCHITECTURE   Compiler for target architecture
 # KERNDIR               Kernel directory for iPROC-CMICd devices
@@ -45,8 +47,8 @@ KERN_BASE_DIR ?= $(TOOLCHAIN_BASE_DIR)
 TARGET_ARCHITECTURE ?= aarch64_be-broadcom-linux-uclibc
 KERNDIR ?= $(KERN_BASE_DIR)/kernel/linux
 else
-TOOLCHAIN_BASE_DIR ?= /projects/ntsw-tools/linux/iproc_ldks/XLDK_GCC10/XLDK64
-KERN_BASE_DIR ?= /projects/ntsw-tools/linux/iproc_ldks/xldk61/XLDK64
+TOOLCHAIN_BASE_DIR ?= /projects/ntsw-tools/linux/iproc_ldks/xldk62/XLDK64
+KERN_BASE_DIR ?= /projects/ntsw-tools/linux/iproc_ldks/xldk62/XLDK64
 TARGET_ARCHITECTURE ?= aarch64-broadcom-linux-uclibc
 KERNDIR ?= $(KERN_BASE_DIR)/kernel/linux
 endif
@@ -56,7 +58,8 @@ CROSS_COMPILE:= $(TARGET_ARCHITECTURE)-
 endif
 
 # A72 tools
-TOOLCHAIN_BIN_DIR=$(TOOLCHAIN_BASE_DIR)/buildroot/host/usr/bin
+# JIRA SONIC-69062
+TOOLCHAIN_BIN_DIR ?= $(TOOLCHAIN_BASE_DIR)/buildroot/host/usr/bin
 override PATH:=$(TOOLCHAIN_BASE_DIR)/buildroot/host/usr/$(TARGET_ARCHITECTURE)/bin:$(TOOLCHAIN_BIN_DIR):$(PATH)
 LD_LIBRARY_PATH=$(TOOLCHAIN_BASE_DIR)/buildroot/host/usr/lib
 export TOOLCHAIN_BIN_DIR LD_LIBRARY_PATH
@@ -97,6 +100,10 @@ ifeq "$(shell expr `echo $(CROSS_GCC_VER) | cut -f1 -d.` \== 10)" "1"
 	CFLAGS += -Wno-error=format-overflow
 	CFLAGS += -fcommon
 endif
+ifeq "$(shell expr `echo $(CROSS_GCC_VER) | cut -f1 -d.` \== 12)" "1"
+	CFLAGS += -flarge-source-files
+	CFLAGS += -Wno-error=address
+endif
 
 CFGFLAGS += -D$(ENDIAN) -DIPROC_CMICD
 CFGFLAGS += -DBCM_PLATFORM_STRING=\"IPROC_CMICD\"
diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-kernel b/platform/broadcom/saibcm-modules/make/Makefile.linux-kernel
index 34663445b..39f7e53e3 100644
--- a/platform/broadcom/saibcm-modules/make/Makefile.linux-kernel
+++ b/platform/broadcom/saibcm-modules/make/Makefile.linux-kernel
@@ -1,32 +1,29 @@
-#
-#  Copyright 2007-2020 Broadcom Inc. All rights reserved.
-#  
-#  Permission is granted to use, copy, modify and/or distribute this
-#  software under either one of the licenses below.
-#  
-#  License Option 1: GPL
-#  
-#  This program is free software; you can redistribute it and/or modify
-#  it under the terms of the GNU General Public License, version 2, as
-#  published by the Free Software Foundation (the "GPL").
-#  
-#  This program is distributed in the hope that it will be useful, but
-#  WITHOUT ANY WARRANTY; without even the implied warranty of
-#  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
-#  General Public License version 2 (GPLv2) for more details.
-#  
-#  You should have received a copy of the GNU General Public License
-#  version 2 (GPLv2) along with this source code.
-#  
-#  
-#  License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
-#  
-#  This software is governed by the Broadcom Open Network Switch APIs license:
-#  https://www.broadcom.com/products/ethernet-connectivity/software/opennsa
-#
 # $Id: Makefile.linux-kernel,v 1.27 Broadcom SDK $
-# $Copyright: (c) 2005 Broadcom Corp.
-# All Rights Reserved.$
+# $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+# 
+# Permission is granted to use, copy, modify and/or distribute this
+# software under either one of the licenses below.
+# 
+# License Option 1: GPL
+# 
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License, version 2, as
+# published by the Free Software Foundation (the "GPL").
+# 
+# This program is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+# General Public License version 2 (GPLv2) for more details.
+# 
+# You should have received a copy of the GNU General Public License
+# version 2 (GPLv2) along with this source code.
+# 
+# 
+# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
+# 
+# This software is governed by the Broadcom Open Network Switch APIs license:
+# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+# 
 
 # Configuration Flags
 
diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-kernel-2_6 b/platform/broadcom/saibcm-modules/make/Makefile.linux-kernel-2_6
index c0e8f084e..94f25cf35 100644
--- a/platform/broadcom/saibcm-modules/make/Makefile.linux-kernel-2_6
+++ b/platform/broadcom/saibcm-modules/make/Makefile.linux-kernel-2_6
@@ -1,32 +1,29 @@
-#
-#  Copyright 2007-2020 Broadcom Inc. All rights reserved.
-#  
-#  Permission is granted to use, copy, modify and/or distribute this
-#  software under either one of the licenses below.
-#  
-#  License Option 1: GPL
-#  
-#  This program is free software; you can redistribute it and/or modify
-#  it under the terms of the GNU General Public License, version 2, as
-#  published by the Free Software Foundation (the "GPL").
-#  
-#  This program is distributed in the hope that it will be useful, but
-#  WITHOUT ANY WARRANTY; without even the implied warranty of
-#  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
-#  General Public License version 2 (GPLv2) for more details.
-#  
-#  You should have received a copy of the GNU General Public License
-#  version 2 (GPLv2) along with this source code.
-#  
-#  
-#  License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
-#  
-#  This software is governed by the Broadcom Open Network Switch APIs license:
-#  https://www.broadcom.com/products/ethernet-connectivity/software/opennsa
-#
 # $Id: Makefile.linux-kernel-2_6,v 1.40 Broadcom SDK $
-# $Copyright: (c) 2005 Broadcom Corp.
-# All Rights Reserved.$
+# $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+# 
+# Permission is granted to use, copy, modify and/or distribute this
+# software under either one of the licenses below.
+# 
+# License Option 1: GPL
+# 
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License, version 2, as
+# published by the Free Software Foundation (the "GPL").
+# 
+# This program is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+# General Public License version 2 (GPLv2) for more details.
+# 
+# You should have received a copy of the GNU General Public License
+# version 2 (GPLv2) along with this source code.
+# 
+# 
+# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
+# 
+# This software is governed by the Broadcom Open Network Switch APIs license:
+# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+# 
 
 # Configuration Flags
 
@@ -39,11 +36,11 @@ FEATURE_EXCLUDE_LIST = $(sort $(_FEATURE_EXCLUDE_LIST))
 
 # Conditionally Replaces DEFAULT var
 ifeq ($(origin CC),default)
-CC	= $(LSRUN) $(CROSS_COMPILE)gcc
+CC	= $(strip $(LSRUN) $(CROSS_COMPILE)gcc)
 else
 # If using CLANG then revert the CC to default gcc tool
 ifeq ($(USE_CLANG),1)
-CC	= $(LSRUN) $(CROSS_COMPILE)gcc
+CC	= $(strip $(LSRUN) $(CROSS_COMPILE)gcc)
 endif
 endif
 
@@ -53,6 +50,11 @@ endif
 
 ifeq ($(origin LD),default)
 LD	= $(CROSS_COMPILE)ld
+else
+# If using CLANG then revert the LD to default gcc tool
+ifeq ($(USE_CLANG),1)
+LD	= $(CROSS_COMPILE)ld
+endif
 endif
 
 ifeq ($(origin AR),default)
diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-kernel-3_6 b/platform/broadcom/saibcm-modules/make/Makefile.linux-kernel-3_6
index a454ea16b..028c90744 100644
--- a/platform/broadcom/saibcm-modules/make/Makefile.linux-kernel-3_6
+++ b/platform/broadcom/saibcm-modules/make/Makefile.linux-kernel-3_6
@@ -1,32 +1,29 @@
-#
-#  Copyright 2007-2020 Broadcom Inc. All rights reserved.
-#  
-#  Permission is granted to use, copy, modify and/or distribute this
-#  software under either one of the licenses below.
-#  
-#  License Option 1: GPL
-#  
-#  This program is free software; you can redistribute it and/or modify
-#  it under the terms of the GNU General Public License, version 2, as
-#  published by the Free Software Foundation (the "GPL").
-#  
-#  This program is distributed in the hope that it will be useful, but
-#  WITHOUT ANY WARRANTY; without even the implied warranty of
-#  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
-#  General Public License version 2 (GPLv2) for more details.
-#  
-#  You should have received a copy of the GNU General Public License
-#  version 2 (GPLv2) along with this source code.
-#  
-#  
-#  License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
-#  
-#  This software is governed by the Broadcom Open Network Switch APIs license:
-#  https://www.broadcom.com/products/ethernet-connectivity/software/opennsa
-#
 # $Id: Makefile.linux-kernel-3_6,v 1.2 Broadcom SDK $
-# $Copyright: (c) 2005 Broadcom Corp.
-# All Rights Reserved.$
+# $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+# 
+# Permission is granted to use, copy, modify and/or distribute this
+# software under either one of the licenses below.
+# 
+# License Option 1: GPL
+# 
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License, version 2, as
+# published by the Free Software Foundation (the "GPL").
+# 
+# This program is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+# General Public License version 2 (GPLv2) for more details.
+# 
+# You should have received a copy of the GNU General Public License
+# version 2 (GPLv2) along with this source code.
+# 
+# 
+# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
+# 
+# This software is governed by the Broadcom Open Network Switch APIs license:
+# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+# 
 
 # Configuration Flags
 
diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-kernel-4_4 b/platform/broadcom/saibcm-modules/make/Makefile.linux-kernel-4_4
index 6fcb9a9d1..24c0e2cf4 100644
--- a/platform/broadcom/saibcm-modules/make/Makefile.linux-kernel-4_4
+++ b/platform/broadcom/saibcm-modules/make/Makefile.linux-kernel-4_4
@@ -1,32 +1,29 @@
-#
-#  Copyright 2007-2020 Broadcom Inc. All rights reserved.
-#  
-#  Permission is granted to use, copy, modify and/or distribute this
-#  software under either one of the licenses below.
-#  
-#  License Option 1: GPL
-#  
-#  This program is free software; you can redistribute it and/or modify
-#  it under the terms of the GNU General Public License, version 2, as
-#  published by the Free Software Foundation (the "GPL").
-#  
-#  This program is distributed in the hope that it will be useful, but
-#  WITHOUT ANY WARRANTY; without even the implied warranty of
-#  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
-#  General Public License version 2 (GPLv2) for more details.
-#  
-#  You should have received a copy of the GNU General Public License
-#  version 2 (GPLv2) along with this source code.
-#  
-#  
-#  License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
-#  
-#  This software is governed by the Broadcom Open Network Switch APIs license:
-#  https://www.broadcom.com/products/ethernet-connectivity/software/opennsa
-#
 # $Id: Makefile.linux-kernel-2_6,v 1.40 Broadcom SDK $
-# $Copyright: (c) 2005 Broadcom Corp.
-# All Rights Reserved.$
+# $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+# 
+# Permission is granted to use, copy, modify and/or distribute this
+# software under either one of the licenses below.
+# 
+# License Option 1: GPL
+# 
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License, version 2, as
+# published by the Free Software Foundation (the "GPL").
+# 
+# This program is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+# General Public License version 2 (GPLv2) for more details.
+# 
+# You should have received a copy of the GNU General Public License
+# version 2 (GPLv2) along with this source code.
+# 
+# 
+# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
+# 
+# This software is governed by the Broadcom Open Network Switch APIs license:
+# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+# 
 
 # Configuration Flags
 
diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-kmodule b/platform/broadcom/saibcm-modules/make/Makefile.linux-kmodule
index d3a41f382..394ec9ebb 100644
--- a/platform/broadcom/saibcm-modules/make/Makefile.linux-kmodule
+++ b/platform/broadcom/saibcm-modules/make/Makefile.linux-kmodule
@@ -1,32 +1,29 @@
-#
-#  Copyright 2007-2020 Broadcom Inc. All rights reserved.
-#  
-#  Permission is granted to use, copy, modify and/or distribute this
-#  software under either one of the licenses below.
-#  
-#  License Option 1: GPL
-#  
-#  This program is free software; you can redistribute it and/or modify
-#  it under the terms of the GNU General Public License, version 2, as
-#  published by the Free Software Foundation (the "GPL").
-#  
-#  This program is distributed in the hope that it will be useful, but
-#  WITHOUT ANY WARRANTY; without even the implied warranty of
-#  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
-#  General Public License version 2 (GPLv2) for more details.
-#  
-#  You should have received a copy of the GNU General Public License
-#  version 2 (GPLv2) along with this source code.
-#  
-#  
-#  License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
-#  
-#  This software is governed by the Broadcom Open Network Switch APIs license:
-#  https://www.broadcom.com/products/ethernet-connectivity/software/opennsa
-#
 # $Id: Makefile.linux-kmodule-3_6,v 1.2 Broadcom SDK $
-# $Copyright: (c) 2006 Broadcom Corp.
-# All Rights Reserved.$
+# $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+# 
+# Permission is granted to use, copy, modify and/or distribute this
+# software under either one of the licenses below.
+# 
+# License Option 1: GPL
+# 
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License, version 2, as
+# published by the Free Software Foundation (the "GPL").
+# 
+# This program is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+# General Public License version 2 (GPLv2) for more details.
+# 
+# You should have received a copy of the GNU General Public License
+# version 2 (GPLv2) along with this source code.
+# 
+# 
+# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
+# 
+# This software is governed by the Broadcom Open Network Switch APIs license:
+# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+# 
 
 # Due to the extensive use of driver libraries, the SDK usually builds
 # kernel modules from a precompiled object. To avoid various warnings
@@ -39,6 +36,10 @@
 # module symbol versions. The symbol source file should be passed to
 # this Makefile via the MODULE_SYM variable.
 
+#
+# Do not remove this assignment of LOCALDIR.
+# It is used as an input flag for Make.config
+LOCALDIR = .
 MODULE := $(MOD_NAME).o
 KMODULE := $(MOD_NAME).ko
 obj-m := $(MODULE)
diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-slk b/platform/broadcom/saibcm-modules/make/Makefile.linux-slk
index de6322fce..8b0631669 100644
--- a/platform/broadcom/saibcm-modules/make/Makefile.linux-slk
+++ b/platform/broadcom/saibcm-modules/make/Makefile.linux-slk
@@ -1,32 +1,29 @@
-#
-#  Copyright 2007-2020 Broadcom Inc. All rights reserved.
-#  
-#  Permission is granted to use, copy, modify and/or distribute this
-#  software under either one of the licenses below.
-#  
-#  License Option 1: GPL
-#  
-#  This program is free software; you can redistribute it and/or modify
-#  it under the terms of the GNU General Public License, version 2, as
-#  published by the Free Software Foundation (the "GPL").
-#  
-#  This program is distributed in the hope that it will be useful, but
-#  WITHOUT ANY WARRANTY; without even the implied warranty of
-#  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
-#  General Public License version 2 (GPLv2) for more details.
-#  
-#  You should have received a copy of the GNU General Public License
-#  version 2 (GPLv2) along with this source code.
-#  
-#  
-#  License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
-#  
-#  This software is governed by the Broadcom Open Network Switch APIs license:
-#  https://www.broadcom.com/products/ethernet-connectivity/software/opennsa
-#
 # $Id: Makefile.linux-slk-3_14,v 1.2 Broadcom SDK $
-# $Copyright: (c) 2013 Broadcom Corp.
-# All Rights Reserved.$
+# $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+# 
+# Permission is granted to use, copy, modify and/or distribute this
+# software under either one of the licenses below.
+# 
+# License Option 1: GPL
+# 
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License, version 2, as
+# published by the Free Software Foundation (the "GPL").
+# 
+# This program is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+# General Public License version 2 (GPLv2) for more details.
+# 
+# You should have received a copy of the GNU General Public License
+# version 2 (GPLv2) along with this source code.
+# 
+# 
+# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
+# 
+# This software is governed by the Broadcom Open Network Switch APIs license:
+# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+# 
 # Makefile for SLK(BCM957812)
 
 # User must select one platform from below.By default ARM_LINUX is selected. .
@@ -34,6 +31,11 @@ ifeq (,$(BUILD_PLATFORM))
 BUILD_PLATFORM=ARM_LINUX
 endif
 
+# Upgrade TCL version from default 8.3 to 8.4
+ifneq ($(ESW_CHIPS)$(LTSW_CHIPS),)
+export TCL840 := 1
+endif
+
 # Toolchain base directory for NS2 XMC card
 ifeq (BE,$(ENDIAN_MODE))
 TOOLCHAIN_BASE_DIR ?= /projects/ntsw-tools/toolchains/slk/linaro-be
diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-common-2_6 b/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-common-2_6
index dbd51ee1f..bffc82341 100644
--- a/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-common-2_6
+++ b/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-common-2_6
@@ -1,32 +1,29 @@
-#
-#  Copyright 2007-2020 Broadcom Inc. All rights reserved.
-#  
-#  Permission is granted to use, copy, modify and/or distribute this
-#  software under either one of the licenses below.
-#  
-#  License Option 1: GPL
-#  
-#  This program is free software; you can redistribute it and/or modify
-#  it under the terms of the GNU General Public License, version 2, as
-#  published by the Free Software Foundation (the "GPL").
-#  
-#  This program is distributed in the hope that it will be useful, but
-#  WITHOUT ANY WARRANTY; without even the implied warranty of
-#  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
-#  General Public License version 2 (GPLv2) for more details.
-#  
-#  You should have received a copy of the GNU General Public License
-#  version 2 (GPLv2) along with this source code.
-#  
-#  
-#  License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
-#  
-#  This software is governed by the Broadcom Open Network Switch APIs license:
-#  https://www.broadcom.com/products/ethernet-connectivity/software/opennsa
-#
 # $Id: Makefile.linux-x86-common-2_6,v 1.13 Broadcom SDK $
-# $Copyright: (c) 2005 Broadcom Corp.
-# All Rights Reserved.$
+# $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+# 
+# Permission is granted to use, copy, modify and/or distribute this
+# software under either one of the licenses below.
+# 
+# License Option 1: GPL
+# 
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License, version 2, as
+# published by the Free Software Foundation (the "GPL").
+# 
+# This program is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+# General Public License version 2 (GPLv2) for more details.
+# 
+# You should have received a copy of the GNU General Public License
+# version 2 (GPLv2) along with this source code.
+# 
+# 
+# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
+# 
+# This software is governed by the Broadcom Open Network Switch APIs license:
+# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+# 
 
 CFGFLAGS += -DSYS_BE_PIO=0 -DSYS_BE_PACKET=0 -DSYS_BE_OTHER=0
 ENDIAN = LE_HOST=1
diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-generic-common-2_6 b/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-generic-common-2_6
index 4b02aa53c..baa5253d5 100644
--- a/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-generic-common-2_6
+++ b/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-generic-common-2_6
@@ -1,32 +1,29 @@
-#
-#  Copyright 2007-2020 Broadcom Inc. All rights reserved.
-#  
-#  Permission is granted to use, copy, modify and/or distribute this
-#  software under either one of the licenses below.
-#  
-#  License Option 1: GPL
-#  
-#  This program is free software; you can redistribute it and/or modify
-#  it under the terms of the GNU General Public License, version 2, as
-#  published by the Free Software Foundation (the "GPL").
-#  
-#  This program is distributed in the hope that it will be useful, but
-#  WITHOUT ANY WARRANTY; without even the implied warranty of
-#  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
-#  General Public License version 2 (GPLv2) for more details.
-#  
-#  You should have received a copy of the GNU General Public License
-#  version 2 (GPLv2) along with this source code.
-#  
-#  
-#  License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
-#  
-#  This software is governed by the Broadcom Open Network Switch APIs license:
-#  https://www.broadcom.com/products/ethernet-connectivity/software/opennsa
-#
 # $Id: Makefile.linux-x86-generic-common-2_6,v 1.2 Broadcom SDK $
-# $Copyright: (c) 2008 Broadcom Corp.
-# All Rights Reserved.$
+# $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+# 
+# Permission is granted to use, copy, modify and/or distribute this
+# software under either one of the licenses below.
+# 
+# License Option 1: GPL
+# 
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License, version 2, as
+# published by the Free Software Foundation (the "GPL").
+# 
+# This program is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+# General Public License version 2 (GPLv2) for more details.
+# 
+# You should have received a copy of the GNU General Public License
+# version 2 (GPLv2) along with this source code.
+# 
+# 
+# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
+# 
+# This software is governed by the Broadcom Open Network Switch APIs license:
+# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+# 
 
 # Default kernel source directory
 ifeq (,$(KERNDIR))
diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-smp_generic_64-2_6 b/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-smp_generic_64-2_6
index 2f6b54f1b..636b9b90a 100644
--- a/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-smp_generic_64-2_6
+++ b/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-smp_generic_64-2_6
@@ -1,32 +1,29 @@
-#
-#  Copyright 2007-2020 Broadcom Inc. All rights reserved.
-#  
-#  Permission is granted to use, copy, modify and/or distribute this
-#  software under either one of the licenses below.
-#  
-#  License Option 1: GPL
-#  
-#  This program is free software; you can redistribute it and/or modify
-#  it under the terms of the GNU General Public License, version 2, as
-#  published by the Free Software Foundation (the "GPL").
-#  
-#  This program is distributed in the hope that it will be useful, but
-#  WITHOUT ANY WARRANTY; without even the implied warranty of
-#  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
-#  General Public License version 2 (GPLv2) for more details.
-#  
-#  You should have received a copy of the GNU General Public License
-#  version 2 (GPLv2) along with this source code.
-#  
-#  
-#  License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
-#  
-#  This software is governed by the Broadcom Open Network Switch APIs license:
-#  https://www.broadcom.com/products/ethernet-connectivity/software/opennsa
-#
 # $Id: Makefile.linux-x86-smp_generic_64-2_6,v 1.5 Broadcom SDK $
-# $Copyright: (c) 2008 Broadcom Corp.
-# All Rights Reserved.$
+# $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+# 
+# Permission is granted to use, copy, modify and/or distribute this
+# software under either one of the licenses below.
+# 
+# License Option 1: GPL
+# 
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License, version 2, as
+# published by the Free Software Foundation (the "GPL").
+# 
+# This program is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+# General Public License version 2 (GPLv2) for more details.
+# 
+# You should have received a copy of the GNU General Public License
+# version 2 (GPLv2) along with this source code.
+# 
+# 
+# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
+# 
+# This software is governed by the Broadcom Open Network Switch APIs license:
+# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+# 
 
 CFGFLAGS += -DLONGS_ARE_64BITS
 CFGFLAGS += -DPTRS_ARE_64BITS
@@ -36,9 +33,11 @@ CFGFLAGS += -DSAL_SPL_LOCK_ON_IRQ
 include ${SDK}/make/Makefile.linux-x86-generic-common-2_6
 
 ifeq (,$(KFLAGS))
-KFLAGS := -nostdinc -isystem $(SYSINC) -I$(KERNDIR)/include -I$(KERNDIR)/arch/x86/include -include $(AUTOCONF) -D__KERNEL__ -Wall -Wundef -Wstrict-prototypes -Wno-trigraphs -fno-strict-aliasing -fno-common -Werror-implicit-function-declaration -Wno-format-security -fno-delete-null-pointer-checks -Os -m64 -mtune=generic -mno-red-zone -fno-pie -mcmodel=kernel -funit-at-a-time -maccumulate-outgoing-args -DCONFIG_AS_CFI=1 -DCONFIG_AS_CFI_SIGNAL_FRAME=1 -pipe -Wno-sign-compare -fno-asynchronous-unwind-tables -mno-sse -mno-mmx -mno-sse2 -mno-3dnow -fno-stack-protector -fomit-frame-pointer -g -Wdeclaration-after-statement -Wno-pointer-sign
+KFLAGS := -nostdinc -isystem $(SYSINC) -I$(KERNDIR)/include -I$(KERNDIR)/arch/x86/include -include $(AUTOCONF) -D__KERNEL__ -Wall -Wundef -Wstrict-prototypes -Wno-trigraphs -fno-strict-aliasing -fno-common -Werror-implicit-function-declaration -Wno-format-security -fno-delete-null-pointer-checks -Os -m64 -mtune=generic -mno-red-zone -fno-pie -mcmodel=kernel -DCONFIG_AS_CFI=1 -DCONFIG_AS_CFI_SIGNAL_FRAME=1 -pipe -Wno-sign-compare -fno-asynchronous-unwind-tables -mno-sse -mno-mmx -mno-sse2 -mno-3dnow -fno-stack-protector -fomit-frame-pointer -g -Wdeclaration-after-statement -Wno-pointer-sign
+ifneq (1,$(USE_CLANG))
+KFLAGS += -funit-at-a-time -maccumulate-outgoing-args
+endif
 endif
-
 
 LINUX_UAPI = $(LINUX_INCLUDE)/uapi
 ifneq (,$(shell ls $(LINUX_UAPI) 2>/dev/null))
@@ -58,8 +57,10 @@ SYSTEM_INTERFACE ?= ngbde
 
 # Turn on direct register access if running on real hardware.
 ifeq (ngbde,$(SYSTEM_INTERFACE))
+ifeq (,$(EXTRA_SYSTEM_INTERFACES))
 LTSW_ADD_CPPFLAGS += -DBCMDRD_CONFIG_MEMMAP_DIRECT=1
 endif
+endif
 
 export SYSTEM_INTERFACE
 endif
diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-xlr b/platform/broadcom/saibcm-modules/make/Makefile.linux-xlr
index 293feaf97..f206b4d9a 100644
--- a/platform/broadcom/saibcm-modules/make/Makefile.linux-xlr
+++ b/platform/broadcom/saibcm-modules/make/Makefile.linux-xlr
@@ -1,32 +1,29 @@
-#
-#  Copyright 2007-2020 Broadcom Inc. All rights reserved.
-#  
-#  Permission is granted to use, copy, modify and/or distribute this
-#  software under either one of the licenses below.
-#  
-#  License Option 1: GPL
-#  
-#  This program is free software; you can redistribute it and/or modify
-#  it under the terms of the GNU General Public License, version 2, as
-#  published by the Free Software Foundation (the "GPL").
-#  
-#  This program is distributed in the hope that it will be useful, but
-#  WITHOUT ANY WARRANTY; without even the implied warranty of
-#  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
-#  General Public License version 2 (GPLv2) for more details.
-#  
-#  You should have received a copy of the GNU General Public License
-#  version 2 (GPLv2) along with this source code.
-#  
-#  
-#  License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
-#  
-#  This software is governed by the Broadcom Open Network Switch APIs license:
-#  https://www.broadcom.com/products/ethernet-connectivity/software/opennsa
-#
 # $Id: Makefile.linux-xlr-4_19,v 0.1 Broadcom SDK $
-# $Copyright: (c) 2015 Broadcom Corp.
-# All Rights Reserved.$
+# $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+# 
+# Permission is granted to use, copy, modify and/or distribute this
+# software under either one of the licenses below.
+# 
+# License Option 1: GPL
+# 
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License, version 2, as
+# published by the Free Software Foundation (the "GPL").
+# 
+# This program is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+# General Public License version 2 (GPLv2) for more details.
+# 
+# You should have received a copy of the GNU General Public License
+# version 2 (GPLv2) along with this source code.
+# 
+# 
+# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
+# 
+# This software is governed by the Broadcom Open Network Switch APIs license:
+# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+# 
 
 #
 # XLR system make file.
@@ -45,9 +42,9 @@
 #endif
 
 # some basic path variables for tools and kernel source, etc #
-XLR_TOOLS_BASE ?= /projects/ntsw-tools/linux/xlr-510
+XLR_TOOLS_BASE ?= /projects/ntsw-tools/linux/gcc12.2
 TOOLCHAIN_DIR = $(XLR_TOOLS_BASE)/buildroot/host/usr
-KERNDIR       = $(XLR_TOOLS_BASE)/kernel/linux
+KERNDIR       ?= /projects/ntsw-tools/linux/xlr-510/kernel/linux
 # Target machine for EDK-Host defconfig
 TARGET_MACHINE ?= x86_64
 
@@ -72,7 +69,7 @@ export PATH         := $(TOOLCHAIN_DIR)/bin:$(KERNDIR):$(PATH)
 CROSS_GCC_VER ?= $(shell $(TOOLCHAIN_DIR)/bin/$(CROSS_COMPILE)gcc -dumpversion)
 export SYSINC := $(TOOLCHAIN_DIR)/lib/gcc/$(TARGET_ARCHITECTURE)/$(CROSS_GCC_VER)/include
 
-# Glibc 2.27 or later version doesn't support SVID libm error handling. 
+# Glibc 2.27 or later version doesn't support SVID libm error handling.
 # Building tcl 8.3.3 with the new toolchain will occur errors.
 export TCL840  := 1
 
@@ -93,6 +90,10 @@ CFLAGS += -L$(TOOLCHAIN_DIR)/lib64
 ifeq (1,$(USE_CLANG)) # CLANG-specific CFLAGS
 CFLAGS += -Wno-strlcpy-strlcat-size
 CFLAGS += -Wno-strncat-size
+ifeq "$(shell expr `echo $(CROSS_GCC_VER) | cut -f1 -d.` \>= 12)" "1"
+export LIBNSL_DEPRECATED := 1
+endif
+
 else # GCC-specific CFLAGS
 CFLAGS += -Wno-error=unused-but-set-variable
 CFLAGS += -Wno-error=maybe-uninitialized
@@ -116,6 +117,11 @@ ifeq "$(shell expr `echo $(CROSS_GCC_VER) | cut -f2 -d.` \== 2)" "1"
 	CFLAGS += -Wno-zero-length-bounds
 endif
 endif
+ifeq "$(shell expr `echo $(CROSS_GCC_VER) | cut -f1 -d.` \== 12)" "1"
+	CFGFLAGS += -flarge-source-files
+	CFGFLAGS += -Wno-error=address
+	export LIBNSL_DEPRECATED := 1
+endif
 endif # Compiler-specific CFLAGS
 
 #XLDK-568 fix inline references
@@ -131,7 +137,12 @@ CFLAGS += -Wno-deprecated-declarations #SDK-233174
 
 # set up KFLAGS appropriately. #
 ifeq (,$(KFLAGS))
-KFLAGS := -L$(TOOLCHAIN_DIR)/lib -L$(TOOLCHAIN_DIR)/lib64 -I$(KERNDIR) -lc -nostdinc -isystem $(SYSINC) -Iinclude -I$(KERNDIR)/arch/x86/include -I$(KERNDIR)/arch/x86/include/generated -I$(KERNDIR)/arch/x86/include/generated/uapi -I$(KERNDIR)/arch/x86/include/uapi -I$(KERNDIR)/include -I$(KERNDIR)/include/generated -I$(KERNDIR)/include/generated/uapi -I$(KERNDIR)/include/uapi -include $(KERNDIR)/include/generated/autoconf.h -D__KERNEL__ -DNDEBUG -Wundef -Wstrict-prototypes -Wno-trigraphs -fno-strict-aliasing -fno-common -Wno-format-security -fno-delete-null-pointer-checks -Os -mno-sse -m64 -mtune=generic -mno-red-zone -mcmodel=kernel -funit-at-a-time -maccumulate-outgoing-args -fstack-protector -DCONFIG_AS_CFI=1 -DCONFIG_AS_CFI_SIGNAL_FRAME=1 -pipe -Wno-sign-compare -fno-asynchronous-unwind-tables -fno-omit-frame-pointer -Wdeclaration-after-statement -Wno-pointer-sign -fno-dwarf2-cfi-asm -fconserve-stack
+KFLAGS := -L$(TOOLCHAIN_DIR)/lib -L$(TOOLCHAIN_DIR)/lib64 -I$(KERNDIR) -lc -nostdinc -isystem $(SYSINC) -Iinclude -I$(KERNDIR)/arch/x86/include -I$(KERNDIR)/arch/x86/include/generated -I$(KERNDIR)/arch/x86/include/generated/uapi -I$(KERNDIR)/arch/x86/include/uapi -I$(KERNDIR)/include -I$(KERNDIR)/include/generated -I$(KERNDIR)/include/generated/uapi -I$(KERNDIR)/include/uapi -include $(KERNDIR)/include/generated/autoconf.h -D__KERNEL__ -DNDEBUG -Wundef -Wstrict-prototypes -Wno-trigraphs -fno-strict-aliasing -fno-common -Wno-format-security -fno-delete-null-pointer-checks -Os -mno-sse -m64 -mtune=generic -mno-red-zone -mcmodel=kernel -fstack-protector -DCONFIG_AS_CFI=1 -DCONFIG_AS_CFI_SIGNAL_FRAME=1 -pipe -Wno-sign-compare -fno-asynchronous-unwind-tables -fno-omit-frame-pointer -Wdeclaration-after-statement -Wno-pointer-sign -fno-dwarf2-cfi-asm
+ifneq (1,$(USE_CLANG))
+KFLAGS += -funit-at-a-time -maccumulate-outgoing-args -fconserve-stack
+else
+KFLAGS += -fno-pie
+endif
 endif
 
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/Makefile b/platform/broadcom/saibcm-modules/sdklt/Makefile
index e0084d260..5b25a349b 100644
--- a/platform/broadcom/saibcm-modules/sdklt/Makefile
+++ b/platform/broadcom/saibcm-modules/sdklt/Makefile
@@ -1,5 +1,5 @@
 #
-# $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+# $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
 # The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
 # 
 # This program is free software; you can redistribute it and/or
@@ -54,11 +54,13 @@ endif
 BDE_BLDDIR := $(OUTPUT_DIR)/bde
 KNET_BLDDIR := $(OUTPUT_DIR)/knet
 KNETCB_BLDDIR := $(OUTPUT_DIR)/knetcb
+BCMGENL_BLDDIR := $(OUTPUT_DIR)/bcmgenl
+GENL_PACKET_BLDDIR := $(OUTPUT_DIR)/genl-packet
 
 LKM_CFLAGS += -UNGKNET_NETIF_MAX -DNGKNET_NETIF_MAX=1056 -UNGKNET_FILTER_MAX -DNGKNET_FILTER_MAX=1025
 export LKM_CFLAGS
 
-kmod: bde knet knetcb
+kmod: bde knet knetcb genl-packet bcmgenl 
 
 bde:
 	$(MAKE) -C $(SDK)/linux/bde SDK=$(SDK) \
@@ -74,15 +76,27 @@ knet: bde
 knetcb: knet
 	$(MAKE) -C $(SDK)/linux/knetcb SDK=$(SDK) \
 		KBUILD_EXTRA_SYMBOLS=$(KNET_BLDDIR)/Module.symvers \
-		KBUILD_EXTRA_SYMBOLS+=$(PSAMPLE_SYMVERS)  \
 		LKM_BLDDIR=$(KNETCB_BLDDIR) $(TARGET)
 	ln -sf $(KNETCB_BLDDIR)/*.ko $(OUTPUT_DIR)
 
+bcmgenl: knet genl-packet
+	$(MAKE) -C $(SDK)/linux/bcmgenl SDK=$(SDK) \
+		KBUILD_EXTRA_SYMBOLS=$(KNET_BLDDIR)/Module.symvers \
+		KBUILD_EXTRA_SYMBOLS+=$(GENL_PACKET_BLDDIR)/Module.symvers \
+		LKM_BLDDIR=$(BCMGENL_BLDDIR) $(TARGET)
+	ln -sf $(BCMGENL_BLDDIR)/*.ko $(OUTPUT_DIR)
+
+genl-packet:
+	$(MAKE) -C $(SDK)/linux/genl-packet SDK=$(SDK) \
+		LKM_BLDDIR=$(GENL_PACKET_BLDDIR) $(TARGET)
+	ln -sf $(GENL_PACKET_BLDDIR)/*.ko $(OUTPUT_DIR)
+
 clean:
-	$(MAKE) kmod TARGET=clean
+	$(MAKE) kmod TARGET=$@
 	rm -f $(OUTPUT_DIR)/*.ko
 
 distclean:
+	$(MAKE) kmod TARGET=$@
 	rm -rf $(OUTPUT_DIR)
 
-.PHONY: help kmod bde knet knetcb clean distclean
+.PHONY: help kmod bde knet knetcb genl-packet bcmgenl clean distclean
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56080_a0/bcm56080_a0_pdma_attach.c b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56080_a0/bcm56080_a0_pdma_attach.c
index 7b71dd745..4f40652ae 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56080_a0/bcm56080_a0_pdma_attach.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56080_a0/bcm56080_a0_pdma_attach.c
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56690_a0/bcm56690_a0_pdma_attach.c b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56690_a0/bcm56690_a0_pdma_attach.c
new file mode 100644
index 000000000..d5d701302
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56690_a0/bcm56690_a0_pdma_attach.c
@@ -0,0 +1,38 @@
+/*! \file bcm56690_a0_pdma_attach.c
+ *
+ * Initialize PDMA driver resources.
+ *
+ */
+/*
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ */
+
+#include <bcmcnet/bcmcnet_core.h>
+#include <bcmcnet/bcmcnet_dev.h>
+#include <bcmcnet/bcmcnet_cmicx.h>
+
+int
+bcm56690_a0_cnet_pdma_attach(struct pdma_dev *dev)
+{
+    return bcmcnet_cmicx_pdma_driver_attach(dev);
+}
+
+int
+bcm56690_a0_cnet_pdma_detach(struct pdma_dev *dev)
+{
+    return bcmcnet_cmicx_pdma_driver_detach(dev);
+}
+
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56780_a0/bcm56780_a0_pdma_attach.c b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56780_a0/bcm56780_a0_pdma_attach.c
index 4edd614c2..dffcfd1e4 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56780_a0/bcm56780_a0_pdma_attach.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56780_a0/bcm56780_a0_pdma_attach.c
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56880_a0/bcm56880_a0_pdma_attach.c b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56880_a0/bcm56880_a0_pdma_attach.c
index d803f2782..acfb129b1 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56880_a0/bcm56880_a0_pdma_attach.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56880_a0/bcm56880_a0_pdma_attach.c
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56890_a0/bcm56890_a0_pdma_attach.c b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56890_a0/bcm56890_a0_pdma_attach.c
index f5297b1bc..1cb85aba6 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56890_a0/bcm56890_a0_pdma_attach.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56890_a0/bcm56890_a0_pdma_attach.c
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56990_a0/bcm56990_a0_pdma_attach.c b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56990_a0/bcm56990_a0_pdma_attach.c
index 4e7626a2b..0910602e8 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56990_a0/bcm56990_a0_pdma_attach.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56990_a0/bcm56990_a0_pdma_attach.c
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56990_b0/bcm56990_b0_pdma_attach.c b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56990_b0/bcm56990_b0_pdma_attach.c
index 95b1b3adb..257ccb91f 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56990_b0/bcm56990_b0_pdma_attach.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56990_b0/bcm56990_b0_pdma_attach.c
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56996_a0/bcm56996_a0_pdma_attach.c b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56996_a0/bcm56996_a0_pdma_attach.c
index 1ec4e3a9f..710068c7a 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56996_a0/bcm56996_a0_pdma_attach.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56996_a0/bcm56996_a0_pdma_attach.c
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56996_b0/bcm56996_b0_pdma_attach.c b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56996_b0/bcm56996_b0_pdma_attach.c
index c881a7a37..2edfc9cb4 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56996_b0/bcm56996_b0_pdma_attach.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56996_b0/bcm56996_b0_pdma_attach.c
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56998_a0/bcm56998_a0_pdma_attach.c b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56998_a0/bcm56998_a0_pdma_attach.c
index 47b83a495..048dc4390 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56998_a0/bcm56998_a0_pdma_attach.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56998_a0/bcm56998_a0_pdma_attach.c
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56999_a0/bcm56999_a0_pdma_attach.c b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56999_a0/bcm56999_a0_pdma_attach.c
index 2aee04256..1d2a9f1b3 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56999_a0/bcm56999_a0_pdma_attach.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56999_a0/bcm56999_a0_pdma_attach.c
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm78900_b0/bcm78900_b0_pdma_attach.c b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm78900_b0/bcm78900_b0_pdma_attach.c
index e09f04d9b..19ebd22a7 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm78900_b0/bcm78900_b0_pdma_attach.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm78900_b0/bcm78900_b0_pdma_attach.c
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm78905_a0/bcm78905_a0_pdma_attach.c b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm78905_a0/bcm78905_a0_pdma_attach.c
new file mode 100644
index 000000000..9d7712f46
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm78905_a0/bcm78905_a0_pdma_attach.c
@@ -0,0 +1,38 @@
+/*! \file bcm78905_a0_pdma_attach.c
+ *
+ * Initialize PDMA driver resources.
+ *
+ */
+/*
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ */
+
+#include <bcmcnet/bcmcnet_core.h>
+#include <bcmcnet/bcmcnet_dev.h>
+#include <bcmcnet/bcmcnet_cmicr.h>
+
+int
+bcm78905_a0_cnet_pdma_attach(struct pdma_dev *dev)
+{
+    return bcmcnet_cmicr_pdma_driver_attach(dev);
+}
+
+int
+bcm78905_a0_cnet_pdma_detach(struct pdma_dev *dev)
+{
+    return bcmcnet_cmicr_pdma_driver_detach(dev);
+}
+
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicd/bcmcnet_cmicd_pdma_hw.c b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicd/bcmcnet_cmicd_pdma_hw.c
index b887a2b82..647958383 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicd/bcmcnet_cmicd_pdma_hw.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicd/bcmcnet_cmicd_pdma_hw.c
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -100,16 +100,7 @@ cmicd_pdma_hw_init(struct pdma_hw *hw)
         hw->dev->mode = DEV_MODE_UNET;
     }
 
-    /*
-     * FIXME: SDKLT-27954 SDKLT-27956
-     *
-     * credit release is invoked by cmic_edb_credit_refresh() in
-     * bcmtm_internal_port_up().
-     *
-     * But, bcmtm_internal_port_up() is missed in bcm56960_a0.
-     *
-     * Need to remove credit release once all CMICd chipsets are fixed.
-     */
+    
 
     /* Release credits to EP. Only do this once when HW is initialized. */
     hw->hdls.reg_rd32(hw, CMICD_EPINTF_RELEASE_CREDITS, &val);
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicd/bcmcnet_cmicd_pdma_rxtx.c b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicd/bcmcnet_cmicd_pdma_rxtx.c
index e78e3ae26..099dbbbbd 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicd/bcmcnet_cmicd_pdma_rxtx.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicd/bcmcnet_cmicd_pdma_rxtx.c
@@ -38,7 +38,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicr/bcmcnet_cmicr2_pdma_rxtx.c b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicr/bcmcnet_cmicr2_pdma_rxtx.c
new file mode 100644
index 000000000..3c58900dd
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicr/bcmcnet_cmicr2_pdma_rxtx.c
@@ -0,0 +1,369 @@
+/*! \file bcmcnet_cmicr2_pdma_rxtx.c
+ *
+ * Utility routines for BCMCNET hardware (CMICr2) specific Tx.
+ * All others leverage CMICr stuffs.
+ *
+ */
+/*
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ */
+
+#include <bcmcnet/bcmcnet_core.h>
+#include <bcmcnet/bcmcnet_dev.h>
+#include <bcmcnet/bcmcnet_rxtx.h>
+#include <bcmcnet/bcmcnet_buff.h>
+#include <bcmcnet/bcmcnet_cmicr2.h>
+
+#define TX_DCB_STAT_SET(r, f)           TX_DCB_SET(r, 3, f)
+#define TX_DCB_CTRL_HGf_SET(r)          TX_DCB_HGf_SET(r, 1)
+#define TX_DCB_CTRL_HGf_CLR(r)          TX_DCB_HGf_SET(r, 0)
+#define TX_DCB_CTRL_PURGEf_SET(r)       (r).tx_dcb[2] |= 1 << 23
+#define TX_DCB_CTRL_PURGEf_CLR(r)       (r).tx_dcb[2] &= ~(1 << 23)
+#define TX_DCB_CTRL_PROFf_SET(r, f)     (r).tx_dcb[2] = ((r).tx_dcb[2] & ~(0x7 << 20)) | (((f) & 0x7) << 20)
+
+/*!
+ * Configure Tx descriptor
+ */
+static inline void
+cmicr2_tx_desc_config(volatile TX_DCB_t *td, uint64_t addr, uint32_t len,
+                      uint32_t prof, uint16_t flags)
+{
+    TX_DCB_ADDR_LOf_SET(*td, addr);
+    TX_DCB_ADDR_HIf_SET(*td, DMA_TO_BUS_HI(addr >> 32));
+    TX_DCB_STAT_SET(*td, 0);
+
+    if (flags & PDMA_TX_HIGIG_PKT) {
+        TX_DCB_CTRL_HGf_SET(*td);
+    } else {
+        TX_DCB_CTRL_HGf_CLR(*td);
+    }
+    if (flags & PDMA_TX_PURGE_PKT) {
+        TX_DCB_CTRL_PURGEf_SET(*td);
+    } else {
+        TX_DCB_CTRL_PURGEf_CLR(*td);
+    }
+    TX_DCB_CTRL_PROFf_SET(*td, prof);
+    TX_DCB_BYTE_COUNTf_SET(*td, len);
+
+    MEMORY_BARRIER;
+}
+
+/*!
+ * Chain Tx descriptor
+ */
+static inline void
+cmicr2_tx_desc_chain(volatile TX_DCB_t *td, int chain)
+{
+    if (chain) {
+        TX_DCB_CHAINf_SET(*td, 1);
+    } else {
+        TX_DCB_CHAINf_SET(*td, 0);
+    }
+
+    MEMORY_BARRIER;
+}
+
+/*!
+ * Get unused descriptors in a Tx ring
+ */
+static inline int
+cmicr2_pdma_tx_ring_unused(struct pdma_tx_queue *txq)
+{
+    /* Leave one descriptor unused so as not to halt */
+    return (txq->nb_desc + txq->dirt - txq->curr - 1) % txq->nb_desc;
+}
+
+/*!
+ * Fetch Tx vring
+ */
+static int
+cmicr2_pdma_tx_vring_fetch(struct pdma_hw *hw, struct pdma_tx_queue *txq,
+                           struct pdma_tx_buf *pbuf)
+{
+    struct pdma_dev *dev = hw->dev;
+    volatile TX_DCB_t *ring = (volatile TX_DCB_t *)txq->ring;
+    struct pdma_tx_queue *vtxq = NULL;
+    volatile TX_DCB_t *vring = NULL;
+    uint32_t rm;
+
+    vtxq = (struct pdma_tx_queue *)dev->ctrl.vnet_txq[txq->queue_id];
+    vring = (volatile TX_DCB_t *)vtxq->ring;
+    if (!vring || !TX_DCB_BYTE_COUNTf_GET(vring[vtxq->curr])) {
+        return SHR_E_UNAVAIL;
+    }
+
+    /* Fetch vring descriptor */
+    rm = TX_DCB_DESC_REMAINf_GET(ring[txq->curr]);
+    TX_DCB_SET(ring[txq->curr], 0, TX_DCB_GET(vring[vtxq->curr], 0));
+    TX_DCB_SET(ring[txq->curr], 1, TX_DCB_GET(vring[vtxq->curr], 1));
+    TX_DCB_SET(ring[txq->curr], 2, TX_DCB_GET(vring[vtxq->curr], 2));
+    TX_DCB_SET(ring[txq->curr], 3, TX_DCB_GET(vring[vtxq->curr], 3));
+    TX_DCB_DESC_REMAINf_SET(ring[txq->curr], rm);
+    TX_DCB_BYTE_COUNTf_SET(vring[vtxq->curr], 0);
+
+    MEMORY_BARRIER;
+
+    pbuf->dma = TX_DCB_ADDR_LOf_GET(vring[vtxq->curr]);
+    pbuf->len = TX_DCB_BYTE_COUNTf_GET(ring[txq->curr]);
+    vtxq->curr = (vtxq->curr + 1) % vtxq->nb_desc;
+
+    return SHR_E_NONE;
+}
+
+/*!
+ * Check Tx ring
+ */
+static inline int
+cmicr2_pdma_tx_ring_check(struct pdma_hw *hw, struct pdma_tx_queue *txq)
+{
+    struct pdma_dev *dev = hw->dev;
+
+    if (dev->suspended) {
+        txq->stats.xoffs++;
+        if (dev->tx_suspend) {
+            dev->tx_suspend(dev, txq->queue_id);
+            return SHR_E_BUSY;
+        }
+        if (!(txq->state & PDMA_TX_QUEUE_POLL)) {
+            return SHR_E_BUSY;
+        }
+    }
+
+    if (cmicr2_pdma_tx_ring_unused(txq)) {
+        return SHR_E_NONE;
+    }
+
+    sal_spinlock_lock(txq->lock);
+    if (!cmicr2_pdma_tx_ring_unused(txq)) {
+        txq->status |= PDMA_TX_QUEUE_XOFF;
+        txq->stats.xoffs++;
+        if (dev->tx_suspend) {
+            dev->tx_suspend(dev, txq->queue_id);
+        }
+        sal_spinlock_unlock(txq->lock);
+        return SHR_E_BUSY;
+    }
+    sal_spinlock_unlock(txq->lock);
+
+    return SHR_E_NONE;
+}
+
+/*!
+ * \brief Start packet transmission
+ *
+ * \param [in] hw HW structure point.
+ * \param [in] txq Tx queue structure point.
+ * \param [in] buf Tx packet buffer.
+ *
+ * \retval SHR_E_NONE No errors.
+ * \retval SHR_E_XXXX Operation failed.
+ */
+static int
+cmicr2_pdma_pkt_xmit(struct pdma_hw *hw, struct pdma_tx_queue *txq, void *buf)
+{
+    struct pdma_dev *dev = hw->dev;
+    struct pdma_buf_mngr *bm = (struct pdma_buf_mngr *)dev->ctrl.buf_mngr;
+    volatile TX_DCB_t *ring = (volatile TX_DCB_t *)txq->ring;
+    struct pdma_tx_buf *pbuf = NULL;
+    struct pkt_hdr *pkh = NULL;
+    dma_addr_t addr;
+    uint32_t curr;
+    int retry = 5000000;
+    int rv;
+
+    if (dev->tx_suspend) {
+        sal_spinlock_lock(txq->mutex);
+    } else {
+        rv = sal_sem_take(txq->sem, BCMCNET_TX_RSRC_WAIT_USEC);
+        if (rv == -1) {
+            CNET_ERROR(hw->unit, "Timeout waiting for Tx resources\n");
+            return SHR_E_TIMEOUT;
+        }
+    }
+
+    /* Check Tx resource */
+    if (dev->tx_suspend) {
+        /* Suspend Tx if no resource */
+        rv = cmicr2_pdma_tx_ring_check(hw, txq);
+        if (SHR_FAILURE(rv)) {
+            sal_spinlock_unlock(txq->mutex);
+            return rv;
+        }
+    } else {
+        /* Abort Tx if a fatal error happened */
+        if (txq->status & PDMA_TX_QUEUE_XOFF) {
+            sal_sem_give(txq->sem);
+            return SHR_E_RESOURCE;
+        }
+    }
+
+    /* Setup the new descriptor */
+    curr = txq->curr;
+    pbuf = &txq->pbuf[curr];
+    if (dev->mode == DEV_MODE_HNET && !buf) {
+        rv = cmicr2_pdma_tx_vring_fetch(hw, txq, pbuf);
+        if (SHR_FAILURE(rv)) {
+            sal_spinlock_unlock(txq->mutex);
+            return SHR_E_EMPTY;
+        }
+        txq->state |= PDMA_TX_QUEUE_BUSY;
+    } else {
+        pbuf->adj = 1;
+        pkh = bm->tx_buf_get(dev, txq, pbuf, buf);
+        if (!pkh) {
+            txq->stats.dropped++;
+            if (dev->tx_suspend) {
+                sal_spinlock_unlock(txq->mutex);
+            } else {
+                sal_sem_give(txq->sem);
+            }
+            return SHR_E_RESOURCE;
+        }
+        bm->tx_buf_dma(dev, txq, pbuf, &addr);
+        cmicr2_tx_desc_config(&ring[curr], addr, pbuf->len, pkh->hdr_prof, pkh->attrs);
+    }
+
+    /* Notify HNET to process if needed */
+    if (dev->mode == DEV_MODE_VNET) {
+        if (!TX_DCB_BYTE_COUNTf_GET(ring[(curr + txq->nb_desc - 1) % txq->nb_desc])) {
+            dev->xnet_wake(dev);
+        }
+    }
+
+    /* Update the indicators */
+    curr = (curr + 1) % txq->nb_desc;
+    txq->curr = curr;
+
+    /* Start DMA if in chain mode */
+    if (dev->flags & PDMA_CHAIN_MODE) {
+        if (txq->state & PDMA_TX_QUEUE_POLL) {
+            do {
+                rv = hw->dops.tx_ring_clean(hw, txq, txq->nb_desc - 1);
+                if (rv != (int)txq->nb_desc - 1) {
+                    break;
+                }
+                sal_usleep(1);
+            } while (retry--);
+            if (retry < 0) {
+                CNET_ERROR(hw->unit, "Last Tx could not get done in given time\n");
+            }
+        }
+        sal_spinlock_lock(txq->lock);
+        if (txq->dirt == txq->halt && txq->dirt != curr) {
+            hw->hdls.chan_stop(hw, txq->chan_id);
+            cmicr2_tx_desc_chain(&ring[(curr + txq->nb_desc - 1) % txq->nb_desc], 0);
+            hw->hdls.chan_setup(hw, txq->chan_id,
+                                txq->ring_addr + sizeof(TX_DCB_t) * txq->halt);
+            hw->hdls.chan_start(hw, txq->chan_id);
+            txq->halt = curr;
+        }
+        sal_spinlock_unlock(txq->lock);
+    }
+
+    /* Kick off DMA */
+    txq->halt_addr = txq->ring_addr + sizeof(TX_DCB_t) * curr;
+    hw->hdls.chan_goto(hw, txq->chan_id, txq->halt_addr);
+
+    /* Count the packets/bytes */
+    txq->stats.packets++;
+    txq->stats.bytes += pbuf->len;
+
+    /* Clean up ring if in polling mode */
+    if (txq->state & PDMA_TX_QUEUE_POLL &&
+        cmicr2_pdma_tx_ring_unused(txq) <= (int)txq->free_thresh) {
+        hw->dops.tx_ring_clean(hw, txq, dev->ctrl.budget);
+    }
+
+    /* Suspend Tx if no resource */
+    rv = cmicr2_pdma_tx_ring_check(hw, txq);
+    if (SHR_FAILURE(rv)) {
+        if (dev->mode == DEV_MODE_VNET) {
+            dev->xnet_wake(dev);
+        }
+
+        if (txq->state & PDMA_TX_QUEUE_POLL) {
+            /* In polling mode, must wait till the ring is available */
+            do {
+                hw->dops.tx_ring_clean(hw, txq, dev->ctrl.budget);
+                if (!(txq->status & PDMA_TX_QUEUE_XOFF) ||
+                    !(txq->state & PDMA_TX_QUEUE_ACTIVE)) {
+                    break;
+                }
+                sal_usleep(1);
+            } while (retry--);
+            if (retry < 0) {
+                CNET_ERROR(hw->unit, "Fatal error: Tx ring is full, packets can not been transmitted\n");
+                if (!dev->tx_suspend) {
+                    sal_sem_give(txq->sem);
+                    return SHR_E_RESOURCE;
+                }
+            }
+        } else {
+            /* In interrupt mode, the handle thread will wake up Tx */
+            if (!dev->tx_suspend) {
+                return SHR_E_NONE;
+            }
+        }
+    }
+
+    if (dev->tx_suspend) {
+        sal_spinlock_unlock(txq->mutex);
+    } else {
+        sal_sem_give(txq->sem);
+    }
+
+    return SHR_E_NONE;
+}
+
+/*!
+ * Attach device driver
+ */
+int
+bcmcnet_cmicr2_pdma_driver_attach(struct pdma_dev *dev)
+{
+    struct pdma_hw *hw = NULL;
+
+    /* Allocate memory for HW data */
+    hw = sal_alloc(sizeof(*hw), "bcmcnetPdmaHw");
+    if (!hw) {
+        return SHR_E_MEMORY;
+    }
+    sal_memset(hw, 0, sizeof(*hw));
+    hw->unit = dev->unit;
+    hw->dev = dev;
+    dev->ctrl.hw = hw;
+
+    bcmcnet_cmicr_pdma_hw_hdls_init(hw);
+    bcmcnet_cmicr_pdma_desc_ops_init(hw);
+
+    hw->dops.pkt_xmit = cmicr2_pdma_pkt_xmit;
+
+    return SHR_E_NONE;
+}
+
+/*!
+ * Detach device driver
+ */
+int
+bcmcnet_cmicr2_pdma_driver_detach(struct pdma_dev *dev)
+{
+    if (dev->ctrl.hw) {
+        sal_free(dev->ctrl.hw);
+    }
+    dev->ctrl.hw = NULL;
+
+    return SHR_E_NONE;
+}
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicr/bcmcnet_cmicr_pdma_hw.c b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicr/bcmcnet_cmicr_pdma_hw.c
index 99f1d7276..5fe7cfcb0 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicr/bcmcnet_cmicr_pdma_hw.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicr/bcmcnet_cmicr_pdma_hw.c
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -165,6 +165,7 @@ cmicr_pdma_hw_config(struct pdma_hw *hw)
     CMIC_CMC_PKTDMA_INTR_ENABLEr_t pktdma_intr_enable;
     CMIC_CMC_PKTDMA_INTR_CLRr_t pktdma_intr_clr;
     CMIC_TOP_CONFIGr_t cmic_config;
+    CMIC_CMC_PKTDMA_RXBUF_THRESHOLD_CONFIGr_t pktdma_rxbuf_thresh;
 
     CMIC_CMC_PKTDMA_INTR_ENABLEr_CLR(pktdma_intr_enable);
     CMIC_CMC_PKTDMA_INTR_ENABLEr_DESC_CONTROLLED_INTR_ENABLEf_SET(pktdma_intr_enable, 1);
@@ -181,6 +182,11 @@ cmicr_pdma_hw_config(struct pdma_hw *hw)
         que = rxq->chan_id % CMICR_PDMA_CMC_CHAN;
         que_ctrl = ctrl->grp[grp].que_ctrl[que];
 
+        hw->hdls.reg_rd32(hw, CMICR_PDMA_RBUF_THRE(grp, que),
+                          &CMIC_CMC_PKTDMA_RXBUF_THRESHOLD_CONFIGr_GET(pktdma_rxbuf_thresh));
+        CMIC_CMC_PKTDMA_RXBUF_THRESHOLD_CONFIGr_ENABLEf_SET(pktdma_rxbuf_thresh, 1);
+        hw->hdls.reg_wr32(hw, CMICR_PDMA_RBUF_THRE(grp, que),
+                          CMIC_CMC_PKTDMA_RXBUF_THRESHOLD_CONFIGr_GET(pktdma_rxbuf_thresh));
         hw->hdls.reg_wr32(hw, CMICR_PDMA_INTR_CLR(grp, que),
                           CMIC_CMC_PKTDMA_INTR_CLRr_GET(pktdma_intr_clr));
         CMIC_CMC_PKTDMA_CTRLr_CLR(pktdma_ctrl);
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicr/bcmcnet_cmicr_pdma_rxtx.c b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicr/bcmcnet_cmicr_pdma_rxtx.c
index 381b9e208..024a258c7 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicr/bcmcnet_cmicr_pdma_rxtx.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicr/bcmcnet_cmicr_pdma_rxtx.c
@@ -38,7 +38,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -519,6 +519,7 @@ cmicr_pdma_rx_ring_clean(struct pdma_hw *hw, struct pdma_rx_queue *rxq, int budg
 
         /* Move forward */
         if (!(rxq->state & PDMA_RX_BATCH_REFILL)) {
+            /* coverity[double_lock : FALSE] */
             sal_spinlock_lock(rxq->lock);
             if (!(rxq->status & PDMA_RX_QUEUE_XOFF)) {
                 /* Descriptor cherry pick */
@@ -566,7 +567,8 @@ cmicr_pdma_rx_ring_clean(struct pdma_hw *hw, struct pdma_rx_queue *rxq, int budg
         rxq->stats.bytes += len;
 
         /* Count the errors if any */
-        if (RX_DCB_ERRORf_GET(ring[curr])) {
+        if (RX_DCB_CELL_ERRORf_GET(ring[curr]) ||
+            RX_DCB_ECC_ERRORf_GET(ring[curr])) {
             rxq->stats.errors++;
         }
 
@@ -631,6 +633,7 @@ cmicr_pdma_rx_ring_clean(struct pdma_hw *hw, struct pdma_rx_queue *rxq, int budg
 
         /* Restart DMA if in chain mode */
         if (dev->flags & PDMA_CHAIN_MODE) {
+            /* coverity[double_lock : FALSE] */
             sal_spinlock_lock(rxq->lock);
             if (curr == 0 && !(rxq->status & PDMA_RX_QUEUE_XOFF)) {
                 hw->hdls.chan_stop(hw, rxq->chan_id);
@@ -754,6 +757,7 @@ cmicr_pdma_tx_ring_clean(struct pdma_hw *hw, struct pdma_tx_queue *txq, int budg
 
     /* One more poll for chain done in chain mode */
     if (dev->flags & PDMA_CHAIN_MODE) {
+        /* coverity[double_lock : FALSE] */
         sal_spinlock_lock(txq->lock);
         if (dirt != txq->halt) {
             done = budget;
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicx/bcmcnet_cmicx_pdma_hw.c b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicx/bcmcnet_cmicx_pdma_hw.c
index f43dc9a3e..90ab735a2 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicx/bcmcnet_cmicx_pdma_hw.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicx/bcmcnet_cmicx_pdma_hw.c
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicx/bcmcnet_cmicx_pdma_rxtx.c b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicx/bcmcnet_cmicx_pdma_rxtx.c
index 0eaf26890..b7058b9f3 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicx/bcmcnet_cmicx_pdma_rxtx.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicx/bcmcnet_cmicx_pdma_rxtx.c
@@ -38,7 +38,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicd.h b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicd.h
index 1811ca44c..066ac59e3 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicd.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicd.h
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicr.h b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicr.h
index 6f74d7fb1..df547b3f1 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicr.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicr.h
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -150,7 +150,7 @@
 #define CMICR_HW_RETRY_TIMES            100000
 
 /*! Max remaining descriptors */
-#define CMICR_DESC_REMAIN_MAX           8
+#define CMICR_DESC_REMAIN_MAX           63
 
 /*!
  * \brief Initialize HW handles.
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicr2.h b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicr2.h
new file mode 100644
index 000000000..ddba32303
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicr2.h
@@ -0,0 +1,50 @@
+/*! \file bcmcnet_cmicr2.h
+ *
+ * BCMCNET CMICr2 specific definitions and declarations.
+ *
+ */
+/*
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ */
+
+#ifndef BCMCNET_CMICR2_H
+#define BCMCNET_CMICR2_H
+
+#include <bcmcnet/bcmcnet_cmicr.h>
+
+/*!
+ * \brief Attach device driver.
+ *
+ * \param [in] dev Device structure point.
+ *
+ * \retval SHR_E_NONE No errors.
+ * \retval SHR_E_XXXX Operation failed.
+ */
+extern int
+bcmcnet_cmicr2_pdma_driver_attach(struct pdma_dev *dev);
+
+/*!
+ * \brief Detach device driver.
+ *
+ * \param [in] dev Device structure point.
+ *
+ * \retval SHR_E_NONE No errors.
+ * \retval SHR_E_XXXX Operation failed.
+ */
+extern int
+bcmcnet_cmicr2_pdma_driver_detach(struct pdma_dev *dev);
+
+#endif /* BCMCNET_CMICR2_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicr_acc.h b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicr_acc.h
index 9bd736d56..768956b07 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicr_acc.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicr_acc.h
@@ -6,7 +6,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -728,16 +728,18 @@ typedef union TX_DCB_s {
 #define TX_DCB_RELOADf_SET(r,f) (r).tx_dcb[2]=(((r).tx_dcb[2] & ~((uint32_t)0x1 << 18)) | ((((uint32_t)f) & 0x1) << 18))
 #define TX_DCB_HGf_GET(r) ((((r).tx_dcb[2]) >> 19) & 0x1)
 #define TX_DCB_HGf_SET(r,f) (r).tx_dcb[2]=(((r).tx_dcb[2] & ~((uint32_t)0x1 << 19)) | ((((uint32_t)f) & 0x1) << 19))
+#define TX_DCB_ALIGN_BYTESf_GET(r) ((((r).tx_dcb[2]) >> 20) & 0x3)
+#define TX_DCB_ALIGN_BYTESf_SET(r,f) (r).tx_dcb[2]=(((r).tx_dcb[2] & ~((uint32_t)0x3 << 20)) | ((((uint32_t)f) & 0x3) << 20))
 #define TX_DCB_PURGEf_GET(r) ((((r).tx_dcb[2]) >> 22) & 0x1)
 #define TX_DCB_PURGEf_SET(r,f) (r).tx_dcb[2]=(((r).tx_dcb[2] & ~((uint32_t)0x1 << 22)) | ((((uint32_t)f) & 0x1) << 22))
 #define TX_DCB_DESC_DONE_INTRf_GET(r) ((((r).tx_dcb[2]) >> 23) & 0x1)
 #define TX_DCB_DESC_DONE_INTRf_SET(r,f) (r).tx_dcb[2]=(((r).tx_dcb[2] & ~((uint32_t)0x1 << 23)) | ((((uint32_t)f) & 0x1) << 23))
 #define TX_DCB_DESC_CTRL_INTRf_GET(r) ((((r).tx_dcb[2]) >> 24) & 0x1)
 #define TX_DCB_DESC_CTRL_INTRf_SET(r,f) (r).tx_dcb[2]=(((r).tx_dcb[2] & ~((uint32_t)0x1 << 24)) | ((((uint32_t)f) & 0x1) << 24))
-#define TX_DCB_DESC_REMAINf_GET(r) ((((r).tx_dcb[2]) >> 25) & 0xf)
-#define TX_DCB_DESC_REMAINf_SET(r,f) (r).tx_dcb[2]=(((r).tx_dcb[2] & ~((uint32_t)0xf << 25)) | ((((uint32_t)f) & 0xf) << 25))
-#define TX_DCB_DESC_STAT_WR_DISABLEf_GET(r) ((((r).tx_dcb[2]) >> 29) & 0x1)
-#define TX_DCB_DESC_STAT_WR_DISABLEf_SET(r,f) (r).tx_dcb[2]=(((r).tx_dcb[2] & ~((uint32_t)0x1 << 29)) | ((((uint32_t)f) & 0x1) << 29))
+#define TX_DCB_DESC_REMAINf_GET(r) ((((r).tx_dcb[2]) >> 25) & 0x3f)
+#define TX_DCB_DESC_REMAINf_SET(r,f) (r).tx_dcb[2]=(((r).tx_dcb[2] & ~((uint32_t)0x3f << 25)) | ((((uint32_t)f) & 0x3f) << 25))
+#define TX_DCB_DESC_STAT_WR_DISABLEf_GET(r) ((((r).tx_dcb[2]) >> 31) & 0x1)
+#define TX_DCB_DESC_STAT_WR_DISABLEf_SET(r,f) (r).tx_dcb[2]=(((r).tx_dcb[2] & ~((uint32_t)0x1 << 31)) | ((((uint32_t)f) & 0x1) << 31))
 #define TX_DCB_ADDR_HIf_GET(r) ((r).tx_dcb[1])
 #define TX_DCB_ADDR_HIf_SET(r,f) (r).tx_dcb[1]=((uint32_t)f)
 #define TX_DCB_ADDR_LOf_GET(r) ((r).tx_dcb[0])
@@ -763,8 +765,10 @@ typedef union RX_DCB_s {
 #define RX_DCB_END_BITf_SET(r,f) (r).rx_dcb[3]=(((r).rx_dcb[3] & ~((uint32_t)0x1 << 16)) | ((((uint32_t)f) & 0x1) << 16))
 #define RX_DCB_START_BITf_GET(r) ((((r).rx_dcb[3]) >> 17) & 0x1)
 #define RX_DCB_START_BITf_SET(r,f) (r).rx_dcb[3]=(((r).rx_dcb[3] & ~((uint32_t)0x1 << 17)) | ((((uint32_t)f) & 0x1) << 17))
-#define RX_DCB_ERRORf_GET(r) ((((r).rx_dcb[3]) >> 18) & 0x1)
-#define RX_DCB_ERRORf_SET(r,f) (r).rx_dcb[3]=(((r).rx_dcb[3] & ~((uint32_t)0x1 << 18)) | ((((uint32_t)f) & 0x1) << 18))
+#define RX_DCB_CELL_ERRORf_GET(r) ((((r).rx_dcb[3]) >> 18) & 0x1)
+#define RX_DCB_CELL_ERRORf_SET(r,f) (r).rx_dcb[3]=(((r).rx_dcb[3] & ~((uint32_t)0x1 << 18)) | ((((uint32_t)f) & 0x1) << 18))
+#define RX_DCB_ECC_ERRORf_GET(r) ((((r).rx_dcb[3]) >> 19) & 0x1)
+#define RX_DCB_ECC_ERRORf_SET(r,f) (r).rx_dcb[3]=(((r).rx_dcb[3] & ~((uint32_t)0x1 << 19)) | ((((uint32_t)f) & 0x1) << 19))
 #define RX_DCB_DONEf_GET(r) ((((r).rx_dcb[3]) >> 31) & 0x1)
 #define RX_DCB_DONEf_SET(r,f) (r).rx_dcb[3]=(((r).rx_dcb[3] & ~((uint32_t)0x1 << 31)) | ((((uint32_t)f) & 0x1) << 31))
 #define RX_DCB_BYTE_COUNTf_GET(r) (((r).rx_dcb[2]) & 0xffff)
@@ -775,14 +779,16 @@ typedef union RX_DCB_s {
 #define RX_DCB_SGf_SET(r,f) (r).rx_dcb[2]=(((r).rx_dcb[2] & ~((uint32_t)0x1 << 17)) | ((((uint32_t)f) & 0x1) << 17))
 #define RX_DCB_RELOADf_GET(r) ((((r).rx_dcb[2]) >> 18) & 0x1)
 #define RX_DCB_RELOADf_SET(r,f) (r).rx_dcb[2]=(((r).rx_dcb[2] & ~((uint32_t)0x1 << 18)) | ((((uint32_t)f) & 0x1) << 18))
+#define RX_DCB_ALIGN_BYTESf_GET(r) ((((r).rx_dcb[2]) >> 20) & 0x3)
+#define RX_DCB_ALIGN_BYTESf_SET(r,f) (r).rx_dcb[2]=(((r).rx_dcb[2] & ~((uint32_t)0x3 << 20)) | ((((uint32_t)f) & 0x3) << 20))
 #define RX_DCB_DESC_DONE_INTRf_GET(r) ((((r).rx_dcb[2]) >> 23) & 0x1)
 #define RX_DCB_DESC_DONE_INTRf_SET(r,f) (r).rx_dcb[2]=(((r).rx_dcb[2] & ~((uint32_t)0x1 << 23)) | ((((uint32_t)f) & 0x1) << 23))
 #define RX_DCB_DESC_CTRL_INTRf_GET(r) ((((r).rx_dcb[2]) >> 24) & 0x1)
 #define RX_DCB_DESC_CTRL_INTRf_SET(r,f) (r).rx_dcb[2]=(((r).rx_dcb[2] & ~((uint32_t)0x1 << 24)) | ((((uint32_t)f) & 0x1) << 24))
-#define RX_DCB_DESC_REMAINf_GET(r) ((((r).rx_dcb[2]) >> 25) & 0xf)
-#define RX_DCB_DESC_REMAINf_SET(r,f) (r).rx_dcb[2]=(((r).rx_dcb[2] & ~((uint32_t)0xf << 25)) | ((((uint32_t)f) & 0xf) << 25))
-#define RX_DCB_DESC_STAT_WR_DISABLEf_GET(r) ((((r).rx_dcb[2]) >> 29) & 0x1)
-#define RX_DCB_DESC_STAT_WR_DISABLEf_SET(r,f) (r).rx_dcb[2]=(((r).rx_dcb[2] & ~((uint32_t)0x1 << 29)) | ((((uint32_t)f) & 0x1) << 29))
+#define RX_DCB_DESC_REMAINf_GET(r) ((((r).rx_dcb[2]) >> 25) & 0x3f)
+#define RX_DCB_DESC_REMAINf_SET(r,f) (r).rx_dcb[2]=(((r).rx_dcb[2] & ~((uint32_t)0x3f << 25)) | ((((uint32_t)f) & 0x3f) << 25))
+#define RX_DCB_DESC_STAT_WR_DISABLEf_GET(r) ((((r).rx_dcb[2]) >> 31) & 0x1)
+#define RX_DCB_DESC_STAT_WR_DISABLEf_SET(r,f) (r).rx_dcb[2]=(((r).rx_dcb[2] & ~((uint32_t)0x1 << 31)) | ((((uint32_t)f) & 0x1) << 31))
 #define RX_DCB_ADDR_HIf_GET(r) ((r).rx_dcb[1])
 #define RX_DCB_ADDR_HIf_SET(r,f) (r).rx_dcb[1]=((uint32_t)f)
 #define RX_DCB_ADDR_LOf_GET(r) ((r).rx_dcb[0])
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicx.h b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicx.h
index 75d61c7a3..1fe344038 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicx.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicx.h
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_core.h b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_core.h
index 82341cac7..e255ec0d8 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_core.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_core.h
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -45,8 +45,8 @@ struct pkt_hdr {
     /*! Data length */
     uint16_t data_len;
 
-    /*! Reserved */
-    uint16_t rsvd2;
+    /*! Header profile */
+    uint16_t hdr_prof;
 
     /*! Meta length */
     uint8_t meta_len;
@@ -129,6 +129,9 @@ struct intr_handle {
 
     /*! Interrupt flags */
     uint32_t intr_flags;
+
+    /*! Extra polling after queue is empty */
+    bool extra_poll;
 };
 
 /*!
@@ -918,6 +921,9 @@ struct pdma_dev {
     /*! Abort PDMA mode for suspend and resume */
 #define PDMA_ABORT          (1 << 6)
 
+    /*! Extra poll time in microseconds */
+    int extra_poll_time;
+
     /*! Device mode */
     dev_mode_t mode;
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_dev.h b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_dev.h
index 2a316531f..0eeedb8c5 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_dev.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_dev.h
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_internal.h b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_internal.h
index 6a4495a84..9b877502d 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_internal.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_internal.h
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_rxtx.h b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_rxtx.h
index cd3eb1afe..cb41361a3 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_rxtx.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_rxtx.h
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_types.h b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_types.h
index 67b0c3578..54001f9c3 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_types.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_types.h
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/main/bcmcnet_core.c b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/main/bcmcnet_core.c
index 4a1125548..ed5d99b92 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/main/bcmcnet_core.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/main/bcmcnet_core.c
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/main/bcmcnet_dev.c b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/main/bcmcnet_dev.c
index ab91bdfd0..1501c487e 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/main/bcmcnet_dev.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/main/bcmcnet_dev.c
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -67,11 +67,11 @@ bcn_rx_queues_alloc(struct pdma_dev *dev)
             if (!rxq) {
                 goto error;
             }
+            ctrl->grp[gi].rx_queue[qi] = rxq;
             sal_memset(rxq, 0, sizeof(*rxq));
             rxq->group_id = gi;
             rxq->chan_id = qi + gi * dev->grp_queues;
             rxq->ctrl = ctrl;
-            ctrl->grp[gi].rx_queue[qi] = rxq;
             if (dev->mode == DEV_MODE_HNET) {
                 vrxq = sal_alloc(sizeof(*vrxq), "bcmcnetVnetRxQueue");
                 if (!vrxq) {
@@ -139,6 +139,7 @@ bcn_tx_queues_alloc(struct pdma_dev *dev)
             if (!txq) {
                 goto error;
             }
+            ctrl->grp[gi].tx_queue[qi] = txq;
             sal_memset(txq, 0, sizeof(*txq));
             txq->group_id = gi;
             txq->chan_id = qi + gi * dev->grp_queues;
@@ -147,7 +148,6 @@ bcn_tx_queues_alloc(struct pdma_dev *dev)
             if (!txq->sem) {
                 goto error;
             }
-            ctrl->grp[gi].tx_queue[qi] = txq;
             if (dev->mode == DEV_MODE_HNET) {
                 vtxq = sal_alloc(sizeof(*vtxq), "bcmcnetVnetTxQueue");
                 if (!vtxq) {
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/main/bcmcnet_rxtx.c b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/main/bcmcnet_rxtx.c
index 6f42236eb..ed1df8faf 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/main/bcmcnet_rxtx.c
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/main/bcmcnet_rxtx.c
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd/bcmdrd_devlist.h b/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd/bcmdrd_devlist.h
index 5ede02035..35b3cf58e 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd/bcmdrd_devlist.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd/bcmdrd_devlist.h
@@ -4,7 +4,7 @@
  * Edits to this file will be lost when it is regenerated.
  * Tool: INTERNAL/drd/instpkgs.pl
  *
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -41,26 +41,47 @@
 #define BCM56080_VENDOR_ID                0x14e4
 #define BCM56080_DEVICE_ID                0xb080
 #define BCM56080_REV_A0                     0x01
+#define BCM56080_REV_A1                     0x02
 
 /* BCM56081 */
 #define BCM56081_VENDOR_ID                0x14e4
 #define BCM56081_DEVICE_ID                0xb081
 #define BCM56081_REV_A0                     0x01
+#define BCM56081_REV_A1                     0x02
 
 /* BCM56082 */
 #define BCM56082_VENDOR_ID                0x14e4
 #define BCM56082_DEVICE_ID                0xb082
 #define BCM56082_REV_A0                     0x01
+#define BCM56082_REV_A1                     0x02
 
 /* BCM56083 */
 #define BCM56083_VENDOR_ID                0x14e4
 #define BCM56083_DEVICE_ID                0xb083
 #define BCM56083_REV_A0                     0x01
+#define BCM56083_REV_A1                     0x02
 
 /* BCM56084 */
 #define BCM56084_VENDOR_ID                0x14e4
 #define BCM56084_DEVICE_ID                0xb084
 #define BCM56084_REV_A0                     0x01
+#define BCM56084_REV_A1                     0x02
+
+/* BCM56085 */
+#define BCM56085_VENDOR_ID                0x14e4
+#define BCM56085_DEVICE_ID                0xb085
+#define BCM56085_REV_A0                     0x01
+#define BCM56085_REV_A1                     0x02
+
+/* BCM56690 */
+#define BCM56690_VENDOR_ID                0x14e4
+#define BCM56690_DEVICE_ID                0xb690
+#define BCM56690_REV_A0                     0x01
+
+/* BCM56692 */
+#define BCM56692_VENDOR_ID                0x14e4
+#define BCM56692_DEVICE_ID                0xb692
+#define BCM56692_REV_A0                     0x01
 
 /* BCM56780 */
 #define BCM56780_VENDOR_ID                0x14e4
@@ -71,6 +92,7 @@
 #define BCM56782_VENDOR_ID                0x14e4
 #define BCM56782_DEVICE_ID                0xb782
 #define BCM56782_REV_A0                     0x01
+#define BCM56782_REV_A1                     0x02
 
 /* BCM56784 */
 #define BCM56784_VENDOR_ID                0x14e4
@@ -86,16 +108,19 @@
 #define BCM56786_VENDOR_ID                0x14e4
 #define BCM56786_DEVICE_ID                0xb786
 #define BCM56786_REV_A0                     0x01
+#define BCM56786_REV_A1                     0x02
 
 /* BCM56787 */
 #define BCM56787_VENDOR_ID                0x14e4
 #define BCM56787_DEVICE_ID                0xb787
 #define BCM56787_REV_A0                     0x01
+#define BCM56787_REV_A1                     0x02
 
 /* BCM56788 */
 #define BCM56788_VENDOR_ID                0x14e4
 #define BCM56788_DEVICE_ID                0xb788
 #define BCM56788_REV_A0                     0x01
+#define BCM56788_REV_A1                     0x02
 
 /* BCM56789 */
 #define BCM56789_VENDOR_ID                0x14e4
@@ -200,10 +225,20 @@
 #define BCM78900_DEVICE_ID                0xf900
 #define BCM78900_REV_B0                     0x11
 
+/* BCM78902 */
+#define BCM78902_VENDOR_ID                0x14e4
+#define BCM78902_DEVICE_ID                0xf902
+#define BCM78902_REV_B0                     0x11
+
+/* BCM78903 */
+#define BCM78903_VENDOR_ID                0x14e4
+#define BCM78903_DEVICE_ID                0xf903
+#define BCM78903_REV_B0                     0x11
+
 /* BCM78905 */
 #define BCM78905_VENDOR_ID                0x14e4
 #define BCM78905_DEVICE_ID                0xf905
-#define BCM78905_REV_B0                     0x11
+#define BCM78905_REV_A0                     0x01
 
 /*
  * End of Supported Devices and Revisions
@@ -242,8 +277,18 @@
 BCMDRD_DEVLIST_ENTRY(BCM56080, BCM56080_VENDOR_ID, BCM56080_DEVICE_ID, BCM56080_REV_A0, \
                      0, 0, \
                      bcm56080_a0, bcm56080_a0, bcm56080_a0, \
-                     "Pex1", "BCM56080", \
-                     "1.6 Tbps Multilayer Switch", 0, 0)
+                     "Firelight2", "BCM56080", \
+                     "1.6 Tbps Multilayer Switch w/ MACSec", 0, 0)
+#endif
+
+#if BCMDRD_CONFIG_INCLUDE_BCM56080_A1 == 1 || defined(BCMDRD_DEVLIST_OVERRIDE)
+#ifdef BCMDRD_DEVLIST_INCLUDE_ALL
+BCMDRD_DEVLIST_ENTRY(BCM56080, BCM56080_VENDOR_ID, BCM56080_DEVICE_ID, BCM56080_REV_A1, \
+                     0, 0, \
+                     bcm56080_a0, bcm56080_a0, bcm56080_a1, \
+                     "Firelight2", "BCM56080", \
+                     "1.6 Tbps Multilayer Switch w/ MACSec", 0, 0)
+#endif
 #endif
 
 #if BCMDRD_CONFIG_INCLUDE_BCM56081_A0 == 1 || defined(BCMDRD_DEVLIST_OVERRIDE)
@@ -251,8 +296,18 @@ BCMDRD_DEVLIST_ENTRY(BCM56080, BCM56080_VENDOR_ID, BCM56080_DEVICE_ID, BCM56080_
 BCMDRD_DEVLIST_ENTRY(BCM56081, BCM56081_VENDOR_ID, BCM56081_DEVICE_ID, BCM56081_REV_A0, \
                      0, 0, \
                      bcm56080_a0, bcm56081_a0, bcm56081_a0, \
-                     "Pex1", "BCM56080", \
-                     "1.2 Tbps Line Card w/MACsec", 0, 0)
+                     "Firelight2", "BCM56080", \
+                     "1.2 Tbps Multilayer Switch w/ MACSec", 0, 0)
+#endif
+#endif
+
+#if BCMDRD_CONFIG_INCLUDE_BCM56081_A1 == 1 || defined(BCMDRD_DEVLIST_OVERRIDE)
+#ifdef BCMDRD_DEVLIST_INCLUDE_ALL
+BCMDRD_DEVLIST_ENTRY(BCM56081, BCM56081_VENDOR_ID, BCM56081_DEVICE_ID, BCM56081_REV_A1, \
+                     0, 0, \
+                     bcm56080_a0, bcm56081_a0, bcm56081_a1, \
+                     "Firelight2", "BCM56080", \
+                     "1.2 Tbps Multilayer Switch w/ MACSec", 0, 0)
 #endif
 #endif
 
@@ -261,8 +316,18 @@ BCMDRD_DEVLIST_ENTRY(BCM56081, BCM56081_VENDOR_ID, BCM56081_DEVICE_ID, BCM56081_
 BCMDRD_DEVLIST_ENTRY(BCM56082, BCM56082_VENDOR_ID, BCM56082_DEVICE_ID, BCM56082_REV_A0, \
                      0, 0, \
                      bcm56080_a0, bcm56082_a0, bcm56082_a0, \
-                     "Pex1", "BCM56080", \
-                     "1.08 Tbps Line Card w/MACsec", 0, 0)
+                     "Firelight2", "BCM56080", \
+                     "0.96 Tbps Multilayer Switch w/ MACSec", 0, 0)
+#endif
+#endif
+
+#if BCMDRD_CONFIG_INCLUDE_BCM56082_A1 == 1 || defined(BCMDRD_DEVLIST_OVERRIDE)
+#ifdef BCMDRD_DEVLIST_INCLUDE_ALL
+BCMDRD_DEVLIST_ENTRY(BCM56082, BCM56082_VENDOR_ID, BCM56082_DEVICE_ID, BCM56082_REV_A1, \
+                     0, 0, \
+                     bcm56080_a0, bcm56082_a0, bcm56082_a1, \
+                     "Firelight2", "BCM56080", \
+                     "0.96 Tbps Multilayer Switch w/ MACSec", 0, 0)
 #endif
 #endif
 
@@ -271,8 +336,18 @@ BCMDRD_DEVLIST_ENTRY(BCM56082, BCM56082_VENDOR_ID, BCM56082_DEVICE_ID, BCM56082_
 BCMDRD_DEVLIST_ENTRY(BCM56083, BCM56083_VENDOR_ID, BCM56083_DEVICE_ID, BCM56083_REV_A0, \
                      0, 0, \
                      bcm56080_a0, bcm56083_a0, bcm56083_a0, \
-                     "Pex1", "BCM56080", \
-                     "1.2 Tbps Line Card", 0, 0)
+                     "Firelight2", "BCM56080", \
+                     "1.2 Tbps Multilayer Switch", 0, 0)
+#endif
+#endif
+
+#if BCMDRD_CONFIG_INCLUDE_BCM56083_A1 == 1 || defined(BCMDRD_DEVLIST_OVERRIDE)
+#ifdef BCMDRD_DEVLIST_INCLUDE_ALL
+BCMDRD_DEVLIST_ENTRY(BCM56083, BCM56083_VENDOR_ID, BCM56083_DEVICE_ID, BCM56083_REV_A1, \
+                     0, 0, \
+                     bcm56080_a0, bcm56083_a0, bcm56083_a1, \
+                     "Firelight2", "BCM56080", \
+                     "1.2 Tbps Multilayer Switch", 0, 0)
 #endif
 #endif
 
@@ -281,8 +356,56 @@ BCMDRD_DEVLIST_ENTRY(BCM56083, BCM56083_VENDOR_ID, BCM56083_DEVICE_ID, BCM56083_
 BCMDRD_DEVLIST_ENTRY(BCM56084, BCM56084_VENDOR_ID, BCM56084_DEVICE_ID, BCM56084_REV_A0, \
                      0, 0, \
                      bcm56080_a0, bcm56084_a0, bcm56084_a0, \
-                     "Pex1", "BCM56080", \
-                     "1.08 Tbps Line Card", 0, 0)
+                     "Firelight2", "BCM56080", \
+                     "0.96 Tbps Multilayer Switch", 0, 0)
+#endif
+#endif
+
+#if BCMDRD_CONFIG_INCLUDE_BCM56084_A1 == 1 || defined(BCMDRD_DEVLIST_OVERRIDE)
+#ifdef BCMDRD_DEVLIST_INCLUDE_ALL
+BCMDRD_DEVLIST_ENTRY(BCM56084, BCM56084_VENDOR_ID, BCM56084_DEVICE_ID, BCM56084_REV_A1, \
+                     0, 0, \
+                     bcm56080_a0, bcm56084_a0, bcm56084_a1, \
+                     "Firelight2", "BCM56080", \
+                     "0.96 Tbps Multilayer Switch", 0, 0)
+#endif
+#endif
+
+#if BCMDRD_CONFIG_INCLUDE_BCM56085_A0 == 1 || defined(BCMDRD_DEVLIST_OVERRIDE)
+#ifdef BCMDRD_DEVLIST_INCLUDE_ALL
+BCMDRD_DEVLIST_ENTRY(BCM56085, BCM56085_VENDOR_ID, BCM56085_DEVICE_ID, BCM56085_REV_A0, \
+                     0, 0, \
+                     bcm56080_a0, bcm56085_a0, bcm56085_a0, \
+                     "Firelight2", "BCM56080", \
+                     "0.8 Tbps Multilayer Switch w/ MACSec", 0, 0)
+#endif
+#endif
+
+#if BCMDRD_CONFIG_INCLUDE_BCM56085_A1 == 1 || defined(BCMDRD_DEVLIST_OVERRIDE)
+#ifdef BCMDRD_DEVLIST_INCLUDE_ALL
+BCMDRD_DEVLIST_ENTRY(BCM56085, BCM56085_VENDOR_ID, BCM56085_DEVICE_ID, BCM56085_REV_A1, \
+                     0, 0, \
+                     bcm56080_a0, bcm56085_a0, bcm56085_a1, \
+                     "Firelight2", "BCM56080", \
+                     "0.8 Tbps Multilayer Switch w/ MACSec", 0, 0)
+#endif
+#endif
+
+#if BCMDRD_CONFIG_INCLUDE_BCM56690_A0 == 1 || defined(BCMDRD_DEVLIST_OVERRIDE)
+BCMDRD_DEVLIST_ENTRY(BCM56690, BCM56690_VENDOR_ID, BCM56690_DEVICE_ID, BCM56690_REV_A0, \
+                     0, 0, \
+                     bcm56690_a0, bcm56690_a0, bcm56690_a0, \
+                     "Trident4-X7", "BCM56690", \
+                     "4T cost-optimized 50G-DL ToR", 0, 0)
+#endif
+
+#if BCMDRD_CONFIG_INCLUDE_BCM56692_A0 == 1 || defined(BCMDRD_DEVLIST_OVERRIDE)
+#ifdef BCMDRD_DEVLIST_INCLUDE_ALL
+BCMDRD_DEVLIST_ENTRY(BCM56692, BCM56692_VENDOR_ID, BCM56692_DEVICE_ID, BCM56692_REV_A0, \
+                     0, 0, \
+                     bcm56690_a0, bcm56692_a0, bcm56692_a0, \
+                     "Trident4-X7", "BCM56690", \
+                     "2T cost-optimized 50G-DL ToR", 0, 0)
 #endif
 #endif
 
@@ -304,6 +427,16 @@ BCMDRD_DEVLIST_ENTRY(BCM56782, BCM56782_VENDOR_ID, BCM56782_DEVICE_ID, BCM56782_
 #endif
 #endif
 
+#if BCMDRD_CONFIG_INCLUDE_BCM56782_A1 == 1 || defined(BCMDRD_DEVLIST_OVERRIDE)
+#ifdef BCMDRD_DEVLIST_INCLUDE_ALL
+BCMDRD_DEVLIST_ENTRY(BCM56782, BCM56782_VENDOR_ID, BCM56782_DEVICE_ID, BCM56782_REV_A1, \
+                     0, 0, \
+                     bcm56780_a0, bcm56782_a0, bcm56782_a1, \
+                     "Trident4-X9", "BCM56780", \
+                     "8 Tb/s 160x50G-PAM4 Programmable Switch w/MACsec", 0, 0)
+#endif
+#endif
+
 #if BCMDRD_CONFIG_INCLUDE_BCM56784_A0 == 1 || defined(BCMDRD_DEVLIST_OVERRIDE)
 #ifdef BCMDRD_DEVLIST_INCLUDE_ALL
 BCMDRD_DEVLIST_ENTRY(BCM56784, BCM56784_VENDOR_ID, BCM56784_DEVICE_ID, BCM56784_REV_A0, \
@@ -334,6 +467,16 @@ BCMDRD_DEVLIST_ENTRY(BCM56786, BCM56786_VENDOR_ID, BCM56786_DEVICE_ID, BCM56786_
 #endif
 #endif
 
+#if BCMDRD_CONFIG_INCLUDE_BCM56786_A1 == 1 || defined(BCMDRD_DEVLIST_OVERRIDE)
+#ifdef BCMDRD_DEVLIST_INCLUDE_ALL
+BCMDRD_DEVLIST_ENTRY(BCM56786, BCM56786_VENDOR_ID, BCM56786_DEVICE_ID, BCM56786_REV_A1, \
+                     0, 0, \
+                     bcm56780_a0, bcm56786_a0, bcm56786_a1, \
+                     "Trident4-X9", "BCM56780", \
+                     "5.6 Tb/s 96x50G-PAM4/32x35G-NRZ Programmable Switch w/MACsec", 0, 0)
+#endif
+#endif
+
 #if BCMDRD_CONFIG_INCLUDE_BCM56787_A0 == 1 || defined(BCMDRD_DEVLIST_OVERRIDE)
 #ifdef BCMDRD_DEVLIST_INCLUDE_ALL
 BCMDRD_DEVLIST_ENTRY(BCM56787, BCM56787_VENDOR_ID, BCM56787_DEVICE_ID, BCM56787_REV_A0, \
@@ -344,6 +487,16 @@ BCMDRD_DEVLIST_ENTRY(BCM56787, BCM56787_VENDOR_ID, BCM56787_DEVICE_ID, BCM56787_
 #endif
 #endif
 
+#if BCMDRD_CONFIG_INCLUDE_BCM56787_A1 == 1 || defined(BCMDRD_DEVLIST_OVERRIDE)
+#ifdef BCMDRD_DEVLIST_INCLUDE_ALL
+BCMDRD_DEVLIST_ENTRY(BCM56787, BCM56787_VENDOR_ID, BCM56787_DEVICE_ID, BCM56787_REV_A1, \
+                     0, 0, \
+                     bcm56780_a0, bcm56787_a0, bcm56787_a1, \
+                     "Trident4-X9", "BCM56780", \
+                     "5.6 Tb/s 96x50G-PAM4/32x35G-NRZ Programmable Switch w/MACsec w/SmartToR", 0, 0)
+#endif
+#endif
+
 #if BCMDRD_CONFIG_INCLUDE_BCM56788_A0 == 1 || defined(BCMDRD_DEVLIST_OVERRIDE)
 #ifdef BCMDRD_DEVLIST_INCLUDE_ALL
 BCMDRD_DEVLIST_ENTRY(BCM56788, BCM56788_VENDOR_ID, BCM56788_DEVICE_ID, BCM56788_REV_A0, \
@@ -354,6 +507,16 @@ BCMDRD_DEVLIST_ENTRY(BCM56788, BCM56788_VENDOR_ID, BCM56788_DEVICE_ID, BCM56788_
 #endif
 #endif
 
+#if BCMDRD_CONFIG_INCLUDE_BCM56788_A1 == 1 || defined(BCMDRD_DEVLIST_OVERRIDE)
+#ifdef BCMDRD_DEVLIST_INCLUDE_ALL
+BCMDRD_DEVLIST_ENTRY(BCM56788, BCM56788_VENDOR_ID, BCM56788_DEVICE_ID, BCM56788_REV_A1, \
+                     0, 0, \
+                     bcm56780_a0, bcm56788_a0, bcm56788_a1, \
+                     "Trident4-X9", "BCM56780", \
+                     "8 Tb/s 160x50G-PAM4 Programmable Switch w/MACsec w/SmartToR", 0, 0)
+#endif
+#endif
+
 #if BCMDRD_CONFIG_INCLUDE_BCM56789_A0 == 1 || defined(BCMDRD_DEVLIST_OVERRIDE)
 #ifdef BCMDRD_DEVLIST_INCLUDE_ALL
 BCMDRD_DEVLIST_ENTRY(BCM56789, BCM56789_VENDOR_ID, BCM56789_DEVICE_ID, BCM56789_REV_A0, \
@@ -606,16 +769,34 @@ BCMDRD_DEVLIST_ENTRY(BCM78900, BCM78900_VENDOR_ID, BCM78900_DEVICE_ID, BCM78900_
                      "51.2 Tbps Multilayer Switch", 0, 0)
 #endif
 
-#if BCMDRD_CONFIG_INCLUDE_BCM78905_B0 == 1 || defined(BCMDRD_DEVLIST_OVERRIDE)
+#if BCMDRD_CONFIG_INCLUDE_BCM78902_B0 == 1 || defined(BCMDRD_DEVLIST_OVERRIDE)
 #ifdef BCMDRD_DEVLIST_INCLUDE_ALL
-BCMDRD_DEVLIST_ENTRY(BCM78905, BCM78905_VENDOR_ID, BCM78905_DEVICE_ID, BCM78905_REV_B0, \
+BCMDRD_DEVLIST_ENTRY(BCM78902, BCM78902_VENDOR_ID, BCM78902_DEVICE_ID, BCM78902_REV_B0, \
                      0, 0, \
-                     bcm78900_b0, bcm78905_b0, bcm78905_b0, \
+                     bcm78900_b0, bcm78902_b0, bcm78902_b0, \
                      "Tomahawk5", "BCM78900", \
                      "25.6 Tbps Multilayer Switch", 0, 0)
 #endif
 #endif
 
+#if BCMDRD_CONFIG_INCLUDE_BCM78903_B0 == 1 || defined(BCMDRD_DEVLIST_OVERRIDE)
+#ifdef BCMDRD_DEVLIST_INCLUDE_ALL
+BCMDRD_DEVLIST_ENTRY(BCM78903, BCM78903_VENDOR_ID, BCM78903_DEVICE_ID, BCM78903_REV_B0, \
+                     0, 0, \
+                     bcm78900_b0, bcm78903_b0, bcm78903_b0, \
+                     "Tomahawk5", "BCM78900", \
+                     "25.6 Tbps Multilayer Switch", 0, 0)
+#endif
+#endif
+
+#if BCMDRD_CONFIG_INCLUDE_BCM78905_A0 == 1 || defined(BCMDRD_DEVLIST_OVERRIDE)
+BCMDRD_DEVLIST_ENTRY(BCM78905, BCM78905_VENDOR_ID, BCM78905_DEVICE_ID, BCM78905_REV_A0, \
+                     0, 0, \
+                     bcm78905_a0, bcm78905_a0, bcm78905_a0, \
+                     "Tomahawk5+", "BCM78905", \
+                     "51.2 Tbps Multilayer Switch", 0, 0)
+#endif
+
 /* End BCMDRD_DEVLIST_ENTRY Macros */
 
 #ifdef BCMDRD_DEVLIST_INCLUDE_ALL
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd/bcmdrd_symbol_types.h b/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd/bcmdrd_symbol_types.h
new file mode 100644
index 000000000..0308cce57
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd/bcmdrd_symbol_types.h
@@ -0,0 +1,211 @@
+/*! \file bcmdrd_symbol_types.h
+ *
+ * <description>
+ *
+ */
+/*
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ */
+
+#ifndef BCMDRD_SYMBOL_TYPES_H
+#define BCMDRD_SYMBOL_TYPES_H
+
+#include <bcmdrd/bcmdrd_types.h>
+
+/*!
+ * \name Symbol flags.
+ * \anchor BCMDRD_SYMBOL_FLAG_xxx
+ */
+
+/*! \{ */
+
+/*! Symbol data will be cleared on read. */
+#define BCMDRD_SYMBOL_FLAG_CLEAR_ON_READ                    (1U << 8)
+
+/*! Symbol data can be updated by hardware. */
+#define BCMDRD_SYMBOL_FLAG_HW_UPDATED                       (1U << 9)
+
+/*! Symbol should not be accessed with traffic running. */
+#define BCMDRD_SYMBOL_FLAG_ACC_IDLE                         (1U << 10)
+
+/*! Symbol validity can be decided dynamically at system initialization. */
+#define BCMDRD_SYMBOL_FLAG_DYNAMIC                          (1U << 11)
+
+/*! Symbol represents a special access. */
+#define BCMDRD_SYMBOL_FLAG_SPECIAL                          (1U << 12)
+
+/*! Symbol access type represents a unique pipe. */
+#define BCMDRD_SYMBOL_FLAG_ACC_UNIQUE_PIPE                  (1U << 13)
+
+/*! Symbol is associated with a specific sub-pipe. */
+#define BCMDRD_SYMBOL_FLAG_SUB_PIPE                         (1U << 14)
+
+/*! Symbol is write-only. */
+#define BCMDRD_SYMBOL_FLAG_WRITEONLY                        (1U << 15)
+
+/*! Symbol is not suitable for read/write tests. */
+#define BCMDRD_SYMBOL_FLAG_NOTEST                           (1U << 16)
+
+/*! Symbol is a non-CMIC iProc register. */
+#define BCMDRD_SYMBOL_FLAG_IPROC                            (1U << 17)
+
+/*! Symbol is an overlay of other symbols. */
+#define BCMDRD_SYMBOL_FLAG_OVERLAY                          (1U << 18)
+
+/*! Symbol is read-only or any field within the symbol is read-only. */
+#define BCMDRD_SYMBOL_FLAG_READONLY                         (1U << 19)
+
+/*! Symbol with FIFO operations. */
+#define BCMDRD_SYMBOL_FLAG_FIFO                             (1U << 20)
+
+/*! Symbol is reasonable to cache in S/W. */
+#define BCMDRD_SYMBOL_FLAG_CACHEABLE                        (1U << 21)
+
+/*! Symbol is a hashed table. */
+#define BCMDRD_SYMBOL_FLAG_HASHED                           (1U << 22)
+
+/*! Symbol is an external CAM. */
+#define BCMDRD_SYMBOL_FLAG_EXT_CAM                          (1U << 23)
+
+/*! Symbol is a CAM. */
+#define BCMDRD_SYMBOL_FLAG_CAM                              (1U << 24)
+
+/*! Symbol is a register. */
+#define BCMDRD_SYMBOL_FLAG_REGISTER                         (1U << 25)
+
+/*! Symbol is a port-based register, i.e. one ionstance per port. */
+#define BCMDRD_SYMBOL_FLAG_PORT                             (1U << 26)
+
+/*! Symbol is a counter register. */
+#define BCMDRD_SYMBOL_FLAG_COUNTER                          (1U << 27)
+
+/*! Symbol is a memory. */
+#define BCMDRD_SYMBOL_FLAG_MEMORY                           (1U << 28)
+
+/*! Symbol uses big endian word ordering. */
+#define BCMDRD_SYMBOL_FLAG_BIG_ENDIAN                       (1U << 29)
+
+/*! Symbol is a memory-mapped register. */
+#define BCMDRD_SYMBOL_FLAG_MEMMAPPED                        (1U << 30)
+
+/*! Symbol is a port-block register, i.e. one instance per port-block. */
+#define BCMDRD_SYMBOL_FLAG_SOFT_PORT                        (1U << 31)
+
+/*! \} */
+
+/*!
+ * \name Symbol attributes.
+ * \anchor BCMDRD_SYM_ATTR_xxx
+ */
+
+/*! \{ */
+
+/*! Symbol is a CAM. */
+#define BCMDRD_SYM_ATTR_CAM                                 (1 << 0)
+
+/*! Symbol is a hashed memory. */
+#define BCMDRD_SYM_ATTR_HASHED                              (1 << 1)
+
+/*! Symbol is not visible in this configuration. */
+#define BCMDRD_SYM_ATTR_HIDDEN                              (1 << 2)
+
+/*! \} */
+
+/*!
+ * \brief Symbol (register/memory) information
+ *
+ * The symbol information is dynamic information about a symbol in the
+ * current device configuraton. In many situations, this information
+ * will be identical to the static symbol information of the base
+ * device.
+ */
+typedef struct {
+
+    /*! Symbol ID (unique per device). */
+    bcmdrd_sid_t sid;
+
+    /*! Symbol name, e.g. "VLANm" or "MISCCONFIGr". */
+    const char *name;
+
+    /*! Mask of block types this symbol is valid for. */
+    uint32_t blktypes;
+
+    /*! Special attributes of this symbol (\ref BCMDRD_SYMBOL_FLAG_xxx). */
+    uint32_t flags;
+
+    /*! Fixed part of symbol address (composition is device-dependent). */
+    uint32_t offset;
+
+    /*! Minimum valid index for array-type symbols. */
+    uint32_t index_min;
+
+    /*! Maximum valid index for array-type symbols. */
+    uint32_t index_max;
+
+    /*! Size of symbol data (or entry if array-type) in 32-bit words. */
+    uint32_t entry_wsize;
+
+    /*! Index address step value for array-type symbols. */
+    uint32_t step_size;
+
+} bcmdrd_sym_info_t;
+
+/*!
+ * \name Symbol field flags.
+ * \anchor BCMDRD_SYMBOL_FIELD_FLAG_xxx
+ */
+
+/*! \{ */
+
+/*! Symbol field is a counter field. */
+#define BCMDRD_SYMBOL_FIELD_FLAG_COUNTER                    (1 << 0)
+
+/*! Symbol field is a key field. */
+#define BCMDRD_SYMBOL_FIELD_FLAG_KEY                        (1 << 1)
+
+/*! Symbol field is a mask field. */
+#define BCMDRD_SYMBOL_FIELD_FLAG_MASK                       (1 << 2)
+
+/*! \} */
+
+/*!
+ * \brief Field information structure.
+ *
+ * This structure defines a single field within a symbol.
+ */
+typedef struct bcmdrd_sym_field_info_s {
+
+    /*! Field name, e.g. "VLANf" or "VALIDf". */
+    const char *name;
+
+    /*! Field ID (unique per device). */
+    int fid;
+
+    /*! Special field ID, which defines how multi-view memories are decoded. */
+    int view;
+
+    /*! Special attributes of this field (\ref BCMDRD_SYMBOL_FIELD_FLAG_xxx). */
+    uint32_t flags;
+
+    /*! First bit of this field. */
+    uint16_t minbit;
+
+    /*! Last bit of this field. */
+    uint16_t maxbit;
+
+} bcmdrd_sym_field_info_t;
+
+#endif /* BCMDRD_SYMBOL_TYPES_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd/bcmdrd_symbols.h b/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd/bcmdrd_symbols.h
new file mode 100644
index 000000000..82c294626
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd/bcmdrd_symbols.h
@@ -0,0 +1,1139 @@
+/*! \file bcmdrd_symbols.h
+ *
+ * Chip symbol table definitions.
+ *
+ */
+/*
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ */
+
+#ifndef BCMDRD_SYMBOLS_H
+#define BCMDRD_SYMBOLS_H
+
+/*******************************************************************************
+ * BCMDRD symbol formats
+ ******************************************************************************/
+
+#include <bcmdrd/bcmdrd_symbol_types.h>
+
+/*******************************************************************************
+ * Resolve compile depedencies for optimized code size reduction.
+ ******************************************************************************/
+
+#if BCMDRD_CONFIG_INCLUDE_CHIP_SYMBOLS == 0
+#undef BCMDRD_CONFIG_INCLUDE_FIELD_INFO
+#define BCMDRD_CONFIG_INCLUDE_FIELD_INFO 0
+#endif
+
+/*!
+ * \name Symbol index information.
+ * \anchor BCMDRD_SYMBOL_INDEX_F_xxx
+ *
+ * In order to maintain a compact symbol table format the entry size
+ * and the minimum/maximum table indexes are encoded into a single
+ * 32-bit word.
+ *
+ * The following flags and macros are used to encode and extract the
+ * above information to/from the 32-bit index word.
+ */
+
+/*! \{ */
+
+/*!
+ * \brief Flag indicating exponential index calculation.
+ *
+ * Used if real maximum cannot be contained within max field.
+ *
+ * Real maximum is encoded as ((1 << min) * max) - 1).
+ *
+ * Real minimum is always zero.
+ *
+ * Example:
+ * (max,min)=(17,12)
+ *  => real max = ((1 << 12) * 17) - 1) = 0x10fff
+ */
+#define BCMDRD_SYMBOL_INDEX_F_EXP  0x1
+
+/*!
+ * \brief Flag indicating variable index maximum.
+ *
+ * Used e.g. if register array size is port-dependent.
+ *
+ * Real maximum and minimum depend on configuration.
+ *
+ * The min value is used as an encoding key which may be passed to a
+ * chip-specific function.
+ */
+#define BCMDRD_SYMBOL_INDEX_F_VAR  0x2
+
+/*!
+ * \brief Flag indicating address step different from 1.
+ *
+ * Used e.g. if address step for a register array is non-standard.
+ *
+ * Real minimum is always zero.
+ *
+ * The min value is interpreted as (address step - 1).
+ *
+ * Example:
+ * (max,min)=(11,3)
+ *  => 12 elements with addr(i+1) = addr(i)+4
+ */
+#define BCMDRD_SYMBOL_INDEX_F_STEP 0x4
+
+/*! Encode entry size into index word. */
+#define BCMDRD_SYMBOL_INDEX_SIZE_ENCODE(s) F32_ENCODE((uint32_t)s, 0, 8)
+
+/*! Extract entry size from index word. */
+#define BCMDRD_SYMBOL_INDEX_SIZE_GET(w) F32_GET(w, 0, 8)
+
+/*! Encode minimum table index into index word. */
+#define BCMDRD_SYMBOL_INDEX_MIN_ENCODE(s) F32_ENCODE((uint32_t)s, 8, 5)
+
+/*! Extract raw minimum table index from index word. */
+#define BCMDRD_SYMBOL_INDEX_MIN_GETRAW(w) F32_GET(w, 8, 5)
+
+/*! Encode maximum table index into index word. */
+#define BCMDRD_SYMBOL_INDEX_MAX_ENCODE(s) F32_ENCODE((uint32_t)s, 13, 16)
+
+/*! Extract raw maximum table index from index word. */
+#define BCMDRD_SYMBOL_INDEX_MAX_GETRAW(w) F32_GET(w, 13, 16)
+
+/*! Encode index flags into index word. */
+#define BCMDRD_SYMBOL_INDEX_FLAGS_ENCODE(s) F32_ENCODE((uint32_t)s, 29, 3)
+
+/*! Extract index flags from index word. */
+#define BCMDRD_SYMBOL_INDEX_FLAGS_GET(w) F32_GET(w, 29, 3)
+
+/*! Get real minimum table index based on raw values and flags. */
+#define BCMDRD_SYMBOL_INDEX_MIN_GET(w) \
+    (BCMDRD_SYMBOL_INDEX_FLAGS_GET(w) ? \
+       0 : \
+       BCMDRD_SYMBOL_INDEX_MIN_GETRAW(w))
+
+/*! Get encoding type from index word. */
+#define BCMDRD_SYMBOL_INDEX_ENC_GET(w) BCMDRD_SYMBOL_INDEX_MIN_GETRAW(w)
+
+/*! Get real maximum table index based on raw values and flags. */
+#define BCMDRD_SYMBOL_INDEX_MAX_GET(w) \
+    ((BCMDRD_SYMBOL_INDEX_FLAGS_GET(w) & BCMDRD_SYMBOL_INDEX_F_EXP) ? \
+       (BCMDRD_SYMBOL_INDEX_MAX_GETRAW(w) * \
+        (1U << BCMDRD_SYMBOL_INDEX_MIN_GETRAW(w))) - 1 : \
+       BCMDRD_SYMBOL_INDEX_MAX_GETRAW(w))
+
+/*! Get per-index address step value. */
+#define BCMDRD_SYMBOL_INDEX_STEP_GET(w) \
+    ((BCMDRD_SYMBOL_INDEX_FLAGS_GET(w) & BCMDRD_SYMBOL_INDEX_F_STEP) ? \
+       (BCMDRD_SYMBOL_INDEX_MIN_GETRAW(w) + 1) : \
+       1)
+
+/*! \} */
+
+/*!
+ * \name Symbol field encode information.
+ *
+ * Symbol field information is encoded in variable size. The supported formats
+ * are depicted in the following tables:
+ *
+ * - Single Word Field Format
+ * | Bits  | Name      | Description                                 |
+ * | :---: | --------- | ------------------------------------------- |
+ * | 31:31 | LastField | Indicates this is the last field descriptor word in a field array. |
+ * | 30:30 | Ext       | Indicates that this is the first word in a Double Word Field, not a Single Word Field.<br>This word and the next form a Double Word Field. |
+ * | 29:29 | Ext2      | Indicates that this field is visible only in certain memory views.<br>This word and the next two form a Triple Word Field. |
+ * | 28:15 | FieldId   | This is the unique field id for this field. |
+ * | 14:7  | Minbit    | This is the field's minbit.                 |
+ * | 6:0   | Width     | This is the field's width (in bits).        |
+ * <br>
+ *
+ * - Double Word Field Format
+ * | Word | Bits  | Name      | Description                                 |
+ * | :--: | :---: | --------- | ------------------------------------------- |
+ * | 0    | 31:31 | LastField | Indicates this is the last field descriptor word in a field array. |
+ * | 0    | 30:30 | Ext       | Indicates this is the start of a Double Word field. |
+ * | 0    | 29:29 | Ext2      | Must be zero for Double Word fields.        |
+ * | 0    | 28:28 | Cnt       | Indicates that field is a counter.          |
+ * | 0    | 27:27 | Key       | Indicates that field is a key.              |
+ * | 0    | 26:26 | Mask      | Indicates that field is a mask.             |
+ * | 0    | 25:24 | Rsvd      | Reserved for future field attributes.       |
+ * | 0    | 23:0  | FieldId   | This is the unique field id for this field. |
+ * | 1    | 31:16 | Minbit    | This is the field's minbit.                 |
+ * | 1    | 15:0  | Width     | This is the field's width (in bits).        |
+ * <br>
+ *
+ * - Triple Word Field Format
+ * | Word | Bits  | Name      | Description                                 |
+ * | :--: | :---: | --------- | ------------------------------------------- |
+ * | 0    | 31:31 | LastField | Indicates this is the last field descriptor word in a field array. |
+ * | 0    | 30:30 | Ext       | Must be zero for Triple Word fields.        |
+ * | 0    | 29:29 | Ext2      | Indicates that this word and the next two form a Triple Word Field. |
+ * | 0    | 28:28 | Cnt       | Indicates that field is a counter.          |
+ * | 0    | 27:27 | Key       | Indicates that field is a key.              |
+ * | 0    | 26:26 | Mask      | Indicates that field is a mask.             |
+ * | 0    | 25:24 | Rsvd      | Reserved for future field attributes.       |
+ * | 0    | 23:0  | FieldId   | This is the unique field id for this field. |
+ * | 1    | 31:16 | Minbit    | This is the field's minbit.                 |
+ * | 1    | 15:0  | Width     | This is the field's width (in bits).        |
+ * | 2    | 23:0  | ViewId    | This is the unique field view id for this field. |
+ * <br>
+ */
+
+/*! \{ */
+
+/*! Indicates last field descriptor word in a field array. */
+#define BCMDRD_SYM_FIELD_FLAG_LAST      (1U << 31)
+
+/*! Indicates double-word field descriptor. */
+#define BCMDRD_SYM_FIELD_FLAG_EXT       (1U << 30)
+
+/*! Indicates triple-word field descriptor. */
+#define BCMDRD_SYM_FIELD_FLAG_EXT2      (1U << 29)
+
+/*! Indicates counter attribute in a field */
+#define BCMDRD_SYM_FIELD_ATTR_COUNTER   (1U << 28)
+
+/*! Indicates key attribute in a field */
+#define BCMDRD_SYM_FIELD_ATTR_KEY       (1U << 27)
+
+/*! Indicates mask attribute in a field */
+#define BCMDRD_SYM_FIELD_ATTR_MASK      (1U << 26)
+
+/*! Test field descriptor word for \ref BCMDRD_SYM_FIELD_FLAG_LAST. */
+#define BCMDRD_SYM_FIELD_LAST(w) ((w) & BCMDRD_SYM_FIELD_FLAG_LAST)
+
+/*! Test field descriptor word for \ref BCMDRD_SYM_FIELD_FLAG_EXT. */
+#define BCMDRD_SYM_FIELD_EXT(w) ((w) & BCMDRD_SYM_FIELD_FLAG_EXT)
+
+/*! Test field descriptor word for \ref BCMDRD_SYM_FIELD_FLAG_EXT2. */
+#define BCMDRD_SYM_FIELD_EXT2(w) ((w) & BCMDRD_SYM_FIELD_FLAG_EXT2)
+
+
+/*! Encode field ID into a single-word field descriptor. */
+#define BCMDRD_SYM_FIELD_ID_ENCODE(id) F32_ENCODE(id, 15, 14)
+
+/*! Encode field start-bit into a single-word field descriptor. */
+#define BCMDRD_SYM_FIELD_MIN_ENCODE(b) F32_ENCODE(b, 7, 8)
+
+/*! Encode field size into a single-word field descriptor. */
+#define BCMDRD_SYM_FIELD_WIDTH_ENCODE(b) F32_ENCODE(b, 0, 7)
+
+/*! Extract field ID from a single-word field descriptor. */
+#define BCMDRD_SYM_FIELD_ID_GET(w) F32_GET(w, 15, 14)
+
+/*! Extract field start-bit from a single-word field descriptor. */
+#define BCMDRD_SYM_FIELD_MIN_GET(w) F32_GET(w, 7, 8)
+
+/*! Extract field size from a single-word field descriptor. */
+#define BCMDRD_SYM_FIELD_WIDTH_GET(w) F32_GET(w, 0, 7)
+
+/*! Encode field information into a single-word field descriptor. */
+#define BCMDRD_SYM_FIELD_ENCODE(id, min, width)                         \
+    (BCMDRD_SYM_FIELD_ID_ENCODE(id) |                                   \
+     BCMDRD_SYM_FIELD_MIN_ENCODE(min) |                                 \
+     BCMDRD_SYM_FIELD_WIDTH_ENCODE(width))
+
+/*! Encode field ID into a double-word field descriptor. */
+#define BCMDRD_SYM_FIELD_EXT_ID_ENCODE(id) F32_ENCODE(id, 0, 24)
+
+/*! Encode field start-bit into a double-word field descriptor. */
+#define BCMDRD_SYM_FIELD_EXT_MIN_ENCODE(b) F32_ENCODE(b, 16, 16)
+
+/*! Encode field size into a double-word field descriptor. */
+#define BCMDRD_SYM_FIELD_EXT_WIDTH_ENCODE(b) F32_ENCODE(b, 0, 16)
+
+/*! Extract field ID from a double-word field descriptor. */
+#define BCMDRD_SYM_FIELD_EXT_ID_GET(w) F32_GET(w, 0, 24)
+
+/*! Extract field start-bit from a double-word field descriptor. */
+#define BCMDRD_SYM_FIELD_EXT_MIN_GET(w) F32_GET((&(w))[1], 16, 16)
+
+/*! Extract field size from a double-word field descriptor. */
+#define BCMDRD_SYM_FIELD_EXT_WIDTH_GET(w) F32_GET((&(w))[1], 0, 16)
+
+/*! Encode field information into a double-word field descriptor. */
+#define BCMDRD_SYM_FIELD_EXT_ENCODE(id, min, width)                     \
+    (BCMDRD_SYM_FIELD_FLAG_EXT | BCMDRD_SYM_FIELD_EXT_ID_ENCODE(id)),   \
+        (BCMDRD_SYM_FIELD_EXT_MIN_ENCODE(min) |                         \
+         BCMDRD_SYM_FIELD_EXT_WIDTH_ENCODE(width))
+
+/*!
+ * Test field attribute for \ref BCMDRD_SYM_FIELD_ATTR_COUNTER
+ * in double-word field descriptor.
+ */
+#define BCMDRD_SYM_FIELD_EXT_ATTR_IS_COUNTER(w)                         \
+    ((w) & BCMDRD_SYM_FIELD_ATTR_COUNTER)
+
+/*!
+ * Test field attribute for \ref BCMDRD_SYM_FIELD_ATTR_KEY
+ * in double-word field descriptor.
+ */
+#define BCMDRD_SYM_FIELD_EXT_ATTR_IS_KEY(w)                             \
+    ((w) & BCMDRD_SYM_FIELD_ATTR_KEY)
+
+/*!
+ * Test field attribute for \ref BCMDRD_SYM_FIELD_ATTR_MASK
+ * in double-word field descriptor.
+ */
+#define BCMDRD_SYM_FIELD_EXT_ATTR_IS_MASK(w)                            \
+    ((w) & BCMDRD_SYM_FIELD_ATTR_MASK)
+
+
+/*! Encode field ID into a triple-word field descriptor. */
+#define BCMDRD_SYM_FIELD_EXT2_ID_ENCODE(id) F32_ENCODE(id, 0, 24)
+
+/*! Encode field start-bit into a triple-word field descriptor. */
+#define BCMDRD_SYM_FIELD_EXT2_MIN_ENCODE(b) F32_ENCODE(b, 16, 16)
+
+/*! Encode field size into a triple-word field descriptor. */
+#define BCMDRD_SYM_FIELD_EXT2_WIDTH_ENCODE(b) F32_ENCODE(b, 0, 16)
+
+/*! Encode field view ID into a triple-word field descriptor. */
+#define BCMDRD_SYM_FIELD_EXT2_VIEW_ENCODE(b) F32_ENCODE(b, 0, 24)
+
+/*! Extract field ID from a triple-word field descriptor. */
+#define BCMDRD_SYM_FIELD_EXT2_ID_GET(w) F32_GET(w, 0, 24)
+
+/*! Extract field start-bit from a triple-word field descriptor. */
+#define BCMDRD_SYM_FIELD_EXT2_MIN_GET(w) F32_GET((&(w))[1], 16, 16)
+
+/*! Extract field width from a triple-word field descriptor. */
+#define BCMDRD_SYM_FIELD_EXT2_WIDTH_GET(w) F32_GET((&(w))[1], 0, 16)
+
+/*! Extract field view ID from a triple-word field descriptor. */
+#define BCMDRD_SYM_FIELD_EXT2_VIEW_GET(w) F32_GET((&(w))[2], 0, 24)
+
+/*! Encode field information into a triple-word field descriptor. */
+#define BCMDRD_SYM_FIELD_EXT2_ENCODE(id, min, width, view)              \
+    (BCMDRD_SYM_FIELD_FLAG_EXT2 | BCMDRD_SYM_FIELD_EXT2_ID_ENCODE(id)), \
+        (BCMDRD_SYM_FIELD_EXT2_MIN_ENCODE(min) |                        \
+         BCMDRD_SYM_FIELD_EXT2_WIDTH_ENCODE(width)),                    \
+        BCMDRD_SYM_FIELD_EXT2_VIEW_ENCODE(view)
+
+/*!
+ * Test field attribute for \ref BCMDRD_SYM_FIELD_ATTR_COUNTER
+ * in triple-word field descriptor.
+ */
+#define BCMDRD_SYM_FIELD_EXT2_ATTR_IS_COUNTER(w)                        \
+    ((w) & BCMDRD_SYM_FIELD_ATTR_COUNTER)
+
+/*!
+ * Test field attribute for \ref BCMDRD_SYM_FIELD_ATTR_KEY
+ * in triple-word field descriptor.
+ */
+#define BCMDRD_SYM_FIELD_EXT2_ATTR_IS_KEY(w)                            \
+    ((w) & BCMDRD_SYM_FIELD_ATTR_KEY)
+
+/*!
+ * Test field attribute for \ref BCMDRD_SYM_FIELD_ATTR_MASK
+ * in triple-word field descriptor.
+ */
+#define BCMDRD_SYM_FIELD_EXT2_ATTR_IS_MASK(w)                           \
+    ((w) & BCMDRD_SYM_FIELD_ATTR_MASK)
+
+/*! \} */
+
+
+/*!
+ * \brief Iterate over all fields for a symbol.
+ *
+ * Given a pointer to a field descriptor word array, this macro will
+ * fill out the \ref bcmdrd_sym_field_info_t structure for each field
+ * in the field descriptor word array.
+ *
+ * If a list of corresponding fieln names is given, the field
+ * information will include the symbolic field name.
+ *
+ * The macro must be terminated with \ref BCMDRD_SYM_FIELDS_ITER_END.
+ */
+#define BCMDRD_SYM_FIELDS_ITER_BEGIN(start, finfo, fnames) {   \
+    uint32_t *_fp = start;                                     \
+    for (;;) {                                                 \
+        if (!_fp) {                                            \
+            break;                                             \
+        } else {                                               \
+            _fp = bcmdrd_sym_field_info_decode(_fp, (fnames), &(finfo));
+
+/*! Refer to \ref BCMDRD_SYM_FIELDS_ITER_BEGIN. */
+#define BCMDRD_SYM_FIELDS_ITER_END() }}}
+
+/*!
+ * Symbol information structure (single symbol).
+ */
+typedef struct bcmdrd_symbol_s {
+
+    /*! Base offset (fixed address information). */
+    uint32_t addr;
+
+    /*! Encoded information about valid indexes for arrays. */
+    uint32_t index;
+
+    /*! Symbol flags (\ref BCMDRD_SYMBOL_FLAG_xxx). */
+    uint32_t flags;
+
+    /*!
+     * Device-specific information.
+     * | Bits  | Name              | Description                              |
+     * | :---: | ----------------- | ---------------------------------------- |
+     * | 31:24 | HMI-specific data | This is 8-bit symbol HMI-specific data.  |
+     * | 23:21 | Sub-pipe instance | Sub-pipe association (if any).           |
+     * | 20:14 | Access type       | This is the symbol access type.          |
+     * | 13:7  | Block type 1      | The 2nd symbol block type (> 0 if any).  |
+     * |  6:0  | Block type 0      | The 1st symbol block type (> 0 always).  |
+     */
+    uint32_t info;
+
+    /*! Profile information for default value, SER information, etc. */
+    uint32_t pfinfo;
+
+#if BCMDRD_CONFIG_INCLUDE_FIELD_INFO == 1
+    /*! Pointer to field information data. */
+    uint32_t *fields;
+#endif
+
+    /*! Symbol name. */
+    const char *name;
+
+#if BCMDRD_CONFIG_INCLUDE_ALIAS_NAMES == 1
+    /*!
+     * Alternative symbol name (typically used if hardware and
+     * software names differ).
+     */
+    const char *alias;
+
+    /*!
+     * User-fiendly symbol name (typically a shorter a more meaningful
+     * name).
+     */
+    const char *ufname;
+#endif
+
+} bcmdrd_symbol_t;
+
+/*! Maximum block types encoded in the symbol device-specific information. */
+#define BCMDRD_SYM_INFO_MAX_BLKTYPES 2
+
+/*! Bit number of the encoded block type. */
+#define BCMDRD_SYM_INFO_BLKTYPE_BITS 7
+
+/*! Bit mask of the encoded block type. */
+#define BCMDRD_SYM_INFO_BLKTYPE_MASK ((1U << BCMDRD_SYM_INFO_BLKTYPE_BITS) - 1)
+
+/*! Bit mask of all the encoded block types. */
+#define BCMDRD_SYM_INFO_BLKTYPES_MASK \
+    ((1U << (BCMDRD_SYM_INFO_MAX_BLKTYPES * BCMDRD_SYM_INFO_BLKTYPE_BITS)) - 1)
+
+/*! Extract block types from symbol device-specific information. */
+#define BCMDRD_SYM_INFO_BLKTYPES(_w) ((_w) & BCMDRD_SYM_INFO_BLKTYPES_MASK)
+
+/*! Bit number of the encoded access type. */
+#define BCMDRD_SYM_INFO_ACCTYPE_SHIFT \
+    (BCMDRD_SYM_INFO_MAX_BLKTYPES * BCMDRD_SYM_INFO_BLKTYPE_BITS)
+
+/*! Bit number of the encoded access type. */
+#define BCMDRD_SYM_INFO_ACCTYPE_BITS 7
+
+/*! Bit mask of the encoded access type. */
+#define BCMDRD_SYM_INFO_ACCTYPE_MASK ((1U << BCMDRD_SYM_INFO_ACCTYPE_BITS) - 1)
+
+/*! Extract access type from symbol device-specific information. */
+#define BCMDRD_SYM_INFO_ACCTYPE(_w) \
+    (((_w) >> BCMDRD_SYM_INFO_ACCTYPE_SHIFT) & BCMDRD_SYM_INFO_ACCTYPE_MASK)
+
+/*! Bit number of the encoded sub-pipe instance. */
+#define BCMDRD_SYM_INFO_SUBPIPE_INST_BITS 3
+
+/*! Bit mask of the encoded sub-pipe instance. */
+#define BCMDRD_SYM_INFO_SUBPIPE_INST_MASK \
+    ((1U << BCMDRD_SYM_INFO_SUBPIPE_INST_BITS) - 1)
+
+/*! Extract sub-pipe instance from symbol device-specific information. */
+#define BCMDRD_SYM_INFO_SUBPIPE_INST(_w) \
+    (((_w) >> 21) & BCMDRD_SYM_INFO_SUBPIPE_INST_MASK)
+
+/*! Extract block type by index from symbol device-specific information. */
+#define BCMDRD_SYM_INFO_BLKTYPE(_w, _i) \
+    ((BCMDRD_SYM_INFO_BLKTYPES(_w) >> \
+     (BCMDRD_SYM_INFO_BLKTYPE_BITS * (_i))) & BCMDRD_SYM_INFO_BLKTYPE_MASK)
+
+/*!
+ * \name Symbol profile information.
+ */
+
+/*! \{ */
+
+/*! Set profile offset for memory symbol. */
+#define BCMDRD_SYM_MEMPF_OFFSET_SET(_p) F32_ENCODE((_p), 0, 12)
+
+/*! Get profile offset for memory. */
+#define BCMDRD_SYM_MEMPF_OFFSET_GET(_pi) F32_GET((_pi), 0, 12)
+
+/*! Set profile offset for register. */
+#define BCMDRD_SYM_REGPF_OFFSET_SET(_p) F32_ENCODE((_p), 0, 12)
+
+/*! Get profile offset for register. */
+#define BCMDRD_SYM_REGPF_OFFSET_GET(_pi) F32_GET((_pi), 0, 12)
+
+/*! Set profile offset for MOR of symbol. */
+#define BCMDRD_SYM_MORPF_OFFSET_SET(_p) F32_ENCODE((_p), 12, 8)
+
+/*! Get profile offset for MOR of symbol. */
+#define BCMDRD_SYM_MORPF_OFFSET_GET(_pi) F32_GET((_pi), 12, 8)
+
+/*! Set profile offset for error correction information of symbol. */
+#define BCMDRD_SYM_ECCPF_OFFSET_SET(_p) F32_ENCODE((_p), 20, 12)
+
+/*! Get profile offset for error correction information of symbol. */
+#define BCMDRD_SYM_ECCPF_OFFSET_GET(_pi) F32_GET((_pi), 20, 12)
+
+/*! \} */
+
+
+/*!
+ * \brief Memory comparison function.
+ *
+ * \param [in] ent_a Element a of memory to be compared.
+ * \param [in] ent_b Element b of memory to be compared.
+ *
+ * \return 0 if two memory elements equal, otherwise unequal.
+ */
+typedef int (*bcmdrd_sym_mem_cmp_f)(void *ent_a, void *ent_b);
+
+/*!
+ * Memory profile structure.
+ */
+typedef struct bcmdrd_sym_mem_profile_s {
+
+    /*! Memory comparison function. */
+    bcmdrd_sym_mem_cmp_f cmp_fn;
+
+    /*! Null entry data array. */
+    const void *null_ent;
+
+} bcmdrd_sym_mem_profile_t;
+
+/*!
+ * MOR profile structure.
+ */
+typedef struct bcmdrd_sym_mor_profile_s {
+
+    /*! MOR read. */
+    uint32_t mrd;
+
+    /*! MOR write. */
+    uint32_t mwr;
+
+} bcmdrd_sym_mor_profile_t;
+
+/*!
+ * Symbols table structure (all symbols).
+ */
+typedef struct bcmdrd_symbols_s {
+
+    /*! List of all symbols used by this device. */
+    const bcmdrd_symbol_t *symbols;
+
+    /*! Number of entries in symbols array. */
+    const uint32_t size;
+
+    /*! Number of entries in each symbols array section. */
+    const uint32_t sect_size[2];
+
+    /*! List of all field names used by this device. */
+    const char **field_names;
+
+    /*! List of all reset values/masks used by this device. */
+    const uint32_t *reg_profiles;
+
+    /*! List of all memory profiles used by this device. */
+    const bcmdrd_sym_mem_profile_t *mem_profiles;
+
+    /*! List of all MOR profiles used by this device. */
+    const bcmdrd_sym_mor_profile_t *mor_profiles;
+
+    /*! SER data used by this device. */
+    const void *ser_data;
+
+#if BCMDRD_CONFIG_INCLUDE_ALIAS_NAMES == 1
+    /*! List of all symbols alias names used in this device. */
+    const bcmdrd_enum_map_t *alias_names;
+
+    /*! Number of entries in symbols alias names array */
+    const uint32_t alias_names_size;
+#endif
+
+    /*! Symbols are sorted and searchable by bsearch. */
+    const bool sorted;
+
+} bcmdrd_symbols_t;
+
+
+/*!
+ * \brief Search a symbol array.
+ *
+ * Search symbol array by comparing input name to each symbol name.
+ *
+ * This function is primarily intended for internal use, and should
+ * normally not be called directly.
+ *
+ * \param [in] name Symbol name to search for.
+ * \param [in] table Array of symbol structures.
+ * \param [in] size Size of symbol array.
+ * \param [out] sid Symbol ID if match is found.
+ *
+ * \retval Pointer to symbol structure, or NULL if not found.
+ */
+extern const bcmdrd_symbol_t *
+bcmdrd_symbol_find(const char *name,
+                   const bcmdrd_symbol_t *table, uint32_t size,
+                   bcmdrd_sid_t *sid);
+
+/*!
+ * \brief Binary search a symbol table.
+ *
+ * Binary search a symbol table from symbol names or alternative names.
+ * The symbol table should be sorted properly for the binary search support.
+ *
+ * This function is primarily intended for internal use, and should
+ * normally not be called directly.
+ *
+ * \param [in] name Symbol name to look for.
+ * \param [in] symbols Symbol table structure.
+ * \param [out] sid Symbol ID if match is found.
+ *
+ * \retval Pointer to symbol structure, or NULL if not found.
+ */
+const bcmdrd_symbol_t *
+bcmdrd_symbols_fast_find(const char *name, const bcmdrd_symbols_t *symbols,
+                         bcmdrd_sid_t *sid);
+
+/*!
+ * \brief Search a symbol table.
+ *
+ * Primary symbol search function. Takes a pointer to the symbols
+ * structure, finds the name in either one, and returns a full symbol
+ * structure.
+ *
+ * \param [in] name Symbol name to look for.
+ * \param [in] symbols Symbol table structure.
+ * \param [out] sid Symbol ID if match is found.
+ *
+ * \retval Pointer to symbol structure, or NULL if not found.
+ */
+extern const bcmdrd_symbol_t *
+bcmdrd_symbols_find(const char *name, const bcmdrd_symbols_t *symbols,
+                    bcmdrd_sid_t *sid);
+
+/*!
+ * \brief Get a specific symbol by index.
+ *
+ * \param [in] symbols - Symbols information structure for device.
+ * \param [in] sindex - Symbol index (usually same as symbol ID).
+ * \param [out] rsym - Symbol information structure to fill.
+ *
+ * \retval 0 No errors, or -1 if not found
+ */
+extern int
+bcmdrd_symbols_get(const bcmdrd_symbols_t *symbols, uint32_t sindex,
+                   bcmdrd_symbol_t *rsym);
+
+/*!
+ * \brief Get index of a specific symbol.
+ *
+ * \param [in] symbols - Symbols information structure for device.
+ * \param [in] symbol - Specific symbol structure.
+ *
+ * \retval Symbol index, or -1 if not found
+ */
+extern int
+bcmdrd_symbols_index(const bcmdrd_symbols_t *symbols,
+                     const bcmdrd_symbol_t *symbol);
+
+/*!
+ * \brief Get symbol information.
+ *
+ * Retrieve dynamic symbol information for register/memory.
+ *
+ * \param [in] symbols - Symbols information structure for device.
+ * \param [in] sid Device-specific symbol ID
+ * \param [out] sinfo Symbol information structure to fill if not NULL
+ *
+ * \retval Raw symbol structure, or NULL if not found.
+ */
+extern const bcmdrd_symbol_t *
+bcmdrd_sym_info_get(const bcmdrd_symbols_t *symbols, bcmdrd_sid_t sid,
+                    bcmdrd_sym_info_t *sinfo);
+
+/*!
+ * \name Symbol matching modes.
+ * \anchor BCMDRD_SYMBOLS_ITER_MODE_xxx
+ */
+
+/*! \{ */
+
+/*! Symbol table iterator must match exact symbol name. */
+#define BCMDRD_SYMBOLS_ITER_MODE_EXACT     0
+
+/*! Symbol table iterator must match beginning of symbol name. */
+#define BCMDRD_SYMBOLS_ITER_MODE_START     1
+
+/*! Symbol table iterator must match any sub-string in symbol name. */
+#define BCMDRD_SYMBOLS_ITER_MODE_STRSTR    2
+
+/*! \} */
+
+/*!
+ * \brief Symbols iteration call-back function.
+ *
+ * \param [in] symbol Symbol structure (single symbol).
+ * \param [in] sid Symbol ID.
+ * \param [in] vptr Caller-provided context.
+ *
+ * \retval 0 on success, -1 on failure.
+ */
+typedef int (*bcmdrd_symbols_iter_cb_f)(const bcmdrd_symbol_t *symbol,
+                                        bcmdrd_sid_t sid,
+                                        void *vptr);
+
+/*!
+ * \brief Symbol table iterator control structure.
+ *
+ * This structure contains symbol matching information and call-back
+ * function information for the symbol table iterator function.
+ */
+typedef struct bcmdrd_symbols_iter_s {
+
+    /*! String to match against each symbol. */
+    const char *name;
+
+    /*! Defines valid matches (\ref BCMDRD_SYMBOLS_ITER_MODE_xxx) */
+    int matching_mode;
+
+    /*! Symbol flags that must be present. */
+    uint32_t pflags;
+
+    /*! Symbol flags that must be absent. */
+    uint32_t aflags;
+
+    /*!
+     * Block types that must be present.
+     * List of block types terminated by -1 if not NULL.
+     */
+    int *pblktypes;
+
+    /*!
+     * Block types that must be absent.
+     * List of block types terminated by -1 if not NULL.
+     */
+    int *ablktypes;
+
+    /*!
+     * Access types that must be present.
+     * List of access types terminated by -1 if not NULL.
+     */
+    int *pacctypes;
+
+    /*!
+     * Access types that must be absent.
+     * List of access types terminated by -1 if not NULL.
+     */
+    int *aacctypes;
+
+    /*! Symbols information structure for device. */
+    const bcmdrd_symbols_t *symbols;
+
+    /*! Function to be called for each matching symbol. */
+    bcmdrd_symbols_iter_cb_f function;
+
+    /*! Context for call-back function. */
+    void *vptr;
+
+} bcmdrd_symbols_iter_t;
+
+/*!
+ * \brief Field filtering call-back function.
+ *
+ * This function will indicate whether a particular field should be
+ * filtered out for the current memory view.
+ *
+ * The field-view encoding string has the following syntax:
+ *
+ *   {[\<keysrc\>]:\<keyfield\>:\<keyval\>[|\<keyval\> ... ]}
+ *
+ * Ideally the keysrc is the same data entry which is
+ * being decoded, and in this case it can left out, e.g.:
+ *
+ *   {:KEY_TYPEf:1}
+ *
+ * This example encoding means that if KEY_TYPEf=1, then
+ * this field is valid for this view.
+ *
+ * Note that a field can be for multiple views, e.g.:
+ *
+ *   {:KEY_TYPEf:1|3}
+ *
+ * This example encoding means that this field is valid
+ * if KEY_TYPEf=1 or KEY_TYPEf=3.
+ *
+ * The special \<keyval\>=-1 means that this field is valid
+ * even if there is no context (cookie=NULL).
+ *
+ * \param [in] symbol Symbol structure (single symbol).
+ * \param [in] fnames List of all field names for this unit.
+ * \param [in] encoding Field-view encoding string.
+ * \param [in] cookie Caller-provided context.
+ *
+ * \retval true if field should be filtered out, otherwise false.
+ */
+typedef int (*bcmdrd_symbol_filter_cb_f)(const bcmdrd_symbol_t *symbol,
+                                         const char **fnames,
+                                         const char *encoding,
+                                         void *cookie);
+
+/*!
+ * \brief Customized symbol filtering call-back function.
+ *
+ * This function will indicate whether a particular name with
+ * with extra flags information should be filtered out.
+ *
+ * \param [in] symbol Symbol structure (single symbol).
+ * \param [in] name Name of the identifier.
+ * \param [in] flags Flags carried with the identifier.
+ * \param [in] data Table entry data to process.
+ * \param [in] cookie Caller-provided context.
+ *
+ * \retval true if field should be filtered out, otherwise false.
+ */
+typedef int (*bcmdrd_symbol_custom_filter_cb_f)(const bcmdrd_symbol_t *symbol,
+                                                const char *name,
+                                                uint32_t flags,
+                                                uint32_t *data,
+                                                void *cookie);
+
+/*!
+ * \brief Iterate over all symbols in a symbol table.
+ *
+ * Search symbol table and call a user-defined function for each
+ * matched symbol. Useful if multiple partial matches may occur.
+ *
+ * Iteration will stop if the call-back function returns a non-zero
+ * value.
+ *
+ * \param [in] iter Iterator control structure (see \ref
+ *                  bcmdrd_symbols_iter_t).
+ *
+ * \retval 0 No errors, otherwise call-back function return value.
+ */
+extern int
+bcmdrd_symbols_iter(bcmdrd_symbols_iter_t *iter);
+
+/*!
+ * \brief Default field-view filtering function.
+ *
+ * See \ref bcmdrd_symbol_filter_cb_f for a detailed description.
+ *
+ * \param [in] symbol Symbol structure (single symbol).
+ * \param [in] fnames List of all field names for this unit.
+ * \param [in] encoding Field-view encoding string.
+ * \param [in] cookie Caller-provided context.
+ *
+ * \retval true if field should be filtered out, otherwise false.
+ */
+extern int
+bcmdrd_symbol_field_filter(const bcmdrd_symbol_t *symbol,
+                           const char **fnames,
+                           const char *encoding,
+                           void *cookie);
+
+/*!
+ * \brief Get list of fields IDs for given symbol ID.
+ *
+ * The function will always return the total number of valid field IDs
+ * in num_fid, irrespective of the value of list_max, i.e. if num_fid
+ * is greater than list_max, then the returned fid_list was truncated.
+ *
+ * For example, if list_max is zero, then the number of valid field
+ * IDs is returned in num_fid, but the fid_list is not updated (can be
+ * specified as NULL). The returned num_fid can then be used to
+ * allocate a sufficiently large fid_list array.
+ *
+ * \param [in] symbols - Symbols information structure for device.
+ * \param [in] sid Device-specific symbol ID
+ * \param [in] list_max Maximum number of entries in field ID list
+ * \param [out] fid_list Field ID list
+ * \param [out] num_fid Total number of field IDs for this symbold ID
+ *
+ * \retval 0 No errors
+ */
+int
+bcmdrd_sym_fid_list_get(const bcmdrd_symbols_t *symbols,
+                        bcmdrd_sid_t sid, size_t list_max,
+                        bcmdrd_fid_t *fid_list, size_t *num_fid);
+
+/*!
+ * \brief Get field information for register/memory field.
+ *
+ * Obtain field information (name, start bit, end bit, etc.) for
+ * specified symbol ID and field ID.
+ *
+ * \param [in] symbols - Symbols information structure for device.
+ * \param [in] sid Device-specific symbol ID
+ * \param [in] fid Device-specific field ID
+ * \param [out] finfo Field information structure to fill
+ *
+ * \retval Pointer to symbol entry, or NULL if not found
+ */
+extern const bcmdrd_symbol_t *
+bcmdrd_sym_field_info_get(const bcmdrd_symbols_t *symbols,
+                          bcmdrd_sid_t sid, bcmdrd_fid_t fid,
+                          bcmdrd_sym_field_info_t *finfo);
+
+/*!
+ * \brief Get field information for register/memory field.
+ *
+ * Obtain field information (name, start bit, end bit, etc.) for
+ * specified symbol ID and field name.
+ *
+ * \param [in] symbols - Symbols information structure for device.
+ * \param [in] sid Device-specific symbol ID
+ * \param [in] fname Field name (ASCII string)
+ * \param [out] finfo Field information structure to fill
+ *
+ * \return Pointer to symbol entry, or NULL if not found.
+ */
+extern const bcmdrd_symbol_t *
+bcmdrd_sym_field_info_get_by_name(const bcmdrd_symbols_t *symbols,
+                                  bcmdrd_sid_t sid, const char *fname,
+                                  bcmdrd_sym_field_info_t *finfo);
+
+/*!
+ * \brief Decode raw field information.
+ *
+ * This function decodes raw field information as encoded in the
+ * symbol table.
+ *
+ * FOR INTERNAL USE ONLY.
+ *
+ * \param [in] fp Pointer to raw field encoding
+ * \param [in] fnames Device-specfic list of all field names
+ * \param [out] finfo Field information structure
+ *
+ * \return Pointer to the next field encoding, or NULL if end of list.
+ */
+extern uint32_t *
+bcmdrd_sym_field_info_decode(uint32_t *fp, const char **fnames,
+                             bcmdrd_sym_field_info_t *finfo);
+
+/*!
+ * \brief Return the number of fields in a register/memory entry.
+ *
+ * FOR INTERNAL USE ONLY.
+ *
+ * \param [in] fp Pointer to raw field encoding
+ *
+ * \return Number of fields in this register/memory entry.
+ */
+extern uint32_t
+bcmdrd_sym_field_info_count(uint32_t *fp);
+
+/*!
+ * \brief Common memory comparison function.
+ *
+ * \param [in] ent_a Element a of memory to be compared.
+ * \param [in] ent_b Element b of memory to be compared.
+ *
+ * \return 0 if two memory elements equal, otherwise unequal.
+ */
+extern int
+bcmdrd_sym_mem_cmp_undef(void *ent_a, void *ent_b);
+
+/*!
+ * \brief Memory comparison function with inverted mask.
+ *
+ * This function will compare only the specified mask bits in
+ * memory \c ent_a and \c ent_b. The memory mask will be specified
+ * in an inverted bit mask by \c imask. For example, if bits 0~3 are
+ * intended to be compared in a 32-bit entry, the contents of \c imask
+ * would be 0xfffffff0.
+ *
+ * \param [in] ent_a Memory entry a to be compared.
+ * \param [in] ent_b Memory entry b to be compared.
+ * \param [in] imask Invert mask of Memory entry to be masked with memory entry.
+ * \param [in] size Compared memory entry size in byte.
+ *
+ * \return 0 if two values equal, -1 if ent_a < ent_b, and 1 if ent_a > ent_b.
+ */
+extern int
+bcmdrd_sym_mem_cmp_imask(void *ent_a, void *ent_b, void *imask, int size);
+
+/*!
+ * \brief Memory comparison function with mask.
+ *
+ * This function will compare only the specified mask bits in
+ * memory \c ent_a and \c ent_b. The memory mask will be specified in an
+ * bit mask by \c mask. For example, if bits 0~3 are intended to be compared
+ * in a 32-bit entry, the contents of \c mask would be 0x0000000f.
+ *
+ * \param [in] ent_a Memory entry a to be compared.
+ * \param [in] ent_b Memory entry b to be compared.
+ * \param [in] mask Mask of Memory entry to be masked with memory entry.
+ * \param [in] size Compared memory entry size in byte.
+ *
+ * \return 0 if two values equal, -1 if ent_a < ent_b, and 1 if ent_a > ent_b.
+ */
+extern int
+bcmdrd_sym_mem_cmp_mask(void *ent_a, void *ent_b, void *mask, int size);
+
+/*!
+  * Memory element value comparison macro.
+  * The macro will not return only if the comparing values a and b
+  * are equal.
+  */
+#define BCMDRD_SYM_MEM_VAL_CMP_RETURN(_a, _b) { \
+    if ((_a) < (_b)) {                          \
+        return -1;                              \
+    }                                           \
+    if ((_a) > (_b)) {                          \
+        return  1;                              \
+    }                                           \
+}
+
+/*!
+ * \brief Get comparison function of a specified memory symbol.
+ *
+ * The comparison function is stored in \c profile of \ref bcmdrd_symbol_t.
+ * And \ref bcmdrd_sym_mem_profile_t is used for profile structure of
+ * memory symbols. The function is mainly to retrieve the memory
+ * comparison function pre-defined for memory symbols.
+ *
+ * \param [in] symbols Symbol table structure.
+ * \param [in] symbol Symbol structure.
+ *
+ * \return Memory comparison function.  NULL on failure or
+ *            no comparison function is specified.
+ */
+extern bcmdrd_sym_mem_cmp_f
+bcmdrd_sym_mem_cmp_fun_get(const bcmdrd_symbols_t *symbols,
+                           const bcmdrd_symbol_t *symbol);
+
+/*!
+ * \brief Get null entry of a specified memory symbol.
+ *
+ * The memory null entry is stored in \c profile of \ref bcmdrd_symbol_t.
+ * And \ref bcmdrd_sym_mem_profile_t is used for profile structure of
+ * memory symbols. The function is mainly to retrieve the null-entry
+ * pre-defined for memory symbols.
+ *
+ * \param [in] symbols Symbol table structure.
+ * \param [in] symbol Symbol structure.
+ *
+ * \return Memory null entry pointer. NULL on failure or
+ *            no null entry is specified.
+ */
+extern const void *
+bcmdrd_sym_mem_null_ent_get(const bcmdrd_symbols_t *symbols,
+                            const bcmdrd_symbol_t *symbol);
+
+/*!
+ * \brief Get reset value and mask of a specified register symbol.
+ *
+ * This function returns the reset value and reset mask in variable length
+ * according to the word-size of the specified register symbol.
+ * The first n-word(s) of the return value is the reset value of the specified
+ * register which size is n word(s). The following n-word(s) of the
+ * return value is the reset mask of the specified register.
+ *
+ * \param [in] symbols Symbol table structure.
+ * \param [in] symbol Symbol structure.
+ *
+ * \return Pointer to reset value and reset mask or Null on failure.
+ */
+extern const uint32_t *
+bcmdrd_sym_reg_resetval_get(const bcmdrd_symbols_t *symbols,
+                            const bcmdrd_symbol_t *symbol);
+
+/*!
+ * \brief Check if default value of a specified symbol is non-zero.
+ *
+ * \param [in] symbols Symbol table structure.
+ * \param [in] symbol Symbol structure.
+ *
+ * \retval true Default value is non-zero.
+ * \retval false Default value is zero.
+ */
+extern bool
+bcmdrd_sym_default_value_is_nonzero(const bcmdrd_symbols_t *symbols,
+                                    const bcmdrd_symbol_t *symbol);
+
+/*!
+ * \brief Get MOR clocks value of a specified symbol for read operation.
+ *
+ * The MOR (Multiple Outstanding Requests) clocks value is supposed to be
+ * used to optimize the CMIC S-bus DMA read opreration performance
+ * for this symbol.
+ * The returned value from this function can be taken as a reference for the
+ * MOR clocks value setting.
+ *
+ * \param [in] symbols Symbol table structure.
+ * \param [in] symbol Symbol structure.
+ *
+ * \return MOR clocks value or 0 if not supported.
+ */
+extern uint32_t
+bcmdrd_sym_mor_clks_read_get(const bcmdrd_symbols_t *symbols,
+                             const bcmdrd_symbol_t *symbol);
+
+/*!
+ * \brief Get MOR clocks value of a specified symbol for write operation.
+ *
+ * The MOR (Multiple Outstanding Requests) clocks value is supposed to be
+ * used to optimize the CMIC S-bus DMA write opreration performance
+ * for this symbol.
+ * The returned value from this function can be taken as a reference for the
+ * MOR clocks value setting.
+ *
+ * \param [in] symbols Symbol table structure.
+ * \param [in] symbol Symbol structure.
+ *
+ * \return MOR clocks value or 0 if not supported.
+ */
+extern uint32_t
+bcmdrd_sym_mor_clks_write_get(const bcmdrd_symbols_t *symbols,
+                              const bcmdrd_symbol_t *symbol);
+
+/*!
+ * \brief Get device-specific SER data structure.
+ *
+ * \param [in] symbols Symbol table structure.
+ *
+ * \return Device-specific SER data structure or NULL if not support.
+ */
+extern const void *
+bcmdrd_sym_ser_data_get(const bcmdrd_symbols_t *symbols);
+
+/*!
+ * \brief Get SER profile offset of a specified symbol.
+ *
+ * Note that the given symbol is indicated to have no SER support if
+ * the returned offset is 0.
+ *
+ * \param [in] symbol Symbol structure.
+ *
+ * \return Offset to SER profile for a given symbol.
+ */
+extern int
+bcmdrd_sym_ser_profile_offset_get(const bcmdrd_symbol_t *symbol);
+
+#endif /* BCMDRD_SYMBOLS_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd/bcmdrd_types.h b/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd/bcmdrd_types.h
new file mode 100644
index 000000000..c341d7d2a
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd/bcmdrd_types.h
@@ -0,0 +1,634 @@
+/*! \file bcmdrd_types.h
+ *
+ * Basic DRD types, which may be used outside the DRD as well.
+ *
+ */
+/*
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ */
+
+#ifndef BCMDRD_TYPES_H
+#define BCMDRD_TYPES_H
+
+#include <bcmdrd_config.h>
+
+#include <sal/sal_types.h>
+#include <sal/sal_libc.h>
+
+#include <shr/shr_types.h>
+
+/*! 16-bit-safe left shift */
+#define LSHIFT32(_val, _cnt) ((uint32_t)(_val) << (_cnt))
+
+/*! 32-bit-safe left shift */
+#define LSHIFT64(_val, _cnt) ((uint64_t)(_val) << (_cnt))
+
+
+
+#ifndef F32_MASK
+/*! Create a bit mask of w bits as a 32-bit word. */
+#define F32_MASK(w) \
+    ((((w) > 31) ? 0 : ((uint32_t)1 << (w))) - 1)
+#endif
+
+#ifndef F64_MASK
+/*! Create a bit mask of w bits as a 64-bit dword. */
+#define F64_MASK(w) \
+    ((((w) > 63) ? 0 : ((uint64_t)1 << (w))) - 1)
+#endif
+
+#ifndef F32_GET
+/*! Extract a field of w bits at offset o from a 32-bit word d. */
+#define F32_GET(d,o,w) \
+        (((d) >> o) & F32_MASK(w))
+#endif
+
+#ifndef F64_GET
+/*! Extract a field of w bits at offset o from a 64-bit word d. */
+#define F64_GET(d,o,w) \
+        (((d) >> o) & F64_MASK(w))
+#endif
+
+#ifndef F32_SET
+/*! Set a field of w bits at offset o in a 32-bit word d. */
+#define F32_SET(d,o,w,v) \
+        (d = ((d & ~(F32_MASK(w) << o)) | (((v) & F32_MASK(w)) << o)))
+#endif
+
+#ifndef F64_SET
+/*! Set a field of w bits at offset o in a 64-bit word d. */
+#define F64_SET(d,o,w,v) \
+        (d = ((d & ~(F64_MASK(w) << o)) | (((v) & F64_MASK(w)) << o)))
+#endif
+
+/*! Optionally force an error in compiler pre-processor. */
+#if BCMDRD_CONFIG_INCLUDE_FIELD_CHECKS
+#define BCMDRD_COMPILER_ERROR (1 << 99)
+#else
+#define BCMDRD_COMPILER_ERROR 0
+#endif
+
+#ifndef F32_ENCODE
+/*!
+ * Encode a value of a given width at a given offset. Optionally
+ * performs compile-time error checking on the value to ensure it fits
+ * within the given width.
+ */
+#define F32_ENCODE(v,o,w) \
+        ( ((v & F32_MASK(w)) == v) ? \
+          /* Value fits in width */ ( (uint32_t)(v) << o ) : \
+          /* Value does not fit */ BCMDRD_COMPILER_ERROR)
+
+#endif
+
+#ifndef F64_ENCODE
+/*!
+ * Encode a value of a given width at a given offset. Performs
+ * compile-time error checking on the value to ensure it fits within
+ * the given width.
+ */
+#define F64_ENCODE(v,o,w) \
+        ( ((v & F64_MASK(w)) == v) ? \
+          /* Value fits in width */ ( (uint64_t)(v) << o ) : \
+          /* Value does not fit */ BCMDRD_COMPILER_ERROR)
+
+#endif
+
+/*! Max size of register/memory in words */
+#define BCMDRD_MAX_PT_WSIZE       32
+
+/*! Words in port bit maps */
+#define BCMDRD_PBMP_WORD_MAX       (((BCMDRD_CONFIG_MAX_PORTS - 1) >> 5) + 1)
+
+/*!
+ * Bitmap of ports of a particular type or properties.
+ */
+typedef struct bcmdrd_pbmp_s {
+    /*! Word array. */
+    uint32_t w[BCMDRD_PBMP_WORD_MAX];
+} bcmdrd_pbmp_t;
+
+/* Port bitmap helper functions */
+
+/*!
+ * \brief Check if port bitmap is empty.
+ *
+ * Check that no bits are set in a port bitmap of type \ref
+ * bcmdrd_pbmp_t.
+ *
+ * \param [in] pbmp Port bitmap.
+ *
+ * \retval true Port bitmap is empty.
+ * \retval false Port bitmap is not empty.
+ */
+extern int
+bcmdrd_pbmp_is_null(const bcmdrd_pbmp_t *pbmp);
+
+/*!
+ * \brief Parse a port list string into a port bitmap.
+ *
+ * The port list string may contain commas to separate port numbers
+ * and hyphens to indicate port ranges.
+ *
+ * Examples: "2" "2,5" "2,5,7-13,43"
+ *
+ * \param [in] str String to be parsed.
+ * \param [out] pbmp Port bitmap.
+ *
+ * \retval 0 No errors.
+ * \retval -1 Fail to parse the string to a port bitmap.
+ */
+extern int
+bcmdrd_pbmp_parse(const char *str, bcmdrd_pbmp_t *pbmp);
+
+/*!
+ * \brief Get bitmap word index for a given port.
+ *
+ * A port bitmap is an array of data words, and this macro will return
+ * the index of the data word associated with a given port number.
+ *
+ * No range check is performed on the port number.
+ *
+ * \param [in] _pbmp Port bitmap.
+ * \param [in] _port Port number to check.
+ */
+#define BCMDRD_PBMP_WORD(_pbmp, _port)          \
+    (&(_pbmp))->w[(_port) >> 5]
+
+/*!
+ * \brief Check if a port is member of a port bitmap.
+ *
+ * Check if a port is member of a port bitmap of type \ref
+ * bcmdrd_pbmp_t.
+ *
+ * No range check is performed on the port number.
+ *
+ * \param [in] _pbmp Port bitmap.
+ * \param [in] _port Port number to check.
+ */
+#define BCMDRD_PBMP_MEMBER(_pbmp, _port) \
+     (BCMDRD_PBMP_WORD(_pbmp, _port) & LSHIFT32(1, (_port) & 0x1f))
+
+/*!
+ * \brief Iterate over a port bitmap.
+ *
+ * Iterate over a port bitmap of type \ref bcmdrd_pbmp_t and execute
+ * the subsequent statement for all bits set in the port bitmap.
+ *
+ * \param [in] _pbmp Port bitmap.
+ * \param [in] _port Port iterator variable.
+ */
+#define BCMDRD_PBMP_ITER(_pbmp, _port)                          \
+    for (_port = 0; _port < BCMDRD_CONFIG_MAX_PORTS; _port++)   \
+        if (BCMDRD_PBMP_WORD(_pbmp, _port) == 0)                \
+            _port += 31;                                        \
+        else if (BCMDRD_PBMP_MEMBER(_pbmp, _port))
+
+/*!
+ * \brief Add a port to a port bitmap.
+ *
+ * Add a port to a port bitmap of type \ref bcmdrd_pbmp_t.
+ *
+ * No range check is performed on the port number.
+ *
+ * \param [in] _pbmp Port bitmap.
+ * \param [in] _port Port number to add.
+ */
+#define BCMDRD_PBMP_PORT_ADD(_pbmp, _port) \
+     (BCMDRD_PBMP_WORD(_pbmp, _port) |= LSHIFT32(1, (_port) & 0x1f))
+
+/*!
+ * \brief Remove a port from a port bitmap.
+ *
+ * Remove a port from a port bitmap of type \ref bcmdrd_pbmp_t.
+ *
+ * No range check is performed on the port number.
+ *
+ * \param [in] _pbmp Port bitmap.
+ * \param [in] _port Port number to remove.
+ */
+#define BCMDRD_PBMP_PORT_REMOVE(_pbmp, _port) \
+     (BCMDRD_PBMP_WORD(_pbmp, _port) &= ~(LSHIFT32(1, (_port) & 0x1f)))
+
+/*!
+ * \brief Clear a port bitmap.
+ *
+ * Clear a port bitmap of type \ref bcmdrd_pbmp_t.
+ *
+ * After clearing the port bitmap, it will have no members..
+ *
+ * \param [in] _pbmp Port bitmap.
+ */
+#define BCMDRD_PBMP_CLEAR(_pbmp) sal_memset(&_pbmp, 0, sizeof(bcmdrd_pbmp_t))
+
+/*!
+ * \brief Get a word from a port bitmap.
+ *
+ * Get a 32-bit word from a port bitmap of type \ref bcmdrd_pbmp_t.
+ *
+ * \param [in] _pbmp Port bitmap.
+ * \param [in] _w Word number to get (first word is word 0).
+ */
+#define BCMDRD_PBMP_WORD_GET(_pbmp, _w)            ((&(_pbmp))->w[_w])
+
+/*!
+ * \brief Set a word in a port bitmap.
+ *
+ * Set a 32-bit word in a port bitmap of type \ref bcmdrd_pbmp_t.
+ *
+ * \param [in] _pbmp Port bitmap.
+ * \param [in] _w Word number to set (first word is word 0).
+ * \param [in] _val Value of word to set.
+ */
+#define BCMDRD_PBMP_WORD_SET(_pbmp, _w, _val)      ((&(_pbmp))->w[_w]) = (_val)
+
+/*!
+ * \brief Helper macro for port bimap operations.
+ *
+ * \param [in] _pbmp0 First port bitmap.
+ * \param [in] _pbmp1 Second port bitmap.
+ * \param [in] _op Port bitmap operator.
+ */
+#define BCMDRD_PBMP_BMOP(_pbmp0, _pbmp1, _op) \
+    do { \
+        int _w; \
+        for (_w = 0; _w < BCMDRD_PBMP_WORD_MAX; _w++) { \
+            BCMDRD_PBMP_WORD_GET(_pbmp0, _w) _op BCMDRD_PBMP_WORD_GET(_pbmp1, _w); \
+        } \
+    } while (0)
+
+/*! Return true if port bitmap _pbmp is empty. */
+#define BCMDRD_PBMP_IS_NULL(_pbmp)         (bcmdrd_pbmp_is_null(&(_pbmp)))
+
+/*! Return true if port bitmap _pbmp is not empty. */
+#define BCMDRD_PBMP_NOT_NULL(_pbmp)        (!(bcmdrd_pbmp_is_null(&(_pbmp))))
+
+/*! Assign port bitmap src to port bitmap dst. */
+#define BCMDRD_PBMP_ASSIGN(dst, src)       sal_memcpy(&(dst), &(src), sizeof(bcmdrd_pbmp_t))
+
+/*!
+ * Perform a logical AND operation between all bits of port bitmaps _pbmp0 and
+ * pbmp1.
+ */
+#define BCMDRD_PBMP_AND(_pbmp0, _pbmp1)    BCMDRD_PBMP_BMOP(_pbmp0, _pbmp1, &=)
+
+/*!
+ * Perform a logical OR operation between all bits of port bitmaps _pbmp0 and
+ * pbmp1.
+ */
+#define BCMDRD_PBMP_OR(_pbmp0, _pbmp1)     BCMDRD_PBMP_BMOP(_pbmp0, _pbmp1, |=)
+
+/*!
+ * Perform a logical XOR operation between all bits of port bitmaps _pbmp0 and
+ * pbmp1.
+ */
+#define BCMDRD_PBMP_XOR(_pbmp0, _pbmp1)    BCMDRD_PBMP_BMOP(_pbmp0, _pbmp1, ^=)
+
+/*!
+ * Remove all bits in port bitmap _pbmp1 from port bitmap _pbmp0.
+ */
+#define BCMDRD_PBMP_REMOVE(_pbmp0, _pbmp1) BCMDRD_PBMP_BMOP(_pbmp0, _pbmp1, &= ~)
+
+/*!
+ * Assign an inversed port bitmap _pbmp1 to port bitmap _pbmp0,
+ * i.e. any port which is a member of _pbmp1 will not be a member of
+ * _pbmp0 and vice versa.
+ */
+#define BCMDRD_PBMP_NEGATE(_pbmp0, _pbmp1) BCMDRD_PBMP_BMOP(_pbmp0, _pbmp1, = ~)
+
+/*! Convert a number of (8-bit) bytes to a number of bits. */
+#define BCMDRD_BYTES2BITS(_x)   ((_x) * 8)
+
+/*! Convert a number of (8-bit) bytes to a number of 32-bit words. */
+#define BCMDRD_BYTES2WORDS(_x)  (((_x) + 3) / 4)
+
+/*! Convert a number of 32-bit words to a number of bits. */
+#define BCMDRD_WORDS2BITS(_x)   ((_x) * 32)
+
+/*! Convert a number of 32-bit words to a number of (8-bit) bytes. */
+#define BCMDRD_WORDS2BYTES(_x)  ((_x) * 4)
+
+/*! Align a size to a specific number of bytes. */
+#define BCMDRD_ALIGN(_s, _a)    (((_s) + ((_a) - 1)) & ~((_a) - 1))
+
+
+/*! Create enumeration values from list of supported devices. */
+#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \
+    BCMDRD_DEV_T_##_bd,
+/*! Enumeration for all base device types. */
+typedef enum {
+    BCMDRD_DEV_T_NONE = 0,
+/*! \cond */
+#include <bcmdrd/bcmdrd_devlist.h>
+/*! \endcond */
+    BCMDRD_DEV_T_COUNT
+} bcmdrd_dev_type_t;
+
+/*! Generic ID (enum). */
+typedef uint32_t bcmdrd_id_t;
+
+/*! Generic invalid ID value. */
+#define BCMDRD_INVALID_ID       ((bcmdrd_id_t)-1)
+
+/*! Invalid register value. */
+#define INVALIDr        BCMDRD_INVALID_ID
+
+/*! Invalid memory value. */
+#define INVALIDm        BCMDRD_INVALID_ID
+
+/*! Invalid field value. */
+#define INVALIDf        BCMDRD_INVALID_ID
+
+/*! Check if an ID is valid, i.e. different from BCMDRD_INVALID_ID. */
+#define BCMDRD_ID_VALID(_id) \
+    ((_id) != BCMDRD_INVALID_ID)
+
+/*! Device-specific symbol ID (enum). */
+typedef bcmdrd_id_t bcmdrd_sid_t;
+
+/*! Device-specific field ID (enum). */
+typedef bcmdrd_id_t bcmdrd_fid_t;
+
+/*! Enum for string/value map. */
+typedef shr_enum_map_t bcmdrd_enum_map_t;
+
+/*!
+ * \brief Port number domain.
+ *
+ * Port-based registers and memories use different port number domains
+ * in their physical address. For example, some registers use the
+ * physical port number, some registers use the logical port number
+ * and some use a MMU port number.
+ *
+ * For most devices, each block type use the same port number domain,
+ * but there are a few exceptions, so this needs to be a per-reg/mem
+ * property.
+ */
+typedef enum bcmdrd_port_num_domain_e {
+    BCMDRD_PND_PHYS = 0,
+    BCMDRD_PND_LOGIC = 1,
+    BCMDRD_PND_MMU = 2,
+    BCMDRD_PND_COUNT
+} bcmdrd_port_num_domain_t;
+
+/*!
+ * \name Port types.
+ * \anchor BCMDRD_PORT_TYPE_xxx
+ *
+ * Port types are defined as bit masks, such that it is possible to
+ * group multiple types into a single one, e.g. CPU and loopback ports
+ * could be greoup as internal ports.
+ */
+
+/*! \{ */
+
+/*! Port type undefined. */
+#define BCMDRD_PORT_TYPE_UNDEF  0
+
+/*! Reserved port (e.g. spare port or other unused port). */
+#define BCMDRD_PORT_TYPE_RSVD   (1U << 0)
+
+/*! CPU/HMI port (internal). */
+#define BCMDRD_PORT_TYPE_CPU    (1U << 1)
+
+/*! Loopback port (internal). */
+#define BCMDRD_PORT_TYPE_LB     (1U << 2)
+
+/*! Front-panel port. */
+#define BCMDRD_PORT_TYPE_FPAN   (1U << 3)
+
+/*! Up-link port. */
+#define BCMDRD_PORT_TYPE_UPLINK (1U << 4)
+
+/*! Management port. */
+#define BCMDRD_PORT_TYPE_MGMT   (1U << 5)
+
+/*! RDB port. */
+#define BCMDRD_PORT_TYPE_RDB    (1U << 6)
+
+/*! FAE port. */
+#define BCMDRD_PORT_TYPE_FAE    (1U << 7)
+
+/*! AUX port. */
+#define BCMDRD_PORT_TYPE_AUX    (1U << 8)
+/*! } */
+
+/*!
+ * \brief Port category.
+ *
+ * Please refer to \ref BCMDRD_PORT_TYPE_xxx for a list possible
+ * values (categories).
+ *
+ * Values are bit-based such that a port can belong to multiple
+ * categories.
+ */
+typedef uint32_t bcmdrd_port_type_t;
+
+/*! Words in pipe maps */
+#define BCMDRD_PIPEMAP_WORD_MAX (((BCMDRD_CONFIG_MAX_PIPES - 1) >> 5) + 1)
+
+/*!
+ * Bitmap of pipes of a particular type.
+ */
+typedef struct bcmdrd_pipemap_s {
+    /*! Word array. */
+    uint32_t w[BCMDRD_PIPEMAP_WORD_MAX];
+} bcmdrd_pipemap_t;
+
+/* pipe map helper functions */
+
+/*!
+ * \brief Check if pipe map is empty.
+ *
+ * Check that no bits are set in a pipe map of type \ref
+ * bcmdrd_pipemap_t.
+ *
+ * \param [in] pm pipe map.
+ *
+ * \retval true Pipe map is empty.
+ * \retval false Pipe map is not empty.
+ */
+extern bool
+bcmdrd_pipemap_is_null(const bcmdrd_pipemap_t *pm);
+
+/*!
+ * \brief Get bitmap word index for a given pipe.
+ *
+ * A pipe map is an array of data words, and this macro will return
+ * the index of the data word associated with a given pipe number.
+ *
+ * No range check is performed on the pipe number.
+ *
+ * \param [in] _pm Pipe map.
+ * \param [in] _pipe Pipe number to check.
+ */
+#define BCMDRD_PIPEMAP_WORD(_pm, _pipe)          \
+    (&(_pm))->w[(_pipe) >> 5]
+
+/*!
+ * \brief Check if a pipe is member of a pipe map.
+ *
+ * Check if a pipe is member of a pipe map of type \ref
+ * bcmdrd_pipemap_t.
+ *
+ * No range check is performed on the pipe number.
+ *
+ * \param [in] _pm Pipe map.
+ * \param [in] _pipe Pipe number to check.
+ */
+#define BCMDRD_PIPEMAP_MEMBER(_pm, _pipe) \
+     (BCMDRD_PIPEMAP_WORD(_pm, _pipe) & LSHIFT32(1, (_pipe) & 0x1f))
+
+/*!
+ * \brief Iterate over a pipe map.
+ *
+ * Iterate over a pipe map of type \ref bcmdrd_pipemap_t and
+ * execute the subsequent statement for all bits set in the pipe
+ * bitmap.
+ *
+ * \param [in] _pm Pipe map.
+ * \param [in] _pipe Pipe iterator variable.
+ */
+#define BCMDRD_PIPEMAP_ITER(_pm, _pipe)                    \
+    for (_pipe = 0; _pipe < BCMDRD_CONFIG_MAX_PIPES; _pipe++)   \
+        if (BCMDRD_PIPEMAP_WORD(_pm, _pipe) == 0)          \
+            _pipe += 31;                                        \
+        else if (BCMDRD_PIPEMAP_MEMBER(_pm, _pipe))
+
+/*!
+ * \brief Add a pipe to a pipe map.
+ *
+ * Add a pipe to a pipe map of type \ref bcmdrd_pipemap_t.
+ *
+ * No range check is performed on the pipe number.
+ *
+ * \param [in] _pm Pipe map.
+ * \param [in] _pipe Pipe number to add.
+ */
+#define BCMDRD_PIPEMAP_PIPE_ADD(_pm, _pipe) \
+     (BCMDRD_PIPEMAP_WORD(_pm, _pipe) |= LSHIFT32(1, (_pipe) & 0x1f))
+
+/*!
+ * \brief Remove a pipe from a pipe map.
+ *
+ * Remove a pipe from a pipe map of type \ref bcmdrd_pipemap_t.
+ *
+ * No range check is performed on the pipe number.
+ *
+ * \param [in] _pm Pipe map.
+ * \param [in] _pipe Pipe number to remove.
+ */
+#define BCMDRD_PIPEMAP_PIPE_REMOVE(_pm, _pipe) \
+     (BCMDRD_PIPEMAP_WORD(_pm, _pipe) &= ~(LSHIFT32(1, (_pipe) & 0x1f)))
+
+/*!
+ * \brief Clear a pipe map.
+ *
+ * Clear a pipe map of type \ref bcmdrd_pipemap_t.
+ *
+ * After clearing the pipe map, it will have no members.
+ *
+ * \param [in] _pm Pipe map.
+ */
+#define BCMDRD_PIPEMAP_CLEAR(_pm) \
+    sal_memset(&_pm, 0, sizeof(bcmdrd_pipemap_t))
+
+/*!
+ * \brief Get a word from a pipe map.
+ *
+ * Get a 32-bit word from a pipe map of type \ref bcmdrd_pipemap_t.
+ *
+ * \param [in] _pm Pipe map.
+ * \param [in] _w Word number to get (first word is word 0).
+ */
+#define BCMDRD_PIPEMAP_WORD_GET(_pm, _w) \
+    ((&(_pm))->w[_w])
+
+/*!
+ * \brief Set a word in a pipe map.
+ *
+ * Set a 32-bit word in a pipe map of type \ref bcmdrd_pipemap_t.
+ *
+ * \param [in] _pm Pipe map.
+ * \param [in] _w Word number to set (first word is word 0).
+ * \param [in] _val Value of word to set.
+ */
+#define BCMDRD_PIPEMAP_WORD_SET(_pm, _w, _val) \
+    ((&(_pm))->w[_w]) = (_val)
+
+/*!
+ * \brief Helper macro for pipe map operations.
+ *
+ * \param [in] _pm0 First pipe map.
+ * \param [in] _pm1 Second pipe map.
+ * \param [in] _op Pipe map operator.
+ */
+#define BCMDRD_PIPEMAP_BMOP(_pm0, _pm1, _op) \
+    do { \
+        int _w; \
+        for (_w = 0; _w < BCMDRD_PIPEMAP_WORD_MAX; _w++) { \
+            BCMDRD_PIPEMAP_WORD_GET(_pm0, _w) _op BCMDRD_PIPEMAP_WORD_GET(_pm1, _w); \
+        } \
+    } while (0)
+
+/*! Return true if pipe map _pm is empty. */
+#define BCMDRD_PIPEMAP_IS_NULL(_pm) \
+    (bcmdrd_pipemap_is_null(&(_pm)))
+
+/*! Return true if pipe map _pm is not empty. */
+#define BCMDRD_PIPEMAP_NOT_NULL(_pm) \
+    (!(bcmdrd_pipemap_is_null(&(_pm))))
+
+/*! Assign pipe map src to pipe map dst. */
+#define BCMDRD_PIPEMAP_ASSIGN(dst, src) \
+    sal_memcpy(&(dst), &(src), sizeof(bcmdrd_pipemap_t))
+
+/*!
+ * Perform a logical AND operation between all bits of pipe maps _pm0
+ * and _pm1.
+ */
+#define BCMDRD_PIPEMAP_AND(_pm0, _pm1) \
+    BCMDRD_PIPEMAP_BMOP(_pm0, _pm1, &=)
+
+/*!
+ * Perform a logical OR operation between all bits of pipe maps _pm0
+ * and _pm1.
+ */
+#define BCMDRD_PIPEMAP_OR(_pm0, _pm1) \
+    BCMDRD_PIPEMAP_BMOP(_pm0, _pm1, |=)
+
+/*!
+ * Perform a logical XOR operation between all bits of pipe maps _pm0
+ * and _pm1.
+ */
+#define BCMDRD_PIPEMAP_XOR(_pm0, _pm1) \
+    BCMDRD_PIPEMAP_BMOP(_pm0, _pm1, ^=)
+
+/*!
+ * Remove all bits in pipe map _pm1 from pipe map _pm0.
+ */
+#define BCMDRD_PIPEMAP_REMOVE(_pm0, _pm1) \
+    BCMDRD_PIPEMAP_BMOP(_pm0, _pm1, &= ~)
+
+/*!
+ * Assign an inversed pipe map _pm1 to pipe map _pm0, i.e. any pipe
+ * which is a member of _pm1 will not be a member of _pm0 and vice
+ * versa.
+ */
+#define BCMDRD_PIPEMAP_NEGATE(_pm0, _pm1) \
+    BCMDRD_PIPEMAP_BMOP(_pm0, _pm1, = ~)
+
+#endif /* BCMDRD_TYPES_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd_config.h b/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd_config.h
index 455f748e9..3124811a4 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd_config.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd_config.h
@@ -23,9 +23,10 @@
  *            compilation
  *         d) Make sure the compilation include path includes
  *            'bcmdrd_custom_config.h'
+ *
  */
 /*
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -63,7 +64,12 @@
 
 /*! Maximum number of ports per chip supported. */
 #ifndef BCMDRD_CONFIG_MAX_PORTS
-#define BCMDRD_CONFIG_MAX_PORTS                    848
+#define BCMDRD_CONFIG_MAX_PORTS                    1088
+#endif
+
+/*! Maximum number of pipes per chip supported. */
+#ifndef BCMDRD_CONFIG_MAX_PIPES
+#define BCMDRD_CONFIG_MAX_PIPES                    96
 #endif
 
 /*! Direct access to memory-mapped registers. */
@@ -145,6 +151,9 @@ CONFIG_OPTION(BCMDRD_CONFIG_MAX_UNITS)
 #ifdef BCMDRD_CONFIG_MAX_PORTS
 CONFIG_OPTION(BCMDRD_CONFIG_MAX_PORTS)
 #endif
+#ifdef BCMDRD_CONFIG_MAX_PIPES
+CONFIG_OPTION(BCMDRD_CONFIG_MAX_PIPES)
+#endif
 #ifdef BCMDRD_CONFIG_MEMMAP_DIRECT
 CONFIG_OPTION(BCMDRD_CONFIG_MEMMAP_DIRECT)
 #endif
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd_config_chips.h b/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd_config_chips.h
index 1fa1afd92..29ff05fc0 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd_config_chips.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd_config_chips.h
@@ -4,7 +4,7 @@
  * Edits to this file will be lost when it is regenerated.
  * Tool: INTERNAL/drd/instpkgs.pl
  *
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -38,7 +38,6 @@
  *             Example: #define BCMDRD_CONFIG_INCLUDE_BCM56080_A0 1
  *                      #define BCMDRD_CONFIG_INCLUDE_BCM56080_A1 0
  *
- *
  * The value of BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT is used for any
  * chips which are left unspecified. Set this value to 1 or 0 to
  * include or exclude all chips by default.
@@ -72,6 +71,20 @@
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56080_A0
 #define BCMDRD_CONFIG_INCLUDE_BCM56080_A0 BCMDRD_CONFIG_INCLUDE_BCM56080_Ax
 #endif
+#ifndef BCMDRD_CONFIG_INCLUDE_BCM56080_A1
+#define BCMDRD_CONFIG_INCLUDE_BCM56080_A1 BCMDRD_CONFIG_INCLUDE_BCM56080_Ax
+#endif
+/* Resolve all interchip dependencies */
+#if BCMDRD_CONFIG_INCLUDE_BCM56080_A1 == 1
+#ifndef BCMDRD_CONFIG_INCLUDE_BCM56080_A0
+#define BCMDRD_CONFIG_INCLUDE_BCM56080_A0 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
+#endif
+#if BCMDRD_CONFIG_INCLUDE_BCM56080_A0 != 1
+#undef BCMDRD_CONFIG_INCLUDE_BCM56080_A0
+#define BCMDRD_CONFIG_INCLUDE_BCM56080_A0 1
+#define BCMDRD_CONFIG_INCLUDE_BCM56080_A0_IMPLIED 1
+#endif
+#endif
 
 
 /*
@@ -89,6 +102,9 @@
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56081_A0
 #define BCMDRD_CONFIG_INCLUDE_BCM56081_A0 BCMDRD_CONFIG_INCLUDE_BCM56081_Ax
 #endif
+#ifndef BCMDRD_CONFIG_INCLUDE_BCM56081_A1
+#define BCMDRD_CONFIG_INCLUDE_BCM56081_A1 BCMDRD_CONFIG_INCLUDE_BCM56081_Ax
+#endif
 /* Resolve all interchip dependencies */
 #if BCMDRD_CONFIG_INCLUDE_BCM56081_A0 == 1
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56080_A0
@@ -100,6 +116,13 @@
 #define BCMDRD_CONFIG_INCLUDE_BCM56080_A0_IMPLIED 1
 #endif
 #endif
+#if BCMDRD_CONFIG_INCLUDE_BCM56081_A1 == 1
+#if BCMDRD_CONFIG_INCLUDE_BCM56080_A0 != 1
+#undef BCMDRD_CONFIG_INCLUDE_BCM56080_A0
+#define BCMDRD_CONFIG_INCLUDE_BCM56080_A0 1
+#define BCMDRD_CONFIG_INCLUDE_BCM56080_A0_IMPLIED 1
+#endif
+#endif
 
 
 /*
@@ -117,6 +140,9 @@
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56082_A0
 #define BCMDRD_CONFIG_INCLUDE_BCM56082_A0 BCMDRD_CONFIG_INCLUDE_BCM56082_Ax
 #endif
+#ifndef BCMDRD_CONFIG_INCLUDE_BCM56082_A1
+#define BCMDRD_CONFIG_INCLUDE_BCM56082_A1 BCMDRD_CONFIG_INCLUDE_BCM56082_Ax
+#endif
 /* Resolve all interchip dependencies */
 #if BCMDRD_CONFIG_INCLUDE_BCM56082_A0 == 1
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56080_A0
@@ -128,6 +154,13 @@
 #define BCMDRD_CONFIG_INCLUDE_BCM56080_A0_IMPLIED 1
 #endif
 #endif
+#if BCMDRD_CONFIG_INCLUDE_BCM56082_A1 == 1
+#if BCMDRD_CONFIG_INCLUDE_BCM56080_A0 != 1
+#undef BCMDRD_CONFIG_INCLUDE_BCM56080_A0
+#define BCMDRD_CONFIG_INCLUDE_BCM56080_A0 1
+#define BCMDRD_CONFIG_INCLUDE_BCM56080_A0_IMPLIED 1
+#endif
+#endif
 
 
 /*
@@ -145,6 +178,9 @@
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56083_A0
 #define BCMDRD_CONFIG_INCLUDE_BCM56083_A0 BCMDRD_CONFIG_INCLUDE_BCM56083_Ax
 #endif
+#ifndef BCMDRD_CONFIG_INCLUDE_BCM56083_A1
+#define BCMDRD_CONFIG_INCLUDE_BCM56083_A1 BCMDRD_CONFIG_INCLUDE_BCM56083_Ax
+#endif
 /* Resolve all interchip dependencies */
 #if BCMDRD_CONFIG_INCLUDE_BCM56083_A0 == 1
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56080_A0
@@ -156,6 +192,13 @@
 #define BCMDRD_CONFIG_INCLUDE_BCM56080_A0_IMPLIED 1
 #endif
 #endif
+#if BCMDRD_CONFIG_INCLUDE_BCM56083_A1 == 1
+#if BCMDRD_CONFIG_INCLUDE_BCM56080_A0 != 1
+#undef BCMDRD_CONFIG_INCLUDE_BCM56080_A0
+#define BCMDRD_CONFIG_INCLUDE_BCM56080_A0 1
+#define BCMDRD_CONFIG_INCLUDE_BCM56080_A0_IMPLIED 1
+#endif
+#endif
 
 
 /*
@@ -173,6 +216,9 @@
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56084_A0
 #define BCMDRD_CONFIG_INCLUDE_BCM56084_A0 BCMDRD_CONFIG_INCLUDE_BCM56084_Ax
 #endif
+#ifndef BCMDRD_CONFIG_INCLUDE_BCM56084_A1
+#define BCMDRD_CONFIG_INCLUDE_BCM56084_A1 BCMDRD_CONFIG_INCLUDE_BCM56084_Ax
+#endif
 /* Resolve all interchip dependencies */
 #if BCMDRD_CONFIG_INCLUDE_BCM56084_A0 == 1
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56080_A0
@@ -184,6 +230,96 @@
 #define BCMDRD_CONFIG_INCLUDE_BCM56080_A0_IMPLIED 1
 #endif
 #endif
+#if BCMDRD_CONFIG_INCLUDE_BCM56084_A1 == 1
+#if BCMDRD_CONFIG_INCLUDE_BCM56080_A0 != 1
+#undef BCMDRD_CONFIG_INCLUDE_BCM56080_A0
+#define BCMDRD_CONFIG_INCLUDE_BCM56080_A0 1
+#define BCMDRD_CONFIG_INCLUDE_BCM56080_A0_IMPLIED 1
+#endif
+#endif
+
+
+/*
+ * BCM56085
+ */
+
+/* Sets the default include state if it was not given */
+#ifndef BCMDRD_CONFIG_INCLUDE_BCM56085
+#define BCMDRD_CONFIG_INCLUDE_BCM56085 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
+#endif
+/* Resolve revision dependencies */
+#ifndef BCMDRD_CONFIG_INCLUDE_BCM56085_Ax
+#define BCMDRD_CONFIG_INCLUDE_BCM56085_Ax BCMDRD_CONFIG_INCLUDE_BCM56085
+#endif
+#ifndef BCMDRD_CONFIG_INCLUDE_BCM56085_A0
+#define BCMDRD_CONFIG_INCLUDE_BCM56085_A0 BCMDRD_CONFIG_INCLUDE_BCM56085_Ax
+#endif
+#ifndef BCMDRD_CONFIG_INCLUDE_BCM56085_A1
+#define BCMDRD_CONFIG_INCLUDE_BCM56085_A1 BCMDRD_CONFIG_INCLUDE_BCM56085_Ax
+#endif
+/* Resolve all interchip dependencies */
+#if BCMDRD_CONFIG_INCLUDE_BCM56085_A0 == 1
+#ifndef BCMDRD_CONFIG_INCLUDE_BCM56080_A0
+#define BCMDRD_CONFIG_INCLUDE_BCM56080_A0 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
+#endif
+#if BCMDRD_CONFIG_INCLUDE_BCM56080_A0 != 1
+#undef BCMDRD_CONFIG_INCLUDE_BCM56080_A0
+#define BCMDRD_CONFIG_INCLUDE_BCM56080_A0 1
+#define BCMDRD_CONFIG_INCLUDE_BCM56080_A0_IMPLIED 1
+#endif
+#endif
+#if BCMDRD_CONFIG_INCLUDE_BCM56085_A1 == 1
+#if BCMDRD_CONFIG_INCLUDE_BCM56080_A0 != 1
+#undef BCMDRD_CONFIG_INCLUDE_BCM56080_A0
+#define BCMDRD_CONFIG_INCLUDE_BCM56080_A0 1
+#define BCMDRD_CONFIG_INCLUDE_BCM56080_A0_IMPLIED 1
+#endif
+#endif
+
+
+/*
+ * BCM56690
+ */
+
+/* Sets the default include state if it was not given */
+#ifndef BCMDRD_CONFIG_INCLUDE_BCM56690
+#define BCMDRD_CONFIG_INCLUDE_BCM56690 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
+#endif
+/* Resolve revision dependencies */
+#ifndef BCMDRD_CONFIG_INCLUDE_BCM56690_Ax
+#define BCMDRD_CONFIG_INCLUDE_BCM56690_Ax BCMDRD_CONFIG_INCLUDE_BCM56690
+#endif
+#ifndef BCMDRD_CONFIG_INCLUDE_BCM56690_A0
+#define BCMDRD_CONFIG_INCLUDE_BCM56690_A0 BCMDRD_CONFIG_INCLUDE_BCM56690_Ax
+#endif
+
+
+/*
+ * BCM56692
+ */
+
+/* Sets the default include state if it was not given */
+#ifndef BCMDRD_CONFIG_INCLUDE_BCM56692
+#define BCMDRD_CONFIG_INCLUDE_BCM56692 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
+#endif
+/* Resolve revision dependencies */
+#ifndef BCMDRD_CONFIG_INCLUDE_BCM56692_Ax
+#define BCMDRD_CONFIG_INCLUDE_BCM56692_Ax BCMDRD_CONFIG_INCLUDE_BCM56692
+#endif
+#ifndef BCMDRD_CONFIG_INCLUDE_BCM56692_A0
+#define BCMDRD_CONFIG_INCLUDE_BCM56692_A0 BCMDRD_CONFIG_INCLUDE_BCM56692_Ax
+#endif
+/* Resolve all interchip dependencies */
+#if BCMDRD_CONFIG_INCLUDE_BCM56692_A0 == 1
+#ifndef BCMDRD_CONFIG_INCLUDE_BCM56690_A0
+#define BCMDRD_CONFIG_INCLUDE_BCM56690_A0 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
+#endif
+#if BCMDRD_CONFIG_INCLUDE_BCM56690_A0 != 1
+#undef BCMDRD_CONFIG_INCLUDE_BCM56690_A0
+#define BCMDRD_CONFIG_INCLUDE_BCM56690_A0 1
+#define BCMDRD_CONFIG_INCLUDE_BCM56690_A0_IMPLIED 1
+#endif
+#endif
 
 
 /*
@@ -218,6 +354,9 @@
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56782_A0
 #define BCMDRD_CONFIG_INCLUDE_BCM56782_A0 BCMDRD_CONFIG_INCLUDE_BCM56782_Ax
 #endif
+#ifndef BCMDRD_CONFIG_INCLUDE_BCM56782_A1
+#define BCMDRD_CONFIG_INCLUDE_BCM56782_A1 BCMDRD_CONFIG_INCLUDE_BCM56782_Ax
+#endif
 /* Resolve all interchip dependencies */
 #if BCMDRD_CONFIG_INCLUDE_BCM56782_A0 == 1
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56780_A0
@@ -229,6 +368,13 @@
 #define BCMDRD_CONFIG_INCLUDE_BCM56780_A0_IMPLIED 1
 #endif
 #endif
+#if BCMDRD_CONFIG_INCLUDE_BCM56782_A1 == 1
+#if BCMDRD_CONFIG_INCLUDE_BCM56780_A0 != 1
+#undef BCMDRD_CONFIG_INCLUDE_BCM56780_A0
+#define BCMDRD_CONFIG_INCLUDE_BCM56780_A0 1
+#define BCMDRD_CONFIG_INCLUDE_BCM56780_A0_IMPLIED 1
+#endif
+#endif
 
 
 /*
@@ -302,6 +448,9 @@
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56786_A0
 #define BCMDRD_CONFIG_INCLUDE_BCM56786_A0 BCMDRD_CONFIG_INCLUDE_BCM56786_Ax
 #endif
+#ifndef BCMDRD_CONFIG_INCLUDE_BCM56786_A1
+#define BCMDRD_CONFIG_INCLUDE_BCM56786_A1 BCMDRD_CONFIG_INCLUDE_BCM56786_Ax
+#endif
 /* Resolve all interchip dependencies */
 #if BCMDRD_CONFIG_INCLUDE_BCM56786_A0 == 1
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56780_A0
@@ -313,6 +462,13 @@
 #define BCMDRD_CONFIG_INCLUDE_BCM56780_A0_IMPLIED 1
 #endif
 #endif
+#if BCMDRD_CONFIG_INCLUDE_BCM56786_A1 == 1
+#if BCMDRD_CONFIG_INCLUDE_BCM56780_A0 != 1
+#undef BCMDRD_CONFIG_INCLUDE_BCM56780_A0
+#define BCMDRD_CONFIG_INCLUDE_BCM56780_A0 1
+#define BCMDRD_CONFIG_INCLUDE_BCM56780_A0_IMPLIED 1
+#endif
+#endif
 
 
 /*
@@ -330,6 +486,9 @@
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56787_A0
 #define BCMDRD_CONFIG_INCLUDE_BCM56787_A0 BCMDRD_CONFIG_INCLUDE_BCM56787_Ax
 #endif
+#ifndef BCMDRD_CONFIG_INCLUDE_BCM56787_A1
+#define BCMDRD_CONFIG_INCLUDE_BCM56787_A1 BCMDRD_CONFIG_INCLUDE_BCM56787_Ax
+#endif
 /* Resolve all interchip dependencies */
 #if BCMDRD_CONFIG_INCLUDE_BCM56787_A0 == 1
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56780_A0
@@ -341,6 +500,13 @@
 #define BCMDRD_CONFIG_INCLUDE_BCM56780_A0_IMPLIED 1
 #endif
 #endif
+#if BCMDRD_CONFIG_INCLUDE_BCM56787_A1 == 1
+#if BCMDRD_CONFIG_INCLUDE_BCM56780_A0 != 1
+#undef BCMDRD_CONFIG_INCLUDE_BCM56780_A0
+#define BCMDRD_CONFIG_INCLUDE_BCM56780_A0 1
+#define BCMDRD_CONFIG_INCLUDE_BCM56780_A0_IMPLIED 1
+#endif
+#endif
 
 
 /*
@@ -358,6 +524,9 @@
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56788_A0
 #define BCMDRD_CONFIG_INCLUDE_BCM56788_A0 BCMDRD_CONFIG_INCLUDE_BCM56788_Ax
 #endif
+#ifndef BCMDRD_CONFIG_INCLUDE_BCM56788_A1
+#define BCMDRD_CONFIG_INCLUDE_BCM56788_A1 BCMDRD_CONFIG_INCLUDE_BCM56788_Ax
+#endif
 /* Resolve all interchip dependencies */
 #if BCMDRD_CONFIG_INCLUDE_BCM56788_A0 == 1
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM56780_A0
@@ -369,6 +538,13 @@
 #define BCMDRD_CONFIG_INCLUDE_BCM56780_A0_IMPLIED 1
 #endif
 #endif
+#if BCMDRD_CONFIG_INCLUDE_BCM56788_A1 == 1
+#if BCMDRD_CONFIG_INCLUDE_BCM56780_A0 != 1
+#undef BCMDRD_CONFIG_INCLUDE_BCM56780_A0
+#define BCMDRD_CONFIG_INCLUDE_BCM56780_A0 1
+#define BCMDRD_CONFIG_INCLUDE_BCM56780_A0_IMPLIED 1
+#endif
+#endif
 
 
 /*
@@ -928,22 +1104,22 @@
 
 
 /*
- * BCM78905
+ * BCM78902
  */
 
 /* Sets the default include state if it was not given */
-#ifndef BCMDRD_CONFIG_INCLUDE_BCM78905
-#define BCMDRD_CONFIG_INCLUDE_BCM78905 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
+#ifndef BCMDRD_CONFIG_INCLUDE_BCM78902
+#define BCMDRD_CONFIG_INCLUDE_BCM78902 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
 #endif
 /* Resolve revision dependencies */
-#ifndef BCMDRD_CONFIG_INCLUDE_BCM78905_Bx
-#define BCMDRD_CONFIG_INCLUDE_BCM78905_Bx BCMDRD_CONFIG_INCLUDE_BCM78905
+#ifndef BCMDRD_CONFIG_INCLUDE_BCM78902_Bx
+#define BCMDRD_CONFIG_INCLUDE_BCM78902_Bx BCMDRD_CONFIG_INCLUDE_BCM78902
 #endif
-#ifndef BCMDRD_CONFIG_INCLUDE_BCM78905_B0
-#define BCMDRD_CONFIG_INCLUDE_BCM78905_B0 BCMDRD_CONFIG_INCLUDE_BCM78905_Bx
+#ifndef BCMDRD_CONFIG_INCLUDE_BCM78902_B0
+#define BCMDRD_CONFIG_INCLUDE_BCM78902_B0 BCMDRD_CONFIG_INCLUDE_BCM78902_Bx
 #endif
 /* Resolve all interchip dependencies */
-#if BCMDRD_CONFIG_INCLUDE_BCM78905_B0 == 1
+#if BCMDRD_CONFIG_INCLUDE_BCM78902_B0 == 1
 #ifndef BCMDRD_CONFIG_INCLUDE_BCM78900_B0
 #define BCMDRD_CONFIG_INCLUDE_BCM78900_B0 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
 #endif
@@ -955,6 +1131,51 @@
 #endif
 
 
+/*
+ * BCM78903
+ */
+
+/* Sets the default include state if it was not given */
+#ifndef BCMDRD_CONFIG_INCLUDE_BCM78903
+#define BCMDRD_CONFIG_INCLUDE_BCM78903 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
+#endif
+/* Resolve revision dependencies */
+#ifndef BCMDRD_CONFIG_INCLUDE_BCM78903_Bx
+#define BCMDRD_CONFIG_INCLUDE_BCM78903_Bx BCMDRD_CONFIG_INCLUDE_BCM78903
+#endif
+#ifndef BCMDRD_CONFIG_INCLUDE_BCM78903_B0
+#define BCMDRD_CONFIG_INCLUDE_BCM78903_B0 BCMDRD_CONFIG_INCLUDE_BCM78903_Bx
+#endif
+/* Resolve all interchip dependencies */
+#if BCMDRD_CONFIG_INCLUDE_BCM78903_B0 == 1
+#ifndef BCMDRD_CONFIG_INCLUDE_BCM78900_B0
+#define BCMDRD_CONFIG_INCLUDE_BCM78900_B0 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
+#endif
+#if BCMDRD_CONFIG_INCLUDE_BCM78900_B0 != 1
+#undef BCMDRD_CONFIG_INCLUDE_BCM78900_B0
+#define BCMDRD_CONFIG_INCLUDE_BCM78900_B0 1
+#define BCMDRD_CONFIG_INCLUDE_BCM78900_B0_IMPLIED 1
+#endif
+#endif
+
+
+/*
+ * BCM78905
+ */
+
+/* Sets the default include state if it was not given */
+#ifndef BCMDRD_CONFIG_INCLUDE_BCM78905
+#define BCMDRD_CONFIG_INCLUDE_BCM78905 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT
+#endif
+/* Resolve revision dependencies */
+#ifndef BCMDRD_CONFIG_INCLUDE_BCM78905_Ax
+#define BCMDRD_CONFIG_INCLUDE_BCM78905_Ax BCMDRD_CONFIG_INCLUDE_BCM78905
+#endif
+#ifndef BCMDRD_CONFIG_INCLUDE_BCM78905_A0
+#define BCMDRD_CONFIG_INCLUDE_BCM78905_A0 BCMDRD_CONFIG_INCLUDE_BCM78905_Ax
+#endif
+
+
 #endif /* BCMDRD_CONFIG_CHIPS_H */
 
 /*
@@ -965,21 +1186,39 @@
 CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56080)
 CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56080_Ax)
 CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56080_A0)
+CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56080_A1)
 #ifdef BCMDRD_CONFIG_INCLUDE_BCM56080_A0_IMPLIED
 CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56080_A0_IMPLIED)
 #endif
 CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56081)
 CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56081_Ax)
 CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56081_A0)
+CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56081_A1)
 CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56082)
 CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56082_Ax)
 CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56082_A0)
+CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56082_A1)
 CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56083)
 CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56083_Ax)
 CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56083_A0)
+CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56083_A1)
 CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56084)
 CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56084_Ax)
 CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56084_A0)
+CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56084_A1)
+CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56085)
+CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56085_Ax)
+CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56085_A0)
+CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56085_A1)
+CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56690)
+CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56690_Ax)
+CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56690_A0)
+#ifdef BCMDRD_CONFIG_INCLUDE_BCM56690_A0_IMPLIED
+CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56690_A0_IMPLIED)
+#endif
+CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56692)
+CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56692_Ax)
+CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56692_A0)
 CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56780)
 CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56780_Ax)
 CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56780_A0)
@@ -989,6 +1228,7 @@ CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56780_A0_IMPLIED)
 CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56782)
 CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56782_Ax)
 CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56782_A0)
+CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56782_A1)
 CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56784)
 CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56784_Ax)
 CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56784_A0)
@@ -998,12 +1238,15 @@ CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56785_A0)
 CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56786)
 CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56786_Ax)
 CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56786_A0)
+CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56786_A1)
 CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56787)
 CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56787_Ax)
 CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56787_A0)
+CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56787_A1)
 CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56788)
 CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56788_Ax)
 CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56788_A0)
+CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56788_A1)
 CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56789)
 CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56789_Ax)
 CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM56789_A0)
@@ -1104,8 +1347,17 @@ CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM78900_B0)
 #ifdef BCMDRD_CONFIG_INCLUDE_BCM78900_B0_IMPLIED
 CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM78900_B0_IMPLIED)
 #endif
+CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM78902)
+CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM78902_Bx)
+CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM78902_B0)
+CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM78903)
+CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM78903_Bx)
+CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM78903_B0)
 CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM78905)
-CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM78905_Bx)
-CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM78905_B0)
+CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM78905_Ax)
+CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM78905_A0)
+#ifdef BCMDRD_CONFIG_INCLUDE_BCM78905_A0_IMPLIED
+CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM78905_A0_IMPLIED)
+#endif
 #undef CONFIG_OPTION
 #endif /* #ifdef CONFIG_OPTION */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/bcmlrd_local_types.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/bcmlrd_local_types.h
new file mode 100644
index 000000000..16bd47565
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/bcmlrd_local_types.h
@@ -0,0 +1,127 @@
+/*! \file bcmlrd_local_types.h
+ *
+ * \brief Local Logical Table Types
+ *
+ * This file should not depend on any other header files than the SAL
+ * types. It is used for building libraries that are only a small
+ * subset of the full SDK (e.g. the PMD library).
+ *
+ */
+/*
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ */
+
+#ifndef BCMLRD_LOCAL_TYPES_H
+#define BCMLRD_LOCAL_TYPES_H
+
+#include <sal/sal_types.h>
+
+/*! Create enumeration values from list of supported variants. */
+#define BCMLRD_VARIANT_ENTRY(_bd,_bu,_va,_ve,_vu,_vv,_vo,_vd,_r0,_r1)\
+    BCMLRD_VARIANT_T_##_bd##_##_ve,
+
+/*! Enumeration for all device variants. */
+typedef enum bcmlrd_variant_e {
+    BCMLRD_VARIANT_T_NONE = 0,
+/*! \cond */
+#include <bcmlrd/chip/bcmlrd_chip_variant.h>
+/*! \endcond */
+     BCMLRD_VARIANT_T_COUNT
+} bcmlrd_variant_t;
+
+/*!
+ * \brief Information on match ID fields.
+ *
+ * This structure is used to store information for each
+ * match id field.
+ *
+ */
+typedef struct bcmlrd_match_id_db_s {
+    /*! Match ID name. */
+    const char *name;
+
+    /*! Match. */
+    uint32_t match;
+
+    /*! Mask for match. */
+    uint32_t match_mask;
+
+    /*! Maxbit of the match id field in the physical container. */
+    uint8_t match_maxbit;
+
+    /*! Minbit of the match id field in the physical container. */
+    uint8_t match_minbit;
+
+    /*! Maxbit of the match id field. */
+    uint8_t maxbit;
+
+    /*! Minbit of the match id field. */
+    uint8_t minbit;
+
+    /*! Default value for the match id field. */
+    uint32_t value;
+
+    /*! Mask for the default value for the match id field. */
+    uint32_t mask;
+
+    /*! Maxbit of the field within match_id container. */
+    uint8_t pmaxbit;
+
+    /*! Minbit of the field within match_id container. */
+    uint8_t pminbit;
+
+    /*! ARC ID zone minbit. */
+    uint8_t zone_minbit;
+
+    /*! ARC ID mask. */
+    uint64_t arc_id_mask;
+
+    /*! Number of words used by zone bitmap. */
+    uint8_t num_zone_bmp_words;
+
+    /*! Zone bitmap. */
+    uint32_t *zone_bmp;
+} bcmlrd_match_id_db_t;
+
+/*!
+ * \brief Get device variant.
+ *
+ * Get device logical table variant,
+ * which is an enumeration of all supported logical table variants.
+ *
+ * \param [in] unit Unit number.
+ *
+ * \retval Variant type.
+ */
+extern bcmlrd_variant_t
+bcmlrd_variant_get(int unit);
+
+/*!
+ * \brief Set device variant.
+ *
+ * Set device logical table variant,
+ * which is an enumeration of all supported logical table variants.
+ *
+ * \param [in] unit     Unit number.
+ * \param [in] variant  BCMLRD variant enumeration.
+ *
+ * \retval 0  OK
+ * \retval <0 ERROR
+ */
+extern int
+bcmlrd_variant_set(int unit, bcmlrd_variant_t variant);
+
+#endif /* BCMLRD_LOCAL_TYPES_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/bcmlrd_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/bcmlrd_variant.h
index 2949f6626..057605be6 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/bcmlrd_variant.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/bcmlrd_variant.h
@@ -13,7 +13,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/chip/bcmlrd_chip_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/chip/bcmlrd_chip_variant.h
index 1d746a2e9..89a7dc11c 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/chip/bcmlrd_chip_variant.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/chip/bcmlrd_chip_variant.h
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/chip/generated/bcmlrd_variant_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/chip/generated/bcmlrd_variant_defs.h
new file mode 100644
index 000000000..891c47c0c
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/chip/generated/bcmlrd_variant_defs.h
@@ -0,0 +1,39 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCMLRD_CHIP_VARIANT_DEFS_H
+#define GEN_BCMLRD_CHIP_VARIANT_DEFS_H
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#include <bcmltd/chip/generated/bcmltd_variant_defs.h>
+#include <bcmlrd/chip/generated/bcmlrd_variant_defs_internal.h>
+#include <bcmlrd/chip/generated/bcmlrd_variant_limits.h>
+
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+#endif /* GEN_BCMLRD_CHIP_VARIANT_DEFS_H */
+
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/chip/generated/bcmlrd_variant_defs_internal.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/chip/generated/bcmlrd_variant_defs_internal.h
new file mode 100644
index 000000000..93529349f
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/chip/generated/bcmlrd_variant_defs_internal.h
@@ -0,0 +1,56 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table definition files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ *
+ ******************************************************************************/
+#ifndef BCMLRD_VARIANT_DEFS_INTERNAL_H
+#define BCMLRD_VARIANT_DEFS_INTERNAL_H
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+/*+replace reverse */
+#include "../../defs/generated/bcm78905_a0/bcm78905_a0_lrd_variant_def.h"
+#include "../../defs/generated/bcm78900_b0/bcm78900_b0_lrd_variant_def.h"
+#include "../../defs/generated/bcm56999_a0/bcm56999_a0_lrd_variant_def.h"
+#include "../../defs/generated/bcm56998_a0/bcm56998_a0_lrd_variant_def.h"
+#include "../../defs/generated/bcm56996_b0/bcm56996_b0_lrd_variant_def.h"
+#include "../../defs/generated/bcm56996_a0/bcm56996_a0_lrd_variant_def.h"
+#include "../../defs/generated/bcm56990_b0/bcm56990_b0_lrd_variant_def.h"
+#include "../../defs/generated/bcm56990_a0/bcm56990_a0_lrd_variant_def.h"
+#include "../../defs/generated/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_lrd_variant_def.h"
+#include "../../defs/generated/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_lrd_variant_def.h"
+#include "../../defs/generated/bcm56890_a0/bcm56890_a0_lrd_variant_def.h"
+#include "../../defs/generated/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_lrd_variant_def.h"
+#include "../../defs/generated/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_lrd_variant_def.h"
+#include "../../defs/generated/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_lrd_variant_def.h"
+#include "../../defs/generated/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_lrd_variant_def.h"
+#include "../../defs/generated/bcm56880_a0/bcm56880_a0_lrd_variant_def.h"
+#include "../../defs/generated/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_lrd_variant_def.h"
+#include "../../defs/generated/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_lrd_variant_def.h"
+#include "../../defs/generated/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_lrd_variant_def.h"
+#include "../../defs/generated/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_lrd_variant_def.h"
+#include "../../defs/generated/bcm56780_a0/bcm56780_a0_lrd_variant_def.h"
+#include "../../defs/generated/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_lrd_variant_def.h"
+#include "../../defs/generated/bcm56690_a0/bcm56690_a0_lrd_variant_def.h"
+#include "../../defs/generated/bcm56080_a0/bcm56080_a0_lrd_variant_def.h"
+/*-replace*/
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+#endif /* BCMLRD_VARIANT_DEFS_INTERNAL_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/utltm/bcm56880_a0_utltm_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/chip/generated/bcmlrd_variant_limits.h
similarity index 77%
rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/utltm/bcm56880_a0_utltm_ltd_variant_def.h
rename to platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/chip/generated/bcmlrd_variant_limits.h
index ce6a7109d..2e84a01c7 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/utltm/bcm56880_a0_utltm_ltd_variant_def.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/chip/generated/bcmlrd_variant_limits.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -24,14 +24,14 @@
  *
  ******************************************************************************/
 
-#ifndef GEN_BCM56880_A0_UTLTM_LTD_VARIANT_DEF_H
-#define GEN_BCM56880_A0_UTLTM_LTD_VARIANT_DEF_H
+#ifndef GEN_BCMLRD_CHIP_VARIANT_LIMITS_H
+#define GEN_BCMLRD_CHIP_VARIANT_LIMITS_H
 
 #ifndef DOXYGEN_IGNORE_AUTOGEN
 
-#define BCMLTD_VARIANT_BCM56880_A0_UTLTM 20
-#define BCMLTD_VARIANT_LOCAL_BCM56880_A0_UTLTM 6
+#define BCMLRD_VARIANT_MAX BCMLTD_VARIANT_MAX
+
 #endif /* DOXYGEN_IGNORE_AUTOGEN */
 
-#endif /* GEN_BCM56880_A0_UTLTM_LTD_VARIANT_DEF_H */
+#endif /* GEN_BCMLRD_CHIP_VARIANT_LIMITS_H */
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/utcfg/bcm56880_a0_utcfg_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56080_a0/bcm56080_a0_lrd_variant_def.h
similarity index 77%
rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/utcfg/bcm56880_a0_utcfg_ltd_variant_def.h
rename to platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56080_a0/bcm56080_a0_lrd_variant_def.h
index 154ab0648..fdd590bad 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/utcfg/bcm56880_a0_utcfg_ltd_variant_def.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56080_a0/bcm56080_a0_lrd_variant_def.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -24,14 +24,13 @@
  *
  ******************************************************************************/
 
-#ifndef GEN_BCM56880_A0_UTCFG_LTD_VARIANT_DEF_H
-#define GEN_BCM56880_A0_UTCFG_LTD_VARIANT_DEF_H
+#ifndef GEN_BCM56080_A0_LRD_VARIANT_DEF_H
+#define GEN_BCM56080_A0_LRD_VARIANT_DEF_H
 
 #ifndef DOXYGEN_IGNORE_AUTOGEN
 
-#define BCMLTD_VARIANT_BCM56880_A0_UTCFG 18
-#define BCMLTD_VARIANT_LOCAL_BCM56880_A0_UTCFG 4
+#define BCMLRD_VARIANT_BCM56080_A0_BASE BCMLTD_VARIANT_BCM56080_A0_BASE
 #endif /* DOXYGEN_IGNORE_AUTOGEN */
 
-#endif /* GEN_BCM56880_A0_UTCFG_LTD_VARIANT_DEF_H */
+#endif /* GEN_BCM56080_A0_LRD_VARIANT_DEF_H */
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/utlrd/bcm56880_a0_utlrd_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56690_a0/bcm56690_a0_lrd_variant_def.h
similarity index 77%
rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/utlrd/bcm56880_a0_utlrd_ltd_variant_def.h
rename to platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56690_a0/bcm56690_a0_lrd_variant_def.h
index 6a7659d09..24ec0672a 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/utlrd/bcm56880_a0_utlrd_ltd_variant_def.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56690_a0/bcm56690_a0_lrd_variant_def.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -24,14 +24,13 @@
  *
  ******************************************************************************/
 
-#ifndef GEN_BCM56880_A0_UTLRD_LTD_VARIANT_DEF_H
-#define GEN_BCM56880_A0_UTLRD_LTD_VARIANT_DEF_H
+#ifndef GEN_BCM56690_A0_LRD_VARIANT_DEF_H
+#define GEN_BCM56690_A0_LRD_VARIANT_DEF_H
 
 #ifndef DOXYGEN_IGNORE_AUTOGEN
 
-#define BCMLTD_VARIANT_BCM56880_A0_UTLRD 19
-#define BCMLTD_VARIANT_LOCAL_BCM56880_A0_UTLRD 5
+#define BCMLRD_VARIANT_BCM56690_A0_BASE BCMLTD_VARIANT_BCM56690_A0_BASE
 #endif /* DOXYGEN_IGNORE_AUTOGEN */
 
-#endif /* GEN_BCM56880_A0_UTLRD_LTD_VARIANT_DEF_H */
+#endif /* GEN_BCM56690_A0_LRD_VARIANT_DEF_H */
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_lrd_variant_def.h
new file mode 100644
index 000000000..7ca42dd78
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_lrd_variant_def.h
@@ -0,0 +1,36 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM56690_A0_DNA_6_5_29_0_1_LRD_VARIANT_DEF_H
+#define GEN_BCM56690_A0_DNA_6_5_29_0_1_LRD_VARIANT_DEF_H
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#define BCMLRD_VARIANT_BCM56690_A0_DNA_6_5_29_0_1 BCMLTD_VARIANT_BCM56690_A0_DNA_6_5_29_0_1
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+#endif /* GEN_BCM56690_A0_DNA_6_5_29_0_1_LRD_VARIANT_DEF_H */
+
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/cna_1_2_13/bcm56880_a0_cna_1_2_13_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/bcm56780_a0_lrd_variant_def.h
similarity index 76%
rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/cna_1_2_13/bcm56880_a0_cna_1_2_13_ltd_variant_def.h
rename to platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/bcm56780_a0_lrd_variant_def.h
index e6efc2937..75b351525 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/cna_1_2_13/bcm56880_a0_cna_1_2_13_ltd_variant_def.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/bcm56780_a0_lrd_variant_def.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -24,14 +24,13 @@
  *
  ******************************************************************************/
 
-#ifndef GEN_BCM56880_A0_CNA_1_2_13_LTD_VARIANT_DEF_H
-#define GEN_BCM56880_A0_CNA_1_2_13_LTD_VARIANT_DEF_H
+#ifndef GEN_BCM56780_A0_LRD_VARIANT_DEF_H
+#define GEN_BCM56780_A0_LRD_VARIANT_DEF_H
 
 #ifndef DOXYGEN_IGNORE_AUTOGEN
 
-#define BCMLTD_VARIANT_BCM56880_A0_CNA_1_2_13 15
-#define BCMLTD_VARIANT_LOCAL_BCM56880_A0_CNA_1_2_13 1
+#define BCMLRD_VARIANT_BCM56780_A0_BASE BCMLTD_VARIANT_BCM56780_A0_BASE
 #endif /* DOXYGEN_IGNORE_AUTOGEN */
 
-#endif /* GEN_BCM56880_A0_CNA_1_2_13_LTD_VARIANT_DEF_H */
+#endif /* GEN_BCM56780_A0_LRD_VARIANT_DEF_H */
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_lrd_variant_def.h
new file mode 100644
index 000000000..2cff9e508
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_lrd_variant_def.h
@@ -0,0 +1,36 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM56780_A0_CNA_6_5_29_LRD_VARIANT_DEF_H
+#define GEN_BCM56780_A0_CNA_6_5_29_LRD_VARIANT_DEF_H
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#define BCMLRD_VARIANT_BCM56780_A0_CNA_6_5_29 BCMLTD_VARIANT_BCM56780_A0_CNA_6_5_29
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+#endif /* GEN_BCM56780_A0_CNA_6_5_29_LRD_VARIANT_DEF_H */
+
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_lrd_variant_def.h
new file mode 100644
index 000000000..50ff08e32
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_lrd_variant_def.h
@@ -0,0 +1,36 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM56780_A0_DNA_2_9_5_0_LRD_VARIANT_DEF_H
+#define GEN_BCM56780_A0_DNA_2_9_5_0_LRD_VARIANT_DEF_H
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#define BCMLRD_VARIANT_BCM56780_A0_DNA_2_9_5_0 BCMLTD_VARIANT_BCM56780_A0_DNA_2_9_5_0
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+#endif /* GEN_BCM56780_A0_DNA_2_9_5_0_LRD_VARIANT_DEF_H */
+
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_lrd_variant_def.h
new file mode 100644
index 000000000..08de29da3
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_lrd_variant_def.h
@@ -0,0 +1,36 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM56780_A0_HNA_6_5_29_2_1_LRD_VARIANT_DEF_H
+#define GEN_BCM56780_A0_HNA_6_5_29_2_1_LRD_VARIANT_DEF_H
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#define BCMLRD_VARIANT_BCM56780_A0_HNA_6_5_29_2_1 BCMLTD_VARIANT_BCM56780_A0_HNA_6_5_29_2_1
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+#endif /* GEN_BCM56780_A0_HNA_6_5_29_2_1_LRD_VARIANT_DEF_H */
+
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_lrd_variant_def.h
new file mode 100644
index 000000000..408b41986
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_lrd_variant_def.h
@@ -0,0 +1,36 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM56780_A0_INA_2_6_11_0_LRD_VARIANT_DEF_H
+#define GEN_BCM56780_A0_INA_2_6_11_0_LRD_VARIANT_DEF_H
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#define BCMLRD_VARIANT_BCM56780_A0_INA_2_6_11_0 BCMLTD_VARIANT_BCM56780_A0_INA_2_6_11_0
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+#endif /* GEN_BCM56780_A0_INA_2_6_11_0_LRD_VARIANT_DEF_H */
+
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/bcm56880_a0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/bcm56880_a0_lrd_variant_def.h
new file mode 100644
index 000000000..ee2fe45de
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/bcm56880_a0_lrd_variant_def.h
@@ -0,0 +1,36 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM56880_A0_LRD_VARIANT_DEF_H
+#define GEN_BCM56880_A0_LRD_VARIANT_DEF_H
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#define BCMLRD_VARIANT_BCM56880_A0_BASE BCMLTD_VARIANT_BCM56880_A0_BASE
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+#endif /* GEN_BCM56880_A0_LRD_VARIANT_DEF_H */
+
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_lrd_variant_def.h
new file mode 100644
index 000000000..09997a84f
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_lrd_variant_def.h
@@ -0,0 +1,36 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM56880_A0_CNA_6_5_29_LRD_VARIANT_DEF_H
+#define GEN_BCM56880_A0_CNA_6_5_29_LRD_VARIANT_DEF_H
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#define BCMLRD_VARIANT_BCM56880_A0_CNA_6_5_29 BCMLTD_VARIANT_BCM56880_A0_CNA_6_5_29
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+#endif /* GEN_BCM56880_A0_CNA_6_5_29_LRD_VARIANT_DEF_H */
+
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_lrd_variant_def.h
new file mode 100644
index 000000000..4949bfe0c
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_lrd_variant_def.h
@@ -0,0 +1,36 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM56880_A0_DNA_4_11_4_0_LRD_VARIANT_DEF_H
+#define GEN_BCM56880_A0_DNA_4_11_4_0_LRD_VARIANT_DEF_H
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#define BCMLRD_VARIANT_BCM56880_A0_DNA_4_11_4_0 BCMLTD_VARIANT_BCM56880_A0_DNA_4_11_4_0
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+#endif /* GEN_BCM56880_A0_DNA_4_11_4_0_LRD_VARIANT_DEF_H */
+
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_lrd_variant_def.h
new file mode 100644
index 000000000..e915df627
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_lrd_variant_def.h
@@ -0,0 +1,36 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM56880_A0_HNA_6_5_29_2_2_LRD_VARIANT_DEF_H
+#define GEN_BCM56880_A0_HNA_6_5_29_2_2_LRD_VARIANT_DEF_H
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#define BCMLRD_VARIANT_BCM56880_A0_HNA_6_5_29_2_2 BCMLTD_VARIANT_BCM56880_A0_HNA_6_5_29_2_2
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+#endif /* GEN_BCM56880_A0_HNA_6_5_29_2_2_LRD_VARIANT_DEF_H */
+
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_lrd_variant_def.h
new file mode 100644
index 000000000..e1b3b4a6f
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_lrd_variant_def.h
@@ -0,0 +1,36 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM56880_A0_NFA_2_1_7_0_LRD_VARIANT_DEF_H
+#define GEN_BCM56880_A0_NFA_2_1_7_0_LRD_VARIANT_DEF_H
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#define BCMLRD_VARIANT_BCM56880_A0_NFA_2_1_7_0 BCMLTD_VARIANT_BCM56880_A0_NFA_2_1_7_0
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+#endif /* GEN_BCM56880_A0_NFA_2_1_7_0_LRD_VARIANT_DEF_H */
+
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56890_a0/bcm56890_a0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56890_a0/bcm56890_a0_lrd_variant_def.h
new file mode 100644
index 000000000..632d17ad3
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56890_a0/bcm56890_a0_lrd_variant_def.h
@@ -0,0 +1,36 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM56890_A0_LRD_VARIANT_DEF_H
+#define GEN_BCM56890_A0_LRD_VARIANT_DEF_H
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#define BCMLRD_VARIANT_BCM56890_A0_BASE BCMLTD_VARIANT_BCM56890_A0_BASE
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+#endif /* GEN_BCM56890_A0_LRD_VARIANT_DEF_H */
+
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_lrd_variant_def.h
new file mode 100644
index 000000000..3bc2b93ba
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_lrd_variant_def.h
@@ -0,0 +1,36 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM56890_A0_CNA_6_5_29_LRD_VARIANT_DEF_H
+#define GEN_BCM56890_A0_CNA_6_5_29_LRD_VARIANT_DEF_H
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#define BCMLRD_VARIANT_BCM56890_A0_CNA_6_5_29 BCMLTD_VARIANT_BCM56890_A0_CNA_6_5_29
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+#endif /* GEN_BCM56890_A0_CNA_6_5_29_LRD_VARIANT_DEF_H */
+
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_lrd_variant_def.h
new file mode 100644
index 000000000..3aeffb766
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_lrd_variant_def.h
@@ -0,0 +1,36 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM56890_A0_DNA_6_5_29_1_2_LRD_VARIANT_DEF_H
+#define GEN_BCM56890_A0_DNA_6_5_29_1_2_LRD_VARIANT_DEF_H
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#define BCMLRD_VARIANT_BCM56890_A0_DNA_6_5_29_1_2 BCMLTD_VARIANT_BCM56890_A0_DNA_6_5_29_1_2
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+#endif /* GEN_BCM56890_A0_DNA_6_5_29_1_2_LRD_VARIANT_DEF_H */
+
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56990_a0/bcm56990_a0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56990_a0/bcm56990_a0_lrd_variant_def.h
new file mode 100644
index 000000000..d2da0a890
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56990_a0/bcm56990_a0_lrd_variant_def.h
@@ -0,0 +1,36 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM56990_A0_LRD_VARIANT_DEF_H
+#define GEN_BCM56990_A0_LRD_VARIANT_DEF_H
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#define BCMLRD_VARIANT_BCM56990_A0_BASE BCMLTD_VARIANT_BCM56990_A0_BASE
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+#endif /* GEN_BCM56990_A0_LRD_VARIANT_DEF_H */
+
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56990_b0/bcm56990_b0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56990_b0/bcm56990_b0_lrd_variant_def.h
new file mode 100644
index 000000000..cbca48393
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56990_b0/bcm56990_b0_lrd_variant_def.h
@@ -0,0 +1,36 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM56990_B0_LRD_VARIANT_DEF_H
+#define GEN_BCM56990_B0_LRD_VARIANT_DEF_H
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#define BCMLRD_VARIANT_BCM56990_B0_BASE BCMLTD_VARIANT_BCM56990_B0_BASE
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+#endif /* GEN_BCM56990_B0_LRD_VARIANT_DEF_H */
+
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56996_a0/bcm56996_a0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56996_a0/bcm56996_a0_lrd_variant_def.h
new file mode 100644
index 000000000..3e10c55d1
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56996_a0/bcm56996_a0_lrd_variant_def.h
@@ -0,0 +1,36 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM56996_A0_LRD_VARIANT_DEF_H
+#define GEN_BCM56996_A0_LRD_VARIANT_DEF_H
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#define BCMLRD_VARIANT_BCM56996_A0_BASE BCMLTD_VARIANT_BCM56996_A0_BASE
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+#endif /* GEN_BCM56996_A0_LRD_VARIANT_DEF_H */
+
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56996_b0/bcm56996_b0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56996_b0/bcm56996_b0_lrd_variant_def.h
new file mode 100644
index 000000000..aae5253af
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56996_b0/bcm56996_b0_lrd_variant_def.h
@@ -0,0 +1,36 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM56996_B0_LRD_VARIANT_DEF_H
+#define GEN_BCM56996_B0_LRD_VARIANT_DEF_H
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#define BCMLRD_VARIANT_BCM56996_B0_BASE BCMLTD_VARIANT_BCM56996_B0_BASE
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+#endif /* GEN_BCM56996_B0_LRD_VARIANT_DEF_H */
+
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56998_a0/bcm56998_a0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56998_a0/bcm56998_a0_lrd_variant_def.h
new file mode 100644
index 000000000..97faa4b4f
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56998_a0/bcm56998_a0_lrd_variant_def.h
@@ -0,0 +1,36 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM56998_A0_LRD_VARIANT_DEF_H
+#define GEN_BCM56998_A0_LRD_VARIANT_DEF_H
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#define BCMLRD_VARIANT_BCM56998_A0_BASE BCMLTD_VARIANT_BCM56998_A0_BASE
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+#endif /* GEN_BCM56998_A0_LRD_VARIANT_DEF_H */
+
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56999_a0/bcm56999_a0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56999_a0/bcm56999_a0_lrd_variant_def.h
new file mode 100644
index 000000000..b47835d17
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56999_a0/bcm56999_a0_lrd_variant_def.h
@@ -0,0 +1,36 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM56999_A0_LRD_VARIANT_DEF_H
+#define GEN_BCM56999_A0_LRD_VARIANT_DEF_H
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#define BCMLRD_VARIANT_BCM56999_A0_BASE BCMLTD_VARIANT_BCM56999_A0_BASE
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+#endif /* GEN_BCM56999_A0_LRD_VARIANT_DEF_H */
+
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78900_b0/bcm78900_b0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78900_b0/bcm78900_b0_lrd_variant_def.h
new file mode 100644
index 000000000..97cd19d0c
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78900_b0/bcm78900_b0_lrd_variant_def.h
@@ -0,0 +1,36 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM78900_B0_LRD_VARIANT_DEF_H
+#define GEN_BCM78900_B0_LRD_VARIANT_DEF_H
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#define BCMLRD_VARIANT_BCM78900_B0_BASE BCMLTD_VARIANT_BCM78900_B0_BASE
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+#endif /* GEN_BCM78900_B0_LRD_VARIANT_DEF_H */
+
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78905_a0/bcm78905_a0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78905_a0/bcm78905_a0_lrd_variant_def.h
new file mode 100644
index 000000000..f89062126
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78905_a0/bcm78905_a0_lrd_variant_def.h
@@ -0,0 +1,36 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM78905_A0_LRD_VARIANT_DEF_H
+#define GEN_BCM78905_A0_LRD_VARIANT_DEF_H
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#define BCMLRD_VARIANT_BCM78905_A0_BASE BCMLTD_VARIANT_BCM78905_A0_BASE
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+#endif /* GEN_BCM78905_A0_LRD_VARIANT_DEF_H */
+
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/bcmltd_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/bcmltd_variant.h
index 18abbe880..0cc8db4a5 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/bcmltd_variant.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/bcmltd_variant.h
@@ -36,7 +36,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/bcmltd_chip_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/bcmltd_chip_variant.h
index c4a5131ef..e485e8e48 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/bcmltd_chip_variant.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/bcmltd_chip_variant.h
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/bcmltd_variant_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/bcmltd_variant_defs.h
index 2dfe7fe81..7e3bc1b1b 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/bcmltd_variant_defs.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/bcmltd_variant_defs.h
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/hna_1_2_10_0/bcm56780_a0_hna_1_2_10_0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_config_variant.h
similarity index 63%
rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/hna_1_2_10_0/bcm56780_a0_hna_1_2_10_0_ltd_variant_entry.h
rename to platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_config_variant.h
index 27d73773b..f98c93617 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/hna_1_2_10_0/bcm56780_a0_hna_1_2_10_0_ltd_variant_entry.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_config_variant.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -24,17 +24,24 @@
  *
  ******************************************************************************/
 
-#ifndef GEN_BCM56780_A0_HNA_1_2_10_0_LTD_VARIANT_ENTRY_H
-#define GEN_BCM56780_A0_HNA_1_2_10_0_LTD_VARIANT_ENTRY_H
-#include <bcmltd/defs/generated/bcm56780_a0/hna_1_2_10_0/bcm56780_a0_hna_1_2_10_0_ltd_variant_def.h>
-#endif /* GEN_BCM56780_A0_HNA_1_2_10_0_LTD_VARIANT_ENTRY_H */
+#ifndef GEN_BCMLTD_CONFIG_VARIANT_H
+#define GEN_BCMLTD_CONFIG_VARIANT_H
 
 #ifndef DOXYGEN_IGNORE_AUTOGEN
 
-#if BCMLTD_CONFIG_INCLUDE_BCM56780_A0_HNA_1_2_10_0 == 1 || defined(BCMLTD_VARIANT_OVERRIDE)
-BCMLTD_VARIANT_ENTRY(bcm56780_a0,BCM56780_A0,hna_1_2_10_0,HNA_1_2_10_0,_,BCMLTD_VARIANT_BCM56780_A0_HNA_1_2_10_0,BCMLTD_VARIANT_LOCAL_BCM56780_A0_HNA_1_2_10_0,NULL,0,0)
+#include <bcmdrd_config.h>
+
+/* This determines whether a BASE variant is included or excluded by default */
+#ifndef BCMLTD_CONFIG_INCLUDE_BASE_DEFAULT
+#define BCMLTD_CONFIG_INCLUDE_BASE_DEFAULT 1
 #endif
 
-#endif /* DOXYGEN_IGNORE_AUTOGEN */
+/* This determines whether a variant is included or excluded by default */
+#ifndef BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT
+#define BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT 1
+#endif
+#include <bcmltd/chip/generated/bcmltd_config_variant_internal.h>
 
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
 
+#endif /* GEN_BCMLTD_CONFIG_VARIANT_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_config_variant_internal.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_config_variant_internal.h
new file mode 100644
index 000000000..6dc83335f
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_config_variant_internal.h
@@ -0,0 +1,56 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table definition files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ *
+ ******************************************************************************/
+#ifndef GEN_BCMLTD_CONFIG_VARIANT_INTERNAL_H
+#define GEN_BCMLTD_CONFIG_VARIANT_INTERNAL_H
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+/*+replace reverse */
+#include "../../conf/generated/bcm78905_a0/bcm78905_a0_ltd_config_variant.h"
+#include "../../conf/generated/bcm78900_b0/bcm78900_b0_ltd_config_variant.h"
+#include "../../conf/generated/bcm56999_a0/bcm56999_a0_ltd_config_variant.h"
+#include "../../conf/generated/bcm56998_a0/bcm56998_a0_ltd_config_variant.h"
+#include "../../conf/generated/bcm56996_b0/bcm56996_b0_ltd_config_variant.h"
+#include "../../conf/generated/bcm56996_a0/bcm56996_a0_ltd_config_variant.h"
+#include "../../conf/generated/bcm56990_b0/bcm56990_b0_ltd_config_variant.h"
+#include "../../conf/generated/bcm56990_a0/bcm56990_a0_ltd_config_variant.h"
+#include "../../conf/generated/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_ltd_config_variant.h"
+#include "../../conf/generated/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_ltd_config_variant.h"
+#include "../../conf/generated/bcm56890_a0/bcm56890_a0_ltd_config_variant.h"
+#include "../../conf/generated/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_ltd_config_variant.h"
+#include "../../conf/generated/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_ltd_config_variant.h"
+#include "../../conf/generated/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_ltd_config_variant.h"
+#include "../../conf/generated/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_ltd_config_variant.h"
+#include "../../conf/generated/bcm56880_a0/bcm56880_a0_ltd_config_variant.h"
+#include "../../conf/generated/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_ltd_config_variant.h"
+#include "../../conf/generated/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_ltd_config_variant.h"
+#include "../../conf/generated/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_ltd_config_variant.h"
+#include "../../conf/generated/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_ltd_config_variant.h"
+#include "../../conf/generated/bcm56780_a0/bcm56780_a0_ltd_config_variant.h"
+#include "../../conf/generated/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_ltd_config_variant.h"
+#include "../../conf/generated/bcm56690_a0/bcm56690_a0_ltd_config_variant.h"
+#include "../../conf/generated/bcm56080_a0/bcm56080_a0_ltd_config_variant.h"
+/*-replace*/
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+#endif /* GEN_BCMLTD_CONFIG_VARIANT_INTERNAL_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_defs.h
new file mode 100644
index 000000000..0bda0b4d3
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_defs.h
@@ -0,0 +1,38 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCMLTD_VARIANT_DEFS_H
+#define GEN_BCMLTD_VARIANT_DEFS_H
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#include <bcmltd/chip/generated/bcmltd_variant_defs_internal.h>
+#include <bcmltd/chip/generated/bcmltd_variant_limits.h>
+
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+#endif /* GEN_BCMLTD_VARIANT_DEFS_H */
+
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_defs_internal.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_defs_internal.h
new file mode 100644
index 000000000..100228395
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_defs_internal.h
@@ -0,0 +1,56 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table definition files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ *
+ ******************************************************************************/
+#ifndef GEN_BCMLTD_VARIANT_DEFS_INTERNAL_H
+#define GEN_BCMLTD_VARIANT_DEFS_INTERNAL_H
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+/*+replace reverse */
+#include "../../defs/generated/bcm78905_a0/bcm78905_a0_ltd_variant_def.h"
+#include "../../defs/generated/bcm78900_b0/bcm78900_b0_ltd_variant_def.h"
+#include "../../defs/generated/bcm56999_a0/bcm56999_a0_ltd_variant_def.h"
+#include "../../defs/generated/bcm56998_a0/bcm56998_a0_ltd_variant_def.h"
+#include "../../defs/generated/bcm56996_b0/bcm56996_b0_ltd_variant_def.h"
+#include "../../defs/generated/bcm56996_a0/bcm56996_a0_ltd_variant_def.h"
+#include "../../defs/generated/bcm56990_b0/bcm56990_b0_ltd_variant_def.h"
+#include "../../defs/generated/bcm56990_a0/bcm56990_a0_ltd_variant_def.h"
+#include "../../defs/generated/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_ltd_variant_def.h"
+#include "../../defs/generated/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_ltd_variant_def.h"
+#include "../../defs/generated/bcm56890_a0/bcm56890_a0_ltd_variant_def.h"
+#include "../../defs/generated/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_ltd_variant_def.h"
+#include "../../defs/generated/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_ltd_variant_def.h"
+#include "../../defs/generated/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_ltd_variant_def.h"
+#include "../../defs/generated/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_ltd_variant_def.h"
+#include "../../defs/generated/bcm56880_a0/bcm56880_a0_ltd_variant_def.h"
+#include "../../defs/generated/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_ltd_variant_def.h"
+#include "../../defs/generated/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_ltd_variant_def.h"
+#include "../../defs/generated/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_ltd_variant_def.h"
+#include "../../defs/generated/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_ltd_variant_def.h"
+#include "../../defs/generated/bcm56780_a0/bcm56780_a0_ltd_variant_def.h"
+#include "../../defs/generated/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_ltd_variant_def.h"
+#include "../../defs/generated/bcm56690_a0/bcm56690_a0_ltd_variant_def.h"
+#include "../../defs/generated/bcm56080_a0/bcm56080_a0_ltd_variant_def.h"
+/*-replace*/
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+#endif /* GEN_BCMLTD_VARIANT_DEFS_INTERNAL_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_entry.h
new file mode 100644
index 000000000..74284a458
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_entry.h
@@ -0,0 +1,57 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table definition files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ *
+ ******************************************************************************/
+#ifndef GEN_BCMLTD_VARIANT_ENTRY_H
+#define GEN_BCMLTD_VARIANT_ENTRY_H
+/* guard deliberately empty */
+#endif /* GEN_BCMLTD_VARIANT_ENTRY_H */
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+/*+replace variant */
+#include "../../entry/generated/bcm56080_a0/bcm56080_a0_ltd_variant_entry.h"
+#include "../../entry/generated/bcm56690_a0/bcm56690_a0_ltd_variant_entry.h"
+#include "../../entry/generated/bcm56780_a0/bcm56780_a0_ltd_variant_entry.h"
+#include "../../entry/generated/bcm56880_a0/bcm56880_a0_ltd_variant_entry.h"
+#include "../../entry/generated/bcm56890_a0/bcm56890_a0_ltd_variant_entry.h"
+#include "../../entry/generated/bcm56990_a0/bcm56990_a0_ltd_variant_entry.h"
+#include "../../entry/generated/bcm56990_b0/bcm56990_b0_ltd_variant_entry.h"
+#include "../../entry/generated/bcm56996_a0/bcm56996_a0_ltd_variant_entry.h"
+#include "../../entry/generated/bcm56996_b0/bcm56996_b0_ltd_variant_entry.h"
+#include "../../entry/generated/bcm56998_a0/bcm56998_a0_ltd_variant_entry.h"
+#include "../../entry/generated/bcm56999_a0/bcm56999_a0_ltd_variant_entry.h"
+#include "../../entry/generated/bcm78900_b0/bcm78900_b0_ltd_variant_entry.h"
+#include "../../entry/generated/bcm78905_a0/bcm78905_a0_ltd_variant_entry.h"
+#include "../../entry/generated/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_ltd_variant_entry.h"
+#include "../../entry/generated/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_ltd_variant_entry.h"
+#include "../../entry/generated/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_ltd_variant_entry.h"
+#include "../../entry/generated/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_ltd_variant_entry.h"
+#include "../../entry/generated/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_ltd_variant_entry.h"
+#include "../../entry/generated/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_ltd_variant_entry.h"
+#include "../../entry/generated/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_ltd_variant_entry.h"
+#include "../../entry/generated/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_ltd_variant_entry.h"
+#include "../../entry/generated/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_ltd_variant_entry.h"
+#include "../../entry/generated/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_ltd_variant_entry.h"
+#include "../../entry/generated/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_ltd_variant_entry.h"
+/*-replace*/
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_limits.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_limits.h
new file mode 100644
index 000000000..906edf814
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_limits.h
@@ -0,0 +1,37 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCMLTD_VARIANT_LIMITS_H
+#define GEN_BCMLTD_VARIANT_LIMITS_H
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#define BCMLTD_VARIANT_MAX 24
+
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+#endif /* GEN_BCMLTD_VARIANT_LIMITS_H */
+
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/utcfg/bcm56880_a0_utcfg_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56080_a0/bcm56080_a0_ltd_config_variant.h
similarity index 66%
rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/utcfg/bcm56880_a0_utcfg_ltd_variant_entry.h
rename to platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56080_a0/bcm56080_a0_ltd_config_variant.h
index db4192647..d629bff89 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/utcfg/bcm56880_a0_utcfg_ltd_variant_entry.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56080_a0/bcm56080_a0_ltd_config_variant.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -24,17 +24,22 @@
  *
  ******************************************************************************/
 
-#ifndef GEN_BCM56880_A0_UTCFG_LTD_VARIANT_ENTRY_H
-#define GEN_BCM56880_A0_UTCFG_LTD_VARIANT_ENTRY_H
-#include <bcmltd/defs/generated/bcm56880_a0/utcfg/bcm56880_a0_utcfg_ltd_variant_def.h>
-#endif /* GEN_BCM56880_A0_UTCFG_LTD_VARIANT_ENTRY_H */
+#ifndef GEN_BCM56080_A0_LTD_CONFIG_VARIANT_H
+#define GEN_BCM56080_A0_LTD_CONFIG_VARIANT_H
 
 #ifndef DOXYGEN_IGNORE_AUTOGEN
 
-#if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_UTCFG == 1 || defined(BCMLTD_VARIANT_OVERRIDE)
-BCMLTD_VARIANT_ENTRY(bcm56880_a0,BCM56880_A0,utcfg,UTCFG,_,BCMLTD_VARIANT_BCM56880_A0_UTCFG,BCMLTD_VARIANT_LOCAL_BCM56880_A0_UTCFG,NULL,0,0)
+#if BCMDRD_CONFIG_INCLUDE_BCM56080_A0
+#ifndef BCMLTD_CONFIG_INCLUDE_BCM56080_A0_BASE
+#define BCMLTD_CONFIG_INCLUDE_BCM56080_A0_BASE BCMLTD_CONFIG_INCLUDE_BASE_DEFAULT
+#endif
+#else
+#define BCMLTD_CONFIG_INCLUDE_BCM56080_A0_BASE 0
 #endif
 
-#endif /* DOXYGEN_IGNORE_AUTOGEN */
+#define BCMLTD_VARIANT_BCM56080_A0_BASE 1
+#define BCMLTD_VARIANT_LOCAL_BCM56080_A0_BASE 0
 
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
 
+#endif /* GEN_BCM56080_A0_LTD_CONFIG_VARIANT_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/utlrd/bcm56880_a0_utlrd_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56690_a0/bcm56690_a0_ltd_config_variant.h
similarity index 66%
rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/utlrd/bcm56880_a0_utlrd_ltd_variant_entry.h
rename to platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56690_a0/bcm56690_a0_ltd_config_variant.h
index 6ba897bc6..30106f763 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/utlrd/bcm56880_a0_utlrd_ltd_variant_entry.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56690_a0/bcm56690_a0_ltd_config_variant.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -24,17 +24,22 @@
  *
  ******************************************************************************/
 
-#ifndef GEN_BCM56880_A0_UTLRD_LTD_VARIANT_ENTRY_H
-#define GEN_BCM56880_A0_UTLRD_LTD_VARIANT_ENTRY_H
-#include <bcmltd/defs/generated/bcm56880_a0/utlrd/bcm56880_a0_utlrd_ltd_variant_def.h>
-#endif /* GEN_BCM56880_A0_UTLRD_LTD_VARIANT_ENTRY_H */
+#ifndef GEN_BCM56690_A0_LTD_CONFIG_VARIANT_H
+#define GEN_BCM56690_A0_LTD_CONFIG_VARIANT_H
 
 #ifndef DOXYGEN_IGNORE_AUTOGEN
 
-#if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_UTLRD == 1 || defined(BCMLTD_VARIANT_OVERRIDE)
-BCMLTD_VARIANT_ENTRY(bcm56880_a0,BCM56880_A0,utlrd,UTLRD,_,BCMLTD_VARIANT_BCM56880_A0_UTLRD,BCMLTD_VARIANT_LOCAL_BCM56880_A0_UTLRD,NULL,0,0)
+#if BCMDRD_CONFIG_INCLUDE_BCM56690_A0
+#ifndef BCMLTD_CONFIG_INCLUDE_BCM56690_A0_BASE
+#define BCMLTD_CONFIG_INCLUDE_BCM56690_A0_BASE BCMLTD_CONFIG_INCLUDE_BASE_DEFAULT
+#endif
+#else
+#define BCMLTD_CONFIG_INCLUDE_BCM56690_A0_BASE 0
 #endif
 
-#endif /* DOXYGEN_IGNORE_AUTOGEN */
+#define BCMLTD_VARIANT_BCM56690_A0_BASE 2
+#define BCMLTD_VARIANT_LOCAL_BCM56690_A0_BASE 0
 
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
 
+#endif /* GEN_BCM56690_A0_LTD_CONFIG_VARIANT_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_ltd_config_variant.h
new file mode 100644
index 000000000..7227784ce
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_ltd_config_variant.h
@@ -0,0 +1,49 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM56690_A0_DNA_6_5_29_0_1_LTD_CONFIG_VARIANT_H
+#define GEN_BCM56690_A0_DNA_6_5_29_0_1_LTD_CONFIG_VARIANT_H
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#if BCMDRD_CONFIG_INCLUDE_BCM56690_A0
+#ifndef BCMLTD_CONFIG_INCLUDE_BCM56690_A0_DNA_6_5_29_0_1
+#define BCMLTD_CONFIG_INCLUDE_BCM56690_A0_DNA_6_5_29_0_1 BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT
+#endif
+#if BCMLTD_CONFIG_INCLUDE_BCM56690_A0_DNA_6_5_29_0_1 == 1
+#ifndef BCMLTD_CONFIG_INCLUDE_BCM56690_A0_BASE
+#define BCMLTD_CONFIG_INCLUDE_BCM56690_A0_BASE 1
+#endif
+#if BCMLTD_CONFIG_INCLUDE_BCM56690_A0_BASE == 0
+#error Inconsistent variant flags BCMLTD_CONFIG_INCLUDE_BCM56690_A0_DNA_6_5_29_0_1=1, BCMLTD_CONFIG_INCLUDE_BCM56690_A0_BASE=0.
+#endif
+#endif
+#else
+#define BCMLTD_CONFIG_INCLUDE_BCM56690_A0_DNA_6_5_29_0_1 0
+#endif
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+#endif /* GEN_BCM56690_A0_DNA_6_5_29_0_1_LTD_CONFIG_VARIANT_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/utltm/bcm56880_a0_utltm_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/bcm56780_a0_ltd_config_variant.h
similarity index 66%
rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/utltm/bcm56880_a0_utltm_ltd_variant_entry.h
rename to platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/bcm56780_a0_ltd_config_variant.h
index 6adb5eda2..90be2f0c9 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/utltm/bcm56880_a0_utltm_ltd_variant_entry.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/bcm56780_a0_ltd_config_variant.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -24,17 +24,22 @@
  *
  ******************************************************************************/
 
-#ifndef GEN_BCM56880_A0_UTLTM_LTD_VARIANT_ENTRY_H
-#define GEN_BCM56880_A0_UTLTM_LTD_VARIANT_ENTRY_H
-#include <bcmltd/defs/generated/bcm56880_a0/utltm/bcm56880_a0_utltm_ltd_variant_def.h>
-#endif /* GEN_BCM56880_A0_UTLTM_LTD_VARIANT_ENTRY_H */
+#ifndef GEN_BCM56780_A0_LTD_CONFIG_VARIANT_H
+#define GEN_BCM56780_A0_LTD_CONFIG_VARIANT_H
 
 #ifndef DOXYGEN_IGNORE_AUTOGEN
 
-#if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_UTLTM == 1 || defined(BCMLTD_VARIANT_OVERRIDE)
-BCMLTD_VARIANT_ENTRY(bcm56880_a0,BCM56880_A0,utltm,UTLTM,_,BCMLTD_VARIANT_BCM56880_A0_UTLTM,BCMLTD_VARIANT_LOCAL_BCM56880_A0_UTLTM,NULL,0,0)
+#if BCMDRD_CONFIG_INCLUDE_BCM56780_A0
+#ifndef BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE
+#define BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE BCMLTD_CONFIG_INCLUDE_BASE_DEFAULT
+#endif
+#else
+#define BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE 0
 #endif
 
-#endif /* DOXYGEN_IGNORE_AUTOGEN */
+#define BCMLTD_VARIANT_BCM56780_A0_BASE 3
+#define BCMLTD_VARIANT_LOCAL_BCM56780_A0_BASE 0
 
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
 
+#endif /* GEN_BCM56780_A0_LTD_CONFIG_VARIANT_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_ltd_config_variant.h
new file mode 100644
index 000000000..6042fcf71
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_ltd_config_variant.h
@@ -0,0 +1,49 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM56780_A0_CNA_6_5_29_LTD_CONFIG_VARIANT_H
+#define GEN_BCM56780_A0_CNA_6_5_29_LTD_CONFIG_VARIANT_H
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#if BCMDRD_CONFIG_INCLUDE_BCM56780_A0
+#ifndef BCMLTD_CONFIG_INCLUDE_BCM56780_A0_CNA_6_5_29
+#define BCMLTD_CONFIG_INCLUDE_BCM56780_A0_CNA_6_5_29 BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT
+#endif
+#if BCMLTD_CONFIG_INCLUDE_BCM56780_A0_CNA_6_5_29 == 1
+#ifndef BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE
+#define BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE 1
+#endif
+#if BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE == 0
+#error Inconsistent variant flags BCMLTD_CONFIG_INCLUDE_BCM56780_A0_CNA_6_5_29=1, BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE=0.
+#endif
+#endif
+#else
+#define BCMLTD_CONFIG_INCLUDE_BCM56780_A0_CNA_6_5_29 0
+#endif
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+#endif /* GEN_BCM56780_A0_CNA_6_5_29_LTD_CONFIG_VARIANT_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_ltd_config_variant.h
new file mode 100644
index 000000000..9180de748
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_ltd_config_variant.h
@@ -0,0 +1,49 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM56780_A0_DNA_2_9_5_0_LTD_CONFIG_VARIANT_H
+#define GEN_BCM56780_A0_DNA_2_9_5_0_LTD_CONFIG_VARIANT_H
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#if BCMDRD_CONFIG_INCLUDE_BCM56780_A0
+#ifndef BCMLTD_CONFIG_INCLUDE_BCM56780_A0_DNA_2_9_5_0
+#define BCMLTD_CONFIG_INCLUDE_BCM56780_A0_DNA_2_9_5_0 BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT
+#endif
+#if BCMLTD_CONFIG_INCLUDE_BCM56780_A0_DNA_2_9_5_0 == 1
+#ifndef BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE
+#define BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE 1
+#endif
+#if BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE == 0
+#error Inconsistent variant flags BCMLTD_CONFIG_INCLUDE_BCM56780_A0_DNA_2_9_5_0=1, BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE=0.
+#endif
+#endif
+#else
+#define BCMLTD_CONFIG_INCLUDE_BCM56780_A0_DNA_2_9_5_0 0
+#endif
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+#endif /* GEN_BCM56780_A0_DNA_2_9_5_0_LTD_CONFIG_VARIANT_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_ltd_config_variant.h
new file mode 100644
index 000000000..e8742350a
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_ltd_config_variant.h
@@ -0,0 +1,49 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM56780_A0_HNA_6_5_29_2_1_LTD_CONFIG_VARIANT_H
+#define GEN_BCM56780_A0_HNA_6_5_29_2_1_LTD_CONFIG_VARIANT_H
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#if BCMDRD_CONFIG_INCLUDE_BCM56780_A0
+#ifndef BCMLTD_CONFIG_INCLUDE_BCM56780_A0_HNA_6_5_29_2_1
+#define BCMLTD_CONFIG_INCLUDE_BCM56780_A0_HNA_6_5_29_2_1 BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT
+#endif
+#if BCMLTD_CONFIG_INCLUDE_BCM56780_A0_HNA_6_5_29_2_1 == 1
+#ifndef BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE
+#define BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE 1
+#endif
+#if BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE == 0
+#error Inconsistent variant flags BCMLTD_CONFIG_INCLUDE_BCM56780_A0_HNA_6_5_29_2_1=1, BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE=0.
+#endif
+#endif
+#else
+#define BCMLTD_CONFIG_INCLUDE_BCM56780_A0_HNA_6_5_29_2_1 0
+#endif
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+#endif /* GEN_BCM56780_A0_HNA_6_5_29_2_1_LTD_CONFIG_VARIANT_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_ltd_config_variant.h
new file mode 100644
index 000000000..2e32d65b2
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_ltd_config_variant.h
@@ -0,0 +1,49 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM56780_A0_INA_2_6_11_0_LTD_CONFIG_VARIANT_H
+#define GEN_BCM56780_A0_INA_2_6_11_0_LTD_CONFIG_VARIANT_H
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#if BCMDRD_CONFIG_INCLUDE_BCM56780_A0
+#ifndef BCMLTD_CONFIG_INCLUDE_BCM56780_A0_INA_2_6_11_0
+#define BCMLTD_CONFIG_INCLUDE_BCM56780_A0_INA_2_6_11_0 BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT
+#endif
+#if BCMLTD_CONFIG_INCLUDE_BCM56780_A0_INA_2_6_11_0 == 1
+#ifndef BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE
+#define BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE 1
+#endif
+#if BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE == 0
+#error Inconsistent variant flags BCMLTD_CONFIG_INCLUDE_BCM56780_A0_INA_2_6_11_0=1, BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE=0.
+#endif
+#endif
+#else
+#define BCMLTD_CONFIG_INCLUDE_BCM56780_A0_INA_2_6_11_0 0
+#endif
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+#endif /* GEN_BCM56780_A0_INA_2_6_11_0_LTD_CONFIG_VARIANT_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/bcm56880_a0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/bcm56880_a0_ltd_config_variant.h
new file mode 100644
index 000000000..9e3c6596f
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/bcm56880_a0_ltd_config_variant.h
@@ -0,0 +1,45 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM56880_A0_LTD_CONFIG_VARIANT_H
+#define GEN_BCM56880_A0_LTD_CONFIG_VARIANT_H
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#if BCMDRD_CONFIG_INCLUDE_BCM56880_A0
+#ifndef BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE
+#define BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE BCMLTD_CONFIG_INCLUDE_BASE_DEFAULT
+#endif
+#else
+#define BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE 0
+#endif
+
+#define BCMLTD_VARIANT_BCM56880_A0_BASE 4
+#define BCMLTD_VARIANT_LOCAL_BCM56880_A0_BASE 0
+
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+#endif /* GEN_BCM56880_A0_LTD_CONFIG_VARIANT_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_ltd_config_variant.h
new file mode 100644
index 000000000..8f1c699c6
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_ltd_config_variant.h
@@ -0,0 +1,49 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM56880_A0_CNA_6_5_29_LTD_CONFIG_VARIANT_H
+#define GEN_BCM56880_A0_CNA_6_5_29_LTD_CONFIG_VARIANT_H
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#if BCMDRD_CONFIG_INCLUDE_BCM56880_A0
+#ifndef BCMLTD_CONFIG_INCLUDE_BCM56880_A0_CNA_6_5_29
+#define BCMLTD_CONFIG_INCLUDE_BCM56880_A0_CNA_6_5_29 BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT
+#endif
+#if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_CNA_6_5_29 == 1
+#ifndef BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE
+#define BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE 1
+#endif
+#if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE == 0
+#error Inconsistent variant flags BCMLTD_CONFIG_INCLUDE_BCM56880_A0_CNA_6_5_29=1, BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE=0.
+#endif
+#endif
+#else
+#define BCMLTD_CONFIG_INCLUDE_BCM56880_A0_CNA_6_5_29 0
+#endif
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+#endif /* GEN_BCM56880_A0_CNA_6_5_29_LTD_CONFIG_VARIANT_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_ltd_config_variant.h
new file mode 100644
index 000000000..e8e0257ed
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_ltd_config_variant.h
@@ -0,0 +1,49 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM56880_A0_DNA_4_11_4_0_LTD_CONFIG_VARIANT_H
+#define GEN_BCM56880_A0_DNA_4_11_4_0_LTD_CONFIG_VARIANT_H
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#if BCMDRD_CONFIG_INCLUDE_BCM56880_A0
+#ifndef BCMLTD_CONFIG_INCLUDE_BCM56880_A0_DNA_4_11_4_0
+#define BCMLTD_CONFIG_INCLUDE_BCM56880_A0_DNA_4_11_4_0 BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT
+#endif
+#if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_DNA_4_11_4_0 == 1
+#ifndef BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE
+#define BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE 1
+#endif
+#if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE == 0
+#error Inconsistent variant flags BCMLTD_CONFIG_INCLUDE_BCM56880_A0_DNA_4_11_4_0=1, BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE=0.
+#endif
+#endif
+#else
+#define BCMLTD_CONFIG_INCLUDE_BCM56880_A0_DNA_4_11_4_0 0
+#endif
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+#endif /* GEN_BCM56880_A0_DNA_4_11_4_0_LTD_CONFIG_VARIANT_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_ltd_config_variant.h
new file mode 100644
index 000000000..980b45b9a
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_ltd_config_variant.h
@@ -0,0 +1,49 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM56880_A0_HNA_6_5_29_2_2_LTD_CONFIG_VARIANT_H
+#define GEN_BCM56880_A0_HNA_6_5_29_2_2_LTD_CONFIG_VARIANT_H
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#if BCMDRD_CONFIG_INCLUDE_BCM56880_A0
+#ifndef BCMLTD_CONFIG_INCLUDE_BCM56880_A0_HNA_6_5_29_2_2
+#define BCMLTD_CONFIG_INCLUDE_BCM56880_A0_HNA_6_5_29_2_2 BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT
+#endif
+#if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_HNA_6_5_29_2_2 == 1
+#ifndef BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE
+#define BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE 1
+#endif
+#if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE == 0
+#error Inconsistent variant flags BCMLTD_CONFIG_INCLUDE_BCM56880_A0_HNA_6_5_29_2_2=1, BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE=0.
+#endif
+#endif
+#else
+#define BCMLTD_CONFIG_INCLUDE_BCM56880_A0_HNA_6_5_29_2_2 0
+#endif
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+#endif /* GEN_BCM56880_A0_HNA_6_5_29_2_2_LTD_CONFIG_VARIANT_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_ltd_config_variant.h
new file mode 100644
index 000000000..29d6d5f89
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_ltd_config_variant.h
@@ -0,0 +1,49 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM56880_A0_NFA_2_1_7_0_LTD_CONFIG_VARIANT_H
+#define GEN_BCM56880_A0_NFA_2_1_7_0_LTD_CONFIG_VARIANT_H
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#if BCMDRD_CONFIG_INCLUDE_BCM56880_A0
+#ifndef BCMLTD_CONFIG_INCLUDE_BCM56880_A0_NFA_2_1_7_0
+#define BCMLTD_CONFIG_INCLUDE_BCM56880_A0_NFA_2_1_7_0 BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT
+#endif
+#if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_NFA_2_1_7_0 == 1
+#ifndef BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE
+#define BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE 1
+#endif
+#if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE == 0
+#error Inconsistent variant flags BCMLTD_CONFIG_INCLUDE_BCM56880_A0_NFA_2_1_7_0=1, BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE=0.
+#endif
+#endif
+#else
+#define BCMLTD_CONFIG_INCLUDE_BCM56880_A0_NFA_2_1_7_0 0
+#endif
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+#endif /* GEN_BCM56880_A0_NFA_2_1_7_0_LTD_CONFIG_VARIANT_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56890_a0/bcm56890_a0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56890_a0/bcm56890_a0_ltd_config_variant.h
new file mode 100644
index 000000000..66c3e309c
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56890_a0/bcm56890_a0_ltd_config_variant.h
@@ -0,0 +1,45 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM56890_A0_LTD_CONFIG_VARIANT_H
+#define GEN_BCM56890_A0_LTD_CONFIG_VARIANT_H
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#if BCMDRD_CONFIG_INCLUDE_BCM56890_A0
+#ifndef BCMLTD_CONFIG_INCLUDE_BCM56890_A0_BASE
+#define BCMLTD_CONFIG_INCLUDE_BCM56890_A0_BASE BCMLTD_CONFIG_INCLUDE_BASE_DEFAULT
+#endif
+#else
+#define BCMLTD_CONFIG_INCLUDE_BCM56890_A0_BASE 0
+#endif
+
+#define BCMLTD_VARIANT_BCM56890_A0_BASE 5
+#define BCMLTD_VARIANT_LOCAL_BCM56890_A0_BASE 0
+
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+#endif /* GEN_BCM56890_A0_LTD_CONFIG_VARIANT_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_ltd_config_variant.h
new file mode 100644
index 000000000..1cef9cb84
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_ltd_config_variant.h
@@ -0,0 +1,49 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM56890_A0_CNA_6_5_29_LTD_CONFIG_VARIANT_H
+#define GEN_BCM56890_A0_CNA_6_5_29_LTD_CONFIG_VARIANT_H
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#if BCMDRD_CONFIG_INCLUDE_BCM56890_A0
+#ifndef BCMLTD_CONFIG_INCLUDE_BCM56890_A0_CNA_6_5_29
+#define BCMLTD_CONFIG_INCLUDE_BCM56890_A0_CNA_6_5_29 BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT
+#endif
+#if BCMLTD_CONFIG_INCLUDE_BCM56890_A0_CNA_6_5_29 == 1
+#ifndef BCMLTD_CONFIG_INCLUDE_BCM56890_A0_BASE
+#define BCMLTD_CONFIG_INCLUDE_BCM56890_A0_BASE 1
+#endif
+#if BCMLTD_CONFIG_INCLUDE_BCM56890_A0_BASE == 0
+#error Inconsistent variant flags BCMLTD_CONFIG_INCLUDE_BCM56890_A0_CNA_6_5_29=1, BCMLTD_CONFIG_INCLUDE_BCM56890_A0_BASE=0.
+#endif
+#endif
+#else
+#define BCMLTD_CONFIG_INCLUDE_BCM56890_A0_CNA_6_5_29 0
+#endif
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+#endif /* GEN_BCM56890_A0_CNA_6_5_29_LTD_CONFIG_VARIANT_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_ltd_config_variant.h
new file mode 100644
index 000000000..9a01f8bb0
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_ltd_config_variant.h
@@ -0,0 +1,49 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM56890_A0_DNA_6_5_29_1_2_LTD_CONFIG_VARIANT_H
+#define GEN_BCM56890_A0_DNA_6_5_29_1_2_LTD_CONFIG_VARIANT_H
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#if BCMDRD_CONFIG_INCLUDE_BCM56890_A0
+#ifndef BCMLTD_CONFIG_INCLUDE_BCM56890_A0_DNA_6_5_29_1_2
+#define BCMLTD_CONFIG_INCLUDE_BCM56890_A0_DNA_6_5_29_1_2 BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT
+#endif
+#if BCMLTD_CONFIG_INCLUDE_BCM56890_A0_DNA_6_5_29_1_2 == 1
+#ifndef BCMLTD_CONFIG_INCLUDE_BCM56890_A0_BASE
+#define BCMLTD_CONFIG_INCLUDE_BCM56890_A0_BASE 1
+#endif
+#if BCMLTD_CONFIG_INCLUDE_BCM56890_A0_BASE == 0
+#error Inconsistent variant flags BCMLTD_CONFIG_INCLUDE_BCM56890_A0_DNA_6_5_29_1_2=1, BCMLTD_CONFIG_INCLUDE_BCM56890_A0_BASE=0.
+#endif
+#endif
+#else
+#define BCMLTD_CONFIG_INCLUDE_BCM56890_A0_DNA_6_5_29_1_2 0
+#endif
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+#endif /* GEN_BCM56890_A0_DNA_6_5_29_1_2_LTD_CONFIG_VARIANT_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56990_a0/bcm56990_a0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56990_a0/bcm56990_a0_ltd_config_variant.h
new file mode 100644
index 000000000..77423d685
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56990_a0/bcm56990_a0_ltd_config_variant.h
@@ -0,0 +1,45 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM56990_A0_LTD_CONFIG_VARIANT_H
+#define GEN_BCM56990_A0_LTD_CONFIG_VARIANT_H
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#if BCMDRD_CONFIG_INCLUDE_BCM56990_A0
+#ifndef BCMLTD_CONFIG_INCLUDE_BCM56990_A0_BASE
+#define BCMLTD_CONFIG_INCLUDE_BCM56990_A0_BASE BCMLTD_CONFIG_INCLUDE_BASE_DEFAULT
+#endif
+#else
+#define BCMLTD_CONFIG_INCLUDE_BCM56990_A0_BASE 0
+#endif
+
+#define BCMLTD_VARIANT_BCM56990_A0_BASE 6
+#define BCMLTD_VARIANT_LOCAL_BCM56990_A0_BASE 0
+
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+#endif /* GEN_BCM56990_A0_LTD_CONFIG_VARIANT_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56990_b0/bcm56990_b0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56990_b0/bcm56990_b0_ltd_config_variant.h
new file mode 100644
index 000000000..02b632bda
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56990_b0/bcm56990_b0_ltd_config_variant.h
@@ -0,0 +1,45 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM56990_B0_LTD_CONFIG_VARIANT_H
+#define GEN_BCM56990_B0_LTD_CONFIG_VARIANT_H
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#if BCMDRD_CONFIG_INCLUDE_BCM56990_B0
+#ifndef BCMLTD_CONFIG_INCLUDE_BCM56990_B0_BASE
+#define BCMLTD_CONFIG_INCLUDE_BCM56990_B0_BASE BCMLTD_CONFIG_INCLUDE_BASE_DEFAULT
+#endif
+#else
+#define BCMLTD_CONFIG_INCLUDE_BCM56990_B0_BASE 0
+#endif
+
+#define BCMLTD_VARIANT_BCM56990_B0_BASE 7
+#define BCMLTD_VARIANT_LOCAL_BCM56990_B0_BASE 0
+
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+#endif /* GEN_BCM56990_B0_LTD_CONFIG_VARIANT_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56996_a0/bcm56996_a0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56996_a0/bcm56996_a0_ltd_config_variant.h
new file mode 100644
index 000000000..9d93800a5
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56996_a0/bcm56996_a0_ltd_config_variant.h
@@ -0,0 +1,45 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM56996_A0_LTD_CONFIG_VARIANT_H
+#define GEN_BCM56996_A0_LTD_CONFIG_VARIANT_H
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#if BCMDRD_CONFIG_INCLUDE_BCM56996_A0
+#ifndef BCMLTD_CONFIG_INCLUDE_BCM56996_A0_BASE
+#define BCMLTD_CONFIG_INCLUDE_BCM56996_A0_BASE BCMLTD_CONFIG_INCLUDE_BASE_DEFAULT
+#endif
+#else
+#define BCMLTD_CONFIG_INCLUDE_BCM56996_A0_BASE 0
+#endif
+
+#define BCMLTD_VARIANT_BCM56996_A0_BASE 8
+#define BCMLTD_VARIANT_LOCAL_BCM56996_A0_BASE 0
+
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+#endif /* GEN_BCM56996_A0_LTD_CONFIG_VARIANT_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56996_b0/bcm56996_b0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56996_b0/bcm56996_b0_ltd_config_variant.h
new file mode 100644
index 000000000..ada476f13
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56996_b0/bcm56996_b0_ltd_config_variant.h
@@ -0,0 +1,45 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM56996_B0_LTD_CONFIG_VARIANT_H
+#define GEN_BCM56996_B0_LTD_CONFIG_VARIANT_H
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#if BCMDRD_CONFIG_INCLUDE_BCM56996_B0
+#ifndef BCMLTD_CONFIG_INCLUDE_BCM56996_B0_BASE
+#define BCMLTD_CONFIG_INCLUDE_BCM56996_B0_BASE BCMLTD_CONFIG_INCLUDE_BASE_DEFAULT
+#endif
+#else
+#define BCMLTD_CONFIG_INCLUDE_BCM56996_B0_BASE 0
+#endif
+
+#define BCMLTD_VARIANT_BCM56996_B0_BASE 9
+#define BCMLTD_VARIANT_LOCAL_BCM56996_B0_BASE 0
+
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+#endif /* GEN_BCM56996_B0_LTD_CONFIG_VARIANT_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56998_a0/bcm56998_a0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56998_a0/bcm56998_a0_ltd_config_variant.h
new file mode 100644
index 000000000..ae5b86fc8
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56998_a0/bcm56998_a0_ltd_config_variant.h
@@ -0,0 +1,45 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM56998_A0_LTD_CONFIG_VARIANT_H
+#define GEN_BCM56998_A0_LTD_CONFIG_VARIANT_H
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#if BCMDRD_CONFIG_INCLUDE_BCM56998_A0
+#ifndef BCMLTD_CONFIG_INCLUDE_BCM56998_A0_BASE
+#define BCMLTD_CONFIG_INCLUDE_BCM56998_A0_BASE BCMLTD_CONFIG_INCLUDE_BASE_DEFAULT
+#endif
+#else
+#define BCMLTD_CONFIG_INCLUDE_BCM56998_A0_BASE 0
+#endif
+
+#define BCMLTD_VARIANT_BCM56998_A0_BASE 10
+#define BCMLTD_VARIANT_LOCAL_BCM56998_A0_BASE 0
+
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+#endif /* GEN_BCM56998_A0_LTD_CONFIG_VARIANT_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56999_a0/bcm56999_a0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56999_a0/bcm56999_a0_ltd_config_variant.h
new file mode 100644
index 000000000..34d7adec0
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56999_a0/bcm56999_a0_ltd_config_variant.h
@@ -0,0 +1,45 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM56999_A0_LTD_CONFIG_VARIANT_H
+#define GEN_BCM56999_A0_LTD_CONFIG_VARIANT_H
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#if BCMDRD_CONFIG_INCLUDE_BCM56999_A0
+#ifndef BCMLTD_CONFIG_INCLUDE_BCM56999_A0_BASE
+#define BCMLTD_CONFIG_INCLUDE_BCM56999_A0_BASE BCMLTD_CONFIG_INCLUDE_BASE_DEFAULT
+#endif
+#else
+#define BCMLTD_CONFIG_INCLUDE_BCM56999_A0_BASE 0
+#endif
+
+#define BCMLTD_VARIANT_BCM56999_A0_BASE 11
+#define BCMLTD_VARIANT_LOCAL_BCM56999_A0_BASE 0
+
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+#endif /* GEN_BCM56999_A0_LTD_CONFIG_VARIANT_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78900_b0/bcm78900_b0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78900_b0/bcm78900_b0_ltd_config_variant.h
new file mode 100644
index 000000000..eb7d14aab
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78900_b0/bcm78900_b0_ltd_config_variant.h
@@ -0,0 +1,45 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM78900_B0_LTD_CONFIG_VARIANT_H
+#define GEN_BCM78900_B0_LTD_CONFIG_VARIANT_H
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#if BCMDRD_CONFIG_INCLUDE_BCM78900_B0
+#ifndef BCMLTD_CONFIG_INCLUDE_BCM78900_B0_BASE
+#define BCMLTD_CONFIG_INCLUDE_BCM78900_B0_BASE BCMLTD_CONFIG_INCLUDE_BASE_DEFAULT
+#endif
+#else
+#define BCMLTD_CONFIG_INCLUDE_BCM78900_B0_BASE 0
+#endif
+
+#define BCMLTD_VARIANT_BCM78900_B0_BASE 12
+#define BCMLTD_VARIANT_LOCAL_BCM78900_B0_BASE 0
+
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+#endif /* GEN_BCM78900_B0_LTD_CONFIG_VARIANT_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78905_a0/bcm78905_a0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78905_a0/bcm78905_a0_ltd_config_variant.h
new file mode 100644
index 000000000..980b50cfc
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78905_a0/bcm78905_a0_ltd_config_variant.h
@@ -0,0 +1,45 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM78905_A0_LTD_CONFIG_VARIANT_H
+#define GEN_BCM78905_A0_LTD_CONFIG_VARIANT_H
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#if BCMDRD_CONFIG_INCLUDE_BCM78905_A0
+#ifndef BCMLTD_CONFIG_INCLUDE_BCM78905_A0_BASE
+#define BCMLTD_CONFIG_INCLUDE_BCM78905_A0_BASE BCMLTD_CONFIG_INCLUDE_BASE_DEFAULT
+#endif
+#else
+#define BCMLTD_CONFIG_INCLUDE_BCM78905_A0_BASE 0
+#endif
+
+#define BCMLTD_VARIANT_BCM78905_A0_BASE 13
+#define BCMLTD_VARIANT_LOCAL_BCM78905_A0_BASE 0
+
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+#endif /* GEN_BCM78905_A0_LTD_CONFIG_VARIANT_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56080_a0/bcm56080_a0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56080_a0/bcm56080_a0_ltd_variant_def.h
index eb0297e5a..cd374ca3f 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56080_a0/bcm56080_a0_ltd_variant_def.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56080_a0/bcm56080_a0_ltd_variant_def.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56690_a0/bcm56690_a0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56690_a0/bcm56690_a0_ltd_variant_def.h
new file mode 100644
index 000000000..6a0c404b2
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56690_a0/bcm56690_a0_ltd_variant_def.h
@@ -0,0 +1,37 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM56690_A0_LTD_VARIANT_DEF_H
+#define GEN_BCM56690_A0_LTD_VARIANT_DEF_H
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#define BCMLTD_VARIANT_BCM56690_A0_BASE 2
+#define BCMLTD_VARIANT_LOCAL_BCM56690_A0_BASE 0
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+#endif /* GEN_BCM56690_A0_LTD_VARIANT_DEF_H */
+
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/hna_1_2_10_0/bcm56880_a0_hna_1_2_10_0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_ltd_variant_def.h
similarity index 75%
rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/hna_1_2_10_0/bcm56880_a0_hna_1_2_10_0_ltd_variant_def.h
rename to platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_ltd_variant_def.h
index 1694f3a1a..cef356943 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/hna_1_2_10_0/bcm56880_a0_hna_1_2_10_0_ltd_variant_def.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_ltd_variant_def.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -24,14 +24,14 @@
  *
  ******************************************************************************/
 
-#ifndef GEN_BCM56880_A0_HNA_1_2_10_0_LTD_VARIANT_DEF_H
-#define GEN_BCM56880_A0_HNA_1_2_10_0_LTD_VARIANT_DEF_H
+#ifndef GEN_BCM56690_A0_DNA_6_5_29_0_1_LTD_VARIANT_DEF_H
+#define GEN_BCM56690_A0_DNA_6_5_29_0_1_LTD_VARIANT_DEF_H
 
 #ifndef DOXYGEN_IGNORE_AUTOGEN
 
-#define BCMLTD_VARIANT_BCM56880_A0_HNA_1_2_10_0 17
-#define BCMLTD_VARIANT_LOCAL_BCM56880_A0_HNA_1_2_10_0 3
+#define BCMLTD_VARIANT_BCM56690_A0_DNA_6_5_29_0_1 14
+#define BCMLTD_VARIANT_LOCAL_BCM56690_A0_DNA_6_5_29_0_1 1
 #endif /* DOXYGEN_IGNORE_AUTOGEN */
 
-#endif /* GEN_BCM56880_A0_HNA_1_2_10_0_LTD_VARIANT_DEF_H */
+#endif /* GEN_BCM56690_A0_DNA_6_5_29_0_1_LTD_VARIANT_DEF_H */
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/bcm56780_a0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/bcm56780_a0_ltd_variant_def.h
index a4a167739..fed9f85ab 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/bcm56780_a0_ltd_variant_def.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/bcm56780_a0_ltd_variant_def.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -29,7 +29,7 @@
 
 #ifndef DOXYGEN_IGNORE_AUTOGEN
 
-#define BCMLTD_VARIANT_BCM56780_A0_BASE 2
+#define BCMLTD_VARIANT_BCM56780_A0_BASE 3
 #define BCMLTD_VARIANT_LOCAL_BCM56780_A0_BASE 0
 #endif /* DOXYGEN_IGNORE_AUTOGEN */
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/cna_1_2_13/bcm56780_a0_cna_1_2_13_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_ltd_variant_def.h
similarity index 76%
rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/cna_1_2_13/bcm56780_a0_cna_1_2_13_ltd_variant_def.h
rename to platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_ltd_variant_def.h
index aa4b1b7dc..802092132 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/cna_1_2_13/bcm56780_a0_cna_1_2_13_ltd_variant_def.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_ltd_variant_def.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -24,14 +24,14 @@
  *
  ******************************************************************************/
 
-#ifndef GEN_BCM56780_A0_CNA_1_2_13_LTD_VARIANT_DEF_H
-#define GEN_BCM56780_A0_CNA_1_2_13_LTD_VARIANT_DEF_H
+#ifndef GEN_BCM56780_A0_CNA_6_5_29_LTD_VARIANT_DEF_H
+#define GEN_BCM56780_A0_CNA_6_5_29_LTD_VARIANT_DEF_H
 
 #ifndef DOXYGEN_IGNORE_AUTOGEN
 
-#define BCMLTD_VARIANT_BCM56780_A0_CNA_1_2_13 12
-#define BCMLTD_VARIANT_LOCAL_BCM56780_A0_CNA_1_2_13 1
+#define BCMLTD_VARIANT_BCM56780_A0_CNA_6_5_29 15
+#define BCMLTD_VARIANT_LOCAL_BCM56780_A0_CNA_6_5_29 1
 #endif /* DOXYGEN_IGNORE_AUTOGEN */
 
-#endif /* GEN_BCM56780_A0_CNA_1_2_13_LTD_VARIANT_DEF_H */
+#endif /* GEN_BCM56780_A0_CNA_6_5_29_LTD_VARIANT_DEF_H */
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_ltd_variant_def.h
index c6d993399..08fcbc515 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_ltd_variant_def.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_ltd_variant_def.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -29,7 +29,7 @@
 
 #ifndef DOXYGEN_IGNORE_AUTOGEN
 
-#define BCMLTD_VARIANT_BCM56780_A0_DNA_2_9_5_0 13
+#define BCMLTD_VARIANT_BCM56780_A0_DNA_2_9_5_0 16
 #define BCMLTD_VARIANT_LOCAL_BCM56780_A0_DNA_2_9_5_0 2
 #endif /* DOXYGEN_IGNORE_AUTOGEN */
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_ltd_variant_def.h
new file mode 100644
index 000000000..262e642c0
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_ltd_variant_def.h
@@ -0,0 +1,37 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM56780_A0_HNA_6_5_29_2_1_LTD_VARIANT_DEF_H
+#define GEN_BCM56780_A0_HNA_6_5_29_2_1_LTD_VARIANT_DEF_H
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#define BCMLTD_VARIANT_BCM56780_A0_HNA_6_5_29_2_1 17
+#define BCMLTD_VARIANT_LOCAL_BCM56780_A0_HNA_6_5_29_2_1 3
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+#endif /* GEN_BCM56780_A0_HNA_6_5_29_2_1_LTD_VARIANT_DEF_H */
+
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/hna_1_2_10_0/bcm56780_a0_hna_1_2_10_0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_ltd_variant_def.h
similarity index 75%
rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/hna_1_2_10_0/bcm56780_a0_hna_1_2_10_0_ltd_variant_def.h
rename to platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_ltd_variant_def.h
index 607e13695..d0f4b4348 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/hna_1_2_10_0/bcm56780_a0_hna_1_2_10_0_ltd_variant_def.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_ltd_variant_def.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -24,14 +24,14 @@
  *
  ******************************************************************************/
 
-#ifndef GEN_BCM56780_A0_HNA_1_2_10_0_LTD_VARIANT_DEF_H
-#define GEN_BCM56780_A0_HNA_1_2_10_0_LTD_VARIANT_DEF_H
+#ifndef GEN_BCM56780_A0_INA_2_6_11_0_LTD_VARIANT_DEF_H
+#define GEN_BCM56780_A0_INA_2_6_11_0_LTD_VARIANT_DEF_H
 
 #ifndef DOXYGEN_IGNORE_AUTOGEN
 
-#define BCMLTD_VARIANT_BCM56780_A0_HNA_1_2_10_0 14
-#define BCMLTD_VARIANT_LOCAL_BCM56780_A0_HNA_1_2_10_0 3
+#define BCMLTD_VARIANT_BCM56780_A0_INA_2_6_11_0 18
+#define BCMLTD_VARIANT_LOCAL_BCM56780_A0_INA_2_6_11_0 4
 #endif /* DOXYGEN_IGNORE_AUTOGEN */
 
-#endif /* GEN_BCM56780_A0_HNA_1_2_10_0_LTD_VARIANT_DEF_H */
+#endif /* GEN_BCM56780_A0_INA_2_6_11_0_LTD_VARIANT_DEF_H */
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/bcm56880_a0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/bcm56880_a0_ltd_variant_def.h
index 7b3f82532..55eb2c8d2 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/bcm56880_a0_ltd_variant_def.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/bcm56880_a0_ltd_variant_def.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -29,7 +29,7 @@
 
 #ifndef DOXYGEN_IGNORE_AUTOGEN
 
-#define BCMLTD_VARIANT_BCM56880_A0_BASE 3
+#define BCMLTD_VARIANT_BCM56880_A0_BASE 4
 #define BCMLTD_VARIANT_LOCAL_BCM56880_A0_BASE 0
 #endif /* DOXYGEN_IGNORE_AUTOGEN */
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_ltd_variant_def.h
new file mode 100644
index 000000000..3e770ef00
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_ltd_variant_def.h
@@ -0,0 +1,37 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM56880_A0_CNA_6_5_29_LTD_VARIANT_DEF_H
+#define GEN_BCM56880_A0_CNA_6_5_29_LTD_VARIANT_DEF_H
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#define BCMLTD_VARIANT_BCM56880_A0_CNA_6_5_29 19
+#define BCMLTD_VARIANT_LOCAL_BCM56880_A0_CNA_6_5_29 1
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+#endif /* GEN_BCM56880_A0_CNA_6_5_29_LTD_VARIANT_DEF_H */
+
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_ltd_variant_def.h
index e7af41f9b..f5b982438 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_ltd_variant_def.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_ltd_variant_def.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -29,7 +29,7 @@
 
 #ifndef DOXYGEN_IGNORE_AUTOGEN
 
-#define BCMLTD_VARIANT_BCM56880_A0_DNA_4_11_4_0 16
+#define BCMLTD_VARIANT_BCM56880_A0_DNA_4_11_4_0 20
 #define BCMLTD_VARIANT_LOCAL_BCM56880_A0_DNA_4_11_4_0 2
 #endif /* DOXYGEN_IGNORE_AUTOGEN */
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_ltd_variant_def.h
new file mode 100644
index 000000000..23fd31997
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_ltd_variant_def.h
@@ -0,0 +1,37 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM56880_A0_HNA_6_5_29_2_2_LTD_VARIANT_DEF_H
+#define GEN_BCM56880_A0_HNA_6_5_29_2_2_LTD_VARIANT_DEF_H
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#define BCMLTD_VARIANT_BCM56880_A0_HNA_6_5_29_2_2 21
+#define BCMLTD_VARIANT_LOCAL_BCM56880_A0_HNA_6_5_29_2_2 3
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+#endif /* GEN_BCM56880_A0_HNA_6_5_29_2_2_LTD_VARIANT_DEF_H */
+
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_ltd_variant_def.h
new file mode 100644
index 000000000..7adb2f316
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_ltd_variant_def.h
@@ -0,0 +1,37 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM56880_A0_NFA_2_1_7_0_LTD_VARIANT_DEF_H
+#define GEN_BCM56880_A0_NFA_2_1_7_0_LTD_VARIANT_DEF_H
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#define BCMLTD_VARIANT_BCM56880_A0_NFA_2_1_7_0 22
+#define BCMLTD_VARIANT_LOCAL_BCM56880_A0_NFA_2_1_7_0 4
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+#endif /* GEN_BCM56880_A0_NFA_2_1_7_0_LTD_VARIANT_DEF_H */
+
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/bcm56890_a0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/bcm56890_a0_ltd_variant_def.h
index 067cd3aa6..8ddcc4ae2 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/bcm56890_a0_ltd_variant_def.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/bcm56890_a0_ltd_variant_def.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -29,7 +29,7 @@
 
 #ifndef DOXYGEN_IGNORE_AUTOGEN
 
-#define BCMLTD_VARIANT_BCM56890_A0_BASE 4
+#define BCMLTD_VARIANT_BCM56890_A0_BASE 5
 #define BCMLTD_VARIANT_LOCAL_BCM56890_A0_BASE 0
 #endif /* DOXYGEN_IGNORE_AUTOGEN */
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_ltd_variant_def.h
new file mode 100644
index 000000000..69febdfe9
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_ltd_variant_def.h
@@ -0,0 +1,37 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM56890_A0_CNA_6_5_29_LTD_VARIANT_DEF_H
+#define GEN_BCM56890_A0_CNA_6_5_29_LTD_VARIANT_DEF_H
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#define BCMLTD_VARIANT_BCM56890_A0_CNA_6_5_29 23
+#define BCMLTD_VARIANT_LOCAL_BCM56890_A0_CNA_6_5_29 1
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+#endif /* GEN_BCM56890_A0_CNA_6_5_29_LTD_VARIANT_DEF_H */
+
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/dna_4_0_17_0/bcm56890_a0_dna_4_0_17_0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/dna_4_0_17_0/bcm56890_a0_dna_4_0_17_0_ltd_variant_def.h
deleted file mode 100644
index fcea5c979..000000000
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/dna_4_0_17_0/bcm56890_a0_dna_4_0_17_0_ltd_variant_def.h
+++ /dev/null
@@ -1,37 +0,0 @@
-/*******************************************************************************
- *
- * DO NOT EDIT THIS FILE!
- * This file is auto-generated by fltg from Logical Table mapping files.
- *
- * Tool: $SDK/tools/fltg/bin/fltg
- *
- * Edits to this file will be lost when it is regenerated.
- *
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
- * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
- * 
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License 
- * version 2 as published by the Free Software Foundation.
- * 
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- * 
- * A copy of the GNU General Public License version 2 (GPLv2) can
- * be found in the LICENSES folder.$
- *
- ******************************************************************************/
-
-#ifndef GEN_BCM56890_A0_DNA_4_0_17_0_LTD_VARIANT_DEF_H
-#define GEN_BCM56890_A0_DNA_4_0_17_0_LTD_VARIANT_DEF_H
-
-#ifndef DOXYGEN_IGNORE_AUTOGEN
-
-#define BCMLTD_VARIANT_BCM56890_A0_DNA_4_0_17_0 21
-#define BCMLTD_VARIANT_LOCAL_BCM56890_A0_DNA_4_0_17_0 1
-#endif /* DOXYGEN_IGNORE_AUTOGEN */
-
-#endif /* GEN_BCM56890_A0_DNA_4_0_17_0_LTD_VARIANT_DEF_H */
-
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_ltd_variant_def.h
new file mode 100644
index 000000000..9d77a8805
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_ltd_variant_def.h
@@ -0,0 +1,37 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM56890_A0_DNA_6_5_29_1_2_LTD_VARIANT_DEF_H
+#define GEN_BCM56890_A0_DNA_6_5_29_1_2_LTD_VARIANT_DEF_H
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#define BCMLTD_VARIANT_BCM56890_A0_DNA_6_5_29_1_2 24
+#define BCMLTD_VARIANT_LOCAL_BCM56890_A0_DNA_6_5_29_1_2 2
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+#endif /* GEN_BCM56890_A0_DNA_6_5_29_1_2_LTD_VARIANT_DEF_H */
+
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56990_a0/bcm56990_a0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56990_a0/bcm56990_a0_ltd_variant_def.h
index 0b136b21d..736ba9ae6 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56990_a0/bcm56990_a0_ltd_variant_def.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56990_a0/bcm56990_a0_ltd_variant_def.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -29,7 +29,7 @@
 
 #ifndef DOXYGEN_IGNORE_AUTOGEN
 
-#define BCMLTD_VARIANT_BCM56990_A0_BASE 5
+#define BCMLTD_VARIANT_BCM56990_A0_BASE 6
 #define BCMLTD_VARIANT_LOCAL_BCM56990_A0_BASE 0
 #endif /* DOXYGEN_IGNORE_AUTOGEN */
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56990_b0/bcm56990_b0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56990_b0/bcm56990_b0_ltd_variant_def.h
index 72f72fbd1..e0433c68e 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56990_b0/bcm56990_b0_ltd_variant_def.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56990_b0/bcm56990_b0_ltd_variant_def.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -29,7 +29,7 @@
 
 #ifndef DOXYGEN_IGNORE_AUTOGEN
 
-#define BCMLTD_VARIANT_BCM56990_B0_BASE 6
+#define BCMLTD_VARIANT_BCM56990_B0_BASE 7
 #define BCMLTD_VARIANT_LOCAL_BCM56990_B0_BASE 0
 #endif /* DOXYGEN_IGNORE_AUTOGEN */
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56996_a0/bcm56996_a0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56996_a0/bcm56996_a0_ltd_variant_def.h
index 80ef0b123..a33c95324 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56996_a0/bcm56996_a0_ltd_variant_def.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56996_a0/bcm56996_a0_ltd_variant_def.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -29,7 +29,7 @@
 
 #ifndef DOXYGEN_IGNORE_AUTOGEN
 
-#define BCMLTD_VARIANT_BCM56996_A0_BASE 7
+#define BCMLTD_VARIANT_BCM56996_A0_BASE 8
 #define BCMLTD_VARIANT_LOCAL_BCM56996_A0_BASE 0
 #endif /* DOXYGEN_IGNORE_AUTOGEN */
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56996_b0/bcm56996_b0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56996_b0/bcm56996_b0_ltd_variant_def.h
index 2a9e72e91..776f3a936 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56996_b0/bcm56996_b0_ltd_variant_def.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56996_b0/bcm56996_b0_ltd_variant_def.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -29,7 +29,7 @@
 
 #ifndef DOXYGEN_IGNORE_AUTOGEN
 
-#define BCMLTD_VARIANT_BCM56996_B0_BASE 8
+#define BCMLTD_VARIANT_BCM56996_B0_BASE 9
 #define BCMLTD_VARIANT_LOCAL_BCM56996_B0_BASE 0
 #endif /* DOXYGEN_IGNORE_AUTOGEN */
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56998_a0/bcm56998_a0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56998_a0/bcm56998_a0_ltd_variant_def.h
index a5ec341f3..42c700c8a 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56998_a0/bcm56998_a0_ltd_variant_def.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56998_a0/bcm56998_a0_ltd_variant_def.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -29,7 +29,7 @@
 
 #ifndef DOXYGEN_IGNORE_AUTOGEN
 
-#define BCMLTD_VARIANT_BCM56998_A0_BASE 9
+#define BCMLTD_VARIANT_BCM56998_A0_BASE 10
 #define BCMLTD_VARIANT_LOCAL_BCM56998_A0_BASE 0
 #endif /* DOXYGEN_IGNORE_AUTOGEN */
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56999_a0/bcm56999_a0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56999_a0/bcm56999_a0_ltd_variant_def.h
index 22ef37f20..ea1328bf7 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56999_a0/bcm56999_a0_ltd_variant_def.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56999_a0/bcm56999_a0_ltd_variant_def.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -29,7 +29,7 @@
 
 #ifndef DOXYGEN_IGNORE_AUTOGEN
 
-#define BCMLTD_VARIANT_BCM56999_A0_BASE 10
+#define BCMLTD_VARIANT_BCM56999_A0_BASE 11
 #define BCMLTD_VARIANT_LOCAL_BCM56999_A0_BASE 0
 #endif /* DOXYGEN_IGNORE_AUTOGEN */
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78900_b0/bcm78900_b0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78900_b0/bcm78900_b0_ltd_variant_def.h
index ed6b18f08..e645660d2 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78900_b0/bcm78900_b0_ltd_variant_def.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78900_b0/bcm78900_b0_ltd_variant_def.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -29,7 +29,7 @@
 
 #ifndef DOXYGEN_IGNORE_AUTOGEN
 
-#define BCMLTD_VARIANT_BCM78900_B0_BASE 11
+#define BCMLTD_VARIANT_BCM78900_B0_BASE 12
 #define BCMLTD_VARIANT_LOCAL_BCM78900_B0_BASE 0
 #endif /* DOXYGEN_IGNORE_AUTOGEN */
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78905_a0/bcm78905_a0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78905_a0/bcm78905_a0_ltd_variant_def.h
new file mode 100644
index 000000000..8b43d0ab1
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78905_a0/bcm78905_a0_ltd_variant_def.h
@@ -0,0 +1,37 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM78905_A0_LTD_VARIANT_DEF_H
+#define GEN_BCM78905_A0_LTD_VARIANT_DEF_H
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#define BCMLTD_VARIANT_BCM78905_A0_BASE 13
+#define BCMLTD_VARIANT_LOCAL_BCM78905_A0_BASE 0
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+#endif /* GEN_BCM78905_A0_LTD_VARIANT_DEF_H */
+
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56080_a0/bcm56080_a0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56080_a0/bcm56080_a0_ltd_variant_entry.h
index 50616d509..455f50de4 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56080_a0/bcm56080_a0_ltd_variant_entry.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56080_a0/bcm56080_a0_ltd_variant_entry.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56690_a0/bcm56690_a0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56690_a0/bcm56690_a0_ltd_variant_entry.h
new file mode 100644
index 000000000..ceb53c56d
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56690_a0/bcm56690_a0_ltd_variant_entry.h
@@ -0,0 +1,40 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM56690_A0_LTD_VARIANT_ENTRY_H
+#define GEN_BCM56690_A0_LTD_VARIANT_ENTRY_H
+#include <bcmltd/defs/generated/bcm56690_a0/bcm56690_a0_ltd_variant_def.h>
+#endif /* GEN_BCM56690_A0_LTD_VARIANT_ENTRY_H */
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#if BCMLTD_CONFIG_INCLUDE_BCM56690_A0_BASE == 1 || defined(BCMLTD_VARIANT_OVERRIDE)
+BCMLTD_VARIANT_ENTRY(bcm56690_a0,BCM56690_A0,,BASE,,BCMLTD_VARIANT_BCM56690_A0_BASE,BCMLTD_VARIANT_LOCAL_BCM56690_A0_BASE,NULL,0,0)
+#endif
+
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/hna_1_2_10_0/bcm56880_a0_hna_1_2_10_0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_ltd_variant_entry.h
similarity index 63%
rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/hna_1_2_10_0/bcm56880_a0_hna_1_2_10_0_ltd_variant_entry.h
rename to platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_ltd_variant_entry.h
index c0707c114..a73842224 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/hna_1_2_10_0/bcm56880_a0_hna_1_2_10_0_ltd_variant_entry.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_ltd_variant_entry.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -24,15 +24,15 @@
  *
  ******************************************************************************/
 
-#ifndef GEN_BCM56880_A0_HNA_1_2_10_0_LTD_VARIANT_ENTRY_H
-#define GEN_BCM56880_A0_HNA_1_2_10_0_LTD_VARIANT_ENTRY_H
-#include <bcmltd/defs/generated/bcm56880_a0/hna_1_2_10_0/bcm56880_a0_hna_1_2_10_0_ltd_variant_def.h>
-#endif /* GEN_BCM56880_A0_HNA_1_2_10_0_LTD_VARIANT_ENTRY_H */
+#ifndef GEN_BCM56690_A0_DNA_6_5_29_0_1_LTD_VARIANT_ENTRY_H
+#define GEN_BCM56690_A0_DNA_6_5_29_0_1_LTD_VARIANT_ENTRY_H
+#include <bcmltd/defs/generated/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_ltd_variant_def.h>
+#endif /* GEN_BCM56690_A0_DNA_6_5_29_0_1_LTD_VARIANT_ENTRY_H */
 
 #ifndef DOXYGEN_IGNORE_AUTOGEN
 
-#if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_HNA_1_2_10_0 == 1 || defined(BCMLTD_VARIANT_OVERRIDE)
-BCMLTD_VARIANT_ENTRY(bcm56880_a0,BCM56880_A0,hna_1_2_10_0,HNA_1_2_10_0,_,BCMLTD_VARIANT_BCM56880_A0_HNA_1_2_10_0,BCMLTD_VARIANT_LOCAL_BCM56880_A0_HNA_1_2_10_0,NULL,0,0)
+#if BCMLTD_CONFIG_INCLUDE_BCM56690_A0_DNA_6_5_29_0_1 == 1 || defined(BCMLTD_VARIANT_OVERRIDE)
+BCMLTD_VARIANT_ENTRY(bcm56690_a0,BCM56690_A0,dna_6_5_29_0_1,DNA_6_5_29_0_1,_,BCMLTD_VARIANT_BCM56690_A0_DNA_6_5_29_0_1,BCMLTD_VARIANT_LOCAL_BCM56690_A0_DNA_6_5_29_0_1,NULL,0,0)
 #endif
 
 #endif /* DOXYGEN_IGNORE_AUTOGEN */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/bcm56780_a0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/bcm56780_a0_ltd_variant_entry.h
index 6f6b34efb..98300f236 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/bcm56780_a0_ltd_variant_entry.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/bcm56780_a0_ltd_variant_entry.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/cna_1_2_13/bcm56780_a0_cna_1_2_13_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_ltd_variant_entry.h
similarity index 66%
rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/cna_1_2_13/bcm56780_a0_cna_1_2_13_ltd_variant_entry.h
rename to platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_ltd_variant_entry.h
index e80842ef1..c36df37d1 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/cna_1_2_13/bcm56780_a0_cna_1_2_13_ltd_variant_entry.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_ltd_variant_entry.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -24,15 +24,15 @@
  *
  ******************************************************************************/
 
-#ifndef GEN_BCM56780_A0_CNA_1_2_13_LTD_VARIANT_ENTRY_H
-#define GEN_BCM56780_A0_CNA_1_2_13_LTD_VARIANT_ENTRY_H
-#include <bcmltd/defs/generated/bcm56780_a0/cna_1_2_13/bcm56780_a0_cna_1_2_13_ltd_variant_def.h>
-#endif /* GEN_BCM56780_A0_CNA_1_2_13_LTD_VARIANT_ENTRY_H */
+#ifndef GEN_BCM56780_A0_CNA_6_5_29_LTD_VARIANT_ENTRY_H
+#define GEN_BCM56780_A0_CNA_6_5_29_LTD_VARIANT_ENTRY_H
+#include <bcmltd/defs/generated/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_ltd_variant_def.h>
+#endif /* GEN_BCM56780_A0_CNA_6_5_29_LTD_VARIANT_ENTRY_H */
 
 #ifndef DOXYGEN_IGNORE_AUTOGEN
 
-#if BCMLTD_CONFIG_INCLUDE_BCM56780_A0_CNA_1_2_13 == 1 || defined(BCMLTD_VARIANT_OVERRIDE)
-BCMLTD_VARIANT_ENTRY(bcm56780_a0,BCM56780_A0,cna_1_2_13,CNA_1_2_13,_,BCMLTD_VARIANT_BCM56780_A0_CNA_1_2_13,BCMLTD_VARIANT_LOCAL_BCM56780_A0_CNA_1_2_13,NULL,0,0)
+#if BCMLTD_CONFIG_INCLUDE_BCM56780_A0_CNA_6_5_29 == 1 || defined(BCMLTD_VARIANT_OVERRIDE)
+BCMLTD_VARIANT_ENTRY(bcm56780_a0,BCM56780_A0,cna_6_5_29,CNA_6_5_29,_,BCMLTD_VARIANT_BCM56780_A0_CNA_6_5_29,BCMLTD_VARIANT_LOCAL_BCM56780_A0_CNA_6_5_29,NULL,0,0)
 #endif
 
 #endif /* DOXYGEN_IGNORE_AUTOGEN */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_ltd_variant_entry.h
index 2e3cd8ef6..ac15ceee0 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_ltd_variant_entry.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_ltd_variant_entry.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_ltd_variant_entry.h
new file mode 100644
index 000000000..f0cd76d62
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_ltd_variant_entry.h
@@ -0,0 +1,40 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM56780_A0_HNA_6_5_29_2_1_LTD_VARIANT_ENTRY_H
+#define GEN_BCM56780_A0_HNA_6_5_29_2_1_LTD_VARIANT_ENTRY_H
+#include <bcmltd/defs/generated/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_ltd_variant_def.h>
+#endif /* GEN_BCM56780_A0_HNA_6_5_29_2_1_LTD_VARIANT_ENTRY_H */
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#if BCMLTD_CONFIG_INCLUDE_BCM56780_A0_HNA_6_5_29_2_1 == 1 || defined(BCMLTD_VARIANT_OVERRIDE)
+BCMLTD_VARIANT_ENTRY(bcm56780_a0,BCM56780_A0,hna_6_5_29_2_1,HNA_6_5_29_2_1,_,BCMLTD_VARIANT_BCM56780_A0_HNA_6_5_29_2_1,BCMLTD_VARIANT_LOCAL_BCM56780_A0_HNA_6_5_29_2_1,NULL,0,0)
+#endif
+
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56890_a0/dna_4_0_17_0/bcm56890_a0_dna_4_0_17_0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_ltd_variant_entry.h
similarity index 65%
rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56890_a0/dna_4_0_17_0/bcm56890_a0_dna_4_0_17_0_ltd_variant_entry.h
rename to platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_ltd_variant_entry.h
index a139a20a3..32704dc7a 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56890_a0/dna_4_0_17_0/bcm56890_a0_dna_4_0_17_0_ltd_variant_entry.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_ltd_variant_entry.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -24,15 +24,15 @@
  *
  ******************************************************************************/
 
-#ifndef GEN_BCM56890_A0_DNA_4_0_17_0_LTD_VARIANT_ENTRY_H
-#define GEN_BCM56890_A0_DNA_4_0_17_0_LTD_VARIANT_ENTRY_H
-#include <bcmltd/defs/generated/bcm56890_a0/dna_4_0_17_0/bcm56890_a0_dna_4_0_17_0_ltd_variant_def.h>
-#endif /* GEN_BCM56890_A0_DNA_4_0_17_0_LTD_VARIANT_ENTRY_H */
+#ifndef GEN_BCM56780_A0_INA_2_6_11_0_LTD_VARIANT_ENTRY_H
+#define GEN_BCM56780_A0_INA_2_6_11_0_LTD_VARIANT_ENTRY_H
+#include <bcmltd/defs/generated/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_ltd_variant_def.h>
+#endif /* GEN_BCM56780_A0_INA_2_6_11_0_LTD_VARIANT_ENTRY_H */
 
 #ifndef DOXYGEN_IGNORE_AUTOGEN
 
-#if BCMLTD_CONFIG_INCLUDE_BCM56890_A0_DNA_4_0_17_0 == 1 || defined(BCMLTD_VARIANT_OVERRIDE)
-BCMLTD_VARIANT_ENTRY(bcm56890_a0,BCM56890_A0,dna_4_0_17_0,DNA_4_0_17_0,_,BCMLTD_VARIANT_BCM56890_A0_DNA_4_0_17_0,BCMLTD_VARIANT_LOCAL_BCM56890_A0_DNA_4_0_17_0,NULL,0,0)
+#if BCMLTD_CONFIG_INCLUDE_BCM56780_A0_INA_2_6_11_0 == 1 || defined(BCMLTD_VARIANT_OVERRIDE)
+BCMLTD_VARIANT_ENTRY(bcm56780_a0,BCM56780_A0,ina_2_6_11_0,INA_2_6_11_0,_,BCMLTD_VARIANT_BCM56780_A0_INA_2_6_11_0,BCMLTD_VARIANT_LOCAL_BCM56780_A0_INA_2_6_11_0,NULL,0,0)
 #endif
 
 #endif /* DOXYGEN_IGNORE_AUTOGEN */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/bcm56880_a0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/bcm56880_a0_ltd_variant_entry.h
index 08775e092..9e6173895 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/bcm56880_a0_ltd_variant_entry.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/bcm56880_a0_ltd_variant_entry.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/cna_1_2_13/bcm56880_a0_cna_1_2_13_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_ltd_variant_entry.h
similarity index 66%
rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/cna_1_2_13/bcm56880_a0_cna_1_2_13_ltd_variant_entry.h
rename to platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_ltd_variant_entry.h
index 8fb2a10d8..7826a6e08 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/cna_1_2_13/bcm56880_a0_cna_1_2_13_ltd_variant_entry.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_ltd_variant_entry.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -24,15 +24,15 @@
  *
  ******************************************************************************/
 
-#ifndef GEN_BCM56880_A0_CNA_1_2_13_LTD_VARIANT_ENTRY_H
-#define GEN_BCM56880_A0_CNA_1_2_13_LTD_VARIANT_ENTRY_H
-#include <bcmltd/defs/generated/bcm56880_a0/cna_1_2_13/bcm56880_a0_cna_1_2_13_ltd_variant_def.h>
-#endif /* GEN_BCM56880_A0_CNA_1_2_13_LTD_VARIANT_ENTRY_H */
+#ifndef GEN_BCM56880_A0_CNA_6_5_29_LTD_VARIANT_ENTRY_H
+#define GEN_BCM56880_A0_CNA_6_5_29_LTD_VARIANT_ENTRY_H
+#include <bcmltd/defs/generated/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_ltd_variant_def.h>
+#endif /* GEN_BCM56880_A0_CNA_6_5_29_LTD_VARIANT_ENTRY_H */
 
 #ifndef DOXYGEN_IGNORE_AUTOGEN
 
-#if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_CNA_1_2_13 == 1 || defined(BCMLTD_VARIANT_OVERRIDE)
-BCMLTD_VARIANT_ENTRY(bcm56880_a0,BCM56880_A0,cna_1_2_13,CNA_1_2_13,_,BCMLTD_VARIANT_BCM56880_A0_CNA_1_2_13,BCMLTD_VARIANT_LOCAL_BCM56880_A0_CNA_1_2_13,NULL,0,0)
+#if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_CNA_6_5_29 == 1 || defined(BCMLTD_VARIANT_OVERRIDE)
+BCMLTD_VARIANT_ENTRY(bcm56880_a0,BCM56880_A0,cna_6_5_29,CNA_6_5_29,_,BCMLTD_VARIANT_BCM56880_A0_CNA_6_5_29,BCMLTD_VARIANT_LOCAL_BCM56880_A0_CNA_6_5_29,NULL,0,0)
 #endif
 
 #endif /* DOXYGEN_IGNORE_AUTOGEN */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_ltd_variant_entry.h
index e677601d1..5e27f7e39 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_ltd_variant_entry.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_ltd_variant_entry.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_ltd_variant_entry.h
new file mode 100644
index 000000000..b15dc2390
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_ltd_variant_entry.h
@@ -0,0 +1,40 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM56880_A0_HNA_6_5_29_2_2_LTD_VARIANT_ENTRY_H
+#define GEN_BCM56880_A0_HNA_6_5_29_2_2_LTD_VARIANT_ENTRY_H
+#include <bcmltd/defs/generated/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_ltd_variant_def.h>
+#endif /* GEN_BCM56880_A0_HNA_6_5_29_2_2_LTD_VARIANT_ENTRY_H */
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_HNA_6_5_29_2_2 == 1 || defined(BCMLTD_VARIANT_OVERRIDE)
+BCMLTD_VARIANT_ENTRY(bcm56880_a0,BCM56880_A0,hna_6_5_29_2_2,HNA_6_5_29_2_2,_,BCMLTD_VARIANT_BCM56880_A0_HNA_6_5_29_2_2,BCMLTD_VARIANT_LOCAL_BCM56880_A0_HNA_6_5_29_2_2,NULL,0,0)
+#endif
+
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_ltd_variant_entry.h
new file mode 100644
index 000000000..fc3822c6a
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_ltd_variant_entry.h
@@ -0,0 +1,40 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM56880_A0_NFA_2_1_7_0_LTD_VARIANT_ENTRY_H
+#define GEN_BCM56880_A0_NFA_2_1_7_0_LTD_VARIANT_ENTRY_H
+#include <bcmltd/defs/generated/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_ltd_variant_def.h>
+#endif /* GEN_BCM56880_A0_NFA_2_1_7_0_LTD_VARIANT_ENTRY_H */
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_NFA_2_1_7_0 == 1 || defined(BCMLTD_VARIANT_OVERRIDE)
+BCMLTD_VARIANT_ENTRY(bcm56880_a0,BCM56880_A0,nfa_2_1_7_0,NFA_2_1_7_0,_,BCMLTD_VARIANT_BCM56880_A0_NFA_2_1_7_0,BCMLTD_VARIANT_LOCAL_BCM56880_A0_NFA_2_1_7_0,NULL,0,0)
+#endif
+
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56890_a0/bcm56890_a0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56890_a0/bcm56890_a0_ltd_variant_entry.h
index 56deb27eb..f1473c14d 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56890_a0/bcm56890_a0_ltd_variant_entry.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56890_a0/bcm56890_a0_ltd_variant_entry.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_ltd_variant_entry.h
new file mode 100644
index 000000000..fd5d5150f
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_ltd_variant_entry.h
@@ -0,0 +1,40 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM56890_A0_CNA_6_5_29_LTD_VARIANT_ENTRY_H
+#define GEN_BCM56890_A0_CNA_6_5_29_LTD_VARIANT_ENTRY_H
+#include <bcmltd/defs/generated/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_ltd_variant_def.h>
+#endif /* GEN_BCM56890_A0_CNA_6_5_29_LTD_VARIANT_ENTRY_H */
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#if BCMLTD_CONFIG_INCLUDE_BCM56890_A0_CNA_6_5_29 == 1 || defined(BCMLTD_VARIANT_OVERRIDE)
+BCMLTD_VARIANT_ENTRY(bcm56890_a0,BCM56890_A0,cna_6_5_29,CNA_6_5_29,_,BCMLTD_VARIANT_BCM56890_A0_CNA_6_5_29,BCMLTD_VARIANT_LOCAL_BCM56890_A0_CNA_6_5_29,NULL,0,0)
+#endif
+
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_ltd_variant_entry.h
new file mode 100644
index 000000000..70b562ba5
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_ltd_variant_entry.h
@@ -0,0 +1,40 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM56890_A0_DNA_6_5_29_1_2_LTD_VARIANT_ENTRY_H
+#define GEN_BCM56890_A0_DNA_6_5_29_1_2_LTD_VARIANT_ENTRY_H
+#include <bcmltd/defs/generated/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_ltd_variant_def.h>
+#endif /* GEN_BCM56890_A0_DNA_6_5_29_1_2_LTD_VARIANT_ENTRY_H */
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#if BCMLTD_CONFIG_INCLUDE_BCM56890_A0_DNA_6_5_29_1_2 == 1 || defined(BCMLTD_VARIANT_OVERRIDE)
+BCMLTD_VARIANT_ENTRY(bcm56890_a0,BCM56890_A0,dna_6_5_29_1_2,DNA_6_5_29_1_2,_,BCMLTD_VARIANT_BCM56890_A0_DNA_6_5_29_1_2,BCMLTD_VARIANT_LOCAL_BCM56890_A0_DNA_6_5_29_1_2,NULL,0,0)
+#endif
+
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56990_a0/bcm56990_a0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56990_a0/bcm56990_a0_ltd_variant_entry.h
index 7e58e4bab..a1edac77d 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56990_a0/bcm56990_a0_ltd_variant_entry.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56990_a0/bcm56990_a0_ltd_variant_entry.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56990_b0/bcm56990_b0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56990_b0/bcm56990_b0_ltd_variant_entry.h
index a395052a5..9ee7769a3 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56990_b0/bcm56990_b0_ltd_variant_entry.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56990_b0/bcm56990_b0_ltd_variant_entry.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56996_a0/bcm56996_a0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56996_a0/bcm56996_a0_ltd_variant_entry.h
index 40abaeff0..be32f3d77 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56996_a0/bcm56996_a0_ltd_variant_entry.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56996_a0/bcm56996_a0_ltd_variant_entry.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56996_b0/bcm56996_b0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56996_b0/bcm56996_b0_ltd_variant_entry.h
index ad387ff5c..48dd0a6e2 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56996_b0/bcm56996_b0_ltd_variant_entry.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56996_b0/bcm56996_b0_ltd_variant_entry.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56998_a0/bcm56998_a0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56998_a0/bcm56998_a0_ltd_variant_entry.h
index b5313fb0a..80d9a20bd 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56998_a0/bcm56998_a0_ltd_variant_entry.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56998_a0/bcm56998_a0_ltd_variant_entry.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56999_a0/bcm56999_a0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56999_a0/bcm56999_a0_ltd_variant_entry.h
index a472cabc7..eef504417 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56999_a0/bcm56999_a0_ltd_variant_entry.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56999_a0/bcm56999_a0_ltd_variant_entry.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78900_b0/bcm78900_b0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78900_b0/bcm78900_b0_ltd_variant_entry.h
index 339373fd1..fd74760b8 100644
--- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78900_b0/bcm78900_b0_ltd_variant_entry.h
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78900_b0/bcm78900_b0_ltd_variant_entry.h
@@ -7,7 +7,7 @@
  *
  * Edits to this file will be lost when it is regenerated.
  *
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78905_a0/bcm78905_a0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78905_a0/bcm78905_a0_ltd_variant_entry.h
new file mode 100644
index 000000000..84f75b9d4
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78905_a0/bcm78905_a0_ltd_variant_entry.h
@@ -0,0 +1,40 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by fltg from Logical Table mapping files.
+ *
+ * Tool: $SDK/tools/fltg/bin/fltg
+ *
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ *
+ ******************************************************************************/
+
+#ifndef GEN_BCM78905_A0_LTD_VARIANT_ENTRY_H
+#define GEN_BCM78905_A0_LTD_VARIANT_ENTRY_H
+#include <bcmltd/defs/generated/bcm78905_a0/bcm78905_a0_ltd_variant_def.h>
+#endif /* GEN_BCM78905_A0_LTD_VARIANT_ENTRY_H */
+
+#ifndef DOXYGEN_IGNORE_AUTOGEN
+
+#if BCMLTD_CONFIG_INCLUDE_BCM78905_A0_BASE == 1 || defined(BCMLTD_VARIANT_OVERRIDE)
+BCMLTD_VARIANT_ENTRY(bcm78905_a0,BCM78905_A0,,BASE,,BCMLTD_VARIANT_BCM78905_A0_BASE,BCMLTD_VARIANT_LOCAL_BCM78905_A0_BASE,NULL,0,0)
+#endif
+
+#endif /* DOXYGEN_IGNORE_AUTOGEN */
+
+
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56080_a0/bcm56080_a0_pkt_lbhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56080_a0/bcm56080_a0_pkt_lbhdr.c
new file mode 100644
index 000000000..8c52cfd59
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56080_a0/bcm56080_a0_pkt_lbhdr.c
@@ -0,0 +1,331 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated from the registers file.
+ * Edits to this file will be lost when it is regenerated.
+ * Tool: INTERNAL/regs/xgs/generate-pmd.pl
+ *
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ *
+ * This file provides LBHDR access functions for BCM56080_A0.
+ *
+ ******************************************************************************/
+
+#include <sal/sal_types.h>
+#include <bcmpkt/bcmpkt_lbhdr_internal.h>
+
+#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1)
+#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l))
+#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s)))
+#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s)))
+/*******************************************************************************
+ * SWFORMAT:  LBHDR
+ * BLOCKS:
+ * SIZE:     128
+ ******************************************************************************/
+static void bcmpkt_lbhdr_start_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 24, 8, val);
+}
+
+static uint32_t bcmpkt_lbhdr_start_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 24, 8);
+    return val;
+}
+
+static void bcmpkt_lbhdr_header_type_set(uint32_t *data, uint32_t val)
+{
+    if (val == BCMPKT_LBHDR_HEADER_T_GENERIC) {
+        val = 0;
+    }
+    WORD_FIELD_SET(data[0], 15, 1, val);
+}
+
+static uint32_t bcmpkt_lbhdr_header_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 15, 1);
+    if (val == 0) {
+        val = BCMPKT_LBHDR_HEADER_T_GENERIC;
+    }
+    return val;
+}
+
+static void bcmpkt_lbhdr_input_priority_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 20, 4, val);
+}
+
+static uint32_t bcmpkt_lbhdr_input_priority_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 20, 4);
+    return val;
+}
+
+static void bcmpkt_lbhdr_pkt_profile_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 26, 3, val);
+}
+
+static uint32_t bcmpkt_lbhdr_pkt_profile_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 26, 3);
+    return val;
+}
+
+static void bcmpkt_lbhdr_visibility_pkt_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 29, 1, val);
+}
+
+static uint32_t bcmpkt_lbhdr_visibility_pkt_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 29, 1);
+    return val;
+}
+
+static void bcmpkt_lbhdr_source_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 30, 2, val & MASK(2));
+    WORD_FIELD_SET(data[0], 0, 14, (val >> 2) & MASK(14));
+}
+
+static uint32_t bcmpkt_lbhdr_source_get(uint32_t *data)
+{
+    uint32_t val;
+    val = (WORD_FIELD_GET(data[1], 30, 2) | (WORD_FIELD_GET(data[0], 0, 14) << 2)) ;
+    return val;
+}
+
+static void bcmpkt_lbhdr_source_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 14, 1, val);
+}
+
+static uint32_t bcmpkt_lbhdr_source_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 14, 1);
+    return val;
+}
+
+static void bcmpkt_lbhdr_zero_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 5, 1, val);
+}
+
+static uint32_t bcmpkt_lbhdr_zero_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 5, 1);
+    return val;
+}
+
+static void bcmpkt_lbhdr_pp_port_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 0, 7, val);
+}
+
+static uint32_t bcmpkt_lbhdr_pp_port_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 0, 7);
+    return val;
+}
+
+static void bcmpkt_lbhdr_routed_pkt_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 31, 1, val);
+}
+
+static uint32_t bcmpkt_lbhdr_routed_pkt_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 31, 1);
+    return val;
+}
+
+static void bcmpkt_lbhdr_vrf_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 30, 2, val & MASK(2));
+    WORD_FIELD_SET(data[1], 0, 4, (val >> 2) & MASK(4));
+}
+
+static uint32_t bcmpkt_lbhdr_vrf_get(uint32_t *data)
+{
+    uint32_t val;
+    val = (WORD_FIELD_GET(data[2], 30, 2) | (WORD_FIELD_GET(data[1], 0, 4) << 2)) ;
+    return val;
+}
+
+static void bcmpkt_lbhdr_vrf_valid_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 4, 1, val);
+}
+
+static uint32_t bcmpkt_lbhdr_vrf_valid_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 4, 1);
+    return val;
+}
+
+static uint32_t bcmpkt_lbhdr_i_size_get(uint32_t *data, uint32_t **addr)
+{
+    return 4;
+}
+
+
+const bcmpkt_lbhdr_fget_t bcm56080_a0_lbhdr_fget = {
+    {
+        bcmpkt_lbhdr_start_get,
+        bcmpkt_lbhdr_header_type_get,
+        bcmpkt_lbhdr_input_priority_get,
+        bcmpkt_lbhdr_pkt_profile_get,
+        bcmpkt_lbhdr_visibility_pkt_get,
+        bcmpkt_lbhdr_source_get,
+        bcmpkt_lbhdr_source_type_get,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_lbhdr_zero_get,
+        bcmpkt_lbhdr_pp_port_get,
+        bcmpkt_lbhdr_routed_pkt_get,
+        bcmpkt_lbhdr_vrf_get,
+        bcmpkt_lbhdr_vrf_valid_get,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL
+    }
+};
+
+
+const bcmpkt_lbhdr_fset_t bcm56080_a0_lbhdr_fset = {
+    {
+        bcmpkt_lbhdr_start_set,
+        bcmpkt_lbhdr_header_type_set,
+        bcmpkt_lbhdr_input_priority_set,
+        bcmpkt_lbhdr_pkt_profile_set,
+        bcmpkt_lbhdr_visibility_pkt_set,
+        bcmpkt_lbhdr_source_set,
+        bcmpkt_lbhdr_source_type_set,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_lbhdr_zero_set,
+        bcmpkt_lbhdr_pp_port_set,
+        bcmpkt_lbhdr_routed_pkt_set,
+        bcmpkt_lbhdr_vrf_set,
+        bcmpkt_lbhdr_vrf_valid_set,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL
+    }
+};
+
+
+const bcmpkt_lbhdr_figet_t bcm56080_a0_lbhdr_figet = {
+    {
+        bcmpkt_lbhdr_i_size_get
+    }
+};
+
+static shr_enum_map_t bcm56080_a0_lbhdr_view_types[] = {
+    {NULL, -1},
+};
+
+/* -2: unsupported, -1: global, others: view's value */
+static int bcm56080_a0_lbhdr_view_infos[BCMPKT_LBHDR_FID_COUNT] = {
+     -1, -1, -1, -1, -1, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+     -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, -1, -1, -1, -1, -2,
+     -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+     -2,
+};
+
+
+void bcm56080_a0_lbhdr_view_info_get(bcmpkt_pmd_view_info_t *info)
+{
+    info->view_infos = bcm56080_a0_lbhdr_view_infos;
+    info->view_types = bcm56080_a0_lbhdr_view_types;
+    info->view_type_get = NULL;
+}
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56080_a0/bcm56080_a0_pkt_rxpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56080_a0/bcm56080_a0_pkt_rxpmd.c
new file mode 100644
index 000000000..0a42f3c42
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56080_a0/bcm56080_a0_pkt_rxpmd.c
@@ -0,0 +1,1147 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated from the registers file.
+ * Edits to this file will be lost when it is regenerated.
+ * Tool: INTERNAL/regs/xgs/generate-pmd.pl
+ *
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ *
+ * This file provides RXPMD access functions for BCM56080_A0.
+ *
+ ******************************************************************************/
+
+#include <sal/sal_types.h>
+#include <bcmpkt/bcmpkt_rxpmd.h>
+#include <bcmpkt/bcmpkt_rxpmd_internal.h>
+
+#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1)
+#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l))
+#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s)))
+#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s)))
+/*******************************************************************************
+ * SWFORMAT:  RXPMD
+ * BLOCKS:
+ * SIZE:     416
+ ******************************************************************************/
+static void bcmpkt_rxpmd_unicast_queue_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[6], 29, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_unicast_queue_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[6], 29, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_queue_num_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[12], 22, 6, val);
+}
+
+static uint32_t bcmpkt_rxpmd_queue_num_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[12], 22, 6);
+    return val;
+}
+
+static void bcmpkt_rxpmd_cpu_cos_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[12], 22, 6, val);
+}
+
+static uint32_t bcmpkt_rxpmd_cpu_cos_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[12], 22, 6);
+    return val;
+}
+
+static void bcmpkt_rxpmd_matched_rule_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[8], 0, 8, val);
+}
+
+static uint32_t bcmpkt_rxpmd_matched_rule_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[8], 0, 8);
+    return val;
+}
+
+static void bcmpkt_rxpmd_pkt_length_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[7], 0, 14, val);
+}
+
+static uint32_t bcmpkt_rxpmd_pkt_length_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[7], 0, 14);
+    return val;
+}
+
+static void bcmpkt_rxpmd_src_port_num_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[6], 20, 9, val);
+}
+
+static uint32_t bcmpkt_rxpmd_src_port_num_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[6], 20, 9);
+    return val;
+}
+
+static void bcmpkt_rxpmd_outer_vid_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[8], 15, 12, val);
+}
+
+static uint32_t bcmpkt_rxpmd_outer_vid_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[8], 15, 12);
+    return val;
+}
+
+static void bcmpkt_rxpmd_outer_cfi_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[8], 11, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_outer_cfi_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[8], 11, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_outer_pri_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[8], 12, 3, val);
+}
+
+static uint32_t bcmpkt_rxpmd_outer_pri_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[8], 12, 3);
+    return val;
+}
+
+static void bcmpkt_rxpmd_special_packet_indicator_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[8], 30, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_special_packet_indicator_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[8], 30, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_special_packet_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[9], 4, 3, val);
+}
+
+static uint32_t bcmpkt_rxpmd_special_packet_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[9], 4, 3);
+    return val;
+}
+
+static void bcmpkt_rxpmd_change_dscp_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[12], 29, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_change_dscp_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[12], 29, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_dscp_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[9], 4, 6, val);
+}
+
+static uint32_t bcmpkt_rxpmd_dscp_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[9], 4, 6);
+    return val;
+}
+
+static void bcmpkt_rxpmd_change_ecn_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[12], 30, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_change_ecn_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[12], 30, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_ecn_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[9], 10, 2, val);
+}
+
+static uint32_t bcmpkt_rxpmd_ecn_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[9], 10, 2);
+    return val;
+}
+
+static void bcmpkt_rxpmd_timestamp_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[6], 30, 2, val);
+}
+
+static uint32_t bcmpkt_rxpmd_timestamp_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[6], 30, 2);
+    return val;
+}
+
+static void bcmpkt_rxpmd_timestamp_set(uint32_t *data, uint32_t val)
+{
+    data[5] = val;
+}
+
+static uint32_t bcmpkt_rxpmd_timestamp_get(uint32_t *data)
+{
+    uint32_t val;
+    val = data[5];
+    return val;
+}
+
+static void bcmpkt_rxpmd_timestamp_hi_set(uint32_t *data, uint32_t val)
+{
+    data[4] = val;
+}
+
+static uint32_t bcmpkt_rxpmd_timestamp_hi_get(uint32_t *data)
+{
+    uint32_t val;
+    val = data[4];
+    return val;
+}
+
+static void bcmpkt_rxpmd_mtp_index_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[8], 8, 3, val);
+}
+
+static uint32_t bcmpkt_rxpmd_mtp_index_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[8], 8, 3);
+    return val;
+}
+
+static void bcmpkt_rxpmd_bpdu_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[12], 28, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_bpdu_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[12], 28, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_l3only_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[9], 30, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_l3only_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[9], 30, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_ip_routed_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[8], 29, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_ip_routed_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[8], 29, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_uc_sw_copy_dropped_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[7], 31, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_uc_sw_copy_dropped_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[7], 31, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_switch_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[8], 31, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_switch_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[8], 31, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_ing_otag_action_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[9], 26, 2, val);
+}
+
+static uint32_t bcmpkt_rxpmd_ing_otag_action_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[9], 26, 2);
+    return val;
+}
+
+static void bcmpkt_rxpmd_ing_tag_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[9], 12, 2, val);
+}
+
+static uint32_t bcmpkt_rxpmd_ing_tag_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[9], 12, 2);
+    return val;
+}
+
+static void bcmpkt_rxpmd_rx_bfd_start_offset_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[12], 14, 8, val);
+}
+
+static uint32_t bcmpkt_rxpmd_rx_bfd_start_offset_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[12], 14, 8);
+    return val;
+}
+
+static void bcmpkt_rxpmd_rx_bfd_start_offset_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[12], 12, 2, val);
+}
+
+static uint32_t bcmpkt_rxpmd_rx_bfd_start_offset_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[12], 12, 2);
+    return val;
+}
+
+static void bcmpkt_rxpmd_rx_bfd_session_index_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[12], 0, 12, val);
+}
+
+static uint32_t bcmpkt_rxpmd_rx_bfd_session_index_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[12], 0, 12);
+    return val;
+}
+
+static void bcmpkt_rxpmd_reason_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[9], 0, 4, val);
+}
+
+static uint32_t bcmpkt_rxpmd_reason_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[9], 0, 4);
+    return val;
+}
+
+static void bcmpkt_rxpmd_do_not_change_ttl_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[12], 31, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_do_not_change_ttl_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[12], 31, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_i2e_classid_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[12], 12, 4, val);
+}
+
+static uint32_t bcmpkt_rxpmd_i2e_classid_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[12], 12, 4);
+    return val;
+}
+
+static void bcmpkt_rxpmd_i2e_classid_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[12], 0, 12, val);
+}
+
+static uint32_t bcmpkt_rxpmd_i2e_classid_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[12], 0, 12);
+    return val;
+}
+
+static void bcmpkt_rxpmd_ing_l3_intf_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[12], 0, 13, val);
+}
+
+static uint32_t bcmpkt_rxpmd_ing_l3_intf_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[12], 0, 13);
+    return val;
+}
+
+static void bcmpkt_rxpmd_regen_crc_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[9], 31, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_regen_crc_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[9], 31, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_entropy_label_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[6], 0, 20, val);
+}
+
+static uint32_t bcmpkt_rxpmd_entropy_label_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[6], 0, 20);
+    return val;
+}
+
+static void bcmpkt_rxpmd_tunnel_decap_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[7], 26, 5, val);
+}
+
+static uint32_t bcmpkt_rxpmd_tunnel_decap_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[7], 26, 5);
+    return val;
+}
+
+static void bcmpkt_rxpmd_replication_or_nhop_index_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[7], 14, 12, val);
+}
+
+static uint32_t bcmpkt_rxpmd_replication_or_nhop_index_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[7], 14, 12);
+    return val;
+}
+
+static void bcmpkt_rxpmd_incoming_int_hdr_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[8], 27, 2, val);
+}
+
+static uint32_t bcmpkt_rxpmd_incoming_int_hdr_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[8], 27, 2);
+    return val;
+}
+
+static void bcmpkt_rxpmd_ing_l3_intf_valid_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[12], 16, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_ing_l3_intf_valid_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[12], 16, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_o_nhi_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[9], 14, 12, val);
+}
+
+static uint32_t bcmpkt_rxpmd_o_nhi_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[9], 14, 12);
+    return val;
+}
+
+static void bcmpkt_rxpmd_ieu_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[9], 28, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_ieu_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[9], 28, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_ieu_valid_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[9], 29, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_ieu_valid_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[9], 29, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_vrf_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[4], 0, 6, val);
+}
+
+static uint32_t bcmpkt_rxpmd_vrf_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[4], 0, 6);
+    return val;
+}
+
+static uint32_t bcmpkt_rxpmd_i_size_get(uint32_t *data, uint32_t **addr)
+{
+    return 13;
+}
+
+static uint32_t bcmpkt_rxpmd_i_reason_get(uint32_t *data, uint32_t **addr)
+{
+    *addr = data + 10;
+    return 2;
+}
+
+static uint32_t bcmpkt_rxpmd_i_module_hdr_get(uint32_t *data, uint32_t **addr)
+{
+    *addr = data + 0;
+    return 4;
+}
+
+/*******************************************************************************
+ * SWFORMAT:  RX_REASON
+ * BLOCKS:
+ * SIZE:     48
+ ******************************************************************************/
+void bcm56080_a0_rx_reason_encode(const bcmpkt_rx_reasons_t *reasons, uint32_t *data)
+{
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_UVLAN)) {
+        data[1] |= (0x1 << 0);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SLF)) {
+        data[1] |= (0x1 << 1);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_DLF)) {
+        data[1] |= (0x1 << 2);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L2MOVE)) {
+        data[1] |= (0x1 << 3);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L2CPU)) {
+        data[1] |= (0x1 << 4);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MISS)) {
+        data[1] |= (0x1 << 5);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3DST_MISS)) {
+        data[1] |= (0x1 << 6);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MOVE)) {
+        data[1] |= (0x1 << 7);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_MC_MISS)) {
+        data[1] |= (0x1 << 8);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_MISS)) {
+        data[1] |= (0x1 << 9);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_FFP)) {
+        data[1] |= (0x1 << 10);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3HDR_ERR)) {
+        data[1] |= (0x1 << 11);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_PROTOCOL_PKT)) {
+        data[1] |= (0x1 << 12);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_DOS_ATTACK)) {
+        data[1] |= (0x1 << 13);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_MARTIAN_ADDR)) {
+        data[1] |= (0x1 << 14);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_TUNNEL_ERR)) {
+        data[1] |= (0x1 << 15);
+    }
+
+    if (BCMPKT_RX_REASON_GET(*reasons,  BCMPKT_RX_REASON_CPU_SFLOW_CPU_SFLOW_FLEX)) {
+        WORD_FIELD_SET(data[1], 16, 2, 1);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons,  BCMPKT_RX_REASON_CPU_SFLOW_CPU_SFLOW_DST)) {
+        WORD_FIELD_SET(data[1], 16, 2, 2);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons,  BCMPKT_RX_REASON_CPU_SFLOW_CPU_SFLOW_SRC)) {
+        WORD_FIELD_SET(data[1], 16, 2, 3);
+    }
+    /*! For mask set ONLY. */
+    if (BCMPKT_RX_REASON_GET(*reasons,  BCMPKT_RX_REASON_CPU_SFLOW)) {
+        WORD_FIELD_SET(data[1], 16, 2, 3);
+    }
+
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_ICMP_REDIRECT)) {
+        data[1] |= (0x1 << 18);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_L3_SLOWPATH)) {
+        data[1] |= (0x1 << 19);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_PARITY_ERROR)) {
+        data[1] |= (0x1 << 20);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_L3_MTU_CHECK_FAIL)) {
+        data[1] |= (0x1 << 21);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MCIDX_ERROR)) {
+        data[1] |= (0x1 << 22);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_VFP)) {
+        data[1] |= (0x1 << 23);
+    }
+
+    if (BCMPKT_RX_REASON_GET(*reasons,  BCMPKT_RX_REASON_MPLS_PROC_ERROR_INVALID_PAYLOAD)) {
+        WORD_FIELD_SET(data[1], 24, 3, 1);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons,  BCMPKT_RX_REASON_MPLS_PROC_ERROR_INVALID_ACTION)) {
+        WORD_FIELD_SET(data[1], 24, 3, 2);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons,  BCMPKT_RX_REASON_MPLS_PROC_ERROR_LABEL_MISS)) {
+        WORD_FIELD_SET(data[1], 24, 3, 3);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons,  BCMPKT_RX_REASON_MPLS_PROC_ERROR_TTL_CHECK_FAIL)) {
+        WORD_FIELD_SET(data[1], 24, 3, 4);
+    }
+    /*! For mask set ONLY. */
+    if (BCMPKT_RX_REASON_GET(*reasons,  BCMPKT_RX_REASON_MPLS_PROC_ERROR)) {
+        WORD_FIELD_SET(data[1], 24, 3, 7);
+    }
+
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_PBT_NONUC_PKT)) {
+        data[1] |= (0x1 << 27);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_L3_NEXT_HOP)) {
+        data[1] |= (0x1 << 28);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MY_STATION)) {
+        data[1] |= (0x1 << 29);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_TIME_SYNC)) {
+        data[1] |= (0x1 << 30);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_TUNNEL_DECAP_ECN_ERROR)) {
+        data[1] |= (0x1 << 31);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_BFD_SLOWPATH)) {
+        data[0] |= (0x1 << 0);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_BFD_ERROR)) {
+        data[0] |= (0x1 << 1);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_PACKET_TRACE_TO_CPU)) {
+        data[0] |= (0x1 << 2);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_UNKNOWN_CONTROL_PKT)) {
+        data[0] |= (0x1 << 3);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_ALERT_LABEL)) {
+        data[0] |= (0x1 << 4);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_INTERFACE_MISMATCH)) {
+        data[0] |= (0x1 << 5);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_SRV6_ERROR)) {
+        data[0] |= (0x1 << 6);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_VXLAN_VN_ID_MISS)) {
+        data[0] |= (0x1 << 7);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_VXLAN_SIP_MISS)) {
+        data[0] |= (0x1 << 8);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_ADAPT_MISS)) {
+        data[0] |= (0x1 << 9);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_NH_PROTO_STATUS_DOWN)) {
+        data[0] |= (0x1 << 10);
+    }
+
+    if (BCMPKT_RX_REASON_GET(*reasons,  BCMPKT_RX_REASON_OAM_PROCESSING_OAM_CCM)) {
+        WORD_FIELD_SET(data[0], 11, 3, 1);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons,  BCMPKT_RX_REASON_OAM_PROCESSING_OAM_LM)) {
+        WORD_FIELD_SET(data[0], 11, 3, 2);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons,  BCMPKT_RX_REASON_OAM_PROCESSING_OAM_DM)) {
+        WORD_FIELD_SET(data[0], 11, 3, 3);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons,  BCMPKT_RX_REASON_OAM_PROCESSING_OAM_OTHER_OPCODES)) {
+        WORD_FIELD_SET(data[0], 11, 3, 4);
+    }
+    /*! For mask set ONLY. */
+    if (BCMPKT_RX_REASON_GET(*reasons,  BCMPKT_RX_REASON_OAM_PROCESSING)) {
+        WORD_FIELD_SET(data[0], 11, 3, 7);
+    }
+
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_SUBPORT_ID_LOOKUP_MISS)) {
+        data[0] |= (0x1 << 14);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_SVTAG_CPU_BIT_SET)) {
+        data[0] |= (0x1 << 15);
+    }
+}
+
+void bcm56080_a0_rx_reason_decode(const uint32_t *data, bcmpkt_rx_reasons_t *reasons)
+{
+    uint32_t val;
+    COMPILER_REFERENCE(val);
+    if (data[1] & (0x1 << 0)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_UVLAN);
+    }
+    if (data[1] & (0x1 << 1)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_SLF);
+    }
+    if (data[1] & (0x1 << 2)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_DLF);
+    }
+    if (data[1] & (0x1 << 3)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L2MOVE);
+    }
+    if (data[1] & (0x1 << 4)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L2CPU);
+    }
+    if (data[1] & (0x1 << 5)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MISS);
+    }
+    if (data[1] & (0x1 << 6)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3DST_MISS);
+    }
+    if (data[1] & (0x1 << 7)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MOVE);
+    }
+    if (data[1] & (0x1 << 8)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_MC_MISS);
+    }
+    if (data[1] & (0x1 << 9)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_MISS);
+    }
+    if (data[1] & (0x1 << 10)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_FFP);
+    }
+    if (data[1] & (0x1 << 11)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3HDR_ERR);
+    }
+    if (data[1] & (0x1 << 12)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_PROTOCOL_PKT);
+    }
+    if (data[1] & (0x1 << 13)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_DOS_ATTACK);
+    }
+    if (data[1] & (0x1 << 14)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_MARTIAN_ADDR);
+    }
+    if (data[1] & (0x1 << 15)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_TUNNEL_ERR);
+    }
+
+    val = WORD_FIELD_GET(data[1], 16, 2);
+    if (val) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW);
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW + val);
+    }
+
+    if (data[1] & (0x1 << 18)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_ICMP_REDIRECT);
+    }
+    if (data[1] & (0x1 << 19)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_L3_SLOWPATH);
+    }
+    if (data[1] & (0x1 << 20)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_PARITY_ERROR);
+    }
+    if (data[1] & (0x1 << 21)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_L3_MTU_CHECK_FAIL);
+    }
+    if (data[1] & (0x1 << 22)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MCIDX_ERROR);
+    }
+    if (data[1] & (0x1 << 23)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_VFP);
+    }
+
+    val = WORD_FIELD_GET(data[1], 24, 3);
+    if (val) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR);
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR + val);
+    }
+
+    if (data[1] & (0x1 << 27)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_PBT_NONUC_PKT);
+    }
+    if (data[1] & (0x1 << 28)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_L3_NEXT_HOP);
+    }
+    if (data[1] & (0x1 << 29)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MY_STATION);
+    }
+    if (data[1] & (0x1 << 30)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_TIME_SYNC);
+    }
+    if (data[1] & (0x1 << 31)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_TUNNEL_DECAP_ECN_ERROR);
+    }
+    if (data[0] & (0x1 << 0)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_BFD_SLOWPATH);
+    }
+    if (data[0] & (0x1 << 1)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_BFD_ERROR);
+    }
+    if (data[0] & (0x1 << 2)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_PACKET_TRACE_TO_CPU);
+    }
+    if (data[0] & (0x1 << 3)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_UNKNOWN_CONTROL_PKT);
+    }
+    if (data[0] & (0x1 << 4)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_ALERT_LABEL);
+    }
+    if (data[0] & (0x1 << 5)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_INTERFACE_MISMATCH);
+    }
+    if (data[0] & (0x1 << 6)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_SRV6_ERROR);
+    }
+    if (data[0] & (0x1 << 7)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_VXLAN_VN_ID_MISS);
+    }
+    if (data[0] & (0x1 << 8)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_VXLAN_SIP_MISS);
+    }
+    if (data[0] & (0x1 << 9)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_ADAPT_MISS);
+    }
+    if (data[0] & (0x1 << 10)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_NH_PROTO_STATUS_DOWN);
+    }
+
+    val = WORD_FIELD_GET(data[0], 11, 3);
+    if (val) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_OAM_PROCESSING);
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_OAM_PROCESSING + val);
+    }
+
+    if (data[0] & (0x1 << 14)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_SUBPORT_ID_LOOKUP_MISS);
+    }
+    if (data[0] & (0x1 << 15)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_SVTAG_CPU_BIT_SET);
+    }
+}
+
+void bcm56080_a0_ep_rx_reason_encode(const bcmpkt_rx_reasons_t *reasons, uint32_t *data)
+{
+}
+
+void bcm56080_a0_ep_rx_reason_decode(const uint32_t *data, bcmpkt_rx_reasons_t *reasons)
+{
+}
+
+const bcmpkt_rxpmd_fget_t bcm56080_a0_rxpmd_fget = {
+    {
+        bcmpkt_rxpmd_unicast_queue_get,
+        bcmpkt_rxpmd_queue_num_get,
+        bcmpkt_rxpmd_cpu_cos_get,
+        NULL,
+        bcmpkt_rxpmd_matched_rule_get,
+        bcmpkt_rxpmd_pkt_length_get,
+        bcmpkt_rxpmd_src_port_num_get,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_outer_vid_get,
+        bcmpkt_rxpmd_outer_cfi_get,
+        bcmpkt_rxpmd_outer_pri_get,
+        bcmpkt_rxpmd_special_packet_indicator_get,
+        bcmpkt_rxpmd_special_packet_type_get,
+        bcmpkt_rxpmd_change_dscp_get,
+        bcmpkt_rxpmd_dscp_get,
+        bcmpkt_rxpmd_change_ecn_get,
+        bcmpkt_rxpmd_ecn_get,
+        bcmpkt_rxpmd_timestamp_type_get,
+        bcmpkt_rxpmd_timestamp_get,
+        bcmpkt_rxpmd_timestamp_hi_get,
+        bcmpkt_rxpmd_mtp_index_get,
+        bcmpkt_rxpmd_bpdu_get,
+        NULL,
+        bcmpkt_rxpmd_l3only_get,
+        bcmpkt_rxpmd_ip_routed_get,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_uc_sw_copy_dropped_get,
+        bcmpkt_rxpmd_switch_get,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_ing_otag_action_get,
+        bcmpkt_rxpmd_ing_tag_type_get,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_rx_bfd_start_offset_get,
+        bcmpkt_rxpmd_rx_bfd_start_offset_type_get,
+        bcmpkt_rxpmd_rx_bfd_session_index_get,
+        bcmpkt_rxpmd_reason_type_get,
+        bcmpkt_rxpmd_do_not_change_ttl_get,
+        bcmpkt_rxpmd_i2e_classid_type_get,
+        bcmpkt_rxpmd_i2e_classid_get,
+        bcmpkt_rxpmd_ing_l3_intf_get,
+        NULL,
+        bcmpkt_rxpmd_regen_crc_get,
+        bcmpkt_rxpmd_entropy_label_get,
+        bcmpkt_rxpmd_tunnel_decap_type_get,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_replication_or_nhop_index_get,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_incoming_int_hdr_type_get,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_ing_l3_intf_valid_get,
+        bcmpkt_rxpmd_o_nhi_get,
+        bcmpkt_rxpmd_ieu_get,
+        bcmpkt_rxpmd_ieu_valid_get,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_vrf_get,
+        NULL,
+        NULL
+    }
+};
+
+
+const bcmpkt_rxpmd_fset_t bcm56080_a0_rxpmd_fset = {
+    {
+        bcmpkt_rxpmd_unicast_queue_set,
+        bcmpkt_rxpmd_queue_num_set,
+        bcmpkt_rxpmd_cpu_cos_set,
+        NULL,
+        bcmpkt_rxpmd_matched_rule_set,
+        bcmpkt_rxpmd_pkt_length_set,
+        bcmpkt_rxpmd_src_port_num_set,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_outer_vid_set,
+        bcmpkt_rxpmd_outer_cfi_set,
+        bcmpkt_rxpmd_outer_pri_set,
+        bcmpkt_rxpmd_special_packet_indicator_set,
+        bcmpkt_rxpmd_special_packet_type_set,
+        bcmpkt_rxpmd_change_dscp_set,
+        bcmpkt_rxpmd_dscp_set,
+        bcmpkt_rxpmd_change_ecn_set,
+        bcmpkt_rxpmd_ecn_set,
+        bcmpkt_rxpmd_timestamp_type_set,
+        bcmpkt_rxpmd_timestamp_set,
+        bcmpkt_rxpmd_timestamp_hi_set,
+        bcmpkt_rxpmd_mtp_index_set,
+        bcmpkt_rxpmd_bpdu_set,
+        NULL,
+        bcmpkt_rxpmd_l3only_set,
+        bcmpkt_rxpmd_ip_routed_set,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_uc_sw_copy_dropped_set,
+        bcmpkt_rxpmd_switch_set,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_ing_otag_action_set,
+        bcmpkt_rxpmd_ing_tag_type_set,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_rx_bfd_start_offset_set,
+        bcmpkt_rxpmd_rx_bfd_start_offset_type_set,
+        bcmpkt_rxpmd_rx_bfd_session_index_set,
+        bcmpkt_rxpmd_reason_type_set,
+        bcmpkt_rxpmd_do_not_change_ttl_set,
+        bcmpkt_rxpmd_i2e_classid_type_set,
+        bcmpkt_rxpmd_i2e_classid_set,
+        bcmpkt_rxpmd_ing_l3_intf_set,
+        NULL,
+        bcmpkt_rxpmd_regen_crc_set,
+        bcmpkt_rxpmd_entropy_label_set,
+        bcmpkt_rxpmd_tunnel_decap_type_set,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_replication_or_nhop_index_set,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_incoming_int_hdr_type_set,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_ing_l3_intf_valid_set,
+        bcmpkt_rxpmd_o_nhi_set,
+        bcmpkt_rxpmd_ieu_set,
+        bcmpkt_rxpmd_ieu_valid_set,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_vrf_set,
+        NULL,
+        NULL
+    }
+};
+
+
+const bcmpkt_rxpmd_figet_t bcm56080_a0_rxpmd_figet = {
+    {
+        bcmpkt_rxpmd_i_size_get,
+        bcmpkt_rxpmd_i_reason_get,
+        bcmpkt_rxpmd_i_module_hdr_get,
+        NULL
+    }
+};
+
+static shr_enum_map_t bcm56080_a0_rxpmd_view_types[] = {
+    {NULL, -1},
+};
+
+/* -2: unsupported, -1: global, others: view's value */
+static int bcm56080_a0_rxpmd_view_infos[BCMPKT_RXPMD_FID_COUNT] = {
+     -1, -1, -1, -2, -1, -1, -1, -2, -2, -2, -1, -1, -1, -1, -1, -1,
+     -1, -1, -1, -1, -1, -1, -1, -1, -2, -1, -1, -2, -2, -1, -1, -2,
+     -2, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1,
+     -1, -1, -1, -1, -1, -1, -1, -2, -1, -1, -1, -2, -2, -2, -2, -2,
+     -2, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, -2, -2, -2,
+     -1, -1, -1, -1, -2, -2, -2, -2, -2, -2, -1, -2, -2,
+};
+
+
+void bcm56080_a0_rxpmd_view_info_get(bcmpkt_pmd_view_info_t *info)
+{
+    info->view_infos = bcm56080_a0_rxpmd_view_infos;
+    info->view_types = bcm56080_a0_rxpmd_view_types;
+    info->view_type_get = NULL;
+}
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56080_a0/bcm56080_a0_pkt_txpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56080_a0/bcm56080_a0_pkt_txpmd.c
new file mode 100644
index 000000000..c40e95804
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56080_a0/bcm56080_a0_pkt_txpmd.c
@@ -0,0 +1,1316 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated from the registers file.
+ * Edits to this file will be lost when it is regenerated.
+ * Tool: INTERNAL/regs/xgs/generate-pmd.pl
+ *
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ *
+ * This file provides TXPMD access functions for BCM56080_A0.
+ *
+ ******************************************************************************/
+
+#include <sal/sal_types.h>
+#include <bcmpkt/bcmpkt_txpmd_internal.h>
+
+#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1)
+#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l))
+#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s)))
+#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s)))
+/*******************************************************************************
+ * SWFORMAT:  TXPMD
+ * BLOCKS:
+ * SIZE:     128
+ ******************************************************************************/
+static void bcmpkt_txpmd_start_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 30, 2, val);
+}
+
+static uint32_t bcmpkt_txpmd_start_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 30, 2);
+    return val;
+}
+
+static void bcmpkt_txpmd_header_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 24, 6, val);
+}
+
+static uint32_t bcmpkt_txpmd_header_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 24, 6);
+    return val;
+}
+
+static void bcmpkt_txpmd_sop_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 17, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_sop_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 17, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_eop_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return;
+    }
+    WORD_FIELD_SET(data[3], 29, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_eop_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[3], 29, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_cell_error_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return;
+    }
+    WORD_FIELD_SET(data[3], 0, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_cell_error_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[3], 0, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_src_modid_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 23, 8, val);
+}
+
+static uint32_t bcmpkt_txpmd_src_modid_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 23, 8);
+    return val;
+}
+
+static void bcmpkt_txpmd_cos_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return;
+    }
+    WORD_FIELD_SET(data[3], 3, 6, val);
+}
+
+static uint32_t bcmpkt_txpmd_cos_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[3], 3, 6);
+    return val;
+}
+
+static void bcmpkt_txpmd_input_pri_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 9, 4, val);
+}
+
+static uint32_t bcmpkt_txpmd_input_pri_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 9, 4);
+    return val;
+}
+
+static void bcmpkt_txpmd_unicast_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return;
+    }
+    WORD_FIELD_SET(data[1], 0, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_unicast_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[1], 0, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_rqe_q_num_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 13, 4, val);
+}
+
+static uint32_t bcmpkt_txpmd_rqe_q_num_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 13, 4);
+    return val;
+}
+
+static void bcmpkt_txpmd_ieee1588_one_step_enable_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return;
+    }
+    WORD_FIELD_SET(data[3], 31, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_ieee1588_one_step_enable_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[3], 31, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_ieee1588_regen_udp_checksum_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 0, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_ieee1588_regen_udp_checksum_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 0, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return;
+    }
+    WORD_FIELD_SET(data[3], 30, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[3], 30, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 1, 8, val);
+}
+
+static uint32_t bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 1, 8);
+    return val;
+}
+
+static void bcmpkt_txpmd_tx_ts_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 31, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_tx_ts_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 31, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_spid_override_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 22, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_spid_override_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 22, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_spid_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 20, 2, val);
+}
+
+static uint32_t bcmpkt_txpmd_spid_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 20, 2);
+    return val;
+}
+
+static void bcmpkt_txpmd_spap_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 18, 2, val);
+}
+
+static uint32_t bcmpkt_txpmd_spap_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 18, 2);
+    return val;
+}
+
+static void bcmpkt_txpmd_cng_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return;
+    }
+    WORD_FIELD_SET(data[3], 1, 2, val);
+}
+
+static uint32_t bcmpkt_txpmd_cng_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[3], 1, 2);
+    return val;
+}
+
+static void bcmpkt_txpmd_destination_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return;
+    }
+    WORD_FIELD_SET(data[3], 9, 16, val);
+}
+
+static uint32_t bcmpkt_txpmd_destination_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[3], 9, 16);
+    return val;
+}
+
+static void bcmpkt_txpmd_destination_type_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return;
+    }
+    if (val == BCMPKT_TXPMD_DESTINATION_T_INVALID) {
+        val = 9;
+    }
+    WORD_FIELD_SET(data[3], 25, 4, val);
+}
+
+static uint32_t bcmpkt_txpmd_destination_type_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[3], 25, 4);
+    if (val == 9) {
+        val = BCMPKT_TXPMD_DESTINATION_T_INVALID;
+    }
+    return val;
+}
+
+static void bcmpkt_txpmd_wred_mark_eligible_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return;
+    }
+    WORD_FIELD_SET(data[1], 1, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_wred_mark_eligible_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[1], 1, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_wred_response_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return;
+    }
+    WORD_FIELD_SET(data[1], 2, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_wred_response_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[1], 2, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_cpu_tx_mcast_lb_index_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return;
+    }
+    WORD_FIELD_SET(data[3], 0, 7, val);
+}
+
+static uint32_t bcmpkt_txpmd_cpu_tx_mcast_lb_index_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[3], 0, 7);
+    return val;
+}
+
+static void bcmpkt_txpmd_cpu_tx_ecmp_member_id_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return;
+    }
+    WORD_FIELD_SET(data[3], 0, 10, val);
+}
+
+static uint32_t bcmpkt_txpmd_cpu_tx_ecmp_member_id_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[3], 0, 10);
+    return val;
+}
+
+static void bcmpkt_txpmd_cpu_tx_destination_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return;
+    }
+    WORD_FIELD_SET(data[3], 10, 16, val);
+}
+
+static uint32_t bcmpkt_txpmd_cpu_tx_destination_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[3], 10, 16);
+    return val;
+}
+
+static void bcmpkt_txpmd_cpu_tx_destination_type_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return;
+    }
+    if (val == BCMPKT_TXPMD_CPU_TX_DESTINATION_T_INVALID) {
+        val = 9;
+    }
+    WORD_FIELD_SET(data[3], 26, 4, val);
+}
+
+static uint32_t bcmpkt_txpmd_cpu_tx_destination_type_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[3], 26, 4);
+    if (val == 9) {
+        val = BCMPKT_TXPMD_CPU_TX_DESTINATION_T_INVALID;
+    }
+    return val;
+}
+
+static void bcmpkt_txpmd_cpu_tx_dp_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return;
+    }
+    WORD_FIELD_SET(data[3], 30, 2, val);
+}
+
+static uint32_t bcmpkt_txpmd_cpu_tx_dp_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[3], 30, 2);
+    return val;
+}
+
+static void bcmpkt_txpmd_cpu_tx_input_pri_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 0, 4, val);
+}
+
+static uint32_t bcmpkt_txpmd_cpu_tx_input_pri_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 0, 4);
+    return val;
+}
+
+static void bcmpkt_txpmd_cpu_tx_int_cn_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 4, 2, val);
+}
+
+static uint32_t bcmpkt_txpmd_cpu_tx_int_cn_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 4, 2);
+    return val;
+}
+
+static void bcmpkt_txpmd_cpu_tx_int_pri_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 6, 4, val);
+}
+
+static uint32_t bcmpkt_txpmd_cpu_tx_int_pri_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 6, 4);
+    return val;
+}
+
+static void bcmpkt_txpmd_cpu_tx_mcast_lb_index_vld_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 10, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_cpu_tx_mcast_lb_index_vld_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 10, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_cpu_tx_pkt_profile_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 11, 3, val);
+}
+
+static uint32_t bcmpkt_txpmd_cpu_tx_pkt_profile_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 11, 3);
+    return val;
+}
+
+static void bcmpkt_txpmd_cpu_tx_qos_fields_vld_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 14, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_cpu_tx_qos_fields_vld_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 14, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_cpu_tx_routed_pkt_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 15, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_cpu_tx_routed_pkt_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 15, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_cpu_tx_unicast_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 17, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_cpu_tx_unicast_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 17, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_cpu_tx_sop_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 16, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_cpu_tx_sop_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 16, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_cpu_tx_vrf_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 18, 6, val);
+}
+
+static uint32_t bcmpkt_txpmd_cpu_tx_vrf_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 18, 6);
+    return val;
+}
+
+static void bcmpkt_txpmd_cpu_tx_vrf_valid_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 24, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_cpu_tx_vrf_valid_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 24, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_cpu_tx_wcmp_sel_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 25, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_cpu_tx_wcmp_sel_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 25, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_oam_downmep_tx_cell_error_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) {
+        return;
+    }
+    WORD_FIELD_SET(data[3], 0, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_oam_downmep_tx_cell_error_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[3], 0, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_oam_downmep_tx_cell_length_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) {
+        return;
+    }
+    WORD_FIELD_SET(data[3], 1, 8, val);
+}
+
+static uint32_t bcmpkt_txpmd_oam_downmep_tx_cell_length_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[3], 1, 8);
+    return val;
+}
+
+static void bcmpkt_txpmd_oam_downmep_tx_cos_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) {
+        return;
+    }
+    WORD_FIELD_SET(data[3], 9, 6, val);
+}
+
+static uint32_t bcmpkt_txpmd_oam_downmep_tx_cos_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[3], 9, 6);
+    return val;
+}
+
+static void bcmpkt_txpmd_oam_downmep_tx_destination_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) {
+        return;
+    }
+    WORD_FIELD_SET(data[3], 15, 16, val);
+}
+
+static uint32_t bcmpkt_txpmd_oam_downmep_tx_destination_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[3], 15, 16);
+    return val;
+}
+
+static void bcmpkt_txpmd_oam_downmep_tx_destination_type_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) {
+        return;
+    }
+    WORD_FIELD_SET(data[3], 31, 1, val & MASK(1));
+    WORD_FIELD_SET(data[2], 0, 3, (val >> 1) & MASK(3));
+}
+
+static uint32_t bcmpkt_txpmd_oam_downmep_tx_destination_type_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) {
+        return 0;
+    }
+    val = (WORD_FIELD_GET(data[3], 31, 1) | (WORD_FIELD_GET(data[2], 0, 3) << 1)) ;
+    return val;
+}
+
+static void bcmpkt_txpmd_oam_downmep_tx_eop_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 3, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_oam_downmep_tx_eop_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 3, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_oam_downmep_tx_input_pri_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 4, 4, val);
+}
+
+static uint32_t bcmpkt_txpmd_oam_downmep_tx_input_pri_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 4, 4);
+    return val;
+}
+
+static void bcmpkt_txpmd_oam_downmep_tx_lm_counter_action_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 8, 2, val);
+}
+
+static uint32_t bcmpkt_txpmd_oam_downmep_tx_lm_counter_action_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 8, 2);
+    return val;
+}
+
+static void bcmpkt_txpmd_oam_downmep_tx_lm_counter_id_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 10, 9, val);
+}
+
+static uint32_t bcmpkt_txpmd_oam_downmep_tx_lm_counter_id_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 10, 9);
+    return val;
+}
+
+static void bcmpkt_txpmd_oam_downmep_tx_oam_replacement_offset_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 19, 6, val);
+}
+
+static uint32_t bcmpkt_txpmd_oam_downmep_tx_oam_replacement_offset_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 19, 6);
+    return val;
+}
+
+static void bcmpkt_txpmd_oam_downmep_tx_pkt_length_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 25, 7, val & MASK(7));
+    WORD_FIELD_SET(data[1], 0, 7, (val >> 7) & MASK(7));
+}
+
+static uint32_t bcmpkt_txpmd_oam_downmep_tx_pkt_length_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) {
+        return 0;
+    }
+    val = (WORD_FIELD_GET(data[2], 25, 7) | (WORD_FIELD_GET(data[1], 0, 7) << 7)) ;
+    return val;
+}
+
+static void bcmpkt_txpmd_oam_downmep_tx_rqe_q_num_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) {
+        return;
+    }
+    WORD_FIELD_SET(data[1], 7, 4, val);
+}
+
+static uint32_t bcmpkt_txpmd_oam_downmep_tx_rqe_q_num_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[1], 7, 4);
+    return val;
+}
+
+static void bcmpkt_txpmd_oam_downmep_tx_sop_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) {
+        return;
+    }
+    WORD_FIELD_SET(data[1], 11, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_oam_downmep_tx_sop_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[1], 11, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_oam_downmep_tx_spap_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) {
+        return;
+    }
+    WORD_FIELD_SET(data[1], 12, 2, val);
+}
+
+static uint32_t bcmpkt_txpmd_oam_downmep_tx_spap_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[1], 12, 2);
+    return val;
+}
+
+static void bcmpkt_txpmd_oam_downmep_tx_spid_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) {
+        return;
+    }
+    WORD_FIELD_SET(data[1], 14, 2, val);
+}
+
+static uint32_t bcmpkt_txpmd_oam_downmep_tx_spid_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[1], 14, 2);
+    return val;
+}
+
+static void bcmpkt_txpmd_oam_downmep_tx_spid_override_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) {
+        return;
+    }
+    WORD_FIELD_SET(data[1], 16, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_oam_downmep_tx_spid_override_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[1], 16, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_oam_downmep_tx_src_modid_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) {
+        return;
+    }
+    WORD_FIELD_SET(data[1], 17, 8, val);
+}
+
+static uint32_t bcmpkt_txpmd_oam_downmep_tx_src_modid_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[1], 17, 8);
+    return val;
+}
+
+static void bcmpkt_txpmd_oam_downmep_tx_timestamp_action_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) {
+        return;
+    }
+    WORD_FIELD_SET(data[1], 25, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_oam_downmep_tx_timestamp_action_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[1], 25, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_oam_downmep_tx_unicast_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) {
+        return;
+    }
+    WORD_FIELD_SET(data[1], 26, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_oam_downmep_tx_unicast_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[1], 26, 1);
+    return val;
+}
+
+static uint32_t bcmpkt_txpmd_i_size_get(uint32_t *data, uint32_t **addr)
+{
+    return 4;
+}
+
+
+const bcmpkt_txpmd_fget_t bcm56080_a0_txpmd_fget = {
+    {
+        bcmpkt_txpmd_start_get,
+        bcmpkt_txpmd_header_type_get,
+        NULL,
+        NULL,
+        bcmpkt_txpmd_sop_get,
+        bcmpkt_txpmd_eop_get,
+        NULL,
+        bcmpkt_txpmd_cell_error_get,
+        NULL,
+        bcmpkt_txpmd_src_modid_get,
+        bcmpkt_txpmd_cos_get,
+        bcmpkt_txpmd_input_pri_get,
+        bcmpkt_txpmd_unicast_get,
+        bcmpkt_txpmd_rqe_q_num_get,
+        NULL,
+        bcmpkt_txpmd_ieee1588_one_step_enable_get,
+        bcmpkt_txpmd_ieee1588_regen_udp_checksum_get,
+        bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_get,
+        bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_get,
+        bcmpkt_txpmd_tx_ts_get,
+        bcmpkt_txpmd_spid_override_get,
+        bcmpkt_txpmd_spid_get,
+        bcmpkt_txpmd_spap_get,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_txpmd_cng_get,
+        bcmpkt_txpmd_destination_get,
+        bcmpkt_txpmd_destination_type_get,
+        bcmpkt_txpmd_wred_mark_eligible_get,
+        bcmpkt_txpmd_wred_response_get,
+        bcmpkt_txpmd_cpu_tx_mcast_lb_index_get,
+        bcmpkt_txpmd_cpu_tx_ecmp_member_id_get,
+        bcmpkt_txpmd_cpu_tx_destination_get,
+        bcmpkt_txpmd_cpu_tx_destination_type_get,
+        bcmpkt_txpmd_cpu_tx_dp_get,
+        bcmpkt_txpmd_cpu_tx_input_pri_get,
+        bcmpkt_txpmd_cpu_tx_int_cn_get,
+        bcmpkt_txpmd_cpu_tx_int_pri_get,
+        bcmpkt_txpmd_cpu_tx_mcast_lb_index_vld_get,
+        bcmpkt_txpmd_cpu_tx_pkt_profile_get,
+        bcmpkt_txpmd_cpu_tx_qos_fields_vld_get,
+        bcmpkt_txpmd_cpu_tx_routed_pkt_get,
+        bcmpkt_txpmd_cpu_tx_unicast_get,
+        bcmpkt_txpmd_cpu_tx_sop_get,
+        bcmpkt_txpmd_cpu_tx_vrf_get,
+        bcmpkt_txpmd_cpu_tx_vrf_valid_get,
+        bcmpkt_txpmd_cpu_tx_wcmp_sel_get,
+        bcmpkt_txpmd_oam_downmep_tx_cell_error_get,
+        bcmpkt_txpmd_oam_downmep_tx_cell_length_get,
+        bcmpkt_txpmd_oam_downmep_tx_cos_get,
+        bcmpkt_txpmd_oam_downmep_tx_destination_get,
+        bcmpkt_txpmd_oam_downmep_tx_destination_type_get,
+        bcmpkt_txpmd_oam_downmep_tx_eop_get,
+        bcmpkt_txpmd_oam_downmep_tx_input_pri_get,
+        bcmpkt_txpmd_oam_downmep_tx_lm_counter_action_get,
+        bcmpkt_txpmd_oam_downmep_tx_lm_counter_id_get,
+        bcmpkt_txpmd_oam_downmep_tx_oam_replacement_offset_get,
+        bcmpkt_txpmd_oam_downmep_tx_pkt_length_get,
+        bcmpkt_txpmd_oam_downmep_tx_rqe_q_num_get,
+        bcmpkt_txpmd_oam_downmep_tx_sop_get,
+        bcmpkt_txpmd_oam_downmep_tx_spap_get,
+        bcmpkt_txpmd_oam_downmep_tx_spid_get,
+        bcmpkt_txpmd_oam_downmep_tx_spid_override_get,
+        bcmpkt_txpmd_oam_downmep_tx_src_modid_get,
+        bcmpkt_txpmd_oam_downmep_tx_timestamp_action_get,
+        bcmpkt_txpmd_oam_downmep_tx_unicast_get,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL
+    }
+};
+
+
+const bcmpkt_txpmd_fset_t bcm56080_a0_txpmd_fset = {
+    {
+        bcmpkt_txpmd_start_set,
+        bcmpkt_txpmd_header_type_set,
+        NULL,
+        NULL,
+        bcmpkt_txpmd_sop_set,
+        bcmpkt_txpmd_eop_set,
+        NULL,
+        bcmpkt_txpmd_cell_error_set,
+        NULL,
+        bcmpkt_txpmd_src_modid_set,
+        bcmpkt_txpmd_cos_set,
+        bcmpkt_txpmd_input_pri_set,
+        bcmpkt_txpmd_unicast_set,
+        bcmpkt_txpmd_rqe_q_num_set,
+        NULL,
+        bcmpkt_txpmd_ieee1588_one_step_enable_set,
+        bcmpkt_txpmd_ieee1588_regen_udp_checksum_set,
+        bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_set,
+        bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_set,
+        bcmpkt_txpmd_tx_ts_set,
+        bcmpkt_txpmd_spid_override_set,
+        bcmpkt_txpmd_spid_set,
+        bcmpkt_txpmd_spap_set,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_txpmd_cng_set,
+        bcmpkt_txpmd_destination_set,
+        bcmpkt_txpmd_destination_type_set,
+        bcmpkt_txpmd_wred_mark_eligible_set,
+        bcmpkt_txpmd_wred_response_set,
+        bcmpkt_txpmd_cpu_tx_mcast_lb_index_set,
+        bcmpkt_txpmd_cpu_tx_ecmp_member_id_set,
+        bcmpkt_txpmd_cpu_tx_destination_set,
+        bcmpkt_txpmd_cpu_tx_destination_type_set,
+        bcmpkt_txpmd_cpu_tx_dp_set,
+        bcmpkt_txpmd_cpu_tx_input_pri_set,
+        bcmpkt_txpmd_cpu_tx_int_cn_set,
+        bcmpkt_txpmd_cpu_tx_int_pri_set,
+        bcmpkt_txpmd_cpu_tx_mcast_lb_index_vld_set,
+        bcmpkt_txpmd_cpu_tx_pkt_profile_set,
+        bcmpkt_txpmd_cpu_tx_qos_fields_vld_set,
+        bcmpkt_txpmd_cpu_tx_routed_pkt_set,
+        bcmpkt_txpmd_cpu_tx_unicast_set,
+        bcmpkt_txpmd_cpu_tx_sop_set,
+        bcmpkt_txpmd_cpu_tx_vrf_set,
+        bcmpkt_txpmd_cpu_tx_vrf_valid_set,
+        bcmpkt_txpmd_cpu_tx_wcmp_sel_set,
+        bcmpkt_txpmd_oam_downmep_tx_cell_error_set,
+        bcmpkt_txpmd_oam_downmep_tx_cell_length_set,
+        bcmpkt_txpmd_oam_downmep_tx_cos_set,
+        bcmpkt_txpmd_oam_downmep_tx_destination_set,
+        bcmpkt_txpmd_oam_downmep_tx_destination_type_set,
+        bcmpkt_txpmd_oam_downmep_tx_eop_set,
+        bcmpkt_txpmd_oam_downmep_tx_input_pri_set,
+        bcmpkt_txpmd_oam_downmep_tx_lm_counter_action_set,
+        bcmpkt_txpmd_oam_downmep_tx_lm_counter_id_set,
+        bcmpkt_txpmd_oam_downmep_tx_oam_replacement_offset_set,
+        bcmpkt_txpmd_oam_downmep_tx_pkt_length_set,
+        bcmpkt_txpmd_oam_downmep_tx_rqe_q_num_set,
+        bcmpkt_txpmd_oam_downmep_tx_sop_set,
+        bcmpkt_txpmd_oam_downmep_tx_spap_set,
+        bcmpkt_txpmd_oam_downmep_tx_spid_set,
+        bcmpkt_txpmd_oam_downmep_tx_spid_override_set,
+        bcmpkt_txpmd_oam_downmep_tx_src_modid_set,
+        bcmpkt_txpmd_oam_downmep_tx_timestamp_action_set,
+        bcmpkt_txpmd_oam_downmep_tx_unicast_set,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL
+    }
+};
+
+
+const bcmpkt_txpmd_figet_t bcm56080_a0_txpmd_figet = {
+    {
+        bcmpkt_txpmd_i_size_get
+    }
+};
+
+static shr_enum_map_t bcm56080_a0_txpmd_view_types[] = {
+    {"sobmh_from_cpu", 1},
+    {"oam_downmep_tx", 12},
+    {"cpu_tx", 2},
+    {NULL, -1},
+};
+
+/* -2: unsupported, -1: global, others: view's value */
+static int bcm56080_a0_txpmd_view_infos[BCMPKT_TXPMD_FID_COUNT] = {
+     -1, -1, -2, -2,  1,  1, -2,  1, -2,  1,  1,  1,  1,  1, -2,  1,
+      1,  1,  1,  1,  1,  1,  1, -2, -2, -2, -2, -2, -2, -2,  1,  1,
+      1,  1,  1,  2,  2,  2,  2,  2,  2,  2,  2,  2,  2,  2,  2,  2,
+      2,  2,  2,  2, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12,
+     12, 12, 12, 12, 12, 12, 12, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+     -2, -2, -2,
+};
+
+
+void bcm56080_a0_txpmd_view_info_get(bcmpkt_pmd_view_info_t *info)
+{
+    info->view_infos = bcm56080_a0_txpmd_view_infos;
+    info->view_types = bcm56080_a0_txpmd_view_types;
+    info->view_type_get = bcmpkt_txpmd_header_type_get;
+}
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56690_a0/bcm56690_a0_pkt_lbhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56690_a0/bcm56690_a0_pkt_lbhdr.c
new file mode 100644
index 000000000..167f84533
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56690_a0/bcm56690_a0_pkt_lbhdr.c
@@ -0,0 +1,169 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated from the registers file.
+ * Edits to this file will be lost when it is regenerated.
+ * Tool: INTERNAL/regs/xgs/generate-pmd.pl
+ *
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ *
+ * This file provides LBHDR access functions for BCM56690_A0.
+ *
+ ******************************************************************************/
+
+#include <sal/sal_types.h>
+#include <bcmpkt/bcmpkt_lbhdr_internal.h>
+
+#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1)
+#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l))
+#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s)))
+#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s)))
+
+const bcmpkt_lbhdr_fget_t bcm56690_a0_lbhdr_fget = {
+    {
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL
+    }
+};
+
+
+const bcmpkt_lbhdr_fset_t bcm56690_a0_lbhdr_fset = {
+    {
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL
+    }
+};
+
+
+const bcmpkt_lbhdr_figet_t bcm56690_a0_lbhdr_figet = {
+    {
+        NULL
+    }
+};
+
+static shr_enum_map_t bcm56690_a0_lbhdr_view_types[] = {
+    {NULL, -1},
+};
+
+/* -2: unsupported, -1: global, others: view's value */
+static int bcm56690_a0_lbhdr_view_infos[BCMPKT_LBHDR_FID_COUNT] = {
+     -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+     -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+     -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+     -2,
+};
+
+
+void bcm56690_a0_lbhdr_view_info_get(bcmpkt_pmd_view_info_t *info)
+{
+    info->view_infos = bcm56690_a0_lbhdr_view_infos;
+    info->view_types = bcm56690_a0_lbhdr_view_types;
+    info->view_type_get = NULL;
+}
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56690_a0/bcm56690_a0_pkt_rxpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56690_a0/bcm56690_a0_pkt_rxpmd.c
new file mode 100644
index 000000000..d3cea9012
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56690_a0/bcm56690_a0_pkt_rxpmd.c
@@ -0,0 +1,546 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated from the registers file.
+ * Edits to this file will be lost when it is regenerated.
+ * Tool: INTERNAL/regs/xgs/generate-pmd.pl
+ *
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ *
+ * This file provides RXPMD access functions for BCM56690_A0.
+ *
+ ******************************************************************************/
+
+#include <sal/sal_types.h>
+#include <bcmpkt/bcmpkt_rxpmd.h>
+#include <bcmpkt/bcmpkt_rxpmd_internal.h>
+
+#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1)
+#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l))
+#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s)))
+#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s)))
+/*******************************************************************************
+ * SWFORMAT:  RXPMD
+ * BLOCKS:
+ * SIZE:     576
+ ******************************************************************************/
+static void bcmpkt_rxpmd_queue_num_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 2, 6, val);
+}
+
+static uint32_t bcmpkt_rxpmd_queue_num_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 2, 6);
+    return val;
+}
+
+static void bcmpkt_rxpmd_pkt_length_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 16, 16, val);
+}
+
+static uint32_t bcmpkt_rxpmd_pkt_length_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 16, 16);
+    return val;
+}
+
+static void bcmpkt_rxpmd_src_port_num_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 25, 7, val);
+}
+
+static uint32_t bcmpkt_rxpmd_src_port_num_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 25, 7);
+    return val;
+}
+
+static void bcmpkt_rxpmd_l3only_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 14, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_l3only_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 14, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_ip_routed_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 21, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_ip_routed_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 21, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_uc_sw_copy_dropped_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 15, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_uc_sw_copy_dropped_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 15, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_switch_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 13, 1, val == 0);
+}
+
+static uint32_t bcmpkt_rxpmd_switch_get(uint32_t *data)
+{
+    uint32_t val;
+    val = (WORD_FIELD_GET(data[0], 13, 1) == 0);
+    return val;
+}
+
+static void bcmpkt_rxpmd_replication_or_nhop_index_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 16, 16, val);
+}
+
+static uint32_t bcmpkt_rxpmd_replication_or_nhop_index_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 16, 16);
+    return val;
+}
+
+static void bcmpkt_rxpmd_mpb_flex_data_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 1, 6, val);
+}
+
+static uint32_t bcmpkt_rxpmd_mpb_flex_data_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 1, 6);
+    return val;
+}
+
+static void bcmpkt_rxpmd_int_cn_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 16, 2, val);
+}
+
+static uint32_t bcmpkt_rxpmd_int_cn_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 16, 2);
+    return val;
+}
+
+static void bcmpkt_rxpmd_cng_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 18, 2, val);
+}
+
+static uint32_t bcmpkt_rxpmd_cng_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 18, 2);
+    return val;
+}
+
+static void bcmpkt_rxpmd_egr_zone_remap_ctrl_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 9, 4, val);
+}
+
+static uint32_t bcmpkt_rxpmd_egr_zone_remap_ctrl_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 9, 4);
+    return val;
+}
+
+static void bcmpkt_rxpmd_dma_header_version_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 0, 2, val);
+}
+
+static uint32_t bcmpkt_rxpmd_dma_header_version_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 0, 2);
+    return val;
+}
+
+static void bcmpkt_rxpmd_multicast_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 20, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_multicast_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 20, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_copy_to_cpu_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 22, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_copy_to_cpu_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 22, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_truncate_cpu_copy_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 8, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_truncate_cpu_copy_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 8, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_dop_trigger_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 7, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_dop_trigger_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 7, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_eparse_extract_offsets_3_0_or_mirror_encap_index_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 8, 4, val);
+}
+
+static uint32_t bcmpkt_rxpmd_eparse_extract_offsets_3_0_or_mirror_encap_index_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 8, 4);
+    return val;
+}
+
+static void bcmpkt_rxpmd_eparse_extract_offsets_6_4_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 12, 3, val);
+}
+
+static uint32_t bcmpkt_rxpmd_eparse_extract_offsets_6_4_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 12, 3);
+    return val;
+}
+
+static void bcmpkt_rxpmd_arc_id_lo_set(uint32_t *data, uint32_t val)
+{
+    data[2] = val;
+}
+
+static uint32_t bcmpkt_rxpmd_arc_id_lo_get(uint32_t *data)
+{
+    uint32_t val;
+    val = data[2];
+    return val;
+}
+
+static void bcmpkt_rxpmd_arc_id_hi_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 0, 16, val);
+}
+
+static uint32_t bcmpkt_rxpmd_arc_id_hi_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 0, 16);
+    return val;
+}
+
+static uint32_t bcmpkt_rxpmd_i_size_get(uint32_t *data, uint32_t **addr)
+{
+    return 18;
+}
+
+static uint32_t bcmpkt_rxpmd_i_flex_data_get(uint32_t *data, uint32_t **addr)
+{
+    *addr = data + 4;
+    return 14;
+}
+
+void bcm56690_a0_rx_reason_encode(const bcmpkt_rx_reasons_t *reasons, uint32_t *data)
+{
+}
+
+void bcm56690_a0_rx_reason_decode(const uint32_t *data, bcmpkt_rx_reasons_t *reasons)
+{
+}
+
+void bcm56690_a0_ep_rx_reason_encode(const bcmpkt_rx_reasons_t *reasons, uint32_t *data)
+{
+}
+
+void bcm56690_a0_ep_rx_reason_decode(const uint32_t *data, bcmpkt_rx_reasons_t *reasons)
+{
+}
+
+const bcmpkt_rxpmd_fget_t bcm56690_a0_rxpmd_fget = {
+    {
+        NULL,
+        bcmpkt_rxpmd_queue_num_get,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_pkt_length_get,
+        bcmpkt_rxpmd_src_port_num_get,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_l3only_get,
+        bcmpkt_rxpmd_ip_routed_get,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_uc_sw_copy_dropped_get,
+        bcmpkt_rxpmd_switch_get,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_replication_or_nhop_index_get,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_mpb_flex_data_type_get,
+        bcmpkt_rxpmd_int_cn_get,
+        bcmpkt_rxpmd_cng_get,
+        bcmpkt_rxpmd_egr_zone_remap_ctrl_get,
+        bcmpkt_rxpmd_dma_header_version_get,
+        bcmpkt_rxpmd_multicast_get,
+        bcmpkt_rxpmd_copy_to_cpu_get,
+        bcmpkt_rxpmd_truncate_cpu_copy_get,
+        NULL,
+        bcmpkt_rxpmd_dop_trigger_get,
+        bcmpkt_rxpmd_eparse_extract_offsets_3_0_or_mirror_encap_index_get,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_eparse_extract_offsets_6_4_get,
+        NULL,
+        bcmpkt_rxpmd_arc_id_lo_get,
+        bcmpkt_rxpmd_arc_id_hi_get,
+        NULL,
+        NULL,
+        NULL,
+        NULL
+    }
+};
+
+
+const bcmpkt_rxpmd_fset_t bcm56690_a0_rxpmd_fset = {
+    {
+        NULL,
+        bcmpkt_rxpmd_queue_num_set,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_pkt_length_set,
+        bcmpkt_rxpmd_src_port_num_set,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_l3only_set,
+        bcmpkt_rxpmd_ip_routed_set,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_uc_sw_copy_dropped_set,
+        bcmpkt_rxpmd_switch_set,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_replication_or_nhop_index_set,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_mpb_flex_data_type_set,
+        bcmpkt_rxpmd_int_cn_set,
+        bcmpkt_rxpmd_cng_set,
+        bcmpkt_rxpmd_egr_zone_remap_ctrl_set,
+        bcmpkt_rxpmd_dma_header_version_set,
+        bcmpkt_rxpmd_multicast_set,
+        bcmpkt_rxpmd_copy_to_cpu_set,
+        bcmpkt_rxpmd_truncate_cpu_copy_set,
+        NULL,
+        bcmpkt_rxpmd_dop_trigger_set,
+        bcmpkt_rxpmd_eparse_extract_offsets_3_0_or_mirror_encap_index_set,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_eparse_extract_offsets_6_4_set,
+        NULL,
+        bcmpkt_rxpmd_arc_id_lo_set,
+        bcmpkt_rxpmd_arc_id_hi_set,
+        NULL,
+        NULL,
+        NULL,
+        NULL
+    }
+};
+
+
+const bcmpkt_rxpmd_figet_t bcm56690_a0_rxpmd_figet = {
+    {
+        bcmpkt_rxpmd_i_size_get,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_i_flex_data_get
+    }
+};
+
+static shr_enum_map_t bcm56690_a0_rxpmd_view_types[] = {
+    {NULL, -1},
+};
+
+/* -2: unsupported, -1: global, others: view's value */
+static int bcm56690_a0_rxpmd_view_infos[BCMPKT_RXPMD_FID_COUNT] = {
+     -2, -1, -2, -2, -2, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+     -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, -1, -2, -2, -1, -1, -2,
+     -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+     -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+     -2, -1, -2, -2, -1, -1, -1, -1, -1, -1, -1, -1, -2, -1, -1, -2,
+     -2, -2, -2, -2, -2, -1, -2, -1, -1, -2, -2, -2, -2,
+};
+
+
+void bcm56690_a0_rxpmd_view_info_get(bcmpkt_pmd_view_info_t *info)
+{
+    info->view_infos = bcm56690_a0_rxpmd_view_infos;
+    info->view_types = bcm56690_a0_rxpmd_view_types;
+    info->view_type_get = NULL;
+}
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56690_a0/bcm56690_a0_pkt_rxpmd_field.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56690_a0/bcm56690_a0_pkt_rxpmd_field.c
new file mode 100644
index 000000000..d22b891d3
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56690_a0/bcm56690_a0_pkt_rxpmd_field.c
@@ -0,0 +1,105 @@
+/*! \file bcm56690_a0_pkt_rxpmd_field.c
+ *
+ * This file provides RXPMD access functions for BCM56690_A0.
+ *
+ */
+/*
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ */
+
+#include <sal/sal_types.h>
+#include <shr/shr_error.h>
+#include <bcmpkt/bcmpkt_rxpmd.h>
+#include <bcmpkt/bcmpkt_rxpmd_internal.h>
+#include <bcmpkt/bcmpkt_flexhdr_internal.h>
+#include <bcmpkt/chip/bcm56690_a0/bcmpkt_bcm56690_a0_rxpmd.h>
+
+#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1)
+#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l))
+#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s)))
+#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s)))
+
+int bcm56690_a0_rxpmd_flex_fget(uint32_t *data,
+                                bcmpkt_flex_field_metadata_t *fld_info,
+                                int prof,
+                                uint32_t *val)
+{
+    uint32_t hdr_words = 14; /* MPB_FLEX_DATA size in words. */
+    uint32_t minbit = fld_info->profile[prof].minbit;
+    uint32_t maxbit = fld_info->profile[prof].maxbit;
+    uint32_t minword = minbit / 32;
+    uint32_t low_bit = minbit - (minword * 32);
+    uint32_t high_bit = maxbit - (minword * 32);
+    uint32_t diff = high_bit - low_bit;
+    uint32_t index = hdr_words - minword - 1;
+
+    /* Profile not valid for this field. */
+    if ((minbit == 0xFFFFFFFF) ||
+        (prof >= fld_info->profile_cnt)) {
+        return SHR_E_PARAM;
+    }
+
+    /* Skip fields with minbit >= 448.*/
+    if (minbit >= 448) {
+        return SHR_E_PARAM;
+    }
+
+    if (diff == 31) {
+        *val = data[index];
+    } else if (diff < 31) {
+        *val = WORD_FIELD_GET(data[index], low_bit, diff+1);
+    } else {
+        return SHR_E_PARAM;
+    }
+
+    return SHR_E_NONE;
+}
+
+int bcm56690_a0_rxpmd_flex_fset(uint32_t *data,
+                                bcmpkt_flex_field_metadata_t *fld_info,
+                                int prof,
+                                uint32_t val)
+{
+    uint32_t hdr_words = 14; /* MPB_FLEX_DATA size in words. */
+    uint32_t minbit = fld_info->profile[prof].minbit;
+    uint32_t maxbit = fld_info->profile[prof].maxbit;
+    uint32_t minword = minbit / 32;
+    uint32_t low_bit = minbit - (minword * 32);
+    uint32_t high_bit = maxbit - (minword * 32);
+    uint32_t diff = high_bit - low_bit;
+    uint32_t index = hdr_words - minword - 1;
+
+    /* Profile not valid for this field. */
+    if ((minbit == 0xFFFFFFFF) ||
+        (prof >= fld_info->profile_cnt)) {
+        return SHR_E_PARAM;
+    }
+
+    /* Skip fields with minbit >= 448.*/
+    if (minbit >= 448) {
+        return SHR_E_PARAM;
+    }
+
+    if (diff == 31) {
+        data[index] = val;
+    } else if (diff < 31) {
+        WORD_FIELD_SET(data[index], low_bit, diff+1, val);
+    } else {
+        return SHR_E_PARAM;
+    }
+
+    return SHR_E_NONE;
+}
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56690_a0/bcm56690_a0_pkt_txpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56690_a0/bcm56690_a0_pkt_txpmd.c
new file mode 100644
index 000000000..eb0ebd8f9
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56690_a0/bcm56690_a0_pkt_txpmd.c
@@ -0,0 +1,598 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated from the registers file.
+ * Edits to this file will be lost when it is regenerated.
+ * Tool: INTERNAL/regs/xgs/generate-pmd.pl
+ *
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ *
+ * This file provides TXPMD access functions for BCM56690_A0.
+ *
+ ******************************************************************************/
+
+#include <sal/sal_types.h>
+#include <bcmpkt/bcmpkt_txpmd_internal.h>
+
+#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1)
+#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l))
+#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s)))
+#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s)))
+/*******************************************************************************
+ * SWFORMAT:  TXPMD
+ * BLOCKS:
+ * SIZE:     128
+ ******************************************************************************/
+static void bcmpkt_txpmd_start_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 30, 2, val);
+}
+
+static uint32_t bcmpkt_txpmd_start_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 30, 2);
+    return val;
+}
+
+static void bcmpkt_txpmd_header_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 24, 6, val);
+}
+
+static uint32_t bcmpkt_txpmd_header_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 24, 6);
+    return val;
+}
+
+static void bcmpkt_txpmd_pkt_length_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 10, 14, val);
+}
+
+static uint32_t bcmpkt_txpmd_pkt_length_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 10, 14);
+    return val;
+}
+
+static void bcmpkt_txpmd_sop_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 9, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_sop_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 9, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_eop_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 8, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_eop_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 8, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_cell_length_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 0, 8, val);
+}
+
+static uint32_t bcmpkt_txpmd_cell_length_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 0, 8);
+    return val;
+}
+
+static void bcmpkt_txpmd_cell_error_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 20, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_cell_error_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 20, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_local_dest_port_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 1, 7, val);
+}
+
+static uint32_t bcmpkt_txpmd_local_dest_port_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 1, 7);
+    return val;
+}
+
+static void bcmpkt_txpmd_cos_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 6, 6, val);
+}
+
+static uint32_t bcmpkt_txpmd_cos_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 6, 6);
+    return val;
+}
+
+static void bcmpkt_txpmd_input_pri_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 24, 4, val);
+}
+
+static uint32_t bcmpkt_txpmd_input_pri_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 24, 4);
+    return val;
+}
+
+static void bcmpkt_txpmd_unicast_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 13, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_unicast_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 13, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_rqe_q_num_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 15, 4, val);
+}
+
+static uint32_t bcmpkt_txpmd_rqe_q_num_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 15, 4);
+    return val;
+}
+
+static void bcmpkt_txpmd_set_l2bm_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 14, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_set_l2bm_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 14, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_ieee1588_one_step_enable_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 19, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_ieee1588_one_step_enable_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 19, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_ieee1588_regen_udp_checksum_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 18, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_ieee1588_regen_udp_checksum_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 18, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 17, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 17, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 8, 8, val);
+}
+
+static uint32_t bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 8, 8);
+    return val;
+}
+
+static void bcmpkt_txpmd_tx_ts_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 16, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_tx_ts_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 16, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_spid_override_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 23, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_spid_override_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 23, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_spid_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 21, 2, val);
+}
+
+static uint32_t bcmpkt_txpmd_spid_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 21, 2);
+    return val;
+}
+
+static void bcmpkt_txpmd_spap_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 19, 2, val);
+}
+
+static uint32_t bcmpkt_txpmd_spap_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 19, 2);
+    return val;
+}
+
+static void bcmpkt_txpmd_unicast_pkt_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 12, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_unicast_pkt_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 12, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_ts_action_lsb_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 19, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_ts_action_lsb_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 19, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_ts_action_msb_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 21, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_ts_action_msb_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 21, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_ts_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 22, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_ts_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 22, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_dst_subport_num_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 23, 9, val & MASK(9));
+    WORD_FIELD_SET(data[0], 0, 1, (val >> 9) & MASK(1));
+}
+
+static uint32_t bcmpkt_txpmd_dst_subport_num_get(uint32_t *data)
+{
+    uint32_t val;
+    val = (WORD_FIELD_GET(data[1], 23, 9) | (WORD_FIELD_GET(data[0], 0, 1) << 9)) ;
+    return val;
+}
+
+static void bcmpkt_txpmd_udp_checksum_update_enable_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 1, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_udp_checksum_update_enable_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 1, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_udp_checksum_offset_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 2, 6, val);
+}
+
+static uint32_t bcmpkt_txpmd_udp_checksum_offset_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 2, 6);
+    return val;
+}
+
+static void bcmpkt_txpmd_copy_to_debug_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 5, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_copy_to_debug_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 5, 1);
+    return val;
+}
+
+static uint32_t bcmpkt_txpmd_i_size_get(uint32_t *data, uint32_t **addr)
+{
+    return 4;
+}
+
+
+const bcmpkt_txpmd_fget_t bcm56690_a0_txpmd_fget = {
+    {
+        bcmpkt_txpmd_start_get,
+        bcmpkt_txpmd_header_type_get,
+        bcmpkt_txpmd_pkt_length_get,
+        NULL,
+        bcmpkt_txpmd_sop_get,
+        bcmpkt_txpmd_eop_get,
+        bcmpkt_txpmd_cell_length_get,
+        bcmpkt_txpmd_cell_error_get,
+        bcmpkt_txpmd_local_dest_port_get,
+        NULL,
+        bcmpkt_txpmd_cos_get,
+        bcmpkt_txpmd_input_pri_get,
+        bcmpkt_txpmd_unicast_get,
+        bcmpkt_txpmd_rqe_q_num_get,
+        bcmpkt_txpmd_set_l2bm_get,
+        bcmpkt_txpmd_ieee1588_one_step_enable_get,
+        bcmpkt_txpmd_ieee1588_regen_udp_checksum_get,
+        bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_get,
+        bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_get,
+        bcmpkt_txpmd_tx_ts_get,
+        bcmpkt_txpmd_spid_override_get,
+        bcmpkt_txpmd_spid_get,
+        bcmpkt_txpmd_spap_get,
+        bcmpkt_txpmd_unicast_pkt_get,
+        bcmpkt_txpmd_ts_action_lsb_get,
+        bcmpkt_txpmd_ts_action_msb_get,
+        bcmpkt_txpmd_ts_type_get,
+        bcmpkt_txpmd_dst_subport_num_get,
+        bcmpkt_txpmd_udp_checksum_update_enable_get,
+        bcmpkt_txpmd_udp_checksum_offset_get,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_txpmd_copy_to_debug_get,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL
+    }
+};
+
+
+const bcmpkt_txpmd_fset_t bcm56690_a0_txpmd_fset = {
+    {
+        bcmpkt_txpmd_start_set,
+        bcmpkt_txpmd_header_type_set,
+        bcmpkt_txpmd_pkt_length_set,
+        NULL,
+        bcmpkt_txpmd_sop_set,
+        bcmpkt_txpmd_eop_set,
+        bcmpkt_txpmd_cell_length_set,
+        bcmpkt_txpmd_cell_error_set,
+        bcmpkt_txpmd_local_dest_port_set,
+        NULL,
+        bcmpkt_txpmd_cos_set,
+        bcmpkt_txpmd_input_pri_set,
+        bcmpkt_txpmd_unicast_set,
+        bcmpkt_txpmd_rqe_q_num_set,
+        bcmpkt_txpmd_set_l2bm_set,
+        bcmpkt_txpmd_ieee1588_one_step_enable_set,
+        bcmpkt_txpmd_ieee1588_regen_udp_checksum_set,
+        bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_set,
+        bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_set,
+        bcmpkt_txpmd_tx_ts_set,
+        bcmpkt_txpmd_spid_override_set,
+        bcmpkt_txpmd_spid_set,
+        bcmpkt_txpmd_spap_set,
+        bcmpkt_txpmd_unicast_pkt_set,
+        bcmpkt_txpmd_ts_action_lsb_set,
+        bcmpkt_txpmd_ts_action_msb_set,
+        bcmpkt_txpmd_ts_type_set,
+        bcmpkt_txpmd_dst_subport_num_set,
+        bcmpkt_txpmd_udp_checksum_update_enable_set,
+        bcmpkt_txpmd_udp_checksum_offset_set,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_txpmd_copy_to_debug_set,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL
+    }
+};
+
+
+const bcmpkt_txpmd_figet_t bcm56690_a0_txpmd_figet = {
+    {
+        bcmpkt_txpmd_i_size_get
+    }
+};
+
+static shr_enum_map_t bcm56690_a0_txpmd_view_types[] = {
+    {NULL, -1},
+};
+
+/* -2: unsupported, -1: global, others: view's value */
+static int bcm56690_a0_txpmd_view_infos[BCMPKT_TXPMD_FID_COUNT] = {
+     -1, -1, -1, -2, -1, -1, -1, -1, -1, -2, -1, -1, -1, -1, -1, -1,
+     -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -2, -2,
+     -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+     -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+     -2, -2, -2, -2, -2, -2, -2, -1, -2, -2, -2, -2, -2, -2, -2, -2,
+     -2, -2, -2,
+};
+
+
+void bcm56690_a0_txpmd_view_info_get(bcmpkt_pmd_view_info_t *info)
+{
+    info->view_infos = bcm56690_a0_txpmd_view_infos;
+    info->view_types = bcm56690_a0_txpmd_view_types;
+    info->view_type_get = NULL;
+}
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56780_a0/bcm56780_a0_pkt_lbhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56780_a0/bcm56780_a0_pkt_lbhdr.c
new file mode 100644
index 000000000..e21b6ec6b
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56780_a0/bcm56780_a0_pkt_lbhdr.c
@@ -0,0 +1,169 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated from the registers file.
+ * Edits to this file will be lost when it is regenerated.
+ * Tool: INTERNAL/regs/xgs/generate-pmd.pl
+ *
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ *
+ * This file provides LBHDR access functions for BCM56780_A0.
+ *
+ ******************************************************************************/
+
+#include <sal/sal_types.h>
+#include <bcmpkt/bcmpkt_lbhdr_internal.h>
+
+#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1)
+#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l))
+#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s)))
+#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s)))
+
+const bcmpkt_lbhdr_fget_t bcm56780_a0_lbhdr_fget = {
+    {
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL
+    }
+};
+
+
+const bcmpkt_lbhdr_fset_t bcm56780_a0_lbhdr_fset = {
+    {
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL
+    }
+};
+
+
+const bcmpkt_lbhdr_figet_t bcm56780_a0_lbhdr_figet = {
+    {
+        NULL
+    }
+};
+
+static shr_enum_map_t bcm56780_a0_lbhdr_view_types[] = {
+    {NULL, -1},
+};
+
+/* -2: unsupported, -1: global, others: view's value */
+static int bcm56780_a0_lbhdr_view_infos[BCMPKT_LBHDR_FID_COUNT] = {
+     -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+     -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+     -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+     -2,
+};
+
+
+void bcm56780_a0_lbhdr_view_info_get(bcmpkt_pmd_view_info_t *info)
+{
+    info->view_infos = bcm56780_a0_lbhdr_view_infos;
+    info->view_types = bcm56780_a0_lbhdr_view_types;
+    info->view_type_get = NULL;
+}
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56780_a0/bcm56780_a0_pkt_rxpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56780_a0/bcm56780_a0_pkt_rxpmd.c
new file mode 100644
index 000000000..2c1c16510
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56780_a0/bcm56780_a0_pkt_rxpmd.c
@@ -0,0 +1,558 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated from the registers file.
+ * Edits to this file will be lost when it is regenerated.
+ * Tool: INTERNAL/regs/xgs/generate-pmd.pl
+ *
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ *
+ * This file provides RXPMD access functions for BCM56780_A0.
+ *
+ ******************************************************************************/
+
+#include <sal/sal_types.h>
+#include <bcmpkt/bcmpkt_rxpmd.h>
+#include <bcmpkt/bcmpkt_rxpmd_internal.h>
+
+#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1)
+#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l))
+#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s)))
+#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s)))
+/*******************************************************************************
+ * SWFORMAT:  RXPMD
+ * BLOCKS:
+ * SIZE:     576
+ ******************************************************************************/
+static void bcmpkt_rxpmd_unicast_queue_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 31, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_unicast_queue_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 31, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_queue_num_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 2, 6, val);
+}
+
+static uint32_t bcmpkt_rxpmd_queue_num_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 2, 6);
+    return val;
+}
+
+static void bcmpkt_rxpmd_pkt_length_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 16, 16, val);
+}
+
+static uint32_t bcmpkt_rxpmd_pkt_length_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 16, 16);
+    return val;
+}
+
+static void bcmpkt_rxpmd_src_port_num_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 8, 8, val);
+}
+
+static uint32_t bcmpkt_rxpmd_src_port_num_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 8, 8);
+    return val;
+}
+
+static void bcmpkt_rxpmd_l3only_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 29, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_l3only_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 29, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_ip_routed_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 21, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_ip_routed_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 21, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_uc_sw_copy_dropped_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 30, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_uc_sw_copy_dropped_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 30, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_switch_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 28, 1, val == 0);
+}
+
+static uint32_t bcmpkt_rxpmd_switch_get(uint32_t *data)
+{
+    uint32_t val;
+    val = (WORD_FIELD_GET(data[3], 28, 1) == 0);
+    return val;
+}
+
+static void bcmpkt_rxpmd_replication_or_nhop_index_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 16, 16, val);
+}
+
+static uint32_t bcmpkt_rxpmd_replication_or_nhop_index_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 16, 16);
+    return val;
+}
+
+static void bcmpkt_rxpmd_match_id_lo_set(uint32_t *data, uint32_t val)
+{
+    data[2] = val;
+}
+
+static uint32_t bcmpkt_rxpmd_match_id_lo_get(uint32_t *data)
+{
+    uint32_t val;
+    val = data[2];
+    return val;
+}
+
+static void bcmpkt_rxpmd_match_id_hi_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 0, 16, val);
+}
+
+static uint32_t bcmpkt_rxpmd_match_id_hi_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 0, 16);
+    return val;
+}
+
+static void bcmpkt_rxpmd_mpb_flex_data_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 0, 7, val);
+}
+
+static uint32_t bcmpkt_rxpmd_mpb_flex_data_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 0, 7);
+    return val;
+}
+
+static void bcmpkt_rxpmd_int_cn_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 16, 2, val);
+}
+
+static uint32_t bcmpkt_rxpmd_int_cn_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 16, 2);
+    return val;
+}
+
+static void bcmpkt_rxpmd_cng_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 18, 2, val);
+}
+
+static uint32_t bcmpkt_rxpmd_cng_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 18, 2);
+    return val;
+}
+
+static void bcmpkt_rxpmd_egr_zone_remap_ctrl_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 24, 4, val);
+}
+
+static uint32_t bcmpkt_rxpmd_egr_zone_remap_ctrl_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 24, 4);
+    return val;
+}
+
+static void bcmpkt_rxpmd_dma_header_version_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 0, 2, val);
+}
+
+static uint32_t bcmpkt_rxpmd_dma_header_version_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 0, 2);
+    return val;
+}
+
+static void bcmpkt_rxpmd_multicast_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 20, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_multicast_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 20, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_copy_to_cpu_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 22, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_copy_to_cpu_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 22, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_truncate_cpu_copy_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 23, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_truncate_cpu_copy_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 23, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_dop_trigger_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 7, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_dop_trigger_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 7, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_eparse_extract_offsets_3_0_or_mirror_encap_index_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 8, 4, val);
+}
+
+static uint32_t bcmpkt_rxpmd_eparse_extract_offsets_3_0_or_mirror_encap_index_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 8, 4);
+    return val;
+}
+
+static void bcmpkt_rxpmd_eparse_extract_offsets_7_4_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 12, 4, val);
+}
+
+static uint32_t bcmpkt_rxpmd_eparse_extract_offsets_7_4_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 12, 4);
+    return val;
+}
+
+static uint32_t bcmpkt_rxpmd_i_size_get(uint32_t *data, uint32_t **addr)
+{
+    return 18;
+}
+
+static uint32_t bcmpkt_rxpmd_i_flex_data_get(uint32_t *data, uint32_t **addr)
+{
+    *addr = data + 4;
+    return 14;
+}
+
+void bcm56780_a0_rx_reason_encode(const bcmpkt_rx_reasons_t *reasons, uint32_t *data)
+{
+}
+
+void bcm56780_a0_rx_reason_decode(const uint32_t *data, bcmpkt_rx_reasons_t *reasons)
+{
+}
+
+void bcm56780_a0_ep_rx_reason_encode(const bcmpkt_rx_reasons_t *reasons, uint32_t *data)
+{
+}
+
+void bcm56780_a0_ep_rx_reason_decode(const uint32_t *data, bcmpkt_rx_reasons_t *reasons)
+{
+}
+
+const bcmpkt_rxpmd_fget_t bcm56780_a0_rxpmd_fget = {
+    {
+        bcmpkt_rxpmd_unicast_queue_get,
+        bcmpkt_rxpmd_queue_num_get,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_pkt_length_get,
+        bcmpkt_rxpmd_src_port_num_get,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_l3only_get,
+        bcmpkt_rxpmd_ip_routed_get,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_uc_sw_copy_dropped_get,
+        bcmpkt_rxpmd_switch_get,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_replication_or_nhop_index_get,
+        bcmpkt_rxpmd_match_id_lo_get,
+        bcmpkt_rxpmd_match_id_hi_get,
+        bcmpkt_rxpmd_mpb_flex_data_type_get,
+        bcmpkt_rxpmd_int_cn_get,
+        bcmpkt_rxpmd_cng_get,
+        bcmpkt_rxpmd_egr_zone_remap_ctrl_get,
+        bcmpkt_rxpmd_dma_header_version_get,
+        bcmpkt_rxpmd_multicast_get,
+        bcmpkt_rxpmd_copy_to_cpu_get,
+        bcmpkt_rxpmd_truncate_cpu_copy_get,
+        NULL,
+        bcmpkt_rxpmd_dop_trigger_get,
+        bcmpkt_rxpmd_eparse_extract_offsets_3_0_or_mirror_encap_index_get,
+        bcmpkt_rxpmd_eparse_extract_offsets_7_4_get,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL
+    }
+};
+
+
+const bcmpkt_rxpmd_fset_t bcm56780_a0_rxpmd_fset = {
+    {
+        bcmpkt_rxpmd_unicast_queue_set,
+        bcmpkt_rxpmd_queue_num_set,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_pkt_length_set,
+        bcmpkt_rxpmd_src_port_num_set,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_l3only_set,
+        bcmpkt_rxpmd_ip_routed_set,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_uc_sw_copy_dropped_set,
+        bcmpkt_rxpmd_switch_set,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_replication_or_nhop_index_set,
+        bcmpkt_rxpmd_match_id_lo_set,
+        bcmpkt_rxpmd_match_id_hi_set,
+        bcmpkt_rxpmd_mpb_flex_data_type_set,
+        bcmpkt_rxpmd_int_cn_set,
+        bcmpkt_rxpmd_cng_set,
+        bcmpkt_rxpmd_egr_zone_remap_ctrl_set,
+        bcmpkt_rxpmd_dma_header_version_set,
+        bcmpkt_rxpmd_multicast_set,
+        bcmpkt_rxpmd_copy_to_cpu_set,
+        bcmpkt_rxpmd_truncate_cpu_copy_set,
+        NULL,
+        bcmpkt_rxpmd_dop_trigger_set,
+        bcmpkt_rxpmd_eparse_extract_offsets_3_0_or_mirror_encap_index_set,
+        bcmpkt_rxpmd_eparse_extract_offsets_7_4_set,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL
+    }
+};
+
+
+const bcmpkt_rxpmd_figet_t bcm56780_a0_rxpmd_figet = {
+    {
+        bcmpkt_rxpmd_i_size_get,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_i_flex_data_get
+    }
+};
+
+static shr_enum_map_t bcm56780_a0_rxpmd_view_types[] = {
+    {NULL, -1},
+};
+
+/* -2: unsupported, -1: global, others: view's value */
+static int bcm56780_a0_rxpmd_view_infos[BCMPKT_RXPMD_FID_COUNT] = {
+     -1, -1, -2, -2, -2, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+     -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, -1, -2, -2, -1, -1, -2,
+     -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+     -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+     -2, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -2, -1, -1, -1,
+     -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+};
+
+
+void bcm56780_a0_rxpmd_view_info_get(bcmpkt_pmd_view_info_t *info)
+{
+    info->view_infos = bcm56780_a0_rxpmd_view_infos;
+    info->view_types = bcm56780_a0_rxpmd_view_types;
+    info->view_type_get = NULL;
+}
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56780_a0/bcm56780_a0_pkt_rxpmd_field.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56780_a0/bcm56780_a0_pkt_rxpmd_field.c
new file mode 100644
index 000000000..0b4c93276
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56780_a0/bcm56780_a0_pkt_rxpmd_field.c
@@ -0,0 +1,95 @@
+/*! \file bcm56780_a0_pkt_rxpmd_field.c
+ *
+ * This file provides RXPMD access functions for BCM56780_A0.
+ *
+ */
+/*
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ */
+
+#include <sal/sal_types.h>
+#include <shr/shr_error.h>
+#include <bcmpkt/bcmpkt_rxpmd.h>
+#include <bcmpkt/bcmpkt_rxpmd_internal.h>
+#include <bcmpkt/bcmpkt_flexhdr_internal.h>
+#include <bcmpkt/chip/bcm56780_a0/bcmpkt_bcm56780_a0_rxpmd.h>
+
+#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1)
+#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l))
+#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s)))
+#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s)))
+
+int bcm56780_a0_rxpmd_flex_fget(uint32_t *data,
+                                bcmpkt_flex_field_metadata_t *fld_info,
+                                int prof,
+                                uint32_t *val)
+{
+    uint32_t hdr_words = 14; /* MPB_FLEX_DATA size in words. */
+    uint32_t minbit = fld_info->profile[prof].minbit;
+    uint32_t maxbit = fld_info->profile[prof].maxbit;
+    uint32_t minword = minbit / 32;
+    uint32_t low_bit = minbit - (minword * 32);
+    uint32_t high_bit = maxbit - (minword * 32);
+    uint32_t diff = high_bit - low_bit;
+    uint32_t index = hdr_words - minword - 1;
+
+    /* Profile not valid for this field. */
+    if ((minbit == 0xFFFFFFFF) ||
+        (prof >= fld_info->profile_cnt)) {
+        return SHR_E_PARAM;
+    }
+
+    if (diff == 31) {
+        *val = data[index];
+    } else if (diff < 31) {
+        *val = WORD_FIELD_GET(data[index], low_bit, diff+1);
+    } else {
+        return SHR_E_PARAM;
+    }
+
+    return SHR_E_NONE;
+}
+
+int bcm56780_a0_rxpmd_flex_fset(uint32_t *data,
+                                bcmpkt_flex_field_metadata_t *fld_info,
+                                int prof,
+                                uint32_t val)
+{
+    uint32_t hdr_words = 14; /* MPB_FLEX_DATA size in words. */
+    uint32_t minbit = fld_info->profile[prof].minbit;
+    uint32_t maxbit = fld_info->profile[prof].maxbit;
+    uint32_t minword = minbit / 32;
+    uint32_t low_bit = minbit - (minword * 32);
+    uint32_t high_bit = maxbit - (minword * 32);
+    uint32_t diff = high_bit - low_bit;
+    uint32_t index = hdr_words - minword - 1;
+
+    /* Profile not valid for this field. */
+    if ((minbit == 0xFFFFFFFF) ||
+        (prof >= fld_info->profile_cnt)) {
+        return SHR_E_PARAM;
+    }
+
+    if (diff == 31) {
+        data[index] = val;
+    } else if (diff < 31) {
+        WORD_FIELD_SET(data[index], low_bit, diff+1, val);
+    } else {
+        return SHR_E_PARAM;
+    }
+
+    return SHR_E_NONE;
+}
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56780_a0/bcm56780_a0_pkt_txpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56780_a0/bcm56780_a0_pkt_txpmd.c
new file mode 100644
index 000000000..601a81cab
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56780_a0/bcm56780_a0_pkt_txpmd.c
@@ -0,0 +1,513 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated from the registers file.
+ * Edits to this file will be lost when it is regenerated.
+ * Tool: INTERNAL/regs/xgs/generate-pmd.pl
+ *
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ *
+ * This file provides TXPMD access functions for BCM56780_A0.
+ *
+ ******************************************************************************/
+
+#include <sal/sal_types.h>
+#include <bcmpkt/bcmpkt_txpmd_internal.h>
+
+#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1)
+#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l))
+#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s)))
+#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s)))
+/*******************************************************************************
+ * SWFORMAT:  TXPMD
+ * BLOCKS:
+ * SIZE:     128
+ ******************************************************************************/
+static void bcmpkt_txpmd_start_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 30, 2, val);
+}
+
+static uint32_t bcmpkt_txpmd_start_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 30, 2);
+    return val;
+}
+
+static void bcmpkt_txpmd_header_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 24, 6, val);
+}
+
+static uint32_t bcmpkt_txpmd_header_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 24, 6);
+    return val;
+}
+
+static void bcmpkt_txpmd_pkt_length_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 11, 14, val);
+}
+
+static uint32_t bcmpkt_txpmd_pkt_length_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 11, 14);
+    return val;
+}
+
+static void bcmpkt_txpmd_sop_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 10, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_sop_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 10, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_eop_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 9, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_eop_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 9, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_cell_length_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 0, 9, val);
+}
+
+static uint32_t bcmpkt_txpmd_cell_length_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 0, 9);
+    return val;
+}
+
+static void bcmpkt_txpmd_cell_error_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 20, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_cell_error_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 20, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_local_dest_port_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 0, 8, val);
+}
+
+static uint32_t bcmpkt_txpmd_local_dest_port_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 0, 8);
+    return val;
+}
+
+static void bcmpkt_txpmd_cos_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 7, 6, val);
+}
+
+static uint32_t bcmpkt_txpmd_cos_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 7, 6);
+    return val;
+}
+
+static void bcmpkt_txpmd_input_pri_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 25, 4, val);
+}
+
+static uint32_t bcmpkt_txpmd_input_pri_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 25, 4);
+    return val;
+}
+
+static void bcmpkt_txpmd_unicast_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 14, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_unicast_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 14, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_rqe_q_num_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 16, 4, val);
+}
+
+static uint32_t bcmpkt_txpmd_rqe_q_num_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 16, 4);
+    return val;
+}
+
+static void bcmpkt_txpmd_set_l2bm_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 15, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_set_l2bm_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 15, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_ieee1588_one_step_enable_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 19, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_ieee1588_one_step_enable_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 19, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_ieee1588_regen_udp_checksum_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 18, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_ieee1588_regen_udp_checksum_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 18, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 17, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 17, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 8, 8, val);
+}
+
+static uint32_t bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 8, 8);
+    return val;
+}
+
+static void bcmpkt_txpmd_tx_ts_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 16, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_tx_ts_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 16, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_spid_override_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 24, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_spid_override_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 24, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_spid_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 22, 2, val);
+}
+
+static uint32_t bcmpkt_txpmd_spid_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 22, 2);
+    return val;
+}
+
+static void bcmpkt_txpmd_spap_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 20, 2, val);
+}
+
+static uint32_t bcmpkt_txpmd_spap_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 20, 2);
+    return val;
+}
+
+static void bcmpkt_txpmd_unicast_pkt_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 13, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_unicast_pkt_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 13, 1);
+    return val;
+}
+
+static uint32_t bcmpkt_txpmd_i_size_get(uint32_t *data, uint32_t **addr)
+{
+    return 4;
+}
+
+
+const bcmpkt_txpmd_fget_t bcm56780_a0_txpmd_fget = {
+    {
+        bcmpkt_txpmd_start_get,
+        bcmpkt_txpmd_header_type_get,
+        bcmpkt_txpmd_pkt_length_get,
+        NULL,
+        bcmpkt_txpmd_sop_get,
+        bcmpkt_txpmd_eop_get,
+        bcmpkt_txpmd_cell_length_get,
+        bcmpkt_txpmd_cell_error_get,
+        bcmpkt_txpmd_local_dest_port_get,
+        NULL,
+        bcmpkt_txpmd_cos_get,
+        bcmpkt_txpmd_input_pri_get,
+        bcmpkt_txpmd_unicast_get,
+        bcmpkt_txpmd_rqe_q_num_get,
+        bcmpkt_txpmd_set_l2bm_get,
+        bcmpkt_txpmd_ieee1588_one_step_enable_get,
+        bcmpkt_txpmd_ieee1588_regen_udp_checksum_get,
+        bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_get,
+        bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_get,
+        bcmpkt_txpmd_tx_ts_get,
+        bcmpkt_txpmd_spid_override_get,
+        bcmpkt_txpmd_spid_get,
+        bcmpkt_txpmd_spap_get,
+        bcmpkt_txpmd_unicast_pkt_get,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL
+    }
+};
+
+
+const bcmpkt_txpmd_fset_t bcm56780_a0_txpmd_fset = {
+    {
+        bcmpkt_txpmd_start_set,
+        bcmpkt_txpmd_header_type_set,
+        bcmpkt_txpmd_pkt_length_set,
+        NULL,
+        bcmpkt_txpmd_sop_set,
+        bcmpkt_txpmd_eop_set,
+        bcmpkt_txpmd_cell_length_set,
+        bcmpkt_txpmd_cell_error_set,
+        bcmpkt_txpmd_local_dest_port_set,
+        NULL,
+        bcmpkt_txpmd_cos_set,
+        bcmpkt_txpmd_input_pri_set,
+        bcmpkt_txpmd_unicast_set,
+        bcmpkt_txpmd_rqe_q_num_set,
+        bcmpkt_txpmd_set_l2bm_set,
+        bcmpkt_txpmd_ieee1588_one_step_enable_set,
+        bcmpkt_txpmd_ieee1588_regen_udp_checksum_set,
+        bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_set,
+        bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_set,
+        bcmpkt_txpmd_tx_ts_set,
+        bcmpkt_txpmd_spid_override_set,
+        bcmpkt_txpmd_spid_set,
+        bcmpkt_txpmd_spap_set,
+        bcmpkt_txpmd_unicast_pkt_set,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL
+    }
+};
+
+
+const bcmpkt_txpmd_figet_t bcm56780_a0_txpmd_figet = {
+    {
+        bcmpkt_txpmd_i_size_get
+    }
+};
+
+static shr_enum_map_t bcm56780_a0_txpmd_view_types[] = {
+    {NULL, -1},
+};
+
+/* -2: unsupported, -1: global, others: view's value */
+static int bcm56780_a0_txpmd_view_infos[BCMPKT_TXPMD_FID_COUNT] = {
+     -1, -1, -1, -2, -1, -1, -1, -1, -1, -2, -1, -1, -1, -1, -1, -1,
+     -1, -1, -1, -1, -1, -1, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2,
+     -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+     -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+     -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+     -2, -2, -2,
+};
+
+
+void bcm56780_a0_txpmd_view_info_get(bcmpkt_pmd_view_info_t *info)
+{
+    info->view_infos = bcm56780_a0_txpmd_view_infos;
+    info->view_types = bcm56780_a0_txpmd_view_types;
+    info->view_type_get = NULL;
+}
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56880_a0/bcm56880_a0_pkt_lbhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56880_a0/bcm56880_a0_pkt_lbhdr.c
new file mode 100644
index 000000000..85fdbdcdb
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56880_a0/bcm56880_a0_pkt_lbhdr.c
@@ -0,0 +1,169 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated from the registers file.
+ * Edits to this file will be lost when it is regenerated.
+ * Tool: INTERNAL/regs/xgs/generate-pmd.pl
+ *
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ *
+ * This file provides LBHDR access functions for BCM56880_A0.
+ *
+ ******************************************************************************/
+
+#include <sal/sal_types.h>
+#include <bcmpkt/bcmpkt_lbhdr_internal.h>
+
+#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1)
+#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l))
+#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s)))
+#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s)))
+
+const bcmpkt_lbhdr_fget_t bcm56880_a0_lbhdr_fget = {
+    {
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL
+    }
+};
+
+
+const bcmpkt_lbhdr_fset_t bcm56880_a0_lbhdr_fset = {
+    {
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL
+    }
+};
+
+
+const bcmpkt_lbhdr_figet_t bcm56880_a0_lbhdr_figet = {
+    {
+        NULL
+    }
+};
+
+static shr_enum_map_t bcm56880_a0_lbhdr_view_types[] = {
+    {NULL, -1},
+};
+
+/* -2: unsupported, -1: global, others: view's value */
+static int bcm56880_a0_lbhdr_view_infos[BCMPKT_LBHDR_FID_COUNT] = {
+     -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+     -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+     -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+     -2,
+};
+
+
+void bcm56880_a0_lbhdr_view_info_get(bcmpkt_pmd_view_info_t *info)
+{
+    info->view_infos = bcm56880_a0_lbhdr_view_infos;
+    info->view_types = bcm56880_a0_lbhdr_view_types;
+    info->view_type_get = NULL;
+}
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56880_a0/bcm56880_a0_pkt_rxpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56880_a0/bcm56880_a0_pkt_rxpmd.c
new file mode 100644
index 000000000..a4a821ee8
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56880_a0/bcm56880_a0_pkt_rxpmd.c
@@ -0,0 +1,522 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated from the registers file.
+ * Edits to this file will be lost when it is regenerated.
+ * Tool: INTERNAL/regs/xgs/generate-pmd.pl
+ *
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ *
+ * This file provides RXPMD access functions for BCM56880_A0.
+ *
+ ******************************************************************************/
+
+#include <sal/sal_types.h>
+#include <bcmpkt/bcmpkt_rxpmd.h>
+#include <bcmpkt/bcmpkt_rxpmd_internal.h>
+
+#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1)
+#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l))
+#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s)))
+#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s)))
+/*******************************************************************************
+ * SWFORMAT:  RXPMD
+ * BLOCKS:
+ * SIZE:     576
+ ******************************************************************************/
+static void bcmpkt_rxpmd_unicast_queue_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 31, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_unicast_queue_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 31, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_queue_num_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 2, 6, val);
+}
+
+static uint32_t bcmpkt_rxpmd_queue_num_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 2, 6);
+    return val;
+}
+
+static void bcmpkt_rxpmd_pkt_length_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 16, 16, val);
+}
+
+static uint32_t bcmpkt_rxpmd_pkt_length_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 16, 16);
+    return val;
+}
+
+static void bcmpkt_rxpmd_src_port_num_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 8, 8, val);
+}
+
+static uint32_t bcmpkt_rxpmd_src_port_num_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 8, 8);
+    return val;
+}
+
+static void bcmpkt_rxpmd_l3only_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 29, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_l3only_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 29, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_ip_routed_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 17, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_ip_routed_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 17, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_uc_sw_copy_dropped_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 30, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_uc_sw_copy_dropped_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 30, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_switch_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 28, 1, val == 0);
+}
+
+static uint32_t bcmpkt_rxpmd_switch_get(uint32_t *data)
+{
+    uint32_t val;
+    val = (WORD_FIELD_GET(data[3], 28, 1) == 0);
+    return val;
+}
+
+static void bcmpkt_rxpmd_replication_or_nhop_index_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 16, 16, val);
+}
+
+static uint32_t bcmpkt_rxpmd_replication_or_nhop_index_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 16, 16);
+    return val;
+}
+
+static void bcmpkt_rxpmd_match_id_lo_set(uint32_t *data, uint32_t val)
+{
+    data[2] = val;
+}
+
+static uint32_t bcmpkt_rxpmd_match_id_lo_get(uint32_t *data)
+{
+    uint32_t val;
+    val = data[2];
+    return val;
+}
+
+static void bcmpkt_rxpmd_match_id_hi_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 0, 16, val);
+}
+
+static uint32_t bcmpkt_rxpmd_match_id_hi_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 0, 16);
+    return val;
+}
+
+static void bcmpkt_rxpmd_mpb_flex_data_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 0, 7, val);
+}
+
+static uint32_t bcmpkt_rxpmd_mpb_flex_data_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 0, 7);
+    return val;
+}
+
+static void bcmpkt_rxpmd_int_cn_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 8, 2, val);
+}
+
+static uint32_t bcmpkt_rxpmd_int_cn_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 8, 2);
+    return val;
+}
+
+static void bcmpkt_rxpmd_cng_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 10, 2, val);
+}
+
+static uint32_t bcmpkt_rxpmd_cng_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 10, 2);
+    return val;
+}
+
+static void bcmpkt_rxpmd_egr_zone_remap_ctrl_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 24, 4, val);
+}
+
+static uint32_t bcmpkt_rxpmd_egr_zone_remap_ctrl_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 24, 4);
+    return val;
+}
+
+static void bcmpkt_rxpmd_dma_header_version_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 0, 2, val);
+}
+
+static uint32_t bcmpkt_rxpmd_dma_header_version_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 0, 2);
+    return val;
+}
+
+static void bcmpkt_rxpmd_multicast_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 16, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_multicast_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 16, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_copy_to_cpu_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 20, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_copy_to_cpu_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 20, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_truncate_cpu_copy_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 21, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_truncate_cpu_copy_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 21, 1);
+    return val;
+}
+
+static uint32_t bcmpkt_rxpmd_i_size_get(uint32_t *data, uint32_t **addr)
+{
+    return 18;
+}
+
+static uint32_t bcmpkt_rxpmd_i_flex_data_get(uint32_t *data, uint32_t **addr)
+{
+    *addr = data + 4;
+    return 13;
+}
+
+void bcm56880_a0_rx_reason_encode(const bcmpkt_rx_reasons_t *reasons, uint32_t *data)
+{
+}
+
+void bcm56880_a0_rx_reason_decode(const uint32_t *data, bcmpkt_rx_reasons_t *reasons)
+{
+}
+
+void bcm56880_a0_ep_rx_reason_encode(const bcmpkt_rx_reasons_t *reasons, uint32_t *data)
+{
+}
+
+void bcm56880_a0_ep_rx_reason_decode(const uint32_t *data, bcmpkt_rx_reasons_t *reasons)
+{
+}
+
+const bcmpkt_rxpmd_fget_t bcm56880_a0_rxpmd_fget = {
+    {
+        bcmpkt_rxpmd_unicast_queue_get,
+        bcmpkt_rxpmd_queue_num_get,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_pkt_length_get,
+        bcmpkt_rxpmd_src_port_num_get,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_l3only_get,
+        bcmpkt_rxpmd_ip_routed_get,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_uc_sw_copy_dropped_get,
+        bcmpkt_rxpmd_switch_get,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_replication_or_nhop_index_get,
+        bcmpkt_rxpmd_match_id_lo_get,
+        bcmpkt_rxpmd_match_id_hi_get,
+        bcmpkt_rxpmd_mpb_flex_data_type_get,
+        bcmpkt_rxpmd_int_cn_get,
+        bcmpkt_rxpmd_cng_get,
+        bcmpkt_rxpmd_egr_zone_remap_ctrl_get,
+        bcmpkt_rxpmd_dma_header_version_get,
+        bcmpkt_rxpmd_multicast_get,
+        bcmpkt_rxpmd_copy_to_cpu_get,
+        bcmpkt_rxpmd_truncate_cpu_copy_get,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL
+    }
+};
+
+
+const bcmpkt_rxpmd_fset_t bcm56880_a0_rxpmd_fset = {
+    {
+        bcmpkt_rxpmd_unicast_queue_set,
+        bcmpkt_rxpmd_queue_num_set,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_pkt_length_set,
+        bcmpkt_rxpmd_src_port_num_set,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_l3only_set,
+        bcmpkt_rxpmd_ip_routed_set,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_uc_sw_copy_dropped_set,
+        bcmpkt_rxpmd_switch_set,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_replication_or_nhop_index_set,
+        bcmpkt_rxpmd_match_id_lo_set,
+        bcmpkt_rxpmd_match_id_hi_set,
+        bcmpkt_rxpmd_mpb_flex_data_type_set,
+        bcmpkt_rxpmd_int_cn_set,
+        bcmpkt_rxpmd_cng_set,
+        bcmpkt_rxpmd_egr_zone_remap_ctrl_set,
+        bcmpkt_rxpmd_dma_header_version_set,
+        bcmpkt_rxpmd_multicast_set,
+        bcmpkt_rxpmd_copy_to_cpu_set,
+        bcmpkt_rxpmd_truncate_cpu_copy_set,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL
+    }
+};
+
+
+const bcmpkt_rxpmd_figet_t bcm56880_a0_rxpmd_figet = {
+    {
+        bcmpkt_rxpmd_i_size_get,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_i_flex_data_get
+    }
+};
+
+static shr_enum_map_t bcm56880_a0_rxpmd_view_types[] = {
+    {NULL, -1},
+};
+
+/* -2: unsupported, -1: global, others: view's value */
+static int bcm56880_a0_rxpmd_view_infos[BCMPKT_RXPMD_FID_COUNT] = {
+     -1, -1, -2, -2, -2, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+     -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, -1, -2, -2, -1, -1, -2,
+     -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+     -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+     -2, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -2, -2, -2, -2,
+     -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+};
+
+
+void bcm56880_a0_rxpmd_view_info_get(bcmpkt_pmd_view_info_t *info)
+{
+    info->view_infos = bcm56880_a0_rxpmd_view_infos;
+    info->view_types = bcm56880_a0_rxpmd_view_types;
+    info->view_type_get = NULL;
+}
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56880_a0/bcm56880_a0_pkt_rxpmd_field.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56880_a0/bcm56880_a0_pkt_rxpmd_field.c
new file mode 100644
index 000000000..89028bf98
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56880_a0/bcm56880_a0_pkt_rxpmd_field.c
@@ -0,0 +1,95 @@
+/*! \file bcm56880_a0_pkt_rxpmd_field.c
+ *
+ * This file provides RXPMD access functions for BCM56880_A0.
+ *
+ */
+/*
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ */
+
+#include <sal/sal_types.h>
+#include <shr/shr_error.h>
+#include <bcmpkt/bcmpkt_rxpmd.h>
+#include <bcmpkt/bcmpkt_rxpmd_internal.h>
+#include <bcmpkt/bcmpkt_flexhdr_internal.h>
+#include <bcmpkt/chip/bcm56880_a0/bcmpkt_bcm56880_a0_rxpmd.h>
+
+#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1)
+#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l))
+#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s)))
+#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s)))
+
+int bcm56880_a0_rxpmd_flex_fget(uint32_t *data,
+                                bcmpkt_flex_field_metadata_t *fld_info,
+                                int prof,
+                                uint32_t *val)
+{
+    uint32_t hdr_words = 13; /* MPB_FLEX_DATA size in words. */
+    uint32_t minbit = fld_info->profile[prof].minbit;
+    uint32_t maxbit = fld_info->profile[prof].maxbit;
+    uint32_t minword = minbit / 32;
+    uint32_t low_bit = minbit - (minword * 32);
+    uint32_t high_bit = maxbit - (minword * 32);
+    uint32_t diff = high_bit - low_bit;
+    uint32_t index = hdr_words - minword - 1;
+
+    /* Profile not valid for this field. */
+    if ((minbit == 0xFFFFFFFF) ||
+        (prof >= fld_info->profile_cnt)) {
+        return SHR_E_PARAM;
+    }
+
+    if (diff == 31) {
+        *val = data[index];
+    } else if (diff < 31) {
+        *val = WORD_FIELD_GET(data[index], low_bit, diff+1);
+    } else {
+        return SHR_E_PARAM;
+    }
+
+    return SHR_E_NONE;
+}
+
+int bcm56880_a0_rxpmd_flex_fset(uint32_t *data,
+                                bcmpkt_flex_field_metadata_t *fld_info,
+                                int prof,
+                                uint32_t val)
+{
+    uint32_t hdr_words = 13; /* MPB_FLEX_DATA size in words. */
+    uint32_t minbit = fld_info->profile[prof].minbit;
+    uint32_t maxbit = fld_info->profile[prof].maxbit;
+    uint32_t minword = minbit / 32;
+    uint32_t low_bit = minbit - (minword * 32);
+    uint32_t high_bit = maxbit - (minword * 32);
+    uint32_t diff = high_bit - low_bit;
+    uint32_t index = hdr_words - minword - 1;
+
+    /* Profile not valid for this field. */
+    if ((minbit == 0xFFFFFFFF) ||
+        (prof >= fld_info->profile_cnt)) {
+        return SHR_E_PARAM;
+    }
+
+    if (diff == 31) {
+        data[index] = val;
+    } else if (diff < 31) {
+        WORD_FIELD_SET(data[index], low_bit, diff+1, val);
+    } else {
+        return SHR_E_PARAM;
+    }
+
+    return SHR_E_NONE;
+}
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56880_a0/bcm56880_a0_pkt_txpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56880_a0/bcm56880_a0_pkt_txpmd.c
new file mode 100644
index 000000000..360d3e05e
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56880_a0/bcm56880_a0_pkt_txpmd.c
@@ -0,0 +1,513 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated from the registers file.
+ * Edits to this file will be lost when it is regenerated.
+ * Tool: INTERNAL/regs/xgs/generate-pmd.pl
+ *
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ *
+ * This file provides TXPMD access functions for BCM56880_A0.
+ *
+ ******************************************************************************/
+
+#include <sal/sal_types.h>
+#include <bcmpkt/bcmpkt_txpmd_internal.h>
+
+#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1)
+#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l))
+#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s)))
+#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s)))
+/*******************************************************************************
+ * SWFORMAT:  TXPMD
+ * BLOCKS:
+ * SIZE:     128
+ ******************************************************************************/
+static void bcmpkt_txpmd_start_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 30, 2, val);
+}
+
+static uint32_t bcmpkt_txpmd_start_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 30, 2);
+    return val;
+}
+
+static void bcmpkt_txpmd_header_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 24, 6, val);
+}
+
+static uint32_t bcmpkt_txpmd_header_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 24, 6);
+    return val;
+}
+
+static void bcmpkt_txpmd_pkt_length_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 10, 14, val);
+}
+
+static uint32_t bcmpkt_txpmd_pkt_length_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 10, 14);
+    return val;
+}
+
+static void bcmpkt_txpmd_sop_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 9, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_sop_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 9, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_eop_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 8, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_eop_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 8, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_cell_length_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 0, 8, val);
+}
+
+static uint32_t bcmpkt_txpmd_cell_length_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 0, 8);
+    return val;
+}
+
+static void bcmpkt_txpmd_cell_error_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 20, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_cell_error_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 20, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_local_dest_port_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 0, 8, val);
+}
+
+static uint32_t bcmpkt_txpmd_local_dest_port_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 0, 8);
+    return val;
+}
+
+static void bcmpkt_txpmd_cos_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 7, 6, val);
+}
+
+static uint32_t bcmpkt_txpmd_cos_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 7, 6);
+    return val;
+}
+
+static void bcmpkt_txpmd_input_pri_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 25, 4, val);
+}
+
+static uint32_t bcmpkt_txpmd_input_pri_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 25, 4);
+    return val;
+}
+
+static void bcmpkt_txpmd_unicast_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 14, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_unicast_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 14, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_rqe_q_num_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 16, 4, val);
+}
+
+static uint32_t bcmpkt_txpmd_rqe_q_num_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 16, 4);
+    return val;
+}
+
+static void bcmpkt_txpmd_set_l2bm_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 15, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_set_l2bm_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 15, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_ieee1588_one_step_enable_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 19, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_ieee1588_one_step_enable_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 19, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_ieee1588_regen_udp_checksum_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 18, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_ieee1588_regen_udp_checksum_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 18, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 17, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 17, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 8, 8, val);
+}
+
+static uint32_t bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 8, 8);
+    return val;
+}
+
+static void bcmpkt_txpmd_tx_ts_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 16, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_tx_ts_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 16, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_spid_override_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 24, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_spid_override_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 24, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_spid_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 22, 2, val);
+}
+
+static uint32_t bcmpkt_txpmd_spid_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 22, 2);
+    return val;
+}
+
+static void bcmpkt_txpmd_spap_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 20, 2, val);
+}
+
+static uint32_t bcmpkt_txpmd_spap_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 20, 2);
+    return val;
+}
+
+static void bcmpkt_txpmd_unicast_pkt_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 13, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_unicast_pkt_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 13, 1);
+    return val;
+}
+
+static uint32_t bcmpkt_txpmd_i_size_get(uint32_t *data, uint32_t **addr)
+{
+    return 4;
+}
+
+
+const bcmpkt_txpmd_fget_t bcm56880_a0_txpmd_fget = {
+    {
+        bcmpkt_txpmd_start_get,
+        bcmpkt_txpmd_header_type_get,
+        bcmpkt_txpmd_pkt_length_get,
+        NULL,
+        bcmpkt_txpmd_sop_get,
+        bcmpkt_txpmd_eop_get,
+        bcmpkt_txpmd_cell_length_get,
+        bcmpkt_txpmd_cell_error_get,
+        bcmpkt_txpmd_local_dest_port_get,
+        NULL,
+        bcmpkt_txpmd_cos_get,
+        bcmpkt_txpmd_input_pri_get,
+        bcmpkt_txpmd_unicast_get,
+        bcmpkt_txpmd_rqe_q_num_get,
+        bcmpkt_txpmd_set_l2bm_get,
+        bcmpkt_txpmd_ieee1588_one_step_enable_get,
+        bcmpkt_txpmd_ieee1588_regen_udp_checksum_get,
+        bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_get,
+        bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_get,
+        bcmpkt_txpmd_tx_ts_get,
+        bcmpkt_txpmd_spid_override_get,
+        bcmpkt_txpmd_spid_get,
+        bcmpkt_txpmd_spap_get,
+        bcmpkt_txpmd_unicast_pkt_get,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL
+    }
+};
+
+
+const bcmpkt_txpmd_fset_t bcm56880_a0_txpmd_fset = {
+    {
+        bcmpkt_txpmd_start_set,
+        bcmpkt_txpmd_header_type_set,
+        bcmpkt_txpmd_pkt_length_set,
+        NULL,
+        bcmpkt_txpmd_sop_set,
+        bcmpkt_txpmd_eop_set,
+        bcmpkt_txpmd_cell_length_set,
+        bcmpkt_txpmd_cell_error_set,
+        bcmpkt_txpmd_local_dest_port_set,
+        NULL,
+        bcmpkt_txpmd_cos_set,
+        bcmpkt_txpmd_input_pri_set,
+        bcmpkt_txpmd_unicast_set,
+        bcmpkt_txpmd_rqe_q_num_set,
+        bcmpkt_txpmd_set_l2bm_set,
+        bcmpkt_txpmd_ieee1588_one_step_enable_set,
+        bcmpkt_txpmd_ieee1588_regen_udp_checksum_set,
+        bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_set,
+        bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_set,
+        bcmpkt_txpmd_tx_ts_set,
+        bcmpkt_txpmd_spid_override_set,
+        bcmpkt_txpmd_spid_set,
+        bcmpkt_txpmd_spap_set,
+        bcmpkt_txpmd_unicast_pkt_set,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL
+    }
+};
+
+
+const bcmpkt_txpmd_figet_t bcm56880_a0_txpmd_figet = {
+    {
+        bcmpkt_txpmd_i_size_get
+    }
+};
+
+static shr_enum_map_t bcm56880_a0_txpmd_view_types[] = {
+    {NULL, -1},
+};
+
+/* -2: unsupported, -1: global, others: view's value */
+static int bcm56880_a0_txpmd_view_infos[BCMPKT_TXPMD_FID_COUNT] = {
+     -1, -1, -1, -2, -1, -1, -1, -1, -1, -2, -1, -1, -1, -1, -1, -1,
+     -1, -1, -1, -1, -1, -1, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2,
+     -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+     -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+     -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+     -2, -2, -2,
+};
+
+
+void bcm56880_a0_txpmd_view_info_get(bcmpkt_pmd_view_info_t *info)
+{
+    info->view_infos = bcm56880_a0_txpmd_view_infos;
+    info->view_types = bcm56880_a0_txpmd_view_types;
+    info->view_type_get = NULL;
+}
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pkt_lbhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pkt_lbhdr.c
new file mode 100644
index 000000000..6d724cc1f
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pkt_lbhdr.c
@@ -0,0 +1,169 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated from the registers file.
+ * Edits to this file will be lost when it is regenerated.
+ * Tool: INTERNAL/regs/xgs/generate-pmd.pl
+ *
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ *
+ * This file provides LBHDR access functions for BCM56890_A0.
+ *
+ ******************************************************************************/
+
+#include <sal/sal_types.h>
+#include <bcmpkt/bcmpkt_lbhdr_internal.h>
+
+#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1)
+#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l))
+#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s)))
+#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s)))
+
+const bcmpkt_lbhdr_fget_t bcm56890_a0_lbhdr_fget = {
+    {
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL
+    }
+};
+
+
+const bcmpkt_lbhdr_fset_t bcm56890_a0_lbhdr_fset = {
+    {
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL
+    }
+};
+
+
+const bcmpkt_lbhdr_figet_t bcm56890_a0_lbhdr_figet = {
+    {
+        NULL
+    }
+};
+
+static shr_enum_map_t bcm56890_a0_lbhdr_view_types[] = {
+    {NULL, -1},
+};
+
+/* -2: unsupported, -1: global, others: view's value */
+static int bcm56890_a0_lbhdr_view_infos[BCMPKT_LBHDR_FID_COUNT] = {
+     -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+     -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+     -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+     -2,
+};
+
+
+void bcm56890_a0_lbhdr_view_info_get(bcmpkt_pmd_view_info_t *info)
+{
+    info->view_infos = bcm56890_a0_lbhdr_view_infos;
+    info->view_types = bcm56890_a0_lbhdr_view_types;
+    info->view_type_get = NULL;
+}
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pkt_rxpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pkt_rxpmd.c
new file mode 100644
index 000000000..9c6485107
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pkt_rxpmd.c
@@ -0,0 +1,546 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated from the registers file.
+ * Edits to this file will be lost when it is regenerated.
+ * Tool: INTERNAL/regs/xgs/generate-pmd.pl
+ *
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ *
+ * This file provides RXPMD access functions for BCM56890_A0.
+ *
+ ******************************************************************************/
+
+#include <sal/sal_types.h>
+#include <bcmpkt/bcmpkt_rxpmd.h>
+#include <bcmpkt/bcmpkt_rxpmd_internal.h>
+
+#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1)
+#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l))
+#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s)))
+#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s)))
+/*******************************************************************************
+ * SWFORMAT:  RXPMD
+ * BLOCKS:
+ * SIZE:     576
+ ******************************************************************************/
+static void bcmpkt_rxpmd_queue_num_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 2, 6, val);
+}
+
+static uint32_t bcmpkt_rxpmd_queue_num_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 2, 6);
+    return val;
+}
+
+static void bcmpkt_rxpmd_pkt_length_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 16, 16, val);
+}
+
+static uint32_t bcmpkt_rxpmd_pkt_length_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 16, 16);
+    return val;
+}
+
+static void bcmpkt_rxpmd_src_port_num_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 23, 9, val);
+}
+
+static uint32_t bcmpkt_rxpmd_src_port_num_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 23, 9);
+    return val;
+}
+
+static void bcmpkt_rxpmd_l3only_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 14, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_l3only_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 14, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_ip_routed_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 21, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_ip_routed_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 21, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_uc_sw_copy_dropped_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 15, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_uc_sw_copy_dropped_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 15, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_switch_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 13, 1, val == 0);
+}
+
+static uint32_t bcmpkt_rxpmd_switch_get(uint32_t *data)
+{
+    uint32_t val;
+    val = (WORD_FIELD_GET(data[0], 13, 1) == 0);
+    return val;
+}
+
+static void bcmpkt_rxpmd_replication_or_nhop_index_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 16, 16, val);
+}
+
+static uint32_t bcmpkt_rxpmd_replication_or_nhop_index_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 16, 16);
+    return val;
+}
+
+static void bcmpkt_rxpmd_mpb_flex_data_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 1, 6, val);
+}
+
+static uint32_t bcmpkt_rxpmd_mpb_flex_data_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 1, 6);
+    return val;
+}
+
+static void bcmpkt_rxpmd_int_cn_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 16, 2, val);
+}
+
+static uint32_t bcmpkt_rxpmd_int_cn_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 16, 2);
+    return val;
+}
+
+static void bcmpkt_rxpmd_cng_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 18, 2, val);
+}
+
+static uint32_t bcmpkt_rxpmd_cng_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 18, 2);
+    return val;
+}
+
+static void bcmpkt_rxpmd_egr_zone_remap_ctrl_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 9, 4, val);
+}
+
+static uint32_t bcmpkt_rxpmd_egr_zone_remap_ctrl_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 9, 4);
+    return val;
+}
+
+static void bcmpkt_rxpmd_dma_header_version_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 0, 2, val);
+}
+
+static uint32_t bcmpkt_rxpmd_dma_header_version_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 0, 2);
+    return val;
+}
+
+static void bcmpkt_rxpmd_multicast_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 20, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_multicast_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 20, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_copy_to_cpu_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 22, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_copy_to_cpu_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 22, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_truncate_cpu_copy_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 8, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_truncate_cpu_copy_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 8, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_dop_trigger_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 7, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_dop_trigger_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 7, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_eparse_extract_offsets_3_0_or_mirror_encap_index_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 8, 4, val);
+}
+
+static uint32_t bcmpkt_rxpmd_eparse_extract_offsets_3_0_or_mirror_encap_index_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 8, 4);
+    return val;
+}
+
+static void bcmpkt_rxpmd_eparse_extract_offsets_6_4_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 12, 3, val);
+}
+
+static uint32_t bcmpkt_rxpmd_eparse_extract_offsets_6_4_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 12, 3);
+    return val;
+}
+
+static void bcmpkt_rxpmd_arc_id_lo_set(uint32_t *data, uint32_t val)
+{
+    data[2] = val;
+}
+
+static uint32_t bcmpkt_rxpmd_arc_id_lo_get(uint32_t *data)
+{
+    uint32_t val;
+    val = data[2];
+    return val;
+}
+
+static void bcmpkt_rxpmd_arc_id_hi_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 0, 16, val);
+}
+
+static uint32_t bcmpkt_rxpmd_arc_id_hi_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 0, 16);
+    return val;
+}
+
+static uint32_t bcmpkt_rxpmd_i_size_get(uint32_t *data, uint32_t **addr)
+{
+    return 18;
+}
+
+static uint32_t bcmpkt_rxpmd_i_flex_data_get(uint32_t *data, uint32_t **addr)
+{
+    *addr = data + 4;
+    return 14;
+}
+
+void bcm56890_a0_rx_reason_encode(const bcmpkt_rx_reasons_t *reasons, uint32_t *data)
+{
+}
+
+void bcm56890_a0_rx_reason_decode(const uint32_t *data, bcmpkt_rx_reasons_t *reasons)
+{
+}
+
+void bcm56890_a0_ep_rx_reason_encode(const bcmpkt_rx_reasons_t *reasons, uint32_t *data)
+{
+}
+
+void bcm56890_a0_ep_rx_reason_decode(const uint32_t *data, bcmpkt_rx_reasons_t *reasons)
+{
+}
+
+const bcmpkt_rxpmd_fget_t bcm56890_a0_rxpmd_fget = {
+    {
+        NULL,
+        bcmpkt_rxpmd_queue_num_get,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_pkt_length_get,
+        bcmpkt_rxpmd_src_port_num_get,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_l3only_get,
+        bcmpkt_rxpmd_ip_routed_get,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_uc_sw_copy_dropped_get,
+        bcmpkt_rxpmd_switch_get,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_replication_or_nhop_index_get,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_mpb_flex_data_type_get,
+        bcmpkt_rxpmd_int_cn_get,
+        bcmpkt_rxpmd_cng_get,
+        bcmpkt_rxpmd_egr_zone_remap_ctrl_get,
+        bcmpkt_rxpmd_dma_header_version_get,
+        bcmpkt_rxpmd_multicast_get,
+        bcmpkt_rxpmd_copy_to_cpu_get,
+        bcmpkt_rxpmd_truncate_cpu_copy_get,
+        NULL,
+        bcmpkt_rxpmd_dop_trigger_get,
+        bcmpkt_rxpmd_eparse_extract_offsets_3_0_or_mirror_encap_index_get,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_eparse_extract_offsets_6_4_get,
+        NULL,
+        bcmpkt_rxpmd_arc_id_lo_get,
+        bcmpkt_rxpmd_arc_id_hi_get,
+        NULL,
+        NULL,
+        NULL,
+        NULL
+    }
+};
+
+
+const bcmpkt_rxpmd_fset_t bcm56890_a0_rxpmd_fset = {
+    {
+        NULL,
+        bcmpkt_rxpmd_queue_num_set,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_pkt_length_set,
+        bcmpkt_rxpmd_src_port_num_set,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_l3only_set,
+        bcmpkt_rxpmd_ip_routed_set,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_uc_sw_copy_dropped_set,
+        bcmpkt_rxpmd_switch_set,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_replication_or_nhop_index_set,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_mpb_flex_data_type_set,
+        bcmpkt_rxpmd_int_cn_set,
+        bcmpkt_rxpmd_cng_set,
+        bcmpkt_rxpmd_egr_zone_remap_ctrl_set,
+        bcmpkt_rxpmd_dma_header_version_set,
+        bcmpkt_rxpmd_multicast_set,
+        bcmpkt_rxpmd_copy_to_cpu_set,
+        bcmpkt_rxpmd_truncate_cpu_copy_set,
+        NULL,
+        bcmpkt_rxpmd_dop_trigger_set,
+        bcmpkt_rxpmd_eparse_extract_offsets_3_0_or_mirror_encap_index_set,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_eparse_extract_offsets_6_4_set,
+        NULL,
+        bcmpkt_rxpmd_arc_id_lo_set,
+        bcmpkt_rxpmd_arc_id_hi_set,
+        NULL,
+        NULL,
+        NULL,
+        NULL
+    }
+};
+
+
+const bcmpkt_rxpmd_figet_t bcm56890_a0_rxpmd_figet = {
+    {
+        bcmpkt_rxpmd_i_size_get,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_i_flex_data_get
+    }
+};
+
+static shr_enum_map_t bcm56890_a0_rxpmd_view_types[] = {
+    {NULL, -1},
+};
+
+/* -2: unsupported, -1: global, others: view's value */
+static int bcm56890_a0_rxpmd_view_infos[BCMPKT_RXPMD_FID_COUNT] = {
+     -2, -1, -2, -2, -2, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+     -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, -1, -2, -2, -1, -1, -2,
+     -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+     -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+     -2, -1, -2, -2, -1, -1, -1, -1, -1, -1, -1, -1, -2, -1, -1, -2,
+     -2, -2, -2, -2, -2, -1, -2, -1, -1, -2, -2, -2, -2,
+};
+
+
+void bcm56890_a0_rxpmd_view_info_get(bcmpkt_pmd_view_info_t *info)
+{
+    info->view_infos = bcm56890_a0_rxpmd_view_infos;
+    info->view_types = bcm56890_a0_rxpmd_view_types;
+    info->view_type_get = NULL;
+}
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pkt_rxpmd_field.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pkt_rxpmd_field.c
new file mode 100644
index 000000000..7cd341fe6
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pkt_rxpmd_field.c
@@ -0,0 +1,107 @@
+/*! \file bcm56890_a0_pkt_rxpmd_field.c
+ *
+ * This file provides RXPMD access functions for BCM56890_A0.
+ *
+ */
+/*
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ */
+
+#include <sal/sal_types.h>
+#include <shr/shr_error.h>
+#include <bcmpkt/bcmpkt_rxpmd.h>
+#include <bcmpkt/bcmpkt_rxpmd_internal.h>
+#include <bcmpkt/bcmpkt_flexhdr_internal.h>
+#include <bcmpkt/chip/bcm56890_a0/bcmpkt_bcm56890_a0_rxpmd.h>
+
+#define BSL_LOG_MODULE BSL_LS_BCMPKT_FLEX_HDR
+
+#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1)
+#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l))
+#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s)))
+#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s)))
+
+int bcm56890_a0_rxpmd_flex_fget(uint32_t *data,
+                                bcmpkt_flex_field_metadata_t *fld_info,
+                                int prof,
+                                uint32_t *val)
+{
+    uint32_t hdr_words = 14; /* MPB_FLEX_DATA size in words. */
+    uint32_t minbit = fld_info->profile[prof].minbit;
+    uint32_t maxbit = fld_info->profile[prof].maxbit;
+    uint32_t minword = minbit / 32;
+    uint32_t low_bit = minbit - (minword * 32);
+    uint32_t high_bit = maxbit - (minword * 32);
+    uint32_t diff = high_bit - low_bit;
+    uint32_t index = hdr_words - minword - 1;
+
+    /* Profile not valid for this field. */
+    if ((minbit == 0xFFFFFFFF) ||
+        (prof >= fld_info->profile_cnt)) {
+        return SHR_E_PARAM;
+    }
+
+    /* Skip fields with minbit >= 448.*/
+    if (minbit >= 448) {
+        return SHR_E_PARAM;
+    }
+
+    if (diff == 31) {
+        *val = data[index];
+    } else if (diff < 31) {
+        *val = WORD_FIELD_GET(data[index], low_bit, diff+1);
+    } else {
+        return SHR_E_PARAM;
+    }
+
+    return SHR_E_NONE;
+}
+
+int bcm56890_a0_rxpmd_flex_fset(uint32_t *data,
+                                bcmpkt_flex_field_metadata_t *fld_info,
+                                int prof,
+                                uint32_t val)
+{
+    uint32_t hdr_words = 14; /* MPB_FLEX_DATA size in words. */
+    uint32_t minbit = fld_info->profile[prof].minbit;
+    uint32_t maxbit = fld_info->profile[prof].maxbit;
+    uint32_t minword = minbit / 32;
+    uint32_t low_bit = minbit - (minword * 32);
+    uint32_t high_bit = maxbit - (minword * 32);
+    uint32_t diff = high_bit - low_bit;
+    uint32_t index = hdr_words - minword - 1;
+
+    /* Profile not valid for this field. */
+    if ((minbit == 0xFFFFFFFF) ||
+        (prof >= fld_info->profile_cnt)) {
+        return SHR_E_PARAM;
+    }
+
+    /* Skip fields with minbit >= 448.*/
+    if (minbit >= 448) {
+        return SHR_E_PARAM;
+    }
+
+    if (diff == 31) {
+        data[index] = val;
+    } else if (diff < 31) {
+        WORD_FIELD_SET(data[index], low_bit, diff+1, val);
+    } else {
+        return SHR_E_PARAM;
+    }
+
+    return SHR_E_NONE;
+}
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pkt_txpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pkt_txpmd.c
new file mode 100644
index 000000000..5b30d7182
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pkt_txpmd.c
@@ -0,0 +1,599 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated from the registers file.
+ * Edits to this file will be lost when it is regenerated.
+ * Tool: INTERNAL/regs/xgs/generate-pmd.pl
+ *
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ *
+ * This file provides TXPMD access functions for BCM56890_A0.
+ *
+ ******************************************************************************/
+
+#include <sal/sal_types.h>
+#include <bcmpkt/bcmpkt_txpmd_internal.h>
+
+#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1)
+#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l))
+#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s)))
+#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s)))
+/*******************************************************************************
+ * SWFORMAT:  TXPMD
+ * BLOCKS:
+ * SIZE:     128
+ ******************************************************************************/
+static void bcmpkt_txpmd_start_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 30, 2, val);
+}
+
+static uint32_t bcmpkt_txpmd_start_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 30, 2);
+    return val;
+}
+
+static void bcmpkt_txpmd_header_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 24, 6, val);
+}
+
+static uint32_t bcmpkt_txpmd_header_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 24, 6);
+    return val;
+}
+
+static void bcmpkt_txpmd_pkt_length_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 10, 14, val);
+}
+
+static uint32_t bcmpkt_txpmd_pkt_length_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 10, 14);
+    return val;
+}
+
+static void bcmpkt_txpmd_sop_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 9, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_sop_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 9, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_eop_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 8, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_eop_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 8, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_cell_length_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 0, 8, val);
+}
+
+static uint32_t bcmpkt_txpmd_cell_length_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 0, 8);
+    return val;
+}
+
+static void bcmpkt_txpmd_cell_error_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 20, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_cell_error_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 20, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_local_dest_port_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 31, 1, val & MASK(1));
+    WORD_FIELD_SET(data[1], 0, 8, (val >> 1) & MASK(8));
+}
+
+static uint32_t bcmpkt_txpmd_local_dest_port_get(uint32_t *data)
+{
+    uint32_t val;
+    val = (WORD_FIELD_GET(data[2], 31, 1) | (WORD_FIELD_GET(data[1], 0, 8) << 1)) ;
+    return val;
+}
+
+static void bcmpkt_txpmd_cos_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 6, 6, val);
+}
+
+static uint32_t bcmpkt_txpmd_cos_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 6, 6);
+    return val;
+}
+
+static void bcmpkt_txpmd_input_pri_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 24, 4, val);
+}
+
+static uint32_t bcmpkt_txpmd_input_pri_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 24, 4);
+    return val;
+}
+
+static void bcmpkt_txpmd_unicast_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 13, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_unicast_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 13, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_rqe_q_num_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 15, 4, val);
+}
+
+static uint32_t bcmpkt_txpmd_rqe_q_num_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 15, 4);
+    return val;
+}
+
+static void bcmpkt_txpmd_set_l2bm_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 14, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_set_l2bm_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 14, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_ieee1588_one_step_enable_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 19, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_ieee1588_one_step_enable_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 19, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_ieee1588_regen_udp_checksum_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 18, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_ieee1588_regen_udp_checksum_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 18, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 17, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 17, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 8, 8, val);
+}
+
+static uint32_t bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 8, 8);
+    return val;
+}
+
+static void bcmpkt_txpmd_tx_ts_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 16, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_tx_ts_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 16, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_spid_override_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 23, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_spid_override_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 23, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_spid_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 21, 2, val);
+}
+
+static uint32_t bcmpkt_txpmd_spid_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 21, 2);
+    return val;
+}
+
+static void bcmpkt_txpmd_spap_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 19, 2, val);
+}
+
+static uint32_t bcmpkt_txpmd_spap_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 19, 2);
+    return val;
+}
+
+static void bcmpkt_txpmd_unicast_pkt_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 12, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_unicast_pkt_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 12, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_ts_action_lsb_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 19, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_ts_action_lsb_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 19, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_ts_action_msb_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 21, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_ts_action_msb_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 21, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_ts_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 22, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_ts_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 22, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_dst_subport_num_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 23, 9, val & MASK(9));
+    WORD_FIELD_SET(data[0], 0, 1, (val >> 9) & MASK(1));
+}
+
+static uint32_t bcmpkt_txpmd_dst_subport_num_get(uint32_t *data)
+{
+    uint32_t val;
+    val = (WORD_FIELD_GET(data[1], 23, 9) | (WORD_FIELD_GET(data[0], 0, 1) << 9)) ;
+    return val;
+}
+
+static void bcmpkt_txpmd_udp_checksum_update_enable_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 1, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_udp_checksum_update_enable_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 1, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_udp_checksum_offset_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 2, 6, val);
+}
+
+static uint32_t bcmpkt_txpmd_udp_checksum_offset_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 2, 6);
+    return val;
+}
+
+static void bcmpkt_txpmd_copy_to_debug_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 5, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_copy_to_debug_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 5, 1);
+    return val;
+}
+
+static uint32_t bcmpkt_txpmd_i_size_get(uint32_t *data, uint32_t **addr)
+{
+    return 4;
+}
+
+
+const bcmpkt_txpmd_fget_t bcm56890_a0_txpmd_fget = {
+    {
+        bcmpkt_txpmd_start_get,
+        bcmpkt_txpmd_header_type_get,
+        bcmpkt_txpmd_pkt_length_get,
+        NULL,
+        bcmpkt_txpmd_sop_get,
+        bcmpkt_txpmd_eop_get,
+        bcmpkt_txpmd_cell_length_get,
+        bcmpkt_txpmd_cell_error_get,
+        bcmpkt_txpmd_local_dest_port_get,
+        NULL,
+        bcmpkt_txpmd_cos_get,
+        bcmpkt_txpmd_input_pri_get,
+        bcmpkt_txpmd_unicast_get,
+        bcmpkt_txpmd_rqe_q_num_get,
+        bcmpkt_txpmd_set_l2bm_get,
+        bcmpkt_txpmd_ieee1588_one_step_enable_get,
+        bcmpkt_txpmd_ieee1588_regen_udp_checksum_get,
+        bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_get,
+        bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_get,
+        bcmpkt_txpmd_tx_ts_get,
+        bcmpkt_txpmd_spid_override_get,
+        bcmpkt_txpmd_spid_get,
+        bcmpkt_txpmd_spap_get,
+        bcmpkt_txpmd_unicast_pkt_get,
+        bcmpkt_txpmd_ts_action_lsb_get,
+        bcmpkt_txpmd_ts_action_msb_get,
+        bcmpkt_txpmd_ts_type_get,
+        bcmpkt_txpmd_dst_subport_num_get,
+        bcmpkt_txpmd_udp_checksum_update_enable_get,
+        bcmpkt_txpmd_udp_checksum_offset_get,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_txpmd_copy_to_debug_get,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL
+    }
+};
+
+
+const bcmpkt_txpmd_fset_t bcm56890_a0_txpmd_fset = {
+    {
+        bcmpkt_txpmd_start_set,
+        bcmpkt_txpmd_header_type_set,
+        bcmpkt_txpmd_pkt_length_set,
+        NULL,
+        bcmpkt_txpmd_sop_set,
+        bcmpkt_txpmd_eop_set,
+        bcmpkt_txpmd_cell_length_set,
+        bcmpkt_txpmd_cell_error_set,
+        bcmpkt_txpmd_local_dest_port_set,
+        NULL,
+        bcmpkt_txpmd_cos_set,
+        bcmpkt_txpmd_input_pri_set,
+        bcmpkt_txpmd_unicast_set,
+        bcmpkt_txpmd_rqe_q_num_set,
+        bcmpkt_txpmd_set_l2bm_set,
+        bcmpkt_txpmd_ieee1588_one_step_enable_set,
+        bcmpkt_txpmd_ieee1588_regen_udp_checksum_set,
+        bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_set,
+        bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_set,
+        bcmpkt_txpmd_tx_ts_set,
+        bcmpkt_txpmd_spid_override_set,
+        bcmpkt_txpmd_spid_set,
+        bcmpkt_txpmd_spap_set,
+        bcmpkt_txpmd_unicast_pkt_set,
+        bcmpkt_txpmd_ts_action_lsb_set,
+        bcmpkt_txpmd_ts_action_msb_set,
+        bcmpkt_txpmd_ts_type_set,
+        bcmpkt_txpmd_dst_subport_num_set,
+        bcmpkt_txpmd_udp_checksum_update_enable_set,
+        bcmpkt_txpmd_udp_checksum_offset_set,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_txpmd_copy_to_debug_set,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL
+    }
+};
+
+
+const bcmpkt_txpmd_figet_t bcm56890_a0_txpmd_figet = {
+    {
+        bcmpkt_txpmd_i_size_get
+    }
+};
+
+static shr_enum_map_t bcm56890_a0_txpmd_view_types[] = {
+    {NULL, -1},
+};
+
+/* -2: unsupported, -1: global, others: view's value */
+static int bcm56890_a0_txpmd_view_infos[BCMPKT_TXPMD_FID_COUNT] = {
+     -1, -1, -1, -2, -1, -1, -1, -1, -1, -2, -1, -1, -1, -1, -1, -1,
+     -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -2, -2,
+     -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+     -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+     -2, -2, -2, -2, -2, -2, -2, -1, -2, -2, -2, -2, -2, -2, -2, -2,
+     -2, -2, -2,
+};
+
+
+void bcm56890_a0_txpmd_view_info_get(bcmpkt_pmd_view_info_t *info)
+{
+    info->view_infos = bcm56890_a0_txpmd_view_infos;
+    info->view_types = bcm56890_a0_txpmd_view_types;
+    info->view_type_get = NULL;
+}
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_a0/bcm56990_a0_pkt_lbhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_a0/bcm56990_a0_pkt_lbhdr.c
new file mode 100644
index 000000000..1e38d02cf
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_a0/bcm56990_a0_pkt_lbhdr.c
@@ -0,0 +1,592 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated from the registers file.
+ * Edits to this file will be lost when it is regenerated.
+ * Tool: INTERNAL/regs/xgs/generate-pmd.pl
+ *
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ *
+ * This file provides LBHDR access functions for BCM56990_A0.
+ *
+ ******************************************************************************/
+
+#include <sal/sal_types.h>
+#include <bcmpkt/bcmpkt_lbhdr_internal.h>
+
+#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1)
+#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l))
+#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s)))
+#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s)))
+/*******************************************************************************
+ * SWFORMAT:  LBHDR
+ * BLOCKS:
+ * SIZE:     128
+ ******************************************************************************/
+static void bcmpkt_lbhdr_start_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 24, 8, val);
+}
+
+static uint32_t bcmpkt_lbhdr_start_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 24, 8);
+    return val;
+}
+
+static void bcmpkt_lbhdr_header_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 15, 5, val);
+}
+
+static uint32_t bcmpkt_lbhdr_header_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 15, 5);
+    return val;
+}
+
+static void bcmpkt_lbhdr_input_priority_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 20, 4, val);
+}
+
+static uint32_t bcmpkt_lbhdr_input_priority_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 20, 4);
+    return val;
+}
+
+static void bcmpkt_lbhdr_pkt_profile_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 26, 3, val);
+}
+
+static uint32_t bcmpkt_lbhdr_pkt_profile_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 26, 3);
+    return val;
+}
+
+static void bcmpkt_lbhdr_visibility_pkt_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 29, 1, val);
+}
+
+static uint32_t bcmpkt_lbhdr_visibility_pkt_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 29, 1);
+    return val;
+}
+
+static void bcmpkt_lbhdr_source_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 30, 2, val & MASK(2));
+    WORD_FIELD_SET(data[0], 0, 14, (val >> 2) & MASK(14));
+}
+
+static uint32_t bcmpkt_lbhdr_source_get(uint32_t *data)
+{
+    uint32_t val;
+    val = (WORD_FIELD_GET(data[1], 30, 2) | (WORD_FIELD_GET(data[0], 0, 14) << 2)) ;
+    return val;
+}
+
+static void bcmpkt_lbhdr_source_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 14, 1, val);
+}
+
+static uint32_t bcmpkt_lbhdr_source_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 14, 1);
+    return val;
+}
+
+static void bcmpkt_lbhdr_trill_ac_cng_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_AC) {
+        return;
+    }
+    WORD_FIELD_SET(data[3], 4, 2, val);
+}
+
+static uint32_t bcmpkt_lbhdr_trill_ac_cng_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_AC) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[3], 4, 2);
+    return val;
+}
+
+static void bcmpkt_lbhdr_trill_ac_tc_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_AC) {
+        return;
+    }
+    WORD_FIELD_SET(data[3], 0, 4, val);
+}
+
+static uint32_t bcmpkt_lbhdr_trill_ac_tc_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_AC) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[3], 0, 4);
+    return val;
+}
+
+static void bcmpkt_lbhdr_trill_nw_cng_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_NW) {
+        return;
+    }
+    WORD_FIELD_SET(data[3], 4, 2, val);
+}
+
+static uint32_t bcmpkt_lbhdr_trill_nw_cng_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_NW) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[3], 4, 2);
+    return val;
+}
+
+static void bcmpkt_lbhdr_trill_nw_tc_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_NW) {
+        return;
+    }
+    WORD_FIELD_SET(data[3], 0, 4, val);
+}
+
+static uint32_t bcmpkt_lbhdr_trill_nw_tc_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_NW) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[3], 0, 4);
+    return val;
+}
+
+static void bcmpkt_lbhdr_eth_dest_type_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return;
+    }
+    WORD_FIELD_SET(data[3], 11, 4, val);
+}
+
+static uint32_t bcmpkt_lbhdr_eth_dest_type_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[3], 11, 4);
+    return val;
+}
+
+static void bcmpkt_lbhdr_eth_dest_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return;
+    }
+    WORD_FIELD_SET(data[3], 15, 16, val);
+}
+
+static uint32_t bcmpkt_lbhdr_eth_dest_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[3], 15, 16);
+    return val;
+}
+
+static void bcmpkt_lbhdr_eth_dp_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 7, 2, val);
+}
+
+static uint32_t bcmpkt_lbhdr_eth_dp_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 7, 2);
+    return val;
+}
+
+static void bcmpkt_lbhdr_eth_ecmp_member_id_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 9, 12, val);
+}
+
+static uint32_t bcmpkt_lbhdr_eth_ecmp_member_id_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 9, 12);
+    return val;
+}
+
+static void bcmpkt_lbhdr_eth_int_cn_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 1, 2, val);
+}
+
+static uint32_t bcmpkt_lbhdr_eth_int_cn_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 1, 2);
+    return val;
+}
+
+static void bcmpkt_lbhdr_eth_int_pri_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 3, 4, val);
+}
+
+static uint32_t bcmpkt_lbhdr_eth_int_pri_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 3, 4);
+    return val;
+}
+
+static void bcmpkt_lbhdr_eth_mcast_lb_index_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return;
+    }
+    WORD_FIELD_SET(data[1], 6, 8, val);
+}
+
+static uint32_t bcmpkt_lbhdr_eth_mcast_lb_index_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[1], 6, 8);
+    return val;
+}
+
+static void bcmpkt_lbhdr_eth_mcast_lb_index_vld_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return;
+    }
+    WORD_FIELD_SET(data[1], 14, 1, val);
+}
+
+static uint32_t bcmpkt_lbhdr_eth_mcast_lb_index_vld_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[1], 14, 1);
+    return val;
+}
+
+static void bcmpkt_lbhdr_eth_pp_port_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return;
+    }
+    WORD_FIELD_SET(data[3], 0, 9, val);
+}
+
+static uint32_t bcmpkt_lbhdr_eth_pp_port_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[3], 0, 9);
+    return val;
+}
+
+static void bcmpkt_lbhdr_eth_qos_fields_vld_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 0, 1, val);
+}
+
+static uint32_t bcmpkt_lbhdr_eth_qos_fields_vld_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 0, 1);
+    return val;
+}
+
+static void bcmpkt_lbhdr_eth_routed_pkt_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return;
+    }
+    WORD_FIELD_SET(data[3], 31, 1, val);
+}
+
+static uint32_t bcmpkt_lbhdr_eth_routed_pkt_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[3], 31, 1);
+    return val;
+}
+
+static void bcmpkt_lbhdr_eth_subflow_type_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return;
+    }
+    WORD_FIELD_SET(data[3], 9, 2, val);
+}
+
+static uint32_t bcmpkt_lbhdr_eth_subflow_type_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[3], 9, 2);
+    return val;
+}
+
+static void bcmpkt_lbhdr_ethernet_vrf_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 21, 11, val & MASK(11));
+    WORD_FIELD_SET(data[1], 0, 2, (val >> 11) & MASK(2));
+}
+
+static uint32_t bcmpkt_lbhdr_ethernet_vrf_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return 0;
+    }
+    val = (WORD_FIELD_GET(data[2], 21, 11) | (WORD_FIELD_GET(data[1], 0, 2) << 11)) ;
+    return val;
+}
+
+static void bcmpkt_lbhdr_ethernet_vrf_valid_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return;
+    }
+    WORD_FIELD_SET(data[1], 2, 1, val);
+}
+
+static uint32_t bcmpkt_lbhdr_ethernet_vrf_valid_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[1], 2, 1);
+    return val;
+}
+
+static uint32_t bcmpkt_lbhdr_i_size_get(uint32_t *data, uint32_t **addr)
+{
+    return 4;
+}
+
+
+const bcmpkt_lbhdr_fget_t bcm56990_a0_lbhdr_fget = {
+    {
+        bcmpkt_lbhdr_start_get,
+        bcmpkt_lbhdr_header_type_get,
+        bcmpkt_lbhdr_input_priority_get,
+        bcmpkt_lbhdr_pkt_profile_get,
+        bcmpkt_lbhdr_visibility_pkt_get,
+        bcmpkt_lbhdr_source_get,
+        bcmpkt_lbhdr_source_type_get,
+        bcmpkt_lbhdr_trill_ac_cng_get,
+        bcmpkt_lbhdr_trill_ac_tc_get,
+        NULL,
+        bcmpkt_lbhdr_trill_nw_cng_get,
+        bcmpkt_lbhdr_trill_nw_tc_get,
+        bcmpkt_lbhdr_eth_dest_type_get,
+        bcmpkt_lbhdr_eth_dest_get,
+        bcmpkt_lbhdr_eth_dp_get,
+        bcmpkt_lbhdr_eth_ecmp_member_id_get,
+        bcmpkt_lbhdr_eth_int_cn_get,
+        bcmpkt_lbhdr_eth_int_pri_get,
+        bcmpkt_lbhdr_eth_mcast_lb_index_get,
+        bcmpkt_lbhdr_eth_mcast_lb_index_vld_get,
+        bcmpkt_lbhdr_eth_pp_port_get,
+        bcmpkt_lbhdr_eth_qos_fields_vld_get,
+        bcmpkt_lbhdr_eth_routed_pkt_get,
+        bcmpkt_lbhdr_eth_subflow_type_get,
+        bcmpkt_lbhdr_ethernet_vrf_get,
+        bcmpkt_lbhdr_ethernet_vrf_valid_get,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL
+    }
+};
+
+
+const bcmpkt_lbhdr_fset_t bcm56990_a0_lbhdr_fset = {
+    {
+        bcmpkt_lbhdr_start_set,
+        bcmpkt_lbhdr_header_type_set,
+        bcmpkt_lbhdr_input_priority_set,
+        bcmpkt_lbhdr_pkt_profile_set,
+        bcmpkt_lbhdr_visibility_pkt_set,
+        bcmpkt_lbhdr_source_set,
+        bcmpkt_lbhdr_source_type_set,
+        bcmpkt_lbhdr_trill_ac_cng_set,
+        bcmpkt_lbhdr_trill_ac_tc_set,
+        NULL,
+        bcmpkt_lbhdr_trill_nw_cng_set,
+        bcmpkt_lbhdr_trill_nw_tc_set,
+        bcmpkt_lbhdr_eth_dest_type_set,
+        bcmpkt_lbhdr_eth_dest_set,
+        bcmpkt_lbhdr_eth_dp_set,
+        bcmpkt_lbhdr_eth_ecmp_member_id_set,
+        bcmpkt_lbhdr_eth_int_cn_set,
+        bcmpkt_lbhdr_eth_int_pri_set,
+        bcmpkt_lbhdr_eth_mcast_lb_index_set,
+        bcmpkt_lbhdr_eth_mcast_lb_index_vld_set,
+        bcmpkt_lbhdr_eth_pp_port_set,
+        bcmpkt_lbhdr_eth_qos_fields_vld_set,
+        bcmpkt_lbhdr_eth_routed_pkt_set,
+        bcmpkt_lbhdr_eth_subflow_type_set,
+        bcmpkt_lbhdr_ethernet_vrf_set,
+        bcmpkt_lbhdr_ethernet_vrf_valid_set,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL
+    }
+};
+
+
+const bcmpkt_lbhdr_figet_t bcm56990_a0_lbhdr_figet = {
+    {
+        bcmpkt_lbhdr_i_size_get
+    }
+};
+
+static shr_enum_map_t bcm56990_a0_lbhdr_view_types[] = {
+    {"trill_nw", 1},
+    {"trill_ac", 2},
+    {"ethernet", 3},
+    {NULL, -1},
+};
+
+/* -2: unsupported, -1: global, others: view's value */
+static int bcm56990_a0_lbhdr_view_infos[BCMPKT_LBHDR_FID_COUNT] = {
+     -1, -1, -1, -1, -1, -1, -1,  2,  2, -2,  1,  1,  3,  3,  3,  3,
+      3,  3,  3,  3,  3,  3,  3,  3,  3,  3, -2, -2, -2, -2, -2, -2,
+     -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+     -2,
+};
+
+
+void bcm56990_a0_lbhdr_view_info_get(bcmpkt_pmd_view_info_t *info)
+{
+    info->view_infos = bcm56990_a0_lbhdr_view_infos;
+    info->view_types = bcm56990_a0_lbhdr_view_types;
+    info->view_type_get = bcmpkt_lbhdr_header_type_get;
+}
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_a0/bcm56990_a0_pkt_rxpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_a0/bcm56990_a0_pkt_rxpmd.c
new file mode 100644
index 000000000..335c68ec7
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_a0/bcm56990_a0_pkt_rxpmd.c
@@ -0,0 +1,1086 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated from the registers file.
+ * Edits to this file will be lost when it is regenerated.
+ * Tool: INTERNAL/regs/xgs/generate-pmd.pl
+ *
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ *
+ * This file provides RXPMD access functions for BCM56990_A0.
+ *
+ ******************************************************************************/
+
+#include <sal/sal_types.h>
+#include <bcmpkt/bcmpkt_rxpmd.h>
+#include <bcmpkt/bcmpkt_rxpmd_internal.h>
+
+#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1)
+#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l))
+#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s)))
+#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s)))
+/*******************************************************************************
+ * SWFORMAT:  RXPMD
+ * BLOCKS:
+ * SIZE:     416
+ ******************************************************************************/
+static void bcmpkt_rxpmd_unicast_queue_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[4], 24, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_unicast_queue_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[4], 24, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_queue_num_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[12], 22, 6, val);
+}
+
+static uint32_t bcmpkt_rxpmd_queue_num_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[12], 22, 6);
+    return val;
+}
+
+static void bcmpkt_rxpmd_cpu_cos_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[12], 22, 6, val);
+}
+
+static uint32_t bcmpkt_rxpmd_cpu_cos_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[12], 22, 6);
+    return val;
+}
+
+static void bcmpkt_rxpmd_matched_rule_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[8], 3, 8, val);
+}
+
+static uint32_t bcmpkt_rxpmd_matched_rule_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[8], 3, 8);
+    return val;
+}
+
+static void bcmpkt_rxpmd_pkt_length_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[7], 0, 14, val);
+}
+
+static uint32_t bcmpkt_rxpmd_pkt_length_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[7], 0, 14);
+    return val;
+}
+
+static void bcmpkt_rxpmd_src_port_num_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[6], 22, 9, val);
+}
+
+static uint32_t bcmpkt_rxpmd_src_port_num_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[6], 22, 9);
+    return val;
+}
+
+static void bcmpkt_rxpmd_outer_vid_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[8], 18, 12, val);
+}
+
+static uint32_t bcmpkt_rxpmd_outer_vid_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[8], 18, 12);
+    return val;
+}
+
+static void bcmpkt_rxpmd_outer_cfi_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[8], 14, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_outer_cfi_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[8], 14, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_outer_pri_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[8], 15, 3, val);
+}
+
+static uint32_t bcmpkt_rxpmd_outer_pri_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[8], 15, 3);
+    return val;
+}
+
+static void bcmpkt_rxpmd_special_packet_indicator_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[6], 21, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_special_packet_indicator_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[6], 21, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_special_packet_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[9], 5, 3, val);
+}
+
+static uint32_t bcmpkt_rxpmd_special_packet_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[9], 5, 3);
+    return val;
+}
+
+static void bcmpkt_rxpmd_change_dscp_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[12], 29, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_change_dscp_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[12], 29, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_dscp_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[9], 5, 6, val);
+}
+
+static uint32_t bcmpkt_rxpmd_dscp_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[9], 5, 6);
+    return val;
+}
+
+static void bcmpkt_rxpmd_change_ecn_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[12], 30, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_change_ecn_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[12], 30, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_ecn_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[9], 11, 2, val);
+}
+
+static uint32_t bcmpkt_rxpmd_ecn_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[9], 11, 2);
+    return val;
+}
+
+static void bcmpkt_rxpmd_timestamp_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[4], 16, 2, val);
+}
+
+static uint32_t bcmpkt_rxpmd_timestamp_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[4], 16, 2);
+    return val;
+}
+
+static void bcmpkt_rxpmd_timestamp_set(uint32_t *data, uint32_t val)
+{
+    data[5] = val;
+}
+
+static uint32_t bcmpkt_rxpmd_timestamp_get(uint32_t *data)
+{
+    uint32_t val;
+    val = data[5];
+    return val;
+}
+
+static void bcmpkt_rxpmd_timestamp_hi_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[4], 0, 16, val);
+}
+
+static uint32_t bcmpkt_rxpmd_timestamp_hi_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[4], 0, 16);
+    return val;
+}
+
+static void bcmpkt_rxpmd_mtp_index_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[8], 11, 3, val);
+}
+
+static uint32_t bcmpkt_rxpmd_mtp_index_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[8], 11, 3);
+    return val;
+}
+
+static void bcmpkt_rxpmd_bpdu_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[12], 28, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_bpdu_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[12], 28, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_l3only_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[9], 31, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_l3only_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[9], 31, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_ip_routed_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[9], 30, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_ip_routed_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[9], 30, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_uc_sw_copy_dropped_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[4], 23, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_uc_sw_copy_dropped_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[4], 23, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_switch_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[6], 31, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_switch_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[6], 31, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_ing_otag_action_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[9], 28, 2, val);
+}
+
+static uint32_t bcmpkt_rxpmd_ing_otag_action_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[9], 28, 2);
+    return val;
+}
+
+static void bcmpkt_rxpmd_ing_tag_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[9], 13, 2, val);
+}
+
+static uint32_t bcmpkt_rxpmd_ing_tag_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[9], 13, 2);
+    return val;
+}
+
+static void bcmpkt_rxpmd_rx_bfd_start_offset_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[12], 14, 8, val);
+}
+
+static uint32_t bcmpkt_rxpmd_rx_bfd_start_offset_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[12], 14, 8);
+    return val;
+}
+
+static void bcmpkt_rxpmd_rx_bfd_start_offset_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[12], 12, 2, val);
+}
+
+static uint32_t bcmpkt_rxpmd_rx_bfd_start_offset_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[12], 12, 2);
+    return val;
+}
+
+static void bcmpkt_rxpmd_rx_bfd_session_index_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[12], 0, 12, val);
+}
+
+static uint32_t bcmpkt_rxpmd_rx_bfd_session_index_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[12], 0, 12);
+    return val;
+}
+
+static void bcmpkt_rxpmd_reason_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[9], 0, 4, val);
+}
+
+static uint32_t bcmpkt_rxpmd_reason_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[9], 0, 4);
+    return val;
+}
+
+static void bcmpkt_rxpmd_do_not_change_ttl_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[9], 4, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_do_not_change_ttl_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[9], 4, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_i2e_classid_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[12], 12, 4, val);
+}
+
+static uint32_t bcmpkt_rxpmd_i2e_classid_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[12], 12, 4);
+    return val;
+}
+
+static void bcmpkt_rxpmd_i2e_classid_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[12], 0, 12, val);
+}
+
+static uint32_t bcmpkt_rxpmd_i2e_classid_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[12], 0, 12);
+    return val;
+}
+
+static void bcmpkt_rxpmd_ing_l3_intf_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[9], 15, 13, val);
+}
+
+static uint32_t bcmpkt_rxpmd_ing_l3_intf_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[9], 15, 13);
+    return val;
+}
+
+static void bcmpkt_rxpmd_loopback_packet_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[8], 0, 3, val);
+}
+
+static uint32_t bcmpkt_rxpmd_loopback_packet_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[8], 0, 3);
+    return val;
+}
+
+static void bcmpkt_rxpmd_regen_crc_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[7], 14, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_regen_crc_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[7], 14, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_entropy_label_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[6], 1, 20, val);
+}
+
+static uint32_t bcmpkt_rxpmd_entropy_label_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[6], 1, 20);
+    return val;
+}
+
+static void bcmpkt_rxpmd_tunnel_decap_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[4], 18, 5, val);
+}
+
+static uint32_t bcmpkt_rxpmd_tunnel_decap_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[4], 18, 5);
+    return val;
+}
+
+static void bcmpkt_rxpmd_dlb_id_valid_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[12], 31, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_dlb_id_valid_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[12], 31, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_dlb_id_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[4], 25, 7, val);
+}
+
+static uint32_t bcmpkt_rxpmd_dlb_id_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[4], 25, 7);
+    return val;
+}
+
+static void bcmpkt_rxpmd_replication_or_nhop_index_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[7], 15, 17, val);
+}
+
+static uint32_t bcmpkt_rxpmd_replication_or_nhop_index_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[7], 15, 17);
+    return val;
+}
+
+static void bcmpkt_rxpmd_incoming_int_hdr_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[8], 30, 2, val);
+}
+
+static uint32_t bcmpkt_rxpmd_incoming_int_hdr_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[8], 30, 2);
+    return val;
+}
+
+static uint32_t bcmpkt_rxpmd_i_size_get(uint32_t *data, uint32_t **addr)
+{
+    return 13;
+}
+
+static uint32_t bcmpkt_rxpmd_i_reason_get(uint32_t *data, uint32_t **addr)
+{
+    *addr = data + 10;
+    return 2;
+}
+
+static uint32_t bcmpkt_rxpmd_i_module_hdr_get(uint32_t *data, uint32_t **addr)
+{
+    *addr = data + 0;
+    return 4;
+}
+
+/*******************************************************************************
+ * SWFORMAT:  RX_REASON
+ * BLOCKS:
+ * SIZE:     43
+ ******************************************************************************/
+void bcm56990_a0_rx_reason_encode(const bcmpkt_rx_reasons_t *reasons, uint32_t *data)
+{
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_UVLAN)) {
+        data[1] |= (0x1 << 0);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SLF)) {
+        data[1] |= (0x1 << 1);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_DLF)) {
+        data[1] |= (0x1 << 2);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L2MOVE)) {
+        data[1] |= (0x1 << 3);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L2CPU)) {
+        data[1] |= (0x1 << 4);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MISS)) {
+        data[1] |= (0x1 << 5);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3DST_MISS)) {
+        data[1] |= (0x1 << 6);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MOVE)) {
+        data[1] |= (0x1 << 7);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_MC_MISS)) {
+        data[1] |= (0x1 << 8);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_MISS)) {
+        data[1] |= (0x1 << 9);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_FFP)) {
+        data[1] |= (0x1 << 10);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3HDR_ERR)) {
+        data[1] |= (0x1 << 11);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_PROTOCOL_PKT)) {
+        data[1] |= (0x1 << 12);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_DOS_ATTACK)) {
+        data[1] |= (0x1 << 13);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_MARTIAN_ADDR)) {
+        data[1] |= (0x1 << 14);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_TUNNEL_ERR)) {
+        data[1] |= (0x1 << 15);
+    }
+
+    if (BCMPKT_RX_REASON_GET(*reasons,  BCMPKT_RX_REASON_CPU_SFLOW_CPU_SFLOW_FLEX)) {
+        WORD_FIELD_SET(data[1], 16, 2, 1);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons,  BCMPKT_RX_REASON_CPU_SFLOW_CPU_SFLOW_DST)) {
+        WORD_FIELD_SET(data[1], 16, 2, 2);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons,  BCMPKT_RX_REASON_CPU_SFLOW_CPU_SFLOW_SRC)) {
+        WORD_FIELD_SET(data[1], 16, 2, 3);
+    }
+    /*! For mask set ONLY. */
+    if (BCMPKT_RX_REASON_GET(*reasons,  BCMPKT_RX_REASON_CPU_SFLOW)) {
+        WORD_FIELD_SET(data[1], 16, 2, 3);
+    }
+
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_ICMP_REDIRECT)) {
+        data[1] |= (0x1 << 18);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_L3_SLOWPATH)) {
+        data[1] |= (0x1 << 19);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_PARITY_ERROR)) {
+        data[1] |= (0x1 << 20);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_L3_MTU_CHECK_FAIL)) {
+        data[1] |= (0x1 << 21);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MCIDX_ERROR)) {
+        data[1] |= (0x1 << 22);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_VFP)) {
+        data[1] |= (0x1 << 23);
+    }
+
+    if (BCMPKT_RX_REASON_GET(*reasons,  BCMPKT_RX_REASON_MPLS_PROC_ERROR_INVALID_PAYLOAD)) {
+        WORD_FIELD_SET(data[1], 24, 3, 1);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons,  BCMPKT_RX_REASON_MPLS_PROC_ERROR_INVALID_ACTION)) {
+        WORD_FIELD_SET(data[1], 24, 3, 2);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons,  BCMPKT_RX_REASON_MPLS_PROC_ERROR_LABEL_MISS)) {
+        WORD_FIELD_SET(data[1], 24, 3, 3);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons,  BCMPKT_RX_REASON_MPLS_PROC_ERROR_TTL_CHECK_FAIL)) {
+        WORD_FIELD_SET(data[1], 24, 3, 4);
+    }
+    /*! For mask set ONLY. */
+    if (BCMPKT_RX_REASON_GET(*reasons,  BCMPKT_RX_REASON_MPLS_PROC_ERROR)) {
+        WORD_FIELD_SET(data[1], 24, 3, 7);
+    }
+
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_PBT_NONUC_PKT)) {
+        data[1] |= (0x1 << 27);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_L3_NEXT_HOP)) {
+        data[1] |= (0x1 << 28);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MY_STATION)) {
+        data[1] |= (0x1 << 29);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_TIME_SYNC)) {
+        data[1] |= (0x1 << 30);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_TUNNEL_DECAP_ECN_ERROR)) {
+        data[1] |= (0x1 << 31);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_BFD_SLOWPATH)) {
+        data[0] |= (0x1 << 0);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_BFD_ERROR)) {
+        data[0] |= (0x1 << 1);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_PACKET_TRACE_TO_CPU)) {
+        data[0] |= (0x1 << 2);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_UNKNOWN_CONTROL_PKT)) {
+        data[0] |= (0x1 << 3);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_ALERT_LABEL)) {
+        data[0] |= (0x1 << 4);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_INTERFACE_MISMATCH)) {
+        data[0] |= (0x1 << 5);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_DLB_MONITOR)) {
+        data[0] |= (0x1 << 6);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_INT_TURN_AROUND)) {
+        data[0] |= (0x1 << 7);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_ETRAP_MONITOR)) {
+        data[0] |= (0x1 << 8);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_SRV6_ERROR)) {
+        data[0] |= (0x1 << 9);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_VXLAN_VN_ID_MISS)) {
+        data[0] |= (0x1 << 10);
+    }
+}
+
+void bcm56990_a0_rx_reason_decode(const uint32_t *data, bcmpkt_rx_reasons_t *reasons)
+{
+    uint32_t val;
+    COMPILER_REFERENCE(val);
+    if (data[1] & (0x1 << 0)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_UVLAN);
+    }
+    if (data[1] & (0x1 << 1)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_SLF);
+    }
+    if (data[1] & (0x1 << 2)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_DLF);
+    }
+    if (data[1] & (0x1 << 3)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L2MOVE);
+    }
+    if (data[1] & (0x1 << 4)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L2CPU);
+    }
+    if (data[1] & (0x1 << 5)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MISS);
+    }
+    if (data[1] & (0x1 << 6)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3DST_MISS);
+    }
+    if (data[1] & (0x1 << 7)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MOVE);
+    }
+    if (data[1] & (0x1 << 8)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_MC_MISS);
+    }
+    if (data[1] & (0x1 << 9)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_MISS);
+    }
+    if (data[1] & (0x1 << 10)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_FFP);
+    }
+    if (data[1] & (0x1 << 11)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3HDR_ERR);
+    }
+    if (data[1] & (0x1 << 12)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_PROTOCOL_PKT);
+    }
+    if (data[1] & (0x1 << 13)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_DOS_ATTACK);
+    }
+    if (data[1] & (0x1 << 14)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_MARTIAN_ADDR);
+    }
+    if (data[1] & (0x1 << 15)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_TUNNEL_ERR);
+    }
+
+    val = WORD_FIELD_GET(data[1], 16, 2);
+    if (val) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW);
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW + val);
+    }
+
+    if (data[1] & (0x1 << 18)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_ICMP_REDIRECT);
+    }
+    if (data[1] & (0x1 << 19)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_L3_SLOWPATH);
+    }
+    if (data[1] & (0x1 << 20)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_PARITY_ERROR);
+    }
+    if (data[1] & (0x1 << 21)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_L3_MTU_CHECK_FAIL);
+    }
+    if (data[1] & (0x1 << 22)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MCIDX_ERROR);
+    }
+    if (data[1] & (0x1 << 23)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_VFP);
+    }
+
+    val = WORD_FIELD_GET(data[1], 24, 3);
+    if (val) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR);
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR + val);
+    }
+
+    if (data[1] & (0x1 << 27)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_PBT_NONUC_PKT);
+    }
+    if (data[1] & (0x1 << 28)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_L3_NEXT_HOP);
+    }
+    if (data[1] & (0x1 << 29)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MY_STATION);
+    }
+    if (data[1] & (0x1 << 30)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_TIME_SYNC);
+    }
+    if (data[1] & (0x1 << 31)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_TUNNEL_DECAP_ECN_ERROR);
+    }
+    if (data[0] & (0x1 << 0)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_BFD_SLOWPATH);
+    }
+    if (data[0] & (0x1 << 1)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_BFD_ERROR);
+    }
+    if (data[0] & (0x1 << 2)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_PACKET_TRACE_TO_CPU);
+    }
+    if (data[0] & (0x1 << 3)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_UNKNOWN_CONTROL_PKT);
+    }
+    if (data[0] & (0x1 << 4)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_ALERT_LABEL);
+    }
+    if (data[0] & (0x1 << 5)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_INTERFACE_MISMATCH);
+    }
+    if (data[0] & (0x1 << 6)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_DLB_MONITOR);
+    }
+    if (data[0] & (0x1 << 7)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_INT_TURN_AROUND);
+    }
+    if (data[0] & (0x1 << 8)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_ETRAP_MONITOR);
+    }
+    if (data[0] & (0x1 << 9)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_SRV6_ERROR);
+    }
+    if (data[0] & (0x1 << 10)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_VXLAN_VN_ID_MISS);
+    }
+}
+
+void bcm56990_a0_ep_rx_reason_encode(const bcmpkt_rx_reasons_t *reasons, uint32_t *data)
+{
+}
+
+void bcm56990_a0_ep_rx_reason_decode(const uint32_t *data, bcmpkt_rx_reasons_t *reasons)
+{
+}
+
+const bcmpkt_rxpmd_fget_t bcm56990_a0_rxpmd_fget = {
+    {
+        bcmpkt_rxpmd_unicast_queue_get,
+        bcmpkt_rxpmd_queue_num_get,
+        bcmpkt_rxpmd_cpu_cos_get,
+        NULL,
+        bcmpkt_rxpmd_matched_rule_get,
+        bcmpkt_rxpmd_pkt_length_get,
+        bcmpkt_rxpmd_src_port_num_get,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_outer_vid_get,
+        bcmpkt_rxpmd_outer_cfi_get,
+        bcmpkt_rxpmd_outer_pri_get,
+        bcmpkt_rxpmd_special_packet_indicator_get,
+        bcmpkt_rxpmd_special_packet_type_get,
+        bcmpkt_rxpmd_change_dscp_get,
+        bcmpkt_rxpmd_dscp_get,
+        bcmpkt_rxpmd_change_ecn_get,
+        bcmpkt_rxpmd_ecn_get,
+        bcmpkt_rxpmd_timestamp_type_get,
+        bcmpkt_rxpmd_timestamp_get,
+        bcmpkt_rxpmd_timestamp_hi_get,
+        bcmpkt_rxpmd_mtp_index_get,
+        bcmpkt_rxpmd_bpdu_get,
+        NULL,
+        bcmpkt_rxpmd_l3only_get,
+        bcmpkt_rxpmd_ip_routed_get,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_uc_sw_copy_dropped_get,
+        bcmpkt_rxpmd_switch_get,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_ing_otag_action_get,
+        bcmpkt_rxpmd_ing_tag_type_get,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_rx_bfd_start_offset_get,
+        bcmpkt_rxpmd_rx_bfd_start_offset_type_get,
+        bcmpkt_rxpmd_rx_bfd_session_index_get,
+        bcmpkt_rxpmd_reason_type_get,
+        bcmpkt_rxpmd_do_not_change_ttl_get,
+        bcmpkt_rxpmd_i2e_classid_type_get,
+        bcmpkt_rxpmd_i2e_classid_get,
+        bcmpkt_rxpmd_ing_l3_intf_get,
+        bcmpkt_rxpmd_loopback_packet_type_get,
+        bcmpkt_rxpmd_regen_crc_get,
+        bcmpkt_rxpmd_entropy_label_get,
+        bcmpkt_rxpmd_tunnel_decap_type_get,
+        bcmpkt_rxpmd_dlb_id_valid_get,
+        bcmpkt_rxpmd_dlb_id_get,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_replication_or_nhop_index_get,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_incoming_int_hdr_type_get,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL
+    }
+};
+
+
+const bcmpkt_rxpmd_fset_t bcm56990_a0_rxpmd_fset = {
+    {
+        bcmpkt_rxpmd_unicast_queue_set,
+        bcmpkt_rxpmd_queue_num_set,
+        bcmpkt_rxpmd_cpu_cos_set,
+        NULL,
+        bcmpkt_rxpmd_matched_rule_set,
+        bcmpkt_rxpmd_pkt_length_set,
+        bcmpkt_rxpmd_src_port_num_set,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_outer_vid_set,
+        bcmpkt_rxpmd_outer_cfi_set,
+        bcmpkt_rxpmd_outer_pri_set,
+        bcmpkt_rxpmd_special_packet_indicator_set,
+        bcmpkt_rxpmd_special_packet_type_set,
+        bcmpkt_rxpmd_change_dscp_set,
+        bcmpkt_rxpmd_dscp_set,
+        bcmpkt_rxpmd_change_ecn_set,
+        bcmpkt_rxpmd_ecn_set,
+        bcmpkt_rxpmd_timestamp_type_set,
+        bcmpkt_rxpmd_timestamp_set,
+        bcmpkt_rxpmd_timestamp_hi_set,
+        bcmpkt_rxpmd_mtp_index_set,
+        bcmpkt_rxpmd_bpdu_set,
+        NULL,
+        bcmpkt_rxpmd_l3only_set,
+        bcmpkt_rxpmd_ip_routed_set,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_uc_sw_copy_dropped_set,
+        bcmpkt_rxpmd_switch_set,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_ing_otag_action_set,
+        bcmpkt_rxpmd_ing_tag_type_set,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_rx_bfd_start_offset_set,
+        bcmpkt_rxpmd_rx_bfd_start_offset_type_set,
+        bcmpkt_rxpmd_rx_bfd_session_index_set,
+        bcmpkt_rxpmd_reason_type_set,
+        bcmpkt_rxpmd_do_not_change_ttl_set,
+        bcmpkt_rxpmd_i2e_classid_type_set,
+        bcmpkt_rxpmd_i2e_classid_set,
+        bcmpkt_rxpmd_ing_l3_intf_set,
+        bcmpkt_rxpmd_loopback_packet_type_set,
+        bcmpkt_rxpmd_regen_crc_set,
+        bcmpkt_rxpmd_entropy_label_set,
+        bcmpkt_rxpmd_tunnel_decap_type_set,
+        bcmpkt_rxpmd_dlb_id_valid_set,
+        bcmpkt_rxpmd_dlb_id_set,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_replication_or_nhop_index_set,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_incoming_int_hdr_type_set,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL
+    }
+};
+
+
+const bcmpkt_rxpmd_figet_t bcm56990_a0_rxpmd_figet = {
+    {
+        bcmpkt_rxpmd_i_size_get,
+        bcmpkt_rxpmd_i_reason_get,
+        bcmpkt_rxpmd_i_module_hdr_get,
+        NULL
+    }
+};
+
+static shr_enum_map_t bcm56990_a0_rxpmd_view_types[] = {
+    {NULL, -1},
+};
+
+/* -2: unsupported, -1: global, others: view's value */
+static int bcm56990_a0_rxpmd_view_infos[BCMPKT_RXPMD_FID_COUNT] = {
+     -1, -1, -1, -2, -1, -1, -1, -2, -2, -2, -1, -1, -1, -1, -1, -1,
+     -1, -1, -1, -1, -1, -1, -1, -1, -2, -1, -1, -2, -2, -1, -1, -2,
+     -2, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1,
+     -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -2, -2, -2,
+     -2, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, -2, -2, -2,
+     -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+};
+
+
+void bcm56990_a0_rxpmd_view_info_get(bcmpkt_pmd_view_info_t *info)
+{
+    info->view_infos = bcm56990_a0_rxpmd_view_infos;
+    info->view_types = bcm56990_a0_rxpmd_view_types;
+    info->view_type_get = NULL;
+}
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_a0/bcm56990_a0_pkt_txpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_a0/bcm56990_a0_pkt_txpmd.c
new file mode 100644
index 000000000..73cc2ec20
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_a0/bcm56990_a0_pkt_txpmd.c
@@ -0,0 +1,526 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated from the registers file.
+ * Edits to this file will be lost when it is regenerated.
+ * Tool: INTERNAL/regs/xgs/generate-pmd.pl
+ *
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ *
+ * This file provides TXPMD access functions for BCM56990_A0.
+ *
+ ******************************************************************************/
+
+#include <sal/sal_types.h>
+#include <bcmpkt/bcmpkt_txpmd_internal.h>
+
+#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1)
+#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l))
+#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s)))
+#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s)))
+/*******************************************************************************
+ * SWFORMAT:  TXPMD
+ * BLOCKS:
+ * SIZE:     128
+ ******************************************************************************/
+static void bcmpkt_txpmd_start_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 30, 2, val);
+}
+
+static uint32_t bcmpkt_txpmd_start_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 30, 2);
+    return val;
+}
+
+static void bcmpkt_txpmd_header_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 24, 6, val);
+}
+
+static uint32_t bcmpkt_txpmd_header_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 24, 6);
+    return val;
+}
+
+static void bcmpkt_txpmd_pkt_length_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 10, 14, val);
+}
+
+static uint32_t bcmpkt_txpmd_pkt_length_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 10, 14);
+    return val;
+}
+
+static void bcmpkt_txpmd_ipcf_ptr_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 24, 8, val);
+}
+
+static uint32_t bcmpkt_txpmd_ipcf_ptr_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 24, 8);
+    return val;
+}
+
+static void bcmpkt_txpmd_sop_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 9, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_sop_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 9, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_eop_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 8, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_eop_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 8, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_cell_length_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 0, 8, val);
+}
+
+static uint32_t bcmpkt_txpmd_cell_length_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 0, 8);
+    return val;
+}
+
+static void bcmpkt_txpmd_cell_error_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 20, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_cell_error_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 20, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_local_dest_port_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 31, 1, val & MASK(1));
+    WORD_FIELD_SET(data[1], 0, 8, (val >> 1) & MASK(8));
+}
+
+static uint32_t bcmpkt_txpmd_local_dest_port_get(uint32_t *data)
+{
+    uint32_t val;
+    val = (WORD_FIELD_GET(data[2], 31, 1) | (WORD_FIELD_GET(data[1], 0, 8) << 1)) ;
+    return val;
+}
+
+static void bcmpkt_txpmd_src_modid_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 0, 8, val);
+}
+
+static uint32_t bcmpkt_txpmd_src_modid_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 0, 8);
+    return val;
+}
+
+static void bcmpkt_txpmd_cos_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 8, 6, val);
+}
+
+static uint32_t bcmpkt_txpmd_cos_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 8, 6);
+    return val;
+}
+
+static void bcmpkt_txpmd_input_pri_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 25, 4, val);
+}
+
+static uint32_t bcmpkt_txpmd_input_pri_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 25, 4);
+    return val;
+}
+
+static void bcmpkt_txpmd_unicast_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 14, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_unicast_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 14, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_rqe_q_num_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 16, 4, val);
+}
+
+static uint32_t bcmpkt_txpmd_rqe_q_num_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 16, 4);
+    return val;
+}
+
+static void bcmpkt_txpmd_set_l2bm_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 15, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_set_l2bm_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 15, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_ieee1588_one_step_enable_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 19, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_ieee1588_one_step_enable_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 19, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_ieee1588_regen_udp_checksum_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 18, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_ieee1588_regen_udp_checksum_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 18, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 17, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 17, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 8, 8, val);
+}
+
+static uint32_t bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 8, 8);
+    return val;
+}
+
+static void bcmpkt_txpmd_tx_ts_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 16, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_tx_ts_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 16, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_spid_override_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 24, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_spid_override_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 24, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_spid_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 22, 2, val);
+}
+
+static uint32_t bcmpkt_txpmd_spid_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 22, 2);
+    return val;
+}
+
+static void bcmpkt_txpmd_spap_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 20, 2, val);
+}
+
+static uint32_t bcmpkt_txpmd_spap_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 20, 2);
+    return val;
+}
+
+static uint32_t bcmpkt_txpmd_i_size_get(uint32_t *data, uint32_t **addr)
+{
+    return 4;
+}
+
+
+const bcmpkt_txpmd_fget_t bcm56990_a0_txpmd_fget = {
+    {
+        bcmpkt_txpmd_start_get,
+        bcmpkt_txpmd_header_type_get,
+        bcmpkt_txpmd_pkt_length_get,
+        bcmpkt_txpmd_ipcf_ptr_get,
+        bcmpkt_txpmd_sop_get,
+        bcmpkt_txpmd_eop_get,
+        bcmpkt_txpmd_cell_length_get,
+        bcmpkt_txpmd_cell_error_get,
+        bcmpkt_txpmd_local_dest_port_get,
+        bcmpkt_txpmd_src_modid_get,
+        bcmpkt_txpmd_cos_get,
+        bcmpkt_txpmd_input_pri_get,
+        bcmpkt_txpmd_unicast_get,
+        bcmpkt_txpmd_rqe_q_num_get,
+        bcmpkt_txpmd_set_l2bm_get,
+        bcmpkt_txpmd_ieee1588_one_step_enable_get,
+        bcmpkt_txpmd_ieee1588_regen_udp_checksum_get,
+        bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_get,
+        bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_get,
+        bcmpkt_txpmd_tx_ts_get,
+        bcmpkt_txpmd_spid_override_get,
+        bcmpkt_txpmd_spid_get,
+        bcmpkt_txpmd_spap_get,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL
+    }
+};
+
+
+const bcmpkt_txpmd_fset_t bcm56990_a0_txpmd_fset = {
+    {
+        bcmpkt_txpmd_start_set,
+        bcmpkt_txpmd_header_type_set,
+        bcmpkt_txpmd_pkt_length_set,
+        bcmpkt_txpmd_ipcf_ptr_set,
+        bcmpkt_txpmd_sop_set,
+        bcmpkt_txpmd_eop_set,
+        bcmpkt_txpmd_cell_length_set,
+        bcmpkt_txpmd_cell_error_set,
+        bcmpkt_txpmd_local_dest_port_set,
+        bcmpkt_txpmd_src_modid_set,
+        bcmpkt_txpmd_cos_set,
+        bcmpkt_txpmd_input_pri_set,
+        bcmpkt_txpmd_unicast_set,
+        bcmpkt_txpmd_rqe_q_num_set,
+        bcmpkt_txpmd_set_l2bm_set,
+        bcmpkt_txpmd_ieee1588_one_step_enable_set,
+        bcmpkt_txpmd_ieee1588_regen_udp_checksum_set,
+        bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_set,
+        bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_set,
+        bcmpkt_txpmd_tx_ts_set,
+        bcmpkt_txpmd_spid_override_set,
+        bcmpkt_txpmd_spid_set,
+        bcmpkt_txpmd_spap_set,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL
+    }
+};
+
+
+const bcmpkt_txpmd_figet_t bcm56990_a0_txpmd_figet = {
+    {
+        bcmpkt_txpmd_i_size_get
+    }
+};
+
+static shr_enum_map_t bcm56990_a0_txpmd_view_types[] = {
+    {NULL, -1},
+};
+
+/* -2: unsupported, -1: global, others: view's value */
+static int bcm56990_a0_txpmd_view_infos[BCMPKT_TXPMD_FID_COUNT] = {
+     -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
+     -1, -1, -1, -1, -1, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+     -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+     -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+     -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+     -2, -2, -2,
+};
+
+
+void bcm56990_a0_txpmd_view_info_get(bcmpkt_pmd_view_info_t *info)
+{
+    info->view_infos = bcm56990_a0_txpmd_view_infos;
+    info->view_types = bcm56990_a0_txpmd_view_types;
+    info->view_type_get = NULL;
+}
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_b0/bcm56990_b0_pkt_lbhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_b0/bcm56990_b0_pkt_lbhdr.c
new file mode 100644
index 000000000..b8a4a5b0c
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_b0/bcm56990_b0_pkt_lbhdr.c
@@ -0,0 +1,592 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated from the registers file.
+ * Edits to this file will be lost when it is regenerated.
+ * Tool: INTERNAL/regs/xgs/generate-pmd.pl
+ *
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ *
+ * This file provides LBHDR access functions for BCM56990_B0.
+ *
+ ******************************************************************************/
+
+#include <sal/sal_types.h>
+#include <bcmpkt/bcmpkt_lbhdr_internal.h>
+
+#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1)
+#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l))
+#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s)))
+#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s)))
+/*******************************************************************************
+ * SWFORMAT:  LBHDR
+ * BLOCKS:
+ * SIZE:     128
+ ******************************************************************************/
+static void bcmpkt_lbhdr_start_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 24, 8, val);
+}
+
+static uint32_t bcmpkt_lbhdr_start_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 24, 8);
+    return val;
+}
+
+static void bcmpkt_lbhdr_header_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 15, 5, val);
+}
+
+static uint32_t bcmpkt_lbhdr_header_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 15, 5);
+    return val;
+}
+
+static void bcmpkt_lbhdr_input_priority_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 20, 4, val);
+}
+
+static uint32_t bcmpkt_lbhdr_input_priority_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 20, 4);
+    return val;
+}
+
+static void bcmpkt_lbhdr_pkt_profile_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 26, 3, val);
+}
+
+static uint32_t bcmpkt_lbhdr_pkt_profile_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 26, 3);
+    return val;
+}
+
+static void bcmpkt_lbhdr_visibility_pkt_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 29, 1, val);
+}
+
+static uint32_t bcmpkt_lbhdr_visibility_pkt_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 29, 1);
+    return val;
+}
+
+static void bcmpkt_lbhdr_source_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 30, 2, val & MASK(2));
+    WORD_FIELD_SET(data[0], 0, 14, (val >> 2) & MASK(14));
+}
+
+static uint32_t bcmpkt_lbhdr_source_get(uint32_t *data)
+{
+    uint32_t val;
+    val = (WORD_FIELD_GET(data[1], 30, 2) | (WORD_FIELD_GET(data[0], 0, 14) << 2)) ;
+    return val;
+}
+
+static void bcmpkt_lbhdr_source_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 14, 1, val);
+}
+
+static uint32_t bcmpkt_lbhdr_source_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 14, 1);
+    return val;
+}
+
+static void bcmpkt_lbhdr_trill_ac_cng_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_AC) {
+        return;
+    }
+    WORD_FIELD_SET(data[3], 4, 2, val);
+}
+
+static uint32_t bcmpkt_lbhdr_trill_ac_cng_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_AC) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[3], 4, 2);
+    return val;
+}
+
+static void bcmpkt_lbhdr_trill_ac_tc_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_AC) {
+        return;
+    }
+    WORD_FIELD_SET(data[3], 0, 4, val);
+}
+
+static uint32_t bcmpkt_lbhdr_trill_ac_tc_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_AC) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[3], 0, 4);
+    return val;
+}
+
+static void bcmpkt_lbhdr_trill_nw_cng_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_NW) {
+        return;
+    }
+    WORD_FIELD_SET(data[3], 4, 2, val);
+}
+
+static uint32_t bcmpkt_lbhdr_trill_nw_cng_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_NW) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[3], 4, 2);
+    return val;
+}
+
+static void bcmpkt_lbhdr_trill_nw_tc_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_NW) {
+        return;
+    }
+    WORD_FIELD_SET(data[3], 0, 4, val);
+}
+
+static uint32_t bcmpkt_lbhdr_trill_nw_tc_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_NW) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[3], 0, 4);
+    return val;
+}
+
+static void bcmpkt_lbhdr_eth_dest_type_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return;
+    }
+    WORD_FIELD_SET(data[3], 11, 4, val);
+}
+
+static uint32_t bcmpkt_lbhdr_eth_dest_type_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[3], 11, 4);
+    return val;
+}
+
+static void bcmpkt_lbhdr_eth_dest_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return;
+    }
+    WORD_FIELD_SET(data[3], 15, 16, val);
+}
+
+static uint32_t bcmpkt_lbhdr_eth_dest_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[3], 15, 16);
+    return val;
+}
+
+static void bcmpkt_lbhdr_eth_dp_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 7, 2, val);
+}
+
+static uint32_t bcmpkt_lbhdr_eth_dp_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 7, 2);
+    return val;
+}
+
+static void bcmpkt_lbhdr_eth_ecmp_member_id_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 9, 14, val);
+}
+
+static uint32_t bcmpkt_lbhdr_eth_ecmp_member_id_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 9, 14);
+    return val;
+}
+
+static void bcmpkt_lbhdr_eth_int_cn_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 1, 2, val);
+}
+
+static uint32_t bcmpkt_lbhdr_eth_int_cn_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 1, 2);
+    return val;
+}
+
+static void bcmpkt_lbhdr_eth_int_pri_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 3, 4, val);
+}
+
+static uint32_t bcmpkt_lbhdr_eth_int_pri_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 3, 4);
+    return val;
+}
+
+static void bcmpkt_lbhdr_eth_mcast_lb_index_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return;
+    }
+    WORD_FIELD_SET(data[1], 6, 8, val);
+}
+
+static uint32_t bcmpkt_lbhdr_eth_mcast_lb_index_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[1], 6, 8);
+    return val;
+}
+
+static void bcmpkt_lbhdr_eth_mcast_lb_index_vld_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return;
+    }
+    WORD_FIELD_SET(data[1], 14, 1, val);
+}
+
+static uint32_t bcmpkt_lbhdr_eth_mcast_lb_index_vld_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[1], 14, 1);
+    return val;
+}
+
+static void bcmpkt_lbhdr_eth_pp_port_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return;
+    }
+    WORD_FIELD_SET(data[3], 0, 9, val);
+}
+
+static uint32_t bcmpkt_lbhdr_eth_pp_port_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[3], 0, 9);
+    return val;
+}
+
+static void bcmpkt_lbhdr_eth_qos_fields_vld_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 0, 1, val);
+}
+
+static uint32_t bcmpkt_lbhdr_eth_qos_fields_vld_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 0, 1);
+    return val;
+}
+
+static void bcmpkt_lbhdr_eth_routed_pkt_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return;
+    }
+    WORD_FIELD_SET(data[3], 31, 1, val);
+}
+
+static uint32_t bcmpkt_lbhdr_eth_routed_pkt_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[3], 31, 1);
+    return val;
+}
+
+static void bcmpkt_lbhdr_eth_subflow_type_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return;
+    }
+    WORD_FIELD_SET(data[3], 9, 2, val);
+}
+
+static uint32_t bcmpkt_lbhdr_eth_subflow_type_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[3], 9, 2);
+    return val;
+}
+
+static void bcmpkt_lbhdr_ethernet_vrf_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 23, 9, val & MASK(9));
+    WORD_FIELD_SET(data[1], 0, 4, (val >> 9) & MASK(4));
+}
+
+static uint32_t bcmpkt_lbhdr_ethernet_vrf_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return 0;
+    }
+    val = (WORD_FIELD_GET(data[2], 23, 9) | (WORD_FIELD_GET(data[1], 0, 4) << 9)) ;
+    return val;
+}
+
+static void bcmpkt_lbhdr_ethernet_vrf_valid_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return;
+    }
+    WORD_FIELD_SET(data[1], 4, 1, val);
+}
+
+static uint32_t bcmpkt_lbhdr_ethernet_vrf_valid_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[1], 4, 1);
+    return val;
+}
+
+static uint32_t bcmpkt_lbhdr_i_size_get(uint32_t *data, uint32_t **addr)
+{
+    return 4;
+}
+
+
+const bcmpkt_lbhdr_fget_t bcm56990_b0_lbhdr_fget = {
+    {
+        bcmpkt_lbhdr_start_get,
+        bcmpkt_lbhdr_header_type_get,
+        bcmpkt_lbhdr_input_priority_get,
+        bcmpkt_lbhdr_pkt_profile_get,
+        bcmpkt_lbhdr_visibility_pkt_get,
+        bcmpkt_lbhdr_source_get,
+        bcmpkt_lbhdr_source_type_get,
+        bcmpkt_lbhdr_trill_ac_cng_get,
+        bcmpkt_lbhdr_trill_ac_tc_get,
+        NULL,
+        bcmpkt_lbhdr_trill_nw_cng_get,
+        bcmpkt_lbhdr_trill_nw_tc_get,
+        bcmpkt_lbhdr_eth_dest_type_get,
+        bcmpkt_lbhdr_eth_dest_get,
+        bcmpkt_lbhdr_eth_dp_get,
+        bcmpkt_lbhdr_eth_ecmp_member_id_get,
+        bcmpkt_lbhdr_eth_int_cn_get,
+        bcmpkt_lbhdr_eth_int_pri_get,
+        bcmpkt_lbhdr_eth_mcast_lb_index_get,
+        bcmpkt_lbhdr_eth_mcast_lb_index_vld_get,
+        bcmpkt_lbhdr_eth_pp_port_get,
+        bcmpkt_lbhdr_eth_qos_fields_vld_get,
+        bcmpkt_lbhdr_eth_routed_pkt_get,
+        bcmpkt_lbhdr_eth_subflow_type_get,
+        bcmpkt_lbhdr_ethernet_vrf_get,
+        bcmpkt_lbhdr_ethernet_vrf_valid_get,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL
+    }
+};
+
+
+const bcmpkt_lbhdr_fset_t bcm56990_b0_lbhdr_fset = {
+    {
+        bcmpkt_lbhdr_start_set,
+        bcmpkt_lbhdr_header_type_set,
+        bcmpkt_lbhdr_input_priority_set,
+        bcmpkt_lbhdr_pkt_profile_set,
+        bcmpkt_lbhdr_visibility_pkt_set,
+        bcmpkt_lbhdr_source_set,
+        bcmpkt_lbhdr_source_type_set,
+        bcmpkt_lbhdr_trill_ac_cng_set,
+        bcmpkt_lbhdr_trill_ac_tc_set,
+        NULL,
+        bcmpkt_lbhdr_trill_nw_cng_set,
+        bcmpkt_lbhdr_trill_nw_tc_set,
+        bcmpkt_lbhdr_eth_dest_type_set,
+        bcmpkt_lbhdr_eth_dest_set,
+        bcmpkt_lbhdr_eth_dp_set,
+        bcmpkt_lbhdr_eth_ecmp_member_id_set,
+        bcmpkt_lbhdr_eth_int_cn_set,
+        bcmpkt_lbhdr_eth_int_pri_set,
+        bcmpkt_lbhdr_eth_mcast_lb_index_set,
+        bcmpkt_lbhdr_eth_mcast_lb_index_vld_set,
+        bcmpkt_lbhdr_eth_pp_port_set,
+        bcmpkt_lbhdr_eth_qos_fields_vld_set,
+        bcmpkt_lbhdr_eth_routed_pkt_set,
+        bcmpkt_lbhdr_eth_subflow_type_set,
+        bcmpkt_lbhdr_ethernet_vrf_set,
+        bcmpkt_lbhdr_ethernet_vrf_valid_set,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL
+    }
+};
+
+
+const bcmpkt_lbhdr_figet_t bcm56990_b0_lbhdr_figet = {
+    {
+        bcmpkt_lbhdr_i_size_get
+    }
+};
+
+static shr_enum_map_t bcm56990_b0_lbhdr_view_types[] = {
+    {"trill_nw", 1},
+    {"trill_ac", 2},
+    {"ethernet", 3},
+    {NULL, -1},
+};
+
+/* -2: unsupported, -1: global, others: view's value */
+static int bcm56990_b0_lbhdr_view_infos[BCMPKT_LBHDR_FID_COUNT] = {
+     -1, -1, -1, -1, -1, -1, -1,  2,  2, -2,  1,  1,  3,  3,  3,  3,
+      3,  3,  3,  3,  3,  3,  3,  3,  3,  3, -2, -2, -2, -2, -2, -2,
+     -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+     -2,
+};
+
+
+void bcm56990_b0_lbhdr_view_info_get(bcmpkt_pmd_view_info_t *info)
+{
+    info->view_infos = bcm56990_b0_lbhdr_view_infos;
+    info->view_types = bcm56990_b0_lbhdr_view_types;
+    info->view_type_get = bcmpkt_lbhdr_header_type_get;
+}
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_b0/bcm56990_b0_pkt_rxpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_b0/bcm56990_b0_pkt_rxpmd.c
new file mode 100644
index 000000000..056516e25
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_b0/bcm56990_b0_pkt_rxpmd.c
@@ -0,0 +1,1110 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated from the registers file.
+ * Edits to this file will be lost when it is regenerated.
+ * Tool: INTERNAL/regs/xgs/generate-pmd.pl
+ *
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ *
+ * This file provides RXPMD access functions for BCM56990_B0.
+ *
+ ******************************************************************************/
+
+#include <sal/sal_types.h>
+#include <bcmpkt/bcmpkt_rxpmd.h>
+#include <bcmpkt/bcmpkt_rxpmd_internal.h>
+
+#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1)
+#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l))
+#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s)))
+#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s)))
+/*******************************************************************************
+ * SWFORMAT:  RXPMD
+ * BLOCKS:
+ * SIZE:     416
+ ******************************************************************************/
+static void bcmpkt_rxpmd_unicast_queue_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[4], 24, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_unicast_queue_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[4], 24, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_queue_num_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[12], 22, 6, val);
+}
+
+static uint32_t bcmpkt_rxpmd_queue_num_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[12], 22, 6);
+    return val;
+}
+
+static void bcmpkt_rxpmd_cpu_cos_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[12], 22, 6, val);
+}
+
+static uint32_t bcmpkt_rxpmd_cpu_cos_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[12], 22, 6);
+    return val;
+}
+
+static void bcmpkt_rxpmd_matched_rule_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[8], 3, 8, val);
+}
+
+static uint32_t bcmpkt_rxpmd_matched_rule_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[8], 3, 8);
+    return val;
+}
+
+static void bcmpkt_rxpmd_pkt_length_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[7], 0, 14, val);
+}
+
+static uint32_t bcmpkt_rxpmd_pkt_length_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[7], 0, 14);
+    return val;
+}
+
+static void bcmpkt_rxpmd_src_port_num_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[6], 22, 9, val);
+}
+
+static uint32_t bcmpkt_rxpmd_src_port_num_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[6], 22, 9);
+    return val;
+}
+
+static void bcmpkt_rxpmd_outer_vid_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[8], 18, 12, val);
+}
+
+static uint32_t bcmpkt_rxpmd_outer_vid_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[8], 18, 12);
+    return val;
+}
+
+static void bcmpkt_rxpmd_outer_cfi_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[8], 14, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_outer_cfi_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[8], 14, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_outer_pri_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[8], 15, 3, val);
+}
+
+static uint32_t bcmpkt_rxpmd_outer_pri_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[8], 15, 3);
+    return val;
+}
+
+static void bcmpkt_rxpmd_special_packet_indicator_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[6], 21, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_special_packet_indicator_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[6], 21, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_special_packet_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[9], 5, 3, val);
+}
+
+static uint32_t bcmpkt_rxpmd_special_packet_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[9], 5, 3);
+    return val;
+}
+
+static void bcmpkt_rxpmd_change_dscp_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[12], 29, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_change_dscp_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[12], 29, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_dscp_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[9], 5, 6, val);
+}
+
+static uint32_t bcmpkt_rxpmd_dscp_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[9], 5, 6);
+    return val;
+}
+
+static void bcmpkt_rxpmd_change_ecn_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[12], 30, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_change_ecn_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[12], 30, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_ecn_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[9], 11, 2, val);
+}
+
+static uint32_t bcmpkt_rxpmd_ecn_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[9], 11, 2);
+    return val;
+}
+
+static void bcmpkt_rxpmd_timestamp_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[4], 16, 2, val);
+}
+
+static uint32_t bcmpkt_rxpmd_timestamp_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[4], 16, 2);
+    return val;
+}
+
+static void bcmpkt_rxpmd_timestamp_set(uint32_t *data, uint32_t val)
+{
+    data[5] = val;
+}
+
+static uint32_t bcmpkt_rxpmd_timestamp_get(uint32_t *data)
+{
+    uint32_t val;
+    val = data[5];
+    return val;
+}
+
+static void bcmpkt_rxpmd_timestamp_hi_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[4], 0, 16, val);
+}
+
+static uint32_t bcmpkt_rxpmd_timestamp_hi_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[4], 0, 16);
+    return val;
+}
+
+static void bcmpkt_rxpmd_mtp_index_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[8], 11, 3, val);
+}
+
+static uint32_t bcmpkt_rxpmd_mtp_index_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[8], 11, 3);
+    return val;
+}
+
+static void bcmpkt_rxpmd_bpdu_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[12], 28, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_bpdu_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[12], 28, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_l3only_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[8], 2, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_l3only_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[8], 2, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_ip_routed_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[8], 1, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_ip_routed_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[8], 1, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_uc_sw_copy_dropped_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[4], 23, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_uc_sw_copy_dropped_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[4], 23, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_switch_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[6], 31, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_switch_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[6], 31, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_ing_otag_action_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[9], 30, 2, val);
+}
+
+static uint32_t bcmpkt_rxpmd_ing_otag_action_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[9], 30, 2);
+    return val;
+}
+
+static void bcmpkt_rxpmd_ing_tag_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[9], 13, 2, val);
+}
+
+static uint32_t bcmpkt_rxpmd_ing_tag_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[9], 13, 2);
+    return val;
+}
+
+static void bcmpkt_rxpmd_rx_bfd_start_offset_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[12], 14, 8, val);
+}
+
+static uint32_t bcmpkt_rxpmd_rx_bfd_start_offset_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[12], 14, 8);
+    return val;
+}
+
+static void bcmpkt_rxpmd_rx_bfd_start_offset_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[12], 12, 2, val);
+}
+
+static uint32_t bcmpkt_rxpmd_rx_bfd_start_offset_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[12], 12, 2);
+    return val;
+}
+
+static void bcmpkt_rxpmd_rx_bfd_session_index_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[12], 0, 12, val);
+}
+
+static uint32_t bcmpkt_rxpmd_rx_bfd_session_index_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[12], 0, 12);
+    return val;
+}
+
+static void bcmpkt_rxpmd_reason_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[9], 0, 4, val);
+}
+
+static uint32_t bcmpkt_rxpmd_reason_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[9], 0, 4);
+    return val;
+}
+
+static void bcmpkt_rxpmd_do_not_change_ttl_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[9], 4, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_do_not_change_ttl_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[9], 4, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_i2e_classid_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[12], 12, 4, val);
+}
+
+static uint32_t bcmpkt_rxpmd_i2e_classid_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[12], 12, 4);
+    return val;
+}
+
+static void bcmpkt_rxpmd_i2e_classid_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[12], 0, 12, val);
+}
+
+static uint32_t bcmpkt_rxpmd_i2e_classid_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[12], 0, 12);
+    return val;
+}
+
+static void bcmpkt_rxpmd_ing_l3_intf_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[12], 0, 13, val);
+}
+
+static uint32_t bcmpkt_rxpmd_ing_l3_intf_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[12], 0, 13);
+    return val;
+}
+
+static void bcmpkt_rxpmd_regen_crc_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[7], 14, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_regen_crc_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[7], 14, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_entropy_label_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[6], 1, 20, val);
+}
+
+static uint32_t bcmpkt_rxpmd_entropy_label_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[6], 1, 20);
+    return val;
+}
+
+static void bcmpkt_rxpmd_tunnel_decap_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[4], 18, 5, val);
+}
+
+static uint32_t bcmpkt_rxpmd_tunnel_decap_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[4], 18, 5);
+    return val;
+}
+
+static void bcmpkt_rxpmd_dlb_id_valid_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[12], 31, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_dlb_id_valid_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[12], 31, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_dlb_id_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[4], 25, 7, val);
+}
+
+static uint32_t bcmpkt_rxpmd_dlb_id_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[4], 25, 7);
+    return val;
+}
+
+static void bcmpkt_rxpmd_replication_or_nhop_index_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[7], 15, 17, val);
+}
+
+static uint32_t bcmpkt_rxpmd_replication_or_nhop_index_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[7], 15, 17);
+    return val;
+}
+
+static void bcmpkt_rxpmd_incoming_int_hdr_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[8], 30, 2, val);
+}
+
+static uint32_t bcmpkt_rxpmd_incoming_int_hdr_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[8], 30, 2);
+    return val;
+}
+
+static void bcmpkt_rxpmd_ing_l3_intf_valid_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[12], 16, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_ing_l3_intf_valid_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[12], 16, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_o_nhi_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[9], 15, 15, val);
+}
+
+static uint32_t bcmpkt_rxpmd_o_nhi_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[9], 15, 15);
+    return val;
+}
+
+static uint32_t bcmpkt_rxpmd_i_size_get(uint32_t *data, uint32_t **addr)
+{
+    return 13;
+}
+
+static uint32_t bcmpkt_rxpmd_i_reason_get(uint32_t *data, uint32_t **addr)
+{
+    *addr = data + 10;
+    return 2;
+}
+
+static uint32_t bcmpkt_rxpmd_i_module_hdr_get(uint32_t *data, uint32_t **addr)
+{
+    *addr = data + 0;
+    return 4;
+}
+
+/*******************************************************************************
+ * SWFORMAT:  RX_REASON
+ * BLOCKS:
+ * SIZE:     45
+ ******************************************************************************/
+void bcm56990_b0_rx_reason_encode(const bcmpkt_rx_reasons_t *reasons, uint32_t *data)
+{
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_UVLAN)) {
+        data[1] |= (0x1 << 0);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SLF)) {
+        data[1] |= (0x1 << 1);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_DLF)) {
+        data[1] |= (0x1 << 2);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L2MOVE)) {
+        data[1] |= (0x1 << 3);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L2CPU)) {
+        data[1] |= (0x1 << 4);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MISS)) {
+        data[1] |= (0x1 << 5);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3DST_MISS)) {
+        data[1] |= (0x1 << 6);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MOVE)) {
+        data[1] |= (0x1 << 7);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_MC_MISS)) {
+        data[1] |= (0x1 << 8);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_MISS)) {
+        data[1] |= (0x1 << 9);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_FFP)) {
+        data[1] |= (0x1 << 10);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3HDR_ERR)) {
+        data[1] |= (0x1 << 11);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_PROTOCOL_PKT)) {
+        data[1] |= (0x1 << 12);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_DOS_ATTACK)) {
+        data[1] |= (0x1 << 13);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_MARTIAN_ADDR)) {
+        data[1] |= (0x1 << 14);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_TUNNEL_ERR)) {
+        data[1] |= (0x1 << 15);
+    }
+
+    if (BCMPKT_RX_REASON_GET(*reasons,  BCMPKT_RX_REASON_CPU_SFLOW_CPU_SFLOW_FLEX)) {
+        WORD_FIELD_SET(data[1], 16, 2, 1);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons,  BCMPKT_RX_REASON_CPU_SFLOW_CPU_SFLOW_DST)) {
+        WORD_FIELD_SET(data[1], 16, 2, 2);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons,  BCMPKT_RX_REASON_CPU_SFLOW_CPU_SFLOW_SRC)) {
+        WORD_FIELD_SET(data[1], 16, 2, 3);
+    }
+    /*! For mask set ONLY. */
+    if (BCMPKT_RX_REASON_GET(*reasons,  BCMPKT_RX_REASON_CPU_SFLOW)) {
+        WORD_FIELD_SET(data[1], 16, 2, 3);
+    }
+
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_ICMP_REDIRECT)) {
+        data[1] |= (0x1 << 18);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_L3_SLOWPATH)) {
+        data[1] |= (0x1 << 19);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_PARITY_ERROR)) {
+        data[1] |= (0x1 << 20);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_L3_MTU_CHECK_FAIL)) {
+        data[1] |= (0x1 << 21);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MCIDX_ERROR)) {
+        data[1] |= (0x1 << 22);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_VFP)) {
+        data[1] |= (0x1 << 23);
+    }
+
+    if (BCMPKT_RX_REASON_GET(*reasons,  BCMPKT_RX_REASON_MPLS_PROC_ERROR_INVALID_PAYLOAD)) {
+        WORD_FIELD_SET(data[1], 24, 3, 1);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons,  BCMPKT_RX_REASON_MPLS_PROC_ERROR_INVALID_ACTION)) {
+        WORD_FIELD_SET(data[1], 24, 3, 2);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons,  BCMPKT_RX_REASON_MPLS_PROC_ERROR_LABEL_MISS)) {
+        WORD_FIELD_SET(data[1], 24, 3, 3);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons,  BCMPKT_RX_REASON_MPLS_PROC_ERROR_TTL_CHECK_FAIL)) {
+        WORD_FIELD_SET(data[1], 24, 3, 4);
+    }
+    /*! For mask set ONLY. */
+    if (BCMPKT_RX_REASON_GET(*reasons,  BCMPKT_RX_REASON_MPLS_PROC_ERROR)) {
+        WORD_FIELD_SET(data[1], 24, 3, 7);
+    }
+
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_PBT_NONUC_PKT)) {
+        data[1] |= (0x1 << 27);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_L3_NEXT_HOP)) {
+        data[1] |= (0x1 << 28);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MY_STATION)) {
+        data[1] |= (0x1 << 29);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_TIME_SYNC)) {
+        data[1] |= (0x1 << 30);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_TUNNEL_DECAP_ECN_ERROR)) {
+        data[1] |= (0x1 << 31);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_BFD_SLOWPATH)) {
+        data[0] |= (0x1 << 0);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_BFD_ERROR)) {
+        data[0] |= (0x1 << 1);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_PACKET_TRACE_TO_CPU)) {
+        data[0] |= (0x1 << 2);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_UNKNOWN_CONTROL_PKT)) {
+        data[0] |= (0x1 << 3);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_ALERT_LABEL)) {
+        data[0] |= (0x1 << 4);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_INTERFACE_MISMATCH)) {
+        data[0] |= (0x1 << 5);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_DLB_MONITOR)) {
+        data[0] |= (0x1 << 6);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_INT_TURN_AROUND)) {
+        data[0] |= (0x1 << 7);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_ETRAP_MONITOR)) {
+        data[0] |= (0x1 << 8);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_SRV6_ERROR)) {
+        data[0] |= (0x1 << 9);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_VXLAN_VN_ID_MISS)) {
+        data[0] |= (0x1 << 10);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_VXLAN_SIP_MISS)) {
+        data[0] |= (0x1 << 11);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_ADAPT_MISS)) {
+        data[0] |= (0x1 << 12);
+    }
+}
+
+void bcm56990_b0_rx_reason_decode(const uint32_t *data, bcmpkt_rx_reasons_t *reasons)
+{
+    uint32_t val;
+    COMPILER_REFERENCE(val);
+    if (data[1] & (0x1 << 0)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_UVLAN);
+    }
+    if (data[1] & (0x1 << 1)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_SLF);
+    }
+    if (data[1] & (0x1 << 2)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_DLF);
+    }
+    if (data[1] & (0x1 << 3)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L2MOVE);
+    }
+    if (data[1] & (0x1 << 4)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L2CPU);
+    }
+    if (data[1] & (0x1 << 5)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MISS);
+    }
+    if (data[1] & (0x1 << 6)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3DST_MISS);
+    }
+    if (data[1] & (0x1 << 7)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MOVE);
+    }
+    if (data[1] & (0x1 << 8)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_MC_MISS);
+    }
+    if (data[1] & (0x1 << 9)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_MISS);
+    }
+    if (data[1] & (0x1 << 10)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_FFP);
+    }
+    if (data[1] & (0x1 << 11)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3HDR_ERR);
+    }
+    if (data[1] & (0x1 << 12)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_PROTOCOL_PKT);
+    }
+    if (data[1] & (0x1 << 13)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_DOS_ATTACK);
+    }
+    if (data[1] & (0x1 << 14)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_MARTIAN_ADDR);
+    }
+    if (data[1] & (0x1 << 15)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_TUNNEL_ERR);
+    }
+
+    val = WORD_FIELD_GET(data[1], 16, 2);
+    if (val) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW);
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW + val);
+    }
+
+    if (data[1] & (0x1 << 18)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_ICMP_REDIRECT);
+    }
+    if (data[1] & (0x1 << 19)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_L3_SLOWPATH);
+    }
+    if (data[1] & (0x1 << 20)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_PARITY_ERROR);
+    }
+    if (data[1] & (0x1 << 21)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_L3_MTU_CHECK_FAIL);
+    }
+    if (data[1] & (0x1 << 22)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MCIDX_ERROR);
+    }
+    if (data[1] & (0x1 << 23)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_VFP);
+    }
+
+    val = WORD_FIELD_GET(data[1], 24, 3);
+    if (val) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR);
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR + val);
+    }
+
+    if (data[1] & (0x1 << 27)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_PBT_NONUC_PKT);
+    }
+    if (data[1] & (0x1 << 28)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_L3_NEXT_HOP);
+    }
+    if (data[1] & (0x1 << 29)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MY_STATION);
+    }
+    if (data[1] & (0x1 << 30)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_TIME_SYNC);
+    }
+    if (data[1] & (0x1 << 31)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_TUNNEL_DECAP_ECN_ERROR);
+    }
+    if (data[0] & (0x1 << 0)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_BFD_SLOWPATH);
+    }
+    if (data[0] & (0x1 << 1)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_BFD_ERROR);
+    }
+    if (data[0] & (0x1 << 2)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_PACKET_TRACE_TO_CPU);
+    }
+    if (data[0] & (0x1 << 3)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_UNKNOWN_CONTROL_PKT);
+    }
+    if (data[0] & (0x1 << 4)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_ALERT_LABEL);
+    }
+    if (data[0] & (0x1 << 5)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_INTERFACE_MISMATCH);
+    }
+    if (data[0] & (0x1 << 6)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_DLB_MONITOR);
+    }
+    if (data[0] & (0x1 << 7)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_INT_TURN_AROUND);
+    }
+    if (data[0] & (0x1 << 8)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_ETRAP_MONITOR);
+    }
+    if (data[0] & (0x1 << 9)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_SRV6_ERROR);
+    }
+    if (data[0] & (0x1 << 10)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_VXLAN_VN_ID_MISS);
+    }
+    if (data[0] & (0x1 << 11)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_VXLAN_SIP_MISS);
+    }
+    if (data[0] & (0x1 << 12)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_ADAPT_MISS);
+    }
+}
+
+void bcm56990_b0_ep_rx_reason_encode(const bcmpkt_rx_reasons_t *reasons, uint32_t *data)
+{
+}
+
+void bcm56990_b0_ep_rx_reason_decode(const uint32_t *data, bcmpkt_rx_reasons_t *reasons)
+{
+}
+
+const bcmpkt_rxpmd_fget_t bcm56990_b0_rxpmd_fget = {
+    {
+        bcmpkt_rxpmd_unicast_queue_get,
+        bcmpkt_rxpmd_queue_num_get,
+        bcmpkt_rxpmd_cpu_cos_get,
+        NULL,
+        bcmpkt_rxpmd_matched_rule_get,
+        bcmpkt_rxpmd_pkt_length_get,
+        bcmpkt_rxpmd_src_port_num_get,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_outer_vid_get,
+        bcmpkt_rxpmd_outer_cfi_get,
+        bcmpkt_rxpmd_outer_pri_get,
+        bcmpkt_rxpmd_special_packet_indicator_get,
+        bcmpkt_rxpmd_special_packet_type_get,
+        bcmpkt_rxpmd_change_dscp_get,
+        bcmpkt_rxpmd_dscp_get,
+        bcmpkt_rxpmd_change_ecn_get,
+        bcmpkt_rxpmd_ecn_get,
+        bcmpkt_rxpmd_timestamp_type_get,
+        bcmpkt_rxpmd_timestamp_get,
+        bcmpkt_rxpmd_timestamp_hi_get,
+        bcmpkt_rxpmd_mtp_index_get,
+        bcmpkt_rxpmd_bpdu_get,
+        NULL,
+        bcmpkt_rxpmd_l3only_get,
+        bcmpkt_rxpmd_ip_routed_get,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_uc_sw_copy_dropped_get,
+        bcmpkt_rxpmd_switch_get,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_ing_otag_action_get,
+        bcmpkt_rxpmd_ing_tag_type_get,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_rx_bfd_start_offset_get,
+        bcmpkt_rxpmd_rx_bfd_start_offset_type_get,
+        bcmpkt_rxpmd_rx_bfd_session_index_get,
+        bcmpkt_rxpmd_reason_type_get,
+        bcmpkt_rxpmd_do_not_change_ttl_get,
+        bcmpkt_rxpmd_i2e_classid_type_get,
+        bcmpkt_rxpmd_i2e_classid_get,
+        bcmpkt_rxpmd_ing_l3_intf_get,
+        NULL,
+        bcmpkt_rxpmd_regen_crc_get,
+        bcmpkt_rxpmd_entropy_label_get,
+        bcmpkt_rxpmd_tunnel_decap_type_get,
+        bcmpkt_rxpmd_dlb_id_valid_get,
+        bcmpkt_rxpmd_dlb_id_get,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_replication_or_nhop_index_get,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_incoming_int_hdr_type_get,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_ing_l3_intf_valid_get,
+        bcmpkt_rxpmd_o_nhi_get,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL
+    }
+};
+
+
+const bcmpkt_rxpmd_fset_t bcm56990_b0_rxpmd_fset = {
+    {
+        bcmpkt_rxpmd_unicast_queue_set,
+        bcmpkt_rxpmd_queue_num_set,
+        bcmpkt_rxpmd_cpu_cos_set,
+        NULL,
+        bcmpkt_rxpmd_matched_rule_set,
+        bcmpkt_rxpmd_pkt_length_set,
+        bcmpkt_rxpmd_src_port_num_set,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_outer_vid_set,
+        bcmpkt_rxpmd_outer_cfi_set,
+        bcmpkt_rxpmd_outer_pri_set,
+        bcmpkt_rxpmd_special_packet_indicator_set,
+        bcmpkt_rxpmd_special_packet_type_set,
+        bcmpkt_rxpmd_change_dscp_set,
+        bcmpkt_rxpmd_dscp_set,
+        bcmpkt_rxpmd_change_ecn_set,
+        bcmpkt_rxpmd_ecn_set,
+        bcmpkt_rxpmd_timestamp_type_set,
+        bcmpkt_rxpmd_timestamp_set,
+        bcmpkt_rxpmd_timestamp_hi_set,
+        bcmpkt_rxpmd_mtp_index_set,
+        bcmpkt_rxpmd_bpdu_set,
+        NULL,
+        bcmpkt_rxpmd_l3only_set,
+        bcmpkt_rxpmd_ip_routed_set,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_uc_sw_copy_dropped_set,
+        bcmpkt_rxpmd_switch_set,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_ing_otag_action_set,
+        bcmpkt_rxpmd_ing_tag_type_set,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_rx_bfd_start_offset_set,
+        bcmpkt_rxpmd_rx_bfd_start_offset_type_set,
+        bcmpkt_rxpmd_rx_bfd_session_index_set,
+        bcmpkt_rxpmd_reason_type_set,
+        bcmpkt_rxpmd_do_not_change_ttl_set,
+        bcmpkt_rxpmd_i2e_classid_type_set,
+        bcmpkt_rxpmd_i2e_classid_set,
+        bcmpkt_rxpmd_ing_l3_intf_set,
+        NULL,
+        bcmpkt_rxpmd_regen_crc_set,
+        bcmpkt_rxpmd_entropy_label_set,
+        bcmpkt_rxpmd_tunnel_decap_type_set,
+        bcmpkt_rxpmd_dlb_id_valid_set,
+        bcmpkt_rxpmd_dlb_id_set,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_replication_or_nhop_index_set,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_incoming_int_hdr_type_set,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_ing_l3_intf_valid_set,
+        bcmpkt_rxpmd_o_nhi_set,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL
+    }
+};
+
+
+const bcmpkt_rxpmd_figet_t bcm56990_b0_rxpmd_figet = {
+    {
+        bcmpkt_rxpmd_i_size_get,
+        bcmpkt_rxpmd_i_reason_get,
+        bcmpkt_rxpmd_i_module_hdr_get,
+        NULL
+    }
+};
+
+static shr_enum_map_t bcm56990_b0_rxpmd_view_types[] = {
+    {NULL, -1},
+};
+
+/* -2: unsupported, -1: global, others: view's value */
+static int bcm56990_b0_rxpmd_view_infos[BCMPKT_RXPMD_FID_COUNT] = {
+     -1, -1, -1, -2, -1, -1, -1, -2, -2, -2, -1, -1, -1, -1, -1, -1,
+     -1, -1, -1, -1, -1, -1, -1, -1, -2, -1, -1, -2, -2, -1, -1, -2,
+     -2, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1,
+     -1, -1, -1, -1, -1, -1, -1, -2, -1, -1, -1, -1, -1, -2, -2, -2,
+     -2, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, -2, -2, -2,
+     -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+};
+
+
+void bcm56990_b0_rxpmd_view_info_get(bcmpkt_pmd_view_info_t *info)
+{
+    info->view_infos = bcm56990_b0_rxpmd_view_infos;
+    info->view_types = bcm56990_b0_rxpmd_view_types;
+    info->view_type_get = NULL;
+}
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_b0/bcm56990_b0_pkt_txpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_b0/bcm56990_b0_pkt_txpmd.c
new file mode 100644
index 000000000..9546f63b3
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_b0/bcm56990_b0_pkt_txpmd.c
@@ -0,0 +1,526 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated from the registers file.
+ * Edits to this file will be lost when it is regenerated.
+ * Tool: INTERNAL/regs/xgs/generate-pmd.pl
+ *
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ *
+ * This file provides TXPMD access functions for BCM56990_B0.
+ *
+ ******************************************************************************/
+
+#include <sal/sal_types.h>
+#include <bcmpkt/bcmpkt_txpmd_internal.h>
+
+#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1)
+#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l))
+#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s)))
+#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s)))
+/*******************************************************************************
+ * SWFORMAT:  TXPMD
+ * BLOCKS:
+ * SIZE:     128
+ ******************************************************************************/
+static void bcmpkt_txpmd_start_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 30, 2, val);
+}
+
+static uint32_t bcmpkt_txpmd_start_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 30, 2);
+    return val;
+}
+
+static void bcmpkt_txpmd_header_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 24, 6, val);
+}
+
+static uint32_t bcmpkt_txpmd_header_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 24, 6);
+    return val;
+}
+
+static void bcmpkt_txpmd_pkt_length_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 10, 14, val);
+}
+
+static uint32_t bcmpkt_txpmd_pkt_length_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 10, 14);
+    return val;
+}
+
+static void bcmpkt_txpmd_ipcf_ptr_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 24, 8, val);
+}
+
+static uint32_t bcmpkt_txpmd_ipcf_ptr_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 24, 8);
+    return val;
+}
+
+static void bcmpkt_txpmd_sop_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 9, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_sop_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 9, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_eop_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 8, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_eop_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 8, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_cell_length_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 0, 8, val);
+}
+
+static uint32_t bcmpkt_txpmd_cell_length_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 0, 8);
+    return val;
+}
+
+static void bcmpkt_txpmd_cell_error_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 20, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_cell_error_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 20, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_local_dest_port_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 31, 1, val & MASK(1));
+    WORD_FIELD_SET(data[1], 0, 8, (val >> 1) & MASK(8));
+}
+
+static uint32_t bcmpkt_txpmd_local_dest_port_get(uint32_t *data)
+{
+    uint32_t val;
+    val = (WORD_FIELD_GET(data[2], 31, 1) | (WORD_FIELD_GET(data[1], 0, 8) << 1)) ;
+    return val;
+}
+
+static void bcmpkt_txpmd_src_modid_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 0, 8, val);
+}
+
+static uint32_t bcmpkt_txpmd_src_modid_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 0, 8);
+    return val;
+}
+
+static void bcmpkt_txpmd_cos_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 8, 6, val);
+}
+
+static uint32_t bcmpkt_txpmd_cos_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 8, 6);
+    return val;
+}
+
+static void bcmpkt_txpmd_input_pri_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 25, 4, val);
+}
+
+static uint32_t bcmpkt_txpmd_input_pri_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 25, 4);
+    return val;
+}
+
+static void bcmpkt_txpmd_unicast_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 14, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_unicast_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 14, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_rqe_q_num_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 16, 4, val);
+}
+
+static uint32_t bcmpkt_txpmd_rqe_q_num_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 16, 4);
+    return val;
+}
+
+static void bcmpkt_txpmd_set_l2bm_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 15, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_set_l2bm_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 15, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_ieee1588_one_step_enable_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 19, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_ieee1588_one_step_enable_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 19, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_ieee1588_regen_udp_checksum_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 18, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_ieee1588_regen_udp_checksum_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 18, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 17, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 17, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 8, 8, val);
+}
+
+static uint32_t bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 8, 8);
+    return val;
+}
+
+static void bcmpkt_txpmd_tx_ts_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 16, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_tx_ts_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 16, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_spid_override_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 24, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_spid_override_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 24, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_spid_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 22, 2, val);
+}
+
+static uint32_t bcmpkt_txpmd_spid_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 22, 2);
+    return val;
+}
+
+static void bcmpkt_txpmd_spap_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 20, 2, val);
+}
+
+static uint32_t bcmpkt_txpmd_spap_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 20, 2);
+    return val;
+}
+
+static uint32_t bcmpkt_txpmd_i_size_get(uint32_t *data, uint32_t **addr)
+{
+    return 4;
+}
+
+
+const bcmpkt_txpmd_fget_t bcm56990_b0_txpmd_fget = {
+    {
+        bcmpkt_txpmd_start_get,
+        bcmpkt_txpmd_header_type_get,
+        bcmpkt_txpmd_pkt_length_get,
+        bcmpkt_txpmd_ipcf_ptr_get,
+        bcmpkt_txpmd_sop_get,
+        bcmpkt_txpmd_eop_get,
+        bcmpkt_txpmd_cell_length_get,
+        bcmpkt_txpmd_cell_error_get,
+        bcmpkt_txpmd_local_dest_port_get,
+        bcmpkt_txpmd_src_modid_get,
+        bcmpkt_txpmd_cos_get,
+        bcmpkt_txpmd_input_pri_get,
+        bcmpkt_txpmd_unicast_get,
+        bcmpkt_txpmd_rqe_q_num_get,
+        bcmpkt_txpmd_set_l2bm_get,
+        bcmpkt_txpmd_ieee1588_one_step_enable_get,
+        bcmpkt_txpmd_ieee1588_regen_udp_checksum_get,
+        bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_get,
+        bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_get,
+        bcmpkt_txpmd_tx_ts_get,
+        bcmpkt_txpmd_spid_override_get,
+        bcmpkt_txpmd_spid_get,
+        bcmpkt_txpmd_spap_get,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL
+    }
+};
+
+
+const bcmpkt_txpmd_fset_t bcm56990_b0_txpmd_fset = {
+    {
+        bcmpkt_txpmd_start_set,
+        bcmpkt_txpmd_header_type_set,
+        bcmpkt_txpmd_pkt_length_set,
+        bcmpkt_txpmd_ipcf_ptr_set,
+        bcmpkt_txpmd_sop_set,
+        bcmpkt_txpmd_eop_set,
+        bcmpkt_txpmd_cell_length_set,
+        bcmpkt_txpmd_cell_error_set,
+        bcmpkt_txpmd_local_dest_port_set,
+        bcmpkt_txpmd_src_modid_set,
+        bcmpkt_txpmd_cos_set,
+        bcmpkt_txpmd_input_pri_set,
+        bcmpkt_txpmd_unicast_set,
+        bcmpkt_txpmd_rqe_q_num_set,
+        bcmpkt_txpmd_set_l2bm_set,
+        bcmpkt_txpmd_ieee1588_one_step_enable_set,
+        bcmpkt_txpmd_ieee1588_regen_udp_checksum_set,
+        bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_set,
+        bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_set,
+        bcmpkt_txpmd_tx_ts_set,
+        bcmpkt_txpmd_spid_override_set,
+        bcmpkt_txpmd_spid_set,
+        bcmpkt_txpmd_spap_set,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL
+    }
+};
+
+
+const bcmpkt_txpmd_figet_t bcm56990_b0_txpmd_figet = {
+    {
+        bcmpkt_txpmd_i_size_get
+    }
+};
+
+static shr_enum_map_t bcm56990_b0_txpmd_view_types[] = {
+    {NULL, -1},
+};
+
+/* -2: unsupported, -1: global, others: view's value */
+static int bcm56990_b0_txpmd_view_infos[BCMPKT_TXPMD_FID_COUNT] = {
+     -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
+     -1, -1, -1, -1, -1, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+     -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+     -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+     -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+     -2, -2, -2,
+};
+
+
+void bcm56990_b0_txpmd_view_info_get(bcmpkt_pmd_view_info_t *info)
+{
+    info->view_infos = bcm56990_b0_txpmd_view_infos;
+    info->view_types = bcm56990_b0_txpmd_view_types;
+    info->view_type_get = NULL;
+}
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_a0/bcm56996_a0_pkt_lbhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_a0/bcm56996_a0_pkt_lbhdr.c
new file mode 100644
index 000000000..45e0ec01d
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_a0/bcm56996_a0_pkt_lbhdr.c
@@ -0,0 +1,592 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated from the registers file.
+ * Edits to this file will be lost when it is regenerated.
+ * Tool: INTERNAL/regs/xgs/generate-pmd.pl
+ *
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ *
+ * This file provides LBHDR access functions for BCM56996_A0.
+ *
+ ******************************************************************************/
+
+#include <sal/sal_types.h>
+#include <bcmpkt/bcmpkt_lbhdr_internal.h>
+
+#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1)
+#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l))
+#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s)))
+#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s)))
+/*******************************************************************************
+ * SWFORMAT:  LBHDR
+ * BLOCKS:
+ * SIZE:     128
+ ******************************************************************************/
+static void bcmpkt_lbhdr_start_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 24, 8, val);
+}
+
+static uint32_t bcmpkt_lbhdr_start_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 24, 8);
+    return val;
+}
+
+static void bcmpkt_lbhdr_header_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 15, 5, val);
+}
+
+static uint32_t bcmpkt_lbhdr_header_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 15, 5);
+    return val;
+}
+
+static void bcmpkt_lbhdr_input_priority_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 20, 4, val);
+}
+
+static uint32_t bcmpkt_lbhdr_input_priority_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 20, 4);
+    return val;
+}
+
+static void bcmpkt_lbhdr_pkt_profile_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 26, 3, val);
+}
+
+static uint32_t bcmpkt_lbhdr_pkt_profile_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 26, 3);
+    return val;
+}
+
+static void bcmpkt_lbhdr_visibility_pkt_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 29, 1, val);
+}
+
+static uint32_t bcmpkt_lbhdr_visibility_pkt_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 29, 1);
+    return val;
+}
+
+static void bcmpkt_lbhdr_source_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 30, 2, val & MASK(2));
+    WORD_FIELD_SET(data[0], 0, 14, (val >> 2) & MASK(14));
+}
+
+static uint32_t bcmpkt_lbhdr_source_get(uint32_t *data)
+{
+    uint32_t val;
+    val = (WORD_FIELD_GET(data[1], 30, 2) | (WORD_FIELD_GET(data[0], 0, 14) << 2)) ;
+    return val;
+}
+
+static void bcmpkt_lbhdr_source_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 14, 1, val);
+}
+
+static uint32_t bcmpkt_lbhdr_source_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 14, 1);
+    return val;
+}
+
+static void bcmpkt_lbhdr_trill_ac_cng_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_AC) {
+        return;
+    }
+    WORD_FIELD_SET(data[3], 4, 2, val);
+}
+
+static uint32_t bcmpkt_lbhdr_trill_ac_cng_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_AC) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[3], 4, 2);
+    return val;
+}
+
+static void bcmpkt_lbhdr_trill_ac_tc_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_AC) {
+        return;
+    }
+    WORD_FIELD_SET(data[3], 0, 4, val);
+}
+
+static uint32_t bcmpkt_lbhdr_trill_ac_tc_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_AC) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[3], 0, 4);
+    return val;
+}
+
+static void bcmpkt_lbhdr_trill_nw_cng_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_NW) {
+        return;
+    }
+    WORD_FIELD_SET(data[3], 4, 2, val);
+}
+
+static uint32_t bcmpkt_lbhdr_trill_nw_cng_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_NW) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[3], 4, 2);
+    return val;
+}
+
+static void bcmpkt_lbhdr_trill_nw_tc_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_NW) {
+        return;
+    }
+    WORD_FIELD_SET(data[3], 0, 4, val);
+}
+
+static uint32_t bcmpkt_lbhdr_trill_nw_tc_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_NW) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[3], 0, 4);
+    return val;
+}
+
+static void bcmpkt_lbhdr_eth_dest_type_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return;
+    }
+    WORD_FIELD_SET(data[3], 11, 4, val);
+}
+
+static uint32_t bcmpkt_lbhdr_eth_dest_type_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[3], 11, 4);
+    return val;
+}
+
+static void bcmpkt_lbhdr_eth_dest_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return;
+    }
+    WORD_FIELD_SET(data[3], 15, 16, val);
+}
+
+static uint32_t bcmpkt_lbhdr_eth_dest_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[3], 15, 16);
+    return val;
+}
+
+static void bcmpkt_lbhdr_eth_dp_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 7, 2, val);
+}
+
+static uint32_t bcmpkt_lbhdr_eth_dp_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 7, 2);
+    return val;
+}
+
+static void bcmpkt_lbhdr_eth_ecmp_member_id_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 9, 14, val);
+}
+
+static uint32_t bcmpkt_lbhdr_eth_ecmp_member_id_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 9, 14);
+    return val;
+}
+
+static void bcmpkt_lbhdr_eth_int_cn_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 1, 2, val);
+}
+
+static uint32_t bcmpkt_lbhdr_eth_int_cn_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 1, 2);
+    return val;
+}
+
+static void bcmpkt_lbhdr_eth_int_pri_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 3, 4, val);
+}
+
+static uint32_t bcmpkt_lbhdr_eth_int_pri_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 3, 4);
+    return val;
+}
+
+static void bcmpkt_lbhdr_eth_mcast_lb_index_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return;
+    }
+    WORD_FIELD_SET(data[1], 6, 8, val);
+}
+
+static uint32_t bcmpkt_lbhdr_eth_mcast_lb_index_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[1], 6, 8);
+    return val;
+}
+
+static void bcmpkt_lbhdr_eth_mcast_lb_index_vld_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return;
+    }
+    WORD_FIELD_SET(data[1], 14, 1, val);
+}
+
+static uint32_t bcmpkt_lbhdr_eth_mcast_lb_index_vld_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[1], 14, 1);
+    return val;
+}
+
+static void bcmpkt_lbhdr_eth_pp_port_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return;
+    }
+    WORD_FIELD_SET(data[3], 0, 9, val);
+}
+
+static uint32_t bcmpkt_lbhdr_eth_pp_port_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[3], 0, 9);
+    return val;
+}
+
+static void bcmpkt_lbhdr_eth_qos_fields_vld_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 0, 1, val);
+}
+
+static uint32_t bcmpkt_lbhdr_eth_qos_fields_vld_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 0, 1);
+    return val;
+}
+
+static void bcmpkt_lbhdr_eth_routed_pkt_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return;
+    }
+    WORD_FIELD_SET(data[3], 31, 1, val);
+}
+
+static uint32_t bcmpkt_lbhdr_eth_routed_pkt_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[3], 31, 1);
+    return val;
+}
+
+static void bcmpkt_lbhdr_eth_subflow_type_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return;
+    }
+    WORD_FIELD_SET(data[3], 9, 2, val);
+}
+
+static uint32_t bcmpkt_lbhdr_eth_subflow_type_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[3], 9, 2);
+    return val;
+}
+
+static void bcmpkt_lbhdr_ethernet_vrf_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 23, 9, val & MASK(9));
+    WORD_FIELD_SET(data[1], 0, 4, (val >> 9) & MASK(4));
+}
+
+static uint32_t bcmpkt_lbhdr_ethernet_vrf_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return 0;
+    }
+    val = (WORD_FIELD_GET(data[2], 23, 9) | (WORD_FIELD_GET(data[1], 0, 4) << 9)) ;
+    return val;
+}
+
+static void bcmpkt_lbhdr_ethernet_vrf_valid_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return;
+    }
+    WORD_FIELD_SET(data[1], 4, 1, val);
+}
+
+static uint32_t bcmpkt_lbhdr_ethernet_vrf_valid_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[1], 4, 1);
+    return val;
+}
+
+static uint32_t bcmpkt_lbhdr_i_size_get(uint32_t *data, uint32_t **addr)
+{
+    return 4;
+}
+
+
+const bcmpkt_lbhdr_fget_t bcm56996_a0_lbhdr_fget = {
+    {
+        bcmpkt_lbhdr_start_get,
+        bcmpkt_lbhdr_header_type_get,
+        bcmpkt_lbhdr_input_priority_get,
+        bcmpkt_lbhdr_pkt_profile_get,
+        bcmpkt_lbhdr_visibility_pkt_get,
+        bcmpkt_lbhdr_source_get,
+        bcmpkt_lbhdr_source_type_get,
+        bcmpkt_lbhdr_trill_ac_cng_get,
+        bcmpkt_lbhdr_trill_ac_tc_get,
+        NULL,
+        bcmpkt_lbhdr_trill_nw_cng_get,
+        bcmpkt_lbhdr_trill_nw_tc_get,
+        bcmpkt_lbhdr_eth_dest_type_get,
+        bcmpkt_lbhdr_eth_dest_get,
+        bcmpkt_lbhdr_eth_dp_get,
+        bcmpkt_lbhdr_eth_ecmp_member_id_get,
+        bcmpkt_lbhdr_eth_int_cn_get,
+        bcmpkt_lbhdr_eth_int_pri_get,
+        bcmpkt_lbhdr_eth_mcast_lb_index_get,
+        bcmpkt_lbhdr_eth_mcast_lb_index_vld_get,
+        bcmpkt_lbhdr_eth_pp_port_get,
+        bcmpkt_lbhdr_eth_qos_fields_vld_get,
+        bcmpkt_lbhdr_eth_routed_pkt_get,
+        bcmpkt_lbhdr_eth_subflow_type_get,
+        bcmpkt_lbhdr_ethernet_vrf_get,
+        bcmpkt_lbhdr_ethernet_vrf_valid_get,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL
+    }
+};
+
+
+const bcmpkt_lbhdr_fset_t bcm56996_a0_lbhdr_fset = {
+    {
+        bcmpkt_lbhdr_start_set,
+        bcmpkt_lbhdr_header_type_set,
+        bcmpkt_lbhdr_input_priority_set,
+        bcmpkt_lbhdr_pkt_profile_set,
+        bcmpkt_lbhdr_visibility_pkt_set,
+        bcmpkt_lbhdr_source_set,
+        bcmpkt_lbhdr_source_type_set,
+        bcmpkt_lbhdr_trill_ac_cng_set,
+        bcmpkt_lbhdr_trill_ac_tc_set,
+        NULL,
+        bcmpkt_lbhdr_trill_nw_cng_set,
+        bcmpkt_lbhdr_trill_nw_tc_set,
+        bcmpkt_lbhdr_eth_dest_type_set,
+        bcmpkt_lbhdr_eth_dest_set,
+        bcmpkt_lbhdr_eth_dp_set,
+        bcmpkt_lbhdr_eth_ecmp_member_id_set,
+        bcmpkt_lbhdr_eth_int_cn_set,
+        bcmpkt_lbhdr_eth_int_pri_set,
+        bcmpkt_lbhdr_eth_mcast_lb_index_set,
+        bcmpkt_lbhdr_eth_mcast_lb_index_vld_set,
+        bcmpkt_lbhdr_eth_pp_port_set,
+        bcmpkt_lbhdr_eth_qos_fields_vld_set,
+        bcmpkt_lbhdr_eth_routed_pkt_set,
+        bcmpkt_lbhdr_eth_subflow_type_set,
+        bcmpkt_lbhdr_ethernet_vrf_set,
+        bcmpkt_lbhdr_ethernet_vrf_valid_set,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL
+    }
+};
+
+
+const bcmpkt_lbhdr_figet_t bcm56996_a0_lbhdr_figet = {
+    {
+        bcmpkt_lbhdr_i_size_get
+    }
+};
+
+static shr_enum_map_t bcm56996_a0_lbhdr_view_types[] = {
+    {"trill_nw", 1},
+    {"trill_ac", 2},
+    {"ethernet", 3},
+    {NULL, -1},
+};
+
+/* -2: unsupported, -1: global, others: view's value */
+static int bcm56996_a0_lbhdr_view_infos[BCMPKT_LBHDR_FID_COUNT] = {
+     -1, -1, -1, -1, -1, -1, -1,  2,  2, -2,  1,  1,  3,  3,  3,  3,
+      3,  3,  3,  3,  3,  3,  3,  3,  3,  3, -2, -2, -2, -2, -2, -2,
+     -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+     -2,
+};
+
+
+void bcm56996_a0_lbhdr_view_info_get(bcmpkt_pmd_view_info_t *info)
+{
+    info->view_infos = bcm56996_a0_lbhdr_view_infos;
+    info->view_types = bcm56996_a0_lbhdr_view_types;
+    info->view_type_get = bcmpkt_lbhdr_header_type_get;
+}
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_a0/bcm56996_a0_pkt_rxpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_a0/bcm56996_a0_pkt_rxpmd.c
new file mode 100644
index 000000000..6eac53c8c
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_a0/bcm56996_a0_pkt_rxpmd.c
@@ -0,0 +1,1110 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated from the registers file.
+ * Edits to this file will be lost when it is regenerated.
+ * Tool: INTERNAL/regs/xgs/generate-pmd.pl
+ *
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ *
+ * This file provides RXPMD access functions for BCM56996_A0.
+ *
+ ******************************************************************************/
+
+#include <sal/sal_types.h>
+#include <bcmpkt/bcmpkt_rxpmd.h>
+#include <bcmpkt/bcmpkt_rxpmd_internal.h>
+
+#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1)
+#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l))
+#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s)))
+#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s)))
+/*******************************************************************************
+ * SWFORMAT:  RXPMD
+ * BLOCKS:
+ * SIZE:     416
+ ******************************************************************************/
+static void bcmpkt_rxpmd_unicast_queue_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[4], 24, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_unicast_queue_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[4], 24, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_queue_num_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[12], 22, 6, val);
+}
+
+static uint32_t bcmpkt_rxpmd_queue_num_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[12], 22, 6);
+    return val;
+}
+
+static void bcmpkt_rxpmd_cpu_cos_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[12], 22, 6, val);
+}
+
+static uint32_t bcmpkt_rxpmd_cpu_cos_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[12], 22, 6);
+    return val;
+}
+
+static void bcmpkt_rxpmd_matched_rule_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[8], 3, 8, val);
+}
+
+static uint32_t bcmpkt_rxpmd_matched_rule_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[8], 3, 8);
+    return val;
+}
+
+static void bcmpkt_rxpmd_pkt_length_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[7], 0, 14, val);
+}
+
+static uint32_t bcmpkt_rxpmd_pkt_length_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[7], 0, 14);
+    return val;
+}
+
+static void bcmpkt_rxpmd_src_port_num_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[6], 22, 9, val);
+}
+
+static uint32_t bcmpkt_rxpmd_src_port_num_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[6], 22, 9);
+    return val;
+}
+
+static void bcmpkt_rxpmd_outer_vid_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[8], 18, 12, val);
+}
+
+static uint32_t bcmpkt_rxpmd_outer_vid_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[8], 18, 12);
+    return val;
+}
+
+static void bcmpkt_rxpmd_outer_cfi_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[8], 14, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_outer_cfi_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[8], 14, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_outer_pri_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[8], 15, 3, val);
+}
+
+static uint32_t bcmpkt_rxpmd_outer_pri_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[8], 15, 3);
+    return val;
+}
+
+static void bcmpkt_rxpmd_special_packet_indicator_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[6], 21, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_special_packet_indicator_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[6], 21, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_special_packet_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[9], 5, 3, val);
+}
+
+static uint32_t bcmpkt_rxpmd_special_packet_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[9], 5, 3);
+    return val;
+}
+
+static void bcmpkt_rxpmd_change_dscp_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[12], 29, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_change_dscp_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[12], 29, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_dscp_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[9], 5, 6, val);
+}
+
+static uint32_t bcmpkt_rxpmd_dscp_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[9], 5, 6);
+    return val;
+}
+
+static void bcmpkt_rxpmd_change_ecn_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[12], 30, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_change_ecn_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[12], 30, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_ecn_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[9], 11, 2, val);
+}
+
+static uint32_t bcmpkt_rxpmd_ecn_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[9], 11, 2);
+    return val;
+}
+
+static void bcmpkt_rxpmd_timestamp_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[4], 16, 2, val);
+}
+
+static uint32_t bcmpkt_rxpmd_timestamp_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[4], 16, 2);
+    return val;
+}
+
+static void bcmpkt_rxpmd_timestamp_set(uint32_t *data, uint32_t val)
+{
+    data[5] = val;
+}
+
+static uint32_t bcmpkt_rxpmd_timestamp_get(uint32_t *data)
+{
+    uint32_t val;
+    val = data[5];
+    return val;
+}
+
+static void bcmpkt_rxpmd_timestamp_hi_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[4], 0, 16, val);
+}
+
+static uint32_t bcmpkt_rxpmd_timestamp_hi_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[4], 0, 16);
+    return val;
+}
+
+static void bcmpkt_rxpmd_mtp_index_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[8], 11, 3, val);
+}
+
+static uint32_t bcmpkt_rxpmd_mtp_index_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[8], 11, 3);
+    return val;
+}
+
+static void bcmpkt_rxpmd_bpdu_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[12], 28, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_bpdu_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[12], 28, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_l3only_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[8], 2, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_l3only_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[8], 2, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_ip_routed_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[8], 1, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_ip_routed_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[8], 1, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_uc_sw_copy_dropped_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[4], 23, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_uc_sw_copy_dropped_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[4], 23, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_switch_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[6], 31, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_switch_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[6], 31, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_ing_otag_action_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[9], 30, 2, val);
+}
+
+static uint32_t bcmpkt_rxpmd_ing_otag_action_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[9], 30, 2);
+    return val;
+}
+
+static void bcmpkt_rxpmd_ing_tag_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[9], 13, 2, val);
+}
+
+static uint32_t bcmpkt_rxpmd_ing_tag_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[9], 13, 2);
+    return val;
+}
+
+static void bcmpkt_rxpmd_rx_bfd_start_offset_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[12], 14, 8, val);
+}
+
+static uint32_t bcmpkt_rxpmd_rx_bfd_start_offset_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[12], 14, 8);
+    return val;
+}
+
+static void bcmpkt_rxpmd_rx_bfd_start_offset_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[12], 12, 2, val);
+}
+
+static uint32_t bcmpkt_rxpmd_rx_bfd_start_offset_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[12], 12, 2);
+    return val;
+}
+
+static void bcmpkt_rxpmd_rx_bfd_session_index_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[12], 0, 12, val);
+}
+
+static uint32_t bcmpkt_rxpmd_rx_bfd_session_index_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[12], 0, 12);
+    return val;
+}
+
+static void bcmpkt_rxpmd_reason_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[9], 0, 4, val);
+}
+
+static uint32_t bcmpkt_rxpmd_reason_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[9], 0, 4);
+    return val;
+}
+
+static void bcmpkt_rxpmd_do_not_change_ttl_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[9], 4, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_do_not_change_ttl_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[9], 4, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_i2e_classid_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[12], 12, 4, val);
+}
+
+static uint32_t bcmpkt_rxpmd_i2e_classid_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[12], 12, 4);
+    return val;
+}
+
+static void bcmpkt_rxpmd_i2e_classid_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[12], 0, 12, val);
+}
+
+static uint32_t bcmpkt_rxpmd_i2e_classid_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[12], 0, 12);
+    return val;
+}
+
+static void bcmpkt_rxpmd_ing_l3_intf_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[12], 0, 13, val);
+}
+
+static uint32_t bcmpkt_rxpmd_ing_l3_intf_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[12], 0, 13);
+    return val;
+}
+
+static void bcmpkt_rxpmd_regen_crc_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[7], 14, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_regen_crc_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[7], 14, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_entropy_label_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[6], 1, 20, val);
+}
+
+static uint32_t bcmpkt_rxpmd_entropy_label_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[6], 1, 20);
+    return val;
+}
+
+static void bcmpkt_rxpmd_tunnel_decap_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[4], 18, 5, val);
+}
+
+static uint32_t bcmpkt_rxpmd_tunnel_decap_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[4], 18, 5);
+    return val;
+}
+
+static void bcmpkt_rxpmd_dlb_id_valid_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[12], 31, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_dlb_id_valid_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[12], 31, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_dlb_id_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[4], 25, 7, val);
+}
+
+static uint32_t bcmpkt_rxpmd_dlb_id_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[4], 25, 7);
+    return val;
+}
+
+static void bcmpkt_rxpmd_replication_or_nhop_index_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[7], 15, 17, val);
+}
+
+static uint32_t bcmpkt_rxpmd_replication_or_nhop_index_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[7], 15, 17);
+    return val;
+}
+
+static void bcmpkt_rxpmd_incoming_int_hdr_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[8], 30, 2, val);
+}
+
+static uint32_t bcmpkt_rxpmd_incoming_int_hdr_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[8], 30, 2);
+    return val;
+}
+
+static void bcmpkt_rxpmd_ing_l3_intf_valid_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[12], 16, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_ing_l3_intf_valid_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[12], 16, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_o_nhi_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[9], 15, 15, val);
+}
+
+static uint32_t bcmpkt_rxpmd_o_nhi_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[9], 15, 15);
+    return val;
+}
+
+static uint32_t bcmpkt_rxpmd_i_size_get(uint32_t *data, uint32_t **addr)
+{
+    return 13;
+}
+
+static uint32_t bcmpkt_rxpmd_i_reason_get(uint32_t *data, uint32_t **addr)
+{
+    *addr = data + 10;
+    return 2;
+}
+
+static uint32_t bcmpkt_rxpmd_i_module_hdr_get(uint32_t *data, uint32_t **addr)
+{
+    *addr = data + 0;
+    return 4;
+}
+
+/*******************************************************************************
+ * SWFORMAT:  RX_REASON
+ * BLOCKS:
+ * SIZE:     45
+ ******************************************************************************/
+void bcm56996_a0_rx_reason_encode(const bcmpkt_rx_reasons_t *reasons, uint32_t *data)
+{
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_UVLAN)) {
+        data[1] |= (0x1 << 0);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SLF)) {
+        data[1] |= (0x1 << 1);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_DLF)) {
+        data[1] |= (0x1 << 2);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L2MOVE)) {
+        data[1] |= (0x1 << 3);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L2CPU)) {
+        data[1] |= (0x1 << 4);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MISS)) {
+        data[1] |= (0x1 << 5);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3DST_MISS)) {
+        data[1] |= (0x1 << 6);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MOVE)) {
+        data[1] |= (0x1 << 7);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_MC_MISS)) {
+        data[1] |= (0x1 << 8);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_MISS)) {
+        data[1] |= (0x1 << 9);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_FFP)) {
+        data[1] |= (0x1 << 10);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3HDR_ERR)) {
+        data[1] |= (0x1 << 11);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_PROTOCOL_PKT)) {
+        data[1] |= (0x1 << 12);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_DOS_ATTACK)) {
+        data[1] |= (0x1 << 13);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_MARTIAN_ADDR)) {
+        data[1] |= (0x1 << 14);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_TUNNEL_ERR)) {
+        data[1] |= (0x1 << 15);
+    }
+
+    if (BCMPKT_RX_REASON_GET(*reasons,  BCMPKT_RX_REASON_CPU_SFLOW_CPU_SFLOW_FLEX)) {
+        WORD_FIELD_SET(data[1], 16, 2, 1);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons,  BCMPKT_RX_REASON_CPU_SFLOW_CPU_SFLOW_DST)) {
+        WORD_FIELD_SET(data[1], 16, 2, 2);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons,  BCMPKT_RX_REASON_CPU_SFLOW_CPU_SFLOW_SRC)) {
+        WORD_FIELD_SET(data[1], 16, 2, 3);
+    }
+    /*! For mask set ONLY. */
+    if (BCMPKT_RX_REASON_GET(*reasons,  BCMPKT_RX_REASON_CPU_SFLOW)) {
+        WORD_FIELD_SET(data[1], 16, 2, 3);
+    }
+
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_ICMP_REDIRECT)) {
+        data[1] |= (0x1 << 18);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_L3_SLOWPATH)) {
+        data[1] |= (0x1 << 19);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_PARITY_ERROR)) {
+        data[1] |= (0x1 << 20);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_L3_MTU_CHECK_FAIL)) {
+        data[1] |= (0x1 << 21);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MCIDX_ERROR)) {
+        data[1] |= (0x1 << 22);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_VFP)) {
+        data[1] |= (0x1 << 23);
+    }
+
+    if (BCMPKT_RX_REASON_GET(*reasons,  BCMPKT_RX_REASON_MPLS_PROC_ERROR_INVALID_PAYLOAD)) {
+        WORD_FIELD_SET(data[1], 24, 3, 1);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons,  BCMPKT_RX_REASON_MPLS_PROC_ERROR_INVALID_ACTION)) {
+        WORD_FIELD_SET(data[1], 24, 3, 2);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons,  BCMPKT_RX_REASON_MPLS_PROC_ERROR_LABEL_MISS)) {
+        WORD_FIELD_SET(data[1], 24, 3, 3);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons,  BCMPKT_RX_REASON_MPLS_PROC_ERROR_TTL_CHECK_FAIL)) {
+        WORD_FIELD_SET(data[1], 24, 3, 4);
+    }
+    /*! For mask set ONLY. */
+    if (BCMPKT_RX_REASON_GET(*reasons,  BCMPKT_RX_REASON_MPLS_PROC_ERROR)) {
+        WORD_FIELD_SET(data[1], 24, 3, 7);
+    }
+
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_PBT_NONUC_PKT)) {
+        data[1] |= (0x1 << 27);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_L3_NEXT_HOP)) {
+        data[1] |= (0x1 << 28);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MY_STATION)) {
+        data[1] |= (0x1 << 29);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_TIME_SYNC)) {
+        data[1] |= (0x1 << 30);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_TUNNEL_DECAP_ECN_ERROR)) {
+        data[1] |= (0x1 << 31);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_BFD_SLOWPATH)) {
+        data[0] |= (0x1 << 0);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_BFD_ERROR)) {
+        data[0] |= (0x1 << 1);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_PACKET_TRACE_TO_CPU)) {
+        data[0] |= (0x1 << 2);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_UNKNOWN_CONTROL_PKT)) {
+        data[0] |= (0x1 << 3);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_ALERT_LABEL)) {
+        data[0] |= (0x1 << 4);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_INTERFACE_MISMATCH)) {
+        data[0] |= (0x1 << 5);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_DLB_MONITOR)) {
+        data[0] |= (0x1 << 6);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_INT_TURN_AROUND)) {
+        data[0] |= (0x1 << 7);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_ETRAP_MONITOR)) {
+        data[0] |= (0x1 << 8);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_SRV6_ERROR)) {
+        data[0] |= (0x1 << 9);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_VXLAN_VN_ID_MISS)) {
+        data[0] |= (0x1 << 10);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_VXLAN_SIP_MISS)) {
+        data[0] |= (0x1 << 11);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_ADAPT_MISS)) {
+        data[0] |= (0x1 << 12);
+    }
+}
+
+void bcm56996_a0_rx_reason_decode(const uint32_t *data, bcmpkt_rx_reasons_t *reasons)
+{
+    uint32_t val;
+    COMPILER_REFERENCE(val);
+    if (data[1] & (0x1 << 0)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_UVLAN);
+    }
+    if (data[1] & (0x1 << 1)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_SLF);
+    }
+    if (data[1] & (0x1 << 2)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_DLF);
+    }
+    if (data[1] & (0x1 << 3)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L2MOVE);
+    }
+    if (data[1] & (0x1 << 4)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L2CPU);
+    }
+    if (data[1] & (0x1 << 5)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MISS);
+    }
+    if (data[1] & (0x1 << 6)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3DST_MISS);
+    }
+    if (data[1] & (0x1 << 7)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MOVE);
+    }
+    if (data[1] & (0x1 << 8)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_MC_MISS);
+    }
+    if (data[1] & (0x1 << 9)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_MISS);
+    }
+    if (data[1] & (0x1 << 10)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_FFP);
+    }
+    if (data[1] & (0x1 << 11)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3HDR_ERR);
+    }
+    if (data[1] & (0x1 << 12)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_PROTOCOL_PKT);
+    }
+    if (data[1] & (0x1 << 13)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_DOS_ATTACK);
+    }
+    if (data[1] & (0x1 << 14)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_MARTIAN_ADDR);
+    }
+    if (data[1] & (0x1 << 15)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_TUNNEL_ERR);
+    }
+
+    val = WORD_FIELD_GET(data[1], 16, 2);
+    if (val) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW);
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW + val);
+    }
+
+    if (data[1] & (0x1 << 18)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_ICMP_REDIRECT);
+    }
+    if (data[1] & (0x1 << 19)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_L3_SLOWPATH);
+    }
+    if (data[1] & (0x1 << 20)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_PARITY_ERROR);
+    }
+    if (data[1] & (0x1 << 21)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_L3_MTU_CHECK_FAIL);
+    }
+    if (data[1] & (0x1 << 22)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MCIDX_ERROR);
+    }
+    if (data[1] & (0x1 << 23)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_VFP);
+    }
+
+    val = WORD_FIELD_GET(data[1], 24, 3);
+    if (val) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR);
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR + val);
+    }
+
+    if (data[1] & (0x1 << 27)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_PBT_NONUC_PKT);
+    }
+    if (data[1] & (0x1 << 28)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_L3_NEXT_HOP);
+    }
+    if (data[1] & (0x1 << 29)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MY_STATION);
+    }
+    if (data[1] & (0x1 << 30)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_TIME_SYNC);
+    }
+    if (data[1] & (0x1 << 31)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_TUNNEL_DECAP_ECN_ERROR);
+    }
+    if (data[0] & (0x1 << 0)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_BFD_SLOWPATH);
+    }
+    if (data[0] & (0x1 << 1)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_BFD_ERROR);
+    }
+    if (data[0] & (0x1 << 2)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_PACKET_TRACE_TO_CPU);
+    }
+    if (data[0] & (0x1 << 3)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_UNKNOWN_CONTROL_PKT);
+    }
+    if (data[0] & (0x1 << 4)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_ALERT_LABEL);
+    }
+    if (data[0] & (0x1 << 5)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_INTERFACE_MISMATCH);
+    }
+    if (data[0] & (0x1 << 6)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_DLB_MONITOR);
+    }
+    if (data[0] & (0x1 << 7)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_INT_TURN_AROUND);
+    }
+    if (data[0] & (0x1 << 8)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_ETRAP_MONITOR);
+    }
+    if (data[0] & (0x1 << 9)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_SRV6_ERROR);
+    }
+    if (data[0] & (0x1 << 10)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_VXLAN_VN_ID_MISS);
+    }
+    if (data[0] & (0x1 << 11)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_VXLAN_SIP_MISS);
+    }
+    if (data[0] & (0x1 << 12)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_ADAPT_MISS);
+    }
+}
+
+void bcm56996_a0_ep_rx_reason_encode(const bcmpkt_rx_reasons_t *reasons, uint32_t *data)
+{
+}
+
+void bcm56996_a0_ep_rx_reason_decode(const uint32_t *data, bcmpkt_rx_reasons_t *reasons)
+{
+}
+
+const bcmpkt_rxpmd_fget_t bcm56996_a0_rxpmd_fget = {
+    {
+        bcmpkt_rxpmd_unicast_queue_get,
+        bcmpkt_rxpmd_queue_num_get,
+        bcmpkt_rxpmd_cpu_cos_get,
+        NULL,
+        bcmpkt_rxpmd_matched_rule_get,
+        bcmpkt_rxpmd_pkt_length_get,
+        bcmpkt_rxpmd_src_port_num_get,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_outer_vid_get,
+        bcmpkt_rxpmd_outer_cfi_get,
+        bcmpkt_rxpmd_outer_pri_get,
+        bcmpkt_rxpmd_special_packet_indicator_get,
+        bcmpkt_rxpmd_special_packet_type_get,
+        bcmpkt_rxpmd_change_dscp_get,
+        bcmpkt_rxpmd_dscp_get,
+        bcmpkt_rxpmd_change_ecn_get,
+        bcmpkt_rxpmd_ecn_get,
+        bcmpkt_rxpmd_timestamp_type_get,
+        bcmpkt_rxpmd_timestamp_get,
+        bcmpkt_rxpmd_timestamp_hi_get,
+        bcmpkt_rxpmd_mtp_index_get,
+        bcmpkt_rxpmd_bpdu_get,
+        NULL,
+        bcmpkt_rxpmd_l3only_get,
+        bcmpkt_rxpmd_ip_routed_get,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_uc_sw_copy_dropped_get,
+        bcmpkt_rxpmd_switch_get,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_ing_otag_action_get,
+        bcmpkt_rxpmd_ing_tag_type_get,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_rx_bfd_start_offset_get,
+        bcmpkt_rxpmd_rx_bfd_start_offset_type_get,
+        bcmpkt_rxpmd_rx_bfd_session_index_get,
+        bcmpkt_rxpmd_reason_type_get,
+        bcmpkt_rxpmd_do_not_change_ttl_get,
+        bcmpkt_rxpmd_i2e_classid_type_get,
+        bcmpkt_rxpmd_i2e_classid_get,
+        bcmpkt_rxpmd_ing_l3_intf_get,
+        NULL,
+        bcmpkt_rxpmd_regen_crc_get,
+        bcmpkt_rxpmd_entropy_label_get,
+        bcmpkt_rxpmd_tunnel_decap_type_get,
+        bcmpkt_rxpmd_dlb_id_valid_get,
+        bcmpkt_rxpmd_dlb_id_get,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_replication_or_nhop_index_get,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_incoming_int_hdr_type_get,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_ing_l3_intf_valid_get,
+        bcmpkt_rxpmd_o_nhi_get,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL
+    }
+};
+
+
+const bcmpkt_rxpmd_fset_t bcm56996_a0_rxpmd_fset = {
+    {
+        bcmpkt_rxpmd_unicast_queue_set,
+        bcmpkt_rxpmd_queue_num_set,
+        bcmpkt_rxpmd_cpu_cos_set,
+        NULL,
+        bcmpkt_rxpmd_matched_rule_set,
+        bcmpkt_rxpmd_pkt_length_set,
+        bcmpkt_rxpmd_src_port_num_set,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_outer_vid_set,
+        bcmpkt_rxpmd_outer_cfi_set,
+        bcmpkt_rxpmd_outer_pri_set,
+        bcmpkt_rxpmd_special_packet_indicator_set,
+        bcmpkt_rxpmd_special_packet_type_set,
+        bcmpkt_rxpmd_change_dscp_set,
+        bcmpkt_rxpmd_dscp_set,
+        bcmpkt_rxpmd_change_ecn_set,
+        bcmpkt_rxpmd_ecn_set,
+        bcmpkt_rxpmd_timestamp_type_set,
+        bcmpkt_rxpmd_timestamp_set,
+        bcmpkt_rxpmd_timestamp_hi_set,
+        bcmpkt_rxpmd_mtp_index_set,
+        bcmpkt_rxpmd_bpdu_set,
+        NULL,
+        bcmpkt_rxpmd_l3only_set,
+        bcmpkt_rxpmd_ip_routed_set,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_uc_sw_copy_dropped_set,
+        bcmpkt_rxpmd_switch_set,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_ing_otag_action_set,
+        bcmpkt_rxpmd_ing_tag_type_set,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_rx_bfd_start_offset_set,
+        bcmpkt_rxpmd_rx_bfd_start_offset_type_set,
+        bcmpkt_rxpmd_rx_bfd_session_index_set,
+        bcmpkt_rxpmd_reason_type_set,
+        bcmpkt_rxpmd_do_not_change_ttl_set,
+        bcmpkt_rxpmd_i2e_classid_type_set,
+        bcmpkt_rxpmd_i2e_classid_set,
+        bcmpkt_rxpmd_ing_l3_intf_set,
+        NULL,
+        bcmpkt_rxpmd_regen_crc_set,
+        bcmpkt_rxpmd_entropy_label_set,
+        bcmpkt_rxpmd_tunnel_decap_type_set,
+        bcmpkt_rxpmd_dlb_id_valid_set,
+        bcmpkt_rxpmd_dlb_id_set,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_replication_or_nhop_index_set,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_incoming_int_hdr_type_set,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_ing_l3_intf_valid_set,
+        bcmpkt_rxpmd_o_nhi_set,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL
+    }
+};
+
+
+const bcmpkt_rxpmd_figet_t bcm56996_a0_rxpmd_figet = {
+    {
+        bcmpkt_rxpmd_i_size_get,
+        bcmpkt_rxpmd_i_reason_get,
+        bcmpkt_rxpmd_i_module_hdr_get,
+        NULL
+    }
+};
+
+static shr_enum_map_t bcm56996_a0_rxpmd_view_types[] = {
+    {NULL, -1},
+};
+
+/* -2: unsupported, -1: global, others: view's value */
+static int bcm56996_a0_rxpmd_view_infos[BCMPKT_RXPMD_FID_COUNT] = {
+     -1, -1, -1, -2, -1, -1, -1, -2, -2, -2, -1, -1, -1, -1, -1, -1,
+     -1, -1, -1, -1, -1, -1, -1, -1, -2, -1, -1, -2, -2, -1, -1, -2,
+     -2, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1,
+     -1, -1, -1, -1, -1, -1, -1, -2, -1, -1, -1, -1, -1, -2, -2, -2,
+     -2, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, -2, -2, -2,
+     -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+};
+
+
+void bcm56996_a0_rxpmd_view_info_get(bcmpkt_pmd_view_info_t *info)
+{
+    info->view_infos = bcm56996_a0_rxpmd_view_infos;
+    info->view_types = bcm56996_a0_rxpmd_view_types;
+    info->view_type_get = NULL;
+}
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_a0/bcm56996_a0_pkt_txpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_a0/bcm56996_a0_pkt_txpmd.c
new file mode 100644
index 000000000..57a9aa16f
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_a0/bcm56996_a0_pkt_txpmd.c
@@ -0,0 +1,526 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated from the registers file.
+ * Edits to this file will be lost when it is regenerated.
+ * Tool: INTERNAL/regs/xgs/generate-pmd.pl
+ *
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ *
+ * This file provides TXPMD access functions for BCM56996_A0.
+ *
+ ******************************************************************************/
+
+#include <sal/sal_types.h>
+#include <bcmpkt/bcmpkt_txpmd_internal.h>
+
+#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1)
+#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l))
+#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s)))
+#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s)))
+/*******************************************************************************
+ * SWFORMAT:  TXPMD
+ * BLOCKS:
+ * SIZE:     128
+ ******************************************************************************/
+static void bcmpkt_txpmd_start_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 30, 2, val);
+}
+
+static uint32_t bcmpkt_txpmd_start_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 30, 2);
+    return val;
+}
+
+static void bcmpkt_txpmd_header_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 24, 6, val);
+}
+
+static uint32_t bcmpkt_txpmd_header_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 24, 6);
+    return val;
+}
+
+static void bcmpkt_txpmd_pkt_length_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 10, 14, val);
+}
+
+static uint32_t bcmpkt_txpmd_pkt_length_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 10, 14);
+    return val;
+}
+
+static void bcmpkt_txpmd_ipcf_ptr_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 24, 8, val);
+}
+
+static uint32_t bcmpkt_txpmd_ipcf_ptr_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 24, 8);
+    return val;
+}
+
+static void bcmpkt_txpmd_sop_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 9, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_sop_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 9, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_eop_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 8, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_eop_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 8, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_cell_length_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 0, 8, val);
+}
+
+static uint32_t bcmpkt_txpmd_cell_length_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 0, 8);
+    return val;
+}
+
+static void bcmpkt_txpmd_cell_error_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 20, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_cell_error_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 20, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_local_dest_port_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 31, 1, val & MASK(1));
+    WORD_FIELD_SET(data[1], 0, 8, (val >> 1) & MASK(8));
+}
+
+static uint32_t bcmpkt_txpmd_local_dest_port_get(uint32_t *data)
+{
+    uint32_t val;
+    val = (WORD_FIELD_GET(data[2], 31, 1) | (WORD_FIELD_GET(data[1], 0, 8) << 1)) ;
+    return val;
+}
+
+static void bcmpkt_txpmd_src_modid_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 0, 8, val);
+}
+
+static uint32_t bcmpkt_txpmd_src_modid_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 0, 8);
+    return val;
+}
+
+static void bcmpkt_txpmd_cos_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 8, 6, val);
+}
+
+static uint32_t bcmpkt_txpmd_cos_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 8, 6);
+    return val;
+}
+
+static void bcmpkt_txpmd_input_pri_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 25, 4, val);
+}
+
+static uint32_t bcmpkt_txpmd_input_pri_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 25, 4);
+    return val;
+}
+
+static void bcmpkt_txpmd_unicast_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 14, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_unicast_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 14, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_rqe_q_num_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 16, 4, val);
+}
+
+static uint32_t bcmpkt_txpmd_rqe_q_num_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 16, 4);
+    return val;
+}
+
+static void bcmpkt_txpmd_set_l2bm_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 15, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_set_l2bm_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 15, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_ieee1588_one_step_enable_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 19, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_ieee1588_one_step_enable_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 19, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_ieee1588_regen_udp_checksum_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 18, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_ieee1588_regen_udp_checksum_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 18, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 17, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 17, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 8, 8, val);
+}
+
+static uint32_t bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 8, 8);
+    return val;
+}
+
+static void bcmpkt_txpmd_tx_ts_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 16, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_tx_ts_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 16, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_spid_override_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 24, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_spid_override_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 24, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_spid_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 22, 2, val);
+}
+
+static uint32_t bcmpkt_txpmd_spid_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 22, 2);
+    return val;
+}
+
+static void bcmpkt_txpmd_spap_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 20, 2, val);
+}
+
+static uint32_t bcmpkt_txpmd_spap_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 20, 2);
+    return val;
+}
+
+static uint32_t bcmpkt_txpmd_i_size_get(uint32_t *data, uint32_t **addr)
+{
+    return 4;
+}
+
+
+const bcmpkt_txpmd_fget_t bcm56996_a0_txpmd_fget = {
+    {
+        bcmpkt_txpmd_start_get,
+        bcmpkt_txpmd_header_type_get,
+        bcmpkt_txpmd_pkt_length_get,
+        bcmpkt_txpmd_ipcf_ptr_get,
+        bcmpkt_txpmd_sop_get,
+        bcmpkt_txpmd_eop_get,
+        bcmpkt_txpmd_cell_length_get,
+        bcmpkt_txpmd_cell_error_get,
+        bcmpkt_txpmd_local_dest_port_get,
+        bcmpkt_txpmd_src_modid_get,
+        bcmpkt_txpmd_cos_get,
+        bcmpkt_txpmd_input_pri_get,
+        bcmpkt_txpmd_unicast_get,
+        bcmpkt_txpmd_rqe_q_num_get,
+        bcmpkt_txpmd_set_l2bm_get,
+        bcmpkt_txpmd_ieee1588_one_step_enable_get,
+        bcmpkt_txpmd_ieee1588_regen_udp_checksum_get,
+        bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_get,
+        bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_get,
+        bcmpkt_txpmd_tx_ts_get,
+        bcmpkt_txpmd_spid_override_get,
+        bcmpkt_txpmd_spid_get,
+        bcmpkt_txpmd_spap_get,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL
+    }
+};
+
+
+const bcmpkt_txpmd_fset_t bcm56996_a0_txpmd_fset = {
+    {
+        bcmpkt_txpmd_start_set,
+        bcmpkt_txpmd_header_type_set,
+        bcmpkt_txpmd_pkt_length_set,
+        bcmpkt_txpmd_ipcf_ptr_set,
+        bcmpkt_txpmd_sop_set,
+        bcmpkt_txpmd_eop_set,
+        bcmpkt_txpmd_cell_length_set,
+        bcmpkt_txpmd_cell_error_set,
+        bcmpkt_txpmd_local_dest_port_set,
+        bcmpkt_txpmd_src_modid_set,
+        bcmpkt_txpmd_cos_set,
+        bcmpkt_txpmd_input_pri_set,
+        bcmpkt_txpmd_unicast_set,
+        bcmpkt_txpmd_rqe_q_num_set,
+        bcmpkt_txpmd_set_l2bm_set,
+        bcmpkt_txpmd_ieee1588_one_step_enable_set,
+        bcmpkt_txpmd_ieee1588_regen_udp_checksum_set,
+        bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_set,
+        bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_set,
+        bcmpkt_txpmd_tx_ts_set,
+        bcmpkt_txpmd_spid_override_set,
+        bcmpkt_txpmd_spid_set,
+        bcmpkt_txpmd_spap_set,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL
+    }
+};
+
+
+const bcmpkt_txpmd_figet_t bcm56996_a0_txpmd_figet = {
+    {
+        bcmpkt_txpmd_i_size_get
+    }
+};
+
+static shr_enum_map_t bcm56996_a0_txpmd_view_types[] = {
+    {NULL, -1},
+};
+
+/* -2: unsupported, -1: global, others: view's value */
+static int bcm56996_a0_txpmd_view_infos[BCMPKT_TXPMD_FID_COUNT] = {
+     -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
+     -1, -1, -1, -1, -1, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+     -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+     -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+     -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+     -2, -2, -2,
+};
+
+
+void bcm56996_a0_txpmd_view_info_get(bcmpkt_pmd_view_info_t *info)
+{
+    info->view_infos = bcm56996_a0_txpmd_view_infos;
+    info->view_types = bcm56996_a0_txpmd_view_types;
+    info->view_type_get = NULL;
+}
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_b0/bcm56996_b0_pkt_lbhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_b0/bcm56996_b0_pkt_lbhdr.c
new file mode 100644
index 000000000..90586e9db
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_b0/bcm56996_b0_pkt_lbhdr.c
@@ -0,0 +1,592 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated from the registers file.
+ * Edits to this file will be lost when it is regenerated.
+ * Tool: INTERNAL/regs/xgs/generate-pmd.pl
+ *
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ *
+ * This file provides LBHDR access functions for BCM56996_B0.
+ *
+ ******************************************************************************/
+
+#include <sal/sal_types.h>
+#include <bcmpkt/bcmpkt_lbhdr_internal.h>
+
+#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1)
+#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l))
+#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s)))
+#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s)))
+/*******************************************************************************
+ * SWFORMAT:  LBHDR
+ * BLOCKS:
+ * SIZE:     128
+ ******************************************************************************/
+static void bcmpkt_lbhdr_start_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 24, 8, val);
+}
+
+static uint32_t bcmpkt_lbhdr_start_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 24, 8);
+    return val;
+}
+
+static void bcmpkt_lbhdr_header_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 15, 5, val);
+}
+
+static uint32_t bcmpkt_lbhdr_header_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 15, 5);
+    return val;
+}
+
+static void bcmpkt_lbhdr_input_priority_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 20, 4, val);
+}
+
+static uint32_t bcmpkt_lbhdr_input_priority_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 20, 4);
+    return val;
+}
+
+static void bcmpkt_lbhdr_pkt_profile_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 26, 3, val);
+}
+
+static uint32_t bcmpkt_lbhdr_pkt_profile_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 26, 3);
+    return val;
+}
+
+static void bcmpkt_lbhdr_visibility_pkt_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 29, 1, val);
+}
+
+static uint32_t bcmpkt_lbhdr_visibility_pkt_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 29, 1);
+    return val;
+}
+
+static void bcmpkt_lbhdr_source_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 30, 2, val & MASK(2));
+    WORD_FIELD_SET(data[0], 0, 14, (val >> 2) & MASK(14));
+}
+
+static uint32_t bcmpkt_lbhdr_source_get(uint32_t *data)
+{
+    uint32_t val;
+    val = (WORD_FIELD_GET(data[1], 30, 2) | (WORD_FIELD_GET(data[0], 0, 14) << 2)) ;
+    return val;
+}
+
+static void bcmpkt_lbhdr_source_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 14, 1, val);
+}
+
+static uint32_t bcmpkt_lbhdr_source_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 14, 1);
+    return val;
+}
+
+static void bcmpkt_lbhdr_trill_ac_cng_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_AC) {
+        return;
+    }
+    WORD_FIELD_SET(data[3], 4, 2, val);
+}
+
+static uint32_t bcmpkt_lbhdr_trill_ac_cng_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_AC) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[3], 4, 2);
+    return val;
+}
+
+static void bcmpkt_lbhdr_trill_ac_tc_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_AC) {
+        return;
+    }
+    WORD_FIELD_SET(data[3], 0, 4, val);
+}
+
+static uint32_t bcmpkt_lbhdr_trill_ac_tc_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_AC) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[3], 0, 4);
+    return val;
+}
+
+static void bcmpkt_lbhdr_trill_nw_cng_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_NW) {
+        return;
+    }
+    WORD_FIELD_SET(data[3], 4, 2, val);
+}
+
+static uint32_t bcmpkt_lbhdr_trill_nw_cng_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_NW) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[3], 4, 2);
+    return val;
+}
+
+static void bcmpkt_lbhdr_trill_nw_tc_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_NW) {
+        return;
+    }
+    WORD_FIELD_SET(data[3], 0, 4, val);
+}
+
+static uint32_t bcmpkt_lbhdr_trill_nw_tc_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_NW) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[3], 0, 4);
+    return val;
+}
+
+static void bcmpkt_lbhdr_eth_dest_type_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return;
+    }
+    WORD_FIELD_SET(data[3], 11, 4, val);
+}
+
+static uint32_t bcmpkt_lbhdr_eth_dest_type_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[3], 11, 4);
+    return val;
+}
+
+static void bcmpkt_lbhdr_eth_dest_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return;
+    }
+    WORD_FIELD_SET(data[3], 15, 16, val);
+}
+
+static uint32_t bcmpkt_lbhdr_eth_dest_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[3], 15, 16);
+    return val;
+}
+
+static void bcmpkt_lbhdr_eth_dp_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 7, 2, val);
+}
+
+static uint32_t bcmpkt_lbhdr_eth_dp_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 7, 2);
+    return val;
+}
+
+static void bcmpkt_lbhdr_eth_ecmp_member_id_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 9, 14, val);
+}
+
+static uint32_t bcmpkt_lbhdr_eth_ecmp_member_id_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 9, 14);
+    return val;
+}
+
+static void bcmpkt_lbhdr_eth_int_cn_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 1, 2, val);
+}
+
+static uint32_t bcmpkt_lbhdr_eth_int_cn_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 1, 2);
+    return val;
+}
+
+static void bcmpkt_lbhdr_eth_int_pri_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 3, 4, val);
+}
+
+static uint32_t bcmpkt_lbhdr_eth_int_pri_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 3, 4);
+    return val;
+}
+
+static void bcmpkt_lbhdr_eth_mcast_lb_index_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return;
+    }
+    WORD_FIELD_SET(data[1], 6, 8, val);
+}
+
+static uint32_t bcmpkt_lbhdr_eth_mcast_lb_index_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[1], 6, 8);
+    return val;
+}
+
+static void bcmpkt_lbhdr_eth_mcast_lb_index_vld_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return;
+    }
+    WORD_FIELD_SET(data[1], 14, 1, val);
+}
+
+static uint32_t bcmpkt_lbhdr_eth_mcast_lb_index_vld_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[1], 14, 1);
+    return val;
+}
+
+static void bcmpkt_lbhdr_eth_pp_port_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return;
+    }
+    WORD_FIELD_SET(data[3], 0, 9, val);
+}
+
+static uint32_t bcmpkt_lbhdr_eth_pp_port_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[3], 0, 9);
+    return val;
+}
+
+static void bcmpkt_lbhdr_eth_qos_fields_vld_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 0, 1, val);
+}
+
+static uint32_t bcmpkt_lbhdr_eth_qos_fields_vld_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 0, 1);
+    return val;
+}
+
+static void bcmpkt_lbhdr_eth_routed_pkt_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return;
+    }
+    WORD_FIELD_SET(data[3], 31, 1, val);
+}
+
+static uint32_t bcmpkt_lbhdr_eth_routed_pkt_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[3], 31, 1);
+    return val;
+}
+
+static void bcmpkt_lbhdr_eth_subflow_type_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return;
+    }
+    WORD_FIELD_SET(data[3], 9, 2, val);
+}
+
+static uint32_t bcmpkt_lbhdr_eth_subflow_type_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[3], 9, 2);
+    return val;
+}
+
+static void bcmpkt_lbhdr_ethernet_vrf_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 23, 9, val & MASK(9));
+    WORD_FIELD_SET(data[1], 0, 4, (val >> 9) & MASK(4));
+}
+
+static uint32_t bcmpkt_lbhdr_ethernet_vrf_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return 0;
+    }
+    val = (WORD_FIELD_GET(data[2], 23, 9) | (WORD_FIELD_GET(data[1], 0, 4) << 9)) ;
+    return val;
+}
+
+static void bcmpkt_lbhdr_ethernet_vrf_valid_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return;
+    }
+    WORD_FIELD_SET(data[1], 4, 1, val);
+}
+
+static uint32_t bcmpkt_lbhdr_ethernet_vrf_valid_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[1], 4, 1);
+    return val;
+}
+
+static uint32_t bcmpkt_lbhdr_i_size_get(uint32_t *data, uint32_t **addr)
+{
+    return 4;
+}
+
+
+const bcmpkt_lbhdr_fget_t bcm56996_b0_lbhdr_fget = {
+    {
+        bcmpkt_lbhdr_start_get,
+        bcmpkt_lbhdr_header_type_get,
+        bcmpkt_lbhdr_input_priority_get,
+        bcmpkt_lbhdr_pkt_profile_get,
+        bcmpkt_lbhdr_visibility_pkt_get,
+        bcmpkt_lbhdr_source_get,
+        bcmpkt_lbhdr_source_type_get,
+        bcmpkt_lbhdr_trill_ac_cng_get,
+        bcmpkt_lbhdr_trill_ac_tc_get,
+        NULL,
+        bcmpkt_lbhdr_trill_nw_cng_get,
+        bcmpkt_lbhdr_trill_nw_tc_get,
+        bcmpkt_lbhdr_eth_dest_type_get,
+        bcmpkt_lbhdr_eth_dest_get,
+        bcmpkt_lbhdr_eth_dp_get,
+        bcmpkt_lbhdr_eth_ecmp_member_id_get,
+        bcmpkt_lbhdr_eth_int_cn_get,
+        bcmpkt_lbhdr_eth_int_pri_get,
+        bcmpkt_lbhdr_eth_mcast_lb_index_get,
+        bcmpkt_lbhdr_eth_mcast_lb_index_vld_get,
+        bcmpkt_lbhdr_eth_pp_port_get,
+        bcmpkt_lbhdr_eth_qos_fields_vld_get,
+        bcmpkt_lbhdr_eth_routed_pkt_get,
+        bcmpkt_lbhdr_eth_subflow_type_get,
+        bcmpkt_lbhdr_ethernet_vrf_get,
+        bcmpkt_lbhdr_ethernet_vrf_valid_get,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL
+    }
+};
+
+
+const bcmpkt_lbhdr_fset_t bcm56996_b0_lbhdr_fset = {
+    {
+        bcmpkt_lbhdr_start_set,
+        bcmpkt_lbhdr_header_type_set,
+        bcmpkt_lbhdr_input_priority_set,
+        bcmpkt_lbhdr_pkt_profile_set,
+        bcmpkt_lbhdr_visibility_pkt_set,
+        bcmpkt_lbhdr_source_set,
+        bcmpkt_lbhdr_source_type_set,
+        bcmpkt_lbhdr_trill_ac_cng_set,
+        bcmpkt_lbhdr_trill_ac_tc_set,
+        NULL,
+        bcmpkt_lbhdr_trill_nw_cng_set,
+        bcmpkt_lbhdr_trill_nw_tc_set,
+        bcmpkt_lbhdr_eth_dest_type_set,
+        bcmpkt_lbhdr_eth_dest_set,
+        bcmpkt_lbhdr_eth_dp_set,
+        bcmpkt_lbhdr_eth_ecmp_member_id_set,
+        bcmpkt_lbhdr_eth_int_cn_set,
+        bcmpkt_lbhdr_eth_int_pri_set,
+        bcmpkt_lbhdr_eth_mcast_lb_index_set,
+        bcmpkt_lbhdr_eth_mcast_lb_index_vld_set,
+        bcmpkt_lbhdr_eth_pp_port_set,
+        bcmpkt_lbhdr_eth_qos_fields_vld_set,
+        bcmpkt_lbhdr_eth_routed_pkt_set,
+        bcmpkt_lbhdr_eth_subflow_type_set,
+        bcmpkt_lbhdr_ethernet_vrf_set,
+        bcmpkt_lbhdr_ethernet_vrf_valid_set,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL
+    }
+};
+
+
+const bcmpkt_lbhdr_figet_t bcm56996_b0_lbhdr_figet = {
+    {
+        bcmpkt_lbhdr_i_size_get
+    }
+};
+
+static shr_enum_map_t bcm56996_b0_lbhdr_view_types[] = {
+    {"trill_nw", 1},
+    {"trill_ac", 2},
+    {"ethernet", 3},
+    {NULL, -1},
+};
+
+/* -2: unsupported, -1: global, others: view's value */
+static int bcm56996_b0_lbhdr_view_infos[BCMPKT_LBHDR_FID_COUNT] = {
+     -1, -1, -1, -1, -1, -1, -1,  2,  2, -2,  1,  1,  3,  3,  3,  3,
+      3,  3,  3,  3,  3,  3,  3,  3,  3,  3, -2, -2, -2, -2, -2, -2,
+     -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+     -2,
+};
+
+
+void bcm56996_b0_lbhdr_view_info_get(bcmpkt_pmd_view_info_t *info)
+{
+    info->view_infos = bcm56996_b0_lbhdr_view_infos;
+    info->view_types = bcm56996_b0_lbhdr_view_types;
+    info->view_type_get = bcmpkt_lbhdr_header_type_get;
+}
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_b0/bcm56996_b0_pkt_rxpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_b0/bcm56996_b0_pkt_rxpmd.c
new file mode 100644
index 000000000..71042ff2a
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_b0/bcm56996_b0_pkt_rxpmd.c
@@ -0,0 +1,1110 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated from the registers file.
+ * Edits to this file will be lost when it is regenerated.
+ * Tool: INTERNAL/regs/xgs/generate-pmd.pl
+ *
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ *
+ * This file provides RXPMD access functions for BCM56996_B0.
+ *
+ ******************************************************************************/
+
+#include <sal/sal_types.h>
+#include <bcmpkt/bcmpkt_rxpmd.h>
+#include <bcmpkt/bcmpkt_rxpmd_internal.h>
+
+#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1)
+#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l))
+#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s)))
+#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s)))
+/*******************************************************************************
+ * SWFORMAT:  RXPMD
+ * BLOCKS:
+ * SIZE:     416
+ ******************************************************************************/
+static void bcmpkt_rxpmd_unicast_queue_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[4], 24, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_unicast_queue_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[4], 24, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_queue_num_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[12], 22, 6, val);
+}
+
+static uint32_t bcmpkt_rxpmd_queue_num_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[12], 22, 6);
+    return val;
+}
+
+static void bcmpkt_rxpmd_cpu_cos_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[12], 22, 6, val);
+}
+
+static uint32_t bcmpkt_rxpmd_cpu_cos_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[12], 22, 6);
+    return val;
+}
+
+static void bcmpkt_rxpmd_matched_rule_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[8], 3, 8, val);
+}
+
+static uint32_t bcmpkt_rxpmd_matched_rule_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[8], 3, 8);
+    return val;
+}
+
+static void bcmpkt_rxpmd_pkt_length_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[7], 0, 14, val);
+}
+
+static uint32_t bcmpkt_rxpmd_pkt_length_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[7], 0, 14);
+    return val;
+}
+
+static void bcmpkt_rxpmd_src_port_num_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[6], 22, 9, val);
+}
+
+static uint32_t bcmpkt_rxpmd_src_port_num_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[6], 22, 9);
+    return val;
+}
+
+static void bcmpkt_rxpmd_outer_vid_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[8], 18, 12, val);
+}
+
+static uint32_t bcmpkt_rxpmd_outer_vid_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[8], 18, 12);
+    return val;
+}
+
+static void bcmpkt_rxpmd_outer_cfi_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[8], 14, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_outer_cfi_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[8], 14, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_outer_pri_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[8], 15, 3, val);
+}
+
+static uint32_t bcmpkt_rxpmd_outer_pri_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[8], 15, 3);
+    return val;
+}
+
+static void bcmpkt_rxpmd_special_packet_indicator_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[6], 21, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_special_packet_indicator_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[6], 21, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_special_packet_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[9], 5, 3, val);
+}
+
+static uint32_t bcmpkt_rxpmd_special_packet_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[9], 5, 3);
+    return val;
+}
+
+static void bcmpkt_rxpmd_change_dscp_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[12], 29, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_change_dscp_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[12], 29, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_dscp_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[9], 5, 6, val);
+}
+
+static uint32_t bcmpkt_rxpmd_dscp_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[9], 5, 6);
+    return val;
+}
+
+static void bcmpkt_rxpmd_change_ecn_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[12], 30, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_change_ecn_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[12], 30, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_ecn_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[9], 11, 2, val);
+}
+
+static uint32_t bcmpkt_rxpmd_ecn_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[9], 11, 2);
+    return val;
+}
+
+static void bcmpkt_rxpmd_timestamp_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[4], 16, 2, val);
+}
+
+static uint32_t bcmpkt_rxpmd_timestamp_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[4], 16, 2);
+    return val;
+}
+
+static void bcmpkt_rxpmd_timestamp_set(uint32_t *data, uint32_t val)
+{
+    data[5] = val;
+}
+
+static uint32_t bcmpkt_rxpmd_timestamp_get(uint32_t *data)
+{
+    uint32_t val;
+    val = data[5];
+    return val;
+}
+
+static void bcmpkt_rxpmd_timestamp_hi_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[4], 0, 16, val);
+}
+
+static uint32_t bcmpkt_rxpmd_timestamp_hi_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[4], 0, 16);
+    return val;
+}
+
+static void bcmpkt_rxpmd_mtp_index_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[8], 11, 3, val);
+}
+
+static uint32_t bcmpkt_rxpmd_mtp_index_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[8], 11, 3);
+    return val;
+}
+
+static void bcmpkt_rxpmd_bpdu_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[12], 28, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_bpdu_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[12], 28, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_l3only_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[8], 2, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_l3only_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[8], 2, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_ip_routed_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[8], 1, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_ip_routed_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[8], 1, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_uc_sw_copy_dropped_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[4], 23, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_uc_sw_copy_dropped_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[4], 23, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_switch_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[6], 31, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_switch_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[6], 31, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_ing_otag_action_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[9], 30, 2, val);
+}
+
+static uint32_t bcmpkt_rxpmd_ing_otag_action_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[9], 30, 2);
+    return val;
+}
+
+static void bcmpkt_rxpmd_ing_tag_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[9], 13, 2, val);
+}
+
+static uint32_t bcmpkt_rxpmd_ing_tag_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[9], 13, 2);
+    return val;
+}
+
+static void bcmpkt_rxpmd_rx_bfd_start_offset_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[12], 14, 8, val);
+}
+
+static uint32_t bcmpkt_rxpmd_rx_bfd_start_offset_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[12], 14, 8);
+    return val;
+}
+
+static void bcmpkt_rxpmd_rx_bfd_start_offset_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[12], 12, 2, val);
+}
+
+static uint32_t bcmpkt_rxpmd_rx_bfd_start_offset_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[12], 12, 2);
+    return val;
+}
+
+static void bcmpkt_rxpmd_rx_bfd_session_index_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[12], 0, 12, val);
+}
+
+static uint32_t bcmpkt_rxpmd_rx_bfd_session_index_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[12], 0, 12);
+    return val;
+}
+
+static void bcmpkt_rxpmd_reason_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[9], 0, 4, val);
+}
+
+static uint32_t bcmpkt_rxpmd_reason_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[9], 0, 4);
+    return val;
+}
+
+static void bcmpkt_rxpmd_do_not_change_ttl_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[9], 4, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_do_not_change_ttl_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[9], 4, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_i2e_classid_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[12], 12, 4, val);
+}
+
+static uint32_t bcmpkt_rxpmd_i2e_classid_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[12], 12, 4);
+    return val;
+}
+
+static void bcmpkt_rxpmd_i2e_classid_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[12], 0, 12, val);
+}
+
+static uint32_t bcmpkt_rxpmd_i2e_classid_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[12], 0, 12);
+    return val;
+}
+
+static void bcmpkt_rxpmd_ing_l3_intf_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[12], 0, 13, val);
+}
+
+static uint32_t bcmpkt_rxpmd_ing_l3_intf_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[12], 0, 13);
+    return val;
+}
+
+static void bcmpkt_rxpmd_regen_crc_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[7], 14, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_regen_crc_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[7], 14, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_entropy_label_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[6], 1, 20, val);
+}
+
+static uint32_t bcmpkt_rxpmd_entropy_label_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[6], 1, 20);
+    return val;
+}
+
+static void bcmpkt_rxpmd_tunnel_decap_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[4], 18, 5, val);
+}
+
+static uint32_t bcmpkt_rxpmd_tunnel_decap_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[4], 18, 5);
+    return val;
+}
+
+static void bcmpkt_rxpmd_dlb_id_valid_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[12], 31, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_dlb_id_valid_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[12], 31, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_dlb_id_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[4], 25, 7, val);
+}
+
+static uint32_t bcmpkt_rxpmd_dlb_id_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[4], 25, 7);
+    return val;
+}
+
+static void bcmpkt_rxpmd_replication_or_nhop_index_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[7], 15, 17, val);
+}
+
+static uint32_t bcmpkt_rxpmd_replication_or_nhop_index_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[7], 15, 17);
+    return val;
+}
+
+static void bcmpkt_rxpmd_incoming_int_hdr_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[8], 30, 2, val);
+}
+
+static uint32_t bcmpkt_rxpmd_incoming_int_hdr_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[8], 30, 2);
+    return val;
+}
+
+static void bcmpkt_rxpmd_ing_l3_intf_valid_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[12], 16, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_ing_l3_intf_valid_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[12], 16, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_o_nhi_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[9], 15, 15, val);
+}
+
+static uint32_t bcmpkt_rxpmd_o_nhi_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[9], 15, 15);
+    return val;
+}
+
+static uint32_t bcmpkt_rxpmd_i_size_get(uint32_t *data, uint32_t **addr)
+{
+    return 13;
+}
+
+static uint32_t bcmpkt_rxpmd_i_reason_get(uint32_t *data, uint32_t **addr)
+{
+    *addr = data + 10;
+    return 2;
+}
+
+static uint32_t bcmpkt_rxpmd_i_module_hdr_get(uint32_t *data, uint32_t **addr)
+{
+    *addr = data + 0;
+    return 4;
+}
+
+/*******************************************************************************
+ * SWFORMAT:  RX_REASON
+ * BLOCKS:
+ * SIZE:     45
+ ******************************************************************************/
+void bcm56996_b0_rx_reason_encode(const bcmpkt_rx_reasons_t *reasons, uint32_t *data)
+{
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_UVLAN)) {
+        data[1] |= (0x1 << 0);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SLF)) {
+        data[1] |= (0x1 << 1);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_DLF)) {
+        data[1] |= (0x1 << 2);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L2MOVE)) {
+        data[1] |= (0x1 << 3);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L2CPU)) {
+        data[1] |= (0x1 << 4);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MISS)) {
+        data[1] |= (0x1 << 5);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3DST_MISS)) {
+        data[1] |= (0x1 << 6);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MOVE)) {
+        data[1] |= (0x1 << 7);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_MC_MISS)) {
+        data[1] |= (0x1 << 8);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_MISS)) {
+        data[1] |= (0x1 << 9);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_FFP)) {
+        data[1] |= (0x1 << 10);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3HDR_ERR)) {
+        data[1] |= (0x1 << 11);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_PROTOCOL_PKT)) {
+        data[1] |= (0x1 << 12);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_DOS_ATTACK)) {
+        data[1] |= (0x1 << 13);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_MARTIAN_ADDR)) {
+        data[1] |= (0x1 << 14);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_TUNNEL_ERR)) {
+        data[1] |= (0x1 << 15);
+    }
+
+    if (BCMPKT_RX_REASON_GET(*reasons,  BCMPKT_RX_REASON_CPU_SFLOW_CPU_SFLOW_FLEX)) {
+        WORD_FIELD_SET(data[1], 16, 2, 1);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons,  BCMPKT_RX_REASON_CPU_SFLOW_CPU_SFLOW_DST)) {
+        WORD_FIELD_SET(data[1], 16, 2, 2);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons,  BCMPKT_RX_REASON_CPU_SFLOW_CPU_SFLOW_SRC)) {
+        WORD_FIELD_SET(data[1], 16, 2, 3);
+    }
+    /*! For mask set ONLY. */
+    if (BCMPKT_RX_REASON_GET(*reasons,  BCMPKT_RX_REASON_CPU_SFLOW)) {
+        WORD_FIELD_SET(data[1], 16, 2, 3);
+    }
+
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_ICMP_REDIRECT)) {
+        data[1] |= (0x1 << 18);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_L3_SLOWPATH)) {
+        data[1] |= (0x1 << 19);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_PARITY_ERROR)) {
+        data[1] |= (0x1 << 20);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_L3_MTU_CHECK_FAIL)) {
+        data[1] |= (0x1 << 21);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MCIDX_ERROR)) {
+        data[1] |= (0x1 << 22);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_VFP)) {
+        data[1] |= (0x1 << 23);
+    }
+
+    if (BCMPKT_RX_REASON_GET(*reasons,  BCMPKT_RX_REASON_MPLS_PROC_ERROR_INVALID_PAYLOAD)) {
+        WORD_FIELD_SET(data[1], 24, 3, 1);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons,  BCMPKT_RX_REASON_MPLS_PROC_ERROR_INVALID_ACTION)) {
+        WORD_FIELD_SET(data[1], 24, 3, 2);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons,  BCMPKT_RX_REASON_MPLS_PROC_ERROR_LABEL_MISS)) {
+        WORD_FIELD_SET(data[1], 24, 3, 3);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons,  BCMPKT_RX_REASON_MPLS_PROC_ERROR_TTL_CHECK_FAIL)) {
+        WORD_FIELD_SET(data[1], 24, 3, 4);
+    }
+    /*! For mask set ONLY. */
+    if (BCMPKT_RX_REASON_GET(*reasons,  BCMPKT_RX_REASON_MPLS_PROC_ERROR)) {
+        WORD_FIELD_SET(data[1], 24, 3, 7);
+    }
+
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_PBT_NONUC_PKT)) {
+        data[1] |= (0x1 << 27);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_L3_NEXT_HOP)) {
+        data[1] |= (0x1 << 28);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MY_STATION)) {
+        data[1] |= (0x1 << 29);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_TIME_SYNC)) {
+        data[1] |= (0x1 << 30);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_TUNNEL_DECAP_ECN_ERROR)) {
+        data[1] |= (0x1 << 31);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_BFD_SLOWPATH)) {
+        data[0] |= (0x1 << 0);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_BFD_ERROR)) {
+        data[0] |= (0x1 << 1);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_PACKET_TRACE_TO_CPU)) {
+        data[0] |= (0x1 << 2);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_UNKNOWN_CONTROL_PKT)) {
+        data[0] |= (0x1 << 3);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_ALERT_LABEL)) {
+        data[0] |= (0x1 << 4);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_INTERFACE_MISMATCH)) {
+        data[0] |= (0x1 << 5);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_DLB_MONITOR)) {
+        data[0] |= (0x1 << 6);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_INT_TURN_AROUND)) {
+        data[0] |= (0x1 << 7);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_ETRAP_MONITOR)) {
+        data[0] |= (0x1 << 8);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_SRV6_ERROR)) {
+        data[0] |= (0x1 << 9);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_VXLAN_VN_ID_MISS)) {
+        data[0] |= (0x1 << 10);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_VXLAN_SIP_MISS)) {
+        data[0] |= (0x1 << 11);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_ADAPT_MISS)) {
+        data[0] |= (0x1 << 12);
+    }
+}
+
+void bcm56996_b0_rx_reason_decode(const uint32_t *data, bcmpkt_rx_reasons_t *reasons)
+{
+    uint32_t val;
+    COMPILER_REFERENCE(val);
+    if (data[1] & (0x1 << 0)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_UVLAN);
+    }
+    if (data[1] & (0x1 << 1)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_SLF);
+    }
+    if (data[1] & (0x1 << 2)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_DLF);
+    }
+    if (data[1] & (0x1 << 3)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L2MOVE);
+    }
+    if (data[1] & (0x1 << 4)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L2CPU);
+    }
+    if (data[1] & (0x1 << 5)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MISS);
+    }
+    if (data[1] & (0x1 << 6)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3DST_MISS);
+    }
+    if (data[1] & (0x1 << 7)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MOVE);
+    }
+    if (data[1] & (0x1 << 8)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_MC_MISS);
+    }
+    if (data[1] & (0x1 << 9)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_MISS);
+    }
+    if (data[1] & (0x1 << 10)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_FFP);
+    }
+    if (data[1] & (0x1 << 11)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3HDR_ERR);
+    }
+    if (data[1] & (0x1 << 12)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_PROTOCOL_PKT);
+    }
+    if (data[1] & (0x1 << 13)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_DOS_ATTACK);
+    }
+    if (data[1] & (0x1 << 14)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_MARTIAN_ADDR);
+    }
+    if (data[1] & (0x1 << 15)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_TUNNEL_ERR);
+    }
+
+    val = WORD_FIELD_GET(data[1], 16, 2);
+    if (val) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW);
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW + val);
+    }
+
+    if (data[1] & (0x1 << 18)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_ICMP_REDIRECT);
+    }
+    if (data[1] & (0x1 << 19)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_L3_SLOWPATH);
+    }
+    if (data[1] & (0x1 << 20)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_PARITY_ERROR);
+    }
+    if (data[1] & (0x1 << 21)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_L3_MTU_CHECK_FAIL);
+    }
+    if (data[1] & (0x1 << 22)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MCIDX_ERROR);
+    }
+    if (data[1] & (0x1 << 23)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_VFP);
+    }
+
+    val = WORD_FIELD_GET(data[1], 24, 3);
+    if (val) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR);
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR + val);
+    }
+
+    if (data[1] & (0x1 << 27)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_PBT_NONUC_PKT);
+    }
+    if (data[1] & (0x1 << 28)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_L3_NEXT_HOP);
+    }
+    if (data[1] & (0x1 << 29)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MY_STATION);
+    }
+    if (data[1] & (0x1 << 30)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_TIME_SYNC);
+    }
+    if (data[1] & (0x1 << 31)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_TUNNEL_DECAP_ECN_ERROR);
+    }
+    if (data[0] & (0x1 << 0)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_BFD_SLOWPATH);
+    }
+    if (data[0] & (0x1 << 1)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_BFD_ERROR);
+    }
+    if (data[0] & (0x1 << 2)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_PACKET_TRACE_TO_CPU);
+    }
+    if (data[0] & (0x1 << 3)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_UNKNOWN_CONTROL_PKT);
+    }
+    if (data[0] & (0x1 << 4)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_ALERT_LABEL);
+    }
+    if (data[0] & (0x1 << 5)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_INTERFACE_MISMATCH);
+    }
+    if (data[0] & (0x1 << 6)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_DLB_MONITOR);
+    }
+    if (data[0] & (0x1 << 7)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_INT_TURN_AROUND);
+    }
+    if (data[0] & (0x1 << 8)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_ETRAP_MONITOR);
+    }
+    if (data[0] & (0x1 << 9)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_SRV6_ERROR);
+    }
+    if (data[0] & (0x1 << 10)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_VXLAN_VN_ID_MISS);
+    }
+    if (data[0] & (0x1 << 11)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_VXLAN_SIP_MISS);
+    }
+    if (data[0] & (0x1 << 12)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_ADAPT_MISS);
+    }
+}
+
+void bcm56996_b0_ep_rx_reason_encode(const bcmpkt_rx_reasons_t *reasons, uint32_t *data)
+{
+}
+
+void bcm56996_b0_ep_rx_reason_decode(const uint32_t *data, bcmpkt_rx_reasons_t *reasons)
+{
+}
+
+const bcmpkt_rxpmd_fget_t bcm56996_b0_rxpmd_fget = {
+    {
+        bcmpkt_rxpmd_unicast_queue_get,
+        bcmpkt_rxpmd_queue_num_get,
+        bcmpkt_rxpmd_cpu_cos_get,
+        NULL,
+        bcmpkt_rxpmd_matched_rule_get,
+        bcmpkt_rxpmd_pkt_length_get,
+        bcmpkt_rxpmd_src_port_num_get,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_outer_vid_get,
+        bcmpkt_rxpmd_outer_cfi_get,
+        bcmpkt_rxpmd_outer_pri_get,
+        bcmpkt_rxpmd_special_packet_indicator_get,
+        bcmpkt_rxpmd_special_packet_type_get,
+        bcmpkt_rxpmd_change_dscp_get,
+        bcmpkt_rxpmd_dscp_get,
+        bcmpkt_rxpmd_change_ecn_get,
+        bcmpkt_rxpmd_ecn_get,
+        bcmpkt_rxpmd_timestamp_type_get,
+        bcmpkt_rxpmd_timestamp_get,
+        bcmpkt_rxpmd_timestamp_hi_get,
+        bcmpkt_rxpmd_mtp_index_get,
+        bcmpkt_rxpmd_bpdu_get,
+        NULL,
+        bcmpkt_rxpmd_l3only_get,
+        bcmpkt_rxpmd_ip_routed_get,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_uc_sw_copy_dropped_get,
+        bcmpkt_rxpmd_switch_get,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_ing_otag_action_get,
+        bcmpkt_rxpmd_ing_tag_type_get,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_rx_bfd_start_offset_get,
+        bcmpkt_rxpmd_rx_bfd_start_offset_type_get,
+        bcmpkt_rxpmd_rx_bfd_session_index_get,
+        bcmpkt_rxpmd_reason_type_get,
+        bcmpkt_rxpmd_do_not_change_ttl_get,
+        bcmpkt_rxpmd_i2e_classid_type_get,
+        bcmpkt_rxpmd_i2e_classid_get,
+        bcmpkt_rxpmd_ing_l3_intf_get,
+        NULL,
+        bcmpkt_rxpmd_regen_crc_get,
+        bcmpkt_rxpmd_entropy_label_get,
+        bcmpkt_rxpmd_tunnel_decap_type_get,
+        bcmpkt_rxpmd_dlb_id_valid_get,
+        bcmpkt_rxpmd_dlb_id_get,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_replication_or_nhop_index_get,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_incoming_int_hdr_type_get,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_ing_l3_intf_valid_get,
+        bcmpkt_rxpmd_o_nhi_get,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL
+    }
+};
+
+
+const bcmpkt_rxpmd_fset_t bcm56996_b0_rxpmd_fset = {
+    {
+        bcmpkt_rxpmd_unicast_queue_set,
+        bcmpkt_rxpmd_queue_num_set,
+        bcmpkt_rxpmd_cpu_cos_set,
+        NULL,
+        bcmpkt_rxpmd_matched_rule_set,
+        bcmpkt_rxpmd_pkt_length_set,
+        bcmpkt_rxpmd_src_port_num_set,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_outer_vid_set,
+        bcmpkt_rxpmd_outer_cfi_set,
+        bcmpkt_rxpmd_outer_pri_set,
+        bcmpkt_rxpmd_special_packet_indicator_set,
+        bcmpkt_rxpmd_special_packet_type_set,
+        bcmpkt_rxpmd_change_dscp_set,
+        bcmpkt_rxpmd_dscp_set,
+        bcmpkt_rxpmd_change_ecn_set,
+        bcmpkt_rxpmd_ecn_set,
+        bcmpkt_rxpmd_timestamp_type_set,
+        bcmpkt_rxpmd_timestamp_set,
+        bcmpkt_rxpmd_timestamp_hi_set,
+        bcmpkt_rxpmd_mtp_index_set,
+        bcmpkt_rxpmd_bpdu_set,
+        NULL,
+        bcmpkt_rxpmd_l3only_set,
+        bcmpkt_rxpmd_ip_routed_set,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_uc_sw_copy_dropped_set,
+        bcmpkt_rxpmd_switch_set,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_ing_otag_action_set,
+        bcmpkt_rxpmd_ing_tag_type_set,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_rx_bfd_start_offset_set,
+        bcmpkt_rxpmd_rx_bfd_start_offset_type_set,
+        bcmpkt_rxpmd_rx_bfd_session_index_set,
+        bcmpkt_rxpmd_reason_type_set,
+        bcmpkt_rxpmd_do_not_change_ttl_set,
+        bcmpkt_rxpmd_i2e_classid_type_set,
+        bcmpkt_rxpmd_i2e_classid_set,
+        bcmpkt_rxpmd_ing_l3_intf_set,
+        NULL,
+        bcmpkt_rxpmd_regen_crc_set,
+        bcmpkt_rxpmd_entropy_label_set,
+        bcmpkt_rxpmd_tunnel_decap_type_set,
+        bcmpkt_rxpmd_dlb_id_valid_set,
+        bcmpkt_rxpmd_dlb_id_set,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_replication_or_nhop_index_set,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_incoming_int_hdr_type_set,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_ing_l3_intf_valid_set,
+        bcmpkt_rxpmd_o_nhi_set,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL
+    }
+};
+
+
+const bcmpkt_rxpmd_figet_t bcm56996_b0_rxpmd_figet = {
+    {
+        bcmpkt_rxpmd_i_size_get,
+        bcmpkt_rxpmd_i_reason_get,
+        bcmpkt_rxpmd_i_module_hdr_get,
+        NULL
+    }
+};
+
+static shr_enum_map_t bcm56996_b0_rxpmd_view_types[] = {
+    {NULL, -1},
+};
+
+/* -2: unsupported, -1: global, others: view's value */
+static int bcm56996_b0_rxpmd_view_infos[BCMPKT_RXPMD_FID_COUNT] = {
+     -1, -1, -1, -2, -1, -1, -1, -2, -2, -2, -1, -1, -1, -1, -1, -1,
+     -1, -1, -1, -1, -1, -1, -1, -1, -2, -1, -1, -2, -2, -1, -1, -2,
+     -2, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1,
+     -1, -1, -1, -1, -1, -1, -1, -2, -1, -1, -1, -1, -1, -2, -2, -2,
+     -2, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, -2, -2, -2,
+     -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+};
+
+
+void bcm56996_b0_rxpmd_view_info_get(bcmpkt_pmd_view_info_t *info)
+{
+    info->view_infos = bcm56996_b0_rxpmd_view_infos;
+    info->view_types = bcm56996_b0_rxpmd_view_types;
+    info->view_type_get = NULL;
+}
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_b0/bcm56996_b0_pkt_txpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_b0/bcm56996_b0_pkt_txpmd.c
new file mode 100644
index 000000000..6c3894f0c
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_b0/bcm56996_b0_pkt_txpmd.c
@@ -0,0 +1,526 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated from the registers file.
+ * Edits to this file will be lost when it is regenerated.
+ * Tool: INTERNAL/regs/xgs/generate-pmd.pl
+ *
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ *
+ * This file provides TXPMD access functions for BCM56996_B0.
+ *
+ ******************************************************************************/
+
+#include <sal/sal_types.h>
+#include <bcmpkt/bcmpkt_txpmd_internal.h>
+
+#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1)
+#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l))
+#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s)))
+#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s)))
+/*******************************************************************************
+ * SWFORMAT:  TXPMD
+ * BLOCKS:
+ * SIZE:     128
+ ******************************************************************************/
+static void bcmpkt_txpmd_start_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 30, 2, val);
+}
+
+static uint32_t bcmpkt_txpmd_start_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 30, 2);
+    return val;
+}
+
+static void bcmpkt_txpmd_header_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 24, 6, val);
+}
+
+static uint32_t bcmpkt_txpmd_header_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 24, 6);
+    return val;
+}
+
+static void bcmpkt_txpmd_pkt_length_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 10, 14, val);
+}
+
+static uint32_t bcmpkt_txpmd_pkt_length_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 10, 14);
+    return val;
+}
+
+static void bcmpkt_txpmd_ipcf_ptr_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 24, 8, val);
+}
+
+static uint32_t bcmpkt_txpmd_ipcf_ptr_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 24, 8);
+    return val;
+}
+
+static void bcmpkt_txpmd_sop_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 9, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_sop_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 9, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_eop_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 8, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_eop_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 8, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_cell_length_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 0, 8, val);
+}
+
+static uint32_t bcmpkt_txpmd_cell_length_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 0, 8);
+    return val;
+}
+
+static void bcmpkt_txpmd_cell_error_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 20, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_cell_error_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 20, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_local_dest_port_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 31, 1, val & MASK(1));
+    WORD_FIELD_SET(data[1], 0, 8, (val >> 1) & MASK(8));
+}
+
+static uint32_t bcmpkt_txpmd_local_dest_port_get(uint32_t *data)
+{
+    uint32_t val;
+    val = (WORD_FIELD_GET(data[2], 31, 1) | (WORD_FIELD_GET(data[1], 0, 8) << 1)) ;
+    return val;
+}
+
+static void bcmpkt_txpmd_src_modid_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 0, 8, val);
+}
+
+static uint32_t bcmpkt_txpmd_src_modid_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 0, 8);
+    return val;
+}
+
+static void bcmpkt_txpmd_cos_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 8, 6, val);
+}
+
+static uint32_t bcmpkt_txpmd_cos_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 8, 6);
+    return val;
+}
+
+static void bcmpkt_txpmd_input_pri_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 25, 4, val);
+}
+
+static uint32_t bcmpkt_txpmd_input_pri_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 25, 4);
+    return val;
+}
+
+static void bcmpkt_txpmd_unicast_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 14, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_unicast_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 14, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_rqe_q_num_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 16, 4, val);
+}
+
+static uint32_t bcmpkt_txpmd_rqe_q_num_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 16, 4);
+    return val;
+}
+
+static void bcmpkt_txpmd_set_l2bm_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 15, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_set_l2bm_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 15, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_ieee1588_one_step_enable_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 19, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_ieee1588_one_step_enable_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 19, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_ieee1588_regen_udp_checksum_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 18, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_ieee1588_regen_udp_checksum_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 18, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 17, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 17, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 8, 8, val);
+}
+
+static uint32_t bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 8, 8);
+    return val;
+}
+
+static void bcmpkt_txpmd_tx_ts_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 16, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_tx_ts_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 16, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_spid_override_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 24, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_spid_override_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 24, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_spid_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 22, 2, val);
+}
+
+static uint32_t bcmpkt_txpmd_spid_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 22, 2);
+    return val;
+}
+
+static void bcmpkt_txpmd_spap_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 20, 2, val);
+}
+
+static uint32_t bcmpkt_txpmd_spap_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 20, 2);
+    return val;
+}
+
+static uint32_t bcmpkt_txpmd_i_size_get(uint32_t *data, uint32_t **addr)
+{
+    return 4;
+}
+
+
+const bcmpkt_txpmd_fget_t bcm56996_b0_txpmd_fget = {
+    {
+        bcmpkt_txpmd_start_get,
+        bcmpkt_txpmd_header_type_get,
+        bcmpkt_txpmd_pkt_length_get,
+        bcmpkt_txpmd_ipcf_ptr_get,
+        bcmpkt_txpmd_sop_get,
+        bcmpkt_txpmd_eop_get,
+        bcmpkt_txpmd_cell_length_get,
+        bcmpkt_txpmd_cell_error_get,
+        bcmpkt_txpmd_local_dest_port_get,
+        bcmpkt_txpmd_src_modid_get,
+        bcmpkt_txpmd_cos_get,
+        bcmpkt_txpmd_input_pri_get,
+        bcmpkt_txpmd_unicast_get,
+        bcmpkt_txpmd_rqe_q_num_get,
+        bcmpkt_txpmd_set_l2bm_get,
+        bcmpkt_txpmd_ieee1588_one_step_enable_get,
+        bcmpkt_txpmd_ieee1588_regen_udp_checksum_get,
+        bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_get,
+        bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_get,
+        bcmpkt_txpmd_tx_ts_get,
+        bcmpkt_txpmd_spid_override_get,
+        bcmpkt_txpmd_spid_get,
+        bcmpkt_txpmd_spap_get,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL
+    }
+};
+
+
+const bcmpkt_txpmd_fset_t bcm56996_b0_txpmd_fset = {
+    {
+        bcmpkt_txpmd_start_set,
+        bcmpkt_txpmd_header_type_set,
+        bcmpkt_txpmd_pkt_length_set,
+        bcmpkt_txpmd_ipcf_ptr_set,
+        bcmpkt_txpmd_sop_set,
+        bcmpkt_txpmd_eop_set,
+        bcmpkt_txpmd_cell_length_set,
+        bcmpkt_txpmd_cell_error_set,
+        bcmpkt_txpmd_local_dest_port_set,
+        bcmpkt_txpmd_src_modid_set,
+        bcmpkt_txpmd_cos_set,
+        bcmpkt_txpmd_input_pri_set,
+        bcmpkt_txpmd_unicast_set,
+        bcmpkt_txpmd_rqe_q_num_set,
+        bcmpkt_txpmd_set_l2bm_set,
+        bcmpkt_txpmd_ieee1588_one_step_enable_set,
+        bcmpkt_txpmd_ieee1588_regen_udp_checksum_set,
+        bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_set,
+        bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_set,
+        bcmpkt_txpmd_tx_ts_set,
+        bcmpkt_txpmd_spid_override_set,
+        bcmpkt_txpmd_spid_set,
+        bcmpkt_txpmd_spap_set,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL
+    }
+};
+
+
+const bcmpkt_txpmd_figet_t bcm56996_b0_txpmd_figet = {
+    {
+        bcmpkt_txpmd_i_size_get
+    }
+};
+
+static shr_enum_map_t bcm56996_b0_txpmd_view_types[] = {
+    {NULL, -1},
+};
+
+/* -2: unsupported, -1: global, others: view's value */
+static int bcm56996_b0_txpmd_view_infos[BCMPKT_TXPMD_FID_COUNT] = {
+     -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
+     -1, -1, -1, -1, -1, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+     -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+     -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+     -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+     -2, -2, -2,
+};
+
+
+void bcm56996_b0_txpmd_view_info_get(bcmpkt_pmd_view_info_t *info)
+{
+    info->view_infos = bcm56996_b0_txpmd_view_infos;
+    info->view_types = bcm56996_b0_txpmd_view_types;
+    info->view_type_get = NULL;
+}
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56998_a0/bcm56998_a0_pkt_lbhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56998_a0/bcm56998_a0_pkt_lbhdr.c
new file mode 100644
index 000000000..abf7e1b75
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56998_a0/bcm56998_a0_pkt_lbhdr.c
@@ -0,0 +1,592 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated from the registers file.
+ * Edits to this file will be lost when it is regenerated.
+ * Tool: INTERNAL/regs/xgs/generate-pmd.pl
+ *
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ *
+ * This file provides LBHDR access functions for BCM56998_A0.
+ *
+ ******************************************************************************/
+
+#include <sal/sal_types.h>
+#include <bcmpkt/bcmpkt_lbhdr_internal.h>
+
+#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1)
+#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l))
+#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s)))
+#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s)))
+/*******************************************************************************
+ * SWFORMAT:  LBHDR
+ * BLOCKS:
+ * SIZE:     128
+ ******************************************************************************/
+static void bcmpkt_lbhdr_start_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 24, 8, val);
+}
+
+static uint32_t bcmpkt_lbhdr_start_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 24, 8);
+    return val;
+}
+
+static void bcmpkt_lbhdr_header_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 15, 5, val);
+}
+
+static uint32_t bcmpkt_lbhdr_header_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 15, 5);
+    return val;
+}
+
+static void bcmpkt_lbhdr_input_priority_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 20, 4, val);
+}
+
+static uint32_t bcmpkt_lbhdr_input_priority_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 20, 4);
+    return val;
+}
+
+static void bcmpkt_lbhdr_pkt_profile_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 26, 3, val);
+}
+
+static uint32_t bcmpkt_lbhdr_pkt_profile_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 26, 3);
+    return val;
+}
+
+static void bcmpkt_lbhdr_visibility_pkt_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 29, 1, val);
+}
+
+static uint32_t bcmpkt_lbhdr_visibility_pkt_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 29, 1);
+    return val;
+}
+
+static void bcmpkt_lbhdr_source_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 30, 2, val & MASK(2));
+    WORD_FIELD_SET(data[0], 0, 14, (val >> 2) & MASK(14));
+}
+
+static uint32_t bcmpkt_lbhdr_source_get(uint32_t *data)
+{
+    uint32_t val;
+    val = (WORD_FIELD_GET(data[1], 30, 2) | (WORD_FIELD_GET(data[0], 0, 14) << 2)) ;
+    return val;
+}
+
+static void bcmpkt_lbhdr_source_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 14, 1, val);
+}
+
+static uint32_t bcmpkt_lbhdr_source_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 14, 1);
+    return val;
+}
+
+static void bcmpkt_lbhdr_trill_ac_cng_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_AC) {
+        return;
+    }
+    WORD_FIELD_SET(data[3], 4, 2, val);
+}
+
+static uint32_t bcmpkt_lbhdr_trill_ac_cng_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_AC) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[3], 4, 2);
+    return val;
+}
+
+static void bcmpkt_lbhdr_trill_ac_tc_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_AC) {
+        return;
+    }
+    WORD_FIELD_SET(data[3], 0, 4, val);
+}
+
+static uint32_t bcmpkt_lbhdr_trill_ac_tc_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_AC) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[3], 0, 4);
+    return val;
+}
+
+static void bcmpkt_lbhdr_trill_nw_cng_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_NW) {
+        return;
+    }
+    WORD_FIELD_SET(data[3], 4, 2, val);
+}
+
+static uint32_t bcmpkt_lbhdr_trill_nw_cng_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_NW) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[3], 4, 2);
+    return val;
+}
+
+static void bcmpkt_lbhdr_trill_nw_tc_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_NW) {
+        return;
+    }
+    WORD_FIELD_SET(data[3], 0, 4, val);
+}
+
+static uint32_t bcmpkt_lbhdr_trill_nw_tc_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_NW) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[3], 0, 4);
+    return val;
+}
+
+static void bcmpkt_lbhdr_eth_dest_type_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return;
+    }
+    WORD_FIELD_SET(data[3], 11, 4, val);
+}
+
+static uint32_t bcmpkt_lbhdr_eth_dest_type_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[3], 11, 4);
+    return val;
+}
+
+static void bcmpkt_lbhdr_eth_dest_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return;
+    }
+    WORD_FIELD_SET(data[3], 15, 16, val);
+}
+
+static uint32_t bcmpkt_lbhdr_eth_dest_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[3], 15, 16);
+    return val;
+}
+
+static void bcmpkt_lbhdr_eth_dp_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 7, 2, val);
+}
+
+static uint32_t bcmpkt_lbhdr_eth_dp_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 7, 2);
+    return val;
+}
+
+static void bcmpkt_lbhdr_eth_ecmp_member_id_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 9, 14, val);
+}
+
+static uint32_t bcmpkt_lbhdr_eth_ecmp_member_id_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 9, 14);
+    return val;
+}
+
+static void bcmpkt_lbhdr_eth_int_cn_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 1, 2, val);
+}
+
+static uint32_t bcmpkt_lbhdr_eth_int_cn_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 1, 2);
+    return val;
+}
+
+static void bcmpkt_lbhdr_eth_int_pri_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 3, 4, val);
+}
+
+static uint32_t bcmpkt_lbhdr_eth_int_pri_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 3, 4);
+    return val;
+}
+
+static void bcmpkt_lbhdr_eth_mcast_lb_index_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return;
+    }
+    WORD_FIELD_SET(data[1], 6, 8, val);
+}
+
+static uint32_t bcmpkt_lbhdr_eth_mcast_lb_index_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[1], 6, 8);
+    return val;
+}
+
+static void bcmpkt_lbhdr_eth_mcast_lb_index_vld_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return;
+    }
+    WORD_FIELD_SET(data[1], 14, 1, val);
+}
+
+static uint32_t bcmpkt_lbhdr_eth_mcast_lb_index_vld_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[1], 14, 1);
+    return val;
+}
+
+static void bcmpkt_lbhdr_eth_pp_port_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return;
+    }
+    WORD_FIELD_SET(data[3], 0, 9, val);
+}
+
+static uint32_t bcmpkt_lbhdr_eth_pp_port_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[3], 0, 9);
+    return val;
+}
+
+static void bcmpkt_lbhdr_eth_qos_fields_vld_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 0, 1, val);
+}
+
+static uint32_t bcmpkt_lbhdr_eth_qos_fields_vld_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 0, 1);
+    return val;
+}
+
+static void bcmpkt_lbhdr_eth_routed_pkt_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return;
+    }
+    WORD_FIELD_SET(data[3], 31, 1, val);
+}
+
+static uint32_t bcmpkt_lbhdr_eth_routed_pkt_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[3], 31, 1);
+    return val;
+}
+
+static void bcmpkt_lbhdr_eth_subflow_type_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return;
+    }
+    WORD_FIELD_SET(data[3], 9, 2, val);
+}
+
+static uint32_t bcmpkt_lbhdr_eth_subflow_type_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[3], 9, 2);
+    return val;
+}
+
+static void bcmpkt_lbhdr_ethernet_vrf_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 23, 9, val & MASK(9));
+    WORD_FIELD_SET(data[1], 0, 4, (val >> 9) & MASK(4));
+}
+
+static uint32_t bcmpkt_lbhdr_ethernet_vrf_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return 0;
+    }
+    val = (WORD_FIELD_GET(data[2], 23, 9) | (WORD_FIELD_GET(data[1], 0, 4) << 9)) ;
+    return val;
+}
+
+static void bcmpkt_lbhdr_ethernet_vrf_valid_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return;
+    }
+    WORD_FIELD_SET(data[1], 4, 1, val);
+}
+
+static uint32_t bcmpkt_lbhdr_ethernet_vrf_valid_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[1], 4, 1);
+    return val;
+}
+
+static uint32_t bcmpkt_lbhdr_i_size_get(uint32_t *data, uint32_t **addr)
+{
+    return 4;
+}
+
+
+const bcmpkt_lbhdr_fget_t bcm56998_a0_lbhdr_fget = {
+    {
+        bcmpkt_lbhdr_start_get,
+        bcmpkt_lbhdr_header_type_get,
+        bcmpkt_lbhdr_input_priority_get,
+        bcmpkt_lbhdr_pkt_profile_get,
+        bcmpkt_lbhdr_visibility_pkt_get,
+        bcmpkt_lbhdr_source_get,
+        bcmpkt_lbhdr_source_type_get,
+        bcmpkt_lbhdr_trill_ac_cng_get,
+        bcmpkt_lbhdr_trill_ac_tc_get,
+        NULL,
+        bcmpkt_lbhdr_trill_nw_cng_get,
+        bcmpkt_lbhdr_trill_nw_tc_get,
+        bcmpkt_lbhdr_eth_dest_type_get,
+        bcmpkt_lbhdr_eth_dest_get,
+        bcmpkt_lbhdr_eth_dp_get,
+        bcmpkt_lbhdr_eth_ecmp_member_id_get,
+        bcmpkt_lbhdr_eth_int_cn_get,
+        bcmpkt_lbhdr_eth_int_pri_get,
+        bcmpkt_lbhdr_eth_mcast_lb_index_get,
+        bcmpkt_lbhdr_eth_mcast_lb_index_vld_get,
+        bcmpkt_lbhdr_eth_pp_port_get,
+        bcmpkt_lbhdr_eth_qos_fields_vld_get,
+        bcmpkt_lbhdr_eth_routed_pkt_get,
+        bcmpkt_lbhdr_eth_subflow_type_get,
+        bcmpkt_lbhdr_ethernet_vrf_get,
+        bcmpkt_lbhdr_ethernet_vrf_valid_get,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL
+    }
+};
+
+
+const bcmpkt_lbhdr_fset_t bcm56998_a0_lbhdr_fset = {
+    {
+        bcmpkt_lbhdr_start_set,
+        bcmpkt_lbhdr_header_type_set,
+        bcmpkt_lbhdr_input_priority_set,
+        bcmpkt_lbhdr_pkt_profile_set,
+        bcmpkt_lbhdr_visibility_pkt_set,
+        bcmpkt_lbhdr_source_set,
+        bcmpkt_lbhdr_source_type_set,
+        bcmpkt_lbhdr_trill_ac_cng_set,
+        bcmpkt_lbhdr_trill_ac_tc_set,
+        NULL,
+        bcmpkt_lbhdr_trill_nw_cng_set,
+        bcmpkt_lbhdr_trill_nw_tc_set,
+        bcmpkt_lbhdr_eth_dest_type_set,
+        bcmpkt_lbhdr_eth_dest_set,
+        bcmpkt_lbhdr_eth_dp_set,
+        bcmpkt_lbhdr_eth_ecmp_member_id_set,
+        bcmpkt_lbhdr_eth_int_cn_set,
+        bcmpkt_lbhdr_eth_int_pri_set,
+        bcmpkt_lbhdr_eth_mcast_lb_index_set,
+        bcmpkt_lbhdr_eth_mcast_lb_index_vld_set,
+        bcmpkt_lbhdr_eth_pp_port_set,
+        bcmpkt_lbhdr_eth_qos_fields_vld_set,
+        bcmpkt_lbhdr_eth_routed_pkt_set,
+        bcmpkt_lbhdr_eth_subflow_type_set,
+        bcmpkt_lbhdr_ethernet_vrf_set,
+        bcmpkt_lbhdr_ethernet_vrf_valid_set,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL
+    }
+};
+
+
+const bcmpkt_lbhdr_figet_t bcm56998_a0_lbhdr_figet = {
+    {
+        bcmpkt_lbhdr_i_size_get
+    }
+};
+
+static shr_enum_map_t bcm56998_a0_lbhdr_view_types[] = {
+    {"trill_nw", 1},
+    {"trill_ac", 2},
+    {"ethernet", 3},
+    {NULL, -1},
+};
+
+/* -2: unsupported, -1: global, others: view's value */
+static int bcm56998_a0_lbhdr_view_infos[BCMPKT_LBHDR_FID_COUNT] = {
+     -1, -1, -1, -1, -1, -1, -1,  2,  2, -2,  1,  1,  3,  3,  3,  3,
+      3,  3,  3,  3,  3,  3,  3,  3,  3,  3, -2, -2, -2, -2, -2, -2,
+     -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+     -2,
+};
+
+
+void bcm56998_a0_lbhdr_view_info_get(bcmpkt_pmd_view_info_t *info)
+{
+    info->view_infos = bcm56998_a0_lbhdr_view_infos;
+    info->view_types = bcm56998_a0_lbhdr_view_types;
+    info->view_type_get = bcmpkt_lbhdr_header_type_get;
+}
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56998_a0/bcm56998_a0_pkt_rxpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56998_a0/bcm56998_a0_pkt_rxpmd.c
new file mode 100644
index 000000000..9b92e402a
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56998_a0/bcm56998_a0_pkt_rxpmd.c
@@ -0,0 +1,1140 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated from the registers file.
+ * Edits to this file will be lost when it is regenerated.
+ * Tool: INTERNAL/regs/xgs/generate-pmd.pl
+ *
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ *
+ * This file provides RXPMD access functions for BCM56998_A0.
+ *
+ ******************************************************************************/
+
+#include <sal/sal_types.h>
+#include <bcmpkt/bcmpkt_rxpmd.h>
+#include <bcmpkt/bcmpkt_rxpmd_internal.h>
+
+#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1)
+#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l))
+#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s)))
+#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s)))
+/*******************************************************************************
+ * SWFORMAT:  RXPMD
+ * BLOCKS:
+ * SIZE:     416
+ ******************************************************************************/
+static void bcmpkt_rxpmd_unicast_queue_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[4], 24, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_unicast_queue_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[4], 24, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_queue_num_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[12], 22, 6, val);
+}
+
+static uint32_t bcmpkt_rxpmd_queue_num_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[12], 22, 6);
+    return val;
+}
+
+static void bcmpkt_rxpmd_cpu_cos_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[12], 22, 6, val);
+}
+
+static uint32_t bcmpkt_rxpmd_cpu_cos_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[12], 22, 6);
+    return val;
+}
+
+static void bcmpkt_rxpmd_matched_rule_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[8], 3, 8, val);
+}
+
+static uint32_t bcmpkt_rxpmd_matched_rule_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[8], 3, 8);
+    return val;
+}
+
+static void bcmpkt_rxpmd_pkt_length_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[7], 0, 14, val);
+}
+
+static uint32_t bcmpkt_rxpmd_pkt_length_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[7], 0, 14);
+    return val;
+}
+
+static void bcmpkt_rxpmd_src_port_num_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[6], 22, 9, val);
+}
+
+static uint32_t bcmpkt_rxpmd_src_port_num_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[6], 22, 9);
+    return val;
+}
+
+static void bcmpkt_rxpmd_outer_vid_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[8], 18, 12, val);
+}
+
+static uint32_t bcmpkt_rxpmd_outer_vid_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[8], 18, 12);
+    return val;
+}
+
+static void bcmpkt_rxpmd_outer_cfi_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[8], 14, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_outer_cfi_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[8], 14, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_outer_pri_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[8], 15, 3, val);
+}
+
+static uint32_t bcmpkt_rxpmd_outer_pri_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[8], 15, 3);
+    return val;
+}
+
+static void bcmpkt_rxpmd_special_packet_indicator_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[6], 21, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_special_packet_indicator_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[6], 21, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_special_packet_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[9], 5, 3, val);
+}
+
+static uint32_t bcmpkt_rxpmd_special_packet_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[9], 5, 3);
+    return val;
+}
+
+static void bcmpkt_rxpmd_change_dscp_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[12], 29, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_change_dscp_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[12], 29, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_dscp_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[9], 5, 6, val);
+}
+
+static uint32_t bcmpkt_rxpmd_dscp_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[9], 5, 6);
+    return val;
+}
+
+static void bcmpkt_rxpmd_change_ecn_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[12], 30, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_change_ecn_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[12], 30, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_ecn_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[9], 11, 2, val);
+}
+
+static uint32_t bcmpkt_rxpmd_ecn_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[9], 11, 2);
+    return val;
+}
+
+static void bcmpkt_rxpmd_timestamp_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[4], 16, 2, val);
+}
+
+static uint32_t bcmpkt_rxpmd_timestamp_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[4], 16, 2);
+    return val;
+}
+
+static void bcmpkt_rxpmd_timestamp_set(uint32_t *data, uint32_t val)
+{
+    data[5] = val;
+}
+
+static uint32_t bcmpkt_rxpmd_timestamp_get(uint32_t *data)
+{
+    uint32_t val;
+    val = data[5];
+    return val;
+}
+
+static void bcmpkt_rxpmd_timestamp_hi_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[4], 0, 16, val);
+}
+
+static uint32_t bcmpkt_rxpmd_timestamp_hi_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[4], 0, 16);
+    return val;
+}
+
+static void bcmpkt_rxpmd_mtp_index_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[8], 11, 3, val);
+}
+
+static uint32_t bcmpkt_rxpmd_mtp_index_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[8], 11, 3);
+    return val;
+}
+
+static void bcmpkt_rxpmd_bpdu_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[12], 28, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_bpdu_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[12], 28, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_l3only_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[8], 2, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_l3only_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[8], 2, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_ip_routed_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[6], 0, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_ip_routed_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[6], 0, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_uc_sw_copy_dropped_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[4], 23, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_uc_sw_copy_dropped_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[4], 23, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_switch_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[6], 31, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_switch_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[6], 31, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_ing_otag_action_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[9], 30, 2, val);
+}
+
+static uint32_t bcmpkt_rxpmd_ing_otag_action_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[9], 30, 2);
+    return val;
+}
+
+static void bcmpkt_rxpmd_ing_tag_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[9], 13, 2, val);
+}
+
+static uint32_t bcmpkt_rxpmd_ing_tag_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[9], 13, 2);
+    return val;
+}
+
+static void bcmpkt_rxpmd_rx_bfd_start_offset_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[12], 14, 8, val);
+}
+
+static uint32_t bcmpkt_rxpmd_rx_bfd_start_offset_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[12], 14, 8);
+    return val;
+}
+
+static void bcmpkt_rxpmd_rx_bfd_start_offset_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[12], 12, 2, val);
+}
+
+static uint32_t bcmpkt_rxpmd_rx_bfd_start_offset_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[12], 12, 2);
+    return val;
+}
+
+static void bcmpkt_rxpmd_rx_bfd_session_index_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[12], 0, 12, val);
+}
+
+static uint32_t bcmpkt_rxpmd_rx_bfd_session_index_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[12], 0, 12);
+    return val;
+}
+
+static void bcmpkt_rxpmd_reason_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[9], 0, 4, val);
+}
+
+static uint32_t bcmpkt_rxpmd_reason_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[9], 0, 4);
+    return val;
+}
+
+static void bcmpkt_rxpmd_do_not_change_ttl_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[9], 4, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_do_not_change_ttl_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[9], 4, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_i2e_classid_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[12], 12, 4, val);
+}
+
+static uint32_t bcmpkt_rxpmd_i2e_classid_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[12], 12, 4);
+    return val;
+}
+
+static void bcmpkt_rxpmd_i2e_classid_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[12], 0, 12, val);
+}
+
+static uint32_t bcmpkt_rxpmd_i2e_classid_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[12], 0, 12);
+    return val;
+}
+
+static void bcmpkt_rxpmd_ing_l3_intf_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[12], 0, 13, val);
+}
+
+static uint32_t bcmpkt_rxpmd_ing_l3_intf_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[12], 0, 13);
+    return val;
+}
+
+static void bcmpkt_rxpmd_regen_crc_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[7], 14, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_regen_crc_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[7], 14, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_entropy_label_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[6], 1, 20, val);
+}
+
+static uint32_t bcmpkt_rxpmd_entropy_label_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[6], 1, 20);
+    return val;
+}
+
+static void bcmpkt_rxpmd_tunnel_decap_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[4], 18, 5, val);
+}
+
+static uint32_t bcmpkt_rxpmd_tunnel_decap_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[4], 18, 5);
+    return val;
+}
+
+static void bcmpkt_rxpmd_dlb_id_valid_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[12], 31, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_dlb_id_valid_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[12], 31, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_dlb_id_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[4], 25, 7, val);
+}
+
+static uint32_t bcmpkt_rxpmd_dlb_id_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[4], 25, 7);
+    return val;
+}
+
+static void bcmpkt_rxpmd_replication_or_nhop_index_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[7], 15, 17, val);
+}
+
+static uint32_t bcmpkt_rxpmd_replication_or_nhop_index_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[7], 15, 17);
+    return val;
+}
+
+static void bcmpkt_rxpmd_incoming_int_hdr_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[8], 30, 2, val);
+}
+
+static uint32_t bcmpkt_rxpmd_incoming_int_hdr_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[8], 30, 2);
+    return val;
+}
+
+static void bcmpkt_rxpmd_ing_l3_intf_valid_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[12], 16, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_ing_l3_intf_valid_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[12], 16, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_o_nhi_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[9], 15, 15, val);
+}
+
+static uint32_t bcmpkt_rxpmd_o_nhi_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[9], 15, 15);
+    return val;
+}
+
+static void bcmpkt_rxpmd_ieu_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[8], 0, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_ieu_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[8], 0, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_ieu_valid_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[8], 1, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_ieu_valid_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[8], 1, 1);
+    return val;
+}
+
+static uint32_t bcmpkt_rxpmd_i_size_get(uint32_t *data, uint32_t **addr)
+{
+    return 13;
+}
+
+static uint32_t bcmpkt_rxpmd_i_reason_get(uint32_t *data, uint32_t **addr)
+{
+    *addr = data + 10;
+    return 2;
+}
+
+static uint32_t bcmpkt_rxpmd_i_module_hdr_get(uint32_t *data, uint32_t **addr)
+{
+    *addr = data + 0;
+    return 4;
+}
+
+/*******************************************************************************
+ * SWFORMAT:  RX_REASON
+ * BLOCKS:
+ * SIZE:     46
+ ******************************************************************************/
+void bcm56998_a0_rx_reason_encode(const bcmpkt_rx_reasons_t *reasons, uint32_t *data)
+{
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_UVLAN)) {
+        data[1] |= (0x1 << 0);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SLF)) {
+        data[1] |= (0x1 << 1);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_DLF)) {
+        data[1] |= (0x1 << 2);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L2MOVE)) {
+        data[1] |= (0x1 << 3);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L2CPU)) {
+        data[1] |= (0x1 << 4);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MISS)) {
+        data[1] |= (0x1 << 5);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3DST_MISS)) {
+        data[1] |= (0x1 << 6);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MOVE)) {
+        data[1] |= (0x1 << 7);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_MC_MISS)) {
+        data[1] |= (0x1 << 8);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_MISS)) {
+        data[1] |= (0x1 << 9);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_FFP)) {
+        data[1] |= (0x1 << 10);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3HDR_ERR)) {
+        data[1] |= (0x1 << 11);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_PROTOCOL_PKT)) {
+        data[1] |= (0x1 << 12);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_DOS_ATTACK)) {
+        data[1] |= (0x1 << 13);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_MARTIAN_ADDR)) {
+        data[1] |= (0x1 << 14);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_TUNNEL_ERR)) {
+        data[1] |= (0x1 << 15);
+    }
+
+    if (BCMPKT_RX_REASON_GET(*reasons,  BCMPKT_RX_REASON_CPU_SFLOW_CPU_SFLOW_FLEX)) {
+        WORD_FIELD_SET(data[1], 16, 2, 1);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons,  BCMPKT_RX_REASON_CPU_SFLOW_CPU_SFLOW_DST)) {
+        WORD_FIELD_SET(data[1], 16, 2, 2);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons,  BCMPKT_RX_REASON_CPU_SFLOW_CPU_SFLOW_SRC)) {
+        WORD_FIELD_SET(data[1], 16, 2, 3);
+    }
+    /*! For mask set ONLY. */
+    if (BCMPKT_RX_REASON_GET(*reasons,  BCMPKT_RX_REASON_CPU_SFLOW)) {
+        WORD_FIELD_SET(data[1], 16, 2, 3);
+    }
+
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_ICMP_REDIRECT)) {
+        data[1] |= (0x1 << 18);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_L3_SLOWPATH)) {
+        data[1] |= (0x1 << 19);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_PARITY_ERROR)) {
+        data[1] |= (0x1 << 20);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_L3_MTU_CHECK_FAIL)) {
+        data[1] |= (0x1 << 21);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MCIDX_ERROR)) {
+        data[1] |= (0x1 << 22);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_VFP)) {
+        data[1] |= (0x1 << 23);
+    }
+
+    if (BCMPKT_RX_REASON_GET(*reasons,  BCMPKT_RX_REASON_MPLS_PROC_ERROR_INVALID_PAYLOAD)) {
+        WORD_FIELD_SET(data[1], 24, 3, 1);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons,  BCMPKT_RX_REASON_MPLS_PROC_ERROR_INVALID_ACTION)) {
+        WORD_FIELD_SET(data[1], 24, 3, 2);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons,  BCMPKT_RX_REASON_MPLS_PROC_ERROR_LABEL_MISS)) {
+        WORD_FIELD_SET(data[1], 24, 3, 3);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons,  BCMPKT_RX_REASON_MPLS_PROC_ERROR_TTL_CHECK_FAIL)) {
+        WORD_FIELD_SET(data[1], 24, 3, 4);
+    }
+    /*! For mask set ONLY. */
+    if (BCMPKT_RX_REASON_GET(*reasons,  BCMPKT_RX_REASON_MPLS_PROC_ERROR)) {
+        WORD_FIELD_SET(data[1], 24, 3, 7);
+    }
+
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_PBT_NONUC_PKT)) {
+        data[1] |= (0x1 << 27);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_L3_NEXT_HOP)) {
+        data[1] |= (0x1 << 28);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MY_STATION)) {
+        data[1] |= (0x1 << 29);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_TIME_SYNC)) {
+        data[1] |= (0x1 << 30);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_TUNNEL_DECAP_ECN_ERROR)) {
+        data[1] |= (0x1 << 31);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_BFD_SLOWPATH)) {
+        data[0] |= (0x1 << 0);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_BFD_ERROR)) {
+        data[0] |= (0x1 << 1);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_PACKET_TRACE_TO_CPU)) {
+        data[0] |= (0x1 << 2);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_UNKNOWN_CONTROL_PKT)) {
+        data[0] |= (0x1 << 3);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_ALERT_LABEL)) {
+        data[0] |= (0x1 << 4);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_INTERFACE_MISMATCH)) {
+        data[0] |= (0x1 << 5);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_DLB_MONITOR)) {
+        data[0] |= (0x1 << 6);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_INT_TURN_AROUND)) {
+        data[0] |= (0x1 << 7);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_ETRAP_MONITOR)) {
+        data[0] |= (0x1 << 8);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_SRV6_ERROR)) {
+        data[0] |= (0x1 << 9);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_VXLAN_VN_ID_MISS)) {
+        data[0] |= (0x1 << 10);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_VXLAN_SIP_MISS)) {
+        data[0] |= (0x1 << 11);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_ADAPT_MISS)) {
+        data[0] |= (0x1 << 12);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_NH_PROTO_STATUS_DOWN)) {
+        data[0] |= (0x1 << 13);
+    }
+}
+
+void bcm56998_a0_rx_reason_decode(const uint32_t *data, bcmpkt_rx_reasons_t *reasons)
+{
+    uint32_t val;
+    COMPILER_REFERENCE(val);
+    if (data[1] & (0x1 << 0)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_UVLAN);
+    }
+    if (data[1] & (0x1 << 1)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_SLF);
+    }
+    if (data[1] & (0x1 << 2)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_DLF);
+    }
+    if (data[1] & (0x1 << 3)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L2MOVE);
+    }
+    if (data[1] & (0x1 << 4)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L2CPU);
+    }
+    if (data[1] & (0x1 << 5)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MISS);
+    }
+    if (data[1] & (0x1 << 6)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3DST_MISS);
+    }
+    if (data[1] & (0x1 << 7)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MOVE);
+    }
+    if (data[1] & (0x1 << 8)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_MC_MISS);
+    }
+    if (data[1] & (0x1 << 9)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_MISS);
+    }
+    if (data[1] & (0x1 << 10)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_FFP);
+    }
+    if (data[1] & (0x1 << 11)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3HDR_ERR);
+    }
+    if (data[1] & (0x1 << 12)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_PROTOCOL_PKT);
+    }
+    if (data[1] & (0x1 << 13)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_DOS_ATTACK);
+    }
+    if (data[1] & (0x1 << 14)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_MARTIAN_ADDR);
+    }
+    if (data[1] & (0x1 << 15)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_TUNNEL_ERR);
+    }
+
+    val = WORD_FIELD_GET(data[1], 16, 2);
+    if (val) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW);
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW + val);
+    }
+
+    if (data[1] & (0x1 << 18)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_ICMP_REDIRECT);
+    }
+    if (data[1] & (0x1 << 19)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_L3_SLOWPATH);
+    }
+    if (data[1] & (0x1 << 20)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_PARITY_ERROR);
+    }
+    if (data[1] & (0x1 << 21)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_L3_MTU_CHECK_FAIL);
+    }
+    if (data[1] & (0x1 << 22)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MCIDX_ERROR);
+    }
+    if (data[1] & (0x1 << 23)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_VFP);
+    }
+
+    val = WORD_FIELD_GET(data[1], 24, 3);
+    if (val) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR);
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR + val);
+    }
+
+    if (data[1] & (0x1 << 27)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_PBT_NONUC_PKT);
+    }
+    if (data[1] & (0x1 << 28)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_L3_NEXT_HOP);
+    }
+    if (data[1] & (0x1 << 29)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MY_STATION);
+    }
+    if (data[1] & (0x1 << 30)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_TIME_SYNC);
+    }
+    if (data[1] & (0x1 << 31)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_TUNNEL_DECAP_ECN_ERROR);
+    }
+    if (data[0] & (0x1 << 0)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_BFD_SLOWPATH);
+    }
+    if (data[0] & (0x1 << 1)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_BFD_ERROR);
+    }
+    if (data[0] & (0x1 << 2)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_PACKET_TRACE_TO_CPU);
+    }
+    if (data[0] & (0x1 << 3)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_UNKNOWN_CONTROL_PKT);
+    }
+    if (data[0] & (0x1 << 4)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_ALERT_LABEL);
+    }
+    if (data[0] & (0x1 << 5)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_INTERFACE_MISMATCH);
+    }
+    if (data[0] & (0x1 << 6)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_DLB_MONITOR);
+    }
+    if (data[0] & (0x1 << 7)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_INT_TURN_AROUND);
+    }
+    if (data[0] & (0x1 << 8)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_ETRAP_MONITOR);
+    }
+    if (data[0] & (0x1 << 9)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_SRV6_ERROR);
+    }
+    if (data[0] & (0x1 << 10)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_VXLAN_VN_ID_MISS);
+    }
+    if (data[0] & (0x1 << 11)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_VXLAN_SIP_MISS);
+    }
+    if (data[0] & (0x1 << 12)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_ADAPT_MISS);
+    }
+    if (data[0] & (0x1 << 13)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_NH_PROTO_STATUS_DOWN);
+    }
+}
+
+void bcm56998_a0_ep_rx_reason_encode(const bcmpkt_rx_reasons_t *reasons, uint32_t *data)
+{
+}
+
+void bcm56998_a0_ep_rx_reason_decode(const uint32_t *data, bcmpkt_rx_reasons_t *reasons)
+{
+}
+
+const bcmpkt_rxpmd_fget_t bcm56998_a0_rxpmd_fget = {
+    {
+        bcmpkt_rxpmd_unicast_queue_get,
+        bcmpkt_rxpmd_queue_num_get,
+        bcmpkt_rxpmd_cpu_cos_get,
+        NULL,
+        bcmpkt_rxpmd_matched_rule_get,
+        bcmpkt_rxpmd_pkt_length_get,
+        bcmpkt_rxpmd_src_port_num_get,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_outer_vid_get,
+        bcmpkt_rxpmd_outer_cfi_get,
+        bcmpkt_rxpmd_outer_pri_get,
+        bcmpkt_rxpmd_special_packet_indicator_get,
+        bcmpkt_rxpmd_special_packet_type_get,
+        bcmpkt_rxpmd_change_dscp_get,
+        bcmpkt_rxpmd_dscp_get,
+        bcmpkt_rxpmd_change_ecn_get,
+        bcmpkt_rxpmd_ecn_get,
+        bcmpkt_rxpmd_timestamp_type_get,
+        bcmpkt_rxpmd_timestamp_get,
+        bcmpkt_rxpmd_timestamp_hi_get,
+        bcmpkt_rxpmd_mtp_index_get,
+        bcmpkt_rxpmd_bpdu_get,
+        NULL,
+        bcmpkt_rxpmd_l3only_get,
+        bcmpkt_rxpmd_ip_routed_get,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_uc_sw_copy_dropped_get,
+        bcmpkt_rxpmd_switch_get,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_ing_otag_action_get,
+        bcmpkt_rxpmd_ing_tag_type_get,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_rx_bfd_start_offset_get,
+        bcmpkt_rxpmd_rx_bfd_start_offset_type_get,
+        bcmpkt_rxpmd_rx_bfd_session_index_get,
+        bcmpkt_rxpmd_reason_type_get,
+        bcmpkt_rxpmd_do_not_change_ttl_get,
+        bcmpkt_rxpmd_i2e_classid_type_get,
+        bcmpkt_rxpmd_i2e_classid_get,
+        bcmpkt_rxpmd_ing_l3_intf_get,
+        NULL,
+        bcmpkt_rxpmd_regen_crc_get,
+        bcmpkt_rxpmd_entropy_label_get,
+        bcmpkt_rxpmd_tunnel_decap_type_get,
+        bcmpkt_rxpmd_dlb_id_valid_get,
+        bcmpkt_rxpmd_dlb_id_get,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_replication_or_nhop_index_get,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_incoming_int_hdr_type_get,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_ing_l3_intf_valid_get,
+        bcmpkt_rxpmd_o_nhi_get,
+        bcmpkt_rxpmd_ieu_get,
+        bcmpkt_rxpmd_ieu_valid_get,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL
+    }
+};
+
+
+const bcmpkt_rxpmd_fset_t bcm56998_a0_rxpmd_fset = {
+    {
+        bcmpkt_rxpmd_unicast_queue_set,
+        bcmpkt_rxpmd_queue_num_set,
+        bcmpkt_rxpmd_cpu_cos_set,
+        NULL,
+        bcmpkt_rxpmd_matched_rule_set,
+        bcmpkt_rxpmd_pkt_length_set,
+        bcmpkt_rxpmd_src_port_num_set,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_outer_vid_set,
+        bcmpkt_rxpmd_outer_cfi_set,
+        bcmpkt_rxpmd_outer_pri_set,
+        bcmpkt_rxpmd_special_packet_indicator_set,
+        bcmpkt_rxpmd_special_packet_type_set,
+        bcmpkt_rxpmd_change_dscp_set,
+        bcmpkt_rxpmd_dscp_set,
+        bcmpkt_rxpmd_change_ecn_set,
+        bcmpkt_rxpmd_ecn_set,
+        bcmpkt_rxpmd_timestamp_type_set,
+        bcmpkt_rxpmd_timestamp_set,
+        bcmpkt_rxpmd_timestamp_hi_set,
+        bcmpkt_rxpmd_mtp_index_set,
+        bcmpkt_rxpmd_bpdu_set,
+        NULL,
+        bcmpkt_rxpmd_l3only_set,
+        bcmpkt_rxpmd_ip_routed_set,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_uc_sw_copy_dropped_set,
+        bcmpkt_rxpmd_switch_set,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_ing_otag_action_set,
+        bcmpkt_rxpmd_ing_tag_type_set,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_rx_bfd_start_offset_set,
+        bcmpkt_rxpmd_rx_bfd_start_offset_type_set,
+        bcmpkt_rxpmd_rx_bfd_session_index_set,
+        bcmpkt_rxpmd_reason_type_set,
+        bcmpkt_rxpmd_do_not_change_ttl_set,
+        bcmpkt_rxpmd_i2e_classid_type_set,
+        bcmpkt_rxpmd_i2e_classid_set,
+        bcmpkt_rxpmd_ing_l3_intf_set,
+        NULL,
+        bcmpkt_rxpmd_regen_crc_set,
+        bcmpkt_rxpmd_entropy_label_set,
+        bcmpkt_rxpmd_tunnel_decap_type_set,
+        bcmpkt_rxpmd_dlb_id_valid_set,
+        bcmpkt_rxpmd_dlb_id_set,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_replication_or_nhop_index_set,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_incoming_int_hdr_type_set,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_ing_l3_intf_valid_set,
+        bcmpkt_rxpmd_o_nhi_set,
+        bcmpkt_rxpmd_ieu_set,
+        bcmpkt_rxpmd_ieu_valid_set,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL
+    }
+};
+
+
+const bcmpkt_rxpmd_figet_t bcm56998_a0_rxpmd_figet = {
+    {
+        bcmpkt_rxpmd_i_size_get,
+        bcmpkt_rxpmd_i_reason_get,
+        bcmpkt_rxpmd_i_module_hdr_get,
+        NULL
+    }
+};
+
+static shr_enum_map_t bcm56998_a0_rxpmd_view_types[] = {
+    {NULL, -1},
+};
+
+/* -2: unsupported, -1: global, others: view's value */
+static int bcm56998_a0_rxpmd_view_infos[BCMPKT_RXPMD_FID_COUNT] = {
+     -1, -1, -1, -2, -1, -1, -1, -2, -2, -2, -1, -1, -1, -1, -1, -1,
+     -1, -1, -1, -1, -1, -1, -1, -1, -2, -1, -1, -2, -2, -1, -1, -2,
+     -2, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1,
+     -1, -1, -1, -1, -1, -1, -1, -2, -1, -1, -1, -1, -1, -2, -2, -2,
+     -2, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, -2, -2, -2,
+     -1, -1, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+};
+
+
+void bcm56998_a0_rxpmd_view_info_get(bcmpkt_pmd_view_info_t *info)
+{
+    info->view_infos = bcm56998_a0_rxpmd_view_infos;
+    info->view_types = bcm56998_a0_rxpmd_view_types;
+    info->view_type_get = NULL;
+}
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56998_a0/bcm56998_a0_pkt_txpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56998_a0/bcm56998_a0_pkt_txpmd.c
new file mode 100644
index 000000000..a358b5d76
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56998_a0/bcm56998_a0_pkt_txpmd.c
@@ -0,0 +1,526 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated from the registers file.
+ * Edits to this file will be lost when it is regenerated.
+ * Tool: INTERNAL/regs/xgs/generate-pmd.pl
+ *
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ *
+ * This file provides TXPMD access functions for BCM56998_A0.
+ *
+ ******************************************************************************/
+
+#include <sal/sal_types.h>
+#include <bcmpkt/bcmpkt_txpmd_internal.h>
+
+#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1)
+#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l))
+#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s)))
+#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s)))
+/*******************************************************************************
+ * SWFORMAT:  TXPMD
+ * BLOCKS:
+ * SIZE:     128
+ ******************************************************************************/
+static void bcmpkt_txpmd_start_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 30, 2, val);
+}
+
+static uint32_t bcmpkt_txpmd_start_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 30, 2);
+    return val;
+}
+
+static void bcmpkt_txpmd_header_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 24, 6, val);
+}
+
+static uint32_t bcmpkt_txpmd_header_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 24, 6);
+    return val;
+}
+
+static void bcmpkt_txpmd_pkt_length_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 10, 14, val);
+}
+
+static uint32_t bcmpkt_txpmd_pkt_length_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 10, 14);
+    return val;
+}
+
+static void bcmpkt_txpmd_ipcf_ptr_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 24, 8, val);
+}
+
+static uint32_t bcmpkt_txpmd_ipcf_ptr_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 24, 8);
+    return val;
+}
+
+static void bcmpkt_txpmd_sop_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 9, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_sop_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 9, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_eop_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 8, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_eop_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 8, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_cell_length_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 0, 8, val);
+}
+
+static uint32_t bcmpkt_txpmd_cell_length_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 0, 8);
+    return val;
+}
+
+static void bcmpkt_txpmd_cell_error_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 20, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_cell_error_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 20, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_local_dest_port_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 31, 1, val & MASK(1));
+    WORD_FIELD_SET(data[1], 0, 8, (val >> 1) & MASK(8));
+}
+
+static uint32_t bcmpkt_txpmd_local_dest_port_get(uint32_t *data)
+{
+    uint32_t val;
+    val = (WORD_FIELD_GET(data[2], 31, 1) | (WORD_FIELD_GET(data[1], 0, 8) << 1)) ;
+    return val;
+}
+
+static void bcmpkt_txpmd_src_modid_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 0, 8, val);
+}
+
+static uint32_t bcmpkt_txpmd_src_modid_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 0, 8);
+    return val;
+}
+
+static void bcmpkt_txpmd_cos_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 8, 6, val);
+}
+
+static uint32_t bcmpkt_txpmd_cos_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 8, 6);
+    return val;
+}
+
+static void bcmpkt_txpmd_input_pri_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 25, 4, val);
+}
+
+static uint32_t bcmpkt_txpmd_input_pri_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 25, 4);
+    return val;
+}
+
+static void bcmpkt_txpmd_unicast_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 14, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_unicast_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 14, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_rqe_q_num_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 16, 4, val);
+}
+
+static uint32_t bcmpkt_txpmd_rqe_q_num_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 16, 4);
+    return val;
+}
+
+static void bcmpkt_txpmd_set_l2bm_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 15, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_set_l2bm_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 15, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_ieee1588_one_step_enable_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 19, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_ieee1588_one_step_enable_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 19, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_ieee1588_regen_udp_checksum_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 18, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_ieee1588_regen_udp_checksum_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 18, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 17, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 17, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 8, 8, val);
+}
+
+static uint32_t bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 8, 8);
+    return val;
+}
+
+static void bcmpkt_txpmd_tx_ts_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 16, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_tx_ts_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 16, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_spid_override_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 24, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_spid_override_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 24, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_spid_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 22, 2, val);
+}
+
+static uint32_t bcmpkt_txpmd_spid_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 22, 2);
+    return val;
+}
+
+static void bcmpkt_txpmd_spap_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 20, 2, val);
+}
+
+static uint32_t bcmpkt_txpmd_spap_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 20, 2);
+    return val;
+}
+
+static uint32_t bcmpkt_txpmd_i_size_get(uint32_t *data, uint32_t **addr)
+{
+    return 4;
+}
+
+
+const bcmpkt_txpmd_fget_t bcm56998_a0_txpmd_fget = {
+    {
+        bcmpkt_txpmd_start_get,
+        bcmpkt_txpmd_header_type_get,
+        bcmpkt_txpmd_pkt_length_get,
+        bcmpkt_txpmd_ipcf_ptr_get,
+        bcmpkt_txpmd_sop_get,
+        bcmpkt_txpmd_eop_get,
+        bcmpkt_txpmd_cell_length_get,
+        bcmpkt_txpmd_cell_error_get,
+        bcmpkt_txpmd_local_dest_port_get,
+        bcmpkt_txpmd_src_modid_get,
+        bcmpkt_txpmd_cos_get,
+        bcmpkt_txpmd_input_pri_get,
+        bcmpkt_txpmd_unicast_get,
+        bcmpkt_txpmd_rqe_q_num_get,
+        bcmpkt_txpmd_set_l2bm_get,
+        bcmpkt_txpmd_ieee1588_one_step_enable_get,
+        bcmpkt_txpmd_ieee1588_regen_udp_checksum_get,
+        bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_get,
+        bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_get,
+        bcmpkt_txpmd_tx_ts_get,
+        bcmpkt_txpmd_spid_override_get,
+        bcmpkt_txpmd_spid_get,
+        bcmpkt_txpmd_spap_get,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL
+    }
+};
+
+
+const bcmpkt_txpmd_fset_t bcm56998_a0_txpmd_fset = {
+    {
+        bcmpkt_txpmd_start_set,
+        bcmpkt_txpmd_header_type_set,
+        bcmpkt_txpmd_pkt_length_set,
+        bcmpkt_txpmd_ipcf_ptr_set,
+        bcmpkt_txpmd_sop_set,
+        bcmpkt_txpmd_eop_set,
+        bcmpkt_txpmd_cell_length_set,
+        bcmpkt_txpmd_cell_error_set,
+        bcmpkt_txpmd_local_dest_port_set,
+        bcmpkt_txpmd_src_modid_set,
+        bcmpkt_txpmd_cos_set,
+        bcmpkt_txpmd_input_pri_set,
+        bcmpkt_txpmd_unicast_set,
+        bcmpkt_txpmd_rqe_q_num_set,
+        bcmpkt_txpmd_set_l2bm_set,
+        bcmpkt_txpmd_ieee1588_one_step_enable_set,
+        bcmpkt_txpmd_ieee1588_regen_udp_checksum_set,
+        bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_set,
+        bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_set,
+        bcmpkt_txpmd_tx_ts_set,
+        bcmpkt_txpmd_spid_override_set,
+        bcmpkt_txpmd_spid_set,
+        bcmpkt_txpmd_spap_set,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL
+    }
+};
+
+
+const bcmpkt_txpmd_figet_t bcm56998_a0_txpmd_figet = {
+    {
+        bcmpkt_txpmd_i_size_get
+    }
+};
+
+static shr_enum_map_t bcm56998_a0_txpmd_view_types[] = {
+    {NULL, -1},
+};
+
+/* -2: unsupported, -1: global, others: view's value */
+static int bcm56998_a0_txpmd_view_infos[BCMPKT_TXPMD_FID_COUNT] = {
+     -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
+     -1, -1, -1, -1, -1, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+     -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+     -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+     -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+     -2, -2, -2,
+};
+
+
+void bcm56998_a0_txpmd_view_info_get(bcmpkt_pmd_view_info_t *info)
+{
+    info->view_infos = bcm56998_a0_txpmd_view_infos;
+    info->view_types = bcm56998_a0_txpmd_view_types;
+    info->view_type_get = NULL;
+}
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56999_a0/bcm56999_a0_pkt_lbhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56999_a0/bcm56999_a0_pkt_lbhdr.c
new file mode 100644
index 000000000..fb32e5f45
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56999_a0/bcm56999_a0_pkt_lbhdr.c
@@ -0,0 +1,592 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated from the registers file.
+ * Edits to this file will be lost when it is regenerated.
+ * Tool: INTERNAL/regs/xgs/generate-pmd.pl
+ *
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ *
+ * This file provides LBHDR access functions for BCM56999_A0.
+ *
+ ******************************************************************************/
+
+#include <sal/sal_types.h>
+#include <bcmpkt/bcmpkt_lbhdr_internal.h>
+
+#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1)
+#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l))
+#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s)))
+#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s)))
+/*******************************************************************************
+ * SWFORMAT:  LBHDR
+ * BLOCKS:
+ * SIZE:     128
+ ******************************************************************************/
+static void bcmpkt_lbhdr_start_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 24, 8, val);
+}
+
+static uint32_t bcmpkt_lbhdr_start_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 24, 8);
+    return val;
+}
+
+static void bcmpkt_lbhdr_header_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 15, 5, val);
+}
+
+static uint32_t bcmpkt_lbhdr_header_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 15, 5);
+    return val;
+}
+
+static void bcmpkt_lbhdr_input_priority_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 20, 4, val);
+}
+
+static uint32_t bcmpkt_lbhdr_input_priority_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 20, 4);
+    return val;
+}
+
+static void bcmpkt_lbhdr_pkt_profile_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 26, 3, val);
+}
+
+static uint32_t bcmpkt_lbhdr_pkt_profile_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 26, 3);
+    return val;
+}
+
+static void bcmpkt_lbhdr_visibility_pkt_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 29, 1, val);
+}
+
+static uint32_t bcmpkt_lbhdr_visibility_pkt_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 29, 1);
+    return val;
+}
+
+static void bcmpkt_lbhdr_source_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 30, 2, val & MASK(2));
+    WORD_FIELD_SET(data[0], 0, 14, (val >> 2) & MASK(14));
+}
+
+static uint32_t bcmpkt_lbhdr_source_get(uint32_t *data)
+{
+    uint32_t val;
+    val = (WORD_FIELD_GET(data[1], 30, 2) | (WORD_FIELD_GET(data[0], 0, 14) << 2)) ;
+    return val;
+}
+
+static void bcmpkt_lbhdr_source_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 14, 1, val);
+}
+
+static uint32_t bcmpkt_lbhdr_source_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 14, 1);
+    return val;
+}
+
+static void bcmpkt_lbhdr_trill_ac_cng_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_AC) {
+        return;
+    }
+    WORD_FIELD_SET(data[3], 4, 2, val);
+}
+
+static uint32_t bcmpkt_lbhdr_trill_ac_cng_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_AC) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[3], 4, 2);
+    return val;
+}
+
+static void bcmpkt_lbhdr_trill_ac_tc_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_AC) {
+        return;
+    }
+    WORD_FIELD_SET(data[3], 0, 4, val);
+}
+
+static uint32_t bcmpkt_lbhdr_trill_ac_tc_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_AC) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[3], 0, 4);
+    return val;
+}
+
+static void bcmpkt_lbhdr_trill_nw_cng_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_NW) {
+        return;
+    }
+    WORD_FIELD_SET(data[3], 4, 2, val);
+}
+
+static uint32_t bcmpkt_lbhdr_trill_nw_cng_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_NW) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[3], 4, 2);
+    return val;
+}
+
+static void bcmpkt_lbhdr_trill_nw_tc_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_NW) {
+        return;
+    }
+    WORD_FIELD_SET(data[3], 0, 4, val);
+}
+
+static uint32_t bcmpkt_lbhdr_trill_nw_tc_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_TRILL_NW) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[3], 0, 4);
+    return val;
+}
+
+static void bcmpkt_lbhdr_eth_dest_type_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return;
+    }
+    WORD_FIELD_SET(data[3], 11, 4, val);
+}
+
+static uint32_t bcmpkt_lbhdr_eth_dest_type_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[3], 11, 4);
+    return val;
+}
+
+static void bcmpkt_lbhdr_eth_dest_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return;
+    }
+    WORD_FIELD_SET(data[3], 15, 16, val);
+}
+
+static uint32_t bcmpkt_lbhdr_eth_dest_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[3], 15, 16);
+    return val;
+}
+
+static void bcmpkt_lbhdr_eth_dp_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 7, 2, val);
+}
+
+static uint32_t bcmpkt_lbhdr_eth_dp_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 7, 2);
+    return val;
+}
+
+static void bcmpkt_lbhdr_eth_ecmp_member_id_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 9, 14, val);
+}
+
+static uint32_t bcmpkt_lbhdr_eth_ecmp_member_id_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 9, 14);
+    return val;
+}
+
+static void bcmpkt_lbhdr_eth_int_cn_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 1, 2, val);
+}
+
+static uint32_t bcmpkt_lbhdr_eth_int_cn_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 1, 2);
+    return val;
+}
+
+static void bcmpkt_lbhdr_eth_int_pri_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 3, 4, val);
+}
+
+static uint32_t bcmpkt_lbhdr_eth_int_pri_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 3, 4);
+    return val;
+}
+
+static void bcmpkt_lbhdr_eth_mcast_lb_index_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return;
+    }
+    WORD_FIELD_SET(data[1], 6, 8, val);
+}
+
+static uint32_t bcmpkt_lbhdr_eth_mcast_lb_index_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[1], 6, 8);
+    return val;
+}
+
+static void bcmpkt_lbhdr_eth_mcast_lb_index_vld_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return;
+    }
+    WORD_FIELD_SET(data[1], 14, 1, val);
+}
+
+static uint32_t bcmpkt_lbhdr_eth_mcast_lb_index_vld_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[1], 14, 1);
+    return val;
+}
+
+static void bcmpkt_lbhdr_eth_pp_port_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return;
+    }
+    WORD_FIELD_SET(data[3], 0, 9, val);
+}
+
+static uint32_t bcmpkt_lbhdr_eth_pp_port_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[3], 0, 9);
+    return val;
+}
+
+static void bcmpkt_lbhdr_eth_qos_fields_vld_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 0, 1, val);
+}
+
+static uint32_t bcmpkt_lbhdr_eth_qos_fields_vld_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 0, 1);
+    return val;
+}
+
+static void bcmpkt_lbhdr_eth_routed_pkt_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return;
+    }
+    WORD_FIELD_SET(data[3], 31, 1, val);
+}
+
+static uint32_t bcmpkt_lbhdr_eth_routed_pkt_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[3], 31, 1);
+    return val;
+}
+
+static void bcmpkt_lbhdr_eth_subflow_type_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return;
+    }
+    WORD_FIELD_SET(data[3], 9, 2, val);
+}
+
+static uint32_t bcmpkt_lbhdr_eth_subflow_type_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[3], 9, 2);
+    return val;
+}
+
+static void bcmpkt_lbhdr_ethernet_vrf_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 23, 9, val & MASK(9));
+    WORD_FIELD_SET(data[1], 0, 4, (val >> 9) & MASK(4));
+}
+
+static uint32_t bcmpkt_lbhdr_ethernet_vrf_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return 0;
+    }
+    val = (WORD_FIELD_GET(data[2], 23, 9) | (WORD_FIELD_GET(data[1], 0, 4) << 9)) ;
+    return val;
+}
+
+static void bcmpkt_lbhdr_ethernet_vrf_valid_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return;
+    }
+    WORD_FIELD_SET(data[1], 4, 1, val);
+}
+
+static uint32_t bcmpkt_lbhdr_ethernet_vrf_valid_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_lbhdr_header_type_get(data) != BCMPKT_LBHDR_HEADER_T_ETHERNET) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[1], 4, 1);
+    return val;
+}
+
+static uint32_t bcmpkt_lbhdr_i_size_get(uint32_t *data, uint32_t **addr)
+{
+    return 4;
+}
+
+
+const bcmpkt_lbhdr_fget_t bcm56999_a0_lbhdr_fget = {
+    {
+        bcmpkt_lbhdr_start_get,
+        bcmpkt_lbhdr_header_type_get,
+        bcmpkt_lbhdr_input_priority_get,
+        bcmpkt_lbhdr_pkt_profile_get,
+        bcmpkt_lbhdr_visibility_pkt_get,
+        bcmpkt_lbhdr_source_get,
+        bcmpkt_lbhdr_source_type_get,
+        bcmpkt_lbhdr_trill_ac_cng_get,
+        bcmpkt_lbhdr_trill_ac_tc_get,
+        NULL,
+        bcmpkt_lbhdr_trill_nw_cng_get,
+        bcmpkt_lbhdr_trill_nw_tc_get,
+        bcmpkt_lbhdr_eth_dest_type_get,
+        bcmpkt_lbhdr_eth_dest_get,
+        bcmpkt_lbhdr_eth_dp_get,
+        bcmpkt_lbhdr_eth_ecmp_member_id_get,
+        bcmpkt_lbhdr_eth_int_cn_get,
+        bcmpkt_lbhdr_eth_int_pri_get,
+        bcmpkt_lbhdr_eth_mcast_lb_index_get,
+        bcmpkt_lbhdr_eth_mcast_lb_index_vld_get,
+        bcmpkt_lbhdr_eth_pp_port_get,
+        bcmpkt_lbhdr_eth_qos_fields_vld_get,
+        bcmpkt_lbhdr_eth_routed_pkt_get,
+        bcmpkt_lbhdr_eth_subflow_type_get,
+        bcmpkt_lbhdr_ethernet_vrf_get,
+        bcmpkt_lbhdr_ethernet_vrf_valid_get,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL
+    }
+};
+
+
+const bcmpkt_lbhdr_fset_t bcm56999_a0_lbhdr_fset = {
+    {
+        bcmpkt_lbhdr_start_set,
+        bcmpkt_lbhdr_header_type_set,
+        bcmpkt_lbhdr_input_priority_set,
+        bcmpkt_lbhdr_pkt_profile_set,
+        bcmpkt_lbhdr_visibility_pkt_set,
+        bcmpkt_lbhdr_source_set,
+        bcmpkt_lbhdr_source_type_set,
+        bcmpkt_lbhdr_trill_ac_cng_set,
+        bcmpkt_lbhdr_trill_ac_tc_set,
+        NULL,
+        bcmpkt_lbhdr_trill_nw_cng_set,
+        bcmpkt_lbhdr_trill_nw_tc_set,
+        bcmpkt_lbhdr_eth_dest_type_set,
+        bcmpkt_lbhdr_eth_dest_set,
+        bcmpkt_lbhdr_eth_dp_set,
+        bcmpkt_lbhdr_eth_ecmp_member_id_set,
+        bcmpkt_lbhdr_eth_int_cn_set,
+        bcmpkt_lbhdr_eth_int_pri_set,
+        bcmpkt_lbhdr_eth_mcast_lb_index_set,
+        bcmpkt_lbhdr_eth_mcast_lb_index_vld_set,
+        bcmpkt_lbhdr_eth_pp_port_set,
+        bcmpkt_lbhdr_eth_qos_fields_vld_set,
+        bcmpkt_lbhdr_eth_routed_pkt_set,
+        bcmpkt_lbhdr_eth_subflow_type_set,
+        bcmpkt_lbhdr_ethernet_vrf_set,
+        bcmpkt_lbhdr_ethernet_vrf_valid_set,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL
+    }
+};
+
+
+const bcmpkt_lbhdr_figet_t bcm56999_a0_lbhdr_figet = {
+    {
+        bcmpkt_lbhdr_i_size_get
+    }
+};
+
+static shr_enum_map_t bcm56999_a0_lbhdr_view_types[] = {
+    {"trill_nw", 1},
+    {"trill_ac", 2},
+    {"ethernet", 3},
+    {NULL, -1},
+};
+
+/* -2: unsupported, -1: global, others: view's value */
+static int bcm56999_a0_lbhdr_view_infos[BCMPKT_LBHDR_FID_COUNT] = {
+     -1, -1, -1, -1, -1, -1, -1,  2,  2, -2,  1,  1,  3,  3,  3,  3,
+      3,  3,  3,  3,  3,  3,  3,  3,  3,  3, -2, -2, -2, -2, -2, -2,
+     -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+     -2,
+};
+
+
+void bcm56999_a0_lbhdr_view_info_get(bcmpkt_pmd_view_info_t *info)
+{
+    info->view_infos = bcm56999_a0_lbhdr_view_infos;
+    info->view_types = bcm56999_a0_lbhdr_view_types;
+    info->view_type_get = bcmpkt_lbhdr_header_type_get;
+}
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56999_a0/bcm56999_a0_pkt_rxpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56999_a0/bcm56999_a0_pkt_rxpmd.c
new file mode 100644
index 000000000..aa132a65e
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56999_a0/bcm56999_a0_pkt_rxpmd.c
@@ -0,0 +1,1110 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated from the registers file.
+ * Edits to this file will be lost when it is regenerated.
+ * Tool: INTERNAL/regs/xgs/generate-pmd.pl
+ *
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ *
+ * This file provides RXPMD access functions for BCM56999_A0.
+ *
+ ******************************************************************************/
+
+#include <sal/sal_types.h>
+#include <bcmpkt/bcmpkt_rxpmd.h>
+#include <bcmpkt/bcmpkt_rxpmd_internal.h>
+
+#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1)
+#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l))
+#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s)))
+#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s)))
+/*******************************************************************************
+ * SWFORMAT:  RXPMD
+ * BLOCKS:
+ * SIZE:     416
+ ******************************************************************************/
+static void bcmpkt_rxpmd_unicast_queue_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[4], 24, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_unicast_queue_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[4], 24, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_queue_num_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[12], 22, 6, val);
+}
+
+static uint32_t bcmpkt_rxpmd_queue_num_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[12], 22, 6);
+    return val;
+}
+
+static void bcmpkt_rxpmd_cpu_cos_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[12], 22, 6, val);
+}
+
+static uint32_t bcmpkt_rxpmd_cpu_cos_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[12], 22, 6);
+    return val;
+}
+
+static void bcmpkt_rxpmd_matched_rule_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[8], 3, 8, val);
+}
+
+static uint32_t bcmpkt_rxpmd_matched_rule_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[8], 3, 8);
+    return val;
+}
+
+static void bcmpkt_rxpmd_pkt_length_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[7], 0, 14, val);
+}
+
+static uint32_t bcmpkt_rxpmd_pkt_length_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[7], 0, 14);
+    return val;
+}
+
+static void bcmpkt_rxpmd_src_port_num_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[6], 22, 9, val);
+}
+
+static uint32_t bcmpkt_rxpmd_src_port_num_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[6], 22, 9);
+    return val;
+}
+
+static void bcmpkt_rxpmd_outer_vid_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[8], 18, 12, val);
+}
+
+static uint32_t bcmpkt_rxpmd_outer_vid_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[8], 18, 12);
+    return val;
+}
+
+static void bcmpkt_rxpmd_outer_cfi_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[8], 14, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_outer_cfi_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[8], 14, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_outer_pri_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[8], 15, 3, val);
+}
+
+static uint32_t bcmpkt_rxpmd_outer_pri_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[8], 15, 3);
+    return val;
+}
+
+static void bcmpkt_rxpmd_special_packet_indicator_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[6], 21, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_special_packet_indicator_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[6], 21, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_special_packet_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[9], 5, 3, val);
+}
+
+static uint32_t bcmpkt_rxpmd_special_packet_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[9], 5, 3);
+    return val;
+}
+
+static void bcmpkt_rxpmd_change_dscp_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[12], 29, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_change_dscp_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[12], 29, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_dscp_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[9], 5, 6, val);
+}
+
+static uint32_t bcmpkt_rxpmd_dscp_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[9], 5, 6);
+    return val;
+}
+
+static void bcmpkt_rxpmd_change_ecn_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[12], 30, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_change_ecn_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[12], 30, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_ecn_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[9], 11, 2, val);
+}
+
+static uint32_t bcmpkt_rxpmd_ecn_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[9], 11, 2);
+    return val;
+}
+
+static void bcmpkt_rxpmd_timestamp_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[4], 16, 2, val);
+}
+
+static uint32_t bcmpkt_rxpmd_timestamp_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[4], 16, 2);
+    return val;
+}
+
+static void bcmpkt_rxpmd_timestamp_set(uint32_t *data, uint32_t val)
+{
+    data[5] = val;
+}
+
+static uint32_t bcmpkt_rxpmd_timestamp_get(uint32_t *data)
+{
+    uint32_t val;
+    val = data[5];
+    return val;
+}
+
+static void bcmpkt_rxpmd_timestamp_hi_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[4], 0, 16, val);
+}
+
+static uint32_t bcmpkt_rxpmd_timestamp_hi_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[4], 0, 16);
+    return val;
+}
+
+static void bcmpkt_rxpmd_mtp_index_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[8], 11, 3, val);
+}
+
+static uint32_t bcmpkt_rxpmd_mtp_index_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[8], 11, 3);
+    return val;
+}
+
+static void bcmpkt_rxpmd_bpdu_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[12], 28, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_bpdu_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[12], 28, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_l3only_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[8], 2, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_l3only_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[8], 2, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_ip_routed_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[8], 1, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_ip_routed_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[8], 1, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_uc_sw_copy_dropped_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[4], 23, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_uc_sw_copy_dropped_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[4], 23, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_switch_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[6], 31, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_switch_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[6], 31, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_ing_otag_action_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[9], 30, 2, val);
+}
+
+static uint32_t bcmpkt_rxpmd_ing_otag_action_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[9], 30, 2);
+    return val;
+}
+
+static void bcmpkt_rxpmd_ing_tag_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[9], 13, 2, val);
+}
+
+static uint32_t bcmpkt_rxpmd_ing_tag_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[9], 13, 2);
+    return val;
+}
+
+static void bcmpkt_rxpmd_rx_bfd_start_offset_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[12], 14, 8, val);
+}
+
+static uint32_t bcmpkt_rxpmd_rx_bfd_start_offset_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[12], 14, 8);
+    return val;
+}
+
+static void bcmpkt_rxpmd_rx_bfd_start_offset_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[12], 12, 2, val);
+}
+
+static uint32_t bcmpkt_rxpmd_rx_bfd_start_offset_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[12], 12, 2);
+    return val;
+}
+
+static void bcmpkt_rxpmd_rx_bfd_session_index_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[12], 0, 12, val);
+}
+
+static uint32_t bcmpkt_rxpmd_rx_bfd_session_index_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[12], 0, 12);
+    return val;
+}
+
+static void bcmpkt_rxpmd_reason_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[9], 0, 4, val);
+}
+
+static uint32_t bcmpkt_rxpmd_reason_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[9], 0, 4);
+    return val;
+}
+
+static void bcmpkt_rxpmd_do_not_change_ttl_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[9], 4, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_do_not_change_ttl_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[9], 4, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_i2e_classid_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[12], 12, 4, val);
+}
+
+static uint32_t bcmpkt_rxpmd_i2e_classid_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[12], 12, 4);
+    return val;
+}
+
+static void bcmpkt_rxpmd_i2e_classid_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[12], 0, 12, val);
+}
+
+static uint32_t bcmpkt_rxpmd_i2e_classid_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[12], 0, 12);
+    return val;
+}
+
+static void bcmpkt_rxpmd_ing_l3_intf_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[12], 0, 13, val);
+}
+
+static uint32_t bcmpkt_rxpmd_ing_l3_intf_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[12], 0, 13);
+    return val;
+}
+
+static void bcmpkt_rxpmd_regen_crc_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[7], 14, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_regen_crc_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[7], 14, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_entropy_label_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[6], 1, 20, val);
+}
+
+static uint32_t bcmpkt_rxpmd_entropy_label_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[6], 1, 20);
+    return val;
+}
+
+static void bcmpkt_rxpmd_tunnel_decap_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[4], 18, 5, val);
+}
+
+static uint32_t bcmpkt_rxpmd_tunnel_decap_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[4], 18, 5);
+    return val;
+}
+
+static void bcmpkt_rxpmd_dlb_id_valid_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[12], 31, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_dlb_id_valid_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[12], 31, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_dlb_id_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[4], 25, 7, val);
+}
+
+static uint32_t bcmpkt_rxpmd_dlb_id_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[4], 25, 7);
+    return val;
+}
+
+static void bcmpkt_rxpmd_replication_or_nhop_index_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[7], 15, 17, val);
+}
+
+static uint32_t bcmpkt_rxpmd_replication_or_nhop_index_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[7], 15, 17);
+    return val;
+}
+
+static void bcmpkt_rxpmd_incoming_int_hdr_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[8], 30, 2, val);
+}
+
+static uint32_t bcmpkt_rxpmd_incoming_int_hdr_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[8], 30, 2);
+    return val;
+}
+
+static void bcmpkt_rxpmd_ing_l3_intf_valid_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[12], 16, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_ing_l3_intf_valid_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[12], 16, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_o_nhi_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[9], 15, 15, val);
+}
+
+static uint32_t bcmpkt_rxpmd_o_nhi_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[9], 15, 15);
+    return val;
+}
+
+static uint32_t bcmpkt_rxpmd_i_size_get(uint32_t *data, uint32_t **addr)
+{
+    return 13;
+}
+
+static uint32_t bcmpkt_rxpmd_i_reason_get(uint32_t *data, uint32_t **addr)
+{
+    *addr = data + 10;
+    return 2;
+}
+
+static uint32_t bcmpkt_rxpmd_i_module_hdr_get(uint32_t *data, uint32_t **addr)
+{
+    *addr = data + 0;
+    return 4;
+}
+
+/*******************************************************************************
+ * SWFORMAT:  RX_REASON
+ * BLOCKS:
+ * SIZE:     45
+ ******************************************************************************/
+void bcm56999_a0_rx_reason_encode(const bcmpkt_rx_reasons_t *reasons, uint32_t *data)
+{
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_UVLAN)) {
+        data[1] |= (0x1 << 0);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SLF)) {
+        data[1] |= (0x1 << 1);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_DLF)) {
+        data[1] |= (0x1 << 2);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L2MOVE)) {
+        data[1] |= (0x1 << 3);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L2CPU)) {
+        data[1] |= (0x1 << 4);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MISS)) {
+        data[1] |= (0x1 << 5);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3DST_MISS)) {
+        data[1] |= (0x1 << 6);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MOVE)) {
+        data[1] |= (0x1 << 7);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_MC_MISS)) {
+        data[1] |= (0x1 << 8);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_MISS)) {
+        data[1] |= (0x1 << 9);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_FFP)) {
+        data[1] |= (0x1 << 10);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3HDR_ERR)) {
+        data[1] |= (0x1 << 11);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_PROTOCOL_PKT)) {
+        data[1] |= (0x1 << 12);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_DOS_ATTACK)) {
+        data[1] |= (0x1 << 13);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_MARTIAN_ADDR)) {
+        data[1] |= (0x1 << 14);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_TUNNEL_ERR)) {
+        data[1] |= (0x1 << 15);
+    }
+
+    if (BCMPKT_RX_REASON_GET(*reasons,  BCMPKT_RX_REASON_CPU_SFLOW_CPU_SFLOW_FLEX)) {
+        WORD_FIELD_SET(data[1], 16, 2, 1);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons,  BCMPKT_RX_REASON_CPU_SFLOW_CPU_SFLOW_DST)) {
+        WORD_FIELD_SET(data[1], 16, 2, 2);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons,  BCMPKT_RX_REASON_CPU_SFLOW_CPU_SFLOW_SRC)) {
+        WORD_FIELD_SET(data[1], 16, 2, 3);
+    }
+    /*! For mask set ONLY. */
+    if (BCMPKT_RX_REASON_GET(*reasons,  BCMPKT_RX_REASON_CPU_SFLOW)) {
+        WORD_FIELD_SET(data[1], 16, 2, 3);
+    }
+
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_ICMP_REDIRECT)) {
+        data[1] |= (0x1 << 18);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_L3_SLOWPATH)) {
+        data[1] |= (0x1 << 19);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_PARITY_ERROR)) {
+        data[1] |= (0x1 << 20);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_L3_MTU_CHECK_FAIL)) {
+        data[1] |= (0x1 << 21);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MCIDX_ERROR)) {
+        data[1] |= (0x1 << 22);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_VFP)) {
+        data[1] |= (0x1 << 23);
+    }
+
+    if (BCMPKT_RX_REASON_GET(*reasons,  BCMPKT_RX_REASON_MPLS_PROC_ERROR_INVALID_PAYLOAD)) {
+        WORD_FIELD_SET(data[1], 24, 3, 1);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons,  BCMPKT_RX_REASON_MPLS_PROC_ERROR_INVALID_ACTION)) {
+        WORD_FIELD_SET(data[1], 24, 3, 2);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons,  BCMPKT_RX_REASON_MPLS_PROC_ERROR_LABEL_MISS)) {
+        WORD_FIELD_SET(data[1], 24, 3, 3);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons,  BCMPKT_RX_REASON_MPLS_PROC_ERROR_TTL_CHECK_FAIL)) {
+        WORD_FIELD_SET(data[1], 24, 3, 4);
+    }
+    /*! For mask set ONLY. */
+    if (BCMPKT_RX_REASON_GET(*reasons,  BCMPKT_RX_REASON_MPLS_PROC_ERROR)) {
+        WORD_FIELD_SET(data[1], 24, 3, 7);
+    }
+
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_PBT_NONUC_PKT)) {
+        data[1] |= (0x1 << 27);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_L3_NEXT_HOP)) {
+        data[1] |= (0x1 << 28);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MY_STATION)) {
+        data[1] |= (0x1 << 29);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_TIME_SYNC)) {
+        data[1] |= (0x1 << 30);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_TUNNEL_DECAP_ECN_ERROR)) {
+        data[1] |= (0x1 << 31);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_BFD_SLOWPATH)) {
+        data[0] |= (0x1 << 0);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_BFD_ERROR)) {
+        data[0] |= (0x1 << 1);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_PACKET_TRACE_TO_CPU)) {
+        data[0] |= (0x1 << 2);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_UNKNOWN_CONTROL_PKT)) {
+        data[0] |= (0x1 << 3);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_ALERT_LABEL)) {
+        data[0] |= (0x1 << 4);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_INTERFACE_MISMATCH)) {
+        data[0] |= (0x1 << 5);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_DLB_MONITOR)) {
+        data[0] |= (0x1 << 6);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_INT_TURN_AROUND)) {
+        data[0] |= (0x1 << 7);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_ETRAP_MONITOR)) {
+        data[0] |= (0x1 << 8);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_SRV6_ERROR)) {
+        data[0] |= (0x1 << 9);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_VXLAN_VN_ID_MISS)) {
+        data[0] |= (0x1 << 10);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_VXLAN_SIP_MISS)) {
+        data[0] |= (0x1 << 11);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_ADAPT_MISS)) {
+        data[0] |= (0x1 << 12);
+    }
+}
+
+void bcm56999_a0_rx_reason_decode(const uint32_t *data, bcmpkt_rx_reasons_t *reasons)
+{
+    uint32_t val;
+    COMPILER_REFERENCE(val);
+    if (data[1] & (0x1 << 0)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_UVLAN);
+    }
+    if (data[1] & (0x1 << 1)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_SLF);
+    }
+    if (data[1] & (0x1 << 2)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_DLF);
+    }
+    if (data[1] & (0x1 << 3)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L2MOVE);
+    }
+    if (data[1] & (0x1 << 4)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L2CPU);
+    }
+    if (data[1] & (0x1 << 5)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MISS);
+    }
+    if (data[1] & (0x1 << 6)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3DST_MISS);
+    }
+    if (data[1] & (0x1 << 7)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MOVE);
+    }
+    if (data[1] & (0x1 << 8)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_MC_MISS);
+    }
+    if (data[1] & (0x1 << 9)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_MISS);
+    }
+    if (data[1] & (0x1 << 10)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_FFP);
+    }
+    if (data[1] & (0x1 << 11)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3HDR_ERR);
+    }
+    if (data[1] & (0x1 << 12)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_PROTOCOL_PKT);
+    }
+    if (data[1] & (0x1 << 13)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_DOS_ATTACK);
+    }
+    if (data[1] & (0x1 << 14)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_MARTIAN_ADDR);
+    }
+    if (data[1] & (0x1 << 15)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_TUNNEL_ERR);
+    }
+
+    val = WORD_FIELD_GET(data[1], 16, 2);
+    if (val) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW);
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW + val);
+    }
+
+    if (data[1] & (0x1 << 18)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_ICMP_REDIRECT);
+    }
+    if (data[1] & (0x1 << 19)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_L3_SLOWPATH);
+    }
+    if (data[1] & (0x1 << 20)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_PARITY_ERROR);
+    }
+    if (data[1] & (0x1 << 21)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_L3_MTU_CHECK_FAIL);
+    }
+    if (data[1] & (0x1 << 22)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MCIDX_ERROR);
+    }
+    if (data[1] & (0x1 << 23)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_VFP);
+    }
+
+    val = WORD_FIELD_GET(data[1], 24, 3);
+    if (val) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR);
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_PROC_ERROR + val);
+    }
+
+    if (data[1] & (0x1 << 27)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_PBT_NONUC_PKT);
+    }
+    if (data[1] & (0x1 << 28)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_L3_NEXT_HOP);
+    }
+    if (data[1] & (0x1 << 29)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MY_STATION);
+    }
+    if (data[1] & (0x1 << 30)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_TIME_SYNC);
+    }
+    if (data[1] & (0x1 << 31)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_TUNNEL_DECAP_ECN_ERROR);
+    }
+    if (data[0] & (0x1 << 0)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_BFD_SLOWPATH);
+    }
+    if (data[0] & (0x1 << 1)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_BFD_ERROR);
+    }
+    if (data[0] & (0x1 << 2)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_PACKET_TRACE_TO_CPU);
+    }
+    if (data[0] & (0x1 << 3)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_UNKNOWN_CONTROL_PKT);
+    }
+    if (data[0] & (0x1 << 4)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_ALERT_LABEL);
+    }
+    if (data[0] & (0x1 << 5)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_INTERFACE_MISMATCH);
+    }
+    if (data[0] & (0x1 << 6)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_DLB_MONITOR);
+    }
+    if (data[0] & (0x1 << 7)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_INT_TURN_AROUND);
+    }
+    if (data[0] & (0x1 << 8)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_ETRAP_MONITOR);
+    }
+    if (data[0] & (0x1 << 9)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_SRV6_ERROR);
+    }
+    if (data[0] & (0x1 << 10)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_VXLAN_VN_ID_MISS);
+    }
+    if (data[0] & (0x1 << 11)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_VXLAN_SIP_MISS);
+    }
+    if (data[0] & (0x1 << 12)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_ADAPT_MISS);
+    }
+}
+
+void bcm56999_a0_ep_rx_reason_encode(const bcmpkt_rx_reasons_t *reasons, uint32_t *data)
+{
+}
+
+void bcm56999_a0_ep_rx_reason_decode(const uint32_t *data, bcmpkt_rx_reasons_t *reasons)
+{
+}
+
+const bcmpkt_rxpmd_fget_t bcm56999_a0_rxpmd_fget = {
+    {
+        bcmpkt_rxpmd_unicast_queue_get,
+        bcmpkt_rxpmd_queue_num_get,
+        bcmpkt_rxpmd_cpu_cos_get,
+        NULL,
+        bcmpkt_rxpmd_matched_rule_get,
+        bcmpkt_rxpmd_pkt_length_get,
+        bcmpkt_rxpmd_src_port_num_get,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_outer_vid_get,
+        bcmpkt_rxpmd_outer_cfi_get,
+        bcmpkt_rxpmd_outer_pri_get,
+        bcmpkt_rxpmd_special_packet_indicator_get,
+        bcmpkt_rxpmd_special_packet_type_get,
+        bcmpkt_rxpmd_change_dscp_get,
+        bcmpkt_rxpmd_dscp_get,
+        bcmpkt_rxpmd_change_ecn_get,
+        bcmpkt_rxpmd_ecn_get,
+        bcmpkt_rxpmd_timestamp_type_get,
+        bcmpkt_rxpmd_timestamp_get,
+        bcmpkt_rxpmd_timestamp_hi_get,
+        bcmpkt_rxpmd_mtp_index_get,
+        bcmpkt_rxpmd_bpdu_get,
+        NULL,
+        bcmpkt_rxpmd_l3only_get,
+        bcmpkt_rxpmd_ip_routed_get,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_uc_sw_copy_dropped_get,
+        bcmpkt_rxpmd_switch_get,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_ing_otag_action_get,
+        bcmpkt_rxpmd_ing_tag_type_get,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_rx_bfd_start_offset_get,
+        bcmpkt_rxpmd_rx_bfd_start_offset_type_get,
+        bcmpkt_rxpmd_rx_bfd_session_index_get,
+        bcmpkt_rxpmd_reason_type_get,
+        bcmpkt_rxpmd_do_not_change_ttl_get,
+        bcmpkt_rxpmd_i2e_classid_type_get,
+        bcmpkt_rxpmd_i2e_classid_get,
+        bcmpkt_rxpmd_ing_l3_intf_get,
+        NULL,
+        bcmpkt_rxpmd_regen_crc_get,
+        bcmpkt_rxpmd_entropy_label_get,
+        bcmpkt_rxpmd_tunnel_decap_type_get,
+        bcmpkt_rxpmd_dlb_id_valid_get,
+        bcmpkt_rxpmd_dlb_id_get,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_replication_or_nhop_index_get,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_incoming_int_hdr_type_get,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_ing_l3_intf_valid_get,
+        bcmpkt_rxpmd_o_nhi_get,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL
+    }
+};
+
+
+const bcmpkt_rxpmd_fset_t bcm56999_a0_rxpmd_fset = {
+    {
+        bcmpkt_rxpmd_unicast_queue_set,
+        bcmpkt_rxpmd_queue_num_set,
+        bcmpkt_rxpmd_cpu_cos_set,
+        NULL,
+        bcmpkt_rxpmd_matched_rule_set,
+        bcmpkt_rxpmd_pkt_length_set,
+        bcmpkt_rxpmd_src_port_num_set,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_outer_vid_set,
+        bcmpkt_rxpmd_outer_cfi_set,
+        bcmpkt_rxpmd_outer_pri_set,
+        bcmpkt_rxpmd_special_packet_indicator_set,
+        bcmpkt_rxpmd_special_packet_type_set,
+        bcmpkt_rxpmd_change_dscp_set,
+        bcmpkt_rxpmd_dscp_set,
+        bcmpkt_rxpmd_change_ecn_set,
+        bcmpkt_rxpmd_ecn_set,
+        bcmpkt_rxpmd_timestamp_type_set,
+        bcmpkt_rxpmd_timestamp_set,
+        bcmpkt_rxpmd_timestamp_hi_set,
+        bcmpkt_rxpmd_mtp_index_set,
+        bcmpkt_rxpmd_bpdu_set,
+        NULL,
+        bcmpkt_rxpmd_l3only_set,
+        bcmpkt_rxpmd_ip_routed_set,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_uc_sw_copy_dropped_set,
+        bcmpkt_rxpmd_switch_set,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_ing_otag_action_set,
+        bcmpkt_rxpmd_ing_tag_type_set,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_rx_bfd_start_offset_set,
+        bcmpkt_rxpmd_rx_bfd_start_offset_type_set,
+        bcmpkt_rxpmd_rx_bfd_session_index_set,
+        bcmpkt_rxpmd_reason_type_set,
+        bcmpkt_rxpmd_do_not_change_ttl_set,
+        bcmpkt_rxpmd_i2e_classid_type_set,
+        bcmpkt_rxpmd_i2e_classid_set,
+        bcmpkt_rxpmd_ing_l3_intf_set,
+        NULL,
+        bcmpkt_rxpmd_regen_crc_set,
+        bcmpkt_rxpmd_entropy_label_set,
+        bcmpkt_rxpmd_tunnel_decap_type_set,
+        bcmpkt_rxpmd_dlb_id_valid_set,
+        bcmpkt_rxpmd_dlb_id_set,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_replication_or_nhop_index_set,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_incoming_int_hdr_type_set,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_ing_l3_intf_valid_set,
+        bcmpkt_rxpmd_o_nhi_set,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL
+    }
+};
+
+
+const bcmpkt_rxpmd_figet_t bcm56999_a0_rxpmd_figet = {
+    {
+        bcmpkt_rxpmd_i_size_get,
+        bcmpkt_rxpmd_i_reason_get,
+        bcmpkt_rxpmd_i_module_hdr_get,
+        NULL
+    }
+};
+
+static shr_enum_map_t bcm56999_a0_rxpmd_view_types[] = {
+    {NULL, -1},
+};
+
+/* -2: unsupported, -1: global, others: view's value */
+static int bcm56999_a0_rxpmd_view_infos[BCMPKT_RXPMD_FID_COUNT] = {
+     -1, -1, -1, -2, -1, -1, -1, -2, -2, -2, -1, -1, -1, -1, -1, -1,
+     -1, -1, -1, -1, -1, -1, -1, -1, -2, -1, -1, -2, -2, -1, -1, -2,
+     -2, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1,
+     -1, -1, -1, -1, -1, -1, -1, -2, -1, -1, -1, -1, -1, -2, -2, -2,
+     -2, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, -2, -2, -2,
+     -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+};
+
+
+void bcm56999_a0_rxpmd_view_info_get(bcmpkt_pmd_view_info_t *info)
+{
+    info->view_infos = bcm56999_a0_rxpmd_view_infos;
+    info->view_types = bcm56999_a0_rxpmd_view_types;
+    info->view_type_get = NULL;
+}
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56999_a0/bcm56999_a0_pkt_txpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56999_a0/bcm56999_a0_pkt_txpmd.c
new file mode 100644
index 000000000..132ef8557
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56999_a0/bcm56999_a0_pkt_txpmd.c
@@ -0,0 +1,526 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated from the registers file.
+ * Edits to this file will be lost when it is regenerated.
+ * Tool: INTERNAL/regs/xgs/generate-pmd.pl
+ *
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ *
+ * This file provides TXPMD access functions for BCM56999_A0.
+ *
+ ******************************************************************************/
+
+#include <sal/sal_types.h>
+#include <bcmpkt/bcmpkt_txpmd_internal.h>
+
+#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1)
+#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l))
+#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s)))
+#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s)))
+/*******************************************************************************
+ * SWFORMAT:  TXPMD
+ * BLOCKS:
+ * SIZE:     128
+ ******************************************************************************/
+static void bcmpkt_txpmd_start_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 30, 2, val);
+}
+
+static uint32_t bcmpkt_txpmd_start_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 30, 2);
+    return val;
+}
+
+static void bcmpkt_txpmd_header_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 24, 6, val);
+}
+
+static uint32_t bcmpkt_txpmd_header_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 24, 6);
+    return val;
+}
+
+static void bcmpkt_txpmd_pkt_length_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 10, 14, val);
+}
+
+static uint32_t bcmpkt_txpmd_pkt_length_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 10, 14);
+    return val;
+}
+
+static void bcmpkt_txpmd_ipcf_ptr_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 24, 8, val);
+}
+
+static uint32_t bcmpkt_txpmd_ipcf_ptr_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 24, 8);
+    return val;
+}
+
+static void bcmpkt_txpmd_sop_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 9, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_sop_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 9, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_eop_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 8, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_eop_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 8, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_cell_length_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[3], 0, 8, val);
+}
+
+static uint32_t bcmpkt_txpmd_cell_length_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[3], 0, 8);
+    return val;
+}
+
+static void bcmpkt_txpmd_cell_error_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 20, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_cell_error_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 20, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_local_dest_port_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 31, 1, val & MASK(1));
+    WORD_FIELD_SET(data[1], 0, 8, (val >> 1) & MASK(8));
+}
+
+static uint32_t bcmpkt_txpmd_local_dest_port_get(uint32_t *data)
+{
+    uint32_t val;
+    val = (WORD_FIELD_GET(data[2], 31, 1) | (WORD_FIELD_GET(data[1], 0, 8) << 1)) ;
+    return val;
+}
+
+static void bcmpkt_txpmd_src_modid_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 0, 8, val);
+}
+
+static uint32_t bcmpkt_txpmd_src_modid_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 0, 8);
+    return val;
+}
+
+static void bcmpkt_txpmd_cos_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 8, 6, val);
+}
+
+static uint32_t bcmpkt_txpmd_cos_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 8, 6);
+    return val;
+}
+
+static void bcmpkt_txpmd_input_pri_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 25, 4, val);
+}
+
+static uint32_t bcmpkt_txpmd_input_pri_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 25, 4);
+    return val;
+}
+
+static void bcmpkt_txpmd_unicast_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 14, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_unicast_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 14, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_rqe_q_num_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 16, 4, val);
+}
+
+static uint32_t bcmpkt_txpmd_rqe_q_num_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 16, 4);
+    return val;
+}
+
+static void bcmpkt_txpmd_set_l2bm_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 15, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_set_l2bm_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 15, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_ieee1588_one_step_enable_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 19, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_ieee1588_one_step_enable_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 19, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_ieee1588_regen_udp_checksum_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 18, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_ieee1588_regen_udp_checksum_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 18, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 17, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 17, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 8, 8, val);
+}
+
+static uint32_t bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 8, 8);
+    return val;
+}
+
+static void bcmpkt_txpmd_tx_ts_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 16, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_tx_ts_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 16, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_spid_override_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 24, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_spid_override_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 24, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_spid_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 22, 2, val);
+}
+
+static uint32_t bcmpkt_txpmd_spid_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 22, 2);
+    return val;
+}
+
+static void bcmpkt_txpmd_spap_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 20, 2, val);
+}
+
+static uint32_t bcmpkt_txpmd_spap_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 20, 2);
+    return val;
+}
+
+static uint32_t bcmpkt_txpmd_i_size_get(uint32_t *data, uint32_t **addr)
+{
+    return 4;
+}
+
+
+const bcmpkt_txpmd_fget_t bcm56999_a0_txpmd_fget = {
+    {
+        bcmpkt_txpmd_start_get,
+        bcmpkt_txpmd_header_type_get,
+        bcmpkt_txpmd_pkt_length_get,
+        bcmpkt_txpmd_ipcf_ptr_get,
+        bcmpkt_txpmd_sop_get,
+        bcmpkt_txpmd_eop_get,
+        bcmpkt_txpmd_cell_length_get,
+        bcmpkt_txpmd_cell_error_get,
+        bcmpkt_txpmd_local_dest_port_get,
+        bcmpkt_txpmd_src_modid_get,
+        bcmpkt_txpmd_cos_get,
+        bcmpkt_txpmd_input_pri_get,
+        bcmpkt_txpmd_unicast_get,
+        bcmpkt_txpmd_rqe_q_num_get,
+        bcmpkt_txpmd_set_l2bm_get,
+        bcmpkt_txpmd_ieee1588_one_step_enable_get,
+        bcmpkt_txpmd_ieee1588_regen_udp_checksum_get,
+        bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_get,
+        bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_get,
+        bcmpkt_txpmd_tx_ts_get,
+        bcmpkt_txpmd_spid_override_get,
+        bcmpkt_txpmd_spid_get,
+        bcmpkt_txpmd_spap_get,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL
+    }
+};
+
+
+const bcmpkt_txpmd_fset_t bcm56999_a0_txpmd_fset = {
+    {
+        bcmpkt_txpmd_start_set,
+        bcmpkt_txpmd_header_type_set,
+        bcmpkt_txpmd_pkt_length_set,
+        bcmpkt_txpmd_ipcf_ptr_set,
+        bcmpkt_txpmd_sop_set,
+        bcmpkt_txpmd_eop_set,
+        bcmpkt_txpmd_cell_length_set,
+        bcmpkt_txpmd_cell_error_set,
+        bcmpkt_txpmd_local_dest_port_set,
+        bcmpkt_txpmd_src_modid_set,
+        bcmpkt_txpmd_cos_set,
+        bcmpkt_txpmd_input_pri_set,
+        bcmpkt_txpmd_unicast_set,
+        bcmpkt_txpmd_rqe_q_num_set,
+        bcmpkt_txpmd_set_l2bm_set,
+        bcmpkt_txpmd_ieee1588_one_step_enable_set,
+        bcmpkt_txpmd_ieee1588_regen_udp_checksum_set,
+        bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_set,
+        bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_set,
+        bcmpkt_txpmd_tx_ts_set,
+        bcmpkt_txpmd_spid_override_set,
+        bcmpkt_txpmd_spid_set,
+        bcmpkt_txpmd_spap_set,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL
+    }
+};
+
+
+const bcmpkt_txpmd_figet_t bcm56999_a0_txpmd_figet = {
+    {
+        bcmpkt_txpmd_i_size_get
+    }
+};
+
+static shr_enum_map_t bcm56999_a0_txpmd_view_types[] = {
+    {NULL, -1},
+};
+
+/* -2: unsupported, -1: global, others: view's value */
+static int bcm56999_a0_txpmd_view_infos[BCMPKT_TXPMD_FID_COUNT] = {
+     -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
+     -1, -1, -1, -1, -1, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+     -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+     -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+     -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+     -2, -2, -2,
+};
+
+
+void bcm56999_a0_txpmd_view_info_get(bcmpkt_pmd_view_info_t *info)
+{
+    info->view_infos = bcm56999_a0_txpmd_view_infos;
+    info->view_types = bcm56999_a0_txpmd_view_types;
+    info->view_type_get = NULL;
+}
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78900_b0/bcm78900_b0_pkt_lbhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78900_b0/bcm78900_b0_pkt_lbhdr.c
new file mode 100644
index 000000000..bddf990d2
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78900_b0/bcm78900_b0_pkt_lbhdr.c
@@ -0,0 +1,347 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated from the registers file.
+ * Edits to this file will be lost when it is regenerated.
+ * Tool: INTERNAL/regs/xgs/generate-pmd.pl
+ *
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ *
+ * This file provides LBHDR access functions for BCM78900_B0.
+ *
+ ******************************************************************************/
+
+#include <sal/sal_types.h>
+#include <bcmpkt/bcmpkt_lbhdr_internal.h>
+
+#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1)
+#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l))
+#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s)))
+#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s)))
+/*******************************************************************************
+ * SWFORMAT:  LBHDR
+ * BLOCKS:
+ * SIZE:     128
+ ******************************************************************************/
+static void bcmpkt_lbhdr_start_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 30, 2, val);
+}
+
+static uint32_t bcmpkt_lbhdr_start_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 30, 2);
+    return val;
+}
+
+static void bcmpkt_lbhdr_header_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 24, 6, val);
+}
+
+static uint32_t bcmpkt_lbhdr_header_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 24, 6);
+    return val;
+}
+
+static void bcmpkt_lbhdr_pkt_profile_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 16, 3, val);
+}
+
+static uint32_t bcmpkt_lbhdr_pkt_profile_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 16, 3);
+    return val;
+}
+
+static void bcmpkt_lbhdr_visibility_pkt_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 13, 1, val);
+}
+
+static uint32_t bcmpkt_lbhdr_visibility_pkt_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 13, 1);
+    return val;
+}
+
+static void bcmpkt_lbhdr_pp_port_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 21, 9, val);
+}
+
+static uint32_t bcmpkt_lbhdr_pp_port_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 21, 9);
+    return val;
+}
+
+static void bcmpkt_lbhdr_routed_pkt_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 15, 1, val);
+}
+
+static uint32_t bcmpkt_lbhdr_routed_pkt_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 15, 1);
+    return val;
+}
+
+static void bcmpkt_lbhdr_vrf_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 2, 13, val);
+}
+
+static uint32_t bcmpkt_lbhdr_vrf_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 2, 13);
+    return val;
+}
+
+static void bcmpkt_lbhdr_vrf_valid_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 14, 1, val);
+}
+
+static uint32_t bcmpkt_lbhdr_vrf_valid_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 14, 1);
+    return val;
+}
+
+static void bcmpkt_lbhdr_qos_field_valid_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 19, 1, val);
+}
+
+static uint32_t bcmpkt_lbhdr_qos_field_valid_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 19, 1);
+    return val;
+}
+
+static void bcmpkt_lbhdr_opaque_object_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 8, 4, val);
+}
+
+static uint32_t bcmpkt_lbhdr_opaque_object_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 8, 4);
+    return val;
+}
+
+static void bcmpkt_lbhdr_qos_field_eth_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 12, 8, val);
+}
+
+static uint32_t bcmpkt_lbhdr_qos_field_eth_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 12, 8);
+    return val;
+}
+
+static void bcmpkt_lbhdr_int_pri_eth_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 12, 4, val);
+}
+
+static uint32_t bcmpkt_lbhdr_int_pri_eth_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 12, 4);
+    return val;
+}
+
+static void bcmpkt_lbhdr_int_cn_eth_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 16, 2, val);
+}
+
+static uint32_t bcmpkt_lbhdr_int_cn_eth_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 16, 2);
+    return val;
+}
+
+static void bcmpkt_lbhdr_cng_eth_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 18, 2, val);
+}
+
+static uint32_t bcmpkt_lbhdr_cng_eth_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 18, 2);
+    return val;
+}
+
+static uint32_t bcmpkt_lbhdr_i_size_get(uint32_t *data, uint32_t **addr)
+{
+    return 4;
+}
+
+
+const bcmpkt_lbhdr_fget_t bcm78900_b0_lbhdr_fget = {
+    {
+        bcmpkt_lbhdr_start_get,
+        bcmpkt_lbhdr_header_type_get,
+        NULL,
+        bcmpkt_lbhdr_pkt_profile_get,
+        bcmpkt_lbhdr_visibility_pkt_get,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_lbhdr_pp_port_get,
+        bcmpkt_lbhdr_routed_pkt_get,
+        bcmpkt_lbhdr_vrf_get,
+        bcmpkt_lbhdr_vrf_valid_get,
+        bcmpkt_lbhdr_qos_field_valid_get,
+        bcmpkt_lbhdr_opaque_object_get,
+        bcmpkt_lbhdr_qos_field_eth_get,
+        bcmpkt_lbhdr_int_pri_eth_get,
+        bcmpkt_lbhdr_int_cn_eth_get,
+        bcmpkt_lbhdr_cng_eth_get,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL
+    }
+};
+
+
+const bcmpkt_lbhdr_fset_t bcm78900_b0_lbhdr_fset = {
+    {
+        bcmpkt_lbhdr_start_set,
+        bcmpkt_lbhdr_header_type_set,
+        NULL,
+        bcmpkt_lbhdr_pkt_profile_set,
+        bcmpkt_lbhdr_visibility_pkt_set,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_lbhdr_pp_port_set,
+        bcmpkt_lbhdr_routed_pkt_set,
+        bcmpkt_lbhdr_vrf_set,
+        bcmpkt_lbhdr_vrf_valid_set,
+        bcmpkt_lbhdr_qos_field_valid_set,
+        bcmpkt_lbhdr_opaque_object_set,
+        bcmpkt_lbhdr_qos_field_eth_set,
+        bcmpkt_lbhdr_int_pri_eth_set,
+        bcmpkt_lbhdr_int_cn_eth_set,
+        bcmpkt_lbhdr_cng_eth_set,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL
+    }
+};
+
+
+const bcmpkt_lbhdr_figet_t bcm78900_b0_lbhdr_figet = {
+    {
+        bcmpkt_lbhdr_i_size_get
+    }
+};
+
+static shr_enum_map_t bcm78900_b0_lbhdr_view_types[] = {
+    {NULL, -1},
+};
+
+/* -2: unsupported, -1: global, others: view's value */
+static int bcm78900_b0_lbhdr_view_infos[BCMPKT_LBHDR_FID_COUNT] = {
+     -1, -1, -2, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+     -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, -1, -1, -1, -1,
+     -1, -1, -1, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+     -2,
+};
+
+
+void bcm78900_b0_lbhdr_view_info_get(bcmpkt_pmd_view_info_t *info)
+{
+    info->view_infos = bcm78900_b0_lbhdr_view_infos;
+    info->view_types = bcm78900_b0_lbhdr_view_types;
+    info->view_type_get = NULL;
+}
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78900_b0/bcm78900_b0_pkt_rxpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78900_b0/bcm78900_b0_pkt_rxpmd.c
new file mode 100644
index 000000000..d14258476
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78900_b0/bcm78900_b0_pkt_rxpmd.c
@@ -0,0 +1,1124 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated from the registers file.
+ * Edits to this file will be lost when it is regenerated.
+ * Tool: INTERNAL/regs/xgs/generate-pmd.pl
+ *
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ *
+ * This file provides RXPMD access functions for BCM78900_B0.
+ *
+ ******************************************************************************/
+
+#include <sal/sal_types.h>
+#include <bcmpkt/bcmpkt_rxpmd.h>
+#include <bcmpkt/bcmpkt_rxpmd_internal.h>
+
+#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1)
+#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l))
+#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s)))
+#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s)))
+/*******************************************************************************
+ * SWFORMAT:  RXPMD
+ * BLOCKS:
+ * SIZE:     416
+ ******************************************************************************/
+static void bcmpkt_rxpmd_unicast_queue_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[4], 22, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_unicast_queue_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[4], 22, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_queue_num_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[10], 26, 6, val);
+}
+
+static uint32_t bcmpkt_rxpmd_queue_num_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[10], 26, 6);
+    return val;
+}
+
+static void bcmpkt_rxpmd_cpu_cos_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[10], 26, 6, val);
+}
+
+static uint32_t bcmpkt_rxpmd_cpu_cos_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[10], 26, 6);
+    return val;
+}
+
+static void bcmpkt_rxpmd_matched_rule_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[8], 16, 12, val);
+}
+
+static uint32_t bcmpkt_rxpmd_matched_rule_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[8], 16, 12);
+    return val;
+}
+
+static void bcmpkt_rxpmd_pkt_length_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[9], 3, 14, val);
+}
+
+static uint32_t bcmpkt_rxpmd_pkt_length_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[9], 3, 14);
+    return val;
+}
+
+static void bcmpkt_rxpmd_src_port_num_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[6], 22, 9, val);
+}
+
+static uint32_t bcmpkt_rxpmd_src_port_num_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[6], 22, 9);
+    return val;
+}
+
+static void bcmpkt_rxpmd_outer_vid_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[7], 3, 12, val);
+}
+
+static uint32_t bcmpkt_rxpmd_outer_vid_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[7], 3, 12);
+    return val;
+}
+
+static void bcmpkt_rxpmd_outer_cfi_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[8], 31, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_outer_cfi_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[8], 31, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_outer_pri_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[7], 0, 3, val);
+}
+
+static uint32_t bcmpkt_rxpmd_outer_pri_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[7], 0, 3);
+    return val;
+}
+
+static void bcmpkt_rxpmd_special_packet_indicator_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[6], 21, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_special_packet_indicator_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[6], 21, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_special_packet_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[8], 6, 3, val);
+}
+
+static uint32_t bcmpkt_rxpmd_special_packet_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[8], 6, 3);
+    return val;
+}
+
+static void bcmpkt_rxpmd_change_dscp_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[8], 2, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_change_dscp_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[8], 2, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_dscp_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[8], 6, 6, val);
+}
+
+static uint32_t bcmpkt_rxpmd_dscp_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[8], 6, 6);
+    return val;
+}
+
+static void bcmpkt_rxpmd_change_ecn_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[8], 3, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_change_ecn_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[8], 3, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_ecn_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[8], 12, 2, val);
+}
+
+static uint32_t bcmpkt_rxpmd_ecn_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[8], 12, 2);
+    return val;
+}
+
+static void bcmpkt_rxpmd_timestamp_set(uint32_t *data, uint32_t val)
+{
+    data[5] = val;
+}
+
+static uint32_t bcmpkt_rxpmd_timestamp_get(uint32_t *data)
+{
+    uint32_t val;
+    val = data[5];
+    return val;
+}
+
+static void bcmpkt_rxpmd_timestamp_hi_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[4], 0, 16, val);
+}
+
+static uint32_t bcmpkt_rxpmd_timestamp_hi_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[4], 0, 16);
+    return val;
+}
+
+static void bcmpkt_rxpmd_mtp_index_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[8], 28, 3, val);
+}
+
+static uint32_t bcmpkt_rxpmd_mtp_index_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[8], 28, 3);
+    return val;
+}
+
+static void bcmpkt_rxpmd_bpdu_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[8], 1, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_bpdu_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[8], 1, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_l3only_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[8], 15, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_l3only_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[8], 15, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_ip_routed_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[8], 14, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_ip_routed_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[8], 14, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_uc_sw_copy_dropped_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[4], 21, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_uc_sw_copy_dropped_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[4], 21, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_switch_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[6], 31, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_switch_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[6], 31, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_ing_otag_action_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[9], 1, 2, val);
+}
+
+static uint32_t bcmpkt_rxpmd_ing_otag_action_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[9], 1, 2);
+    return val;
+}
+
+static void bcmpkt_rxpmd_ing_tag_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[9], 0, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_ing_tag_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[9], 0, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_rx_bfd_start_offset_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[10], 18, 8, val);
+}
+
+static uint32_t bcmpkt_rxpmd_rx_bfd_start_offset_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[10], 18, 8);
+    return val;
+}
+
+static void bcmpkt_rxpmd_rx_bfd_start_offset_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[10], 16, 2, val);
+}
+
+static uint32_t bcmpkt_rxpmd_rx_bfd_start_offset_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[10], 16, 2);
+    return val;
+}
+
+static void bcmpkt_rxpmd_rx_bfd_session_index_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[10], 4, 12, val);
+}
+
+static uint32_t bcmpkt_rxpmd_rx_bfd_session_index_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[10], 4, 12);
+    return val;
+}
+
+static void bcmpkt_rxpmd_reason_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[10], 0, 4, val);
+}
+
+static uint32_t bcmpkt_rxpmd_reason_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[10], 0, 4);
+    return val;
+}
+
+static void bcmpkt_rxpmd_do_not_change_ttl_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[8], 5, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_do_not_change_ttl_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[8], 5, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_i2e_classid_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[10], 16, 4, val);
+}
+
+static uint32_t bcmpkt_rxpmd_i2e_classid_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[10], 16, 4);
+    return val;
+}
+
+static void bcmpkt_rxpmd_i2e_classid_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[10], 4, 12, val);
+}
+
+static uint32_t bcmpkt_rxpmd_i2e_classid_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[10], 4, 12);
+    return val;
+}
+
+static void bcmpkt_rxpmd_ing_l3_intf_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[10], 4, 13, val);
+}
+
+static uint32_t bcmpkt_rxpmd_ing_l3_intf_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[10], 4, 13);
+    return val;
+}
+
+static void bcmpkt_rxpmd_regen_crc_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[6], 0, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_regen_crc_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[6], 0, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_entropy_label_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[6], 1, 20, val);
+}
+
+static uint32_t bcmpkt_rxpmd_entropy_label_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[6], 1, 20);
+    return val;
+}
+
+static void bcmpkt_rxpmd_tunnel_decap_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[4], 17, 4, val);
+}
+
+static uint32_t bcmpkt_rxpmd_tunnel_decap_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[4], 17, 4);
+    return val;
+}
+
+static void bcmpkt_rxpmd_dlb_id_valid_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[8], 4, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_dlb_id_valid_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[8], 4, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_dlb_id_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[4], 25, 7, val);
+}
+
+static uint32_t bcmpkt_rxpmd_dlb_id_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[4], 25, 7);
+    return val;
+}
+
+static void bcmpkt_rxpmd_replication_or_nhop_index_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[7], 15, 17, val);
+}
+
+static uint32_t bcmpkt_rxpmd_replication_or_nhop_index_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[7], 15, 17);
+    return val;
+}
+
+static void bcmpkt_rxpmd_incoming_int_hdr_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[4], 23, 2, val);
+}
+
+static uint32_t bcmpkt_rxpmd_incoming_int_hdr_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[4], 23, 2);
+    return val;
+}
+
+static void bcmpkt_rxpmd_ing_l3_intf_valid_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[10], 20, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_ing_l3_intf_valid_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[10], 20, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_o_nhi_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[9], 17, 15, val);
+}
+
+static uint32_t bcmpkt_rxpmd_o_nhi_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[9], 17, 15);
+    return val;
+}
+
+static void bcmpkt_rxpmd_incoming_opaque_tag_status_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[8], 0, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_incoming_opaque_tag_status_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[8], 0, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_ieee_802_1as_timestamp_enabled_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[4], 16, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_ieee_802_1as_timestamp_enabled_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[4], 16, 1);
+    return val;
+}
+
+static uint32_t bcmpkt_rxpmd_i_size_get(uint32_t *data, uint32_t **addr)
+{
+    return 13;
+}
+
+static uint32_t bcmpkt_rxpmd_i_reason_get(uint32_t *data, uint32_t **addr)
+{
+    *addr = data + 11;
+    return 2;
+}
+
+static uint32_t bcmpkt_rxpmd_i_module_hdr_get(uint32_t *data, uint32_t **addr)
+{
+    *addr = data + 0;
+    return 4;
+}
+
+/*******************************************************************************
+ * SWFORMAT:  RX_REASON
+ * BLOCKS:
+ * SIZE:     46
+ ******************************************************************************/
+void bcm78900_b0_rx_reason_encode(const bcmpkt_rx_reasons_t *reasons, uint32_t *data)
+{
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_INVALID_REASON)) {
+        data[1] |= (0x1 << 0);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SLF)) {
+        data[1] |= (0x1 << 1);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_DLF)) {
+        data[1] |= (0x1 << 2);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L2MOVE)) {
+        data[1] |= (0x1 << 3);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L2CPU)) {
+        data[1] |= (0x1 << 4);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MISS)) {
+        data[1] |= (0x1 << 5);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3DST_MISS)) {
+        data[1] |= (0x1 << 6);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MOVE)) {
+        data[1] |= (0x1 << 7);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_MC_MISS)) {
+        data[1] |= (0x1 << 8);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_MISS)) {
+        data[1] |= (0x1 << 9);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_FFP)) {
+        data[1] |= (0x1 << 10);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3HDR_ERR)) {
+        data[1] |= (0x1 << 11);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_PROTOCOL_PKT)) {
+        data[1] |= (0x1 << 12);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_DOS_ATTACK)) {
+        data[1] |= (0x1 << 13);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_MARTIAN_ADDR)) {
+        data[1] |= (0x1 << 14);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_TUNNEL_ERR)) {
+        data[1] |= (0x1 << 15);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW_SRC)) {
+        data[1] |= (0x1 << 16);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW_DST)) {
+        data[1] |= (0x1 << 17);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_ICMP_REDIRECT)) {
+        data[1] |= (0x1 << 18);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_L3_SLOWPATH)) {
+        data[1] |= (0x1 << 19);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_PARITY_ERROR)) {
+        data[1] |= (0x1 << 20);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_L3_MTU_CHECK_FAIL)) {
+        data[1] |= (0x1 << 21);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_TTL_CHECK)) {
+        data[1] |= (0x1 << 22);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_LABEL_MISS)) {
+        data[1] |= (0x1 << 23);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_INVALID_ACTION)) {
+        data[1] |= (0x1 << 24);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_INVALID_PAYLOAD)) {
+        data[1] |= (0x1 << 25);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_VFP)) {
+        data[1] |= (0x1 << 26);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_PBT_NONUC_PKT)) {
+        data[1] |= (0x1 << 27);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_L3_NEXT_HOP)) {
+        data[1] |= (0x1 << 28);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MY_STATION)) {
+        data[1] |= (0x1 << 29);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_TIME_SYNC)) {
+        data[1] |= (0x1 << 30);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_TUNNEL_DECAP_ECN_ERROR)) {
+        data[1] |= (0x1 << 31);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_BFD_SLOWPATH)) {
+        data[0] |= (0x1 << 0);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_BFD_ERROR)) {
+        data[0] |= (0x1 << 1);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_PACKET_TRACE_TO_CPU)) {
+        data[0] |= (0x1 << 2);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_UNKNOWN_CONTROL_PKT)) {
+        data[0] |= (0x1 << 3);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_ALERT_LABEL)) {
+        data[0] |= (0x1 << 4);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_INTERFACE_MISMATCH)) {
+        data[0] |= (0x1 << 5);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_DLB_MONITOR)) {
+        data[0] |= (0x1 << 6);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW_FLEX)) {
+        data[0] |= (0x1 << 7);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_UVLAN)) {
+        data[0] |= (0x1 << 8);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_SRV6_ERROR)) {
+        data[0] |= (0x1 << 9);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_VXLAN_VN_ID_MISS)) {
+        data[0] |= (0x1 << 10);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_VXLAN_SIP_MISS)) {
+        data[0] |= (0x1 << 11);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_ADAPT_MISS)) {
+        data[0] |= (0x1 << 12);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_INVALID_GSH_NON_GSH)) {
+        data[0] |= (0x1 << 13);
+    }
+}
+
+void bcm78900_b0_rx_reason_decode(const uint32_t *data, bcmpkt_rx_reasons_t *reasons)
+{
+    uint32_t val;
+    COMPILER_REFERENCE(val);
+    if (data[1] & (0x1 << 0)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_INVALID_REASON);
+    }
+    if (data[1] & (0x1 << 1)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_SLF);
+    }
+    if (data[1] & (0x1 << 2)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_DLF);
+    }
+    if (data[1] & (0x1 << 3)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L2MOVE);
+    }
+    if (data[1] & (0x1 << 4)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L2CPU);
+    }
+    if (data[1] & (0x1 << 5)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MISS);
+    }
+    if (data[1] & (0x1 << 6)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3DST_MISS);
+    }
+    if (data[1] & (0x1 << 7)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MOVE);
+    }
+    if (data[1] & (0x1 << 8)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_MC_MISS);
+    }
+    if (data[1] & (0x1 << 9)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_MISS);
+    }
+    if (data[1] & (0x1 << 10)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_FFP);
+    }
+    if (data[1] & (0x1 << 11)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3HDR_ERR);
+    }
+    if (data[1] & (0x1 << 12)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_PROTOCOL_PKT);
+    }
+    if (data[1] & (0x1 << 13)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_DOS_ATTACK);
+    }
+    if (data[1] & (0x1 << 14)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_MARTIAN_ADDR);
+    }
+    if (data[1] & (0x1 << 15)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_TUNNEL_ERR);
+    }
+    if (data[1] & (0x1 << 16)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW_SRC);
+    }
+    if (data[1] & (0x1 << 17)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW_DST);
+    }
+    if (data[1] & (0x1 << 18)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_ICMP_REDIRECT);
+    }
+    if (data[1] & (0x1 << 19)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_L3_SLOWPATH);
+    }
+    if (data[1] & (0x1 << 20)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_PARITY_ERROR);
+    }
+    if (data[1] & (0x1 << 21)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_L3_MTU_CHECK_FAIL);
+    }
+    if (data[1] & (0x1 << 22)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_TTL_CHECK);
+    }
+    if (data[1] & (0x1 << 23)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_LABEL_MISS);
+    }
+    if (data[1] & (0x1 << 24)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_INVALID_ACTION);
+    }
+    if (data[1] & (0x1 << 25)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_INVALID_PAYLOAD);
+    }
+    if (data[1] & (0x1 << 26)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_VFP);
+    }
+    if (data[1] & (0x1 << 27)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_PBT_NONUC_PKT);
+    }
+    if (data[1] & (0x1 << 28)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_L3_NEXT_HOP);
+    }
+    if (data[1] & (0x1 << 29)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MY_STATION);
+    }
+    if (data[1] & (0x1 << 30)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_TIME_SYNC);
+    }
+    if (data[1] & (0x1 << 31)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_TUNNEL_DECAP_ECN_ERROR);
+    }
+    if (data[0] & (0x1 << 0)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_BFD_SLOWPATH);
+    }
+    if (data[0] & (0x1 << 1)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_BFD_ERROR);
+    }
+    if (data[0] & (0x1 << 2)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_PACKET_TRACE_TO_CPU);
+    }
+    if (data[0] & (0x1 << 3)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_UNKNOWN_CONTROL_PKT);
+    }
+    if (data[0] & (0x1 << 4)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_ALERT_LABEL);
+    }
+    if (data[0] & (0x1 << 5)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_INTERFACE_MISMATCH);
+    }
+    if (data[0] & (0x1 << 6)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_DLB_MONITOR);
+    }
+    if (data[0] & (0x1 << 7)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW_FLEX);
+    }
+    if (data[0] & (0x1 << 8)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_UVLAN);
+    }
+    if (data[0] & (0x1 << 9)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_SRV6_ERROR);
+    }
+    if (data[0] & (0x1 << 10)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_VXLAN_VN_ID_MISS);
+    }
+    if (data[0] & (0x1 << 11)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_VXLAN_SIP_MISS);
+    }
+    if (data[0] & (0x1 << 12)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_ADAPT_MISS);
+    }
+    if (data[0] & (0x1 << 13)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_INVALID_GSH_NON_GSH);
+    }
+}
+
+/*******************************************************************************
+ * SWFORMAT:  EP_RX_REASON
+ * BLOCKS:
+ * SIZE:     64
+ ******************************************************************************/
+void bcm78900_b0_ep_rx_reason_encode(const bcmpkt_rx_reasons_t *reasons, uint32_t *data)
+{
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_EP_CTC)) {
+        data[1] |= (0x1 << 0);
+    }
+}
+
+void bcm78900_b0_ep_rx_reason_decode(const uint32_t *data, bcmpkt_rx_reasons_t *reasons)
+{
+    uint32_t val;
+    COMPILER_REFERENCE(val);
+    if (data[1] & (0x1 << 0)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_EP_CTC);
+    }
+}
+
+const bcmpkt_rxpmd_fget_t bcm78900_b0_rxpmd_fget = {
+    {
+        bcmpkt_rxpmd_unicast_queue_get,
+        bcmpkt_rxpmd_queue_num_get,
+        bcmpkt_rxpmd_cpu_cos_get,
+        NULL,
+        bcmpkt_rxpmd_matched_rule_get,
+        bcmpkt_rxpmd_pkt_length_get,
+        bcmpkt_rxpmd_src_port_num_get,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_outer_vid_get,
+        bcmpkt_rxpmd_outer_cfi_get,
+        bcmpkt_rxpmd_outer_pri_get,
+        bcmpkt_rxpmd_special_packet_indicator_get,
+        bcmpkt_rxpmd_special_packet_type_get,
+        bcmpkt_rxpmd_change_dscp_get,
+        bcmpkt_rxpmd_dscp_get,
+        bcmpkt_rxpmd_change_ecn_get,
+        bcmpkt_rxpmd_ecn_get,
+        NULL,
+        bcmpkt_rxpmd_timestamp_get,
+        bcmpkt_rxpmd_timestamp_hi_get,
+        bcmpkt_rxpmd_mtp_index_get,
+        bcmpkt_rxpmd_bpdu_get,
+        NULL,
+        bcmpkt_rxpmd_l3only_get,
+        bcmpkt_rxpmd_ip_routed_get,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_uc_sw_copy_dropped_get,
+        bcmpkt_rxpmd_switch_get,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_ing_otag_action_get,
+        bcmpkt_rxpmd_ing_tag_type_get,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_rx_bfd_start_offset_get,
+        bcmpkt_rxpmd_rx_bfd_start_offset_type_get,
+        bcmpkt_rxpmd_rx_bfd_session_index_get,
+        bcmpkt_rxpmd_reason_type_get,
+        bcmpkt_rxpmd_do_not_change_ttl_get,
+        bcmpkt_rxpmd_i2e_classid_type_get,
+        bcmpkt_rxpmd_i2e_classid_get,
+        bcmpkt_rxpmd_ing_l3_intf_get,
+        NULL,
+        bcmpkt_rxpmd_regen_crc_get,
+        bcmpkt_rxpmd_entropy_label_get,
+        bcmpkt_rxpmd_tunnel_decap_type_get,
+        bcmpkt_rxpmd_dlb_id_valid_get,
+        bcmpkt_rxpmd_dlb_id_get,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_replication_or_nhop_index_get,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_incoming_int_hdr_type_get,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_ing_l3_intf_valid_get,
+        bcmpkt_rxpmd_o_nhi_get,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_incoming_opaque_tag_status_get,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_ieee_802_1as_timestamp_enabled_get,
+        NULL,
+        NULL,
+        NULL
+    }
+};
+
+
+const bcmpkt_rxpmd_fset_t bcm78900_b0_rxpmd_fset = {
+    {
+        bcmpkt_rxpmd_unicast_queue_set,
+        bcmpkt_rxpmd_queue_num_set,
+        bcmpkt_rxpmd_cpu_cos_set,
+        NULL,
+        bcmpkt_rxpmd_matched_rule_set,
+        bcmpkt_rxpmd_pkt_length_set,
+        bcmpkt_rxpmd_src_port_num_set,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_outer_vid_set,
+        bcmpkt_rxpmd_outer_cfi_set,
+        bcmpkt_rxpmd_outer_pri_set,
+        bcmpkt_rxpmd_special_packet_indicator_set,
+        bcmpkt_rxpmd_special_packet_type_set,
+        bcmpkt_rxpmd_change_dscp_set,
+        bcmpkt_rxpmd_dscp_set,
+        bcmpkt_rxpmd_change_ecn_set,
+        bcmpkt_rxpmd_ecn_set,
+        NULL,
+        bcmpkt_rxpmd_timestamp_set,
+        bcmpkt_rxpmd_timestamp_hi_set,
+        bcmpkt_rxpmd_mtp_index_set,
+        bcmpkt_rxpmd_bpdu_set,
+        NULL,
+        bcmpkt_rxpmd_l3only_set,
+        bcmpkt_rxpmd_ip_routed_set,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_uc_sw_copy_dropped_set,
+        bcmpkt_rxpmd_switch_set,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_ing_otag_action_set,
+        bcmpkt_rxpmd_ing_tag_type_set,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_rx_bfd_start_offset_set,
+        bcmpkt_rxpmd_rx_bfd_start_offset_type_set,
+        bcmpkt_rxpmd_rx_bfd_session_index_set,
+        bcmpkt_rxpmd_reason_type_set,
+        bcmpkt_rxpmd_do_not_change_ttl_set,
+        bcmpkt_rxpmd_i2e_classid_type_set,
+        bcmpkt_rxpmd_i2e_classid_set,
+        bcmpkt_rxpmd_ing_l3_intf_set,
+        NULL,
+        bcmpkt_rxpmd_regen_crc_set,
+        bcmpkt_rxpmd_entropy_label_set,
+        bcmpkt_rxpmd_tunnel_decap_type_set,
+        bcmpkt_rxpmd_dlb_id_valid_set,
+        bcmpkt_rxpmd_dlb_id_set,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_replication_or_nhop_index_set,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_incoming_int_hdr_type_set,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_ing_l3_intf_valid_set,
+        bcmpkt_rxpmd_o_nhi_set,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_incoming_opaque_tag_status_set,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_ieee_802_1as_timestamp_enabled_set,
+        NULL,
+        NULL,
+        NULL
+    }
+};
+
+
+const bcmpkt_rxpmd_figet_t bcm78900_b0_rxpmd_figet = {
+    {
+        bcmpkt_rxpmd_i_size_get,
+        bcmpkt_rxpmd_i_reason_get,
+        bcmpkt_rxpmd_i_module_hdr_get,
+        NULL
+    }
+};
+
+static shr_enum_map_t bcm78900_b0_rxpmd_view_types[] = {
+    {NULL, -1},
+};
+
+/* -2: unsupported, -1: global, others: view's value */
+static int bcm78900_b0_rxpmd_view_infos[BCMPKT_RXPMD_FID_COUNT] = {
+     -1, -1, -1, -2, -1, -1, -1, -2, -2, -2, -1, -1, -1, -1, -1, -1,
+     -1, -1, -1, -2, -1, -1, -1, -1, -2, -1, -1, -2, -2, -1, -1, -2,
+     -2, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1,
+     -1, -1, -1, -1, -1, -1, -1, -2, -1, -1, -1, -1, -1, -2, -2, -2,
+     -2, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, -2, -2, -2,
+     -1, -1, -2, -2, -1, -2, -2, -2, -2, -1, -2, -2, -2,
+};
+
+
+void bcm78900_b0_rxpmd_view_info_get(bcmpkt_pmd_view_info_t *info)
+{
+    info->view_infos = bcm78900_b0_rxpmd_view_infos;
+    info->view_types = bcm78900_b0_rxpmd_view_types;
+    info->view_type_get = NULL;
+}
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78900_b0/bcm78900_b0_pkt_txpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78900_b0/bcm78900_b0_pkt_txpmd.c
new file mode 100644
index 000000000..8b3278d1e
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78900_b0/bcm78900_b0_pkt_txpmd.c
@@ -0,0 +1,871 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated from the registers file.
+ * Edits to this file will be lost when it is regenerated.
+ * Tool: INTERNAL/regs/xgs/generate-pmd.pl
+ *
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ *
+ * This file provides TXPMD access functions for BCM78900_B0.
+ *
+ ******************************************************************************/
+
+#include <sal/sal_types.h>
+#include <bcmpkt/bcmpkt_txpmd_internal.h>
+
+#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1)
+#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l))
+#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s)))
+#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s)))
+/*******************************************************************************
+ * SWFORMAT:  TXPMD
+ * BLOCKS:
+ * SIZE:     128
+ ******************************************************************************/
+static void bcmpkt_txpmd_start_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 30, 2, val);
+}
+
+static uint32_t bcmpkt_txpmd_start_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 30, 2);
+    return val;
+}
+
+static void bcmpkt_txpmd_header_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 24, 6, val);
+}
+
+static uint32_t bcmpkt_txpmd_header_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 24, 6);
+    return val;
+}
+
+static void bcmpkt_txpmd_cell_error_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return;
+    }
+    WORD_FIELD_SET(data[3], 0, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_cell_error_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[3], 0, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_src_modid_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 20, 8, val);
+}
+
+static uint32_t bcmpkt_txpmd_src_modid_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 20, 8);
+    return val;
+}
+
+static void bcmpkt_txpmd_cos_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return;
+    }
+    WORD_FIELD_SET(data[3], 3, 6, val);
+}
+
+static uint32_t bcmpkt_txpmd_cos_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[3], 3, 6);
+    return val;
+}
+
+static void bcmpkt_txpmd_input_pri_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 8, 4, val);
+}
+
+static uint32_t bcmpkt_txpmd_input_pri_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 8, 4);
+    return val;
+}
+
+static void bcmpkt_txpmd_unicast_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 29, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_unicast_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 29, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_rqe_q_num_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 12, 3, val);
+}
+
+static uint32_t bcmpkt_txpmd_rqe_q_num_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 12, 3);
+    return val;
+}
+
+static void bcmpkt_txpmd_ieee1588_one_step_enable_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return;
+    }
+    WORD_FIELD_SET(data[3], 30, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_ieee1588_one_step_enable_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[3], 30, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_ieee1588_regen_udp_checksum_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return;
+    }
+    WORD_FIELD_SET(data[3], 31, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_ieee1588_regen_udp_checksum_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[3], 31, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return;
+    }
+    WORD_FIELD_SET(data[3], 29, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[3], 29, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 0, 8, val);
+}
+
+static uint32_t bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 0, 8);
+    return val;
+}
+
+static void bcmpkt_txpmd_tx_ts_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 28, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_tx_ts_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 28, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_spid_override_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 19, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_spid_override_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 19, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_spid_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 17, 2, val);
+}
+
+static uint32_t bcmpkt_txpmd_spid_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 17, 2);
+    return val;
+}
+
+static void bcmpkt_txpmd_spap_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 15, 2, val);
+}
+
+static uint32_t bcmpkt_txpmd_spap_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 15, 2);
+    return val;
+}
+
+static void bcmpkt_txpmd_cng_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return;
+    }
+    WORD_FIELD_SET(data[3], 1, 2, val);
+}
+
+static uint32_t bcmpkt_txpmd_cng_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[3], 1, 2);
+    return val;
+}
+
+static void bcmpkt_txpmd_destination_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return;
+    }
+    WORD_FIELD_SET(data[3], 9, 16, val);
+}
+
+static uint32_t bcmpkt_txpmd_destination_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[3], 9, 16);
+    return val;
+}
+
+static void bcmpkt_txpmd_destination_type_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return;
+    }
+    WORD_FIELD_SET(data[3], 25, 4, val);
+}
+
+static uint32_t bcmpkt_txpmd_destination_type_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[3], 25, 4);
+    return val;
+}
+
+static void bcmpkt_txpmd_wred_mark_eligible_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 30, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_wred_mark_eligible_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 30, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_wred_response_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 31, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_wred_response_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 31, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_cpu_tx_mcast_lb_index_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return;
+    }
+    WORD_FIELD_SET(data[3], 0, 8, val);
+}
+
+static uint32_t bcmpkt_txpmd_cpu_tx_mcast_lb_index_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[3], 0, 8);
+    return val;
+}
+
+static void bcmpkt_txpmd_cpu_tx_ecmp_member_id_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return;
+    }
+    WORD_FIELD_SET(data[3], 0, 17, val);
+}
+
+static uint32_t bcmpkt_txpmd_cpu_tx_ecmp_member_id_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[3], 0, 17);
+    return val;
+}
+
+static void bcmpkt_txpmd_cpu_tx_destination_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return;
+    }
+    WORD_FIELD_SET(data[3], 17, 15, val & MASK(15));
+    WORD_FIELD_SET(data[2], 0, 1, (val >> 15) & MASK(1));
+}
+
+static uint32_t bcmpkt_txpmd_cpu_tx_destination_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return 0;
+    }
+    val = (WORD_FIELD_GET(data[3], 17, 15) | (WORD_FIELD_GET(data[2], 0, 1) << 15)) ;
+    return val;
+}
+
+static void bcmpkt_txpmd_cpu_tx_destination_type_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 1, 4, val);
+}
+
+static uint32_t bcmpkt_txpmd_cpu_tx_destination_type_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 1, 4);
+    return val;
+}
+
+static void bcmpkt_txpmd_cpu_tx_dp_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 5, 2, val);
+}
+
+static uint32_t bcmpkt_txpmd_cpu_tx_dp_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 5, 2);
+    return val;
+}
+
+static void bcmpkt_txpmd_cpu_tx_input_pri_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 7, 4, val);
+}
+
+static uint32_t bcmpkt_txpmd_cpu_tx_input_pri_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 7, 4);
+    return val;
+}
+
+static void bcmpkt_txpmd_cpu_tx_int_cn_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 11, 2, val);
+}
+
+static uint32_t bcmpkt_txpmd_cpu_tx_int_cn_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 11, 2);
+    return val;
+}
+
+static void bcmpkt_txpmd_cpu_tx_int_pri_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 13, 4, val);
+}
+
+static uint32_t bcmpkt_txpmd_cpu_tx_int_pri_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 13, 4);
+    return val;
+}
+
+static void bcmpkt_txpmd_cpu_tx_mcast_lb_index_vld_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 17, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_cpu_tx_mcast_lb_index_vld_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 17, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_cpu_tx_pkt_profile_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 18, 3, val);
+}
+
+static uint32_t bcmpkt_txpmd_cpu_tx_pkt_profile_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 18, 3);
+    return val;
+}
+
+static void bcmpkt_txpmd_cpu_tx_qos_fields_vld_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 21, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_cpu_tx_qos_fields_vld_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 21, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_cpu_tx_routed_pkt_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 22, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_cpu_tx_routed_pkt_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 22, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_cpu_tx_vrf_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 23, 9, val & MASK(9));
+    WORD_FIELD_SET(data[1], 0, 4, (val >> 9) & MASK(4));
+}
+
+static uint32_t bcmpkt_txpmd_cpu_tx_vrf_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return 0;
+    }
+    val = (WORD_FIELD_GET(data[2], 23, 9) | (WORD_FIELD_GET(data[1], 0, 4) << 9)) ;
+    return val;
+}
+
+static void bcmpkt_txpmd_cpu_tx_vrf_valid_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return;
+    }
+    WORD_FIELD_SET(data[1], 4, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_cpu_tx_vrf_valid_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[1], 4, 1);
+    return val;
+}
+
+static uint32_t bcmpkt_txpmd_i_size_get(uint32_t *data, uint32_t **addr)
+{
+    return 4;
+}
+
+
+const bcmpkt_txpmd_fget_t bcm78900_b0_txpmd_fget = {
+    {
+        bcmpkt_txpmd_start_get,
+        bcmpkt_txpmd_header_type_get,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_txpmd_cell_error_get,
+        NULL,
+        bcmpkt_txpmd_src_modid_get,
+        bcmpkt_txpmd_cos_get,
+        bcmpkt_txpmd_input_pri_get,
+        bcmpkt_txpmd_unicast_get,
+        bcmpkt_txpmd_rqe_q_num_get,
+        NULL,
+        bcmpkt_txpmd_ieee1588_one_step_enable_get,
+        bcmpkt_txpmd_ieee1588_regen_udp_checksum_get,
+        bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_get,
+        bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_get,
+        bcmpkt_txpmd_tx_ts_get,
+        bcmpkt_txpmd_spid_override_get,
+        bcmpkt_txpmd_spid_get,
+        bcmpkt_txpmd_spap_get,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_txpmd_cng_get,
+        bcmpkt_txpmd_destination_get,
+        bcmpkt_txpmd_destination_type_get,
+        bcmpkt_txpmd_wred_mark_eligible_get,
+        bcmpkt_txpmd_wred_response_get,
+        bcmpkt_txpmd_cpu_tx_mcast_lb_index_get,
+        bcmpkt_txpmd_cpu_tx_ecmp_member_id_get,
+        bcmpkt_txpmd_cpu_tx_destination_get,
+        bcmpkt_txpmd_cpu_tx_destination_type_get,
+        bcmpkt_txpmd_cpu_tx_dp_get,
+        bcmpkt_txpmd_cpu_tx_input_pri_get,
+        bcmpkt_txpmd_cpu_tx_int_cn_get,
+        bcmpkt_txpmd_cpu_tx_int_pri_get,
+        bcmpkt_txpmd_cpu_tx_mcast_lb_index_vld_get,
+        bcmpkt_txpmd_cpu_tx_pkt_profile_get,
+        bcmpkt_txpmd_cpu_tx_qos_fields_vld_get,
+        bcmpkt_txpmd_cpu_tx_routed_pkt_get,
+        NULL,
+        NULL,
+        bcmpkt_txpmd_cpu_tx_vrf_get,
+        bcmpkt_txpmd_cpu_tx_vrf_valid_get,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL
+    }
+};
+
+
+const bcmpkt_txpmd_fset_t bcm78900_b0_txpmd_fset = {
+    {
+        bcmpkt_txpmd_start_set,
+        bcmpkt_txpmd_header_type_set,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_txpmd_cell_error_set,
+        NULL,
+        bcmpkt_txpmd_src_modid_set,
+        bcmpkt_txpmd_cos_set,
+        bcmpkt_txpmd_input_pri_set,
+        bcmpkt_txpmd_unicast_set,
+        bcmpkt_txpmd_rqe_q_num_set,
+        NULL,
+        bcmpkt_txpmd_ieee1588_one_step_enable_set,
+        bcmpkt_txpmd_ieee1588_regen_udp_checksum_set,
+        bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_set,
+        bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_set,
+        bcmpkt_txpmd_tx_ts_set,
+        bcmpkt_txpmd_spid_override_set,
+        bcmpkt_txpmd_spid_set,
+        bcmpkt_txpmd_spap_set,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_txpmd_cng_set,
+        bcmpkt_txpmd_destination_set,
+        bcmpkt_txpmd_destination_type_set,
+        bcmpkt_txpmd_wred_mark_eligible_set,
+        bcmpkt_txpmd_wred_response_set,
+        bcmpkt_txpmd_cpu_tx_mcast_lb_index_set,
+        bcmpkt_txpmd_cpu_tx_ecmp_member_id_set,
+        bcmpkt_txpmd_cpu_tx_destination_set,
+        bcmpkt_txpmd_cpu_tx_destination_type_set,
+        bcmpkt_txpmd_cpu_tx_dp_set,
+        bcmpkt_txpmd_cpu_tx_input_pri_set,
+        bcmpkt_txpmd_cpu_tx_int_cn_set,
+        bcmpkt_txpmd_cpu_tx_int_pri_set,
+        bcmpkt_txpmd_cpu_tx_mcast_lb_index_vld_set,
+        bcmpkt_txpmd_cpu_tx_pkt_profile_set,
+        bcmpkt_txpmd_cpu_tx_qos_fields_vld_set,
+        bcmpkt_txpmd_cpu_tx_routed_pkt_set,
+        NULL,
+        NULL,
+        bcmpkt_txpmd_cpu_tx_vrf_set,
+        bcmpkt_txpmd_cpu_tx_vrf_valid_set,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL
+    }
+};
+
+
+const bcmpkt_txpmd_figet_t bcm78900_b0_txpmd_figet = {
+    {
+        bcmpkt_txpmd_i_size_get
+    }
+};
+
+static shr_enum_map_t bcm78900_b0_txpmd_view_types[] = {
+    {"sobmh_from_cpu", 1},
+    {"cpu_tx", 2},
+    {NULL, -1},
+};
+
+/* -2: unsupported, -1: global, others: view's value */
+static int bcm78900_b0_txpmd_view_infos[BCMPKT_TXPMD_FID_COUNT] = {
+     -1, -1, -2, -2, -2, -2, -2,  1, -2,  1,  1,  1,  1,  1, -2,  1,
+      1,  1,  1,  1,  1,  1,  1, -2, -2, -2, -2, -2, -2, -2,  1,  1,
+      1,  1,  1,  2,  2,  2,  2,  2,  2,  2,  2,  2,  2,  2,  2, -2,
+     -2,  2,  2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+     -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+     -2, -2, -2,
+};
+
+
+void bcm78900_b0_txpmd_view_info_get(bcmpkt_pmd_view_info_t *info)
+{
+    info->view_infos = bcm78900_b0_txpmd_view_infos;
+    info->view_types = bcm78900_b0_txpmd_view_types;
+    info->view_type_get = bcmpkt_txpmd_header_type_get;
+}
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78905_a0/bcm78905_a0_pkt_lbhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78905_a0/bcm78905_a0_pkt_lbhdr.c
new file mode 100644
index 000000000..fe93b2a63
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78905_a0/bcm78905_a0_pkt_lbhdr.c
@@ -0,0 +1,347 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated from the registers file.
+ * Edits to this file will be lost when it is regenerated.
+ * Tool: INTERNAL/regs/xgs/generate-pmd.pl
+ *
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ *
+ * This file provides LBHDR access functions for BCM78905_A0.
+ *
+ ******************************************************************************/
+
+#include <sal/sal_types.h>
+#include <bcmpkt/bcmpkt_lbhdr_internal.h>
+
+#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1)
+#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l))
+#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s)))
+#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s)))
+/*******************************************************************************
+ * SWFORMAT:  LBHDR
+ * BLOCKS:
+ * SIZE:     128
+ ******************************************************************************/
+static void bcmpkt_lbhdr_start_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 30, 2, val);
+}
+
+static uint32_t bcmpkt_lbhdr_start_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 30, 2);
+    return val;
+}
+
+static void bcmpkt_lbhdr_header_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 24, 6, val);
+}
+
+static uint32_t bcmpkt_lbhdr_header_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 24, 6);
+    return val;
+}
+
+static void bcmpkt_lbhdr_pkt_profile_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 16, 3, val);
+}
+
+static uint32_t bcmpkt_lbhdr_pkt_profile_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 16, 3);
+    return val;
+}
+
+static void bcmpkt_lbhdr_visibility_pkt_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 13, 1, val);
+}
+
+static uint32_t bcmpkt_lbhdr_visibility_pkt_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 13, 1);
+    return val;
+}
+
+static void bcmpkt_lbhdr_pp_port_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 21, 9, val);
+}
+
+static uint32_t bcmpkt_lbhdr_pp_port_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 21, 9);
+    return val;
+}
+
+static void bcmpkt_lbhdr_routed_pkt_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 15, 1, val);
+}
+
+static uint32_t bcmpkt_lbhdr_routed_pkt_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 15, 1);
+    return val;
+}
+
+static void bcmpkt_lbhdr_vrf_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 2, 13, val);
+}
+
+static uint32_t bcmpkt_lbhdr_vrf_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 2, 13);
+    return val;
+}
+
+static void bcmpkt_lbhdr_vrf_valid_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[2], 14, 1, val);
+}
+
+static uint32_t bcmpkt_lbhdr_vrf_valid_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[2], 14, 1);
+    return val;
+}
+
+static void bcmpkt_lbhdr_qos_field_valid_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[1], 19, 1, val);
+}
+
+static uint32_t bcmpkt_lbhdr_qos_field_valid_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[1], 19, 1);
+    return val;
+}
+
+static void bcmpkt_lbhdr_opaque_object_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 8, 4, val);
+}
+
+static uint32_t bcmpkt_lbhdr_opaque_object_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 8, 4);
+    return val;
+}
+
+static void bcmpkt_lbhdr_qos_field_eth_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 12, 8, val);
+}
+
+static uint32_t bcmpkt_lbhdr_qos_field_eth_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 12, 8);
+    return val;
+}
+
+static void bcmpkt_lbhdr_int_pri_eth_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 12, 4, val);
+}
+
+static uint32_t bcmpkt_lbhdr_int_pri_eth_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 12, 4);
+    return val;
+}
+
+static void bcmpkt_lbhdr_int_cn_eth_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 16, 2, val);
+}
+
+static uint32_t bcmpkt_lbhdr_int_cn_eth_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 16, 2);
+    return val;
+}
+
+static void bcmpkt_lbhdr_cng_eth_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 18, 2, val);
+}
+
+static uint32_t bcmpkt_lbhdr_cng_eth_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 18, 2);
+    return val;
+}
+
+static uint32_t bcmpkt_lbhdr_i_size_get(uint32_t *data, uint32_t **addr)
+{
+    return 4;
+}
+
+
+const bcmpkt_lbhdr_fget_t bcm78905_a0_lbhdr_fget = {
+    {
+        bcmpkt_lbhdr_start_get,
+        bcmpkt_lbhdr_header_type_get,
+        NULL,
+        bcmpkt_lbhdr_pkt_profile_get,
+        bcmpkt_lbhdr_visibility_pkt_get,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_lbhdr_pp_port_get,
+        bcmpkt_lbhdr_routed_pkt_get,
+        bcmpkt_lbhdr_vrf_get,
+        bcmpkt_lbhdr_vrf_valid_get,
+        bcmpkt_lbhdr_qos_field_valid_get,
+        bcmpkt_lbhdr_opaque_object_get,
+        bcmpkt_lbhdr_qos_field_eth_get,
+        bcmpkt_lbhdr_int_pri_eth_get,
+        bcmpkt_lbhdr_int_cn_eth_get,
+        bcmpkt_lbhdr_cng_eth_get,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL
+    }
+};
+
+
+const bcmpkt_lbhdr_fset_t bcm78905_a0_lbhdr_fset = {
+    {
+        bcmpkt_lbhdr_start_set,
+        bcmpkt_lbhdr_header_type_set,
+        NULL,
+        bcmpkt_lbhdr_pkt_profile_set,
+        bcmpkt_lbhdr_visibility_pkt_set,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_lbhdr_pp_port_set,
+        bcmpkt_lbhdr_routed_pkt_set,
+        bcmpkt_lbhdr_vrf_set,
+        bcmpkt_lbhdr_vrf_valid_set,
+        bcmpkt_lbhdr_qos_field_valid_set,
+        bcmpkt_lbhdr_opaque_object_set,
+        bcmpkt_lbhdr_qos_field_eth_set,
+        bcmpkt_lbhdr_int_pri_eth_set,
+        bcmpkt_lbhdr_int_cn_eth_set,
+        bcmpkt_lbhdr_cng_eth_set,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL
+    }
+};
+
+
+const bcmpkt_lbhdr_figet_t bcm78905_a0_lbhdr_figet = {
+    {
+        bcmpkt_lbhdr_i_size_get
+    }
+};
+
+static shr_enum_map_t bcm78905_a0_lbhdr_view_types[] = {
+    {NULL, -1},
+};
+
+/* -2: unsupported, -1: global, others: view's value */
+static int bcm78905_a0_lbhdr_view_infos[BCMPKT_LBHDR_FID_COUNT] = {
+     -1, -1, -2, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+     -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, -1, -1, -1, -1,
+     -1, -1, -1, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+     -2,
+};
+
+
+void bcm78905_a0_lbhdr_view_info_get(bcmpkt_pmd_view_info_t *info)
+{
+    info->view_infos = bcm78905_a0_lbhdr_view_infos;
+    info->view_types = bcm78905_a0_lbhdr_view_types;
+    info->view_type_get = NULL;
+}
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78905_a0/bcm78905_a0_pkt_rxpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78905_a0/bcm78905_a0_pkt_rxpmd.c
new file mode 100644
index 000000000..142b28438
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78905_a0/bcm78905_a0_pkt_rxpmd.c
@@ -0,0 +1,1124 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated from the registers file.
+ * Edits to this file will be lost when it is regenerated.
+ * Tool: INTERNAL/regs/xgs/generate-pmd.pl
+ *
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ *
+ * This file provides RXPMD access functions for BCM78905_A0.
+ *
+ ******************************************************************************/
+
+#include <sal/sal_types.h>
+#include <bcmpkt/bcmpkt_rxpmd.h>
+#include <bcmpkt/bcmpkt_rxpmd_internal.h>
+
+#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1)
+#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l))
+#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s)))
+#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s)))
+/*******************************************************************************
+ * SWFORMAT:  RXPMD
+ * BLOCKS:
+ * SIZE:     416
+ ******************************************************************************/
+static void bcmpkt_rxpmd_unicast_queue_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[4], 22, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_unicast_queue_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[4], 22, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_queue_num_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[10], 26, 6, val);
+}
+
+static uint32_t bcmpkt_rxpmd_queue_num_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[10], 26, 6);
+    return val;
+}
+
+static void bcmpkt_rxpmd_cpu_cos_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[10], 26, 6, val);
+}
+
+static uint32_t bcmpkt_rxpmd_cpu_cos_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[10], 26, 6);
+    return val;
+}
+
+static void bcmpkt_rxpmd_matched_rule_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[8], 16, 12, val);
+}
+
+static uint32_t bcmpkt_rxpmd_matched_rule_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[8], 16, 12);
+    return val;
+}
+
+static void bcmpkt_rxpmd_pkt_length_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[9], 3, 14, val);
+}
+
+static uint32_t bcmpkt_rxpmd_pkt_length_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[9], 3, 14);
+    return val;
+}
+
+static void bcmpkt_rxpmd_src_port_num_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[6], 22, 9, val);
+}
+
+static uint32_t bcmpkt_rxpmd_src_port_num_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[6], 22, 9);
+    return val;
+}
+
+static void bcmpkt_rxpmd_outer_vid_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[7], 3, 12, val);
+}
+
+static uint32_t bcmpkt_rxpmd_outer_vid_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[7], 3, 12);
+    return val;
+}
+
+static void bcmpkt_rxpmd_outer_cfi_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[8], 31, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_outer_cfi_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[8], 31, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_outer_pri_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[7], 0, 3, val);
+}
+
+static uint32_t bcmpkt_rxpmd_outer_pri_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[7], 0, 3);
+    return val;
+}
+
+static void bcmpkt_rxpmd_special_packet_indicator_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[6], 21, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_special_packet_indicator_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[6], 21, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_special_packet_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[8], 6, 3, val);
+}
+
+static uint32_t bcmpkt_rxpmd_special_packet_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[8], 6, 3);
+    return val;
+}
+
+static void bcmpkt_rxpmd_change_dscp_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[8], 2, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_change_dscp_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[8], 2, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_dscp_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[8], 6, 6, val);
+}
+
+static uint32_t bcmpkt_rxpmd_dscp_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[8], 6, 6);
+    return val;
+}
+
+static void bcmpkt_rxpmd_change_ecn_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[8], 3, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_change_ecn_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[8], 3, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_ecn_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[8], 12, 2, val);
+}
+
+static uint32_t bcmpkt_rxpmd_ecn_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[8], 12, 2);
+    return val;
+}
+
+static void bcmpkt_rxpmd_timestamp_set(uint32_t *data, uint32_t val)
+{
+    data[5] = val;
+}
+
+static uint32_t bcmpkt_rxpmd_timestamp_get(uint32_t *data)
+{
+    uint32_t val;
+    val = data[5];
+    return val;
+}
+
+static void bcmpkt_rxpmd_timestamp_hi_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[4], 0, 16, val);
+}
+
+static uint32_t bcmpkt_rxpmd_timestamp_hi_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[4], 0, 16);
+    return val;
+}
+
+static void bcmpkt_rxpmd_mtp_index_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[8], 28, 3, val);
+}
+
+static uint32_t bcmpkt_rxpmd_mtp_index_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[8], 28, 3);
+    return val;
+}
+
+static void bcmpkt_rxpmd_bpdu_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[8], 1, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_bpdu_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[8], 1, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_l3only_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[8], 15, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_l3only_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[8], 15, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_ip_routed_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[8], 14, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_ip_routed_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[8], 14, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_uc_sw_copy_dropped_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[4], 21, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_uc_sw_copy_dropped_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[4], 21, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_switch_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[6], 31, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_switch_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[6], 31, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_ing_otag_action_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[9], 1, 2, val);
+}
+
+static uint32_t bcmpkt_rxpmd_ing_otag_action_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[9], 1, 2);
+    return val;
+}
+
+static void bcmpkt_rxpmd_ing_tag_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[9], 0, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_ing_tag_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[9], 0, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_rx_bfd_start_offset_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[10], 18, 8, val);
+}
+
+static uint32_t bcmpkt_rxpmd_rx_bfd_start_offset_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[10], 18, 8);
+    return val;
+}
+
+static void bcmpkt_rxpmd_rx_bfd_start_offset_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[10], 16, 2, val);
+}
+
+static uint32_t bcmpkt_rxpmd_rx_bfd_start_offset_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[10], 16, 2);
+    return val;
+}
+
+static void bcmpkt_rxpmd_rx_bfd_session_index_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[10], 4, 12, val);
+}
+
+static uint32_t bcmpkt_rxpmd_rx_bfd_session_index_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[10], 4, 12);
+    return val;
+}
+
+static void bcmpkt_rxpmd_reason_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[10], 0, 4, val);
+}
+
+static uint32_t bcmpkt_rxpmd_reason_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[10], 0, 4);
+    return val;
+}
+
+static void bcmpkt_rxpmd_do_not_change_ttl_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[8], 5, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_do_not_change_ttl_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[8], 5, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_i2e_classid_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[10], 16, 4, val);
+}
+
+static uint32_t bcmpkt_rxpmd_i2e_classid_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[10], 16, 4);
+    return val;
+}
+
+static void bcmpkt_rxpmd_i2e_classid_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[10], 4, 12, val);
+}
+
+static uint32_t bcmpkt_rxpmd_i2e_classid_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[10], 4, 12);
+    return val;
+}
+
+static void bcmpkt_rxpmd_ing_l3_intf_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[10], 4, 13, val);
+}
+
+static uint32_t bcmpkt_rxpmd_ing_l3_intf_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[10], 4, 13);
+    return val;
+}
+
+static void bcmpkt_rxpmd_regen_crc_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[6], 0, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_regen_crc_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[6], 0, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_entropy_label_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[6], 1, 20, val);
+}
+
+static uint32_t bcmpkt_rxpmd_entropy_label_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[6], 1, 20);
+    return val;
+}
+
+static void bcmpkt_rxpmd_tunnel_decap_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[4], 17, 4, val);
+}
+
+static uint32_t bcmpkt_rxpmd_tunnel_decap_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[4], 17, 4);
+    return val;
+}
+
+static void bcmpkt_rxpmd_dlb_id_valid_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[8], 4, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_dlb_id_valid_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[8], 4, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_dlb_id_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[4], 25, 7, val);
+}
+
+static uint32_t bcmpkt_rxpmd_dlb_id_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[4], 25, 7);
+    return val;
+}
+
+static void bcmpkt_rxpmd_replication_or_nhop_index_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[7], 15, 17, val);
+}
+
+static uint32_t bcmpkt_rxpmd_replication_or_nhop_index_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[7], 15, 17);
+    return val;
+}
+
+static void bcmpkt_rxpmd_incoming_int_hdr_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[4], 23, 2, val);
+}
+
+static uint32_t bcmpkt_rxpmd_incoming_int_hdr_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[4], 23, 2);
+    return val;
+}
+
+static void bcmpkt_rxpmd_ing_l3_intf_valid_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[10], 20, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_ing_l3_intf_valid_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[10], 20, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_o_nhi_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[9], 17, 15, val);
+}
+
+static uint32_t bcmpkt_rxpmd_o_nhi_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[9], 17, 15);
+    return val;
+}
+
+static void bcmpkt_rxpmd_incoming_opaque_tag_status_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[8], 0, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_incoming_opaque_tag_status_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[8], 0, 1);
+    return val;
+}
+
+static void bcmpkt_rxpmd_ieee_802_1as_timestamp_enabled_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[4], 16, 1, val);
+}
+
+static uint32_t bcmpkt_rxpmd_ieee_802_1as_timestamp_enabled_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[4], 16, 1);
+    return val;
+}
+
+static uint32_t bcmpkt_rxpmd_i_size_get(uint32_t *data, uint32_t **addr)
+{
+    return 13;
+}
+
+static uint32_t bcmpkt_rxpmd_i_reason_get(uint32_t *data, uint32_t **addr)
+{
+    *addr = data + 11;
+    return 2;
+}
+
+static uint32_t bcmpkt_rxpmd_i_module_hdr_get(uint32_t *data, uint32_t **addr)
+{
+    *addr = data + 0;
+    return 4;
+}
+
+/*******************************************************************************
+ * SWFORMAT:  RX_REASON
+ * BLOCKS:
+ * SIZE:     46
+ ******************************************************************************/
+void bcm78905_a0_rx_reason_encode(const bcmpkt_rx_reasons_t *reasons, uint32_t *data)
+{
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_INVALID_REASON)) {
+        data[1] |= (0x1 << 0);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SLF)) {
+        data[1] |= (0x1 << 1);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_DLF)) {
+        data[1] |= (0x1 << 2);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L2MOVE)) {
+        data[1] |= (0x1 << 3);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L2CPU)) {
+        data[1] |= (0x1 << 4);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MISS)) {
+        data[1] |= (0x1 << 5);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3DST_MISS)) {
+        data[1] |= (0x1 << 6);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MOVE)) {
+        data[1] |= (0x1 << 7);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_MC_MISS)) {
+        data[1] |= (0x1 << 8);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_MISS)) {
+        data[1] |= (0x1 << 9);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_FFP)) {
+        data[1] |= (0x1 << 10);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3HDR_ERR)) {
+        data[1] |= (0x1 << 11);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_PROTOCOL_PKT)) {
+        data[1] |= (0x1 << 12);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_DOS_ATTACK)) {
+        data[1] |= (0x1 << 13);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_MARTIAN_ADDR)) {
+        data[1] |= (0x1 << 14);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_TUNNEL_ERR)) {
+        data[1] |= (0x1 << 15);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW_SRC)) {
+        data[1] |= (0x1 << 16);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW_DST)) {
+        data[1] |= (0x1 << 17);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_ICMP_REDIRECT)) {
+        data[1] |= (0x1 << 18);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_L3_SLOWPATH)) {
+        data[1] |= (0x1 << 19);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_PARITY_ERROR)) {
+        data[1] |= (0x1 << 20);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_L3_MTU_CHECK_FAIL)) {
+        data[1] |= (0x1 << 21);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_TTL_CHECK)) {
+        data[1] |= (0x1 << 22);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_LABEL_MISS)) {
+        data[1] |= (0x1 << 23);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_INVALID_ACTION)) {
+        data[1] |= (0x1 << 24);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_INVALID_PAYLOAD)) {
+        data[1] |= (0x1 << 25);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_VFP)) {
+        data[1] |= (0x1 << 26);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_PBT_NONUC_PKT)) {
+        data[1] |= (0x1 << 27);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_L3_NEXT_HOP)) {
+        data[1] |= (0x1 << 28);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MY_STATION)) {
+        data[1] |= (0x1 << 29);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_TIME_SYNC)) {
+        data[1] |= (0x1 << 30);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_TUNNEL_DECAP_ECN_ERROR)) {
+        data[1] |= (0x1 << 31);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_BFD_SLOWPATH)) {
+        data[0] |= (0x1 << 0);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_BFD_ERROR)) {
+        data[0] |= (0x1 << 1);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_PACKET_TRACE_TO_CPU)) {
+        data[0] |= (0x1 << 2);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_UNKNOWN_CONTROL_PKT)) {
+        data[0] |= (0x1 << 3);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_ALERT_LABEL)) {
+        data[0] |= (0x1 << 4);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_INTERFACE_MISMATCH)) {
+        data[0] |= (0x1 << 5);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_DLB_MONITOR)) {
+        data[0] |= (0x1 << 6);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW_FLEX)) {
+        data[0] |= (0x1 << 7);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_UVLAN)) {
+        data[0] |= (0x1 << 8);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_SRV6_ERROR)) {
+        data[0] |= (0x1 << 9);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_VXLAN_VN_ID_MISS)) {
+        data[0] |= (0x1 << 10);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_VXLAN_SIP_MISS)) {
+        data[0] |= (0x1 << 11);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_ADAPT_MISS)) {
+        data[0] |= (0x1 << 12);
+    }
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_INVALID_GSH_NON_GSH)) {
+        data[0] |= (0x1 << 13);
+    }
+}
+
+void bcm78905_a0_rx_reason_decode(const uint32_t *data, bcmpkt_rx_reasons_t *reasons)
+{
+    uint32_t val;
+    COMPILER_REFERENCE(val);
+    if (data[1] & (0x1 << 0)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_INVALID_REASON);
+    }
+    if (data[1] & (0x1 << 1)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_SLF);
+    }
+    if (data[1] & (0x1 << 2)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_DLF);
+    }
+    if (data[1] & (0x1 << 3)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L2MOVE);
+    }
+    if (data[1] & (0x1 << 4)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L2CPU);
+    }
+    if (data[1] & (0x1 << 5)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MISS);
+    }
+    if (data[1] & (0x1 << 6)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3DST_MISS);
+    }
+    if (data[1] & (0x1 << 7)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MOVE);
+    }
+    if (data[1] & (0x1 << 8)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_MC_MISS);
+    }
+    if (data[1] & (0x1 << 9)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_MISS);
+    }
+    if (data[1] & (0x1 << 10)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_FFP);
+    }
+    if (data[1] & (0x1 << 11)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3HDR_ERR);
+    }
+    if (data[1] & (0x1 << 12)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_PROTOCOL_PKT);
+    }
+    if (data[1] & (0x1 << 13)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_DOS_ATTACK);
+    }
+    if (data[1] & (0x1 << 14)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_MARTIAN_ADDR);
+    }
+    if (data[1] & (0x1 << 15)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_TUNNEL_ERR);
+    }
+    if (data[1] & (0x1 << 16)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW_SRC);
+    }
+    if (data[1] & (0x1 << 17)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW_DST);
+    }
+    if (data[1] & (0x1 << 18)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_ICMP_REDIRECT);
+    }
+    if (data[1] & (0x1 << 19)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_L3_SLOWPATH);
+    }
+    if (data[1] & (0x1 << 20)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_PARITY_ERROR);
+    }
+    if (data[1] & (0x1 << 21)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_L3_MTU_CHECK_FAIL);
+    }
+    if (data[1] & (0x1 << 22)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_TTL_CHECK);
+    }
+    if (data[1] & (0x1 << 23)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_LABEL_MISS);
+    }
+    if (data[1] & (0x1 << 24)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_INVALID_ACTION);
+    }
+    if (data[1] & (0x1 << 25)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_INVALID_PAYLOAD);
+    }
+    if (data[1] & (0x1 << 26)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_VFP);
+    }
+    if (data[1] & (0x1 << 27)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_PBT_NONUC_PKT);
+    }
+    if (data[1] & (0x1 << 28)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_L3_NEXT_HOP);
+    }
+    if (data[1] & (0x1 << 29)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MY_STATION);
+    }
+    if (data[1] & (0x1 << 30)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_TIME_SYNC);
+    }
+    if (data[1] & (0x1 << 31)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_TUNNEL_DECAP_ECN_ERROR);
+    }
+    if (data[0] & (0x1 << 0)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_BFD_SLOWPATH);
+    }
+    if (data[0] & (0x1 << 1)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_BFD_ERROR);
+    }
+    if (data[0] & (0x1 << 2)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_PACKET_TRACE_TO_CPU);
+    }
+    if (data[0] & (0x1 << 3)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_UNKNOWN_CONTROL_PKT);
+    }
+    if (data[0] & (0x1 << 4)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_ALERT_LABEL);
+    }
+    if (data[0] & (0x1 << 5)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_INTERFACE_MISMATCH);
+    }
+    if (data[0] & (0x1 << 6)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_DLB_MONITOR);
+    }
+    if (data[0] & (0x1 << 7)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW_FLEX);
+    }
+    if (data[0] & (0x1 << 8)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_UVLAN);
+    }
+    if (data[0] & (0x1 << 9)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_SRV6_ERROR);
+    }
+    if (data[0] & (0x1 << 10)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_VXLAN_VN_ID_MISS);
+    }
+    if (data[0] & (0x1 << 11)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_VXLAN_SIP_MISS);
+    }
+    if (data[0] & (0x1 << 12)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_ADAPT_MISS);
+    }
+    if (data[0] & (0x1 << 13)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_INVALID_GSH_NON_GSH);
+    }
+}
+
+/*******************************************************************************
+ * SWFORMAT:  EP_RX_REASON
+ * BLOCKS:
+ * SIZE:     64
+ ******************************************************************************/
+void bcm78905_a0_ep_rx_reason_encode(const bcmpkt_rx_reasons_t *reasons, uint32_t *data)
+{
+    if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_EP_CTC)) {
+        data[1] |= (0x1 << 0);
+    }
+}
+
+void bcm78905_a0_ep_rx_reason_decode(const uint32_t *data, bcmpkt_rx_reasons_t *reasons)
+{
+    uint32_t val;
+    COMPILER_REFERENCE(val);
+    if (data[1] & (0x1 << 0)) {
+        BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_EP_CTC);
+    }
+}
+
+const bcmpkt_rxpmd_fget_t bcm78905_a0_rxpmd_fget = {
+    {
+        bcmpkt_rxpmd_unicast_queue_get,
+        bcmpkt_rxpmd_queue_num_get,
+        bcmpkt_rxpmd_cpu_cos_get,
+        NULL,
+        bcmpkt_rxpmd_matched_rule_get,
+        bcmpkt_rxpmd_pkt_length_get,
+        bcmpkt_rxpmd_src_port_num_get,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_outer_vid_get,
+        bcmpkt_rxpmd_outer_cfi_get,
+        bcmpkt_rxpmd_outer_pri_get,
+        bcmpkt_rxpmd_special_packet_indicator_get,
+        bcmpkt_rxpmd_special_packet_type_get,
+        bcmpkt_rxpmd_change_dscp_get,
+        bcmpkt_rxpmd_dscp_get,
+        bcmpkt_rxpmd_change_ecn_get,
+        bcmpkt_rxpmd_ecn_get,
+        NULL,
+        bcmpkt_rxpmd_timestamp_get,
+        bcmpkt_rxpmd_timestamp_hi_get,
+        bcmpkt_rxpmd_mtp_index_get,
+        bcmpkt_rxpmd_bpdu_get,
+        NULL,
+        bcmpkt_rxpmd_l3only_get,
+        bcmpkt_rxpmd_ip_routed_get,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_uc_sw_copy_dropped_get,
+        bcmpkt_rxpmd_switch_get,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_ing_otag_action_get,
+        bcmpkt_rxpmd_ing_tag_type_get,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_rx_bfd_start_offset_get,
+        bcmpkt_rxpmd_rx_bfd_start_offset_type_get,
+        bcmpkt_rxpmd_rx_bfd_session_index_get,
+        bcmpkt_rxpmd_reason_type_get,
+        bcmpkt_rxpmd_do_not_change_ttl_get,
+        bcmpkt_rxpmd_i2e_classid_type_get,
+        bcmpkt_rxpmd_i2e_classid_get,
+        bcmpkt_rxpmd_ing_l3_intf_get,
+        NULL,
+        bcmpkt_rxpmd_regen_crc_get,
+        bcmpkt_rxpmd_entropy_label_get,
+        bcmpkt_rxpmd_tunnel_decap_type_get,
+        bcmpkt_rxpmd_dlb_id_valid_get,
+        bcmpkt_rxpmd_dlb_id_get,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_replication_or_nhop_index_get,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_incoming_int_hdr_type_get,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_ing_l3_intf_valid_get,
+        bcmpkt_rxpmd_o_nhi_get,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_incoming_opaque_tag_status_get,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_ieee_802_1as_timestamp_enabled_get,
+        NULL,
+        NULL,
+        NULL
+    }
+};
+
+
+const bcmpkt_rxpmd_fset_t bcm78905_a0_rxpmd_fset = {
+    {
+        bcmpkt_rxpmd_unicast_queue_set,
+        bcmpkt_rxpmd_queue_num_set,
+        bcmpkt_rxpmd_cpu_cos_set,
+        NULL,
+        bcmpkt_rxpmd_matched_rule_set,
+        bcmpkt_rxpmd_pkt_length_set,
+        bcmpkt_rxpmd_src_port_num_set,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_outer_vid_set,
+        bcmpkt_rxpmd_outer_cfi_set,
+        bcmpkt_rxpmd_outer_pri_set,
+        bcmpkt_rxpmd_special_packet_indicator_set,
+        bcmpkt_rxpmd_special_packet_type_set,
+        bcmpkt_rxpmd_change_dscp_set,
+        bcmpkt_rxpmd_dscp_set,
+        bcmpkt_rxpmd_change_ecn_set,
+        bcmpkt_rxpmd_ecn_set,
+        NULL,
+        bcmpkt_rxpmd_timestamp_set,
+        bcmpkt_rxpmd_timestamp_hi_set,
+        bcmpkt_rxpmd_mtp_index_set,
+        bcmpkt_rxpmd_bpdu_set,
+        NULL,
+        bcmpkt_rxpmd_l3only_set,
+        bcmpkt_rxpmd_ip_routed_set,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_uc_sw_copy_dropped_set,
+        bcmpkt_rxpmd_switch_set,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_ing_otag_action_set,
+        bcmpkt_rxpmd_ing_tag_type_set,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_rx_bfd_start_offset_set,
+        bcmpkt_rxpmd_rx_bfd_start_offset_type_set,
+        bcmpkt_rxpmd_rx_bfd_session_index_set,
+        bcmpkt_rxpmd_reason_type_set,
+        bcmpkt_rxpmd_do_not_change_ttl_set,
+        bcmpkt_rxpmd_i2e_classid_type_set,
+        bcmpkt_rxpmd_i2e_classid_set,
+        bcmpkt_rxpmd_ing_l3_intf_set,
+        NULL,
+        bcmpkt_rxpmd_regen_crc_set,
+        bcmpkt_rxpmd_entropy_label_set,
+        bcmpkt_rxpmd_tunnel_decap_type_set,
+        bcmpkt_rxpmd_dlb_id_valid_set,
+        bcmpkt_rxpmd_dlb_id_set,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_replication_or_nhop_index_set,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_incoming_int_hdr_type_set,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_ing_l3_intf_valid_set,
+        bcmpkt_rxpmd_o_nhi_set,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_incoming_opaque_tag_status_set,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_rxpmd_ieee_802_1as_timestamp_enabled_set,
+        NULL,
+        NULL,
+        NULL
+    }
+};
+
+
+const bcmpkt_rxpmd_figet_t bcm78905_a0_rxpmd_figet = {
+    {
+        bcmpkt_rxpmd_i_size_get,
+        bcmpkt_rxpmd_i_reason_get,
+        bcmpkt_rxpmd_i_module_hdr_get,
+        NULL
+    }
+};
+
+static shr_enum_map_t bcm78905_a0_rxpmd_view_types[] = {
+    {NULL, -1},
+};
+
+/* -2: unsupported, -1: global, others: view's value */
+static int bcm78905_a0_rxpmd_view_infos[BCMPKT_RXPMD_FID_COUNT] = {
+     -1, -1, -1, -2, -1, -1, -1, -2, -2, -2, -1, -1, -1, -1, -1, -1,
+     -1, -1, -1, -2, -1, -1, -1, -1, -2, -1, -1, -2, -2, -1, -1, -2,
+     -2, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1,
+     -1, -1, -1, -1, -1, -1, -1, -2, -1, -1, -1, -1, -1, -2, -2, -2,
+     -2, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, -2, -2, -2,
+     -1, -1, -2, -2, -1, -2, -2, -2, -2, -1, -2, -2, -2,
+};
+
+
+void bcm78905_a0_rxpmd_view_info_get(bcmpkt_pmd_view_info_t *info)
+{
+    info->view_infos = bcm78905_a0_rxpmd_view_infos;
+    info->view_types = bcm78905_a0_rxpmd_view_types;
+    info->view_type_get = NULL;
+}
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78905_a0/bcm78905_a0_pkt_txpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78905_a0/bcm78905_a0_pkt_txpmd.c
new file mode 100644
index 000000000..464dcfde1
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78905_a0/bcm78905_a0_pkt_txpmd.c
@@ -0,0 +1,871 @@
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated from the registers file.
+ * Edits to this file will be lost when it is regenerated.
+ * Tool: INTERNAL/regs/xgs/generate-pmd.pl
+ *
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ *
+ * This file provides TXPMD access functions for BCM78905_A0.
+ *
+ ******************************************************************************/
+
+#include <sal/sal_types.h>
+#include <bcmpkt/bcmpkt_txpmd_internal.h>
+
+#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1)
+#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l))
+#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s)))
+#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s)))
+/*******************************************************************************
+ * SWFORMAT:  TXPMD
+ * BLOCKS:
+ * SIZE:     128
+ ******************************************************************************/
+static void bcmpkt_txpmd_start_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 30, 2, val);
+}
+
+static uint32_t bcmpkt_txpmd_start_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 30, 2);
+    return val;
+}
+
+static void bcmpkt_txpmd_header_type_set(uint32_t *data, uint32_t val)
+{
+    WORD_FIELD_SET(data[0], 24, 6, val);
+}
+
+static uint32_t bcmpkt_txpmd_header_type_get(uint32_t *data)
+{
+    uint32_t val;
+    val = WORD_FIELD_GET(data[0], 24, 6);
+    return val;
+}
+
+static void bcmpkt_txpmd_cell_error_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return;
+    }
+    WORD_FIELD_SET(data[3], 0, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_cell_error_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[3], 0, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_src_modid_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 20, 8, val);
+}
+
+static uint32_t bcmpkt_txpmd_src_modid_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 20, 8);
+    return val;
+}
+
+static void bcmpkt_txpmd_cos_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return;
+    }
+    WORD_FIELD_SET(data[3], 3, 6, val);
+}
+
+static uint32_t bcmpkt_txpmd_cos_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[3], 3, 6);
+    return val;
+}
+
+static void bcmpkt_txpmd_input_pri_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 8, 4, val);
+}
+
+static uint32_t bcmpkt_txpmd_input_pri_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 8, 4);
+    return val;
+}
+
+static void bcmpkt_txpmd_unicast_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 29, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_unicast_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 29, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_rqe_q_num_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 12, 3, val);
+}
+
+static uint32_t bcmpkt_txpmd_rqe_q_num_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 12, 3);
+    return val;
+}
+
+static void bcmpkt_txpmd_ieee1588_one_step_enable_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return;
+    }
+    WORD_FIELD_SET(data[3], 30, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_ieee1588_one_step_enable_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[3], 30, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_ieee1588_regen_udp_checksum_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return;
+    }
+    WORD_FIELD_SET(data[3], 31, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_ieee1588_regen_udp_checksum_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[3], 31, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return;
+    }
+    WORD_FIELD_SET(data[3], 29, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[3], 29, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 0, 8, val);
+}
+
+static uint32_t bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 0, 8);
+    return val;
+}
+
+static void bcmpkt_txpmd_tx_ts_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 28, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_tx_ts_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 28, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_spid_override_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 19, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_spid_override_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 19, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_spid_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 17, 2, val);
+}
+
+static uint32_t bcmpkt_txpmd_spid_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 17, 2);
+    return val;
+}
+
+static void bcmpkt_txpmd_spap_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 15, 2, val);
+}
+
+static uint32_t bcmpkt_txpmd_spap_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 15, 2);
+    return val;
+}
+
+static void bcmpkt_txpmd_cng_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return;
+    }
+    WORD_FIELD_SET(data[3], 1, 2, val);
+}
+
+static uint32_t bcmpkt_txpmd_cng_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[3], 1, 2);
+    return val;
+}
+
+static void bcmpkt_txpmd_destination_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return;
+    }
+    WORD_FIELD_SET(data[3], 9, 16, val);
+}
+
+static uint32_t bcmpkt_txpmd_destination_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[3], 9, 16);
+    return val;
+}
+
+static void bcmpkt_txpmd_destination_type_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return;
+    }
+    WORD_FIELD_SET(data[3], 25, 4, val);
+}
+
+static uint32_t bcmpkt_txpmd_destination_type_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[3], 25, 4);
+    return val;
+}
+
+static void bcmpkt_txpmd_wred_mark_eligible_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 30, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_wred_mark_eligible_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 30, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_wred_response_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 31, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_wred_response_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 31, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_cpu_tx_mcast_lb_index_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return;
+    }
+    WORD_FIELD_SET(data[3], 0, 8, val);
+}
+
+static uint32_t bcmpkt_txpmd_cpu_tx_mcast_lb_index_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[3], 0, 8);
+    return val;
+}
+
+static void bcmpkt_txpmd_cpu_tx_ecmp_member_id_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return;
+    }
+    WORD_FIELD_SET(data[3], 0, 17, val);
+}
+
+static uint32_t bcmpkt_txpmd_cpu_tx_ecmp_member_id_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[3], 0, 17);
+    return val;
+}
+
+static void bcmpkt_txpmd_cpu_tx_destination_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return;
+    }
+    WORD_FIELD_SET(data[3], 17, 15, val & MASK(15));
+    WORD_FIELD_SET(data[2], 0, 1, (val >> 15) & MASK(1));
+}
+
+static uint32_t bcmpkt_txpmd_cpu_tx_destination_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return 0;
+    }
+    val = (WORD_FIELD_GET(data[3], 17, 15) | (WORD_FIELD_GET(data[2], 0, 1) << 15)) ;
+    return val;
+}
+
+static void bcmpkt_txpmd_cpu_tx_destination_type_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 1, 4, val);
+}
+
+static uint32_t bcmpkt_txpmd_cpu_tx_destination_type_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 1, 4);
+    return val;
+}
+
+static void bcmpkt_txpmd_cpu_tx_dp_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 5, 2, val);
+}
+
+static uint32_t bcmpkt_txpmd_cpu_tx_dp_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 5, 2);
+    return val;
+}
+
+static void bcmpkt_txpmd_cpu_tx_input_pri_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 7, 4, val);
+}
+
+static uint32_t bcmpkt_txpmd_cpu_tx_input_pri_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 7, 4);
+    return val;
+}
+
+static void bcmpkt_txpmd_cpu_tx_int_cn_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 11, 2, val);
+}
+
+static uint32_t bcmpkt_txpmd_cpu_tx_int_cn_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 11, 2);
+    return val;
+}
+
+static void bcmpkt_txpmd_cpu_tx_int_pri_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 13, 4, val);
+}
+
+static uint32_t bcmpkt_txpmd_cpu_tx_int_pri_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 13, 4);
+    return val;
+}
+
+static void bcmpkt_txpmd_cpu_tx_mcast_lb_index_vld_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 17, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_cpu_tx_mcast_lb_index_vld_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 17, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_cpu_tx_pkt_profile_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 18, 3, val);
+}
+
+static uint32_t bcmpkt_txpmd_cpu_tx_pkt_profile_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 18, 3);
+    return val;
+}
+
+static void bcmpkt_txpmd_cpu_tx_qos_fields_vld_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 21, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_cpu_tx_qos_fields_vld_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 21, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_cpu_tx_routed_pkt_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 22, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_cpu_tx_routed_pkt_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[2], 22, 1);
+    return val;
+}
+
+static void bcmpkt_txpmd_cpu_tx_vrf_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return;
+    }
+    WORD_FIELD_SET(data[2], 23, 9, val & MASK(9));
+    WORD_FIELD_SET(data[1], 0, 4, (val >> 9) & MASK(4));
+}
+
+static uint32_t bcmpkt_txpmd_cpu_tx_vrf_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return 0;
+    }
+    val = (WORD_FIELD_GET(data[2], 23, 9) | (WORD_FIELD_GET(data[1], 0, 4) << 9)) ;
+    return val;
+}
+
+static void bcmpkt_txpmd_cpu_tx_vrf_valid_set(uint32_t *data, uint32_t val)
+{
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return;
+    }
+    WORD_FIELD_SET(data[1], 4, 1, val);
+}
+
+static uint32_t bcmpkt_txpmd_cpu_tx_vrf_valid_get(uint32_t *data)
+{
+    uint32_t val;
+    if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) {
+        return 0;
+    }
+    val = WORD_FIELD_GET(data[1], 4, 1);
+    return val;
+}
+
+static uint32_t bcmpkt_txpmd_i_size_get(uint32_t *data, uint32_t **addr)
+{
+    return 4;
+}
+
+
+const bcmpkt_txpmd_fget_t bcm78905_a0_txpmd_fget = {
+    {
+        bcmpkt_txpmd_start_get,
+        bcmpkt_txpmd_header_type_get,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_txpmd_cell_error_get,
+        NULL,
+        bcmpkt_txpmd_src_modid_get,
+        bcmpkt_txpmd_cos_get,
+        bcmpkt_txpmd_input_pri_get,
+        bcmpkt_txpmd_unicast_get,
+        bcmpkt_txpmd_rqe_q_num_get,
+        NULL,
+        bcmpkt_txpmd_ieee1588_one_step_enable_get,
+        bcmpkt_txpmd_ieee1588_regen_udp_checksum_get,
+        bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_get,
+        bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_get,
+        bcmpkt_txpmd_tx_ts_get,
+        bcmpkt_txpmd_spid_override_get,
+        bcmpkt_txpmd_spid_get,
+        bcmpkt_txpmd_spap_get,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_txpmd_cng_get,
+        bcmpkt_txpmd_destination_get,
+        bcmpkt_txpmd_destination_type_get,
+        bcmpkt_txpmd_wred_mark_eligible_get,
+        bcmpkt_txpmd_wred_response_get,
+        bcmpkt_txpmd_cpu_tx_mcast_lb_index_get,
+        bcmpkt_txpmd_cpu_tx_ecmp_member_id_get,
+        bcmpkt_txpmd_cpu_tx_destination_get,
+        bcmpkt_txpmd_cpu_tx_destination_type_get,
+        bcmpkt_txpmd_cpu_tx_dp_get,
+        bcmpkt_txpmd_cpu_tx_input_pri_get,
+        bcmpkt_txpmd_cpu_tx_int_cn_get,
+        bcmpkt_txpmd_cpu_tx_int_pri_get,
+        bcmpkt_txpmd_cpu_tx_mcast_lb_index_vld_get,
+        bcmpkt_txpmd_cpu_tx_pkt_profile_get,
+        bcmpkt_txpmd_cpu_tx_qos_fields_vld_get,
+        bcmpkt_txpmd_cpu_tx_routed_pkt_get,
+        NULL,
+        NULL,
+        bcmpkt_txpmd_cpu_tx_vrf_get,
+        bcmpkt_txpmd_cpu_tx_vrf_valid_get,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL
+    }
+};
+
+
+const bcmpkt_txpmd_fset_t bcm78905_a0_txpmd_fset = {
+    {
+        bcmpkt_txpmd_start_set,
+        bcmpkt_txpmd_header_type_set,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_txpmd_cell_error_set,
+        NULL,
+        bcmpkt_txpmd_src_modid_set,
+        bcmpkt_txpmd_cos_set,
+        bcmpkt_txpmd_input_pri_set,
+        bcmpkt_txpmd_unicast_set,
+        bcmpkt_txpmd_rqe_q_num_set,
+        NULL,
+        bcmpkt_txpmd_ieee1588_one_step_enable_set,
+        bcmpkt_txpmd_ieee1588_regen_udp_checksum_set,
+        bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_set,
+        bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_set,
+        bcmpkt_txpmd_tx_ts_set,
+        bcmpkt_txpmd_spid_override_set,
+        bcmpkt_txpmd_spid_set,
+        bcmpkt_txpmd_spap_set,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        bcmpkt_txpmd_cng_set,
+        bcmpkt_txpmd_destination_set,
+        bcmpkt_txpmd_destination_type_set,
+        bcmpkt_txpmd_wred_mark_eligible_set,
+        bcmpkt_txpmd_wred_response_set,
+        bcmpkt_txpmd_cpu_tx_mcast_lb_index_set,
+        bcmpkt_txpmd_cpu_tx_ecmp_member_id_set,
+        bcmpkt_txpmd_cpu_tx_destination_set,
+        bcmpkt_txpmd_cpu_tx_destination_type_set,
+        bcmpkt_txpmd_cpu_tx_dp_set,
+        bcmpkt_txpmd_cpu_tx_input_pri_set,
+        bcmpkt_txpmd_cpu_tx_int_cn_set,
+        bcmpkt_txpmd_cpu_tx_int_pri_set,
+        bcmpkt_txpmd_cpu_tx_mcast_lb_index_vld_set,
+        bcmpkt_txpmd_cpu_tx_pkt_profile_set,
+        bcmpkt_txpmd_cpu_tx_qos_fields_vld_set,
+        bcmpkt_txpmd_cpu_tx_routed_pkt_set,
+        NULL,
+        NULL,
+        bcmpkt_txpmd_cpu_tx_vrf_set,
+        bcmpkt_txpmd_cpu_tx_vrf_valid_set,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL,
+        NULL
+    }
+};
+
+
+const bcmpkt_txpmd_figet_t bcm78905_a0_txpmd_figet = {
+    {
+        bcmpkt_txpmd_i_size_get
+    }
+};
+
+static shr_enum_map_t bcm78905_a0_txpmd_view_types[] = {
+    {"sobmh_from_cpu", 1},
+    {"cpu_tx", 2},
+    {NULL, -1},
+};
+
+/* -2: unsupported, -1: global, others: view's value */
+static int bcm78905_a0_txpmd_view_infos[BCMPKT_TXPMD_FID_COUNT] = {
+     -1, -1, -2, -2, -2, -2, -2,  1, -2,  1,  1,  1,  1,  1, -2,  1,
+      1,  1,  1,  1,  1,  1,  1, -2, -2, -2, -2, -2, -2, -2,  1,  1,
+      1,  1,  1,  2,  2,  2,  2,  2,  2,  2,  2,  2,  2,  2,  2, -2,
+     -2,  2,  2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+     -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2,
+     -2, -2, -2,
+};
+
+
+void bcm78905_a0_txpmd_view_info_get(bcmpkt_pmd_view_info_t *info)
+{
+    info->view_infos = bcm78905_a0_txpmd_view_infos;
+    info->view_types = bcm78905_a0_txpmd_view_types;
+    info->view_type_get = bcmpkt_txpmd_header_type_get;
+}
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/flexhdr/bcmpkt_flexhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/flexhdr/bcmpkt_flexhdr.c
new file mode 100644
index 000000000..8275ed543
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/flexhdr/bcmpkt_flexhdr.c
@@ -0,0 +1,516 @@
+/*! \file bcmpkt_flexhdr.c
+ *
+ * Flexhdr access interface.
+ *
+ */
+/*
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ */
+
+#include <shr/shr_error.h>
+#include <bcmpkt/bcmpkt_flexhdr.h>
+#include <bcmpkt/bcmpkt_flexhdr_internal.h>
+#include <bcmpkt/bcmpkt_rxpmd_internal.h>
+
+
+/* Define stub functions for base variant. */
+#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \
+bcmpkt_flex_pmd_info_t *  _bc##_flex_pmd_info_get(uint32_t hid) {return  NULL;}
+#define BCMDRD_DEVLIST_OVERRIDE
+#include <bcmdrd/bcmdrd_devlist.h>
+
+#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \
+shr_enum_map_t *  _bc##_flexhdr_map_get(void) {return NULL;}
+#define BCMDRD_DEVLIST_OVERRIDE
+#include <bcmdrd/bcmdrd_devlist.h>
+
+#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \
+    int _bc##_flexhdr_variant_support_map[] = {-1, -1, -1, -1};
+#define BCMDRD_DEVLIST_OVERRIDE
+#include <bcmdrd/bcmdrd_devlist.h>
+
+/* Array of device variant specific data */
+#define BCMLRD_VARIANT_ENTRY(_bd,_bu,_va,_ve,_vu,_vv,_vo,_vd,_r0,_r1) \
+    &_bd##_vu##_va##_flex_pmd_info_get,
+static bcmpkt_flex_pmd_info_t * (*flex_pmd_info_get[])(uint32_t hid) = {
+    NULL,
+#include <bcmlrd/chip/bcmlrd_chip_variant.h>
+    NULL
+};
+
+#define BCMLRD_VARIANT_ENTRY(_bd,_bu,_va,_ve,_vu,_vv,_vo,_vd,_r0,_r1) \
+    &_bd##_vu##_va##_flexhdr_map_get,
+static shr_enum_map_t * (*flexhdr_map_get[])(void) = {
+    NULL,
+#include <bcmlrd/chip/bcmlrd_chip_variant.h>
+    NULL
+};
+
+#define BCMLRD_VARIANT_ENTRY(_bd,_bu,_va,_ve,_vu,_vv,_vo,_vd,_r0,_r1) \
+    &_bd##_vu##_va##_flexhdr_variant_support_map[0],
+
+int *bcmpkt_flexhdr_variant_support_map[] = {
+    NULL,
+#include <bcmlrd/chip/bcmlrd_chip_variant.h>
+    NULL
+};
+
+
+int
+bcmpkt_flexhdr_header_id_get(bcmlrd_variant_t variant,
+                             char *name, uint32_t *hid)
+{
+    shr_enum_map_t *id_map = NULL;
+
+    if ((name == NULL) || (hid == NULL)) {
+        return SHR_E_PARAM;
+    }
+
+    if (variant <= BCMLRD_VARIANT_T_NONE || variant >= BCMLRD_VARIANT_T_COUNT) {
+        return SHR_E_PARAM;
+    }
+
+    if (flex_pmd_info_get[variant] == NULL) {
+        return SHR_E_UNAVAIL;
+    }
+
+    id_map = flexhdr_map_get[variant]();
+    if (id_map == NULL) {
+        return SHR_E_UNAVAIL;
+    }
+    while (sal_strcasecmp(id_map->name, "flexhdr count") != 0 ) {
+        if (sal_strcasecmp(id_map->name, name) == 0) {
+            *hid = id_map->val;
+            return SHR_E_NONE;
+        }
+        id_map++;
+    }
+
+    return SHR_E_UNAVAIL;
+}
+
+int
+bcmpkt_flexhdr_is_supported(bcmlrd_variant_t variant, uint32_t hid,
+                            bool *is_supported)
+{
+    bcmpkt_flex_pmd_info_t *pmd_info = NULL;
+
+    if (is_supported == NULL) {
+        return SHR_E_PARAM;
+    }
+
+    if (variant <= BCMLRD_VARIANT_T_NONE || variant >= BCMLRD_VARIANT_T_COUNT) {
+        return SHR_E_PARAM;
+    }
+
+    if (flex_pmd_info_get[variant] == NULL) {
+        return SHR_E_UNAVAIL;
+    }
+
+    pmd_info = flex_pmd_info_get[variant](hid);
+    if (pmd_info == NULL) {
+        return SHR_E_UNAVAIL;
+    }
+    *is_supported = pmd_info->is_supported;
+
+    return SHR_E_NONE;
+}
+
+int
+bcmpkt_flexhdr_field_get(bcmlrd_variant_t variant, uint32_t hid,
+                         uint32_t *flexhdr, int profile, int fid, uint32_t *val)
+{
+    bcmpkt_flex_pmd_info_t *pmd_info = NULL;
+    bcmpkt_flex_field_metadata_t *fld_info = NULL;
+
+    if ((flexhdr == NULL) || (val == NULL)) {
+        return SHR_E_PARAM;
+    }
+    if (variant <= BCMLRD_VARIANT_T_NONE || variant >= BCMLRD_VARIANT_T_COUNT) {
+        return SHR_E_PARAM;
+    }
+    if (flex_pmd_info_get[variant] == NULL) {
+        return SHR_E_UNAVAIL;
+    }
+
+    pmd_info = flex_pmd_info_get[variant](hid);
+    if (pmd_info == NULL) {
+        return SHR_E_UNAVAIL;
+    }
+    if (pmd_info->field_info == NULL) {
+        return SHR_E_UNAVAIL;
+    }
+    if (fid <= BCMPKT_FID_INVALID || fid >= pmd_info->field_info->num_fields) {
+        return SHR_E_PARAM;
+    }
+
+    if (pmd_info->flex_fget != NULL) {
+        if (pmd_info->flex_fget[fid] == NULL) {
+            return SHR_E_UNAVAIL;
+        }
+        return (pmd_info->flex_fget[fid])(flexhdr, profile, val);
+    } else if (pmd_info->flex_common_fget != NULL) {
+        fld_info = &pmd_info->field_info->info[fid];
+        return (pmd_info->flex_common_fget)(flexhdr, fld_info, profile, val);
+    } else {
+        return SHR_E_UNAVAIL;
+    }
+
+    return SHR_E_NONE;
+}
+
+int
+bcmpkt_flexhdr_field_set(bcmlrd_variant_t variant, uint32_t hid,
+                         uint32_t *flexhdr, int profile, int fid, uint32_t val)
+{
+    bcmpkt_flex_pmd_info_t *pmd_info = NULL;
+    bcmpkt_flex_field_metadata_t *fld_info = NULL;
+
+    if (flexhdr == NULL) {
+        return SHR_E_PARAM;
+    }
+
+    if (variant <= BCMLRD_VARIANT_T_NONE || variant >= BCMLRD_VARIANT_T_COUNT) {
+        return SHR_E_PARAM;
+    }
+
+    if (flex_pmd_info_get[variant] == NULL) {
+        return SHR_E_UNAVAIL;
+    }
+
+    pmd_info = flex_pmd_info_get[variant](hid);
+    if (pmd_info == NULL) {
+        return SHR_E_UNAVAIL;
+    }
+    if (pmd_info->field_info == NULL) {
+        return SHR_E_UNAVAIL;
+    }
+    if (fid <= BCMPKT_FID_INVALID || fid >= pmd_info->field_info->num_fields) {
+        return SHR_E_PARAM;
+    }
+
+    if (pmd_info->flex_fset != NULL) {
+        if (pmd_info->flex_fset[fid] == NULL) {
+            return SHR_E_UNAVAIL;
+        }
+        return (pmd_info->flex_fset[fid])(flexhdr, profile, val);
+    } else if (pmd_info->flex_common_fset != NULL) {
+        fld_info = &pmd_info->field_info->info[fid];
+        return (pmd_info->flex_common_fset)(flexhdr, fld_info, profile, val);
+    } else {
+        return SHR_E_UNAVAIL;
+    }
+
+    return SHR_E_NONE;
+}
+
+int
+bcmpkt_flexhdr_field_name_get(bcmlrd_variant_t variant, uint32_t hid,
+                              int fid, char **name)
+{
+    bcmpkt_flex_pmd_info_t *pmd_info = NULL;
+
+    if (name == NULL) {
+        return SHR_E_PARAM;
+    }
+
+    if (variant <= BCMLRD_VARIANT_T_NONE || variant >= BCMLRD_VARIANT_T_COUNT) {
+        return SHR_E_PARAM;
+    }
+
+    if (flex_pmd_info_get[variant] == NULL) {
+        return SHR_E_UNAVAIL;
+    }
+    pmd_info = flex_pmd_info_get[variant](hid);
+    if (pmd_info == NULL) {
+        return SHR_E_UNAVAIL;
+    }
+    if (pmd_info->field_info == NULL) {
+        return SHR_E_UNAVAIL;
+    }
+    if (fid <= BCMPKT_FID_INVALID || fid >= pmd_info->field_info->num_fields) {
+        return SHR_E_PARAM;
+    }
+
+    if (pmd_info->field_info->info == NULL) {
+        return SHR_E_UNAVAIL;
+    }
+    *name = pmd_info->field_info->info[fid].name;
+
+    return SHR_E_NONE;
+}
+
+int
+bcmpkt_flexhdr_field_id_get(bcmlrd_variant_t variant, uint32_t hid,
+                            char *name, int *fid)
+{
+    int i;
+    bcmpkt_flex_pmd_info_t *pmd_info = NULL;
+
+    if ((name == NULL) || (fid == NULL)) {
+        return SHR_E_PARAM;
+    }
+
+    if (variant <= BCMLRD_VARIANT_T_NONE || variant >= BCMLRD_VARIANT_T_COUNT) {
+        return SHR_E_PARAM;
+    }
+
+    if (flex_pmd_info_get[variant] == NULL) {
+        return SHR_E_UNAVAIL;
+    }
+
+    pmd_info = flex_pmd_info_get[variant](hid);
+    if (pmd_info == NULL) {
+        return SHR_E_UNAVAIL;
+    }
+    if (pmd_info->field_info == NULL) {
+        return SHR_E_UNAVAIL;
+    }
+    if (pmd_info->field_info->info == NULL) {
+        return SHR_E_UNAVAIL;
+    }
+
+    for (i = BCMPKT_FID_INVALID + 1; i < pmd_info->field_info->num_fields; i++) {
+        if (sal_strcasecmp(pmd_info->field_info->info[i].name, name) == 0) {
+            *fid = pmd_info->field_info->info[i].fid;
+            return SHR_E_NONE;
+        }
+    }
+
+    return SHR_E_NOT_FOUND;
+}
+
+int
+bcmpkt_flexhdr_field_info_get(bcmlrd_variant_t variant, uint32_t hid,
+                              bcmpkt_flex_field_info_t *info)
+{
+    bcmpkt_flex_pmd_info_t *pmd_info = NULL;
+
+    if (info == NULL) {
+        return SHR_E_PARAM;
+    }
+
+    if (variant <= BCMLRD_VARIANT_T_NONE || variant >= BCMLRD_VARIANT_T_COUNT) {
+        return SHR_E_PARAM;
+    }
+
+    if (flex_pmd_info_get[variant] == NULL) {
+        return SHR_E_UNAVAIL;
+    }
+
+    pmd_info = flex_pmd_info_get[variant](hid);
+    if (pmd_info == NULL) {
+        return SHR_E_UNAVAIL;
+    }
+    if (pmd_info->field_info == NULL) {
+        return SHR_E_UNAVAIL;
+    }
+
+    *info = *(pmd_info->field_info);
+
+    return SHR_E_NONE;
+}
+
+int
+bcmpkt_rxpmd_flex_reasons_get(bcmlrd_variant_t variant,
+                              uint32_t *rxpmd_flex, bcmpkt_bitmap_t *reasons)
+{
+    int32_t ret = SHR_E_NONE;
+    bcmpkt_flex_pmd_info_t *pmd_info = NULL;
+    uint32_t hid;
+
+    if ((rxpmd_flex == NULL) || (reasons == NULL)) {
+        return SHR_E_PARAM;
+    }
+
+    ret = bcmpkt_flexhdr_header_id_get(variant, "RXPMD_FLEX_T", &hid);
+    if (ret < 0) {
+        return ret;
+    }
+    if (flex_pmd_info_get[variant] == NULL) {
+        return SHR_E_UNAVAIL;
+    }
+    pmd_info = flex_pmd_info_get[variant](hid);
+    if (pmd_info == NULL) {
+        return SHR_E_UNAVAIL;
+    }
+    if (pmd_info->reasons_info == NULL) {
+        return SHR_E_UNAVAIL;
+    }
+
+    SHR_BITCLR_RANGE
+        (((*reasons).pbits), 0, pmd_info->reasons_info->num_reasons);
+    pmd_info->reasons_info->reason_decode (rxpmd_flex, reasons);
+
+    return SHR_E_NONE;
+}
+
+int
+bcmpkt_rxpmd_flex_reasons_set(bcmlrd_variant_t variant,
+                              bcmpkt_bitmap_t *reasons, uint32_t *rxpmd_flex)
+{
+    int32_t ret = SHR_E_NONE;
+    bcmpkt_flex_pmd_info_t *pmd_info = NULL;
+    uint32_t hid;
+
+    if ((rxpmd_flex == NULL) || (reasons == NULL)) {
+        return SHR_E_PARAM;
+    }
+
+    ret = bcmpkt_flexhdr_header_id_get(variant, "RXPMD_FLEX_T", &hid);
+    if (ret < 0) {
+        return ret;
+    }
+    if (flex_pmd_info_get[variant] == NULL) {
+        return SHR_E_UNAVAIL;
+    }
+    pmd_info = flex_pmd_info_get[variant](hid);
+    if (pmd_info == NULL) {
+        return SHR_E_UNAVAIL;
+    }
+    if (pmd_info->reasons_info == NULL) {
+        return SHR_E_UNAVAIL;
+    }
+
+
+    pmd_info->reasons_info->reason_encode(reasons, rxpmd_flex);
+
+    return SHR_E_NONE;
+}
+
+int
+bcmpkt_rxpmd_flex_reason_name_get(bcmlrd_variant_t variant,
+                                  int reason, char **name)
+{
+    int32_t ret = SHR_E_NONE;
+    bcmpkt_flex_pmd_info_t *pmd_info = NULL;
+    uint32_t hid;
+
+    if (name == NULL) {
+        return SHR_E_PARAM;
+    }
+
+    ret = bcmpkt_flexhdr_header_id_get(variant, "RXPMD_FLEX_T", &hid);
+    if (ret < 0) {
+        return ret;
+    }
+    if (flex_pmd_info_get[variant] == NULL) {
+        return SHR_E_UNAVAIL;
+    }
+    pmd_info = flex_pmd_info_get[variant](hid);
+    if (pmd_info == NULL) {
+        return SHR_E_UNAVAIL;
+    }
+    if (pmd_info->reasons_info == NULL) {
+        return SHR_E_UNAVAIL;
+    }
+
+
+    if (reason <= 0 ||
+        reason > pmd_info->reasons_info->num_reasons) {
+        return SHR_E_PARAM;
+    }
+
+    if (pmd_info->reasons_info->reason_names == NULL) {
+        return SHR_E_UNAVAIL;
+    }
+    *name = pmd_info->reasons_info->reason_names[reason].name;
+
+    return SHR_E_NONE;
+}
+
+int
+bcmpkt_rxpmd_flex_reason_max_get(bcmlrd_variant_t variant, uint32_t *num)
+{
+    int32_t ret = SHR_E_NONE;
+    bcmpkt_flex_pmd_info_t *pmd_info = NULL;
+    uint32_t hid;
+
+    if (num == NULL) {
+        return SHR_E_PARAM ;
+    }
+
+    ret = bcmpkt_flexhdr_header_id_get(variant, "RXPMD_FLEX_T", &hid);
+    if (ret < 0) {
+        return ret;
+    }
+    if (flex_pmd_info_get[variant] == NULL) {
+        return SHR_E_UNAVAIL;
+    }
+    pmd_info = flex_pmd_info_get[variant](hid);
+    if (pmd_info == NULL) {
+        return SHR_E_UNAVAIL;
+    }
+    if (pmd_info->reasons_info == NULL) {
+        return SHR_E_UNAVAIL;
+    }
+
+    *num = pmd_info->reasons_info->num_reasons;
+
+    return SHR_E_NONE;
+}
+
+int
+bcmpkt_rxpmd_flex_reason_id_get(bcmlrd_variant_t variant,
+                                char *name, int *rid)
+{
+    int32_t ret = SHR_E_NONE;
+    bcmpkt_flex_pmd_info_t *pmd_info = NULL;
+    int i;
+    uint32_t hid;
+
+    if ((name == NULL) || (rid == NULL)) {
+        return SHR_E_PARAM;
+    }
+
+    ret = bcmpkt_flexhdr_header_id_get(variant, "RXPMD_FLEX_T", &hid);
+    if (ret < 0) {
+        return ret;
+    }
+    if (flex_pmd_info_get[variant] == NULL) {
+        return SHR_E_UNAVAIL;
+    }
+    pmd_info = flex_pmd_info_get[variant](hid);
+    if (pmd_info == NULL) {
+        return SHR_E_UNAVAIL;
+    }
+    if (pmd_info->reasons_info == NULL) {
+        return SHR_E_UNAVAIL;
+    }
+
+    if (pmd_info->reasons_info->reason_names == NULL) {
+        return SHR_E_UNAVAIL;
+    }
+    for (i = 0; i < pmd_info->reasons_info->num_reasons; i++) {
+        if (sal_strcasecmp(pmd_info->reasons_info->reason_names[i].name,
+            name) == 0) {
+            *rid = pmd_info->reasons_info->reason_names[i].val;
+            return SHR_E_NONE;
+        }
+    }
+
+    return SHR_E_NOT_FOUND;
+}
+
+int *
+bcmpkt_flexhdr_support_map_get(bcmlrd_variant_t variant)
+{
+    if (variant <= BCMLRD_VARIANT_T_NONE || variant >= BCMLRD_VARIANT_T_COUNT) {
+        return NULL;
+    }
+
+    return bcmpkt_flexhdr_variant_support_map[variant];
+}
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_flexhdr.h
new file mode 100644
index 000000000..515f87566
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_flexhdr.h
@@ -0,0 +1,351 @@
+/*! \file bcmpkt_flexhdr.h
+ *
+ *  Flexhdr access interface.
+ *
+ */
+/*
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ */
+
+#ifndef BCMPKT_FLEXHDR_H
+#define BCMPKT_FLEXHDR_H
+
+#include <shr/shr_bitop.h>
+#include <sal/sal_types.h>
+#include <bcmlrd/bcmlrd_local_types.h>
+#include <bcmdrd/bcmdrd_types.h>
+#include <bcmpkt/bcmpkt_pmd.h>
+#include <bcmpkt/bcmpkt_pmd_internal.h>
+#include <bcmpkt/bcmpkt_flexhdr_field.h>
+
+/*! Invalid profile ID. */
+#define BCMPKT_FLEXHDR_PROFILE_NONE    -1
+
+/*! Max profile count. */
+#define BCMPKT_FLEXHDR_PROFILE_MAX     64
+
+/*! CELL Error status bitmap. */
+#define BCMPKT_RXFLEXMETA_ST_CELL_ERROR (0x1 << 18)
+
+/*!
+ * \name Packet FLEX reason utility macros.
+ * \anchor BCMPKT_RXPMD_FLEX_REASON_OPS
+ */
+/*! \{ */
+/*!
+ * Macro to check if a reason is included in a
+ * set of reasons (\ref bcmpkt_bitmap_t). Returns:
+ *   zero     => reason is not included in the set
+ *   non-zero => reason is included in the set
+ */
+#define BCMPKT_RXPMD_FLEX_REASON_GET(_reasons, _reason) \
+        SHR_BITGET(((_reasons).pbits), (_reason))
+
+/*!
+ * Macro to add a reason to a set of
+ * reasons (\ref bcmpkt_bitmap_t)
+ */
+#define BCMPKT_RXPMD_FLEX_REASON_SET(_reasons, _reason) \
+        SHR_BITSET(((_reasons).pbits), (_reason))
+
+/*!
+ * Macro to clear a reason from a set of
+ * reasons (\ref bcmpkt_bitmap_t)
+ */
+#define BCMPKT_RXPMD_FLEX_REASON_CLEAR(_reasons, _reason) \
+        SHR_BITCLR(((_reasons).pbits), (_reason))
+
+/*!
+ * Macro to add all reasons to a set of reasons.
+ */
+#define BCMPKT_RXPMD_FLEX_REASON_SET_ALL(_reasons, _count) \
+        SHR_BITSET_RANGE(((_reasons).pbits), 0, _count)
+
+/*!
+ * Macro to check for no reason.
+ */
+#define BCMPKT_RXPMD_FLEX_REASON_IS_NULL(_reasons, _count) \
+        SHR_BITNULL_RANGE(((_reasons).pbits), 0, _count)
+
+/*!
+ * Macro to get reasons number.
+ */
+#define BCMPKT_RXPMD_FLEX_REASONS_COUNT(_reasons, _count, _reason_count) \
+        SHR_BITCOUNT_RANGE(((_reasons).pbits), _count, 0, _reason_count)
+
+/*!
+ * Macro to compare 2 reasons, return 1 for exact match.
+ */
+#define BCMPKT_RXPMD_FLEX_REASON_EQ(_reasons1, _reasons2, _count) \
+        SHR_BITEQ_RANGE(((_reasons1).pbits), ((_reasons2).pbits), \
+                        0, _count)
+/*! \} */
+
+/*!
+ * Flex header field profile info.
+ */
+typedef struct bcmpkt_flex_field_profile_s {
+    /*! Minbit in NPL header. */
+    uint32_t minbit;
+
+    /*! Maxbit in NPL header. */
+    uint32_t maxbit;
+} bcmpkt_flex_field_profile_t;
+
+/*!
+ * Flex header field data.
+ */
+typedef struct bcmpkt_flex_field_metadata_s {
+    /*! Field name. */
+    char *name;
+
+    /*! Field ID. */
+    int fid;
+
+    /*! Number of profiles defined in NPL. */
+    int profile_cnt;
+
+    /*! Field boundary for each profile defined in NPL. */
+    bcmpkt_flex_field_profile_t profile[BCMPKT_FLEXHDR_PROFILE_MAX];
+} bcmpkt_flex_field_metadata_t;
+
+/*!
+ * Flex header field info structure.
+ */
+typedef struct bcmpkt_flex_field_info_s {
+
+    /*! Number of header fields. */
+    int num_fields;
+
+    /*! Header field names. */
+    bcmpkt_flex_field_metadata_t *info;
+
+} bcmpkt_flex_field_info_t;
+
+/*! RXPMD data update function pointer. */
+typedef int (*bcmpkt_rxpmd_data_set_f)(
+    int unit,
+    bcmpkt_flex_field_metadata_t *pmd_fld_info);
+
+/*! Process RXPMD entry. */
+typedef int (*bcmpkt_rxpmd_data_process_f)(int unit, uint64_t prof_id);
+
+/*! Update RXMPMD data from HW during warmboot. */
+typedef int (*bcmpkt_rxpmd_data_update_f)(int unit);
+
+/*! Array of RXPMD LT subscribe function pointers. */
+typedef struct bcmpkt_rxpmd_func_s {
+    /*!  Set RXMPMD data. */
+    bcmpkt_rxpmd_data_set_f rxpmd_data_set;
+
+    /*!  Process RXMPMD data flow entry. */
+    bcmpkt_rxpmd_data_process_f rxpmd_data_flow;
+
+    /*!  Process RXMPMD data remap entry. */
+    bcmpkt_rxpmd_data_process_f rxpmd_data_remap;
+
+    /*! Update RXMPMD data from HW during warmboot. */
+    bcmpkt_rxpmd_data_update_f rxpmd_data_update;
+} bcmpkt_rxpmd_func_t;
+
+/*! Externs for the rxpmd functions. */
+#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \
+    extern const bcmpkt_rxpmd_func_t _bd##_rxpmd_func;
+#include <bcmdrd/bcmdrd_devlist.h>
+
+/*!
+ * \brief Get Header ID for a given flexhdr name.
+ *
+ * \param [in] variant Variant type.
+ * \param [in] name flexhdr name string.
+ * \param [out] hid flexhdr ID.
+ *
+ * \retval SHR_E_NONE success.
+ * \retval SHR_E_PARAM Check parameters failed.
+ * \retval SHR_E_NOT_FOUND Not found the name.
+ */
+extern int
+bcmpkt_flexhdr_header_id_get(bcmlrd_variant_t variant,
+                             char* name, uint32_t *hid);
+
+
+/*!
+ * \brief Check if flexhdr is supported.
+ *
+ * \param [in] variant Variant type.
+ * \param [in] hid flexhdr ID.
+ * \param [out] is_supported Supported for flexhdr.
+ *
+ * \retval SHR_E_NONE success.
+ * \retval SHR_E_PARAM Check parameters failed.
+ * \retval SHR_E_UNAVAIL Not supported.
+ */
+extern int
+bcmpkt_flexhdr_is_supported(bcmlrd_variant_t variant, uint32_t hid,
+                            bool *is_supported);
+
+/*!
+ * \brief Get field name for a given flexhdr field ID.
+ *
+ * \param [in] variant Variant type.
+ * \param [in] hid flexhdr ID.
+ * \param [in] fid flexhdr field ID.
+ * \param [out] name flexhdr field name string.
+ *
+ * \retval SHR_E_NONE success.
+ * \retval SHR_E_PARAM Check parameters failed.
+ */
+extern int
+bcmpkt_flexhdr_field_name_get(bcmlrd_variant_t variant, uint32_t hid,
+                              int fid, char **name);
+
+/*!
+ * \brief Get field ID for a given flexhdr field name.
+ *
+ * \param [in] variant Variant type.
+ * \param [in] hid flexhdr ID.
+ * \param [in] name flexhdr field name string.
+ * \param [out] fid flexhdr Field ID.
+ *
+ * \retval SHR_E_NONE success.
+ * \retval SHR_E_PARAM Check parameters failed.
+ * \retval SHR_E_NOT_FOUND Not found the name.
+ */
+extern int
+bcmpkt_flexhdr_field_id_get(bcmlrd_variant_t variant, uint32_t hid,
+                            char* name, int *fid);
+
+/*!
+ * \brief Get field info for a given flexhdr type.
+ *
+ * \param [in] variant Variant type.
+ * \param [in] hid flexhdr ID.
+ * \param [out] info field information.
+ *
+ * \retval SHR_E_NONE success.
+ * \retval SHR_E_PARAM Check parameters failed.
+ * \retval SHR_E_NOT_FOUND Not found the name.
+ */
+extern int
+bcmpkt_flexhdr_field_info_get(bcmlrd_variant_t variant, uint32_t hid,
+                              bcmpkt_flex_field_info_t *info);
+
+/*!
+ * \brief Get RX reasons from RXPMD_FLEX.
+ *
+ * Decode packet's RX reasons into "reasons". A received packet may have one RX
+ * reason, multiple RX reasons, or none reason. RX reasons are in the format of
+ * bitmap. Each bit means one reason type (refer to \ref BCMPKT_RX_REASON_XXX).
+ *
+ * User may use \ref BCMPKT_RXPMD_FLEX_REASON_OPS to parse each individual reason based
+ * on this function's return value "reasons".
+ *
+ * \param [in] variant Variant type.
+ * \param [in] rxpmd_flex RXPMD_FLEX handle.
+ * \param [out] reasons RX reasons in bit array.
+ *
+ * \retval SHR_E_NONE success.
+ * \retval SHR_E_PARAM Check parameters failed.
+ * \retval SHR_E_UNAVAIL Not support Reason.
+ * \retval SHR_E_INTERNAL Internal issue.
+ */
+extern int
+bcmpkt_rxpmd_flex_reasons_get(bcmlrd_variant_t variant, uint32_t *rxpmd_flex,
+                              bcmpkt_bitmap_t  *reasons);
+
+/*!
+ * \brief Set RX reasons into the RXPMD_FLEX. (Internally used for filter configuration.)
+ *
+ * Set RX reasons into RXPMD_FLEX data for packet filter purpose.
+ *
+ * \param [in] variant Variant type.
+ * \param [in] reasons Reasons bit array.
+ * \param [in,out] rxpmd_flex RXPMD_FLEX handle.
+ *
+ * \retval SHR_E_NONE success.
+ * \retval SHR_E_PARAM Check parameters failed.
+ * \retval SHR_E_UNAVAIL Not support Reason.
+ * \retval SHR_E_INTERNAL Internal issue.
+ */
+extern int
+bcmpkt_rxpmd_flex_reasons_set(bcmlrd_variant_t variant,
+                              bcmpkt_bitmap_t *reasons, uint32_t *rxpmd_flex);
+
+/*!
+ * \brief Get an RX reason's name.
+ *
+ * \param [in] variant Variant type.
+ * \param [in] reason Reason ID.
+ * \param [out] name Reason name string handle.
+ *
+ * \retval SHR_E_NONE success.
+ * \retval SHR_E_PARAM Check parameters failed.
+ */
+extern int
+bcmpkt_rxpmd_flex_reason_name_get(bcmlrd_variant_t variant,
+                                  int reason, char **name);
+
+/*!
+ * \brief Get max number of RX reason types.
+ *
+ * \param [in] variant Variant type.
+ * \param [out] num Maximum RX reason types.
+ *
+ * \retval SHR_E_NONE success.
+ * \retval SHR_E_PARAM Check parameters failed.
+ */
+extern int
+bcmpkt_rxpmd_flex_reason_max_get(bcmlrd_variant_t variant, uint32_t *num);
+
+/*!
+ * \brief Get reason ID for a given RX reason name.
+ *
+ * \param [in] variant Variant type.
+ * \param [in] name Reason name string handle.
+ * \param [out] rid Reason ID.
+ *
+ * \retval SHR_E_NONE success.
+ * \retval SHR_E_PARAM Check parameters failed.
+ * \retval SHR_E_NOT_FOUND Not found the name.
+ */
+extern int
+bcmpkt_rxpmd_flex_reason_id_get(bcmlrd_variant_t variant,
+                                char* name, int *rid);
+
+/*!
+ * \brief Intialize RXPMD module
+ *
+ * \param [in] unit Device ID.
+ * \param [in] warm Warmboot flag.
+ *
+ * \retval SHR_E_NONE success.
+ * \retval SHR_E_PARAM Check parameters failed.
+ * \retval SHR_E_UNIT Incorrect unit.
+ */
+extern int
+bcmpkt_flexhdr_init(int unit, bool warm);
+
+/*!
+ * \brief Cleanup RXPMD module
+ *
+ * \param [in] unit Device ID.
+ *
+ * \retval SHR_E_NONE success.
+ */
+extern int
+bcmpkt_flexhdr_cleanup(int unit);
+
+#endif /* BCMPKT_FLEXHDR_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_flexhdr_field.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_flexhdr_field.h
new file mode 100644
index 000000000..ebb60c4d1
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_flexhdr_field.h
@@ -0,0 +1,100 @@
+/*! \file bcmpkt_flexhdr_field.h
+ *
+ *  Flexhdr field access interface.
+ *
+ */
+/*
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ */
+
+#ifndef BCMPKT_FLEXHDR_FIELD_H
+#define BCMPKT_FLEXHDR_FIELD_H
+
+/*!
+ * \brief Get value from a flexhdr field.
+ *
+ * \param [in] variant Variant type.
+ * \param [in] hid flexhdr ID.
+ * \param [in] flexhdr flexhdr handle.
+ * \param [in] profile Flexible data profile.
+ * \param [in] fid flexhdr field ID.
+ * \param [out] val Field value.
+ *
+ * \retval SHR_E_NONE success.
+ * \retval SHR_E_PARAM Check parameters failed.
+ * \retval SHR_E_UNAVAIL Not support the field.
+ */
+extern int
+bcmpkt_flexhdr_field_get(bcmlrd_variant_t variant, uint32_t hid,
+                         uint32_t *flexhdr, int profile, int fid, uint32_t *val);
+
+/*!
+ * \brief Set value into a flexhdr field.
+ *
+ * \param [in] variant Variant type.
+ * \param [in] hid flexhdr ID.
+ * \param [in,out] flexhdr flexhdr handle.
+ * \param [in] profile Flexible data profile.
+ * \param [in] fid flexhdr field ID.
+ * \param [in] val Set value.
+ *
+ * \retval SHR_E_NONE success.
+ * \retval SHR_E_PARAM Check parameters failed.
+ * \retval SHR_E_UNAVAIL Not support the field.
+ */
+extern int
+bcmpkt_flexhdr_field_set(bcmlrd_variant_t variant, uint32_t hid,
+                         uint32_t *flexhdr, int profile, int fid, uint32_t val);
+
+/*!
+ * \brief Get value from a flexhdr field.
+ *
+ * \param [in] unit Device unit number.
+ * \param [in] hid flexhdr ID.
+ * \param [in] flexhdr flexhdr handle.
+ * \param [in] profile Flexible data profile.
+ * \param [in] fid flexhdr field ID.
+ * \param [out] val Field value.
+ *
+ * \retval SHR_E_NONE success.
+ * \retval SHR_E_PARAM Check parameters failed.
+ * \retval SHR_E_UNAVAIL Not support the field.
+ */
+extern int
+bcmpkt_flexhdr_device_field_get(int unit, uint32_t hid,
+                                uint32_t *flexhdr, int profile, int fid,
+                                uint32_t *val);
+
+/*!
+ * \brief Set value into a flexhdr field.
+ *
+ * \param [in] unit Device unit number.
+ * \param [in] hid flexhdr ID.
+ * \param [in,out] flexhdr flexhdr handle.
+ * \param [in] profile Flexible data profile.
+ * \param [in] fid flexhdr field ID.
+ * \param [in] val Set value.
+ *
+ * \retval SHR_E_NONE success.
+ * \retval SHR_E_PARAM Check parameters failed.
+ * \retval SHR_E_UNAVAIL Not support the field.
+ */
+extern int
+bcmpkt_flexhdr_device_field_set(int unit, uint32_t hid,
+                                uint32_t *flexhdr, int profile, int fid,
+                                uint32_t val);
+
+#endif /* BCMPKT_FLEXHDR_FIELD_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_flexhdr_internal.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_flexhdr_internal.h
new file mode 100644
index 000000000..9948ab507
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_flexhdr_internal.h
@@ -0,0 +1,160 @@
+/*! \file bcmpkt_flexhdr_internal.h
+ *
+ * \brief Flex Packet MetaData internal library.
+ *
+ */
+/*
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ */
+
+#ifndef BCMPKT_FLEXHDR_INTERNAL_H
+#define BCMPKT_FLEXHDR_INTERNAL_H
+
+#include <shr/shr_types.h>
+#include <bcmpkt/bcmpkt_flexhdr.h>
+#include <bcmpkt/bcmpkt_pmd_internal.h>
+
+/*! PMD types.
+ * This has to match the header IDs present in
+ * xfc_map_parser/hdr/header_map.yml file.
+ */
+/*! Generic loopback header type */
+#define BCMPKT_GENERIC_LOOPBACK_T       0
+/*! Higig 3 header type */
+#define BCMPKT_HG3_BASE_T               1
+/*! Higig3 extension 0 header type */
+#define BCMPKT_HG3_EXTENSION_0_T        2
+/*! RXPMD flex header type */
+#define BCMPKT_RXPMD_FLEX_T             3
+/*! Count of PMD types */
+#define BCMPKT_PMD_COUNT                4
+
+/*! Get a flex field from a PMD buffer. */
+typedef int32_t (*bcmpkt_flex_field_get_f)(uint32_t *data, int profile, uint32_t *val);
+
+/*! Set a flex field within a PMD buffer. */
+typedef int32_t (*bcmpkt_flex_field_set_f)(uint32_t *data, int profile, uint32_t val);
+
+/*! Decode flex packet's RX reasons. */
+typedef void (*bcmpkt_flex_reason_decode_f) (uint32_t *data, bcmpkt_bitmap_t *reasons);
+
+/*! Encode flex packet's RX reasons */
+typedef void (*bcmpkt_flex_reason_encode_f) (bcmpkt_bitmap_t *reasons, uint32_t *data);
+
+/*! Get a flex field from a PMD buffer. */
+typedef int (*bcmpkt_flex_field_common_get_f)(
+    uint32_t *data,
+    bcmpkt_flex_field_metadata_t *fld_info,
+    int profile,
+    uint32_t *val);
+
+/*! Set a flex field from a PMD buffer. */
+typedef int (*bcmpkt_flex_field_common_set_f)(
+    uint32_t *data,
+    bcmpkt_flex_field_metadata_t *fld_info,
+    int profile,
+    uint32_t val);
+
+/*!
+ * \brief Flex Packet reasons information structure.
+ */
+typedef struct bcmpkt_flex_reasons_info_s {
+    /*! Number of reasons supported. */
+    int num_reasons;
+
+    /*! Reason names. */
+    shr_enum_map_t *reason_names;
+
+    /*! Encode RX reasons */
+    bcmpkt_flex_reason_encode_f reason_encode;
+
+    /*! Decode RX reasons */
+    bcmpkt_flex_reason_decode_f reason_decode;
+
+} bcmpkt_flex_reasons_info_t;
+
+/*!
+ * \brief Flex Packet metadata information structure.
+ */
+typedef struct bcmpkt_flex_pmd_info_s {
+
+    /*! Header field info. */
+    bcmpkt_flex_field_info_t *field_info;
+
+    /*! Header support */
+    bool is_supported;
+
+    /*! Flex reasons info */
+    bcmpkt_flex_reasons_info_t *reasons_info;
+
+    /*! Flex field get functions. */
+    bcmpkt_flex_field_get_f *flex_fget;
+
+    /*! Flex field set functions. */
+    bcmpkt_flex_field_set_f *flex_fset;
+
+    /*! Flex field common get functions. */
+    bcmpkt_flex_field_common_get_f flex_common_fget;
+
+    /*! Flex field common set functions. */
+    bcmpkt_flex_field_common_set_f flex_common_fset;
+} bcmpkt_flex_pmd_info_t;
+
+/*! \cond  Externs for the required functions. */
+#define BCMLRD_VARIANT_ENTRY(_bd,_bu,_va,_ve,_vu,_vv,_vo,_vd,_r0,_r1) \
+    extern bcmpkt_flex_pmd_info_t * _bd##_vu##_va##_flex_pmd_info_get(uint32_t hid);
+#define BCMLRD_VARIANT_OVERRIDE
+#include <bcmlrd/chip/bcmlrd_chip_variant.h>
+
+#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \
+    extern bcmpkt_flex_pmd_info_t * _bc##_flex_pmd_info_get(uint32_t hid);
+#define BCMDRD_DEVLIST_OVERRIDE
+#include <bcmdrd/bcmdrd_devlist.h>
+
+#define BCMLRD_VARIANT_ENTRY(_bd,_bu,_va,_ve,_vu,_vv,_vo,_vd,_r0,_r1)   \
+    extern shr_enum_map_t * _bd##_vu##_va##_flexhdr_map_get(void);
+#define BCMLRD_VARIANT_OVERRIDE
+#include <bcmlrd/chip/bcmlrd_chip_variant.h>
+
+#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \
+    extern shr_enum_map_t * _bc##_flexhdr_map_get(void);
+#define BCMDRD_DEVLIST_OVERRIDE
+#include <bcmdrd/bcmdrd_devlist.h>
+
+#define BCMLRD_VARIANT_ENTRY(_bd,_bu,_va,_ve,_vu,_vv,_vo,_vd,_r0,_r1)   \
+    extern int _bd##_vu##_va##_flexhdr_variant_support_map[BCMPKT_PMD_COUNT];
+#define BCMLRD_VARIANT_OVERRIDE
+#include <bcmlrd/chip/bcmlrd_chip_variant.h>
+
+#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \
+    extern int _bc##_flexhdr_variant_support_map[BCMPKT_PMD_COUNT];
+#define BCMDRD_DEVLIST_OVERRIDE
+#include <bcmdrd/bcmdrd_devlist.h>
+/*! \endcond */
+
+/*!
+ * \brief Get flex header support mapping for a given variant.
+ *
+ * \param [in] variant Variant type.
+ *
+ * \retval SHR_E_NONE success.
+ * \retval SHR_E_PARAM Check parameters failed.
+ * \retval SHR_E_NOT_FOUND Not found the name.
+ */
+extern int *
+bcmpkt_flexhdr_support_map_get(bcmlrd_variant_t variant);
+
+#endif /* BCMPKT_FLEXHDR_INTERNAL_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_hg3.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_hg3.h
new file mode 100644
index 000000000..fd30ea265
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_hg3.h
@@ -0,0 +1,49 @@
+/*! \file bcmpkt_hg3.h
+ *
+ * Common macros and definitions for Higig3 protocol
+ *
+ */
+/*
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ */
+
+#ifndef BCMPKT_HG3_H
+#define BCMPKT_HG3_H
+
+/* Note, ether type set to same value as reset value of R_GSH_ETHERTYPEr(700) */
+/*! Ethernet type used for Higig3 header */
+#define BCMPKT_HG3_ETHER_TYPE                     0x2BC
+
+/*! Higig3 base header size (bytes). */
+#define BCMPKT_HG3_BASE_HEADER_SIZE_BYTES         8
+/*! Higig3 base header size (words). */
+#define BCMPKT_HG3_BASE_HEADER_SIZE_WORDS         2
+
+/*! Higig3 extension 0 header size (bytes). */
+#define BCMPKT_HG3_EXT0_HEADER_SIZE_BYTES         8
+/*! Higig3 extension 0 header size (words). */
+#define BCMPKT_HG3_EXT0_HEADER_SIZE_WORDS         2
+
+/*! Higig3 header size (bytes). Includes base and ext0 header */
+#define BCMPKT_HG3_SIZE_BYTES       (BCMPKT_HG3_BASE_HEADER_SIZE_BYTES + \
+                                     BCMPKT_HG3_EXT0_HEADER_SIZE_BYTES)
+/*! Higig3 header size (words). Includes base and ext0 header */
+#define BCMPKT_HG3_SIZE_WORDS       (BCMPKT_HG3_BASE_HEADER_SIZE_WORDS + \
+                                     BCMPKT_HG3_EXT0_HEADER_SIZE_WORDS)
+
+/*! Higig3 extension 0 field max. */
+#define BCMPKT_HG3_EXT0_FID_MAX                   32
+#endif /* BCMPKT_HG3_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_higig_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_higig_defs.h
new file mode 100644
index 000000000..4c6b90bb3
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_higig_defs.h
@@ -0,0 +1,346 @@
+#ifndef BCMPKT_HIGIG_DEFS_H
+#define BCMPKT_HIGIG_DEFS_H
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated from the registers file.
+ * Edits to this file will be lost when it is regenerated.
+ * Tool: INTERNAL/regs/xgs/generate-chip.pl
+ *
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ *
+ * This file provides access macros for the HiGig module header.
+ *
+ ******************************************************************************/
+
+#include <bcmdrd/bcmdrd_symbols.h>
+
+/*******************************************************************************
+ *
+ *                    HIGIG DEFINITIONS BEGIN HERE
+ *
+ ******************************************************************************/
+
+
+/* Start of HiGig packet indicators */
+#define BCMPKT_HIGIG_SOF                0xfb
+#define BCMPKT_HIGIG2_SOF               0xfc
+
+
+/* HiGig module header size (in bytes) */
+#define BCMPKT_HIGIG_SIZE               12
+#define BCMPKT_HIGIG2_SIZE              16
+
+
+/* HiGig module header size (in words) */
+#define BCMPKT_HIGIG_WSIZE              3
+#define BCMPKT_HIGIG2_WSIZE             4
+
+
+/*******************************************************************************
+ * SWFORMAT:  HIGIG
+ * BLOCKS:
+ * SIZE:     96
+ ******************************************************************************/
+#define HIGIG_OFFSET 0x00000000
+
+#define HIGIG_BLKACC ()
+
+#define HIGIG_SIZE 12
+
+/*
+ * This structure should be used to declare and program HIGIG.
+ *
+ */
+typedef union HIGIG_s {
+    uint32_t v[3];
+    uint32_t higig[3];
+    uint32_t _higig;
+} HIGIG_t;
+
+#define HIGIG_CLR(r) sal_memset(&((r).higig[0]), 0, sizeof(HIGIG_t))
+#define HIGIG_SET(r,i,d) (r).higig[i] = d
+#define HIGIG_GET(r,i) (r).higig[i]
+
+/*
+ * These macros can be used to access individual fields.
+ *
+ */
+#define HIGIG_VC_LABELf_GET(r) (((r).higig[2]) & 0xfffff)
+#define HIGIG_VC_LABELf_SET(r,f) (r).higig[2]=(((r).higig[2] & ~((uint32_t)0xfffff)) | (((uint32_t)f) & 0xfffff))
+#define HIGIG_CLASSIFICATION_TAGf_GET(r) ((((r).higig[2]) >> 16) & 0xffff)
+#define HIGIG_CLASSIFICATION_TAGf_SET(r,f) (r).higig[2]=(((r).higig[2] & ~((uint32_t)0xffff << 16)) | ((((uint32_t)f) & 0xffff) << 16))
+#define HIGIG_LABEL_PRESENTf_GET(r) ((((r).higig[2]) >> 20) & 0x1)
+#define HIGIG_LABEL_PRESENTf_SET(r,f) (r).higig[2]=(((r).higig[2] & ~((uint32_t)0x1 << 20)) | ((((uint32_t)f) & 0x1) << 20))
+#define HIGIG_L3f_GET(r) ((((r).higig[2]) >> 21) & 0x1)
+#define HIGIG_L3f_SET(r,f) (r).higig[2]=(((r).higig[2] & ~((uint32_t)0x1 << 21)) | ((((uint32_t)f) & 0x1) << 21))
+#define HIGIG_DST_MODID_5f_GET(r) ((((r).higig[2]) >> 22) & 0x1)
+#define HIGIG_DST_MODID_5f_SET(r,f) (r).higig[2]=(((r).higig[2] & ~((uint32_t)0x1 << 22)) | ((((uint32_t)f) & 0x1) << 22))
+#define HIGIG_SRC_MODID_5f_GET(r) ((((r).higig[2]) >> 23) & 0x1)
+#define HIGIG_SRC_MODID_5f_SET(r,f) (r).higig[2]=(((r).higig[2] & ~((uint32_t)0x1 << 23)) | ((((uint32_t)f) & 0x1) << 23))
+#define HIGIG_MIRRORf_GET(r) ((((r).higig[2]) >> 24) & 0x1)
+#define HIGIG_MIRRORf_SET(r,f) (r).higig[2]=(((r).higig[2] & ~((uint32_t)0x1 << 24)) | ((((uint32_t)f) & 0x1) << 24))
+#define HIGIG_MIRROR_DONEf_GET(r) ((((r).higig[2]) >> 25) & 0x1)
+#define HIGIG_MIRROR_DONEf_SET(r,f) (r).higig[2]=(((r).higig[2] & ~((uint32_t)0x1 << 25)) | ((((uint32_t)f) & 0x1) << 25))
+#define HIGIG_MIRROR_ONLYf_GET(r) ((((r).higig[2]) >> 26) & 0x1)
+#define HIGIG_MIRROR_ONLYf_SET(r,f) (r).higig[2]=(((r).higig[2] & ~((uint32_t)0x1 << 26)) | ((((uint32_t)f) & 0x1) << 26))
+#define HIGIG_INGRESS_TAGGEDf_GET(r) ((((r).higig[2]) >> 27) & 0x1)
+#define HIGIG_INGRESS_TAGGEDf_SET(r,f) (r).higig[2]=(((r).higig[2] & ~((uint32_t)0x1 << 27)) | ((((uint32_t)f) & 0x1) << 27))
+#define HIGIG_DST_TGIDf_GET(r) ((((r).higig[2]) >> 28) & 0x7)
+#define HIGIG_DST_TGIDf_SET(r,f) (r).higig[2]=(((r).higig[2] & ~((uint32_t)0x7 << 28)) | ((((uint32_t)f) & 0x7) << 28))
+#define HIGIG_DST_Tf_GET(r) ((((r).higig[2]) >> 31) & 0x1)
+#define HIGIG_DST_Tf_SET(r,f) (r).higig[2]=(((r).higig[2] & ~((uint32_t)0x1 << 31)) | ((((uint32_t)f) & 0x1) << 31))
+#define HIGIG_DST_MODID_LSf_GET(r) (((r).higig[1]) & 0x1f)
+#define HIGIG_DST_MODID_LSf_SET(r,f) (r).higig[1]=(((r).higig[1] & ~((uint32_t)0x1f)) | (((uint32_t)f) & 0x1f))
+#define HIGIG_CNGf_GET(r) ((((r).higig[1]) >> 5) & 0x1)
+#define HIGIG_CNGf_SET(r,f) (r).higig[1]=(((r).higig[1] & ~((uint32_t)0x1 << 5)) | ((((uint32_t)f) & 0x1) << 5))
+#define HIGIG_HEADER_TYPEf_GET(r) ((((r).higig[1]) >> 6) & 0x3)
+#define HIGIG_HEADER_TYPEf_SET(r,f) (r).higig[1]=(((r).higig[1] & ~((uint32_t)0x3 << 6)) | ((((uint32_t)f) & 0x3) << 6))
+#define HIGIG_PRIORITYf_GET(r) ((((r).higig[1]) >> 8) & 0x7)
+#define HIGIG_PRIORITYf_SET(r,f) (r).higig[1]=(((r).higig[1] & ~((uint32_t)0x7 << 8)) | ((((uint32_t)f) & 0x7) << 8))
+#define HIGIG_DST_PORTf_GET(r) ((((r).higig[1]) >> 11) & 0x1f)
+#define HIGIG_DST_PORTf_SET(r,f) (r).higig[1]=(((r).higig[1] & ~((uint32_t)0x1f << 11)) | ((((uint32_t)f) & 0x1f) << 11))
+#define HIGIG_SRC_PORT_TGIDf_GET(r) ((((r).higig[1]) >> 16) & 0x3f)
+#define HIGIG_SRC_PORT_TGIDf_SET(r,f) (r).higig[1]=(((r).higig[1] & ~((uint32_t)0x3f << 16)) | ((((uint32_t)f) & 0x3f) << 16))
+#define HIGIG_PFMf_GET(r) ((((r).higig[1]) >> 22) & 0x3)
+#define HIGIG_PFMf_SET(r,f) (r).higig[1]=(((r).higig[1] & ~((uint32_t)0x3 << 22)) | ((((uint32_t)f) & 0x3) << 22))
+#define HIGIG_OPCODEf_GET(r) ((((r).higig[1]) >> 24) & 0x7)
+#define HIGIG_OPCODEf_SET(r,f) (r).higig[1]=(((r).higig[1] & ~((uint32_t)0x7 << 24)) | ((((uint32_t)f) & 0x7) << 24))
+#define HIGIG_SRC_MODID_LSf_GET(r) ((((r).higig[1]) >> 27) & 0x1f)
+#define HIGIG_SRC_MODID_LSf_SET(r,f) (r).higig[1]=(((r).higig[1] & ~((uint32_t)0x1f << 27)) | ((((uint32_t)f) & 0x1f) << 27))
+#define HIGIG_VTAGf_GET(r) (((r).higig[0]) & 0xffff)
+#define HIGIG_VTAGf_SET(r,f) (r).higig[0]=(((r).higig[0] & ~((uint32_t)0xffff)) | (((uint32_t)f) & 0xffff))
+#define HIGIG_DST_MODID_6f_GET(r) ((((r).higig[0]) >> 16) & 0x1)
+#define HIGIG_DST_MODID_6f_SET(r,f) (r).higig[0]=(((r).higig[0] & ~((uint32_t)0x1 << 16)) | ((((uint32_t)f) & 0x1) << 16))
+#define HIGIG_SRC_MODID_6f_GET(r) ((((r).higig[0]) >> 17) & 0x1)
+#define HIGIG_SRC_MODID_6f_SET(r,f) (r).higig[0]=(((r).higig[0] & ~((uint32_t)0x1 << 17)) | ((((uint32_t)f) & 0x1) << 17))
+#define HIGIG_HDR_EXT_LENf_GET(r) ((((r).higig[0]) >> 18) & 0x7)
+#define HIGIG_HDR_EXT_LENf_SET(r,f) (r).higig[0]=(((r).higig[0] & ~((uint32_t)0x7 << 18)) | ((((uint32_t)f) & 0x7) << 18))
+#define HIGIG_CNG1f_GET(r) ((((r).higig[0]) >> 21) & 0x1)
+#define HIGIG_CNG1f_SET(r,f) (r).higig[0]=(((r).higig[0] & ~((uint32_t)0x1 << 21)) | ((((uint32_t)f) & 0x1) << 21))
+#define HIGIG_HGIf_GET(r) ((((r).higig[0]) >> 22) & 0x3)
+#define HIGIG_HGIf_SET(r,f) (r).higig[0]=(((r).higig[0] & ~((uint32_t)0x3 << 22)) | ((((uint32_t)f) & 0x3) << 22))
+#define HIGIG_STARTf_GET(r) ((((r).higig[0]) >> 24) & 0xff)
+#define HIGIG_STARTf_SET(r,f) (r).higig[0]=(((r).higig[0] & ~((uint32_t)0xff << 24)) | ((((uint32_t)f) & 0xff) << 24))
+
+/*******************************************************************************
+ * End of 'HIGIG'
+ ******************************************************************************/
+
+
+
+
+/*******************************************************************************
+ * SWFORMAT:  HIGIG2
+ * BLOCKS:
+ * SIZE:     128
+ ******************************************************************************/
+#define HIGIG2_OFFSET 0x00000000
+
+#define HIGIG2_BLKACC ()
+
+#define HIGIG2_SIZE 16
+
+/*
+ * This structure should be used to declare and program HIGIG2.
+ *
+ */
+typedef union HIGIG2_s {
+    uint32_t v[4];
+    uint32_t higig2[4];
+    uint32_t _higig2;
+} HIGIG2_t;
+
+#define HIGIG2_CLR(r) sal_memset(&((r).higig2[0]), 0, sizeof(HIGIG2_t))
+#define HIGIG2_SET(r,i,d) (r).higig2[i] = d
+#define HIGIG2_GET(r,i) (r).higig2[i]
+
+/*
+ * These macros can be used to access individual fields.
+ *
+ */
+#define HIGIG2_PPD_DATAf_GET(r,a) bcmdrd_field_be_get((r).higig2,4,0,63,a)
+#define HIGIG2_PPD_DATAf_SET(r,a) bcmdrd_field_be_set((r).higig2,4,0,63,a)
+#define HIGIG2_PPD0_RSVD_4_0f_GET(r) (((r).higig2[3]) & 0x1f)
+#define HIGIG2_PPD0_RSVD_4_0f_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0x1f)) | (((uint32_t)f) & 0x1f))
+#define HIGIG2_PPD0_HDR_EXT_LENf_GET(r) ((((r).higig2[3]) >> 5) & 0x7)
+#define HIGIG2_PPD0_HDR_EXT_LENf_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0x7 << 5)) | ((((uint32_t)f) & 0x7) << 5))
+#define HIGIG2_PPD0_OPCODEf_GET(r) ((((r).higig2[3]) >> 8) & 0x7)
+#define HIGIG2_PPD0_OPCODEf_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0x7 << 8)) | ((((uint32_t)f) & 0x7) << 8))
+#define HIGIG2_PPD0_PRESERVE_DOT1Pf_GET(r) ((((r).higig2[3]) >> 11) & 0x1)
+#define HIGIG2_PPD0_PRESERVE_DOT1Pf_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0x1 << 11)) | ((((uint32_t)f) & 0x1) << 11))
+#define HIGIG2_PPD0_PRESERVE_DSCPf_GET(r) ((((r).higig2[3]) >> 12) & 0x1)
+#define HIGIG2_PPD0_PRESERVE_DSCPf_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0x1 << 12)) | ((((uint32_t)f) & 0x1) << 12))
+#define HIGIG2_PPD0_SRC_Tf_GET(r) ((((r).higig2[3]) >> 13) & 0x1)
+#define HIGIG2_PPD0_SRC_Tf_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0x1 << 13)) | ((((uint32_t)f) & 0x1) << 13))
+#define HIGIG2_PPD0_PFMf_GET(r) ((((r).higig2[3]) >> 14) & 0x3)
+#define HIGIG2_PPD0_PFMf_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0x3 << 14)) | ((((uint32_t)f) & 0x3) << 14))
+#define HIGIG2_PPD0_VID_LOWf_GET(r) ((((r).higig2[3]) >> 16) & 0xff)
+#define HIGIG2_PPD0_VID_LOWf_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0xff << 16)) | ((((uint32_t)f) & 0xff) << 16))
+#define HIGIG2_PPD0_VID_HIGHf_GET(r) ((((r).higig2[3]) >> 24) & 0xff)
+#define HIGIG2_PPD0_VID_HIGHf_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0xff << 24)) | ((((uint32_t)f) & 0xff) << 24))
+#define HIGIG2_PPD0_REP_IDf_GET(r) (((r).higig2[2]) & 0x7ffff)
+#define HIGIG2_PPD0_REP_IDf_SET(r,f) (r).higig2[2]=(((r).higig2[2] & ~((uint32_t)0x7ffff)) | (((uint32_t)f) & 0x7ffff))
+#define HIGIG2_PPD0_VC_LABELf_GET(r) (((r).higig2[2]) & 0xffff)
+#define HIGIG2_PPD0_VC_LABELf_SET(r,f) (r).higig2[2]=(((r).higig2[2] & ~((uint32_t)0xffff)) | (((uint32_t)f) & 0xffff))
+#define HIGIG2_PPD0_MIRROR_CLASSIFICATION_TAGf_GET(r) ((((r).higig2[2]) >> 4) & 0xffff)
+#define HIGIG2_PPD0_MIRROR_CLASSIFICATION_TAGf_SET(r,f) (r).higig2[2]=(((r).higig2[2] & ~((uint32_t)0xffff << 4)) | ((((uint32_t)f) & 0xffff) << 4))
+#define HIGIG2_PPD0_ORIG_SRC_PORTf_GET(r) ((((r).higig2[2]) >> 4) & 0xff)
+#define HIGIG2_PPD0_ORIG_SRC_PORTf_SET(r,f) (r).higig2[2]=(((r).higig2[2] & ~((uint32_t)0xff << 4)) | ((((uint32_t)f) & 0xff) << 4))
+#define HIGIG2_PPD0_ORIG_SRC_MODIDf_GET(r) ((((r).higig2[2]) >> 12) & 0xff)
+#define HIGIG2_PPD0_ORIG_SRC_MODIDf_SET(r,f) (r).higig2[2]=(((r).higig2[2] & ~((uint32_t)0xff << 12)) | ((((uint32_t)f) & 0xff) << 12))
+#define HIGIG2_PPD0_VC_LABEL_19_16f_GET(r) ((((r).higig2[2]) >> 16) & 0xf)
+#define HIGIG2_PPD0_VC_LABEL_19_16f_SET(r,f) (r).higig2[2]=(((r).higig2[2] & ~((uint32_t)0xf << 16)) | ((((uint32_t)f) & 0xf) << 16))
+#define HIGIG2_PPD0_LABEL_PRESENTf_GET(r) ((((r).higig2[2]) >> 20) & 0x1)
+#define HIGIG2_PPD0_LABEL_PRESENTf_SET(r,f) (r).higig2[2]=(((r).higig2[2] & ~((uint32_t)0x1 << 20)) | ((((uint32_t)f) & 0x1) << 20))
+#define HIGIG2_PPD0_L3f_GET(r) ((((r).higig2[2]) >> 21) & 0x1)
+#define HIGIG2_PPD0_L3f_SET(r,f) (r).higig2[2]=(((r).higig2[2] & ~((uint32_t)0x1 << 21)) | ((((uint32_t)f) & 0x1) << 21))
+#define HIGIG2_PPD0_LABEL_OVERLAY_TYPEf_GET(r) ((((r).higig2[2]) >> 22) & 0x3)
+#define HIGIG2_PPD0_LABEL_OVERLAY_TYPEf_SET(r,f) (r).higig2[2]=(((r).higig2[2] & ~((uint32_t)0x3 << 22)) | ((((uint32_t)f) & 0x3) << 22))
+#define HIGIG2_PPD0_MIRRORf_GET(r) ((((r).higig2[2]) >> 24) & 0x1)
+#define HIGIG2_PPD0_MIRRORf_SET(r,f) (r).higig2[2]=(((r).higig2[2] & ~((uint32_t)0x1 << 24)) | ((((uint32_t)f) & 0x1) << 24))
+#define HIGIG2_PPD0_MIRROR_DONEf_GET(r) ((((r).higig2[2]) >> 25) & 0x1)
+#define HIGIG2_PPD0_MIRROR_DONEf_SET(r,f) (r).higig2[2]=(((r).higig2[2] & ~((uint32_t)0x1 << 25)) | ((((uint32_t)f) & 0x1) << 25))
+#define HIGIG2_PPD0_MIRROR_ONLYf_GET(r) ((((r).higig2[2]) >> 26) & 0x1)
+#define HIGIG2_PPD0_MIRROR_ONLYf_SET(r,f) (r).higig2[2]=(((r).higig2[2] & ~((uint32_t)0x1 << 26)) | ((((uint32_t)f) & 0x1) << 26))
+#define HIGIG2_PPD0_INGRESS_TAGGEDf_GET(r) ((((r).higig2[2]) >> 27) & 0x1)
+#define HIGIG2_PPD0_INGRESS_TAGGEDf_SET(r,f) (r).higig2[2]=(((r).higig2[2] & ~((uint32_t)0x1 << 27)) | ((((uint32_t)f) & 0x1) << 27))
+#define HIGIG2_PPD0_DST_TGIDf_GET(r) ((((r).higig2[2]) >> 28) & 0x7)
+#define HIGIG2_PPD0_DST_TGIDf_SET(r,f) (r).higig2[2]=(((r).higig2[2] & ~((uint32_t)0x7 << 28)) | ((((uint32_t)f) & 0x7) << 28))
+#define HIGIG2_PPD0_DST_Tf_GET(r) ((((r).higig2[2]) >> 31) & 0x1)
+#define HIGIG2_PPD0_DST_Tf_SET(r,f) (r).higig2[2]=(((r).higig2[2] & ~((uint32_t)0x1 << 31)) | ((((uint32_t)f) & 0x1) << 31))
+#define HIGIG2_PPD1_RSVD_4_0f_GET(r) (((r).higig2[3]) & 0x1f)
+#define HIGIG2_PPD1_RSVD_4_0f_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0x1f)) | (((uint32_t)f) & 0x1f))
+#define HIGIG2_PPD1_HDR_EXT_LENf_GET(r) ((((r).higig2[3]) >> 5) & 0x7)
+#define HIGIG2_PPD1_HDR_EXT_LENf_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0x7 << 5)) | ((((uint32_t)f) & 0x7) << 5))
+#define HIGIG2_PPD1_OPCODEf_GET(r) ((((r).higig2[3]) >> 8) & 0x7)
+#define HIGIG2_PPD1_OPCODEf_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0x7 << 8)) | ((((uint32_t)f) & 0x7) << 8))
+#define HIGIG2_PPD1_RSVD_12_11f_GET(r) ((((r).higig2[3]) >> 11) & 0x3)
+#define HIGIG2_PPD1_RSVD_12_11f_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0x3 << 11)) | ((((uint32_t)f) & 0x3) << 11))
+#define HIGIG2_PPD1_SRC_Tf_GET(r) ((((r).higig2[3]) >> 13) & 0x1)
+#define HIGIG2_PPD1_SRC_Tf_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0x1 << 13)) | ((((uint32_t)f) & 0x1) << 13))
+#define HIGIG2_PPD1_PFMf_GET(r) ((((r).higig2[3]) >> 14) & 0x3)
+#define HIGIG2_PPD1_PFMf_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0x3 << 14)) | ((((uint32_t)f) & 0x3) << 14))
+#define HIGIG2_PPD1_VID_LOWf_GET(r) ((((r).higig2[3]) >> 16) & 0xff)
+#define HIGIG2_PPD1_VID_LOWf_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0xff << 16)) | ((((uint32_t)f) & 0xff) << 16))
+#define HIGIG2_PPD1_VID_HIGHf_GET(r) ((((r).higig2[3]) >> 24) & 0xff)
+#define HIGIG2_PPD1_VID_HIGHf_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0xff << 24)) | ((((uint32_t)f) & 0xff) << 24))
+#define HIGIG2_PPD1_RSVD_48_32f_GET(r) (((r).higig2[2]) & 0xffff)
+#define HIGIG2_PPD1_RSVD_48_32f_SET(r,f) (r).higig2[2]=(((r).higig2[2] & ~((uint32_t)0xffff)) | (((uint32_t)f) & 0xffff))
+#define HIGIG2_PPD1_CLASSIFICATION_TAGf_GET(r) ((((r).higig2[2]) >> 16) & 0xffff)
+#define HIGIG2_PPD1_CLASSIFICATION_TAGf_SET(r,f) (r).higig2[2]=(((r).higig2[2] & ~((uint32_t)0xffff << 16)) | ((((uint32_t)f) & 0xffff) << 16))
+#define HIGIG2_PPD2_SOURCE_TYPEf_GET(r) (((r).higig2[3]) & 0x1)
+#define HIGIG2_PPD2_SOURCE_TYPEf_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0x1)) | (((uint32_t)f) & 0x1))
+#define HIGIG2_PPD2_DEST_TYPEf_GET(r) ((((r).higig2[3]) >> 1) & 0x1)
+#define HIGIG2_PPD2_DEST_TYPEf_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0x1 << 1)) | ((((uint32_t)f) & 0x1) << 1))
+#define HIGIG2_PPD2_PRESERVE_DOT1Pf_GET(r) ((((r).higig2[3]) >> 2) & 0x1)
+#define HIGIG2_PPD2_PRESERVE_DOT1Pf_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0x1 << 2)) | ((((uint32_t)f) & 0x1) << 2))
+#define HIGIG2_PPD2_PRESERVE_DSCPf_GET(r) ((((r).higig2[3]) >> 3) & 0x1)
+#define HIGIG2_PPD2_PRESERVE_DSCPf_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0x1 << 3)) | ((((uint32_t)f) & 0x1) << 3))
+#define HIGIG2_PPD2_VNI_HIGHf_GET(r) ((((r).higig2[3]) >> 4) & 0x3)
+#define HIGIG2_PPD2_VNI_HIGHf_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0x3 << 4)) | ((((uint32_t)f) & 0x3) << 4))
+#define HIGIG2_PPD2_RSVD_7_6f_GET(r) ((((r).higig2[3]) >> 6) & 0x3)
+#define HIGIG2_PPD2_RSVD_7_6f_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0x3 << 6)) | ((((uint32_t)f) & 0x3) << 6))
+#define HIGIG2_PPD2_OPCODEf_GET(r) ((((r).higig2[3]) >> 8) & 0x7)
+#define HIGIG2_PPD2_OPCODEf_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0x7 << 8)) | ((((uint32_t)f) & 0x7) << 8))
+#define HIGIG2_PPD2_REP_ID_17_16f_GET(r) ((((r).higig2[3]) >> 8) & 0x3)
+#define HIGIG2_PPD2_REP_ID_17_16f_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0x3 << 8)) | ((((uint32_t)f) & 0x3) << 8))
+#define HIGIG2_PPD2_RSVD_11f_GET(r) ((((r).higig2[3]) >> 11) & 0x1)
+#define HIGIG2_PPD2_RSVD_11f_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0x1 << 11)) | ((((uint32_t)f) & 0x1) << 11))
+#define HIGIG2_PPD2_LAG_FAILOVERf_GET(r) ((((r).higig2[3]) >> 12) & 0x1)
+#define HIGIG2_PPD2_LAG_FAILOVERf_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0x1 << 12)) | ((((uint32_t)f) & 0x1) << 12))
+#define HIGIG2_PPD2_DO_NOT_LEARNf_GET(r) ((((r).higig2[3]) >> 13) & 0x1)
+#define HIGIG2_PPD2_DO_NOT_LEARNf_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0x1 << 13)) | ((((uint32_t)f) & 0x1) << 13))
+#define HIGIG2_PPD2_DO_NOT_MODIFYf_GET(r) ((((r).higig2[3]) >> 14) & 0x1)
+#define HIGIG2_PPD2_DO_NOT_MODIFYf_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0x1 << 14)) | ((((uint32_t)f) & 0x1) << 14))
+#define HIGIG2_PPD2_MIRRORf_GET(r) ((((r).higig2[3]) >> 15) & 0x1)
+#define HIGIG2_PPD2_MIRRORf_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0x1 << 15)) | ((((uint32_t)f) & 0x1) << 15))
+#define HIGIG2_PPD2_SOURCE_VPf_GET(r) ((((r).higig2[3]) >> 16) & 0xffff)
+#define HIGIG2_PPD2_SOURCE_VPf_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0xffff << 16)) | ((((uint32_t)f) & 0xffff) << 16))
+#define HIGIG2_PPD2_DEST_VPf_GET(r) (((r).higig2[2]) & 0xffff)
+#define HIGIG2_PPD2_DEST_VPf_SET(r,f) (r).higig2[2]=(((r).higig2[2] & ~((uint32_t)0xffff)) | (((uint32_t)f) & 0xffff))
+#define HIGIG2_PPD2_REP_ID_15_0f_GET(r) (((r).higig2[2]) & 0xffff)
+#define HIGIG2_PPD2_REP_ID_15_0f_SET(r,f) (r).higig2[2]=(((r).higig2[2] & ~((uint32_t)0xffff)) | (((uint32_t)f) & 0xffff))
+#define HIGIG2_PPD2_VNI_LOWf_GET(r) ((((r).higig2[2]) >> 16) & 0xff)
+#define HIGIG2_PPD2_VNI_LOWf_SET(r,f) (r).higig2[2]=(((r).higig2[2] & ~((uint32_t)0xff << 16)) | ((((uint32_t)f) & 0xff) << 16))
+#define HIGIG2_PPD2_VNI_MIDf_GET(r) ((((r).higig2[2]) >> 24) & 0x3)
+#define HIGIG2_PPD2_VNI_MIDf_SET(r,f) (r).higig2[2]=(((r).higig2[2] & ~((uint32_t)0x3 << 24)) | ((((uint32_t)f) & 0x3) << 24))
+#define HIGIG2_PPD2_FWD_TYPEf_GET(r) ((((r).higig2[2]) >> 26) & 0x1f)
+#define HIGIG2_PPD2_FWD_TYPEf_SET(r,f) (r).higig2[2]=(((r).higig2[2] & ~((uint32_t)0x1f << 26)) | ((((uint32_t)f) & 0x1f) << 26))
+#define HIGIG2_PPD2_MULTIPOINTf_GET(r) ((((r).higig2[2]) >> 31) & 0x1)
+#define HIGIG2_PPD2_MULTIPOINTf_SET(r,f) (r).higig2[2]=(((r).higig2[2] & ~((uint32_t)0x1 << 31)) | ((((uint32_t)f) & 0x1) << 31))
+#define HIGIG2_PPD3_PPD3_CONTAINER_TYPEf_GET(r) (((r).higig2[3]) & 0xf)
+#define HIGIG2_PPD3_PPD3_CONTAINER_TYPEf_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0xf)) | (((uint32_t)f) & 0xf))
+#define HIGIG2_PPD3_RSVD_7_4f_GET(r) ((((r).higig2[3]) >> 4) & 0xf)
+#define HIGIG2_PPD3_RSVD_7_4f_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0xf << 4)) | ((((uint32_t)f) & 0xf) << 4))
+#define HIGIG2_PPD3_OPCODEf_GET(r) ((((r).higig2[3]) >> 8) & 0x7)
+#define HIGIG2_PPD3_OPCODEf_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0x7 << 8)) | ((((uint32_t)f) & 0x7) << 8))
+#define HIGIG2_PPD3_SOURCE_TYPEf_GET(r) ((((r).higig2[3]) >> 11) & 0x1)
+#define HIGIG2_PPD3_SOURCE_TYPEf_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0x1 << 11)) | ((((uint32_t)f) & 0x1) << 11))
+#define HIGIG2_PPD3_RSVD_28f_GET(r) ((((r).higig2[3]) >> 12) & 0x1)
+#define HIGIG2_PPD3_RSVD_28f_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0x1 << 12)) | ((((uint32_t)f) & 0x1) << 12))
+#define HIGIG2_PPD3_DO_NOT_LEARNf_GET(r) ((((r).higig2[3]) >> 13) & 0x1)
+#define HIGIG2_PPD3_DO_NOT_LEARNf_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0x1 << 13)) | ((((uint32_t)f) & 0x1) << 13))
+#define HIGIG2_PPD3_PRESERVE_DOT1Pf_GET(r) ((((r).higig2[3]) >> 14) & 0x1)
+#define HIGIG2_PPD3_PRESERVE_DOT1Pf_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0x1 << 14)) | ((((uint32_t)f) & 0x1) << 14))
+#define HIGIG2_PPD3_PRESERVE_DSCPf_GET(r) ((((r).higig2[3]) >> 15) & 0x1)
+#define HIGIG2_PPD3_PRESERVE_DSCPf_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0x1 << 15)) | ((((uint32_t)f) & 0x1) << 15))
+#define HIGIG2_PPD3_SOURCE_INFOf_GET(r) ((((r).higig2[3]) >> 16) & 0xffff)
+#define HIGIG2_PPD3_SOURCE_INFOf_SET(r,f) (r).higig2[3]=(((r).higig2[3] & ~((uint32_t)0xffff << 16)) | ((((uint32_t)f) & 0xffff) << 16))
+#define HIGIG2_PPD3_PPD3_DATA_CONTAINERf_GET(r) ((r).higig2[2])
+#define HIGIG2_PPD3_PPD3_DATA_CONTAINERf_SET(r,f) (r).higig2[2]=((uint32_t)f)
+#define HIGIG2_PPD_TYPEf_GET(r) (((r).higig2[1]) & 0x7)
+#define HIGIG2_PPD_TYPEf_SET(r,f) (r).higig2[1]=(((r).higig2[1] & ~((uint32_t)0x7)) | (((uint32_t)f) & 0x7))
+#define HIGIG2_CCf_GET(r) ((((r).higig2[1]) >> 3) & 0x3)
+#define HIGIG2_CCf_SET(r,f) (r).higig2[1]=(((r).higig2[1] & ~((uint32_t)0x3 << 3)) | ((((uint32_t)f) & 0x3) << 3))
+#define HIGIG2_EHVf_GET(r) ((((r).higig2[1]) >> 5) & 0x1)
+#define HIGIG2_EHVf_SET(r,f) (r).higig2[1]=(((r).higig2[1] & ~((uint32_t)0x1 << 5)) | ((((uint32_t)f) & 0x1) << 5))
+#define HIGIG2_DPf_GET(r) ((((r).higig2[1]) >> 6) & 0x3)
+#define HIGIG2_DPf_SET(r,f) (r).higig2[1]=(((r).higig2[1] & ~((uint32_t)0x3 << 6)) | ((((uint32_t)f) & 0x3) << 6))
+#define HIGIG2_LBIDf_GET(r) ((((r).higig2[1]) >> 8) & 0xff)
+#define HIGIG2_LBIDf_SET(r,f) (r).higig2[1]=(((r).higig2[1] & ~((uint32_t)0xff << 8)) | ((((uint32_t)f) & 0xff) << 8))
+#define HIGIG2_SRC_PIDf_GET(r) ((((r).higig2[1]) >> 16) & 0xff)
+#define HIGIG2_SRC_PIDf_SET(r,f) (r).higig2[1]=(((r).higig2[1] & ~((uint32_t)0xff << 16)) | ((((uint32_t)f) & 0xff) << 16))
+#define HIGIG2_SRC_MODIDf_GET(r) ((((r).higig2[1]) >> 24) & 0xff)
+#define HIGIG2_SRC_MODIDf_SET(r,f) (r).higig2[1]=(((r).higig2[1] & ~((uint32_t)0xff << 24)) | ((((uint32_t)f) & 0xff) << 24))
+#define HIGIG2_DST_PORT_MGIDLf_GET(r) (((r).higig2[0]) & 0xff)
+#define HIGIG2_DST_PORT_MGIDLf_SET(r,f) (r).higig2[0]=(((r).higig2[0] & ~((uint32_t)0xff)) | (((uint32_t)f) & 0xff))
+#define HIGIG2_DST_MODID_MGIDHf_GET(r) ((((r).higig2[0]) >> 8) & 0xff)
+#define HIGIG2_DST_MODID_MGIDHf_SET(r,f) (r).higig2[0]=(((r).higig2[0] & ~((uint32_t)0xff << 8)) | ((((uint32_t)f) & 0xff) << 8))
+#define HIGIG2_TCf_GET(r) ((((r).higig2[0]) >> 16) & 0xf)
+#define HIGIG2_TCf_SET(r,f) (r).higig2[0]=(((r).higig2[0] & ~((uint32_t)0xf << 16)) | ((((uint32_t)f) & 0xf) << 16))
+#define HIGIG2_MCSTf_GET(r) ((((r).higig2[0]) >> 20) & 0x1)
+#define HIGIG2_MCSTf_SET(r,f) (r).higig2[0]=(((r).higig2[0] & ~((uint32_t)0x1 << 20)) | ((((uint32_t)f) & 0x1) << 20))
+#define HIGIG2_STARTf_GET(r) ((((r).higig2[0]) >> 24) & 0xff)
+#define HIGIG2_STARTf_SET(r,f) (r).higig2[0]=(((r).higig2[0] & ~((uint32_t)0xff << 24)) | ((((uint32_t)f) & 0xff) << 24))
+
+/*******************************************************************************
+ * End of 'HIGIG2'
+ ******************************************************************************/
+
+
+
+
+/*******************************************************************************
+ *
+ *                         HIGIG SYMBOL TABLE
+ *
+ ******************************************************************************/
+
+extern bcmdrd_symbols_t higig_symbols;
+
+
+#endif /* BCMPKT_HIGIG_DEFS_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_lbhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_lbhdr.h
new file mode 100644
index 000000000..f08895649
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_lbhdr.h
@@ -0,0 +1,139 @@
+/*! \file bcmpkt_lbhdr.h
+ *
+ * Loopback header (LBHDR, called LOOPBACK_MH in hardware) access interface.
+ *
+ */
+/*
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ */
+
+#ifndef BCMPKT_LBHDR_H
+#define BCMPKT_LBHDR_H
+
+#include <shr/shr_bitop.h>
+#include <sal/sal_types.h>
+#include <bcmdrd/bcmdrd_types.h>
+#include <bcmpkt/bcmpkt_lbhdr_defs.h>
+#include <bcmpkt/bcmpkt_lbhdr_field.h>
+
+/*! TX Packet MetaData size (bytes). */
+#define BCMPKT_LBHDR_SIZE_BYTES         16
+/*! TX Packet MetaData size (words). */
+#define BCMPKT_LBHDR_SIZE_WORDS         4
+
+/*!
+ * \name LBHDR Dumping flags.
+ * \anchor BCMPKT_LBHDR_DUMP_F_XXX
+ */
+/*! \{ */
+/*!
+ * Dump all fields contents.
+ */
+#define BCMPKT_LBHDR_DUMP_F_ALL         0
+/*!
+ * Dump none zero field content only.
+ */
+#define BCMPKT_LBHDR_DUMP_F_NONE_ZERO   1
+/*! \} */
+
+/*!
+ * \name BCMPKT_LBHDR_START encodings.
+ * \anchor BCMPKT_LBHDR_START_XXX
+ */
+/*! \{ */
+/*!
+ * Loopback header start of frame indicator's value.
+ */
+#define BCMPKT_LBHDR_START_IND                   251
+/*! \} */
+
+/*! \brief LBHDR field ID supported bit array.
+ * Array of bits indicating whether a LBHDR field ID is supported by a given
+ * device type.
+ */
+typedef struct bcmpkt_lbhdr_fid_support_s {
+    /*! Field ID bitmap container */
+    SHR_BITDCLNAME(fbits, BCMPKT_LBHDR_FID_COUNT);
+} bcmpkt_lbhdr_fid_support_t;
+
+/*!
+ * \name Utility macros for \ref bcmpkt_lbhdr_fid_support_t.
+ * \anchor BCMPKT_LBHDR_SUPPORT_OPS
+ */
+/*! \{ */
+/*!
+ * Macro to get a field ID's supported status.
+ *
+ * \retval zero Not supported
+ * \retval non-zero Supported
+ */
+#define BCMPKT_LBHDR_FID_SUPPORT_GET(_support, _fid) \
+        SHR_BITGET(((_support).fbits), (_fid))
+
+/*!
+ * Iterate over all supported LBHDR field IDs in the \c _support.
+ */
+#define BCMPKT_LBHDR_FID_SUPPORT_ITER(_support, _fid) \
+    for(_fid = 0; _fid < BCMPKT_LBHDR_FID_COUNT; _fid++) \
+        if(BCMPKT_LBHDR_FID_SUPPORT_GET(_support, _fid))
+/*! \} */
+
+/*!
+ * \brief Get field name for a given LBHDR field ID.
+ *
+ * \param [in] fid LBHDR field ID, refer to \ref BCMPKT_LBHDR_XXX.
+ * \param [out] name LBHDR field name string.
+ *
+ * \retval SHR_E_NONE success.
+ * \retval SHR_E_PARAM Check parameters failed.
+ */
+extern int
+bcmpkt_lbhdr_field_name_get(int fid, char **name);
+
+/*!
+ * \brief Get field ID for a given LBHDR field name.
+ *
+ * \param [in] name LBHDR field name string.
+ * \param [out] fid LBHDR Field ID.
+ *
+ * \retval SHR_E_NONE success.
+ * \retval SHR_E_PARAM Check parameters failed.
+ * \retval SHR_E_NOT_FOUND Not found the name.
+ */
+extern int
+bcmpkt_lbhdr_field_id_get(char* name, int *fid);
+
+/*!
+ * \brief Get supported LBHDR field IDs for a given device type.
+ *
+ * This function returns a structure with information about the LBHDR field IDs
+ * a given device type supports.
+ *
+ * Use \ref BCMPKT_LBHDR_FID_SUPPORT_GET on the returned structure to get the
+ * supported status of a specific field ID.
+ *
+ * \param [in] dev_type Device type.
+ * \param [out] support Field ID supported status bitmap.
+ *
+ * \retval SHR_E_NONE success.
+ * \retval SHR_E_PARAM Check parameters failed.
+ * \retval SHR_E_INTERNAL API internal error.
+ */
+extern int
+bcmpkt_lbhdr_fid_support_get(bcmdrd_dev_type_t dev_type,
+                             bcmpkt_lbhdr_fid_support_t *support);
+
+#endif /* BCMPKT_LBHDR_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_lbhdr_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_lbhdr_defs.h
new file mode 100644
index 000000000..cd68ac50c
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_lbhdr_defs.h
@@ -0,0 +1,344 @@
+#ifndef BCMPKT_LBHDR_DEFS_H
+#define BCMPKT_LBHDR_DEFS_H
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated from the registers file.
+ * Edits to this file will be lost when it is regenerated.
+ * Tool: INTERNAL/regs/xgs/generate-pmd.pl
+ *
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ *
+ * This file provides field macros for the Packet Loopback HeaDeR (LBHDR, called
+ * LOOPBACK_MH in hardware.) access.
+ *
+ ******************************************************************************/
+
+/*!
+ * \name Loopback module header field IDs.
+ * \anchor BCMPKT_LBHDR_XXX
+ */
+/*! \{ */
+/*! Invalid BCMPKT_LBHDR FID indicator */
+#define BCMPKT_LBHDR_FID_INVALID                 -1
+/*! Start of frame indicator. */
+#define BCMPKT_LBHDR_START                       0
+/*!
+ * 64 Header Types Supported. 1 means Packets from CPU with SOBMH header format
+ * to Passthru NLF
+ */
+#define BCMPKT_LBHDR_HEADER_TYPE                 1
+/*!
+ * Indicates the loopback COS queue and is used by the MMU for per
+ * application group accounting for packets received from the internal
+ * loopback port.  This must be put the PBI.INPUT_PRIORITY whenever the
+ * source port is the loopback port.
+ */
+#define BCMPKT_LBHDR_INPUT_PRIORITY              2
+/*! Pointer to CPU_PACKET_PROFILE_1/2 registers. */
+#define BCMPKT_LBHDR_PKT_PROFILE                 3
+/*! Triggers capture of intermediate packet processing result of this packet. */
+#define BCMPKT_LBHDR_VISIBILITY_PKT              4
+/*!
+ * Source field for the packet.
+ * Contents of this field are determined by value of SOURCE_TYPE.
+ * SOURCE_TYPE=0x0:
+ *   [15:0] SOURCE_VP
+ * SOURCE_TYPE=0x1:
+ *   [15:8] SRC_MODID
+ *   [7:0]  SRC_PORT
+ */
+#define BCMPKT_LBHDR_SOURCE                      5
+/*! Indicates contents of SOURCE field. 0x1: SGPP 0x0: SVP. */
+#define BCMPKT_LBHDR_SOURCE_TYPE                 6
+/*! CNG Bits */
+#define BCMPKT_LBHDR_TRILL_AC_CNG                7
+/*! Traffic class */
+#define BCMPKT_LBHDR_TRILL_AC_TC                 8
+/*! Do Not Learn Bit */
+#define BCMPKT_LBHDR_TRILL_AC_DO_NOT_LEARN       9
+/*! CNG Bits */
+#define BCMPKT_LBHDR_TRILL_NW_CNG                10
+/*! Traffic class */
+#define BCMPKT_LBHDR_TRILL_NW_TC                 11
+/*! Destination type (see encodings). Valid only if SUBFLOW_TYPE=CPU_TX_PROC. */
+#define BCMPKT_LBHDR_ETH_DEST_TYPE               12
+/*!
+ * Destination based on DESTINATION_TYPE. (For ECMP/ECMP_MEMBER cases, this field
+ * contains ECMP_GROUP_PTR). Valid only if SUBFLOW_TYPE=CPU_TX_PROC.
+ */
+#define BCMPKT_LBHDR_ETH_DEST                    13
+/*! Drop precedence for the apcket. Valid only if SUBFLOW_TYPE=CPU_TX_PROC. */
+#define BCMPKT_LBHDR_ETH_DP                      14
+/*!
+ * ECMP member ID for case where DESTINATION_TYPE=ECMP_MEMBER. Only valid for single
+ * level ECMP. Valid only if SUBFLOW_TYPE=CPU_TX_PROC.
+ */
+#define BCMPKT_LBHDR_ETH_ECMP_MEMBER_ID          15
+/*!
+ * Internal Congestion to be used for the packet. Valid only if
+ * SUBFLOW_TYPE=CPU_TX_PROC.
+ */
+#define BCMPKT_LBHDR_ETH_INT_CN                  16
+/*!
+ * Internal priority to be used for the packet. Valid only if
+ * SUBFLOW_TYPE=CPU_TX_PROC.
+ */
+#define BCMPKT_LBHDR_ETH_INT_PRI                 17
+/*!
+ * Allows software to select load balancing bitmap for non-unicast packets.
+ * valid only if MCAST_LB_INDEX_VLD=1.
+ */
+#define BCMPKT_LBHDR_ETH_MCAST_LB_INDEX          18
+/*! If set, MCAST_LB_INDEX field is valid. */
+#define BCMPKT_LBHDR_ETH_MCAST_LB_INDEX_VLD      19
+/*!
+ * Device Port Number which is to be used for processing packet in Ingress
+ * Pipeline.
+ */
+#define BCMPKT_LBHDR_ETH_PP_PORT                 20
+/*!
+ * If set, the qos fields (INT, PRI, etc) are specified in the header and
+ * override the pre-IFP assignment. Else, derived based on packet lookups.
+ * Valid only if SUBFLOW_TYPE=CPU_TX_PROC.
+ */
+#define BCMPKT_LBHDR_ETH_QOS_FIELDS_VLD          21
+/*!
+ * Indicates whether packets should be treated as routed or bridged. Valid
+ * only if SUBFLOW_TYPE=CPU_TX_PROC.
+ */
+#define BCMPKT_LBHDR_ETH_ROUTED_PKT              22
+/*! Identifies sub-flow (see encodings). */
+#define BCMPKT_LBHDR_ETH_SUBFLOW_TYPE            23
+/*! VRF */
+#define BCMPKT_LBHDR_ETHERNET_VRF                24
+/*! VRF valid */
+#define BCMPKT_LBHDR_ETHERNET_VRF_VALID          25
+/*! MUST Always be 0 */
+#define BCMPKT_LBHDR_ZERO                        26
+/*!
+ * Device Port Number which is to be used for processing packet in Ingress
+ * Pipeline.
+ */
+#define BCMPKT_LBHDR_PP_PORT                     27
+/*!
+ * Indicates whether packets should be treated as routed or bridged. Valid
+ * only if SUBFLOW_TYPE=CPU_TX_PROC.
+ */
+#define BCMPKT_LBHDR_ROUTED_PKT                  28
+/*! VRF */
+#define BCMPKT_LBHDR_VRF                         29
+/*! VRF valid */
+#define BCMPKT_LBHDR_VRF_VALID                   30
+/*! Qos field valid */
+#define BCMPKT_LBHDR_QOS_FIELD_VALID             31
+/*! Opaque object */
+#define BCMPKT_LBHDR_OPAQUE_OBJECT               32
+/*! Qos field ethernet */
+#define BCMPKT_LBHDR_QOS_FIELD_ETH               33
+/*! Internal priority ethernet */
+#define BCMPKT_LBHDR_INT_PRI_ETH                 34
+/*! Internal CN ethernet */
+#define BCMPKT_LBHDR_INT_CN_ETH                  35
+/*! CNG ethernet */
+#define BCMPKT_LBHDR_CNG_ETH                     36
+/*!  */
+#define BCMPKT_LBHDR_PKT_PROFILE_MD_ETH          37
+/*!  */
+#define BCMPKT_LBHDR_QOS_FIELD_VALID_MD_ETH      38
+/*!  */
+#define BCMPKT_LBHDR_PP_PORT_MD_ETH              39
+/*!  */
+#define BCMPKT_LBHDR_DESTINATION_MD_ETH          40
+/*!  */
+#define BCMPKT_LBHDR_SVTAG_TX_PRESENT_MD_ETH     41
+/*!  */
+#define BCMPKT_LBHDR_EXTENDED_DELETE_ENABLE_MD_ETH 42
+/*!  */
+#define BCMPKT_LBHDR_EXTENDED_DELETE_BYTE_COUNT_MD_ETH 43
+/*!  */
+#define BCMPKT_LBHDR_IFA_AT_OUTER_LAYER_MD_ETH   44
+/*!  */
+#define BCMPKT_LBHDR_OPAQUE_OBJECT_MD_ETH        45
+/*!  */
+#define BCMPKT_LBHDR_QOS_FIELD_ETH_MD_ETH        46
+/*!  */
+#define BCMPKT_LBHDR_INPUT_PRIORITY_MD_ETH       47
+/*!  */
+#define BCMPKT_LBHDR_CNP                         48
+/*! LBHDR FIELD ID NUMBER */
+#define BCMPKT_LBHDR_FID_COUNT                   49
+/*! \} */
+
+/*! LBHDR field name strings for debugging. */
+#define BCMPKT_LBHDR_FIELD_NAME_MAP_INIT \
+    {"START", BCMPKT_LBHDR_START},\
+    {"HEADER_TYPE", BCMPKT_LBHDR_HEADER_TYPE},\
+    {"INPUT_PRIORITY", BCMPKT_LBHDR_INPUT_PRIORITY},\
+    {"PKT_PROFILE", BCMPKT_LBHDR_PKT_PROFILE},\
+    {"VISIBILITY_PKT", BCMPKT_LBHDR_VISIBILITY_PKT},\
+    {"SOURCE", BCMPKT_LBHDR_SOURCE},\
+    {"SOURCE_TYPE", BCMPKT_LBHDR_SOURCE_TYPE},\
+    {"TRILL_AC::CNG", BCMPKT_LBHDR_TRILL_AC_CNG},\
+    {"TRILL_AC::TC", BCMPKT_LBHDR_TRILL_AC_TC},\
+    {"TRILL_AC::DO_NOT_LEARN", BCMPKT_LBHDR_TRILL_AC_DO_NOT_LEARN},\
+    {"TRILL_NW::CNG", BCMPKT_LBHDR_TRILL_NW_CNG},\
+    {"TRILL_NW::TC", BCMPKT_LBHDR_TRILL_NW_TC},\
+    {"ETH::DEST_TYPE", BCMPKT_LBHDR_ETH_DEST_TYPE},\
+    {"ETH::DEST", BCMPKT_LBHDR_ETH_DEST},\
+    {"ETH::DP", BCMPKT_LBHDR_ETH_DP},\
+    {"ETH::ECMP_MEMBER_ID", BCMPKT_LBHDR_ETH_ECMP_MEMBER_ID},\
+    {"ETH::INT_CN", BCMPKT_LBHDR_ETH_INT_CN},\
+    {"ETH::INT_PRI", BCMPKT_LBHDR_ETH_INT_PRI},\
+    {"ETH::MCAST_LB_INDEX", BCMPKT_LBHDR_ETH_MCAST_LB_INDEX},\
+    {"ETH::MCAST_LB_INDEX_VLD", BCMPKT_LBHDR_ETH_MCAST_LB_INDEX_VLD},\
+    {"ETH::PP_PORT", BCMPKT_LBHDR_ETH_PP_PORT},\
+    {"ETH::QOS_FIELDS_VLD", BCMPKT_LBHDR_ETH_QOS_FIELDS_VLD},\
+    {"ETH::ROUTED_PKT", BCMPKT_LBHDR_ETH_ROUTED_PKT},\
+    {"ETH::SUBFLOW_TYPE", BCMPKT_LBHDR_ETH_SUBFLOW_TYPE},\
+    {"ETHERNET::VRF", BCMPKT_LBHDR_ETHERNET_VRF},\
+    {"ETHERNET::VRF_VALID", BCMPKT_LBHDR_ETHERNET_VRF_VALID},\
+    {"ZERO", BCMPKT_LBHDR_ZERO},\
+    {"PP_PORT", BCMPKT_LBHDR_PP_PORT},\
+    {"ROUTED_PKT", BCMPKT_LBHDR_ROUTED_PKT},\
+    {"VRF", BCMPKT_LBHDR_VRF},\
+    {"VRF_VALID", BCMPKT_LBHDR_VRF_VALID},\
+    {"QOS_FIELD_VALID", BCMPKT_LBHDR_QOS_FIELD_VALID},\
+    {"OPAQUE_OBJECT", BCMPKT_LBHDR_OPAQUE_OBJECT},\
+    {"QOS_FIELD_ETH", BCMPKT_LBHDR_QOS_FIELD_ETH},\
+    {"INT_PRI_ETH", BCMPKT_LBHDR_INT_PRI_ETH},\
+    {"INT_CN_ETH", BCMPKT_LBHDR_INT_CN_ETH},\
+    {"CNG_ETH", BCMPKT_LBHDR_CNG_ETH},\
+    {"PKT_PROFILE_MD_ETH", BCMPKT_LBHDR_PKT_PROFILE_MD_ETH},\
+    {"QOS_FIELD_VALID_MD_ETH", BCMPKT_LBHDR_QOS_FIELD_VALID_MD_ETH},\
+    {"PP_PORT_MD_ETH", BCMPKT_LBHDR_PP_PORT_MD_ETH},\
+    {"DESTINATION_MD_ETH", BCMPKT_LBHDR_DESTINATION_MD_ETH},\
+    {"SVTAG_TX_PRESENT_MD_ETH", BCMPKT_LBHDR_SVTAG_TX_PRESENT_MD_ETH},\
+    {"EXTENDED_DELETE_ENABLE_MD_ETH", BCMPKT_LBHDR_EXTENDED_DELETE_ENABLE_MD_ETH},\
+    {"EXTENDED_DELETE_BYTE_COUNT_MD_ETH", BCMPKT_LBHDR_EXTENDED_DELETE_BYTE_COUNT_MD_ETH},\
+    {"IFA_AT_OUTER_LAYER_MD_ETH", BCMPKT_LBHDR_IFA_AT_OUTER_LAYER_MD_ETH},\
+    {"OPAQUE_OBJECT_MD_ETH", BCMPKT_LBHDR_OPAQUE_OBJECT_MD_ETH},\
+    {"QOS_FIELD_ETH_MD_ETH", BCMPKT_LBHDR_QOS_FIELD_ETH_MD_ETH},\
+    {"INPUT_PRIORITY_MD_ETH", BCMPKT_LBHDR_INPUT_PRIORITY_MD_ETH},\
+    {"CNP", BCMPKT_LBHDR_CNP},\
+    {"fid count", BCMPKT_LBHDR_FID_COUNT}
+
+/*!
+ * \name BCMPKT_LBHDR_HEADER_TYPE encodings.
+ * \anchor BCMPKT_LBHDR_HEADER_TYPE_XXX
+ */
+/*! \{ */
+/*! MinM, L2GRE and VXLAN tunnel terminated packet */
+#define BCMPKT_LBHDR_HEADER_T_TUNNEL_TERM        0
+/*! Trill Network Packets to Passthru NLF */
+#define BCMPKT_LBHDR_HEADER_T_TRILL_NW           1
+/*! Trill Access Layer Packets to Passthru NLF */
+#define BCMPKT_LBHDR_HEADER_T_TRILL_AC           2
+/*! Process as if it was received on front panel port. */
+#define BCMPKT_LBHDR_HEADER_T_ETHERNET           3
+/*! MAC in MAC packets to Passthru NLF */
+#define BCMPKT_LBHDR_HEADER_T_MIM                4
+/*! QCN Packets to Passthru NLF */
+#define BCMPKT_LBHDR_HEADER_T_QCN                5
+/*! Generic loopback */
+#define BCMPKT_LBHDR_HEADER_T_GENERIC            6
+/*! LB Hdr type ETH */
+#define BCMPKT_LBHDR_HEADER_T_LOOPBACK_MH        7
+/*! Transport header */
+#define BCMPKT_LBHDR_HEADER_T_TRANSPORT          7
+/*! \} */
+
+/*! BCMPKT_LBHDR_HEADER_TYPE encoding name strings for debugging. */
+#define BCMPKT_LBHDR_HEADER_TYPE_NAME_MAP_INIT \
+    {"TUNNEL_TERM", BCMPKT_LBHDR_HEADER_T_TUNNEL_TERM},\
+    {"TRILL_NW", BCMPKT_LBHDR_HEADER_T_TRILL_NW},\
+    {"TRILL_AC", BCMPKT_LBHDR_HEADER_T_TRILL_AC},\
+    {"ETHERNET", BCMPKT_LBHDR_HEADER_T_ETHERNET},\
+    {"MIM", BCMPKT_LBHDR_HEADER_T_MIM},\
+    {"QCN", BCMPKT_LBHDR_HEADER_T_QCN},\
+    {"GENERIC", BCMPKT_LBHDR_HEADER_T_GENERIC},\
+    {"LOOPBACK_MH", BCMPKT_LBHDR_HEADER_T_LOOPBACK_MH},\
+    {"TRANSPORT", BCMPKT_LBHDR_HEADER_T_TRANSPORT},\
+
+/*!
+ * \name BCMPKT_LBHDR_ETH_DEST_TYPE encodings.
+ * \anchor BCMPKT_LBHDR_ETH_DEST_TYPE_XXX
+ */
+/*! \{ */
+/*!
+ * Destination GLP. Note that despite the name, only physical ports (DGPP)
+ * are supported. Trunking is not supported.
+ */
+#define BCMPKT_LBHDR_ETH_DEST_T_DGLP             0
+/*! Next hop */
+#define BCMPKT_LBHDR_ETH_DEST_T_NHI              1
+/*! ECMP group */
+#define BCMPKT_LBHDR_ETH_DEST_T_ECMP             2
+/*! ECMP member */
+#define BCMPKT_LBHDR_ETH_DEST_T_ECMP_MEMBER      3
+/*! IPMC */
+#define BCMPKT_LBHDR_ETH_DEST_T_IPMC             4
+/*! L2MC */
+#define BCMPKT_LBHDR_ETH_DEST_T_L2MC             5
+/*! Vlan flooding */
+#define BCMPKT_LBHDR_ETH_DEST_T_VLAN_FLOOD       6
+/*! \} */
+
+/*! BCMPKT_LBHDR_ETH_DEST_TYPE encoding name strings for debugging. */
+#define BCMPKT_LBHDR_ETH_DEST_TYPE_NAME_MAP_INIT \
+    {"DGLP", BCMPKT_LBHDR_ETH_DEST_T_DGLP},\
+    {"NHI", BCMPKT_LBHDR_ETH_DEST_T_NHI},\
+    {"ECMP", BCMPKT_LBHDR_ETH_DEST_T_ECMP},\
+    {"ECMP_MEMBER", BCMPKT_LBHDR_ETH_DEST_T_ECMP_MEMBER},\
+    {"IPMC", BCMPKT_LBHDR_ETH_DEST_T_IPMC},\
+    {"L2MC", BCMPKT_LBHDR_ETH_DEST_T_L2MC},\
+    {"VLAN_FLOOD", BCMPKT_LBHDR_ETH_DEST_T_VLAN_FLOOD},\
+
+/*!
+ * \name BCMPKT_LBHDR_ETH_SUBFLOW_TYPE encodings.
+ * \anchor BCMPKT_LBHDR_ETH_SUBFLOW_TYPE_XXX
+ */
+/*! \{ */
+/*! CPU masquerade flow */
+#define BCMPKT_LBHDR_ETH_SUBFLOW_T_CPU_MASQUERADE 0
+/*! CPU_TX_PROC */
+#define BCMPKT_LBHDR_ETH_SUBFLOW_T_CPU_TX_PROC   1
+/*! \} */
+
+/*! BCMPKT_LBHDR_ETH_SUBFLOW_TYPE encoding name strings for debugging. */
+#define BCMPKT_LBHDR_ETH_SUBFLOW_TYPE_NAME_MAP_INIT \
+    {"CPU_MASQUERADE", BCMPKT_LBHDR_ETH_SUBFLOW_T_CPU_MASQUERADE},\
+    {"CPU_TX_PROC", BCMPKT_LBHDR_ETH_SUBFLOW_T_CPU_TX_PROC},\
+
+/*!
+ * \name Loopback module header internal usage field IDs.
+ * \anchor BCMPKT_LBHDR_I_XXX
+ */
+/*! \{ */
+/*! Invalid BCMPKT_LBHDR_I FID indicator */
+#define BCMPKT_LBHDR_I_FID_INVALID               -1
+/*! LBHDR RX raw data size. */
+#define BCMPKT_LBHDR_I_SIZE                      0
+/*! LBHDR_I FIELD ID NUMBER */
+#define BCMPKT_LBHDR_I_FID_COUNT                 1
+/*! \} */
+
+/*! LBHDR_I field name strings for debugging. */
+#define BCMPKT_LBHDR_I_FIELD_NAME_MAP_INIT \
+    {"SIZE", BCMPKT_LBHDR_I_SIZE},\
+    {"fid count", BCMPKT_LBHDR_I_FID_COUNT}
+
+#endif /*! BCMPKT_LBHDR_DEFS_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_lbhdr_field.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_lbhdr_field.h
new file mode 100644
index 000000000..e001ec598
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_lbhdr_field.h
@@ -0,0 +1,59 @@
+/*! \file bcmpkt_lbhdr_field.h
+ *
+ * Loopback header (LBHDR, LOOPBACK_MH in hardware) field access interface.
+ *
+ */
+/*
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ */
+
+#ifndef BCMPKT_LBHDR_FIELD_H
+#define BCMPKT_LBHDR_FIELD_H
+
+/*!
+ * \brief Get value from a LBHDR field.
+ *
+ * \param [in] dev_type Device type.
+ * \param [in] lbhdr LBHDR handle.
+ * \param [in] fid LBHDR field ID, refer to \ref BCMPKT_LBHDR_XXX.
+ * \param [out] val Field value.
+ *
+ * \retval SHR_E_NONE success.
+ * \retval SHR_E_PARAM Check parameters failed.
+ * \retval SHR_E_UNAVAIL Not support the field.
+ */
+extern int
+bcmpkt_lbhdr_field_get(bcmdrd_dev_type_t dev_type, uint32_t *lbhdr,
+                       int fid, uint32_t *val);
+
+/*!
+ * \brief Set value into a LBHDR field.
+ *
+ * \param [in] dev_type Device type.
+ * \param [in,out] lbhdr LBHDR handle.
+ * \param [in] fid LBHDR field ID, refer to \ref BCMPKT_LBHDR_XXX.
+ * \param [in] val Set value.
+ *
+ * \retval SHR_E_NONE success.
+ * \retval SHR_E_PARAM Check parameters failed.
+ * \retval SHR_E_UNAVAIL Not support the field.
+ */
+extern int
+bcmpkt_lbhdr_field_set(bcmdrd_dev_type_t dev_type, uint32_t *lbhdr,
+                       int fid, uint32_t val);
+
+#endif /* BCMPKT_LBHDR_FIELD_H */
+
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_lbhdr_internal.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_lbhdr_internal.h
new file mode 100644
index 000000000..048c9ae09
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_lbhdr_internal.h
@@ -0,0 +1,63 @@
+/*! \file bcmpkt_lbhdr_internal.h
+ *
+ * Loopback header (LBHDR, called LOOPBACK_MH in hardware) access interface
+ * (Internal use only).
+ *
+ */
+/*
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ */
+
+#ifndef BCMPKT_LBHDR_INTERNAL_H
+#define BCMPKT_LBHDR_INTERNAL_H
+
+#include <shr/shr_types.h>
+#include <bcmpkt/bcmpkt_pmd.h>
+#include <bcmpkt/bcmpkt_pmd_internal.h>
+#include <bcmpkt/bcmpkt_lbhdr_defs.h>
+
+/*!
+ * Array of LBHDR field getter functions for a particular device
+ * type.
+ */
+typedef struct bcmpkt_lbhdr_fget_s {
+    bcmpkt_field_get_f fget[BCMPKT_LBHDR_FID_COUNT];
+} bcmpkt_lbhdr_fget_t;
+
+/*!
+ * Array of LBHDR field setter functions for a particular device
+ * type. These functions are used for internally configuring packet
+ * filter.
+ */
+typedef struct bcmpkt_lbhdr_fset_s {
+    bcmpkt_field_set_f fset[BCMPKT_LBHDR_FID_COUNT];
+} bcmpkt_lbhdr_fset_t;
+
+/*!
+ * Array of LBHDR field address and length getter functions for a multiple
+ * words field of a particular device type. *addr is output address and return
+ * length.
+ */
+typedef struct bcmpkt_lbhdr_figet_s {
+    bcmpkt_ifield_get_f fget[BCMPKT_LBHDR_I_FID_COUNT];
+} bcmpkt_lbhdr_figet_t;
+
+#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \
+    extern void _bd##_lbhdr_view_info_get(bcmpkt_pmd_view_info_t *info);
+#define BCMDRD_DEVLIST_OVERRIDE
+#include <bcmdrd/bcmdrd_devlist.h>
+
+#endif /* BCMPKT_LBHDR_INTERNAL_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_pmd.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_pmd.h
new file mode 100644
index 000000000..3cb424d1f
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_pmd.h
@@ -0,0 +1,58 @@
+/*! \file bcmpkt_pmd.h
+ *
+ * Common macros and definitions for PMD.
+ *
+ */
+/*
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ */
+
+#ifndef BCMPKT_PMD_H
+#define BCMPKT_PMD_H
+
+#include <sal/sal_types.h>
+
+/* For application convenience */
+#include <bcmpkt/bcmpkt_util.h>
+#include <bcmpkt/bcmpkt_rxpmd_fid.h>
+#include <bcmpkt/bcmpkt_flexhdr_field.h>
+#include <bcmpkt/bcmpkt_lbhdr_field.h>
+#include <bcmpkt/bcmpkt_rxpmd_field.h>
+#include <bcmpkt/bcmpkt_txpmd_field.h>
+#include <bcmpkt/bcmpkt_rxpmd_match_id.h>
+
+/*! Invalid PMD header field ID. */
+#define BCMPKT_FID_INVALID -1
+
+/*! Bitmap array size. */
+#define BCMPKT_BITMAP_WORD_SIZE  16
+
+/*!
+ * \name BCMPKT Dumping flags.
+ * \anchor BCMPKT_DUMP_F_XXX
+ */
+/*! Dump all fields contents. */
+#define BCMPKT_DUMP_F_ALL         0
+/*! Dump none zero field content only. */
+#define BCMPKT_DUMP_F_NONE_ZERO   1
+
+/*! PMD header field ID bit array. */
+typedef struct bcmpkt_bitmap_s {
+    /*! Bit array */
+    uint32_t pbits[BCMPKT_BITMAP_WORD_SIZE];
+} bcmpkt_bitmap_t;
+
+#endif /* BCMPKT_PMD_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_pmd_internal.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_pmd_internal.h
new file mode 100644
index 000000000..67051fadd
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_pmd_internal.h
@@ -0,0 +1,61 @@
+/*! \file bcmpkt_pmd_internal.h
+ *
+ * \brief Basic PMD definitions.
+ *
+ * The defintions are kept separate to minimize the header file
+ * dependencies for the stand-alone PMD library.
+ *
+ */
+/*
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ */
+
+#ifndef BCMPKT_PMD_INTERNAL_H
+#define BCMPKT_PMD_INTERNAL_H
+
+#include <shr/shr_types.h>
+
+/*! Get a field from a PMD buffer. */
+typedef uint32_t (*bcmpkt_field_get_f)(uint32_t *data);
+
+/*! Set a field within a PMD buffer. */
+typedef void (*bcmpkt_field_set_f)(uint32_t *data, uint32_t val);
+
+/*! Get a complex field pointer or other attributions. */
+typedef uint32_t (*bcmpkt_ifield_get_f)(uint32_t *data, uint32_t **addr);
+
+/*!
+ * \brief Packet metadata information structure.
+ */
+typedef struct bcmpkt_pmd_view_info_s {
+
+    /*! View type list. */
+    shr_enum_map_t *view_types;
+
+    /*!
+     * Each field's view code.
+     * -2 means unavailable field.
+     * -1 means common field.
+     * others are correspondent view codes defined in view types.
+     */
+    int *view_infos;
+
+    /*! View type get function. */
+    bcmpkt_field_get_f view_type_get;
+
+} bcmpkt_pmd_view_info_t;
+
+#endif /* BCMPKT_PMD_INTERNAL_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rcpu_hdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rcpu_hdr.h
new file mode 100644
index 000000000..188fb5933
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rcpu_hdr.h
@@ -0,0 +1,125 @@
+/*! \file bcmpkt_rcpu_hdr.h
+ *
+ * RCPU header format definition.
+ *
+ */
+/*
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ */
+
+#ifndef BCMPKT_RCPU_HDR_H
+#define BCMPKT_RCPU_HDR_H
+
+#include <sal/sal_types.h>
+
+/*! RCPU Header length. */
+#define BCMPKT_RCPU_HDR_LEN         32
+/*! RX PMD maximum size. */
+#define BCMPKT_RCPU_RXPMD_SIZE      96
+/*! RX Encapsulation size. */
+#define BCMPKT_RCPU_RX_ENCAP_SIZE   (BCMPKT_RCPU_HDR_LEN + BCMPKT_RCPU_RXPMD_SIZE)
+/*! TX Module Header size. */
+#define BCMPKT_RCPU_TX_MH_SIZE      32
+/*! TX Encapsulation size. */
+#define BCMPKT_RCPU_TX_ENCAP_SIZE   (BCMPKT_RCPU_HDR_LEN + BCMPKT_RCPU_TX_MH_SIZE)
+/*! Maximum Encapsulation size. */
+#define BCMPKT_RCPU_MAX_ENCAP_SIZE  BCMPKT_RCPU_RX_ENCAP_SIZE
+
+/*!
+ * \name Packet RCPU operation types.
+ * \anchor BCMPKT_RCPU_OP_XXX
+ */
+/*! \{ */
+/*! No operation code.   */
+#define BCMPKT_RCPU_OP_NONE         0x0
+/*! To CPU packet.   */
+#define BCMPKT_RCPU_OP_RX           0x10
+/*! From CPU packet.   */
+#define BCMPKT_RCPU_OP_TX           0x20
+/*! \} */
+
+/*!
+ * \name Packet RCPU flags.
+ * \anchor BCMPKT_RCPU_F_XXX
+ */
+/*! \{ */
+/*! No operation code. */
+#define BCMPKT_RCPU_F_NONE          0
+/*! To CPU packet. */
+#define BCMPKT_RCPU_F_MODHDR        (1 << 2)
+/*! Do not pad runt TX packet. */
+#define BCMPKT_RCPU_F_TX_NO_PAD     (1 << 4)
+/*! \} */
+
+/*! RCPU default VLAN ID with pri and cfi.   */
+#define BCMPKT_RCPU_VLAN            0x01
+
+/*! RCPU TPID.   */
+#define BCMPKT_RCPU_TPID            0x8100
+
+/*! RCPU Ethertype.   */
+#define BCMPKT_RCPU_ETYPE           0xde08
+
+/*!
+ * \brief The RCPU header format structure.
+ */
+typedef struct bcmpkt_rcpu_hdr_s {
+
+    /*! RCPU header DMAC. */
+    shr_mac_t dmac;
+
+    /*! RCPU header SMAC. */
+    shr_mac_t smac;
+
+    /*! VLAN TPID. */
+    uint16_t tpid;
+
+    /*! VLAN TAG with cfi + pri. */
+    uint16_t vlan;
+
+    /*! Ether-type. */
+    uint16_t ethertype;
+
+    /*! RCPU signature. */
+    uint16_t signature;
+
+    /*! RCPU operation code. */
+    uint8_t opcode;
+
+    /*! RCPU operation code. */
+    uint8_t flags;
+
+    /*! RCPU operation code. */
+    uint16_t transid;
+
+    /*! Length of packet data. */
+    uint16_t pkt_len;
+
+    /*! Expect reply message length. */
+    uint16_t reply_len;
+
+    /*! packet meta data length. (Internal usage) */
+    uint8_t meta_len;
+
+    /*! Transmission queue number. (Internal usage) */
+    uint8_t queue_id;
+
+    /*! Reserved must be 0 */
+    uint16_t reserved;
+
+} bcmpkt_rcpu_hdr_t;
+
+#endif /* BCMPKT_RCPU_HDR_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd.h
new file mode 100644
index 000000000..f423f39ce
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd.h
@@ -0,0 +1,266 @@
+/*! \file bcmpkt_rxpmd.h
+ *
+ * RX Packet Meta Data (RXPMD, called EP_TO_CPU in hardware) access interfaces.
+ *
+ */
+/*
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ */
+
+#ifndef BCMPKT_RXPMD_H
+#define BCMPKT_RXPMD_H
+
+#include <sal/sal_types.h>
+#include <shr/shr_bitop.h>
+#include <bcmpkt/bcmpkt_rxpmd_defs.h>
+#include <bcmdrd/bcmdrd_types.h>
+#include <bcmlrd/bcmlrd_local_types.h>
+#include <bcmpkt/bcmpkt_rxpmd_field.h>
+#include <bcmpkt/bcmpkt_rxpmd_match_id.h>
+#include <bcmpkt/bcmpkt_rxpmd_fid.h>
+
+/*! RX raw packet metadata maximum size (words). */
+#define BCMPKT_RXPMD_SIZE_WORDS         18
+
+/*! RX raw packet metadata maximum size (bytes). */
+#define BCMPKT_RXPMD_SIZE_BYTES         (BCMPKT_RXPMD_SIZE_WORDS * 4)
+
+/*! CELL Error status bitmap. */
+#define BCMPKT_RXMETA_ST_CELL_ERROR     (0x1 << 18)
+
+/*! \brief Packet reasons bitmap.
+ * Set of "reasons" (\ref BCMPKT_RX_REASON_XXX) why a packet came to the CPU.
+ */
+typedef struct bcmpkt_rx_reasons_s {
+    /*! Bitmap container */
+    SHR_BITDCLNAME(pbits, BCMPKT_RX_REASON_COUNT);
+} bcmpkt_rx_reasons_t;
+
+/*!
+ * \name RXPMD Dumping flags.
+ * \anchor BCMPKT_RXPMD_DUMP_F_XXX
+ */
+/*! \{ */
+/*!
+ * Dump all fields contents.
+ */
+#define BCMPKT_RXPMD_DUMP_F_ALL         0
+/*!
+ * Dump none zero field content only.
+ */
+#define BCMPKT_RXPMD_DUMP_F_NONE_ZERO   1
+/*! \} */
+
+/*!
+ * \name Packet RX reason utility macros.
+ * \anchor BCMPKT_RX_REASON_OPS
+ */
+/*! \{ */
+/*!
+ * Macro to check if a reason (\ref BCMPKT_RX_REASON_XXX) is included in a
+ * set of reasons (\ref bcmpkt_rx_reasons_t). Returns:
+ *   zero     => reason is not included in the set
+ *   non-zero => reason is included in the set
+ */
+#define BCMPKT_RX_REASON_GET(_reasons, _reason) \
+        SHR_BITGET(((_reasons).pbits), (_reason))
+
+/*!
+ * Macro to add a reason (\ref BCMPKT_RX_REASON_XXX) to a set of
+ * reasons (\ref bcmpkt_rx_reasons_t)
+ */
+#define BCMPKT_RX_REASON_SET(_reasons, _reason) \
+        SHR_BITSET(((_reasons).pbits), (_reason))
+
+/*!
+ * Macro to add all reasons (\ref BCMPKT_RX_REASON_XXX) to a set of
+ * reasons (\ref bcmpkt_rx_reasons_t)
+ */
+#define BCMPKT_RX_REASON_SET_ALL(_reasons) \
+        SHR_BITSET_RANGE(((_reasons).pbits), 0, BCMPKT_RX_REASON_COUNT)
+
+/*!
+ * Macro to clear a reason (\ref BCMPKT_RX_REASON_XXX) from a set of
+ * reasons (\ref bcmpkt_rx_reasons_t)
+ */
+#define BCMPKT_RX_REASON_CLEAR(_reasons, _reason) \
+        SHR_BITCLR(((_reasons).pbits), (_reason))
+
+/*!
+ * Macro to clear a set of reasons (\ref bcmpkt_rx_reasons_t).
+ */
+#define BCMPKT_RX_REASON_CLEAR_ALL(_reasons) \
+        SHR_BITCLR_RANGE(((_reasons).pbits), 0, BCMPKT_RX_REASON_COUNT)
+/*!
+ * Macro to check for no reason (\ref bcmpkt_rx_reasons_t).
+ */
+#define BCMPKT_RX_REASON_IS_NULL(_reasons) \
+        SHR_BITNULL_RANGE(((_reasons).pbits), \
+                          0, BCMPKT_RX_REASON_COUNT)
+
+/*!
+ * Macro to iterate every reason (\ref bcmpkt_rx_reasons_t).
+ */
+#define BCMPKT_RX_REASON_ITER(_reasons, reason) \
+    for(reason = BCMPKT_RX_REASON_NONE; reason < (int)BCMPKT_RX_REASON_COUNT; reason++) \
+        if(BCMPKT_RX_REASON_GET(_reasons, reason))
+
+/*!
+ * Macro to get reasons number (\ref bcmpkt_rx_reasons_t).
+ */
+#define BCMPKT_RX_REASONS_COUNT(_reasons, _count) \
+        SHR_BITCOUNT_RANGE(((_reasons).pbits), _count, \
+                           0, BCMPKT_RX_REASON_COUNT)
+
+/*!
+ * Macro to compare 2 reasons (\ref bcmpkt_rx_reasons_t), return 1 for exact match.
+ */
+#define BCMPKT_RX_REASON_EQ(_reasons1, _reasons2) \
+        SHR_BITEQ_RANGE(((_reasons1).pbits), ((_reasons2).pbits), \
+                        0, BCMPKT_RX_REASON_COUNT)
+/*! \} */
+
+
+/*!
+ * \brief Get RXPMD's size for a given device type.
+ *
+ * \param [in] dev_type Device type.
+ * \param [out] len Bytes of RXPMD length.
+ *
+ * \retval SHR_E_NONE success.
+ * \retval SHR_E_PARAM Unsupported device type or bad \c len pointer.
+ * \retval SHR_E_UNAVAIL Not support RXPMD get function.
+ */
+extern int
+bcmpkt_rxpmd_len_get(bcmdrd_dev_type_t dev_type, uint32_t *len);
+
+
+/*!
+ * \brief Get module header's pointer of the RXPMD.
+ *
+ * This function is used for geting Module header's pointer in RXPMD.
+ *
+ * \param [in] dev_type Device type.
+ * \param [in] rxpmd RXPMD handle.
+ * \param [out] hg_hdr HiGig header handle.
+ *
+ * \retval SHR_E_NONE success.
+ * \retval SHR_E_PARAM Check parameters failed.
+ * \retval SHR_E_UNAVAIL Not support HiGig header.
+ * \retval SHR_E_INTERNAL Internal issue.
+ */
+extern int
+bcmpkt_rxpmd_mh_get(bcmdrd_dev_type_t dev_type, uint32_t *rxpmd,
+                    uint32_t **hg_hdr);
+
+/*!
+ * \brief Get RX reasons from RXPMD.
+ *
+ * Decode packet's RX reasons into "reasons". A received packet may have one RX
+ * reason, multiple RX reasons, or none reason. RX reasons are in the format of
+ * bitmap. Each bit means one reason type (refer to \ref BCMPKT_RX_REASON_XXX).
+ *
+ * User may use \ref BCMPKT_RX_REASON_OPS to parse each individual reason based
+ * on this function's return value "reasons".
+ *
+ * \param [in] dev_type Device type.
+ * \param [in] rxpmd RXPMD handle.
+ * \param [out] reasons RX reasons in bit array.
+ *
+ * \retval SHR_E_NONE success.
+ * \retval SHR_E_PARAM Check parameters failed.
+ * \retval SHR_E_UNAVAIL Not support Reason.
+ * \retval SHR_E_INTERNAL Internal issue.
+ */
+extern int
+bcmpkt_rxpmd_reasons_get(bcmdrd_dev_type_t dev_type, uint32_t *rxpmd,
+                         bcmpkt_rx_reasons_t  *reasons);
+
+/*!
+ * \brief Set RX reasons into the RXPMD. (Internally used for filter configuration.)
+ *
+ * Set RX reasons into RXPMD data for packet filter purpose.
+ *
+ * \param [in] dev_type Device type.
+ * \param [in] reasons Reasons bit array.
+ * \param [in,out] rxpmd RXPMD handle.
+ *
+ * \retval SHR_E_NONE success.
+ * \retval SHR_E_PARAM Check parameters failed.
+ * \retval SHR_E_UNAVAIL Not support Reason.
+ * \retval SHR_E_INTERNAL Internal issue.
+ */
+extern int
+bcmpkt_rxpmd_reasons_set(bcmdrd_dev_type_t dev_type,
+                         bcmpkt_rx_reasons_t *reasons, uint32_t *rxpmd);
+
+/*!
+ * \brief Get field name for a given RXPMD field ID.
+ *
+ * \param [in] fid RXPMD field ID, refer to \ref BCMPKT_RXPMD_XXX.
+ * \param [out] name RXPMD field name string.
+ *
+ * \retval SHR_E_NONE success.
+ * \retval SHR_E_PARAM Check parameters failed.
+ */
+extern int
+bcmpkt_rxpmd_field_name_get(int fid, char **name);
+
+/*!
+ * \brief Get field ID for a given RXPMD field name.
+ *
+ * \param [in] name RXPMD field name string.
+ * \param [out] fid RXPMD Field ID.
+ *
+ * \retval SHR_E_NONE success.
+ * \retval SHR_E_PARAM Check parameters failed.
+ * \retval SHR_E_NOT_FOUND Not found the name.
+ */
+extern int
+bcmpkt_rxpmd_field_id_get(char* name, int *fid);
+
+/*!
+ * \brief Get an RX reason's name.
+ *
+ * \param [in] reason Reason ID.
+ * \param [out] name Reason name string handle.
+ *
+ * \retval SHR_E_NONE success.
+ * \retval SHR_E_PARAM Check parameters failed.
+ */
+extern int
+bcmpkt_rx_reason_name_get(int reason, char **name);
+
+/*!
+ * \brief Return the RXPMD match id information.
+ *
+ * This routine returns the RXPMD match id information
+ * for the given match id name.
+ *
+ * \param [in]  variant         Variant type.
+ * \param [in]  spec            Match ID name.
+ * \param [out] info            Match ID data.
+ *
+ * \retval SHR_E_NONE           Success.
+ * \retval SHR_E_PARAM          Invalid variant, spec or info.
+ * \retval SHR_E_UNAVAIL        Match ID data is not available.
+ *
+ */
+extern int
+bcmpkt_rxpmd_match_id_data_get(bcmlrd_variant_t variant, const char *spec,
+                               const bcmlrd_match_id_db_t **info);
+
+#endif /* BCMPKT_RXPMD_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_defs.h
new file mode 100644
index 000000000..9d908a359
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_defs.h
@@ -0,0 +1,928 @@
+#ifndef BCMPKT_RXPMD_DEFS_H
+#define BCMPKT_RXPMD_DEFS_H
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated from the registers file.
+ * Edits to this file will be lost when it is regenerated.
+ * Tool: INTERNAL/regs/xgs/generate-pmd.pl
+ *
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ *
+ * This file provides field macros for RX Packet Metadata (RXPMD, called
+ * EP_TO_CPU in hardware) access.
+ *
+ ******************************************************************************/
+
+/*!
+ * \name RX packet metadata field IDs.
+ * \anchor BCMPKT_RXPMD_XXX
+ */
+/*! \{ */
+/*! Invalid BCMPKT_RXPMD FID indicator */
+#define BCMPKT_RXPMD_FID_INVALID                 -1
+/*! Cell was stored in Unicast Queue in MMU. */
+#define BCMPKT_RXPMD_UNICAST_QUEUE               0
+/*! Queue number used in MMU, PBE field */
+#define BCMPKT_RXPMD_QUEUE_NUM                   1
+/*! OVERLAY ON QUEUE_NUM Queue number used in MMU for cpu port, PBE field */
+#define BCMPKT_RXPMD_CPU_COS                     2
+/*!
+ * Valid only for packets which came in on Higig+ source port. Higig+ module
+ * header field, PBE field.
+ */
+#define BCMPKT_RXPMD_HGI                         3
+/*! Matched Rule, PBE field. */
+#define BCMPKT_RXPMD_MATCHED_RULE                4
+/*! DO NOT CHANGE, USED BY CMIC HW: Packet length after all modification. */
+#define BCMPKT_RXPMD_PKT_LENGTH                  5
+/*! Source Port Number, PBE field. */
+#define BCMPKT_RXPMD_SRC_PORT_NUM                6
+/*! Inner VID. */
+#define BCMPKT_RXPMD_INNER_VID                   7
+/*! Inner CFI */
+#define BCMPKT_RXPMD_INNER_CFI                   8
+/*! Inner priority. */
+#define BCMPKT_RXPMD_INNER_PRI                   9
+/*! Outer VID. */
+#define BCMPKT_RXPMD_OUTER_VID                   10
+/*! Outer Canoncial Format Indicator. */
+#define BCMPKT_RXPMD_OUTER_CFI                   11
+/*! Outer Priority. */
+#define BCMPKT_RXPMD_OUTER_PRI                   12
+/*! Special packet. */
+#define BCMPKT_RXPMD_SPECIAL_PACKET_INDICATOR    13
+/*! Special packet type. */
+#define BCMPKT_RXPMD_SPECIAL_PACKET_TYPE         14
+/*! Set to 1 if the DSCP value has been changed by the EP */
+#define BCMPKT_RXPMD_CHANGE_DSCP                 15
+/*! New DSCP value computed by the chip (EP) for the packet */
+#define BCMPKT_RXPMD_DSCP                        16
+/*! Change the ECN as indicated by the IFP. */
+#define BCMPKT_RXPMD_CHANGE_ECN                  17
+/*! New ECN value provided by the IFP. */
+#define BCMPKT_RXPMD_ECN                         18
+/*!
+ * NEW This pretty much maps from EP_TO_CPU_HEADER_OVERLAY_TYPE from the MPB
+ * 0: Invalid
+ * 1: TIMESTAMP field carries the LM packet-count for an OAM loss measurement
+ *    packet
+ * 2: TIMESTAMP_UPPER,TIMESTAMP fields carry the 64-bit DM Time-stamp for an
+ *    OAMdelay measurement packet
+ * 3: 802.1AS timestamp in the TIMESTAMP field
+ */
+#define BCMPKT_RXPMD_TIMESTAMP_TYPE              19
+/*! Low 32 bits of timestamp. */
+#define BCMPKT_RXPMD_TIMESTAMP                   20
+/*! High 32/16bits of timestamp. */
+#define BCMPKT_RXPMD_TIMESTAMP_HI                21
+/*! Mirror-to-Port Index, PBE field */
+#define BCMPKT_RXPMD_MTP_INDEX                   22
+/*! BPDU Packet, PBE field */
+#define BCMPKT_RXPMD_BPDU                        23
+/*! Indicates the packet is generated as a result of packet replication */
+#define BCMPKT_RXPMD_REPLICATION                 24
+/*! L3 IP Multicast Packet Flag, PBE field */
+#define BCMPKT_RXPMD_L3ONLY                      25
+/*! Indicates packet was routed - UC OR MC */
+#define BCMPKT_RXPMD_IP_ROUTED                   26
+/*! Source port is Higig. */
+#define BCMPKT_RXPMD_SRC_HIGIG                   27
+/*! Source port is Higig2. */
+#define BCMPKT_RXPMD_SRC_HIGIG2                  28
+/*! Indicates all switch copies were dropped in MMU (for copies to CPU port). */
+#define BCMPKT_RXPMD_UC_SW_COPY_DROPPED          29
+/*!
+ * Flag to indicate this is a switched packet as opposed to a mirrored packet,
+ * PBE field
+ */
+#define BCMPKT_RXPMD_SWITCH                      30
+/*! Indicates there is an SD tag in the packet */
+#define BCMPKT_RXPMD_SD_TAG_PRESENT              31
+/*!
+ * Indicates ingress inner VLAN tag action, PBE field:
+ * 0: do not modify, 1: add I-VID, 2: replace I-VID, 3: remove I-VID
+ */
+#define BCMPKT_RXPMD_ING_ITAG_ACTION             32
+/*!
+ * Indicates ingress outer VLAN tag action, PBE field:
+ * 0: do not modify, 1: add O-VID, 2: replace O-VID, 3: reserved
+ */
+#define BCMPKT_RXPMD_ING_OTAG_ACTION             33
+/*!
+ * Indicates the incoming tag status (INCOMING_TAG_STATUS):
+ * For single tag device:
+ *   0: untagged, 1: tagged
+ * For double tag device:
+ *   0: untagged, 1: single inner-tag, 2: single outer-tag, 3: double tagged
+ */
+#define BCMPKT_RXPMD_ING_TAG_TYPE                34
+/*!
+ * This field is set by the ingress chip to indicate to the egress chip that 1588
+ * 1-step ingress correction update has been applied to this packet. Egress chip
+ * uses this bit when egress port CF_UPDATE_MODE is set to ING_UPDATE_BASED_ENABLE.
+ * Encodings are:
+ * 0: Ingress correction update has NOT been applied to the packet. When configured
+ *    in coupled mode, egress chip must NOT apply the egress correction update for
+ *    this packet.
+ * 1: Ingress correction update has been applied to the packet. When configured in
+ *    coupled mode, egress chip must apply the egress correction update.
+ */
+#define BCMPKT_RXPMD_ONE_STEP_1588_ING_UPDATE_DONE 35
+/*! The full 32-bit EH tag */
+#define BCMPKT_RXPMD_EH_TAG                      36
+/*!
+ * Defines the header type enabling flexibility for future applications.
+ * 0x0: Queue selections for Sirius/Arad.
+ * 0x1: ClassID
+ * 0x2: ClassID + QTag
+ * 0x3-0x15: Reserved for future use.
+ */
+#define BCMPKT_RXPMD_EH_TYPE                     37
+/*! See EH_SEG_SEL_ENCODING format */
+#define BCMPKT_RXPMD_EH_TYPE_0_EH_SEG_SEL        38
+/*!
+ * EH queue tag assignment
+ * 00: No EH queue tag assignment,
+ * 01-11: EH queue tag assignment modes
+ */
+#define BCMPKT_RXPMD_EH_TYPE_0_EH_TAG_TYPE       39
+/*! EH queue tag */
+#define BCMPKT_RXPMD_EH_TYPE_0_EH_QUEUE_TAG      40
+/*! Type of CLASSID */
+#define BCMPKT_RXPMD_EH_TYPE_1_CLASSID_TYPE      41
+/*! L3_IIF */
+#define BCMPKT_RXPMD_EH_TYPE_1_L3_IIF            42
+/*! CLASSID */
+#define BCMPKT_RXPMD_EH_TYPE_1_CLASSID           43
+/*! Type of CLASSID */
+#define BCMPKT_RXPMD_EH_TYPE_2_CLASSID_TYPE      44
+/*! CLASSID */
+#define BCMPKT_RXPMD_EH_TYPE_2_CLASSID           45
+/*! L3_IIF */
+#define BCMPKT_RXPMD_EH_TYPE_2_EH_QUEUE_TAG      46
+/*! Indicates the Session ID for the Rx BFD packet.Valid when OAM_PKT_TYPE=2 */
+#define BCMPKT_RXPMD_RX_BFD_START_OFFSET         47
+/*! Indicates the Session ID for the Rx BFD packet.Valid when OAM_PKT_TYPE=2 */
+#define BCMPKT_RXPMD_RX_BFD_START_OFFSET_TYPE    48
+/*! Indicates the Session ID for the Rx BFD packet.Valid when OAM_PKT_TYPE=2 */
+#define BCMPKT_RXPMD_RX_BFD_SESSION_INDEX        49
+/*! The reason code TYPE. */
+#define BCMPKT_RXPMD_REASON_TYPE                 50
+/*!
+ * This should be the final control in the EP indicating to not change the TTL,
+ * from any source.
+ */
+#define BCMPKT_RXPMD_DO_NOT_CHANGE_TTL           51
+/*! Valid for non-BFD packet */
+#define BCMPKT_RXPMD_I2E_CLASSID_TYPE            52
+/*! Valid for non-BFD packet */
+#define BCMPKT_RXPMD_I2E_CLASSID                 53
+/*! Ingress L3 Intf number. */
+#define BCMPKT_RXPMD_ING_L3_INTF                 54
+/*! Indication to next pass about the type of loopback. */
+#define BCMPKT_RXPMD_LOOPBACK_PACKET_TYPE        55
+/*! If set, then packet has been modified by the EP and CRC needs to be regenerated */
+#define BCMPKT_RXPMD_REGEN_CRC                   56
+/*! Entropy label. */
+#define BCMPKT_RXPMD_ENTROPY_LABEL               57
+/*! Used to indicate if and how a tunnel has been decapsulated from the packet. */
+#define BCMPKT_RXPMD_TUNNEL_DECAP_TYPE           58
+/*! DLB_ID valid. */
+#define BCMPKT_RXPMD_DLB_ID_VALID                59
+/*! DLB_ID. */
+#define BCMPKT_RXPMD_DLB_ID                      60
+/*! HG2 Extended Header Valid. (was in FRC_reserved) */
+#define BCMPKT_RXPMD_HG2_EXT_HDR_VALID           61
+/*!
+ * New field for VNTAG/ETAGs: 00: Do not Modify
+ *  01: Add/Replace incoming VNTAG/ETAG with Ingress Port Based VNTAG
+ *  10: Add/Replace incoming VNTAG/ETAG with Ingress Port Based ETAG.
+ *  11: Delete Packets VNTAG/ETAG
+ */
+#define BCMPKT_RXPMD_VNTAG_ACTION                62
+/*! If set, the DVP/NHOP_INDEX overlay has the DVP. Else, it has the Next Hop Index. */
+#define BCMPKT_RXPMD_DVP_NHI_SEL                 63
+/*! Validates VFI field */
+#define BCMPKT_RXPMD_VFI_VALID                   64
+/*!
+ * This field's msb is the replication type from the EGR_IPMC table.
+ * It is a flag that determines the contents of the lower 15-bits.
+ *  0 => Lower 16-bits contain the IPMC_INTF_NUM from the MMU
+ *  1 => Lower 16-bits contain the NEXT_HOP_INDEX from the Ingress Pipeline
+ */
+#define BCMPKT_RXPMD_REPLICATION_OR_NHOP_INDEX   65
+/*! Low 32 bits of the packet MATCH_ID. */
+#define BCMPKT_RXPMD_MATCH_ID_LO                 66
+/*! High 18 bits of the packet MATCH_ID. */
+#define BCMPKT_RXPMD_MATCH_ID_HI                 67
+/*! MPB flex data_type from MPB_FIXED.flex_data_type */
+#define BCMPKT_RXPMD_MPB_FLEX_DATA_TYPE          68
+/*! From EPRE/EDEV_CONFIG table EGR_INT_CN_UPDPATE.int_cn */
+#define BCMPKT_RXPMD_INT_CN                      69
+/*! From MPB_FIXED */
+#define BCMPKT_RXPMD_CNG                         70
+/*! From MPB_FIXED */
+#define BCMPKT_RXPMD_EGR_ZONE_REMAP_CTRL         71
+/*! Constant specified in NPL */
+#define BCMPKT_RXPMD_DMA_HEADER_VERSION          72
+/*! Multicast packet from MPB_FIXED */
+#define BCMPKT_RXPMD_MULTICAST                   73
+/*! Copy to CPU from MPB_FIXED */
+#define BCMPKT_RXPMD_COPY_TO_CPU                 74
+/*! Trucate CPU copy from MPB_FIXED */
+#define BCMPKT_RXPMD_TRUNCATE_CPU_COPY           75
+/*! Incoming INT header type. */
+#define BCMPKT_RXPMD_INCOMING_INT_HDR_TYPE       76
+/*! MPB_FIXED.dop_trigger. */
+#define BCMPKT_RXPMD_DOP_TRIGGER                 77
+/*! From EPRE. If mirror pkt then == MIRROR_ENCAP_INDEx else == eparse_extract_offsets[3:0]. */
+#define BCMPKT_RXPMD_EPARSE_EXTRACT_OFFSETS_3_0_OR_MIRROR_ENCAP_INDEX 78
+/*! Eparse_extract_offsets[7:4]. */
+#define BCMPKT_RXPMD_EPARSE_EXTRACT_OFFSETS_7_4  79
+/*! Valid for non-BFD packet */
+#define BCMPKT_RXPMD_ING_L3_INTF_VALID           80
+/*! Overlay next hop. */
+#define BCMPKT_RXPMD_O_NHI                       81
+/*! Inner Entropy Used indication */
+#define BCMPKT_RXPMD_IEU                         82
+/*! IEU indication is valid */
+#define BCMPKT_RXPMD_IEU_VALID                   83
+/*! incoming opaque tag status indication */
+#define BCMPKT_RXPMD_INCOMING_OPAQUE_TAG_STATUS  84
+/*! Eparse_extract_offsets[6:4]. */
+#define BCMPKT_RXPMD_EPARSE_EXTRACT_OFFSETS_6_4  85
+/*! From EDEV_CONFIG.SRC_SUBPORT_TABLE. */
+#define BCMPKT_RXPMD_ING_PP_PORT                 86
+/*! Low 32 bits of the packet ARC_ID. */
+#define BCMPKT_RXPMD_ARC_ID_LO                   87
+/*! High 18 bits of the packet ARC_ID. */
+#define BCMPKT_RXPMD_ARC_ID_HI                   88
+/*! IEEE 802_1AS timestamp status. */
+#define BCMPKT_RXPMD_IEEE_802_1AS_TIMESTAMP_ENABLED 89
+/*! VRF */
+#define BCMPKT_RXPMD_VRF                         90
+/*! RX chip port. */
+#define BCMPKT_RXPMD_RX_CHIP_PORT                91
+/*! VPP copy. */
+#define BCMPKT_RXPMD_VPP_COPY_TYPE               92
+/*! RXPMD FIELD ID NUMBER */
+#define BCMPKT_RXPMD_FID_COUNT                   93
+/*! \} */
+
+/*! RXPMD field name strings for debugging. */
+#define BCMPKT_RXPMD_FIELD_NAME_MAP_INIT \
+    {"UNICAST_QUEUE", BCMPKT_RXPMD_UNICAST_QUEUE},\
+    {"QUEUE_NUM", BCMPKT_RXPMD_QUEUE_NUM},\
+    {"CPU_COS", BCMPKT_RXPMD_CPU_COS},\
+    {"HGI", BCMPKT_RXPMD_HGI},\
+    {"MATCHED_RULE", BCMPKT_RXPMD_MATCHED_RULE},\
+    {"PKT_LENGTH", BCMPKT_RXPMD_PKT_LENGTH},\
+    {"SRC_PORT_NUM", BCMPKT_RXPMD_SRC_PORT_NUM},\
+    {"INNER_VID", BCMPKT_RXPMD_INNER_VID},\
+    {"INNER_CFI", BCMPKT_RXPMD_INNER_CFI},\
+    {"INNER_PRI", BCMPKT_RXPMD_INNER_PRI},\
+    {"OUTER_VID", BCMPKT_RXPMD_OUTER_VID},\
+    {"OUTER_CFI", BCMPKT_RXPMD_OUTER_CFI},\
+    {"OUTER_PRI", BCMPKT_RXPMD_OUTER_PRI},\
+    {"SPECIAL_PACKET_INDICATOR", BCMPKT_RXPMD_SPECIAL_PACKET_INDICATOR},\
+    {"SPECIAL_PACKET_TYPE", BCMPKT_RXPMD_SPECIAL_PACKET_TYPE},\
+    {"CHANGE_DSCP", BCMPKT_RXPMD_CHANGE_DSCP},\
+    {"DSCP", BCMPKT_RXPMD_DSCP},\
+    {"CHANGE_ECN", BCMPKT_RXPMD_CHANGE_ECN},\
+    {"ECN", BCMPKT_RXPMD_ECN},\
+    {"TIMESTAMP_TYPE", BCMPKT_RXPMD_TIMESTAMP_TYPE},\
+    {"TIMESTAMP", BCMPKT_RXPMD_TIMESTAMP},\
+    {"TIMESTAMP_HI", BCMPKT_RXPMD_TIMESTAMP_HI},\
+    {"MTP_INDEX", BCMPKT_RXPMD_MTP_INDEX},\
+    {"BPDU", BCMPKT_RXPMD_BPDU},\
+    {"REPLICATION", BCMPKT_RXPMD_REPLICATION},\
+    {"L3ONLY", BCMPKT_RXPMD_L3ONLY},\
+    {"IP_ROUTED", BCMPKT_RXPMD_IP_ROUTED},\
+    {"SRC_HIGIG", BCMPKT_RXPMD_SRC_HIGIG},\
+    {"SRC_HIGIG2", BCMPKT_RXPMD_SRC_HIGIG2},\
+    {"UC_SW_COPY_DROPPED", BCMPKT_RXPMD_UC_SW_COPY_DROPPED},\
+    {"SWITCH", BCMPKT_RXPMD_SWITCH},\
+    {"SD_TAG_PRESENT", BCMPKT_RXPMD_SD_TAG_PRESENT},\
+    {"ING_ITAG_ACTION", BCMPKT_RXPMD_ING_ITAG_ACTION},\
+    {"ING_OTAG_ACTION", BCMPKT_RXPMD_ING_OTAG_ACTION},\
+    {"ING_TAG_TYPE", BCMPKT_RXPMD_ING_TAG_TYPE},\
+    {"ONE_STEP_1588_ING_UPDATE_DONE", BCMPKT_RXPMD_ONE_STEP_1588_ING_UPDATE_DONE},\
+    {"EH_TAG", BCMPKT_RXPMD_EH_TAG},\
+    {"EH_TYPE", BCMPKT_RXPMD_EH_TYPE},\
+    {"EH_TYPE_0::EH_SEG_SEL", BCMPKT_RXPMD_EH_TYPE_0_EH_SEG_SEL},\
+    {"EH_TYPE_0::EH_TAG_TYPE", BCMPKT_RXPMD_EH_TYPE_0_EH_TAG_TYPE},\
+    {"EH_TYPE_0::EH_QUEUE_TAG", BCMPKT_RXPMD_EH_TYPE_0_EH_QUEUE_TAG},\
+    {"EH_TYPE_1::CLASSID_TYPE", BCMPKT_RXPMD_EH_TYPE_1_CLASSID_TYPE},\
+    {"EH_TYPE_1::L3_IIF", BCMPKT_RXPMD_EH_TYPE_1_L3_IIF},\
+    {"EH_TYPE_1::CLASSID", BCMPKT_RXPMD_EH_TYPE_1_CLASSID},\
+    {"EH_TYPE_2::CLASSID_TYPE", BCMPKT_RXPMD_EH_TYPE_2_CLASSID_TYPE},\
+    {"EH_TYPE_2::CLASSID", BCMPKT_RXPMD_EH_TYPE_2_CLASSID},\
+    {"EH_TYPE_2::EH_QUEUE_TAG", BCMPKT_RXPMD_EH_TYPE_2_EH_QUEUE_TAG},\
+    {"RX_BFD_START_OFFSET", BCMPKT_RXPMD_RX_BFD_START_OFFSET},\
+    {"RX_BFD_START_OFFSET_TYPE", BCMPKT_RXPMD_RX_BFD_START_OFFSET_TYPE},\
+    {"RX_BFD_SESSION_INDEX", BCMPKT_RXPMD_RX_BFD_SESSION_INDEX},\
+    {"REASON_TYPE", BCMPKT_RXPMD_REASON_TYPE},\
+    {"DO_NOT_CHANGE_TTL", BCMPKT_RXPMD_DO_NOT_CHANGE_TTL},\
+    {"I2E_CLASSID_TYPE", BCMPKT_RXPMD_I2E_CLASSID_TYPE},\
+    {"I2E_CLASSID", BCMPKT_RXPMD_I2E_CLASSID},\
+    {"ING_L3_INTF", BCMPKT_RXPMD_ING_L3_INTF},\
+    {"LOOPBACK_PACKET_TYPE", BCMPKT_RXPMD_LOOPBACK_PACKET_TYPE},\
+    {"REGEN_CRC", BCMPKT_RXPMD_REGEN_CRC},\
+    {"ENTROPY_LABEL", BCMPKT_RXPMD_ENTROPY_LABEL},\
+    {"TUNNEL_DECAP_TYPE", BCMPKT_RXPMD_TUNNEL_DECAP_TYPE},\
+    {"DLB_ID_VALID", BCMPKT_RXPMD_DLB_ID_VALID},\
+    {"DLB_ID", BCMPKT_RXPMD_DLB_ID},\
+    {"HG2_EXT_HDR_VALID", BCMPKT_RXPMD_HG2_EXT_HDR_VALID},\
+    {"VNTAG_ACTION", BCMPKT_RXPMD_VNTAG_ACTION},\
+    {"DVP_NHI_SEL", BCMPKT_RXPMD_DVP_NHI_SEL},\
+    {"VFI_VALID", BCMPKT_RXPMD_VFI_VALID},\
+    {"REPLICATION_OR_NHOP_INDEX", BCMPKT_RXPMD_REPLICATION_OR_NHOP_INDEX},\
+    {"MATCH_ID_LO", BCMPKT_RXPMD_MATCH_ID_LO},\
+    {"MATCH_ID_HI", BCMPKT_RXPMD_MATCH_ID_HI},\
+    {"MPB_FLEX_DATA_TYPE", BCMPKT_RXPMD_MPB_FLEX_DATA_TYPE},\
+    {"INT_CN", BCMPKT_RXPMD_INT_CN},\
+    {"CNG", BCMPKT_RXPMD_CNG},\
+    {"EGR_ZONE_REMAP_CTRL", BCMPKT_RXPMD_EGR_ZONE_REMAP_CTRL},\
+    {"DMA_HEADER_VERSION", BCMPKT_RXPMD_DMA_HEADER_VERSION},\
+    {"MULTICAST", BCMPKT_RXPMD_MULTICAST},\
+    {"COPY_TO_CPU", BCMPKT_RXPMD_COPY_TO_CPU},\
+    {"TRUNCATE_CPU_COPY", BCMPKT_RXPMD_TRUNCATE_CPU_COPY},\
+    {"INCOMING_INT_HDR_TYPE", BCMPKT_RXPMD_INCOMING_INT_HDR_TYPE},\
+    {"DOP_TRIGGER", BCMPKT_RXPMD_DOP_TRIGGER},\
+    {"EPARSE_EXTRACT_OFFSETS_3_0_OR_MIRROR_ENCAP_INDEX", BCMPKT_RXPMD_EPARSE_EXTRACT_OFFSETS_3_0_OR_MIRROR_ENCAP_INDEX},\
+    {"EPARSE_EXTRACT_OFFSETS_7_4", BCMPKT_RXPMD_EPARSE_EXTRACT_OFFSETS_7_4},\
+    {"ING_L3_INTF_VALID", BCMPKT_RXPMD_ING_L3_INTF_VALID},\
+    {"O_NHI", BCMPKT_RXPMD_O_NHI},\
+    {"IEU", BCMPKT_RXPMD_IEU},\
+    {"IEU_VALID", BCMPKT_RXPMD_IEU_VALID},\
+    {"INCOMING_OPAQUE_TAG_STATUS", BCMPKT_RXPMD_INCOMING_OPAQUE_TAG_STATUS},\
+    {"EPARSE_EXTRACT_OFFSETS_6_4", BCMPKT_RXPMD_EPARSE_EXTRACT_OFFSETS_6_4},\
+    {"ING_PP_PORT", BCMPKT_RXPMD_ING_PP_PORT},\
+    {"ARC_ID_LO", BCMPKT_RXPMD_ARC_ID_LO},\
+    {"ARC_ID_HI", BCMPKT_RXPMD_ARC_ID_HI},\
+    {"IEEE_802_1AS_TIMESTAMP_ENABLED", BCMPKT_RXPMD_IEEE_802_1AS_TIMESTAMP_ENABLED},\
+    {"VRF", BCMPKT_RXPMD_VRF},\
+    {"RX_CHIP_PORT", BCMPKT_RXPMD_RX_CHIP_PORT},\
+    {"VPP_COPY_TYPE", BCMPKT_RXPMD_VPP_COPY_TYPE},\
+    {"fid count", BCMPKT_RXPMD_FID_COUNT}
+
+/*!
+ * \name BCMPKT_RXPMD_TIMESTAMP_TYPE encodings.
+ * \anchor BCMPKT_RXPMD_TIMESTAMP_TYPE_XXX
+ */
+/*! \{ */
+/*!  */
+#define BCMPKT_RXPMD_TIMESTAMP_T_INVALID         0
+/*!  */
+#define BCMPKT_RXPMD_TIMESTAMP_T_MMU_32NS        1
+/*!  */
+#define BCMPKT_RXPMD_TIMESTAMP_T_OAM_LM          1
+/*!  */
+#define BCMPKT_RXPMD_TIMESTAMP_T_OAM_DM          2
+/*!  */
+#define BCMPKT_RXPMD_TIMESTAMP_T_PM_8NS          2
+/*!  */
+#define BCMPKT_RXPMD_TIMESTAMP_T_IEEE_802_1AS    3
+/*!  */
+#define BCMPKT_RXPMD_TIMESTAMP_T_PM_1NS          3
+/*! \} */
+
+/*! BCMPKT_RXPMD_TIMESTAMP_TYPE encoding name strings for debugging. */
+#define BCMPKT_RXPMD_TIMESTAMP_TYPE_NAME_MAP_INIT \
+    {"INVALID", BCMPKT_RXPMD_TIMESTAMP_T_INVALID},\
+    {"MMU_32NS", BCMPKT_RXPMD_TIMESTAMP_T_MMU_32NS},\
+    {"OAM_LM", BCMPKT_RXPMD_TIMESTAMP_T_OAM_LM},\
+    {"OAM_DM", BCMPKT_RXPMD_TIMESTAMP_T_OAM_DM},\
+    {"PM_8NS", BCMPKT_RXPMD_TIMESTAMP_T_PM_8NS},\
+    {"IEEE_802_1AS", BCMPKT_RXPMD_TIMESTAMP_T_IEEE_802_1AS},\
+    {"PM_1NS", BCMPKT_RXPMD_TIMESTAMP_T_PM_1NS},\
+
+/*!
+ * \name BCMPKT_RXPMD_ING_TAG_TYPE encodings.
+ * \anchor BCMPKT_RXPMD_ING_TAG_TYPE_XXX
+ */
+/*! \{ */
+/*! No tag */
+#define BCMPKT_RXPMD_ING_TAG_T_NONE              0
+/*! Singgle inner tag */
+#define BCMPKT_RXPMD_ING_TAG_T_SINGLE_INNER      1
+/*! Tagged */
+#define BCMPKT_RXPMD_ING_TAG_T_TAGGED            1
+/*! Singgle outer tag */
+#define BCMPKT_RXPMD_ING_TAG_T_SINGLE_OUTER      2
+/*! Double tags */
+#define BCMPKT_RXPMD_ING_TAG_T_DOUBLE            3
+/*! \} */
+
+/*! BCMPKT_RXPMD_ING_TAG_TYPE encoding name strings for debugging. */
+#define BCMPKT_RXPMD_ING_TAG_TYPE_NAME_MAP_INIT \
+    {"NONE", BCMPKT_RXPMD_ING_TAG_T_NONE},\
+    {"SINGLE_INNER", BCMPKT_RXPMD_ING_TAG_T_SINGLE_INNER},\
+    {"TAGGED", BCMPKT_RXPMD_ING_TAG_T_TAGGED},\
+    {"SINGLE_OUTER", BCMPKT_RXPMD_ING_TAG_T_SINGLE_OUTER},\
+    {"DOUBLE", BCMPKT_RXPMD_ING_TAG_T_DOUBLE},\
+
+/*!
+ * \name BCMPKT_RXPMD_EH_TYPE encodings.
+ * \anchor BCMPKT_RXPMD_EH_TYPE_XXX
+ */
+/*! \{ */
+/*!  */
+#define BCMPKT_RXPMD_EH_T_0                      0
+/*!  */
+#define BCMPKT_RXPMD_EH_T_1                      1
+/*!  */
+#define BCMPKT_RXPMD_EH_T_2                      2
+/*! \} */
+
+/*! BCMPKT_RXPMD_EH_TYPE encoding name strings for debugging. */
+#define BCMPKT_RXPMD_EH_TYPE_NAME_MAP_INIT \
+    {"EH_TYPE_0", BCMPKT_RXPMD_EH_T_0},\
+    {"EH_TYPE_1", BCMPKT_RXPMD_EH_T_1},\
+    {"EH_TYPE_2", BCMPKT_RXPMD_EH_T_2},\
+
+/*!
+ * \name BCMPKT_RXPMD_REASON_TYPE encodings.
+ * \anchor BCMPKT_RXPMD_REASON_TYPE_XXX
+ */
+/*! \{ */
+/*!  */
+#define BCMPKT_RXPMD_REASON_T_FROM_IP            0
+/*!  */
+#define BCMPKT_RXPMD_REASON_T_FROM_EP            1
+/*! \} */
+
+/*! BCMPKT_RXPMD_REASON_TYPE encoding name strings for debugging. */
+#define BCMPKT_RXPMD_REASON_TYPE_NAME_MAP_INIT \
+    {"CTC_INITIATED_FROM_IP", BCMPKT_RXPMD_REASON_T_FROM_IP},\
+    {"CTC_INITIATED_FROM_EP", BCMPKT_RXPMD_REASON_T_FROM_EP},\
+
+/*!
+ * \name RX packet metadata internal usage field IDs.
+ * \anchor BCMPKT_RXPMD_I_XXX
+ */
+/*! \{ */
+/*! Invalid BCMPKT_RXPMD_I FID indicator */
+#define BCMPKT_RXPMD_I_FID_INVALID               -1
+/*! RXPMD raw data size. */
+#define BCMPKT_RXPMD_I_SIZE                      0
+/*! Contains RX reasons. Refer to bcmpkt_rxpmd_reasons_get to decode reasons. */
+#define BCMPKT_RXPMD_I_REASON                    1
+/*! Module Header information. Refer to Higig macros to encode/decode this erea. */
+#define BCMPKT_RXPMD_I_MODULE_HDR                2
+/*! MPB flex_data */
+#define BCMPKT_RXPMD_I_FLEX_DATA                 3
+/*! RXPMD_I FIELD ID NUMBER */
+#define BCMPKT_RXPMD_I_FID_COUNT                 4
+/*! \} */
+
+/*! RXPMD_I field name strings for debugging. */
+#define BCMPKT_RXPMD_I_FIELD_NAME_MAP_INIT \
+    {"SIZE", BCMPKT_RXPMD_I_SIZE},\
+    {"REASON", BCMPKT_RXPMD_I_REASON},\
+    {"MODULE_HDR", BCMPKT_RXPMD_I_MODULE_HDR},\
+    {"FLEX_DATA", BCMPKT_RXPMD_I_FLEX_DATA},\
+    {"fid count", BCMPKT_RXPMD_I_FID_COUNT}
+
+/*!
+ * \name Packet RX Reason Types.
+ * \anchor BCMPKT_RX_REASON_XXX
+ */
+/*! \{ */
+/*! No reason */
+#define BCMPKT_RX_REASON_NONE                    0
+/*! Adapt miss. */
+#define BCMPKT_RX_REASON_ADAPT_MISS              1
+/*! IPMC interface mismatch */
+#define BCMPKT_RX_REASON_CPU_IPMC_INTERFACE_MISMATCH 2
+/*! Get: Indicate NAT REASON happened; Set: Configure NAT REASON mask. */
+#define BCMPKT_RX_REASON_NAT                     3
+/*! TCP/UDP packet NAT lookup miss. */
+#define BCMPKT_RX_REASON_NAT_TCP_UDP_MISS        4
+/*! ICMP packet NAT lookup miss. */
+#define BCMPKT_RX_REASON_NAT_ICMP_MISS           5
+/*! NAT lookup on fragmented packet. */
+#define BCMPKT_RX_REASON_NAT_FRAGMENT            6
+/*! Non TCP/UDP/ICMP packet NAT lookup miss. */
+#define BCMPKT_RX_REASON_NAT_OTHER_MISS          7
+/*! FCOE zone check fail */
+#define BCMPKT_RX_REASON_FCOE_ZONE_CHECK_FAIL    11
+/*! VXLAN VNID miss */
+#define BCMPKT_RX_REASON_VXLAN_VN_ID_MISS        12
+/*! VXLAN SIP miss */
+#define BCMPKT_RX_REASON_VXLAN_SIP_MISS          13
+/*! QCN_CNM_PRP_DLF */
+#define BCMPKT_RX_REASON_QCN_CNM_PRP_DLF         14
+/*! QCN_CNM_PRP */
+#define BCMPKT_RX_REASON_QCN_CNM_PRP             15
+/*! MPLS_ALERT_LABEL */
+#define BCMPKT_RX_REASON_MPLS_ALERT_LABEL        16
+/*! MPLS_ILLEGAL_RESERVED_LABEL */
+#define BCMPKT_RX_REASON_MPLS_ILLEGAL_RESERVED_LABEL 17
+/*! ICNM */
+#define BCMPKT_RX_REASON_ICNM                    18
+/*! Copy to CPU for visibility packet */
+#define BCMPKT_RX_REASON_PACKET_TRACE_TO_CPU     19
+/*! BFD Error */
+#define BCMPKT_RX_REASON_BFD_ERROR               20
+/*! BFD Slowpath to CPU */
+#define BCMPKT_RX_REASON_BFD_SLOWPATH            21
+/*! L2GRE_VPNID_MISS */
+#define BCMPKT_RX_REASON_L2GRE_VPNID_MISS        22
+/*! L2GRE_SIP_MISS */
+#define BCMPKT_RX_REASON_L2GRE_SIP_MISS          23
+/*! Get: Indicate TRILL REASON happened; Set: Configure TRILL REASON mask. */
+#define BCMPKT_RX_REASON_TRILL                   24
+/*! Trill Header Error */
+#define BCMPKT_RX_REASON_TRILL_HDR_ERROR         25
+/*! Trill Lookup Miss */
+#define BCMPKT_RX_REASON_TRILL_LOOKUP_MISS       26
+/*! Trill RPF Check Fail */
+#define BCMPKT_RX_REASON_TRILL_RPF_CHECK_FAIL    27
+/*! Trill Slow Path */
+#define BCMPKT_RX_REASON_TRILL_SLOWPATH          28
+/*! Trill Core IS-IS */
+#define BCMPKT_RX_REASON_TRILL_CORE_IS_IS_PKT    29
+/*! Trill Hop Count Check Failure */
+#define BCMPKT_RX_REASON_TRILL_HOP_COUNT_CHECK_FAIL 30
+/*! Rbridge nickname lookup copy to cpu */
+#define BCMPKT_RX_REASON_TRILL_NICKNAME_TABLE    31
+/*! Tunnel decap ECN error */
+#define BCMPKT_RX_REASON_TUNNEL_DECAP_ECN_ERROR  32
+/*! OAM packets copied to the CPU for slowpath processing */
+#define BCMPKT_RX_REASON_OAM_SLOWPATH            33
+/*!
+ * Indicates packet was copied to CPU due to a network time sync packet.  This is
+ * set either by dedicated IEEE 802.1AS controls or the FP.
+ */
+#define BCMPKT_RX_REASON_TIME_SYNC               34
+/*! Indicates packet was copied to the CPU due to VLAN Translation miss. */
+#define BCMPKT_RX_REASON_VXLT_MISS               35
+/*! Get: Indicate NIV REASON happened; Set: Configure NIV REASON mask. */
+#define BCMPKT_RX_REASON_NIV                     36
+/*! Dot1p Admittance Discard */
+#define BCMPKT_RX_REASON_NIV_DOT1P_DROP          37
+/*! VIF Lookup Miss */
+#define BCMPKT_RX_REASON_NIV_VIF_MISS            38
+/*! RPF Lookup Miss */
+#define BCMPKT_RX_REASON_NIV_RPF_MISS            39
+/*! VNTAG Format Error */
+#define BCMPKT_RX_REASON_NIV_VNTAG_ERROR         40
+/*! VNTAG Present Drop */
+#define BCMPKT_RX_REASON_NIV_VNTAG_PRESENT       41
+/*! VNTAG Not Present Drop */
+#define BCMPKT_RX_REASON_NIV_VNTAG_NOT_PRESENT   42
+/*! Copy to CPU for MY_STATION match reason */
+#define BCMPKT_RX_REASON_MY_STATION              44
+/*! MPLS unknown ACH */
+#define BCMPKT_RX_REASON_MPLS_UNKNOWN_ACH_ERROR  45
+/*! ING_L3_NEXT_HOP table copy to CPU */
+#define BCMPKT_RX_REASON_L3_NEXT_HOP             46
+/*! Provider Backbone Transport pkt is not unicast */
+#define BCMPKT_RX_REASON_PBT_NONUC_PKT           47
+/*! Bit32 - MPLS sequence number check fail */
+#define BCMPKT_RX_REASON_MPLS_SEQ_NUM_FAIL       48
+/*! Bit31 - MPLS TTL check fail */
+#define BCMPKT_RX_REASON_MPLS_TTL_CHECK_FAIL     49
+/*! Bit30 - MPLS invalid payload */
+#define BCMPKT_RX_REASON_MPLS_INVALID_PAYLOAD    50
+/*! Bit29 - MPLS invalid label action */
+#define BCMPKT_RX_REASON_MPLS_INVALID_ACTION     51
+/*! Bit28 - MPLS label lookup miss */
+#define BCMPKT_RX_REASON_MPLS_LABEL_MISS         52
+/*! Copy to CPU for MAC to IP bind check failures */
+#define BCMPKT_RX_REASON_MAC_BIND_FAIL           53
+/*! Bit26 - CBSM_PREVENTED - copy to CPU */
+#define BCMPKT_RX_REASON_CBSM_PREVENTED          54
+/*! Bit25 - VFP Action - copy to CPU */
+#define BCMPKT_RX_REASON_CPU_VFP                 55
+/*! Bit24 - Multicast index error */
+#define BCMPKT_RX_REASON_MCIDX_ERROR             56
+/*! Bit23 - HiGig Header error */
+#define BCMPKT_RX_REASON_HGHDR_ERROR             57
+/*! Bit22 - L3 MTU check fail to CPU */
+#define BCMPKT_RX_REASON_L3_MTU_CHECK_FAIL       58
+/*! Bit21 - Parity error on IP tables */
+#define BCMPKT_RX_REASON_PARITY_ERROR            59
+/*! Bit20 - L3 slow path CPU processed packets */
+#define BCMPKT_RX_REASON_L3_SLOWPATH             60
+/*! Bit19 - ICMP Redirect copy to CPU */
+#define BCMPKT_RX_REASON_ICMP_REDIRECT           61
+/*! Bit18 - Flex Sflow */
+#define BCMPKT_RX_REASON_CPU_SFLOW_FLEX          62
+/*! Bit17 - Tunnel error trap to CPU */
+#define BCMPKT_RX_REASON_CPU_TUNNEL_ERR          63
+/*! Bit16 - Martian address trap to CPU */
+#define BCMPKT_RX_REASON_CPU_MARTIAN_ADDR        64
+/*! Bit15 - DOS attack trap to CPU */
+#define BCMPKT_RX_REASON_CPU_DOS_ATTACK          65
+/*! Bit14 - Protocol Packet */
+#define BCMPKT_RX_REASON_CPU_PROTOCOL_PKT        66
+/*! Bit13 - L3 header  - IP options, TTL=0, !IPv4 etc. */
+#define BCMPKT_RX_REASON_CPU_L3HDR_ERR           67
+/*! Bit12 - FFP Action - copy to CPU */
+#define BCMPKT_RX_REASON_CPU_FFP                 68
+/*! Bit11 - IPMC miss - {SIP, DIP} miss or DIP miss */
+#define BCMPKT_RX_REASON_CPU_IPMC_MISS           69
+/*! Bit10 - MC miss */
+#define BCMPKT_RX_REASON_CPU_MC_MISS             70
+/*! Bit9 - Station Movement - L3 */
+#define BCMPKT_RX_REASON_CPU_L3SRC_MOVE          71
+/*! Bit8 - L3 DIP Miss */
+#define BCMPKT_RX_REASON_CPU_L3DST_MISS          72
+/*! Bit7 - L3 SIP Miss */
+#define BCMPKT_RX_REASON_CPU_L3SRC_MISS          73
+/*! Bit6 - sFlow - Dst */
+#define BCMPKT_RX_REASON_CPU_SFLOW_DST           74
+/*! Bit5 - sFlow - Src */
+#define BCMPKT_RX_REASON_CPU_SFLOW_SRC           75
+/*! Bit4 - L2_TABLE - copy to CPU */
+#define BCMPKT_RX_REASON_CPU_L2CPU               76
+/*! Bit3- Station Movement - L2 */
+#define BCMPKT_RX_REASON_CPU_L2MOVE              77
+/*! Bit2 - DLF, */
+#define BCMPKT_RX_REASON_CPU_DLF                 78
+/*! Bit1 - SLF */
+#define BCMPKT_RX_REASON_CPU_SLF                 79
+/*! Bit0- CPU Learn bit is set in PTABLE and SA is learnt; unknown VLAN; VID = 0xfff */
+#define BCMPKT_RX_REASON_CPU_UVLAN               80
+/*! Bit18 - protection data dropped packet copied to CPU */
+#define BCMPKT_RX_REASON_PROTECTION_DATA_DROP    81
+/*! OAM packets copied to the CPU for error cases */
+#define BCMPKT_RX_REASON_OAM_ERROR               82
+/*! Copy to CPU for OAM LMDM */
+#define BCMPKT_RX_REASON_OAM_LMDM                83
+/*! Get: Indicate SFLOW REASON happened; Set: Configure SFLOW REASON mask. */
+#define BCMPKT_RX_REASON_CPU_SFLOW               84
+/*! FP based Sflow */
+#define BCMPKT_RX_REASON_CPU_SFLOW_CPU_SFLOW_FLEX 85
+/*! Egress port-based Sflow */
+#define BCMPKT_RX_REASON_CPU_SFLOW_CPU_SFLOW_DST 86
+/*! Ingress port-based Sflow */
+#define BCMPKT_RX_REASON_CPU_SFLOW_CPU_SFLOW_SRC 87
+/*! Get: Indicate SFLOW REASON happened; Set: Configure SFLOW REASON mask. */
+#define BCMPKT_RX_REASON_MPLS_PROC_ERROR         88
+/*! Invalid payload. */
+#define BCMPKT_RX_REASON_MPLS_PROC_ERROR_INVALID_PAYLOAD 89
+/*! Invalid action. */
+#define BCMPKT_RX_REASON_MPLS_PROC_ERROR_INVALID_ACTION 90
+/*! Lookup label miss. */
+#define BCMPKT_RX_REASON_MPLS_PROC_ERROR_LABEL_MISS 91
+/*! TTL check fail. */
+#define BCMPKT_RX_REASON_MPLS_PROC_ERROR_TTL_CHECK_FAIL 92
+/*! TBD. */
+#define BCMPKT_RX_REASON_MPLS_UNKNOWN_CONTROL_PKT 96
+/*! Copied to CPU by ETRAP monitor. */
+#define BCMPKT_RX_REASON_ETRAP_MONITOR           97
+/*! Copied to CPU by Inband Telemetry turnaround. */
+#define BCMPKT_RX_REASON_INT_TURN_AROUND         98
+/*! Copied to CPU by DLB monitor. */
+#define BCMPKT_RX_REASON_DLB_MONITOR             99
+/*! Bit13 - L3 header  - IP options, TTL=0, !IPv4 etc. */
+#define BCMPKT_RX_REASON_CPU_L3_HDR_MISMATCH     100
+/*! Bit31 - tunnel with object validation check fail */
+#define BCMPKT_RX_REASON_TUNNEL_OBJECT_VALIDATION_FAIL 101
+/*! L3 copy to CPU. */
+#define BCMPKT_RX_REASON_CPU_L3CPU               102
+/*! VNTAG unknown SUBTENDING port */
+#define BCMPKT_RX_REASON_VNTAG_UNKNOWN_SUBTENDING_PORT_ERROR 103
+/*! RPF Lookup Miss */
+#define BCMPKT_RX_REASON_RPF_MISS                104
+/*! Dot1p Admittance Discard */
+#define BCMPKT_RX_REASON_DOT1P_ADMITTANCE_DISCARD 105
+/*!
+ * It should be renamed to TUNNEL_ADAPT_LOOKUP_CPU. Indicates packet was copied
+ * to the CPU due to TUNNEL_ADAPT_LOOKUP's miss policy or hit policy copy to cpu.
+ */
+#define BCMPKT_RX_REASON_TUNNEL_ADAPT_LOOKUP_MISS_DROP 106
+/*! PKT_FLOW_SELECT_MISS_TO_CPU */
+#define BCMPKT_RX_REASON_PKT_FLOW_SELECT_MISS    107
+/*! Indicates packet was copied to the CPU due to PKT_FLOW_SELECT policy. */
+#define BCMPKT_RX_REASON_PKT_FLOW_SELECT         108
+/*!
+ * It should be renamed to TUNNEL_ADAPT_LOOKUP_MISS_TO_CPU_FROM_LOGICAL_TABLE_SEL.
+ * Indicates packet was copied to the CPU due to FORWARDING_LOOKUP miss.
+ */
+#define BCMPKT_RX_REASON_CPU_FORWARDING_OTHER    109
+/*!  */
+#define BCMPKT_RX_REASON_INVALID_TPID            110
+/*!  */
+#define BCMPKT_RX_REASON_MPLS_CONTROL_PKT        111
+/*! TUNNEL_ERR_TO_CPU */
+#define BCMPKT_RX_REASON_TUNNEL_ERR              112
+/*! TUNNEL_TTL_ERR_TO_CPU  Error */
+#define BCMPKT_RX_REASON_TUNNEL_TTL_ERR          113
+/*!  */
+#define BCMPKT_RX_REASON_L3_HDR_ERROR            114
+/*!  */
+#define BCMPKT_RX_REASON_L2_HDR_ERROR            115
+/*!  */
+#define BCMPKT_RX_REASON_TTL1_ERR                116
+/*!  */
+#define BCMPKT_RX_REASON_TTL_ERR                 117
+/*! Nat error packet. */
+#define BCMPKT_RX_REASON_NAT_ERROR               118
+/*! L2 MTU check fail to CPU */
+#define BCMPKT_RX_REASON_L2_MTU_CHECK_FAIL       119
+/*! Over system MAC limit threshold to CPU */
+#define BCMPKT_RX_REASON_L2_MAC_LIMIT            120
+/*! L2 STU check fail to CPU */
+#define BCMPKT_RX_REASON_L2_STU_CHECK_FAIL       121
+/*! SR counter threshold exceeded to CPU. */
+#define BCMPKT_RX_REASON_SR_COUNTER_LIMIT        122
+/*! SRV6_PROC_ERROR */
+#define BCMPKT_RX_REASON_SRV6_ERROR              123
+/*! Protection status = down. */
+#define BCMPKT_RX_REASON_NH_PROTO_STATUS_DOWN    124
+/*! Invalid opcode. */
+#define BCMPKT_RX_REASON_CPU_INVALID_REASON      125
+/*! MPLS TTL Check. */
+#define BCMPKT_RX_REASON_MPLS_TTL_CHECK          126
+/*! Bit Definitions of the CPU Opcodes. */
+#define BCMPKT_RX_REASON_SVTAG_CPU_BIT_SET       127
+/*! Subport ID lookup miss in Channelization. */
+#define BCMPKT_RX_REASON_SUBPORT_ID_LOOKUP_MISS  128
+/*! OAM operation. */
+#define BCMPKT_RX_REASON_OAM_PROCESSING          129
+/*! Invalid. */
+#define BCMPKT_RX_REASON_OAM_PROCESSING_INVALID  130
+/*! OAM CCM. */
+#define BCMPKT_RX_REASON_OAM_PROCESSING_OAM_CCM  131
+/*! OAM LM. */
+#define BCMPKT_RX_REASON_OAM_PROCESSING_OAM_LM   132
+/*! OAM DM. */
+#define BCMPKT_RX_REASON_OAM_PROCESSING_OAM_DM   133
+/*! OAM Other opcodes. */
+#define BCMPKT_RX_REASON_OAM_PROCESSING_OAM_OTHER_OPCODES 134
+/*! Invalid GSH or NON_GSH packet based on port configuration. */
+#define BCMPKT_RX_REASON_INVALID_GSH_NON_GSH     137
+/*! Copy to CPU triggered at egress pipeline. */
+#define BCMPKT_RX_REASON_EP_CTC                  138
+/*! Indicates SVTAG.ERROR !=0 or SVTAG.CPU = 1. */
+#define BCMPKT_RX_REASON_MACSEC                  139
+/*! APU Policy CTC. */
+#define BCMPKT_RX_REASON_APU_POLICY_CTC          140
+/*! BCMPKT_RX_REASON TYPE NUMBER */
+#define BCMPKT_RX_REASON_COUNT                   141
+/*! \} */
+
+/*! RXPMD reason name strings for debugging. */
+#define BCMPKT_REASON_NAME_MAP_INIT \
+    {"NONE", BCMPKT_RX_REASON_NONE},\
+    {"ADAPT_MISS", BCMPKT_RX_REASON_ADAPT_MISS},\
+    {"CPU_IPMC_INTERFACE_MISMATCH", BCMPKT_RX_REASON_CPU_IPMC_INTERFACE_MISMATCH},\
+    {"NAT", BCMPKT_RX_REASON_NAT},\
+    {"NAT_TCP_UDP_MISS", BCMPKT_RX_REASON_NAT_TCP_UDP_MISS},\
+    {"NAT_ICMP_MISS", BCMPKT_RX_REASON_NAT_ICMP_MISS},\
+    {"NAT_FRAGMENT", BCMPKT_RX_REASON_NAT_FRAGMENT},\
+    {"NAT_OTHER_MISS", BCMPKT_RX_REASON_NAT_OTHER_MISS},\
+    {"RESERVED_REASON", 8},\
+    {"RESERVED_REASON", 9},\
+    {"RESERVED_REASON", 10},\
+    {"FCOE_ZONE_CHECK_FAIL", BCMPKT_RX_REASON_FCOE_ZONE_CHECK_FAIL},\
+    {"VXLAN_VN_ID_MISS", BCMPKT_RX_REASON_VXLAN_VN_ID_MISS},\
+    {"VXLAN_SIP_MISS", BCMPKT_RX_REASON_VXLAN_SIP_MISS},\
+    {"QCN_CNM_PRP_DLF", BCMPKT_RX_REASON_QCN_CNM_PRP_DLF},\
+    {"QCN_CNM_PRP", BCMPKT_RX_REASON_QCN_CNM_PRP},\
+    {"MPLS_ALERT_LABEL", BCMPKT_RX_REASON_MPLS_ALERT_LABEL},\
+    {"MPLS_ILLEGAL_RESERVED_LABEL", BCMPKT_RX_REASON_MPLS_ILLEGAL_RESERVED_LABEL},\
+    {"ICNM", BCMPKT_RX_REASON_ICNM},\
+    {"PACKET_TRACE_TO_CPU", BCMPKT_RX_REASON_PACKET_TRACE_TO_CPU},\
+    {"BFD_ERROR", BCMPKT_RX_REASON_BFD_ERROR},\
+    {"BFD_SLOWPATH", BCMPKT_RX_REASON_BFD_SLOWPATH},\
+    {"L2GRE_VPNID_MISS", BCMPKT_RX_REASON_L2GRE_VPNID_MISS},\
+    {"L2GRE_SIP_MISS", BCMPKT_RX_REASON_L2GRE_SIP_MISS},\
+    {"TRILL", BCMPKT_RX_REASON_TRILL},\
+    {"TRILL_HDR_ERROR", BCMPKT_RX_REASON_TRILL_HDR_ERROR},\
+    {"TRILL_LOOKUP_MISS", BCMPKT_RX_REASON_TRILL_LOOKUP_MISS},\
+    {"TRILL_RPF_CHECK_FAIL", BCMPKT_RX_REASON_TRILL_RPF_CHECK_FAIL},\
+    {"TRILL_SLOWPATH", BCMPKT_RX_REASON_TRILL_SLOWPATH},\
+    {"TRILL_CORE_IS_IS_PKT", BCMPKT_RX_REASON_TRILL_CORE_IS_IS_PKT},\
+    {"TRILL_HOP_COUNT_CHECK_FAIL", BCMPKT_RX_REASON_TRILL_HOP_COUNT_CHECK_FAIL},\
+    {"TRILL_NICKNAME_TABLE", BCMPKT_RX_REASON_TRILL_NICKNAME_TABLE},\
+    {"TUNNEL_DECAP_ECN_ERROR", BCMPKT_RX_REASON_TUNNEL_DECAP_ECN_ERROR},\
+    {"OAM_SLOWPATH", BCMPKT_RX_REASON_OAM_SLOWPATH},\
+    {"TIME_SYNC", BCMPKT_RX_REASON_TIME_SYNC},\
+    {"VXLT_MISS", BCMPKT_RX_REASON_VXLT_MISS},\
+    {"NIV", BCMPKT_RX_REASON_NIV},\
+    {"NIV_DOT1P_DROP", BCMPKT_RX_REASON_NIV_DOT1P_DROP},\
+    {"NIV_VIF_MISS", BCMPKT_RX_REASON_NIV_VIF_MISS},\
+    {"NIV_RPF_MISS", BCMPKT_RX_REASON_NIV_RPF_MISS},\
+    {"NIV_VNTAG_ERROR", BCMPKT_RX_REASON_NIV_VNTAG_ERROR},\
+    {"NIV_VNTAG_PRESENT", BCMPKT_RX_REASON_NIV_VNTAG_PRESENT},\
+    {"NIV_VNTAG_NOT_PRESENT", BCMPKT_RX_REASON_NIV_VNTAG_NOT_PRESENT},\
+    {"RESERVED_REASON", 43},\
+    {"MY_STATION", BCMPKT_RX_REASON_MY_STATION},\
+    {"MPLS_UNKNOWN_ACH_ERROR", BCMPKT_RX_REASON_MPLS_UNKNOWN_ACH_ERROR},\
+    {"L3_NEXT_HOP", BCMPKT_RX_REASON_L3_NEXT_HOP},\
+    {"PBT_NONUC_PKT", BCMPKT_RX_REASON_PBT_NONUC_PKT},\
+    {"MPLS_SEQ_NUM_FAIL", BCMPKT_RX_REASON_MPLS_SEQ_NUM_FAIL},\
+    {"MPLS_TTL_CHECK_FAIL", BCMPKT_RX_REASON_MPLS_TTL_CHECK_FAIL},\
+    {"MPLS_INVALID_PAYLOAD", BCMPKT_RX_REASON_MPLS_INVALID_PAYLOAD},\
+    {"MPLS_INVALID_ACTION", BCMPKT_RX_REASON_MPLS_INVALID_ACTION},\
+    {"MPLS_LABEL_MISS", BCMPKT_RX_REASON_MPLS_LABEL_MISS},\
+    {"MAC_BIND_FAIL", BCMPKT_RX_REASON_MAC_BIND_FAIL},\
+    {"CBSM_PREVENTED", BCMPKT_RX_REASON_CBSM_PREVENTED},\
+    {"CPU_VFP", BCMPKT_RX_REASON_CPU_VFP},\
+    {"MCIDX_ERROR", BCMPKT_RX_REASON_MCIDX_ERROR},\
+    {"HGHDR_ERROR", BCMPKT_RX_REASON_HGHDR_ERROR},\
+    {"L3_MTU_CHECK_FAIL", BCMPKT_RX_REASON_L3_MTU_CHECK_FAIL},\
+    {"PARITY_ERROR", BCMPKT_RX_REASON_PARITY_ERROR},\
+    {"L3_SLOWPATH", BCMPKT_RX_REASON_L3_SLOWPATH},\
+    {"ICMP_REDIRECT", BCMPKT_RX_REASON_ICMP_REDIRECT},\
+    {"CPU_SFLOW_FLEX", BCMPKT_RX_REASON_CPU_SFLOW_FLEX},\
+    {"CPU_TUNNEL_ERR", BCMPKT_RX_REASON_CPU_TUNNEL_ERR},\
+    {"CPU_MARTIAN_ADDR", BCMPKT_RX_REASON_CPU_MARTIAN_ADDR},\
+    {"CPU_DOS_ATTACK", BCMPKT_RX_REASON_CPU_DOS_ATTACK},\
+    {"CPU_PROTOCOL_PKT", BCMPKT_RX_REASON_CPU_PROTOCOL_PKT},\
+    {"CPU_L3HDR_ERR", BCMPKT_RX_REASON_CPU_L3HDR_ERR},\
+    {"CPU_FFP", BCMPKT_RX_REASON_CPU_FFP},\
+    {"CPU_IPMC_MISS", BCMPKT_RX_REASON_CPU_IPMC_MISS},\
+    {"CPU_MC_MISS", BCMPKT_RX_REASON_CPU_MC_MISS},\
+    {"CPU_L3SRC_MOVE", BCMPKT_RX_REASON_CPU_L3SRC_MOVE},\
+    {"CPU_L3DST_MISS", BCMPKT_RX_REASON_CPU_L3DST_MISS},\
+    {"CPU_L3SRC_MISS", BCMPKT_RX_REASON_CPU_L3SRC_MISS},\
+    {"CPU_SFLOW_DST", BCMPKT_RX_REASON_CPU_SFLOW_DST},\
+    {"CPU_SFLOW_SRC", BCMPKT_RX_REASON_CPU_SFLOW_SRC},\
+    {"CPU_L2CPU", BCMPKT_RX_REASON_CPU_L2CPU},\
+    {"CPU_L2MOVE", BCMPKT_RX_REASON_CPU_L2MOVE},\
+    {"CPU_DLF", BCMPKT_RX_REASON_CPU_DLF},\
+    {"CPU_SLF", BCMPKT_RX_REASON_CPU_SLF},\
+    {"CPU_UVLAN", BCMPKT_RX_REASON_CPU_UVLAN},\
+    {"PROTECTION_DATA_DROP", BCMPKT_RX_REASON_PROTECTION_DATA_DROP},\
+    {"OAM_ERROR", BCMPKT_RX_REASON_OAM_ERROR},\
+    {"OAM_LMDM", BCMPKT_RX_REASON_OAM_LMDM},\
+    {"CPU_SFLOW", BCMPKT_RX_REASON_CPU_SFLOW},\
+    {"CPU_SFLOW_CPU_SFLOW_FLEX", BCMPKT_RX_REASON_CPU_SFLOW_CPU_SFLOW_FLEX},\
+    {"CPU_SFLOW_CPU_SFLOW_DST", BCMPKT_RX_REASON_CPU_SFLOW_CPU_SFLOW_DST},\
+    {"CPU_SFLOW_CPU_SFLOW_SRC", BCMPKT_RX_REASON_CPU_SFLOW_CPU_SFLOW_SRC},\
+    {"MPLS_PROC_ERROR", BCMPKT_RX_REASON_MPLS_PROC_ERROR},\
+    {"MPLS_PROC_ERROR_INVALID_PAYLOAD", BCMPKT_RX_REASON_MPLS_PROC_ERROR_INVALID_PAYLOAD},\
+    {"MPLS_PROC_ERROR_INVALID_ACTION", BCMPKT_RX_REASON_MPLS_PROC_ERROR_INVALID_ACTION},\
+    {"MPLS_PROC_ERROR_LABEL_MISS", BCMPKT_RX_REASON_MPLS_PROC_ERROR_LABEL_MISS},\
+    {"MPLS_PROC_ERROR_TTL_CHECK_FAIL", BCMPKT_RX_REASON_MPLS_PROC_ERROR_TTL_CHECK_FAIL},\
+    {"RESERVED_REASON", 93},\
+    {"RESERVED_REASON", 94},\
+    {"RESERVED_REASON", 95},\
+    {"MPLS_UNKNOWN_CONTROL_PKT", BCMPKT_RX_REASON_MPLS_UNKNOWN_CONTROL_PKT},\
+    {"ETRAP_MONITOR", BCMPKT_RX_REASON_ETRAP_MONITOR},\
+    {"INT_TURN_AROUND", BCMPKT_RX_REASON_INT_TURN_AROUND},\
+    {"DLB_MONITOR", BCMPKT_RX_REASON_DLB_MONITOR},\
+    {"CPU_L3_HDR_MISMATCH", BCMPKT_RX_REASON_CPU_L3_HDR_MISMATCH},\
+    {"TUNNEL_OBJECT_VALIDATION_FAIL", BCMPKT_RX_REASON_TUNNEL_OBJECT_VALIDATION_FAIL},\
+    {"CPU_L3CPU", BCMPKT_RX_REASON_CPU_L3CPU},\
+    {"VNTAG_UNKNOWN_SUBTENDING_PORT_ERROR", BCMPKT_RX_REASON_VNTAG_UNKNOWN_SUBTENDING_PORT_ERROR},\
+    {"RPF_MISS", BCMPKT_RX_REASON_RPF_MISS},\
+    {"DOT1P_ADMITTANCE_DISCARD", BCMPKT_RX_REASON_DOT1P_ADMITTANCE_DISCARD},\
+    {"TUNNEL_ADAPT_LOOKUP_MISS_DROP", BCMPKT_RX_REASON_TUNNEL_ADAPT_LOOKUP_MISS_DROP},\
+    {"PKT_FLOW_SELECT_MISS", BCMPKT_RX_REASON_PKT_FLOW_SELECT_MISS},\
+    {"PKT_FLOW_SELECT", BCMPKT_RX_REASON_PKT_FLOW_SELECT},\
+    {"CPU_FORWARDING_OTHER", BCMPKT_RX_REASON_CPU_FORWARDING_OTHER},\
+    {"INVALID_TPID", BCMPKT_RX_REASON_INVALID_TPID},\
+    {"MPLS_CONTROL_PKT", BCMPKT_RX_REASON_MPLS_CONTROL_PKT},\
+    {"TUNNEL_ERR", BCMPKT_RX_REASON_TUNNEL_ERR},\
+    {"TUNNEL_TTL_ERR", BCMPKT_RX_REASON_TUNNEL_TTL_ERR},\
+    {"L3_HDR_ERROR", BCMPKT_RX_REASON_L3_HDR_ERROR},\
+    {"L2_HDR_ERROR", BCMPKT_RX_REASON_L2_HDR_ERROR},\
+    {"TTL1_ERR", BCMPKT_RX_REASON_TTL1_ERR},\
+    {"TTL_ERR", BCMPKT_RX_REASON_TTL_ERR},\
+    {"NAT_ERROR", BCMPKT_RX_REASON_NAT_ERROR},\
+    {"L2_MTU_CHECK_FAIL", BCMPKT_RX_REASON_L2_MTU_CHECK_FAIL},\
+    {"L2_MAC_LIMIT", BCMPKT_RX_REASON_L2_MAC_LIMIT},\
+    {"L2_STU_CHECK_FAIL", BCMPKT_RX_REASON_L2_STU_CHECK_FAIL},\
+    {"SR_COUNTER_LIMIT", BCMPKT_RX_REASON_SR_COUNTER_LIMIT},\
+    {"SRV6_ERROR", BCMPKT_RX_REASON_SRV6_ERROR},\
+    {"NH_PROTO_STATUS_DOWN", BCMPKT_RX_REASON_NH_PROTO_STATUS_DOWN},\
+    {"CPU_INVALID_REASON", BCMPKT_RX_REASON_CPU_INVALID_REASON},\
+    {"MPLS_TTL_CHECK", BCMPKT_RX_REASON_MPLS_TTL_CHECK},\
+    {"SVTAG_CPU_BIT_SET", BCMPKT_RX_REASON_SVTAG_CPU_BIT_SET},\
+    {"SUBPORT_ID_LOOKUP_MISS", BCMPKT_RX_REASON_SUBPORT_ID_LOOKUP_MISS},\
+    {"OAM_PROCESSING", BCMPKT_RX_REASON_OAM_PROCESSING},\
+    {"OAM_PROCESSING_INVALID", BCMPKT_RX_REASON_OAM_PROCESSING_INVALID},\
+    {"OAM_PROCESSING_OAM_CCM", BCMPKT_RX_REASON_OAM_PROCESSING_OAM_CCM},\
+    {"OAM_PROCESSING_OAM_LM", BCMPKT_RX_REASON_OAM_PROCESSING_OAM_LM},\
+    {"OAM_PROCESSING_OAM_DM", BCMPKT_RX_REASON_OAM_PROCESSING_OAM_DM},\
+    {"OAM_PROCESSING_OAM_OTHER_OPCODES", BCMPKT_RX_REASON_OAM_PROCESSING_OAM_OTHER_OPCODES},\
+    {"RESERVED_REASON", 135},\
+    {"RESERVED_REASON", 136},\
+    {"INVALID_GSH_NON_GSH", BCMPKT_RX_REASON_INVALID_GSH_NON_GSH},\
+    {"EP_CTC", BCMPKT_RX_REASON_EP_CTC},\
+    {"MACSEC", BCMPKT_RX_REASON_MACSEC},\
+    {"APU_POLICY_CTC", BCMPKT_RX_REASON_APU_POLICY_CTC},\
+    {"reason count", BCMPKT_RX_REASON_COUNT}
+
+#endif /*! BCMPKT_RXPMD_DEFS_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_fid.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_fid.h
new file mode 100644
index 000000000..7c12f3b58
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_fid.h
@@ -0,0 +1,83 @@
+/*! \file bcmpkt_rxpmd_fid.h
+ *
+ * RX Packet Meta Data (RXPMD) field id header file.
+ *
+ */
+/*
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ */
+
+#ifndef BCMPKT_RXPMD_FID_H
+#define BCMPKT_RXPMD_FID_H
+
+#include <shr/shr_bitop.h>
+#include <bcmpkt/bcmpkt_rxpmd_defs.h>
+
+/*! \brief RXPMD field ID supported bit array.
+ * Array of bits indicating whether a RXPMD field ID is supported by a given
+ * device type.
+ */
+typedef struct bcmpkt_rxpmd_fid_support_s {
+    /*! Field ID bitmap container */
+    SHR_BITDCLNAME(fbits, BCMPKT_RXPMD_FID_COUNT);
+} bcmpkt_rxpmd_fid_support_t;
+
+/*!
+ * \name Utility macros for \ref bcmpkt_rxpmd_fid_support_t.
+ * \anchor BCMPKT_RXPMD_SUPPORT_OPS
+ */
+/*! \{ */
+/*!
+ * Macro to get a field ID's supported status.
+ *
+ * \retval zero Not supported
+ * \retval non-zero Supported
+ */
+#define BCMPKT_RXPMD_FID_SUPPORT_GET(_support, _fid) \
+        SHR_BITGET(((_support).fbits), (_fid))
+
+/*!
+ * Iterate over all supported RXPMD field IDs in the \c _support.
+ */
+#define BCMPKT_RXPMD_FID_SUPPORT_ITER(_support, _fid) \
+    for(_fid = 0; _fid < BCMPKT_RXPMD_FID_COUNT; _fid++) \
+        if(BCMPKT_RXPMD_FID_SUPPORT_GET(_support, _fid))
+/*! \} */
+
+
+/*!
+ * \brief Get supported RXPMD field IDs for a given device type.
+ *
+ * This function returns a structure with information about the RXPMD field IDs
+ * a given device type supports.
+ *
+ * Use \ref BCMPKT_RXPMD_FID_SUPPORT_GET on the returned structure to get the
+ * supported status of a specific field ID.
+ *
+ * \param [in] dev_type Device type.
+ * \param [out] support Field ID supported status bitmap.
+ *
+ * \retval SHR_E_NONE success.
+ * \retval SHR_E_PARAM Check parameters failed.
+ * \retval SHR_E_INTERNAL API internal error.
+ */
+extern int
+bcmpkt_rxpmd_fid_support_get(bcmdrd_dev_type_t dev_type,
+                             bcmpkt_rxpmd_fid_support_t *support);
+
+
+
+#endif /* BCMPKT_RXPMD_FID_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_field.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_field.h
new file mode 100644
index 000000000..5c80a3eab
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_field.h
@@ -0,0 +1,80 @@
+/*! \file bcmpkt_rxpmd_field.h
+ *
+ * RX Packet MetaData (RXPMD, called EP_TO_CPU in hardware) field api's.
+ *
+ */
+/*
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ */
+
+#ifndef BCMPKT_RXPMD_FIELD_H
+#define BCMPKT_RXPMD_FIELD_H
+
+
+/*!
+ * \brief Get value from an RXPMD field.
+ *
+ * \param [in] dev_type Device type.
+ * \param [in] rxpmd RXPMD handle.
+ * \param [in] fid RXPMD field ID, refer to \ref BCMPKT_RXPMD_XXX.
+ * \param [out] val Field value.
+ *
+ * \retval SHR_E_NONE success.
+ * \retval SHR_E_PARAM Check parameters failed.
+ * \retval SHR_E_UNAVAIL Not support the field.
+ */
+extern int
+bcmpkt_rxpmd_field_get(bcmdrd_dev_type_t dev_type, uint32_t *rxpmd,
+                       int fid, uint32_t *val);
+
+/*!
+ * \brief Set value into an RXPMD field. (Internally used for filter config.)
+ *
+ * \param [in] dev_type Device type.
+ * \param [in,out] rxpmd RXPMD handle.
+ * \param [in] fid RXPMD field ID, refer to \ref BCMPKT_RXPMD_XXX.
+ * \param [in] val Set value.
+ *
+ * \retval SHR_E_NONE success.
+ * \retval SHR_E_PARAM Check parameters failed.
+ * \retval SHR_E_UNAVAIL Not support the field.
+ */
+extern int
+bcmpkt_rxpmd_field_set(bcmdrd_dev_type_t dev_type, uint32_t *rxpmd,
+                       int fid, uint32_t val);
+
+/*!
+ * \brief Get flex data handle from the RXPMD.
+ *
+ * This function is used for geting flex data handle from the \c rxpmd.
+ *
+ * \param [in] dev_type Device type.
+ * \param [in] rxpmd RXPMD handle.
+ * \param [out] flexdata Flex data handle.
+ * \param [out] len Flex data size in 4-bytes.
+ *
+ * \retval SHR_E_NONE success.
+ * \retval SHR_E_PARAM Check parameters failed.
+ * \retval SHR_E_UNAVAIL Not support flex data.
+ * \retval SHR_E_INTERNAL Internal issue.
+ */
+extern int
+bcmpkt_rxpmd_flexdata_get(bcmdrd_dev_type_t dev_type, uint32_t *rxpmd,
+                          uint32_t **flexdata, uint32_t *len);
+
+
+#endif /* BCMPKT_RXPMD_FIELD_H */
+
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_internal.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_internal.h
new file mode 100644
index 000000000..6c2fb52dd
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_internal.h
@@ -0,0 +1,82 @@
+/*! \file bcmpkt_rxpmd_internal.h
+ *
+ * RX Packet MetaData internal library.
+ *
+ */
+/*
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ */
+
+#ifndef BCMPKT_RXPMD_INTERNAL_H
+#define BCMPKT_RXPMD_INTERNAL_H
+
+#include <shr/shr_types.h>
+#include <bcmpkt/bcmpkt_rxpmd.h>
+#include <bcmpkt/bcmpkt_pmd.h>
+#include <bcmpkt/bcmpkt_pmd_internal.h>
+
+/*!
+ * Array of RXPMD field getter functions for a particular device
+ * type.
+ */
+typedef struct bcmpkt_rxpmd_fget_s {
+    bcmpkt_field_get_f fget[BCMPKT_RXPMD_FID_COUNT];
+} bcmpkt_rxpmd_fget_t;
+
+/*!
+ * Array of RXPMD field setter functions for a particular device
+ * type. These functions are used for internally configuring packet
+ * filter.
+ */
+typedef struct bcmpkt_rxpmd_fset_s {
+    bcmpkt_field_set_f fset[BCMPKT_RXPMD_FID_COUNT];
+} bcmpkt_rxpmd_fset_t;
+
+/*!
+ * Array of RXPMD field address and length getter functions for a multiple
+ * words field of a particular device type. *addr is output address and return
+ * length.
+ */
+typedef struct bcmpkt_rxpmd_figet_s {
+    bcmpkt_ifield_get_f fget[BCMPKT_RXPMD_I_FID_COUNT];
+} bcmpkt_rxpmd_figet_t;
+
+#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \
+    extern void _bd##_rx_reason_decode(const uint32_t* data, bcmpkt_rx_reasons_t* reasons);
+#define BCMDRD_DEVLIST_OVERRIDE
+#include <bcmdrd/bcmdrd_devlist.h>
+
+#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \
+    extern void _bd##_rx_reason_encode(const bcmpkt_rx_reasons_t* reasons, uint32_t* data);
+#define BCMDRD_DEVLIST_OVERRIDE
+#include <bcmdrd/bcmdrd_devlist.h>
+
+#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \
+    extern void _bd##_rxpmd_view_info_get(bcmpkt_pmd_view_info_t *info);
+#define BCMDRD_DEVLIST_OVERRIDE
+#include <bcmdrd/bcmdrd_devlist.h>
+
+#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \
+    extern void _bd##_ep_rx_reason_decode(const uint32_t* data, bcmpkt_rx_reasons_t* reasons);
+#define BCMDRD_DEVLIST_OVERRIDE
+#include <bcmdrd/bcmdrd_devlist.h>
+
+#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \
+    extern void _bd##_ep_rx_reason_encode(const bcmpkt_rx_reasons_t* reasons, uint32_t* data);
+#define BCMDRD_DEVLIST_OVERRIDE
+#include <bcmdrd/bcmdrd_devlist.h>
+
+#endif /* BCMPKT_RXPMD_INTERNAL_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_match_id.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_match_id.h
new file mode 100644
index 000000000..1ffbca4ed
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_match_id.h
@@ -0,0 +1,175 @@
+/*! \file bcmpkt_rxpmd_match_id.h
+ *
+ * RX Packet Meta Data Match ID api's.
+ *
+ */
+/*
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ */
+
+#ifndef BCMPKT_RXPMD_MATCH_ID_H
+#define BCMPKT_RXPMD_MATCH_ID_H
+
+#include <sal/sal_types.h>
+#include <shr/shr_types.h>
+#include <bcmlrd/bcmlrd_local_types.h>
+
+/*!
+ * \brief Does the match id data contain the specified type
+ *
+ * This routine returns the true for false for a given match id using the
+ * provided match id data.
+ *
+ * \param [in]  variant         Variant type.
+ * \param [in]  match_id_array  Match ID data.
+ * \param [in]  array_len       Match ID data length in words.
+ * \param [in]  match_id        Match ID.
+ *
+ * \retval SHR_E_NONE           The match id data contains the specified type
+ * \retval SHR_E_*              The match id data does not contain the specified
+ *                              type or there was an error.
+ *
+ */
+extern int
+bcmpkt_rxpmd_match_id_present(bcmlrd_variant_t variant,
+                              uint32_t *match_id_array,
+                              uint32_t array_len,
+                              uint32_t match_id);
+
+/*!
+ * \brief Does the arc id data contain the specified type
+ *
+ * This routine returns the true for false for a given match id using the
+ * provided arc id data.
+ *
+ * \param [in]  variant         Variant type.
+ * \param [in]  arc_id_array    ARC ID data.
+ * \param [in]  array_len       Match ID data length in words.
+ * \param [in]  match_id        Match ID.
+ *
+ * \retval SHR_E_NONE           The arc id data contains the specified type
+ * \retval SHR_E_*              The arc id data does not contain the specified
+ *                              type or there was an error.
+ *
+ */
+extern int
+bcmpkt_rxpmd_match_id_from_arc_id_present(bcmlrd_variant_t variant,
+                                          uint32_t *arc_id_array,
+                                          uint32_t  array_len,
+                                          uint32_t  match_id);
+
+/*!
+ * \brief Does the match id data contain the specified type
+ *
+ * This routine returns the match id value for the specified variant given the
+ * match id name (string value).
+ *
+ * \param [in]  variant         Variant type.
+ * \param [in]  name            Match ID string name.
+ * \param [out] match_id        Match ID value.
+ *
+ * \retval SHR_E_NONE           The match id value was found for the given name
+ * \retval SHR_E_*              There was an error
+ *
+ */
+extern int
+bcmpkt_rxpmd_match_id_get(bcmlrd_variant_t variant,
+                          char *name,
+                          uint32_t *match_id);
+
+/*!
+ * \brief Information on match ID fields.
+ *
+ * This structure is used to store information for each
+ * match id field.
+ *
+ */
+typedef struct bcmpkt_rxpmd_match_id_db_s {
+    /*! Match ID name. */
+    const char *name;
+
+    /*! Match. */
+    uint32_t match;
+
+    /*! Mask for match. */
+    uint32_t match_mask;
+
+    /*! Maxbit of the match id field in the physical container. */
+    uint8_t match_maxbit;
+
+    /*! Minbit of the match id field in the physical container. */
+    uint8_t match_minbit;
+
+    /*! Maxbit of the match id field. */
+    uint8_t maxbit;
+
+    /*! Minbit of the match id field. */
+    uint8_t minbit;
+
+    /*! Default value for the match id field. */
+    uint32_t value;
+
+    /*! Mask for the default value for the match id field. */
+    uint32_t mask;
+
+    /*! Maxbit of the field within match_id container. */
+    uint8_t pmaxbit;
+
+    /*! Minbit of the field within match_id container. */
+    uint8_t pminbit;
+
+    /*! ARC id zone minbit. */
+    uint8_t zone_minbit;
+
+    /*! ARC id mask. */
+    uint64_t arc_id_mask;
+
+    /*! Number of words used by zone bitmap. */
+    uint8_t num_zone_bmp_words;
+
+    /*! Zone bitmap. */
+    uint32_t *zone_bmp;
+} bcmpkt_rxpmd_match_id_db_t;
+
+/*!
+ * \brief Information on match ID fields.
+ *
+ * This structure is used to store information for the match id data.
+ *
+ */
+typedef struct bcmpkt_rxpmd_match_id_db_info_s {
+    /*! Number of entries in the match ID DB. */
+    uint32_t num_entries;
+
+    /*! Pointer to match ID DB. */
+    const bcmpkt_rxpmd_match_id_db_t *db;
+} bcmpkt_rxpmd_match_id_db_info_t;
+
+/*!
+ * \brief Information for the match ID map.
+ *
+ * This structure is used to store information for the match id map.
+ *
+ */
+typedef struct bcmpkt_rxpmd_match_id_map_info_s {
+    /*! Number of entries in the match ID Map. */
+    uint32_t num_entries;
+
+    /*! Pointer to match ID Map. */
+    const shr_enum_map_t *map;
+} bcmpkt_rxpmd_match_id_map_info_t;
+
+#endif /* BCMPKT_RXPMD_MATCH_ID_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_match_id_defs.h
new file mode 100644
index 000000000..622a5bf4a
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_match_id_defs.h
@@ -0,0 +1,38 @@
+/*! \file bcmpkt_rxpmd_match_id_defs.h
+ *
+ * RX Packet Meta Data Match ID Variant defs.
+ *
+ */
+/*
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ */
+
+#ifndef BCMPKT_RXPMD_MATCH_ID_DEFS_H
+#define BCMPKT_RXPMD_MATCH_ID_DEFS_H
+
+/*! \cond Declare externs. */
+#define BCMLRD_VARIANT_ENTRY(_bd,_bu,_va,_ve,_vu,_vv,_vo,_vd,_r0,_r1)\
+extern bcmpkt_rxpmd_match_id_db_info_t * \
+_bd##_vu##_va##_rxpmd_match_id_db_info_get(void);
+#include <bcmlrd/chip/bcmlrd_chip_variant.h>
+
+#define BCMLRD_VARIANT_ENTRY(_bd,_bu,_va,_ve,_vu,_vv,_vo,_vd,_r0,_r1)\
+extern bcmpkt_rxpmd_match_id_map_info_t * \
+_bd##_vu##_va##_rxpmd_match_id_map_info_get(void);
+#include <bcmlrd/chip/bcmlrd_chip_variant.h>
+/*! \endcond */
+
+#endif /* BCMPKT_RXPMD_MATCH_ID_DEFS_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_txpmd.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_txpmd.h
new file mode 100644
index 000000000..eb42ebc1b
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_txpmd.h
@@ -0,0 +1,157 @@
+/*! \file bcmpkt_txpmd.h
+ *
+ * TX Packet MetaData (TXPMD, called SOBMH in hardware) access interface.
+ *
+ */
+/*
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ */
+
+#ifndef BCMPKT_TXPMD_H
+#define BCMPKT_TXPMD_H
+
+#include <sal/sal_types.h>
+#include <shr/shr_bitop.h>
+#include <bcmpkt/bcmpkt_txpmd_defs.h>
+#include <bcmdrd/bcmdrd_types.h>
+#include <bcmpkt/bcmpkt_txpmd_field.h>
+
+/*! TX Packet MetaData size (bytes). */
+#define BCMPKT_TXPMD_SIZE_BYTES         16
+/*! TX Packet MetaData size (words). */
+#define BCMPKT_TXPMD_SIZE_WORDS         4
+
+/*!
+ * \name TXPMD Dumping flags.
+ * \anchor BCMPKT_TXPMD_DUMP_F_XXX
+ */
+/*! \{ */
+/*!
+ * Dump all fields contents.
+ */
+#define BCMPKT_TXPMD_DUMP_F_ALL         0
+/*!
+ * Dump none zero field content only.
+ */
+#define BCMPKT_TXPMD_DUMP_F_NONE_ZERO   1
+/*! \} */
+
+/*! \brief TXPMD field ID supported bit array.
+ * Array of bits indicating whether a TXPMD field ID is supported by a given
+ * device type.
+ */
+typedef struct bcmpkt_txpmd_fid_support_s {
+    /*! Field ID bitmap container */
+    SHR_BITDCLNAME(fbits, BCMPKT_TXPMD_FID_COUNT);
+} bcmpkt_txpmd_fid_support_t;
+
+/*!
+ * \name Utility macros for \ref bcmpkt_txpmd_fid_support_t.
+ * \anchor BCMPKT_TXPMD_SUPPORT_OPS
+ */
+/*! \{ */
+/*!
+ * Macro to get a field ID's supported status.
+ *
+ * \retval zero Not supported
+ * \retval non-zero Supported
+ */
+#define BCMPKT_TXPMD_FID_SUPPORT_GET(_support, _fid) \
+        SHR_BITGET(((_support).fbits), (_fid))
+
+/*!
+ * Iterate over all supported TXPMD field IDs in the \c _support.
+ */
+#define BCMPKT_TXPMD_FID_SUPPORT_ITER(_support, _fid) \
+    for(_fid = 0; _fid < BCMPKT_TXPMD_FID_COUNT; _fid++) \
+        if(BCMPKT_TXPMD_FID_SUPPORT_GET(_support, _fid))
+/*! \} */
+
+/*!
+ * \brief Get TXPMD's size for a given device type.
+ *
+ * \param [in] dev_type Device type.
+ * \param [out] len Bytes of TXPMD length.
+ *
+ * \retval SHR_E_NONE success.
+ * \retval SHR_E_PARAM Unsupported device type or bad \c len pointer.
+ * \retval SHR_E_UNAVAIL Not support TXPMD get function.
+ */
+extern int
+bcmpkt_txpmd_len_get(bcmdrd_dev_type_t dev_type, uint32_t *len);
+
+/*!
+ * \brief Get field name for a given TXPMD field ID.
+ *
+ * \param [in] fid TXPMD field ID, refer to \ref BCMPKT_TXPMD_XXX.
+ * \param [out] name TXPMD field name string.
+ *
+ * \retval SHR_E_NONE success.
+ * \retval SHR_E_PARAM Check parameters failed.
+ */
+extern int
+bcmpkt_txpmd_field_name_get(int fid, char **name);
+
+/*!
+ * \brief Get field ID for a given TXPMD field name.
+ *
+ * \param [in] name TXPMD name string.
+ * \param [out] fid TXPMD Field ID.
+ *
+ * \retval SHR_E_NONE success.
+ * \retval SHR_E_PARAM Check parameters failed.
+ * \retval SHR_E_NOT_FOUND Not found the name.
+ */
+extern int
+bcmpkt_txpmd_field_id_get(char* name, int *fid);
+
+/*!
+ * \brief Get supported TXPMD field IDs for a given device type.
+ *
+ * This function returns a structure with information about the TXPMD field IDs
+ * a given device type supports.
+ *
+ * Use \ref BCMPKT_TXPMD_FID_SUPPORT_GET on the returned structure to get the
+ * supported status of a specific field ID.
+ *
+ * \param [in] dev_type Device type.
+ * \param [out] support Field ID supported status bitmap.
+ *
+ * \retval SHR_E_NONE success.
+ * \retval SHR_E_PARAM Check parameters failed.
+ * \retval SHR_E_INTERNAL API internal error.
+ */
+extern int
+bcmpkt_txpmd_fid_support_get(bcmdrd_dev_type_t dev_type,
+                             bcmpkt_txpmd_fid_support_t *support);
+
+/*!
+ * \brief Get view info for a given TXPMD field ID for a given device type.
+ *
+ * \param [in] dev_type Device type.
+ * \param [in] fid TXPMD field ID, refer to \ref BCMPKT_TXPMD_XXX.
+ * \param [out] view TXPMD view info. -2 for unsupported, -1 for global,
+ *              others for view's value of \ref BCMPKT_TXPMD_HEADER_TYPE_XXX.
+ *
+ * \retval SHR_E_NONE success.
+ * \retval SHR_E_PARAM Check parameters failed.
+ * \retval SHR_E_INTERNAL API internal error.
+ */
+extern int
+bcmpkt_txpmd_fid_view_get(bcmdrd_dev_type_t dev_type,
+                          int fid, int *view);
+
+#endif /* BCMPKT_TXPMD_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_txpmd_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_txpmd_defs.h
new file mode 100644
index 000000000..6805e23ed
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_txpmd_defs.h
@@ -0,0 +1,546 @@
+#ifndef BCMPKT_TXPMD_DEFS_H
+#define BCMPKT_TXPMD_DEFS_H
+/*******************************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated from the registers file.
+ * Edits to this file will be lost when it is regenerated.
+ * Tool: INTERNAL/regs/xgs/generate-pmd.pl
+ *
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ *
+ * This file provides field macros for the TX Packet MetaData (TXPMD, called
+ * SOBMH in hardware.) access.
+ *
+ ******************************************************************************/
+
+/*!
+ * \name TX packet metadata field IDs.
+ * \anchor BCMPKT_TXPMD_XXX
+ */
+/*! \{ */
+/*! Invalid BCMPKT_TXPMD FID indicator */
+#define BCMPKT_TXPMD_FID_INVALID                 -1
+/*! Start of frame indicator. */
+#define BCMPKT_TXPMD_START                       0
+/*!
+ * 64 Header Types Supported. 1 means Packets from CPU with SOBMH header format
+ * to Passthru NLF
+ */
+#define BCMPKT_TXPMD_HEADER_TYPE                 1
+/*! PKT_LENGTH (set by hardware - in Iarb). */
+#define BCMPKT_TXPMD_PKT_LENGTH                  2
+/*! Pointer to cell buffer of this SOBMH cell. (Set by hardware) */
+#define BCMPKT_TXPMD_IPCF_PTR                    3
+/*! SOP indicator (set by hardware - in Iarb). */
+#define BCMPKT_TXPMD_SOP                         4
+/*! EOP indicator (set by hardware - in Iarb). */
+#define BCMPKT_TXPMD_EOP                         5
+/*! CELL_LENGTH (set by hardware - in Iarb). */
+#define BCMPKT_TXPMD_CELL_LENGTH                 6
+/*! CELL_ERROR or PURGE */
+#define BCMPKT_TXPMD_CELL_ERROR                  7
+/*! Indicates the local port to send a SOBMH packet out. */
+#define BCMPKT_TXPMD_LOCAL_DEST_PORT             8
+/*! Source module ID, must be programmed to MY_MODID. */
+#define BCMPKT_TXPMD_SRC_MODID                   9
+/*!
+ * Class of service for MMU queueing for this packet - sets COS values,
+ * PBI.UC_COS, PBI.MC_COS1, and PBI.MC_COS2.
+ */
+#define BCMPKT_TXPMD_COS                         10
+/*! Traffic priority to be applied to MMU via PBI.INPUT_PRIORITY. */
+#define BCMPKT_TXPMD_INPUT_PRI                   11
+/*! Indicates that PBI.UNICAST should be set to queue as unicast packet. */
+#define BCMPKT_TXPMD_UNICAST                     12
+/*! Value for CCBI.RSQ_Q_NUM. */
+#define BCMPKT_TXPMD_RQE_Q_NUM                   13
+/*! Indicates that PBI.L2_BITMAP should be set (to queue as L2MC packet). */
+#define BCMPKT_TXPMD_SET_L2BM                    14
+/*! ONE STEP TIME STAMPING ENABLE */
+#define BCMPKT_TXPMD_IEEE1588_ONE_STEP_ENABLE    15
+/*! Regenerate UDP Checksum */
+#define BCMPKT_TXPMD_IEEE1588_REGEN_UDP_CHECKSUM 16
+/*! ITS_SIGN bit */
+#define BCMPKT_TXPMD_IEEE1588_INGRESS_TIMESTAMP_SIGN 17
+/*! HDR_OFFSET */
+#define BCMPKT_TXPMD_IEEE1588_TIMESTAMP_HDR_OFFSET 18
+/*!
+ * Indicates for TS packet transmitted from CPU into IP that the outgoing packet
+ * needs to have its transmit timestamp captured by the port.
+ */
+#define BCMPKT_TXPMD_TX_TS                       19
+/*! For PBI.SPID_Override */
+#define BCMPKT_TXPMD_SPID_OVERRIDE               20
+/*! For PBI.SPID - Service Pool ID */
+#define BCMPKT_TXPMD_SPID                        21
+/*! For PBI.SPAP - Service Pool Priority (color) */
+#define BCMPKT_TXPMD_SPAP                        22
+/*! Will set CCBI_B.UNICAST_PKT */
+#define BCMPKT_TXPMD_UNICAST_PKT                 23
+/*! Timestamp action LSB. */
+#define BCMPKT_TXPMD_TS_ACTION_LSB               24
+/*! Timestamp action MSB. */
+#define BCMPKT_TXPMD_TS_ACTION_MSB               25
+/*! Time statmp type.  Encodings are 0-NTP TOD(64 bit), 1-PTP TOD(64bit) */
+#define BCMPKT_TXPMD_TS_TYPE                     26
+/*! Destination subport number */
+#define BCMPKT_TXPMD_DST_SUBPORT_NUM             27
+/*! Enable UDP incremental checksum */
+#define BCMPKT_TXPMD_UDP_CHECKSUM_UPDATE_ENABLE  28
+/*! Offset to UDP checksum field from start of MACS-SA. */
+#define BCMPKT_TXPMD_UDP_CHECKSUM_OFFSET         29
+/*! CNG Field. */
+#define BCMPKT_TXPMD_CNG                         30
+/*! DESTINATION Field. */
+#define BCMPKT_TXPMD_DESTINATION                 31
+/*! Destination Field Type. */
+#define BCMPKT_TXPMD_DESTINATION_TYPE            32
+/*! WRED Mark Eligible field. */
+#define BCMPKT_TXPMD_WRED_MARK_ELIGIBLE          33
+/*! WRED Response Field. */
+#define BCMPKT_TXPMD_WRED_RESPONSE               34
+/*! Allows software to select load balancing bitmap for non-unicast packets. */
+#define BCMPKT_TXPMD_CPU_TX_MCAST_LB_INDEX       35
+/*! ECMP member ID for case where DESTINATION_TYPE=ECMP_MEMBER. Only valid for single level ECMP */
+#define BCMPKT_TXPMD_CPU_TX_ECMP_MEMBER_ID       36
+/*! Destination Field. */
+#define BCMPKT_TXPMD_CPU_TX_DESTINATION          37
+/*! Destination Field Type. */
+#define BCMPKT_TXPMD_CPU_TX_DESTINATION_TYPE     38
+/*! Drop Precedence. */
+#define BCMPKT_TXPMD_CPU_TX_DP                   39
+/*! Traffic priority to be applied to MMU via PBI.INPUT_PRIORITY. */
+#define BCMPKT_TXPMD_CPU_TX_INPUT_PRI            40
+/*! Internal congestion. */
+#define BCMPKT_TXPMD_CPU_TX_INT_CN               41
+/*! Internal priority */
+#define BCMPKT_TXPMD_CPU_TX_INT_PRI              42
+/*! Load balancing bitmap is valid indication. */
+#define BCMPKT_TXPMD_CPU_TX_MCAST_LB_INDEX_VLD   43
+/*! Pointer to CPU_PACKET_PROFILE_1/2 registers. */
+#define BCMPKT_TXPMD_CPU_TX_PKT_PROFILE          44
+/*! QoS fields (INT_PRI, DP, INT_CN) valid indication. */
+#define BCMPKT_TXPMD_CPU_TX_QOS_FIELDS_VLD       45
+/*! If set packet marked as Layer 3 routed. */
+#define BCMPKT_TXPMD_CPU_TX_ROUTED_PKT           46
+/*! Indicates that PBI.UNICAST should be set to queue as unicast packet. */
+#define BCMPKT_TXPMD_CPU_TX_UNICAST              47
+/*! SOP indication. */
+#define BCMPKT_TXPMD_CPU_TX_SOP                  48
+/*! VRF ID. */
+#define BCMPKT_TXPMD_CPU_TX_VRF                  49
+/*! VRF ID is valid. */
+#define BCMPKT_TXPMD_CPU_TX_VRF_VALID            50
+/*! WCMP Selection. */
+#define BCMPKT_TXPMD_CPU_TX_WCMP_SEL             51
+/*! Cell error. */
+#define BCMPKT_TXPMD_OAM_DOWNMEP_TX_CELL_ERROR   52
+/*! Cell length. */
+#define BCMPKT_TXPMD_OAM_DOWNMEP_TX_CELL_LENGTH  53
+/*! Class of service. */
+#define BCMPKT_TXPMD_OAM_DOWNMEP_TX_COS          54
+/*! Destination. */
+#define BCMPKT_TXPMD_OAM_DOWNMEP_TX_DESTINATION  55
+/*! Destination type. */
+#define BCMPKT_TXPMD_OAM_DOWNMEP_TX_DESTINATION_TYPE 56
+/*! EOP indicator. */
+#define BCMPKT_TXPMD_OAM_DOWNMEP_TX_EOP          57
+/*! Input priority. */
+#define BCMPKT_TXPMD_OAM_DOWNMEP_TX_INPUT_PRI    58
+/*! LM counter action. */
+#define BCMPKT_TXPMD_OAM_DOWNMEP_TX_LM_COUNTER_ACTION 59
+/*! LM counter ID. */
+#define BCMPKT_TXPMD_OAM_DOWNMEP_TX_LM_COUNTER_ID 60
+/*! OAM replacement offset. */
+#define BCMPKT_TXPMD_OAM_DOWNMEP_TX_OAM_REPLACEMENT_OFFSET 61
+/*! Packet length. */
+#define BCMPKT_TXPMD_OAM_DOWNMEP_TX_PKT_LENGTH   62
+/*! RQE Queue Number. */
+#define BCMPKT_TXPMD_OAM_DOWNMEP_TX_RQE_Q_NUM    63
+/*! SOP indicator. */
+#define BCMPKT_TXPMD_OAM_DOWNMEP_TX_SOP          64
+/*! Service Pool Allocation Precedence. */
+#define BCMPKT_TXPMD_OAM_DOWNMEP_TX_SPAP         65
+/*! Service Pool ID. */
+#define BCMPKT_TXPMD_OAM_DOWNMEP_TX_SPID         66
+/*! For Service Pool ID override. */
+#define BCMPKT_TXPMD_OAM_DOWNMEP_TX_SPID_OVERRIDE 67
+/*! Source module ID. */
+#define BCMPKT_TXPMD_OAM_DOWNMEP_TX_SRC_MODID    68
+/*! Timestamp action. */
+#define BCMPKT_TXPMD_OAM_DOWNMEP_TX_TIMESTAMP_ACTION 69
+/*! Unicast packet. */
+#define BCMPKT_TXPMD_OAM_DOWNMEP_TX_UNICAST      70
+/*! Indicates a copy should be sent to the the CPU port mapped to R5. */
+#define BCMPKT_TXPMD_COPY_TO_DEBUG               71
+/*! FIXME */
+#define BCMPKT_TXPMD_COPY_TO_CPU                 72
+/*! Used to set PBI.WRED_RESPONSIVE */
+#define BCMPKT_TXPMD_WRED_RESPONSIVE             73
+/*! Cookie correspoding to 1588 2-step */
+#define BCMPKT_TXPMD_CPU_TX_COOKIE               74
+/*! Validates Cookie field */
+#define BCMPKT_TXPMD_CPU_TX_COOKIE_VALID         75
+/*! The 8 LSB bits of Cookie corresponding to 1588 2-Step */
+#define BCMPKT_TXPMD_COOKIE_7_0                  76
+/*! The MSB of Cookie corresponding to 1588 2-Step */
+#define BCMPKT_TXPMD_COOKIE_8                    77
+/*! Unicast Valid. */
+#define BCMPKT_TXPMD_UNICAST_VALID               78
+/*! Indicates the vpp port to send a SOBMH packet out. */
+#define BCMPKT_TXPMD_DST_VPP_PORT_NUM            79
+/*! Indicates for TS packet transmitted from CPU into IP that the outgoing packet needs to have its transmit timestamp captured by the port. */
+#define BCMPKT_TXPMD_IEEE1588_TX_TS              80
+/*! Destination chip port number. */
+#define BCMPKT_TXPMD_DST_CHIP_PORT_NUM           81
+/*! Source chip port number. */
+#define BCMPKT_TXPMD_SRC_CHIP_PORT_NUM           82
+/*! TXPMD FIELD ID NUMBER */
+#define BCMPKT_TXPMD_FID_COUNT                   83
+/*! \} */
+
+/*! TXPMD field name strings for debugging. */
+#define BCMPKT_TXPMD_FIELD_NAME_MAP_INIT \
+    {"START", BCMPKT_TXPMD_START},\
+    {"HEADER_TYPE", BCMPKT_TXPMD_HEADER_TYPE},\
+    {"PKT_LENGTH", BCMPKT_TXPMD_PKT_LENGTH},\
+    {"IPCF_PTR", BCMPKT_TXPMD_IPCF_PTR},\
+    {"SOP", BCMPKT_TXPMD_SOP},\
+    {"EOP", BCMPKT_TXPMD_EOP},\
+    {"CELL_LENGTH", BCMPKT_TXPMD_CELL_LENGTH},\
+    {"CELL_ERROR", BCMPKT_TXPMD_CELL_ERROR},\
+    {"LOCAL_DEST_PORT", BCMPKT_TXPMD_LOCAL_DEST_PORT},\
+    {"SRC_MODID", BCMPKT_TXPMD_SRC_MODID},\
+    {"COS", BCMPKT_TXPMD_COS},\
+    {"INPUT_PRI", BCMPKT_TXPMD_INPUT_PRI},\
+    {"UNICAST", BCMPKT_TXPMD_UNICAST},\
+    {"RQE_Q_NUM", BCMPKT_TXPMD_RQE_Q_NUM},\
+    {"SET_L2BM", BCMPKT_TXPMD_SET_L2BM},\
+    {"IEEE1588_ONE_STEP_ENABLE", BCMPKT_TXPMD_IEEE1588_ONE_STEP_ENABLE},\
+    {"IEEE1588_REGEN_UDP_CHECKSUM", BCMPKT_TXPMD_IEEE1588_REGEN_UDP_CHECKSUM},\
+    {"IEEE1588_INGRESS_TIMESTAMP_SIGN", BCMPKT_TXPMD_IEEE1588_INGRESS_TIMESTAMP_SIGN},\
+    {"IEEE1588_TIMESTAMP_HDR_OFFSET", BCMPKT_TXPMD_IEEE1588_TIMESTAMP_HDR_OFFSET},\
+    {"TX_TS", BCMPKT_TXPMD_TX_TS},\
+    {"SPID_OVERRIDE", BCMPKT_TXPMD_SPID_OVERRIDE},\
+    {"SPID", BCMPKT_TXPMD_SPID},\
+    {"SPAP", BCMPKT_TXPMD_SPAP},\
+    {"UNICAST_PKT", BCMPKT_TXPMD_UNICAST_PKT},\
+    {"TS_ACTION_LSB", BCMPKT_TXPMD_TS_ACTION_LSB},\
+    {"TS_ACTION_MSB", BCMPKT_TXPMD_TS_ACTION_MSB},\
+    {"TS_TYPE", BCMPKT_TXPMD_TS_TYPE},\
+    {"DST_SUBPORT_NUM", BCMPKT_TXPMD_DST_SUBPORT_NUM},\
+    {"UDP_CHECKSUM_UPDATE_ENABLE", BCMPKT_TXPMD_UDP_CHECKSUM_UPDATE_ENABLE},\
+    {"UDP_CHECKSUM_OFFSET", BCMPKT_TXPMD_UDP_CHECKSUM_OFFSET},\
+    {"CNG", BCMPKT_TXPMD_CNG},\
+    {"DESTINATION", BCMPKT_TXPMD_DESTINATION},\
+    {"DESTINATION_TYPE", BCMPKT_TXPMD_DESTINATION_TYPE},\
+    {"WRED_MARK_ELIGIBLE", BCMPKT_TXPMD_WRED_MARK_ELIGIBLE},\
+    {"WRED_RESPONSE", BCMPKT_TXPMD_WRED_RESPONSE},\
+    {"CPU_TX::MCAST_LB_INDEX", BCMPKT_TXPMD_CPU_TX_MCAST_LB_INDEX},\
+    {"CPU_TX::ECMP_MEMBER_ID", BCMPKT_TXPMD_CPU_TX_ECMP_MEMBER_ID},\
+    {"CPU_TX::DESTINATION", BCMPKT_TXPMD_CPU_TX_DESTINATION},\
+    {"CPU_TX::DESTINATION_TYPE", BCMPKT_TXPMD_CPU_TX_DESTINATION_TYPE},\
+    {"CPU_TX::DP", BCMPKT_TXPMD_CPU_TX_DP},\
+    {"CPU_TX::INPUT_PRI", BCMPKT_TXPMD_CPU_TX_INPUT_PRI},\
+    {"CPU_TX::INT_CN", BCMPKT_TXPMD_CPU_TX_INT_CN},\
+    {"CPU_TX::INT_PRI", BCMPKT_TXPMD_CPU_TX_INT_PRI},\
+    {"CPU_TX::MCAST_LB_INDEX_VLD", BCMPKT_TXPMD_CPU_TX_MCAST_LB_INDEX_VLD},\
+    {"CPU_TX::PKT_PROFILE", BCMPKT_TXPMD_CPU_TX_PKT_PROFILE},\
+    {"CPU_TX::QOS_FIELDS_VLD", BCMPKT_TXPMD_CPU_TX_QOS_FIELDS_VLD},\
+    {"CPU_TX::ROUTED_PKT", BCMPKT_TXPMD_CPU_TX_ROUTED_PKT},\
+    {"CPU_TX::UNICAST", BCMPKT_TXPMD_CPU_TX_UNICAST},\
+    {"CPU_TX::SOP", BCMPKT_TXPMD_CPU_TX_SOP},\
+    {"CPU_TX::VRF", BCMPKT_TXPMD_CPU_TX_VRF},\
+    {"CPU_TX::VRF_VALID", BCMPKT_TXPMD_CPU_TX_VRF_VALID},\
+    {"CPU_TX::WCMP_SEL", BCMPKT_TXPMD_CPU_TX_WCMP_SEL},\
+    {"OAM_DOWNMEP_TX::CELL_ERROR", BCMPKT_TXPMD_OAM_DOWNMEP_TX_CELL_ERROR},\
+    {"OAM_DOWNMEP_TX::CELL_LENGTH", BCMPKT_TXPMD_OAM_DOWNMEP_TX_CELL_LENGTH},\
+    {"OAM_DOWNMEP_TX::COS", BCMPKT_TXPMD_OAM_DOWNMEP_TX_COS},\
+    {"OAM_DOWNMEP_TX::DESTINATION", BCMPKT_TXPMD_OAM_DOWNMEP_TX_DESTINATION},\
+    {"OAM_DOWNMEP_TX::DESTINATION_TYPE", BCMPKT_TXPMD_OAM_DOWNMEP_TX_DESTINATION_TYPE},\
+    {"OAM_DOWNMEP_TX::EOP", BCMPKT_TXPMD_OAM_DOWNMEP_TX_EOP},\
+    {"OAM_DOWNMEP_TX::INPUT_PRI", BCMPKT_TXPMD_OAM_DOWNMEP_TX_INPUT_PRI},\
+    {"OAM_DOWNMEP_TX::LM_COUNTER_ACTION", BCMPKT_TXPMD_OAM_DOWNMEP_TX_LM_COUNTER_ACTION},\
+    {"OAM_DOWNMEP_TX::LM_COUNTER_ID", BCMPKT_TXPMD_OAM_DOWNMEP_TX_LM_COUNTER_ID},\
+    {"OAM_DOWNMEP_TX::OAM_REPLACEMENT_OFFSET", BCMPKT_TXPMD_OAM_DOWNMEP_TX_OAM_REPLACEMENT_OFFSET},\
+    {"OAM_DOWNMEP_TX::PKT_LENGTH", BCMPKT_TXPMD_OAM_DOWNMEP_TX_PKT_LENGTH},\
+    {"OAM_DOWNMEP_TX::RQE_Q_NUM", BCMPKT_TXPMD_OAM_DOWNMEP_TX_RQE_Q_NUM},\
+    {"OAM_DOWNMEP_TX::SOP", BCMPKT_TXPMD_OAM_DOWNMEP_TX_SOP},\
+    {"OAM_DOWNMEP_TX::SPAP", BCMPKT_TXPMD_OAM_DOWNMEP_TX_SPAP},\
+    {"OAM_DOWNMEP_TX::SPID", BCMPKT_TXPMD_OAM_DOWNMEP_TX_SPID},\
+    {"OAM_DOWNMEP_TX::SPID_OVERRIDE", BCMPKT_TXPMD_OAM_DOWNMEP_TX_SPID_OVERRIDE},\
+    {"OAM_DOWNMEP_TX::SRC_MODID", BCMPKT_TXPMD_OAM_DOWNMEP_TX_SRC_MODID},\
+    {"OAM_DOWNMEP_TX::TIMESTAMP_ACTION", BCMPKT_TXPMD_OAM_DOWNMEP_TX_TIMESTAMP_ACTION},\
+    {"OAM_DOWNMEP_TX::UNICAST", BCMPKT_TXPMD_OAM_DOWNMEP_TX_UNICAST},\
+    {"COPY_TO_DEBUG", BCMPKT_TXPMD_COPY_TO_DEBUG},\
+    {"COPY_TO_CPU", BCMPKT_TXPMD_COPY_TO_CPU},\
+    {"WRED_RESPONSIVE", BCMPKT_TXPMD_WRED_RESPONSIVE},\
+    {"CPU_TX::COOKIE", BCMPKT_TXPMD_CPU_TX_COOKIE},\
+    {"CPU_TX::COOKIE_VALID", BCMPKT_TXPMD_CPU_TX_COOKIE_VALID},\
+    {"COOKIE_7_0", BCMPKT_TXPMD_COOKIE_7_0},\
+    {"COOKIE_8", BCMPKT_TXPMD_COOKIE_8},\
+    {"UNICAST_VALID", BCMPKT_TXPMD_UNICAST_VALID},\
+    {"DST_VPP_PORT_NUM", BCMPKT_TXPMD_DST_VPP_PORT_NUM},\
+    {"IEEE1588_TX_TS", BCMPKT_TXPMD_IEEE1588_TX_TS},\
+    {"DST_CHIP_PORT_NUM", BCMPKT_TXPMD_DST_CHIP_PORT_NUM},\
+    {"SRC_CHIP_PORT_NUM", BCMPKT_TXPMD_SRC_CHIP_PORT_NUM},\
+    {"fid count", BCMPKT_TXPMD_FID_COUNT}
+
+/*!
+ * \name BCMPKT_TXPMD_START encodings.
+ * \anchor BCMPKT_TXPMD_START_XXX
+ */
+/*! \{ */
+/*! The header used internally only */
+#define BCMPKT_TXPMD_START_INTERNAL_HEADER       2
+/*! Frame type is Higig */
+#define BCMPKT_TXPMD_START_HIGIG                 3
+/*! \} */
+
+/*! BCMPKT_TXPMD_START encoding name strings for debugging. */
+#define BCMPKT_TXPMD_START_NAME_MAP_INIT \
+    {"RESERVED_COUNTER", 0},\
+    {"RESERVED_COUNTER", 1},\
+    {"INTERNAL_HEADER", BCMPKT_TXPMD_START_INTERNAL_HEADER},\
+    {"HIGIG", BCMPKT_TXPMD_START_HIGIG},\
+
+/*!
+ * \name BCMPKT_TXPMD_HEADER_TYPE encodings.
+ * \anchor BCMPKT_TXPMD_HEADER_TYPE_XXX
+ */
+/*! \{ */
+/*! EP Copy to CPU format, SOBMH header in EP to Passthru NLF */
+#define BCMPKT_TXPMD_HEADER_T_TO_CPU             0
+/*! Packets from CPU with SOBMH header format to Passthru NLF */
+#define BCMPKT_TXPMD_HEADER_T_FROM_CPU           1
+/*! Header type CPU_TX */
+#define BCMPKT_TXPMD_HEADER_T_CPU_TX             2
+/*! MAC in MAC packets to Passthru NLF */
+#define BCMPKT_TXPMD_HEADER_T_MIM                2
+/*! MPLS packets to Passthru NLF */
+#define BCMPKT_TXPMD_HEADER_T_MPLS_PMP           3
+/*! Trill Network Packets to Passthru NLF */
+#define BCMPKT_TXPMD_HEADER_T_TRILL_NW           4
+/*! Trill Access Layer Packets to Passthru NLF */
+#define BCMPKT_TXPMD_HEADER_T_TRILL_AC           5
+/*! WLAN Decap packets sent to WRX NLF */
+#define BCMPKT_TXPMD_HEADER_T_WLAN_DECAP         6
+/*! WLAN Encap packets sent to WTX NLF */
+#define BCMPKT_TXPMD_HEADER_T_WLAN_ENCAP         7
+/*! QCN Packets to Passthru NLF */
+#define BCMPKT_TXPMD_HEADER_T_QCN                8
+/*! DPI/Signature Matcher packets sent to SM NLF */
+#define BCMPKT_TXPMD_HEADER_T_SM_DPI             9
+/*! EP Redirection packets to Passthru NLF */
+#define BCMPKT_TXPMD_HEADER_T_EP_REDIR           10
+/*! Other generic passthrough to Passthru NLF */
+#define BCMPKT_TXPMD_HEADER_T_GENERIC            11
+/*! DOWN MEP Transmit OAM Packets from CPU or CCM from HW Engine or OLP */
+#define BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX     12
+/*! UP MEP Transmit OAM Packets from CPU or CCM from HW Engine or OLP */
+#define BCMPKT_TXPMD_HEADER_T_OAM_UPMEP_TX       13
+/*! \} */
+
+/*! BCMPKT_TXPMD_HEADER_TYPE encoding name strings for debugging. */
+#define BCMPKT_TXPMD_HEADER_TYPE_NAME_MAP_INIT \
+    {"SOBMH_EP_COPY_TO_CPU", BCMPKT_TXPMD_HEADER_T_TO_CPU},\
+    {"SOBMH_FROM_CPU", BCMPKT_TXPMD_HEADER_T_FROM_CPU},\
+    {"CPU_TX", BCMPKT_TXPMD_HEADER_T_CPU_TX},\
+    {"MIM", BCMPKT_TXPMD_HEADER_T_MIM},\
+    {"MPLS_PMP", BCMPKT_TXPMD_HEADER_T_MPLS_PMP},\
+    {"TRILL_NW", BCMPKT_TXPMD_HEADER_T_TRILL_NW},\
+    {"TRILL_AC", BCMPKT_TXPMD_HEADER_T_TRILL_AC},\
+    {"WLAN_DECAP", BCMPKT_TXPMD_HEADER_T_WLAN_DECAP},\
+    {"WLAN_ENCAP", BCMPKT_TXPMD_HEADER_T_WLAN_ENCAP},\
+    {"QCN", BCMPKT_TXPMD_HEADER_T_QCN},\
+    {"SM_DPI", BCMPKT_TXPMD_HEADER_T_SM_DPI},\
+    {"EP_REDIR", BCMPKT_TXPMD_HEADER_T_EP_REDIR},\
+    {"GENERIC", BCMPKT_TXPMD_HEADER_T_GENERIC},\
+    {"OAM_DOWNMEP_TX", BCMPKT_TXPMD_HEADER_T_OAM_DOWNMEP_TX},\
+    {"OAM_UPMEP_TX", BCMPKT_TXPMD_HEADER_T_OAM_UPMEP_TX},\
+
+/*!
+ * \name BCMPKT_TXPMD_DESTINATION_TYPE encodings.
+ * \anchor BCMPKT_TXPMD_DESTINATION_TYPE_XXX
+ */
+/*! \{ */
+/*! Egress Port */
+#define BCMPKT_TXPMD_DESTINATION_T_EGRESS_PORT   0
+/*! Asserts bit selected by destination field in L2_PBM */
+#define BCMPKT_TXPMD_DESTINATION_T_L2_PBM        7
+/*! Destination is Invalid */
+#define BCMPKT_TXPMD_DESTINATION_T_INVALID       15
+/*! \} */
+
+/*! BCMPKT_TXPMD_DESTINATION_TYPE encoding name strings for debugging. */
+#define BCMPKT_TXPMD_DESTINATION_TYPE_NAME_MAP_INIT \
+    {"EGRESS_PORT", BCMPKT_TXPMD_DESTINATION_T_EGRESS_PORT},\
+    {"RESERVED_COUNTER", 1},\
+    {"RESERVED_COUNTER", 2},\
+    {"RESERVED_COUNTER", 3},\
+    {"RESERVED_COUNTER", 4},\
+    {"RESERVED_COUNTER", 5},\
+    {"RESERVED_COUNTER", 6},\
+    {"L2_PBM", BCMPKT_TXPMD_DESTINATION_T_L2_PBM},\
+    {"RESERVED_COUNTER", 8},\
+    {"RESERVED_COUNTER", 9},\
+    {"RESERVED_COUNTER", 10},\
+    {"RESERVED_COUNTER", 11},\
+    {"RESERVED_COUNTER", 12},\
+    {"RESERVED_COUNTER", 13},\
+    {"RESERVED_COUNTER", 14},\
+    {"INVALID", BCMPKT_TXPMD_DESTINATION_T_INVALID},\
+
+/*!
+ * \name BCMPKT_TXPMD_CPU_TX_DESTINATION_TYPE encodings.
+ * \anchor BCMPKT_TXPMD_CPU_TX_DESTINATION_TYPE_XXX
+ */
+/*! \{ */
+/*! Egress Port */
+#define BCMPKT_TXPMD_CPU_TX_DESTINATION_T_EGRESS_PORT 0
+/*! Next Hop Index */
+#define BCMPKT_TXPMD_CPU_TX_DESTINATION_T_NHI    1
+/*! ECMP Group */
+#define BCMPKT_TXPMD_CPU_TX_DESTINATION_T_ECMP   2
+/*! ECMP member id */
+#define BCMPKT_TXPMD_CPU_TX_DESTINATION_T_ECMP_MEMBER 3
+/*! IP Multicast Group */
+#define BCMPKT_TXPMD_CPU_TX_DESTINATION_T_IPMC   4
+/*! L2MC group */
+#define BCMPKT_TXPMD_CPU_TX_DESTINATION_T_L2MC   5
+/*! Vlan Flooding */
+#define BCMPKT_TXPMD_CPU_TX_DESTINATION_T_VLAN_FLOOD 6
+/*! Asserts bit selected by destination field in L2_PBM */
+#define BCMPKT_TXPMD_CPU_TX_DESTINATION_T_L2_PBM 7
+/*! LAG ID */
+#define BCMPKT_TXPMD_CPU_TX_DESTINATION_T_LAG_ID 8
+/*! Forward and derive destination normally */
+#define BCMPKT_TXPMD_CPU_TX_DESTINATION_T_FORWARD 15
+/*! Destination is Invalid */
+#define BCMPKT_TXPMD_CPU_TX_DESTINATION_T_INVALID 15
+/*! \} */
+
+/*! BCMPKT_TXPMD_CPU_TX_DESTINATION_TYPE encoding name strings for debugging. */
+#define BCMPKT_TXPMD_CPU_TX_DESTINATION_TYPE_NAME_MAP_INIT \
+    {"EGRESS_PORT", BCMPKT_TXPMD_CPU_TX_DESTINATION_T_EGRESS_PORT},\
+    {"NHI", BCMPKT_TXPMD_CPU_TX_DESTINATION_T_NHI},\
+    {"ECMP", BCMPKT_TXPMD_CPU_TX_DESTINATION_T_ECMP},\
+    {"ECMP_MEMBER", BCMPKT_TXPMD_CPU_TX_DESTINATION_T_ECMP_MEMBER},\
+    {"IPMC", BCMPKT_TXPMD_CPU_TX_DESTINATION_T_IPMC},\
+    {"L2MC", BCMPKT_TXPMD_CPU_TX_DESTINATION_T_L2MC},\
+    {"VLAN_FLOOD", BCMPKT_TXPMD_CPU_TX_DESTINATION_T_VLAN_FLOOD},\
+    {"L2_PBM", BCMPKT_TXPMD_CPU_TX_DESTINATION_T_L2_PBM},\
+    {"LAG_ID", BCMPKT_TXPMD_CPU_TX_DESTINATION_T_LAG_ID},\
+    {"RESERVED_COUNTER", 9},\
+    {"RESERVED_COUNTER", 10},\
+    {"RESERVED_COUNTER", 11},\
+    {"RESERVED_COUNTER", 12},\
+    {"RESERVED_COUNTER", 13},\
+    {"RESERVED_COUNTER", 14},\
+    {"FORWARD", BCMPKT_TXPMD_CPU_TX_DESTINATION_T_FORWARD},\
+    {"INVALID", BCMPKT_TXPMD_CPU_TX_DESTINATION_T_INVALID},\
+
+/*!
+ * \name BCMPKT_TXPMD_CPU_TX_DP encodings.
+ * \anchor BCMPKT_TXPMD_CPU_TX_DP_XXX
+ */
+/*! \{ */
+/*! Green */
+#define BCMPKT_TXPMD_CPU_TX_DP_GREEN             0
+/*! Red */
+#define BCMPKT_TXPMD_CPU_TX_DP_RED               1
+/*! Yellow */
+#define BCMPKT_TXPMD_CPU_TX_DP_YELLOW            3
+/*! \} */
+
+/*! BCMPKT_TXPMD_CPU_TX_DP encoding name strings for debugging. */
+#define BCMPKT_TXPMD_CPU_TX_DP_NAME_MAP_INIT \
+    {"GREEN", BCMPKT_TXPMD_CPU_TX_DP_GREEN},\
+    {"RED", BCMPKT_TXPMD_CPU_TX_DP_RED},\
+    {"RESERVED_COUNTER", 2},\
+    {"YELLOW", BCMPKT_TXPMD_CPU_TX_DP_YELLOW},\
+
+/*!
+ * \name BCMPKT_TXPMD_OAM_DOWNMEP_TX_DESTINATION_TYPE encodings.
+ * \anchor BCMPKT_TXPMD_OAM_DOWNMEP_TX_DESTINATION_TYPE_XXX
+ */
+/*! \{ */
+/*! Egress Port */
+#define BCMPKT_TXPMD_OAM_DOWNMEP_TX_DESTINATION_T_EGRESS_PORT 0
+/*! \} */
+
+/*! BCMPKT_TXPMD_OAM_DOWNMEP_TX_DESTINATION_TYPE encoding name strings for debugging. */
+#define BCMPKT_TXPMD_OAM_DOWNMEP_TX_DESTINATION_TYPE_NAME_MAP_INIT \
+    {"EGRESS_PORT", BCMPKT_TXPMD_OAM_DOWNMEP_TX_DESTINATION_T_EGRESS_PORT},\
+
+/*!
+ * \name BCMPKT_TXPMD_OAM_DOWNMEP_TX_LM_COUNTER_ACTION encodings.
+ * \anchor BCMPKT_TXPMD_OAM_DOWNMEP_TX_LM_COUNTER_ACTION_XXX
+ */
+/*! \{ */
+/*! No operation. */
+#define BCMPKT_TXPMD_OAM_DOWNMEP_TX_LM_COUNTER_ACTION_NO_OP 0
+/*! Increment. */
+#define BCMPKT_TXPMD_OAM_DOWNMEP_TX_LM_COUNTER_ACTION_INCREMENT 1
+/*! Increment and sample. */
+#define BCMPKT_TXPMD_OAM_DOWNMEP_TX_LM_COUNTER_ACTION_INCREMENT_SAMPLE 2
+/*! Sample. */
+#define BCMPKT_TXPMD_OAM_DOWNMEP_TX_LM_COUNTER_ACTION_SAMPLE 3
+/*! \} */
+
+/*! BCMPKT_TXPMD_OAM_DOWNMEP_TX_LM_COUNTER_ACTION encoding name strings for debugging. */
+#define BCMPKT_TXPMD_OAM_DOWNMEP_TX_LM_COUNTER_ACTION_NAME_MAP_INIT \
+    {"NO_OP", BCMPKT_TXPMD_OAM_DOWNMEP_TX_LM_COUNTER_ACTION_NO_OP},\
+    {"INCREMENT", BCMPKT_TXPMD_OAM_DOWNMEP_TX_LM_COUNTER_ACTION_INCREMENT},\
+    {"INCREMENT_SAMPLE", BCMPKT_TXPMD_OAM_DOWNMEP_TX_LM_COUNTER_ACTION_INCREMENT_SAMPLE},\
+    {"SAMPLE", BCMPKT_TXPMD_OAM_DOWNMEP_TX_LM_COUNTER_ACTION_SAMPLE},\
+
+/*!
+ * \name BCMPKT_TXPMD_OAM_DOWNMEP_TX_TIMESTAMP_ACTION encodings.
+ * \anchor BCMPKT_TXPMD_OAM_DOWNMEP_TX_TIMESTAMP_ACTION_XXX
+ */
+/*! \{ */
+/*! No operation. */
+#define BCMPKT_TXPMD_OAM_DOWNMEP_TX_TIMESTAMP_ACTION_NO_OP 0
+/*! Sample timestamp. */
+#define BCMPKT_TXPMD_OAM_DOWNMEP_TX_TIMESTAMP_ACTION_SAMPLE 1
+/*! \} */
+
+/*! BCMPKT_TXPMD_OAM_DOWNMEP_TX_TIMESTAMP_ACTION encoding name strings for debugging. */
+#define BCMPKT_TXPMD_OAM_DOWNMEP_TX_TIMESTAMP_ACTION_NAME_MAP_INIT \
+    {"NO_OP", BCMPKT_TXPMD_OAM_DOWNMEP_TX_TIMESTAMP_ACTION_NO_OP},\
+    {"SAMPLE", BCMPKT_TXPMD_OAM_DOWNMEP_TX_TIMESTAMP_ACTION_SAMPLE},\
+
+/*!
+ * \name TX packet metadata internal usage field IDs.
+ * \anchor BCMPKT_TXPMD_I_XXX
+ */
+/*! \{ */
+/*! Invalid BCMPKT_TXPMD_I FID indicator */
+#define BCMPKT_TXPMD_I_FID_INVALID               -1
+/*! TXPMD RX raw data size. */
+#define BCMPKT_TXPMD_I_SIZE                      0
+/*! TXPMD_I FIELD ID NUMBER */
+#define BCMPKT_TXPMD_I_FID_COUNT                 1
+/*! \} */
+
+/*! TXPMD_I field name strings for debugging. */
+#define BCMPKT_TXPMD_I_FIELD_NAME_MAP_INIT \
+    {"SIZE", BCMPKT_TXPMD_I_SIZE},\
+    {"fid count", BCMPKT_TXPMD_I_FID_COUNT}
+
+#endif /*! BCMPKT_TXPMD_DEFS_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_txpmd_field.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_txpmd_field.h
new file mode 100644
index 000000000..fd97efbed
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_txpmd_field.h
@@ -0,0 +1,59 @@
+/*! \file bcmpkt_txpmd_field.h
+ *
+ * TX Packet MetaData (TXPMD, called SOBMH in hardware) field api's.
+ *
+ */
+/*
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ */
+
+#ifndef BCMPKT_TXPMD_FIELD_H
+#define BCMPKT_TXPMD_FIELD_H
+
+/*!
+ * \brief Get value from a TXPMD field.
+ *
+ * \param [in] dev_type Device type.
+ * \param [in] txpmd TXPMD handle.
+ * \param [in] fid TXPMD field ID, refer to \ref BCMPKT_TXPMD_XXX.
+ * \param [out] val Field value.
+ *
+ * \retval SHR_E_NONE success.
+ * \retval SHR_E_PARAM Check parameters failed.
+ * \retval SHR_E_UNAVAIL Not support the field.
+ */
+extern int
+bcmpkt_txpmd_field_get(bcmdrd_dev_type_t dev_type, uint32_t *txpmd,
+                       int fid, uint32_t *val);
+
+/*!
+ * \brief Set value into a TXPMD field.
+ *
+ * \param [in] dev_type Device type.
+ * \param [in,out] txpmd TXPMD handle.
+ * \param [in] fid TXPMD field ID, refer to \ref BCMPKT_TXPMD_XXX.
+ * \param [in] val Set value.
+ *
+ * \retval SHR_E_NONE success.
+ * \retval SHR_E_PARAM Check parameters failed.
+ * \retval SHR_E_UNAVAIL Not support the field.
+ */
+extern int
+bcmpkt_txpmd_field_set(bcmdrd_dev_type_t dev_type, uint32_t *txpmd,
+                       int fid, uint32_t val);
+
+#endif /* BCMPKT_TXPMD_FIELD_H */
+
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_txpmd_internal.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_txpmd_internal.h
new file mode 100644
index 000000000..a4fc1eb0f
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_txpmd_internal.h
@@ -0,0 +1,62 @@
+/*! \file bcmpkt_txpmd_internal.h
+ *
+ * TX Packet MetaData (TXPMD, called SOBMH in hardware) access interface
+ * (Internal use only).
+ *
+ */
+/*
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ */
+
+#ifndef BCMPKT_TXPMD_INTERNAL_H
+#define BCMPKT_TXPMD_INTERNAL_H
+
+#include <shr/shr_types.h>
+#include <bcmpkt/bcmpkt_txpmd_defs.h>
+#include <bcmpkt/bcmpkt_pmd_internal.h>
+
+/*!
+ * Array of TXPMD field getter functions for a particular device
+ * type.
+ */
+typedef struct bcmpkt_txpmd_fget_s {
+    bcmpkt_field_get_f fget[BCMPKT_TXPMD_FID_COUNT];
+} bcmpkt_txpmd_fget_t;
+
+/*!
+ * Array of TXPMD field setter functions for a particular device
+ * type. These functions are used for internally configuring packet
+ * filter.
+ */
+typedef struct bcmpkt_txpmd_fset_s {
+    bcmpkt_field_set_f fset[BCMPKT_TXPMD_FID_COUNT];
+} bcmpkt_txpmd_fset_t;
+
+/*!
+ * Array of TXPMD field address and length getter functions for a multiple
+ * words field of a particular device type. *addr is output address and return
+ * length.
+ */
+typedef struct bcmpkt_txpmd_figet_s {
+    bcmpkt_ifield_get_f fget[BCMPKT_TXPMD_I_FID_COUNT];
+} bcmpkt_txpmd_figet_t;
+
+#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \
+    extern void _bd##_txpmd_view_info_get(bcmpkt_pmd_view_info_t *info);
+#define BCMDRD_DEVLIST_OVERRIDE
+#include <bcmdrd/bcmdrd_devlist.h>
+
+#endif /* BCMPKT_TXPMD_INTERNAL_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_util.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_util.h
new file mode 100644
index 000000000..0398392e6
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_util.h
@@ -0,0 +1,54 @@
+/*! \file bcmpkt_util.h
+ *
+ * BCMPKT utility functions.
+ *
+ */
+/*
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ */
+
+#ifndef BCMPKT_UTIL_H
+#define BCMPKT_UTIL_H
+
+#include <bcmdrd/bcmdrd_types.h>
+#include <bcmlrd/bcmlrd_local_types.h>
+
+/*!
+ * \brief Get device dispatch type based on device name.
+ *
+ * Device name is case-insensitive.
+ *
+ * \param [in] dev_name Device name, e.g. "bcm56000_a0".
+ *
+ * \return Device dispatch type or BCMDRD_DEV_T_NONE if not found.
+ */
+extern bcmdrd_dev_type_t
+bcmpkt_util_dev_type_get(const char *dev_name);
+
+/*!
+ * \brief Get variant dispatch type based on device and variant names.
+ *
+ * Device and variant names are case-insensitive.
+ *
+ * \param [in] dev_name Device name, e.g. "bcm56000_a0".
+ * \param [in] var_name Variant name, e.g. "utltm".
+ *
+ * \return Variant dispatch type or BCMLRD_VARIANT_T_NONE if not found.
+ */
+extern bcmlrd_variant_t
+bcmpkt_util_variant_type_get(const char *dev_name, const char *var_name);
+
+#endif /* BCMPKT_UTIL_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56690_a0/bcmpkt_bcm56690_a0_rxpmd.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56690_a0/bcmpkt_bcm56690_a0_rxpmd.h
new file mode 100644
index 000000000..1d772c94d
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56690_a0/bcmpkt_bcm56690_a0_rxpmd.h
@@ -0,0 +1,60 @@
+/*! \file bcmpkt_bcm56690_a0_rxpmd.h
+ *
+ * RX Packet Meta Data (RXPMD, called EP_TO_CPU in hardware) access interfaces.
+ *
+ */
+/*
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ */
+
+#ifndef BCMPKT_BCM56690_A0_RXPMD_H
+#define BCMPKT_BCM56690_A0_RXPMD_H
+
+#include <bcmpkt/bcmpkt_flexhdr.h>
+
+/*!
+ * \brief Get flex field value from packet header data stream.
+ *
+ * \param [in] data Packet header data stream.
+ * \param [in] fld_info Information of field within data stream.
+ * \param [in] profile Profile
+ * \param [out] val Field value.
+ *
+ * \retval SHR_E_NONE success.
+ */
+extern int
+bcm56690_a0_rxpmd_flex_fget(uint32_t *data,
+                            bcmpkt_flex_field_metadata_t *fld_info,
+                            int profile,
+                            uint32_t *val);
+
+/*!
+ * \brief Set flex field value from packet header data stream.
+ *
+ * \param [in] data Packet header data stream.
+ * \param [in] fld_info Information of field within data stream.
+ * \param [in] profile Profile
+ * \param [in] val Field value.
+ *
+ * \retval SHR_E_NONE success.
+ */
+extern int
+bcm56690_a0_rxpmd_flex_fset(uint32_t *data,
+                            bcmpkt_flex_field_metadata_t *fld_info,
+                            int profile,
+                            uint32_t val);
+
+#endif /* BCMPKT_BCM56690_A0_RXPMD_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56780_a0/bcmpkt_bcm56780_a0_rxpmd.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56780_a0/bcmpkt_bcm56780_a0_rxpmd.h
new file mode 100644
index 000000000..56f782c4e
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56780_a0/bcmpkt_bcm56780_a0_rxpmd.h
@@ -0,0 +1,60 @@
+/*! \file bcmpkt_bcm56780_a0_rxpmd.h
+ *
+ * RX Packet Meta Data (RXPMD, called EP_TO_CPU in hardware) access interfaces.
+ *
+ */
+/*
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ */
+
+#ifndef BCMPKT_BCM56780_A0_RXPMD_H
+#define BCMPKT_BCM56780_A0_RXPMD_H
+
+#include <bcmpkt/bcmpkt_flexhdr.h>
+
+/*!
+ * \brief Get flex field value from packet header data stream.
+ *
+ * \param [in] data Packet header data stream.
+ * \param [in] fld_info Information of field within data stream.
+ * \param [in] profile Profile
+ * \param [out] val Field value.
+ *
+ * \retval SHR_E_NONE success.
+ */
+extern int
+bcm56780_a0_rxpmd_flex_fget(uint32_t *data,
+                            bcmpkt_flex_field_metadata_t *fld_info,
+                            int profile,
+                            uint32_t *val);
+
+/*!
+ * \brief Set flex field value from packet header data stream.
+ *
+ * \param [in] data Packet header data stream.
+ * \param [in] fld_info Information of field within data stream.
+ * \param [in] profile Profile
+ * \param [in] val Field value.
+ *
+ * \retval SHR_E_NONE success.
+ */
+extern int
+bcm56780_a0_rxpmd_flex_fset(uint32_t *data,
+                            bcmpkt_flex_field_metadata_t *fld_info,
+                            int profile,
+                            uint32_t val);
+
+#endif /* BCMPKT_BCM56780_A0_RXPMD_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56880_a0/bcmpkt_bcm56880_a0_rxpmd.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56880_a0/bcmpkt_bcm56880_a0_rxpmd.h
new file mode 100644
index 000000000..81e440b12
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56880_a0/bcmpkt_bcm56880_a0_rxpmd.h
@@ -0,0 +1,60 @@
+/*! \file bcmpkt_bcm56880_a0_rxpmd.h
+ *
+ * RX Packet Meta Data (RXPMD, called EP_TO_CPU in hardware) access interfaces.
+ *
+ */
+/*
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ */
+
+#ifndef BCMPKT_BCM56880_A0_RXPMD_H
+#define BCMPKT_BCM56880_A0_RXPMD_H
+
+#include <bcmpkt/bcmpkt_flexhdr.h>
+
+/*!
+ * \brief Get flex field value from packet header data stream.
+ *
+ * \param [in] data Packet header data stream.
+ * \param [in] fld_info Information of field within data stream.
+ * \param [in] profile Profile
+ * \param [out] val Field value.
+ *
+ * \retval SHR_E_NONE success.
+ */
+extern int
+bcm56880_a0_rxpmd_flex_fget(uint32_t *data,
+                            bcmpkt_flex_field_metadata_t *fld_info,
+                            int profile,
+                            uint32_t *val);
+
+/*!
+ * \brief Set flex field value from packet header data stream.
+ *
+ * \param [in] data Packet header data stream.
+ * \param [in] fld_info Information of field within data stream.
+ * \param [in] profile Profile
+ * \param [in] val Field value.
+ *
+ * \retval SHR_E_NONE success.
+ */
+extern int
+bcm56880_a0_rxpmd_flex_fset(uint32_t *data,
+                            bcmpkt_flex_field_metadata_t *fld_info,
+                            int profile,
+                            uint32_t val);
+
+#endif /* BCMPKT_BCM56880_A0_RXPMD_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56890_a0/bcmpkt_bcm56890_a0_rxpmd.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56890_a0/bcmpkt_bcm56890_a0_rxpmd.h
new file mode 100644
index 000000000..699c745d7
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56890_a0/bcmpkt_bcm56890_a0_rxpmd.h
@@ -0,0 +1,60 @@
+/*! \file bcmpkt_bcm56890_a0_rxpmd.h
+ *
+ * RX Packet Meta Data (RXPMD, called EP_TO_CPU in hardware) access interfaces.
+ *
+ */
+/*
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ */
+
+#ifndef BCMPKT_BCM56890_A0_RXPMD_H
+#define BCMPKT_BCM56890_A0_RXPMD_H
+
+#include <bcmpkt/bcmpkt_flexhdr.h>
+
+/*!
+ * \brief Get flex field value from packet header data stream.
+ *
+ * \param [in] data Packet header data stream.
+ * \param [in] fld_info Information of field within data stream.
+ * \param [in] profile Profile
+ * \param [out] val Field value.
+ *
+ * \retval SHR_E_NONE success.
+ */
+extern int
+bcm56890_a0_rxpmd_flex_fget(uint32_t *data,
+                            bcmpkt_flex_field_metadata_t *fld_info,
+                            int profile,
+                            uint32_t *val);
+
+/*!
+ * \brief Set flex field value from packet header data stream.
+ *
+ * \param [in] data Packet header data stream.
+ * \param [in] fld_info Information of field within data stream.
+ * \param [in] profile Profile
+ * \param [in] val Field value.
+ *
+ * \retval SHR_E_NONE success.
+ */
+extern int
+bcm56890_a0_rxpmd_flex_fset(uint32_t *data,
+                            bcmpkt_flex_field_metadata_t *fld_info,
+                            int profile,
+                            uint32_t val);
+
+#endif /* BCMPKT_BCM56890_A0_RXPMD_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_bcmpkt_flexhdr.h
new file mode 100644
index 000000000..ed8343222
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_bcmpkt_flexhdr.h
@@ -0,0 +1,182 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) header.yml.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FLEXHDR_H
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FLEXHDR_H
+
+#include <bcmpkt/bcmpkt_flexhdr_internal.h>
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T                      0
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_AUTHEN_T                   1
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T                      2
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CNTAG_T                    3
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_0_T         4
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T         5
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_DEST_OPTION_T              6
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T            7
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T        8
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_SUBHDR_5_T         9
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ESP_T                      10
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ETHERTYPE_T                11
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FRAG_T                     12
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GBP_ETHERNET_SHIM_T        13
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T         14
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GPE_T                      15
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_CHKSUM_T               16
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_KEY_T                  17
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_ROUT_T                 18
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_SEQ_T                  19
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_T                      20
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T                 21
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_EXTENSION_0_T          22
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HOP_BY_HOP_T               23
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ICMP_T                     24
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_A_T          25
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_B_T          26
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_1_T            27
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_2_T            28
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_3_T            29
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_HEADER_T               30
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_MD_BASE_T              31
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_METADATA_T             32
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IGMP_T                     33
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IOAM_E2E_T                 34
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPFIX_T                    35
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T                     36
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV6_T                     37
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_L2_T                       38
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MIRROR_ERSPAN_SN_T         39
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MIRROR_TRANSPORT_T         40
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_ACH_T                 41
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_BV_T                  42
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_CW_T                  43
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_T                     44
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T                   45
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PROG_EXT_HDR_T             46
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_0_T                  47
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_1_T                  48
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T   49
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T   50
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T                     51
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ROUTING_T                  52
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RSPAN_T                    53
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_SRH_T      54
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_T          55
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_0_T             56
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_1_T             57
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_2_T             58
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SNAP_LLC_T                 59
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_STD_SEGMENT_ID_T           60
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_FIRST_4BYTES_T         61
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_LAST_16BYTES_T         62
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UDP_T                      63
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L3_T               64
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L4_T               65
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L5_T               66
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VLAN_T                     67
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VXLAN_T                    68
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_WESP_T                     69
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_T               70
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FLEXHDR_COUNT    71
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FLEXHDR_NAME_MAP_INIT \
+    {"arp_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T},\
+    {"authen_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_AUTHEN_T},\
+    {"bfd_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T},\
+    {"cntag_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CNTAG_T},\
+    {"cpu_composites_0_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_0_T},\
+    {"cpu_composites_1_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T},\
+    {"dest_option_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_DEST_OPTION_T},\
+    {"ep_nih_header_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T},\
+    {"erspan3_fixed_hdr_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T},\
+    {"erspan3_subhdr_5_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_SUBHDR_5_T},\
+    {"esp_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ESP_T},\
+    {"ethertype_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ETHERTYPE_T},\
+    {"frag_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FRAG_T},\
+    {"gbp_ethernet_shim_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GBP_ETHERNET_SHIM_T},\
+    {"generic_loopback_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T},\
+    {"gpe_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GPE_T},\
+    {"gre_chksum_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_CHKSUM_T},\
+    {"gre_key_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_KEY_T},\
+    {"gre_rout_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_ROUT_T},\
+    {"gre_seq_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_SEQ_T},\
+    {"gre_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_T},\
+    {"hg3_base_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T},\
+    {"hg3_extension_0_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_EXTENSION_0_T},\
+    {"hop_by_hop_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HOP_BY_HOP_T},\
+    {"icmp_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ICMP_T},\
+    {"ifa_flex_md_0_a_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_A_T},\
+    {"ifa_flex_md_0_b_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_B_T},\
+    {"ifa_flex_md_1_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_1_T},\
+    {"ifa_flex_md_2_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_2_T},\
+    {"ifa_flex_md_3_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_3_T},\
+    {"ifa_header_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_HEADER_T},\
+    {"ifa_md_base_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_MD_BASE_T},\
+    {"ifa_metadata_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_METADATA_T},\
+    {"igmp_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IGMP_T},\
+    {"ioam_e2e_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IOAM_E2E_T},\
+    {"ipfix_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPFIX_T},\
+    {"ipv4_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T},\
+    {"ipv6_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV6_T},\
+    {"l2_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_L2_T},\
+    {"mirror_erspan_sn_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MIRROR_ERSPAN_SN_T},\
+    {"mirror_transport_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MIRROR_TRANSPORT_T},\
+    {"mpls_ach_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_ACH_T},\
+    {"mpls_bv_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_BV_T},\
+    {"mpls_cw_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_CW_T},\
+    {"mpls_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_T},\
+    {"p_1588_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T},\
+    {"prog_ext_hdr_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PROG_EXT_HDR_T},\
+    {"psamp_0_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_0_T},\
+    {"psamp_1_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_1_T},\
+    {"psamp_mirror_on_drop_0_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T},\
+    {"psamp_mirror_on_drop_3_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T},\
+    {"rarp_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T},\
+    {"routing_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ROUTING_T},\
+    {"rspan_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RSPAN_T},\
+    {"segment_routing_srh_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_SRH_T},\
+    {"segment_routing_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_T},\
+    {"sflow_shim_0_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_0_T},\
+    {"sflow_shim_1_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_1_T},\
+    {"sflow_shim_2_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_2_T},\
+    {"snap_llc_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SNAP_LLC_T},\
+    {"std_segment_id_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_STD_SEGMENT_ID_T},\
+    {"tcp_first_4bytes_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_FIRST_4BYTES_T},\
+    {"tcp_last_16bytes_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_LAST_16BYTES_T},\
+    {"udp_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UDP_T},\
+    {"unknown_l3_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L3_T},\
+    {"unknown_l4_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L4_T},\
+    {"unknown_l5_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L5_T},\
+    {"vlan_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VLAN_T},\
+    {"vxlan_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VXLAN_T},\
+    {"wesp_t", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_WESP_T},\
+    {"RXPMD_FLEX_T", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_T},\
+    {"flexhdr count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FLEXHDR_COUNT}
+
+#endif /* BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FLEXHDR_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_bcmpkt_flexhdr_data.h
new file mode 100644
index 000000000..10cb781f4
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_bcmpkt_flexhdr_data.h
@@ -0,0 +1,1392 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) header.yml.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FLEXHDR_DATA_H
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FLEXHDR_DATA_H
+
+/*!
+ * \name ARP_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T_HARDWARE_LEN  0
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T_HARDWARE_TYPE 1
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T_OPERATION     2
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T_PROT_ADDR_LEN 3
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T_PROTOCOL_TYPE 4
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T_SENDER_HA     5
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T_SENDER_IP     6
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T_TARGET_HA     7
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T_TARGET_IP     8
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T_FID_COUNT          9
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT \
+    {"HARDWARE_LEN", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T_HARDWARE_LEN},\
+    {"HARDWARE_TYPE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T_HARDWARE_TYPE},\
+    {"OPERATION", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T_OPERATION},\
+    {"PROT_ADDR_LEN", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T_PROT_ADDR_LEN},\
+    {"PROTOCOL_TYPE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T_PROTOCOL_TYPE},\
+    {"SENDER_HA", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T_SENDER_HA},\
+    {"SENDER_IP", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T_SENDER_IP},\
+    {"TARGET_HA", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T_TARGET_HA},\
+    {"TARGET_IP", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T_TARGET_IP},\
+    {"arp_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T_FID_COUNT}
+
+/*!
+ * \name AUTHEN_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_AUTHEN_T_DATA        0
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_AUTHEN_T_NEXT_HEADER 1
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_AUTHEN_T_PAYLOAD_LEN 2
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_AUTHEN_T_RESERVED    3
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_AUTHEN_T_SEQ_NUM     4
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_AUTHEN_T_SPI         5
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_AUTHEN_T_FID_COUNT          6
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT \
+    {"DATA", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_AUTHEN_T_DATA},\
+    {"NEXT_HEADER", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_AUTHEN_T_NEXT_HEADER},\
+    {"PAYLOAD_LEN", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_AUTHEN_T_PAYLOAD_LEN},\
+    {"RESERVED", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_AUTHEN_T_RESERVED},\
+    {"SEQ_NUM", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_AUTHEN_T_SEQ_NUM},\
+    {"SPI", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_AUTHEN_T_SPI},\
+    {"authen_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_AUTHEN_T_FID_COUNT}
+
+/*!
+ * \name BFD_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_AP            0
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_BFD_LENGTH    1
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_CPI           2
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_DEM           3
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_DESMINTXINTV  4
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_DETECTMULT    5
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_DIAG          6
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_FIN           7
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_MINECHORXINTV 8
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_MPT           9
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_MYDISCRIM     10
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_POLL          11
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_REQMINRXINTV  12
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_STA           13
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_URDISCRIM     14
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_VERSION       15
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_FID_COUNT          16
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT \
+    {"AP", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_AP},\
+    {"BFD_LENGTH", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_BFD_LENGTH},\
+    {"CPI", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_CPI},\
+    {"DEM", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_DEM},\
+    {"DESMINTXINTV", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_DESMINTXINTV},\
+    {"DETECTMULT", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_DETECTMULT},\
+    {"DIAG", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_DIAG},\
+    {"FIN", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_FIN},\
+    {"MINECHORXINTV", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_MINECHORXINTV},\
+    {"MPT", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_MPT},\
+    {"MYDISCRIM", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_MYDISCRIM},\
+    {"POLL", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_POLL},\
+    {"REQMINRXINTV", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_REQMINRXINTV},\
+    {"STA", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_STA},\
+    {"URDISCRIM", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_URDISCRIM},\
+    {"VERSION", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_VERSION},\
+    {"bfd_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_FID_COUNT}
+
+/*!
+ * \name CNTAG_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CNTAG_T_RPID 0
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CNTAG_T_TPID 1
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CNTAG_T_FID_COUNT          2
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT \
+    {"RPID", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CNTAG_T_RPID},\
+    {"TPID", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CNTAG_T_TPID},\
+    {"cntag_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CNTAG_T_FID_COUNT}
+
+/*!
+ * \name CPU_COMPOSITES_0_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0 0
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1 1
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2 2
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3 3
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4 4
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5 5
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6 6
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT          7
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT \
+    {"DMA_CONT0", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0},\
+    {"DMA_CONT1", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1},\
+    {"DMA_CONT2", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2},\
+    {"DMA_CONT3", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3},\
+    {"DMA_CONT4", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4},\
+    {"DMA_CONT5", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5},\
+    {"DMA_CONT6", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6},\
+    {"cpu_composites_0_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT}
+
+/*!
+ * \name CPU_COMPOSITES_1_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10 0
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11 1
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12 2
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13 3
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14 4
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15 5
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16 6
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17 7
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7  8
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8  9
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9  10
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT          11
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT \
+    {"DMA_CONT10", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10},\
+    {"DMA_CONT11", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11},\
+    {"DMA_CONT12", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12},\
+    {"DMA_CONT13", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13},\
+    {"DMA_CONT14", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14},\
+    {"DMA_CONT15", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15},\
+    {"DMA_CONT16", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16},\
+    {"DMA_CONT17", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17},\
+    {"DMA_CONT7", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7},\
+    {"DMA_CONT8", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8},\
+    {"DMA_CONT9", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9},\
+    {"cpu_composites_1_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT}
+
+/*!
+ * \name DEST_OPTION_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN 0
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_DEST_OPTION_T_NEXT_HEADER 1
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_DEST_OPTION_T_OPTION      2
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_DEST_OPTION_T_FID_COUNT          3
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT \
+    {"HDR_EXT_LEN", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN},\
+    {"NEXT_HEADER", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_DEST_OPTION_T_NEXT_HEADER},\
+    {"OPTION", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_DEST_OPTION_T_OPTION},\
+    {"dest_option_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_DEST_OPTION_T_FID_COUNT}
+
+/*!
+ * \name EP_NIH_HEADER_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE       0
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE          1
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A        2
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B        3
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C        4
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A      5
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B      6
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C      7
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX 8
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_RESERVED_0           9
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_START                10
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP            11
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_FID_COUNT          12
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT \
+    {"HEADER_SUBTYPE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE},\
+    {"HEADER_TYPE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE},\
+    {"OPAQUE_CTRL_A", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A},\
+    {"OPAQUE_CTRL_B", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B},\
+    {"OPAQUE_CTRL_C", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C},\
+    {"OPAQUE_OBJECT_A", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A},\
+    {"OPAQUE_OBJECT_B", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B},\
+    {"OPAQUE_OBJECT_C", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C},\
+    {"RECIRC_PROFILE_INDEX", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX},\
+    {"RESERVED_0", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_RESERVED_0},\
+    {"START", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_START},\
+    {"TIMESTAMP", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP},\
+    {"ep_nih_header_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_FID_COUNT}
+
+/*!
+ * \name ERSPAN3_FIXED_HDR_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO               0
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T_COS               1
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID           2
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O 3
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID        4
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T_T                 5
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP         6
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T_VER               7
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN              8
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT          9
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT \
+    {"BSO", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO},\
+    {"COS", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T_COS},\
+    {"GBP_SID", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID},\
+    {"P_FT_HWID_D_GRA_O", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O},\
+    {"SESSION_ID", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID},\
+    {"T", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T_T},\
+    {"TIMESTAMP", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP},\
+    {"VER", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T_VER},\
+    {"VLAN", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN},\
+    {"erspan3_fixed_hdr_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT}
+
+/*!
+ * \name ERSPAN3_SUBHDR_5_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID 0
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID     1
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID   2
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP   3
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT          4
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT \
+    {"PLATFORM_ID", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID},\
+    {"PORT_ID", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID},\
+    {"SWITCH_ID", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID},\
+    {"TIMESTAMP", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP},\
+    {"erspan3_subhdr_5_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT}
+
+/*!
+ * \name ESP_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ESP_T_NEXT_HEADER 0
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ESP_T_PAD         1
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ESP_T_PAD_LEN     2
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ESP_T_SEQ_NUM     3
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ESP_T_SPI         4
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ESP_T_FID_COUNT          5
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT \
+    {"NEXT_HEADER", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ESP_T_NEXT_HEADER},\
+    {"PAD", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ESP_T_PAD},\
+    {"PAD_LEN", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ESP_T_PAD_LEN},\
+    {"SEQ_NUM", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ESP_T_SEQ_NUM},\
+    {"SPI", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ESP_T_SPI},\
+    {"esp_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ESP_T_FID_COUNT}
+
+/*!
+ * \name ETHERTYPE_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ETHERTYPE_T_TYPE 0
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ETHERTYPE_T_FID_COUNT          1
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT \
+    {"TYPE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ETHERTYPE_T_TYPE},\
+    {"ethertype_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ETHERTYPE_T_FID_COUNT}
+
+/*!
+ * \name FRAG_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FRAG_T_FRAG_INFO   0
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FRAG_T_ID          1
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FRAG_T_NEXT_HEADER 2
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FRAG_T_RESERVED    3
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FRAG_T_FID_COUNT          4
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT \
+    {"FRAG_INFO", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FRAG_T_FRAG_INFO},\
+    {"ID", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FRAG_T_ID},\
+    {"NEXT_HEADER", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FRAG_T_NEXT_HEADER},\
+    {"RESERVED", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FRAG_T_RESERVED},\
+    {"frag_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FRAG_T_FID_COUNT}
+
+/*!
+ * \name GBP_ETHERNET_SHIM_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GBP_ETHERNET_SHIM_T_ETHERTYPE 0
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GBP_ETHERNET_SHIM_T_FLAGS     1
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GBP_ETHERNET_SHIM_T_RESERVED  2
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GBP_ETHERNET_SHIM_T_SID       3
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GBP_ETHERNET_SHIM_T_SUBTYPE   4
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GBP_ETHERNET_SHIM_T_VER       5
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT          6
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GBP_ETHERNET_SHIM_T_FIELD_NAME_MAP_INIT \
+    {"ETHERTYPE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GBP_ETHERNET_SHIM_T_ETHERTYPE},\
+    {"FLAGS", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GBP_ETHERNET_SHIM_T_FLAGS},\
+    {"RESERVED", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GBP_ETHERNET_SHIM_T_RESERVED},\
+    {"SID", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GBP_ETHERNET_SHIM_T_SID},\
+    {"SUBTYPE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GBP_ETHERNET_SHIM_T_SUBTYPE},\
+    {"VER", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GBP_ETHERNET_SHIM_T_VER},\
+    {"gbp_ethernet_shim_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT}
+
+/*!
+ * \name GENERIC_LOOPBACK_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ    0
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE   1
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ        2
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_FLAGS              3
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE        4
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY     5
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL     6
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ      7
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0  8
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1  9
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ            10
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1         11
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT 12
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_SRC_SUBPORT_NUM    13
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE         14
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT          15
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT \
+    {"DESTINATION_OBJ", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ},\
+    {"DESTINATION_TYPE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE},\
+    {"ENTROPY_OBJ", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ},\
+    {"FLAGS", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_FLAGS},\
+    {"HEADER_TYPE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE},\
+    {"INPUT_PRIORITY", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY},\
+    {"INTERFACE_CTRL", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL},\
+    {"INTERFACE_OBJ", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ},\
+    {"PROCESSING_CTRL_0", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0},\
+    {"PROCESSING_CTRL_1", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1},\
+    {"QOS_OBJ", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ},\
+    {"RESERVED_1", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1},\
+    {"SOURCE_SYSTEM_PORT", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT},\
+    {"SRC_SUBPORT_NUM", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_SRC_SUBPORT_NUM},\
+    {"START_BYTE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE},\
+    {"generic_loopback_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT}
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NO_OP         0
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2_OIF        1
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED      2
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__VP            3
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP          4
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NHOP          5
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2MC_GROUP    6
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L3MC_GROUP    7
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED_1    8
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP_MEMBER   9
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__DEVICE_PORT   10
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__UNDERLAY_ECMP 11
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__TUNNEL  0
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__GENERIC 1
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__NOOP   0
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__VFI    1
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__L3_IIF 2
+
+/*!
+ * \name GPE_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GPE_T_FLAGS         0
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GPE_T_NEXT_PROTOCOL 1
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GPE_T_RESERVED0     2
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GPE_T_RESERVED1     3
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GPE_T_VNI           4
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GPE_T_FID_COUNT          5
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT \
+    {"FLAGS", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GPE_T_FLAGS},\
+    {"NEXT_PROTOCOL", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GPE_T_NEXT_PROTOCOL},\
+    {"RESERVED0", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GPE_T_RESERVED0},\
+    {"RESERVED1", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GPE_T_RESERVED1},\
+    {"VNI", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GPE_T_VNI},\
+    {"gpe_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GPE_T_FID_COUNT}
+
+/*!
+ * \name GRE_CHKSUM_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_CHKSUM_T_CHECKSUM 0
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_CHKSUM_T_OFFSET   1
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_CHKSUM_T_FID_COUNT          2
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT \
+    {"CHECKSUM", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_CHKSUM_T_CHECKSUM},\
+    {"OFFSET", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_CHKSUM_T_OFFSET},\
+    {"gre_chksum_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_CHKSUM_T_FID_COUNT}
+
+/*!
+ * \name GRE_KEY_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_KEY_T_KEY 0
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_KEY_T_FID_COUNT          1
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT \
+    {"KEY", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_KEY_T_KEY},\
+    {"gre_key_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_KEY_T_FID_COUNT}
+
+/*!
+ * \name GRE_ROUT_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_ROUT_T_ROUTING 0
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_ROUT_T_FID_COUNT          1
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT \
+    {"ROUTING", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_ROUT_T_ROUTING},\
+    {"gre_rout_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_ROUT_T_FID_COUNT}
+
+/*!
+ * \name GRE_SEQ_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_SEQ_T_SEQUENCE 0
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_SEQ_T_FID_COUNT          1
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT \
+    {"SEQUENCE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_SEQ_T_SEQUENCE},\
+    {"gre_seq_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_SEQ_T_FID_COUNT}
+
+/*!
+ * \name GRE_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_T_C_R_K_S  0
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_T_PROTOCOL 1
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_T_RESERVED 2
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_T_VERSION  3
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_T_FID_COUNT          4
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT \
+    {"C_R_K_S", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_T_C_R_K_S},\
+    {"PROTOCOL", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_T_PROTOCOL},\
+    {"RESERVED", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_T_RESERVED},\
+    {"VERSION", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_T_VERSION},\
+    {"gre_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_T_FID_COUNT}
+
+/*!
+ * \name HG3_BASE_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_CN                      0
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_CNG                     1
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_ENTROPY                 2
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_EXT_HDR_PRESENT         3
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_HG3_RESERVED            4
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_L3_ROUTED               5
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_MIRROR_COPY             6
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_RESERVED_ETYPE          7
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION      8
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION_TYPE 9
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_SYSTEM_SOURCE           10
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_TC                      11
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_VERSION                 12
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_FID_COUNT          13
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_FIELD_NAME_MAP_INIT \
+    {"CN", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_CN},\
+    {"CNG", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_CNG},\
+    {"ENTROPY", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_ENTROPY},\
+    {"EXT_HDR_PRESENT", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_EXT_HDR_PRESENT},\
+    {"HG3_RESERVED", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_HG3_RESERVED},\
+    {"L3_ROUTED", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_L3_ROUTED},\
+    {"MIRROR_COPY", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_MIRROR_COPY},\
+    {"RESERVED_ETYPE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_RESERVED_ETYPE},\
+    {"SYSTEM_DESTINATION", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION},\
+    {"SYSTEM_DESTINATION_TYPE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION_TYPE},\
+    {"SYSTEM_SOURCE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_SYSTEM_SOURCE},\
+    {"TC", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_TC},\
+    {"VERSION", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_VERSION},\
+    {"hg3_base_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_FID_COUNT}
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__NO_OP         0
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L2_OIF        1
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__RESERVED      2
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__VP            3
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__ECMP          4
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__NHOP          5
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L2MC_GROUP    6
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L3MC_GROUP    7
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__RESERVED_1    8
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__ECMP_MEMBER   9
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__DEVICE_PORT   10
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__UNDERLAY_ECMP 11
+
+/*!
+ * \name HG3_EXTENSION_0_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_LSB      0
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_MSB      1
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_EXTENSION_0_T_DVP_OR_L3_IIF     2
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_EXTENSION_0_T_FLAGS             3
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_EXTENSION_0_T_FORWARDING_DOMAIN 4
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_EXTENSION_0_T_SVP               5
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT          6
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_EXTENSION_0_T_FIELD_NAME_MAP_INIT \
+    {"CLASS_ID_LSB", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_LSB},\
+    {"CLASS_ID_MSB", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_MSB},\
+    {"DVP_OR_L3_IIF", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_EXTENSION_0_T_DVP_OR_L3_IIF},\
+    {"FLAGS", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_EXTENSION_0_T_FLAGS},\
+    {"FORWARDING_DOMAIN", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_EXTENSION_0_T_FORWARDING_DOMAIN},\
+    {"SVP", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_EXTENSION_0_T_SVP},\
+    {"hg3_extension_0_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT}
+
+/*!
+ * \name HOP_BY_HOP_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN 0
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER 1
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HOP_BY_HOP_T_OPTION      2
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HOP_BY_HOP_T_FID_COUNT          3
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT \
+    {"HDR_EXT_LEN", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN},\
+    {"NEXT_HEADER", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER},\
+    {"OPTION", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HOP_BY_HOP_T_OPTION},\
+    {"hop_by_hop_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HOP_BY_HOP_T_FID_COUNT}
+
+/*!
+ * \name ICMP_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ICMP_T_CHECKSUM  0
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ICMP_T_CODE      1
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ICMP_T_ICMP_TYPE 2
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ICMP_T_FID_COUNT          3
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT \
+    {"CHECKSUM", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ICMP_T_CHECKSUM},\
+    {"CODE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ICMP_T_CODE},\
+    {"ICMP_TYPE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ICMP_T_ICMP_TYPE},\
+    {"icmp_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ICMP_T_FID_COUNT}
+
+/*!
+ * \name IFA_FLEX_MD_0_A_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_A_T_FWD_HDR_TTL   0
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_A_T_LNS_DEVICE_ID 1
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT          2
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_A_T_FIELD_NAME_MAP_INIT \
+    {"FWD_HDR_TTL", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_A_T_FWD_HDR_TTL},\
+    {"LNS_DEVICE_ID", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_A_T_LNS_DEVICE_ID},\
+    {"ifa_flex_md_0_a_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT}
+
+/*!
+ * \name IFA_FLEX_MD_0_B_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_B_T_CN               0
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_B_T_PORT_SPEED       1
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_B_T_QUEUE_ID         2
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_B_T_RX_TIMESTAMP_SEC 3
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT          4
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_B_T_FIELD_NAME_MAP_INIT \
+    {"CN", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_B_T_CN},\
+    {"PORT_SPEED", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_B_T_PORT_SPEED},\
+    {"QUEUE_ID", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_B_T_QUEUE_ID},\
+    {"RX_TIMESTAMP_SEC", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_B_T_RX_TIMESTAMP_SEC},\
+    {"ifa_flex_md_0_b_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT}
+
+/*!
+ * \name IFA_FLEX_MD_1_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_1_T_EGRESS_PORT_ID       0
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_1_T_INGRESS_PORT_ID      1
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_1_T_RX_TIMESTAMP_NANOSEC 2
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT          3
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_1_T_FIELD_NAME_MAP_INIT \
+    {"EGRESS_PORT_ID", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_1_T_EGRESS_PORT_ID},\
+    {"INGRESS_PORT_ID", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_1_T_INGRESS_PORT_ID},\
+    {"RX_TIMESTAMP_NANOSEC", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_1_T_RX_TIMESTAMP_NANOSEC},\
+    {"ifa_flex_md_1_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT}
+
+/*!
+ * \name IFA_FLEX_MD_2_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_2_T_RESIDENCE_TIME_NANOSEC 0
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_2_T_TX_QUEUE_BYTE_COUNT    1
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT          2
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_2_T_FIELD_NAME_MAP_INIT \
+    {"RESIDENCE_TIME_NANOSEC", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_2_T_RESIDENCE_TIME_NANOSEC},\
+    {"TX_QUEUE_BYTE_COUNT", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_2_T_TX_QUEUE_BYTE_COUNT},\
+    {"ifa_flex_md_2_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT}
+
+/*!
+ * \name IFA_FLEX_MD_3_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_0 0
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_1 1
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT          2
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_3_T_FIELD_NAME_MAP_INIT \
+    {"MMU_STAT_0", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_0},\
+    {"MMU_STAT_1", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_1},\
+    {"ifa_flex_md_3_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT}
+
+/*!
+ * \name IFA_HEADER_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_HEADER_T_FLAGS      0
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_HEADER_T_GNS        1
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_HEADER_T_MAX_LENGTH 2
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_HEADER_T_NEXT_HDR   3
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_HEADER_T_VER        4
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_HEADER_T_FID_COUNT          5
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT \
+    {"FLAGS", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_HEADER_T_FLAGS},\
+    {"GNS", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_HEADER_T_GNS},\
+    {"MAX_LENGTH", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_HEADER_T_MAX_LENGTH},\
+    {"NEXT_HDR", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_HEADER_T_NEXT_HDR},\
+    {"VER", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_HEADER_T_VER},\
+    {"ifa_header_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_HEADER_T_FID_COUNT}
+
+/*!
+ * \name IFA_MD_BASE_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_MD_BASE_T_ACTION_VECTOR            0
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_MD_BASE_T_HOP_LIMIT_CURRENT_LENGTH 1
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_MD_BASE_T_REQUEST_VECTOR           2
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_MD_BASE_T_FID_COUNT          3
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_MD_BASE_T_FIELD_NAME_MAP_INIT \
+    {"ACTION_VECTOR", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_MD_BASE_T_ACTION_VECTOR},\
+    {"HOP_LIMIT_CURRENT_LENGTH", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_MD_BASE_T_HOP_LIMIT_CURRENT_LENGTH},\
+    {"REQUEST_VECTOR", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_MD_BASE_T_REQUEST_VECTOR},\
+    {"ifa_md_base_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_MD_BASE_T_FID_COUNT}
+
+/*!
+ * \name IFA_METADATA_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_METADATA_T_ACTION_VECTOR            0
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_METADATA_T_HOP_LIMIT_CURRENT_LENGTH 1
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_METADATA_T_METADATA                 2
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_METADATA_T_REQUEST_VECTOR           3
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_METADATA_T_FID_COUNT          4
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_METADATA_T_FIELD_NAME_MAP_INIT \
+    {"ACTION_VECTOR", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_METADATA_T_ACTION_VECTOR},\
+    {"HOP_LIMIT_CURRENT_LENGTH", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_METADATA_T_HOP_LIMIT_CURRENT_LENGTH},\
+    {"METADATA", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_METADATA_T_METADATA},\
+    {"REQUEST_VECTOR", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_METADATA_T_REQUEST_VECTOR},\
+    {"ifa_metadata_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_METADATA_T_FID_COUNT}
+
+/*!
+ * \name IGMP_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IGMP_T_CHECKSUM      0
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IGMP_T_GROUP_ADDRESS 1
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IGMP_T_IGMP_TYPE     2
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IGMP_T_MAX_RESP_TIME 3
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IGMP_T_FID_COUNT          4
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT \
+    {"CHECKSUM", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IGMP_T_CHECKSUM},\
+    {"GROUP_ADDRESS", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IGMP_T_GROUP_ADDRESS},\
+    {"IGMP_TYPE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IGMP_T_IGMP_TYPE},\
+    {"MAX_RESP_TIME", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IGMP_T_MAX_RESP_TIME},\
+    {"igmp_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IGMP_T_FID_COUNT}
+
+/*!
+ * \name IOAM_E2E_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IOAM_E2E_T_IOAM_E2E_DATA 0
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IOAM_E2E_T_IOAM_E2E_TYPE 1
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IOAM_E2E_T_IOAM_HDR_LEN  2
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IOAM_E2E_T_NAMESPACE_ID  3
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IOAM_E2E_T_NEXT_PROTOCOL 4
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IOAM_E2E_T_RESERVED      5
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IOAM_E2E_T_TYPE          6
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IOAM_E2E_T_FID_COUNT          7
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IOAM_E2E_T_FIELD_NAME_MAP_INIT \
+    {"IOAM_E2E_DATA", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IOAM_E2E_T_IOAM_E2E_DATA},\
+    {"IOAM_E2E_TYPE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IOAM_E2E_T_IOAM_E2E_TYPE},\
+    {"IOAM_HDR_LEN", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IOAM_E2E_T_IOAM_HDR_LEN},\
+    {"NAMESPACE_ID", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IOAM_E2E_T_NAMESPACE_ID},\
+    {"NEXT_PROTOCOL", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IOAM_E2E_T_NEXT_PROTOCOL},\
+    {"RESERVED", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IOAM_E2E_T_RESERVED},\
+    {"TYPE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IOAM_E2E_T_TYPE},\
+    {"ioam_e2e_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IOAM_E2E_T_FID_COUNT}
+
+/*!
+ * \name IPFIX_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPFIX_T_EXPORT_TIME   0
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPFIX_T_LENGTH        1
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPFIX_T_OBS_DOMAIN_ID 2
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPFIX_T_SEQUENCE_NUM  3
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPFIX_T_VERSION       4
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPFIX_T_FID_COUNT          5
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT \
+    {"EXPORT_TIME", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPFIX_T_EXPORT_TIME},\
+    {"LENGTH", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPFIX_T_LENGTH},\
+    {"OBS_DOMAIN_ID", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPFIX_T_OBS_DOMAIN_ID},\
+    {"SEQUENCE_NUM", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPFIX_T_SEQUENCE_NUM},\
+    {"VERSION", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPFIX_T_VERSION},\
+    {"ipfix_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPFIX_T_FID_COUNT}
+
+/*!
+ * \name IPV4_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_DA                0
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET 1
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_HDR_CHECKSUM      2
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_ID                3
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_OPTION            4
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_PROTOCOL          5
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_SA                6
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_TOS               7
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_TOTAL_LENGTH      8
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_TTL               9
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_VERSION_HDR_LEN   10
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_FID_COUNT          11
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT \
+    {"DA", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_DA},\
+    {"FLAGS_FRAG_OFFSET", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET},\
+    {"HDR_CHECKSUM", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_HDR_CHECKSUM},\
+    {"ID", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_ID},\
+    {"OPTION", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_OPTION},\
+    {"PROTOCOL", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_PROTOCOL},\
+    {"SA", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_SA},\
+    {"TOS", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_TOS},\
+    {"TOTAL_LENGTH", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_TOTAL_LENGTH},\
+    {"TTL", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_TTL},\
+    {"VERSION_HDR_LEN", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_VERSION_HDR_LEN},\
+    {"ipv4_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_FID_COUNT}
+
+/*!
+ * \name IPV6_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV6_T_DA             0
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV6_T_FLOW_LABEL     1
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV6_T_HOP_LIMIT      2
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV6_T_NEXT_HEADER    3
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV6_T_PAYLOAD_LENGTH 4
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV6_T_SA             5
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV6_T_TRAFFIC_CLASS  6
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV6_T_VERSION        7
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV6_T_FID_COUNT          8
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT \
+    {"DA", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV6_T_DA},\
+    {"FLOW_LABEL", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV6_T_FLOW_LABEL},\
+    {"HOP_LIMIT", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV6_T_HOP_LIMIT},\
+    {"NEXT_HEADER", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV6_T_NEXT_HEADER},\
+    {"PAYLOAD_LENGTH", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV6_T_PAYLOAD_LENGTH},\
+    {"SA", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV6_T_SA},\
+    {"TRAFFIC_CLASS", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV6_T_TRAFFIC_CLASS},\
+    {"VERSION", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV6_T_VERSION},\
+    {"ipv6_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV6_T_FID_COUNT}
+
+/*!
+ * \name L2_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_L2_T_MACDA 0
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_L2_T_MACSA 1
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_L2_T_FID_COUNT          2
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_L2_T_FIELD_NAME_MAP_INIT \
+    {"MACDA", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_L2_T_MACDA},\
+    {"MACSA", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_L2_T_MACSA},\
+    {"l2_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_L2_T_FID_COUNT}
+
+/*!
+ * \name MIRROR_ERSPAN_SN_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM 0
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT          1
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT \
+    {"SEQ_NUM", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM},\
+    {"mirror_erspan_sn_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT}
+
+/*!
+ * \name MIRROR_TRANSPORT_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MIRROR_TRANSPORT_T_DATA 0
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT          1
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT \
+    {"DATA", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MIRROR_TRANSPORT_T_DATA},\
+    {"mirror_transport_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT}
+
+/*!
+ * \name MPLS_ACH_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE 0
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_ACH_T_CW_TYPE      1
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_ACH_T_RESERVED     2
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_ACH_T_VERSION      3
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_ACH_T_FID_COUNT          4
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT \
+    {"CHANNEL_TYPE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE},\
+    {"CW_TYPE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_ACH_T_CW_TYPE},\
+    {"RESERVED", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_ACH_T_RESERVED},\
+    {"VERSION", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_ACH_T_VERSION},\
+    {"mpls_ach_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_ACH_T_FID_COUNT}
+
+/*!
+ * \name MPLS_BV_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_BV_T_VALUE 0
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_BV_T_FID_COUNT          1
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT \
+    {"VALUE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_BV_T_VALUE},\
+    {"mpls_bv_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_BV_T_FID_COUNT}
+
+/*!
+ * \name MPLS_CW_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_CW_T_CW_TYPE    0
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_CW_T_RESERVED   1
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_CW_T_SEQ_NUMBER 2
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_CW_T_FID_COUNT          3
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT \
+    {"CW_TYPE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_CW_T_CW_TYPE},\
+    {"RESERVED", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_CW_T_RESERVED},\
+    {"SEQ_NUMBER", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_CW_T_SEQ_NUMBER},\
+    {"mpls_cw_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_CW_T_FID_COUNT}
+
+/*!
+ * \name MPLS_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_T_BOS   0
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_T_EXP   1
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_T_LABEL 2
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_T_TTL   3
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_T_FID_COUNT          4
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT \
+    {"BOS", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_T_BOS},\
+    {"EXP", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_T_EXP},\
+    {"LABEL", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_T_LABEL},\
+    {"TTL", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_T_TTL},\
+    {"mpls_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_T_FID_COUNT}
+
+/*!
+ * \name P_1588_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_CNTRL          0
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_CORRECTION     1
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_DOMAIN_NB      2
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_FLAGS          3
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_LOGMSGINTERVAL 4
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_MSG_LENGTH     5
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_MSG_TYPE       6
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_RESERVED1      7
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_RESERVED2      8
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_RESERVED3      9
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_SEQ_ID         10
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_SRCPORTID      11
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_TRANSPORTSPEC  12
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_VERSION        13
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_FID_COUNT          14
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT \
+    {"CNTRL", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_CNTRL},\
+    {"CORRECTION", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_CORRECTION},\
+    {"DOMAIN_NB", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_DOMAIN_NB},\
+    {"FLAGS", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_FLAGS},\
+    {"LOGMSGINTERVAL", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_LOGMSGINTERVAL},\
+    {"MSG_LENGTH", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_MSG_LENGTH},\
+    {"MSG_TYPE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_MSG_TYPE},\
+    {"RESERVED1", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_RESERVED1},\
+    {"RESERVED2", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_RESERVED2},\
+    {"RESERVED3", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_RESERVED3},\
+    {"SEQ_ID", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_SEQ_ID},\
+    {"SRCPORTID", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_SRCPORTID},\
+    {"TRANSPORTSPEC", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_TRANSPORTSPEC},\
+    {"VERSION", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_VERSION},\
+    {"p_1588_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_FID_COUNT}
+
+/*!
+ * \name PROG_EXT_HDR_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN 0
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER 1
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PROG_EXT_HDR_T_OPTION      2
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PROG_EXT_HDR_T_FID_COUNT          3
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT \
+    {"HDR_EXT_LEN", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN},\
+    {"NEXT_HEADER", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER},\
+    {"OPTION", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PROG_EXT_HDR_T_OPTION},\
+    {"prog_ext_hdr_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PROG_EXT_HDR_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_0_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_0_T_FLOWSET        0
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_0_T_LENGTH         1
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX 2
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_0_T_OBS_TIME_NS    3
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_0_T_OBS_TIME_S     4
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_0_T_TEMPLATE_ID    5
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_0_T_FID_COUNT          6
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT \
+    {"FLOWSET", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_0_T_FLOWSET},\
+    {"LENGTH", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_0_T_LENGTH},\
+    {"NEXT_HOP_INDEX", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX},\
+    {"OBS_TIME_NS", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_0_T_OBS_TIME_NS},\
+    {"OBS_TIME_S", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_0_T_OBS_TIME_S},\
+    {"TEMPLATE_ID", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_0_T_TEMPLATE_ID},\
+    {"psamp_0_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_0_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_1_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_1_T_DLB_ID         0
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_1_T_EGRESS_PORT    1
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_1_T_EPOCH          2
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_1_T_INGRESS_PORT   3
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH 4
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_1_T_USER_META_DATA 5
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_1_T_VARIABLE_FLAG  6
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_1_T_FID_COUNT          7
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT \
+    {"DLB_ID", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_1_T_DLB_ID},\
+    {"EGRESS_PORT", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_1_T_EGRESS_PORT},\
+    {"EPOCH", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_1_T_EPOCH},\
+    {"INGRESS_PORT", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_1_T_INGRESS_PORT},\
+    {"SAMPLED_LENGTH", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH},\
+    {"USER_META_DATA", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_1_T_USER_META_DATA},\
+    {"VARIABLE_FLAG", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_1_T_VARIABLE_FLAG},\
+    {"psamp_1_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_1_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_MIRROR_ON_DROP_0_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT 0
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT    1
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH          2
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS     3
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S      4
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID       5
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID     6
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT          7
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT \
+    {"EGRESS_MOD_PORT", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT},\
+    {"INGRESS_PORT", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT},\
+    {"LENGTH", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH},\
+    {"OBS_TIME_NS", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS},\
+    {"OBS_TIME_S", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S},\
+    {"SWITCH_ID", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID},\
+    {"TEMPLATE_ID", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID},\
+    {"psamp_mirror_on_drop_0_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_MIRROR_ON_DROP_3_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON             0
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0              1
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH          2
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SMOD_STATE              3
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX 4
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA          5
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR       6
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT          7
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT \
+    {"DROP_REASON", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON},\
+    {"RESERVED_0", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0},\
+    {"SAMPLED_LENGTH", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH},\
+    {"SMOD_STATE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SMOD_STATE},\
+    {"UC_COS__COLOR__PROB_IDX", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX},\
+    {"USER_META_DATA", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA},\
+    {"VAR_LEN_INDICATOR", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR},\
+    {"psamp_mirror_on_drop_3_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT}
+
+/*!
+ * \name RARP_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T_HARDWARE_LEN  0
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T_HARDWARE_TYPE 1
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T_OPERATION     2
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T_PROT_ADDR_LEN 3
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T_PROTOCOL_TYPE 4
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T_SENDER_HA     5
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T_SENDER_IP     6
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T_TARGET_HA     7
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T_TARGET_IP     8
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T_FID_COUNT          9
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT \
+    {"HARDWARE_LEN", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T_HARDWARE_LEN},\
+    {"HARDWARE_TYPE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T_HARDWARE_TYPE},\
+    {"OPERATION", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T_OPERATION},\
+    {"PROT_ADDR_LEN", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T_PROT_ADDR_LEN},\
+    {"PROTOCOL_TYPE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T_PROTOCOL_TYPE},\
+    {"SENDER_HA", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T_SENDER_HA},\
+    {"SENDER_IP", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T_SENDER_IP},\
+    {"TARGET_HA", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T_TARGET_HA},\
+    {"TARGET_IP", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T_TARGET_IP},\
+    {"rarp_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T_FID_COUNT}
+
+/*!
+ * \name ROUTING_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ROUTING_T_DATA          0
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ROUTING_T_HDR_EXT_LEN   1
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ROUTING_T_NEXT_HEADER   2
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ROUTING_T_ROUTING_TYPE  3
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ROUTING_T_SEGMENTS_LEFT 4
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ROUTING_T_FID_COUNT          5
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT \
+    {"DATA", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ROUTING_T_DATA},\
+    {"HDR_EXT_LEN", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ROUTING_T_HDR_EXT_LEN},\
+    {"NEXT_HEADER", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ROUTING_T_NEXT_HEADER},\
+    {"ROUTING_TYPE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ROUTING_T_ROUTING_TYPE},\
+    {"SEGMENTS_LEFT", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ROUTING_T_SEGMENTS_LEFT},\
+    {"routing_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ROUTING_T_FID_COUNT}
+
+/*!
+ * \name RSPAN_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RSPAN_T_TAG  0
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RSPAN_T_TPID 1
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RSPAN_T_FID_COUNT          2
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT \
+    {"TAG", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RSPAN_T_TAG},\
+    {"TPID", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RSPAN_T_TPID},\
+    {"rspan_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RSPAN_T_FID_COUNT}
+
+/*!
+ * \name SEGMENT_ROUTING_SRH_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_SRH_T_FLAGS         0
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_SRH_T_HDR_EXT_LEN   1
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_SRH_T_LAST_ENTRY    2
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_SRH_T_NEXT_HEADER   3
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_SRH_T_ROUTING_TYPE  4
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_SRH_T_SEGMENTS_LEFT 5
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_SRH_T_TAG           6
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_SRH_T_FID_COUNT          7
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_SRH_T_FIELD_NAME_MAP_INIT \
+    {"FLAGS", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_SRH_T_FLAGS},\
+    {"HDR_EXT_LEN", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_SRH_T_HDR_EXT_LEN},\
+    {"LAST_ENTRY", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_SRH_T_LAST_ENTRY},\
+    {"NEXT_HEADER", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_SRH_T_NEXT_HEADER},\
+    {"ROUTING_TYPE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_SRH_T_ROUTING_TYPE},\
+    {"SEGMENTS_LEFT", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_SRH_T_SEGMENTS_LEFT},\
+    {"TAG", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_SRH_T_TAG},\
+    {"segment_routing_srh_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_SRH_T_FID_COUNT}
+
+/*!
+ * \name SEGMENT_ROUTING_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_T_HDR_EXT_LEN      0
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_T_LAST_ENTRY_FLAGS 1
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_T_NEXT_HEADER      2
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_T_ROUTING_TYPE     3
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_T_SEG_LIST         4
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_T_SEGMENTS_LEFT    5
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_T_TAG              6
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_T_FID_COUNT          7
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_T_FIELD_NAME_MAP_INIT \
+    {"HDR_EXT_LEN", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_T_HDR_EXT_LEN},\
+    {"LAST_ENTRY_FLAGS", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_T_LAST_ENTRY_FLAGS},\
+    {"NEXT_HEADER", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_T_NEXT_HEADER},\
+    {"ROUTING_TYPE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_T_ROUTING_TYPE},\
+    {"SEG_LIST", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_T_SEG_LIST},\
+    {"SEGMENTS_LEFT", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_T_SEGMENTS_LEFT},\
+    {"TAG", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_T_TAG},\
+    {"segment_routing_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_T_FID_COUNT}
+
+/*!
+ * \name SFLOW_SHIM_0_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION 0
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE      1
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_0_T_VERSION         2
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT          3
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT \
+    {"SYS_DESTINATION", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION},\
+    {"SYS_SOURCE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE},\
+    {"VERSION", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_0_T_VERSION},\
+    {"sflow_shim_0_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT}
+
+/*!
+ * \name SFLOW_SHIM_1_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE 0
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED   1
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE 2
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST       3
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE  4
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED   5
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_1_T_RESERVED         6
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE       7
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT          8
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT \
+    {"FLAG_DEST_SAMPLE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE},\
+    {"FLAG_DISCARDED", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED},\
+    {"FLAG_FLEX_SAMPLE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE},\
+    {"FLAG_MCAST", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST},\
+    {"FLAG_SRC_SAMPLE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE},\
+    {"FLAG_TRUNCATED", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED},\
+    {"RESERVED", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_1_T_RESERVED},\
+    {"SYS_OPCODE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE},\
+    {"sflow_shim_1_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT}
+
+/*!
+ * \name SFLOW_SHIM_2_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM   0
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA 1
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT          2
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT \
+    {"SEQUENCE_NUM", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM},\
+    {"USER_META_DATA", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA},\
+    {"sflow_shim_2_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT}
+
+/*!
+ * \name SNAP_LLC_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SNAP_LLC_T_LENGTH   0
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SNAP_LLC_T_SNAP_LLC 1
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SNAP_LLC_T_FID_COUNT          2
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT \
+    {"LENGTH", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SNAP_LLC_T_LENGTH},\
+    {"SNAP_LLC", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SNAP_LLC_T_SNAP_LLC},\
+    {"snap_llc_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SNAP_LLC_T_FID_COUNT}
+
+/*!
+ * \name STD_SEGMENT_ID_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_STD_SEGMENT_ID_T_DATA 0
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_STD_SEGMENT_ID_T_FID_COUNT          1
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_STD_SEGMENT_ID_T_FIELD_NAME_MAP_INIT \
+    {"DATA", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_STD_SEGMENT_ID_T_DATA},\
+    {"std_segment_id_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_STD_SEGMENT_ID_T_FID_COUNT}
+
+/*!
+ * \name TCP_FIRST_4BYTES_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT 0
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT 1
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT          2
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT \
+    {"DST_PORT", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT},\
+    {"SRC_PORT", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT},\
+    {"tcp_first_4bytes_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT}
+
+/*!
+ * \name TCP_LAST_16BYTES_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM           0
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM          1
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS 2
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM           3
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR        4
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE          5
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT          6
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT \
+    {"ACK_NUM", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM},\
+    {"CHECKSUM", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM},\
+    {"HDR_LEN_AND_FLAGS", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS},\
+    {"SEQ_NUM", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM},\
+    {"URGENT_PTR", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR},\
+    {"WIN_SIZE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE},\
+    {"tcp_last_16bytes_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT}
+
+/*!
+ * \name UDP_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UDP_T_CHECKSUM   0
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UDP_T_DST_PORT   1
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UDP_T_SRC_PORT   2
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UDP_T_UDP_LENGTH 3
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UDP_T_FID_COUNT          4
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT \
+    {"CHECKSUM", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UDP_T_CHECKSUM},\
+    {"DST_PORT", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UDP_T_DST_PORT},\
+    {"SRC_PORT", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UDP_T_SRC_PORT},\
+    {"UDP_LENGTH", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UDP_T_UDP_LENGTH},\
+    {"udp_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UDP_T_FID_COUNT}
+
+/*!
+ * \name UNKNOWN_L3_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD 0
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD  1
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L3_T_FID_COUNT          2
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT \
+    {"FIRST_16BYTES_OF_L3_PAYLOAD", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD},\
+    {"NEXT_16BYTES_OF_L3_PAYLOAD", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD},\
+    {"unknown_l3_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L3_T_FID_COUNT}
+
+/*!
+ * \name UNKNOWN_L4_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD 0
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L4_T_FID_COUNT          1
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT \
+    {"FIRST_4BYTES_OF_L4_PAYLOAD", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD},\
+    {"unknown_l4_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L4_T_FID_COUNT}
+
+/*!
+ * \name UNKNOWN_L5_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1 0
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3 1
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7 2
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_8_9 3
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L5_T_FID_COUNT          4
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT \
+    {"L5_BYTES_0_1", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1},\
+    {"L5_BYTES_2_3", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3},\
+    {"L5_BYTES_4_7", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7},\
+    {"L5_BYTES_8_9", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_8_9},\
+    {"unknown_l5_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L5_T_FID_COUNT}
+
+/*!
+ * \name VLAN_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VLAN_T_CFI  0
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VLAN_T_PCP  1
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VLAN_T_TPID 2
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VLAN_T_VID  3
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VLAN_T_FID_COUNT          4
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT \
+    {"CFI", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VLAN_T_CFI},\
+    {"PCP", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VLAN_T_PCP},\
+    {"TPID", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VLAN_T_TPID},\
+    {"VID", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VLAN_T_VID},\
+    {"vlan_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VLAN_T_FID_COUNT}
+
+/*!
+ * \name VXLAN_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VXLAN_T_FLAGS_RESERVED_1 0
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VXLAN_T_RESERVED2        1
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VXLAN_T_VN_ID            2
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VXLAN_T_FID_COUNT          3
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT \
+    {"FLAGS_RESERVED_1", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VXLAN_T_FLAGS_RESERVED_1},\
+    {"RESERVED2", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VXLAN_T_RESERVED2},\
+    {"VN_ID", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VXLAN_T_VN_ID},\
+    {"vxlan_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VXLAN_T_FID_COUNT}
+
+/*!
+ * \name WESP_T field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_WESP_T_FLAGS       0
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_WESP_T_HEADER_LEN  1
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_WESP_T_NEXT_HEADER 2
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_WESP_T_SEQ_NUM     3
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_WESP_T_SPI         4
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_WESP_T_TRAILER_LEN 5
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_WESP_T_WESP_IV     6
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_WESP_T_FID_COUNT          7
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT \
+    {"FLAGS", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_WESP_T_FLAGS},\
+    {"HEADER_LEN", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_WESP_T_HEADER_LEN},\
+    {"NEXT_HEADER", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_WESP_T_NEXT_HEADER},\
+    {"SEQ_NUM", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_WESP_T_SEQ_NUM},\
+    {"SPI", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_WESP_T_SPI},\
+    {"TRAILER_LEN", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_WESP_T_TRAILER_LEN},\
+    {"WESP_IV", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_WESP_T_WESP_IV},\
+    {"wesp_t fid count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_WESP_T_FID_COUNT}
+
+
+#endif /* BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FLEXHDR_DATA_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_bcmpkt_rxpmd_flex_data.h
new file mode 100644
index 000000000..1162d03c9
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_bcmpkt_rxpmd_flex_data.h
@@ -0,0 +1,191 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) map.yml.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_DATA_H
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_DATA_H
+
+/*!
+ * \name RX flex metadata field IDs.
+ */
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0                      0
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_DNAT_CTRL_3_0                                  1
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0                                 2
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_DVP_15_0                                       3
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_AND_SNAT_CTRL_15_0               4
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0        5
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0                         6
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0                         7
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0        8
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_RECIRC_CODE_3_0                     9
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0                      10
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16                     11
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0                        12
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16                       13
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32                       14
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0                              15
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0                        16
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0                      17
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0                             18
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16                            19
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_INGRESS_DEVICE_PORT_6_0                        20
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0 21
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0                    22
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_INT_PRI_3_0                                    23
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_L2_IIF_11_0                                    24
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_L2_OIF_11_0                                    25
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_L3_DNAT_INDEX_15_0                             26
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_L3_IIF_13_0                                    27
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0                                  28
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_L3_SNAT_INDEX_15_0                             29
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_MPLS_LABEL_DECAP_COUNT_3_0                     30
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0              31
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0                              32
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0                            33
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0                            34
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_SRV6_EDIT_AND_SL_UPDATE_CTRL_3_0               35
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_SRV6_NEW_GSID_SI_2_0                           36
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_SRV6_SID_AND_PREFIX_LEN_ENC_3_0                37
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_SRV6_TUNNEL_NEXT_SID_SELECT_3_0                38
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_SVP_15_0                                       39
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0                   40
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_SVTAG_SC_INDEX_STR_ALLOW_NAT_3_0               41
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0                        42
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0                              43
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0                             44
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0                             45
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0                46
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_VFI_15_0                                       47
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0   48
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_FID_COUNT                       49
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_COUNT                    48
+
+/*!
+ * \name Packet Flex Reason Types.
+ */
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE                         0
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS                               1
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_DEFAULT                                 2
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED 3
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED                    4
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED  5
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED                     6
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_DST_FP                                  7
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_EM_FT                                   8
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_EM_FT_HPAE_MISS                         9
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_IFP                                     10
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_IFP_METER                               11
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED      12
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_IVXLT                                   13
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP                           14
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS                      15
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE                      16
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP                           17
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS                      18
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR                            19
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF                        20
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR                            21
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL                        22
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD                    23
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0                      24
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1                      25
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2                      26
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3                      27
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4                      28
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5                      29
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6                      30
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7                      31
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD            32
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED              33
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED                  34
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU                    35
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU                          36
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED              37
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT                            38
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_SER_DROP                                39
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD         40
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_SRV6                                    41
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_SVP                                     42
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP                               43
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU                44
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR                     45
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED                       46
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_VFP                                     47
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT \
+    {"CB_STATION_MOVE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE},\
+    {"CML_FLAGS", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS},\
+    {"DEFAULT", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_DEFAULT},\
+    {"DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED},\
+    {"DLB_ECMP_PKT_SAMPLED", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED},\
+    {"DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED},\
+    {"DLB_LAG_PKT_SAMPLED", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED},\
+    {"DST_FP", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_DST_FP},\
+    {"EM_FT", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_EM_FT},\
+    {"EM_FT_HPAE_MISS", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_EM_FT_HPAE_MISS},\
+    {"IFP", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_IFP},\
+    {"IFP_METER", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_IFP_METER},\
+    {"IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED},\
+    {"IVXLT", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_IVXLT},\
+    {"L2_DST_LOOKUP", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP},\
+    {"L2_DST_LOOKUP_MISS", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS},\
+    {"L2_SRC_STATIC_MOVE", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE},\
+    {"L3_DST_LOOKUP", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP},\
+    {"L3_DST_LOOKUP_MISS", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS},\
+    {"L3_HDR_ERROR", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR},\
+    {"L3_IIF_EQ_L3_OIF", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF},\
+    {"L3_TTL_ERROR", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR},\
+    {"LEARN_CACHE_FULL", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL},\
+    {"MACSA_MULTICAST_RSVD", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD},\
+    {"MATCHED_RULE_BIT_0", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0},\
+    {"MATCHED_RULE_BIT_1", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1},\
+    {"MATCHED_RULE_BIT_2", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2},\
+    {"MATCHED_RULE_BIT_3", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3},\
+    {"MATCHED_RULE_BIT_4", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4},\
+    {"MATCHED_RULE_BIT_5", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5},\
+    {"MATCHED_RULE_BIT_6", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6},\
+    {"MATCHED_RULE_BIT_7", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7},\
+    {"MEMBERSHIP_CHECK_FAILED_RSVD", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD},\
+    {"MIRROR_SAMPLER_EGR_SAMPLED", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED},\
+    {"MIRROR_SAMPLER_SAMPLED", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED},\
+    {"MPLS_CTRL_PKT_TO_CPU", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU},\
+    {"NO_COPY_TO_CPU", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU},\
+    {"PKT_INTEGRITY_CHECK_FAILED", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED},\
+    {"PROTOCOL_PKT", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT},\
+    {"SER_DROP", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_SER_DROP},\
+    {"SPANNING_TREE_CHECK_FAILED_RSVD", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD},\
+    {"SRV6", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_SRV6},\
+    {"SVP", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_SVP},\
+    {"TRACE_DOP", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP},\
+    {"TRACE_DO_NOT_COPY_TO_CPU", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU},\
+    {"TRACE_DO_NOT_MIRROR", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR},\
+    {"URPF_CHECK_FAILED", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED},\
+    {"VFP", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_VFP},\
+    {"flex reason count", BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_COUNT}
+
+#endif /* BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_DATA_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_bcmpkt_rxpmd_match_id_defs.h
new file mode 100644
index 000000000..fd0a9d887
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_bcmpkt_rxpmd_match_id_defs.h
@@ -0,0 +1,505 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) bcm56690_a0_dna_6_5_29_0_1_sf_match_id_info.yml
+ * for device bcm56690_a0 and variant dna_6_5_29_0_1.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_MATCH_ID_DEFS_H
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_MATCH_ID_DEFS_H
+
+#include <bcmpkt/bcmpkt_rxpmd_match_id.h>
+
+/*!
+ * \brief Get the Match ID DataBase information.
+ *
+ * \retval bcmpkt_rxpmd_match_id_db_info_t Match ID DataBase information.
+*/
+extern bcmpkt_rxpmd_match_id_db_info_t *
+    bcm56690_a0_dna_6_5_29_0_1_rxpmd_match_id_db_info_get(void);
+
+/*!
+ * \brief Get the Match ID Mapping information.
+ *
+ * \retval bcmpkt_rxpmd_match_id_map_info_t Match ID Mapping information.
+*/
+extern bcmpkt_rxpmd_match_id_map_info_t *
+    bcm56690_a0_dna_6_5_29_0_1_rxpmd_match_id_map_info_get(void);
+
+/*!
+  \name RXPMD Match IDs
+*/
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_CNTAG  0
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM  1
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE  2
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0  3
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG  4
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2  5
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE  6
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG  7
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC  8
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP  9
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1  10
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2  11
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD  12
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1  13
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2  14
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT  15
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE  16
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1  17
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2  18
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE  19
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE  20
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM  21
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY  22
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT  23
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ  24
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1  25
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2  26
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP  27
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER  28
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA  29
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP  30
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E  31
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4  32
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6  33
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0  34
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1  35
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2  36
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3  37
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4  38
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5  39
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6  40
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH  41
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW  42
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE  43
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588  44
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1  45
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2  46
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP  47
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1  48
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2  49
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_SEG_ROUT_EXT_1  50
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES  51
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES  52
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP  53
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3  54
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4  55
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5  56
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN  57
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1  58
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2  59
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH  60
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK  61
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE  62
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_CNTAG  63
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM  64
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE  65
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0  66
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG  67
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2  68
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE  69
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG  70
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC  71
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP  72
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1  73
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2  74
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD  75
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1  76
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2  77
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT  78
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE  79
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1  80
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2  81
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE  82
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE  83
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM  84
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY  85
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT  86
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ  87
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1  88
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2  89
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP  90
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER  91
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA  92
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP  93
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E  94
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4  95
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6  96
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0  97
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1  98
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2  99
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3  100
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4  101
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5  102
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6  103
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH  104
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW  105
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE  106
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588  107
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1  108
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2  109
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP  110
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1  111
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2  112
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_SEG_ROUT_EXT_1  113
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES  114
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES  115
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP  116
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3  117
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4  118
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5  119
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN  120
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1  121
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2  122
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_CNTAG  123
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG  124
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2  125
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE  126
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG  127
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC  128
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP  129
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1  130
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2  131
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD  132
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1  133
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2  134
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT  135
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE  136
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1  137
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2  138
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1  139
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2  140
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP  141
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP  142
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4  143
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6  144
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE  145
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588  146
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1  147
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2  148
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP  149
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1  150
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2  151
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES  152
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES  153
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP  154
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3  155
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4  156
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5  157
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1  158
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2  159
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_CNTAG  160
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM  161
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE  162
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0  163
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG  164
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2  165
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE  166
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG  167
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC  168
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP  169
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1  170
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2  171
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD  172
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1  173
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2  174
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT  175
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE  176
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1  177
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2  178
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE  179
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE  180
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM  181
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY  182
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT  183
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ  184
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1  185
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2  186
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP  187
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER  188
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA  189
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP  190
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E  191
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4  192
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6  193
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0  194
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1  195
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2  196
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3  197
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4  198
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5  199
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6  200
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH  201
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW  202
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE  203
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588  204
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1  205
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2  206
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP  207
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1  208
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2  209
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_SEG_ROUT_EXT_1  210
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES  211
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES  212
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP  213
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3  214
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4  215
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5  216
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN  217
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1  218
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2  219
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH  220
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK  221
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE  222
+#define BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_COUNT  223
+
+#define BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT \
+    {"EGRESS_PKT_FWD_L2_HDR_CNTAG", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_CNTAG}, \
+    {"EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM}, \
+    {"EGRESS_PKT_FWD_L2_HDR_HG3_BASE", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE}, \
+    {"EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0}, \
+    {"EGRESS_PKT_FWD_L2_HDR_ITAG", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG}, \
+    {"EGRESS_PKT_FWD_L2_HDR_L2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2}, \
+    {"EGRESS_PKT_FWD_L2_HDR_NONE", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE}, \
+    {"EGRESS_PKT_FWD_L2_HDR_OTAG", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG}, \
+    {"EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ARP", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_BFD", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GPE", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ICMP", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IGMP", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IPV4", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IPV6", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS0", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS3", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS4", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS5", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS6", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_NONE", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_P_1588", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_RARP", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_SEG_ROUT_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_SEG_ROUT_EXT_1}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UDP", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2}, \
+    {"EGRESS_PKT_SYS_HDR_EP_NIH", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH}, \
+    {"EGRESS_PKT_SYS_HDR_LOOPBACK", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK}, \
+    {"EGRESS_PKT_SYS_HDR_NONE", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_CNTAG", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_CNTAG}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_ITAG", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_L2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_NONE", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_OTAG", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_SEG_ROUT_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_SEG_ROUT_EXT_1}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2}, \
+    {"INGRESS_PKT_INNER_L2_HDR_CNTAG", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_CNTAG}, \
+    {"INGRESS_PKT_INNER_L2_HDR_ITAG", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG}, \
+    {"INGRESS_PKT_INNER_L2_HDR_L2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2}, \
+    {"INGRESS_PKT_INNER_L2_HDR_NONE", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE}, \
+    {"INGRESS_PKT_INNER_L2_HDR_OTAG", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG}, \
+    {"INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ARP", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_BFD", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ICMP", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_IGMP", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_IPV4", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_IPV6", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_NONE", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_P_1588", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_RARP", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UDP", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_CNTAG", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_CNTAG}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_HG3_BASE", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_ITAG", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_L2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_NONE", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_OTAG", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ARP", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_BFD", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GPE", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_NONE", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_RARP", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_SEG_ROUT_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_SEG_ROUT_EXT_1}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UDP", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2}, \
+    {"INGRESS_PKT_SYS_HDR_EP_NIH", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH}, \
+    {"INGRESS_PKT_SYS_HDR_LOOPBACK", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK}, \
+    {"INGRESS_PKT_SYS_HDR_NONE", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE}, \
+    {"rxpmd_match_id_count", BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_COUNT}
+
+#endif /*! BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_MATCH_ID_DEFS_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_bcmpkt_flexhdr.h
new file mode 100644
index 000000000..4c4699647
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_bcmpkt_flexhdr.h
@@ -0,0 +1,96 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) header.yml.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM56780_A0_CNA_6_5_29_BCMPKT_FLEXHDR_H
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_FLEXHDR_H
+
+#include <bcmpkt/bcmpkt_flexhdr_internal.h>
+
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_ARP_T                          0
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T             1
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T             2
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T                3
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T            4
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T             5
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_ETHERTYPE_T                    6
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T             7
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_ICMP_T                         8
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_IPFIX_T                        9
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_IPV4_T                         10
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_IPV6_T                         11
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_L2_T                           12
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_MIRROR_ERSPAN_SN_T             13
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_MIRROR_TRANSPORT_T             14
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T       15
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T       16
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T       17
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_RARP_T                         18
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T             19
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T             20
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_UDP_T                          21
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T                   22
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L4_T                   23
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T                   24
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_VLAN_T                         25
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_VXLAN_T                        26
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_T                   27
+
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_FLEXHDR_COUNT    28
+
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_FLEXHDR_NAME_MAP_INIT \
+    {"arp_t", BCM56780_A0_CNA_6_5_29_BCMPKT_ARP_T},\
+    {"cpu_composites_0_t", BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T},\
+    {"cpu_composites_1_t", BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T},\
+    {"ep_nih_header_t", BCM56780_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T},\
+    {"erspan3_fixed_hdr_t", BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T},\
+    {"erspan3_subhdr_5_t", BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T},\
+    {"ethertype_t", BCM56780_A0_CNA_6_5_29_BCMPKT_ETHERTYPE_T},\
+    {"generic_loopback_t", BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T},\
+    {"icmp_t", BCM56780_A0_CNA_6_5_29_BCMPKT_ICMP_T},\
+    {"ipfix_t", BCM56780_A0_CNA_6_5_29_BCMPKT_IPFIX_T},\
+    {"ipv4_t", BCM56780_A0_CNA_6_5_29_BCMPKT_IPV4_T},\
+    {"ipv6_t", BCM56780_A0_CNA_6_5_29_BCMPKT_IPV6_T},\
+    {"l2_t", BCM56780_A0_CNA_6_5_29_BCMPKT_L2_T},\
+    {"mirror_erspan_sn_t", BCM56780_A0_CNA_6_5_29_BCMPKT_MIRROR_ERSPAN_SN_T},\
+    {"mirror_transport_t", BCM56780_A0_CNA_6_5_29_BCMPKT_MIRROR_TRANSPORT_T},\
+    {"psamp_mirror_on_drop_0_t", BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T},\
+    {"psamp_mirror_on_drop_1_t", BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T},\
+    {"psamp_mirror_on_drop_2_t", BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T},\
+    {"rarp_t", BCM56780_A0_CNA_6_5_29_BCMPKT_RARP_T},\
+    {"tcp_first_4bytes_t", BCM56780_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T},\
+    {"tcp_last_16bytes_t", BCM56780_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T},\
+    {"udp_t", BCM56780_A0_CNA_6_5_29_BCMPKT_UDP_T},\
+    {"unknown_l3_t", BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T},\
+    {"unknown_l4_t", BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L4_T},\
+    {"unknown_l5_t", BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T},\
+    {"vlan_t", BCM56780_A0_CNA_6_5_29_BCMPKT_VLAN_T},\
+    {"vxlan_t", BCM56780_A0_CNA_6_5_29_BCMPKT_VXLAN_T},\
+    {"RXPMD_FLEX_T", BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_T},\
+    {"flexhdr count", BCM56780_A0_CNA_6_5_29_BCMPKT_FLEXHDR_COUNT}
+
+#endif /* BCM56780_A0_CNA_6_5_29_BCMPKT_FLEXHDR_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_bcmpkt_flexhdr_data.h
new file mode 100644
index 000000000..451241422
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_bcmpkt_flexhdr_data.h
@@ -0,0 +1,592 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) header.yml.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM56780_A0_CNA_6_5_29_BCMPKT_FLEXHDR_DATA_H
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_FLEXHDR_DATA_H
+
+/*!
+ * \name ARP_T field IDs.
+ */
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_ARP_T_HARDWARE_LEN  0
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_ARP_T_HARDWARE_TYPE 1
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_ARP_T_OPERATION     2
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_ARP_T_PROT_ADDR_LEN 3
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_ARP_T_PROTOCOL_TYPE 4
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_ARP_T_SENDER_HA     5
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_ARP_T_SENDER_IP     6
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_ARP_T_TARGET_HA     7
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_ARP_T_TARGET_IP     8
+
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_ARP_T_FID_COUNT          9
+
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT \
+    {"HARDWARE_LEN", BCM56780_A0_CNA_6_5_29_BCMPKT_ARP_T_HARDWARE_LEN},\
+    {"HARDWARE_TYPE", BCM56780_A0_CNA_6_5_29_BCMPKT_ARP_T_HARDWARE_TYPE},\
+    {"OPERATION", BCM56780_A0_CNA_6_5_29_BCMPKT_ARP_T_OPERATION},\
+    {"PROT_ADDR_LEN", BCM56780_A0_CNA_6_5_29_BCMPKT_ARP_T_PROT_ADDR_LEN},\
+    {"PROTOCOL_TYPE", BCM56780_A0_CNA_6_5_29_BCMPKT_ARP_T_PROTOCOL_TYPE},\
+    {"SENDER_HA", BCM56780_A0_CNA_6_5_29_BCMPKT_ARP_T_SENDER_HA},\
+    {"SENDER_IP", BCM56780_A0_CNA_6_5_29_BCMPKT_ARP_T_SENDER_IP},\
+    {"TARGET_HA", BCM56780_A0_CNA_6_5_29_BCMPKT_ARP_T_TARGET_HA},\
+    {"TARGET_IP", BCM56780_A0_CNA_6_5_29_BCMPKT_ARP_T_TARGET_IP},\
+    {"arp_t fid count", BCM56780_A0_CNA_6_5_29_BCMPKT_ARP_T_FID_COUNT}
+
+/*!
+ * \name CPU_COMPOSITES_0_T field IDs.
+ */
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0 0
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1 1
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2 2
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3 3
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4 4
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5 5
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6 6
+
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT          7
+
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT \
+    {"DMA_CONT0", BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0},\
+    {"DMA_CONT1", BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1},\
+    {"DMA_CONT2", BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2},\
+    {"DMA_CONT3", BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3},\
+    {"DMA_CONT4", BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4},\
+    {"DMA_CONT5", BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5},\
+    {"DMA_CONT6", BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6},\
+    {"cpu_composites_0_t fid count", BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT}
+
+/*!
+ * \name CPU_COMPOSITES_1_T field IDs.
+ */
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10 0
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11 1
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12 2
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13 3
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14 4
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15 5
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16 6
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17 7
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7  8
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8  9
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9  10
+
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT          11
+
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT \
+    {"DMA_CONT10", BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10},\
+    {"DMA_CONT11", BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11},\
+    {"DMA_CONT12", BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12},\
+    {"DMA_CONT13", BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13},\
+    {"DMA_CONT14", BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14},\
+    {"DMA_CONT15", BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15},\
+    {"DMA_CONT16", BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16},\
+    {"DMA_CONT17", BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17},\
+    {"DMA_CONT7", BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7},\
+    {"DMA_CONT8", BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8},\
+    {"DMA_CONT9", BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9},\
+    {"cpu_composites_1_t fid count", BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT}
+
+/*!
+ * \name EP_NIH_HEADER_T field IDs.
+ */
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE       0
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE          1
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A        2
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B        3
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C        4
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A      5
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B      6
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C      7
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX 8
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_RESERVED_0           9
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_START                10
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP            11
+
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_FID_COUNT          12
+
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT \
+    {"HEADER_SUBTYPE", BCM56780_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE},\
+    {"HEADER_TYPE", BCM56780_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE},\
+    {"OPAQUE_CTRL_A", BCM56780_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A},\
+    {"OPAQUE_CTRL_B", BCM56780_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B},\
+    {"OPAQUE_CTRL_C", BCM56780_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C},\
+    {"OPAQUE_OBJECT_A", BCM56780_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A},\
+    {"OPAQUE_OBJECT_B", BCM56780_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B},\
+    {"OPAQUE_OBJECT_C", BCM56780_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C},\
+    {"RECIRC_PROFILE_INDEX", BCM56780_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX},\
+    {"RESERVED_0", BCM56780_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_RESERVED_0},\
+    {"START", BCM56780_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_START},\
+    {"TIMESTAMP", BCM56780_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP},\
+    {"ep_nih_header_t fid count", BCM56780_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_FID_COUNT}
+
+/*!
+ * \name ERSPAN3_FIXED_HDR_T field IDs.
+ */
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO               0
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_COS               1
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID           2
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O 3
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID        4
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_T                 5
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP         6
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_VER               7
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN              8
+
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT          9
+
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT \
+    {"BSO", BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO},\
+    {"COS", BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_COS},\
+    {"GBP_SID", BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID},\
+    {"P_FT_HWID_D_GRA_O", BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O},\
+    {"SESSION_ID", BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID},\
+    {"T", BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_T},\
+    {"TIMESTAMP", BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP},\
+    {"VER", BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_VER},\
+    {"VLAN", BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN},\
+    {"erspan3_fixed_hdr_t fid count", BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT}
+
+/*!
+ * \name ERSPAN3_SUBHDR_5_T field IDs.
+ */
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID 0
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID     1
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID   2
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP   3
+
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT          4
+
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT \
+    {"PLATFORM_ID", BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID},\
+    {"PORT_ID", BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID},\
+    {"SWITCH_ID", BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID},\
+    {"TIMESTAMP", BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP},\
+    {"erspan3_subhdr_5_t fid count", BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT}
+
+/*!
+ * \name ETHERTYPE_T field IDs.
+ */
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_ETHERTYPE_T_TYPE 0
+
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_ETHERTYPE_T_FID_COUNT          1
+
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT \
+    {"TYPE", BCM56780_A0_CNA_6_5_29_BCMPKT_ETHERTYPE_T_TYPE},\
+    {"ethertype_t fid count", BCM56780_A0_CNA_6_5_29_BCMPKT_ETHERTYPE_T_FID_COUNT}
+
+/*!
+ * \name GENERIC_LOOPBACK_T field IDs.
+ */
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ    0
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE   1
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ        2
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_FLAGS              3
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE        4
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY     5
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL     6
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ      7
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0  8
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1  9
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ            10
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1         11
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2         12
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT 13
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE         14
+
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT          15
+
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT \
+    {"DESTINATION_OBJ", BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ},\
+    {"DESTINATION_TYPE", BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE},\
+    {"ENTROPY_OBJ", BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ},\
+    {"FLAGS", BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_FLAGS},\
+    {"HEADER_TYPE", BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE},\
+    {"INPUT_PRIORITY", BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY},\
+    {"INTERFACE_CTRL", BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL},\
+    {"INTERFACE_OBJ", BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ},\
+    {"PROCESSING_CTRL_0", BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0},\
+    {"PROCESSING_CTRL_1", BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1},\
+    {"QOS_OBJ", BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ},\
+    {"RESERVED_1", BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1},\
+    {"RESERVED_2", BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2},\
+    {"SOURCE_SYSTEM_PORT", BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT},\
+    {"START_BYTE", BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE},\
+    {"generic_loopback_t fid count", BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT}
+
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NO_OP       0
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2_OIF      1
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED    2
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__VP          3
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP        4
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NHOP        5
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2MC_GROUP  6
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L3MC_GROUP  7
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED_1  8
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP_MEMBER 9
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__DEVICE_PORT 10
+
+/*!
+ * \name ICMP_T field IDs.
+ */
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_ICMP_T_CHECKSUM  0
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_ICMP_T_CODE      1
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_ICMP_T_ICMP_TYPE 2
+
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_ICMP_T_FID_COUNT          3
+
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT \
+    {"CHECKSUM", BCM56780_A0_CNA_6_5_29_BCMPKT_ICMP_T_CHECKSUM},\
+    {"CODE", BCM56780_A0_CNA_6_5_29_BCMPKT_ICMP_T_CODE},\
+    {"ICMP_TYPE", BCM56780_A0_CNA_6_5_29_BCMPKT_ICMP_T_ICMP_TYPE},\
+    {"icmp_t fid count", BCM56780_A0_CNA_6_5_29_BCMPKT_ICMP_T_FID_COUNT}
+
+/*!
+ * \name IPFIX_T field IDs.
+ */
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_IPFIX_T_EXPORT_TIME   0
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_IPFIX_T_LENGTH        1
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_IPFIX_T_OBS_DOMAIN_ID 2
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_IPFIX_T_SEQUENCE_NUM  3
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_IPFIX_T_VERSION       4
+
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_IPFIX_T_FID_COUNT          5
+
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT \
+    {"EXPORT_TIME", BCM56780_A0_CNA_6_5_29_BCMPKT_IPFIX_T_EXPORT_TIME},\
+    {"LENGTH", BCM56780_A0_CNA_6_5_29_BCMPKT_IPFIX_T_LENGTH},\
+    {"OBS_DOMAIN_ID", BCM56780_A0_CNA_6_5_29_BCMPKT_IPFIX_T_OBS_DOMAIN_ID},\
+    {"SEQUENCE_NUM", BCM56780_A0_CNA_6_5_29_BCMPKT_IPFIX_T_SEQUENCE_NUM},\
+    {"VERSION", BCM56780_A0_CNA_6_5_29_BCMPKT_IPFIX_T_VERSION},\
+    {"ipfix_t fid count", BCM56780_A0_CNA_6_5_29_BCMPKT_IPFIX_T_FID_COUNT}
+
+/*!
+ * \name IPV4_T field IDs.
+ */
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_IPV4_T_DA                0
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET 1
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_IPV4_T_HDR_CHECKSUM      2
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_IPV4_T_ID                3
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_IPV4_T_OPTION            4
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_IPV4_T_PROTOCOL          5
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_IPV4_T_SA                6
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_IPV4_T_TOS               7
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_IPV4_T_TOTAL_LENGTH      8
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_IPV4_T_TTL               9
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_IPV4_T_VERSION_HDR_LEN   10
+
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_IPV4_T_FID_COUNT          11
+
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT \
+    {"DA", BCM56780_A0_CNA_6_5_29_BCMPKT_IPV4_T_DA},\
+    {"FLAGS_FRAG_OFFSET", BCM56780_A0_CNA_6_5_29_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET},\
+    {"HDR_CHECKSUM", BCM56780_A0_CNA_6_5_29_BCMPKT_IPV4_T_HDR_CHECKSUM},\
+    {"ID", BCM56780_A0_CNA_6_5_29_BCMPKT_IPV4_T_ID},\
+    {"OPTION", BCM56780_A0_CNA_6_5_29_BCMPKT_IPV4_T_OPTION},\
+    {"PROTOCOL", BCM56780_A0_CNA_6_5_29_BCMPKT_IPV4_T_PROTOCOL},\
+    {"SA", BCM56780_A0_CNA_6_5_29_BCMPKT_IPV4_T_SA},\
+    {"TOS", BCM56780_A0_CNA_6_5_29_BCMPKT_IPV4_T_TOS},\
+    {"TOTAL_LENGTH", BCM56780_A0_CNA_6_5_29_BCMPKT_IPV4_T_TOTAL_LENGTH},\
+    {"TTL", BCM56780_A0_CNA_6_5_29_BCMPKT_IPV4_T_TTL},\
+    {"VERSION_HDR_LEN", BCM56780_A0_CNA_6_5_29_BCMPKT_IPV4_T_VERSION_HDR_LEN},\
+    {"ipv4_t fid count", BCM56780_A0_CNA_6_5_29_BCMPKT_IPV4_T_FID_COUNT}
+
+/*!
+ * \name IPV6_T field IDs.
+ */
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_IPV6_T_DA             0
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_IPV6_T_FLOW_LABEL     1
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_IPV6_T_HOP_LIMIT      2
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_IPV6_T_NEXT_HEADER    3
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_IPV6_T_PAYLOAD_LENGTH 4
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_IPV6_T_SA             5
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_IPV6_T_TRAFFIC_CLASS  6
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_IPV6_T_VERSION        7
+
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_IPV6_T_FID_COUNT          8
+
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT \
+    {"DA", BCM56780_A0_CNA_6_5_29_BCMPKT_IPV6_T_DA},\
+    {"FLOW_LABEL", BCM56780_A0_CNA_6_5_29_BCMPKT_IPV6_T_FLOW_LABEL},\
+    {"HOP_LIMIT", BCM56780_A0_CNA_6_5_29_BCMPKT_IPV6_T_HOP_LIMIT},\
+    {"NEXT_HEADER", BCM56780_A0_CNA_6_5_29_BCMPKT_IPV6_T_NEXT_HEADER},\
+    {"PAYLOAD_LENGTH", BCM56780_A0_CNA_6_5_29_BCMPKT_IPV6_T_PAYLOAD_LENGTH},\
+    {"SA", BCM56780_A0_CNA_6_5_29_BCMPKT_IPV6_T_SA},\
+    {"TRAFFIC_CLASS", BCM56780_A0_CNA_6_5_29_BCMPKT_IPV6_T_TRAFFIC_CLASS},\
+    {"VERSION", BCM56780_A0_CNA_6_5_29_BCMPKT_IPV6_T_VERSION},\
+    {"ipv6_t fid count", BCM56780_A0_CNA_6_5_29_BCMPKT_IPV6_T_FID_COUNT}
+
+/*!
+ * \name L2_T field IDs.
+ */
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_L2_T_MACDA 0
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_L2_T_MACSA 1
+
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_L2_T_FID_COUNT          2
+
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_L2_T_FIELD_NAME_MAP_INIT \
+    {"MACDA", BCM56780_A0_CNA_6_5_29_BCMPKT_L2_T_MACDA},\
+    {"MACSA", BCM56780_A0_CNA_6_5_29_BCMPKT_L2_T_MACSA},\
+    {"l2_t fid count", BCM56780_A0_CNA_6_5_29_BCMPKT_L2_T_FID_COUNT}
+
+/*!
+ * \name MIRROR_ERSPAN_SN_T field IDs.
+ */
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM 0
+
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT          1
+
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT \
+    {"SEQ_NUM", BCM56780_A0_CNA_6_5_29_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM},\
+    {"mirror_erspan_sn_t fid count", BCM56780_A0_CNA_6_5_29_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT}
+
+/*!
+ * \name MIRROR_TRANSPORT_T field IDs.
+ */
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_MIRROR_TRANSPORT_T_DATA 0
+
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT          1
+
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT \
+    {"DATA", BCM56780_A0_CNA_6_5_29_BCMPKT_MIRROR_TRANSPORT_T_DATA},\
+    {"mirror_transport_t fid count", BCM56780_A0_CNA_6_5_29_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_MIRROR_ON_DROP_0_T field IDs.
+ */
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT 0
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT    1
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH          2
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS     3
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S      4
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID       5
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID     6
+
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT          7
+
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT \
+    {"EGRESS_MOD_PORT", BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT},\
+    {"INGRESS_PORT", BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT},\
+    {"LENGTH", BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH},\
+    {"OBS_TIME_NS", BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS},\
+    {"OBS_TIME_S", BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S},\
+    {"SWITCH_ID", BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID},\
+    {"TEMPLATE_ID", BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID},\
+    {"psamp_mirror_on_drop_0_t fid count", BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_MIRROR_ON_DROP_1_T field IDs.
+ */
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_ING_DROP_REASON    0
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MIRROR_ON_DROP_OBJ 1
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MMU_DROP_CTRL      2
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_SAMPLED_LENGTH     3
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_USER_META_DATA     4
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_VAR_LEN_INDICATOR  5
+
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT          6
+
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FIELD_NAME_MAP_INIT \
+    {"ING_DROP_REASON", BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_ING_DROP_REASON},\
+    {"MIRROR_ON_DROP_OBJ", BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MIRROR_ON_DROP_OBJ},\
+    {"MMU_DROP_CTRL", BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MMU_DROP_CTRL},\
+    {"SAMPLED_LENGTH", BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_SAMPLED_LENGTH},\
+    {"USER_META_DATA", BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_USER_META_DATA},\
+    {"VAR_LEN_INDICATOR", BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_VAR_LEN_INDICATOR},\
+    {"psamp_mirror_on_drop_1_t fid count", BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_MIRROR_ON_DROP_2_T field IDs.
+ */
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_EGR_DROP_REASON       0
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_EP_COPY_SESSION_INDEX 1
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_RESERVED_0            2
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_SAMPLED_LENGTH        3
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_USER_META_DATA        4
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_VAR_LEN_INDICATOR     5
+
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT          6
+
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FIELD_NAME_MAP_INIT \
+    {"EGR_DROP_REASON", BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_EGR_DROP_REASON},\
+    {"EP_COPY_SESSION_INDEX", BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_EP_COPY_SESSION_INDEX},\
+    {"RESERVED_0", BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_RESERVED_0},\
+    {"SAMPLED_LENGTH", BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_SAMPLED_LENGTH},\
+    {"USER_META_DATA", BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_USER_META_DATA},\
+    {"VAR_LEN_INDICATOR", BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_VAR_LEN_INDICATOR},\
+    {"psamp_mirror_on_drop_2_t fid count", BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT}
+
+/*!
+ * \name RARP_T field IDs.
+ */
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_RARP_T_HARDWARE_LEN  0
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_RARP_T_HARDWARE_TYPE 1
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_RARP_T_OPERATION     2
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_RARP_T_PROT_ADDR_LEN 3
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_RARP_T_PROTOCOL_TYPE 4
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_RARP_T_SENDER_HA     5
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_RARP_T_SENDER_IP     6
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_RARP_T_TARGET_HA     7
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_RARP_T_TARGET_IP     8
+
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_RARP_T_FID_COUNT          9
+
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT \
+    {"HARDWARE_LEN", BCM56780_A0_CNA_6_5_29_BCMPKT_RARP_T_HARDWARE_LEN},\
+    {"HARDWARE_TYPE", BCM56780_A0_CNA_6_5_29_BCMPKT_RARP_T_HARDWARE_TYPE},\
+    {"OPERATION", BCM56780_A0_CNA_6_5_29_BCMPKT_RARP_T_OPERATION},\
+    {"PROT_ADDR_LEN", BCM56780_A0_CNA_6_5_29_BCMPKT_RARP_T_PROT_ADDR_LEN},\
+    {"PROTOCOL_TYPE", BCM56780_A0_CNA_6_5_29_BCMPKT_RARP_T_PROTOCOL_TYPE},\
+    {"SENDER_HA", BCM56780_A0_CNA_6_5_29_BCMPKT_RARP_T_SENDER_HA},\
+    {"SENDER_IP", BCM56780_A0_CNA_6_5_29_BCMPKT_RARP_T_SENDER_IP},\
+    {"TARGET_HA", BCM56780_A0_CNA_6_5_29_BCMPKT_RARP_T_TARGET_HA},\
+    {"TARGET_IP", BCM56780_A0_CNA_6_5_29_BCMPKT_RARP_T_TARGET_IP},\
+    {"rarp_t fid count", BCM56780_A0_CNA_6_5_29_BCMPKT_RARP_T_FID_COUNT}
+
+/*!
+ * \name TCP_FIRST_4BYTES_T field IDs.
+ */
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT 0
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT 1
+
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT          2
+
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT \
+    {"DST_PORT", BCM56780_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT},\
+    {"SRC_PORT", BCM56780_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT},\
+    {"tcp_first_4bytes_t fid count", BCM56780_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT}
+
+/*!
+ * \name TCP_LAST_16BYTES_T field IDs.
+ */
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM           0
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM          1
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS 2
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM           3
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR        4
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE          5
+
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT          6
+
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT \
+    {"ACK_NUM", BCM56780_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM},\
+    {"CHECKSUM", BCM56780_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM},\
+    {"HDR_LEN_AND_FLAGS", BCM56780_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS},\
+    {"SEQ_NUM", BCM56780_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM},\
+    {"URGENT_PTR", BCM56780_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR},\
+    {"WIN_SIZE", BCM56780_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE},\
+    {"tcp_last_16bytes_t fid count", BCM56780_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT}
+
+/*!
+ * \name UDP_T field IDs.
+ */
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_UDP_T_CHECKSUM   0
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_UDP_T_DST_PORT   1
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_UDP_T_SRC_PORT   2
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_UDP_T_UDP_LENGTH 3
+
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_UDP_T_FID_COUNT          4
+
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT \
+    {"CHECKSUM", BCM56780_A0_CNA_6_5_29_BCMPKT_UDP_T_CHECKSUM},\
+    {"DST_PORT", BCM56780_A0_CNA_6_5_29_BCMPKT_UDP_T_DST_PORT},\
+    {"SRC_PORT", BCM56780_A0_CNA_6_5_29_BCMPKT_UDP_T_SRC_PORT},\
+    {"UDP_LENGTH", BCM56780_A0_CNA_6_5_29_BCMPKT_UDP_T_UDP_LENGTH},\
+    {"udp_t fid count", BCM56780_A0_CNA_6_5_29_BCMPKT_UDP_T_FID_COUNT}
+
+/*!
+ * \name UNKNOWN_L3_T field IDs.
+ */
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD 0
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD  1
+
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T_FID_COUNT          2
+
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT \
+    {"FIRST_16BYTES_OF_L3_PAYLOAD", BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD},\
+    {"NEXT_16BYTES_OF_L3_PAYLOAD", BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD},\
+    {"unknown_l3_t fid count", BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T_FID_COUNT}
+
+/*!
+ * \name UNKNOWN_L4_T field IDs.
+ */
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD 0
+
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L4_T_FID_COUNT          1
+
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT \
+    {"FIRST_4BYTES_OF_L4_PAYLOAD", BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD},\
+    {"unknown_l4_t fid count", BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L4_T_FID_COUNT}
+
+/*!
+ * \name UNKNOWN_L5_T field IDs.
+ */
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1 0
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3 1
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7 2
+
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_FID_COUNT          3
+
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT \
+    {"L5_BYTES_0_1", BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1},\
+    {"L5_BYTES_2_3", BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3},\
+    {"L5_BYTES_4_7", BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7},\
+    {"unknown_l5_t fid count", BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_FID_COUNT}
+
+/*!
+ * \name VLAN_T field IDs.
+ */
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_VLAN_T_CFI  0
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_VLAN_T_PCP  1
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_VLAN_T_TPID 2
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_VLAN_T_VID  3
+
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_VLAN_T_FID_COUNT          4
+
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT \
+    {"CFI", BCM56780_A0_CNA_6_5_29_BCMPKT_VLAN_T_CFI},\
+    {"PCP", BCM56780_A0_CNA_6_5_29_BCMPKT_VLAN_T_PCP},\
+    {"TPID", BCM56780_A0_CNA_6_5_29_BCMPKT_VLAN_T_TPID},\
+    {"VID", BCM56780_A0_CNA_6_5_29_BCMPKT_VLAN_T_VID},\
+    {"vlan_t fid count", BCM56780_A0_CNA_6_5_29_BCMPKT_VLAN_T_FID_COUNT}
+
+/*!
+ * \name VXLAN_T field IDs.
+ */
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_VXLAN_T_FLAGS_RESERVED_1 0
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_VXLAN_T_RESERVED2        1
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_VXLAN_T_VN_ID            2
+
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_VXLAN_T_FID_COUNT          3
+
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT \
+    {"FLAGS_RESERVED_1", BCM56780_A0_CNA_6_5_29_BCMPKT_VXLAN_T_FLAGS_RESERVED_1},\
+    {"RESERVED2", BCM56780_A0_CNA_6_5_29_BCMPKT_VXLAN_T_RESERVED2},\
+    {"VN_ID", BCM56780_A0_CNA_6_5_29_BCMPKT_VXLAN_T_VN_ID},\
+    {"vxlan_t fid count", BCM56780_A0_CNA_6_5_29_BCMPKT_VXLAN_T_FID_COUNT}
+
+
+#endif /* BCM56780_A0_CNA_6_5_29_BCMPKT_FLEXHDR_DATA_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_bcmpkt_rxpmd_flex_data.h
new file mode 100644
index 000000000..abae240cc
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_bcmpkt_rxpmd_flex_data.h
@@ -0,0 +1,124 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) map.yml.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_DATA_H
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_DATA_H
+
+/*!
+ * \name RX flex metadata field IDs.
+ */
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0                                 0
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_DVP_15_0                                       1
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0                              2
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0                         3
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0                         4
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_DROP_CODE_15_0                      5
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_RECIRC_CODE_3_0                     6
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0                      7
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16                     8
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_ERSPAN3_GBP_SID_15_0                           9
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0                        10
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16                       11
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32                       12
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0                              13
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0                             14
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16                            15
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0                            16
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0 17
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0                    18
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_INT_PRI_3_0                                    19
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_L2_IIF_10_0                                    20
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_L2_OIF_10_0                                    21
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_L2_TUNNEL_SVP_15_0                             22
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_L3_IIF_13_0                                    23
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0                                  24
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_14_0              25
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_14_0                              26
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0                            27
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0                            28
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0                   29
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0                        30
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0                              31
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0                             32
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_TAG_ACTION_CTRL_1_0                            33
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0                34
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_VFI_15_0                                       35
+
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_FID_COUNT                       36
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_COUNT                    21
+
+/*!
+ * \name Packet Flex Reason Types.
+ */
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS                  0
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IFP                        1
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IFP_METER                  2
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IVXLT                      3
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP              4
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS         5
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD             6
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE         7
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP              8
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS         9
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR               10
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR               11
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL           12
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST            13
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED    14
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU             15
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED 16
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT               17
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED 18
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP                  19
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_VFP                        20
+
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT \
+    {"CML_FLAGS", BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS},\
+    {"IFP", BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IFP},\
+    {"IFP_METER", BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IFP_METER},\
+    {"IVXLT", BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IVXLT},\
+    {"L2_DST_LOOKUP", BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP},\
+    {"L2_DST_LOOKUP_MISS", BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS},\
+    {"L2_SRC_DISCARD", BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD},\
+    {"L2_SRC_STATIC_MOVE", BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE},\
+    {"L3_DST_LOOKUP", BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP},\
+    {"L3_DST_LOOKUP_MISS", BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS},\
+    {"L3_HDR_ERROR", BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR},\
+    {"L3_TTL_ERROR", BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR},\
+    {"LEARN_CACHE_FULL", BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL},\
+    {"MACSA_MULTICAST", BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST},\
+    {"MEMBERSHIP_CHECK_FAILED", BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED},\
+    {"NO_COPY_TO_CPU", BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU},\
+    {"PKT_INTEGRITY_CHECK_FAILED", BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED},\
+    {"PROTOCOL_PKT", BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT},\
+    {"SPANNING_TREE_CHECK_FAILED", BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED},\
+    {"TRACE_DOP", BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP},\
+    {"VFP", BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_VFP},\
+    {"flex reason count", BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_COUNT}
+
+#endif /* BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_DATA_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_bcmpkt_rxpmd_match_id_defs.h
new file mode 100644
index 000000000..a090e79e7
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_bcmpkt_rxpmd_match_id_defs.h
@@ -0,0 +1,213 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) bcm56780_a0_cna_6_5_29_sf_match_id_info.yml
+ * for device bcm56780_a0 and variant cna_6_5_29.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_MATCH_ID_DEFS_H
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_MATCH_ID_DEFS_H
+
+#include <bcmpkt/bcmpkt_rxpmd_match_id.h>
+
+/*!
+ * \brief Get the Match ID DataBase information.
+ *
+ * \retval bcmpkt_rxpmd_match_id_db_info_t Match ID DataBase information.
+*/
+extern bcmpkt_rxpmd_match_id_db_info_t *
+    bcm56780_a0_cna_6_5_29_rxpmd_match_id_db_info_get(void);
+
+/*!
+ * \brief Get the Match ID Mapping information.
+ *
+ * \retval bcmpkt_rxpmd_match_id_map_info_t Match ID Mapping information.
+*/
+extern bcmpkt_rxpmd_match_id_map_info_t *
+    bcm56780_a0_cna_6_5_29_rxpmd_match_id_map_info_get(void);
+
+/*!
+  \name RXPMD Match IDs
+*/
+#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG  0
+#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2  1
+#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE  2
+#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG  3
+#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP  4
+#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE  5
+#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP  6
+#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4  7
+#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6  8
+#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE  9
+#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP  10
+#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES  11
+#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES  12
+#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP  13
+#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3  14
+#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4  15
+#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5  16
+#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN  17
+#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH  18
+#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK  19
+#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE  20
+#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG  21
+#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2  22
+#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE  23
+#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG  24
+#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP  25
+#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE  26
+#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP  27
+#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4  28
+#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6  29
+#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE  30
+#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP  31
+#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES  32
+#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES  33
+#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP  34
+#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3  35
+#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4  36
+#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5  37
+#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN  38
+#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG  39
+#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2  40
+#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE  41
+#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG  42
+#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP  43
+#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE  44
+#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP  45
+#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4  46
+#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6  47
+#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE  48
+#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP  49
+#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES  50
+#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES  51
+#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP  52
+#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3  53
+#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4  54
+#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5  55
+#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG  56
+#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2  57
+#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE  58
+#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG  59
+#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP  60
+#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE  61
+#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP  62
+#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4  63
+#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6  64
+#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE  65
+#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP  66
+#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES  67
+#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES  68
+#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP  69
+#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3  70
+#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4  71
+#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5  72
+#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN  73
+#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH  74
+#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK  75
+#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE  76
+#define BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_COUNT  77
+
+#define BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT \
+    {"EGRESS_PKT_FWD_L2_HDR_ITAG", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG}, \
+    {"EGRESS_PKT_FWD_L2_HDR_L2", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2}, \
+    {"EGRESS_PKT_FWD_L2_HDR_NONE", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE}, \
+    {"EGRESS_PKT_FWD_L2_HDR_OTAG", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ARP", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ICMP", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IPV4", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IPV6", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_NONE", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_RARP", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UDP", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN}, \
+    {"EGRESS_PKT_SYS_HDR_EP_NIH", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH}, \
+    {"EGRESS_PKT_SYS_HDR_LOOPBACK", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK}, \
+    {"EGRESS_PKT_SYS_HDR_NONE", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_ITAG", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_L2", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_NONE", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_OTAG", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN}, \
+    {"INGRESS_PKT_INNER_L2_HDR_ITAG", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG}, \
+    {"INGRESS_PKT_INNER_L2_HDR_L2", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2}, \
+    {"INGRESS_PKT_INNER_L2_HDR_NONE", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE}, \
+    {"INGRESS_PKT_INNER_L2_HDR_OTAG", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ARP", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ICMP", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_IPV4", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_IPV6", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_NONE", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_RARP", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UDP", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_ITAG", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_L2", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_NONE", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_OTAG", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ARP", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_NONE", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_RARP", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UDP", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN}, \
+    {"INGRESS_PKT_SYS_HDR_EP_NIH", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH}, \
+    {"INGRESS_PKT_SYS_HDR_LOOPBACK", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK}, \
+    {"INGRESS_PKT_SYS_HDR_NONE", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE}, \
+    {"rxpmd_match_id_count", BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_COUNT}
+
+#endif /*! BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_MATCH_ID_DEFS_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_bcmpkt_flexhdr.h
new file mode 100644
index 000000000..0271370d2
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_bcmpkt_flexhdr.h
@@ -0,0 +1,180 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) header.yml.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM56780_A0_DNA_2_9_5_0_BCMPKT_FLEXHDR_H
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_FLEXHDR_H
+
+#include <bcmpkt/bcmpkt_flexhdr_internal.h>
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ARP_T                         0
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_AUTHEN_T                      1
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T                         2
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_CNTAG_T                       3
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_0_T            4
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_1_T            5
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_DEST_OPTION_T                 6
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_EP_NIH_HEADER_T               7
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T           8
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_SUBHDR_5_T            9
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ESP_T                         10
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ETAG_T                        11
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ETHERTYPE_T                   12
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_FRAG_T                        13
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T            14
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GPE_T                         15
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_CHKSUM_T                  16
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_KEY_T                     17
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_ROUT_T                    18
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_SEQ_T                     19
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_T                         20
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T                    21
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_EXTENSION_0_T             22
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HOP_BY_HOP_T                  23
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ICMP_T                        24
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_0_A_T             25
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_0_B_T             26
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_1_T               27
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_2_T               28
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_3_T               29
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_HEADER_T                  30
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_MD_BASE_T                 31
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_METADATA_T                32
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IGMP_T                        33
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPFIX_T                       34
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV4_T                        35
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV6_T                        36
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_L2_T                          37
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_MIRROR_ERSPAN_SN_T            38
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_MIRROR_TRANSPORT_T            39
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_ACH_T                    40
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_BV_T                     41
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_CW_T                     42
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_T                        43
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T                      44
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PROG_EXT_HDR_T                45
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_0_T                     46
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_1_T                     47
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T      48
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T      49
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T      50
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RARP_T                        51
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ROUTING_T                     52
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RSPAN_T                       53
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_0_T                54
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_1_T                55
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_2_T                56
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_SNAP_LLC_T                    57
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_SVTAG_T                       58
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_TCP_FIRST_4BYTES_T            59
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_TCP_LAST_16BYTES_T            60
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_UDP_T                         61
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L3_T                  62
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L4_T                  63
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L5_T                  64
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_VLAN_T                        65
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_VNTAG_T                       66
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_VXLAN_T                       67
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_WESP_T                        68
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_T                  69
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_FLEXHDR_COUNT    70
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_FLEXHDR_NAME_MAP_INIT \
+    {"arp_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ARP_T},\
+    {"authen_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_AUTHEN_T},\
+    {"bfd_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T},\
+    {"cntag_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_CNTAG_T},\
+    {"cpu_composites_0_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_0_T},\
+    {"cpu_composites_1_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_1_T},\
+    {"dest_option_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_DEST_OPTION_T},\
+    {"ep_nih_header_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_EP_NIH_HEADER_T},\
+    {"erspan3_fixed_hdr_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T},\
+    {"erspan3_subhdr_5_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_SUBHDR_5_T},\
+    {"esp_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ESP_T},\
+    {"etag_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ETAG_T},\
+    {"ethertype_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ETHERTYPE_T},\
+    {"frag_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_FRAG_T},\
+    {"generic_loopback_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T},\
+    {"gpe_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GPE_T},\
+    {"gre_chksum_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_CHKSUM_T},\
+    {"gre_key_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_KEY_T},\
+    {"gre_rout_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_ROUT_T},\
+    {"gre_seq_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_SEQ_T},\
+    {"gre_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_T},\
+    {"hg3_base_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T},\
+    {"hg3_extension_0_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_EXTENSION_0_T},\
+    {"hop_by_hop_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_HOP_BY_HOP_T},\
+    {"icmp_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ICMP_T},\
+    {"ifa_flex_md_0_a_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_0_A_T},\
+    {"ifa_flex_md_0_b_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_0_B_T},\
+    {"ifa_flex_md_1_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_1_T},\
+    {"ifa_flex_md_2_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_2_T},\
+    {"ifa_flex_md_3_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_3_T},\
+    {"ifa_header_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_HEADER_T},\
+    {"ifa_md_base_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_MD_BASE_T},\
+    {"ifa_metadata_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_METADATA_T},\
+    {"igmp_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IGMP_T},\
+    {"ipfix_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPFIX_T},\
+    {"ipv4_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV4_T},\
+    {"ipv6_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV6_T},\
+    {"l2_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_L2_T},\
+    {"mirror_erspan_sn_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_MIRROR_ERSPAN_SN_T},\
+    {"mirror_transport_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_MIRROR_TRANSPORT_T},\
+    {"mpls_ach_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_ACH_T},\
+    {"mpls_bv_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_BV_T},\
+    {"mpls_cw_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_CW_T},\
+    {"mpls_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_T},\
+    {"p_1588_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T},\
+    {"prog_ext_hdr_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PROG_EXT_HDR_T},\
+    {"psamp_0_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_0_T},\
+    {"psamp_1_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_1_T},\
+    {"psamp_mirror_on_drop_0_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T},\
+    {"psamp_mirror_on_drop_1_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T},\
+    {"psamp_mirror_on_drop_2_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T},\
+    {"rarp_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RARP_T},\
+    {"routing_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ROUTING_T},\
+    {"rspan_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RSPAN_T},\
+    {"sflow_shim_0_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_0_T},\
+    {"sflow_shim_1_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_1_T},\
+    {"sflow_shim_2_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_2_T},\
+    {"snap_llc_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_SNAP_LLC_T},\
+    {"svtag_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_SVTAG_T},\
+    {"tcp_first_4bytes_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_TCP_FIRST_4BYTES_T},\
+    {"tcp_last_16bytes_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_TCP_LAST_16BYTES_T},\
+    {"udp_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_UDP_T},\
+    {"unknown_l3_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L3_T},\
+    {"unknown_l4_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L4_T},\
+    {"unknown_l5_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L5_T},\
+    {"vlan_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_VLAN_T},\
+    {"vntag_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_VNTAG_T},\
+    {"vxlan_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_VXLAN_T},\
+    {"wesp_t", BCM56780_A0_DNA_2_9_5_0_BCMPKT_WESP_T},\
+    {"RXPMD_FLEX_T", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_T},\
+    {"flexhdr count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_FLEXHDR_COUNT}
+
+#endif /* BCM56780_A0_DNA_2_9_5_0_BCMPKT_FLEXHDR_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_bcmpkt_flexhdr_data.h
new file mode 100644
index 000000000..11489d58c
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_bcmpkt_flexhdr_data.h
@@ -0,0 +1,1343 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) header.yml.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM56780_A0_DNA_2_9_5_0_BCMPKT_FLEXHDR_DATA_H
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_FLEXHDR_DATA_H
+
+/*!
+ * \name ARP_T field IDs.
+ */
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ARP_T_HARDWARE_LEN  0
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ARP_T_HARDWARE_TYPE 1
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ARP_T_OPERATION     2
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ARP_T_PROT_ADDR_LEN 3
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ARP_T_PROTOCOL_TYPE 4
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ARP_T_SENDER_HA     5
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ARP_T_SENDER_IP     6
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ARP_T_TARGET_HA     7
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ARP_T_TARGET_IP     8
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ARP_T_FID_COUNT          9
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT \
+    {"HARDWARE_LEN", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ARP_T_HARDWARE_LEN},\
+    {"HARDWARE_TYPE", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ARP_T_HARDWARE_TYPE},\
+    {"OPERATION", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ARP_T_OPERATION},\
+    {"PROT_ADDR_LEN", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ARP_T_PROT_ADDR_LEN},\
+    {"PROTOCOL_TYPE", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ARP_T_PROTOCOL_TYPE},\
+    {"SENDER_HA", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ARP_T_SENDER_HA},\
+    {"SENDER_IP", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ARP_T_SENDER_IP},\
+    {"TARGET_HA", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ARP_T_TARGET_HA},\
+    {"TARGET_IP", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ARP_T_TARGET_IP},\
+    {"arp_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ARP_T_FID_COUNT}
+
+/*!
+ * \name AUTHEN_T field IDs.
+ */
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_AUTHEN_T_DATA        0
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_AUTHEN_T_NEXT_HEADER 1
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_AUTHEN_T_PAYLOAD_LEN 2
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_AUTHEN_T_RESERVED    3
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_AUTHEN_T_SEQ_NUM     4
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_AUTHEN_T_SPI         5
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_AUTHEN_T_FID_COUNT          6
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT \
+    {"DATA", BCM56780_A0_DNA_2_9_5_0_BCMPKT_AUTHEN_T_DATA},\
+    {"NEXT_HEADER", BCM56780_A0_DNA_2_9_5_0_BCMPKT_AUTHEN_T_NEXT_HEADER},\
+    {"PAYLOAD_LEN", BCM56780_A0_DNA_2_9_5_0_BCMPKT_AUTHEN_T_PAYLOAD_LEN},\
+    {"RESERVED", BCM56780_A0_DNA_2_9_5_0_BCMPKT_AUTHEN_T_RESERVED},\
+    {"SEQ_NUM", BCM56780_A0_DNA_2_9_5_0_BCMPKT_AUTHEN_T_SEQ_NUM},\
+    {"SPI", BCM56780_A0_DNA_2_9_5_0_BCMPKT_AUTHEN_T_SPI},\
+    {"authen_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_AUTHEN_T_FID_COUNT}
+
+/*!
+ * \name BFD_T field IDs.
+ */
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_AP            0
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_BFD_LENGTH    1
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_CPI           2
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_DEM           3
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_DESMINTXINTV  4
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_DETECTMULT    5
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_DIAG          6
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_FIN           7
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_MINECHORXINTV 8
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_MPT           9
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_MYDISCRIM     10
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_POLL          11
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_REQMINRXINTV  12
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_STA           13
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_URDISCRIM     14
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_VERSION       15
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_FID_COUNT          16
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT \
+    {"AP", BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_AP},\
+    {"BFD_LENGTH", BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_BFD_LENGTH},\
+    {"CPI", BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_CPI},\
+    {"DEM", BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_DEM},\
+    {"DESMINTXINTV", BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_DESMINTXINTV},\
+    {"DETECTMULT", BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_DETECTMULT},\
+    {"DIAG", BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_DIAG},\
+    {"FIN", BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_FIN},\
+    {"MINECHORXINTV", BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_MINECHORXINTV},\
+    {"MPT", BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_MPT},\
+    {"MYDISCRIM", BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_MYDISCRIM},\
+    {"POLL", BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_POLL},\
+    {"REQMINRXINTV", BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_REQMINRXINTV},\
+    {"STA", BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_STA},\
+    {"URDISCRIM", BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_URDISCRIM},\
+    {"VERSION", BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_VERSION},\
+    {"bfd_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_FID_COUNT}
+
+/*!
+ * \name CNTAG_T field IDs.
+ */
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_CNTAG_T_RPID 0
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_CNTAG_T_TPID 1
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_CNTAG_T_FID_COUNT          2
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT \
+    {"RPID", BCM56780_A0_DNA_2_9_5_0_BCMPKT_CNTAG_T_RPID},\
+    {"TPID", BCM56780_A0_DNA_2_9_5_0_BCMPKT_CNTAG_T_TPID},\
+    {"cntag_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_CNTAG_T_FID_COUNT}
+
+/*!
+ * \name CPU_COMPOSITES_0_T field IDs.
+ */
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0 0
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1 1
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2 2
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3 3
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4 4
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5 5
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6 6
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT          7
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT \
+    {"DMA_CONT0", BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0},\
+    {"DMA_CONT1", BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1},\
+    {"DMA_CONT2", BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2},\
+    {"DMA_CONT3", BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3},\
+    {"DMA_CONT4", BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4},\
+    {"DMA_CONT5", BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5},\
+    {"DMA_CONT6", BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6},\
+    {"cpu_composites_0_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT}
+
+/*!
+ * \name CPU_COMPOSITES_1_T field IDs.
+ */
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10 0
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11 1
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12 2
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13 3
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14 4
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15 5
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16 6
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17 7
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7  8
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8  9
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9  10
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT          11
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT \
+    {"DMA_CONT10", BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10},\
+    {"DMA_CONT11", BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11},\
+    {"DMA_CONT12", BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12},\
+    {"DMA_CONT13", BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13},\
+    {"DMA_CONT14", BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14},\
+    {"DMA_CONT15", BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15},\
+    {"DMA_CONT16", BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16},\
+    {"DMA_CONT17", BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17},\
+    {"DMA_CONT7", BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7},\
+    {"DMA_CONT8", BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8},\
+    {"DMA_CONT9", BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9},\
+    {"cpu_composites_1_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT}
+
+/*!
+ * \name DEST_OPTION_T field IDs.
+ */
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN 0
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_DEST_OPTION_T_NEXT_HEADER 1
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_DEST_OPTION_T_OPTION      2
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_DEST_OPTION_T_FID_COUNT          3
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT \
+    {"HDR_EXT_LEN", BCM56780_A0_DNA_2_9_5_0_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN},\
+    {"NEXT_HEADER", BCM56780_A0_DNA_2_9_5_0_BCMPKT_DEST_OPTION_T_NEXT_HEADER},\
+    {"OPTION", BCM56780_A0_DNA_2_9_5_0_BCMPKT_DEST_OPTION_T_OPTION},\
+    {"dest_option_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_DEST_OPTION_T_FID_COUNT}
+
+/*!
+ * \name EP_NIH_HEADER_T field IDs.
+ */
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE       0
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE          1
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A        2
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B        3
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C        4
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A      5
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B      6
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C      7
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX 8
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_EP_NIH_HEADER_T_RESERVED_0           9
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_EP_NIH_HEADER_T_START                10
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP            11
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT          12
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT \
+    {"HEADER_SUBTYPE", BCM56780_A0_DNA_2_9_5_0_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE},\
+    {"HEADER_TYPE", BCM56780_A0_DNA_2_9_5_0_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE},\
+    {"OPAQUE_CTRL_A", BCM56780_A0_DNA_2_9_5_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A},\
+    {"OPAQUE_CTRL_B", BCM56780_A0_DNA_2_9_5_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B},\
+    {"OPAQUE_CTRL_C", BCM56780_A0_DNA_2_9_5_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C},\
+    {"OPAQUE_OBJECT_A", BCM56780_A0_DNA_2_9_5_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A},\
+    {"OPAQUE_OBJECT_B", BCM56780_A0_DNA_2_9_5_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B},\
+    {"OPAQUE_OBJECT_C", BCM56780_A0_DNA_2_9_5_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C},\
+    {"RECIRC_PROFILE_INDEX", BCM56780_A0_DNA_2_9_5_0_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX},\
+    {"RESERVED_0", BCM56780_A0_DNA_2_9_5_0_BCMPKT_EP_NIH_HEADER_T_RESERVED_0},\
+    {"START", BCM56780_A0_DNA_2_9_5_0_BCMPKT_EP_NIH_HEADER_T_START},\
+    {"TIMESTAMP", BCM56780_A0_DNA_2_9_5_0_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP},\
+    {"ep_nih_header_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT}
+
+/*!
+ * \name ERSPAN3_FIXED_HDR_T field IDs.
+ */
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO               0
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS               1
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID           2
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O 3
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID        4
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T                 5
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP         6
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER               7
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN              8
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT          9
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT \
+    {"BSO", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO},\
+    {"COS", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS},\
+    {"GBP_SID", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID},\
+    {"P_FT_HWID_D_GRA_O", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O},\
+    {"SESSION_ID", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID},\
+    {"T", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T},\
+    {"TIMESTAMP", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP},\
+    {"VER", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER},\
+    {"VLAN", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN},\
+    {"erspan3_fixed_hdr_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT}
+
+/*!
+ * \name ERSPAN3_SUBHDR_5_T field IDs.
+ */
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID 0
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID     1
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID   2
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP   3
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT          4
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT \
+    {"PLATFORM_ID", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID},\
+    {"PORT_ID", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID},\
+    {"SWITCH_ID", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID},\
+    {"TIMESTAMP", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP},\
+    {"erspan3_subhdr_5_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT}
+
+/*!
+ * \name ESP_T field IDs.
+ */
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ESP_T_NEXT_HEADER 0
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ESP_T_PAD         1
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ESP_T_PAD_LEN     2
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ESP_T_SEQ_NUM     3
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ESP_T_SPI         4
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ESP_T_FID_COUNT          5
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT \
+    {"NEXT_HEADER", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ESP_T_NEXT_HEADER},\
+    {"PAD", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ESP_T_PAD},\
+    {"PAD_LEN", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ESP_T_PAD_LEN},\
+    {"SEQ_NUM", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ESP_T_SEQ_NUM},\
+    {"SPI", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ESP_T_SPI},\
+    {"esp_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ESP_T_FID_COUNT}
+
+/*!
+ * \name ETAG_T field IDs.
+ */
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ETAG_T_TAG  0
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ETAG_T_TPID 1
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ETAG_T_FID_COUNT          2
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ETAG_T_FIELD_NAME_MAP_INIT \
+    {"TAG", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ETAG_T_TAG},\
+    {"TPID", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ETAG_T_TPID},\
+    {"etag_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ETAG_T_FID_COUNT}
+
+/*!
+ * \name ETHERTYPE_T field IDs.
+ */
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ETHERTYPE_T_TYPE 0
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ETHERTYPE_T_FID_COUNT          1
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT \
+    {"TYPE", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ETHERTYPE_T_TYPE},\
+    {"ethertype_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ETHERTYPE_T_FID_COUNT}
+
+/*!
+ * \name FRAG_T field IDs.
+ */
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_FRAG_T_FRAG_INFO   0
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_FRAG_T_ID          1
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_FRAG_T_NEXT_HEADER 2
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_FRAG_T_RESERVED    3
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_FRAG_T_FID_COUNT          4
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT \
+    {"FRAG_INFO", BCM56780_A0_DNA_2_9_5_0_BCMPKT_FRAG_T_FRAG_INFO},\
+    {"ID", BCM56780_A0_DNA_2_9_5_0_BCMPKT_FRAG_T_ID},\
+    {"NEXT_HEADER", BCM56780_A0_DNA_2_9_5_0_BCMPKT_FRAG_T_NEXT_HEADER},\
+    {"RESERVED", BCM56780_A0_DNA_2_9_5_0_BCMPKT_FRAG_T_RESERVED},\
+    {"frag_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_FRAG_T_FID_COUNT}
+
+/*!
+ * \name GENERIC_LOOPBACK_T field IDs.
+ */
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ    0
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE   1
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ        2
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS              3
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE        4
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY     5
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL     6
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ      7
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0  8
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1  9
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ            10
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1         11
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2         12
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT 13
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE         14
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT          15
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT \
+    {"DESTINATION_OBJ", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ},\
+    {"DESTINATION_TYPE", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE},\
+    {"ENTROPY_OBJ", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ},\
+    {"FLAGS", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS},\
+    {"HEADER_TYPE", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE},\
+    {"INPUT_PRIORITY", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY},\
+    {"INTERFACE_CTRL", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL},\
+    {"INTERFACE_OBJ", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ},\
+    {"PROCESSING_CTRL_0", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0},\
+    {"PROCESSING_CTRL_1", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1},\
+    {"QOS_OBJ", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ},\
+    {"RESERVED_1", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1},\
+    {"RESERVED_2", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2},\
+    {"SOURCE_SYSTEM_PORT", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT},\
+    {"START_BYTE", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE},\
+    {"generic_loopback_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT}
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NO_OP       0
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2_OIF      1
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED    2
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__VP          3
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP        4
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NHOP        5
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2MC_GROUP  6
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L3MC_GROUP  7
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED_1  8
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP_MEMBER 9
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__DEVICE_PORT 10
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__TUNNEL  0
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__GENERIC 1
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__NOOP   0
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__VFI    1
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__L3_IIF 2
+
+/*!
+ * \name GPE_T field IDs.
+ */
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GPE_T_FLAGS         0
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GPE_T_NEXT_PROTOCOL 1
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GPE_T_RESERVED0     2
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GPE_T_RESERVED1     3
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GPE_T_VNI           4
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GPE_T_FID_COUNT          5
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT \
+    {"FLAGS", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GPE_T_FLAGS},\
+    {"NEXT_PROTOCOL", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GPE_T_NEXT_PROTOCOL},\
+    {"RESERVED0", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GPE_T_RESERVED0},\
+    {"RESERVED1", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GPE_T_RESERVED1},\
+    {"VNI", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GPE_T_VNI},\
+    {"gpe_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GPE_T_FID_COUNT}
+
+/*!
+ * \name GRE_CHKSUM_T field IDs.
+ */
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_CHKSUM_T_CHECKSUM 0
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_CHKSUM_T_OFFSET   1
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT          2
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT \
+    {"CHECKSUM", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_CHKSUM_T_CHECKSUM},\
+    {"OFFSET", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_CHKSUM_T_OFFSET},\
+    {"gre_chksum_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT}
+
+/*!
+ * \name GRE_KEY_T field IDs.
+ */
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_KEY_T_KEY 0
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_KEY_T_FID_COUNT          1
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT \
+    {"KEY", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_KEY_T_KEY},\
+    {"gre_key_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_KEY_T_FID_COUNT}
+
+/*!
+ * \name GRE_ROUT_T field IDs.
+ */
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_ROUT_T_ROUTING 0
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_ROUT_T_FID_COUNT          1
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT \
+    {"ROUTING", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_ROUT_T_ROUTING},\
+    {"gre_rout_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_ROUT_T_FID_COUNT}
+
+/*!
+ * \name GRE_SEQ_T field IDs.
+ */
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_SEQ_T_SEQUENCE 0
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_SEQ_T_FID_COUNT          1
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT \
+    {"SEQUENCE", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_SEQ_T_SEQUENCE},\
+    {"gre_seq_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_SEQ_T_FID_COUNT}
+
+/*!
+ * \name GRE_T field IDs.
+ */
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_T_C_R_K_S  0
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_T_PROTOCOL 1
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_T_RESERVED 2
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_T_VERSION  3
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_T_FID_COUNT          4
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT \
+    {"C_R_K_S", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_T_C_R_K_S},\
+    {"PROTOCOL", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_T_PROTOCOL},\
+    {"RESERVED", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_T_RESERVED},\
+    {"VERSION", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_T_VERSION},\
+    {"gre_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_T_FID_COUNT}
+
+/*!
+ * \name HG3_BASE_T field IDs.
+ */
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_CN                      0
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_CNG                     1
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_ENTROPY                 2
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_EXT_HDR_PRESENT         3
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_HG3_RESERVED            4
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_L3_ROUTED               5
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_MIRROR_COPY             6
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_RESERVED_ETYPE          7
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION      8
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION_TYPE 9
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_SYSTEM_SOURCE           10
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_TC                      11
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_VERSION                 12
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_FID_COUNT          13
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_FIELD_NAME_MAP_INIT \
+    {"CN", BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_CN},\
+    {"CNG", BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_CNG},\
+    {"ENTROPY", BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_ENTROPY},\
+    {"EXT_HDR_PRESENT", BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_EXT_HDR_PRESENT},\
+    {"HG3_RESERVED", BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_HG3_RESERVED},\
+    {"L3_ROUTED", BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_L3_ROUTED},\
+    {"MIRROR_COPY", BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_MIRROR_COPY},\
+    {"RESERVED_ETYPE", BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_RESERVED_ETYPE},\
+    {"SYSTEM_DESTINATION", BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION},\
+    {"SYSTEM_DESTINATION_TYPE", BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION_TYPE},\
+    {"SYSTEM_SOURCE", BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_SYSTEM_SOURCE},\
+    {"TC", BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_TC},\
+    {"VERSION", BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_VERSION},\
+    {"hg3_base_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_FID_COUNT}
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__NO_OP       0
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L2_OIF      1
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__RESERVED    2
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__VP          3
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__ECMP        4
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__NHOP        5
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L2MC_GROUP  6
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L3MC_GROUP  7
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__RESERVED_1  8
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__ECMP_MEMBER 9
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__DEVICE_PORT 10
+
+/*!
+ * \name HG3_EXTENSION_0_T field IDs.
+ */
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID          0
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_EXTENSION_0_T_DVP_OR_L3_IIF     1
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_EXTENSION_0_T_FLAGS             2
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_EXTENSION_0_T_FORWARDING_DOMAIN 3
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_EXTENSION_0_T_SVP               4
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT          5
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_EXTENSION_0_T_FIELD_NAME_MAP_INIT \
+    {"CLASS_ID", BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID},\
+    {"DVP_OR_L3_IIF", BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_EXTENSION_0_T_DVP_OR_L3_IIF},\
+    {"FLAGS", BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_EXTENSION_0_T_FLAGS},\
+    {"FORWARDING_DOMAIN", BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_EXTENSION_0_T_FORWARDING_DOMAIN},\
+    {"SVP", BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_EXTENSION_0_T_SVP},\
+    {"hg3_extension_0_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT}
+
+/*!
+ * \name HOP_BY_HOP_T field IDs.
+ */
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN 0
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER 1
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HOP_BY_HOP_T_OPTION      2
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT          3
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT \
+    {"HDR_EXT_LEN", BCM56780_A0_DNA_2_9_5_0_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN},\
+    {"NEXT_HEADER", BCM56780_A0_DNA_2_9_5_0_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER},\
+    {"OPTION", BCM56780_A0_DNA_2_9_5_0_BCMPKT_HOP_BY_HOP_T_OPTION},\
+    {"hop_by_hop_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT}
+
+/*!
+ * \name ICMP_T field IDs.
+ */
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ICMP_T_CHECKSUM  0
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ICMP_T_CODE      1
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ICMP_T_ICMP_TYPE 2
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ICMP_T_FID_COUNT          3
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT \
+    {"CHECKSUM", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ICMP_T_CHECKSUM},\
+    {"CODE", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ICMP_T_CODE},\
+    {"ICMP_TYPE", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ICMP_T_ICMP_TYPE},\
+    {"icmp_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ICMP_T_FID_COUNT}
+
+/*!
+ * \name IFA_FLEX_MD_0_A_T field IDs.
+ */
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_0_A_T_FWD_HDR_TTL   0
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_0_A_T_LNS_DEVICE_ID 1
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT          2
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_0_A_T_FIELD_NAME_MAP_INIT \
+    {"FWD_HDR_TTL", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_0_A_T_FWD_HDR_TTL},\
+    {"LNS_DEVICE_ID", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_0_A_T_LNS_DEVICE_ID},\
+    {"ifa_flex_md_0_a_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT}
+
+/*!
+ * \name IFA_FLEX_MD_0_B_T field IDs.
+ */
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_0_B_T_CN               0
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_0_B_T_PORT_SPEED       1
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_0_B_T_QUEUE_ID         2
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_0_B_T_RX_TIMESTAMP_SEC 3
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT          4
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_0_B_T_FIELD_NAME_MAP_INIT \
+    {"CN", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_0_B_T_CN},\
+    {"PORT_SPEED", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_0_B_T_PORT_SPEED},\
+    {"QUEUE_ID", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_0_B_T_QUEUE_ID},\
+    {"RX_TIMESTAMP_SEC", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_0_B_T_RX_TIMESTAMP_SEC},\
+    {"ifa_flex_md_0_b_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT}
+
+/*!
+ * \name IFA_FLEX_MD_1_T field IDs.
+ */
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_1_T_EGRESS_PORT_ID       0
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_1_T_INGRESS_PORT_ID      1
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_1_T_RX_TIMESTAMP_NANOSEC 2
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT          3
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_1_T_FIELD_NAME_MAP_INIT \
+    {"EGRESS_PORT_ID", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_1_T_EGRESS_PORT_ID},\
+    {"INGRESS_PORT_ID", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_1_T_INGRESS_PORT_ID},\
+    {"RX_TIMESTAMP_NANOSEC", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_1_T_RX_TIMESTAMP_NANOSEC},\
+    {"ifa_flex_md_1_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT}
+
+/*!
+ * \name IFA_FLEX_MD_2_T field IDs.
+ */
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_2_T_RESIDENCE_TIME_NANOSEC 0
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_2_T_TX_QUEUE_BYTE_COUNT    1
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT          2
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_2_T_FIELD_NAME_MAP_INIT \
+    {"RESIDENCE_TIME_NANOSEC", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_2_T_RESIDENCE_TIME_NANOSEC},\
+    {"TX_QUEUE_BYTE_COUNT", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_2_T_TX_QUEUE_BYTE_COUNT},\
+    {"ifa_flex_md_2_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT}
+
+/*!
+ * \name IFA_FLEX_MD_3_T field IDs.
+ */
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_0 0
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_1 1
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT          2
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_3_T_FIELD_NAME_MAP_INIT \
+    {"MMU_STAT_0", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_0},\
+    {"MMU_STAT_1", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_1},\
+    {"ifa_flex_md_3_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT}
+
+/*!
+ * \name IFA_HEADER_T field IDs.
+ */
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_HEADER_T_FLAGS      0
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_HEADER_T_GNS        1
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_HEADER_T_MAX_LENGTH 2
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_HEADER_T_NEXT_HDR   3
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_HEADER_T_VER        4
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_HEADER_T_FID_COUNT          5
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT \
+    {"FLAGS", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_HEADER_T_FLAGS},\
+    {"GNS", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_HEADER_T_GNS},\
+    {"MAX_LENGTH", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_HEADER_T_MAX_LENGTH},\
+    {"NEXT_HDR", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_HEADER_T_NEXT_HDR},\
+    {"VER", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_HEADER_T_VER},\
+    {"ifa_header_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_HEADER_T_FID_COUNT}
+
+/*!
+ * \name IFA_MD_BASE_T field IDs.
+ */
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_MD_BASE_T_ACTION_VECTOR            0
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_MD_BASE_T_HOP_LIMIT_CURRENT_LENGTH 1
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_MD_BASE_T_REQUEST_VECTOR           2
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT          3
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_MD_BASE_T_FIELD_NAME_MAP_INIT \
+    {"ACTION_VECTOR", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_MD_BASE_T_ACTION_VECTOR},\
+    {"HOP_LIMIT_CURRENT_LENGTH", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_MD_BASE_T_HOP_LIMIT_CURRENT_LENGTH},\
+    {"REQUEST_VECTOR", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_MD_BASE_T_REQUEST_VECTOR},\
+    {"ifa_md_base_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT}
+
+/*!
+ * \name IFA_METADATA_T field IDs.
+ */
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_METADATA_T_ACTION_VECTOR            0
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_METADATA_T_HOP_LIMIT_CURRENT_LENGTH 1
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_METADATA_T_METADATA                 2
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_METADATA_T_REQUEST_VECTOR           3
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_METADATA_T_FID_COUNT          4
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_METADATA_T_FIELD_NAME_MAP_INIT \
+    {"ACTION_VECTOR", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_METADATA_T_ACTION_VECTOR},\
+    {"HOP_LIMIT_CURRENT_LENGTH", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_METADATA_T_HOP_LIMIT_CURRENT_LENGTH},\
+    {"METADATA", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_METADATA_T_METADATA},\
+    {"REQUEST_VECTOR", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_METADATA_T_REQUEST_VECTOR},\
+    {"ifa_metadata_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_METADATA_T_FID_COUNT}
+
+/*!
+ * \name IGMP_T field IDs.
+ */
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IGMP_T_CHECKSUM      0
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IGMP_T_GROUP_ADDRESS 1
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IGMP_T_IGMP_TYPE     2
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IGMP_T_MAX_RESP_TIME 3
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IGMP_T_FID_COUNT          4
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT \
+    {"CHECKSUM", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IGMP_T_CHECKSUM},\
+    {"GROUP_ADDRESS", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IGMP_T_GROUP_ADDRESS},\
+    {"IGMP_TYPE", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IGMP_T_IGMP_TYPE},\
+    {"MAX_RESP_TIME", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IGMP_T_MAX_RESP_TIME},\
+    {"igmp_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IGMP_T_FID_COUNT}
+
+/*!
+ * \name IPFIX_T field IDs.
+ */
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPFIX_T_EXPORT_TIME   0
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPFIX_T_LENGTH        1
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID 2
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPFIX_T_SEQUENCE_NUM  3
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPFIX_T_VERSION       4
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPFIX_T_FID_COUNT          5
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT \
+    {"EXPORT_TIME", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPFIX_T_EXPORT_TIME},\
+    {"LENGTH", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPFIX_T_LENGTH},\
+    {"OBS_DOMAIN_ID", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID},\
+    {"SEQUENCE_NUM", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPFIX_T_SEQUENCE_NUM},\
+    {"VERSION", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPFIX_T_VERSION},\
+    {"ipfix_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPFIX_T_FID_COUNT}
+
+/*!
+ * \name IPV4_T field IDs.
+ */
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV4_T_DA                0
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET 1
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV4_T_HDR_CHECKSUM      2
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV4_T_ID                3
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV4_T_OPTION            4
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV4_T_PROTOCOL          5
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV4_T_SA                6
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV4_T_TOS               7
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV4_T_TOTAL_LENGTH      8
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV4_T_TTL               9
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV4_T_VERSION_HDR_LEN   10
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV4_T_FID_COUNT          11
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT \
+    {"DA", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV4_T_DA},\
+    {"FLAGS_FRAG_OFFSET", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET},\
+    {"HDR_CHECKSUM", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV4_T_HDR_CHECKSUM},\
+    {"ID", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV4_T_ID},\
+    {"OPTION", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV4_T_OPTION},\
+    {"PROTOCOL", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV4_T_PROTOCOL},\
+    {"SA", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV4_T_SA},\
+    {"TOS", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV4_T_TOS},\
+    {"TOTAL_LENGTH", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV4_T_TOTAL_LENGTH},\
+    {"TTL", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV4_T_TTL},\
+    {"VERSION_HDR_LEN", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV4_T_VERSION_HDR_LEN},\
+    {"ipv4_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV4_T_FID_COUNT}
+
+/*!
+ * \name IPV6_T field IDs.
+ */
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV6_T_DA             0
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV6_T_FLOW_LABEL     1
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV6_T_HOP_LIMIT      2
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV6_T_NEXT_HEADER    3
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH 4
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV6_T_SA             5
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV6_T_TRAFFIC_CLASS  6
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV6_T_VERSION        7
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV6_T_FID_COUNT          8
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT \
+    {"DA", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV6_T_DA},\
+    {"FLOW_LABEL", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV6_T_FLOW_LABEL},\
+    {"HOP_LIMIT", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV6_T_HOP_LIMIT},\
+    {"NEXT_HEADER", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV6_T_NEXT_HEADER},\
+    {"PAYLOAD_LENGTH", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH},\
+    {"SA", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV6_T_SA},\
+    {"TRAFFIC_CLASS", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV6_T_TRAFFIC_CLASS},\
+    {"VERSION", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV6_T_VERSION},\
+    {"ipv6_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV6_T_FID_COUNT}
+
+/*!
+ * \name L2_T field IDs.
+ */
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_L2_T_MACDA 0
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_L2_T_MACSA 1
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_L2_T_FID_COUNT          2
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT \
+    {"MACDA", BCM56780_A0_DNA_2_9_5_0_BCMPKT_L2_T_MACDA},\
+    {"MACSA", BCM56780_A0_DNA_2_9_5_0_BCMPKT_L2_T_MACSA},\
+    {"l2_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_L2_T_FID_COUNT}
+
+/*!
+ * \name MIRROR_ERSPAN_SN_T field IDs.
+ */
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM 0
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT          1
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT \
+    {"SEQ_NUM", BCM56780_A0_DNA_2_9_5_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM},\
+    {"mirror_erspan_sn_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT}
+
+/*!
+ * \name MIRROR_TRANSPORT_T field IDs.
+ */
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_MIRROR_TRANSPORT_T_DATA 0
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT          1
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT \
+    {"DATA", BCM56780_A0_DNA_2_9_5_0_BCMPKT_MIRROR_TRANSPORT_T_DATA},\
+    {"mirror_transport_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT}
+
+/*!
+ * \name MPLS_ACH_T field IDs.
+ */
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE 0
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_ACH_T_CW_TYPE      1
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_ACH_T_RESERVED     2
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_ACH_T_VERSION      3
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_ACH_T_FID_COUNT          4
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT \
+    {"CHANNEL_TYPE", BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE},\
+    {"CW_TYPE", BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_ACH_T_CW_TYPE},\
+    {"RESERVED", BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_ACH_T_RESERVED},\
+    {"VERSION", BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_ACH_T_VERSION},\
+    {"mpls_ach_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_ACH_T_FID_COUNT}
+
+/*!
+ * \name MPLS_BV_T field IDs.
+ */
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_BV_T_VALUE 0
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_BV_T_FID_COUNT          1
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT \
+    {"VALUE", BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_BV_T_VALUE},\
+    {"mpls_bv_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_BV_T_FID_COUNT}
+
+/*!
+ * \name MPLS_CW_T field IDs.
+ */
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_CW_T_CW_TYPE    0
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_CW_T_RESERVED   1
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_CW_T_SEQ_NUMBER 2
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_CW_T_FID_COUNT          3
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT \
+    {"CW_TYPE", BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_CW_T_CW_TYPE},\
+    {"RESERVED", BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_CW_T_RESERVED},\
+    {"SEQ_NUMBER", BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_CW_T_SEQ_NUMBER},\
+    {"mpls_cw_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_CW_T_FID_COUNT}
+
+/*!
+ * \name MPLS_T field IDs.
+ */
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_T_BOS   0
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_T_EXP   1
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_T_LABEL 2
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_T_TTL   3
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_T_FID_COUNT          4
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT \
+    {"BOS", BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_T_BOS},\
+    {"EXP", BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_T_EXP},\
+    {"LABEL", BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_T_LABEL},\
+    {"TTL", BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_T_TTL},\
+    {"mpls_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_T_FID_COUNT}
+
+/*!
+ * \name P_1588_T field IDs.
+ */
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T_CNTRL          0
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T_CORRECTION     1
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T_DOMAIN_NB      2
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T_FLAGS          3
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T_LOGMSGINTERVAL 4
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T_MSG_LENGTH     5
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T_MSG_TYPE       6
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T_RESERVED1      7
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T_RESERVED2      8
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T_RESERVED3      9
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T_SEQ_ID         10
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T_SRCPORTID      11
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T_TRANSPORTSPEC  12
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T_VERSION        13
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T_FID_COUNT          14
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT \
+    {"CNTRL", BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T_CNTRL},\
+    {"CORRECTION", BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T_CORRECTION},\
+    {"DOMAIN_NB", BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T_DOMAIN_NB},\
+    {"FLAGS", BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T_FLAGS},\
+    {"LOGMSGINTERVAL", BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T_LOGMSGINTERVAL},\
+    {"MSG_LENGTH", BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T_MSG_LENGTH},\
+    {"MSG_TYPE", BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T_MSG_TYPE},\
+    {"RESERVED1", BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T_RESERVED1},\
+    {"RESERVED2", BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T_RESERVED2},\
+    {"RESERVED3", BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T_RESERVED3},\
+    {"SEQ_ID", BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T_SEQ_ID},\
+    {"SRCPORTID", BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T_SRCPORTID},\
+    {"TRANSPORTSPEC", BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T_TRANSPORTSPEC},\
+    {"VERSION", BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T_VERSION},\
+    {"p_1588_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T_FID_COUNT}
+
+/*!
+ * \name PROG_EXT_HDR_T field IDs.
+ */
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN 0
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER 1
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PROG_EXT_HDR_T_OPTION      2
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT          3
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT \
+    {"HDR_EXT_LEN", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN},\
+    {"NEXT_HEADER", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER},\
+    {"OPTION", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PROG_EXT_HDR_T_OPTION},\
+    {"prog_ext_hdr_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_0_T field IDs.
+ */
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_0_T_FLOWSET        0
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_0_T_LENGTH         1
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX 2
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_0_T_OBS_TIME_NS    3
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_0_T_OBS_TIME_S     4
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_0_T_TEMPLATE_ID    5
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_0_T_FID_COUNT          6
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT \
+    {"FLOWSET", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_0_T_FLOWSET},\
+    {"LENGTH", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_0_T_LENGTH},\
+    {"NEXT_HOP_INDEX", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX},\
+    {"OBS_TIME_NS", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_0_T_OBS_TIME_NS},\
+    {"OBS_TIME_S", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_0_T_OBS_TIME_S},\
+    {"TEMPLATE_ID", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_0_T_TEMPLATE_ID},\
+    {"psamp_0_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_0_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_1_T field IDs.
+ */
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_1_T_DLB_ID         0
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_1_T_EGRESS_PORT    1
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_1_T_EPOCH          2
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_1_T_INGRESS_PORT   3
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH 4
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_1_T_USER_META_DATA 5
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_1_T_VARIABLE_FLAG  6
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_1_T_FID_COUNT          7
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT \
+    {"DLB_ID", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_1_T_DLB_ID},\
+    {"EGRESS_PORT", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_1_T_EGRESS_PORT},\
+    {"EPOCH", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_1_T_EPOCH},\
+    {"INGRESS_PORT", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_1_T_INGRESS_PORT},\
+    {"SAMPLED_LENGTH", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH},\
+    {"USER_META_DATA", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_1_T_USER_META_DATA},\
+    {"VARIABLE_FLAG", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_1_T_VARIABLE_FLAG},\
+    {"psamp_1_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_1_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_MIRROR_ON_DROP_0_T field IDs.
+ */
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT 0
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT    1
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH          2
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS     3
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S      4
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID       5
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID     6
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT          7
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT \
+    {"EGRESS_MOD_PORT", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT},\
+    {"INGRESS_PORT", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT},\
+    {"LENGTH", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH},\
+    {"OBS_TIME_NS", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS},\
+    {"OBS_TIME_S", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S},\
+    {"SWITCH_ID", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID},\
+    {"TEMPLATE_ID", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID},\
+    {"psamp_mirror_on_drop_0_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_MIRROR_ON_DROP_1_T field IDs.
+ */
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_ING_DROP_REASON    0
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MIRROR_ON_DROP_OBJ 1
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MMU_DROP_CTRL      2
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_SAMPLED_LENGTH     3
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_USER_META_DATA     4
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_VAR_LEN_INDICATOR  5
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT          6
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FIELD_NAME_MAP_INIT \
+    {"ING_DROP_REASON", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_ING_DROP_REASON},\
+    {"MIRROR_ON_DROP_OBJ", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MIRROR_ON_DROP_OBJ},\
+    {"MMU_DROP_CTRL", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MMU_DROP_CTRL},\
+    {"SAMPLED_LENGTH", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_SAMPLED_LENGTH},\
+    {"USER_META_DATA", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_USER_META_DATA},\
+    {"VAR_LEN_INDICATOR", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_VAR_LEN_INDICATOR},\
+    {"psamp_mirror_on_drop_1_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_MIRROR_ON_DROP_2_T field IDs.
+ */
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_EGR_DROP_REASON       0
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_EP_COPY_SESSION_INDEX 1
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_RESERVED_0            2
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_SAMPLED_LENGTH        3
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_USER_META_DATA        4
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_VAR_LEN_INDICATOR     5
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT          6
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FIELD_NAME_MAP_INIT \
+    {"EGR_DROP_REASON", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_EGR_DROP_REASON},\
+    {"EP_COPY_SESSION_INDEX", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_EP_COPY_SESSION_INDEX},\
+    {"RESERVED_0", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_RESERVED_0},\
+    {"SAMPLED_LENGTH", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_SAMPLED_LENGTH},\
+    {"USER_META_DATA", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_USER_META_DATA},\
+    {"VAR_LEN_INDICATOR", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_VAR_LEN_INDICATOR},\
+    {"psamp_mirror_on_drop_2_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT}
+
+/*!
+ * \name RARP_T field IDs.
+ */
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RARP_T_HARDWARE_LEN  0
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RARP_T_HARDWARE_TYPE 1
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RARP_T_OPERATION     2
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RARP_T_PROT_ADDR_LEN 3
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RARP_T_PROTOCOL_TYPE 4
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RARP_T_SENDER_HA     5
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RARP_T_SENDER_IP     6
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RARP_T_TARGET_HA     7
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RARP_T_TARGET_IP     8
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RARP_T_FID_COUNT          9
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT \
+    {"HARDWARE_LEN", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RARP_T_HARDWARE_LEN},\
+    {"HARDWARE_TYPE", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RARP_T_HARDWARE_TYPE},\
+    {"OPERATION", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RARP_T_OPERATION},\
+    {"PROT_ADDR_LEN", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RARP_T_PROT_ADDR_LEN},\
+    {"PROTOCOL_TYPE", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RARP_T_PROTOCOL_TYPE},\
+    {"SENDER_HA", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RARP_T_SENDER_HA},\
+    {"SENDER_IP", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RARP_T_SENDER_IP},\
+    {"TARGET_HA", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RARP_T_TARGET_HA},\
+    {"TARGET_IP", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RARP_T_TARGET_IP},\
+    {"rarp_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RARP_T_FID_COUNT}
+
+/*!
+ * \name ROUTING_T field IDs.
+ */
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ROUTING_T_DATA          0
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ROUTING_T_HDR_EXT_LEN   1
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ROUTING_T_NEXT_HEADER   2
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ROUTING_T_ROUTING_TYPE  3
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ROUTING_T_SEGMENTS_LEFT 4
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ROUTING_T_FID_COUNT          5
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT \
+    {"DATA", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ROUTING_T_DATA},\
+    {"HDR_EXT_LEN", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ROUTING_T_HDR_EXT_LEN},\
+    {"NEXT_HEADER", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ROUTING_T_NEXT_HEADER},\
+    {"ROUTING_TYPE", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ROUTING_T_ROUTING_TYPE},\
+    {"SEGMENTS_LEFT", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ROUTING_T_SEGMENTS_LEFT},\
+    {"routing_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_ROUTING_T_FID_COUNT}
+
+/*!
+ * \name RSPAN_T field IDs.
+ */
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RSPAN_T_TAG  0
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RSPAN_T_TPID 1
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RSPAN_T_FID_COUNT          2
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT \
+    {"TAG", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RSPAN_T_TAG},\
+    {"TPID", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RSPAN_T_TPID},\
+    {"rspan_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RSPAN_T_FID_COUNT}
+
+/*!
+ * \name SFLOW_SHIM_0_T field IDs.
+ */
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION 0
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE      1
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_0_T_VERSION         2
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT          3
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT \
+    {"SYS_DESTINATION", BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION},\
+    {"SYS_SOURCE", BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE},\
+    {"VERSION", BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_0_T_VERSION},\
+    {"sflow_shim_0_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT}
+
+/*!
+ * \name SFLOW_SHIM_1_T field IDs.
+ */
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE 0
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED   1
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE 2
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST       3
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE  4
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED   5
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED         6
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE       7
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT          8
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT \
+    {"FLAG_DEST_SAMPLE", BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE},\
+    {"FLAG_DISCARDED", BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED},\
+    {"FLAG_FLEX_SAMPLE", BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE},\
+    {"FLAG_MCAST", BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST},\
+    {"FLAG_SRC_SAMPLE", BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE},\
+    {"FLAG_TRUNCATED", BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED},\
+    {"RESERVED", BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED},\
+    {"SYS_OPCODE", BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE},\
+    {"sflow_shim_1_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT}
+
+/*!
+ * \name SFLOW_SHIM_2_T field IDs.
+ */
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM   0
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA 1
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT          2
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT \
+    {"SEQUENCE_NUM", BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM},\
+    {"USER_META_DATA", BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA},\
+    {"sflow_shim_2_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT}
+
+/*!
+ * \name SNAP_LLC_T field IDs.
+ */
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_SNAP_LLC_T_LENGTH   0
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_SNAP_LLC_T_SNAP_LLC 1
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_SNAP_LLC_T_FID_COUNT          2
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT \
+    {"LENGTH", BCM56780_A0_DNA_2_9_5_0_BCMPKT_SNAP_LLC_T_LENGTH},\
+    {"SNAP_LLC", BCM56780_A0_DNA_2_9_5_0_BCMPKT_SNAP_LLC_T_SNAP_LLC},\
+    {"snap_llc_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_SNAP_LLC_T_FID_COUNT}
+
+/*!
+ * \name SVTAG_T field IDs.
+ */
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_SVTAG_T_DATA_LWR 0
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_SVTAG_T_DATA_UPR 1
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_SVTAG_T_FID_COUNT          2
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_SVTAG_T_FIELD_NAME_MAP_INIT \
+    {"DATA_LWR", BCM56780_A0_DNA_2_9_5_0_BCMPKT_SVTAG_T_DATA_LWR},\
+    {"DATA_UPR", BCM56780_A0_DNA_2_9_5_0_BCMPKT_SVTAG_T_DATA_UPR},\
+    {"svtag_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_SVTAG_T_FID_COUNT}
+
+/*!
+ * \name TCP_FIRST_4BYTES_T field IDs.
+ */
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT 0
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT 1
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT          2
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT \
+    {"DST_PORT", BCM56780_A0_DNA_2_9_5_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT},\
+    {"SRC_PORT", BCM56780_A0_DNA_2_9_5_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT},\
+    {"tcp_first_4bytes_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT}
+
+/*!
+ * \name TCP_LAST_16BYTES_T field IDs.
+ */
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM           0
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM          1
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS 2
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM           3
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR        4
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE          5
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT          6
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT \
+    {"ACK_NUM", BCM56780_A0_DNA_2_9_5_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM},\
+    {"CHECKSUM", BCM56780_A0_DNA_2_9_5_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM},\
+    {"HDR_LEN_AND_FLAGS", BCM56780_A0_DNA_2_9_5_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS},\
+    {"SEQ_NUM", BCM56780_A0_DNA_2_9_5_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM},\
+    {"URGENT_PTR", BCM56780_A0_DNA_2_9_5_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR},\
+    {"WIN_SIZE", BCM56780_A0_DNA_2_9_5_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE},\
+    {"tcp_last_16bytes_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT}
+
+/*!
+ * \name UDP_T field IDs.
+ */
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_UDP_T_CHECKSUM   0
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_UDP_T_DST_PORT   1
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_UDP_T_SRC_PORT   2
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_UDP_T_UDP_LENGTH 3
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_UDP_T_FID_COUNT          4
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT \
+    {"CHECKSUM", BCM56780_A0_DNA_2_9_5_0_BCMPKT_UDP_T_CHECKSUM},\
+    {"DST_PORT", BCM56780_A0_DNA_2_9_5_0_BCMPKT_UDP_T_DST_PORT},\
+    {"SRC_PORT", BCM56780_A0_DNA_2_9_5_0_BCMPKT_UDP_T_SRC_PORT},\
+    {"UDP_LENGTH", BCM56780_A0_DNA_2_9_5_0_BCMPKT_UDP_T_UDP_LENGTH},\
+    {"udp_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_UDP_T_FID_COUNT}
+
+/*!
+ * \name UNKNOWN_L3_T field IDs.
+ */
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD 0
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD  1
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT          2
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT \
+    {"FIRST_16BYTES_OF_L3_PAYLOAD", BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD},\
+    {"NEXT_16BYTES_OF_L3_PAYLOAD", BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD},\
+    {"unknown_l3_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT}
+
+/*!
+ * \name UNKNOWN_L4_T field IDs.
+ */
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD 0
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT          1
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT \
+    {"FIRST_4BYTES_OF_L4_PAYLOAD", BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD},\
+    {"unknown_l4_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT}
+
+/*!
+ * \name UNKNOWN_L5_T field IDs.
+ */
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1 0
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3 1
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7 2
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT          3
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT \
+    {"L5_BYTES_0_1", BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1},\
+    {"L5_BYTES_2_3", BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3},\
+    {"L5_BYTES_4_7", BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7},\
+    {"unknown_l5_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT}
+
+/*!
+ * \name VLAN_T field IDs.
+ */
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_VLAN_T_CFI  0
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_VLAN_T_PCP  1
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_VLAN_T_TPID 2
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_VLAN_T_VID  3
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_VLAN_T_FID_COUNT          4
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT \
+    {"CFI", BCM56780_A0_DNA_2_9_5_0_BCMPKT_VLAN_T_CFI},\
+    {"PCP", BCM56780_A0_DNA_2_9_5_0_BCMPKT_VLAN_T_PCP},\
+    {"TPID", BCM56780_A0_DNA_2_9_5_0_BCMPKT_VLAN_T_TPID},\
+    {"VID", BCM56780_A0_DNA_2_9_5_0_BCMPKT_VLAN_T_VID},\
+    {"vlan_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_VLAN_T_FID_COUNT}
+
+/*!
+ * \name VNTAG_T field IDs.
+ */
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_VNTAG_T_TAG  0
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_VNTAG_T_TPID 1
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_VNTAG_T_FID_COUNT          2
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_VNTAG_T_FIELD_NAME_MAP_INIT \
+    {"TAG", BCM56780_A0_DNA_2_9_5_0_BCMPKT_VNTAG_T_TAG},\
+    {"TPID", BCM56780_A0_DNA_2_9_5_0_BCMPKT_VNTAG_T_TPID},\
+    {"vntag_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_VNTAG_T_FID_COUNT}
+
+/*!
+ * \name VXLAN_T field IDs.
+ */
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1 0
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_VXLAN_T_RESERVED2        1
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_VXLAN_T_VN_ID            2
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_VXLAN_T_FID_COUNT          3
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT \
+    {"FLAGS_RESERVED_1", BCM56780_A0_DNA_2_9_5_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1},\
+    {"RESERVED2", BCM56780_A0_DNA_2_9_5_0_BCMPKT_VXLAN_T_RESERVED2},\
+    {"VN_ID", BCM56780_A0_DNA_2_9_5_0_BCMPKT_VXLAN_T_VN_ID},\
+    {"vxlan_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_VXLAN_T_FID_COUNT}
+
+/*!
+ * \name WESP_T field IDs.
+ */
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_WESP_T_FLAGS       0
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_WESP_T_HEADER_LEN  1
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_WESP_T_NEXT_HEADER 2
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_WESP_T_SEQ_NUM     3
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_WESP_T_SPI         4
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_WESP_T_TRAILER_LEN 5
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_WESP_T_WESP_IV     6
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_WESP_T_FID_COUNT          7
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT \
+    {"FLAGS", BCM56780_A0_DNA_2_9_5_0_BCMPKT_WESP_T_FLAGS},\
+    {"HEADER_LEN", BCM56780_A0_DNA_2_9_5_0_BCMPKT_WESP_T_HEADER_LEN},\
+    {"NEXT_HEADER", BCM56780_A0_DNA_2_9_5_0_BCMPKT_WESP_T_NEXT_HEADER},\
+    {"SEQ_NUM", BCM56780_A0_DNA_2_9_5_0_BCMPKT_WESP_T_SEQ_NUM},\
+    {"SPI", BCM56780_A0_DNA_2_9_5_0_BCMPKT_WESP_T_SPI},\
+    {"TRAILER_LEN", BCM56780_A0_DNA_2_9_5_0_BCMPKT_WESP_T_TRAILER_LEN},\
+    {"WESP_IV", BCM56780_A0_DNA_2_9_5_0_BCMPKT_WESP_T_WESP_IV},\
+    {"wesp_t fid count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_WESP_T_FID_COUNT}
+
+
+#endif /* BCM56780_A0_DNA_2_9_5_0_BCMPKT_FLEXHDR_DATA_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_bcmpkt_rxpmd_flex_data.h
new file mode 100644
index 000000000..7b484da3d
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_bcmpkt_rxpmd_flex_data.h
@@ -0,0 +1,180 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) map.yml.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_DATA_H
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_DATA_H
+
+/*!
+ * \name RX flex metadata field IDs.
+ */
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0                                 0
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0                                            1
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_DVP_15_0                                                  2
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0                                         3
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_EGR_MTOP_INDEX_HI_3_0                                     4
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_EGR_MTOP_INDEX_LO_EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0 5
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0                   6
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0                                    7
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0                                    8
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0                                 9
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16                                10
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0                                   11
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16                                  12
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32                                  13
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0                                         14
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0                                   15
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_IFP_TO_EP_MACSEC_INFO_OR_IFP_OPAQUE_OBJ_15_0              16
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0                                 17
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0                                        18
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16                                       19
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0                                       20
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0            21
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0                               22
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0                                               23
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_L2_IIF_10_0                                               24
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_L2_OIF_10_0                                               25
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0                                               26
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0                                             27
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_MPLS_LABEL_DECAP_COUNT_3_0                                28
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0                         29
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0                                         30
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0                                       31
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0                                       32
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_SVP_15_0                                                  33
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0                              34
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0                                   35
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0                                         36
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0                                        37
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0                                        38
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0                           39
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_VFI_15_0                                                  40
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_1_0              41
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_FID_COUNT                       42
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_COUNT                    46
+
+/*!
+ * \name Packet Flex Reason Types.
+ */
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS                               0
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED 1
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED                    2
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED  3
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED                     4
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP                                  5
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT                                   6
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_IFP                                     7
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER                               8
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED      9
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT                                   10
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP                           11
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS                      12
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE                      13
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP                           14
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS                      15
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR                            16
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF                        17
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR                            18
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL                        19
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST                         20
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0                      21
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1                      22
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2                      23
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3                      24
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4                      25
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5                      26
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6                      27
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7                      28
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED                 29
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED              30
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED                  31
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU                    32
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MTOP_IPV4_GATEWAY                       33
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU                          34
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED              35
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT                            36
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT                      37
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP                                38
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED              39
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_SVP                                     40
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP                               41
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU                42
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR                     43
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED                       44
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_VFP                                     45
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT \
+    {"CML_FLAGS", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS},\
+    {"DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED},\
+    {"DLB_ECMP_PKT_SAMPLED", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED},\
+    {"DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED},\
+    {"DLB_LAG_PKT_SAMPLED", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED},\
+    {"DST_FP", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP},\
+    {"EM_FT", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT},\
+    {"IFP", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_IFP},\
+    {"IFP_METER", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER},\
+    {"IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED},\
+    {"IVXLT", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT},\
+    {"L2_DST_LOOKUP", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP},\
+    {"L2_DST_LOOKUP_MISS", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS},\
+    {"L2_SRC_STATIC_MOVE", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE},\
+    {"L3_DST_LOOKUP", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP},\
+    {"L3_DST_LOOKUP_MISS", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS},\
+    {"L3_HDR_ERROR", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR},\
+    {"L3_IIF_EQ_L3_OIF", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF},\
+    {"L3_TTL_ERROR", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR},\
+    {"LEARN_CACHE_FULL", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL},\
+    {"MACSA_MULTICAST", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST},\
+    {"MATCHED_RULE_BIT_0", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0},\
+    {"MATCHED_RULE_BIT_1", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1},\
+    {"MATCHED_RULE_BIT_2", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2},\
+    {"MATCHED_RULE_BIT_3", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3},\
+    {"MATCHED_RULE_BIT_4", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4},\
+    {"MATCHED_RULE_BIT_5", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5},\
+    {"MATCHED_RULE_BIT_6", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6},\
+    {"MATCHED_RULE_BIT_7", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7},\
+    {"MEMBERSHIP_CHECK_FAILED", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED},\
+    {"MIRROR_SAMPLER_EGR_SAMPLED", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED},\
+    {"MIRROR_SAMPLER_SAMPLED", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED},\
+    {"MPLS_CTRL_PKT_TO_CPU", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU},\
+    {"MTOP_IPV4_GATEWAY", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MTOP_IPV4_GATEWAY},\
+    {"NO_COPY_TO_CPU", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU},\
+    {"PKT_INTEGRITY_CHECK_FAILED", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED},\
+    {"PROTOCOL_PKT", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT},\
+    {"RESERVED_TRACE_BIT", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT},\
+    {"SER_DROP", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP},\
+    {"SPANNING_TREE_CHECK_FAILED", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED},\
+    {"SVP", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_SVP},\
+    {"TRACE_DOP", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP},\
+    {"TRACE_DO_NOT_COPY_TO_CPU", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU},\
+    {"TRACE_DO_NOT_MIRROR", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR},\
+    {"URPF_CHECK_FAILED", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED},\
+    {"VFP", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_VFP},\
+    {"flex reason count", BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_COUNT}
+
+#endif /* BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_DATA_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_bcmpkt_rxpmd_match_id_defs.h
new file mode 100644
index 000000000..da90d5643
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_bcmpkt_rxpmd_match_id_defs.h
@@ -0,0 +1,415 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) bcm56780_a0_dna_2_9_5_0_sf_match_id_info.yml
+ * for device bcm56780_a0 and variant dna_2_9_5_0.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H
+
+#include <bcmpkt/bcmpkt_rxpmd_match_id.h>
+
+/*!
+ * \brief Get the Match ID DataBase information.
+ *
+ * \retval bcmpkt_rxpmd_match_id_db_info_t Match ID DataBase information.
+*/
+extern bcmpkt_rxpmd_match_id_db_info_t *
+    bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db_info_get(void);
+
+/*!
+ * \brief Get the Match ID Mapping information.
+ *
+ * \retval bcmpkt_rxpmd_match_id_map_info_t Match ID Mapping information.
+*/
+extern bcmpkt_rxpmd_match_id_map_info_t *
+    bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_map_info_get(void);
+
+/*!
+  \name RXPMD Match IDs
+*/
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG  0
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE  1
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0  2
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG  3
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2  4
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE  5
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG  6
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC  7
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SVTAG  8
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG  9
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP  10
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1  11
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2  12
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD  13
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT  14
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE  15
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1  16
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2  17
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE  18
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE  19
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM  20
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY  21
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT  22
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ  23
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP  24
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA  25
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP  26
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4  27
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6  28
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0  29
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1  30
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2  31
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3  32
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4  33
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5  34
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6  35
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH  36
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW  37
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE  38
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588  39
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP  40
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES  41
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES  42
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP  43
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3  44
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4  45
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5  46
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN  47
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH  48
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK  49
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE  50
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG  51
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE  52
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0  53
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG  54
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2  55
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE  56
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG  57
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC  58
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SVTAG  59
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG  60
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP  61
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1  62
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2  63
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD  64
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT  65
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE  66
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1  67
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2  68
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE  69
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE  70
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM  71
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY  72
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT  73
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ  74
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP  75
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA  76
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP  77
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4  78
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6  79
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0  80
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1  81
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2  82
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3  83
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4  84
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5  85
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6  86
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH  87
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW  88
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE  89
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588  90
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP  91
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES  92
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES  93
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP  94
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3  95
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4  96
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5  97
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN  98
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG  99
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG  100
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2  101
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE  102
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG  103
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC  104
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG  105
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP  106
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1  107
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2  108
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD  109
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT  110
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE  111
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1  112
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2  113
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP  114
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP  115
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4  116
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6  117
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE  118
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588  119
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP  120
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES  121
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES  122
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP  123
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3  124
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4  125
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5  126
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG  127
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE  128
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0  129
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG  130
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2  131
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE  132
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG  133
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC  134
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SVTAG  135
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG  136
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP  137
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1  138
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2  139
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD  140
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT  141
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE  142
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1  143
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2  144
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE  145
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE  146
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM  147
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY  148
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT  149
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ  150
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP  151
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA  152
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP  153
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4  154
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6  155
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0  156
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1  157
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2  158
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3  159
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4  160
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5  161
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6  162
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH  163
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW  164
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE  165
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588  166
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP  167
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES  168
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES  169
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP  170
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3  171
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4  172
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5  173
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN  174
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH  175
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK  176
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE  177
+#define BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_COUNT  178
+
+#define BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT \
+    {"EGRESS_PKT_FWD_L2_HDR_ETAG", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG}, \
+    {"EGRESS_PKT_FWD_L2_HDR_HG3_BASE", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE}, \
+    {"EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0}, \
+    {"EGRESS_PKT_FWD_L2_HDR_ITAG", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG}, \
+    {"EGRESS_PKT_FWD_L2_HDR_L2", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2}, \
+    {"EGRESS_PKT_FWD_L2_HDR_NONE", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE}, \
+    {"EGRESS_PKT_FWD_L2_HDR_OTAG", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG}, \
+    {"EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC}, \
+    {"EGRESS_PKT_FWD_L2_HDR_SVTAG", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SVTAG}, \
+    {"EGRESS_PKT_FWD_L2_HDR_VNTAG", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ARP", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_BFD", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GPE", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ICMP", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IGMP", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IPV4", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IPV6", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS0", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS1", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS2", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS3", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS4", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS5", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS6", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_NONE", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_P_1588", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_RARP", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UDP", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN}, \
+    {"EGRESS_PKT_SYS_HDR_EP_NIH", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH}, \
+    {"EGRESS_PKT_SYS_HDR_LOOPBACK", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK}, \
+    {"EGRESS_PKT_SYS_HDR_NONE", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_ETAG", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_ITAG", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_L2", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_NONE", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_OTAG", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_SVTAG", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SVTAG}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_VNTAG", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN}, \
+    {"INGRESS_PKT_INNER_L2_HDR_ETAG", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG}, \
+    {"INGRESS_PKT_INNER_L2_HDR_ITAG", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG}, \
+    {"INGRESS_PKT_INNER_L2_HDR_L2", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2}, \
+    {"INGRESS_PKT_INNER_L2_HDR_NONE", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE}, \
+    {"INGRESS_PKT_INNER_L2_HDR_OTAG", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG}, \
+    {"INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC}, \
+    {"INGRESS_PKT_INNER_L2_HDR_VNTAG", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ARP", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_BFD", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ICMP", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_IGMP", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_IPV4", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_IPV6", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_NONE", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_P_1588", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_RARP", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UDP", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_ETAG", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_HG3_BASE", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_ITAG", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_L2", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_NONE", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_OTAG", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_SVTAG", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SVTAG}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_VNTAG", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ARP", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_BFD", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GPE", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_NONE", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_RARP", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UDP", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN}, \
+    {"INGRESS_PKT_SYS_HDR_EP_NIH", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH}, \
+    {"INGRESS_PKT_SYS_HDR_LOOPBACK", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK}, \
+    {"INGRESS_PKT_SYS_HDR_NONE", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE}, \
+    {"rxpmd_match_id_count", BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_COUNT}
+
+#endif /*! BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_bcmpkt_flexhdr.h
new file mode 100644
index 000000000..cc9acc025
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_bcmpkt_flexhdr.h
@@ -0,0 +1,174 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) header.yml.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_FLEXHDR_H
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_FLEXHDR_H
+
+#include <bcmpkt/bcmpkt_flexhdr_internal.h>
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ARP_T                      0
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_AUTHEN_T                   1
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T                      2
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CNTAG_T                    3
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_0_T         4
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_1_T         5
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_DEST_OPTION_T              6
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_EP_NIH_HEADER_T            7
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_FIXED_HDR_T        8
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_SUBHDR_5_T         9
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ESP_T                      10
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ETAG_T                     11
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ETHERTYPE_T                12
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_FRAG_T                     13
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T         14
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GPE_T                      15
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_CHKSUM_T               16
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_KEY_T                  17
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_ROUT_T                 18
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_SEQ_T                  19
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_T                      20
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_HOP_BY_HOP_T               21
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ICMP_T                     22
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_0_A_T          23
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_0_B_T          24
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_1_T            25
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_2_T            26
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_3_T            27
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_HEADER_T               28
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_MD_BASE_T              29
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_METADATA_T             30
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IGMP_T                     31
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPFIX_T                    32
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV4_T                     33
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV6_T                     34
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_L2_T                       35
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MIRROR_ERSPAN_SN_T         36
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MIRROR_TRANSPORT_T         37
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_ACH_T                 38
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_BV_T                  39
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_CW_T                  40
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_T                     41
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T                   42
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PROG_EXT_HDR_T             43
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_0_T                  44
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_1_T                  45
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T   46
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T   47
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RARP_T                     48
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ROUTING_T                  49
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RSPAN_T                    50
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_0_T             51
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_1_T             52
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_2_T             53
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SNAP_LLC_T                 54
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SVTAG_T                    55
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_TCP_FIRST_4BYTES_T         56
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_TCP_LAST_16BYTES_T         57
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UDP_T                      58
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L3_T               59
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L4_T               60
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L5_T               61
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VLAN_T                     62
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VNTAG_T                    63
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VXLAN_T                    64
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_WESP_T                     65
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_T               66
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_FLEXHDR_COUNT    67
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_FLEXHDR_NAME_MAP_INIT \
+    {"arp_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ARP_T},\
+    {"authen_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_AUTHEN_T},\
+    {"bfd_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T},\
+    {"cntag_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CNTAG_T},\
+    {"cpu_composites_0_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_0_T},\
+    {"cpu_composites_1_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_1_T},\
+    {"dest_option_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_DEST_OPTION_T},\
+    {"ep_nih_header_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_EP_NIH_HEADER_T},\
+    {"erspan3_fixed_hdr_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_FIXED_HDR_T},\
+    {"erspan3_subhdr_5_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_SUBHDR_5_T},\
+    {"esp_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ESP_T},\
+    {"etag_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ETAG_T},\
+    {"ethertype_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ETHERTYPE_T},\
+    {"frag_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_FRAG_T},\
+    {"generic_loopback_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T},\
+    {"gpe_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GPE_T},\
+    {"gre_chksum_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_CHKSUM_T},\
+    {"gre_key_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_KEY_T},\
+    {"gre_rout_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_ROUT_T},\
+    {"gre_seq_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_SEQ_T},\
+    {"gre_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_T},\
+    {"hop_by_hop_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_HOP_BY_HOP_T},\
+    {"icmp_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ICMP_T},\
+    {"ifa_flex_md_0_a_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_0_A_T},\
+    {"ifa_flex_md_0_b_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_0_B_T},\
+    {"ifa_flex_md_1_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_1_T},\
+    {"ifa_flex_md_2_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_2_T},\
+    {"ifa_flex_md_3_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_3_T},\
+    {"ifa_header_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_HEADER_T},\
+    {"ifa_md_base_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_MD_BASE_T},\
+    {"ifa_metadata_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_METADATA_T},\
+    {"igmp_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IGMP_T},\
+    {"ipfix_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPFIX_T},\
+    {"ipv4_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV4_T},\
+    {"ipv6_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV6_T},\
+    {"l2_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_L2_T},\
+    {"mirror_erspan_sn_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MIRROR_ERSPAN_SN_T},\
+    {"mirror_transport_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MIRROR_TRANSPORT_T},\
+    {"mpls_ach_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_ACH_T},\
+    {"mpls_bv_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_BV_T},\
+    {"mpls_cw_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_CW_T},\
+    {"mpls_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_T},\
+    {"p_1588_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T},\
+    {"prog_ext_hdr_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PROG_EXT_HDR_T},\
+    {"psamp_0_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_0_T},\
+    {"psamp_1_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_1_T},\
+    {"psamp_mirror_on_drop_0_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T},\
+    {"psamp_mirror_on_drop_3_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T},\
+    {"rarp_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RARP_T},\
+    {"routing_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ROUTING_T},\
+    {"rspan_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RSPAN_T},\
+    {"sflow_shim_0_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_0_T},\
+    {"sflow_shim_1_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_1_T},\
+    {"sflow_shim_2_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_2_T},\
+    {"snap_llc_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SNAP_LLC_T},\
+    {"svtag_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SVTAG_T},\
+    {"tcp_first_4bytes_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_TCP_FIRST_4BYTES_T},\
+    {"tcp_last_16bytes_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_TCP_LAST_16BYTES_T},\
+    {"udp_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UDP_T},\
+    {"unknown_l3_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L3_T},\
+    {"unknown_l4_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L4_T},\
+    {"unknown_l5_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L5_T},\
+    {"vlan_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VLAN_T},\
+    {"vntag_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VNTAG_T},\
+    {"vxlan_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VXLAN_T},\
+    {"wesp_t", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_WESP_T},\
+    {"RXPMD_FLEX_T", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_T},\
+    {"flexhdr count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_FLEXHDR_COUNT}
+
+#endif /* BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_FLEXHDR_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_bcmpkt_flexhdr_data.h
new file mode 100644
index 000000000..2d60738e3
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_bcmpkt_flexhdr_data.h
@@ -0,0 +1,1258 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) header.yml.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_FLEXHDR_DATA_H
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_FLEXHDR_DATA_H
+
+/*!
+ * \name ARP_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ARP_T_HARDWARE_LEN  0
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ARP_T_HARDWARE_TYPE 1
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ARP_T_OPERATION     2
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ARP_T_PROT_ADDR_LEN 3
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ARP_T_PROTOCOL_TYPE 4
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ARP_T_SENDER_HA     5
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ARP_T_SENDER_IP     6
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ARP_T_TARGET_HA     7
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ARP_T_TARGET_IP     8
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ARP_T_FID_COUNT          9
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT \
+    {"HARDWARE_LEN", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ARP_T_HARDWARE_LEN},\
+    {"HARDWARE_TYPE", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ARP_T_HARDWARE_TYPE},\
+    {"OPERATION", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ARP_T_OPERATION},\
+    {"PROT_ADDR_LEN", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ARP_T_PROT_ADDR_LEN},\
+    {"PROTOCOL_TYPE", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ARP_T_PROTOCOL_TYPE},\
+    {"SENDER_HA", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ARP_T_SENDER_HA},\
+    {"SENDER_IP", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ARP_T_SENDER_IP},\
+    {"TARGET_HA", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ARP_T_TARGET_HA},\
+    {"TARGET_IP", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ARP_T_TARGET_IP},\
+    {"arp_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ARP_T_FID_COUNT}
+
+/*!
+ * \name AUTHEN_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_AUTHEN_T_DATA        0
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_AUTHEN_T_NEXT_HEADER 1
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_AUTHEN_T_PAYLOAD_LEN 2
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_AUTHEN_T_RESERVED    3
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_AUTHEN_T_SEQ_NUM     4
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_AUTHEN_T_SPI         5
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_AUTHEN_T_FID_COUNT          6
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT \
+    {"DATA", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_AUTHEN_T_DATA},\
+    {"NEXT_HEADER", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_AUTHEN_T_NEXT_HEADER},\
+    {"PAYLOAD_LEN", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_AUTHEN_T_PAYLOAD_LEN},\
+    {"RESERVED", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_AUTHEN_T_RESERVED},\
+    {"SEQ_NUM", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_AUTHEN_T_SEQ_NUM},\
+    {"SPI", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_AUTHEN_T_SPI},\
+    {"authen_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_AUTHEN_T_FID_COUNT}
+
+/*!
+ * \name BFD_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_AP            0
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_BFD_LENGTH    1
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_CPI           2
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_DEM           3
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_DESMINTXINTV  4
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_DETECTMULT    5
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_DIAG          6
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_FIN           7
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_MINECHORXINTV 8
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_MPT           9
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_MYDISCRIM     10
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_POLL          11
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_REQMINRXINTV  12
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_STA           13
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_URDISCRIM     14
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_VERSION       15
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_FID_COUNT          16
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT \
+    {"AP", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_AP},\
+    {"BFD_LENGTH", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_BFD_LENGTH},\
+    {"CPI", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_CPI},\
+    {"DEM", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_DEM},\
+    {"DESMINTXINTV", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_DESMINTXINTV},\
+    {"DETECTMULT", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_DETECTMULT},\
+    {"DIAG", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_DIAG},\
+    {"FIN", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_FIN},\
+    {"MINECHORXINTV", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_MINECHORXINTV},\
+    {"MPT", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_MPT},\
+    {"MYDISCRIM", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_MYDISCRIM},\
+    {"POLL", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_POLL},\
+    {"REQMINRXINTV", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_REQMINRXINTV},\
+    {"STA", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_STA},\
+    {"URDISCRIM", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_URDISCRIM},\
+    {"VERSION", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_VERSION},\
+    {"bfd_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_FID_COUNT}
+
+/*!
+ * \name CNTAG_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CNTAG_T_RPID 0
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CNTAG_T_TPID 1
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CNTAG_T_FID_COUNT          2
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT \
+    {"RPID", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CNTAG_T_RPID},\
+    {"TPID", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CNTAG_T_TPID},\
+    {"cntag_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CNTAG_T_FID_COUNT}
+
+/*!
+ * \name CPU_COMPOSITES_0_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0 0
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1 1
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2 2
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3 3
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4 4
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5 5
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6 6
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT          7
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT \
+    {"DMA_CONT0", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0},\
+    {"DMA_CONT1", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1},\
+    {"DMA_CONT2", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2},\
+    {"DMA_CONT3", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3},\
+    {"DMA_CONT4", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4},\
+    {"DMA_CONT5", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5},\
+    {"DMA_CONT6", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6},\
+    {"cpu_composites_0_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT}
+
+/*!
+ * \name CPU_COMPOSITES_1_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10 0
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11 1
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12 2
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13 3
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14 4
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15 5
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16 6
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17 7
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7  8
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8  9
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9  10
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT          11
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT \
+    {"DMA_CONT10", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10},\
+    {"DMA_CONT11", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11},\
+    {"DMA_CONT12", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12},\
+    {"DMA_CONT13", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13},\
+    {"DMA_CONT14", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14},\
+    {"DMA_CONT15", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15},\
+    {"DMA_CONT16", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16},\
+    {"DMA_CONT17", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17},\
+    {"DMA_CONT7", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7},\
+    {"DMA_CONT8", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8},\
+    {"DMA_CONT9", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9},\
+    {"cpu_composites_1_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT}
+
+/*!
+ * \name DEST_OPTION_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN 0
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_DEST_OPTION_T_NEXT_HEADER 1
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_DEST_OPTION_T_OPTION      2
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_DEST_OPTION_T_FID_COUNT          3
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT \
+    {"HDR_EXT_LEN", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN},\
+    {"NEXT_HEADER", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_DEST_OPTION_T_NEXT_HEADER},\
+    {"OPTION", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_DEST_OPTION_T_OPTION},\
+    {"dest_option_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_DEST_OPTION_T_FID_COUNT}
+
+/*!
+ * \name EP_NIH_HEADER_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE       0
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE          1
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A        2
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B        3
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C        4
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A      5
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B      6
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C      7
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX 8
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_EP_NIH_HEADER_T_RESERVED_0           9
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_EP_NIH_HEADER_T_START                10
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP            11
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_EP_NIH_HEADER_T_FID_COUNT          12
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT \
+    {"HEADER_SUBTYPE", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE},\
+    {"HEADER_TYPE", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE},\
+    {"OPAQUE_CTRL_A", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A},\
+    {"OPAQUE_CTRL_B", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B},\
+    {"OPAQUE_CTRL_C", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C},\
+    {"OPAQUE_OBJECT_A", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A},\
+    {"OPAQUE_OBJECT_B", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B},\
+    {"OPAQUE_OBJECT_C", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C},\
+    {"RECIRC_PROFILE_INDEX", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX},\
+    {"RESERVED_0", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_EP_NIH_HEADER_T_RESERVED_0},\
+    {"START", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_EP_NIH_HEADER_T_START},\
+    {"TIMESTAMP", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP},\
+    {"ep_nih_header_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_EP_NIH_HEADER_T_FID_COUNT}
+
+/*!
+ * \name ERSPAN3_FIXED_HDR_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO               0
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_FIXED_HDR_T_COS               1
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID           2
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O 3
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID        4
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_FIXED_HDR_T_T                 5
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP         6
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_FIXED_HDR_T_VER               7
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN              8
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT          9
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT \
+    {"BSO", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO},\
+    {"COS", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_FIXED_HDR_T_COS},\
+    {"GBP_SID", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID},\
+    {"P_FT_HWID_D_GRA_O", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O},\
+    {"SESSION_ID", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID},\
+    {"T", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_FIXED_HDR_T_T},\
+    {"TIMESTAMP", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP},\
+    {"VER", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_FIXED_HDR_T_VER},\
+    {"VLAN", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN},\
+    {"erspan3_fixed_hdr_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT}
+
+/*!
+ * \name ERSPAN3_SUBHDR_5_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID 0
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID     1
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID   2
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP   3
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT          4
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT \
+    {"PLATFORM_ID", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID},\
+    {"PORT_ID", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID},\
+    {"SWITCH_ID", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID},\
+    {"TIMESTAMP", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP},\
+    {"erspan3_subhdr_5_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT}
+
+/*!
+ * \name ESP_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ESP_T_NEXT_HEADER 0
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ESP_T_PAD         1
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ESP_T_PAD_LEN     2
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ESP_T_SEQ_NUM     3
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ESP_T_SPI         4
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ESP_T_FID_COUNT          5
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT \
+    {"NEXT_HEADER", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ESP_T_NEXT_HEADER},\
+    {"PAD", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ESP_T_PAD},\
+    {"PAD_LEN", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ESP_T_PAD_LEN},\
+    {"SEQ_NUM", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ESP_T_SEQ_NUM},\
+    {"SPI", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ESP_T_SPI},\
+    {"esp_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ESP_T_FID_COUNT}
+
+/*!
+ * \name ETAG_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ETAG_T_TAG  0
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ETAG_T_TPID 1
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ETAG_T_FID_COUNT          2
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ETAG_T_FIELD_NAME_MAP_INIT \
+    {"TAG", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ETAG_T_TAG},\
+    {"TPID", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ETAG_T_TPID},\
+    {"etag_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ETAG_T_FID_COUNT}
+
+/*!
+ * \name ETHERTYPE_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ETHERTYPE_T_TYPE 0
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ETHERTYPE_T_FID_COUNT          1
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT \
+    {"TYPE", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ETHERTYPE_T_TYPE},\
+    {"ethertype_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ETHERTYPE_T_FID_COUNT}
+
+/*!
+ * \name FRAG_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_FRAG_T_FRAG_INFO   0
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_FRAG_T_ID          1
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_FRAG_T_NEXT_HEADER 2
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_FRAG_T_RESERVED    3
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_FRAG_T_FID_COUNT          4
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT \
+    {"FRAG_INFO", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_FRAG_T_FRAG_INFO},\
+    {"ID", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_FRAG_T_ID},\
+    {"NEXT_HEADER", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_FRAG_T_NEXT_HEADER},\
+    {"RESERVED", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_FRAG_T_RESERVED},\
+    {"frag_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_FRAG_T_FID_COUNT}
+
+/*!
+ * \name GENERIC_LOOPBACK_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ    0
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE   1
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ        2
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_FLAGS              3
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE        4
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY     5
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL     6
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ      7
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0  8
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1  9
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ            10
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1         11
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2         12
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT 13
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE         14
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT          15
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT \
+    {"DESTINATION_OBJ", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ},\
+    {"DESTINATION_TYPE", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE},\
+    {"ENTROPY_OBJ", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ},\
+    {"FLAGS", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_FLAGS},\
+    {"HEADER_TYPE", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE},\
+    {"INPUT_PRIORITY", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY},\
+    {"INTERFACE_CTRL", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL},\
+    {"INTERFACE_OBJ", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ},\
+    {"PROCESSING_CTRL_0", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0},\
+    {"PROCESSING_CTRL_1", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1},\
+    {"QOS_OBJ", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ},\
+    {"RESERVED_1", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1},\
+    {"RESERVED_2", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2},\
+    {"SOURCE_SYSTEM_PORT", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT},\
+    {"START_BYTE", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE},\
+    {"generic_loopback_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT}
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NO_OP       0
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2_OIF      1
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED    2
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__VP          3
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP        4
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NHOP        5
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2MC_GROUP  6
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L3MC_GROUP  7
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED_1  8
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP_MEMBER 9
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__DEVICE_PORT 10
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__TUNNEL  0
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__GENERIC 1
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__NOOP   0
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__VFI    1
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__L3_IIF 2
+
+/*!
+ * \name GPE_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GPE_T_FLAGS         0
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GPE_T_NEXT_PROTOCOL 1
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GPE_T_RESERVED0     2
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GPE_T_RESERVED1     3
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GPE_T_VNI           4
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GPE_T_FID_COUNT          5
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT \
+    {"FLAGS", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GPE_T_FLAGS},\
+    {"NEXT_PROTOCOL", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GPE_T_NEXT_PROTOCOL},\
+    {"RESERVED0", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GPE_T_RESERVED0},\
+    {"RESERVED1", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GPE_T_RESERVED1},\
+    {"VNI", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GPE_T_VNI},\
+    {"gpe_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GPE_T_FID_COUNT}
+
+/*!
+ * \name GRE_CHKSUM_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_CHKSUM_T_CHECKSUM 0
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_CHKSUM_T_OFFSET   1
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_CHKSUM_T_FID_COUNT          2
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT \
+    {"CHECKSUM", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_CHKSUM_T_CHECKSUM},\
+    {"OFFSET", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_CHKSUM_T_OFFSET},\
+    {"gre_chksum_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_CHKSUM_T_FID_COUNT}
+
+/*!
+ * \name GRE_KEY_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_KEY_T_KEY 0
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_KEY_T_FID_COUNT          1
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT \
+    {"KEY", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_KEY_T_KEY},\
+    {"gre_key_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_KEY_T_FID_COUNT}
+
+/*!
+ * \name GRE_ROUT_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_ROUT_T_ROUTING 0
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_ROUT_T_FID_COUNT          1
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT \
+    {"ROUTING", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_ROUT_T_ROUTING},\
+    {"gre_rout_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_ROUT_T_FID_COUNT}
+
+/*!
+ * \name GRE_SEQ_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_SEQ_T_SEQUENCE 0
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_SEQ_T_FID_COUNT          1
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT \
+    {"SEQUENCE", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_SEQ_T_SEQUENCE},\
+    {"gre_seq_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_SEQ_T_FID_COUNT}
+
+/*!
+ * \name GRE_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_T_C_R_K_S  0
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_T_PROTOCOL 1
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_T_RESERVED 2
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_T_VERSION  3
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_T_FID_COUNT          4
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT \
+    {"C_R_K_S", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_T_C_R_K_S},\
+    {"PROTOCOL", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_T_PROTOCOL},\
+    {"RESERVED", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_T_RESERVED},\
+    {"VERSION", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_T_VERSION},\
+    {"gre_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_T_FID_COUNT}
+
+/*!
+ * \name HOP_BY_HOP_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN 0
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER 1
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_HOP_BY_HOP_T_OPTION      2
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_HOP_BY_HOP_T_FID_COUNT          3
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT \
+    {"HDR_EXT_LEN", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN},\
+    {"NEXT_HEADER", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER},\
+    {"OPTION", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_HOP_BY_HOP_T_OPTION},\
+    {"hop_by_hop_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_HOP_BY_HOP_T_FID_COUNT}
+
+/*!
+ * \name ICMP_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ICMP_T_CHECKSUM  0
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ICMP_T_CODE      1
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ICMP_T_ICMP_TYPE 2
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ICMP_T_FID_COUNT          3
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT \
+    {"CHECKSUM", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ICMP_T_CHECKSUM},\
+    {"CODE", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ICMP_T_CODE},\
+    {"ICMP_TYPE", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ICMP_T_ICMP_TYPE},\
+    {"icmp_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ICMP_T_FID_COUNT}
+
+/*!
+ * \name IFA_FLEX_MD_0_A_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_0_A_T_FWD_HDR_TTL   0
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_0_A_T_LNS_DEVICE_ID 1
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT          2
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_0_A_T_FIELD_NAME_MAP_INIT \
+    {"FWD_HDR_TTL", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_0_A_T_FWD_HDR_TTL},\
+    {"LNS_DEVICE_ID", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_0_A_T_LNS_DEVICE_ID},\
+    {"ifa_flex_md_0_a_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT}
+
+/*!
+ * \name IFA_FLEX_MD_0_B_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_0_B_T_CN               0
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_0_B_T_PORT_SPEED       1
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_0_B_T_QUEUE_ID         2
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_0_B_T_RX_TIMESTAMP_SEC 3
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT          4
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_0_B_T_FIELD_NAME_MAP_INIT \
+    {"CN", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_0_B_T_CN},\
+    {"PORT_SPEED", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_0_B_T_PORT_SPEED},\
+    {"QUEUE_ID", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_0_B_T_QUEUE_ID},\
+    {"RX_TIMESTAMP_SEC", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_0_B_T_RX_TIMESTAMP_SEC},\
+    {"ifa_flex_md_0_b_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT}
+
+/*!
+ * \name IFA_FLEX_MD_1_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_1_T_EGRESS_PORT_ID       0
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_1_T_INGRESS_PORT_ID      1
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_1_T_RX_TIMESTAMP_NANOSEC 2
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT          3
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_1_T_FIELD_NAME_MAP_INIT \
+    {"EGRESS_PORT_ID", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_1_T_EGRESS_PORT_ID},\
+    {"INGRESS_PORT_ID", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_1_T_INGRESS_PORT_ID},\
+    {"RX_TIMESTAMP_NANOSEC", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_1_T_RX_TIMESTAMP_NANOSEC},\
+    {"ifa_flex_md_1_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT}
+
+/*!
+ * \name IFA_FLEX_MD_2_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_2_T_RESIDENCE_TIME_NANOSEC 0
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_2_T_TX_QUEUE_BYTE_COUNT    1
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT          2
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_2_T_FIELD_NAME_MAP_INIT \
+    {"RESIDENCE_TIME_NANOSEC", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_2_T_RESIDENCE_TIME_NANOSEC},\
+    {"TX_QUEUE_BYTE_COUNT", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_2_T_TX_QUEUE_BYTE_COUNT},\
+    {"ifa_flex_md_2_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT}
+
+/*!
+ * \name IFA_FLEX_MD_3_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_0 0
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_1 1
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT          2
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_3_T_FIELD_NAME_MAP_INIT \
+    {"MMU_STAT_0", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_0},\
+    {"MMU_STAT_1", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_1},\
+    {"ifa_flex_md_3_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT}
+
+/*!
+ * \name IFA_HEADER_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_HEADER_T_FLAGS      0
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_HEADER_T_GNS        1
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_HEADER_T_MAX_LENGTH 2
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_HEADER_T_NEXT_HDR   3
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_HEADER_T_VER        4
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_HEADER_T_FID_COUNT          5
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT \
+    {"FLAGS", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_HEADER_T_FLAGS},\
+    {"GNS", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_HEADER_T_GNS},\
+    {"MAX_LENGTH", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_HEADER_T_MAX_LENGTH},\
+    {"NEXT_HDR", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_HEADER_T_NEXT_HDR},\
+    {"VER", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_HEADER_T_VER},\
+    {"ifa_header_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_HEADER_T_FID_COUNT}
+
+/*!
+ * \name IFA_MD_BASE_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_MD_BASE_T_ACTION_VECTOR            0
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_MD_BASE_T_HOP_LIMIT_CURRENT_LENGTH 1
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_MD_BASE_T_REQUEST_VECTOR           2
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_MD_BASE_T_FID_COUNT          3
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_MD_BASE_T_FIELD_NAME_MAP_INIT \
+    {"ACTION_VECTOR", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_MD_BASE_T_ACTION_VECTOR},\
+    {"HOP_LIMIT_CURRENT_LENGTH", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_MD_BASE_T_HOP_LIMIT_CURRENT_LENGTH},\
+    {"REQUEST_VECTOR", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_MD_BASE_T_REQUEST_VECTOR},\
+    {"ifa_md_base_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_MD_BASE_T_FID_COUNT}
+
+/*!
+ * \name IFA_METADATA_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_METADATA_T_ACTION_VECTOR            0
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_METADATA_T_HOP_LIMIT_CURRENT_LENGTH 1
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_METADATA_T_METADATA                 2
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_METADATA_T_REQUEST_VECTOR           3
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_METADATA_T_FID_COUNT          4
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_METADATA_T_FIELD_NAME_MAP_INIT \
+    {"ACTION_VECTOR", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_METADATA_T_ACTION_VECTOR},\
+    {"HOP_LIMIT_CURRENT_LENGTH", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_METADATA_T_HOP_LIMIT_CURRENT_LENGTH},\
+    {"METADATA", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_METADATA_T_METADATA},\
+    {"REQUEST_VECTOR", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_METADATA_T_REQUEST_VECTOR},\
+    {"ifa_metadata_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_METADATA_T_FID_COUNT}
+
+/*!
+ * \name IGMP_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IGMP_T_CHECKSUM      0
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IGMP_T_GROUP_ADDRESS 1
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IGMP_T_IGMP_TYPE     2
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IGMP_T_MAX_RESP_TIME 3
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IGMP_T_FID_COUNT          4
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT \
+    {"CHECKSUM", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IGMP_T_CHECKSUM},\
+    {"GROUP_ADDRESS", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IGMP_T_GROUP_ADDRESS},\
+    {"IGMP_TYPE", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IGMP_T_IGMP_TYPE},\
+    {"MAX_RESP_TIME", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IGMP_T_MAX_RESP_TIME},\
+    {"igmp_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IGMP_T_FID_COUNT}
+
+/*!
+ * \name IPFIX_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPFIX_T_EXPORT_TIME   0
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPFIX_T_LENGTH        1
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPFIX_T_OBS_DOMAIN_ID 2
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPFIX_T_SEQUENCE_NUM  3
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPFIX_T_VERSION       4
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPFIX_T_FID_COUNT          5
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT \
+    {"EXPORT_TIME", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPFIX_T_EXPORT_TIME},\
+    {"LENGTH", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPFIX_T_LENGTH},\
+    {"OBS_DOMAIN_ID", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPFIX_T_OBS_DOMAIN_ID},\
+    {"SEQUENCE_NUM", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPFIX_T_SEQUENCE_NUM},\
+    {"VERSION", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPFIX_T_VERSION},\
+    {"ipfix_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPFIX_T_FID_COUNT}
+
+/*!
+ * \name IPV4_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV4_T_DA                0
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET 1
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV4_T_HDR_CHECKSUM      2
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV4_T_ID                3
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV4_T_OPTION            4
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV4_T_PROTOCOL          5
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV4_T_SA                6
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV4_T_TOS               7
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV4_T_TOTAL_LENGTH      8
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV4_T_TTL               9
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV4_T_VERSION_HDR_LEN   10
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV4_T_FID_COUNT          11
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT \
+    {"DA", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV4_T_DA},\
+    {"FLAGS_FRAG_OFFSET", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET},\
+    {"HDR_CHECKSUM", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV4_T_HDR_CHECKSUM},\
+    {"ID", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV4_T_ID},\
+    {"OPTION", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV4_T_OPTION},\
+    {"PROTOCOL", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV4_T_PROTOCOL},\
+    {"SA", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV4_T_SA},\
+    {"TOS", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV4_T_TOS},\
+    {"TOTAL_LENGTH", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV4_T_TOTAL_LENGTH},\
+    {"TTL", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV4_T_TTL},\
+    {"VERSION_HDR_LEN", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV4_T_VERSION_HDR_LEN},\
+    {"ipv4_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV4_T_FID_COUNT}
+
+/*!
+ * \name IPV6_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV6_T_DA             0
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV6_T_FLOW_LABEL     1
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV6_T_HOP_LIMIT      2
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV6_T_NEXT_HEADER    3
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV6_T_PAYLOAD_LENGTH 4
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV6_T_SA             5
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV6_T_TRAFFIC_CLASS  6
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV6_T_VERSION        7
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV6_T_FID_COUNT          8
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT \
+    {"DA", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV6_T_DA},\
+    {"FLOW_LABEL", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV6_T_FLOW_LABEL},\
+    {"HOP_LIMIT", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV6_T_HOP_LIMIT},\
+    {"NEXT_HEADER", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV6_T_NEXT_HEADER},\
+    {"PAYLOAD_LENGTH", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV6_T_PAYLOAD_LENGTH},\
+    {"SA", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV6_T_SA},\
+    {"TRAFFIC_CLASS", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV6_T_TRAFFIC_CLASS},\
+    {"VERSION", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV6_T_VERSION},\
+    {"ipv6_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV6_T_FID_COUNT}
+
+/*!
+ * \name L2_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_L2_T_MACDA 0
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_L2_T_MACSA 1
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_L2_T_FID_COUNT          2
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_L2_T_FIELD_NAME_MAP_INIT \
+    {"MACDA", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_L2_T_MACDA},\
+    {"MACSA", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_L2_T_MACSA},\
+    {"l2_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_L2_T_FID_COUNT}
+
+/*!
+ * \name MIRROR_ERSPAN_SN_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM 0
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT          1
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT \
+    {"SEQ_NUM", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM},\
+    {"mirror_erspan_sn_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT}
+
+/*!
+ * \name MIRROR_TRANSPORT_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MIRROR_TRANSPORT_T_DATA 0
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT          1
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT \
+    {"DATA", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MIRROR_TRANSPORT_T_DATA},\
+    {"mirror_transport_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT}
+
+/*!
+ * \name MPLS_ACH_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE 0
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_ACH_T_CW_TYPE      1
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_ACH_T_RESERVED     2
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_ACH_T_VERSION      3
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_ACH_T_FID_COUNT          4
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT \
+    {"CHANNEL_TYPE", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE},\
+    {"CW_TYPE", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_ACH_T_CW_TYPE},\
+    {"RESERVED", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_ACH_T_RESERVED},\
+    {"VERSION", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_ACH_T_VERSION},\
+    {"mpls_ach_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_ACH_T_FID_COUNT}
+
+/*!
+ * \name MPLS_BV_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_BV_T_VALUE 0
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_BV_T_FID_COUNT          1
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT \
+    {"VALUE", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_BV_T_VALUE},\
+    {"mpls_bv_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_BV_T_FID_COUNT}
+
+/*!
+ * \name MPLS_CW_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_CW_T_CW_TYPE    0
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_CW_T_RESERVED   1
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_CW_T_SEQ_NUMBER 2
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_CW_T_FID_COUNT          3
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT \
+    {"CW_TYPE", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_CW_T_CW_TYPE},\
+    {"RESERVED", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_CW_T_RESERVED},\
+    {"SEQ_NUMBER", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_CW_T_SEQ_NUMBER},\
+    {"mpls_cw_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_CW_T_FID_COUNT}
+
+/*!
+ * \name MPLS_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_T_BOS   0
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_T_EXP   1
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_T_LABEL 2
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_T_TTL   3
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_T_FID_COUNT          4
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT \
+    {"BOS", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_T_BOS},\
+    {"EXP", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_T_EXP},\
+    {"LABEL", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_T_LABEL},\
+    {"TTL", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_T_TTL},\
+    {"mpls_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_T_FID_COUNT}
+
+/*!
+ * \name P_1588_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T_CNTRL          0
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T_CORRECTION     1
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T_DOMAIN_NB      2
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T_FLAGS          3
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T_LOGMSGINTERVAL 4
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T_MSG_LENGTH     5
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T_MSG_TYPE       6
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T_RESERVED1      7
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T_RESERVED2      8
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T_RESERVED3      9
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T_SEQ_ID         10
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T_SRCPORTID      11
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T_TRANSPORTSPEC  12
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T_VERSION        13
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T_FID_COUNT          14
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT \
+    {"CNTRL", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T_CNTRL},\
+    {"CORRECTION", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T_CORRECTION},\
+    {"DOMAIN_NB", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T_DOMAIN_NB},\
+    {"FLAGS", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T_FLAGS},\
+    {"LOGMSGINTERVAL", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T_LOGMSGINTERVAL},\
+    {"MSG_LENGTH", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T_MSG_LENGTH},\
+    {"MSG_TYPE", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T_MSG_TYPE},\
+    {"RESERVED1", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T_RESERVED1},\
+    {"RESERVED2", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T_RESERVED2},\
+    {"RESERVED3", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T_RESERVED3},\
+    {"SEQ_ID", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T_SEQ_ID},\
+    {"SRCPORTID", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T_SRCPORTID},\
+    {"TRANSPORTSPEC", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T_TRANSPORTSPEC},\
+    {"VERSION", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T_VERSION},\
+    {"p_1588_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T_FID_COUNT}
+
+/*!
+ * \name PROG_EXT_HDR_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN 0
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER 1
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PROG_EXT_HDR_T_OPTION      2
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PROG_EXT_HDR_T_FID_COUNT          3
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT \
+    {"HDR_EXT_LEN", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN},\
+    {"NEXT_HEADER", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER},\
+    {"OPTION", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PROG_EXT_HDR_T_OPTION},\
+    {"prog_ext_hdr_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PROG_EXT_HDR_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_0_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_0_T_FLOWSET        0
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_0_T_LENGTH         1
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX 2
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_0_T_OBS_TIME_NS    3
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_0_T_OBS_TIME_S     4
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_0_T_TEMPLATE_ID    5
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_0_T_FID_COUNT          6
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT \
+    {"FLOWSET", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_0_T_FLOWSET},\
+    {"LENGTH", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_0_T_LENGTH},\
+    {"NEXT_HOP_INDEX", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX},\
+    {"OBS_TIME_NS", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_0_T_OBS_TIME_NS},\
+    {"OBS_TIME_S", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_0_T_OBS_TIME_S},\
+    {"TEMPLATE_ID", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_0_T_TEMPLATE_ID},\
+    {"psamp_0_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_0_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_1_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_1_T_DLB_ID         0
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_1_T_EGRESS_PORT    1
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_1_T_EPOCH          2
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_1_T_INGRESS_PORT   3
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH 4
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_1_T_USER_META_DATA 5
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_1_T_VARIABLE_FLAG  6
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_1_T_FID_COUNT          7
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT \
+    {"DLB_ID", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_1_T_DLB_ID},\
+    {"EGRESS_PORT", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_1_T_EGRESS_PORT},\
+    {"EPOCH", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_1_T_EPOCH},\
+    {"INGRESS_PORT", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_1_T_INGRESS_PORT},\
+    {"SAMPLED_LENGTH", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH},\
+    {"USER_META_DATA", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_1_T_USER_META_DATA},\
+    {"VARIABLE_FLAG", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_1_T_VARIABLE_FLAG},\
+    {"psamp_1_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_1_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_MIRROR_ON_DROP_0_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT 0
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT    1
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH          2
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS     3
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S      4
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID       5
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID     6
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT          7
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT \
+    {"EGRESS_MOD_PORT", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT},\
+    {"INGRESS_PORT", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT},\
+    {"LENGTH", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH},\
+    {"OBS_TIME_NS", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS},\
+    {"OBS_TIME_S", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S},\
+    {"SWITCH_ID", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID},\
+    {"TEMPLATE_ID", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID},\
+    {"psamp_mirror_on_drop_0_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_MIRROR_ON_DROP_3_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON             0
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0              1
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH          2
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SMOD_STATE              3
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX 4
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA          5
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR       6
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT          7
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT \
+    {"DROP_REASON", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON},\
+    {"RESERVED_0", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0},\
+    {"SAMPLED_LENGTH", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH},\
+    {"SMOD_STATE", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SMOD_STATE},\
+    {"UC_COS__COLOR__PROB_IDX", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX},\
+    {"USER_META_DATA", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA},\
+    {"VAR_LEN_INDICATOR", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR},\
+    {"psamp_mirror_on_drop_3_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT}
+
+/*!
+ * \name RARP_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RARP_T_HARDWARE_LEN  0
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RARP_T_HARDWARE_TYPE 1
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RARP_T_OPERATION     2
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RARP_T_PROT_ADDR_LEN 3
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RARP_T_PROTOCOL_TYPE 4
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RARP_T_SENDER_HA     5
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RARP_T_SENDER_IP     6
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RARP_T_TARGET_HA     7
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RARP_T_TARGET_IP     8
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RARP_T_FID_COUNT          9
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT \
+    {"HARDWARE_LEN", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RARP_T_HARDWARE_LEN},\
+    {"HARDWARE_TYPE", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RARP_T_HARDWARE_TYPE},\
+    {"OPERATION", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RARP_T_OPERATION},\
+    {"PROT_ADDR_LEN", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RARP_T_PROT_ADDR_LEN},\
+    {"PROTOCOL_TYPE", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RARP_T_PROTOCOL_TYPE},\
+    {"SENDER_HA", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RARP_T_SENDER_HA},\
+    {"SENDER_IP", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RARP_T_SENDER_IP},\
+    {"TARGET_HA", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RARP_T_TARGET_HA},\
+    {"TARGET_IP", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RARP_T_TARGET_IP},\
+    {"rarp_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RARP_T_FID_COUNT}
+
+/*!
+ * \name ROUTING_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ROUTING_T_DATA          0
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ROUTING_T_HDR_EXT_LEN   1
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ROUTING_T_NEXT_HEADER   2
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ROUTING_T_ROUTING_TYPE  3
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ROUTING_T_SEGMENTS_LEFT 4
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ROUTING_T_FID_COUNT          5
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT \
+    {"DATA", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ROUTING_T_DATA},\
+    {"HDR_EXT_LEN", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ROUTING_T_HDR_EXT_LEN},\
+    {"NEXT_HEADER", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ROUTING_T_NEXT_HEADER},\
+    {"ROUTING_TYPE", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ROUTING_T_ROUTING_TYPE},\
+    {"SEGMENTS_LEFT", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ROUTING_T_SEGMENTS_LEFT},\
+    {"routing_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ROUTING_T_FID_COUNT}
+
+/*!
+ * \name RSPAN_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RSPAN_T_TAG  0
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RSPAN_T_TPID 1
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RSPAN_T_FID_COUNT          2
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT \
+    {"TAG", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RSPAN_T_TAG},\
+    {"TPID", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RSPAN_T_TPID},\
+    {"rspan_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RSPAN_T_FID_COUNT}
+
+/*!
+ * \name SFLOW_SHIM_0_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION 0
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE      1
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_0_T_VERSION         2
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT          3
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT \
+    {"SYS_DESTINATION", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION},\
+    {"SYS_SOURCE", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE},\
+    {"VERSION", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_0_T_VERSION},\
+    {"sflow_shim_0_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT}
+
+/*!
+ * \name SFLOW_SHIM_1_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE 0
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED   1
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE 2
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST       3
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE  4
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED   5
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_1_T_RESERVED         6
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE       7
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT          8
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT \
+    {"FLAG_DEST_SAMPLE", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE},\
+    {"FLAG_DISCARDED", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED},\
+    {"FLAG_FLEX_SAMPLE", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE},\
+    {"FLAG_MCAST", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST},\
+    {"FLAG_SRC_SAMPLE", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE},\
+    {"FLAG_TRUNCATED", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED},\
+    {"RESERVED", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_1_T_RESERVED},\
+    {"SYS_OPCODE", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE},\
+    {"sflow_shim_1_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT}
+
+/*!
+ * \name SFLOW_SHIM_2_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM   0
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA 1
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT          2
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT \
+    {"SEQUENCE_NUM", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM},\
+    {"USER_META_DATA", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA},\
+    {"sflow_shim_2_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT}
+
+/*!
+ * \name SNAP_LLC_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SNAP_LLC_T_LENGTH   0
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SNAP_LLC_T_SNAP_LLC 1
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SNAP_LLC_T_FID_COUNT          2
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT \
+    {"LENGTH", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SNAP_LLC_T_LENGTH},\
+    {"SNAP_LLC", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SNAP_LLC_T_SNAP_LLC},\
+    {"snap_llc_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SNAP_LLC_T_FID_COUNT}
+
+/*!
+ * \name SVTAG_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SVTAG_T_DATA_LWR 0
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SVTAG_T_DATA_UPR 1
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SVTAG_T_FID_COUNT          2
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SVTAG_T_FIELD_NAME_MAP_INIT \
+    {"DATA_LWR", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SVTAG_T_DATA_LWR},\
+    {"DATA_UPR", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SVTAG_T_DATA_UPR},\
+    {"svtag_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SVTAG_T_FID_COUNT}
+
+/*!
+ * \name TCP_FIRST_4BYTES_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT 0
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT 1
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT          2
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT \
+    {"DST_PORT", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT},\
+    {"SRC_PORT", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT},\
+    {"tcp_first_4bytes_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT}
+
+/*!
+ * \name TCP_LAST_16BYTES_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM           0
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM          1
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS 2
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM           3
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR        4
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE          5
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT          6
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT \
+    {"ACK_NUM", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM},\
+    {"CHECKSUM", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM},\
+    {"HDR_LEN_AND_FLAGS", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS},\
+    {"SEQ_NUM", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM},\
+    {"URGENT_PTR", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR},\
+    {"WIN_SIZE", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE},\
+    {"tcp_last_16bytes_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT}
+
+/*!
+ * \name UDP_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UDP_T_CHECKSUM   0
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UDP_T_DST_PORT   1
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UDP_T_SRC_PORT   2
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UDP_T_UDP_LENGTH 3
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UDP_T_FID_COUNT          4
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT \
+    {"CHECKSUM", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UDP_T_CHECKSUM},\
+    {"DST_PORT", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UDP_T_DST_PORT},\
+    {"SRC_PORT", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UDP_T_SRC_PORT},\
+    {"UDP_LENGTH", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UDP_T_UDP_LENGTH},\
+    {"udp_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UDP_T_FID_COUNT}
+
+/*!
+ * \name UNKNOWN_L3_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD 0
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD  1
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L3_T_FID_COUNT          2
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT \
+    {"FIRST_16BYTES_OF_L3_PAYLOAD", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD},\
+    {"NEXT_16BYTES_OF_L3_PAYLOAD", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD},\
+    {"unknown_l3_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L3_T_FID_COUNT}
+
+/*!
+ * \name UNKNOWN_L4_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD 0
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L4_T_FID_COUNT          1
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT \
+    {"FIRST_4BYTES_OF_L4_PAYLOAD", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD},\
+    {"unknown_l4_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L4_T_FID_COUNT}
+
+/*!
+ * \name UNKNOWN_L5_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1 0
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3 1
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7 2
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L5_T_FID_COUNT          3
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT \
+    {"L5_BYTES_0_1", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1},\
+    {"L5_BYTES_2_3", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3},\
+    {"L5_BYTES_4_7", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7},\
+    {"unknown_l5_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L5_T_FID_COUNT}
+
+/*!
+ * \name VLAN_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VLAN_T_CFI  0
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VLAN_T_PCP  1
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VLAN_T_TPID 2
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VLAN_T_VID  3
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VLAN_T_FID_COUNT          4
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT \
+    {"CFI", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VLAN_T_CFI},\
+    {"PCP", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VLAN_T_PCP},\
+    {"TPID", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VLAN_T_TPID},\
+    {"VID", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VLAN_T_VID},\
+    {"vlan_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VLAN_T_FID_COUNT}
+
+/*!
+ * \name VNTAG_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VNTAG_T_TAG  0
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VNTAG_T_TPID 1
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VNTAG_T_FID_COUNT          2
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VNTAG_T_FIELD_NAME_MAP_INIT \
+    {"TAG", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VNTAG_T_TAG},\
+    {"TPID", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VNTAG_T_TPID},\
+    {"vntag_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VNTAG_T_FID_COUNT}
+
+/*!
+ * \name VXLAN_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VXLAN_T_FLAGS_RESERVED_1 0
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VXLAN_T_RESERVED2        1
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VXLAN_T_VN_ID            2
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VXLAN_T_FID_COUNT          3
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT \
+    {"FLAGS_RESERVED_1", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VXLAN_T_FLAGS_RESERVED_1},\
+    {"RESERVED2", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VXLAN_T_RESERVED2},\
+    {"VN_ID", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VXLAN_T_VN_ID},\
+    {"vxlan_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VXLAN_T_FID_COUNT}
+
+/*!
+ * \name WESP_T field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_WESP_T_FLAGS       0
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_WESP_T_HEADER_LEN  1
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_WESP_T_NEXT_HEADER 2
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_WESP_T_SEQ_NUM     3
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_WESP_T_SPI         4
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_WESP_T_TRAILER_LEN 5
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_WESP_T_WESP_IV     6
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_WESP_T_FID_COUNT          7
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT \
+    {"FLAGS", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_WESP_T_FLAGS},\
+    {"HEADER_LEN", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_WESP_T_HEADER_LEN},\
+    {"NEXT_HEADER", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_WESP_T_NEXT_HEADER},\
+    {"SEQ_NUM", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_WESP_T_SEQ_NUM},\
+    {"SPI", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_WESP_T_SPI},\
+    {"TRAILER_LEN", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_WESP_T_TRAILER_LEN},\
+    {"WESP_IV", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_WESP_T_WESP_IV},\
+    {"wesp_t fid count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_WESP_T_FID_COUNT}
+
+
+#endif /* BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_FLEXHDR_DATA_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_bcmpkt_rxpmd_flex_data.h
new file mode 100644
index 000000000..b68fdc1be
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_bcmpkt_rxpmd_flex_data.h
@@ -0,0 +1,181 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) map.yml.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_DATA_H
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_DATA_H
+
+/*!
+ * \name RX flex metadata field IDs.
+ */
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0                                 0
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0                                            1
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_DVP_15_0                                                  2
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0                                         3
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_EGR_MTOP_INDEX_HI_3_0                                     4
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_EGR_MTOP_INDEX_LO_EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0 5
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0                   6
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0                                    7
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0                                    8
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0                                 9
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16                                10
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0                                   11
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16                                  12
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32                                  13
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0                                         14
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0                                   15
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_IFP_TO_EP_MACSEC_INFO_OR_IFP_OPAQUE_OBJ_15_0              16
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0                                 17
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0                                        18
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16                                       19
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0                                       20
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0            21
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0                               22
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_INT_PRI_3_0                                               23
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_L2_IIF_10_0                                               24
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_L2_OIF_10_0                                               25
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_L3_IIF_13_0                                               26
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0                                             27
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0                         28
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0                                         29
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0                                       30
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0                                       31
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_SVP_15_0                                                  32
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0                              33
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0                                   34
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0                                         35
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0                                        36
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0                                        37
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0                           38
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_VFI_15_0                                                  39
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0              40
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_FID_COUNT                       41
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_COUNT                    47
+
+/*!
+ * \name Packet Flex Reason Types.
+ */
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE                         0
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS                               1
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED 2
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED                    3
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED  4
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED                     5
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_DST_FP                                  6
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_EM_FT                                   7
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_IFP                                     8
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_IFP_METER                               9
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED      10
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_IVXLT                                   11
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP                           12
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS                      13
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE                      14
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP                           15
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS                      16
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR                            17
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF                        18
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR                            19
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL                        20
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD                    21
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0                      22
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1                      23
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2                      24
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3                      25
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4                      26
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5                      27
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6                      28
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7                      29
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD            30
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED              31
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED                  32
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU                    33
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MTOP_IPV4_GATEWAY                       34
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU                          35
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED              36
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT                            37
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT                      38
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_SER_DROP                                39
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD         40
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_SVP                                     41
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP                               42
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU                43
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR                     44
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED                       45
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_VFP                                     46
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT \
+    {"CB_STATION_MOVE", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE},\
+    {"CML_FLAGS", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS},\
+    {"DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED},\
+    {"DLB_ECMP_PKT_SAMPLED", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED},\
+    {"DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED},\
+    {"DLB_LAG_PKT_SAMPLED", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED},\
+    {"DST_FP", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_DST_FP},\
+    {"EM_FT", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_EM_FT},\
+    {"IFP", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_IFP},\
+    {"IFP_METER", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_IFP_METER},\
+    {"IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED},\
+    {"IVXLT", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_IVXLT},\
+    {"L2_DST_LOOKUP", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP},\
+    {"L2_DST_LOOKUP_MISS", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS},\
+    {"L2_SRC_STATIC_MOVE", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE},\
+    {"L3_DST_LOOKUP", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP},\
+    {"L3_DST_LOOKUP_MISS", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS},\
+    {"L3_HDR_ERROR", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR},\
+    {"L3_IIF_EQ_L3_OIF", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF},\
+    {"L3_TTL_ERROR", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR},\
+    {"LEARN_CACHE_FULL", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL},\
+    {"MACSA_MULTICAST_RSVD", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD},\
+    {"MATCHED_RULE_BIT_0", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0},\
+    {"MATCHED_RULE_BIT_1", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1},\
+    {"MATCHED_RULE_BIT_2", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2},\
+    {"MATCHED_RULE_BIT_3", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3},\
+    {"MATCHED_RULE_BIT_4", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4},\
+    {"MATCHED_RULE_BIT_5", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5},\
+    {"MATCHED_RULE_BIT_6", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6},\
+    {"MATCHED_RULE_BIT_7", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7},\
+    {"MEMBERSHIP_CHECK_FAILED_RSVD", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD},\
+    {"MIRROR_SAMPLER_EGR_SAMPLED", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED},\
+    {"MIRROR_SAMPLER_SAMPLED", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED},\
+    {"MPLS_CTRL_PKT_TO_CPU", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU},\
+    {"MTOP_IPV4_GATEWAY", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MTOP_IPV4_GATEWAY},\
+    {"NO_COPY_TO_CPU", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU},\
+    {"PKT_INTEGRITY_CHECK_FAILED", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED},\
+    {"PROTOCOL_PKT", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT},\
+    {"RESERVED_TRACE_BIT", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT},\
+    {"SER_DROP", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_SER_DROP},\
+    {"SPANNING_TREE_CHECK_FAILED_RSVD", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD},\
+    {"SVP", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_SVP},\
+    {"TRACE_DOP", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP},\
+    {"TRACE_DO_NOT_COPY_TO_CPU", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU},\
+    {"TRACE_DO_NOT_MIRROR", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR},\
+    {"URPF_CHECK_FAILED", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED},\
+    {"VFP", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_VFP},\
+    {"flex reason count", BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_COUNT}
+
+#endif /* BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_DATA_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_bcmpkt_rxpmd_match_id_defs.h
new file mode 100644
index 000000000..80393cd91
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_bcmpkt_rxpmd_match_id_defs.h
@@ -0,0 +1,405 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) bcm56780_a0_hna_6_5_29_2_1_sf_match_id_info.yml
+ * for device bcm56780_a0 and variant hna_6_5_29_2_1.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_MATCH_ID_DEFS_H
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_MATCH_ID_DEFS_H
+
+#include <bcmpkt/bcmpkt_rxpmd_match_id.h>
+
+/*!
+ * \brief Get the Match ID DataBase information.
+ *
+ * \retval bcmpkt_rxpmd_match_id_db_info_t Match ID DataBase information.
+*/
+extern bcmpkt_rxpmd_match_id_db_info_t *
+    bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db_info_get(void);
+
+/*!
+ * \brief Get the Match ID Mapping information.
+ *
+ * \retval bcmpkt_rxpmd_match_id_map_info_t Match ID Mapping information.
+*/
+extern bcmpkt_rxpmd_match_id_map_info_t *
+    bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_map_info_get(void);
+
+/*!
+  \name RXPMD Match IDs
+*/
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG  0
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG  1
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2  2
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE  3
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG  4
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC  5
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SVTAG  6
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG  7
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP  8
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1  9
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2  10
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD  11
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT  12
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE  13
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1  14
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2  15
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE  16
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE  17
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM  18
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY  19
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT  20
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ  21
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP  22
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA  23
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP  24
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4  25
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6  26
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0  27
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1  28
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2  29
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3  30
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4  31
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5  32
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6  33
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH  34
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW  35
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE  36
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588  37
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP  38
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES  39
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES  40
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP  41
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3  42
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4  43
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5  44
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN  45
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH  46
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK  47
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE  48
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG  49
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG  50
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2  51
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE  52
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG  53
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC  54
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SVTAG  55
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG  56
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP  57
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1  58
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2  59
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD  60
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT  61
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE  62
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1  63
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2  64
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE  65
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE  66
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM  67
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY  68
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT  69
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ  70
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP  71
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA  72
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP  73
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4  74
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6  75
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0  76
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1  77
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2  78
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3  79
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4  80
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5  81
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6  82
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH  83
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW  84
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE  85
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588  86
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP  87
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES  88
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES  89
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP  90
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3  91
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4  92
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5  93
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN  94
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG  95
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG  96
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2  97
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE  98
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG  99
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC  100
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG  101
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP  102
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1  103
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2  104
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD  105
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT  106
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE  107
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1  108
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2  109
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP  110
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA  111
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP  112
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4  113
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6  114
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE  115
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588  116
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP  117
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES  118
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES  119
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP  120
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3  121
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4  122
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5  123
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG  124
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG  125
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2  126
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE  127
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG  128
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC  129
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SVTAG  130
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG  131
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP  132
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1  133
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2  134
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD  135
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT  136
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE  137
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1  138
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2  139
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE  140
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE  141
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM  142
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY  143
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT  144
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ  145
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP  146
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA  147
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP  148
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4  149
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6  150
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0  151
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1  152
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2  153
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3  154
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4  155
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5  156
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6  157
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH  158
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW  159
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE  160
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588  161
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP  162
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES  163
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES  164
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP  165
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3  166
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4  167
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5  168
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN  169
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH  170
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK  171
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE  172
+#define BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_COUNT  173
+
+#define BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT \
+    {"EGRESS_PKT_FWD_L2_HDR_ETAG", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG}, \
+    {"EGRESS_PKT_FWD_L2_HDR_ITAG", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG}, \
+    {"EGRESS_PKT_FWD_L2_HDR_L2", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2}, \
+    {"EGRESS_PKT_FWD_L2_HDR_NONE", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE}, \
+    {"EGRESS_PKT_FWD_L2_HDR_OTAG", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG}, \
+    {"EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC}, \
+    {"EGRESS_PKT_FWD_L2_HDR_SVTAG", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SVTAG}, \
+    {"EGRESS_PKT_FWD_L2_HDR_VNTAG", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ARP", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_BFD", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GPE", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ICMP", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IGMP", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IPV4", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IPV6", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS0", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS1", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS2", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS3", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS4", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS5", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS6", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_NONE", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_P_1588", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_RARP", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UDP", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN}, \
+    {"EGRESS_PKT_SYS_HDR_EP_NIH", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH}, \
+    {"EGRESS_PKT_SYS_HDR_LOOPBACK", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK}, \
+    {"EGRESS_PKT_SYS_HDR_NONE", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_ETAG", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_ITAG", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_L2", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_NONE", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_OTAG", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_SVTAG", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SVTAG}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_VNTAG", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN}, \
+    {"INGRESS_PKT_INNER_L2_HDR_ETAG", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG}, \
+    {"INGRESS_PKT_INNER_L2_HDR_ITAG", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG}, \
+    {"INGRESS_PKT_INNER_L2_HDR_L2", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2}, \
+    {"INGRESS_PKT_INNER_L2_HDR_NONE", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE}, \
+    {"INGRESS_PKT_INNER_L2_HDR_OTAG", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG}, \
+    {"INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC}, \
+    {"INGRESS_PKT_INNER_L2_HDR_VNTAG", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ARP", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_BFD", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ICMP", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_IGMP", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_IPV4", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_IPV6", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_NONE", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_P_1588", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_RARP", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UDP", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_ETAG", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_ITAG", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_L2", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_NONE", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_OTAG", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_SVTAG", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SVTAG}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_VNTAG", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ARP", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_BFD", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GPE", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_NONE", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_RARP", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UDP", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN}, \
+    {"INGRESS_PKT_SYS_HDR_EP_NIH", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH}, \
+    {"INGRESS_PKT_SYS_HDR_LOOPBACK", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK}, \
+    {"INGRESS_PKT_SYS_HDR_NONE", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE}, \
+    {"rxpmd_match_id_count", BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_COUNT}
+
+#endif /*! BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_MATCH_ID_DEFS_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_bcmpkt_flexhdr.h
new file mode 100644
index 000000000..531e025d0
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_bcmpkt_flexhdr.h
@@ -0,0 +1,166 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) header.yml.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM56780_A0_INA_2_6_11_0_BCMPKT_FLEXHDR_H
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_FLEXHDR_H
+
+#include <bcmpkt/bcmpkt_flexhdr_internal.h>
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ARP_T                        0
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_AUTHEN_T                     1
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T                        2
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_CNTAG_T                      3
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_0_T           4
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_1_T           5
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_DEST_OPTION_T                6
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_EP_NIH_HEADER_T              7
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_FIXED_HDR_T          8
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_SUBHDR_5_T           9
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ESP_T                        10
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ETAG_T                       11
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ETHERTYPE_T                  12
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_FRAG_T                       13
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T           14
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GPE_T                        15
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_CHKSUM_T                 16
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_KEY_T                    17
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_ROUT_T                   18
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_SEQ_T                    19
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_T                        20
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T                   21
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_EXTENSION_0_T            22
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HOP_BY_HOP_T                 23
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ICMP_T                       24
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_1_RAW_HDR_T              25
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T                 26
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IGMP_T                       27
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IPFIX_T                      28
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV4_T                       29
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV6_T                       30
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_L2_T                         31
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_MIRROR_ERSPAN_SN_T           32
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_MIRROR_TRANSPORT_T           33
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_ACH_T                   34
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_BV_T                    35
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_CW_T                    36
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_T                       37
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T                     38
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PROG_EXT_HDR_T               39
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_0_T                    40
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_1_T                    41
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T     42
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T     43
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T     44
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RARP_T                       45
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ROUTING_T                    46
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RSPAN_T                      47
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_0_T               48
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_1_T               49
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_2_T               50
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_SNAP_LLC_T                   51
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_TCP_FIRST_4BYTES_T           52
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_TCP_LAST_16BYTES_T           53
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_UDP_T                        54
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L3_T                 55
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L4_T                 56
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L5_T                 57
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_VLAN_T                       58
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_VNTAG_T                      59
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_VXLAN_T                      60
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_WESP_T                       61
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_T                 62
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_FLEXHDR_COUNT    63
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_FLEXHDR_NAME_MAP_INIT \
+    {"arp_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_ARP_T},\
+    {"authen_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_AUTHEN_T},\
+    {"bfd_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T},\
+    {"cntag_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_CNTAG_T},\
+    {"cpu_composites_0_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_0_T},\
+    {"cpu_composites_1_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_1_T},\
+    {"dest_option_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_DEST_OPTION_T},\
+    {"ep_nih_header_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_EP_NIH_HEADER_T},\
+    {"erspan3_fixed_hdr_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_FIXED_HDR_T},\
+    {"erspan3_subhdr_5_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_SUBHDR_5_T},\
+    {"esp_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_ESP_T},\
+    {"etag_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_ETAG_T},\
+    {"ethertype_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_ETHERTYPE_T},\
+    {"frag_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_FRAG_T},\
+    {"generic_loopback_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T},\
+    {"gpe_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_GPE_T},\
+    {"gre_chksum_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_CHKSUM_T},\
+    {"gre_key_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_KEY_T},\
+    {"gre_rout_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_ROUT_T},\
+    {"gre_seq_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_SEQ_T},\
+    {"gre_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_T},\
+    {"hg3_base_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T},\
+    {"hg3_extension_0_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_EXTENSION_0_T},\
+    {"hop_by_hop_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_HOP_BY_HOP_T},\
+    {"icmp_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_ICMP_T},\
+    {"ifa_1_raw_hdr_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_1_RAW_HDR_T},\
+    {"ifa_header_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T},\
+    {"igmp_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_IGMP_T},\
+    {"ipfix_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_IPFIX_T},\
+    {"ipv4_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV4_T},\
+    {"ipv6_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV6_T},\
+    {"l2_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_L2_T},\
+    {"mirror_erspan_sn_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_MIRROR_ERSPAN_SN_T},\
+    {"mirror_transport_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_MIRROR_TRANSPORT_T},\
+    {"mpls_ach_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_ACH_T},\
+    {"mpls_bv_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_BV_T},\
+    {"mpls_cw_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_CW_T},\
+    {"mpls_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_T},\
+    {"p_1588_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T},\
+    {"prog_ext_hdr_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_PROG_EXT_HDR_T},\
+    {"psamp_0_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_0_T},\
+    {"psamp_1_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_1_T},\
+    {"psamp_mirror_on_drop_0_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T},\
+    {"psamp_mirror_on_drop_1_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T},\
+    {"psamp_mirror_on_drop_2_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T},\
+    {"rarp_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_RARP_T},\
+    {"routing_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_ROUTING_T},\
+    {"rspan_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_RSPAN_T},\
+    {"sflow_shim_0_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_0_T},\
+    {"sflow_shim_1_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_1_T},\
+    {"sflow_shim_2_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_2_T},\
+    {"snap_llc_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_SNAP_LLC_T},\
+    {"tcp_first_4bytes_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_TCP_FIRST_4BYTES_T},\
+    {"tcp_last_16bytes_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_TCP_LAST_16BYTES_T},\
+    {"udp_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_UDP_T},\
+    {"unknown_l3_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L3_T},\
+    {"unknown_l4_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L4_T},\
+    {"unknown_l5_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L5_T},\
+    {"vlan_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_VLAN_T},\
+    {"vntag_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_VNTAG_T},\
+    {"vxlan_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_VXLAN_T},\
+    {"wesp_t", BCM56780_A0_INA_2_6_11_0_BCMPKT_WESP_T},\
+    {"RXPMD_FLEX_T", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_T},\
+    {"flexhdr count", BCM56780_A0_INA_2_6_11_0_BCMPKT_FLEXHDR_COUNT}
+
+#endif /* BCM56780_A0_INA_2_6_11_0_BCMPKT_FLEXHDR_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_bcmpkt_flexhdr_data.h
new file mode 100644
index 000000000..f4adeae2c
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_bcmpkt_flexhdr_data.h
@@ -0,0 +1,1258 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) header.yml.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM56780_A0_INA_2_6_11_0_BCMPKT_FLEXHDR_DATA_H
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_FLEXHDR_DATA_H
+
+/*!
+ * \name ARP_T field IDs.
+ */
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ARP_T_HARDWARE_LEN  0
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ARP_T_HARDWARE_TYPE 1
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ARP_T_OPERATION     2
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ARP_T_PROT_ADDR_LEN 3
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ARP_T_PROTOCOL_TYPE 4
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ARP_T_SENDER_HA     5
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ARP_T_SENDER_IP     6
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ARP_T_TARGET_HA     7
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ARP_T_TARGET_IP     8
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ARP_T_FID_COUNT          9
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT \
+    {"HARDWARE_LEN", BCM56780_A0_INA_2_6_11_0_BCMPKT_ARP_T_HARDWARE_LEN},\
+    {"HARDWARE_TYPE", BCM56780_A0_INA_2_6_11_0_BCMPKT_ARP_T_HARDWARE_TYPE},\
+    {"OPERATION", BCM56780_A0_INA_2_6_11_0_BCMPKT_ARP_T_OPERATION},\
+    {"PROT_ADDR_LEN", BCM56780_A0_INA_2_6_11_0_BCMPKT_ARP_T_PROT_ADDR_LEN},\
+    {"PROTOCOL_TYPE", BCM56780_A0_INA_2_6_11_0_BCMPKT_ARP_T_PROTOCOL_TYPE},\
+    {"SENDER_HA", BCM56780_A0_INA_2_6_11_0_BCMPKT_ARP_T_SENDER_HA},\
+    {"SENDER_IP", BCM56780_A0_INA_2_6_11_0_BCMPKT_ARP_T_SENDER_IP},\
+    {"TARGET_HA", BCM56780_A0_INA_2_6_11_0_BCMPKT_ARP_T_TARGET_HA},\
+    {"TARGET_IP", BCM56780_A0_INA_2_6_11_0_BCMPKT_ARP_T_TARGET_IP},\
+    {"arp_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_ARP_T_FID_COUNT}
+
+/*!
+ * \name AUTHEN_T field IDs.
+ */
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_AUTHEN_T_DATA        0
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_AUTHEN_T_NEXT_HEADER 1
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_AUTHEN_T_PAYLOAD_LEN 2
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_AUTHEN_T_RESERVED    3
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_AUTHEN_T_SEQ_NUM     4
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_AUTHEN_T_SPI         5
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_AUTHEN_T_FID_COUNT          6
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT \
+    {"DATA", BCM56780_A0_INA_2_6_11_0_BCMPKT_AUTHEN_T_DATA},\
+    {"NEXT_HEADER", BCM56780_A0_INA_2_6_11_0_BCMPKT_AUTHEN_T_NEXT_HEADER},\
+    {"PAYLOAD_LEN", BCM56780_A0_INA_2_6_11_0_BCMPKT_AUTHEN_T_PAYLOAD_LEN},\
+    {"RESERVED", BCM56780_A0_INA_2_6_11_0_BCMPKT_AUTHEN_T_RESERVED},\
+    {"SEQ_NUM", BCM56780_A0_INA_2_6_11_0_BCMPKT_AUTHEN_T_SEQ_NUM},\
+    {"SPI", BCM56780_A0_INA_2_6_11_0_BCMPKT_AUTHEN_T_SPI},\
+    {"authen_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_AUTHEN_T_FID_COUNT}
+
+/*!
+ * \name BFD_T field IDs.
+ */
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_AP            0
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_BFD_LENGTH    1
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_CPI           2
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_DEM           3
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_DESMINTXINTV  4
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_DETECTMULT    5
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_DIAG          6
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_FIN           7
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_MINECHORXINTV 8
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_MPT           9
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_MYDISCRIM     10
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_POLL          11
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_REQMINRXINTV  12
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_STA           13
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_URDISCRIM     14
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_VERSION       15
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_FID_COUNT          16
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT \
+    {"AP", BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_AP},\
+    {"BFD_LENGTH", BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_BFD_LENGTH},\
+    {"CPI", BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_CPI},\
+    {"DEM", BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_DEM},\
+    {"DESMINTXINTV", BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_DESMINTXINTV},\
+    {"DETECTMULT", BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_DETECTMULT},\
+    {"DIAG", BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_DIAG},\
+    {"FIN", BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_FIN},\
+    {"MINECHORXINTV", BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_MINECHORXINTV},\
+    {"MPT", BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_MPT},\
+    {"MYDISCRIM", BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_MYDISCRIM},\
+    {"POLL", BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_POLL},\
+    {"REQMINRXINTV", BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_REQMINRXINTV},\
+    {"STA", BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_STA},\
+    {"URDISCRIM", BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_URDISCRIM},\
+    {"VERSION", BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_VERSION},\
+    {"bfd_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_FID_COUNT}
+
+/*!
+ * \name CNTAG_T field IDs.
+ */
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_CNTAG_T_RPID 0
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_CNTAG_T_TPID 1
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_CNTAG_T_FID_COUNT          2
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT \
+    {"RPID", BCM56780_A0_INA_2_6_11_0_BCMPKT_CNTAG_T_RPID},\
+    {"TPID", BCM56780_A0_INA_2_6_11_0_BCMPKT_CNTAG_T_TPID},\
+    {"cntag_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_CNTAG_T_FID_COUNT}
+
+/*!
+ * \name CPU_COMPOSITES_0_T field IDs.
+ */
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0 0
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1 1
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2 2
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3 3
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4 4
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5 5
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6 6
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT          7
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT \
+    {"DMA_CONT0", BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0},\
+    {"DMA_CONT1", BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1},\
+    {"DMA_CONT2", BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2},\
+    {"DMA_CONT3", BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3},\
+    {"DMA_CONT4", BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4},\
+    {"DMA_CONT5", BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5},\
+    {"DMA_CONT6", BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6},\
+    {"cpu_composites_0_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT}
+
+/*!
+ * \name CPU_COMPOSITES_1_T field IDs.
+ */
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10 0
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11 1
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12 2
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13 3
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14 4
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15 5
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16 6
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17 7
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7  8
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8  9
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9  10
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT          11
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT \
+    {"DMA_CONT10", BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10},\
+    {"DMA_CONT11", BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11},\
+    {"DMA_CONT12", BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12},\
+    {"DMA_CONT13", BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13},\
+    {"DMA_CONT14", BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14},\
+    {"DMA_CONT15", BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15},\
+    {"DMA_CONT16", BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16},\
+    {"DMA_CONT17", BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17},\
+    {"DMA_CONT7", BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7},\
+    {"DMA_CONT8", BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8},\
+    {"DMA_CONT9", BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9},\
+    {"cpu_composites_1_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT}
+
+/*!
+ * \name DEST_OPTION_T field IDs.
+ */
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN 0
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_DEST_OPTION_T_NEXT_HEADER 1
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_DEST_OPTION_T_OPTION      2
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_DEST_OPTION_T_FID_COUNT          3
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT \
+    {"HDR_EXT_LEN", BCM56780_A0_INA_2_6_11_0_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN},\
+    {"NEXT_HEADER", BCM56780_A0_INA_2_6_11_0_BCMPKT_DEST_OPTION_T_NEXT_HEADER},\
+    {"OPTION", BCM56780_A0_INA_2_6_11_0_BCMPKT_DEST_OPTION_T_OPTION},\
+    {"dest_option_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_DEST_OPTION_T_FID_COUNT}
+
+/*!
+ * \name EP_NIH_HEADER_T field IDs.
+ */
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE       0
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE          1
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A        2
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B        3
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C        4
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A      5
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B      6
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C      7
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX 8
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_EP_NIH_HEADER_T_RESERVED_0           9
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_EP_NIH_HEADER_T_START                10
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP            11
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT          12
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT \
+    {"HEADER_SUBTYPE", BCM56780_A0_INA_2_6_11_0_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE},\
+    {"HEADER_TYPE", BCM56780_A0_INA_2_6_11_0_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE},\
+    {"OPAQUE_CTRL_A", BCM56780_A0_INA_2_6_11_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A},\
+    {"OPAQUE_CTRL_B", BCM56780_A0_INA_2_6_11_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B},\
+    {"OPAQUE_CTRL_C", BCM56780_A0_INA_2_6_11_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C},\
+    {"OPAQUE_OBJECT_A", BCM56780_A0_INA_2_6_11_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A},\
+    {"OPAQUE_OBJECT_B", BCM56780_A0_INA_2_6_11_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B},\
+    {"OPAQUE_OBJECT_C", BCM56780_A0_INA_2_6_11_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C},\
+    {"RECIRC_PROFILE_INDEX", BCM56780_A0_INA_2_6_11_0_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX},\
+    {"RESERVED_0", BCM56780_A0_INA_2_6_11_0_BCMPKT_EP_NIH_HEADER_T_RESERVED_0},\
+    {"START", BCM56780_A0_INA_2_6_11_0_BCMPKT_EP_NIH_HEADER_T_START},\
+    {"TIMESTAMP", BCM56780_A0_INA_2_6_11_0_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP},\
+    {"ep_nih_header_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT}
+
+/*!
+ * \name ERSPAN3_FIXED_HDR_T field IDs.
+ */
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO               0
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS               1
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID           2
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O 3
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID        4
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T                 5
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP         6
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER               7
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN              8
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT          9
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT \
+    {"BSO", BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO},\
+    {"COS", BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS},\
+    {"GBP_SID", BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID},\
+    {"P_FT_HWID_D_GRA_O", BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O},\
+    {"SESSION_ID", BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID},\
+    {"T", BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T},\
+    {"TIMESTAMP", BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP},\
+    {"VER", BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER},\
+    {"VLAN", BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN},\
+    {"erspan3_fixed_hdr_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT}
+
+/*!
+ * \name ERSPAN3_SUBHDR_5_T field IDs.
+ */
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID 0
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID     1
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID   2
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP   3
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT          4
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT \
+    {"PLATFORM_ID", BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID},\
+    {"PORT_ID", BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID},\
+    {"SWITCH_ID", BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID},\
+    {"TIMESTAMP", BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP},\
+    {"erspan3_subhdr_5_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT}
+
+/*!
+ * \name ESP_T field IDs.
+ */
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ESP_T_NEXT_HEADER 0
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ESP_T_PAD         1
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ESP_T_PAD_LEN     2
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ESP_T_SEQ_NUM     3
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ESP_T_SPI         4
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ESP_T_FID_COUNT          5
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT \
+    {"NEXT_HEADER", BCM56780_A0_INA_2_6_11_0_BCMPKT_ESP_T_NEXT_HEADER},\
+    {"PAD", BCM56780_A0_INA_2_6_11_0_BCMPKT_ESP_T_PAD},\
+    {"PAD_LEN", BCM56780_A0_INA_2_6_11_0_BCMPKT_ESP_T_PAD_LEN},\
+    {"SEQ_NUM", BCM56780_A0_INA_2_6_11_0_BCMPKT_ESP_T_SEQ_NUM},\
+    {"SPI", BCM56780_A0_INA_2_6_11_0_BCMPKT_ESP_T_SPI},\
+    {"esp_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_ESP_T_FID_COUNT}
+
+/*!
+ * \name ETAG_T field IDs.
+ */
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ETAG_T_TAG  0
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ETAG_T_TPID 1
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ETAG_T_FID_COUNT          2
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ETAG_T_FIELD_NAME_MAP_INIT \
+    {"TAG", BCM56780_A0_INA_2_6_11_0_BCMPKT_ETAG_T_TAG},\
+    {"TPID", BCM56780_A0_INA_2_6_11_0_BCMPKT_ETAG_T_TPID},\
+    {"etag_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_ETAG_T_FID_COUNT}
+
+/*!
+ * \name ETHERTYPE_T field IDs.
+ */
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ETHERTYPE_T_TYPE 0
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ETHERTYPE_T_FID_COUNT          1
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT \
+    {"TYPE", BCM56780_A0_INA_2_6_11_0_BCMPKT_ETHERTYPE_T_TYPE},\
+    {"ethertype_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_ETHERTYPE_T_FID_COUNT}
+
+/*!
+ * \name FRAG_T field IDs.
+ */
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_FRAG_T_FRAG_INFO   0
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_FRAG_T_ID          1
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_FRAG_T_NEXT_HEADER 2
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_FRAG_T_RESERVED    3
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_FRAG_T_FID_COUNT          4
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT \
+    {"FRAG_INFO", BCM56780_A0_INA_2_6_11_0_BCMPKT_FRAG_T_FRAG_INFO},\
+    {"ID", BCM56780_A0_INA_2_6_11_0_BCMPKT_FRAG_T_ID},\
+    {"NEXT_HEADER", BCM56780_A0_INA_2_6_11_0_BCMPKT_FRAG_T_NEXT_HEADER},\
+    {"RESERVED", BCM56780_A0_INA_2_6_11_0_BCMPKT_FRAG_T_RESERVED},\
+    {"frag_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_FRAG_T_FID_COUNT}
+
+/*!
+ * \name GENERIC_LOOPBACK_T field IDs.
+ */
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ    0
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE   1
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ        2
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS              3
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE        4
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY     5
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL     6
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ      7
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0  8
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1  9
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ            10
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1         11
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2         12
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT 13
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE         14
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT          15
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT \
+    {"DESTINATION_OBJ", BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ},\
+    {"DESTINATION_TYPE", BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE},\
+    {"ENTROPY_OBJ", BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ},\
+    {"FLAGS", BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS},\
+    {"HEADER_TYPE", BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE},\
+    {"INPUT_PRIORITY", BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY},\
+    {"INTERFACE_CTRL", BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL},\
+    {"INTERFACE_OBJ", BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ},\
+    {"PROCESSING_CTRL_0", BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0},\
+    {"PROCESSING_CTRL_1", BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1},\
+    {"QOS_OBJ", BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ},\
+    {"RESERVED_1", BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1},\
+    {"RESERVED_2", BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2},\
+    {"SOURCE_SYSTEM_PORT", BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT},\
+    {"START_BYTE", BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE},\
+    {"generic_loopback_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT}
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NO_OP       0
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2_OIF      1
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED    2
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__VP          3
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP        4
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NHOP        5
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2MC_GROUP  6
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L3MC_GROUP  7
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED_1  8
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP_MEMBER 9
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__DEVICE_PORT 10
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__TUNNEL  0
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__GENERIC 1
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__NOOP   0
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__VFI    1
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__L3_IIF 2
+
+/*!
+ * \name GPE_T field IDs.
+ */
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GPE_T_FLAGS         0
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GPE_T_NEXT_PROTOCOL 1
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GPE_T_RESERVED0     2
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GPE_T_RESERVED1     3
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GPE_T_VNI           4
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GPE_T_FID_COUNT          5
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT \
+    {"FLAGS", BCM56780_A0_INA_2_6_11_0_BCMPKT_GPE_T_FLAGS},\
+    {"NEXT_PROTOCOL", BCM56780_A0_INA_2_6_11_0_BCMPKT_GPE_T_NEXT_PROTOCOL},\
+    {"RESERVED0", BCM56780_A0_INA_2_6_11_0_BCMPKT_GPE_T_RESERVED0},\
+    {"RESERVED1", BCM56780_A0_INA_2_6_11_0_BCMPKT_GPE_T_RESERVED1},\
+    {"VNI", BCM56780_A0_INA_2_6_11_0_BCMPKT_GPE_T_VNI},\
+    {"gpe_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_GPE_T_FID_COUNT}
+
+/*!
+ * \name GRE_CHKSUM_T field IDs.
+ */
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_CHKSUM_T_CHECKSUM 0
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_CHKSUM_T_OFFSET   1
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT          2
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT \
+    {"CHECKSUM", BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_CHKSUM_T_CHECKSUM},\
+    {"OFFSET", BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_CHKSUM_T_OFFSET},\
+    {"gre_chksum_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT}
+
+/*!
+ * \name GRE_KEY_T field IDs.
+ */
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_KEY_T_KEY 0
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_KEY_T_FID_COUNT          1
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT \
+    {"KEY", BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_KEY_T_KEY},\
+    {"gre_key_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_KEY_T_FID_COUNT}
+
+/*!
+ * \name GRE_ROUT_T field IDs.
+ */
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_ROUT_T_ROUTING 0
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_ROUT_T_FID_COUNT          1
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT \
+    {"ROUTING", BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_ROUT_T_ROUTING},\
+    {"gre_rout_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_ROUT_T_FID_COUNT}
+
+/*!
+ * \name GRE_SEQ_T field IDs.
+ */
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_SEQ_T_SEQUENCE 0
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_SEQ_T_FID_COUNT          1
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT \
+    {"SEQUENCE", BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_SEQ_T_SEQUENCE},\
+    {"gre_seq_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_SEQ_T_FID_COUNT}
+
+/*!
+ * \name GRE_T field IDs.
+ */
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_T_C_R_K_S  0
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_T_PROTOCOL 1
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_T_RESERVED 2
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_T_VERSION  3
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_T_FID_COUNT          4
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT \
+    {"C_R_K_S", BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_T_C_R_K_S},\
+    {"PROTOCOL", BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_T_PROTOCOL},\
+    {"RESERVED", BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_T_RESERVED},\
+    {"VERSION", BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_T_VERSION},\
+    {"gre_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_T_FID_COUNT}
+
+/*!
+ * \name HG3_BASE_T field IDs.
+ */
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_CN                      0
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_CNG                     1
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_ENTROPY                 2
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_EXT_HDR_PRESENT         3
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_HG3_RESERVED            4
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_L3_ROUTED               5
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_MIRROR_COPY             6
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_RESERVED_ETYPE          7
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION      8
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION_TYPE 9
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_SYSTEM_SOURCE           10
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_TC                      11
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_VERSION                 12
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_FID_COUNT          13
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_FIELD_NAME_MAP_INIT \
+    {"CN", BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_CN},\
+    {"CNG", BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_CNG},\
+    {"ENTROPY", BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_ENTROPY},\
+    {"EXT_HDR_PRESENT", BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_EXT_HDR_PRESENT},\
+    {"HG3_RESERVED", BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_HG3_RESERVED},\
+    {"L3_ROUTED", BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_L3_ROUTED},\
+    {"MIRROR_COPY", BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_MIRROR_COPY},\
+    {"RESERVED_ETYPE", BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_RESERVED_ETYPE},\
+    {"SYSTEM_DESTINATION", BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION},\
+    {"SYSTEM_DESTINATION_TYPE", BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION_TYPE},\
+    {"SYSTEM_SOURCE", BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_SYSTEM_SOURCE},\
+    {"TC", BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_TC},\
+    {"VERSION", BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_VERSION},\
+    {"hg3_base_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_FID_COUNT}
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__NO_OP       0
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L2_OIF      1
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__RESERVED    2
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__VP          3
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__ECMP        4
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__NHOP        5
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L2MC_GROUP  6
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L3MC_GROUP  7
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__RESERVED_1  8
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__ECMP_MEMBER 9
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__DEVICE_PORT 10
+
+/*!
+ * \name HG3_EXTENSION_0_T field IDs.
+ */
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID          0
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_EXTENSION_0_T_DVP_OR_L3_IIF     1
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_EXTENSION_0_T_FLAGS             2
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_EXTENSION_0_T_FORWARDING_DOMAIN 3
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_EXTENSION_0_T_SVP               4
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT          5
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_EXTENSION_0_T_FIELD_NAME_MAP_INIT \
+    {"CLASS_ID", BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID},\
+    {"DVP_OR_L3_IIF", BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_EXTENSION_0_T_DVP_OR_L3_IIF},\
+    {"FLAGS", BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_EXTENSION_0_T_FLAGS},\
+    {"FORWARDING_DOMAIN", BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_EXTENSION_0_T_FORWARDING_DOMAIN},\
+    {"SVP", BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_EXTENSION_0_T_SVP},\
+    {"hg3_extension_0_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT}
+
+/*!
+ * \name HOP_BY_HOP_T field IDs.
+ */
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN 0
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER 1
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HOP_BY_HOP_T_OPTION      2
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT          3
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT \
+    {"HDR_EXT_LEN", BCM56780_A0_INA_2_6_11_0_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN},\
+    {"NEXT_HEADER", BCM56780_A0_INA_2_6_11_0_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER},\
+    {"OPTION", BCM56780_A0_INA_2_6_11_0_BCMPKT_HOP_BY_HOP_T_OPTION},\
+    {"hop_by_hop_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT}
+
+/*!
+ * \name ICMP_T field IDs.
+ */
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ICMP_T_CHECKSUM  0
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ICMP_T_CODE      1
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ICMP_T_ICMP_TYPE 2
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ICMP_T_FID_COUNT          3
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT \
+    {"CHECKSUM", BCM56780_A0_INA_2_6_11_0_BCMPKT_ICMP_T_CHECKSUM},\
+    {"CODE", BCM56780_A0_INA_2_6_11_0_BCMPKT_ICMP_T_CODE},\
+    {"ICMP_TYPE", BCM56780_A0_INA_2_6_11_0_BCMPKT_ICMP_T_ICMP_TYPE},\
+    {"icmp_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_ICMP_T_FID_COUNT}
+
+/*!
+ * \name IFA_1_RAW_HDR_T field IDs.
+ */
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_1_RAW_HDR_T_DATA 0
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_1_RAW_HDR_T_FID_COUNT          1
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_1_RAW_HDR_T_FIELD_NAME_MAP_INIT \
+    {"DATA", BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_1_RAW_HDR_T_DATA},\
+    {"ifa_1_raw_hdr_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_1_RAW_HDR_T_FID_COUNT}
+
+/*!
+ * \name IFA_HEADER_T field IDs.
+ */
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_ACTION_VECTOR       0
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_CUR_LENGTH          1
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_FLAGS               2
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_FLAGS_RSVD          3
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_HOP_LIMIT_HOP_COUNT 4
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_MAX_LENGTH          5
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_METADATA            6
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_MSG_TYPE            7
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_PROBE_MARKER_0      8
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_PROBE_MARKER_1      9
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_REQUEST_VECTOR      10
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_RSVD_0              11
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_SENDER_HANDLE       12
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_SEQUENCE_NUMBER     13
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_VERSION             14
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_FID_COUNT          15
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT \
+    {"ACTION_VECTOR", BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_ACTION_VECTOR},\
+    {"CUR_LENGTH", BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_CUR_LENGTH},\
+    {"FLAGS", BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_FLAGS},\
+    {"FLAGS_RSVD", BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_FLAGS_RSVD},\
+    {"HOP_LIMIT_HOP_COUNT", BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_HOP_LIMIT_HOP_COUNT},\
+    {"MAX_LENGTH", BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_MAX_LENGTH},\
+    {"METADATA", BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_METADATA},\
+    {"MSG_TYPE", BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_MSG_TYPE},\
+    {"PROBE_MARKER_0", BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_PROBE_MARKER_0},\
+    {"PROBE_MARKER_1", BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_PROBE_MARKER_1},\
+    {"REQUEST_VECTOR", BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_REQUEST_VECTOR},\
+    {"RSVD_0", BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_RSVD_0},\
+    {"SENDER_HANDLE", BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_SENDER_HANDLE},\
+    {"SEQUENCE_NUMBER", BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_SEQUENCE_NUMBER},\
+    {"VERSION", BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_VERSION},\
+    {"ifa_header_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_FID_COUNT}
+
+/*!
+ * \name IGMP_T field IDs.
+ */
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IGMP_T_CHECKSUM      0
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IGMP_T_GROUP_ADDRESS 1
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IGMP_T_IGMP_TYPE     2
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IGMP_T_MAX_RESP_TIME 3
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IGMP_T_FID_COUNT          4
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT \
+    {"CHECKSUM", BCM56780_A0_INA_2_6_11_0_BCMPKT_IGMP_T_CHECKSUM},\
+    {"GROUP_ADDRESS", BCM56780_A0_INA_2_6_11_0_BCMPKT_IGMP_T_GROUP_ADDRESS},\
+    {"IGMP_TYPE", BCM56780_A0_INA_2_6_11_0_BCMPKT_IGMP_T_IGMP_TYPE},\
+    {"MAX_RESP_TIME", BCM56780_A0_INA_2_6_11_0_BCMPKT_IGMP_T_MAX_RESP_TIME},\
+    {"igmp_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_IGMP_T_FID_COUNT}
+
+/*!
+ * \name IPFIX_T field IDs.
+ */
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IPFIX_T_EXPORT_TIME   0
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IPFIX_T_LENGTH        1
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID 2
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IPFIX_T_SEQUENCE_NUM  3
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IPFIX_T_VERSION       4
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IPFIX_T_FID_COUNT          5
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT \
+    {"EXPORT_TIME", BCM56780_A0_INA_2_6_11_0_BCMPKT_IPFIX_T_EXPORT_TIME},\
+    {"LENGTH", BCM56780_A0_INA_2_6_11_0_BCMPKT_IPFIX_T_LENGTH},\
+    {"OBS_DOMAIN_ID", BCM56780_A0_INA_2_6_11_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID},\
+    {"SEQUENCE_NUM", BCM56780_A0_INA_2_6_11_0_BCMPKT_IPFIX_T_SEQUENCE_NUM},\
+    {"VERSION", BCM56780_A0_INA_2_6_11_0_BCMPKT_IPFIX_T_VERSION},\
+    {"ipfix_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_IPFIX_T_FID_COUNT}
+
+/*!
+ * \name IPV4_T field IDs.
+ */
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV4_T_DA                0
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET 1
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV4_T_HDR_CHECKSUM      2
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV4_T_ID                3
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV4_T_OPTION            4
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV4_T_PROTOCOL          5
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV4_T_SA                6
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV4_T_TOS               7
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV4_T_TOTAL_LENGTH      8
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV4_T_TTL               9
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV4_T_VERSION_HDR_LEN   10
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV4_T_FID_COUNT          11
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT \
+    {"DA", BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV4_T_DA},\
+    {"FLAGS_FRAG_OFFSET", BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET},\
+    {"HDR_CHECKSUM", BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV4_T_HDR_CHECKSUM},\
+    {"ID", BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV4_T_ID},\
+    {"OPTION", BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV4_T_OPTION},\
+    {"PROTOCOL", BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV4_T_PROTOCOL},\
+    {"SA", BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV4_T_SA},\
+    {"TOS", BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV4_T_TOS},\
+    {"TOTAL_LENGTH", BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV4_T_TOTAL_LENGTH},\
+    {"TTL", BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV4_T_TTL},\
+    {"VERSION_HDR_LEN", BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV4_T_VERSION_HDR_LEN},\
+    {"ipv4_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV4_T_FID_COUNT}
+
+/*!
+ * \name IPV6_T field IDs.
+ */
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV6_T_DA             0
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV6_T_FLOW_LABEL     1
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV6_T_HOP_LIMIT      2
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV6_T_NEXT_HEADER    3
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH 4
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV6_T_SA             5
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV6_T_TRAFFIC_CLASS  6
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV6_T_VERSION        7
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV6_T_FID_COUNT          8
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT \
+    {"DA", BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV6_T_DA},\
+    {"FLOW_LABEL", BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV6_T_FLOW_LABEL},\
+    {"HOP_LIMIT", BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV6_T_HOP_LIMIT},\
+    {"NEXT_HEADER", BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV6_T_NEXT_HEADER},\
+    {"PAYLOAD_LENGTH", BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH},\
+    {"SA", BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV6_T_SA},\
+    {"TRAFFIC_CLASS", BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV6_T_TRAFFIC_CLASS},\
+    {"VERSION", BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV6_T_VERSION},\
+    {"ipv6_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV6_T_FID_COUNT}
+
+/*!
+ * \name L2_T field IDs.
+ */
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_L2_T_MACDA 0
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_L2_T_MACSA 1
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_L2_T_FID_COUNT          2
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT \
+    {"MACDA", BCM56780_A0_INA_2_6_11_0_BCMPKT_L2_T_MACDA},\
+    {"MACSA", BCM56780_A0_INA_2_6_11_0_BCMPKT_L2_T_MACSA},\
+    {"l2_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_L2_T_FID_COUNT}
+
+/*!
+ * \name MIRROR_ERSPAN_SN_T field IDs.
+ */
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM 0
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT          1
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT \
+    {"SEQ_NUM", BCM56780_A0_INA_2_6_11_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM},\
+    {"mirror_erspan_sn_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT}
+
+/*!
+ * \name MIRROR_TRANSPORT_T field IDs.
+ */
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_MIRROR_TRANSPORT_T_DATA 0
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT          1
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT \
+    {"DATA", BCM56780_A0_INA_2_6_11_0_BCMPKT_MIRROR_TRANSPORT_T_DATA},\
+    {"mirror_transport_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT}
+
+/*!
+ * \name MPLS_ACH_T field IDs.
+ */
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE 0
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_ACH_T_CW_TYPE      1
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_ACH_T_RESERVED     2
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_ACH_T_VERSION      3
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_ACH_T_FID_COUNT          4
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT \
+    {"CHANNEL_TYPE", BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE},\
+    {"CW_TYPE", BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_ACH_T_CW_TYPE},\
+    {"RESERVED", BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_ACH_T_RESERVED},\
+    {"VERSION", BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_ACH_T_VERSION},\
+    {"mpls_ach_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_ACH_T_FID_COUNT}
+
+/*!
+ * \name MPLS_BV_T field IDs.
+ */
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_BV_T_VALUE 0
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_BV_T_FID_COUNT          1
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT \
+    {"VALUE", BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_BV_T_VALUE},\
+    {"mpls_bv_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_BV_T_FID_COUNT}
+
+/*!
+ * \name MPLS_CW_T field IDs.
+ */
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_CW_T_CW_TYPE    0
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_CW_T_RESERVED   1
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_CW_T_SEQ_NUMBER 2
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_CW_T_FID_COUNT          3
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT \
+    {"CW_TYPE", BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_CW_T_CW_TYPE},\
+    {"RESERVED", BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_CW_T_RESERVED},\
+    {"SEQ_NUMBER", BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_CW_T_SEQ_NUMBER},\
+    {"mpls_cw_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_CW_T_FID_COUNT}
+
+/*!
+ * \name MPLS_T field IDs.
+ */
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_T_BOS   0
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_T_EXP   1
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_T_LABEL 2
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_T_TTL   3
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_T_FID_COUNT          4
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT \
+    {"BOS", BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_T_BOS},\
+    {"EXP", BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_T_EXP},\
+    {"LABEL", BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_T_LABEL},\
+    {"TTL", BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_T_TTL},\
+    {"mpls_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_T_FID_COUNT}
+
+/*!
+ * \name P_1588_T field IDs.
+ */
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T_CNTRL          0
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T_CORRECTION     1
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T_DOMAIN_NB      2
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T_FLAGS          3
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T_LOGMSGINTERVAL 4
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T_MSG_LENGTH     5
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T_MSG_TYPE       6
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T_RESERVED1      7
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T_RESERVED2      8
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T_RESERVED3      9
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T_SEQ_ID         10
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T_SRCPORTID      11
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T_TRANSPORTSPEC  12
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T_VERSION        13
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T_FID_COUNT          14
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT \
+    {"CNTRL", BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T_CNTRL},\
+    {"CORRECTION", BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T_CORRECTION},\
+    {"DOMAIN_NB", BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T_DOMAIN_NB},\
+    {"FLAGS", BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T_FLAGS},\
+    {"LOGMSGINTERVAL", BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T_LOGMSGINTERVAL},\
+    {"MSG_LENGTH", BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T_MSG_LENGTH},\
+    {"MSG_TYPE", BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T_MSG_TYPE},\
+    {"RESERVED1", BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T_RESERVED1},\
+    {"RESERVED2", BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T_RESERVED2},\
+    {"RESERVED3", BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T_RESERVED3},\
+    {"SEQ_ID", BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T_SEQ_ID},\
+    {"SRCPORTID", BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T_SRCPORTID},\
+    {"TRANSPORTSPEC", BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T_TRANSPORTSPEC},\
+    {"VERSION", BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T_VERSION},\
+    {"p_1588_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T_FID_COUNT}
+
+/*!
+ * \name PROG_EXT_HDR_T field IDs.
+ */
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN 0
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER 1
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PROG_EXT_HDR_T_OPTION      2
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT          3
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT \
+    {"HDR_EXT_LEN", BCM56780_A0_INA_2_6_11_0_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN},\
+    {"NEXT_HEADER", BCM56780_A0_INA_2_6_11_0_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER},\
+    {"OPTION", BCM56780_A0_INA_2_6_11_0_BCMPKT_PROG_EXT_HDR_T_OPTION},\
+    {"prog_ext_hdr_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_0_T field IDs.
+ */
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_0_T_FLOWSET        0
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_0_T_LENGTH         1
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX 2
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_0_T_OBS_TIME_NS    3
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_0_T_OBS_TIME_S     4
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_0_T_TEMPLATE_ID    5
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_0_T_FID_COUNT          6
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT \
+    {"FLOWSET", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_0_T_FLOWSET},\
+    {"LENGTH", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_0_T_LENGTH},\
+    {"NEXT_HOP_INDEX", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX},\
+    {"OBS_TIME_NS", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_0_T_OBS_TIME_NS},\
+    {"OBS_TIME_S", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_0_T_OBS_TIME_S},\
+    {"TEMPLATE_ID", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_0_T_TEMPLATE_ID},\
+    {"psamp_0_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_0_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_1_T field IDs.
+ */
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_1_T_DLB_ID         0
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_1_T_EGRESS_PORT    1
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_1_T_EPOCH          2
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_1_T_INGRESS_PORT   3
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH 4
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_1_T_USER_META_DATA 5
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_1_T_VARIABLE_FLAG  6
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_1_T_FID_COUNT          7
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT \
+    {"DLB_ID", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_1_T_DLB_ID},\
+    {"EGRESS_PORT", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_1_T_EGRESS_PORT},\
+    {"EPOCH", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_1_T_EPOCH},\
+    {"INGRESS_PORT", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_1_T_INGRESS_PORT},\
+    {"SAMPLED_LENGTH", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH},\
+    {"USER_META_DATA", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_1_T_USER_META_DATA},\
+    {"VARIABLE_FLAG", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_1_T_VARIABLE_FLAG},\
+    {"psamp_1_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_1_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_MIRROR_ON_DROP_0_T field IDs.
+ */
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT 0
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT    1
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH          2
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS     3
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S      4
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID       5
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID     6
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT          7
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT \
+    {"EGRESS_MOD_PORT", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT},\
+    {"INGRESS_PORT", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT},\
+    {"LENGTH", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH},\
+    {"OBS_TIME_NS", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS},\
+    {"OBS_TIME_S", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S},\
+    {"SWITCH_ID", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID},\
+    {"TEMPLATE_ID", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID},\
+    {"psamp_mirror_on_drop_0_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_MIRROR_ON_DROP_1_T field IDs.
+ */
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_ING_DROP_REASON    0
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MIRROR_ON_DROP_OBJ 1
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MMU_DROP_CTRL      2
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_SAMPLED_LENGTH     3
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_USER_META_DATA     4
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_VAR_LEN_INDICATOR  5
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT          6
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FIELD_NAME_MAP_INIT \
+    {"ING_DROP_REASON", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_ING_DROP_REASON},\
+    {"MIRROR_ON_DROP_OBJ", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MIRROR_ON_DROP_OBJ},\
+    {"MMU_DROP_CTRL", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MMU_DROP_CTRL},\
+    {"SAMPLED_LENGTH", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_SAMPLED_LENGTH},\
+    {"USER_META_DATA", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_USER_META_DATA},\
+    {"VAR_LEN_INDICATOR", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_VAR_LEN_INDICATOR},\
+    {"psamp_mirror_on_drop_1_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_MIRROR_ON_DROP_2_T field IDs.
+ */
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_EGR_DROP_REASON       0
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_EP_COPY_SESSION_INDEX 1
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_RESERVED_0            2
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_SAMPLED_LENGTH        3
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_USER_META_DATA        4
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_VAR_LEN_INDICATOR     5
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT          6
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FIELD_NAME_MAP_INIT \
+    {"EGR_DROP_REASON", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_EGR_DROP_REASON},\
+    {"EP_COPY_SESSION_INDEX", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_EP_COPY_SESSION_INDEX},\
+    {"RESERVED_0", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_RESERVED_0},\
+    {"SAMPLED_LENGTH", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_SAMPLED_LENGTH},\
+    {"USER_META_DATA", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_USER_META_DATA},\
+    {"VAR_LEN_INDICATOR", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_VAR_LEN_INDICATOR},\
+    {"psamp_mirror_on_drop_2_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT}
+
+/*!
+ * \name RARP_T field IDs.
+ */
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RARP_T_HARDWARE_LEN  0
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RARP_T_HARDWARE_TYPE 1
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RARP_T_OPERATION     2
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RARP_T_PROT_ADDR_LEN 3
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RARP_T_PROTOCOL_TYPE 4
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RARP_T_SENDER_HA     5
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RARP_T_SENDER_IP     6
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RARP_T_TARGET_HA     7
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RARP_T_TARGET_IP     8
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RARP_T_FID_COUNT          9
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT \
+    {"HARDWARE_LEN", BCM56780_A0_INA_2_6_11_0_BCMPKT_RARP_T_HARDWARE_LEN},\
+    {"HARDWARE_TYPE", BCM56780_A0_INA_2_6_11_0_BCMPKT_RARP_T_HARDWARE_TYPE},\
+    {"OPERATION", BCM56780_A0_INA_2_6_11_0_BCMPKT_RARP_T_OPERATION},\
+    {"PROT_ADDR_LEN", BCM56780_A0_INA_2_6_11_0_BCMPKT_RARP_T_PROT_ADDR_LEN},\
+    {"PROTOCOL_TYPE", BCM56780_A0_INA_2_6_11_0_BCMPKT_RARP_T_PROTOCOL_TYPE},\
+    {"SENDER_HA", BCM56780_A0_INA_2_6_11_0_BCMPKT_RARP_T_SENDER_HA},\
+    {"SENDER_IP", BCM56780_A0_INA_2_6_11_0_BCMPKT_RARP_T_SENDER_IP},\
+    {"TARGET_HA", BCM56780_A0_INA_2_6_11_0_BCMPKT_RARP_T_TARGET_HA},\
+    {"TARGET_IP", BCM56780_A0_INA_2_6_11_0_BCMPKT_RARP_T_TARGET_IP},\
+    {"rarp_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_RARP_T_FID_COUNT}
+
+/*!
+ * \name ROUTING_T field IDs.
+ */
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ROUTING_T_DATA          0
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ROUTING_T_HDR_EXT_LEN   1
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ROUTING_T_NEXT_HEADER   2
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ROUTING_T_ROUTING_TYPE  3
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ROUTING_T_SEGMENTS_LEFT 4
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ROUTING_T_FID_COUNT          5
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT \
+    {"DATA", BCM56780_A0_INA_2_6_11_0_BCMPKT_ROUTING_T_DATA},\
+    {"HDR_EXT_LEN", BCM56780_A0_INA_2_6_11_0_BCMPKT_ROUTING_T_HDR_EXT_LEN},\
+    {"NEXT_HEADER", BCM56780_A0_INA_2_6_11_0_BCMPKT_ROUTING_T_NEXT_HEADER},\
+    {"ROUTING_TYPE", BCM56780_A0_INA_2_6_11_0_BCMPKT_ROUTING_T_ROUTING_TYPE},\
+    {"SEGMENTS_LEFT", BCM56780_A0_INA_2_6_11_0_BCMPKT_ROUTING_T_SEGMENTS_LEFT},\
+    {"routing_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_ROUTING_T_FID_COUNT}
+
+/*!
+ * \name RSPAN_T field IDs.
+ */
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RSPAN_T_TAG  0
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RSPAN_T_TPID 1
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RSPAN_T_FID_COUNT          2
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT \
+    {"TAG", BCM56780_A0_INA_2_6_11_0_BCMPKT_RSPAN_T_TAG},\
+    {"TPID", BCM56780_A0_INA_2_6_11_0_BCMPKT_RSPAN_T_TPID},\
+    {"rspan_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_RSPAN_T_FID_COUNT}
+
+/*!
+ * \name SFLOW_SHIM_0_T field IDs.
+ */
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION 0
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE      1
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_0_T_VERSION         2
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT          3
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT \
+    {"SYS_DESTINATION", BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION},\
+    {"SYS_SOURCE", BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE},\
+    {"VERSION", BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_0_T_VERSION},\
+    {"sflow_shim_0_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT}
+
+/*!
+ * \name SFLOW_SHIM_1_T field IDs.
+ */
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE 0
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED   1
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE 2
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST       3
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE  4
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED   5
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED         6
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE       7
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT          8
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT \
+    {"FLAG_DEST_SAMPLE", BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE},\
+    {"FLAG_DISCARDED", BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED},\
+    {"FLAG_FLEX_SAMPLE", BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE},\
+    {"FLAG_MCAST", BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST},\
+    {"FLAG_SRC_SAMPLE", BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE},\
+    {"FLAG_TRUNCATED", BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED},\
+    {"RESERVED", BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED},\
+    {"SYS_OPCODE", BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE},\
+    {"sflow_shim_1_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT}
+
+/*!
+ * \name SFLOW_SHIM_2_T field IDs.
+ */
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM   0
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA 1
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT          2
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT \
+    {"SEQUENCE_NUM", BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM},\
+    {"USER_META_DATA", BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA},\
+    {"sflow_shim_2_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT}
+
+/*!
+ * \name SNAP_LLC_T field IDs.
+ */
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_SNAP_LLC_T_LENGTH   0
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_SNAP_LLC_T_SNAP_LLC 1
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_SNAP_LLC_T_FID_COUNT          2
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT \
+    {"LENGTH", BCM56780_A0_INA_2_6_11_0_BCMPKT_SNAP_LLC_T_LENGTH},\
+    {"SNAP_LLC", BCM56780_A0_INA_2_6_11_0_BCMPKT_SNAP_LLC_T_SNAP_LLC},\
+    {"snap_llc_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_SNAP_LLC_T_FID_COUNT}
+
+/*!
+ * \name TCP_FIRST_4BYTES_T field IDs.
+ */
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT 0
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT 1
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT          2
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT \
+    {"DST_PORT", BCM56780_A0_INA_2_6_11_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT},\
+    {"SRC_PORT", BCM56780_A0_INA_2_6_11_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT},\
+    {"tcp_first_4bytes_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT}
+
+/*!
+ * \name TCP_LAST_16BYTES_T field IDs.
+ */
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM           0
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM          1
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS 2
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM           3
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR        4
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE          5
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT          6
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT \
+    {"ACK_NUM", BCM56780_A0_INA_2_6_11_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM},\
+    {"CHECKSUM", BCM56780_A0_INA_2_6_11_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM},\
+    {"HDR_LEN_AND_FLAGS", BCM56780_A0_INA_2_6_11_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS},\
+    {"SEQ_NUM", BCM56780_A0_INA_2_6_11_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM},\
+    {"URGENT_PTR", BCM56780_A0_INA_2_6_11_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR},\
+    {"WIN_SIZE", BCM56780_A0_INA_2_6_11_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE},\
+    {"tcp_last_16bytes_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT}
+
+/*!
+ * \name UDP_T field IDs.
+ */
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_UDP_T_CHECKSUM   0
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_UDP_T_DST_PORT   1
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_UDP_T_SRC_PORT   2
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_UDP_T_UDP_LENGTH 3
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_UDP_T_FID_COUNT          4
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT \
+    {"CHECKSUM", BCM56780_A0_INA_2_6_11_0_BCMPKT_UDP_T_CHECKSUM},\
+    {"DST_PORT", BCM56780_A0_INA_2_6_11_0_BCMPKT_UDP_T_DST_PORT},\
+    {"SRC_PORT", BCM56780_A0_INA_2_6_11_0_BCMPKT_UDP_T_SRC_PORT},\
+    {"UDP_LENGTH", BCM56780_A0_INA_2_6_11_0_BCMPKT_UDP_T_UDP_LENGTH},\
+    {"udp_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_UDP_T_FID_COUNT}
+
+/*!
+ * \name UNKNOWN_L3_T field IDs.
+ */
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD 0
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD  1
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT          2
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT \
+    {"FIRST_16BYTES_OF_L3_PAYLOAD", BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD},\
+    {"NEXT_16BYTES_OF_L3_PAYLOAD", BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD},\
+    {"unknown_l3_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT}
+
+/*!
+ * \name UNKNOWN_L4_T field IDs.
+ */
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD 0
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT          1
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT \
+    {"FIRST_4BYTES_OF_L4_PAYLOAD", BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD},\
+    {"unknown_l4_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT}
+
+/*!
+ * \name UNKNOWN_L5_T field IDs.
+ */
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1 0
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3 1
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7 2
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT          3
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT \
+    {"L5_BYTES_0_1", BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1},\
+    {"L5_BYTES_2_3", BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3},\
+    {"L5_BYTES_4_7", BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7},\
+    {"unknown_l5_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT}
+
+/*!
+ * \name VLAN_T field IDs.
+ */
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_VLAN_T_CFI  0
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_VLAN_T_PCP  1
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_VLAN_T_TPID 2
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_VLAN_T_VID  3
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_VLAN_T_FID_COUNT          4
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT \
+    {"CFI", BCM56780_A0_INA_2_6_11_0_BCMPKT_VLAN_T_CFI},\
+    {"PCP", BCM56780_A0_INA_2_6_11_0_BCMPKT_VLAN_T_PCP},\
+    {"TPID", BCM56780_A0_INA_2_6_11_0_BCMPKT_VLAN_T_TPID},\
+    {"VID", BCM56780_A0_INA_2_6_11_0_BCMPKT_VLAN_T_VID},\
+    {"vlan_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_VLAN_T_FID_COUNT}
+
+/*!
+ * \name VNTAG_T field IDs.
+ */
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_VNTAG_T_TAG  0
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_VNTAG_T_TPID 1
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_VNTAG_T_FID_COUNT          2
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_VNTAG_T_FIELD_NAME_MAP_INIT \
+    {"TAG", BCM56780_A0_INA_2_6_11_0_BCMPKT_VNTAG_T_TAG},\
+    {"TPID", BCM56780_A0_INA_2_6_11_0_BCMPKT_VNTAG_T_TPID},\
+    {"vntag_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_VNTAG_T_FID_COUNT}
+
+/*!
+ * \name VXLAN_T field IDs.
+ */
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1 0
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_VXLAN_T_RESERVED2        1
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_VXLAN_T_VN_ID            2
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_VXLAN_T_FID_COUNT          3
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT \
+    {"FLAGS_RESERVED_1", BCM56780_A0_INA_2_6_11_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1},\
+    {"RESERVED2", BCM56780_A0_INA_2_6_11_0_BCMPKT_VXLAN_T_RESERVED2},\
+    {"VN_ID", BCM56780_A0_INA_2_6_11_0_BCMPKT_VXLAN_T_VN_ID},\
+    {"vxlan_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_VXLAN_T_FID_COUNT}
+
+/*!
+ * \name WESP_T field IDs.
+ */
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_WESP_T_FLAGS       0
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_WESP_T_HEADER_LEN  1
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_WESP_T_NEXT_HEADER 2
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_WESP_T_SEQ_NUM     3
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_WESP_T_SPI         4
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_WESP_T_TRAILER_LEN 5
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_WESP_T_WESP_IV     6
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_WESP_T_FID_COUNT          7
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT \
+    {"FLAGS", BCM56780_A0_INA_2_6_11_0_BCMPKT_WESP_T_FLAGS},\
+    {"HEADER_LEN", BCM56780_A0_INA_2_6_11_0_BCMPKT_WESP_T_HEADER_LEN},\
+    {"NEXT_HEADER", BCM56780_A0_INA_2_6_11_0_BCMPKT_WESP_T_NEXT_HEADER},\
+    {"SEQ_NUM", BCM56780_A0_INA_2_6_11_0_BCMPKT_WESP_T_SEQ_NUM},\
+    {"SPI", BCM56780_A0_INA_2_6_11_0_BCMPKT_WESP_T_SPI},\
+    {"TRAILER_LEN", BCM56780_A0_INA_2_6_11_0_BCMPKT_WESP_T_TRAILER_LEN},\
+    {"WESP_IV", BCM56780_A0_INA_2_6_11_0_BCMPKT_WESP_T_WESP_IV},\
+    {"wesp_t fid count", BCM56780_A0_INA_2_6_11_0_BCMPKT_WESP_T_FID_COUNT}
+
+
+#endif /* BCM56780_A0_INA_2_6_11_0_BCMPKT_FLEXHDR_DATA_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_bcmpkt_rxpmd_flex_data.h
new file mode 100644
index 000000000..dc271d029
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_bcmpkt_rxpmd_flex_data.h
@@ -0,0 +1,178 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) map.yml.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_DATA_H
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_DATA_H
+
+/*!
+ * \name RX flex metadata field IDs.
+ */
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0                                 0
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0                                            1
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_DVP_15_0                                                  2
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0                                         3
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_EGR_MTOP_INDEX_HI_3_0                                     4
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_EGR_MTOP_INDEX_LO_EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0 5
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0                   6
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0                                    7
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0                                    8
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0                                 9
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16                                10
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0                                   11
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16                                  12
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32                                  13
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0                                         14
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0                                   15
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0                                 16
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0                                        17
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16                                       18
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0                                       19
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0            20
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0                               21
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0                                               22
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_L2_IIF_10_0                                               23
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_L2_OIF_10_0                                               24
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0                                               25
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0                                             26
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0                         27
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0                                         28
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0                                       29
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0                                       30
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_SVP_15_0                                                  31
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0                              32
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0                                   33
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0                                         34
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0                                        35
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0                                        36
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0                           37
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_VFI_15_0                                                  38
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_1_0              39
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_FID_COUNT                       40
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_COUNT                    46
+
+/*!
+ * \name Packet Flex Reason Types.
+ */
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS                               0
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED 1
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED                    2
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED  3
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED                     4
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP                                  5
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT                                   6
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_IFP                                     7
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER                               8
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED      9
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT                                   10
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP                           11
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS                      12
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD                          13
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE                      14
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP                           15
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS                      16
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR                            17
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF                        18
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR                            19
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL                        20
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST                         21
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0                      22
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1                      23
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2                      24
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3                      25
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4                      26
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5                      27
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6                      28
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7                      29
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED                 30
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED              31
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED                  32
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU                    33
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MTOP_IPV4_GATEWAY                       34
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU                          35
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED              36
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT                            37
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP                                38
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED              39
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_SVP                                     40
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP                               41
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU                42
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR                     43
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED                       44
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_VFP                                     45
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT \
+    {"CML_FLAGS", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS},\
+    {"DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED},\
+    {"DLB_ECMP_PKT_SAMPLED", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED},\
+    {"DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED},\
+    {"DLB_LAG_PKT_SAMPLED", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED},\
+    {"DST_FP", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP},\
+    {"EM_FT", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT},\
+    {"IFP", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_IFP},\
+    {"IFP_METER", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER},\
+    {"IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED},\
+    {"IVXLT", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT},\
+    {"L2_DST_LOOKUP", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP},\
+    {"L2_DST_LOOKUP_MISS", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS},\
+    {"L2_SRC_DISCARD", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD},\
+    {"L2_SRC_STATIC_MOVE", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE},\
+    {"L3_DST_LOOKUP", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP},\
+    {"L3_DST_LOOKUP_MISS", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS},\
+    {"L3_HDR_ERROR", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR},\
+    {"L3_IIF_EQ_L3_OIF", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF},\
+    {"L3_TTL_ERROR", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR},\
+    {"LEARN_CACHE_FULL", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL},\
+    {"MACSA_MULTICAST", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST},\
+    {"MATCHED_RULE_BIT_0", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0},\
+    {"MATCHED_RULE_BIT_1", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1},\
+    {"MATCHED_RULE_BIT_2", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2},\
+    {"MATCHED_RULE_BIT_3", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3},\
+    {"MATCHED_RULE_BIT_4", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4},\
+    {"MATCHED_RULE_BIT_5", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5},\
+    {"MATCHED_RULE_BIT_6", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6},\
+    {"MATCHED_RULE_BIT_7", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7},\
+    {"MEMBERSHIP_CHECK_FAILED", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED},\
+    {"MIRROR_SAMPLER_EGR_SAMPLED", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED},\
+    {"MIRROR_SAMPLER_SAMPLED", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED},\
+    {"MPLS_CTRL_PKT_TO_CPU", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU},\
+    {"MTOP_IPV4_GATEWAY", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MTOP_IPV4_GATEWAY},\
+    {"NO_COPY_TO_CPU", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU},\
+    {"PKT_INTEGRITY_CHECK_FAILED", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED},\
+    {"PROTOCOL_PKT", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT},\
+    {"SER_DROP", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP},\
+    {"SPANNING_TREE_CHECK_FAILED", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED},\
+    {"SVP", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_SVP},\
+    {"TRACE_DOP", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP},\
+    {"TRACE_DO_NOT_COPY_TO_CPU", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU},\
+    {"TRACE_DO_NOT_MIRROR", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR},\
+    {"URPF_CHECK_FAILED", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED},\
+    {"VFP", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_VFP},\
+    {"flex reason count", BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_COUNT}
+
+#endif /* BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_DATA_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_bcmpkt_rxpmd_match_id_defs.h
new file mode 100644
index 000000000..5a8aebe2b
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_bcmpkt_rxpmd_match_id_defs.h
@@ -0,0 +1,409 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) bcm56780_a0_ina_2_6_11_0_sf_match_id_info.yml
+ * for device bcm56780_a0 and variant ina_2_6_11_0.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H
+
+#include <bcmpkt/bcmpkt_rxpmd_match_id.h>
+
+/*!
+ * \brief Get the Match ID DataBase information.
+ *
+ * \retval bcmpkt_rxpmd_match_id_db_info_t Match ID DataBase information.
+*/
+extern bcmpkt_rxpmd_match_id_db_info_t *
+    bcm56780_a0_ina_2_6_11_0_rxpmd_match_id_db_info_get(void);
+
+/*!
+ * \brief Get the Match ID Mapping information.
+ *
+ * \retval bcmpkt_rxpmd_match_id_map_info_t Match ID Mapping information.
+*/
+extern bcmpkt_rxpmd_match_id_map_info_t *
+    bcm56780_a0_ina_2_6_11_0_rxpmd_match_id_map_info_get(void);
+
+/*!
+  \name RXPMD Match IDs
+*/
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG  0
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE  1
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0  2
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG  3
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2  4
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE  5
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG  6
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC  7
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG  8
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP  9
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1  10
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2  11
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD  12
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT  13
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE  14
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1  15
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2  16
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE  17
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE  18
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM  19
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY  20
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT  21
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ  22
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP  23
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER  24
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP  25
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4  26
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6  27
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0  28
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1  29
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2  30
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3  31
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4  32
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5  33
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6  34
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH  35
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW  36
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE  37
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588  38
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP  39
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES  40
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES  41
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP  42
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3  43
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4  44
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5  45
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN  46
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH  47
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK  48
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE  49
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG  50
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE  51
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0  52
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG  53
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2  54
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE  55
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG  56
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC  57
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG  58
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP  59
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1  60
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2  61
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD  62
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT  63
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE  64
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1  65
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2  66
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE  67
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE  68
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM  69
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY  70
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT  71
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ  72
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP  73
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER  74
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP  75
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4  76
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6  77
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0  78
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1  79
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2  80
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3  81
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4  82
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5  83
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6  84
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH  85
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW  86
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE  87
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588  88
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP  89
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES  90
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES  91
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP  92
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3  93
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4  94
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5  95
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN  96
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG  97
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG  98
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2  99
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE  100
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG  101
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC  102
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG  103
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP  104
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1  105
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2  106
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD  107
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT  108
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE  109
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1  110
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2  111
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP  112
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP  113
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4  114
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6  115
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE  116
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588  117
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP  118
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES  119
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES  120
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP  121
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3  122
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4  123
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5  124
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG  125
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE  126
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0  127
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG  128
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2  129
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE  130
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG  131
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC  132
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG  133
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP  134
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1  135
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2  136
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD  137
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT  138
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE  139
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1  140
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2  141
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE  142
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE  143
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM  144
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY  145
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT  146
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ  147
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP  148
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER  149
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP  150
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4  151
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6  152
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0  153
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1  154
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2  155
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3  156
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4  157
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5  158
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6  159
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH  160
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW  161
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE  162
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588  163
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP  164
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES  165
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES  166
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP  167
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3  168
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4  169
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5  170
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN  171
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH  172
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK  173
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE  174
+#define BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_COUNT  175
+
+#define BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT \
+    {"EGRESS_PKT_FWD_L2_HDR_ETAG", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG}, \
+    {"EGRESS_PKT_FWD_L2_HDR_HG3_BASE", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE}, \
+    {"EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0}, \
+    {"EGRESS_PKT_FWD_L2_HDR_ITAG", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG}, \
+    {"EGRESS_PKT_FWD_L2_HDR_L2", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2}, \
+    {"EGRESS_PKT_FWD_L2_HDR_NONE", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE}, \
+    {"EGRESS_PKT_FWD_L2_HDR_OTAG", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG}, \
+    {"EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC}, \
+    {"EGRESS_PKT_FWD_L2_HDR_VNTAG", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ARP", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_BFD", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GPE", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ICMP", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IGMP", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IPV4", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IPV6", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS0", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS1", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS2", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS3", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS4", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS5", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS6", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_NONE", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_P_1588", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_RARP", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UDP", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN}, \
+    {"EGRESS_PKT_SYS_HDR_EP_NIH", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH}, \
+    {"EGRESS_PKT_SYS_HDR_LOOPBACK", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK}, \
+    {"EGRESS_PKT_SYS_HDR_NONE", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_ETAG", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_ITAG", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_L2", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_NONE", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_OTAG", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_VNTAG", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN}, \
+    {"INGRESS_PKT_INNER_L2_HDR_ETAG", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG}, \
+    {"INGRESS_PKT_INNER_L2_HDR_ITAG", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG}, \
+    {"INGRESS_PKT_INNER_L2_HDR_L2", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2}, \
+    {"INGRESS_PKT_INNER_L2_HDR_NONE", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE}, \
+    {"INGRESS_PKT_INNER_L2_HDR_OTAG", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG}, \
+    {"INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC}, \
+    {"INGRESS_PKT_INNER_L2_HDR_VNTAG", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ARP", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_BFD", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ICMP", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_IGMP", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_IPV4", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_IPV6", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_NONE", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_P_1588", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_RARP", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UDP", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_ETAG", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_HG3_BASE", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_ITAG", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_L2", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_NONE", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_OTAG", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_VNTAG", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ARP", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_BFD", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GPE", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_NONE", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_RARP", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UDP", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN}, \
+    {"INGRESS_PKT_SYS_HDR_EP_NIH", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH}, \
+    {"INGRESS_PKT_SYS_HDR_LOOPBACK", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK}, \
+    {"INGRESS_PKT_SYS_HDR_NONE", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE}, \
+    {"rxpmd_match_id_count", BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_COUNT}
+
+#endif /*! BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_bcmpkt_flexhdr.h
new file mode 100644
index 000000000..3be7b6731
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_bcmpkt_flexhdr.h
@@ -0,0 +1,92 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) header.yml.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM56880_A0_CNA_6_5_29_BCMPKT_FLEXHDR_H
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_FLEXHDR_H
+
+#include <bcmpkt/bcmpkt_flexhdr_internal.h>
+
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_ARP_T                          0
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T             1
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T             2
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T            3
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T             4
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_ETHERTYPE_T                    5
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T             6
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_ICMP_T                         7
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_IPFIX_T                        8
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_IPV4_T                         9
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_IPV6_T                         10
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_L2_T                           11
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_MIRROR_ERSPAN_SN_T             12
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_MIRROR_TRANSPORT_T             13
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T       14
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T       15
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_RARP_T                         16
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T             17
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T             18
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_UDP_T                          19
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T                   20
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L4_T                   21
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T                   22
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_VLAN_T                         23
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_VXLAN_T                        24
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_T                   25
+
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_FLEXHDR_COUNT    26
+
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_FLEXHDR_NAME_MAP_INIT \
+    {"arp_t", BCM56880_A0_CNA_6_5_29_BCMPKT_ARP_T},\
+    {"cpu_composites_0_t", BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T},\
+    {"cpu_composites_1_t", BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T},\
+    {"erspan3_fixed_hdr_t", BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T},\
+    {"erspan3_subhdr_5_t", BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T},\
+    {"ethertype_t", BCM56880_A0_CNA_6_5_29_BCMPKT_ETHERTYPE_T},\
+    {"generic_loopback_t", BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T},\
+    {"icmp_t", BCM56880_A0_CNA_6_5_29_BCMPKT_ICMP_T},\
+    {"ipfix_t", BCM56880_A0_CNA_6_5_29_BCMPKT_IPFIX_T},\
+    {"ipv4_t", BCM56880_A0_CNA_6_5_29_BCMPKT_IPV4_T},\
+    {"ipv6_t", BCM56880_A0_CNA_6_5_29_BCMPKT_IPV6_T},\
+    {"l2_t", BCM56880_A0_CNA_6_5_29_BCMPKT_L2_T},\
+    {"mirror_erspan_sn_t", BCM56880_A0_CNA_6_5_29_BCMPKT_MIRROR_ERSPAN_SN_T},\
+    {"mirror_transport_t", BCM56880_A0_CNA_6_5_29_BCMPKT_MIRROR_TRANSPORT_T},\
+    {"psamp_mirror_on_drop_0_t", BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T},\
+    {"psamp_mirror_on_drop_1_t", BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T},\
+    {"rarp_t", BCM56880_A0_CNA_6_5_29_BCMPKT_RARP_T},\
+    {"tcp_first_4bytes_t", BCM56880_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T},\
+    {"tcp_last_16bytes_t", BCM56880_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T},\
+    {"udp_t", BCM56880_A0_CNA_6_5_29_BCMPKT_UDP_T},\
+    {"unknown_l3_t", BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T},\
+    {"unknown_l4_t", BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L4_T},\
+    {"unknown_l5_t", BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T},\
+    {"vlan_t", BCM56880_A0_CNA_6_5_29_BCMPKT_VLAN_T},\
+    {"vxlan_t", BCM56880_A0_CNA_6_5_29_BCMPKT_VXLAN_T},\
+    {"RXPMD_FLEX_T", BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_T},\
+    {"flexhdr count", BCM56880_A0_CNA_6_5_29_BCMPKT_FLEXHDR_COUNT}
+
+#endif /* BCM56880_A0_CNA_6_5_29_BCMPKT_FLEXHDR_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_bcmpkt_flexhdr_data.h
new file mode 100644
index 000000000..34e44e61f
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_bcmpkt_flexhdr_data.h
@@ -0,0 +1,539 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) header.yml.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM56880_A0_CNA_6_5_29_BCMPKT_FLEXHDR_DATA_H
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_FLEXHDR_DATA_H
+
+/*!
+ * \name ARP_T field IDs.
+ */
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_ARP_T_HARDWARE_LEN  0
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_ARP_T_HARDWARE_TYPE 1
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_ARP_T_OPERATION     2
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_ARP_T_PROT_ADDR_LEN 3
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_ARP_T_PROTOCOL_TYPE 4
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_ARP_T_SENDER_HA     5
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_ARP_T_SENDER_IP     6
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_ARP_T_TARGET_HA     7
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_ARP_T_TARGET_IP     8
+
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_ARP_T_FID_COUNT          9
+
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT \
+    {"HARDWARE_LEN", BCM56880_A0_CNA_6_5_29_BCMPKT_ARP_T_HARDWARE_LEN},\
+    {"HARDWARE_TYPE", BCM56880_A0_CNA_6_5_29_BCMPKT_ARP_T_HARDWARE_TYPE},\
+    {"OPERATION", BCM56880_A0_CNA_6_5_29_BCMPKT_ARP_T_OPERATION},\
+    {"PROT_ADDR_LEN", BCM56880_A0_CNA_6_5_29_BCMPKT_ARP_T_PROT_ADDR_LEN},\
+    {"PROTOCOL_TYPE", BCM56880_A0_CNA_6_5_29_BCMPKT_ARP_T_PROTOCOL_TYPE},\
+    {"SENDER_HA", BCM56880_A0_CNA_6_5_29_BCMPKT_ARP_T_SENDER_HA},\
+    {"SENDER_IP", BCM56880_A0_CNA_6_5_29_BCMPKT_ARP_T_SENDER_IP},\
+    {"TARGET_HA", BCM56880_A0_CNA_6_5_29_BCMPKT_ARP_T_TARGET_HA},\
+    {"TARGET_IP", BCM56880_A0_CNA_6_5_29_BCMPKT_ARP_T_TARGET_IP},\
+    {"arp_t fid count", BCM56880_A0_CNA_6_5_29_BCMPKT_ARP_T_FID_COUNT}
+
+/*!
+ * \name CPU_COMPOSITES_0_T field IDs.
+ */
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0 0
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1 1
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2 2
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3 3
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4 4
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5 5
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6 6
+
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT          7
+
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT \
+    {"DMA_CONT0", BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0},\
+    {"DMA_CONT1", BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1},\
+    {"DMA_CONT2", BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2},\
+    {"DMA_CONT3", BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3},\
+    {"DMA_CONT4", BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4},\
+    {"DMA_CONT5", BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5},\
+    {"DMA_CONT6", BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6},\
+    {"cpu_composites_0_t fid count", BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT}
+
+/*!
+ * \name CPU_COMPOSITES_1_T field IDs.
+ */
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10 0
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11 1
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12 2
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13 3
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14 4
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15 5
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16 6
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17 7
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7  8
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8  9
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9  10
+
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT          11
+
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT \
+    {"DMA_CONT10", BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10},\
+    {"DMA_CONT11", BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11},\
+    {"DMA_CONT12", BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12},\
+    {"DMA_CONT13", BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13},\
+    {"DMA_CONT14", BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14},\
+    {"DMA_CONT15", BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15},\
+    {"DMA_CONT16", BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16},\
+    {"DMA_CONT17", BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17},\
+    {"DMA_CONT7", BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7},\
+    {"DMA_CONT8", BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8},\
+    {"DMA_CONT9", BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9},\
+    {"cpu_composites_1_t fid count", BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT}
+
+/*!
+ * \name ERSPAN3_FIXED_HDR_T field IDs.
+ */
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO               0
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_COS               1
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID           2
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O 3
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID        4
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_T                 5
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP         6
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_VER               7
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN              8
+
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT          9
+
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT \
+    {"BSO", BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO},\
+    {"COS", BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_COS},\
+    {"GBP_SID", BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID},\
+    {"P_FT_HWID_D_GRA_O", BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O},\
+    {"SESSION_ID", BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID},\
+    {"T", BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_T},\
+    {"TIMESTAMP", BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP},\
+    {"VER", BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_VER},\
+    {"VLAN", BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN},\
+    {"erspan3_fixed_hdr_t fid count", BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT}
+
+/*!
+ * \name ERSPAN3_SUBHDR_5_T field IDs.
+ */
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID 0
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID     1
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID   2
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP   3
+
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT          4
+
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT \
+    {"PLATFORM_ID", BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID},\
+    {"PORT_ID", BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID},\
+    {"SWITCH_ID", BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID},\
+    {"TIMESTAMP", BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP},\
+    {"erspan3_subhdr_5_t fid count", BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT}
+
+/*!
+ * \name ETHERTYPE_T field IDs.
+ */
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_ETHERTYPE_T_TYPE 0
+
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_ETHERTYPE_T_FID_COUNT          1
+
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT \
+    {"TYPE", BCM56880_A0_CNA_6_5_29_BCMPKT_ETHERTYPE_T_TYPE},\
+    {"ethertype_t fid count", BCM56880_A0_CNA_6_5_29_BCMPKT_ETHERTYPE_T_FID_COUNT}
+
+/*!
+ * \name GENERIC_LOOPBACK_T field IDs.
+ */
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ    0
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE   1
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ        2
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_FLAGS              3
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE        4
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY     5
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL     6
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ      7
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0  8
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1  9
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ            10
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1         11
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2         12
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT 13
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE         14
+
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT          15
+
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT \
+    {"DESTINATION_OBJ", BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ},\
+    {"DESTINATION_TYPE", BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE},\
+    {"ENTROPY_OBJ", BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ},\
+    {"FLAGS", BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_FLAGS},\
+    {"HEADER_TYPE", BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE},\
+    {"INPUT_PRIORITY", BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY},\
+    {"INTERFACE_CTRL", BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL},\
+    {"INTERFACE_OBJ", BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ},\
+    {"PROCESSING_CTRL_0", BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0},\
+    {"PROCESSING_CTRL_1", BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1},\
+    {"QOS_OBJ", BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ},\
+    {"RESERVED_1", BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1},\
+    {"RESERVED_2", BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2},\
+    {"SOURCE_SYSTEM_PORT", BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT},\
+    {"START_BYTE", BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE},\
+    {"generic_loopback_t fid count", BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT}
+
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NO_OP       0
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2_OIF      1
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED    2
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__VP          3
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP        4
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NHOP        5
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2MC_GROUP  6
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L3MC_GROUP  7
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__VP_GROUP    8
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED_1  9
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP_MEMBER 10
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__DEVICE_PORT 11
+
+/*!
+ * \name ICMP_T field IDs.
+ */
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_ICMP_T_CHECKSUM  0
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_ICMP_T_CODE      1
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_ICMP_T_ICMP_TYPE 2
+
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_ICMP_T_FID_COUNT          3
+
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT \
+    {"CHECKSUM", BCM56880_A0_CNA_6_5_29_BCMPKT_ICMP_T_CHECKSUM},\
+    {"CODE", BCM56880_A0_CNA_6_5_29_BCMPKT_ICMP_T_CODE},\
+    {"ICMP_TYPE", BCM56880_A0_CNA_6_5_29_BCMPKT_ICMP_T_ICMP_TYPE},\
+    {"icmp_t fid count", BCM56880_A0_CNA_6_5_29_BCMPKT_ICMP_T_FID_COUNT}
+
+/*!
+ * \name IPFIX_T field IDs.
+ */
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_IPFIX_T_EXPORT_TIME   0
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_IPFIX_T_LENGTH        1
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_IPFIX_T_OBS_DOMAIN_ID 2
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_IPFIX_T_SEQUENCE_NUM  3
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_IPFIX_T_VERSION       4
+
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_IPFIX_T_FID_COUNT          5
+
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT \
+    {"EXPORT_TIME", BCM56880_A0_CNA_6_5_29_BCMPKT_IPFIX_T_EXPORT_TIME},\
+    {"LENGTH", BCM56880_A0_CNA_6_5_29_BCMPKT_IPFIX_T_LENGTH},\
+    {"OBS_DOMAIN_ID", BCM56880_A0_CNA_6_5_29_BCMPKT_IPFIX_T_OBS_DOMAIN_ID},\
+    {"SEQUENCE_NUM", BCM56880_A0_CNA_6_5_29_BCMPKT_IPFIX_T_SEQUENCE_NUM},\
+    {"VERSION", BCM56880_A0_CNA_6_5_29_BCMPKT_IPFIX_T_VERSION},\
+    {"ipfix_t fid count", BCM56880_A0_CNA_6_5_29_BCMPKT_IPFIX_T_FID_COUNT}
+
+/*!
+ * \name IPV4_T field IDs.
+ */
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_IPV4_T_DA                0
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET 1
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_IPV4_T_HDR_CHECKSUM      2
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_IPV4_T_ID                3
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_IPV4_T_OPTION            4
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_IPV4_T_PROTOCOL          5
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_IPV4_T_SA                6
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_IPV4_T_TOS               7
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_IPV4_T_TOTAL_LENGTH      8
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_IPV4_T_TTL               9
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_IPV4_T_VERSION_HDR_LEN   10
+
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_IPV4_T_FID_COUNT          11
+
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT \
+    {"DA", BCM56880_A0_CNA_6_5_29_BCMPKT_IPV4_T_DA},\
+    {"FLAGS_FRAG_OFFSET", BCM56880_A0_CNA_6_5_29_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET},\
+    {"HDR_CHECKSUM", BCM56880_A0_CNA_6_5_29_BCMPKT_IPV4_T_HDR_CHECKSUM},\
+    {"ID", BCM56880_A0_CNA_6_5_29_BCMPKT_IPV4_T_ID},\
+    {"OPTION", BCM56880_A0_CNA_6_5_29_BCMPKT_IPV4_T_OPTION},\
+    {"PROTOCOL", BCM56880_A0_CNA_6_5_29_BCMPKT_IPV4_T_PROTOCOL},\
+    {"SA", BCM56880_A0_CNA_6_5_29_BCMPKT_IPV4_T_SA},\
+    {"TOS", BCM56880_A0_CNA_6_5_29_BCMPKT_IPV4_T_TOS},\
+    {"TOTAL_LENGTH", BCM56880_A0_CNA_6_5_29_BCMPKT_IPV4_T_TOTAL_LENGTH},\
+    {"TTL", BCM56880_A0_CNA_6_5_29_BCMPKT_IPV4_T_TTL},\
+    {"VERSION_HDR_LEN", BCM56880_A0_CNA_6_5_29_BCMPKT_IPV4_T_VERSION_HDR_LEN},\
+    {"ipv4_t fid count", BCM56880_A0_CNA_6_5_29_BCMPKT_IPV4_T_FID_COUNT}
+
+/*!
+ * \name IPV6_T field IDs.
+ */
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_IPV6_T_DA             0
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_IPV6_T_FLOW_LABEL     1
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_IPV6_T_HOP_LIMIT      2
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_IPV6_T_NEXT_HEADER    3
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_IPV6_T_PAYLOAD_LENGTH 4
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_IPV6_T_SA             5
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_IPV6_T_TRAFFIC_CLASS  6
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_IPV6_T_VERSION        7
+
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_IPV6_T_FID_COUNT          8
+
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT \
+    {"DA", BCM56880_A0_CNA_6_5_29_BCMPKT_IPV6_T_DA},\
+    {"FLOW_LABEL", BCM56880_A0_CNA_6_5_29_BCMPKT_IPV6_T_FLOW_LABEL},\
+    {"HOP_LIMIT", BCM56880_A0_CNA_6_5_29_BCMPKT_IPV6_T_HOP_LIMIT},\
+    {"NEXT_HEADER", BCM56880_A0_CNA_6_5_29_BCMPKT_IPV6_T_NEXT_HEADER},\
+    {"PAYLOAD_LENGTH", BCM56880_A0_CNA_6_5_29_BCMPKT_IPV6_T_PAYLOAD_LENGTH},\
+    {"SA", BCM56880_A0_CNA_6_5_29_BCMPKT_IPV6_T_SA},\
+    {"TRAFFIC_CLASS", BCM56880_A0_CNA_6_5_29_BCMPKT_IPV6_T_TRAFFIC_CLASS},\
+    {"VERSION", BCM56880_A0_CNA_6_5_29_BCMPKT_IPV6_T_VERSION},\
+    {"ipv6_t fid count", BCM56880_A0_CNA_6_5_29_BCMPKT_IPV6_T_FID_COUNT}
+
+/*!
+ * \name L2_T field IDs.
+ */
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_L2_T_MACDA 0
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_L2_T_MACSA 1
+
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_L2_T_FID_COUNT          2
+
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_L2_T_FIELD_NAME_MAP_INIT \
+    {"MACDA", BCM56880_A0_CNA_6_5_29_BCMPKT_L2_T_MACDA},\
+    {"MACSA", BCM56880_A0_CNA_6_5_29_BCMPKT_L2_T_MACSA},\
+    {"l2_t fid count", BCM56880_A0_CNA_6_5_29_BCMPKT_L2_T_FID_COUNT}
+
+/*!
+ * \name MIRROR_ERSPAN_SN_T field IDs.
+ */
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM 0
+
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT          1
+
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT \
+    {"SEQ_NUM", BCM56880_A0_CNA_6_5_29_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM},\
+    {"mirror_erspan_sn_t fid count", BCM56880_A0_CNA_6_5_29_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT}
+
+/*!
+ * \name MIRROR_TRANSPORT_T field IDs.
+ */
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_MIRROR_TRANSPORT_T_DATA 0
+
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT          1
+
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT \
+    {"DATA", BCM56880_A0_CNA_6_5_29_BCMPKT_MIRROR_TRANSPORT_T_DATA},\
+    {"mirror_transport_t fid count", BCM56880_A0_CNA_6_5_29_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_MIRROR_ON_DROP_0_T field IDs.
+ */
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT 0
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT    1
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH          2
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS     3
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S      4
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID       5
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID     6
+
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT          7
+
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT \
+    {"EGRESS_MOD_PORT", BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT},\
+    {"INGRESS_PORT", BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT},\
+    {"LENGTH", BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH},\
+    {"OBS_TIME_NS", BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS},\
+    {"OBS_TIME_S", BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S},\
+    {"SWITCH_ID", BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID},\
+    {"TEMPLATE_ID", BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID},\
+    {"psamp_mirror_on_drop_0_t fid count", BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_MIRROR_ON_DROP_1_T field IDs.
+ */
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_ING_DROP_REASON    0
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MIRROR_ON_DROP_OBJ 1
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MMU_DROP_CTRL      2
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_SAMPLED_LENGTH     3
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_USER_META_DATA     4
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_VAR_LEN_INDICATOR  5
+
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT          6
+
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FIELD_NAME_MAP_INIT \
+    {"ING_DROP_REASON", BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_ING_DROP_REASON},\
+    {"MIRROR_ON_DROP_OBJ", BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MIRROR_ON_DROP_OBJ},\
+    {"MMU_DROP_CTRL", BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MMU_DROP_CTRL},\
+    {"SAMPLED_LENGTH", BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_SAMPLED_LENGTH},\
+    {"USER_META_DATA", BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_USER_META_DATA},\
+    {"VAR_LEN_INDICATOR", BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_VAR_LEN_INDICATOR},\
+    {"psamp_mirror_on_drop_1_t fid count", BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT}
+
+/*!
+ * \name RARP_T field IDs.
+ */
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_RARP_T_HARDWARE_LEN  0
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_RARP_T_HARDWARE_TYPE 1
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_RARP_T_OPERATION     2
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_RARP_T_PROT_ADDR_LEN 3
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_RARP_T_PROTOCOL_TYPE 4
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_RARP_T_SENDER_HA     5
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_RARP_T_SENDER_IP     6
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_RARP_T_TARGET_HA     7
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_RARP_T_TARGET_IP     8
+
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_RARP_T_FID_COUNT          9
+
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT \
+    {"HARDWARE_LEN", BCM56880_A0_CNA_6_5_29_BCMPKT_RARP_T_HARDWARE_LEN},\
+    {"HARDWARE_TYPE", BCM56880_A0_CNA_6_5_29_BCMPKT_RARP_T_HARDWARE_TYPE},\
+    {"OPERATION", BCM56880_A0_CNA_6_5_29_BCMPKT_RARP_T_OPERATION},\
+    {"PROT_ADDR_LEN", BCM56880_A0_CNA_6_5_29_BCMPKT_RARP_T_PROT_ADDR_LEN},\
+    {"PROTOCOL_TYPE", BCM56880_A0_CNA_6_5_29_BCMPKT_RARP_T_PROTOCOL_TYPE},\
+    {"SENDER_HA", BCM56880_A0_CNA_6_5_29_BCMPKT_RARP_T_SENDER_HA},\
+    {"SENDER_IP", BCM56880_A0_CNA_6_5_29_BCMPKT_RARP_T_SENDER_IP},\
+    {"TARGET_HA", BCM56880_A0_CNA_6_5_29_BCMPKT_RARP_T_TARGET_HA},\
+    {"TARGET_IP", BCM56880_A0_CNA_6_5_29_BCMPKT_RARP_T_TARGET_IP},\
+    {"rarp_t fid count", BCM56880_A0_CNA_6_5_29_BCMPKT_RARP_T_FID_COUNT}
+
+/*!
+ * \name TCP_FIRST_4BYTES_T field IDs.
+ */
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT 0
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT 1
+
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT          2
+
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT \
+    {"DST_PORT", BCM56880_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT},\
+    {"SRC_PORT", BCM56880_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT},\
+    {"tcp_first_4bytes_t fid count", BCM56880_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT}
+
+/*!
+ * \name TCP_LAST_16BYTES_T field IDs.
+ */
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM           0
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM          1
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS 2
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM           3
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR        4
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE          5
+
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT          6
+
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT \
+    {"ACK_NUM", BCM56880_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM},\
+    {"CHECKSUM", BCM56880_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM},\
+    {"HDR_LEN_AND_FLAGS", BCM56880_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS},\
+    {"SEQ_NUM", BCM56880_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM},\
+    {"URGENT_PTR", BCM56880_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR},\
+    {"WIN_SIZE", BCM56880_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE},\
+    {"tcp_last_16bytes_t fid count", BCM56880_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT}
+
+/*!
+ * \name UDP_T field IDs.
+ */
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_UDP_T_CHECKSUM   0
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_UDP_T_DST_PORT   1
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_UDP_T_SRC_PORT   2
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_UDP_T_UDP_LENGTH 3
+
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_UDP_T_FID_COUNT          4
+
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT \
+    {"CHECKSUM", BCM56880_A0_CNA_6_5_29_BCMPKT_UDP_T_CHECKSUM},\
+    {"DST_PORT", BCM56880_A0_CNA_6_5_29_BCMPKT_UDP_T_DST_PORT},\
+    {"SRC_PORT", BCM56880_A0_CNA_6_5_29_BCMPKT_UDP_T_SRC_PORT},\
+    {"UDP_LENGTH", BCM56880_A0_CNA_6_5_29_BCMPKT_UDP_T_UDP_LENGTH},\
+    {"udp_t fid count", BCM56880_A0_CNA_6_5_29_BCMPKT_UDP_T_FID_COUNT}
+
+/*!
+ * \name UNKNOWN_L3_T field IDs.
+ */
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD 0
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD  1
+
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T_FID_COUNT          2
+
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT \
+    {"FIRST_16BYTES_OF_L3_PAYLOAD", BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD},\
+    {"NEXT_16BYTES_OF_L3_PAYLOAD", BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD},\
+    {"unknown_l3_t fid count", BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T_FID_COUNT}
+
+/*!
+ * \name UNKNOWN_L4_T field IDs.
+ */
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD 0
+
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L4_T_FID_COUNT          1
+
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT \
+    {"FIRST_4BYTES_OF_L4_PAYLOAD", BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD},\
+    {"unknown_l4_t fid count", BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L4_T_FID_COUNT}
+
+/*!
+ * \name UNKNOWN_L5_T field IDs.
+ */
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1 0
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3 1
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7 2
+
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_FID_COUNT          3
+
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT \
+    {"L5_BYTES_0_1", BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1},\
+    {"L5_BYTES_2_3", BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3},\
+    {"L5_BYTES_4_7", BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7},\
+    {"unknown_l5_t fid count", BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_FID_COUNT}
+
+/*!
+ * \name VLAN_T field IDs.
+ */
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_VLAN_T_CFI  0
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_VLAN_T_PCP  1
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_VLAN_T_TPID 2
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_VLAN_T_VID  3
+
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_VLAN_T_FID_COUNT          4
+
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT \
+    {"CFI", BCM56880_A0_CNA_6_5_29_BCMPKT_VLAN_T_CFI},\
+    {"PCP", BCM56880_A0_CNA_6_5_29_BCMPKT_VLAN_T_PCP},\
+    {"TPID", BCM56880_A0_CNA_6_5_29_BCMPKT_VLAN_T_TPID},\
+    {"VID", BCM56880_A0_CNA_6_5_29_BCMPKT_VLAN_T_VID},\
+    {"vlan_t fid count", BCM56880_A0_CNA_6_5_29_BCMPKT_VLAN_T_FID_COUNT}
+
+/*!
+ * \name VXLAN_T field IDs.
+ */
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_VXLAN_T_FLAGS_RESERVED_1 0
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_VXLAN_T_RESERVED2        1
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_VXLAN_T_VN_ID            2
+
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_VXLAN_T_FID_COUNT          3
+
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT \
+    {"FLAGS_RESERVED_1", BCM56880_A0_CNA_6_5_29_BCMPKT_VXLAN_T_FLAGS_RESERVED_1},\
+    {"RESERVED2", BCM56880_A0_CNA_6_5_29_BCMPKT_VXLAN_T_RESERVED2},\
+    {"VN_ID", BCM56880_A0_CNA_6_5_29_BCMPKT_VXLAN_T_VN_ID},\
+    {"vxlan_t fid count", BCM56880_A0_CNA_6_5_29_BCMPKT_VXLAN_T_FID_COUNT}
+
+
+#endif /* BCM56880_A0_CNA_6_5_29_BCMPKT_FLEXHDR_DATA_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_bcmpkt_rxpmd_flex_data.h
new file mode 100644
index 000000000..9881893f6
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_bcmpkt_rxpmd_flex_data.h
@@ -0,0 +1,117 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) map.yml.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_DATA_H
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_DATA_H
+
+/*!
+ * \name RX flex metadata field IDs.
+ */
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0                                 0
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_DVP_15_0                                       1
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0                              2
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0                         3
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0                         4
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_ERSPAN3_GBP_SID_15_0                           5
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_0                        6
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32                       7
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0                              8
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0                            9
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0 10
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0                    11
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_INT_PRI_3_0                                    12
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_L2_IIF_10_0                                    13
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_L2_OIF_10_0                                    14
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_L2_TUNNEL_SVP_15_0                             15
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_L3_IIF_13_0                                    16
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0                                  17
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_14_0              18
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_14_0                              19
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0                            20
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0                            21
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0                   22
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0                        23
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0                              24
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0                             25
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_TAG_ACTION_CTRL_1_0                            26
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0                27
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_VFI_15_0                                       28
+
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_FID_COUNT                       29
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_COUNT                    21
+
+/*!
+ * \name Packet Flex Reason Types.
+ */
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS                  0
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IFP                        1
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IFP_METER                  2
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IVXLT                      3
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP              4
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS         5
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD             6
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE         7
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP              8
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS         9
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR               10
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR               11
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL           12
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST            13
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED    14
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU             15
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED 16
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT               17
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED 18
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP                  19
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_VFP                        20
+
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT \
+    {"CML_FLAGS", BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS},\
+    {"IFP", BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IFP},\
+    {"IFP_METER", BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IFP_METER},\
+    {"IVXLT", BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IVXLT},\
+    {"L2_DST_LOOKUP", BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP},\
+    {"L2_DST_LOOKUP_MISS", BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS},\
+    {"L2_SRC_DISCARD", BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD},\
+    {"L2_SRC_STATIC_MOVE", BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE},\
+    {"L3_DST_LOOKUP", BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP},\
+    {"L3_DST_LOOKUP_MISS", BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS},\
+    {"L3_HDR_ERROR", BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR},\
+    {"L3_TTL_ERROR", BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR},\
+    {"LEARN_CACHE_FULL", BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL},\
+    {"MACSA_MULTICAST", BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST},\
+    {"MEMBERSHIP_CHECK_FAILED", BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED},\
+    {"NO_COPY_TO_CPU", BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU},\
+    {"PKT_INTEGRITY_CHECK_FAILED", BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED},\
+    {"PROTOCOL_PKT", BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT},\
+    {"SPANNING_TREE_CHECK_FAILED", BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED},\
+    {"TRACE_DOP", BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP},\
+    {"VFP", BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_VFP},\
+    {"flex reason count", BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_COUNT}
+
+#endif /* BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_DATA_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_bcmpkt_rxpmd_match_id_defs.h
new file mode 100644
index 000000000..3f4452eb4
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_bcmpkt_rxpmd_match_id_defs.h
@@ -0,0 +1,209 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) bcm56880_a0_cna_6_5_29_sf_match_id_info.yml
+ * for device bcm56880_a0 and variant cna_6_5_29.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_MATCH_ID_DEFS_H
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_MATCH_ID_DEFS_H
+
+#include <bcmpkt/bcmpkt_rxpmd_match_id.h>
+
+/*!
+ * \brief Get the Match ID DataBase information.
+ *
+ * \retval bcmpkt_rxpmd_match_id_db_info_t Match ID DataBase information.
+*/
+extern bcmpkt_rxpmd_match_id_db_info_t *
+    bcm56880_a0_cna_6_5_29_rxpmd_match_id_db_info_get(void);
+
+/*!
+ * \brief Get the Match ID Mapping information.
+ *
+ * \retval bcmpkt_rxpmd_match_id_map_info_t Match ID Mapping information.
+*/
+extern bcmpkt_rxpmd_match_id_map_info_t *
+    bcm56880_a0_cna_6_5_29_rxpmd_match_id_map_info_get(void);
+
+/*!
+  \name RXPMD Match IDs
+*/
+#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG  0
+#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2  1
+#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE  2
+#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG  3
+#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP  4
+#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE  5
+#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP  6
+#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4  7
+#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6  8
+#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE  9
+#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP  10
+#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES  11
+#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES  12
+#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP  13
+#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3  14
+#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4  15
+#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5  16
+#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN  17
+#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK  18
+#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE  19
+#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG  20
+#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2  21
+#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE  22
+#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG  23
+#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP  24
+#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE  25
+#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP  26
+#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4  27
+#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6  28
+#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE  29
+#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP  30
+#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES  31
+#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES  32
+#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP  33
+#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3  34
+#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4  35
+#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5  36
+#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN  37
+#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG  38
+#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2  39
+#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE  40
+#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG  41
+#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP  42
+#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE  43
+#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP  44
+#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4  45
+#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6  46
+#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE  47
+#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP  48
+#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES  49
+#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES  50
+#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP  51
+#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3  52
+#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4  53
+#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5  54
+#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG  55
+#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2  56
+#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE  57
+#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG  58
+#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP  59
+#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE  60
+#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP  61
+#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4  62
+#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6  63
+#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE  64
+#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP  65
+#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES  66
+#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES  67
+#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP  68
+#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3  69
+#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4  70
+#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5  71
+#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN  72
+#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK  73
+#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE  74
+#define BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_COUNT  75
+
+#define BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT \
+    {"EGRESS_PKT_FWD_L2_HDR_ITAG", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG}, \
+    {"EGRESS_PKT_FWD_L2_HDR_L2", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2}, \
+    {"EGRESS_PKT_FWD_L2_HDR_NONE", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE}, \
+    {"EGRESS_PKT_FWD_L2_HDR_OTAG", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ARP", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ICMP", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IPV4", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IPV6", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_NONE", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_RARP", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UDP", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN}, \
+    {"EGRESS_PKT_SYS_HDR_LOOPBACK", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK}, \
+    {"EGRESS_PKT_SYS_HDR_NONE", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_ITAG", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_L2", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_NONE", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_OTAG", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN}, \
+    {"INGRESS_PKT_INNER_L2_HDR_ITAG", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG}, \
+    {"INGRESS_PKT_INNER_L2_HDR_L2", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2}, \
+    {"INGRESS_PKT_INNER_L2_HDR_NONE", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE}, \
+    {"INGRESS_PKT_INNER_L2_HDR_OTAG", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ARP", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ICMP", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_IPV4", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_IPV6", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_NONE", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_RARP", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UDP", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_ITAG", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_L2", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_NONE", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_OTAG", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ARP", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_NONE", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_RARP", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UDP", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN}, \
+    {"INGRESS_PKT_SYS_HDR_LOOPBACK", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK}, \
+    {"INGRESS_PKT_SYS_HDR_NONE", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE}, \
+    {"rxpmd_match_id_count", BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_COUNT}
+
+#endif /*! BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_MATCH_ID_DEFS_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_bcmpkt_flexhdr.h
new file mode 100644
index 000000000..bc96c1b3e
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_bcmpkt_flexhdr.h
@@ -0,0 +1,174 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) header.yml.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM56880_A0_DNA_4_11_4_0_BCMPKT_FLEXHDR_H
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_FLEXHDR_H
+
+#include <bcmpkt/bcmpkt_flexhdr_internal.h>
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ARP_T                        0
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_AUTHEN_T                     1
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T                        2
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_CNTAG_T                      3
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_0_T           4
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_1_T           5
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_DEST_OPTION_T                6
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T          7
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_SUBHDR_5_T           8
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ESP_T                        9
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ETAG_T                       10
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ETHERTYPE_T                  11
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_FRAG_T                       12
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T           13
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GPE_T                        14
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_CHKSUM_T                 15
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_KEY_T                    16
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_ROUT_T                   17
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_SEQ_T                    18
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_T                        19
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T                   20
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_EXTENSION_0_T            21
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HOP_BY_HOP_T                 22
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ICMP_T                       23
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_0_A_T            24
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_0_B_T            25
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_1_T              26
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_2_T              27
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_3_T              28
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_HEADER_T                 29
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_MD_BASE_T                30
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_METADATA_T               31
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IGMP_T                       32
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPFIX_T                      33
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV4_T                       34
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV6_T                       35
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_L2_T                         36
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_MIRROR_ERSPAN_SN_T           37
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_MIRROR_TRANSPORT_T           38
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_ACH_T                   39
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_BV_T                    40
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_CW_T                    41
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_T                       42
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T                     43
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PROG_EXT_HDR_T               44
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_0_T                    45
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_1_T                    46
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T     47
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T     48
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RARP_T                       49
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ROUTING_T                    50
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RSPAN_T                      51
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_0_T               52
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_1_T               53
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_2_T               54
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_SNAP_LLC_T                   55
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_TCP_FIRST_4BYTES_T           56
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_TCP_LAST_16BYTES_T           57
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_UDP_T                        58
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L3_T                 59
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L4_T                 60
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L5_T                 61
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_VLAN_T                       62
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_VNTAG_T                      63
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_VXLAN_T                      64
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_WESP_T                       65
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_T                 66
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_FLEXHDR_COUNT    67
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_FLEXHDR_NAME_MAP_INIT \
+    {"arp_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ARP_T},\
+    {"authen_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_AUTHEN_T},\
+    {"bfd_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T},\
+    {"cntag_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_CNTAG_T},\
+    {"cpu_composites_0_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_0_T},\
+    {"cpu_composites_1_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_1_T},\
+    {"dest_option_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_DEST_OPTION_T},\
+    {"erspan3_fixed_hdr_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T},\
+    {"erspan3_subhdr_5_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_SUBHDR_5_T},\
+    {"esp_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ESP_T},\
+    {"etag_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ETAG_T},\
+    {"ethertype_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ETHERTYPE_T},\
+    {"frag_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_FRAG_T},\
+    {"generic_loopback_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T},\
+    {"gpe_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GPE_T},\
+    {"gre_chksum_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_CHKSUM_T},\
+    {"gre_key_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_KEY_T},\
+    {"gre_rout_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_ROUT_T},\
+    {"gre_seq_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_SEQ_T},\
+    {"gre_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_T},\
+    {"hg3_base_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T},\
+    {"hg3_extension_0_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_EXTENSION_0_T},\
+    {"hop_by_hop_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_HOP_BY_HOP_T},\
+    {"icmp_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ICMP_T},\
+    {"ifa_flex_md_0_a_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_0_A_T},\
+    {"ifa_flex_md_0_b_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_0_B_T},\
+    {"ifa_flex_md_1_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_1_T},\
+    {"ifa_flex_md_2_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_2_T},\
+    {"ifa_flex_md_3_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_3_T},\
+    {"ifa_header_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_HEADER_T},\
+    {"ifa_md_base_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_MD_BASE_T},\
+    {"ifa_metadata_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_METADATA_T},\
+    {"igmp_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IGMP_T},\
+    {"ipfix_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPFIX_T},\
+    {"ipv4_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV4_T},\
+    {"ipv6_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV6_T},\
+    {"l2_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_L2_T},\
+    {"mirror_erspan_sn_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_MIRROR_ERSPAN_SN_T},\
+    {"mirror_transport_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_MIRROR_TRANSPORT_T},\
+    {"mpls_ach_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_ACH_T},\
+    {"mpls_bv_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_BV_T},\
+    {"mpls_cw_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_CW_T},\
+    {"mpls_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_T},\
+    {"p_1588_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T},\
+    {"prog_ext_hdr_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PROG_EXT_HDR_T},\
+    {"psamp_0_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_0_T},\
+    {"psamp_1_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_1_T},\
+    {"psamp_mirror_on_drop_0_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T},\
+    {"psamp_mirror_on_drop_1_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T},\
+    {"rarp_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RARP_T},\
+    {"routing_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ROUTING_T},\
+    {"rspan_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RSPAN_T},\
+    {"sflow_shim_0_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_0_T},\
+    {"sflow_shim_1_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_1_T},\
+    {"sflow_shim_2_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_2_T},\
+    {"snap_llc_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_SNAP_LLC_T},\
+    {"tcp_first_4bytes_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_TCP_FIRST_4BYTES_T},\
+    {"tcp_last_16bytes_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_TCP_LAST_16BYTES_T},\
+    {"udp_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_UDP_T},\
+    {"unknown_l3_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L3_T},\
+    {"unknown_l4_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L4_T},\
+    {"unknown_l5_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L5_T},\
+    {"vlan_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_VLAN_T},\
+    {"vntag_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_VNTAG_T},\
+    {"vxlan_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_VXLAN_T},\
+    {"wesp_t", BCM56880_A0_DNA_4_11_4_0_BCMPKT_WESP_T},\
+    {"RXPMD_FLEX_T", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_T},\
+    {"flexhdr count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_FLEXHDR_COUNT}
+
+#endif /* BCM56880_A0_DNA_4_11_4_0_BCMPKT_FLEXHDR_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_bcmpkt_flexhdr_data.h
new file mode 100644
index 000000000..aedf312bd
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_bcmpkt_flexhdr_data.h
@@ -0,0 +1,1276 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) header.yml.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM56880_A0_DNA_4_11_4_0_BCMPKT_FLEXHDR_DATA_H
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_FLEXHDR_DATA_H
+
+/*!
+ * \name ARP_T field IDs.
+ */
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ARP_T_HARDWARE_LEN  0
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ARP_T_HARDWARE_TYPE 1
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ARP_T_OPERATION     2
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ARP_T_PROT_ADDR_LEN 3
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ARP_T_PROTOCOL_TYPE 4
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ARP_T_SENDER_HA     5
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ARP_T_SENDER_IP     6
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ARP_T_TARGET_HA     7
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ARP_T_TARGET_IP     8
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ARP_T_FID_COUNT          9
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT \
+    {"HARDWARE_LEN", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ARP_T_HARDWARE_LEN},\
+    {"HARDWARE_TYPE", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ARP_T_HARDWARE_TYPE},\
+    {"OPERATION", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ARP_T_OPERATION},\
+    {"PROT_ADDR_LEN", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ARP_T_PROT_ADDR_LEN},\
+    {"PROTOCOL_TYPE", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ARP_T_PROTOCOL_TYPE},\
+    {"SENDER_HA", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ARP_T_SENDER_HA},\
+    {"SENDER_IP", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ARP_T_SENDER_IP},\
+    {"TARGET_HA", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ARP_T_TARGET_HA},\
+    {"TARGET_IP", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ARP_T_TARGET_IP},\
+    {"arp_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ARP_T_FID_COUNT}
+
+/*!
+ * \name AUTHEN_T field IDs.
+ */
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_AUTHEN_T_DATA        0
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_AUTHEN_T_NEXT_HEADER 1
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_AUTHEN_T_PAYLOAD_LEN 2
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_AUTHEN_T_RESERVED    3
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_AUTHEN_T_SEQ_NUM     4
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_AUTHEN_T_SPI         5
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_AUTHEN_T_FID_COUNT          6
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT \
+    {"DATA", BCM56880_A0_DNA_4_11_4_0_BCMPKT_AUTHEN_T_DATA},\
+    {"NEXT_HEADER", BCM56880_A0_DNA_4_11_4_0_BCMPKT_AUTHEN_T_NEXT_HEADER},\
+    {"PAYLOAD_LEN", BCM56880_A0_DNA_4_11_4_0_BCMPKT_AUTHEN_T_PAYLOAD_LEN},\
+    {"RESERVED", BCM56880_A0_DNA_4_11_4_0_BCMPKT_AUTHEN_T_RESERVED},\
+    {"SEQ_NUM", BCM56880_A0_DNA_4_11_4_0_BCMPKT_AUTHEN_T_SEQ_NUM},\
+    {"SPI", BCM56880_A0_DNA_4_11_4_0_BCMPKT_AUTHEN_T_SPI},\
+    {"authen_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_AUTHEN_T_FID_COUNT}
+
+/*!
+ * \name BFD_T field IDs.
+ */
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_AP            0
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_BFD_LENGTH    1
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_CPI           2
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_DEM           3
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_DESMINTXINTV  4
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_DETECTMULT    5
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_DIAG          6
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_FIN           7
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_MINECHORXINTV 8
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_MPT           9
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_MYDISCRIM     10
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_POLL          11
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_REQMINRXINTV  12
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_STA           13
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_URDISCRIM     14
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_VERSION       15
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_FID_COUNT          16
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT \
+    {"AP", BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_AP},\
+    {"BFD_LENGTH", BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_BFD_LENGTH},\
+    {"CPI", BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_CPI},\
+    {"DEM", BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_DEM},\
+    {"DESMINTXINTV", BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_DESMINTXINTV},\
+    {"DETECTMULT", BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_DETECTMULT},\
+    {"DIAG", BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_DIAG},\
+    {"FIN", BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_FIN},\
+    {"MINECHORXINTV", BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_MINECHORXINTV},\
+    {"MPT", BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_MPT},\
+    {"MYDISCRIM", BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_MYDISCRIM},\
+    {"POLL", BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_POLL},\
+    {"REQMINRXINTV", BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_REQMINRXINTV},\
+    {"STA", BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_STA},\
+    {"URDISCRIM", BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_URDISCRIM},\
+    {"VERSION", BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_VERSION},\
+    {"bfd_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_FID_COUNT}
+
+/*!
+ * \name CNTAG_T field IDs.
+ */
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_CNTAG_T_RPID 0
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_CNTAG_T_TPID 1
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_CNTAG_T_FID_COUNT          2
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT \
+    {"RPID", BCM56880_A0_DNA_4_11_4_0_BCMPKT_CNTAG_T_RPID},\
+    {"TPID", BCM56880_A0_DNA_4_11_4_0_BCMPKT_CNTAG_T_TPID},\
+    {"cntag_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_CNTAG_T_FID_COUNT}
+
+/*!
+ * \name CPU_COMPOSITES_0_T field IDs.
+ */
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0 0
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1 1
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2 2
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3 3
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4 4
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5 5
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6 6
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT          7
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT \
+    {"DMA_CONT0", BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0},\
+    {"DMA_CONT1", BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1},\
+    {"DMA_CONT2", BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2},\
+    {"DMA_CONT3", BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3},\
+    {"DMA_CONT4", BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4},\
+    {"DMA_CONT5", BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5},\
+    {"DMA_CONT6", BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6},\
+    {"cpu_composites_0_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT}
+
+/*!
+ * \name CPU_COMPOSITES_1_T field IDs.
+ */
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10 0
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11 1
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12 2
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13 3
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14 4
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15 5
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16 6
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17 7
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7  8
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8  9
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9  10
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT          11
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT \
+    {"DMA_CONT10", BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10},\
+    {"DMA_CONT11", BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11},\
+    {"DMA_CONT12", BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12},\
+    {"DMA_CONT13", BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13},\
+    {"DMA_CONT14", BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14},\
+    {"DMA_CONT15", BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15},\
+    {"DMA_CONT16", BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16},\
+    {"DMA_CONT17", BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17},\
+    {"DMA_CONT7", BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7},\
+    {"DMA_CONT8", BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8},\
+    {"DMA_CONT9", BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9},\
+    {"cpu_composites_1_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT}
+
+/*!
+ * \name DEST_OPTION_T field IDs.
+ */
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN 0
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_DEST_OPTION_T_NEXT_HEADER 1
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_DEST_OPTION_T_OPTION      2
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_DEST_OPTION_T_FID_COUNT          3
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT \
+    {"HDR_EXT_LEN", BCM56880_A0_DNA_4_11_4_0_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN},\
+    {"NEXT_HEADER", BCM56880_A0_DNA_4_11_4_0_BCMPKT_DEST_OPTION_T_NEXT_HEADER},\
+    {"OPTION", BCM56880_A0_DNA_4_11_4_0_BCMPKT_DEST_OPTION_T_OPTION},\
+    {"dest_option_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_DEST_OPTION_T_FID_COUNT}
+
+/*!
+ * \name ERSPAN3_FIXED_HDR_T field IDs.
+ */
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO               0
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS               1
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID           2
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O 3
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID        4
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T                 5
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP         6
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER               7
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN              8
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT          9
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT \
+    {"BSO", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO},\
+    {"COS", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS},\
+    {"GBP_SID", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID},\
+    {"P_FT_HWID_D_GRA_O", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O},\
+    {"SESSION_ID", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID},\
+    {"T", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T},\
+    {"TIMESTAMP", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP},\
+    {"VER", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER},\
+    {"VLAN", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN},\
+    {"erspan3_fixed_hdr_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT}
+
+/*!
+ * \name ERSPAN3_SUBHDR_5_T field IDs.
+ */
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID 0
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID     1
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID   2
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP   3
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT          4
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT \
+    {"PLATFORM_ID", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID},\
+    {"PORT_ID", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID},\
+    {"SWITCH_ID", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID},\
+    {"TIMESTAMP", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP},\
+    {"erspan3_subhdr_5_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT}
+
+/*!
+ * \name ESP_T field IDs.
+ */
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ESP_T_NEXT_HEADER 0
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ESP_T_PAD         1
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ESP_T_PAD_LEN     2
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ESP_T_SEQ_NUM     3
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ESP_T_SPI         4
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ESP_T_FID_COUNT          5
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT \
+    {"NEXT_HEADER", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ESP_T_NEXT_HEADER},\
+    {"PAD", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ESP_T_PAD},\
+    {"PAD_LEN", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ESP_T_PAD_LEN},\
+    {"SEQ_NUM", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ESP_T_SEQ_NUM},\
+    {"SPI", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ESP_T_SPI},\
+    {"esp_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ESP_T_FID_COUNT}
+
+/*!
+ * \name ETAG_T field IDs.
+ */
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ETAG_T_TAG  0
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ETAG_T_TPID 1
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ETAG_T_FID_COUNT          2
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ETAG_T_FIELD_NAME_MAP_INIT \
+    {"TAG", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ETAG_T_TAG},\
+    {"TPID", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ETAG_T_TPID},\
+    {"etag_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ETAG_T_FID_COUNT}
+
+/*!
+ * \name ETHERTYPE_T field IDs.
+ */
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ETHERTYPE_T_TYPE 0
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ETHERTYPE_T_FID_COUNT          1
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT \
+    {"TYPE", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ETHERTYPE_T_TYPE},\
+    {"ethertype_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ETHERTYPE_T_FID_COUNT}
+
+/*!
+ * \name FRAG_T field IDs.
+ */
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_FRAG_T_FRAG_INFO   0
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_FRAG_T_ID          1
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_FRAG_T_NEXT_HEADER 2
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_FRAG_T_RESERVED    3
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_FRAG_T_FID_COUNT          4
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT \
+    {"FRAG_INFO", BCM56880_A0_DNA_4_11_4_0_BCMPKT_FRAG_T_FRAG_INFO},\
+    {"ID", BCM56880_A0_DNA_4_11_4_0_BCMPKT_FRAG_T_ID},\
+    {"NEXT_HEADER", BCM56880_A0_DNA_4_11_4_0_BCMPKT_FRAG_T_NEXT_HEADER},\
+    {"RESERVED", BCM56880_A0_DNA_4_11_4_0_BCMPKT_FRAG_T_RESERVED},\
+    {"frag_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_FRAG_T_FID_COUNT}
+
+/*!
+ * \name GENERIC_LOOPBACK_T field IDs.
+ */
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ    0
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE   1
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ        2
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS              3
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE        4
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY     5
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL     6
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ      7
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0  8
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1  9
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ            10
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1         11
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2         12
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT 13
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE         14
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT          15
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT \
+    {"DESTINATION_OBJ", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ},\
+    {"DESTINATION_TYPE", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE},\
+    {"ENTROPY_OBJ", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ},\
+    {"FLAGS", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS},\
+    {"HEADER_TYPE", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE},\
+    {"INPUT_PRIORITY", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY},\
+    {"INTERFACE_CTRL", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL},\
+    {"INTERFACE_OBJ", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ},\
+    {"PROCESSING_CTRL_0", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0},\
+    {"PROCESSING_CTRL_1", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1},\
+    {"QOS_OBJ", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ},\
+    {"RESERVED_1", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1},\
+    {"RESERVED_2", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2},\
+    {"SOURCE_SYSTEM_PORT", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT},\
+    {"START_BYTE", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE},\
+    {"generic_loopback_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT}
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NO_OP       0
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2_OIF      1
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED    2
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__VP          3
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP        4
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NHOP        5
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2MC_GROUP  6
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L3MC_GROUP  7
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED_1  8
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP_MEMBER 9
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__DEVICE_PORT 10
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__TUNNEL  0
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__GENERIC 1
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__NOOP   0
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__VFI    1
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__L3_IIF 2
+
+/*!
+ * \name GPE_T field IDs.
+ */
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GPE_T_FLAGS         0
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GPE_T_NEXT_PROTOCOL 1
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GPE_T_RESERVED0     2
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GPE_T_RESERVED1     3
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GPE_T_VNI           4
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GPE_T_FID_COUNT          5
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT \
+    {"FLAGS", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GPE_T_FLAGS},\
+    {"NEXT_PROTOCOL", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GPE_T_NEXT_PROTOCOL},\
+    {"RESERVED0", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GPE_T_RESERVED0},\
+    {"RESERVED1", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GPE_T_RESERVED1},\
+    {"VNI", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GPE_T_VNI},\
+    {"gpe_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GPE_T_FID_COUNT}
+
+/*!
+ * \name GRE_CHKSUM_T field IDs.
+ */
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_CHKSUM_T_CHECKSUM 0
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_CHKSUM_T_OFFSET   1
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT          2
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT \
+    {"CHECKSUM", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_CHKSUM_T_CHECKSUM},\
+    {"OFFSET", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_CHKSUM_T_OFFSET},\
+    {"gre_chksum_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT}
+
+/*!
+ * \name GRE_KEY_T field IDs.
+ */
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_KEY_T_KEY 0
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_KEY_T_FID_COUNT          1
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT \
+    {"KEY", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_KEY_T_KEY},\
+    {"gre_key_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_KEY_T_FID_COUNT}
+
+/*!
+ * \name GRE_ROUT_T field IDs.
+ */
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_ROUT_T_ROUTING 0
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_ROUT_T_FID_COUNT          1
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT \
+    {"ROUTING", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_ROUT_T_ROUTING},\
+    {"gre_rout_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_ROUT_T_FID_COUNT}
+
+/*!
+ * \name GRE_SEQ_T field IDs.
+ */
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_SEQ_T_SEQUENCE 0
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_SEQ_T_FID_COUNT          1
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT \
+    {"SEQUENCE", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_SEQ_T_SEQUENCE},\
+    {"gre_seq_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_SEQ_T_FID_COUNT}
+
+/*!
+ * \name GRE_T field IDs.
+ */
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_T_C_R_K_S  0
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_T_PROTOCOL 1
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_T_RESERVED 2
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_T_VERSION  3
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_T_FID_COUNT          4
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT \
+    {"C_R_K_S", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_T_C_R_K_S},\
+    {"PROTOCOL", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_T_PROTOCOL},\
+    {"RESERVED", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_T_RESERVED},\
+    {"VERSION", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_T_VERSION},\
+    {"gre_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_T_FID_COUNT}
+
+/*!
+ * \name HG3_BASE_T field IDs.
+ */
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_CN                      0
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_CNG                     1
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_ENTROPY                 2
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_EXT_HDR_PRESENT         3
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_HG3_RESERVED            4
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_L3_ROUTED               5
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_MIRROR_COPY             6
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_RESERVED_ETYPE          7
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION      8
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION_TYPE 9
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_SYSTEM_SOURCE           10
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_TC                      11
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_VERSION                 12
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_FID_COUNT          13
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_FIELD_NAME_MAP_INIT \
+    {"CN", BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_CN},\
+    {"CNG", BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_CNG},\
+    {"ENTROPY", BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_ENTROPY},\
+    {"EXT_HDR_PRESENT", BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_EXT_HDR_PRESENT},\
+    {"HG3_RESERVED", BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_HG3_RESERVED},\
+    {"L3_ROUTED", BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_L3_ROUTED},\
+    {"MIRROR_COPY", BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_MIRROR_COPY},\
+    {"RESERVED_ETYPE", BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_RESERVED_ETYPE},\
+    {"SYSTEM_DESTINATION", BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION},\
+    {"SYSTEM_DESTINATION_TYPE", BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION_TYPE},\
+    {"SYSTEM_SOURCE", BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_SYSTEM_SOURCE},\
+    {"TC", BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_TC},\
+    {"VERSION", BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_VERSION},\
+    {"hg3_base_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_FID_COUNT}
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__NO_OP       0
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L2_OIF      1
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__RESERVED    2
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__VP          3
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__ECMP        4
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__NHOP        5
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L2MC_GROUP  6
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L3MC_GROUP  7
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__RESERVED_1  8
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__ECMP_MEMBER 9
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__DEVICE_PORT 10
+
+/*!
+ * \name HG3_EXTENSION_0_T field IDs.
+ */
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID          0
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_EXTENSION_0_T_DVP_OR_L3_IIF     1
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_EXTENSION_0_T_FLAGS             2
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_EXTENSION_0_T_FORWARDING_DOMAIN 3
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_EXTENSION_0_T_SVP               4
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT          5
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_EXTENSION_0_T_FIELD_NAME_MAP_INIT \
+    {"CLASS_ID", BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID},\
+    {"DVP_OR_L3_IIF", BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_EXTENSION_0_T_DVP_OR_L3_IIF},\
+    {"FLAGS", BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_EXTENSION_0_T_FLAGS},\
+    {"FORWARDING_DOMAIN", BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_EXTENSION_0_T_FORWARDING_DOMAIN},\
+    {"SVP", BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_EXTENSION_0_T_SVP},\
+    {"hg3_extension_0_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT}
+
+/*!
+ * \name HOP_BY_HOP_T field IDs.
+ */
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN 0
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER 1
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HOP_BY_HOP_T_OPTION      2
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT          3
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT \
+    {"HDR_EXT_LEN", BCM56880_A0_DNA_4_11_4_0_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN},\
+    {"NEXT_HEADER", BCM56880_A0_DNA_4_11_4_0_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER},\
+    {"OPTION", BCM56880_A0_DNA_4_11_4_0_BCMPKT_HOP_BY_HOP_T_OPTION},\
+    {"hop_by_hop_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT}
+
+/*!
+ * \name ICMP_T field IDs.
+ */
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ICMP_T_CHECKSUM  0
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ICMP_T_CODE      1
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ICMP_T_ICMP_TYPE 2
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ICMP_T_FID_COUNT          3
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT \
+    {"CHECKSUM", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ICMP_T_CHECKSUM},\
+    {"CODE", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ICMP_T_CODE},\
+    {"ICMP_TYPE", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ICMP_T_ICMP_TYPE},\
+    {"icmp_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ICMP_T_FID_COUNT}
+
+/*!
+ * \name IFA_FLEX_MD_0_A_T field IDs.
+ */
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_0_A_T_FWD_HDR_TTL   0
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_0_A_T_LNS_DEVICE_ID 1
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT          2
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_0_A_T_FIELD_NAME_MAP_INIT \
+    {"FWD_HDR_TTL", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_0_A_T_FWD_HDR_TTL},\
+    {"LNS_DEVICE_ID", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_0_A_T_LNS_DEVICE_ID},\
+    {"ifa_flex_md_0_a_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT}
+
+/*!
+ * \name IFA_FLEX_MD_0_B_T field IDs.
+ */
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_0_B_T_CN               0
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_0_B_T_PORT_SPEED       1
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_0_B_T_QUEUE_ID         2
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_0_B_T_RX_TIMESTAMP_SEC 3
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT          4
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_0_B_T_FIELD_NAME_MAP_INIT \
+    {"CN", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_0_B_T_CN},\
+    {"PORT_SPEED", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_0_B_T_PORT_SPEED},\
+    {"QUEUE_ID", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_0_B_T_QUEUE_ID},\
+    {"RX_TIMESTAMP_SEC", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_0_B_T_RX_TIMESTAMP_SEC},\
+    {"ifa_flex_md_0_b_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT}
+
+/*!
+ * \name IFA_FLEX_MD_1_T field IDs.
+ */
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_1_T_EGRESS_PORT_ID       0
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_1_T_INGRESS_PORT_ID      1
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_1_T_RX_TIMESTAMP_NANOSEC 2
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT          3
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_1_T_FIELD_NAME_MAP_INIT \
+    {"EGRESS_PORT_ID", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_1_T_EGRESS_PORT_ID},\
+    {"INGRESS_PORT_ID", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_1_T_INGRESS_PORT_ID},\
+    {"RX_TIMESTAMP_NANOSEC", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_1_T_RX_TIMESTAMP_NANOSEC},\
+    {"ifa_flex_md_1_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT}
+
+/*!
+ * \name IFA_FLEX_MD_2_T field IDs.
+ */
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_2_T_RESIDENCE_TIME_NANOSEC 0
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_2_T_TX_QUEUE_BYTE_COUNT    1
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT          2
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_2_T_FIELD_NAME_MAP_INIT \
+    {"RESIDENCE_TIME_NANOSEC", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_2_T_RESIDENCE_TIME_NANOSEC},\
+    {"TX_QUEUE_BYTE_COUNT", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_2_T_TX_QUEUE_BYTE_COUNT},\
+    {"ifa_flex_md_2_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT}
+
+/*!
+ * \name IFA_FLEX_MD_3_T field IDs.
+ */
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_0 0
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_1 1
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT          2
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_3_T_FIELD_NAME_MAP_INIT \
+    {"MMU_STAT_0", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_0},\
+    {"MMU_STAT_1", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_1},\
+    {"ifa_flex_md_3_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT}
+
+/*!
+ * \name IFA_HEADER_T field IDs.
+ */
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_HEADER_T_FLAGS      0
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_HEADER_T_GNS        1
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_HEADER_T_MAX_LENGTH 2
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_HEADER_T_NEXT_HDR   3
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_HEADER_T_VER        4
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_HEADER_T_FID_COUNT          5
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT \
+    {"FLAGS", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_HEADER_T_FLAGS},\
+    {"GNS", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_HEADER_T_GNS},\
+    {"MAX_LENGTH", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_HEADER_T_MAX_LENGTH},\
+    {"NEXT_HDR", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_HEADER_T_NEXT_HDR},\
+    {"VER", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_HEADER_T_VER},\
+    {"ifa_header_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_HEADER_T_FID_COUNT}
+
+/*!
+ * \name IFA_MD_BASE_T field IDs.
+ */
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_MD_BASE_T_ACTION_VECTOR            0
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_MD_BASE_T_HOP_LIMIT_CURRENT_LENGTH 1
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_MD_BASE_T_REQUEST_VECTOR           2
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT          3
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_MD_BASE_T_FIELD_NAME_MAP_INIT \
+    {"ACTION_VECTOR", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_MD_BASE_T_ACTION_VECTOR},\
+    {"HOP_LIMIT_CURRENT_LENGTH", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_MD_BASE_T_HOP_LIMIT_CURRENT_LENGTH},\
+    {"REQUEST_VECTOR", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_MD_BASE_T_REQUEST_VECTOR},\
+    {"ifa_md_base_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT}
+
+/*!
+ * \name IFA_METADATA_T field IDs.
+ */
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_METADATA_T_ACTION_VECTOR            0
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_METADATA_T_HOP_LIMIT_CURRENT_LENGTH 1
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_METADATA_T_METADATA                 2
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_METADATA_T_REQUEST_VECTOR           3
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_METADATA_T_FID_COUNT          4
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_METADATA_T_FIELD_NAME_MAP_INIT \
+    {"ACTION_VECTOR", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_METADATA_T_ACTION_VECTOR},\
+    {"HOP_LIMIT_CURRENT_LENGTH", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_METADATA_T_HOP_LIMIT_CURRENT_LENGTH},\
+    {"METADATA", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_METADATA_T_METADATA},\
+    {"REQUEST_VECTOR", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_METADATA_T_REQUEST_VECTOR},\
+    {"ifa_metadata_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_METADATA_T_FID_COUNT}
+
+/*!
+ * \name IGMP_T field IDs.
+ */
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IGMP_T_CHECKSUM      0
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IGMP_T_GROUP_ADDRESS 1
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IGMP_T_IGMP_TYPE     2
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IGMP_T_MAX_RESP_TIME 3
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IGMP_T_FID_COUNT          4
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT \
+    {"CHECKSUM", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IGMP_T_CHECKSUM},\
+    {"GROUP_ADDRESS", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IGMP_T_GROUP_ADDRESS},\
+    {"IGMP_TYPE", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IGMP_T_IGMP_TYPE},\
+    {"MAX_RESP_TIME", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IGMP_T_MAX_RESP_TIME},\
+    {"igmp_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IGMP_T_FID_COUNT}
+
+/*!
+ * \name IPFIX_T field IDs.
+ */
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPFIX_T_EXPORT_TIME   0
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPFIX_T_LENGTH        1
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID 2
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPFIX_T_SEQUENCE_NUM  3
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPFIX_T_VERSION       4
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPFIX_T_FID_COUNT          5
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT \
+    {"EXPORT_TIME", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPFIX_T_EXPORT_TIME},\
+    {"LENGTH", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPFIX_T_LENGTH},\
+    {"OBS_DOMAIN_ID", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID},\
+    {"SEQUENCE_NUM", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPFIX_T_SEQUENCE_NUM},\
+    {"VERSION", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPFIX_T_VERSION},\
+    {"ipfix_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPFIX_T_FID_COUNT}
+
+/*!
+ * \name IPV4_T field IDs.
+ */
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV4_T_DA                0
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET 1
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV4_T_HDR_CHECKSUM      2
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV4_T_ID                3
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV4_T_OPTION            4
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV4_T_PROTOCOL          5
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV4_T_SA                6
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV4_T_TOS               7
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV4_T_TOTAL_LENGTH      8
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV4_T_TTL               9
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV4_T_VERSION_HDR_LEN   10
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV4_T_FID_COUNT          11
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT \
+    {"DA", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV4_T_DA},\
+    {"FLAGS_FRAG_OFFSET", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET},\
+    {"HDR_CHECKSUM", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV4_T_HDR_CHECKSUM},\
+    {"ID", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV4_T_ID},\
+    {"OPTION", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV4_T_OPTION},\
+    {"PROTOCOL", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV4_T_PROTOCOL},\
+    {"SA", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV4_T_SA},\
+    {"TOS", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV4_T_TOS},\
+    {"TOTAL_LENGTH", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV4_T_TOTAL_LENGTH},\
+    {"TTL", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV4_T_TTL},\
+    {"VERSION_HDR_LEN", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV4_T_VERSION_HDR_LEN},\
+    {"ipv4_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV4_T_FID_COUNT}
+
+/*!
+ * \name IPV6_T field IDs.
+ */
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV6_T_DA             0
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV6_T_FLOW_LABEL     1
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV6_T_HOP_LIMIT      2
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV6_T_NEXT_HEADER    3
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH 4
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV6_T_SA             5
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV6_T_TRAFFIC_CLASS  6
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV6_T_VERSION        7
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV6_T_FID_COUNT          8
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT \
+    {"DA", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV6_T_DA},\
+    {"FLOW_LABEL", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV6_T_FLOW_LABEL},\
+    {"HOP_LIMIT", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV6_T_HOP_LIMIT},\
+    {"NEXT_HEADER", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV6_T_NEXT_HEADER},\
+    {"PAYLOAD_LENGTH", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH},\
+    {"SA", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV6_T_SA},\
+    {"TRAFFIC_CLASS", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV6_T_TRAFFIC_CLASS},\
+    {"VERSION", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV6_T_VERSION},\
+    {"ipv6_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV6_T_FID_COUNT}
+
+/*!
+ * \name L2_T field IDs.
+ */
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_L2_T_MACDA 0
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_L2_T_MACSA 1
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_L2_T_FID_COUNT          2
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT \
+    {"MACDA", BCM56880_A0_DNA_4_11_4_0_BCMPKT_L2_T_MACDA},\
+    {"MACSA", BCM56880_A0_DNA_4_11_4_0_BCMPKT_L2_T_MACSA},\
+    {"l2_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_L2_T_FID_COUNT}
+
+/*!
+ * \name MIRROR_ERSPAN_SN_T field IDs.
+ */
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM 0
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT          1
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT \
+    {"SEQ_NUM", BCM56880_A0_DNA_4_11_4_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM},\
+    {"mirror_erspan_sn_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT}
+
+/*!
+ * \name MIRROR_TRANSPORT_T field IDs.
+ */
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_MIRROR_TRANSPORT_T_DATA 0
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT          1
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT \
+    {"DATA", BCM56880_A0_DNA_4_11_4_0_BCMPKT_MIRROR_TRANSPORT_T_DATA},\
+    {"mirror_transport_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT}
+
+/*!
+ * \name MPLS_ACH_T field IDs.
+ */
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE 0
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_ACH_T_CW_TYPE      1
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_ACH_T_RESERVED     2
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_ACH_T_VERSION      3
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_ACH_T_FID_COUNT          4
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT \
+    {"CHANNEL_TYPE", BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE},\
+    {"CW_TYPE", BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_ACH_T_CW_TYPE},\
+    {"RESERVED", BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_ACH_T_RESERVED},\
+    {"VERSION", BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_ACH_T_VERSION},\
+    {"mpls_ach_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_ACH_T_FID_COUNT}
+
+/*!
+ * \name MPLS_BV_T field IDs.
+ */
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_BV_T_VALUE 0
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_BV_T_FID_COUNT          1
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT \
+    {"VALUE", BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_BV_T_VALUE},\
+    {"mpls_bv_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_BV_T_FID_COUNT}
+
+/*!
+ * \name MPLS_CW_T field IDs.
+ */
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_CW_T_CW_TYPE    0
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_CW_T_RESERVED   1
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_CW_T_SEQ_NUMBER 2
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_CW_T_FID_COUNT          3
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT \
+    {"CW_TYPE", BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_CW_T_CW_TYPE},\
+    {"RESERVED", BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_CW_T_RESERVED},\
+    {"SEQ_NUMBER", BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_CW_T_SEQ_NUMBER},\
+    {"mpls_cw_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_CW_T_FID_COUNT}
+
+/*!
+ * \name MPLS_T field IDs.
+ */
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_T_BOS   0
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_T_EXP   1
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_T_LABEL 2
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_T_TTL   3
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_T_FID_COUNT          4
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT \
+    {"BOS", BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_T_BOS},\
+    {"EXP", BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_T_EXP},\
+    {"LABEL", BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_T_LABEL},\
+    {"TTL", BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_T_TTL},\
+    {"mpls_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_T_FID_COUNT}
+
+/*!
+ * \name P_1588_T field IDs.
+ */
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T_CNTRL          0
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T_CORRECTION     1
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T_DOMAIN_NB      2
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T_FLAGS          3
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T_LOGMSGINTERVAL 4
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T_MSG_LENGTH     5
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T_MSG_TYPE       6
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T_RESERVED1      7
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T_RESERVED2      8
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T_RESERVED3      9
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T_SEQ_ID         10
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T_SRCPORTID      11
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T_TRANSPORTSPEC  12
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T_VERSION        13
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T_FID_COUNT          14
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT \
+    {"CNTRL", BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T_CNTRL},\
+    {"CORRECTION", BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T_CORRECTION},\
+    {"DOMAIN_NB", BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T_DOMAIN_NB},\
+    {"FLAGS", BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T_FLAGS},\
+    {"LOGMSGINTERVAL", BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T_LOGMSGINTERVAL},\
+    {"MSG_LENGTH", BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T_MSG_LENGTH},\
+    {"MSG_TYPE", BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T_MSG_TYPE},\
+    {"RESERVED1", BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T_RESERVED1},\
+    {"RESERVED2", BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T_RESERVED2},\
+    {"RESERVED3", BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T_RESERVED3},\
+    {"SEQ_ID", BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T_SEQ_ID},\
+    {"SRCPORTID", BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T_SRCPORTID},\
+    {"TRANSPORTSPEC", BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T_TRANSPORTSPEC},\
+    {"VERSION", BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T_VERSION},\
+    {"p_1588_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T_FID_COUNT}
+
+/*!
+ * \name PROG_EXT_HDR_T field IDs.
+ */
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN 0
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER 1
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PROG_EXT_HDR_T_OPTION      2
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT          3
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT \
+    {"HDR_EXT_LEN", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN},\
+    {"NEXT_HEADER", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER},\
+    {"OPTION", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PROG_EXT_HDR_T_OPTION},\
+    {"prog_ext_hdr_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_0_T field IDs.
+ */
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_0_T_FLOWSET        0
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_0_T_LENGTH         1
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX 2
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_0_T_OBS_TIME_NS    3
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_0_T_OBS_TIME_S     4
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_0_T_TEMPLATE_ID    5
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_0_T_FID_COUNT          6
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT \
+    {"FLOWSET", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_0_T_FLOWSET},\
+    {"LENGTH", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_0_T_LENGTH},\
+    {"NEXT_HOP_INDEX", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX},\
+    {"OBS_TIME_NS", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_0_T_OBS_TIME_NS},\
+    {"OBS_TIME_S", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_0_T_OBS_TIME_S},\
+    {"TEMPLATE_ID", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_0_T_TEMPLATE_ID},\
+    {"psamp_0_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_0_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_1_T field IDs.
+ */
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_1_T_DLB_ID         0
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_1_T_EGRESS_PORT    1
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_1_T_EPOCH          2
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_1_T_INGRESS_PORT   3
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH 4
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_1_T_USER_META_DATA 5
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_1_T_VARIABLE_FLAG  6
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_1_T_FID_COUNT          7
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT \
+    {"DLB_ID", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_1_T_DLB_ID},\
+    {"EGRESS_PORT", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_1_T_EGRESS_PORT},\
+    {"EPOCH", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_1_T_EPOCH},\
+    {"INGRESS_PORT", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_1_T_INGRESS_PORT},\
+    {"SAMPLED_LENGTH", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH},\
+    {"USER_META_DATA", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_1_T_USER_META_DATA},\
+    {"VARIABLE_FLAG", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_1_T_VARIABLE_FLAG},\
+    {"psamp_1_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_1_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_MIRROR_ON_DROP_0_T field IDs.
+ */
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT 0
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT    1
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH          2
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS     3
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S      4
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID       5
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID     6
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT          7
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT \
+    {"EGRESS_MOD_PORT", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT},\
+    {"INGRESS_PORT", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT},\
+    {"LENGTH", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH},\
+    {"OBS_TIME_NS", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS},\
+    {"OBS_TIME_S", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S},\
+    {"SWITCH_ID", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID},\
+    {"TEMPLATE_ID", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID},\
+    {"psamp_mirror_on_drop_0_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_MIRROR_ON_DROP_1_T field IDs.
+ */
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_ING_DROP_REASON    0
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MIRROR_ON_DROP_OBJ 1
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MMU_DROP_CTRL      2
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_SAMPLED_LENGTH     3
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_USER_META_DATA     4
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_VAR_LEN_INDICATOR  5
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT          6
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FIELD_NAME_MAP_INIT \
+    {"ING_DROP_REASON", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_ING_DROP_REASON},\
+    {"MIRROR_ON_DROP_OBJ", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MIRROR_ON_DROP_OBJ},\
+    {"MMU_DROP_CTRL", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MMU_DROP_CTRL},\
+    {"SAMPLED_LENGTH", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_SAMPLED_LENGTH},\
+    {"USER_META_DATA", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_USER_META_DATA},\
+    {"VAR_LEN_INDICATOR", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_VAR_LEN_INDICATOR},\
+    {"psamp_mirror_on_drop_1_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT}
+
+/*!
+ * \name RARP_T field IDs.
+ */
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RARP_T_HARDWARE_LEN  0
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RARP_T_HARDWARE_TYPE 1
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RARP_T_OPERATION     2
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RARP_T_PROT_ADDR_LEN 3
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RARP_T_PROTOCOL_TYPE 4
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RARP_T_SENDER_HA     5
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RARP_T_SENDER_IP     6
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RARP_T_TARGET_HA     7
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RARP_T_TARGET_IP     8
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RARP_T_FID_COUNT          9
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT \
+    {"HARDWARE_LEN", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RARP_T_HARDWARE_LEN},\
+    {"HARDWARE_TYPE", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RARP_T_HARDWARE_TYPE},\
+    {"OPERATION", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RARP_T_OPERATION},\
+    {"PROT_ADDR_LEN", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RARP_T_PROT_ADDR_LEN},\
+    {"PROTOCOL_TYPE", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RARP_T_PROTOCOL_TYPE},\
+    {"SENDER_HA", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RARP_T_SENDER_HA},\
+    {"SENDER_IP", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RARP_T_SENDER_IP},\
+    {"TARGET_HA", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RARP_T_TARGET_HA},\
+    {"TARGET_IP", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RARP_T_TARGET_IP},\
+    {"rarp_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RARP_T_FID_COUNT}
+
+/*!
+ * \name ROUTING_T field IDs.
+ */
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ROUTING_T_DATA          0
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ROUTING_T_HDR_EXT_LEN   1
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ROUTING_T_NEXT_HEADER   2
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ROUTING_T_ROUTING_TYPE  3
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ROUTING_T_SEGMENTS_LEFT 4
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ROUTING_T_FID_COUNT          5
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT \
+    {"DATA", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ROUTING_T_DATA},\
+    {"HDR_EXT_LEN", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ROUTING_T_HDR_EXT_LEN},\
+    {"NEXT_HEADER", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ROUTING_T_NEXT_HEADER},\
+    {"ROUTING_TYPE", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ROUTING_T_ROUTING_TYPE},\
+    {"SEGMENTS_LEFT", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ROUTING_T_SEGMENTS_LEFT},\
+    {"routing_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_ROUTING_T_FID_COUNT}
+
+/*!
+ * \name RSPAN_T field IDs.
+ */
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RSPAN_T_TAG  0
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RSPAN_T_TPID 1
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RSPAN_T_FID_COUNT          2
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT \
+    {"TAG", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RSPAN_T_TAG},\
+    {"TPID", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RSPAN_T_TPID},\
+    {"rspan_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RSPAN_T_FID_COUNT}
+
+/*!
+ * \name SFLOW_SHIM_0_T field IDs.
+ */
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION 0
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE      1
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_0_T_VERSION         2
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT          3
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT \
+    {"SYS_DESTINATION", BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION},\
+    {"SYS_SOURCE", BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE},\
+    {"VERSION", BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_0_T_VERSION},\
+    {"sflow_shim_0_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT}
+
+/*!
+ * \name SFLOW_SHIM_1_T field IDs.
+ */
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE 0
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED   1
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE 2
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST       3
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE  4
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED   5
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED         6
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE       7
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT          8
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT \
+    {"FLAG_DEST_SAMPLE", BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE},\
+    {"FLAG_DISCARDED", BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED},\
+    {"FLAG_FLEX_SAMPLE", BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE},\
+    {"FLAG_MCAST", BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST},\
+    {"FLAG_SRC_SAMPLE", BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE},\
+    {"FLAG_TRUNCATED", BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED},\
+    {"RESERVED", BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED},\
+    {"SYS_OPCODE", BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE},\
+    {"sflow_shim_1_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT}
+
+/*!
+ * \name SFLOW_SHIM_2_T field IDs.
+ */
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM   0
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA 1
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT          2
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT \
+    {"SEQUENCE_NUM", BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM},\
+    {"USER_META_DATA", BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA},\
+    {"sflow_shim_2_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT}
+
+/*!
+ * \name SNAP_LLC_T field IDs.
+ */
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_SNAP_LLC_T_LENGTH   0
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_SNAP_LLC_T_SNAP_LLC 1
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_SNAP_LLC_T_FID_COUNT          2
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT \
+    {"LENGTH", BCM56880_A0_DNA_4_11_4_0_BCMPKT_SNAP_LLC_T_LENGTH},\
+    {"SNAP_LLC", BCM56880_A0_DNA_4_11_4_0_BCMPKT_SNAP_LLC_T_SNAP_LLC},\
+    {"snap_llc_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_SNAP_LLC_T_FID_COUNT}
+
+/*!
+ * \name TCP_FIRST_4BYTES_T field IDs.
+ */
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT 0
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT 1
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT          2
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT \
+    {"DST_PORT", BCM56880_A0_DNA_4_11_4_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT},\
+    {"SRC_PORT", BCM56880_A0_DNA_4_11_4_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT},\
+    {"tcp_first_4bytes_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT}
+
+/*!
+ * \name TCP_LAST_16BYTES_T field IDs.
+ */
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM           0
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM          1
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS 2
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM           3
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR        4
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE          5
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT          6
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT \
+    {"ACK_NUM", BCM56880_A0_DNA_4_11_4_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM},\
+    {"CHECKSUM", BCM56880_A0_DNA_4_11_4_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM},\
+    {"HDR_LEN_AND_FLAGS", BCM56880_A0_DNA_4_11_4_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS},\
+    {"SEQ_NUM", BCM56880_A0_DNA_4_11_4_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM},\
+    {"URGENT_PTR", BCM56880_A0_DNA_4_11_4_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR},\
+    {"WIN_SIZE", BCM56880_A0_DNA_4_11_4_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE},\
+    {"tcp_last_16bytes_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT}
+
+/*!
+ * \name UDP_T field IDs.
+ */
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_UDP_T_CHECKSUM   0
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_UDP_T_DST_PORT   1
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_UDP_T_SRC_PORT   2
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_UDP_T_UDP_LENGTH 3
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_UDP_T_FID_COUNT          4
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT \
+    {"CHECKSUM", BCM56880_A0_DNA_4_11_4_0_BCMPKT_UDP_T_CHECKSUM},\
+    {"DST_PORT", BCM56880_A0_DNA_4_11_4_0_BCMPKT_UDP_T_DST_PORT},\
+    {"SRC_PORT", BCM56880_A0_DNA_4_11_4_0_BCMPKT_UDP_T_SRC_PORT},\
+    {"UDP_LENGTH", BCM56880_A0_DNA_4_11_4_0_BCMPKT_UDP_T_UDP_LENGTH},\
+    {"udp_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_UDP_T_FID_COUNT}
+
+/*!
+ * \name UNKNOWN_L3_T field IDs.
+ */
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD 0
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD  1
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT          2
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT \
+    {"FIRST_16BYTES_OF_L3_PAYLOAD", BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD},\
+    {"NEXT_16BYTES_OF_L3_PAYLOAD", BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD},\
+    {"unknown_l3_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT}
+
+/*!
+ * \name UNKNOWN_L4_T field IDs.
+ */
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD 0
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT          1
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT \
+    {"FIRST_4BYTES_OF_L4_PAYLOAD", BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD},\
+    {"unknown_l4_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT}
+
+/*!
+ * \name UNKNOWN_L5_T field IDs.
+ */
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1 0
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3 1
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7 2
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT          3
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT \
+    {"L5_BYTES_0_1", BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1},\
+    {"L5_BYTES_2_3", BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3},\
+    {"L5_BYTES_4_7", BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7},\
+    {"unknown_l5_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT}
+
+/*!
+ * \name VLAN_T field IDs.
+ */
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_VLAN_T_CFI  0
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_VLAN_T_PCP  1
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_VLAN_T_TPID 2
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_VLAN_T_VID  3
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_VLAN_T_FID_COUNT          4
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT \
+    {"CFI", BCM56880_A0_DNA_4_11_4_0_BCMPKT_VLAN_T_CFI},\
+    {"PCP", BCM56880_A0_DNA_4_11_4_0_BCMPKT_VLAN_T_PCP},\
+    {"TPID", BCM56880_A0_DNA_4_11_4_0_BCMPKT_VLAN_T_TPID},\
+    {"VID", BCM56880_A0_DNA_4_11_4_0_BCMPKT_VLAN_T_VID},\
+    {"vlan_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_VLAN_T_FID_COUNT}
+
+/*!
+ * \name VNTAG_T field IDs.
+ */
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_VNTAG_T_TAG  0
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_VNTAG_T_TPID 1
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_VNTAG_T_FID_COUNT          2
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_VNTAG_T_FIELD_NAME_MAP_INIT \
+    {"TAG", BCM56880_A0_DNA_4_11_4_0_BCMPKT_VNTAG_T_TAG},\
+    {"TPID", BCM56880_A0_DNA_4_11_4_0_BCMPKT_VNTAG_T_TPID},\
+    {"vntag_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_VNTAG_T_FID_COUNT}
+
+/*!
+ * \name VXLAN_T field IDs.
+ */
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1 0
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_VXLAN_T_RESERVED2        1
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_VXLAN_T_VN_ID            2
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_VXLAN_T_FID_COUNT          3
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT \
+    {"FLAGS_RESERVED_1", BCM56880_A0_DNA_4_11_4_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1},\
+    {"RESERVED2", BCM56880_A0_DNA_4_11_4_0_BCMPKT_VXLAN_T_RESERVED2},\
+    {"VN_ID", BCM56880_A0_DNA_4_11_4_0_BCMPKT_VXLAN_T_VN_ID},\
+    {"vxlan_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_VXLAN_T_FID_COUNT}
+
+/*!
+ * \name WESP_T field IDs.
+ */
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_WESP_T_FLAGS       0
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_WESP_T_HEADER_LEN  1
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_WESP_T_NEXT_HEADER 2
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_WESP_T_SEQ_NUM     3
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_WESP_T_SPI         4
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_WESP_T_TRAILER_LEN 5
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_WESP_T_WESP_IV     6
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_WESP_T_FID_COUNT          7
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT \
+    {"FLAGS", BCM56880_A0_DNA_4_11_4_0_BCMPKT_WESP_T_FLAGS},\
+    {"HEADER_LEN", BCM56880_A0_DNA_4_11_4_0_BCMPKT_WESP_T_HEADER_LEN},\
+    {"NEXT_HEADER", BCM56880_A0_DNA_4_11_4_0_BCMPKT_WESP_T_NEXT_HEADER},\
+    {"SEQ_NUM", BCM56880_A0_DNA_4_11_4_0_BCMPKT_WESP_T_SEQ_NUM},\
+    {"SPI", BCM56880_A0_DNA_4_11_4_0_BCMPKT_WESP_T_SPI},\
+    {"TRAILER_LEN", BCM56880_A0_DNA_4_11_4_0_BCMPKT_WESP_T_TRAILER_LEN},\
+    {"WESP_IV", BCM56880_A0_DNA_4_11_4_0_BCMPKT_WESP_T_WESP_IV},\
+    {"wesp_t fid count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_WESP_T_FID_COUNT}
+
+
+#endif /* BCM56880_A0_DNA_4_11_4_0_BCMPKT_FLEXHDR_DATA_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_bcmpkt_rxpmd_flex_data.h
new file mode 100644
index 000000000..249c95130
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_bcmpkt_rxpmd_flex_data.h
@@ -0,0 +1,163 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) map.yml.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_DATA_H
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_DATA_H
+
+/*!
+ * \name RX flex metadata field IDs.
+ */
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0                      0
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0                                 1
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_DVP_15_0                                       2
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0                              3
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0        4
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0                         5
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0                         6
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_0                        7
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32                       8
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0                              9
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0                        10
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0                      11
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_0                             12
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0                            13
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0 14
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0                    15
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0                                    16
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_L2_IIF_10_0                                    17
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_L2_OIF_10_0                                    18
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0                                    19
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0                                  20
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_MPLS_LABEL_DECAP_COUNT_3_0                     21
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0              22
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0                              23
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0                            24
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0                            25
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_SVP_15_0                                       26
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0                   27
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0                        28
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0                              29
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0                             30
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0                             31
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0                32
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_VFI_15_0                                       33
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_1_0   34
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_FID_COUNT                       35
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_COUNT                    41
+
+/*!
+ * \name Packet Flex Reason Types.
+ */
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS                               0
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED 1
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED  2
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP                                  3
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT                                   4
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_IFP                                     5
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER                               6
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED      7
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT                                   8
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP                           9
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS                      10
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE                      11
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP                           12
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS                      13
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR                            14
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF                        15
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR                            16
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL                        17
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST                         18
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0                      19
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1                      20
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2                      21
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3                      22
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4                      23
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5                      24
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6                      25
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7                      26
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED                 27
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED              28
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED                  29
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU                    30
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU                          31
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED              32
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT                            33
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT                      34
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP                                35
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED              36
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_SVP                                     37
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP                               38
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED                       39
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_VFP                                     40
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT \
+    {"CML_FLAGS", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS},\
+    {"DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED},\
+    {"DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED},\
+    {"DST_FP", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP},\
+    {"EM_FT", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT},\
+    {"IFP", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_IFP},\
+    {"IFP_METER", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER},\
+    {"IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED},\
+    {"IVXLT", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT},\
+    {"L2_DST_LOOKUP", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP},\
+    {"L2_DST_LOOKUP_MISS", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS},\
+    {"L2_SRC_STATIC_MOVE", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE},\
+    {"L3_DST_LOOKUP", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP},\
+    {"L3_DST_LOOKUP_MISS", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS},\
+    {"L3_HDR_ERROR", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR},\
+    {"L3_IIF_EQ_L3_OIF", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF},\
+    {"L3_TTL_ERROR", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR},\
+    {"LEARN_CACHE_FULL", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL},\
+    {"MACSA_MULTICAST", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST},\
+    {"MATCHED_RULE_BIT_0", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0},\
+    {"MATCHED_RULE_BIT_1", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1},\
+    {"MATCHED_RULE_BIT_2", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2},\
+    {"MATCHED_RULE_BIT_3", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3},\
+    {"MATCHED_RULE_BIT_4", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4},\
+    {"MATCHED_RULE_BIT_5", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5},\
+    {"MATCHED_RULE_BIT_6", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6},\
+    {"MATCHED_RULE_BIT_7", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7},\
+    {"MEMBERSHIP_CHECK_FAILED", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED},\
+    {"MIRROR_SAMPLER_EGR_SAMPLED", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED},\
+    {"MIRROR_SAMPLER_SAMPLED", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED},\
+    {"MPLS_CTRL_PKT_TO_CPU", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU},\
+    {"NO_COPY_TO_CPU", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU},\
+    {"PKT_INTEGRITY_CHECK_FAILED", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED},\
+    {"PROTOCOL_PKT", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT},\
+    {"RESERVED_TRACE_BIT", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT},\
+    {"SER_DROP", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP},\
+    {"SPANNING_TREE_CHECK_FAILED", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED},\
+    {"SVP", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_SVP},\
+    {"TRACE_DOP", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP},\
+    {"URPF_CHECK_FAILED", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED},\
+    {"VFP", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_VFP},\
+    {"flex reason count", BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_COUNT}
+
+#endif /* BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_DATA_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_bcmpkt_rxpmd_match_id_defs.h
new file mode 100644
index 000000000..8ac35a349
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_bcmpkt_rxpmd_match_id_defs.h
@@ -0,0 +1,405 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) bcm56880_a0_dna_4_11_4_0_sf_match_id_info.yml
+ * for device bcm56880_a0 and variant dna_4_11_4_0.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H
+
+#include <bcmpkt/bcmpkt_rxpmd_match_id.h>
+
+/*!
+ * \brief Get the Match ID DataBase information.
+ *
+ * \retval bcmpkt_rxpmd_match_id_db_info_t Match ID DataBase information.
+*/
+extern bcmpkt_rxpmd_match_id_db_info_t *
+    bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db_info_get(void);
+
+/*!
+ * \brief Get the Match ID Mapping information.
+ *
+ * \retval bcmpkt_rxpmd_match_id_map_info_t Match ID Mapping information.
+*/
+extern bcmpkt_rxpmd_match_id_map_info_t *
+    bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_map_info_get(void);
+
+/*!
+  \name RXPMD Match IDs
+*/
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG  0
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE  1
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0  2
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG  3
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2  4
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE  5
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG  6
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC  7
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG  8
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP  9
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1  10
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2  11
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD  12
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT  13
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE  14
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1  15
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2  16
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE  17
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE  18
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM  19
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY  20
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT  21
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ  22
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP  23
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA  24
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP  25
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4  26
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6  27
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0  28
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1  29
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2  30
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3  31
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4  32
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5  33
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6  34
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH  35
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW  36
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE  37
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588  38
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP  39
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES  40
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES  41
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP  42
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3  43
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4  44
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5  45
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN  46
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK  47
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE  48
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG  49
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE  50
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0  51
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG  52
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2  53
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE  54
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG  55
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC  56
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG  57
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP  58
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1  59
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2  60
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD  61
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT  62
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE  63
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1  64
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2  65
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE  66
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE  67
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM  68
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY  69
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT  70
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ  71
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP  72
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA  73
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP  74
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4  75
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6  76
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0  77
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1  78
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2  79
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3  80
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4  81
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5  82
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6  83
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH  84
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW  85
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE  86
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588  87
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP  88
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES  89
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES  90
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP  91
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3  92
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4  93
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5  94
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN  95
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG  96
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG  97
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2  98
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE  99
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG  100
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC  101
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG  102
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP  103
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1  104
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2  105
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD  106
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT  107
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE  108
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1  109
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2  110
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP  111
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP  112
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4  113
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6  114
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE  115
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588  116
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP  117
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES  118
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES  119
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP  120
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3  121
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4  122
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5  123
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG  124
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE  125
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0  126
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG  127
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2  128
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE  129
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG  130
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC  131
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG  132
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP  133
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1  134
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2  135
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD  136
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT  137
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE  138
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1  139
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2  140
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE  141
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE  142
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM  143
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY  144
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT  145
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ  146
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP  147
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA  148
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP  149
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4  150
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6  151
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0  152
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1  153
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2  154
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3  155
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4  156
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5  157
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6  158
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH  159
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW  160
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE  161
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588  162
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP  163
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES  164
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES  165
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP  166
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3  167
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4  168
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5  169
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN  170
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK  171
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE  172
+#define BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_COUNT  173
+
+#define BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT \
+    {"EGRESS_PKT_FWD_L2_HDR_ETAG", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG}, \
+    {"EGRESS_PKT_FWD_L2_HDR_HG3_BASE", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE}, \
+    {"EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0}, \
+    {"EGRESS_PKT_FWD_L2_HDR_ITAG", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG}, \
+    {"EGRESS_PKT_FWD_L2_HDR_L2", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2}, \
+    {"EGRESS_PKT_FWD_L2_HDR_NONE", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE}, \
+    {"EGRESS_PKT_FWD_L2_HDR_OTAG", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG}, \
+    {"EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC}, \
+    {"EGRESS_PKT_FWD_L2_HDR_VNTAG", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ARP", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_BFD", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GPE", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ICMP", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IGMP", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IPV4", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IPV6", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS0", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS1", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS2", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS3", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS4", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS5", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS6", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_NONE", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_P_1588", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_RARP", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UDP", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN}, \
+    {"EGRESS_PKT_SYS_HDR_LOOPBACK", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK}, \
+    {"EGRESS_PKT_SYS_HDR_NONE", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_ETAG", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_ITAG", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_L2", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_NONE", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_OTAG", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_VNTAG", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN}, \
+    {"INGRESS_PKT_INNER_L2_HDR_ETAG", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG}, \
+    {"INGRESS_PKT_INNER_L2_HDR_ITAG", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG}, \
+    {"INGRESS_PKT_INNER_L2_HDR_L2", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2}, \
+    {"INGRESS_PKT_INNER_L2_HDR_NONE", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE}, \
+    {"INGRESS_PKT_INNER_L2_HDR_OTAG", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG}, \
+    {"INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC}, \
+    {"INGRESS_PKT_INNER_L2_HDR_VNTAG", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ARP", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_BFD", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ICMP", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_IGMP", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_IPV4", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_IPV6", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_NONE", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_P_1588", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_RARP", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UDP", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_ETAG", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_HG3_BASE", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_ITAG", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_L2", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_NONE", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_OTAG", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_VNTAG", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ARP", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_BFD", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GPE", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_NONE", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_RARP", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UDP", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN}, \
+    {"INGRESS_PKT_SYS_HDR_LOOPBACK", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK}, \
+    {"INGRESS_PKT_SYS_HDR_NONE", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE}, \
+    {"rxpmd_match_id_count", BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_COUNT}
+
+#endif /*! BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_bcmpkt_flexhdr.h
new file mode 100644
index 000000000..1dac0a9d3
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_bcmpkt_flexhdr.h
@@ -0,0 +1,170 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) header.yml.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_FLEXHDR_H
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_FLEXHDR_H
+
+#include <bcmpkt/bcmpkt_flexhdr_internal.h>
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ARP_T                      0
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_AUTHEN_T                   1
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T                      2
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CNTAG_T                    3
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_0_T         4
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_1_T         5
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_DEST_OPTION_T              6
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_FIXED_HDR_T        7
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_SUBHDR_5_T         8
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ESP_T                      9
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ETAG_T                     10
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ETHERTYPE_T                11
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_FRAG_T                     12
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T         13
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GPE_T                      14
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_CHKSUM_T               15
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_KEY_T                  16
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_ROUT_T                 17
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_SEQ_T                  18
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_T                      19
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_HOP_BY_HOP_T               20
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ICMP_T                     21
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_0_A_T          22
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_0_B_T          23
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_1_T            24
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_2_T            25
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_3_T            26
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_HEADER_T               27
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_MD_BASE_T              28
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_METADATA_T             29
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IGMP_T                     30
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPFIX_T                    31
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV4_T                     32
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV6_T                     33
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_L2_T                       34
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MIRROR_ERSPAN_SN_T         35
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MIRROR_TRANSPORT_T         36
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_ACH_T                 37
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_BV_T                  38
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_CW_T                  39
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_T                     40
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T                   41
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PROG_EXT_HDR_T             42
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_0_T                  43
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_1_T                  44
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T   45
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T   46
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RARP_T                     47
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ROUTING_T                  48
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RSPAN_T                    49
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_0_T             50
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_1_T             51
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_2_T             52
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SNAP_LLC_T                 53
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_TCP_FIRST_4BYTES_T         54
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_TCP_LAST_16BYTES_T         55
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UDP_T                      56
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L3_T               57
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L4_T               58
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L5_T               59
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VLAN_T                     60
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VNTAG_T                    61
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VXLAN_T                    62
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_WESP_T                     63
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_T               64
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_FLEXHDR_COUNT    65
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_FLEXHDR_NAME_MAP_INIT \
+    {"arp_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ARP_T},\
+    {"authen_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_AUTHEN_T},\
+    {"bfd_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T},\
+    {"cntag_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CNTAG_T},\
+    {"cpu_composites_0_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_0_T},\
+    {"cpu_composites_1_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_1_T},\
+    {"dest_option_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_DEST_OPTION_T},\
+    {"erspan3_fixed_hdr_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_FIXED_HDR_T},\
+    {"erspan3_subhdr_5_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_SUBHDR_5_T},\
+    {"esp_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ESP_T},\
+    {"etag_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ETAG_T},\
+    {"ethertype_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ETHERTYPE_T},\
+    {"frag_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_FRAG_T},\
+    {"generic_loopback_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T},\
+    {"gpe_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GPE_T},\
+    {"gre_chksum_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_CHKSUM_T},\
+    {"gre_key_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_KEY_T},\
+    {"gre_rout_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_ROUT_T},\
+    {"gre_seq_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_SEQ_T},\
+    {"gre_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_T},\
+    {"hop_by_hop_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_HOP_BY_HOP_T},\
+    {"icmp_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ICMP_T},\
+    {"ifa_flex_md_0_a_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_0_A_T},\
+    {"ifa_flex_md_0_b_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_0_B_T},\
+    {"ifa_flex_md_1_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_1_T},\
+    {"ifa_flex_md_2_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_2_T},\
+    {"ifa_flex_md_3_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_3_T},\
+    {"ifa_header_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_HEADER_T},\
+    {"ifa_md_base_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_MD_BASE_T},\
+    {"ifa_metadata_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_METADATA_T},\
+    {"igmp_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IGMP_T},\
+    {"ipfix_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPFIX_T},\
+    {"ipv4_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV4_T},\
+    {"ipv6_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV6_T},\
+    {"l2_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_L2_T},\
+    {"mirror_erspan_sn_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MIRROR_ERSPAN_SN_T},\
+    {"mirror_transport_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MIRROR_TRANSPORT_T},\
+    {"mpls_ach_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_ACH_T},\
+    {"mpls_bv_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_BV_T},\
+    {"mpls_cw_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_CW_T},\
+    {"mpls_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_T},\
+    {"p_1588_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T},\
+    {"prog_ext_hdr_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PROG_EXT_HDR_T},\
+    {"psamp_0_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_0_T},\
+    {"psamp_1_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_1_T},\
+    {"psamp_mirror_on_drop_0_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T},\
+    {"psamp_mirror_on_drop_3_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T},\
+    {"rarp_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RARP_T},\
+    {"routing_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ROUTING_T},\
+    {"rspan_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RSPAN_T},\
+    {"sflow_shim_0_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_0_T},\
+    {"sflow_shim_1_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_1_T},\
+    {"sflow_shim_2_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_2_T},\
+    {"snap_llc_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SNAP_LLC_T},\
+    {"tcp_first_4bytes_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_TCP_FIRST_4BYTES_T},\
+    {"tcp_last_16bytes_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_TCP_LAST_16BYTES_T},\
+    {"udp_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UDP_T},\
+    {"unknown_l3_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L3_T},\
+    {"unknown_l4_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L4_T},\
+    {"unknown_l5_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L5_T},\
+    {"vlan_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VLAN_T},\
+    {"vntag_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VNTAG_T},\
+    {"vxlan_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VXLAN_T},\
+    {"wesp_t", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_WESP_T},\
+    {"RXPMD_FLEX_T", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_T},\
+    {"flexhdr count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_FLEXHDR_COUNT}
+
+#endif /* BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_FLEXHDR_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_bcmpkt_flexhdr_data.h
new file mode 100644
index 000000000..3299293d7
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_bcmpkt_flexhdr_data.h
@@ -0,0 +1,1212 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) header.yml.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_FLEXHDR_DATA_H
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_FLEXHDR_DATA_H
+
+/*!
+ * \name ARP_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ARP_T_HARDWARE_LEN  0
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ARP_T_HARDWARE_TYPE 1
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ARP_T_OPERATION     2
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ARP_T_PROT_ADDR_LEN 3
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ARP_T_PROTOCOL_TYPE 4
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ARP_T_SENDER_HA     5
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ARP_T_SENDER_IP     6
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ARP_T_TARGET_HA     7
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ARP_T_TARGET_IP     8
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ARP_T_FID_COUNT          9
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT \
+    {"HARDWARE_LEN", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ARP_T_HARDWARE_LEN},\
+    {"HARDWARE_TYPE", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ARP_T_HARDWARE_TYPE},\
+    {"OPERATION", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ARP_T_OPERATION},\
+    {"PROT_ADDR_LEN", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ARP_T_PROT_ADDR_LEN},\
+    {"PROTOCOL_TYPE", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ARP_T_PROTOCOL_TYPE},\
+    {"SENDER_HA", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ARP_T_SENDER_HA},\
+    {"SENDER_IP", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ARP_T_SENDER_IP},\
+    {"TARGET_HA", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ARP_T_TARGET_HA},\
+    {"TARGET_IP", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ARP_T_TARGET_IP},\
+    {"arp_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ARP_T_FID_COUNT}
+
+/*!
+ * \name AUTHEN_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_AUTHEN_T_DATA        0
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_AUTHEN_T_NEXT_HEADER 1
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_AUTHEN_T_PAYLOAD_LEN 2
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_AUTHEN_T_RESERVED    3
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_AUTHEN_T_SEQ_NUM     4
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_AUTHEN_T_SPI         5
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_AUTHEN_T_FID_COUNT          6
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT \
+    {"DATA", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_AUTHEN_T_DATA},\
+    {"NEXT_HEADER", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_AUTHEN_T_NEXT_HEADER},\
+    {"PAYLOAD_LEN", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_AUTHEN_T_PAYLOAD_LEN},\
+    {"RESERVED", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_AUTHEN_T_RESERVED},\
+    {"SEQ_NUM", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_AUTHEN_T_SEQ_NUM},\
+    {"SPI", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_AUTHEN_T_SPI},\
+    {"authen_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_AUTHEN_T_FID_COUNT}
+
+/*!
+ * \name BFD_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_AP            0
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_BFD_LENGTH    1
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_CPI           2
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_DEM           3
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_DESMINTXINTV  4
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_DETECTMULT    5
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_DIAG          6
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_FIN           7
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_MINECHORXINTV 8
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_MPT           9
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_MYDISCRIM     10
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_POLL          11
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_REQMINRXINTV  12
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_STA           13
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_URDISCRIM     14
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_VERSION       15
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_FID_COUNT          16
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT \
+    {"AP", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_AP},\
+    {"BFD_LENGTH", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_BFD_LENGTH},\
+    {"CPI", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_CPI},\
+    {"DEM", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_DEM},\
+    {"DESMINTXINTV", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_DESMINTXINTV},\
+    {"DETECTMULT", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_DETECTMULT},\
+    {"DIAG", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_DIAG},\
+    {"FIN", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_FIN},\
+    {"MINECHORXINTV", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_MINECHORXINTV},\
+    {"MPT", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_MPT},\
+    {"MYDISCRIM", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_MYDISCRIM},\
+    {"POLL", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_POLL},\
+    {"REQMINRXINTV", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_REQMINRXINTV},\
+    {"STA", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_STA},\
+    {"URDISCRIM", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_URDISCRIM},\
+    {"VERSION", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_VERSION},\
+    {"bfd_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_FID_COUNT}
+
+/*!
+ * \name CNTAG_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CNTAG_T_RPID 0
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CNTAG_T_TPID 1
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CNTAG_T_FID_COUNT          2
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT \
+    {"RPID", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CNTAG_T_RPID},\
+    {"TPID", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CNTAG_T_TPID},\
+    {"cntag_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CNTAG_T_FID_COUNT}
+
+/*!
+ * \name CPU_COMPOSITES_0_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0 0
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1 1
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2 2
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3 3
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4 4
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5 5
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6 6
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT          7
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT \
+    {"DMA_CONT0", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0},\
+    {"DMA_CONT1", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1},\
+    {"DMA_CONT2", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2},\
+    {"DMA_CONT3", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3},\
+    {"DMA_CONT4", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4},\
+    {"DMA_CONT5", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5},\
+    {"DMA_CONT6", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6},\
+    {"cpu_composites_0_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT}
+
+/*!
+ * \name CPU_COMPOSITES_1_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10 0
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11 1
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12 2
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13 3
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14 4
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15 5
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16 6
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17 7
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7  8
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8  9
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9  10
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT          11
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT \
+    {"DMA_CONT10", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10},\
+    {"DMA_CONT11", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11},\
+    {"DMA_CONT12", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12},\
+    {"DMA_CONT13", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13},\
+    {"DMA_CONT14", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14},\
+    {"DMA_CONT15", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15},\
+    {"DMA_CONT16", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16},\
+    {"DMA_CONT17", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17},\
+    {"DMA_CONT7", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7},\
+    {"DMA_CONT8", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8},\
+    {"DMA_CONT9", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9},\
+    {"cpu_composites_1_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT}
+
+/*!
+ * \name DEST_OPTION_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN 0
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_DEST_OPTION_T_NEXT_HEADER 1
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_DEST_OPTION_T_OPTION      2
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_DEST_OPTION_T_FID_COUNT          3
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT \
+    {"HDR_EXT_LEN", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN},\
+    {"NEXT_HEADER", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_DEST_OPTION_T_NEXT_HEADER},\
+    {"OPTION", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_DEST_OPTION_T_OPTION},\
+    {"dest_option_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_DEST_OPTION_T_FID_COUNT}
+
+/*!
+ * \name ERSPAN3_FIXED_HDR_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO               0
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_FIXED_HDR_T_COS               1
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID           2
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O 3
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID        4
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_FIXED_HDR_T_T                 5
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP         6
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_FIXED_HDR_T_VER               7
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN              8
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT          9
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT \
+    {"BSO", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO},\
+    {"COS", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_FIXED_HDR_T_COS},\
+    {"GBP_SID", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID},\
+    {"P_FT_HWID_D_GRA_O", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O},\
+    {"SESSION_ID", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID},\
+    {"T", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_FIXED_HDR_T_T},\
+    {"TIMESTAMP", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP},\
+    {"VER", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_FIXED_HDR_T_VER},\
+    {"VLAN", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN},\
+    {"erspan3_fixed_hdr_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT}
+
+/*!
+ * \name ERSPAN3_SUBHDR_5_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID 0
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID     1
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID   2
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP   3
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT          4
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT \
+    {"PLATFORM_ID", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID},\
+    {"PORT_ID", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID},\
+    {"SWITCH_ID", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID},\
+    {"TIMESTAMP", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP},\
+    {"erspan3_subhdr_5_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT}
+
+/*!
+ * \name ESP_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ESP_T_NEXT_HEADER 0
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ESP_T_PAD         1
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ESP_T_PAD_LEN     2
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ESP_T_SEQ_NUM     3
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ESP_T_SPI         4
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ESP_T_FID_COUNT          5
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT \
+    {"NEXT_HEADER", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ESP_T_NEXT_HEADER},\
+    {"PAD", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ESP_T_PAD},\
+    {"PAD_LEN", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ESP_T_PAD_LEN},\
+    {"SEQ_NUM", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ESP_T_SEQ_NUM},\
+    {"SPI", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ESP_T_SPI},\
+    {"esp_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ESP_T_FID_COUNT}
+
+/*!
+ * \name ETAG_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ETAG_T_TAG  0
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ETAG_T_TPID 1
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ETAG_T_FID_COUNT          2
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ETAG_T_FIELD_NAME_MAP_INIT \
+    {"TAG", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ETAG_T_TAG},\
+    {"TPID", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ETAG_T_TPID},\
+    {"etag_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ETAG_T_FID_COUNT}
+
+/*!
+ * \name ETHERTYPE_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ETHERTYPE_T_TYPE 0
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ETHERTYPE_T_FID_COUNT          1
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT \
+    {"TYPE", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ETHERTYPE_T_TYPE},\
+    {"ethertype_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ETHERTYPE_T_FID_COUNT}
+
+/*!
+ * \name FRAG_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_FRAG_T_FRAG_INFO   0
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_FRAG_T_ID          1
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_FRAG_T_NEXT_HEADER 2
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_FRAG_T_RESERVED    3
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_FRAG_T_FID_COUNT          4
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT \
+    {"FRAG_INFO", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_FRAG_T_FRAG_INFO},\
+    {"ID", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_FRAG_T_ID},\
+    {"NEXT_HEADER", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_FRAG_T_NEXT_HEADER},\
+    {"RESERVED", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_FRAG_T_RESERVED},\
+    {"frag_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_FRAG_T_FID_COUNT}
+
+/*!
+ * \name GENERIC_LOOPBACK_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ    0
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE   1
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ        2
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_FLAGS              3
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE        4
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY     5
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL     6
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ      7
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0  8
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1  9
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ            10
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1         11
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2         12
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT 13
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE         14
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT          15
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT \
+    {"DESTINATION_OBJ", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ},\
+    {"DESTINATION_TYPE", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE},\
+    {"ENTROPY_OBJ", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ},\
+    {"FLAGS", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_FLAGS},\
+    {"HEADER_TYPE", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE},\
+    {"INPUT_PRIORITY", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY},\
+    {"INTERFACE_CTRL", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL},\
+    {"INTERFACE_OBJ", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ},\
+    {"PROCESSING_CTRL_0", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0},\
+    {"PROCESSING_CTRL_1", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1},\
+    {"QOS_OBJ", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ},\
+    {"RESERVED_1", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1},\
+    {"RESERVED_2", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2},\
+    {"SOURCE_SYSTEM_PORT", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT},\
+    {"START_BYTE", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE},\
+    {"generic_loopback_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT}
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NO_OP       0
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2_OIF      1
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED    2
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__VP          3
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP        4
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NHOP        5
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2MC_GROUP  6
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L3MC_GROUP  7
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED_1  8
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP_MEMBER 9
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__DEVICE_PORT 10
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__TUNNEL  0
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__GENERIC 1
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__NOOP   0
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__VFI    1
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__L3_IIF 2
+
+/*!
+ * \name GPE_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GPE_T_FLAGS         0
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GPE_T_NEXT_PROTOCOL 1
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GPE_T_RESERVED0     2
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GPE_T_RESERVED1     3
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GPE_T_VNI           4
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GPE_T_FID_COUNT          5
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT \
+    {"FLAGS", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GPE_T_FLAGS},\
+    {"NEXT_PROTOCOL", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GPE_T_NEXT_PROTOCOL},\
+    {"RESERVED0", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GPE_T_RESERVED0},\
+    {"RESERVED1", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GPE_T_RESERVED1},\
+    {"VNI", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GPE_T_VNI},\
+    {"gpe_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GPE_T_FID_COUNT}
+
+/*!
+ * \name GRE_CHKSUM_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_CHKSUM_T_CHECKSUM 0
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_CHKSUM_T_OFFSET   1
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_CHKSUM_T_FID_COUNT          2
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT \
+    {"CHECKSUM", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_CHKSUM_T_CHECKSUM},\
+    {"OFFSET", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_CHKSUM_T_OFFSET},\
+    {"gre_chksum_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_CHKSUM_T_FID_COUNT}
+
+/*!
+ * \name GRE_KEY_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_KEY_T_KEY 0
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_KEY_T_FID_COUNT          1
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT \
+    {"KEY", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_KEY_T_KEY},\
+    {"gre_key_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_KEY_T_FID_COUNT}
+
+/*!
+ * \name GRE_ROUT_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_ROUT_T_ROUTING 0
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_ROUT_T_FID_COUNT          1
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT \
+    {"ROUTING", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_ROUT_T_ROUTING},\
+    {"gre_rout_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_ROUT_T_FID_COUNT}
+
+/*!
+ * \name GRE_SEQ_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_SEQ_T_SEQUENCE 0
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_SEQ_T_FID_COUNT          1
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT \
+    {"SEQUENCE", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_SEQ_T_SEQUENCE},\
+    {"gre_seq_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_SEQ_T_FID_COUNT}
+
+/*!
+ * \name GRE_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_T_C_R_K_S  0
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_T_PROTOCOL 1
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_T_RESERVED 2
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_T_VERSION  3
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_T_FID_COUNT          4
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT \
+    {"C_R_K_S", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_T_C_R_K_S},\
+    {"PROTOCOL", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_T_PROTOCOL},\
+    {"RESERVED", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_T_RESERVED},\
+    {"VERSION", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_T_VERSION},\
+    {"gre_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_T_FID_COUNT}
+
+/*!
+ * \name HOP_BY_HOP_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN 0
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER 1
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_HOP_BY_HOP_T_OPTION      2
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_HOP_BY_HOP_T_FID_COUNT          3
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT \
+    {"HDR_EXT_LEN", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN},\
+    {"NEXT_HEADER", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER},\
+    {"OPTION", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_HOP_BY_HOP_T_OPTION},\
+    {"hop_by_hop_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_HOP_BY_HOP_T_FID_COUNT}
+
+/*!
+ * \name ICMP_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ICMP_T_CHECKSUM  0
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ICMP_T_CODE      1
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ICMP_T_ICMP_TYPE 2
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ICMP_T_FID_COUNT          3
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT \
+    {"CHECKSUM", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ICMP_T_CHECKSUM},\
+    {"CODE", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ICMP_T_CODE},\
+    {"ICMP_TYPE", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ICMP_T_ICMP_TYPE},\
+    {"icmp_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ICMP_T_FID_COUNT}
+
+/*!
+ * \name IFA_FLEX_MD_0_A_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_0_A_T_FWD_HDR_TTL   0
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_0_A_T_LNS_DEVICE_ID 1
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT          2
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_0_A_T_FIELD_NAME_MAP_INIT \
+    {"FWD_HDR_TTL", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_0_A_T_FWD_HDR_TTL},\
+    {"LNS_DEVICE_ID", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_0_A_T_LNS_DEVICE_ID},\
+    {"ifa_flex_md_0_a_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT}
+
+/*!
+ * \name IFA_FLEX_MD_0_B_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_0_B_T_CN               0
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_0_B_T_PORT_SPEED       1
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_0_B_T_QUEUE_ID         2
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_0_B_T_RX_TIMESTAMP_SEC 3
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT          4
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_0_B_T_FIELD_NAME_MAP_INIT \
+    {"CN", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_0_B_T_CN},\
+    {"PORT_SPEED", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_0_B_T_PORT_SPEED},\
+    {"QUEUE_ID", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_0_B_T_QUEUE_ID},\
+    {"RX_TIMESTAMP_SEC", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_0_B_T_RX_TIMESTAMP_SEC},\
+    {"ifa_flex_md_0_b_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT}
+
+/*!
+ * \name IFA_FLEX_MD_1_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_1_T_EGRESS_PORT_ID       0
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_1_T_INGRESS_PORT_ID      1
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_1_T_RX_TIMESTAMP_NANOSEC 2
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT          3
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_1_T_FIELD_NAME_MAP_INIT \
+    {"EGRESS_PORT_ID", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_1_T_EGRESS_PORT_ID},\
+    {"INGRESS_PORT_ID", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_1_T_INGRESS_PORT_ID},\
+    {"RX_TIMESTAMP_NANOSEC", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_1_T_RX_TIMESTAMP_NANOSEC},\
+    {"ifa_flex_md_1_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT}
+
+/*!
+ * \name IFA_FLEX_MD_2_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_2_T_RESIDENCE_TIME_NANOSEC 0
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_2_T_TX_QUEUE_BYTE_COUNT    1
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT          2
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_2_T_FIELD_NAME_MAP_INIT \
+    {"RESIDENCE_TIME_NANOSEC", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_2_T_RESIDENCE_TIME_NANOSEC},\
+    {"TX_QUEUE_BYTE_COUNT", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_2_T_TX_QUEUE_BYTE_COUNT},\
+    {"ifa_flex_md_2_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT}
+
+/*!
+ * \name IFA_FLEX_MD_3_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_0 0
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_1 1
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT          2
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_3_T_FIELD_NAME_MAP_INIT \
+    {"MMU_STAT_0", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_0},\
+    {"MMU_STAT_1", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_1},\
+    {"ifa_flex_md_3_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT}
+
+/*!
+ * \name IFA_HEADER_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_HEADER_T_FLAGS      0
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_HEADER_T_GNS        1
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_HEADER_T_MAX_LENGTH 2
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_HEADER_T_NEXT_HDR   3
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_HEADER_T_VER        4
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_HEADER_T_FID_COUNT          5
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT \
+    {"FLAGS", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_HEADER_T_FLAGS},\
+    {"GNS", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_HEADER_T_GNS},\
+    {"MAX_LENGTH", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_HEADER_T_MAX_LENGTH},\
+    {"NEXT_HDR", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_HEADER_T_NEXT_HDR},\
+    {"VER", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_HEADER_T_VER},\
+    {"ifa_header_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_HEADER_T_FID_COUNT}
+
+/*!
+ * \name IFA_MD_BASE_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_MD_BASE_T_ACTION_VECTOR            0
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_MD_BASE_T_HOP_LIMIT_CURRENT_LENGTH 1
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_MD_BASE_T_REQUEST_VECTOR           2
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_MD_BASE_T_FID_COUNT          3
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_MD_BASE_T_FIELD_NAME_MAP_INIT \
+    {"ACTION_VECTOR", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_MD_BASE_T_ACTION_VECTOR},\
+    {"HOP_LIMIT_CURRENT_LENGTH", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_MD_BASE_T_HOP_LIMIT_CURRENT_LENGTH},\
+    {"REQUEST_VECTOR", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_MD_BASE_T_REQUEST_VECTOR},\
+    {"ifa_md_base_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_MD_BASE_T_FID_COUNT}
+
+/*!
+ * \name IFA_METADATA_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_METADATA_T_ACTION_VECTOR            0
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_METADATA_T_HOP_LIMIT_CURRENT_LENGTH 1
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_METADATA_T_METADATA                 2
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_METADATA_T_REQUEST_VECTOR           3
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_METADATA_T_FID_COUNT          4
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_METADATA_T_FIELD_NAME_MAP_INIT \
+    {"ACTION_VECTOR", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_METADATA_T_ACTION_VECTOR},\
+    {"HOP_LIMIT_CURRENT_LENGTH", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_METADATA_T_HOP_LIMIT_CURRENT_LENGTH},\
+    {"METADATA", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_METADATA_T_METADATA},\
+    {"REQUEST_VECTOR", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_METADATA_T_REQUEST_VECTOR},\
+    {"ifa_metadata_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_METADATA_T_FID_COUNT}
+
+/*!
+ * \name IGMP_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IGMP_T_CHECKSUM      0
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IGMP_T_GROUP_ADDRESS 1
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IGMP_T_IGMP_TYPE     2
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IGMP_T_MAX_RESP_TIME 3
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IGMP_T_FID_COUNT          4
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT \
+    {"CHECKSUM", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IGMP_T_CHECKSUM},\
+    {"GROUP_ADDRESS", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IGMP_T_GROUP_ADDRESS},\
+    {"IGMP_TYPE", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IGMP_T_IGMP_TYPE},\
+    {"MAX_RESP_TIME", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IGMP_T_MAX_RESP_TIME},\
+    {"igmp_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IGMP_T_FID_COUNT}
+
+/*!
+ * \name IPFIX_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPFIX_T_EXPORT_TIME   0
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPFIX_T_LENGTH        1
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPFIX_T_OBS_DOMAIN_ID 2
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPFIX_T_SEQUENCE_NUM  3
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPFIX_T_VERSION       4
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPFIX_T_FID_COUNT          5
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT \
+    {"EXPORT_TIME", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPFIX_T_EXPORT_TIME},\
+    {"LENGTH", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPFIX_T_LENGTH},\
+    {"OBS_DOMAIN_ID", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPFIX_T_OBS_DOMAIN_ID},\
+    {"SEQUENCE_NUM", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPFIX_T_SEQUENCE_NUM},\
+    {"VERSION", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPFIX_T_VERSION},\
+    {"ipfix_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPFIX_T_FID_COUNT}
+
+/*!
+ * \name IPV4_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV4_T_DA                0
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET 1
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV4_T_HDR_CHECKSUM      2
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV4_T_ID                3
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV4_T_OPTION            4
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV4_T_PROTOCOL          5
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV4_T_SA                6
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV4_T_TOS               7
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV4_T_TOTAL_LENGTH      8
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV4_T_TTL               9
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV4_T_VERSION_HDR_LEN   10
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV4_T_FID_COUNT          11
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT \
+    {"DA", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV4_T_DA},\
+    {"FLAGS_FRAG_OFFSET", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET},\
+    {"HDR_CHECKSUM", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV4_T_HDR_CHECKSUM},\
+    {"ID", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV4_T_ID},\
+    {"OPTION", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV4_T_OPTION},\
+    {"PROTOCOL", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV4_T_PROTOCOL},\
+    {"SA", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV4_T_SA},\
+    {"TOS", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV4_T_TOS},\
+    {"TOTAL_LENGTH", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV4_T_TOTAL_LENGTH},\
+    {"TTL", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV4_T_TTL},\
+    {"VERSION_HDR_LEN", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV4_T_VERSION_HDR_LEN},\
+    {"ipv4_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV4_T_FID_COUNT}
+
+/*!
+ * \name IPV6_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV6_T_DA             0
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV6_T_FLOW_LABEL     1
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV6_T_HOP_LIMIT      2
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV6_T_NEXT_HEADER    3
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV6_T_PAYLOAD_LENGTH 4
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV6_T_SA             5
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV6_T_TRAFFIC_CLASS  6
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV6_T_VERSION        7
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV6_T_FID_COUNT          8
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT \
+    {"DA", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV6_T_DA},\
+    {"FLOW_LABEL", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV6_T_FLOW_LABEL},\
+    {"HOP_LIMIT", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV6_T_HOP_LIMIT},\
+    {"NEXT_HEADER", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV6_T_NEXT_HEADER},\
+    {"PAYLOAD_LENGTH", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV6_T_PAYLOAD_LENGTH},\
+    {"SA", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV6_T_SA},\
+    {"TRAFFIC_CLASS", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV6_T_TRAFFIC_CLASS},\
+    {"VERSION", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV6_T_VERSION},\
+    {"ipv6_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV6_T_FID_COUNT}
+
+/*!
+ * \name L2_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_L2_T_MACDA 0
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_L2_T_MACSA 1
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_L2_T_FID_COUNT          2
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_L2_T_FIELD_NAME_MAP_INIT \
+    {"MACDA", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_L2_T_MACDA},\
+    {"MACSA", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_L2_T_MACSA},\
+    {"l2_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_L2_T_FID_COUNT}
+
+/*!
+ * \name MIRROR_ERSPAN_SN_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM 0
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT          1
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT \
+    {"SEQ_NUM", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM},\
+    {"mirror_erspan_sn_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT}
+
+/*!
+ * \name MIRROR_TRANSPORT_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MIRROR_TRANSPORT_T_DATA 0
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT          1
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT \
+    {"DATA", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MIRROR_TRANSPORT_T_DATA},\
+    {"mirror_transport_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT}
+
+/*!
+ * \name MPLS_ACH_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE 0
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_ACH_T_CW_TYPE      1
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_ACH_T_RESERVED     2
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_ACH_T_VERSION      3
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_ACH_T_FID_COUNT          4
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT \
+    {"CHANNEL_TYPE", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE},\
+    {"CW_TYPE", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_ACH_T_CW_TYPE},\
+    {"RESERVED", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_ACH_T_RESERVED},\
+    {"VERSION", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_ACH_T_VERSION},\
+    {"mpls_ach_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_ACH_T_FID_COUNT}
+
+/*!
+ * \name MPLS_BV_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_BV_T_VALUE 0
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_BV_T_FID_COUNT          1
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT \
+    {"VALUE", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_BV_T_VALUE},\
+    {"mpls_bv_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_BV_T_FID_COUNT}
+
+/*!
+ * \name MPLS_CW_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_CW_T_CW_TYPE    0
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_CW_T_RESERVED   1
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_CW_T_SEQ_NUMBER 2
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_CW_T_FID_COUNT          3
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT \
+    {"CW_TYPE", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_CW_T_CW_TYPE},\
+    {"RESERVED", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_CW_T_RESERVED},\
+    {"SEQ_NUMBER", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_CW_T_SEQ_NUMBER},\
+    {"mpls_cw_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_CW_T_FID_COUNT}
+
+/*!
+ * \name MPLS_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_T_BOS   0
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_T_EXP   1
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_T_LABEL 2
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_T_TTL   3
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_T_FID_COUNT          4
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT \
+    {"BOS", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_T_BOS},\
+    {"EXP", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_T_EXP},\
+    {"LABEL", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_T_LABEL},\
+    {"TTL", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_T_TTL},\
+    {"mpls_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_T_FID_COUNT}
+
+/*!
+ * \name P_1588_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T_CNTRL          0
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T_CORRECTION     1
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T_DOMAIN_NB      2
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T_FLAGS          3
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T_LOGMSGINTERVAL 4
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T_MSG_LENGTH     5
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T_MSG_TYPE       6
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T_RESERVED1      7
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T_RESERVED2      8
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T_RESERVED3      9
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T_SEQ_ID         10
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T_SRCPORTID      11
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T_TRANSPORTSPEC  12
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T_VERSION        13
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T_FID_COUNT          14
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT \
+    {"CNTRL", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T_CNTRL},\
+    {"CORRECTION", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T_CORRECTION},\
+    {"DOMAIN_NB", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T_DOMAIN_NB},\
+    {"FLAGS", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T_FLAGS},\
+    {"LOGMSGINTERVAL", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T_LOGMSGINTERVAL},\
+    {"MSG_LENGTH", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T_MSG_LENGTH},\
+    {"MSG_TYPE", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T_MSG_TYPE},\
+    {"RESERVED1", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T_RESERVED1},\
+    {"RESERVED2", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T_RESERVED2},\
+    {"RESERVED3", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T_RESERVED3},\
+    {"SEQ_ID", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T_SEQ_ID},\
+    {"SRCPORTID", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T_SRCPORTID},\
+    {"TRANSPORTSPEC", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T_TRANSPORTSPEC},\
+    {"VERSION", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T_VERSION},\
+    {"p_1588_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T_FID_COUNT}
+
+/*!
+ * \name PROG_EXT_HDR_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN 0
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER 1
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PROG_EXT_HDR_T_OPTION      2
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PROG_EXT_HDR_T_FID_COUNT          3
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT \
+    {"HDR_EXT_LEN", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN},\
+    {"NEXT_HEADER", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER},\
+    {"OPTION", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PROG_EXT_HDR_T_OPTION},\
+    {"prog_ext_hdr_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PROG_EXT_HDR_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_0_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_0_T_FLOWSET        0
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_0_T_LENGTH         1
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX 2
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_0_T_OBS_TIME_NS    3
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_0_T_OBS_TIME_S     4
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_0_T_TEMPLATE_ID    5
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_0_T_FID_COUNT          6
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT \
+    {"FLOWSET", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_0_T_FLOWSET},\
+    {"LENGTH", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_0_T_LENGTH},\
+    {"NEXT_HOP_INDEX", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX},\
+    {"OBS_TIME_NS", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_0_T_OBS_TIME_NS},\
+    {"OBS_TIME_S", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_0_T_OBS_TIME_S},\
+    {"TEMPLATE_ID", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_0_T_TEMPLATE_ID},\
+    {"psamp_0_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_0_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_1_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_1_T_DLB_ID         0
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_1_T_EGRESS_PORT    1
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_1_T_EPOCH          2
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_1_T_INGRESS_PORT   3
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH 4
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_1_T_USER_META_DATA 5
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_1_T_VARIABLE_FLAG  6
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_1_T_FID_COUNT          7
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT \
+    {"DLB_ID", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_1_T_DLB_ID},\
+    {"EGRESS_PORT", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_1_T_EGRESS_PORT},\
+    {"EPOCH", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_1_T_EPOCH},\
+    {"INGRESS_PORT", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_1_T_INGRESS_PORT},\
+    {"SAMPLED_LENGTH", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH},\
+    {"USER_META_DATA", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_1_T_USER_META_DATA},\
+    {"VARIABLE_FLAG", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_1_T_VARIABLE_FLAG},\
+    {"psamp_1_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_1_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_MIRROR_ON_DROP_0_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT 0
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT    1
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH          2
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS     3
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S      4
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID       5
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID     6
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT          7
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT \
+    {"EGRESS_MOD_PORT", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT},\
+    {"INGRESS_PORT", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT},\
+    {"LENGTH", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH},\
+    {"OBS_TIME_NS", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS},\
+    {"OBS_TIME_S", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S},\
+    {"SWITCH_ID", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID},\
+    {"TEMPLATE_ID", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID},\
+    {"psamp_mirror_on_drop_0_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_MIRROR_ON_DROP_3_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON             0
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_MOD_STATE               1
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0              2
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH          3
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX 4
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA          5
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR       6
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT          7
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT \
+    {"DROP_REASON", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON},\
+    {"MOD_STATE", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_MOD_STATE},\
+    {"RESERVED_0", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0},\
+    {"SAMPLED_LENGTH", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH},\
+    {"UC_COS__COLOR__PROB_IDX", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX},\
+    {"USER_META_DATA", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA},\
+    {"VAR_LEN_INDICATOR", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR},\
+    {"psamp_mirror_on_drop_3_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT}
+
+/*!
+ * \name RARP_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RARP_T_HARDWARE_LEN  0
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RARP_T_HARDWARE_TYPE 1
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RARP_T_OPERATION     2
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RARP_T_PROT_ADDR_LEN 3
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RARP_T_PROTOCOL_TYPE 4
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RARP_T_SENDER_HA     5
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RARP_T_SENDER_IP     6
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RARP_T_TARGET_HA     7
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RARP_T_TARGET_IP     8
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RARP_T_FID_COUNT          9
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT \
+    {"HARDWARE_LEN", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RARP_T_HARDWARE_LEN},\
+    {"HARDWARE_TYPE", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RARP_T_HARDWARE_TYPE},\
+    {"OPERATION", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RARP_T_OPERATION},\
+    {"PROT_ADDR_LEN", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RARP_T_PROT_ADDR_LEN},\
+    {"PROTOCOL_TYPE", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RARP_T_PROTOCOL_TYPE},\
+    {"SENDER_HA", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RARP_T_SENDER_HA},\
+    {"SENDER_IP", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RARP_T_SENDER_IP},\
+    {"TARGET_HA", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RARP_T_TARGET_HA},\
+    {"TARGET_IP", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RARP_T_TARGET_IP},\
+    {"rarp_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RARP_T_FID_COUNT}
+
+/*!
+ * \name ROUTING_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ROUTING_T_DATA          0
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ROUTING_T_HDR_EXT_LEN   1
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ROUTING_T_NEXT_HEADER   2
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ROUTING_T_ROUTING_TYPE  3
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ROUTING_T_SEGMENTS_LEFT 4
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ROUTING_T_FID_COUNT          5
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT \
+    {"DATA", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ROUTING_T_DATA},\
+    {"HDR_EXT_LEN", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ROUTING_T_HDR_EXT_LEN},\
+    {"NEXT_HEADER", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ROUTING_T_NEXT_HEADER},\
+    {"ROUTING_TYPE", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ROUTING_T_ROUTING_TYPE},\
+    {"SEGMENTS_LEFT", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ROUTING_T_SEGMENTS_LEFT},\
+    {"routing_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ROUTING_T_FID_COUNT}
+
+/*!
+ * \name RSPAN_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RSPAN_T_TAG  0
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RSPAN_T_TPID 1
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RSPAN_T_FID_COUNT          2
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT \
+    {"TAG", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RSPAN_T_TAG},\
+    {"TPID", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RSPAN_T_TPID},\
+    {"rspan_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RSPAN_T_FID_COUNT}
+
+/*!
+ * \name SFLOW_SHIM_0_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION 0
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE      1
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_0_T_VERSION         2
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT          3
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT \
+    {"SYS_DESTINATION", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION},\
+    {"SYS_SOURCE", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE},\
+    {"VERSION", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_0_T_VERSION},\
+    {"sflow_shim_0_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT}
+
+/*!
+ * \name SFLOW_SHIM_1_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE 0
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED   1
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE 2
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST       3
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE  4
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED   5
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_1_T_RESERVED         6
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE       7
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT          8
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT \
+    {"FLAG_DEST_SAMPLE", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE},\
+    {"FLAG_DISCARDED", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED},\
+    {"FLAG_FLEX_SAMPLE", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE},\
+    {"FLAG_MCAST", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST},\
+    {"FLAG_SRC_SAMPLE", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE},\
+    {"FLAG_TRUNCATED", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED},\
+    {"RESERVED", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_1_T_RESERVED},\
+    {"SYS_OPCODE", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE},\
+    {"sflow_shim_1_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT}
+
+/*!
+ * \name SFLOW_SHIM_2_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM   0
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA 1
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT          2
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT \
+    {"SEQUENCE_NUM", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM},\
+    {"USER_META_DATA", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA},\
+    {"sflow_shim_2_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT}
+
+/*!
+ * \name SNAP_LLC_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SNAP_LLC_T_LENGTH   0
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SNAP_LLC_T_SNAP_LLC 1
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SNAP_LLC_T_FID_COUNT          2
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT \
+    {"LENGTH", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SNAP_LLC_T_LENGTH},\
+    {"SNAP_LLC", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SNAP_LLC_T_SNAP_LLC},\
+    {"snap_llc_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SNAP_LLC_T_FID_COUNT}
+
+/*!
+ * \name TCP_FIRST_4BYTES_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT 0
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT 1
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT          2
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT \
+    {"DST_PORT", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT},\
+    {"SRC_PORT", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT},\
+    {"tcp_first_4bytes_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT}
+
+/*!
+ * \name TCP_LAST_16BYTES_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM           0
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM          1
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS 2
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM           3
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR        4
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE          5
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT          6
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT \
+    {"ACK_NUM", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM},\
+    {"CHECKSUM", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM},\
+    {"HDR_LEN_AND_FLAGS", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS},\
+    {"SEQ_NUM", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM},\
+    {"URGENT_PTR", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR},\
+    {"WIN_SIZE", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE},\
+    {"tcp_last_16bytes_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT}
+
+/*!
+ * \name UDP_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UDP_T_CHECKSUM   0
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UDP_T_DST_PORT   1
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UDP_T_SRC_PORT   2
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UDP_T_UDP_LENGTH 3
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UDP_T_FID_COUNT          4
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT \
+    {"CHECKSUM", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UDP_T_CHECKSUM},\
+    {"DST_PORT", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UDP_T_DST_PORT},\
+    {"SRC_PORT", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UDP_T_SRC_PORT},\
+    {"UDP_LENGTH", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UDP_T_UDP_LENGTH},\
+    {"udp_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UDP_T_FID_COUNT}
+
+/*!
+ * \name UNKNOWN_L3_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD 0
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD  1
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L3_T_FID_COUNT          2
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT \
+    {"FIRST_16BYTES_OF_L3_PAYLOAD", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD},\
+    {"NEXT_16BYTES_OF_L3_PAYLOAD", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD},\
+    {"unknown_l3_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L3_T_FID_COUNT}
+
+/*!
+ * \name UNKNOWN_L4_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD 0
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L4_T_FID_COUNT          1
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT \
+    {"FIRST_4BYTES_OF_L4_PAYLOAD", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD},\
+    {"unknown_l4_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L4_T_FID_COUNT}
+
+/*!
+ * \name UNKNOWN_L5_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1 0
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3 1
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7 2
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L5_T_FID_COUNT          3
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT \
+    {"L5_BYTES_0_1", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1},\
+    {"L5_BYTES_2_3", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3},\
+    {"L5_BYTES_4_7", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7},\
+    {"unknown_l5_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L5_T_FID_COUNT}
+
+/*!
+ * \name VLAN_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VLAN_T_CFI  0
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VLAN_T_PCP  1
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VLAN_T_TPID 2
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VLAN_T_VID  3
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VLAN_T_FID_COUNT          4
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT \
+    {"CFI", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VLAN_T_CFI},\
+    {"PCP", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VLAN_T_PCP},\
+    {"TPID", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VLAN_T_TPID},\
+    {"VID", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VLAN_T_VID},\
+    {"vlan_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VLAN_T_FID_COUNT}
+
+/*!
+ * \name VNTAG_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VNTAG_T_TAG  0
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VNTAG_T_TPID 1
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VNTAG_T_FID_COUNT          2
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VNTAG_T_FIELD_NAME_MAP_INIT \
+    {"TAG", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VNTAG_T_TAG},\
+    {"TPID", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VNTAG_T_TPID},\
+    {"vntag_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VNTAG_T_FID_COUNT}
+
+/*!
+ * \name VXLAN_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VXLAN_T_FLAGS_RESERVED_1 0
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VXLAN_T_RESERVED2        1
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VXLAN_T_VN_ID            2
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VXLAN_T_FID_COUNT          3
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT \
+    {"FLAGS_RESERVED_1", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VXLAN_T_FLAGS_RESERVED_1},\
+    {"RESERVED2", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VXLAN_T_RESERVED2},\
+    {"VN_ID", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VXLAN_T_VN_ID},\
+    {"vxlan_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VXLAN_T_FID_COUNT}
+
+/*!
+ * \name WESP_T field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_WESP_T_FLAGS       0
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_WESP_T_HEADER_LEN  1
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_WESP_T_NEXT_HEADER 2
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_WESP_T_SEQ_NUM     3
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_WESP_T_SPI         4
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_WESP_T_TRAILER_LEN 5
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_WESP_T_WESP_IV     6
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_WESP_T_FID_COUNT          7
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT \
+    {"FLAGS", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_WESP_T_FLAGS},\
+    {"HEADER_LEN", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_WESP_T_HEADER_LEN},\
+    {"NEXT_HEADER", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_WESP_T_NEXT_HEADER},\
+    {"SEQ_NUM", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_WESP_T_SEQ_NUM},\
+    {"SPI", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_WESP_T_SPI},\
+    {"TRAILER_LEN", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_WESP_T_TRAILER_LEN},\
+    {"WESP_IV", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_WESP_T_WESP_IV},\
+    {"wesp_t fid count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_WESP_T_FID_COUNT}
+
+
+#endif /* BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_FLEXHDR_DATA_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_bcmpkt_rxpmd_flex_data.h
new file mode 100644
index 000000000..01bd4cf9a
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_bcmpkt_rxpmd_flex_data.h
@@ -0,0 +1,165 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) map.yml.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_DATA_H
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_DATA_H
+
+/*!
+ * \name RX flex metadata field IDs.
+ */
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0                      0
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0                                 1
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_DVP_15_0                                       2
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0                              3
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0        4
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0                         5
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0                         6
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_0                        7
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32                       8
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0                              9
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0                        10
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0                      11
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_ING_PORT_GROUP_ID_3_0_3_0                      12
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_ING_PORT_GROUP_ID_7_4_3_0                      13
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_0                             14
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_ITAG_PRESERVE_15_0             15
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0 16
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0                    17
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_INT_PRI_3_0                                    18
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_L2_IIF_10_0                                    19
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_L2_OIF_10_0                                    20
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_L3_IIF_13_0                                    21
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0                                  22
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0              23
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0                              24
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0                            25
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0                            26
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_SVP_15_0                                       27
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0                   28
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0                        29
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0                              30
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0                             31
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0                             32
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0                33
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_VFI_15_0                                       34
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_FID_COUNT                       35
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_COUNT                    42
+
+/*!
+ * \name Packet Flex Reason Types.
+ */
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE                         0
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS                               1
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED 2
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED  3
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_DST_FP                                  4
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_EM_FT                                   5
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_IFP                                     6
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_IFP_METER                               7
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED      8
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_IVXLT                                   9
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP                           10
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS                      11
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE                      12
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP                           13
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS                      14
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR                            15
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF                        16
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR                            17
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL                        18
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD                    19
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0                      20
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1                      21
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2                      22
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3                      23
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4                      24
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5                      25
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6                      26
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7                      27
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD            28
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED              29
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED                  30
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU                    31
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU                          32
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED              33
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT                            34
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT                      35
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_SER_DROP                                36
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD         37
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_SVP                                     38
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP                               39
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED                       40
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_VFP                                     41
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT \
+    {"CB_STATION_MOVE", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE},\
+    {"CML_FLAGS", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS},\
+    {"DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED},\
+    {"DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED},\
+    {"DST_FP", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_DST_FP},\
+    {"EM_FT", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_EM_FT},\
+    {"IFP", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_IFP},\
+    {"IFP_METER", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_IFP_METER},\
+    {"IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED},\
+    {"IVXLT", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_IVXLT},\
+    {"L2_DST_LOOKUP", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP},\
+    {"L2_DST_LOOKUP_MISS", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS},\
+    {"L2_SRC_STATIC_MOVE", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE},\
+    {"L3_DST_LOOKUP", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP},\
+    {"L3_DST_LOOKUP_MISS", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS},\
+    {"L3_HDR_ERROR", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR},\
+    {"L3_IIF_EQ_L3_OIF", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF},\
+    {"L3_TTL_ERROR", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR},\
+    {"LEARN_CACHE_FULL", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL},\
+    {"MACSA_MULTICAST_RSVD", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD},\
+    {"MATCHED_RULE_BIT_0", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0},\
+    {"MATCHED_RULE_BIT_1", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1},\
+    {"MATCHED_RULE_BIT_2", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2},\
+    {"MATCHED_RULE_BIT_3", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3},\
+    {"MATCHED_RULE_BIT_4", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4},\
+    {"MATCHED_RULE_BIT_5", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5},\
+    {"MATCHED_RULE_BIT_6", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6},\
+    {"MATCHED_RULE_BIT_7", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7},\
+    {"MEMBERSHIP_CHECK_FAILED_RSVD", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD},\
+    {"MIRROR_SAMPLER_EGR_SAMPLED", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED},\
+    {"MIRROR_SAMPLER_SAMPLED", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED},\
+    {"MPLS_CTRL_PKT_TO_CPU", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU},\
+    {"NO_COPY_TO_CPU", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU},\
+    {"PKT_INTEGRITY_CHECK_FAILED", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED},\
+    {"PROTOCOL_PKT", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT},\
+    {"RESERVED_TRACE_BIT", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT},\
+    {"SER_DROP", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_SER_DROP},\
+    {"SPANNING_TREE_CHECK_FAILED_RSVD", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD},\
+    {"SVP", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_SVP},\
+    {"TRACE_DOP", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP},\
+    {"URPF_CHECK_FAILED", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED},\
+    {"VFP", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_VFP},\
+    {"flex reason count", BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_COUNT}
+
+#endif /* BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_DATA_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_bcmpkt_rxpmd_match_id_defs.h
new file mode 100644
index 000000000..3d9c0aa09
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_bcmpkt_rxpmd_match_id_defs.h
@@ -0,0 +1,395 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) bcm56880_a0_hna_6_5_29_2_2_sf_match_id_info.yml
+ * for device bcm56880_a0 and variant hna_6_5_29_2_2.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_MATCH_ID_DEFS_H
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_MATCH_ID_DEFS_H
+
+#include <bcmpkt/bcmpkt_rxpmd_match_id.h>
+
+/*!
+ * \brief Get the Match ID DataBase information.
+ *
+ * \retval bcmpkt_rxpmd_match_id_db_info_t Match ID DataBase information.
+*/
+extern bcmpkt_rxpmd_match_id_db_info_t *
+    bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db_info_get(void);
+
+/*!
+ * \brief Get the Match ID Mapping information.
+ *
+ * \retval bcmpkt_rxpmd_match_id_map_info_t Match ID Mapping information.
+*/
+extern bcmpkt_rxpmd_match_id_map_info_t *
+    bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_map_info_get(void);
+
+/*!
+  \name RXPMD Match IDs
+*/
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG  0
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG  1
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2  2
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE  3
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG  4
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC  5
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG  6
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP  7
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1  8
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2  9
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD  10
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT  11
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE  12
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1  13
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2  14
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE  15
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE  16
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM  17
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY  18
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT  19
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ  20
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP  21
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA  22
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP  23
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4  24
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6  25
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0  26
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1  27
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2  28
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3  29
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4  30
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5  31
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6  32
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH  33
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW  34
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE  35
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588  36
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP  37
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES  38
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES  39
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP  40
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3  41
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4  42
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5  43
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN  44
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK  45
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE  46
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG  47
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG  48
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2  49
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE  50
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG  51
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC  52
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG  53
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP  54
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1  55
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2  56
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD  57
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT  58
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE  59
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1  60
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2  61
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE  62
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE  63
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM  64
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY  65
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT  66
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ  67
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP  68
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA  69
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP  70
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4  71
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6  72
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0  73
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1  74
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2  75
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3  76
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4  77
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5  78
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6  79
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH  80
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW  81
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE  82
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588  83
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP  84
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES  85
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES  86
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP  87
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3  88
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4  89
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5  90
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN  91
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG  92
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG  93
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2  94
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE  95
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG  96
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC  97
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG  98
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP  99
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1  100
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2  101
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD  102
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT  103
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE  104
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1  105
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2  106
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP  107
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA  108
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP  109
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4  110
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6  111
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE  112
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588  113
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP  114
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES  115
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES  116
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP  117
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3  118
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4  119
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5  120
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG  121
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG  122
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2  123
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE  124
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG  125
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC  126
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG  127
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP  128
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1  129
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2  130
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD  131
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT  132
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE  133
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1  134
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2  135
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE  136
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE  137
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM  138
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY  139
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT  140
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ  141
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP  142
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA  143
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP  144
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4  145
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6  146
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0  147
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1  148
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2  149
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3  150
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4  151
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5  152
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6  153
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH  154
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW  155
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE  156
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588  157
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP  158
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES  159
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES  160
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP  161
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3  162
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4  163
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5  164
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN  165
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK  166
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE  167
+#define BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_COUNT  168
+
+#define BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT \
+    {"EGRESS_PKT_FWD_L2_HDR_ETAG", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG}, \
+    {"EGRESS_PKT_FWD_L2_HDR_ITAG", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG}, \
+    {"EGRESS_PKT_FWD_L2_HDR_L2", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2}, \
+    {"EGRESS_PKT_FWD_L2_HDR_NONE", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE}, \
+    {"EGRESS_PKT_FWD_L2_HDR_OTAG", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG}, \
+    {"EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC}, \
+    {"EGRESS_PKT_FWD_L2_HDR_VNTAG", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ARP", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_BFD", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GPE", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ICMP", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IGMP", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IPV4", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IPV6", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS0", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS1", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS2", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS3", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS4", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS5", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS6", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_NONE", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_P_1588", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_RARP", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UDP", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN}, \
+    {"EGRESS_PKT_SYS_HDR_LOOPBACK", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK}, \
+    {"EGRESS_PKT_SYS_HDR_NONE", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_ETAG", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_ITAG", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_L2", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_NONE", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_OTAG", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_VNTAG", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN}, \
+    {"INGRESS_PKT_INNER_L2_HDR_ETAG", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG}, \
+    {"INGRESS_PKT_INNER_L2_HDR_ITAG", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG}, \
+    {"INGRESS_PKT_INNER_L2_HDR_L2", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2}, \
+    {"INGRESS_PKT_INNER_L2_HDR_NONE", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE}, \
+    {"INGRESS_PKT_INNER_L2_HDR_OTAG", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG}, \
+    {"INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC}, \
+    {"INGRESS_PKT_INNER_L2_HDR_VNTAG", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ARP", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_BFD", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ICMP", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_IGMP", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_IPV4", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_IPV6", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_NONE", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_P_1588", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_RARP", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UDP", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_ETAG", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_ITAG", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_L2", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_NONE", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_OTAG", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_VNTAG", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ARP", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_BFD", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GPE", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_NONE", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_RARP", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UDP", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN}, \
+    {"INGRESS_PKT_SYS_HDR_LOOPBACK", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK}, \
+    {"INGRESS_PKT_SYS_HDR_NONE", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE}, \
+    {"rxpmd_match_id_count", BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_COUNT}
+
+#endif /*! BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_MATCH_ID_DEFS_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_bcmpkt_flexhdr.h
new file mode 100644
index 000000000..c202e1e75
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_bcmpkt_flexhdr.h
@@ -0,0 +1,158 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) header.yml.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM56880_A0_NFA_2_1_7_0_BCMPKT_FLEXHDR_H
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_FLEXHDR_H
+
+#include <bcmpkt/bcmpkt_flexhdr_internal.h>
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ARP_T                         0
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_AUTHEN_T                      1
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T                         2
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_0_T            3
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_1_T            4
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_DEST_OPTION_T                 5
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T           6
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_SUBHDR_5_T            7
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ESP_T                         8
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ETAG_T                        9
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ETHERTYPE_T                   10
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_FRAG_T                        11
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T            12
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GPE_T                         13
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_CHKSUM_T                  14
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_KEY_T                     15
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_ROUT_T                    16
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_SEQ_T                     17
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_T                         18
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GTP_12BYTE_T                  19
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GTP_8BYTE_T                   20
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_HOP_BY_HOP_T                  21
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ICMP_T                        22
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IGMP_T                        23
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPFIX_T                       24
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV4_T                        25
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV6_T                        26
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_L2_T                          27
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_MIRROR_ERSPAN_SN_T            28
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_MIRROR_TRANSPORT_T            29
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_ACH_T                    30
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_BV_T                     31
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_CW_T                     32
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_T                        33
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_OPAQUETAG_T                   34
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T                      35
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PROG_EXT_HDR_T                36
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_0_T                     37
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_1_T                     38
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T      39
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T      40
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RARP_T                        41
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ROUTING_T                     42
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RSPAN_T                       43
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_0_T                44
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_1_T                45
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_2_T                46
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_SNAP_LLC_T                    47
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_TCP_FIRST_4BYTES_T            48
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_TCP_LAST_16BYTES_T            49
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_UDP_T                         50
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L3_T                  51
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L4_T                  52
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L5_T                  53
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_VLAN_T                        54
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_VNTAG_T                       55
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_VXLAN_T                       56
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_WESP_T                        57
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_T                  58
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_FLEXHDR_COUNT    59
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_FLEXHDR_NAME_MAP_INIT \
+    {"arp_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ARP_T},\
+    {"authen_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_AUTHEN_T},\
+    {"bfd_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T},\
+    {"cpu_composites_0_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_0_T},\
+    {"cpu_composites_1_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_1_T},\
+    {"dest_option_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_DEST_OPTION_T},\
+    {"erspan3_fixed_hdr_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T},\
+    {"erspan3_subhdr_5_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_SUBHDR_5_T},\
+    {"esp_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ESP_T},\
+    {"etag_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ETAG_T},\
+    {"ethertype_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ETHERTYPE_T},\
+    {"frag_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_FRAG_T},\
+    {"generic_loopback_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T},\
+    {"gpe_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GPE_T},\
+    {"gre_chksum_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_CHKSUM_T},\
+    {"gre_key_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_KEY_T},\
+    {"gre_rout_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_ROUT_T},\
+    {"gre_seq_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_SEQ_T},\
+    {"gre_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_T},\
+    {"gtp_12byte_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GTP_12BYTE_T},\
+    {"gtp_8byte_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GTP_8BYTE_T},\
+    {"hop_by_hop_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_HOP_BY_HOP_T},\
+    {"icmp_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ICMP_T},\
+    {"igmp_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IGMP_T},\
+    {"ipfix_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPFIX_T},\
+    {"ipv4_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV4_T},\
+    {"ipv6_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV6_T},\
+    {"l2_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_L2_T},\
+    {"mirror_erspan_sn_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_MIRROR_ERSPAN_SN_T},\
+    {"mirror_transport_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_MIRROR_TRANSPORT_T},\
+    {"mpls_ach_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_ACH_T},\
+    {"mpls_bv_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_BV_T},\
+    {"mpls_cw_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_CW_T},\
+    {"mpls_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_T},\
+    {"opaquetag_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_OPAQUETAG_T},\
+    {"p_1588_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T},\
+    {"prog_ext_hdr_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PROG_EXT_HDR_T},\
+    {"psamp_0_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_0_T},\
+    {"psamp_1_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_1_T},\
+    {"psamp_mirror_on_drop_0_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T},\
+    {"psamp_mirror_on_drop_1_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T},\
+    {"rarp_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RARP_T},\
+    {"routing_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ROUTING_T},\
+    {"rspan_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RSPAN_T},\
+    {"sflow_shim_0_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_0_T},\
+    {"sflow_shim_1_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_1_T},\
+    {"sflow_shim_2_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_2_T},\
+    {"snap_llc_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_SNAP_LLC_T},\
+    {"tcp_first_4bytes_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_TCP_FIRST_4BYTES_T},\
+    {"tcp_last_16bytes_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_TCP_LAST_16BYTES_T},\
+    {"udp_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_UDP_T},\
+    {"unknown_l3_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L3_T},\
+    {"unknown_l4_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L4_T},\
+    {"unknown_l5_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L5_T},\
+    {"vlan_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_VLAN_T},\
+    {"vntag_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_VNTAG_T},\
+    {"vxlan_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_VXLAN_T},\
+    {"wesp_t", BCM56880_A0_NFA_2_1_7_0_BCMPKT_WESP_T},\
+    {"RXPMD_FLEX_T", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_T},\
+    {"flexhdr count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_FLEXHDR_COUNT}
+
+#endif /* BCM56880_A0_NFA_2_1_7_0_BCMPKT_FLEXHDR_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_bcmpkt_flexhdr_data.h
new file mode 100644
index 000000000..f69e4f64c
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_bcmpkt_flexhdr_data.h
@@ -0,0 +1,1126 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) header.yml.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM56880_A0_NFA_2_1_7_0_BCMPKT_FLEXHDR_DATA_H
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_FLEXHDR_DATA_H
+
+/*!
+ * \name ARP_T field IDs.
+ */
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ARP_T_HARDWARE_LEN  0
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ARP_T_HARDWARE_TYPE 1
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ARP_T_OPERATION     2
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ARP_T_PROT_ADDR_LEN 3
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ARP_T_PROTOCOL_TYPE 4
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ARP_T_SENDER_HA     5
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ARP_T_SENDER_IP     6
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ARP_T_TARGET_HA     7
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ARP_T_TARGET_IP     8
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ARP_T_FID_COUNT          9
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT \
+    {"HARDWARE_LEN", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ARP_T_HARDWARE_LEN},\
+    {"HARDWARE_TYPE", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ARP_T_HARDWARE_TYPE},\
+    {"OPERATION", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ARP_T_OPERATION},\
+    {"PROT_ADDR_LEN", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ARP_T_PROT_ADDR_LEN},\
+    {"PROTOCOL_TYPE", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ARP_T_PROTOCOL_TYPE},\
+    {"SENDER_HA", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ARP_T_SENDER_HA},\
+    {"SENDER_IP", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ARP_T_SENDER_IP},\
+    {"TARGET_HA", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ARP_T_TARGET_HA},\
+    {"TARGET_IP", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ARP_T_TARGET_IP},\
+    {"arp_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ARP_T_FID_COUNT}
+
+/*!
+ * \name AUTHEN_T field IDs.
+ */
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_AUTHEN_T_DATA        0
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_AUTHEN_T_NEXT_HEADER 1
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_AUTHEN_T_PAYLOAD_LEN 2
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_AUTHEN_T_RESERVED    3
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_AUTHEN_T_SEQ_NUM     4
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_AUTHEN_T_SPI         5
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_AUTHEN_T_FID_COUNT          6
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT \
+    {"DATA", BCM56880_A0_NFA_2_1_7_0_BCMPKT_AUTHEN_T_DATA},\
+    {"NEXT_HEADER", BCM56880_A0_NFA_2_1_7_0_BCMPKT_AUTHEN_T_NEXT_HEADER},\
+    {"PAYLOAD_LEN", BCM56880_A0_NFA_2_1_7_0_BCMPKT_AUTHEN_T_PAYLOAD_LEN},\
+    {"RESERVED", BCM56880_A0_NFA_2_1_7_0_BCMPKT_AUTHEN_T_RESERVED},\
+    {"SEQ_NUM", BCM56880_A0_NFA_2_1_7_0_BCMPKT_AUTHEN_T_SEQ_NUM},\
+    {"SPI", BCM56880_A0_NFA_2_1_7_0_BCMPKT_AUTHEN_T_SPI},\
+    {"authen_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_AUTHEN_T_FID_COUNT}
+
+/*!
+ * \name BFD_T field IDs.
+ */
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_AP            0
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_BFD_LENGTH    1
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_CPI           2
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_DEM           3
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_DESMINTXINTV  4
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_DETECTMULT    5
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_DIAG          6
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_FIN           7
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_MINECHORXINTV 8
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_MPT           9
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_MYDISCRIM     10
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_POLL          11
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_REQMINRXINTV  12
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_STA           13
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_URDISCRIM     14
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_VERSION       15
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_FID_COUNT          16
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT \
+    {"AP", BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_AP},\
+    {"BFD_LENGTH", BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_BFD_LENGTH},\
+    {"CPI", BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_CPI},\
+    {"DEM", BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_DEM},\
+    {"DESMINTXINTV", BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_DESMINTXINTV},\
+    {"DETECTMULT", BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_DETECTMULT},\
+    {"DIAG", BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_DIAG},\
+    {"FIN", BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_FIN},\
+    {"MINECHORXINTV", BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_MINECHORXINTV},\
+    {"MPT", BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_MPT},\
+    {"MYDISCRIM", BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_MYDISCRIM},\
+    {"POLL", BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_POLL},\
+    {"REQMINRXINTV", BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_REQMINRXINTV},\
+    {"STA", BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_STA},\
+    {"URDISCRIM", BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_URDISCRIM},\
+    {"VERSION", BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_VERSION},\
+    {"bfd_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_FID_COUNT}
+
+/*!
+ * \name CPU_COMPOSITES_0_T field IDs.
+ */
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0 0
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1 1
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2 2
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3 3
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4 4
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5 5
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6 6
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT          7
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT \
+    {"DMA_CONT0", BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0},\
+    {"DMA_CONT1", BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1},\
+    {"DMA_CONT2", BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2},\
+    {"DMA_CONT3", BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3},\
+    {"DMA_CONT4", BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4},\
+    {"DMA_CONT5", BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5},\
+    {"DMA_CONT6", BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6},\
+    {"cpu_composites_0_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT}
+
+/*!
+ * \name CPU_COMPOSITES_1_T field IDs.
+ */
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10 0
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11 1
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12 2
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13 3
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14 4
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15 5
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16 6
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17 7
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7  8
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8  9
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9  10
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT          11
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT \
+    {"DMA_CONT10", BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10},\
+    {"DMA_CONT11", BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11},\
+    {"DMA_CONT12", BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12},\
+    {"DMA_CONT13", BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13},\
+    {"DMA_CONT14", BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14},\
+    {"DMA_CONT15", BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15},\
+    {"DMA_CONT16", BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16},\
+    {"DMA_CONT17", BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17},\
+    {"DMA_CONT7", BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7},\
+    {"DMA_CONT8", BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8},\
+    {"DMA_CONT9", BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9},\
+    {"cpu_composites_1_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT}
+
+/*!
+ * \name DEST_OPTION_T field IDs.
+ */
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN 0
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_DEST_OPTION_T_NEXT_HEADER 1
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_DEST_OPTION_T_OPTION      2
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_DEST_OPTION_T_FID_COUNT          3
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT \
+    {"HDR_EXT_LEN", BCM56880_A0_NFA_2_1_7_0_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN},\
+    {"NEXT_HEADER", BCM56880_A0_NFA_2_1_7_0_BCMPKT_DEST_OPTION_T_NEXT_HEADER},\
+    {"OPTION", BCM56880_A0_NFA_2_1_7_0_BCMPKT_DEST_OPTION_T_OPTION},\
+    {"dest_option_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_DEST_OPTION_T_FID_COUNT}
+
+/*!
+ * \name ERSPAN3_FIXED_HDR_T field IDs.
+ */
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO               0
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS               1
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID           2
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O 3
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID        4
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T                 5
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP         6
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER               7
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN              8
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT          9
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT \
+    {"BSO", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO},\
+    {"COS", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS},\
+    {"GBP_SID", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID},\
+    {"P_FT_HWID_D_GRA_O", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O},\
+    {"SESSION_ID", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID},\
+    {"T", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T},\
+    {"TIMESTAMP", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP},\
+    {"VER", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER},\
+    {"VLAN", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN},\
+    {"erspan3_fixed_hdr_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT}
+
+/*!
+ * \name ERSPAN3_SUBHDR_5_T field IDs.
+ */
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID 0
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID     1
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID   2
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP   3
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT          4
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT \
+    {"PLATFORM_ID", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID},\
+    {"PORT_ID", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID},\
+    {"SWITCH_ID", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID},\
+    {"TIMESTAMP", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP},\
+    {"erspan3_subhdr_5_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT}
+
+/*!
+ * \name ESP_T field IDs.
+ */
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ESP_T_NEXT_HEADER 0
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ESP_T_PAD         1
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ESP_T_PAD_LEN     2
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ESP_T_SEQ_NUM     3
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ESP_T_SPI         4
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ESP_T_FID_COUNT          5
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT \
+    {"NEXT_HEADER", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ESP_T_NEXT_HEADER},\
+    {"PAD", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ESP_T_PAD},\
+    {"PAD_LEN", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ESP_T_PAD_LEN},\
+    {"SEQ_NUM", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ESP_T_SEQ_NUM},\
+    {"SPI", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ESP_T_SPI},\
+    {"esp_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ESP_T_FID_COUNT}
+
+/*!
+ * \name ETAG_T field IDs.
+ */
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ETAG_T_PCP_DEI 0
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ETAG_T_RSRVD0  1
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ETAG_T_RSRVD1  2
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ETAG_T_SVID    3
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ETAG_T_TPID    4
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ETAG_T_VID     5
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ETAG_T_FID_COUNT          6
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ETAG_T_FIELD_NAME_MAP_INIT \
+    {"PCP_DEI", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ETAG_T_PCP_DEI},\
+    {"RSRVD0", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ETAG_T_RSRVD0},\
+    {"RSRVD1", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ETAG_T_RSRVD1},\
+    {"SVID", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ETAG_T_SVID},\
+    {"TPID", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ETAG_T_TPID},\
+    {"VID", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ETAG_T_VID},\
+    {"etag_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ETAG_T_FID_COUNT}
+
+/*!
+ * \name ETHERTYPE_T field IDs.
+ */
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ETHERTYPE_T_TYPE 0
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ETHERTYPE_T_FID_COUNT          1
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT \
+    {"TYPE", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ETHERTYPE_T_TYPE},\
+    {"ethertype_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ETHERTYPE_T_FID_COUNT}
+
+/*!
+ * \name FRAG_T field IDs.
+ */
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_FRAG_T_FRAG_INFO   0
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_FRAG_T_ID          1
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_FRAG_T_NEXT_HEADER 2
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_FRAG_T_RESERVED    3
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_FRAG_T_FID_COUNT          4
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT \
+    {"FRAG_INFO", BCM56880_A0_NFA_2_1_7_0_BCMPKT_FRAG_T_FRAG_INFO},\
+    {"ID", BCM56880_A0_NFA_2_1_7_0_BCMPKT_FRAG_T_ID},\
+    {"NEXT_HEADER", BCM56880_A0_NFA_2_1_7_0_BCMPKT_FRAG_T_NEXT_HEADER},\
+    {"RESERVED", BCM56880_A0_NFA_2_1_7_0_BCMPKT_FRAG_T_RESERVED},\
+    {"frag_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_FRAG_T_FID_COUNT}
+
+/*!
+ * \name GENERIC_LOOPBACK_T field IDs.
+ */
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ    0
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE   1
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ        2
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS              3
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE        4
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY     5
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL     6
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ      7
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0  8
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1  9
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ            10
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1         11
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2         12
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT 13
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE         14
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT          15
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT \
+    {"DESTINATION_OBJ", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ},\
+    {"DESTINATION_TYPE", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE},\
+    {"ENTROPY_OBJ", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ},\
+    {"FLAGS", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS},\
+    {"HEADER_TYPE", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE},\
+    {"INPUT_PRIORITY", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY},\
+    {"INTERFACE_CTRL", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL},\
+    {"INTERFACE_OBJ", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ},\
+    {"PROCESSING_CTRL_0", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0},\
+    {"PROCESSING_CTRL_1", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1},\
+    {"QOS_OBJ", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ},\
+    {"RESERVED_1", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1},\
+    {"RESERVED_2", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2},\
+    {"SOURCE_SYSTEM_PORT", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT},\
+    {"START_BYTE", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE},\
+    {"generic_loopback_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT}
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NO_OP       0
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2_OIF      1
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED    2
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__VP          3
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP        4
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NHOP        5
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2MC_GROUP  6
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L3MC_GROUP  7
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED_1  8
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP_MEMBER 9
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__DEVICE_PORT 10
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__TUNNEL  0
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__GENERIC 1
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__NOOP   0
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__VFI    1
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__L3_IIF 2
+
+/*!
+ * \name GPE_T field IDs.
+ */
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GPE_T_FLAGS         0
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GPE_T_NEXT_PROTOCOL 1
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GPE_T_RESERVED0     2
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GPE_T_RESERVED1     3
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GPE_T_VNI           4
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GPE_T_FID_COUNT          5
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT \
+    {"FLAGS", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GPE_T_FLAGS},\
+    {"NEXT_PROTOCOL", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GPE_T_NEXT_PROTOCOL},\
+    {"RESERVED0", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GPE_T_RESERVED0},\
+    {"RESERVED1", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GPE_T_RESERVED1},\
+    {"VNI", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GPE_T_VNI},\
+    {"gpe_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GPE_T_FID_COUNT}
+
+/*!
+ * \name GRE_CHKSUM_T field IDs.
+ */
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_CHKSUM_T_CHECKSUM 0
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_CHKSUM_T_OFFSET   1
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT          2
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT \
+    {"CHECKSUM", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_CHKSUM_T_CHECKSUM},\
+    {"OFFSET", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_CHKSUM_T_OFFSET},\
+    {"gre_chksum_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT}
+
+/*!
+ * \name GRE_KEY_T field IDs.
+ */
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_KEY_T_VN_ID_LOWER_ENTROPY 0
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_KEY_T_VN_ID_UPPER         1
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_KEY_T_FID_COUNT          2
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT \
+    {"VN_ID_LOWER_ENTROPY", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_KEY_T_VN_ID_LOWER_ENTROPY},\
+    {"VN_ID_UPPER", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_KEY_T_VN_ID_UPPER},\
+    {"gre_key_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_KEY_T_FID_COUNT}
+
+/*!
+ * \name GRE_ROUT_T field IDs.
+ */
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_ROUT_T_ROUTING 0
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_ROUT_T_FID_COUNT          1
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT \
+    {"ROUTING", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_ROUT_T_ROUTING},\
+    {"gre_rout_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_ROUT_T_FID_COUNT}
+
+/*!
+ * \name GRE_SEQ_T field IDs.
+ */
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_SEQ_T_SEQUENCE 0
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_SEQ_T_FID_COUNT          1
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT \
+    {"SEQUENCE", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_SEQ_T_SEQUENCE},\
+    {"gre_seq_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_SEQ_T_FID_COUNT}
+
+/*!
+ * \name GRE_T field IDs.
+ */
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_T_C_R_K_S  0
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_T_PROTOCOL 1
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_T_RESERVED 2
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_T_VERSION  3
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_T_FID_COUNT          4
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT \
+    {"C_R_K_S", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_T_C_R_K_S},\
+    {"PROTOCOL", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_T_PROTOCOL},\
+    {"RESERVED", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_T_RESERVED},\
+    {"VERSION", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_T_VERSION},\
+    {"gre_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_T_FID_COUNT}
+
+/*!
+ * \name GTP_12BYTE_T field IDs.
+ */
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GTP_12BYTE_T_BYTES_11_8 0
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GTP_12BYTE_T_BYTES_3_0  1
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GTP_12BYTE_T_BYTES_7_4  2
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GTP_12BYTE_T_FID_COUNT          3
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GTP_12BYTE_T_FIELD_NAME_MAP_INIT \
+    {"BYTES_11_8", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GTP_12BYTE_T_BYTES_11_8},\
+    {"BYTES_3_0", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GTP_12BYTE_T_BYTES_3_0},\
+    {"BYTES_7_4", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GTP_12BYTE_T_BYTES_7_4},\
+    {"gtp_12byte_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GTP_12BYTE_T_FID_COUNT}
+
+/*!
+ * \name GTP_8BYTE_T field IDs.
+ */
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GTP_8BYTE_T_BYTES_3_0 0
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GTP_8BYTE_T_BYTES_7_4 1
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GTP_8BYTE_T_FID_COUNT          2
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_GTP_8BYTE_T_FIELD_NAME_MAP_INIT \
+    {"BYTES_3_0", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GTP_8BYTE_T_BYTES_3_0},\
+    {"BYTES_7_4", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GTP_8BYTE_T_BYTES_7_4},\
+    {"gtp_8byte_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_GTP_8BYTE_T_FID_COUNT}
+
+/*!
+ * \name HOP_BY_HOP_T field IDs.
+ */
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN 0
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER 1
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_HOP_BY_HOP_T_OPTION      2
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT          3
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT \
+    {"HDR_EXT_LEN", BCM56880_A0_NFA_2_1_7_0_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN},\
+    {"NEXT_HEADER", BCM56880_A0_NFA_2_1_7_0_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER},\
+    {"OPTION", BCM56880_A0_NFA_2_1_7_0_BCMPKT_HOP_BY_HOP_T_OPTION},\
+    {"hop_by_hop_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT}
+
+/*!
+ * \name ICMP_T field IDs.
+ */
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ICMP_T_CHECKSUM  0
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ICMP_T_CODE      1
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ICMP_T_ICMP_TYPE 2
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ICMP_T_FID_COUNT          3
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT \
+    {"CHECKSUM", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ICMP_T_CHECKSUM},\
+    {"CODE", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ICMP_T_CODE},\
+    {"ICMP_TYPE", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ICMP_T_ICMP_TYPE},\
+    {"icmp_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ICMP_T_FID_COUNT}
+
+/*!
+ * \name IGMP_T field IDs.
+ */
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IGMP_T_CHECKSUM      0
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IGMP_T_GROUP_ADDRESS 1
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IGMP_T_IGMP_TYPE     2
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IGMP_T_MAX_RESP_TIME 3
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IGMP_T_FID_COUNT          4
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT \
+    {"CHECKSUM", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IGMP_T_CHECKSUM},\
+    {"GROUP_ADDRESS", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IGMP_T_GROUP_ADDRESS},\
+    {"IGMP_TYPE", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IGMP_T_IGMP_TYPE},\
+    {"MAX_RESP_TIME", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IGMP_T_MAX_RESP_TIME},\
+    {"igmp_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IGMP_T_FID_COUNT}
+
+/*!
+ * \name IPFIX_T field IDs.
+ */
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPFIX_T_EXPORT_TIME   0
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPFIX_T_LENGTH        1
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID 2
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPFIX_T_SEQUENCE_NUM  3
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPFIX_T_VERSION       4
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPFIX_T_FID_COUNT          5
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT \
+    {"EXPORT_TIME", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPFIX_T_EXPORT_TIME},\
+    {"LENGTH", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPFIX_T_LENGTH},\
+    {"OBS_DOMAIN_ID", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID},\
+    {"SEQUENCE_NUM", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPFIX_T_SEQUENCE_NUM},\
+    {"VERSION", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPFIX_T_VERSION},\
+    {"ipfix_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPFIX_T_FID_COUNT}
+
+/*!
+ * \name IPV4_T field IDs.
+ */
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV4_T_DA                0
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET 1
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV4_T_HDR_CHECKSUM      2
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV4_T_ID                3
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV4_T_OPTION            4
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV4_T_PROTOCOL          5
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV4_T_SA                6
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV4_T_TOS               7
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV4_T_TOTAL_LENGTH      8
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV4_T_TTL               9
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV4_T_VERSION_HDR_LEN   10
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV4_T_FID_COUNT          11
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT \
+    {"DA", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV4_T_DA},\
+    {"FLAGS_FRAG_OFFSET", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET},\
+    {"HDR_CHECKSUM", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV4_T_HDR_CHECKSUM},\
+    {"ID", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV4_T_ID},\
+    {"OPTION", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV4_T_OPTION},\
+    {"PROTOCOL", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV4_T_PROTOCOL},\
+    {"SA", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV4_T_SA},\
+    {"TOS", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV4_T_TOS},\
+    {"TOTAL_LENGTH", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV4_T_TOTAL_LENGTH},\
+    {"TTL", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV4_T_TTL},\
+    {"VERSION_HDR_LEN", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV4_T_VERSION_HDR_LEN},\
+    {"ipv4_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV4_T_FID_COUNT}
+
+/*!
+ * \name IPV6_T field IDs.
+ */
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV6_T_DA             0
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV6_T_FLOW_LABEL     1
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV6_T_HOP_LIMIT      2
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV6_T_NEXT_HEADER    3
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH 4
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV6_T_SA             5
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV6_T_TRAFFIC_CLASS  6
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV6_T_VERSION        7
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV6_T_FID_COUNT          8
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT \
+    {"DA", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV6_T_DA},\
+    {"FLOW_LABEL", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV6_T_FLOW_LABEL},\
+    {"HOP_LIMIT", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV6_T_HOP_LIMIT},\
+    {"NEXT_HEADER", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV6_T_NEXT_HEADER},\
+    {"PAYLOAD_LENGTH", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH},\
+    {"SA", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV6_T_SA},\
+    {"TRAFFIC_CLASS", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV6_T_TRAFFIC_CLASS},\
+    {"VERSION", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV6_T_VERSION},\
+    {"ipv6_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV6_T_FID_COUNT}
+
+/*!
+ * \name L2_T field IDs.
+ */
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_L2_T_MACDA 0
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_L2_T_MACSA 1
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_L2_T_FID_COUNT          2
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT \
+    {"MACDA", BCM56880_A0_NFA_2_1_7_0_BCMPKT_L2_T_MACDA},\
+    {"MACSA", BCM56880_A0_NFA_2_1_7_0_BCMPKT_L2_T_MACSA},\
+    {"l2_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_L2_T_FID_COUNT}
+
+/*!
+ * \name MIRROR_ERSPAN_SN_T field IDs.
+ */
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM 0
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT          1
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT \
+    {"SEQ_NUM", BCM56880_A0_NFA_2_1_7_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM},\
+    {"mirror_erspan_sn_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT}
+
+/*!
+ * \name MIRROR_TRANSPORT_T field IDs.
+ */
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_MIRROR_TRANSPORT_T_DATA 0
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT          1
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT \
+    {"DATA", BCM56880_A0_NFA_2_1_7_0_BCMPKT_MIRROR_TRANSPORT_T_DATA},\
+    {"mirror_transport_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT}
+
+/*!
+ * \name MPLS_ACH_T field IDs.
+ */
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE 0
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_ACH_T_CW_TYPE      1
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_ACH_T_RESERVED     2
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_ACH_T_VERSION      3
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_ACH_T_FID_COUNT          4
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT \
+    {"CHANNEL_TYPE", BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE},\
+    {"CW_TYPE", BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_ACH_T_CW_TYPE},\
+    {"RESERVED", BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_ACH_T_RESERVED},\
+    {"VERSION", BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_ACH_T_VERSION},\
+    {"mpls_ach_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_ACH_T_FID_COUNT}
+
+/*!
+ * \name MPLS_BV_T field IDs.
+ */
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_BV_T_VALUE 0
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_BV_T_FID_COUNT          1
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT \
+    {"VALUE", BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_BV_T_VALUE},\
+    {"mpls_bv_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_BV_T_FID_COUNT}
+
+/*!
+ * \name MPLS_CW_T field IDs.
+ */
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_CW_T_CW_TYPE    0
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_CW_T_RESERVED   1
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_CW_T_SEQ_NUMBER 2
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_CW_T_FID_COUNT          3
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT \
+    {"CW_TYPE", BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_CW_T_CW_TYPE},\
+    {"RESERVED", BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_CW_T_RESERVED},\
+    {"SEQ_NUMBER", BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_CW_T_SEQ_NUMBER},\
+    {"mpls_cw_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_CW_T_FID_COUNT}
+
+/*!
+ * \name MPLS_T field IDs.
+ */
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_T_BOS   0
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_T_EXP   1
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_T_LABEL 2
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_T_TTL   3
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_T_FID_COUNT          4
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT \
+    {"BOS", BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_T_BOS},\
+    {"EXP", BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_T_EXP},\
+    {"LABEL", BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_T_LABEL},\
+    {"TTL", BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_T_TTL},\
+    {"mpls_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_T_FID_COUNT}
+
+/*!
+ * \name OPAQUETAG_T field IDs.
+ */
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_OPAQUETAG_T_TPID     0
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_OPAQUETAG_T_VLAN_TAG 1
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_OPAQUETAG_T_FID_COUNT          2
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_OPAQUETAG_T_FIELD_NAME_MAP_INIT \
+    {"TPID", BCM56880_A0_NFA_2_1_7_0_BCMPKT_OPAQUETAG_T_TPID},\
+    {"VLAN_TAG", BCM56880_A0_NFA_2_1_7_0_BCMPKT_OPAQUETAG_T_VLAN_TAG},\
+    {"opaquetag_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_OPAQUETAG_T_FID_COUNT}
+
+/*!
+ * \name P_1588_T field IDs.
+ */
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T_CNTRL          0
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T_CORRECTION     1
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T_DOMAIN_NB      2
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T_FLAGS          3
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T_LOGMSGINTERVAL 4
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T_MSG_LENGTH     5
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T_MSG_TYPE       6
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T_RESERVED1      7
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T_RESERVED2      8
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T_RESERVED3      9
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T_SEQ_ID         10
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T_SRCPORTID      11
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T_TRANSPORTSPEC  12
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T_VERSION        13
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T_FID_COUNT          14
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT \
+    {"CNTRL", BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T_CNTRL},\
+    {"CORRECTION", BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T_CORRECTION},\
+    {"DOMAIN_NB", BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T_DOMAIN_NB},\
+    {"FLAGS", BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T_FLAGS},\
+    {"LOGMSGINTERVAL", BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T_LOGMSGINTERVAL},\
+    {"MSG_LENGTH", BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T_MSG_LENGTH},\
+    {"MSG_TYPE", BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T_MSG_TYPE},\
+    {"RESERVED1", BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T_RESERVED1},\
+    {"RESERVED2", BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T_RESERVED2},\
+    {"RESERVED3", BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T_RESERVED3},\
+    {"SEQ_ID", BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T_SEQ_ID},\
+    {"SRCPORTID", BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T_SRCPORTID},\
+    {"TRANSPORTSPEC", BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T_TRANSPORTSPEC},\
+    {"VERSION", BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T_VERSION},\
+    {"p_1588_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T_FID_COUNT}
+
+/*!
+ * \name PROG_EXT_HDR_T field IDs.
+ */
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN 0
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER 1
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PROG_EXT_HDR_T_OPTION      2
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT          3
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT \
+    {"HDR_EXT_LEN", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN},\
+    {"NEXT_HEADER", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER},\
+    {"OPTION", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PROG_EXT_HDR_T_OPTION},\
+    {"prog_ext_hdr_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_0_T field IDs.
+ */
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_0_T_FLOWSET        0
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_0_T_LENGTH         1
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX 2
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_0_T_OBS_TIME_NS    3
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_0_T_OBS_TIME_S     4
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_0_T_TEMPLATE_ID    5
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_0_T_FID_COUNT          6
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT \
+    {"FLOWSET", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_0_T_FLOWSET},\
+    {"LENGTH", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_0_T_LENGTH},\
+    {"NEXT_HOP_INDEX", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX},\
+    {"OBS_TIME_NS", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_0_T_OBS_TIME_NS},\
+    {"OBS_TIME_S", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_0_T_OBS_TIME_S},\
+    {"TEMPLATE_ID", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_0_T_TEMPLATE_ID},\
+    {"psamp_0_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_0_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_1_T field IDs.
+ */
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_1_T_DLB_ID         0
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_1_T_EGRESS_PORT    1
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_1_T_EPOCH          2
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_1_T_INGRESS_PORT   3
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH 4
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_1_T_USER_META_DATA 5
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_1_T_VARIABLE_FLAG  6
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_1_T_FID_COUNT          7
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT \
+    {"DLB_ID", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_1_T_DLB_ID},\
+    {"EGRESS_PORT", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_1_T_EGRESS_PORT},\
+    {"EPOCH", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_1_T_EPOCH},\
+    {"INGRESS_PORT", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_1_T_INGRESS_PORT},\
+    {"SAMPLED_LENGTH", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH},\
+    {"USER_META_DATA", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_1_T_USER_META_DATA},\
+    {"VARIABLE_FLAG", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_1_T_VARIABLE_FLAG},\
+    {"psamp_1_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_1_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_MIRROR_ON_DROP_0_T field IDs.
+ */
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT 0
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT    1
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH          2
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS     3
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S      4
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID       5
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID     6
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT          7
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT \
+    {"EGRESS_MOD_PORT", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT},\
+    {"INGRESS_PORT", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT},\
+    {"LENGTH", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH},\
+    {"OBS_TIME_NS", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS},\
+    {"OBS_TIME_S", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S},\
+    {"SWITCH_ID", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID},\
+    {"TEMPLATE_ID", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID},\
+    {"psamp_mirror_on_drop_0_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_MIRROR_ON_DROP_1_T field IDs.
+ */
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_ING_DROP_REASON    0
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MIRROR_ON_DROP_OBJ 1
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MMU_DROP_CTRL      2
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_SAMPLED_LENGTH     3
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_USER_META_DATA     4
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_VAR_LEN_INDICATOR  5
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT          6
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FIELD_NAME_MAP_INIT \
+    {"ING_DROP_REASON", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_ING_DROP_REASON},\
+    {"MIRROR_ON_DROP_OBJ", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MIRROR_ON_DROP_OBJ},\
+    {"MMU_DROP_CTRL", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MMU_DROP_CTRL},\
+    {"SAMPLED_LENGTH", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_SAMPLED_LENGTH},\
+    {"USER_META_DATA", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_USER_META_DATA},\
+    {"VAR_LEN_INDICATOR", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_VAR_LEN_INDICATOR},\
+    {"psamp_mirror_on_drop_1_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT}
+
+/*!
+ * \name RARP_T field IDs.
+ */
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RARP_T_HARDWARE_LEN  0
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RARP_T_HARDWARE_TYPE 1
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RARP_T_OPERATION     2
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RARP_T_PROT_ADDR_LEN 3
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RARP_T_PROTOCOL_TYPE 4
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RARP_T_SENDER_HA     5
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RARP_T_SENDER_IP     6
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RARP_T_TARGET_HA     7
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RARP_T_TARGET_IP     8
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RARP_T_FID_COUNT          9
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT \
+    {"HARDWARE_LEN", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RARP_T_HARDWARE_LEN},\
+    {"HARDWARE_TYPE", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RARP_T_HARDWARE_TYPE},\
+    {"OPERATION", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RARP_T_OPERATION},\
+    {"PROT_ADDR_LEN", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RARP_T_PROT_ADDR_LEN},\
+    {"PROTOCOL_TYPE", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RARP_T_PROTOCOL_TYPE},\
+    {"SENDER_HA", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RARP_T_SENDER_HA},\
+    {"SENDER_IP", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RARP_T_SENDER_IP},\
+    {"TARGET_HA", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RARP_T_TARGET_HA},\
+    {"TARGET_IP", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RARP_T_TARGET_IP},\
+    {"rarp_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RARP_T_FID_COUNT}
+
+/*!
+ * \name ROUTING_T field IDs.
+ */
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ROUTING_T_DATA          0
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ROUTING_T_HDR_EXT_LEN   1
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ROUTING_T_NEXT_HEADER   2
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ROUTING_T_ROUTING_TYPE  3
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ROUTING_T_SEGMENTS_LEFT 4
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ROUTING_T_FID_COUNT          5
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT \
+    {"DATA", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ROUTING_T_DATA},\
+    {"HDR_EXT_LEN", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ROUTING_T_HDR_EXT_LEN},\
+    {"NEXT_HEADER", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ROUTING_T_NEXT_HEADER},\
+    {"ROUTING_TYPE", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ROUTING_T_ROUTING_TYPE},\
+    {"SEGMENTS_LEFT", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ROUTING_T_SEGMENTS_LEFT},\
+    {"routing_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_ROUTING_T_FID_COUNT}
+
+/*!
+ * \name RSPAN_T field IDs.
+ */
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RSPAN_T_TAG  0
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RSPAN_T_TPID 1
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RSPAN_T_FID_COUNT          2
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT \
+    {"TAG", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RSPAN_T_TAG},\
+    {"TPID", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RSPAN_T_TPID},\
+    {"rspan_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RSPAN_T_FID_COUNT}
+
+/*!
+ * \name SFLOW_SHIM_0_T field IDs.
+ */
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION 0
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE      1
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_0_T_VERSION         2
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT          3
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT \
+    {"SYS_DESTINATION", BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION},\
+    {"SYS_SOURCE", BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE},\
+    {"VERSION", BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_0_T_VERSION},\
+    {"sflow_shim_0_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT}
+
+/*!
+ * \name SFLOW_SHIM_1_T field IDs.
+ */
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE 0
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED   1
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE 2
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST       3
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE  4
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED   5
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED         6
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE       7
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT          8
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT \
+    {"FLAG_DEST_SAMPLE", BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE},\
+    {"FLAG_DISCARDED", BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED},\
+    {"FLAG_FLEX_SAMPLE", BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE},\
+    {"FLAG_MCAST", BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST},\
+    {"FLAG_SRC_SAMPLE", BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE},\
+    {"FLAG_TRUNCATED", BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED},\
+    {"RESERVED", BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED},\
+    {"SYS_OPCODE", BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE},\
+    {"sflow_shim_1_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT}
+
+/*!
+ * \name SFLOW_SHIM_2_T field IDs.
+ */
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM   0
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA 1
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT          2
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT \
+    {"SEQUENCE_NUM", BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM},\
+    {"USER_META_DATA", BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA},\
+    {"sflow_shim_2_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT}
+
+/*!
+ * \name SNAP_LLC_T field IDs.
+ */
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_SNAP_LLC_T_LENGTH   0
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_SNAP_LLC_T_SNAP_LLC 1
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_SNAP_LLC_T_FID_COUNT          2
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT \
+    {"LENGTH", BCM56880_A0_NFA_2_1_7_0_BCMPKT_SNAP_LLC_T_LENGTH},\
+    {"SNAP_LLC", BCM56880_A0_NFA_2_1_7_0_BCMPKT_SNAP_LLC_T_SNAP_LLC},\
+    {"snap_llc_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_SNAP_LLC_T_FID_COUNT}
+
+/*!
+ * \name TCP_FIRST_4BYTES_T field IDs.
+ */
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT 0
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT 1
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT          2
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT \
+    {"DST_PORT", BCM56880_A0_NFA_2_1_7_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT},\
+    {"SRC_PORT", BCM56880_A0_NFA_2_1_7_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT},\
+    {"tcp_first_4bytes_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT}
+
+/*!
+ * \name TCP_LAST_16BYTES_T field IDs.
+ */
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM           0
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM          1
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS 2
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM           3
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR        4
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE          5
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT          6
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT \
+    {"ACK_NUM", BCM56880_A0_NFA_2_1_7_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM},\
+    {"CHECKSUM", BCM56880_A0_NFA_2_1_7_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM},\
+    {"HDR_LEN_AND_FLAGS", BCM56880_A0_NFA_2_1_7_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS},\
+    {"SEQ_NUM", BCM56880_A0_NFA_2_1_7_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM},\
+    {"URGENT_PTR", BCM56880_A0_NFA_2_1_7_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR},\
+    {"WIN_SIZE", BCM56880_A0_NFA_2_1_7_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE},\
+    {"tcp_last_16bytes_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT}
+
+/*!
+ * \name UDP_T field IDs.
+ */
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_UDP_T_CHECKSUM   0
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_UDP_T_DST_PORT   1
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_UDP_T_SRC_PORT   2
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_UDP_T_UDP_LENGTH 3
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_UDP_T_FID_COUNT          4
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT \
+    {"CHECKSUM", BCM56880_A0_NFA_2_1_7_0_BCMPKT_UDP_T_CHECKSUM},\
+    {"DST_PORT", BCM56880_A0_NFA_2_1_7_0_BCMPKT_UDP_T_DST_PORT},\
+    {"SRC_PORT", BCM56880_A0_NFA_2_1_7_0_BCMPKT_UDP_T_SRC_PORT},\
+    {"UDP_LENGTH", BCM56880_A0_NFA_2_1_7_0_BCMPKT_UDP_T_UDP_LENGTH},\
+    {"udp_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_UDP_T_FID_COUNT}
+
+/*!
+ * \name UNKNOWN_L3_T field IDs.
+ */
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD 0
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD  1
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT          2
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT \
+    {"FIRST_16BYTES_OF_L3_PAYLOAD", BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD},\
+    {"NEXT_16BYTES_OF_L3_PAYLOAD", BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD},\
+    {"unknown_l3_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT}
+
+/*!
+ * \name UNKNOWN_L4_T field IDs.
+ */
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD 0
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT          1
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT \
+    {"FIRST_4BYTES_OF_L4_PAYLOAD", BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD},\
+    {"unknown_l4_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT}
+
+/*!
+ * \name UNKNOWN_L5_T field IDs.
+ */
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1 0
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3 1
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7 2
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT          3
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT \
+    {"L5_BYTES_0_1", BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1},\
+    {"L5_BYTES_2_3", BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3},\
+    {"L5_BYTES_4_7", BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7},\
+    {"unknown_l5_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT}
+
+/*!
+ * \name VLAN_T field IDs.
+ */
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_VLAN_T_CFI  0
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_VLAN_T_PCP  1
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_VLAN_T_TPID 2
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_VLAN_T_VID  3
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_VLAN_T_FID_COUNT          4
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT \
+    {"CFI", BCM56880_A0_NFA_2_1_7_0_BCMPKT_VLAN_T_CFI},\
+    {"PCP", BCM56880_A0_NFA_2_1_7_0_BCMPKT_VLAN_T_PCP},\
+    {"TPID", BCM56880_A0_NFA_2_1_7_0_BCMPKT_VLAN_T_TPID},\
+    {"VID", BCM56880_A0_NFA_2_1_7_0_BCMPKT_VLAN_T_VID},\
+    {"vlan_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_VLAN_T_FID_COUNT}
+
+/*!
+ * \name VNTAG_T field IDs.
+ */
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_VNTAG_T_TAG  0
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_VNTAG_T_TPID 1
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_VNTAG_T_FID_COUNT          2
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_VNTAG_T_FIELD_NAME_MAP_INIT \
+    {"TAG", BCM56880_A0_NFA_2_1_7_0_BCMPKT_VNTAG_T_TAG},\
+    {"TPID", BCM56880_A0_NFA_2_1_7_0_BCMPKT_VNTAG_T_TPID},\
+    {"vntag_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_VNTAG_T_FID_COUNT}
+
+/*!
+ * \name VXLAN_T field IDs.
+ */
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1      0
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_VXLAN_T_VN_ID_LOWER_RESERVED2 1
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_VXLAN_T_VN_ID_UPPER           2
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_VXLAN_T_FID_COUNT          3
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT \
+    {"FLAGS_RESERVED_1", BCM56880_A0_NFA_2_1_7_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1},\
+    {"VN_ID_LOWER_RESERVED2", BCM56880_A0_NFA_2_1_7_0_BCMPKT_VXLAN_T_VN_ID_LOWER_RESERVED2},\
+    {"VN_ID_UPPER", BCM56880_A0_NFA_2_1_7_0_BCMPKT_VXLAN_T_VN_ID_UPPER},\
+    {"vxlan_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_VXLAN_T_FID_COUNT}
+
+/*!
+ * \name WESP_T field IDs.
+ */
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_WESP_T_FLAGS       0
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_WESP_T_HEADER_LEN  1
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_WESP_T_NEXT_HEADER 2
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_WESP_T_SEQ_NUM     3
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_WESP_T_SPI         4
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_WESP_T_TRAILER_LEN 5
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_WESP_T_WESP_IV     6
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_WESP_T_FID_COUNT          7
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT \
+    {"FLAGS", BCM56880_A0_NFA_2_1_7_0_BCMPKT_WESP_T_FLAGS},\
+    {"HEADER_LEN", BCM56880_A0_NFA_2_1_7_0_BCMPKT_WESP_T_HEADER_LEN},\
+    {"NEXT_HEADER", BCM56880_A0_NFA_2_1_7_0_BCMPKT_WESP_T_NEXT_HEADER},\
+    {"SEQ_NUM", BCM56880_A0_NFA_2_1_7_0_BCMPKT_WESP_T_SEQ_NUM},\
+    {"SPI", BCM56880_A0_NFA_2_1_7_0_BCMPKT_WESP_T_SPI},\
+    {"TRAILER_LEN", BCM56880_A0_NFA_2_1_7_0_BCMPKT_WESP_T_TRAILER_LEN},\
+    {"WESP_IV", BCM56880_A0_NFA_2_1_7_0_BCMPKT_WESP_T_WESP_IV},\
+    {"wesp_t fid count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_WESP_T_FID_COUNT}
+
+
+#endif /* BCM56880_A0_NFA_2_1_7_0_BCMPKT_FLEXHDR_DATA_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_bcmpkt_rxpmd_flex_data.h
new file mode 100644
index 000000000..078278c2e
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_bcmpkt_rxpmd_flex_data.h
@@ -0,0 +1,173 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) map.yml.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_DATA_H
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_DATA_H
+
+/*!
+ * \name RX flex metadata field IDs.
+ */
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0                      0
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0                                 1
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_DVP_15_0                                       2
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0                              3
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0                         4
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_0                        5
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32                       6
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0                              7
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0                      8
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_ING_ETAG_ACTION_3_0                            9
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_ING_ETAG_PCP_DEI_3_0                           10
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_ING_ETAG_VID_16_15_0                           11
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_0                             12
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0                            13
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0 14
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0                    15
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0                                    16
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_L2_IIF_10_0                                    17
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_L2_OIF_10_0                                    18
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0                                    19
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0                                  20
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_MPLS_LABEL_DECAP_COUNT_3_0                     21
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0              22
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0                              23
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0                            24
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0                            25
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_SVP_15_0                                       26
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0                   27
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0                        28
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0                              29
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_T_VLAN_TAG_VALUE_15_0                          30
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0                             31
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0                32
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_VFI_15_0                                       33
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0   34
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_FID_COUNT                       35
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_COUNT                    46
+
+/*!
+ * \name Packet Flex Reason Types.
+ */
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS                               0
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED 1
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED  2
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP                                  3
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT                                   4
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_IFP                                     5
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER                               6
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED      7
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT                                   8
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP                           9
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS                      10
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD                          11
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE                      12
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP                           13
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS                      14
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR                            15
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF                        16
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR                            17
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL                        18
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST                         19
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0                      20
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1                      21
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2                      22
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3                      23
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4                      24
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5                      25
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6                      26
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7                      27
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED                 28
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED              29
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED                  30
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU                    31
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU                          32
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_PE_RPF                                  33
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_PE_VID_FWD_MISS                         34
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_PE_VID_RPF_MISS                         35
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_PKT_ETAG_EXPECTED                       36
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_PKT_ETAG_UNEXPECTED                     37
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED              38
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT                            39
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP                                40
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED              41
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_SVP                                     42
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP                               43
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED                       44
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_VFP                                     45
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT \
+    {"CML_FLAGS", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS},\
+    {"DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED},\
+    {"DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED},\
+    {"DST_FP", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP},\
+    {"EM_FT", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT},\
+    {"IFP", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_IFP},\
+    {"IFP_METER", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER},\
+    {"IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED},\
+    {"IVXLT", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT},\
+    {"L2_DST_LOOKUP", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP},\
+    {"L2_DST_LOOKUP_MISS", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS},\
+    {"L2_SRC_DISCARD", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD},\
+    {"L2_SRC_STATIC_MOVE", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE},\
+    {"L3_DST_LOOKUP", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP},\
+    {"L3_DST_LOOKUP_MISS", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS},\
+    {"L3_HDR_ERROR", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR},\
+    {"L3_IIF_EQ_L3_OIF", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF},\
+    {"L3_TTL_ERROR", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR},\
+    {"LEARN_CACHE_FULL", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL},\
+    {"MACSA_MULTICAST", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST},\
+    {"MATCHED_RULE_BIT_0", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0},\
+    {"MATCHED_RULE_BIT_1", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1},\
+    {"MATCHED_RULE_BIT_2", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2},\
+    {"MATCHED_RULE_BIT_3", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3},\
+    {"MATCHED_RULE_BIT_4", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4},\
+    {"MATCHED_RULE_BIT_5", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5},\
+    {"MATCHED_RULE_BIT_6", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6},\
+    {"MATCHED_RULE_BIT_7", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7},\
+    {"MEMBERSHIP_CHECK_FAILED", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED},\
+    {"MIRROR_SAMPLER_EGR_SAMPLED", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED},\
+    {"MIRROR_SAMPLER_SAMPLED", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED},\
+    {"MPLS_CTRL_PKT_TO_CPU", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU},\
+    {"NO_COPY_TO_CPU", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU},\
+    {"PE_RPF", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_PE_RPF},\
+    {"PE_VID_FWD_MISS", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_PE_VID_FWD_MISS},\
+    {"PE_VID_RPF_MISS", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_PE_VID_RPF_MISS},\
+    {"PKT_ETAG_EXPECTED", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_PKT_ETAG_EXPECTED},\
+    {"PKT_ETAG_UNEXPECTED", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_PKT_ETAG_UNEXPECTED},\
+    {"PKT_INTEGRITY_CHECK_FAILED", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED},\
+    {"PROTOCOL_PKT", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT},\
+    {"SER_DROP", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP},\
+    {"SPANNING_TREE_CHECK_FAILED", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED},\
+    {"SVP", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_SVP},\
+    {"TRACE_DOP", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP},\
+    {"URPF_CHECK_FAILED", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED},\
+    {"VFP", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_VFP},\
+    {"flex reason count", BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_COUNT}
+
+#endif /* BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_DATA_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_bcmpkt_rxpmd_match_id_defs.h
new file mode 100644
index 000000000..577d595f4
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_bcmpkt_rxpmd_match_id_defs.h
@@ -0,0 +1,415 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) bcm56880_a0_nfa_2_1_7_0_sf_match_id_info.yml
+ * for device bcm56880_a0 and variant nfa_2_1_7_0.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H
+
+#include <bcmpkt/bcmpkt_rxpmd_match_id.h>
+
+/*!
+ * \brief Get the Match ID DataBase information.
+ *
+ * \retval bcmpkt_rxpmd_match_id_db_info_t Match ID DataBase information.
+*/
+extern bcmpkt_rxpmd_match_id_db_info_t *
+    bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db_info_get(void);
+
+/*!
+ * \brief Get the Match ID Mapping information.
+ *
+ * \retval bcmpkt_rxpmd_match_id_map_info_t Match ID Mapping information.
+*/
+extern bcmpkt_rxpmd_match_id_map_info_t *
+    bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_map_info_get(void);
+
+/*!
+  \name RXPMD Match IDs
+*/
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG  0
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG  1
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2  2
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE  3
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OPAQUETAG  4
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG  5
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_RSPAN  6
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC  7
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG  8
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP  9
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1  10
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2  11
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD  12
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT  13
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE  14
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1  15
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2  16
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE  17
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE  18
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM  19
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY  20
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT  21
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ  22
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_12BYTE  23
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_8BYTE  24
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP  25
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP  26
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4  27
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6  28
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0  29
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1  30
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2  31
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3  32
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4  33
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5  34
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6  35
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH  36
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW  37
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE  38
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588  39
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP  40
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES  41
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES  42
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP  43
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3  44
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4  45
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5  46
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN  47
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK  48
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE  49
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG  50
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG  51
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2  52
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE  53
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OPAQUETAG  54
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG  55
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_RSPAN  56
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC  57
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG  58
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP  59
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1  60
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2  61
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD  62
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT  63
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE  64
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1  65
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2  66
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE  67
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE  68
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM  69
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY  70
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT  71
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ  72
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_12BYTE  73
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_8BYTE  74
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP  75
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP  76
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4  77
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6  78
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0  79
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1  80
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2  81
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3  82
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4  83
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5  84
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6  85
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH  86
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW  87
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE  88
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588  89
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP  90
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES  91
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES  92
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP  93
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3  94
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4  95
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5  96
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN  97
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG  98
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG  99
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2  100
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE  101
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OPAQUETAG  102
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG  103
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_RSPAN  104
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC  105
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG  106
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP  107
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1  108
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2  109
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD  110
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT  111
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE  112
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1  113
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2  114
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP  115
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP  116
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4  117
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6  118
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE  119
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588  120
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP  121
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES  122
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES  123
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP  124
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3  125
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4  126
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5  127
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG  128
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG  129
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2  130
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE  131
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OPAQUETAG  132
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG  133
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_RSPAN  134
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC  135
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG  136
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP  137
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1  138
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2  139
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD  140
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT  141
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE  142
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1  143
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2  144
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE  145
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE  146
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM  147
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY  148
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT  149
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ  150
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_12BYTE  151
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_8BYTE  152
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP  153
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP  154
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4  155
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6  156
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0  157
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1  158
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2  159
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3  160
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4  161
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5  162
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6  163
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH  164
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW  165
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE  166
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588  167
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP  168
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES  169
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES  170
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP  171
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3  172
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4  173
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5  174
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN  175
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK  176
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE  177
+#define BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_COUNT  178
+
+#define BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT \
+    {"EGRESS_PKT_FWD_L2_HDR_ETAG", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG}, \
+    {"EGRESS_PKT_FWD_L2_HDR_ITAG", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG}, \
+    {"EGRESS_PKT_FWD_L2_HDR_L2", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2}, \
+    {"EGRESS_PKT_FWD_L2_HDR_NONE", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE}, \
+    {"EGRESS_PKT_FWD_L2_HDR_OPAQUETAG", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OPAQUETAG}, \
+    {"EGRESS_PKT_FWD_L2_HDR_OTAG", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG}, \
+    {"EGRESS_PKT_FWD_L2_HDR_RSPAN", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_RSPAN}, \
+    {"EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC}, \
+    {"EGRESS_PKT_FWD_L2_HDR_VNTAG", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ARP", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_BFD", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GPE", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GTP_12BYTE", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_12BYTE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GTP_8BYTE", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_8BYTE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ICMP", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IGMP", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IPV4", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IPV6", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS0", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS1", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS2", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS3", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS4", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS5", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS6", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_NONE", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_P_1588", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_RARP", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UDP", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN}, \
+    {"EGRESS_PKT_SYS_HDR_LOOPBACK", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK}, \
+    {"EGRESS_PKT_SYS_HDR_NONE", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_ETAG", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_ITAG", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_L2", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_NONE", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_OPAQUETAG", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OPAQUETAG}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_OTAG", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_RSPAN", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_RSPAN}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_VNTAG", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_12BYTE", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_12BYTE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_8BYTE", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_8BYTE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN}, \
+    {"INGRESS_PKT_INNER_L2_HDR_ETAG", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG}, \
+    {"INGRESS_PKT_INNER_L2_HDR_ITAG", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG}, \
+    {"INGRESS_PKT_INNER_L2_HDR_L2", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2}, \
+    {"INGRESS_PKT_INNER_L2_HDR_NONE", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE}, \
+    {"INGRESS_PKT_INNER_L2_HDR_OPAQUETAG", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OPAQUETAG}, \
+    {"INGRESS_PKT_INNER_L2_HDR_OTAG", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG}, \
+    {"INGRESS_PKT_INNER_L2_HDR_RSPAN", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_RSPAN}, \
+    {"INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC}, \
+    {"INGRESS_PKT_INNER_L2_HDR_VNTAG", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ARP", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_BFD", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ICMP", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_IGMP", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_IPV4", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_IPV6", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_NONE", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_P_1588", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_RARP", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UDP", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_ETAG", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_ITAG", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_L2", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_NONE", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_OPAQUETAG", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OPAQUETAG}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_OTAG", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_RSPAN", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_RSPAN}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_VNTAG", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ARP", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_BFD", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GPE", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GTP_12BYTE", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_12BYTE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GTP_8BYTE", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_8BYTE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_NONE", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_RARP", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UDP", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN}, \
+    {"INGRESS_PKT_SYS_HDR_LOOPBACK", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK}, \
+    {"INGRESS_PKT_SYS_HDR_NONE", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE}, \
+    {"rxpmd_match_id_count", BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_COUNT}
+
+#endif /*! BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_bcmpkt_flexhdr.h
new file mode 100644
index 000000000..5a071cdc3
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_bcmpkt_flexhdr.h
@@ -0,0 +1,96 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) header.yml.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM56890_A0_CNA_6_5_29_BCMPKT_FLEXHDR_H
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_FLEXHDR_H
+
+#include <bcmpkt/bcmpkt_flexhdr_internal.h>
+
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_ARP_T                          0
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T             1
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T             2
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T                3
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T            4
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T             5
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_ETHERTYPE_T                    6
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T             7
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_ICMP_T                         8
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_IPFIX_T                        9
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_IPV4_T                         10
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_IPV6_T                         11
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_L2_T                           12
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_MIRROR_ERSPAN_SN_T             13
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_MIRROR_TRANSPORT_T             14
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T       15
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T       16
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T       17
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_RARP_T                         18
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T             19
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T             20
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_UDP_T                          21
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T                   22
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L4_T                   23
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T                   24
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_VLAN_T                         25
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_VXLAN_T                        26
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_T                   27
+
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_FLEXHDR_COUNT    28
+
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_FLEXHDR_NAME_MAP_INIT \
+    {"arp_t", BCM56890_A0_CNA_6_5_29_BCMPKT_ARP_T},\
+    {"cpu_composites_0_t", BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T},\
+    {"cpu_composites_1_t", BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T},\
+    {"ep_nih_header_t", BCM56890_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T},\
+    {"erspan3_fixed_hdr_t", BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T},\
+    {"erspan3_subhdr_5_t", BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T},\
+    {"ethertype_t", BCM56890_A0_CNA_6_5_29_BCMPKT_ETHERTYPE_T},\
+    {"generic_loopback_t", BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T},\
+    {"icmp_t", BCM56890_A0_CNA_6_5_29_BCMPKT_ICMP_T},\
+    {"ipfix_t", BCM56890_A0_CNA_6_5_29_BCMPKT_IPFIX_T},\
+    {"ipv4_t", BCM56890_A0_CNA_6_5_29_BCMPKT_IPV4_T},\
+    {"ipv6_t", BCM56890_A0_CNA_6_5_29_BCMPKT_IPV6_T},\
+    {"l2_t", BCM56890_A0_CNA_6_5_29_BCMPKT_L2_T},\
+    {"mirror_erspan_sn_t", BCM56890_A0_CNA_6_5_29_BCMPKT_MIRROR_ERSPAN_SN_T},\
+    {"mirror_transport_t", BCM56890_A0_CNA_6_5_29_BCMPKT_MIRROR_TRANSPORT_T},\
+    {"psamp_mirror_on_drop_0_t", BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T},\
+    {"psamp_mirror_on_drop_1_t", BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T},\
+    {"psamp_mirror_on_drop_2_t", BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T},\
+    {"rarp_t", BCM56890_A0_CNA_6_5_29_BCMPKT_RARP_T},\
+    {"tcp_first_4bytes_t", BCM56890_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T},\
+    {"tcp_last_16bytes_t", BCM56890_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T},\
+    {"udp_t", BCM56890_A0_CNA_6_5_29_BCMPKT_UDP_T},\
+    {"unknown_l3_t", BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T},\
+    {"unknown_l4_t", BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L4_T},\
+    {"unknown_l5_t", BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T},\
+    {"vlan_t", BCM56890_A0_CNA_6_5_29_BCMPKT_VLAN_T},\
+    {"vxlan_t", BCM56890_A0_CNA_6_5_29_BCMPKT_VXLAN_T},\
+    {"RXPMD_FLEX_T", BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_T},\
+    {"flexhdr count", BCM56890_A0_CNA_6_5_29_BCMPKT_FLEXHDR_COUNT}
+
+#endif /* BCM56890_A0_CNA_6_5_29_BCMPKT_FLEXHDR_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_bcmpkt_flexhdr_data.h
new file mode 100644
index 000000000..c5c91aa5a
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_bcmpkt_flexhdr_data.h
@@ -0,0 +1,592 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) header.yml.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM56890_A0_CNA_6_5_29_BCMPKT_FLEXHDR_DATA_H
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_FLEXHDR_DATA_H
+
+/*!
+ * \name ARP_T field IDs.
+ */
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_ARP_T_HARDWARE_LEN  0
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_ARP_T_HARDWARE_TYPE 1
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_ARP_T_OPERATION     2
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_ARP_T_PROT_ADDR_LEN 3
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_ARP_T_PROTOCOL_TYPE 4
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_ARP_T_SENDER_HA     5
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_ARP_T_SENDER_IP     6
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_ARP_T_TARGET_HA     7
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_ARP_T_TARGET_IP     8
+
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_ARP_T_FID_COUNT          9
+
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT \
+    {"HARDWARE_LEN", BCM56890_A0_CNA_6_5_29_BCMPKT_ARP_T_HARDWARE_LEN},\
+    {"HARDWARE_TYPE", BCM56890_A0_CNA_6_5_29_BCMPKT_ARP_T_HARDWARE_TYPE},\
+    {"OPERATION", BCM56890_A0_CNA_6_5_29_BCMPKT_ARP_T_OPERATION},\
+    {"PROT_ADDR_LEN", BCM56890_A0_CNA_6_5_29_BCMPKT_ARP_T_PROT_ADDR_LEN},\
+    {"PROTOCOL_TYPE", BCM56890_A0_CNA_6_5_29_BCMPKT_ARP_T_PROTOCOL_TYPE},\
+    {"SENDER_HA", BCM56890_A0_CNA_6_5_29_BCMPKT_ARP_T_SENDER_HA},\
+    {"SENDER_IP", BCM56890_A0_CNA_6_5_29_BCMPKT_ARP_T_SENDER_IP},\
+    {"TARGET_HA", BCM56890_A0_CNA_6_5_29_BCMPKT_ARP_T_TARGET_HA},\
+    {"TARGET_IP", BCM56890_A0_CNA_6_5_29_BCMPKT_ARP_T_TARGET_IP},\
+    {"arp_t fid count", BCM56890_A0_CNA_6_5_29_BCMPKT_ARP_T_FID_COUNT}
+
+/*!
+ * \name CPU_COMPOSITES_0_T field IDs.
+ */
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0 0
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1 1
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2 2
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3 3
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4 4
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5 5
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6 6
+
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT          7
+
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT \
+    {"DMA_CONT0", BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0},\
+    {"DMA_CONT1", BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1},\
+    {"DMA_CONT2", BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2},\
+    {"DMA_CONT3", BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3},\
+    {"DMA_CONT4", BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4},\
+    {"DMA_CONT5", BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5},\
+    {"DMA_CONT6", BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6},\
+    {"cpu_composites_0_t fid count", BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT}
+
+/*!
+ * \name CPU_COMPOSITES_1_T field IDs.
+ */
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10 0
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11 1
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12 2
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13 3
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14 4
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15 5
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16 6
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17 7
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7  8
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8  9
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9  10
+
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT          11
+
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT \
+    {"DMA_CONT10", BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10},\
+    {"DMA_CONT11", BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11},\
+    {"DMA_CONT12", BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12},\
+    {"DMA_CONT13", BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13},\
+    {"DMA_CONT14", BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14},\
+    {"DMA_CONT15", BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15},\
+    {"DMA_CONT16", BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16},\
+    {"DMA_CONT17", BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17},\
+    {"DMA_CONT7", BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7},\
+    {"DMA_CONT8", BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8},\
+    {"DMA_CONT9", BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9},\
+    {"cpu_composites_1_t fid count", BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT}
+
+/*!
+ * \name EP_NIH_HEADER_T field IDs.
+ */
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE       0
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE          1
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A        2
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B        3
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C        4
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A      5
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B      6
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C      7
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX 8
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_RESERVED_0           9
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_START                10
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP            11
+
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_FID_COUNT          12
+
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT \
+    {"HEADER_SUBTYPE", BCM56890_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE},\
+    {"HEADER_TYPE", BCM56890_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE},\
+    {"OPAQUE_CTRL_A", BCM56890_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A},\
+    {"OPAQUE_CTRL_B", BCM56890_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B},\
+    {"OPAQUE_CTRL_C", BCM56890_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C},\
+    {"OPAQUE_OBJECT_A", BCM56890_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A},\
+    {"OPAQUE_OBJECT_B", BCM56890_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B},\
+    {"OPAQUE_OBJECT_C", BCM56890_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C},\
+    {"RECIRC_PROFILE_INDEX", BCM56890_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX},\
+    {"RESERVED_0", BCM56890_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_RESERVED_0},\
+    {"START", BCM56890_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_START},\
+    {"TIMESTAMP", BCM56890_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP},\
+    {"ep_nih_header_t fid count", BCM56890_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_FID_COUNT}
+
+/*!
+ * \name ERSPAN3_FIXED_HDR_T field IDs.
+ */
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO               0
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_COS               1
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID           2
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O 3
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID        4
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_T                 5
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP         6
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_VER               7
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN              8
+
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT          9
+
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT \
+    {"BSO", BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO},\
+    {"COS", BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_COS},\
+    {"GBP_SID", BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID},\
+    {"P_FT_HWID_D_GRA_O", BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O},\
+    {"SESSION_ID", BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID},\
+    {"T", BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_T},\
+    {"TIMESTAMP", BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP},\
+    {"VER", BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_VER},\
+    {"VLAN", BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN},\
+    {"erspan3_fixed_hdr_t fid count", BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT}
+
+/*!
+ * \name ERSPAN3_SUBHDR_5_T field IDs.
+ */
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID 0
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID     1
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID   2
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP   3
+
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT          4
+
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT \
+    {"PLATFORM_ID", BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID},\
+    {"PORT_ID", BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID},\
+    {"SWITCH_ID", BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID},\
+    {"TIMESTAMP", BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP},\
+    {"erspan3_subhdr_5_t fid count", BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT}
+
+/*!
+ * \name ETHERTYPE_T field IDs.
+ */
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_ETHERTYPE_T_TYPE 0
+
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_ETHERTYPE_T_FID_COUNT          1
+
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT \
+    {"TYPE", BCM56890_A0_CNA_6_5_29_BCMPKT_ETHERTYPE_T_TYPE},\
+    {"ethertype_t fid count", BCM56890_A0_CNA_6_5_29_BCMPKT_ETHERTYPE_T_FID_COUNT}
+
+/*!
+ * \name GENERIC_LOOPBACK_T field IDs.
+ */
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ    0
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE   1
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ        2
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_FLAGS              3
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE        4
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY     5
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL     6
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ      7
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0  8
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1  9
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ            10
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1         11
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2         12
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT 13
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE         14
+
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT          15
+
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT \
+    {"DESTINATION_OBJ", BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ},\
+    {"DESTINATION_TYPE", BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE},\
+    {"ENTROPY_OBJ", BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ},\
+    {"FLAGS", BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_FLAGS},\
+    {"HEADER_TYPE", BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE},\
+    {"INPUT_PRIORITY", BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY},\
+    {"INTERFACE_CTRL", BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL},\
+    {"INTERFACE_OBJ", BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ},\
+    {"PROCESSING_CTRL_0", BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0},\
+    {"PROCESSING_CTRL_1", BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1},\
+    {"QOS_OBJ", BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ},\
+    {"RESERVED_1", BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1},\
+    {"RESERVED_2", BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2},\
+    {"SOURCE_SYSTEM_PORT", BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT},\
+    {"START_BYTE", BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE},\
+    {"generic_loopback_t fid count", BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT}
+
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NO_OP       0
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2_OIF      1
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED    2
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__VP          3
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP        4
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NHOP        5
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2MC_GROUP  6
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L3MC_GROUP  7
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED_1  8
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP_MEMBER 9
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__DEVICE_PORT 10
+
+/*!
+ * \name ICMP_T field IDs.
+ */
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_ICMP_T_CHECKSUM  0
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_ICMP_T_CODE      1
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_ICMP_T_ICMP_TYPE 2
+
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_ICMP_T_FID_COUNT          3
+
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT \
+    {"CHECKSUM", BCM56890_A0_CNA_6_5_29_BCMPKT_ICMP_T_CHECKSUM},\
+    {"CODE", BCM56890_A0_CNA_6_5_29_BCMPKT_ICMP_T_CODE},\
+    {"ICMP_TYPE", BCM56890_A0_CNA_6_5_29_BCMPKT_ICMP_T_ICMP_TYPE},\
+    {"icmp_t fid count", BCM56890_A0_CNA_6_5_29_BCMPKT_ICMP_T_FID_COUNT}
+
+/*!
+ * \name IPFIX_T field IDs.
+ */
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_IPFIX_T_EXPORT_TIME   0
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_IPFIX_T_LENGTH        1
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_IPFIX_T_OBS_DOMAIN_ID 2
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_IPFIX_T_SEQUENCE_NUM  3
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_IPFIX_T_VERSION       4
+
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_IPFIX_T_FID_COUNT          5
+
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT \
+    {"EXPORT_TIME", BCM56890_A0_CNA_6_5_29_BCMPKT_IPFIX_T_EXPORT_TIME},\
+    {"LENGTH", BCM56890_A0_CNA_6_5_29_BCMPKT_IPFIX_T_LENGTH},\
+    {"OBS_DOMAIN_ID", BCM56890_A0_CNA_6_5_29_BCMPKT_IPFIX_T_OBS_DOMAIN_ID},\
+    {"SEQUENCE_NUM", BCM56890_A0_CNA_6_5_29_BCMPKT_IPFIX_T_SEQUENCE_NUM},\
+    {"VERSION", BCM56890_A0_CNA_6_5_29_BCMPKT_IPFIX_T_VERSION},\
+    {"ipfix_t fid count", BCM56890_A0_CNA_6_5_29_BCMPKT_IPFIX_T_FID_COUNT}
+
+/*!
+ * \name IPV4_T field IDs.
+ */
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_IPV4_T_DA                0
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET 1
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_IPV4_T_HDR_CHECKSUM      2
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_IPV4_T_ID                3
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_IPV4_T_OPTION            4
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_IPV4_T_PROTOCOL          5
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_IPV4_T_SA                6
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_IPV4_T_TOS               7
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_IPV4_T_TOTAL_LENGTH      8
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_IPV4_T_TTL               9
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_IPV4_T_VERSION_HDR_LEN   10
+
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_IPV4_T_FID_COUNT          11
+
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT \
+    {"DA", BCM56890_A0_CNA_6_5_29_BCMPKT_IPV4_T_DA},\
+    {"FLAGS_FRAG_OFFSET", BCM56890_A0_CNA_6_5_29_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET},\
+    {"HDR_CHECKSUM", BCM56890_A0_CNA_6_5_29_BCMPKT_IPV4_T_HDR_CHECKSUM},\
+    {"ID", BCM56890_A0_CNA_6_5_29_BCMPKT_IPV4_T_ID},\
+    {"OPTION", BCM56890_A0_CNA_6_5_29_BCMPKT_IPV4_T_OPTION},\
+    {"PROTOCOL", BCM56890_A0_CNA_6_5_29_BCMPKT_IPV4_T_PROTOCOL},\
+    {"SA", BCM56890_A0_CNA_6_5_29_BCMPKT_IPV4_T_SA},\
+    {"TOS", BCM56890_A0_CNA_6_5_29_BCMPKT_IPV4_T_TOS},\
+    {"TOTAL_LENGTH", BCM56890_A0_CNA_6_5_29_BCMPKT_IPV4_T_TOTAL_LENGTH},\
+    {"TTL", BCM56890_A0_CNA_6_5_29_BCMPKT_IPV4_T_TTL},\
+    {"VERSION_HDR_LEN", BCM56890_A0_CNA_6_5_29_BCMPKT_IPV4_T_VERSION_HDR_LEN},\
+    {"ipv4_t fid count", BCM56890_A0_CNA_6_5_29_BCMPKT_IPV4_T_FID_COUNT}
+
+/*!
+ * \name IPV6_T field IDs.
+ */
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_IPV6_T_DA             0
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_IPV6_T_FLOW_LABEL     1
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_IPV6_T_HOP_LIMIT      2
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_IPV6_T_NEXT_HEADER    3
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_IPV6_T_PAYLOAD_LENGTH 4
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_IPV6_T_SA             5
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_IPV6_T_TRAFFIC_CLASS  6
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_IPV6_T_VERSION        7
+
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_IPV6_T_FID_COUNT          8
+
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT \
+    {"DA", BCM56890_A0_CNA_6_5_29_BCMPKT_IPV6_T_DA},\
+    {"FLOW_LABEL", BCM56890_A0_CNA_6_5_29_BCMPKT_IPV6_T_FLOW_LABEL},\
+    {"HOP_LIMIT", BCM56890_A0_CNA_6_5_29_BCMPKT_IPV6_T_HOP_LIMIT},\
+    {"NEXT_HEADER", BCM56890_A0_CNA_6_5_29_BCMPKT_IPV6_T_NEXT_HEADER},\
+    {"PAYLOAD_LENGTH", BCM56890_A0_CNA_6_5_29_BCMPKT_IPV6_T_PAYLOAD_LENGTH},\
+    {"SA", BCM56890_A0_CNA_6_5_29_BCMPKT_IPV6_T_SA},\
+    {"TRAFFIC_CLASS", BCM56890_A0_CNA_6_5_29_BCMPKT_IPV6_T_TRAFFIC_CLASS},\
+    {"VERSION", BCM56890_A0_CNA_6_5_29_BCMPKT_IPV6_T_VERSION},\
+    {"ipv6_t fid count", BCM56890_A0_CNA_6_5_29_BCMPKT_IPV6_T_FID_COUNT}
+
+/*!
+ * \name L2_T field IDs.
+ */
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_L2_T_MACDA 0
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_L2_T_MACSA 1
+
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_L2_T_FID_COUNT          2
+
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_L2_T_FIELD_NAME_MAP_INIT \
+    {"MACDA", BCM56890_A0_CNA_6_5_29_BCMPKT_L2_T_MACDA},\
+    {"MACSA", BCM56890_A0_CNA_6_5_29_BCMPKT_L2_T_MACSA},\
+    {"l2_t fid count", BCM56890_A0_CNA_6_5_29_BCMPKT_L2_T_FID_COUNT}
+
+/*!
+ * \name MIRROR_ERSPAN_SN_T field IDs.
+ */
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM 0
+
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT          1
+
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT \
+    {"SEQ_NUM", BCM56890_A0_CNA_6_5_29_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM},\
+    {"mirror_erspan_sn_t fid count", BCM56890_A0_CNA_6_5_29_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT}
+
+/*!
+ * \name MIRROR_TRANSPORT_T field IDs.
+ */
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_MIRROR_TRANSPORT_T_DATA 0
+
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT          1
+
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT \
+    {"DATA", BCM56890_A0_CNA_6_5_29_BCMPKT_MIRROR_TRANSPORT_T_DATA},\
+    {"mirror_transport_t fid count", BCM56890_A0_CNA_6_5_29_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_MIRROR_ON_DROP_0_T field IDs.
+ */
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT 0
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT    1
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH          2
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS     3
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S      4
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID       5
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID     6
+
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT          7
+
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT \
+    {"EGRESS_MOD_PORT", BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT},\
+    {"INGRESS_PORT", BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT},\
+    {"LENGTH", BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH},\
+    {"OBS_TIME_NS", BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS},\
+    {"OBS_TIME_S", BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S},\
+    {"SWITCH_ID", BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID},\
+    {"TEMPLATE_ID", BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID},\
+    {"psamp_mirror_on_drop_0_t fid count", BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_MIRROR_ON_DROP_1_T field IDs.
+ */
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_ING_DROP_REASON    0
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MIRROR_ON_DROP_OBJ 1
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MMU_DROP_CTRL      2
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_SAMPLED_LENGTH     3
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_USER_META_DATA     4
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_VAR_LEN_INDICATOR  5
+
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT          6
+
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FIELD_NAME_MAP_INIT \
+    {"ING_DROP_REASON", BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_ING_DROP_REASON},\
+    {"MIRROR_ON_DROP_OBJ", BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MIRROR_ON_DROP_OBJ},\
+    {"MMU_DROP_CTRL", BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MMU_DROP_CTRL},\
+    {"SAMPLED_LENGTH", BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_SAMPLED_LENGTH},\
+    {"USER_META_DATA", BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_USER_META_DATA},\
+    {"VAR_LEN_INDICATOR", BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_VAR_LEN_INDICATOR},\
+    {"psamp_mirror_on_drop_1_t fid count", BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_MIRROR_ON_DROP_2_T field IDs.
+ */
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_EGR_DROP_REASON       0
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_EP_COPY_SESSION_INDEX 1
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_RESERVED_0            2
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_SAMPLED_LENGTH        3
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_USER_META_DATA        4
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_VAR_LEN_INDICATOR     5
+
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT          6
+
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FIELD_NAME_MAP_INIT \
+    {"EGR_DROP_REASON", BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_EGR_DROP_REASON},\
+    {"EP_COPY_SESSION_INDEX", BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_EP_COPY_SESSION_INDEX},\
+    {"RESERVED_0", BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_RESERVED_0},\
+    {"SAMPLED_LENGTH", BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_SAMPLED_LENGTH},\
+    {"USER_META_DATA", BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_USER_META_DATA},\
+    {"VAR_LEN_INDICATOR", BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_VAR_LEN_INDICATOR},\
+    {"psamp_mirror_on_drop_2_t fid count", BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT}
+
+/*!
+ * \name RARP_T field IDs.
+ */
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_RARP_T_HARDWARE_LEN  0
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_RARP_T_HARDWARE_TYPE 1
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_RARP_T_OPERATION     2
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_RARP_T_PROT_ADDR_LEN 3
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_RARP_T_PROTOCOL_TYPE 4
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_RARP_T_SENDER_HA     5
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_RARP_T_SENDER_IP     6
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_RARP_T_TARGET_HA     7
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_RARP_T_TARGET_IP     8
+
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_RARP_T_FID_COUNT          9
+
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT \
+    {"HARDWARE_LEN", BCM56890_A0_CNA_6_5_29_BCMPKT_RARP_T_HARDWARE_LEN},\
+    {"HARDWARE_TYPE", BCM56890_A0_CNA_6_5_29_BCMPKT_RARP_T_HARDWARE_TYPE},\
+    {"OPERATION", BCM56890_A0_CNA_6_5_29_BCMPKT_RARP_T_OPERATION},\
+    {"PROT_ADDR_LEN", BCM56890_A0_CNA_6_5_29_BCMPKT_RARP_T_PROT_ADDR_LEN},\
+    {"PROTOCOL_TYPE", BCM56890_A0_CNA_6_5_29_BCMPKT_RARP_T_PROTOCOL_TYPE},\
+    {"SENDER_HA", BCM56890_A0_CNA_6_5_29_BCMPKT_RARP_T_SENDER_HA},\
+    {"SENDER_IP", BCM56890_A0_CNA_6_5_29_BCMPKT_RARP_T_SENDER_IP},\
+    {"TARGET_HA", BCM56890_A0_CNA_6_5_29_BCMPKT_RARP_T_TARGET_HA},\
+    {"TARGET_IP", BCM56890_A0_CNA_6_5_29_BCMPKT_RARP_T_TARGET_IP},\
+    {"rarp_t fid count", BCM56890_A0_CNA_6_5_29_BCMPKT_RARP_T_FID_COUNT}
+
+/*!
+ * \name TCP_FIRST_4BYTES_T field IDs.
+ */
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT 0
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT 1
+
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT          2
+
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT \
+    {"DST_PORT", BCM56890_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT},\
+    {"SRC_PORT", BCM56890_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT},\
+    {"tcp_first_4bytes_t fid count", BCM56890_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT}
+
+/*!
+ * \name TCP_LAST_16BYTES_T field IDs.
+ */
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM           0
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM          1
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS 2
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM           3
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR        4
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE          5
+
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT          6
+
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT \
+    {"ACK_NUM", BCM56890_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM},\
+    {"CHECKSUM", BCM56890_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM},\
+    {"HDR_LEN_AND_FLAGS", BCM56890_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS},\
+    {"SEQ_NUM", BCM56890_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM},\
+    {"URGENT_PTR", BCM56890_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR},\
+    {"WIN_SIZE", BCM56890_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE},\
+    {"tcp_last_16bytes_t fid count", BCM56890_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT}
+
+/*!
+ * \name UDP_T field IDs.
+ */
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_UDP_T_CHECKSUM   0
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_UDP_T_DST_PORT   1
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_UDP_T_SRC_PORT   2
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_UDP_T_UDP_LENGTH 3
+
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_UDP_T_FID_COUNT          4
+
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT \
+    {"CHECKSUM", BCM56890_A0_CNA_6_5_29_BCMPKT_UDP_T_CHECKSUM},\
+    {"DST_PORT", BCM56890_A0_CNA_6_5_29_BCMPKT_UDP_T_DST_PORT},\
+    {"SRC_PORT", BCM56890_A0_CNA_6_5_29_BCMPKT_UDP_T_SRC_PORT},\
+    {"UDP_LENGTH", BCM56890_A0_CNA_6_5_29_BCMPKT_UDP_T_UDP_LENGTH},\
+    {"udp_t fid count", BCM56890_A0_CNA_6_5_29_BCMPKT_UDP_T_FID_COUNT}
+
+/*!
+ * \name UNKNOWN_L3_T field IDs.
+ */
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD 0
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD  1
+
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T_FID_COUNT          2
+
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT \
+    {"FIRST_16BYTES_OF_L3_PAYLOAD", BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD},\
+    {"NEXT_16BYTES_OF_L3_PAYLOAD", BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD},\
+    {"unknown_l3_t fid count", BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T_FID_COUNT}
+
+/*!
+ * \name UNKNOWN_L4_T field IDs.
+ */
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD 0
+
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L4_T_FID_COUNT          1
+
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT \
+    {"FIRST_4BYTES_OF_L4_PAYLOAD", BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD},\
+    {"unknown_l4_t fid count", BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L4_T_FID_COUNT}
+
+/*!
+ * \name UNKNOWN_L5_T field IDs.
+ */
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1 0
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3 1
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7 2
+
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_FID_COUNT          3
+
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT \
+    {"L5_BYTES_0_1", BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1},\
+    {"L5_BYTES_2_3", BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3},\
+    {"L5_BYTES_4_7", BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7},\
+    {"unknown_l5_t fid count", BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_FID_COUNT}
+
+/*!
+ * \name VLAN_T field IDs.
+ */
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_VLAN_T_CFI  0
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_VLAN_T_PCP  1
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_VLAN_T_TPID 2
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_VLAN_T_VID  3
+
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_VLAN_T_FID_COUNT          4
+
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT \
+    {"CFI", BCM56890_A0_CNA_6_5_29_BCMPKT_VLAN_T_CFI},\
+    {"PCP", BCM56890_A0_CNA_6_5_29_BCMPKT_VLAN_T_PCP},\
+    {"TPID", BCM56890_A0_CNA_6_5_29_BCMPKT_VLAN_T_TPID},\
+    {"VID", BCM56890_A0_CNA_6_5_29_BCMPKT_VLAN_T_VID},\
+    {"vlan_t fid count", BCM56890_A0_CNA_6_5_29_BCMPKT_VLAN_T_FID_COUNT}
+
+/*!
+ * \name VXLAN_T field IDs.
+ */
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_VXLAN_T_FLAGS_RESERVED_1 0
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_VXLAN_T_RESERVED2        1
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_VXLAN_T_VN_ID            2
+
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_VXLAN_T_FID_COUNT          3
+
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT \
+    {"FLAGS_RESERVED_1", BCM56890_A0_CNA_6_5_29_BCMPKT_VXLAN_T_FLAGS_RESERVED_1},\
+    {"RESERVED2", BCM56890_A0_CNA_6_5_29_BCMPKT_VXLAN_T_RESERVED2},\
+    {"VN_ID", BCM56890_A0_CNA_6_5_29_BCMPKT_VXLAN_T_VN_ID},\
+    {"vxlan_t fid count", BCM56890_A0_CNA_6_5_29_BCMPKT_VXLAN_T_FID_COUNT}
+
+
+#endif /* BCM56890_A0_CNA_6_5_29_BCMPKT_FLEXHDR_DATA_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_bcmpkt_rxpmd_flex_data.h
new file mode 100644
index 000000000..0f8d5395a
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_bcmpkt_rxpmd_flex_data.h
@@ -0,0 +1,124 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) map.yml.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_DATA_H
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_DATA_H
+
+/*!
+ * \name RX flex metadata field IDs.
+ */
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0                                 0
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_DVP_15_0                                       1
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0                              2
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0                         3
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0                         4
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_DROP_CODE_15_0                      5
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_RECIRC_CODE_3_0                     6
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0                      7
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16                     8
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_ERSPAN3_GBP_SID_15_0                           9
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0                        10
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16                       11
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32                       12
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0                              13
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0                             14
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16                            15
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_8_0                            16
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0 17
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0                    18
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_INT_PRI_3_0                                    19
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_L2_IIF_10_0                                    20
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_L2_OIF_10_0                                    21
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_L2_TUNNEL_SVP_15_0                             22
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_L3_IIF_13_0                                    23
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0                                  24
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_14_0              25
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_14_0                              26
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0                            27
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0                            28
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0                   29
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0                        30
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0                              31
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0                             32
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_TAG_ACTION_CTRL_1_0                            33
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0                34
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_VFI_15_0                                       35
+
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_FID_COUNT                       36
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_COUNT                    21
+
+/*!
+ * \name Packet Flex Reason Types.
+ */
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS                  0
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IFP                        1
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IFP_METER                  2
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IVXLT                      3
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP              4
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS         5
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD             6
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE         7
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP              8
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS         9
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR               10
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR               11
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL           12
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST            13
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED    14
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU             15
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED 16
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT               17
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED 18
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP                  19
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_VFP                        20
+
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT \
+    {"CML_FLAGS", BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS},\
+    {"IFP", BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IFP},\
+    {"IFP_METER", BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IFP_METER},\
+    {"IVXLT", BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IVXLT},\
+    {"L2_DST_LOOKUP", BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP},\
+    {"L2_DST_LOOKUP_MISS", BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS},\
+    {"L2_SRC_DISCARD", BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD},\
+    {"L2_SRC_STATIC_MOVE", BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE},\
+    {"L3_DST_LOOKUP", BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP},\
+    {"L3_DST_LOOKUP_MISS", BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS},\
+    {"L3_HDR_ERROR", BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR},\
+    {"L3_TTL_ERROR", BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR},\
+    {"LEARN_CACHE_FULL", BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL},\
+    {"MACSA_MULTICAST", BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST},\
+    {"MEMBERSHIP_CHECK_FAILED", BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED},\
+    {"NO_COPY_TO_CPU", BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU},\
+    {"PKT_INTEGRITY_CHECK_FAILED", BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED},\
+    {"PROTOCOL_PKT", BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT},\
+    {"SPANNING_TREE_CHECK_FAILED", BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED},\
+    {"TRACE_DOP", BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP},\
+    {"VFP", BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_VFP},\
+    {"flex reason count", BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_COUNT}
+
+#endif /* BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_DATA_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_bcmpkt_rxpmd_match_id_defs.h
new file mode 100644
index 000000000..09d3cb27a
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_bcmpkt_rxpmd_match_id_defs.h
@@ -0,0 +1,213 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) bcm56890_a0_cna_6_5_29_sf_match_id_info.yml
+ * for device bcm56890_a0 and variant cna_6_5_29.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_MATCH_ID_DEFS_H
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_MATCH_ID_DEFS_H
+
+#include <bcmpkt/bcmpkt_rxpmd_match_id.h>
+
+/*!
+ * \brief Get the Match ID DataBase information.
+ *
+ * \retval bcmpkt_rxpmd_match_id_db_info_t Match ID DataBase information.
+*/
+extern bcmpkt_rxpmd_match_id_db_info_t *
+    bcm56890_a0_cna_6_5_29_rxpmd_match_id_db_info_get(void);
+
+/*!
+ * \brief Get the Match ID Mapping information.
+ *
+ * \retval bcmpkt_rxpmd_match_id_map_info_t Match ID Mapping information.
+*/
+extern bcmpkt_rxpmd_match_id_map_info_t *
+    bcm56890_a0_cna_6_5_29_rxpmd_match_id_map_info_get(void);
+
+/*!
+  \name RXPMD Match IDs
+*/
+#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG  0
+#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2  1
+#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE  2
+#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG  3
+#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP  4
+#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE  5
+#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP  6
+#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4  7
+#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6  8
+#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE  9
+#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP  10
+#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES  11
+#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES  12
+#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP  13
+#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3  14
+#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4  15
+#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5  16
+#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN  17
+#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH  18
+#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK  19
+#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE  20
+#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG  21
+#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2  22
+#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE  23
+#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG  24
+#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP  25
+#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE  26
+#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP  27
+#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4  28
+#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6  29
+#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE  30
+#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP  31
+#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES  32
+#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES  33
+#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP  34
+#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3  35
+#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4  36
+#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5  37
+#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN  38
+#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG  39
+#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2  40
+#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE  41
+#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG  42
+#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP  43
+#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE  44
+#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP  45
+#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4  46
+#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6  47
+#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE  48
+#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP  49
+#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES  50
+#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES  51
+#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP  52
+#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3  53
+#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4  54
+#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5  55
+#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG  56
+#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2  57
+#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE  58
+#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG  59
+#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP  60
+#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE  61
+#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP  62
+#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4  63
+#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6  64
+#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE  65
+#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP  66
+#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES  67
+#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES  68
+#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP  69
+#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3  70
+#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4  71
+#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5  72
+#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN  73
+#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH  74
+#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK  75
+#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE  76
+#define BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_COUNT  77
+
+#define BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT \
+    {"EGRESS_PKT_FWD_L2_HDR_ITAG", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG}, \
+    {"EGRESS_PKT_FWD_L2_HDR_L2", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2}, \
+    {"EGRESS_PKT_FWD_L2_HDR_NONE", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE}, \
+    {"EGRESS_PKT_FWD_L2_HDR_OTAG", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ARP", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ICMP", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IPV4", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IPV6", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_NONE", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_RARP", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UDP", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN}, \
+    {"EGRESS_PKT_SYS_HDR_EP_NIH", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH}, \
+    {"EGRESS_PKT_SYS_HDR_LOOPBACK", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK}, \
+    {"EGRESS_PKT_SYS_HDR_NONE", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_ITAG", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_L2", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_NONE", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_OTAG", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN}, \
+    {"INGRESS_PKT_INNER_L2_HDR_ITAG", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG}, \
+    {"INGRESS_PKT_INNER_L2_HDR_L2", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2}, \
+    {"INGRESS_PKT_INNER_L2_HDR_NONE", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE}, \
+    {"INGRESS_PKT_INNER_L2_HDR_OTAG", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ARP", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ICMP", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_IPV4", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_IPV6", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_NONE", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_RARP", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UDP", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_ITAG", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_L2", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_NONE", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_OTAG", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ARP", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_NONE", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_RARP", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UDP", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN}, \
+    {"INGRESS_PKT_SYS_HDR_EP_NIH", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH}, \
+    {"INGRESS_PKT_SYS_HDR_LOOPBACK", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK}, \
+    {"INGRESS_PKT_SYS_HDR_NONE", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE}, \
+    {"rxpmd_match_id_count", BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_COUNT}
+
+#endif /*! BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_MATCH_ID_DEFS_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_bcmpkt_flexhdr.h
new file mode 100644
index 000000000..76e4d02bf
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_bcmpkt_flexhdr.h
@@ -0,0 +1,184 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) header.yml.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_FLEXHDR_H
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_FLEXHDR_H
+
+#include <bcmpkt/bcmpkt_flexhdr_internal.h>
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ARP_T                      0
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_AUTHEN_T                   1
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T                      2
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CNTAG_T                    3
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_0_T         4
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_1_T         5
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_DEST_OPTION_T              6
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_EP_NIH_HEADER_T            7
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_FIXED_HDR_T        8
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_SUBHDR_5_T         9
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ESP_T                      10
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ETHERTYPE_T                11
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_FRAG_T                     12
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GBP_ETHERNET_SHIM_T        13
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T         14
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GPE_T                      15
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_CHKSUM_T               16
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_KEY_T                  17
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_ROUT_T                 18
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_SEQ_T                  19
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_T                      20
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T                 21
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_EXTENSION_0_T          22
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HOP_BY_HOP_T               23
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ICMP_T                     24
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_0_A_T          25
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_0_B_T          26
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_1_T            27
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_2_T            28
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_3_T            29
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_HEADER_T               30
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_MD_BASE_T              31
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_METADATA_T             32
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IGMP_T                     33
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IOAM_E2E_T                 34
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPFIX_T                    35
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV4_T                     36
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV6_T                     37
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_L2_T                       38
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MIRROR_ERSPAN_SN_T         39
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MIRROR_TRANSPORT_T         40
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_ACH_T                 41
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_BV_T                  42
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_CW_T                  43
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_T                     44
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T                   45
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PROG_EXT_HDR_T             46
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_0_T                  47
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_1_T                  48
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T   49
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T   50
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RARP_T                     51
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ROUTING_T                  52
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RSPAN_T                    53
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_SRH_T      54
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_T          55
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_0_T             56
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_1_T             57
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_2_T             58
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SNAP_LLC_T                 59
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_STD_SEGMENT_ID_T           60
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SVTAG_T                    61
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_TCP_FIRST_4BYTES_T         62
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_TCP_LAST_16BYTES_T         63
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UDP_T                      64
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L3_T               65
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L4_T               66
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L5_T               67
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_VLAN_T                     68
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_VXLAN_T                    69
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_WESP_T                     70
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_T               71
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_FLEXHDR_COUNT    72
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_FLEXHDR_NAME_MAP_INIT \
+    {"arp_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ARP_T},\
+    {"authen_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_AUTHEN_T},\
+    {"bfd_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T},\
+    {"cntag_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CNTAG_T},\
+    {"cpu_composites_0_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_0_T},\
+    {"cpu_composites_1_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_1_T},\
+    {"dest_option_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_DEST_OPTION_T},\
+    {"ep_nih_header_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_EP_NIH_HEADER_T},\
+    {"erspan3_fixed_hdr_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_FIXED_HDR_T},\
+    {"erspan3_subhdr_5_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_SUBHDR_5_T},\
+    {"esp_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ESP_T},\
+    {"ethertype_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ETHERTYPE_T},\
+    {"frag_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_FRAG_T},\
+    {"gbp_ethernet_shim_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GBP_ETHERNET_SHIM_T},\
+    {"generic_loopback_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T},\
+    {"gpe_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GPE_T},\
+    {"gre_chksum_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_CHKSUM_T},\
+    {"gre_key_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_KEY_T},\
+    {"gre_rout_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_ROUT_T},\
+    {"gre_seq_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_SEQ_T},\
+    {"gre_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_T},\
+    {"hg3_base_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T},\
+    {"hg3_extension_0_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_EXTENSION_0_T},\
+    {"hop_by_hop_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HOP_BY_HOP_T},\
+    {"icmp_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ICMP_T},\
+    {"ifa_flex_md_0_a_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_0_A_T},\
+    {"ifa_flex_md_0_b_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_0_B_T},\
+    {"ifa_flex_md_1_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_1_T},\
+    {"ifa_flex_md_2_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_2_T},\
+    {"ifa_flex_md_3_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_3_T},\
+    {"ifa_header_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_HEADER_T},\
+    {"ifa_md_base_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_MD_BASE_T},\
+    {"ifa_metadata_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_METADATA_T},\
+    {"igmp_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IGMP_T},\
+    {"ioam_e2e_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IOAM_E2E_T},\
+    {"ipfix_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPFIX_T},\
+    {"ipv4_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV4_T},\
+    {"ipv6_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV6_T},\
+    {"l2_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_L2_T},\
+    {"mirror_erspan_sn_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MIRROR_ERSPAN_SN_T},\
+    {"mirror_transport_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MIRROR_TRANSPORT_T},\
+    {"mpls_ach_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_ACH_T},\
+    {"mpls_bv_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_BV_T},\
+    {"mpls_cw_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_CW_T},\
+    {"mpls_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_T},\
+    {"p_1588_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T},\
+    {"prog_ext_hdr_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PROG_EXT_HDR_T},\
+    {"psamp_0_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_0_T},\
+    {"psamp_1_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_1_T},\
+    {"psamp_mirror_on_drop_0_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T},\
+    {"psamp_mirror_on_drop_3_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T},\
+    {"rarp_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RARP_T},\
+    {"routing_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ROUTING_T},\
+    {"rspan_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RSPAN_T},\
+    {"segment_routing_srh_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_SRH_T},\
+    {"segment_routing_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_T},\
+    {"sflow_shim_0_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_0_T},\
+    {"sflow_shim_1_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_1_T},\
+    {"sflow_shim_2_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_2_T},\
+    {"snap_llc_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SNAP_LLC_T},\
+    {"std_segment_id_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_STD_SEGMENT_ID_T},\
+    {"svtag_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SVTAG_T},\
+    {"tcp_first_4bytes_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_TCP_FIRST_4BYTES_T},\
+    {"tcp_last_16bytes_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_TCP_LAST_16BYTES_T},\
+    {"udp_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UDP_T},\
+    {"unknown_l3_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L3_T},\
+    {"unknown_l4_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L4_T},\
+    {"unknown_l5_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L5_T},\
+    {"vlan_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_VLAN_T},\
+    {"vxlan_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_VXLAN_T},\
+    {"wesp_t", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_WESP_T},\
+    {"RXPMD_FLEX_T", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_T},\
+    {"flexhdr count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_FLEXHDR_COUNT}
+
+#endif /* BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_FLEXHDR_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_bcmpkt_flexhdr_data.h
new file mode 100644
index 000000000..d264e5895
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_bcmpkt_flexhdr_data.h
@@ -0,0 +1,1405 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) header.yml.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_FLEXHDR_DATA_H
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_FLEXHDR_DATA_H
+
+/*!
+ * \name ARP_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ARP_T_HARDWARE_LEN  0
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ARP_T_HARDWARE_TYPE 1
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ARP_T_OPERATION     2
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ARP_T_PROT_ADDR_LEN 3
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ARP_T_PROTOCOL_TYPE 4
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ARP_T_SENDER_HA     5
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ARP_T_SENDER_IP     6
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ARP_T_TARGET_HA     7
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ARP_T_TARGET_IP     8
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ARP_T_FID_COUNT          9
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT \
+    {"HARDWARE_LEN", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ARP_T_HARDWARE_LEN},\
+    {"HARDWARE_TYPE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ARP_T_HARDWARE_TYPE},\
+    {"OPERATION", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ARP_T_OPERATION},\
+    {"PROT_ADDR_LEN", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ARP_T_PROT_ADDR_LEN},\
+    {"PROTOCOL_TYPE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ARP_T_PROTOCOL_TYPE},\
+    {"SENDER_HA", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ARP_T_SENDER_HA},\
+    {"SENDER_IP", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ARP_T_SENDER_IP},\
+    {"TARGET_HA", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ARP_T_TARGET_HA},\
+    {"TARGET_IP", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ARP_T_TARGET_IP},\
+    {"arp_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ARP_T_FID_COUNT}
+
+/*!
+ * \name AUTHEN_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_AUTHEN_T_DATA        0
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_AUTHEN_T_NEXT_HEADER 1
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_AUTHEN_T_PAYLOAD_LEN 2
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_AUTHEN_T_RESERVED    3
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_AUTHEN_T_SEQ_NUM     4
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_AUTHEN_T_SPI         5
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_AUTHEN_T_FID_COUNT          6
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT \
+    {"DATA", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_AUTHEN_T_DATA},\
+    {"NEXT_HEADER", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_AUTHEN_T_NEXT_HEADER},\
+    {"PAYLOAD_LEN", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_AUTHEN_T_PAYLOAD_LEN},\
+    {"RESERVED", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_AUTHEN_T_RESERVED},\
+    {"SEQ_NUM", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_AUTHEN_T_SEQ_NUM},\
+    {"SPI", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_AUTHEN_T_SPI},\
+    {"authen_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_AUTHEN_T_FID_COUNT}
+
+/*!
+ * \name BFD_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_AP            0
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_BFD_LENGTH    1
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_CPI           2
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_DEM           3
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_DESMINTXINTV  4
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_DETECTMULT    5
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_DIAG          6
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_FIN           7
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_MINECHORXINTV 8
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_MPT           9
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_MYDISCRIM     10
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_POLL          11
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_REQMINRXINTV  12
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_STA           13
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_URDISCRIM     14
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_VERSION       15
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_FID_COUNT          16
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT \
+    {"AP", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_AP},\
+    {"BFD_LENGTH", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_BFD_LENGTH},\
+    {"CPI", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_CPI},\
+    {"DEM", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_DEM},\
+    {"DESMINTXINTV", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_DESMINTXINTV},\
+    {"DETECTMULT", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_DETECTMULT},\
+    {"DIAG", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_DIAG},\
+    {"FIN", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_FIN},\
+    {"MINECHORXINTV", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_MINECHORXINTV},\
+    {"MPT", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_MPT},\
+    {"MYDISCRIM", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_MYDISCRIM},\
+    {"POLL", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_POLL},\
+    {"REQMINRXINTV", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_REQMINRXINTV},\
+    {"STA", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_STA},\
+    {"URDISCRIM", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_URDISCRIM},\
+    {"VERSION", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_VERSION},\
+    {"bfd_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_FID_COUNT}
+
+/*!
+ * \name CNTAG_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CNTAG_T_RPID 0
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CNTAG_T_TPID 1
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CNTAG_T_FID_COUNT          2
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT \
+    {"RPID", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CNTAG_T_RPID},\
+    {"TPID", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CNTAG_T_TPID},\
+    {"cntag_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CNTAG_T_FID_COUNT}
+
+/*!
+ * \name CPU_COMPOSITES_0_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0 0
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1 1
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2 2
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3 3
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4 4
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5 5
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6 6
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT          7
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT \
+    {"DMA_CONT0", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0},\
+    {"DMA_CONT1", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1},\
+    {"DMA_CONT2", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2},\
+    {"DMA_CONT3", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3},\
+    {"DMA_CONT4", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4},\
+    {"DMA_CONT5", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5},\
+    {"DMA_CONT6", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6},\
+    {"cpu_composites_0_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT}
+
+/*!
+ * \name CPU_COMPOSITES_1_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10 0
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11 1
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12 2
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13 3
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14 4
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15 5
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16 6
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17 7
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7  8
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8  9
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9  10
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT          11
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT \
+    {"DMA_CONT10", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10},\
+    {"DMA_CONT11", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11},\
+    {"DMA_CONT12", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12},\
+    {"DMA_CONT13", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13},\
+    {"DMA_CONT14", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14},\
+    {"DMA_CONT15", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15},\
+    {"DMA_CONT16", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16},\
+    {"DMA_CONT17", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17},\
+    {"DMA_CONT7", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7},\
+    {"DMA_CONT8", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8},\
+    {"DMA_CONT9", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9},\
+    {"cpu_composites_1_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT}
+
+/*!
+ * \name DEST_OPTION_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN 0
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_DEST_OPTION_T_NEXT_HEADER 1
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_DEST_OPTION_T_OPTION      2
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_DEST_OPTION_T_FID_COUNT          3
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT \
+    {"HDR_EXT_LEN", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN},\
+    {"NEXT_HEADER", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_DEST_OPTION_T_NEXT_HEADER},\
+    {"OPTION", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_DEST_OPTION_T_OPTION},\
+    {"dest_option_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_DEST_OPTION_T_FID_COUNT}
+
+/*!
+ * \name EP_NIH_HEADER_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE       0
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE          1
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A        2
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B        3
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C        4
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A      5
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B      6
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C      7
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX 8
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_EP_NIH_HEADER_T_RESERVED_0           9
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_EP_NIH_HEADER_T_START                10
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP            11
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_EP_NIH_HEADER_T_FID_COUNT          12
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT \
+    {"HEADER_SUBTYPE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE},\
+    {"HEADER_TYPE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE},\
+    {"OPAQUE_CTRL_A", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A},\
+    {"OPAQUE_CTRL_B", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B},\
+    {"OPAQUE_CTRL_C", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C},\
+    {"OPAQUE_OBJECT_A", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A},\
+    {"OPAQUE_OBJECT_B", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B},\
+    {"OPAQUE_OBJECT_C", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C},\
+    {"RECIRC_PROFILE_INDEX", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX},\
+    {"RESERVED_0", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_EP_NIH_HEADER_T_RESERVED_0},\
+    {"START", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_EP_NIH_HEADER_T_START},\
+    {"TIMESTAMP", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP},\
+    {"ep_nih_header_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_EP_NIH_HEADER_T_FID_COUNT}
+
+/*!
+ * \name ERSPAN3_FIXED_HDR_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO               0
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_FIXED_HDR_T_COS               1
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID           2
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O 3
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID        4
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_FIXED_HDR_T_T                 5
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP         6
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_FIXED_HDR_T_VER               7
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN              8
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT          9
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT \
+    {"BSO", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO},\
+    {"COS", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_FIXED_HDR_T_COS},\
+    {"GBP_SID", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID},\
+    {"P_FT_HWID_D_GRA_O", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O},\
+    {"SESSION_ID", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID},\
+    {"T", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_FIXED_HDR_T_T},\
+    {"TIMESTAMP", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP},\
+    {"VER", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_FIXED_HDR_T_VER},\
+    {"VLAN", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN},\
+    {"erspan3_fixed_hdr_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT}
+
+/*!
+ * \name ERSPAN3_SUBHDR_5_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID 0
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID     1
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID   2
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP   3
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT          4
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT \
+    {"PLATFORM_ID", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID},\
+    {"PORT_ID", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID},\
+    {"SWITCH_ID", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID},\
+    {"TIMESTAMP", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP},\
+    {"erspan3_subhdr_5_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT}
+
+/*!
+ * \name ESP_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ESP_T_NEXT_HEADER 0
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ESP_T_PAD         1
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ESP_T_PAD_LEN     2
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ESP_T_SEQ_NUM     3
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ESP_T_SPI         4
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ESP_T_FID_COUNT          5
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT \
+    {"NEXT_HEADER", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ESP_T_NEXT_HEADER},\
+    {"PAD", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ESP_T_PAD},\
+    {"PAD_LEN", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ESP_T_PAD_LEN},\
+    {"SEQ_NUM", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ESP_T_SEQ_NUM},\
+    {"SPI", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ESP_T_SPI},\
+    {"esp_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ESP_T_FID_COUNT}
+
+/*!
+ * \name ETHERTYPE_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ETHERTYPE_T_TYPE 0
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ETHERTYPE_T_FID_COUNT          1
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT \
+    {"TYPE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ETHERTYPE_T_TYPE},\
+    {"ethertype_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ETHERTYPE_T_FID_COUNT}
+
+/*!
+ * \name FRAG_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_FRAG_T_FRAG_INFO   0
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_FRAG_T_ID          1
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_FRAG_T_NEXT_HEADER 2
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_FRAG_T_RESERVED    3
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_FRAG_T_FID_COUNT          4
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT \
+    {"FRAG_INFO", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_FRAG_T_FRAG_INFO},\
+    {"ID", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_FRAG_T_ID},\
+    {"NEXT_HEADER", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_FRAG_T_NEXT_HEADER},\
+    {"RESERVED", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_FRAG_T_RESERVED},\
+    {"frag_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_FRAG_T_FID_COUNT}
+
+/*!
+ * \name GBP_ETHERNET_SHIM_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GBP_ETHERNET_SHIM_T_ETHERTYPE 0
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GBP_ETHERNET_SHIM_T_FLAGS     1
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GBP_ETHERNET_SHIM_T_RESERVED  2
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GBP_ETHERNET_SHIM_T_SID       3
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GBP_ETHERNET_SHIM_T_SUBTYPE   4
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GBP_ETHERNET_SHIM_T_VER       5
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT          6
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GBP_ETHERNET_SHIM_T_FIELD_NAME_MAP_INIT \
+    {"ETHERTYPE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GBP_ETHERNET_SHIM_T_ETHERTYPE},\
+    {"FLAGS", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GBP_ETHERNET_SHIM_T_FLAGS},\
+    {"RESERVED", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GBP_ETHERNET_SHIM_T_RESERVED},\
+    {"SID", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GBP_ETHERNET_SHIM_T_SID},\
+    {"SUBTYPE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GBP_ETHERNET_SHIM_T_SUBTYPE},\
+    {"VER", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GBP_ETHERNET_SHIM_T_VER},\
+    {"gbp_ethernet_shim_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT}
+
+/*!
+ * \name GENERIC_LOOPBACK_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ    0
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE   1
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ        2
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_FLAGS              3
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE        4
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY     5
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL     6
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ      7
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0  8
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1  9
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ            10
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1         11
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT 12
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_SRC_SUBPORT_NUM    13
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE         14
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT          15
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT \
+    {"DESTINATION_OBJ", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ},\
+    {"DESTINATION_TYPE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE},\
+    {"ENTROPY_OBJ", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ},\
+    {"FLAGS", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_FLAGS},\
+    {"HEADER_TYPE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE},\
+    {"INPUT_PRIORITY", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY},\
+    {"INTERFACE_CTRL", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL},\
+    {"INTERFACE_OBJ", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ},\
+    {"PROCESSING_CTRL_0", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0},\
+    {"PROCESSING_CTRL_1", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1},\
+    {"QOS_OBJ", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ},\
+    {"RESERVED_1", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1},\
+    {"SOURCE_SYSTEM_PORT", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT},\
+    {"SRC_SUBPORT_NUM", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_SRC_SUBPORT_NUM},\
+    {"START_BYTE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE},\
+    {"generic_loopback_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT}
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NO_OP         0
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2_OIF        1
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED      2
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__VP            3
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP          4
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NHOP          5
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2MC_GROUP    6
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L3MC_GROUP    7
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED_1    8
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP_MEMBER   9
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__DEVICE_PORT   10
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__UNDERLAY_ECMP 11
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__TUNNEL  0
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__GENERIC 1
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__NOOP   0
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__VFI    1
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__L3_IIF 2
+
+/*!
+ * \name GPE_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GPE_T_FLAGS         0
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GPE_T_NEXT_PROTOCOL 1
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GPE_T_RESERVED0     2
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GPE_T_RESERVED1     3
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GPE_T_VNI           4
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GPE_T_FID_COUNT          5
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT \
+    {"FLAGS", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GPE_T_FLAGS},\
+    {"NEXT_PROTOCOL", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GPE_T_NEXT_PROTOCOL},\
+    {"RESERVED0", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GPE_T_RESERVED0},\
+    {"RESERVED1", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GPE_T_RESERVED1},\
+    {"VNI", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GPE_T_VNI},\
+    {"gpe_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GPE_T_FID_COUNT}
+
+/*!
+ * \name GRE_CHKSUM_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_CHKSUM_T_CHECKSUM 0
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_CHKSUM_T_OFFSET   1
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_CHKSUM_T_FID_COUNT          2
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT \
+    {"CHECKSUM", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_CHKSUM_T_CHECKSUM},\
+    {"OFFSET", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_CHKSUM_T_OFFSET},\
+    {"gre_chksum_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_CHKSUM_T_FID_COUNT}
+
+/*!
+ * \name GRE_KEY_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_KEY_T_KEY 0
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_KEY_T_FID_COUNT          1
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT \
+    {"KEY", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_KEY_T_KEY},\
+    {"gre_key_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_KEY_T_FID_COUNT}
+
+/*!
+ * \name GRE_ROUT_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_ROUT_T_ROUTING 0
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_ROUT_T_FID_COUNT          1
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT \
+    {"ROUTING", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_ROUT_T_ROUTING},\
+    {"gre_rout_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_ROUT_T_FID_COUNT}
+
+/*!
+ * \name GRE_SEQ_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_SEQ_T_SEQUENCE 0
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_SEQ_T_FID_COUNT          1
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT \
+    {"SEQUENCE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_SEQ_T_SEQUENCE},\
+    {"gre_seq_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_SEQ_T_FID_COUNT}
+
+/*!
+ * \name GRE_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_T_C_R_K_S  0
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_T_PROTOCOL 1
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_T_RESERVED 2
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_T_VERSION  3
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_T_FID_COUNT          4
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT \
+    {"C_R_K_S", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_T_C_R_K_S},\
+    {"PROTOCOL", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_T_PROTOCOL},\
+    {"RESERVED", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_T_RESERVED},\
+    {"VERSION", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_T_VERSION},\
+    {"gre_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_T_FID_COUNT}
+
+/*!
+ * \name HG3_BASE_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_CN                      0
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_CNG                     1
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_ENTROPY                 2
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_EXT_HDR_PRESENT         3
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_HG3_RESERVED            4
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_L3_ROUTED               5
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_MIRROR_COPY             6
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_RESERVED_ETYPE          7
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION      8
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION_TYPE 9
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_SYSTEM_SOURCE           10
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_TC                      11
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_VERSION                 12
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_FID_COUNT          13
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_FIELD_NAME_MAP_INIT \
+    {"CN", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_CN},\
+    {"CNG", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_CNG},\
+    {"ENTROPY", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_ENTROPY},\
+    {"EXT_HDR_PRESENT", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_EXT_HDR_PRESENT},\
+    {"HG3_RESERVED", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_HG3_RESERVED},\
+    {"L3_ROUTED", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_L3_ROUTED},\
+    {"MIRROR_COPY", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_MIRROR_COPY},\
+    {"RESERVED_ETYPE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_RESERVED_ETYPE},\
+    {"SYSTEM_DESTINATION", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION},\
+    {"SYSTEM_DESTINATION_TYPE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION_TYPE},\
+    {"SYSTEM_SOURCE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_SYSTEM_SOURCE},\
+    {"TC", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_TC},\
+    {"VERSION", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_VERSION},\
+    {"hg3_base_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_FID_COUNT}
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__NO_OP         0
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L2_OIF        1
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__RESERVED      2
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__VP            3
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__ECMP          4
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__NHOP          5
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L2MC_GROUP    6
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L3MC_GROUP    7
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__RESERVED_1    8
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__ECMP_MEMBER   9
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__DEVICE_PORT   10
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__UNDERLAY_ECMP 11
+
+/*!
+ * \name HG3_EXTENSION_0_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_LSB      0
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_MSB      1
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_EXTENSION_0_T_DVP_OR_L3_IIF     2
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_EXTENSION_0_T_FLAGS             3
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_EXTENSION_0_T_FORWARDING_DOMAIN 4
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_EXTENSION_0_T_SVP               5
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT          6
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_EXTENSION_0_T_FIELD_NAME_MAP_INIT \
+    {"CLASS_ID_LSB", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_LSB},\
+    {"CLASS_ID_MSB", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_MSB},\
+    {"DVP_OR_L3_IIF", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_EXTENSION_0_T_DVP_OR_L3_IIF},\
+    {"FLAGS", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_EXTENSION_0_T_FLAGS},\
+    {"FORWARDING_DOMAIN", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_EXTENSION_0_T_FORWARDING_DOMAIN},\
+    {"SVP", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_EXTENSION_0_T_SVP},\
+    {"hg3_extension_0_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT}
+
+/*!
+ * \name HOP_BY_HOP_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN 0
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER 1
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HOP_BY_HOP_T_OPTION      2
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HOP_BY_HOP_T_FID_COUNT          3
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT \
+    {"HDR_EXT_LEN", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN},\
+    {"NEXT_HEADER", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER},\
+    {"OPTION", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HOP_BY_HOP_T_OPTION},\
+    {"hop_by_hop_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HOP_BY_HOP_T_FID_COUNT}
+
+/*!
+ * \name ICMP_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ICMP_T_CHECKSUM  0
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ICMP_T_CODE      1
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ICMP_T_ICMP_TYPE 2
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ICMP_T_FID_COUNT          3
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT \
+    {"CHECKSUM", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ICMP_T_CHECKSUM},\
+    {"CODE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ICMP_T_CODE},\
+    {"ICMP_TYPE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ICMP_T_ICMP_TYPE},\
+    {"icmp_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ICMP_T_FID_COUNT}
+
+/*!
+ * \name IFA_FLEX_MD_0_A_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_0_A_T_FWD_HDR_TTL   0
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_0_A_T_LNS_DEVICE_ID 1
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT          2
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_0_A_T_FIELD_NAME_MAP_INIT \
+    {"FWD_HDR_TTL", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_0_A_T_FWD_HDR_TTL},\
+    {"LNS_DEVICE_ID", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_0_A_T_LNS_DEVICE_ID},\
+    {"ifa_flex_md_0_a_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT}
+
+/*!
+ * \name IFA_FLEX_MD_0_B_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_0_B_T_CN               0
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_0_B_T_PORT_SPEED       1
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_0_B_T_QUEUE_ID         2
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_0_B_T_RX_TIMESTAMP_SEC 3
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT          4
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_0_B_T_FIELD_NAME_MAP_INIT \
+    {"CN", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_0_B_T_CN},\
+    {"PORT_SPEED", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_0_B_T_PORT_SPEED},\
+    {"QUEUE_ID", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_0_B_T_QUEUE_ID},\
+    {"RX_TIMESTAMP_SEC", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_0_B_T_RX_TIMESTAMP_SEC},\
+    {"ifa_flex_md_0_b_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT}
+
+/*!
+ * \name IFA_FLEX_MD_1_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_1_T_EGRESS_PORT_ID       0
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_1_T_INGRESS_PORT_ID      1
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_1_T_RX_TIMESTAMP_NANOSEC 2
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT          3
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_1_T_FIELD_NAME_MAP_INIT \
+    {"EGRESS_PORT_ID", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_1_T_EGRESS_PORT_ID},\
+    {"INGRESS_PORT_ID", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_1_T_INGRESS_PORT_ID},\
+    {"RX_TIMESTAMP_NANOSEC", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_1_T_RX_TIMESTAMP_NANOSEC},\
+    {"ifa_flex_md_1_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT}
+
+/*!
+ * \name IFA_FLEX_MD_2_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_2_T_RESIDENCE_TIME_NANOSEC 0
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_2_T_TX_QUEUE_BYTE_COUNT    1
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT          2
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_2_T_FIELD_NAME_MAP_INIT \
+    {"RESIDENCE_TIME_NANOSEC", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_2_T_RESIDENCE_TIME_NANOSEC},\
+    {"TX_QUEUE_BYTE_COUNT", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_2_T_TX_QUEUE_BYTE_COUNT},\
+    {"ifa_flex_md_2_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT}
+
+/*!
+ * \name IFA_FLEX_MD_3_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_0 0
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_1 1
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT          2
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_3_T_FIELD_NAME_MAP_INIT \
+    {"MMU_STAT_0", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_0},\
+    {"MMU_STAT_1", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_1},\
+    {"ifa_flex_md_3_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT}
+
+/*!
+ * \name IFA_HEADER_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_HEADER_T_FLAGS      0
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_HEADER_T_GNS        1
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_HEADER_T_MAX_LENGTH 2
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_HEADER_T_NEXT_HDR   3
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_HEADER_T_VER        4
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_HEADER_T_FID_COUNT          5
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT \
+    {"FLAGS", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_HEADER_T_FLAGS},\
+    {"GNS", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_HEADER_T_GNS},\
+    {"MAX_LENGTH", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_HEADER_T_MAX_LENGTH},\
+    {"NEXT_HDR", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_HEADER_T_NEXT_HDR},\
+    {"VER", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_HEADER_T_VER},\
+    {"ifa_header_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_HEADER_T_FID_COUNT}
+
+/*!
+ * \name IFA_MD_BASE_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_MD_BASE_T_ACTION_VECTOR            0
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_MD_BASE_T_HOP_LIMIT_CURRENT_LENGTH 1
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_MD_BASE_T_REQUEST_VECTOR           2
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_MD_BASE_T_FID_COUNT          3
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_MD_BASE_T_FIELD_NAME_MAP_INIT \
+    {"ACTION_VECTOR", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_MD_BASE_T_ACTION_VECTOR},\
+    {"HOP_LIMIT_CURRENT_LENGTH", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_MD_BASE_T_HOP_LIMIT_CURRENT_LENGTH},\
+    {"REQUEST_VECTOR", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_MD_BASE_T_REQUEST_VECTOR},\
+    {"ifa_md_base_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_MD_BASE_T_FID_COUNT}
+
+/*!
+ * \name IFA_METADATA_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_METADATA_T_ACTION_VECTOR            0
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_METADATA_T_HOP_LIMIT_CURRENT_LENGTH 1
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_METADATA_T_METADATA                 2
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_METADATA_T_REQUEST_VECTOR           3
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_METADATA_T_FID_COUNT          4
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_METADATA_T_FIELD_NAME_MAP_INIT \
+    {"ACTION_VECTOR", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_METADATA_T_ACTION_VECTOR},\
+    {"HOP_LIMIT_CURRENT_LENGTH", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_METADATA_T_HOP_LIMIT_CURRENT_LENGTH},\
+    {"METADATA", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_METADATA_T_METADATA},\
+    {"REQUEST_VECTOR", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_METADATA_T_REQUEST_VECTOR},\
+    {"ifa_metadata_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_METADATA_T_FID_COUNT}
+
+/*!
+ * \name IGMP_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IGMP_T_CHECKSUM      0
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IGMP_T_GROUP_ADDRESS 1
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IGMP_T_IGMP_TYPE     2
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IGMP_T_MAX_RESP_TIME 3
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IGMP_T_FID_COUNT          4
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT \
+    {"CHECKSUM", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IGMP_T_CHECKSUM},\
+    {"GROUP_ADDRESS", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IGMP_T_GROUP_ADDRESS},\
+    {"IGMP_TYPE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IGMP_T_IGMP_TYPE},\
+    {"MAX_RESP_TIME", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IGMP_T_MAX_RESP_TIME},\
+    {"igmp_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IGMP_T_FID_COUNT}
+
+/*!
+ * \name IOAM_E2E_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IOAM_E2E_T_IOAM_E2E_DATA 0
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IOAM_E2E_T_IOAM_E2E_TYPE 1
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IOAM_E2E_T_IOAM_HDR_LEN  2
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IOAM_E2E_T_NAMESPACE_ID  3
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IOAM_E2E_T_NEXT_PROTOCOL 4
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IOAM_E2E_T_RESERVED      5
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IOAM_E2E_T_TYPE          6
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IOAM_E2E_T_FID_COUNT          7
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IOAM_E2E_T_FIELD_NAME_MAP_INIT \
+    {"IOAM_E2E_DATA", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IOAM_E2E_T_IOAM_E2E_DATA},\
+    {"IOAM_E2E_TYPE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IOAM_E2E_T_IOAM_E2E_TYPE},\
+    {"IOAM_HDR_LEN", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IOAM_E2E_T_IOAM_HDR_LEN},\
+    {"NAMESPACE_ID", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IOAM_E2E_T_NAMESPACE_ID},\
+    {"NEXT_PROTOCOL", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IOAM_E2E_T_NEXT_PROTOCOL},\
+    {"RESERVED", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IOAM_E2E_T_RESERVED},\
+    {"TYPE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IOAM_E2E_T_TYPE},\
+    {"ioam_e2e_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IOAM_E2E_T_FID_COUNT}
+
+/*!
+ * \name IPFIX_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPFIX_T_EXPORT_TIME   0
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPFIX_T_LENGTH        1
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPFIX_T_OBS_DOMAIN_ID 2
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPFIX_T_SEQUENCE_NUM  3
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPFIX_T_VERSION       4
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPFIX_T_FID_COUNT          5
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT \
+    {"EXPORT_TIME", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPFIX_T_EXPORT_TIME},\
+    {"LENGTH", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPFIX_T_LENGTH},\
+    {"OBS_DOMAIN_ID", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPFIX_T_OBS_DOMAIN_ID},\
+    {"SEQUENCE_NUM", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPFIX_T_SEQUENCE_NUM},\
+    {"VERSION", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPFIX_T_VERSION},\
+    {"ipfix_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPFIX_T_FID_COUNT}
+
+/*!
+ * \name IPV4_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV4_T_DA                0
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET 1
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV4_T_HDR_CHECKSUM      2
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV4_T_ID                3
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV4_T_OPTION            4
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV4_T_PROTOCOL          5
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV4_T_SA                6
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV4_T_TOS               7
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV4_T_TOTAL_LENGTH      8
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV4_T_TTL               9
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV4_T_VERSION_HDR_LEN   10
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV4_T_FID_COUNT          11
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT \
+    {"DA", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV4_T_DA},\
+    {"FLAGS_FRAG_OFFSET", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET},\
+    {"HDR_CHECKSUM", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV4_T_HDR_CHECKSUM},\
+    {"ID", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV4_T_ID},\
+    {"OPTION", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV4_T_OPTION},\
+    {"PROTOCOL", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV4_T_PROTOCOL},\
+    {"SA", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV4_T_SA},\
+    {"TOS", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV4_T_TOS},\
+    {"TOTAL_LENGTH", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV4_T_TOTAL_LENGTH},\
+    {"TTL", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV4_T_TTL},\
+    {"VERSION_HDR_LEN", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV4_T_VERSION_HDR_LEN},\
+    {"ipv4_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV4_T_FID_COUNT}
+
+/*!
+ * \name IPV6_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV6_T_DA             0
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV6_T_FLOW_LABEL     1
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV6_T_HOP_LIMIT      2
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV6_T_NEXT_HEADER    3
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV6_T_PAYLOAD_LENGTH 4
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV6_T_SA             5
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV6_T_TRAFFIC_CLASS  6
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV6_T_VERSION        7
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV6_T_FID_COUNT          8
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT \
+    {"DA", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV6_T_DA},\
+    {"FLOW_LABEL", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV6_T_FLOW_LABEL},\
+    {"HOP_LIMIT", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV6_T_HOP_LIMIT},\
+    {"NEXT_HEADER", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV6_T_NEXT_HEADER},\
+    {"PAYLOAD_LENGTH", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV6_T_PAYLOAD_LENGTH},\
+    {"SA", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV6_T_SA},\
+    {"TRAFFIC_CLASS", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV6_T_TRAFFIC_CLASS},\
+    {"VERSION", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV6_T_VERSION},\
+    {"ipv6_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV6_T_FID_COUNT}
+
+/*!
+ * \name L2_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_L2_T_MACDA 0
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_L2_T_MACSA 1
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_L2_T_FID_COUNT          2
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_L2_T_FIELD_NAME_MAP_INIT \
+    {"MACDA", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_L2_T_MACDA},\
+    {"MACSA", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_L2_T_MACSA},\
+    {"l2_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_L2_T_FID_COUNT}
+
+/*!
+ * \name MIRROR_ERSPAN_SN_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM 0
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT          1
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT \
+    {"SEQ_NUM", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM},\
+    {"mirror_erspan_sn_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT}
+
+/*!
+ * \name MIRROR_TRANSPORT_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MIRROR_TRANSPORT_T_DATA 0
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT          1
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT \
+    {"DATA", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MIRROR_TRANSPORT_T_DATA},\
+    {"mirror_transport_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT}
+
+/*!
+ * \name MPLS_ACH_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE 0
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_ACH_T_CW_TYPE      1
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_ACH_T_RESERVED     2
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_ACH_T_VERSION      3
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_ACH_T_FID_COUNT          4
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT \
+    {"CHANNEL_TYPE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE},\
+    {"CW_TYPE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_ACH_T_CW_TYPE},\
+    {"RESERVED", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_ACH_T_RESERVED},\
+    {"VERSION", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_ACH_T_VERSION},\
+    {"mpls_ach_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_ACH_T_FID_COUNT}
+
+/*!
+ * \name MPLS_BV_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_BV_T_VALUE 0
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_BV_T_FID_COUNT          1
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT \
+    {"VALUE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_BV_T_VALUE},\
+    {"mpls_bv_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_BV_T_FID_COUNT}
+
+/*!
+ * \name MPLS_CW_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_CW_T_CW_TYPE    0
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_CW_T_RESERVED   1
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_CW_T_SEQ_NUMBER 2
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_CW_T_FID_COUNT          3
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT \
+    {"CW_TYPE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_CW_T_CW_TYPE},\
+    {"RESERVED", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_CW_T_RESERVED},\
+    {"SEQ_NUMBER", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_CW_T_SEQ_NUMBER},\
+    {"mpls_cw_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_CW_T_FID_COUNT}
+
+/*!
+ * \name MPLS_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_T_BOS   0
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_T_EXP   1
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_T_LABEL 2
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_T_TTL   3
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_T_FID_COUNT          4
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT \
+    {"BOS", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_T_BOS},\
+    {"EXP", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_T_EXP},\
+    {"LABEL", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_T_LABEL},\
+    {"TTL", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_T_TTL},\
+    {"mpls_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_T_FID_COUNT}
+
+/*!
+ * \name P_1588_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T_CNTRL          0
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T_CORRECTION     1
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T_DOMAIN_NB      2
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T_FLAGS          3
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T_LOGMSGINTERVAL 4
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T_MSG_LENGTH     5
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T_MSG_TYPE       6
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T_RESERVED1      7
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T_RESERVED2      8
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T_RESERVED3      9
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T_SEQ_ID         10
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T_SRCPORTID      11
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T_TRANSPORTSPEC  12
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T_VERSION        13
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T_FID_COUNT          14
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT \
+    {"CNTRL", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T_CNTRL},\
+    {"CORRECTION", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T_CORRECTION},\
+    {"DOMAIN_NB", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T_DOMAIN_NB},\
+    {"FLAGS", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T_FLAGS},\
+    {"LOGMSGINTERVAL", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T_LOGMSGINTERVAL},\
+    {"MSG_LENGTH", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T_MSG_LENGTH},\
+    {"MSG_TYPE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T_MSG_TYPE},\
+    {"RESERVED1", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T_RESERVED1},\
+    {"RESERVED2", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T_RESERVED2},\
+    {"RESERVED3", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T_RESERVED3},\
+    {"SEQ_ID", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T_SEQ_ID},\
+    {"SRCPORTID", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T_SRCPORTID},\
+    {"TRANSPORTSPEC", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T_TRANSPORTSPEC},\
+    {"VERSION", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T_VERSION},\
+    {"p_1588_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T_FID_COUNT}
+
+/*!
+ * \name PROG_EXT_HDR_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN 0
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER 1
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PROG_EXT_HDR_T_OPTION      2
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PROG_EXT_HDR_T_FID_COUNT          3
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT \
+    {"HDR_EXT_LEN", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN},\
+    {"NEXT_HEADER", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER},\
+    {"OPTION", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PROG_EXT_HDR_T_OPTION},\
+    {"prog_ext_hdr_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PROG_EXT_HDR_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_0_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_0_T_FLOWSET        0
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_0_T_LENGTH         1
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX 2
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_0_T_OBS_TIME_NS    3
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_0_T_OBS_TIME_S     4
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_0_T_TEMPLATE_ID    5
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_0_T_FID_COUNT          6
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT \
+    {"FLOWSET", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_0_T_FLOWSET},\
+    {"LENGTH", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_0_T_LENGTH},\
+    {"NEXT_HOP_INDEX", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX},\
+    {"OBS_TIME_NS", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_0_T_OBS_TIME_NS},\
+    {"OBS_TIME_S", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_0_T_OBS_TIME_S},\
+    {"TEMPLATE_ID", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_0_T_TEMPLATE_ID},\
+    {"psamp_0_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_0_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_1_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_1_T_DLB_ID         0
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_1_T_EGRESS_PORT    1
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_1_T_EPOCH          2
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_1_T_INGRESS_PORT   3
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH 4
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_1_T_USER_META_DATA 5
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_1_T_VARIABLE_FLAG  6
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_1_T_FID_COUNT          7
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT \
+    {"DLB_ID", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_1_T_DLB_ID},\
+    {"EGRESS_PORT", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_1_T_EGRESS_PORT},\
+    {"EPOCH", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_1_T_EPOCH},\
+    {"INGRESS_PORT", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_1_T_INGRESS_PORT},\
+    {"SAMPLED_LENGTH", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH},\
+    {"USER_META_DATA", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_1_T_USER_META_DATA},\
+    {"VARIABLE_FLAG", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_1_T_VARIABLE_FLAG},\
+    {"psamp_1_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_1_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_MIRROR_ON_DROP_0_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT 0
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT    1
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH          2
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS     3
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S      4
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID       5
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID     6
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT          7
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT \
+    {"EGRESS_MOD_PORT", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT},\
+    {"INGRESS_PORT", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT},\
+    {"LENGTH", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH},\
+    {"OBS_TIME_NS", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS},\
+    {"OBS_TIME_S", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S},\
+    {"SWITCH_ID", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID},\
+    {"TEMPLATE_ID", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID},\
+    {"psamp_mirror_on_drop_0_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT}
+
+/*!
+ * \name PSAMP_MIRROR_ON_DROP_3_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON             0
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0              1
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH          2
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SMOD_STATE              3
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX 4
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA          5
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR       6
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT          7
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT \
+    {"DROP_REASON", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON},\
+    {"RESERVED_0", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0},\
+    {"SAMPLED_LENGTH", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH},\
+    {"SMOD_STATE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SMOD_STATE},\
+    {"UC_COS__COLOR__PROB_IDX", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX},\
+    {"USER_META_DATA", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA},\
+    {"VAR_LEN_INDICATOR", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR},\
+    {"psamp_mirror_on_drop_3_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT}
+
+/*!
+ * \name RARP_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RARP_T_HARDWARE_LEN  0
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RARP_T_HARDWARE_TYPE 1
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RARP_T_OPERATION     2
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RARP_T_PROT_ADDR_LEN 3
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RARP_T_PROTOCOL_TYPE 4
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RARP_T_SENDER_HA     5
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RARP_T_SENDER_IP     6
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RARP_T_TARGET_HA     7
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RARP_T_TARGET_IP     8
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RARP_T_FID_COUNT          9
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT \
+    {"HARDWARE_LEN", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RARP_T_HARDWARE_LEN},\
+    {"HARDWARE_TYPE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RARP_T_HARDWARE_TYPE},\
+    {"OPERATION", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RARP_T_OPERATION},\
+    {"PROT_ADDR_LEN", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RARP_T_PROT_ADDR_LEN},\
+    {"PROTOCOL_TYPE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RARP_T_PROTOCOL_TYPE},\
+    {"SENDER_HA", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RARP_T_SENDER_HA},\
+    {"SENDER_IP", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RARP_T_SENDER_IP},\
+    {"TARGET_HA", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RARP_T_TARGET_HA},\
+    {"TARGET_IP", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RARP_T_TARGET_IP},\
+    {"rarp_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RARP_T_FID_COUNT}
+
+/*!
+ * \name ROUTING_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ROUTING_T_DATA          0
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ROUTING_T_HDR_EXT_LEN   1
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ROUTING_T_NEXT_HEADER   2
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ROUTING_T_ROUTING_TYPE  3
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ROUTING_T_SEGMENTS_LEFT 4
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ROUTING_T_FID_COUNT          5
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT \
+    {"DATA", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ROUTING_T_DATA},\
+    {"HDR_EXT_LEN", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ROUTING_T_HDR_EXT_LEN},\
+    {"NEXT_HEADER", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ROUTING_T_NEXT_HEADER},\
+    {"ROUTING_TYPE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ROUTING_T_ROUTING_TYPE},\
+    {"SEGMENTS_LEFT", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ROUTING_T_SEGMENTS_LEFT},\
+    {"routing_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ROUTING_T_FID_COUNT}
+
+/*!
+ * \name RSPAN_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RSPAN_T_TAG  0
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RSPAN_T_TPID 1
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RSPAN_T_FID_COUNT          2
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT \
+    {"TAG", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RSPAN_T_TAG},\
+    {"TPID", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RSPAN_T_TPID},\
+    {"rspan_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RSPAN_T_FID_COUNT}
+
+/*!
+ * \name SEGMENT_ROUTING_SRH_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_SRH_T_FLAGS         0
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_SRH_T_HDR_EXT_LEN   1
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_SRH_T_LAST_ENTRY    2
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_SRH_T_NEXT_HEADER   3
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_SRH_T_ROUTING_TYPE  4
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_SRH_T_SEGMENTS_LEFT 5
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_SRH_T_TAG           6
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_SRH_T_FID_COUNT          7
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_SRH_T_FIELD_NAME_MAP_INIT \
+    {"FLAGS", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_SRH_T_FLAGS},\
+    {"HDR_EXT_LEN", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_SRH_T_HDR_EXT_LEN},\
+    {"LAST_ENTRY", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_SRH_T_LAST_ENTRY},\
+    {"NEXT_HEADER", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_SRH_T_NEXT_HEADER},\
+    {"ROUTING_TYPE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_SRH_T_ROUTING_TYPE},\
+    {"SEGMENTS_LEFT", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_SRH_T_SEGMENTS_LEFT},\
+    {"TAG", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_SRH_T_TAG},\
+    {"segment_routing_srh_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_SRH_T_FID_COUNT}
+
+/*!
+ * \name SEGMENT_ROUTING_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_T_HDR_EXT_LEN      0
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_T_LAST_ENTRY_FLAGS 1
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_T_NEXT_HEADER      2
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_T_ROUTING_TYPE     3
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_T_SEG_LIST         4
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_T_SEGMENTS_LEFT    5
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_T_TAG              6
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_T_FID_COUNT          7
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_T_FIELD_NAME_MAP_INIT \
+    {"HDR_EXT_LEN", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_T_HDR_EXT_LEN},\
+    {"LAST_ENTRY_FLAGS", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_T_LAST_ENTRY_FLAGS},\
+    {"NEXT_HEADER", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_T_NEXT_HEADER},\
+    {"ROUTING_TYPE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_T_ROUTING_TYPE},\
+    {"SEG_LIST", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_T_SEG_LIST},\
+    {"SEGMENTS_LEFT", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_T_SEGMENTS_LEFT},\
+    {"TAG", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_T_TAG},\
+    {"segment_routing_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_T_FID_COUNT}
+
+/*!
+ * \name SFLOW_SHIM_0_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION 0
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE      1
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_0_T_VERSION         2
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT          3
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT \
+    {"SYS_DESTINATION", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION},\
+    {"SYS_SOURCE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE},\
+    {"VERSION", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_0_T_VERSION},\
+    {"sflow_shim_0_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT}
+
+/*!
+ * \name SFLOW_SHIM_1_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE 0
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED   1
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE 2
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST       3
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE  4
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED   5
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_1_T_RESERVED         6
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE       7
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT          8
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT \
+    {"FLAG_DEST_SAMPLE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE},\
+    {"FLAG_DISCARDED", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED},\
+    {"FLAG_FLEX_SAMPLE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE},\
+    {"FLAG_MCAST", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST},\
+    {"FLAG_SRC_SAMPLE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE},\
+    {"FLAG_TRUNCATED", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED},\
+    {"RESERVED", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_1_T_RESERVED},\
+    {"SYS_OPCODE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE},\
+    {"sflow_shim_1_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT}
+
+/*!
+ * \name SFLOW_SHIM_2_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM   0
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA 1
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT          2
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT \
+    {"SEQUENCE_NUM", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM},\
+    {"USER_META_DATA", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA},\
+    {"sflow_shim_2_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT}
+
+/*!
+ * \name SNAP_LLC_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SNAP_LLC_T_LENGTH   0
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SNAP_LLC_T_SNAP_LLC 1
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SNAP_LLC_T_FID_COUNT          2
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT \
+    {"LENGTH", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SNAP_LLC_T_LENGTH},\
+    {"SNAP_LLC", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SNAP_LLC_T_SNAP_LLC},\
+    {"snap_llc_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SNAP_LLC_T_FID_COUNT}
+
+/*!
+ * \name STD_SEGMENT_ID_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_STD_SEGMENT_ID_T_DATA 0
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_STD_SEGMENT_ID_T_FID_COUNT          1
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_STD_SEGMENT_ID_T_FIELD_NAME_MAP_INIT \
+    {"DATA", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_STD_SEGMENT_ID_T_DATA},\
+    {"std_segment_id_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_STD_SEGMENT_ID_T_FID_COUNT}
+
+/*!
+ * \name SVTAG_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SVTAG_T_DATA_LWR 0
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SVTAG_T_DATA_UPR 1
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SVTAG_T_FID_COUNT          2
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SVTAG_T_FIELD_NAME_MAP_INIT \
+    {"DATA_LWR", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SVTAG_T_DATA_LWR},\
+    {"DATA_UPR", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SVTAG_T_DATA_UPR},\
+    {"svtag_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SVTAG_T_FID_COUNT}
+
+/*!
+ * \name TCP_FIRST_4BYTES_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT 0
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT 1
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT          2
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT \
+    {"DST_PORT", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT},\
+    {"SRC_PORT", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT},\
+    {"tcp_first_4bytes_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT}
+
+/*!
+ * \name TCP_LAST_16BYTES_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM           0
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM          1
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS 2
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM           3
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR        4
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE          5
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT          6
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT \
+    {"ACK_NUM", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM},\
+    {"CHECKSUM", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM},\
+    {"HDR_LEN_AND_FLAGS", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS},\
+    {"SEQ_NUM", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM},\
+    {"URGENT_PTR", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR},\
+    {"WIN_SIZE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE},\
+    {"tcp_last_16bytes_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT}
+
+/*!
+ * \name UDP_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UDP_T_CHECKSUM   0
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UDP_T_DST_PORT   1
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UDP_T_SRC_PORT   2
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UDP_T_UDP_LENGTH 3
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UDP_T_FID_COUNT          4
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT \
+    {"CHECKSUM", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UDP_T_CHECKSUM},\
+    {"DST_PORT", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UDP_T_DST_PORT},\
+    {"SRC_PORT", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UDP_T_SRC_PORT},\
+    {"UDP_LENGTH", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UDP_T_UDP_LENGTH},\
+    {"udp_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UDP_T_FID_COUNT}
+
+/*!
+ * \name UNKNOWN_L3_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD 0
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD  1
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L3_T_FID_COUNT          2
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT \
+    {"FIRST_16BYTES_OF_L3_PAYLOAD", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD},\
+    {"NEXT_16BYTES_OF_L3_PAYLOAD", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD},\
+    {"unknown_l3_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L3_T_FID_COUNT}
+
+/*!
+ * \name UNKNOWN_L4_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD 0
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L4_T_FID_COUNT          1
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT \
+    {"FIRST_4BYTES_OF_L4_PAYLOAD", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD},\
+    {"unknown_l4_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L4_T_FID_COUNT}
+
+/*!
+ * \name UNKNOWN_L5_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1 0
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3 1
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7 2
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L5_T_L5_BYTES_8_9 3
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L5_T_FID_COUNT          4
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT \
+    {"L5_BYTES_0_1", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1},\
+    {"L5_BYTES_2_3", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3},\
+    {"L5_BYTES_4_7", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7},\
+    {"L5_BYTES_8_9", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L5_T_L5_BYTES_8_9},\
+    {"unknown_l5_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L5_T_FID_COUNT}
+
+/*!
+ * \name VLAN_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_VLAN_T_CFI  0
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_VLAN_T_PCP  1
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_VLAN_T_TPID 2
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_VLAN_T_VID  3
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_VLAN_T_FID_COUNT          4
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT \
+    {"CFI", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_VLAN_T_CFI},\
+    {"PCP", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_VLAN_T_PCP},\
+    {"TPID", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_VLAN_T_TPID},\
+    {"VID", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_VLAN_T_VID},\
+    {"vlan_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_VLAN_T_FID_COUNT}
+
+/*!
+ * \name VXLAN_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_VXLAN_T_FLAGS_RESERVED_1 0
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_VXLAN_T_RESERVED2        1
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_VXLAN_T_VN_ID            2
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_VXLAN_T_FID_COUNT          3
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT \
+    {"FLAGS_RESERVED_1", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_VXLAN_T_FLAGS_RESERVED_1},\
+    {"RESERVED2", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_VXLAN_T_RESERVED2},\
+    {"VN_ID", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_VXLAN_T_VN_ID},\
+    {"vxlan_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_VXLAN_T_FID_COUNT}
+
+/*!
+ * \name WESP_T field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_WESP_T_FLAGS       0
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_WESP_T_HEADER_LEN  1
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_WESP_T_NEXT_HEADER 2
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_WESP_T_SEQ_NUM     3
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_WESP_T_SPI         4
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_WESP_T_TRAILER_LEN 5
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_WESP_T_WESP_IV     6
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_WESP_T_FID_COUNT          7
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT \
+    {"FLAGS", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_WESP_T_FLAGS},\
+    {"HEADER_LEN", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_WESP_T_HEADER_LEN},\
+    {"NEXT_HEADER", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_WESP_T_NEXT_HEADER},\
+    {"SEQ_NUM", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_WESP_T_SEQ_NUM},\
+    {"SPI", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_WESP_T_SPI},\
+    {"TRAILER_LEN", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_WESP_T_TRAILER_LEN},\
+    {"WESP_IV", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_WESP_T_WESP_IV},\
+    {"wesp_t fid count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_WESP_T_FID_COUNT}
+
+
+#endif /* BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_FLEXHDR_DATA_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_bcmpkt_rxpmd_flex_data.h
new file mode 100644
index 000000000..3913e6c5a
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_bcmpkt_rxpmd_flex_data.h
@@ -0,0 +1,198 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) map.yml.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_DATA_H
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_DATA_H
+
+/*!
+ * \name RX flex metadata field IDs.
+ */
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_BSCAN_CONTROL_DATA_15_0                        0
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_BSCAN_CONTROL_FLAGS_3_0                        1
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0                      2
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_DNAT_CTRL_3_0                                  3
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0                                 4
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_DVP_15_0                                       5
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_AND_SNAT_CTRL_15_0               6
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0        7
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0                         8
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0                         9
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0        10
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_RECIRC_CODE_3_0                     11
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0                      12
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16                     13
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0                        14
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16                       15
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32                       16
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_FLOW_ID_LSB_15_0                               17
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_FLOW_ID_MSB_3_0                                18
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0                              19
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0                        20
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0                      21
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0                             22
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16                            23
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_INGRESS_DEVICE_PORT_8_0                        24
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0 25
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0                    26
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_INT_PRI_3_0                                    27
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_L2_IIF_12_0                                    28
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_L2_OIF_12_0                                    29
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_L3_DNAT_INDEX_15_0                             30
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_L3_IIF_13_0                                    31
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0                                  32
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_L3_SNAT_INDEX_15_0                             33
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_MAC_DA_23_20_3_0                               34
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_MPLS_LABEL_DECAP_COUNT_3_0                     35
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0              36
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0                              37
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0                            38
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0                            39
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_SRV6_DIP_EDIT_CTRL_3_0                         40
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_SRV6_EDIT_AND_SL_UPDATE_CTRL_3_0               41
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_SRV6_NEW_GSID_SI_2_0                           42
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_SRV6_SID_AND_PREFIX_LEN_ENC_3_0                43
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_SVP_15_0                                       44
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0                   45
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_SVTAG_CTRL_PKT_INFO_3_0                        46
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_SVTAG_SC_INDEX_OR_IFP_OPAQUE_OBJ_15_0          47
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_SVTAG_SC_INDEX_STR_ALLOW_NAT_3_0               48
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0                        49
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0                              50
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0                             51
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0                             52
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0                53
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_VFI_15_0                                       54
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0   55
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_FID_COUNT                       56
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_COUNT                    48
+
+/*!
+ * \name Packet Flex Reason Types.
+ */
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE                         0
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS                               1
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_DEFAULT                                 2
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED 3
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED                    4
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED  5
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED                     6
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_DST_FP                                  7
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_EM_FT                                   8
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_EM_FT_HPAE_MISS                         9
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_IFP                                     10
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_IFP_METER                               11
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED      12
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_IVXLT                                   13
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP                           14
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS                      15
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE                      16
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP                           17
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS                      18
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR                            19
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF                        20
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR                            21
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL                        22
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD                    23
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0                      24
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1                      25
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2                      26
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3                      27
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4                      28
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5                      29
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6                      30
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7                      31
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD            32
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED              33
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED                  34
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU                    35
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU                          36
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED              37
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT                            38
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_SER_DROP                                39
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD         40
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_SRV6                                    41
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_SVP                                     42
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP                               43
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU                44
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR                     45
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED                       46
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_VFP                                     47
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT \
+    {"CB_STATION_MOVE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE},\
+    {"CML_FLAGS", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS},\
+    {"DEFAULT", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_DEFAULT},\
+    {"DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED},\
+    {"DLB_ECMP_PKT_SAMPLED", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED},\
+    {"DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED},\
+    {"DLB_LAG_PKT_SAMPLED", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED},\
+    {"DST_FP", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_DST_FP},\
+    {"EM_FT", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_EM_FT},\
+    {"EM_FT_HPAE_MISS", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_EM_FT_HPAE_MISS},\
+    {"IFP", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_IFP},\
+    {"IFP_METER", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_IFP_METER},\
+    {"IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED},\
+    {"IVXLT", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_IVXLT},\
+    {"L2_DST_LOOKUP", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP},\
+    {"L2_DST_LOOKUP_MISS", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS},\
+    {"L2_SRC_STATIC_MOVE", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE},\
+    {"L3_DST_LOOKUP", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP},\
+    {"L3_DST_LOOKUP_MISS", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS},\
+    {"L3_HDR_ERROR", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR},\
+    {"L3_IIF_EQ_L3_OIF", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF},\
+    {"L3_TTL_ERROR", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR},\
+    {"LEARN_CACHE_FULL", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL},\
+    {"MACSA_MULTICAST_RSVD", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD},\
+    {"MATCHED_RULE_BIT_0", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0},\
+    {"MATCHED_RULE_BIT_1", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1},\
+    {"MATCHED_RULE_BIT_2", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2},\
+    {"MATCHED_RULE_BIT_3", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3},\
+    {"MATCHED_RULE_BIT_4", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4},\
+    {"MATCHED_RULE_BIT_5", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5},\
+    {"MATCHED_RULE_BIT_6", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6},\
+    {"MATCHED_RULE_BIT_7", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7},\
+    {"MEMBERSHIP_CHECK_FAILED_RSVD", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD},\
+    {"MIRROR_SAMPLER_EGR_SAMPLED", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED},\
+    {"MIRROR_SAMPLER_SAMPLED", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED},\
+    {"MPLS_CTRL_PKT_TO_CPU", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU},\
+    {"NO_COPY_TO_CPU", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU},\
+    {"PKT_INTEGRITY_CHECK_FAILED", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED},\
+    {"PROTOCOL_PKT", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT},\
+    {"SER_DROP", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_SER_DROP},\
+    {"SPANNING_TREE_CHECK_FAILED_RSVD", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD},\
+    {"SRV6", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_SRV6},\
+    {"SVP", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_SVP},\
+    {"TRACE_DOP", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP},\
+    {"TRACE_DO_NOT_COPY_TO_CPU", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU},\
+    {"TRACE_DO_NOT_MIRROR", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR},\
+    {"URPF_CHECK_FAILED", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED},\
+    {"VFP", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_VFP},\
+    {"flex reason count", BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_COUNT}
+
+#endif /* BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_DATA_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_bcmpkt_rxpmd_match_id_defs.h
new file mode 100644
index 000000000..ad98e5d86
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_bcmpkt_rxpmd_match_id_defs.h
@@ -0,0 +1,515 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) bcm56890_a0_dna_6_5_29_1_2_sf_match_id_info.yml
+ * for device bcm56890_a0 and variant dna_6_5_29_1_2.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#ifndef BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_MATCH_ID_DEFS_H
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_MATCH_ID_DEFS_H
+
+#include <bcmpkt/bcmpkt_rxpmd_match_id.h>
+
+/*!
+ * \brief Get the Match ID DataBase information.
+ *
+ * \retval bcmpkt_rxpmd_match_id_db_info_t Match ID DataBase information.
+*/
+extern bcmpkt_rxpmd_match_id_db_info_t *
+    bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db_info_get(void);
+
+/*!
+ * \brief Get the Match ID Mapping information.
+ *
+ * \retval bcmpkt_rxpmd_match_id_map_info_t Match ID Mapping information.
+*/
+extern bcmpkt_rxpmd_match_id_map_info_t *
+    bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_map_info_get(void);
+
+/*!
+  \name RXPMD Match IDs
+*/
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_CNTAG  0
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM  1
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE  2
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0  3
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG  4
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2  5
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE  6
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG  7
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC  8
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SVTAG  9
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP  10
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1  11
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2  12
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD  13
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1  14
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2  15
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT  16
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE  17
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1  18
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2  19
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE  20
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE  21
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM  22
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY  23
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT  24
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ  25
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1  26
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2  27
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP  28
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER  29
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA  30
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP  31
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E  32
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4  33
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6  34
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0  35
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1  36
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2  37
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3  38
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4  39
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5  40
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6  41
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH  42
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW  43
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE  44
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588  45
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1  46
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2  47
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP  48
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1  49
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2  50
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_SEG_ROUT_EXT_1  51
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES  52
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES  53
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP  54
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3  55
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4  56
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5  57
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN  58
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1  59
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2  60
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH  61
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK  62
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE  63
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_CNTAG  64
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM  65
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE  66
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0  67
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG  68
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2  69
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE  70
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG  71
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC  72
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SVTAG  73
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP  74
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1  75
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2  76
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD  77
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1  78
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2  79
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT  80
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE  81
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1  82
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2  83
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE  84
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE  85
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM  86
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY  87
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT  88
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ  89
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1  90
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2  91
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP  92
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER  93
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA  94
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP  95
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E  96
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4  97
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6  98
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0  99
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1  100
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2  101
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3  102
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4  103
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5  104
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6  105
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH  106
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW  107
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE  108
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588  109
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1  110
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2  111
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP  112
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1  113
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2  114
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_SEG_ROUT_EXT_1  115
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES  116
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES  117
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP  118
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3  119
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4  120
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5  121
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN  122
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1  123
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2  124
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_CNTAG  125
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG  126
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2  127
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE  128
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG  129
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC  130
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP  131
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1  132
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2  133
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD  134
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1  135
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2  136
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT  137
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE  138
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1  139
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2  140
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1  141
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2  142
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP  143
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER  144
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA  145
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP  146
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4  147
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6  148
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE  149
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588  150
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1  151
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2  152
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP  153
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1  154
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2  155
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES  156
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES  157
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP  158
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3  159
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4  160
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5  161
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1  162
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2  163
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_CNTAG  164
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM  165
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE  166
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0  167
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG  168
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2  169
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE  170
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG  171
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC  172
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SVTAG  173
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP  174
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1  175
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2  176
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD  177
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1  178
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2  179
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT  180
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE  181
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1  182
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2  183
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE  184
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE  185
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM  186
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY  187
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT  188
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ  189
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1  190
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2  191
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP  192
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER  193
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA  194
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP  195
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E  196
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4  197
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6  198
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0  199
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1  200
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2  201
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3  202
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4  203
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5  204
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6  205
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH  206
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW  207
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE  208
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588  209
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1  210
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2  211
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP  212
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1  213
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2  214
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_SEG_ROUT_EXT_1  215
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES  216
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES  217
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP  218
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3  219
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4  220
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5  221
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN  222
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1  223
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2  224
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH  225
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK  226
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE  227
+#define BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_COUNT  228
+
+#define BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT \
+    {"EGRESS_PKT_FWD_L2_HDR_CNTAG", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_CNTAG}, \
+    {"EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM}, \
+    {"EGRESS_PKT_FWD_L2_HDR_HG3_BASE", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE}, \
+    {"EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0}, \
+    {"EGRESS_PKT_FWD_L2_HDR_ITAG", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG}, \
+    {"EGRESS_PKT_FWD_L2_HDR_L2", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2}, \
+    {"EGRESS_PKT_FWD_L2_HDR_NONE", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE}, \
+    {"EGRESS_PKT_FWD_L2_HDR_OTAG", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG}, \
+    {"EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC}, \
+    {"EGRESS_PKT_FWD_L2_HDR_SVTAG", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SVTAG}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ARP", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_BFD", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GPE", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ICMP", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IGMP", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IPV4", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_IPV6", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS0", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS1", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS2", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS3", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS4", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS5", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS6", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_NONE", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_P_1588", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_RARP", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_SEG_ROUT_EXT_1", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_SEG_ROUT_EXT_1}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UDP", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1}, \
+    {"EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2}, \
+    {"EGRESS_PKT_SYS_HDR_EP_NIH", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH}, \
+    {"EGRESS_PKT_SYS_HDR_LOOPBACK", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK}, \
+    {"EGRESS_PKT_SYS_HDR_NONE", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_CNTAG", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_CNTAG}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_ITAG", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_L2", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_NONE", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_OTAG", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC}, \
+    {"EGRESS_PKT_TUNNEL_L2_HDR_SVTAG", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SVTAG}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_SEG_ROUT_EXT_1", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_SEG_ROUT_EXT_1}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1}, \
+    {"EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2}, \
+    {"INGRESS_PKT_INNER_L2_HDR_CNTAG", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_CNTAG}, \
+    {"INGRESS_PKT_INNER_L2_HDR_ITAG", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG}, \
+    {"INGRESS_PKT_INNER_L2_HDR_L2", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2}, \
+    {"INGRESS_PKT_INNER_L2_HDR_NONE", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE}, \
+    {"INGRESS_PKT_INNER_L2_HDR_OTAG", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG}, \
+    {"INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ARP", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_BFD", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ICMP", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_IGMP", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_IPV4", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_IPV6", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_NONE", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_P_1588", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_RARP", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UDP", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1}, \
+    {"INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_CNTAG", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_CNTAG}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_HG3_BASE", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_ITAG", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_L2", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_NONE", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_OTAG", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC}, \
+    {"INGRESS_PKT_OUTER_L2_HDR_SVTAG", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SVTAG}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ARP", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_BFD", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GPE", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_NONE", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_RARP", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_SEG_ROUT_EXT_1", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_SEG_ROUT_EXT_1}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UDP", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1}, \
+    {"INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2}, \
+    {"INGRESS_PKT_SYS_HDR_EP_NIH", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH}, \
+    {"INGRESS_PKT_SYS_HDR_LOOPBACK", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK}, \
+    {"INGRESS_PKT_SYS_HDR_NONE", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE}, \
+    {"rxpmd_match_id_count", BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_COUNT}
+
+#endif /*! BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_MATCH_ID_DEFS_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/lbpmd/bcmpkt_lbhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/lbpmd/bcmpkt_lbhdr.c
new file mode 100644
index 000000000..d723dfb66
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/lbpmd/bcmpkt_lbhdr.c
@@ -0,0 +1,203 @@
+/*! \file bcmpkt_lbhdr.c
+ *
+ * Loopback header (LBHDR, called LOOPBACK_MH in hardware) access interface.
+ *
+ */
+/*
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ */
+
+#include <shr/shr_error.h>
+#include <bcmpkt/bcmpkt_lbhdr.h>
+#include <bcmpkt/bcmpkt_lbhdr_internal.h>
+
+#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \
+    extern const bcmpkt_lbhdr_fget_t _bd##_lbhdr_fget;
+#include <bcmdrd/bcmdrd_devlist.h>
+
+#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \
+    &_bd##_lbhdr_fget,
+static const bcmpkt_lbhdr_fget_t *lbhdr_fget[] = {
+    NULL,
+#include <bcmdrd/bcmdrd_devlist.h>
+    NULL
+};
+
+#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \
+    extern const bcmpkt_lbhdr_fset_t _bd##_lbhdr_fset;
+#include <bcmdrd/bcmdrd_devlist.h>
+
+#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \
+    &_bd##_lbhdr_fset,
+static const bcmpkt_lbhdr_fset_t *lbhdr_fset[] = {
+    NULL,
+#include <bcmdrd/bcmdrd_devlist.h>
+    NULL
+};
+
+#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \
+    extern const bcmpkt_lbhdr_figet_t _bd##_lbhdr_figet;
+#include <bcmdrd/bcmdrd_devlist.h>
+
+#if 0
+#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \
+    &_bd##_lbhdr_figet,
+static const bcmpkt_lbhdr_figet_t *lbhdr_figet[] = {
+    NULL,
+#include <bcmdrd/bcmdrd_devlist.h>
+    NULL
+};
+#endif
+
+#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \
+    &_bd##_lbhdr_view_info_get,
+static void (*view_info_get[])(bcmpkt_pmd_view_info_t *info) = {
+    NULL,
+#include <bcmdrd/bcmdrd_devlist.h>
+    NULL
+};
+
+static const shr_enum_map_t field_names[] =
+{
+    BCMPKT_LBHDR_FIELD_NAME_MAP_INIT
+};
+
+int
+bcmpkt_lbhdr_field_get(bcmdrd_dev_type_t dev_type, uint32_t *lbhdr,
+                       int fid, uint32_t *val)
+{
+
+    if ((lbhdr == NULL) || (val == NULL)) {
+        return SHR_E_PARAM;
+    }
+
+    if (dev_type <= BCMDRD_DEV_T_NONE ||
+        dev_type >= BCMDRD_DEV_T_COUNT) {
+        return SHR_E_PARAM;
+    }
+
+    if (fid < 0 || fid >= BCMPKT_LBHDR_FID_COUNT) {
+        return SHR_E_PARAM;
+    }
+
+    if (lbhdr_fget[dev_type] == NULL ||
+        lbhdr_fget[dev_type]->fget[fid] == NULL) {
+        return SHR_E_UNAVAIL;
+    }
+
+    *val = lbhdr_fget[dev_type]->fget[fid](lbhdr);
+
+    return SHR_E_NONE;
+}
+
+int
+bcmpkt_lbhdr_field_set(bcmdrd_dev_type_t dev_type, uint32_t *lbhdr,
+                       int fid, uint32_t val)
+{
+
+    if (lbhdr == NULL) {
+        return SHR_E_PARAM;
+    }
+
+    if (dev_type <= BCMDRD_DEV_T_NONE ||
+        dev_type >= BCMDRD_DEV_T_COUNT) {
+        return SHR_E_PARAM;
+    }
+
+    if (fid < 0 || fid >= BCMPKT_LBHDR_FID_COUNT) {
+        return SHR_E_PARAM;
+    }
+
+    if (lbhdr_fset[dev_type] == NULL ||
+        lbhdr_fset[dev_type]->fset[fid] == NULL) {
+        return SHR_E_UNAVAIL;
+    }
+
+    lbhdr_fset[dev_type]->fset[fid](lbhdr, val);
+
+    return SHR_E_NONE;
+}
+
+int
+bcmpkt_lbhdr_field_name_get(int fid, char **name)
+{
+
+    if (name == NULL) {
+        return SHR_E_PARAM;
+    }
+
+    if (fid <= BCMPKT_LBHDR_FID_INVALID ||
+        fid >= BCMPKT_LBHDR_FID_COUNT) {
+        return SHR_E_PARAM;
+    }
+
+    *name = field_names[fid].name;
+
+    return SHR_E_NONE;
+}
+
+int
+bcmpkt_lbhdr_field_id_get(char* name, int *fid)
+{
+    int i;
+
+    if ((name == NULL) || (fid == NULL)) {
+        return SHR_E_PARAM;
+    }
+
+    for (i = BCMPKT_LBHDR_FID_INVALID + 1; i < BCMPKT_LBHDR_FID_COUNT; i++) {
+        if (sal_strcasecmp(field_names[i].name, name) == 0) {
+            *fid = field_names[i].val;
+            return SHR_E_NONE;
+        }
+    }
+
+    return SHR_E_NOT_FOUND;
+}
+
+int
+bcmpkt_lbhdr_fid_support_get(bcmdrd_dev_type_t dev_type,
+                             bcmpkt_lbhdr_fid_support_t *support)
+{
+    int i;
+    bcmpkt_pmd_view_info_t view_info;
+
+    if (dev_type <= BCMDRD_DEV_T_NONE ||
+        dev_type >= BCMDRD_DEV_T_COUNT) {
+        return SHR_E_PARAM;
+    }
+    if (view_info_get[dev_type] == NULL) {
+        return SHR_E_INTERNAL;
+    }
+    if (support == NULL) {
+        return SHR_E_PARAM;
+    }
+    sal_memset(support, 0, sizeof(*support));
+
+    view_info_get[dev_type](&view_info);
+    if ((view_info.view_types == NULL) || (view_info.view_infos == NULL)) {
+        return SHR_E_UNAVAIL;
+    }
+
+    for (i = BCMPKT_LBHDR_FID_INVALID + 1; i < BCMPKT_LBHDR_FID_COUNT; i++) {
+        if (view_info.view_infos[i] >= -1) {
+            SHR_BITSET(support->fbits, i);
+        }
+    }
+
+    return SHR_E_NONE;
+}
+
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/rxpmd/bcmpkt_rxpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/rxpmd/bcmpkt_rxpmd.c
new file mode 100644
index 000000000..ded07cbdb
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/rxpmd/bcmpkt_rxpmd.c
@@ -0,0 +1,412 @@
+/*! \file bcmpkt_rxpmd.c
+ *
+ * RX Packet Meta Data (RXPMD, called EP_TO_CPU in hardware) access interfaces.
+ *
+ */
+/*
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ */
+
+#include <shr/shr_error.h>
+#include <bcmpkt/bcmpkt_rxpmd.h>
+#include <bcmpkt/bcmpkt_rxpmd_internal.h>
+
+#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \
+    extern const bcmpkt_rxpmd_fget_t _bd##_rxpmd_fget;
+#include <bcmdrd/bcmdrd_devlist.h>
+
+#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \
+    &_bd##_rxpmd_fget,
+/*! This sequence should be same as bcmdrd_cm_dev_type_t */
+static const bcmpkt_rxpmd_fget_t *rxpmd_fget[] = {
+    NULL,
+#include <bcmdrd/bcmdrd_devlist.h>
+    NULL
+};
+
+#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \
+    extern const bcmpkt_rxpmd_fset_t _bd##_rxpmd_fset;
+#include <bcmdrd/bcmdrd_devlist.h>
+
+#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \
+    &_bd##_rxpmd_fset,
+/*! This sequence should be same as bcmdrd_cm_dev_type_t */
+static const bcmpkt_rxpmd_fset_t *rxpmd_fset[] = {
+    NULL,
+#include <bcmdrd/bcmdrd_devlist.h>
+    NULL
+};
+
+#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \
+    extern const bcmpkt_rxpmd_figet_t _bd##_rxpmd_figet;
+#include <bcmdrd/bcmdrd_devlist.h>
+
+#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \
+    &_bd##_rxpmd_figet,
+/*! This sequence should be same as bcmdrd_cm_dev_type_t */
+static const bcmpkt_rxpmd_figet_t *rxpmd_figet[] = {
+    NULL,
+#include <bcmdrd/bcmdrd_devlist.h>
+    NULL
+};
+
+#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \
+    &_bd##_rx_reason_decode,
+/*! This sequence should be same as bcmdrd_cm_dev_type_t */
+static void (*reason_fdecode[])(const uint32_t*, bcmpkt_rx_reasons_t*) = {
+    NULL,
+#include <bcmdrd/bcmdrd_devlist.h>
+    NULL
+};
+
+#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \
+    &_bd##_rx_reason_encode,
+static void (*reason_fencode[])(const bcmpkt_rx_reasons_t*, uint32_t*) = {
+    NULL,
+#include <bcmdrd/bcmdrd_devlist.h>
+    NULL
+};
+
+#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \
+    &_bd##_ep_rx_reason_decode,
+/*! This sequence should be same as bcmdrd_cm_dev_type_t */
+static void (*ep_reason_fdecode[])(const uint32_t*, bcmpkt_rx_reasons_t*) = {
+    NULL,
+#include <bcmdrd/bcmdrd_devlist.h>
+    NULL
+};
+
+#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \
+    &_bd##_ep_rx_reason_encode,
+static void (*ep_reason_fencode[])(const bcmpkt_rx_reasons_t*, uint32_t*) = {
+    NULL,
+#include <bcmdrd/bcmdrd_devlist.h>
+    NULL
+};
+
+#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \
+    &_bd##_rxpmd_view_info_get,
+static void (*view_info_get[])(bcmpkt_pmd_view_info_t *) = {
+    NULL,
+#include <bcmdrd/bcmdrd_devlist.h>
+    NULL
+};
+
+
+static const shr_enum_map_t field_names[] =
+{
+    BCMPKT_RXPMD_FIELD_NAME_MAP_INIT
+};
+
+static const shr_enum_map_t reason_names[] =
+{
+    BCMPKT_REASON_NAME_MAP_INIT
+};
+
+int
+bcmpkt_rxpmd_len_get(bcmdrd_dev_type_t dev_type, uint32_t *len)
+{
+
+    if (len == NULL) {
+        return SHR_E_PARAM;
+    }
+
+    if (dev_type <= BCMDRD_DEV_T_NONE ||
+        dev_type >= BCMDRD_DEV_T_COUNT) {
+        return SHR_E_PARAM;
+    }
+
+    if (rxpmd_figet[dev_type] == NULL ||
+        rxpmd_figet[dev_type]->fget[BCMPKT_RXPMD_I_SIZE] == NULL) {
+        return SHR_E_UNAVAIL;
+    }
+
+    *len = rxpmd_figet[dev_type]->fget[BCMPKT_RXPMD_I_SIZE](NULL, NULL) * 4;
+
+    return SHR_E_NONE;
+}
+
+int
+bcmpkt_rxpmd_field_get(bcmdrd_dev_type_t dev_type, uint32_t *rxpmd,
+                       int fid, uint32_t *val)
+{
+
+    if ((rxpmd == NULL) || (val == NULL)) {
+        return SHR_E_PARAM;
+    }
+
+    if (dev_type <= BCMDRD_DEV_T_NONE || dev_type >= BCMDRD_DEV_T_COUNT) {
+        return SHR_E_PARAM;
+    }
+
+    if (fid < 0 || fid >= BCMPKT_RXPMD_FID_COUNT) {
+        return SHR_E_PARAM;
+    }
+
+    if (rxpmd_fget[dev_type] == NULL ||
+        rxpmd_fget[dev_type]->fget[fid] == NULL) {
+        return SHR_E_UNAVAIL;
+    }
+
+    *val = rxpmd_fget[dev_type]->fget[fid](rxpmd);
+
+    return SHR_E_NONE;
+}
+
+int
+bcmpkt_rxpmd_field_set(bcmdrd_dev_type_t dev_type, uint32_t *rxpmd,
+                       int fid, uint32_t val)
+{
+
+    if (rxpmd == NULL) {
+        return SHR_E_PARAM;
+    }
+
+    if (dev_type <= BCMDRD_DEV_T_NONE || dev_type >= BCMDRD_DEV_T_COUNT) {
+        return SHR_E_PARAM;
+    }
+
+    if (fid < 0 || fid >= BCMPKT_RXPMD_FID_COUNT) {
+        return SHR_E_PARAM;
+    }
+
+    if (rxpmd_fset[dev_type] == NULL ||
+        rxpmd_fset[dev_type]->fset[fid] == NULL) {
+        return SHR_E_UNAVAIL;
+    }
+
+    rxpmd_fset[dev_type]->fset[fid](rxpmd, val);
+
+    return SHR_E_NONE;
+}
+
+int
+bcmpkt_rxpmd_mh_get(bcmdrd_dev_type_t dev_type, uint32_t *rxpmd,
+                    uint32_t **hg_hdr)
+{
+    int len;
+
+    if ((rxpmd == NULL) || (hg_hdr == NULL)) {
+        return SHR_E_PARAM;
+    }
+
+    if (dev_type <= BCMDRD_DEV_T_NONE || dev_type >= BCMDRD_DEV_T_COUNT) {
+        return SHR_E_PARAM;
+    }
+
+    if (rxpmd_figet[dev_type] == NULL ||
+        rxpmd_figet[dev_type]->fget[BCMPKT_RXPMD_I_MODULE_HDR] == NULL) {
+        return SHR_E_UNAVAIL;
+    }
+
+    len = rxpmd_figet[dev_type]->fget[BCMPKT_RXPMD_I_MODULE_HDR](rxpmd, hg_hdr);
+    if (len <= 0) {
+        return SHR_E_INTERNAL;
+    }
+
+    return SHR_E_NONE;
+}
+
+int
+bcmpkt_rxpmd_flexdata_get(bcmdrd_dev_type_t dev_type, uint32_t *rxpmd,
+                          uint32_t **flexdata, uint32_t *len)
+{
+
+    if ((rxpmd == NULL) || (flexdata == NULL) || (len == NULL)) {
+        return SHR_E_PARAM;
+    }
+
+    *len = 0;
+    if (dev_type <= BCMDRD_DEV_T_NONE || dev_type >= BCMDRD_DEV_T_COUNT) {
+        return SHR_E_PARAM;
+    }
+
+    if (rxpmd_figet[dev_type] == NULL ||
+        rxpmd_figet[dev_type]->fget[BCMPKT_RXPMD_I_FLEX_DATA] == NULL) {
+        return SHR_E_UNAVAIL;
+    }
+
+    *len = rxpmd_figet[dev_type]->fget[BCMPKT_RXPMD_I_FLEX_DATA](rxpmd, flexdata);
+    if (*len == 0) {
+        return SHR_E_INTERNAL;
+    }
+
+    return SHR_E_NONE;
+}
+
+int
+bcmpkt_rxpmd_reasons_get(bcmdrd_dev_type_t dev_type, uint32_t *rxpmd,
+                         bcmpkt_rx_reasons_t *reasons)
+{
+    uint32_t *reason = NULL;
+    int len;
+    shr_error_t rv = SHR_E_NONE;
+    uint32_t reason_type = BCMPKT_RXPMD_REASON_T_FROM_IP;
+
+    if ((rxpmd == NULL) || (reasons == NULL)) {
+        return SHR_E_PARAM;
+    }
+
+    if (dev_type <= BCMDRD_DEV_T_NONE || dev_type >= BCMDRD_DEV_T_COUNT) {
+        return SHR_E_PARAM;
+    }
+
+    if (rxpmd_figet[dev_type] == NULL ||
+        rxpmd_figet[dev_type]->fget[BCMPKT_RXPMD_I_REASON] == NULL) {
+        return SHR_E_UNAVAIL;
+    }
+
+    BCMPKT_RX_REASON_CLEAR_ALL(*reasons);
+    len = rxpmd_figet[dev_type]->fget[BCMPKT_RXPMD_I_REASON](rxpmd, &reason);
+    if (len <= 0) {
+        return SHR_E_INTERNAL;
+    }
+
+    rv = bcmpkt_rxpmd_field_get(dev_type, rxpmd, BCMPKT_RXPMD_REASON_TYPE,
+                                &reason_type);
+    if ((rv == SHR_E_NONE) && (reason_type == BCMPKT_RXPMD_REASON_T_FROM_EP)) {
+        ep_reason_fdecode[dev_type](reason, reasons);
+    } else {
+        reason_fdecode[dev_type](reason, reasons);
+    }
+
+    return SHR_E_NONE;
+}
+
+int
+bcmpkt_rxpmd_reasons_set(bcmdrd_dev_type_t dev_type,
+                         bcmpkt_rx_reasons_t *reasons, uint32_t *rxpmd)
+{
+    uint32_t *reason = NULL;
+    int len;
+    shr_error_t rv = SHR_E_NONE;
+    uint32_t reason_type = BCMPKT_RXPMD_REASON_T_FROM_IP;
+
+    if ((rxpmd == NULL) || (reasons == NULL)) {
+        return SHR_E_PARAM;
+    }
+
+
+    if (dev_type <= BCMDRD_DEV_T_NONE || dev_type >= BCMDRD_DEV_T_COUNT) {
+        return SHR_E_PARAM;
+    }
+
+    if (rxpmd_figet[dev_type] == NULL ||
+        rxpmd_figet[dev_type]->fget[BCMPKT_RXPMD_I_REASON] == NULL) {
+        return SHR_E_UNAVAIL;
+    }
+    len = rxpmd_figet[dev_type]->fget[BCMPKT_RXPMD_I_REASON](rxpmd, &reason);
+    if (len <= 0) {
+        return SHR_E_UNAVAIL;
+    }
+
+    sal_memset(reason, 0, len * 4);
+    rv = bcmpkt_rxpmd_field_get(dev_type, rxpmd, BCMPKT_RXPMD_REASON_TYPE,
+                                (uint32_t *)&reason_type);
+    if ((rv == SHR_E_NONE) && (reason_type == BCMPKT_RXPMD_REASON_T_FROM_EP)) {
+        ep_reason_fencode[dev_type](reasons, reason);
+    } else {
+        reason_fencode[dev_type](reasons, reason);
+    }
+    return SHR_E_NONE;
+}
+
+int
+bcmpkt_rxpmd_field_name_get(int fid, char **name)
+{
+    if (name == NULL) {
+        return SHR_E_PARAM;
+    }
+    if (fid <= BCMPKT_RXPMD_FID_INVALID ||
+        fid >= BCMPKT_RXPMD_FID_COUNT) {
+        return SHR_E_PARAM;
+    }
+
+    *name = field_names[fid].name;
+
+    return SHR_E_NONE;
+}
+
+int
+bcmpkt_rxpmd_field_id_get(char* name, int *fid)
+{
+    int i;
+
+    if ((name == NULL) || (fid == NULL)) {
+        return SHR_E_PARAM;
+    }
+
+    for (i = BCMPKT_RXPMD_FID_INVALID + 1; i < BCMPKT_RXPMD_FID_COUNT; i++) {
+        if (sal_strcasecmp(field_names[i].name, name) == 0) {
+            *fid = field_names[i].val;
+            return SHR_E_NONE;
+        }
+    }
+
+    return SHR_E_NOT_FOUND;
+}
+
+int
+bcmpkt_rxpmd_fid_support_get(bcmdrd_dev_type_t dev_type,
+                             bcmpkt_rxpmd_fid_support_t *support)
+{
+    int i;
+    bcmpkt_pmd_view_info_t view_info;
+
+    if (dev_type <= BCMDRD_DEV_T_NONE ||
+        dev_type >= BCMDRD_DEV_T_COUNT) {
+        return SHR_E_PARAM;
+    }
+    if (view_info_get[dev_type] == NULL) {
+        return SHR_E_INTERNAL;
+    }
+    if (support == NULL) {
+        return SHR_E_PARAM;
+    }
+    sal_memset(support, 0, sizeof(*support));
+
+    view_info_get[dev_type](&view_info);
+    if ((view_info.view_types == NULL) || (view_info.view_infos == NULL)) {
+        return SHR_E_UNAVAIL;
+    }
+
+    for (i = BCMPKT_RXPMD_FID_INVALID + 1; i < BCMPKT_RXPMD_FID_COUNT; i++) {
+        if (view_info.view_infos[i] >= -1) {
+            SHR_BITSET(support->fbits, i);
+        }
+    }
+
+    return SHR_E_NONE;
+}
+
+int
+bcmpkt_rx_reason_name_get(int reason, char **name)
+{
+
+    if (name == NULL) {
+        return SHR_E_PARAM;
+    }
+
+    if (reason <= BCMPKT_RX_REASON_NONE ||
+        reason > BCMPKT_RX_REASON_COUNT) {
+        return SHR_E_PARAM;
+    }
+
+    *name = reason_names[reason].name;
+
+    return SHR_E_NONE;
+}
+
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/rxpmd/bcmpkt_rxpmd_match_id.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/rxpmd/bcmpkt_rxpmd_match_id.c
new file mode 100644
index 000000000..69bbb495c
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/rxpmd/bcmpkt_rxpmd_match_id.c
@@ -0,0 +1,228 @@
+/*! \file bcmpkt_rxpmd_match_id.c
+ *
+ * RX Packet Metadata API to return the RXPMD match id information.
+ *
+ */
+/*
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ */
+
+#include <shr/shr_error.h>
+#include <shr/shr_bitop.h>
+#include <sal/sal_libc.h>
+#include <bcmlrd/bcmlrd_local_types.h>
+#include <bcmpkt/bcmpkt_rxpmd_match_id.h>
+#include <bcmpkt/bcmpkt_rxpmd_match_id_defs.h>
+
+/* Define stub functions for base variant. */
+#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \
+bcmpkt_rxpmd_match_id_db_info_t * \
+_bc##_rxpmd_match_id_db_info_get(void) {return  NULL;}
+#include <bcmdrd/bcmdrd_devlist.h>
+
+#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \
+bcmpkt_rxpmd_match_id_map_info_t * \
+_bc##_rxpmd_match_id_map_info_get(void) {return  NULL;}
+#include <bcmdrd/bcmdrd_devlist.h>
+
+/* Array of device variant specific api's */
+#define BCMLRD_VARIANT_ENTRY(_bd,_bu,_va,_ve,_vu,_vv,_vo,_vd,_r0,_r1) \
+    &_bd##_vu##_va##_rxpmd_match_id_db_info_get,
+static bcmpkt_rxpmd_match_id_db_info_t * (*rxpmd_match_id_db_info_get[])(void) = {
+    NULL,
+#include <bcmlrd/chip/bcmlrd_chip_variant.h>
+    NULL
+};
+
+/* Array of device variant specific api's */
+#define BCMLRD_VARIANT_ENTRY(_bd,_bu,_va,_ve,_vu,_vv,_vo,_vd,_r0,_r1) \
+    &_bd##_vu##_va##_rxpmd_match_id_map_info_get,
+static bcmpkt_rxpmd_match_id_map_info_t * (*rxpmd_match_id_map_info_get[])(void) = {
+    NULL,
+#include <bcmlrd/chip/bcmlrd_chip_variant.h>
+    NULL
+};
+
+
+int
+bcmpkt_rxpmd_match_id_get(bcmlrd_variant_t  variant,
+                                  char     *name,
+                                  uint32_t *match_id)
+{
+    const bcmpkt_rxpmd_match_id_map_info_t *map_info;
+    const shr_enum_map_t *id_map = NULL;
+    uint32_t idx;
+
+    if ((name == NULL) || (match_id == NULL)) {
+        return SHR_E_PARAM;
+    }
+
+    if (variant <= BCMLRD_VARIANT_T_NONE || variant >= BCMLRD_VARIANT_T_COUNT) {
+        return SHR_E_PARAM;
+    }
+
+    if (rxpmd_match_id_map_info_get[variant] == NULL) {
+        return SHR_E_UNAVAIL;
+    }
+
+    map_info = rxpmd_match_id_map_info_get[variant]();
+    if (map_info == NULL) {
+        return SHR_E_UNAVAIL;
+    }
+
+    id_map = map_info->map;
+    if (id_map == NULL) {
+        return SHR_E_UNAVAIL;
+    }
+
+    idx = 0;
+    while (idx < map_info->num_entries) {
+        if (sal_strcasecmp(id_map->name, name) == 0) {
+            *match_id = id_map->val;
+            return SHR_E_NONE;
+        }
+        idx++;
+        id_map++;
+    }
+
+    return SHR_E_UNAVAIL;
+}
+
+
+int
+bcmpkt_rxpmd_match_id_present(bcmlrd_variant_t variant,
+                                     uint32_t *match_id_array,
+                                     uint32_t  array_len,
+                                     uint32_t  match_id)
+{
+    const bcmpkt_rxpmd_match_id_db_t *db;
+    const bcmpkt_rxpmd_match_id_db_t *db_entry;
+    const bcmpkt_rxpmd_match_id_db_info_t *db_info;
+    uint32_t lsb, msb, match_data;
+    uint32_t start, right_shift;
+
+    if (match_id_array == NULL) {
+        return SHR_E_PARAM;
+    }
+
+    if (variant <= BCMLRD_VARIANT_T_NONE || variant >= BCMLRD_VARIANT_T_COUNT) {
+        return SHR_E_PARAM;
+    }
+
+    if (rxpmd_match_id_db_info_get[variant] == NULL) {
+        return SHR_E_UNAVAIL;
+    }
+
+    db_info = rxpmd_match_id_db_info_get[variant]();
+    if (db_info == NULL) {
+        return SHR_E_UNAVAIL;
+    }
+
+    db = db_info->db;
+    if (db == NULL) {
+        return SHR_E_UNAVAIL;
+    }
+
+    /* Check to see if db_entry is in the valid range */
+    if (match_id >= db_info->num_entries) {
+        return SHR_E_PARAM;
+    }
+
+    db_entry = &db[match_id];
+
+    start = db_entry->match_minbit / 32;
+    if (start >= array_len) {
+        return SHR_E_PARAM;
+    }
+
+    /* Extract the bits for the match_id from the match_id data */
+    right_shift = db_entry->match_minbit % 32;
+    lsb = match_id_array[start] >> right_shift;
+
+    if (start == 1) {
+        msb = 0;
+    } else {
+        msb = match_id_array[start + 1] & ((1 << right_shift) - 1);
+        msb <<= (32 - right_shift);
+    }
+
+    /* Mask off  the data and see if it matched for the match_id */
+    match_data = msb | lsb;
+    match_data &= db_entry->match_mask;
+    if (match_data == db_entry->match) {
+        return SHR_E_NONE;
+    }
+
+    return SHR_E_NOT_FOUND;
+}
+
+int
+bcmpkt_rxpmd_match_id_from_arc_id_present(bcmlrd_variant_t variant,
+                                          uint32_t *arc_id_array,
+                                          uint32_t  array_len,
+                                          uint32_t  match_id)
+{
+    uint64_t arc_id;
+    const bcmpkt_rxpmd_match_id_db_t *db;
+    const bcmpkt_rxpmd_match_id_db_t *db_entry;
+    const bcmpkt_rxpmd_match_id_db_info_t *db_info;
+
+    if ((arc_id_array == NULL) || (array_len != 2)) {
+        return SHR_E_PARAM;
+    }
+
+    if (variant <= BCMLRD_VARIANT_T_NONE || variant >= BCMLRD_VARIANT_T_COUNT) {
+        return SHR_E_PARAM;
+    }
+
+    if (rxpmd_match_id_db_info_get[variant] == NULL) {
+        return SHR_E_UNAVAIL;
+    }
+
+    db_info = rxpmd_match_id_db_info_get[variant]();
+    if (db_info == NULL) {
+        return SHR_E_UNAVAIL;
+    }
+
+    db = db_info->db;
+    if (db == NULL) {
+        return SHR_E_UNAVAIL;
+    }
+
+    /* Check to see if db_entry is in the valid range */
+    if (match_id >= db_info->num_entries) {
+        return SHR_E_PARAM;
+    }
+
+    db_entry = &db[match_id];
+
+    if (db_entry->zone_bmp != NULL) {
+
+        arc_id = (((uint64_t)arc_id_array[1] << 32) | arc_id_array[0]);
+        arc_id = (arc_id & db_entry->arc_id_mask) >> db_entry->zone_minbit;
+
+        /* Check to see if arc id is in the valid range */
+        if (arc_id >= db_entry->num_zone_bmp_words * 32) {
+            return SHR_E_NOT_FOUND;
+        }
+
+        if (SHR_BITGET(db_entry->zone_bmp, arc_id)) {
+            return SHR_E_NONE;
+        }
+    }
+
+    return SHR_E_NOT_FOUND;
+}
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/txpmd/bcmpkt_txpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/txpmd/bcmpkt_txpmd.c
new file mode 100644
index 000000000..b5556cccd
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/txpmd/bcmpkt_txpmd.c
@@ -0,0 +1,256 @@
+/*! \file bcmpkt_txpmd.c
+ *
+ * TX Packet MetaData (TXPMD, called SOBMH in hardware) access interface.
+ *
+ */
+/*
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ */
+
+#include <shr/shr_error.h>
+#include <bcmpkt/bcmpkt_txpmd.h>
+#include <bcmpkt/bcmpkt_txpmd_internal.h>
+#include <bcmpkt/bcmpkt_pmd_internal.h>
+
+
+#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \
+    extern const bcmpkt_txpmd_fget_t _bd##_txpmd_fget;
+#include <bcmdrd/bcmdrd_devlist.h>
+
+#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \
+    &_bd##_txpmd_fget,
+static const bcmpkt_txpmd_fget_t *txpmd_fget[] = {
+    NULL,
+#include <bcmdrd/bcmdrd_devlist.h>
+    NULL
+};
+
+#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \
+    extern const bcmpkt_txpmd_fset_t _bd##_txpmd_fset;
+#include <bcmdrd/bcmdrd_devlist.h>
+
+#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \
+    &_bd##_txpmd_fset,
+static const bcmpkt_txpmd_fset_t *txpmd_fset[] = {
+    NULL,
+#include <bcmdrd/bcmdrd_devlist.h>
+    NULL
+};
+
+#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \
+    extern const bcmpkt_txpmd_figet_t _bd##_txpmd_figet;
+#include <bcmdrd/bcmdrd_devlist.h>
+
+#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \
+    &_bd##_txpmd_figet,
+static const bcmpkt_txpmd_figet_t *txpmd_figet[] = {
+    NULL,
+#include <bcmdrd/bcmdrd_devlist.h>
+    NULL
+};
+
+#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \
+    &_bd##_txpmd_view_info_get,
+static void (*view_info_get[])(bcmpkt_pmd_view_info_t *info) = {
+    NULL,
+#include <bcmdrd/bcmdrd_devlist.h>
+    NULL
+};
+
+static const shr_enum_map_t field_names[] =
+{
+    BCMPKT_TXPMD_FIELD_NAME_MAP_INIT
+};
+
+int
+bcmpkt_txpmd_len_get(bcmdrd_dev_type_t dev_type, uint32_t *len)
+{
+    if (len == NULL) {
+        return SHR_E_PARAM;
+    }
+
+    if (dev_type <= BCMDRD_DEV_T_NONE ||
+        dev_type >= BCMDRD_DEV_T_COUNT) {
+        return SHR_E_PARAM;
+    }
+
+    if (txpmd_figet[dev_type] == NULL ||
+        txpmd_figet[dev_type]->fget[BCMPKT_TXPMD_I_SIZE] == NULL) {
+        return SHR_E_UNAVAIL;
+    }
+
+    *len = txpmd_figet[dev_type]->fget[BCMPKT_TXPMD_I_SIZE](NULL, NULL) * 4;
+
+    return SHR_E_NONE;
+}
+
+int
+bcmpkt_txpmd_field_get(bcmdrd_dev_type_t dev_type, uint32_t *txpmd,
+                       int fid, uint32_t *val)
+{
+
+    if ((txpmd == NULL) || (val == NULL)) {
+        return SHR_E_PARAM;
+    }
+
+    if (dev_type <= BCMDRD_DEV_T_NONE ||
+        dev_type >= BCMDRD_DEV_T_COUNT) {
+        return SHR_E_PARAM;
+    }
+
+    if (fid < 0 || fid >= BCMPKT_TXPMD_FID_COUNT) {
+        return SHR_E_PARAM;
+    }
+
+    if (txpmd_fget[dev_type] == NULL ||
+        txpmd_fget[dev_type]->fget[fid] == NULL) {
+        return SHR_E_UNAVAIL;
+    }
+
+    *val = txpmd_fget[dev_type]->fget[fid](txpmd);
+
+    return SHR_E_NONE;
+}
+
+int
+bcmpkt_txpmd_field_set(bcmdrd_dev_type_t dev_type, uint32_t *txpmd,
+                       int fid, uint32_t val)
+{
+    if (txpmd == NULL) {
+        return SHR_E_PARAM;
+    }
+
+    if (dev_type <= BCMDRD_DEV_T_NONE ||
+        dev_type >= BCMDRD_DEV_T_COUNT) {
+        return SHR_E_PARAM;
+    }
+
+    if (fid < 0 || fid >= BCMPKT_TXPMD_FID_COUNT) {
+        return SHR_E_PARAM;
+    }
+
+    if (txpmd_fset[dev_type] == NULL ||
+        txpmd_fset[dev_type]->fset[fid] == NULL) {
+        return SHR_E_UNAVAIL;
+    }
+
+    txpmd_fset[dev_type]->fset[fid](txpmd, val);
+
+    return SHR_E_NONE;
+}
+
+int
+bcmpkt_txpmd_field_name_get(int fid, char **name)
+{
+    if (name == NULL) {
+        return SHR_E_PARAM;
+    }
+
+    if (fid <= BCMPKT_TXPMD_FID_INVALID ||
+        fid >= BCMPKT_TXPMD_FID_COUNT) {
+        return SHR_E_PARAM;
+    }
+
+    *name = field_names[fid].name;
+
+    return SHR_E_NONE;
+}
+
+int
+bcmpkt_txpmd_field_id_get(char* name, int *fid)
+{
+    int i;
+
+    if ((name == NULL) || (fid == NULL)) {
+        return SHR_E_PARAM;
+    }
+
+    for (i = BCMPKT_TXPMD_FID_INVALID + 1; i < BCMPKT_TXPMD_FID_COUNT; i++) {
+        if (sal_strcasecmp(field_names[i].name, name) == 0) {
+            *fid = field_names[i].val;
+            return SHR_E_NONE;
+        }
+    }
+
+    return SHR_E_NOT_FOUND;
+}
+
+int
+bcmpkt_txpmd_fid_support_get(bcmdrd_dev_type_t dev_type,
+                             bcmpkt_txpmd_fid_support_t *support)
+{
+    int i;
+    bcmpkt_pmd_view_info_t view_info;
+
+    if (dev_type <= BCMDRD_DEV_T_NONE ||
+        dev_type >= BCMDRD_DEV_T_COUNT) {
+        return SHR_E_PARAM;
+    }
+    if (view_info_get[dev_type] == NULL) {
+        return SHR_E_INTERNAL;
+    }
+    if (support == NULL) {
+        return SHR_E_PARAM;
+    }
+    sal_memset(support, 0, sizeof(*support));
+
+    view_info_get[dev_type](&view_info);
+    if ((view_info.view_types == NULL) || (view_info.view_infos == NULL)) {
+        return SHR_E_UNAVAIL;
+    }
+
+    for (i = BCMPKT_TXPMD_FID_INVALID + 1; i < BCMPKT_TXPMD_FID_COUNT; i++) {
+        if (view_info.view_infos[i] >= -1) {
+            SHR_BITSET(support->fbits, i);
+        }
+    }
+
+    return SHR_E_NONE;
+}
+
+int
+bcmpkt_txpmd_fid_view_get(bcmdrd_dev_type_t dev_type,
+                          int fid, int *view)
+
+{
+    bcmpkt_pmd_view_info_t view_info;
+
+    if (dev_type <= BCMDRD_DEV_T_NONE ||
+        dev_type >= BCMDRD_DEV_T_COUNT) {
+        return SHR_E_PARAM;
+    }
+
+    if (view == NULL) {
+        return SHR_E_PARAM;
+    }
+
+    if (fid <= BCMPKT_TXPMD_FID_INVALID ||
+        fid >= BCMPKT_TXPMD_FID_COUNT) {
+        return SHR_E_PARAM;
+    }
+
+    if (view_info_get[dev_type] == NULL) {
+        return SHR_E_INTERNAL;
+    }
+
+    view_info_get[dev_type](&view_info);
+    if ((view_info.view_types == NULL) || (view_info.view_infos == NULL)) {
+        return SHR_E_UNAVAIL;
+    }
+    *view = view_info.view_infos[fid];
+
+    return SHR_E_NONE;
+}
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/util/bcmpkt_util.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/util/bcmpkt_util.c
new file mode 100644
index 000000000..162127bdf
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/util/bcmpkt_util.c
@@ -0,0 +1,78 @@
+/*! \file bcmpkt_util.c
+ *
+ * BCMPKT utility functions.
+ *
+ */
+/*
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ */
+
+#include <sal/sal_libc.h>
+#include <shr/shr_types.h>
+#include <bcmdrd/bcmdrd_types.h>
+#include <bcmlrd/chip/bcmlrd_chip_variant.h>
+#include <bcmpkt/bcmpkt_util.h>
+
+/*! This sequence should be same as bcmdrd_cm_dev_type_t */
+#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \
+    {#_bd, BCMDRD_DEV_T_##_bd},
+static const struct {
+    char *dev_name;
+    bcmdrd_dev_type_t dev_type;
+} device_types[] = {
+    {"none", BCMDRD_DEV_T_NONE},
+#include <bcmdrd/bcmdrd_devlist.h>
+    {"invalid", BCMDRD_DEV_T_COUNT}
+};
+
+#define BCMLRD_VARIANT_ENTRY(_bd,_bu,_va,_ve,_vu,_vv,_vo,_vd,_r0,_r1)\
+    {#_bd, #_ve, BCMLRD_VARIANT_T_##_bd##_##_ve},
+static const struct {
+    char *dev_name;
+    char *var_name;
+    bcmlrd_variant_t var_type;
+} variant_types[] = {
+    {"none", "none", BCMLRD_VARIANT_T_NONE},
+#include <bcmlrd/chip/bcmlrd_chip_variant.h>
+    {"invalid", "invalid", BCMLRD_VARIANT_T_COUNT}
+};
+
+bcmdrd_dev_type_t
+bcmpkt_util_dev_type_get(const char *dev_name)
+{
+    int idx;
+
+    for (idx = 0; idx < COUNTOF(device_types); idx++) {
+        if (sal_strcasecmp(dev_name, device_types[idx].dev_name) == 0) {
+            return device_types[idx].dev_type;
+        }
+    }
+    return BCMDRD_DEV_T_NONE;
+}
+
+bcmlrd_variant_t
+bcmpkt_util_variant_type_get(const char *dev_name, const char *var_name)
+{
+    int idx;
+
+    for (idx = 0; idx < COUNTOF(variant_types); idx++) {
+        if (sal_strcasecmp(dev_name, variant_types[idx].dev_name) == 0 &&
+            sal_strcasecmp(var_name, variant_types[idx].var_name) == 0) {
+            return variant_types[idx].var_type;
+        }
+    }
+    return BCMLRD_VARIANT_T_NONE;
+}
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_bcmpkt_rxpmd_match_id.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_bcmpkt_rxpmd_match_id.c
new file mode 100644
index 000000000..04d384f9e
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_bcmpkt_rxpmd_match_id.c
@@ -0,0 +1,6760 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) bcm56690_a0_dna_6_5_29_0_1_sf_match_id_info.yml
+ * for device bcm56690_a0 and variant dna_6_5_29_0_1.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+
+#include <bcmpkt/bcmpkt_rxpmd_match_id.h>
+#include <bcmpkt/xfcr/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_bcmpkt_rxpmd_match_id_defs.h>
+
+static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l2_hdr_cntag[1] =
+{
+    0x366c,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l2_hdr_itag[1] =
+{
+    0x78f0,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l2_hdr_l2[1] =
+{
+    0x1fffe,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l2_hdr_otag[1] =
+{
+    0xff00,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l2_hdr_snap_or_llc[1] =
+{
+    0x1e4c8,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_arp[1] =
+{
+    0x4,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_auth_ext_1[32] =
+{
+    0x10,
+    0x4000,
+    0x2007f8,
+    0x0,
+    0x0,
+    0xfff00000,
+    0xffffffff,
+    0xffffffff,
+    0x1f,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x10000,
+    0x4000000,
+    0x7f8000,
+    0x2,
+    0x0,
+    0x0,
+    0xffffffff,
+    0xffffffff,
+    0x1ffff,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_auth_ext_2[45] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x7fe00000,
+    0x0,
+    0x0,
+    0x1ff80,
+    0x0,
+    0xfe000000,
+    0x7,
+    0x0,
+    0x3ff,
+    0x0,
+    0xffc0000,
+    0x0,
+    0x0,
+    0x1ff8,
+    0x0,
+    0xf0000000,
+    0x3f,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x7fe,
+    0x0,
+    0x1ff80000,
+    0x0,
+    0x0,
+    0x7fe0,
+    0x0,
+    0x3ff000,
+    0x0,
+    0xc0000000,
+    0xff,
+    0x0,
+    0x1ff8000,
+    0x0,
+    0x0,
+    0x3ff00,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_bfd[47] =
+{
+    0x0,
+    0x0,
+    0x20000080,
+    0x0,
+    0x0,
+    0x8000010,
+    0x4010020,
+    0x808020,
+    0x802002,
+    0x801004,
+    0x80080202,
+    0x80100200,
+    0x8020200,
+    0x8010040,
+    0x4010020,
+    0x1001004,
+    0x802004,
+    0x40101004,
+    0x40080200,
+    0x20080100,
+    0x808020,
+    0x801004,
+    0x40401002,
+    0x100,
+    0x0,
+    0x80000,
+    0x200,
+    0x0,
+    0x10000,
+    0x10020080,
+    0x8020040,
+    0x2002008,
+    0x1004008,
+    0x80202008,
+    0x200800,
+    0x20200801,
+    0x10040080,
+    0x10020080,
+    0x1004040,
+    0x2004010,
+    0x1004008,
+    0x80200401,
+    0x80100400,
+    0x8020200,
+    0x1004008,
+    0x1002008,
+    0x100404,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_dest_opt_ext_1[35] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xffffffc0,
+    0xffffffff,
+    0x7fffff,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xfffc0000,
+    0xffffffff,
+    0xffffffff,
+    0x7,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_dest_opt_ext_2[45] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x80000000,
+    0x1ff,
+    0x0,
+    0x7fe0000,
+    0x0,
+    0x0,
+    0x1ff8,
+    0x0,
+    0xffc00,
+    0x0,
+    0xf0000000,
+    0x3f,
+    0x0,
+    0x7fe000,
+    0x0,
+    0x0,
+    0xffc0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x1ff800,
+    0x0,
+    0xe0000000,
+    0x7f,
+    0x0,
+    0x1ff8000,
+    0x0,
+    0xffc00000,
+    0x0,
+    0x0,
+    0x3ff00,
+    0x0,
+    0xfe000000,
+    0x7,
+    0x0,
+    0xffc0000,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_esp_ext[45] =
+{
+    0x0,
+    0x0,
+    0x400000,
+    0x0,
+    0x0,
+    0x0,
+    0x200,
+    0x0,
+    0x8000000,
+    0x0,
+    0x800000,
+    0x2000,
+    0x0,
+    0x100000,
+    0x0,
+    0x0,
+    0x40,
+    0x0,
+    0x800000,
+    0x0,
+    0x0,
+    0x10000,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x4,
+    0x0,
+    0x0,
+    0x200000,
+    0x0,
+    0x0,
+    0x80,
+    0x0,
+    0x2000008,
+    0x0,
+    0x0,
+    0x1,
+    0x0,
+    0x40000,
+    0x0,
+    0x0,
+    0x8,
+    0x0,
+    0x10000000,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ethertype[24] =
+{
+    0x1e,
+    0x4000,
+    0xffe007f8,
+    0x3,
+    0x800,
+    0xfffc00ff,
+    0xffffffff,
+    0xffffffff,
+    0xffffffdf,
+    0xffffffff,
+    0xffffffff,
+    0xffffffff,
+    0xffffffff,
+    0xffffffff,
+    0xffffffff,
+    0xffffffff,
+    0xffffffff,
+    0xffffffff,
+    0xffffffff,
+    0xffffffff,
+    0xffffffff,
+    0xffffffff,
+    0xffffffff,
+    0x6fff,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_frag_ext_1[37] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xff000000,
+    0xffffffff,
+    0x7fffffff,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xfffffff0,
+    0xffffffff,
+    0x7ff,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_frag_ext_2[46] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xffc00,
+    0x0,
+    0xf0000000,
+    0x3f,
+    0x0,
+    0x0,
+    0x0,
+    0x7fe00000,
+    0x0,
+    0x0,
+    0x1ff80,
+    0x0,
+    0xff000000,
+    0x3,
+    0x0,
+    0x7fe0000,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xffc00000,
+    0x0,
+    0x0,
+    0x3ff00,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x7fe,
+    0x0,
+    0x1ff80000,
+    0x0,
+    0x0,
+    0x3ff0,
+    0x0,
+    0xe0000000,
+    0x7f,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_hop_by_hop_ext_1[39] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x80000000,
+    0xffffffff,
+    0xffffffff,
+    0xffff,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xfffff800,
+    0xffffffff,
+    0xfffffff,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_hop_by_hop_ext_2[46] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x3ff00000,
+    0x0,
+    0x0,
+    0xffc0,
+    0x0,
+    0xffc000,
+    0x0,
+    0x80000000,
+    0x1ff,
+    0x0,
+    0x7fe0000,
+    0x0,
+    0x0,
+    0xffc,
+    0x0,
+    0xf8000000,
+    0x1f,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x3ff,
+    0x0,
+    0xffc0000,
+    0x0,
+    0xfc000000,
+    0xf,
+    0x0,
+    0x1ff800,
+    0x0,
+    0xe0000000,
+    0x7f,
+    0x0,
+    0xffc000,
+    0x0,
+    0x0,
+    0x1ff80,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_icmp[47] =
+{
+    0x0,
+    0x4000,
+    0x800000,
+    0x0,
+    0x800,
+    0x400000,
+    0x40200801,
+    0x10000401,
+    0x20040100,
+    0x10050080,
+    0x4004000,
+    0x5008010,
+    0x400010,
+    0x400802,
+    0x200a01,
+    0x20090080,
+    0x28040100,
+    0x2000080,
+    0x2004010,
+    0x1005008,
+    0x20000400,
+    0x10040080,
+    0x200a0,
+    0x8,
+    0x4000000,
+    0x0,
+    0x8,
+    0x800000,
+    0x0,
+    0x801004,
+    0x401402,
+    0x40100100,
+    0x50080200,
+    0x4000100,
+    0x8010040,
+    0x10050,
+    0x802004,
+    0xa01004,
+    0x90080002,
+    0x40100200,
+    0x80280,
+    0x4010020,
+    0x5008020,
+    0x400010,
+    0x40080200,
+    0x200a0100,
+    0x8000,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_igmp[29] =
+{
+    0x0,
+    0x0,
+    0x1200000,
+    0x0,
+    0x0,
+    0x40000,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x12,
+    0x0,
+    0x40000000,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv4[29] =
+{
+    0x18,
+    0x4000,
+    0xffe007f8,
+    0x3,
+    0x800,
+    0x400ff,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x18000,
+    0x4000000,
+    0x7f8000,
+    0x3ffe,
+    0x800000,
+    0x400ff000,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv6[47] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xfff80000,
+    0xffffffff,
+    0xffffffff,
+    0xffffffdf,
+    0xffffffff,
+    0xffffffff,
+    0xffffffff,
+    0xffffffff,
+    0xffffffff,
+    0xffffffff,
+    0xffffffff,
+    0xffffffff,
+    0xffffffff,
+    0xffffffff,
+    0xffffffff,
+    0xffffffff,
+    0xffffffff,
+    0xffffffff,
+    0xfff,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x80000000,
+    0xffffffff,
+    0xffffffff,
+    0xfffdffff,
+    0xffffffff,
+    0xffffffff,
+    0xffffffff,
+    0xffffffff,
+    0xffffffff,
+    0xffffffff,
+    0xffffffff,
+    0xffffffff,
+    0xffffffff,
+    0xffffffff,
+    0xffffffff,
+    0xffffffff,
+    0xffffffff,
+    0xffffffff,
+    0xffffff,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_p_1588[47] =
+{
+    0x0,
+    0x0,
+    0x40000100,
+    0x0,
+    0x0,
+    0x10000020,
+    0x8020040,
+    0x1010040,
+    0x1004004,
+    0x1002008,
+    0x100404,
+    0x200401,
+    0x10040401,
+    0x10020080,
+    0x8020040,
+    0x2002008,
+    0x1004008,
+    0x80202008,
+    0x80100400,
+    0x40100200,
+    0x1010040,
+    0x1002008,
+    0x80802004,
+    0x200,
+    0x0,
+    0x100000,
+    0x400,
+    0x0,
+    0x20000,
+    0x20040100,
+    0x10040080,
+    0x4004010,
+    0x2008010,
+    0x404010,
+    0x401001,
+    0x40401002,
+    0x20080100,
+    0x20040100,
+    0x2008080,
+    0x4008020,
+    0x2008010,
+    0x400802,
+    0x200801,
+    0x10040401,
+    0x2008010,
+    0x2004010,
+    0x200808,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_prog_ext_1[42] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xfffe0000,
+    0xffffffff,
+    0xffffffff,
+    0x3,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xe0000000,
+    0xffffffff,
+    0xffffffff,
+    0x3fff,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_prog_ext_2[46] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x80000000,
+    0x1ff,
+    0x0,
+    0x7fe0000,
+    0x0,
+    0xfe000000,
+    0x7,
+    0x0,
+    0xffc00,
+    0x0,
+    0xf0000000,
+    0x3f,
+    0x0,
+    0x7fe000,
+    0x0,
+    0x0,
+    0xffc0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x1ff800,
+    0x0,
+    0xe0000000,
+    0x7f,
+    0x0,
+    0x7fe0,
+    0x0,
+    0xffc00000,
+    0x0,
+    0x0,
+    0x3ff00,
+    0x0,
+    0xfe000000,
+    0x7,
+    0x0,
+    0xffc0000,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rarp[24] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x2000,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rout_ext_1[44] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xfffffffc,
+    0xffffffff,
+    0x7ffff,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xffffc000,
+    0xffffffff,
+    0x7fffffff,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rout_ext_2[47] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x7fe00,
+    0x0,
+    0xf8000000,
+    0x1f,
+    0x0,
+    0x1ff8,
+    0x0,
+    0x3ff00000,
+    0x0,
+    0x0,
+    0xffc0,
+    0x0,
+    0xff800000,
+    0x1,
+    0x0,
+    0x3ff0000,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x7fe00000,
+    0x0,
+    0x0,
+    0x1ff80,
+    0x0,
+    0x1ff8000,
+    0x0,
+    0x0,
+    0x3ff,
+    0x0,
+    0xffc0000,
+    0x0,
+    0x0,
+    0x1ff8,
+    0x0,
+    0xf0000000,
+    0x3f,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_first_4bytes[47] =
+{
+    0x0,
+    0x0,
+    0xe000038,
+    0x0,
+    0x0,
+    0x3800007,
+    0x1c0700e,
+    0xe038380e,
+    0xc0380e00,
+    0xe0380701,
+    0x380380e0,
+    0x380700e0,
+    0x380e0e0,
+    0x380701c,
+    0xc1c0700e,
+    0xc0700701,
+    0xc0380e01,
+    0x1c070701,
+    0x1c0380e0,
+    0xe038070,
+    0xc038380e,
+    0xe0380701,
+    0x1c1c0700,
+    0x70,
+    0x0,
+    0x38000,
+    0xe0,
+    0x0,
+    0x7000,
+    0x700e038,
+    0x8380e01c,
+    0x80e00e03,
+    0x80701c03,
+    0x380e0e03,
+    0x700e0380,
+    0xe0e0380,
+    0x701c038,
+    0x700e038,
+    0x701c1c,
+    0x80e01c07,
+    0x70701c03,
+    0x380e01c0,
+    0x380701c0,
+    0x8380e0e0,
+    0x80701c03,
+    0xc0700e03,
+    0x701c1,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_last_16bytes[47] =
+{
+    0x0,
+    0x0,
+    0xc000030,
+    0x0,
+    0x0,
+    0x3000006,
+    0x180600c,
+    0xc030300c,
+    0x80300c00,
+    0xc0300601,
+    0x300300c0,
+    0x300600c0,
+    0x300c0c0,
+    0x3006018,
+    0x8180600c,
+    0x80600601,
+    0x80300c01,
+    0x18060601,
+    0x180300c0,
+    0xc030060,
+    0x8030300c,
+    0xc0300601,
+    0x18180600,
+    0x60,
+    0x0,
+    0x30000,
+    0xc0,
+    0x0,
+    0x6000,
+    0x600c030,
+    0x300c018,
+    0xc00c03,
+    0x601803,
+    0x300c0c03,
+    0x600c0300,
+    0xc0c0300,
+    0x6018030,
+    0x600c030,
+    0x601818,
+    0xc01806,
+    0x60601803,
+    0x300c0180,
+    0x30060180,
+    0x300c0c0,
+    0x601803,
+    0x80600c03,
+    0x60181,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_udp[47] =
+{
+    0x0,
+    0x0,
+    0xf00003c0,
+    0x0,
+    0x0,
+    0x3c000078,
+    0x1e0780f0,
+    0x3c3c0f0,
+    0x3c0f00f,
+    0x3c0781e,
+    0xc03c0f0f,
+    0xc0780f03,
+    0x3c0f0f03,
+    0x3c0781e0,
+    0x1e0780f0,
+    0x780781e,
+    0x3c0f01e,
+    0xe078781e,
+    0xe03c0f01,
+    0xf03c0781,
+    0x3c3c0f0,
+    0x3c0781e,
+    0xe1e0780f,
+    0x781,
+    0x0,
+    0x3c0000,
+    0xf00,
+    0x0,
+    0x78000,
+    0x780f03c0,
+    0x3c0f01e0,
+    0xf00f03c,
+    0x781e03c,
+    0xc0f0f03c,
+    0x80f03c03,
+    0xf0f03c07,
+    0x781e03c0,
+    0x780f03c0,
+    0x781e1e0,
+    0xf01e078,
+    0x8781e03c,
+    0xc0f01e07,
+    0xc0781e03,
+    0x3c0f0f03,
+    0x781e03c,
+    0x780f03c,
+    0x781e1e,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l3[24] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x4000,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l4[47] =
+{
+    0x0,
+    0x0,
+    0x400,
+    0x1,
+    0x0,
+    0x40000080,
+    0x20080100,
+    0x4040100,
+    0x4010010,
+    0x4008020,
+    0x401010,
+    0x801004,
+    0x40101004,
+    0x40080200,
+    0x20080100,
+    0x8008020,
+    0x4010020,
+    0x808020,
+    0x401002,
+    0x400802,
+    0x4040101,
+    0x4008020,
+    0x2008010,
+    0x802,
+    0x0,
+    0x400000,
+    0x1000,
+    0x0,
+    0x80000,
+    0x80100400,
+    0x40100200,
+    0x10010040,
+    0x8020040,
+    0x1010040,
+    0x1004004,
+    0x1004008,
+    0x80200401,
+    0x80100400,
+    0x8020200,
+    0x10020080,
+    0x8020040,
+    0x1002008,
+    0x802004,
+    0x40101004,
+    0x8020040,
+    0x8010040,
+    0x802020,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l5[47] =
+{
+    0x0,
+    0x0,
+    0x88000220,
+    0x0,
+    0x0,
+    0x22000044,
+    0x11044088,
+    0x82222088,
+    0x2208808,
+    0x82204411,
+    0x20220888,
+    0x20440882,
+    0x22088882,
+    0x22044110,
+    0x11044088,
+    0x4404411,
+    0x2208811,
+    0x10444411,
+    0x10220881,
+    0x88220441,
+    0x2222088,
+    0x82204411,
+    0x11104408,
+    0x441,
+    0x0,
+    0x220000,
+    0x880,
+    0x0,
+    0x44000,
+    0x44088220,
+    0x22088110,
+    0x8808822,
+    0x4411022,
+    0x20888822,
+    0x40882202,
+    0x88882204,
+    0x44110220,
+    0x44088220,
+    0x4411110,
+    0x8811044,
+    0x44411022,
+    0x20881104,
+    0x20441102,
+    0x22088882,
+    0x4411022,
+    0x4408822,
+    0x441111,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_wesp_ext_1[47] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x2,
+    0x800,
+    0x400ff,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xf8000000,
+    0xffffffff,
+    0xffffffff,
+    0xfff,
+    0x0,
+    0x0,
+    0x2000,
+    0x800000,
+    0x400ff000,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xffffff80,
+    0xffffffff,
+    0xffffff,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_wesp_ext_2[47] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xf8000000,
+    0x1f,
+    0x0,
+    0x7fe000,
+    0x0,
+    0x7fe00000,
+    0x0,
+    0x0,
+    0xffc0,
+    0x0,
+    0xff000000,
+    0x3,
+    0x0,
+    0x7fe00,
+    0x0,
+    0x0,
+    0xffc,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x1ff80,
+    0x0,
+    0xfe000000,
+    0x7,
+    0x0,
+    0x7fe,
+    0x0,
+    0xffc0000,
+    0x0,
+    0x0,
+    0x3ff0,
+    0x0,
+    0x7fe00000,
+    0x0,
+    0x0,
+    0xffc000,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_cntag[2] =
+{
+    0x33033198,
+    0xcc66066,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_gbp_ethernet_shim[2] =
+{
+    0x44044220,
+    0x11088088,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_hg3_base[2] =
+{
+    0xffc00000,
+    0xffffffff,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_hg3_ext_0[2] =
+{
+    0x0,
+    0xfffff800,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_itag[2] =
+{
+    0xf80f87c0,
+    0x3e1f01f0,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_l2[2] =
+{
+    0xfffffffe,
+    0xffffffff,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_otag[2] =
+{
+    0x1ff800,
+    0x7fe003ff,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_snap_or_llc[2] =
+{
+    0xa23a2510,
+    0xe8944744,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_arp[1] =
+{
+    0x4,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_auth_ext_1[13] =
+{
+    0x10,
+    0x0,
+    0x4,
+    0x20003df6,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xfbfdf7c0,
+    0x7dfefbfe,
+    0xbeff7dff,
+    0x7beff7df,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_auth_ext_2[34] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x3df780,
+    0x0,
+    0x0,
+    0x0,
+    0xf7de,
+    0x0,
+    0x0,
+    0x78000000,
+    0x3df,
+    0x0,
+    0x0,
+    0x7de00000,
+    0xf,
+    0x0,
+    0x0,
+    0xf0000000,
+    0x7be,
+    0x0,
+    0x0,
+    0xfbc00000,
+    0x1e,
+    0x0,
+    0x0,
+    0x0,
+    0x1efbc00,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_bfd[39] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x40,
+    0x0,
+    0x8,
+    0x0,
+    0x0,
+    0x2000,
+    0x20004000,
+    0x10002000,
+    0x8001000,
+    0x800100,
+    0x800100,
+    0x400080,
+    0x200040,
+    0x20004,
+    0x20004,
+    0x20002,
+    0x10002001,
+    0x10000000,
+    0x8000800,
+    0x4000400,
+    0x400200,
+    0x20,
+    0x40008,
+    0x20004,
+    0x20010002,
+    0x20001000,
+    0x10001000,
+    0x8000800,
+    0x800400,
+    0x100040,
+    0x20002,
+    0x80010001,
+    0x40008000,
+    0x4000800,
+    0x41000200,
+    0x4444,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dest_opt_ext_1[17] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xfbeff7df,
+    0xfdf7fbef,
+    0x7efbfdf7,
+    0x1efbfdf,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dest_opt_ext_2[35] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xfbc00000,
+    0x1e,
+    0x0,
+    0x0,
+    0x7bef0000,
+    0x0,
+    0x0,
+    0x0,
+    0x1efbc00,
+    0x0,
+    0x0,
+    0x0,
+    0x7bef0,
+    0x0,
+    0x0,
+    0x0,
+    0x3df7800,
+    0x0,
+    0x0,
+    0x0,
+    0xf7de0,
+    0x0,
+    0x0,
+    0x0,
+    0xde000000,
+    0xf7,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_esp_ext[35] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x40000000,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x20,
+    0x0,
+    0x0,
+    0x80000000,
+    0x0,
+    0x0,
+    0x2000000,
+    0x2000000,
+    0x0,
+    0x0,
+    0x0,
+    0x80000,
+    0x0,
+    0x0,
+    0x0,
+    0x4000000,
+    0x0,
+    0x0,
+    0x0,
+    0x100000,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x100,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ethertype[39] =
+{
+    0x1e,
+    0x0,
+    0x4,
+    0xe0003df6,
+    0xe22fffff,
+    0xfbe,
+    0x0,
+    0x200,
+    0x1efb00,
+    0xfbfdf7f0,
+    0x7dfefbfe,
+    0xbeff7dff,
+    0x7beff7df,
+    0xfbeff7df,
+    0xfdf7fbef,
+    0x7efbfdf7,
+    0x7fefbfdf,
+    0xbfefbfdf,
+    0xdfefbfef,
+    0x7dfefbf7,
+    0x7dffffff,
+    0xbeffbeff,
+    0xdf7fdf7f,
+    0xfdf7efbf,
+    0xf88bfefb,
+    0x7fdf7fbe,
+    0xbfefbfdf,
+    0xfbf7dfef,
+    0xfbff7dfe,
+    0x7dff7dfe,
+    0xbeffbeff,
+    0xfbefdf7f,
+    0xbf7dfdf7,
+    0xdfefbfef,
+    0xeff7dff7,
+    0xf7fbeffb,
+    0xdf7fbefd,
+    0xffe007fb,
+    0x7ffff,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_frag_ext_1[21] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x7c000000,
+    0xbfefbfdf,
+    0xdfefbfef,
+    0x7dfefbf7,
+    0xf,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_frag_ext_2[35] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x1efbc0,
+    0x0,
+    0x0,
+    0x0,
+    0x7bef,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xbef00000,
+    0x7,
+    0x0,
+    0x0,
+    0x78000000,
+    0x3df,
+    0x0,
+    0x0,
+    0x7de00000,
+    0xf,
+    0x0,
+    0x0,
+    0x0,
+    0xf7de00,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gpe[37] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x180,
+    0x0,
+    0x30,
+    0x0,
+    0x0,
+    0xc000,
+    0xc0018000,
+    0x6000c000,
+    0x30006000,
+    0x3000600,
+    0x3000600,
+    0x1800300,
+    0xc00180,
+    0xc0018,
+    0xc0018,
+    0xc000c,
+    0x6000c006,
+    0x60000000,
+    0x30003000,
+    0x18001800,
+    0x1800c00,
+    0xc0,
+    0x180030,
+    0xc0018,
+    0xc006000c,
+    0xc0006000,
+    0x60006000,
+    0x30003000,
+    0x3001800,
+    0x600180,
+    0xc000c,
+    0x60006,
+    0x80030003,
+    0x18003001,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre[21] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x80000000,
+    0x7fff,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xffff0,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_chksum[21] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x1fe,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x3fc0,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_key[21] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x1e3c,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x3c780,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_rout[21] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x5568,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xaad00,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_seq[21] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x79b0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xf3600,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_hop_by_hop_ext_1[25] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x7df00000,
+    0xbeffbeff,
+    0xdf7fdf7f,
+    0xfdf7efbf,
+    0x1efb,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_hop_by_hop_ext_2[36] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x7de00000,
+    0xf,
+    0x0,
+    0x0,
+    0x3df78000,
+    0x0,
+    0x0,
+    0xbc000000,
+    0x1ef,
+    0x0,
+    0x0,
+    0x0,
+    0x3df78,
+    0x0,
+    0x0,
+    0x0,
+    0x1efbc00,
+    0x0,
+    0x0,
+    0x0,
+    0x7bef0,
+    0x0,
+    0x0,
+    0x0,
+    0xef000000,
+    0x7b,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_icmp[37] =
+{
+    0x0,
+    0x0,
+    0x4,
+    0x0,
+    0x8000,
+    0x0,
+    0x0,
+    0x200,
+    0x0,
+    0x800100,
+    0x400080,
+    0x200050,
+    0x20000,
+    0x20004,
+    0x40010002,
+    0x8001,
+    0x10000800,
+    0x8000800,
+    0x4000a00,
+    0x400000,
+    0x400000,
+    0x200020,
+    0x140010,
+    0x80000008,
+    0x20002000,
+    0x10001000,
+    0xa000800,
+    0x400,
+    0x800040,
+    0x400040,
+    0x280020,
+    0x10,
+    0x1,
+    0x4000800,
+    0x2000400,
+    0x1000280,
+    0x100000,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_header[25] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x22f0000,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x8bc000,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_metadata[25] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x2080000,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x820000,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_igmp[10] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x20000000,
+    0x20000000,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x10,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ioam_e2e[37] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x100,
+    0x0,
+    0x20,
+    0x0,
+    0x0,
+    0x8000,
+    0x80010000,
+    0x40008000,
+    0x20004000,
+    0x2000400,
+    0x2000400,
+    0x1000200,
+    0x800100,
+    0x80010,
+    0x80010,
+    0x80008,
+    0x40008004,
+    0x40000000,
+    0x20002000,
+    0x10001000,
+    0x1000800,
+    0x80,
+    0x100020,
+    0x80010,
+    0x80040008,
+    0x80004000,
+    0x40004000,
+    0x20002000,
+    0x2001000,
+    0x400100,
+    0x80008,
+    0x40004,
+    0x20002,
+    0x10002001,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv4[10] =
+{
+    0x18,
+    0x0,
+    0x4,
+    0xe0003df6,
+    0xe22fffff,
+    0xfbe,
+    0x0,
+    0x200,
+    0x1efb00,
+    0x10,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv6[38] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xfbfdf7e0,
+    0x7dfefbfe,
+    0xbeff7dff,
+    0x7beff7df,
+    0xfbeff7df,
+    0xfdf7fbef,
+    0x7efbfdf7,
+    0x7fefbfdf,
+    0xbfefbfdf,
+    0xdfefbfef,
+    0x7dfefbf7,
+    0x7dffffff,
+    0xbeffbeff,
+    0xdf7fdf7f,
+    0xfdf7efbf,
+    0xf88bfefb,
+    0x7fdf7fbe,
+    0xbfefbfdf,
+    0xfbf7dfef,
+    0xfbff7dfe,
+    0x7dff7dfe,
+    0xbeffbeff,
+    0xfbefdf7f,
+    0xbf7dfdf7,
+    0xdfefbfef,
+    0xeff7dff7,
+    0xf7fbeffb,
+    0xdf7fbefd,
+    0x3,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls0[39] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xffe007f8,
+    0xffff,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls1[39] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xffe007f0,
+    0xfff,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls2[39] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xffe007e0,
+    0xff,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls3[39] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xffe007c0,
+    0xf,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls4[39] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xffe00000,
+    0xf,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls5[39] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xfc000000,
+    0xf,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls6[38] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xf8000000,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls_ach[39] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x61800300,
+    0x6666,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls_cw[39] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x82000400,
+    0x8888,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_p_1588[39] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x400,
+    0x0,
+    0x80,
+    0x0,
+    0x0,
+    0x20000,
+    0x40000,
+    0x20002,
+    0x80010001,
+    0x8001000,
+    0x8001000,
+    0x4000800,
+    0x2000400,
+    0x200040,
+    0x200040,
+    0x200020,
+    0x20010,
+    0x1,
+    0x80008001,
+    0x40004000,
+    0x4002000,
+    0x200,
+    0x400080,
+    0x200040,
+    0x100020,
+    0x10002,
+    0x10002,
+    0x80008001,
+    0x8004000,
+    0x1000400,
+    0x200020,
+    0x100010,
+    0x80008,
+    0x40008004,
+    0x0,
+    0x10000,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_prog_ext_1[29] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xf8000000,
+    0x7fdf7fbe,
+    0xbfefbfdf,
+    0xfbf7dfef,
+    0xf7dfe,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_prog_ext_2[36] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xf7de0,
+    0x0,
+    0x0,
+    0x80000000,
+    0x3df7,
+    0x0,
+    0x0,
+    0x1efbc00,
+    0x0,
+    0x0,
+    0x0,
+    0xdf780000,
+    0x3,
+    0x0,
+    0x0,
+    0xbc000000,
+    0x1ef,
+    0x0,
+    0x0,
+    0xbef00000,
+    0x7,
+    0x0,
+    0x0,
+    0x0,
+    0x7bef00,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rarp[39] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x20000,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rout_ext_1[33] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xfbe00000,
+    0x7dff7dfe,
+    0xbeffbeff,
+    0xfbefdf7f,
+    0x3df7,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rout_ext_2[37] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xbef00000,
+    0x7,
+    0x0,
+    0x0,
+    0x1efbc000,
+    0x0,
+    0x0,
+    0xde000000,
+    0xf7,
+    0x0,
+    0x0,
+    0x0,
+    0x1efbc,
+    0x0,
+    0x0,
+    0x0,
+    0xf7de00,
+    0x0,
+    0x0,
+    0x0,
+    0x3df78,
+    0x0,
+    0x0,
+    0x0,
+    0xf7800000,
+    0x3d,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_seg_rout_ext_1[33] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xf7dc000,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_first_4bytes[37] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x16,
+    0xc00e0000,
+    0x2,
+    0x0,
+    0x0,
+    0xb00,
+    0xb001600,
+    0x5800b00,
+    0x2c00580,
+    0x2c0058,
+    0x2c0058,
+    0x16002c,
+    0x600b0016,
+    0x6000b001,
+    0xb000b001,
+    0x5800b000,
+    0x5800b00,
+    0x5800000,
+    0x2c002c0,
+    0x1600160,
+    0x1600b0,
+    0xc003800b,
+    0x60016002,
+    0xb000b001,
+    0xb005800,
+    0xb000580,
+    0x5800580,
+    0x2c002c0,
+    0x2c0160,
+    0xb0058016,
+    0x5800b000,
+    0x2c005800,
+    0x16002c00,
+    0x16002c0,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_last_16bytes[37] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x14,
+    0x800c0000,
+    0x2,
+    0x0,
+    0x0,
+    0xa00,
+    0xa001400,
+    0x5000a00,
+    0x2800500,
+    0x280050,
+    0x280050,
+    0x140028,
+    0x400a0014,
+    0x4000a001,
+    0xa000a001,
+    0x5000a000,
+    0x5000a00,
+    0x5000000,
+    0x2800280,
+    0x1400140,
+    0x1400a0,
+    0x8003000a,
+    0x40014002,
+    0xa000a001,
+    0xa005000,
+    0xa000500,
+    0x5000500,
+    0x2800280,
+    0x280140,
+    0xa0050014,
+    0x5000a000,
+    0x28005000,
+    0x14002800,
+    0x1400280,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_udp[38] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x1de0,
+    0x2200000,
+    0x3bc,
+    0x0,
+    0x0,
+    0xef000,
+    0xf01de000,
+    0x780ef00e,
+    0xbc077807,
+    0x3bc07783,
+    0x3bc07780,
+    0x1de03bc0,
+    0xef01de0,
+    0xef01de,
+    0xef01de,
+    0x80ef00ef,
+    0x780ef077,
+    0x78000007,
+    0xbc03bc07,
+    0xde01de03,
+    0x1de0ef01,
+    0x880ef0,
+    0x1de03bc,
+    0xef01de,
+    0xf07780ef,
+    0xf007780e,
+    0x7807780e,
+    0xbc03bc07,
+    0x3bc1de03,
+    0x7781de0,
+    0x80ef00ef,
+    0xc0778077,
+    0xe03bc03b,
+    0xde03bc1d,
+    0x1,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l3[39] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x40000,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l4[38] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x2000,
+    0x0,
+    0x400,
+    0x0,
+    0x0,
+    0x100000,
+    0x200000,
+    0x100010,
+    0x80008,
+    0x40008004,
+    0x40008000,
+    0x20004000,
+    0x10002000,
+    0x1000200,
+    0x1000200,
+    0x1000100,
+    0x100080,
+    0x8,
+    0x40008,
+    0x20004,
+    0x20010002,
+    0x1000,
+    0x2000400,
+    0x1000200,
+    0x800100,
+    0x80010,
+    0x80010,
+    0x40008,
+    0x40020004,
+    0x8002000,
+    0x1000100,
+    0x800080,
+    0x400040,
+    0x40020,
+    0x2,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l5[37] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x810,
+    0x0,
+    0x102,
+    0x0,
+    0x0,
+    0x40800,
+    0x8081000,
+    0x4040804,
+    0x2020402,
+    0x10202041,
+    0x10202040,
+    0x8101020,
+    0x4080810,
+    0x408081,
+    0x80408081,
+    0x40408040,
+    0x4040820,
+    0x4000002,
+    0x2010202,
+    0x81008101,
+    0x8104080,
+    0x408,
+    0x810102,
+    0x80408081,
+    0x8204040,
+    0x8020404,
+    0x4020404,
+    0x2010202,
+    0x10208101,
+    0x82040810,
+    0x40408040,
+    0x20204020,
+    0x10102010,
+    0x81010208,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_vxlan[38] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x1000,
+    0x0,
+    0x200,
+    0x0,
+    0x0,
+    0x80000,
+    0x100000,
+    0x80008,
+    0x40004,
+    0x20004002,
+    0x20004000,
+    0x10002000,
+    0x8001000,
+    0x800100,
+    0x800100,
+    0x800080,
+    0x80040,
+    0x4,
+    0x20004,
+    0x10002,
+    0x10008001,
+    0x800,
+    0x1000200,
+    0x800100,
+    0x400080,
+    0x40008,
+    0x40008,
+    0x20004,
+    0x20010002,
+    0x4001000,
+    0x800080,
+    0x400040,
+    0x200020,
+    0x20010,
+    0x1,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_wesp_ext_1[38] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x800,
+    0x0,
+    0x200,
+    0x1efb00,
+    0x10,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xdfefbe00,
+    0xeff7dff7,
+    0xf7fbeffb,
+    0xdf7fbefd,
+    0x3,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_wesp_ext_2[38] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x7bef0000,
+    0x0,
+    0x0,
+    0x0,
+    0x1efbc00,
+    0x0,
+    0x0,
+    0x7de00000,
+    0xf,
+    0x0,
+    0x0,
+    0xc0000000,
+    0x1efb,
+    0x0,
+    0x0,
+    0x0,
+    0xf7de0,
+    0x0,
+    0x0,
+    0x80000000,
+    0x3df7,
+    0x0,
+    0x0,
+    0x0,
+    0xdf780000,
+    0x3,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_sys_hdr_ep_nih[1] =
+{
+    0x4,
+};
+
+static uint32_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_sys_hdr_loopback[1] =
+{
+    0x8,
+};
+
+
+static bcmpkt_rxpmd_match_id_db_t
+bcm56690_a0_dna_6_5_29_0_1_rxpmd_match_id_db[BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_COUNT] = {
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_CNTAG */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_CNTAG",
+        .match        = 0x80,
+        .match_mask   = 0xc0,
+        .match_maxbit = 35,
+        .match_minbit = 28,
+        .maxbit       = 7,
+        .minbit       = 6,
+        .value        = 0x2,
+        .pmaxbit      = 35,
+        .pminbit      = 28,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM",
+        .match        = 0x40,
+        .match_mask   = 0xc0,
+        .match_maxbit = 35,
+        .match_minbit = 28,
+        .maxbit       = 7,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 35,
+        .pminbit      = 28,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_HG3_BASE",
+        .match        = 0x2,
+        .match_mask   = 0x2,
+        .match_maxbit = 35,
+        .match_minbit = 28,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 35,
+        .pminbit      = 28,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0 */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0",
+        .match        = 0x8,
+        .match_mask   = 0x8,
+        .match_maxbit = 35,
+        .match_minbit = 28,
+        .maxbit       = 3,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 35,
+        .pminbit      = 28,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_ITAG",
+        .match        = 0x20,
+        .match_mask   = 0x20,
+        .match_maxbit = 35,
+        .match_minbit = 28,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 35,
+        .pminbit      = 28,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_L2",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 35,
+        .match_minbit = 28,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 35,
+        .pminbit      = 28,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0xff,
+        .match_maxbit = 35,
+        .match_minbit = 28,
+        .maxbit       = 7,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 35,
+        .pminbit      = 28,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_OTAG",
+        .match        = 0x10,
+        .match_mask   = 0x10,
+        .match_maxbit = 35,
+        .match_minbit = 28,
+        .maxbit       = 4,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 35,
+        .pminbit      = 28,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC",
+        .match        = 0x4,
+        .match_mask   = 0x4,
+        .match_maxbit = 35,
+        .match_minbit = 28,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 35,
+        .pminbit      = 28,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ARP",
+        .match        = 0x4000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0x1,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1",
+        .match        = 0x24000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0x9,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2",
+        .match        = 0x140,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x5,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_BFD",
+        .match        = 0x3000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x6,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1",
+        .match        = 0x2c000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0xb,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2",
+        .match        = 0x200,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x8,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT",
+        .match        = 0x40,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1",
+        .match        = 0x30000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0xc,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2",
+        .match        = 0x240,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x9,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GPE",
+        .match        = 0x30,
+        .match_mask   = 0x438,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE",
+        .match        = 0x18,
+        .match_mask   = 0x418,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x3,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM",
+        .match        = 0x80,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x2,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY",
+        .match        = 0x1800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x3,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT",
+        .match        = 0x10000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0x4,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ",
+        .match        = 0x38,
+        .match_mask   = 0x438,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1",
+        .match        = 0x8000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0x2,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2",
+        .match        = 0xc0,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x3,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ICMP",
+        .match        = 0x800,
+        .match_mask   = 0x3818,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER",
+        .match        = 0x2c0,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0xb,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA",
+        .match        = 0xc000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0x3,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IGMP",
+        .match        = 0x100,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x4,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E",
+        .match        = 0x1000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x2,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IPV4",
+        .match        = 0x2,
+        .match_mask   = 0x406,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IPV6",
+        .match        = 0x4,
+        .match_mask   = 0x406,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x2,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS0",
+        .match        = 0x400,
+        .match_mask   = 0x400,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 10,
+        .minbit       = 10,
+        .value        = 0x1,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS1",
+        .match        = 0x402,
+        .match_mask   = 0x402,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS2",
+        .match        = 0x404,
+        .match_mask   = 0x404,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS3",
+        .match        = 0x408,
+        .match_mask   = 0x408,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 3,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS4",
+        .match        = 0x410,
+        .match_mask   = 0x410,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 4,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS5",
+        .match        = 0x420,
+        .match_mask   = 0x420,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS6",
+        .match        = 0x440,
+        .match_mask   = 0x440,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 6,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH",
+        .match        = 0x480,
+        .match_mask   = 0x480,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 7,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW",
+        .match        = 0x500,
+        .match_mask   = 0x500,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 8,
+        .minbit       = 8,
+        .value        = 0x1,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x3ffff,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 17,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_P_1588",
+        .match        = 0x2800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x5,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1",
+        .match        = 0x34000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0xd,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2",
+        .match        = 0x280,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0xa,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_RARP",
+        .match        = 0x14000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0x5,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1",
+        .match        = 0x20000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0x8,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2",
+        .match        = 0x1c0,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x7,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_SEG_ROUT_EXT_1 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_SEG_ROUT_EXT_1",
+        .match        = 0x18000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0x6,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES",
+        .match        = 0x8,
+        .match_mask   = 0x418,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES",
+        .match        = 0x28,
+        .match_mask   = 0x438,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UDP",
+        .match        = 0x10,
+        .match_mask   = 0x418,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x2,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3",
+        .match        = 0x1c000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0x7,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4",
+        .match        = 0x2000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x4,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5",
+        .match        = 0x3800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x7,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_VXLAN",
+        .match        = 0x810,
+        .match_mask   = 0x3c18,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1",
+        .match        = 0x28000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0xa,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2",
+        .match        = 0x180,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x6,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH */
+        .name         = "EGRESS_PKT_SYS_HDR_EP_NIH",
+        .match        = 0x2,
+        .match_mask   = 0x3,
+        .match_maxbit = 1,
+        .match_minbit = 0,
+        .maxbit       = 1,
+        .minbit       = 0,
+        .value        = 0x2,
+        .pmaxbit      = 1,
+        .pminbit      = 0,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK */
+        .name         = "EGRESS_PKT_SYS_HDR_LOOPBACK",
+        .match        = 0x1,
+        .match_mask   = 0x3,
+        .match_maxbit = 1,
+        .match_minbit = 0,
+        .maxbit       = 1,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 1,
+        .pminbit      = 0,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE */
+        .name         = "EGRESS_PKT_SYS_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x3,
+        .match_maxbit = 1,
+        .match_minbit = 0,
+        .maxbit       = 1,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 1,
+        .pminbit      = 0,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_CNTAG */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_CNTAG",
+        .match        = 0x80,
+        .match_mask   = 0xc0,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 7,
+        .minbit       = 6,
+        .value        = 0x2,
+        .pmaxbit      = 9,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM",
+        .match        = 0x40,
+        .match_mask   = 0xc0,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 7,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 9,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE",
+        .match        = 0x2,
+        .match_mask   = 0x2,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 9,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0 */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0",
+        .match        = 0x8,
+        .match_mask   = 0x8,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 3,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 9,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_ITAG",
+        .match        = 0x20,
+        .match_mask   = 0x20,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 9,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_L2",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 9,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0xff,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 7,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 9,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_OTAG",
+        .match        = 0x10,
+        .match_mask   = 0x10,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 4,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 9,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC",
+        .match        = 0x4,
+        .match_mask   = 0x4,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 9,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP",
+        .match        = 0x4000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0x1,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1",
+        .match        = 0x24000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0x9,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2",
+        .match        = 0x140,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x5,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD",
+        .match        = 0x3000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x6,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1",
+        .match        = 0x2c000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0xb,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2",
+        .match        = 0x200,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x8,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT",
+        .match        = 0x40,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1",
+        .match        = 0x30000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0xc,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2",
+        .match        = 0x240,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x9,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE",
+        .match        = 0x30,
+        .match_mask   = 0x438,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE",
+        .match        = 0x18,
+        .match_mask   = 0x418,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x3,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM",
+        .match        = 0x80,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x2,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY",
+        .match        = 0x1800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x3,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT",
+        .match        = 0x10000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0x4,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ",
+        .match        = 0x38,
+        .match_mask   = 0x438,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1",
+        .match        = 0x8000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0x2,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2",
+        .match        = 0xc0,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x3,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP",
+        .match        = 0x800,
+        .match_mask   = 0x3818,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER",
+        .match        = 0x2c0,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0xb,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA",
+        .match        = 0xc000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0x3,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP",
+        .match        = 0x100,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x4,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E",
+        .match        = 0x1000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x2,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4",
+        .match        = 0x2,
+        .match_mask   = 0x406,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6",
+        .match        = 0x4,
+        .match_mask   = 0x406,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x2,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0",
+        .match        = 0x400,
+        .match_mask   = 0x400,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 10,
+        .minbit       = 10,
+        .value        = 0x1,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1",
+        .match        = 0x402,
+        .match_mask   = 0x402,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2",
+        .match        = 0x404,
+        .match_mask   = 0x404,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3",
+        .match        = 0x408,
+        .match_mask   = 0x408,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 3,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4",
+        .match        = 0x410,
+        .match_mask   = 0x410,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 4,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5",
+        .match        = 0x420,
+        .match_mask   = 0x420,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6",
+        .match        = 0x440,
+        .match_mask   = 0x440,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 6,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH",
+        .match        = 0x480,
+        .match_mask   = 0x480,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 7,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW",
+        .match        = 0x500,
+        .match_mask   = 0x500,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 8,
+        .minbit       = 8,
+        .value        = 0x1,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x3ffff,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 17,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588",
+        .match        = 0x2800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x5,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1",
+        .match        = 0x34000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0xd,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2",
+        .match        = 0x280,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0xa,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP",
+        .match        = 0x14000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0x5,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1",
+        .match        = 0x20000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0x8,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2",
+        .match        = 0x1c0,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x7,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_SEG_ROUT_EXT_1 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_SEG_ROUT_EXT_1",
+        .match        = 0x18000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0x6,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES",
+        .match        = 0x8,
+        .match_mask   = 0x418,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES",
+        .match        = 0x28,
+        .match_mask   = 0x438,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP",
+        .match        = 0x10,
+        .match_mask   = 0x418,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x2,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3",
+        .match        = 0x1c000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0x7,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4",
+        .match        = 0x2000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x4,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5",
+        .match        = 0x3800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x7,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN",
+        .match        = 0x810,
+        .match_mask   = 0x3c18,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1",
+        .match        = 0x28000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0xa,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2",
+        .match        = 0x180,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x6,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_CNTAG */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_CNTAG",
+        .match        = 0x80,
+        .match_mask   = 0xc0,
+        .match_maxbit = 35,
+        .match_minbit = 28,
+        .maxbit       = 7,
+        .minbit       = 6,
+        .value        = 0x2,
+        .pmaxbit      = 35,
+        .pminbit      = 28,
+        .zone_minbit  = 19,
+        .arc_id_mask  = 0xf80000,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l2_hdr_cntag,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_ITAG",
+        .match        = 0x20,
+        .match_mask   = 0x20,
+        .match_maxbit = 35,
+        .match_minbit = 28,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 35,
+        .pminbit      = 28,
+        .zone_minbit  = 19,
+        .arc_id_mask  = 0xf80000,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l2_hdr_itag,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_L2",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 35,
+        .match_minbit = 28,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 35,
+        .pminbit      = 28,
+        .zone_minbit  = 19,
+        .arc_id_mask  = 0xf80000,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l2_hdr_l2,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0xff,
+        .match_maxbit = 35,
+        .match_minbit = 28,
+        .maxbit       = 7,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 35,
+        .pminbit      = 28,
+        .zone_minbit  = 19,
+        .arc_id_mask  = 0xf80000,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_OTAG",
+        .match        = 0x10,
+        .match_mask   = 0x10,
+        .match_maxbit = 35,
+        .match_minbit = 28,
+        .maxbit       = 4,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 35,
+        .pminbit      = 28,
+        .zone_minbit  = 19,
+        .arc_id_mask  = 0xf80000,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l2_hdr_otag,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC",
+        .match        = 0x4,
+        .match_mask   = 0x4,
+        .match_maxbit = 35,
+        .match_minbit = 28,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 35,
+        .pminbit      = 28,
+        .zone_minbit  = 19,
+        .arc_id_mask  = 0xf80000,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l2_hdr_snap_or_llc,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ARP",
+        .match        = 0x4000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0x1,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+        .zone_minbit  = 24,
+        .arc_id_mask  = 0x7ff000000,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_arp,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1",
+        .match        = 0x24000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0x9,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+        .zone_minbit  = 24,
+        .arc_id_mask  = 0x7ff000000,
+        .num_zone_bmp_words = 32,
+        .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_auth_ext_1,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2",
+        .match        = 0x140,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x5,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+        .zone_minbit  = 24,
+        .arc_id_mask  = 0x7ff000000,
+        .num_zone_bmp_words = 45,
+        .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_auth_ext_2,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_BFD",
+        .match        = 0x3000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x6,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+        .zone_minbit  = 24,
+        .arc_id_mask  = 0x7ff000000,
+        .num_zone_bmp_words = 47,
+        .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_bfd,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1",
+        .match        = 0x2c000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0xb,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+        .zone_minbit  = 24,
+        .arc_id_mask  = 0x7ff000000,
+        .num_zone_bmp_words = 35,
+        .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_dest_opt_ext_1,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2",
+        .match        = 0x200,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x8,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+        .zone_minbit  = 24,
+        .arc_id_mask  = 0x7ff000000,
+        .num_zone_bmp_words = 45,
+        .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_dest_opt_ext_2,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT",
+        .match        = 0x40,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+        .zone_minbit  = 24,
+        .arc_id_mask  = 0x7ff000000,
+        .num_zone_bmp_words = 45,
+        .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_esp_ext,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+        .zone_minbit  = 24,
+        .arc_id_mask  = 0x7ff000000,
+        .num_zone_bmp_words = 24,
+        .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ethertype,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1",
+        .match        = 0x30000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0xc,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+        .zone_minbit  = 24,
+        .arc_id_mask  = 0x7ff000000,
+        .num_zone_bmp_words = 37,
+        .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_frag_ext_1,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2",
+        .match        = 0x240,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x9,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+        .zone_minbit  = 24,
+        .arc_id_mask  = 0x7ff000000,
+        .num_zone_bmp_words = 46,
+        .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_frag_ext_2,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1",
+        .match        = 0x8000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0x2,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+        .zone_minbit  = 24,
+        .arc_id_mask  = 0x7ff000000,
+        .num_zone_bmp_words = 39,
+        .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_hop_by_hop_ext_1,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2",
+        .match        = 0xc0,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x3,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+        .zone_minbit  = 24,
+        .arc_id_mask  = 0x7ff000000,
+        .num_zone_bmp_words = 46,
+        .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_hop_by_hop_ext_2,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ICMP",
+        .match        = 0x800,
+        .match_mask   = 0x3818,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+        .zone_minbit  = 24,
+        .arc_id_mask  = 0x7ff000000,
+        .num_zone_bmp_words = 47,
+        .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_icmp,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IGMP",
+        .match        = 0x100,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x4,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+        .zone_minbit  = 24,
+        .arc_id_mask  = 0x7ff000000,
+        .num_zone_bmp_words = 29,
+        .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_igmp,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IPV4",
+        .match        = 0x2,
+        .match_mask   = 0x406,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+        .zone_minbit  = 24,
+        .arc_id_mask  = 0x7ff000000,
+        .num_zone_bmp_words = 29,
+        .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv4,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IPV6",
+        .match        = 0x4,
+        .match_mask   = 0x406,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x2,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+        .zone_minbit  = 24,
+        .arc_id_mask  = 0x7ff000000,
+        .num_zone_bmp_words = 47,
+        .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv6,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x3ffff,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 17,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+        .zone_minbit  = 24,
+        .arc_id_mask  = 0x7ff000000,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_P_1588",
+        .match        = 0x2800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x5,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+        .zone_minbit  = 24,
+        .arc_id_mask  = 0x7ff000000,
+        .num_zone_bmp_words = 47,
+        .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_p_1588,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1",
+        .match        = 0x34000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0xd,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+        .zone_minbit  = 24,
+        .arc_id_mask  = 0x7ff000000,
+        .num_zone_bmp_words = 42,
+        .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_prog_ext_1,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2",
+        .match        = 0x280,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0xa,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+        .zone_minbit  = 24,
+        .arc_id_mask  = 0x7ff000000,
+        .num_zone_bmp_words = 46,
+        .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_prog_ext_2,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_RARP",
+        .match        = 0x14000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0x5,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+        .zone_minbit  = 24,
+        .arc_id_mask  = 0x7ff000000,
+        .num_zone_bmp_words = 24,
+        .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rarp,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1",
+        .match        = 0x20000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0x8,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+        .zone_minbit  = 24,
+        .arc_id_mask  = 0x7ff000000,
+        .num_zone_bmp_words = 44,
+        .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rout_ext_1,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2",
+        .match        = 0x1c0,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x7,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+        .zone_minbit  = 24,
+        .arc_id_mask  = 0x7ff000000,
+        .num_zone_bmp_words = 47,
+        .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rout_ext_2,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES",
+        .match        = 0x8,
+        .match_mask   = 0x418,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+        .zone_minbit  = 24,
+        .arc_id_mask  = 0x7ff000000,
+        .num_zone_bmp_words = 47,
+        .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_first_4bytes,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES",
+        .match        = 0x28,
+        .match_mask   = 0x438,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+        .zone_minbit  = 24,
+        .arc_id_mask  = 0x7ff000000,
+        .num_zone_bmp_words = 47,
+        .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_last_16bytes,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UDP",
+        .match        = 0x10,
+        .match_mask   = 0x418,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x2,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+        .zone_minbit  = 24,
+        .arc_id_mask  = 0x7ff000000,
+        .num_zone_bmp_words = 47,
+        .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_udp,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3",
+        .match        = 0x1c000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0x7,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+        .zone_minbit  = 24,
+        .arc_id_mask  = 0x7ff000000,
+        .num_zone_bmp_words = 24,
+        .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l3,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4",
+        .match        = 0x2000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x4,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+        .zone_minbit  = 24,
+        .arc_id_mask  = 0x7ff000000,
+        .num_zone_bmp_words = 47,
+        .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l4,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5",
+        .match        = 0x3800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x7,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+        .zone_minbit  = 24,
+        .arc_id_mask  = 0x7ff000000,
+        .num_zone_bmp_words = 47,
+        .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l5,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1",
+        .match        = 0x28000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0xa,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+        .zone_minbit  = 24,
+        .arc_id_mask  = 0x7ff000000,
+        .num_zone_bmp_words = 47,
+        .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_wesp_ext_1,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2",
+        .match        = 0x180,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 53,
+        .match_minbit = 36,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x6,
+        .pmaxbit      = 53,
+        .pminbit      = 36,
+        .zone_minbit  = 24,
+        .arc_id_mask  = 0x7ff000000,
+        .num_zone_bmp_words = 47,
+        .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_wesp_ext_2,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_CNTAG */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_CNTAG",
+        .match        = 0x80,
+        .match_mask   = 0xc0,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 7,
+        .minbit       = 6,
+        .value        = 0x2,
+        .pmaxbit      = 9,
+        .pminbit      = 2,
+        .zone_minbit  = 2,
+        .arc_id_mask  = 0xfc,
+        .num_zone_bmp_words = 2,
+        .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_cntag,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM",
+        .match        = 0x40,
+        .match_mask   = 0xc0,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 7,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 9,
+        .pminbit      = 2,
+        .zone_minbit  = 2,
+        .arc_id_mask  = 0xfc,
+        .num_zone_bmp_words = 2,
+        .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_gbp_ethernet_shim,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_HG3_BASE",
+        .match        = 0x2,
+        .match_mask   = 0x2,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 9,
+        .pminbit      = 2,
+        .zone_minbit  = 2,
+        .arc_id_mask  = 0xfc,
+        .num_zone_bmp_words = 2,
+        .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_hg3_base,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0 */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0",
+        .match        = 0x8,
+        .match_mask   = 0x8,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 3,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 9,
+        .pminbit      = 2,
+        .zone_minbit  = 2,
+        .arc_id_mask  = 0xfc,
+        .num_zone_bmp_words = 2,
+        .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_hg3_ext_0,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_ITAG",
+        .match        = 0x20,
+        .match_mask   = 0x20,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 9,
+        .pminbit      = 2,
+        .zone_minbit  = 2,
+        .arc_id_mask  = 0xfc,
+        .num_zone_bmp_words = 2,
+        .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_itag,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_L2",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 9,
+        .pminbit      = 2,
+        .zone_minbit  = 2,
+        .arc_id_mask  = 0xfc,
+        .num_zone_bmp_words = 2,
+        .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_l2,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0xff,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 7,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 9,
+        .pminbit      = 2,
+        .zone_minbit  = 2,
+        .arc_id_mask  = 0xfc,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_OTAG",
+        .match        = 0x10,
+        .match_mask   = 0x10,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 4,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 9,
+        .pminbit      = 2,
+        .zone_minbit  = 2,
+        .arc_id_mask  = 0xfc,
+        .num_zone_bmp_words = 2,
+        .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_otag,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC",
+        .match        = 0x4,
+        .match_mask   = 0x4,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 9,
+        .pminbit      = 2,
+        .zone_minbit  = 2,
+        .arc_id_mask  = 0xfc,
+        .num_zone_bmp_words = 2,
+        .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l2_hdr_snap_or_llc,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ARP",
+        .match        = 0x4000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0x1,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+        .zone_minbit  = 8,
+        .arc_id_mask  = 0x7ff00,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_arp,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1",
+        .match        = 0x24000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0x9,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+        .zone_minbit  = 8,
+        .arc_id_mask  = 0x7ff00,
+        .num_zone_bmp_words = 13,
+        .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_auth_ext_1,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2",
+        .match        = 0x140,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x5,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+        .zone_minbit  = 8,
+        .arc_id_mask  = 0x7ff00,
+        .num_zone_bmp_words = 34,
+        .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_auth_ext_2,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_BFD",
+        .match        = 0x3000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x6,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+        .zone_minbit  = 8,
+        .arc_id_mask  = 0x7ff00,
+        .num_zone_bmp_words = 39,
+        .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_bfd,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1",
+        .match        = 0x2c000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0xb,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+        .zone_minbit  = 8,
+        .arc_id_mask  = 0x7ff00,
+        .num_zone_bmp_words = 17,
+        .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dest_opt_ext_1,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2",
+        .match        = 0x200,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x8,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+        .zone_minbit  = 8,
+        .arc_id_mask  = 0x7ff00,
+        .num_zone_bmp_words = 35,
+        .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dest_opt_ext_2,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT",
+        .match        = 0x40,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+        .zone_minbit  = 8,
+        .arc_id_mask  = 0x7ff00,
+        .num_zone_bmp_words = 35,
+        .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_esp_ext,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+        .zone_minbit  = 8,
+        .arc_id_mask  = 0x7ff00,
+        .num_zone_bmp_words = 39,
+        .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ethertype,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1",
+        .match        = 0x30000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0xc,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+        .zone_minbit  = 8,
+        .arc_id_mask  = 0x7ff00,
+        .num_zone_bmp_words = 21,
+        .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_frag_ext_1,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2",
+        .match        = 0x240,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x9,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+        .zone_minbit  = 8,
+        .arc_id_mask  = 0x7ff00,
+        .num_zone_bmp_words = 35,
+        .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_frag_ext_2,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GPE",
+        .match        = 0x30,
+        .match_mask   = 0x438,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+        .zone_minbit  = 8,
+        .arc_id_mask  = 0x7ff00,
+        .num_zone_bmp_words = 37,
+        .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gpe,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE",
+        .match        = 0x18,
+        .match_mask   = 0x418,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x3,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+        .zone_minbit  = 8,
+        .arc_id_mask  = 0x7ff00,
+        .num_zone_bmp_words = 21,
+        .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM",
+        .match        = 0x80,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x2,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+        .zone_minbit  = 8,
+        .arc_id_mask  = 0x7ff00,
+        .num_zone_bmp_words = 21,
+        .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_chksum,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY",
+        .match        = 0x1800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x3,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+        .zone_minbit  = 8,
+        .arc_id_mask  = 0x7ff00,
+        .num_zone_bmp_words = 21,
+        .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_key,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT",
+        .match        = 0x10000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0x4,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+        .zone_minbit  = 8,
+        .arc_id_mask  = 0x7ff00,
+        .num_zone_bmp_words = 21,
+        .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_rout,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ",
+        .match        = 0x38,
+        .match_mask   = 0x438,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+        .zone_minbit  = 8,
+        .arc_id_mask  = 0x7ff00,
+        .num_zone_bmp_words = 21,
+        .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_seq,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1",
+        .match        = 0x8000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0x2,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+        .zone_minbit  = 8,
+        .arc_id_mask  = 0x7ff00,
+        .num_zone_bmp_words = 25,
+        .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_hop_by_hop_ext_1,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2",
+        .match        = 0xc0,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x3,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+        .zone_minbit  = 8,
+        .arc_id_mask  = 0x7ff00,
+        .num_zone_bmp_words = 36,
+        .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_hop_by_hop_ext_2,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ICMP",
+        .match        = 0x800,
+        .match_mask   = 0x3818,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+        .zone_minbit  = 8,
+        .arc_id_mask  = 0x7ff00,
+        .num_zone_bmp_words = 37,
+        .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_icmp,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER",
+        .match        = 0x2c0,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0xb,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+        .zone_minbit  = 8,
+        .arc_id_mask  = 0x7ff00,
+        .num_zone_bmp_words = 25,
+        .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_header,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA",
+        .match        = 0xc000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0x3,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+        .zone_minbit  = 8,
+        .arc_id_mask  = 0x7ff00,
+        .num_zone_bmp_words = 25,
+        .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_metadata,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IGMP",
+        .match        = 0x100,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x4,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+        .zone_minbit  = 8,
+        .arc_id_mask  = 0x7ff00,
+        .num_zone_bmp_words = 10,
+        .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_igmp,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E",
+        .match        = 0x1000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x2,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+        .zone_minbit  = 8,
+        .arc_id_mask  = 0x7ff00,
+        .num_zone_bmp_words = 37,
+        .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ioam_e2e,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV4",
+        .match        = 0x2,
+        .match_mask   = 0x406,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+        .zone_minbit  = 8,
+        .arc_id_mask  = 0x7ff00,
+        .num_zone_bmp_words = 10,
+        .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv4,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV6",
+        .match        = 0x4,
+        .match_mask   = 0x406,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x2,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+        .zone_minbit  = 8,
+        .arc_id_mask  = 0x7ff00,
+        .num_zone_bmp_words = 38,
+        .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv6,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0",
+        .match        = 0x400,
+        .match_mask   = 0x400,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 10,
+        .minbit       = 10,
+        .value        = 0x1,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+        .zone_minbit  = 8,
+        .arc_id_mask  = 0x7ff00,
+        .num_zone_bmp_words = 39,
+        .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls0,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1",
+        .match        = 0x402,
+        .match_mask   = 0x402,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+        .zone_minbit  = 8,
+        .arc_id_mask  = 0x7ff00,
+        .num_zone_bmp_words = 39,
+        .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls1,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2",
+        .match        = 0x404,
+        .match_mask   = 0x404,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+        .zone_minbit  = 8,
+        .arc_id_mask  = 0x7ff00,
+        .num_zone_bmp_words = 39,
+        .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls2,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3",
+        .match        = 0x408,
+        .match_mask   = 0x408,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 3,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+        .zone_minbit  = 8,
+        .arc_id_mask  = 0x7ff00,
+        .num_zone_bmp_words = 39,
+        .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls3,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4",
+        .match        = 0x410,
+        .match_mask   = 0x410,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 4,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+        .zone_minbit  = 8,
+        .arc_id_mask  = 0x7ff00,
+        .num_zone_bmp_words = 39,
+        .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls4,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5",
+        .match        = 0x420,
+        .match_mask   = 0x420,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+        .zone_minbit  = 8,
+        .arc_id_mask  = 0x7ff00,
+        .num_zone_bmp_words = 39,
+        .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls5,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6",
+        .match        = 0x440,
+        .match_mask   = 0x440,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 6,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+        .zone_minbit  = 8,
+        .arc_id_mask  = 0x7ff00,
+        .num_zone_bmp_words = 38,
+        .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls6,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH",
+        .match        = 0x480,
+        .match_mask   = 0x480,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 7,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+        .zone_minbit  = 8,
+        .arc_id_mask  = 0x7ff00,
+        .num_zone_bmp_words = 39,
+        .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls_ach,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW",
+        .match        = 0x500,
+        .match_mask   = 0x500,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 8,
+        .minbit       = 8,
+        .value        = 0x1,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+        .zone_minbit  = 8,
+        .arc_id_mask  = 0x7ff00,
+        .num_zone_bmp_words = 39,
+        .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls_cw,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x3ffff,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 17,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+        .zone_minbit  = 8,
+        .arc_id_mask  = 0x7ff00,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_P_1588",
+        .match        = 0x2800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x5,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+        .zone_minbit  = 8,
+        .arc_id_mask  = 0x7ff00,
+        .num_zone_bmp_words = 39,
+        .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_p_1588,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1",
+        .match        = 0x34000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0xd,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+        .zone_minbit  = 8,
+        .arc_id_mask  = 0x7ff00,
+        .num_zone_bmp_words = 29,
+        .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_prog_ext_1,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2",
+        .match        = 0x280,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0xa,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+        .zone_minbit  = 8,
+        .arc_id_mask  = 0x7ff00,
+        .num_zone_bmp_words = 36,
+        .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_prog_ext_2,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_RARP",
+        .match        = 0x14000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0x5,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+        .zone_minbit  = 8,
+        .arc_id_mask  = 0x7ff00,
+        .num_zone_bmp_words = 39,
+        .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rarp,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1",
+        .match        = 0x20000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0x8,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+        .zone_minbit  = 8,
+        .arc_id_mask  = 0x7ff00,
+        .num_zone_bmp_words = 33,
+        .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rout_ext_1,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2",
+        .match        = 0x1c0,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x7,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+        .zone_minbit  = 8,
+        .arc_id_mask  = 0x7ff00,
+        .num_zone_bmp_words = 37,
+        .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rout_ext_2,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_SEG_ROUT_EXT_1 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_SEG_ROUT_EXT_1",
+        .match        = 0x18000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0x6,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+        .zone_minbit  = 8,
+        .arc_id_mask  = 0x7ff00,
+        .num_zone_bmp_words = 33,
+        .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_seg_rout_ext_1,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES",
+        .match        = 0x8,
+        .match_mask   = 0x418,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+        .zone_minbit  = 8,
+        .arc_id_mask  = 0x7ff00,
+        .num_zone_bmp_words = 37,
+        .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_first_4bytes,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES",
+        .match        = 0x28,
+        .match_mask   = 0x438,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+        .zone_minbit  = 8,
+        .arc_id_mask  = 0x7ff00,
+        .num_zone_bmp_words = 37,
+        .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_last_16bytes,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UDP",
+        .match        = 0x10,
+        .match_mask   = 0x418,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x2,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+        .zone_minbit  = 8,
+        .arc_id_mask  = 0x7ff00,
+        .num_zone_bmp_words = 38,
+        .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_udp,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3",
+        .match        = 0x1c000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0x7,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+        .zone_minbit  = 8,
+        .arc_id_mask  = 0x7ff00,
+        .num_zone_bmp_words = 39,
+        .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l3,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4",
+        .match        = 0x2000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x4,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+        .zone_minbit  = 8,
+        .arc_id_mask  = 0x7ff00,
+        .num_zone_bmp_words = 38,
+        .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l4,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5",
+        .match        = 0x3800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x7,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+        .zone_minbit  = 8,
+        .arc_id_mask  = 0x7ff00,
+        .num_zone_bmp_words = 37,
+        .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l5,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN",
+        .match        = 0x810,
+        .match_mask   = 0x3c18,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+        .zone_minbit  = 8,
+        .arc_id_mask  = 0x7ff00,
+        .num_zone_bmp_words = 38,
+        .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_vxlan,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1",
+        .match        = 0x28000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0xa,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+        .zone_minbit  = 8,
+        .arc_id_mask  = 0x7ff00,
+        .num_zone_bmp_words = 38,
+        .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_wesp_ext_1,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2",
+        .match        = 0x180,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 27,
+        .match_minbit = 10,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x6,
+        .pmaxbit      = 27,
+        .pminbit      = 10,
+        .zone_minbit  = 8,
+        .arc_id_mask  = 0x7ff00,
+        .num_zone_bmp_words = 38,
+        .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_wesp_ext_2,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH */
+        .name         = "INGRESS_PKT_SYS_HDR_EP_NIH",
+        .match        = 0x2,
+        .match_mask   = 0x3,
+        .match_maxbit = 1,
+        .match_minbit = 0,
+        .maxbit       = 1,
+        .minbit       = 0,
+        .value        = 0x2,
+        .pmaxbit      = 1,
+        .pminbit      = 0,
+        .zone_minbit  = 0,
+        .arc_id_mask  = 0x3,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_sys_hdr_ep_nih,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK */
+        .name         = "INGRESS_PKT_SYS_HDR_LOOPBACK",
+        .match        = 0x1,
+        .match_mask   = 0x3,
+        .match_maxbit = 1,
+        .match_minbit = 0,
+        .maxbit       = 1,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 1,
+        .pminbit      = 0,
+        .zone_minbit  = 0,
+        .arc_id_mask  = 0x3,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm56690_a0_dna_6_5_29_0_1_rxpmd_arc_ingress_pkt_sys_hdr_loopback,
+
+    },
+    {
+        /* BCM56690_A0_DNA_6_5_29_0_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE */
+        .name         = "INGRESS_PKT_SYS_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x3,
+        .match_maxbit = 1,
+        .match_minbit = 0,
+        .maxbit       = 1,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 1,
+        .pminbit      = 0,
+        .zone_minbit  = 0,
+        .arc_id_mask  = 0x3,
+
+    },
+};
+
+static bcmpkt_rxpmd_match_id_db_info_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_match_id_db_info = {
+    .num_entries = 223,
+    .db = bcm56690_a0_dna_6_5_29_0_1_rxpmd_match_id_db
+};
+bcmpkt_rxpmd_match_id_db_info_t * bcm56690_a0_dna_6_5_29_0_1_rxpmd_match_id_db_info_get(void) {
+    return &bcm56690_a0_dna_6_5_29_0_1_rxpmd_match_id_db_info;
+}
+
+static shr_enum_map_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_match_id_map[] = {
+    BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_rxpmd_match_id_map_info_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_match_id_map_info = {
+    .num_entries = 223,
+    .map = bcm56690_a0_dna_6_5_29_0_1_rxpmd_match_id_map
+};
+
+bcmpkt_rxpmd_match_id_map_info_t * bcm56690_a0_dna_6_5_29_0_1_rxpmd_match_id_map_info_get(void) {
+    return &bcm56690_a0_dna_6_5_29_0_1_rxpmd_match_id_map_info;
+}
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_pkt_flexhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_pkt_flexhdr.c
new file mode 100644
index 000000000..dc2fda7d0
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_pkt_flexhdr.c
@@ -0,0 +1,10552 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) map.yml
+ * for device bcm56690_a0 and variant dna_6_5_29_0_1.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#include <sal/sal_types.h>
+#include <shr/shr_error.h>
+#include <bcmpkt/bcmpkt_flexhdr.h>
+#include <bcmpkt/chip/bcm56690_a0/bcmpkt_bcm56690_a0_rxpmd.h>
+#include <bcmpkt/xfcr/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_bcmpkt_flexhdr.h>
+#include <bcmpkt/xfcr/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_bcmpkt_flexhdr_data.h>
+#include <bcmpkt/xfcr/bcm56690_a0/dna_6_5_29_0_1/bcm56690_a0_dna_6_5_29_0_1_bcmpkt_rxpmd_flex_data.h>
+
+#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1)
+#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l))
+#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s)))
+#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s)))
+
+static void bcm56690_a0_dna_6_5_29_0_1_rxpmd_flex_reason_decode(uint32_t *data, bcmpkt_bitmap_t *reasons)
+{
+    uint32_t *reason = data + 0;
+
+    if (reason[13] & (0x1 << 0)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU);
+    }
+    if (reason[13] & (0x1 << 1)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS);
+    }
+    if (reason[13] & (0x1 << 2)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE);
+    }
+    if (reason[13] & (0x1 << 3)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_EM_FT_HPAE_MISS);
+    }
+    if (reason[13] & (0x1 << 4)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD);
+    }
+    if (reason[13] & (0x1 << 5)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED);
+    }
+    if (reason[13] & (0x1 << 6)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT);
+    }
+    if (reason[13] & (0x1 << 7)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD);
+    }
+    if (reason[13] & (0x1 << 8)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD);
+    }
+    if (reason[13] & (0x1 << 9)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS);
+    }
+    if (reason[13] & (0x1 << 10)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP);
+    }
+    if (reason[13] & (0x1 << 11)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS);
+    }
+    if (reason[13] & (0x1 << 12)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP);
+    }
+    if (reason[13] & (0x1 << 13)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR);
+    }
+    if (reason[13] & (0x1 << 14)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR);
+    }
+    if (reason[13] & (0x1 << 15)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED);
+    }
+    if (reason[13] & (0x1 << 16)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL);
+    }
+    if (reason[13] & (0x1 << 17)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_VFP);
+    }
+    if (reason[13] & (0x1 << 18)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_IFP);
+    }
+    if (reason[13] & (0x1 << 19)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_IFP_METER);
+    }
+    if (reason[13] & (0x1 << 20)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_DST_FP);
+    }
+    if (reason[13] & (0x1 << 21)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_SVP);
+    }
+    if (reason[13] & (0x1 << 22)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_EM_FT);
+    }
+    if (reason[13] & (0x1 << 23)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_IVXLT);
+    }
+    if (reason[13] & (0x1 << 24)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED);
+    }
+    if (reason[13] & (0x1 << 25)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED);
+    }
+    if (reason[13] & (0x1 << 26)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_SER_DROP);
+    }
+    if (reason[13] & (0x1 << 27)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED);
+    }
+    if (reason[13] & (0x1 << 28)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF);
+    }
+    if (reason[13] & (0x1 << 29)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED);
+    }
+    if (reason[13] & (0x1 << 30)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED);
+    }
+    if (reason[13] & (0x1 << 31)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU);
+    }
+    if (reason[12] & (0x1 << 0)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0);
+    }
+    if (reason[12] & (0x1 << 1)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1);
+    }
+    if (reason[12] & (0x1 << 2)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2);
+    }
+    if (reason[12] & (0x1 << 3)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3);
+    }
+    if (reason[12] & (0x1 << 4)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4);
+    }
+    if (reason[12] & (0x1 << 5)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5);
+    }
+    if (reason[12] & (0x1 << 6)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6);
+    }
+    if (reason[12] & (0x1 << 7)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7);
+    }
+    if (reason[12] & (0x1 << 8)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_DEFAULT);
+    }
+    if (reason[12] & (0x1 << 9)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED);
+    }
+    if (reason[12] & (0x1 << 10)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED);
+    }
+    if (reason[12] & (0x1 << 11)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_SRV6);
+    }
+    if (reason[12] & (0x1 << 12)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR);
+    }
+    if (reason[12] & (0x1 << 13)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU);
+    }
+    if (reason[12] & (0x1 << 14)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE);
+    }
+    if (reason[12] & (0x1 << 15)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP);
+    }
+}
+
+static void bcm56690_a0_dna_6_5_29_0_1_rxpmd_flex_reason_encode(bcmpkt_bitmap_t *reasons, uint32_t *data)
+{
+    uint32_t *reason = data + 0;
+
+    reason[13] = 0;
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU)) {
+        reason[13] |= (0x1 << 0);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS)) {
+        reason[13] |= (0x1 << 1);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE)) {
+        reason[13] |= (0x1 << 2);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_EM_FT_HPAE_MISS)) {
+        reason[13] |= (0x1 << 3);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD)) {
+        reason[13] |= (0x1 << 4);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED)) {
+        reason[13] |= (0x1 << 5);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT)) {
+        reason[13] |= (0x1 << 6);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD)) {
+        reason[13] |= (0x1 << 7);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD)) {
+        reason[13] |= (0x1 << 8);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS)) {
+        reason[13] |= (0x1 << 9);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP)) {
+        reason[13] |= (0x1 << 10);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS)) {
+        reason[13] |= (0x1 << 11);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP)) {
+        reason[13] |= (0x1 << 12);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR)) {
+        reason[13] |= (0x1 << 13);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR)) {
+        reason[13] |= (0x1 << 14);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED)) {
+        reason[13] |= (0x1 << 15);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL)) {
+        reason[13] |= (0x1 << 16);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_VFP)) {
+        reason[13] |= (0x1 << 17);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_IFP)) {
+        reason[13] |= (0x1 << 18);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_IFP_METER)) {
+        reason[13] |= (0x1 << 19);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_DST_FP)) {
+        reason[13] |= (0x1 << 20);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_SVP)) {
+        reason[13] |= (0x1 << 21);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_EM_FT)) {
+        reason[13] |= (0x1 << 22);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_IVXLT)) {
+        reason[13] |= (0x1 << 23);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED)) {
+        reason[13] |= (0x1 << 24);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED)) {
+        reason[13] |= (0x1 << 25);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_SER_DROP)) {
+        reason[13] |= (0x1 << 26);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED)) {
+        reason[13] |= (0x1 << 27);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF)) {
+        reason[13] |= (0x1 << 28);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED)) {
+        reason[13] |= (0x1 << 29);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED)) {
+        reason[13] |= (0x1 << 30);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU)) {
+        reason[13] |= (0x1 << 31);
+    }
+    reason[12] = 0;
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0)) {
+        reason[12] |= (0x1 << 0);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1)) {
+        reason[12] |= (0x1 << 1);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2)) {
+        reason[12] |= (0x1 << 2);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3)) {
+        reason[12] |= (0x1 << 3);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4)) {
+        reason[12] |= (0x1 << 4);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5)) {
+        reason[12] |= (0x1 << 5);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6)) {
+        reason[12] |= (0x1 << 6);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7)) {
+        reason[12] |= (0x1 << 7);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_DEFAULT)) {
+        reason[12] |= (0x1 << 8);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED)) {
+        reason[12] |= (0x1 << 9);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED)) {
+        reason[12] |= (0x1 << 10);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_SRV6)) {
+        reason[12] |= (0x1 << 11);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR)) {
+        reason[12] |= (0x1 << 12);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU)) {
+        reason[12] |= (0x1 << 13);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE)) {
+        reason[12] |= (0x1 << 14);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP)) {
+        reason[12] |= (0x1 << 15);
+    }
+}
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_flex_field_data[] = {
+    {
+        .name = "DLB_ECMP_DESTINATION_15_0",
+        .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { -1, -1 }, /* Profile 2. */
+            { -1, -1 }, /* Profile 3. */
+            { -1, -1 }, /* Profile 4. */
+            { -1, -1 }, /* Profile 5. */
+            { -1, -1 }, /* Profile 6. */
+            { -1, -1 }, /* Profile 7. */
+            { -1, -1 }, /* Profile 8. */
+            { -1, -1 }, /* Profile 9. */
+            { -1, -1 }, /* Profile 10. */
+            { -1, -1 }, /* Profile 11. */
+            { -1, -1 }, /* Profile 12. */
+            { 288, 303 }, /* Profile 13. */
+            { 320, 335 }, /* Profile 14. */
+            { 320, 335 }, /* Profile 15. */
+            { 320, 335 }, /* Profile 16. */
+            { 288, 303 }, /* Profile 17. */
+            { 320, 335 }, /* Profile 18. */
+            { 320, 335 }, /* Profile 19. */
+            { 320, 335 }, /* Profile 20. */
+            { 288, 303 }, /* Profile 21. */
+            { 320, 335 }, /* Profile 22. */
+            { 320, 335 }, /* Profile 23. */
+            { -1, -1 }, /* Profile 24. */
+            { -1, -1 }, /* Profile 25. */
+            { -1, -1 }, /* Profile 26. */
+            { -1, -1 }, /* Profile 27. */
+            { -1, -1 }, /* Profile 28. */
+            { -1, -1 }, /* Profile 29. */
+            { -1, -1 }, /* Profile 30. */
+            { -1, -1 }, /* Profile 31. */
+            { -1, -1 }, /* Profile 32. */
+            { -1, -1 }, /* Profile 33. */
+            { -1, -1 }, /* Profile 34. */
+            { 288, 303 }, /* Profile 35. */
+            { 320, 335 }, /* Profile 36. */
+            { 320, 335 }, /* Profile 37. */
+            { 320, 335 }, /* Profile 38. */
+            { 288, 303 }, /* Profile 39. */
+            { 320, 335 }, /* Profile 40. */
+            { 320, 335 }, /* Profile 41. */
+            { 320, 335 }, /* Profile 42. */
+            { 288, 303 }, /* Profile 43. */
+            { 320, 335 }, /* Profile 44. */
+            { 320, 335 }, /* Profile 45. */
+        },
+        .profile_cnt = 46,
+    },
+    {
+        .name = "DNAT_CTRL_3_0",
+        .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_DNAT_CTRL_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { -1, -1 }, /* Profile 2. */
+            { 368, 371 }, /* Profile 3. */
+            { -1, -1 }, /* Profile 4. */
+            { -1, -1 }, /* Profile 5. */
+            { -1, -1 }, /* Profile 6. */
+            { 368, 371 }, /* Profile 7. */
+            { -1, -1 }, /* Profile 8. */
+            { -1, -1 }, /* Profile 9. */
+            { -1, -1 }, /* Profile 10. */
+            { 368, 371 }, /* Profile 11. */
+            { -1, -1 }, /* Profile 12. */
+            { -1, -1 }, /* Profile 13. */
+            { 368, 371 }, /* Profile 14. */
+            { -1, -1 }, /* Profile 15. */
+            { -1, -1 }, /* Profile 16. */
+            { -1, -1 }, /* Profile 17. */
+            { 368, 371 }, /* Profile 18. */
+            { -1, -1 }, /* Profile 19. */
+            { -1, -1 }, /* Profile 20. */
+            { -1, -1 }, /* Profile 21. */
+            { 368, 371 }, /* Profile 22. */
+            { -1, -1 }, /* Profile 23. */
+            { -1, -1 }, /* Profile 24. */
+            { 368, 371 }, /* Profile 25. */
+            { -1, -1 }, /* Profile 26. */
+            { -1, -1 }, /* Profile 27. */
+            { -1, -1 }, /* Profile 28. */
+            { 368, 371 }, /* Profile 29. */
+            { -1, -1 }, /* Profile 30. */
+            { -1, -1 }, /* Profile 31. */
+            { -1, -1 }, /* Profile 32. */
+            { 368, 371 }, /* Profile 33. */
+            { -1, -1 }, /* Profile 34. */
+            { -1, -1 }, /* Profile 35. */
+            { 368, 371 }, /* Profile 36. */
+            { -1, -1 }, /* Profile 37. */
+            { -1, -1 }, /* Profile 38. */
+            { -1, -1 }, /* Profile 39. */
+            { 368, 371 }, /* Profile 40. */
+            { -1, -1 }, /* Profile 41. */
+            { -1, -1 }, /* Profile 42. */
+            { -1, -1 }, /* Profile 43. */
+            { 368, 371 }, /* Profile 44. */
+        },
+        .profile_cnt = 45,
+    },
+    {
+        .name = "DROP_CODE_15_0",
+        .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 48, 63 }, /* Profile 2. */
+            { 48, 63 }, /* Profile 3. */
+            { 48, 63 }, /* Profile 4. */
+            { 48, 63 }, /* Profile 5. */
+            { -1, -1 }, /* Profile 6. */
+            { -1, -1 }, /* Profile 7. */
+            { -1, -1 }, /* Profile 8. */
+            { -1, -1 }, /* Profile 9. */
+            { 48, 63 }, /* Profile 10. */
+            { 48, 63 }, /* Profile 11. */
+            { 48, 63 }, /* Profile 12. */
+            { 48, 63 }, /* Profile 13. */
+            { 48, 63 }, /* Profile 14. */
+            { 48, 63 }, /* Profile 15. */
+            { 48, 63 }, /* Profile 16. */
+            { -1, -1 }, /* Profile 17. */
+            { -1, -1 }, /* Profile 18. */
+            { -1, -1 }, /* Profile 19. */
+            { -1, -1 }, /* Profile 20. */
+            { 48, 63 }, /* Profile 21. */
+            { 48, 63 }, /* Profile 22. */
+            { 48, 63 }, /* Profile 23. */
+            { 48, 63 }, /* Profile 24. */
+            { 48, 63 }, /* Profile 25. */
+            { 48, 63 }, /* Profile 26. */
+            { 48, 63 }, /* Profile 27. */
+            { -1, -1 }, /* Profile 28. */
+            { -1, -1 }, /* Profile 29. */
+            { -1, -1 }, /* Profile 30. */
+            { -1, -1 }, /* Profile 31. */
+            { 48, 63 }, /* Profile 32. */
+            { 48, 63 }, /* Profile 33. */
+            { 48, 63 }, /* Profile 34. */
+            { 48, 63 }, /* Profile 35. */
+            { 48, 63 }, /* Profile 36. */
+            { 48, 63 }, /* Profile 37. */
+            { 48, 63 }, /* Profile 38. */
+            { -1, -1 }, /* Profile 39. */
+            { -1, -1 }, /* Profile 40. */
+            { -1, -1 }, /* Profile 41. */
+            { -1, -1 }, /* Profile 42. */
+            { 48, 63 }, /* Profile 43. */
+            { 48, 63 }, /* Profile 44. */
+            { 48, 63 }, /* Profile 45. */
+        },
+        .profile_cnt = 46,
+    },
+    {
+        .name = "DVP_15_0",
+        .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_DVP_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 176, 191 }, /* Profile 2. */
+            { 176, 191 }, /* Profile 3. */
+            { 208, 223 }, /* Profile 4. */
+            { 208, 223 }, /* Profile 5. */
+            { 176, 191 }, /* Profile 6. */
+            { 176, 191 }, /* Profile 7. */
+            { 208, 223 }, /* Profile 8. */
+            { 208, 223 }, /* Profile 9. */
+            { 176, 191 }, /* Profile 10. */
+            { 176, 191 }, /* Profile 11. */
+            { 208, 223 }, /* Profile 12. */
+            { 176, 191 }, /* Profile 13. */
+            { 176, 191 }, /* Profile 14. */
+            { 208, 223 }, /* Profile 15. */
+            { 208, 223 }, /* Profile 16. */
+            { 176, 191 }, /* Profile 17. */
+            { 176, 191 }, /* Profile 18. */
+            { 208, 223 }, /* Profile 19. */
+            { 208, 223 }, /* Profile 20. */
+            { 176, 191 }, /* Profile 21. */
+            { 176, 191 }, /* Profile 22. */
+            { 208, 223 }, /* Profile 23. */
+            { 192, 207 }, /* Profile 24. */
+            { 192, 207 }, /* Profile 25. */
+            { 224, 239 }, /* Profile 26. */
+            { 224, 239 }, /* Profile 27. */
+            { 192, 207 }, /* Profile 28. */
+            { 192, 207 }, /* Profile 29. */
+            { 224, 239 }, /* Profile 30. */
+            { 224, 239 }, /* Profile 31. */
+            { 192, 207 }, /* Profile 32. */
+            { 192, 207 }, /* Profile 33. */
+            { 224, 239 }, /* Profile 34. */
+            { 192, 207 }, /* Profile 35. */
+            { 192, 207 }, /* Profile 36. */
+            { 224, 239 }, /* Profile 37. */
+            { 224, 239 }, /* Profile 38. */
+            { 192, 207 }, /* Profile 39. */
+            { 192, 207 }, /* Profile 40. */
+            { 224, 239 }, /* Profile 41. */
+            { 224, 239 }, /* Profile 42. */
+            { 192, 207 }, /* Profile 43. */
+            { 192, 207 }, /* Profile 44. */
+            { 224, 239 }, /* Profile 45. */
+        },
+        .profile_cnt = 46,
+    },
+    {
+        .name = "EFFECTIVE_TTL_AND_SNAT_CTRL_15_0",
+        .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_AND_SNAT_CTRL_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 144, 159 }, /* Profile 2. */
+            { 144, 159 }, /* Profile 3. */
+            { 176, 191 }, /* Profile 4. */
+            { 176, 191 }, /* Profile 5. */
+            { 144, 159 }, /* Profile 6. */
+            { 144, 159 }, /* Profile 7. */
+            { 176, 191 }, /* Profile 8. */
+            { 176, 191 }, /* Profile 9. */
+            { 144, 159 }, /* Profile 10. */
+            { 144, 159 }, /* Profile 11. */
+            { 176, 191 }, /* Profile 12. */
+            { 144, 159 }, /* Profile 13. */
+            { 144, 159 }, /* Profile 14. */
+            { 176, 191 }, /* Profile 15. */
+            { 176, 191 }, /* Profile 16. */
+            { 144, 159 }, /* Profile 17. */
+            { 144, 159 }, /* Profile 18. */
+            { 176, 191 }, /* Profile 19. */
+            { 176, 191 }, /* Profile 20. */
+            { 144, 159 }, /* Profile 21. */
+            { 144, 159 }, /* Profile 22. */
+            { 176, 191 }, /* Profile 23. */
+            { 160, 175 }, /* Profile 24. */
+            { 160, 175 }, /* Profile 25. */
+            { 192, 207 }, /* Profile 26. */
+            { 192, 207 }, /* Profile 27. */
+            { 160, 175 }, /* Profile 28. */
+            { 160, 175 }, /* Profile 29. */
+            { 192, 207 }, /* Profile 30. */
+            { 192, 207 }, /* Profile 31. */
+            { 160, 175 }, /* Profile 32. */
+            { 160, 175 }, /* Profile 33. */
+            { 192, 207 }, /* Profile 34. */
+            { 160, 175 }, /* Profile 35. */
+            { 160, 175 }, /* Profile 36. */
+            { 192, 207 }, /* Profile 37. */
+            { 192, 207 }, /* Profile 38. */
+            { 160, 175 }, /* Profile 39. */
+            { 160, 175 }, /* Profile 40. */
+            { 192, 207 }, /* Profile 41. */
+            { 192, 207 }, /* Profile 42. */
+            { 160, 175 }, /* Profile 43. */
+            { 160, 175 }, /* Profile 44. */
+            { 192, 207 }, /* Profile 45. */
+        },
+        .profile_cnt = 46,
+    },
+    {
+        .name = "EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0",
+        .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 288, 303 }, /* Profile 2. */
+            { 320, 335 }, /* Profile 3. */
+            { 320, 335 }, /* Profile 4. */
+            { 320, 335 }, /* Profile 5. */
+            { 288, 303 }, /* Profile 6. */
+            { 320, 335 }, /* Profile 7. */
+            { 320, 335 }, /* Profile 8. */
+            { 320, 335 }, /* Profile 9. */
+            { 288, 303 }, /* Profile 10. */
+            { 320, 335 }, /* Profile 11. */
+            { 320, 335 }, /* Profile 12. */
+            { -1, -1 }, /* Profile 13. */
+            { -1, -1 }, /* Profile 14. */
+            { -1, -1 }, /* Profile 15. */
+            { -1, -1 }, /* Profile 16. */
+            { -1, -1 }, /* Profile 17. */
+            { -1, -1 }, /* Profile 18. */
+            { -1, -1 }, /* Profile 19. */
+            { -1, -1 }, /* Profile 20. */
+            { -1, -1 }, /* Profile 21. */
+            { -1, -1 }, /* Profile 22. */
+            { -1, -1 }, /* Profile 23. */
+            { 288, 303 }, /* Profile 24. */
+            { 320, 335 }, /* Profile 25. */
+            { 320, 335 }, /* Profile 26. */
+            { 320, 335 }, /* Profile 27. */
+            { 288, 303 }, /* Profile 28. */
+            { 320, 335 }, /* Profile 29. */
+            { 320, 335 }, /* Profile 30. */
+            { 320, 335 }, /* Profile 31. */
+            { 288, 303 }, /* Profile 32. */
+            { 320, 335 }, /* Profile 33. */
+            { 320, 335 }, /* Profile 34. */
+        },
+        .profile_cnt = 35,
+    },
+    {
+        .name = "ENTROPY_LABEL_HIGH_3_0",
+        .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 372, 375 }, /* Profile 2. */
+            { 384, 387 }, /* Profile 3. */
+            { 380, 383 }, /* Profile 4. */
+            { 380, 383 }, /* Profile 5. */
+            { 372, 375 }, /* Profile 6. */
+            { 384, 387 }, /* Profile 7. */
+            { 380, 383 }, /* Profile 8. */
+            { 380, 383 }, /* Profile 9. */
+            { 372, 375 }, /* Profile 10. */
+            { 384, 387 }, /* Profile 11. */
+            { 380, 383 }, /* Profile 12. */
+            { 372, 375 }, /* Profile 13. */
+            { 384, 387 }, /* Profile 14. */
+            { 380, 383 }, /* Profile 15. */
+            { 380, 383 }, /* Profile 16. */
+            { 372, 375 }, /* Profile 17. */
+            { 384, 387 }, /* Profile 18. */
+            { 380, 383 }, /* Profile 19. */
+            { 380, 383 }, /* Profile 20. */
+            { 372, 375 }, /* Profile 21. */
+            { 384, 387 }, /* Profile 22. */
+            { 380, 383 }, /* Profile 23. */
+            { 372, 375 }, /* Profile 24. */
+            { 384, 387 }, /* Profile 25. */
+            { 380, 383 }, /* Profile 26. */
+            { 380, 383 }, /* Profile 27. */
+            { 372, 375 }, /* Profile 28. */
+            { 384, 387 }, /* Profile 29. */
+            { 380, 383 }, /* Profile 30. */
+            { 380, 383 }, /* Profile 31. */
+            { 372, 375 }, /* Profile 32. */
+            { 384, 387 }, /* Profile 33. */
+            { 380, 383 }, /* Profile 34. */
+            { 372, 375 }, /* Profile 35. */
+            { 384, 387 }, /* Profile 36. */
+            { 380, 383 }, /* Profile 37. */
+            { 380, 383 }, /* Profile 38. */
+            { 372, 375 }, /* Profile 39. */
+            { 384, 387 }, /* Profile 40. */
+            { 380, 383 }, /* Profile 41. */
+            { 380, 383 }, /* Profile 42. */
+            { 372, 375 }, /* Profile 43. */
+            { 384, 387 }, /* Profile 44. */
+            { 380, 383 }, /* Profile 45. */
+        },
+        .profile_cnt = 46,
+    },
+    {
+        .name = "ENTROPY_LABEL_LOW_15_0",
+        .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 80, 95 }, /* Profile 2. */
+            { 80, 95 }, /* Profile 3. */
+            { 80, 95 }, /* Profile 4. */
+            { 80, 95 }, /* Profile 5. */
+            { 80, 95 }, /* Profile 6. */
+            { 80, 95 }, /* Profile 7. */
+            { 80, 95 }, /* Profile 8. */
+            { 80, 95 }, /* Profile 9. */
+            { 80, 95 }, /* Profile 10. */
+            { 80, 95 }, /* Profile 11. */
+            { 80, 95 }, /* Profile 12. */
+            { 80, 95 }, /* Profile 13. */
+            { 80, 95 }, /* Profile 14. */
+            { 80, 95 }, /* Profile 15. */
+            { 80, 95 }, /* Profile 16. */
+            { 80, 95 }, /* Profile 17. */
+            { 80, 95 }, /* Profile 18. */
+            { 80, 95 }, /* Profile 19. */
+            { 80, 95 }, /* Profile 20. */
+            { 80, 95 }, /* Profile 21. */
+            { 80, 95 }, /* Profile 22. */
+            { 80, 95 }, /* Profile 23. */
+            { 80, 95 }, /* Profile 24. */
+            { 80, 95 }, /* Profile 25. */
+            { 80, 95 }, /* Profile 26. */
+            { 80, 95 }, /* Profile 27. */
+            { 80, 95 }, /* Profile 28. */
+            { 80, 95 }, /* Profile 29. */
+            { 80, 95 }, /* Profile 30. */
+            { 80, 95 }, /* Profile 31. */
+            { 80, 95 }, /* Profile 32. */
+            { 80, 95 }, /* Profile 33. */
+            { 80, 95 }, /* Profile 34. */
+            { 80, 95 }, /* Profile 35. */
+            { 80, 95 }, /* Profile 36. */
+            { 80, 95 }, /* Profile 37. */
+            { 80, 95 }, /* Profile 38. */
+            { 80, 95 }, /* Profile 39. */
+            { 80, 95 }, /* Profile 40. */
+            { 80, 95 }, /* Profile 41. */
+            { 80, 95 }, /* Profile 42. */
+            { 80, 95 }, /* Profile 43. */
+            { 80, 95 }, /* Profile 44. */
+            { 80, 95 }, /* Profile 45. */
+        },
+        .profile_cnt = 46,
+    },
+    {
+        .name = "EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0",
+        .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { -1, -1 }, /* Profile 2. */
+            { -1, -1 }, /* Profile 3. */
+            { -1, -1 }, /* Profile 4. */
+            { -1, -1 }, /* Profile 5. */
+            { 48, 63 }, /* Profile 6. */
+            { 48, 63 }, /* Profile 7. */
+            { 48, 63 }, /* Profile 8. */
+            { 48, 63 }, /* Profile 9. */
+            { -1, -1 }, /* Profile 10. */
+            { -1, -1 }, /* Profile 11. */
+            { -1, -1 }, /* Profile 12. */
+            { -1, -1 }, /* Profile 13. */
+            { -1, -1 }, /* Profile 14. */
+            { -1, -1 }, /* Profile 15. */
+            { -1, -1 }, /* Profile 16. */
+            { 48, 63 }, /* Profile 17. */
+            { 48, 63 }, /* Profile 18. */
+            { 48, 63 }, /* Profile 19. */
+            { 48, 63 }, /* Profile 20. */
+            { -1, -1 }, /* Profile 21. */
+            { -1, -1 }, /* Profile 22. */
+            { -1, -1 }, /* Profile 23. */
+            { -1, -1 }, /* Profile 24. */
+            { -1, -1 }, /* Profile 25. */
+            { -1, -1 }, /* Profile 26. */
+            { -1, -1 }, /* Profile 27. */
+            { 48, 63 }, /* Profile 28. */
+            { 48, 63 }, /* Profile 29. */
+            { 48, 63 }, /* Profile 30. */
+            { 48, 63 }, /* Profile 31. */
+            { -1, -1 }, /* Profile 32. */
+            { -1, -1 }, /* Profile 33. */
+            { -1, -1 }, /* Profile 34. */
+            { -1, -1 }, /* Profile 35. */
+            { -1, -1 }, /* Profile 36. */
+            { -1, -1 }, /* Profile 37. */
+            { -1, -1 }, /* Profile 38. */
+            { 48, 63 }, /* Profile 39. */
+            { 48, 63 }, /* Profile 40. */
+            { 48, 63 }, /* Profile 41. */
+            { 48, 63 }, /* Profile 42. */
+        },
+        .profile_cnt = 43,
+    },
+    {
+        .name = "EP_NIH_HDR_RECIRC_CODE_3_0",
+        .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_RECIRC_CODE_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 376, 379 }, /* Profile 2. */
+            { 388, 391 }, /* Profile 3. */
+            { 384, 387 }, /* Profile 4. */
+            { 384, 387 }, /* Profile 5. */
+            { 376, 379 }, /* Profile 6. */
+            { 388, 391 }, /* Profile 7. */
+            { 384, 387 }, /* Profile 8. */
+            { 384, 387 }, /* Profile 9. */
+            { -1, -1 }, /* Profile 10. */
+            { -1, -1 }, /* Profile 11. */
+            { -1, -1 }, /* Profile 12. */
+            { 376, 379 }, /* Profile 13. */
+            { 388, 391 }, /* Profile 14. */
+            { 384, 387 }, /* Profile 15. */
+            { 384, 387 }, /* Profile 16. */
+            { 376, 379 }, /* Profile 17. */
+            { 388, 391 }, /* Profile 18. */
+            { 384, 387 }, /* Profile 19. */
+            { 384, 387 }, /* Profile 20. */
+            { -1, -1 }, /* Profile 21. */
+            { -1, -1 }, /* Profile 22. */
+            { -1, -1 }, /* Profile 23. */
+            { 376, 379 }, /* Profile 24. */
+            { 388, 391 }, /* Profile 25. */
+            { 384, 387 }, /* Profile 26. */
+            { 384, 387 }, /* Profile 27. */
+            { 376, 379 }, /* Profile 28. */
+            { 388, 391 }, /* Profile 29. */
+            { 384, 387 }, /* Profile 30. */
+            { 384, 387 }, /* Profile 31. */
+            { -1, -1 }, /* Profile 32. */
+            { -1, -1 }, /* Profile 33. */
+            { -1, -1 }, /* Profile 34. */
+            { 376, 379 }, /* Profile 35. */
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+    {
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+        .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 112, 127 }, /* Profile 2. */
+            { 112, 127 }, /* Profile 3. */
+            { 112, 127 }, /* Profile 4. */
+            { 112, 127 }, /* Profile 5. */
+            { 112, 127 }, /* Profile 6. */
+            { 112, 127 }, /* Profile 7. */
+            { 112, 127 }, /* Profile 8. */
+            { 112, 127 }, /* Profile 9. */
+            { 112, 127 }, /* Profile 10. */
+            { 112, 127 }, /* Profile 11. */
+            { 112, 127 }, /* Profile 12. */
+            { 112, 127 }, /* Profile 13. */
+            { 112, 127 }, /* Profile 14. */
+            { 112, 127 }, /* Profile 15. */
+            { 112, 127 }, /* Profile 16. */
+            { 112, 127 }, /* Profile 17. */
+            { 112, 127 }, /* Profile 18. */
+            { 112, 127 }, /* Profile 19. */
+            { 112, 127 }, /* Profile 20. */
+            { 112, 127 }, /* Profile 21. */
+            { 112, 127 }, /* Profile 22. */
+            { 112, 127 }, /* Profile 23. */
+            { 112, 127 }, /* Profile 24. */
+            { 112, 127 }, /* Profile 25. */
+            { 112, 127 }, /* Profile 26. */
+            { 112, 127 }, /* Profile 27. */
+            { 112, 127 }, /* Profile 28. */
+            { 112, 127 }, /* Profile 29. */
+            { 112, 127 }, /* Profile 30. */
+            { 112, 127 }, /* Profile 31. */
+            { 112, 127 }, /* Profile 32. */
+            { 112, 127 }, /* Profile 33. */
+            { 112, 127 }, /* Profile 34. */
+            { 112, 127 }, /* Profile 35. */
+            { 112, 127 }, /* Profile 36. */
+            { 112, 127 }, /* Profile 37. */
+            { 112, 127 }, /* Profile 38. */
+            { 112, 127 }, /* Profile 39. */
+            { 112, 127 }, /* Profile 40. */
+            { 112, 127 }, /* Profile 41. */
+            { 112, 127 }, /* Profile 42. */
+            { 112, 127 }, /* Profile 43. */
+            { 112, 127 }, /* Profile 44. */
+            { 112, 127 }, /* Profile 45. */
+        },
+        .profile_cnt = 46,
+    },
+    {
+        .name = "SYSTEM_OPCODE_3_0",
+        .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 396, 399 }, /* Profile 2. */
+            { 408, 411 }, /* Profile 3. */
+            { 404, 407 }, /* Profile 4. */
+            { 404, 407 }, /* Profile 5. */
+            { 396, 399 }, /* Profile 6. */
+            { 408, 411 }, /* Profile 7. */
+            { 404, 407 }, /* Profile 8. */
+            { 404, 407 }, /* Profile 9. */
+            { 392, 395 }, /* Profile 10. */
+            { 404, 407 }, /* Profile 11. */
+            { 400, 403 }, /* Profile 12. */
+            { 396, 399 }, /* Profile 13. */
+            { 408, 411 }, /* Profile 14. */
+            { 404, 407 }, /* Profile 15. */
+            { 404, 407 }, /* Profile 16. */
+            { 396, 399 }, /* Profile 17. */
+            { 408, 411 }, /* Profile 18. */
+            { 404, 407 }, /* Profile 19. */
+            { 404, 407 }, /* Profile 20. */
+            { 392, 395 }, /* Profile 21. */
+            { 404, 407 }, /* Profile 22. */
+            { 400, 403 }, /* Profile 23. */
+            { 396, 399 }, /* Profile 24. */
+            { 408, 411 }, /* Profile 25. */
+            { 404, 407 }, /* Profile 26. */
+            { 404, 407 }, /* Profile 27. */
+            { 396, 399 }, /* Profile 28. */
+            { 408, 411 }, /* Profile 29. */
+            { 404, 407 }, /* Profile 30. */
+            { 404, 407 }, /* Profile 31. */
+            { 392, 395 }, /* Profile 32. */
+            { 404, 407 }, /* Profile 33. */
+            { 400, 403 }, /* Profile 34. */
+            { 396, 399 }, /* Profile 35. */
+            { 408, 411 }, /* Profile 36. */
+            { 404, 407 }, /* Profile 37. */
+            { 404, 407 }, /* Profile 38. */
+            { 396, 399 }, /* Profile 39. */
+            { 408, 411 }, /* Profile 40. */
+            { 404, 407 }, /* Profile 41. */
+            { 404, 407 }, /* Profile 42. */
+            { 392, 395 }, /* Profile 43. */
+            { 404, 407 }, /* Profile 44. */
+            { 400, 403 }, /* Profile 45. */
+        },
+        .profile_cnt = 46,
+    },
+    {
+        .name = "SYSTEM_SOURCE_15_0",
+        .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 96, 111 }, /* Profile 2. */
+            { 96, 111 }, /* Profile 3. */
+            { 96, 111 }, /* Profile 4. */
+            { 96, 111 }, /* Profile 5. */
+            { 96, 111 }, /* Profile 6. */
+            { 96, 111 }, /* Profile 7. */
+            { 96, 111 }, /* Profile 8. */
+            { 96, 111 }, /* Profile 9. */
+            { 96, 111 }, /* Profile 10. */
+            { 96, 111 }, /* Profile 11. */
+            { 96, 111 }, /* Profile 12. */
+            { 96, 111 }, /* Profile 13. */
+            { 96, 111 }, /* Profile 14. */
+            { 96, 111 }, /* Profile 15. */
+            { 96, 111 }, /* Profile 16. */
+            { 96, 111 }, /* Profile 17. */
+            { 96, 111 }, /* Profile 18. */
+            { 96, 111 }, /* Profile 19. */
+            { 96, 111 }, /* Profile 20. */
+            { 96, 111 }, /* Profile 21. */
+            { 96, 111 }, /* Profile 22. */
+            { 96, 111 }, /* Profile 23. */
+            { 96, 111 }, /* Profile 24. */
+            { 96, 111 }, /* Profile 25. */
+            { 96, 111 }, /* Profile 26. */
+            { 96, 111 }, /* Profile 27. */
+            { 96, 111 }, /* Profile 28. */
+            { 96, 111 }, /* Profile 29. */
+            { 96, 111 }, /* Profile 30. */
+            { 96, 111 }, /* Profile 31. */
+            { 96, 111 }, /* Profile 32. */
+            { 96, 111 }, /* Profile 33. */
+            { 96, 111 }, /* Profile 34. */
+            { 96, 111 }, /* Profile 35. */
+            { 96, 111 }, /* Profile 36. */
+            { 96, 111 }, /* Profile 37. */
+            { 96, 111 }, /* Profile 38. */
+            { 96, 111 }, /* Profile 39. */
+            { 96, 111 }, /* Profile 40. */
+            { 96, 111 }, /* Profile 41. */
+            { 96, 111 }, /* Profile 42. */
+            { 96, 111 }, /* Profile 43. */
+            { 96, 111 }, /* Profile 44. */
+            { 96, 111 }, /* Profile 45. */
+        },
+        .profile_cnt = 46,
+    },
+    {
+        .name = "TIMESTAMP_CTRL_3_0",
+        .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { -1, -1 }, /* Profile 2. */
+            { -1, -1 }, /* Profile 3. */
+            { 420, 423 }, /* Profile 4. */
+            { 420, 423 }, /* Profile 5. */
+            { -1, -1 }, /* Profile 6. */
+            { -1, -1 }, /* Profile 7. */
+            { 420, 423 }, /* Profile 8. */
+            { 420, 423 }, /* Profile 9. */
+            { -1, -1 }, /* Profile 10. */
+            { -1, -1 }, /* Profile 11. */
+            { 416, 419 }, /* Profile 12. */
+            { -1, -1 }, /* Profile 13. */
+            { -1, -1 }, /* Profile 14. */
+            { 420, 423 }, /* Profile 15. */
+            { 420, 423 }, /* Profile 16. */
+            { -1, -1 }, /* Profile 17. */
+            { -1, -1 }, /* Profile 18. */
+            { 420, 423 }, /* Profile 19. */
+            { 420, 423 }, /* Profile 20. */
+            { -1, -1 }, /* Profile 21. */
+            { -1, -1 }, /* Profile 22. */
+            { 416, 419 }, /* Profile 23. */
+            { -1, -1 }, /* Profile 24. */
+            { -1, -1 }, /* Profile 25. */
+            { 420, 423 }, /* Profile 26. */
+            { 420, 423 }, /* Profile 27. */
+            { -1, -1 }, /* Profile 28. */
+            { -1, -1 }, /* Profile 29. */
+            { 420, 423 }, /* Profile 30. */
+            { 420, 423 }, /* Profile 31. */
+            { -1, -1 }, /* Profile 32. */
+            { -1, -1 }, /* Profile 33. */
+            { 416, 419 }, /* Profile 34. */
+            { -1, -1 }, /* Profile 35. */
+            { -1, -1 }, /* Profile 36. */
+            { 420, 423 }, /* Profile 37. */
+            { 420, 423 }, /* Profile 38. */
+            { -1, -1 }, /* Profile 39. */
+            { -1, -1 }, /* Profile 40. */
+            { 420, 423 }, /* Profile 41. */
+            { 420, 423 }, /* Profile 42. */
+            { -1, -1 }, /* Profile 43. */
+            { -1, -1 }, /* Profile 44. */
+            { 416, 419 }, /* Profile 45. */
+        },
+        .profile_cnt = 46,
+    },
+    {
+        .name = "TUNNEL_PROCESSING_RESULTS_1_3_0",
+        .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 388, 391 }, /* Profile 2. */
+            { 400, 403 }, /* Profile 3. */
+            { 396, 399 }, /* Profile 4. */
+            { 396, 399 }, /* Profile 5. */
+            { 388, 391 }, /* Profile 6. */
+            { 400, 403 }, /* Profile 7. */
+            { 396, 399 }, /* Profile 8. */
+            { 396, 399 }, /* Profile 9. */
+            { 384, 387 }, /* Profile 10. */
+            { 396, 399 }, /* Profile 11. */
+            { 392, 395 }, /* Profile 12. */
+            { 388, 391 }, /* Profile 13. */
+            { 400, 403 }, /* Profile 14. */
+            { 396, 399 }, /* Profile 15. */
+            { 396, 399 }, /* Profile 16. */
+            { 388, 391 }, /* Profile 17. */
+            { 400, 403 }, /* Profile 18. */
+            { 396, 399 }, /* Profile 19. */
+            { 396, 399 }, /* Profile 20. */
+            { 384, 387 }, /* Profile 21. */
+            { 396, 399 }, /* Profile 22. */
+            { 392, 395 }, /* Profile 23. */
+            { 388, 391 }, /* Profile 24. */
+            { 400, 403 }, /* Profile 25. */
+            { 396, 399 }, /* Profile 26. */
+            { 396, 399 }, /* Profile 27. */
+            { 388, 391 }, /* Profile 28. */
+            { 400, 403 }, /* Profile 29. */
+            { 396, 399 }, /* Profile 30. */
+            { 396, 399 }, /* Profile 31. */
+            { 384, 387 }, /* Profile 32. */
+            { 396, 399 }, /* Profile 33. */
+            { 392, 395 }, /* Profile 34. */
+            { 388, 391 }, /* Profile 35. */
+            { 400, 403 }, /* Profile 36. */
+            { 396, 399 }, /* Profile 37. */
+            { 396, 399 }, /* Profile 38. */
+            { 388, 391 }, /* Profile 39. */
+            { 400, 403 }, /* Profile 40. */
+            { 396, 399 }, /* Profile 41. */
+            { 396, 399 }, /* Profile 42. */
+            { 384, 387 }, /* Profile 43. */
+            { 396, 399 }, /* Profile 44. */
+            { 392, 395 }, /* Profile 45. */
+        },
+        .profile_cnt = 46,
+    },
+    {
+        .name = "VFI_15_0",
+        .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_VFI_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 128, 143 }, /* Profile 2. */
+            { 128, 143 }, /* Profile 3. */
+            { 128, 143 }, /* Profile 4. */
+            { 128, 143 }, /* Profile 5. */
+            { 128, 143 }, /* Profile 6. */
+            { 128, 143 }, /* Profile 7. */
+            { 128, 143 }, /* Profile 8. */
+            { 128, 143 }, /* Profile 9. */
+            { 128, 143 }, /* Profile 10. */
+            { 128, 143 }, /* Profile 11. */
+            { 128, 143 }, /* Profile 12. */
+            { 128, 143 }, /* Profile 13. */
+            { 128, 143 }, /* Profile 14. */
+            { 128, 143 }, /* Profile 15. */
+            { 128, 143 }, /* Profile 16. */
+            { 128, 143 }, /* Profile 17. */
+            { 128, 143 }, /* Profile 18. */
+            { 128, 143 }, /* Profile 19. */
+            { 128, 143 }, /* Profile 20. */
+            { 128, 143 }, /* Profile 21. */
+            { 128, 143 }, /* Profile 22. */
+            { 128, 143 }, /* Profile 23. */
+            { 128, 143 }, /* Profile 24. */
+            { 128, 143 }, /* Profile 25. */
+            { 128, 143 }, /* Profile 26. */
+            { 128, 143 }, /* Profile 27. */
+            { 128, 143 }, /* Profile 28. */
+            { 128, 143 }, /* Profile 29. */
+            { 128, 143 }, /* Profile 30. */
+            { 128, 143 }, /* Profile 31. */
+            { 128, 143 }, /* Profile 32. */
+            { 128, 143 }, /* Profile 33. */
+            { 128, 143 }, /* Profile 34. */
+            { 128, 143 }, /* Profile 35. */
+            { 128, 143 }, /* Profile 36. */
+            { 128, 143 }, /* Profile 37. */
+            { 128, 143 }, /* Profile 38. */
+            { 128, 143 }, /* Profile 39. */
+            { 128, 143 }, /* Profile 40. */
+            { 128, 143 }, /* Profile 41. */
+            { 128, 143 }, /* Profile 42. */
+            { 128, 143 }, /* Profile 43. */
+            { 128, 143 }, /* Profile 44. */
+            { 128, 143 }, /* Profile 45. */
+        },
+        .profile_cnt = 46,
+    },
+    {
+        .name = "VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0",
+        .fid = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 360, 363 }, /* Profile 2. */
+            { 376, 379 }, /* Profile 3. */
+            { 372, 375 }, /* Profile 4. */
+            { 372, 375 }, /* Profile 5. */
+            { 360, 363 }, /* Profile 6. */
+            { 376, 379 }, /* Profile 7. */
+            { 372, 375 }, /* Profile 8. */
+            { 372, 375 }, /* Profile 9. */
+            { 360, 363 }, /* Profile 10. */
+            { 376, 379 }, /* Profile 11. */
+            { 372, 375 }, /* Profile 12. */
+            { 360, 363 }, /* Profile 13. */
+            { 376, 379 }, /* Profile 14. */
+            { 372, 375 }, /* Profile 15. */
+            { 372, 375 }, /* Profile 16. */
+            { 360, 363 }, /* Profile 17. */
+            { 376, 379 }, /* Profile 18. */
+            { 372, 375 }, /* Profile 19. */
+            { 372, 375 }, /* Profile 20. */
+            { 360, 363 }, /* Profile 21. */
+            { 376, 379 }, /* Profile 22. */
+            { 372, 375 }, /* Profile 23. */
+            { 360, 363 }, /* Profile 24. */
+            { 376, 379 }, /* Profile 25. */
+            { 372, 375 }, /* Profile 26. */
+            { 372, 375 }, /* Profile 27. */
+            { 360, 363 }, /* Profile 28. */
+            { 376, 379 }, /* Profile 29. */
+            { 372, 375 }, /* Profile 30. */
+            { 372, 375 }, /* Profile 31. */
+            { 360, 363 }, /* Profile 32. */
+            { 376, 379 }, /* Profile 33. */
+            { 372, 375 }, /* Profile 34. */
+            { 360, 363 }, /* Profile 35. */
+            { 376, 379 }, /* Profile 36. */
+            { 372, 375 }, /* Profile 37. */
+            { 372, 375 }, /* Profile 38. */
+            { 360, 363 }, /* Profile 39. */
+            { 376, 379 }, /* Profile 40. */
+            { 372, 375 }, /* Profile 41. */
+            { 372, 375 }, /* Profile 42. */
+            { 360, 363 }, /* Profile 43. */
+            { 376, 379 }, /* Profile 44. */
+            { 372, 375 }, /* Profile 45. */
+        },
+        .profile_cnt = 46,
+    },
+};static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_flex_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_29_0_1_rxpmd_flex_field_data,
+};
+
+static shr_enum_map_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_flex_reason_names[] = {
+    BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_reasons_info_t bcm56690_a0_dna_6_5_29_0_1_rxpmd_flex_reasons_info = {
+    .num_reasons = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RXPMD_FLEX_REASON_COUNT,
+    .reason_names = bcm56690_a0_dna_6_5_29_0_1_rxpmd_flex_reason_names,
+    .reason_encode = bcm56690_a0_dna_6_5_29_0_1_rxpmd_flex_reason_encode,
+    .reason_decode = bcm56690_a0_dna_6_5_29_0_1_rxpmd_flex_reason_decode,
+};
+
+
+static int32_t bcmpkt_arp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_operation_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_operation_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_arp_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T_FID_COUNT] = {
+    bcmpkt_arp_t_hardware_len_get,
+    bcmpkt_arp_t_hardware_type_get,
+    bcmpkt_arp_t_operation_get,
+    bcmpkt_arp_t_prot_addr_len_get,
+    bcmpkt_arp_t_protocol_type_get,
+    bcmpkt_arp_t_sender_ha_get,
+    bcmpkt_arp_t_sender_ip_get,
+    bcmpkt_arp_t_target_ha_get,
+    bcmpkt_arp_t_target_ip_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_arp_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T_FID_COUNT] = {
+    bcmpkt_arp_t_hardware_len_set,
+    bcmpkt_arp_t_hardware_type_set,
+    bcmpkt_arp_t_operation_set,
+    bcmpkt_arp_t_prot_addr_len_set,
+    bcmpkt_arp_t_protocol_type_set,
+    bcmpkt_arp_t_sender_ha_set,
+    bcmpkt_arp_t_sender_ip_set,
+    bcmpkt_arp_t_target_ha_set,
+    bcmpkt_arp_t_target_ip_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_arp_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_arp_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ARP_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_29_0_1_arp_t_field_data,
+};
+
+
+static int32_t bcmpkt_authen_t_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_payload_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_payload_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_spi_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_spi_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_authen_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_AUTHEN_T_FID_COUNT] = {
+    bcmpkt_authen_t_data_get,
+    bcmpkt_authen_t_next_header_get,
+    bcmpkt_authen_t_payload_len_get,
+    bcmpkt_authen_t_reserved_get,
+    bcmpkt_authen_t_seq_num_get,
+    bcmpkt_authen_t_spi_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_authen_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_AUTHEN_T_FID_COUNT] = {
+    bcmpkt_authen_t_data_set,
+    bcmpkt_authen_t_next_header_set,
+    bcmpkt_authen_t_payload_len_set,
+    bcmpkt_authen_t_reserved_set,
+    bcmpkt_authen_t_seq_num_set,
+    bcmpkt_authen_t_spi_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_authen_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_authen_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_AUTHEN_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_29_0_1_authen_t_field_data,
+};
+
+
+static int32_t bcmpkt_bfd_t_desmintxintv_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_desmintxintv_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_minechorxintv_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_minechorxintv_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_reqminrxintv_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_reqminrxintv_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_ap_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 18, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_ap_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 18, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_bfd_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_bfd_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_cpi_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 19, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_cpi_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 19, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_dem_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 17, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_dem_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 17, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_detectmult_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_detectmult_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_diag_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 5);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_diag_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 5, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_fin_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 20, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_fin_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 20, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_mpt_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_mpt_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_mydiscrim_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_mydiscrim_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_poll_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 21, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_poll_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 21, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_sta_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 22, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_sta_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 22, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_urdiscrim_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_urdiscrim_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 29, 3);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 29, 3, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_bfd_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_FID_COUNT] = {
+    bcmpkt_bfd_t_ap_get,
+    bcmpkt_bfd_t_bfd_length_get,
+    bcmpkt_bfd_t_cpi_get,
+    bcmpkt_bfd_t_dem_get,
+    bcmpkt_bfd_t_desmintxintv_get,
+    bcmpkt_bfd_t_detectmult_get,
+    bcmpkt_bfd_t_diag_get,
+    bcmpkt_bfd_t_fin_get,
+    bcmpkt_bfd_t_minechorxintv_get,
+    bcmpkt_bfd_t_mpt_get,
+    bcmpkt_bfd_t_mydiscrim_get,
+    bcmpkt_bfd_t_poll_get,
+    bcmpkt_bfd_t_reqminrxintv_get,
+    bcmpkt_bfd_t_sta_get,
+    bcmpkt_bfd_t_urdiscrim_get,
+    bcmpkt_bfd_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_bfd_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_FID_COUNT] = {
+    bcmpkt_bfd_t_ap_set,
+    bcmpkt_bfd_t_bfd_length_set,
+    bcmpkt_bfd_t_cpi_set,
+    bcmpkt_bfd_t_dem_set,
+    bcmpkt_bfd_t_desmintxintv_set,
+    bcmpkt_bfd_t_detectmult_set,
+    bcmpkt_bfd_t_diag_set,
+    bcmpkt_bfd_t_fin_set,
+    bcmpkt_bfd_t_minechorxintv_set,
+    bcmpkt_bfd_t_mpt_set,
+    bcmpkt_bfd_t_mydiscrim_set,
+    bcmpkt_bfd_t_poll_set,
+    bcmpkt_bfd_t_reqminrxintv_set,
+    bcmpkt_bfd_t_sta_set,
+    bcmpkt_bfd_t_urdiscrim_set,
+    bcmpkt_bfd_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_bfd_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_bfd_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_BFD_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_29_0_1_bfd_t_field_data,
+};
+
+
+static int32_t bcmpkt_cntag_t_rpid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_cntag_t_rpid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_cntag_t_tpid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_cntag_t_tpid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_cntag_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CNTAG_T_FID_COUNT] = {
+    bcmpkt_cntag_t_rpid_get,
+    bcmpkt_cntag_t_tpid_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_cntag_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CNTAG_T_FID_COUNT] = {
+    bcmpkt_cntag_t_rpid_set,
+    bcmpkt_cntag_t_tpid_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_cntag_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_cntag_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CNTAG_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_29_0_1_cntag_t_field_data,
+};
+
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_cpu_composites_0_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = {
+    bcmpkt_cpu_composites_0_t_dma_cont0_get,
+    bcmpkt_cpu_composites_0_t_dma_cont1_get,
+    bcmpkt_cpu_composites_0_t_dma_cont2_get,
+    bcmpkt_cpu_composites_0_t_dma_cont3_get,
+    bcmpkt_cpu_composites_0_t_dma_cont4_get,
+    bcmpkt_cpu_composites_0_t_dma_cont5_get,
+    bcmpkt_cpu_composites_0_t_dma_cont6_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_cpu_composites_0_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = {
+    bcmpkt_cpu_composites_0_t_dma_cont0_set,
+    bcmpkt_cpu_composites_0_t_dma_cont1_set,
+    bcmpkt_cpu_composites_0_t_dma_cont2_set,
+    bcmpkt_cpu_composites_0_t_dma_cont3_set,
+    bcmpkt_cpu_composites_0_t_dma_cont4_set,
+    bcmpkt_cpu_composites_0_t_dma_cont5_set,
+    bcmpkt_cpu_composites_0_t_dma_cont6_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_cpu_composites_0_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_cpu_composites_0_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_29_0_1_cpu_composites_0_t_field_data,
+};
+
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_cpu_composites_1_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = {
+    bcmpkt_cpu_composites_1_t_dma_cont10_get,
+    bcmpkt_cpu_composites_1_t_dma_cont11_get,
+    bcmpkt_cpu_composites_1_t_dma_cont12_get,
+    bcmpkt_cpu_composites_1_t_dma_cont13_get,
+    bcmpkt_cpu_composites_1_t_dma_cont14_get,
+    bcmpkt_cpu_composites_1_t_dma_cont15_get,
+    bcmpkt_cpu_composites_1_t_dma_cont16_get,
+    bcmpkt_cpu_composites_1_t_dma_cont17_get,
+    bcmpkt_cpu_composites_1_t_dma_cont7_get,
+    bcmpkt_cpu_composites_1_t_dma_cont8_get,
+    bcmpkt_cpu_composites_1_t_dma_cont9_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_cpu_composites_1_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = {
+    bcmpkt_cpu_composites_1_t_dma_cont10_set,
+    bcmpkt_cpu_composites_1_t_dma_cont11_set,
+    bcmpkt_cpu_composites_1_t_dma_cont12_set,
+    bcmpkt_cpu_composites_1_t_dma_cont13_set,
+    bcmpkt_cpu_composites_1_t_dma_cont14_set,
+    bcmpkt_cpu_composites_1_t_dma_cont15_set,
+    bcmpkt_cpu_composites_1_t_dma_cont16_set,
+    bcmpkt_cpu_composites_1_t_dma_cont17_set,
+    bcmpkt_cpu_composites_1_t_dma_cont7_set,
+    bcmpkt_cpu_composites_1_t_dma_cont8_set,
+    bcmpkt_cpu_composites_1_t_dma_cont9_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_cpu_composites_1_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_cpu_composites_1_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_29_0_1_cpu_composites_1_t_field_data,
+};
+
+
+static int32_t bcmpkt_dest_option_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_dest_option_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_dest_option_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_dest_option_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_dest_option_t_option_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_dest_option_t_option_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_dest_option_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_DEST_OPTION_T_FID_COUNT] = {
+    bcmpkt_dest_option_t_hdr_ext_len_get,
+    bcmpkt_dest_option_t_next_header_get,
+    bcmpkt_dest_option_t_option_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_dest_option_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_DEST_OPTION_T_FID_COUNT] = {
+    bcmpkt_dest_option_t_hdr_ext_len_set,
+    bcmpkt_dest_option_t_next_header_set,
+    bcmpkt_dest_option_t_option_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_dest_option_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_dest_option_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_DEST_OPTION_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_29_0_1_dest_option_t_field_data,
+};
+
+
+static int32_t bcmpkt_ep_nih_header_t_header_subtype_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 20, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_header_subtype_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 20, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_header_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 6);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_header_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 6, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_a_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_a_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_b_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 20, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_b_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 20, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_c_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_c_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_object_a_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_object_a_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_object_b_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_object_b_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_object_c_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_object_c_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_recirc_profile_index_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_recirc_profile_index_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 12, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 12, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_start_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 30, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_start_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 30, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_timestamp_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_ep_nih_header_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = {
+    bcmpkt_ep_nih_header_t_header_subtype_get,
+    bcmpkt_ep_nih_header_t_header_type_get,
+    bcmpkt_ep_nih_header_t_opaque_ctrl_a_get,
+    bcmpkt_ep_nih_header_t_opaque_ctrl_b_get,
+    bcmpkt_ep_nih_header_t_opaque_ctrl_c_get,
+    bcmpkt_ep_nih_header_t_opaque_object_a_get,
+    bcmpkt_ep_nih_header_t_opaque_object_b_get,
+    bcmpkt_ep_nih_header_t_opaque_object_c_get,
+    bcmpkt_ep_nih_header_t_recirc_profile_index_get,
+    bcmpkt_ep_nih_header_t_reserved_0_get,
+    bcmpkt_ep_nih_header_t_start_get,
+    bcmpkt_ep_nih_header_t_timestamp_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_ep_nih_header_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = {
+    bcmpkt_ep_nih_header_t_header_subtype_set,
+    bcmpkt_ep_nih_header_t_header_type_set,
+    bcmpkt_ep_nih_header_t_opaque_ctrl_a_set,
+    bcmpkt_ep_nih_header_t_opaque_ctrl_b_set,
+    bcmpkt_ep_nih_header_t_opaque_ctrl_c_set,
+    bcmpkt_ep_nih_header_t_opaque_object_a_set,
+    bcmpkt_ep_nih_header_t_opaque_object_b_set,
+    bcmpkt_ep_nih_header_t_opaque_object_c_set,
+    bcmpkt_ep_nih_header_t_recirc_profile_index_set,
+    bcmpkt_ep_nih_header_t_reserved_0_set,
+    bcmpkt_ep_nih_header_t_start_set,
+    bcmpkt_ep_nih_header_t_timestamp_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_ep_nih_header_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_ep_nih_header_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_EP_NIH_HEADER_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_29_0_1_ep_nih_header_t_field_data,
+};
+
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 11, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 11, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 13, 3);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 13, 3, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 10);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 10, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_t_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 10, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_t_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 10, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 12);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 12, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_erspan3_fixed_hdr_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = {
+    bcmpkt_erspan3_fixed_hdr_t_bso_get,
+    bcmpkt_erspan3_fixed_hdr_t_cos_get,
+    bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get,
+    bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get,
+    bcmpkt_erspan3_fixed_hdr_t_session_id_get,
+    bcmpkt_erspan3_fixed_hdr_t_t_get,
+    bcmpkt_erspan3_fixed_hdr_t_timestamp_get,
+    bcmpkt_erspan3_fixed_hdr_t_ver_get,
+    bcmpkt_erspan3_fixed_hdr_t_vlan_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_erspan3_fixed_hdr_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = {
+    bcmpkt_erspan3_fixed_hdr_t_bso_set,
+    bcmpkt_erspan3_fixed_hdr_t_cos_set,
+    bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set,
+    bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set,
+    bcmpkt_erspan3_fixed_hdr_t_session_id_set,
+    bcmpkt_erspan3_fixed_hdr_t_t_set,
+    bcmpkt_erspan3_fixed_hdr_t_timestamp_set,
+    bcmpkt_erspan3_fixed_hdr_t_ver_set,
+    bcmpkt_erspan3_fixed_hdr_t_vlan_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_erspan3_fixed_hdr_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_erspan3_fixed_hdr_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_29_0_1_erspan3_fixed_hdr_t_field_data,
+};
+
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 26, 6);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 26, 6, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 10);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 10, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_erspan3_subhdr_5_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = {
+    bcmpkt_erspan3_subhdr_5_t_platform_id_get,
+    bcmpkt_erspan3_subhdr_5_t_port_id_get,
+    bcmpkt_erspan3_subhdr_5_t_switch_id_get,
+    bcmpkt_erspan3_subhdr_5_t_timestamp_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_erspan3_subhdr_5_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = {
+    bcmpkt_erspan3_subhdr_5_t_platform_id_set,
+    bcmpkt_erspan3_subhdr_5_t_port_id_set,
+    bcmpkt_erspan3_subhdr_5_t_switch_id_set,
+    bcmpkt_erspan3_subhdr_5_t_timestamp_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_erspan3_subhdr_5_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_erspan3_subhdr_5_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_29_0_1_erspan3_subhdr_5_t_field_data,
+};
+
+
+static int32_t bcmpkt_esp_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_pad_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 8, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_pad_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 8, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_pad_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_pad_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_spi_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_spi_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_esp_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ESP_T_FID_COUNT] = {
+    bcmpkt_esp_t_next_header_get,
+    bcmpkt_esp_t_pad_get,
+    bcmpkt_esp_t_pad_len_get,
+    bcmpkt_esp_t_seq_num_get,
+    bcmpkt_esp_t_spi_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_esp_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ESP_T_FID_COUNT] = {
+    bcmpkt_esp_t_next_header_set,
+    bcmpkt_esp_t_pad_set,
+    bcmpkt_esp_t_pad_len_set,
+    bcmpkt_esp_t_seq_num_set,
+    bcmpkt_esp_t_spi_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_esp_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_esp_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ESP_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_29_0_1_esp_t_field_data,
+};
+
+
+static int32_t bcmpkt_ethertype_t_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ethertype_t_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_ethertype_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ETHERTYPE_T_FID_COUNT] = {
+    bcmpkt_ethertype_t_type_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_ethertype_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ETHERTYPE_T_FID_COUNT] = {
+    bcmpkt_ethertype_t_type_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_ethertype_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_ethertype_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ETHERTYPE_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_29_0_1_ethertype_t_field_data,
+};
+
+
+static int32_t bcmpkt_frag_t_frag_info_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_frag_t_frag_info_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_frag_t_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_frag_t_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_frag_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_frag_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_frag_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_frag_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_frag_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FRAG_T_FID_COUNT] = {
+    bcmpkt_frag_t_frag_info_get,
+    bcmpkt_frag_t_id_get,
+    bcmpkt_frag_t_next_header_get,
+    bcmpkt_frag_t_reserved_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_frag_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FRAG_T_FID_COUNT] = {
+    bcmpkt_frag_t_frag_info_set,
+    bcmpkt_frag_t_id_set,
+    bcmpkt_frag_t_next_header_set,
+    bcmpkt_frag_t_reserved_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_frag_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_frag_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FRAG_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_29_0_1_frag_t_field_data,
+};
+
+
+static int32_t bcmpkt_gbp_ethernet_shim_t_ethertype_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gbp_ethernet_shim_t_ethertype_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gbp_ethernet_shim_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 20, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gbp_ethernet_shim_t_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 20, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gbp_ethernet_shim_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gbp_ethernet_shim_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gbp_ethernet_shim_t_sid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gbp_ethernet_shim_t_sid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gbp_ethernet_shim_t_subtype_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gbp_ethernet_shim_t_subtype_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gbp_ethernet_shim_t_ver_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gbp_ethernet_shim_t_ver_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 4, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_gbp_ethernet_shim_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT] = {
+    bcmpkt_gbp_ethernet_shim_t_ethertype_get,
+    bcmpkt_gbp_ethernet_shim_t_flags_get,
+    bcmpkt_gbp_ethernet_shim_t_reserved_get,
+    bcmpkt_gbp_ethernet_shim_t_sid_get,
+    bcmpkt_gbp_ethernet_shim_t_subtype_get,
+    bcmpkt_gbp_ethernet_shim_t_ver_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_gbp_ethernet_shim_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT] = {
+    bcmpkt_gbp_ethernet_shim_t_ethertype_set,
+    bcmpkt_gbp_ethernet_shim_t_flags_set,
+    bcmpkt_gbp_ethernet_shim_t_reserved_set,
+    bcmpkt_gbp_ethernet_shim_t_sid_set,
+    bcmpkt_gbp_ethernet_shim_t_subtype_set,
+    bcmpkt_gbp_ethernet_shim_t_ver_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_gbp_ethernet_shim_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GBP_ETHERNET_SHIM_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_gbp_ethernet_shim_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_29_0_1_gbp_ethernet_shim_t_field_data,
+};
+
+
+static int32_t bcmpkt_generic_loopback_t_destination_obj_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_destination_obj_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_destination_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_destination_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_entropy_obj_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_entropy_obj_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_header_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 20, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_header_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 20, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_input_priority_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 12, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_input_priority_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 12, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_interface_ctrl_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 4, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_interface_ctrl_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 4, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_interface_obj_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_interface_obj_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_qos_obj_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_qos_obj_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_reserved_1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_reserved_1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_source_system_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_source_system_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_src_subport_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_src_subport_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_start_byte_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_start_byte_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_generic_loopback_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = {
+    bcmpkt_generic_loopback_t_destination_obj_get,
+    bcmpkt_generic_loopback_t_destination_type_get,
+    bcmpkt_generic_loopback_t_entropy_obj_get,
+    bcmpkt_generic_loopback_t_flags_get,
+    bcmpkt_generic_loopback_t_header_type_get,
+    bcmpkt_generic_loopback_t_input_priority_get,
+    bcmpkt_generic_loopback_t_interface_ctrl_get,
+    bcmpkt_generic_loopback_t_interface_obj_get,
+    bcmpkt_generic_loopback_t_processing_ctrl_0_get,
+    bcmpkt_generic_loopback_t_processing_ctrl_1_get,
+    bcmpkt_generic_loopback_t_qos_obj_get,
+    bcmpkt_generic_loopback_t_reserved_1_get,
+    bcmpkt_generic_loopback_t_source_system_port_get,
+    bcmpkt_generic_loopback_t_src_subport_num_get,
+    bcmpkt_generic_loopback_t_start_byte_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_generic_loopback_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = {
+    bcmpkt_generic_loopback_t_destination_obj_set,
+    bcmpkt_generic_loopback_t_destination_type_set,
+    bcmpkt_generic_loopback_t_entropy_obj_set,
+    bcmpkt_generic_loopback_t_flags_set,
+    bcmpkt_generic_loopback_t_header_type_set,
+    bcmpkt_generic_loopback_t_input_priority_set,
+    bcmpkt_generic_loopback_t_interface_ctrl_set,
+    bcmpkt_generic_loopback_t_interface_obj_set,
+    bcmpkt_generic_loopback_t_processing_ctrl_0_set,
+    bcmpkt_generic_loopback_t_processing_ctrl_1_set,
+    bcmpkt_generic_loopback_t_qos_obj_set,
+    bcmpkt_generic_loopback_t_reserved_1_set,
+    bcmpkt_generic_loopback_t_source_system_port_set,
+    bcmpkt_generic_loopback_t_src_subport_num_set,
+    bcmpkt_generic_loopback_t_start_byte_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_generic_loopback_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_generic_loopback_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_29_0_1_generic_loopback_t_field_data,
+};
+
+
+static int32_t bcmpkt_gpe_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_next_protocol_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_next_protocol_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_reserved0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_reserved0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_reserved1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_reserved1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_vni_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 8, 24);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_vni_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 8, 24, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_gpe_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GPE_T_FID_COUNT] = {
+    bcmpkt_gpe_t_flags_get,
+    bcmpkt_gpe_t_next_protocol_get,
+    bcmpkt_gpe_t_reserved0_get,
+    bcmpkt_gpe_t_reserved1_get,
+    bcmpkt_gpe_t_vni_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_gpe_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GPE_T_FID_COUNT] = {
+    bcmpkt_gpe_t_flags_set,
+    bcmpkt_gpe_t_next_protocol_set,
+    bcmpkt_gpe_t_reserved0_set,
+    bcmpkt_gpe_t_reserved1_set,
+    bcmpkt_gpe_t_vni_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_gpe_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_gpe_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GPE_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_29_0_1_gpe_t_field_data,
+};
+
+
+static int32_t bcmpkt_gre_chksum_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_chksum_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gre_chksum_t_offset_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_chksum_t_offset_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_gre_chksum_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = {
+    bcmpkt_gre_chksum_t_checksum_get,
+    bcmpkt_gre_chksum_t_offset_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_gre_chksum_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = {
+    bcmpkt_gre_chksum_t_checksum_set,
+    bcmpkt_gre_chksum_t_offset_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_gre_chksum_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_gre_chksum_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_CHKSUM_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_29_0_1_gre_chksum_t_field_data,
+};
+
+
+static int32_t bcmpkt_gre_key_t_key_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_key_t_key_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_gre_key_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_KEY_T_FID_COUNT] = {
+    bcmpkt_gre_key_t_key_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_gre_key_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_KEY_T_FID_COUNT] = {
+    bcmpkt_gre_key_t_key_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_gre_key_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_gre_key_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_KEY_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_29_0_1_gre_key_t_field_data,
+};
+
+
+static int32_t bcmpkt_gre_rout_t_routing_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_rout_t_routing_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_gre_rout_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_ROUT_T_FID_COUNT] = {
+    bcmpkt_gre_rout_t_routing_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_gre_rout_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_ROUT_T_FID_COUNT] = {
+    bcmpkt_gre_rout_t_routing_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_gre_rout_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_gre_rout_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_ROUT_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_29_0_1_gre_rout_t_field_data,
+};
+
+
+static int32_t bcmpkt_gre_seq_t_sequence_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_seq_t_sequence_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_gre_seq_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_SEQ_T_FID_COUNT] = {
+    bcmpkt_gre_seq_t_sequence_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_gre_seq_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_SEQ_T_FID_COUNT] = {
+    bcmpkt_gre_seq_t_sequence_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_gre_seq_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_gre_seq_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_SEQ_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_29_0_1_gre_seq_t_field_data,
+};
+
+
+static int32_t bcmpkt_gre_t_c_r_k_s_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_t_c_r_k_s_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gre_t_protocol_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_t_protocol_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gre_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 19, 9);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 19, 9, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gre_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 3);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 3, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_gre_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_T_FID_COUNT] = {
+    bcmpkt_gre_t_c_r_k_s_get,
+    bcmpkt_gre_t_protocol_get,
+    bcmpkt_gre_t_reserved_get,
+    bcmpkt_gre_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_gre_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_T_FID_COUNT] = {
+    bcmpkt_gre_t_c_r_k_s_set,
+    bcmpkt_gre_t_protocol_set,
+    bcmpkt_gre_t_reserved_set,
+    bcmpkt_gre_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_gre_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_gre_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_GRE_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_29_0_1_gre_t_field_data,
+};
+
+
+static int32_t bcmpkt_hg3_base_t_cn_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 4, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_cn_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 4, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_cng_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 6, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_cng_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 6, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_entropy_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 8, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_entropy_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 8, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_ext_hdr_present_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 18, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_ext_hdr_present_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 18, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_hg3_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 17, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_hg3_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 17, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_l3_routed_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 31, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_l3_routed_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 31, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_mirror_copy_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_mirror_copy_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_reserved_etype_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 22, 10);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_reserved_etype_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 22, 10, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_system_destination_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 15);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_system_destination_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 15, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_system_destination_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 15, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_system_destination_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 15, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_system_source_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 15);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_system_source_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 15, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_tc_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_tc_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 20, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 20, 2, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_hg3_base_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_FID_COUNT] = {
+    bcmpkt_hg3_base_t_cn_get,
+    bcmpkt_hg3_base_t_cng_get,
+    bcmpkt_hg3_base_t_entropy_get,
+    bcmpkt_hg3_base_t_ext_hdr_present_get,
+    bcmpkt_hg3_base_t_hg3_reserved_get,
+    bcmpkt_hg3_base_t_l3_routed_get,
+    bcmpkt_hg3_base_t_mirror_copy_get,
+    bcmpkt_hg3_base_t_reserved_etype_get,
+    bcmpkt_hg3_base_t_system_destination_get,
+    bcmpkt_hg3_base_t_system_destination_type_get,
+    bcmpkt_hg3_base_t_system_source_get,
+    bcmpkt_hg3_base_t_tc_get,
+    bcmpkt_hg3_base_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_hg3_base_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_FID_COUNT] = {
+    bcmpkt_hg3_base_t_cn_set,
+    bcmpkt_hg3_base_t_cng_set,
+    bcmpkt_hg3_base_t_entropy_set,
+    bcmpkt_hg3_base_t_ext_hdr_present_set,
+    bcmpkt_hg3_base_t_hg3_reserved_set,
+    bcmpkt_hg3_base_t_l3_routed_set,
+    bcmpkt_hg3_base_t_mirror_copy_set,
+    bcmpkt_hg3_base_t_reserved_etype_set,
+    bcmpkt_hg3_base_t_system_destination_set,
+    bcmpkt_hg3_base_t_system_destination_type_set,
+    bcmpkt_hg3_base_t_system_source_set,
+    bcmpkt_hg3_base_t_tc_set,
+    bcmpkt_hg3_base_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_hg3_base_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_hg3_base_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_BASE_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_29_0_1_hg3_base_t_field_data,
+};
+
+
+static int32_t bcmpkt_hg3_extension_0_t_class_id_lsb_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_extension_0_t_class_id_lsb_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_extension_0_t_class_id_msb_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_extension_0_t_class_id_msb_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_extension_0_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 26, 6);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_extension_0_t_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 26, 6, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_extension_0_t_forwarding_domain_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_extension_0_t_forwarding_domain_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_extension_0_t_svp_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_extension_0_t_svp_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_hg3_extension_0_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT] = {
+    bcmpkt_hg3_extension_0_t_class_id_lsb_get,
+    bcmpkt_hg3_extension_0_t_class_id_msb_get,
+    bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_get,
+    bcmpkt_hg3_extension_0_t_flags_get,
+    bcmpkt_hg3_extension_0_t_forwarding_domain_get,
+    bcmpkt_hg3_extension_0_t_svp_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_hg3_extension_0_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT] = {
+    bcmpkt_hg3_extension_0_t_class_id_lsb_set,
+    bcmpkt_hg3_extension_0_t_class_id_msb_set,
+    bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_set,
+    bcmpkt_hg3_extension_0_t_flags_set,
+    bcmpkt_hg3_extension_0_t_forwarding_domain_set,
+    bcmpkt_hg3_extension_0_t_svp_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_hg3_extension_0_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_EXTENSION_0_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_hg3_extension_0_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_29_0_1_hg3_extension_0_t_field_data,
+};
+
+
+static int32_t bcmpkt_hop_by_hop_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hop_by_hop_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hop_by_hop_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hop_by_hop_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hop_by_hop_t_option_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_hop_by_hop_t_option_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_hop_by_hop_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = {
+    bcmpkt_hop_by_hop_t_hdr_ext_len_get,
+    bcmpkt_hop_by_hop_t_next_header_get,
+    bcmpkt_hop_by_hop_t_option_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_hop_by_hop_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = {
+    bcmpkt_hop_by_hop_t_hdr_ext_len_set,
+    bcmpkt_hop_by_hop_t_next_header_set,
+    bcmpkt_hop_by_hop_t_option_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_hop_by_hop_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_hop_by_hop_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_HOP_BY_HOP_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_29_0_1_hop_by_hop_t_field_data,
+};
+
+
+static int32_t bcmpkt_icmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_icmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_icmp_t_code_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_icmp_t_code_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_icmp_t_icmp_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_icmp_t_icmp_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_icmp_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ICMP_T_FID_COUNT] = {
+    bcmpkt_icmp_t_checksum_get,
+    bcmpkt_icmp_t_code_get,
+    bcmpkt_icmp_t_icmp_type_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_icmp_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ICMP_T_FID_COUNT] = {
+    bcmpkt_icmp_t_checksum_set,
+    bcmpkt_icmp_t_code_set,
+    bcmpkt_icmp_t_icmp_type_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_icmp_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_icmp_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ICMP_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_29_0_1_icmp_t_field_data,
+};
+
+
+static int32_t bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_0_a_t_lns_device_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 24);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_0_a_t_lns_device_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 24, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_0_a_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT] = {
+    bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_get,
+    bcmpkt_ifa_flex_md_0_a_t_lns_device_id_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_0_a_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT] = {
+    bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_set,
+    bcmpkt_ifa_flex_md_0_a_t_lns_device_id_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_0_a_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_A_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_0_a_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_0_a_t_field_data,
+};
+
+
+static int32_t bcmpkt_ifa_flex_md_0_b_t_cn_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 26, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_0_b_t_cn_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 26, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_0_b_t_port_speed_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_0_b_t_port_speed_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_0_b_t_queue_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 20, 6);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_0_b_t_queue_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 20, 6, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 20);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 20, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_0_b_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT] = {
+    bcmpkt_ifa_flex_md_0_b_t_cn_get,
+    bcmpkt_ifa_flex_md_0_b_t_port_speed_get,
+    bcmpkt_ifa_flex_md_0_b_t_queue_id_get,
+    bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_0_b_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT] = {
+    bcmpkt_ifa_flex_md_0_b_t_cn_set,
+    bcmpkt_ifa_flex_md_0_b_t_port_speed_set,
+    bcmpkt_ifa_flex_md_0_b_t_queue_id_set,
+    bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_0_b_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_B_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_0_b_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_0_b_t_field_data,
+};
+
+
+static int32_t bcmpkt_ifa_flex_md_1_t_egress_port_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_1_t_egress_port_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_1_t_ingress_port_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_1_t_ingress_port_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_1_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT] = {
+    bcmpkt_ifa_flex_md_1_t_egress_port_id_get,
+    bcmpkt_ifa_flex_md_1_t_ingress_port_id_get,
+    bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_1_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT] = {
+    bcmpkt_ifa_flex_md_1_t_egress_port_id_set,
+    bcmpkt_ifa_flex_md_1_t_ingress_port_id_set,
+    bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_1_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_1_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_1_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_1_t_field_data,
+};
+
+
+static int32_t bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_2_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT] = {
+    bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_get,
+    bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_2_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT] = {
+    bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_set,
+    bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_2_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_2_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_2_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_2_t_field_data,
+};
+
+
+static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_3_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT] = {
+    bcmpkt_ifa_flex_md_3_t_mmu_stat_0_get,
+    bcmpkt_ifa_flex_md_3_t_mmu_stat_1_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_3_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT] = {
+    bcmpkt_ifa_flex_md_3_t_mmu_stat_0_set,
+    bcmpkt_ifa_flex_md_3_t_mmu_stat_1_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_3_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_3_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_3_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_3_t_field_data,
+};
+
+
+static int32_t bcmpkt_ifa_header_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_gns_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_gns_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_max_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_max_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_next_hdr_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_next_hdr_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_ver_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_ver_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_ifa_header_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_HEADER_T_FID_COUNT] = {
+    bcmpkt_ifa_header_t_flags_get,
+    bcmpkt_ifa_header_t_gns_get,
+    bcmpkt_ifa_header_t_max_length_get,
+    bcmpkt_ifa_header_t_next_hdr_get,
+    bcmpkt_ifa_header_t_ver_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_ifa_header_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_HEADER_T_FID_COUNT] = {
+    bcmpkt_ifa_header_t_flags_set,
+    bcmpkt_ifa_header_t_gns_set,
+    bcmpkt_ifa_header_t_max_length_set,
+    bcmpkt_ifa_header_t_next_hdr_set,
+    bcmpkt_ifa_header_t_ver_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_ifa_header_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_ifa_header_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_HEADER_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_29_0_1_ifa_header_t_field_data,
+};
+
+
+static int32_t bcmpkt_ifa_md_base_t_action_vector_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_md_base_t_action_vector_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_md_base_t_hop_limit_current_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_md_base_t_hop_limit_current_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_md_base_t_request_vector_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_md_base_t_request_vector_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_ifa_md_base_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_MD_BASE_T_FID_COUNT] = {
+    bcmpkt_ifa_md_base_t_action_vector_get,
+    bcmpkt_ifa_md_base_t_hop_limit_current_length_get,
+    bcmpkt_ifa_md_base_t_request_vector_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_ifa_md_base_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_MD_BASE_T_FID_COUNT] = {
+    bcmpkt_ifa_md_base_t_action_vector_set,
+    bcmpkt_ifa_md_base_t_hop_limit_current_length_set,
+    bcmpkt_ifa_md_base_t_request_vector_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_ifa_md_base_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_MD_BASE_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_ifa_md_base_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_MD_BASE_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_29_0_1_ifa_md_base_t_field_data,
+};
+
+
+static int32_t bcmpkt_ifa_metadata_t_action_vector_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_t_action_vector_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_t_hop_limit_current_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_t_hop_limit_current_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_t_metadata_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_t_metadata_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_t_request_vector_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_t_request_vector_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_ifa_metadata_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_METADATA_T_FID_COUNT] = {
+    bcmpkt_ifa_metadata_t_action_vector_get,
+    bcmpkt_ifa_metadata_t_hop_limit_current_length_get,
+    bcmpkt_ifa_metadata_t_metadata_get,
+    bcmpkt_ifa_metadata_t_request_vector_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_ifa_metadata_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_METADATA_T_FID_COUNT] = {
+    bcmpkt_ifa_metadata_t_action_vector_set,
+    bcmpkt_ifa_metadata_t_hop_limit_current_length_set,
+    bcmpkt_ifa_metadata_t_metadata_set,
+    bcmpkt_ifa_metadata_t_request_vector_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_ifa_metadata_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_METADATA_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_ifa_metadata_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IFA_METADATA_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_29_0_1_ifa_metadata_t_field_data,
+};
+
+
+static int32_t bcmpkt_igmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_igmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_igmp_t_group_address_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_igmp_t_group_address_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_igmp_t_igmp_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_igmp_t_igmp_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_igmp_t_max_resp_time_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_igmp_t_max_resp_time_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_igmp_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IGMP_T_FID_COUNT] = {
+    bcmpkt_igmp_t_checksum_get,
+    bcmpkt_igmp_t_group_address_get,
+    bcmpkt_igmp_t_igmp_type_get,
+    bcmpkt_igmp_t_max_resp_time_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_igmp_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IGMP_T_FID_COUNT] = {
+    bcmpkt_igmp_t_checksum_set,
+    bcmpkt_igmp_t_group_address_set,
+    bcmpkt_igmp_t_igmp_type_set,
+    bcmpkt_igmp_t_max_resp_time_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_igmp_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_igmp_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IGMP_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_29_0_1_igmp_t_field_data,
+};
+
+
+static int32_t bcmpkt_ioam_e2e_t_ioam_e2e_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ioam_e2e_t_ioam_e2e_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ioam_e2e_t_ioam_e2e_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ioam_e2e_t_ioam_e2e_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ioam_e2e_t_ioam_hdr_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ioam_e2e_t_ioam_hdr_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ioam_e2e_t_namespace_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ioam_e2e_t_namespace_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ioam_e2e_t_next_protocol_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ioam_e2e_t_next_protocol_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ioam_e2e_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ioam_e2e_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ioam_e2e_t_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ioam_e2e_t_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_ioam_e2e_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IOAM_E2E_T_FID_COUNT] = {
+    bcmpkt_ioam_e2e_t_ioam_e2e_data_get,
+    bcmpkt_ioam_e2e_t_ioam_e2e_type_get,
+    bcmpkt_ioam_e2e_t_ioam_hdr_len_get,
+    bcmpkt_ioam_e2e_t_namespace_id_get,
+    bcmpkt_ioam_e2e_t_next_protocol_get,
+    bcmpkt_ioam_e2e_t_reserved_get,
+    bcmpkt_ioam_e2e_t_type_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_ioam_e2e_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IOAM_E2E_T_FID_COUNT] = {
+    bcmpkt_ioam_e2e_t_ioam_e2e_data_set,
+    bcmpkt_ioam_e2e_t_ioam_e2e_type_set,
+    bcmpkt_ioam_e2e_t_ioam_hdr_len_set,
+    bcmpkt_ioam_e2e_t_namespace_id_set,
+    bcmpkt_ioam_e2e_t_next_protocol_set,
+    bcmpkt_ioam_e2e_t_reserved_set,
+    bcmpkt_ioam_e2e_t_type_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_ioam_e2e_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IOAM_E2E_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_ioam_e2e_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IOAM_E2E_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_29_0_1_ioam_e2e_t_field_data,
+};
+
+
+static int32_t bcmpkt_ipfix_t_export_time_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_export_time_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_obs_domain_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_obs_domain_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_ipfix_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPFIX_T_FID_COUNT] = {
+    bcmpkt_ipfix_t_export_time_get,
+    bcmpkt_ipfix_t_length_get,
+    bcmpkt_ipfix_t_obs_domain_id_get,
+    bcmpkt_ipfix_t_sequence_num_get,
+    bcmpkt_ipfix_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_ipfix_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPFIX_T_FID_COUNT] = {
+    bcmpkt_ipfix_t_export_time_set,
+    bcmpkt_ipfix_t_length_set,
+    bcmpkt_ipfix_t_obs_domain_id_set,
+    bcmpkt_ipfix_t_sequence_num_set,
+    bcmpkt_ipfix_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_ipfix_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_ipfix_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPFIX_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_29_0_1_ipfix_t_field_data,
+};
+
+
+static int32_t bcmpkt_ipv4_t_da_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_da_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_flags_frag_offset_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_flags_frag_offset_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_hdr_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_hdr_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_option_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_option_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_protocol_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_protocol_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_sa_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_sa_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_tos_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_tos_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_total_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_total_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_ttl_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_ttl_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_version_hdr_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_version_hdr_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_ipv4_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_FID_COUNT] = {
+    bcmpkt_ipv4_t_da_get,
+    bcmpkt_ipv4_t_flags_frag_offset_get,
+    bcmpkt_ipv4_t_hdr_checksum_get,
+    bcmpkt_ipv4_t_id_get,
+    bcmpkt_ipv4_t_option_get,
+    bcmpkt_ipv4_t_protocol_get,
+    bcmpkt_ipv4_t_sa_get,
+    bcmpkt_ipv4_t_tos_get,
+    bcmpkt_ipv4_t_total_length_get,
+    bcmpkt_ipv4_t_ttl_get,
+    bcmpkt_ipv4_t_version_hdr_len_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_ipv4_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_FID_COUNT] = {
+    bcmpkt_ipv4_t_da_set,
+    bcmpkt_ipv4_t_flags_frag_offset_set,
+    bcmpkt_ipv4_t_hdr_checksum_set,
+    bcmpkt_ipv4_t_id_set,
+    bcmpkt_ipv4_t_option_set,
+    bcmpkt_ipv4_t_protocol_set,
+    bcmpkt_ipv4_t_sa_set,
+    bcmpkt_ipv4_t_tos_set,
+    bcmpkt_ipv4_t_total_length_set,
+    bcmpkt_ipv4_t_ttl_set,
+    bcmpkt_ipv4_t_version_hdr_len_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_ipv4_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_ipv4_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV4_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_29_0_1_ipv4_t_field_data,
+};
+
+
+static int32_t bcmpkt_ipv6_t_da_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_da_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_flow_label_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 20);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_flow_label_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 20, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_hop_limit_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_hop_limit_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 8, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 8, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_payload_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_payload_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_sa_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_sa_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_traffic_class_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 20, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_traffic_class_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 20, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_ipv6_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV6_T_FID_COUNT] = {
+    bcmpkt_ipv6_t_da_get,
+    bcmpkt_ipv6_t_flow_label_get,
+    bcmpkt_ipv6_t_hop_limit_get,
+    bcmpkt_ipv6_t_next_header_get,
+    bcmpkt_ipv6_t_payload_length_get,
+    bcmpkt_ipv6_t_sa_get,
+    bcmpkt_ipv6_t_traffic_class_get,
+    bcmpkt_ipv6_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_ipv6_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV6_T_FID_COUNT] = {
+    bcmpkt_ipv6_t_da_set,
+    bcmpkt_ipv6_t_flow_label_set,
+    bcmpkt_ipv6_t_hop_limit_set,
+    bcmpkt_ipv6_t_next_header_set,
+    bcmpkt_ipv6_t_payload_length_set,
+    bcmpkt_ipv6_t_sa_set,
+    bcmpkt_ipv6_t_traffic_class_set,
+    bcmpkt_ipv6_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_ipv6_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_ipv6_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_IPV6_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_29_0_1_ipv6_t_field_data,
+};
+
+
+static int32_t bcmpkt_l2_t_macda_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_l2_t_macda_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_l2_t_macsa_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_l2_t_macsa_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_l2_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_L2_T_FID_COUNT] = {
+    bcmpkt_l2_t_macda_get,
+    bcmpkt_l2_t_macsa_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_l2_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_L2_T_FID_COUNT] = {
+    bcmpkt_l2_t_macda_set,
+    bcmpkt_l2_t_macsa_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_l2_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_L2_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_l2_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_L2_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_29_0_1_l2_t_field_data,
+};
+
+
+static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_mirror_erspan_sn_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = {
+    bcmpkt_mirror_erspan_sn_t_seq_num_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_mirror_erspan_sn_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = {
+    bcmpkt_mirror_erspan_sn_t_seq_num_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_mirror_erspan_sn_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_mirror_erspan_sn_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_29_0_1_mirror_erspan_sn_t_field_data,
+};
+
+
+static int32_t bcmpkt_mirror_transport_t_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_mirror_transport_t_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_mirror_transport_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = {
+    bcmpkt_mirror_transport_t_data_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_mirror_transport_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = {
+    bcmpkt_mirror_transport_t_data_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_mirror_transport_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_mirror_transport_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_29_0_1_mirror_transport_t_field_data,
+};
+
+
+static int32_t bcmpkt_mpls_ach_t_channel_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_ach_t_channel_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_ach_t_cw_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_ach_t_cw_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_ach_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_ach_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_ach_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_ach_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 4, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_mpls_ach_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_ACH_T_FID_COUNT] = {
+    bcmpkt_mpls_ach_t_channel_type_get,
+    bcmpkt_mpls_ach_t_cw_type_get,
+    bcmpkt_mpls_ach_t_reserved_get,
+    bcmpkt_mpls_ach_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_mpls_ach_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_ACH_T_FID_COUNT] = {
+    bcmpkt_mpls_ach_t_channel_type_set,
+    bcmpkt_mpls_ach_t_cw_type_set,
+    bcmpkt_mpls_ach_t_reserved_set,
+    bcmpkt_mpls_ach_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_mpls_ach_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_mpls_ach_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_ACH_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_29_0_1_mpls_ach_t_field_data,
+};
+
+
+static int32_t bcmpkt_mpls_bv_t_value_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_bv_t_value_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_mpls_bv_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_BV_T_FID_COUNT] = {
+    bcmpkt_mpls_bv_t_value_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_mpls_bv_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_BV_T_FID_COUNT] = {
+    bcmpkt_mpls_bv_t_value_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_mpls_bv_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_mpls_bv_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_BV_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_29_0_1_mpls_bv_t_field_data,
+};
+
+
+static int32_t bcmpkt_mpls_cw_t_cw_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_cw_t_cw_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_cw_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 12);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_cw_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 12, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_cw_t_seq_number_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_cw_t_seq_number_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_mpls_cw_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_CW_T_FID_COUNT] = {
+    bcmpkt_mpls_cw_t_cw_type_get,
+    bcmpkt_mpls_cw_t_reserved_get,
+    bcmpkt_mpls_cw_t_seq_number_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_mpls_cw_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_CW_T_FID_COUNT] = {
+    bcmpkt_mpls_cw_t_cw_type_set,
+    bcmpkt_mpls_cw_t_reserved_set,
+    bcmpkt_mpls_cw_t_seq_number_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_mpls_cw_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_mpls_cw_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_CW_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_29_0_1_mpls_cw_t_field_data,
+};
+
+
+static int32_t bcmpkt_mpls_t_bos_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_t_bos_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_t_exp_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 9, 3);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_t_exp_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 9, 3, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_t_label_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 12, 20);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_t_label_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 12, 20, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_t_ttl_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_t_ttl_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_mpls_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_T_FID_COUNT] = {
+    bcmpkt_mpls_t_bos_get,
+    bcmpkt_mpls_t_exp_get,
+    bcmpkt_mpls_t_label_get,
+    bcmpkt_mpls_t_ttl_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_mpls_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_T_FID_COUNT] = {
+    bcmpkt_mpls_t_bos_set,
+    bcmpkt_mpls_t_exp_set,
+    bcmpkt_mpls_t_label_set,
+    bcmpkt_mpls_t_ttl_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_mpls_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_mpls_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_MPLS_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_29_0_1_mpls_t_field_data,
+};
+
+
+static int32_t bcmpkt_p_1588_t_cntrl_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[8], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_cntrl_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[8], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_correction_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_correction_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_domain_nb_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_domain_nb_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_logmsginterval_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[8], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_logmsginterval_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[8], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_msg_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_msg_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_msg_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_msg_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_reserved1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 20, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_reserved1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 20, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_reserved2_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_reserved3_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_reserved3_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_seq_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[7], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_seq_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[7], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_srcportid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_srcportid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_transportspec_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_transportspec_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 4, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_p_1588_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_FID_COUNT] = {
+    bcmpkt_p_1588_t_cntrl_get,
+    bcmpkt_p_1588_t_correction_get,
+    bcmpkt_p_1588_t_domain_nb_get,
+    bcmpkt_p_1588_t_flags_get,
+    bcmpkt_p_1588_t_logmsginterval_get,
+    bcmpkt_p_1588_t_msg_length_get,
+    bcmpkt_p_1588_t_msg_type_get,
+    bcmpkt_p_1588_t_reserved1_get,
+    bcmpkt_p_1588_t_reserved2_get,
+    bcmpkt_p_1588_t_reserved3_get,
+    bcmpkt_p_1588_t_seq_id_get,
+    bcmpkt_p_1588_t_srcportid_get,
+    bcmpkt_p_1588_t_transportspec_get,
+    bcmpkt_p_1588_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_p_1588_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_FID_COUNT] = {
+    bcmpkt_p_1588_t_cntrl_set,
+    bcmpkt_p_1588_t_correction_set,
+    bcmpkt_p_1588_t_domain_nb_set,
+    bcmpkt_p_1588_t_flags_set,
+    bcmpkt_p_1588_t_logmsginterval_set,
+    bcmpkt_p_1588_t_msg_length_set,
+    bcmpkt_p_1588_t_msg_type_set,
+    bcmpkt_p_1588_t_reserved1_set,
+    bcmpkt_p_1588_t_reserved2_set,
+    bcmpkt_p_1588_t_reserved3_set,
+    bcmpkt_p_1588_t_seq_id_set,
+    bcmpkt_p_1588_t_srcportid_set,
+    bcmpkt_p_1588_t_transportspec_set,
+    bcmpkt_p_1588_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_p_1588_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_p_1588_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_P_1588_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_29_0_1_p_1588_t_field_data,
+};
+
+
+static int32_t bcmpkt_prog_ext_hdr_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_prog_ext_hdr_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_prog_ext_hdr_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_prog_ext_hdr_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_prog_ext_hdr_t_option_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_prog_ext_hdr_t_option_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_prog_ext_hdr_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = {
+    bcmpkt_prog_ext_hdr_t_hdr_ext_len_get,
+    bcmpkt_prog_ext_hdr_t_next_header_get,
+    bcmpkt_prog_ext_hdr_t_option_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_prog_ext_hdr_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = {
+    bcmpkt_prog_ext_hdr_t_hdr_ext_len_set,
+    bcmpkt_prog_ext_hdr_t_next_header_set,
+    bcmpkt_prog_ext_hdr_t_option_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_prog_ext_hdr_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_prog_ext_hdr_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PROG_EXT_HDR_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_29_0_1_prog_ext_hdr_t_field_data,
+};
+
+
+static int32_t bcmpkt_psamp_0_t_flowset_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_flowset_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_next_hop_index_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_next_hop_index_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_psamp_0_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_0_T_FID_COUNT] = {
+    bcmpkt_psamp_0_t_flowset_get,
+    bcmpkt_psamp_0_t_length_get,
+    bcmpkt_psamp_0_t_next_hop_index_get,
+    bcmpkt_psamp_0_t_obs_time_ns_get,
+    bcmpkt_psamp_0_t_obs_time_s_get,
+    bcmpkt_psamp_0_t_template_id_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_psamp_0_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_0_T_FID_COUNT] = {
+    bcmpkt_psamp_0_t_flowset_set,
+    bcmpkt_psamp_0_t_length_set,
+    bcmpkt_psamp_0_t_next_hop_index_set,
+    bcmpkt_psamp_0_t_obs_time_ns_set,
+    bcmpkt_psamp_0_t_obs_time_s_set,
+    bcmpkt_psamp_0_t_template_id_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_psamp_0_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_psamp_0_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_0_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_29_0_1_psamp_0_t_field_data,
+};
+
+
+static int32_t bcmpkt_psamp_1_t_dlb_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_dlb_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_egress_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_egress_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_epoch_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_epoch_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_variable_flag_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_variable_flag_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 16, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_psamp_1_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_1_T_FID_COUNT] = {
+    bcmpkt_psamp_1_t_dlb_id_get,
+    bcmpkt_psamp_1_t_egress_port_get,
+    bcmpkt_psamp_1_t_epoch_get,
+    bcmpkt_psamp_1_t_ingress_port_get,
+    bcmpkt_psamp_1_t_sampled_length_get,
+    bcmpkt_psamp_1_t_user_meta_data_get,
+    bcmpkt_psamp_1_t_variable_flag_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_psamp_1_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_1_T_FID_COUNT] = {
+    bcmpkt_psamp_1_t_dlb_id_set,
+    bcmpkt_psamp_1_t_egress_port_set,
+    bcmpkt_psamp_1_t_epoch_set,
+    bcmpkt_psamp_1_t_ingress_port_set,
+    bcmpkt_psamp_1_t_sampled_length_set,
+    bcmpkt_psamp_1_t_user_meta_data_set,
+    bcmpkt_psamp_1_t_variable_flag_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_psamp_1_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_psamp_1_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_1_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_29_0_1_psamp_1_t_field_data,
+};
+
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[4], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[4], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[4], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[4], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_psamp_mirror_on_drop_0_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = {
+    bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_length_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_template_id_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_psamp_mirror_on_drop_0_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = {
+    bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_length_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_template_id_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_psamp_mirror_on_drop_0_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_psamp_mirror_on_drop_0_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_29_0_1_psamp_mirror_on_drop_0_t_field_data,
+};
+
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 6);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 6, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_smod_state_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 22, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_smod_state_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 22, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_psamp_mirror_on_drop_3_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = {
+    bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_get,
+    bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_get,
+    bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_get,
+    bcmpkt_psamp_mirror_on_drop_3_t_smod_state_get,
+    bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_get,
+    bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_get,
+    bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_psamp_mirror_on_drop_3_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = {
+    bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_set,
+    bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_set,
+    bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_set,
+    bcmpkt_psamp_mirror_on_drop_3_t_smod_state_set,
+    bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_set,
+    bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_set,
+    bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_psamp_mirror_on_drop_3_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_psamp_mirror_on_drop_3_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_29_0_1_psamp_mirror_on_drop_3_t_field_data,
+};
+
+
+static int32_t bcmpkt_rarp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_operation_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_operation_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_rarp_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T_FID_COUNT] = {
+    bcmpkt_rarp_t_hardware_len_get,
+    bcmpkt_rarp_t_hardware_type_get,
+    bcmpkt_rarp_t_operation_get,
+    bcmpkt_rarp_t_prot_addr_len_get,
+    bcmpkt_rarp_t_protocol_type_get,
+    bcmpkt_rarp_t_sender_ha_get,
+    bcmpkt_rarp_t_sender_ip_get,
+    bcmpkt_rarp_t_target_ha_get,
+    bcmpkt_rarp_t_target_ip_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_rarp_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T_FID_COUNT] = {
+    bcmpkt_rarp_t_hardware_len_set,
+    bcmpkt_rarp_t_hardware_type_set,
+    bcmpkt_rarp_t_operation_set,
+    bcmpkt_rarp_t_prot_addr_len_set,
+    bcmpkt_rarp_t_protocol_type_set,
+    bcmpkt_rarp_t_sender_ha_set,
+    bcmpkt_rarp_t_sender_ip_set,
+    bcmpkt_rarp_t_target_ha_set,
+    bcmpkt_rarp_t_target_ip_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_rarp_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_rarp_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RARP_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_29_0_1_rarp_t_field_data,
+};
+
+
+static int32_t bcmpkt_routing_t_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_routing_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_routing_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_segments_left_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_segments_left_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_routing_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ROUTING_T_FID_COUNT] = {
+    bcmpkt_routing_t_data_get,
+    bcmpkt_routing_t_hdr_ext_len_get,
+    bcmpkt_routing_t_next_header_get,
+    bcmpkt_routing_t_routing_type_get,
+    bcmpkt_routing_t_segments_left_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_routing_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ROUTING_T_FID_COUNT] = {
+    bcmpkt_routing_t_data_set,
+    bcmpkt_routing_t_hdr_ext_len_set,
+    bcmpkt_routing_t_next_header_set,
+    bcmpkt_routing_t_routing_type_set,
+    bcmpkt_routing_t_segments_left_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_routing_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_routing_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_ROUTING_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_29_0_1_routing_t_field_data,
+};
+
+
+static int32_t bcmpkt_rspan_t_tag_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rspan_t_tag_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rspan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rspan_t_tpid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_rspan_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RSPAN_T_FID_COUNT] = {
+    bcmpkt_rspan_t_tag_get,
+    bcmpkt_rspan_t_tpid_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_rspan_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RSPAN_T_FID_COUNT] = {
+    bcmpkt_rspan_t_tag_set,
+    bcmpkt_rspan_t_tpid_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_rspan_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_rspan_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_RSPAN_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_29_0_1_rspan_t_field_data,
+};
+
+
+static int32_t bcmpkt_segment_routing_srh_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_segment_routing_srh_t_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_segment_routing_srh_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_segment_routing_srh_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_segment_routing_srh_t_last_entry_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_segment_routing_srh_t_last_entry_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_segment_routing_srh_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_segment_routing_srh_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_segment_routing_srh_t_routing_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_segment_routing_srh_t_routing_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_segment_routing_srh_t_segments_left_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_segment_routing_srh_t_segments_left_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_segment_routing_srh_t_tag_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_segment_routing_srh_t_tag_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_segment_routing_srh_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_SRH_T_FID_COUNT] = {
+    bcmpkt_segment_routing_srh_t_flags_get,
+    bcmpkt_segment_routing_srh_t_hdr_ext_len_get,
+    bcmpkt_segment_routing_srh_t_last_entry_get,
+    bcmpkt_segment_routing_srh_t_next_header_get,
+    bcmpkt_segment_routing_srh_t_routing_type_get,
+    bcmpkt_segment_routing_srh_t_segments_left_get,
+    bcmpkt_segment_routing_srh_t_tag_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_segment_routing_srh_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_SRH_T_FID_COUNT] = {
+    bcmpkt_segment_routing_srh_t_flags_set,
+    bcmpkt_segment_routing_srh_t_hdr_ext_len_set,
+    bcmpkt_segment_routing_srh_t_last_entry_set,
+    bcmpkt_segment_routing_srh_t_next_header_set,
+    bcmpkt_segment_routing_srh_t_routing_type_set,
+    bcmpkt_segment_routing_srh_t_segments_left_set,
+    bcmpkt_segment_routing_srh_t_tag_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_segment_routing_srh_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_SRH_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_segment_routing_srh_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_SRH_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_29_0_1_segment_routing_srh_t_field_data,
+};
+
+
+static int32_t bcmpkt_segment_routing_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_segment_routing_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_segment_routing_t_last_entry_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_segment_routing_t_last_entry_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_segment_routing_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_segment_routing_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_segment_routing_t_routing_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_segment_routing_t_routing_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_segment_routing_t_seg_list_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_segment_routing_t_seg_list_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_segment_routing_t_segments_left_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_segment_routing_t_segments_left_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_segment_routing_t_tag_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_segment_routing_t_tag_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_segment_routing_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_T_FID_COUNT] = {
+    bcmpkt_segment_routing_t_hdr_ext_len_get,
+    bcmpkt_segment_routing_t_last_entry_flags_get,
+    bcmpkt_segment_routing_t_next_header_get,
+    bcmpkt_segment_routing_t_routing_type_get,
+    bcmpkt_segment_routing_t_seg_list_get,
+    bcmpkt_segment_routing_t_segments_left_get,
+    bcmpkt_segment_routing_t_tag_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_segment_routing_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_T_FID_COUNT] = {
+    bcmpkt_segment_routing_t_hdr_ext_len_set,
+    bcmpkt_segment_routing_t_last_entry_flags_set,
+    bcmpkt_segment_routing_t_next_header_set,
+    bcmpkt_segment_routing_t_routing_type_set,
+    bcmpkt_segment_routing_t_seg_list_set,
+    bcmpkt_segment_routing_t_segments_left_set,
+    bcmpkt_segment_routing_t_tag_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_segment_routing_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_segment_routing_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SEGMENT_ROUTING_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_29_0_1_segment_routing_t_field_data,
+};
+
+
+static int32_t bcmpkt_sflow_shim_0_t_sys_destination_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_0_t_sys_destination_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_0_t_sys_source_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_0_t_sys_source_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_0_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_0_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_sflow_shim_0_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = {
+    bcmpkt_sflow_shim_0_t_sys_destination_get,
+    bcmpkt_sflow_shim_0_t_sys_source_get,
+    bcmpkt_sflow_shim_0_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_sflow_shim_0_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = {
+    bcmpkt_sflow_shim_0_t_sys_destination_set,
+    bcmpkt_sflow_shim_0_t_sys_source_set,
+    bcmpkt_sflow_shim_0_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_sflow_shim_0_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_sflow_shim_0_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_29_0_1_sflow_shim_0_t_field_data,
+};
+
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_dest_sample_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 30, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_dest_sample_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 30, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_discarded_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 27, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_discarded_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 27, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_flex_sample_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 29, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_flex_sample_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 29, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_mcast_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_mcast_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_src_sample_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 31, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_src_sample_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 31, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_truncated_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 26, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_truncated_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 26, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 7);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 7, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 23, 3);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 23, 3, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_sflow_shim_1_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = {
+    bcmpkt_sflow_shim_1_t_flag_dest_sample_get,
+    bcmpkt_sflow_shim_1_t_flag_discarded_get,
+    bcmpkt_sflow_shim_1_t_flag_flex_sample_get,
+    bcmpkt_sflow_shim_1_t_flag_mcast_get,
+    bcmpkt_sflow_shim_1_t_flag_src_sample_get,
+    bcmpkt_sflow_shim_1_t_flag_truncated_get,
+    bcmpkt_sflow_shim_1_t_reserved_get,
+    bcmpkt_sflow_shim_1_t_sys_opcode_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_sflow_shim_1_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = {
+    bcmpkt_sflow_shim_1_t_flag_dest_sample_set,
+    bcmpkt_sflow_shim_1_t_flag_discarded_set,
+    bcmpkt_sflow_shim_1_t_flag_flex_sample_set,
+    bcmpkt_sflow_shim_1_t_flag_mcast_set,
+    bcmpkt_sflow_shim_1_t_flag_src_sample_set,
+    bcmpkt_sflow_shim_1_t_flag_truncated_set,
+    bcmpkt_sflow_shim_1_t_reserved_set,
+    bcmpkt_sflow_shim_1_t_sys_opcode_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_sflow_shim_1_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_sflow_shim_1_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_29_0_1_sflow_shim_1_t_field_data,
+};
+
+
+static int32_t bcmpkt_sflow_shim_2_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_2_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_sflow_shim_2_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = {
+    bcmpkt_sflow_shim_2_t_sequence_num_get,
+    bcmpkt_sflow_shim_2_t_user_meta_data_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_sflow_shim_2_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = {
+    bcmpkt_sflow_shim_2_t_sequence_num_set,
+    bcmpkt_sflow_shim_2_t_user_meta_data_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_sflow_shim_2_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_sflow_shim_2_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_29_0_1_sflow_shim_2_t_field_data,
+};
+
+
+static int32_t bcmpkt_snap_llc_t_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_snap_llc_t_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_snap_llc_t_snap_llc_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_snap_llc_t_snap_llc_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_snap_llc_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SNAP_LLC_T_FID_COUNT] = {
+    bcmpkt_snap_llc_t_length_get,
+    bcmpkt_snap_llc_t_snap_llc_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_snap_llc_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SNAP_LLC_T_FID_COUNT] = {
+    bcmpkt_snap_llc_t_length_set,
+    bcmpkt_snap_llc_t_snap_llc_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_snap_llc_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_snap_llc_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_SNAP_LLC_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_29_0_1_snap_llc_t_field_data,
+};
+
+
+static int32_t bcmpkt_std_segment_id_t_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_std_segment_id_t_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_std_segment_id_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_STD_SEGMENT_ID_T_FID_COUNT] = {
+    bcmpkt_std_segment_id_t_data_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_std_segment_id_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_STD_SEGMENT_ID_T_FID_COUNT] = {
+    bcmpkt_std_segment_id_t_data_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_std_segment_id_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_STD_SEGMENT_ID_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_std_segment_id_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_STD_SEGMENT_ID_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_29_0_1_std_segment_id_t_field_data,
+};
+
+
+static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_first_4bytes_t_src_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_first_4bytes_t_src_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_tcp_first_4bytes_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = {
+    bcmpkt_tcp_first_4bytes_t_dst_port_get,
+    bcmpkt_tcp_first_4bytes_t_src_port_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_tcp_first_4bytes_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = {
+    bcmpkt_tcp_first_4bytes_t_dst_port_set,
+    bcmpkt_tcp_first_4bytes_t_src_port_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_tcp_first_4bytes_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_tcp_first_4bytes_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_29_0_1_tcp_first_4bytes_t_field_data,
+};
+
+
+static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_win_size_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_win_size_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_tcp_last_16bytes_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = {
+    bcmpkt_tcp_last_16bytes_t_ack_num_get,
+    bcmpkt_tcp_last_16bytes_t_checksum_get,
+    bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get,
+    bcmpkt_tcp_last_16bytes_t_seq_num_get,
+    bcmpkt_tcp_last_16bytes_t_urgent_ptr_get,
+    bcmpkt_tcp_last_16bytes_t_win_size_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_tcp_last_16bytes_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = {
+    bcmpkt_tcp_last_16bytes_t_ack_num_set,
+    bcmpkt_tcp_last_16bytes_t_checksum_set,
+    bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set,
+    bcmpkt_tcp_last_16bytes_t_seq_num_set,
+    bcmpkt_tcp_last_16bytes_t_urgent_ptr_set,
+    bcmpkt_tcp_last_16bytes_t_win_size_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_tcp_last_16bytes_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_tcp_last_16bytes_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_29_0_1_tcp_last_16bytes_t_field_data,
+};
+
+
+static int32_t bcmpkt_udp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_dst_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_src_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_src_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_udp_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_udp_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_udp_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UDP_T_FID_COUNT] = {
+    bcmpkt_udp_t_checksum_get,
+    bcmpkt_udp_t_dst_port_get,
+    bcmpkt_udp_t_src_port_get,
+    bcmpkt_udp_t_udp_length_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_udp_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UDP_T_FID_COUNT] = {
+    bcmpkt_udp_t_checksum_set,
+    bcmpkt_udp_t_dst_port_set,
+    bcmpkt_udp_t_src_port_set,
+    bcmpkt_udp_t_udp_length_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_udp_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_udp_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UDP_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_29_0_1_udp_t_field_data,
+};
+
+
+static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_unknown_l3_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = {
+    bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get,
+    bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_unknown_l3_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = {
+    bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set,
+    bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_unknown_l3_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_unknown_l3_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L3_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_29_0_1_unknown_l3_t_field_data,
+};
+
+
+static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_unknown_l4_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = {
+    bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_unknown_l4_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = {
+    bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_unknown_l4_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_unknown_l4_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L4_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_29_0_1_unknown_l4_t_field_data,
+};
+
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_8_9_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_8_9_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_unknown_l5_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = {
+    bcmpkt_unknown_l5_t_l5_bytes_0_1_get,
+    bcmpkt_unknown_l5_t_l5_bytes_2_3_get,
+    bcmpkt_unknown_l5_t_l5_bytes_4_7_get,
+    bcmpkt_unknown_l5_t_l5_bytes_8_9_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_unknown_l5_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = {
+    bcmpkt_unknown_l5_t_l5_bytes_0_1_set,
+    bcmpkt_unknown_l5_t_l5_bytes_2_3_set,
+    bcmpkt_unknown_l5_t_l5_bytes_4_7_set,
+    bcmpkt_unknown_l5_t_l5_bytes_8_9_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_unknown_l5_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_unknown_l5_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_UNKNOWN_L5_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_29_0_1_unknown_l5_t_field_data,
+};
+
+
+static int32_t bcmpkt_vlan_t_cfi_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 12, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_cfi_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 12, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_pcp_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 13, 3);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_pcp_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 13, 3, val);
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_tpid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_vid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 12);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_vid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 12, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_vlan_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VLAN_T_FID_COUNT] = {
+    bcmpkt_vlan_t_cfi_get,
+    bcmpkt_vlan_t_pcp_get,
+    bcmpkt_vlan_t_tpid_get,
+    bcmpkt_vlan_t_vid_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_vlan_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VLAN_T_FID_COUNT] = {
+    bcmpkt_vlan_t_cfi_set,
+    bcmpkt_vlan_t_pcp_set,
+    bcmpkt_vlan_t_tpid_set,
+    bcmpkt_vlan_t_vid_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_vlan_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_vlan_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VLAN_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_29_0_1_vlan_t_field_data,
+};
+
+
+static int32_t bcmpkt_vxlan_t_flags_reserved_1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_vxlan_t_flags_reserved_1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_vxlan_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vxlan_t_reserved2_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_vxlan_t_vn_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 8, 24);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vxlan_t_vn_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 8, 24, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_vxlan_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VXLAN_T_FID_COUNT] = {
+    bcmpkt_vxlan_t_flags_reserved_1_get,
+    bcmpkt_vxlan_t_reserved2_get,
+    bcmpkt_vxlan_t_vn_id_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_vxlan_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VXLAN_T_FID_COUNT] = {
+    bcmpkt_vxlan_t_flags_reserved_1_set,
+    bcmpkt_vxlan_t_reserved2_set,
+    bcmpkt_vxlan_t_vn_id_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_vxlan_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_vxlan_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_VXLAN_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_29_0_1_vxlan_t_field_data,
+};
+
+
+static int32_t bcmpkt_wesp_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_header_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_header_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_spi_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_spi_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_trailer_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_trailer_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_wesp_iv_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_wesp_iv_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56690_a0_dna_6_5_29_0_1_wesp_t_fget[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_WESP_T_FID_COUNT] = {
+    bcmpkt_wesp_t_flags_get,
+    bcmpkt_wesp_t_header_len_get,
+    bcmpkt_wesp_t_next_header_get,
+    bcmpkt_wesp_t_seq_num_get,
+    bcmpkt_wesp_t_spi_get,
+    bcmpkt_wesp_t_trailer_len_get,
+    bcmpkt_wesp_t_wesp_iv_get,
+};
+
+bcmpkt_flex_field_set_f bcm56690_a0_dna_6_5_29_0_1_wesp_t_fset[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_WESP_T_FID_COUNT] = {
+    bcmpkt_wesp_t_flags_set,
+    bcmpkt_wesp_t_header_len_set,
+    bcmpkt_wesp_t_next_header_set,
+    bcmpkt_wesp_t_seq_num_set,
+    bcmpkt_wesp_t_spi_set,
+    bcmpkt_wesp_t_trailer_len_set,
+    bcmpkt_wesp_t_wesp_iv_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56690_a0_dna_6_5_29_0_1_wesp_t_field_data[] = {
+    BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56690_a0_dna_6_5_29_0_1_wesp_t_field_info = {
+    .num_fields = BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_WESP_T_FID_COUNT,
+    .info = bcm56690_a0_dna_6_5_29_0_1_wesp_t_field_data,
+};
+
+static bcmpkt_flex_pmd_info_t bcm56690_a0_dna_6_5_29_0_1_flexhdr_info_list[BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FLEXHDR_COUNT] = {
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_29_0_1_arp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_29_0_1_arp_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_29_0_1_arp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_29_0_1_authen_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_29_0_1_authen_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_29_0_1_authen_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_29_0_1_bfd_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_29_0_1_bfd_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_29_0_1_bfd_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_29_0_1_cntag_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_29_0_1_cntag_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_29_0_1_cntag_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_29_0_1_cpu_composites_0_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_29_0_1_cpu_composites_0_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_29_0_1_cpu_composites_0_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_29_0_1_cpu_composites_1_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_29_0_1_cpu_composites_1_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_29_0_1_cpu_composites_1_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_29_0_1_dest_option_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_29_0_1_dest_option_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_29_0_1_dest_option_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_29_0_1_ep_nih_header_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_29_0_1_ep_nih_header_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_29_0_1_ep_nih_header_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_29_0_1_erspan3_fixed_hdr_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_29_0_1_erspan3_fixed_hdr_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_29_0_1_erspan3_fixed_hdr_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_29_0_1_erspan3_subhdr_5_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_29_0_1_erspan3_subhdr_5_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_29_0_1_erspan3_subhdr_5_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_29_0_1_esp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_29_0_1_esp_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_29_0_1_esp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_29_0_1_ethertype_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_29_0_1_ethertype_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_29_0_1_ethertype_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_29_0_1_frag_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_29_0_1_frag_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_29_0_1_frag_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_29_0_1_gbp_ethernet_shim_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_29_0_1_gbp_ethernet_shim_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_29_0_1_gbp_ethernet_shim_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_29_0_1_generic_loopback_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_29_0_1_generic_loopback_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_29_0_1_generic_loopback_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_29_0_1_gpe_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_29_0_1_gpe_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_29_0_1_gpe_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_29_0_1_gre_chksum_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_29_0_1_gre_chksum_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_29_0_1_gre_chksum_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_29_0_1_gre_key_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_29_0_1_gre_key_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_29_0_1_gre_key_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_29_0_1_gre_rout_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_29_0_1_gre_rout_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_29_0_1_gre_rout_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_29_0_1_gre_seq_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_29_0_1_gre_seq_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_29_0_1_gre_seq_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_29_0_1_gre_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_29_0_1_gre_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_29_0_1_gre_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_29_0_1_hg3_base_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_29_0_1_hg3_base_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_29_0_1_hg3_base_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_29_0_1_hg3_extension_0_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_29_0_1_hg3_extension_0_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_29_0_1_hg3_extension_0_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_29_0_1_hop_by_hop_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_29_0_1_hop_by_hop_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_29_0_1_hop_by_hop_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_29_0_1_icmp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_29_0_1_icmp_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_29_0_1_icmp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_0_a_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_0_a_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_0_a_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_0_b_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_0_b_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_0_b_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_1_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_1_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_1_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_2_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_2_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_2_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_3_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_3_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_29_0_1_ifa_flex_md_3_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_29_0_1_ifa_header_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_29_0_1_ifa_header_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_29_0_1_ifa_header_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_29_0_1_ifa_md_base_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_29_0_1_ifa_md_base_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_29_0_1_ifa_md_base_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_29_0_1_ifa_metadata_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_29_0_1_ifa_metadata_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_29_0_1_ifa_metadata_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_29_0_1_igmp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_29_0_1_igmp_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_29_0_1_igmp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_29_0_1_ioam_e2e_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_29_0_1_ioam_e2e_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_29_0_1_ioam_e2e_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_29_0_1_ipfix_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_29_0_1_ipfix_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_29_0_1_ipfix_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_29_0_1_ipv4_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_29_0_1_ipv4_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_29_0_1_ipv4_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_29_0_1_ipv6_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_29_0_1_ipv6_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_29_0_1_ipv6_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_29_0_1_l2_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_29_0_1_l2_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_29_0_1_l2_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_29_0_1_mirror_erspan_sn_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_29_0_1_mirror_erspan_sn_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_29_0_1_mirror_erspan_sn_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_29_0_1_mirror_transport_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_29_0_1_mirror_transport_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_29_0_1_mirror_transport_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_29_0_1_mpls_ach_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_29_0_1_mpls_ach_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_29_0_1_mpls_ach_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_29_0_1_mpls_bv_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_29_0_1_mpls_bv_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_29_0_1_mpls_bv_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_29_0_1_mpls_cw_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_29_0_1_mpls_cw_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_29_0_1_mpls_cw_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_29_0_1_mpls_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_29_0_1_mpls_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_29_0_1_mpls_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_29_0_1_p_1588_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_29_0_1_p_1588_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_29_0_1_p_1588_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_29_0_1_prog_ext_hdr_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_29_0_1_prog_ext_hdr_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_29_0_1_prog_ext_hdr_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_29_0_1_psamp_0_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_29_0_1_psamp_0_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_29_0_1_psamp_0_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_29_0_1_psamp_1_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_29_0_1_psamp_1_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_29_0_1_psamp_1_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_29_0_1_psamp_mirror_on_drop_0_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_29_0_1_psamp_mirror_on_drop_0_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_29_0_1_psamp_mirror_on_drop_0_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_29_0_1_psamp_mirror_on_drop_3_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_29_0_1_psamp_mirror_on_drop_3_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_29_0_1_psamp_mirror_on_drop_3_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_29_0_1_rarp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_29_0_1_rarp_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_29_0_1_rarp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_29_0_1_routing_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_29_0_1_routing_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_29_0_1_routing_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_29_0_1_rspan_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_29_0_1_rspan_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_29_0_1_rspan_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_29_0_1_segment_routing_srh_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_29_0_1_segment_routing_srh_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_29_0_1_segment_routing_srh_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_29_0_1_segment_routing_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_29_0_1_segment_routing_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_29_0_1_segment_routing_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_29_0_1_sflow_shim_0_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_29_0_1_sflow_shim_0_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_29_0_1_sflow_shim_0_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_29_0_1_sflow_shim_1_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_29_0_1_sflow_shim_1_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_29_0_1_sflow_shim_1_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_29_0_1_sflow_shim_2_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_29_0_1_sflow_shim_2_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_29_0_1_sflow_shim_2_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_29_0_1_snap_llc_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_29_0_1_snap_llc_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_29_0_1_snap_llc_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_29_0_1_std_segment_id_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_29_0_1_std_segment_id_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_29_0_1_std_segment_id_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_29_0_1_tcp_first_4bytes_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_29_0_1_tcp_first_4bytes_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_29_0_1_tcp_first_4bytes_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_29_0_1_tcp_last_16bytes_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_29_0_1_tcp_last_16bytes_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_29_0_1_tcp_last_16bytes_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_29_0_1_udp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_29_0_1_udp_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_29_0_1_udp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_29_0_1_unknown_l3_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_29_0_1_unknown_l3_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_29_0_1_unknown_l3_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_29_0_1_unknown_l4_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_29_0_1_unknown_l4_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_29_0_1_unknown_l4_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_29_0_1_unknown_l5_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_29_0_1_unknown_l5_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_29_0_1_unknown_l5_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_29_0_1_vlan_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_29_0_1_vlan_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_29_0_1_vlan_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_29_0_1_vxlan_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_29_0_1_vxlan_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_29_0_1_vxlan_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_29_0_1_wesp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56690_a0_dna_6_5_29_0_1_wesp_t_fget,
+        .flex_fset = bcm56690_a0_dna_6_5_29_0_1_wesp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56690_a0_dna_6_5_29_0_1_rxpmd_flex_field_info,
+        .reasons_info = &bcm56690_a0_dna_6_5_29_0_1_rxpmd_flex_reasons_info,
+        .flex_common_fget = bcm56690_a0_rxpmd_flex_fget,
+        .flex_common_fset = bcm56690_a0_rxpmd_flex_fset,
+    },
+};
+
+static shr_enum_map_t bcm56690_a0_dna_6_5_29_0_1_flexhdr_id_map[] = {
+    BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FLEXHDR_NAME_MAP_INIT
+};
+
+shr_enum_map_t * bcm56690_a0_dna_6_5_29_0_1_flexhdr_map_get(void)
+{
+    return bcm56690_a0_dna_6_5_29_0_1_flexhdr_id_map;
+}
+
+bcmpkt_flex_pmd_info_t * bcm56690_a0_dna_6_5_29_0_1_flex_pmd_info_get(uint32_t hid)
+{
+    if (hid >= BCM56690_A0_DNA_6_5_29_0_1_BCMPKT_FLEXHDR_COUNT) {
+        return NULL;
+    }
+
+    return &bcm56690_a0_dna_6_5_29_0_1_flexhdr_info_list[hid];
+}
+
+int bcm56690_a0_dna_6_5_29_0_1_flexhdr_variant_support_map[BCMPKT_PMD_COUNT] = {
+    14,
+    21,
+    22,
+    70,
+};
\ No newline at end of file
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_bcmpkt_rxpmd_match_id.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_bcmpkt_rxpmd_match_id.c
new file mode 100644
index 000000000..aa6df21e3
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_bcmpkt_rxpmd_match_id.c
@@ -0,0 +1,1136 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) bcm56780_a0_cna_6_5_29_sf_match_id_info.yml
+ * for device bcm56780_a0 and variant cna_6_5_29.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+
+#include <bcmpkt/bcmpkt_rxpmd_match_id.h>
+#include <bcmpkt/xfcr/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_bcmpkt_rxpmd_match_id_defs.h>
+
+
+static bcmpkt_rxpmd_match_id_db_t
+bcm56780_a0_cna_6_5_29_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_COUNT] = {
+    {
+        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_ITAG",
+        .match        = 0x2,
+        .match_mask   = 0x2,
+        .match_maxbit = 14,
+        .match_minbit = 12,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 37,
+        .pminbit      = 35,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_L2",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 14,
+        .match_minbit = 12,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 37,
+        .pminbit      = 35,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x7,
+        .match_maxbit = 14,
+        .match_minbit = 12,
+        .maxbit       = 2,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 37,
+        .pminbit      = 35,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_OTAG",
+        .match        = 0x4,
+        .match_mask   = 0x4,
+        .match_maxbit = 14,
+        .match_minbit = 12,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 37,
+        .pminbit      = 35,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ARP",
+        .match        = 0x20,
+        .match_mask   = 0x66,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ICMP",
+        .match        = 0x40,
+        .match_mask   = 0x66,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x2,
+        .pmaxbit      = 55,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IPV4",
+        .match        = 0x8,
+        .match_mask   = 0x18,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IPV6",
+        .match        = 0x10,
+        .match_mask   = 0x18,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x2,
+        .pmaxbit      = 55,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x7f,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 6,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 55,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_RARP",
+        .match        = 0x2,
+        .match_mask   = 0x6,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES",
+        .match        = 0x4,
+        .match_mask   = 0x6,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x2,
+        .pmaxbit      = 55,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES",
+        .match        = 0x24,
+        .match_mask   = 0x66,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UDP",
+        .match        = 0x6,
+        .match_mask   = 0x6,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x3,
+        .pmaxbit      = 55,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3",
+        .match        = 0x18,
+        .match_mask   = 0x18,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x3,
+        .pmaxbit      = 55,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4",
+        .match        = 0x60,
+        .match_mask   = 0x60,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x3,
+        .pmaxbit      = 55,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5",
+        .match        = 0x46,
+        .match_mask   = 0x66,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x2,
+        .pmaxbit      = 55,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_VXLAN",
+        .match        = 0x26,
+        .match_mask   = 0x66,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH */
+        .name         = "EGRESS_PKT_SYS_HDR_EP_NIH",
+        .match        = 0x2,
+        .match_mask   = 0x3,
+        .match_maxbit = 1,
+        .match_minbit = 0,
+        .maxbit       = 1,
+        .minbit       = 0,
+        .value        = 0x2,
+        .pmaxbit      = 1,
+        .pminbit      = 0,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK */
+        .name         = "EGRESS_PKT_SYS_HDR_LOOPBACK",
+        .match        = 0x1,
+        .match_mask   = 0x3,
+        .match_maxbit = 1,
+        .match_minbit = 0,
+        .maxbit       = 1,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 1,
+        .pminbit      = 0,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE */
+        .name         = "EGRESS_PKT_SYS_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x3,
+        .match_maxbit = 1,
+        .match_minbit = 0,
+        .maxbit       = 1,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 1,
+        .pminbit      = 0,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_ITAG",
+        .match        = 0x2,
+        .match_mask   = 0x2,
+        .match_maxbit = 4,
+        .match_minbit = 2,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 9,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_L2",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 4,
+        .match_minbit = 2,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 9,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x7,
+        .match_maxbit = 4,
+        .match_minbit = 2,
+        .maxbit       = 2,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 9,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_OTAG",
+        .match        = 0x4,
+        .match_mask   = 0x4,
+        .match_maxbit = 4,
+        .match_minbit = 2,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 9,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP",
+        .match        = 0x20,
+        .match_mask   = 0x66,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 27,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 27,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP",
+        .match        = 0x40,
+        .match_mask   = 0x66,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x2,
+        .pmaxbit      = 27,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4",
+        .match        = 0x8,
+        .match_mask   = 0x18,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 27,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6",
+        .match        = 0x10,
+        .match_mask   = 0x18,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x2,
+        .pmaxbit      = 27,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x7f,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 6,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 27,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP",
+        .match        = 0x2,
+        .match_mask   = 0x6,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 27,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES",
+        .match        = 0x4,
+        .match_mask   = 0x6,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x2,
+        .pmaxbit      = 27,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES",
+        .match        = 0x24,
+        .match_mask   = 0x66,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 27,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP",
+        .match        = 0x6,
+        .match_mask   = 0x6,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x3,
+        .pmaxbit      = 27,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3",
+        .match        = 0x18,
+        .match_mask   = 0x18,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x3,
+        .pmaxbit      = 27,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4",
+        .match        = 0x60,
+        .match_mask   = 0x60,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x3,
+        .pmaxbit      = 27,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5",
+        .match        = 0x46,
+        .match_mask   = 0x66,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x2,
+        .pmaxbit      = 27,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN",
+        .match        = 0x26,
+        .match_mask   = 0x66,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 27,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_ITAG",
+        .match        = 0x2,
+        .match_mask   = 0x2,
+        .match_maxbit = 14,
+        .match_minbit = 12,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 14,
+        .pminbit      = 12,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_L2",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 14,
+        .match_minbit = 12,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 14,
+        .pminbit      = 12,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x7,
+        .match_maxbit = 14,
+        .match_minbit = 12,
+        .maxbit       = 2,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 14,
+        .pminbit      = 12,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_OTAG",
+        .match        = 0x4,
+        .match_mask   = 0x4,
+        .match_maxbit = 14,
+        .match_minbit = 12,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 14,
+        .pminbit      = 12,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ARP",
+        .match        = 0x20,
+        .match_mask   = 0x66,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 21,
+        .pminbit      = 15,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 21,
+        .pminbit      = 15,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ICMP",
+        .match        = 0x40,
+        .match_mask   = 0x66,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x2,
+        .pmaxbit      = 21,
+        .pminbit      = 15,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IPV4",
+        .match        = 0x8,
+        .match_mask   = 0x18,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 21,
+        .pminbit      = 15,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IPV6",
+        .match        = 0x10,
+        .match_mask   = 0x18,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x2,
+        .pmaxbit      = 21,
+        .pminbit      = 15,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x7f,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 6,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 21,
+        .pminbit      = 15,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_RARP",
+        .match        = 0x2,
+        .match_mask   = 0x6,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 21,
+        .pminbit      = 15,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES",
+        .match        = 0x4,
+        .match_mask   = 0x6,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x2,
+        .pmaxbit      = 21,
+        .pminbit      = 15,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES",
+        .match        = 0x24,
+        .match_mask   = 0x66,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 21,
+        .pminbit      = 15,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UDP",
+        .match        = 0x6,
+        .match_mask   = 0x6,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x3,
+        .pmaxbit      = 21,
+        .pminbit      = 15,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3",
+        .match        = 0x18,
+        .match_mask   = 0x18,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x3,
+        .pmaxbit      = 21,
+        .pminbit      = 15,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4",
+        .match        = 0x60,
+        .match_mask   = 0x60,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x3,
+        .pmaxbit      = 21,
+        .pminbit      = 15,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5",
+        .match        = 0x46,
+        .match_mask   = 0x66,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x2,
+        .pmaxbit      = 21,
+        .pminbit      = 15,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_ITAG",
+        .match        = 0x2,
+        .match_mask   = 0x2,
+        .match_maxbit = 4,
+        .match_minbit = 2,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 4,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_L2",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 4,
+        .match_minbit = 2,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 4,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x7,
+        .match_maxbit = 4,
+        .match_minbit = 2,
+        .maxbit       = 2,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 4,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_OTAG",
+        .match        = 0x4,
+        .match_mask   = 0x4,
+        .match_maxbit = 4,
+        .match_minbit = 2,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 4,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ARP",
+        .match        = 0x20,
+        .match_mask   = 0x66,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 11,
+        .pminbit      = 5,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 11,
+        .pminbit      = 5,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ICMP",
+        .match        = 0x40,
+        .match_mask   = 0x66,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x2,
+        .pmaxbit      = 11,
+        .pminbit      = 5,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV4",
+        .match        = 0x8,
+        .match_mask   = 0x18,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 11,
+        .pminbit      = 5,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV6",
+        .match        = 0x10,
+        .match_mask   = 0x18,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x2,
+        .pmaxbit      = 11,
+        .pminbit      = 5,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x7f,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 6,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 11,
+        .pminbit      = 5,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_RARP",
+        .match        = 0x2,
+        .match_mask   = 0x6,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 11,
+        .pminbit      = 5,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES",
+        .match        = 0x4,
+        .match_mask   = 0x6,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x2,
+        .pmaxbit      = 11,
+        .pminbit      = 5,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES",
+        .match        = 0x24,
+        .match_mask   = 0x66,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 11,
+        .pminbit      = 5,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UDP",
+        .match        = 0x6,
+        .match_mask   = 0x6,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x3,
+        .pmaxbit      = 11,
+        .pminbit      = 5,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3",
+        .match        = 0x18,
+        .match_mask   = 0x18,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x3,
+        .pmaxbit      = 11,
+        .pminbit      = 5,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4",
+        .match        = 0x60,
+        .match_mask   = 0x60,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x3,
+        .pmaxbit      = 11,
+        .pminbit      = 5,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5",
+        .match        = 0x46,
+        .match_mask   = 0x66,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x2,
+        .pmaxbit      = 11,
+        .pminbit      = 5,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN",
+        .match        = 0x26,
+        .match_mask   = 0x66,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 11,
+        .pminbit      = 5,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH */
+        .name         = "INGRESS_PKT_SYS_HDR_EP_NIH",
+        .match        = 0x2,
+        .match_mask   = 0x3,
+        .match_maxbit = 1,
+        .match_minbit = 0,
+        .maxbit       = 1,
+        .minbit       = 0,
+        .value        = 0x2,
+        .pmaxbit      = 1,
+        .pminbit      = 0,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK */
+        .name         = "INGRESS_PKT_SYS_HDR_LOOPBACK",
+        .match        = 0x1,
+        .match_mask   = 0x3,
+        .match_maxbit = 1,
+        .match_minbit = 0,
+        .maxbit       = 1,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 1,
+        .pminbit      = 0,
+
+    },
+    {
+        /* BCM56780_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE */
+        .name         = "INGRESS_PKT_SYS_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x3,
+        .match_maxbit = 1,
+        .match_minbit = 0,
+        .maxbit       = 1,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 1,
+        .pminbit      = 0,
+
+    },
+};
+
+static bcmpkt_rxpmd_match_id_db_info_t bcm56780_a0_cna_6_5_29_rxpmd_match_id_db_info = {
+    .num_entries = 77,
+    .db = bcm56780_a0_cna_6_5_29_rxpmd_match_id_db
+};
+bcmpkt_rxpmd_match_id_db_info_t * bcm56780_a0_cna_6_5_29_rxpmd_match_id_db_info_get(void) {
+    return &bcm56780_a0_cna_6_5_29_rxpmd_match_id_db_info;
+}
+
+static shr_enum_map_t bcm56780_a0_cna_6_5_29_rxpmd_match_id_map[] = {
+    BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_rxpmd_match_id_map_info_t bcm56780_a0_cna_6_5_29_rxpmd_match_id_map_info = {
+    .num_entries = 77,
+    .map = bcm56780_a0_cna_6_5_29_rxpmd_match_id_map
+};
+
+bcmpkt_rxpmd_match_id_map_info_t * bcm56780_a0_cna_6_5_29_rxpmd_match_id_map_info_get(void) {
+    return &bcm56780_a0_cna_6_5_29_rxpmd_match_id_map_info;
+}
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_pkt_flexhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_pkt_flexhdr.c
new file mode 100644
index 000000000..55f9aad03
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_pkt_flexhdr.c
@@ -0,0 +1,4021 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) map.yml
+ * for device bcm56780_a0 and variant cna_6_5_29.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#include <sal/sal_types.h>
+#include <shr/shr_error.h>
+#include <bcmpkt/bcmpkt_flexhdr.h>
+#include <bcmpkt/chip/bcm56780_a0/bcmpkt_bcm56780_a0_rxpmd.h>
+#include <bcmpkt/xfcr/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_bcmpkt_flexhdr.h>
+#include <bcmpkt/xfcr/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_bcmpkt_flexhdr_data.h>
+#include <bcmpkt/xfcr/bcm56780_a0/cna_6_5_29/bcm56780_a0_cna_6_5_29_bcmpkt_rxpmd_flex_data.h>
+
+#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1)
+#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l))
+#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s)))
+#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s)))
+
+static void bcm56780_a0_cna_6_5_29_rxpmd_flex_reason_decode(uint32_t *data, bcmpkt_bitmap_t *reasons)
+{
+    uint32_t *reason = data + 0;
+
+    if (reason[13] & (0x1 << 0)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU);
+    }
+    if (reason[13] & (0x1 << 1)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS);
+    }
+    if (reason[13] & (0x1 << 2)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE);
+    }
+    if (reason[13] & (0x1 << 3)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD);
+    }
+    if (reason[13] & (0x1 << 4)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST);
+    }
+    if (reason[13] & (0x1 << 5)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED);
+    }
+    if (reason[13] & (0x1 << 6)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT);
+    }
+    if (reason[13] & (0x1 << 7)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED);
+    }
+    if (reason[13] & (0x1 << 8)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED);
+    }
+    if (reason[13] & (0x1 << 9)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS);
+    }
+    if (reason[13] & (0x1 << 10)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP);
+    }
+    if (reason[13] & (0x1 << 11)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS);
+    }
+    if (reason[13] & (0x1 << 12)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP);
+    }
+    if (reason[13] & (0x1 << 13)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR);
+    }
+    if (reason[13] & (0x1 << 14)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR);
+    }
+    if (reason[13] & (0x1 << 16)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL);
+    }
+    if (reason[13] & (0x1 << 17)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_VFP);
+    }
+    if (reason[13] & (0x1 << 18)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IFP);
+    }
+    if (reason[13] & (0x1 << 19)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IFP_METER);
+    }
+    if (reason[13] & (0x1 << 23)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IVXLT);
+    }
+    if (reason[12] & (0x1 << 15)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP);
+    }
+}
+
+static void bcm56780_a0_cna_6_5_29_rxpmd_flex_reason_encode(bcmpkt_bitmap_t *reasons, uint32_t *data)
+{
+    uint32_t *reason = data + 0;
+
+    reason[13] = 0;
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU)) {
+        reason[13] |= (0x1 << 0);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS)) {
+        reason[13] |= (0x1 << 1);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE)) {
+        reason[13] |= (0x1 << 2);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD)) {
+        reason[13] |= (0x1 << 3);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST)) {
+        reason[13] |= (0x1 << 4);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED)) {
+        reason[13] |= (0x1 << 5);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT)) {
+        reason[13] |= (0x1 << 6);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED)) {
+        reason[13] |= (0x1 << 7);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED)) {
+        reason[13] |= (0x1 << 8);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS)) {
+        reason[13] |= (0x1 << 9);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP)) {
+        reason[13] |= (0x1 << 10);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS)) {
+        reason[13] |= (0x1 << 11);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP)) {
+        reason[13] |= (0x1 << 12);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR)) {
+        reason[13] |= (0x1 << 13);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR)) {
+        reason[13] |= (0x1 << 14);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL)) {
+        reason[13] |= (0x1 << 16);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_VFP)) {
+        reason[13] |= (0x1 << 17);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IFP)) {
+        reason[13] |= (0x1 << 18);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IFP_METER)) {
+        reason[13] |= (0x1 << 19);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IVXLT)) {
+        reason[13] |= (0x1 << 23);
+    }
+    reason[12] = 0;
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP)) {
+        reason[12] |= (0x1 << 15);
+    }
+}
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_rxpmd_flex_field_data[] = {
+    {
+        .name = "DROP_CODE_15_0",
+        .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 48, 63 }, /* Profile 2. */
+            { -1, -1 }, /* Profile 3. */
+            { 48, 63 }, /* Profile 4. */
+            { 48, 63 }, /* Profile 5. */
+            { -1, -1 }, /* Profile 6. */
+            { 48, 63 }, /* Profile 7. */
+        },
+        .profile_cnt = 8,
+    },
+    {
+        .name = "DVP_15_0",
+        .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_DVP_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 336, 351 }, /* Profile 2. */
+            { 336, 351 }, /* Profile 3. */
+            { 336, 351 }, /* Profile 4. */
+            { 320, 335 }, /* Profile 5. */
+            { 320, 335 }, /* Profile 6. */
+            { 320, 335 }, /* Profile 7. */
+        },
+        .profile_cnt = 8,
+    },
+    {
+        .name = "EFFECTIVE_TTL_7_0",
+        .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 128, 135 }, /* Profile 2. */
+            { 128, 135 }, /* Profile 3. */
+            { 128, 135 }, /* Profile 4. */
+            { 128, 135 }, /* Profile 5. */
+            { 128, 135 }, /* Profile 6. */
+            { 128, 135 }, /* Profile 7. */
+        },
+        .profile_cnt = 8,
+    },
+    {
+        .name = "ENTROPY_LABEL_HIGH_3_0",
+        .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 416, 419 }, /* Profile 2. */
+            { 416, 419 }, /* Profile 3. */
+            { 416, 419 }, /* Profile 4. */
+            { 384, 387 }, /* Profile 5. */
+            { 384, 387 }, /* Profile 6. */
+            { 384, 387 }, /* Profile 7. */
+        },
+        .profile_cnt = 8,
+    },
+    {
+        .name = "ENTROPY_LABEL_LOW_15_0",
+        .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 160, 175 }, /* Profile 2. */
+            { 160, 175 }, /* Profile 3. */
+            { 160, 175 }, /* Profile 4. */
+            { 160, 175 }, /* Profile 5. */
+            { 160, 175 }, /* Profile 6. */
+            { 160, 175 }, /* Profile 7. */
+        },
+        .profile_cnt = 8,
+    },
+    {
+        .name = "EP_NIH_HDR_DROP_CODE_15_0",
+        .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_DROP_CODE_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { -1, -1 }, /* Profile 2. */
+            { 48, 63 }, /* Profile 3. */
+            { -1, -1 }, /* Profile 4. */
+            { -1, -1 }, /* Profile 5. */
+            { 48, 63 }, /* Profile 6. */
+        },
+        .profile_cnt = 7,
+    },
+    {
+        .name = "EP_NIH_HDR_RECIRC_CODE_3_0",
+        .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_RECIRC_CODE_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 384, 387 }, /* Profile 2. */
+            { 384, 387 }, /* Profile 3. */
+            { 384, 387 }, /* Profile 4. */
+            { 352, 355 }, /* Profile 5. */
+            { 352, 355 }, /* Profile 6. */
+            { 352, 355 }, /* Profile 7. */
+        },
+        .profile_cnt = 8,
+    },
+    {
+        .name = "EP_NIH_HDR_TIMESTAMP_15_0",
+        .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 256, 271 }, /* Profile 2. */
+            { 256, 271 }, /* Profile 3. */
+            { -1, -1 }, /* Profile 4. */
+            { 240, 255 }, /* Profile 5. */
+            { 240, 255 }, /* Profile 6. */
+        },
+        .profile_cnt = 7,
+    },
+    {
+        .name = "EP_NIH_HDR_TIMESTAMP_31_16",
+        .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 272, 287 }, /* Profile 2. */
+            { 272, 287 }, /* Profile 3. */
+            { -1, -1 }, /* Profile 4. */
+            { 256, 271 }, /* Profile 5. */
+            { 256, 271 }, /* Profile 6. */
+        },
+        .profile_cnt = 7,
+    },
+    {
+        .name = "ERSPAN3_GBP_SID_15_0",
+        .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_ERSPAN3_GBP_SID_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 144, 159 }, /* Profile 2. */
+            { 144, 159 }, /* Profile 3. */
+            { 144, 159 }, /* Profile 4. */
+            { 144, 159 }, /* Profile 5. */
+            { 144, 159 }, /* Profile 6. */
+            { 144, 159 }, /* Profile 7. */
+        },
+        .profile_cnt = 8,
+    },
+    {
+        .name = "EVENT_TRACE_VECTOR_15_0",
+        .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 0, 15 }, /* Profile 2. */
+            { 0, 15 }, /* Profile 3. */
+            { 0, 15 }, /* Profile 4. */
+            { 0, 15 }, /* Profile 5. */
+            { 0, 15 }, /* Profile 6. */
+            { 0, 15 }, /* Profile 7. */
+        },
+        .profile_cnt = 8,
+    },
+    {
+        .name = "EVENT_TRACE_VECTOR_31_16",
+        .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 16, 31 }, /* Profile 2. */
+            { 16, 31 }, /* Profile 3. */
+            { 16, 31 }, /* Profile 4. */
+            { 16, 31 }, /* Profile 5. */
+            { 16, 31 }, /* Profile 6. */
+            { 16, 31 }, /* Profile 7. */
+        },
+        .profile_cnt = 8,
+    },
+    {
+        .name = "EVENT_TRACE_VECTOR_47_32",
+        .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 32, 47 }, /* Profile 2. */
+            { 32, 47 }, /* Profile 3. */
+            { 32, 47 }, /* Profile 4. */
+            { 32, 47 }, /* Profile 5. */
+            { 32, 47 }, /* Profile 6. */
+            { 32, 47 }, /* Profile 7. */
+        },
+        .profile_cnt = 8,
+    },
+    {
+        .name = "I2E_CLASS_ID_15_0",
+        .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 320, 335 }, /* Profile 2. */
+            { 320, 335 }, /* Profile 3. */
+            { 320, 335 }, /* Profile 4. */
+            { 304, 319 }, /* Profile 5. */
+            { 304, 319 }, /* Profile 6. */
+            { 304, 319 }, /* Profile 7. */
+        },
+        .profile_cnt = 8,
+    },
+    {
+        .name = "ING_TIMESTAMP_15_0",
+        .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { -1, -1 }, /* Profile 2. */
+            { -1, -1 }, /* Profile 3. */
+            { 256, 271 }, /* Profile 4. */
+            { -1, -1 }, /* Profile 5. */
+            { -1, -1 }, /* Profile 6. */
+            { 240, 255 }, /* Profile 7. */
+        },
+        .profile_cnt = 8,
+    },
+    {
+        .name = "ING_TIMESTAMP_31_16",
+        .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { -1, -1 }, /* Profile 2. */
+            { -1, -1 }, /* Profile 3. */
+            { 272, 287 }, /* Profile 4. */
+            { -1, -1 }, /* Profile 5. */
+            { -1, -1 }, /* Profile 6. */
+            { 256, 271 }, /* Profile 7. */
+        },
+        .profile_cnt = 8,
+    },
+    {
+        .name = "INGRESS_PP_PORT_7_0",
+        .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 240, 247 }, /* Profile 2. */
+            { 240, 247 }, /* Profile 3. */
+            { 240, 247 }, /* Profile 4. */
+            { 224, 231 }, /* Profile 5. */
+            { 224, 231 }, /* Profile 6. */
+            { 224, 231 }, /* Profile 7. */
+        },
+        .profile_cnt = 8,
+    },
+    {
+        .name = "INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0",
+        .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 176, 191 }, /* Profile 2. */
+            { 176, 191 }, /* Profile 3. */
+            { 176, 191 }, /* Profile 4. */
+            { 176, 191 }, /* Profile 5. */
+            { 176, 191 }, /* Profile 6. */
+            { 176, 191 }, /* Profile 7. */
+        },
+        .profile_cnt = 8,
+    },
+    {
+        .name = "INGRESS_QOS_REMARK_CTRL_3_0",
+        .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 404, 407 }, /* Profile 2. */
+            { 404, 407 }, /* Profile 3. */
+            { 404, 407 }, /* Profile 4. */
+            { 372, 375 }, /* Profile 5. */
+            { 372, 375 }, /* Profile 6. */
+            { 372, 375 }, /* Profile 7. */
+        },
+        .profile_cnt = 8,
+    },
+    {
+        .name = "INT_PRI_3_0",
+        .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_INT_PRI_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 396, 399 }, /* Profile 2. */
+            { 396, 399 }, /* Profile 3. */
+            { 396, 399 }, /* Profile 4. */
+            { 364, 367 }, /* Profile 5. */
+            { 364, 367 }, /* Profile 6. */
+            { 364, 367 }, /* Profile 7. */
+        },
+        .profile_cnt = 8,
+    },
+    {
+        .name = "L2_IIF_10_0",
+        .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_L2_IIF_10_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 304, 314 }, /* Profile 2. */
+            { 304, 314 }, /* Profile 3. */
+            { 304, 314 }, /* Profile 4. */
+            { 288, 298 }, /* Profile 5. */
+            { 288, 298 }, /* Profile 6. */
+            { 288, 298 }, /* Profile 7. */
+        },
+        .profile_cnt = 8,
+    },
+    {
+        .name = "L2_OIF_10_0",
+        .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_L2_OIF_10_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 208, 218 }, /* Profile 2. */
+            { 208, 218 }, /* Profile 3. */
+            { 208, 218 }, /* Profile 4. */
+            { 208, 218 }, /* Profile 5. */
+            { 208, 218 }, /* Profile 6. */
+            { 208, 218 }, /* Profile 7. */
+        },
+        .profile_cnt = 8,
+    },
+    {
+        .name = "L2_TUNNEL_SVP_15_0",
+        .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_L2_TUNNEL_SVP_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 288, 303 }, /* Profile 2. */
+            { 288, 303 }, /* Profile 3. */
+            { 288, 303 }, /* Profile 4. */
+            { 272, 287 }, /* Profile 5. */
+            { 272, 287 }, /* Profile 6. */
+            { 272, 287 }, /* Profile 7. */
+        },
+        .profile_cnt = 8,
+    },
+    {
+        .name = "L3_IIF_13_0",
+        .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_L3_IIF_13_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 352, 365 }, /* Profile 2. */
+            { 352, 365 }, /* Profile 3. */
+            { 352, 365 }, /* Profile 4. */
+            { 336, 349 }, /* Profile 5. */
+            { 336, 349 }, /* Profile 6. */
+            { 336, 349 }, /* Profile 7. */
+        },
+        .profile_cnt = 8,
+    },
+    {
+        .name = "L3_OIF_1_13_0",
+        .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 224, 237 }, /* Profile 2. */
+            { 224, 237 }, /* Profile 3. */
+            { 224, 237 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "NHOP_2_OR_ECMP_GROUP_INDEX_1_14_0",
+        .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_14_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 80, 94 }, /* Profile 2. */
+            { 80, 94 }, /* Profile 3. */
+            { 80, 94 }, /* Profile 4. */
+            { 80, 94 }, /* Profile 5. */
+            { 80, 94 }, /* Profile 6. */
+            { 80, 94 }, /* Profile 7. */
+        },
+        .profile_cnt = 8,
+    },
+    {
+        .name = "NHOP_INDEX_1_14_0",
+        .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_14_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 368, 382 }, /* Profile 2. */
+            { 368, 382 }, /* Profile 3. */
+            { 368, 382 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "PARSER_VHLEN_0_15_0",
+        .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 64, 79 }, /* Profile 2. */
+            { 64, 79 }, /* Profile 3. */
+            { 64, 79 }, /* Profile 4. */
+            { 64, 79 }, /* Profile 5. */
+            { 64, 79 }, /* Profile 6. */
+            { 64, 79 }, /* Profile 7. */
+        },
+        .profile_cnt = 8,
+    },
+    {
+        .name = "PKT_MISC_CTRL_0_3_0",
+        .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 400, 403 }, /* Profile 2. */
+            { 400, 403 }, /* Profile 3. */
+            { 400, 403 }, /* Profile 4. */
+            { 368, 371 }, /* Profile 5. */
+            { 368, 371 }, /* Profile 6. */
+            { 368, 371 }, /* Profile 7. */
+        },
+        .profile_cnt = 8,
+    },
+    {
+        .name = "SVP_NETWORK_GROUP_BITMAP_3_0",
+        .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 388, 391 }, /* Profile 2. */
+            { 388, 391 }, /* Profile 3. */
+            { 388, 391 }, /* Profile 4. */
+            { 356, 359 }, /* Profile 5. */
+            { 356, 359 }, /* Profile 6. */
+            { 356, 359 }, /* Profile 7. */
+        },
+        .profile_cnt = 8,
+    },
+    {
+        .name = "SYSTEM_DESTINATION_15_0",
+        .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 112, 127 }, /* Profile 2. */
+            { 112, 127 }, /* Profile 3. */
+            { 112, 127 }, /* Profile 4. */
+            { 112, 127 }, /* Profile 5. */
+            { 112, 127 }, /* Profile 6. */
+            { 112, 127 }, /* Profile 7. */
+        },
+        .profile_cnt = 8,
+    },
+    {
+        .name = "SYSTEM_OPCODE_3_0",
+        .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 412, 415 }, /* Profile 2. */
+            { 412, 415 }, /* Profile 3. */
+            { 412, 415 }, /* Profile 4. */
+            { 380, 383 }, /* Profile 5. */
+            { 380, 383 }, /* Profile 6. */
+            { 380, 383 }, /* Profile 7. */
+        },
+        .profile_cnt = 8,
+    },
+    {
+        .name = "SYSTEM_SOURCE_15_0",
+        .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 96, 111 }, /* Profile 2. */
+            { 96, 111 }, /* Profile 3. */
+            { 96, 111 }, /* Profile 4. */
+            { 96, 111 }, /* Profile 5. */
+            { 96, 111 }, /* Profile 6. */
+            { 96, 111 }, /* Profile 7. */
+        },
+        .profile_cnt = 8,
+    },
+    {
+        .name = "TAG_ACTION_CTRL_1_0",
+        .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_TAG_ACTION_CTRL_1_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 408, 409 }, /* Profile 2. */
+            { 408, 409 }, /* Profile 3. */
+            { 408, 409 }, /* Profile 4. */
+            { 376, 377 }, /* Profile 5. */
+            { 376, 377 }, /* Profile 6. */
+            { 376, 377 }, /* Profile 7. */
+        },
+        .profile_cnt = 8,
+    },
+    {
+        .name = "TUNNEL_PROCESSING_RESULTS_1_3_0",
+        .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 392, 395 }, /* Profile 2. */
+            { 392, 395 }, /* Profile 3. */
+            { 392, 395 }, /* Profile 4. */
+            { 360, 363 }, /* Profile 5. */
+            { 360, 363 }, /* Profile 6. */
+            { 360, 363 }, /* Profile 7. */
+        },
+        .profile_cnt = 8,
+    },
+    {
+        .name = "VFI_15_0",
+        .fid = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_VFI_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 192, 207 }, /* Profile 2. */
+            { 192, 207 }, /* Profile 3. */
+            { 192, 207 }, /* Profile 4. */
+            { 192, 207 }, /* Profile 5. */
+            { 192, 207 }, /* Profile 6. */
+            { 192, 207 }, /* Profile 7. */
+        },
+        .profile_cnt = 8,
+    },
+};static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_29_rxpmd_flex_field_info = {
+    .num_fields = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_FID_COUNT,
+    .info = bcm56780_a0_cna_6_5_29_rxpmd_flex_field_data,
+};
+
+static shr_enum_map_t bcm56780_a0_cna_6_5_29_rxpmd_flex_reason_names[] = {
+    BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_reasons_info_t bcm56780_a0_cna_6_5_29_rxpmd_flex_reasons_info = {
+    .num_reasons = BCM56780_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_COUNT,
+    .reason_names = bcm56780_a0_cna_6_5_29_rxpmd_flex_reason_names,
+    .reason_encode = bcm56780_a0_cna_6_5_29_rxpmd_flex_reason_encode,
+    .reason_decode = bcm56780_a0_cna_6_5_29_rxpmd_flex_reason_decode,
+};
+
+
+static int32_t bcmpkt_arp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_operation_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_operation_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_29_arp_t_fget[BCM56780_A0_CNA_6_5_29_BCMPKT_ARP_T_FID_COUNT] = {
+    bcmpkt_arp_t_hardware_len_get,
+    bcmpkt_arp_t_hardware_type_get,
+    bcmpkt_arp_t_operation_get,
+    bcmpkt_arp_t_prot_addr_len_get,
+    bcmpkt_arp_t_protocol_type_get,
+    bcmpkt_arp_t_sender_ha_get,
+    bcmpkt_arp_t_sender_ip_get,
+    bcmpkt_arp_t_target_ha_get,
+    bcmpkt_arp_t_target_ip_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_29_arp_t_fset[BCM56780_A0_CNA_6_5_29_BCMPKT_ARP_T_FID_COUNT] = {
+    bcmpkt_arp_t_hardware_len_set,
+    bcmpkt_arp_t_hardware_type_set,
+    bcmpkt_arp_t_operation_set,
+    bcmpkt_arp_t_prot_addr_len_set,
+    bcmpkt_arp_t_protocol_type_set,
+    bcmpkt_arp_t_sender_ha_set,
+    bcmpkt_arp_t_sender_ip_set,
+    bcmpkt_arp_t_target_ha_set,
+    bcmpkt_arp_t_target_ip_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_arp_t_field_data[] = {
+    BCM56780_A0_CNA_6_5_29_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_29_arp_t_field_info = {
+    .num_fields = BCM56780_A0_CNA_6_5_29_BCMPKT_ARP_T_FID_COUNT,
+    .info = bcm56780_a0_cna_6_5_29_arp_t_field_data,
+};
+
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_29_cpu_composites_0_t_fget[BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = {
+    bcmpkt_cpu_composites_0_t_dma_cont0_get,
+    bcmpkt_cpu_composites_0_t_dma_cont1_get,
+    bcmpkt_cpu_composites_0_t_dma_cont2_get,
+    bcmpkt_cpu_composites_0_t_dma_cont3_get,
+    bcmpkt_cpu_composites_0_t_dma_cont4_get,
+    bcmpkt_cpu_composites_0_t_dma_cont5_get,
+    bcmpkt_cpu_composites_0_t_dma_cont6_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_29_cpu_composites_0_t_fset[BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = {
+    bcmpkt_cpu_composites_0_t_dma_cont0_set,
+    bcmpkt_cpu_composites_0_t_dma_cont1_set,
+    bcmpkt_cpu_composites_0_t_dma_cont2_set,
+    bcmpkt_cpu_composites_0_t_dma_cont3_set,
+    bcmpkt_cpu_composites_0_t_dma_cont4_set,
+    bcmpkt_cpu_composites_0_t_dma_cont5_set,
+    bcmpkt_cpu_composites_0_t_dma_cont6_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_cpu_composites_0_t_field_data[] = {
+    BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_29_cpu_composites_0_t_field_info = {
+    .num_fields = BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT,
+    .info = bcm56780_a0_cna_6_5_29_cpu_composites_0_t_field_data,
+};
+
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_29_cpu_composites_1_t_fget[BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = {
+    bcmpkt_cpu_composites_1_t_dma_cont10_get,
+    bcmpkt_cpu_composites_1_t_dma_cont11_get,
+    bcmpkt_cpu_composites_1_t_dma_cont12_get,
+    bcmpkt_cpu_composites_1_t_dma_cont13_get,
+    bcmpkt_cpu_composites_1_t_dma_cont14_get,
+    bcmpkt_cpu_composites_1_t_dma_cont15_get,
+    bcmpkt_cpu_composites_1_t_dma_cont16_get,
+    bcmpkt_cpu_composites_1_t_dma_cont17_get,
+    bcmpkt_cpu_composites_1_t_dma_cont7_get,
+    bcmpkt_cpu_composites_1_t_dma_cont8_get,
+    bcmpkt_cpu_composites_1_t_dma_cont9_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_29_cpu_composites_1_t_fset[BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = {
+    bcmpkt_cpu_composites_1_t_dma_cont10_set,
+    bcmpkt_cpu_composites_1_t_dma_cont11_set,
+    bcmpkt_cpu_composites_1_t_dma_cont12_set,
+    bcmpkt_cpu_composites_1_t_dma_cont13_set,
+    bcmpkt_cpu_composites_1_t_dma_cont14_set,
+    bcmpkt_cpu_composites_1_t_dma_cont15_set,
+    bcmpkt_cpu_composites_1_t_dma_cont16_set,
+    bcmpkt_cpu_composites_1_t_dma_cont17_set,
+    bcmpkt_cpu_composites_1_t_dma_cont7_set,
+    bcmpkt_cpu_composites_1_t_dma_cont8_set,
+    bcmpkt_cpu_composites_1_t_dma_cont9_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_cpu_composites_1_t_field_data[] = {
+    BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_29_cpu_composites_1_t_field_info = {
+    .num_fields = BCM56780_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT,
+    .info = bcm56780_a0_cna_6_5_29_cpu_composites_1_t_field_data,
+};
+
+
+static int32_t bcmpkt_ep_nih_header_t_header_subtype_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 20, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_header_subtype_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 20, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_header_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 6);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_header_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 6, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_a_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_a_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_b_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 20, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_b_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 20, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_c_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_c_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_object_a_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_object_a_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_object_b_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_object_b_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_object_c_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_object_c_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_recirc_profile_index_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_recirc_profile_index_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 12, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 12, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_start_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 30, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_start_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 30, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_timestamp_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_29_ep_nih_header_t_fget[BCM56780_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = {
+    bcmpkt_ep_nih_header_t_header_subtype_get,
+    bcmpkt_ep_nih_header_t_header_type_get,
+    bcmpkt_ep_nih_header_t_opaque_ctrl_a_get,
+    bcmpkt_ep_nih_header_t_opaque_ctrl_b_get,
+    bcmpkt_ep_nih_header_t_opaque_ctrl_c_get,
+    bcmpkt_ep_nih_header_t_opaque_object_a_get,
+    bcmpkt_ep_nih_header_t_opaque_object_b_get,
+    bcmpkt_ep_nih_header_t_opaque_object_c_get,
+    bcmpkt_ep_nih_header_t_recirc_profile_index_get,
+    bcmpkt_ep_nih_header_t_reserved_0_get,
+    bcmpkt_ep_nih_header_t_start_get,
+    bcmpkt_ep_nih_header_t_timestamp_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_29_ep_nih_header_t_fset[BCM56780_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = {
+    bcmpkt_ep_nih_header_t_header_subtype_set,
+    bcmpkt_ep_nih_header_t_header_type_set,
+    bcmpkt_ep_nih_header_t_opaque_ctrl_a_set,
+    bcmpkt_ep_nih_header_t_opaque_ctrl_b_set,
+    bcmpkt_ep_nih_header_t_opaque_ctrl_c_set,
+    bcmpkt_ep_nih_header_t_opaque_object_a_set,
+    bcmpkt_ep_nih_header_t_opaque_object_b_set,
+    bcmpkt_ep_nih_header_t_opaque_object_c_set,
+    bcmpkt_ep_nih_header_t_recirc_profile_index_set,
+    bcmpkt_ep_nih_header_t_reserved_0_set,
+    bcmpkt_ep_nih_header_t_start_set,
+    bcmpkt_ep_nih_header_t_timestamp_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_ep_nih_header_t_field_data[] = {
+    BCM56780_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_29_ep_nih_header_t_field_info = {
+    .num_fields = BCM56780_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_FID_COUNT,
+    .info = bcm56780_a0_cna_6_5_29_ep_nih_header_t_field_data,
+};
+
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 11, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 11, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 13, 3);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 13, 3, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 10);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 10, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_t_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 10, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_t_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 10, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 12);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 12, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_29_erspan3_fixed_hdr_t_fget[BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = {
+    bcmpkt_erspan3_fixed_hdr_t_bso_get,
+    bcmpkt_erspan3_fixed_hdr_t_cos_get,
+    bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get,
+    bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get,
+    bcmpkt_erspan3_fixed_hdr_t_session_id_get,
+    bcmpkt_erspan3_fixed_hdr_t_t_get,
+    bcmpkt_erspan3_fixed_hdr_t_timestamp_get,
+    bcmpkt_erspan3_fixed_hdr_t_ver_get,
+    bcmpkt_erspan3_fixed_hdr_t_vlan_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_29_erspan3_fixed_hdr_t_fset[BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = {
+    bcmpkt_erspan3_fixed_hdr_t_bso_set,
+    bcmpkt_erspan3_fixed_hdr_t_cos_set,
+    bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set,
+    bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set,
+    bcmpkt_erspan3_fixed_hdr_t_session_id_set,
+    bcmpkt_erspan3_fixed_hdr_t_t_set,
+    bcmpkt_erspan3_fixed_hdr_t_timestamp_set,
+    bcmpkt_erspan3_fixed_hdr_t_ver_set,
+    bcmpkt_erspan3_fixed_hdr_t_vlan_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_erspan3_fixed_hdr_t_field_data[] = {
+    BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_29_erspan3_fixed_hdr_t_field_info = {
+    .num_fields = BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT,
+    .info = bcm56780_a0_cna_6_5_29_erspan3_fixed_hdr_t_field_data,
+};
+
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 26, 6);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 26, 6, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 10);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 10, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_29_erspan3_subhdr_5_t_fget[BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = {
+    bcmpkt_erspan3_subhdr_5_t_platform_id_get,
+    bcmpkt_erspan3_subhdr_5_t_port_id_get,
+    bcmpkt_erspan3_subhdr_5_t_switch_id_get,
+    bcmpkt_erspan3_subhdr_5_t_timestamp_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_29_erspan3_subhdr_5_t_fset[BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = {
+    bcmpkt_erspan3_subhdr_5_t_platform_id_set,
+    bcmpkt_erspan3_subhdr_5_t_port_id_set,
+    bcmpkt_erspan3_subhdr_5_t_switch_id_set,
+    bcmpkt_erspan3_subhdr_5_t_timestamp_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_erspan3_subhdr_5_t_field_data[] = {
+    BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_29_erspan3_subhdr_5_t_field_info = {
+    .num_fields = BCM56780_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT,
+    .info = bcm56780_a0_cna_6_5_29_erspan3_subhdr_5_t_field_data,
+};
+
+
+static int32_t bcmpkt_ethertype_t_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ethertype_t_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_29_ethertype_t_fget[BCM56780_A0_CNA_6_5_29_BCMPKT_ETHERTYPE_T_FID_COUNT] = {
+    bcmpkt_ethertype_t_type_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_29_ethertype_t_fset[BCM56780_A0_CNA_6_5_29_BCMPKT_ETHERTYPE_T_FID_COUNT] = {
+    bcmpkt_ethertype_t_type_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_ethertype_t_field_data[] = {
+    BCM56780_A0_CNA_6_5_29_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_29_ethertype_t_field_info = {
+    .num_fields = BCM56780_A0_CNA_6_5_29_BCMPKT_ETHERTYPE_T_FID_COUNT,
+    .info = bcm56780_a0_cna_6_5_29_ethertype_t_field_data,
+};
+
+
+static int32_t bcmpkt_generic_loopback_t_destination_obj_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_destination_obj_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_destination_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_destination_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_entropy_obj_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_entropy_obj_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_header_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 20, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_header_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 20, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_input_priority_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 12, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_input_priority_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 12, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_interface_ctrl_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 4, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_interface_ctrl_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 4, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_interface_obj_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_interface_obj_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_qos_obj_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_qos_obj_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_reserved_1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_reserved_1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_reserved_2_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_reserved_2_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_source_system_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_source_system_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_start_byte_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_start_byte_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_29_generic_loopback_t_fget[BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = {
+    bcmpkt_generic_loopback_t_destination_obj_get,
+    bcmpkt_generic_loopback_t_destination_type_get,
+    bcmpkt_generic_loopback_t_entropy_obj_get,
+    bcmpkt_generic_loopback_t_flags_get,
+    bcmpkt_generic_loopback_t_header_type_get,
+    bcmpkt_generic_loopback_t_input_priority_get,
+    bcmpkt_generic_loopback_t_interface_ctrl_get,
+    bcmpkt_generic_loopback_t_interface_obj_get,
+    bcmpkt_generic_loopback_t_processing_ctrl_0_get,
+    bcmpkt_generic_loopback_t_processing_ctrl_1_get,
+    bcmpkt_generic_loopback_t_qos_obj_get,
+    bcmpkt_generic_loopback_t_reserved_1_get,
+    bcmpkt_generic_loopback_t_reserved_2_get,
+    bcmpkt_generic_loopback_t_source_system_port_get,
+    bcmpkt_generic_loopback_t_start_byte_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_29_generic_loopback_t_fset[BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = {
+    bcmpkt_generic_loopback_t_destination_obj_set,
+    bcmpkt_generic_loopback_t_destination_type_set,
+    bcmpkt_generic_loopback_t_entropy_obj_set,
+    bcmpkt_generic_loopback_t_flags_set,
+    bcmpkt_generic_loopback_t_header_type_set,
+    bcmpkt_generic_loopback_t_input_priority_set,
+    bcmpkt_generic_loopback_t_interface_ctrl_set,
+    bcmpkt_generic_loopback_t_interface_obj_set,
+    bcmpkt_generic_loopback_t_processing_ctrl_0_set,
+    bcmpkt_generic_loopback_t_processing_ctrl_1_set,
+    bcmpkt_generic_loopback_t_qos_obj_set,
+    bcmpkt_generic_loopback_t_reserved_1_set,
+    bcmpkt_generic_loopback_t_reserved_2_set,
+    bcmpkt_generic_loopback_t_source_system_port_set,
+    bcmpkt_generic_loopback_t_start_byte_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_generic_loopback_t_field_data[] = {
+    BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_29_generic_loopback_t_field_info = {
+    .num_fields = BCM56780_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT,
+    .info = bcm56780_a0_cna_6_5_29_generic_loopback_t_field_data,
+};
+
+
+static int32_t bcmpkt_icmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_icmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_icmp_t_code_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_icmp_t_code_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_icmp_t_icmp_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_icmp_t_icmp_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_29_icmp_t_fget[BCM56780_A0_CNA_6_5_29_BCMPKT_ICMP_T_FID_COUNT] = {
+    bcmpkt_icmp_t_checksum_get,
+    bcmpkt_icmp_t_code_get,
+    bcmpkt_icmp_t_icmp_type_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_29_icmp_t_fset[BCM56780_A0_CNA_6_5_29_BCMPKT_ICMP_T_FID_COUNT] = {
+    bcmpkt_icmp_t_checksum_set,
+    bcmpkt_icmp_t_code_set,
+    bcmpkt_icmp_t_icmp_type_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_icmp_t_field_data[] = {
+    BCM56780_A0_CNA_6_5_29_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_29_icmp_t_field_info = {
+    .num_fields = BCM56780_A0_CNA_6_5_29_BCMPKT_ICMP_T_FID_COUNT,
+    .info = bcm56780_a0_cna_6_5_29_icmp_t_field_data,
+};
+
+
+static int32_t bcmpkt_ipfix_t_export_time_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_export_time_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_obs_domain_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_obs_domain_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_29_ipfix_t_fget[BCM56780_A0_CNA_6_5_29_BCMPKT_IPFIX_T_FID_COUNT] = {
+    bcmpkt_ipfix_t_export_time_get,
+    bcmpkt_ipfix_t_length_get,
+    bcmpkt_ipfix_t_obs_domain_id_get,
+    bcmpkt_ipfix_t_sequence_num_get,
+    bcmpkt_ipfix_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_29_ipfix_t_fset[BCM56780_A0_CNA_6_5_29_BCMPKT_IPFIX_T_FID_COUNT] = {
+    bcmpkt_ipfix_t_export_time_set,
+    bcmpkt_ipfix_t_length_set,
+    bcmpkt_ipfix_t_obs_domain_id_set,
+    bcmpkt_ipfix_t_sequence_num_set,
+    bcmpkt_ipfix_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_ipfix_t_field_data[] = {
+    BCM56780_A0_CNA_6_5_29_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_29_ipfix_t_field_info = {
+    .num_fields = BCM56780_A0_CNA_6_5_29_BCMPKT_IPFIX_T_FID_COUNT,
+    .info = bcm56780_a0_cna_6_5_29_ipfix_t_field_data,
+};
+
+
+static int32_t bcmpkt_ipv4_t_da_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_da_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_flags_frag_offset_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_flags_frag_offset_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_hdr_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_hdr_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_option_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_option_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_protocol_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_protocol_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_sa_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_sa_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_tos_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_tos_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_total_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_total_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_ttl_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_ttl_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_version_hdr_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_version_hdr_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_29_ipv4_t_fget[BCM56780_A0_CNA_6_5_29_BCMPKT_IPV4_T_FID_COUNT] = {
+    bcmpkt_ipv4_t_da_get,
+    bcmpkt_ipv4_t_flags_frag_offset_get,
+    bcmpkt_ipv4_t_hdr_checksum_get,
+    bcmpkt_ipv4_t_id_get,
+    bcmpkt_ipv4_t_option_get,
+    bcmpkt_ipv4_t_protocol_get,
+    bcmpkt_ipv4_t_sa_get,
+    bcmpkt_ipv4_t_tos_get,
+    bcmpkt_ipv4_t_total_length_get,
+    bcmpkt_ipv4_t_ttl_get,
+    bcmpkt_ipv4_t_version_hdr_len_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_29_ipv4_t_fset[BCM56780_A0_CNA_6_5_29_BCMPKT_IPV4_T_FID_COUNT] = {
+    bcmpkt_ipv4_t_da_set,
+    bcmpkt_ipv4_t_flags_frag_offset_set,
+    bcmpkt_ipv4_t_hdr_checksum_set,
+    bcmpkt_ipv4_t_id_set,
+    bcmpkt_ipv4_t_option_set,
+    bcmpkt_ipv4_t_protocol_set,
+    bcmpkt_ipv4_t_sa_set,
+    bcmpkt_ipv4_t_tos_set,
+    bcmpkt_ipv4_t_total_length_set,
+    bcmpkt_ipv4_t_ttl_set,
+    bcmpkt_ipv4_t_version_hdr_len_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_ipv4_t_field_data[] = {
+    BCM56780_A0_CNA_6_5_29_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_29_ipv4_t_field_info = {
+    .num_fields = BCM56780_A0_CNA_6_5_29_BCMPKT_IPV4_T_FID_COUNT,
+    .info = bcm56780_a0_cna_6_5_29_ipv4_t_field_data,
+};
+
+
+static int32_t bcmpkt_ipv6_t_da_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_da_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_flow_label_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 20);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_flow_label_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 20, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_hop_limit_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_hop_limit_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 8, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 8, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_payload_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_payload_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_sa_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_sa_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_traffic_class_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 20, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_traffic_class_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 20, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_29_ipv6_t_fget[BCM56780_A0_CNA_6_5_29_BCMPKT_IPV6_T_FID_COUNT] = {
+    bcmpkt_ipv6_t_da_get,
+    bcmpkt_ipv6_t_flow_label_get,
+    bcmpkt_ipv6_t_hop_limit_get,
+    bcmpkt_ipv6_t_next_header_get,
+    bcmpkt_ipv6_t_payload_length_get,
+    bcmpkt_ipv6_t_sa_get,
+    bcmpkt_ipv6_t_traffic_class_get,
+    bcmpkt_ipv6_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_29_ipv6_t_fset[BCM56780_A0_CNA_6_5_29_BCMPKT_IPV6_T_FID_COUNT] = {
+    bcmpkt_ipv6_t_da_set,
+    bcmpkt_ipv6_t_flow_label_set,
+    bcmpkt_ipv6_t_hop_limit_set,
+    bcmpkt_ipv6_t_next_header_set,
+    bcmpkt_ipv6_t_payload_length_set,
+    bcmpkt_ipv6_t_sa_set,
+    bcmpkt_ipv6_t_traffic_class_set,
+    bcmpkt_ipv6_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_ipv6_t_field_data[] = {
+    BCM56780_A0_CNA_6_5_29_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_29_ipv6_t_field_info = {
+    .num_fields = BCM56780_A0_CNA_6_5_29_BCMPKT_IPV6_T_FID_COUNT,
+    .info = bcm56780_a0_cna_6_5_29_ipv6_t_field_data,
+};
+
+
+static int32_t bcmpkt_l2_t_macda_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_l2_t_macda_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_l2_t_macsa_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_l2_t_macsa_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_29_l2_t_fget[BCM56780_A0_CNA_6_5_29_BCMPKT_L2_T_FID_COUNT] = {
+    bcmpkt_l2_t_macda_get,
+    bcmpkt_l2_t_macsa_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_29_l2_t_fset[BCM56780_A0_CNA_6_5_29_BCMPKT_L2_T_FID_COUNT] = {
+    bcmpkt_l2_t_macda_set,
+    bcmpkt_l2_t_macsa_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_l2_t_field_data[] = {
+    BCM56780_A0_CNA_6_5_29_BCMPKT_L2_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_29_l2_t_field_info = {
+    .num_fields = BCM56780_A0_CNA_6_5_29_BCMPKT_L2_T_FID_COUNT,
+    .info = bcm56780_a0_cna_6_5_29_l2_t_field_data,
+};
+
+
+static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_29_mirror_erspan_sn_t_fget[BCM56780_A0_CNA_6_5_29_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = {
+    bcmpkt_mirror_erspan_sn_t_seq_num_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_29_mirror_erspan_sn_t_fset[BCM56780_A0_CNA_6_5_29_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = {
+    bcmpkt_mirror_erspan_sn_t_seq_num_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_mirror_erspan_sn_t_field_data[] = {
+    BCM56780_A0_CNA_6_5_29_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_29_mirror_erspan_sn_t_field_info = {
+    .num_fields = BCM56780_A0_CNA_6_5_29_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT,
+    .info = bcm56780_a0_cna_6_5_29_mirror_erspan_sn_t_field_data,
+};
+
+
+static int32_t bcmpkt_mirror_transport_t_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_mirror_transport_t_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_29_mirror_transport_t_fget[BCM56780_A0_CNA_6_5_29_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = {
+    bcmpkt_mirror_transport_t_data_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_29_mirror_transport_t_fset[BCM56780_A0_CNA_6_5_29_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = {
+    bcmpkt_mirror_transport_t_data_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_mirror_transport_t_field_data[] = {
+    BCM56780_A0_CNA_6_5_29_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_29_mirror_transport_t_field_info = {
+    .num_fields = BCM56780_A0_CNA_6_5_29_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT,
+    .info = bcm56780_a0_cna_6_5_29_mirror_transport_t_field_data,
+};
+
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[4], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[4], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[4], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[4], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_29_psamp_mirror_on_drop_0_t_fget[BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = {
+    bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_length_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_template_id_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_29_psamp_mirror_on_drop_0_t_fset[BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = {
+    bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_length_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_template_id_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_psamp_mirror_on_drop_0_t_field_data[] = {
+    BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_29_psamp_mirror_on_drop_0_t_field_info = {
+    .num_fields = BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT,
+    .info = bcm56780_a0_cna_6_5_29_psamp_mirror_on_drop_0_t_field_data,
+};
+
+
+static int32_t bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_29_psamp_mirror_on_drop_1_t_fget[BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT] = {
+    bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_get,
+    bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_get,
+    bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_get,
+    bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_get,
+    bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_get,
+    bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_29_psamp_mirror_on_drop_1_t_fset[BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT] = {
+    bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_set,
+    bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_set,
+    bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_set,
+    bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_set,
+    bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_set,
+    bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_psamp_mirror_on_drop_1_t_field_data[] = {
+    BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_29_psamp_mirror_on_drop_1_t_field_info = {
+    .num_fields = BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT,
+    .info = bcm56780_a0_cna_6_5_29_psamp_mirror_on_drop_1_t_field_data,
+};
+
+
+static int32_t bcmpkt_psamp_mirror_on_drop_2_t_egr_drop_reason_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_2_t_egr_drop_reason_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_2_t_ep_copy_session_index_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_2_t_ep_copy_session_index_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_2_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_2_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_2_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_2_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_2_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_2_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_2_t_var_len_indicator_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_2_t_var_len_indicator_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_29_psamp_mirror_on_drop_2_t_fget[BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT] = {
+    bcmpkt_psamp_mirror_on_drop_2_t_egr_drop_reason_get,
+    bcmpkt_psamp_mirror_on_drop_2_t_ep_copy_session_index_get,
+    bcmpkt_psamp_mirror_on_drop_2_t_reserved_0_get,
+    bcmpkt_psamp_mirror_on_drop_2_t_sampled_length_get,
+    bcmpkt_psamp_mirror_on_drop_2_t_user_meta_data_get,
+    bcmpkt_psamp_mirror_on_drop_2_t_var_len_indicator_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_29_psamp_mirror_on_drop_2_t_fset[BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT] = {
+    bcmpkt_psamp_mirror_on_drop_2_t_egr_drop_reason_set,
+    bcmpkt_psamp_mirror_on_drop_2_t_ep_copy_session_index_set,
+    bcmpkt_psamp_mirror_on_drop_2_t_reserved_0_set,
+    bcmpkt_psamp_mirror_on_drop_2_t_sampled_length_set,
+    bcmpkt_psamp_mirror_on_drop_2_t_user_meta_data_set,
+    bcmpkt_psamp_mirror_on_drop_2_t_var_len_indicator_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_psamp_mirror_on_drop_2_t_field_data[] = {
+    BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_29_psamp_mirror_on_drop_2_t_field_info = {
+    .num_fields = BCM56780_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT,
+    .info = bcm56780_a0_cna_6_5_29_psamp_mirror_on_drop_2_t_field_data,
+};
+
+
+static int32_t bcmpkt_rarp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_operation_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_operation_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_29_rarp_t_fget[BCM56780_A0_CNA_6_5_29_BCMPKT_RARP_T_FID_COUNT] = {
+    bcmpkt_rarp_t_hardware_len_get,
+    bcmpkt_rarp_t_hardware_type_get,
+    bcmpkt_rarp_t_operation_get,
+    bcmpkt_rarp_t_prot_addr_len_get,
+    bcmpkt_rarp_t_protocol_type_get,
+    bcmpkt_rarp_t_sender_ha_get,
+    bcmpkt_rarp_t_sender_ip_get,
+    bcmpkt_rarp_t_target_ha_get,
+    bcmpkt_rarp_t_target_ip_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_29_rarp_t_fset[BCM56780_A0_CNA_6_5_29_BCMPKT_RARP_T_FID_COUNT] = {
+    bcmpkt_rarp_t_hardware_len_set,
+    bcmpkt_rarp_t_hardware_type_set,
+    bcmpkt_rarp_t_operation_set,
+    bcmpkt_rarp_t_prot_addr_len_set,
+    bcmpkt_rarp_t_protocol_type_set,
+    bcmpkt_rarp_t_sender_ha_set,
+    bcmpkt_rarp_t_sender_ip_set,
+    bcmpkt_rarp_t_target_ha_set,
+    bcmpkt_rarp_t_target_ip_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_rarp_t_field_data[] = {
+    BCM56780_A0_CNA_6_5_29_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_29_rarp_t_field_info = {
+    .num_fields = BCM56780_A0_CNA_6_5_29_BCMPKT_RARP_T_FID_COUNT,
+    .info = bcm56780_a0_cna_6_5_29_rarp_t_field_data,
+};
+
+
+static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_first_4bytes_t_src_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_first_4bytes_t_src_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_29_tcp_first_4bytes_t_fget[BCM56780_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = {
+    bcmpkt_tcp_first_4bytes_t_dst_port_get,
+    bcmpkt_tcp_first_4bytes_t_src_port_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_29_tcp_first_4bytes_t_fset[BCM56780_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = {
+    bcmpkt_tcp_first_4bytes_t_dst_port_set,
+    bcmpkt_tcp_first_4bytes_t_src_port_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_tcp_first_4bytes_t_field_data[] = {
+    BCM56780_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_29_tcp_first_4bytes_t_field_info = {
+    .num_fields = BCM56780_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT,
+    .info = bcm56780_a0_cna_6_5_29_tcp_first_4bytes_t_field_data,
+};
+
+
+static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_win_size_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_win_size_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_29_tcp_last_16bytes_t_fget[BCM56780_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = {
+    bcmpkt_tcp_last_16bytes_t_ack_num_get,
+    bcmpkt_tcp_last_16bytes_t_checksum_get,
+    bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get,
+    bcmpkt_tcp_last_16bytes_t_seq_num_get,
+    bcmpkt_tcp_last_16bytes_t_urgent_ptr_get,
+    bcmpkt_tcp_last_16bytes_t_win_size_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_29_tcp_last_16bytes_t_fset[BCM56780_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = {
+    bcmpkt_tcp_last_16bytes_t_ack_num_set,
+    bcmpkt_tcp_last_16bytes_t_checksum_set,
+    bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set,
+    bcmpkt_tcp_last_16bytes_t_seq_num_set,
+    bcmpkt_tcp_last_16bytes_t_urgent_ptr_set,
+    bcmpkt_tcp_last_16bytes_t_win_size_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_tcp_last_16bytes_t_field_data[] = {
+    BCM56780_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_29_tcp_last_16bytes_t_field_info = {
+    .num_fields = BCM56780_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT,
+    .info = bcm56780_a0_cna_6_5_29_tcp_last_16bytes_t_field_data,
+};
+
+
+static int32_t bcmpkt_udp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_dst_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_src_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_src_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_udp_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_udp_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_29_udp_t_fget[BCM56780_A0_CNA_6_5_29_BCMPKT_UDP_T_FID_COUNT] = {
+    bcmpkt_udp_t_checksum_get,
+    bcmpkt_udp_t_dst_port_get,
+    bcmpkt_udp_t_src_port_get,
+    bcmpkt_udp_t_udp_length_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_29_udp_t_fset[BCM56780_A0_CNA_6_5_29_BCMPKT_UDP_T_FID_COUNT] = {
+    bcmpkt_udp_t_checksum_set,
+    bcmpkt_udp_t_dst_port_set,
+    bcmpkt_udp_t_src_port_set,
+    bcmpkt_udp_t_udp_length_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_udp_t_field_data[] = {
+    BCM56780_A0_CNA_6_5_29_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_29_udp_t_field_info = {
+    .num_fields = BCM56780_A0_CNA_6_5_29_BCMPKT_UDP_T_FID_COUNT,
+    .info = bcm56780_a0_cna_6_5_29_udp_t_field_data,
+};
+
+
+static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_29_unknown_l3_t_fget[BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = {
+    bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get,
+    bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_29_unknown_l3_t_fset[BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = {
+    bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set,
+    bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_unknown_l3_t_field_data[] = {
+    BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_29_unknown_l3_t_field_info = {
+    .num_fields = BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T_FID_COUNT,
+    .info = bcm56780_a0_cna_6_5_29_unknown_l3_t_field_data,
+};
+
+
+static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_29_unknown_l4_t_fget[BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = {
+    bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_29_unknown_l4_t_fset[BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = {
+    bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_unknown_l4_t_field_data[] = {
+    BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_29_unknown_l4_t_field_info = {
+    .num_fields = BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L4_T_FID_COUNT,
+    .info = bcm56780_a0_cna_6_5_29_unknown_l4_t_field_data,
+};
+
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_29_unknown_l5_t_fget[BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = {
+    bcmpkt_unknown_l5_t_l5_bytes_0_1_get,
+    bcmpkt_unknown_l5_t_l5_bytes_2_3_get,
+    bcmpkt_unknown_l5_t_l5_bytes_4_7_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_29_unknown_l5_t_fset[BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = {
+    bcmpkt_unknown_l5_t_l5_bytes_0_1_set,
+    bcmpkt_unknown_l5_t_l5_bytes_2_3_set,
+    bcmpkt_unknown_l5_t_l5_bytes_4_7_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_unknown_l5_t_field_data[] = {
+    BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_29_unknown_l5_t_field_info = {
+    .num_fields = BCM56780_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_FID_COUNT,
+    .info = bcm56780_a0_cna_6_5_29_unknown_l5_t_field_data,
+};
+
+
+static int32_t bcmpkt_vlan_t_cfi_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 12, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_cfi_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 12, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_pcp_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 13, 3);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_pcp_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 13, 3, val);
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_tpid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_vid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 12);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_vid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 12, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_29_vlan_t_fget[BCM56780_A0_CNA_6_5_29_BCMPKT_VLAN_T_FID_COUNT] = {
+    bcmpkt_vlan_t_cfi_get,
+    bcmpkt_vlan_t_pcp_get,
+    bcmpkt_vlan_t_tpid_get,
+    bcmpkt_vlan_t_vid_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_29_vlan_t_fset[BCM56780_A0_CNA_6_5_29_BCMPKT_VLAN_T_FID_COUNT] = {
+    bcmpkt_vlan_t_cfi_set,
+    bcmpkt_vlan_t_pcp_set,
+    bcmpkt_vlan_t_tpid_set,
+    bcmpkt_vlan_t_vid_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_vlan_t_field_data[] = {
+    BCM56780_A0_CNA_6_5_29_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_29_vlan_t_field_info = {
+    .num_fields = BCM56780_A0_CNA_6_5_29_BCMPKT_VLAN_T_FID_COUNT,
+    .info = bcm56780_a0_cna_6_5_29_vlan_t_field_data,
+};
+
+
+static int32_t bcmpkt_vxlan_t_flags_reserved_1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_vxlan_t_flags_reserved_1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_vxlan_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vxlan_t_reserved2_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_vxlan_t_vn_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 8, 24);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vxlan_t_vn_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 8, 24, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_29_vxlan_t_fget[BCM56780_A0_CNA_6_5_29_BCMPKT_VXLAN_T_FID_COUNT] = {
+    bcmpkt_vxlan_t_flags_reserved_1_get,
+    bcmpkt_vxlan_t_reserved2_get,
+    bcmpkt_vxlan_t_vn_id_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_29_vxlan_t_fset[BCM56780_A0_CNA_6_5_29_BCMPKT_VXLAN_T_FID_COUNT] = {
+    bcmpkt_vxlan_t_flags_reserved_1_set,
+    bcmpkt_vxlan_t_reserved2_set,
+    bcmpkt_vxlan_t_vn_id_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_29_vxlan_t_field_data[] = {
+    BCM56780_A0_CNA_6_5_29_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_29_vxlan_t_field_info = {
+    .num_fields = BCM56780_A0_CNA_6_5_29_BCMPKT_VXLAN_T_FID_COUNT,
+    .info = bcm56780_a0_cna_6_5_29_vxlan_t_field_data,
+};
+
+static bcmpkt_flex_pmd_info_t bcm56780_a0_cna_6_5_29_flexhdr_info_list[BCM56780_A0_CNA_6_5_29_BCMPKT_FLEXHDR_COUNT] = {
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_cna_6_5_29_arp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_cna_6_5_29_arp_t_fget,
+        .flex_fset = bcm56780_a0_cna_6_5_29_arp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_cna_6_5_29_cpu_composites_0_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_cna_6_5_29_cpu_composites_0_t_fget,
+        .flex_fset = bcm56780_a0_cna_6_5_29_cpu_composites_0_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_cna_6_5_29_cpu_composites_1_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_cna_6_5_29_cpu_composites_1_t_fget,
+        .flex_fset = bcm56780_a0_cna_6_5_29_cpu_composites_1_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_cna_6_5_29_ep_nih_header_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_cna_6_5_29_ep_nih_header_t_fget,
+        .flex_fset = bcm56780_a0_cna_6_5_29_ep_nih_header_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_cna_6_5_29_erspan3_fixed_hdr_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_cna_6_5_29_erspan3_fixed_hdr_t_fget,
+        .flex_fset = bcm56780_a0_cna_6_5_29_erspan3_fixed_hdr_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_cna_6_5_29_erspan3_subhdr_5_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_cna_6_5_29_erspan3_subhdr_5_t_fget,
+        .flex_fset = bcm56780_a0_cna_6_5_29_erspan3_subhdr_5_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_cna_6_5_29_ethertype_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_cna_6_5_29_ethertype_t_fget,
+        .flex_fset = bcm56780_a0_cna_6_5_29_ethertype_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_cna_6_5_29_generic_loopback_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_cna_6_5_29_generic_loopback_t_fget,
+        .flex_fset = bcm56780_a0_cna_6_5_29_generic_loopback_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_cna_6_5_29_icmp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_cna_6_5_29_icmp_t_fget,
+        .flex_fset = bcm56780_a0_cna_6_5_29_icmp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_cna_6_5_29_ipfix_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_cna_6_5_29_ipfix_t_fget,
+        .flex_fset = bcm56780_a0_cna_6_5_29_ipfix_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_cna_6_5_29_ipv4_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_cna_6_5_29_ipv4_t_fget,
+        .flex_fset = bcm56780_a0_cna_6_5_29_ipv4_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_cna_6_5_29_ipv6_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_cna_6_5_29_ipv6_t_fget,
+        .flex_fset = bcm56780_a0_cna_6_5_29_ipv6_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_cna_6_5_29_l2_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_cna_6_5_29_l2_t_fget,
+        .flex_fset = bcm56780_a0_cna_6_5_29_l2_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_cna_6_5_29_mirror_erspan_sn_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_cna_6_5_29_mirror_erspan_sn_t_fget,
+        .flex_fset = bcm56780_a0_cna_6_5_29_mirror_erspan_sn_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_cna_6_5_29_mirror_transport_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_cna_6_5_29_mirror_transport_t_fget,
+        .flex_fset = bcm56780_a0_cna_6_5_29_mirror_transport_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_cna_6_5_29_psamp_mirror_on_drop_0_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_cna_6_5_29_psamp_mirror_on_drop_0_t_fget,
+        .flex_fset = bcm56780_a0_cna_6_5_29_psamp_mirror_on_drop_0_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_cna_6_5_29_psamp_mirror_on_drop_1_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_cna_6_5_29_psamp_mirror_on_drop_1_t_fget,
+        .flex_fset = bcm56780_a0_cna_6_5_29_psamp_mirror_on_drop_1_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_cna_6_5_29_psamp_mirror_on_drop_2_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_cna_6_5_29_psamp_mirror_on_drop_2_t_fget,
+        .flex_fset = bcm56780_a0_cna_6_5_29_psamp_mirror_on_drop_2_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_cna_6_5_29_rarp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_cna_6_5_29_rarp_t_fget,
+        .flex_fset = bcm56780_a0_cna_6_5_29_rarp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_cna_6_5_29_tcp_first_4bytes_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_cna_6_5_29_tcp_first_4bytes_t_fget,
+        .flex_fset = bcm56780_a0_cna_6_5_29_tcp_first_4bytes_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_cna_6_5_29_tcp_last_16bytes_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_cna_6_5_29_tcp_last_16bytes_t_fget,
+        .flex_fset = bcm56780_a0_cna_6_5_29_tcp_last_16bytes_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_cna_6_5_29_udp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_cna_6_5_29_udp_t_fget,
+        .flex_fset = bcm56780_a0_cna_6_5_29_udp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_cna_6_5_29_unknown_l3_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_cna_6_5_29_unknown_l3_t_fget,
+        .flex_fset = bcm56780_a0_cna_6_5_29_unknown_l3_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_cna_6_5_29_unknown_l4_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_cna_6_5_29_unknown_l4_t_fget,
+        .flex_fset = bcm56780_a0_cna_6_5_29_unknown_l4_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_cna_6_5_29_unknown_l5_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_cna_6_5_29_unknown_l5_t_fget,
+        .flex_fset = bcm56780_a0_cna_6_5_29_unknown_l5_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_cna_6_5_29_vlan_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_cna_6_5_29_vlan_t_fget,
+        .flex_fset = bcm56780_a0_cna_6_5_29_vlan_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_cna_6_5_29_vxlan_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_cna_6_5_29_vxlan_t_fget,
+        .flex_fset = bcm56780_a0_cna_6_5_29_vxlan_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_cna_6_5_29_rxpmd_flex_field_info,
+        .reasons_info = &bcm56780_a0_cna_6_5_29_rxpmd_flex_reasons_info,
+        .flex_common_fget = bcm56780_a0_rxpmd_flex_fget,
+        .flex_common_fset = bcm56780_a0_rxpmd_flex_fset,
+    },
+};
+
+static shr_enum_map_t bcm56780_a0_cna_6_5_29_flexhdr_id_map[] = {
+    BCM56780_A0_CNA_6_5_29_BCMPKT_FLEXHDR_NAME_MAP_INIT
+};
+
+shr_enum_map_t * bcm56780_a0_cna_6_5_29_flexhdr_map_get(void)
+{
+    return bcm56780_a0_cna_6_5_29_flexhdr_id_map;
+}
+
+bcmpkt_flex_pmd_info_t * bcm56780_a0_cna_6_5_29_flex_pmd_info_get(uint32_t hid)
+{
+    if (hid >= BCM56780_A0_CNA_6_5_29_BCMPKT_FLEXHDR_COUNT) {
+        return NULL;
+    }
+
+    return &bcm56780_a0_cna_6_5_29_flexhdr_info_list[hid];
+}
+
+int bcm56780_a0_cna_6_5_29_flexhdr_variant_support_map[BCMPKT_PMD_COUNT] = {
+    7,
+    -1,
+    -1,
+    27,
+};
\ No newline at end of file
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_bcmpkt_rxpmd_match_id.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_bcmpkt_rxpmd_match_id.c
new file mode 100644
index 000000000..57ca11ef7
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_bcmpkt_rxpmd_match_id.c
@@ -0,0 +1,2550 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) bcm56780_a0_dna_2_9_5_0_sf_match_id_info.yml
+ * for device bcm56780_a0 and variant dna_2_9_5_0.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+
+#include <bcmpkt/bcmpkt_rxpmd_match_id.h>
+#include <bcmpkt/xfcr/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_bcmpkt_rxpmd_match_id_defs.h>
+
+
+static bcmpkt_rxpmd_match_id_db_t
+bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db[BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_COUNT] = {
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_ETAG",
+        .match        = 0x80,
+        .match_mask   = 0xc0,
+        .match_maxbit = 31,
+        .match_minbit = 24,
+        .maxbit       = 7,
+        .minbit       = 6,
+        .value        = 0x2,
+        .pmaxbit      = 42,
+        .pminbit      = 35,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_HG3_BASE",
+        .match        = 0x2,
+        .match_mask   = 0x2,
+        .match_maxbit = 31,
+        .match_minbit = 24,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 42,
+        .pminbit      = 35,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0 */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0",
+        .match        = 0x22,
+        .match_mask   = 0x22,
+        .match_maxbit = 31,
+        .match_minbit = 24,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 42,
+        .pminbit      = 35,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_ITAG",
+        .match        = 0x10,
+        .match_mask   = 0x10,
+        .match_maxbit = 31,
+        .match_minbit = 24,
+        .maxbit       = 4,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 42,
+        .pminbit      = 35,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_L2",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 31,
+        .match_minbit = 24,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 42,
+        .pminbit      = 35,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0xff,
+        .match_maxbit = 31,
+        .match_minbit = 24,
+        .maxbit       = 7,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 42,
+        .pminbit      = 35,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_OTAG",
+        .match        = 0x8,
+        .match_mask   = 0x8,
+        .match_maxbit = 31,
+        .match_minbit = 24,
+        .maxbit       = 3,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 42,
+        .pminbit      = 35,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC",
+        .match        = 0x4,
+        .match_mask   = 0x4,
+        .match_maxbit = 31,
+        .match_minbit = 24,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 42,
+        .pminbit      = 35,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SVTAG */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_SVTAG",
+        .match        = 0x20,
+        .match_mask   = 0x22,
+        .match_maxbit = 31,
+        .match_minbit = 24,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 42,
+        .pminbit      = 35,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_VNTAG",
+        .match        = 0x40,
+        .match_mask   = 0xc0,
+        .match_maxbit = 31,
+        .match_minbit = 24,
+        .maxbit       = 7,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 42,
+        .pminbit      = 35,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ARP",
+        .match        = 0x1800,
+        .match_mask   = 0x3830,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x3,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1",
+        .match        = 0x80,
+        .match_mask   = 0x1c2,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2",
+        .match        = 0x408,
+        .match_mask   = 0x64c,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x2,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_BFD",
+        .match        = 0x3000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x6,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT",
+        .match        = 0x200,
+        .match_mask   = 0x642,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1",
+        .match        = 0x100,
+        .match_mask   = 0x1c0,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x2,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2",
+        .match        = 0x600,
+        .match_mask   = 0x640,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x3,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GPE",
+        .match        = 0x1830,
+        .match_mask   = 0x3870,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x3,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE",
+        .match        = 0x2,
+        .match_mask   = 0x42,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM",
+        .match        = 0x202,
+        .match_mask   = 0x642,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY",
+        .match        = 0x1000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x2,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT",
+        .match        = 0x82,
+        .match_mask   = 0x1c2,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ",
+        .match        = 0x12,
+        .match_mask   = 0x72,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ICMP",
+        .match        = 0x2000,
+        .match_mask   = 0x3830,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x4,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA",
+        .match        = 0x180,
+        .match_mask   = 0x1c0,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x3,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IGMP",
+        .match        = 0x404,
+        .match_mask   = 0x64c,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x2,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IPV4",
+        .match        = 0x4,
+        .match_mask   = 0x4c,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 3,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IPV6",
+        .match        = 0x8,
+        .match_mask   = 0x4c,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 3,
+        .minbit       = 2,
+        .value        = 0x2,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS0",
+        .match        = 0x40,
+        .match_mask   = 0x40,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 6,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS1",
+        .match        = 0x42,
+        .match_mask   = 0x42,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS2",
+        .match        = 0x44,
+        .match_mask   = 0x44,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS3",
+        .match        = 0x48,
+        .match_mask   = 0x48,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 3,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS4",
+        .match        = 0x50,
+        .match_mask   = 0x50,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 4,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS5",
+        .match        = 0x60,
+        .match_mask   = 0x60,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS6",
+        .match        = 0xc0,
+        .match_mask   = 0xc0,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 7,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH",
+        .match        = 0x140,
+        .match_mask   = 0x140,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 8,
+        .minbit       = 8,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW",
+        .match        = 0x240,
+        .match_mask   = 0x240,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 9,
+        .minbit       = 9,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x3fff,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 13,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_P_1588",
+        .match        = 0x3800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x7,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_RARP",
+        .match        = 0x800,
+        .match_mask   = 0x3830,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES",
+        .match        = 0x20,
+        .match_mask   = 0x70,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x2,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES",
+        .match        = 0x820,
+        .match_mask   = 0x3870,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UDP",
+        .match        = 0x30,
+        .match_mask   = 0x70,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x3,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3",
+        .match        = 0x10,
+        .match_mask   = 0x72,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4",
+        .match        = 0x2800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x5,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5",
+        .match        = 0x2030,
+        .match_mask   = 0x3870,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x4,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_VXLAN",
+        .match        = 0x830,
+        .match_mask   = 0x3870,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH */
+        .name         = "EGRESS_PKT_SYS_HDR_EP_NIH",
+        .match        = 0x2,
+        .match_mask   = 0x3,
+        .match_maxbit = 1,
+        .match_minbit = 0,
+        .maxbit       = 1,
+        .minbit       = 0,
+        .value        = 0x2,
+        .pmaxbit      = 1,
+        .pminbit      = 0,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK */
+        .name         = "EGRESS_PKT_SYS_HDR_LOOPBACK",
+        .match        = 0x1,
+        .match_mask   = 0x3,
+        .match_maxbit = 1,
+        .match_minbit = 0,
+        .maxbit       = 1,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 1,
+        .pminbit      = 0,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE */
+        .name         = "EGRESS_PKT_SYS_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x3,
+        .match_maxbit = 1,
+        .match_minbit = 0,
+        .maxbit       = 1,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 1,
+        .pminbit      = 0,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_ETAG",
+        .match        = 0x80,
+        .match_mask   = 0xc0,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 7,
+        .minbit       = 6,
+        .value        = 0x2,
+        .pmaxbit      = 14,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE",
+        .match        = 0x2,
+        .match_mask   = 0x2,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 14,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0 */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0",
+        .match        = 0x22,
+        .match_mask   = 0x22,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 14,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_ITAG",
+        .match        = 0x10,
+        .match_mask   = 0x10,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 4,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 14,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_L2",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 14,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0xff,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 7,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 14,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_OTAG",
+        .match        = 0x8,
+        .match_mask   = 0x8,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 3,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 14,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC",
+        .match        = 0x4,
+        .match_mask   = 0x4,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 14,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SVTAG */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_SVTAG",
+        .match        = 0x20,
+        .match_mask   = 0x22,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 14,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_VNTAG",
+        .match        = 0x40,
+        .match_mask   = 0xc0,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 7,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 14,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP",
+        .match        = 0x1800,
+        .match_mask   = 0x3830,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x3,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1",
+        .match        = 0x80,
+        .match_mask   = 0x1c2,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2",
+        .match        = 0x408,
+        .match_mask   = 0x64c,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x2,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD",
+        .match        = 0x3000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x6,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT",
+        .match        = 0x200,
+        .match_mask   = 0x642,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1",
+        .match        = 0x100,
+        .match_mask   = 0x1c0,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x2,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2",
+        .match        = 0x600,
+        .match_mask   = 0x640,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x3,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE",
+        .match        = 0x1830,
+        .match_mask   = 0x3870,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x3,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE",
+        .match        = 0x2,
+        .match_mask   = 0x42,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM",
+        .match        = 0x202,
+        .match_mask   = 0x642,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY",
+        .match        = 0x1000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x2,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT",
+        .match        = 0x82,
+        .match_mask   = 0x1c2,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ",
+        .match        = 0x12,
+        .match_mask   = 0x72,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP",
+        .match        = 0x2000,
+        .match_mask   = 0x3830,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x4,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA",
+        .match        = 0x180,
+        .match_mask   = 0x1c0,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x3,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP",
+        .match        = 0x404,
+        .match_mask   = 0x64c,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x2,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4",
+        .match        = 0x4,
+        .match_mask   = 0x4c,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 3,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6",
+        .match        = 0x8,
+        .match_mask   = 0x4c,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 3,
+        .minbit       = 2,
+        .value        = 0x2,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0",
+        .match        = 0x40,
+        .match_mask   = 0x40,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 6,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1",
+        .match        = 0x42,
+        .match_mask   = 0x42,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2",
+        .match        = 0x44,
+        .match_mask   = 0x44,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3",
+        .match        = 0x48,
+        .match_mask   = 0x48,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 3,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4",
+        .match        = 0x50,
+        .match_mask   = 0x50,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 4,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5",
+        .match        = 0x60,
+        .match_mask   = 0x60,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6",
+        .match        = 0xc0,
+        .match_mask   = 0xc0,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 7,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH",
+        .match        = 0x140,
+        .match_mask   = 0x140,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 8,
+        .minbit       = 8,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW",
+        .match        = 0x240,
+        .match_mask   = 0x240,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 9,
+        .minbit       = 9,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x3fff,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588",
+        .match        = 0x3800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x7,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP",
+        .match        = 0x800,
+        .match_mask   = 0x3830,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES",
+        .match        = 0x20,
+        .match_mask   = 0x70,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x2,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES",
+        .match        = 0x820,
+        .match_mask   = 0x3870,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP",
+        .match        = 0x30,
+        .match_mask   = 0x70,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x3,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3",
+        .match        = 0x10,
+        .match_mask   = 0x72,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4",
+        .match        = 0x2800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x5,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5",
+        .match        = 0x2030,
+        .match_mask   = 0x3870,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x4,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN",
+        .match        = 0x830,
+        .match_mask   = 0x3870,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_ETAG",
+        .match        = 0x80,
+        .match_mask   = 0xc0,
+        .match_maxbit = 31,
+        .match_minbit = 24,
+        .maxbit       = 7,
+        .minbit       = 6,
+        .value        = 0x2,
+        .pmaxbit      = 31,
+        .pminbit      = 24,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_ITAG",
+        .match        = 0x10,
+        .match_mask   = 0x10,
+        .match_maxbit = 31,
+        .match_minbit = 24,
+        .maxbit       = 4,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 31,
+        .pminbit      = 24,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_L2",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 31,
+        .match_minbit = 24,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 31,
+        .pminbit      = 24,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0xff,
+        .match_maxbit = 31,
+        .match_minbit = 24,
+        .maxbit       = 7,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 31,
+        .pminbit      = 24,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_OTAG",
+        .match        = 0x8,
+        .match_mask   = 0x8,
+        .match_maxbit = 31,
+        .match_minbit = 24,
+        .maxbit       = 3,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 31,
+        .pminbit      = 24,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC",
+        .match        = 0x4,
+        .match_mask   = 0x4,
+        .match_maxbit = 31,
+        .match_minbit = 24,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 31,
+        .pminbit      = 24,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_VNTAG",
+        .match        = 0x40,
+        .match_mask   = 0xc0,
+        .match_maxbit = 31,
+        .match_minbit = 24,
+        .maxbit       = 7,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 31,
+        .pminbit      = 24,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ARP",
+        .match        = 0x1800,
+        .match_mask   = 0x3830,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x3,
+        .pmaxbit      = 45,
+        .pminbit      = 32,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1",
+        .match        = 0x80,
+        .match_mask   = 0x1c2,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 45,
+        .pminbit      = 32,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2",
+        .match        = 0x408,
+        .match_mask   = 0x64c,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x2,
+        .pmaxbit      = 45,
+        .pminbit      = 32,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_BFD",
+        .match        = 0x3000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x6,
+        .pmaxbit      = 45,
+        .pminbit      = 32,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT",
+        .match        = 0x200,
+        .match_mask   = 0x642,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x1,
+        .pmaxbit      = 45,
+        .pminbit      = 32,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 45,
+        .pminbit      = 32,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1",
+        .match        = 0x100,
+        .match_mask   = 0x1c0,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x2,
+        .pmaxbit      = 45,
+        .pminbit      = 32,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2",
+        .match        = 0x600,
+        .match_mask   = 0x640,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x3,
+        .pmaxbit      = 45,
+        .pminbit      = 32,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ICMP",
+        .match        = 0x2000,
+        .match_mask   = 0x3830,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x4,
+        .pmaxbit      = 45,
+        .pminbit      = 32,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IGMP",
+        .match        = 0x404,
+        .match_mask   = 0x64c,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x2,
+        .pmaxbit      = 45,
+        .pminbit      = 32,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IPV4",
+        .match        = 0x4,
+        .match_mask   = 0x4c,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 3,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 45,
+        .pminbit      = 32,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IPV6",
+        .match        = 0x8,
+        .match_mask   = 0x4c,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 3,
+        .minbit       = 2,
+        .value        = 0x2,
+        .pmaxbit      = 45,
+        .pminbit      = 32,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x3fff,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 13,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 45,
+        .pminbit      = 32,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_P_1588",
+        .match        = 0x3800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x7,
+        .pmaxbit      = 45,
+        .pminbit      = 32,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_RARP",
+        .match        = 0x800,
+        .match_mask   = 0x3830,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 45,
+        .pminbit      = 32,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES",
+        .match        = 0x20,
+        .match_mask   = 0x70,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x2,
+        .pmaxbit      = 45,
+        .pminbit      = 32,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES",
+        .match        = 0x820,
+        .match_mask   = 0x3870,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 45,
+        .pminbit      = 32,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UDP",
+        .match        = 0x30,
+        .match_mask   = 0x70,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x3,
+        .pmaxbit      = 45,
+        .pminbit      = 32,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3",
+        .match        = 0x10,
+        .match_mask   = 0x72,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 45,
+        .pminbit      = 32,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4",
+        .match        = 0x2800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x5,
+        .pmaxbit      = 45,
+        .pminbit      = 32,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5",
+        .match        = 0x2030,
+        .match_mask   = 0x3870,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x4,
+        .pmaxbit      = 45,
+        .pminbit      = 32,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_ETAG",
+        .match        = 0x80,
+        .match_mask   = 0xc0,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 7,
+        .minbit       = 6,
+        .value        = 0x2,
+        .pmaxbit      = 9,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_HG3_BASE",
+        .match        = 0x2,
+        .match_mask   = 0x2,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 9,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0 */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0",
+        .match        = 0x22,
+        .match_mask   = 0x22,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 9,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_ITAG",
+        .match        = 0x10,
+        .match_mask   = 0x10,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 4,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 9,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_L2",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 9,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0xff,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 7,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 9,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_OTAG",
+        .match        = 0x8,
+        .match_mask   = 0x8,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 3,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 9,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC",
+        .match        = 0x4,
+        .match_mask   = 0x4,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 9,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SVTAG */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_SVTAG",
+        .match        = 0x20,
+        .match_mask   = 0x22,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 9,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_VNTAG",
+        .match        = 0x40,
+        .match_mask   = 0xc0,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 7,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 9,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ARP",
+        .match        = 0x1800,
+        .match_mask   = 0x3830,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x3,
+        .pmaxbit      = 23,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1",
+        .match        = 0x80,
+        .match_mask   = 0x1c2,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 23,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2",
+        .match        = 0x408,
+        .match_mask   = 0x64c,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x2,
+        .pmaxbit      = 23,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_BFD",
+        .match        = 0x3000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x6,
+        .pmaxbit      = 23,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT",
+        .match        = 0x200,
+        .match_mask   = 0x642,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x1,
+        .pmaxbit      = 23,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 23,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1",
+        .match        = 0x100,
+        .match_mask   = 0x1c0,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x2,
+        .pmaxbit      = 23,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2",
+        .match        = 0x600,
+        .match_mask   = 0x640,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x3,
+        .pmaxbit      = 23,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GPE",
+        .match        = 0x1830,
+        .match_mask   = 0x3870,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x3,
+        .pmaxbit      = 23,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE",
+        .match        = 0x2,
+        .match_mask   = 0x42,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 23,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM",
+        .match        = 0x202,
+        .match_mask   = 0x642,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x1,
+        .pmaxbit      = 23,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY",
+        .match        = 0x1000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x2,
+        .pmaxbit      = 23,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT",
+        .match        = 0x82,
+        .match_mask   = 0x1c2,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 23,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ",
+        .match        = 0x12,
+        .match_mask   = 0x72,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 23,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ICMP",
+        .match        = 0x2000,
+        .match_mask   = 0x3830,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x4,
+        .pmaxbit      = 23,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA",
+        .match        = 0x180,
+        .match_mask   = 0x1c0,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x3,
+        .pmaxbit      = 23,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IGMP",
+        .match        = 0x404,
+        .match_mask   = 0x64c,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x2,
+        .pmaxbit      = 23,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV4",
+        .match        = 0x4,
+        .match_mask   = 0x4c,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 3,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 23,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV6",
+        .match        = 0x8,
+        .match_mask   = 0x4c,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 3,
+        .minbit       = 2,
+        .value        = 0x2,
+        .pmaxbit      = 23,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0",
+        .match        = 0x40,
+        .match_mask   = 0x40,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 6,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 23,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1",
+        .match        = 0x42,
+        .match_mask   = 0x42,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 23,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2",
+        .match        = 0x44,
+        .match_mask   = 0x44,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 23,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3",
+        .match        = 0x48,
+        .match_mask   = 0x48,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 3,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 23,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4",
+        .match        = 0x50,
+        .match_mask   = 0x50,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 4,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 23,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5",
+        .match        = 0x60,
+        .match_mask   = 0x60,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 23,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6",
+        .match        = 0xc0,
+        .match_mask   = 0xc0,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 7,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 23,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH",
+        .match        = 0x140,
+        .match_mask   = 0x140,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 8,
+        .minbit       = 8,
+        .value        = 0x1,
+        .pmaxbit      = 23,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW",
+        .match        = 0x240,
+        .match_mask   = 0x240,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 9,
+        .minbit       = 9,
+        .value        = 0x1,
+        .pmaxbit      = 23,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x3fff,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 23,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_P_1588",
+        .match        = 0x3800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x7,
+        .pmaxbit      = 23,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_RARP",
+        .match        = 0x800,
+        .match_mask   = 0x3830,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 23,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES",
+        .match        = 0x20,
+        .match_mask   = 0x70,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x2,
+        .pmaxbit      = 23,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES",
+        .match        = 0x820,
+        .match_mask   = 0x3870,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 23,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UDP",
+        .match        = 0x30,
+        .match_mask   = 0x70,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x3,
+        .pmaxbit      = 23,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3",
+        .match        = 0x10,
+        .match_mask   = 0x72,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 23,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4",
+        .match        = 0x2800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x5,
+        .pmaxbit      = 23,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5",
+        .match        = 0x2030,
+        .match_mask   = 0x3870,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x4,
+        .pmaxbit      = 23,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN",
+        .match        = 0x830,
+        .match_mask   = 0x3870,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 23,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH */
+        .name         = "INGRESS_PKT_SYS_HDR_EP_NIH",
+        .match        = 0x2,
+        .match_mask   = 0x3,
+        .match_maxbit = 1,
+        .match_minbit = 0,
+        .maxbit       = 1,
+        .minbit       = 0,
+        .value        = 0x2,
+        .pmaxbit      = 1,
+        .pminbit      = 0,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK */
+        .name         = "INGRESS_PKT_SYS_HDR_LOOPBACK",
+        .match        = 0x1,
+        .match_mask   = 0x3,
+        .match_maxbit = 1,
+        .match_minbit = 0,
+        .maxbit       = 1,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 1,
+        .pminbit      = 0,
+
+    },
+    {
+        /* BCM56780_A0_DNA_2_9_5_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE */
+        .name         = "INGRESS_PKT_SYS_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x3,
+        .match_maxbit = 1,
+        .match_minbit = 0,
+        .maxbit       = 1,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 1,
+        .pminbit      = 0,
+
+    },
+};
+
+static bcmpkt_rxpmd_match_id_db_info_t bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db_info = {
+    .num_entries = 178,
+    .db = bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db
+};
+bcmpkt_rxpmd_match_id_db_info_t * bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db_info_get(void) {
+    return &bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_db_info;
+}
+
+static shr_enum_map_t bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_map[] = {
+    BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_rxpmd_match_id_map_info_t bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_map_info = {
+    .num_entries = 178,
+    .map = bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_map
+};
+
+bcmpkt_rxpmd_match_id_map_info_t * bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_map_info_get(void) {
+    return &bcm56780_a0_dna_2_9_5_0_rxpmd_match_id_map_info;
+}
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_pkt_flexhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_pkt_flexhdr.c
new file mode 100644
index 000000000..616d94ee4
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_pkt_flexhdr.c
@@ -0,0 +1,8523 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) map.yml
+ * for device bcm56780_a0 and variant dna_2_9_5_0.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#include <sal/sal_types.h>
+#include <shr/shr_error.h>
+#include <bcmpkt/bcmpkt_flexhdr.h>
+#include <bcmpkt/chip/bcm56780_a0/bcmpkt_bcm56780_a0_rxpmd.h>
+#include <bcmpkt/xfcr/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_bcmpkt_flexhdr.h>
+#include <bcmpkt/xfcr/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_bcmpkt_flexhdr_data.h>
+#include <bcmpkt/xfcr/bcm56780_a0/dna_2_9_5_0/bcm56780_a0_dna_2_9_5_0_bcmpkt_rxpmd_flex_data.h>
+
+#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1)
+#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l))
+#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s)))
+#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s)))
+
+static void bcm56780_a0_dna_2_9_5_0_rxpmd_flex_reason_decode(uint32_t *data, bcmpkt_bitmap_t *reasons)
+{
+    uint32_t *reason = data + 0;
+
+    if (reason[13] & (0x1 << 0)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU);
+    }
+    if (reason[13] & (0x1 << 1)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS);
+    }
+    if (reason[13] & (0x1 << 2)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE);
+    }
+    if (reason[13] & (0x1 << 3)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT);
+    }
+    if (reason[13] & (0x1 << 4)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST);
+    }
+    if (reason[13] & (0x1 << 5)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED);
+    }
+    if (reason[13] & (0x1 << 6)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT);
+    }
+    if (reason[13] & (0x1 << 7)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED);
+    }
+    if (reason[13] & (0x1 << 8)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED);
+    }
+    if (reason[13] & (0x1 << 9)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS);
+    }
+    if (reason[13] & (0x1 << 10)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP);
+    }
+    if (reason[13] & (0x1 << 11)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS);
+    }
+    if (reason[13] & (0x1 << 12)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP);
+    }
+    if (reason[13] & (0x1 << 13)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR);
+    }
+    if (reason[13] & (0x1 << 14)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR);
+    }
+    if (reason[13] & (0x1 << 15)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED);
+    }
+    if (reason[13] & (0x1 << 16)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL);
+    }
+    if (reason[13] & (0x1 << 17)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_VFP);
+    }
+    if (reason[13] & (0x1 << 18)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_IFP);
+    }
+    if (reason[13] & (0x1 << 19)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER);
+    }
+    if (reason[13] & (0x1 << 20)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP);
+    }
+    if (reason[13] & (0x1 << 21)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_SVP);
+    }
+    if (reason[13] & (0x1 << 22)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT);
+    }
+    if (reason[13] & (0x1 << 23)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT);
+    }
+    if (reason[13] & (0x1 << 24)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED);
+    }
+    if (reason[13] & (0x1 << 25)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED);
+    }
+    if (reason[13] & (0x1 << 26)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP);
+    }
+    if (reason[13] & (0x1 << 27)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED);
+    }
+    if (reason[13] & (0x1 << 28)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF);
+    }
+    if (reason[13] & (0x1 << 29)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED);
+    }
+    if (reason[13] & (0x1 << 30)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED);
+    }
+    if (reason[13] & (0x1 << 31)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU);
+    }
+    if (reason[12] & (0x1 << 0)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0);
+    }
+    if (reason[12] & (0x1 << 1)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1);
+    }
+    if (reason[12] & (0x1 << 2)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2);
+    }
+    if (reason[12] & (0x1 << 3)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3);
+    }
+    if (reason[12] & (0x1 << 4)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4);
+    }
+    if (reason[12] & (0x1 << 5)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5);
+    }
+    if (reason[12] & (0x1 << 6)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6);
+    }
+    if (reason[12] & (0x1 << 7)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7);
+    }
+    if (reason[12] & (0x1 << 8)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MTOP_IPV4_GATEWAY);
+    }
+    if (reason[12] & (0x1 << 9)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED);
+    }
+    if (reason[12] & (0x1 << 10)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED);
+    }
+    if (reason[12] & (0x1 << 12)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR);
+    }
+    if (reason[12] & (0x1 << 13)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU);
+    }
+    if (reason[12] & (0x1 << 15)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP);
+    }
+}
+
+static void bcm56780_a0_dna_2_9_5_0_rxpmd_flex_reason_encode(bcmpkt_bitmap_t *reasons, uint32_t *data)
+{
+    uint32_t *reason = data + 0;
+
+    reason[13] = 0;
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU)) {
+        reason[13] |= (0x1 << 0);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS)) {
+        reason[13] |= (0x1 << 1);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE)) {
+        reason[13] |= (0x1 << 2);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT)) {
+        reason[13] |= (0x1 << 3);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST)) {
+        reason[13] |= (0x1 << 4);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED)) {
+        reason[13] |= (0x1 << 5);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT)) {
+        reason[13] |= (0x1 << 6);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED)) {
+        reason[13] |= (0x1 << 7);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED)) {
+        reason[13] |= (0x1 << 8);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS)) {
+        reason[13] |= (0x1 << 9);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP)) {
+        reason[13] |= (0x1 << 10);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS)) {
+        reason[13] |= (0x1 << 11);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP)) {
+        reason[13] |= (0x1 << 12);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR)) {
+        reason[13] |= (0x1 << 13);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR)) {
+        reason[13] |= (0x1 << 14);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED)) {
+        reason[13] |= (0x1 << 15);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL)) {
+        reason[13] |= (0x1 << 16);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_VFP)) {
+        reason[13] |= (0x1 << 17);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_IFP)) {
+        reason[13] |= (0x1 << 18);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER)) {
+        reason[13] |= (0x1 << 19);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP)) {
+        reason[13] |= (0x1 << 20);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_SVP)) {
+        reason[13] |= (0x1 << 21);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT)) {
+        reason[13] |= (0x1 << 22);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT)) {
+        reason[13] |= (0x1 << 23);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED)) {
+        reason[13] |= (0x1 << 24);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED)) {
+        reason[13] |= (0x1 << 25);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP)) {
+        reason[13] |= (0x1 << 26);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED)) {
+        reason[13] |= (0x1 << 27);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF)) {
+        reason[13] |= (0x1 << 28);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED)) {
+        reason[13] |= (0x1 << 29);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED)) {
+        reason[13] |= (0x1 << 30);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU)) {
+        reason[13] |= (0x1 << 31);
+    }
+    reason[12] = 0;
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0)) {
+        reason[12] |= (0x1 << 0);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1)) {
+        reason[12] |= (0x1 << 1);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2)) {
+        reason[12] |= (0x1 << 2);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3)) {
+        reason[12] |= (0x1 << 3);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4)) {
+        reason[12] |= (0x1 << 4);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5)) {
+        reason[12] |= (0x1 << 5);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6)) {
+        reason[12] |= (0x1 << 6);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7)) {
+        reason[12] |= (0x1 << 7);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_MTOP_IPV4_GATEWAY)) {
+        reason[12] |= (0x1 << 8);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED)) {
+        reason[12] |= (0x1 << 9);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED)) {
+        reason[12] |= (0x1 << 10);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR)) {
+        reason[12] |= (0x1 << 12);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU)) {
+        reason[12] |= (0x1 << 13);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP)) {
+        reason[12] |= (0x1 << 15);
+    }
+}
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_rxpmd_flex_field_data[] = {
+    {
+        .name = "DLB_ECMP_DESTINATION_15_0",
+        .fid = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { -1, -1 }, /* Profile 2. */
+            { -1, -1 }, /* Profile 3. */
+            { -1, -1 }, /* Profile 4. */
+            { -1, -1 }, /* Profile 5. */
+            { -1, -1 }, /* Profile 6. */
+            { -1, -1 }, /* Profile 7. */
+            { 240, 255 }, /* Profile 8. */
+            { 224, 239 }, /* Profile 9. */
+            { 240, 255 }, /* Profile 10. */
+            { 224, 239 }, /* Profile 11. */
+            { 240, 255 }, /* Profile 12. */
+            { 224, 239 }, /* Profile 13. */
+        },
+        .profile_cnt = 14,
+    },
+    {
+        .name = "DROP_CODE_15_0",
+        .fid = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 48, 63 }, /* Profile 2. */
+            { 48, 63 }, /* Profile 3. */
+            { -1, -1 }, /* Profile 4. */
+            { -1, -1 }, /* Profile 5. */
+            { 48, 63 }, /* Profile 6. */
+            { 48, 63 }, /* Profile 7. */
+            { 48, 63 }, /* Profile 8. */
+            { 48, 63 }, /* Profile 9. */
+            { -1, -1 }, /* Profile 10. */
+            { -1, -1 }, /* Profile 11. */
+            { 48, 63 }, /* Profile 12. */
+            { 48, 63 }, /* Profile 13. */
+        },
+        .profile_cnt = 14,
+    },
+    {
+        .name = "DVP_15_0",
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+            { 432, 435 }, /* Profile 11. */
+            { 432, 435 }, /* Profile 12. */
+            { 432, 435 }, /* Profile 13. */
+        },
+        .profile_cnt = 14,
+    },
+    {
+        .name = "NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0",
+        .fid = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 176, 191 }, /* Profile 2. */
+            { 176, 191 }, /* Profile 3. */
+            { 176, 191 }, /* Profile 4. */
+            { 176, 191 }, /* Profile 5. */
+            { 176, 191 }, /* Profile 6. */
+            { 176, 191 }, /* Profile 7. */
+            { 176, 191 }, /* Profile 8. */
+            { 176, 191 }, /* Profile 9. */
+            { 176, 191 }, /* Profile 10. */
+            { 176, 191 }, /* Profile 11. */
+            { 176, 191 }, /* Profile 12. */
+            { 176, 191 }, /* Profile 13. */
+        },
+        .profile_cnt = 14,
+    },
+    {
+        .name = "NHOP_INDEX_1_15_0",
+        .fid = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 128, 143 }, /* Profile 2. */
+            { 128, 143 }, /* Profile 3. */
+            { 128, 143 }, /* Profile 4. */
+            { 128, 143 }, /* Profile 5. */
+            { 128, 143 }, /* Profile 6. */
+            { 128, 143 }, /* Profile 7. */
+            { 128, 143 }, /* Profile 8. */
+            { 128, 143 }, /* Profile 9. */
+            { 128, 143 }, /* Profile 10. */
+            { 128, 143 }, /* Profile 11. */
+            { 128, 143 }, /* Profile 12. */
+            { 128, 143 }, /* Profile 13. */
+        },
+        .profile_cnt = 14,
+    },
+    {
+        .name = "PARSER_VHLEN_0_15_0",
+        .fid = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 64, 79 }, /* Profile 2. */
+            { 64, 79 }, /* Profile 3. */
+            { 64, 79 }, /* Profile 4. */
+            { 64, 79 }, /* Profile 5. */
+            { 64, 79 }, /* Profile 6. */
+            { 64, 79 }, /* Profile 7. */
+            { 64, 79 }, /* Profile 8. */
+            { 64, 79 }, /* Profile 9. */
+            { 64, 79 }, /* Profile 10. */
+            { 64, 79 }, /* Profile 11. */
+            { 64, 79 }, /* Profile 12. */
+            { 64, 79 }, /* Profile 13. */
+        },
+        .profile_cnt = 14,
+    },
+    {
+        .name = "PKT_MISC_CTRL_0_3_0",
+        .fid = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 428, 431 }, /* Profile 2. */
+            { 428, 431 }, /* Profile 3. */
+            { 428, 431 }, /* Profile 4. */
+            { 428, 431 }, /* Profile 5. */
+            { 428, 431 }, /* Profile 6. */
+            { 428, 431 }, /* Profile 7. */
+            { 428, 431 }, /* Profile 8. */
+            { 428, 431 }, /* Profile 9. */
+            { 428, 431 }, /* Profile 10. */
+            { 428, 431 }, /* Profile 11. */
+            { 428, 431 }, /* Profile 12. */
+            { 428, 431 }, /* Profile 13. */
+        },
+        .profile_cnt = 14,
+    },
+    {
+        .name = "SVP_15_0",
+        .fid = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_SVP_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 96, 111 }, /* Profile 2. */
+            { 96, 111 }, /* Profile 3. */
+            { 96, 111 }, /* Profile 4. */
+            { 96, 111 }, /* Profile 5. */
+            { 96, 111 }, /* Profile 6. */
+            { 96, 111 }, /* Profile 7. */
+            { 96, 111 }, /* Profile 8. */
+            { 96, 111 }, /* Profile 9. */
+            { 96, 111 }, /* Profile 10. */
+            { 96, 111 }, /* Profile 11. */
+            { 96, 111 }, /* Profile 12. */
+            { 96, 111 }, /* Profile 13. */
+        },
+        .profile_cnt = 14,
+    },
+    {
+        .name = "SVP_NETWORK_GROUP_BITMAP_3_0",
+        .fid = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 408, 411 }, /* Profile 2. */
+            { 408, 411 }, /* Profile 3. */
+            { 408, 411 }, /* Profile 4. */
+            { 408, 411 }, /* Profile 5. */
+            { 408, 411 }, /* Profile 6. */
+            { 408, 411 }, /* Profile 7. */
+            { 408, 411 }, /* Profile 8. */
+            { 408, 411 }, /* Profile 9. */
+            { 408, 411 }, /* Profile 10. */
+            { 408, 411 }, /* Profile 11. */
+            { 408, 411 }, /* Profile 12. */
+            { 408, 411 }, /* Profile 13. */
+        },
+        .profile_cnt = 14,
+    },
+    {
+        .name = "SYSTEM_DESTINATION_15_0",
+        .fid = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 160, 175 }, /* Profile 2. */
+            { 160, 175 }, /* Profile 3. */
+            { 160, 175 }, /* Profile 4. */
+            { 160, 175 }, /* Profile 5. */
+            { 160, 175 }, /* Profile 6. */
+            { 160, 175 }, /* Profile 7. */
+            { 160, 175 }, /* Profile 8. */
+            { 160, 175 }, /* Profile 9. */
+            { 160, 175 }, /* Profile 10. */
+            { 160, 175 }, /* Profile 11. */
+            { 160, 175 }, /* Profile 12. */
+            { 160, 175 }, /* Profile 13. */
+        },
+        .profile_cnt = 14,
+    },
+    {
+        .name = "SYSTEM_OPCODE_3_0",
+        .fid = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 424, 427 }, /* Profile 2. */
+            { 424, 427 }, /* Profile 3. */
+            { 424, 427 }, /* Profile 4. */
+            { 424, 427 }, /* Profile 5. */
+            { 424, 427 }, /* Profile 6. */
+            { 424, 427 }, /* Profile 7. */
+            { 424, 427 }, /* Profile 8. */
+            { 424, 427 }, /* Profile 9. */
+            { 424, 427 }, /* Profile 10. */
+            { 424, 427 }, /* Profile 11. */
+            { 424, 427 }, /* Profile 12. */
+            { 424, 427 }, /* Profile 13. */
+        },
+        .profile_cnt = 14,
+    },
+    {
+        .name = "SYSTEM_SOURCE_15_0",
+        .fid = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 144, 159 }, /* Profile 2. */
+            { 144, 159 }, /* Profile 3. */
+            { 144, 159 }, /* Profile 4. */
+            { 144, 159 }, /* Profile 5. */
+            { 144, 159 }, /* Profile 6. */
+            { 144, 159 }, /* Profile 7. */
+            { 144, 159 }, /* Profile 8. */
+            { 144, 159 }, /* Profile 9. */
+            { 144, 159 }, /* Profile 10. */
+            { 144, 159 }, /* Profile 11. */
+            { 144, 159 }, /* Profile 12. */
+            { 144, 159 }, /* Profile 13. */
+        },
+        .profile_cnt = 14,
+    },
+    {
+        .name = "TIMESTAMP_CTRL_3_0",
+        .fid = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 420, 423 }, /* Profile 2. */
+            { 420, 423 }, /* Profile 3. */
+            { 420, 423 }, /* Profile 4. */
+            { 420, 423 }, /* Profile 5. */
+            { 420, 423 }, /* Profile 6. */
+            { 420, 423 }, /* Profile 7. */
+            { 420, 423 }, /* Profile 8. */
+            { 420, 423 }, /* Profile 9. */
+            { 420, 423 }, /* Profile 10. */
+            { 420, 423 }, /* Profile 11. */
+            { 420, 423 }, /* Profile 12. */
+            { 420, 423 }, /* Profile 13. */
+        },
+        .profile_cnt = 14,
+    },
+    {
+        .name = "TUNNEL_PROCESSING_RESULTS_1_3_0",
+        .fid = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 400, 403 }, /* Profile 2. */
+            { 400, 403 }, /* Profile 3. */
+            { 400, 403 }, /* Profile 4. */
+            { 400, 403 }, /* Profile 5. */
+            { 400, 403 }, /* Profile 6. */
+            { 400, 403 }, /* Profile 7. */
+            { 400, 403 }, /* Profile 8. */
+            { 400, 403 }, /* Profile 9. */
+            { 400, 403 }, /* Profile 10. */
+            { 400, 403 }, /* Profile 11. */
+            { 400, 403 }, /* Profile 12. */
+            { 400, 403 }, /* Profile 13. */
+        },
+        .profile_cnt = 14,
+    },
+    {
+        .name = "VFI_15_0",
+        .fid = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_VFI_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 336, 351 }, /* Profile 2. */
+            { 320, 335 }, /* Profile 3. */
+            { 336, 351 }, /* Profile 4. */
+            { 320, 335 }, /* Profile 5. */
+            { 336, 351 }, /* Profile 6. */
+            { 320, 335 }, /* Profile 7. */
+            { 336, 351 }, /* Profile 8. */
+            { 320, 335 }, /* Profile 9. */
+            { 336, 351 }, /* Profile 10. */
+            { 320, 335 }, /* Profile 11. */
+            { 336, 351 }, /* Profile 12. */
+            { 320, 335 }, /* Profile 13. */
+        },
+        .profile_cnt = 14,
+    },
+    {
+        .name = "VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_1_0",
+        .fid = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_1_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 404, 405 }, /* Profile 2. */
+            { 404, 405 }, /* Profile 3. */
+            { 404, 405 }, /* Profile 4. */
+            { 404, 405 }, /* Profile 5. */
+            { 404, 405 }, /* Profile 6. */
+            { 404, 405 }, /* Profile 7. */
+            { 404, 405 }, /* Profile 8. */
+            { 404, 405 }, /* Profile 9. */
+            { 404, 405 }, /* Profile 10. */
+            { 404, 405 }, /* Profile 11. */
+            { 404, 405 }, /* Profile 12. */
+            { 404, 405 }, /* Profile 13. */
+        },
+        .profile_cnt = 14,
+    },
+};static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_rxpmd_flex_field_info = {
+    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_FID_COUNT,
+    .info = bcm56780_a0_dna_2_9_5_0_rxpmd_flex_field_data,
+};
+
+static shr_enum_map_t bcm56780_a0_dna_2_9_5_0_rxpmd_flex_reason_names[] = {
+    BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_reasons_info_t bcm56780_a0_dna_2_9_5_0_rxpmd_flex_reasons_info = {
+    .num_reasons = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RXPMD_FLEX_REASON_COUNT,
+    .reason_names = bcm56780_a0_dna_2_9_5_0_rxpmd_flex_reason_names,
+    .reason_encode = bcm56780_a0_dna_2_9_5_0_rxpmd_flex_reason_encode,
+    .reason_decode = bcm56780_a0_dna_2_9_5_0_rxpmd_flex_reason_decode,
+};
+
+
+static int32_t bcmpkt_arp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_operation_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_operation_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_arp_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_ARP_T_FID_COUNT] = {
+    bcmpkt_arp_t_hardware_len_get,
+    bcmpkt_arp_t_hardware_type_get,
+    bcmpkt_arp_t_operation_get,
+    bcmpkt_arp_t_prot_addr_len_get,
+    bcmpkt_arp_t_protocol_type_get,
+    bcmpkt_arp_t_sender_ha_get,
+    bcmpkt_arp_t_sender_ip_get,
+    bcmpkt_arp_t_target_ha_get,
+    bcmpkt_arp_t_target_ip_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_arp_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_ARP_T_FID_COUNT] = {
+    bcmpkt_arp_t_hardware_len_set,
+    bcmpkt_arp_t_hardware_type_set,
+    bcmpkt_arp_t_operation_set,
+    bcmpkt_arp_t_prot_addr_len_set,
+    bcmpkt_arp_t_protocol_type_set,
+    bcmpkt_arp_t_sender_ha_set,
+    bcmpkt_arp_t_sender_ip_set,
+    bcmpkt_arp_t_target_ha_set,
+    bcmpkt_arp_t_target_ip_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_arp_t_field_data[] = {
+    BCM56780_A0_DNA_2_9_5_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_arp_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_ARP_T_FID_COUNT,
+    .info = bcm56780_a0_dna_2_9_5_0_arp_t_field_data,
+};
+
+
+static int32_t bcmpkt_authen_t_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_payload_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_payload_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_spi_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_spi_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_authen_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_AUTHEN_T_FID_COUNT] = {
+    bcmpkt_authen_t_data_get,
+    bcmpkt_authen_t_next_header_get,
+    bcmpkt_authen_t_payload_len_get,
+    bcmpkt_authen_t_reserved_get,
+    bcmpkt_authen_t_seq_num_get,
+    bcmpkt_authen_t_spi_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_authen_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_AUTHEN_T_FID_COUNT] = {
+    bcmpkt_authen_t_data_set,
+    bcmpkt_authen_t_next_header_set,
+    bcmpkt_authen_t_payload_len_set,
+    bcmpkt_authen_t_reserved_set,
+    bcmpkt_authen_t_seq_num_set,
+    bcmpkt_authen_t_spi_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_authen_t_field_data[] = {
+    BCM56780_A0_DNA_2_9_5_0_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_authen_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_AUTHEN_T_FID_COUNT,
+    .info = bcm56780_a0_dna_2_9_5_0_authen_t_field_data,
+};
+
+
+static int32_t bcmpkt_bfd_t_desmintxintv_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_desmintxintv_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_minechorxintv_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_minechorxintv_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_reqminrxintv_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_reqminrxintv_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_ap_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 18, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_ap_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 18, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_bfd_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_bfd_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_cpi_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 19, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_cpi_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 19, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_dem_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 17, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_dem_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 17, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_detectmult_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_detectmult_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_diag_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 5);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_diag_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 5, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_fin_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 20, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_fin_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 20, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_mpt_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_mpt_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_mydiscrim_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_mydiscrim_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_poll_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 21, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_poll_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 21, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_sta_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 22, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_sta_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 22, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_urdiscrim_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_urdiscrim_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 29, 3);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 29, 3, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_bfd_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_FID_COUNT] = {
+    bcmpkt_bfd_t_ap_get,
+    bcmpkt_bfd_t_bfd_length_get,
+    bcmpkt_bfd_t_cpi_get,
+    bcmpkt_bfd_t_dem_get,
+    bcmpkt_bfd_t_desmintxintv_get,
+    bcmpkt_bfd_t_detectmult_get,
+    bcmpkt_bfd_t_diag_get,
+    bcmpkt_bfd_t_fin_get,
+    bcmpkt_bfd_t_minechorxintv_get,
+    bcmpkt_bfd_t_mpt_get,
+    bcmpkt_bfd_t_mydiscrim_get,
+    bcmpkt_bfd_t_poll_get,
+    bcmpkt_bfd_t_reqminrxintv_get,
+    bcmpkt_bfd_t_sta_get,
+    bcmpkt_bfd_t_urdiscrim_get,
+    bcmpkt_bfd_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_bfd_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_FID_COUNT] = {
+    bcmpkt_bfd_t_ap_set,
+    bcmpkt_bfd_t_bfd_length_set,
+    bcmpkt_bfd_t_cpi_set,
+    bcmpkt_bfd_t_dem_set,
+    bcmpkt_bfd_t_desmintxintv_set,
+    bcmpkt_bfd_t_detectmult_set,
+    bcmpkt_bfd_t_diag_set,
+    bcmpkt_bfd_t_fin_set,
+    bcmpkt_bfd_t_minechorxintv_set,
+    bcmpkt_bfd_t_mpt_set,
+    bcmpkt_bfd_t_mydiscrim_set,
+    bcmpkt_bfd_t_poll_set,
+    bcmpkt_bfd_t_reqminrxintv_set,
+    bcmpkt_bfd_t_sta_set,
+    bcmpkt_bfd_t_urdiscrim_set,
+    bcmpkt_bfd_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_bfd_t_field_data[] = {
+    BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_bfd_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_BFD_T_FID_COUNT,
+    .info = bcm56780_a0_dna_2_9_5_0_bfd_t_field_data,
+};
+
+
+static int32_t bcmpkt_cntag_t_rpid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_cntag_t_rpid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_cntag_t_tpid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_cntag_t_tpid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_cntag_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_CNTAG_T_FID_COUNT] = {
+    bcmpkt_cntag_t_rpid_get,
+    bcmpkt_cntag_t_tpid_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_cntag_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_CNTAG_T_FID_COUNT] = {
+    bcmpkt_cntag_t_rpid_set,
+    bcmpkt_cntag_t_tpid_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_cntag_t_field_data[] = {
+    BCM56780_A0_DNA_2_9_5_0_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_cntag_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_CNTAG_T_FID_COUNT,
+    .info = bcm56780_a0_dna_2_9_5_0_cntag_t_field_data,
+};
+
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_cpu_composites_0_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = {
+    bcmpkt_cpu_composites_0_t_dma_cont0_get,
+    bcmpkt_cpu_composites_0_t_dma_cont1_get,
+    bcmpkt_cpu_composites_0_t_dma_cont2_get,
+    bcmpkt_cpu_composites_0_t_dma_cont3_get,
+    bcmpkt_cpu_composites_0_t_dma_cont4_get,
+    bcmpkt_cpu_composites_0_t_dma_cont5_get,
+    bcmpkt_cpu_composites_0_t_dma_cont6_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_cpu_composites_0_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = {
+    bcmpkt_cpu_composites_0_t_dma_cont0_set,
+    bcmpkt_cpu_composites_0_t_dma_cont1_set,
+    bcmpkt_cpu_composites_0_t_dma_cont2_set,
+    bcmpkt_cpu_composites_0_t_dma_cont3_set,
+    bcmpkt_cpu_composites_0_t_dma_cont4_set,
+    bcmpkt_cpu_composites_0_t_dma_cont5_set,
+    bcmpkt_cpu_composites_0_t_dma_cont6_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_cpu_composites_0_t_field_data[] = {
+    BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_cpu_composites_0_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT,
+    .info = bcm56780_a0_dna_2_9_5_0_cpu_composites_0_t_field_data,
+};
+
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_cpu_composites_1_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = {
+    bcmpkt_cpu_composites_1_t_dma_cont10_get,
+    bcmpkt_cpu_composites_1_t_dma_cont11_get,
+    bcmpkt_cpu_composites_1_t_dma_cont12_get,
+    bcmpkt_cpu_composites_1_t_dma_cont13_get,
+    bcmpkt_cpu_composites_1_t_dma_cont14_get,
+    bcmpkt_cpu_composites_1_t_dma_cont15_get,
+    bcmpkt_cpu_composites_1_t_dma_cont16_get,
+    bcmpkt_cpu_composites_1_t_dma_cont17_get,
+    bcmpkt_cpu_composites_1_t_dma_cont7_get,
+    bcmpkt_cpu_composites_1_t_dma_cont8_get,
+    bcmpkt_cpu_composites_1_t_dma_cont9_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_cpu_composites_1_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = {
+    bcmpkt_cpu_composites_1_t_dma_cont10_set,
+    bcmpkt_cpu_composites_1_t_dma_cont11_set,
+    bcmpkt_cpu_composites_1_t_dma_cont12_set,
+    bcmpkt_cpu_composites_1_t_dma_cont13_set,
+    bcmpkt_cpu_composites_1_t_dma_cont14_set,
+    bcmpkt_cpu_composites_1_t_dma_cont15_set,
+    bcmpkt_cpu_composites_1_t_dma_cont16_set,
+    bcmpkt_cpu_composites_1_t_dma_cont17_set,
+    bcmpkt_cpu_composites_1_t_dma_cont7_set,
+    bcmpkt_cpu_composites_1_t_dma_cont8_set,
+    bcmpkt_cpu_composites_1_t_dma_cont9_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_cpu_composites_1_t_field_data[] = {
+    BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_cpu_composites_1_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT,
+    .info = bcm56780_a0_dna_2_9_5_0_cpu_composites_1_t_field_data,
+};
+
+
+static int32_t bcmpkt_dest_option_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_dest_option_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_dest_option_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_dest_option_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_dest_option_t_option_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_dest_option_t_option_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_dest_option_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_DEST_OPTION_T_FID_COUNT] = {
+    bcmpkt_dest_option_t_hdr_ext_len_get,
+    bcmpkt_dest_option_t_next_header_get,
+    bcmpkt_dest_option_t_option_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_dest_option_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_DEST_OPTION_T_FID_COUNT] = {
+    bcmpkt_dest_option_t_hdr_ext_len_set,
+    bcmpkt_dest_option_t_next_header_set,
+    bcmpkt_dest_option_t_option_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_dest_option_t_field_data[] = {
+    BCM56780_A0_DNA_2_9_5_0_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_dest_option_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_DEST_OPTION_T_FID_COUNT,
+    .info = bcm56780_a0_dna_2_9_5_0_dest_option_t_field_data,
+};
+
+
+static int32_t bcmpkt_ep_nih_header_t_header_subtype_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 20, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_header_subtype_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 20, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_header_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 6);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_header_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 6, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_a_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_a_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_b_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 20, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_b_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 20, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_c_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_c_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_object_a_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_object_a_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_object_b_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_object_b_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_object_c_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_object_c_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_recirc_profile_index_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_recirc_profile_index_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 12, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 12, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_start_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 30, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_start_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 30, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_timestamp_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_ep_nih_header_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = {
+    bcmpkt_ep_nih_header_t_header_subtype_get,
+    bcmpkt_ep_nih_header_t_header_type_get,
+    bcmpkt_ep_nih_header_t_opaque_ctrl_a_get,
+    bcmpkt_ep_nih_header_t_opaque_ctrl_b_get,
+    bcmpkt_ep_nih_header_t_opaque_ctrl_c_get,
+    bcmpkt_ep_nih_header_t_opaque_object_a_get,
+    bcmpkt_ep_nih_header_t_opaque_object_b_get,
+    bcmpkt_ep_nih_header_t_opaque_object_c_get,
+    bcmpkt_ep_nih_header_t_recirc_profile_index_get,
+    bcmpkt_ep_nih_header_t_reserved_0_get,
+    bcmpkt_ep_nih_header_t_start_get,
+    bcmpkt_ep_nih_header_t_timestamp_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_ep_nih_header_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = {
+    bcmpkt_ep_nih_header_t_header_subtype_set,
+    bcmpkt_ep_nih_header_t_header_type_set,
+    bcmpkt_ep_nih_header_t_opaque_ctrl_a_set,
+    bcmpkt_ep_nih_header_t_opaque_ctrl_b_set,
+    bcmpkt_ep_nih_header_t_opaque_ctrl_c_set,
+    bcmpkt_ep_nih_header_t_opaque_object_a_set,
+    bcmpkt_ep_nih_header_t_opaque_object_b_set,
+    bcmpkt_ep_nih_header_t_opaque_object_c_set,
+    bcmpkt_ep_nih_header_t_recirc_profile_index_set,
+    bcmpkt_ep_nih_header_t_reserved_0_set,
+    bcmpkt_ep_nih_header_t_start_set,
+    bcmpkt_ep_nih_header_t_timestamp_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_ep_nih_header_t_field_data[] = {
+    BCM56780_A0_DNA_2_9_5_0_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_ep_nih_header_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT,
+    .info = bcm56780_a0_dna_2_9_5_0_ep_nih_header_t_field_data,
+};
+
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 11, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 11, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 13, 3);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 13, 3, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 10);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 10, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_t_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 10, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_t_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 10, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 12);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 12, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_erspan3_fixed_hdr_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = {
+    bcmpkt_erspan3_fixed_hdr_t_bso_get,
+    bcmpkt_erspan3_fixed_hdr_t_cos_get,
+    bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get,
+    bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get,
+    bcmpkt_erspan3_fixed_hdr_t_session_id_get,
+    bcmpkt_erspan3_fixed_hdr_t_t_get,
+    bcmpkt_erspan3_fixed_hdr_t_timestamp_get,
+    bcmpkt_erspan3_fixed_hdr_t_ver_get,
+    bcmpkt_erspan3_fixed_hdr_t_vlan_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_erspan3_fixed_hdr_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = {
+    bcmpkt_erspan3_fixed_hdr_t_bso_set,
+    bcmpkt_erspan3_fixed_hdr_t_cos_set,
+    bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set,
+    bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set,
+    bcmpkt_erspan3_fixed_hdr_t_session_id_set,
+    bcmpkt_erspan3_fixed_hdr_t_t_set,
+    bcmpkt_erspan3_fixed_hdr_t_timestamp_set,
+    bcmpkt_erspan3_fixed_hdr_t_ver_set,
+    bcmpkt_erspan3_fixed_hdr_t_vlan_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_erspan3_fixed_hdr_t_field_data[] = {
+    BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_erspan3_fixed_hdr_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT,
+    .info = bcm56780_a0_dna_2_9_5_0_erspan3_fixed_hdr_t_field_data,
+};
+
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 26, 6);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 26, 6, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 10);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 10, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_erspan3_subhdr_5_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = {
+    bcmpkt_erspan3_subhdr_5_t_platform_id_get,
+    bcmpkt_erspan3_subhdr_5_t_port_id_get,
+    bcmpkt_erspan3_subhdr_5_t_switch_id_get,
+    bcmpkt_erspan3_subhdr_5_t_timestamp_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_erspan3_subhdr_5_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = {
+    bcmpkt_erspan3_subhdr_5_t_platform_id_set,
+    bcmpkt_erspan3_subhdr_5_t_port_id_set,
+    bcmpkt_erspan3_subhdr_5_t_switch_id_set,
+    bcmpkt_erspan3_subhdr_5_t_timestamp_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_erspan3_subhdr_5_t_field_data[] = {
+    BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_erspan3_subhdr_5_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT,
+    .info = bcm56780_a0_dna_2_9_5_0_erspan3_subhdr_5_t_field_data,
+};
+
+
+static int32_t bcmpkt_esp_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_pad_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 8, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_pad_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 8, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_pad_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_pad_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_spi_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_spi_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_esp_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_ESP_T_FID_COUNT] = {
+    bcmpkt_esp_t_next_header_get,
+    bcmpkt_esp_t_pad_get,
+    bcmpkt_esp_t_pad_len_get,
+    bcmpkt_esp_t_seq_num_get,
+    bcmpkt_esp_t_spi_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_esp_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_ESP_T_FID_COUNT] = {
+    bcmpkt_esp_t_next_header_set,
+    bcmpkt_esp_t_pad_set,
+    bcmpkt_esp_t_pad_len_set,
+    bcmpkt_esp_t_seq_num_set,
+    bcmpkt_esp_t_spi_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_esp_t_field_data[] = {
+    BCM56780_A0_DNA_2_9_5_0_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_esp_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_ESP_T_FID_COUNT,
+    .info = bcm56780_a0_dna_2_9_5_0_esp_t_field_data,
+};
+
+
+static int32_t bcmpkt_etag_t_tag_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_etag_t_tag_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_etag_t_tpid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_etag_t_tpid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_etag_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_ETAG_T_FID_COUNT] = {
+    bcmpkt_etag_t_tag_get,
+    bcmpkt_etag_t_tpid_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_etag_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_ETAG_T_FID_COUNT] = {
+    bcmpkt_etag_t_tag_set,
+    bcmpkt_etag_t_tpid_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_etag_t_field_data[] = {
+    BCM56780_A0_DNA_2_9_5_0_BCMPKT_ETAG_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_etag_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_ETAG_T_FID_COUNT,
+    .info = bcm56780_a0_dna_2_9_5_0_etag_t_field_data,
+};
+
+
+static int32_t bcmpkt_ethertype_t_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ethertype_t_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_ethertype_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = {
+    bcmpkt_ethertype_t_type_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_ethertype_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = {
+    bcmpkt_ethertype_t_type_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_ethertype_t_field_data[] = {
+    BCM56780_A0_DNA_2_9_5_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_ethertype_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_ETHERTYPE_T_FID_COUNT,
+    .info = bcm56780_a0_dna_2_9_5_0_ethertype_t_field_data,
+};
+
+
+static int32_t bcmpkt_frag_t_frag_info_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_frag_t_frag_info_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_frag_t_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_frag_t_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_frag_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_frag_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_frag_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_frag_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_frag_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_FRAG_T_FID_COUNT] = {
+    bcmpkt_frag_t_frag_info_get,
+    bcmpkt_frag_t_id_get,
+    bcmpkt_frag_t_next_header_get,
+    bcmpkt_frag_t_reserved_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_frag_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_FRAG_T_FID_COUNT] = {
+    bcmpkt_frag_t_frag_info_set,
+    bcmpkt_frag_t_id_set,
+    bcmpkt_frag_t_next_header_set,
+    bcmpkt_frag_t_reserved_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_frag_t_field_data[] = {
+    BCM56780_A0_DNA_2_9_5_0_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_frag_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_FRAG_T_FID_COUNT,
+    .info = bcm56780_a0_dna_2_9_5_0_frag_t_field_data,
+};
+
+
+static int32_t bcmpkt_generic_loopback_t_destination_obj_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_destination_obj_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_destination_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_destination_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_entropy_obj_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_entropy_obj_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_header_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 20, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_header_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 20, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_input_priority_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 12, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_input_priority_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 12, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_interface_ctrl_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 4, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_interface_ctrl_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 4, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_interface_obj_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_interface_obj_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_qos_obj_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_qos_obj_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_reserved_1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_reserved_1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_reserved_2_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_reserved_2_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_source_system_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_source_system_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_start_byte_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_start_byte_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_generic_loopback_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = {
+    bcmpkt_generic_loopback_t_destination_obj_get,
+    bcmpkt_generic_loopback_t_destination_type_get,
+    bcmpkt_generic_loopback_t_entropy_obj_get,
+    bcmpkt_generic_loopback_t_flags_get,
+    bcmpkt_generic_loopback_t_header_type_get,
+    bcmpkt_generic_loopback_t_input_priority_get,
+    bcmpkt_generic_loopback_t_interface_ctrl_get,
+    bcmpkt_generic_loopback_t_interface_obj_get,
+    bcmpkt_generic_loopback_t_processing_ctrl_0_get,
+    bcmpkt_generic_loopback_t_processing_ctrl_1_get,
+    bcmpkt_generic_loopback_t_qos_obj_get,
+    bcmpkt_generic_loopback_t_reserved_1_get,
+    bcmpkt_generic_loopback_t_reserved_2_get,
+    bcmpkt_generic_loopback_t_source_system_port_get,
+    bcmpkt_generic_loopback_t_start_byte_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_generic_loopback_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = {
+    bcmpkt_generic_loopback_t_destination_obj_set,
+    bcmpkt_generic_loopback_t_destination_type_set,
+    bcmpkt_generic_loopback_t_entropy_obj_set,
+    bcmpkt_generic_loopback_t_flags_set,
+    bcmpkt_generic_loopback_t_header_type_set,
+    bcmpkt_generic_loopback_t_input_priority_set,
+    bcmpkt_generic_loopback_t_interface_ctrl_set,
+    bcmpkt_generic_loopback_t_interface_obj_set,
+    bcmpkt_generic_loopback_t_processing_ctrl_0_set,
+    bcmpkt_generic_loopback_t_processing_ctrl_1_set,
+    bcmpkt_generic_loopback_t_qos_obj_set,
+    bcmpkt_generic_loopback_t_reserved_1_set,
+    bcmpkt_generic_loopback_t_reserved_2_set,
+    bcmpkt_generic_loopback_t_source_system_port_set,
+    bcmpkt_generic_loopback_t_start_byte_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_generic_loopback_t_field_data[] = {
+    BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_generic_loopback_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT,
+    .info = bcm56780_a0_dna_2_9_5_0_generic_loopback_t_field_data,
+};
+
+
+static int32_t bcmpkt_gpe_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_next_protocol_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_next_protocol_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_reserved0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_reserved0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_reserved1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_reserved1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_vni_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 8, 24);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_vni_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 8, 24, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_gpe_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_GPE_T_FID_COUNT] = {
+    bcmpkt_gpe_t_flags_get,
+    bcmpkt_gpe_t_next_protocol_get,
+    bcmpkt_gpe_t_reserved0_get,
+    bcmpkt_gpe_t_reserved1_get,
+    bcmpkt_gpe_t_vni_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_gpe_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_GPE_T_FID_COUNT] = {
+    bcmpkt_gpe_t_flags_set,
+    bcmpkt_gpe_t_next_protocol_set,
+    bcmpkt_gpe_t_reserved0_set,
+    bcmpkt_gpe_t_reserved1_set,
+    bcmpkt_gpe_t_vni_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_gpe_t_field_data[] = {
+    BCM56780_A0_DNA_2_9_5_0_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_gpe_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_GPE_T_FID_COUNT,
+    .info = bcm56780_a0_dna_2_9_5_0_gpe_t_field_data,
+};
+
+
+static int32_t bcmpkt_gre_chksum_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_chksum_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gre_chksum_t_offset_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_chksum_t_offset_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_gre_chksum_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = {
+    bcmpkt_gre_chksum_t_checksum_get,
+    bcmpkt_gre_chksum_t_offset_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_gre_chksum_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = {
+    bcmpkt_gre_chksum_t_checksum_set,
+    bcmpkt_gre_chksum_t_offset_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_gre_chksum_t_field_data[] = {
+    BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_gre_chksum_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT,
+    .info = bcm56780_a0_dna_2_9_5_0_gre_chksum_t_field_data,
+};
+
+
+static int32_t bcmpkt_gre_key_t_key_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_key_t_key_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_gre_key_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_KEY_T_FID_COUNT] = {
+    bcmpkt_gre_key_t_key_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_gre_key_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_KEY_T_FID_COUNT] = {
+    bcmpkt_gre_key_t_key_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_gre_key_t_field_data[] = {
+    BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_gre_key_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_KEY_T_FID_COUNT,
+    .info = bcm56780_a0_dna_2_9_5_0_gre_key_t_field_data,
+};
+
+
+static int32_t bcmpkt_gre_rout_t_routing_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_rout_t_routing_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_gre_rout_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_ROUT_T_FID_COUNT] = {
+    bcmpkt_gre_rout_t_routing_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_gre_rout_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_ROUT_T_FID_COUNT] = {
+    bcmpkt_gre_rout_t_routing_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_gre_rout_t_field_data[] = {
+    BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_gre_rout_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_ROUT_T_FID_COUNT,
+    .info = bcm56780_a0_dna_2_9_5_0_gre_rout_t_field_data,
+};
+
+
+static int32_t bcmpkt_gre_seq_t_sequence_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_seq_t_sequence_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_gre_seq_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_SEQ_T_FID_COUNT] = {
+    bcmpkt_gre_seq_t_sequence_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_gre_seq_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_SEQ_T_FID_COUNT] = {
+    bcmpkt_gre_seq_t_sequence_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_gre_seq_t_field_data[] = {
+    BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_gre_seq_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_SEQ_T_FID_COUNT,
+    .info = bcm56780_a0_dna_2_9_5_0_gre_seq_t_field_data,
+};
+
+
+static int32_t bcmpkt_gre_t_c_r_k_s_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_t_c_r_k_s_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gre_t_protocol_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_t_protocol_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gre_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 19, 9);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 19, 9, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gre_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 3);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 3, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_gre_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_T_FID_COUNT] = {
+    bcmpkt_gre_t_c_r_k_s_get,
+    bcmpkt_gre_t_protocol_get,
+    bcmpkt_gre_t_reserved_get,
+    bcmpkt_gre_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_gre_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_T_FID_COUNT] = {
+    bcmpkt_gre_t_c_r_k_s_set,
+    bcmpkt_gre_t_protocol_set,
+    bcmpkt_gre_t_reserved_set,
+    bcmpkt_gre_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_gre_t_field_data[] = {
+    BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_gre_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_GRE_T_FID_COUNT,
+    .info = bcm56780_a0_dna_2_9_5_0_gre_t_field_data,
+};
+
+
+static int32_t bcmpkt_hg3_base_t_cn_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 4, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_cn_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 4, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_cng_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 6, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_cng_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 6, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_entropy_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 8, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_entropy_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 8, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_ext_hdr_present_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 18, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_ext_hdr_present_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 18, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_hg3_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 17, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_hg3_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 17, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_l3_routed_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 31, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_l3_routed_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 31, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_mirror_copy_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_mirror_copy_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_reserved_etype_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 22, 10);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_reserved_etype_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 22, 10, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_system_destination_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 15);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_system_destination_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 15, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_system_destination_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 15, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_system_destination_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 15, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_system_source_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 15);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_system_source_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 15, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_tc_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_tc_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 20, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 20, 2, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_hg3_base_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_FID_COUNT] = {
+    bcmpkt_hg3_base_t_cn_get,
+    bcmpkt_hg3_base_t_cng_get,
+    bcmpkt_hg3_base_t_entropy_get,
+    bcmpkt_hg3_base_t_ext_hdr_present_get,
+    bcmpkt_hg3_base_t_hg3_reserved_get,
+    bcmpkt_hg3_base_t_l3_routed_get,
+    bcmpkt_hg3_base_t_mirror_copy_get,
+    bcmpkt_hg3_base_t_reserved_etype_get,
+    bcmpkt_hg3_base_t_system_destination_get,
+    bcmpkt_hg3_base_t_system_destination_type_get,
+    bcmpkt_hg3_base_t_system_source_get,
+    bcmpkt_hg3_base_t_tc_get,
+    bcmpkt_hg3_base_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_hg3_base_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_FID_COUNT] = {
+    bcmpkt_hg3_base_t_cn_set,
+    bcmpkt_hg3_base_t_cng_set,
+    bcmpkt_hg3_base_t_entropy_set,
+    bcmpkt_hg3_base_t_ext_hdr_present_set,
+    bcmpkt_hg3_base_t_hg3_reserved_set,
+    bcmpkt_hg3_base_t_l3_routed_set,
+    bcmpkt_hg3_base_t_mirror_copy_set,
+    bcmpkt_hg3_base_t_reserved_etype_set,
+    bcmpkt_hg3_base_t_system_destination_set,
+    bcmpkt_hg3_base_t_system_destination_type_set,
+    bcmpkt_hg3_base_t_system_source_set,
+    bcmpkt_hg3_base_t_tc_set,
+    bcmpkt_hg3_base_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_hg3_base_t_field_data[] = {
+    BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_hg3_base_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_BASE_T_FID_COUNT,
+    .info = bcm56780_a0_dna_2_9_5_0_hg3_base_t_field_data,
+};
+
+
+static int32_t bcmpkt_hg3_extension_0_t_class_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_extension_0_t_class_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_extension_0_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_extension_0_t_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_extension_0_t_forwarding_domain_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_extension_0_t_forwarding_domain_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_extension_0_t_svp_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_extension_0_t_svp_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_hg3_extension_0_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT] = {
+    bcmpkt_hg3_extension_0_t_class_id_get,
+    bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_get,
+    bcmpkt_hg3_extension_0_t_flags_get,
+    bcmpkt_hg3_extension_0_t_forwarding_domain_get,
+    bcmpkt_hg3_extension_0_t_svp_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_hg3_extension_0_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT] = {
+    bcmpkt_hg3_extension_0_t_class_id_set,
+    bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_set,
+    bcmpkt_hg3_extension_0_t_flags_set,
+    bcmpkt_hg3_extension_0_t_forwarding_domain_set,
+    bcmpkt_hg3_extension_0_t_svp_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_hg3_extension_0_t_field_data[] = {
+    BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_EXTENSION_0_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_hg3_extension_0_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT,
+    .info = bcm56780_a0_dna_2_9_5_0_hg3_extension_0_t_field_data,
+};
+
+
+static int32_t bcmpkt_hop_by_hop_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hop_by_hop_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hop_by_hop_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hop_by_hop_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hop_by_hop_t_option_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_hop_by_hop_t_option_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_hop_by_hop_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = {
+    bcmpkt_hop_by_hop_t_hdr_ext_len_get,
+    bcmpkt_hop_by_hop_t_next_header_get,
+    bcmpkt_hop_by_hop_t_option_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_hop_by_hop_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = {
+    bcmpkt_hop_by_hop_t_hdr_ext_len_set,
+    bcmpkt_hop_by_hop_t_next_header_set,
+    bcmpkt_hop_by_hop_t_option_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_hop_by_hop_t_field_data[] = {
+    BCM56780_A0_DNA_2_9_5_0_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_hop_by_hop_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT,
+    .info = bcm56780_a0_dna_2_9_5_0_hop_by_hop_t_field_data,
+};
+
+
+static int32_t bcmpkt_icmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_icmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_icmp_t_code_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_icmp_t_code_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_icmp_t_icmp_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_icmp_t_icmp_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_icmp_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_ICMP_T_FID_COUNT] = {
+    bcmpkt_icmp_t_checksum_get,
+    bcmpkt_icmp_t_code_get,
+    bcmpkt_icmp_t_icmp_type_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_icmp_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_ICMP_T_FID_COUNT] = {
+    bcmpkt_icmp_t_checksum_set,
+    bcmpkt_icmp_t_code_set,
+    bcmpkt_icmp_t_icmp_type_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_icmp_t_field_data[] = {
+    BCM56780_A0_DNA_2_9_5_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_icmp_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_ICMP_T_FID_COUNT,
+    .info = bcm56780_a0_dna_2_9_5_0_icmp_t_field_data,
+};
+
+
+static int32_t bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_0_a_t_lns_device_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 24);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_0_a_t_lns_device_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 24, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_ifa_flex_md_0_a_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT] = {
+    bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_get,
+    bcmpkt_ifa_flex_md_0_a_t_lns_device_id_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_ifa_flex_md_0_a_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT] = {
+    bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_set,
+    bcmpkt_ifa_flex_md_0_a_t_lns_device_id_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_ifa_flex_md_0_a_t_field_data[] = {
+    BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_0_A_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_ifa_flex_md_0_a_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT,
+    .info = bcm56780_a0_dna_2_9_5_0_ifa_flex_md_0_a_t_field_data,
+};
+
+
+static int32_t bcmpkt_ifa_flex_md_0_b_t_cn_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 26, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_0_b_t_cn_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 26, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_0_b_t_port_speed_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_0_b_t_port_speed_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_0_b_t_queue_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 20, 6);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_0_b_t_queue_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 20, 6, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 20);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 20, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_ifa_flex_md_0_b_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT] = {
+    bcmpkt_ifa_flex_md_0_b_t_cn_get,
+    bcmpkt_ifa_flex_md_0_b_t_port_speed_get,
+    bcmpkt_ifa_flex_md_0_b_t_queue_id_get,
+    bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_ifa_flex_md_0_b_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT] = {
+    bcmpkt_ifa_flex_md_0_b_t_cn_set,
+    bcmpkt_ifa_flex_md_0_b_t_port_speed_set,
+    bcmpkt_ifa_flex_md_0_b_t_queue_id_set,
+    bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_ifa_flex_md_0_b_t_field_data[] = {
+    BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_0_B_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_ifa_flex_md_0_b_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT,
+    .info = bcm56780_a0_dna_2_9_5_0_ifa_flex_md_0_b_t_field_data,
+};
+
+
+static int32_t bcmpkt_ifa_flex_md_1_t_egress_port_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_1_t_egress_port_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_1_t_ingress_port_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_1_t_ingress_port_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_ifa_flex_md_1_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT] = {
+    bcmpkt_ifa_flex_md_1_t_egress_port_id_get,
+    bcmpkt_ifa_flex_md_1_t_ingress_port_id_get,
+    bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_ifa_flex_md_1_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT] = {
+    bcmpkt_ifa_flex_md_1_t_egress_port_id_set,
+    bcmpkt_ifa_flex_md_1_t_ingress_port_id_set,
+    bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_ifa_flex_md_1_t_field_data[] = {
+    BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_1_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_ifa_flex_md_1_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT,
+    .info = bcm56780_a0_dna_2_9_5_0_ifa_flex_md_1_t_field_data,
+};
+
+
+static int32_t bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_ifa_flex_md_2_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT] = {
+    bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_get,
+    bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_ifa_flex_md_2_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT] = {
+    bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_set,
+    bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_ifa_flex_md_2_t_field_data[] = {
+    BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_2_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_ifa_flex_md_2_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT,
+    .info = bcm56780_a0_dna_2_9_5_0_ifa_flex_md_2_t_field_data,
+};
+
+
+static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_ifa_flex_md_3_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT] = {
+    bcmpkt_ifa_flex_md_3_t_mmu_stat_0_get,
+    bcmpkt_ifa_flex_md_3_t_mmu_stat_1_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_ifa_flex_md_3_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT] = {
+    bcmpkt_ifa_flex_md_3_t_mmu_stat_0_set,
+    bcmpkt_ifa_flex_md_3_t_mmu_stat_1_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_ifa_flex_md_3_t_field_data[] = {
+    BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_3_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_ifa_flex_md_3_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT,
+    .info = bcm56780_a0_dna_2_9_5_0_ifa_flex_md_3_t_field_data,
+};
+
+
+static int32_t bcmpkt_ifa_header_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_gns_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_gns_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_max_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_max_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_next_hdr_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_next_hdr_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_ver_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_ver_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_ifa_header_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_HEADER_T_FID_COUNT] = {
+    bcmpkt_ifa_header_t_flags_get,
+    bcmpkt_ifa_header_t_gns_get,
+    bcmpkt_ifa_header_t_max_length_get,
+    bcmpkt_ifa_header_t_next_hdr_get,
+    bcmpkt_ifa_header_t_ver_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_ifa_header_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_HEADER_T_FID_COUNT] = {
+    bcmpkt_ifa_header_t_flags_set,
+    bcmpkt_ifa_header_t_gns_set,
+    bcmpkt_ifa_header_t_max_length_set,
+    bcmpkt_ifa_header_t_next_hdr_set,
+    bcmpkt_ifa_header_t_ver_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_ifa_header_t_field_data[] = {
+    BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_ifa_header_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_HEADER_T_FID_COUNT,
+    .info = bcm56780_a0_dna_2_9_5_0_ifa_header_t_field_data,
+};
+
+
+static int32_t bcmpkt_ifa_md_base_t_action_vector_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_md_base_t_action_vector_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_md_base_t_hop_limit_current_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_md_base_t_hop_limit_current_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_md_base_t_request_vector_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_md_base_t_request_vector_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_ifa_md_base_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT] = {
+    bcmpkt_ifa_md_base_t_action_vector_get,
+    bcmpkt_ifa_md_base_t_hop_limit_current_length_get,
+    bcmpkt_ifa_md_base_t_request_vector_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_ifa_md_base_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT] = {
+    bcmpkt_ifa_md_base_t_action_vector_set,
+    bcmpkt_ifa_md_base_t_hop_limit_current_length_set,
+    bcmpkt_ifa_md_base_t_request_vector_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_ifa_md_base_t_field_data[] = {
+    BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_MD_BASE_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_ifa_md_base_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT,
+    .info = bcm56780_a0_dna_2_9_5_0_ifa_md_base_t_field_data,
+};
+
+
+static int32_t bcmpkt_ifa_metadata_t_action_vector_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_t_action_vector_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_t_hop_limit_current_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_t_hop_limit_current_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_t_metadata_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_t_metadata_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_t_request_vector_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_t_request_vector_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_ifa_metadata_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_METADATA_T_FID_COUNT] = {
+    bcmpkt_ifa_metadata_t_action_vector_get,
+    bcmpkt_ifa_metadata_t_hop_limit_current_length_get,
+    bcmpkt_ifa_metadata_t_metadata_get,
+    bcmpkt_ifa_metadata_t_request_vector_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_ifa_metadata_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_METADATA_T_FID_COUNT] = {
+    bcmpkt_ifa_metadata_t_action_vector_set,
+    bcmpkt_ifa_metadata_t_hop_limit_current_length_set,
+    bcmpkt_ifa_metadata_t_metadata_set,
+    bcmpkt_ifa_metadata_t_request_vector_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_ifa_metadata_t_field_data[] = {
+    BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_METADATA_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_ifa_metadata_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_IFA_METADATA_T_FID_COUNT,
+    .info = bcm56780_a0_dna_2_9_5_0_ifa_metadata_t_field_data,
+};
+
+
+static int32_t bcmpkt_igmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_igmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_igmp_t_group_address_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_igmp_t_group_address_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_igmp_t_igmp_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_igmp_t_igmp_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_igmp_t_max_resp_time_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_igmp_t_max_resp_time_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_igmp_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_IGMP_T_FID_COUNT] = {
+    bcmpkt_igmp_t_checksum_get,
+    bcmpkt_igmp_t_group_address_get,
+    bcmpkt_igmp_t_igmp_type_get,
+    bcmpkt_igmp_t_max_resp_time_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_igmp_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_IGMP_T_FID_COUNT] = {
+    bcmpkt_igmp_t_checksum_set,
+    bcmpkt_igmp_t_group_address_set,
+    bcmpkt_igmp_t_igmp_type_set,
+    bcmpkt_igmp_t_max_resp_time_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_igmp_t_field_data[] = {
+    BCM56780_A0_DNA_2_9_5_0_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_igmp_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_IGMP_T_FID_COUNT,
+    .info = bcm56780_a0_dna_2_9_5_0_igmp_t_field_data,
+};
+
+
+static int32_t bcmpkt_ipfix_t_export_time_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_export_time_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_obs_domain_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_obs_domain_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_ipfix_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPFIX_T_FID_COUNT] = {
+    bcmpkt_ipfix_t_export_time_get,
+    bcmpkt_ipfix_t_length_get,
+    bcmpkt_ipfix_t_obs_domain_id_get,
+    bcmpkt_ipfix_t_sequence_num_get,
+    bcmpkt_ipfix_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_ipfix_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPFIX_T_FID_COUNT] = {
+    bcmpkt_ipfix_t_export_time_set,
+    bcmpkt_ipfix_t_length_set,
+    bcmpkt_ipfix_t_obs_domain_id_set,
+    bcmpkt_ipfix_t_sequence_num_set,
+    bcmpkt_ipfix_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_ipfix_t_field_data[] = {
+    BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_ipfix_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPFIX_T_FID_COUNT,
+    .info = bcm56780_a0_dna_2_9_5_0_ipfix_t_field_data,
+};
+
+
+static int32_t bcmpkt_ipv4_t_da_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_da_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_flags_frag_offset_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_flags_frag_offset_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_hdr_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_hdr_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_option_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_option_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_protocol_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_protocol_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_sa_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_sa_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_tos_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_tos_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_total_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_total_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_ttl_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_ttl_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_version_hdr_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_version_hdr_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_ipv4_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV4_T_FID_COUNT] = {
+    bcmpkt_ipv4_t_da_get,
+    bcmpkt_ipv4_t_flags_frag_offset_get,
+    bcmpkt_ipv4_t_hdr_checksum_get,
+    bcmpkt_ipv4_t_id_get,
+    bcmpkt_ipv4_t_option_get,
+    bcmpkt_ipv4_t_protocol_get,
+    bcmpkt_ipv4_t_sa_get,
+    bcmpkt_ipv4_t_tos_get,
+    bcmpkt_ipv4_t_total_length_get,
+    bcmpkt_ipv4_t_ttl_get,
+    bcmpkt_ipv4_t_version_hdr_len_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_ipv4_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV4_T_FID_COUNT] = {
+    bcmpkt_ipv4_t_da_set,
+    bcmpkt_ipv4_t_flags_frag_offset_set,
+    bcmpkt_ipv4_t_hdr_checksum_set,
+    bcmpkt_ipv4_t_id_set,
+    bcmpkt_ipv4_t_option_set,
+    bcmpkt_ipv4_t_protocol_set,
+    bcmpkt_ipv4_t_sa_set,
+    bcmpkt_ipv4_t_tos_set,
+    bcmpkt_ipv4_t_total_length_set,
+    bcmpkt_ipv4_t_ttl_set,
+    bcmpkt_ipv4_t_version_hdr_len_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_ipv4_t_field_data[] = {
+    BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_ipv4_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV4_T_FID_COUNT,
+    .info = bcm56780_a0_dna_2_9_5_0_ipv4_t_field_data,
+};
+
+
+static int32_t bcmpkt_ipv6_t_da_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_da_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_flow_label_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 20);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_flow_label_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 20, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_hop_limit_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_hop_limit_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 8, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 8, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_payload_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_payload_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_sa_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_sa_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_traffic_class_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 20, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_traffic_class_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 20, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_ipv6_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV6_T_FID_COUNT] = {
+    bcmpkt_ipv6_t_da_get,
+    bcmpkt_ipv6_t_flow_label_get,
+    bcmpkt_ipv6_t_hop_limit_get,
+    bcmpkt_ipv6_t_next_header_get,
+    bcmpkt_ipv6_t_payload_length_get,
+    bcmpkt_ipv6_t_sa_get,
+    bcmpkt_ipv6_t_traffic_class_get,
+    bcmpkt_ipv6_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_ipv6_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV6_T_FID_COUNT] = {
+    bcmpkt_ipv6_t_da_set,
+    bcmpkt_ipv6_t_flow_label_set,
+    bcmpkt_ipv6_t_hop_limit_set,
+    bcmpkt_ipv6_t_next_header_set,
+    bcmpkt_ipv6_t_payload_length_set,
+    bcmpkt_ipv6_t_sa_set,
+    bcmpkt_ipv6_t_traffic_class_set,
+    bcmpkt_ipv6_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_ipv6_t_field_data[] = {
+    BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_ipv6_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_IPV6_T_FID_COUNT,
+    .info = bcm56780_a0_dna_2_9_5_0_ipv6_t_field_data,
+};
+
+
+static int32_t bcmpkt_l2_t_macda_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_l2_t_macda_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_l2_t_macsa_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_l2_t_macsa_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_l2_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_L2_T_FID_COUNT] = {
+    bcmpkt_l2_t_macda_get,
+    bcmpkt_l2_t_macsa_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_l2_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_L2_T_FID_COUNT] = {
+    bcmpkt_l2_t_macda_set,
+    bcmpkt_l2_t_macsa_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_l2_t_field_data[] = {
+    BCM56780_A0_DNA_2_9_5_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_l2_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_L2_T_FID_COUNT,
+    .info = bcm56780_a0_dna_2_9_5_0_l2_t_field_data,
+};
+
+
+static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_mirror_erspan_sn_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = {
+    bcmpkt_mirror_erspan_sn_t_seq_num_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_mirror_erspan_sn_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = {
+    bcmpkt_mirror_erspan_sn_t_seq_num_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_mirror_erspan_sn_t_field_data[] = {
+    BCM56780_A0_DNA_2_9_5_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_mirror_erspan_sn_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT,
+    .info = bcm56780_a0_dna_2_9_5_0_mirror_erspan_sn_t_field_data,
+};
+
+
+static int32_t bcmpkt_mirror_transport_t_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_mirror_transport_t_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_mirror_transport_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = {
+    bcmpkt_mirror_transport_t_data_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_mirror_transport_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = {
+    bcmpkt_mirror_transport_t_data_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_mirror_transport_t_field_data[] = {
+    BCM56780_A0_DNA_2_9_5_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_mirror_transport_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT,
+    .info = bcm56780_a0_dna_2_9_5_0_mirror_transport_t_field_data,
+};
+
+
+static int32_t bcmpkt_mpls_ach_t_channel_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_ach_t_channel_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_ach_t_cw_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_ach_t_cw_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_ach_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_ach_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_ach_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_ach_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 4, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_mpls_ach_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_ACH_T_FID_COUNT] = {
+    bcmpkt_mpls_ach_t_channel_type_get,
+    bcmpkt_mpls_ach_t_cw_type_get,
+    bcmpkt_mpls_ach_t_reserved_get,
+    bcmpkt_mpls_ach_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_mpls_ach_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_ACH_T_FID_COUNT] = {
+    bcmpkt_mpls_ach_t_channel_type_set,
+    bcmpkt_mpls_ach_t_cw_type_set,
+    bcmpkt_mpls_ach_t_reserved_set,
+    bcmpkt_mpls_ach_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_mpls_ach_t_field_data[] = {
+    BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_mpls_ach_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_ACH_T_FID_COUNT,
+    .info = bcm56780_a0_dna_2_9_5_0_mpls_ach_t_field_data,
+};
+
+
+static int32_t bcmpkt_mpls_bv_t_value_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_bv_t_value_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_mpls_bv_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_BV_T_FID_COUNT] = {
+    bcmpkt_mpls_bv_t_value_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_mpls_bv_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_BV_T_FID_COUNT] = {
+    bcmpkt_mpls_bv_t_value_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_mpls_bv_t_field_data[] = {
+    BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_mpls_bv_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_BV_T_FID_COUNT,
+    .info = bcm56780_a0_dna_2_9_5_0_mpls_bv_t_field_data,
+};
+
+
+static int32_t bcmpkt_mpls_cw_t_cw_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_cw_t_cw_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_cw_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 12);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_cw_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 12, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_cw_t_seq_number_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_cw_t_seq_number_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_mpls_cw_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_CW_T_FID_COUNT] = {
+    bcmpkt_mpls_cw_t_cw_type_get,
+    bcmpkt_mpls_cw_t_reserved_get,
+    bcmpkt_mpls_cw_t_seq_number_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_mpls_cw_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_CW_T_FID_COUNT] = {
+    bcmpkt_mpls_cw_t_cw_type_set,
+    bcmpkt_mpls_cw_t_reserved_set,
+    bcmpkt_mpls_cw_t_seq_number_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_mpls_cw_t_field_data[] = {
+    BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_mpls_cw_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_CW_T_FID_COUNT,
+    .info = bcm56780_a0_dna_2_9_5_0_mpls_cw_t_field_data,
+};
+
+
+static int32_t bcmpkt_mpls_t_bos_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_t_bos_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_t_exp_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 9, 3);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_t_exp_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 9, 3, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_t_label_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 12, 20);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_t_label_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 12, 20, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_t_ttl_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_t_ttl_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_mpls_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_T_FID_COUNT] = {
+    bcmpkt_mpls_t_bos_get,
+    bcmpkt_mpls_t_exp_get,
+    bcmpkt_mpls_t_label_get,
+    bcmpkt_mpls_t_ttl_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_mpls_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_T_FID_COUNT] = {
+    bcmpkt_mpls_t_bos_set,
+    bcmpkt_mpls_t_exp_set,
+    bcmpkt_mpls_t_label_set,
+    bcmpkt_mpls_t_ttl_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_mpls_t_field_data[] = {
+    BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_mpls_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_MPLS_T_FID_COUNT,
+    .info = bcm56780_a0_dna_2_9_5_0_mpls_t_field_data,
+};
+
+
+static int32_t bcmpkt_p_1588_t_cntrl_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[8], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_cntrl_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[8], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_correction_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_correction_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_domain_nb_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_domain_nb_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_logmsginterval_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[8], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_logmsginterval_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[8], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_msg_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_msg_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_msg_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_msg_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_reserved1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 20, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_reserved1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 20, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_reserved2_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_reserved3_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_reserved3_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_seq_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[7], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_seq_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[7], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_srcportid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_srcportid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_transportspec_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_transportspec_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 4, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_p_1588_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T_FID_COUNT] = {
+    bcmpkt_p_1588_t_cntrl_get,
+    bcmpkt_p_1588_t_correction_get,
+    bcmpkt_p_1588_t_domain_nb_get,
+    bcmpkt_p_1588_t_flags_get,
+    bcmpkt_p_1588_t_logmsginterval_get,
+    bcmpkt_p_1588_t_msg_length_get,
+    bcmpkt_p_1588_t_msg_type_get,
+    bcmpkt_p_1588_t_reserved1_get,
+    bcmpkt_p_1588_t_reserved2_get,
+    bcmpkt_p_1588_t_reserved3_get,
+    bcmpkt_p_1588_t_seq_id_get,
+    bcmpkt_p_1588_t_srcportid_get,
+    bcmpkt_p_1588_t_transportspec_get,
+    bcmpkt_p_1588_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_p_1588_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T_FID_COUNT] = {
+    bcmpkt_p_1588_t_cntrl_set,
+    bcmpkt_p_1588_t_correction_set,
+    bcmpkt_p_1588_t_domain_nb_set,
+    bcmpkt_p_1588_t_flags_set,
+    bcmpkt_p_1588_t_logmsginterval_set,
+    bcmpkt_p_1588_t_msg_length_set,
+    bcmpkt_p_1588_t_msg_type_set,
+    bcmpkt_p_1588_t_reserved1_set,
+    bcmpkt_p_1588_t_reserved2_set,
+    bcmpkt_p_1588_t_reserved3_set,
+    bcmpkt_p_1588_t_seq_id_set,
+    bcmpkt_p_1588_t_srcportid_set,
+    bcmpkt_p_1588_t_transportspec_set,
+    bcmpkt_p_1588_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_p_1588_t_field_data[] = {
+    BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_p_1588_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_P_1588_T_FID_COUNT,
+    .info = bcm56780_a0_dna_2_9_5_0_p_1588_t_field_data,
+};
+
+
+static int32_t bcmpkt_prog_ext_hdr_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_prog_ext_hdr_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_prog_ext_hdr_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_prog_ext_hdr_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_prog_ext_hdr_t_option_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_prog_ext_hdr_t_option_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_prog_ext_hdr_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = {
+    bcmpkt_prog_ext_hdr_t_hdr_ext_len_get,
+    bcmpkt_prog_ext_hdr_t_next_header_get,
+    bcmpkt_prog_ext_hdr_t_option_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_prog_ext_hdr_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = {
+    bcmpkt_prog_ext_hdr_t_hdr_ext_len_set,
+    bcmpkt_prog_ext_hdr_t_next_header_set,
+    bcmpkt_prog_ext_hdr_t_option_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_prog_ext_hdr_t_field_data[] = {
+    BCM56780_A0_DNA_2_9_5_0_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_prog_ext_hdr_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT,
+    .info = bcm56780_a0_dna_2_9_5_0_prog_ext_hdr_t_field_data,
+};
+
+
+static int32_t bcmpkt_psamp_0_t_flowset_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_flowset_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_next_hop_index_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_next_hop_index_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_psamp_0_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_0_T_FID_COUNT] = {
+    bcmpkt_psamp_0_t_flowset_get,
+    bcmpkt_psamp_0_t_length_get,
+    bcmpkt_psamp_0_t_next_hop_index_get,
+    bcmpkt_psamp_0_t_obs_time_ns_get,
+    bcmpkt_psamp_0_t_obs_time_s_get,
+    bcmpkt_psamp_0_t_template_id_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_psamp_0_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_0_T_FID_COUNT] = {
+    bcmpkt_psamp_0_t_flowset_set,
+    bcmpkt_psamp_0_t_length_set,
+    bcmpkt_psamp_0_t_next_hop_index_set,
+    bcmpkt_psamp_0_t_obs_time_ns_set,
+    bcmpkt_psamp_0_t_obs_time_s_set,
+    bcmpkt_psamp_0_t_template_id_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_psamp_0_t_field_data[] = {
+    BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_psamp_0_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_0_T_FID_COUNT,
+    .info = bcm56780_a0_dna_2_9_5_0_psamp_0_t_field_data,
+};
+
+
+static int32_t bcmpkt_psamp_1_t_dlb_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_dlb_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_egress_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_egress_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_epoch_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_epoch_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_variable_flag_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_variable_flag_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 16, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_psamp_1_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_1_T_FID_COUNT] = {
+    bcmpkt_psamp_1_t_dlb_id_get,
+    bcmpkt_psamp_1_t_egress_port_get,
+    bcmpkt_psamp_1_t_epoch_get,
+    bcmpkt_psamp_1_t_ingress_port_get,
+    bcmpkt_psamp_1_t_sampled_length_get,
+    bcmpkt_psamp_1_t_user_meta_data_get,
+    bcmpkt_psamp_1_t_variable_flag_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_psamp_1_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_1_T_FID_COUNT] = {
+    bcmpkt_psamp_1_t_dlb_id_set,
+    bcmpkt_psamp_1_t_egress_port_set,
+    bcmpkt_psamp_1_t_epoch_set,
+    bcmpkt_psamp_1_t_ingress_port_set,
+    bcmpkt_psamp_1_t_sampled_length_set,
+    bcmpkt_psamp_1_t_user_meta_data_set,
+    bcmpkt_psamp_1_t_variable_flag_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_psamp_1_t_field_data[] = {
+    BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_psamp_1_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_1_T_FID_COUNT,
+    .info = bcm56780_a0_dna_2_9_5_0_psamp_1_t_field_data,
+};
+
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[4], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[4], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[4], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[4], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_psamp_mirror_on_drop_0_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = {
+    bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_length_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_template_id_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_psamp_mirror_on_drop_0_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = {
+    bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_length_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_template_id_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_psamp_mirror_on_drop_0_t_field_data[] = {
+    BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_psamp_mirror_on_drop_0_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT,
+    .info = bcm56780_a0_dna_2_9_5_0_psamp_mirror_on_drop_0_t_field_data,
+};
+
+
+static int32_t bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_psamp_mirror_on_drop_1_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT] = {
+    bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_get,
+    bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_get,
+    bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_get,
+    bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_get,
+    bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_get,
+    bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_psamp_mirror_on_drop_1_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT] = {
+    bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_set,
+    bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_set,
+    bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_set,
+    bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_set,
+    bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_set,
+    bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_psamp_mirror_on_drop_1_t_field_data[] = {
+    BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_psamp_mirror_on_drop_1_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT,
+    .info = bcm56780_a0_dna_2_9_5_0_psamp_mirror_on_drop_1_t_field_data,
+};
+
+
+static int32_t bcmpkt_psamp_mirror_on_drop_2_t_egr_drop_reason_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_2_t_egr_drop_reason_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_2_t_ep_copy_session_index_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_2_t_ep_copy_session_index_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_2_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_2_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_2_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_2_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_2_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_2_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_2_t_var_len_indicator_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_2_t_var_len_indicator_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_psamp_mirror_on_drop_2_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT] = {
+    bcmpkt_psamp_mirror_on_drop_2_t_egr_drop_reason_get,
+    bcmpkt_psamp_mirror_on_drop_2_t_ep_copy_session_index_get,
+    bcmpkt_psamp_mirror_on_drop_2_t_reserved_0_get,
+    bcmpkt_psamp_mirror_on_drop_2_t_sampled_length_get,
+    bcmpkt_psamp_mirror_on_drop_2_t_user_meta_data_get,
+    bcmpkt_psamp_mirror_on_drop_2_t_var_len_indicator_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_psamp_mirror_on_drop_2_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT] = {
+    bcmpkt_psamp_mirror_on_drop_2_t_egr_drop_reason_set,
+    bcmpkt_psamp_mirror_on_drop_2_t_ep_copy_session_index_set,
+    bcmpkt_psamp_mirror_on_drop_2_t_reserved_0_set,
+    bcmpkt_psamp_mirror_on_drop_2_t_sampled_length_set,
+    bcmpkt_psamp_mirror_on_drop_2_t_user_meta_data_set,
+    bcmpkt_psamp_mirror_on_drop_2_t_var_len_indicator_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_psamp_mirror_on_drop_2_t_field_data[] = {
+    BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_psamp_mirror_on_drop_2_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT,
+    .info = bcm56780_a0_dna_2_9_5_0_psamp_mirror_on_drop_2_t_field_data,
+};
+
+
+static int32_t bcmpkt_rarp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_operation_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_operation_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_rarp_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_RARP_T_FID_COUNT] = {
+    bcmpkt_rarp_t_hardware_len_get,
+    bcmpkt_rarp_t_hardware_type_get,
+    bcmpkt_rarp_t_operation_get,
+    bcmpkt_rarp_t_prot_addr_len_get,
+    bcmpkt_rarp_t_protocol_type_get,
+    bcmpkt_rarp_t_sender_ha_get,
+    bcmpkt_rarp_t_sender_ip_get,
+    bcmpkt_rarp_t_target_ha_get,
+    bcmpkt_rarp_t_target_ip_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_rarp_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_RARP_T_FID_COUNT] = {
+    bcmpkt_rarp_t_hardware_len_set,
+    bcmpkt_rarp_t_hardware_type_set,
+    bcmpkt_rarp_t_operation_set,
+    bcmpkt_rarp_t_prot_addr_len_set,
+    bcmpkt_rarp_t_protocol_type_set,
+    bcmpkt_rarp_t_sender_ha_set,
+    bcmpkt_rarp_t_sender_ip_set,
+    bcmpkt_rarp_t_target_ha_set,
+    bcmpkt_rarp_t_target_ip_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_rarp_t_field_data[] = {
+    BCM56780_A0_DNA_2_9_5_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_rarp_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RARP_T_FID_COUNT,
+    .info = bcm56780_a0_dna_2_9_5_0_rarp_t_field_data,
+};
+
+
+static int32_t bcmpkt_routing_t_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_routing_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_routing_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_segments_left_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_segments_left_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_routing_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_ROUTING_T_FID_COUNT] = {
+    bcmpkt_routing_t_data_get,
+    bcmpkt_routing_t_hdr_ext_len_get,
+    bcmpkt_routing_t_next_header_get,
+    bcmpkt_routing_t_routing_type_get,
+    bcmpkt_routing_t_segments_left_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_routing_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_ROUTING_T_FID_COUNT] = {
+    bcmpkt_routing_t_data_set,
+    bcmpkt_routing_t_hdr_ext_len_set,
+    bcmpkt_routing_t_next_header_set,
+    bcmpkt_routing_t_routing_type_set,
+    bcmpkt_routing_t_segments_left_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_routing_t_field_data[] = {
+    BCM56780_A0_DNA_2_9_5_0_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_routing_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_ROUTING_T_FID_COUNT,
+    .info = bcm56780_a0_dna_2_9_5_0_routing_t_field_data,
+};
+
+
+static int32_t bcmpkt_rspan_t_tag_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rspan_t_tag_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rspan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rspan_t_tpid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_rspan_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_RSPAN_T_FID_COUNT] = {
+    bcmpkt_rspan_t_tag_get,
+    bcmpkt_rspan_t_tpid_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_rspan_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_RSPAN_T_FID_COUNT] = {
+    bcmpkt_rspan_t_tag_set,
+    bcmpkt_rspan_t_tpid_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_rspan_t_field_data[] = {
+    BCM56780_A0_DNA_2_9_5_0_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_rspan_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_RSPAN_T_FID_COUNT,
+    .info = bcm56780_a0_dna_2_9_5_0_rspan_t_field_data,
+};
+
+
+static int32_t bcmpkt_sflow_shim_0_t_sys_destination_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_0_t_sys_destination_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_0_t_sys_source_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_0_t_sys_source_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_0_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_0_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_sflow_shim_0_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = {
+    bcmpkt_sflow_shim_0_t_sys_destination_get,
+    bcmpkt_sflow_shim_0_t_sys_source_get,
+    bcmpkt_sflow_shim_0_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_sflow_shim_0_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = {
+    bcmpkt_sflow_shim_0_t_sys_destination_set,
+    bcmpkt_sflow_shim_0_t_sys_source_set,
+    bcmpkt_sflow_shim_0_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_sflow_shim_0_t_field_data[] = {
+    BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_sflow_shim_0_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT,
+    .info = bcm56780_a0_dna_2_9_5_0_sflow_shim_0_t_field_data,
+};
+
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_dest_sample_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 30, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_dest_sample_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 30, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_discarded_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 27, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_discarded_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 27, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_flex_sample_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 29, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_flex_sample_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 29, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_mcast_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_mcast_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_src_sample_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 31, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_src_sample_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 31, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_truncated_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 26, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_truncated_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 26, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 7);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 7, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 23, 3);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 23, 3, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_sflow_shim_1_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = {
+    bcmpkt_sflow_shim_1_t_flag_dest_sample_get,
+    bcmpkt_sflow_shim_1_t_flag_discarded_get,
+    bcmpkt_sflow_shim_1_t_flag_flex_sample_get,
+    bcmpkt_sflow_shim_1_t_flag_mcast_get,
+    bcmpkt_sflow_shim_1_t_flag_src_sample_get,
+    bcmpkt_sflow_shim_1_t_flag_truncated_get,
+    bcmpkt_sflow_shim_1_t_reserved_get,
+    bcmpkt_sflow_shim_1_t_sys_opcode_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_sflow_shim_1_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = {
+    bcmpkt_sflow_shim_1_t_flag_dest_sample_set,
+    bcmpkt_sflow_shim_1_t_flag_discarded_set,
+    bcmpkt_sflow_shim_1_t_flag_flex_sample_set,
+    bcmpkt_sflow_shim_1_t_flag_mcast_set,
+    bcmpkt_sflow_shim_1_t_flag_src_sample_set,
+    bcmpkt_sflow_shim_1_t_flag_truncated_set,
+    bcmpkt_sflow_shim_1_t_reserved_set,
+    bcmpkt_sflow_shim_1_t_sys_opcode_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_sflow_shim_1_t_field_data[] = {
+    BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_sflow_shim_1_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT,
+    .info = bcm56780_a0_dna_2_9_5_0_sflow_shim_1_t_field_data,
+};
+
+
+static int32_t bcmpkt_sflow_shim_2_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_2_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_sflow_shim_2_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = {
+    bcmpkt_sflow_shim_2_t_sequence_num_get,
+    bcmpkt_sflow_shim_2_t_user_meta_data_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_sflow_shim_2_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = {
+    bcmpkt_sflow_shim_2_t_sequence_num_set,
+    bcmpkt_sflow_shim_2_t_user_meta_data_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_sflow_shim_2_t_field_data[] = {
+    BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_sflow_shim_2_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT,
+    .info = bcm56780_a0_dna_2_9_5_0_sflow_shim_2_t_field_data,
+};
+
+
+static int32_t bcmpkt_snap_llc_t_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_snap_llc_t_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_snap_llc_t_snap_llc_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_snap_llc_t_snap_llc_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_snap_llc_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_SNAP_LLC_T_FID_COUNT] = {
+    bcmpkt_snap_llc_t_length_get,
+    bcmpkt_snap_llc_t_snap_llc_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_snap_llc_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_SNAP_LLC_T_FID_COUNT] = {
+    bcmpkt_snap_llc_t_length_set,
+    bcmpkt_snap_llc_t_snap_llc_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_snap_llc_t_field_data[] = {
+    BCM56780_A0_DNA_2_9_5_0_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_snap_llc_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_SNAP_LLC_T_FID_COUNT,
+    .info = bcm56780_a0_dna_2_9_5_0_snap_llc_t_field_data,
+};
+
+
+static int32_t bcmpkt_svtag_t_data_lwr_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_svtag_t_data_lwr_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_svtag_t_data_upr_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_svtag_t_data_upr_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_svtag_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_SVTAG_T_FID_COUNT] = {
+    bcmpkt_svtag_t_data_lwr_get,
+    bcmpkt_svtag_t_data_upr_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_svtag_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_SVTAG_T_FID_COUNT] = {
+    bcmpkt_svtag_t_data_lwr_set,
+    bcmpkt_svtag_t_data_upr_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_svtag_t_field_data[] = {
+    BCM56780_A0_DNA_2_9_5_0_BCMPKT_SVTAG_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_svtag_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_SVTAG_T_FID_COUNT,
+    .info = bcm56780_a0_dna_2_9_5_0_svtag_t_field_data,
+};
+
+
+static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_first_4bytes_t_src_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_first_4bytes_t_src_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_tcp_first_4bytes_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = {
+    bcmpkt_tcp_first_4bytes_t_dst_port_get,
+    bcmpkt_tcp_first_4bytes_t_src_port_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_tcp_first_4bytes_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = {
+    bcmpkt_tcp_first_4bytes_t_dst_port_set,
+    bcmpkt_tcp_first_4bytes_t_src_port_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_tcp_first_4bytes_t_field_data[] = {
+    BCM56780_A0_DNA_2_9_5_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_tcp_first_4bytes_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT,
+    .info = bcm56780_a0_dna_2_9_5_0_tcp_first_4bytes_t_field_data,
+};
+
+
+static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_win_size_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_win_size_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_tcp_last_16bytes_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = {
+    bcmpkt_tcp_last_16bytes_t_ack_num_get,
+    bcmpkt_tcp_last_16bytes_t_checksum_get,
+    bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get,
+    bcmpkt_tcp_last_16bytes_t_seq_num_get,
+    bcmpkt_tcp_last_16bytes_t_urgent_ptr_get,
+    bcmpkt_tcp_last_16bytes_t_win_size_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_tcp_last_16bytes_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = {
+    bcmpkt_tcp_last_16bytes_t_ack_num_set,
+    bcmpkt_tcp_last_16bytes_t_checksum_set,
+    bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set,
+    bcmpkt_tcp_last_16bytes_t_seq_num_set,
+    bcmpkt_tcp_last_16bytes_t_urgent_ptr_set,
+    bcmpkt_tcp_last_16bytes_t_win_size_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_tcp_last_16bytes_t_field_data[] = {
+    BCM56780_A0_DNA_2_9_5_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_tcp_last_16bytes_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT,
+    .info = bcm56780_a0_dna_2_9_5_0_tcp_last_16bytes_t_field_data,
+};
+
+
+static int32_t bcmpkt_udp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_dst_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_src_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_src_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_udp_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_udp_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_udp_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_UDP_T_FID_COUNT] = {
+    bcmpkt_udp_t_checksum_get,
+    bcmpkt_udp_t_dst_port_get,
+    bcmpkt_udp_t_src_port_get,
+    bcmpkt_udp_t_udp_length_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_udp_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_UDP_T_FID_COUNT] = {
+    bcmpkt_udp_t_checksum_set,
+    bcmpkt_udp_t_dst_port_set,
+    bcmpkt_udp_t_src_port_set,
+    bcmpkt_udp_t_udp_length_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_udp_t_field_data[] = {
+    BCM56780_A0_DNA_2_9_5_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_udp_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_UDP_T_FID_COUNT,
+    .info = bcm56780_a0_dna_2_9_5_0_udp_t_field_data,
+};
+
+
+static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_unknown_l3_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = {
+    bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get,
+    bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_unknown_l3_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = {
+    bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set,
+    bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_unknown_l3_t_field_data[] = {
+    BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_unknown_l3_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT,
+    .info = bcm56780_a0_dna_2_9_5_0_unknown_l3_t_field_data,
+};
+
+
+static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_unknown_l4_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = {
+    bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_unknown_l4_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = {
+    bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_unknown_l4_t_field_data[] = {
+    BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_unknown_l4_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT,
+    .info = bcm56780_a0_dna_2_9_5_0_unknown_l4_t_field_data,
+};
+
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_unknown_l5_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = {
+    bcmpkt_unknown_l5_t_l5_bytes_0_1_get,
+    bcmpkt_unknown_l5_t_l5_bytes_2_3_get,
+    bcmpkt_unknown_l5_t_l5_bytes_4_7_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_unknown_l5_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = {
+    bcmpkt_unknown_l5_t_l5_bytes_0_1_set,
+    bcmpkt_unknown_l5_t_l5_bytes_2_3_set,
+    bcmpkt_unknown_l5_t_l5_bytes_4_7_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_unknown_l5_t_field_data[] = {
+    BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_unknown_l5_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT,
+    .info = bcm56780_a0_dna_2_9_5_0_unknown_l5_t_field_data,
+};
+
+
+static int32_t bcmpkt_vlan_t_cfi_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 12, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_cfi_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 12, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_pcp_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 13, 3);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_pcp_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 13, 3, val);
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_tpid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_vid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 12);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_vid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 12, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_vlan_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_VLAN_T_FID_COUNT] = {
+    bcmpkt_vlan_t_cfi_get,
+    bcmpkt_vlan_t_pcp_get,
+    bcmpkt_vlan_t_tpid_get,
+    bcmpkt_vlan_t_vid_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_vlan_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_VLAN_T_FID_COUNT] = {
+    bcmpkt_vlan_t_cfi_set,
+    bcmpkt_vlan_t_pcp_set,
+    bcmpkt_vlan_t_tpid_set,
+    bcmpkt_vlan_t_vid_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_vlan_t_field_data[] = {
+    BCM56780_A0_DNA_2_9_5_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_vlan_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_VLAN_T_FID_COUNT,
+    .info = bcm56780_a0_dna_2_9_5_0_vlan_t_field_data,
+};
+
+
+static int32_t bcmpkt_vntag_t_tag_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_vntag_t_tag_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_vntag_t_tpid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vntag_t_tpid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_vntag_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_VNTAG_T_FID_COUNT] = {
+    bcmpkt_vntag_t_tag_get,
+    bcmpkt_vntag_t_tpid_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_vntag_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_VNTAG_T_FID_COUNT] = {
+    bcmpkt_vntag_t_tag_set,
+    bcmpkt_vntag_t_tpid_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_vntag_t_field_data[] = {
+    BCM56780_A0_DNA_2_9_5_0_BCMPKT_VNTAG_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_vntag_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_VNTAG_T_FID_COUNT,
+    .info = bcm56780_a0_dna_2_9_5_0_vntag_t_field_data,
+};
+
+
+static int32_t bcmpkt_vxlan_t_flags_reserved_1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_vxlan_t_flags_reserved_1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_vxlan_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vxlan_t_reserved2_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_vxlan_t_vn_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 8, 24);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vxlan_t_vn_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 8, 24, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_vxlan_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_VXLAN_T_FID_COUNT] = {
+    bcmpkt_vxlan_t_flags_reserved_1_get,
+    bcmpkt_vxlan_t_reserved2_get,
+    bcmpkt_vxlan_t_vn_id_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_vxlan_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_VXLAN_T_FID_COUNT] = {
+    bcmpkt_vxlan_t_flags_reserved_1_set,
+    bcmpkt_vxlan_t_reserved2_set,
+    bcmpkt_vxlan_t_vn_id_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_vxlan_t_field_data[] = {
+    BCM56780_A0_DNA_2_9_5_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_vxlan_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_VXLAN_T_FID_COUNT,
+    .info = bcm56780_a0_dna_2_9_5_0_vxlan_t_field_data,
+};
+
+
+static int32_t bcmpkt_wesp_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_header_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_header_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_spi_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_spi_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_trailer_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_trailer_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_wesp_iv_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_wesp_iv_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_dna_2_9_5_0_wesp_t_fget[BCM56780_A0_DNA_2_9_5_0_BCMPKT_WESP_T_FID_COUNT] = {
+    bcmpkt_wesp_t_flags_get,
+    bcmpkt_wesp_t_header_len_get,
+    bcmpkt_wesp_t_next_header_get,
+    bcmpkt_wesp_t_seq_num_get,
+    bcmpkt_wesp_t_spi_get,
+    bcmpkt_wesp_t_trailer_len_get,
+    bcmpkt_wesp_t_wesp_iv_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_dna_2_9_5_0_wesp_t_fset[BCM56780_A0_DNA_2_9_5_0_BCMPKT_WESP_T_FID_COUNT] = {
+    bcmpkt_wesp_t_flags_set,
+    bcmpkt_wesp_t_header_len_set,
+    bcmpkt_wesp_t_next_header_set,
+    bcmpkt_wesp_t_seq_num_set,
+    bcmpkt_wesp_t_spi_set,
+    bcmpkt_wesp_t_trailer_len_set,
+    bcmpkt_wesp_t_wesp_iv_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_dna_2_9_5_0_wesp_t_field_data[] = {
+    BCM56780_A0_DNA_2_9_5_0_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_dna_2_9_5_0_wesp_t_field_info = {
+    .num_fields = BCM56780_A0_DNA_2_9_5_0_BCMPKT_WESP_T_FID_COUNT,
+    .info = bcm56780_a0_dna_2_9_5_0_wesp_t_field_data,
+};
+
+static bcmpkt_flex_pmd_info_t bcm56780_a0_dna_2_9_5_0_flexhdr_info_list[BCM56780_A0_DNA_2_9_5_0_BCMPKT_FLEXHDR_COUNT] = {
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_dna_2_9_5_0_arp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_dna_2_9_5_0_arp_t_fget,
+        .flex_fset = bcm56780_a0_dna_2_9_5_0_arp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_dna_2_9_5_0_authen_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_dna_2_9_5_0_authen_t_fget,
+        .flex_fset = bcm56780_a0_dna_2_9_5_0_authen_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_dna_2_9_5_0_bfd_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_dna_2_9_5_0_bfd_t_fget,
+        .flex_fset = bcm56780_a0_dna_2_9_5_0_bfd_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_dna_2_9_5_0_cntag_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_dna_2_9_5_0_cntag_t_fget,
+        .flex_fset = bcm56780_a0_dna_2_9_5_0_cntag_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_dna_2_9_5_0_cpu_composites_0_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_dna_2_9_5_0_cpu_composites_0_t_fget,
+        .flex_fset = bcm56780_a0_dna_2_9_5_0_cpu_composites_0_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_dna_2_9_5_0_cpu_composites_1_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_dna_2_9_5_0_cpu_composites_1_t_fget,
+        .flex_fset = bcm56780_a0_dna_2_9_5_0_cpu_composites_1_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_dna_2_9_5_0_dest_option_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_dna_2_9_5_0_dest_option_t_fget,
+        .flex_fset = bcm56780_a0_dna_2_9_5_0_dest_option_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_dna_2_9_5_0_ep_nih_header_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_dna_2_9_5_0_ep_nih_header_t_fget,
+        .flex_fset = bcm56780_a0_dna_2_9_5_0_ep_nih_header_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_dna_2_9_5_0_erspan3_fixed_hdr_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_dna_2_9_5_0_erspan3_fixed_hdr_t_fget,
+        .flex_fset = bcm56780_a0_dna_2_9_5_0_erspan3_fixed_hdr_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_dna_2_9_5_0_erspan3_subhdr_5_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_dna_2_9_5_0_erspan3_subhdr_5_t_fget,
+        .flex_fset = bcm56780_a0_dna_2_9_5_0_erspan3_subhdr_5_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_dna_2_9_5_0_esp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_dna_2_9_5_0_esp_t_fget,
+        .flex_fset = bcm56780_a0_dna_2_9_5_0_esp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_dna_2_9_5_0_etag_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_dna_2_9_5_0_etag_t_fget,
+        .flex_fset = bcm56780_a0_dna_2_9_5_0_etag_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_dna_2_9_5_0_ethertype_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_dna_2_9_5_0_ethertype_t_fget,
+        .flex_fset = bcm56780_a0_dna_2_9_5_0_ethertype_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_dna_2_9_5_0_frag_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_dna_2_9_5_0_frag_t_fget,
+        .flex_fset = bcm56780_a0_dna_2_9_5_0_frag_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_dna_2_9_5_0_generic_loopback_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_dna_2_9_5_0_generic_loopback_t_fget,
+        .flex_fset = bcm56780_a0_dna_2_9_5_0_generic_loopback_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_dna_2_9_5_0_gpe_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_dna_2_9_5_0_gpe_t_fget,
+        .flex_fset = bcm56780_a0_dna_2_9_5_0_gpe_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_dna_2_9_5_0_gre_chksum_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_dna_2_9_5_0_gre_chksum_t_fget,
+        .flex_fset = bcm56780_a0_dna_2_9_5_0_gre_chksum_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_dna_2_9_5_0_gre_key_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_dna_2_9_5_0_gre_key_t_fget,
+        .flex_fset = bcm56780_a0_dna_2_9_5_0_gre_key_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_dna_2_9_5_0_gre_rout_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_dna_2_9_5_0_gre_rout_t_fget,
+        .flex_fset = bcm56780_a0_dna_2_9_5_0_gre_rout_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_dna_2_9_5_0_gre_seq_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_dna_2_9_5_0_gre_seq_t_fget,
+        .flex_fset = bcm56780_a0_dna_2_9_5_0_gre_seq_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_dna_2_9_5_0_gre_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_dna_2_9_5_0_gre_t_fget,
+        .flex_fset = bcm56780_a0_dna_2_9_5_0_gre_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_dna_2_9_5_0_hg3_base_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_dna_2_9_5_0_hg3_base_t_fget,
+        .flex_fset = bcm56780_a0_dna_2_9_5_0_hg3_base_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_dna_2_9_5_0_hg3_extension_0_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_dna_2_9_5_0_hg3_extension_0_t_fget,
+        .flex_fset = bcm56780_a0_dna_2_9_5_0_hg3_extension_0_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_dna_2_9_5_0_hop_by_hop_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_dna_2_9_5_0_hop_by_hop_t_fget,
+        .flex_fset = bcm56780_a0_dna_2_9_5_0_hop_by_hop_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_dna_2_9_5_0_icmp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_dna_2_9_5_0_icmp_t_fget,
+        .flex_fset = bcm56780_a0_dna_2_9_5_0_icmp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_dna_2_9_5_0_ifa_flex_md_0_a_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_dna_2_9_5_0_ifa_flex_md_0_a_t_fget,
+        .flex_fset = bcm56780_a0_dna_2_9_5_0_ifa_flex_md_0_a_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_dna_2_9_5_0_ifa_flex_md_0_b_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_dna_2_9_5_0_ifa_flex_md_0_b_t_fget,
+        .flex_fset = bcm56780_a0_dna_2_9_5_0_ifa_flex_md_0_b_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_dna_2_9_5_0_ifa_flex_md_1_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_dna_2_9_5_0_ifa_flex_md_1_t_fget,
+        .flex_fset = bcm56780_a0_dna_2_9_5_0_ifa_flex_md_1_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_dna_2_9_5_0_ifa_flex_md_2_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_dna_2_9_5_0_ifa_flex_md_2_t_fget,
+        .flex_fset = bcm56780_a0_dna_2_9_5_0_ifa_flex_md_2_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_dna_2_9_5_0_ifa_flex_md_3_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_dna_2_9_5_0_ifa_flex_md_3_t_fget,
+        .flex_fset = bcm56780_a0_dna_2_9_5_0_ifa_flex_md_3_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_dna_2_9_5_0_ifa_header_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_dna_2_9_5_0_ifa_header_t_fget,
+        .flex_fset = bcm56780_a0_dna_2_9_5_0_ifa_header_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_dna_2_9_5_0_ifa_md_base_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_dna_2_9_5_0_ifa_md_base_t_fget,
+        .flex_fset = bcm56780_a0_dna_2_9_5_0_ifa_md_base_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_dna_2_9_5_0_ifa_metadata_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_dna_2_9_5_0_ifa_metadata_t_fget,
+        .flex_fset = bcm56780_a0_dna_2_9_5_0_ifa_metadata_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_dna_2_9_5_0_igmp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_dna_2_9_5_0_igmp_t_fget,
+        .flex_fset = bcm56780_a0_dna_2_9_5_0_igmp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_dna_2_9_5_0_ipfix_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_dna_2_9_5_0_ipfix_t_fget,
+        .flex_fset = bcm56780_a0_dna_2_9_5_0_ipfix_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_dna_2_9_5_0_ipv4_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_dna_2_9_5_0_ipv4_t_fget,
+        .flex_fset = bcm56780_a0_dna_2_9_5_0_ipv4_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_dna_2_9_5_0_ipv6_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_dna_2_9_5_0_ipv6_t_fget,
+        .flex_fset = bcm56780_a0_dna_2_9_5_0_ipv6_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_dna_2_9_5_0_l2_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_dna_2_9_5_0_l2_t_fget,
+        .flex_fset = bcm56780_a0_dna_2_9_5_0_l2_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_dna_2_9_5_0_mirror_erspan_sn_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_dna_2_9_5_0_mirror_erspan_sn_t_fget,
+        .flex_fset = bcm56780_a0_dna_2_9_5_0_mirror_erspan_sn_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_dna_2_9_5_0_mirror_transport_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_dna_2_9_5_0_mirror_transport_t_fget,
+        .flex_fset = bcm56780_a0_dna_2_9_5_0_mirror_transport_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_dna_2_9_5_0_mpls_ach_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_dna_2_9_5_0_mpls_ach_t_fget,
+        .flex_fset = bcm56780_a0_dna_2_9_5_0_mpls_ach_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_dna_2_9_5_0_mpls_bv_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_dna_2_9_5_0_mpls_bv_t_fget,
+        .flex_fset = bcm56780_a0_dna_2_9_5_0_mpls_bv_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_dna_2_9_5_0_mpls_cw_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_dna_2_9_5_0_mpls_cw_t_fget,
+        .flex_fset = bcm56780_a0_dna_2_9_5_0_mpls_cw_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_dna_2_9_5_0_mpls_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_dna_2_9_5_0_mpls_t_fget,
+        .flex_fset = bcm56780_a0_dna_2_9_5_0_mpls_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_dna_2_9_5_0_p_1588_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_dna_2_9_5_0_p_1588_t_fget,
+        .flex_fset = bcm56780_a0_dna_2_9_5_0_p_1588_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_dna_2_9_5_0_prog_ext_hdr_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_dna_2_9_5_0_prog_ext_hdr_t_fget,
+        .flex_fset = bcm56780_a0_dna_2_9_5_0_prog_ext_hdr_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_dna_2_9_5_0_psamp_0_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_dna_2_9_5_0_psamp_0_t_fget,
+        .flex_fset = bcm56780_a0_dna_2_9_5_0_psamp_0_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_dna_2_9_5_0_psamp_1_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_dna_2_9_5_0_psamp_1_t_fget,
+        .flex_fset = bcm56780_a0_dna_2_9_5_0_psamp_1_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_dna_2_9_5_0_psamp_mirror_on_drop_0_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_dna_2_9_5_0_psamp_mirror_on_drop_0_t_fget,
+        .flex_fset = bcm56780_a0_dna_2_9_5_0_psamp_mirror_on_drop_0_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_dna_2_9_5_0_psamp_mirror_on_drop_1_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_dna_2_9_5_0_psamp_mirror_on_drop_1_t_fget,
+        .flex_fset = bcm56780_a0_dna_2_9_5_0_psamp_mirror_on_drop_1_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_dna_2_9_5_0_psamp_mirror_on_drop_2_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_dna_2_9_5_0_psamp_mirror_on_drop_2_t_fget,
+        .flex_fset = bcm56780_a0_dna_2_9_5_0_psamp_mirror_on_drop_2_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_dna_2_9_5_0_rarp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_dna_2_9_5_0_rarp_t_fget,
+        .flex_fset = bcm56780_a0_dna_2_9_5_0_rarp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_dna_2_9_5_0_routing_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_dna_2_9_5_0_routing_t_fget,
+        .flex_fset = bcm56780_a0_dna_2_9_5_0_routing_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_dna_2_9_5_0_rspan_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_dna_2_9_5_0_rspan_t_fget,
+        .flex_fset = bcm56780_a0_dna_2_9_5_0_rspan_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_dna_2_9_5_0_sflow_shim_0_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_dna_2_9_5_0_sflow_shim_0_t_fget,
+        .flex_fset = bcm56780_a0_dna_2_9_5_0_sflow_shim_0_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_dna_2_9_5_0_sflow_shim_1_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_dna_2_9_5_0_sflow_shim_1_t_fget,
+        .flex_fset = bcm56780_a0_dna_2_9_5_0_sflow_shim_1_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_dna_2_9_5_0_sflow_shim_2_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_dna_2_9_5_0_sflow_shim_2_t_fget,
+        .flex_fset = bcm56780_a0_dna_2_9_5_0_sflow_shim_2_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_dna_2_9_5_0_snap_llc_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_dna_2_9_5_0_snap_llc_t_fget,
+        .flex_fset = bcm56780_a0_dna_2_9_5_0_snap_llc_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_dna_2_9_5_0_svtag_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_dna_2_9_5_0_svtag_t_fget,
+        .flex_fset = bcm56780_a0_dna_2_9_5_0_svtag_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_dna_2_9_5_0_tcp_first_4bytes_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_dna_2_9_5_0_tcp_first_4bytes_t_fget,
+        .flex_fset = bcm56780_a0_dna_2_9_5_0_tcp_first_4bytes_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_dna_2_9_5_0_tcp_last_16bytes_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_dna_2_9_5_0_tcp_last_16bytes_t_fget,
+        .flex_fset = bcm56780_a0_dna_2_9_5_0_tcp_last_16bytes_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_dna_2_9_5_0_udp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_dna_2_9_5_0_udp_t_fget,
+        .flex_fset = bcm56780_a0_dna_2_9_5_0_udp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_dna_2_9_5_0_unknown_l3_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_dna_2_9_5_0_unknown_l3_t_fget,
+        .flex_fset = bcm56780_a0_dna_2_9_5_0_unknown_l3_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_dna_2_9_5_0_unknown_l4_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_dna_2_9_5_0_unknown_l4_t_fget,
+        .flex_fset = bcm56780_a0_dna_2_9_5_0_unknown_l4_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_dna_2_9_5_0_unknown_l5_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_dna_2_9_5_0_unknown_l5_t_fget,
+        .flex_fset = bcm56780_a0_dna_2_9_5_0_unknown_l5_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_dna_2_9_5_0_vlan_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_dna_2_9_5_0_vlan_t_fget,
+        .flex_fset = bcm56780_a0_dna_2_9_5_0_vlan_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_dna_2_9_5_0_vntag_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_dna_2_9_5_0_vntag_t_fget,
+        .flex_fset = bcm56780_a0_dna_2_9_5_0_vntag_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_dna_2_9_5_0_vxlan_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_dna_2_9_5_0_vxlan_t_fget,
+        .flex_fset = bcm56780_a0_dna_2_9_5_0_vxlan_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_dna_2_9_5_0_wesp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_dna_2_9_5_0_wesp_t_fget,
+        .flex_fset = bcm56780_a0_dna_2_9_5_0_wesp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_dna_2_9_5_0_rxpmd_flex_field_info,
+        .reasons_info = &bcm56780_a0_dna_2_9_5_0_rxpmd_flex_reasons_info,
+        .flex_common_fget = bcm56780_a0_rxpmd_flex_fget,
+        .flex_common_fset = bcm56780_a0_rxpmd_flex_fset,
+    },
+};
+
+static shr_enum_map_t bcm56780_a0_dna_2_9_5_0_flexhdr_id_map[] = {
+    BCM56780_A0_DNA_2_9_5_0_BCMPKT_FLEXHDR_NAME_MAP_INIT
+};
+
+shr_enum_map_t * bcm56780_a0_dna_2_9_5_0_flexhdr_map_get(void)
+{
+    return bcm56780_a0_dna_2_9_5_0_flexhdr_id_map;
+}
+
+bcmpkt_flex_pmd_info_t * bcm56780_a0_dna_2_9_5_0_flex_pmd_info_get(uint32_t hid)
+{
+    if (hid >= BCM56780_A0_DNA_2_9_5_0_BCMPKT_FLEXHDR_COUNT) {
+        return NULL;
+    }
+
+    return &bcm56780_a0_dna_2_9_5_0_flexhdr_info_list[hid];
+}
+
+int bcm56780_a0_dna_2_9_5_0_flexhdr_variant_support_map[BCMPKT_PMD_COUNT] = {
+    14,
+    21,
+    22,
+    69,
+};
\ No newline at end of file
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_bcmpkt_rxpmd_match_id.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_bcmpkt_rxpmd_match_id.c
new file mode 100644
index 000000000..3998c1057
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_bcmpkt_rxpmd_match_id.c
@@ -0,0 +1,2480 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) bcm56780_a0_hna_6_5_29_2_1_sf_match_id_info.yml
+ * for device bcm56780_a0 and variant hna_6_5_29_2_1.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+
+#include <bcmpkt/bcmpkt_rxpmd_match_id.h>
+#include <bcmpkt/xfcr/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_bcmpkt_rxpmd_match_id_defs.h>
+
+
+static bcmpkt_rxpmd_match_id_db_t
+bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_COUNT] = {
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_ETAG",
+        .match        = 0x40,
+        .match_mask   = 0x60,
+        .match_maxbit = 29,
+        .match_minbit = 23,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x2,
+        .pmaxbit      = 41,
+        .pminbit      = 35,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_ITAG",
+        .match        = 0x10,
+        .match_mask   = 0x10,
+        .match_maxbit = 29,
+        .match_minbit = 23,
+        .maxbit       = 4,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 41,
+        .pminbit      = 35,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_L2",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 29,
+        .match_minbit = 23,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 41,
+        .pminbit      = 35,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x7f,
+        .match_maxbit = 29,
+        .match_minbit = 23,
+        .maxbit       = 6,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 41,
+        .pminbit      = 35,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_OTAG",
+        .match        = 0x8,
+        .match_mask   = 0x8,
+        .match_maxbit = 29,
+        .match_minbit = 23,
+        .maxbit       = 3,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 41,
+        .pminbit      = 35,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC",
+        .match        = 0x2,
+        .match_mask   = 0x2,
+        .match_maxbit = 29,
+        .match_minbit = 23,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 41,
+        .pminbit      = 35,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SVTAG */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_SVTAG",
+        .match        = 0x4,
+        .match_mask   = 0x4,
+        .match_maxbit = 29,
+        .match_minbit = 23,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 41,
+        .pminbit      = 35,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_VNTAG",
+        .match        = 0x20,
+        .match_mask   = 0x60,
+        .match_maxbit = 29,
+        .match_minbit = 23,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 41,
+        .pminbit      = 35,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ARP",
+        .match        = 0x1800,
+        .match_mask   = 0x3830,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x3,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1",
+        .match        = 0x80,
+        .match_mask   = 0x1c2,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2",
+        .match        = 0x408,
+        .match_mask   = 0x64c,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x2,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_BFD",
+        .match        = 0x3800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x7,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT",
+        .match        = 0x200,
+        .match_mask   = 0x642,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1",
+        .match        = 0x100,
+        .match_mask   = 0x1c0,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x2,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2",
+        .match        = 0x600,
+        .match_mask   = 0x640,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x3,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GPE",
+        .match        = 0x1830,
+        .match_mask   = 0x3870,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x3,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE",
+        .match        = 0x2,
+        .match_mask   = 0x42,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM",
+        .match        = 0x202,
+        .match_mask   = 0x642,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY",
+        .match        = 0x1000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x2,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT",
+        .match        = 0x82,
+        .match_mask   = 0x1c2,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ",
+        .match        = 0x12,
+        .match_mask   = 0x72,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ICMP",
+        .match        = 0x2000,
+        .match_mask   = 0x3830,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x4,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA",
+        .match        = 0x180,
+        .match_mask   = 0x1c0,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x3,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IGMP",
+        .match        = 0x404,
+        .match_mask   = 0x64c,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x2,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IPV4",
+        .match        = 0x4,
+        .match_mask   = 0x4c,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 3,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IPV6",
+        .match        = 0x8,
+        .match_mask   = 0x4c,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 3,
+        .minbit       = 2,
+        .value        = 0x2,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS0",
+        .match        = 0x40,
+        .match_mask   = 0x40,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 6,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS1",
+        .match        = 0x42,
+        .match_mask   = 0x42,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS2",
+        .match        = 0x44,
+        .match_mask   = 0x44,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS3",
+        .match        = 0x48,
+        .match_mask   = 0x48,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 3,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS4",
+        .match        = 0x50,
+        .match_mask   = 0x50,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 4,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS5",
+        .match        = 0x60,
+        .match_mask   = 0x60,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS6",
+        .match        = 0xc0,
+        .match_mask   = 0xc0,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 7,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH",
+        .match        = 0x140,
+        .match_mask   = 0x140,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 8,
+        .minbit       = 8,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW",
+        .match        = 0x240,
+        .match_mask   = 0x240,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 9,
+        .minbit       = 9,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x3fff,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 13,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_P_1588",
+        .match        = 0x3000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x6,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_RARP",
+        .match        = 0x800,
+        .match_mask   = 0x3830,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES",
+        .match        = 0x20,
+        .match_mask   = 0x70,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x2,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES",
+        .match        = 0x820,
+        .match_mask   = 0x3870,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UDP",
+        .match        = 0x30,
+        .match_mask   = 0x70,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x3,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3",
+        .match        = 0x10,
+        .match_mask   = 0x72,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4",
+        .match        = 0x2800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x5,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5",
+        .match        = 0x2030,
+        .match_mask   = 0x3870,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x4,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_VXLAN",
+        .match        = 0x830,
+        .match_mask   = 0x3870,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH */
+        .name         = "EGRESS_PKT_SYS_HDR_EP_NIH",
+        .match        = 0x2,
+        .match_mask   = 0x3,
+        .match_maxbit = 1,
+        .match_minbit = 0,
+        .maxbit       = 1,
+        .minbit       = 0,
+        .value        = 0x2,
+        .pmaxbit      = 1,
+        .pminbit      = 0,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK */
+        .name         = "EGRESS_PKT_SYS_HDR_LOOPBACK",
+        .match        = 0x1,
+        .match_mask   = 0x3,
+        .match_maxbit = 1,
+        .match_minbit = 0,
+        .maxbit       = 1,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 1,
+        .pminbit      = 0,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE */
+        .name         = "EGRESS_PKT_SYS_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x3,
+        .match_maxbit = 1,
+        .match_minbit = 0,
+        .maxbit       = 1,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 1,
+        .pminbit      = 0,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_ETAG",
+        .match        = 0x40,
+        .match_mask   = 0x60,
+        .match_maxbit = 8,
+        .match_minbit = 2,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x2,
+        .pmaxbit      = 13,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_ITAG",
+        .match        = 0x10,
+        .match_mask   = 0x10,
+        .match_maxbit = 8,
+        .match_minbit = 2,
+        .maxbit       = 4,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 13,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_L2",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 8,
+        .match_minbit = 2,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 13,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x7f,
+        .match_maxbit = 8,
+        .match_minbit = 2,
+        .maxbit       = 6,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 13,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_OTAG",
+        .match        = 0x8,
+        .match_mask   = 0x8,
+        .match_maxbit = 8,
+        .match_minbit = 2,
+        .maxbit       = 3,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 13,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC",
+        .match        = 0x2,
+        .match_mask   = 0x2,
+        .match_maxbit = 8,
+        .match_minbit = 2,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 13,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SVTAG */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_SVTAG",
+        .match        = 0x4,
+        .match_mask   = 0x4,
+        .match_maxbit = 8,
+        .match_minbit = 2,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 13,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_VNTAG",
+        .match        = 0x20,
+        .match_mask   = 0x60,
+        .match_maxbit = 8,
+        .match_minbit = 2,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 13,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP",
+        .match        = 0x1800,
+        .match_mask   = 0x3830,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x3,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1",
+        .match        = 0x80,
+        .match_mask   = 0x1c2,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2",
+        .match        = 0x408,
+        .match_mask   = 0x64c,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x2,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD",
+        .match        = 0x3800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x7,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT",
+        .match        = 0x200,
+        .match_mask   = 0x642,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1",
+        .match        = 0x100,
+        .match_mask   = 0x1c0,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x2,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2",
+        .match        = 0x600,
+        .match_mask   = 0x640,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x3,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE",
+        .match        = 0x1830,
+        .match_mask   = 0x3870,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x3,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE",
+        .match        = 0x2,
+        .match_mask   = 0x42,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM",
+        .match        = 0x202,
+        .match_mask   = 0x642,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY",
+        .match        = 0x1000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x2,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT",
+        .match        = 0x82,
+        .match_mask   = 0x1c2,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ",
+        .match        = 0x12,
+        .match_mask   = 0x72,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP",
+        .match        = 0x2000,
+        .match_mask   = 0x3830,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x4,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA",
+        .match        = 0x180,
+        .match_mask   = 0x1c0,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x3,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP",
+        .match        = 0x404,
+        .match_mask   = 0x64c,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x2,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4",
+        .match        = 0x4,
+        .match_mask   = 0x4c,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 3,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6",
+        .match        = 0x8,
+        .match_mask   = 0x4c,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 3,
+        .minbit       = 2,
+        .value        = 0x2,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0",
+        .match        = 0x40,
+        .match_mask   = 0x40,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 6,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1",
+        .match        = 0x42,
+        .match_mask   = 0x42,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2",
+        .match        = 0x44,
+        .match_mask   = 0x44,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3",
+        .match        = 0x48,
+        .match_mask   = 0x48,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 3,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4",
+        .match        = 0x50,
+        .match_mask   = 0x50,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 4,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5",
+        .match        = 0x60,
+        .match_mask   = 0x60,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6",
+        .match        = 0xc0,
+        .match_mask   = 0xc0,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 7,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH",
+        .match        = 0x140,
+        .match_mask   = 0x140,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 8,
+        .minbit       = 8,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW",
+        .match        = 0x240,
+        .match_mask   = 0x240,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 9,
+        .minbit       = 9,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x3fff,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588",
+        .match        = 0x3000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x6,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP",
+        .match        = 0x800,
+        .match_mask   = 0x3830,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES",
+        .match        = 0x20,
+        .match_mask   = 0x70,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x2,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES",
+        .match        = 0x820,
+        .match_mask   = 0x3870,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP",
+        .match        = 0x30,
+        .match_mask   = 0x70,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x3,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3",
+        .match        = 0x10,
+        .match_mask   = 0x72,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4",
+        .match        = 0x2800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x5,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5",
+        .match        = 0x2030,
+        .match_mask   = 0x3870,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x4,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN",
+        .match        = 0x830,
+        .match_mask   = 0x3870,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_ETAG",
+        .match        = 0x40,
+        .match_mask   = 0x60,
+        .match_maxbit = 29,
+        .match_minbit = 23,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x2,
+        .pmaxbit      = 29,
+        .pminbit      = 23,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_ITAG",
+        .match        = 0x10,
+        .match_mask   = 0x10,
+        .match_maxbit = 29,
+        .match_minbit = 23,
+        .maxbit       = 4,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 29,
+        .pminbit      = 23,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_L2",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 29,
+        .match_minbit = 23,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 29,
+        .pminbit      = 23,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x7f,
+        .match_maxbit = 29,
+        .match_minbit = 23,
+        .maxbit       = 6,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 29,
+        .pminbit      = 23,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_OTAG",
+        .match        = 0x8,
+        .match_mask   = 0x8,
+        .match_maxbit = 29,
+        .match_minbit = 23,
+        .maxbit       = 3,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 29,
+        .pminbit      = 23,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC",
+        .match        = 0x2,
+        .match_mask   = 0x2,
+        .match_maxbit = 29,
+        .match_minbit = 23,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 29,
+        .pminbit      = 23,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_VNTAG",
+        .match        = 0x20,
+        .match_mask   = 0x60,
+        .match_maxbit = 29,
+        .match_minbit = 23,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 29,
+        .pminbit      = 23,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ARP",
+        .match        = 0x1800,
+        .match_mask   = 0x3830,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x3,
+        .pmaxbit      = 43,
+        .pminbit      = 30,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1",
+        .match        = 0x80,
+        .match_mask   = 0x1c2,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 43,
+        .pminbit      = 30,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2",
+        .match        = 0x408,
+        .match_mask   = 0x64c,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x2,
+        .pmaxbit      = 43,
+        .pminbit      = 30,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_BFD",
+        .match        = 0x3800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x7,
+        .pmaxbit      = 43,
+        .pminbit      = 30,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT",
+        .match        = 0x200,
+        .match_mask   = 0x642,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x1,
+        .pmaxbit      = 43,
+        .pminbit      = 30,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 43,
+        .pminbit      = 30,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1",
+        .match        = 0x100,
+        .match_mask   = 0x1c0,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x2,
+        .pmaxbit      = 43,
+        .pminbit      = 30,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2",
+        .match        = 0x600,
+        .match_mask   = 0x640,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x3,
+        .pmaxbit      = 43,
+        .pminbit      = 30,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ICMP",
+        .match        = 0x2000,
+        .match_mask   = 0x3830,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x4,
+        .pmaxbit      = 43,
+        .pminbit      = 30,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA",
+        .match        = 0x180,
+        .match_mask   = 0x1c0,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x3,
+        .pmaxbit      = 43,
+        .pminbit      = 30,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IGMP",
+        .match        = 0x404,
+        .match_mask   = 0x64c,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x2,
+        .pmaxbit      = 43,
+        .pminbit      = 30,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IPV4",
+        .match        = 0x4,
+        .match_mask   = 0x4c,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 3,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 43,
+        .pminbit      = 30,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IPV6",
+        .match        = 0x8,
+        .match_mask   = 0x4c,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 3,
+        .minbit       = 2,
+        .value        = 0x2,
+        .pmaxbit      = 43,
+        .pminbit      = 30,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x3fff,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 13,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 43,
+        .pminbit      = 30,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_P_1588",
+        .match        = 0x3000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x6,
+        .pmaxbit      = 43,
+        .pminbit      = 30,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_RARP",
+        .match        = 0x800,
+        .match_mask   = 0x3830,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 43,
+        .pminbit      = 30,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES",
+        .match        = 0x20,
+        .match_mask   = 0x70,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x2,
+        .pmaxbit      = 43,
+        .pminbit      = 30,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES",
+        .match        = 0x820,
+        .match_mask   = 0x3870,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 43,
+        .pminbit      = 30,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UDP",
+        .match        = 0x30,
+        .match_mask   = 0x70,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x3,
+        .pmaxbit      = 43,
+        .pminbit      = 30,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3",
+        .match        = 0x10,
+        .match_mask   = 0x72,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 43,
+        .pminbit      = 30,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4",
+        .match        = 0x2800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x5,
+        .pmaxbit      = 43,
+        .pminbit      = 30,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5",
+        .match        = 0x2030,
+        .match_mask   = 0x3870,
+        .match_maxbit = 43,
+        .match_minbit = 30,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x4,
+        .pmaxbit      = 43,
+        .pminbit      = 30,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_ETAG",
+        .match        = 0x40,
+        .match_mask   = 0x60,
+        .match_maxbit = 8,
+        .match_minbit = 2,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x2,
+        .pmaxbit      = 8,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_ITAG",
+        .match        = 0x10,
+        .match_mask   = 0x10,
+        .match_maxbit = 8,
+        .match_minbit = 2,
+        .maxbit       = 4,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 8,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_L2",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 8,
+        .match_minbit = 2,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 8,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x7f,
+        .match_maxbit = 8,
+        .match_minbit = 2,
+        .maxbit       = 6,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 8,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_OTAG",
+        .match        = 0x8,
+        .match_mask   = 0x8,
+        .match_maxbit = 8,
+        .match_minbit = 2,
+        .maxbit       = 3,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 8,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC",
+        .match        = 0x2,
+        .match_mask   = 0x2,
+        .match_maxbit = 8,
+        .match_minbit = 2,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 8,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SVTAG */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_SVTAG",
+        .match        = 0x4,
+        .match_mask   = 0x4,
+        .match_maxbit = 8,
+        .match_minbit = 2,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 8,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_VNTAG",
+        .match        = 0x20,
+        .match_mask   = 0x60,
+        .match_maxbit = 8,
+        .match_minbit = 2,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 8,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ARP",
+        .match        = 0x1800,
+        .match_mask   = 0x3830,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x3,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1",
+        .match        = 0x80,
+        .match_mask   = 0x1c2,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2",
+        .match        = 0x408,
+        .match_mask   = 0x64c,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x2,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_BFD",
+        .match        = 0x3800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x7,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT",
+        .match        = 0x200,
+        .match_mask   = 0x642,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1",
+        .match        = 0x100,
+        .match_mask   = 0x1c0,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x2,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2",
+        .match        = 0x600,
+        .match_mask   = 0x640,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x3,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GPE",
+        .match        = 0x1830,
+        .match_mask   = 0x3870,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x3,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE",
+        .match        = 0x2,
+        .match_mask   = 0x42,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM",
+        .match        = 0x202,
+        .match_mask   = 0x642,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY",
+        .match        = 0x1000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x2,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT",
+        .match        = 0x82,
+        .match_mask   = 0x1c2,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ",
+        .match        = 0x12,
+        .match_mask   = 0x72,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ICMP",
+        .match        = 0x2000,
+        .match_mask   = 0x3830,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x4,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA",
+        .match        = 0x180,
+        .match_mask   = 0x1c0,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x3,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IGMP",
+        .match        = 0x404,
+        .match_mask   = 0x64c,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x2,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV4",
+        .match        = 0x4,
+        .match_mask   = 0x4c,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 3,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV6",
+        .match        = 0x8,
+        .match_mask   = 0x4c,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 3,
+        .minbit       = 2,
+        .value        = 0x2,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0",
+        .match        = 0x40,
+        .match_mask   = 0x40,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 6,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1",
+        .match        = 0x42,
+        .match_mask   = 0x42,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2",
+        .match        = 0x44,
+        .match_mask   = 0x44,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3",
+        .match        = 0x48,
+        .match_mask   = 0x48,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 3,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4",
+        .match        = 0x50,
+        .match_mask   = 0x50,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 4,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5",
+        .match        = 0x60,
+        .match_mask   = 0x60,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6",
+        .match        = 0xc0,
+        .match_mask   = 0xc0,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 7,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH",
+        .match        = 0x140,
+        .match_mask   = 0x140,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 8,
+        .minbit       = 8,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW",
+        .match        = 0x240,
+        .match_mask   = 0x240,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 9,
+        .minbit       = 9,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x3fff,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_P_1588",
+        .match        = 0x3000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x6,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_RARP",
+        .match        = 0x800,
+        .match_mask   = 0x3830,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES",
+        .match        = 0x20,
+        .match_mask   = 0x70,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x2,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES",
+        .match        = 0x820,
+        .match_mask   = 0x3870,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UDP",
+        .match        = 0x30,
+        .match_mask   = 0x70,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x3,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3",
+        .match        = 0x10,
+        .match_mask   = 0x72,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4",
+        .match        = 0x2800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x5,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5",
+        .match        = 0x2030,
+        .match_mask   = 0x3870,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x4,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN",
+        .match        = 0x830,
+        .match_mask   = 0x3870,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH */
+        .name         = "INGRESS_PKT_SYS_HDR_EP_NIH",
+        .match        = 0x2,
+        .match_mask   = 0x3,
+        .match_maxbit = 1,
+        .match_minbit = 0,
+        .maxbit       = 1,
+        .minbit       = 0,
+        .value        = 0x2,
+        .pmaxbit      = 1,
+        .pminbit      = 0,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK */
+        .name         = "INGRESS_PKT_SYS_HDR_LOOPBACK",
+        .match        = 0x1,
+        .match_mask   = 0x3,
+        .match_maxbit = 1,
+        .match_minbit = 0,
+        .maxbit       = 1,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 1,
+        .pminbit      = 0,
+
+    },
+    {
+        /* BCM56780_A0_HNA_6_5_29_2_1_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE */
+        .name         = "INGRESS_PKT_SYS_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x3,
+        .match_maxbit = 1,
+        .match_minbit = 0,
+        .maxbit       = 1,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 1,
+        .pminbit      = 0,
+
+    },
+};
+
+static bcmpkt_rxpmd_match_id_db_info_t bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db_info = {
+    .num_entries = 173,
+    .db = bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db
+};
+bcmpkt_rxpmd_match_id_db_info_t * bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db_info_get(void) {
+    return &bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_db_info;
+}
+
+static shr_enum_map_t bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_map[] = {
+    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_rxpmd_match_id_map_info_t bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_map_info = {
+    .num_entries = 173,
+    .map = bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_map
+};
+
+bcmpkt_rxpmd_match_id_map_info_t * bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_map_info_get(void) {
+    return &bcm56780_a0_hna_6_5_29_2_1_rxpmd_match_id_map_info;
+}
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_pkt_flexhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_pkt_flexhdr.c
new file mode 100644
index 000000000..a07337a41
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_pkt_flexhdr.c
@@ -0,0 +1,8370 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) map.yml
+ * for device bcm56780_a0 and variant hna_6_5_29_2_1.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#include <sal/sal_types.h>
+#include <shr/shr_error.h>
+#include <bcmpkt/bcmpkt_flexhdr.h>
+#include <bcmpkt/chip/bcm56780_a0/bcmpkt_bcm56780_a0_rxpmd.h>
+#include <bcmpkt/xfcr/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_bcmpkt_flexhdr.h>
+#include <bcmpkt/xfcr/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_bcmpkt_flexhdr_data.h>
+#include <bcmpkt/xfcr/bcm56780_a0/hna_6_5_29_2_1/bcm56780_a0_hna_6_5_29_2_1_bcmpkt_rxpmd_flex_data.h>
+
+#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1)
+#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l))
+#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s)))
+#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s)))
+
+static void bcm56780_a0_hna_6_5_29_2_1_rxpmd_flex_reason_decode(uint32_t *data, bcmpkt_bitmap_t *reasons)
+{
+    uint32_t *reason = data + 0;
+
+    if (reason[13] & (0x1 << 0)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU);
+    }
+    if (reason[13] & (0x1 << 1)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS);
+    }
+    if (reason[13] & (0x1 << 2)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE);
+    }
+    if (reason[13] & (0x1 << 3)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT);
+    }
+    if (reason[13] & (0x1 << 4)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD);
+    }
+    if (reason[13] & (0x1 << 5)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED);
+    }
+    if (reason[13] & (0x1 << 6)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT);
+    }
+    if (reason[13] & (0x1 << 7)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD);
+    }
+    if (reason[13] & (0x1 << 8)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD);
+    }
+    if (reason[13] & (0x1 << 9)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS);
+    }
+    if (reason[13] & (0x1 << 10)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP);
+    }
+    if (reason[13] & (0x1 << 11)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS);
+    }
+    if (reason[13] & (0x1 << 12)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP);
+    }
+    if (reason[13] & (0x1 << 13)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR);
+    }
+    if (reason[13] & (0x1 << 14)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR);
+    }
+    if (reason[13] & (0x1 << 15)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED);
+    }
+    if (reason[13] & (0x1 << 16)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL);
+    }
+    if (reason[13] & (0x1 << 17)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_VFP);
+    }
+    if (reason[13] & (0x1 << 18)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_IFP);
+    }
+    if (reason[13] & (0x1 << 19)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_IFP_METER);
+    }
+    if (reason[13] & (0x1 << 20)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_DST_FP);
+    }
+    if (reason[13] & (0x1 << 21)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_SVP);
+    }
+    if (reason[13] & (0x1 << 22)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_EM_FT);
+    }
+    if (reason[13] & (0x1 << 23)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_IVXLT);
+    }
+    if (reason[13] & (0x1 << 24)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED);
+    }
+    if (reason[13] & (0x1 << 25)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED);
+    }
+    if (reason[13] & (0x1 << 26)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_SER_DROP);
+    }
+    if (reason[13] & (0x1 << 27)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED);
+    }
+    if (reason[13] & (0x1 << 28)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF);
+    }
+    if (reason[13] & (0x1 << 29)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED);
+    }
+    if (reason[13] & (0x1 << 30)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED);
+    }
+    if (reason[13] & (0x1 << 31)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU);
+    }
+    if (reason[12] & (0x1 << 0)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0);
+    }
+    if (reason[12] & (0x1 << 1)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1);
+    }
+    if (reason[12] & (0x1 << 2)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2);
+    }
+    if (reason[12] & (0x1 << 3)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3);
+    }
+    if (reason[12] & (0x1 << 4)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4);
+    }
+    if (reason[12] & (0x1 << 5)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5);
+    }
+    if (reason[12] & (0x1 << 6)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6);
+    }
+    if (reason[12] & (0x1 << 7)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7);
+    }
+    if (reason[12] & (0x1 << 8)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MTOP_IPV4_GATEWAY);
+    }
+    if (reason[12] & (0x1 << 9)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED);
+    }
+    if (reason[12] & (0x1 << 10)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED);
+    }
+    if (reason[12] & (0x1 << 11)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE);
+    }
+    if (reason[12] & (0x1 << 12)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR);
+    }
+    if (reason[12] & (0x1 << 13)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU);
+    }
+    if (reason[12] & (0x1 << 15)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP);
+    }
+}
+
+static void bcm56780_a0_hna_6_5_29_2_1_rxpmd_flex_reason_encode(bcmpkt_bitmap_t *reasons, uint32_t *data)
+{
+    uint32_t *reason = data + 0;
+
+    reason[13] = 0;
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU)) {
+        reason[13] |= (0x1 << 0);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS)) {
+        reason[13] |= (0x1 << 1);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE)) {
+        reason[13] |= (0x1 << 2);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT)) {
+        reason[13] |= (0x1 << 3);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD)) {
+        reason[13] |= (0x1 << 4);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED)) {
+        reason[13] |= (0x1 << 5);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT)) {
+        reason[13] |= (0x1 << 6);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD)) {
+        reason[13] |= (0x1 << 7);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD)) {
+        reason[13] |= (0x1 << 8);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS)) {
+        reason[13] |= (0x1 << 9);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP)) {
+        reason[13] |= (0x1 << 10);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS)) {
+        reason[13] |= (0x1 << 11);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP)) {
+        reason[13] |= (0x1 << 12);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR)) {
+        reason[13] |= (0x1 << 13);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR)) {
+        reason[13] |= (0x1 << 14);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED)) {
+        reason[13] |= (0x1 << 15);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL)) {
+        reason[13] |= (0x1 << 16);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_VFP)) {
+        reason[13] |= (0x1 << 17);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_IFP)) {
+        reason[13] |= (0x1 << 18);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_IFP_METER)) {
+        reason[13] |= (0x1 << 19);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_DST_FP)) {
+        reason[13] |= (0x1 << 20);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_SVP)) {
+        reason[13] |= (0x1 << 21);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_EM_FT)) {
+        reason[13] |= (0x1 << 22);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_IVXLT)) {
+        reason[13] |= (0x1 << 23);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED)) {
+        reason[13] |= (0x1 << 24);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED)) {
+        reason[13] |= (0x1 << 25);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_SER_DROP)) {
+        reason[13] |= (0x1 << 26);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED)) {
+        reason[13] |= (0x1 << 27);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF)) {
+        reason[13] |= (0x1 << 28);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED)) {
+        reason[13] |= (0x1 << 29);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED)) {
+        reason[13] |= (0x1 << 30);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU)) {
+        reason[13] |= (0x1 << 31);
+    }
+    reason[12] = 0;
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0)) {
+        reason[12] |= (0x1 << 0);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1)) {
+        reason[12] |= (0x1 << 1);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2)) {
+        reason[12] |= (0x1 << 2);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3)) {
+        reason[12] |= (0x1 << 3);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4)) {
+        reason[12] |= (0x1 << 4);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5)) {
+        reason[12] |= (0x1 << 5);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6)) {
+        reason[12] |= (0x1 << 6);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7)) {
+        reason[12] |= (0x1 << 7);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_MTOP_IPV4_GATEWAY)) {
+        reason[12] |= (0x1 << 8);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED)) {
+        reason[12] |= (0x1 << 9);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED)) {
+        reason[12] |= (0x1 << 10);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE)) {
+        reason[12] |= (0x1 << 11);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR)) {
+        reason[12] |= (0x1 << 12);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU)) {
+        reason[12] |= (0x1 << 13);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP)) {
+        reason[12] |= (0x1 << 15);
+    }
+}
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_rxpmd_flex_field_data[] = {
+    {
+        .name = "DLB_ECMP_DESTINATION_15_0",
+        .fid = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { -1, -1 }, /* Profile 2. */
+            { -1, -1 }, /* Profile 3. */
+            { -1, -1 }, /* Profile 4. */
+            { -1, -1 }, /* Profile 5. */
+            { -1, -1 }, /* Profile 6. */
+            { -1, -1 }, /* Profile 7. */
+            { -1, -1 }, /* Profile 8. */
+            { -1, -1 }, /* Profile 9. */
+            { -1, -1 }, /* Profile 10. */
+            { -1, -1 }, /* Profile 11. */
+            { 80, 95 }, /* Profile 12. */
+            { 80, 95 }, /* Profile 13. */
+            { 80, 95 }, /* Profile 14. */
+            { 80, 95 }, /* Profile 15. */
+            { 80, 95 }, /* Profile 16. */
+            { 80, 95 }, /* Profile 17. */
+            { 80, 95 }, /* Profile 18. */
+            { 80, 95 }, /* Profile 19. */
+            { 80, 95 }, /* Profile 20. */
+            { 80, 95 }, /* Profile 21. */
+        },
+        .profile_cnt = 22,
+    },
+    {
+        .name = "DROP_CODE_15_0",
+        .fid = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 48, 63 }, /* Profile 2. */
+            { 48, 63 }, /* Profile 3. */
+            { 48, 63 }, /* Profile 4. */
+            { 48, 63 }, /* Profile 5. */
+            { -1, -1 }, /* Profile 6. */
+            { -1, -1 }, /* Profile 7. */
+            { -1, -1 }, /* Profile 8. */
+            { -1, -1 }, /* Profile 9. */
+            { 48, 63 }, /* Profile 10. */
+            { 48, 63 }, /* Profile 11. */
+            { 48, 63 }, /* Profile 12. */
+            { 48, 63 }, /* Profile 13. */
+            { 48, 63 }, /* Profile 14. */
+            { 48, 63 }, /* Profile 15. */
+            { -1, -1 }, /* Profile 16. */
+            { -1, -1 }, /* Profile 17. */
+            { -1, -1 }, /* Profile 18. */
+            { -1, -1 }, /* Profile 19. */
+            { 48, 63 }, /* Profile 20. */
+            { 48, 63 }, /* Profile 21. */
+        },
+        .profile_cnt = 22,
+    },
+    {
+        .name = "DVP_15_0",
+        .fid = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_DVP_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 368, 383 }, /* Profile 2. */
+            { 368, 383 }, /* Profile 3. */
+            { 368, 383 }, /* Profile 4. */
+            { 368, 383 }, /* Profile 5. */
+            { 368, 383 }, /* Profile 6. */
+            { 368, 383 }, /* Profile 7. */
+            { 368, 383 }, /* Profile 8. */
+            { 368, 383 }, /* Profile 9. */
+            { 368, 383 }, /* Profile 10. */
+            { 368, 383 }, /* Profile 11. */
+            { 368, 383 }, /* Profile 12. */
+            { 368, 383 }, /* Profile 13. */
+            { 368, 383 }, /* Profile 14. */
+            { 368, 383 }, /* Profile 15. */
+            { 368, 383 }, /* Profile 16. */
+            { 368, 383 }, /* Profile 17. */
+            { 368, 383 }, /* Profile 18. */
+            { 368, 383 }, /* Profile 19. */
+            { 368, 383 }, /* Profile 20. */
+            { 368, 383 }, /* Profile 21. */
+        },
+        .profile_cnt = 22,
+    },
+    {
+        .name = "EFFECTIVE_TTL_7_0",
+        .fid = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 112, 119 }, /* Profile 2. */
+            { 112, 119 }, /* Profile 3. */
+            { 112, 119 }, /* Profile 4. */
+            { 112, 119 }, /* Profile 5. */
+            { 112, 119 }, /* Profile 6. */
+            { 112, 119 }, /* Profile 7. */
+            { 112, 119 }, /* Profile 8. */
+            { 112, 119 }, /* Profile 9. */
+            { 112, 119 }, /* Profile 10. */
+            { 112, 119 }, /* Profile 11. */
+            { 112, 119 }, /* Profile 12. */
+            { 112, 119 }, /* Profile 13. */
+            { 112, 119 }, /* Profile 14. */
+            { 112, 119 }, /* Profile 15. */
+            { 112, 119 }, /* Profile 16. */
+            { 112, 119 }, /* Profile 17. */
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+            { 416, 419 }, /* Profile 3. */
+            { 416, 419 }, /* Profile 4. */
+            { 416, 419 }, /* Profile 5. */
+            { 416, 419 }, /* Profile 6. */
+            { 416, 419 }, /* Profile 7. */
+            { 416, 419 }, /* Profile 8. */
+            { 416, 419 }, /* Profile 9. */
+            { 416, 419 }, /* Profile 10. */
+            { 416, 419 }, /* Profile 11. */
+            { 416, 419 }, /* Profile 12. */
+            { 416, 419 }, /* Profile 13. */
+            { 416, 419 }, /* Profile 14. */
+            { 416, 419 }, /* Profile 15. */
+            { 416, 419 }, /* Profile 16. */
+            { 416, 419 }, /* Profile 17. */
+            { 416, 419 }, /* Profile 18. */
+            { 416, 419 }, /* Profile 19. */
+            { 416, 419 }, /* Profile 20. */
+            { 416, 419 }, /* Profile 21. */
+        },
+        .profile_cnt = 22,
+    },
+    {
+        .name = "L2_IIF_10_0",
+        .fid = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_L2_IIF_10_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 160, 170 }, /* Profile 2. */
+            { 160, 170 }, /* Profile 3. */
+            { -1, -1 }, /* Profile 4. */
+            { -1, -1 }, /* Profile 5. */
+            { 160, 170 }, /* Profile 6. */
+            { 160, 170 }, /* Profile 7. */
+            { -1, -1 }, /* Profile 8. */
+            { -1, -1 }, /* Profile 9. */
+            { 160, 170 }, /* Profile 10. */
+            { -1, -1 }, /* Profile 11. */
+            { 160, 170 }, /* Profile 12. */
+            { 160, 170 }, /* Profile 13. */
+            { -1, -1 }, /* Profile 14. */
+            { -1, -1 }, /* Profile 15. */
+            { 160, 170 }, /* Profile 16. */
+            { 160, 170 }, /* Profile 17. */
+            { -1, -1 }, /* Profile 18. */
+            { -1, -1 }, /* Profile 19. */
+            { 160, 170 }, /* Profile 20. */
+        },
+        .profile_cnt = 21,
+    },
+    {
+        .name = "L2_OIF_10_0",
+        .fid = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_L2_OIF_10_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { -1, -1 }, /* Profile 2. */
+            { -1, -1 }, /* Profile 3. */
+            { 336, 346 }, /* Profile 4. */
+            { 336, 346 }, /* Profile 5. */
+            { -1, -1 }, /* Profile 6. */
+            { -1, -1 }, /* Profile 7. */
+            { 336, 346 }, /* Profile 8. */
+            { 336, 346 }, /* Profile 9. */
+            { -1, -1 }, /* Profile 10. */
+            { 336, 346 }, /* Profile 11. */
+            { -1, -1 }, /* Profile 12. */
+            { -1, -1 }, /* Profile 13. */
+            { 336, 346 }, /* Profile 14. */
+            { 336, 346 }, /* Profile 15. */
+            { -1, -1 }, /* Profile 16. */
+            { -1, -1 }, /* Profile 17. */
+            { 336, 346 }, /* Profile 18. */
+            { 336, 346 }, /* Profile 19. */
+            { -1, -1 }, /* Profile 20. */
+            { 336, 346 }, /* Profile 21. */
+        },
+        .profile_cnt = 22,
+    },
+    {
+        .name = "L3_IIF_13_0",
+        .fid = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_L3_IIF_13_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 320, 333 }, /* Profile 2. */
+            { 320, 333 }, /* Profile 3. */
+            { 304, 317 }, /* Profile 4. */
+            { 304, 317 }, /* Profile 5. */
+            { 320, 333 }, /* Profile 6. */
+            { 320, 333 }, /* Profile 7. */
+            { 304, 317 }, /* Profile 8. */
+            { 304, 317 }, /* Profile 9. */
+            { 320, 333 }, /* Profile 10. */
+            { 304, 317 }, /* Profile 11. */
+            { 320, 333 }, /* Profile 12. */
+            { 320, 333 }, /* Profile 13. */
+            { 304, 317 }, /* Profile 14. */
+            { 304, 317 }, /* Profile 15. */
+            { 320, 333 }, /* Profile 16. */
+            { 320, 333 }, /* Profile 17. */
+            { 304, 317 }, /* Profile 18. */
+            { 304, 317 }, /* Profile 19. */
+            { 320, 333 }, /* Profile 20. */
+            { 304, 317 }, /* Profile 21. */
+        },
+        .profile_cnt = 22,
+    },
+    {
+        .name = "L3_OIF_1_13_0",
+        .fid = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 352, 365 }, /* Profile 2. */
+            { 352, 365 }, /* Profile 3. */
+            { 352, 365 }, /* Profile 4. */
+            { 352, 365 }, /* Profile 5. */
+            { 352, 365 }, /* Profile 6. */
+            { 352, 365 }, /* Profile 7. */
+            { 352, 365 }, /* Profile 8. */
+            { 352, 365 }, /* Profile 9. */
+            { 352, 365 }, /* Profile 10. */
+            { 352, 365 }, /* Profile 11. */
+            { 352, 365 }, /* Profile 12. */
+            { 352, 365 }, /* Profile 13. */
+            { 352, 365 }, /* Profile 14. */
+            { 352, 365 }, /* Profile 15. */
+            { 352, 365 }, /* Profile 16. */
+            { 352, 365 }, /* Profile 17. */
+            { 352, 365 }, /* Profile 18. */
+            { 352, 365 }, /* Profile 19. */
+            { 352, 365 }, /* Profile 20. */
+            { 352, 365 }, /* Profile 21. */
+        },
+        .profile_cnt = 22,
+    },
+    {
+        .name = "NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0",
+        .fid = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 144, 159 }, /* Profile 2. */
+            { 144, 159 }, /* Profile 3. */
+            { 144, 159 }, /* Profile 4. */
+            { 144, 159 }, /* Profile 5. */
+            { 144, 159 }, /* Profile 6. */
+            { 144, 159 }, /* Profile 7. */
+            { 144, 159 }, /* Profile 8. */
+            { 144, 159 }, /* Profile 9. */
+            { 144, 159 }, /* Profile 10. */
+            { 144, 159 }, /* Profile 11. */
+            { 144, 159 }, /* Profile 12. */
+            { 144, 159 }, /* Profile 13. */
+            { 144, 159 }, /* Profile 14. */
+            { 144, 159 }, /* Profile 15. */
+            { 144, 159 }, /* Profile 16. */
+            { 144, 159 }, /* Profile 17. */
+            { 144, 159 }, /* Profile 18. */
+            { 144, 159 }, /* Profile 19. */
+            { 144, 159 }, /* Profile 20. */
+            { 144, 159 }, /* Profile 21. */
+        },
+        .profile_cnt = 22,
+    },
+    {
+        .name = "NHOP_INDEX_1_15_0",
+        .fid = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 304, 319 }, /* Profile 2. */
+            { 304, 319 }, /* Profile 3. */
+            { 288, 303 }, /* Profile 4. */
+            { 288, 303 }, /* Profile 5. */
+            { 304, 319 }, /* Profile 6. */
+            { 304, 319 }, /* Profile 7. */
+            { 288, 303 }, /* Profile 8. */
+            { 288, 303 }, /* Profile 9. */
+            { 304, 319 }, /* Profile 10. */
+            { 288, 303 }, /* Profile 11. */
+            { 304, 319 }, /* Profile 12. */
+            { 304, 319 }, /* Profile 13. */
+            { 288, 303 }, /* Profile 14. */
+            { 288, 303 }, /* Profile 15. */
+            { 304, 319 }, /* Profile 16. */
+            { 304, 319 }, /* Profile 17. */
+            { 288, 303 }, /* Profile 18. */
+            { 288, 303 }, /* Profile 19. */
+            { 304, 319 }, /* Profile 20. */
+            { 288, 303 }, /* Profile 21. */
+        },
+        .profile_cnt = 22,
+    },
+    {
+        .name = "PARSER_VHLEN_0_15_0",
+        .fid = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 64, 79 }, /* Profile 2. */
+            { 64, 79 }, /* Profile 3. */
+            { 64, 79 }, /* Profile 4. */
+            { 64, 79 }, /* Profile 5. */
+            { 64, 79 }, /* Profile 6. */
+            { 64, 79 }, /* Profile 7. */
+            { 64, 79 }, /* Profile 8. */
+            { 64, 79 }, /* Profile 9. */
+            { 64, 79 }, /* Profile 10. */
+            { 64, 79 }, /* Profile 11. */
+            { 64, 79 }, /* Profile 12. */
+            { 64, 79 }, /* Profile 13. */
+            { 64, 79 }, /* Profile 14. */
+            { 64, 79 }, /* Profile 15. */
+            { 64, 79 }, /* Profile 16. */
+            { 64, 79 }, /* Profile 17. */
+            { 64, 79 }, /* Profile 18. */
+            { 64, 79 }, /* Profile 19. */
+            { 64, 79 }, /* Profile 20. */
+            { 64, 79 }, /* Profile 21. */
+        },
+        .profile_cnt = 22,
+    },
+    {
+        .name = "PKT_MISC_CTRL_0_3_0",
+        .fid = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 404, 407 }, /* Profile 2. */
+            { 404, 407 }, /* Profile 3. */
+            { 404, 407 }, /* Profile 4. */
+            { 404, 407 }, /* Profile 5. */
+            { 404, 407 }, /* Profile 6. */
+            { 404, 407 }, /* Profile 7. */
+            { 404, 407 }, /* Profile 8. */
+            { 404, 407 }, /* Profile 9. */
+            { 404, 407 }, /* Profile 10. */
+            { 404, 407 }, /* Profile 11. */
+            { 404, 407 }, /* Profile 12. */
+            { 404, 407 }, /* Profile 13. */
+            { 404, 407 }, /* Profile 14. */
+            { 404, 407 }, /* Profile 15. */
+            { 404, 407 }, /* Profile 16. */
+            { 404, 407 }, /* Profile 17. */
+            { 404, 407 }, /* Profile 18. */
+            { 404, 407 }, /* Profile 19. */
+            { 404, 407 }, /* Profile 20. */
+            { 404, 407 }, /* Profile 21. */
+        },
+        .profile_cnt = 22,
+    },
+    {
+        .name = "SVP_15_0",
+        .fid = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_SVP_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 288, 303 }, /* Profile 2. */
+            { 288, 303 }, /* Profile 3. */
+            { 272, 287 }, /* Profile 4. */
+            { 272, 287 }, /* Profile 5. */
+            { 288, 303 }, /* Profile 6. */
+            { 288, 303 }, /* Profile 7. */
+            { 272, 287 }, /* Profile 8. */
+            { 272, 287 }, /* Profile 9. */
+            { 288, 303 }, /* Profile 10. */
+            { 272, 287 }, /* Profile 11. */
+            { 288, 303 }, /* Profile 12. */
+            { 288, 303 }, /* Profile 13. */
+            { 272, 287 }, /* Profile 14. */
+            { 272, 287 }, /* Profile 15. */
+            { 288, 303 }, /* Profile 16. */
+            { 288, 303 }, /* Profile 17. */
+            { 272, 287 }, /* Profile 18. */
+            { 272, 287 }, /* Profile 19. */
+            { 288, 303 }, /* Profile 20. */
+            { 272, 287 }, /* Profile 21. */
+        },
+        .profile_cnt = 22,
+    },
+    {
+        .name = "SVP_NETWORK_GROUP_BITMAP_3_0",
+        .fid = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 396, 399 }, /* Profile 2. */
+            { 396, 399 }, /* Profile 3. */
+            { 396, 399 }, /* Profile 4. */
+            { 396, 399 }, /* Profile 5. */
+            { 396, 399 }, /* Profile 6. */
+            { 396, 399 }, /* Profile 7. */
+            { 396, 399 }, /* Profile 8. */
+            { 396, 399 }, /* Profile 9. */
+            { 396, 399 }, /* Profile 10. */
+            { 396, 399 }, /* Profile 11. */
+            { 396, 399 }, /* Profile 12. */
+            { 396, 399 }, /* Profile 13. */
+            { 396, 399 }, /* Profile 14. */
+            { 396, 399 }, /* Profile 15. */
+            { 396, 399 }, /* Profile 16. */
+            { 396, 399 }, /* Profile 17. */
+            { 396, 399 }, /* Profile 18. */
+            { 396, 399 }, /* Profile 19. */
+            { 396, 399 }, /* Profile 20. */
+            { 396, 399 }, /* Profile 21. */
+        },
+        .profile_cnt = 22,
+    },
+    {
+        .name = "SYSTEM_DESTINATION_15_0",
+        .fid = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 208, 223 }, /* Profile 2. */
+            { 208, 223 }, /* Profile 3. */
+            { 192, 207 }, /* Profile 4. */
+            { 192, 207 }, /* Profile 5. */
+            { 208, 223 }, /* Profile 6. */
+            { 208, 223 }, /* Profile 7. */
+            { 192, 207 }, /* Profile 8. */
+            { 192, 207 }, /* Profile 9. */
+            { 208, 223 }, /* Profile 10. */
+            { 192, 207 }, /* Profile 11. */
+            { 208, 223 }, /* Profile 12. */
+            { 208, 223 }, /* Profile 13. */
+            { 192, 207 }, /* Profile 14. */
+            { 192, 207 }, /* Profile 15. */
+            { 208, 223 }, /* Profile 16. */
+            { 208, 223 }, /* Profile 17. */
+            { 192, 207 }, /* Profile 18. */
+            { 192, 207 }, /* Profile 19. */
+            { 208, 223 }, /* Profile 20. */
+            { 192, 207 }, /* Profile 21. */
+        },
+        .profile_cnt = 22,
+    },
+    {
+        .name = "SYSTEM_OPCODE_3_0",
+        .fid = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 420, 423 }, /* Profile 2. */
+            { 420, 423 }, /* Profile 3. */
+            { 420, 423 }, /* Profile 4. */
+            { 420, 423 }, /* Profile 5. */
+            { 420, 423 }, /* Profile 6. */
+            { 420, 423 }, /* Profile 7. */
+            { 420, 423 }, /* Profile 8. */
+            { 420, 423 }, /* Profile 9. */
+            { 420, 423 }, /* Profile 10. */
+            { 420, 423 }, /* Profile 11. */
+            { 420, 423 }, /* Profile 12. */
+            { 420, 423 }, /* Profile 13. */
+            { 420, 423 }, /* Profile 14. */
+            { 420, 423 }, /* Profile 15. */
+            { 420, 423 }, /* Profile 16. */
+            { 420, 423 }, /* Profile 17. */
+            { 420, 423 }, /* Profile 18. */
+            { 420, 423 }, /* Profile 19. */
+            { 420, 423 }, /* Profile 20. */
+            { 420, 423 }, /* Profile 21. */
+        },
+        .profile_cnt = 22,
+    },
+    {
+        .name = "SYSTEM_SOURCE_15_0",
+        .fid = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 192, 207 }, /* Profile 2. */
+            { 192, 207 }, /* Profile 3. */
+            { 176, 191 }, /* Profile 4. */
+            { 176, 191 }, /* Profile 5. */
+            { 192, 207 }, /* Profile 6. */
+            { 192, 207 }, /* Profile 7. */
+            { 176, 191 }, /* Profile 8. */
+            { 176, 191 }, /* Profile 9. */
+            { 192, 207 }, /* Profile 10. */
+            { 176, 191 }, /* Profile 11. */
+            { 192, 207 }, /* Profile 12. */
+            { 192, 207 }, /* Profile 13. */
+            { 176, 191 }, /* Profile 14. */
+            { 176, 191 }, /* Profile 15. */
+            { 192, 207 }, /* Profile 16. */
+            { 192, 207 }, /* Profile 17. */
+            { 176, 191 }, /* Profile 18. */
+            { 176, 191 }, /* Profile 19. */
+            { 192, 207 }, /* Profile 20. */
+            { 176, 191 }, /* Profile 21. */
+        },
+        .profile_cnt = 22,
+    },
+    {
+        .name = "TIMESTAMP_CTRL_3_0",
+        .fid = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 412, 415 }, /* Profile 2. */
+            { 412, 415 }, /* Profile 3. */
+            { 412, 415 }, /* Profile 4. */
+            { 412, 415 }, /* Profile 5. */
+            { 412, 415 }, /* Profile 6. */
+            { 412, 415 }, /* Profile 7. */
+            { 412, 415 }, /* Profile 8. */
+            { 412, 415 }, /* Profile 9. */
+            { 412, 415 }, /* Profile 10. */
+            { 412, 415 }, /* Profile 11. */
+            { 412, 415 }, /* Profile 12. */
+            { 412, 415 }, /* Profile 13. */
+            { 412, 415 }, /* Profile 14. */
+            { 412, 415 }, /* Profile 15. */
+            { 412, 415 }, /* Profile 16. */
+            { 412, 415 }, /* Profile 17. */
+            { 412, 415 }, /* Profile 18. */
+            { 412, 415 }, /* Profile 19. */
+            { 412, 415 }, /* Profile 20. */
+            { 412, 415 }, /* Profile 21. */
+        },
+        .profile_cnt = 22,
+    },
+    {
+        .name = "TUNNEL_PROCESSING_RESULTS_1_3_0",
+        .fid = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 408, 411 }, /* Profile 2. */
+            { 408, 411 }, /* Profile 3. */
+            { 408, 411 }, /* Profile 4. */
+            { 408, 411 }, /* Profile 5. */
+            { 408, 411 }, /* Profile 6. */
+            { 408, 411 }, /* Profile 7. */
+            { 408, 411 }, /* Profile 8. */
+            { 408, 411 }, /* Profile 9. */
+            { 408, 411 }, /* Profile 10. */
+            { 408, 411 }, /* Profile 11. */
+            { 408, 411 }, /* Profile 12. */
+            { 408, 411 }, /* Profile 13. */
+            { 408, 411 }, /* Profile 14. */
+            { 408, 411 }, /* Profile 15. */
+            { 408, 411 }, /* Profile 16. */
+            { 408, 411 }, /* Profile 17. */
+            { 408, 411 }, /* Profile 18. */
+            { 408, 411 }, /* Profile 19. */
+            { 408, 411 }, /* Profile 20. */
+            { 408, 411 }, /* Profile 21. */
+        },
+        .profile_cnt = 22,
+    },
+    {
+        .name = "VFI_15_0",
+        .fid = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_VFI_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 336, 351 }, /* Profile 2. */
+            { 336, 351 }, /* Profile 3. */
+            { 320, 335 }, /* Profile 4. */
+            { 320, 335 }, /* Profile 5. */
+            { 336, 351 }, /* Profile 6. */
+            { 336, 351 }, /* Profile 7. */
+            { 320, 335 }, /* Profile 8. */
+            { 320, 335 }, /* Profile 9. */
+            { 336, 351 }, /* Profile 10. */
+            { 320, 335 }, /* Profile 11. */
+            { 336, 351 }, /* Profile 12. */
+            { 336, 351 }, /* Profile 13. */
+            { 320, 335 }, /* Profile 14. */
+            { 320, 335 }, /* Profile 15. */
+            { 336, 351 }, /* Profile 16. */
+            { 336, 351 }, /* Profile 17. */
+            { 320, 335 }, /* Profile 18. */
+            { 320, 335 }, /* Profile 19. */
+            { 336, 351 }, /* Profile 20. */
+            { 320, 335 }, /* Profile 21. */
+        },
+        .profile_cnt = 22,
+    },
+    {
+        .name = "VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0",
+        .fid = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 388, 391 }, /* Profile 2. */
+            { 388, 391 }, /* Profile 3. */
+            { 388, 391 }, /* Profile 4. */
+            { 388, 391 }, /* Profile 5. */
+            { 388, 391 }, /* Profile 6. */
+            { 388, 391 }, /* Profile 7. */
+            { 388, 391 }, /* Profile 8. */
+            { 388, 391 }, /* Profile 9. */
+            { 388, 391 }, /* Profile 10. */
+            { 388, 391 }, /* Profile 11. */
+            { 388, 391 }, /* Profile 12. */
+            { 388, 391 }, /* Profile 13. */
+            { 388, 391 }, /* Profile 14. */
+            { 388, 391 }, /* Profile 15. */
+            { 388, 391 }, /* Profile 16. */
+            { 388, 391 }, /* Profile 17. */
+            { 388, 391 }, /* Profile 18. */
+            { 388, 391 }, /* Profile 19. */
+            { 388, 391 }, /* Profile 20. */
+            { 388, 391 }, /* Profile 21. */
+        },
+        .profile_cnt = 22,
+    },
+};static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_rxpmd_flex_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_29_2_1_rxpmd_flex_field_data,
+};
+
+static shr_enum_map_t bcm56780_a0_hna_6_5_29_2_1_rxpmd_flex_reason_names[] = {
+    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_reasons_info_t bcm56780_a0_hna_6_5_29_2_1_rxpmd_flex_reasons_info = {
+    .num_reasons = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RXPMD_FLEX_REASON_COUNT,
+    .reason_names = bcm56780_a0_hna_6_5_29_2_1_rxpmd_flex_reason_names,
+    .reason_encode = bcm56780_a0_hna_6_5_29_2_1_rxpmd_flex_reason_encode,
+    .reason_decode = bcm56780_a0_hna_6_5_29_2_1_rxpmd_flex_reason_decode,
+};
+
+
+static int32_t bcmpkt_arp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_operation_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_operation_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_arp_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ARP_T_FID_COUNT] = {
+    bcmpkt_arp_t_hardware_len_get,
+    bcmpkt_arp_t_hardware_type_get,
+    bcmpkt_arp_t_operation_get,
+    bcmpkt_arp_t_prot_addr_len_get,
+    bcmpkt_arp_t_protocol_type_get,
+    bcmpkt_arp_t_sender_ha_get,
+    bcmpkt_arp_t_sender_ip_get,
+    bcmpkt_arp_t_target_ha_get,
+    bcmpkt_arp_t_target_ip_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_arp_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ARP_T_FID_COUNT] = {
+    bcmpkt_arp_t_hardware_len_set,
+    bcmpkt_arp_t_hardware_type_set,
+    bcmpkt_arp_t_operation_set,
+    bcmpkt_arp_t_prot_addr_len_set,
+    bcmpkt_arp_t_protocol_type_set,
+    bcmpkt_arp_t_sender_ha_set,
+    bcmpkt_arp_t_sender_ip_set,
+    bcmpkt_arp_t_target_ha_set,
+    bcmpkt_arp_t_target_ip_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_arp_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_arp_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ARP_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_29_2_1_arp_t_field_data,
+};
+
+
+static int32_t bcmpkt_authen_t_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_payload_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_payload_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_spi_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_spi_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_authen_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_AUTHEN_T_FID_COUNT] = {
+    bcmpkt_authen_t_data_get,
+    bcmpkt_authen_t_next_header_get,
+    bcmpkt_authen_t_payload_len_get,
+    bcmpkt_authen_t_reserved_get,
+    bcmpkt_authen_t_seq_num_get,
+    bcmpkt_authen_t_spi_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_authen_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_AUTHEN_T_FID_COUNT] = {
+    bcmpkt_authen_t_data_set,
+    bcmpkt_authen_t_next_header_set,
+    bcmpkt_authen_t_payload_len_set,
+    bcmpkt_authen_t_reserved_set,
+    bcmpkt_authen_t_seq_num_set,
+    bcmpkt_authen_t_spi_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_authen_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_authen_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_AUTHEN_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_29_2_1_authen_t_field_data,
+};
+
+
+static int32_t bcmpkt_bfd_t_desmintxintv_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_desmintxintv_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_minechorxintv_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_minechorxintv_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_reqminrxintv_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_reqminrxintv_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_ap_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 18, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_ap_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 18, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_bfd_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_bfd_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_cpi_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 19, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_cpi_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 19, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_dem_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 17, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_dem_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 17, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_detectmult_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_detectmult_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_diag_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 5);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_diag_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 5, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_fin_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 20, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_fin_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 20, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_mpt_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_mpt_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_mydiscrim_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_mydiscrim_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_poll_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 21, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_poll_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 21, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_sta_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 22, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_sta_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 22, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_urdiscrim_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_urdiscrim_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 29, 3);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 29, 3, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_bfd_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_FID_COUNT] = {
+    bcmpkt_bfd_t_ap_get,
+    bcmpkt_bfd_t_bfd_length_get,
+    bcmpkt_bfd_t_cpi_get,
+    bcmpkt_bfd_t_dem_get,
+    bcmpkt_bfd_t_desmintxintv_get,
+    bcmpkt_bfd_t_detectmult_get,
+    bcmpkt_bfd_t_diag_get,
+    bcmpkt_bfd_t_fin_get,
+    bcmpkt_bfd_t_minechorxintv_get,
+    bcmpkt_bfd_t_mpt_get,
+    bcmpkt_bfd_t_mydiscrim_get,
+    bcmpkt_bfd_t_poll_get,
+    bcmpkt_bfd_t_reqminrxintv_get,
+    bcmpkt_bfd_t_sta_get,
+    bcmpkt_bfd_t_urdiscrim_get,
+    bcmpkt_bfd_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_bfd_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_FID_COUNT] = {
+    bcmpkt_bfd_t_ap_set,
+    bcmpkt_bfd_t_bfd_length_set,
+    bcmpkt_bfd_t_cpi_set,
+    bcmpkt_bfd_t_dem_set,
+    bcmpkt_bfd_t_desmintxintv_set,
+    bcmpkt_bfd_t_detectmult_set,
+    bcmpkt_bfd_t_diag_set,
+    bcmpkt_bfd_t_fin_set,
+    bcmpkt_bfd_t_minechorxintv_set,
+    bcmpkt_bfd_t_mpt_set,
+    bcmpkt_bfd_t_mydiscrim_set,
+    bcmpkt_bfd_t_poll_set,
+    bcmpkt_bfd_t_reqminrxintv_set,
+    bcmpkt_bfd_t_sta_set,
+    bcmpkt_bfd_t_urdiscrim_set,
+    bcmpkt_bfd_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_bfd_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_bfd_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_BFD_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_29_2_1_bfd_t_field_data,
+};
+
+
+static int32_t bcmpkt_cntag_t_rpid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_cntag_t_rpid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_cntag_t_tpid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_cntag_t_tpid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_cntag_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CNTAG_T_FID_COUNT] = {
+    bcmpkt_cntag_t_rpid_get,
+    bcmpkt_cntag_t_tpid_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_cntag_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CNTAG_T_FID_COUNT] = {
+    bcmpkt_cntag_t_rpid_set,
+    bcmpkt_cntag_t_tpid_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_cntag_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_cntag_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CNTAG_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_29_2_1_cntag_t_field_data,
+};
+
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_cpu_composites_0_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = {
+    bcmpkt_cpu_composites_0_t_dma_cont0_get,
+    bcmpkt_cpu_composites_0_t_dma_cont1_get,
+    bcmpkt_cpu_composites_0_t_dma_cont2_get,
+    bcmpkt_cpu_composites_0_t_dma_cont3_get,
+    bcmpkt_cpu_composites_0_t_dma_cont4_get,
+    bcmpkt_cpu_composites_0_t_dma_cont5_get,
+    bcmpkt_cpu_composites_0_t_dma_cont6_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_cpu_composites_0_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = {
+    bcmpkt_cpu_composites_0_t_dma_cont0_set,
+    bcmpkt_cpu_composites_0_t_dma_cont1_set,
+    bcmpkt_cpu_composites_0_t_dma_cont2_set,
+    bcmpkt_cpu_composites_0_t_dma_cont3_set,
+    bcmpkt_cpu_composites_0_t_dma_cont4_set,
+    bcmpkt_cpu_composites_0_t_dma_cont5_set,
+    bcmpkt_cpu_composites_0_t_dma_cont6_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_cpu_composites_0_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_cpu_composites_0_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_29_2_1_cpu_composites_0_t_field_data,
+};
+
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_cpu_composites_1_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = {
+    bcmpkt_cpu_composites_1_t_dma_cont10_get,
+    bcmpkt_cpu_composites_1_t_dma_cont11_get,
+    bcmpkt_cpu_composites_1_t_dma_cont12_get,
+    bcmpkt_cpu_composites_1_t_dma_cont13_get,
+    bcmpkt_cpu_composites_1_t_dma_cont14_get,
+    bcmpkt_cpu_composites_1_t_dma_cont15_get,
+    bcmpkt_cpu_composites_1_t_dma_cont16_get,
+    bcmpkt_cpu_composites_1_t_dma_cont17_get,
+    bcmpkt_cpu_composites_1_t_dma_cont7_get,
+    bcmpkt_cpu_composites_1_t_dma_cont8_get,
+    bcmpkt_cpu_composites_1_t_dma_cont9_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_cpu_composites_1_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = {
+    bcmpkt_cpu_composites_1_t_dma_cont10_set,
+    bcmpkt_cpu_composites_1_t_dma_cont11_set,
+    bcmpkt_cpu_composites_1_t_dma_cont12_set,
+    bcmpkt_cpu_composites_1_t_dma_cont13_set,
+    bcmpkt_cpu_composites_1_t_dma_cont14_set,
+    bcmpkt_cpu_composites_1_t_dma_cont15_set,
+    bcmpkt_cpu_composites_1_t_dma_cont16_set,
+    bcmpkt_cpu_composites_1_t_dma_cont17_set,
+    bcmpkt_cpu_composites_1_t_dma_cont7_set,
+    bcmpkt_cpu_composites_1_t_dma_cont8_set,
+    bcmpkt_cpu_composites_1_t_dma_cont9_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_cpu_composites_1_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_cpu_composites_1_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_29_2_1_cpu_composites_1_t_field_data,
+};
+
+
+static int32_t bcmpkt_dest_option_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_dest_option_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_dest_option_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_dest_option_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_dest_option_t_option_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_dest_option_t_option_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_dest_option_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_DEST_OPTION_T_FID_COUNT] = {
+    bcmpkt_dest_option_t_hdr_ext_len_get,
+    bcmpkt_dest_option_t_next_header_get,
+    bcmpkt_dest_option_t_option_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_dest_option_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_DEST_OPTION_T_FID_COUNT] = {
+    bcmpkt_dest_option_t_hdr_ext_len_set,
+    bcmpkt_dest_option_t_next_header_set,
+    bcmpkt_dest_option_t_option_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_dest_option_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_dest_option_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_DEST_OPTION_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_29_2_1_dest_option_t_field_data,
+};
+
+
+static int32_t bcmpkt_ep_nih_header_t_header_subtype_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 20, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_header_subtype_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 20, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_header_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 6);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_header_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 6, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_a_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_a_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_b_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 20, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_b_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 20, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_c_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_c_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_object_a_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_object_a_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_object_b_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_object_b_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_object_c_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_object_c_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_recirc_profile_index_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_recirc_profile_index_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 12, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 12, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_start_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 30, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_start_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 30, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_timestamp_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_ep_nih_header_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = {
+    bcmpkt_ep_nih_header_t_header_subtype_get,
+    bcmpkt_ep_nih_header_t_header_type_get,
+    bcmpkt_ep_nih_header_t_opaque_ctrl_a_get,
+    bcmpkt_ep_nih_header_t_opaque_ctrl_b_get,
+    bcmpkt_ep_nih_header_t_opaque_ctrl_c_get,
+    bcmpkt_ep_nih_header_t_opaque_object_a_get,
+    bcmpkt_ep_nih_header_t_opaque_object_b_get,
+    bcmpkt_ep_nih_header_t_opaque_object_c_get,
+    bcmpkt_ep_nih_header_t_recirc_profile_index_get,
+    bcmpkt_ep_nih_header_t_reserved_0_get,
+    bcmpkt_ep_nih_header_t_start_get,
+    bcmpkt_ep_nih_header_t_timestamp_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_ep_nih_header_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = {
+    bcmpkt_ep_nih_header_t_header_subtype_set,
+    bcmpkt_ep_nih_header_t_header_type_set,
+    bcmpkt_ep_nih_header_t_opaque_ctrl_a_set,
+    bcmpkt_ep_nih_header_t_opaque_ctrl_b_set,
+    bcmpkt_ep_nih_header_t_opaque_ctrl_c_set,
+    bcmpkt_ep_nih_header_t_opaque_object_a_set,
+    bcmpkt_ep_nih_header_t_opaque_object_b_set,
+    bcmpkt_ep_nih_header_t_opaque_object_c_set,
+    bcmpkt_ep_nih_header_t_recirc_profile_index_set,
+    bcmpkt_ep_nih_header_t_reserved_0_set,
+    bcmpkt_ep_nih_header_t_start_set,
+    bcmpkt_ep_nih_header_t_timestamp_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_ep_nih_header_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_ep_nih_header_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_EP_NIH_HEADER_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_29_2_1_ep_nih_header_t_field_data,
+};
+
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 11, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 11, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 13, 3);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 13, 3, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 10);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 10, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_t_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 10, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_t_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 10, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 12);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 12, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_erspan3_fixed_hdr_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = {
+    bcmpkt_erspan3_fixed_hdr_t_bso_get,
+    bcmpkt_erspan3_fixed_hdr_t_cos_get,
+    bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get,
+    bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get,
+    bcmpkt_erspan3_fixed_hdr_t_session_id_get,
+    bcmpkt_erspan3_fixed_hdr_t_t_get,
+    bcmpkt_erspan3_fixed_hdr_t_timestamp_get,
+    bcmpkt_erspan3_fixed_hdr_t_ver_get,
+    bcmpkt_erspan3_fixed_hdr_t_vlan_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_erspan3_fixed_hdr_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = {
+    bcmpkt_erspan3_fixed_hdr_t_bso_set,
+    bcmpkt_erspan3_fixed_hdr_t_cos_set,
+    bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set,
+    bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set,
+    bcmpkt_erspan3_fixed_hdr_t_session_id_set,
+    bcmpkt_erspan3_fixed_hdr_t_t_set,
+    bcmpkt_erspan3_fixed_hdr_t_timestamp_set,
+    bcmpkt_erspan3_fixed_hdr_t_ver_set,
+    bcmpkt_erspan3_fixed_hdr_t_vlan_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_erspan3_fixed_hdr_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_erspan3_fixed_hdr_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_29_2_1_erspan3_fixed_hdr_t_field_data,
+};
+
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 26, 6);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 26, 6, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 10);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 10, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_erspan3_subhdr_5_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = {
+    bcmpkt_erspan3_subhdr_5_t_platform_id_get,
+    bcmpkt_erspan3_subhdr_5_t_port_id_get,
+    bcmpkt_erspan3_subhdr_5_t_switch_id_get,
+    bcmpkt_erspan3_subhdr_5_t_timestamp_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_erspan3_subhdr_5_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = {
+    bcmpkt_erspan3_subhdr_5_t_platform_id_set,
+    bcmpkt_erspan3_subhdr_5_t_port_id_set,
+    bcmpkt_erspan3_subhdr_5_t_switch_id_set,
+    bcmpkt_erspan3_subhdr_5_t_timestamp_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_erspan3_subhdr_5_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_erspan3_subhdr_5_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_29_2_1_erspan3_subhdr_5_t_field_data,
+};
+
+
+static int32_t bcmpkt_esp_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_pad_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 8, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_pad_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 8, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_pad_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_pad_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_spi_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_spi_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_esp_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ESP_T_FID_COUNT] = {
+    bcmpkt_esp_t_next_header_get,
+    bcmpkt_esp_t_pad_get,
+    bcmpkt_esp_t_pad_len_get,
+    bcmpkt_esp_t_seq_num_get,
+    bcmpkt_esp_t_spi_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_esp_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ESP_T_FID_COUNT] = {
+    bcmpkt_esp_t_next_header_set,
+    bcmpkt_esp_t_pad_set,
+    bcmpkt_esp_t_pad_len_set,
+    bcmpkt_esp_t_seq_num_set,
+    bcmpkt_esp_t_spi_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_esp_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_esp_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ESP_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_29_2_1_esp_t_field_data,
+};
+
+
+static int32_t bcmpkt_etag_t_tag_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_etag_t_tag_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_etag_t_tpid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_etag_t_tpid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_etag_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ETAG_T_FID_COUNT] = {
+    bcmpkt_etag_t_tag_get,
+    bcmpkt_etag_t_tpid_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_etag_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ETAG_T_FID_COUNT] = {
+    bcmpkt_etag_t_tag_set,
+    bcmpkt_etag_t_tpid_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_etag_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ETAG_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_etag_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ETAG_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_29_2_1_etag_t_field_data,
+};
+
+
+static int32_t bcmpkt_ethertype_t_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ethertype_t_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_ethertype_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ETHERTYPE_T_FID_COUNT] = {
+    bcmpkt_ethertype_t_type_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_ethertype_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ETHERTYPE_T_FID_COUNT] = {
+    bcmpkt_ethertype_t_type_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_ethertype_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_ethertype_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ETHERTYPE_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_29_2_1_ethertype_t_field_data,
+};
+
+
+static int32_t bcmpkt_frag_t_frag_info_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_frag_t_frag_info_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_frag_t_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_frag_t_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_frag_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_frag_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_frag_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_frag_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_frag_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_FRAG_T_FID_COUNT] = {
+    bcmpkt_frag_t_frag_info_get,
+    bcmpkt_frag_t_id_get,
+    bcmpkt_frag_t_next_header_get,
+    bcmpkt_frag_t_reserved_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_frag_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_FRAG_T_FID_COUNT] = {
+    bcmpkt_frag_t_frag_info_set,
+    bcmpkt_frag_t_id_set,
+    bcmpkt_frag_t_next_header_set,
+    bcmpkt_frag_t_reserved_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_frag_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_frag_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_FRAG_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_29_2_1_frag_t_field_data,
+};
+
+
+static int32_t bcmpkt_generic_loopback_t_destination_obj_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_destination_obj_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_destination_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_destination_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_entropy_obj_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_entropy_obj_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_header_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 20, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_header_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 20, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_input_priority_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 12, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_input_priority_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 12, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_interface_ctrl_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 4, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_interface_ctrl_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 4, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_interface_obj_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_interface_obj_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_qos_obj_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_qos_obj_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_reserved_1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_reserved_1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_reserved_2_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_reserved_2_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_source_system_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_source_system_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_start_byte_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_start_byte_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_generic_loopback_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = {
+    bcmpkt_generic_loopback_t_destination_obj_get,
+    bcmpkt_generic_loopback_t_destination_type_get,
+    bcmpkt_generic_loopback_t_entropy_obj_get,
+    bcmpkt_generic_loopback_t_flags_get,
+    bcmpkt_generic_loopback_t_header_type_get,
+    bcmpkt_generic_loopback_t_input_priority_get,
+    bcmpkt_generic_loopback_t_interface_ctrl_get,
+    bcmpkt_generic_loopback_t_interface_obj_get,
+    bcmpkt_generic_loopback_t_processing_ctrl_0_get,
+    bcmpkt_generic_loopback_t_processing_ctrl_1_get,
+    bcmpkt_generic_loopback_t_qos_obj_get,
+    bcmpkt_generic_loopback_t_reserved_1_get,
+    bcmpkt_generic_loopback_t_reserved_2_get,
+    bcmpkt_generic_loopback_t_source_system_port_get,
+    bcmpkt_generic_loopback_t_start_byte_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_generic_loopback_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = {
+    bcmpkt_generic_loopback_t_destination_obj_set,
+    bcmpkt_generic_loopback_t_destination_type_set,
+    bcmpkt_generic_loopback_t_entropy_obj_set,
+    bcmpkt_generic_loopback_t_flags_set,
+    bcmpkt_generic_loopback_t_header_type_set,
+    bcmpkt_generic_loopback_t_input_priority_set,
+    bcmpkt_generic_loopback_t_interface_ctrl_set,
+    bcmpkt_generic_loopback_t_interface_obj_set,
+    bcmpkt_generic_loopback_t_processing_ctrl_0_set,
+    bcmpkt_generic_loopback_t_processing_ctrl_1_set,
+    bcmpkt_generic_loopback_t_qos_obj_set,
+    bcmpkt_generic_loopback_t_reserved_1_set,
+    bcmpkt_generic_loopback_t_reserved_2_set,
+    bcmpkt_generic_loopback_t_source_system_port_set,
+    bcmpkt_generic_loopback_t_start_byte_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_generic_loopback_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_generic_loopback_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_29_2_1_generic_loopback_t_field_data,
+};
+
+
+static int32_t bcmpkt_gpe_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_next_protocol_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_next_protocol_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_reserved0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_reserved0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_reserved1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_reserved1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_vni_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 8, 24);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_vni_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 8, 24, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_gpe_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GPE_T_FID_COUNT] = {
+    bcmpkt_gpe_t_flags_get,
+    bcmpkt_gpe_t_next_protocol_get,
+    bcmpkt_gpe_t_reserved0_get,
+    bcmpkt_gpe_t_reserved1_get,
+    bcmpkt_gpe_t_vni_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_gpe_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GPE_T_FID_COUNT] = {
+    bcmpkt_gpe_t_flags_set,
+    bcmpkt_gpe_t_next_protocol_set,
+    bcmpkt_gpe_t_reserved0_set,
+    bcmpkt_gpe_t_reserved1_set,
+    bcmpkt_gpe_t_vni_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_gpe_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_gpe_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GPE_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_29_2_1_gpe_t_field_data,
+};
+
+
+static int32_t bcmpkt_gre_chksum_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_chksum_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gre_chksum_t_offset_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_chksum_t_offset_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_gre_chksum_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = {
+    bcmpkt_gre_chksum_t_checksum_get,
+    bcmpkt_gre_chksum_t_offset_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_gre_chksum_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = {
+    bcmpkt_gre_chksum_t_checksum_set,
+    bcmpkt_gre_chksum_t_offset_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_gre_chksum_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_gre_chksum_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_CHKSUM_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_29_2_1_gre_chksum_t_field_data,
+};
+
+
+static int32_t bcmpkt_gre_key_t_key_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_key_t_key_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_gre_key_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_KEY_T_FID_COUNT] = {
+    bcmpkt_gre_key_t_key_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_gre_key_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_KEY_T_FID_COUNT] = {
+    bcmpkt_gre_key_t_key_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_gre_key_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_gre_key_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_KEY_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_29_2_1_gre_key_t_field_data,
+};
+
+
+static int32_t bcmpkt_gre_rout_t_routing_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_rout_t_routing_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_gre_rout_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_ROUT_T_FID_COUNT] = {
+    bcmpkt_gre_rout_t_routing_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_gre_rout_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_ROUT_T_FID_COUNT] = {
+    bcmpkt_gre_rout_t_routing_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_gre_rout_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_gre_rout_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_ROUT_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_29_2_1_gre_rout_t_field_data,
+};
+
+
+static int32_t bcmpkt_gre_seq_t_sequence_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_seq_t_sequence_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_gre_seq_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_SEQ_T_FID_COUNT] = {
+    bcmpkt_gre_seq_t_sequence_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_gre_seq_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_SEQ_T_FID_COUNT] = {
+    bcmpkt_gre_seq_t_sequence_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_gre_seq_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_gre_seq_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_SEQ_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_29_2_1_gre_seq_t_field_data,
+};
+
+
+static int32_t bcmpkt_gre_t_c_r_k_s_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_t_c_r_k_s_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gre_t_protocol_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_t_protocol_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gre_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 19, 9);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 19, 9, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gre_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 3);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 3, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_gre_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_T_FID_COUNT] = {
+    bcmpkt_gre_t_c_r_k_s_get,
+    bcmpkt_gre_t_protocol_get,
+    bcmpkt_gre_t_reserved_get,
+    bcmpkt_gre_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_gre_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_T_FID_COUNT] = {
+    bcmpkt_gre_t_c_r_k_s_set,
+    bcmpkt_gre_t_protocol_set,
+    bcmpkt_gre_t_reserved_set,
+    bcmpkt_gre_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_gre_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_gre_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_GRE_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_29_2_1_gre_t_field_data,
+};
+
+
+static int32_t bcmpkt_hop_by_hop_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hop_by_hop_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hop_by_hop_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hop_by_hop_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hop_by_hop_t_option_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_hop_by_hop_t_option_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_hop_by_hop_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = {
+    bcmpkt_hop_by_hop_t_hdr_ext_len_get,
+    bcmpkt_hop_by_hop_t_next_header_get,
+    bcmpkt_hop_by_hop_t_option_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_hop_by_hop_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = {
+    bcmpkt_hop_by_hop_t_hdr_ext_len_set,
+    bcmpkt_hop_by_hop_t_next_header_set,
+    bcmpkt_hop_by_hop_t_option_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_hop_by_hop_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_hop_by_hop_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_HOP_BY_HOP_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_29_2_1_hop_by_hop_t_field_data,
+};
+
+
+static int32_t bcmpkt_icmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_icmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_icmp_t_code_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_icmp_t_code_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_icmp_t_icmp_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_icmp_t_icmp_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_icmp_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ICMP_T_FID_COUNT] = {
+    bcmpkt_icmp_t_checksum_get,
+    bcmpkt_icmp_t_code_get,
+    bcmpkt_icmp_t_icmp_type_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_icmp_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ICMP_T_FID_COUNT] = {
+    bcmpkt_icmp_t_checksum_set,
+    bcmpkt_icmp_t_code_set,
+    bcmpkt_icmp_t_icmp_type_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_icmp_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_icmp_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ICMP_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_29_2_1_icmp_t_field_data,
+};
+
+
+static int32_t bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_0_a_t_lns_device_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 24);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_0_a_t_lns_device_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 24, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_0_a_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT] = {
+    bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_get,
+    bcmpkt_ifa_flex_md_0_a_t_lns_device_id_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_0_a_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT] = {
+    bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_set,
+    bcmpkt_ifa_flex_md_0_a_t_lns_device_id_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_0_a_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_0_A_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_0_a_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_0_a_t_field_data,
+};
+
+
+static int32_t bcmpkt_ifa_flex_md_0_b_t_cn_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 26, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_0_b_t_cn_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 26, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_0_b_t_port_speed_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_0_b_t_port_speed_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_0_b_t_queue_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 20, 6);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_0_b_t_queue_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 20, 6, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 20);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 20, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_0_b_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT] = {
+    bcmpkt_ifa_flex_md_0_b_t_cn_get,
+    bcmpkt_ifa_flex_md_0_b_t_port_speed_get,
+    bcmpkt_ifa_flex_md_0_b_t_queue_id_get,
+    bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_0_b_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT] = {
+    bcmpkt_ifa_flex_md_0_b_t_cn_set,
+    bcmpkt_ifa_flex_md_0_b_t_port_speed_set,
+    bcmpkt_ifa_flex_md_0_b_t_queue_id_set,
+    bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_0_b_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_0_B_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_0_b_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_0_b_t_field_data,
+};
+
+
+static int32_t bcmpkt_ifa_flex_md_1_t_egress_port_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_1_t_egress_port_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_1_t_ingress_port_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_1_t_ingress_port_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_1_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT] = {
+    bcmpkt_ifa_flex_md_1_t_egress_port_id_get,
+    bcmpkt_ifa_flex_md_1_t_ingress_port_id_get,
+    bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_1_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT] = {
+    bcmpkt_ifa_flex_md_1_t_egress_port_id_set,
+    bcmpkt_ifa_flex_md_1_t_ingress_port_id_set,
+    bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_1_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_1_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_1_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_1_t_field_data,
+};
+
+
+static int32_t bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_2_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT] = {
+    bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_get,
+    bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_2_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT] = {
+    bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_set,
+    bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_2_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_2_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_2_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_2_t_field_data,
+};
+
+
+static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_3_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT] = {
+    bcmpkt_ifa_flex_md_3_t_mmu_stat_0_get,
+    bcmpkt_ifa_flex_md_3_t_mmu_stat_1_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_3_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT] = {
+    bcmpkt_ifa_flex_md_3_t_mmu_stat_0_set,
+    bcmpkt_ifa_flex_md_3_t_mmu_stat_1_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_3_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_3_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_3_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_3_t_field_data,
+};
+
+
+static int32_t bcmpkt_ifa_header_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_gns_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_gns_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_max_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_max_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_next_hdr_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_next_hdr_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_ver_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_ver_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_ifa_header_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_HEADER_T_FID_COUNT] = {
+    bcmpkt_ifa_header_t_flags_get,
+    bcmpkt_ifa_header_t_gns_get,
+    bcmpkt_ifa_header_t_max_length_get,
+    bcmpkt_ifa_header_t_next_hdr_get,
+    bcmpkt_ifa_header_t_ver_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_ifa_header_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_HEADER_T_FID_COUNT] = {
+    bcmpkt_ifa_header_t_flags_set,
+    bcmpkt_ifa_header_t_gns_set,
+    bcmpkt_ifa_header_t_max_length_set,
+    bcmpkt_ifa_header_t_next_hdr_set,
+    bcmpkt_ifa_header_t_ver_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_ifa_header_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_ifa_header_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_HEADER_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_29_2_1_ifa_header_t_field_data,
+};
+
+
+static int32_t bcmpkt_ifa_md_base_t_action_vector_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_md_base_t_action_vector_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_md_base_t_hop_limit_current_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_md_base_t_hop_limit_current_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_md_base_t_request_vector_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_md_base_t_request_vector_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_ifa_md_base_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_MD_BASE_T_FID_COUNT] = {
+    bcmpkt_ifa_md_base_t_action_vector_get,
+    bcmpkt_ifa_md_base_t_hop_limit_current_length_get,
+    bcmpkt_ifa_md_base_t_request_vector_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_ifa_md_base_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_MD_BASE_T_FID_COUNT] = {
+    bcmpkt_ifa_md_base_t_action_vector_set,
+    bcmpkt_ifa_md_base_t_hop_limit_current_length_set,
+    bcmpkt_ifa_md_base_t_request_vector_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_ifa_md_base_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_MD_BASE_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_ifa_md_base_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_MD_BASE_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_29_2_1_ifa_md_base_t_field_data,
+};
+
+
+static int32_t bcmpkt_ifa_metadata_t_action_vector_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_t_action_vector_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_t_hop_limit_current_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_t_hop_limit_current_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_t_metadata_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_t_metadata_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_t_request_vector_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_t_request_vector_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_ifa_metadata_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_METADATA_T_FID_COUNT] = {
+    bcmpkt_ifa_metadata_t_action_vector_get,
+    bcmpkt_ifa_metadata_t_hop_limit_current_length_get,
+    bcmpkt_ifa_metadata_t_metadata_get,
+    bcmpkt_ifa_metadata_t_request_vector_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_ifa_metadata_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_METADATA_T_FID_COUNT] = {
+    bcmpkt_ifa_metadata_t_action_vector_set,
+    bcmpkt_ifa_metadata_t_hop_limit_current_length_set,
+    bcmpkt_ifa_metadata_t_metadata_set,
+    bcmpkt_ifa_metadata_t_request_vector_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_ifa_metadata_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_METADATA_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_ifa_metadata_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IFA_METADATA_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_29_2_1_ifa_metadata_t_field_data,
+};
+
+
+static int32_t bcmpkt_igmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_igmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_igmp_t_group_address_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_igmp_t_group_address_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_igmp_t_igmp_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_igmp_t_igmp_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_igmp_t_max_resp_time_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_igmp_t_max_resp_time_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_igmp_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IGMP_T_FID_COUNT] = {
+    bcmpkt_igmp_t_checksum_get,
+    bcmpkt_igmp_t_group_address_get,
+    bcmpkt_igmp_t_igmp_type_get,
+    bcmpkt_igmp_t_max_resp_time_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_igmp_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IGMP_T_FID_COUNT] = {
+    bcmpkt_igmp_t_checksum_set,
+    bcmpkt_igmp_t_group_address_set,
+    bcmpkt_igmp_t_igmp_type_set,
+    bcmpkt_igmp_t_max_resp_time_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_igmp_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_igmp_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IGMP_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_29_2_1_igmp_t_field_data,
+};
+
+
+static int32_t bcmpkt_ipfix_t_export_time_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_export_time_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_obs_domain_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_obs_domain_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_ipfix_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPFIX_T_FID_COUNT] = {
+    bcmpkt_ipfix_t_export_time_get,
+    bcmpkt_ipfix_t_length_get,
+    bcmpkt_ipfix_t_obs_domain_id_get,
+    bcmpkt_ipfix_t_sequence_num_get,
+    bcmpkt_ipfix_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_ipfix_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPFIX_T_FID_COUNT] = {
+    bcmpkt_ipfix_t_export_time_set,
+    bcmpkt_ipfix_t_length_set,
+    bcmpkt_ipfix_t_obs_domain_id_set,
+    bcmpkt_ipfix_t_sequence_num_set,
+    bcmpkt_ipfix_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_ipfix_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_ipfix_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPFIX_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_29_2_1_ipfix_t_field_data,
+};
+
+
+static int32_t bcmpkt_ipv4_t_da_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_da_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_flags_frag_offset_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_flags_frag_offset_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_hdr_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_hdr_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_option_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_option_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_protocol_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_protocol_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_sa_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_sa_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_tos_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_tos_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_total_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_total_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_ttl_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_ttl_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_version_hdr_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_version_hdr_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_ipv4_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV4_T_FID_COUNT] = {
+    bcmpkt_ipv4_t_da_get,
+    bcmpkt_ipv4_t_flags_frag_offset_get,
+    bcmpkt_ipv4_t_hdr_checksum_get,
+    bcmpkt_ipv4_t_id_get,
+    bcmpkt_ipv4_t_option_get,
+    bcmpkt_ipv4_t_protocol_get,
+    bcmpkt_ipv4_t_sa_get,
+    bcmpkt_ipv4_t_tos_get,
+    bcmpkt_ipv4_t_total_length_get,
+    bcmpkt_ipv4_t_ttl_get,
+    bcmpkt_ipv4_t_version_hdr_len_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_ipv4_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV4_T_FID_COUNT] = {
+    bcmpkt_ipv4_t_da_set,
+    bcmpkt_ipv4_t_flags_frag_offset_set,
+    bcmpkt_ipv4_t_hdr_checksum_set,
+    bcmpkt_ipv4_t_id_set,
+    bcmpkt_ipv4_t_option_set,
+    bcmpkt_ipv4_t_protocol_set,
+    bcmpkt_ipv4_t_sa_set,
+    bcmpkt_ipv4_t_tos_set,
+    bcmpkt_ipv4_t_total_length_set,
+    bcmpkt_ipv4_t_ttl_set,
+    bcmpkt_ipv4_t_version_hdr_len_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_ipv4_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_ipv4_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV4_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_29_2_1_ipv4_t_field_data,
+};
+
+
+static int32_t bcmpkt_ipv6_t_da_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_da_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_flow_label_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 20);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_flow_label_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 20, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_hop_limit_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_hop_limit_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 8, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 8, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_payload_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_payload_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_sa_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_sa_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_traffic_class_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 20, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_traffic_class_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 20, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_ipv6_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV6_T_FID_COUNT] = {
+    bcmpkt_ipv6_t_da_get,
+    bcmpkt_ipv6_t_flow_label_get,
+    bcmpkt_ipv6_t_hop_limit_get,
+    bcmpkt_ipv6_t_next_header_get,
+    bcmpkt_ipv6_t_payload_length_get,
+    bcmpkt_ipv6_t_sa_get,
+    bcmpkt_ipv6_t_traffic_class_get,
+    bcmpkt_ipv6_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_ipv6_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV6_T_FID_COUNT] = {
+    bcmpkt_ipv6_t_da_set,
+    bcmpkt_ipv6_t_flow_label_set,
+    bcmpkt_ipv6_t_hop_limit_set,
+    bcmpkt_ipv6_t_next_header_set,
+    bcmpkt_ipv6_t_payload_length_set,
+    bcmpkt_ipv6_t_sa_set,
+    bcmpkt_ipv6_t_traffic_class_set,
+    bcmpkt_ipv6_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_ipv6_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_ipv6_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_IPV6_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_29_2_1_ipv6_t_field_data,
+};
+
+
+static int32_t bcmpkt_l2_t_macda_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_l2_t_macda_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_l2_t_macsa_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_l2_t_macsa_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_l2_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_L2_T_FID_COUNT] = {
+    bcmpkt_l2_t_macda_get,
+    bcmpkt_l2_t_macsa_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_l2_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_L2_T_FID_COUNT] = {
+    bcmpkt_l2_t_macda_set,
+    bcmpkt_l2_t_macsa_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_l2_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_L2_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_l2_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_L2_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_29_2_1_l2_t_field_data,
+};
+
+
+static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_mirror_erspan_sn_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = {
+    bcmpkt_mirror_erspan_sn_t_seq_num_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_mirror_erspan_sn_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = {
+    bcmpkt_mirror_erspan_sn_t_seq_num_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_mirror_erspan_sn_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_mirror_erspan_sn_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_29_2_1_mirror_erspan_sn_t_field_data,
+};
+
+
+static int32_t bcmpkt_mirror_transport_t_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_mirror_transport_t_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_mirror_transport_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = {
+    bcmpkt_mirror_transport_t_data_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_mirror_transport_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = {
+    bcmpkt_mirror_transport_t_data_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_mirror_transport_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_mirror_transport_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_29_2_1_mirror_transport_t_field_data,
+};
+
+
+static int32_t bcmpkt_mpls_ach_t_channel_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_ach_t_channel_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_ach_t_cw_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_ach_t_cw_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_ach_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_ach_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_ach_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_ach_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 4, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_mpls_ach_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_ACH_T_FID_COUNT] = {
+    bcmpkt_mpls_ach_t_channel_type_get,
+    bcmpkt_mpls_ach_t_cw_type_get,
+    bcmpkt_mpls_ach_t_reserved_get,
+    bcmpkt_mpls_ach_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_mpls_ach_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_ACH_T_FID_COUNT] = {
+    bcmpkt_mpls_ach_t_channel_type_set,
+    bcmpkt_mpls_ach_t_cw_type_set,
+    bcmpkt_mpls_ach_t_reserved_set,
+    bcmpkt_mpls_ach_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_mpls_ach_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_mpls_ach_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_ACH_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_29_2_1_mpls_ach_t_field_data,
+};
+
+
+static int32_t bcmpkt_mpls_bv_t_value_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_bv_t_value_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_mpls_bv_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_BV_T_FID_COUNT] = {
+    bcmpkt_mpls_bv_t_value_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_mpls_bv_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_BV_T_FID_COUNT] = {
+    bcmpkt_mpls_bv_t_value_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_mpls_bv_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_mpls_bv_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_BV_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_29_2_1_mpls_bv_t_field_data,
+};
+
+
+static int32_t bcmpkt_mpls_cw_t_cw_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_cw_t_cw_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_cw_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 12);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_cw_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 12, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_cw_t_seq_number_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_cw_t_seq_number_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_mpls_cw_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_CW_T_FID_COUNT] = {
+    bcmpkt_mpls_cw_t_cw_type_get,
+    bcmpkt_mpls_cw_t_reserved_get,
+    bcmpkt_mpls_cw_t_seq_number_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_mpls_cw_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_CW_T_FID_COUNT] = {
+    bcmpkt_mpls_cw_t_cw_type_set,
+    bcmpkt_mpls_cw_t_reserved_set,
+    bcmpkt_mpls_cw_t_seq_number_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_mpls_cw_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_mpls_cw_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_CW_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_29_2_1_mpls_cw_t_field_data,
+};
+
+
+static int32_t bcmpkt_mpls_t_bos_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_t_bos_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_t_exp_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 9, 3);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_t_exp_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 9, 3, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_t_label_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 12, 20);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_t_label_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 12, 20, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_t_ttl_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_t_ttl_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_mpls_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_T_FID_COUNT] = {
+    bcmpkt_mpls_t_bos_get,
+    bcmpkt_mpls_t_exp_get,
+    bcmpkt_mpls_t_label_get,
+    bcmpkt_mpls_t_ttl_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_mpls_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_T_FID_COUNT] = {
+    bcmpkt_mpls_t_bos_set,
+    bcmpkt_mpls_t_exp_set,
+    bcmpkt_mpls_t_label_set,
+    bcmpkt_mpls_t_ttl_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_mpls_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_mpls_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_MPLS_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_29_2_1_mpls_t_field_data,
+};
+
+
+static int32_t bcmpkt_p_1588_t_cntrl_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[8], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_cntrl_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[8], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_correction_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_correction_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_domain_nb_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_domain_nb_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_logmsginterval_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[8], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_logmsginterval_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[8], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_msg_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_msg_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_msg_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_msg_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_reserved1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 20, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_reserved1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 20, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_reserved2_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_reserved3_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_reserved3_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_seq_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[7], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_seq_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[7], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_srcportid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_srcportid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_transportspec_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_transportspec_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 4, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_p_1588_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T_FID_COUNT] = {
+    bcmpkt_p_1588_t_cntrl_get,
+    bcmpkt_p_1588_t_correction_get,
+    bcmpkt_p_1588_t_domain_nb_get,
+    bcmpkt_p_1588_t_flags_get,
+    bcmpkt_p_1588_t_logmsginterval_get,
+    bcmpkt_p_1588_t_msg_length_get,
+    bcmpkt_p_1588_t_msg_type_get,
+    bcmpkt_p_1588_t_reserved1_get,
+    bcmpkt_p_1588_t_reserved2_get,
+    bcmpkt_p_1588_t_reserved3_get,
+    bcmpkt_p_1588_t_seq_id_get,
+    bcmpkt_p_1588_t_srcportid_get,
+    bcmpkt_p_1588_t_transportspec_get,
+    bcmpkt_p_1588_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_p_1588_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T_FID_COUNT] = {
+    bcmpkt_p_1588_t_cntrl_set,
+    bcmpkt_p_1588_t_correction_set,
+    bcmpkt_p_1588_t_domain_nb_set,
+    bcmpkt_p_1588_t_flags_set,
+    bcmpkt_p_1588_t_logmsginterval_set,
+    bcmpkt_p_1588_t_msg_length_set,
+    bcmpkt_p_1588_t_msg_type_set,
+    bcmpkt_p_1588_t_reserved1_set,
+    bcmpkt_p_1588_t_reserved2_set,
+    bcmpkt_p_1588_t_reserved3_set,
+    bcmpkt_p_1588_t_seq_id_set,
+    bcmpkt_p_1588_t_srcportid_set,
+    bcmpkt_p_1588_t_transportspec_set,
+    bcmpkt_p_1588_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_p_1588_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_p_1588_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_P_1588_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_29_2_1_p_1588_t_field_data,
+};
+
+
+static int32_t bcmpkt_prog_ext_hdr_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_prog_ext_hdr_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_prog_ext_hdr_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_prog_ext_hdr_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_prog_ext_hdr_t_option_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_prog_ext_hdr_t_option_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_prog_ext_hdr_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = {
+    bcmpkt_prog_ext_hdr_t_hdr_ext_len_get,
+    bcmpkt_prog_ext_hdr_t_next_header_get,
+    bcmpkt_prog_ext_hdr_t_option_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_prog_ext_hdr_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = {
+    bcmpkt_prog_ext_hdr_t_hdr_ext_len_set,
+    bcmpkt_prog_ext_hdr_t_next_header_set,
+    bcmpkt_prog_ext_hdr_t_option_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_prog_ext_hdr_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_prog_ext_hdr_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PROG_EXT_HDR_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_29_2_1_prog_ext_hdr_t_field_data,
+};
+
+
+static int32_t bcmpkt_psamp_0_t_flowset_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_flowset_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_next_hop_index_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_next_hop_index_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_psamp_0_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_0_T_FID_COUNT] = {
+    bcmpkt_psamp_0_t_flowset_get,
+    bcmpkt_psamp_0_t_length_get,
+    bcmpkt_psamp_0_t_next_hop_index_get,
+    bcmpkt_psamp_0_t_obs_time_ns_get,
+    bcmpkt_psamp_0_t_obs_time_s_get,
+    bcmpkt_psamp_0_t_template_id_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_psamp_0_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_0_T_FID_COUNT] = {
+    bcmpkt_psamp_0_t_flowset_set,
+    bcmpkt_psamp_0_t_length_set,
+    bcmpkt_psamp_0_t_next_hop_index_set,
+    bcmpkt_psamp_0_t_obs_time_ns_set,
+    bcmpkt_psamp_0_t_obs_time_s_set,
+    bcmpkt_psamp_0_t_template_id_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_psamp_0_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_psamp_0_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_0_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_29_2_1_psamp_0_t_field_data,
+};
+
+
+static int32_t bcmpkt_psamp_1_t_dlb_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_dlb_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_egress_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_egress_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_epoch_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_epoch_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_variable_flag_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_variable_flag_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 16, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_psamp_1_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_1_T_FID_COUNT] = {
+    bcmpkt_psamp_1_t_dlb_id_get,
+    bcmpkt_psamp_1_t_egress_port_get,
+    bcmpkt_psamp_1_t_epoch_get,
+    bcmpkt_psamp_1_t_ingress_port_get,
+    bcmpkt_psamp_1_t_sampled_length_get,
+    bcmpkt_psamp_1_t_user_meta_data_get,
+    bcmpkt_psamp_1_t_variable_flag_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_psamp_1_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_1_T_FID_COUNT] = {
+    bcmpkt_psamp_1_t_dlb_id_set,
+    bcmpkt_psamp_1_t_egress_port_set,
+    bcmpkt_psamp_1_t_epoch_set,
+    bcmpkt_psamp_1_t_ingress_port_set,
+    bcmpkt_psamp_1_t_sampled_length_set,
+    bcmpkt_psamp_1_t_user_meta_data_set,
+    bcmpkt_psamp_1_t_variable_flag_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_psamp_1_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_psamp_1_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_1_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_29_2_1_psamp_1_t_field_data,
+};
+
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[4], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[4], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[4], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[4], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_psamp_mirror_on_drop_0_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = {
+    bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_length_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_template_id_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_psamp_mirror_on_drop_0_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = {
+    bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_length_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_template_id_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_psamp_mirror_on_drop_0_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_psamp_mirror_on_drop_0_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_29_2_1_psamp_mirror_on_drop_0_t_field_data,
+};
+
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 6);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 6, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_smod_state_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 22, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_smod_state_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 22, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_psamp_mirror_on_drop_3_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = {
+    bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_get,
+    bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_get,
+    bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_get,
+    bcmpkt_psamp_mirror_on_drop_3_t_smod_state_get,
+    bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_get,
+    bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_get,
+    bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_psamp_mirror_on_drop_3_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = {
+    bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_set,
+    bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_set,
+    bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_set,
+    bcmpkt_psamp_mirror_on_drop_3_t_smod_state_set,
+    bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_set,
+    bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_set,
+    bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_psamp_mirror_on_drop_3_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_psamp_mirror_on_drop_3_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_29_2_1_psamp_mirror_on_drop_3_t_field_data,
+};
+
+
+static int32_t bcmpkt_rarp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_operation_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_operation_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_rarp_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RARP_T_FID_COUNT] = {
+    bcmpkt_rarp_t_hardware_len_get,
+    bcmpkt_rarp_t_hardware_type_get,
+    bcmpkt_rarp_t_operation_get,
+    bcmpkt_rarp_t_prot_addr_len_get,
+    bcmpkt_rarp_t_protocol_type_get,
+    bcmpkt_rarp_t_sender_ha_get,
+    bcmpkt_rarp_t_sender_ip_get,
+    bcmpkt_rarp_t_target_ha_get,
+    bcmpkt_rarp_t_target_ip_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_rarp_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RARP_T_FID_COUNT] = {
+    bcmpkt_rarp_t_hardware_len_set,
+    bcmpkt_rarp_t_hardware_type_set,
+    bcmpkt_rarp_t_operation_set,
+    bcmpkt_rarp_t_prot_addr_len_set,
+    bcmpkt_rarp_t_protocol_type_set,
+    bcmpkt_rarp_t_sender_ha_set,
+    bcmpkt_rarp_t_sender_ip_set,
+    bcmpkt_rarp_t_target_ha_set,
+    bcmpkt_rarp_t_target_ip_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_rarp_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_rarp_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RARP_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_29_2_1_rarp_t_field_data,
+};
+
+
+static int32_t bcmpkt_routing_t_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_routing_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_routing_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_segments_left_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_segments_left_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_routing_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ROUTING_T_FID_COUNT] = {
+    bcmpkt_routing_t_data_get,
+    bcmpkt_routing_t_hdr_ext_len_get,
+    bcmpkt_routing_t_next_header_get,
+    bcmpkt_routing_t_routing_type_get,
+    bcmpkt_routing_t_segments_left_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_routing_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ROUTING_T_FID_COUNT] = {
+    bcmpkt_routing_t_data_set,
+    bcmpkt_routing_t_hdr_ext_len_set,
+    bcmpkt_routing_t_next_header_set,
+    bcmpkt_routing_t_routing_type_set,
+    bcmpkt_routing_t_segments_left_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_routing_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_routing_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_ROUTING_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_29_2_1_routing_t_field_data,
+};
+
+
+static int32_t bcmpkt_rspan_t_tag_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rspan_t_tag_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rspan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rspan_t_tpid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_rspan_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RSPAN_T_FID_COUNT] = {
+    bcmpkt_rspan_t_tag_get,
+    bcmpkt_rspan_t_tpid_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_rspan_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RSPAN_T_FID_COUNT] = {
+    bcmpkt_rspan_t_tag_set,
+    bcmpkt_rspan_t_tpid_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_rspan_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_rspan_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_RSPAN_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_29_2_1_rspan_t_field_data,
+};
+
+
+static int32_t bcmpkt_sflow_shim_0_t_sys_destination_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_0_t_sys_destination_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_0_t_sys_source_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_0_t_sys_source_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_0_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_0_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_sflow_shim_0_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = {
+    bcmpkt_sflow_shim_0_t_sys_destination_get,
+    bcmpkt_sflow_shim_0_t_sys_source_get,
+    bcmpkt_sflow_shim_0_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_sflow_shim_0_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = {
+    bcmpkt_sflow_shim_0_t_sys_destination_set,
+    bcmpkt_sflow_shim_0_t_sys_source_set,
+    bcmpkt_sflow_shim_0_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_sflow_shim_0_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_sflow_shim_0_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_29_2_1_sflow_shim_0_t_field_data,
+};
+
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_dest_sample_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 30, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_dest_sample_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 30, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_discarded_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 27, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_discarded_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 27, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_flex_sample_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 29, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_flex_sample_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 29, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_mcast_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_mcast_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_src_sample_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 31, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_src_sample_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 31, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_truncated_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 26, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_truncated_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 26, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 7);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 7, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 23, 3);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 23, 3, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_sflow_shim_1_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = {
+    bcmpkt_sflow_shim_1_t_flag_dest_sample_get,
+    bcmpkt_sflow_shim_1_t_flag_discarded_get,
+    bcmpkt_sflow_shim_1_t_flag_flex_sample_get,
+    bcmpkt_sflow_shim_1_t_flag_mcast_get,
+    bcmpkt_sflow_shim_1_t_flag_src_sample_get,
+    bcmpkt_sflow_shim_1_t_flag_truncated_get,
+    bcmpkt_sflow_shim_1_t_reserved_get,
+    bcmpkt_sflow_shim_1_t_sys_opcode_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_sflow_shim_1_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = {
+    bcmpkt_sflow_shim_1_t_flag_dest_sample_set,
+    bcmpkt_sflow_shim_1_t_flag_discarded_set,
+    bcmpkt_sflow_shim_1_t_flag_flex_sample_set,
+    bcmpkt_sflow_shim_1_t_flag_mcast_set,
+    bcmpkt_sflow_shim_1_t_flag_src_sample_set,
+    bcmpkt_sflow_shim_1_t_flag_truncated_set,
+    bcmpkt_sflow_shim_1_t_reserved_set,
+    bcmpkt_sflow_shim_1_t_sys_opcode_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_sflow_shim_1_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_sflow_shim_1_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_29_2_1_sflow_shim_1_t_field_data,
+};
+
+
+static int32_t bcmpkt_sflow_shim_2_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_2_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_sflow_shim_2_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = {
+    bcmpkt_sflow_shim_2_t_sequence_num_get,
+    bcmpkt_sflow_shim_2_t_user_meta_data_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_sflow_shim_2_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = {
+    bcmpkt_sflow_shim_2_t_sequence_num_set,
+    bcmpkt_sflow_shim_2_t_user_meta_data_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_sflow_shim_2_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_sflow_shim_2_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_29_2_1_sflow_shim_2_t_field_data,
+};
+
+
+static int32_t bcmpkt_snap_llc_t_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_snap_llc_t_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_snap_llc_t_snap_llc_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_snap_llc_t_snap_llc_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_snap_llc_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SNAP_LLC_T_FID_COUNT] = {
+    bcmpkt_snap_llc_t_length_get,
+    bcmpkt_snap_llc_t_snap_llc_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_snap_llc_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SNAP_LLC_T_FID_COUNT] = {
+    bcmpkt_snap_llc_t_length_set,
+    bcmpkt_snap_llc_t_snap_llc_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_snap_llc_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_snap_llc_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SNAP_LLC_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_29_2_1_snap_llc_t_field_data,
+};
+
+
+static int32_t bcmpkt_svtag_t_data_lwr_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_svtag_t_data_lwr_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_svtag_t_data_upr_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_svtag_t_data_upr_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_svtag_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SVTAG_T_FID_COUNT] = {
+    bcmpkt_svtag_t_data_lwr_get,
+    bcmpkt_svtag_t_data_upr_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_svtag_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SVTAG_T_FID_COUNT] = {
+    bcmpkt_svtag_t_data_lwr_set,
+    bcmpkt_svtag_t_data_upr_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_svtag_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SVTAG_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_svtag_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_SVTAG_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_29_2_1_svtag_t_field_data,
+};
+
+
+static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_first_4bytes_t_src_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_first_4bytes_t_src_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_tcp_first_4bytes_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = {
+    bcmpkt_tcp_first_4bytes_t_dst_port_get,
+    bcmpkt_tcp_first_4bytes_t_src_port_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_tcp_first_4bytes_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = {
+    bcmpkt_tcp_first_4bytes_t_dst_port_set,
+    bcmpkt_tcp_first_4bytes_t_src_port_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_tcp_first_4bytes_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_tcp_first_4bytes_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_29_2_1_tcp_first_4bytes_t_field_data,
+};
+
+
+static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_win_size_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_win_size_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_tcp_last_16bytes_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = {
+    bcmpkt_tcp_last_16bytes_t_ack_num_get,
+    bcmpkt_tcp_last_16bytes_t_checksum_get,
+    bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get,
+    bcmpkt_tcp_last_16bytes_t_seq_num_get,
+    bcmpkt_tcp_last_16bytes_t_urgent_ptr_get,
+    bcmpkt_tcp_last_16bytes_t_win_size_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_tcp_last_16bytes_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = {
+    bcmpkt_tcp_last_16bytes_t_ack_num_set,
+    bcmpkt_tcp_last_16bytes_t_checksum_set,
+    bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set,
+    bcmpkt_tcp_last_16bytes_t_seq_num_set,
+    bcmpkt_tcp_last_16bytes_t_urgent_ptr_set,
+    bcmpkt_tcp_last_16bytes_t_win_size_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_tcp_last_16bytes_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_tcp_last_16bytes_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_29_2_1_tcp_last_16bytes_t_field_data,
+};
+
+
+static int32_t bcmpkt_udp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_dst_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_src_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_src_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_udp_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_udp_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_udp_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UDP_T_FID_COUNT] = {
+    bcmpkt_udp_t_checksum_get,
+    bcmpkt_udp_t_dst_port_get,
+    bcmpkt_udp_t_src_port_get,
+    bcmpkt_udp_t_udp_length_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_udp_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UDP_T_FID_COUNT] = {
+    bcmpkt_udp_t_checksum_set,
+    bcmpkt_udp_t_dst_port_set,
+    bcmpkt_udp_t_src_port_set,
+    bcmpkt_udp_t_udp_length_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_udp_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_udp_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UDP_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_29_2_1_udp_t_field_data,
+};
+
+
+static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_unknown_l3_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = {
+    bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get,
+    bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_unknown_l3_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = {
+    bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set,
+    bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_unknown_l3_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_unknown_l3_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L3_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_29_2_1_unknown_l3_t_field_data,
+};
+
+
+static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_unknown_l4_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = {
+    bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_unknown_l4_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = {
+    bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_unknown_l4_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_unknown_l4_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L4_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_29_2_1_unknown_l4_t_field_data,
+};
+
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_unknown_l5_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = {
+    bcmpkt_unknown_l5_t_l5_bytes_0_1_get,
+    bcmpkt_unknown_l5_t_l5_bytes_2_3_get,
+    bcmpkt_unknown_l5_t_l5_bytes_4_7_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_unknown_l5_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = {
+    bcmpkt_unknown_l5_t_l5_bytes_0_1_set,
+    bcmpkt_unknown_l5_t_l5_bytes_2_3_set,
+    bcmpkt_unknown_l5_t_l5_bytes_4_7_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_unknown_l5_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_unknown_l5_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_UNKNOWN_L5_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_29_2_1_unknown_l5_t_field_data,
+};
+
+
+static int32_t bcmpkt_vlan_t_cfi_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 12, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_cfi_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 12, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_pcp_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 13, 3);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_pcp_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 13, 3, val);
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_tpid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_vid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 12);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_vid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 12, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_vlan_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VLAN_T_FID_COUNT] = {
+    bcmpkt_vlan_t_cfi_get,
+    bcmpkt_vlan_t_pcp_get,
+    bcmpkt_vlan_t_tpid_get,
+    bcmpkt_vlan_t_vid_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_vlan_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VLAN_T_FID_COUNT] = {
+    bcmpkt_vlan_t_cfi_set,
+    bcmpkt_vlan_t_pcp_set,
+    bcmpkt_vlan_t_tpid_set,
+    bcmpkt_vlan_t_vid_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_vlan_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_vlan_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VLAN_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_29_2_1_vlan_t_field_data,
+};
+
+
+static int32_t bcmpkt_vntag_t_tag_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_vntag_t_tag_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_vntag_t_tpid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vntag_t_tpid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_vntag_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VNTAG_T_FID_COUNT] = {
+    bcmpkt_vntag_t_tag_get,
+    bcmpkt_vntag_t_tpid_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_vntag_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VNTAG_T_FID_COUNT] = {
+    bcmpkt_vntag_t_tag_set,
+    bcmpkt_vntag_t_tpid_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_vntag_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VNTAG_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_vntag_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VNTAG_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_29_2_1_vntag_t_field_data,
+};
+
+
+static int32_t bcmpkt_vxlan_t_flags_reserved_1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_vxlan_t_flags_reserved_1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_vxlan_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vxlan_t_reserved2_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_vxlan_t_vn_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 8, 24);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vxlan_t_vn_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 8, 24, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_vxlan_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VXLAN_T_FID_COUNT] = {
+    bcmpkt_vxlan_t_flags_reserved_1_get,
+    bcmpkt_vxlan_t_reserved2_get,
+    bcmpkt_vxlan_t_vn_id_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_vxlan_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VXLAN_T_FID_COUNT] = {
+    bcmpkt_vxlan_t_flags_reserved_1_set,
+    bcmpkt_vxlan_t_reserved2_set,
+    bcmpkt_vxlan_t_vn_id_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_vxlan_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_vxlan_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_VXLAN_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_29_2_1_vxlan_t_field_data,
+};
+
+
+static int32_t bcmpkt_wesp_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_header_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_header_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_spi_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_spi_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_trailer_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_trailer_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_wesp_iv_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_wesp_iv_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_29_2_1_wesp_t_fget[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_WESP_T_FID_COUNT] = {
+    bcmpkt_wesp_t_flags_get,
+    bcmpkt_wesp_t_header_len_get,
+    bcmpkt_wesp_t_next_header_get,
+    bcmpkt_wesp_t_seq_num_get,
+    bcmpkt_wesp_t_spi_get,
+    bcmpkt_wesp_t_trailer_len_get,
+    bcmpkt_wesp_t_wesp_iv_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_29_2_1_wesp_t_fset[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_WESP_T_FID_COUNT] = {
+    bcmpkt_wesp_t_flags_set,
+    bcmpkt_wesp_t_header_len_set,
+    bcmpkt_wesp_t_next_header_set,
+    bcmpkt_wesp_t_seq_num_set,
+    bcmpkt_wesp_t_spi_set,
+    bcmpkt_wesp_t_trailer_len_set,
+    bcmpkt_wesp_t_wesp_iv_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_29_2_1_wesp_t_field_data[] = {
+    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_29_2_1_wesp_t_field_info = {
+    .num_fields = BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_WESP_T_FID_COUNT,
+    .info = bcm56780_a0_hna_6_5_29_2_1_wesp_t_field_data,
+};
+
+static bcmpkt_flex_pmd_info_t bcm56780_a0_hna_6_5_29_2_1_flexhdr_info_list[BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_FLEXHDR_COUNT] = {
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_29_2_1_arp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_arp_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_arp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_29_2_1_authen_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_authen_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_authen_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_29_2_1_bfd_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_bfd_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_bfd_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_29_2_1_cntag_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_cntag_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_cntag_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_29_2_1_cpu_composites_0_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_cpu_composites_0_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_cpu_composites_0_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_29_2_1_cpu_composites_1_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_cpu_composites_1_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_cpu_composites_1_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_29_2_1_dest_option_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_dest_option_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_dest_option_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_29_2_1_ep_nih_header_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_ep_nih_header_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_ep_nih_header_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_29_2_1_erspan3_fixed_hdr_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_erspan3_fixed_hdr_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_erspan3_fixed_hdr_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_29_2_1_erspan3_subhdr_5_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_erspan3_subhdr_5_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_erspan3_subhdr_5_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_29_2_1_esp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_esp_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_esp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_29_2_1_etag_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_etag_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_etag_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_29_2_1_ethertype_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_ethertype_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_ethertype_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_29_2_1_frag_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_frag_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_frag_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_29_2_1_generic_loopback_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_generic_loopback_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_generic_loopback_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_29_2_1_gpe_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_gpe_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_gpe_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_29_2_1_gre_chksum_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_gre_chksum_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_gre_chksum_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_29_2_1_gre_key_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_gre_key_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_gre_key_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_29_2_1_gre_rout_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_gre_rout_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_gre_rout_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_29_2_1_gre_seq_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_gre_seq_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_gre_seq_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_29_2_1_gre_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_gre_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_gre_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_29_2_1_hop_by_hop_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_hop_by_hop_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_hop_by_hop_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_29_2_1_icmp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_icmp_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_icmp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_0_a_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_0_a_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_0_a_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_0_b_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_0_b_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_0_b_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_1_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_1_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_1_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_2_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_2_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_2_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_3_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_3_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_ifa_flex_md_3_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_29_2_1_ifa_header_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_ifa_header_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_ifa_header_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_29_2_1_ifa_md_base_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_ifa_md_base_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_ifa_md_base_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_29_2_1_ifa_metadata_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_ifa_metadata_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_ifa_metadata_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_29_2_1_igmp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_igmp_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_igmp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_29_2_1_ipfix_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_ipfix_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_ipfix_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_29_2_1_ipv4_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_ipv4_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_ipv4_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_29_2_1_ipv6_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_ipv6_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_ipv6_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_29_2_1_l2_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_l2_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_l2_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_29_2_1_mirror_erspan_sn_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_mirror_erspan_sn_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_mirror_erspan_sn_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_29_2_1_mirror_transport_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_mirror_transport_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_mirror_transport_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_29_2_1_mpls_ach_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_mpls_ach_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_mpls_ach_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_29_2_1_mpls_bv_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_mpls_bv_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_mpls_bv_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_29_2_1_mpls_cw_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_mpls_cw_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_mpls_cw_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_29_2_1_mpls_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_mpls_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_mpls_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_29_2_1_p_1588_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_p_1588_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_p_1588_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_29_2_1_prog_ext_hdr_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_prog_ext_hdr_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_prog_ext_hdr_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_29_2_1_psamp_0_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_psamp_0_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_psamp_0_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_29_2_1_psamp_1_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_psamp_1_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_psamp_1_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_29_2_1_psamp_mirror_on_drop_0_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_psamp_mirror_on_drop_0_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_psamp_mirror_on_drop_0_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_29_2_1_psamp_mirror_on_drop_3_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_psamp_mirror_on_drop_3_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_psamp_mirror_on_drop_3_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_29_2_1_rarp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_rarp_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_rarp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_29_2_1_routing_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_routing_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_routing_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_29_2_1_rspan_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_rspan_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_rspan_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_29_2_1_sflow_shim_0_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_sflow_shim_0_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_sflow_shim_0_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_29_2_1_sflow_shim_1_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_sflow_shim_1_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_sflow_shim_1_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_29_2_1_sflow_shim_2_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_sflow_shim_2_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_sflow_shim_2_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_29_2_1_snap_llc_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_snap_llc_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_snap_llc_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_29_2_1_svtag_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_svtag_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_svtag_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_29_2_1_tcp_first_4bytes_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_tcp_first_4bytes_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_tcp_first_4bytes_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_29_2_1_tcp_last_16bytes_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_tcp_last_16bytes_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_tcp_last_16bytes_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_29_2_1_udp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_udp_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_udp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_29_2_1_unknown_l3_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_unknown_l3_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_unknown_l3_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_29_2_1_unknown_l4_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_unknown_l4_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_unknown_l4_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_29_2_1_unknown_l5_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_unknown_l5_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_unknown_l5_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_29_2_1_vlan_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_vlan_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_vlan_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_29_2_1_vntag_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_vntag_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_vntag_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_29_2_1_vxlan_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_vxlan_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_vxlan_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_29_2_1_wesp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_hna_6_5_29_2_1_wesp_t_fget,
+        .flex_fset = bcm56780_a0_hna_6_5_29_2_1_wesp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_hna_6_5_29_2_1_rxpmd_flex_field_info,
+        .reasons_info = &bcm56780_a0_hna_6_5_29_2_1_rxpmd_flex_reasons_info,
+        .flex_common_fget = bcm56780_a0_rxpmd_flex_fget,
+        .flex_common_fset = bcm56780_a0_rxpmd_flex_fset,
+    },
+};
+
+static shr_enum_map_t bcm56780_a0_hna_6_5_29_2_1_flexhdr_id_map[] = {
+    BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_FLEXHDR_NAME_MAP_INIT
+};
+
+shr_enum_map_t * bcm56780_a0_hna_6_5_29_2_1_flexhdr_map_get(void)
+{
+    return bcm56780_a0_hna_6_5_29_2_1_flexhdr_id_map;
+}
+
+bcmpkt_flex_pmd_info_t * bcm56780_a0_hna_6_5_29_2_1_flex_pmd_info_get(uint32_t hid)
+{
+    if (hid >= BCM56780_A0_HNA_6_5_29_2_1_BCMPKT_FLEXHDR_COUNT) {
+        return NULL;
+    }
+
+    return &bcm56780_a0_hna_6_5_29_2_1_flexhdr_info_list[hid];
+}
+
+int bcm56780_a0_hna_6_5_29_2_1_flexhdr_variant_support_map[BCMPKT_PMD_COUNT] = {
+    14,
+    -1,
+    -1,
+    66,
+};
\ No newline at end of file
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_bcmpkt_rxpmd_match_id.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_bcmpkt_rxpmd_match_id.c
new file mode 100644
index 000000000..9830ad007
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_bcmpkt_rxpmd_match_id.c
@@ -0,0 +1,2508 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) bcm56780_a0_ina_2_6_11_0_sf_match_id_info.yml
+ * for device bcm56780_a0 and variant ina_2_6_11_0.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+
+#include <bcmpkt/bcmpkt_rxpmd_match_id.h>
+#include <bcmpkt/xfcr/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_bcmpkt_rxpmd_match_id_defs.h>
+
+
+static bcmpkt_rxpmd_match_id_db_t
+bcm56780_a0_ina_2_6_11_0_rxpmd_match_id_db[BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_COUNT] = {
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_ETAG",
+        .match        = 0x80,
+        .match_mask   = 0xc0,
+        .match_maxbit = 31,
+        .match_minbit = 24,
+        .maxbit       = 7,
+        .minbit       = 6,
+        .value        = 0x2,
+        .pmaxbit      = 42,
+        .pminbit      = 35,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_HG3_BASE",
+        .match        = 0x2,
+        .match_mask   = 0x2,
+        .match_maxbit = 31,
+        .match_minbit = 24,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 42,
+        .pminbit      = 35,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0 */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0",
+        .match        = 0x8,
+        .match_mask   = 0x8,
+        .match_maxbit = 31,
+        .match_minbit = 24,
+        .maxbit       = 3,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 42,
+        .pminbit      = 35,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_ITAG",
+        .match        = 0x20,
+        .match_mask   = 0x20,
+        .match_maxbit = 31,
+        .match_minbit = 24,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 42,
+        .pminbit      = 35,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_L2",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 31,
+        .match_minbit = 24,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 42,
+        .pminbit      = 35,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0xff,
+        .match_maxbit = 31,
+        .match_minbit = 24,
+        .maxbit       = 7,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 42,
+        .pminbit      = 35,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_OTAG",
+        .match        = 0x10,
+        .match_mask   = 0x10,
+        .match_maxbit = 31,
+        .match_minbit = 24,
+        .maxbit       = 4,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 42,
+        .pminbit      = 35,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC",
+        .match        = 0x4,
+        .match_mask   = 0x4,
+        .match_maxbit = 31,
+        .match_minbit = 24,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 42,
+        .pminbit      = 35,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_VNTAG",
+        .match        = 0x40,
+        .match_mask   = 0xc0,
+        .match_maxbit = 31,
+        .match_minbit = 24,
+        .maxbit       = 7,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 42,
+        .pminbit      = 35,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ARP",
+        .match        = 0x1000,
+        .match_mask   = 0x3806,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x2,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1",
+        .match        = 0x80,
+        .match_mask   = 0x1a0,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2",
+        .match        = 0x418,
+        .match_mask   = 0x638,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x2,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_BFD",
+        .match        = 0x2800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x5,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT",
+        .match        = 0x200,
+        .match_mask   = 0x626,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1",
+        .match        = 0x180,
+        .match_mask   = 0x1a0,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x3,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2",
+        .match        = 0x600,
+        .match_mask   = 0x620,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x3,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GPE",
+        .match        = 0x1004,
+        .match_mask   = 0x3826,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x2,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE",
+        .match        = 0x6,
+        .match_mask   = 0x26,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x3,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM",
+        .match        = 0x206,
+        .match_mask   = 0x626,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY",
+        .match        = 0x806,
+        .match_mask   = 0x3826,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT",
+        .match        = 0x100,
+        .match_mask   = 0x1a0,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x2,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ",
+        .match        = 0x46,
+        .match_mask   = 0x66,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 6,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ICMP",
+        .match        = 0x1800,
+        .match_mask   = 0x3806,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x3,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER",
+        .match        = 0x3800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x7,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IGMP",
+        .match        = 0x410,
+        .match_mask   = 0x638,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x2,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IPV4",
+        .match        = 0x10,
+        .match_mask   = 0x38,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x2,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IPV6",
+        .match        = 0x18,
+        .match_mask   = 0x38,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x3,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS0",
+        .match        = 0x20,
+        .match_mask   = 0x20,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS1",
+        .match        = 0x22,
+        .match_mask   = 0x22,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS2",
+        .match        = 0x24,
+        .match_mask   = 0x24,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS3",
+        .match        = 0x28,
+        .match_mask   = 0x28,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 3,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS4",
+        .match        = 0x30,
+        .match_mask   = 0x30,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 4,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS5",
+        .match        = 0x60,
+        .match_mask   = 0x60,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 6,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS6",
+        .match        = 0xa0,
+        .match_mask   = 0xa0,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 7,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH",
+        .match        = 0x120,
+        .match_mask   = 0x120,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 8,
+        .minbit       = 8,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW",
+        .match        = 0x220,
+        .match_mask   = 0x220,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 9,
+        .minbit       = 9,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x3fff,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 13,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_P_1588",
+        .match        = 0x3000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x6,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_RARP",
+        .match        = 0x800,
+        .match_mask   = 0x3806,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES",
+        .match        = 0x2,
+        .match_mask   = 0x26,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES",
+        .match        = 0x42,
+        .match_mask   = 0x66,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 6,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UDP",
+        .match        = 0x4,
+        .match_mask   = 0x26,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x2,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3",
+        .match        = 0x8,
+        .match_mask   = 0x38,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4",
+        .match        = 0x2000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x4,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5",
+        .match        = 0x1804,
+        .match_mask   = 0x3826,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x3,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_VXLAN",
+        .match        = 0x804,
+        .match_mask   = 0x3826,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH */
+        .name         = "EGRESS_PKT_SYS_HDR_EP_NIH",
+        .match        = 0x2,
+        .match_mask   = 0x3,
+        .match_maxbit = 1,
+        .match_minbit = 0,
+        .maxbit       = 1,
+        .minbit       = 0,
+        .value        = 0x2,
+        .pmaxbit      = 1,
+        .pminbit      = 0,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK */
+        .name         = "EGRESS_PKT_SYS_HDR_LOOPBACK",
+        .match        = 0x1,
+        .match_mask   = 0x3,
+        .match_maxbit = 1,
+        .match_minbit = 0,
+        .maxbit       = 1,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 1,
+        .pminbit      = 0,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE */
+        .name         = "EGRESS_PKT_SYS_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x3,
+        .match_maxbit = 1,
+        .match_minbit = 0,
+        .maxbit       = 1,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 1,
+        .pminbit      = 0,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_ETAG",
+        .match        = 0x80,
+        .match_mask   = 0xc0,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 7,
+        .minbit       = 6,
+        .value        = 0x2,
+        .pmaxbit      = 14,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE",
+        .match        = 0x2,
+        .match_mask   = 0x2,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 14,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0 */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0",
+        .match        = 0x8,
+        .match_mask   = 0x8,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 3,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 14,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_ITAG",
+        .match        = 0x20,
+        .match_mask   = 0x20,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 14,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_L2",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 14,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0xff,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 7,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 14,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_OTAG",
+        .match        = 0x10,
+        .match_mask   = 0x10,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 4,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 14,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC",
+        .match        = 0x4,
+        .match_mask   = 0x4,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 14,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_VNTAG",
+        .match        = 0x40,
+        .match_mask   = 0xc0,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 7,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 14,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP",
+        .match        = 0x1000,
+        .match_mask   = 0x3806,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x2,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1",
+        .match        = 0x80,
+        .match_mask   = 0x1a0,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2",
+        .match        = 0x418,
+        .match_mask   = 0x638,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x2,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD",
+        .match        = 0x2800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x5,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT",
+        .match        = 0x200,
+        .match_mask   = 0x626,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1",
+        .match        = 0x180,
+        .match_mask   = 0x1a0,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x3,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2",
+        .match        = 0x600,
+        .match_mask   = 0x620,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x3,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE",
+        .match        = 0x1004,
+        .match_mask   = 0x3826,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x2,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE",
+        .match        = 0x6,
+        .match_mask   = 0x26,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x3,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM",
+        .match        = 0x206,
+        .match_mask   = 0x626,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY",
+        .match        = 0x806,
+        .match_mask   = 0x3826,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT",
+        .match        = 0x100,
+        .match_mask   = 0x1a0,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x2,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ",
+        .match        = 0x46,
+        .match_mask   = 0x66,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 6,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP",
+        .match        = 0x1800,
+        .match_mask   = 0x3806,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x3,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER",
+        .match        = 0x3800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x7,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP",
+        .match        = 0x410,
+        .match_mask   = 0x638,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x2,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4",
+        .match        = 0x10,
+        .match_mask   = 0x38,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x2,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6",
+        .match        = 0x18,
+        .match_mask   = 0x38,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x3,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0",
+        .match        = 0x20,
+        .match_mask   = 0x20,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1",
+        .match        = 0x22,
+        .match_mask   = 0x22,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2",
+        .match        = 0x24,
+        .match_mask   = 0x24,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3",
+        .match        = 0x28,
+        .match_mask   = 0x28,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 3,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4",
+        .match        = 0x30,
+        .match_mask   = 0x30,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 4,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5",
+        .match        = 0x60,
+        .match_mask   = 0x60,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 6,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6",
+        .match        = 0xa0,
+        .match_mask   = 0xa0,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 7,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH",
+        .match        = 0x120,
+        .match_mask   = 0x120,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 8,
+        .minbit       = 8,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW",
+        .match        = 0x220,
+        .match_mask   = 0x220,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 9,
+        .minbit       = 9,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x3fff,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588",
+        .match        = 0x3000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x6,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP",
+        .match        = 0x800,
+        .match_mask   = 0x3806,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES",
+        .match        = 0x2,
+        .match_mask   = 0x26,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES",
+        .match        = 0x42,
+        .match_mask   = 0x66,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 6,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP",
+        .match        = 0x4,
+        .match_mask   = 0x26,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x2,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3",
+        .match        = 0x8,
+        .match_mask   = 0x38,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4",
+        .match        = 0x2000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x4,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5",
+        .match        = 0x1804,
+        .match_mask   = 0x3826,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x3,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN",
+        .match        = 0x804,
+        .match_mask   = 0x3826,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_ETAG",
+        .match        = 0x80,
+        .match_mask   = 0xc0,
+        .match_maxbit = 31,
+        .match_minbit = 24,
+        .maxbit       = 7,
+        .minbit       = 6,
+        .value        = 0x2,
+        .pmaxbit      = 31,
+        .pminbit      = 24,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_ITAG",
+        .match        = 0x20,
+        .match_mask   = 0x20,
+        .match_maxbit = 31,
+        .match_minbit = 24,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 31,
+        .pminbit      = 24,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_L2",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 31,
+        .match_minbit = 24,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 31,
+        .pminbit      = 24,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0xff,
+        .match_maxbit = 31,
+        .match_minbit = 24,
+        .maxbit       = 7,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 31,
+        .pminbit      = 24,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_OTAG",
+        .match        = 0x10,
+        .match_mask   = 0x10,
+        .match_maxbit = 31,
+        .match_minbit = 24,
+        .maxbit       = 4,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 31,
+        .pminbit      = 24,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC",
+        .match        = 0x4,
+        .match_mask   = 0x4,
+        .match_maxbit = 31,
+        .match_minbit = 24,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 31,
+        .pminbit      = 24,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_VNTAG",
+        .match        = 0x40,
+        .match_mask   = 0xc0,
+        .match_maxbit = 31,
+        .match_minbit = 24,
+        .maxbit       = 7,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 31,
+        .pminbit      = 24,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ARP",
+        .match        = 0x1000,
+        .match_mask   = 0x3806,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x2,
+        .pmaxbit      = 45,
+        .pminbit      = 32,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1",
+        .match        = 0x80,
+        .match_mask   = 0x1a0,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 45,
+        .pminbit      = 32,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2",
+        .match        = 0x418,
+        .match_mask   = 0x638,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x2,
+        .pmaxbit      = 45,
+        .pminbit      = 32,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_BFD",
+        .match        = 0x2800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x5,
+        .pmaxbit      = 45,
+        .pminbit      = 32,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT",
+        .match        = 0x200,
+        .match_mask   = 0x626,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x1,
+        .pmaxbit      = 45,
+        .pminbit      = 32,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 45,
+        .pminbit      = 32,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1",
+        .match        = 0x180,
+        .match_mask   = 0x1a0,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x3,
+        .pmaxbit      = 45,
+        .pminbit      = 32,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2",
+        .match        = 0x600,
+        .match_mask   = 0x620,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x3,
+        .pmaxbit      = 45,
+        .pminbit      = 32,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ICMP",
+        .match        = 0x1800,
+        .match_mask   = 0x3806,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x3,
+        .pmaxbit      = 45,
+        .pminbit      = 32,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IGMP",
+        .match        = 0x410,
+        .match_mask   = 0x638,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x2,
+        .pmaxbit      = 45,
+        .pminbit      = 32,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IPV4",
+        .match        = 0x10,
+        .match_mask   = 0x38,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x2,
+        .pmaxbit      = 45,
+        .pminbit      = 32,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IPV6",
+        .match        = 0x18,
+        .match_mask   = 0x38,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x3,
+        .pmaxbit      = 45,
+        .pminbit      = 32,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x3fff,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 13,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 45,
+        .pminbit      = 32,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_P_1588",
+        .match        = 0x3000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x6,
+        .pmaxbit      = 45,
+        .pminbit      = 32,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_RARP",
+        .match        = 0x800,
+        .match_mask   = 0x3806,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 45,
+        .pminbit      = 32,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES",
+        .match        = 0x2,
+        .match_mask   = 0x26,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 45,
+        .pminbit      = 32,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES",
+        .match        = 0x42,
+        .match_mask   = 0x66,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 6,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 45,
+        .pminbit      = 32,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UDP",
+        .match        = 0x4,
+        .match_mask   = 0x26,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x2,
+        .pmaxbit      = 45,
+        .pminbit      = 32,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3",
+        .match        = 0x8,
+        .match_mask   = 0x38,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 45,
+        .pminbit      = 32,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4",
+        .match        = 0x2000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x4,
+        .pmaxbit      = 45,
+        .pminbit      = 32,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5",
+        .match        = 0x1804,
+        .match_mask   = 0x3826,
+        .match_maxbit = 45,
+        .match_minbit = 32,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x3,
+        .pmaxbit      = 45,
+        .pminbit      = 32,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_ETAG",
+        .match        = 0x80,
+        .match_mask   = 0xc0,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 7,
+        .minbit       = 6,
+        .value        = 0x2,
+        .pmaxbit      = 9,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_HG3_BASE",
+        .match        = 0x2,
+        .match_mask   = 0x2,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 9,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0 */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0",
+        .match        = 0x8,
+        .match_mask   = 0x8,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 3,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 9,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_ITAG",
+        .match        = 0x20,
+        .match_mask   = 0x20,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 9,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_L2",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 9,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0xff,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 7,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 9,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_OTAG",
+        .match        = 0x10,
+        .match_mask   = 0x10,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 4,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 9,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC",
+        .match        = 0x4,
+        .match_mask   = 0x4,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 9,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_VNTAG",
+        .match        = 0x40,
+        .match_mask   = 0xc0,
+        .match_maxbit = 9,
+        .match_minbit = 2,
+        .maxbit       = 7,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 9,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ARP",
+        .match        = 0x1000,
+        .match_mask   = 0x3806,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x2,
+        .pmaxbit      = 23,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1",
+        .match        = 0x80,
+        .match_mask   = 0x1a0,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 23,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2",
+        .match        = 0x418,
+        .match_mask   = 0x638,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x2,
+        .pmaxbit      = 23,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_BFD",
+        .match        = 0x2800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x5,
+        .pmaxbit      = 23,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT",
+        .match        = 0x200,
+        .match_mask   = 0x626,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x1,
+        .pmaxbit      = 23,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 23,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1",
+        .match        = 0x180,
+        .match_mask   = 0x1a0,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x3,
+        .pmaxbit      = 23,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2",
+        .match        = 0x600,
+        .match_mask   = 0x620,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x3,
+        .pmaxbit      = 23,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GPE",
+        .match        = 0x1004,
+        .match_mask   = 0x3826,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x2,
+        .pmaxbit      = 23,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE",
+        .match        = 0x6,
+        .match_mask   = 0x26,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x3,
+        .pmaxbit      = 23,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM",
+        .match        = 0x206,
+        .match_mask   = 0x626,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x1,
+        .pmaxbit      = 23,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY",
+        .match        = 0x806,
+        .match_mask   = 0x3826,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 23,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT",
+        .match        = 0x100,
+        .match_mask   = 0x1a0,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x2,
+        .pmaxbit      = 23,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ",
+        .match        = 0x46,
+        .match_mask   = 0x66,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 6,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 23,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ICMP",
+        .match        = 0x1800,
+        .match_mask   = 0x3806,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x3,
+        .pmaxbit      = 23,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER",
+        .match        = 0x3800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x7,
+        .pmaxbit      = 23,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IGMP",
+        .match        = 0x410,
+        .match_mask   = 0x638,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x2,
+        .pmaxbit      = 23,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV4",
+        .match        = 0x10,
+        .match_mask   = 0x38,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x2,
+        .pmaxbit      = 23,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV6",
+        .match        = 0x18,
+        .match_mask   = 0x38,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x3,
+        .pmaxbit      = 23,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0",
+        .match        = 0x20,
+        .match_mask   = 0x20,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 23,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1",
+        .match        = 0x22,
+        .match_mask   = 0x22,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 23,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2",
+        .match        = 0x24,
+        .match_mask   = 0x24,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 23,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3",
+        .match        = 0x28,
+        .match_mask   = 0x28,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 3,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 23,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4",
+        .match        = 0x30,
+        .match_mask   = 0x30,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 4,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 23,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5",
+        .match        = 0x60,
+        .match_mask   = 0x60,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 6,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 23,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6",
+        .match        = 0xa0,
+        .match_mask   = 0xa0,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 7,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 23,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH",
+        .match        = 0x120,
+        .match_mask   = 0x120,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 8,
+        .minbit       = 8,
+        .value        = 0x1,
+        .pmaxbit      = 23,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW",
+        .match        = 0x220,
+        .match_mask   = 0x220,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 9,
+        .minbit       = 9,
+        .value        = 0x1,
+        .pmaxbit      = 23,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x3fff,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 23,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_P_1588",
+        .match        = 0x3000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x6,
+        .pmaxbit      = 23,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_RARP",
+        .match        = 0x800,
+        .match_mask   = 0x3806,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 23,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES",
+        .match        = 0x2,
+        .match_mask   = 0x26,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 23,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES",
+        .match        = 0x42,
+        .match_mask   = 0x66,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 6,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 23,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UDP",
+        .match        = 0x4,
+        .match_mask   = 0x26,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x2,
+        .pmaxbit      = 23,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3",
+        .match        = 0x8,
+        .match_mask   = 0x38,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 23,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4",
+        .match        = 0x2000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x4,
+        .pmaxbit      = 23,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5",
+        .match        = 0x1804,
+        .match_mask   = 0x3826,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x3,
+        .pmaxbit      = 23,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN",
+        .match        = 0x804,
+        .match_mask   = 0x3826,
+        .match_maxbit = 23,
+        .match_minbit = 10,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 23,
+        .pminbit      = 10,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH */
+        .name         = "INGRESS_PKT_SYS_HDR_EP_NIH",
+        .match        = 0x2,
+        .match_mask   = 0x3,
+        .match_maxbit = 1,
+        .match_minbit = 0,
+        .maxbit       = 1,
+        .minbit       = 0,
+        .value        = 0x2,
+        .pmaxbit      = 1,
+        .pminbit      = 0,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK */
+        .name         = "INGRESS_PKT_SYS_HDR_LOOPBACK",
+        .match        = 0x1,
+        .match_mask   = 0x3,
+        .match_maxbit = 1,
+        .match_minbit = 0,
+        .maxbit       = 1,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 1,
+        .pminbit      = 0,
+
+    },
+    {
+        /* BCM56780_A0_INA_2_6_11_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE */
+        .name         = "INGRESS_PKT_SYS_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x3,
+        .match_maxbit = 1,
+        .match_minbit = 0,
+        .maxbit       = 1,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 1,
+        .pminbit      = 0,
+
+    },
+};
+
+static bcmpkt_rxpmd_match_id_db_info_t bcm56780_a0_ina_2_6_11_0_rxpmd_match_id_db_info = {
+    .num_entries = 175,
+    .db = bcm56780_a0_ina_2_6_11_0_rxpmd_match_id_db
+};
+bcmpkt_rxpmd_match_id_db_info_t * bcm56780_a0_ina_2_6_11_0_rxpmd_match_id_db_info_get(void) {
+    return &bcm56780_a0_ina_2_6_11_0_rxpmd_match_id_db_info;
+}
+
+static shr_enum_map_t bcm56780_a0_ina_2_6_11_0_rxpmd_match_id_map[] = {
+    BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_rxpmd_match_id_map_info_t bcm56780_a0_ina_2_6_11_0_rxpmd_match_id_map_info = {
+    .num_entries = 175,
+    .map = bcm56780_a0_ina_2_6_11_0_rxpmd_match_id_map
+};
+
+bcmpkt_rxpmd_match_id_map_info_t * bcm56780_a0_ina_2_6_11_0_rxpmd_match_id_map_info_get(void) {
+    return &bcm56780_a0_ina_2_6_11_0_rxpmd_match_id_map_info;
+}
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_pkt_flexhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_pkt_flexhdr.c
new file mode 100644
index 000000000..7ec04020e
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_pkt_flexhdr.c
@@ -0,0 +1,8131 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) map.yml
+ * for device bcm56780_a0 and variant ina_2_6_11_0.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#include <sal/sal_types.h>
+#include <shr/shr_error.h>
+#include <bcmpkt/bcmpkt_flexhdr.h>
+#include <bcmpkt/chip/bcm56780_a0/bcmpkt_bcm56780_a0_rxpmd.h>
+#include <bcmpkt/xfcr/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_bcmpkt_flexhdr.h>
+#include <bcmpkt/xfcr/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_bcmpkt_flexhdr_data.h>
+#include <bcmpkt/xfcr/bcm56780_a0/ina_2_6_11_0/bcm56780_a0_ina_2_6_11_0_bcmpkt_rxpmd_flex_data.h>
+
+#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1)
+#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l))
+#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s)))
+#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s)))
+
+static void bcm56780_a0_ina_2_6_11_0_rxpmd_flex_reason_decode(uint32_t *data, bcmpkt_bitmap_t *reasons)
+{
+    uint32_t *reason = data + 0;
+
+    if (reason[13] & (0x1 << 0)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU);
+    }
+    if (reason[13] & (0x1 << 1)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS);
+    }
+    if (reason[13] & (0x1 << 2)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE);
+    }
+    if (reason[13] & (0x1 << 3)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD);
+    }
+    if (reason[13] & (0x1 << 4)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST);
+    }
+    if (reason[13] & (0x1 << 5)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED);
+    }
+    if (reason[13] & (0x1 << 6)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT);
+    }
+    if (reason[13] & (0x1 << 7)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED);
+    }
+    if (reason[13] & (0x1 << 8)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED);
+    }
+    if (reason[13] & (0x1 << 9)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS);
+    }
+    if (reason[13] & (0x1 << 10)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP);
+    }
+    if (reason[13] & (0x1 << 11)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS);
+    }
+    if (reason[13] & (0x1 << 12)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP);
+    }
+    if (reason[13] & (0x1 << 13)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR);
+    }
+    if (reason[13] & (0x1 << 14)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR);
+    }
+    if (reason[13] & (0x1 << 15)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED);
+    }
+    if (reason[13] & (0x1 << 16)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL);
+    }
+    if (reason[13] & (0x1 << 17)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_VFP);
+    }
+    if (reason[13] & (0x1 << 18)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_IFP);
+    }
+    if (reason[13] & (0x1 << 19)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER);
+    }
+    if (reason[13] & (0x1 << 20)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP);
+    }
+    if (reason[13] & (0x1 << 21)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_SVP);
+    }
+    if (reason[13] & (0x1 << 22)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT);
+    }
+    if (reason[13] & (0x1 << 23)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT);
+    }
+    if (reason[13] & (0x1 << 24)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED);
+    }
+    if (reason[13] & (0x1 << 25)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED);
+    }
+    if (reason[13] & (0x1 << 26)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP);
+    }
+    if (reason[13] & (0x1 << 27)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED);
+    }
+    if (reason[13] & (0x1 << 28)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF);
+    }
+    if (reason[13] & (0x1 << 29)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED);
+    }
+    if (reason[13] & (0x1 << 30)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED);
+    }
+    if (reason[13] & (0x1 << 31)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU);
+    }
+    if (reason[12] & (0x1 << 0)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0);
+    }
+    if (reason[12] & (0x1 << 1)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1);
+    }
+    if (reason[12] & (0x1 << 2)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2);
+    }
+    if (reason[12] & (0x1 << 3)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3);
+    }
+    if (reason[12] & (0x1 << 4)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4);
+    }
+    if (reason[12] & (0x1 << 5)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5);
+    }
+    if (reason[12] & (0x1 << 6)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6);
+    }
+    if (reason[12] & (0x1 << 7)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7);
+    }
+    if (reason[12] & (0x1 << 8)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MTOP_IPV4_GATEWAY);
+    }
+    if (reason[12] & (0x1 << 9)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED);
+    }
+    if (reason[12] & (0x1 << 10)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED);
+    }
+    if (reason[12] & (0x1 << 12)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR);
+    }
+    if (reason[12] & (0x1 << 13)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU);
+    }
+    if (reason[12] & (0x1 << 15)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP);
+    }
+}
+
+static void bcm56780_a0_ina_2_6_11_0_rxpmd_flex_reason_encode(bcmpkt_bitmap_t *reasons, uint32_t *data)
+{
+    uint32_t *reason = data + 0;
+
+    reason[13] = 0;
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU)) {
+        reason[13] |= (0x1 << 0);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS)) {
+        reason[13] |= (0x1 << 1);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE)) {
+        reason[13] |= (0x1 << 2);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD)) {
+        reason[13] |= (0x1 << 3);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST)) {
+        reason[13] |= (0x1 << 4);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED)) {
+        reason[13] |= (0x1 << 5);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT)) {
+        reason[13] |= (0x1 << 6);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED)) {
+        reason[13] |= (0x1 << 7);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED)) {
+        reason[13] |= (0x1 << 8);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS)) {
+        reason[13] |= (0x1 << 9);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP)) {
+        reason[13] |= (0x1 << 10);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS)) {
+        reason[13] |= (0x1 << 11);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP)) {
+        reason[13] |= (0x1 << 12);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR)) {
+        reason[13] |= (0x1 << 13);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR)) {
+        reason[13] |= (0x1 << 14);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED)) {
+        reason[13] |= (0x1 << 15);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL)) {
+        reason[13] |= (0x1 << 16);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_VFP)) {
+        reason[13] |= (0x1 << 17);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_IFP)) {
+        reason[13] |= (0x1 << 18);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER)) {
+        reason[13] |= (0x1 << 19);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP)) {
+        reason[13] |= (0x1 << 20);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_SVP)) {
+        reason[13] |= (0x1 << 21);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT)) {
+        reason[13] |= (0x1 << 22);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT)) {
+        reason[13] |= (0x1 << 23);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED)) {
+        reason[13] |= (0x1 << 24);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED)) {
+        reason[13] |= (0x1 << 25);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP)) {
+        reason[13] |= (0x1 << 26);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED)) {
+        reason[13] |= (0x1 << 27);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF)) {
+        reason[13] |= (0x1 << 28);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED)) {
+        reason[13] |= (0x1 << 29);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED)) {
+        reason[13] |= (0x1 << 30);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU)) {
+        reason[13] |= (0x1 << 31);
+    }
+    reason[12] = 0;
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0)) {
+        reason[12] |= (0x1 << 0);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1)) {
+        reason[12] |= (0x1 << 1);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2)) {
+        reason[12] |= (0x1 << 2);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3)) {
+        reason[12] |= (0x1 << 3);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4)) {
+        reason[12] |= (0x1 << 4);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5)) {
+        reason[12] |= (0x1 << 5);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6)) {
+        reason[12] |= (0x1 << 6);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7)) {
+        reason[12] |= (0x1 << 7);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_MTOP_IPV4_GATEWAY)) {
+        reason[12] |= (0x1 << 8);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED)) {
+        reason[12] |= (0x1 << 9);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED)) {
+        reason[12] |= (0x1 << 10);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR)) {
+        reason[12] |= (0x1 << 12);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU)) {
+        reason[12] |= (0x1 << 13);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP)) {
+        reason[12] |= (0x1 << 15);
+    }
+}
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_rxpmd_flex_field_data[] = {
+    {
+        .name = "DLB_ECMP_DESTINATION_15_0",
+        .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { -1, -1 }, /* Profile 2. */
+            { -1, -1 }, /* Profile 3. */
+            { -1, -1 }, /* Profile 4. */
+            { -1, -1 }, /* Profile 5. */
+            { -1, -1 }, /* Profile 6. */
+            { -1, -1 }, /* Profile 7. */
+            { 80, 95 }, /* Profile 8. */
+            { 80, 95 }, /* Profile 9. */
+            { 80, 95 }, /* Profile 10. */
+            { 80, 95 }, /* Profile 11. */
+            { 80, 95 }, /* Profile 12. */
+            { 80, 95 }, /* Profile 13. */
+        },
+        .profile_cnt = 14,
+    },
+    {
+        .name = "DROP_CODE_15_0",
+        .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 48, 63 }, /* Profile 2. */
+            { 48, 63 }, /* Profile 3. */
+            { -1, -1 }, /* Profile 4. */
+            { -1, -1 }, /* Profile 5. */
+            { 48, 63 }, /* Profile 6. */
+            { 48, 63 }, /* Profile 7. */
+            { 48, 63 }, /* Profile 8. */
+            { 48, 63 }, /* Profile 9. */
+            { -1, -1 }, /* Profile 10. */
+            { -1, -1 }, /* Profile 11. */
+            { 48, 63 }, /* Profile 12. */
+            { 48, 63 }, /* Profile 13. */
+        },
+        .profile_cnt = 14,
+    },
+    {
+        .name = "DVP_15_0",
+        .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_DVP_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 176, 191 }, /* Profile 2. */
+            { 176, 191 }, /* Profile 3. */
+            { 176, 191 }, /* Profile 4. */
+            { 176, 191 }, /* Profile 5. */
+            { 176, 191 }, /* Profile 6. */
+            { 176, 191 }, /* Profile 7. */
+            { 176, 191 }, /* Profile 8. */
+            { 176, 191 }, /* Profile 9. */
+            { 176, 191 }, /* Profile 10. */
+            { 176, 191 }, /* Profile 11. */
+            { 176, 191 }, /* Profile 12. */
+            { 176, 191 }, /* Profile 13. */
+        },
+        .profile_cnt = 14,
+    },
+    {
+        .name = "EFFECTIVE_TTL_7_0",
+        .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 96, 103 }, /* Profile 2. */
+            { 96, 103 }, /* Profile 3. */
+            { 96, 103 }, /* Profile 4. */
+            { 96, 103 }, /* Profile 5. */
+            { 96, 103 }, /* Profile 6. */
+            { 96, 103 }, /* Profile 7. */
+            { 96, 103 }, /* Profile 8. */
+            { 96, 103 }, /* Profile 9. */
+            { 96, 103 }, /* Profile 10. */
+            { 96, 103 }, /* Profile 11. */
+            { 96, 103 }, /* Profile 12. */
+            { 96, 103 }, /* Profile 13. */
+        },
+        .profile_cnt = 14,
+    },
+    {
+        .name = "EGR_MTOP_INDEX_HI_3_0",
+        .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_EGR_MTOP_INDEX_HI_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 368, 371 }, /* Profile 2. */
+            { 368, 371 }, /* Profile 3. */
+            { 368, 371 }, /* Profile 4. */
+            { 368, 371 }, /* Profile 5. */
+            { 368, 371 }, /* Profile 6. */
+            { 368, 371 }, /* Profile 7. */
+            { 368, 371 }, /* Profile 8. */
+            { 368, 371 }, /* Profile 9. */
+            { 368, 371 }, /* Profile 10. */
+            { 368, 371 }, /* Profile 11. */
+            { 368, 371 }, /* Profile 12. */
+            { 368, 371 }, /* Profile 13. */
+        },
+        .profile_cnt = 14,
+    },
+    {
+        .name = "EGR_MTOP_INDEX_LO_EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0",
+        .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_EGR_MTOP_INDEX_LO_EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { -1, -1 }, /* Profile 2. */
+            { -1, -1 }, /* Profile 3. */
+            { 48, 63 }, /* Profile 4. */
+            { 48, 63 }, /* Profile 5. */
+            { -1, -1 }, /* Profile 6. */
+            { -1, -1 }, /* Profile 7. */
+            { -1, -1 }, /* Profile 8. */
+            { -1, -1 }, /* Profile 9. */
+            { 48, 63 }, /* Profile 10. */
+            { 48, 63 }, /* Profile 11. */
+        },
+        .profile_cnt = 12,
+    },
+    {
+        .name = "EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0",
+        .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 80, 95 }, /* Profile 2. */
+            { 80, 95 }, /* Profile 3. */
+            { 80, 95 }, /* Profile 4. */
+            { 80, 95 }, /* Profile 5. */
+            { 80, 95 }, /* Profile 6. */
+            { 80, 95 }, /* Profile 7. */
+        },
+        .profile_cnt = 8,
+    },
+    {
+        .name = "ENTROPY_LABEL_HIGH_3_0",
+        .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 408, 411 }, /* Profile 2. */
+            { 408, 411 }, /* Profile 3. */
+            { 408, 411 }, /* Profile 4. */
+            { 408, 411 }, /* Profile 5. */
+            { 408, 411 }, /* Profile 6. */
+            { 408, 411 }, /* Profile 7. */
+            { 408, 411 }, /* Profile 8. */
+            { 408, 411 }, /* Profile 9. */
+            { 408, 411 }, /* Profile 10. */
+            { 408, 411 }, /* Profile 11. */
+            { 408, 411 }, /* Profile 12. */
+            { 408, 411 }, /* Profile 13. */
+        },
+        .profile_cnt = 14,
+    },
+    {
+        .name = "ENTROPY_LABEL_LOW_15_0",
+        .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 112, 127 }, /* Profile 2. */
+            { 112, 127 }, /* Profile 3. */
+            { 112, 127 }, /* Profile 4. */
+            { 112, 127 }, /* Profile 5. */
+            { 112, 127 }, /* Profile 6. */
+            { 112, 127 }, /* Profile 7. */
+            { 112, 127 }, /* Profile 8. */
+            { 112, 127 }, /* Profile 9. */
+            { 112, 127 }, /* Profile 10. */
+            { 112, 127 }, /* Profile 11. */
+            { 112, 127 }, /* Profile 12. */
+            { 112, 127 }, /* Profile 13. */
+        },
+        .profile_cnt = 14,
+    },
+    {
+        .name = "EP_NIH_HDR_TIMESTAMP_15_0",
+        .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 272, 287 }, /* Profile 2. */
+            { 256, 271 }, /* Profile 3. */
+            { 272, 287 }, /* Profile 4. */
+            { 256, 271 }, /* Profile 5. */
+            { -1, -1 }, /* Profile 6. */
+            { -1, -1 }, /* Profile 7. */
+            { 272, 287 }, /* Profile 8. */
+            { 256, 271 }, /* Profile 9. */
+            { 272, 287 }, /* Profile 10. */
+            { 256, 271 }, /* Profile 11. */
+        },
+        .profile_cnt = 12,
+    },
+    {
+        .name = "EP_NIH_HDR_TIMESTAMP_31_16",
+        .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 288, 303 }, /* Profile 2. */
+            { 272, 287 }, /* Profile 3. */
+            { 288, 303 }, /* Profile 4. */
+            { 272, 287 }, /* Profile 5. */
+            { -1, -1 }, /* Profile 6. */
+            { -1, -1 }, /* Profile 7. */
+            { 288, 303 }, /* Profile 8. */
+            { 272, 287 }, /* Profile 9. */
+            { 288, 303 }, /* Profile 10. */
+            { 272, 287 }, /* Profile 11. */
+        },
+        .profile_cnt = 12,
+    },
+    {
+        .name = "EVENT_TRACE_VECTOR_15_0",
+        .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 0, 15 }, /* Profile 2. */
+            { 0, 15 }, /* Profile 3. */
+            { 0, 15 }, /* Profile 4. */
+            { 0, 15 }, /* Profile 5. */
+            { 0, 15 }, /* Profile 6. */
+            { 0, 15 }, /* Profile 7. */
+            { 0, 15 }, /* Profile 8. */
+            { 0, 15 }, /* Profile 9. */
+            { 0, 15 }, /* Profile 10. */
+            { 0, 15 }, /* Profile 11. */
+            { 0, 15 }, /* Profile 12. */
+            { 0, 15 }, /* Profile 13. */
+        },
+        .profile_cnt = 14,
+    },
+    {
+        .name = "EVENT_TRACE_VECTOR_31_16",
+        .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 16, 31 }, /* Profile 2. */
+            { 16, 31 }, /* Profile 3. */
+            { 16, 31 }, /* Profile 4. */
+            { 16, 31 }, /* Profile 5. */
+            { 16, 31 }, /* Profile 6. */
+            { 16, 31 }, /* Profile 7. */
+            { 16, 31 }, /* Profile 8. */
+            { 16, 31 }, /* Profile 9. */
+            { 16, 31 }, /* Profile 10. */
+            { 16, 31 }, /* Profile 11. */
+            { 16, 31 }, /* Profile 12. */
+            { 16, 31 }, /* Profile 13. */
+        },
+        .profile_cnt = 14,
+    },
+    {
+        .name = "EVENT_TRACE_VECTOR_47_32",
+        .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 32, 47 }, /* Profile 2. */
+            { 32, 47 }, /* Profile 3. */
+            { 32, 47 }, /* Profile 4. */
+            { 32, 47 }, /* Profile 5. */
+            { 32, 47 }, /* Profile 6. */
+            { 32, 47 }, /* Profile 7. */
+            { 32, 47 }, /* Profile 8. */
+            { 32, 47 }, /* Profile 9. */
+            { 32, 47 }, /* Profile 10. */
+            { 32, 47 }, /* Profile 11. */
+            { 32, 47 }, /* Profile 12. */
+            { 32, 47 }, /* Profile 13. */
+        },
+        .profile_cnt = 14,
+    },
+    {
+        .name = "I2E_CLASS_ID_15_0",
+        .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 256, 271 }, /* Profile 2. */
+            { 240, 255 }, /* Profile 3. */
+            { 256, 271 }, /* Profile 4. */
+            { 240, 255 }, /* Profile 5. */
+            { 256, 271 }, /* Profile 6. */
+            { 240, 255 }, /* Profile 7. */
+            { 256, 271 }, /* Profile 8. */
+            { 240, 255 }, /* Profile 9. */
+            { 256, 271 }, /* Profile 10. */
+            { 240, 255 }, /* Profile 11. */
+            { 256, 271 }, /* Profile 12. */
+            { 240, 255 }, /* Profile 13. */
+        },
+        .profile_cnt = 14,
+    },
+    {
+        .name = "IFP_IOAM_GBP_ACTION_3_0",
+        .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 372, 375 }, /* Profile 2. */
+            { 372, 375 }, /* Profile 3. */
+            { 372, 375 }, /* Profile 4. */
+            { 372, 375 }, /* Profile 5. */
+            { 372, 375 }, /* Profile 6. */
+            { 372, 375 }, /* Profile 7. */
+            { 372, 375 }, /* Profile 8. */
+            { 372, 375 }, /* Profile 9. */
+            { 372, 375 }, /* Profile 10. */
+            { 372, 375 }, /* Profile 11. */
+            { 372, 375 }, /* Profile 12. */
+            { 372, 375 }, /* Profile 13. */
+        },
+        .profile_cnt = 14,
+    },
+    {
+        .name = "IFP_TS_CONTROL_ACTION_3_0",
+        .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 376, 379 }, /* Profile 2. */
+            { 376, 379 }, /* Profile 3. */
+            { 376, 379 }, /* Profile 4. */
+            { 376, 379 }, /* Profile 5. */
+            { 376, 379 }, /* Profile 6. */
+            { 376, 379 }, /* Profile 7. */
+            { 376, 379 }, /* Profile 8. */
+            { 376, 379 }, /* Profile 9. */
+            { 376, 379 }, /* Profile 10. */
+            { 376, 379 }, /* Profile 11. */
+            { 376, 379 }, /* Profile 12. */
+            { 376, 379 }, /* Profile 13. */
+        },
+        .profile_cnt = 14,
+    },
+    {
+        .name = "ING_TIMESTAMP_15_0",
+        .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { -1, -1 }, /* Profile 2. */
+            { -1, -1 }, /* Profile 3. */
+            { -1, -1 }, /* Profile 4. */
+            { -1, -1 }, /* Profile 5. */
+            { 272, 287 }, /* Profile 6. */
+            { 256, 271 }, /* Profile 7. */
+            { -1, -1 }, /* Profile 8. */
+            { -1, -1 }, /* Profile 9. */
+            { -1, -1 }, /* Profile 10. */
+            { -1, -1 }, /* Profile 11. */
+            { 272, 287 }, /* Profile 12. */
+            { 256, 271 }, /* Profile 13. */
+        },
+        .profile_cnt = 14,
+    },
+    {
+        .name = "ING_TIMESTAMP_31_16",
+        .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { -1, -1 }, /* Profile 2. */
+            { -1, -1 }, /* Profile 3. */
+            { -1, -1 }, /* Profile 4. */
+            { -1, -1 }, /* Profile 5. */
+            { 288, 303 }, /* Profile 6. */
+            { 272, 287 }, /* Profile 7. */
+            { -1, -1 }, /* Profile 8. */
+            { -1, -1 }, /* Profile 9. */
+            { -1, -1 }, /* Profile 10. */
+            { -1, -1 }, /* Profile 11. */
+            { 288, 303 }, /* Profile 12. */
+            { 272, 287 }, /* Profile 13. */
+        },
+        .profile_cnt = 14,
+    },
+    {
+        .name = "INGRESS_PP_PORT_7_0",
+        .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 240, 247 }, /* Profile 2. */
+            { 224, 231 }, /* Profile 3. */
+            { 240, 247 }, /* Profile 4. */
+            { 224, 231 }, /* Profile 5. */
+            { 240, 247 }, /* Profile 6. */
+            { 224, 231 }, /* Profile 7. */
+            { 240, 247 }, /* Profile 8. */
+            { 224, 231 }, /* Profile 9. */
+            { 240, 247 }, /* Profile 10. */
+            { 224, 231 }, /* Profile 11. */
+            { 240, 247 }, /* Profile 12. */
+            { 224, 231 }, /* Profile 13. */
+        },
+        .profile_cnt = 14,
+    },
+    {
+        .name = "INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0",
+        .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 304, 319 }, /* Profile 2. */
+            { 288, 303 }, /* Profile 3. */
+            { 304, 319 }, /* Profile 4. */
+            { 288, 303 }, /* Profile 5. */
+            { 304, 319 }, /* Profile 6. */
+            { 288, 303 }, /* Profile 7. */
+            { 304, 319 }, /* Profile 8. */
+            { 288, 303 }, /* Profile 9. */
+            { 304, 319 }, /* Profile 10. */
+            { 288, 303 }, /* Profile 11. */
+            { 304, 319 }, /* Profile 12. */
+            { 288, 303 }, /* Profile 13. */
+        },
+        .profile_cnt = 14,
+    },
+    {
+        .name = "INGRESS_QOS_REMARK_CTRL_3_0",
+        .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 384, 387 }, /* Profile 2. */
+            { 384, 387 }, /* Profile 3. */
+            { 384, 387 }, /* Profile 4. */
+            { 384, 387 }, /* Profile 5. */
+            { 384, 387 }, /* Profile 6. */
+            { 384, 387 }, /* Profile 7. */
+            { 384, 387 }, /* Profile 8. */
+            { 384, 387 }, /* Profile 9. */
+            { 384, 387 }, /* Profile 10. */
+            { 384, 387 }, /* Profile 11. */
+            { 384, 387 }, /* Profile 12. */
+            { 384, 387 }, /* Profile 13. */
+        },
+        .profile_cnt = 14,
+    },
+    {
+        .name = "INT_PRI_3_0",
+        .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 400, 403 }, /* Profile 2. */
+            { 400, 403 }, /* Profile 3. */
+            { 400, 403 }, /* Profile 4. */
+            { 400, 403 }, /* Profile 5. */
+            { 400, 403 }, /* Profile 6. */
+            { 400, 403 }, /* Profile 7. */
+            { 400, 403 }, /* Profile 8. */
+            { 400, 403 }, /* Profile 9. */
+            { 400, 403 }, /* Profile 10. */
+            { 400, 403 }, /* Profile 11. */
+            { 400, 403 }, /* Profile 12. */
+            { 400, 403 }, /* Profile 13. */
+        },
+        .profile_cnt = 14,
+    },
+    {
+        .name = "L2_IIF_10_0",
+        .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_L2_IIF_10_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 208, 218 }, /* Profile 2. */
+            { -1, -1 }, /* Profile 3. */
+            { 208, 218 }, /* Profile 4. */
+            { -1, -1 }, /* Profile 5. */
+            { 208, 218 }, /* Profile 6. */
+            { -1, -1 }, /* Profile 7. */
+            { 208, 218 }, /* Profile 8. */
+            { -1, -1 }, /* Profile 9. */
+            { 208, 218 }, /* Profile 10. */
+            { -1, -1 }, /* Profile 11. */
+            { 208, 218 }, /* Profile 12. */
+        },
+        .profile_cnt = 13,
+    },
+    {
+        .name = "L2_OIF_10_0",
+        .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_L2_OIF_10_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { -1, -1 }, /* Profile 2. */
+            { 336, 346 }, /* Profile 3. */
+            { -1, -1 }, /* Profile 4. */
+            { 336, 346 }, /* Profile 5. */
+            { -1, -1 }, /* Profile 6. */
+            { 336, 346 }, /* Profile 7. */
+            { -1, -1 }, /* Profile 8. */
+            { 336, 346 }, /* Profile 9. */
+            { -1, -1 }, /* Profile 10. */
+            { 336, 346 }, /* Profile 11. */
+            { -1, -1 }, /* Profile 12. */
+            { 336, 346 }, /* Profile 13. */
+        },
+        .profile_cnt = 14,
+    },
+    {
+        .name = "L3_IIF_13_0",
+        .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 224, 237 }, /* Profile 2. */
+            { 208, 221 }, /* Profile 3. */
+            { 224, 237 }, /* Profile 4. */
+            { 208, 221 }, /* Profile 5. */
+            { 224, 237 }, /* Profile 6. */
+            { 208, 221 }, /* Profile 7. */
+            { 224, 237 }, /* Profile 8. */
+            { 208, 221 }, /* Profile 9. */
+            { 224, 237 }, /* Profile 10. */
+            { 208, 221 }, /* Profile 11. */
+            { 224, 237 }, /* Profile 12. */
+            { 208, 221 }, /* Profile 13. */
+        },
+        .profile_cnt = 14,
+    },
+    {
+        .name = "L3_OIF_1_13_0",
+        .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 352, 365 }, /* Profile 2. */
+            { 352, 365 }, /* Profile 3. */
+            { 352, 365 }, /* Profile 4. */
+            { 352, 365 }, /* Profile 5. */
+            { 352, 365 }, /* Profile 6. */
+            { 352, 365 }, /* Profile 7. */
+            { 352, 365 }, /* Profile 8. */
+            { 352, 365 }, /* Profile 9. */
+            { 352, 365 }, /* Profile 10. */
+            { 352, 365 }, /* Profile 11. */
+            { 352, 365 }, /* Profile 12. */
+            { 352, 365 }, /* Profile 13. */
+        },
+        .profile_cnt = 14,
+    },
+    {
+        .name = "NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0",
+        .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 192, 207 }, /* Profile 2. */
+            { 192, 207 }, /* Profile 3. */
+            { 192, 207 }, /* Profile 4. */
+            { 192, 207 }, /* Profile 5. */
+            { 192, 207 }, /* Profile 6. */
+            { 192, 207 }, /* Profile 7. */
+            { 192, 207 }, /* Profile 8. */
+            { 192, 207 }, /* Profile 9. */
+            { 192, 207 }, /* Profile 10. */
+            { 192, 207 }, /* Profile 11. */
+            { 192, 207 }, /* Profile 12. */
+            { 192, 207 }, /* Profile 13. */
+        },
+        .profile_cnt = 14,
+    },
+    {
+        .name = "NHOP_INDEX_1_15_0",
+        .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 128, 143 }, /* Profile 2. */
+            { 128, 143 }, /* Profile 3. */
+            { 128, 143 }, /* Profile 4. */
+            { 128, 143 }, /* Profile 5. */
+            { 128, 143 }, /* Profile 6. */
+            { 128, 143 }, /* Profile 7. */
+            { 128, 143 }, /* Profile 8. */
+            { 128, 143 }, /* Profile 9. */
+            { 128, 143 }, /* Profile 10. */
+            { 128, 143 }, /* Profile 11. */
+            { 128, 143 }, /* Profile 12. */
+            { 128, 143 }, /* Profile 13. */
+        },
+        .profile_cnt = 14,
+    },
+    {
+        .name = "PARSER_VHLEN_0_15_0",
+        .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 64, 79 }, /* Profile 2. */
+            { 64, 79 }, /* Profile 3. */
+            { 64, 79 }, /* Profile 4. */
+            { 64, 79 }, /* Profile 5. */
+            { 64, 79 }, /* Profile 6. */
+            { 64, 79 }, /* Profile 7. */
+            { 64, 79 }, /* Profile 8. */
+            { 64, 79 }, /* Profile 9. */
+            { 64, 79 }, /* Profile 10. */
+            { 64, 79 }, /* Profile 11. */
+            { 64, 79 }, /* Profile 12. */
+            { 64, 79 }, /* Profile 13. */
+        },
+        .profile_cnt = 14,
+    },
+    {
+        .name = "PKT_MISC_CTRL_0_3_0",
+        .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 412, 415 }, /* Profile 2. */
+            { 412, 415 }, /* Profile 3. */
+            { 412, 415 }, /* Profile 4. */
+            { 412, 415 }, /* Profile 5. */
+            { 412, 415 }, /* Profile 6. */
+            { 412, 415 }, /* Profile 7. */
+            { 412, 415 }, /* Profile 8. */
+            { 412, 415 }, /* Profile 9. */
+            { 412, 415 }, /* Profile 10. */
+            { 412, 415 }, /* Profile 11. */
+            { 412, 415 }, /* Profile 12. */
+            { 412, 415 }, /* Profile 13. */
+        },
+        .profile_cnt = 14,
+    },
+    {
+        .name = "SVP_15_0",
+        .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_SVP_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 320, 335 }, /* Profile 2. */
+            { 304, 319 }, /* Profile 3. */
+            { 320, 335 }, /* Profile 4. */
+            { 304, 319 }, /* Profile 5. */
+            { 320, 335 }, /* Profile 6. */
+            { 304, 319 }, /* Profile 7. */
+            { 320, 335 }, /* Profile 8. */
+            { 304, 319 }, /* Profile 9. */
+            { 320, 335 }, /* Profile 10. */
+            { 304, 319 }, /* Profile 11. */
+            { 320, 335 }, /* Profile 12. */
+            { 304, 319 }, /* Profile 13. */
+        },
+        .profile_cnt = 14,
+    },
+    {
+        .name = "SVP_NETWORK_GROUP_BITMAP_3_0",
+        .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 380, 383 }, /* Profile 2. */
+            { 380, 383 }, /* Profile 3. */
+            { 380, 383 }, /* Profile 4. */
+            { 380, 383 }, /* Profile 5. */
+            { 380, 383 }, /* Profile 6. */
+            { 380, 383 }, /* Profile 7. */
+            { 380, 383 }, /* Profile 8. */
+            { 380, 383 }, /* Profile 9. */
+            { 380, 383 }, /* Profile 10. */
+            { 380, 383 }, /* Profile 11. */
+            { 380, 383 }, /* Profile 12. */
+            { 380, 383 }, /* Profile 13. */
+        },
+        .profile_cnt = 14,
+    },
+    {
+        .name = "SYSTEM_DESTINATION_15_0",
+        .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 160, 175 }, /* Profile 2. */
+            { 160, 175 }, /* Profile 3. */
+            { 160, 175 }, /* Profile 4. */
+            { 160, 175 }, /* Profile 5. */
+            { 160, 175 }, /* Profile 6. */
+            { 160, 175 }, /* Profile 7. */
+            { 160, 175 }, /* Profile 8. */
+            { 160, 175 }, /* Profile 9. */
+            { 160, 175 }, /* Profile 10. */
+            { 160, 175 }, /* Profile 11. */
+            { 160, 175 }, /* Profile 12. */
+            { 160, 175 }, /* Profile 13. */
+        },
+        .profile_cnt = 14,
+    },
+    {
+        .name = "SYSTEM_OPCODE_3_0",
+        .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 404, 407 }, /* Profile 2. */
+            { 404, 407 }, /* Profile 3. */
+            { 404, 407 }, /* Profile 4. */
+            { 404, 407 }, /* Profile 5. */
+            { 404, 407 }, /* Profile 6. */
+            { 404, 407 }, /* Profile 7. */
+            { 404, 407 }, /* Profile 8. */
+            { 404, 407 }, /* Profile 9. */
+            { 404, 407 }, /* Profile 10. */
+            { 404, 407 }, /* Profile 11. */
+            { 404, 407 }, /* Profile 12. */
+            { 404, 407 }, /* Profile 13. */
+        },
+        .profile_cnt = 14,
+    },
+    {
+        .name = "SYSTEM_SOURCE_15_0",
+        .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 144, 159 }, /* Profile 2. */
+            { 144, 159 }, /* Profile 3. */
+            { 144, 159 }, /* Profile 4. */
+            { 144, 159 }, /* Profile 5. */
+            { 144, 159 }, /* Profile 6. */
+            { 144, 159 }, /* Profile 7. */
+            { 144, 159 }, /* Profile 8. */
+            { 144, 159 }, /* Profile 9. */
+            { 144, 159 }, /* Profile 10. */
+            { 144, 159 }, /* Profile 11. */
+            { 144, 159 }, /* Profile 12. */
+            { 144, 159 }, /* Profile 13. */
+        },
+        .profile_cnt = 14,
+    },
+    {
+        .name = "TIMESTAMP_CTRL_3_0",
+        .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 388, 391 }, /* Profile 2. */
+            { 388, 391 }, /* Profile 3. */
+            { 388, 391 }, /* Profile 4. */
+            { 388, 391 }, /* Profile 5. */
+            { 388, 391 }, /* Profile 6. */
+            { 388, 391 }, /* Profile 7. */
+            { 388, 391 }, /* Profile 8. */
+            { 388, 391 }, /* Profile 9. */
+            { 388, 391 }, /* Profile 10. */
+            { 388, 391 }, /* Profile 11. */
+            { 388, 391 }, /* Profile 12. */
+            { 388, 391 }, /* Profile 13. */
+        },
+        .profile_cnt = 14,
+    },
+    {
+        .name = "TUNNEL_PROCESSING_RESULTS_1_3_0",
+        .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 392, 395 }, /* Profile 2. */
+            { 392, 395 }, /* Profile 3. */
+            { 392, 395 }, /* Profile 4. */
+            { 392, 395 }, /* Profile 5. */
+            { 392, 395 }, /* Profile 6. */
+            { 392, 395 }, /* Profile 7. */
+            { 392, 395 }, /* Profile 8. */
+            { 392, 395 }, /* Profile 9. */
+            { 392, 395 }, /* Profile 10. */
+            { 392, 395 }, /* Profile 11. */
+            { 392, 395 }, /* Profile 12. */
+            { 392, 395 }, /* Profile 13. */
+        },
+        .profile_cnt = 14,
+    },
+    {
+        .name = "VFI_15_0",
+        .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_VFI_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 336, 351 }, /* Profile 2. */
+            { 320, 335 }, /* Profile 3. */
+            { 336, 351 }, /* Profile 4. */
+            { 320, 335 }, /* Profile 5. */
+            { 336, 351 }, /* Profile 6. */
+            { 320, 335 }, /* Profile 7. */
+            { 336, 351 }, /* Profile 8. */
+            { 320, 335 }, /* Profile 9. */
+            { 336, 351 }, /* Profile 10. */
+            { 320, 335 }, /* Profile 11. */
+            { 336, 351 }, /* Profile 12. */
+            { 320, 335 }, /* Profile 13. */
+        },
+        .profile_cnt = 14,
+    },
+    {
+        .name = "VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_1_0",
+        .fid = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_1_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 396, 397 }, /* Profile 2. */
+            { 396, 397 }, /* Profile 3. */
+            { 396, 397 }, /* Profile 4. */
+            { 396, 397 }, /* Profile 5. */
+            { 396, 397 }, /* Profile 6. */
+            { 396, 397 }, /* Profile 7. */
+            { 396, 397 }, /* Profile 8. */
+            { 396, 397 }, /* Profile 9. */
+            { 396, 397 }, /* Profile 10. */
+            { 396, 397 }, /* Profile 11. */
+            { 396, 397 }, /* Profile 12. */
+            { 396, 397 }, /* Profile 13. */
+        },
+        .profile_cnt = 14,
+    },
+};static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_rxpmd_flex_field_info = {
+    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_FID_COUNT,
+    .info = bcm56780_a0_ina_2_6_11_0_rxpmd_flex_field_data,
+};
+
+static shr_enum_map_t bcm56780_a0_ina_2_6_11_0_rxpmd_flex_reason_names[] = {
+    BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_reasons_info_t bcm56780_a0_ina_2_6_11_0_rxpmd_flex_reasons_info = {
+    .num_reasons = BCM56780_A0_INA_2_6_11_0_BCMPKT_RXPMD_FLEX_REASON_COUNT,
+    .reason_names = bcm56780_a0_ina_2_6_11_0_rxpmd_flex_reason_names,
+    .reason_encode = bcm56780_a0_ina_2_6_11_0_rxpmd_flex_reason_encode,
+    .reason_decode = bcm56780_a0_ina_2_6_11_0_rxpmd_flex_reason_decode,
+};
+
+
+static int32_t bcmpkt_arp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_operation_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_operation_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_arp_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_ARP_T_FID_COUNT] = {
+    bcmpkt_arp_t_hardware_len_get,
+    bcmpkt_arp_t_hardware_type_get,
+    bcmpkt_arp_t_operation_get,
+    bcmpkt_arp_t_prot_addr_len_get,
+    bcmpkt_arp_t_protocol_type_get,
+    bcmpkt_arp_t_sender_ha_get,
+    bcmpkt_arp_t_sender_ip_get,
+    bcmpkt_arp_t_target_ha_get,
+    bcmpkt_arp_t_target_ip_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_arp_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_ARP_T_FID_COUNT] = {
+    bcmpkt_arp_t_hardware_len_set,
+    bcmpkt_arp_t_hardware_type_set,
+    bcmpkt_arp_t_operation_set,
+    bcmpkt_arp_t_prot_addr_len_set,
+    bcmpkt_arp_t_protocol_type_set,
+    bcmpkt_arp_t_sender_ha_set,
+    bcmpkt_arp_t_sender_ip_set,
+    bcmpkt_arp_t_target_ha_set,
+    bcmpkt_arp_t_target_ip_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_arp_t_field_data[] = {
+    BCM56780_A0_INA_2_6_11_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_arp_t_field_info = {
+    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_ARP_T_FID_COUNT,
+    .info = bcm56780_a0_ina_2_6_11_0_arp_t_field_data,
+};
+
+
+static int32_t bcmpkt_authen_t_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_payload_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_payload_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_spi_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_spi_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_authen_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_AUTHEN_T_FID_COUNT] = {
+    bcmpkt_authen_t_data_get,
+    bcmpkt_authen_t_next_header_get,
+    bcmpkt_authen_t_payload_len_get,
+    bcmpkt_authen_t_reserved_get,
+    bcmpkt_authen_t_seq_num_get,
+    bcmpkt_authen_t_spi_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_authen_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_AUTHEN_T_FID_COUNT] = {
+    bcmpkt_authen_t_data_set,
+    bcmpkt_authen_t_next_header_set,
+    bcmpkt_authen_t_payload_len_set,
+    bcmpkt_authen_t_reserved_set,
+    bcmpkt_authen_t_seq_num_set,
+    bcmpkt_authen_t_spi_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_authen_t_field_data[] = {
+    BCM56780_A0_INA_2_6_11_0_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_authen_t_field_info = {
+    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_AUTHEN_T_FID_COUNT,
+    .info = bcm56780_a0_ina_2_6_11_0_authen_t_field_data,
+};
+
+
+static int32_t bcmpkt_bfd_t_desmintxintv_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_desmintxintv_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_minechorxintv_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_minechorxintv_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_reqminrxintv_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_reqminrxintv_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_ap_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 18, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_ap_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 18, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_bfd_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_bfd_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_cpi_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 19, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_cpi_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 19, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_dem_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 17, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_dem_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 17, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_detectmult_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_detectmult_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_diag_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 5);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_diag_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 5, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_fin_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 20, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_fin_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 20, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_mpt_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_mpt_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_mydiscrim_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_mydiscrim_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_poll_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 21, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_poll_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 21, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_sta_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 22, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_sta_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 22, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_urdiscrim_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_urdiscrim_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 29, 3);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 29, 3, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_bfd_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_FID_COUNT] = {
+    bcmpkt_bfd_t_ap_get,
+    bcmpkt_bfd_t_bfd_length_get,
+    bcmpkt_bfd_t_cpi_get,
+    bcmpkt_bfd_t_dem_get,
+    bcmpkt_bfd_t_desmintxintv_get,
+    bcmpkt_bfd_t_detectmult_get,
+    bcmpkt_bfd_t_diag_get,
+    bcmpkt_bfd_t_fin_get,
+    bcmpkt_bfd_t_minechorxintv_get,
+    bcmpkt_bfd_t_mpt_get,
+    bcmpkt_bfd_t_mydiscrim_get,
+    bcmpkt_bfd_t_poll_get,
+    bcmpkt_bfd_t_reqminrxintv_get,
+    bcmpkt_bfd_t_sta_get,
+    bcmpkt_bfd_t_urdiscrim_get,
+    bcmpkt_bfd_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_bfd_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_FID_COUNT] = {
+    bcmpkt_bfd_t_ap_set,
+    bcmpkt_bfd_t_bfd_length_set,
+    bcmpkt_bfd_t_cpi_set,
+    bcmpkt_bfd_t_dem_set,
+    bcmpkt_bfd_t_desmintxintv_set,
+    bcmpkt_bfd_t_detectmult_set,
+    bcmpkt_bfd_t_diag_set,
+    bcmpkt_bfd_t_fin_set,
+    bcmpkt_bfd_t_minechorxintv_set,
+    bcmpkt_bfd_t_mpt_set,
+    bcmpkt_bfd_t_mydiscrim_set,
+    bcmpkt_bfd_t_poll_set,
+    bcmpkt_bfd_t_reqminrxintv_set,
+    bcmpkt_bfd_t_sta_set,
+    bcmpkt_bfd_t_urdiscrim_set,
+    bcmpkt_bfd_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_bfd_t_field_data[] = {
+    BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_bfd_t_field_info = {
+    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_BFD_T_FID_COUNT,
+    .info = bcm56780_a0_ina_2_6_11_0_bfd_t_field_data,
+};
+
+
+static int32_t bcmpkt_cntag_t_rpid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_cntag_t_rpid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_cntag_t_tpid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_cntag_t_tpid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_cntag_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_CNTAG_T_FID_COUNT] = {
+    bcmpkt_cntag_t_rpid_get,
+    bcmpkt_cntag_t_tpid_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_cntag_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_CNTAG_T_FID_COUNT] = {
+    bcmpkt_cntag_t_rpid_set,
+    bcmpkt_cntag_t_tpid_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_cntag_t_field_data[] = {
+    BCM56780_A0_INA_2_6_11_0_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_cntag_t_field_info = {
+    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_CNTAG_T_FID_COUNT,
+    .info = bcm56780_a0_ina_2_6_11_0_cntag_t_field_data,
+};
+
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_cpu_composites_0_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = {
+    bcmpkt_cpu_composites_0_t_dma_cont0_get,
+    bcmpkt_cpu_composites_0_t_dma_cont1_get,
+    bcmpkt_cpu_composites_0_t_dma_cont2_get,
+    bcmpkt_cpu_composites_0_t_dma_cont3_get,
+    bcmpkt_cpu_composites_0_t_dma_cont4_get,
+    bcmpkt_cpu_composites_0_t_dma_cont5_get,
+    bcmpkt_cpu_composites_0_t_dma_cont6_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_cpu_composites_0_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = {
+    bcmpkt_cpu_composites_0_t_dma_cont0_set,
+    bcmpkt_cpu_composites_0_t_dma_cont1_set,
+    bcmpkt_cpu_composites_0_t_dma_cont2_set,
+    bcmpkt_cpu_composites_0_t_dma_cont3_set,
+    bcmpkt_cpu_composites_0_t_dma_cont4_set,
+    bcmpkt_cpu_composites_0_t_dma_cont5_set,
+    bcmpkt_cpu_composites_0_t_dma_cont6_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_cpu_composites_0_t_field_data[] = {
+    BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_cpu_composites_0_t_field_info = {
+    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT,
+    .info = bcm56780_a0_ina_2_6_11_0_cpu_composites_0_t_field_data,
+};
+
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_cpu_composites_1_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = {
+    bcmpkt_cpu_composites_1_t_dma_cont10_get,
+    bcmpkt_cpu_composites_1_t_dma_cont11_get,
+    bcmpkt_cpu_composites_1_t_dma_cont12_get,
+    bcmpkt_cpu_composites_1_t_dma_cont13_get,
+    bcmpkt_cpu_composites_1_t_dma_cont14_get,
+    bcmpkt_cpu_composites_1_t_dma_cont15_get,
+    bcmpkt_cpu_composites_1_t_dma_cont16_get,
+    bcmpkt_cpu_composites_1_t_dma_cont17_get,
+    bcmpkt_cpu_composites_1_t_dma_cont7_get,
+    bcmpkt_cpu_composites_1_t_dma_cont8_get,
+    bcmpkt_cpu_composites_1_t_dma_cont9_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_cpu_composites_1_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = {
+    bcmpkt_cpu_composites_1_t_dma_cont10_set,
+    bcmpkt_cpu_composites_1_t_dma_cont11_set,
+    bcmpkt_cpu_composites_1_t_dma_cont12_set,
+    bcmpkt_cpu_composites_1_t_dma_cont13_set,
+    bcmpkt_cpu_composites_1_t_dma_cont14_set,
+    bcmpkt_cpu_composites_1_t_dma_cont15_set,
+    bcmpkt_cpu_composites_1_t_dma_cont16_set,
+    bcmpkt_cpu_composites_1_t_dma_cont17_set,
+    bcmpkt_cpu_composites_1_t_dma_cont7_set,
+    bcmpkt_cpu_composites_1_t_dma_cont8_set,
+    bcmpkt_cpu_composites_1_t_dma_cont9_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_cpu_composites_1_t_field_data[] = {
+    BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_cpu_composites_1_t_field_info = {
+    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT,
+    .info = bcm56780_a0_ina_2_6_11_0_cpu_composites_1_t_field_data,
+};
+
+
+static int32_t bcmpkt_dest_option_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_dest_option_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_dest_option_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_dest_option_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_dest_option_t_option_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_dest_option_t_option_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_dest_option_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_DEST_OPTION_T_FID_COUNT] = {
+    bcmpkt_dest_option_t_hdr_ext_len_get,
+    bcmpkt_dest_option_t_next_header_get,
+    bcmpkt_dest_option_t_option_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_dest_option_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_DEST_OPTION_T_FID_COUNT] = {
+    bcmpkt_dest_option_t_hdr_ext_len_set,
+    bcmpkt_dest_option_t_next_header_set,
+    bcmpkt_dest_option_t_option_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_dest_option_t_field_data[] = {
+    BCM56780_A0_INA_2_6_11_0_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_dest_option_t_field_info = {
+    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_DEST_OPTION_T_FID_COUNT,
+    .info = bcm56780_a0_ina_2_6_11_0_dest_option_t_field_data,
+};
+
+
+static int32_t bcmpkt_ep_nih_header_t_header_subtype_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 20, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_header_subtype_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 20, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_header_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 6);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_header_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 6, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_a_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_a_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_b_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 20, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_b_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 20, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_c_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_c_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_object_a_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_object_a_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_object_b_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_object_b_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_object_c_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_object_c_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_recirc_profile_index_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_recirc_profile_index_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 12, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 12, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_start_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 30, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_start_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 30, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_timestamp_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_ep_nih_header_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = {
+    bcmpkt_ep_nih_header_t_header_subtype_get,
+    bcmpkt_ep_nih_header_t_header_type_get,
+    bcmpkt_ep_nih_header_t_opaque_ctrl_a_get,
+    bcmpkt_ep_nih_header_t_opaque_ctrl_b_get,
+    bcmpkt_ep_nih_header_t_opaque_ctrl_c_get,
+    bcmpkt_ep_nih_header_t_opaque_object_a_get,
+    bcmpkt_ep_nih_header_t_opaque_object_b_get,
+    bcmpkt_ep_nih_header_t_opaque_object_c_get,
+    bcmpkt_ep_nih_header_t_recirc_profile_index_get,
+    bcmpkt_ep_nih_header_t_reserved_0_get,
+    bcmpkt_ep_nih_header_t_start_get,
+    bcmpkt_ep_nih_header_t_timestamp_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_ep_nih_header_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = {
+    bcmpkt_ep_nih_header_t_header_subtype_set,
+    bcmpkt_ep_nih_header_t_header_type_set,
+    bcmpkt_ep_nih_header_t_opaque_ctrl_a_set,
+    bcmpkt_ep_nih_header_t_opaque_ctrl_b_set,
+    bcmpkt_ep_nih_header_t_opaque_ctrl_c_set,
+    bcmpkt_ep_nih_header_t_opaque_object_a_set,
+    bcmpkt_ep_nih_header_t_opaque_object_b_set,
+    bcmpkt_ep_nih_header_t_opaque_object_c_set,
+    bcmpkt_ep_nih_header_t_recirc_profile_index_set,
+    bcmpkt_ep_nih_header_t_reserved_0_set,
+    bcmpkt_ep_nih_header_t_start_set,
+    bcmpkt_ep_nih_header_t_timestamp_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_ep_nih_header_t_field_data[] = {
+    BCM56780_A0_INA_2_6_11_0_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_ep_nih_header_t_field_info = {
+    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT,
+    .info = bcm56780_a0_ina_2_6_11_0_ep_nih_header_t_field_data,
+};
+
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 11, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 11, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 13, 3);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 13, 3, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 10);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 10, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_t_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 10, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_t_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 10, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 12);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 12, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_erspan3_fixed_hdr_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = {
+    bcmpkt_erspan3_fixed_hdr_t_bso_get,
+    bcmpkt_erspan3_fixed_hdr_t_cos_get,
+    bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get,
+    bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get,
+    bcmpkt_erspan3_fixed_hdr_t_session_id_get,
+    bcmpkt_erspan3_fixed_hdr_t_t_get,
+    bcmpkt_erspan3_fixed_hdr_t_timestamp_get,
+    bcmpkt_erspan3_fixed_hdr_t_ver_get,
+    bcmpkt_erspan3_fixed_hdr_t_vlan_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_erspan3_fixed_hdr_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = {
+    bcmpkt_erspan3_fixed_hdr_t_bso_set,
+    bcmpkt_erspan3_fixed_hdr_t_cos_set,
+    bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set,
+    bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set,
+    bcmpkt_erspan3_fixed_hdr_t_session_id_set,
+    bcmpkt_erspan3_fixed_hdr_t_t_set,
+    bcmpkt_erspan3_fixed_hdr_t_timestamp_set,
+    bcmpkt_erspan3_fixed_hdr_t_ver_set,
+    bcmpkt_erspan3_fixed_hdr_t_vlan_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_erspan3_fixed_hdr_t_field_data[] = {
+    BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_erspan3_fixed_hdr_t_field_info = {
+    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT,
+    .info = bcm56780_a0_ina_2_6_11_0_erspan3_fixed_hdr_t_field_data,
+};
+
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 26, 6);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 26, 6, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 10);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 10, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_erspan3_subhdr_5_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = {
+    bcmpkt_erspan3_subhdr_5_t_platform_id_get,
+    bcmpkt_erspan3_subhdr_5_t_port_id_get,
+    bcmpkt_erspan3_subhdr_5_t_switch_id_get,
+    bcmpkt_erspan3_subhdr_5_t_timestamp_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_erspan3_subhdr_5_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = {
+    bcmpkt_erspan3_subhdr_5_t_platform_id_set,
+    bcmpkt_erspan3_subhdr_5_t_port_id_set,
+    bcmpkt_erspan3_subhdr_5_t_switch_id_set,
+    bcmpkt_erspan3_subhdr_5_t_timestamp_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_erspan3_subhdr_5_t_field_data[] = {
+    BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_erspan3_subhdr_5_t_field_info = {
+    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT,
+    .info = bcm56780_a0_ina_2_6_11_0_erspan3_subhdr_5_t_field_data,
+};
+
+
+static int32_t bcmpkt_esp_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_pad_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 8, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_pad_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 8, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_pad_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_pad_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_spi_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_spi_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_esp_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_ESP_T_FID_COUNT] = {
+    bcmpkt_esp_t_next_header_get,
+    bcmpkt_esp_t_pad_get,
+    bcmpkt_esp_t_pad_len_get,
+    bcmpkt_esp_t_seq_num_get,
+    bcmpkt_esp_t_spi_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_esp_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_ESP_T_FID_COUNT] = {
+    bcmpkt_esp_t_next_header_set,
+    bcmpkt_esp_t_pad_set,
+    bcmpkt_esp_t_pad_len_set,
+    bcmpkt_esp_t_seq_num_set,
+    bcmpkt_esp_t_spi_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_esp_t_field_data[] = {
+    BCM56780_A0_INA_2_6_11_0_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_esp_t_field_info = {
+    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_ESP_T_FID_COUNT,
+    .info = bcm56780_a0_ina_2_6_11_0_esp_t_field_data,
+};
+
+
+static int32_t bcmpkt_etag_t_tag_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_etag_t_tag_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_etag_t_tpid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_etag_t_tpid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_etag_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_ETAG_T_FID_COUNT] = {
+    bcmpkt_etag_t_tag_get,
+    bcmpkt_etag_t_tpid_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_etag_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_ETAG_T_FID_COUNT] = {
+    bcmpkt_etag_t_tag_set,
+    bcmpkt_etag_t_tpid_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_etag_t_field_data[] = {
+    BCM56780_A0_INA_2_6_11_0_BCMPKT_ETAG_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_etag_t_field_info = {
+    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_ETAG_T_FID_COUNT,
+    .info = bcm56780_a0_ina_2_6_11_0_etag_t_field_data,
+};
+
+
+static int32_t bcmpkt_ethertype_t_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ethertype_t_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_ethertype_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = {
+    bcmpkt_ethertype_t_type_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_ethertype_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = {
+    bcmpkt_ethertype_t_type_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_ethertype_t_field_data[] = {
+    BCM56780_A0_INA_2_6_11_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_ethertype_t_field_info = {
+    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_ETHERTYPE_T_FID_COUNT,
+    .info = bcm56780_a0_ina_2_6_11_0_ethertype_t_field_data,
+};
+
+
+static int32_t bcmpkt_frag_t_frag_info_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_frag_t_frag_info_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_frag_t_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_frag_t_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_frag_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_frag_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_frag_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_frag_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_frag_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_FRAG_T_FID_COUNT] = {
+    bcmpkt_frag_t_frag_info_get,
+    bcmpkt_frag_t_id_get,
+    bcmpkt_frag_t_next_header_get,
+    bcmpkt_frag_t_reserved_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_frag_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_FRAG_T_FID_COUNT] = {
+    bcmpkt_frag_t_frag_info_set,
+    bcmpkt_frag_t_id_set,
+    bcmpkt_frag_t_next_header_set,
+    bcmpkt_frag_t_reserved_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_frag_t_field_data[] = {
+    BCM56780_A0_INA_2_6_11_0_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_frag_t_field_info = {
+    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_FRAG_T_FID_COUNT,
+    .info = bcm56780_a0_ina_2_6_11_0_frag_t_field_data,
+};
+
+
+static int32_t bcmpkt_generic_loopback_t_destination_obj_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_destination_obj_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_destination_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_destination_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_entropy_obj_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_entropy_obj_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_header_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 20, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_header_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 20, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_input_priority_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 12, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_input_priority_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 12, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_interface_ctrl_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 4, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_interface_ctrl_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 4, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_interface_obj_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_interface_obj_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_qos_obj_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_qos_obj_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_reserved_1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_reserved_1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_reserved_2_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_reserved_2_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_source_system_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_source_system_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_start_byte_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_start_byte_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_generic_loopback_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = {
+    bcmpkt_generic_loopback_t_destination_obj_get,
+    bcmpkt_generic_loopback_t_destination_type_get,
+    bcmpkt_generic_loopback_t_entropy_obj_get,
+    bcmpkt_generic_loopback_t_flags_get,
+    bcmpkt_generic_loopback_t_header_type_get,
+    bcmpkt_generic_loopback_t_input_priority_get,
+    bcmpkt_generic_loopback_t_interface_ctrl_get,
+    bcmpkt_generic_loopback_t_interface_obj_get,
+    bcmpkt_generic_loopback_t_processing_ctrl_0_get,
+    bcmpkt_generic_loopback_t_processing_ctrl_1_get,
+    bcmpkt_generic_loopback_t_qos_obj_get,
+    bcmpkt_generic_loopback_t_reserved_1_get,
+    bcmpkt_generic_loopback_t_reserved_2_get,
+    bcmpkt_generic_loopback_t_source_system_port_get,
+    bcmpkt_generic_loopback_t_start_byte_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_generic_loopback_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = {
+    bcmpkt_generic_loopback_t_destination_obj_set,
+    bcmpkt_generic_loopback_t_destination_type_set,
+    bcmpkt_generic_loopback_t_entropy_obj_set,
+    bcmpkt_generic_loopback_t_flags_set,
+    bcmpkt_generic_loopback_t_header_type_set,
+    bcmpkt_generic_loopback_t_input_priority_set,
+    bcmpkt_generic_loopback_t_interface_ctrl_set,
+    bcmpkt_generic_loopback_t_interface_obj_set,
+    bcmpkt_generic_loopback_t_processing_ctrl_0_set,
+    bcmpkt_generic_loopback_t_processing_ctrl_1_set,
+    bcmpkt_generic_loopback_t_qos_obj_set,
+    bcmpkt_generic_loopback_t_reserved_1_set,
+    bcmpkt_generic_loopback_t_reserved_2_set,
+    bcmpkt_generic_loopback_t_source_system_port_set,
+    bcmpkt_generic_loopback_t_start_byte_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_generic_loopback_t_field_data[] = {
+    BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_generic_loopback_t_field_info = {
+    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT,
+    .info = bcm56780_a0_ina_2_6_11_0_generic_loopback_t_field_data,
+};
+
+
+static int32_t bcmpkt_gpe_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_next_protocol_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_next_protocol_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_reserved0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_reserved0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_reserved1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_reserved1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_vni_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 8, 24);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_vni_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 8, 24, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_gpe_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_GPE_T_FID_COUNT] = {
+    bcmpkt_gpe_t_flags_get,
+    bcmpkt_gpe_t_next_protocol_get,
+    bcmpkt_gpe_t_reserved0_get,
+    bcmpkt_gpe_t_reserved1_get,
+    bcmpkt_gpe_t_vni_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_gpe_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_GPE_T_FID_COUNT] = {
+    bcmpkt_gpe_t_flags_set,
+    bcmpkt_gpe_t_next_protocol_set,
+    bcmpkt_gpe_t_reserved0_set,
+    bcmpkt_gpe_t_reserved1_set,
+    bcmpkt_gpe_t_vni_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_gpe_t_field_data[] = {
+    BCM56780_A0_INA_2_6_11_0_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_gpe_t_field_info = {
+    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_GPE_T_FID_COUNT,
+    .info = bcm56780_a0_ina_2_6_11_0_gpe_t_field_data,
+};
+
+
+static int32_t bcmpkt_gre_chksum_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_chksum_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gre_chksum_t_offset_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_chksum_t_offset_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_gre_chksum_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = {
+    bcmpkt_gre_chksum_t_checksum_get,
+    bcmpkt_gre_chksum_t_offset_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_gre_chksum_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = {
+    bcmpkt_gre_chksum_t_checksum_set,
+    bcmpkt_gre_chksum_t_offset_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_gre_chksum_t_field_data[] = {
+    BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_gre_chksum_t_field_info = {
+    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT,
+    .info = bcm56780_a0_ina_2_6_11_0_gre_chksum_t_field_data,
+};
+
+
+static int32_t bcmpkt_gre_key_t_key_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_key_t_key_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_gre_key_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_KEY_T_FID_COUNT] = {
+    bcmpkt_gre_key_t_key_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_gre_key_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_KEY_T_FID_COUNT] = {
+    bcmpkt_gre_key_t_key_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_gre_key_t_field_data[] = {
+    BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_gre_key_t_field_info = {
+    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_KEY_T_FID_COUNT,
+    .info = bcm56780_a0_ina_2_6_11_0_gre_key_t_field_data,
+};
+
+
+static int32_t bcmpkt_gre_rout_t_routing_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_rout_t_routing_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_gre_rout_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_ROUT_T_FID_COUNT] = {
+    bcmpkt_gre_rout_t_routing_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_gre_rout_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_ROUT_T_FID_COUNT] = {
+    bcmpkt_gre_rout_t_routing_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_gre_rout_t_field_data[] = {
+    BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_gre_rout_t_field_info = {
+    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_ROUT_T_FID_COUNT,
+    .info = bcm56780_a0_ina_2_6_11_0_gre_rout_t_field_data,
+};
+
+
+static int32_t bcmpkt_gre_seq_t_sequence_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_seq_t_sequence_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_gre_seq_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_SEQ_T_FID_COUNT] = {
+    bcmpkt_gre_seq_t_sequence_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_gre_seq_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_SEQ_T_FID_COUNT] = {
+    bcmpkt_gre_seq_t_sequence_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_gre_seq_t_field_data[] = {
+    BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_gre_seq_t_field_info = {
+    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_SEQ_T_FID_COUNT,
+    .info = bcm56780_a0_ina_2_6_11_0_gre_seq_t_field_data,
+};
+
+
+static int32_t bcmpkt_gre_t_c_r_k_s_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_t_c_r_k_s_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gre_t_protocol_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_t_protocol_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gre_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 19, 9);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 19, 9, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gre_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 3);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 3, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_gre_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_T_FID_COUNT] = {
+    bcmpkt_gre_t_c_r_k_s_get,
+    bcmpkt_gre_t_protocol_get,
+    bcmpkt_gre_t_reserved_get,
+    bcmpkt_gre_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_gre_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_T_FID_COUNT] = {
+    bcmpkt_gre_t_c_r_k_s_set,
+    bcmpkt_gre_t_protocol_set,
+    bcmpkt_gre_t_reserved_set,
+    bcmpkt_gre_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_gre_t_field_data[] = {
+    BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_gre_t_field_info = {
+    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_GRE_T_FID_COUNT,
+    .info = bcm56780_a0_ina_2_6_11_0_gre_t_field_data,
+};
+
+
+static int32_t bcmpkt_hg3_base_t_cn_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 4, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_cn_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 4, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_cng_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 6, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_cng_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 6, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_entropy_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 8, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_entropy_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 8, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_ext_hdr_present_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 18, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_ext_hdr_present_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 18, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_hg3_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 17, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_hg3_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 17, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_l3_routed_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 31, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_l3_routed_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 31, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_mirror_copy_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_mirror_copy_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_reserved_etype_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 22, 10);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_reserved_etype_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 22, 10, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_system_destination_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 15);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_system_destination_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 15, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_system_destination_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 15, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_system_destination_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 15, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_system_source_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 15);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_system_source_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 15, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_tc_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_tc_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 20, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 20, 2, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_hg3_base_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_FID_COUNT] = {
+    bcmpkt_hg3_base_t_cn_get,
+    bcmpkt_hg3_base_t_cng_get,
+    bcmpkt_hg3_base_t_entropy_get,
+    bcmpkt_hg3_base_t_ext_hdr_present_get,
+    bcmpkt_hg3_base_t_hg3_reserved_get,
+    bcmpkt_hg3_base_t_l3_routed_get,
+    bcmpkt_hg3_base_t_mirror_copy_get,
+    bcmpkt_hg3_base_t_reserved_etype_get,
+    bcmpkt_hg3_base_t_system_destination_get,
+    bcmpkt_hg3_base_t_system_destination_type_get,
+    bcmpkt_hg3_base_t_system_source_get,
+    bcmpkt_hg3_base_t_tc_get,
+    bcmpkt_hg3_base_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_hg3_base_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_FID_COUNT] = {
+    bcmpkt_hg3_base_t_cn_set,
+    bcmpkt_hg3_base_t_cng_set,
+    bcmpkt_hg3_base_t_entropy_set,
+    bcmpkt_hg3_base_t_ext_hdr_present_set,
+    bcmpkt_hg3_base_t_hg3_reserved_set,
+    bcmpkt_hg3_base_t_l3_routed_set,
+    bcmpkt_hg3_base_t_mirror_copy_set,
+    bcmpkt_hg3_base_t_reserved_etype_set,
+    bcmpkt_hg3_base_t_system_destination_set,
+    bcmpkt_hg3_base_t_system_destination_type_set,
+    bcmpkt_hg3_base_t_system_source_set,
+    bcmpkt_hg3_base_t_tc_set,
+    bcmpkt_hg3_base_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_hg3_base_t_field_data[] = {
+    BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_hg3_base_t_field_info = {
+    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_BASE_T_FID_COUNT,
+    .info = bcm56780_a0_ina_2_6_11_0_hg3_base_t_field_data,
+};
+
+
+static int32_t bcmpkt_hg3_extension_0_t_class_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_extension_0_t_class_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_extension_0_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_extension_0_t_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_extension_0_t_forwarding_domain_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_extension_0_t_forwarding_domain_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_extension_0_t_svp_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_extension_0_t_svp_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_hg3_extension_0_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT] = {
+    bcmpkt_hg3_extension_0_t_class_id_get,
+    bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_get,
+    bcmpkt_hg3_extension_0_t_flags_get,
+    bcmpkt_hg3_extension_0_t_forwarding_domain_get,
+    bcmpkt_hg3_extension_0_t_svp_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_hg3_extension_0_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT] = {
+    bcmpkt_hg3_extension_0_t_class_id_set,
+    bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_set,
+    bcmpkt_hg3_extension_0_t_flags_set,
+    bcmpkt_hg3_extension_0_t_forwarding_domain_set,
+    bcmpkt_hg3_extension_0_t_svp_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_hg3_extension_0_t_field_data[] = {
+    BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_EXTENSION_0_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_hg3_extension_0_t_field_info = {
+    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT,
+    .info = bcm56780_a0_ina_2_6_11_0_hg3_extension_0_t_field_data,
+};
+
+
+static int32_t bcmpkt_hop_by_hop_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hop_by_hop_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hop_by_hop_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hop_by_hop_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hop_by_hop_t_option_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_hop_by_hop_t_option_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_hop_by_hop_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = {
+    bcmpkt_hop_by_hop_t_hdr_ext_len_get,
+    bcmpkt_hop_by_hop_t_next_header_get,
+    bcmpkt_hop_by_hop_t_option_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_hop_by_hop_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = {
+    bcmpkt_hop_by_hop_t_hdr_ext_len_set,
+    bcmpkt_hop_by_hop_t_next_header_set,
+    bcmpkt_hop_by_hop_t_option_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_hop_by_hop_t_field_data[] = {
+    BCM56780_A0_INA_2_6_11_0_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_hop_by_hop_t_field_info = {
+    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT,
+    .info = bcm56780_a0_ina_2_6_11_0_hop_by_hop_t_field_data,
+};
+
+
+static int32_t bcmpkt_icmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_icmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_icmp_t_code_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_icmp_t_code_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_icmp_t_icmp_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_icmp_t_icmp_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_icmp_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_ICMP_T_FID_COUNT] = {
+    bcmpkt_icmp_t_checksum_get,
+    bcmpkt_icmp_t_code_get,
+    bcmpkt_icmp_t_icmp_type_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_icmp_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_ICMP_T_FID_COUNT] = {
+    bcmpkt_icmp_t_checksum_set,
+    bcmpkt_icmp_t_code_set,
+    bcmpkt_icmp_t_icmp_type_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_icmp_t_field_data[] = {
+    BCM56780_A0_INA_2_6_11_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_icmp_t_field_info = {
+    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_ICMP_T_FID_COUNT,
+    .info = bcm56780_a0_ina_2_6_11_0_icmp_t_field_data,
+};
+
+
+static int32_t bcmpkt_ifa_1_raw_hdr_t_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_1_raw_hdr_t_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_ifa_1_raw_hdr_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_1_RAW_HDR_T_FID_COUNT] = {
+    bcmpkt_ifa_1_raw_hdr_t_data_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_ifa_1_raw_hdr_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_1_RAW_HDR_T_FID_COUNT] = {
+    bcmpkt_ifa_1_raw_hdr_t_data_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_ifa_1_raw_hdr_t_field_data[] = {
+    BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_1_RAW_HDR_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_ifa_1_raw_hdr_t_field_info = {
+    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_1_RAW_HDR_T_FID_COUNT,
+    .info = bcm56780_a0_ina_2_6_11_0_ifa_1_raw_hdr_t_field_data,
+};
+
+
+static int32_t bcmpkt_ifa_header_t_action_vector_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_action_vector_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_cur_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[5], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_cur_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[5], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_flags_rsvd_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 8, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_flags_rsvd_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 8, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_hop_limit_hop_count_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[4], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_hop_limit_hop_count_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[4], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_max_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[5], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_max_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[5], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_metadata_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_metadata_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_msg_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_msg_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_probe_marker_0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_probe_marker_0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_probe_marker_1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_probe_marker_1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_request_vector_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_request_vector_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_rsvd_0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[4], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_rsvd_0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[4], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_sender_handle_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[6], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_sender_handle_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[6], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_sequence_number_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[6], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_sequence_number_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[6], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 24, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_ifa_header_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_FID_COUNT] = {
+    bcmpkt_ifa_header_t_action_vector_get,
+    bcmpkt_ifa_header_t_cur_length_get,
+    bcmpkt_ifa_header_t_flags_get,
+    bcmpkt_ifa_header_t_flags_rsvd_get,
+    bcmpkt_ifa_header_t_hop_limit_hop_count_get,
+    bcmpkt_ifa_header_t_max_length_get,
+    bcmpkt_ifa_header_t_metadata_get,
+    bcmpkt_ifa_header_t_msg_type_get,
+    bcmpkt_ifa_header_t_probe_marker_0_get,
+    bcmpkt_ifa_header_t_probe_marker_1_get,
+    bcmpkt_ifa_header_t_request_vector_get,
+    bcmpkt_ifa_header_t_rsvd_0_get,
+    bcmpkt_ifa_header_t_sender_handle_get,
+    bcmpkt_ifa_header_t_sequence_number_get,
+    bcmpkt_ifa_header_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_ifa_header_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_FID_COUNT] = {
+    bcmpkt_ifa_header_t_action_vector_set,
+    bcmpkt_ifa_header_t_cur_length_set,
+    bcmpkt_ifa_header_t_flags_set,
+    bcmpkt_ifa_header_t_flags_rsvd_set,
+    bcmpkt_ifa_header_t_hop_limit_hop_count_set,
+    bcmpkt_ifa_header_t_max_length_set,
+    bcmpkt_ifa_header_t_metadata_set,
+    bcmpkt_ifa_header_t_msg_type_set,
+    bcmpkt_ifa_header_t_probe_marker_0_set,
+    bcmpkt_ifa_header_t_probe_marker_1_set,
+    bcmpkt_ifa_header_t_request_vector_set,
+    bcmpkt_ifa_header_t_rsvd_0_set,
+    bcmpkt_ifa_header_t_sender_handle_set,
+    bcmpkt_ifa_header_t_sequence_number_set,
+    bcmpkt_ifa_header_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_ifa_header_t_field_data[] = {
+    BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_ifa_header_t_field_info = {
+    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_IFA_HEADER_T_FID_COUNT,
+    .info = bcm56780_a0_ina_2_6_11_0_ifa_header_t_field_data,
+};
+
+
+static int32_t bcmpkt_igmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_igmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_igmp_t_group_address_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_igmp_t_group_address_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_igmp_t_igmp_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_igmp_t_igmp_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_igmp_t_max_resp_time_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_igmp_t_max_resp_time_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_igmp_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_IGMP_T_FID_COUNT] = {
+    bcmpkt_igmp_t_checksum_get,
+    bcmpkt_igmp_t_group_address_get,
+    bcmpkt_igmp_t_igmp_type_get,
+    bcmpkt_igmp_t_max_resp_time_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_igmp_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_IGMP_T_FID_COUNT] = {
+    bcmpkt_igmp_t_checksum_set,
+    bcmpkt_igmp_t_group_address_set,
+    bcmpkt_igmp_t_igmp_type_set,
+    bcmpkt_igmp_t_max_resp_time_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_igmp_t_field_data[] = {
+    BCM56780_A0_INA_2_6_11_0_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_igmp_t_field_info = {
+    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_IGMP_T_FID_COUNT,
+    .info = bcm56780_a0_ina_2_6_11_0_igmp_t_field_data,
+};
+
+
+static int32_t bcmpkt_ipfix_t_export_time_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_export_time_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_obs_domain_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_obs_domain_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_ipfix_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_IPFIX_T_FID_COUNT] = {
+    bcmpkt_ipfix_t_export_time_get,
+    bcmpkt_ipfix_t_length_get,
+    bcmpkt_ipfix_t_obs_domain_id_get,
+    bcmpkt_ipfix_t_sequence_num_get,
+    bcmpkt_ipfix_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_ipfix_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_IPFIX_T_FID_COUNT] = {
+    bcmpkt_ipfix_t_export_time_set,
+    bcmpkt_ipfix_t_length_set,
+    bcmpkt_ipfix_t_obs_domain_id_set,
+    bcmpkt_ipfix_t_sequence_num_set,
+    bcmpkt_ipfix_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_ipfix_t_field_data[] = {
+    BCM56780_A0_INA_2_6_11_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_ipfix_t_field_info = {
+    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_IPFIX_T_FID_COUNT,
+    .info = bcm56780_a0_ina_2_6_11_0_ipfix_t_field_data,
+};
+
+
+static int32_t bcmpkt_ipv4_t_da_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_da_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_flags_frag_offset_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_flags_frag_offset_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_hdr_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_hdr_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_option_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_option_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_protocol_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_protocol_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_sa_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_sa_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_tos_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_tos_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_total_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_total_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_ttl_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_ttl_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_version_hdr_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_version_hdr_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_ipv4_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV4_T_FID_COUNT] = {
+    bcmpkt_ipv4_t_da_get,
+    bcmpkt_ipv4_t_flags_frag_offset_get,
+    bcmpkt_ipv4_t_hdr_checksum_get,
+    bcmpkt_ipv4_t_id_get,
+    bcmpkt_ipv4_t_option_get,
+    bcmpkt_ipv4_t_protocol_get,
+    bcmpkt_ipv4_t_sa_get,
+    bcmpkt_ipv4_t_tos_get,
+    bcmpkt_ipv4_t_total_length_get,
+    bcmpkt_ipv4_t_ttl_get,
+    bcmpkt_ipv4_t_version_hdr_len_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_ipv4_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV4_T_FID_COUNT] = {
+    bcmpkt_ipv4_t_da_set,
+    bcmpkt_ipv4_t_flags_frag_offset_set,
+    bcmpkt_ipv4_t_hdr_checksum_set,
+    bcmpkt_ipv4_t_id_set,
+    bcmpkt_ipv4_t_option_set,
+    bcmpkt_ipv4_t_protocol_set,
+    bcmpkt_ipv4_t_sa_set,
+    bcmpkt_ipv4_t_tos_set,
+    bcmpkt_ipv4_t_total_length_set,
+    bcmpkt_ipv4_t_ttl_set,
+    bcmpkt_ipv4_t_version_hdr_len_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_ipv4_t_field_data[] = {
+    BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_ipv4_t_field_info = {
+    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV4_T_FID_COUNT,
+    .info = bcm56780_a0_ina_2_6_11_0_ipv4_t_field_data,
+};
+
+
+static int32_t bcmpkt_ipv6_t_da_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_da_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_flow_label_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 20);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_flow_label_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 20, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_hop_limit_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_hop_limit_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 8, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 8, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_payload_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_payload_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_sa_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_sa_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_traffic_class_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 20, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_traffic_class_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 20, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_ipv6_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV6_T_FID_COUNT] = {
+    bcmpkt_ipv6_t_da_get,
+    bcmpkt_ipv6_t_flow_label_get,
+    bcmpkt_ipv6_t_hop_limit_get,
+    bcmpkt_ipv6_t_next_header_get,
+    bcmpkt_ipv6_t_payload_length_get,
+    bcmpkt_ipv6_t_sa_get,
+    bcmpkt_ipv6_t_traffic_class_get,
+    bcmpkt_ipv6_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_ipv6_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV6_T_FID_COUNT] = {
+    bcmpkt_ipv6_t_da_set,
+    bcmpkt_ipv6_t_flow_label_set,
+    bcmpkt_ipv6_t_hop_limit_set,
+    bcmpkt_ipv6_t_next_header_set,
+    bcmpkt_ipv6_t_payload_length_set,
+    bcmpkt_ipv6_t_sa_set,
+    bcmpkt_ipv6_t_traffic_class_set,
+    bcmpkt_ipv6_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_ipv6_t_field_data[] = {
+    BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_ipv6_t_field_info = {
+    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_IPV6_T_FID_COUNT,
+    .info = bcm56780_a0_ina_2_6_11_0_ipv6_t_field_data,
+};
+
+
+static int32_t bcmpkt_l2_t_macda_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_l2_t_macda_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_l2_t_macsa_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_l2_t_macsa_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_l2_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_L2_T_FID_COUNT] = {
+    bcmpkt_l2_t_macda_get,
+    bcmpkt_l2_t_macsa_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_l2_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_L2_T_FID_COUNT] = {
+    bcmpkt_l2_t_macda_set,
+    bcmpkt_l2_t_macsa_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_l2_t_field_data[] = {
+    BCM56780_A0_INA_2_6_11_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_l2_t_field_info = {
+    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_L2_T_FID_COUNT,
+    .info = bcm56780_a0_ina_2_6_11_0_l2_t_field_data,
+};
+
+
+static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_mirror_erspan_sn_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = {
+    bcmpkt_mirror_erspan_sn_t_seq_num_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_mirror_erspan_sn_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = {
+    bcmpkt_mirror_erspan_sn_t_seq_num_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_mirror_erspan_sn_t_field_data[] = {
+    BCM56780_A0_INA_2_6_11_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_mirror_erspan_sn_t_field_info = {
+    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT,
+    .info = bcm56780_a0_ina_2_6_11_0_mirror_erspan_sn_t_field_data,
+};
+
+
+static int32_t bcmpkt_mirror_transport_t_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_mirror_transport_t_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_mirror_transport_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = {
+    bcmpkt_mirror_transport_t_data_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_mirror_transport_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = {
+    bcmpkt_mirror_transport_t_data_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_mirror_transport_t_field_data[] = {
+    BCM56780_A0_INA_2_6_11_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_mirror_transport_t_field_info = {
+    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT,
+    .info = bcm56780_a0_ina_2_6_11_0_mirror_transport_t_field_data,
+};
+
+
+static int32_t bcmpkt_mpls_ach_t_channel_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_ach_t_channel_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_ach_t_cw_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_ach_t_cw_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_ach_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_ach_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_ach_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_ach_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 4, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_mpls_ach_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_ACH_T_FID_COUNT] = {
+    bcmpkt_mpls_ach_t_channel_type_get,
+    bcmpkt_mpls_ach_t_cw_type_get,
+    bcmpkt_mpls_ach_t_reserved_get,
+    bcmpkt_mpls_ach_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_mpls_ach_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_ACH_T_FID_COUNT] = {
+    bcmpkt_mpls_ach_t_channel_type_set,
+    bcmpkt_mpls_ach_t_cw_type_set,
+    bcmpkt_mpls_ach_t_reserved_set,
+    bcmpkt_mpls_ach_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_mpls_ach_t_field_data[] = {
+    BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_mpls_ach_t_field_info = {
+    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_ACH_T_FID_COUNT,
+    .info = bcm56780_a0_ina_2_6_11_0_mpls_ach_t_field_data,
+};
+
+
+static int32_t bcmpkt_mpls_bv_t_value_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_bv_t_value_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_mpls_bv_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_BV_T_FID_COUNT] = {
+    bcmpkt_mpls_bv_t_value_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_mpls_bv_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_BV_T_FID_COUNT] = {
+    bcmpkt_mpls_bv_t_value_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_mpls_bv_t_field_data[] = {
+    BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_mpls_bv_t_field_info = {
+    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_BV_T_FID_COUNT,
+    .info = bcm56780_a0_ina_2_6_11_0_mpls_bv_t_field_data,
+};
+
+
+static int32_t bcmpkt_mpls_cw_t_cw_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_cw_t_cw_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_cw_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 12);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_cw_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 12, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_cw_t_seq_number_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_cw_t_seq_number_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_mpls_cw_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_CW_T_FID_COUNT] = {
+    bcmpkt_mpls_cw_t_cw_type_get,
+    bcmpkt_mpls_cw_t_reserved_get,
+    bcmpkt_mpls_cw_t_seq_number_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_mpls_cw_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_CW_T_FID_COUNT] = {
+    bcmpkt_mpls_cw_t_cw_type_set,
+    bcmpkt_mpls_cw_t_reserved_set,
+    bcmpkt_mpls_cw_t_seq_number_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_mpls_cw_t_field_data[] = {
+    BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_mpls_cw_t_field_info = {
+    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_CW_T_FID_COUNT,
+    .info = bcm56780_a0_ina_2_6_11_0_mpls_cw_t_field_data,
+};
+
+
+static int32_t bcmpkt_mpls_t_bos_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_t_bos_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_t_exp_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 9, 3);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_t_exp_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 9, 3, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_t_label_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 12, 20);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_t_label_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 12, 20, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_t_ttl_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_t_ttl_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_mpls_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_T_FID_COUNT] = {
+    bcmpkt_mpls_t_bos_get,
+    bcmpkt_mpls_t_exp_get,
+    bcmpkt_mpls_t_label_get,
+    bcmpkt_mpls_t_ttl_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_mpls_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_T_FID_COUNT] = {
+    bcmpkt_mpls_t_bos_set,
+    bcmpkt_mpls_t_exp_set,
+    bcmpkt_mpls_t_label_set,
+    bcmpkt_mpls_t_ttl_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_mpls_t_field_data[] = {
+    BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_mpls_t_field_info = {
+    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_MPLS_T_FID_COUNT,
+    .info = bcm56780_a0_ina_2_6_11_0_mpls_t_field_data,
+};
+
+
+static int32_t bcmpkt_p_1588_t_cntrl_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[8], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_cntrl_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[8], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_correction_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_correction_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_domain_nb_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_domain_nb_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_logmsginterval_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[8], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_logmsginterval_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[8], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_msg_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_msg_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_msg_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_msg_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_reserved1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 20, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_reserved1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 20, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_reserved2_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_reserved3_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_reserved3_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_seq_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[7], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_seq_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[7], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_srcportid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_srcportid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_transportspec_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_transportspec_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 4, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_p_1588_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T_FID_COUNT] = {
+    bcmpkt_p_1588_t_cntrl_get,
+    bcmpkt_p_1588_t_correction_get,
+    bcmpkt_p_1588_t_domain_nb_get,
+    bcmpkt_p_1588_t_flags_get,
+    bcmpkt_p_1588_t_logmsginterval_get,
+    bcmpkt_p_1588_t_msg_length_get,
+    bcmpkt_p_1588_t_msg_type_get,
+    bcmpkt_p_1588_t_reserved1_get,
+    bcmpkt_p_1588_t_reserved2_get,
+    bcmpkt_p_1588_t_reserved3_get,
+    bcmpkt_p_1588_t_seq_id_get,
+    bcmpkt_p_1588_t_srcportid_get,
+    bcmpkt_p_1588_t_transportspec_get,
+    bcmpkt_p_1588_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_p_1588_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T_FID_COUNT] = {
+    bcmpkt_p_1588_t_cntrl_set,
+    bcmpkt_p_1588_t_correction_set,
+    bcmpkt_p_1588_t_domain_nb_set,
+    bcmpkt_p_1588_t_flags_set,
+    bcmpkt_p_1588_t_logmsginterval_set,
+    bcmpkt_p_1588_t_msg_length_set,
+    bcmpkt_p_1588_t_msg_type_set,
+    bcmpkt_p_1588_t_reserved1_set,
+    bcmpkt_p_1588_t_reserved2_set,
+    bcmpkt_p_1588_t_reserved3_set,
+    bcmpkt_p_1588_t_seq_id_set,
+    bcmpkt_p_1588_t_srcportid_set,
+    bcmpkt_p_1588_t_transportspec_set,
+    bcmpkt_p_1588_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_p_1588_t_field_data[] = {
+    BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_p_1588_t_field_info = {
+    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_P_1588_T_FID_COUNT,
+    .info = bcm56780_a0_ina_2_6_11_0_p_1588_t_field_data,
+};
+
+
+static int32_t bcmpkt_prog_ext_hdr_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_prog_ext_hdr_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_prog_ext_hdr_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_prog_ext_hdr_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_prog_ext_hdr_t_option_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_prog_ext_hdr_t_option_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_prog_ext_hdr_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = {
+    bcmpkt_prog_ext_hdr_t_hdr_ext_len_get,
+    bcmpkt_prog_ext_hdr_t_next_header_get,
+    bcmpkt_prog_ext_hdr_t_option_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_prog_ext_hdr_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = {
+    bcmpkt_prog_ext_hdr_t_hdr_ext_len_set,
+    bcmpkt_prog_ext_hdr_t_next_header_set,
+    bcmpkt_prog_ext_hdr_t_option_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_prog_ext_hdr_t_field_data[] = {
+    BCM56780_A0_INA_2_6_11_0_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_prog_ext_hdr_t_field_info = {
+    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT,
+    .info = bcm56780_a0_ina_2_6_11_0_prog_ext_hdr_t_field_data,
+};
+
+
+static int32_t bcmpkt_psamp_0_t_flowset_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_flowset_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_next_hop_index_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_next_hop_index_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_psamp_0_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_0_T_FID_COUNT] = {
+    bcmpkt_psamp_0_t_flowset_get,
+    bcmpkt_psamp_0_t_length_get,
+    bcmpkt_psamp_0_t_next_hop_index_get,
+    bcmpkt_psamp_0_t_obs_time_ns_get,
+    bcmpkt_psamp_0_t_obs_time_s_get,
+    bcmpkt_psamp_0_t_template_id_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_psamp_0_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_0_T_FID_COUNT] = {
+    bcmpkt_psamp_0_t_flowset_set,
+    bcmpkt_psamp_0_t_length_set,
+    bcmpkt_psamp_0_t_next_hop_index_set,
+    bcmpkt_psamp_0_t_obs_time_ns_set,
+    bcmpkt_psamp_0_t_obs_time_s_set,
+    bcmpkt_psamp_0_t_template_id_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_psamp_0_t_field_data[] = {
+    BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_psamp_0_t_field_info = {
+    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_0_T_FID_COUNT,
+    .info = bcm56780_a0_ina_2_6_11_0_psamp_0_t_field_data,
+};
+
+
+static int32_t bcmpkt_psamp_1_t_dlb_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_dlb_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_egress_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_egress_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_epoch_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_epoch_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_variable_flag_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_variable_flag_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 16, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_psamp_1_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_1_T_FID_COUNT] = {
+    bcmpkt_psamp_1_t_dlb_id_get,
+    bcmpkt_psamp_1_t_egress_port_get,
+    bcmpkt_psamp_1_t_epoch_get,
+    bcmpkt_psamp_1_t_ingress_port_get,
+    bcmpkt_psamp_1_t_sampled_length_get,
+    bcmpkt_psamp_1_t_user_meta_data_get,
+    bcmpkt_psamp_1_t_variable_flag_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_psamp_1_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_1_T_FID_COUNT] = {
+    bcmpkt_psamp_1_t_dlb_id_set,
+    bcmpkt_psamp_1_t_egress_port_set,
+    bcmpkt_psamp_1_t_epoch_set,
+    bcmpkt_psamp_1_t_ingress_port_set,
+    bcmpkt_psamp_1_t_sampled_length_set,
+    bcmpkt_psamp_1_t_user_meta_data_set,
+    bcmpkt_psamp_1_t_variable_flag_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_psamp_1_t_field_data[] = {
+    BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_psamp_1_t_field_info = {
+    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_1_T_FID_COUNT,
+    .info = bcm56780_a0_ina_2_6_11_0_psamp_1_t_field_data,
+};
+
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[4], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[4], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[4], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[4], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_psamp_mirror_on_drop_0_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = {
+    bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_length_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_template_id_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_psamp_mirror_on_drop_0_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = {
+    bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_length_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_template_id_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_psamp_mirror_on_drop_0_t_field_data[] = {
+    BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_psamp_mirror_on_drop_0_t_field_info = {
+    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT,
+    .info = bcm56780_a0_ina_2_6_11_0_psamp_mirror_on_drop_0_t_field_data,
+};
+
+
+static int32_t bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_psamp_mirror_on_drop_1_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT] = {
+    bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_get,
+    bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_get,
+    bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_get,
+    bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_get,
+    bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_get,
+    bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_psamp_mirror_on_drop_1_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT] = {
+    bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_set,
+    bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_set,
+    bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_set,
+    bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_set,
+    bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_set,
+    bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_psamp_mirror_on_drop_1_t_field_data[] = {
+    BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_psamp_mirror_on_drop_1_t_field_info = {
+    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT,
+    .info = bcm56780_a0_ina_2_6_11_0_psamp_mirror_on_drop_1_t_field_data,
+};
+
+
+static int32_t bcmpkt_psamp_mirror_on_drop_2_t_egr_drop_reason_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_2_t_egr_drop_reason_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_2_t_ep_copy_session_index_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_2_t_ep_copy_session_index_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_2_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_2_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_2_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_2_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_2_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_2_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_2_t_var_len_indicator_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_2_t_var_len_indicator_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_psamp_mirror_on_drop_2_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT] = {
+    bcmpkt_psamp_mirror_on_drop_2_t_egr_drop_reason_get,
+    bcmpkt_psamp_mirror_on_drop_2_t_ep_copy_session_index_get,
+    bcmpkt_psamp_mirror_on_drop_2_t_reserved_0_get,
+    bcmpkt_psamp_mirror_on_drop_2_t_sampled_length_get,
+    bcmpkt_psamp_mirror_on_drop_2_t_user_meta_data_get,
+    bcmpkt_psamp_mirror_on_drop_2_t_var_len_indicator_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_psamp_mirror_on_drop_2_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT] = {
+    bcmpkt_psamp_mirror_on_drop_2_t_egr_drop_reason_set,
+    bcmpkt_psamp_mirror_on_drop_2_t_ep_copy_session_index_set,
+    bcmpkt_psamp_mirror_on_drop_2_t_reserved_0_set,
+    bcmpkt_psamp_mirror_on_drop_2_t_sampled_length_set,
+    bcmpkt_psamp_mirror_on_drop_2_t_user_meta_data_set,
+    bcmpkt_psamp_mirror_on_drop_2_t_var_len_indicator_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_psamp_mirror_on_drop_2_t_field_data[] = {
+    BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_psamp_mirror_on_drop_2_t_field_info = {
+    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT,
+    .info = bcm56780_a0_ina_2_6_11_0_psamp_mirror_on_drop_2_t_field_data,
+};
+
+
+static int32_t bcmpkt_rarp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_operation_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_operation_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_rarp_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_RARP_T_FID_COUNT] = {
+    bcmpkt_rarp_t_hardware_len_get,
+    bcmpkt_rarp_t_hardware_type_get,
+    bcmpkt_rarp_t_operation_get,
+    bcmpkt_rarp_t_prot_addr_len_get,
+    bcmpkt_rarp_t_protocol_type_get,
+    bcmpkt_rarp_t_sender_ha_get,
+    bcmpkt_rarp_t_sender_ip_get,
+    bcmpkt_rarp_t_target_ha_get,
+    bcmpkt_rarp_t_target_ip_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_rarp_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_RARP_T_FID_COUNT] = {
+    bcmpkt_rarp_t_hardware_len_set,
+    bcmpkt_rarp_t_hardware_type_set,
+    bcmpkt_rarp_t_operation_set,
+    bcmpkt_rarp_t_prot_addr_len_set,
+    bcmpkt_rarp_t_protocol_type_set,
+    bcmpkt_rarp_t_sender_ha_set,
+    bcmpkt_rarp_t_sender_ip_set,
+    bcmpkt_rarp_t_target_ha_set,
+    bcmpkt_rarp_t_target_ip_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_rarp_t_field_data[] = {
+    BCM56780_A0_INA_2_6_11_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_rarp_t_field_info = {
+    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_RARP_T_FID_COUNT,
+    .info = bcm56780_a0_ina_2_6_11_0_rarp_t_field_data,
+};
+
+
+static int32_t bcmpkt_routing_t_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_routing_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_routing_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_segments_left_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_segments_left_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_routing_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_ROUTING_T_FID_COUNT] = {
+    bcmpkt_routing_t_data_get,
+    bcmpkt_routing_t_hdr_ext_len_get,
+    bcmpkt_routing_t_next_header_get,
+    bcmpkt_routing_t_routing_type_get,
+    bcmpkt_routing_t_segments_left_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_routing_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_ROUTING_T_FID_COUNT] = {
+    bcmpkt_routing_t_data_set,
+    bcmpkt_routing_t_hdr_ext_len_set,
+    bcmpkt_routing_t_next_header_set,
+    bcmpkt_routing_t_routing_type_set,
+    bcmpkt_routing_t_segments_left_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_routing_t_field_data[] = {
+    BCM56780_A0_INA_2_6_11_0_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_routing_t_field_info = {
+    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_ROUTING_T_FID_COUNT,
+    .info = bcm56780_a0_ina_2_6_11_0_routing_t_field_data,
+};
+
+
+static int32_t bcmpkt_rspan_t_tag_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rspan_t_tag_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rspan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rspan_t_tpid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_rspan_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_RSPAN_T_FID_COUNT] = {
+    bcmpkt_rspan_t_tag_get,
+    bcmpkt_rspan_t_tpid_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_rspan_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_RSPAN_T_FID_COUNT] = {
+    bcmpkt_rspan_t_tag_set,
+    bcmpkt_rspan_t_tpid_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_rspan_t_field_data[] = {
+    BCM56780_A0_INA_2_6_11_0_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_rspan_t_field_info = {
+    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_RSPAN_T_FID_COUNT,
+    .info = bcm56780_a0_ina_2_6_11_0_rspan_t_field_data,
+};
+
+
+static int32_t bcmpkt_sflow_shim_0_t_sys_destination_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_0_t_sys_destination_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_0_t_sys_source_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_0_t_sys_source_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_0_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_0_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_sflow_shim_0_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = {
+    bcmpkt_sflow_shim_0_t_sys_destination_get,
+    bcmpkt_sflow_shim_0_t_sys_source_get,
+    bcmpkt_sflow_shim_0_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_sflow_shim_0_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = {
+    bcmpkt_sflow_shim_0_t_sys_destination_set,
+    bcmpkt_sflow_shim_0_t_sys_source_set,
+    bcmpkt_sflow_shim_0_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_sflow_shim_0_t_field_data[] = {
+    BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_sflow_shim_0_t_field_info = {
+    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT,
+    .info = bcm56780_a0_ina_2_6_11_0_sflow_shim_0_t_field_data,
+};
+
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_dest_sample_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 30, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_dest_sample_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 30, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_discarded_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 27, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_discarded_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 27, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_flex_sample_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 29, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_flex_sample_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 29, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_mcast_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_mcast_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_src_sample_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 31, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_src_sample_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 31, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_truncated_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 26, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_truncated_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 26, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 7);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 7, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 23, 3);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 23, 3, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_sflow_shim_1_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = {
+    bcmpkt_sflow_shim_1_t_flag_dest_sample_get,
+    bcmpkt_sflow_shim_1_t_flag_discarded_get,
+    bcmpkt_sflow_shim_1_t_flag_flex_sample_get,
+    bcmpkt_sflow_shim_1_t_flag_mcast_get,
+    bcmpkt_sflow_shim_1_t_flag_src_sample_get,
+    bcmpkt_sflow_shim_1_t_flag_truncated_get,
+    bcmpkt_sflow_shim_1_t_reserved_get,
+    bcmpkt_sflow_shim_1_t_sys_opcode_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_sflow_shim_1_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = {
+    bcmpkt_sflow_shim_1_t_flag_dest_sample_set,
+    bcmpkt_sflow_shim_1_t_flag_discarded_set,
+    bcmpkt_sflow_shim_1_t_flag_flex_sample_set,
+    bcmpkt_sflow_shim_1_t_flag_mcast_set,
+    bcmpkt_sflow_shim_1_t_flag_src_sample_set,
+    bcmpkt_sflow_shim_1_t_flag_truncated_set,
+    bcmpkt_sflow_shim_1_t_reserved_set,
+    bcmpkt_sflow_shim_1_t_sys_opcode_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_sflow_shim_1_t_field_data[] = {
+    BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_sflow_shim_1_t_field_info = {
+    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT,
+    .info = bcm56780_a0_ina_2_6_11_0_sflow_shim_1_t_field_data,
+};
+
+
+static int32_t bcmpkt_sflow_shim_2_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_2_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_sflow_shim_2_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = {
+    bcmpkt_sflow_shim_2_t_sequence_num_get,
+    bcmpkt_sflow_shim_2_t_user_meta_data_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_sflow_shim_2_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = {
+    bcmpkt_sflow_shim_2_t_sequence_num_set,
+    bcmpkt_sflow_shim_2_t_user_meta_data_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_sflow_shim_2_t_field_data[] = {
+    BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_sflow_shim_2_t_field_info = {
+    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT,
+    .info = bcm56780_a0_ina_2_6_11_0_sflow_shim_2_t_field_data,
+};
+
+
+static int32_t bcmpkt_snap_llc_t_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_snap_llc_t_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_snap_llc_t_snap_llc_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_snap_llc_t_snap_llc_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_snap_llc_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_SNAP_LLC_T_FID_COUNT] = {
+    bcmpkt_snap_llc_t_length_get,
+    bcmpkt_snap_llc_t_snap_llc_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_snap_llc_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_SNAP_LLC_T_FID_COUNT] = {
+    bcmpkt_snap_llc_t_length_set,
+    bcmpkt_snap_llc_t_snap_llc_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_snap_llc_t_field_data[] = {
+    BCM56780_A0_INA_2_6_11_0_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_snap_llc_t_field_info = {
+    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_SNAP_LLC_T_FID_COUNT,
+    .info = bcm56780_a0_ina_2_6_11_0_snap_llc_t_field_data,
+};
+
+
+static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_first_4bytes_t_src_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_first_4bytes_t_src_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_tcp_first_4bytes_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = {
+    bcmpkt_tcp_first_4bytes_t_dst_port_get,
+    bcmpkt_tcp_first_4bytes_t_src_port_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_tcp_first_4bytes_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = {
+    bcmpkt_tcp_first_4bytes_t_dst_port_set,
+    bcmpkt_tcp_first_4bytes_t_src_port_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_tcp_first_4bytes_t_field_data[] = {
+    BCM56780_A0_INA_2_6_11_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_tcp_first_4bytes_t_field_info = {
+    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT,
+    .info = bcm56780_a0_ina_2_6_11_0_tcp_first_4bytes_t_field_data,
+};
+
+
+static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_win_size_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_win_size_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_tcp_last_16bytes_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = {
+    bcmpkt_tcp_last_16bytes_t_ack_num_get,
+    bcmpkt_tcp_last_16bytes_t_checksum_get,
+    bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get,
+    bcmpkt_tcp_last_16bytes_t_seq_num_get,
+    bcmpkt_tcp_last_16bytes_t_urgent_ptr_get,
+    bcmpkt_tcp_last_16bytes_t_win_size_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_tcp_last_16bytes_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = {
+    bcmpkt_tcp_last_16bytes_t_ack_num_set,
+    bcmpkt_tcp_last_16bytes_t_checksum_set,
+    bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set,
+    bcmpkt_tcp_last_16bytes_t_seq_num_set,
+    bcmpkt_tcp_last_16bytes_t_urgent_ptr_set,
+    bcmpkt_tcp_last_16bytes_t_win_size_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_tcp_last_16bytes_t_field_data[] = {
+    BCM56780_A0_INA_2_6_11_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_tcp_last_16bytes_t_field_info = {
+    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT,
+    .info = bcm56780_a0_ina_2_6_11_0_tcp_last_16bytes_t_field_data,
+};
+
+
+static int32_t bcmpkt_udp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_dst_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_src_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_src_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_udp_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_udp_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_udp_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_UDP_T_FID_COUNT] = {
+    bcmpkt_udp_t_checksum_get,
+    bcmpkt_udp_t_dst_port_get,
+    bcmpkt_udp_t_src_port_get,
+    bcmpkt_udp_t_udp_length_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_udp_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_UDP_T_FID_COUNT] = {
+    bcmpkt_udp_t_checksum_set,
+    bcmpkt_udp_t_dst_port_set,
+    bcmpkt_udp_t_src_port_set,
+    bcmpkt_udp_t_udp_length_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_udp_t_field_data[] = {
+    BCM56780_A0_INA_2_6_11_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_udp_t_field_info = {
+    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_UDP_T_FID_COUNT,
+    .info = bcm56780_a0_ina_2_6_11_0_udp_t_field_data,
+};
+
+
+static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_unknown_l3_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = {
+    bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get,
+    bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_unknown_l3_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = {
+    bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set,
+    bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_unknown_l3_t_field_data[] = {
+    BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_unknown_l3_t_field_info = {
+    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT,
+    .info = bcm56780_a0_ina_2_6_11_0_unknown_l3_t_field_data,
+};
+
+
+static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_unknown_l4_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = {
+    bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_unknown_l4_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = {
+    bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_unknown_l4_t_field_data[] = {
+    BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_unknown_l4_t_field_info = {
+    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT,
+    .info = bcm56780_a0_ina_2_6_11_0_unknown_l4_t_field_data,
+};
+
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_unknown_l5_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = {
+    bcmpkt_unknown_l5_t_l5_bytes_0_1_get,
+    bcmpkt_unknown_l5_t_l5_bytes_2_3_get,
+    bcmpkt_unknown_l5_t_l5_bytes_4_7_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_unknown_l5_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = {
+    bcmpkt_unknown_l5_t_l5_bytes_0_1_set,
+    bcmpkt_unknown_l5_t_l5_bytes_2_3_set,
+    bcmpkt_unknown_l5_t_l5_bytes_4_7_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_unknown_l5_t_field_data[] = {
+    BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_unknown_l5_t_field_info = {
+    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT,
+    .info = bcm56780_a0_ina_2_6_11_0_unknown_l5_t_field_data,
+};
+
+
+static int32_t bcmpkt_vlan_t_cfi_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 12, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_cfi_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 12, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_pcp_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 13, 3);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_pcp_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 13, 3, val);
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_tpid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_vid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 12);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_vid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 12, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_vlan_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_VLAN_T_FID_COUNT] = {
+    bcmpkt_vlan_t_cfi_get,
+    bcmpkt_vlan_t_pcp_get,
+    bcmpkt_vlan_t_tpid_get,
+    bcmpkt_vlan_t_vid_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_vlan_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_VLAN_T_FID_COUNT] = {
+    bcmpkt_vlan_t_cfi_set,
+    bcmpkt_vlan_t_pcp_set,
+    bcmpkt_vlan_t_tpid_set,
+    bcmpkt_vlan_t_vid_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_vlan_t_field_data[] = {
+    BCM56780_A0_INA_2_6_11_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_vlan_t_field_info = {
+    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_VLAN_T_FID_COUNT,
+    .info = bcm56780_a0_ina_2_6_11_0_vlan_t_field_data,
+};
+
+
+static int32_t bcmpkt_vntag_t_tag_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_vntag_t_tag_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_vntag_t_tpid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vntag_t_tpid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_vntag_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_VNTAG_T_FID_COUNT] = {
+    bcmpkt_vntag_t_tag_get,
+    bcmpkt_vntag_t_tpid_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_vntag_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_VNTAG_T_FID_COUNT] = {
+    bcmpkt_vntag_t_tag_set,
+    bcmpkt_vntag_t_tpid_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_vntag_t_field_data[] = {
+    BCM56780_A0_INA_2_6_11_0_BCMPKT_VNTAG_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_vntag_t_field_info = {
+    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_VNTAG_T_FID_COUNT,
+    .info = bcm56780_a0_ina_2_6_11_0_vntag_t_field_data,
+};
+
+
+static int32_t bcmpkt_vxlan_t_flags_reserved_1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_vxlan_t_flags_reserved_1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_vxlan_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vxlan_t_reserved2_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_vxlan_t_vn_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 8, 24);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vxlan_t_vn_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 8, 24, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_vxlan_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_VXLAN_T_FID_COUNT] = {
+    bcmpkt_vxlan_t_flags_reserved_1_get,
+    bcmpkt_vxlan_t_reserved2_get,
+    bcmpkt_vxlan_t_vn_id_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_vxlan_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_VXLAN_T_FID_COUNT] = {
+    bcmpkt_vxlan_t_flags_reserved_1_set,
+    bcmpkt_vxlan_t_reserved2_set,
+    bcmpkt_vxlan_t_vn_id_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_vxlan_t_field_data[] = {
+    BCM56780_A0_INA_2_6_11_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_vxlan_t_field_info = {
+    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_VXLAN_T_FID_COUNT,
+    .info = bcm56780_a0_ina_2_6_11_0_vxlan_t_field_data,
+};
+
+
+static int32_t bcmpkt_wesp_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_header_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_header_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_spi_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_spi_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_trailer_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_trailer_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_wesp_iv_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_wesp_iv_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56780_a0_ina_2_6_11_0_wesp_t_fget[BCM56780_A0_INA_2_6_11_0_BCMPKT_WESP_T_FID_COUNT] = {
+    bcmpkt_wesp_t_flags_get,
+    bcmpkt_wesp_t_header_len_get,
+    bcmpkt_wesp_t_next_header_get,
+    bcmpkt_wesp_t_seq_num_get,
+    bcmpkt_wesp_t_spi_get,
+    bcmpkt_wesp_t_trailer_len_get,
+    bcmpkt_wesp_t_wesp_iv_get,
+};
+
+bcmpkt_flex_field_set_f bcm56780_a0_ina_2_6_11_0_wesp_t_fset[BCM56780_A0_INA_2_6_11_0_BCMPKT_WESP_T_FID_COUNT] = {
+    bcmpkt_wesp_t_flags_set,
+    bcmpkt_wesp_t_header_len_set,
+    bcmpkt_wesp_t_next_header_set,
+    bcmpkt_wesp_t_seq_num_set,
+    bcmpkt_wesp_t_spi_set,
+    bcmpkt_wesp_t_trailer_len_set,
+    bcmpkt_wesp_t_wesp_iv_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56780_a0_ina_2_6_11_0_wesp_t_field_data[] = {
+    BCM56780_A0_INA_2_6_11_0_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56780_a0_ina_2_6_11_0_wesp_t_field_info = {
+    .num_fields = BCM56780_A0_INA_2_6_11_0_BCMPKT_WESP_T_FID_COUNT,
+    .info = bcm56780_a0_ina_2_6_11_0_wesp_t_field_data,
+};
+
+static bcmpkt_flex_pmd_info_t bcm56780_a0_ina_2_6_11_0_flexhdr_info_list[BCM56780_A0_INA_2_6_11_0_BCMPKT_FLEXHDR_COUNT] = {
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_ina_2_6_11_0_arp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_ina_2_6_11_0_arp_t_fget,
+        .flex_fset = bcm56780_a0_ina_2_6_11_0_arp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_ina_2_6_11_0_authen_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_ina_2_6_11_0_authen_t_fget,
+        .flex_fset = bcm56780_a0_ina_2_6_11_0_authen_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_ina_2_6_11_0_bfd_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_ina_2_6_11_0_bfd_t_fget,
+        .flex_fset = bcm56780_a0_ina_2_6_11_0_bfd_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_ina_2_6_11_0_cntag_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_ina_2_6_11_0_cntag_t_fget,
+        .flex_fset = bcm56780_a0_ina_2_6_11_0_cntag_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_ina_2_6_11_0_cpu_composites_0_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_ina_2_6_11_0_cpu_composites_0_t_fget,
+        .flex_fset = bcm56780_a0_ina_2_6_11_0_cpu_composites_0_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_ina_2_6_11_0_cpu_composites_1_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_ina_2_6_11_0_cpu_composites_1_t_fget,
+        .flex_fset = bcm56780_a0_ina_2_6_11_0_cpu_composites_1_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_ina_2_6_11_0_dest_option_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_ina_2_6_11_0_dest_option_t_fget,
+        .flex_fset = bcm56780_a0_ina_2_6_11_0_dest_option_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_ina_2_6_11_0_ep_nih_header_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_ina_2_6_11_0_ep_nih_header_t_fget,
+        .flex_fset = bcm56780_a0_ina_2_6_11_0_ep_nih_header_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_ina_2_6_11_0_erspan3_fixed_hdr_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_ina_2_6_11_0_erspan3_fixed_hdr_t_fget,
+        .flex_fset = bcm56780_a0_ina_2_6_11_0_erspan3_fixed_hdr_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_ina_2_6_11_0_erspan3_subhdr_5_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_ina_2_6_11_0_erspan3_subhdr_5_t_fget,
+        .flex_fset = bcm56780_a0_ina_2_6_11_0_erspan3_subhdr_5_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_ina_2_6_11_0_esp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_ina_2_6_11_0_esp_t_fget,
+        .flex_fset = bcm56780_a0_ina_2_6_11_0_esp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_ina_2_6_11_0_etag_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_ina_2_6_11_0_etag_t_fget,
+        .flex_fset = bcm56780_a0_ina_2_6_11_0_etag_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_ina_2_6_11_0_ethertype_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_ina_2_6_11_0_ethertype_t_fget,
+        .flex_fset = bcm56780_a0_ina_2_6_11_0_ethertype_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_ina_2_6_11_0_frag_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_ina_2_6_11_0_frag_t_fget,
+        .flex_fset = bcm56780_a0_ina_2_6_11_0_frag_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_ina_2_6_11_0_generic_loopback_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_ina_2_6_11_0_generic_loopback_t_fget,
+        .flex_fset = bcm56780_a0_ina_2_6_11_0_generic_loopback_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_ina_2_6_11_0_gpe_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_ina_2_6_11_0_gpe_t_fget,
+        .flex_fset = bcm56780_a0_ina_2_6_11_0_gpe_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_ina_2_6_11_0_gre_chksum_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_ina_2_6_11_0_gre_chksum_t_fget,
+        .flex_fset = bcm56780_a0_ina_2_6_11_0_gre_chksum_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_ina_2_6_11_0_gre_key_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_ina_2_6_11_0_gre_key_t_fget,
+        .flex_fset = bcm56780_a0_ina_2_6_11_0_gre_key_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_ina_2_6_11_0_gre_rout_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_ina_2_6_11_0_gre_rout_t_fget,
+        .flex_fset = bcm56780_a0_ina_2_6_11_0_gre_rout_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_ina_2_6_11_0_gre_seq_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_ina_2_6_11_0_gre_seq_t_fget,
+        .flex_fset = bcm56780_a0_ina_2_6_11_0_gre_seq_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_ina_2_6_11_0_gre_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_ina_2_6_11_0_gre_t_fget,
+        .flex_fset = bcm56780_a0_ina_2_6_11_0_gre_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_ina_2_6_11_0_hg3_base_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_ina_2_6_11_0_hg3_base_t_fget,
+        .flex_fset = bcm56780_a0_ina_2_6_11_0_hg3_base_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_ina_2_6_11_0_hg3_extension_0_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_ina_2_6_11_0_hg3_extension_0_t_fget,
+        .flex_fset = bcm56780_a0_ina_2_6_11_0_hg3_extension_0_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_ina_2_6_11_0_hop_by_hop_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_ina_2_6_11_0_hop_by_hop_t_fget,
+        .flex_fset = bcm56780_a0_ina_2_6_11_0_hop_by_hop_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_ina_2_6_11_0_icmp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_ina_2_6_11_0_icmp_t_fget,
+        .flex_fset = bcm56780_a0_ina_2_6_11_0_icmp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_ina_2_6_11_0_ifa_1_raw_hdr_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_ina_2_6_11_0_ifa_1_raw_hdr_t_fget,
+        .flex_fset = bcm56780_a0_ina_2_6_11_0_ifa_1_raw_hdr_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_ina_2_6_11_0_ifa_header_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_ina_2_6_11_0_ifa_header_t_fget,
+        .flex_fset = bcm56780_a0_ina_2_6_11_0_ifa_header_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_ina_2_6_11_0_igmp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_ina_2_6_11_0_igmp_t_fget,
+        .flex_fset = bcm56780_a0_ina_2_6_11_0_igmp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_ina_2_6_11_0_ipfix_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_ina_2_6_11_0_ipfix_t_fget,
+        .flex_fset = bcm56780_a0_ina_2_6_11_0_ipfix_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_ina_2_6_11_0_ipv4_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_ina_2_6_11_0_ipv4_t_fget,
+        .flex_fset = bcm56780_a0_ina_2_6_11_0_ipv4_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_ina_2_6_11_0_ipv6_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_ina_2_6_11_0_ipv6_t_fget,
+        .flex_fset = bcm56780_a0_ina_2_6_11_0_ipv6_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_ina_2_6_11_0_l2_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_ina_2_6_11_0_l2_t_fget,
+        .flex_fset = bcm56780_a0_ina_2_6_11_0_l2_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_ina_2_6_11_0_mirror_erspan_sn_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_ina_2_6_11_0_mirror_erspan_sn_t_fget,
+        .flex_fset = bcm56780_a0_ina_2_6_11_0_mirror_erspan_sn_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_ina_2_6_11_0_mirror_transport_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_ina_2_6_11_0_mirror_transport_t_fget,
+        .flex_fset = bcm56780_a0_ina_2_6_11_0_mirror_transport_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_ina_2_6_11_0_mpls_ach_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_ina_2_6_11_0_mpls_ach_t_fget,
+        .flex_fset = bcm56780_a0_ina_2_6_11_0_mpls_ach_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_ina_2_6_11_0_mpls_bv_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_ina_2_6_11_0_mpls_bv_t_fget,
+        .flex_fset = bcm56780_a0_ina_2_6_11_0_mpls_bv_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_ina_2_6_11_0_mpls_cw_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_ina_2_6_11_0_mpls_cw_t_fget,
+        .flex_fset = bcm56780_a0_ina_2_6_11_0_mpls_cw_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_ina_2_6_11_0_mpls_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_ina_2_6_11_0_mpls_t_fget,
+        .flex_fset = bcm56780_a0_ina_2_6_11_0_mpls_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_ina_2_6_11_0_p_1588_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_ina_2_6_11_0_p_1588_t_fget,
+        .flex_fset = bcm56780_a0_ina_2_6_11_0_p_1588_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_ina_2_6_11_0_prog_ext_hdr_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_ina_2_6_11_0_prog_ext_hdr_t_fget,
+        .flex_fset = bcm56780_a0_ina_2_6_11_0_prog_ext_hdr_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_ina_2_6_11_0_psamp_0_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_ina_2_6_11_0_psamp_0_t_fget,
+        .flex_fset = bcm56780_a0_ina_2_6_11_0_psamp_0_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_ina_2_6_11_0_psamp_1_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_ina_2_6_11_0_psamp_1_t_fget,
+        .flex_fset = bcm56780_a0_ina_2_6_11_0_psamp_1_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_ina_2_6_11_0_psamp_mirror_on_drop_0_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_ina_2_6_11_0_psamp_mirror_on_drop_0_t_fget,
+        .flex_fset = bcm56780_a0_ina_2_6_11_0_psamp_mirror_on_drop_0_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_ina_2_6_11_0_psamp_mirror_on_drop_1_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_ina_2_6_11_0_psamp_mirror_on_drop_1_t_fget,
+        .flex_fset = bcm56780_a0_ina_2_6_11_0_psamp_mirror_on_drop_1_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_ina_2_6_11_0_psamp_mirror_on_drop_2_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_ina_2_6_11_0_psamp_mirror_on_drop_2_t_fget,
+        .flex_fset = bcm56780_a0_ina_2_6_11_0_psamp_mirror_on_drop_2_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_ina_2_6_11_0_rarp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_ina_2_6_11_0_rarp_t_fget,
+        .flex_fset = bcm56780_a0_ina_2_6_11_0_rarp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_ina_2_6_11_0_routing_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_ina_2_6_11_0_routing_t_fget,
+        .flex_fset = bcm56780_a0_ina_2_6_11_0_routing_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_ina_2_6_11_0_rspan_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_ina_2_6_11_0_rspan_t_fget,
+        .flex_fset = bcm56780_a0_ina_2_6_11_0_rspan_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_ina_2_6_11_0_sflow_shim_0_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_ina_2_6_11_0_sflow_shim_0_t_fget,
+        .flex_fset = bcm56780_a0_ina_2_6_11_0_sflow_shim_0_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_ina_2_6_11_0_sflow_shim_1_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_ina_2_6_11_0_sflow_shim_1_t_fget,
+        .flex_fset = bcm56780_a0_ina_2_6_11_0_sflow_shim_1_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_ina_2_6_11_0_sflow_shim_2_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_ina_2_6_11_0_sflow_shim_2_t_fget,
+        .flex_fset = bcm56780_a0_ina_2_6_11_0_sflow_shim_2_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_ina_2_6_11_0_snap_llc_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_ina_2_6_11_0_snap_llc_t_fget,
+        .flex_fset = bcm56780_a0_ina_2_6_11_0_snap_llc_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_ina_2_6_11_0_tcp_first_4bytes_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_ina_2_6_11_0_tcp_first_4bytes_t_fget,
+        .flex_fset = bcm56780_a0_ina_2_6_11_0_tcp_first_4bytes_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_ina_2_6_11_0_tcp_last_16bytes_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_ina_2_6_11_0_tcp_last_16bytes_t_fget,
+        .flex_fset = bcm56780_a0_ina_2_6_11_0_tcp_last_16bytes_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_ina_2_6_11_0_udp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_ina_2_6_11_0_udp_t_fget,
+        .flex_fset = bcm56780_a0_ina_2_6_11_0_udp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_ina_2_6_11_0_unknown_l3_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_ina_2_6_11_0_unknown_l3_t_fget,
+        .flex_fset = bcm56780_a0_ina_2_6_11_0_unknown_l3_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_ina_2_6_11_0_unknown_l4_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_ina_2_6_11_0_unknown_l4_t_fget,
+        .flex_fset = bcm56780_a0_ina_2_6_11_0_unknown_l4_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_ina_2_6_11_0_unknown_l5_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_ina_2_6_11_0_unknown_l5_t_fget,
+        .flex_fset = bcm56780_a0_ina_2_6_11_0_unknown_l5_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_ina_2_6_11_0_vlan_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_ina_2_6_11_0_vlan_t_fget,
+        .flex_fset = bcm56780_a0_ina_2_6_11_0_vlan_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_ina_2_6_11_0_vntag_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_ina_2_6_11_0_vntag_t_fget,
+        .flex_fset = bcm56780_a0_ina_2_6_11_0_vntag_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_ina_2_6_11_0_vxlan_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_ina_2_6_11_0_vxlan_t_fget,
+        .flex_fset = bcm56780_a0_ina_2_6_11_0_vxlan_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_ina_2_6_11_0_wesp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56780_a0_ina_2_6_11_0_wesp_t_fget,
+        .flex_fset = bcm56780_a0_ina_2_6_11_0_wesp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56780_a0_ina_2_6_11_0_rxpmd_flex_field_info,
+        .reasons_info = &bcm56780_a0_ina_2_6_11_0_rxpmd_flex_reasons_info,
+        .flex_common_fget = bcm56780_a0_rxpmd_flex_fget,
+        .flex_common_fset = bcm56780_a0_rxpmd_flex_fset,
+    },
+};
+
+static shr_enum_map_t bcm56780_a0_ina_2_6_11_0_flexhdr_id_map[] = {
+    BCM56780_A0_INA_2_6_11_0_BCMPKT_FLEXHDR_NAME_MAP_INIT
+};
+
+shr_enum_map_t * bcm56780_a0_ina_2_6_11_0_flexhdr_map_get(void)
+{
+    return bcm56780_a0_ina_2_6_11_0_flexhdr_id_map;
+}
+
+bcmpkt_flex_pmd_info_t * bcm56780_a0_ina_2_6_11_0_flex_pmd_info_get(uint32_t hid)
+{
+    if (hid >= BCM56780_A0_INA_2_6_11_0_BCMPKT_FLEXHDR_COUNT) {
+        return NULL;
+    }
+
+    return &bcm56780_a0_ina_2_6_11_0_flexhdr_info_list[hid];
+}
+
+int bcm56780_a0_ina_2_6_11_0_flexhdr_variant_support_map[BCMPKT_PMD_COUNT] = {
+    14,
+    21,
+    22,
+    62,
+};
\ No newline at end of file
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_bcmpkt_rxpmd_match_id.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_bcmpkt_rxpmd_match_id.c
new file mode 100644
index 000000000..6b99aee82
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_bcmpkt_rxpmd_match_id.c
@@ -0,0 +1,1108 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) bcm56880_a0_cna_6_5_29_sf_match_id_info.yml
+ * for device bcm56880_a0 and variant cna_6_5_29.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+
+#include <bcmpkt/bcmpkt_rxpmd_match_id.h>
+#include <bcmpkt/xfcr/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_bcmpkt_rxpmd_match_id_defs.h>
+
+
+static bcmpkt_rxpmd_match_id_db_t
+bcm56880_a0_cna_6_5_29_rxpmd_match_id_db[BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_COUNT] = {
+    {
+        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_ITAG",
+        .match        = 0x2,
+        .match_mask   = 0x2,
+        .match_maxbit = 13,
+        .match_minbit = 11,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 37,
+        .pminbit      = 35,
+
+    },
+    {
+        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_L2",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 13,
+        .match_minbit = 11,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 37,
+        .pminbit      = 35,
+
+    },
+    {
+        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x7,
+        .match_maxbit = 13,
+        .match_minbit = 11,
+        .maxbit       = 2,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 37,
+        .pminbit      = 35,
+
+    },
+    {
+        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_OTAG",
+        .match        = 0x4,
+        .match_mask   = 0x4,
+        .match_maxbit = 13,
+        .match_minbit = 11,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 37,
+        .pminbit      = 35,
+
+    },
+    {
+        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ARP",
+        .match        = 0x20,
+        .match_mask   = 0x66,
+        .match_maxbit = 20,
+        .match_minbit = 14,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 20,
+        .match_minbit = 14,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ICMP",
+        .match        = 0x40,
+        .match_mask   = 0x66,
+        .match_maxbit = 20,
+        .match_minbit = 14,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x2,
+        .pmaxbit      = 55,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IPV4",
+        .match        = 0x8,
+        .match_mask   = 0x18,
+        .match_maxbit = 20,
+        .match_minbit = 14,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IPV6",
+        .match        = 0x10,
+        .match_mask   = 0x18,
+        .match_maxbit = 20,
+        .match_minbit = 14,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x2,
+        .pmaxbit      = 55,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x7f,
+        .match_maxbit = 20,
+        .match_minbit = 14,
+        .maxbit       = 6,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 55,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_RARP",
+        .match        = 0x2,
+        .match_mask   = 0x6,
+        .match_maxbit = 20,
+        .match_minbit = 14,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES",
+        .match        = 0x4,
+        .match_mask   = 0x6,
+        .match_maxbit = 20,
+        .match_minbit = 14,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x2,
+        .pmaxbit      = 55,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES",
+        .match        = 0x24,
+        .match_mask   = 0x66,
+        .match_maxbit = 20,
+        .match_minbit = 14,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UDP",
+        .match        = 0x6,
+        .match_mask   = 0x6,
+        .match_maxbit = 20,
+        .match_minbit = 14,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x3,
+        .pmaxbit      = 55,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3",
+        .match        = 0x18,
+        .match_mask   = 0x18,
+        .match_maxbit = 20,
+        .match_minbit = 14,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x3,
+        .pmaxbit      = 55,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4",
+        .match        = 0x60,
+        .match_mask   = 0x60,
+        .match_maxbit = 20,
+        .match_minbit = 14,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x3,
+        .pmaxbit      = 55,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5",
+        .match        = 0x46,
+        .match_mask   = 0x66,
+        .match_maxbit = 20,
+        .match_minbit = 14,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x2,
+        .pmaxbit      = 55,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_VXLAN",
+        .match        = 0x26,
+        .match_mask   = 0x66,
+        .match_maxbit = 20,
+        .match_minbit = 14,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK */
+        .name         = "EGRESS_PKT_SYS_HDR_LOOPBACK",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 0,
+        .match_minbit = 0,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 0,
+        .pminbit      = 0,
+
+    },
+    {
+        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE */
+        .name         = "EGRESS_PKT_SYS_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x1,
+        .match_maxbit = 0,
+        .match_minbit = 0,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 0,
+        .pminbit      = 0,
+
+    },
+    {
+        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_ITAG",
+        .match        = 0x2,
+        .match_mask   = 0x2,
+        .match_maxbit = 3,
+        .match_minbit = 1,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 9,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_L2",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 3,
+        .match_minbit = 1,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 9,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x7,
+        .match_maxbit = 3,
+        .match_minbit = 1,
+        .maxbit       = 2,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 9,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_OTAG",
+        .match        = 0x4,
+        .match_mask   = 0x4,
+        .match_maxbit = 3,
+        .match_minbit = 1,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 9,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP",
+        .match        = 0x20,
+        .match_mask   = 0x66,
+        .match_maxbit = 10,
+        .match_minbit = 4,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 27,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 10,
+        .match_minbit = 4,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 27,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP",
+        .match        = 0x40,
+        .match_mask   = 0x66,
+        .match_maxbit = 10,
+        .match_minbit = 4,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x2,
+        .pmaxbit      = 27,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4",
+        .match        = 0x8,
+        .match_mask   = 0x18,
+        .match_maxbit = 10,
+        .match_minbit = 4,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 27,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6",
+        .match        = 0x10,
+        .match_mask   = 0x18,
+        .match_maxbit = 10,
+        .match_minbit = 4,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x2,
+        .pmaxbit      = 27,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x7f,
+        .match_maxbit = 10,
+        .match_minbit = 4,
+        .maxbit       = 6,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 27,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP",
+        .match        = 0x2,
+        .match_mask   = 0x6,
+        .match_maxbit = 10,
+        .match_minbit = 4,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 27,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES",
+        .match        = 0x4,
+        .match_mask   = 0x6,
+        .match_maxbit = 10,
+        .match_minbit = 4,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x2,
+        .pmaxbit      = 27,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES",
+        .match        = 0x24,
+        .match_mask   = 0x66,
+        .match_maxbit = 10,
+        .match_minbit = 4,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 27,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP",
+        .match        = 0x6,
+        .match_mask   = 0x6,
+        .match_maxbit = 10,
+        .match_minbit = 4,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x3,
+        .pmaxbit      = 27,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3",
+        .match        = 0x18,
+        .match_mask   = 0x18,
+        .match_maxbit = 10,
+        .match_minbit = 4,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x3,
+        .pmaxbit      = 27,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4",
+        .match        = 0x60,
+        .match_mask   = 0x60,
+        .match_maxbit = 10,
+        .match_minbit = 4,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x3,
+        .pmaxbit      = 27,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5",
+        .match        = 0x46,
+        .match_mask   = 0x66,
+        .match_maxbit = 10,
+        .match_minbit = 4,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x2,
+        .pmaxbit      = 27,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN",
+        .match        = 0x26,
+        .match_mask   = 0x66,
+        .match_maxbit = 10,
+        .match_minbit = 4,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 27,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_ITAG",
+        .match        = 0x2,
+        .match_mask   = 0x2,
+        .match_maxbit = 13,
+        .match_minbit = 11,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 13,
+        .pminbit      = 11,
+
+    },
+    {
+        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_L2",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 13,
+        .match_minbit = 11,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 13,
+        .pminbit      = 11,
+
+    },
+    {
+        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x7,
+        .match_maxbit = 13,
+        .match_minbit = 11,
+        .maxbit       = 2,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 13,
+        .pminbit      = 11,
+
+    },
+    {
+        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_OTAG",
+        .match        = 0x4,
+        .match_mask   = 0x4,
+        .match_maxbit = 13,
+        .match_minbit = 11,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 13,
+        .pminbit      = 11,
+
+    },
+    {
+        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ARP",
+        .match        = 0x20,
+        .match_mask   = 0x66,
+        .match_maxbit = 20,
+        .match_minbit = 14,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 20,
+        .pminbit      = 14,
+
+    },
+    {
+        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 20,
+        .match_minbit = 14,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 20,
+        .pminbit      = 14,
+
+    },
+    {
+        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ICMP",
+        .match        = 0x40,
+        .match_mask   = 0x66,
+        .match_maxbit = 20,
+        .match_minbit = 14,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x2,
+        .pmaxbit      = 20,
+        .pminbit      = 14,
+
+    },
+    {
+        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IPV4",
+        .match        = 0x8,
+        .match_mask   = 0x18,
+        .match_maxbit = 20,
+        .match_minbit = 14,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 20,
+        .pminbit      = 14,
+
+    },
+    {
+        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IPV6",
+        .match        = 0x10,
+        .match_mask   = 0x18,
+        .match_maxbit = 20,
+        .match_minbit = 14,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x2,
+        .pmaxbit      = 20,
+        .pminbit      = 14,
+
+    },
+    {
+        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x7f,
+        .match_maxbit = 20,
+        .match_minbit = 14,
+        .maxbit       = 6,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 20,
+        .pminbit      = 14,
+
+    },
+    {
+        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_RARP",
+        .match        = 0x2,
+        .match_mask   = 0x6,
+        .match_maxbit = 20,
+        .match_minbit = 14,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 20,
+        .pminbit      = 14,
+
+    },
+    {
+        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES",
+        .match        = 0x4,
+        .match_mask   = 0x6,
+        .match_maxbit = 20,
+        .match_minbit = 14,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x2,
+        .pmaxbit      = 20,
+        .pminbit      = 14,
+
+    },
+    {
+        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES",
+        .match        = 0x24,
+        .match_mask   = 0x66,
+        .match_maxbit = 20,
+        .match_minbit = 14,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 20,
+        .pminbit      = 14,
+
+    },
+    {
+        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UDP",
+        .match        = 0x6,
+        .match_mask   = 0x6,
+        .match_maxbit = 20,
+        .match_minbit = 14,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x3,
+        .pmaxbit      = 20,
+        .pminbit      = 14,
+
+    },
+    {
+        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3",
+        .match        = 0x18,
+        .match_mask   = 0x18,
+        .match_maxbit = 20,
+        .match_minbit = 14,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x3,
+        .pmaxbit      = 20,
+        .pminbit      = 14,
+
+    },
+    {
+        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4",
+        .match        = 0x60,
+        .match_mask   = 0x60,
+        .match_maxbit = 20,
+        .match_minbit = 14,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x3,
+        .pmaxbit      = 20,
+        .pminbit      = 14,
+
+    },
+    {
+        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5",
+        .match        = 0x46,
+        .match_mask   = 0x66,
+        .match_maxbit = 20,
+        .match_minbit = 14,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x2,
+        .pmaxbit      = 20,
+        .pminbit      = 14,
+
+    },
+    {
+        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_ITAG",
+        .match        = 0x2,
+        .match_mask   = 0x2,
+        .match_maxbit = 3,
+        .match_minbit = 1,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 3,
+        .pminbit      = 1,
+
+    },
+    {
+        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_L2",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 3,
+        .match_minbit = 1,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 3,
+        .pminbit      = 1,
+
+    },
+    {
+        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x7,
+        .match_maxbit = 3,
+        .match_minbit = 1,
+        .maxbit       = 2,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 3,
+        .pminbit      = 1,
+
+    },
+    {
+        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_OTAG",
+        .match        = 0x4,
+        .match_mask   = 0x4,
+        .match_maxbit = 3,
+        .match_minbit = 1,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 3,
+        .pminbit      = 1,
+
+    },
+    {
+        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ARP",
+        .match        = 0x20,
+        .match_mask   = 0x66,
+        .match_maxbit = 10,
+        .match_minbit = 4,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 10,
+        .pminbit      = 4,
+
+    },
+    {
+        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 10,
+        .match_minbit = 4,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 10,
+        .pminbit      = 4,
+
+    },
+    {
+        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ICMP",
+        .match        = 0x40,
+        .match_mask   = 0x66,
+        .match_maxbit = 10,
+        .match_minbit = 4,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x2,
+        .pmaxbit      = 10,
+        .pminbit      = 4,
+
+    },
+    {
+        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV4",
+        .match        = 0x8,
+        .match_mask   = 0x18,
+        .match_maxbit = 10,
+        .match_minbit = 4,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 10,
+        .pminbit      = 4,
+
+    },
+    {
+        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV6",
+        .match        = 0x10,
+        .match_mask   = 0x18,
+        .match_maxbit = 10,
+        .match_minbit = 4,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x2,
+        .pmaxbit      = 10,
+        .pminbit      = 4,
+
+    },
+    {
+        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x7f,
+        .match_maxbit = 10,
+        .match_minbit = 4,
+        .maxbit       = 6,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 10,
+        .pminbit      = 4,
+
+    },
+    {
+        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_RARP",
+        .match        = 0x2,
+        .match_mask   = 0x6,
+        .match_maxbit = 10,
+        .match_minbit = 4,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 10,
+        .pminbit      = 4,
+
+    },
+    {
+        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES",
+        .match        = 0x4,
+        .match_mask   = 0x6,
+        .match_maxbit = 10,
+        .match_minbit = 4,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x2,
+        .pmaxbit      = 10,
+        .pminbit      = 4,
+
+    },
+    {
+        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES",
+        .match        = 0x24,
+        .match_mask   = 0x66,
+        .match_maxbit = 10,
+        .match_minbit = 4,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 10,
+        .pminbit      = 4,
+
+    },
+    {
+        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UDP",
+        .match        = 0x6,
+        .match_mask   = 0x6,
+        .match_maxbit = 10,
+        .match_minbit = 4,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x3,
+        .pmaxbit      = 10,
+        .pminbit      = 4,
+
+    },
+    {
+        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3",
+        .match        = 0x18,
+        .match_mask   = 0x18,
+        .match_maxbit = 10,
+        .match_minbit = 4,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x3,
+        .pmaxbit      = 10,
+        .pminbit      = 4,
+
+    },
+    {
+        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4",
+        .match        = 0x60,
+        .match_mask   = 0x60,
+        .match_maxbit = 10,
+        .match_minbit = 4,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x3,
+        .pmaxbit      = 10,
+        .pminbit      = 4,
+
+    },
+    {
+        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5",
+        .match        = 0x46,
+        .match_mask   = 0x66,
+        .match_maxbit = 10,
+        .match_minbit = 4,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x2,
+        .pmaxbit      = 10,
+        .pminbit      = 4,
+
+    },
+    {
+        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN",
+        .match        = 0x26,
+        .match_mask   = 0x66,
+        .match_maxbit = 10,
+        .match_minbit = 4,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 10,
+        .pminbit      = 4,
+
+    },
+    {
+        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK */
+        .name         = "INGRESS_PKT_SYS_HDR_LOOPBACK",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 0,
+        .match_minbit = 0,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 0,
+        .pminbit      = 0,
+
+    },
+    {
+        /* BCM56880_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE */
+        .name         = "INGRESS_PKT_SYS_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x1,
+        .match_maxbit = 0,
+        .match_minbit = 0,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 0,
+        .pminbit      = 0,
+
+    },
+};
+
+static bcmpkt_rxpmd_match_id_db_info_t bcm56880_a0_cna_6_5_29_rxpmd_match_id_db_info = {
+    .num_entries = 75,
+    .db = bcm56880_a0_cna_6_5_29_rxpmd_match_id_db
+};
+bcmpkt_rxpmd_match_id_db_info_t * bcm56880_a0_cna_6_5_29_rxpmd_match_id_db_info_get(void) {
+    return &bcm56880_a0_cna_6_5_29_rxpmd_match_id_db_info;
+}
+
+static shr_enum_map_t bcm56880_a0_cna_6_5_29_rxpmd_match_id_map[] = {
+    BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_rxpmd_match_id_map_info_t bcm56880_a0_cna_6_5_29_rxpmd_match_id_map_info = {
+    .num_entries = 75,
+    .map = bcm56880_a0_cna_6_5_29_rxpmd_match_id_map
+};
+
+bcmpkt_rxpmd_match_id_map_info_t * bcm56880_a0_cna_6_5_29_rxpmd_match_id_map_info_get(void) {
+    return &bcm56880_a0_cna_6_5_29_rxpmd_match_id_map_info;
+}
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_pkt_flexhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_pkt_flexhdr.c
new file mode 100644
index 000000000..a5b46c58a
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_pkt_flexhdr.c
@@ -0,0 +1,3453 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) map.yml
+ * for device bcm56880_a0 and variant cna_6_5_29.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#include <sal/sal_types.h>
+#include <shr/shr_error.h>
+#include <bcmpkt/bcmpkt_flexhdr.h>
+#include <bcmpkt/chip/bcm56880_a0/bcmpkt_bcm56880_a0_rxpmd.h>
+#include <bcmpkt/xfcr/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_bcmpkt_flexhdr.h>
+#include <bcmpkt/xfcr/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_bcmpkt_flexhdr_data.h>
+#include <bcmpkt/xfcr/bcm56880_a0/cna_6_5_29/bcm56880_a0_cna_6_5_29_bcmpkt_rxpmd_flex_data.h>
+
+#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1)
+#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l))
+#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s)))
+#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s)))
+
+static void bcm56880_a0_cna_6_5_29_rxpmd_flex_reason_decode(uint32_t *data, bcmpkt_bitmap_t *reasons)
+{
+    uint32_t *reason = data + 0;
+
+    if (reason[12] & (0x1 << 0)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU);
+    }
+    if (reason[12] & (0x1 << 1)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS);
+    }
+    if (reason[12] & (0x1 << 2)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE);
+    }
+    if (reason[12] & (0x1 << 3)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD);
+    }
+    if (reason[12] & (0x1 << 4)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST);
+    }
+    if (reason[12] & (0x1 << 5)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED);
+    }
+    if (reason[12] & (0x1 << 6)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT);
+    }
+    if (reason[12] & (0x1 << 7)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED);
+    }
+    if (reason[12] & (0x1 << 8)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED);
+    }
+    if (reason[12] & (0x1 << 9)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS);
+    }
+    if (reason[12] & (0x1 << 10)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP);
+    }
+    if (reason[12] & (0x1 << 11)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS);
+    }
+    if (reason[12] & (0x1 << 12)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP);
+    }
+    if (reason[12] & (0x1 << 13)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR);
+    }
+    if (reason[12] & (0x1 << 14)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR);
+    }
+    if (reason[12] & (0x1 << 16)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL);
+    }
+    if (reason[12] & (0x1 << 17)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_VFP);
+    }
+    if (reason[12] & (0x1 << 18)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IFP);
+    }
+    if (reason[12] & (0x1 << 19)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IFP_METER);
+    }
+    if (reason[12] & (0x1 << 23)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IVXLT);
+    }
+    if (reason[11] & (0x1 << 15)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP);
+    }
+}
+
+static void bcm56880_a0_cna_6_5_29_rxpmd_flex_reason_encode(bcmpkt_bitmap_t *reasons, uint32_t *data)
+{
+    uint32_t *reason = data + 0;
+
+    reason[12] = 0;
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU)) {
+        reason[12] |= (0x1 << 0);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS)) {
+        reason[12] |= (0x1 << 1);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE)) {
+        reason[12] |= (0x1 << 2);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD)) {
+        reason[12] |= (0x1 << 3);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST)) {
+        reason[12] |= (0x1 << 4);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED)) {
+        reason[12] |= (0x1 << 5);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT)) {
+        reason[12] |= (0x1 << 6);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED)) {
+        reason[12] |= (0x1 << 7);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED)) {
+        reason[12] |= (0x1 << 8);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS)) {
+        reason[12] |= (0x1 << 9);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP)) {
+        reason[12] |= (0x1 << 10);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS)) {
+        reason[12] |= (0x1 << 11);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP)) {
+        reason[12] |= (0x1 << 12);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR)) {
+        reason[12] |= (0x1 << 13);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR)) {
+        reason[12] |= (0x1 << 14);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL)) {
+        reason[12] |= (0x1 << 16);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_VFP)) {
+        reason[12] |= (0x1 << 17);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IFP)) {
+        reason[12] |= (0x1 << 18);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IFP_METER)) {
+        reason[12] |= (0x1 << 19);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IVXLT)) {
+        reason[12] |= (0x1 << 23);
+    }
+    reason[11] = 0;
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP)) {
+        reason[11] |= (0x1 << 15);
+    }
+}
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_cna_6_5_29_rxpmd_flex_field_data[] = {
+    {
+        .name = "DROP_CODE_15_0",
+        .fid = BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 48, 63 }, /* Profile 2. */
+            { 48, 63 }, /* Profile 3. */
+        },
+        .profile_cnt = 4,
+    },
+    {
+        .name = "DVP_15_0",
+        .fid = BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_DVP_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 192, 207 }, /* Profile 2. */
+            { 176, 191 }, /* Profile 3. */
+        },
+        .profile_cnt = 4,
+    },
+    {
+        .name = "EFFECTIVE_TTL_7_0",
+        .fid = BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 224, 231 }, /* Profile 2. */
+            { 208, 215 }, /* Profile 3. */
+        },
+        .profile_cnt = 4,
+    },
+    {
+        .name = "ENTROPY_LABEL_HIGH_3_0",
+        .fid = BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 376, 379 }, /* Profile 2. */
+            { 344, 347 }, /* Profile 3. */
+        },
+        .profile_cnt = 4,
+    },
+    {
+        .name = "ENTROPY_LABEL_LOW_15_0",
+        .fid = BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 112, 127 }, /* Profile 2. */
+            { 112, 127 }, /* Profile 3. */
+        },
+        .profile_cnt = 4,
+    },
+    {
+        .name = "ERSPAN3_GBP_SID_15_0",
+        .fid = BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_ERSPAN3_GBP_SID_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 96, 111 }, /* Profile 2. */
+            { 96, 111 }, /* Profile 3. */
+        },
+        .profile_cnt = 4,
+    },
+    {
+        .name = "EVENT_TRACE_VECTOR_31_0",
+        .fid = BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 0, 31 }, /* Profile 2. */
+            { 0, 31 }, /* Profile 3. */
+        },
+        .profile_cnt = 4,
+    },
+    {
+        .name = "EVENT_TRACE_VECTOR_47_32",
+        .fid = BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 32, 47 }, /* Profile 2. */
+            { 32, 47 }, /* Profile 3. */
+        },
+        .profile_cnt = 4,
+    },
+    {
+        .name = "I2E_CLASS_ID_15_0",
+        .fid = BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 288, 303 }, /* Profile 2. */
+            { 272, 287 }, /* Profile 3. */
+        },
+        .profile_cnt = 4,
+    },
+    {
+        .name = "INGRESS_PP_PORT_7_0",
+        .fid = BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 208, 215 }, /* Profile 2. */
+            { 192, 199 }, /* Profile 3. */
+        },
+        .profile_cnt = 4,
+    },
+    {
+        .name = "INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0",
+        .fid = BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 128, 143 }, /* Profile 2. */
+            { 128, 143 }, /* Profile 3. */
+        },
+        .profile_cnt = 4,
+    },
+    {
+        .name = "INGRESS_QOS_REMARK_CTRL_3_0",
+        .fid = BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 368, 371 }, /* Profile 2. */
+            { 336, 339 }, /* Profile 3. */
+        },
+        .profile_cnt = 4,
+    },
+    {
+        .name = "INT_PRI_3_0",
+        .fid = BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_INT_PRI_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 380, 383 }, /* Profile 2. */
+            { 348, 351 }, /* Profile 3. */
+        },
+        .profile_cnt = 4,
+    },
+    {
+        .name = "L2_IIF_10_0",
+        .fid = BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_L2_IIF_10_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 272, 282 }, /* Profile 2. */
+            { 256, 266 }, /* Profile 3. */
+        },
+        .profile_cnt = 4,
+    },
+    {
+        .name = "L2_OIF_10_0",
+        .fid = BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_L2_OIF_10_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 160, 170 }, /* Profile 2. */
+            { 160, 170 }, /* Profile 3. */
+        },
+        .profile_cnt = 4,
+    },
+    {
+        .name = "L2_TUNNEL_SVP_15_0",
+        .fid = BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_L2_TUNNEL_SVP_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 256, 271 }, /* Profile 2. */
+            { 240, 255 }, /* Profile 3. */
+        },
+        .profile_cnt = 4,
+    },
+    {
+        .name = "L3_IIF_13_0",
+        .fid = BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_L3_IIF_13_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 304, 317 }, /* Profile 2. */
+            { 288, 301 }, /* Profile 3. */
+        },
+        .profile_cnt = 4,
+    },
+    {
+        .name = "L3_OIF_1_13_0",
+        .fid = BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 176, 189 }, /* Profile 2. */
+        },
+        .profile_cnt = 3,
+    },
+    {
+        .name = "NHOP_2_OR_ECMP_GROUP_INDEX_1_14_0",
+        .fid = BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_14_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 80, 94 }, /* Profile 2. */
+            { 80, 94 }, /* Profile 3. */
+        },
+        .profile_cnt = 4,
+    },
+    {
+        .name = "NHOP_INDEX_1_14_0",
+        .fid = BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_14_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 320, 334 }, /* Profile 2. */
+        },
+        .profile_cnt = 3,
+    },
+    {
+        .name = "PARSER_VHLEN_0_15_0",
+        .fid = BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 64, 79 }, /* Profile 2. */
+            { 64, 79 }, /* Profile 3. */
+        },
+        .profile_cnt = 4,
+    },
+    {
+        .name = "PKT_MISC_CTRL_0_3_0",
+        .fid = BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 364, 367 }, /* Profile 2. */
+            { 332, 335 }, /* Profile 3. */
+        },
+        .profile_cnt = 4,
+    },
+    {
+        .name = "SVP_NETWORK_GROUP_BITMAP_3_0",
+        .fid = BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 356, 359 }, /* Profile 2. */
+            { 324, 327 }, /* Profile 3. */
+        },
+        .profile_cnt = 4,
+    },
+    {
+        .name = "SYSTEM_DESTINATION_15_0",
+        .fid = BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 336, 351 }, /* Profile 2. */
+            { 304, 319 }, /* Profile 3. */
+        },
+        .profile_cnt = 4,
+    },
+    {
+        .name = "SYSTEM_OPCODE_3_0",
+        .fid = BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 372, 375 }, /* Profile 2. */
+            { 340, 343 }, /* Profile 3. */
+        },
+        .profile_cnt = 4,
+    },
+    {
+        .name = "SYSTEM_SOURCE_15_0",
+        .fid = BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 240, 255 }, /* Profile 2. */
+            { 224, 239 }, /* Profile 3. */
+        },
+        .profile_cnt = 4,
+    },
+    {
+        .name = "TAG_ACTION_CTRL_1_0",
+        .fid = BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_TAG_ACTION_CTRL_1_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 352, 353 }, /* Profile 2. */
+            { 320, 321 }, /* Profile 3. */
+        },
+        .profile_cnt = 4,
+    },
+    {
+        .name = "TUNNEL_PROCESSING_RESULTS_1_3_0",
+        .fid = BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 360, 363 }, /* Profile 2. */
+            { 328, 331 }, /* Profile 3. */
+        },
+        .profile_cnt = 4,
+    },
+    {
+        .name = "VFI_15_0",
+        .fid = BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_VFI_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 144, 159 }, /* Profile 2. */
+            { 144, 159 }, /* Profile 3. */
+        },
+        .profile_cnt = 4,
+    },
+};static bcmpkt_flex_field_info_t bcm56880_a0_cna_6_5_29_rxpmd_flex_field_info = {
+    .num_fields = BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_FID_COUNT,
+    .info = bcm56880_a0_cna_6_5_29_rxpmd_flex_field_data,
+};
+
+static shr_enum_map_t bcm56880_a0_cna_6_5_29_rxpmd_flex_reason_names[] = {
+    BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_reasons_info_t bcm56880_a0_cna_6_5_29_rxpmd_flex_reasons_info = {
+    .num_reasons = BCM56880_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_COUNT,
+    .reason_names = bcm56880_a0_cna_6_5_29_rxpmd_flex_reason_names,
+    .reason_encode = bcm56880_a0_cna_6_5_29_rxpmd_flex_reason_encode,
+    .reason_decode = bcm56880_a0_cna_6_5_29_rxpmd_flex_reason_decode,
+};
+
+
+static int32_t bcmpkt_arp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_operation_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_operation_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_cna_6_5_29_arp_t_fget[BCM56880_A0_CNA_6_5_29_BCMPKT_ARP_T_FID_COUNT] = {
+    bcmpkt_arp_t_hardware_len_get,
+    bcmpkt_arp_t_hardware_type_get,
+    bcmpkt_arp_t_operation_get,
+    bcmpkt_arp_t_prot_addr_len_get,
+    bcmpkt_arp_t_protocol_type_get,
+    bcmpkt_arp_t_sender_ha_get,
+    bcmpkt_arp_t_sender_ip_get,
+    bcmpkt_arp_t_target_ha_get,
+    bcmpkt_arp_t_target_ip_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_cna_6_5_29_arp_t_fset[BCM56880_A0_CNA_6_5_29_BCMPKT_ARP_T_FID_COUNT] = {
+    bcmpkt_arp_t_hardware_len_set,
+    bcmpkt_arp_t_hardware_type_set,
+    bcmpkt_arp_t_operation_set,
+    bcmpkt_arp_t_prot_addr_len_set,
+    bcmpkt_arp_t_protocol_type_set,
+    bcmpkt_arp_t_sender_ha_set,
+    bcmpkt_arp_t_sender_ip_set,
+    bcmpkt_arp_t_target_ha_set,
+    bcmpkt_arp_t_target_ip_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_cna_6_5_29_arp_t_field_data[] = {
+    BCM56880_A0_CNA_6_5_29_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_cna_6_5_29_arp_t_field_info = {
+    .num_fields = BCM56880_A0_CNA_6_5_29_BCMPKT_ARP_T_FID_COUNT,
+    .info = bcm56880_a0_cna_6_5_29_arp_t_field_data,
+};
+
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_cna_6_5_29_cpu_composites_0_t_fget[BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = {
+    bcmpkt_cpu_composites_0_t_dma_cont0_get,
+    bcmpkt_cpu_composites_0_t_dma_cont1_get,
+    bcmpkt_cpu_composites_0_t_dma_cont2_get,
+    bcmpkt_cpu_composites_0_t_dma_cont3_get,
+    bcmpkt_cpu_composites_0_t_dma_cont4_get,
+    bcmpkt_cpu_composites_0_t_dma_cont5_get,
+    bcmpkt_cpu_composites_0_t_dma_cont6_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_cna_6_5_29_cpu_composites_0_t_fset[BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = {
+    bcmpkt_cpu_composites_0_t_dma_cont0_set,
+    bcmpkt_cpu_composites_0_t_dma_cont1_set,
+    bcmpkt_cpu_composites_0_t_dma_cont2_set,
+    bcmpkt_cpu_composites_0_t_dma_cont3_set,
+    bcmpkt_cpu_composites_0_t_dma_cont4_set,
+    bcmpkt_cpu_composites_0_t_dma_cont5_set,
+    bcmpkt_cpu_composites_0_t_dma_cont6_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_cna_6_5_29_cpu_composites_0_t_field_data[] = {
+    BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_cna_6_5_29_cpu_composites_0_t_field_info = {
+    .num_fields = BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT,
+    .info = bcm56880_a0_cna_6_5_29_cpu_composites_0_t_field_data,
+};
+
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_cna_6_5_29_cpu_composites_1_t_fget[BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = {
+    bcmpkt_cpu_composites_1_t_dma_cont10_get,
+    bcmpkt_cpu_composites_1_t_dma_cont11_get,
+    bcmpkt_cpu_composites_1_t_dma_cont12_get,
+    bcmpkt_cpu_composites_1_t_dma_cont13_get,
+    bcmpkt_cpu_composites_1_t_dma_cont14_get,
+    bcmpkt_cpu_composites_1_t_dma_cont15_get,
+    bcmpkt_cpu_composites_1_t_dma_cont16_get,
+    bcmpkt_cpu_composites_1_t_dma_cont17_get,
+    bcmpkt_cpu_composites_1_t_dma_cont7_get,
+    bcmpkt_cpu_composites_1_t_dma_cont8_get,
+    bcmpkt_cpu_composites_1_t_dma_cont9_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_cna_6_5_29_cpu_composites_1_t_fset[BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = {
+    bcmpkt_cpu_composites_1_t_dma_cont10_set,
+    bcmpkt_cpu_composites_1_t_dma_cont11_set,
+    bcmpkt_cpu_composites_1_t_dma_cont12_set,
+    bcmpkt_cpu_composites_1_t_dma_cont13_set,
+    bcmpkt_cpu_composites_1_t_dma_cont14_set,
+    bcmpkt_cpu_composites_1_t_dma_cont15_set,
+    bcmpkt_cpu_composites_1_t_dma_cont16_set,
+    bcmpkt_cpu_composites_1_t_dma_cont17_set,
+    bcmpkt_cpu_composites_1_t_dma_cont7_set,
+    bcmpkt_cpu_composites_1_t_dma_cont8_set,
+    bcmpkt_cpu_composites_1_t_dma_cont9_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_cna_6_5_29_cpu_composites_1_t_field_data[] = {
+    BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_cna_6_5_29_cpu_composites_1_t_field_info = {
+    .num_fields = BCM56880_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT,
+    .info = bcm56880_a0_cna_6_5_29_cpu_composites_1_t_field_data,
+};
+
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 11, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 11, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 13, 3);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 13, 3, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 10);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 10, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_t_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 10, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_t_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 10, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 12);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 12, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_cna_6_5_29_erspan3_fixed_hdr_t_fget[BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = {
+    bcmpkt_erspan3_fixed_hdr_t_bso_get,
+    bcmpkt_erspan3_fixed_hdr_t_cos_get,
+    bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get,
+    bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get,
+    bcmpkt_erspan3_fixed_hdr_t_session_id_get,
+    bcmpkt_erspan3_fixed_hdr_t_t_get,
+    bcmpkt_erspan3_fixed_hdr_t_timestamp_get,
+    bcmpkt_erspan3_fixed_hdr_t_ver_get,
+    bcmpkt_erspan3_fixed_hdr_t_vlan_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_cna_6_5_29_erspan3_fixed_hdr_t_fset[BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = {
+    bcmpkt_erspan3_fixed_hdr_t_bso_set,
+    bcmpkt_erspan3_fixed_hdr_t_cos_set,
+    bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set,
+    bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set,
+    bcmpkt_erspan3_fixed_hdr_t_session_id_set,
+    bcmpkt_erspan3_fixed_hdr_t_t_set,
+    bcmpkt_erspan3_fixed_hdr_t_timestamp_set,
+    bcmpkt_erspan3_fixed_hdr_t_ver_set,
+    bcmpkt_erspan3_fixed_hdr_t_vlan_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_cna_6_5_29_erspan3_fixed_hdr_t_field_data[] = {
+    BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_cna_6_5_29_erspan3_fixed_hdr_t_field_info = {
+    .num_fields = BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT,
+    .info = bcm56880_a0_cna_6_5_29_erspan3_fixed_hdr_t_field_data,
+};
+
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 26, 6);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 26, 6, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 10);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 10, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_cna_6_5_29_erspan3_subhdr_5_t_fget[BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = {
+    bcmpkt_erspan3_subhdr_5_t_platform_id_get,
+    bcmpkt_erspan3_subhdr_5_t_port_id_get,
+    bcmpkt_erspan3_subhdr_5_t_switch_id_get,
+    bcmpkt_erspan3_subhdr_5_t_timestamp_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_cna_6_5_29_erspan3_subhdr_5_t_fset[BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = {
+    bcmpkt_erspan3_subhdr_5_t_platform_id_set,
+    bcmpkt_erspan3_subhdr_5_t_port_id_set,
+    bcmpkt_erspan3_subhdr_5_t_switch_id_set,
+    bcmpkt_erspan3_subhdr_5_t_timestamp_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_cna_6_5_29_erspan3_subhdr_5_t_field_data[] = {
+    BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_cna_6_5_29_erspan3_subhdr_5_t_field_info = {
+    .num_fields = BCM56880_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT,
+    .info = bcm56880_a0_cna_6_5_29_erspan3_subhdr_5_t_field_data,
+};
+
+
+static int32_t bcmpkt_ethertype_t_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ethertype_t_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_cna_6_5_29_ethertype_t_fget[BCM56880_A0_CNA_6_5_29_BCMPKT_ETHERTYPE_T_FID_COUNT] = {
+    bcmpkt_ethertype_t_type_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_cna_6_5_29_ethertype_t_fset[BCM56880_A0_CNA_6_5_29_BCMPKT_ETHERTYPE_T_FID_COUNT] = {
+    bcmpkt_ethertype_t_type_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_cna_6_5_29_ethertype_t_field_data[] = {
+    BCM56880_A0_CNA_6_5_29_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_cna_6_5_29_ethertype_t_field_info = {
+    .num_fields = BCM56880_A0_CNA_6_5_29_BCMPKT_ETHERTYPE_T_FID_COUNT,
+    .info = bcm56880_a0_cna_6_5_29_ethertype_t_field_data,
+};
+
+
+static int32_t bcmpkt_generic_loopback_t_destination_obj_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_destination_obj_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_destination_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_destination_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_entropy_obj_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_entropy_obj_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_header_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 20, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_header_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 20, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_input_priority_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 12, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_input_priority_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 12, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_interface_ctrl_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 4, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_interface_ctrl_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 4, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_interface_obj_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_interface_obj_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_qos_obj_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_qos_obj_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_reserved_1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_reserved_1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_reserved_2_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_reserved_2_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_source_system_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_source_system_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_start_byte_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_start_byte_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_cna_6_5_29_generic_loopback_t_fget[BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = {
+    bcmpkt_generic_loopback_t_destination_obj_get,
+    bcmpkt_generic_loopback_t_destination_type_get,
+    bcmpkt_generic_loopback_t_entropy_obj_get,
+    bcmpkt_generic_loopback_t_flags_get,
+    bcmpkt_generic_loopback_t_header_type_get,
+    bcmpkt_generic_loopback_t_input_priority_get,
+    bcmpkt_generic_loopback_t_interface_ctrl_get,
+    bcmpkt_generic_loopback_t_interface_obj_get,
+    bcmpkt_generic_loopback_t_processing_ctrl_0_get,
+    bcmpkt_generic_loopback_t_processing_ctrl_1_get,
+    bcmpkt_generic_loopback_t_qos_obj_get,
+    bcmpkt_generic_loopback_t_reserved_1_get,
+    bcmpkt_generic_loopback_t_reserved_2_get,
+    bcmpkt_generic_loopback_t_source_system_port_get,
+    bcmpkt_generic_loopback_t_start_byte_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_cna_6_5_29_generic_loopback_t_fset[BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = {
+    bcmpkt_generic_loopback_t_destination_obj_set,
+    bcmpkt_generic_loopback_t_destination_type_set,
+    bcmpkt_generic_loopback_t_entropy_obj_set,
+    bcmpkt_generic_loopback_t_flags_set,
+    bcmpkt_generic_loopback_t_header_type_set,
+    bcmpkt_generic_loopback_t_input_priority_set,
+    bcmpkt_generic_loopback_t_interface_ctrl_set,
+    bcmpkt_generic_loopback_t_interface_obj_set,
+    bcmpkt_generic_loopback_t_processing_ctrl_0_set,
+    bcmpkt_generic_loopback_t_processing_ctrl_1_set,
+    bcmpkt_generic_loopback_t_qos_obj_set,
+    bcmpkt_generic_loopback_t_reserved_1_set,
+    bcmpkt_generic_loopback_t_reserved_2_set,
+    bcmpkt_generic_loopback_t_source_system_port_set,
+    bcmpkt_generic_loopback_t_start_byte_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_cna_6_5_29_generic_loopback_t_field_data[] = {
+    BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_cna_6_5_29_generic_loopback_t_field_info = {
+    .num_fields = BCM56880_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT,
+    .info = bcm56880_a0_cna_6_5_29_generic_loopback_t_field_data,
+};
+
+
+static int32_t bcmpkt_icmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_icmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_icmp_t_code_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_icmp_t_code_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_icmp_t_icmp_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_icmp_t_icmp_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_cna_6_5_29_icmp_t_fget[BCM56880_A0_CNA_6_5_29_BCMPKT_ICMP_T_FID_COUNT] = {
+    bcmpkt_icmp_t_checksum_get,
+    bcmpkt_icmp_t_code_get,
+    bcmpkt_icmp_t_icmp_type_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_cna_6_5_29_icmp_t_fset[BCM56880_A0_CNA_6_5_29_BCMPKT_ICMP_T_FID_COUNT] = {
+    bcmpkt_icmp_t_checksum_set,
+    bcmpkt_icmp_t_code_set,
+    bcmpkt_icmp_t_icmp_type_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_cna_6_5_29_icmp_t_field_data[] = {
+    BCM56880_A0_CNA_6_5_29_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_cna_6_5_29_icmp_t_field_info = {
+    .num_fields = BCM56880_A0_CNA_6_5_29_BCMPKT_ICMP_T_FID_COUNT,
+    .info = bcm56880_a0_cna_6_5_29_icmp_t_field_data,
+};
+
+
+static int32_t bcmpkt_ipfix_t_export_time_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_export_time_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_obs_domain_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_obs_domain_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_cna_6_5_29_ipfix_t_fget[BCM56880_A0_CNA_6_5_29_BCMPKT_IPFIX_T_FID_COUNT] = {
+    bcmpkt_ipfix_t_export_time_get,
+    bcmpkt_ipfix_t_length_get,
+    bcmpkt_ipfix_t_obs_domain_id_get,
+    bcmpkt_ipfix_t_sequence_num_get,
+    bcmpkt_ipfix_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_cna_6_5_29_ipfix_t_fset[BCM56880_A0_CNA_6_5_29_BCMPKT_IPFIX_T_FID_COUNT] = {
+    bcmpkt_ipfix_t_export_time_set,
+    bcmpkt_ipfix_t_length_set,
+    bcmpkt_ipfix_t_obs_domain_id_set,
+    bcmpkt_ipfix_t_sequence_num_set,
+    bcmpkt_ipfix_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_cna_6_5_29_ipfix_t_field_data[] = {
+    BCM56880_A0_CNA_6_5_29_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_cna_6_5_29_ipfix_t_field_info = {
+    .num_fields = BCM56880_A0_CNA_6_5_29_BCMPKT_IPFIX_T_FID_COUNT,
+    .info = bcm56880_a0_cna_6_5_29_ipfix_t_field_data,
+};
+
+
+static int32_t bcmpkt_ipv4_t_da_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_da_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_flags_frag_offset_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_flags_frag_offset_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_hdr_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_hdr_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_option_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_option_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_protocol_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_protocol_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_sa_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_sa_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_tos_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_tos_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_total_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_total_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_ttl_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_ttl_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_version_hdr_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_version_hdr_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_cna_6_5_29_ipv4_t_fget[BCM56880_A0_CNA_6_5_29_BCMPKT_IPV4_T_FID_COUNT] = {
+    bcmpkt_ipv4_t_da_get,
+    bcmpkt_ipv4_t_flags_frag_offset_get,
+    bcmpkt_ipv4_t_hdr_checksum_get,
+    bcmpkt_ipv4_t_id_get,
+    bcmpkt_ipv4_t_option_get,
+    bcmpkt_ipv4_t_protocol_get,
+    bcmpkt_ipv4_t_sa_get,
+    bcmpkt_ipv4_t_tos_get,
+    bcmpkt_ipv4_t_total_length_get,
+    bcmpkt_ipv4_t_ttl_get,
+    bcmpkt_ipv4_t_version_hdr_len_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_cna_6_5_29_ipv4_t_fset[BCM56880_A0_CNA_6_5_29_BCMPKT_IPV4_T_FID_COUNT] = {
+    bcmpkt_ipv4_t_da_set,
+    bcmpkt_ipv4_t_flags_frag_offset_set,
+    bcmpkt_ipv4_t_hdr_checksum_set,
+    bcmpkt_ipv4_t_id_set,
+    bcmpkt_ipv4_t_option_set,
+    bcmpkt_ipv4_t_protocol_set,
+    bcmpkt_ipv4_t_sa_set,
+    bcmpkt_ipv4_t_tos_set,
+    bcmpkt_ipv4_t_total_length_set,
+    bcmpkt_ipv4_t_ttl_set,
+    bcmpkt_ipv4_t_version_hdr_len_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_cna_6_5_29_ipv4_t_field_data[] = {
+    BCM56880_A0_CNA_6_5_29_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_cna_6_5_29_ipv4_t_field_info = {
+    .num_fields = BCM56880_A0_CNA_6_5_29_BCMPKT_IPV4_T_FID_COUNT,
+    .info = bcm56880_a0_cna_6_5_29_ipv4_t_field_data,
+};
+
+
+static int32_t bcmpkt_ipv6_t_da_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_da_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_flow_label_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 20);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_flow_label_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 20, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_hop_limit_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_hop_limit_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 8, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 8, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_payload_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_payload_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_sa_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_sa_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_traffic_class_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 20, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_traffic_class_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 20, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_cna_6_5_29_ipv6_t_fget[BCM56880_A0_CNA_6_5_29_BCMPKT_IPV6_T_FID_COUNT] = {
+    bcmpkt_ipv6_t_da_get,
+    bcmpkt_ipv6_t_flow_label_get,
+    bcmpkt_ipv6_t_hop_limit_get,
+    bcmpkt_ipv6_t_next_header_get,
+    bcmpkt_ipv6_t_payload_length_get,
+    bcmpkt_ipv6_t_sa_get,
+    bcmpkt_ipv6_t_traffic_class_get,
+    bcmpkt_ipv6_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_cna_6_5_29_ipv6_t_fset[BCM56880_A0_CNA_6_5_29_BCMPKT_IPV6_T_FID_COUNT] = {
+    bcmpkt_ipv6_t_da_set,
+    bcmpkt_ipv6_t_flow_label_set,
+    bcmpkt_ipv6_t_hop_limit_set,
+    bcmpkt_ipv6_t_next_header_set,
+    bcmpkt_ipv6_t_payload_length_set,
+    bcmpkt_ipv6_t_sa_set,
+    bcmpkt_ipv6_t_traffic_class_set,
+    bcmpkt_ipv6_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_cna_6_5_29_ipv6_t_field_data[] = {
+    BCM56880_A0_CNA_6_5_29_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_cna_6_5_29_ipv6_t_field_info = {
+    .num_fields = BCM56880_A0_CNA_6_5_29_BCMPKT_IPV6_T_FID_COUNT,
+    .info = bcm56880_a0_cna_6_5_29_ipv6_t_field_data,
+};
+
+
+static int32_t bcmpkt_l2_t_macda_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_l2_t_macda_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_l2_t_macsa_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_l2_t_macsa_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_cna_6_5_29_l2_t_fget[BCM56880_A0_CNA_6_5_29_BCMPKT_L2_T_FID_COUNT] = {
+    bcmpkt_l2_t_macda_get,
+    bcmpkt_l2_t_macsa_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_cna_6_5_29_l2_t_fset[BCM56880_A0_CNA_6_5_29_BCMPKT_L2_T_FID_COUNT] = {
+    bcmpkt_l2_t_macda_set,
+    bcmpkt_l2_t_macsa_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_cna_6_5_29_l2_t_field_data[] = {
+    BCM56880_A0_CNA_6_5_29_BCMPKT_L2_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_cna_6_5_29_l2_t_field_info = {
+    .num_fields = BCM56880_A0_CNA_6_5_29_BCMPKT_L2_T_FID_COUNT,
+    .info = bcm56880_a0_cna_6_5_29_l2_t_field_data,
+};
+
+
+static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_cna_6_5_29_mirror_erspan_sn_t_fget[BCM56880_A0_CNA_6_5_29_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = {
+    bcmpkt_mirror_erspan_sn_t_seq_num_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_cna_6_5_29_mirror_erspan_sn_t_fset[BCM56880_A0_CNA_6_5_29_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = {
+    bcmpkt_mirror_erspan_sn_t_seq_num_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_cna_6_5_29_mirror_erspan_sn_t_field_data[] = {
+    BCM56880_A0_CNA_6_5_29_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_cna_6_5_29_mirror_erspan_sn_t_field_info = {
+    .num_fields = BCM56880_A0_CNA_6_5_29_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT,
+    .info = bcm56880_a0_cna_6_5_29_mirror_erspan_sn_t_field_data,
+};
+
+
+static int32_t bcmpkt_mirror_transport_t_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_mirror_transport_t_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_cna_6_5_29_mirror_transport_t_fget[BCM56880_A0_CNA_6_5_29_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = {
+    bcmpkt_mirror_transport_t_data_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_cna_6_5_29_mirror_transport_t_fset[BCM56880_A0_CNA_6_5_29_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = {
+    bcmpkt_mirror_transport_t_data_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_cna_6_5_29_mirror_transport_t_field_data[] = {
+    BCM56880_A0_CNA_6_5_29_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_cna_6_5_29_mirror_transport_t_field_info = {
+    .num_fields = BCM56880_A0_CNA_6_5_29_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT,
+    .info = bcm56880_a0_cna_6_5_29_mirror_transport_t_field_data,
+};
+
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[4], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[4], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[4], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[4], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_cna_6_5_29_psamp_mirror_on_drop_0_t_fget[BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = {
+    bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_length_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_template_id_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_cna_6_5_29_psamp_mirror_on_drop_0_t_fset[BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = {
+    bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_length_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_template_id_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_cna_6_5_29_psamp_mirror_on_drop_0_t_field_data[] = {
+    BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_cna_6_5_29_psamp_mirror_on_drop_0_t_field_info = {
+    .num_fields = BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT,
+    .info = bcm56880_a0_cna_6_5_29_psamp_mirror_on_drop_0_t_field_data,
+};
+
+
+static int32_t bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_cna_6_5_29_psamp_mirror_on_drop_1_t_fget[BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT] = {
+    bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_get,
+    bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_get,
+    bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_get,
+    bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_get,
+    bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_get,
+    bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_cna_6_5_29_psamp_mirror_on_drop_1_t_fset[BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT] = {
+    bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_set,
+    bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_set,
+    bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_set,
+    bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_set,
+    bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_set,
+    bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_cna_6_5_29_psamp_mirror_on_drop_1_t_field_data[] = {
+    BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_cna_6_5_29_psamp_mirror_on_drop_1_t_field_info = {
+    .num_fields = BCM56880_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT,
+    .info = bcm56880_a0_cna_6_5_29_psamp_mirror_on_drop_1_t_field_data,
+};
+
+
+static int32_t bcmpkt_rarp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_operation_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_operation_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_cna_6_5_29_rarp_t_fget[BCM56880_A0_CNA_6_5_29_BCMPKT_RARP_T_FID_COUNT] = {
+    bcmpkt_rarp_t_hardware_len_get,
+    bcmpkt_rarp_t_hardware_type_get,
+    bcmpkt_rarp_t_operation_get,
+    bcmpkt_rarp_t_prot_addr_len_get,
+    bcmpkt_rarp_t_protocol_type_get,
+    bcmpkt_rarp_t_sender_ha_get,
+    bcmpkt_rarp_t_sender_ip_get,
+    bcmpkt_rarp_t_target_ha_get,
+    bcmpkt_rarp_t_target_ip_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_cna_6_5_29_rarp_t_fset[BCM56880_A0_CNA_6_5_29_BCMPKT_RARP_T_FID_COUNT] = {
+    bcmpkt_rarp_t_hardware_len_set,
+    bcmpkt_rarp_t_hardware_type_set,
+    bcmpkt_rarp_t_operation_set,
+    bcmpkt_rarp_t_prot_addr_len_set,
+    bcmpkt_rarp_t_protocol_type_set,
+    bcmpkt_rarp_t_sender_ha_set,
+    bcmpkt_rarp_t_sender_ip_set,
+    bcmpkt_rarp_t_target_ha_set,
+    bcmpkt_rarp_t_target_ip_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_cna_6_5_29_rarp_t_field_data[] = {
+    BCM56880_A0_CNA_6_5_29_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_cna_6_5_29_rarp_t_field_info = {
+    .num_fields = BCM56880_A0_CNA_6_5_29_BCMPKT_RARP_T_FID_COUNT,
+    .info = bcm56880_a0_cna_6_5_29_rarp_t_field_data,
+};
+
+
+static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_first_4bytes_t_src_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_first_4bytes_t_src_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_cna_6_5_29_tcp_first_4bytes_t_fget[BCM56880_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = {
+    bcmpkt_tcp_first_4bytes_t_dst_port_get,
+    bcmpkt_tcp_first_4bytes_t_src_port_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_cna_6_5_29_tcp_first_4bytes_t_fset[BCM56880_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = {
+    bcmpkt_tcp_first_4bytes_t_dst_port_set,
+    bcmpkt_tcp_first_4bytes_t_src_port_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_cna_6_5_29_tcp_first_4bytes_t_field_data[] = {
+    BCM56880_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_cna_6_5_29_tcp_first_4bytes_t_field_info = {
+    .num_fields = BCM56880_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT,
+    .info = bcm56880_a0_cna_6_5_29_tcp_first_4bytes_t_field_data,
+};
+
+
+static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_win_size_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_win_size_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_cna_6_5_29_tcp_last_16bytes_t_fget[BCM56880_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = {
+    bcmpkt_tcp_last_16bytes_t_ack_num_get,
+    bcmpkt_tcp_last_16bytes_t_checksum_get,
+    bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get,
+    bcmpkt_tcp_last_16bytes_t_seq_num_get,
+    bcmpkt_tcp_last_16bytes_t_urgent_ptr_get,
+    bcmpkt_tcp_last_16bytes_t_win_size_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_cna_6_5_29_tcp_last_16bytes_t_fset[BCM56880_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = {
+    bcmpkt_tcp_last_16bytes_t_ack_num_set,
+    bcmpkt_tcp_last_16bytes_t_checksum_set,
+    bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set,
+    bcmpkt_tcp_last_16bytes_t_seq_num_set,
+    bcmpkt_tcp_last_16bytes_t_urgent_ptr_set,
+    bcmpkt_tcp_last_16bytes_t_win_size_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_cna_6_5_29_tcp_last_16bytes_t_field_data[] = {
+    BCM56880_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_cna_6_5_29_tcp_last_16bytes_t_field_info = {
+    .num_fields = BCM56880_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT,
+    .info = bcm56880_a0_cna_6_5_29_tcp_last_16bytes_t_field_data,
+};
+
+
+static int32_t bcmpkt_udp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_dst_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_src_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_src_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_udp_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_udp_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_cna_6_5_29_udp_t_fget[BCM56880_A0_CNA_6_5_29_BCMPKT_UDP_T_FID_COUNT] = {
+    bcmpkt_udp_t_checksum_get,
+    bcmpkt_udp_t_dst_port_get,
+    bcmpkt_udp_t_src_port_get,
+    bcmpkt_udp_t_udp_length_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_cna_6_5_29_udp_t_fset[BCM56880_A0_CNA_6_5_29_BCMPKT_UDP_T_FID_COUNT] = {
+    bcmpkt_udp_t_checksum_set,
+    bcmpkt_udp_t_dst_port_set,
+    bcmpkt_udp_t_src_port_set,
+    bcmpkt_udp_t_udp_length_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_cna_6_5_29_udp_t_field_data[] = {
+    BCM56880_A0_CNA_6_5_29_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_cna_6_5_29_udp_t_field_info = {
+    .num_fields = BCM56880_A0_CNA_6_5_29_BCMPKT_UDP_T_FID_COUNT,
+    .info = bcm56880_a0_cna_6_5_29_udp_t_field_data,
+};
+
+
+static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_cna_6_5_29_unknown_l3_t_fget[BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = {
+    bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get,
+    bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_cna_6_5_29_unknown_l3_t_fset[BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = {
+    bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set,
+    bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_cna_6_5_29_unknown_l3_t_field_data[] = {
+    BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_cna_6_5_29_unknown_l3_t_field_info = {
+    .num_fields = BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T_FID_COUNT,
+    .info = bcm56880_a0_cna_6_5_29_unknown_l3_t_field_data,
+};
+
+
+static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_cna_6_5_29_unknown_l4_t_fget[BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = {
+    bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_cna_6_5_29_unknown_l4_t_fset[BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = {
+    bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_cna_6_5_29_unknown_l4_t_field_data[] = {
+    BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_cna_6_5_29_unknown_l4_t_field_info = {
+    .num_fields = BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L4_T_FID_COUNT,
+    .info = bcm56880_a0_cna_6_5_29_unknown_l4_t_field_data,
+};
+
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_cna_6_5_29_unknown_l5_t_fget[BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = {
+    bcmpkt_unknown_l5_t_l5_bytes_0_1_get,
+    bcmpkt_unknown_l5_t_l5_bytes_2_3_get,
+    bcmpkt_unknown_l5_t_l5_bytes_4_7_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_cna_6_5_29_unknown_l5_t_fset[BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = {
+    bcmpkt_unknown_l5_t_l5_bytes_0_1_set,
+    bcmpkt_unknown_l5_t_l5_bytes_2_3_set,
+    bcmpkt_unknown_l5_t_l5_bytes_4_7_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_cna_6_5_29_unknown_l5_t_field_data[] = {
+    BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_cna_6_5_29_unknown_l5_t_field_info = {
+    .num_fields = BCM56880_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_FID_COUNT,
+    .info = bcm56880_a0_cna_6_5_29_unknown_l5_t_field_data,
+};
+
+
+static int32_t bcmpkt_vlan_t_cfi_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 12, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_cfi_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 12, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_pcp_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 13, 3);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_pcp_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 13, 3, val);
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_tpid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_vid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 12);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_vid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 12, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_cna_6_5_29_vlan_t_fget[BCM56880_A0_CNA_6_5_29_BCMPKT_VLAN_T_FID_COUNT] = {
+    bcmpkt_vlan_t_cfi_get,
+    bcmpkt_vlan_t_pcp_get,
+    bcmpkt_vlan_t_tpid_get,
+    bcmpkt_vlan_t_vid_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_cna_6_5_29_vlan_t_fset[BCM56880_A0_CNA_6_5_29_BCMPKT_VLAN_T_FID_COUNT] = {
+    bcmpkt_vlan_t_cfi_set,
+    bcmpkt_vlan_t_pcp_set,
+    bcmpkt_vlan_t_tpid_set,
+    bcmpkt_vlan_t_vid_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_cna_6_5_29_vlan_t_field_data[] = {
+    BCM56880_A0_CNA_6_5_29_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_cna_6_5_29_vlan_t_field_info = {
+    .num_fields = BCM56880_A0_CNA_6_5_29_BCMPKT_VLAN_T_FID_COUNT,
+    .info = bcm56880_a0_cna_6_5_29_vlan_t_field_data,
+};
+
+
+static int32_t bcmpkt_vxlan_t_flags_reserved_1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_vxlan_t_flags_reserved_1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_vxlan_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vxlan_t_reserved2_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_vxlan_t_vn_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 8, 24);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vxlan_t_vn_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 8, 24, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_cna_6_5_29_vxlan_t_fget[BCM56880_A0_CNA_6_5_29_BCMPKT_VXLAN_T_FID_COUNT] = {
+    bcmpkt_vxlan_t_flags_reserved_1_get,
+    bcmpkt_vxlan_t_reserved2_get,
+    bcmpkt_vxlan_t_vn_id_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_cna_6_5_29_vxlan_t_fset[BCM56880_A0_CNA_6_5_29_BCMPKT_VXLAN_T_FID_COUNT] = {
+    bcmpkt_vxlan_t_flags_reserved_1_set,
+    bcmpkt_vxlan_t_reserved2_set,
+    bcmpkt_vxlan_t_vn_id_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_cna_6_5_29_vxlan_t_field_data[] = {
+    BCM56880_A0_CNA_6_5_29_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_cna_6_5_29_vxlan_t_field_info = {
+    .num_fields = BCM56880_A0_CNA_6_5_29_BCMPKT_VXLAN_T_FID_COUNT,
+    .info = bcm56880_a0_cna_6_5_29_vxlan_t_field_data,
+};
+
+static bcmpkt_flex_pmd_info_t bcm56880_a0_cna_6_5_29_flexhdr_info_list[BCM56880_A0_CNA_6_5_29_BCMPKT_FLEXHDR_COUNT] = {
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_cna_6_5_29_arp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_cna_6_5_29_arp_t_fget,
+        .flex_fset = bcm56880_a0_cna_6_5_29_arp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_cna_6_5_29_cpu_composites_0_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_cna_6_5_29_cpu_composites_0_t_fget,
+        .flex_fset = bcm56880_a0_cna_6_5_29_cpu_composites_0_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_cna_6_5_29_cpu_composites_1_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_cna_6_5_29_cpu_composites_1_t_fget,
+        .flex_fset = bcm56880_a0_cna_6_5_29_cpu_composites_1_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_cna_6_5_29_erspan3_fixed_hdr_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_cna_6_5_29_erspan3_fixed_hdr_t_fget,
+        .flex_fset = bcm56880_a0_cna_6_5_29_erspan3_fixed_hdr_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_cna_6_5_29_erspan3_subhdr_5_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_cna_6_5_29_erspan3_subhdr_5_t_fget,
+        .flex_fset = bcm56880_a0_cna_6_5_29_erspan3_subhdr_5_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_cna_6_5_29_ethertype_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_cna_6_5_29_ethertype_t_fget,
+        .flex_fset = bcm56880_a0_cna_6_5_29_ethertype_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_cna_6_5_29_generic_loopback_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_cna_6_5_29_generic_loopback_t_fget,
+        .flex_fset = bcm56880_a0_cna_6_5_29_generic_loopback_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_cna_6_5_29_icmp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_cna_6_5_29_icmp_t_fget,
+        .flex_fset = bcm56880_a0_cna_6_5_29_icmp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_cna_6_5_29_ipfix_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_cna_6_5_29_ipfix_t_fget,
+        .flex_fset = bcm56880_a0_cna_6_5_29_ipfix_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_cna_6_5_29_ipv4_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_cna_6_5_29_ipv4_t_fget,
+        .flex_fset = bcm56880_a0_cna_6_5_29_ipv4_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_cna_6_5_29_ipv6_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_cna_6_5_29_ipv6_t_fget,
+        .flex_fset = bcm56880_a0_cna_6_5_29_ipv6_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_cna_6_5_29_l2_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_cna_6_5_29_l2_t_fget,
+        .flex_fset = bcm56880_a0_cna_6_5_29_l2_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_cna_6_5_29_mirror_erspan_sn_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_cna_6_5_29_mirror_erspan_sn_t_fget,
+        .flex_fset = bcm56880_a0_cna_6_5_29_mirror_erspan_sn_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_cna_6_5_29_mirror_transport_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_cna_6_5_29_mirror_transport_t_fget,
+        .flex_fset = bcm56880_a0_cna_6_5_29_mirror_transport_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_cna_6_5_29_psamp_mirror_on_drop_0_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_cna_6_5_29_psamp_mirror_on_drop_0_t_fget,
+        .flex_fset = bcm56880_a0_cna_6_5_29_psamp_mirror_on_drop_0_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_cna_6_5_29_psamp_mirror_on_drop_1_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_cna_6_5_29_psamp_mirror_on_drop_1_t_fget,
+        .flex_fset = bcm56880_a0_cna_6_5_29_psamp_mirror_on_drop_1_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_cna_6_5_29_rarp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_cna_6_5_29_rarp_t_fget,
+        .flex_fset = bcm56880_a0_cna_6_5_29_rarp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_cna_6_5_29_tcp_first_4bytes_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_cna_6_5_29_tcp_first_4bytes_t_fget,
+        .flex_fset = bcm56880_a0_cna_6_5_29_tcp_first_4bytes_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_cna_6_5_29_tcp_last_16bytes_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_cna_6_5_29_tcp_last_16bytes_t_fget,
+        .flex_fset = bcm56880_a0_cna_6_5_29_tcp_last_16bytes_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_cna_6_5_29_udp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_cna_6_5_29_udp_t_fget,
+        .flex_fset = bcm56880_a0_cna_6_5_29_udp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_cna_6_5_29_unknown_l3_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_cna_6_5_29_unknown_l3_t_fget,
+        .flex_fset = bcm56880_a0_cna_6_5_29_unknown_l3_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_cna_6_5_29_unknown_l4_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_cna_6_5_29_unknown_l4_t_fget,
+        .flex_fset = bcm56880_a0_cna_6_5_29_unknown_l4_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_cna_6_5_29_unknown_l5_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_cna_6_5_29_unknown_l5_t_fget,
+        .flex_fset = bcm56880_a0_cna_6_5_29_unknown_l5_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_cna_6_5_29_vlan_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_cna_6_5_29_vlan_t_fget,
+        .flex_fset = bcm56880_a0_cna_6_5_29_vlan_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_cna_6_5_29_vxlan_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_cna_6_5_29_vxlan_t_fget,
+        .flex_fset = bcm56880_a0_cna_6_5_29_vxlan_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_cna_6_5_29_rxpmd_flex_field_info,
+        .reasons_info = &bcm56880_a0_cna_6_5_29_rxpmd_flex_reasons_info,
+        .flex_common_fget = bcm56880_a0_rxpmd_flex_fget,
+        .flex_common_fset = bcm56880_a0_rxpmd_flex_fset,
+    },
+};
+
+static shr_enum_map_t bcm56880_a0_cna_6_5_29_flexhdr_id_map[] = {
+    BCM56880_A0_CNA_6_5_29_BCMPKT_FLEXHDR_NAME_MAP_INIT
+};
+
+shr_enum_map_t * bcm56880_a0_cna_6_5_29_flexhdr_map_get(void)
+{
+    return bcm56880_a0_cna_6_5_29_flexhdr_id_map;
+}
+
+bcmpkt_flex_pmd_info_t * bcm56880_a0_cna_6_5_29_flex_pmd_info_get(uint32_t hid)
+{
+    if (hid >= BCM56880_A0_CNA_6_5_29_BCMPKT_FLEXHDR_COUNT) {
+        return NULL;
+    }
+
+    return &bcm56880_a0_cna_6_5_29_flexhdr_info_list[hid];
+}
+
+int bcm56880_a0_cna_6_5_29_flexhdr_variant_support_map[BCMPKT_PMD_COUNT] = {
+    6,
+    -1,
+    -1,
+    25,
+};
\ No newline at end of file
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_bcmpkt_rxpmd_match_id.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_bcmpkt_rxpmd_match_id.c
new file mode 100644
index 000000000..fc3b64344
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_bcmpkt_rxpmd_match_id.c
@@ -0,0 +1,2480 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) bcm56880_a0_dna_4_11_4_0_sf_match_id_info.yml
+ * for device bcm56880_a0 and variant dna_4_11_4_0.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+
+#include <bcmpkt/bcmpkt_rxpmd_match_id.h>
+#include <bcmpkt/xfcr/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_bcmpkt_rxpmd_match_id_defs.h>
+
+
+static bcmpkt_rxpmd_match_id_db_t
+bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db[BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_COUNT] = {
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_ETAG",
+        .match        = 0x80,
+        .match_mask   = 0xc0,
+        .match_maxbit = 30,
+        .match_minbit = 23,
+        .maxbit       = 7,
+        .minbit       = 6,
+        .value        = 0x2,
+        .pmaxbit      = 42,
+        .pminbit      = 35,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_HG3_BASE",
+        .match        = 0x2,
+        .match_mask   = 0x2,
+        .match_maxbit = 30,
+        .match_minbit = 23,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 42,
+        .pminbit      = 35,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0 */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0",
+        .match        = 0x8,
+        .match_mask   = 0x8,
+        .match_maxbit = 30,
+        .match_minbit = 23,
+        .maxbit       = 3,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 42,
+        .pminbit      = 35,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_ITAG",
+        .match        = 0x20,
+        .match_mask   = 0x20,
+        .match_maxbit = 30,
+        .match_minbit = 23,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 42,
+        .pminbit      = 35,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_L2",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 30,
+        .match_minbit = 23,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 42,
+        .pminbit      = 35,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0xff,
+        .match_maxbit = 30,
+        .match_minbit = 23,
+        .maxbit       = 7,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 42,
+        .pminbit      = 35,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_OTAG",
+        .match        = 0x10,
+        .match_mask   = 0x10,
+        .match_maxbit = 30,
+        .match_minbit = 23,
+        .maxbit       = 4,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 42,
+        .pminbit      = 35,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC",
+        .match        = 0x4,
+        .match_mask   = 0x4,
+        .match_maxbit = 30,
+        .match_minbit = 23,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 42,
+        .pminbit      = 35,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_VNTAG",
+        .match        = 0x40,
+        .match_mask   = 0xc0,
+        .match_maxbit = 30,
+        .match_minbit = 23,
+        .maxbit       = 7,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 42,
+        .pminbit      = 35,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ARP",
+        .match        = 0x1800,
+        .match_mask   = 0x3830,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x3,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1",
+        .match        = 0x80,
+        .match_mask   = 0x1c2,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2",
+        .match        = 0x408,
+        .match_mask   = 0x64c,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x2,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_BFD",
+        .match        = 0x3000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x6,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT",
+        .match        = 0x200,
+        .match_mask   = 0x642,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1",
+        .match        = 0x100,
+        .match_mask   = 0x1c0,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x2,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2",
+        .match        = 0x600,
+        .match_mask   = 0x640,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x3,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GPE",
+        .match        = 0x1830,
+        .match_mask   = 0x3870,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x3,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE",
+        .match        = 0x2,
+        .match_mask   = 0x42,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM",
+        .match        = 0x202,
+        .match_mask   = 0x642,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY",
+        .match        = 0x1000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x2,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT",
+        .match        = 0x82,
+        .match_mask   = 0x1c2,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ",
+        .match        = 0x12,
+        .match_mask   = 0x72,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ICMP",
+        .match        = 0x2000,
+        .match_mask   = 0x3830,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x4,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA",
+        .match        = 0x180,
+        .match_mask   = 0x1c0,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x3,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IGMP",
+        .match        = 0x404,
+        .match_mask   = 0x64c,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x2,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IPV4",
+        .match        = 0x4,
+        .match_mask   = 0x4c,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 3,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IPV6",
+        .match        = 0x8,
+        .match_mask   = 0x4c,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 3,
+        .minbit       = 2,
+        .value        = 0x2,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS0",
+        .match        = 0x40,
+        .match_mask   = 0x40,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 6,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS1",
+        .match        = 0x42,
+        .match_mask   = 0x42,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS2",
+        .match        = 0x44,
+        .match_mask   = 0x44,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS3",
+        .match        = 0x48,
+        .match_mask   = 0x48,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 3,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS4",
+        .match        = 0x50,
+        .match_mask   = 0x50,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 4,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS5",
+        .match        = 0x60,
+        .match_mask   = 0x60,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS6",
+        .match        = 0xc0,
+        .match_mask   = 0xc0,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 7,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH",
+        .match        = 0x140,
+        .match_mask   = 0x140,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 8,
+        .minbit       = 8,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW",
+        .match        = 0x240,
+        .match_mask   = 0x240,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 9,
+        .minbit       = 9,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x3fff,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 13,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_P_1588",
+        .match        = 0x3800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x7,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_RARP",
+        .match        = 0x800,
+        .match_mask   = 0x3830,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES",
+        .match        = 0x20,
+        .match_mask   = 0x70,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x2,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES",
+        .match        = 0x820,
+        .match_mask   = 0x3870,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UDP",
+        .match        = 0x30,
+        .match_mask   = 0x70,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x3,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3",
+        .match        = 0x10,
+        .match_mask   = 0x72,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4",
+        .match        = 0x2800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x5,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5",
+        .match        = 0x2030,
+        .match_mask   = 0x3870,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x4,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_VXLAN",
+        .match        = 0x830,
+        .match_mask   = 0x3870,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK */
+        .name         = "EGRESS_PKT_SYS_HDR_LOOPBACK",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 0,
+        .match_minbit = 0,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 0,
+        .pminbit      = 0,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE */
+        .name         = "EGRESS_PKT_SYS_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x1,
+        .match_maxbit = 0,
+        .match_minbit = 0,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 0,
+        .pminbit      = 0,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_ETAG",
+        .match        = 0x80,
+        .match_mask   = 0xc0,
+        .match_maxbit = 8,
+        .match_minbit = 1,
+        .maxbit       = 7,
+        .minbit       = 6,
+        .value        = 0x2,
+        .pmaxbit      = 14,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE",
+        .match        = 0x2,
+        .match_mask   = 0x2,
+        .match_maxbit = 8,
+        .match_minbit = 1,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 14,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0 */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0",
+        .match        = 0x8,
+        .match_mask   = 0x8,
+        .match_maxbit = 8,
+        .match_minbit = 1,
+        .maxbit       = 3,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 14,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_ITAG",
+        .match        = 0x20,
+        .match_mask   = 0x20,
+        .match_maxbit = 8,
+        .match_minbit = 1,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 14,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_L2",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 8,
+        .match_minbit = 1,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 14,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0xff,
+        .match_maxbit = 8,
+        .match_minbit = 1,
+        .maxbit       = 7,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 14,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_OTAG",
+        .match        = 0x10,
+        .match_mask   = 0x10,
+        .match_maxbit = 8,
+        .match_minbit = 1,
+        .maxbit       = 4,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 14,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC",
+        .match        = 0x4,
+        .match_mask   = 0x4,
+        .match_maxbit = 8,
+        .match_minbit = 1,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 14,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_VNTAG",
+        .match        = 0x40,
+        .match_mask   = 0xc0,
+        .match_maxbit = 8,
+        .match_minbit = 1,
+        .maxbit       = 7,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 14,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP",
+        .match        = 0x1800,
+        .match_mask   = 0x3830,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x3,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1",
+        .match        = 0x80,
+        .match_mask   = 0x1c2,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2",
+        .match        = 0x408,
+        .match_mask   = 0x64c,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x2,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD",
+        .match        = 0x3000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x6,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT",
+        .match        = 0x200,
+        .match_mask   = 0x642,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1",
+        .match        = 0x100,
+        .match_mask   = 0x1c0,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x2,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2",
+        .match        = 0x600,
+        .match_mask   = 0x640,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x3,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE",
+        .match        = 0x1830,
+        .match_mask   = 0x3870,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x3,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE",
+        .match        = 0x2,
+        .match_mask   = 0x42,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM",
+        .match        = 0x202,
+        .match_mask   = 0x642,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY",
+        .match        = 0x1000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x2,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT",
+        .match        = 0x82,
+        .match_mask   = 0x1c2,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ",
+        .match        = 0x12,
+        .match_mask   = 0x72,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP",
+        .match        = 0x2000,
+        .match_mask   = 0x3830,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x4,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA",
+        .match        = 0x180,
+        .match_mask   = 0x1c0,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x3,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP",
+        .match        = 0x404,
+        .match_mask   = 0x64c,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x2,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4",
+        .match        = 0x4,
+        .match_mask   = 0x4c,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 3,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6",
+        .match        = 0x8,
+        .match_mask   = 0x4c,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 3,
+        .minbit       = 2,
+        .value        = 0x2,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0",
+        .match        = 0x40,
+        .match_mask   = 0x40,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 6,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1",
+        .match        = 0x42,
+        .match_mask   = 0x42,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2",
+        .match        = 0x44,
+        .match_mask   = 0x44,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3",
+        .match        = 0x48,
+        .match_mask   = 0x48,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 3,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4",
+        .match        = 0x50,
+        .match_mask   = 0x50,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 4,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5",
+        .match        = 0x60,
+        .match_mask   = 0x60,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6",
+        .match        = 0xc0,
+        .match_mask   = 0xc0,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 7,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH",
+        .match        = 0x140,
+        .match_mask   = 0x140,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 8,
+        .minbit       = 8,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW",
+        .match        = 0x240,
+        .match_mask   = 0x240,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 9,
+        .minbit       = 9,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x3fff,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588",
+        .match        = 0x3800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x7,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP",
+        .match        = 0x800,
+        .match_mask   = 0x3830,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES",
+        .match        = 0x20,
+        .match_mask   = 0x70,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x2,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES",
+        .match        = 0x820,
+        .match_mask   = 0x3870,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP",
+        .match        = 0x30,
+        .match_mask   = 0x70,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x3,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3",
+        .match        = 0x10,
+        .match_mask   = 0x72,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4",
+        .match        = 0x2800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x5,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5",
+        .match        = 0x2030,
+        .match_mask   = 0x3870,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x4,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN",
+        .match        = 0x830,
+        .match_mask   = 0x3870,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_ETAG",
+        .match        = 0x80,
+        .match_mask   = 0xc0,
+        .match_maxbit = 30,
+        .match_minbit = 23,
+        .maxbit       = 7,
+        .minbit       = 6,
+        .value        = 0x2,
+        .pmaxbit      = 30,
+        .pminbit      = 23,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_ITAG",
+        .match        = 0x20,
+        .match_mask   = 0x20,
+        .match_maxbit = 30,
+        .match_minbit = 23,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 30,
+        .pminbit      = 23,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_L2",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 30,
+        .match_minbit = 23,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 30,
+        .pminbit      = 23,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0xff,
+        .match_maxbit = 30,
+        .match_minbit = 23,
+        .maxbit       = 7,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 30,
+        .pminbit      = 23,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_OTAG",
+        .match        = 0x10,
+        .match_mask   = 0x10,
+        .match_maxbit = 30,
+        .match_minbit = 23,
+        .maxbit       = 4,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 30,
+        .pminbit      = 23,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC",
+        .match        = 0x4,
+        .match_mask   = 0x4,
+        .match_maxbit = 30,
+        .match_minbit = 23,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 30,
+        .pminbit      = 23,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_VNTAG",
+        .match        = 0x40,
+        .match_mask   = 0xc0,
+        .match_maxbit = 30,
+        .match_minbit = 23,
+        .maxbit       = 7,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 30,
+        .pminbit      = 23,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ARP",
+        .match        = 0x1800,
+        .match_mask   = 0x3830,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x3,
+        .pmaxbit      = 44,
+        .pminbit      = 31,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1",
+        .match        = 0x80,
+        .match_mask   = 0x1c2,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 44,
+        .pminbit      = 31,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2",
+        .match        = 0x408,
+        .match_mask   = 0x64c,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x2,
+        .pmaxbit      = 44,
+        .pminbit      = 31,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_BFD",
+        .match        = 0x3000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x6,
+        .pmaxbit      = 44,
+        .pminbit      = 31,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT",
+        .match        = 0x200,
+        .match_mask   = 0x642,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x1,
+        .pmaxbit      = 44,
+        .pminbit      = 31,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 44,
+        .pminbit      = 31,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1",
+        .match        = 0x100,
+        .match_mask   = 0x1c0,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x2,
+        .pmaxbit      = 44,
+        .pminbit      = 31,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2",
+        .match        = 0x600,
+        .match_mask   = 0x640,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x3,
+        .pmaxbit      = 44,
+        .pminbit      = 31,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ICMP",
+        .match        = 0x2000,
+        .match_mask   = 0x3830,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x4,
+        .pmaxbit      = 44,
+        .pminbit      = 31,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IGMP",
+        .match        = 0x404,
+        .match_mask   = 0x64c,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x2,
+        .pmaxbit      = 44,
+        .pminbit      = 31,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IPV4",
+        .match        = 0x4,
+        .match_mask   = 0x4c,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 3,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 44,
+        .pminbit      = 31,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IPV6",
+        .match        = 0x8,
+        .match_mask   = 0x4c,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 3,
+        .minbit       = 2,
+        .value        = 0x2,
+        .pmaxbit      = 44,
+        .pminbit      = 31,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x3fff,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 13,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 44,
+        .pminbit      = 31,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_P_1588",
+        .match        = 0x3800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x7,
+        .pmaxbit      = 44,
+        .pminbit      = 31,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_RARP",
+        .match        = 0x800,
+        .match_mask   = 0x3830,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 44,
+        .pminbit      = 31,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES",
+        .match        = 0x20,
+        .match_mask   = 0x70,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x2,
+        .pmaxbit      = 44,
+        .pminbit      = 31,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES",
+        .match        = 0x820,
+        .match_mask   = 0x3870,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 44,
+        .pminbit      = 31,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UDP",
+        .match        = 0x30,
+        .match_mask   = 0x70,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x3,
+        .pmaxbit      = 44,
+        .pminbit      = 31,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3",
+        .match        = 0x10,
+        .match_mask   = 0x72,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 44,
+        .pminbit      = 31,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4",
+        .match        = 0x2800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x5,
+        .pmaxbit      = 44,
+        .pminbit      = 31,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5",
+        .match        = 0x2030,
+        .match_mask   = 0x3870,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x4,
+        .pmaxbit      = 44,
+        .pminbit      = 31,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_ETAG",
+        .match        = 0x80,
+        .match_mask   = 0xc0,
+        .match_maxbit = 8,
+        .match_minbit = 1,
+        .maxbit       = 7,
+        .minbit       = 6,
+        .value        = 0x2,
+        .pmaxbit      = 8,
+        .pminbit      = 1,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_HG3_BASE",
+        .match        = 0x2,
+        .match_mask   = 0x2,
+        .match_maxbit = 8,
+        .match_minbit = 1,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 8,
+        .pminbit      = 1,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0 */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0",
+        .match        = 0x8,
+        .match_mask   = 0x8,
+        .match_maxbit = 8,
+        .match_minbit = 1,
+        .maxbit       = 3,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 8,
+        .pminbit      = 1,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_ITAG",
+        .match        = 0x20,
+        .match_mask   = 0x20,
+        .match_maxbit = 8,
+        .match_minbit = 1,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 8,
+        .pminbit      = 1,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_L2",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 8,
+        .match_minbit = 1,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 8,
+        .pminbit      = 1,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0xff,
+        .match_maxbit = 8,
+        .match_minbit = 1,
+        .maxbit       = 7,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 8,
+        .pminbit      = 1,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_OTAG",
+        .match        = 0x10,
+        .match_mask   = 0x10,
+        .match_maxbit = 8,
+        .match_minbit = 1,
+        .maxbit       = 4,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 8,
+        .pminbit      = 1,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC",
+        .match        = 0x4,
+        .match_mask   = 0x4,
+        .match_maxbit = 8,
+        .match_minbit = 1,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 8,
+        .pminbit      = 1,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_VNTAG",
+        .match        = 0x40,
+        .match_mask   = 0xc0,
+        .match_maxbit = 8,
+        .match_minbit = 1,
+        .maxbit       = 7,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 8,
+        .pminbit      = 1,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ARP",
+        .match        = 0x1800,
+        .match_mask   = 0x3830,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x3,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1",
+        .match        = 0x80,
+        .match_mask   = 0x1c2,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2",
+        .match        = 0x408,
+        .match_mask   = 0x64c,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x2,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_BFD",
+        .match        = 0x3000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x6,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT",
+        .match        = 0x200,
+        .match_mask   = 0x642,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1",
+        .match        = 0x100,
+        .match_mask   = 0x1c0,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x2,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2",
+        .match        = 0x600,
+        .match_mask   = 0x640,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x3,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GPE",
+        .match        = 0x1830,
+        .match_mask   = 0x3870,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x3,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE",
+        .match        = 0x2,
+        .match_mask   = 0x42,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM",
+        .match        = 0x202,
+        .match_mask   = 0x642,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY",
+        .match        = 0x1000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x2,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT",
+        .match        = 0x82,
+        .match_mask   = 0x1c2,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ",
+        .match        = 0x12,
+        .match_mask   = 0x72,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ICMP",
+        .match        = 0x2000,
+        .match_mask   = 0x3830,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x4,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA",
+        .match        = 0x180,
+        .match_mask   = 0x1c0,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x3,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IGMP",
+        .match        = 0x404,
+        .match_mask   = 0x64c,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x2,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV4",
+        .match        = 0x4,
+        .match_mask   = 0x4c,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 3,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV6",
+        .match        = 0x8,
+        .match_mask   = 0x4c,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 3,
+        .minbit       = 2,
+        .value        = 0x2,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0",
+        .match        = 0x40,
+        .match_mask   = 0x40,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 6,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1",
+        .match        = 0x42,
+        .match_mask   = 0x42,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2",
+        .match        = 0x44,
+        .match_mask   = 0x44,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3",
+        .match        = 0x48,
+        .match_mask   = 0x48,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 3,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4",
+        .match        = 0x50,
+        .match_mask   = 0x50,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 4,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5",
+        .match        = 0x60,
+        .match_mask   = 0x60,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6",
+        .match        = 0xc0,
+        .match_mask   = 0xc0,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 7,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH",
+        .match        = 0x140,
+        .match_mask   = 0x140,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 8,
+        .minbit       = 8,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW",
+        .match        = 0x240,
+        .match_mask   = 0x240,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 9,
+        .minbit       = 9,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x3fff,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_P_1588",
+        .match        = 0x3800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x7,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_RARP",
+        .match        = 0x800,
+        .match_mask   = 0x3830,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES",
+        .match        = 0x20,
+        .match_mask   = 0x70,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x2,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES",
+        .match        = 0x820,
+        .match_mask   = 0x3870,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UDP",
+        .match        = 0x30,
+        .match_mask   = 0x70,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x3,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3",
+        .match        = 0x10,
+        .match_mask   = 0x72,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4",
+        .match        = 0x2800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x5,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5",
+        .match        = 0x2030,
+        .match_mask   = 0x3870,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x4,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN",
+        .match        = 0x830,
+        .match_mask   = 0x3870,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK */
+        .name         = "INGRESS_PKT_SYS_HDR_LOOPBACK",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 0,
+        .match_minbit = 0,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 0,
+        .pminbit      = 0,
+
+    },
+    {
+        /* BCM56880_A0_DNA_4_11_4_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE */
+        .name         = "INGRESS_PKT_SYS_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x1,
+        .match_maxbit = 0,
+        .match_minbit = 0,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 0,
+        .pminbit      = 0,
+
+    },
+};
+
+static bcmpkt_rxpmd_match_id_db_info_t bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db_info = {
+    .num_entries = 173,
+    .db = bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db
+};
+bcmpkt_rxpmd_match_id_db_info_t * bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db_info_get(void) {
+    return &bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_db_info;
+}
+
+static shr_enum_map_t bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_map[] = {
+    BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_rxpmd_match_id_map_info_t bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_map_info = {
+    .num_entries = 173,
+    .map = bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_map
+};
+
+bcmpkt_rxpmd_match_id_map_info_t * bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_map_info_get(void) {
+    return &bcm56880_a0_dna_4_11_4_0_rxpmd_match_id_map_info;
+}
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_pkt_flexhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_pkt_flexhdr.c
new file mode 100644
index 000000000..2ba902968
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_pkt_flexhdr.c
@@ -0,0 +1,7665 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) map.yml
+ * for device bcm56880_a0 and variant dna_4_11_4_0.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#include <sal/sal_types.h>
+#include <shr/shr_error.h>
+#include <bcmpkt/bcmpkt_flexhdr.h>
+#include <bcmpkt/chip/bcm56880_a0/bcmpkt_bcm56880_a0_rxpmd.h>
+#include <bcmpkt/xfcr/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_bcmpkt_flexhdr.h>
+#include <bcmpkt/xfcr/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_bcmpkt_flexhdr_data.h>
+#include <bcmpkt/xfcr/bcm56880_a0/dna_4_11_4_0/bcm56880_a0_dna_4_11_4_0_bcmpkt_rxpmd_flex_data.h>
+
+#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1)
+#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l))
+#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s)))
+#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s)))
+
+static void bcm56880_a0_dna_4_11_4_0_rxpmd_flex_reason_decode(uint32_t *data, bcmpkt_bitmap_t *reasons)
+{
+    uint32_t *reason = data + 0;
+
+    if (reason[12] & (0x1 << 0)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU);
+    }
+    if (reason[12] & (0x1 << 1)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS);
+    }
+    if (reason[12] & (0x1 << 2)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE);
+    }
+    if (reason[12] & (0x1 << 3)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT);
+    }
+    if (reason[12] & (0x1 << 4)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST);
+    }
+    if (reason[12] & (0x1 << 5)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED);
+    }
+    if (reason[12] & (0x1 << 6)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT);
+    }
+    if (reason[12] & (0x1 << 7)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED);
+    }
+    if (reason[12] & (0x1 << 8)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED);
+    }
+    if (reason[12] & (0x1 << 9)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS);
+    }
+    if (reason[12] & (0x1 << 10)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP);
+    }
+    if (reason[12] & (0x1 << 11)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS);
+    }
+    if (reason[12] & (0x1 << 12)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP);
+    }
+    if (reason[12] & (0x1 << 13)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR);
+    }
+    if (reason[12] & (0x1 << 14)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR);
+    }
+    if (reason[12] & (0x1 << 15)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED);
+    }
+    if (reason[12] & (0x1 << 16)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL);
+    }
+    if (reason[12] & (0x1 << 17)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_VFP);
+    }
+    if (reason[12] & (0x1 << 18)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_IFP);
+    }
+    if (reason[12] & (0x1 << 19)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER);
+    }
+    if (reason[12] & (0x1 << 20)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP);
+    }
+    if (reason[12] & (0x1 << 21)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_SVP);
+    }
+    if (reason[12] & (0x1 << 22)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT);
+    }
+    if (reason[12] & (0x1 << 23)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT);
+    }
+    if (reason[12] & (0x1 << 24)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED);
+    }
+    if (reason[12] & (0x1 << 25)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED);
+    }
+    if (reason[12] & (0x1 << 26)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP);
+    }
+    if (reason[12] & (0x1 << 27)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED);
+    }
+    if (reason[12] & (0x1 << 28)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF);
+    }
+    if (reason[12] & (0x1 << 29)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED);
+    }
+    if (reason[12] & (0x1 << 30)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED);
+    }
+    if (reason[12] & (0x1 << 31)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU);
+    }
+    if (reason[11] & (0x1 << 0)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0);
+    }
+    if (reason[11] & (0x1 << 1)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1);
+    }
+    if (reason[11] & (0x1 << 2)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2);
+    }
+    if (reason[11] & (0x1 << 3)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3);
+    }
+    if (reason[11] & (0x1 << 4)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4);
+    }
+    if (reason[11] & (0x1 << 5)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5);
+    }
+    if (reason[11] & (0x1 << 6)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6);
+    }
+    if (reason[11] & (0x1 << 7)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7);
+    }
+    if (reason[11] & (0x1 << 15)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP);
+    }
+}
+
+static void bcm56880_a0_dna_4_11_4_0_rxpmd_flex_reason_encode(bcmpkt_bitmap_t *reasons, uint32_t *data)
+{
+    uint32_t *reason = data + 0;
+
+    reason[12] = 0;
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU)) {
+        reason[12] |= (0x1 << 0);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS)) {
+        reason[12] |= (0x1 << 1);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE)) {
+        reason[12] |= (0x1 << 2);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT)) {
+        reason[12] |= (0x1 << 3);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST)) {
+        reason[12] |= (0x1 << 4);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED)) {
+        reason[12] |= (0x1 << 5);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT)) {
+        reason[12] |= (0x1 << 6);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED)) {
+        reason[12] |= (0x1 << 7);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED)) {
+        reason[12] |= (0x1 << 8);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS)) {
+        reason[12] |= (0x1 << 9);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP)) {
+        reason[12] |= (0x1 << 10);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS)) {
+        reason[12] |= (0x1 << 11);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP)) {
+        reason[12] |= (0x1 << 12);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR)) {
+        reason[12] |= (0x1 << 13);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR)) {
+        reason[12] |= (0x1 << 14);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED)) {
+        reason[12] |= (0x1 << 15);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL)) {
+        reason[12] |= (0x1 << 16);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_VFP)) {
+        reason[12] |= (0x1 << 17);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_IFP)) {
+        reason[12] |= (0x1 << 18);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER)) {
+        reason[12] |= (0x1 << 19);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP)) {
+        reason[12] |= (0x1 << 20);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_SVP)) {
+        reason[12] |= (0x1 << 21);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT)) {
+        reason[12] |= (0x1 << 22);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT)) {
+        reason[12] |= (0x1 << 23);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED)) {
+        reason[12] |= (0x1 << 24);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED)) {
+        reason[12] |= (0x1 << 25);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP)) {
+        reason[12] |= (0x1 << 26);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED)) {
+        reason[12] |= (0x1 << 27);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF)) {
+        reason[12] |= (0x1 << 28);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED)) {
+        reason[12] |= (0x1 << 29);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED)) {
+        reason[12] |= (0x1 << 30);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU)) {
+        reason[12] |= (0x1 << 31);
+    }
+    reason[11] = 0;
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0)) {
+        reason[11] |= (0x1 << 0);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1)) {
+        reason[11] |= (0x1 << 1);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2)) {
+        reason[11] |= (0x1 << 2);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3)) {
+        reason[11] |= (0x1 << 3);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4)) {
+        reason[11] |= (0x1 << 4);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5)) {
+        reason[11] |= (0x1 << 5);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6)) {
+        reason[11] |= (0x1 << 6);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7)) {
+        reason[11] |= (0x1 << 7);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP)) {
+        reason[11] |= (0x1 << 15);
+    }
+}
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_rxpmd_flex_field_data[] = {
+    {
+        .name = "DLB_ECMP_DESTINATION_15_0",
+        .fid = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { -1, -1 }, /* Profile 2. */
+            { -1, -1 }, /* Profile 3. */
+            { 224, 239 }, /* Profile 4. */
+            { 240, 255 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "DROP_CODE_15_0",
+        .fid = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 48, 63 }, /* Profile 2. */
+            { 48, 63 }, /* Profile 3. */
+            { 48, 63 }, /* Profile 4. */
+            { 48, 63 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "DVP_15_0",
+        .fid = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_DVP_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 320, 335 }, /* Profile 2. */
+            { 320, 335 }, /* Profile 3. */
+            { 320, 335 }, /* Profile 4. */
+            { 320, 335 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "EFFECTIVE_TTL_7_0",
+        .fid = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 304, 311 }, /* Profile 2. */
+            { 304, 311 }, /* Profile 3. */
+            { 304, 311 }, /* Profile 4. */
+            { 304, 311 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0",
+        .fid = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 224, 239 }, /* Profile 2. */
+            { 240, 255 }, /* Profile 3. */
+        },
+        .profile_cnt = 4,
+    },
+    {
+        .name = "ENTROPY_LABEL_HIGH_3_0",
+        .fid = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 388, 391 }, /* Profile 2. */
+            { 388, 391 }, /* Profile 3. */
+            { 388, 391 }, /* Profile 4. */
+            { 388, 391 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "ENTROPY_LABEL_LOW_15_0",
+        .fid = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 256, 271 }, /* Profile 2. */
+            { 272, 287 }, /* Profile 3. */
+            { 256, 271 }, /* Profile 4. */
+            { 272, 287 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "EVENT_TRACE_VECTOR_31_0",
+        .fid = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 0, 31 }, /* Profile 2. */
+            { 0, 31 }, /* Profile 3. */
+            { 0, 31 }, /* Profile 4. */
+            { 0, 31 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "EVENT_TRACE_VECTOR_47_32",
+        .fid = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 32, 47 }, /* Profile 2. */
+            { 32, 47 }, /* Profile 3. */
+            { 32, 47 }, /* Profile 4. */
+            { 32, 47 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "I2E_CLASS_ID_15_0",
+        .fid = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 208, 223 }, /* Profile 2. */
+            { 224, 239 }, /* Profile 3. */
+            { 208, 223 }, /* Profile 4. */
+            { 224, 239 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "IFP_IOAM_GBP_ACTION_3_0",
+        .fid = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 372, 375 }, /* Profile 2. */
+            { 372, 375 }, /* Profile 3. */
+            { 372, 375 }, /* Profile 4. */
+            { 372, 375 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "IFP_TS_CONTROL_ACTION_3_0",
+        .fid = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 376, 379 }, /* Profile 2. */
+            { 376, 379 }, /* Profile 3. */
+            { 376, 379 }, /* Profile 4. */
+            { 376, 379 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "ING_TIMESTAMP_31_0",
+        .fid = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 64, 95 }, /* Profile 2. */
+            { 64, 95 }, /* Profile 3. */
+            { 64, 95 }, /* Profile 4. */
+            { 64, 95 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "INGRESS_PP_PORT_7_0",
+        .fid = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 240, 247 }, /* Profile 2. */
+            { 256, 263 }, /* Profile 3. */
+            { 240, 247 }, /* Profile 4. */
+            { 256, 263 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0",
+        .fid = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 160, 175 }, /* Profile 2. */
+            { 176, 191 }, /* Profile 3. */
+            { 160, 175 }, /* Profile 4. */
+            { 176, 191 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "INGRESS_QOS_REMARK_CTRL_3_0",
+        .fid = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 400, 403 }, /* Profile 2. */
+            { 400, 403 }, /* Profile 3. */
+            { 400, 403 }, /* Profile 4. */
+            { 400, 403 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "INT_PRI_3_0",
+        .fid = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 396, 399 }, /* Profile 2. */
+            { 396, 399 }, /* Profile 3. */
+            { 396, 399 }, /* Profile 4. */
+            { 396, 399 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "L2_IIF_10_0",
+        .fid = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_L2_IIF_10_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 288, 298 }, /* Profile 2. */
+            { -1, -1 }, /* Profile 3. */
+            { 288, 298 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "L2_OIF_10_0",
+        .fid = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_L2_OIF_10_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { -1, -1 }, /* Profile 2. */
+            { 160, 170 }, /* Profile 3. */
+            { -1, -1 }, /* Profile 4. */
+            { 160, 170 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "L3_IIF_13_0",
+        .fid = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 192, 205 }, /* Profile 2. */
+            { 208, 221 }, /* Profile 3. */
+            { 192, 205 }, /* Profile 4. */
+            { 208, 221 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "L3_OIF_1_13_0",
+        .fid = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 352, 365 }, /* Profile 2. */
+            { 352, 365 }, /* Profile 3. */
+            { 352, 365 }, /* Profile 4. */
+            { 352, 365 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "MPLS_LABEL_DECAP_COUNT_3_0",
+        .fid = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_MPLS_LABEL_DECAP_COUNT_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 412, 415 }, /* Profile 2. */
+            { 412, 415 }, /* Profile 3. */
+            { 412, 415 }, /* Profile 4. */
+            { 412, 415 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0",
+        .fid = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 176, 191 }, /* Profile 2. */
+            { 192, 207 }, /* Profile 3. */
+            { 176, 191 }, /* Profile 4. */
+            { 192, 207 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "NHOP_INDEX_1_15_0",
+        .fid = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 336, 351 }, /* Profile 2. */
+            { 336, 351 }, /* Profile 3. */
+            { 336, 351 }, /* Profile 4. */
+            { 336, 351 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "PARSER_VHLEN_0_15_0",
+        .fid = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 96, 111 }, /* Profile 2. */
+            { 96, 111 }, /* Profile 3. */
+            { 96, 111 }, /* Profile 4. */
+            { 96, 111 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "PKT_MISC_CTRL_0_3_0",
+        .fid = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 408, 411 }, /* Profile 2. */
+            { 408, 411 }, /* Profile 3. */
+            { 408, 411 }, /* Profile 4. */
+            { 408, 411 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "SVP_15_0",
+        .fid = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_SVP_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 112, 127 }, /* Profile 2. */
+            { 112, 127 }, /* Profile 3. */
+            { 112, 127 }, /* Profile 4. */
+            { 112, 127 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "SVP_NETWORK_GROUP_BITMAP_3_0",
+        .fid = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 392, 395 }, /* Profile 2. */
+            { 392, 395 }, /* Profile 3. */
+            { 392, 395 }, /* Profile 4. */
+            { 392, 395 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "SYSTEM_DESTINATION_15_0",
+        .fid = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 272, 287 }, /* Profile 2. */
+            { 288, 303 }, /* Profile 3. */
+            { 272, 287 }, /* Profile 4. */
+            { 288, 303 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "SYSTEM_OPCODE_3_0",
+        .fid = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 404, 407 }, /* Profile 2. */
+            { 404, 407 }, /* Profile 3. */
+            { 404, 407 }, /* Profile 4. */
+            { 404, 407 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "SYSTEM_SOURCE_15_0",
+        .fid = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 144, 159 }, /* Profile 2. */
+            { 144, 159 }, /* Profile 3. */
+            { 144, 159 }, /* Profile 4. */
+            { 144, 159 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "TIMESTAMP_CTRL_3_0",
+        .fid = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 380, 383 }, /* Profile 2. */
+            { 380, 383 }, /* Profile 3. */
+            { 380, 383 }, /* Profile 4. */
+            { 380, 383 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "TUNNEL_PROCESSING_RESULTS_1_3_0",
+        .fid = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 384, 387 }, /* Profile 2. */
+            { 384, 387 }, /* Profile 3. */
+            { 384, 387 }, /* Profile 4. */
+            { 384, 387 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "VFI_15_0",
+        .fid = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_VFI_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 128, 143 }, /* Profile 2. */
+            { 128, 143 }, /* Profile 3. */
+            { 128, 143 }, /* Profile 4. */
+            { 128, 143 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_1_0",
+        .fid = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_1_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 368, 369 }, /* Profile 2. */
+            { 368, 369 }, /* Profile 3. */
+            { 368, 369 }, /* Profile 4. */
+            { 368, 369 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+};static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_rxpmd_flex_field_info = {
+    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_FID_COUNT,
+    .info = bcm56880_a0_dna_4_11_4_0_rxpmd_flex_field_data,
+};
+
+static shr_enum_map_t bcm56880_a0_dna_4_11_4_0_rxpmd_flex_reason_names[] = {
+    BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_reasons_info_t bcm56880_a0_dna_4_11_4_0_rxpmd_flex_reasons_info = {
+    .num_reasons = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RXPMD_FLEX_REASON_COUNT,
+    .reason_names = bcm56880_a0_dna_4_11_4_0_rxpmd_flex_reason_names,
+    .reason_encode = bcm56880_a0_dna_4_11_4_0_rxpmd_flex_reason_encode,
+    .reason_decode = bcm56880_a0_dna_4_11_4_0_rxpmd_flex_reason_decode,
+};
+
+
+static int32_t bcmpkt_arp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_operation_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_operation_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_arp_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_ARP_T_FID_COUNT] = {
+    bcmpkt_arp_t_hardware_len_get,
+    bcmpkt_arp_t_hardware_type_get,
+    bcmpkt_arp_t_operation_get,
+    bcmpkt_arp_t_prot_addr_len_get,
+    bcmpkt_arp_t_protocol_type_get,
+    bcmpkt_arp_t_sender_ha_get,
+    bcmpkt_arp_t_sender_ip_get,
+    bcmpkt_arp_t_target_ha_get,
+    bcmpkt_arp_t_target_ip_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_arp_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_ARP_T_FID_COUNT] = {
+    bcmpkt_arp_t_hardware_len_set,
+    bcmpkt_arp_t_hardware_type_set,
+    bcmpkt_arp_t_operation_set,
+    bcmpkt_arp_t_prot_addr_len_set,
+    bcmpkt_arp_t_protocol_type_set,
+    bcmpkt_arp_t_sender_ha_set,
+    bcmpkt_arp_t_sender_ip_set,
+    bcmpkt_arp_t_target_ha_set,
+    bcmpkt_arp_t_target_ip_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_arp_t_field_data[] = {
+    BCM56880_A0_DNA_4_11_4_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_arp_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_ARP_T_FID_COUNT,
+    .info = bcm56880_a0_dna_4_11_4_0_arp_t_field_data,
+};
+
+
+static int32_t bcmpkt_authen_t_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_payload_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_payload_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_spi_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_spi_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_authen_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_AUTHEN_T_FID_COUNT] = {
+    bcmpkt_authen_t_data_get,
+    bcmpkt_authen_t_next_header_get,
+    bcmpkt_authen_t_payload_len_get,
+    bcmpkt_authen_t_reserved_get,
+    bcmpkt_authen_t_seq_num_get,
+    bcmpkt_authen_t_spi_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_authen_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_AUTHEN_T_FID_COUNT] = {
+    bcmpkt_authen_t_data_set,
+    bcmpkt_authen_t_next_header_set,
+    bcmpkt_authen_t_payload_len_set,
+    bcmpkt_authen_t_reserved_set,
+    bcmpkt_authen_t_seq_num_set,
+    bcmpkt_authen_t_spi_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_authen_t_field_data[] = {
+    BCM56880_A0_DNA_4_11_4_0_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_authen_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_AUTHEN_T_FID_COUNT,
+    .info = bcm56880_a0_dna_4_11_4_0_authen_t_field_data,
+};
+
+
+static int32_t bcmpkt_bfd_t_desmintxintv_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_desmintxintv_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_minechorxintv_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_minechorxintv_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_reqminrxintv_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_reqminrxintv_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_ap_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 18, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_ap_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 18, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_bfd_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_bfd_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_cpi_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 19, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_cpi_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 19, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_dem_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 17, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_dem_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 17, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_detectmult_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_detectmult_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_diag_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 5);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_diag_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 5, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_fin_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 20, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_fin_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 20, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_mpt_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_mpt_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_mydiscrim_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_mydiscrim_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_poll_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 21, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_poll_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 21, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_sta_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 22, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_sta_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 22, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_urdiscrim_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_urdiscrim_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 29, 3);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 29, 3, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_bfd_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_FID_COUNT] = {
+    bcmpkt_bfd_t_ap_get,
+    bcmpkt_bfd_t_bfd_length_get,
+    bcmpkt_bfd_t_cpi_get,
+    bcmpkt_bfd_t_dem_get,
+    bcmpkt_bfd_t_desmintxintv_get,
+    bcmpkt_bfd_t_detectmult_get,
+    bcmpkt_bfd_t_diag_get,
+    bcmpkt_bfd_t_fin_get,
+    bcmpkt_bfd_t_minechorxintv_get,
+    bcmpkt_bfd_t_mpt_get,
+    bcmpkt_bfd_t_mydiscrim_get,
+    bcmpkt_bfd_t_poll_get,
+    bcmpkt_bfd_t_reqminrxintv_get,
+    bcmpkt_bfd_t_sta_get,
+    bcmpkt_bfd_t_urdiscrim_get,
+    bcmpkt_bfd_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_bfd_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_FID_COUNT] = {
+    bcmpkt_bfd_t_ap_set,
+    bcmpkt_bfd_t_bfd_length_set,
+    bcmpkt_bfd_t_cpi_set,
+    bcmpkt_bfd_t_dem_set,
+    bcmpkt_bfd_t_desmintxintv_set,
+    bcmpkt_bfd_t_detectmult_set,
+    bcmpkt_bfd_t_diag_set,
+    bcmpkt_bfd_t_fin_set,
+    bcmpkt_bfd_t_minechorxintv_set,
+    bcmpkt_bfd_t_mpt_set,
+    bcmpkt_bfd_t_mydiscrim_set,
+    bcmpkt_bfd_t_poll_set,
+    bcmpkt_bfd_t_reqminrxintv_set,
+    bcmpkt_bfd_t_sta_set,
+    bcmpkt_bfd_t_urdiscrim_set,
+    bcmpkt_bfd_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_bfd_t_field_data[] = {
+    BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_bfd_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_BFD_T_FID_COUNT,
+    .info = bcm56880_a0_dna_4_11_4_0_bfd_t_field_data,
+};
+
+
+static int32_t bcmpkt_cntag_t_rpid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_cntag_t_rpid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_cntag_t_tpid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_cntag_t_tpid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_cntag_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_CNTAG_T_FID_COUNT] = {
+    bcmpkt_cntag_t_rpid_get,
+    bcmpkt_cntag_t_tpid_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_cntag_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_CNTAG_T_FID_COUNT] = {
+    bcmpkt_cntag_t_rpid_set,
+    bcmpkt_cntag_t_tpid_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_cntag_t_field_data[] = {
+    BCM56880_A0_DNA_4_11_4_0_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_cntag_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_CNTAG_T_FID_COUNT,
+    .info = bcm56880_a0_dna_4_11_4_0_cntag_t_field_data,
+};
+
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_cpu_composites_0_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = {
+    bcmpkt_cpu_composites_0_t_dma_cont0_get,
+    bcmpkt_cpu_composites_0_t_dma_cont1_get,
+    bcmpkt_cpu_composites_0_t_dma_cont2_get,
+    bcmpkt_cpu_composites_0_t_dma_cont3_get,
+    bcmpkt_cpu_composites_0_t_dma_cont4_get,
+    bcmpkt_cpu_composites_0_t_dma_cont5_get,
+    bcmpkt_cpu_composites_0_t_dma_cont6_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_cpu_composites_0_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = {
+    bcmpkt_cpu_composites_0_t_dma_cont0_set,
+    bcmpkt_cpu_composites_0_t_dma_cont1_set,
+    bcmpkt_cpu_composites_0_t_dma_cont2_set,
+    bcmpkt_cpu_composites_0_t_dma_cont3_set,
+    bcmpkt_cpu_composites_0_t_dma_cont4_set,
+    bcmpkt_cpu_composites_0_t_dma_cont5_set,
+    bcmpkt_cpu_composites_0_t_dma_cont6_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_cpu_composites_0_t_field_data[] = {
+    BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_cpu_composites_0_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT,
+    .info = bcm56880_a0_dna_4_11_4_0_cpu_composites_0_t_field_data,
+};
+
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_cpu_composites_1_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = {
+    bcmpkt_cpu_composites_1_t_dma_cont10_get,
+    bcmpkt_cpu_composites_1_t_dma_cont11_get,
+    bcmpkt_cpu_composites_1_t_dma_cont12_get,
+    bcmpkt_cpu_composites_1_t_dma_cont13_get,
+    bcmpkt_cpu_composites_1_t_dma_cont14_get,
+    bcmpkt_cpu_composites_1_t_dma_cont15_get,
+    bcmpkt_cpu_composites_1_t_dma_cont16_get,
+    bcmpkt_cpu_composites_1_t_dma_cont17_get,
+    bcmpkt_cpu_composites_1_t_dma_cont7_get,
+    bcmpkt_cpu_composites_1_t_dma_cont8_get,
+    bcmpkt_cpu_composites_1_t_dma_cont9_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_cpu_composites_1_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = {
+    bcmpkt_cpu_composites_1_t_dma_cont10_set,
+    bcmpkt_cpu_composites_1_t_dma_cont11_set,
+    bcmpkt_cpu_composites_1_t_dma_cont12_set,
+    bcmpkt_cpu_composites_1_t_dma_cont13_set,
+    bcmpkt_cpu_composites_1_t_dma_cont14_set,
+    bcmpkt_cpu_composites_1_t_dma_cont15_set,
+    bcmpkt_cpu_composites_1_t_dma_cont16_set,
+    bcmpkt_cpu_composites_1_t_dma_cont17_set,
+    bcmpkt_cpu_composites_1_t_dma_cont7_set,
+    bcmpkt_cpu_composites_1_t_dma_cont8_set,
+    bcmpkt_cpu_composites_1_t_dma_cont9_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_cpu_composites_1_t_field_data[] = {
+    BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_cpu_composites_1_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT,
+    .info = bcm56880_a0_dna_4_11_4_0_cpu_composites_1_t_field_data,
+};
+
+
+static int32_t bcmpkt_dest_option_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_dest_option_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_dest_option_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_dest_option_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_dest_option_t_option_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_dest_option_t_option_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_dest_option_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_DEST_OPTION_T_FID_COUNT] = {
+    bcmpkt_dest_option_t_hdr_ext_len_get,
+    bcmpkt_dest_option_t_next_header_get,
+    bcmpkt_dest_option_t_option_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_dest_option_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_DEST_OPTION_T_FID_COUNT] = {
+    bcmpkt_dest_option_t_hdr_ext_len_set,
+    bcmpkt_dest_option_t_next_header_set,
+    bcmpkt_dest_option_t_option_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_dest_option_t_field_data[] = {
+    BCM56880_A0_DNA_4_11_4_0_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_dest_option_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_DEST_OPTION_T_FID_COUNT,
+    .info = bcm56880_a0_dna_4_11_4_0_dest_option_t_field_data,
+};
+
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 11, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 11, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 13, 3);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 13, 3, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 10);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 10, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_t_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 10, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_t_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 10, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 12);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 12, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_erspan3_fixed_hdr_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = {
+    bcmpkt_erspan3_fixed_hdr_t_bso_get,
+    bcmpkt_erspan3_fixed_hdr_t_cos_get,
+    bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get,
+    bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get,
+    bcmpkt_erspan3_fixed_hdr_t_session_id_get,
+    bcmpkt_erspan3_fixed_hdr_t_t_get,
+    bcmpkt_erspan3_fixed_hdr_t_timestamp_get,
+    bcmpkt_erspan3_fixed_hdr_t_ver_get,
+    bcmpkt_erspan3_fixed_hdr_t_vlan_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_erspan3_fixed_hdr_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = {
+    bcmpkt_erspan3_fixed_hdr_t_bso_set,
+    bcmpkt_erspan3_fixed_hdr_t_cos_set,
+    bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set,
+    bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set,
+    bcmpkt_erspan3_fixed_hdr_t_session_id_set,
+    bcmpkt_erspan3_fixed_hdr_t_t_set,
+    bcmpkt_erspan3_fixed_hdr_t_timestamp_set,
+    bcmpkt_erspan3_fixed_hdr_t_ver_set,
+    bcmpkt_erspan3_fixed_hdr_t_vlan_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_erspan3_fixed_hdr_t_field_data[] = {
+    BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_erspan3_fixed_hdr_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT,
+    .info = bcm56880_a0_dna_4_11_4_0_erspan3_fixed_hdr_t_field_data,
+};
+
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 26, 6);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 26, 6, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 10);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 10, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_erspan3_subhdr_5_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = {
+    bcmpkt_erspan3_subhdr_5_t_platform_id_get,
+    bcmpkt_erspan3_subhdr_5_t_port_id_get,
+    bcmpkt_erspan3_subhdr_5_t_switch_id_get,
+    bcmpkt_erspan3_subhdr_5_t_timestamp_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_erspan3_subhdr_5_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = {
+    bcmpkt_erspan3_subhdr_5_t_platform_id_set,
+    bcmpkt_erspan3_subhdr_5_t_port_id_set,
+    bcmpkt_erspan3_subhdr_5_t_switch_id_set,
+    bcmpkt_erspan3_subhdr_5_t_timestamp_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_erspan3_subhdr_5_t_field_data[] = {
+    BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_erspan3_subhdr_5_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT,
+    .info = bcm56880_a0_dna_4_11_4_0_erspan3_subhdr_5_t_field_data,
+};
+
+
+static int32_t bcmpkt_esp_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_pad_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 8, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_pad_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 8, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_pad_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_pad_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_spi_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_spi_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_esp_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_ESP_T_FID_COUNT] = {
+    bcmpkt_esp_t_next_header_get,
+    bcmpkt_esp_t_pad_get,
+    bcmpkt_esp_t_pad_len_get,
+    bcmpkt_esp_t_seq_num_get,
+    bcmpkt_esp_t_spi_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_esp_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_ESP_T_FID_COUNT] = {
+    bcmpkt_esp_t_next_header_set,
+    bcmpkt_esp_t_pad_set,
+    bcmpkt_esp_t_pad_len_set,
+    bcmpkt_esp_t_seq_num_set,
+    bcmpkt_esp_t_spi_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_esp_t_field_data[] = {
+    BCM56880_A0_DNA_4_11_4_0_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_esp_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_ESP_T_FID_COUNT,
+    .info = bcm56880_a0_dna_4_11_4_0_esp_t_field_data,
+};
+
+
+static int32_t bcmpkt_etag_t_tag_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_etag_t_tag_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_etag_t_tpid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_etag_t_tpid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_etag_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_ETAG_T_FID_COUNT] = {
+    bcmpkt_etag_t_tag_get,
+    bcmpkt_etag_t_tpid_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_etag_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_ETAG_T_FID_COUNT] = {
+    bcmpkt_etag_t_tag_set,
+    bcmpkt_etag_t_tpid_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_etag_t_field_data[] = {
+    BCM56880_A0_DNA_4_11_4_0_BCMPKT_ETAG_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_etag_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_ETAG_T_FID_COUNT,
+    .info = bcm56880_a0_dna_4_11_4_0_etag_t_field_data,
+};
+
+
+static int32_t bcmpkt_ethertype_t_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ethertype_t_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_ethertype_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = {
+    bcmpkt_ethertype_t_type_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_ethertype_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = {
+    bcmpkt_ethertype_t_type_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_ethertype_t_field_data[] = {
+    BCM56880_A0_DNA_4_11_4_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_ethertype_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_ETHERTYPE_T_FID_COUNT,
+    .info = bcm56880_a0_dna_4_11_4_0_ethertype_t_field_data,
+};
+
+
+static int32_t bcmpkt_frag_t_frag_info_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_frag_t_frag_info_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_frag_t_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_frag_t_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_frag_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_frag_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_frag_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_frag_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_frag_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_FRAG_T_FID_COUNT] = {
+    bcmpkt_frag_t_frag_info_get,
+    bcmpkt_frag_t_id_get,
+    bcmpkt_frag_t_next_header_get,
+    bcmpkt_frag_t_reserved_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_frag_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_FRAG_T_FID_COUNT] = {
+    bcmpkt_frag_t_frag_info_set,
+    bcmpkt_frag_t_id_set,
+    bcmpkt_frag_t_next_header_set,
+    bcmpkt_frag_t_reserved_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_frag_t_field_data[] = {
+    BCM56880_A0_DNA_4_11_4_0_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_frag_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_FRAG_T_FID_COUNT,
+    .info = bcm56880_a0_dna_4_11_4_0_frag_t_field_data,
+};
+
+
+static int32_t bcmpkt_generic_loopback_t_destination_obj_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_destination_obj_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_destination_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_destination_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_entropy_obj_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_entropy_obj_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_header_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 20, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_header_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 20, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_input_priority_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 12, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_input_priority_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 12, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_interface_ctrl_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 4, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_interface_ctrl_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 4, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_interface_obj_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_interface_obj_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_qos_obj_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_qos_obj_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_reserved_1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_reserved_1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_reserved_2_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_reserved_2_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_source_system_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_source_system_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_start_byte_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_start_byte_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_generic_loopback_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = {
+    bcmpkt_generic_loopback_t_destination_obj_get,
+    bcmpkt_generic_loopback_t_destination_type_get,
+    bcmpkt_generic_loopback_t_entropy_obj_get,
+    bcmpkt_generic_loopback_t_flags_get,
+    bcmpkt_generic_loopback_t_header_type_get,
+    bcmpkt_generic_loopback_t_input_priority_get,
+    bcmpkt_generic_loopback_t_interface_ctrl_get,
+    bcmpkt_generic_loopback_t_interface_obj_get,
+    bcmpkt_generic_loopback_t_processing_ctrl_0_get,
+    bcmpkt_generic_loopback_t_processing_ctrl_1_get,
+    bcmpkt_generic_loopback_t_qos_obj_get,
+    bcmpkt_generic_loopback_t_reserved_1_get,
+    bcmpkt_generic_loopback_t_reserved_2_get,
+    bcmpkt_generic_loopback_t_source_system_port_get,
+    bcmpkt_generic_loopback_t_start_byte_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_generic_loopback_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = {
+    bcmpkt_generic_loopback_t_destination_obj_set,
+    bcmpkt_generic_loopback_t_destination_type_set,
+    bcmpkt_generic_loopback_t_entropy_obj_set,
+    bcmpkt_generic_loopback_t_flags_set,
+    bcmpkt_generic_loopback_t_header_type_set,
+    bcmpkt_generic_loopback_t_input_priority_set,
+    bcmpkt_generic_loopback_t_interface_ctrl_set,
+    bcmpkt_generic_loopback_t_interface_obj_set,
+    bcmpkt_generic_loopback_t_processing_ctrl_0_set,
+    bcmpkt_generic_loopback_t_processing_ctrl_1_set,
+    bcmpkt_generic_loopback_t_qos_obj_set,
+    bcmpkt_generic_loopback_t_reserved_1_set,
+    bcmpkt_generic_loopback_t_reserved_2_set,
+    bcmpkt_generic_loopback_t_source_system_port_set,
+    bcmpkt_generic_loopback_t_start_byte_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_generic_loopback_t_field_data[] = {
+    BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_generic_loopback_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT,
+    .info = bcm56880_a0_dna_4_11_4_0_generic_loopback_t_field_data,
+};
+
+
+static int32_t bcmpkt_gpe_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_next_protocol_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_next_protocol_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_reserved0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_reserved0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_reserved1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_reserved1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_vni_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 8, 24);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_vni_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 8, 24, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_gpe_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_GPE_T_FID_COUNT] = {
+    bcmpkt_gpe_t_flags_get,
+    bcmpkt_gpe_t_next_protocol_get,
+    bcmpkt_gpe_t_reserved0_get,
+    bcmpkt_gpe_t_reserved1_get,
+    bcmpkt_gpe_t_vni_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_gpe_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_GPE_T_FID_COUNT] = {
+    bcmpkt_gpe_t_flags_set,
+    bcmpkt_gpe_t_next_protocol_set,
+    bcmpkt_gpe_t_reserved0_set,
+    bcmpkt_gpe_t_reserved1_set,
+    bcmpkt_gpe_t_vni_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_gpe_t_field_data[] = {
+    BCM56880_A0_DNA_4_11_4_0_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_gpe_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_GPE_T_FID_COUNT,
+    .info = bcm56880_a0_dna_4_11_4_0_gpe_t_field_data,
+};
+
+
+static int32_t bcmpkt_gre_chksum_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_chksum_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gre_chksum_t_offset_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_chksum_t_offset_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_gre_chksum_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = {
+    bcmpkt_gre_chksum_t_checksum_get,
+    bcmpkt_gre_chksum_t_offset_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_gre_chksum_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = {
+    bcmpkt_gre_chksum_t_checksum_set,
+    bcmpkt_gre_chksum_t_offset_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_gre_chksum_t_field_data[] = {
+    BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_gre_chksum_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT,
+    .info = bcm56880_a0_dna_4_11_4_0_gre_chksum_t_field_data,
+};
+
+
+static int32_t bcmpkt_gre_key_t_key_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_key_t_key_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_gre_key_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_KEY_T_FID_COUNT] = {
+    bcmpkt_gre_key_t_key_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_gre_key_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_KEY_T_FID_COUNT] = {
+    bcmpkt_gre_key_t_key_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_gre_key_t_field_data[] = {
+    BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_gre_key_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_KEY_T_FID_COUNT,
+    .info = bcm56880_a0_dna_4_11_4_0_gre_key_t_field_data,
+};
+
+
+static int32_t bcmpkt_gre_rout_t_routing_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_rout_t_routing_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_gre_rout_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_ROUT_T_FID_COUNT] = {
+    bcmpkt_gre_rout_t_routing_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_gre_rout_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_ROUT_T_FID_COUNT] = {
+    bcmpkt_gre_rout_t_routing_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_gre_rout_t_field_data[] = {
+    BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_gre_rout_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_ROUT_T_FID_COUNT,
+    .info = bcm56880_a0_dna_4_11_4_0_gre_rout_t_field_data,
+};
+
+
+static int32_t bcmpkt_gre_seq_t_sequence_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_seq_t_sequence_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_gre_seq_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_SEQ_T_FID_COUNT] = {
+    bcmpkt_gre_seq_t_sequence_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_gre_seq_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_SEQ_T_FID_COUNT] = {
+    bcmpkt_gre_seq_t_sequence_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_gre_seq_t_field_data[] = {
+    BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_gre_seq_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_SEQ_T_FID_COUNT,
+    .info = bcm56880_a0_dna_4_11_4_0_gre_seq_t_field_data,
+};
+
+
+static int32_t bcmpkt_gre_t_c_r_k_s_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_t_c_r_k_s_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gre_t_protocol_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_t_protocol_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gre_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 19, 9);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 19, 9, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gre_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 3);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 3, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_gre_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_T_FID_COUNT] = {
+    bcmpkt_gre_t_c_r_k_s_get,
+    bcmpkt_gre_t_protocol_get,
+    bcmpkt_gre_t_reserved_get,
+    bcmpkt_gre_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_gre_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_T_FID_COUNT] = {
+    bcmpkt_gre_t_c_r_k_s_set,
+    bcmpkt_gre_t_protocol_set,
+    bcmpkt_gre_t_reserved_set,
+    bcmpkt_gre_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_gre_t_field_data[] = {
+    BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_gre_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_GRE_T_FID_COUNT,
+    .info = bcm56880_a0_dna_4_11_4_0_gre_t_field_data,
+};
+
+
+static int32_t bcmpkt_hg3_base_t_cn_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 4, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_cn_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 4, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_cng_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 6, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_cng_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 6, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_entropy_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 8, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_entropy_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 8, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_ext_hdr_present_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 18, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_ext_hdr_present_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 18, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_hg3_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 17, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_hg3_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 17, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_l3_routed_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 31, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_l3_routed_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 31, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_mirror_copy_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_mirror_copy_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_reserved_etype_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 22, 10);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_reserved_etype_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 22, 10, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_system_destination_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 15);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_system_destination_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 15, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_system_destination_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 15, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_system_destination_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 15, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_system_source_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 15);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_system_source_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 15, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_tc_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_tc_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 20, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 20, 2, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_hg3_base_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_FID_COUNT] = {
+    bcmpkt_hg3_base_t_cn_get,
+    bcmpkt_hg3_base_t_cng_get,
+    bcmpkt_hg3_base_t_entropy_get,
+    bcmpkt_hg3_base_t_ext_hdr_present_get,
+    bcmpkt_hg3_base_t_hg3_reserved_get,
+    bcmpkt_hg3_base_t_l3_routed_get,
+    bcmpkt_hg3_base_t_mirror_copy_get,
+    bcmpkt_hg3_base_t_reserved_etype_get,
+    bcmpkt_hg3_base_t_system_destination_get,
+    bcmpkt_hg3_base_t_system_destination_type_get,
+    bcmpkt_hg3_base_t_system_source_get,
+    bcmpkt_hg3_base_t_tc_get,
+    bcmpkt_hg3_base_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_hg3_base_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_FID_COUNT] = {
+    bcmpkt_hg3_base_t_cn_set,
+    bcmpkt_hg3_base_t_cng_set,
+    bcmpkt_hg3_base_t_entropy_set,
+    bcmpkt_hg3_base_t_ext_hdr_present_set,
+    bcmpkt_hg3_base_t_hg3_reserved_set,
+    bcmpkt_hg3_base_t_l3_routed_set,
+    bcmpkt_hg3_base_t_mirror_copy_set,
+    bcmpkt_hg3_base_t_reserved_etype_set,
+    bcmpkt_hg3_base_t_system_destination_set,
+    bcmpkt_hg3_base_t_system_destination_type_set,
+    bcmpkt_hg3_base_t_system_source_set,
+    bcmpkt_hg3_base_t_tc_set,
+    bcmpkt_hg3_base_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_hg3_base_t_field_data[] = {
+    BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_hg3_base_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_BASE_T_FID_COUNT,
+    .info = bcm56880_a0_dna_4_11_4_0_hg3_base_t_field_data,
+};
+
+
+static int32_t bcmpkt_hg3_extension_0_t_class_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_extension_0_t_class_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_extension_0_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_extension_0_t_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_extension_0_t_forwarding_domain_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_extension_0_t_forwarding_domain_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_extension_0_t_svp_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_extension_0_t_svp_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_hg3_extension_0_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT] = {
+    bcmpkt_hg3_extension_0_t_class_id_get,
+    bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_get,
+    bcmpkt_hg3_extension_0_t_flags_get,
+    bcmpkt_hg3_extension_0_t_forwarding_domain_get,
+    bcmpkt_hg3_extension_0_t_svp_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_hg3_extension_0_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT] = {
+    bcmpkt_hg3_extension_0_t_class_id_set,
+    bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_set,
+    bcmpkt_hg3_extension_0_t_flags_set,
+    bcmpkt_hg3_extension_0_t_forwarding_domain_set,
+    bcmpkt_hg3_extension_0_t_svp_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_hg3_extension_0_t_field_data[] = {
+    BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_EXTENSION_0_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_hg3_extension_0_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT,
+    .info = bcm56880_a0_dna_4_11_4_0_hg3_extension_0_t_field_data,
+};
+
+
+static int32_t bcmpkt_hop_by_hop_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hop_by_hop_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hop_by_hop_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hop_by_hop_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hop_by_hop_t_option_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_hop_by_hop_t_option_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_hop_by_hop_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = {
+    bcmpkt_hop_by_hop_t_hdr_ext_len_get,
+    bcmpkt_hop_by_hop_t_next_header_get,
+    bcmpkt_hop_by_hop_t_option_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_hop_by_hop_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = {
+    bcmpkt_hop_by_hop_t_hdr_ext_len_set,
+    bcmpkt_hop_by_hop_t_next_header_set,
+    bcmpkt_hop_by_hop_t_option_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_hop_by_hop_t_field_data[] = {
+    BCM56880_A0_DNA_4_11_4_0_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_hop_by_hop_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT,
+    .info = bcm56880_a0_dna_4_11_4_0_hop_by_hop_t_field_data,
+};
+
+
+static int32_t bcmpkt_icmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_icmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_icmp_t_code_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_icmp_t_code_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_icmp_t_icmp_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_icmp_t_icmp_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_icmp_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_ICMP_T_FID_COUNT] = {
+    bcmpkt_icmp_t_checksum_get,
+    bcmpkt_icmp_t_code_get,
+    bcmpkt_icmp_t_icmp_type_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_icmp_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_ICMP_T_FID_COUNT] = {
+    bcmpkt_icmp_t_checksum_set,
+    bcmpkt_icmp_t_code_set,
+    bcmpkt_icmp_t_icmp_type_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_icmp_t_field_data[] = {
+    BCM56880_A0_DNA_4_11_4_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_icmp_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_ICMP_T_FID_COUNT,
+    .info = bcm56880_a0_dna_4_11_4_0_icmp_t_field_data,
+};
+
+
+static int32_t bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_0_a_t_lns_device_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 24);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_0_a_t_lns_device_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 24, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_ifa_flex_md_0_a_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT] = {
+    bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_get,
+    bcmpkt_ifa_flex_md_0_a_t_lns_device_id_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_ifa_flex_md_0_a_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT] = {
+    bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_set,
+    bcmpkt_ifa_flex_md_0_a_t_lns_device_id_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_ifa_flex_md_0_a_t_field_data[] = {
+    BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_0_A_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_ifa_flex_md_0_a_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT,
+    .info = bcm56880_a0_dna_4_11_4_0_ifa_flex_md_0_a_t_field_data,
+};
+
+
+static int32_t bcmpkt_ifa_flex_md_0_b_t_cn_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 26, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_0_b_t_cn_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 26, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_0_b_t_port_speed_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_0_b_t_port_speed_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_0_b_t_queue_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 20, 6);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_0_b_t_queue_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 20, 6, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 20);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 20, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_ifa_flex_md_0_b_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT] = {
+    bcmpkt_ifa_flex_md_0_b_t_cn_get,
+    bcmpkt_ifa_flex_md_0_b_t_port_speed_get,
+    bcmpkt_ifa_flex_md_0_b_t_queue_id_get,
+    bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_ifa_flex_md_0_b_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT] = {
+    bcmpkt_ifa_flex_md_0_b_t_cn_set,
+    bcmpkt_ifa_flex_md_0_b_t_port_speed_set,
+    bcmpkt_ifa_flex_md_0_b_t_queue_id_set,
+    bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_ifa_flex_md_0_b_t_field_data[] = {
+    BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_0_B_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_ifa_flex_md_0_b_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT,
+    .info = bcm56880_a0_dna_4_11_4_0_ifa_flex_md_0_b_t_field_data,
+};
+
+
+static int32_t bcmpkt_ifa_flex_md_1_t_egress_port_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_1_t_egress_port_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_1_t_ingress_port_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_1_t_ingress_port_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_ifa_flex_md_1_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT] = {
+    bcmpkt_ifa_flex_md_1_t_egress_port_id_get,
+    bcmpkt_ifa_flex_md_1_t_ingress_port_id_get,
+    bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_ifa_flex_md_1_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT] = {
+    bcmpkt_ifa_flex_md_1_t_egress_port_id_set,
+    bcmpkt_ifa_flex_md_1_t_ingress_port_id_set,
+    bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_ifa_flex_md_1_t_field_data[] = {
+    BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_1_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_ifa_flex_md_1_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT,
+    .info = bcm56880_a0_dna_4_11_4_0_ifa_flex_md_1_t_field_data,
+};
+
+
+static int32_t bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_ifa_flex_md_2_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT] = {
+    bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_get,
+    bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_ifa_flex_md_2_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT] = {
+    bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_set,
+    bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_ifa_flex_md_2_t_field_data[] = {
+    BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_2_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_ifa_flex_md_2_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT,
+    .info = bcm56880_a0_dna_4_11_4_0_ifa_flex_md_2_t_field_data,
+};
+
+
+static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_ifa_flex_md_3_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT] = {
+    bcmpkt_ifa_flex_md_3_t_mmu_stat_0_get,
+    bcmpkt_ifa_flex_md_3_t_mmu_stat_1_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_ifa_flex_md_3_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT] = {
+    bcmpkt_ifa_flex_md_3_t_mmu_stat_0_set,
+    bcmpkt_ifa_flex_md_3_t_mmu_stat_1_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_ifa_flex_md_3_t_field_data[] = {
+    BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_3_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_ifa_flex_md_3_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT,
+    .info = bcm56880_a0_dna_4_11_4_0_ifa_flex_md_3_t_field_data,
+};
+
+
+static int32_t bcmpkt_ifa_header_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_gns_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_gns_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_max_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_max_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_next_hdr_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_next_hdr_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_ver_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_ver_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_ifa_header_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_HEADER_T_FID_COUNT] = {
+    bcmpkt_ifa_header_t_flags_get,
+    bcmpkt_ifa_header_t_gns_get,
+    bcmpkt_ifa_header_t_max_length_get,
+    bcmpkt_ifa_header_t_next_hdr_get,
+    bcmpkt_ifa_header_t_ver_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_ifa_header_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_HEADER_T_FID_COUNT] = {
+    bcmpkt_ifa_header_t_flags_set,
+    bcmpkt_ifa_header_t_gns_set,
+    bcmpkt_ifa_header_t_max_length_set,
+    bcmpkt_ifa_header_t_next_hdr_set,
+    bcmpkt_ifa_header_t_ver_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_ifa_header_t_field_data[] = {
+    BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_ifa_header_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_HEADER_T_FID_COUNT,
+    .info = bcm56880_a0_dna_4_11_4_0_ifa_header_t_field_data,
+};
+
+
+static int32_t bcmpkt_ifa_md_base_t_action_vector_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_md_base_t_action_vector_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_md_base_t_hop_limit_current_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_md_base_t_hop_limit_current_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_md_base_t_request_vector_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_md_base_t_request_vector_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_ifa_md_base_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT] = {
+    bcmpkt_ifa_md_base_t_action_vector_get,
+    bcmpkt_ifa_md_base_t_hop_limit_current_length_get,
+    bcmpkt_ifa_md_base_t_request_vector_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_ifa_md_base_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT] = {
+    bcmpkt_ifa_md_base_t_action_vector_set,
+    bcmpkt_ifa_md_base_t_hop_limit_current_length_set,
+    bcmpkt_ifa_md_base_t_request_vector_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_ifa_md_base_t_field_data[] = {
+    BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_MD_BASE_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_ifa_md_base_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT,
+    .info = bcm56880_a0_dna_4_11_4_0_ifa_md_base_t_field_data,
+};
+
+
+static int32_t bcmpkt_ifa_metadata_t_action_vector_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_t_action_vector_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_t_hop_limit_current_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_t_hop_limit_current_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_t_metadata_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_t_metadata_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_t_request_vector_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_t_request_vector_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_ifa_metadata_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_METADATA_T_FID_COUNT] = {
+    bcmpkt_ifa_metadata_t_action_vector_get,
+    bcmpkt_ifa_metadata_t_hop_limit_current_length_get,
+    bcmpkt_ifa_metadata_t_metadata_get,
+    bcmpkt_ifa_metadata_t_request_vector_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_ifa_metadata_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_METADATA_T_FID_COUNT] = {
+    bcmpkt_ifa_metadata_t_action_vector_set,
+    bcmpkt_ifa_metadata_t_hop_limit_current_length_set,
+    bcmpkt_ifa_metadata_t_metadata_set,
+    bcmpkt_ifa_metadata_t_request_vector_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_ifa_metadata_t_field_data[] = {
+    BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_METADATA_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_ifa_metadata_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_IFA_METADATA_T_FID_COUNT,
+    .info = bcm56880_a0_dna_4_11_4_0_ifa_metadata_t_field_data,
+};
+
+
+static int32_t bcmpkt_igmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_igmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_igmp_t_group_address_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_igmp_t_group_address_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_igmp_t_igmp_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_igmp_t_igmp_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_igmp_t_max_resp_time_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_igmp_t_max_resp_time_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_igmp_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_IGMP_T_FID_COUNT] = {
+    bcmpkt_igmp_t_checksum_get,
+    bcmpkt_igmp_t_group_address_get,
+    bcmpkt_igmp_t_igmp_type_get,
+    bcmpkt_igmp_t_max_resp_time_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_igmp_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_IGMP_T_FID_COUNT] = {
+    bcmpkt_igmp_t_checksum_set,
+    bcmpkt_igmp_t_group_address_set,
+    bcmpkt_igmp_t_igmp_type_set,
+    bcmpkt_igmp_t_max_resp_time_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_igmp_t_field_data[] = {
+    BCM56880_A0_DNA_4_11_4_0_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_igmp_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_IGMP_T_FID_COUNT,
+    .info = bcm56880_a0_dna_4_11_4_0_igmp_t_field_data,
+};
+
+
+static int32_t bcmpkt_ipfix_t_export_time_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_export_time_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_obs_domain_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_obs_domain_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_ipfix_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPFIX_T_FID_COUNT] = {
+    bcmpkt_ipfix_t_export_time_get,
+    bcmpkt_ipfix_t_length_get,
+    bcmpkt_ipfix_t_obs_domain_id_get,
+    bcmpkt_ipfix_t_sequence_num_get,
+    bcmpkt_ipfix_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_ipfix_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPFIX_T_FID_COUNT] = {
+    bcmpkt_ipfix_t_export_time_set,
+    bcmpkt_ipfix_t_length_set,
+    bcmpkt_ipfix_t_obs_domain_id_set,
+    bcmpkt_ipfix_t_sequence_num_set,
+    bcmpkt_ipfix_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_ipfix_t_field_data[] = {
+    BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_ipfix_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPFIX_T_FID_COUNT,
+    .info = bcm56880_a0_dna_4_11_4_0_ipfix_t_field_data,
+};
+
+
+static int32_t bcmpkt_ipv4_t_da_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_da_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_flags_frag_offset_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_flags_frag_offset_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_hdr_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_hdr_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_option_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_option_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_protocol_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_protocol_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_sa_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_sa_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_tos_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_tos_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_total_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_total_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_ttl_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_ttl_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_version_hdr_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_version_hdr_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_ipv4_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV4_T_FID_COUNT] = {
+    bcmpkt_ipv4_t_da_get,
+    bcmpkt_ipv4_t_flags_frag_offset_get,
+    bcmpkt_ipv4_t_hdr_checksum_get,
+    bcmpkt_ipv4_t_id_get,
+    bcmpkt_ipv4_t_option_get,
+    bcmpkt_ipv4_t_protocol_get,
+    bcmpkt_ipv4_t_sa_get,
+    bcmpkt_ipv4_t_tos_get,
+    bcmpkt_ipv4_t_total_length_get,
+    bcmpkt_ipv4_t_ttl_get,
+    bcmpkt_ipv4_t_version_hdr_len_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_ipv4_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV4_T_FID_COUNT] = {
+    bcmpkt_ipv4_t_da_set,
+    bcmpkt_ipv4_t_flags_frag_offset_set,
+    bcmpkt_ipv4_t_hdr_checksum_set,
+    bcmpkt_ipv4_t_id_set,
+    bcmpkt_ipv4_t_option_set,
+    bcmpkt_ipv4_t_protocol_set,
+    bcmpkt_ipv4_t_sa_set,
+    bcmpkt_ipv4_t_tos_set,
+    bcmpkt_ipv4_t_total_length_set,
+    bcmpkt_ipv4_t_ttl_set,
+    bcmpkt_ipv4_t_version_hdr_len_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_ipv4_t_field_data[] = {
+    BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_ipv4_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV4_T_FID_COUNT,
+    .info = bcm56880_a0_dna_4_11_4_0_ipv4_t_field_data,
+};
+
+
+static int32_t bcmpkt_ipv6_t_da_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_da_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_flow_label_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 20);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_flow_label_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 20, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_hop_limit_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_hop_limit_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 8, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 8, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_payload_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_payload_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_sa_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_sa_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_traffic_class_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 20, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_traffic_class_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 20, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_ipv6_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV6_T_FID_COUNT] = {
+    bcmpkt_ipv6_t_da_get,
+    bcmpkt_ipv6_t_flow_label_get,
+    bcmpkt_ipv6_t_hop_limit_get,
+    bcmpkt_ipv6_t_next_header_get,
+    bcmpkt_ipv6_t_payload_length_get,
+    bcmpkt_ipv6_t_sa_get,
+    bcmpkt_ipv6_t_traffic_class_get,
+    bcmpkt_ipv6_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_ipv6_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV6_T_FID_COUNT] = {
+    bcmpkt_ipv6_t_da_set,
+    bcmpkt_ipv6_t_flow_label_set,
+    bcmpkt_ipv6_t_hop_limit_set,
+    bcmpkt_ipv6_t_next_header_set,
+    bcmpkt_ipv6_t_payload_length_set,
+    bcmpkt_ipv6_t_sa_set,
+    bcmpkt_ipv6_t_traffic_class_set,
+    bcmpkt_ipv6_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_ipv6_t_field_data[] = {
+    BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_ipv6_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_IPV6_T_FID_COUNT,
+    .info = bcm56880_a0_dna_4_11_4_0_ipv6_t_field_data,
+};
+
+
+static int32_t bcmpkt_l2_t_macda_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_l2_t_macda_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_l2_t_macsa_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_l2_t_macsa_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_l2_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_L2_T_FID_COUNT] = {
+    bcmpkt_l2_t_macda_get,
+    bcmpkt_l2_t_macsa_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_l2_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_L2_T_FID_COUNT] = {
+    bcmpkt_l2_t_macda_set,
+    bcmpkt_l2_t_macsa_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_l2_t_field_data[] = {
+    BCM56880_A0_DNA_4_11_4_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_l2_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_L2_T_FID_COUNT,
+    .info = bcm56880_a0_dna_4_11_4_0_l2_t_field_data,
+};
+
+
+static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_mirror_erspan_sn_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = {
+    bcmpkt_mirror_erspan_sn_t_seq_num_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_mirror_erspan_sn_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = {
+    bcmpkt_mirror_erspan_sn_t_seq_num_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_mirror_erspan_sn_t_field_data[] = {
+    BCM56880_A0_DNA_4_11_4_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_mirror_erspan_sn_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT,
+    .info = bcm56880_a0_dna_4_11_4_0_mirror_erspan_sn_t_field_data,
+};
+
+
+static int32_t bcmpkt_mirror_transport_t_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_mirror_transport_t_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_mirror_transport_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = {
+    bcmpkt_mirror_transport_t_data_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_mirror_transport_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = {
+    bcmpkt_mirror_transport_t_data_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_mirror_transport_t_field_data[] = {
+    BCM56880_A0_DNA_4_11_4_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_mirror_transport_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT,
+    .info = bcm56880_a0_dna_4_11_4_0_mirror_transport_t_field_data,
+};
+
+
+static int32_t bcmpkt_mpls_ach_t_channel_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_ach_t_channel_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_ach_t_cw_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_ach_t_cw_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_ach_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_ach_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_ach_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_ach_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 4, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_mpls_ach_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_ACH_T_FID_COUNT] = {
+    bcmpkt_mpls_ach_t_channel_type_get,
+    bcmpkt_mpls_ach_t_cw_type_get,
+    bcmpkt_mpls_ach_t_reserved_get,
+    bcmpkt_mpls_ach_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_mpls_ach_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_ACH_T_FID_COUNT] = {
+    bcmpkt_mpls_ach_t_channel_type_set,
+    bcmpkt_mpls_ach_t_cw_type_set,
+    bcmpkt_mpls_ach_t_reserved_set,
+    bcmpkt_mpls_ach_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_mpls_ach_t_field_data[] = {
+    BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_mpls_ach_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_ACH_T_FID_COUNT,
+    .info = bcm56880_a0_dna_4_11_4_0_mpls_ach_t_field_data,
+};
+
+
+static int32_t bcmpkt_mpls_bv_t_value_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_bv_t_value_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_mpls_bv_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_BV_T_FID_COUNT] = {
+    bcmpkt_mpls_bv_t_value_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_mpls_bv_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_BV_T_FID_COUNT] = {
+    bcmpkt_mpls_bv_t_value_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_mpls_bv_t_field_data[] = {
+    BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_mpls_bv_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_BV_T_FID_COUNT,
+    .info = bcm56880_a0_dna_4_11_4_0_mpls_bv_t_field_data,
+};
+
+
+static int32_t bcmpkt_mpls_cw_t_cw_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_cw_t_cw_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_cw_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 12);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_cw_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 12, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_cw_t_seq_number_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_cw_t_seq_number_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_mpls_cw_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_CW_T_FID_COUNT] = {
+    bcmpkt_mpls_cw_t_cw_type_get,
+    bcmpkt_mpls_cw_t_reserved_get,
+    bcmpkt_mpls_cw_t_seq_number_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_mpls_cw_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_CW_T_FID_COUNT] = {
+    bcmpkt_mpls_cw_t_cw_type_set,
+    bcmpkt_mpls_cw_t_reserved_set,
+    bcmpkt_mpls_cw_t_seq_number_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_mpls_cw_t_field_data[] = {
+    BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_mpls_cw_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_CW_T_FID_COUNT,
+    .info = bcm56880_a0_dna_4_11_4_0_mpls_cw_t_field_data,
+};
+
+
+static int32_t bcmpkt_mpls_t_bos_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_t_bos_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_t_exp_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 9, 3);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_t_exp_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 9, 3, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_t_label_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 12, 20);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_t_label_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 12, 20, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_t_ttl_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_t_ttl_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_mpls_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_T_FID_COUNT] = {
+    bcmpkt_mpls_t_bos_get,
+    bcmpkt_mpls_t_exp_get,
+    bcmpkt_mpls_t_label_get,
+    bcmpkt_mpls_t_ttl_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_mpls_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_T_FID_COUNT] = {
+    bcmpkt_mpls_t_bos_set,
+    bcmpkt_mpls_t_exp_set,
+    bcmpkt_mpls_t_label_set,
+    bcmpkt_mpls_t_ttl_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_mpls_t_field_data[] = {
+    BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_mpls_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_MPLS_T_FID_COUNT,
+    .info = bcm56880_a0_dna_4_11_4_0_mpls_t_field_data,
+};
+
+
+static int32_t bcmpkt_p_1588_t_cntrl_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[8], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_cntrl_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[8], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_correction_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_correction_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_domain_nb_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_domain_nb_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_logmsginterval_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[8], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_logmsginterval_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[8], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_msg_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_msg_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_msg_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_msg_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_reserved1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 20, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_reserved1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 20, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_reserved2_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_reserved3_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_reserved3_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_seq_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[7], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_seq_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[7], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_srcportid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_srcportid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_transportspec_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_transportspec_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 4, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_p_1588_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T_FID_COUNT] = {
+    bcmpkt_p_1588_t_cntrl_get,
+    bcmpkt_p_1588_t_correction_get,
+    bcmpkt_p_1588_t_domain_nb_get,
+    bcmpkt_p_1588_t_flags_get,
+    bcmpkt_p_1588_t_logmsginterval_get,
+    bcmpkt_p_1588_t_msg_length_get,
+    bcmpkt_p_1588_t_msg_type_get,
+    bcmpkt_p_1588_t_reserved1_get,
+    bcmpkt_p_1588_t_reserved2_get,
+    bcmpkt_p_1588_t_reserved3_get,
+    bcmpkt_p_1588_t_seq_id_get,
+    bcmpkt_p_1588_t_srcportid_get,
+    bcmpkt_p_1588_t_transportspec_get,
+    bcmpkt_p_1588_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_p_1588_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T_FID_COUNT] = {
+    bcmpkt_p_1588_t_cntrl_set,
+    bcmpkt_p_1588_t_correction_set,
+    bcmpkt_p_1588_t_domain_nb_set,
+    bcmpkt_p_1588_t_flags_set,
+    bcmpkt_p_1588_t_logmsginterval_set,
+    bcmpkt_p_1588_t_msg_length_set,
+    bcmpkt_p_1588_t_msg_type_set,
+    bcmpkt_p_1588_t_reserved1_set,
+    bcmpkt_p_1588_t_reserved2_set,
+    bcmpkt_p_1588_t_reserved3_set,
+    bcmpkt_p_1588_t_seq_id_set,
+    bcmpkt_p_1588_t_srcportid_set,
+    bcmpkt_p_1588_t_transportspec_set,
+    bcmpkt_p_1588_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_p_1588_t_field_data[] = {
+    BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_p_1588_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_P_1588_T_FID_COUNT,
+    .info = bcm56880_a0_dna_4_11_4_0_p_1588_t_field_data,
+};
+
+
+static int32_t bcmpkt_prog_ext_hdr_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_prog_ext_hdr_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_prog_ext_hdr_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_prog_ext_hdr_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_prog_ext_hdr_t_option_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_prog_ext_hdr_t_option_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_prog_ext_hdr_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = {
+    bcmpkt_prog_ext_hdr_t_hdr_ext_len_get,
+    bcmpkt_prog_ext_hdr_t_next_header_get,
+    bcmpkt_prog_ext_hdr_t_option_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_prog_ext_hdr_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = {
+    bcmpkt_prog_ext_hdr_t_hdr_ext_len_set,
+    bcmpkt_prog_ext_hdr_t_next_header_set,
+    bcmpkt_prog_ext_hdr_t_option_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_prog_ext_hdr_t_field_data[] = {
+    BCM56880_A0_DNA_4_11_4_0_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_prog_ext_hdr_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT,
+    .info = bcm56880_a0_dna_4_11_4_0_prog_ext_hdr_t_field_data,
+};
+
+
+static int32_t bcmpkt_psamp_0_t_flowset_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_flowset_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_next_hop_index_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_next_hop_index_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_psamp_0_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_0_T_FID_COUNT] = {
+    bcmpkt_psamp_0_t_flowset_get,
+    bcmpkt_psamp_0_t_length_get,
+    bcmpkt_psamp_0_t_next_hop_index_get,
+    bcmpkt_psamp_0_t_obs_time_ns_get,
+    bcmpkt_psamp_0_t_obs_time_s_get,
+    bcmpkt_psamp_0_t_template_id_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_psamp_0_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_0_T_FID_COUNT] = {
+    bcmpkt_psamp_0_t_flowset_set,
+    bcmpkt_psamp_0_t_length_set,
+    bcmpkt_psamp_0_t_next_hop_index_set,
+    bcmpkt_psamp_0_t_obs_time_ns_set,
+    bcmpkt_psamp_0_t_obs_time_s_set,
+    bcmpkt_psamp_0_t_template_id_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_psamp_0_t_field_data[] = {
+    BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_psamp_0_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_0_T_FID_COUNT,
+    .info = bcm56880_a0_dna_4_11_4_0_psamp_0_t_field_data,
+};
+
+
+static int32_t bcmpkt_psamp_1_t_dlb_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_dlb_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_egress_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_egress_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_epoch_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_epoch_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_variable_flag_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_variable_flag_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 16, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_psamp_1_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_1_T_FID_COUNT] = {
+    bcmpkt_psamp_1_t_dlb_id_get,
+    bcmpkt_psamp_1_t_egress_port_get,
+    bcmpkt_psamp_1_t_epoch_get,
+    bcmpkt_psamp_1_t_ingress_port_get,
+    bcmpkt_psamp_1_t_sampled_length_get,
+    bcmpkt_psamp_1_t_user_meta_data_get,
+    bcmpkt_psamp_1_t_variable_flag_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_psamp_1_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_1_T_FID_COUNT] = {
+    bcmpkt_psamp_1_t_dlb_id_set,
+    bcmpkt_psamp_1_t_egress_port_set,
+    bcmpkt_psamp_1_t_epoch_set,
+    bcmpkt_psamp_1_t_ingress_port_set,
+    bcmpkt_psamp_1_t_sampled_length_set,
+    bcmpkt_psamp_1_t_user_meta_data_set,
+    bcmpkt_psamp_1_t_variable_flag_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_psamp_1_t_field_data[] = {
+    BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_psamp_1_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_1_T_FID_COUNT,
+    .info = bcm56880_a0_dna_4_11_4_0_psamp_1_t_field_data,
+};
+
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[4], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[4], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[4], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[4], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_psamp_mirror_on_drop_0_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = {
+    bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_length_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_template_id_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_psamp_mirror_on_drop_0_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = {
+    bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_length_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_template_id_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_psamp_mirror_on_drop_0_t_field_data[] = {
+    BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_psamp_mirror_on_drop_0_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT,
+    .info = bcm56880_a0_dna_4_11_4_0_psamp_mirror_on_drop_0_t_field_data,
+};
+
+
+static int32_t bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_psamp_mirror_on_drop_1_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT] = {
+    bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_get,
+    bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_get,
+    bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_get,
+    bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_get,
+    bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_get,
+    bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_psamp_mirror_on_drop_1_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT] = {
+    bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_set,
+    bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_set,
+    bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_set,
+    bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_set,
+    bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_set,
+    bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_psamp_mirror_on_drop_1_t_field_data[] = {
+    BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_psamp_mirror_on_drop_1_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT,
+    .info = bcm56880_a0_dna_4_11_4_0_psamp_mirror_on_drop_1_t_field_data,
+};
+
+
+static int32_t bcmpkt_rarp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_operation_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_operation_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_rarp_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_RARP_T_FID_COUNT] = {
+    bcmpkt_rarp_t_hardware_len_get,
+    bcmpkt_rarp_t_hardware_type_get,
+    bcmpkt_rarp_t_operation_get,
+    bcmpkt_rarp_t_prot_addr_len_get,
+    bcmpkt_rarp_t_protocol_type_get,
+    bcmpkt_rarp_t_sender_ha_get,
+    bcmpkt_rarp_t_sender_ip_get,
+    bcmpkt_rarp_t_target_ha_get,
+    bcmpkt_rarp_t_target_ip_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_rarp_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_RARP_T_FID_COUNT] = {
+    bcmpkt_rarp_t_hardware_len_set,
+    bcmpkt_rarp_t_hardware_type_set,
+    bcmpkt_rarp_t_operation_set,
+    bcmpkt_rarp_t_prot_addr_len_set,
+    bcmpkt_rarp_t_protocol_type_set,
+    bcmpkt_rarp_t_sender_ha_set,
+    bcmpkt_rarp_t_sender_ip_set,
+    bcmpkt_rarp_t_target_ha_set,
+    bcmpkt_rarp_t_target_ip_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_rarp_t_field_data[] = {
+    BCM56880_A0_DNA_4_11_4_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_rarp_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RARP_T_FID_COUNT,
+    .info = bcm56880_a0_dna_4_11_4_0_rarp_t_field_data,
+};
+
+
+static int32_t bcmpkt_routing_t_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_routing_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_routing_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_segments_left_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_segments_left_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_routing_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_ROUTING_T_FID_COUNT] = {
+    bcmpkt_routing_t_data_get,
+    bcmpkt_routing_t_hdr_ext_len_get,
+    bcmpkt_routing_t_next_header_get,
+    bcmpkt_routing_t_routing_type_get,
+    bcmpkt_routing_t_segments_left_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_routing_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_ROUTING_T_FID_COUNT] = {
+    bcmpkt_routing_t_data_set,
+    bcmpkt_routing_t_hdr_ext_len_set,
+    bcmpkt_routing_t_next_header_set,
+    bcmpkt_routing_t_routing_type_set,
+    bcmpkt_routing_t_segments_left_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_routing_t_field_data[] = {
+    BCM56880_A0_DNA_4_11_4_0_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_routing_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_ROUTING_T_FID_COUNT,
+    .info = bcm56880_a0_dna_4_11_4_0_routing_t_field_data,
+};
+
+
+static int32_t bcmpkt_rspan_t_tag_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rspan_t_tag_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rspan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rspan_t_tpid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_rspan_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_RSPAN_T_FID_COUNT] = {
+    bcmpkt_rspan_t_tag_get,
+    bcmpkt_rspan_t_tpid_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_rspan_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_RSPAN_T_FID_COUNT] = {
+    bcmpkt_rspan_t_tag_set,
+    bcmpkt_rspan_t_tpid_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_rspan_t_field_data[] = {
+    BCM56880_A0_DNA_4_11_4_0_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_rspan_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_RSPAN_T_FID_COUNT,
+    .info = bcm56880_a0_dna_4_11_4_0_rspan_t_field_data,
+};
+
+
+static int32_t bcmpkt_sflow_shim_0_t_sys_destination_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_0_t_sys_destination_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_0_t_sys_source_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_0_t_sys_source_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_0_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_0_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_sflow_shim_0_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = {
+    bcmpkt_sflow_shim_0_t_sys_destination_get,
+    bcmpkt_sflow_shim_0_t_sys_source_get,
+    bcmpkt_sflow_shim_0_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_sflow_shim_0_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = {
+    bcmpkt_sflow_shim_0_t_sys_destination_set,
+    bcmpkt_sflow_shim_0_t_sys_source_set,
+    bcmpkt_sflow_shim_0_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_sflow_shim_0_t_field_data[] = {
+    BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_sflow_shim_0_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT,
+    .info = bcm56880_a0_dna_4_11_4_0_sflow_shim_0_t_field_data,
+};
+
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_dest_sample_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 30, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_dest_sample_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 30, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_discarded_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 27, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_discarded_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 27, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_flex_sample_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 29, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_flex_sample_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 29, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_mcast_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_mcast_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_src_sample_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 31, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_src_sample_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 31, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_truncated_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 26, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_truncated_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 26, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 7);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 7, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 23, 3);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 23, 3, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_sflow_shim_1_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = {
+    bcmpkt_sflow_shim_1_t_flag_dest_sample_get,
+    bcmpkt_sflow_shim_1_t_flag_discarded_get,
+    bcmpkt_sflow_shim_1_t_flag_flex_sample_get,
+    bcmpkt_sflow_shim_1_t_flag_mcast_get,
+    bcmpkt_sflow_shim_1_t_flag_src_sample_get,
+    bcmpkt_sflow_shim_1_t_flag_truncated_get,
+    bcmpkt_sflow_shim_1_t_reserved_get,
+    bcmpkt_sflow_shim_1_t_sys_opcode_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_sflow_shim_1_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = {
+    bcmpkt_sflow_shim_1_t_flag_dest_sample_set,
+    bcmpkt_sflow_shim_1_t_flag_discarded_set,
+    bcmpkt_sflow_shim_1_t_flag_flex_sample_set,
+    bcmpkt_sflow_shim_1_t_flag_mcast_set,
+    bcmpkt_sflow_shim_1_t_flag_src_sample_set,
+    bcmpkt_sflow_shim_1_t_flag_truncated_set,
+    bcmpkt_sflow_shim_1_t_reserved_set,
+    bcmpkt_sflow_shim_1_t_sys_opcode_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_sflow_shim_1_t_field_data[] = {
+    BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_sflow_shim_1_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT,
+    .info = bcm56880_a0_dna_4_11_4_0_sflow_shim_1_t_field_data,
+};
+
+
+static int32_t bcmpkt_sflow_shim_2_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_2_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_sflow_shim_2_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = {
+    bcmpkt_sflow_shim_2_t_sequence_num_get,
+    bcmpkt_sflow_shim_2_t_user_meta_data_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_sflow_shim_2_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = {
+    bcmpkt_sflow_shim_2_t_sequence_num_set,
+    bcmpkt_sflow_shim_2_t_user_meta_data_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_sflow_shim_2_t_field_data[] = {
+    BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_sflow_shim_2_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT,
+    .info = bcm56880_a0_dna_4_11_4_0_sflow_shim_2_t_field_data,
+};
+
+
+static int32_t bcmpkt_snap_llc_t_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_snap_llc_t_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_snap_llc_t_snap_llc_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_snap_llc_t_snap_llc_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_snap_llc_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_SNAP_LLC_T_FID_COUNT] = {
+    bcmpkt_snap_llc_t_length_get,
+    bcmpkt_snap_llc_t_snap_llc_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_snap_llc_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_SNAP_LLC_T_FID_COUNT] = {
+    bcmpkt_snap_llc_t_length_set,
+    bcmpkt_snap_llc_t_snap_llc_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_snap_llc_t_field_data[] = {
+    BCM56880_A0_DNA_4_11_4_0_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_snap_llc_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_SNAP_LLC_T_FID_COUNT,
+    .info = bcm56880_a0_dna_4_11_4_0_snap_llc_t_field_data,
+};
+
+
+static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_first_4bytes_t_src_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_first_4bytes_t_src_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_tcp_first_4bytes_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = {
+    bcmpkt_tcp_first_4bytes_t_dst_port_get,
+    bcmpkt_tcp_first_4bytes_t_src_port_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_tcp_first_4bytes_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = {
+    bcmpkt_tcp_first_4bytes_t_dst_port_set,
+    bcmpkt_tcp_first_4bytes_t_src_port_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_tcp_first_4bytes_t_field_data[] = {
+    BCM56880_A0_DNA_4_11_4_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_tcp_first_4bytes_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT,
+    .info = bcm56880_a0_dna_4_11_4_0_tcp_first_4bytes_t_field_data,
+};
+
+
+static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_win_size_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_win_size_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_tcp_last_16bytes_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = {
+    bcmpkt_tcp_last_16bytes_t_ack_num_get,
+    bcmpkt_tcp_last_16bytes_t_checksum_get,
+    bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get,
+    bcmpkt_tcp_last_16bytes_t_seq_num_get,
+    bcmpkt_tcp_last_16bytes_t_urgent_ptr_get,
+    bcmpkt_tcp_last_16bytes_t_win_size_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_tcp_last_16bytes_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = {
+    bcmpkt_tcp_last_16bytes_t_ack_num_set,
+    bcmpkt_tcp_last_16bytes_t_checksum_set,
+    bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set,
+    bcmpkt_tcp_last_16bytes_t_seq_num_set,
+    bcmpkt_tcp_last_16bytes_t_urgent_ptr_set,
+    bcmpkt_tcp_last_16bytes_t_win_size_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_tcp_last_16bytes_t_field_data[] = {
+    BCM56880_A0_DNA_4_11_4_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_tcp_last_16bytes_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT,
+    .info = bcm56880_a0_dna_4_11_4_0_tcp_last_16bytes_t_field_data,
+};
+
+
+static int32_t bcmpkt_udp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_dst_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_src_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_src_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_udp_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_udp_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_udp_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_UDP_T_FID_COUNT] = {
+    bcmpkt_udp_t_checksum_get,
+    bcmpkt_udp_t_dst_port_get,
+    bcmpkt_udp_t_src_port_get,
+    bcmpkt_udp_t_udp_length_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_udp_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_UDP_T_FID_COUNT] = {
+    bcmpkt_udp_t_checksum_set,
+    bcmpkt_udp_t_dst_port_set,
+    bcmpkt_udp_t_src_port_set,
+    bcmpkt_udp_t_udp_length_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_udp_t_field_data[] = {
+    BCM56880_A0_DNA_4_11_4_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_udp_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_UDP_T_FID_COUNT,
+    .info = bcm56880_a0_dna_4_11_4_0_udp_t_field_data,
+};
+
+
+static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_unknown_l3_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = {
+    bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get,
+    bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_unknown_l3_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = {
+    bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set,
+    bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_unknown_l3_t_field_data[] = {
+    BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_unknown_l3_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT,
+    .info = bcm56880_a0_dna_4_11_4_0_unknown_l3_t_field_data,
+};
+
+
+static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_unknown_l4_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = {
+    bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_unknown_l4_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = {
+    bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_unknown_l4_t_field_data[] = {
+    BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_unknown_l4_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT,
+    .info = bcm56880_a0_dna_4_11_4_0_unknown_l4_t_field_data,
+};
+
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_unknown_l5_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = {
+    bcmpkt_unknown_l5_t_l5_bytes_0_1_get,
+    bcmpkt_unknown_l5_t_l5_bytes_2_3_get,
+    bcmpkt_unknown_l5_t_l5_bytes_4_7_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_unknown_l5_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = {
+    bcmpkt_unknown_l5_t_l5_bytes_0_1_set,
+    bcmpkt_unknown_l5_t_l5_bytes_2_3_set,
+    bcmpkt_unknown_l5_t_l5_bytes_4_7_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_unknown_l5_t_field_data[] = {
+    BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_unknown_l5_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT,
+    .info = bcm56880_a0_dna_4_11_4_0_unknown_l5_t_field_data,
+};
+
+
+static int32_t bcmpkt_vlan_t_cfi_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 12, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_cfi_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 12, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_pcp_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 13, 3);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_pcp_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 13, 3, val);
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_tpid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_vid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 12);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_vid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 12, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_vlan_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_VLAN_T_FID_COUNT] = {
+    bcmpkt_vlan_t_cfi_get,
+    bcmpkt_vlan_t_pcp_get,
+    bcmpkt_vlan_t_tpid_get,
+    bcmpkt_vlan_t_vid_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_vlan_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_VLAN_T_FID_COUNT] = {
+    bcmpkt_vlan_t_cfi_set,
+    bcmpkt_vlan_t_pcp_set,
+    bcmpkt_vlan_t_tpid_set,
+    bcmpkt_vlan_t_vid_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_vlan_t_field_data[] = {
+    BCM56880_A0_DNA_4_11_4_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_vlan_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_VLAN_T_FID_COUNT,
+    .info = bcm56880_a0_dna_4_11_4_0_vlan_t_field_data,
+};
+
+
+static int32_t bcmpkt_vntag_t_tag_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_vntag_t_tag_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_vntag_t_tpid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vntag_t_tpid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_vntag_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_VNTAG_T_FID_COUNT] = {
+    bcmpkt_vntag_t_tag_get,
+    bcmpkt_vntag_t_tpid_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_vntag_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_VNTAG_T_FID_COUNT] = {
+    bcmpkt_vntag_t_tag_set,
+    bcmpkt_vntag_t_tpid_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_vntag_t_field_data[] = {
+    BCM56880_A0_DNA_4_11_4_0_BCMPKT_VNTAG_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_vntag_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_VNTAG_T_FID_COUNT,
+    .info = bcm56880_a0_dna_4_11_4_0_vntag_t_field_data,
+};
+
+
+static int32_t bcmpkt_vxlan_t_flags_reserved_1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_vxlan_t_flags_reserved_1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_vxlan_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vxlan_t_reserved2_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_vxlan_t_vn_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 8, 24);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vxlan_t_vn_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 8, 24, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_vxlan_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_VXLAN_T_FID_COUNT] = {
+    bcmpkt_vxlan_t_flags_reserved_1_get,
+    bcmpkt_vxlan_t_reserved2_get,
+    bcmpkt_vxlan_t_vn_id_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_vxlan_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_VXLAN_T_FID_COUNT] = {
+    bcmpkt_vxlan_t_flags_reserved_1_set,
+    bcmpkt_vxlan_t_reserved2_set,
+    bcmpkt_vxlan_t_vn_id_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_vxlan_t_field_data[] = {
+    BCM56880_A0_DNA_4_11_4_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_vxlan_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_VXLAN_T_FID_COUNT,
+    .info = bcm56880_a0_dna_4_11_4_0_vxlan_t_field_data,
+};
+
+
+static int32_t bcmpkt_wesp_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_header_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_header_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_spi_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_spi_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_trailer_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_trailer_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_wesp_iv_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_wesp_iv_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_dna_4_11_4_0_wesp_t_fget[BCM56880_A0_DNA_4_11_4_0_BCMPKT_WESP_T_FID_COUNT] = {
+    bcmpkt_wesp_t_flags_get,
+    bcmpkt_wesp_t_header_len_get,
+    bcmpkt_wesp_t_next_header_get,
+    bcmpkt_wesp_t_seq_num_get,
+    bcmpkt_wesp_t_spi_get,
+    bcmpkt_wesp_t_trailer_len_get,
+    bcmpkt_wesp_t_wesp_iv_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_dna_4_11_4_0_wesp_t_fset[BCM56880_A0_DNA_4_11_4_0_BCMPKT_WESP_T_FID_COUNT] = {
+    bcmpkt_wesp_t_flags_set,
+    bcmpkt_wesp_t_header_len_set,
+    bcmpkt_wesp_t_next_header_set,
+    bcmpkt_wesp_t_seq_num_set,
+    bcmpkt_wesp_t_spi_set,
+    bcmpkt_wesp_t_trailer_len_set,
+    bcmpkt_wesp_t_wesp_iv_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_dna_4_11_4_0_wesp_t_field_data[] = {
+    BCM56880_A0_DNA_4_11_4_0_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_dna_4_11_4_0_wesp_t_field_info = {
+    .num_fields = BCM56880_A0_DNA_4_11_4_0_BCMPKT_WESP_T_FID_COUNT,
+    .info = bcm56880_a0_dna_4_11_4_0_wesp_t_field_data,
+};
+
+static bcmpkt_flex_pmd_info_t bcm56880_a0_dna_4_11_4_0_flexhdr_info_list[BCM56880_A0_DNA_4_11_4_0_BCMPKT_FLEXHDR_COUNT] = {
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_dna_4_11_4_0_arp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_dna_4_11_4_0_arp_t_fget,
+        .flex_fset = bcm56880_a0_dna_4_11_4_0_arp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_dna_4_11_4_0_authen_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_dna_4_11_4_0_authen_t_fget,
+        .flex_fset = bcm56880_a0_dna_4_11_4_0_authen_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_dna_4_11_4_0_bfd_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_dna_4_11_4_0_bfd_t_fget,
+        .flex_fset = bcm56880_a0_dna_4_11_4_0_bfd_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_dna_4_11_4_0_cntag_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_dna_4_11_4_0_cntag_t_fget,
+        .flex_fset = bcm56880_a0_dna_4_11_4_0_cntag_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_dna_4_11_4_0_cpu_composites_0_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_dna_4_11_4_0_cpu_composites_0_t_fget,
+        .flex_fset = bcm56880_a0_dna_4_11_4_0_cpu_composites_0_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_dna_4_11_4_0_cpu_composites_1_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_dna_4_11_4_0_cpu_composites_1_t_fget,
+        .flex_fset = bcm56880_a0_dna_4_11_4_0_cpu_composites_1_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_dna_4_11_4_0_dest_option_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_dna_4_11_4_0_dest_option_t_fget,
+        .flex_fset = bcm56880_a0_dna_4_11_4_0_dest_option_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_dna_4_11_4_0_erspan3_fixed_hdr_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_dna_4_11_4_0_erspan3_fixed_hdr_t_fget,
+        .flex_fset = bcm56880_a0_dna_4_11_4_0_erspan3_fixed_hdr_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_dna_4_11_4_0_erspan3_subhdr_5_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_dna_4_11_4_0_erspan3_subhdr_5_t_fget,
+        .flex_fset = bcm56880_a0_dna_4_11_4_0_erspan3_subhdr_5_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_dna_4_11_4_0_esp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_dna_4_11_4_0_esp_t_fget,
+        .flex_fset = bcm56880_a0_dna_4_11_4_0_esp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_dna_4_11_4_0_etag_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_dna_4_11_4_0_etag_t_fget,
+        .flex_fset = bcm56880_a0_dna_4_11_4_0_etag_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_dna_4_11_4_0_ethertype_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_dna_4_11_4_0_ethertype_t_fget,
+        .flex_fset = bcm56880_a0_dna_4_11_4_0_ethertype_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_dna_4_11_4_0_frag_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_dna_4_11_4_0_frag_t_fget,
+        .flex_fset = bcm56880_a0_dna_4_11_4_0_frag_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_dna_4_11_4_0_generic_loopback_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_dna_4_11_4_0_generic_loopback_t_fget,
+        .flex_fset = bcm56880_a0_dna_4_11_4_0_generic_loopback_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_dna_4_11_4_0_gpe_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_dna_4_11_4_0_gpe_t_fget,
+        .flex_fset = bcm56880_a0_dna_4_11_4_0_gpe_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_dna_4_11_4_0_gre_chksum_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_dna_4_11_4_0_gre_chksum_t_fget,
+        .flex_fset = bcm56880_a0_dna_4_11_4_0_gre_chksum_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_dna_4_11_4_0_gre_key_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_dna_4_11_4_0_gre_key_t_fget,
+        .flex_fset = bcm56880_a0_dna_4_11_4_0_gre_key_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_dna_4_11_4_0_gre_rout_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_dna_4_11_4_0_gre_rout_t_fget,
+        .flex_fset = bcm56880_a0_dna_4_11_4_0_gre_rout_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_dna_4_11_4_0_gre_seq_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_dna_4_11_4_0_gre_seq_t_fget,
+        .flex_fset = bcm56880_a0_dna_4_11_4_0_gre_seq_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_dna_4_11_4_0_gre_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_dna_4_11_4_0_gre_t_fget,
+        .flex_fset = bcm56880_a0_dna_4_11_4_0_gre_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_dna_4_11_4_0_hg3_base_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_dna_4_11_4_0_hg3_base_t_fget,
+        .flex_fset = bcm56880_a0_dna_4_11_4_0_hg3_base_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_dna_4_11_4_0_hg3_extension_0_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_dna_4_11_4_0_hg3_extension_0_t_fget,
+        .flex_fset = bcm56880_a0_dna_4_11_4_0_hg3_extension_0_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_dna_4_11_4_0_hop_by_hop_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_dna_4_11_4_0_hop_by_hop_t_fget,
+        .flex_fset = bcm56880_a0_dna_4_11_4_0_hop_by_hop_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_dna_4_11_4_0_icmp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_dna_4_11_4_0_icmp_t_fget,
+        .flex_fset = bcm56880_a0_dna_4_11_4_0_icmp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_dna_4_11_4_0_ifa_flex_md_0_a_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_dna_4_11_4_0_ifa_flex_md_0_a_t_fget,
+        .flex_fset = bcm56880_a0_dna_4_11_4_0_ifa_flex_md_0_a_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_dna_4_11_4_0_ifa_flex_md_0_b_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_dna_4_11_4_0_ifa_flex_md_0_b_t_fget,
+        .flex_fset = bcm56880_a0_dna_4_11_4_0_ifa_flex_md_0_b_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_dna_4_11_4_0_ifa_flex_md_1_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_dna_4_11_4_0_ifa_flex_md_1_t_fget,
+        .flex_fset = bcm56880_a0_dna_4_11_4_0_ifa_flex_md_1_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_dna_4_11_4_0_ifa_flex_md_2_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_dna_4_11_4_0_ifa_flex_md_2_t_fget,
+        .flex_fset = bcm56880_a0_dna_4_11_4_0_ifa_flex_md_2_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_dna_4_11_4_0_ifa_flex_md_3_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_dna_4_11_4_0_ifa_flex_md_3_t_fget,
+        .flex_fset = bcm56880_a0_dna_4_11_4_0_ifa_flex_md_3_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_dna_4_11_4_0_ifa_header_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_dna_4_11_4_0_ifa_header_t_fget,
+        .flex_fset = bcm56880_a0_dna_4_11_4_0_ifa_header_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_dna_4_11_4_0_ifa_md_base_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_dna_4_11_4_0_ifa_md_base_t_fget,
+        .flex_fset = bcm56880_a0_dna_4_11_4_0_ifa_md_base_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_dna_4_11_4_0_ifa_metadata_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_dna_4_11_4_0_ifa_metadata_t_fget,
+        .flex_fset = bcm56880_a0_dna_4_11_4_0_ifa_metadata_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_dna_4_11_4_0_igmp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_dna_4_11_4_0_igmp_t_fget,
+        .flex_fset = bcm56880_a0_dna_4_11_4_0_igmp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_dna_4_11_4_0_ipfix_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_dna_4_11_4_0_ipfix_t_fget,
+        .flex_fset = bcm56880_a0_dna_4_11_4_0_ipfix_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_dna_4_11_4_0_ipv4_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_dna_4_11_4_0_ipv4_t_fget,
+        .flex_fset = bcm56880_a0_dna_4_11_4_0_ipv4_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_dna_4_11_4_0_ipv6_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_dna_4_11_4_0_ipv6_t_fget,
+        .flex_fset = bcm56880_a0_dna_4_11_4_0_ipv6_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_dna_4_11_4_0_l2_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_dna_4_11_4_0_l2_t_fget,
+        .flex_fset = bcm56880_a0_dna_4_11_4_0_l2_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_dna_4_11_4_0_mirror_erspan_sn_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_dna_4_11_4_0_mirror_erspan_sn_t_fget,
+        .flex_fset = bcm56880_a0_dna_4_11_4_0_mirror_erspan_sn_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_dna_4_11_4_0_mirror_transport_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_dna_4_11_4_0_mirror_transport_t_fget,
+        .flex_fset = bcm56880_a0_dna_4_11_4_0_mirror_transport_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_dna_4_11_4_0_mpls_ach_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_dna_4_11_4_0_mpls_ach_t_fget,
+        .flex_fset = bcm56880_a0_dna_4_11_4_0_mpls_ach_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_dna_4_11_4_0_mpls_bv_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_dna_4_11_4_0_mpls_bv_t_fget,
+        .flex_fset = bcm56880_a0_dna_4_11_4_0_mpls_bv_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_dna_4_11_4_0_mpls_cw_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_dna_4_11_4_0_mpls_cw_t_fget,
+        .flex_fset = bcm56880_a0_dna_4_11_4_0_mpls_cw_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_dna_4_11_4_0_mpls_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_dna_4_11_4_0_mpls_t_fget,
+        .flex_fset = bcm56880_a0_dna_4_11_4_0_mpls_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_dna_4_11_4_0_p_1588_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_dna_4_11_4_0_p_1588_t_fget,
+        .flex_fset = bcm56880_a0_dna_4_11_4_0_p_1588_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_dna_4_11_4_0_prog_ext_hdr_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_dna_4_11_4_0_prog_ext_hdr_t_fget,
+        .flex_fset = bcm56880_a0_dna_4_11_4_0_prog_ext_hdr_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_dna_4_11_4_0_psamp_0_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_dna_4_11_4_0_psamp_0_t_fget,
+        .flex_fset = bcm56880_a0_dna_4_11_4_0_psamp_0_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_dna_4_11_4_0_psamp_1_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_dna_4_11_4_0_psamp_1_t_fget,
+        .flex_fset = bcm56880_a0_dna_4_11_4_0_psamp_1_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_dna_4_11_4_0_psamp_mirror_on_drop_0_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_dna_4_11_4_0_psamp_mirror_on_drop_0_t_fget,
+        .flex_fset = bcm56880_a0_dna_4_11_4_0_psamp_mirror_on_drop_0_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_dna_4_11_4_0_psamp_mirror_on_drop_1_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_dna_4_11_4_0_psamp_mirror_on_drop_1_t_fget,
+        .flex_fset = bcm56880_a0_dna_4_11_4_0_psamp_mirror_on_drop_1_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_dna_4_11_4_0_rarp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_dna_4_11_4_0_rarp_t_fget,
+        .flex_fset = bcm56880_a0_dna_4_11_4_0_rarp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_dna_4_11_4_0_routing_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_dna_4_11_4_0_routing_t_fget,
+        .flex_fset = bcm56880_a0_dna_4_11_4_0_routing_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_dna_4_11_4_0_rspan_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_dna_4_11_4_0_rspan_t_fget,
+        .flex_fset = bcm56880_a0_dna_4_11_4_0_rspan_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_dna_4_11_4_0_sflow_shim_0_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_dna_4_11_4_0_sflow_shim_0_t_fget,
+        .flex_fset = bcm56880_a0_dna_4_11_4_0_sflow_shim_0_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_dna_4_11_4_0_sflow_shim_1_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_dna_4_11_4_0_sflow_shim_1_t_fget,
+        .flex_fset = bcm56880_a0_dna_4_11_4_0_sflow_shim_1_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_dna_4_11_4_0_sflow_shim_2_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_dna_4_11_4_0_sflow_shim_2_t_fget,
+        .flex_fset = bcm56880_a0_dna_4_11_4_0_sflow_shim_2_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_dna_4_11_4_0_snap_llc_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_dna_4_11_4_0_snap_llc_t_fget,
+        .flex_fset = bcm56880_a0_dna_4_11_4_0_snap_llc_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_dna_4_11_4_0_tcp_first_4bytes_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_dna_4_11_4_0_tcp_first_4bytes_t_fget,
+        .flex_fset = bcm56880_a0_dna_4_11_4_0_tcp_first_4bytes_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_dna_4_11_4_0_tcp_last_16bytes_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_dna_4_11_4_0_tcp_last_16bytes_t_fget,
+        .flex_fset = bcm56880_a0_dna_4_11_4_0_tcp_last_16bytes_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_dna_4_11_4_0_udp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_dna_4_11_4_0_udp_t_fget,
+        .flex_fset = bcm56880_a0_dna_4_11_4_0_udp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_dna_4_11_4_0_unknown_l3_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_dna_4_11_4_0_unknown_l3_t_fget,
+        .flex_fset = bcm56880_a0_dna_4_11_4_0_unknown_l3_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_dna_4_11_4_0_unknown_l4_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_dna_4_11_4_0_unknown_l4_t_fget,
+        .flex_fset = bcm56880_a0_dna_4_11_4_0_unknown_l4_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_dna_4_11_4_0_unknown_l5_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_dna_4_11_4_0_unknown_l5_t_fget,
+        .flex_fset = bcm56880_a0_dna_4_11_4_0_unknown_l5_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_dna_4_11_4_0_vlan_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_dna_4_11_4_0_vlan_t_fget,
+        .flex_fset = bcm56880_a0_dna_4_11_4_0_vlan_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_dna_4_11_4_0_vntag_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_dna_4_11_4_0_vntag_t_fget,
+        .flex_fset = bcm56880_a0_dna_4_11_4_0_vntag_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_dna_4_11_4_0_vxlan_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_dna_4_11_4_0_vxlan_t_fget,
+        .flex_fset = bcm56880_a0_dna_4_11_4_0_vxlan_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_dna_4_11_4_0_wesp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_dna_4_11_4_0_wesp_t_fget,
+        .flex_fset = bcm56880_a0_dna_4_11_4_0_wesp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_dna_4_11_4_0_rxpmd_flex_field_info,
+        .reasons_info = &bcm56880_a0_dna_4_11_4_0_rxpmd_flex_reasons_info,
+        .flex_common_fget = bcm56880_a0_rxpmd_flex_fget,
+        .flex_common_fset = bcm56880_a0_rxpmd_flex_fset,
+    },
+};
+
+static shr_enum_map_t bcm56880_a0_dna_4_11_4_0_flexhdr_id_map[] = {
+    BCM56880_A0_DNA_4_11_4_0_BCMPKT_FLEXHDR_NAME_MAP_INIT
+};
+
+shr_enum_map_t * bcm56880_a0_dna_4_11_4_0_flexhdr_map_get(void)
+{
+    return bcm56880_a0_dna_4_11_4_0_flexhdr_id_map;
+}
+
+bcmpkt_flex_pmd_info_t * bcm56880_a0_dna_4_11_4_0_flex_pmd_info_get(uint32_t hid)
+{
+    if (hid >= BCM56880_A0_DNA_4_11_4_0_BCMPKT_FLEXHDR_COUNT) {
+        return NULL;
+    }
+
+    return &bcm56880_a0_dna_4_11_4_0_flexhdr_info_list[hid];
+}
+
+int bcm56880_a0_dna_4_11_4_0_flexhdr_variant_support_map[BCMPKT_PMD_COUNT] = {
+    13,
+    20,
+    21,
+    66,
+};
\ No newline at end of file
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_bcmpkt_rxpmd_match_id.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_bcmpkt_rxpmd_match_id.c
new file mode 100644
index 000000000..13843eb79
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_bcmpkt_rxpmd_match_id.c
@@ -0,0 +1,2410 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) bcm56880_a0_hna_6_5_29_2_2_sf_match_id_info.yml
+ * for device bcm56880_a0 and variant hna_6_5_29_2_2.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+
+#include <bcmpkt/bcmpkt_rxpmd_match_id.h>
+#include <bcmpkt/xfcr/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_bcmpkt_rxpmd_match_id_defs.h>
+
+
+static bcmpkt_rxpmd_match_id_db_t
+bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_COUNT] = {
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_ETAG",
+        .match        = 0x20,
+        .match_mask   = 0x30,
+        .match_maxbit = 26,
+        .match_minbit = 21,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x2,
+        .pmaxbit      = 40,
+        .pminbit      = 35,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_ITAG",
+        .match        = 0x8,
+        .match_mask   = 0x8,
+        .match_maxbit = 26,
+        .match_minbit = 21,
+        .maxbit       = 3,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 40,
+        .pminbit      = 35,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_L2",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 26,
+        .match_minbit = 21,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 40,
+        .pminbit      = 35,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x3f,
+        .match_maxbit = 26,
+        .match_minbit = 21,
+        .maxbit       = 5,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 40,
+        .pminbit      = 35,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_OTAG",
+        .match        = 0x4,
+        .match_mask   = 0x4,
+        .match_maxbit = 26,
+        .match_minbit = 21,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 40,
+        .pminbit      = 35,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC",
+        .match        = 0x2,
+        .match_mask   = 0x2,
+        .match_maxbit = 26,
+        .match_minbit = 21,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 40,
+        .pminbit      = 35,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_VNTAG",
+        .match        = 0x10,
+        .match_mask   = 0x30,
+        .match_maxbit = 26,
+        .match_minbit = 21,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 40,
+        .pminbit      = 35,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ARP",
+        .match        = 0x1800,
+        .match_mask   = 0x3830,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x3,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1",
+        .match        = 0x80,
+        .match_mask   = 0x1c2,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2",
+        .match        = 0x408,
+        .match_mask   = 0x64c,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x2,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_BFD",
+        .match        = 0x3800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x7,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT",
+        .match        = 0x200,
+        .match_mask   = 0x642,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1",
+        .match        = 0x100,
+        .match_mask   = 0x1c0,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x2,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2",
+        .match        = 0x600,
+        .match_mask   = 0x640,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x3,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GPE",
+        .match        = 0x1830,
+        .match_mask   = 0x3870,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x3,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE",
+        .match        = 0x2,
+        .match_mask   = 0x42,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM",
+        .match        = 0x202,
+        .match_mask   = 0x642,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY",
+        .match        = 0x1000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x2,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT",
+        .match        = 0x82,
+        .match_mask   = 0x1c2,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ",
+        .match        = 0x12,
+        .match_mask   = 0x72,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ICMP",
+        .match        = 0x2000,
+        .match_mask   = 0x3830,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x4,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA",
+        .match        = 0x180,
+        .match_mask   = 0x1c0,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x3,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IGMP",
+        .match        = 0x404,
+        .match_mask   = 0x64c,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x2,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IPV4",
+        .match        = 0x4,
+        .match_mask   = 0x4c,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 3,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IPV6",
+        .match        = 0x8,
+        .match_mask   = 0x4c,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 3,
+        .minbit       = 2,
+        .value        = 0x2,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS0",
+        .match        = 0x40,
+        .match_mask   = 0x40,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 6,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS1",
+        .match        = 0x42,
+        .match_mask   = 0x42,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS2",
+        .match        = 0x44,
+        .match_mask   = 0x44,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS3",
+        .match        = 0x48,
+        .match_mask   = 0x48,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 3,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS4",
+        .match        = 0x50,
+        .match_mask   = 0x50,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 4,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS5",
+        .match        = 0x60,
+        .match_mask   = 0x60,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS6",
+        .match        = 0xc0,
+        .match_mask   = 0xc0,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 7,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH",
+        .match        = 0x140,
+        .match_mask   = 0x140,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 8,
+        .minbit       = 8,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW",
+        .match        = 0x240,
+        .match_mask   = 0x240,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 9,
+        .minbit       = 9,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x3fff,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 13,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_P_1588",
+        .match        = 0x3000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x6,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_RARP",
+        .match        = 0x800,
+        .match_mask   = 0x3830,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES",
+        .match        = 0x20,
+        .match_mask   = 0x70,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x2,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES",
+        .match        = 0x820,
+        .match_mask   = 0x3870,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UDP",
+        .match        = 0x30,
+        .match_mask   = 0x70,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x3,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3",
+        .match        = 0x10,
+        .match_mask   = 0x72,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4",
+        .match        = 0x2800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x5,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5",
+        .match        = 0x2030,
+        .match_mask   = 0x3870,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x4,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_VXLAN",
+        .match        = 0x830,
+        .match_mask   = 0x3870,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK */
+        .name         = "EGRESS_PKT_SYS_HDR_LOOPBACK",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 0,
+        .match_minbit = 0,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 0,
+        .pminbit      = 0,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE */
+        .name         = "EGRESS_PKT_SYS_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x1,
+        .match_maxbit = 0,
+        .match_minbit = 0,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 0,
+        .pminbit      = 0,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_ETAG",
+        .match        = 0x20,
+        .match_mask   = 0x30,
+        .match_maxbit = 6,
+        .match_minbit = 1,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x2,
+        .pmaxbit      = 12,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_ITAG",
+        .match        = 0x8,
+        .match_mask   = 0x8,
+        .match_maxbit = 6,
+        .match_minbit = 1,
+        .maxbit       = 3,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 12,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_L2",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 6,
+        .match_minbit = 1,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 12,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x3f,
+        .match_maxbit = 6,
+        .match_minbit = 1,
+        .maxbit       = 5,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 12,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_OTAG",
+        .match        = 0x4,
+        .match_mask   = 0x4,
+        .match_maxbit = 6,
+        .match_minbit = 1,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 12,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC",
+        .match        = 0x2,
+        .match_mask   = 0x2,
+        .match_maxbit = 6,
+        .match_minbit = 1,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 12,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_VNTAG",
+        .match        = 0x10,
+        .match_mask   = 0x30,
+        .match_maxbit = 6,
+        .match_minbit = 1,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 12,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP",
+        .match        = 0x1800,
+        .match_mask   = 0x3830,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x3,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1",
+        .match        = 0x80,
+        .match_mask   = 0x1c2,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2",
+        .match        = 0x408,
+        .match_mask   = 0x64c,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x2,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD",
+        .match        = 0x3800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x7,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT",
+        .match        = 0x200,
+        .match_mask   = 0x642,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1",
+        .match        = 0x100,
+        .match_mask   = 0x1c0,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x2,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2",
+        .match        = 0x600,
+        .match_mask   = 0x640,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x3,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE",
+        .match        = 0x1830,
+        .match_mask   = 0x3870,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x3,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE",
+        .match        = 0x2,
+        .match_mask   = 0x42,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM",
+        .match        = 0x202,
+        .match_mask   = 0x642,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY",
+        .match        = 0x1000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x2,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT",
+        .match        = 0x82,
+        .match_mask   = 0x1c2,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ",
+        .match        = 0x12,
+        .match_mask   = 0x72,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP",
+        .match        = 0x2000,
+        .match_mask   = 0x3830,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x4,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA",
+        .match        = 0x180,
+        .match_mask   = 0x1c0,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x3,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP",
+        .match        = 0x404,
+        .match_mask   = 0x64c,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x2,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4",
+        .match        = 0x4,
+        .match_mask   = 0x4c,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 3,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6",
+        .match        = 0x8,
+        .match_mask   = 0x4c,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 3,
+        .minbit       = 2,
+        .value        = 0x2,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0",
+        .match        = 0x40,
+        .match_mask   = 0x40,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 6,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1",
+        .match        = 0x42,
+        .match_mask   = 0x42,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2",
+        .match        = 0x44,
+        .match_mask   = 0x44,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3",
+        .match        = 0x48,
+        .match_mask   = 0x48,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 3,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4",
+        .match        = 0x50,
+        .match_mask   = 0x50,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 4,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5",
+        .match        = 0x60,
+        .match_mask   = 0x60,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6",
+        .match        = 0xc0,
+        .match_mask   = 0xc0,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 7,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH",
+        .match        = 0x140,
+        .match_mask   = 0x140,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 8,
+        .minbit       = 8,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW",
+        .match        = 0x240,
+        .match_mask   = 0x240,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 9,
+        .minbit       = 9,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x3fff,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 13,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588",
+        .match        = 0x3000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x6,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP",
+        .match        = 0x800,
+        .match_mask   = 0x3830,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES",
+        .match        = 0x20,
+        .match_mask   = 0x70,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x2,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES",
+        .match        = 0x820,
+        .match_mask   = 0x3870,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP",
+        .match        = 0x30,
+        .match_mask   = 0x70,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x3,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3",
+        .match        = 0x10,
+        .match_mask   = 0x72,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4",
+        .match        = 0x2800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x5,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5",
+        .match        = 0x2030,
+        .match_mask   = 0x3870,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x4,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN",
+        .match        = 0x830,
+        .match_mask   = 0x3870,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_ETAG",
+        .match        = 0x20,
+        .match_mask   = 0x30,
+        .match_maxbit = 26,
+        .match_minbit = 21,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x2,
+        .pmaxbit      = 26,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_ITAG",
+        .match        = 0x8,
+        .match_mask   = 0x8,
+        .match_maxbit = 26,
+        .match_minbit = 21,
+        .maxbit       = 3,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 26,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_L2",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 26,
+        .match_minbit = 21,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 26,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x3f,
+        .match_maxbit = 26,
+        .match_minbit = 21,
+        .maxbit       = 5,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 26,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_OTAG",
+        .match        = 0x4,
+        .match_mask   = 0x4,
+        .match_maxbit = 26,
+        .match_minbit = 21,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 26,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC",
+        .match        = 0x2,
+        .match_mask   = 0x2,
+        .match_maxbit = 26,
+        .match_minbit = 21,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 26,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_VNTAG",
+        .match        = 0x10,
+        .match_mask   = 0x30,
+        .match_maxbit = 26,
+        .match_minbit = 21,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 26,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ARP",
+        .match        = 0x1800,
+        .match_mask   = 0x3830,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x3,
+        .pmaxbit      = 40,
+        .pminbit      = 27,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1",
+        .match        = 0x80,
+        .match_mask   = 0x1c2,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 40,
+        .pminbit      = 27,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2",
+        .match        = 0x408,
+        .match_mask   = 0x64c,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x2,
+        .pmaxbit      = 40,
+        .pminbit      = 27,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_BFD",
+        .match        = 0x3800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x7,
+        .pmaxbit      = 40,
+        .pminbit      = 27,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT",
+        .match        = 0x200,
+        .match_mask   = 0x642,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x1,
+        .pmaxbit      = 40,
+        .pminbit      = 27,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 40,
+        .pminbit      = 27,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1",
+        .match        = 0x100,
+        .match_mask   = 0x1c0,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x2,
+        .pmaxbit      = 40,
+        .pminbit      = 27,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2",
+        .match        = 0x600,
+        .match_mask   = 0x640,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x3,
+        .pmaxbit      = 40,
+        .pminbit      = 27,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ICMP",
+        .match        = 0x2000,
+        .match_mask   = 0x3830,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x4,
+        .pmaxbit      = 40,
+        .pminbit      = 27,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA",
+        .match        = 0x180,
+        .match_mask   = 0x1c0,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x3,
+        .pmaxbit      = 40,
+        .pminbit      = 27,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IGMP",
+        .match        = 0x404,
+        .match_mask   = 0x64c,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x2,
+        .pmaxbit      = 40,
+        .pminbit      = 27,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IPV4",
+        .match        = 0x4,
+        .match_mask   = 0x4c,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 3,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 40,
+        .pminbit      = 27,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IPV6",
+        .match        = 0x8,
+        .match_mask   = 0x4c,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 3,
+        .minbit       = 2,
+        .value        = 0x2,
+        .pmaxbit      = 40,
+        .pminbit      = 27,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x3fff,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 13,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 40,
+        .pminbit      = 27,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_P_1588",
+        .match        = 0x3000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x6,
+        .pmaxbit      = 40,
+        .pminbit      = 27,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_RARP",
+        .match        = 0x800,
+        .match_mask   = 0x3830,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 40,
+        .pminbit      = 27,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES",
+        .match        = 0x20,
+        .match_mask   = 0x70,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x2,
+        .pmaxbit      = 40,
+        .pminbit      = 27,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES",
+        .match        = 0x820,
+        .match_mask   = 0x3870,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 40,
+        .pminbit      = 27,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UDP",
+        .match        = 0x30,
+        .match_mask   = 0x70,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x3,
+        .pmaxbit      = 40,
+        .pminbit      = 27,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3",
+        .match        = 0x10,
+        .match_mask   = 0x72,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 40,
+        .pminbit      = 27,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4",
+        .match        = 0x2800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x5,
+        .pmaxbit      = 40,
+        .pminbit      = 27,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5",
+        .match        = 0x2030,
+        .match_mask   = 0x3870,
+        .match_maxbit = 40,
+        .match_minbit = 27,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x4,
+        .pmaxbit      = 40,
+        .pminbit      = 27,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_ETAG",
+        .match        = 0x20,
+        .match_mask   = 0x30,
+        .match_maxbit = 6,
+        .match_minbit = 1,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x2,
+        .pmaxbit      = 6,
+        .pminbit      = 1,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_ITAG",
+        .match        = 0x8,
+        .match_mask   = 0x8,
+        .match_maxbit = 6,
+        .match_minbit = 1,
+        .maxbit       = 3,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 6,
+        .pminbit      = 1,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_L2",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 6,
+        .match_minbit = 1,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 6,
+        .pminbit      = 1,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x3f,
+        .match_maxbit = 6,
+        .match_minbit = 1,
+        .maxbit       = 5,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 6,
+        .pminbit      = 1,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_OTAG",
+        .match        = 0x4,
+        .match_mask   = 0x4,
+        .match_maxbit = 6,
+        .match_minbit = 1,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 6,
+        .pminbit      = 1,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC",
+        .match        = 0x2,
+        .match_mask   = 0x2,
+        .match_maxbit = 6,
+        .match_minbit = 1,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 6,
+        .pminbit      = 1,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_VNTAG",
+        .match        = 0x10,
+        .match_mask   = 0x30,
+        .match_maxbit = 6,
+        .match_minbit = 1,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 6,
+        .pminbit      = 1,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ARP",
+        .match        = 0x1800,
+        .match_mask   = 0x3830,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x3,
+        .pmaxbit      = 20,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1",
+        .match        = 0x80,
+        .match_mask   = 0x1c2,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 20,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2",
+        .match        = 0x408,
+        .match_mask   = 0x64c,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x2,
+        .pmaxbit      = 20,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_BFD",
+        .match        = 0x3800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x7,
+        .pmaxbit      = 20,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT",
+        .match        = 0x200,
+        .match_mask   = 0x642,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x1,
+        .pmaxbit      = 20,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 20,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1",
+        .match        = 0x100,
+        .match_mask   = 0x1c0,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x2,
+        .pmaxbit      = 20,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2",
+        .match        = 0x600,
+        .match_mask   = 0x640,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x3,
+        .pmaxbit      = 20,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GPE",
+        .match        = 0x1830,
+        .match_mask   = 0x3870,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x3,
+        .pmaxbit      = 20,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE",
+        .match        = 0x2,
+        .match_mask   = 0x42,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 20,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM",
+        .match        = 0x202,
+        .match_mask   = 0x642,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x1,
+        .pmaxbit      = 20,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY",
+        .match        = 0x1000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x2,
+        .pmaxbit      = 20,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT",
+        .match        = 0x82,
+        .match_mask   = 0x1c2,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 20,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ",
+        .match        = 0x12,
+        .match_mask   = 0x72,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 20,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ICMP",
+        .match        = 0x2000,
+        .match_mask   = 0x3830,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x4,
+        .pmaxbit      = 20,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA",
+        .match        = 0x180,
+        .match_mask   = 0x1c0,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x3,
+        .pmaxbit      = 20,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IGMP",
+        .match        = 0x404,
+        .match_mask   = 0x64c,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x2,
+        .pmaxbit      = 20,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV4",
+        .match        = 0x4,
+        .match_mask   = 0x4c,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 3,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 20,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV6",
+        .match        = 0x8,
+        .match_mask   = 0x4c,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 3,
+        .minbit       = 2,
+        .value        = 0x2,
+        .pmaxbit      = 20,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0",
+        .match        = 0x40,
+        .match_mask   = 0x40,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 6,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 20,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1",
+        .match        = 0x42,
+        .match_mask   = 0x42,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 20,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2",
+        .match        = 0x44,
+        .match_mask   = 0x44,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 20,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3",
+        .match        = 0x48,
+        .match_mask   = 0x48,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 3,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 20,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4",
+        .match        = 0x50,
+        .match_mask   = 0x50,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 4,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 20,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5",
+        .match        = 0x60,
+        .match_mask   = 0x60,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 20,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6",
+        .match        = 0xc0,
+        .match_mask   = 0xc0,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 7,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 20,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH",
+        .match        = 0x140,
+        .match_mask   = 0x140,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 8,
+        .minbit       = 8,
+        .value        = 0x1,
+        .pmaxbit      = 20,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW",
+        .match        = 0x240,
+        .match_mask   = 0x240,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 9,
+        .minbit       = 9,
+        .value        = 0x1,
+        .pmaxbit      = 20,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x3fff,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 13,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 20,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_P_1588",
+        .match        = 0x3000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x6,
+        .pmaxbit      = 20,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_RARP",
+        .match        = 0x800,
+        .match_mask   = 0x3830,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 20,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES",
+        .match        = 0x20,
+        .match_mask   = 0x70,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x2,
+        .pmaxbit      = 20,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES",
+        .match        = 0x820,
+        .match_mask   = 0x3870,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 20,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UDP",
+        .match        = 0x30,
+        .match_mask   = 0x70,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x3,
+        .pmaxbit      = 20,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3",
+        .match        = 0x10,
+        .match_mask   = 0x72,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 20,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4",
+        .match        = 0x2800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x5,
+        .pmaxbit      = 20,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5",
+        .match        = 0x2030,
+        .match_mask   = 0x3870,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x4,
+        .pmaxbit      = 20,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN",
+        .match        = 0x830,
+        .match_mask   = 0x3870,
+        .match_maxbit = 20,
+        .match_minbit = 7,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 20,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK */
+        .name         = "INGRESS_PKT_SYS_HDR_LOOPBACK",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 0,
+        .match_minbit = 0,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 0,
+        .pminbit      = 0,
+
+    },
+    {
+        /* BCM56880_A0_HNA_6_5_29_2_2_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE */
+        .name         = "INGRESS_PKT_SYS_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x1,
+        .match_maxbit = 0,
+        .match_minbit = 0,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 0,
+        .pminbit      = 0,
+
+    },
+};
+
+static bcmpkt_rxpmd_match_id_db_info_t bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db_info = {
+    .num_entries = 168,
+    .db = bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db
+};
+bcmpkt_rxpmd_match_id_db_info_t * bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db_info_get(void) {
+    return &bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_db_info;
+}
+
+static shr_enum_map_t bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_map[] = {
+    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_rxpmd_match_id_map_info_t bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_map_info = {
+    .num_entries = 168,
+    .map = bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_map
+};
+
+bcmpkt_rxpmd_match_id_map_info_t * bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_map_info_get(void) {
+    return &bcm56880_a0_hna_6_5_29_2_2_rxpmd_match_id_map_info;
+}
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_pkt_flexhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_pkt_flexhdr.c
new file mode 100644
index 000000000..9c92caacb
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_pkt_flexhdr.c
@@ -0,0 +1,7336 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) map.yml
+ * for device bcm56880_a0 and variant hna_6_5_29_2_2.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#include <sal/sal_types.h>
+#include <shr/shr_error.h>
+#include <bcmpkt/bcmpkt_flexhdr.h>
+#include <bcmpkt/chip/bcm56880_a0/bcmpkt_bcm56880_a0_rxpmd.h>
+#include <bcmpkt/xfcr/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_bcmpkt_flexhdr.h>
+#include <bcmpkt/xfcr/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_bcmpkt_flexhdr_data.h>
+#include <bcmpkt/xfcr/bcm56880_a0/hna_6_5_29_2_2/bcm56880_a0_hna_6_5_29_2_2_bcmpkt_rxpmd_flex_data.h>
+
+#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1)
+#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l))
+#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s)))
+#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s)))
+
+static void bcm56880_a0_hna_6_5_29_2_2_rxpmd_flex_reason_decode(uint32_t *data, bcmpkt_bitmap_t *reasons)
+{
+    uint32_t *reason = data + 0;
+
+    if (reason[12] & (0x1 << 0)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU);
+    }
+    if (reason[12] & (0x1 << 1)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS);
+    }
+    if (reason[12] & (0x1 << 2)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE);
+    }
+    if (reason[12] & (0x1 << 3)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT);
+    }
+    if (reason[12] & (0x1 << 4)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD);
+    }
+    if (reason[12] & (0x1 << 5)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED);
+    }
+    if (reason[12] & (0x1 << 6)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT);
+    }
+    if (reason[12] & (0x1 << 7)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD);
+    }
+    if (reason[12] & (0x1 << 8)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD);
+    }
+    if (reason[12] & (0x1 << 9)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS);
+    }
+    if (reason[12] & (0x1 << 10)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP);
+    }
+    if (reason[12] & (0x1 << 11)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS);
+    }
+    if (reason[12] & (0x1 << 12)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP);
+    }
+    if (reason[12] & (0x1 << 13)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR);
+    }
+    if (reason[12] & (0x1 << 14)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR);
+    }
+    if (reason[12] & (0x1 << 15)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED);
+    }
+    if (reason[12] & (0x1 << 16)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL);
+    }
+    if (reason[12] & (0x1 << 17)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_VFP);
+    }
+    if (reason[12] & (0x1 << 18)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_IFP);
+    }
+    if (reason[12] & (0x1 << 19)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_IFP_METER);
+    }
+    if (reason[12] & (0x1 << 20)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_DST_FP);
+    }
+    if (reason[12] & (0x1 << 21)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_SVP);
+    }
+    if (reason[12] & (0x1 << 22)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_EM_FT);
+    }
+    if (reason[12] & (0x1 << 23)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_IVXLT);
+    }
+    if (reason[12] & (0x1 << 24)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED);
+    }
+    if (reason[12] & (0x1 << 25)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED);
+    }
+    if (reason[12] & (0x1 << 26)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_SER_DROP);
+    }
+    if (reason[12] & (0x1 << 27)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED);
+    }
+    if (reason[12] & (0x1 << 28)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF);
+    }
+    if (reason[12] & (0x1 << 29)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED);
+    }
+    if (reason[12] & (0x1 << 30)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED);
+    }
+    if (reason[12] & (0x1 << 31)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU);
+    }
+    if (reason[11] & (0x1 << 0)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0);
+    }
+    if (reason[11] & (0x1 << 1)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1);
+    }
+    if (reason[11] & (0x1 << 2)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2);
+    }
+    if (reason[11] & (0x1 << 3)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3);
+    }
+    if (reason[11] & (0x1 << 4)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4);
+    }
+    if (reason[11] & (0x1 << 5)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5);
+    }
+    if (reason[11] & (0x1 << 6)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6);
+    }
+    if (reason[11] & (0x1 << 7)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7);
+    }
+    if (reason[11] & (0x1 << 8)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE);
+    }
+    if (reason[11] & (0x1 << 15)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP);
+    }
+}
+
+static void bcm56880_a0_hna_6_5_29_2_2_rxpmd_flex_reason_encode(bcmpkt_bitmap_t *reasons, uint32_t *data)
+{
+    uint32_t *reason = data + 0;
+
+    reason[12] = 0;
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU)) {
+        reason[12] |= (0x1 << 0);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS)) {
+        reason[12] |= (0x1 << 1);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE)) {
+        reason[12] |= (0x1 << 2);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT)) {
+        reason[12] |= (0x1 << 3);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD)) {
+        reason[12] |= (0x1 << 4);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED)) {
+        reason[12] |= (0x1 << 5);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT)) {
+        reason[12] |= (0x1 << 6);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD)) {
+        reason[12] |= (0x1 << 7);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD)) {
+        reason[12] |= (0x1 << 8);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS)) {
+        reason[12] |= (0x1 << 9);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP)) {
+        reason[12] |= (0x1 << 10);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS)) {
+        reason[12] |= (0x1 << 11);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP)) {
+        reason[12] |= (0x1 << 12);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR)) {
+        reason[12] |= (0x1 << 13);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR)) {
+        reason[12] |= (0x1 << 14);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED)) {
+        reason[12] |= (0x1 << 15);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL)) {
+        reason[12] |= (0x1 << 16);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_VFP)) {
+        reason[12] |= (0x1 << 17);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_IFP)) {
+        reason[12] |= (0x1 << 18);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_IFP_METER)) {
+        reason[12] |= (0x1 << 19);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_DST_FP)) {
+        reason[12] |= (0x1 << 20);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_SVP)) {
+        reason[12] |= (0x1 << 21);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_EM_FT)) {
+        reason[12] |= (0x1 << 22);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_IVXLT)) {
+        reason[12] |= (0x1 << 23);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED)) {
+        reason[12] |= (0x1 << 24);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED)) {
+        reason[12] |= (0x1 << 25);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_SER_DROP)) {
+        reason[12] |= (0x1 << 26);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED)) {
+        reason[12] |= (0x1 << 27);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF)) {
+        reason[12] |= (0x1 << 28);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED)) {
+        reason[12] |= (0x1 << 29);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED)) {
+        reason[12] |= (0x1 << 30);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU)) {
+        reason[12] |= (0x1 << 31);
+    }
+    reason[11] = 0;
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0)) {
+        reason[11] |= (0x1 << 0);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1)) {
+        reason[11] |= (0x1 << 1);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2)) {
+        reason[11] |= (0x1 << 2);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3)) {
+        reason[11] |= (0x1 << 3);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4)) {
+        reason[11] |= (0x1 << 4);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5)) {
+        reason[11] |= (0x1 << 5);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6)) {
+        reason[11] |= (0x1 << 6);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7)) {
+        reason[11] |= (0x1 << 7);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE)) {
+        reason[11] |= (0x1 << 8);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP)) {
+        reason[11] |= (0x1 << 15);
+    }
+}
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_rxpmd_flex_field_data[] = {
+    {
+        .name = "DLB_ECMP_DESTINATION_15_0",
+        .fid = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { -1, -1 }, /* Profile 2. */
+            { -1, -1 }, /* Profile 3. */
+            { 256, 271 }, /* Profile 4. */
+            { 256, 271 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "DROP_CODE_15_0",
+        .fid = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 48, 63 }, /* Profile 2. */
+            { 48, 63 }, /* Profile 3. */
+            { 48, 63 }, /* Profile 4. */
+            { 48, 63 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "DVP_15_0",
+        .fid = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_DVP_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 352, 367 }, /* Profile 2. */
+            { 352, 367 }, /* Profile 3. */
+            { 352, 367 }, /* Profile 4. */
+            { 352, 367 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "EFFECTIVE_TTL_7_0",
+        .fid = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 192, 199 }, /* Profile 2. */
+            { 192, 199 }, /* Profile 3. */
+            { 192, 199 }, /* Profile 4. */
+            { 192, 199 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0",
+        .fid = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 256, 271 }, /* Profile 2. */
+            { 256, 271 }, /* Profile 3. */
+        },
+        .profile_cnt = 4,
+    },
+    {
+        .name = "ENTROPY_LABEL_HIGH_3_0",
+        .fid = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 404, 407 }, /* Profile 2. */
+            { 404, 407 }, /* Profile 3. */
+            { 404, 407 }, /* Profile 4. */
+            { 404, 407 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "ENTROPY_LABEL_LOW_15_0",
+        .fid = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 208, 223 }, /* Profile 2. */
+            { 208, 223 }, /* Profile 3. */
+            { 208, 223 }, /* Profile 4. */
+            { 208, 223 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "EVENT_TRACE_VECTOR_31_0",
+        .fid = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 0, 31 }, /* Profile 2. */
+            { 0, 31 }, /* Profile 3. */
+            { 0, 31 }, /* Profile 4. */
+            { 0, 31 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "EVENT_TRACE_VECTOR_47_32",
+        .fid = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 32, 47 }, /* Profile 2. */
+            { 32, 47 }, /* Profile 3. */
+            { 32, 47 }, /* Profile 4. */
+            { 32, 47 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "I2E_CLASS_ID_15_0",
+        .fid = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 112, 127 }, /* Profile 2. */
+            { 112, 127 }, /* Profile 3. */
+            { 112, 127 }, /* Profile 4. */
+            { 112, 127 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "IFP_IOAM_GBP_ACTION_3_0",
+        .fid = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 384, 387 }, /* Profile 2. */
+            { 384, 387 }, /* Profile 3. */
+            { 384, 387 }, /* Profile 4. */
+            { 384, 387 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "IFP_TS_CONTROL_ACTION_3_0",
+        .fid = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 400, 403 }, /* Profile 2. */
+            { 400, 403 }, /* Profile 3. */
+            { 400, 403 }, /* Profile 4. */
+            { 400, 403 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "ING_PORT_GROUP_ID_3_0_3_0",
+        .fid = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_ING_PORT_GROUP_ID_3_0_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 372, 375 }, /* Profile 2. */
+            { 372, 375 }, /* Profile 3. */
+            { 372, 375 }, /* Profile 4. */
+            { 372, 375 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "ING_PORT_GROUP_ID_7_4_3_0",
+        .fid = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_ING_PORT_GROUP_ID_7_4_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 376, 379 }, /* Profile 2. */
+            { 376, 379 }, /* Profile 3. */
+            { 376, 379 }, /* Profile 4. */
+            { 376, 379 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "ING_TIMESTAMP_31_0",
+        .fid = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 64, 95 }, /* Profile 2. */
+            { 64, 95 }, /* Profile 3. */
+            { 64, 95 }, /* Profile 4. */
+            { 64, 95 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "INGRESS_PP_PORT_ITAG_PRESERVE_15_0",
+        .fid = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_ITAG_PRESERVE_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 320, 335 }, /* Profile 2. */
+            { 320, 335 }, /* Profile 3. */
+            { 320, 335 }, /* Profile 4. */
+            { 320, 335 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0",
+        .fid = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 240, 255 }, /* Profile 2. */
+            { 240, 255 }, /* Profile 3. */
+            { 240, 255 }, /* Profile 4. */
+            { 240, 255 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "INGRESS_QOS_REMARK_CTRL_3_0",
+        .fid = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 392, 395 }, /* Profile 2. */
+            { 392, 395 }, /* Profile 3. */
+            { 392, 395 }, /* Profile 4. */
+            { 392, 395 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "INT_PRI_3_0",
+        .fid = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_INT_PRI_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 412, 415 }, /* Profile 2. */
+            { 412, 415 }, /* Profile 3. */
+            { 412, 415 }, /* Profile 4. */
+            { 412, 415 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "L2_IIF_10_0",
+        .fid = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_L2_IIF_10_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 128, 138 }, /* Profile 2. */
+            { -1, -1 }, /* Profile 3. */
+            { 128, 138 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "L2_OIF_10_0",
+        .fid = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_L2_OIF_10_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { -1, -1 }, /* Profile 2. */
+            { 144, 154 }, /* Profile 3. */
+            { -1, -1 }, /* Profile 4. */
+            { 144, 154 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "L3_IIF_13_0",
+        .fid = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_L3_IIF_13_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 176, 189 }, /* Profile 2. */
+            { 176, 189 }, /* Profile 3. */
+            { 176, 189 }, /* Profile 4. */
+            { 176, 189 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "L3_OIF_1_13_0",
+        .fid = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 144, 157 }, /* Profile 2. */
+            { 128, 141 }, /* Profile 3. */
+            { 144, 157 }, /* Profile 4. */
+            { 128, 141 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0",
+        .fid = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 336, 351 }, /* Profile 2. */
+            { 336, 351 }, /* Profile 3. */
+            { 336, 351 }, /* Profile 4. */
+            { 336, 351 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "NHOP_INDEX_1_15_0",
+        .fid = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 224, 239 }, /* Profile 2. */
+            { 224, 239 }, /* Profile 3. */
+            { 224, 239 }, /* Profile 4. */
+            { 224, 239 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "PARSER_VHLEN_0_15_0",
+        .fid = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 96, 111 }, /* Profile 2. */
+            { 96, 111 }, /* Profile 3. */
+            { 96, 111 }, /* Profile 4. */
+            { 96, 111 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "PKT_MISC_CTRL_0_3_0",
+        .fid = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 396, 399 }, /* Profile 2. */
+            { 396, 399 }, /* Profile 3. */
+            { 396, 399 }, /* Profile 4. */
+            { 396, 399 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "SVP_15_0",
+        .fid = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_SVP_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 304, 319 }, /* Profile 2. */
+            { 304, 319 }, /* Profile 3. */
+            { 304, 319 }, /* Profile 4. */
+            { 304, 319 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "SVP_NETWORK_GROUP_BITMAP_3_0",
+        .fid = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 388, 391 }, /* Profile 2. */
+            { 388, 391 }, /* Profile 3. */
+            { 388, 391 }, /* Profile 4. */
+            { 388, 391 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "SYSTEM_DESTINATION_15_0",
+        .fid = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 288, 303 }, /* Profile 2. */
+            { 288, 303 }, /* Profile 3. */
+            { 288, 303 }, /* Profile 4. */
+            { 288, 303 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "SYSTEM_OPCODE_3_0",
+        .fid = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 408, 411 }, /* Profile 2. */
+            { 408, 411 }, /* Profile 3. */
+            { 408, 411 }, /* Profile 4. */
+            { 408, 411 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "SYSTEM_SOURCE_15_0",
+        .fid = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 272, 287 }, /* Profile 2. */
+            { 272, 287 }, /* Profile 3. */
+            { 272, 287 }, /* Profile 4. */
+            { 272, 287 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "TIMESTAMP_CTRL_3_0",
+        .fid = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 368, 371 }, /* Profile 2. */
+            { 368, 371 }, /* Profile 3. */
+            { 368, 371 }, /* Profile 4. */
+            { 368, 371 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "TUNNEL_PROCESSING_RESULTS_1_3_0",
+        .fid = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 380, 383 }, /* Profile 2. */
+            { 380, 383 }, /* Profile 3. */
+            { 380, 383 }, /* Profile 4. */
+            { 380, 383 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "VFI_15_0",
+        .fid = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_VFI_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 160, 175 }, /* Profile 2. */
+            { 160, 175 }, /* Profile 3. */
+            { 160, 175 }, /* Profile 4. */
+            { 160, 175 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+};static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_rxpmd_flex_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_29_2_2_rxpmd_flex_field_data,
+};
+
+static shr_enum_map_t bcm56880_a0_hna_6_5_29_2_2_rxpmd_flex_reason_names[] = {
+    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_reasons_info_t bcm56880_a0_hna_6_5_29_2_2_rxpmd_flex_reasons_info = {
+    .num_reasons = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RXPMD_FLEX_REASON_COUNT,
+    .reason_names = bcm56880_a0_hna_6_5_29_2_2_rxpmd_flex_reason_names,
+    .reason_encode = bcm56880_a0_hna_6_5_29_2_2_rxpmd_flex_reason_encode,
+    .reason_decode = bcm56880_a0_hna_6_5_29_2_2_rxpmd_flex_reason_decode,
+};
+
+
+static int32_t bcmpkt_arp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_operation_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_operation_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_arp_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ARP_T_FID_COUNT] = {
+    bcmpkt_arp_t_hardware_len_get,
+    bcmpkt_arp_t_hardware_type_get,
+    bcmpkt_arp_t_operation_get,
+    bcmpkt_arp_t_prot_addr_len_get,
+    bcmpkt_arp_t_protocol_type_get,
+    bcmpkt_arp_t_sender_ha_get,
+    bcmpkt_arp_t_sender_ip_get,
+    bcmpkt_arp_t_target_ha_get,
+    bcmpkt_arp_t_target_ip_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_arp_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ARP_T_FID_COUNT] = {
+    bcmpkt_arp_t_hardware_len_set,
+    bcmpkt_arp_t_hardware_type_set,
+    bcmpkt_arp_t_operation_set,
+    bcmpkt_arp_t_prot_addr_len_set,
+    bcmpkt_arp_t_protocol_type_set,
+    bcmpkt_arp_t_sender_ha_set,
+    bcmpkt_arp_t_sender_ip_set,
+    bcmpkt_arp_t_target_ha_set,
+    bcmpkt_arp_t_target_ip_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_arp_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_arp_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ARP_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_29_2_2_arp_t_field_data,
+};
+
+
+static int32_t bcmpkt_authen_t_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_payload_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_payload_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_spi_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_spi_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_authen_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_AUTHEN_T_FID_COUNT] = {
+    bcmpkt_authen_t_data_get,
+    bcmpkt_authen_t_next_header_get,
+    bcmpkt_authen_t_payload_len_get,
+    bcmpkt_authen_t_reserved_get,
+    bcmpkt_authen_t_seq_num_get,
+    bcmpkt_authen_t_spi_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_authen_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_AUTHEN_T_FID_COUNT] = {
+    bcmpkt_authen_t_data_set,
+    bcmpkt_authen_t_next_header_set,
+    bcmpkt_authen_t_payload_len_set,
+    bcmpkt_authen_t_reserved_set,
+    bcmpkt_authen_t_seq_num_set,
+    bcmpkt_authen_t_spi_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_authen_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_authen_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_AUTHEN_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_29_2_2_authen_t_field_data,
+};
+
+
+static int32_t bcmpkt_bfd_t_desmintxintv_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_desmintxintv_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_minechorxintv_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_minechorxintv_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_reqminrxintv_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_reqminrxintv_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_ap_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 18, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_ap_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 18, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_bfd_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_bfd_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_cpi_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 19, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_cpi_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 19, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_dem_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 17, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_dem_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 17, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_detectmult_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_detectmult_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_diag_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 5);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_diag_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 5, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_fin_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 20, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_fin_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 20, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_mpt_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_mpt_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_mydiscrim_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_mydiscrim_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_poll_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 21, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_poll_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 21, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_sta_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 22, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_sta_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 22, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_urdiscrim_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_urdiscrim_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 29, 3);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 29, 3, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_bfd_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_FID_COUNT] = {
+    bcmpkt_bfd_t_ap_get,
+    bcmpkt_bfd_t_bfd_length_get,
+    bcmpkt_bfd_t_cpi_get,
+    bcmpkt_bfd_t_dem_get,
+    bcmpkt_bfd_t_desmintxintv_get,
+    bcmpkt_bfd_t_detectmult_get,
+    bcmpkt_bfd_t_diag_get,
+    bcmpkt_bfd_t_fin_get,
+    bcmpkt_bfd_t_minechorxintv_get,
+    bcmpkt_bfd_t_mpt_get,
+    bcmpkt_bfd_t_mydiscrim_get,
+    bcmpkt_bfd_t_poll_get,
+    bcmpkt_bfd_t_reqminrxintv_get,
+    bcmpkt_bfd_t_sta_get,
+    bcmpkt_bfd_t_urdiscrim_get,
+    bcmpkt_bfd_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_bfd_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_FID_COUNT] = {
+    bcmpkt_bfd_t_ap_set,
+    bcmpkt_bfd_t_bfd_length_set,
+    bcmpkt_bfd_t_cpi_set,
+    bcmpkt_bfd_t_dem_set,
+    bcmpkt_bfd_t_desmintxintv_set,
+    bcmpkt_bfd_t_detectmult_set,
+    bcmpkt_bfd_t_diag_set,
+    bcmpkt_bfd_t_fin_set,
+    bcmpkt_bfd_t_minechorxintv_set,
+    bcmpkt_bfd_t_mpt_set,
+    bcmpkt_bfd_t_mydiscrim_set,
+    bcmpkt_bfd_t_poll_set,
+    bcmpkt_bfd_t_reqminrxintv_set,
+    bcmpkt_bfd_t_sta_set,
+    bcmpkt_bfd_t_urdiscrim_set,
+    bcmpkt_bfd_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_bfd_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_bfd_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_BFD_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_29_2_2_bfd_t_field_data,
+};
+
+
+static int32_t bcmpkt_cntag_t_rpid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_cntag_t_rpid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_cntag_t_tpid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_cntag_t_tpid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_cntag_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CNTAG_T_FID_COUNT] = {
+    bcmpkt_cntag_t_rpid_get,
+    bcmpkt_cntag_t_tpid_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_cntag_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CNTAG_T_FID_COUNT] = {
+    bcmpkt_cntag_t_rpid_set,
+    bcmpkt_cntag_t_tpid_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_cntag_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_cntag_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CNTAG_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_29_2_2_cntag_t_field_data,
+};
+
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_cpu_composites_0_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = {
+    bcmpkt_cpu_composites_0_t_dma_cont0_get,
+    bcmpkt_cpu_composites_0_t_dma_cont1_get,
+    bcmpkt_cpu_composites_0_t_dma_cont2_get,
+    bcmpkt_cpu_composites_0_t_dma_cont3_get,
+    bcmpkt_cpu_composites_0_t_dma_cont4_get,
+    bcmpkt_cpu_composites_0_t_dma_cont5_get,
+    bcmpkt_cpu_composites_0_t_dma_cont6_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_cpu_composites_0_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = {
+    bcmpkt_cpu_composites_0_t_dma_cont0_set,
+    bcmpkt_cpu_composites_0_t_dma_cont1_set,
+    bcmpkt_cpu_composites_0_t_dma_cont2_set,
+    bcmpkt_cpu_composites_0_t_dma_cont3_set,
+    bcmpkt_cpu_composites_0_t_dma_cont4_set,
+    bcmpkt_cpu_composites_0_t_dma_cont5_set,
+    bcmpkt_cpu_composites_0_t_dma_cont6_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_cpu_composites_0_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_cpu_composites_0_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_29_2_2_cpu_composites_0_t_field_data,
+};
+
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_cpu_composites_1_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = {
+    bcmpkt_cpu_composites_1_t_dma_cont10_get,
+    bcmpkt_cpu_composites_1_t_dma_cont11_get,
+    bcmpkt_cpu_composites_1_t_dma_cont12_get,
+    bcmpkt_cpu_composites_1_t_dma_cont13_get,
+    bcmpkt_cpu_composites_1_t_dma_cont14_get,
+    bcmpkt_cpu_composites_1_t_dma_cont15_get,
+    bcmpkt_cpu_composites_1_t_dma_cont16_get,
+    bcmpkt_cpu_composites_1_t_dma_cont17_get,
+    bcmpkt_cpu_composites_1_t_dma_cont7_get,
+    bcmpkt_cpu_composites_1_t_dma_cont8_get,
+    bcmpkt_cpu_composites_1_t_dma_cont9_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_cpu_composites_1_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = {
+    bcmpkt_cpu_composites_1_t_dma_cont10_set,
+    bcmpkt_cpu_composites_1_t_dma_cont11_set,
+    bcmpkt_cpu_composites_1_t_dma_cont12_set,
+    bcmpkt_cpu_composites_1_t_dma_cont13_set,
+    bcmpkt_cpu_composites_1_t_dma_cont14_set,
+    bcmpkt_cpu_composites_1_t_dma_cont15_set,
+    bcmpkt_cpu_composites_1_t_dma_cont16_set,
+    bcmpkt_cpu_composites_1_t_dma_cont17_set,
+    bcmpkt_cpu_composites_1_t_dma_cont7_set,
+    bcmpkt_cpu_composites_1_t_dma_cont8_set,
+    bcmpkt_cpu_composites_1_t_dma_cont9_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_cpu_composites_1_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_cpu_composites_1_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_29_2_2_cpu_composites_1_t_field_data,
+};
+
+
+static int32_t bcmpkt_dest_option_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_dest_option_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_dest_option_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_dest_option_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_dest_option_t_option_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_dest_option_t_option_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_dest_option_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_DEST_OPTION_T_FID_COUNT] = {
+    bcmpkt_dest_option_t_hdr_ext_len_get,
+    bcmpkt_dest_option_t_next_header_get,
+    bcmpkt_dest_option_t_option_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_dest_option_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_DEST_OPTION_T_FID_COUNT] = {
+    bcmpkt_dest_option_t_hdr_ext_len_set,
+    bcmpkt_dest_option_t_next_header_set,
+    bcmpkt_dest_option_t_option_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_dest_option_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_dest_option_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_DEST_OPTION_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_29_2_2_dest_option_t_field_data,
+};
+
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 11, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 11, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 13, 3);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 13, 3, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 10);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 10, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_t_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 10, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_t_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 10, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 12);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 12, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_erspan3_fixed_hdr_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = {
+    bcmpkt_erspan3_fixed_hdr_t_bso_get,
+    bcmpkt_erspan3_fixed_hdr_t_cos_get,
+    bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get,
+    bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get,
+    bcmpkt_erspan3_fixed_hdr_t_session_id_get,
+    bcmpkt_erspan3_fixed_hdr_t_t_get,
+    bcmpkt_erspan3_fixed_hdr_t_timestamp_get,
+    bcmpkt_erspan3_fixed_hdr_t_ver_get,
+    bcmpkt_erspan3_fixed_hdr_t_vlan_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_erspan3_fixed_hdr_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = {
+    bcmpkt_erspan3_fixed_hdr_t_bso_set,
+    bcmpkt_erspan3_fixed_hdr_t_cos_set,
+    bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set,
+    bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set,
+    bcmpkt_erspan3_fixed_hdr_t_session_id_set,
+    bcmpkt_erspan3_fixed_hdr_t_t_set,
+    bcmpkt_erspan3_fixed_hdr_t_timestamp_set,
+    bcmpkt_erspan3_fixed_hdr_t_ver_set,
+    bcmpkt_erspan3_fixed_hdr_t_vlan_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_erspan3_fixed_hdr_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_erspan3_fixed_hdr_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_29_2_2_erspan3_fixed_hdr_t_field_data,
+};
+
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 26, 6);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 26, 6, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 10);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 10, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_erspan3_subhdr_5_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = {
+    bcmpkt_erspan3_subhdr_5_t_platform_id_get,
+    bcmpkt_erspan3_subhdr_5_t_port_id_get,
+    bcmpkt_erspan3_subhdr_5_t_switch_id_get,
+    bcmpkt_erspan3_subhdr_5_t_timestamp_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_erspan3_subhdr_5_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = {
+    bcmpkt_erspan3_subhdr_5_t_platform_id_set,
+    bcmpkt_erspan3_subhdr_5_t_port_id_set,
+    bcmpkt_erspan3_subhdr_5_t_switch_id_set,
+    bcmpkt_erspan3_subhdr_5_t_timestamp_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_erspan3_subhdr_5_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_erspan3_subhdr_5_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_29_2_2_erspan3_subhdr_5_t_field_data,
+};
+
+
+static int32_t bcmpkt_esp_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_pad_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 8, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_pad_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 8, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_pad_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_pad_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_spi_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_spi_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_esp_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ESP_T_FID_COUNT] = {
+    bcmpkt_esp_t_next_header_get,
+    bcmpkt_esp_t_pad_get,
+    bcmpkt_esp_t_pad_len_get,
+    bcmpkt_esp_t_seq_num_get,
+    bcmpkt_esp_t_spi_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_esp_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ESP_T_FID_COUNT] = {
+    bcmpkt_esp_t_next_header_set,
+    bcmpkt_esp_t_pad_set,
+    bcmpkt_esp_t_pad_len_set,
+    bcmpkt_esp_t_seq_num_set,
+    bcmpkt_esp_t_spi_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_esp_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_esp_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ESP_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_29_2_2_esp_t_field_data,
+};
+
+
+static int32_t bcmpkt_etag_t_tag_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_etag_t_tag_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_etag_t_tpid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_etag_t_tpid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_etag_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ETAG_T_FID_COUNT] = {
+    bcmpkt_etag_t_tag_get,
+    bcmpkt_etag_t_tpid_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_etag_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ETAG_T_FID_COUNT] = {
+    bcmpkt_etag_t_tag_set,
+    bcmpkt_etag_t_tpid_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_etag_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ETAG_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_etag_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ETAG_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_29_2_2_etag_t_field_data,
+};
+
+
+static int32_t bcmpkt_ethertype_t_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ethertype_t_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_ethertype_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ETHERTYPE_T_FID_COUNT] = {
+    bcmpkt_ethertype_t_type_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_ethertype_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ETHERTYPE_T_FID_COUNT] = {
+    bcmpkt_ethertype_t_type_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_ethertype_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_ethertype_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ETHERTYPE_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_29_2_2_ethertype_t_field_data,
+};
+
+
+static int32_t bcmpkt_frag_t_frag_info_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_frag_t_frag_info_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_frag_t_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_frag_t_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_frag_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_frag_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_frag_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_frag_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_frag_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_FRAG_T_FID_COUNT] = {
+    bcmpkt_frag_t_frag_info_get,
+    bcmpkt_frag_t_id_get,
+    bcmpkt_frag_t_next_header_get,
+    bcmpkt_frag_t_reserved_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_frag_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_FRAG_T_FID_COUNT] = {
+    bcmpkt_frag_t_frag_info_set,
+    bcmpkt_frag_t_id_set,
+    bcmpkt_frag_t_next_header_set,
+    bcmpkt_frag_t_reserved_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_frag_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_frag_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_FRAG_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_29_2_2_frag_t_field_data,
+};
+
+
+static int32_t bcmpkt_generic_loopback_t_destination_obj_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_destination_obj_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_destination_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_destination_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_entropy_obj_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_entropy_obj_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_header_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 20, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_header_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 20, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_input_priority_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 12, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_input_priority_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 12, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_interface_ctrl_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 4, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_interface_ctrl_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 4, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_interface_obj_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_interface_obj_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_qos_obj_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_qos_obj_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_reserved_1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_reserved_1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_reserved_2_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_reserved_2_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_source_system_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_source_system_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_start_byte_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_start_byte_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_generic_loopback_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = {
+    bcmpkt_generic_loopback_t_destination_obj_get,
+    bcmpkt_generic_loopback_t_destination_type_get,
+    bcmpkt_generic_loopback_t_entropy_obj_get,
+    bcmpkt_generic_loopback_t_flags_get,
+    bcmpkt_generic_loopback_t_header_type_get,
+    bcmpkt_generic_loopback_t_input_priority_get,
+    bcmpkt_generic_loopback_t_interface_ctrl_get,
+    bcmpkt_generic_loopback_t_interface_obj_get,
+    bcmpkt_generic_loopback_t_processing_ctrl_0_get,
+    bcmpkt_generic_loopback_t_processing_ctrl_1_get,
+    bcmpkt_generic_loopback_t_qos_obj_get,
+    bcmpkt_generic_loopback_t_reserved_1_get,
+    bcmpkt_generic_loopback_t_reserved_2_get,
+    bcmpkt_generic_loopback_t_source_system_port_get,
+    bcmpkt_generic_loopback_t_start_byte_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_generic_loopback_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = {
+    bcmpkt_generic_loopback_t_destination_obj_set,
+    bcmpkt_generic_loopback_t_destination_type_set,
+    bcmpkt_generic_loopback_t_entropy_obj_set,
+    bcmpkt_generic_loopback_t_flags_set,
+    bcmpkt_generic_loopback_t_header_type_set,
+    bcmpkt_generic_loopback_t_input_priority_set,
+    bcmpkt_generic_loopback_t_interface_ctrl_set,
+    bcmpkt_generic_loopback_t_interface_obj_set,
+    bcmpkt_generic_loopback_t_processing_ctrl_0_set,
+    bcmpkt_generic_loopback_t_processing_ctrl_1_set,
+    bcmpkt_generic_loopback_t_qos_obj_set,
+    bcmpkt_generic_loopback_t_reserved_1_set,
+    bcmpkt_generic_loopback_t_reserved_2_set,
+    bcmpkt_generic_loopback_t_source_system_port_set,
+    bcmpkt_generic_loopback_t_start_byte_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_generic_loopback_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_generic_loopback_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_29_2_2_generic_loopback_t_field_data,
+};
+
+
+static int32_t bcmpkt_gpe_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_next_protocol_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_next_protocol_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_reserved0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_reserved0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_reserved1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_reserved1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_vni_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 8, 24);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_vni_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 8, 24, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_gpe_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GPE_T_FID_COUNT] = {
+    bcmpkt_gpe_t_flags_get,
+    bcmpkt_gpe_t_next_protocol_get,
+    bcmpkt_gpe_t_reserved0_get,
+    bcmpkt_gpe_t_reserved1_get,
+    bcmpkt_gpe_t_vni_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_gpe_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GPE_T_FID_COUNT] = {
+    bcmpkt_gpe_t_flags_set,
+    bcmpkt_gpe_t_next_protocol_set,
+    bcmpkt_gpe_t_reserved0_set,
+    bcmpkt_gpe_t_reserved1_set,
+    bcmpkt_gpe_t_vni_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_gpe_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_gpe_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GPE_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_29_2_2_gpe_t_field_data,
+};
+
+
+static int32_t bcmpkt_gre_chksum_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_chksum_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gre_chksum_t_offset_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_chksum_t_offset_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_gre_chksum_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = {
+    bcmpkt_gre_chksum_t_checksum_get,
+    bcmpkt_gre_chksum_t_offset_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_gre_chksum_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = {
+    bcmpkt_gre_chksum_t_checksum_set,
+    bcmpkt_gre_chksum_t_offset_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_gre_chksum_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_gre_chksum_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_CHKSUM_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_29_2_2_gre_chksum_t_field_data,
+};
+
+
+static int32_t bcmpkt_gre_key_t_key_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_key_t_key_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_gre_key_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_KEY_T_FID_COUNT] = {
+    bcmpkt_gre_key_t_key_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_gre_key_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_KEY_T_FID_COUNT] = {
+    bcmpkt_gre_key_t_key_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_gre_key_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_gre_key_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_KEY_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_29_2_2_gre_key_t_field_data,
+};
+
+
+static int32_t bcmpkt_gre_rout_t_routing_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_rout_t_routing_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_gre_rout_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_ROUT_T_FID_COUNT] = {
+    bcmpkt_gre_rout_t_routing_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_gre_rout_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_ROUT_T_FID_COUNT] = {
+    bcmpkt_gre_rout_t_routing_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_gre_rout_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_gre_rout_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_ROUT_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_29_2_2_gre_rout_t_field_data,
+};
+
+
+static int32_t bcmpkt_gre_seq_t_sequence_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_seq_t_sequence_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_gre_seq_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_SEQ_T_FID_COUNT] = {
+    bcmpkt_gre_seq_t_sequence_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_gre_seq_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_SEQ_T_FID_COUNT] = {
+    bcmpkt_gre_seq_t_sequence_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_gre_seq_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_gre_seq_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_SEQ_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_29_2_2_gre_seq_t_field_data,
+};
+
+
+static int32_t bcmpkt_gre_t_c_r_k_s_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_t_c_r_k_s_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gre_t_protocol_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_t_protocol_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gre_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 19, 9);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 19, 9, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gre_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 3);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 3, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_gre_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_T_FID_COUNT] = {
+    bcmpkt_gre_t_c_r_k_s_get,
+    bcmpkt_gre_t_protocol_get,
+    bcmpkt_gre_t_reserved_get,
+    bcmpkt_gre_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_gre_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_T_FID_COUNT] = {
+    bcmpkt_gre_t_c_r_k_s_set,
+    bcmpkt_gre_t_protocol_set,
+    bcmpkt_gre_t_reserved_set,
+    bcmpkt_gre_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_gre_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_gre_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_GRE_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_29_2_2_gre_t_field_data,
+};
+
+
+static int32_t bcmpkt_hop_by_hop_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hop_by_hop_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hop_by_hop_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hop_by_hop_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hop_by_hop_t_option_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_hop_by_hop_t_option_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_hop_by_hop_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = {
+    bcmpkt_hop_by_hop_t_hdr_ext_len_get,
+    bcmpkt_hop_by_hop_t_next_header_get,
+    bcmpkt_hop_by_hop_t_option_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_hop_by_hop_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = {
+    bcmpkt_hop_by_hop_t_hdr_ext_len_set,
+    bcmpkt_hop_by_hop_t_next_header_set,
+    bcmpkt_hop_by_hop_t_option_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_hop_by_hop_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_hop_by_hop_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_HOP_BY_HOP_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_29_2_2_hop_by_hop_t_field_data,
+};
+
+
+static int32_t bcmpkt_icmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_icmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_icmp_t_code_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_icmp_t_code_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_icmp_t_icmp_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_icmp_t_icmp_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_icmp_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ICMP_T_FID_COUNT] = {
+    bcmpkt_icmp_t_checksum_get,
+    bcmpkt_icmp_t_code_get,
+    bcmpkt_icmp_t_icmp_type_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_icmp_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ICMP_T_FID_COUNT] = {
+    bcmpkt_icmp_t_checksum_set,
+    bcmpkt_icmp_t_code_set,
+    bcmpkt_icmp_t_icmp_type_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_icmp_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_icmp_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ICMP_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_29_2_2_icmp_t_field_data,
+};
+
+
+static int32_t bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_0_a_t_lns_device_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 24);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_0_a_t_lns_device_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 24, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_0_a_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT] = {
+    bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_get,
+    bcmpkt_ifa_flex_md_0_a_t_lns_device_id_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_0_a_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT] = {
+    bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_set,
+    bcmpkt_ifa_flex_md_0_a_t_lns_device_id_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_0_a_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_0_A_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_0_a_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_0_a_t_field_data,
+};
+
+
+static int32_t bcmpkt_ifa_flex_md_0_b_t_cn_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 26, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_0_b_t_cn_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 26, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_0_b_t_port_speed_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_0_b_t_port_speed_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_0_b_t_queue_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 20, 6);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_0_b_t_queue_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 20, 6, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 20);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 20, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_0_b_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT] = {
+    bcmpkt_ifa_flex_md_0_b_t_cn_get,
+    bcmpkt_ifa_flex_md_0_b_t_port_speed_get,
+    bcmpkt_ifa_flex_md_0_b_t_queue_id_get,
+    bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_0_b_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT] = {
+    bcmpkt_ifa_flex_md_0_b_t_cn_set,
+    bcmpkt_ifa_flex_md_0_b_t_port_speed_set,
+    bcmpkt_ifa_flex_md_0_b_t_queue_id_set,
+    bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_0_b_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_0_B_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_0_b_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_0_b_t_field_data,
+};
+
+
+static int32_t bcmpkt_ifa_flex_md_1_t_egress_port_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_1_t_egress_port_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_1_t_ingress_port_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_1_t_ingress_port_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_1_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT] = {
+    bcmpkt_ifa_flex_md_1_t_egress_port_id_get,
+    bcmpkt_ifa_flex_md_1_t_ingress_port_id_get,
+    bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_1_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT] = {
+    bcmpkt_ifa_flex_md_1_t_egress_port_id_set,
+    bcmpkt_ifa_flex_md_1_t_ingress_port_id_set,
+    bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_1_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_1_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_1_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_1_t_field_data,
+};
+
+
+static int32_t bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_2_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT] = {
+    bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_get,
+    bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_2_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT] = {
+    bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_set,
+    bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_2_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_2_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_2_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_2_t_field_data,
+};
+
+
+static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_3_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT] = {
+    bcmpkt_ifa_flex_md_3_t_mmu_stat_0_get,
+    bcmpkt_ifa_flex_md_3_t_mmu_stat_1_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_3_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT] = {
+    bcmpkt_ifa_flex_md_3_t_mmu_stat_0_set,
+    bcmpkt_ifa_flex_md_3_t_mmu_stat_1_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_3_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_3_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_3_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_3_t_field_data,
+};
+
+
+static int32_t bcmpkt_ifa_header_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_gns_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_gns_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_max_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_max_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_next_hdr_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_next_hdr_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_ver_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_ver_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_ifa_header_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_HEADER_T_FID_COUNT] = {
+    bcmpkt_ifa_header_t_flags_get,
+    bcmpkt_ifa_header_t_gns_get,
+    bcmpkt_ifa_header_t_max_length_get,
+    bcmpkt_ifa_header_t_next_hdr_get,
+    bcmpkt_ifa_header_t_ver_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_ifa_header_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_HEADER_T_FID_COUNT] = {
+    bcmpkt_ifa_header_t_flags_set,
+    bcmpkt_ifa_header_t_gns_set,
+    bcmpkt_ifa_header_t_max_length_set,
+    bcmpkt_ifa_header_t_next_hdr_set,
+    bcmpkt_ifa_header_t_ver_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_ifa_header_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_ifa_header_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_HEADER_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_29_2_2_ifa_header_t_field_data,
+};
+
+
+static int32_t bcmpkt_ifa_md_base_t_action_vector_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_md_base_t_action_vector_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_md_base_t_hop_limit_current_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_md_base_t_hop_limit_current_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_md_base_t_request_vector_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_md_base_t_request_vector_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_ifa_md_base_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_MD_BASE_T_FID_COUNT] = {
+    bcmpkt_ifa_md_base_t_action_vector_get,
+    bcmpkt_ifa_md_base_t_hop_limit_current_length_get,
+    bcmpkt_ifa_md_base_t_request_vector_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_ifa_md_base_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_MD_BASE_T_FID_COUNT] = {
+    bcmpkt_ifa_md_base_t_action_vector_set,
+    bcmpkt_ifa_md_base_t_hop_limit_current_length_set,
+    bcmpkt_ifa_md_base_t_request_vector_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_ifa_md_base_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_MD_BASE_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_ifa_md_base_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_MD_BASE_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_29_2_2_ifa_md_base_t_field_data,
+};
+
+
+static int32_t bcmpkt_ifa_metadata_t_action_vector_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_t_action_vector_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_t_hop_limit_current_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_t_hop_limit_current_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_t_metadata_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_t_metadata_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_t_request_vector_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_t_request_vector_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_ifa_metadata_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_METADATA_T_FID_COUNT] = {
+    bcmpkt_ifa_metadata_t_action_vector_get,
+    bcmpkt_ifa_metadata_t_hop_limit_current_length_get,
+    bcmpkt_ifa_metadata_t_metadata_get,
+    bcmpkt_ifa_metadata_t_request_vector_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_ifa_metadata_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_METADATA_T_FID_COUNT] = {
+    bcmpkt_ifa_metadata_t_action_vector_set,
+    bcmpkt_ifa_metadata_t_hop_limit_current_length_set,
+    bcmpkt_ifa_metadata_t_metadata_set,
+    bcmpkt_ifa_metadata_t_request_vector_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_ifa_metadata_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_METADATA_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_ifa_metadata_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IFA_METADATA_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_29_2_2_ifa_metadata_t_field_data,
+};
+
+
+static int32_t bcmpkt_igmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_igmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_igmp_t_group_address_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_igmp_t_group_address_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_igmp_t_igmp_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_igmp_t_igmp_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_igmp_t_max_resp_time_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_igmp_t_max_resp_time_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_igmp_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IGMP_T_FID_COUNT] = {
+    bcmpkt_igmp_t_checksum_get,
+    bcmpkt_igmp_t_group_address_get,
+    bcmpkt_igmp_t_igmp_type_get,
+    bcmpkt_igmp_t_max_resp_time_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_igmp_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IGMP_T_FID_COUNT] = {
+    bcmpkt_igmp_t_checksum_set,
+    bcmpkt_igmp_t_group_address_set,
+    bcmpkt_igmp_t_igmp_type_set,
+    bcmpkt_igmp_t_max_resp_time_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_igmp_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_igmp_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IGMP_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_29_2_2_igmp_t_field_data,
+};
+
+
+static int32_t bcmpkt_ipfix_t_export_time_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_export_time_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_obs_domain_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_obs_domain_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_ipfix_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPFIX_T_FID_COUNT] = {
+    bcmpkt_ipfix_t_export_time_get,
+    bcmpkt_ipfix_t_length_get,
+    bcmpkt_ipfix_t_obs_domain_id_get,
+    bcmpkt_ipfix_t_sequence_num_get,
+    bcmpkt_ipfix_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_ipfix_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPFIX_T_FID_COUNT] = {
+    bcmpkt_ipfix_t_export_time_set,
+    bcmpkt_ipfix_t_length_set,
+    bcmpkt_ipfix_t_obs_domain_id_set,
+    bcmpkt_ipfix_t_sequence_num_set,
+    bcmpkt_ipfix_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_ipfix_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_ipfix_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPFIX_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_29_2_2_ipfix_t_field_data,
+};
+
+
+static int32_t bcmpkt_ipv4_t_da_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_da_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_flags_frag_offset_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_flags_frag_offset_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_hdr_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_hdr_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_option_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_option_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_protocol_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_protocol_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_sa_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_sa_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_tos_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_tos_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_total_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_total_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_ttl_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_ttl_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_version_hdr_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_version_hdr_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_ipv4_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV4_T_FID_COUNT] = {
+    bcmpkt_ipv4_t_da_get,
+    bcmpkt_ipv4_t_flags_frag_offset_get,
+    bcmpkt_ipv4_t_hdr_checksum_get,
+    bcmpkt_ipv4_t_id_get,
+    bcmpkt_ipv4_t_option_get,
+    bcmpkt_ipv4_t_protocol_get,
+    bcmpkt_ipv4_t_sa_get,
+    bcmpkt_ipv4_t_tos_get,
+    bcmpkt_ipv4_t_total_length_get,
+    bcmpkt_ipv4_t_ttl_get,
+    bcmpkt_ipv4_t_version_hdr_len_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_ipv4_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV4_T_FID_COUNT] = {
+    bcmpkt_ipv4_t_da_set,
+    bcmpkt_ipv4_t_flags_frag_offset_set,
+    bcmpkt_ipv4_t_hdr_checksum_set,
+    bcmpkt_ipv4_t_id_set,
+    bcmpkt_ipv4_t_option_set,
+    bcmpkt_ipv4_t_protocol_set,
+    bcmpkt_ipv4_t_sa_set,
+    bcmpkt_ipv4_t_tos_set,
+    bcmpkt_ipv4_t_total_length_set,
+    bcmpkt_ipv4_t_ttl_set,
+    bcmpkt_ipv4_t_version_hdr_len_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_ipv4_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_ipv4_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV4_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_29_2_2_ipv4_t_field_data,
+};
+
+
+static int32_t bcmpkt_ipv6_t_da_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_da_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_flow_label_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 20);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_flow_label_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 20, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_hop_limit_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_hop_limit_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 8, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 8, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_payload_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_payload_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_sa_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_sa_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_traffic_class_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 20, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_traffic_class_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 20, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_ipv6_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV6_T_FID_COUNT] = {
+    bcmpkt_ipv6_t_da_get,
+    bcmpkt_ipv6_t_flow_label_get,
+    bcmpkt_ipv6_t_hop_limit_get,
+    bcmpkt_ipv6_t_next_header_get,
+    bcmpkt_ipv6_t_payload_length_get,
+    bcmpkt_ipv6_t_sa_get,
+    bcmpkt_ipv6_t_traffic_class_get,
+    bcmpkt_ipv6_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_ipv6_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV6_T_FID_COUNT] = {
+    bcmpkt_ipv6_t_da_set,
+    bcmpkt_ipv6_t_flow_label_set,
+    bcmpkt_ipv6_t_hop_limit_set,
+    bcmpkt_ipv6_t_next_header_set,
+    bcmpkt_ipv6_t_payload_length_set,
+    bcmpkt_ipv6_t_sa_set,
+    bcmpkt_ipv6_t_traffic_class_set,
+    bcmpkt_ipv6_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_ipv6_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_ipv6_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_IPV6_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_29_2_2_ipv6_t_field_data,
+};
+
+
+static int32_t bcmpkt_l2_t_macda_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_l2_t_macda_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_l2_t_macsa_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_l2_t_macsa_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_l2_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_L2_T_FID_COUNT] = {
+    bcmpkt_l2_t_macda_get,
+    bcmpkt_l2_t_macsa_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_l2_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_L2_T_FID_COUNT] = {
+    bcmpkt_l2_t_macda_set,
+    bcmpkt_l2_t_macsa_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_l2_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_L2_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_l2_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_L2_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_29_2_2_l2_t_field_data,
+};
+
+
+static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_mirror_erspan_sn_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = {
+    bcmpkt_mirror_erspan_sn_t_seq_num_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_mirror_erspan_sn_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = {
+    bcmpkt_mirror_erspan_sn_t_seq_num_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_mirror_erspan_sn_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_mirror_erspan_sn_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_29_2_2_mirror_erspan_sn_t_field_data,
+};
+
+
+static int32_t bcmpkt_mirror_transport_t_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_mirror_transport_t_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_mirror_transport_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = {
+    bcmpkt_mirror_transport_t_data_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_mirror_transport_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = {
+    bcmpkt_mirror_transport_t_data_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_mirror_transport_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_mirror_transport_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_29_2_2_mirror_transport_t_field_data,
+};
+
+
+static int32_t bcmpkt_mpls_ach_t_channel_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_ach_t_channel_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_ach_t_cw_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_ach_t_cw_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_ach_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_ach_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_ach_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_ach_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 4, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_mpls_ach_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_ACH_T_FID_COUNT] = {
+    bcmpkt_mpls_ach_t_channel_type_get,
+    bcmpkt_mpls_ach_t_cw_type_get,
+    bcmpkt_mpls_ach_t_reserved_get,
+    bcmpkt_mpls_ach_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_mpls_ach_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_ACH_T_FID_COUNT] = {
+    bcmpkt_mpls_ach_t_channel_type_set,
+    bcmpkt_mpls_ach_t_cw_type_set,
+    bcmpkt_mpls_ach_t_reserved_set,
+    bcmpkt_mpls_ach_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_mpls_ach_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_mpls_ach_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_ACH_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_29_2_2_mpls_ach_t_field_data,
+};
+
+
+static int32_t bcmpkt_mpls_bv_t_value_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_bv_t_value_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_mpls_bv_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_BV_T_FID_COUNT] = {
+    bcmpkt_mpls_bv_t_value_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_mpls_bv_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_BV_T_FID_COUNT] = {
+    bcmpkt_mpls_bv_t_value_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_mpls_bv_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_mpls_bv_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_BV_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_29_2_2_mpls_bv_t_field_data,
+};
+
+
+static int32_t bcmpkt_mpls_cw_t_cw_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_cw_t_cw_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_cw_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 12);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_cw_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 12, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_cw_t_seq_number_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_cw_t_seq_number_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_mpls_cw_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_CW_T_FID_COUNT] = {
+    bcmpkt_mpls_cw_t_cw_type_get,
+    bcmpkt_mpls_cw_t_reserved_get,
+    bcmpkt_mpls_cw_t_seq_number_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_mpls_cw_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_CW_T_FID_COUNT] = {
+    bcmpkt_mpls_cw_t_cw_type_set,
+    bcmpkt_mpls_cw_t_reserved_set,
+    bcmpkt_mpls_cw_t_seq_number_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_mpls_cw_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_mpls_cw_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_CW_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_29_2_2_mpls_cw_t_field_data,
+};
+
+
+static int32_t bcmpkt_mpls_t_bos_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_t_bos_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_t_exp_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 9, 3);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_t_exp_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 9, 3, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_t_label_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 12, 20);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_t_label_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 12, 20, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_t_ttl_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_t_ttl_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_mpls_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_T_FID_COUNT] = {
+    bcmpkt_mpls_t_bos_get,
+    bcmpkt_mpls_t_exp_get,
+    bcmpkt_mpls_t_label_get,
+    bcmpkt_mpls_t_ttl_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_mpls_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_T_FID_COUNT] = {
+    bcmpkt_mpls_t_bos_set,
+    bcmpkt_mpls_t_exp_set,
+    bcmpkt_mpls_t_label_set,
+    bcmpkt_mpls_t_ttl_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_mpls_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_mpls_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_MPLS_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_29_2_2_mpls_t_field_data,
+};
+
+
+static int32_t bcmpkt_p_1588_t_cntrl_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[8], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_cntrl_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[8], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_correction_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_correction_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_domain_nb_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_domain_nb_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_logmsginterval_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[8], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_logmsginterval_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[8], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_msg_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_msg_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_msg_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_msg_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_reserved1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 20, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_reserved1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 20, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_reserved2_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_reserved3_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_reserved3_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_seq_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[7], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_seq_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[7], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_srcportid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_srcportid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_transportspec_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_transportspec_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 4, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_p_1588_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T_FID_COUNT] = {
+    bcmpkt_p_1588_t_cntrl_get,
+    bcmpkt_p_1588_t_correction_get,
+    bcmpkt_p_1588_t_domain_nb_get,
+    bcmpkt_p_1588_t_flags_get,
+    bcmpkt_p_1588_t_logmsginterval_get,
+    bcmpkt_p_1588_t_msg_length_get,
+    bcmpkt_p_1588_t_msg_type_get,
+    bcmpkt_p_1588_t_reserved1_get,
+    bcmpkt_p_1588_t_reserved2_get,
+    bcmpkt_p_1588_t_reserved3_get,
+    bcmpkt_p_1588_t_seq_id_get,
+    bcmpkt_p_1588_t_srcportid_get,
+    bcmpkt_p_1588_t_transportspec_get,
+    bcmpkt_p_1588_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_p_1588_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T_FID_COUNT] = {
+    bcmpkt_p_1588_t_cntrl_set,
+    bcmpkt_p_1588_t_correction_set,
+    bcmpkt_p_1588_t_domain_nb_set,
+    bcmpkt_p_1588_t_flags_set,
+    bcmpkt_p_1588_t_logmsginterval_set,
+    bcmpkt_p_1588_t_msg_length_set,
+    bcmpkt_p_1588_t_msg_type_set,
+    bcmpkt_p_1588_t_reserved1_set,
+    bcmpkt_p_1588_t_reserved2_set,
+    bcmpkt_p_1588_t_reserved3_set,
+    bcmpkt_p_1588_t_seq_id_set,
+    bcmpkt_p_1588_t_srcportid_set,
+    bcmpkt_p_1588_t_transportspec_set,
+    bcmpkt_p_1588_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_p_1588_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_p_1588_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_P_1588_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_29_2_2_p_1588_t_field_data,
+};
+
+
+static int32_t bcmpkt_prog_ext_hdr_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_prog_ext_hdr_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_prog_ext_hdr_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_prog_ext_hdr_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_prog_ext_hdr_t_option_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_prog_ext_hdr_t_option_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_prog_ext_hdr_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = {
+    bcmpkt_prog_ext_hdr_t_hdr_ext_len_get,
+    bcmpkt_prog_ext_hdr_t_next_header_get,
+    bcmpkt_prog_ext_hdr_t_option_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_prog_ext_hdr_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = {
+    bcmpkt_prog_ext_hdr_t_hdr_ext_len_set,
+    bcmpkt_prog_ext_hdr_t_next_header_set,
+    bcmpkt_prog_ext_hdr_t_option_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_prog_ext_hdr_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_prog_ext_hdr_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PROG_EXT_HDR_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_29_2_2_prog_ext_hdr_t_field_data,
+};
+
+
+static int32_t bcmpkt_psamp_0_t_flowset_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_flowset_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_next_hop_index_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_next_hop_index_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_psamp_0_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_0_T_FID_COUNT] = {
+    bcmpkt_psamp_0_t_flowset_get,
+    bcmpkt_psamp_0_t_length_get,
+    bcmpkt_psamp_0_t_next_hop_index_get,
+    bcmpkt_psamp_0_t_obs_time_ns_get,
+    bcmpkt_psamp_0_t_obs_time_s_get,
+    bcmpkt_psamp_0_t_template_id_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_psamp_0_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_0_T_FID_COUNT] = {
+    bcmpkt_psamp_0_t_flowset_set,
+    bcmpkt_psamp_0_t_length_set,
+    bcmpkt_psamp_0_t_next_hop_index_set,
+    bcmpkt_psamp_0_t_obs_time_ns_set,
+    bcmpkt_psamp_0_t_obs_time_s_set,
+    bcmpkt_psamp_0_t_template_id_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_psamp_0_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_psamp_0_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_0_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_29_2_2_psamp_0_t_field_data,
+};
+
+
+static int32_t bcmpkt_psamp_1_t_dlb_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_dlb_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_egress_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_egress_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_epoch_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_epoch_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_variable_flag_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_variable_flag_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 16, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_psamp_1_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_1_T_FID_COUNT] = {
+    bcmpkt_psamp_1_t_dlb_id_get,
+    bcmpkt_psamp_1_t_egress_port_get,
+    bcmpkt_psamp_1_t_epoch_get,
+    bcmpkt_psamp_1_t_ingress_port_get,
+    bcmpkt_psamp_1_t_sampled_length_get,
+    bcmpkt_psamp_1_t_user_meta_data_get,
+    bcmpkt_psamp_1_t_variable_flag_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_psamp_1_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_1_T_FID_COUNT] = {
+    bcmpkt_psamp_1_t_dlb_id_set,
+    bcmpkt_psamp_1_t_egress_port_set,
+    bcmpkt_psamp_1_t_epoch_set,
+    bcmpkt_psamp_1_t_ingress_port_set,
+    bcmpkt_psamp_1_t_sampled_length_set,
+    bcmpkt_psamp_1_t_user_meta_data_set,
+    bcmpkt_psamp_1_t_variable_flag_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_psamp_1_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_psamp_1_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_1_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_29_2_2_psamp_1_t_field_data,
+};
+
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[4], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[4], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[4], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[4], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_psamp_mirror_on_drop_0_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = {
+    bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_length_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_template_id_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_psamp_mirror_on_drop_0_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = {
+    bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_length_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_template_id_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_psamp_mirror_on_drop_0_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_psamp_mirror_on_drop_0_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_29_2_2_psamp_mirror_on_drop_0_t_field_data,
+};
+
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_mod_state_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 22, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_mod_state_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 22, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 6);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 6, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_psamp_mirror_on_drop_3_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = {
+    bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_get,
+    bcmpkt_psamp_mirror_on_drop_3_t_mod_state_get,
+    bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_get,
+    bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_get,
+    bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_get,
+    bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_get,
+    bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_psamp_mirror_on_drop_3_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = {
+    bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_set,
+    bcmpkt_psamp_mirror_on_drop_3_t_mod_state_set,
+    bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_set,
+    bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_set,
+    bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_set,
+    bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_set,
+    bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_psamp_mirror_on_drop_3_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_psamp_mirror_on_drop_3_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_29_2_2_psamp_mirror_on_drop_3_t_field_data,
+};
+
+
+static int32_t bcmpkt_rarp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_operation_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_operation_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_rarp_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RARP_T_FID_COUNT] = {
+    bcmpkt_rarp_t_hardware_len_get,
+    bcmpkt_rarp_t_hardware_type_get,
+    bcmpkt_rarp_t_operation_get,
+    bcmpkt_rarp_t_prot_addr_len_get,
+    bcmpkt_rarp_t_protocol_type_get,
+    bcmpkt_rarp_t_sender_ha_get,
+    bcmpkt_rarp_t_sender_ip_get,
+    bcmpkt_rarp_t_target_ha_get,
+    bcmpkt_rarp_t_target_ip_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_rarp_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RARP_T_FID_COUNT] = {
+    bcmpkt_rarp_t_hardware_len_set,
+    bcmpkt_rarp_t_hardware_type_set,
+    bcmpkt_rarp_t_operation_set,
+    bcmpkt_rarp_t_prot_addr_len_set,
+    bcmpkt_rarp_t_protocol_type_set,
+    bcmpkt_rarp_t_sender_ha_set,
+    bcmpkt_rarp_t_sender_ip_set,
+    bcmpkt_rarp_t_target_ha_set,
+    bcmpkt_rarp_t_target_ip_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_rarp_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_rarp_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RARP_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_29_2_2_rarp_t_field_data,
+};
+
+
+static int32_t bcmpkt_routing_t_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_routing_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_routing_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_segments_left_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_segments_left_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_routing_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ROUTING_T_FID_COUNT] = {
+    bcmpkt_routing_t_data_get,
+    bcmpkt_routing_t_hdr_ext_len_get,
+    bcmpkt_routing_t_next_header_get,
+    bcmpkt_routing_t_routing_type_get,
+    bcmpkt_routing_t_segments_left_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_routing_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ROUTING_T_FID_COUNT] = {
+    bcmpkt_routing_t_data_set,
+    bcmpkt_routing_t_hdr_ext_len_set,
+    bcmpkt_routing_t_next_header_set,
+    bcmpkt_routing_t_routing_type_set,
+    bcmpkt_routing_t_segments_left_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_routing_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_routing_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_ROUTING_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_29_2_2_routing_t_field_data,
+};
+
+
+static int32_t bcmpkt_rspan_t_tag_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rspan_t_tag_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rspan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rspan_t_tpid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_rspan_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RSPAN_T_FID_COUNT] = {
+    bcmpkt_rspan_t_tag_get,
+    bcmpkt_rspan_t_tpid_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_rspan_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RSPAN_T_FID_COUNT] = {
+    bcmpkt_rspan_t_tag_set,
+    bcmpkt_rspan_t_tpid_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_rspan_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_rspan_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_RSPAN_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_29_2_2_rspan_t_field_data,
+};
+
+
+static int32_t bcmpkt_sflow_shim_0_t_sys_destination_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_0_t_sys_destination_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_0_t_sys_source_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_0_t_sys_source_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_0_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_0_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_sflow_shim_0_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = {
+    bcmpkt_sflow_shim_0_t_sys_destination_get,
+    bcmpkt_sflow_shim_0_t_sys_source_get,
+    bcmpkt_sflow_shim_0_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_sflow_shim_0_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = {
+    bcmpkt_sflow_shim_0_t_sys_destination_set,
+    bcmpkt_sflow_shim_0_t_sys_source_set,
+    bcmpkt_sflow_shim_0_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_sflow_shim_0_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_sflow_shim_0_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_29_2_2_sflow_shim_0_t_field_data,
+};
+
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_dest_sample_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 30, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_dest_sample_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 30, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_discarded_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 27, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_discarded_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 27, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_flex_sample_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 29, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_flex_sample_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 29, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_mcast_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_mcast_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_src_sample_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 31, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_src_sample_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 31, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_truncated_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 26, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_truncated_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 26, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 7);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 7, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 23, 3);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 23, 3, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_sflow_shim_1_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = {
+    bcmpkt_sflow_shim_1_t_flag_dest_sample_get,
+    bcmpkt_sflow_shim_1_t_flag_discarded_get,
+    bcmpkt_sflow_shim_1_t_flag_flex_sample_get,
+    bcmpkt_sflow_shim_1_t_flag_mcast_get,
+    bcmpkt_sflow_shim_1_t_flag_src_sample_get,
+    bcmpkt_sflow_shim_1_t_flag_truncated_get,
+    bcmpkt_sflow_shim_1_t_reserved_get,
+    bcmpkt_sflow_shim_1_t_sys_opcode_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_sflow_shim_1_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = {
+    bcmpkt_sflow_shim_1_t_flag_dest_sample_set,
+    bcmpkt_sflow_shim_1_t_flag_discarded_set,
+    bcmpkt_sflow_shim_1_t_flag_flex_sample_set,
+    bcmpkt_sflow_shim_1_t_flag_mcast_set,
+    bcmpkt_sflow_shim_1_t_flag_src_sample_set,
+    bcmpkt_sflow_shim_1_t_flag_truncated_set,
+    bcmpkt_sflow_shim_1_t_reserved_set,
+    bcmpkt_sflow_shim_1_t_sys_opcode_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_sflow_shim_1_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_sflow_shim_1_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_29_2_2_sflow_shim_1_t_field_data,
+};
+
+
+static int32_t bcmpkt_sflow_shim_2_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_2_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_sflow_shim_2_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = {
+    bcmpkt_sflow_shim_2_t_sequence_num_get,
+    bcmpkt_sflow_shim_2_t_user_meta_data_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_sflow_shim_2_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = {
+    bcmpkt_sflow_shim_2_t_sequence_num_set,
+    bcmpkt_sflow_shim_2_t_user_meta_data_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_sflow_shim_2_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_sflow_shim_2_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_29_2_2_sflow_shim_2_t_field_data,
+};
+
+
+static int32_t bcmpkt_snap_llc_t_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_snap_llc_t_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_snap_llc_t_snap_llc_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_snap_llc_t_snap_llc_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_snap_llc_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SNAP_LLC_T_FID_COUNT] = {
+    bcmpkt_snap_llc_t_length_get,
+    bcmpkt_snap_llc_t_snap_llc_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_snap_llc_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SNAP_LLC_T_FID_COUNT] = {
+    bcmpkt_snap_llc_t_length_set,
+    bcmpkt_snap_llc_t_snap_llc_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_snap_llc_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_snap_llc_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_SNAP_LLC_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_29_2_2_snap_llc_t_field_data,
+};
+
+
+static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_first_4bytes_t_src_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_first_4bytes_t_src_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_tcp_first_4bytes_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = {
+    bcmpkt_tcp_first_4bytes_t_dst_port_get,
+    bcmpkt_tcp_first_4bytes_t_src_port_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_tcp_first_4bytes_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = {
+    bcmpkt_tcp_first_4bytes_t_dst_port_set,
+    bcmpkt_tcp_first_4bytes_t_src_port_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_tcp_first_4bytes_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_tcp_first_4bytes_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_29_2_2_tcp_first_4bytes_t_field_data,
+};
+
+
+static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_win_size_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_win_size_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_tcp_last_16bytes_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = {
+    bcmpkt_tcp_last_16bytes_t_ack_num_get,
+    bcmpkt_tcp_last_16bytes_t_checksum_get,
+    bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get,
+    bcmpkt_tcp_last_16bytes_t_seq_num_get,
+    bcmpkt_tcp_last_16bytes_t_urgent_ptr_get,
+    bcmpkt_tcp_last_16bytes_t_win_size_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_tcp_last_16bytes_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = {
+    bcmpkt_tcp_last_16bytes_t_ack_num_set,
+    bcmpkt_tcp_last_16bytes_t_checksum_set,
+    bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set,
+    bcmpkt_tcp_last_16bytes_t_seq_num_set,
+    bcmpkt_tcp_last_16bytes_t_urgent_ptr_set,
+    bcmpkt_tcp_last_16bytes_t_win_size_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_tcp_last_16bytes_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_tcp_last_16bytes_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_29_2_2_tcp_last_16bytes_t_field_data,
+};
+
+
+static int32_t bcmpkt_udp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_dst_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_src_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_src_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_udp_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_udp_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_udp_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UDP_T_FID_COUNT] = {
+    bcmpkt_udp_t_checksum_get,
+    bcmpkt_udp_t_dst_port_get,
+    bcmpkt_udp_t_src_port_get,
+    bcmpkt_udp_t_udp_length_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_udp_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UDP_T_FID_COUNT] = {
+    bcmpkt_udp_t_checksum_set,
+    bcmpkt_udp_t_dst_port_set,
+    bcmpkt_udp_t_src_port_set,
+    bcmpkt_udp_t_udp_length_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_udp_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_udp_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UDP_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_29_2_2_udp_t_field_data,
+};
+
+
+static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_unknown_l3_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = {
+    bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get,
+    bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_unknown_l3_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = {
+    bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set,
+    bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_unknown_l3_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_unknown_l3_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L3_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_29_2_2_unknown_l3_t_field_data,
+};
+
+
+static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_unknown_l4_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = {
+    bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_unknown_l4_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = {
+    bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_unknown_l4_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_unknown_l4_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L4_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_29_2_2_unknown_l4_t_field_data,
+};
+
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_unknown_l5_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = {
+    bcmpkt_unknown_l5_t_l5_bytes_0_1_get,
+    bcmpkt_unknown_l5_t_l5_bytes_2_3_get,
+    bcmpkt_unknown_l5_t_l5_bytes_4_7_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_unknown_l5_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = {
+    bcmpkt_unknown_l5_t_l5_bytes_0_1_set,
+    bcmpkt_unknown_l5_t_l5_bytes_2_3_set,
+    bcmpkt_unknown_l5_t_l5_bytes_4_7_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_unknown_l5_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_unknown_l5_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_UNKNOWN_L5_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_29_2_2_unknown_l5_t_field_data,
+};
+
+
+static int32_t bcmpkt_vlan_t_cfi_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 12, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_cfi_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 12, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_pcp_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 13, 3);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_pcp_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 13, 3, val);
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_tpid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_vid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 12);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_vid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 12, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_vlan_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VLAN_T_FID_COUNT] = {
+    bcmpkt_vlan_t_cfi_get,
+    bcmpkt_vlan_t_pcp_get,
+    bcmpkt_vlan_t_tpid_get,
+    bcmpkt_vlan_t_vid_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_vlan_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VLAN_T_FID_COUNT] = {
+    bcmpkt_vlan_t_cfi_set,
+    bcmpkt_vlan_t_pcp_set,
+    bcmpkt_vlan_t_tpid_set,
+    bcmpkt_vlan_t_vid_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_vlan_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_vlan_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VLAN_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_29_2_2_vlan_t_field_data,
+};
+
+
+static int32_t bcmpkt_vntag_t_tag_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_vntag_t_tag_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_vntag_t_tpid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vntag_t_tpid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_vntag_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VNTAG_T_FID_COUNT] = {
+    bcmpkt_vntag_t_tag_get,
+    bcmpkt_vntag_t_tpid_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_vntag_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VNTAG_T_FID_COUNT] = {
+    bcmpkt_vntag_t_tag_set,
+    bcmpkt_vntag_t_tpid_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_vntag_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VNTAG_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_vntag_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VNTAG_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_29_2_2_vntag_t_field_data,
+};
+
+
+static int32_t bcmpkt_vxlan_t_flags_reserved_1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_vxlan_t_flags_reserved_1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_vxlan_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vxlan_t_reserved2_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_vxlan_t_vn_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 8, 24);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vxlan_t_vn_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 8, 24, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_vxlan_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VXLAN_T_FID_COUNT] = {
+    bcmpkt_vxlan_t_flags_reserved_1_get,
+    bcmpkt_vxlan_t_reserved2_get,
+    bcmpkt_vxlan_t_vn_id_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_vxlan_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VXLAN_T_FID_COUNT] = {
+    bcmpkt_vxlan_t_flags_reserved_1_set,
+    bcmpkt_vxlan_t_reserved2_set,
+    bcmpkt_vxlan_t_vn_id_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_vxlan_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_vxlan_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_VXLAN_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_29_2_2_vxlan_t_field_data,
+};
+
+
+static int32_t bcmpkt_wesp_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_header_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_header_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_spi_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_spi_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_trailer_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_trailer_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_wesp_iv_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_wesp_iv_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_29_2_2_wesp_t_fget[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_WESP_T_FID_COUNT] = {
+    bcmpkt_wesp_t_flags_get,
+    bcmpkt_wesp_t_header_len_get,
+    bcmpkt_wesp_t_next_header_get,
+    bcmpkt_wesp_t_seq_num_get,
+    bcmpkt_wesp_t_spi_get,
+    bcmpkt_wesp_t_trailer_len_get,
+    bcmpkt_wesp_t_wesp_iv_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_29_2_2_wesp_t_fset[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_WESP_T_FID_COUNT] = {
+    bcmpkt_wesp_t_flags_set,
+    bcmpkt_wesp_t_header_len_set,
+    bcmpkt_wesp_t_next_header_set,
+    bcmpkt_wesp_t_seq_num_set,
+    bcmpkt_wesp_t_spi_set,
+    bcmpkt_wesp_t_trailer_len_set,
+    bcmpkt_wesp_t_wesp_iv_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_29_2_2_wesp_t_field_data[] = {
+    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_29_2_2_wesp_t_field_info = {
+    .num_fields = BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_WESP_T_FID_COUNT,
+    .info = bcm56880_a0_hna_6_5_29_2_2_wesp_t_field_data,
+};
+
+static bcmpkt_flex_pmd_info_t bcm56880_a0_hna_6_5_29_2_2_flexhdr_info_list[BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_FLEXHDR_COUNT] = {
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_29_2_2_arp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_arp_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_arp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_29_2_2_authen_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_authen_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_authen_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_29_2_2_bfd_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_bfd_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_bfd_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_29_2_2_cntag_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_cntag_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_cntag_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_29_2_2_cpu_composites_0_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_cpu_composites_0_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_cpu_composites_0_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_29_2_2_cpu_composites_1_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_cpu_composites_1_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_cpu_composites_1_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_29_2_2_dest_option_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_dest_option_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_dest_option_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_29_2_2_erspan3_fixed_hdr_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_erspan3_fixed_hdr_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_erspan3_fixed_hdr_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_29_2_2_erspan3_subhdr_5_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_erspan3_subhdr_5_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_erspan3_subhdr_5_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_29_2_2_esp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_esp_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_esp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_29_2_2_etag_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_etag_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_etag_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_29_2_2_ethertype_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_ethertype_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_ethertype_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_29_2_2_frag_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_frag_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_frag_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_29_2_2_generic_loopback_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_generic_loopback_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_generic_loopback_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_29_2_2_gpe_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_gpe_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_gpe_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_29_2_2_gre_chksum_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_gre_chksum_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_gre_chksum_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_29_2_2_gre_key_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_gre_key_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_gre_key_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_29_2_2_gre_rout_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_gre_rout_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_gre_rout_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_29_2_2_gre_seq_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_gre_seq_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_gre_seq_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_29_2_2_gre_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_gre_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_gre_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_29_2_2_hop_by_hop_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_hop_by_hop_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_hop_by_hop_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_29_2_2_icmp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_icmp_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_icmp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_0_a_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_0_a_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_0_a_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_0_b_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_0_b_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_0_b_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_1_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_1_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_1_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_2_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_2_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_2_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_3_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_3_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_ifa_flex_md_3_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_29_2_2_ifa_header_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_ifa_header_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_ifa_header_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_29_2_2_ifa_md_base_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_ifa_md_base_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_ifa_md_base_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_29_2_2_ifa_metadata_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_ifa_metadata_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_ifa_metadata_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_29_2_2_igmp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_igmp_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_igmp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_29_2_2_ipfix_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_ipfix_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_ipfix_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_29_2_2_ipv4_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_ipv4_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_ipv4_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_29_2_2_ipv6_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_ipv6_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_ipv6_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_29_2_2_l2_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_l2_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_l2_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_29_2_2_mirror_erspan_sn_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_mirror_erspan_sn_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_mirror_erspan_sn_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_29_2_2_mirror_transport_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_mirror_transport_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_mirror_transport_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_29_2_2_mpls_ach_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_mpls_ach_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_mpls_ach_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_29_2_2_mpls_bv_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_mpls_bv_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_mpls_bv_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_29_2_2_mpls_cw_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_mpls_cw_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_mpls_cw_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_29_2_2_mpls_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_mpls_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_mpls_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_29_2_2_p_1588_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_p_1588_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_p_1588_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_29_2_2_prog_ext_hdr_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_prog_ext_hdr_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_prog_ext_hdr_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_29_2_2_psamp_0_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_psamp_0_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_psamp_0_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_29_2_2_psamp_1_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_psamp_1_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_psamp_1_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_29_2_2_psamp_mirror_on_drop_0_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_psamp_mirror_on_drop_0_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_psamp_mirror_on_drop_0_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_29_2_2_psamp_mirror_on_drop_3_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_psamp_mirror_on_drop_3_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_psamp_mirror_on_drop_3_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_29_2_2_rarp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_rarp_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_rarp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_29_2_2_routing_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_routing_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_routing_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_29_2_2_rspan_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_rspan_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_rspan_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_29_2_2_sflow_shim_0_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_sflow_shim_0_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_sflow_shim_0_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_29_2_2_sflow_shim_1_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_sflow_shim_1_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_sflow_shim_1_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_29_2_2_sflow_shim_2_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_sflow_shim_2_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_sflow_shim_2_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_29_2_2_snap_llc_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_snap_llc_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_snap_llc_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_29_2_2_tcp_first_4bytes_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_tcp_first_4bytes_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_tcp_first_4bytes_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_29_2_2_tcp_last_16bytes_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_tcp_last_16bytes_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_tcp_last_16bytes_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_29_2_2_udp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_udp_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_udp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_29_2_2_unknown_l3_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_unknown_l3_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_unknown_l3_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_29_2_2_unknown_l4_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_unknown_l4_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_unknown_l4_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_29_2_2_unknown_l5_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_unknown_l5_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_unknown_l5_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_29_2_2_vlan_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_vlan_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_vlan_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_29_2_2_vntag_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_vntag_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_vntag_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_29_2_2_vxlan_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_vxlan_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_vxlan_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_29_2_2_wesp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_hna_6_5_29_2_2_wesp_t_fget,
+        .flex_fset = bcm56880_a0_hna_6_5_29_2_2_wesp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_hna_6_5_29_2_2_rxpmd_flex_field_info,
+        .reasons_info = &bcm56880_a0_hna_6_5_29_2_2_rxpmd_flex_reasons_info,
+        .flex_common_fget = bcm56880_a0_rxpmd_flex_fget,
+        .flex_common_fset = bcm56880_a0_rxpmd_flex_fset,
+    },
+};
+
+static shr_enum_map_t bcm56880_a0_hna_6_5_29_2_2_flexhdr_id_map[] = {
+    BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_FLEXHDR_NAME_MAP_INIT
+};
+
+shr_enum_map_t * bcm56880_a0_hna_6_5_29_2_2_flexhdr_map_get(void)
+{
+    return bcm56880_a0_hna_6_5_29_2_2_flexhdr_id_map;
+}
+
+bcmpkt_flex_pmd_info_t * bcm56880_a0_hna_6_5_29_2_2_flex_pmd_info_get(uint32_t hid)
+{
+    if (hid >= BCM56880_A0_HNA_6_5_29_2_2_BCMPKT_FLEXHDR_COUNT) {
+        return NULL;
+    }
+
+    return &bcm56880_a0_hna_6_5_29_2_2_flexhdr_info_list[hid];
+}
+
+int bcm56880_a0_hna_6_5_29_2_2_flexhdr_variant_support_map[BCMPKT_PMD_COUNT] = {
+    13,
+    -1,
+    -1,
+    64,
+};
\ No newline at end of file
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_bcmpkt_rxpmd_match_id.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_bcmpkt_rxpmd_match_id.c
new file mode 100644
index 000000000..b09767c28
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_bcmpkt_rxpmd_match_id.c
@@ -0,0 +1,2550 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) bcm56880_a0_nfa_2_1_7_0_sf_match_id_info.yml
+ * for device bcm56880_a0 and variant nfa_2_1_7_0.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+
+#include <bcmpkt/bcmpkt_rxpmd_match_id.h>
+#include <bcmpkt/xfcr/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_bcmpkt_rxpmd_match_id_defs.h>
+
+
+static bcmpkt_rxpmd_match_id_db_t
+bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db[BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_COUNT] = {
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_ETAG",
+        .match        = 0x80,
+        .match_mask   = 0xc0,
+        .match_maxbit = 30,
+        .match_minbit = 23,
+        .maxbit       = 7,
+        .minbit       = 6,
+        .value        = 0x2,
+        .pmaxbit      = 42,
+        .pminbit      = 35,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_ITAG",
+        .match        = 0x10,
+        .match_mask   = 0x10,
+        .match_maxbit = 30,
+        .match_minbit = 23,
+        .maxbit       = 4,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 42,
+        .pminbit      = 35,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_L2",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 30,
+        .match_minbit = 23,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 42,
+        .pminbit      = 35,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0xff,
+        .match_maxbit = 30,
+        .match_minbit = 23,
+        .maxbit       = 7,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 42,
+        .pminbit      = 35,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OPAQUETAG */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_OPAQUETAG",
+        .match        = 0x20,
+        .match_mask   = 0x20,
+        .match_maxbit = 30,
+        .match_minbit = 23,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 42,
+        .pminbit      = 35,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_OTAG",
+        .match        = 0x8,
+        .match_mask   = 0x8,
+        .match_maxbit = 30,
+        .match_minbit = 23,
+        .maxbit       = 3,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 42,
+        .pminbit      = 35,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_RSPAN */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_RSPAN",
+        .match        = 0x4,
+        .match_mask   = 0x4,
+        .match_maxbit = 30,
+        .match_minbit = 23,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 42,
+        .pminbit      = 35,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC",
+        .match        = 0x2,
+        .match_mask   = 0x2,
+        .match_maxbit = 30,
+        .match_minbit = 23,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 42,
+        .pminbit      = 35,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_VNTAG",
+        .match        = 0x40,
+        .match_mask   = 0xc0,
+        .match_maxbit = 30,
+        .match_minbit = 23,
+        .maxbit       = 7,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 42,
+        .pminbit      = 35,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ARP",
+        .match        = 0x2,
+        .match_mask   = 0x4e,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1",
+        .match        = 0x180,
+        .match_mask   = 0x1c0,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x3,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2",
+        .match        = 0x430,
+        .match_mask   = 0x670,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x2,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_BFD",
+        .match        = 0x1800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x3,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT",
+        .match        = 0x200,
+        .match_mask   = 0x648,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1",
+        .match        = 0xb0,
+        .match_mask   = 0x1f0,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2",
+        .match        = 0x600,
+        .match_mask   = 0x640,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x3,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GPE",
+        .match        = 0x1006,
+        .match_mask   = 0x3846,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x2,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE",
+        .match        = 0x8,
+        .match_mask   = 0x48,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 3,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM",
+        .match        = 0x208,
+        .match_mask   = 0x648,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY",
+        .match        = 0x808,
+        .match_mask   = 0x3848,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT",
+        .match        = 0x100,
+        .match_mask   = 0x1c0,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x2,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ",
+        .match        = 0xa,
+        .match_mask   = 0x4e,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_12BYTE */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GTP_12BYTE",
+        .match        = 0x3000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x6,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_8BYTE */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GTP_8BYTE",
+        .match        = 0x2800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x5,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ICMP",
+        .match        = 0x800,
+        .match_mask   = 0x380e,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IGMP",
+        .match        = 0x420,
+        .match_mask   = 0x670,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x2,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IPV4",
+        .match        = 0x20,
+        .match_mask   = 0x70,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x2,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IPV6",
+        .match        = 0x30,
+        .match_mask   = 0x70,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x3,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS0",
+        .match        = 0x40,
+        .match_mask   = 0x40,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 6,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS1",
+        .match        = 0x42,
+        .match_mask   = 0x42,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS2",
+        .match        = 0x44,
+        .match_mask   = 0x44,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS3",
+        .match        = 0x48,
+        .match_mask   = 0x48,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 3,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS4",
+        .match        = 0x50,
+        .match_mask   = 0x50,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 4,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS5",
+        .match        = 0x60,
+        .match_mask   = 0x60,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS6",
+        .match        = 0xc0,
+        .match_mask   = 0xc0,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 7,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH",
+        .match        = 0x140,
+        .match_mask   = 0x140,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 8,
+        .minbit       = 8,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW",
+        .match        = 0x240,
+        .match_mask   = 0x240,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 9,
+        .minbit       = 9,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x3fff,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 13,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_P_1588",
+        .match        = 0x2000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x4,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_RARP",
+        .match        = 0x10,
+        .match_mask   = 0x70,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES",
+        .match        = 0x4,
+        .match_mask   = 0x46,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x2,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES",
+        .match        = 0x804,
+        .match_mask   = 0x3846,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UDP",
+        .match        = 0x6,
+        .match_mask   = 0x46,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x3,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3",
+        .match        = 0x80,
+        .match_mask   = 0x1f0,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4",
+        .match        = 0x1000,
+        .match_mask   = 0x3806,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x2,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5",
+        .match        = 0x3800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x7,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_VXLAN",
+        .match        = 0x806,
+        .match_mask   = 0x3846,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 62,
+        .pminbit      = 49,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK */
+        .name         = "EGRESS_PKT_SYS_HDR_LOOPBACK",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 0,
+        .match_minbit = 0,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 0,
+        .pminbit      = 0,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE */
+        .name         = "EGRESS_PKT_SYS_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x1,
+        .match_maxbit = 0,
+        .match_minbit = 0,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 0,
+        .pminbit      = 0,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_ETAG",
+        .match        = 0x80,
+        .match_mask   = 0xc0,
+        .match_maxbit = 8,
+        .match_minbit = 1,
+        .maxbit       = 7,
+        .minbit       = 6,
+        .value        = 0x2,
+        .pmaxbit      = 14,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_ITAG",
+        .match        = 0x10,
+        .match_mask   = 0x10,
+        .match_maxbit = 8,
+        .match_minbit = 1,
+        .maxbit       = 4,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 14,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_L2",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 8,
+        .match_minbit = 1,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 14,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0xff,
+        .match_maxbit = 8,
+        .match_minbit = 1,
+        .maxbit       = 7,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 14,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OPAQUETAG */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_OPAQUETAG",
+        .match        = 0x20,
+        .match_mask   = 0x20,
+        .match_maxbit = 8,
+        .match_minbit = 1,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 14,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_OTAG",
+        .match        = 0x8,
+        .match_mask   = 0x8,
+        .match_maxbit = 8,
+        .match_minbit = 1,
+        .maxbit       = 3,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 14,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_RSPAN */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_RSPAN",
+        .match        = 0x4,
+        .match_mask   = 0x4,
+        .match_maxbit = 8,
+        .match_minbit = 1,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 14,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC",
+        .match        = 0x2,
+        .match_mask   = 0x2,
+        .match_maxbit = 8,
+        .match_minbit = 1,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 14,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_VNTAG",
+        .match        = 0x40,
+        .match_mask   = 0xc0,
+        .match_maxbit = 8,
+        .match_minbit = 1,
+        .maxbit       = 7,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 14,
+        .pminbit      = 7,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP",
+        .match        = 0x2,
+        .match_mask   = 0x4e,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1",
+        .match        = 0x180,
+        .match_mask   = 0x1c0,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x3,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2",
+        .match        = 0x430,
+        .match_mask   = 0x670,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x2,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD",
+        .match        = 0x1800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x3,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT",
+        .match        = 0x200,
+        .match_mask   = 0x648,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1",
+        .match        = 0xb0,
+        .match_mask   = 0x1f0,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2",
+        .match        = 0x600,
+        .match_mask   = 0x640,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x3,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE",
+        .match        = 0x1006,
+        .match_mask   = 0x3846,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x2,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE",
+        .match        = 0x8,
+        .match_mask   = 0x48,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 3,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM",
+        .match        = 0x208,
+        .match_mask   = 0x648,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY",
+        .match        = 0x808,
+        .match_mask   = 0x3848,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT",
+        .match        = 0x100,
+        .match_mask   = 0x1c0,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x2,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ",
+        .match        = 0xa,
+        .match_mask   = 0x4e,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_12BYTE */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_12BYTE",
+        .match        = 0x3000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x6,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_8BYTE */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_8BYTE",
+        .match        = 0x2800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x5,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP",
+        .match        = 0x800,
+        .match_mask   = 0x380e,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP",
+        .match        = 0x420,
+        .match_mask   = 0x670,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x2,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4",
+        .match        = 0x20,
+        .match_mask   = 0x70,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x2,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6",
+        .match        = 0x30,
+        .match_mask   = 0x70,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x3,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0",
+        .match        = 0x40,
+        .match_mask   = 0x40,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 6,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1",
+        .match        = 0x42,
+        .match_mask   = 0x42,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2",
+        .match        = 0x44,
+        .match_mask   = 0x44,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3",
+        .match        = 0x48,
+        .match_mask   = 0x48,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 3,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4",
+        .match        = 0x50,
+        .match_mask   = 0x50,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 4,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5",
+        .match        = 0x60,
+        .match_mask   = 0x60,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6",
+        .match        = 0xc0,
+        .match_mask   = 0xc0,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 7,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH",
+        .match        = 0x140,
+        .match_mask   = 0x140,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 8,
+        .minbit       = 8,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW",
+        .match        = 0x240,
+        .match_mask   = 0x240,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 9,
+        .minbit       = 9,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x3fff,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588",
+        .match        = 0x2000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x4,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP",
+        .match        = 0x10,
+        .match_mask   = 0x70,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES",
+        .match        = 0x4,
+        .match_mask   = 0x46,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x2,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES",
+        .match        = 0x804,
+        .match_mask   = 0x3846,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP",
+        .match        = 0x6,
+        .match_mask   = 0x46,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x3,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3",
+        .match        = 0x80,
+        .match_mask   = 0x1f0,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4",
+        .match        = 0x1000,
+        .match_mask   = 0x3806,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x2,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5",
+        .match        = 0x3800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x7,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN",
+        .match        = 0x806,
+        .match_mask   = 0x3846,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 34,
+        .pminbit      = 21,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_ETAG",
+        .match        = 0x80,
+        .match_mask   = 0xc0,
+        .match_maxbit = 30,
+        .match_minbit = 23,
+        .maxbit       = 7,
+        .minbit       = 6,
+        .value        = 0x2,
+        .pmaxbit      = 30,
+        .pminbit      = 23,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_ITAG",
+        .match        = 0x10,
+        .match_mask   = 0x10,
+        .match_maxbit = 30,
+        .match_minbit = 23,
+        .maxbit       = 4,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 30,
+        .pminbit      = 23,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_L2",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 30,
+        .match_minbit = 23,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 30,
+        .pminbit      = 23,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0xff,
+        .match_maxbit = 30,
+        .match_minbit = 23,
+        .maxbit       = 7,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 30,
+        .pminbit      = 23,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OPAQUETAG */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_OPAQUETAG",
+        .match        = 0x20,
+        .match_mask   = 0x20,
+        .match_maxbit = 30,
+        .match_minbit = 23,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 30,
+        .pminbit      = 23,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_OTAG",
+        .match        = 0x8,
+        .match_mask   = 0x8,
+        .match_maxbit = 30,
+        .match_minbit = 23,
+        .maxbit       = 3,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 30,
+        .pminbit      = 23,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_RSPAN */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_RSPAN",
+        .match        = 0x4,
+        .match_mask   = 0x4,
+        .match_maxbit = 30,
+        .match_minbit = 23,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 30,
+        .pminbit      = 23,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC",
+        .match        = 0x2,
+        .match_mask   = 0x2,
+        .match_maxbit = 30,
+        .match_minbit = 23,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 30,
+        .pminbit      = 23,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_VNTAG",
+        .match        = 0x40,
+        .match_mask   = 0xc0,
+        .match_maxbit = 30,
+        .match_minbit = 23,
+        .maxbit       = 7,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 30,
+        .pminbit      = 23,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ARP",
+        .match        = 0x2,
+        .match_mask   = 0x4e,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 44,
+        .pminbit      = 31,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1",
+        .match        = 0x180,
+        .match_mask   = 0x1c0,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x3,
+        .pmaxbit      = 44,
+        .pminbit      = 31,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2",
+        .match        = 0x430,
+        .match_mask   = 0x670,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x2,
+        .pmaxbit      = 44,
+        .pminbit      = 31,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_BFD",
+        .match        = 0x1800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x3,
+        .pmaxbit      = 44,
+        .pminbit      = 31,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT",
+        .match        = 0x200,
+        .match_mask   = 0x648,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x1,
+        .pmaxbit      = 44,
+        .pminbit      = 31,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 44,
+        .pminbit      = 31,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1",
+        .match        = 0xb0,
+        .match_mask   = 0x1f0,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 44,
+        .pminbit      = 31,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2",
+        .match        = 0x600,
+        .match_mask   = 0x640,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x3,
+        .pmaxbit      = 44,
+        .pminbit      = 31,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ICMP",
+        .match        = 0x800,
+        .match_mask   = 0x380e,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 44,
+        .pminbit      = 31,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IGMP",
+        .match        = 0x420,
+        .match_mask   = 0x670,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x2,
+        .pmaxbit      = 44,
+        .pminbit      = 31,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IPV4",
+        .match        = 0x20,
+        .match_mask   = 0x70,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x2,
+        .pmaxbit      = 44,
+        .pminbit      = 31,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IPV6",
+        .match        = 0x30,
+        .match_mask   = 0x70,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x3,
+        .pmaxbit      = 44,
+        .pminbit      = 31,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x3fff,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 13,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 44,
+        .pminbit      = 31,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_P_1588",
+        .match        = 0x2000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x4,
+        .pmaxbit      = 44,
+        .pminbit      = 31,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_RARP",
+        .match        = 0x10,
+        .match_mask   = 0x70,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 44,
+        .pminbit      = 31,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES",
+        .match        = 0x4,
+        .match_mask   = 0x46,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x2,
+        .pmaxbit      = 44,
+        .pminbit      = 31,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES",
+        .match        = 0x804,
+        .match_mask   = 0x3846,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 44,
+        .pminbit      = 31,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UDP",
+        .match        = 0x6,
+        .match_mask   = 0x46,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x3,
+        .pmaxbit      = 44,
+        .pminbit      = 31,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3",
+        .match        = 0x80,
+        .match_mask   = 0x1f0,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 44,
+        .pminbit      = 31,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4",
+        .match        = 0x1000,
+        .match_mask   = 0x3806,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x2,
+        .pmaxbit      = 44,
+        .pminbit      = 31,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5",
+        .match        = 0x3800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 44,
+        .match_minbit = 31,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x7,
+        .pmaxbit      = 44,
+        .pminbit      = 31,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_ETAG",
+        .match        = 0x80,
+        .match_mask   = 0xc0,
+        .match_maxbit = 8,
+        .match_minbit = 1,
+        .maxbit       = 7,
+        .minbit       = 6,
+        .value        = 0x2,
+        .pmaxbit      = 8,
+        .pminbit      = 1,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_ITAG",
+        .match        = 0x10,
+        .match_mask   = 0x10,
+        .match_maxbit = 8,
+        .match_minbit = 1,
+        .maxbit       = 4,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 8,
+        .pminbit      = 1,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_L2",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 8,
+        .match_minbit = 1,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 8,
+        .pminbit      = 1,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0xff,
+        .match_maxbit = 8,
+        .match_minbit = 1,
+        .maxbit       = 7,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 8,
+        .pminbit      = 1,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OPAQUETAG */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_OPAQUETAG",
+        .match        = 0x20,
+        .match_mask   = 0x20,
+        .match_maxbit = 8,
+        .match_minbit = 1,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 8,
+        .pminbit      = 1,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_OTAG",
+        .match        = 0x8,
+        .match_mask   = 0x8,
+        .match_maxbit = 8,
+        .match_minbit = 1,
+        .maxbit       = 3,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 8,
+        .pminbit      = 1,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_RSPAN */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_RSPAN",
+        .match        = 0x4,
+        .match_mask   = 0x4,
+        .match_maxbit = 8,
+        .match_minbit = 1,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 8,
+        .pminbit      = 1,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC",
+        .match        = 0x2,
+        .match_mask   = 0x2,
+        .match_maxbit = 8,
+        .match_minbit = 1,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 8,
+        .pminbit      = 1,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_VNTAG",
+        .match        = 0x40,
+        .match_mask   = 0xc0,
+        .match_maxbit = 8,
+        .match_minbit = 1,
+        .maxbit       = 7,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 8,
+        .pminbit      = 1,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ARP",
+        .match        = 0x2,
+        .match_mask   = 0x4e,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1",
+        .match        = 0x180,
+        .match_mask   = 0x1c0,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x3,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2",
+        .match        = 0x430,
+        .match_mask   = 0x670,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x2,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_BFD",
+        .match        = 0x1800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x3,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT",
+        .match        = 0x200,
+        .match_mask   = 0x648,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1",
+        .match        = 0xb0,
+        .match_mask   = 0x1f0,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2",
+        .match        = 0x600,
+        .match_mask   = 0x640,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x3,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GPE",
+        .match        = 0x1006,
+        .match_mask   = 0x3846,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x2,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE",
+        .match        = 0x8,
+        .match_mask   = 0x48,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 3,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM",
+        .match        = 0x208,
+        .match_mask   = 0x648,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY",
+        .match        = 0x808,
+        .match_mask   = 0x3848,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT",
+        .match        = 0x100,
+        .match_mask   = 0x1c0,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x2,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ",
+        .match        = 0xa,
+        .match_mask   = 0x4e,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_12BYTE */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GTP_12BYTE",
+        .match        = 0x3000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x6,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_8BYTE */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GTP_8BYTE",
+        .match        = 0x2800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x5,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ICMP",
+        .match        = 0x800,
+        .match_mask   = 0x380e,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IGMP",
+        .match        = 0x420,
+        .match_mask   = 0x670,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 10,
+        .minbit       = 9,
+        .value        = 0x2,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV4",
+        .match        = 0x20,
+        .match_mask   = 0x70,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x2,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV6",
+        .match        = 0x30,
+        .match_mask   = 0x70,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x3,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0",
+        .match        = 0x40,
+        .match_mask   = 0x40,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 6,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1",
+        .match        = 0x42,
+        .match_mask   = 0x42,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2",
+        .match        = 0x44,
+        .match_mask   = 0x44,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3",
+        .match        = 0x48,
+        .match_mask   = 0x48,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 3,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4",
+        .match        = 0x50,
+        .match_mask   = 0x50,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 4,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5",
+        .match        = 0x60,
+        .match_mask   = 0x60,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6",
+        .match        = 0xc0,
+        .match_mask   = 0xc0,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 7,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH",
+        .match        = 0x140,
+        .match_mask   = 0x140,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 8,
+        .minbit       = 8,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW",
+        .match        = 0x240,
+        .match_mask   = 0x240,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 9,
+        .minbit       = 9,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x3fff,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_P_1588",
+        .match        = 0x2000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x4,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_RARP",
+        .match        = 0x10,
+        .match_mask   = 0x70,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 5,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES",
+        .match        = 0x4,
+        .match_mask   = 0x46,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x2,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES",
+        .match        = 0x804,
+        .match_mask   = 0x3846,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UDP",
+        .match        = 0x6,
+        .match_mask   = 0x46,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x3,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3",
+        .match        = 0x80,
+        .match_mask   = 0x1f0,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4",
+        .match        = 0x1000,
+        .match_mask   = 0x3806,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x2,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5",
+        .match        = 0x3800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x7,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN",
+        .match        = 0x806,
+        .match_mask   = 0x3846,
+        .match_maxbit = 22,
+        .match_minbit = 9,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 22,
+        .pminbit      = 9,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK */
+        .name         = "INGRESS_PKT_SYS_HDR_LOOPBACK",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 0,
+        .match_minbit = 0,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 0,
+        .pminbit      = 0,
+
+    },
+    {
+        /* BCM56880_A0_NFA_2_1_7_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE */
+        .name         = "INGRESS_PKT_SYS_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x1,
+        .match_maxbit = 0,
+        .match_minbit = 0,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 0,
+        .pminbit      = 0,
+
+    },
+};
+
+static bcmpkt_rxpmd_match_id_db_info_t bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db_info = {
+    .num_entries = 178,
+    .db = bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db
+};
+bcmpkt_rxpmd_match_id_db_info_t * bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db_info_get(void) {
+    return &bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_db_info;
+}
+
+static shr_enum_map_t bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_map[] = {
+    BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_rxpmd_match_id_map_info_t bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_map_info = {
+    .num_entries = 178,
+    .map = bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_map
+};
+
+bcmpkt_rxpmd_match_id_map_info_t * bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_map_info_get(void) {
+    return &bcm56880_a0_nfa_2_1_7_0_rxpmd_match_id_map_info;
+}
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_pkt_flexhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_pkt_flexhdr.c
new file mode 100644
index 000000000..e027162fd
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_pkt_flexhdr.c
@@ -0,0 +1,6947 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) map.yml
+ * for device bcm56880_a0 and variant nfa_2_1_7_0.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#include <sal/sal_types.h>
+#include <shr/shr_error.h>
+#include <bcmpkt/bcmpkt_flexhdr.h>
+#include <bcmpkt/chip/bcm56880_a0/bcmpkt_bcm56880_a0_rxpmd.h>
+#include <bcmpkt/xfcr/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_bcmpkt_flexhdr.h>
+#include <bcmpkt/xfcr/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_bcmpkt_flexhdr_data.h>
+#include <bcmpkt/xfcr/bcm56880_a0/nfa_2_1_7_0/bcm56880_a0_nfa_2_1_7_0_bcmpkt_rxpmd_flex_data.h>
+
+#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1)
+#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l))
+#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s)))
+#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s)))
+
+static void bcm56880_a0_nfa_2_1_7_0_rxpmd_flex_reason_decode(uint32_t *data, bcmpkt_bitmap_t *reasons)
+{
+    uint32_t *reason = data + 0;
+
+    if (reason[12] & (0x1 << 0)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU);
+    }
+    if (reason[12] & (0x1 << 1)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS);
+    }
+    if (reason[12] & (0x1 << 2)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE);
+    }
+    if (reason[12] & (0x1 << 3)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD);
+    }
+    if (reason[12] & (0x1 << 4)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST);
+    }
+    if (reason[12] & (0x1 << 5)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED);
+    }
+    if (reason[12] & (0x1 << 6)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT);
+    }
+    if (reason[12] & (0x1 << 7)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED);
+    }
+    if (reason[12] & (0x1 << 8)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED);
+    }
+    if (reason[12] & (0x1 << 9)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS);
+    }
+    if (reason[12] & (0x1 << 10)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP);
+    }
+    if (reason[12] & (0x1 << 11)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS);
+    }
+    if (reason[12] & (0x1 << 12)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP);
+    }
+    if (reason[12] & (0x1 << 13)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR);
+    }
+    if (reason[12] & (0x1 << 14)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR);
+    }
+    if (reason[12] & (0x1 << 15)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED);
+    }
+    if (reason[12] & (0x1 << 16)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL);
+    }
+    if (reason[12] & (0x1 << 17)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_VFP);
+    }
+    if (reason[12] & (0x1 << 18)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_IFP);
+    }
+    if (reason[12] & (0x1 << 19)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER);
+    }
+    if (reason[12] & (0x1 << 20)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP);
+    }
+    if (reason[12] & (0x1 << 21)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_SVP);
+    }
+    if (reason[12] & (0x1 << 22)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT);
+    }
+    if (reason[12] & (0x1 << 23)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT);
+    }
+    if (reason[12] & (0x1 << 24)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED);
+    }
+    if (reason[12] & (0x1 << 25)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED);
+    }
+    if (reason[12] & (0x1 << 26)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP);
+    }
+    if (reason[12] & (0x1 << 27)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED);
+    }
+    if (reason[12] & (0x1 << 28)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF);
+    }
+    if (reason[12] & (0x1 << 29)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED);
+    }
+    if (reason[12] & (0x1 << 30)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED);
+    }
+    if (reason[12] & (0x1 << 31)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU);
+    }
+    if (reason[11] & (0x1 << 0)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0);
+    }
+    if (reason[11] & (0x1 << 1)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1);
+    }
+    if (reason[11] & (0x1 << 2)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2);
+    }
+    if (reason[11] & (0x1 << 3)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3);
+    }
+    if (reason[11] & (0x1 << 4)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4);
+    }
+    if (reason[11] & (0x1 << 5)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5);
+    }
+    if (reason[11] & (0x1 << 6)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6);
+    }
+    if (reason[11] & (0x1 << 7)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7);
+    }
+    if (reason[11] & (0x1 << 8)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_PE_VID_FWD_MISS);
+    }
+    if (reason[11] & (0x1 << 9)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_PE_VID_RPF_MISS);
+    }
+    if (reason[11] & (0x1 << 10)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_PE_RPF);
+    }
+    if (reason[11] & (0x1 << 11)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_PKT_ETAG_UNEXPECTED);
+    }
+    if (reason[11] & (0x1 << 12)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_PKT_ETAG_EXPECTED);
+    }
+    if (reason[11] & (0x1 << 15)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP);
+    }
+}
+
+static void bcm56880_a0_nfa_2_1_7_0_rxpmd_flex_reason_encode(bcmpkt_bitmap_t *reasons, uint32_t *data)
+{
+    uint32_t *reason = data + 0;
+
+    reason[12] = 0;
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU)) {
+        reason[12] |= (0x1 << 0);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS)) {
+        reason[12] |= (0x1 << 1);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE)) {
+        reason[12] |= (0x1 << 2);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD)) {
+        reason[12] |= (0x1 << 3);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST)) {
+        reason[12] |= (0x1 << 4);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED)) {
+        reason[12] |= (0x1 << 5);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT)) {
+        reason[12] |= (0x1 << 6);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED)) {
+        reason[12] |= (0x1 << 7);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED)) {
+        reason[12] |= (0x1 << 8);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS)) {
+        reason[12] |= (0x1 << 9);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP)) {
+        reason[12] |= (0x1 << 10);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS)) {
+        reason[12] |= (0x1 << 11);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP)) {
+        reason[12] |= (0x1 << 12);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR)) {
+        reason[12] |= (0x1 << 13);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR)) {
+        reason[12] |= (0x1 << 14);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED)) {
+        reason[12] |= (0x1 << 15);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL)) {
+        reason[12] |= (0x1 << 16);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_VFP)) {
+        reason[12] |= (0x1 << 17);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_IFP)) {
+        reason[12] |= (0x1 << 18);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER)) {
+        reason[12] |= (0x1 << 19);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP)) {
+        reason[12] |= (0x1 << 20);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_SVP)) {
+        reason[12] |= (0x1 << 21);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT)) {
+        reason[12] |= (0x1 << 22);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT)) {
+        reason[12] |= (0x1 << 23);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED)) {
+        reason[12] |= (0x1 << 24);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED)) {
+        reason[12] |= (0x1 << 25);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP)) {
+        reason[12] |= (0x1 << 26);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED)) {
+        reason[12] |= (0x1 << 27);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF)) {
+        reason[12] |= (0x1 << 28);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED)) {
+        reason[12] |= (0x1 << 29);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED)) {
+        reason[12] |= (0x1 << 30);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU)) {
+        reason[12] |= (0x1 << 31);
+    }
+    reason[11] = 0;
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0)) {
+        reason[11] |= (0x1 << 0);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1)) {
+        reason[11] |= (0x1 << 1);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2)) {
+        reason[11] |= (0x1 << 2);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3)) {
+        reason[11] |= (0x1 << 3);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4)) {
+        reason[11] |= (0x1 << 4);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5)) {
+        reason[11] |= (0x1 << 5);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6)) {
+        reason[11] |= (0x1 << 6);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7)) {
+        reason[11] |= (0x1 << 7);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_PE_VID_FWD_MISS)) {
+        reason[11] |= (0x1 << 8);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_PE_VID_RPF_MISS)) {
+        reason[11] |= (0x1 << 9);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_PE_RPF)) {
+        reason[11] |= (0x1 << 10);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_PKT_ETAG_UNEXPECTED)) {
+        reason[11] |= (0x1 << 11);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_PKT_ETAG_EXPECTED)) {
+        reason[11] |= (0x1 << 12);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP)) {
+        reason[11] |= (0x1 << 15);
+    }
+}
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_rxpmd_flex_field_data[] = {
+    {
+        .name = "DLB_ECMP_DESTINATION_15_0",
+        .fid = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 160, 175 }, /* Profile 2. */
+            { 144, 159 }, /* Profile 3. */
+        },
+        .profile_cnt = 4,
+    },
+    {
+        .name = "DROP_CODE_15_0",
+        .fid = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 48, 63 }, /* Profile 2. */
+            { 48, 63 }, /* Profile 3. */
+            { 48, 63 }, /* Profile 4. */
+            { 48, 63 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "DVP_15_0",
+        .fid = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_DVP_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 256, 271 }, /* Profile 2. */
+            { 256, 271 }, /* Profile 3. */
+            { 256, 271 }, /* Profile 4. */
+            { 256, 271 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "EFFECTIVE_TTL_7_0",
+        .fid = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 176, 183 }, /* Profile 2. */
+            { 160, 167 }, /* Profile 3. */
+            { 176, 183 }, /* Profile 4. */
+            { 160, 167 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "ENTROPY_LABEL_LOW_15_0",
+        .fid = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 320, 335 }, /* Profile 2. */
+            { 320, 335 }, /* Profile 3. */
+            { 320, 335 }, /* Profile 4. */
+            { 320, 335 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "EVENT_TRACE_VECTOR_31_0",
+        .fid = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 0, 31 }, /* Profile 2. */
+            { 0, 31 }, /* Profile 3. */
+            { 0, 31 }, /* Profile 4. */
+            { 0, 31 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "EVENT_TRACE_VECTOR_47_32",
+        .fid = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 32, 47 }, /* Profile 2. */
+            { 32, 47 }, /* Profile 3. */
+            { 32, 47 }, /* Profile 4. */
+            { 32, 47 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "I2E_CLASS_ID_15_0",
+        .fid = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 304, 319 }, /* Profile 2. */
+            { 304, 319 }, /* Profile 3. */
+            { 304, 319 }, /* Profile 4. */
+            { 304, 319 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "IFP_TS_CONTROL_ACTION_3_0",
+        .fid = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 376, 379 }, /* Profile 2. */
+            { 376, 379 }, /* Profile 3. */
+            { 376, 379 }, /* Profile 4. */
+            { 376, 379 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "ING_ETAG_ACTION_3_0",
+        .fid = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_ING_ETAG_ACTION_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 380, 383 }, /* Profile 2. */
+            { 380, 383 }, /* Profile 3. */
+            { 380, 383 }, /* Profile 4. */
+            { 380, 383 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "ING_ETAG_PCP_DEI_3_0",
+        .fid = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_ING_ETAG_PCP_DEI_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 368, 371 }, /* Profile 2. */
+            { 368, 371 }, /* Profile 3. */
+            { 368, 371 }, /* Profile 4. */
+            { 368, 371 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "ING_ETAG_VID_16_15_0",
+        .fid = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_ING_ETAG_VID_16_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { -1, -1 }, /* Profile 2. */
+            { -1, -1 }, /* Profile 3. */
+            { 160, 175 }, /* Profile 4. */
+            { 144, 159 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "ING_TIMESTAMP_31_0",
+        .fid = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 64, 95 }, /* Profile 2. */
+            { 64, 95 }, /* Profile 3. */
+            { 64, 95 }, /* Profile 4. */
+            { 64, 95 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "INGRESS_PP_PORT_7_0",
+        .fid = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 272, 279 }, /* Profile 2. */
+            { 272, 279 }, /* Profile 3. */
+            { 272, 279 }, /* Profile 4. */
+            { 272, 279 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0",
+        .fid = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 112, 127 }, /* Profile 2. */
+            { 112, 127 }, /* Profile 3. */
+            { 112, 127 }, /* Profile 4. */
+            { 112, 127 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "INGRESS_QOS_REMARK_CTRL_3_0",
+        .fid = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 396, 399 }, /* Profile 2. */
+            { 396, 399 }, /* Profile 3. */
+            { 396, 399 }, /* Profile 4. */
+            { 396, 399 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "INT_PRI_3_0",
+        .fid = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 392, 395 }, /* Profile 2. */
+            { 392, 395 }, /* Profile 3. */
+            { 392, 395 }, /* Profile 4. */
+            { 392, 395 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "L2_IIF_10_0",
+        .fid = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_L2_IIF_10_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 144, 154 }, /* Profile 2. */
+            { -1, -1 }, /* Profile 3. */
+            { 144, 154 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "L2_OIF_10_0",
+        .fid = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_L2_OIF_10_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { -1, -1 }, /* Profile 2. */
+            { 224, 234 }, /* Profile 3. */
+            { -1, -1 }, /* Profile 4. */
+            { 224, 234 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "L3_IIF_13_0",
+        .fid = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 352, 365 }, /* Profile 2. */
+            { 352, 365 }, /* Profile 3. */
+            { 352, 365 }, /* Profile 4. */
+            { 352, 365 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "L3_OIF_1_13_0",
+        .fid = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 240, 253 }, /* Profile 2. */
+            { 240, 253 }, /* Profile 3. */
+            { 240, 253 }, /* Profile 4. */
+            { 240, 253 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "MPLS_LABEL_DECAP_COUNT_3_0",
+        .fid = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_MPLS_LABEL_DECAP_COUNT_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 412, 415 }, /* Profile 2. */
+            { 412, 415 }, /* Profile 3. */
+            { 412, 415 }, /* Profile 4. */
+            { 412, 415 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0",
+        .fid = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 336, 351 }, /* Profile 2. */
+            { 336, 351 }, /* Profile 3. */
+            { 336, 351 }, /* Profile 4. */
+            { 336, 351 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "NHOP_INDEX_1_15_0",
+        .fid = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 192, 207 }, /* Profile 2. */
+            { 176, 191 }, /* Profile 3. */
+            { 192, 207 }, /* Profile 4. */
+            { 176, 191 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "PARSER_VHLEN_0_15_0",
+        .fid = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 96, 111 }, /* Profile 2. */
+            { 96, 111 }, /* Profile 3. */
+            { 96, 111 }, /* Profile 4. */
+            { 96, 111 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "PKT_MISC_CTRL_0_3_0",
+        .fid = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 408, 411 }, /* Profile 2. */
+            { 408, 411 }, /* Profile 3. */
+            { 408, 411 }, /* Profile 4. */
+            { 408, 411 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "SVP_15_0",
+        .fid = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_SVP_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 208, 223 }, /* Profile 2. */
+            { 192, 207 }, /* Profile 3. */
+            { 208, 223 }, /* Profile 4. */
+            { 192, 207 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "SVP_NETWORK_GROUP_BITMAP_3_0",
+        .fid = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 388, 391 }, /* Profile 2. */
+            { 388, 391 }, /* Profile 3. */
+            { 388, 391 }, /* Profile 4. */
+            { 388, 391 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "SYSTEM_DESTINATION_15_0",
+        .fid = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 128, 143 }, /* Profile 2. */
+            { 128, 143 }, /* Profile 3. */
+            { 128, 143 }, /* Profile 4. */
+            { 128, 143 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "SYSTEM_OPCODE_3_0",
+        .fid = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 404, 407 }, /* Profile 2. */
+            { 404, 407 }, /* Profile 3. */
+            { 404, 407 }, /* Profile 4. */
+            { 404, 407 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "T_VLAN_TAG_VALUE_15_0",
+        .fid = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_T_VLAN_TAG_VALUE_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 288, 303 }, /* Profile 2. */
+            { 288, 303 }, /* Profile 3. */
+            { 288, 303 }, /* Profile 4. */
+            { 288, 303 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "TIMESTAMP_CTRL_3_0",
+        .fid = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 372, 375 }, /* Profile 2. */
+            { 372, 375 }, /* Profile 3. */
+            { 372, 375 }, /* Profile 4. */
+            { 372, 375 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "TUNNEL_PROCESSING_RESULTS_1_3_0",
+        .fid = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 400, 403 }, /* Profile 2. */
+            { 400, 403 }, /* Profile 3. */
+            { 400, 403 }, /* Profile 4. */
+            { 400, 403 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "VFI_15_0",
+        .fid = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_VFI_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 224, 239 }, /* Profile 2. */
+            { 208, 223 }, /* Profile 3. */
+            { 224, 239 }, /* Profile 4. */
+            { 208, 223 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+    {
+        .name = "VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0",
+        .fid = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 384, 387 }, /* Profile 2. */
+            { 384, 387 }, /* Profile 3. */
+            { 384, 387 }, /* Profile 4. */
+            { 384, 387 }, /* Profile 5. */
+        },
+        .profile_cnt = 6,
+    },
+};static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_rxpmd_flex_field_info = {
+    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_FID_COUNT,
+    .info = bcm56880_a0_nfa_2_1_7_0_rxpmd_flex_field_data,
+};
+
+static shr_enum_map_t bcm56880_a0_nfa_2_1_7_0_rxpmd_flex_reason_names[] = {
+    BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_reasons_info_t bcm56880_a0_nfa_2_1_7_0_rxpmd_flex_reasons_info = {
+    .num_reasons = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RXPMD_FLEX_REASON_COUNT,
+    .reason_names = bcm56880_a0_nfa_2_1_7_0_rxpmd_flex_reason_names,
+    .reason_encode = bcm56880_a0_nfa_2_1_7_0_rxpmd_flex_reason_encode,
+    .reason_decode = bcm56880_a0_nfa_2_1_7_0_rxpmd_flex_reason_decode,
+};
+
+
+static int32_t bcmpkt_arp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_operation_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_operation_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_arp_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_ARP_T_FID_COUNT] = {
+    bcmpkt_arp_t_hardware_len_get,
+    bcmpkt_arp_t_hardware_type_get,
+    bcmpkt_arp_t_operation_get,
+    bcmpkt_arp_t_prot_addr_len_get,
+    bcmpkt_arp_t_protocol_type_get,
+    bcmpkt_arp_t_sender_ha_get,
+    bcmpkt_arp_t_sender_ip_get,
+    bcmpkt_arp_t_target_ha_get,
+    bcmpkt_arp_t_target_ip_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_arp_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_ARP_T_FID_COUNT] = {
+    bcmpkt_arp_t_hardware_len_set,
+    bcmpkt_arp_t_hardware_type_set,
+    bcmpkt_arp_t_operation_set,
+    bcmpkt_arp_t_prot_addr_len_set,
+    bcmpkt_arp_t_protocol_type_set,
+    bcmpkt_arp_t_sender_ha_set,
+    bcmpkt_arp_t_sender_ip_set,
+    bcmpkt_arp_t_target_ha_set,
+    bcmpkt_arp_t_target_ip_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_arp_t_field_data[] = {
+    BCM56880_A0_NFA_2_1_7_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_arp_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_ARP_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_2_1_7_0_arp_t_field_data,
+};
+
+
+static int32_t bcmpkt_authen_t_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_payload_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_payload_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_spi_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_spi_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_authen_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_AUTHEN_T_FID_COUNT] = {
+    bcmpkt_authen_t_data_get,
+    bcmpkt_authen_t_next_header_get,
+    bcmpkt_authen_t_payload_len_get,
+    bcmpkt_authen_t_reserved_get,
+    bcmpkt_authen_t_seq_num_get,
+    bcmpkt_authen_t_spi_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_authen_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_AUTHEN_T_FID_COUNT] = {
+    bcmpkt_authen_t_data_set,
+    bcmpkt_authen_t_next_header_set,
+    bcmpkt_authen_t_payload_len_set,
+    bcmpkt_authen_t_reserved_set,
+    bcmpkt_authen_t_seq_num_set,
+    bcmpkt_authen_t_spi_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_authen_t_field_data[] = {
+    BCM56880_A0_NFA_2_1_7_0_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_authen_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_AUTHEN_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_2_1_7_0_authen_t_field_data,
+};
+
+
+static int32_t bcmpkt_bfd_t_desmintxintv_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_desmintxintv_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_minechorxintv_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_minechorxintv_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_reqminrxintv_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_reqminrxintv_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_ap_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 18, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_ap_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 18, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_bfd_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_bfd_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_cpi_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 19, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_cpi_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 19, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_dem_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 17, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_dem_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 17, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_detectmult_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_detectmult_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_diag_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 5);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_diag_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 5, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_fin_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 20, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_fin_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 20, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_mpt_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_mpt_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_mydiscrim_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_mydiscrim_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_poll_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 21, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_poll_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 21, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_sta_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 22, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_sta_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 22, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_urdiscrim_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_urdiscrim_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 29, 3);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 29, 3, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_bfd_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_FID_COUNT] = {
+    bcmpkt_bfd_t_ap_get,
+    bcmpkt_bfd_t_bfd_length_get,
+    bcmpkt_bfd_t_cpi_get,
+    bcmpkt_bfd_t_dem_get,
+    bcmpkt_bfd_t_desmintxintv_get,
+    bcmpkt_bfd_t_detectmult_get,
+    bcmpkt_bfd_t_diag_get,
+    bcmpkt_bfd_t_fin_get,
+    bcmpkt_bfd_t_minechorxintv_get,
+    bcmpkt_bfd_t_mpt_get,
+    bcmpkt_bfd_t_mydiscrim_get,
+    bcmpkt_bfd_t_poll_get,
+    bcmpkt_bfd_t_reqminrxintv_get,
+    bcmpkt_bfd_t_sta_get,
+    bcmpkt_bfd_t_urdiscrim_get,
+    bcmpkt_bfd_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_bfd_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_FID_COUNT] = {
+    bcmpkt_bfd_t_ap_set,
+    bcmpkt_bfd_t_bfd_length_set,
+    bcmpkt_bfd_t_cpi_set,
+    bcmpkt_bfd_t_dem_set,
+    bcmpkt_bfd_t_desmintxintv_set,
+    bcmpkt_bfd_t_detectmult_set,
+    bcmpkt_bfd_t_diag_set,
+    bcmpkt_bfd_t_fin_set,
+    bcmpkt_bfd_t_minechorxintv_set,
+    bcmpkt_bfd_t_mpt_set,
+    bcmpkt_bfd_t_mydiscrim_set,
+    bcmpkt_bfd_t_poll_set,
+    bcmpkt_bfd_t_reqminrxintv_set,
+    bcmpkt_bfd_t_sta_set,
+    bcmpkt_bfd_t_urdiscrim_set,
+    bcmpkt_bfd_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_bfd_t_field_data[] = {
+    BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_bfd_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_BFD_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_2_1_7_0_bfd_t_field_data,
+};
+
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_cpu_composites_0_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = {
+    bcmpkt_cpu_composites_0_t_dma_cont0_get,
+    bcmpkt_cpu_composites_0_t_dma_cont1_get,
+    bcmpkt_cpu_composites_0_t_dma_cont2_get,
+    bcmpkt_cpu_composites_0_t_dma_cont3_get,
+    bcmpkt_cpu_composites_0_t_dma_cont4_get,
+    bcmpkt_cpu_composites_0_t_dma_cont5_get,
+    bcmpkt_cpu_composites_0_t_dma_cont6_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_cpu_composites_0_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = {
+    bcmpkt_cpu_composites_0_t_dma_cont0_set,
+    bcmpkt_cpu_composites_0_t_dma_cont1_set,
+    bcmpkt_cpu_composites_0_t_dma_cont2_set,
+    bcmpkt_cpu_composites_0_t_dma_cont3_set,
+    bcmpkt_cpu_composites_0_t_dma_cont4_set,
+    bcmpkt_cpu_composites_0_t_dma_cont5_set,
+    bcmpkt_cpu_composites_0_t_dma_cont6_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_cpu_composites_0_t_field_data[] = {
+    BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_cpu_composites_0_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_2_1_7_0_cpu_composites_0_t_field_data,
+};
+
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_cpu_composites_1_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = {
+    bcmpkt_cpu_composites_1_t_dma_cont10_get,
+    bcmpkt_cpu_composites_1_t_dma_cont11_get,
+    bcmpkt_cpu_composites_1_t_dma_cont12_get,
+    bcmpkt_cpu_composites_1_t_dma_cont13_get,
+    bcmpkt_cpu_composites_1_t_dma_cont14_get,
+    bcmpkt_cpu_composites_1_t_dma_cont15_get,
+    bcmpkt_cpu_composites_1_t_dma_cont16_get,
+    bcmpkt_cpu_composites_1_t_dma_cont17_get,
+    bcmpkt_cpu_composites_1_t_dma_cont7_get,
+    bcmpkt_cpu_composites_1_t_dma_cont8_get,
+    bcmpkt_cpu_composites_1_t_dma_cont9_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_cpu_composites_1_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = {
+    bcmpkt_cpu_composites_1_t_dma_cont10_set,
+    bcmpkt_cpu_composites_1_t_dma_cont11_set,
+    bcmpkt_cpu_composites_1_t_dma_cont12_set,
+    bcmpkt_cpu_composites_1_t_dma_cont13_set,
+    bcmpkt_cpu_composites_1_t_dma_cont14_set,
+    bcmpkt_cpu_composites_1_t_dma_cont15_set,
+    bcmpkt_cpu_composites_1_t_dma_cont16_set,
+    bcmpkt_cpu_composites_1_t_dma_cont17_set,
+    bcmpkt_cpu_composites_1_t_dma_cont7_set,
+    bcmpkt_cpu_composites_1_t_dma_cont8_set,
+    bcmpkt_cpu_composites_1_t_dma_cont9_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_cpu_composites_1_t_field_data[] = {
+    BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_cpu_composites_1_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_2_1_7_0_cpu_composites_1_t_field_data,
+};
+
+
+static int32_t bcmpkt_dest_option_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_dest_option_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_dest_option_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_dest_option_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_dest_option_t_option_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_dest_option_t_option_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_dest_option_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_DEST_OPTION_T_FID_COUNT] = {
+    bcmpkt_dest_option_t_hdr_ext_len_get,
+    bcmpkt_dest_option_t_next_header_get,
+    bcmpkt_dest_option_t_option_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_dest_option_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_DEST_OPTION_T_FID_COUNT] = {
+    bcmpkt_dest_option_t_hdr_ext_len_set,
+    bcmpkt_dest_option_t_next_header_set,
+    bcmpkt_dest_option_t_option_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_dest_option_t_field_data[] = {
+    BCM56880_A0_NFA_2_1_7_0_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_dest_option_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_DEST_OPTION_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_2_1_7_0_dest_option_t_field_data,
+};
+
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 11, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 11, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 13, 3);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 13, 3, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 10);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 10, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_t_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 10, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_t_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 10, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 12);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 12, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_erspan3_fixed_hdr_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = {
+    bcmpkt_erspan3_fixed_hdr_t_bso_get,
+    bcmpkt_erspan3_fixed_hdr_t_cos_get,
+    bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get,
+    bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get,
+    bcmpkt_erspan3_fixed_hdr_t_session_id_get,
+    bcmpkt_erspan3_fixed_hdr_t_t_get,
+    bcmpkt_erspan3_fixed_hdr_t_timestamp_get,
+    bcmpkt_erspan3_fixed_hdr_t_ver_get,
+    bcmpkt_erspan3_fixed_hdr_t_vlan_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_erspan3_fixed_hdr_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = {
+    bcmpkt_erspan3_fixed_hdr_t_bso_set,
+    bcmpkt_erspan3_fixed_hdr_t_cos_set,
+    bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set,
+    bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set,
+    bcmpkt_erspan3_fixed_hdr_t_session_id_set,
+    bcmpkt_erspan3_fixed_hdr_t_t_set,
+    bcmpkt_erspan3_fixed_hdr_t_timestamp_set,
+    bcmpkt_erspan3_fixed_hdr_t_ver_set,
+    bcmpkt_erspan3_fixed_hdr_t_vlan_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_erspan3_fixed_hdr_t_field_data[] = {
+    BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_erspan3_fixed_hdr_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_2_1_7_0_erspan3_fixed_hdr_t_field_data,
+};
+
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 26, 6);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 26, 6, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 10);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 10, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_erspan3_subhdr_5_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = {
+    bcmpkt_erspan3_subhdr_5_t_platform_id_get,
+    bcmpkt_erspan3_subhdr_5_t_port_id_get,
+    bcmpkt_erspan3_subhdr_5_t_switch_id_get,
+    bcmpkt_erspan3_subhdr_5_t_timestamp_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_erspan3_subhdr_5_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = {
+    bcmpkt_erspan3_subhdr_5_t_platform_id_set,
+    bcmpkt_erspan3_subhdr_5_t_port_id_set,
+    bcmpkt_erspan3_subhdr_5_t_switch_id_set,
+    bcmpkt_erspan3_subhdr_5_t_timestamp_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_erspan3_subhdr_5_t_field_data[] = {
+    BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_erspan3_subhdr_5_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_2_1_7_0_erspan3_subhdr_5_t_field_data,
+};
+
+
+static int32_t bcmpkt_esp_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_pad_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 8, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_pad_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 8, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_pad_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_pad_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_spi_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_spi_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_esp_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_ESP_T_FID_COUNT] = {
+    bcmpkt_esp_t_next_header_get,
+    bcmpkt_esp_t_pad_get,
+    bcmpkt_esp_t_pad_len_get,
+    bcmpkt_esp_t_seq_num_get,
+    bcmpkt_esp_t_spi_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_esp_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_ESP_T_FID_COUNT] = {
+    bcmpkt_esp_t_next_header_set,
+    bcmpkt_esp_t_pad_set,
+    bcmpkt_esp_t_pad_len_set,
+    bcmpkt_esp_t_seq_num_set,
+    bcmpkt_esp_t_spi_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_esp_t_field_data[] = {
+    BCM56880_A0_NFA_2_1_7_0_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_esp_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_ESP_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_2_1_7_0_esp_t_field_data,
+};
+
+
+static int32_t bcmpkt_etag_t_pcp_dei_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 12, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_etag_t_pcp_dei_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 12, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_etag_t_rsrvd0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 30, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_etag_t_rsrvd0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 30, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_etag_t_rsrvd1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_etag_t_rsrvd1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_etag_t_svid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 12);
+
+    return ret;
+}
+
+static int32_t bcmpkt_etag_t_svid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 12, val);
+    return ret;
+}
+
+static int32_t bcmpkt_etag_t_tpid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_etag_t_tpid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_etag_t_vid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 14);
+
+    return ret;
+}
+
+static int32_t bcmpkt_etag_t_vid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 14, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_etag_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_ETAG_T_FID_COUNT] = {
+    bcmpkt_etag_t_pcp_dei_get,
+    bcmpkt_etag_t_rsrvd0_get,
+    bcmpkt_etag_t_rsrvd1_get,
+    bcmpkt_etag_t_svid_get,
+    bcmpkt_etag_t_tpid_get,
+    bcmpkt_etag_t_vid_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_etag_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_ETAG_T_FID_COUNT] = {
+    bcmpkt_etag_t_pcp_dei_set,
+    bcmpkt_etag_t_rsrvd0_set,
+    bcmpkt_etag_t_rsrvd1_set,
+    bcmpkt_etag_t_svid_set,
+    bcmpkt_etag_t_tpid_set,
+    bcmpkt_etag_t_vid_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_etag_t_field_data[] = {
+    BCM56880_A0_NFA_2_1_7_0_BCMPKT_ETAG_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_etag_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_ETAG_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_2_1_7_0_etag_t_field_data,
+};
+
+
+static int32_t bcmpkt_ethertype_t_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ethertype_t_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_ethertype_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = {
+    bcmpkt_ethertype_t_type_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_ethertype_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = {
+    bcmpkt_ethertype_t_type_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_ethertype_t_field_data[] = {
+    BCM56880_A0_NFA_2_1_7_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_ethertype_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_ETHERTYPE_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_2_1_7_0_ethertype_t_field_data,
+};
+
+
+static int32_t bcmpkt_frag_t_frag_info_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_frag_t_frag_info_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_frag_t_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_frag_t_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_frag_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_frag_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_frag_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_frag_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_frag_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_FRAG_T_FID_COUNT] = {
+    bcmpkt_frag_t_frag_info_get,
+    bcmpkt_frag_t_id_get,
+    bcmpkt_frag_t_next_header_get,
+    bcmpkt_frag_t_reserved_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_frag_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_FRAG_T_FID_COUNT] = {
+    bcmpkt_frag_t_frag_info_set,
+    bcmpkt_frag_t_id_set,
+    bcmpkt_frag_t_next_header_set,
+    bcmpkt_frag_t_reserved_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_frag_t_field_data[] = {
+    BCM56880_A0_NFA_2_1_7_0_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_frag_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_FRAG_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_2_1_7_0_frag_t_field_data,
+};
+
+
+static int32_t bcmpkt_generic_loopback_t_destination_obj_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_destination_obj_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_destination_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_destination_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_entropy_obj_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_entropy_obj_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_header_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 20, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_header_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 20, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_input_priority_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 12, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_input_priority_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 12, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_interface_ctrl_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 4, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_interface_ctrl_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 4, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_interface_obj_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_interface_obj_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_qos_obj_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_qos_obj_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_reserved_1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_reserved_1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_reserved_2_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_reserved_2_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_source_system_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_source_system_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_start_byte_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_start_byte_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_generic_loopback_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = {
+    bcmpkt_generic_loopback_t_destination_obj_get,
+    bcmpkt_generic_loopback_t_destination_type_get,
+    bcmpkt_generic_loopback_t_entropy_obj_get,
+    bcmpkt_generic_loopback_t_flags_get,
+    bcmpkt_generic_loopback_t_header_type_get,
+    bcmpkt_generic_loopback_t_input_priority_get,
+    bcmpkt_generic_loopback_t_interface_ctrl_get,
+    bcmpkt_generic_loopback_t_interface_obj_get,
+    bcmpkt_generic_loopback_t_processing_ctrl_0_get,
+    bcmpkt_generic_loopback_t_processing_ctrl_1_get,
+    bcmpkt_generic_loopback_t_qos_obj_get,
+    bcmpkt_generic_loopback_t_reserved_1_get,
+    bcmpkt_generic_loopback_t_reserved_2_get,
+    bcmpkt_generic_loopback_t_source_system_port_get,
+    bcmpkt_generic_loopback_t_start_byte_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_generic_loopback_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = {
+    bcmpkt_generic_loopback_t_destination_obj_set,
+    bcmpkt_generic_loopback_t_destination_type_set,
+    bcmpkt_generic_loopback_t_entropy_obj_set,
+    bcmpkt_generic_loopback_t_flags_set,
+    bcmpkt_generic_loopback_t_header_type_set,
+    bcmpkt_generic_loopback_t_input_priority_set,
+    bcmpkt_generic_loopback_t_interface_ctrl_set,
+    bcmpkt_generic_loopback_t_interface_obj_set,
+    bcmpkt_generic_loopback_t_processing_ctrl_0_set,
+    bcmpkt_generic_loopback_t_processing_ctrl_1_set,
+    bcmpkt_generic_loopback_t_qos_obj_set,
+    bcmpkt_generic_loopback_t_reserved_1_set,
+    bcmpkt_generic_loopback_t_reserved_2_set,
+    bcmpkt_generic_loopback_t_source_system_port_set,
+    bcmpkt_generic_loopback_t_start_byte_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_generic_loopback_t_field_data[] = {
+    BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_generic_loopback_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_2_1_7_0_generic_loopback_t_field_data,
+};
+
+
+static int32_t bcmpkt_gpe_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_next_protocol_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_next_protocol_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_reserved0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_reserved0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_reserved1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_reserved1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_vni_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 8, 24);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_vni_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 8, 24, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_gpe_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_GPE_T_FID_COUNT] = {
+    bcmpkt_gpe_t_flags_get,
+    bcmpkt_gpe_t_next_protocol_get,
+    bcmpkt_gpe_t_reserved0_get,
+    bcmpkt_gpe_t_reserved1_get,
+    bcmpkt_gpe_t_vni_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_gpe_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_GPE_T_FID_COUNT] = {
+    bcmpkt_gpe_t_flags_set,
+    bcmpkt_gpe_t_next_protocol_set,
+    bcmpkt_gpe_t_reserved0_set,
+    bcmpkt_gpe_t_reserved1_set,
+    bcmpkt_gpe_t_vni_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_gpe_t_field_data[] = {
+    BCM56880_A0_NFA_2_1_7_0_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_gpe_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_GPE_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_2_1_7_0_gpe_t_field_data,
+};
+
+
+static int32_t bcmpkt_gre_chksum_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_chksum_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gre_chksum_t_offset_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_chksum_t_offset_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_gre_chksum_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = {
+    bcmpkt_gre_chksum_t_checksum_get,
+    bcmpkt_gre_chksum_t_offset_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_gre_chksum_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = {
+    bcmpkt_gre_chksum_t_checksum_set,
+    bcmpkt_gre_chksum_t_offset_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_gre_chksum_t_field_data[] = {
+    BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_gre_chksum_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_2_1_7_0_gre_chksum_t_field_data,
+};
+
+
+static int32_t bcmpkt_gre_key_t_vn_id_lower_entropy_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_key_t_vn_id_lower_entropy_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gre_key_t_vn_id_upper_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_key_t_vn_id_upper_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_gre_key_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_KEY_T_FID_COUNT] = {
+    bcmpkt_gre_key_t_vn_id_lower_entropy_get,
+    bcmpkt_gre_key_t_vn_id_upper_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_gre_key_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_KEY_T_FID_COUNT] = {
+    bcmpkt_gre_key_t_vn_id_lower_entropy_set,
+    bcmpkt_gre_key_t_vn_id_upper_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_gre_key_t_field_data[] = {
+    BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_gre_key_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_KEY_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_2_1_7_0_gre_key_t_field_data,
+};
+
+
+static int32_t bcmpkt_gre_rout_t_routing_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_rout_t_routing_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_gre_rout_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_ROUT_T_FID_COUNT] = {
+    bcmpkt_gre_rout_t_routing_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_gre_rout_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_ROUT_T_FID_COUNT] = {
+    bcmpkt_gre_rout_t_routing_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_gre_rout_t_field_data[] = {
+    BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_gre_rout_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_ROUT_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_2_1_7_0_gre_rout_t_field_data,
+};
+
+
+static int32_t bcmpkt_gre_seq_t_sequence_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_seq_t_sequence_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_gre_seq_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_SEQ_T_FID_COUNT] = {
+    bcmpkt_gre_seq_t_sequence_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_gre_seq_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_SEQ_T_FID_COUNT] = {
+    bcmpkt_gre_seq_t_sequence_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_gre_seq_t_field_data[] = {
+    BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_gre_seq_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_SEQ_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_2_1_7_0_gre_seq_t_field_data,
+};
+
+
+static int32_t bcmpkt_gre_t_c_r_k_s_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_t_c_r_k_s_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gre_t_protocol_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_t_protocol_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gre_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 19, 9);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 19, 9, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gre_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 3);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 3, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_gre_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_T_FID_COUNT] = {
+    bcmpkt_gre_t_c_r_k_s_get,
+    bcmpkt_gre_t_protocol_get,
+    bcmpkt_gre_t_reserved_get,
+    bcmpkt_gre_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_gre_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_T_FID_COUNT] = {
+    bcmpkt_gre_t_c_r_k_s_set,
+    bcmpkt_gre_t_protocol_set,
+    bcmpkt_gre_t_reserved_set,
+    bcmpkt_gre_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_gre_t_field_data[] = {
+    BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_gre_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_GRE_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_2_1_7_0_gre_t_field_data,
+};
+
+
+static int32_t bcmpkt_gtp_12byte_t_bytes_11_8_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_gtp_12byte_t_bytes_11_8_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_gtp_12byte_t_bytes_3_0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_gtp_12byte_t_bytes_3_0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_gtp_12byte_t_bytes_7_4_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_gtp_12byte_t_bytes_7_4_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_gtp_12byte_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_GTP_12BYTE_T_FID_COUNT] = {
+    bcmpkt_gtp_12byte_t_bytes_11_8_get,
+    bcmpkt_gtp_12byte_t_bytes_3_0_get,
+    bcmpkt_gtp_12byte_t_bytes_7_4_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_gtp_12byte_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_GTP_12BYTE_T_FID_COUNT] = {
+    bcmpkt_gtp_12byte_t_bytes_11_8_set,
+    bcmpkt_gtp_12byte_t_bytes_3_0_set,
+    bcmpkt_gtp_12byte_t_bytes_7_4_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_gtp_12byte_t_field_data[] = {
+    BCM56880_A0_NFA_2_1_7_0_BCMPKT_GTP_12BYTE_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_gtp_12byte_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_GTP_12BYTE_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_2_1_7_0_gtp_12byte_t_field_data,
+};
+
+
+static int32_t bcmpkt_gtp_8byte_t_bytes_3_0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_gtp_8byte_t_bytes_3_0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_gtp_8byte_t_bytes_7_4_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_gtp_8byte_t_bytes_7_4_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_gtp_8byte_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_GTP_8BYTE_T_FID_COUNT] = {
+    bcmpkt_gtp_8byte_t_bytes_3_0_get,
+    bcmpkt_gtp_8byte_t_bytes_7_4_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_gtp_8byte_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_GTP_8BYTE_T_FID_COUNT] = {
+    bcmpkt_gtp_8byte_t_bytes_3_0_set,
+    bcmpkt_gtp_8byte_t_bytes_7_4_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_gtp_8byte_t_field_data[] = {
+    BCM56880_A0_NFA_2_1_7_0_BCMPKT_GTP_8BYTE_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_gtp_8byte_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_GTP_8BYTE_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_2_1_7_0_gtp_8byte_t_field_data,
+};
+
+
+static int32_t bcmpkt_hop_by_hop_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hop_by_hop_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hop_by_hop_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hop_by_hop_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hop_by_hop_t_option_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_hop_by_hop_t_option_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_hop_by_hop_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = {
+    bcmpkt_hop_by_hop_t_hdr_ext_len_get,
+    bcmpkt_hop_by_hop_t_next_header_get,
+    bcmpkt_hop_by_hop_t_option_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_hop_by_hop_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = {
+    bcmpkt_hop_by_hop_t_hdr_ext_len_set,
+    bcmpkt_hop_by_hop_t_next_header_set,
+    bcmpkt_hop_by_hop_t_option_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_hop_by_hop_t_field_data[] = {
+    BCM56880_A0_NFA_2_1_7_0_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_hop_by_hop_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_2_1_7_0_hop_by_hop_t_field_data,
+};
+
+
+static int32_t bcmpkt_icmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_icmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_icmp_t_code_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_icmp_t_code_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_icmp_t_icmp_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_icmp_t_icmp_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_icmp_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_ICMP_T_FID_COUNT] = {
+    bcmpkt_icmp_t_checksum_get,
+    bcmpkt_icmp_t_code_get,
+    bcmpkt_icmp_t_icmp_type_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_icmp_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_ICMP_T_FID_COUNT] = {
+    bcmpkt_icmp_t_checksum_set,
+    bcmpkt_icmp_t_code_set,
+    bcmpkt_icmp_t_icmp_type_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_icmp_t_field_data[] = {
+    BCM56880_A0_NFA_2_1_7_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_icmp_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_ICMP_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_2_1_7_0_icmp_t_field_data,
+};
+
+
+static int32_t bcmpkt_igmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_igmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_igmp_t_group_address_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_igmp_t_group_address_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_igmp_t_igmp_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_igmp_t_igmp_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_igmp_t_max_resp_time_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_igmp_t_max_resp_time_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_igmp_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_IGMP_T_FID_COUNT] = {
+    bcmpkt_igmp_t_checksum_get,
+    bcmpkt_igmp_t_group_address_get,
+    bcmpkt_igmp_t_igmp_type_get,
+    bcmpkt_igmp_t_max_resp_time_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_igmp_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_IGMP_T_FID_COUNT] = {
+    bcmpkt_igmp_t_checksum_set,
+    bcmpkt_igmp_t_group_address_set,
+    bcmpkt_igmp_t_igmp_type_set,
+    bcmpkt_igmp_t_max_resp_time_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_igmp_t_field_data[] = {
+    BCM56880_A0_NFA_2_1_7_0_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_igmp_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_IGMP_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_2_1_7_0_igmp_t_field_data,
+};
+
+
+static int32_t bcmpkt_ipfix_t_export_time_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_export_time_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_obs_domain_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_obs_domain_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_ipfix_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPFIX_T_FID_COUNT] = {
+    bcmpkt_ipfix_t_export_time_get,
+    bcmpkt_ipfix_t_length_get,
+    bcmpkt_ipfix_t_obs_domain_id_get,
+    bcmpkt_ipfix_t_sequence_num_get,
+    bcmpkt_ipfix_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_ipfix_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPFIX_T_FID_COUNT] = {
+    bcmpkt_ipfix_t_export_time_set,
+    bcmpkt_ipfix_t_length_set,
+    bcmpkt_ipfix_t_obs_domain_id_set,
+    bcmpkt_ipfix_t_sequence_num_set,
+    bcmpkt_ipfix_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_ipfix_t_field_data[] = {
+    BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_ipfix_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPFIX_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_2_1_7_0_ipfix_t_field_data,
+};
+
+
+static int32_t bcmpkt_ipv4_t_da_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_da_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_flags_frag_offset_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_flags_frag_offset_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_hdr_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_hdr_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_option_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_option_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_protocol_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_protocol_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_sa_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_sa_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_tos_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_tos_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_total_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_total_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_ttl_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_ttl_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_version_hdr_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_version_hdr_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_ipv4_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV4_T_FID_COUNT] = {
+    bcmpkt_ipv4_t_da_get,
+    bcmpkt_ipv4_t_flags_frag_offset_get,
+    bcmpkt_ipv4_t_hdr_checksum_get,
+    bcmpkt_ipv4_t_id_get,
+    bcmpkt_ipv4_t_option_get,
+    bcmpkt_ipv4_t_protocol_get,
+    bcmpkt_ipv4_t_sa_get,
+    bcmpkt_ipv4_t_tos_get,
+    bcmpkt_ipv4_t_total_length_get,
+    bcmpkt_ipv4_t_ttl_get,
+    bcmpkt_ipv4_t_version_hdr_len_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_ipv4_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV4_T_FID_COUNT] = {
+    bcmpkt_ipv4_t_da_set,
+    bcmpkt_ipv4_t_flags_frag_offset_set,
+    bcmpkt_ipv4_t_hdr_checksum_set,
+    bcmpkt_ipv4_t_id_set,
+    bcmpkt_ipv4_t_option_set,
+    bcmpkt_ipv4_t_protocol_set,
+    bcmpkt_ipv4_t_sa_set,
+    bcmpkt_ipv4_t_tos_set,
+    bcmpkt_ipv4_t_total_length_set,
+    bcmpkt_ipv4_t_ttl_set,
+    bcmpkt_ipv4_t_version_hdr_len_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_ipv4_t_field_data[] = {
+    BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_ipv4_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV4_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_2_1_7_0_ipv4_t_field_data,
+};
+
+
+static int32_t bcmpkt_ipv6_t_da_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_da_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_flow_label_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 20);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_flow_label_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 20, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_hop_limit_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_hop_limit_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 8, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 8, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_payload_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_payload_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_sa_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_sa_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_traffic_class_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 20, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_traffic_class_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 20, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_ipv6_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV6_T_FID_COUNT] = {
+    bcmpkt_ipv6_t_da_get,
+    bcmpkt_ipv6_t_flow_label_get,
+    bcmpkt_ipv6_t_hop_limit_get,
+    bcmpkt_ipv6_t_next_header_get,
+    bcmpkt_ipv6_t_payload_length_get,
+    bcmpkt_ipv6_t_sa_get,
+    bcmpkt_ipv6_t_traffic_class_get,
+    bcmpkt_ipv6_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_ipv6_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV6_T_FID_COUNT] = {
+    bcmpkt_ipv6_t_da_set,
+    bcmpkt_ipv6_t_flow_label_set,
+    bcmpkt_ipv6_t_hop_limit_set,
+    bcmpkt_ipv6_t_next_header_set,
+    bcmpkt_ipv6_t_payload_length_set,
+    bcmpkt_ipv6_t_sa_set,
+    bcmpkt_ipv6_t_traffic_class_set,
+    bcmpkt_ipv6_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_ipv6_t_field_data[] = {
+    BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_ipv6_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_IPV6_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_2_1_7_0_ipv6_t_field_data,
+};
+
+
+static int32_t bcmpkt_l2_t_macda_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_l2_t_macda_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_l2_t_macsa_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_l2_t_macsa_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_l2_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_L2_T_FID_COUNT] = {
+    bcmpkt_l2_t_macda_get,
+    bcmpkt_l2_t_macsa_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_l2_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_L2_T_FID_COUNT] = {
+    bcmpkt_l2_t_macda_set,
+    bcmpkt_l2_t_macsa_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_l2_t_field_data[] = {
+    BCM56880_A0_NFA_2_1_7_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_l2_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_L2_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_2_1_7_0_l2_t_field_data,
+};
+
+
+static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_mirror_erspan_sn_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = {
+    bcmpkt_mirror_erspan_sn_t_seq_num_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_mirror_erspan_sn_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = {
+    bcmpkt_mirror_erspan_sn_t_seq_num_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_mirror_erspan_sn_t_field_data[] = {
+    BCM56880_A0_NFA_2_1_7_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_mirror_erspan_sn_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_2_1_7_0_mirror_erspan_sn_t_field_data,
+};
+
+
+static int32_t bcmpkt_mirror_transport_t_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_mirror_transport_t_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_mirror_transport_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = {
+    bcmpkt_mirror_transport_t_data_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_mirror_transport_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = {
+    bcmpkt_mirror_transport_t_data_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_mirror_transport_t_field_data[] = {
+    BCM56880_A0_NFA_2_1_7_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_mirror_transport_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_2_1_7_0_mirror_transport_t_field_data,
+};
+
+
+static int32_t bcmpkt_mpls_ach_t_channel_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_ach_t_channel_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_ach_t_cw_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_ach_t_cw_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_ach_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_ach_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_ach_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_ach_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 4, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_mpls_ach_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_ACH_T_FID_COUNT] = {
+    bcmpkt_mpls_ach_t_channel_type_get,
+    bcmpkt_mpls_ach_t_cw_type_get,
+    bcmpkt_mpls_ach_t_reserved_get,
+    bcmpkt_mpls_ach_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_mpls_ach_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_ACH_T_FID_COUNT] = {
+    bcmpkt_mpls_ach_t_channel_type_set,
+    bcmpkt_mpls_ach_t_cw_type_set,
+    bcmpkt_mpls_ach_t_reserved_set,
+    bcmpkt_mpls_ach_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_mpls_ach_t_field_data[] = {
+    BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_mpls_ach_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_ACH_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_2_1_7_0_mpls_ach_t_field_data,
+};
+
+
+static int32_t bcmpkt_mpls_bv_t_value_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_bv_t_value_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_mpls_bv_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_BV_T_FID_COUNT] = {
+    bcmpkt_mpls_bv_t_value_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_mpls_bv_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_BV_T_FID_COUNT] = {
+    bcmpkt_mpls_bv_t_value_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_mpls_bv_t_field_data[] = {
+    BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_mpls_bv_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_BV_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_2_1_7_0_mpls_bv_t_field_data,
+};
+
+
+static int32_t bcmpkt_mpls_cw_t_cw_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_cw_t_cw_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_cw_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 12);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_cw_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 12, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_cw_t_seq_number_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_cw_t_seq_number_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_mpls_cw_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_CW_T_FID_COUNT] = {
+    bcmpkt_mpls_cw_t_cw_type_get,
+    bcmpkt_mpls_cw_t_reserved_get,
+    bcmpkt_mpls_cw_t_seq_number_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_mpls_cw_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_CW_T_FID_COUNT] = {
+    bcmpkt_mpls_cw_t_cw_type_set,
+    bcmpkt_mpls_cw_t_reserved_set,
+    bcmpkt_mpls_cw_t_seq_number_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_mpls_cw_t_field_data[] = {
+    BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_mpls_cw_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_CW_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_2_1_7_0_mpls_cw_t_field_data,
+};
+
+
+static int32_t bcmpkt_mpls_t_bos_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_t_bos_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_t_exp_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 9, 3);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_t_exp_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 9, 3, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_t_label_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 12, 20);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_t_label_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 12, 20, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_t_ttl_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_t_ttl_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_mpls_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_T_FID_COUNT] = {
+    bcmpkt_mpls_t_bos_get,
+    bcmpkt_mpls_t_exp_get,
+    bcmpkt_mpls_t_label_get,
+    bcmpkt_mpls_t_ttl_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_mpls_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_T_FID_COUNT] = {
+    bcmpkt_mpls_t_bos_set,
+    bcmpkt_mpls_t_exp_set,
+    bcmpkt_mpls_t_label_set,
+    bcmpkt_mpls_t_ttl_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_mpls_t_field_data[] = {
+    BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_mpls_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_MPLS_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_2_1_7_0_mpls_t_field_data,
+};
+
+
+static int32_t bcmpkt_opaquetag_t_tpid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_opaquetag_t_tpid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_opaquetag_t_vlan_tag_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_opaquetag_t_vlan_tag_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_opaquetag_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_OPAQUETAG_T_FID_COUNT] = {
+    bcmpkt_opaquetag_t_tpid_get,
+    bcmpkt_opaquetag_t_vlan_tag_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_opaquetag_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_OPAQUETAG_T_FID_COUNT] = {
+    bcmpkt_opaquetag_t_tpid_set,
+    bcmpkt_opaquetag_t_vlan_tag_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_opaquetag_t_field_data[] = {
+    BCM56880_A0_NFA_2_1_7_0_BCMPKT_OPAQUETAG_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_opaquetag_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_OPAQUETAG_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_2_1_7_0_opaquetag_t_field_data,
+};
+
+
+static int32_t bcmpkt_p_1588_t_cntrl_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[8], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_cntrl_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[8], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_correction_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_correction_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_domain_nb_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_domain_nb_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_logmsginterval_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[8], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_logmsginterval_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[8], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_msg_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_msg_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_msg_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_msg_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_reserved1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 20, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_reserved1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 20, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_reserved2_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_reserved3_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_reserved3_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_seq_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[7], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_seq_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[7], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_srcportid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_srcportid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_transportspec_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_transportspec_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 4, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_p_1588_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T_FID_COUNT] = {
+    bcmpkt_p_1588_t_cntrl_get,
+    bcmpkt_p_1588_t_correction_get,
+    bcmpkt_p_1588_t_domain_nb_get,
+    bcmpkt_p_1588_t_flags_get,
+    bcmpkt_p_1588_t_logmsginterval_get,
+    bcmpkt_p_1588_t_msg_length_get,
+    bcmpkt_p_1588_t_msg_type_get,
+    bcmpkt_p_1588_t_reserved1_get,
+    bcmpkt_p_1588_t_reserved2_get,
+    bcmpkt_p_1588_t_reserved3_get,
+    bcmpkt_p_1588_t_seq_id_get,
+    bcmpkt_p_1588_t_srcportid_get,
+    bcmpkt_p_1588_t_transportspec_get,
+    bcmpkt_p_1588_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_p_1588_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T_FID_COUNT] = {
+    bcmpkt_p_1588_t_cntrl_set,
+    bcmpkt_p_1588_t_correction_set,
+    bcmpkt_p_1588_t_domain_nb_set,
+    bcmpkt_p_1588_t_flags_set,
+    bcmpkt_p_1588_t_logmsginterval_set,
+    bcmpkt_p_1588_t_msg_length_set,
+    bcmpkt_p_1588_t_msg_type_set,
+    bcmpkt_p_1588_t_reserved1_set,
+    bcmpkt_p_1588_t_reserved2_set,
+    bcmpkt_p_1588_t_reserved3_set,
+    bcmpkt_p_1588_t_seq_id_set,
+    bcmpkt_p_1588_t_srcportid_set,
+    bcmpkt_p_1588_t_transportspec_set,
+    bcmpkt_p_1588_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_p_1588_t_field_data[] = {
+    BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_p_1588_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_P_1588_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_2_1_7_0_p_1588_t_field_data,
+};
+
+
+static int32_t bcmpkt_prog_ext_hdr_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_prog_ext_hdr_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_prog_ext_hdr_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_prog_ext_hdr_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_prog_ext_hdr_t_option_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_prog_ext_hdr_t_option_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_prog_ext_hdr_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = {
+    bcmpkt_prog_ext_hdr_t_hdr_ext_len_get,
+    bcmpkt_prog_ext_hdr_t_next_header_get,
+    bcmpkt_prog_ext_hdr_t_option_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_prog_ext_hdr_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = {
+    bcmpkt_prog_ext_hdr_t_hdr_ext_len_set,
+    bcmpkt_prog_ext_hdr_t_next_header_set,
+    bcmpkt_prog_ext_hdr_t_option_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_prog_ext_hdr_t_field_data[] = {
+    BCM56880_A0_NFA_2_1_7_0_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_prog_ext_hdr_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_2_1_7_0_prog_ext_hdr_t_field_data,
+};
+
+
+static int32_t bcmpkt_psamp_0_t_flowset_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_flowset_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_next_hop_index_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_next_hop_index_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_psamp_0_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_0_T_FID_COUNT] = {
+    bcmpkt_psamp_0_t_flowset_get,
+    bcmpkt_psamp_0_t_length_get,
+    bcmpkt_psamp_0_t_next_hop_index_get,
+    bcmpkt_psamp_0_t_obs_time_ns_get,
+    bcmpkt_psamp_0_t_obs_time_s_get,
+    bcmpkt_psamp_0_t_template_id_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_psamp_0_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_0_T_FID_COUNT] = {
+    bcmpkt_psamp_0_t_flowset_set,
+    bcmpkt_psamp_0_t_length_set,
+    bcmpkt_psamp_0_t_next_hop_index_set,
+    bcmpkt_psamp_0_t_obs_time_ns_set,
+    bcmpkt_psamp_0_t_obs_time_s_set,
+    bcmpkt_psamp_0_t_template_id_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_psamp_0_t_field_data[] = {
+    BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_psamp_0_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_0_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_2_1_7_0_psamp_0_t_field_data,
+};
+
+
+static int32_t bcmpkt_psamp_1_t_dlb_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_dlb_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_egress_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_egress_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_epoch_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_epoch_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_variable_flag_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_variable_flag_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 16, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_psamp_1_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_1_T_FID_COUNT] = {
+    bcmpkt_psamp_1_t_dlb_id_get,
+    bcmpkt_psamp_1_t_egress_port_get,
+    bcmpkt_psamp_1_t_epoch_get,
+    bcmpkt_psamp_1_t_ingress_port_get,
+    bcmpkt_psamp_1_t_sampled_length_get,
+    bcmpkt_psamp_1_t_user_meta_data_get,
+    bcmpkt_psamp_1_t_variable_flag_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_psamp_1_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_1_T_FID_COUNT] = {
+    bcmpkt_psamp_1_t_dlb_id_set,
+    bcmpkt_psamp_1_t_egress_port_set,
+    bcmpkt_psamp_1_t_epoch_set,
+    bcmpkt_psamp_1_t_ingress_port_set,
+    bcmpkt_psamp_1_t_sampled_length_set,
+    bcmpkt_psamp_1_t_user_meta_data_set,
+    bcmpkt_psamp_1_t_variable_flag_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_psamp_1_t_field_data[] = {
+    BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_psamp_1_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_1_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_2_1_7_0_psamp_1_t_field_data,
+};
+
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[4], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[4], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[4], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[4], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_psamp_mirror_on_drop_0_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = {
+    bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_length_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_template_id_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_psamp_mirror_on_drop_0_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = {
+    bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_length_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_template_id_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_psamp_mirror_on_drop_0_t_field_data[] = {
+    BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_psamp_mirror_on_drop_0_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_2_1_7_0_psamp_mirror_on_drop_0_t_field_data,
+};
+
+
+static int32_t bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_psamp_mirror_on_drop_1_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT] = {
+    bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_get,
+    bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_get,
+    bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_get,
+    bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_get,
+    bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_get,
+    bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_psamp_mirror_on_drop_1_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT] = {
+    bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_set,
+    bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_set,
+    bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_set,
+    bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_set,
+    bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_set,
+    bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_psamp_mirror_on_drop_1_t_field_data[] = {
+    BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_psamp_mirror_on_drop_1_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_2_1_7_0_psamp_mirror_on_drop_1_t_field_data,
+};
+
+
+static int32_t bcmpkt_rarp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_operation_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_operation_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_rarp_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_RARP_T_FID_COUNT] = {
+    bcmpkt_rarp_t_hardware_len_get,
+    bcmpkt_rarp_t_hardware_type_get,
+    bcmpkt_rarp_t_operation_get,
+    bcmpkt_rarp_t_prot_addr_len_get,
+    bcmpkt_rarp_t_protocol_type_get,
+    bcmpkt_rarp_t_sender_ha_get,
+    bcmpkt_rarp_t_sender_ip_get,
+    bcmpkt_rarp_t_target_ha_get,
+    bcmpkt_rarp_t_target_ip_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_rarp_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_RARP_T_FID_COUNT] = {
+    bcmpkt_rarp_t_hardware_len_set,
+    bcmpkt_rarp_t_hardware_type_set,
+    bcmpkt_rarp_t_operation_set,
+    bcmpkt_rarp_t_prot_addr_len_set,
+    bcmpkt_rarp_t_protocol_type_set,
+    bcmpkt_rarp_t_sender_ha_set,
+    bcmpkt_rarp_t_sender_ip_set,
+    bcmpkt_rarp_t_target_ha_set,
+    bcmpkt_rarp_t_target_ip_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_rarp_t_field_data[] = {
+    BCM56880_A0_NFA_2_1_7_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_rarp_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RARP_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_2_1_7_0_rarp_t_field_data,
+};
+
+
+static int32_t bcmpkt_routing_t_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_routing_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_routing_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_segments_left_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_segments_left_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_routing_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_ROUTING_T_FID_COUNT] = {
+    bcmpkt_routing_t_data_get,
+    bcmpkt_routing_t_hdr_ext_len_get,
+    bcmpkt_routing_t_next_header_get,
+    bcmpkt_routing_t_routing_type_get,
+    bcmpkt_routing_t_segments_left_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_routing_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_ROUTING_T_FID_COUNT] = {
+    bcmpkt_routing_t_data_set,
+    bcmpkt_routing_t_hdr_ext_len_set,
+    bcmpkt_routing_t_next_header_set,
+    bcmpkt_routing_t_routing_type_set,
+    bcmpkt_routing_t_segments_left_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_routing_t_field_data[] = {
+    BCM56880_A0_NFA_2_1_7_0_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_routing_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_ROUTING_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_2_1_7_0_routing_t_field_data,
+};
+
+
+static int32_t bcmpkt_rspan_t_tag_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rspan_t_tag_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rspan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rspan_t_tpid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_rspan_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_RSPAN_T_FID_COUNT] = {
+    bcmpkt_rspan_t_tag_get,
+    bcmpkt_rspan_t_tpid_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_rspan_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_RSPAN_T_FID_COUNT] = {
+    bcmpkt_rspan_t_tag_set,
+    bcmpkt_rspan_t_tpid_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_rspan_t_field_data[] = {
+    BCM56880_A0_NFA_2_1_7_0_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_rspan_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_RSPAN_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_2_1_7_0_rspan_t_field_data,
+};
+
+
+static int32_t bcmpkt_sflow_shim_0_t_sys_destination_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_0_t_sys_destination_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_0_t_sys_source_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_0_t_sys_source_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_0_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_0_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_sflow_shim_0_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = {
+    bcmpkt_sflow_shim_0_t_sys_destination_get,
+    bcmpkt_sflow_shim_0_t_sys_source_get,
+    bcmpkt_sflow_shim_0_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_sflow_shim_0_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = {
+    bcmpkt_sflow_shim_0_t_sys_destination_set,
+    bcmpkt_sflow_shim_0_t_sys_source_set,
+    bcmpkt_sflow_shim_0_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_sflow_shim_0_t_field_data[] = {
+    BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_sflow_shim_0_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_2_1_7_0_sflow_shim_0_t_field_data,
+};
+
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_dest_sample_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 30, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_dest_sample_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 30, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_discarded_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 27, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_discarded_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 27, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_flex_sample_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 29, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_flex_sample_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 29, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_mcast_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_mcast_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_src_sample_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 31, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_src_sample_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 31, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_truncated_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 26, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_truncated_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 26, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 7);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 7, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 23, 3);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 23, 3, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_sflow_shim_1_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = {
+    bcmpkt_sflow_shim_1_t_flag_dest_sample_get,
+    bcmpkt_sflow_shim_1_t_flag_discarded_get,
+    bcmpkt_sflow_shim_1_t_flag_flex_sample_get,
+    bcmpkt_sflow_shim_1_t_flag_mcast_get,
+    bcmpkt_sflow_shim_1_t_flag_src_sample_get,
+    bcmpkt_sflow_shim_1_t_flag_truncated_get,
+    bcmpkt_sflow_shim_1_t_reserved_get,
+    bcmpkt_sflow_shim_1_t_sys_opcode_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_sflow_shim_1_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = {
+    bcmpkt_sflow_shim_1_t_flag_dest_sample_set,
+    bcmpkt_sflow_shim_1_t_flag_discarded_set,
+    bcmpkt_sflow_shim_1_t_flag_flex_sample_set,
+    bcmpkt_sflow_shim_1_t_flag_mcast_set,
+    bcmpkt_sflow_shim_1_t_flag_src_sample_set,
+    bcmpkt_sflow_shim_1_t_flag_truncated_set,
+    bcmpkt_sflow_shim_1_t_reserved_set,
+    bcmpkt_sflow_shim_1_t_sys_opcode_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_sflow_shim_1_t_field_data[] = {
+    BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_sflow_shim_1_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_2_1_7_0_sflow_shim_1_t_field_data,
+};
+
+
+static int32_t bcmpkt_sflow_shim_2_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_2_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_sflow_shim_2_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = {
+    bcmpkt_sflow_shim_2_t_sequence_num_get,
+    bcmpkt_sflow_shim_2_t_user_meta_data_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_sflow_shim_2_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = {
+    bcmpkt_sflow_shim_2_t_sequence_num_set,
+    bcmpkt_sflow_shim_2_t_user_meta_data_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_sflow_shim_2_t_field_data[] = {
+    BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_sflow_shim_2_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_2_1_7_0_sflow_shim_2_t_field_data,
+};
+
+
+static int32_t bcmpkt_snap_llc_t_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_snap_llc_t_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_snap_llc_t_snap_llc_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_snap_llc_t_snap_llc_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_snap_llc_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_SNAP_LLC_T_FID_COUNT] = {
+    bcmpkt_snap_llc_t_length_get,
+    bcmpkt_snap_llc_t_snap_llc_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_snap_llc_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_SNAP_LLC_T_FID_COUNT] = {
+    bcmpkt_snap_llc_t_length_set,
+    bcmpkt_snap_llc_t_snap_llc_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_snap_llc_t_field_data[] = {
+    BCM56880_A0_NFA_2_1_7_0_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_snap_llc_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_SNAP_LLC_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_2_1_7_0_snap_llc_t_field_data,
+};
+
+
+static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_first_4bytes_t_src_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_first_4bytes_t_src_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_tcp_first_4bytes_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = {
+    bcmpkt_tcp_first_4bytes_t_dst_port_get,
+    bcmpkt_tcp_first_4bytes_t_src_port_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_tcp_first_4bytes_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = {
+    bcmpkt_tcp_first_4bytes_t_dst_port_set,
+    bcmpkt_tcp_first_4bytes_t_src_port_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_tcp_first_4bytes_t_field_data[] = {
+    BCM56880_A0_NFA_2_1_7_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_tcp_first_4bytes_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_2_1_7_0_tcp_first_4bytes_t_field_data,
+};
+
+
+static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_win_size_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_win_size_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_tcp_last_16bytes_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = {
+    bcmpkt_tcp_last_16bytes_t_ack_num_get,
+    bcmpkt_tcp_last_16bytes_t_checksum_get,
+    bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get,
+    bcmpkt_tcp_last_16bytes_t_seq_num_get,
+    bcmpkt_tcp_last_16bytes_t_urgent_ptr_get,
+    bcmpkt_tcp_last_16bytes_t_win_size_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_tcp_last_16bytes_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = {
+    bcmpkt_tcp_last_16bytes_t_ack_num_set,
+    bcmpkt_tcp_last_16bytes_t_checksum_set,
+    bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set,
+    bcmpkt_tcp_last_16bytes_t_seq_num_set,
+    bcmpkt_tcp_last_16bytes_t_urgent_ptr_set,
+    bcmpkt_tcp_last_16bytes_t_win_size_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_tcp_last_16bytes_t_field_data[] = {
+    BCM56880_A0_NFA_2_1_7_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_tcp_last_16bytes_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_2_1_7_0_tcp_last_16bytes_t_field_data,
+};
+
+
+static int32_t bcmpkt_udp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_dst_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_src_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_src_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_udp_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_udp_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_udp_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_UDP_T_FID_COUNT] = {
+    bcmpkt_udp_t_checksum_get,
+    bcmpkt_udp_t_dst_port_get,
+    bcmpkt_udp_t_src_port_get,
+    bcmpkt_udp_t_udp_length_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_udp_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_UDP_T_FID_COUNT] = {
+    bcmpkt_udp_t_checksum_set,
+    bcmpkt_udp_t_dst_port_set,
+    bcmpkt_udp_t_src_port_set,
+    bcmpkt_udp_t_udp_length_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_udp_t_field_data[] = {
+    BCM56880_A0_NFA_2_1_7_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_udp_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_UDP_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_2_1_7_0_udp_t_field_data,
+};
+
+
+static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_unknown_l3_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = {
+    bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get,
+    bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_unknown_l3_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = {
+    bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set,
+    bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_unknown_l3_t_field_data[] = {
+    BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_unknown_l3_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_2_1_7_0_unknown_l3_t_field_data,
+};
+
+
+static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_unknown_l4_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = {
+    bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_unknown_l4_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = {
+    bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_unknown_l4_t_field_data[] = {
+    BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_unknown_l4_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_2_1_7_0_unknown_l4_t_field_data,
+};
+
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_unknown_l5_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = {
+    bcmpkt_unknown_l5_t_l5_bytes_0_1_get,
+    bcmpkt_unknown_l5_t_l5_bytes_2_3_get,
+    bcmpkt_unknown_l5_t_l5_bytes_4_7_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_unknown_l5_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = {
+    bcmpkt_unknown_l5_t_l5_bytes_0_1_set,
+    bcmpkt_unknown_l5_t_l5_bytes_2_3_set,
+    bcmpkt_unknown_l5_t_l5_bytes_4_7_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_unknown_l5_t_field_data[] = {
+    BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_unknown_l5_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_2_1_7_0_unknown_l5_t_field_data,
+};
+
+
+static int32_t bcmpkt_vlan_t_cfi_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 12, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_cfi_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 12, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_pcp_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 13, 3);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_pcp_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 13, 3, val);
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_tpid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_vid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 12);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_vid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 12, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_vlan_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_VLAN_T_FID_COUNT] = {
+    bcmpkt_vlan_t_cfi_get,
+    bcmpkt_vlan_t_pcp_get,
+    bcmpkt_vlan_t_tpid_get,
+    bcmpkt_vlan_t_vid_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_vlan_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_VLAN_T_FID_COUNT] = {
+    bcmpkt_vlan_t_cfi_set,
+    bcmpkt_vlan_t_pcp_set,
+    bcmpkt_vlan_t_tpid_set,
+    bcmpkt_vlan_t_vid_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_vlan_t_field_data[] = {
+    BCM56880_A0_NFA_2_1_7_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_vlan_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_VLAN_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_2_1_7_0_vlan_t_field_data,
+};
+
+
+static int32_t bcmpkt_vntag_t_tag_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_vntag_t_tag_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_vntag_t_tpid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vntag_t_tpid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_vntag_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_VNTAG_T_FID_COUNT] = {
+    bcmpkt_vntag_t_tag_get,
+    bcmpkt_vntag_t_tpid_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_vntag_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_VNTAG_T_FID_COUNT] = {
+    bcmpkt_vntag_t_tag_set,
+    bcmpkt_vntag_t_tpid_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_vntag_t_field_data[] = {
+    BCM56880_A0_NFA_2_1_7_0_BCMPKT_VNTAG_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_vntag_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_VNTAG_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_2_1_7_0_vntag_t_field_data,
+};
+
+
+static int32_t bcmpkt_vxlan_t_flags_reserved_1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_vxlan_t_flags_reserved_1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_vxlan_t_vn_id_lower_reserved2_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vxlan_t_vn_id_lower_reserved2_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_vxlan_t_vn_id_upper_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vxlan_t_vn_id_upper_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_vxlan_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_VXLAN_T_FID_COUNT] = {
+    bcmpkt_vxlan_t_flags_reserved_1_get,
+    bcmpkt_vxlan_t_vn_id_lower_reserved2_get,
+    bcmpkt_vxlan_t_vn_id_upper_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_vxlan_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_VXLAN_T_FID_COUNT] = {
+    bcmpkt_vxlan_t_flags_reserved_1_set,
+    bcmpkt_vxlan_t_vn_id_lower_reserved2_set,
+    bcmpkt_vxlan_t_vn_id_upper_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_vxlan_t_field_data[] = {
+    BCM56880_A0_NFA_2_1_7_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_vxlan_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_VXLAN_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_2_1_7_0_vxlan_t_field_data,
+};
+
+
+static int32_t bcmpkt_wesp_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_header_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_header_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_spi_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_spi_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_trailer_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_trailer_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_wesp_iv_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_wesp_iv_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56880_a0_nfa_2_1_7_0_wesp_t_fget[BCM56880_A0_NFA_2_1_7_0_BCMPKT_WESP_T_FID_COUNT] = {
+    bcmpkt_wesp_t_flags_get,
+    bcmpkt_wesp_t_header_len_get,
+    bcmpkt_wesp_t_next_header_get,
+    bcmpkt_wesp_t_seq_num_get,
+    bcmpkt_wesp_t_spi_get,
+    bcmpkt_wesp_t_trailer_len_get,
+    bcmpkt_wesp_t_wesp_iv_get,
+};
+
+bcmpkt_flex_field_set_f bcm56880_a0_nfa_2_1_7_0_wesp_t_fset[BCM56880_A0_NFA_2_1_7_0_BCMPKT_WESP_T_FID_COUNT] = {
+    bcmpkt_wesp_t_flags_set,
+    bcmpkt_wesp_t_header_len_set,
+    bcmpkt_wesp_t_next_header_set,
+    bcmpkt_wesp_t_seq_num_set,
+    bcmpkt_wesp_t_spi_set,
+    bcmpkt_wesp_t_trailer_len_set,
+    bcmpkt_wesp_t_wesp_iv_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_2_1_7_0_wesp_t_field_data[] = {
+    BCM56880_A0_NFA_2_1_7_0_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56880_a0_nfa_2_1_7_0_wesp_t_field_info = {
+    .num_fields = BCM56880_A0_NFA_2_1_7_0_BCMPKT_WESP_T_FID_COUNT,
+    .info = bcm56880_a0_nfa_2_1_7_0_wesp_t_field_data,
+};
+
+static bcmpkt_flex_pmd_info_t bcm56880_a0_nfa_2_1_7_0_flexhdr_info_list[BCM56880_A0_NFA_2_1_7_0_BCMPKT_FLEXHDR_COUNT] = {
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_2_1_7_0_arp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_2_1_7_0_arp_t_fget,
+        .flex_fset = bcm56880_a0_nfa_2_1_7_0_arp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_2_1_7_0_authen_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_2_1_7_0_authen_t_fget,
+        .flex_fset = bcm56880_a0_nfa_2_1_7_0_authen_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_2_1_7_0_bfd_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_2_1_7_0_bfd_t_fget,
+        .flex_fset = bcm56880_a0_nfa_2_1_7_0_bfd_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_2_1_7_0_cpu_composites_0_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_2_1_7_0_cpu_composites_0_t_fget,
+        .flex_fset = bcm56880_a0_nfa_2_1_7_0_cpu_composites_0_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_2_1_7_0_cpu_composites_1_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_2_1_7_0_cpu_composites_1_t_fget,
+        .flex_fset = bcm56880_a0_nfa_2_1_7_0_cpu_composites_1_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_2_1_7_0_dest_option_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_2_1_7_0_dest_option_t_fget,
+        .flex_fset = bcm56880_a0_nfa_2_1_7_0_dest_option_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_2_1_7_0_erspan3_fixed_hdr_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_2_1_7_0_erspan3_fixed_hdr_t_fget,
+        .flex_fset = bcm56880_a0_nfa_2_1_7_0_erspan3_fixed_hdr_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_2_1_7_0_erspan3_subhdr_5_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_2_1_7_0_erspan3_subhdr_5_t_fget,
+        .flex_fset = bcm56880_a0_nfa_2_1_7_0_erspan3_subhdr_5_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_2_1_7_0_esp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_2_1_7_0_esp_t_fget,
+        .flex_fset = bcm56880_a0_nfa_2_1_7_0_esp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_2_1_7_0_etag_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_2_1_7_0_etag_t_fget,
+        .flex_fset = bcm56880_a0_nfa_2_1_7_0_etag_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_2_1_7_0_ethertype_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_2_1_7_0_ethertype_t_fget,
+        .flex_fset = bcm56880_a0_nfa_2_1_7_0_ethertype_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_2_1_7_0_frag_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_2_1_7_0_frag_t_fget,
+        .flex_fset = bcm56880_a0_nfa_2_1_7_0_frag_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_2_1_7_0_generic_loopback_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_2_1_7_0_generic_loopback_t_fget,
+        .flex_fset = bcm56880_a0_nfa_2_1_7_0_generic_loopback_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_2_1_7_0_gpe_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_2_1_7_0_gpe_t_fget,
+        .flex_fset = bcm56880_a0_nfa_2_1_7_0_gpe_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_2_1_7_0_gre_chksum_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_2_1_7_0_gre_chksum_t_fget,
+        .flex_fset = bcm56880_a0_nfa_2_1_7_0_gre_chksum_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_2_1_7_0_gre_key_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_2_1_7_0_gre_key_t_fget,
+        .flex_fset = bcm56880_a0_nfa_2_1_7_0_gre_key_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_2_1_7_0_gre_rout_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_2_1_7_0_gre_rout_t_fget,
+        .flex_fset = bcm56880_a0_nfa_2_1_7_0_gre_rout_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_2_1_7_0_gre_seq_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_2_1_7_0_gre_seq_t_fget,
+        .flex_fset = bcm56880_a0_nfa_2_1_7_0_gre_seq_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_2_1_7_0_gre_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_2_1_7_0_gre_t_fget,
+        .flex_fset = bcm56880_a0_nfa_2_1_7_0_gre_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_2_1_7_0_gtp_12byte_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_2_1_7_0_gtp_12byte_t_fget,
+        .flex_fset = bcm56880_a0_nfa_2_1_7_0_gtp_12byte_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_2_1_7_0_gtp_8byte_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_2_1_7_0_gtp_8byte_t_fget,
+        .flex_fset = bcm56880_a0_nfa_2_1_7_0_gtp_8byte_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_2_1_7_0_hop_by_hop_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_2_1_7_0_hop_by_hop_t_fget,
+        .flex_fset = bcm56880_a0_nfa_2_1_7_0_hop_by_hop_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_2_1_7_0_icmp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_2_1_7_0_icmp_t_fget,
+        .flex_fset = bcm56880_a0_nfa_2_1_7_0_icmp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_2_1_7_0_igmp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_2_1_7_0_igmp_t_fget,
+        .flex_fset = bcm56880_a0_nfa_2_1_7_0_igmp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_2_1_7_0_ipfix_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_2_1_7_0_ipfix_t_fget,
+        .flex_fset = bcm56880_a0_nfa_2_1_7_0_ipfix_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_2_1_7_0_ipv4_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_2_1_7_0_ipv4_t_fget,
+        .flex_fset = bcm56880_a0_nfa_2_1_7_0_ipv4_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_2_1_7_0_ipv6_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_2_1_7_0_ipv6_t_fget,
+        .flex_fset = bcm56880_a0_nfa_2_1_7_0_ipv6_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_2_1_7_0_l2_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_2_1_7_0_l2_t_fget,
+        .flex_fset = bcm56880_a0_nfa_2_1_7_0_l2_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_2_1_7_0_mirror_erspan_sn_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_2_1_7_0_mirror_erspan_sn_t_fget,
+        .flex_fset = bcm56880_a0_nfa_2_1_7_0_mirror_erspan_sn_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_2_1_7_0_mirror_transport_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_2_1_7_0_mirror_transport_t_fget,
+        .flex_fset = bcm56880_a0_nfa_2_1_7_0_mirror_transport_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_2_1_7_0_mpls_ach_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_2_1_7_0_mpls_ach_t_fget,
+        .flex_fset = bcm56880_a0_nfa_2_1_7_0_mpls_ach_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_2_1_7_0_mpls_bv_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_2_1_7_0_mpls_bv_t_fget,
+        .flex_fset = bcm56880_a0_nfa_2_1_7_0_mpls_bv_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_2_1_7_0_mpls_cw_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_2_1_7_0_mpls_cw_t_fget,
+        .flex_fset = bcm56880_a0_nfa_2_1_7_0_mpls_cw_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_2_1_7_0_mpls_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_2_1_7_0_mpls_t_fget,
+        .flex_fset = bcm56880_a0_nfa_2_1_7_0_mpls_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_2_1_7_0_opaquetag_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_2_1_7_0_opaquetag_t_fget,
+        .flex_fset = bcm56880_a0_nfa_2_1_7_0_opaquetag_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_2_1_7_0_p_1588_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_2_1_7_0_p_1588_t_fget,
+        .flex_fset = bcm56880_a0_nfa_2_1_7_0_p_1588_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_2_1_7_0_prog_ext_hdr_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_2_1_7_0_prog_ext_hdr_t_fget,
+        .flex_fset = bcm56880_a0_nfa_2_1_7_0_prog_ext_hdr_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_2_1_7_0_psamp_0_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_2_1_7_0_psamp_0_t_fget,
+        .flex_fset = bcm56880_a0_nfa_2_1_7_0_psamp_0_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_2_1_7_0_psamp_1_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_2_1_7_0_psamp_1_t_fget,
+        .flex_fset = bcm56880_a0_nfa_2_1_7_0_psamp_1_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_2_1_7_0_psamp_mirror_on_drop_0_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_2_1_7_0_psamp_mirror_on_drop_0_t_fget,
+        .flex_fset = bcm56880_a0_nfa_2_1_7_0_psamp_mirror_on_drop_0_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_2_1_7_0_psamp_mirror_on_drop_1_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_2_1_7_0_psamp_mirror_on_drop_1_t_fget,
+        .flex_fset = bcm56880_a0_nfa_2_1_7_0_psamp_mirror_on_drop_1_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_2_1_7_0_rarp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_2_1_7_0_rarp_t_fget,
+        .flex_fset = bcm56880_a0_nfa_2_1_7_0_rarp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_2_1_7_0_routing_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_2_1_7_0_routing_t_fget,
+        .flex_fset = bcm56880_a0_nfa_2_1_7_0_routing_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_2_1_7_0_rspan_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_2_1_7_0_rspan_t_fget,
+        .flex_fset = bcm56880_a0_nfa_2_1_7_0_rspan_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_2_1_7_0_sflow_shim_0_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_2_1_7_0_sflow_shim_0_t_fget,
+        .flex_fset = bcm56880_a0_nfa_2_1_7_0_sflow_shim_0_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_2_1_7_0_sflow_shim_1_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_2_1_7_0_sflow_shim_1_t_fget,
+        .flex_fset = bcm56880_a0_nfa_2_1_7_0_sflow_shim_1_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_2_1_7_0_sflow_shim_2_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_2_1_7_0_sflow_shim_2_t_fget,
+        .flex_fset = bcm56880_a0_nfa_2_1_7_0_sflow_shim_2_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_2_1_7_0_snap_llc_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_2_1_7_0_snap_llc_t_fget,
+        .flex_fset = bcm56880_a0_nfa_2_1_7_0_snap_llc_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_2_1_7_0_tcp_first_4bytes_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_2_1_7_0_tcp_first_4bytes_t_fget,
+        .flex_fset = bcm56880_a0_nfa_2_1_7_0_tcp_first_4bytes_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_2_1_7_0_tcp_last_16bytes_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_2_1_7_0_tcp_last_16bytes_t_fget,
+        .flex_fset = bcm56880_a0_nfa_2_1_7_0_tcp_last_16bytes_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_2_1_7_0_udp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_2_1_7_0_udp_t_fget,
+        .flex_fset = bcm56880_a0_nfa_2_1_7_0_udp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_2_1_7_0_unknown_l3_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_2_1_7_0_unknown_l3_t_fget,
+        .flex_fset = bcm56880_a0_nfa_2_1_7_0_unknown_l3_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_2_1_7_0_unknown_l4_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_2_1_7_0_unknown_l4_t_fget,
+        .flex_fset = bcm56880_a0_nfa_2_1_7_0_unknown_l4_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_2_1_7_0_unknown_l5_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_2_1_7_0_unknown_l5_t_fget,
+        .flex_fset = bcm56880_a0_nfa_2_1_7_0_unknown_l5_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_2_1_7_0_vlan_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_2_1_7_0_vlan_t_fget,
+        .flex_fset = bcm56880_a0_nfa_2_1_7_0_vlan_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_2_1_7_0_vntag_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_2_1_7_0_vntag_t_fget,
+        .flex_fset = bcm56880_a0_nfa_2_1_7_0_vntag_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_2_1_7_0_vxlan_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_2_1_7_0_vxlan_t_fget,
+        .flex_fset = bcm56880_a0_nfa_2_1_7_0_vxlan_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_2_1_7_0_wesp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56880_a0_nfa_2_1_7_0_wesp_t_fget,
+        .flex_fset = bcm56880_a0_nfa_2_1_7_0_wesp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56880_a0_nfa_2_1_7_0_rxpmd_flex_field_info,
+        .reasons_info = &bcm56880_a0_nfa_2_1_7_0_rxpmd_flex_reasons_info,
+        .flex_common_fget = bcm56880_a0_rxpmd_flex_fget,
+        .flex_common_fset = bcm56880_a0_rxpmd_flex_fset,
+    },
+};
+
+static shr_enum_map_t bcm56880_a0_nfa_2_1_7_0_flexhdr_id_map[] = {
+    BCM56880_A0_NFA_2_1_7_0_BCMPKT_FLEXHDR_NAME_MAP_INIT
+};
+
+shr_enum_map_t * bcm56880_a0_nfa_2_1_7_0_flexhdr_map_get(void)
+{
+    return bcm56880_a0_nfa_2_1_7_0_flexhdr_id_map;
+}
+
+bcmpkt_flex_pmd_info_t * bcm56880_a0_nfa_2_1_7_0_flex_pmd_info_get(uint32_t hid)
+{
+    if (hid >= BCM56880_A0_NFA_2_1_7_0_BCMPKT_FLEXHDR_COUNT) {
+        return NULL;
+    }
+
+    return &bcm56880_a0_nfa_2_1_7_0_flexhdr_info_list[hid];
+}
+
+int bcm56880_a0_nfa_2_1_7_0_flexhdr_variant_support_map[BCMPKT_PMD_COUNT] = {
+    12,
+    -1,
+    -1,
+    58,
+};
\ No newline at end of file
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_bcmpkt_rxpmd_match_id.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_bcmpkt_rxpmd_match_id.c
new file mode 100644
index 000000000..8713e3347
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_bcmpkt_rxpmd_match_id.c
@@ -0,0 +1,1443 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) bcm56890_a0_cna_6_5_29_sf_match_id_info.yml
+ * for device bcm56890_a0 and variant cna_6_5_29.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+
+#include <bcmpkt/bcmpkt_rxpmd_match_id.h>
+#include <bcmpkt/xfcr/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_bcmpkt_rxpmd_match_id_defs.h>
+
+static uint32_t bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_inner_l2_hdr_itag[1] =
+{
+    0x8,
+};
+
+static uint32_t bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_inner_l2_hdr_l2[1] =
+{
+    0xe,
+};
+
+static uint32_t bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_inner_l2_hdr_otag[1] =
+{
+    0xc,
+};
+
+static uint32_t bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_arp[1] =
+{
+    0x4,
+};
+
+static uint32_t bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ethertype[1] =
+{
+    0x7fffe,
+};
+
+static uint32_t bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_icmp[1] =
+{
+    0x810,
+};
+
+static uint32_t bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv4[1] =
+{
+    0x3f8,
+};
+
+static uint32_t bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv6[1] =
+{
+    0x1fc00,
+};
+
+static uint32_t bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rarp[1] =
+{
+    0x20000,
+};
+
+static uint32_t bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_first_4bytes[1] =
+{
+    0x3060,
+};
+
+static uint32_t bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_last_16bytes[1] =
+{
+    0x2040,
+};
+
+static uint32_t bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_udp[1] =
+{
+    0xc180,
+};
+
+static uint32_t bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l3[1] =
+{
+    0x40000,
+};
+
+static uint32_t bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l4[1] =
+{
+    0x10200,
+};
+
+static uint32_t bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l5[1] =
+{
+    0x8100,
+};
+
+static uint32_t bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_outer_l2_hdr_itag[1] =
+{
+    0x28,
+};
+
+static uint32_t bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_outer_l2_hdr_l2[1] =
+{
+    0x3e,
+};
+
+static uint32_t bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_outer_l2_hdr_otag[1] =
+{
+    0x30,
+};
+
+static uint32_t bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_arp[1] =
+{
+    0x4,
+};
+
+static uint32_t bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ethertype[1] =
+{
+    0x1ffffe,
+};
+
+static uint32_t bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_icmp[1] =
+{
+    0x1010,
+};
+
+static uint32_t bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv4[1] =
+{
+    0x7f8,
+};
+
+static uint32_t bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv6[1] =
+{
+    0x7f800,
+};
+
+static uint32_t bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rarp[1] =
+{
+    0x80000,
+};
+
+static uint32_t bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_first_4bytes[1] =
+{
+    0x6060,
+};
+
+static uint32_t bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_last_16bytes[1] =
+{
+    0x4040,
+};
+
+static uint32_t bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_udp[1] =
+{
+    0x38380,
+};
+
+static uint32_t bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l3[1] =
+{
+    0x100000,
+};
+
+static uint32_t bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l4[1] =
+{
+    0x40400,
+};
+
+static uint32_t bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l5[1] =
+{
+    0x10100,
+};
+
+static uint32_t bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_vxlan[1] =
+{
+    0x20200,
+};
+
+static uint32_t bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_sys_hdr_ep_nih[1] =
+{
+    0x4,
+};
+
+static uint32_t bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_sys_hdr_loopback[1] =
+{
+    0x8,
+};
+
+
+static bcmpkt_rxpmd_match_id_db_t
+bcm56890_a0_cna_6_5_29_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_COUNT] = {
+    {
+        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_ITAG",
+        .match        = 0x2,
+        .match_mask   = 0x2,
+        .match_maxbit = 14,
+        .match_minbit = 12,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 14,
+        .pminbit      = 12,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_L2",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 14,
+        .match_minbit = 12,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 14,
+        .pminbit      = 12,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x7,
+        .match_maxbit = 14,
+        .match_minbit = 12,
+        .maxbit       = 2,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 14,
+        .pminbit      = 12,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_OTAG",
+        .match        = 0x4,
+        .match_mask   = 0x4,
+        .match_maxbit = 14,
+        .match_minbit = 12,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 14,
+        .pminbit      = 12,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ARP",
+        .match        = 0x20,
+        .match_mask   = 0x66,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 21,
+        .pminbit      = 15,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 21,
+        .pminbit      = 15,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ICMP",
+        .match        = 0x40,
+        .match_mask   = 0x66,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x2,
+        .pmaxbit      = 21,
+        .pminbit      = 15,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IPV4",
+        .match        = 0x8,
+        .match_mask   = 0x18,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 21,
+        .pminbit      = 15,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IPV6",
+        .match        = 0x10,
+        .match_mask   = 0x18,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x2,
+        .pmaxbit      = 21,
+        .pminbit      = 15,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x7f,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 6,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 21,
+        .pminbit      = 15,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_RARP",
+        .match        = 0x2,
+        .match_mask   = 0x6,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 21,
+        .pminbit      = 15,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES",
+        .match        = 0x4,
+        .match_mask   = 0x6,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x2,
+        .pmaxbit      = 21,
+        .pminbit      = 15,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES",
+        .match        = 0x24,
+        .match_mask   = 0x66,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 21,
+        .pminbit      = 15,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UDP",
+        .match        = 0x6,
+        .match_mask   = 0x6,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x3,
+        .pmaxbit      = 21,
+        .pminbit      = 15,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3",
+        .match        = 0x18,
+        .match_mask   = 0x18,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x3,
+        .pmaxbit      = 21,
+        .pminbit      = 15,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4",
+        .match        = 0x60,
+        .match_mask   = 0x60,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x3,
+        .pmaxbit      = 21,
+        .pminbit      = 15,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5",
+        .match        = 0x46,
+        .match_mask   = 0x66,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x2,
+        .pmaxbit      = 21,
+        .pminbit      = 15,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_VXLAN",
+        .match        = 0x26,
+        .match_mask   = 0x66,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 21,
+        .pminbit      = 15,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH */
+        .name         = "EGRESS_PKT_SYS_HDR_EP_NIH",
+        .match        = 0x2,
+        .match_mask   = 0x3,
+        .match_maxbit = 1,
+        .match_minbit = 0,
+        .maxbit       = 1,
+        .minbit       = 0,
+        .value        = 0x2,
+        .pmaxbit      = 1,
+        .pminbit      = 0,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK */
+        .name         = "EGRESS_PKT_SYS_HDR_LOOPBACK",
+        .match        = 0x1,
+        .match_mask   = 0x3,
+        .match_maxbit = 1,
+        .match_minbit = 0,
+        .maxbit       = 1,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 1,
+        .pminbit      = 0,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE */
+        .name         = "EGRESS_PKT_SYS_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x3,
+        .match_maxbit = 1,
+        .match_minbit = 0,
+        .maxbit       = 1,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 1,
+        .pminbit      = 0,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_ITAG",
+        .match        = 0x2,
+        .match_mask   = 0x2,
+        .match_maxbit = 4,
+        .match_minbit = 2,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 4,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_L2",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 4,
+        .match_minbit = 2,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 4,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x7,
+        .match_maxbit = 4,
+        .match_minbit = 2,
+        .maxbit       = 2,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 4,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_OTAG",
+        .match        = 0x4,
+        .match_mask   = 0x4,
+        .match_maxbit = 4,
+        .match_minbit = 2,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 4,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP",
+        .match        = 0x20,
+        .match_mask   = 0x66,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 11,
+        .pminbit      = 5,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 11,
+        .pminbit      = 5,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP",
+        .match        = 0x40,
+        .match_mask   = 0x66,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x2,
+        .pmaxbit      = 11,
+        .pminbit      = 5,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4",
+        .match        = 0x8,
+        .match_mask   = 0x18,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 11,
+        .pminbit      = 5,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6",
+        .match        = 0x10,
+        .match_mask   = 0x18,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x2,
+        .pmaxbit      = 11,
+        .pminbit      = 5,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x7f,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 6,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 11,
+        .pminbit      = 5,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP",
+        .match        = 0x2,
+        .match_mask   = 0x6,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 11,
+        .pminbit      = 5,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES",
+        .match        = 0x4,
+        .match_mask   = 0x6,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x2,
+        .pmaxbit      = 11,
+        .pminbit      = 5,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES",
+        .match        = 0x24,
+        .match_mask   = 0x66,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 11,
+        .pminbit      = 5,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP",
+        .match        = 0x6,
+        .match_mask   = 0x6,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x3,
+        .pmaxbit      = 11,
+        .pminbit      = 5,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3",
+        .match        = 0x18,
+        .match_mask   = 0x18,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x3,
+        .pmaxbit      = 11,
+        .pminbit      = 5,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4",
+        .match        = 0x60,
+        .match_mask   = 0x60,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x3,
+        .pmaxbit      = 11,
+        .pminbit      = 5,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5",
+        .match        = 0x46,
+        .match_mask   = 0x66,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x2,
+        .pmaxbit      = 11,
+        .pminbit      = 5,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN",
+        .match        = 0x26,
+        .match_mask   = 0x66,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 11,
+        .pminbit      = 5,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_ITAG",
+        .match        = 0x2,
+        .match_mask   = 0x2,
+        .match_maxbit = 14,
+        .match_minbit = 12,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 14,
+        .pminbit      = 12,
+        .zone_minbit  = 10,
+        .arc_id_mask  = 0xc00,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_inner_l2_hdr_itag,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_L2",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 14,
+        .match_minbit = 12,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 14,
+        .pminbit      = 12,
+        .zone_minbit  = 10,
+        .arc_id_mask  = 0xc00,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_inner_l2_hdr_l2,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x7,
+        .match_maxbit = 14,
+        .match_minbit = 12,
+        .maxbit       = 2,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 14,
+        .pminbit      = 12,
+        .zone_minbit  = 10,
+        .arc_id_mask  = 0xc00,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_OTAG",
+        .match        = 0x4,
+        .match_mask   = 0x4,
+        .match_maxbit = 14,
+        .match_minbit = 12,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 14,
+        .pminbit      = 12,
+        .zone_minbit  = 10,
+        .arc_id_mask  = 0xc00,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_inner_l2_hdr_otag,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ARP",
+        .match        = 0x20,
+        .match_mask   = 0x66,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 21,
+        .pminbit      = 15,
+        .zone_minbit  = 12,
+        .arc_id_mask  = 0x1f000,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_arp,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 21,
+        .pminbit      = 15,
+        .zone_minbit  = 12,
+        .arc_id_mask  = 0x1f000,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ethertype,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ICMP",
+        .match        = 0x40,
+        .match_mask   = 0x66,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x2,
+        .pmaxbit      = 21,
+        .pminbit      = 15,
+        .zone_minbit  = 12,
+        .arc_id_mask  = 0x1f000,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_icmp,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IPV4",
+        .match        = 0x8,
+        .match_mask   = 0x18,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 21,
+        .pminbit      = 15,
+        .zone_minbit  = 12,
+        .arc_id_mask  = 0x1f000,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv4,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IPV6",
+        .match        = 0x10,
+        .match_mask   = 0x18,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x2,
+        .pmaxbit      = 21,
+        .pminbit      = 15,
+        .zone_minbit  = 12,
+        .arc_id_mask  = 0x1f000,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv6,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x7f,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 6,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 21,
+        .pminbit      = 15,
+        .zone_minbit  = 12,
+        .arc_id_mask  = 0x1f000,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_RARP",
+        .match        = 0x2,
+        .match_mask   = 0x6,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 21,
+        .pminbit      = 15,
+        .zone_minbit  = 12,
+        .arc_id_mask  = 0x1f000,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rarp,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES",
+        .match        = 0x4,
+        .match_mask   = 0x6,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x2,
+        .pmaxbit      = 21,
+        .pminbit      = 15,
+        .zone_minbit  = 12,
+        .arc_id_mask  = 0x1f000,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_first_4bytes,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES",
+        .match        = 0x24,
+        .match_mask   = 0x66,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 21,
+        .pminbit      = 15,
+        .zone_minbit  = 12,
+        .arc_id_mask  = 0x1f000,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_last_16bytes,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UDP",
+        .match        = 0x6,
+        .match_mask   = 0x6,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x3,
+        .pmaxbit      = 21,
+        .pminbit      = 15,
+        .zone_minbit  = 12,
+        .arc_id_mask  = 0x1f000,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_udp,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3",
+        .match        = 0x18,
+        .match_mask   = 0x18,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x3,
+        .pmaxbit      = 21,
+        .pminbit      = 15,
+        .zone_minbit  = 12,
+        .arc_id_mask  = 0x1f000,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l3,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4",
+        .match        = 0x60,
+        .match_mask   = 0x60,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x3,
+        .pmaxbit      = 21,
+        .pminbit      = 15,
+        .zone_minbit  = 12,
+        .arc_id_mask  = 0x1f000,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l4,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5",
+        .match        = 0x46,
+        .match_mask   = 0x66,
+        .match_maxbit = 21,
+        .match_minbit = 15,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x2,
+        .pmaxbit      = 21,
+        .pminbit      = 15,
+        .zone_minbit  = 12,
+        .arc_id_mask  = 0x1f000,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l5,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_ITAG",
+        .match        = 0x2,
+        .match_mask   = 0x2,
+        .match_maxbit = 4,
+        .match_minbit = 2,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 4,
+        .pminbit      = 2,
+        .zone_minbit  = 2,
+        .arc_id_mask  = 0x1c,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_outer_l2_hdr_itag,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_L2",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 4,
+        .match_minbit = 2,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 4,
+        .pminbit      = 2,
+        .zone_minbit  = 2,
+        .arc_id_mask  = 0x1c,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_outer_l2_hdr_l2,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x7,
+        .match_maxbit = 4,
+        .match_minbit = 2,
+        .maxbit       = 2,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 4,
+        .pminbit      = 2,
+        .zone_minbit  = 2,
+        .arc_id_mask  = 0x1c,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_OTAG",
+        .match        = 0x4,
+        .match_mask   = 0x4,
+        .match_maxbit = 4,
+        .match_minbit = 2,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 4,
+        .pminbit      = 2,
+        .zone_minbit  = 2,
+        .arc_id_mask  = 0x1c,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_outer_l2_hdr_otag,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ARP",
+        .match        = 0x20,
+        .match_mask   = 0x66,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 11,
+        .pminbit      = 5,
+        .zone_minbit  = 5,
+        .arc_id_mask  = 0x3e0,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_arp,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 11,
+        .pminbit      = 5,
+        .zone_minbit  = 5,
+        .arc_id_mask  = 0x3e0,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ethertype,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ICMP",
+        .match        = 0x40,
+        .match_mask   = 0x66,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x2,
+        .pmaxbit      = 11,
+        .pminbit      = 5,
+        .zone_minbit  = 5,
+        .arc_id_mask  = 0x3e0,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_icmp,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV4",
+        .match        = 0x8,
+        .match_mask   = 0x18,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 11,
+        .pminbit      = 5,
+        .zone_minbit  = 5,
+        .arc_id_mask  = 0x3e0,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv4,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV6",
+        .match        = 0x10,
+        .match_mask   = 0x18,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x2,
+        .pmaxbit      = 11,
+        .pminbit      = 5,
+        .zone_minbit  = 5,
+        .arc_id_mask  = 0x3e0,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv6,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x7f,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 6,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 11,
+        .pminbit      = 5,
+        .zone_minbit  = 5,
+        .arc_id_mask  = 0x3e0,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_RARP",
+        .match        = 0x2,
+        .match_mask   = 0x6,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 11,
+        .pminbit      = 5,
+        .zone_minbit  = 5,
+        .arc_id_mask  = 0x3e0,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rarp,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES",
+        .match        = 0x4,
+        .match_mask   = 0x6,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x2,
+        .pmaxbit      = 11,
+        .pminbit      = 5,
+        .zone_minbit  = 5,
+        .arc_id_mask  = 0x3e0,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_first_4bytes,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES",
+        .match        = 0x24,
+        .match_mask   = 0x66,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 11,
+        .pminbit      = 5,
+        .zone_minbit  = 5,
+        .arc_id_mask  = 0x3e0,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_last_16bytes,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UDP",
+        .match        = 0x6,
+        .match_mask   = 0x6,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x3,
+        .pmaxbit      = 11,
+        .pminbit      = 5,
+        .zone_minbit  = 5,
+        .arc_id_mask  = 0x3e0,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_udp,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3",
+        .match        = 0x18,
+        .match_mask   = 0x18,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x3,
+        .pmaxbit      = 11,
+        .pminbit      = 5,
+        .zone_minbit  = 5,
+        .arc_id_mask  = 0x3e0,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l3,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4",
+        .match        = 0x60,
+        .match_mask   = 0x60,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x3,
+        .pmaxbit      = 11,
+        .pminbit      = 5,
+        .zone_minbit  = 5,
+        .arc_id_mask  = 0x3e0,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l4,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5",
+        .match        = 0x46,
+        .match_mask   = 0x66,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x2,
+        .pmaxbit      = 11,
+        .pminbit      = 5,
+        .zone_minbit  = 5,
+        .arc_id_mask  = 0x3e0,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l5,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN",
+        .match        = 0x26,
+        .match_mask   = 0x66,
+        .match_maxbit = 11,
+        .match_minbit = 5,
+        .maxbit       = 6,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 11,
+        .pminbit      = 5,
+        .zone_minbit  = 5,
+        .arc_id_mask  = 0x3e0,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_vxlan,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH */
+        .name         = "INGRESS_PKT_SYS_HDR_EP_NIH",
+        .match        = 0x2,
+        .match_mask   = 0x3,
+        .match_maxbit = 1,
+        .match_minbit = 0,
+        .maxbit       = 1,
+        .minbit       = 0,
+        .value        = 0x2,
+        .pmaxbit      = 1,
+        .pminbit      = 0,
+        .zone_minbit  = 0,
+        .arc_id_mask  = 0x3,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_sys_hdr_ep_nih,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK */
+        .name         = "INGRESS_PKT_SYS_HDR_LOOPBACK",
+        .match        = 0x1,
+        .match_mask   = 0x3,
+        .match_maxbit = 1,
+        .match_minbit = 0,
+        .maxbit       = 1,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 1,
+        .pminbit      = 0,
+        .zone_minbit  = 0,
+        .arc_id_mask  = 0x3,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm56890_a0_cna_6_5_29_rxpmd_arc_ingress_pkt_sys_hdr_loopback,
+
+    },
+    {
+        /* BCM56890_A0_CNA_6_5_29_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE */
+        .name         = "INGRESS_PKT_SYS_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x3,
+        .match_maxbit = 1,
+        .match_minbit = 0,
+        .maxbit       = 1,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 1,
+        .pminbit      = 0,
+        .zone_minbit  = 0,
+        .arc_id_mask  = 0x3,
+
+    },
+};
+
+static bcmpkt_rxpmd_match_id_db_info_t bcm56890_a0_cna_6_5_29_rxpmd_match_id_db_info = {
+    .num_entries = 77,
+    .db = bcm56890_a0_cna_6_5_29_rxpmd_match_id_db
+};
+bcmpkt_rxpmd_match_id_db_info_t * bcm56890_a0_cna_6_5_29_rxpmd_match_id_db_info_get(void) {
+    return &bcm56890_a0_cna_6_5_29_rxpmd_match_id_db_info;
+}
+
+static shr_enum_map_t bcm56890_a0_cna_6_5_29_rxpmd_match_id_map[] = {
+    BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_rxpmd_match_id_map_info_t bcm56890_a0_cna_6_5_29_rxpmd_match_id_map_info = {
+    .num_entries = 77,
+    .map = bcm56890_a0_cna_6_5_29_rxpmd_match_id_map
+};
+
+bcmpkt_rxpmd_match_id_map_info_t * bcm56890_a0_cna_6_5_29_rxpmd_match_id_map_info_get(void) {
+    return &bcm56890_a0_cna_6_5_29_rxpmd_match_id_map_info;
+}
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_pkt_flexhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_pkt_flexhdr.c
new file mode 100644
index 000000000..0a040c82a
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_pkt_flexhdr.c
@@ -0,0 +1,4021 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) map.yml
+ * for device bcm56890_a0 and variant cna_6_5_29.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#include <sal/sal_types.h>
+#include <shr/shr_error.h>
+#include <bcmpkt/bcmpkt_flexhdr.h>
+#include <bcmpkt/chip/bcm56890_a0/bcmpkt_bcm56890_a0_rxpmd.h>
+#include <bcmpkt/xfcr/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_bcmpkt_flexhdr.h>
+#include <bcmpkt/xfcr/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_bcmpkt_flexhdr_data.h>
+#include <bcmpkt/xfcr/bcm56890_a0/cna_6_5_29/bcm56890_a0_cna_6_5_29_bcmpkt_rxpmd_flex_data.h>
+
+#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1)
+#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l))
+#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s)))
+#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s)))
+
+static void bcm56890_a0_cna_6_5_29_rxpmd_flex_reason_decode(uint32_t *data, bcmpkt_bitmap_t *reasons)
+{
+    uint32_t *reason = data + 0;
+
+    if (reason[13] & (0x1 << 0)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU);
+    }
+    if (reason[13] & (0x1 << 1)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS);
+    }
+    if (reason[13] & (0x1 << 2)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE);
+    }
+    if (reason[13] & (0x1 << 3)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD);
+    }
+    if (reason[13] & (0x1 << 4)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST);
+    }
+    if (reason[13] & (0x1 << 5)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED);
+    }
+    if (reason[13] & (0x1 << 6)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT);
+    }
+    if (reason[13] & (0x1 << 7)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED);
+    }
+    if (reason[13] & (0x1 << 8)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED);
+    }
+    if (reason[13] & (0x1 << 9)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS);
+    }
+    if (reason[13] & (0x1 << 10)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP);
+    }
+    if (reason[13] & (0x1 << 11)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS);
+    }
+    if (reason[13] & (0x1 << 12)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP);
+    }
+    if (reason[13] & (0x1 << 13)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR);
+    }
+    if (reason[13] & (0x1 << 14)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR);
+    }
+    if (reason[13] & (0x1 << 16)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL);
+    }
+    if (reason[13] & (0x1 << 17)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_VFP);
+    }
+    if (reason[13] & (0x1 << 18)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IFP);
+    }
+    if (reason[13] & (0x1 << 19)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IFP_METER);
+    }
+    if (reason[13] & (0x1 << 23)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IVXLT);
+    }
+    if (reason[12] & (0x1 << 15)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP);
+    }
+}
+
+static void bcm56890_a0_cna_6_5_29_rxpmd_flex_reason_encode(bcmpkt_bitmap_t *reasons, uint32_t *data)
+{
+    uint32_t *reason = data + 0;
+
+    reason[13] = 0;
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU)) {
+        reason[13] |= (0x1 << 0);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS)) {
+        reason[13] |= (0x1 << 1);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE)) {
+        reason[13] |= (0x1 << 2);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD)) {
+        reason[13] |= (0x1 << 3);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST)) {
+        reason[13] |= (0x1 << 4);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED)) {
+        reason[13] |= (0x1 << 5);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT)) {
+        reason[13] |= (0x1 << 6);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED)) {
+        reason[13] |= (0x1 << 7);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED)) {
+        reason[13] |= (0x1 << 8);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS)) {
+        reason[13] |= (0x1 << 9);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP)) {
+        reason[13] |= (0x1 << 10);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS)) {
+        reason[13] |= (0x1 << 11);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP)) {
+        reason[13] |= (0x1 << 12);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR)) {
+        reason[13] |= (0x1 << 13);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR)) {
+        reason[13] |= (0x1 << 14);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL)) {
+        reason[13] |= (0x1 << 16);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_VFP)) {
+        reason[13] |= (0x1 << 17);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IFP)) {
+        reason[13] |= (0x1 << 18);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IFP_METER)) {
+        reason[13] |= (0x1 << 19);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_IVXLT)) {
+        reason[13] |= (0x1 << 23);
+    }
+    reason[12] = 0;
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP)) {
+        reason[12] |= (0x1 << 15);
+    }
+}
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_rxpmd_flex_field_data[] = {
+    {
+        .name = "DROP_CODE_15_0",
+        .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 48, 63 }, /* Profile 2. */
+            { -1, -1 }, /* Profile 3. */
+            { 48, 63 }, /* Profile 4. */
+            { 48, 63 }, /* Profile 5. */
+            { -1, -1 }, /* Profile 6. */
+            { 48, 63 }, /* Profile 7. */
+        },
+        .profile_cnt = 8,
+    },
+    {
+        .name = "DVP_15_0",
+        .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_DVP_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 128, 143 }, /* Profile 2. */
+            { 112, 127 }, /* Profile 3. */
+            { 128, 143 }, /* Profile 4. */
+            { 112, 127 }, /* Profile 5. */
+            { 96, 111 }, /* Profile 6. */
+            { 112, 127 }, /* Profile 7. */
+        },
+        .profile_cnt = 8,
+    },
+    {
+        .name = "EFFECTIVE_TTL_7_0",
+        .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 336, 343 }, /* Profile 2. */
+            { 336, 343 }, /* Profile 3. */
+            { 336, 343 }, /* Profile 4. */
+            { 304, 311 }, /* Profile 5. */
+            { 304, 311 }, /* Profile 6. */
+            { 304, 311 }, /* Profile 7. */
+        },
+        .profile_cnt = 8,
+    },
+    {
+        .name = "ENTROPY_LABEL_HIGH_3_0",
+        .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 404, 407 }, /* Profile 2. */
+            { 404, 407 }, /* Profile 3. */
+            { 404, 407 }, /* Profile 4. */
+            { 372, 375 }, /* Profile 5. */
+            { 372, 375 }, /* Profile 6. */
+            { 372, 375 }, /* Profile 7. */
+        },
+        .profile_cnt = 8,
+    },
+    {
+        .name = "ENTROPY_LABEL_LOW_15_0",
+        .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 368, 383 }, /* Profile 2. */
+            { 368, 383 }, /* Profile 3. */
+            { 368, 383 }, /* Profile 4. */
+            { 336, 351 }, /* Profile 5. */
+            { 336, 351 }, /* Profile 6. */
+            { 336, 351 }, /* Profile 7. */
+        },
+        .profile_cnt = 8,
+    },
+    {
+        .name = "EP_NIH_HDR_DROP_CODE_15_0",
+        .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_DROP_CODE_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { -1, -1 }, /* Profile 2. */
+            { 176, 191 }, /* Profile 3. */
+            { -1, -1 }, /* Profile 4. */
+            { -1, -1 }, /* Profile 5. */
+            { 144, 159 }, /* Profile 6. */
+        },
+        .profile_cnt = 7,
+    },
+    {
+        .name = "EP_NIH_HDR_RECIRC_CODE_3_0",
+        .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_RECIRC_CODE_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 384, 387 }, /* Profile 2. */
+            { 384, 387 }, /* Profile 3. */
+            { 384, 387 }, /* Profile 4. */
+            { 352, 355 }, /* Profile 5. */
+            { 352, 355 }, /* Profile 6. */
+            { 352, 355 }, /* Profile 7. */
+        },
+        .profile_cnt = 8,
+    },
+    {
+        .name = "EP_NIH_HDR_TIMESTAMP_15_0",
+        .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 144, 159 }, /* Profile 2. */
+            { 128, 143 }, /* Profile 3. */
+            { -1, -1 }, /* Profile 4. */
+            { 128, 143 }, /* Profile 5. */
+            { 112, 127 }, /* Profile 6. */
+        },
+        .profile_cnt = 7,
+    },
+    {
+        .name = "EP_NIH_HDR_TIMESTAMP_31_16",
+        .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 160, 175 }, /* Profile 2. */
+            { 144, 159 }, /* Profile 3. */
+            { -1, -1 }, /* Profile 4. */
+            { 144, 159 }, /* Profile 5. */
+            { 128, 143 }, /* Profile 6. */
+        },
+        .profile_cnt = 7,
+    },
+    {
+        .name = "ERSPAN3_GBP_SID_15_0",
+        .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_ERSPAN3_GBP_SID_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 352, 367 }, /* Profile 2. */
+            { 352, 367 }, /* Profile 3. */
+            { 352, 367 }, /* Profile 4. */
+            { 320, 335 }, /* Profile 5. */
+            { 320, 335 }, /* Profile 6. */
+            { 320, 335 }, /* Profile 7. */
+        },
+        .profile_cnt = 8,
+    },
+    {
+        .name = "EVENT_TRACE_VECTOR_15_0",
+        .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 0, 15 }, /* Profile 2. */
+            { 0, 15 }, /* Profile 3. */
+            { 0, 15 }, /* Profile 4. */
+            { 0, 15 }, /* Profile 5. */
+            { 0, 15 }, /* Profile 6. */
+            { 0, 15 }, /* Profile 7. */
+        },
+        .profile_cnt = 8,
+    },
+    {
+        .name = "EVENT_TRACE_VECTOR_31_16",
+        .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 16, 31 }, /* Profile 2. */
+            { 16, 31 }, /* Profile 3. */
+            { 16, 31 }, /* Profile 4. */
+            { 16, 31 }, /* Profile 5. */
+            { 16, 31 }, /* Profile 6. */
+            { 16, 31 }, /* Profile 7. */
+        },
+        .profile_cnt = 8,
+    },
+    {
+        .name = "EVENT_TRACE_VECTOR_47_32",
+        .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 32, 47 }, /* Profile 2. */
+            { 32, 47 }, /* Profile 3. */
+            { 32, 47 }, /* Profile 4. */
+            { 32, 47 }, /* Profile 5. */
+            { 32, 47 }, /* Profile 6. */
+            { 32, 47 }, /* Profile 7. */
+        },
+        .profile_cnt = 8,
+    },
+    {
+        .name = "I2E_CLASS_ID_15_0",
+        .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 208, 223 }, /* Profile 2. */
+            { 208, 223 }, /* Profile 3. */
+            { 208, 223 }, /* Profile 4. */
+            { 176, 191 }, /* Profile 5. */
+            { 176, 191 }, /* Profile 6. */
+            { 176, 191 }, /* Profile 7. */
+        },
+        .profile_cnt = 8,
+    },
+    {
+        .name = "ING_TIMESTAMP_15_0",
+        .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { -1, -1 }, /* Profile 2. */
+            { -1, -1 }, /* Profile 3. */
+            { 144, 159 }, /* Profile 4. */
+            { -1, -1 }, /* Profile 5. */
+            { -1, -1 }, /* Profile 6. */
+            { 128, 143 }, /* Profile 7. */
+        },
+        .profile_cnt = 8,
+    },
+    {
+        .name = "ING_TIMESTAMP_31_16",
+        .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { -1, -1 }, /* Profile 2. */
+            { -1, -1 }, /* Profile 3. */
+            { 160, 175 }, /* Profile 4. */
+            { -1, -1 }, /* Profile 5. */
+            { -1, -1 }, /* Profile 6. */
+            { 144, 159 }, /* Profile 7. */
+        },
+        .profile_cnt = 8,
+    },
+    {
+        .name = "INGRESS_PP_PORT_8_0",
+        .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_8_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 272, 280 }, /* Profile 2. */
+            { 272, 280 }, /* Profile 3. */
+            { 272, 280 }, /* Profile 4. */
+            { 240, 248 }, /* Profile 5. */
+            { 240, 248 }, /* Profile 6. */
+            { 240, 248 }, /* Profile 7. */
+        },
+        .profile_cnt = 8,
+    },
+    {
+        .name = "INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0",
+        .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 224, 239 }, /* Profile 2. */
+            { 224, 239 }, /* Profile 3. */
+            { 224, 239 }, /* Profile 4. */
+            { 192, 207 }, /* Profile 5. */
+            { 192, 207 }, /* Profile 6. */
+            { 192, 207 }, /* Profile 7. */
+        },
+        .profile_cnt = 8,
+    },
+    {
+        .name = "INGRESS_QOS_REMARK_CTRL_3_0",
+        .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 412, 415 }, /* Profile 2. */
+            { 412, 415 }, /* Profile 3. */
+            { 412, 415 }, /* Profile 4. */
+            { 380, 383 }, /* Profile 5. */
+            { 380, 383 }, /* Profile 6. */
+            { 380, 383 }, /* Profile 7. */
+        },
+        .profile_cnt = 8,
+    },
+    {
+        .name = "INT_PRI_3_0",
+        .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_INT_PRI_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 396, 399 }, /* Profile 2. */
+            { 396, 399 }, /* Profile 3. */
+            { 396, 399 }, /* Profile 4. */
+            { 364, 367 }, /* Profile 5. */
+            { 364, 367 }, /* Profile 6. */
+            { 364, 367 }, /* Profile 7. */
+        },
+        .profile_cnt = 8,
+    },
+    {
+        .name = "L2_IIF_10_0",
+        .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_L2_IIF_10_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 192, 202 }, /* Profile 2. */
+            { 192, 202 }, /* Profile 3. */
+            { 192, 202 }, /* Profile 4. */
+            { 160, 170 }, /* Profile 5. */
+            { 160, 170 }, /* Profile 6. */
+            { 160, 170 }, /* Profile 7. */
+        },
+        .profile_cnt = 8,
+    },
+    {
+        .name = "L2_OIF_10_0",
+        .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_L2_OIF_10_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 96, 106 }, /* Profile 2. */
+            { 80, 90 }, /* Profile 3. */
+            { 96, 106 }, /* Profile 4. */
+            { 96, 106 }, /* Profile 5. */
+            { 80, 90 }, /* Profile 6. */
+            { 96, 106 }, /* Profile 7. */
+        },
+        .profile_cnt = 8,
+    },
+    {
+        .name = "L2_TUNNEL_SVP_15_0",
+        .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_L2_TUNNEL_SVP_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 240, 255 }, /* Profile 2. */
+            { 240, 255 }, /* Profile 3. */
+            { 240, 255 }, /* Profile 4. */
+            { 208, 223 }, /* Profile 5. */
+            { 208, 223 }, /* Profile 6. */
+            { 208, 223 }, /* Profile 7. */
+        },
+        .profile_cnt = 8,
+    },
+    {
+        .name = "L3_IIF_13_0",
+        .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_L3_IIF_13_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 256, 269 }, /* Profile 2. */
+            { 256, 269 }, /* Profile 3. */
+            { 256, 269 }, /* Profile 4. */
+            { 224, 237 }, /* Profile 5. */
+            { 224, 237 }, /* Profile 6. */
+            { 224, 237 }, /* Profile 7. */
+        },
+        .profile_cnt = 8,
+    },
+    {
+        .name = "L3_OIF_1_13_0",
+        .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 112, 125 }, /* Profile 2. */
+            { 96, 109 }, /* Profile 3. */
+            { 112, 125 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "NHOP_2_OR_ECMP_GROUP_INDEX_1_14_0",
+        .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_14_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 304, 318 }, /* Profile 2. */
+            { 304, 318 }, /* Profile 3. */
+            { 304, 318 }, /* Profile 4. */
+            { 272, 286 }, /* Profile 5. */
+            { 272, 286 }, /* Profile 6. */
+            { 272, 286 }, /* Profile 7. */
+        },
+        .profile_cnt = 8,
+    },
+    {
+        .name = "NHOP_INDEX_1_14_0",
+        .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_14_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 176, 190 }, /* Profile 2. */
+            { 160, 174 }, /* Profile 3. */
+            { 176, 190 }, /* Profile 4. */
+        },
+        .profile_cnt = 5,
+    },
+    {
+        .name = "PARSER_VHLEN_0_15_0",
+        .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 64, 79 }, /* Profile 2. */
+            { 48, 63 }, /* Profile 3. */
+            { 64, 79 }, /* Profile 4. */
+            { 64, 79 }, /* Profile 5. */
+            { 48, 63 }, /* Profile 6. */
+            { 64, 79 }, /* Profile 7. */
+        },
+        .profile_cnt = 8,
+    },
+    {
+        .name = "PKT_MISC_CTRL_0_3_0",
+        .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 408, 411 }, /* Profile 2. */
+            { 408, 411 }, /* Profile 3. */
+            { 408, 411 }, /* Profile 4. */
+            { 376, 379 }, /* Profile 5. */
+            { 376, 379 }, /* Profile 6. */
+            { 376, 379 }, /* Profile 7. */
+        },
+        .profile_cnt = 8,
+    },
+    {
+        .name = "SVP_NETWORK_GROUP_BITMAP_3_0",
+        .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 416, 419 }, /* Profile 2. */
+            { 416, 419 }, /* Profile 3. */
+            { 416, 419 }, /* Profile 4. */
+            { 384, 387 }, /* Profile 5. */
+            { 384, 387 }, /* Profile 6. */
+            { 384, 387 }, /* Profile 7. */
+        },
+        .profile_cnt = 8,
+    },
+    {
+        .name = "SYSTEM_DESTINATION_15_0",
+        .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 320, 335 }, /* Profile 2. */
+            { 320, 335 }, /* Profile 3. */
+            { 320, 335 }, /* Profile 4. */
+            { 288, 303 }, /* Profile 5. */
+            { 288, 303 }, /* Profile 6. */
+            { 288, 303 }, /* Profile 7. */
+        },
+        .profile_cnt = 8,
+    },
+    {
+        .name = "SYSTEM_OPCODE_3_0",
+        .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 400, 403 }, /* Profile 2. */
+            { 400, 403 }, /* Profile 3. */
+            { 400, 403 }, /* Profile 4. */
+            { 368, 371 }, /* Profile 5. */
+            { 368, 371 }, /* Profile 6. */
+            { 368, 371 }, /* Profile 7. */
+        },
+        .profile_cnt = 8,
+    },
+    {
+        .name = "SYSTEM_SOURCE_15_0",
+        .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 288, 303 }, /* Profile 2. */
+            { 288, 303 }, /* Profile 3. */
+            { 288, 303 }, /* Profile 4. */
+            { 256, 271 }, /* Profile 5. */
+            { 256, 271 }, /* Profile 6. */
+            { 256, 271 }, /* Profile 7. */
+        },
+        .profile_cnt = 8,
+    },
+    {
+        .name = "TAG_ACTION_CTRL_1_0",
+        .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_TAG_ACTION_CTRL_1_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 392, 393 }, /* Profile 2. */
+            { 392, 393 }, /* Profile 3. */
+            { 392, 393 }, /* Profile 4. */
+            { 360, 361 }, /* Profile 5. */
+            { 360, 361 }, /* Profile 6. */
+            { 360, 361 }, /* Profile 7. */
+        },
+        .profile_cnt = 8,
+    },
+    {
+        .name = "TUNNEL_PROCESSING_RESULTS_1_3_0",
+        .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 388, 391 }, /* Profile 2. */
+            { 388, 391 }, /* Profile 3. */
+            { 388, 391 }, /* Profile 4. */
+            { 356, 359 }, /* Profile 5. */
+            { 356, 359 }, /* Profile 6. */
+            { 356, 359 }, /* Profile 7. */
+        },
+        .profile_cnt = 8,
+    },
+    {
+        .name = "VFI_15_0",
+        .fid = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_VFI_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 80, 95 }, /* Profile 2. */
+            { 64, 79 }, /* Profile 3. */
+            { 80, 95 }, /* Profile 4. */
+            { 80, 95 }, /* Profile 5. */
+            { 64, 79 }, /* Profile 6. */
+            { 80, 95 }, /* Profile 7. */
+        },
+        .profile_cnt = 8,
+    },
+};static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_29_rxpmd_flex_field_info = {
+    .num_fields = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_FID_COUNT,
+    .info = bcm56890_a0_cna_6_5_29_rxpmd_flex_field_data,
+};
+
+static shr_enum_map_t bcm56890_a0_cna_6_5_29_rxpmd_flex_reason_names[] = {
+    BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_reasons_info_t bcm56890_a0_cna_6_5_29_rxpmd_flex_reasons_info = {
+    .num_reasons = BCM56890_A0_CNA_6_5_29_BCMPKT_RXPMD_FLEX_REASON_COUNT,
+    .reason_names = bcm56890_a0_cna_6_5_29_rxpmd_flex_reason_names,
+    .reason_encode = bcm56890_a0_cna_6_5_29_rxpmd_flex_reason_encode,
+    .reason_decode = bcm56890_a0_cna_6_5_29_rxpmd_flex_reason_decode,
+};
+
+
+static int32_t bcmpkt_arp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_operation_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_operation_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_29_arp_t_fget[BCM56890_A0_CNA_6_5_29_BCMPKT_ARP_T_FID_COUNT] = {
+    bcmpkt_arp_t_hardware_len_get,
+    bcmpkt_arp_t_hardware_type_get,
+    bcmpkt_arp_t_operation_get,
+    bcmpkt_arp_t_prot_addr_len_get,
+    bcmpkt_arp_t_protocol_type_get,
+    bcmpkt_arp_t_sender_ha_get,
+    bcmpkt_arp_t_sender_ip_get,
+    bcmpkt_arp_t_target_ha_get,
+    bcmpkt_arp_t_target_ip_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_29_arp_t_fset[BCM56890_A0_CNA_6_5_29_BCMPKT_ARP_T_FID_COUNT] = {
+    bcmpkt_arp_t_hardware_len_set,
+    bcmpkt_arp_t_hardware_type_set,
+    bcmpkt_arp_t_operation_set,
+    bcmpkt_arp_t_prot_addr_len_set,
+    bcmpkt_arp_t_protocol_type_set,
+    bcmpkt_arp_t_sender_ha_set,
+    bcmpkt_arp_t_sender_ip_set,
+    bcmpkt_arp_t_target_ha_set,
+    bcmpkt_arp_t_target_ip_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_arp_t_field_data[] = {
+    BCM56890_A0_CNA_6_5_29_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_29_arp_t_field_info = {
+    .num_fields = BCM56890_A0_CNA_6_5_29_BCMPKT_ARP_T_FID_COUNT,
+    .info = bcm56890_a0_cna_6_5_29_arp_t_field_data,
+};
+
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_29_cpu_composites_0_t_fget[BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = {
+    bcmpkt_cpu_composites_0_t_dma_cont0_get,
+    bcmpkt_cpu_composites_0_t_dma_cont1_get,
+    bcmpkt_cpu_composites_0_t_dma_cont2_get,
+    bcmpkt_cpu_composites_0_t_dma_cont3_get,
+    bcmpkt_cpu_composites_0_t_dma_cont4_get,
+    bcmpkt_cpu_composites_0_t_dma_cont5_get,
+    bcmpkt_cpu_composites_0_t_dma_cont6_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_29_cpu_composites_0_t_fset[BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = {
+    bcmpkt_cpu_composites_0_t_dma_cont0_set,
+    bcmpkt_cpu_composites_0_t_dma_cont1_set,
+    bcmpkt_cpu_composites_0_t_dma_cont2_set,
+    bcmpkt_cpu_composites_0_t_dma_cont3_set,
+    bcmpkt_cpu_composites_0_t_dma_cont4_set,
+    bcmpkt_cpu_composites_0_t_dma_cont5_set,
+    bcmpkt_cpu_composites_0_t_dma_cont6_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_cpu_composites_0_t_field_data[] = {
+    BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_29_cpu_composites_0_t_field_info = {
+    .num_fields = BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT,
+    .info = bcm56890_a0_cna_6_5_29_cpu_composites_0_t_field_data,
+};
+
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_29_cpu_composites_1_t_fget[BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = {
+    bcmpkt_cpu_composites_1_t_dma_cont10_get,
+    bcmpkt_cpu_composites_1_t_dma_cont11_get,
+    bcmpkt_cpu_composites_1_t_dma_cont12_get,
+    bcmpkt_cpu_composites_1_t_dma_cont13_get,
+    bcmpkt_cpu_composites_1_t_dma_cont14_get,
+    bcmpkt_cpu_composites_1_t_dma_cont15_get,
+    bcmpkt_cpu_composites_1_t_dma_cont16_get,
+    bcmpkt_cpu_composites_1_t_dma_cont17_get,
+    bcmpkt_cpu_composites_1_t_dma_cont7_get,
+    bcmpkt_cpu_composites_1_t_dma_cont8_get,
+    bcmpkt_cpu_composites_1_t_dma_cont9_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_29_cpu_composites_1_t_fset[BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = {
+    bcmpkt_cpu_composites_1_t_dma_cont10_set,
+    bcmpkt_cpu_composites_1_t_dma_cont11_set,
+    bcmpkt_cpu_composites_1_t_dma_cont12_set,
+    bcmpkt_cpu_composites_1_t_dma_cont13_set,
+    bcmpkt_cpu_composites_1_t_dma_cont14_set,
+    bcmpkt_cpu_composites_1_t_dma_cont15_set,
+    bcmpkt_cpu_composites_1_t_dma_cont16_set,
+    bcmpkt_cpu_composites_1_t_dma_cont17_set,
+    bcmpkt_cpu_composites_1_t_dma_cont7_set,
+    bcmpkt_cpu_composites_1_t_dma_cont8_set,
+    bcmpkt_cpu_composites_1_t_dma_cont9_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_cpu_composites_1_t_field_data[] = {
+    BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_29_cpu_composites_1_t_field_info = {
+    .num_fields = BCM56890_A0_CNA_6_5_29_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT,
+    .info = bcm56890_a0_cna_6_5_29_cpu_composites_1_t_field_data,
+};
+
+
+static int32_t bcmpkt_ep_nih_header_t_header_subtype_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 20, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_header_subtype_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 20, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_header_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 6);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_header_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 6, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_a_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_a_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_b_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 20, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_b_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 20, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_c_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_c_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_object_a_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_object_a_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_object_b_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_object_b_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_object_c_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_object_c_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_recirc_profile_index_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_recirc_profile_index_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 12, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 12, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_start_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 30, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_start_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 30, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_timestamp_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_29_ep_nih_header_t_fget[BCM56890_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = {
+    bcmpkt_ep_nih_header_t_header_subtype_get,
+    bcmpkt_ep_nih_header_t_header_type_get,
+    bcmpkt_ep_nih_header_t_opaque_ctrl_a_get,
+    bcmpkt_ep_nih_header_t_opaque_ctrl_b_get,
+    bcmpkt_ep_nih_header_t_opaque_ctrl_c_get,
+    bcmpkt_ep_nih_header_t_opaque_object_a_get,
+    bcmpkt_ep_nih_header_t_opaque_object_b_get,
+    bcmpkt_ep_nih_header_t_opaque_object_c_get,
+    bcmpkt_ep_nih_header_t_recirc_profile_index_get,
+    bcmpkt_ep_nih_header_t_reserved_0_get,
+    bcmpkt_ep_nih_header_t_start_get,
+    bcmpkt_ep_nih_header_t_timestamp_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_29_ep_nih_header_t_fset[BCM56890_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = {
+    bcmpkt_ep_nih_header_t_header_subtype_set,
+    bcmpkt_ep_nih_header_t_header_type_set,
+    bcmpkt_ep_nih_header_t_opaque_ctrl_a_set,
+    bcmpkt_ep_nih_header_t_opaque_ctrl_b_set,
+    bcmpkt_ep_nih_header_t_opaque_ctrl_c_set,
+    bcmpkt_ep_nih_header_t_opaque_object_a_set,
+    bcmpkt_ep_nih_header_t_opaque_object_b_set,
+    bcmpkt_ep_nih_header_t_opaque_object_c_set,
+    bcmpkt_ep_nih_header_t_recirc_profile_index_set,
+    bcmpkt_ep_nih_header_t_reserved_0_set,
+    bcmpkt_ep_nih_header_t_start_set,
+    bcmpkt_ep_nih_header_t_timestamp_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_ep_nih_header_t_field_data[] = {
+    BCM56890_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_29_ep_nih_header_t_field_info = {
+    .num_fields = BCM56890_A0_CNA_6_5_29_BCMPKT_EP_NIH_HEADER_T_FID_COUNT,
+    .info = bcm56890_a0_cna_6_5_29_ep_nih_header_t_field_data,
+};
+
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 11, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 11, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 13, 3);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 13, 3, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 10);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 10, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_t_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 10, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_t_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 10, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 12);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 12, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_29_erspan3_fixed_hdr_t_fget[BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = {
+    bcmpkt_erspan3_fixed_hdr_t_bso_get,
+    bcmpkt_erspan3_fixed_hdr_t_cos_get,
+    bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get,
+    bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get,
+    bcmpkt_erspan3_fixed_hdr_t_session_id_get,
+    bcmpkt_erspan3_fixed_hdr_t_t_get,
+    bcmpkt_erspan3_fixed_hdr_t_timestamp_get,
+    bcmpkt_erspan3_fixed_hdr_t_ver_get,
+    bcmpkt_erspan3_fixed_hdr_t_vlan_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_29_erspan3_fixed_hdr_t_fset[BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = {
+    bcmpkt_erspan3_fixed_hdr_t_bso_set,
+    bcmpkt_erspan3_fixed_hdr_t_cos_set,
+    bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set,
+    bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set,
+    bcmpkt_erspan3_fixed_hdr_t_session_id_set,
+    bcmpkt_erspan3_fixed_hdr_t_t_set,
+    bcmpkt_erspan3_fixed_hdr_t_timestamp_set,
+    bcmpkt_erspan3_fixed_hdr_t_ver_set,
+    bcmpkt_erspan3_fixed_hdr_t_vlan_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_erspan3_fixed_hdr_t_field_data[] = {
+    BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_29_erspan3_fixed_hdr_t_field_info = {
+    .num_fields = BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT,
+    .info = bcm56890_a0_cna_6_5_29_erspan3_fixed_hdr_t_field_data,
+};
+
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 26, 6);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 26, 6, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 10);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 10, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_29_erspan3_subhdr_5_t_fget[BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = {
+    bcmpkt_erspan3_subhdr_5_t_platform_id_get,
+    bcmpkt_erspan3_subhdr_5_t_port_id_get,
+    bcmpkt_erspan3_subhdr_5_t_switch_id_get,
+    bcmpkt_erspan3_subhdr_5_t_timestamp_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_29_erspan3_subhdr_5_t_fset[BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = {
+    bcmpkt_erspan3_subhdr_5_t_platform_id_set,
+    bcmpkt_erspan3_subhdr_5_t_port_id_set,
+    bcmpkt_erspan3_subhdr_5_t_switch_id_set,
+    bcmpkt_erspan3_subhdr_5_t_timestamp_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_erspan3_subhdr_5_t_field_data[] = {
+    BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_29_erspan3_subhdr_5_t_field_info = {
+    .num_fields = BCM56890_A0_CNA_6_5_29_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT,
+    .info = bcm56890_a0_cna_6_5_29_erspan3_subhdr_5_t_field_data,
+};
+
+
+static int32_t bcmpkt_ethertype_t_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ethertype_t_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_29_ethertype_t_fget[BCM56890_A0_CNA_6_5_29_BCMPKT_ETHERTYPE_T_FID_COUNT] = {
+    bcmpkt_ethertype_t_type_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_29_ethertype_t_fset[BCM56890_A0_CNA_6_5_29_BCMPKT_ETHERTYPE_T_FID_COUNT] = {
+    bcmpkt_ethertype_t_type_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_ethertype_t_field_data[] = {
+    BCM56890_A0_CNA_6_5_29_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_29_ethertype_t_field_info = {
+    .num_fields = BCM56890_A0_CNA_6_5_29_BCMPKT_ETHERTYPE_T_FID_COUNT,
+    .info = bcm56890_a0_cna_6_5_29_ethertype_t_field_data,
+};
+
+
+static int32_t bcmpkt_generic_loopback_t_destination_obj_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_destination_obj_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_destination_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_destination_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_entropy_obj_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_entropy_obj_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_header_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 20, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_header_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 20, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_input_priority_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 12, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_input_priority_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 12, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_interface_ctrl_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 4, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_interface_ctrl_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 4, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_interface_obj_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_interface_obj_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_qos_obj_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_qos_obj_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_reserved_1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_reserved_1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_reserved_2_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_reserved_2_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_source_system_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_source_system_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_start_byte_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_start_byte_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_29_generic_loopback_t_fget[BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = {
+    bcmpkt_generic_loopback_t_destination_obj_get,
+    bcmpkt_generic_loopback_t_destination_type_get,
+    bcmpkt_generic_loopback_t_entropy_obj_get,
+    bcmpkt_generic_loopback_t_flags_get,
+    bcmpkt_generic_loopback_t_header_type_get,
+    bcmpkt_generic_loopback_t_input_priority_get,
+    bcmpkt_generic_loopback_t_interface_ctrl_get,
+    bcmpkt_generic_loopback_t_interface_obj_get,
+    bcmpkt_generic_loopback_t_processing_ctrl_0_get,
+    bcmpkt_generic_loopback_t_processing_ctrl_1_get,
+    bcmpkt_generic_loopback_t_qos_obj_get,
+    bcmpkt_generic_loopback_t_reserved_1_get,
+    bcmpkt_generic_loopback_t_reserved_2_get,
+    bcmpkt_generic_loopback_t_source_system_port_get,
+    bcmpkt_generic_loopback_t_start_byte_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_29_generic_loopback_t_fset[BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = {
+    bcmpkt_generic_loopback_t_destination_obj_set,
+    bcmpkt_generic_loopback_t_destination_type_set,
+    bcmpkt_generic_loopback_t_entropy_obj_set,
+    bcmpkt_generic_loopback_t_flags_set,
+    bcmpkt_generic_loopback_t_header_type_set,
+    bcmpkt_generic_loopback_t_input_priority_set,
+    bcmpkt_generic_loopback_t_interface_ctrl_set,
+    bcmpkt_generic_loopback_t_interface_obj_set,
+    bcmpkt_generic_loopback_t_processing_ctrl_0_set,
+    bcmpkt_generic_loopback_t_processing_ctrl_1_set,
+    bcmpkt_generic_loopback_t_qos_obj_set,
+    bcmpkt_generic_loopback_t_reserved_1_set,
+    bcmpkt_generic_loopback_t_reserved_2_set,
+    bcmpkt_generic_loopback_t_source_system_port_set,
+    bcmpkt_generic_loopback_t_start_byte_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_generic_loopback_t_field_data[] = {
+    BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_29_generic_loopback_t_field_info = {
+    .num_fields = BCM56890_A0_CNA_6_5_29_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT,
+    .info = bcm56890_a0_cna_6_5_29_generic_loopback_t_field_data,
+};
+
+
+static int32_t bcmpkt_icmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_icmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_icmp_t_code_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_icmp_t_code_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_icmp_t_icmp_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_icmp_t_icmp_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_29_icmp_t_fget[BCM56890_A0_CNA_6_5_29_BCMPKT_ICMP_T_FID_COUNT] = {
+    bcmpkt_icmp_t_checksum_get,
+    bcmpkt_icmp_t_code_get,
+    bcmpkt_icmp_t_icmp_type_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_29_icmp_t_fset[BCM56890_A0_CNA_6_5_29_BCMPKT_ICMP_T_FID_COUNT] = {
+    bcmpkt_icmp_t_checksum_set,
+    bcmpkt_icmp_t_code_set,
+    bcmpkt_icmp_t_icmp_type_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_icmp_t_field_data[] = {
+    BCM56890_A0_CNA_6_5_29_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_29_icmp_t_field_info = {
+    .num_fields = BCM56890_A0_CNA_6_5_29_BCMPKT_ICMP_T_FID_COUNT,
+    .info = bcm56890_a0_cna_6_5_29_icmp_t_field_data,
+};
+
+
+static int32_t bcmpkt_ipfix_t_export_time_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_export_time_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_obs_domain_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_obs_domain_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_29_ipfix_t_fget[BCM56890_A0_CNA_6_5_29_BCMPKT_IPFIX_T_FID_COUNT] = {
+    bcmpkt_ipfix_t_export_time_get,
+    bcmpkt_ipfix_t_length_get,
+    bcmpkt_ipfix_t_obs_domain_id_get,
+    bcmpkt_ipfix_t_sequence_num_get,
+    bcmpkt_ipfix_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_29_ipfix_t_fset[BCM56890_A0_CNA_6_5_29_BCMPKT_IPFIX_T_FID_COUNT] = {
+    bcmpkt_ipfix_t_export_time_set,
+    bcmpkt_ipfix_t_length_set,
+    bcmpkt_ipfix_t_obs_domain_id_set,
+    bcmpkt_ipfix_t_sequence_num_set,
+    bcmpkt_ipfix_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_ipfix_t_field_data[] = {
+    BCM56890_A0_CNA_6_5_29_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_29_ipfix_t_field_info = {
+    .num_fields = BCM56890_A0_CNA_6_5_29_BCMPKT_IPFIX_T_FID_COUNT,
+    .info = bcm56890_a0_cna_6_5_29_ipfix_t_field_data,
+};
+
+
+static int32_t bcmpkt_ipv4_t_da_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_da_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_flags_frag_offset_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_flags_frag_offset_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_hdr_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_hdr_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_option_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_option_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_protocol_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_protocol_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_sa_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_sa_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_tos_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_tos_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_total_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_total_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_ttl_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_ttl_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_version_hdr_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_version_hdr_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_29_ipv4_t_fget[BCM56890_A0_CNA_6_5_29_BCMPKT_IPV4_T_FID_COUNT] = {
+    bcmpkt_ipv4_t_da_get,
+    bcmpkt_ipv4_t_flags_frag_offset_get,
+    bcmpkt_ipv4_t_hdr_checksum_get,
+    bcmpkt_ipv4_t_id_get,
+    bcmpkt_ipv4_t_option_get,
+    bcmpkt_ipv4_t_protocol_get,
+    bcmpkt_ipv4_t_sa_get,
+    bcmpkt_ipv4_t_tos_get,
+    bcmpkt_ipv4_t_total_length_get,
+    bcmpkt_ipv4_t_ttl_get,
+    bcmpkt_ipv4_t_version_hdr_len_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_29_ipv4_t_fset[BCM56890_A0_CNA_6_5_29_BCMPKT_IPV4_T_FID_COUNT] = {
+    bcmpkt_ipv4_t_da_set,
+    bcmpkt_ipv4_t_flags_frag_offset_set,
+    bcmpkt_ipv4_t_hdr_checksum_set,
+    bcmpkt_ipv4_t_id_set,
+    bcmpkt_ipv4_t_option_set,
+    bcmpkt_ipv4_t_protocol_set,
+    bcmpkt_ipv4_t_sa_set,
+    bcmpkt_ipv4_t_tos_set,
+    bcmpkt_ipv4_t_total_length_set,
+    bcmpkt_ipv4_t_ttl_set,
+    bcmpkt_ipv4_t_version_hdr_len_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_ipv4_t_field_data[] = {
+    BCM56890_A0_CNA_6_5_29_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_29_ipv4_t_field_info = {
+    .num_fields = BCM56890_A0_CNA_6_5_29_BCMPKT_IPV4_T_FID_COUNT,
+    .info = bcm56890_a0_cna_6_5_29_ipv4_t_field_data,
+};
+
+
+static int32_t bcmpkt_ipv6_t_da_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_da_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_flow_label_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 20);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_flow_label_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 20, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_hop_limit_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_hop_limit_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 8, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 8, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_payload_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_payload_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_sa_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_sa_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_traffic_class_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 20, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_traffic_class_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 20, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_29_ipv6_t_fget[BCM56890_A0_CNA_6_5_29_BCMPKT_IPV6_T_FID_COUNT] = {
+    bcmpkt_ipv6_t_da_get,
+    bcmpkt_ipv6_t_flow_label_get,
+    bcmpkt_ipv6_t_hop_limit_get,
+    bcmpkt_ipv6_t_next_header_get,
+    bcmpkt_ipv6_t_payload_length_get,
+    bcmpkt_ipv6_t_sa_get,
+    bcmpkt_ipv6_t_traffic_class_get,
+    bcmpkt_ipv6_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_29_ipv6_t_fset[BCM56890_A0_CNA_6_5_29_BCMPKT_IPV6_T_FID_COUNT] = {
+    bcmpkt_ipv6_t_da_set,
+    bcmpkt_ipv6_t_flow_label_set,
+    bcmpkt_ipv6_t_hop_limit_set,
+    bcmpkt_ipv6_t_next_header_set,
+    bcmpkt_ipv6_t_payload_length_set,
+    bcmpkt_ipv6_t_sa_set,
+    bcmpkt_ipv6_t_traffic_class_set,
+    bcmpkt_ipv6_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_ipv6_t_field_data[] = {
+    BCM56890_A0_CNA_6_5_29_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_29_ipv6_t_field_info = {
+    .num_fields = BCM56890_A0_CNA_6_5_29_BCMPKT_IPV6_T_FID_COUNT,
+    .info = bcm56890_a0_cna_6_5_29_ipv6_t_field_data,
+};
+
+
+static int32_t bcmpkt_l2_t_macda_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_l2_t_macda_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_l2_t_macsa_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_l2_t_macsa_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_29_l2_t_fget[BCM56890_A0_CNA_6_5_29_BCMPKT_L2_T_FID_COUNT] = {
+    bcmpkt_l2_t_macda_get,
+    bcmpkt_l2_t_macsa_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_29_l2_t_fset[BCM56890_A0_CNA_6_5_29_BCMPKT_L2_T_FID_COUNT] = {
+    bcmpkt_l2_t_macda_set,
+    bcmpkt_l2_t_macsa_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_l2_t_field_data[] = {
+    BCM56890_A0_CNA_6_5_29_BCMPKT_L2_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_29_l2_t_field_info = {
+    .num_fields = BCM56890_A0_CNA_6_5_29_BCMPKT_L2_T_FID_COUNT,
+    .info = bcm56890_a0_cna_6_5_29_l2_t_field_data,
+};
+
+
+static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_29_mirror_erspan_sn_t_fget[BCM56890_A0_CNA_6_5_29_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = {
+    bcmpkt_mirror_erspan_sn_t_seq_num_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_29_mirror_erspan_sn_t_fset[BCM56890_A0_CNA_6_5_29_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = {
+    bcmpkt_mirror_erspan_sn_t_seq_num_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_mirror_erspan_sn_t_field_data[] = {
+    BCM56890_A0_CNA_6_5_29_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_29_mirror_erspan_sn_t_field_info = {
+    .num_fields = BCM56890_A0_CNA_6_5_29_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT,
+    .info = bcm56890_a0_cna_6_5_29_mirror_erspan_sn_t_field_data,
+};
+
+
+static int32_t bcmpkt_mirror_transport_t_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_mirror_transport_t_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_29_mirror_transport_t_fget[BCM56890_A0_CNA_6_5_29_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = {
+    bcmpkt_mirror_transport_t_data_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_29_mirror_transport_t_fset[BCM56890_A0_CNA_6_5_29_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = {
+    bcmpkt_mirror_transport_t_data_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_mirror_transport_t_field_data[] = {
+    BCM56890_A0_CNA_6_5_29_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_29_mirror_transport_t_field_info = {
+    .num_fields = BCM56890_A0_CNA_6_5_29_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT,
+    .info = bcm56890_a0_cna_6_5_29_mirror_transport_t_field_data,
+};
+
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[4], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[4], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[4], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[4], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_29_psamp_mirror_on_drop_0_t_fget[BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = {
+    bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_length_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_template_id_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_29_psamp_mirror_on_drop_0_t_fset[BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = {
+    bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_length_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_template_id_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_psamp_mirror_on_drop_0_t_field_data[] = {
+    BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_29_psamp_mirror_on_drop_0_t_field_info = {
+    .num_fields = BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT,
+    .info = bcm56890_a0_cna_6_5_29_psamp_mirror_on_drop_0_t_field_data,
+};
+
+
+static int32_t bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_29_psamp_mirror_on_drop_1_t_fget[BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT] = {
+    bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_get,
+    bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_get,
+    bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_get,
+    bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_get,
+    bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_get,
+    bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_29_psamp_mirror_on_drop_1_t_fset[BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT] = {
+    bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_set,
+    bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_set,
+    bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_set,
+    bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_set,
+    bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_set,
+    bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_psamp_mirror_on_drop_1_t_field_data[] = {
+    BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_29_psamp_mirror_on_drop_1_t_field_info = {
+    .num_fields = BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT,
+    .info = bcm56890_a0_cna_6_5_29_psamp_mirror_on_drop_1_t_field_data,
+};
+
+
+static int32_t bcmpkt_psamp_mirror_on_drop_2_t_egr_drop_reason_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_2_t_egr_drop_reason_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_2_t_ep_copy_session_index_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_2_t_ep_copy_session_index_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_2_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_2_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_2_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_2_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_2_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_2_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_2_t_var_len_indicator_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_2_t_var_len_indicator_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_29_psamp_mirror_on_drop_2_t_fget[BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT] = {
+    bcmpkt_psamp_mirror_on_drop_2_t_egr_drop_reason_get,
+    bcmpkt_psamp_mirror_on_drop_2_t_ep_copy_session_index_get,
+    bcmpkt_psamp_mirror_on_drop_2_t_reserved_0_get,
+    bcmpkt_psamp_mirror_on_drop_2_t_sampled_length_get,
+    bcmpkt_psamp_mirror_on_drop_2_t_user_meta_data_get,
+    bcmpkt_psamp_mirror_on_drop_2_t_var_len_indicator_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_29_psamp_mirror_on_drop_2_t_fset[BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT] = {
+    bcmpkt_psamp_mirror_on_drop_2_t_egr_drop_reason_set,
+    bcmpkt_psamp_mirror_on_drop_2_t_ep_copy_session_index_set,
+    bcmpkt_psamp_mirror_on_drop_2_t_reserved_0_set,
+    bcmpkt_psamp_mirror_on_drop_2_t_sampled_length_set,
+    bcmpkt_psamp_mirror_on_drop_2_t_user_meta_data_set,
+    bcmpkt_psamp_mirror_on_drop_2_t_var_len_indicator_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_psamp_mirror_on_drop_2_t_field_data[] = {
+    BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_29_psamp_mirror_on_drop_2_t_field_info = {
+    .num_fields = BCM56890_A0_CNA_6_5_29_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT,
+    .info = bcm56890_a0_cna_6_5_29_psamp_mirror_on_drop_2_t_field_data,
+};
+
+
+static int32_t bcmpkt_rarp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_operation_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_operation_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_29_rarp_t_fget[BCM56890_A0_CNA_6_5_29_BCMPKT_RARP_T_FID_COUNT] = {
+    bcmpkt_rarp_t_hardware_len_get,
+    bcmpkt_rarp_t_hardware_type_get,
+    bcmpkt_rarp_t_operation_get,
+    bcmpkt_rarp_t_prot_addr_len_get,
+    bcmpkt_rarp_t_protocol_type_get,
+    bcmpkt_rarp_t_sender_ha_get,
+    bcmpkt_rarp_t_sender_ip_get,
+    bcmpkt_rarp_t_target_ha_get,
+    bcmpkt_rarp_t_target_ip_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_29_rarp_t_fset[BCM56890_A0_CNA_6_5_29_BCMPKT_RARP_T_FID_COUNT] = {
+    bcmpkt_rarp_t_hardware_len_set,
+    bcmpkt_rarp_t_hardware_type_set,
+    bcmpkt_rarp_t_operation_set,
+    bcmpkt_rarp_t_prot_addr_len_set,
+    bcmpkt_rarp_t_protocol_type_set,
+    bcmpkt_rarp_t_sender_ha_set,
+    bcmpkt_rarp_t_sender_ip_set,
+    bcmpkt_rarp_t_target_ha_set,
+    bcmpkt_rarp_t_target_ip_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_rarp_t_field_data[] = {
+    BCM56890_A0_CNA_6_5_29_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_29_rarp_t_field_info = {
+    .num_fields = BCM56890_A0_CNA_6_5_29_BCMPKT_RARP_T_FID_COUNT,
+    .info = bcm56890_a0_cna_6_5_29_rarp_t_field_data,
+};
+
+
+static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_first_4bytes_t_src_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_first_4bytes_t_src_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_29_tcp_first_4bytes_t_fget[BCM56890_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = {
+    bcmpkt_tcp_first_4bytes_t_dst_port_get,
+    bcmpkt_tcp_first_4bytes_t_src_port_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_29_tcp_first_4bytes_t_fset[BCM56890_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = {
+    bcmpkt_tcp_first_4bytes_t_dst_port_set,
+    bcmpkt_tcp_first_4bytes_t_src_port_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_tcp_first_4bytes_t_field_data[] = {
+    BCM56890_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_29_tcp_first_4bytes_t_field_info = {
+    .num_fields = BCM56890_A0_CNA_6_5_29_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT,
+    .info = bcm56890_a0_cna_6_5_29_tcp_first_4bytes_t_field_data,
+};
+
+
+static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_win_size_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_win_size_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_29_tcp_last_16bytes_t_fget[BCM56890_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = {
+    bcmpkt_tcp_last_16bytes_t_ack_num_get,
+    bcmpkt_tcp_last_16bytes_t_checksum_get,
+    bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get,
+    bcmpkt_tcp_last_16bytes_t_seq_num_get,
+    bcmpkt_tcp_last_16bytes_t_urgent_ptr_get,
+    bcmpkt_tcp_last_16bytes_t_win_size_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_29_tcp_last_16bytes_t_fset[BCM56890_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = {
+    bcmpkt_tcp_last_16bytes_t_ack_num_set,
+    bcmpkt_tcp_last_16bytes_t_checksum_set,
+    bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set,
+    bcmpkt_tcp_last_16bytes_t_seq_num_set,
+    bcmpkt_tcp_last_16bytes_t_urgent_ptr_set,
+    bcmpkt_tcp_last_16bytes_t_win_size_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_tcp_last_16bytes_t_field_data[] = {
+    BCM56890_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_29_tcp_last_16bytes_t_field_info = {
+    .num_fields = BCM56890_A0_CNA_6_5_29_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT,
+    .info = bcm56890_a0_cna_6_5_29_tcp_last_16bytes_t_field_data,
+};
+
+
+static int32_t bcmpkt_udp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_dst_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_src_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_src_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_udp_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_udp_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_29_udp_t_fget[BCM56890_A0_CNA_6_5_29_BCMPKT_UDP_T_FID_COUNT] = {
+    bcmpkt_udp_t_checksum_get,
+    bcmpkt_udp_t_dst_port_get,
+    bcmpkt_udp_t_src_port_get,
+    bcmpkt_udp_t_udp_length_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_29_udp_t_fset[BCM56890_A0_CNA_6_5_29_BCMPKT_UDP_T_FID_COUNT] = {
+    bcmpkt_udp_t_checksum_set,
+    bcmpkt_udp_t_dst_port_set,
+    bcmpkt_udp_t_src_port_set,
+    bcmpkt_udp_t_udp_length_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_udp_t_field_data[] = {
+    BCM56890_A0_CNA_6_5_29_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_29_udp_t_field_info = {
+    .num_fields = BCM56890_A0_CNA_6_5_29_BCMPKT_UDP_T_FID_COUNT,
+    .info = bcm56890_a0_cna_6_5_29_udp_t_field_data,
+};
+
+
+static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_29_unknown_l3_t_fget[BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = {
+    bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get,
+    bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_29_unknown_l3_t_fset[BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = {
+    bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set,
+    bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_unknown_l3_t_field_data[] = {
+    BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_29_unknown_l3_t_field_info = {
+    .num_fields = BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L3_T_FID_COUNT,
+    .info = bcm56890_a0_cna_6_5_29_unknown_l3_t_field_data,
+};
+
+
+static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_29_unknown_l4_t_fget[BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = {
+    bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_29_unknown_l4_t_fset[BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = {
+    bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_unknown_l4_t_field_data[] = {
+    BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_29_unknown_l4_t_field_info = {
+    .num_fields = BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L4_T_FID_COUNT,
+    .info = bcm56890_a0_cna_6_5_29_unknown_l4_t_field_data,
+};
+
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_29_unknown_l5_t_fget[BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = {
+    bcmpkt_unknown_l5_t_l5_bytes_0_1_get,
+    bcmpkt_unknown_l5_t_l5_bytes_2_3_get,
+    bcmpkt_unknown_l5_t_l5_bytes_4_7_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_29_unknown_l5_t_fset[BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = {
+    bcmpkt_unknown_l5_t_l5_bytes_0_1_set,
+    bcmpkt_unknown_l5_t_l5_bytes_2_3_set,
+    bcmpkt_unknown_l5_t_l5_bytes_4_7_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_unknown_l5_t_field_data[] = {
+    BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_29_unknown_l5_t_field_info = {
+    .num_fields = BCM56890_A0_CNA_6_5_29_BCMPKT_UNKNOWN_L5_T_FID_COUNT,
+    .info = bcm56890_a0_cna_6_5_29_unknown_l5_t_field_data,
+};
+
+
+static int32_t bcmpkt_vlan_t_cfi_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 12, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_cfi_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 12, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_pcp_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 13, 3);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_pcp_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 13, 3, val);
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_tpid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_vid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 12);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_vid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 12, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_29_vlan_t_fget[BCM56890_A0_CNA_6_5_29_BCMPKT_VLAN_T_FID_COUNT] = {
+    bcmpkt_vlan_t_cfi_get,
+    bcmpkt_vlan_t_pcp_get,
+    bcmpkt_vlan_t_tpid_get,
+    bcmpkt_vlan_t_vid_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_29_vlan_t_fset[BCM56890_A0_CNA_6_5_29_BCMPKT_VLAN_T_FID_COUNT] = {
+    bcmpkt_vlan_t_cfi_set,
+    bcmpkt_vlan_t_pcp_set,
+    bcmpkt_vlan_t_tpid_set,
+    bcmpkt_vlan_t_vid_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_vlan_t_field_data[] = {
+    BCM56890_A0_CNA_6_5_29_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_29_vlan_t_field_info = {
+    .num_fields = BCM56890_A0_CNA_6_5_29_BCMPKT_VLAN_T_FID_COUNT,
+    .info = bcm56890_a0_cna_6_5_29_vlan_t_field_data,
+};
+
+
+static int32_t bcmpkt_vxlan_t_flags_reserved_1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_vxlan_t_flags_reserved_1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_vxlan_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vxlan_t_reserved2_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_vxlan_t_vn_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 8, 24);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vxlan_t_vn_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 8, 24, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_29_vxlan_t_fget[BCM56890_A0_CNA_6_5_29_BCMPKT_VXLAN_T_FID_COUNT] = {
+    bcmpkt_vxlan_t_flags_reserved_1_get,
+    bcmpkt_vxlan_t_reserved2_get,
+    bcmpkt_vxlan_t_vn_id_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_29_vxlan_t_fset[BCM56890_A0_CNA_6_5_29_BCMPKT_VXLAN_T_FID_COUNT] = {
+    bcmpkt_vxlan_t_flags_reserved_1_set,
+    bcmpkt_vxlan_t_reserved2_set,
+    bcmpkt_vxlan_t_vn_id_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_29_vxlan_t_field_data[] = {
+    BCM56890_A0_CNA_6_5_29_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_29_vxlan_t_field_info = {
+    .num_fields = BCM56890_A0_CNA_6_5_29_BCMPKT_VXLAN_T_FID_COUNT,
+    .info = bcm56890_a0_cna_6_5_29_vxlan_t_field_data,
+};
+
+static bcmpkt_flex_pmd_info_t bcm56890_a0_cna_6_5_29_flexhdr_info_list[BCM56890_A0_CNA_6_5_29_BCMPKT_FLEXHDR_COUNT] = {
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_cna_6_5_29_arp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_cna_6_5_29_arp_t_fget,
+        .flex_fset = bcm56890_a0_cna_6_5_29_arp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_cna_6_5_29_cpu_composites_0_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_cna_6_5_29_cpu_composites_0_t_fget,
+        .flex_fset = bcm56890_a0_cna_6_5_29_cpu_composites_0_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_cna_6_5_29_cpu_composites_1_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_cna_6_5_29_cpu_composites_1_t_fget,
+        .flex_fset = bcm56890_a0_cna_6_5_29_cpu_composites_1_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_cna_6_5_29_ep_nih_header_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_cna_6_5_29_ep_nih_header_t_fget,
+        .flex_fset = bcm56890_a0_cna_6_5_29_ep_nih_header_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_cna_6_5_29_erspan3_fixed_hdr_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_cna_6_5_29_erspan3_fixed_hdr_t_fget,
+        .flex_fset = bcm56890_a0_cna_6_5_29_erspan3_fixed_hdr_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_cna_6_5_29_erspan3_subhdr_5_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_cna_6_5_29_erspan3_subhdr_5_t_fget,
+        .flex_fset = bcm56890_a0_cna_6_5_29_erspan3_subhdr_5_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_cna_6_5_29_ethertype_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_cna_6_5_29_ethertype_t_fget,
+        .flex_fset = bcm56890_a0_cna_6_5_29_ethertype_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_cna_6_5_29_generic_loopback_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_cna_6_5_29_generic_loopback_t_fget,
+        .flex_fset = bcm56890_a0_cna_6_5_29_generic_loopback_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_cna_6_5_29_icmp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_cna_6_5_29_icmp_t_fget,
+        .flex_fset = bcm56890_a0_cna_6_5_29_icmp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_cna_6_5_29_ipfix_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_cna_6_5_29_ipfix_t_fget,
+        .flex_fset = bcm56890_a0_cna_6_5_29_ipfix_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_cna_6_5_29_ipv4_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_cna_6_5_29_ipv4_t_fget,
+        .flex_fset = bcm56890_a0_cna_6_5_29_ipv4_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_cna_6_5_29_ipv6_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_cna_6_5_29_ipv6_t_fget,
+        .flex_fset = bcm56890_a0_cna_6_5_29_ipv6_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_cna_6_5_29_l2_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_cna_6_5_29_l2_t_fget,
+        .flex_fset = bcm56890_a0_cna_6_5_29_l2_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_cna_6_5_29_mirror_erspan_sn_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_cna_6_5_29_mirror_erspan_sn_t_fget,
+        .flex_fset = bcm56890_a0_cna_6_5_29_mirror_erspan_sn_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_cna_6_5_29_mirror_transport_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_cna_6_5_29_mirror_transport_t_fget,
+        .flex_fset = bcm56890_a0_cna_6_5_29_mirror_transport_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_cna_6_5_29_psamp_mirror_on_drop_0_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_cna_6_5_29_psamp_mirror_on_drop_0_t_fget,
+        .flex_fset = bcm56890_a0_cna_6_5_29_psamp_mirror_on_drop_0_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_cna_6_5_29_psamp_mirror_on_drop_1_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_cna_6_5_29_psamp_mirror_on_drop_1_t_fget,
+        .flex_fset = bcm56890_a0_cna_6_5_29_psamp_mirror_on_drop_1_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_cna_6_5_29_psamp_mirror_on_drop_2_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_cna_6_5_29_psamp_mirror_on_drop_2_t_fget,
+        .flex_fset = bcm56890_a0_cna_6_5_29_psamp_mirror_on_drop_2_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_cna_6_5_29_rarp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_cna_6_5_29_rarp_t_fget,
+        .flex_fset = bcm56890_a0_cna_6_5_29_rarp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_cna_6_5_29_tcp_first_4bytes_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_cna_6_5_29_tcp_first_4bytes_t_fget,
+        .flex_fset = bcm56890_a0_cna_6_5_29_tcp_first_4bytes_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_cna_6_5_29_tcp_last_16bytes_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_cna_6_5_29_tcp_last_16bytes_t_fget,
+        .flex_fset = bcm56890_a0_cna_6_5_29_tcp_last_16bytes_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_cna_6_5_29_udp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_cna_6_5_29_udp_t_fget,
+        .flex_fset = bcm56890_a0_cna_6_5_29_udp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_cna_6_5_29_unknown_l3_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_cna_6_5_29_unknown_l3_t_fget,
+        .flex_fset = bcm56890_a0_cna_6_5_29_unknown_l3_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_cna_6_5_29_unknown_l4_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_cna_6_5_29_unknown_l4_t_fget,
+        .flex_fset = bcm56890_a0_cna_6_5_29_unknown_l4_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_cna_6_5_29_unknown_l5_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_cna_6_5_29_unknown_l5_t_fget,
+        .flex_fset = bcm56890_a0_cna_6_5_29_unknown_l5_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_cna_6_5_29_vlan_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_cna_6_5_29_vlan_t_fget,
+        .flex_fset = bcm56890_a0_cna_6_5_29_vlan_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_cna_6_5_29_vxlan_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_cna_6_5_29_vxlan_t_fget,
+        .flex_fset = bcm56890_a0_cna_6_5_29_vxlan_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_cna_6_5_29_rxpmd_flex_field_info,
+        .reasons_info = &bcm56890_a0_cna_6_5_29_rxpmd_flex_reasons_info,
+        .flex_common_fget = bcm56890_a0_rxpmd_flex_fget,
+        .flex_common_fset = bcm56890_a0_rxpmd_flex_fset,
+    },
+};
+
+static shr_enum_map_t bcm56890_a0_cna_6_5_29_flexhdr_id_map[] = {
+    BCM56890_A0_CNA_6_5_29_BCMPKT_FLEXHDR_NAME_MAP_INIT
+};
+
+shr_enum_map_t * bcm56890_a0_cna_6_5_29_flexhdr_map_get(void)
+{
+    return bcm56890_a0_cna_6_5_29_flexhdr_id_map;
+}
+
+bcmpkt_flex_pmd_info_t * bcm56890_a0_cna_6_5_29_flex_pmd_info_get(uint32_t hid)
+{
+    if (hid >= BCM56890_A0_CNA_6_5_29_BCMPKT_FLEXHDR_COUNT) {
+        return NULL;
+    }
+
+    return &bcm56890_a0_cna_6_5_29_flexhdr_info_list[hid];
+}
+
+int bcm56890_a0_cna_6_5_29_flexhdr_variant_support_map[BCMPKT_PMD_COUNT] = {
+    7,
+    -1,
+    -1,
+    27,
+};
\ No newline at end of file
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_bcmpkt_rxpmd_match_id.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_bcmpkt_rxpmd_match_id.c
new file mode 100644
index 000000000..c4066744b
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_bcmpkt_rxpmd_match_id.c
@@ -0,0 +1,7234 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) bcm56890_a0_dna_6_5_29_1_2_sf_match_id_info.yml
+ * for device bcm56890_a0 and variant dna_6_5_29_1_2.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+
+#include <bcmpkt/bcmpkt_rxpmd_match_id.h>
+#include <bcmpkt/xfcr/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_bcmpkt_rxpmd_match_id_defs.h>
+
+static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l2_hdr_cntag[1] =
+{
+    0x366c,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l2_hdr_itag[1] =
+{
+    0x78f0,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l2_hdr_l2[1] =
+{
+    0x1fffe,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l2_hdr_otag[1] =
+{
+    0xff00,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l2_hdr_snap_or_llc[1] =
+{
+    0x1e4c8,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_arp[1] =
+{
+    0x4,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_auth_ext_1[39] =
+{
+    0x10,
+    0x400000,
+    0x1dd8000,
+    0x20,
+    0x0,
+    0x0,
+    0x0,
+    0xbfddfddf,
+    0xf77fbbfb,
+    0xddfddf77,
+    0x1,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x400000,
+    0x0,
+    0x100,
+    0x800776,
+    0x0,
+    0x0,
+    0x0,
+    0xf77c0000,
+    0xefeeff77,
+    0x7ddfddfe,
+    0x777f7,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_auth_ext_2[55] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x1dde,
+    0x0,
+    0x0,
+    0x7778,
+    0x0,
+    0x0,
+    0x1dde0,
+    0x0,
+    0xbc000000,
+    0x3b,
+    0x0,
+    0x0,
+    0x3bbc0,
+    0x0,
+    0x0,
+    0x77780,
+    0x0,
+    0x0,
+    0x3bbc0000,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x77780000,
+    0x0,
+    0x0,
+    0xdde00000,
+    0x1,
+    0x0,
+    0x77800000,
+    0x7,
+    0x0,
+    0xeef000,
+    0x0,
+    0x0,
+    0xef000000,
+    0xe,
+    0x0,
+    0xde000000,
+    0x1d,
+    0x0,
+    0x0,
+    0xeef0,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_bfd[57] =
+{
+    0x0,
+    0x0,
+    0x100000,
+    0x1000000,
+    0x0,
+    0x0,
+    0x2000,
+    0x100100,
+    0x4002002,
+    0x10010040,
+    0x400400,
+    0x10008008,
+    0x40040100,
+    0x1001000,
+    0x40040020,
+    0x100100,
+    0x4002002,
+    0x80080040,
+    0x200200,
+    0x2002000,
+    0x80040040,
+    0x200800,
+    0x4004002,
+    0x80080,
+    0x401001,
+    0x2001004,
+    0x40040020,
+    0x800800,
+    0x2002,
+    0x0,
+    0x0,
+    0x40,
+    0x400,
+    0x0,
+    0x80000000,
+    0x4000000,
+    0x80080040,
+    0x1001000,
+    0x10004004,
+    0x200100,
+    0x4004002,
+    0x40010010,
+    0x800400,
+    0x4010010,
+    0x80080040,
+    0x1001000,
+    0x8020020,
+    0x80000080,
+    0x1000800,
+    0x20020010,
+    0x80080,
+    0x2001001,
+    0x40040020,
+    0x40100100,
+    0x800800,
+    0x20010010,
+    0x80080200,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_dest_opt_ext_1[42] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xff77f77c,
+    0xddfeefee,
+    0x77f77ddf,
+    0x7,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xddf00000,
+    0xbfbbfddf,
+    0xf77f77fb,
+    0x1ddfdd,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_dest_opt_ext_2[55] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x1dde000,
+    0x0,
+    0x0,
+    0x7778000,
+    0x0,
+    0x0,
+    0x1dde0000,
+    0x0,
+    0x0,
+    0x3bbc0,
+    0x0,
+    0x0,
+    0x3bbc0000,
+    0x0,
+    0x0,
+    0x77780000,
+    0x0,
+    0x0,
+    0xc0000000,
+    0x3bb,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x80000000,
+    0x777,
+    0x0,
+    0x0,
+    0x1dde,
+    0x0,
+    0x0,
+    0x7778,
+    0x0,
+    0xef000000,
+    0xe,
+    0x0,
+    0x0,
+    0xeef0,
+    0x0,
+    0x0,
+    0x1dde0,
+    0x0,
+    0x0,
+    0xeef0000,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_esp_ext[55] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x40,
+    0x0,
+    0x0,
+    0x0,
+    0x2000000,
+    0x0,
+    0x0,
+    0x8000000,
+    0x0,
+    0x0,
+    0x20000008,
+    0x0,
+    0x0,
+    0x40000,
+    0x0,
+    0x0,
+    0x40000000,
+    0x0,
+    0x0,
+    0x80000000,
+    0x0,
+    0x0,
+    0x0,
+    0x400,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x1000000,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x800,
+    0x0,
+    0x0,
+    0x2000,
+    0x0,
+    0x200000,
+    0x8000,
+    0x0,
+    0x0,
+    0x10,
+    0x0,
+    0x0,
+    0x10000,
+    0x0,
+    0x0,
+    0x20000,
+    0x0,
+    0x0,
+    0x10000000,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ethertype[29] =
+{
+    0x1e,
+    0x400000,
+    0x1dd8000,
+    0x3ddcafe0,
+    0x0,
+    0x8000,
+    0xc003bb00,
+    0xbfddfddf,
+    0xf77fbbfb,
+    0xddfddf77,
+    0xff77f77d,
+    0xddfeefee,
+    0x77f77ddf,
+    0xfddfddff,
+    0x77f77fbb,
+    0xbfddfddf,
+    0xf77fbbfb,
+    0xefeeff77,
+    0x7fbbfbbe,
+    0xfbbfbbe5,
+    0xeff77f77,
+    0xbfbbeefe,
+    0xf77f77fb,
+    0xdfeefeef,
+    0x7f77ddfd,
+    0xfbbfddf7,
+    0x77f77fbb,
+    0xbeefeeff,
+    0x1bbbfb,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_frag_ext_1[45] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xfddfddf0,
+    0x77f77fbb,
+    0x1ddfddf,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x77c00000,
+    0xfeeff77f,
+    0xf77ddfdd,
+    0x777,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_frag_ext_2[56] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xbc000000,
+    0x3b,
+    0x0,
+    0xf0000000,
+    0xee,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x77780000,
+    0x0,
+    0x0,
+    0x80000000,
+    0x777,
+    0x0,
+    0x0,
+    0xeef,
+    0x0,
+    0x0,
+    0x777800,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xeef000,
+    0x0,
+    0x0,
+    0x3bbc000,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x1dde0,
+    0x0,
+    0x0,
+    0x1dde0000,
+    0x0,
+    0x0,
+    0x3bbc0000,
+    0x0,
+    0x0,
+    0xe0000000,
+    0x1dd,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_hop_by_hop_ext_1[48] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xbe000000,
+    0xf77fbbfb,
+    0xefeeff77,
+    0x3bbfbbe,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xefeef800,
+    0xfddfddfe,
+    0xeefbbfbb,
+    0xeef,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_hop_by_hop_ext_2[56] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x3bbc0,
+    0x0,
+    0x0,
+    0xeef00,
+    0x0,
+    0xc0000000,
+    0x3bb,
+    0x0,
+    0x80000000,
+    0x777,
+    0x0,
+    0x0,
+    0x777800,
+    0x0,
+    0x0,
+    0xeef000,
+    0x0,
+    0x0,
+    0x77800000,
+    0x7,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xef000000,
+    0xe,
+    0x0,
+    0xbc000000,
+    0x3b,
+    0x0,
+    0xeef0000,
+    0x0,
+    0x0,
+    0x1dde0000,
+    0x0,
+    0x0,
+    0xe0000000,
+    0x1dd,
+    0x0,
+    0xc0000000,
+    0x3bb,
+    0x0,
+    0x0,
+    0x1dde00,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_icmp[57] =
+{
+    0x0,
+    0x400000,
+    0x0,
+    0x80,
+    0x0,
+    0x8000,
+    0x0,
+    0x8004004,
+    0x140080,
+    0x400001,
+    0x20010010,
+    0x500200,
+    0x1000004,
+    0x80040040,
+    0x1001400,
+    0x8004000,
+    0x100080,
+    0x2002801,
+    0x4008000,
+    0x80080,
+    0x2801001,
+    0x8000020,
+    0x100100,
+    0x5002002,
+    0x10000040,
+    0x80080000,
+    0x1001000,
+    0x20028,
+    0x80,
+    0x0,
+    0x100,
+    0x2000000,
+    0x0,
+    0x0,
+    0x2,
+    0x100000,
+    0x2002001,
+    0x40050,
+    0x400100,
+    0x8008004,
+    0x100140,
+    0x1000400,
+    0x50020010,
+    0x400,
+    0x2002001,
+    0xa0040040,
+    0x800,
+    0x2001002,
+    0x40040020,
+    0x800a00,
+    0x4002000,
+    0x80080040,
+    0x1001400,
+    0x4000,
+    0x40020020,
+    0xa00400,
+    0x2000008,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ifa_header[48] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0xaf00,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x78000000,
+    0x5,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xbc000000,
+    0x2,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x15e000,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ifa_metadata[48] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x8800,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x40000000,
+    0x4,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x20000000,
+    0x2,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x110000,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_igmp[36] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x40020,
+    0x0,
+    0x0,
+    0x40000000,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x800000,
+    0x10,
+    0x0,
+    0x0,
+    0x10000,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv4[36] =
+{
+    0x18,
+    0x400000,
+    0x1dd8000,
+    0x3ddcafe0,
+    0x0,
+    0x8000,
+    0x4003bb00,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x600000,
+    0x0,
+    0x100,
+    0xbf800776,
+    0xf772,
+    0x0,
+    0xec000002,
+    0x1000e,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv6[58] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x80000000,
+    0xbfddfddf,
+    0xf77fbbfb,
+    0xddfddf77,
+    0xff77f77d,
+    0xddfeefee,
+    0x77f77ddf,
+    0xfddfddff,
+    0x77f77fbb,
+    0xbfddfddf,
+    0xf77fbbfb,
+    0xefeeff77,
+    0x7fbbfbbe,
+    0xfbbfbbe5,
+    0xeff77f77,
+    0xbfbbeefe,
+    0xf77f77fb,
+    0xdfeefeef,
+    0x7f77ddfd,
+    0xfbbfddf7,
+    0x77f77fbb,
+    0xbeefeeff,
+    0x3bbfb,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xf77e0000,
+    0xefeeff77,
+    0x7ddfddfe,
+    0xddf777f7,
+    0xbfbbfddf,
+    0xf77f77fb,
+    0x77fddfdd,
+    0xfeeff77f,
+    0xf77ddfdd,
+    0xefeeff77,
+    0xfddfddfe,
+    0xeefbbfbb,
+    0xef95feef,
+    0xfddfeefe,
+    0xbbfbbfdd,
+    0xdfeefeef,
+    0xfbbfddfd,
+    0x77f77fbb,
+    0x77ddfddf,
+    0xfeefeeff,
+    0xbbfddfdd,
+    0xefeefbbf,
+    0xe,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_p_1588[58] =
+{
+    0x0,
+    0x0,
+    0x400000,
+    0x4000000,
+    0x0,
+    0x0,
+    0x8000,
+    0x400400,
+    0x10008008,
+    0x40040100,
+    0x1001000,
+    0x40020020,
+    0x100400,
+    0x4004001,
+    0x100080,
+    0x400401,
+    0x10008008,
+    0x200100,
+    0x800802,
+    0x8008000,
+    0x100100,
+    0x802002,
+    0x10010008,
+    0x200200,
+    0x1004004,
+    0x8004010,
+    0x100080,
+    0x2002001,
+    0x8008,
+    0x0,
+    0x0,
+    0x100,
+    0x1000,
+    0x0,
+    0x0,
+    0x10000002,
+    0x200100,
+    0x4004002,
+    0x40010010,
+    0x800400,
+    0x10010008,
+    0x40040,
+    0x2001001,
+    0x10040040,
+    0x200100,
+    0x4004002,
+    0x20080080,
+    0x200,
+    0x4002002,
+    0x80080040,
+    0x200200,
+    0x8004004,
+    0x100080,
+    0x400401,
+    0x2002001,
+    0x80040040,
+    0x200800,
+    0x2,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_prog_ext_1[51] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xfbbfbbe0,
+    0xeff77f77,
+    0xbfbbeefe,
+    0x3b,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xef800000,
+    0xfddfeefe,
+    0xbbfbbfdd,
+    0xeefeef,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_prog_ext_2[57] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x77780000,
+    0x0,
+    0x0,
+    0xdde00000,
+    0x1,
+    0x0,
+    0x777800,
+    0x0,
+    0x0,
+    0xeef000,
+    0x0,
+    0x0,
+    0xef000000,
+    0xe,
+    0x0,
+    0xde000000,
+    0x1d,
+    0x0,
+    0x0,
+    0xeef0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x1dde0,
+    0x0,
+    0x0,
+    0x77780,
+    0x0,
+    0xe0000000,
+    0x1dd,
+    0x0,
+    0xc0000000,
+    0x3bb,
+    0x0,
+    0x0,
+    0x3bbc00,
+    0x0,
+    0x0,
+    0x777800,
+    0x0,
+    0x0,
+    0xbbc00000,
+    0x3,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rarp[29] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x80000,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rout_ext_1[54] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xf77f77c0,
+    0xdfeefeef,
+    0x7f77ddfd,
+    0x77,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xdf000000,
+    0xfbbfddfd,
+    0x77f77fbb,
+    0x1ddfddf,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rout_ext_2[57] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x80000000,
+    0x777,
+    0x0,
+    0x0,
+    0x1dde,
+    0x0,
+    0x77800000,
+    0x7,
+    0x0,
+    0xef000000,
+    0xe,
+    0x0,
+    0x0,
+    0xeef0,
+    0x0,
+    0x0,
+    0x1dde0,
+    0x0,
+    0x0,
+    0xeef0000,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x1dde0000,
+    0x0,
+    0x0,
+    0x77780000,
+    0x0,
+    0x0,
+    0x1dde00,
+    0x0,
+    0x0,
+    0x3bbc00,
+    0x0,
+    0x0,
+    0xbbc00000,
+    0x3,
+    0x0,
+    0x77800000,
+    0x7,
+    0x0,
+    0x0,
+    0x3bbc,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_first_4bytes[57] =
+{
+    0x0,
+    0x0,
+    0x58000,
+    0x580e00,
+    0x0,
+    0x0,
+    0xb00,
+    0xb0058058,
+    0x1600b00,
+    0x5805816,
+    0xc0160160,
+    0x5802c02,
+    0x16016058,
+    0x580580,
+    0x1601600b,
+    0xb0058058,
+    0x1600b00,
+    0x2c02c016,
+    0x700b00b0,
+    0xb00b00,
+    0x2c016016,
+    0xb00b02c0,
+    0x1601600,
+    0x5802c02c,
+    0x60160580,
+    0xb00581,
+    0x1601600b,
+    0xb02c02c0,
+    0xb00,
+    0x0,
+    0x0,
+    0x38000016,
+    0x160,
+    0x0,
+    0x2c000000,
+    0x1600000,
+    0x2c02c016,
+    0x60580580,
+    0x5801601,
+    0xb00b0058,
+    0x81601600,
+    0x16005805,
+    0x802c0160,
+    0x1605805,
+    0x2c02c016,
+    0x580580,
+    0x2c0b00b,
+    0x2c01c02c,
+    0x805802c0,
+    0xb00b005,
+    0x5802c02c,
+    0xb00580,
+    0x1601600b,
+    0x16058058,
+    0x802c02c0,
+    0xb005805,
+    0x2c02c0b0,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_last_16bytes[57] =
+{
+    0x0,
+    0x0,
+    0x50000,
+    0x500c00,
+    0x0,
+    0x0,
+    0xa00,
+    0xa0050050,
+    0x1400a00,
+    0x5005014,
+    0x80140140,
+    0x5002802,
+    0x14014050,
+    0x500500,
+    0x1401400a,
+    0xa0050050,
+    0x1400a00,
+    0x28028014,
+    0x600a00a0,
+    0xa00a00,
+    0x28014014,
+    0xa00a0280,
+    0x1401400,
+    0x50028028,
+    0x40140500,
+    0xa00501,
+    0x1401400a,
+    0xa0280280,
+    0xa00,
+    0x0,
+    0x0,
+    0x30000014,
+    0x140,
+    0x0,
+    0x28000000,
+    0x1400000,
+    0x28028014,
+    0x40500500,
+    0x5001401,
+    0xa00a0050,
+    0x1401400,
+    0x14005005,
+    0x280140,
+    0x1405005,
+    0x28028014,
+    0x500500,
+    0x280a00a,
+    0x28018028,
+    0x500280,
+    0xa00a005,
+    0x50028028,
+    0xa00500,
+    0x1401400a,
+    0x14050050,
+    0x280280,
+    0xa005005,
+    0x280280a0,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_udp[58] =
+{
+    0x0,
+    0x0,
+    0xd80000,
+    0xd80a000,
+    0x0,
+    0x0,
+    0x1b000,
+    0xd80d80,
+    0x3601b01b,
+    0xd80d8360,
+    0x3603600,
+    0xd806c06c,
+    0x60360d80,
+    0xd80d803,
+    0x603601b0,
+    0xd80d83,
+    0x3601b01b,
+    0xc06c0360,
+    0x1b01b06,
+    0x1b01b005,
+    0xc0360360,
+    0x1b06c06,
+    0x3603601b,
+    0x806c06c0,
+    0x360d80d,
+    0x1b00d836,
+    0x603601b0,
+    0x6c06c03,
+    0x1b01b,
+    0x0,
+    0x0,
+    0x80000360,
+    0x3602,
+    0x0,
+    0xc0000000,
+    0x36000006,
+    0xc06c0360,
+    0xd80d806,
+    0xd8036036,
+    0x1b00d80,
+    0x3603601b,
+    0x600d80d8,
+    0x6c03603,
+    0x360d80d8,
+    0xc06c0360,
+    0xd80d806,
+    0x6c1b01b0,
+    0xc01406c0,
+    0xd806c06,
+    0xb01b00d8,
+    0x806c06c1,
+    0x1b00d80d,
+    0x603601b0,
+    0x60d80d83,
+    0x6c06c03,
+    0xb00d80d8,
+    0xc06c1b01,
+    0x6,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l3[29] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x100000,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l4[58] =
+{
+    0x0,
+    0x0,
+    0x1000000,
+    0x10000000,
+    0x0,
+    0x0,
+    0x20000,
+    0x1001000,
+    0x40020020,
+    0x100400,
+    0x4004001,
+    0x80080,
+    0x401001,
+    0x10010004,
+    0x400200,
+    0x1001004,
+    0x40020020,
+    0x800400,
+    0x2002008,
+    0x20020000,
+    0x400400,
+    0x2008008,
+    0x40040020,
+    0x800800,
+    0x4010010,
+    0x20010040,
+    0x400200,
+    0x8008004,
+    0x20020,
+    0x0,
+    0x0,
+    0x400,
+    0x4000,
+    0x0,
+    0x0,
+    0x40000008,
+    0x800400,
+    0x10010008,
+    0x40040,
+    0x2001001,
+    0x40040020,
+    0x100100,
+    0x8004004,
+    0x40100100,
+    0x800400,
+    0x10010008,
+    0x80200200,
+    0x800,
+    0x10008008,
+    0x200100,
+    0x800802,
+    0x20010010,
+    0x400200,
+    0x1001004,
+    0x8008004,
+    0x100100,
+    0x802002,
+    0x8,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l5[58] =
+{
+    0x0,
+    0x0,
+    0x840000,
+    0x8400000,
+    0x0,
+    0x0,
+    0x10800,
+    0x80840840,
+    0x21010810,
+    0x84084210,
+    0x2102100,
+    0x84042042,
+    0x10210840,
+    0x8408402,
+    0x10210108,
+    0x80840842,
+    0x21010810,
+    0x20420210,
+    0x1081084,
+    0x10810800,
+    0x20210210,
+    0x81084204,
+    0x21021010,
+    0x40420420,
+    0x2108408,
+    0x10808421,
+    0x10210108,
+    0x84204202,
+    0x10810,
+    0x0,
+    0x0,
+    0x210,
+    0x2100,
+    0x0,
+    0x20000000,
+    0x21000004,
+    0x20420210,
+    0x8408404,
+    0x84021021,
+    0x81080840,
+    0x21021010,
+    0x10084084,
+    0x4202102,
+    0x21084084,
+    0x20420210,
+    0x8408404,
+    0x42108108,
+    0x20000420,
+    0x8404204,
+    0x8108084,
+    0x40420421,
+    0x10808408,
+    0x10210108,
+    0x10840842,
+    0x4204202,
+    0x8084084,
+    0x20421081,
+    0x4,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_wesp_ext_1[58] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x20000000,
+    0x0,
+    0x8000,
+    0x4003bb00,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xfbbe0000,
+    0x77f77fbb,
+    0xbeefeeff,
+    0x3bbfb,
+    0x0,
+    0x0,
+    0x0,
+    0x8000,
+    0x0,
+    0xec000002,
+    0x1000e,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xfeefeef8,
+    0xbbfddfdd,
+    0xefeefbbf,
+    0xe,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_wesp_ext_2[58] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xdde00000,
+    0x1,
+    0x0,
+    0x77800000,
+    0x7,
+    0x0,
+    0x1dde000,
+    0x0,
+    0x0,
+    0x3bbc000,
+    0x0,
+    0x0,
+    0xbc000000,
+    0x3b,
+    0x0,
+    0x78000000,
+    0x77,
+    0x0,
+    0x0,
+    0x3bbc0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x77780,
+    0x0,
+    0x0,
+    0x1dde00,
+    0x0,
+    0x80000000,
+    0x777,
+    0x0,
+    0x0,
+    0xeef,
+    0x0,
+    0x0,
+    0xeef000,
+    0x0,
+    0x0,
+    0x1dde000,
+    0x0,
+    0x0,
+    0xef000000,
+    0xe,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l2_hdr_cntag[4] =
+{
+    0x33033198,
+    0xcc66066,
+    0x198198cc,
+    0x6633033,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l2_hdr_gbp_ethernet_shim[4] =
+{
+    0x44044220,
+    0x11088088,
+    0x22022110,
+    0x8844044,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l2_hdr_hg3_base[4] =
+{
+    0xffc00000,
+    0xffffffff,
+    0xffe00000,
+    0x7fffffff,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l2_hdr_hg3_ext_0[4] =
+{
+    0x0,
+    0xfffff800,
+    0x0,
+    0x7ffffc00,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l2_hdr_itag[4] =
+{
+    0xf80f87c0,
+    0x3e1f01f0,
+    0x7c07c3e0,
+    0x1f0f80f8,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l2_hdr_l2[4] =
+{
+    0xfffffffe,
+    0xffffffff,
+    0xffffffff,
+    0x7fffffff,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l2_hdr_otag[4] =
+{
+    0x1ff800,
+    0x7fe003ff,
+    0x800ffc00,
+    0x3ff001ff,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l2_hdr_snap_or_llc[4] =
+{
+    0xa23a2510,
+    0xe8944744,
+    0x511d1288,
+    0x744a23a2,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l2_hdr_svtag[4] =
+{
+    0x0,
+    0x0,
+    0xffffffff,
+    0x7fffffff,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_arp[1] =
+{
+    0x4,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_auth_ext_1[13] =
+{
+    0x10,
+    0x0,
+    0x4,
+    0x20003df6,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xf7fbef80,
+    0xfbfdf7fd,
+    0x7dfefbfe,
+    0xf7dfefbf,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_auth_ext_2[34] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x7bef00,
+    0x0,
+    0x0,
+    0x0,
+    0x1efbc,
+    0x0,
+    0x0,
+    0xf0000000,
+    0x7be,
+    0x0,
+    0x0,
+    0xfbc00000,
+    0x1e,
+    0x0,
+    0x0,
+    0xc0000000,
+    0x1efb,
+    0x0,
+    0x0,
+    0xef000000,
+    0x7b,
+    0x0,
+    0x0,
+    0x0,
+    0x7bef000,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_bfd[39] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x40,
+    0x0,
+    0x10,
+    0x0,
+    0x0,
+    0x4000,
+    0x40008000,
+    0x20004000,
+    0x10002000,
+    0x1000200,
+    0x1000200,
+    0x800100,
+    0x400080,
+    0x40008,
+    0x40008,
+    0x40004,
+    0x20004002,
+    0x20000000,
+    0x10001000,
+    0x8000800,
+    0x800400,
+    0x40,
+    0x100020,
+    0x80010,
+    0x80040008,
+    0x80004000,
+    0x40004000,
+    0x20002000,
+    0x2001000,
+    0x400100,
+    0x80008,
+    0x40004,
+    0x20002,
+    0x10002001,
+    0x44444000,
+    0x44,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dest_opt_ext_1[17] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xf7dfefbe,
+    0xfbeff7df,
+    0xfdf7fbef,
+    0x3df7fbe,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dest_opt_ext_2[35] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xf7800000,
+    0x3d,
+    0x0,
+    0x0,
+    0xf7de0000,
+    0x0,
+    0x0,
+    0x0,
+    0x3df7800,
+    0x0,
+    0x0,
+    0x0,
+    0xf7de0,
+    0x0,
+    0x0,
+    0x0,
+    0xf7de000,
+    0x0,
+    0x0,
+    0x0,
+    0x3df780,
+    0x0,
+    0x0,
+    0x0,
+    0x78000000,
+    0x3df,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_esp_ext[35] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x40000000,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x40,
+    0x0,
+    0x0,
+    0x0,
+    0x1,
+    0x0,
+    0x4000000,
+    0x4000000,
+    0x0,
+    0x0,
+    0x0,
+    0x100000,
+    0x0,
+    0x0,
+    0x0,
+    0x10000000,
+    0x0,
+    0x0,
+    0x0,
+    0x400000,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x400,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ethertype[39] =
+{
+    0x1e,
+    0x0,
+    0x4,
+    0xe0003df6,
+    0xe22fffff,
+    0x1f7d,
+    0x0,
+    0x400,
+    0x3df600,
+    0xf7fbefe0,
+    0xfbfdf7fd,
+    0x7dfefbfe,
+    0xf7dfefbf,
+    0xf7dfefbe,
+    0xfbeff7df,
+    0xfdf7fbef,
+    0xffdf7fbe,
+    0x7fdf7fbe,
+    0xbfdf7fdf,
+    0xfbfdf7ef,
+    0xfbfffffe,
+    0x7dff7dfe,
+    0xbeffbeff,
+    0xfbefdf7f,
+    0xf117fdf7,
+    0xff7dfefb,
+    0xffbeff7d,
+    0xefdf7fbe,
+    0xeffdf7fb,
+    0xf7fdf7fb,
+    0xfbfefbfd,
+    0xefbf7dfe,
+    0xfdf7f7df,
+    0x7fbeffbe,
+    0xbfdf7fdf,
+    0xdfefbfef,
+    0x7dfefbf7,
+    0xffffffef,
+    0x7ff,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_frag_ext_1[21] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xf8000000,
+    0x7fdf7fbe,
+    0xbfdf7fdf,
+    0xfbfdf7ef,
+    0x1e,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_frag_ext_2[35] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x3df780,
+    0x0,
+    0x0,
+    0x0,
+    0xf7de,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x7de00000,
+    0xf,
+    0x0,
+    0x0,
+    0xe0000000,
+    0xf7d,
+    0x0,
+    0x0,
+    0xf7800000,
+    0x3d,
+    0x0,
+    0x0,
+    0x0,
+    0x3df7800,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gpe[37] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x180,
+    0x0,
+    0x60,
+    0x0,
+    0x0,
+    0x18000,
+    0x80030000,
+    0xc0018001,
+    0x6000c000,
+    0x6000c00,
+    0x6000c00,
+    0x3000600,
+    0x1800300,
+    0x180030,
+    0x180030,
+    0x180018,
+    0xc001800c,
+    0xc0000000,
+    0x60006000,
+    0x30003000,
+    0x3001800,
+    0x180,
+    0x6000c0,
+    0x300060,
+    0x180030,
+    0x18003,
+    0x80018003,
+    0xc000c001,
+    0xc006000,
+    0x1800600,
+    0x300030,
+    0x180018,
+    0xc000c,
+    0x6000c006,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre[21] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x80000000,
+    0x7fff,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x1fffe0,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_chksum[21] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x1fe,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x7f80,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_key[21] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x1e3c,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x78f00,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_rout[21] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x5568,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x155a00,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_seq[21] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x79b0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x1e6c00,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_hop_by_hop_ext_1[25] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xfbe00000,
+    0x7dff7dfe,
+    0xbeffbeff,
+    0xfbefdf7f,
+    0x3df7,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_hop_by_hop_ext_2[36] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xfbc00000,
+    0x1e,
+    0x0,
+    0x0,
+    0x7bef0000,
+    0x0,
+    0x0,
+    0x78000000,
+    0x3df,
+    0x0,
+    0x0,
+    0x0,
+    0x7bef0,
+    0x0,
+    0x0,
+    0x0,
+    0x7bef000,
+    0x0,
+    0x0,
+    0x0,
+    0x1efbc0,
+    0x0,
+    0x0,
+    0x0,
+    0xbc000000,
+    0x1ef,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_icmp[37] =
+{
+    0x0,
+    0x0,
+    0x4,
+    0x0,
+    0x8000,
+    0x0,
+    0x0,
+    0x400,
+    0x0,
+    0x1000200,
+    0x800100,
+    0x4000a0,
+    0x40000,
+    0x40008,
+    0x80020004,
+    0x10002,
+    0x20001000,
+    0x10001000,
+    0x8001400,
+    0x800000,
+    0x800000,
+    0x400040,
+    0x280020,
+    0x10,
+    0x80004001,
+    0x40004000,
+    0x28002000,
+    0x1000,
+    0x2000100,
+    0x1000100,
+    0xa00080,
+    0x40,
+    0x4,
+    0x10002000,
+    0x8001000,
+    0x4000a00,
+    0x400000,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_header[25] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x22f0000,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x1178000,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_metadata[25] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x2080000,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x1040000,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_igmp[10] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x20000000,
+    0x20000000,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x20,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ioam_e2e[37] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x100,
+    0x0,
+    0x40,
+    0x0,
+    0x0,
+    0x10000,
+    0x20000,
+    0x80010001,
+    0x40008000,
+    0x4000800,
+    0x4000800,
+    0x2000400,
+    0x1000200,
+    0x100020,
+    0x100020,
+    0x100010,
+    0x80010008,
+    0x80000000,
+    0x40004000,
+    0x20002000,
+    0x2001000,
+    0x100,
+    0x400080,
+    0x200040,
+    0x100020,
+    0x10002,
+    0x10002,
+    0x80008001,
+    0x8004000,
+    0x1000400,
+    0x200020,
+    0x100010,
+    0x80008,
+    0x40008004,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv4[10] =
+{
+    0x18,
+    0x0,
+    0x4,
+    0xe0003df6,
+    0xe22fffff,
+    0x1f7d,
+    0x0,
+    0x400,
+    0x3df600,
+    0x20,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv6[38] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xf7fbefc0,
+    0xfbfdf7fd,
+    0x7dfefbfe,
+    0xf7dfefbf,
+    0xf7dfefbe,
+    0xfbeff7df,
+    0xfdf7fbef,
+    0xffdf7fbe,
+    0x7fdf7fbe,
+    0xbfdf7fdf,
+    0xfbfdf7ef,
+    0xfbfffffe,
+    0x7dff7dfe,
+    0xbeffbeff,
+    0xfbefdf7f,
+    0xf117fdf7,
+    0xff7dfefb,
+    0xffbeff7d,
+    0xefdf7fbe,
+    0xeffdf7fb,
+    0xf7fdf7fb,
+    0xfbfefbfd,
+    0xefbf7dfe,
+    0xfdf7f7df,
+    0x7fbeffbe,
+    0xbfdf7fdf,
+    0xdfefbfef,
+    0x7dfefbf7,
+    0xf,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls0[39] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xffffffe0,
+    0xff,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls1[39] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xffffffc0,
+    0xf,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls2[38] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xffffff80,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls3[38] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xfffff00,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls4[38] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xfffe00,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls5[38] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xffc00,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls6[38] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xf800,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls_ach[39] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x66666000,
+    0x66,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls_cw[39] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x88888000,
+    0x88,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_p_1588[39] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x400,
+    0x0,
+    0x100,
+    0x0,
+    0x0,
+    0x40000,
+    0x80000,
+    0x40004,
+    0x20002,
+    0x10002001,
+    0x10002000,
+    0x8001000,
+    0x4000800,
+    0x400080,
+    0x400080,
+    0x400040,
+    0x40020,
+    0x2,
+    0x10002,
+    0x80008001,
+    0x8004000,
+    0x400,
+    0x1000200,
+    0x800100,
+    0x400080,
+    0x40008,
+    0x40008,
+    0x20004,
+    0x20010002,
+    0x4001000,
+    0x800080,
+    0x400040,
+    0x200020,
+    0x20010,
+    0x1,
+    0x100,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_prog_ext_1[29] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xe0000000,
+    0xff7dfefb,
+    0xffbeff7d,
+    0xefdf7fbe,
+    0x3df7fb,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_prog_ext_2[36] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x1efbc0,
+    0x0,
+    0x0,
+    0x0,
+    0x7bef,
+    0x0,
+    0x0,
+    0x3df7800,
+    0x0,
+    0x0,
+    0x0,
+    0xbef00000,
+    0x7,
+    0x0,
+    0x0,
+    0xf0000000,
+    0x7be,
+    0x0,
+    0x0,
+    0xfbc00000,
+    0x1e,
+    0x0,
+    0x0,
+    0x0,
+    0x1efbc00,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rarp[39] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x200,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rout_ext_1[33] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xef800000,
+    0xf7fdf7fb,
+    0xfbfefbfd,
+    0xefbf7dfe,
+    0xf7df,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rout_ext_2[37] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x7de00000,
+    0xf,
+    0x0,
+    0x0,
+    0x3df78000,
+    0x0,
+    0x0,
+    0xbc000000,
+    0x1ef,
+    0x0,
+    0x0,
+    0x0,
+    0x3df78,
+    0x0,
+    0x0,
+    0x0,
+    0x3df7800,
+    0x0,
+    0x0,
+    0x0,
+    0xf7de0,
+    0x0,
+    0x0,
+    0x0,
+    0xde000000,
+    0xf7,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_seg_rout_ext_1[33] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x3df70000,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_first_4bytes[37] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x16,
+    0x800e0000,
+    0x5,
+    0x0,
+    0x0,
+    0x1600,
+    0x16002c00,
+    0xb001600,
+    0x5800b00,
+    0x5800b0,
+    0x5800b0,
+    0x2c0058,
+    0xc016002c,
+    0xc0016002,
+    0x60016002,
+    0xb0016001,
+    0xb001600,
+    0xb000000,
+    0x5800580,
+    0x2c002c0,
+    0x2c0160,
+    0x70016,
+    0x8005800b,
+    0xc002c005,
+    0x2c016002,
+    0x2c001600,
+    0x16001600,
+    0xb000b00,
+    0xb00580,
+    0xc0160058,
+    0x6002c002,
+    0xb0016001,
+    0x5800b000,
+    0x5800b00,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_last_16bytes[37] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x14,
+    0xc0000,
+    0x5,
+    0x0,
+    0x0,
+    0x1400,
+    0x14002800,
+    0xa001400,
+    0x5000a00,
+    0x5000a0,
+    0x5000a0,
+    0x280050,
+    0x80140028,
+    0x80014002,
+    0x40014002,
+    0xa0014001,
+    0xa001400,
+    0xa000000,
+    0x5000500,
+    0x2800280,
+    0x280140,
+    0x60014,
+    0x5000a,
+    0x80028005,
+    0x28014002,
+    0x28001400,
+    0x14001400,
+    0xa000a00,
+    0xa00500,
+    0x80140050,
+    0x40028002,
+    0xa0014001,
+    0x5000a000,
+    0x5000a00,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_udp[38] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x1de0,
+    0x2200000,
+    0x778,
+    0x0,
+    0x0,
+    0x1de000,
+    0xe03bc000,
+    0xf01de01d,
+    0x780ef00e,
+    0x7780ef07,
+    0x7780ef00,
+    0x3bc07780,
+    0x1de03bc0,
+    0x1de03bc,
+    0x1de03bc,
+    0x1de01de,
+    0xf01de0ef,
+    0xf000000e,
+    0x7807780e,
+    0xbc03bc07,
+    0x3bc1de03,
+    0x1101de0,
+    0x7780ef0,
+    0x3bc0778,
+    0xc1de03bc,
+    0xc01de03b,
+    0xe01de03b,
+    0xf00ef01d,
+    0xef07780e,
+    0x1de07780,
+    0x3bc03bc,
+    0x1de01de,
+    0x80ef00ef,
+    0x780ef077,
+    0x7,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l3[39] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x400,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l4[38] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x2000,
+    0x0,
+    0x800,
+    0x0,
+    0x0,
+    0x200000,
+    0x400000,
+    0x200020,
+    0x100010,
+    0x80010008,
+    0x80010000,
+    0x40008000,
+    0x20004000,
+    0x2000400,
+    0x2000400,
+    0x2000200,
+    0x200100,
+    0x10,
+    0x80010,
+    0x40008,
+    0x40020004,
+    0x2000,
+    0x8001000,
+    0x4000800,
+    0x2000400,
+    0x200040,
+    0x200040,
+    0x100020,
+    0x80010,
+    0x20008001,
+    0x4000400,
+    0x2000200,
+    0x1000100,
+    0x100080,
+    0x8,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l5[38] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x810,
+    0x0,
+    0x204,
+    0x0,
+    0x0,
+    0x81000,
+    0x10102000,
+    0x8081008,
+    0x4040804,
+    0x20404082,
+    0x20404080,
+    0x10202040,
+    0x8101020,
+    0x810102,
+    0x810102,
+    0x80810081,
+    0x8081040,
+    0x8000004,
+    0x4020404,
+    0x2010202,
+    0x10208101,
+    0x810,
+    0x2040408,
+    0x1020204,
+    0x20810102,
+    0x20081010,
+    0x10081010,
+    0x8040808,
+    0x40820404,
+    0x8102040,
+    0x1020102,
+    0x80810081,
+    0x40408040,
+    0x4040820,
+    0x2,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_vxlan[38] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x1000,
+    0x0,
+    0x400,
+    0x0,
+    0x0,
+    0x100000,
+    0x200000,
+    0x100010,
+    0x80008,
+    0x40008004,
+    0x40008000,
+    0x20004000,
+    0x10002000,
+    0x1000200,
+    0x1000200,
+    0x1000100,
+    0x100080,
+    0x8,
+    0x40008,
+    0x20004,
+    0x20010002,
+    0x1000,
+    0x4000800,
+    0x2000400,
+    0x1000200,
+    0x100020,
+    0x100020,
+    0x80010,
+    0x80040008,
+    0x10004000,
+    0x2000200,
+    0x1000100,
+    0x800080,
+    0x80040,
+    0x4,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_wesp_ext_1[38] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x1000,
+    0x0,
+    0x400,
+    0x3df600,
+    0x20,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x7fbef800,
+    0xbfdf7fdf,
+    0xdfefbfef,
+    0x7dfefbf7,
+    0xf,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_wesp_ext_2[38] =
+{
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+    0xf7de0000,
+    0x0,
+    0x0,
+    0x0,
+    0x3df7800,
+    0x0,
+    0x0,
+    0xfbc00000,
+    0x1e,
+    0x0,
+    0x0,
+    0x80000000,
+    0x3df7,
+    0x0,
+    0x0,
+    0x0,
+    0x3df780,
+    0x0,
+    0x0,
+    0x0,
+    0xf7de,
+    0x0,
+    0x0,
+    0x0,
+    0x7de00000,
+    0xf,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_sys_hdr_ep_nih[1] =
+{
+    0x4,
+};
+
+static uint32_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_sys_hdr_loopback[1] =
+{
+    0x8,
+};
+
+
+static bcmpkt_rxpmd_match_id_db_t
+bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_COUNT] = {
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_CNTAG */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_CNTAG",
+        .match        = 0x100,
+        .match_mask   = 0x180,
+        .match_maxbit = 37,
+        .match_minbit = 29,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x2,
+        .pmaxbit      = 37,
+        .pminbit      = 29,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM",
+        .match        = 0x80,
+        .match_mask   = 0x180,
+        .match_maxbit = 37,
+        .match_minbit = 29,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 37,
+        .pminbit      = 29,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_HG3_BASE",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 37,
+        .match_minbit = 29,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 37,
+        .pminbit      = 29,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0 */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0",
+        .match        = 0x10,
+        .match_mask   = 0x10,
+        .match_maxbit = 37,
+        .match_minbit = 29,
+        .maxbit       = 4,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 37,
+        .pminbit      = 29,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_ITAG",
+        .match        = 0x40,
+        .match_mask   = 0x40,
+        .match_maxbit = 37,
+        .match_minbit = 29,
+        .maxbit       = 6,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 37,
+        .pminbit      = 29,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_L2",
+        .match        = 0x2,
+        .match_mask   = 0x2,
+        .match_maxbit = 37,
+        .match_minbit = 29,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 37,
+        .pminbit      = 29,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x1ff,
+        .match_maxbit = 37,
+        .match_minbit = 29,
+        .maxbit       = 8,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 37,
+        .pminbit      = 29,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_OTAG",
+        .match        = 0x20,
+        .match_mask   = 0x20,
+        .match_maxbit = 37,
+        .match_minbit = 29,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 37,
+        .pminbit      = 29,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC",
+        .match        = 0x4,
+        .match_mask   = 0x4,
+        .match_maxbit = 37,
+        .match_minbit = 29,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 37,
+        .pminbit      = 29,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SVTAG */
+        .name         = "EGRESS_PKT_FWD_L2_HDR_SVTAG",
+        .match        = 0x8,
+        .match_mask   = 0x8,
+        .match_maxbit = 37,
+        .match_minbit = 29,
+        .maxbit       = 3,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 37,
+        .pminbit      = 29,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ARP",
+        .match        = 0x4000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 55,
+        .match_minbit = 38,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 38,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1",
+        .match        = 0x24000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 55,
+        .match_minbit = 38,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0x9,
+        .pmaxbit      = 55,
+        .pminbit      = 38,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2",
+        .match        = 0x140,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 55,
+        .match_minbit = 38,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x5,
+        .pmaxbit      = 55,
+        .pminbit      = 38,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_BFD",
+        .match        = 0x3000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 55,
+        .match_minbit = 38,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x6,
+        .pmaxbit      = 55,
+        .pminbit      = 38,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1",
+        .match        = 0x2c000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 55,
+        .match_minbit = 38,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0xb,
+        .pmaxbit      = 55,
+        .pminbit      = 38,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2",
+        .match        = 0x200,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 55,
+        .match_minbit = 38,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x8,
+        .pmaxbit      = 55,
+        .pminbit      = 38,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT",
+        .match        = 0x40,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 55,
+        .match_minbit = 38,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 38,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 55,
+        .match_minbit = 38,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 38,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1",
+        .match        = 0x30000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 55,
+        .match_minbit = 38,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0xc,
+        .pmaxbit      = 55,
+        .pminbit      = 38,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2",
+        .match        = 0x240,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 55,
+        .match_minbit = 38,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x9,
+        .pmaxbit      = 55,
+        .pminbit      = 38,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GPE",
+        .match        = 0x30,
+        .match_mask   = 0x438,
+        .match_maxbit = 55,
+        .match_minbit = 38,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 38,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE",
+        .match        = 0x18,
+        .match_mask   = 0x418,
+        .match_maxbit = 55,
+        .match_minbit = 38,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x3,
+        .pmaxbit      = 55,
+        .pminbit      = 38,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM",
+        .match        = 0x80,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 55,
+        .match_minbit = 38,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x2,
+        .pmaxbit      = 55,
+        .pminbit      = 38,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY",
+        .match        = 0x1800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 55,
+        .match_minbit = 38,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x3,
+        .pmaxbit      = 55,
+        .pminbit      = 38,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT",
+        .match        = 0x10000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 55,
+        .match_minbit = 38,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0x4,
+        .pmaxbit      = 55,
+        .pminbit      = 38,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ",
+        .match        = 0x38,
+        .match_mask   = 0x438,
+        .match_maxbit = 55,
+        .match_minbit = 38,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 38,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1",
+        .match        = 0x8000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 55,
+        .match_minbit = 38,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0x2,
+        .pmaxbit      = 55,
+        .pminbit      = 38,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2",
+        .match        = 0xc0,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 55,
+        .match_minbit = 38,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x3,
+        .pmaxbit      = 55,
+        .pminbit      = 38,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ICMP",
+        .match        = 0x800,
+        .match_mask   = 0x3818,
+        .match_maxbit = 55,
+        .match_minbit = 38,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 38,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER",
+        .match        = 0x2c0,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 55,
+        .match_minbit = 38,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0xb,
+        .pmaxbit      = 55,
+        .pminbit      = 38,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA",
+        .match        = 0xc000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 55,
+        .match_minbit = 38,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0x3,
+        .pmaxbit      = 55,
+        .pminbit      = 38,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IGMP",
+        .match        = 0x100,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 55,
+        .match_minbit = 38,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x4,
+        .pmaxbit      = 55,
+        .pminbit      = 38,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E",
+        .match        = 0x1000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 55,
+        .match_minbit = 38,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x2,
+        .pmaxbit      = 55,
+        .pminbit      = 38,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IPV4",
+        .match        = 0x2,
+        .match_mask   = 0x406,
+        .match_maxbit = 55,
+        .match_minbit = 38,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 38,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_IPV6",
+        .match        = 0x4,
+        .match_mask   = 0x406,
+        .match_maxbit = 55,
+        .match_minbit = 38,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x2,
+        .pmaxbit      = 55,
+        .pminbit      = 38,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS0",
+        .match        = 0x400,
+        .match_mask   = 0x400,
+        .match_maxbit = 55,
+        .match_minbit = 38,
+        .maxbit       = 10,
+        .minbit       = 10,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 38,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS1",
+        .match        = 0x402,
+        .match_mask   = 0x402,
+        .match_maxbit = 55,
+        .match_minbit = 38,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 38,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS2",
+        .match        = 0x404,
+        .match_mask   = 0x404,
+        .match_maxbit = 55,
+        .match_minbit = 38,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 38,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS3",
+        .match        = 0x408,
+        .match_mask   = 0x408,
+        .match_maxbit = 55,
+        .match_minbit = 38,
+        .maxbit       = 3,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 38,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS4",
+        .match        = 0x410,
+        .match_mask   = 0x410,
+        .match_maxbit = 55,
+        .match_minbit = 38,
+        .maxbit       = 4,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 38,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS5",
+        .match        = 0x420,
+        .match_mask   = 0x420,
+        .match_maxbit = 55,
+        .match_minbit = 38,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 38,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS6",
+        .match        = 0x440,
+        .match_mask   = 0x440,
+        .match_maxbit = 55,
+        .match_minbit = 38,
+        .maxbit       = 6,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 38,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH",
+        .match        = 0x480,
+        .match_mask   = 0x480,
+        .match_maxbit = 55,
+        .match_minbit = 38,
+        .maxbit       = 7,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 38,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW",
+        .match        = 0x500,
+        .match_mask   = 0x500,
+        .match_maxbit = 55,
+        .match_minbit = 38,
+        .maxbit       = 8,
+        .minbit       = 8,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 38,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x3ffff,
+        .match_maxbit = 55,
+        .match_minbit = 38,
+        .maxbit       = 17,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 55,
+        .pminbit      = 38,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_P_1588",
+        .match        = 0x2800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 55,
+        .match_minbit = 38,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x5,
+        .pmaxbit      = 55,
+        .pminbit      = 38,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1",
+        .match        = 0x34000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 55,
+        .match_minbit = 38,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0xd,
+        .pmaxbit      = 55,
+        .pminbit      = 38,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2",
+        .match        = 0x280,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 55,
+        .match_minbit = 38,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0xa,
+        .pmaxbit      = 55,
+        .pminbit      = 38,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_RARP",
+        .match        = 0x14000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 55,
+        .match_minbit = 38,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0x5,
+        .pmaxbit      = 55,
+        .pminbit      = 38,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1",
+        .match        = 0x20000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 55,
+        .match_minbit = 38,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0x8,
+        .pmaxbit      = 55,
+        .pminbit      = 38,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2",
+        .match        = 0x1c0,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 55,
+        .match_minbit = 38,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x7,
+        .pmaxbit      = 55,
+        .pminbit      = 38,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_SEG_ROUT_EXT_1 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_SEG_ROUT_EXT_1",
+        .match        = 0x18000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 55,
+        .match_minbit = 38,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0x6,
+        .pmaxbit      = 55,
+        .pminbit      = 38,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES",
+        .match        = 0x8,
+        .match_mask   = 0x418,
+        .match_maxbit = 55,
+        .match_minbit = 38,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 38,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES",
+        .match        = 0x28,
+        .match_mask   = 0x438,
+        .match_maxbit = 55,
+        .match_minbit = 38,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 38,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UDP",
+        .match        = 0x10,
+        .match_mask   = 0x418,
+        .match_maxbit = 55,
+        .match_minbit = 38,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x2,
+        .pmaxbit      = 55,
+        .pminbit      = 38,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3",
+        .match        = 0x1c000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 55,
+        .match_minbit = 38,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0x7,
+        .pmaxbit      = 55,
+        .pminbit      = 38,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4",
+        .match        = 0x2000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 55,
+        .match_minbit = 38,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x4,
+        .pmaxbit      = 55,
+        .pminbit      = 38,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5",
+        .match        = 0x3800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 55,
+        .match_minbit = 38,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x7,
+        .pmaxbit      = 55,
+        .pminbit      = 38,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_VXLAN",
+        .match        = 0x810,
+        .match_mask   = 0x3c18,
+        .match_maxbit = 55,
+        .match_minbit = 38,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 38,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1",
+        .match        = 0x28000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 55,
+        .match_minbit = 38,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0xa,
+        .pmaxbit      = 55,
+        .pminbit      = 38,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2 */
+        .name         = "EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2",
+        .match        = 0x180,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 55,
+        .match_minbit = 38,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x6,
+        .pmaxbit      = 55,
+        .pminbit      = 38,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH */
+        .name         = "EGRESS_PKT_SYS_HDR_EP_NIH",
+        .match        = 0x2,
+        .match_mask   = 0x3,
+        .match_maxbit = 1,
+        .match_minbit = 0,
+        .maxbit       = 1,
+        .minbit       = 0,
+        .value        = 0x2,
+        .pmaxbit      = 1,
+        .pminbit      = 0,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK */
+        .name         = "EGRESS_PKT_SYS_HDR_LOOPBACK",
+        .match        = 0x1,
+        .match_mask   = 0x3,
+        .match_maxbit = 1,
+        .match_minbit = 0,
+        .maxbit       = 1,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 1,
+        .pminbit      = 0,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE */
+        .name         = "EGRESS_PKT_SYS_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x3,
+        .match_maxbit = 1,
+        .match_minbit = 0,
+        .maxbit       = 1,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 1,
+        .pminbit      = 0,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_CNTAG */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_CNTAG",
+        .match        = 0x100,
+        .match_mask   = 0x180,
+        .match_maxbit = 10,
+        .match_minbit = 2,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x2,
+        .pmaxbit      = 10,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM",
+        .match        = 0x80,
+        .match_mask   = 0x180,
+        .match_maxbit = 10,
+        .match_minbit = 2,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 10,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 10,
+        .match_minbit = 2,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 10,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0 */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0",
+        .match        = 0x10,
+        .match_mask   = 0x10,
+        .match_maxbit = 10,
+        .match_minbit = 2,
+        .maxbit       = 4,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 10,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_ITAG",
+        .match        = 0x40,
+        .match_mask   = 0x40,
+        .match_maxbit = 10,
+        .match_minbit = 2,
+        .maxbit       = 6,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 10,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_L2",
+        .match        = 0x2,
+        .match_mask   = 0x2,
+        .match_maxbit = 10,
+        .match_minbit = 2,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 10,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x1ff,
+        .match_maxbit = 10,
+        .match_minbit = 2,
+        .maxbit       = 8,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 10,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_OTAG",
+        .match        = 0x20,
+        .match_mask   = 0x20,
+        .match_maxbit = 10,
+        .match_minbit = 2,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 10,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC",
+        .match        = 0x4,
+        .match_mask   = 0x4,
+        .match_maxbit = 10,
+        .match_minbit = 2,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 10,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SVTAG */
+        .name         = "EGRESS_PKT_TUNNEL_L2_HDR_SVTAG",
+        .match        = 0x8,
+        .match_mask   = 0x8,
+        .match_maxbit = 10,
+        .match_minbit = 2,
+        .maxbit       = 3,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 10,
+        .pminbit      = 2,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP",
+        .match        = 0x4000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 28,
+        .match_minbit = 11,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 11,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1",
+        .match        = 0x24000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 28,
+        .match_minbit = 11,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0x9,
+        .pmaxbit      = 28,
+        .pminbit      = 11,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2",
+        .match        = 0x140,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 28,
+        .match_minbit = 11,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x5,
+        .pmaxbit      = 28,
+        .pminbit      = 11,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD",
+        .match        = 0x3000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 28,
+        .match_minbit = 11,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x6,
+        .pmaxbit      = 28,
+        .pminbit      = 11,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1",
+        .match        = 0x2c000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 28,
+        .match_minbit = 11,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0xb,
+        .pmaxbit      = 28,
+        .pminbit      = 11,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2",
+        .match        = 0x200,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 28,
+        .match_minbit = 11,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x8,
+        .pmaxbit      = 28,
+        .pminbit      = 11,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT",
+        .match        = 0x40,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 28,
+        .match_minbit = 11,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 11,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 28,
+        .match_minbit = 11,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 11,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1",
+        .match        = 0x30000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 28,
+        .match_minbit = 11,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0xc,
+        .pmaxbit      = 28,
+        .pminbit      = 11,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2",
+        .match        = 0x240,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 28,
+        .match_minbit = 11,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x9,
+        .pmaxbit      = 28,
+        .pminbit      = 11,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE",
+        .match        = 0x30,
+        .match_mask   = 0x438,
+        .match_maxbit = 28,
+        .match_minbit = 11,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 11,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE",
+        .match        = 0x18,
+        .match_mask   = 0x418,
+        .match_maxbit = 28,
+        .match_minbit = 11,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x3,
+        .pmaxbit      = 28,
+        .pminbit      = 11,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM",
+        .match        = 0x80,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 28,
+        .match_minbit = 11,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x2,
+        .pmaxbit      = 28,
+        .pminbit      = 11,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY",
+        .match        = 0x1800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 28,
+        .match_minbit = 11,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x3,
+        .pmaxbit      = 28,
+        .pminbit      = 11,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT",
+        .match        = 0x10000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 28,
+        .match_minbit = 11,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0x4,
+        .pmaxbit      = 28,
+        .pminbit      = 11,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ",
+        .match        = 0x38,
+        .match_mask   = 0x438,
+        .match_maxbit = 28,
+        .match_minbit = 11,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 11,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1",
+        .match        = 0x8000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 28,
+        .match_minbit = 11,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0x2,
+        .pmaxbit      = 28,
+        .pminbit      = 11,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2",
+        .match        = 0xc0,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 28,
+        .match_minbit = 11,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x3,
+        .pmaxbit      = 28,
+        .pminbit      = 11,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP",
+        .match        = 0x800,
+        .match_mask   = 0x3818,
+        .match_maxbit = 28,
+        .match_minbit = 11,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 11,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER",
+        .match        = 0x2c0,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 28,
+        .match_minbit = 11,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0xb,
+        .pmaxbit      = 28,
+        .pminbit      = 11,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA",
+        .match        = 0xc000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 28,
+        .match_minbit = 11,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0x3,
+        .pmaxbit      = 28,
+        .pminbit      = 11,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP",
+        .match        = 0x100,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 28,
+        .match_minbit = 11,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x4,
+        .pmaxbit      = 28,
+        .pminbit      = 11,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E",
+        .match        = 0x1000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 28,
+        .match_minbit = 11,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x2,
+        .pmaxbit      = 28,
+        .pminbit      = 11,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4",
+        .match        = 0x2,
+        .match_mask   = 0x406,
+        .match_maxbit = 28,
+        .match_minbit = 11,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 11,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6",
+        .match        = 0x4,
+        .match_mask   = 0x406,
+        .match_maxbit = 28,
+        .match_minbit = 11,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x2,
+        .pmaxbit      = 28,
+        .pminbit      = 11,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0",
+        .match        = 0x400,
+        .match_mask   = 0x400,
+        .match_maxbit = 28,
+        .match_minbit = 11,
+        .maxbit       = 10,
+        .minbit       = 10,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 11,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1",
+        .match        = 0x402,
+        .match_mask   = 0x402,
+        .match_maxbit = 28,
+        .match_minbit = 11,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 11,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2",
+        .match        = 0x404,
+        .match_mask   = 0x404,
+        .match_maxbit = 28,
+        .match_minbit = 11,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 11,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3",
+        .match        = 0x408,
+        .match_mask   = 0x408,
+        .match_maxbit = 28,
+        .match_minbit = 11,
+        .maxbit       = 3,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 11,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4",
+        .match        = 0x410,
+        .match_mask   = 0x410,
+        .match_maxbit = 28,
+        .match_minbit = 11,
+        .maxbit       = 4,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 11,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5",
+        .match        = 0x420,
+        .match_mask   = 0x420,
+        .match_maxbit = 28,
+        .match_minbit = 11,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 11,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6",
+        .match        = 0x440,
+        .match_mask   = 0x440,
+        .match_maxbit = 28,
+        .match_minbit = 11,
+        .maxbit       = 6,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 11,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH",
+        .match        = 0x480,
+        .match_mask   = 0x480,
+        .match_maxbit = 28,
+        .match_minbit = 11,
+        .maxbit       = 7,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 11,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW",
+        .match        = 0x500,
+        .match_mask   = 0x500,
+        .match_maxbit = 28,
+        .match_minbit = 11,
+        .maxbit       = 8,
+        .minbit       = 8,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 11,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x3ffff,
+        .match_maxbit = 28,
+        .match_minbit = 11,
+        .maxbit       = 17,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 28,
+        .pminbit      = 11,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588",
+        .match        = 0x2800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 28,
+        .match_minbit = 11,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x5,
+        .pmaxbit      = 28,
+        .pminbit      = 11,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1",
+        .match        = 0x34000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 28,
+        .match_minbit = 11,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0xd,
+        .pmaxbit      = 28,
+        .pminbit      = 11,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2",
+        .match        = 0x280,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 28,
+        .match_minbit = 11,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0xa,
+        .pmaxbit      = 28,
+        .pminbit      = 11,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP",
+        .match        = 0x14000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 28,
+        .match_minbit = 11,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0x5,
+        .pmaxbit      = 28,
+        .pminbit      = 11,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1",
+        .match        = 0x20000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 28,
+        .match_minbit = 11,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0x8,
+        .pmaxbit      = 28,
+        .pminbit      = 11,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2",
+        .match        = 0x1c0,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 28,
+        .match_minbit = 11,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x7,
+        .pmaxbit      = 28,
+        .pminbit      = 11,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_SEG_ROUT_EXT_1 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_SEG_ROUT_EXT_1",
+        .match        = 0x18000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 28,
+        .match_minbit = 11,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0x6,
+        .pmaxbit      = 28,
+        .pminbit      = 11,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES",
+        .match        = 0x8,
+        .match_mask   = 0x418,
+        .match_maxbit = 28,
+        .match_minbit = 11,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 11,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES",
+        .match        = 0x28,
+        .match_mask   = 0x438,
+        .match_maxbit = 28,
+        .match_minbit = 11,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 11,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP",
+        .match        = 0x10,
+        .match_mask   = 0x418,
+        .match_maxbit = 28,
+        .match_minbit = 11,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x2,
+        .pmaxbit      = 28,
+        .pminbit      = 11,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3",
+        .match        = 0x1c000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 28,
+        .match_minbit = 11,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0x7,
+        .pmaxbit      = 28,
+        .pminbit      = 11,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4",
+        .match        = 0x2000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 28,
+        .match_minbit = 11,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x4,
+        .pmaxbit      = 28,
+        .pminbit      = 11,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5",
+        .match        = 0x3800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 28,
+        .match_minbit = 11,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x7,
+        .pmaxbit      = 28,
+        .pminbit      = 11,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN",
+        .match        = 0x810,
+        .match_mask   = 0x3c18,
+        .match_maxbit = 28,
+        .match_minbit = 11,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 11,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1",
+        .match        = 0x28000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 28,
+        .match_minbit = 11,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0xa,
+        .pmaxbit      = 28,
+        .pminbit      = 11,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2 */
+        .name         = "EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2",
+        .match        = 0x180,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 28,
+        .match_minbit = 11,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x6,
+        .pmaxbit      = 28,
+        .pminbit      = 11,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_CNTAG */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_CNTAG",
+        .match        = 0x100,
+        .match_mask   = 0x180,
+        .match_maxbit = 37,
+        .match_minbit = 29,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x2,
+        .pmaxbit      = 37,
+        .pminbit      = 29,
+        .zone_minbit  = 20,
+        .arc_id_mask  = 0x1f00000,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l2_hdr_cntag,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_ITAG",
+        .match        = 0x40,
+        .match_mask   = 0x40,
+        .match_maxbit = 37,
+        .match_minbit = 29,
+        .maxbit       = 6,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 37,
+        .pminbit      = 29,
+        .zone_minbit  = 20,
+        .arc_id_mask  = 0x1f00000,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l2_hdr_itag,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_L2",
+        .match        = 0x2,
+        .match_mask   = 0x2,
+        .match_maxbit = 37,
+        .match_minbit = 29,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 37,
+        .pminbit      = 29,
+        .zone_minbit  = 20,
+        .arc_id_mask  = 0x1f00000,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l2_hdr_l2,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x1ff,
+        .match_maxbit = 37,
+        .match_minbit = 29,
+        .maxbit       = 8,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 37,
+        .pminbit      = 29,
+        .zone_minbit  = 20,
+        .arc_id_mask  = 0x1f00000,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_OTAG",
+        .match        = 0x20,
+        .match_mask   = 0x20,
+        .match_maxbit = 37,
+        .match_minbit = 29,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 37,
+        .pminbit      = 29,
+        .zone_minbit  = 20,
+        .arc_id_mask  = 0x1f00000,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l2_hdr_otag,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC */
+        .name         = "INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC",
+        .match        = 0x4,
+        .match_mask   = 0x4,
+        .match_maxbit = 37,
+        .match_minbit = 29,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 37,
+        .pminbit      = 29,
+        .zone_minbit  = 20,
+        .arc_id_mask  = 0x1f00000,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l2_hdr_snap_or_llc,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ARP",
+        .match        = 0x4000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 55,
+        .match_minbit = 38,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 38,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_arp,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1",
+        .match        = 0x24000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 55,
+        .match_minbit = 38,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0x9,
+        .pmaxbit      = 55,
+        .pminbit      = 38,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 39,
+        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_auth_ext_1,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2",
+        .match        = 0x140,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 55,
+        .match_minbit = 38,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x5,
+        .pmaxbit      = 55,
+        .pminbit      = 38,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 55,
+        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_auth_ext_2,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_BFD",
+        .match        = 0x3000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 55,
+        .match_minbit = 38,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x6,
+        .pmaxbit      = 55,
+        .pminbit      = 38,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 57,
+        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_bfd,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1",
+        .match        = 0x2c000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 55,
+        .match_minbit = 38,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0xb,
+        .pmaxbit      = 55,
+        .pminbit      = 38,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 42,
+        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_dest_opt_ext_1,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2",
+        .match        = 0x200,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 55,
+        .match_minbit = 38,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x8,
+        .pmaxbit      = 55,
+        .pminbit      = 38,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 55,
+        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_dest_opt_ext_2,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT",
+        .match        = 0x40,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 55,
+        .match_minbit = 38,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 38,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 55,
+        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_esp_ext,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 55,
+        .match_minbit = 38,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 38,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 29,
+        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ethertype,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1",
+        .match        = 0x30000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 55,
+        .match_minbit = 38,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0xc,
+        .pmaxbit      = 55,
+        .pminbit      = 38,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 45,
+        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_frag_ext_1,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2",
+        .match        = 0x240,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 55,
+        .match_minbit = 38,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x9,
+        .pmaxbit      = 55,
+        .pminbit      = 38,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 56,
+        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_frag_ext_2,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1",
+        .match        = 0x8000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 55,
+        .match_minbit = 38,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0x2,
+        .pmaxbit      = 55,
+        .pminbit      = 38,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 48,
+        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_hop_by_hop_ext_1,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2",
+        .match        = 0xc0,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 55,
+        .match_minbit = 38,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x3,
+        .pmaxbit      = 55,
+        .pminbit      = 38,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 56,
+        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_hop_by_hop_ext_2,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ICMP",
+        .match        = 0x800,
+        .match_mask   = 0x3818,
+        .match_maxbit = 55,
+        .match_minbit = 38,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 38,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 57,
+        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_icmp,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER",
+        .match        = 0x2c0,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 55,
+        .match_minbit = 38,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0xb,
+        .pmaxbit      = 55,
+        .pminbit      = 38,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 48,
+        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ifa_header,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA",
+        .match        = 0xc000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 55,
+        .match_minbit = 38,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0x3,
+        .pmaxbit      = 55,
+        .pminbit      = 38,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 48,
+        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ifa_metadata,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IGMP",
+        .match        = 0x100,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 55,
+        .match_minbit = 38,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x4,
+        .pmaxbit      = 55,
+        .pminbit      = 38,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 36,
+        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_igmp,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IPV4",
+        .match        = 0x2,
+        .match_mask   = 0x406,
+        .match_maxbit = 55,
+        .match_minbit = 38,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 38,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 36,
+        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv4,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_IPV6",
+        .match        = 0x4,
+        .match_mask   = 0x406,
+        .match_maxbit = 55,
+        .match_minbit = 38,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x2,
+        .pmaxbit      = 55,
+        .pminbit      = 38,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 58,
+        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv6,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x3ffff,
+        .match_maxbit = 55,
+        .match_minbit = 38,
+        .maxbit       = 17,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 55,
+        .pminbit      = 38,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_P_1588",
+        .match        = 0x2800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 55,
+        .match_minbit = 38,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x5,
+        .pmaxbit      = 55,
+        .pminbit      = 38,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 58,
+        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_p_1588,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1",
+        .match        = 0x34000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 55,
+        .match_minbit = 38,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0xd,
+        .pmaxbit      = 55,
+        .pminbit      = 38,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 51,
+        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_prog_ext_1,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2",
+        .match        = 0x280,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 55,
+        .match_minbit = 38,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0xa,
+        .pmaxbit      = 55,
+        .pminbit      = 38,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 57,
+        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_prog_ext_2,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_RARP",
+        .match        = 0x14000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 55,
+        .match_minbit = 38,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0x5,
+        .pmaxbit      = 55,
+        .pminbit      = 38,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 29,
+        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rarp,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1",
+        .match        = 0x20000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 55,
+        .match_minbit = 38,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0x8,
+        .pmaxbit      = 55,
+        .pminbit      = 38,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 54,
+        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rout_ext_1,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2",
+        .match        = 0x1c0,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 55,
+        .match_minbit = 38,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x7,
+        .pmaxbit      = 55,
+        .pminbit      = 38,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 57,
+        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rout_ext_2,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES",
+        .match        = 0x8,
+        .match_mask   = 0x418,
+        .match_maxbit = 55,
+        .match_minbit = 38,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 38,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 57,
+        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_first_4bytes,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES",
+        .match        = 0x28,
+        .match_mask   = 0x438,
+        .match_maxbit = 55,
+        .match_minbit = 38,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 55,
+        .pminbit      = 38,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 57,
+        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_last_16bytes,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UDP",
+        .match        = 0x10,
+        .match_mask   = 0x418,
+        .match_maxbit = 55,
+        .match_minbit = 38,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x2,
+        .pmaxbit      = 55,
+        .pminbit      = 38,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 58,
+        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_udp,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3",
+        .match        = 0x1c000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 55,
+        .match_minbit = 38,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0x7,
+        .pmaxbit      = 55,
+        .pminbit      = 38,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 29,
+        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l3,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4",
+        .match        = 0x2000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 55,
+        .match_minbit = 38,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x4,
+        .pmaxbit      = 55,
+        .pminbit      = 38,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 58,
+        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l4,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5",
+        .match        = 0x3800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 55,
+        .match_minbit = 38,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x7,
+        .pmaxbit      = 55,
+        .pminbit      = 38,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 58,
+        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l5,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1",
+        .match        = 0x28000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 55,
+        .match_minbit = 38,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0xa,
+        .pmaxbit      = 55,
+        .pminbit      = 38,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 58,
+        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_wesp_ext_1,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2 */
+        .name         = "INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2",
+        .match        = 0x180,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 55,
+        .match_minbit = 38,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x6,
+        .pmaxbit      = 55,
+        .pminbit      = 38,
+        .zone_minbit  = 25,
+        .arc_id_mask  = 0xffe000000,
+        .num_zone_bmp_words = 58,
+        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_wesp_ext_2,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_CNTAG */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_CNTAG",
+        .match        = 0x100,
+        .match_mask   = 0x180,
+        .match_maxbit = 10,
+        .match_minbit = 2,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x2,
+        .pmaxbit      = 10,
+        .pminbit      = 2,
+        .zone_minbit  = 2,
+        .arc_id_mask  = 0x1fc,
+        .num_zone_bmp_words = 4,
+        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l2_hdr_cntag,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM",
+        .match        = 0x80,
+        .match_mask   = 0x180,
+        .match_maxbit = 10,
+        .match_minbit = 2,
+        .maxbit       = 8,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 10,
+        .pminbit      = 2,
+        .zone_minbit  = 2,
+        .arc_id_mask  = 0x1fc,
+        .num_zone_bmp_words = 4,
+        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l2_hdr_gbp_ethernet_shim,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_HG3_BASE",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 10,
+        .match_minbit = 2,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 10,
+        .pminbit      = 2,
+        .zone_minbit  = 2,
+        .arc_id_mask  = 0x1fc,
+        .num_zone_bmp_words = 4,
+        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l2_hdr_hg3_base,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0 */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0",
+        .match        = 0x10,
+        .match_mask   = 0x10,
+        .match_maxbit = 10,
+        .match_minbit = 2,
+        .maxbit       = 4,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 10,
+        .pminbit      = 2,
+        .zone_minbit  = 2,
+        .arc_id_mask  = 0x1fc,
+        .num_zone_bmp_words = 4,
+        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l2_hdr_hg3_ext_0,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_ITAG",
+        .match        = 0x40,
+        .match_mask   = 0x40,
+        .match_maxbit = 10,
+        .match_minbit = 2,
+        .maxbit       = 6,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 10,
+        .pminbit      = 2,
+        .zone_minbit  = 2,
+        .arc_id_mask  = 0x1fc,
+        .num_zone_bmp_words = 4,
+        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l2_hdr_itag,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_L2",
+        .match        = 0x2,
+        .match_mask   = 0x2,
+        .match_maxbit = 10,
+        .match_minbit = 2,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 10,
+        .pminbit      = 2,
+        .zone_minbit  = 2,
+        .arc_id_mask  = 0x1fc,
+        .num_zone_bmp_words = 4,
+        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l2_hdr_l2,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x1ff,
+        .match_maxbit = 10,
+        .match_minbit = 2,
+        .maxbit       = 8,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 10,
+        .pminbit      = 2,
+        .zone_minbit  = 2,
+        .arc_id_mask  = 0x1fc,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_OTAG",
+        .match        = 0x20,
+        .match_mask   = 0x20,
+        .match_maxbit = 10,
+        .match_minbit = 2,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 10,
+        .pminbit      = 2,
+        .zone_minbit  = 2,
+        .arc_id_mask  = 0x1fc,
+        .num_zone_bmp_words = 4,
+        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l2_hdr_otag,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC",
+        .match        = 0x4,
+        .match_mask   = 0x4,
+        .match_maxbit = 10,
+        .match_minbit = 2,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 10,
+        .pminbit      = 2,
+        .zone_minbit  = 2,
+        .arc_id_mask  = 0x1fc,
+        .num_zone_bmp_words = 4,
+        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l2_hdr_snap_or_llc,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SVTAG */
+        .name         = "INGRESS_PKT_OUTER_L2_HDR_SVTAG",
+        .match        = 0x8,
+        .match_mask   = 0x8,
+        .match_maxbit = 10,
+        .match_minbit = 2,
+        .maxbit       = 3,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 10,
+        .pminbit      = 2,
+        .zone_minbit  = 2,
+        .arc_id_mask  = 0x1fc,
+        .num_zone_bmp_words = 4,
+        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l2_hdr_svtag,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ARP",
+        .match        = 0x4000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 28,
+        .match_minbit = 11,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 11,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_arp,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1",
+        .match        = 0x24000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 28,
+        .match_minbit = 11,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0x9,
+        .pmaxbit      = 28,
+        .pminbit      = 11,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 13,
+        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_auth_ext_1,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2",
+        .match        = 0x140,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 28,
+        .match_minbit = 11,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x5,
+        .pmaxbit      = 28,
+        .pminbit      = 11,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 34,
+        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_auth_ext_2,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_BFD",
+        .match        = 0x3000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 28,
+        .match_minbit = 11,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x6,
+        .pmaxbit      = 28,
+        .pminbit      = 11,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 39,
+        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_bfd,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1",
+        .match        = 0x2c000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 28,
+        .match_minbit = 11,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0xb,
+        .pmaxbit      = 28,
+        .pminbit      = 11,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 17,
+        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dest_opt_ext_1,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2",
+        .match        = 0x200,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 28,
+        .match_minbit = 11,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x8,
+        .pmaxbit      = 28,
+        .pminbit      = 11,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 35,
+        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dest_opt_ext_2,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT",
+        .match        = 0x40,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 28,
+        .match_minbit = 11,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 11,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 35,
+        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_esp_ext,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE",
+        .match        = 0x1,
+        .match_mask   = 0x1,
+        .match_maxbit = 28,
+        .match_minbit = 11,
+        .maxbit       = 0,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 11,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 39,
+        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ethertype,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1",
+        .match        = 0x30000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 28,
+        .match_minbit = 11,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0xc,
+        .pmaxbit      = 28,
+        .pminbit      = 11,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 21,
+        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_frag_ext_1,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2",
+        .match        = 0x240,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 28,
+        .match_minbit = 11,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x9,
+        .pmaxbit      = 28,
+        .pminbit      = 11,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 35,
+        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_frag_ext_2,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GPE",
+        .match        = 0x30,
+        .match_mask   = 0x438,
+        .match_maxbit = 28,
+        .match_minbit = 11,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 11,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 37,
+        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gpe,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE",
+        .match        = 0x18,
+        .match_mask   = 0x418,
+        .match_maxbit = 28,
+        .match_minbit = 11,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x3,
+        .pmaxbit      = 28,
+        .pminbit      = 11,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 21,
+        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM",
+        .match        = 0x80,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 28,
+        .match_minbit = 11,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x2,
+        .pmaxbit      = 28,
+        .pminbit      = 11,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 21,
+        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_chksum,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY",
+        .match        = 0x1800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 28,
+        .match_minbit = 11,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x3,
+        .pmaxbit      = 28,
+        .pminbit      = 11,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 21,
+        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_key,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT",
+        .match        = 0x10000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 28,
+        .match_minbit = 11,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0x4,
+        .pmaxbit      = 28,
+        .pminbit      = 11,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 21,
+        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_rout,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ",
+        .match        = 0x38,
+        .match_mask   = 0x438,
+        .match_maxbit = 28,
+        .match_minbit = 11,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 11,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 21,
+        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_seq,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1",
+        .match        = 0x8000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 28,
+        .match_minbit = 11,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0x2,
+        .pmaxbit      = 28,
+        .pminbit      = 11,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 25,
+        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_hop_by_hop_ext_1,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2",
+        .match        = 0xc0,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 28,
+        .match_minbit = 11,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x3,
+        .pmaxbit      = 28,
+        .pminbit      = 11,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 36,
+        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_hop_by_hop_ext_2,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ICMP",
+        .match        = 0x800,
+        .match_mask   = 0x3818,
+        .match_maxbit = 28,
+        .match_minbit = 11,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 11,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 37,
+        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_icmp,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER",
+        .match        = 0x2c0,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 28,
+        .match_minbit = 11,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0xb,
+        .pmaxbit      = 28,
+        .pminbit      = 11,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 25,
+        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_header,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA",
+        .match        = 0xc000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 28,
+        .match_minbit = 11,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0x3,
+        .pmaxbit      = 28,
+        .pminbit      = 11,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 25,
+        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_metadata,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IGMP",
+        .match        = 0x100,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 28,
+        .match_minbit = 11,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x4,
+        .pmaxbit      = 28,
+        .pminbit      = 11,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 10,
+        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_igmp,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E",
+        .match        = 0x1000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 28,
+        .match_minbit = 11,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x2,
+        .pmaxbit      = 28,
+        .pminbit      = 11,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 37,
+        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ioam_e2e,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV4",
+        .match        = 0x2,
+        .match_mask   = 0x406,
+        .match_maxbit = 28,
+        .match_minbit = 11,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 11,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 10,
+        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv4,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV6",
+        .match        = 0x4,
+        .match_mask   = 0x406,
+        .match_maxbit = 28,
+        .match_minbit = 11,
+        .maxbit       = 2,
+        .minbit       = 1,
+        .value        = 0x2,
+        .pmaxbit      = 28,
+        .pminbit      = 11,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 38,
+        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv6,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0",
+        .match        = 0x400,
+        .match_mask   = 0x400,
+        .match_maxbit = 28,
+        .match_minbit = 11,
+        .maxbit       = 10,
+        .minbit       = 10,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 11,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 39,
+        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls0,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1",
+        .match        = 0x402,
+        .match_mask   = 0x402,
+        .match_maxbit = 28,
+        .match_minbit = 11,
+        .maxbit       = 1,
+        .minbit       = 1,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 11,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 39,
+        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls1,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2",
+        .match        = 0x404,
+        .match_mask   = 0x404,
+        .match_maxbit = 28,
+        .match_minbit = 11,
+        .maxbit       = 2,
+        .minbit       = 2,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 11,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 38,
+        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls2,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3",
+        .match        = 0x408,
+        .match_mask   = 0x408,
+        .match_maxbit = 28,
+        .match_minbit = 11,
+        .maxbit       = 3,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 11,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 38,
+        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls3,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4",
+        .match        = 0x410,
+        .match_mask   = 0x410,
+        .match_maxbit = 28,
+        .match_minbit = 11,
+        .maxbit       = 4,
+        .minbit       = 4,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 11,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 38,
+        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls4,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5",
+        .match        = 0x420,
+        .match_mask   = 0x420,
+        .match_maxbit = 28,
+        .match_minbit = 11,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 11,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 38,
+        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls5,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6",
+        .match        = 0x440,
+        .match_mask   = 0x440,
+        .match_maxbit = 28,
+        .match_minbit = 11,
+        .maxbit       = 6,
+        .minbit       = 6,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 11,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 38,
+        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls6,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH",
+        .match        = 0x480,
+        .match_mask   = 0x480,
+        .match_maxbit = 28,
+        .match_minbit = 11,
+        .maxbit       = 7,
+        .minbit       = 7,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 11,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 39,
+        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls_ach,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW",
+        .match        = 0x500,
+        .match_mask   = 0x500,
+        .match_maxbit = 28,
+        .match_minbit = 11,
+        .maxbit       = 8,
+        .minbit       = 8,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 11,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 39,
+        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls_cw,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x3ffff,
+        .match_maxbit = 28,
+        .match_minbit = 11,
+        .maxbit       = 17,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 28,
+        .pminbit      = 11,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_P_1588",
+        .match        = 0x2800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 28,
+        .match_minbit = 11,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x5,
+        .pmaxbit      = 28,
+        .pminbit      = 11,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 39,
+        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_p_1588,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1",
+        .match        = 0x34000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 28,
+        .match_minbit = 11,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0xd,
+        .pmaxbit      = 28,
+        .pminbit      = 11,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 29,
+        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_prog_ext_1,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2",
+        .match        = 0x280,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 28,
+        .match_minbit = 11,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0xa,
+        .pmaxbit      = 28,
+        .pminbit      = 11,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 36,
+        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_prog_ext_2,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_RARP",
+        .match        = 0x14000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 28,
+        .match_minbit = 11,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0x5,
+        .pmaxbit      = 28,
+        .pminbit      = 11,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 39,
+        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rarp,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1",
+        .match        = 0x20000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 28,
+        .match_minbit = 11,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0x8,
+        .pmaxbit      = 28,
+        .pminbit      = 11,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 33,
+        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rout_ext_1,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2",
+        .match        = 0x1c0,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 28,
+        .match_minbit = 11,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x7,
+        .pmaxbit      = 28,
+        .pminbit      = 11,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 37,
+        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rout_ext_2,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_SEG_ROUT_EXT_1 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_SEG_ROUT_EXT_1",
+        .match        = 0x18000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 28,
+        .match_minbit = 11,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0x6,
+        .pmaxbit      = 28,
+        .pminbit      = 11,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 33,
+        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_seg_rout_ext_1,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES",
+        .match        = 0x8,
+        .match_mask   = 0x418,
+        .match_maxbit = 28,
+        .match_minbit = 11,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 11,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 37,
+        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_first_4bytes,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES",
+        .match        = 0x28,
+        .match_mask   = 0x438,
+        .match_maxbit = 28,
+        .match_minbit = 11,
+        .maxbit       = 5,
+        .minbit       = 5,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 11,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 37,
+        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_last_16bytes,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UDP",
+        .match        = 0x10,
+        .match_mask   = 0x418,
+        .match_maxbit = 28,
+        .match_minbit = 11,
+        .maxbit       = 4,
+        .minbit       = 3,
+        .value        = 0x2,
+        .pmaxbit      = 28,
+        .pminbit      = 11,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 38,
+        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_udp,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3",
+        .match        = 0x1c000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 28,
+        .match_minbit = 11,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0x7,
+        .pmaxbit      = 28,
+        .pminbit      = 11,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 39,
+        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l3,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4",
+        .match        = 0x2000,
+        .match_mask   = 0x3800,
+        .match_maxbit = 28,
+        .match_minbit = 11,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x4,
+        .pmaxbit      = 28,
+        .pminbit      = 11,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 38,
+        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l4,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5",
+        .match        = 0x3800,
+        .match_mask   = 0x3800,
+        .match_maxbit = 28,
+        .match_minbit = 11,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x7,
+        .pmaxbit      = 28,
+        .pminbit      = 11,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 38,
+        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l5,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN",
+        .match        = 0x810,
+        .match_mask   = 0x3c18,
+        .match_maxbit = 28,
+        .match_minbit = 11,
+        .maxbit       = 13,
+        .minbit       = 11,
+        .value        = 0x1,
+        .pmaxbit      = 28,
+        .pminbit      = 11,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 38,
+        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_vxlan,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1",
+        .match        = 0x28000,
+        .match_mask   = 0x3c000,
+        .match_maxbit = 28,
+        .match_minbit = 11,
+        .maxbit       = 17,
+        .minbit       = 14,
+        .value        = 0xa,
+        .pmaxbit      = 28,
+        .pminbit      = 11,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 38,
+        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_wesp_ext_1,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2 */
+        .name         = "INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2",
+        .match        = 0x180,
+        .match_mask   = 0x7c0,
+        .match_maxbit = 28,
+        .match_minbit = 11,
+        .maxbit       = 9,
+        .minbit       = 6,
+        .value        = 0x6,
+        .pmaxbit      = 28,
+        .pminbit      = 11,
+        .zone_minbit  = 9,
+        .arc_id_mask  = 0xffe00,
+        .num_zone_bmp_words = 38,
+        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_wesp_ext_2,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH */
+        .name         = "INGRESS_PKT_SYS_HDR_EP_NIH",
+        .match        = 0x2,
+        .match_mask   = 0x3,
+        .match_maxbit = 1,
+        .match_minbit = 0,
+        .maxbit       = 1,
+        .minbit       = 0,
+        .value        = 0x2,
+        .pmaxbit      = 1,
+        .pminbit      = 0,
+        .zone_minbit  = 0,
+        .arc_id_mask  = 0x3,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_sys_hdr_ep_nih,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK */
+        .name         = "INGRESS_PKT_SYS_HDR_LOOPBACK",
+        .match        = 0x1,
+        .match_mask   = 0x3,
+        .match_maxbit = 1,
+        .match_minbit = 0,
+        .maxbit       = 1,
+        .minbit       = 0,
+        .value        = 0x1,
+        .pmaxbit      = 1,
+        .pminbit      = 0,
+        .zone_minbit  = 0,
+        .arc_id_mask  = 0x3,
+        .num_zone_bmp_words = 1,
+        .zone_bmp = bcm56890_a0_dna_6_5_29_1_2_rxpmd_arc_ingress_pkt_sys_hdr_loopback,
+
+    },
+    {
+        /* BCM56890_A0_DNA_6_5_29_1_2_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE */
+        .name         = "INGRESS_PKT_SYS_HDR_NONE",
+        .match        = 0x0,
+        .match_mask   = 0x3,
+        .match_maxbit = 1,
+        .match_minbit = 0,
+        .maxbit       = 1,
+        .minbit       = 0,
+        .value        = 0x0,
+        .pmaxbit      = 1,
+        .pminbit      = 0,
+        .zone_minbit  = 0,
+        .arc_id_mask  = 0x3,
+
+    },
+};
+
+static bcmpkt_rxpmd_match_id_db_info_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db_info = {
+    .num_entries = 228,
+    .db = bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db
+};
+bcmpkt_rxpmd_match_id_db_info_t * bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db_info_get(void) {
+    return &bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_db_info;
+}
+
+static shr_enum_map_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_map[] = {
+    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_rxpmd_match_id_map_info_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_map_info = {
+    .num_entries = 228,
+    .map = bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_map
+};
+
+bcmpkt_rxpmd_match_id_map_info_t * bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_map_info_get(void) {
+    return &bcm56890_a0_dna_6_5_29_1_2_rxpmd_match_id_map_info;
+}
diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_pkt_flexhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_pkt_flexhdr.c
new file mode 100644
index 000000000..6a9ef87e6
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_pkt_flexhdr.c
@@ -0,0 +1,11636 @@
+/*****************************************************************
+ *
+ * DO NOT EDIT THIS FILE!
+ * This file is auto-generated by xfc_map_parser
+ * from the NPL output file(s) map.yml
+ * for device bcm56890_a0 and variant dna_6_5_29_1_2.
+ * Edits to this file will be lost when it is regenerated.
+ *
+ * $Id: $
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ * All Rights Reserved.$
+ *
+ * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser
+ *
+ ****************************************************************/
+
+#include <sal/sal_types.h>
+#include <shr/shr_error.h>
+#include <bcmpkt/bcmpkt_flexhdr.h>
+#include <bcmpkt/chip/bcm56890_a0/bcmpkt_bcm56890_a0_rxpmd.h>
+#include <bcmpkt/xfcr/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_bcmpkt_flexhdr.h>
+#include <bcmpkt/xfcr/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_bcmpkt_flexhdr_data.h>
+#include <bcmpkt/xfcr/bcm56890_a0/dna_6_5_29_1_2/bcm56890_a0_dna_6_5_29_1_2_bcmpkt_rxpmd_flex_data.h>
+
+#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1)
+#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l))
+#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s)))
+#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s)))
+
+static void bcm56890_a0_dna_6_5_29_1_2_rxpmd_flex_reason_decode(uint32_t *data, bcmpkt_bitmap_t *reasons)
+{
+    uint32_t *reason = data + 0;
+
+    if (reason[13] & (0x1 << 0)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU);
+    }
+    if (reason[13] & (0x1 << 1)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS);
+    }
+    if (reason[13] & (0x1 << 2)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE);
+    }
+    if (reason[13] & (0x1 << 3)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_EM_FT_HPAE_MISS);
+    }
+    if (reason[13] & (0x1 << 4)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD);
+    }
+    if (reason[13] & (0x1 << 5)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED);
+    }
+    if (reason[13] & (0x1 << 6)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT);
+    }
+    if (reason[13] & (0x1 << 7)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD);
+    }
+    if (reason[13] & (0x1 << 8)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD);
+    }
+    if (reason[13] & (0x1 << 9)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS);
+    }
+    if (reason[13] & (0x1 << 10)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP);
+    }
+    if (reason[13] & (0x1 << 11)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS);
+    }
+    if (reason[13] & (0x1 << 12)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP);
+    }
+    if (reason[13] & (0x1 << 13)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR);
+    }
+    if (reason[13] & (0x1 << 14)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR);
+    }
+    if (reason[13] & (0x1 << 15)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED);
+    }
+    if (reason[13] & (0x1 << 16)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL);
+    }
+    if (reason[13] & (0x1 << 17)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_VFP);
+    }
+    if (reason[13] & (0x1 << 18)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_IFP);
+    }
+    if (reason[13] & (0x1 << 19)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_IFP_METER);
+    }
+    if (reason[13] & (0x1 << 20)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_DST_FP);
+    }
+    if (reason[13] & (0x1 << 21)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_SVP);
+    }
+    if (reason[13] & (0x1 << 22)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_EM_FT);
+    }
+    if (reason[13] & (0x1 << 23)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_IVXLT);
+    }
+    if (reason[13] & (0x1 << 24)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED);
+    }
+    if (reason[13] & (0x1 << 25)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED);
+    }
+    if (reason[13] & (0x1 << 26)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_SER_DROP);
+    }
+    if (reason[13] & (0x1 << 27)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED);
+    }
+    if (reason[13] & (0x1 << 28)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF);
+    }
+    if (reason[13] & (0x1 << 29)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED);
+    }
+    if (reason[13] & (0x1 << 30)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED);
+    }
+    if (reason[13] & (0x1 << 31)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU);
+    }
+    if (reason[12] & (0x1 << 0)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0);
+    }
+    if (reason[12] & (0x1 << 1)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1);
+    }
+    if (reason[12] & (0x1 << 2)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2);
+    }
+    if (reason[12] & (0x1 << 3)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3);
+    }
+    if (reason[12] & (0x1 << 4)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4);
+    }
+    if (reason[12] & (0x1 << 5)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5);
+    }
+    if (reason[12] & (0x1 << 6)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6);
+    }
+    if (reason[12] & (0x1 << 7)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7);
+    }
+    if (reason[12] & (0x1 << 8)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_DEFAULT);
+    }
+    if (reason[12] & (0x1 << 9)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED);
+    }
+    if (reason[12] & (0x1 << 10)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED);
+    }
+    if (reason[12] & (0x1 << 11)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_SRV6);
+    }
+    if (reason[12] & (0x1 << 12)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR);
+    }
+    if (reason[12] & (0x1 << 13)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU);
+    }
+    if (reason[12] & (0x1 << 14)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE);
+    }
+    if (reason[12] & (0x1 << 15)) {
+        BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP);
+    }
+}
+
+static void bcm56890_a0_dna_6_5_29_1_2_rxpmd_flex_reason_encode(bcmpkt_bitmap_t *reasons, uint32_t *data)
+{
+    uint32_t *reason = data + 0;
+
+    reason[13] = 0;
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU)) {
+        reason[13] |= (0x1 << 0);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS)) {
+        reason[13] |= (0x1 << 1);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE)) {
+        reason[13] |= (0x1 << 2);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_EM_FT_HPAE_MISS)) {
+        reason[13] |= (0x1 << 3);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD)) {
+        reason[13] |= (0x1 << 4);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED)) {
+        reason[13] |= (0x1 << 5);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT)) {
+        reason[13] |= (0x1 << 6);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD)) {
+        reason[13] |= (0x1 << 7);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD)) {
+        reason[13] |= (0x1 << 8);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS)) {
+        reason[13] |= (0x1 << 9);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP)) {
+        reason[13] |= (0x1 << 10);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS)) {
+        reason[13] |= (0x1 << 11);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP)) {
+        reason[13] |= (0x1 << 12);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR)) {
+        reason[13] |= (0x1 << 13);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR)) {
+        reason[13] |= (0x1 << 14);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED)) {
+        reason[13] |= (0x1 << 15);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL)) {
+        reason[13] |= (0x1 << 16);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_VFP)) {
+        reason[13] |= (0x1 << 17);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_IFP)) {
+        reason[13] |= (0x1 << 18);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_IFP_METER)) {
+        reason[13] |= (0x1 << 19);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_DST_FP)) {
+        reason[13] |= (0x1 << 20);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_SVP)) {
+        reason[13] |= (0x1 << 21);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_EM_FT)) {
+        reason[13] |= (0x1 << 22);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_IVXLT)) {
+        reason[13] |= (0x1 << 23);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED)) {
+        reason[13] |= (0x1 << 24);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED)) {
+        reason[13] |= (0x1 << 25);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_SER_DROP)) {
+        reason[13] |= (0x1 << 26);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED)) {
+        reason[13] |= (0x1 << 27);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF)) {
+        reason[13] |= (0x1 << 28);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED)) {
+        reason[13] |= (0x1 << 29);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED)) {
+        reason[13] |= (0x1 << 30);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU)) {
+        reason[13] |= (0x1 << 31);
+    }
+    reason[12] = 0;
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0)) {
+        reason[12] |= (0x1 << 0);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1)) {
+        reason[12] |= (0x1 << 1);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2)) {
+        reason[12] |= (0x1 << 2);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3)) {
+        reason[12] |= (0x1 << 3);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4)) {
+        reason[12] |= (0x1 << 4);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5)) {
+        reason[12] |= (0x1 << 5);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6)) {
+        reason[12] |= (0x1 << 6);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7)) {
+        reason[12] |= (0x1 << 7);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_DEFAULT)) {
+        reason[12] |= (0x1 << 8);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED)) {
+        reason[12] |= (0x1 << 9);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED)) {
+        reason[12] |= (0x1 << 10);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_SRV6)) {
+        reason[12] |= (0x1 << 11);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR)) {
+        reason[12] |= (0x1 << 12);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU)) {
+        reason[12] |= (0x1 << 13);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE)) {
+        reason[12] |= (0x1 << 14);
+    }
+    if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP)) {
+        reason[12] |= (0x1 << 15);
+    }
+}
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_flex_field_data[] = {
+    {
+        .name = "BSCAN_CONTROL_DATA_15_0",
+        .fid = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_BSCAN_CONTROL_DATA_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 400, 415 }, /* Profile 2. */
+            { 368, 383 }, /* Profile 3. */
+            { 400, 415 }, /* Profile 4. */
+            { 400, 415 }, /* Profile 5. */
+            { 400, 415 }, /* Profile 6. */
+            { 400, 415 }, /* Profile 7. */
+            { 368, 383 }, /* Profile 8. */
+            { 400, 415 }, /* Profile 9. */
+            { 400, 415 }, /* Profile 10. */
+            { 400, 415 }, /* Profile 11. */
+            { 400, 415 }, /* Profile 12. */
+            { 368, 383 }, /* Profile 13. */
+            { 400, 415 }, /* Profile 14. */
+            { 400, 415 }, /* Profile 15. */
+            { 400, 415 }, /* Profile 16. */
+            { 368, 383 }, /* Profile 17. */
+            { 400, 415 }, /* Profile 18. */
+            { 400, 415 }, /* Profile 19. */
+            { 400, 415 }, /* Profile 20. */
+            { 400, 415 }, /* Profile 21. */
+            { 368, 383 }, /* Profile 22. */
+            { 400, 415 }, /* Profile 23. */
+            { 400, 415 }, /* Profile 24. */
+            { 400, 415 }, /* Profile 25. */
+            { 400, 415 }, /* Profile 26. */
+            { 368, 383 }, /* Profile 27. */
+            { 400, 415 }, /* Profile 28. */
+            { 400, 415 }, /* Profile 29. */
+            { 400, 415 }, /* Profile 30. */
+            { 368, 383 }, /* Profile 31. */
+            { 400, 415 }, /* Profile 32. */
+            { 400, 415 }, /* Profile 33. */
+            { 400, 415 }, /* Profile 34. */
+            { 400, 415 }, /* Profile 35. */
+            { 368, 383 }, /* Profile 36. */
+            { 400, 415 }, /* Profile 37. */
+            { 400, 415 }, /* Profile 38. */
+            { 400, 415 }, /* Profile 39. */
+            { 400, 415 }, /* Profile 40. */
+            { 368, 383 }, /* Profile 41. */
+            { 400, 415 }, /* Profile 42. */
+            { 400, 415 }, /* Profile 43. */
+            { 400, 415 }, /* Profile 44. */
+            { 368, 383 }, /* Profile 45. */
+            { 400, 415 }, /* Profile 46. */
+            { 400, 415 }, /* Profile 47. */
+            { 400, 415 }, /* Profile 48. */
+            { 400, 415 }, /* Profile 49. */
+            { 368, 383 }, /* Profile 50. */
+            { 400, 415 }, /* Profile 51. */
+            { 400, 415 }, /* Profile 52. */
+            { 400, 415 }, /* Profile 53. */
+            { 400, 415 }, /* Profile 54. */
+            { 368, 383 }, /* Profile 55. */
+            { 400, 415 }, /* Profile 56. */
+            { 400, 415 }, /* Profile 57. */
+        },
+        .profile_cnt = 58,
+    },
+    {
+        .name = "BSCAN_CONTROL_FLAGS_3_0",
+        .fid = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_BSCAN_CONTROL_FLAGS_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { 476, 479 }, /* Profile 2. */
+            { 456, 459 }, /* Profile 3. */
+            { 476, 479 }, /* Profile 4. */
+            { 476, 479 }, /* Profile 5. */
+            { 476, 479 }, /* Profile 6. */
+            { 476, 479 }, /* Profile 7. */
+            { 456, 459 }, /* Profile 8. */
+            { 476, 479 }, /* Profile 9. */
+            { 476, 479 }, /* Profile 10. */
+            { 476, 479 }, /* Profile 11. */
+            { 476, 479 }, /* Profile 12. */
+            { 456, 459 }, /* Profile 13. */
+            { 476, 479 }, /* Profile 14. */
+            { 476, 479 }, /* Profile 15. */
+            { 476, 479 }, /* Profile 16. */
+            { 456, 459 }, /* Profile 17. */
+            { 476, 479 }, /* Profile 18. */
+            { 476, 479 }, /* Profile 19. */
+            { 476, 479 }, /* Profile 20. */
+            { 476, 479 }, /* Profile 21. */
+            { 456, 459 }, /* Profile 22. */
+            { 476, 479 }, /* Profile 23. */
+            { 476, 479 }, /* Profile 24. */
+            { 476, 479 }, /* Profile 25. */
+            { 476, 479 }, /* Profile 26. */
+            { 456, 459 }, /* Profile 27. */
+            { 476, 479 }, /* Profile 28. */
+            { 476, 479 }, /* Profile 29. */
+            { 476, 479 }, /* Profile 30. */
+            { 456, 459 }, /* Profile 31. */
+            { 476, 479 }, /* Profile 32. */
+            { 476, 479 }, /* Profile 33. */
+            { 476, 479 }, /* Profile 34. */
+            { 476, 479 }, /* Profile 35. */
+            { 456, 459 }, /* Profile 36. */
+            { 476, 479 }, /* Profile 37. */
+            { 476, 479 }, /* Profile 38. */
+            { 476, 479 }, /* Profile 39. */
+            { 476, 479 }, /* Profile 40. */
+            { 456, 459 }, /* Profile 41. */
+            { 476, 479 }, /* Profile 42. */
+            { 476, 479 }, /* Profile 43. */
+            { 476, 479 }, /* Profile 44. */
+            { 456, 459 }, /* Profile 45. */
+            { 476, 479 }, /* Profile 46. */
+            { 476, 479 }, /* Profile 47. */
+            { 476, 479 }, /* Profile 48. */
+            { 476, 479 }, /* Profile 49. */
+            { 456, 459 }, /* Profile 50. */
+            { 476, 479 }, /* Profile 51. */
+            { 476, 479 }, /* Profile 52. */
+            { 476, 479 }, /* Profile 53. */
+            { 476, 479 }, /* Profile 54. */
+            { 456, 459 }, /* Profile 55. */
+            { 476, 479 }, /* Profile 56. */
+            { 476, 479 }, /* Profile 57. */
+        },
+        .profile_cnt = 58,
+    },
+    {
+        .name = "DLB_ECMP_DESTINATION_15_0",
+        .fid = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { -1, -1 }, /* Profile 2. */
+            { -1, -1 }, /* Profile 3. */
+            { -1, -1 }, /* Profile 4. */
+            { -1, -1 }, /* Profile 5. */
+            { -1, -1 }, /* Profile 6. */
+            { -1, -1 }, /* Profile 7. */
+            { -1, -1 }, /* Profile 8. */
+            { -1, -1 }, /* Profile 9. */
+            { -1, -1 }, /* Profile 10. */
+            { -1, -1 }, /* Profile 11. */
+            { -1, -1 }, /* Profile 12. */
+            { -1, -1 }, /* Profile 13. */
+            { -1, -1 }, /* Profile 14. */
+            { -1, -1 }, /* Profile 15. */
+            { 336, 351 }, /* Profile 16. */
+            { 320, 335 }, /* Profile 17. */
+            { 336, 351 }, /* Profile 18. */
+            { 352, 367 }, /* Profile 19. */
+            { 352, 367 }, /* Profile 20. */
+            { 336, 351 }, /* Profile 21. */
+            { 320, 335 }, /* Profile 22. */
+            { 336, 351 }, /* Profile 23. */
+            { 352, 367 }, /* Profile 24. */
+            { 352, 367 }, /* Profile 25. */
+            { 336, 351 }, /* Profile 26. */
+            { 320, 335 }, /* Profile 27. */
+            { 336, 351 }, /* Profile 28. */
+            { 352, 367 }, /* Profile 29. */
+            { -1, -1 }, /* Profile 30. */
+            { -1, -1 }, /* Profile 31. */
+            { -1, -1 }, /* Profile 32. */
+            { -1, -1 }, /* Profile 33. */
+            { -1, -1 }, /* Profile 34. */
+            { -1, -1 }, /* Profile 35. */
+            { -1, -1 }, /* Profile 36. */
+            { -1, -1 }, /* Profile 37. */
+            { -1, -1 }, /* Profile 38. */
+            { -1, -1 }, /* Profile 39. */
+            { -1, -1 }, /* Profile 40. */
+            { -1, -1 }, /* Profile 41. */
+            { -1, -1 }, /* Profile 42. */
+            { -1, -1 }, /* Profile 43. */
+            { 336, 351 }, /* Profile 44. */
+            { 320, 335 }, /* Profile 45. */
+            { 336, 351 }, /* Profile 46. */
+            { 352, 367 }, /* Profile 47. */
+            { 352, 367 }, /* Profile 48. */
+            { 336, 351 }, /* Profile 49. */
+            { 320, 335 }, /* Profile 50. */
+            { 336, 351 }, /* Profile 51. */
+            { 352, 367 }, /* Profile 52. */
+            { 352, 367 }, /* Profile 53. */
+            { 336, 351 }, /* Profile 54. */
+            { 320, 335 }, /* Profile 55. */
+            { 336, 351 }, /* Profile 56. */
+            { 352, 367 }, /* Profile 57. */
+        },
+        .profile_cnt = 58,
+    },
+    {
+        .name = "DNAT_CTRL_3_0",
+        .fid = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_DNAT_CTRL_3_0,
+        .profile = {
+            { -1, -1 }, /* Profile 0. */
+            { -1, -1 }, /* Profile 1. */
+            { -1, -1 }, /* Profile 2. */
+            { -1, -1 }, /* Profile 3. */
+            { 420, 423 }, /* Profile 4. */
+            { -1, -1 }, /* Profile 5. */
+            { -1, -1 }, /* Profile 6. */
+            { -1, -1 }, /* Profile 7. */
+            { -1, -1 }, /* Profile 8. */
+            { 420, 423 }, /* Profile 9. */
+            { -1, -1 }, /* Profile 10. */
+            { -1, -1 }, /* Profile 11. */
+            { -1, -1 }, /* Profile 12. */
+            { -1, -1 }, /* Profile 13. */
+            { 420, 423 }, /* Profile 14. */
+            { -1, -1 }, /* Profile 15. */
+            { -1, -1 }, /* Profile 16. */
+            { -1, -1 }, /* Profile 17. */
+            { 420, 423 }, /* Profile 18. */
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+        .profile_cnt = 58,
+    },
+};static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_flex_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_29_1_2_rxpmd_flex_field_data,
+};
+
+static shr_enum_map_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_flex_reason_names[] = {
+    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_reasons_info_t bcm56890_a0_dna_6_5_29_1_2_rxpmd_flex_reasons_info = {
+    .num_reasons = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RXPMD_FLEX_REASON_COUNT,
+    .reason_names = bcm56890_a0_dna_6_5_29_1_2_rxpmd_flex_reason_names,
+    .reason_encode = bcm56890_a0_dna_6_5_29_1_2_rxpmd_flex_reason_encode,
+    .reason_decode = bcm56890_a0_dna_6_5_29_1_2_rxpmd_flex_reason_decode,
+};
+
+
+static int32_t bcmpkt_arp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_operation_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_operation_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_arp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_arp_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ARP_T_FID_COUNT] = {
+    bcmpkt_arp_t_hardware_len_get,
+    bcmpkt_arp_t_hardware_type_get,
+    bcmpkt_arp_t_operation_get,
+    bcmpkt_arp_t_prot_addr_len_get,
+    bcmpkt_arp_t_protocol_type_get,
+    bcmpkt_arp_t_sender_ha_get,
+    bcmpkt_arp_t_sender_ip_get,
+    bcmpkt_arp_t_target_ha_get,
+    bcmpkt_arp_t_target_ip_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_arp_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ARP_T_FID_COUNT] = {
+    bcmpkt_arp_t_hardware_len_set,
+    bcmpkt_arp_t_hardware_type_set,
+    bcmpkt_arp_t_operation_set,
+    bcmpkt_arp_t_prot_addr_len_set,
+    bcmpkt_arp_t_protocol_type_set,
+    bcmpkt_arp_t_sender_ha_set,
+    bcmpkt_arp_t_sender_ip_set,
+    bcmpkt_arp_t_target_ha_set,
+    bcmpkt_arp_t_target_ip_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_arp_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_arp_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ARP_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_29_1_2_arp_t_field_data,
+};
+
+
+static int32_t bcmpkt_authen_t_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_payload_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_payload_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_spi_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_authen_t_spi_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_authen_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_AUTHEN_T_FID_COUNT] = {
+    bcmpkt_authen_t_data_get,
+    bcmpkt_authen_t_next_header_get,
+    bcmpkt_authen_t_payload_len_get,
+    bcmpkt_authen_t_reserved_get,
+    bcmpkt_authen_t_seq_num_get,
+    bcmpkt_authen_t_spi_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_authen_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_AUTHEN_T_FID_COUNT] = {
+    bcmpkt_authen_t_data_set,
+    bcmpkt_authen_t_next_header_set,
+    bcmpkt_authen_t_payload_len_set,
+    bcmpkt_authen_t_reserved_set,
+    bcmpkt_authen_t_seq_num_set,
+    bcmpkt_authen_t_spi_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_authen_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_authen_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_AUTHEN_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_29_1_2_authen_t_field_data,
+};
+
+
+static int32_t bcmpkt_bfd_t_desmintxintv_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_desmintxintv_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_minechorxintv_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_minechorxintv_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_reqminrxintv_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_reqminrxintv_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_ap_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 18, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_ap_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 18, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_bfd_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_bfd_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_cpi_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 19, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_cpi_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 19, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_dem_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 17, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_dem_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 17, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_detectmult_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_detectmult_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_diag_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 5);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_diag_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 5, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_fin_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 20, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_fin_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 20, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_mpt_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_mpt_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_mydiscrim_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_mydiscrim_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_poll_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 21, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_poll_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 21, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_sta_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 22, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_sta_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 22, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_urdiscrim_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_urdiscrim_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 29, 3);
+
+    return ret;
+}
+
+static int32_t bcmpkt_bfd_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 29, 3, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_bfd_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_FID_COUNT] = {
+    bcmpkt_bfd_t_ap_get,
+    bcmpkt_bfd_t_bfd_length_get,
+    bcmpkt_bfd_t_cpi_get,
+    bcmpkt_bfd_t_dem_get,
+    bcmpkt_bfd_t_desmintxintv_get,
+    bcmpkt_bfd_t_detectmult_get,
+    bcmpkt_bfd_t_diag_get,
+    bcmpkt_bfd_t_fin_get,
+    bcmpkt_bfd_t_minechorxintv_get,
+    bcmpkt_bfd_t_mpt_get,
+    bcmpkt_bfd_t_mydiscrim_get,
+    bcmpkt_bfd_t_poll_get,
+    bcmpkt_bfd_t_reqminrxintv_get,
+    bcmpkt_bfd_t_sta_get,
+    bcmpkt_bfd_t_urdiscrim_get,
+    bcmpkt_bfd_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_bfd_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_FID_COUNT] = {
+    bcmpkt_bfd_t_ap_set,
+    bcmpkt_bfd_t_bfd_length_set,
+    bcmpkt_bfd_t_cpi_set,
+    bcmpkt_bfd_t_dem_set,
+    bcmpkt_bfd_t_desmintxintv_set,
+    bcmpkt_bfd_t_detectmult_set,
+    bcmpkt_bfd_t_diag_set,
+    bcmpkt_bfd_t_fin_set,
+    bcmpkt_bfd_t_minechorxintv_set,
+    bcmpkt_bfd_t_mpt_set,
+    bcmpkt_bfd_t_mydiscrim_set,
+    bcmpkt_bfd_t_poll_set,
+    bcmpkt_bfd_t_reqminrxintv_set,
+    bcmpkt_bfd_t_sta_set,
+    bcmpkt_bfd_t_urdiscrim_set,
+    bcmpkt_bfd_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_bfd_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_bfd_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_BFD_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_29_1_2_bfd_t_field_data,
+};
+
+
+static int32_t bcmpkt_cntag_t_rpid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_cntag_t_rpid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_cntag_t_tpid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_cntag_t_tpid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_cntag_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CNTAG_T_FID_COUNT] = {
+    bcmpkt_cntag_t_rpid_get,
+    bcmpkt_cntag_t_tpid_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_cntag_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CNTAG_T_FID_COUNT] = {
+    bcmpkt_cntag_t_rpid_set,
+    bcmpkt_cntag_t_tpid_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_cntag_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_cntag_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CNTAG_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_29_1_2_cntag_t_field_data,
+};
+
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_cpu_composites_0_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = {
+    bcmpkt_cpu_composites_0_t_dma_cont0_get,
+    bcmpkt_cpu_composites_0_t_dma_cont1_get,
+    bcmpkt_cpu_composites_0_t_dma_cont2_get,
+    bcmpkt_cpu_composites_0_t_dma_cont3_get,
+    bcmpkt_cpu_composites_0_t_dma_cont4_get,
+    bcmpkt_cpu_composites_0_t_dma_cont5_get,
+    bcmpkt_cpu_composites_0_t_dma_cont6_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_cpu_composites_0_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = {
+    bcmpkt_cpu_composites_0_t_dma_cont0_set,
+    bcmpkt_cpu_composites_0_t_dma_cont1_set,
+    bcmpkt_cpu_composites_0_t_dma_cont2_set,
+    bcmpkt_cpu_composites_0_t_dma_cont3_set,
+    bcmpkt_cpu_composites_0_t_dma_cont4_set,
+    bcmpkt_cpu_composites_0_t_dma_cont5_set,
+    bcmpkt_cpu_composites_0_t_dma_cont6_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_cpu_composites_0_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_cpu_composites_0_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_29_1_2_cpu_composites_0_t_field_data,
+};
+
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_cpu_composites_1_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = {
+    bcmpkt_cpu_composites_1_t_dma_cont10_get,
+    bcmpkt_cpu_composites_1_t_dma_cont11_get,
+    bcmpkt_cpu_composites_1_t_dma_cont12_get,
+    bcmpkt_cpu_composites_1_t_dma_cont13_get,
+    bcmpkt_cpu_composites_1_t_dma_cont14_get,
+    bcmpkt_cpu_composites_1_t_dma_cont15_get,
+    bcmpkt_cpu_composites_1_t_dma_cont16_get,
+    bcmpkt_cpu_composites_1_t_dma_cont17_get,
+    bcmpkt_cpu_composites_1_t_dma_cont7_get,
+    bcmpkt_cpu_composites_1_t_dma_cont8_get,
+    bcmpkt_cpu_composites_1_t_dma_cont9_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_cpu_composites_1_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = {
+    bcmpkt_cpu_composites_1_t_dma_cont10_set,
+    bcmpkt_cpu_composites_1_t_dma_cont11_set,
+    bcmpkt_cpu_composites_1_t_dma_cont12_set,
+    bcmpkt_cpu_composites_1_t_dma_cont13_set,
+    bcmpkt_cpu_composites_1_t_dma_cont14_set,
+    bcmpkt_cpu_composites_1_t_dma_cont15_set,
+    bcmpkt_cpu_composites_1_t_dma_cont16_set,
+    bcmpkt_cpu_composites_1_t_dma_cont17_set,
+    bcmpkt_cpu_composites_1_t_dma_cont7_set,
+    bcmpkt_cpu_composites_1_t_dma_cont8_set,
+    bcmpkt_cpu_composites_1_t_dma_cont9_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_cpu_composites_1_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_cpu_composites_1_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_29_1_2_cpu_composites_1_t_field_data,
+};
+
+
+static int32_t bcmpkt_dest_option_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_dest_option_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_dest_option_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_dest_option_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_dest_option_t_option_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_dest_option_t_option_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_dest_option_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_DEST_OPTION_T_FID_COUNT] = {
+    bcmpkt_dest_option_t_hdr_ext_len_get,
+    bcmpkt_dest_option_t_next_header_get,
+    bcmpkt_dest_option_t_option_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_dest_option_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_DEST_OPTION_T_FID_COUNT] = {
+    bcmpkt_dest_option_t_hdr_ext_len_set,
+    bcmpkt_dest_option_t_next_header_set,
+    bcmpkt_dest_option_t_option_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_dest_option_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_dest_option_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_DEST_OPTION_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_29_1_2_dest_option_t_field_data,
+};
+
+
+static int32_t bcmpkt_ep_nih_header_t_header_subtype_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 20, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_header_subtype_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 20, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_header_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 6);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_header_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 6, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_a_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_a_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_b_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 20, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_b_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 20, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_c_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_c_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_object_a_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_object_a_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_object_b_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_object_b_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_object_c_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_opaque_object_c_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_recirc_profile_index_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_recirc_profile_index_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 12, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 12, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_start_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 30, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_start_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 30, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ep_nih_header_t_timestamp_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_ep_nih_header_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = {
+    bcmpkt_ep_nih_header_t_header_subtype_get,
+    bcmpkt_ep_nih_header_t_header_type_get,
+    bcmpkt_ep_nih_header_t_opaque_ctrl_a_get,
+    bcmpkt_ep_nih_header_t_opaque_ctrl_b_get,
+    bcmpkt_ep_nih_header_t_opaque_ctrl_c_get,
+    bcmpkt_ep_nih_header_t_opaque_object_a_get,
+    bcmpkt_ep_nih_header_t_opaque_object_b_get,
+    bcmpkt_ep_nih_header_t_opaque_object_c_get,
+    bcmpkt_ep_nih_header_t_recirc_profile_index_get,
+    bcmpkt_ep_nih_header_t_reserved_0_get,
+    bcmpkt_ep_nih_header_t_start_get,
+    bcmpkt_ep_nih_header_t_timestamp_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_ep_nih_header_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = {
+    bcmpkt_ep_nih_header_t_header_subtype_set,
+    bcmpkt_ep_nih_header_t_header_type_set,
+    bcmpkt_ep_nih_header_t_opaque_ctrl_a_set,
+    bcmpkt_ep_nih_header_t_opaque_ctrl_b_set,
+    bcmpkt_ep_nih_header_t_opaque_ctrl_c_set,
+    bcmpkt_ep_nih_header_t_opaque_object_a_set,
+    bcmpkt_ep_nih_header_t_opaque_object_b_set,
+    bcmpkt_ep_nih_header_t_opaque_object_c_set,
+    bcmpkt_ep_nih_header_t_recirc_profile_index_set,
+    bcmpkt_ep_nih_header_t_reserved_0_set,
+    bcmpkt_ep_nih_header_t_start_set,
+    bcmpkt_ep_nih_header_t_timestamp_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_ep_nih_header_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_ep_nih_header_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_EP_NIH_HEADER_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_29_1_2_ep_nih_header_t_field_data,
+};
+
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 11, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 11, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 13, 3);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 13, 3, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 10);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 10, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_t_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 10, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_t_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 10, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 12);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 12, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_erspan3_fixed_hdr_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = {
+    bcmpkt_erspan3_fixed_hdr_t_bso_get,
+    bcmpkt_erspan3_fixed_hdr_t_cos_get,
+    bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get,
+    bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get,
+    bcmpkt_erspan3_fixed_hdr_t_session_id_get,
+    bcmpkt_erspan3_fixed_hdr_t_t_get,
+    bcmpkt_erspan3_fixed_hdr_t_timestamp_get,
+    bcmpkt_erspan3_fixed_hdr_t_ver_get,
+    bcmpkt_erspan3_fixed_hdr_t_vlan_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_erspan3_fixed_hdr_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = {
+    bcmpkt_erspan3_fixed_hdr_t_bso_set,
+    bcmpkt_erspan3_fixed_hdr_t_cos_set,
+    bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set,
+    bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set,
+    bcmpkt_erspan3_fixed_hdr_t_session_id_set,
+    bcmpkt_erspan3_fixed_hdr_t_t_set,
+    bcmpkt_erspan3_fixed_hdr_t_timestamp_set,
+    bcmpkt_erspan3_fixed_hdr_t_ver_set,
+    bcmpkt_erspan3_fixed_hdr_t_vlan_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_erspan3_fixed_hdr_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_erspan3_fixed_hdr_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_29_1_2_erspan3_fixed_hdr_t_field_data,
+};
+
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 26, 6);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 26, 6, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 10);
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 10, val);
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_erspan3_subhdr_5_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = {
+    bcmpkt_erspan3_subhdr_5_t_platform_id_get,
+    bcmpkt_erspan3_subhdr_5_t_port_id_get,
+    bcmpkt_erspan3_subhdr_5_t_switch_id_get,
+    bcmpkt_erspan3_subhdr_5_t_timestamp_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_erspan3_subhdr_5_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = {
+    bcmpkt_erspan3_subhdr_5_t_platform_id_set,
+    bcmpkt_erspan3_subhdr_5_t_port_id_set,
+    bcmpkt_erspan3_subhdr_5_t_switch_id_set,
+    bcmpkt_erspan3_subhdr_5_t_timestamp_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_erspan3_subhdr_5_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_erspan3_subhdr_5_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_29_1_2_erspan3_subhdr_5_t_field_data,
+};
+
+
+static int32_t bcmpkt_esp_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_pad_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 8, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_pad_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 8, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_pad_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_pad_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_spi_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_esp_t_spi_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_esp_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ESP_T_FID_COUNT] = {
+    bcmpkt_esp_t_next_header_get,
+    bcmpkt_esp_t_pad_get,
+    bcmpkt_esp_t_pad_len_get,
+    bcmpkt_esp_t_seq_num_get,
+    bcmpkt_esp_t_spi_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_esp_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ESP_T_FID_COUNT] = {
+    bcmpkt_esp_t_next_header_set,
+    bcmpkt_esp_t_pad_set,
+    bcmpkt_esp_t_pad_len_set,
+    bcmpkt_esp_t_seq_num_set,
+    bcmpkt_esp_t_spi_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_esp_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_esp_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ESP_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_29_1_2_esp_t_field_data,
+};
+
+
+static int32_t bcmpkt_ethertype_t_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ethertype_t_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_ethertype_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ETHERTYPE_T_FID_COUNT] = {
+    bcmpkt_ethertype_t_type_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_ethertype_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ETHERTYPE_T_FID_COUNT] = {
+    bcmpkt_ethertype_t_type_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_ethertype_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_ethertype_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ETHERTYPE_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_29_1_2_ethertype_t_field_data,
+};
+
+
+static int32_t bcmpkt_frag_t_frag_info_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_frag_t_frag_info_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_frag_t_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_frag_t_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_frag_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_frag_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_frag_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_frag_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_frag_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_FRAG_T_FID_COUNT] = {
+    bcmpkt_frag_t_frag_info_get,
+    bcmpkt_frag_t_id_get,
+    bcmpkt_frag_t_next_header_get,
+    bcmpkt_frag_t_reserved_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_frag_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_FRAG_T_FID_COUNT] = {
+    bcmpkt_frag_t_frag_info_set,
+    bcmpkt_frag_t_id_set,
+    bcmpkt_frag_t_next_header_set,
+    bcmpkt_frag_t_reserved_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_frag_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_frag_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_FRAG_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_29_1_2_frag_t_field_data,
+};
+
+
+static int32_t bcmpkt_gbp_ethernet_shim_t_ethertype_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gbp_ethernet_shim_t_ethertype_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gbp_ethernet_shim_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 20, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gbp_ethernet_shim_t_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 20, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gbp_ethernet_shim_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gbp_ethernet_shim_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gbp_ethernet_shim_t_sid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gbp_ethernet_shim_t_sid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gbp_ethernet_shim_t_subtype_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gbp_ethernet_shim_t_subtype_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gbp_ethernet_shim_t_ver_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gbp_ethernet_shim_t_ver_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 4, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_gbp_ethernet_shim_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT] = {
+    bcmpkt_gbp_ethernet_shim_t_ethertype_get,
+    bcmpkt_gbp_ethernet_shim_t_flags_get,
+    bcmpkt_gbp_ethernet_shim_t_reserved_get,
+    bcmpkt_gbp_ethernet_shim_t_sid_get,
+    bcmpkt_gbp_ethernet_shim_t_subtype_get,
+    bcmpkt_gbp_ethernet_shim_t_ver_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_gbp_ethernet_shim_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT] = {
+    bcmpkt_gbp_ethernet_shim_t_ethertype_set,
+    bcmpkt_gbp_ethernet_shim_t_flags_set,
+    bcmpkt_gbp_ethernet_shim_t_reserved_set,
+    bcmpkt_gbp_ethernet_shim_t_sid_set,
+    bcmpkt_gbp_ethernet_shim_t_subtype_set,
+    bcmpkt_gbp_ethernet_shim_t_ver_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_gbp_ethernet_shim_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GBP_ETHERNET_SHIM_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_gbp_ethernet_shim_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_29_1_2_gbp_ethernet_shim_t_field_data,
+};
+
+
+static int32_t bcmpkt_generic_loopback_t_destination_obj_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_destination_obj_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_destination_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_destination_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_entropy_obj_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_entropy_obj_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_header_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 20, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_header_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 20, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_input_priority_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 12, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_input_priority_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 12, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_interface_ctrl_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 4, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_interface_ctrl_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 4, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_interface_obj_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_interface_obj_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_qos_obj_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_qos_obj_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_reserved_1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_reserved_1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_source_system_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_source_system_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_src_subport_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_src_subport_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_start_byte_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_generic_loopback_t_start_byte_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_generic_loopback_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = {
+    bcmpkt_generic_loopback_t_destination_obj_get,
+    bcmpkt_generic_loopback_t_destination_type_get,
+    bcmpkt_generic_loopback_t_entropy_obj_get,
+    bcmpkt_generic_loopback_t_flags_get,
+    bcmpkt_generic_loopback_t_header_type_get,
+    bcmpkt_generic_loopback_t_input_priority_get,
+    bcmpkt_generic_loopback_t_interface_ctrl_get,
+    bcmpkt_generic_loopback_t_interface_obj_get,
+    bcmpkt_generic_loopback_t_processing_ctrl_0_get,
+    bcmpkt_generic_loopback_t_processing_ctrl_1_get,
+    bcmpkt_generic_loopback_t_qos_obj_get,
+    bcmpkt_generic_loopback_t_reserved_1_get,
+    bcmpkt_generic_loopback_t_source_system_port_get,
+    bcmpkt_generic_loopback_t_src_subport_num_get,
+    bcmpkt_generic_loopback_t_start_byte_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_generic_loopback_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = {
+    bcmpkt_generic_loopback_t_destination_obj_set,
+    bcmpkt_generic_loopback_t_destination_type_set,
+    bcmpkt_generic_loopback_t_entropy_obj_set,
+    bcmpkt_generic_loopback_t_flags_set,
+    bcmpkt_generic_loopback_t_header_type_set,
+    bcmpkt_generic_loopback_t_input_priority_set,
+    bcmpkt_generic_loopback_t_interface_ctrl_set,
+    bcmpkt_generic_loopback_t_interface_obj_set,
+    bcmpkt_generic_loopback_t_processing_ctrl_0_set,
+    bcmpkt_generic_loopback_t_processing_ctrl_1_set,
+    bcmpkt_generic_loopback_t_qos_obj_set,
+    bcmpkt_generic_loopback_t_reserved_1_set,
+    bcmpkt_generic_loopback_t_source_system_port_set,
+    bcmpkt_generic_loopback_t_src_subport_num_set,
+    bcmpkt_generic_loopback_t_start_byte_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_generic_loopback_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_generic_loopback_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_29_1_2_generic_loopback_t_field_data,
+};
+
+
+static int32_t bcmpkt_gpe_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_next_protocol_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_next_protocol_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_reserved0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_reserved0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_reserved1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_reserved1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_vni_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 8, 24);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gpe_t_vni_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 8, 24, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_gpe_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GPE_T_FID_COUNT] = {
+    bcmpkt_gpe_t_flags_get,
+    bcmpkt_gpe_t_next_protocol_get,
+    bcmpkt_gpe_t_reserved0_get,
+    bcmpkt_gpe_t_reserved1_get,
+    bcmpkt_gpe_t_vni_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_gpe_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GPE_T_FID_COUNT] = {
+    bcmpkt_gpe_t_flags_set,
+    bcmpkt_gpe_t_next_protocol_set,
+    bcmpkt_gpe_t_reserved0_set,
+    bcmpkt_gpe_t_reserved1_set,
+    bcmpkt_gpe_t_vni_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_gpe_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_gpe_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GPE_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_29_1_2_gpe_t_field_data,
+};
+
+
+static int32_t bcmpkt_gre_chksum_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_chksum_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gre_chksum_t_offset_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_chksum_t_offset_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_gre_chksum_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = {
+    bcmpkt_gre_chksum_t_checksum_get,
+    bcmpkt_gre_chksum_t_offset_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_gre_chksum_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = {
+    bcmpkt_gre_chksum_t_checksum_set,
+    bcmpkt_gre_chksum_t_offset_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_gre_chksum_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_gre_chksum_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_CHKSUM_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_29_1_2_gre_chksum_t_field_data,
+};
+
+
+static int32_t bcmpkt_gre_key_t_key_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_key_t_key_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_gre_key_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_KEY_T_FID_COUNT] = {
+    bcmpkt_gre_key_t_key_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_gre_key_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_KEY_T_FID_COUNT] = {
+    bcmpkt_gre_key_t_key_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_gre_key_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_gre_key_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_KEY_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_29_1_2_gre_key_t_field_data,
+};
+
+
+static int32_t bcmpkt_gre_rout_t_routing_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_rout_t_routing_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_gre_rout_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_ROUT_T_FID_COUNT] = {
+    bcmpkt_gre_rout_t_routing_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_gre_rout_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_ROUT_T_FID_COUNT] = {
+    bcmpkt_gre_rout_t_routing_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_gre_rout_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_gre_rout_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_ROUT_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_29_1_2_gre_rout_t_field_data,
+};
+
+
+static int32_t bcmpkt_gre_seq_t_sequence_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_seq_t_sequence_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_gre_seq_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_SEQ_T_FID_COUNT] = {
+    bcmpkt_gre_seq_t_sequence_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_gre_seq_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_SEQ_T_FID_COUNT] = {
+    bcmpkt_gre_seq_t_sequence_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_gre_seq_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_gre_seq_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_SEQ_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_29_1_2_gre_seq_t_field_data,
+};
+
+
+static int32_t bcmpkt_gre_t_c_r_k_s_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_t_c_r_k_s_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gre_t_protocol_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_t_protocol_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gre_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 19, 9);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 19, 9, val);
+    return ret;
+}
+
+static int32_t bcmpkt_gre_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 3);
+
+    return ret;
+}
+
+static int32_t bcmpkt_gre_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 3, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_gre_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_T_FID_COUNT] = {
+    bcmpkt_gre_t_c_r_k_s_get,
+    bcmpkt_gre_t_protocol_get,
+    bcmpkt_gre_t_reserved_get,
+    bcmpkt_gre_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_gre_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_T_FID_COUNT] = {
+    bcmpkt_gre_t_c_r_k_s_set,
+    bcmpkt_gre_t_protocol_set,
+    bcmpkt_gre_t_reserved_set,
+    bcmpkt_gre_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_gre_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_gre_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_GRE_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_29_1_2_gre_t_field_data,
+};
+
+
+static int32_t bcmpkt_hg3_base_t_cn_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 4, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_cn_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 4, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_cng_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 6, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_cng_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 6, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_entropy_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 8, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_entropy_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 8, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_ext_hdr_present_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 18, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_ext_hdr_present_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 18, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_hg3_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 17, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_hg3_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 17, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_l3_routed_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 31, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_l3_routed_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 31, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_mirror_copy_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_mirror_copy_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_reserved_etype_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 22, 10);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_reserved_etype_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 22, 10, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_system_destination_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 15);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_system_destination_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 15, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_system_destination_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 15, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_system_destination_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 15, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_system_source_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 15);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_system_source_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 15, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_tc_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_tc_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 20, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_base_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 20, 2, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_hg3_base_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_FID_COUNT] = {
+    bcmpkt_hg3_base_t_cn_get,
+    bcmpkt_hg3_base_t_cng_get,
+    bcmpkt_hg3_base_t_entropy_get,
+    bcmpkt_hg3_base_t_ext_hdr_present_get,
+    bcmpkt_hg3_base_t_hg3_reserved_get,
+    bcmpkt_hg3_base_t_l3_routed_get,
+    bcmpkt_hg3_base_t_mirror_copy_get,
+    bcmpkt_hg3_base_t_reserved_etype_get,
+    bcmpkt_hg3_base_t_system_destination_get,
+    bcmpkt_hg3_base_t_system_destination_type_get,
+    bcmpkt_hg3_base_t_system_source_get,
+    bcmpkt_hg3_base_t_tc_get,
+    bcmpkt_hg3_base_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_hg3_base_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_FID_COUNT] = {
+    bcmpkt_hg3_base_t_cn_set,
+    bcmpkt_hg3_base_t_cng_set,
+    bcmpkt_hg3_base_t_entropy_set,
+    bcmpkt_hg3_base_t_ext_hdr_present_set,
+    bcmpkt_hg3_base_t_hg3_reserved_set,
+    bcmpkt_hg3_base_t_l3_routed_set,
+    bcmpkt_hg3_base_t_mirror_copy_set,
+    bcmpkt_hg3_base_t_reserved_etype_set,
+    bcmpkt_hg3_base_t_system_destination_set,
+    bcmpkt_hg3_base_t_system_destination_type_set,
+    bcmpkt_hg3_base_t_system_source_set,
+    bcmpkt_hg3_base_t_tc_set,
+    bcmpkt_hg3_base_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_hg3_base_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_hg3_base_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_BASE_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_29_1_2_hg3_base_t_field_data,
+};
+
+
+static int32_t bcmpkt_hg3_extension_0_t_class_id_lsb_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_extension_0_t_class_id_lsb_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_extension_0_t_class_id_msb_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_extension_0_t_class_id_msb_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_extension_0_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 26, 6);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_extension_0_t_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 26, 6, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_extension_0_t_forwarding_domain_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_extension_0_t_forwarding_domain_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_extension_0_t_svp_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hg3_extension_0_t_svp_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_hg3_extension_0_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT] = {
+    bcmpkt_hg3_extension_0_t_class_id_lsb_get,
+    bcmpkt_hg3_extension_0_t_class_id_msb_get,
+    bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_get,
+    bcmpkt_hg3_extension_0_t_flags_get,
+    bcmpkt_hg3_extension_0_t_forwarding_domain_get,
+    bcmpkt_hg3_extension_0_t_svp_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_hg3_extension_0_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT] = {
+    bcmpkt_hg3_extension_0_t_class_id_lsb_set,
+    bcmpkt_hg3_extension_0_t_class_id_msb_set,
+    bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_set,
+    bcmpkt_hg3_extension_0_t_flags_set,
+    bcmpkt_hg3_extension_0_t_forwarding_domain_set,
+    bcmpkt_hg3_extension_0_t_svp_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_hg3_extension_0_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_EXTENSION_0_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_hg3_extension_0_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_29_1_2_hg3_extension_0_t_field_data,
+};
+
+
+static int32_t bcmpkt_hop_by_hop_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hop_by_hop_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hop_by_hop_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_hop_by_hop_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_hop_by_hop_t_option_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_hop_by_hop_t_option_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_hop_by_hop_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = {
+    bcmpkt_hop_by_hop_t_hdr_ext_len_get,
+    bcmpkt_hop_by_hop_t_next_header_get,
+    bcmpkt_hop_by_hop_t_option_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_hop_by_hop_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = {
+    bcmpkt_hop_by_hop_t_hdr_ext_len_set,
+    bcmpkt_hop_by_hop_t_next_header_set,
+    bcmpkt_hop_by_hop_t_option_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_hop_by_hop_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_hop_by_hop_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_HOP_BY_HOP_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_29_1_2_hop_by_hop_t_field_data,
+};
+
+
+static int32_t bcmpkt_icmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_icmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_icmp_t_code_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_icmp_t_code_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_icmp_t_icmp_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_icmp_t_icmp_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_icmp_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ICMP_T_FID_COUNT] = {
+    bcmpkt_icmp_t_checksum_get,
+    bcmpkt_icmp_t_code_get,
+    bcmpkt_icmp_t_icmp_type_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_icmp_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ICMP_T_FID_COUNT] = {
+    bcmpkt_icmp_t_checksum_set,
+    bcmpkt_icmp_t_code_set,
+    bcmpkt_icmp_t_icmp_type_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_icmp_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_icmp_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ICMP_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_29_1_2_icmp_t_field_data,
+};
+
+
+static int32_t bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_0_a_t_lns_device_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 24);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_0_a_t_lns_device_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 24, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_0_a_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT] = {
+    bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_get,
+    bcmpkt_ifa_flex_md_0_a_t_lns_device_id_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_0_a_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT] = {
+    bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_set,
+    bcmpkt_ifa_flex_md_0_a_t_lns_device_id_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_0_a_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_0_A_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_0_a_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_0_a_t_field_data,
+};
+
+
+static int32_t bcmpkt_ifa_flex_md_0_b_t_cn_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 26, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_0_b_t_cn_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 26, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_0_b_t_port_speed_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_0_b_t_port_speed_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_0_b_t_queue_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 20, 6);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_0_b_t_queue_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 20, 6, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 20);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 20, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_0_b_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT] = {
+    bcmpkt_ifa_flex_md_0_b_t_cn_get,
+    bcmpkt_ifa_flex_md_0_b_t_port_speed_get,
+    bcmpkt_ifa_flex_md_0_b_t_queue_id_get,
+    bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_0_b_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT] = {
+    bcmpkt_ifa_flex_md_0_b_t_cn_set,
+    bcmpkt_ifa_flex_md_0_b_t_port_speed_set,
+    bcmpkt_ifa_flex_md_0_b_t_queue_id_set,
+    bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_0_b_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_0_B_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_0_b_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_0_b_t_field_data,
+};
+
+
+static int32_t bcmpkt_ifa_flex_md_1_t_egress_port_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_1_t_egress_port_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_1_t_ingress_port_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_1_t_ingress_port_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_1_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT] = {
+    bcmpkt_ifa_flex_md_1_t_egress_port_id_get,
+    bcmpkt_ifa_flex_md_1_t_ingress_port_id_get,
+    bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_1_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT] = {
+    bcmpkt_ifa_flex_md_1_t_egress_port_id_set,
+    bcmpkt_ifa_flex_md_1_t_ingress_port_id_set,
+    bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_1_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_1_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_1_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_1_t_field_data,
+};
+
+
+static int32_t bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_2_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT] = {
+    bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_get,
+    bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_2_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT] = {
+    bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_set,
+    bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_2_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_2_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_2_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_2_t_field_data,
+};
+
+
+static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_3_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT] = {
+    bcmpkt_ifa_flex_md_3_t_mmu_stat_0_get,
+    bcmpkt_ifa_flex_md_3_t_mmu_stat_1_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_3_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT] = {
+    bcmpkt_ifa_flex_md_3_t_mmu_stat_0_set,
+    bcmpkt_ifa_flex_md_3_t_mmu_stat_1_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_3_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_3_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_3_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_3_t_field_data,
+};
+
+
+static int32_t bcmpkt_ifa_header_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_gns_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_gns_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_max_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_max_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_next_hdr_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_next_hdr_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_ver_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_header_t_ver_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_ifa_header_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_HEADER_T_FID_COUNT] = {
+    bcmpkt_ifa_header_t_flags_get,
+    bcmpkt_ifa_header_t_gns_get,
+    bcmpkt_ifa_header_t_max_length_get,
+    bcmpkt_ifa_header_t_next_hdr_get,
+    bcmpkt_ifa_header_t_ver_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_ifa_header_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_HEADER_T_FID_COUNT] = {
+    bcmpkt_ifa_header_t_flags_set,
+    bcmpkt_ifa_header_t_gns_set,
+    bcmpkt_ifa_header_t_max_length_set,
+    bcmpkt_ifa_header_t_next_hdr_set,
+    bcmpkt_ifa_header_t_ver_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_ifa_header_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_ifa_header_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_HEADER_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_29_1_2_ifa_header_t_field_data,
+};
+
+
+static int32_t bcmpkt_ifa_md_base_t_action_vector_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_md_base_t_action_vector_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_md_base_t_hop_limit_current_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_md_base_t_hop_limit_current_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_md_base_t_request_vector_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_md_base_t_request_vector_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_ifa_md_base_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_MD_BASE_T_FID_COUNT] = {
+    bcmpkt_ifa_md_base_t_action_vector_get,
+    bcmpkt_ifa_md_base_t_hop_limit_current_length_get,
+    bcmpkt_ifa_md_base_t_request_vector_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_ifa_md_base_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_MD_BASE_T_FID_COUNT] = {
+    bcmpkt_ifa_md_base_t_action_vector_set,
+    bcmpkt_ifa_md_base_t_hop_limit_current_length_set,
+    bcmpkt_ifa_md_base_t_request_vector_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_ifa_md_base_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_MD_BASE_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_ifa_md_base_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_MD_BASE_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_29_1_2_ifa_md_base_t_field_data,
+};
+
+
+static int32_t bcmpkt_ifa_metadata_t_action_vector_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_t_action_vector_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_t_hop_limit_current_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_t_hop_limit_current_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_t_metadata_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_t_metadata_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_t_request_vector_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ifa_metadata_t_request_vector_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_ifa_metadata_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_METADATA_T_FID_COUNT] = {
+    bcmpkt_ifa_metadata_t_action_vector_get,
+    bcmpkt_ifa_metadata_t_hop_limit_current_length_get,
+    bcmpkt_ifa_metadata_t_metadata_get,
+    bcmpkt_ifa_metadata_t_request_vector_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_ifa_metadata_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_METADATA_T_FID_COUNT] = {
+    bcmpkt_ifa_metadata_t_action_vector_set,
+    bcmpkt_ifa_metadata_t_hop_limit_current_length_set,
+    bcmpkt_ifa_metadata_t_metadata_set,
+    bcmpkt_ifa_metadata_t_request_vector_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_ifa_metadata_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_METADATA_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_ifa_metadata_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IFA_METADATA_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_29_1_2_ifa_metadata_t_field_data,
+};
+
+
+static int32_t bcmpkt_igmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_igmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_igmp_t_group_address_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_igmp_t_group_address_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_igmp_t_igmp_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_igmp_t_igmp_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_igmp_t_max_resp_time_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_igmp_t_max_resp_time_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_igmp_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IGMP_T_FID_COUNT] = {
+    bcmpkt_igmp_t_checksum_get,
+    bcmpkt_igmp_t_group_address_get,
+    bcmpkt_igmp_t_igmp_type_get,
+    bcmpkt_igmp_t_max_resp_time_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_igmp_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IGMP_T_FID_COUNT] = {
+    bcmpkt_igmp_t_checksum_set,
+    bcmpkt_igmp_t_group_address_set,
+    bcmpkt_igmp_t_igmp_type_set,
+    bcmpkt_igmp_t_max_resp_time_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_igmp_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_igmp_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IGMP_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_29_1_2_igmp_t_field_data,
+};
+
+
+static int32_t bcmpkt_ioam_e2e_t_ioam_e2e_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ioam_e2e_t_ioam_e2e_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ioam_e2e_t_ioam_e2e_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ioam_e2e_t_ioam_e2e_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ioam_e2e_t_ioam_hdr_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ioam_e2e_t_ioam_hdr_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ioam_e2e_t_namespace_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ioam_e2e_t_namespace_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ioam_e2e_t_next_protocol_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ioam_e2e_t_next_protocol_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ioam_e2e_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ioam_e2e_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ioam_e2e_t_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ioam_e2e_t_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_ioam_e2e_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IOAM_E2E_T_FID_COUNT] = {
+    bcmpkt_ioam_e2e_t_ioam_e2e_data_get,
+    bcmpkt_ioam_e2e_t_ioam_e2e_type_get,
+    bcmpkt_ioam_e2e_t_ioam_hdr_len_get,
+    bcmpkt_ioam_e2e_t_namespace_id_get,
+    bcmpkt_ioam_e2e_t_next_protocol_get,
+    bcmpkt_ioam_e2e_t_reserved_get,
+    bcmpkt_ioam_e2e_t_type_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_ioam_e2e_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IOAM_E2E_T_FID_COUNT] = {
+    bcmpkt_ioam_e2e_t_ioam_e2e_data_set,
+    bcmpkt_ioam_e2e_t_ioam_e2e_type_set,
+    bcmpkt_ioam_e2e_t_ioam_hdr_len_set,
+    bcmpkt_ioam_e2e_t_namespace_id_set,
+    bcmpkt_ioam_e2e_t_next_protocol_set,
+    bcmpkt_ioam_e2e_t_reserved_set,
+    bcmpkt_ioam_e2e_t_type_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_ioam_e2e_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IOAM_E2E_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_ioam_e2e_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IOAM_E2E_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_29_1_2_ioam_e2e_t_field_data,
+};
+
+
+static int32_t bcmpkt_ipfix_t_export_time_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_export_time_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_obs_domain_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_obs_domain_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipfix_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_ipfix_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPFIX_T_FID_COUNT] = {
+    bcmpkt_ipfix_t_export_time_get,
+    bcmpkt_ipfix_t_length_get,
+    bcmpkt_ipfix_t_obs_domain_id_get,
+    bcmpkt_ipfix_t_sequence_num_get,
+    bcmpkt_ipfix_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_ipfix_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPFIX_T_FID_COUNT] = {
+    bcmpkt_ipfix_t_export_time_set,
+    bcmpkt_ipfix_t_length_set,
+    bcmpkt_ipfix_t_obs_domain_id_set,
+    bcmpkt_ipfix_t_sequence_num_set,
+    bcmpkt_ipfix_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_ipfix_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_ipfix_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPFIX_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_29_1_2_ipfix_t_field_data,
+};
+
+
+static int32_t bcmpkt_ipv4_t_da_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_da_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_flags_frag_offset_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_flags_frag_offset_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_hdr_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_hdr_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_option_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_option_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_protocol_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_protocol_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_sa_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_sa_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_tos_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_tos_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_total_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_total_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_ttl_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_ttl_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_version_hdr_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv4_t_version_hdr_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_ipv4_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV4_T_FID_COUNT] = {
+    bcmpkt_ipv4_t_da_get,
+    bcmpkt_ipv4_t_flags_frag_offset_get,
+    bcmpkt_ipv4_t_hdr_checksum_get,
+    bcmpkt_ipv4_t_id_get,
+    bcmpkt_ipv4_t_option_get,
+    bcmpkt_ipv4_t_protocol_get,
+    bcmpkt_ipv4_t_sa_get,
+    bcmpkt_ipv4_t_tos_get,
+    bcmpkt_ipv4_t_total_length_get,
+    bcmpkt_ipv4_t_ttl_get,
+    bcmpkt_ipv4_t_version_hdr_len_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_ipv4_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV4_T_FID_COUNT] = {
+    bcmpkt_ipv4_t_da_set,
+    bcmpkt_ipv4_t_flags_frag_offset_set,
+    bcmpkt_ipv4_t_hdr_checksum_set,
+    bcmpkt_ipv4_t_id_set,
+    bcmpkt_ipv4_t_option_set,
+    bcmpkt_ipv4_t_protocol_set,
+    bcmpkt_ipv4_t_sa_set,
+    bcmpkt_ipv4_t_tos_set,
+    bcmpkt_ipv4_t_total_length_set,
+    bcmpkt_ipv4_t_ttl_set,
+    bcmpkt_ipv4_t_version_hdr_len_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_ipv4_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_ipv4_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV4_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_29_1_2_ipv4_t_field_data,
+};
+
+
+static int32_t bcmpkt_ipv6_t_da_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_da_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_flow_label_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 20);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_flow_label_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 20, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_hop_limit_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_hop_limit_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 8, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 8, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_payload_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_payload_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_sa_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_sa_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_traffic_class_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 20, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_traffic_class_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 20, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_ipv6_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_ipv6_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV6_T_FID_COUNT] = {
+    bcmpkt_ipv6_t_da_get,
+    bcmpkt_ipv6_t_flow_label_get,
+    bcmpkt_ipv6_t_hop_limit_get,
+    bcmpkt_ipv6_t_next_header_get,
+    bcmpkt_ipv6_t_payload_length_get,
+    bcmpkt_ipv6_t_sa_get,
+    bcmpkt_ipv6_t_traffic_class_get,
+    bcmpkt_ipv6_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_ipv6_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV6_T_FID_COUNT] = {
+    bcmpkt_ipv6_t_da_set,
+    bcmpkt_ipv6_t_flow_label_set,
+    bcmpkt_ipv6_t_hop_limit_set,
+    bcmpkt_ipv6_t_next_header_set,
+    bcmpkt_ipv6_t_payload_length_set,
+    bcmpkt_ipv6_t_sa_set,
+    bcmpkt_ipv6_t_traffic_class_set,
+    bcmpkt_ipv6_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_ipv6_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_ipv6_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_IPV6_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_29_1_2_ipv6_t_field_data,
+};
+
+
+static int32_t bcmpkt_l2_t_macda_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_l2_t_macda_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_l2_t_macsa_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_l2_t_macsa_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_l2_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_L2_T_FID_COUNT] = {
+    bcmpkt_l2_t_macda_get,
+    bcmpkt_l2_t_macsa_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_l2_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_L2_T_FID_COUNT] = {
+    bcmpkt_l2_t_macda_set,
+    bcmpkt_l2_t_macsa_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_l2_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_L2_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_l2_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_L2_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_29_1_2_l2_t_field_data,
+};
+
+
+static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_mirror_erspan_sn_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = {
+    bcmpkt_mirror_erspan_sn_t_seq_num_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_mirror_erspan_sn_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = {
+    bcmpkt_mirror_erspan_sn_t_seq_num_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_mirror_erspan_sn_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_mirror_erspan_sn_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_29_1_2_mirror_erspan_sn_t_field_data,
+};
+
+
+static int32_t bcmpkt_mirror_transport_t_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_mirror_transport_t_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_mirror_transport_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = {
+    bcmpkt_mirror_transport_t_data_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_mirror_transport_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = {
+    bcmpkt_mirror_transport_t_data_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_mirror_transport_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_mirror_transport_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_29_1_2_mirror_transport_t_field_data,
+};
+
+
+static int32_t bcmpkt_mpls_ach_t_channel_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_ach_t_channel_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_ach_t_cw_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_ach_t_cw_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_ach_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_ach_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_ach_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_ach_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 4, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_mpls_ach_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_ACH_T_FID_COUNT] = {
+    bcmpkt_mpls_ach_t_channel_type_get,
+    bcmpkt_mpls_ach_t_cw_type_get,
+    bcmpkt_mpls_ach_t_reserved_get,
+    bcmpkt_mpls_ach_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_mpls_ach_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_ACH_T_FID_COUNT] = {
+    bcmpkt_mpls_ach_t_channel_type_set,
+    bcmpkt_mpls_ach_t_cw_type_set,
+    bcmpkt_mpls_ach_t_reserved_set,
+    bcmpkt_mpls_ach_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_mpls_ach_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_mpls_ach_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_ACH_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_29_1_2_mpls_ach_t_field_data,
+};
+
+
+static int32_t bcmpkt_mpls_bv_t_value_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_bv_t_value_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_mpls_bv_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_BV_T_FID_COUNT] = {
+    bcmpkt_mpls_bv_t_value_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_mpls_bv_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_BV_T_FID_COUNT] = {
+    bcmpkt_mpls_bv_t_value_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_mpls_bv_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_mpls_bv_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_BV_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_29_1_2_mpls_bv_t_field_data,
+};
+
+
+static int32_t bcmpkt_mpls_cw_t_cw_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_cw_t_cw_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_cw_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 12);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_cw_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 12, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_cw_t_seq_number_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_cw_t_seq_number_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_mpls_cw_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_CW_T_FID_COUNT] = {
+    bcmpkt_mpls_cw_t_cw_type_get,
+    bcmpkt_mpls_cw_t_reserved_get,
+    bcmpkt_mpls_cw_t_seq_number_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_mpls_cw_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_CW_T_FID_COUNT] = {
+    bcmpkt_mpls_cw_t_cw_type_set,
+    bcmpkt_mpls_cw_t_reserved_set,
+    bcmpkt_mpls_cw_t_seq_number_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_mpls_cw_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_mpls_cw_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_CW_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_29_1_2_mpls_cw_t_field_data,
+};
+
+
+static int32_t bcmpkt_mpls_t_bos_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_t_bos_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_t_exp_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 9, 3);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_t_exp_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 9, 3, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_t_label_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 12, 20);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_t_label_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 12, 20, val);
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_t_ttl_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_mpls_t_ttl_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_mpls_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_T_FID_COUNT] = {
+    bcmpkt_mpls_t_bos_get,
+    bcmpkt_mpls_t_exp_get,
+    bcmpkt_mpls_t_label_get,
+    bcmpkt_mpls_t_ttl_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_mpls_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_T_FID_COUNT] = {
+    bcmpkt_mpls_t_bos_set,
+    bcmpkt_mpls_t_exp_set,
+    bcmpkt_mpls_t_label_set,
+    bcmpkt_mpls_t_ttl_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_mpls_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_mpls_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_MPLS_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_29_1_2_mpls_t_field_data,
+};
+
+
+static int32_t bcmpkt_p_1588_t_cntrl_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[8], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_cntrl_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[8], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_correction_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_correction_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_domain_nb_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_domain_nb_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_logmsginterval_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[8], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_logmsginterval_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[8], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_msg_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_msg_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_msg_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_msg_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_reserved1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 20, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_reserved1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 20, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_reserved2_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_reserved3_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_reserved3_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_seq_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[7], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_seq_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[7], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_srcportid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_srcportid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_transportspec_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_transportspec_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 4, val);
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 4);
+
+    return ret;
+}
+
+static int32_t bcmpkt_p_1588_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 4, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_p_1588_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T_FID_COUNT] = {
+    bcmpkt_p_1588_t_cntrl_get,
+    bcmpkt_p_1588_t_correction_get,
+    bcmpkt_p_1588_t_domain_nb_get,
+    bcmpkt_p_1588_t_flags_get,
+    bcmpkt_p_1588_t_logmsginterval_get,
+    bcmpkt_p_1588_t_msg_length_get,
+    bcmpkt_p_1588_t_msg_type_get,
+    bcmpkt_p_1588_t_reserved1_get,
+    bcmpkt_p_1588_t_reserved2_get,
+    bcmpkt_p_1588_t_reserved3_get,
+    bcmpkt_p_1588_t_seq_id_get,
+    bcmpkt_p_1588_t_srcportid_get,
+    bcmpkt_p_1588_t_transportspec_get,
+    bcmpkt_p_1588_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_p_1588_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T_FID_COUNT] = {
+    bcmpkt_p_1588_t_cntrl_set,
+    bcmpkt_p_1588_t_correction_set,
+    bcmpkt_p_1588_t_domain_nb_set,
+    bcmpkt_p_1588_t_flags_set,
+    bcmpkt_p_1588_t_logmsginterval_set,
+    bcmpkt_p_1588_t_msg_length_set,
+    bcmpkt_p_1588_t_msg_type_set,
+    bcmpkt_p_1588_t_reserved1_set,
+    bcmpkt_p_1588_t_reserved2_set,
+    bcmpkt_p_1588_t_reserved3_set,
+    bcmpkt_p_1588_t_seq_id_set,
+    bcmpkt_p_1588_t_srcportid_set,
+    bcmpkt_p_1588_t_transportspec_set,
+    bcmpkt_p_1588_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_p_1588_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_p_1588_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_P_1588_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_29_1_2_p_1588_t_field_data,
+};
+
+
+static int32_t bcmpkt_prog_ext_hdr_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_prog_ext_hdr_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_prog_ext_hdr_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_prog_ext_hdr_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_prog_ext_hdr_t_option_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_prog_ext_hdr_t_option_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_prog_ext_hdr_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = {
+    bcmpkt_prog_ext_hdr_t_hdr_ext_len_get,
+    bcmpkt_prog_ext_hdr_t_next_header_get,
+    bcmpkt_prog_ext_hdr_t_option_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_prog_ext_hdr_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = {
+    bcmpkt_prog_ext_hdr_t_hdr_ext_len_set,
+    bcmpkt_prog_ext_hdr_t_next_header_set,
+    bcmpkt_prog_ext_hdr_t_option_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_prog_ext_hdr_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_prog_ext_hdr_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PROG_EXT_HDR_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_29_1_2_prog_ext_hdr_t_field_data,
+};
+
+
+static int32_t bcmpkt_psamp_0_t_flowset_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_flowset_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_next_hop_index_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_next_hop_index_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_psamp_0_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_0_T_FID_COUNT] = {
+    bcmpkt_psamp_0_t_flowset_get,
+    bcmpkt_psamp_0_t_length_get,
+    bcmpkt_psamp_0_t_next_hop_index_get,
+    bcmpkt_psamp_0_t_obs_time_ns_get,
+    bcmpkt_psamp_0_t_obs_time_s_get,
+    bcmpkt_psamp_0_t_template_id_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_psamp_0_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_0_T_FID_COUNT] = {
+    bcmpkt_psamp_0_t_flowset_set,
+    bcmpkt_psamp_0_t_length_set,
+    bcmpkt_psamp_0_t_next_hop_index_set,
+    bcmpkt_psamp_0_t_obs_time_ns_set,
+    bcmpkt_psamp_0_t_obs_time_s_set,
+    bcmpkt_psamp_0_t_template_id_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_psamp_0_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_psamp_0_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_0_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_29_1_2_psamp_0_t_field_data,
+};
+
+
+static int32_t bcmpkt_psamp_1_t_dlb_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_dlb_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_egress_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_egress_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_epoch_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_epoch_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_variable_flag_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_1_t_variable_flag_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 16, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_psamp_1_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_1_T_FID_COUNT] = {
+    bcmpkt_psamp_1_t_dlb_id_get,
+    bcmpkt_psamp_1_t_egress_port_get,
+    bcmpkt_psamp_1_t_epoch_get,
+    bcmpkt_psamp_1_t_ingress_port_get,
+    bcmpkt_psamp_1_t_sampled_length_get,
+    bcmpkt_psamp_1_t_user_meta_data_get,
+    bcmpkt_psamp_1_t_variable_flag_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_psamp_1_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_1_T_FID_COUNT] = {
+    bcmpkt_psamp_1_t_dlb_id_set,
+    bcmpkt_psamp_1_t_egress_port_set,
+    bcmpkt_psamp_1_t_epoch_set,
+    bcmpkt_psamp_1_t_ingress_port_set,
+    bcmpkt_psamp_1_t_sampled_length_set,
+    bcmpkt_psamp_1_t_user_meta_data_set,
+    bcmpkt_psamp_1_t_variable_flag_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_psamp_1_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_psamp_1_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_1_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_29_1_2_psamp_1_t_field_data,
+};
+
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[4], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[4], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[4], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[4], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_psamp_mirror_on_drop_0_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = {
+    bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_length_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get,
+    bcmpkt_psamp_mirror_on_drop_0_t_template_id_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_psamp_mirror_on_drop_0_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = {
+    bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_length_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set,
+    bcmpkt_psamp_mirror_on_drop_0_t_template_id_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_psamp_mirror_on_drop_0_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_psamp_mirror_on_drop_0_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_29_1_2_psamp_mirror_on_drop_0_t_field_data,
+};
+
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 6);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 6, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_smod_state_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 22, 2);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_smod_state_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 22, 2, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_psamp_mirror_on_drop_3_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = {
+    bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_get,
+    bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_get,
+    bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_get,
+    bcmpkt_psamp_mirror_on_drop_3_t_smod_state_get,
+    bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_get,
+    bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_get,
+    bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_psamp_mirror_on_drop_3_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = {
+    bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_set,
+    bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_set,
+    bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_set,
+    bcmpkt_psamp_mirror_on_drop_3_t_smod_state_set,
+    bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_set,
+    bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_set,
+    bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_psamp_mirror_on_drop_3_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_psamp_mirror_on_drop_3_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_29_1_2_psamp_mirror_on_drop_3_t_field_data,
+};
+
+
+static int32_t bcmpkt_rarp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_operation_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_operation_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_rarp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_rarp_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RARP_T_FID_COUNT] = {
+    bcmpkt_rarp_t_hardware_len_get,
+    bcmpkt_rarp_t_hardware_type_get,
+    bcmpkt_rarp_t_operation_get,
+    bcmpkt_rarp_t_prot_addr_len_get,
+    bcmpkt_rarp_t_protocol_type_get,
+    bcmpkt_rarp_t_sender_ha_get,
+    bcmpkt_rarp_t_sender_ip_get,
+    bcmpkt_rarp_t_target_ha_get,
+    bcmpkt_rarp_t_target_ip_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_rarp_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RARP_T_FID_COUNT] = {
+    bcmpkt_rarp_t_hardware_len_set,
+    bcmpkt_rarp_t_hardware_type_set,
+    bcmpkt_rarp_t_operation_set,
+    bcmpkt_rarp_t_prot_addr_len_set,
+    bcmpkt_rarp_t_protocol_type_set,
+    bcmpkt_rarp_t_sender_ha_set,
+    bcmpkt_rarp_t_sender_ip_set,
+    bcmpkt_rarp_t_target_ha_set,
+    bcmpkt_rarp_t_target_ip_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_rarp_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_rarp_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RARP_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_29_1_2_rarp_t_field_data,
+};
+
+
+static int32_t bcmpkt_routing_t_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_routing_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_routing_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_segments_left_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_routing_t_segments_left_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_routing_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ROUTING_T_FID_COUNT] = {
+    bcmpkt_routing_t_data_get,
+    bcmpkt_routing_t_hdr_ext_len_get,
+    bcmpkt_routing_t_next_header_get,
+    bcmpkt_routing_t_routing_type_get,
+    bcmpkt_routing_t_segments_left_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_routing_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ROUTING_T_FID_COUNT] = {
+    bcmpkt_routing_t_data_set,
+    bcmpkt_routing_t_hdr_ext_len_set,
+    bcmpkt_routing_t_next_header_set,
+    bcmpkt_routing_t_routing_type_set,
+    bcmpkt_routing_t_segments_left_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_routing_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_routing_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_ROUTING_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_29_1_2_routing_t_field_data,
+};
+
+
+static int32_t bcmpkt_rspan_t_tag_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rspan_t_tag_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_rspan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_rspan_t_tpid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_rspan_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RSPAN_T_FID_COUNT] = {
+    bcmpkt_rspan_t_tag_get,
+    bcmpkt_rspan_t_tpid_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_rspan_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RSPAN_T_FID_COUNT] = {
+    bcmpkt_rspan_t_tag_set,
+    bcmpkt_rspan_t_tpid_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_rspan_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_rspan_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_RSPAN_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_29_1_2_rspan_t_field_data,
+};
+
+
+static int32_t bcmpkt_segment_routing_srh_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_segment_routing_srh_t_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_segment_routing_srh_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_segment_routing_srh_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_segment_routing_srh_t_last_entry_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_segment_routing_srh_t_last_entry_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_segment_routing_srh_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_segment_routing_srh_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_segment_routing_srh_t_routing_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_segment_routing_srh_t_routing_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_segment_routing_srh_t_segments_left_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_segment_routing_srh_t_segments_left_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_segment_routing_srh_t_tag_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_segment_routing_srh_t_tag_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_segment_routing_srh_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_SRH_T_FID_COUNT] = {
+    bcmpkt_segment_routing_srh_t_flags_get,
+    bcmpkt_segment_routing_srh_t_hdr_ext_len_get,
+    bcmpkt_segment_routing_srh_t_last_entry_get,
+    bcmpkt_segment_routing_srh_t_next_header_get,
+    bcmpkt_segment_routing_srh_t_routing_type_get,
+    bcmpkt_segment_routing_srh_t_segments_left_get,
+    bcmpkt_segment_routing_srh_t_tag_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_segment_routing_srh_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_SRH_T_FID_COUNT] = {
+    bcmpkt_segment_routing_srh_t_flags_set,
+    bcmpkt_segment_routing_srh_t_hdr_ext_len_set,
+    bcmpkt_segment_routing_srh_t_last_entry_set,
+    bcmpkt_segment_routing_srh_t_next_header_set,
+    bcmpkt_segment_routing_srh_t_routing_type_set,
+    bcmpkt_segment_routing_srh_t_segments_left_set,
+    bcmpkt_segment_routing_srh_t_tag_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_segment_routing_srh_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_SRH_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_segment_routing_srh_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_SRH_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_29_1_2_segment_routing_srh_t_field_data,
+};
+
+
+static int32_t bcmpkt_segment_routing_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_segment_routing_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_segment_routing_t_last_entry_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_segment_routing_t_last_entry_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_segment_routing_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_segment_routing_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_segment_routing_t_routing_type_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_segment_routing_t_routing_type_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_segment_routing_t_seg_list_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_segment_routing_t_seg_list_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_segment_routing_t_segments_left_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_segment_routing_t_segments_left_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_segment_routing_t_tag_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_segment_routing_t_tag_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_segment_routing_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_T_FID_COUNT] = {
+    bcmpkt_segment_routing_t_hdr_ext_len_get,
+    bcmpkt_segment_routing_t_last_entry_flags_get,
+    bcmpkt_segment_routing_t_next_header_get,
+    bcmpkt_segment_routing_t_routing_type_get,
+    bcmpkt_segment_routing_t_seg_list_get,
+    bcmpkt_segment_routing_t_segments_left_get,
+    bcmpkt_segment_routing_t_tag_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_segment_routing_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_T_FID_COUNT] = {
+    bcmpkt_segment_routing_t_hdr_ext_len_set,
+    bcmpkt_segment_routing_t_last_entry_flags_set,
+    bcmpkt_segment_routing_t_next_header_set,
+    bcmpkt_segment_routing_t_routing_type_set,
+    bcmpkt_segment_routing_t_seg_list_set,
+    bcmpkt_segment_routing_t_segments_left_set,
+    bcmpkt_segment_routing_t_tag_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_segment_routing_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_segment_routing_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SEGMENT_ROUTING_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_29_1_2_segment_routing_t_field_data,
+};
+
+
+static int32_t bcmpkt_sflow_shim_0_t_sys_destination_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_0_t_sys_destination_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_0_t_sys_source_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_0_t_sys_source_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_0_t_version_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_0_t_version_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_sflow_shim_0_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = {
+    bcmpkt_sflow_shim_0_t_sys_destination_get,
+    bcmpkt_sflow_shim_0_t_sys_source_get,
+    bcmpkt_sflow_shim_0_t_version_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_sflow_shim_0_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = {
+    bcmpkt_sflow_shim_0_t_sys_destination_set,
+    bcmpkt_sflow_shim_0_t_sys_source_set,
+    bcmpkt_sflow_shim_0_t_version_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_sflow_shim_0_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_sflow_shim_0_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_29_1_2_sflow_shim_0_t_field_data,
+};
+
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_dest_sample_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 30, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_dest_sample_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 30, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_discarded_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 27, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_discarded_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 27, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_flex_sample_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 29, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_flex_sample_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 29, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_mcast_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 28, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_mcast_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 28, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_src_sample_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 31, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_src_sample_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 31, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_truncated_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 26, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_flag_truncated_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 26, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_reserved_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 7);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_reserved_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 7, val);
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 23, 3);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 23, 3, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_sflow_shim_1_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = {
+    bcmpkt_sflow_shim_1_t_flag_dest_sample_get,
+    bcmpkt_sflow_shim_1_t_flag_discarded_get,
+    bcmpkt_sflow_shim_1_t_flag_flex_sample_get,
+    bcmpkt_sflow_shim_1_t_flag_mcast_get,
+    bcmpkt_sflow_shim_1_t_flag_src_sample_get,
+    bcmpkt_sflow_shim_1_t_flag_truncated_get,
+    bcmpkt_sflow_shim_1_t_reserved_get,
+    bcmpkt_sflow_shim_1_t_sys_opcode_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_sflow_shim_1_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = {
+    bcmpkt_sflow_shim_1_t_flag_dest_sample_set,
+    bcmpkt_sflow_shim_1_t_flag_discarded_set,
+    bcmpkt_sflow_shim_1_t_flag_flex_sample_set,
+    bcmpkt_sflow_shim_1_t_flag_mcast_set,
+    bcmpkt_sflow_shim_1_t_flag_src_sample_set,
+    bcmpkt_sflow_shim_1_t_flag_truncated_set,
+    bcmpkt_sflow_shim_1_t_reserved_set,
+    bcmpkt_sflow_shim_1_t_sys_opcode_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_sflow_shim_1_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_sflow_shim_1_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_29_1_2_sflow_shim_1_t_field_data,
+};
+
+
+static int32_t bcmpkt_sflow_shim_2_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_2_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_sflow_shim_2_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = {
+    bcmpkt_sflow_shim_2_t_sequence_num_get,
+    bcmpkt_sflow_shim_2_t_user_meta_data_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_sflow_shim_2_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = {
+    bcmpkt_sflow_shim_2_t_sequence_num_set,
+    bcmpkt_sflow_shim_2_t_user_meta_data_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_sflow_shim_2_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_sflow_shim_2_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_29_1_2_sflow_shim_2_t_field_data,
+};
+
+
+static int32_t bcmpkt_snap_llc_t_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_snap_llc_t_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_snap_llc_t_snap_llc_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_snap_llc_t_snap_llc_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_snap_llc_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SNAP_LLC_T_FID_COUNT] = {
+    bcmpkt_snap_llc_t_length_get,
+    bcmpkt_snap_llc_t_snap_llc_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_snap_llc_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SNAP_LLC_T_FID_COUNT] = {
+    bcmpkt_snap_llc_t_length_set,
+    bcmpkt_snap_llc_t_snap_llc_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_snap_llc_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_snap_llc_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SNAP_LLC_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_29_1_2_snap_llc_t_field_data,
+};
+
+
+static int32_t bcmpkt_std_segment_id_t_data_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_std_segment_id_t_data_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_std_segment_id_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_STD_SEGMENT_ID_T_FID_COUNT] = {
+    bcmpkt_std_segment_id_t_data_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_std_segment_id_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_STD_SEGMENT_ID_T_FID_COUNT] = {
+    bcmpkt_std_segment_id_t_data_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_std_segment_id_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_STD_SEGMENT_ID_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_std_segment_id_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_STD_SEGMENT_ID_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_29_1_2_std_segment_id_t_field_data,
+};
+
+
+static int32_t bcmpkt_svtag_t_data_lwr_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_svtag_t_data_lwr_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_svtag_t_data_upr_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_svtag_t_data_upr_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_svtag_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SVTAG_T_FID_COUNT] = {
+    bcmpkt_svtag_t_data_lwr_get,
+    bcmpkt_svtag_t_data_upr_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_svtag_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SVTAG_T_FID_COUNT] = {
+    bcmpkt_svtag_t_data_lwr_set,
+    bcmpkt_svtag_t_data_upr_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_svtag_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SVTAG_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_svtag_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_SVTAG_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_29_1_2_svtag_t_field_data,
+};
+
+
+static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_first_4bytes_t_src_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_first_4bytes_t_src_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_tcp_first_4bytes_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = {
+    bcmpkt_tcp_first_4bytes_t_dst_port_get,
+    bcmpkt_tcp_first_4bytes_t_src_port_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_tcp_first_4bytes_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = {
+    bcmpkt_tcp_first_4bytes_t_dst_port_set,
+    bcmpkt_tcp_first_4bytes_t_src_port_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_tcp_first_4bytes_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_tcp_first_4bytes_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_29_1_2_tcp_first_4bytes_t_field_data,
+};
+
+
+static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[3], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[3], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_win_size_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_tcp_last_16bytes_t_win_size_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 0, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_tcp_last_16bytes_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = {
+    bcmpkt_tcp_last_16bytes_t_ack_num_get,
+    bcmpkt_tcp_last_16bytes_t_checksum_get,
+    bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get,
+    bcmpkt_tcp_last_16bytes_t_seq_num_get,
+    bcmpkt_tcp_last_16bytes_t_urgent_ptr_get,
+    bcmpkt_tcp_last_16bytes_t_win_size_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_tcp_last_16bytes_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = {
+    bcmpkt_tcp_last_16bytes_t_ack_num_set,
+    bcmpkt_tcp_last_16bytes_t_checksum_set,
+    bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set,
+    bcmpkt_tcp_last_16bytes_t_seq_num_set,
+    bcmpkt_tcp_last_16bytes_t_urgent_ptr_set,
+    bcmpkt_tcp_last_16bytes_t_win_size_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_tcp_last_16bytes_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_tcp_last_16bytes_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_29_1_2_tcp_last_16bytes_t_field_data,
+};
+
+
+static int32_t bcmpkt_udp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_checksum_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_dst_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_src_port_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_src_port_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_udp_length_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_udp_t_udp_length_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_udp_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UDP_T_FID_COUNT] = {
+    bcmpkt_udp_t_checksum_get,
+    bcmpkt_udp_t_dst_port_get,
+    bcmpkt_udp_t_src_port_get,
+    bcmpkt_udp_t_udp_length_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_udp_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UDP_T_FID_COUNT] = {
+    bcmpkt_udp_t_checksum_set,
+    bcmpkt_udp_t_dst_port_set,
+    bcmpkt_udp_t_src_port_set,
+    bcmpkt_udp_t_udp_length_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_udp_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_udp_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UDP_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_29_1_2_udp_t_field_data,
+};
+
+
+static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_unknown_l3_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = {
+    bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get,
+    bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_unknown_l3_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = {
+    bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set,
+    bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_unknown_l3_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_unknown_l3_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L3_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_29_1_2_unknown_l3_t_field_data,
+};
+
+
+static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_unknown_l4_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = {
+    bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_unknown_l4_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = {
+    bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_unknown_l4_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_unknown_l4_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L4_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_29_1_2_unknown_l4_t_field_data,
+};
+
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_8_9_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[2], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_unknown_l5_t_l5_bytes_8_9_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[2], 16, 16, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_unknown_l5_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = {
+    bcmpkt_unknown_l5_t_l5_bytes_0_1_get,
+    bcmpkt_unknown_l5_t_l5_bytes_2_3_get,
+    bcmpkt_unknown_l5_t_l5_bytes_4_7_get,
+    bcmpkt_unknown_l5_t_l5_bytes_8_9_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_unknown_l5_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = {
+    bcmpkt_unknown_l5_t_l5_bytes_0_1_set,
+    bcmpkt_unknown_l5_t_l5_bytes_2_3_set,
+    bcmpkt_unknown_l5_t_l5_bytes_4_7_set,
+    bcmpkt_unknown_l5_t_l5_bytes_8_9_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_unknown_l5_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_unknown_l5_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_UNKNOWN_L5_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_29_1_2_unknown_l5_t_field_data,
+};
+
+
+static int32_t bcmpkt_vlan_t_cfi_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 12, 1);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_cfi_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 12, 1, val);
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_pcp_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 13, 3);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_pcp_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 13, 3, val);
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 16);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_tpid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 16, val);
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_vid_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 12);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vlan_t_vid_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 12, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_vlan_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_VLAN_T_FID_COUNT] = {
+    bcmpkt_vlan_t_cfi_get,
+    bcmpkt_vlan_t_pcp_get,
+    bcmpkt_vlan_t_tpid_get,
+    bcmpkt_vlan_t_vid_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_vlan_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_VLAN_T_FID_COUNT] = {
+    bcmpkt_vlan_t_cfi_set,
+    bcmpkt_vlan_t_pcp_set,
+    bcmpkt_vlan_t_tpid_set,
+    bcmpkt_vlan_t_vid_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_vlan_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_vlan_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_VLAN_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_29_1_2_vlan_t_field_data,
+};
+
+
+static int32_t bcmpkt_vxlan_t_flags_reserved_1_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_vxlan_t_flags_reserved_1_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_vxlan_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vxlan_t_reserved2_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_vxlan_t_vn_id_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[1], 8, 24);
+
+    return ret;
+}
+
+static int32_t bcmpkt_vxlan_t_vn_id_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[1], 8, 24, val);
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_vxlan_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_VXLAN_T_FID_COUNT] = {
+    bcmpkt_vxlan_t_flags_reserved_1_get,
+    bcmpkt_vxlan_t_reserved2_get,
+    bcmpkt_vxlan_t_vn_id_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_vxlan_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_VXLAN_T_FID_COUNT] = {
+    bcmpkt_vxlan_t_flags_reserved_1_set,
+    bcmpkt_vxlan_t_reserved2_set,
+    bcmpkt_vxlan_t_vn_id_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_vxlan_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_vxlan_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_VXLAN_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_29_1_2_vxlan_t_field_data,
+};
+
+
+static int32_t bcmpkt_wesp_t_flags_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 0, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_flags_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 0, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_header_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 16, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_header_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 16, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_next_header_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 24, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_next_header_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 24, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_seq_num_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_spi_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_spi_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_trailer_len_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    *val = WORD_FIELD_GET(data[0], 8, 8);
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_trailer_len_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    WORD_FIELD_SET(data[0], 8, 8, val);
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_wesp_iv_get(uint32_t *data, int profile, uint32_t *val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+static int32_t bcmpkt_wesp_t_wesp_iv_set(uint32_t *data, int profile, uint32_t val) {
+    int32_t ret = SHR_E_NONE;
+
+    ret = SHR_E_PARAM;
+
+    return ret;
+}
+
+bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_29_1_2_wesp_t_fget[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_WESP_T_FID_COUNT] = {
+    bcmpkt_wesp_t_flags_get,
+    bcmpkt_wesp_t_header_len_get,
+    bcmpkt_wesp_t_next_header_get,
+    bcmpkt_wesp_t_seq_num_get,
+    bcmpkt_wesp_t_spi_get,
+    bcmpkt_wesp_t_trailer_len_get,
+    bcmpkt_wesp_t_wesp_iv_get,
+};
+
+bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_29_1_2_wesp_t_fset[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_WESP_T_FID_COUNT] = {
+    bcmpkt_wesp_t_flags_set,
+    bcmpkt_wesp_t_header_len_set,
+    bcmpkt_wesp_t_next_header_set,
+    bcmpkt_wesp_t_seq_num_set,
+    bcmpkt_wesp_t_spi_set,
+    bcmpkt_wesp_t_trailer_len_set,
+    bcmpkt_wesp_t_wesp_iv_set,
+};
+
+static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_29_1_2_wesp_t_field_data[] = {
+    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT
+};
+
+static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_29_1_2_wesp_t_field_info = {
+    .num_fields = BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_WESP_T_FID_COUNT,
+    .info = bcm56890_a0_dna_6_5_29_1_2_wesp_t_field_data,
+};
+
+static bcmpkt_flex_pmd_info_t bcm56890_a0_dna_6_5_29_1_2_flexhdr_info_list[BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_FLEXHDR_COUNT] = {
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_29_1_2_arp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_arp_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_arp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_29_1_2_authen_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_authen_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_authen_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_29_1_2_bfd_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_bfd_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_bfd_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_29_1_2_cntag_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_cntag_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_cntag_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_29_1_2_cpu_composites_0_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_cpu_composites_0_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_cpu_composites_0_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_29_1_2_cpu_composites_1_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_cpu_composites_1_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_cpu_composites_1_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_29_1_2_dest_option_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_dest_option_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_dest_option_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_29_1_2_ep_nih_header_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_ep_nih_header_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_ep_nih_header_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_29_1_2_erspan3_fixed_hdr_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_erspan3_fixed_hdr_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_erspan3_fixed_hdr_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_29_1_2_erspan3_subhdr_5_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_erspan3_subhdr_5_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_erspan3_subhdr_5_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_29_1_2_esp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_esp_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_esp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_29_1_2_ethertype_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_ethertype_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_ethertype_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_29_1_2_frag_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_frag_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_frag_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_29_1_2_gbp_ethernet_shim_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_gbp_ethernet_shim_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_gbp_ethernet_shim_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_29_1_2_generic_loopback_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_generic_loopback_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_generic_loopback_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_29_1_2_gpe_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_gpe_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_gpe_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_29_1_2_gre_chksum_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_gre_chksum_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_gre_chksum_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_29_1_2_gre_key_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_gre_key_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_gre_key_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_29_1_2_gre_rout_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_gre_rout_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_gre_rout_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_29_1_2_gre_seq_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_gre_seq_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_gre_seq_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_29_1_2_gre_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_gre_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_gre_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_29_1_2_hg3_base_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_hg3_base_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_hg3_base_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_29_1_2_hg3_extension_0_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_hg3_extension_0_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_hg3_extension_0_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_29_1_2_hop_by_hop_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_hop_by_hop_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_hop_by_hop_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_29_1_2_icmp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_icmp_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_icmp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_0_a_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_0_a_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_0_a_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_0_b_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_0_b_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_0_b_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_1_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_1_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_1_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_2_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_2_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_2_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_3_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_3_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_ifa_flex_md_3_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_29_1_2_ifa_header_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_ifa_header_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_ifa_header_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_29_1_2_ifa_md_base_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_ifa_md_base_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_ifa_md_base_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_29_1_2_ifa_metadata_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_ifa_metadata_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_ifa_metadata_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_29_1_2_igmp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_igmp_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_igmp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_29_1_2_ioam_e2e_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_ioam_e2e_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_ioam_e2e_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_29_1_2_ipfix_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_ipfix_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_ipfix_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_29_1_2_ipv4_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_ipv4_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_ipv4_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_29_1_2_ipv6_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_ipv6_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_ipv6_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_29_1_2_l2_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_l2_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_l2_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_29_1_2_mirror_erspan_sn_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_mirror_erspan_sn_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_mirror_erspan_sn_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_29_1_2_mirror_transport_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_mirror_transport_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_mirror_transport_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_29_1_2_mpls_ach_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_mpls_ach_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_mpls_ach_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_29_1_2_mpls_bv_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_mpls_bv_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_mpls_bv_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_29_1_2_mpls_cw_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_mpls_cw_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_mpls_cw_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_29_1_2_mpls_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_mpls_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_mpls_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_29_1_2_p_1588_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_p_1588_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_p_1588_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_29_1_2_prog_ext_hdr_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_prog_ext_hdr_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_prog_ext_hdr_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_29_1_2_psamp_0_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_psamp_0_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_psamp_0_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_29_1_2_psamp_1_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_psamp_1_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_psamp_1_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_29_1_2_psamp_mirror_on_drop_0_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_psamp_mirror_on_drop_0_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_psamp_mirror_on_drop_0_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_29_1_2_psamp_mirror_on_drop_3_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_psamp_mirror_on_drop_3_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_psamp_mirror_on_drop_3_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_29_1_2_rarp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_rarp_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_rarp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_29_1_2_routing_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_routing_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_routing_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_29_1_2_rspan_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_rspan_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_rspan_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_29_1_2_segment_routing_srh_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_segment_routing_srh_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_segment_routing_srh_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_29_1_2_segment_routing_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_segment_routing_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_segment_routing_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_29_1_2_sflow_shim_0_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_sflow_shim_0_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_sflow_shim_0_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_29_1_2_sflow_shim_1_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_sflow_shim_1_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_sflow_shim_1_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_29_1_2_sflow_shim_2_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_sflow_shim_2_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_sflow_shim_2_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_29_1_2_snap_llc_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_snap_llc_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_snap_llc_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_29_1_2_std_segment_id_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_std_segment_id_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_std_segment_id_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_29_1_2_svtag_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_svtag_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_svtag_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_29_1_2_tcp_first_4bytes_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_tcp_first_4bytes_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_tcp_first_4bytes_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_29_1_2_tcp_last_16bytes_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_tcp_last_16bytes_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_tcp_last_16bytes_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_29_1_2_udp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_udp_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_udp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_29_1_2_unknown_l3_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_unknown_l3_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_unknown_l3_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_29_1_2_unknown_l4_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_unknown_l4_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_unknown_l4_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_29_1_2_unknown_l5_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_unknown_l5_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_unknown_l5_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_29_1_2_vlan_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_vlan_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_vlan_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_29_1_2_vxlan_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_vxlan_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_vxlan_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_29_1_2_wesp_t_field_info,
+        .reasons_info = NULL,
+        .flex_fget = bcm56890_a0_dna_6_5_29_1_2_wesp_t_fget,
+        .flex_fset = bcm56890_a0_dna_6_5_29_1_2_wesp_t_fset,
+    },
+    {
+        .is_supported = TRUE,
+        .field_info = &bcm56890_a0_dna_6_5_29_1_2_rxpmd_flex_field_info,
+        .reasons_info = &bcm56890_a0_dna_6_5_29_1_2_rxpmd_flex_reasons_info,
+        .flex_common_fget = bcm56890_a0_rxpmd_flex_fget,
+        .flex_common_fset = bcm56890_a0_rxpmd_flex_fset,
+    },
+};
+
+static shr_enum_map_t bcm56890_a0_dna_6_5_29_1_2_flexhdr_id_map[] = {
+    BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_FLEXHDR_NAME_MAP_INIT
+};
+
+shr_enum_map_t * bcm56890_a0_dna_6_5_29_1_2_flexhdr_map_get(void)
+{
+    return bcm56890_a0_dna_6_5_29_1_2_flexhdr_id_map;
+}
+
+bcmpkt_flex_pmd_info_t * bcm56890_a0_dna_6_5_29_1_2_flex_pmd_info_get(uint32_t hid)
+{
+    if (hid >= BCM56890_A0_DNA_6_5_29_1_2_BCMPKT_FLEXHDR_COUNT) {
+        return NULL;
+    }
+
+    return &bcm56890_a0_dna_6_5_29_1_2_flexhdr_info_list[hid];
+}
+
+int bcm56890_a0_dna_6_5_29_1_2_flexhdr_variant_support_map[BCMPKT_PMD_COUNT] = {
+    14,
+    21,
+    22,
+    71,
+};
\ No newline at end of file
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/Kbuild b/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/Kbuild
new file mode 100644
index 000000000..deee1a716
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/Kbuild
@@ -0,0 +1,63 @@
+# -*- Kbuild -*-
+#
+# Linux Generic Netlink module.
+#
+# $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+# The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+# 
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License 
+# version 2 as published by the Free Software Foundation.
+# 
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+# 
+# A copy of the GNU General Public License version 2 (GPLv2) can
+# be found in the LICENSES folder.$
+#
+# Enable Kernel PMD
+KNETCB_CPPFLAGS += -DKPMD
+
+# Build Netlink channel for general packetI/O
+BUILD_GENL_PACKET = 0
+
+# Build Netlink channel for packet sampling
+BUILD_GENL_PSAMPLE = 1
+
+## Build Netlink channel for packet sampling when kernel enables CONFIG_PSAMPLE
+#ifeq ($(CONFIG_PSAMPLE),)
+#BUILD_GENL_PSAMPLE = 1
+#endif
+
+ifeq ($(BUILD_GENL_PACKET),1)
+PACKET_CFLAGS = -DPACKET_SUPPORT
+PACKET_CB_OBJS = bcmgenl_packet.o
+endif
+
+ifeq ($(BUILD_GENL_PSAMPLE),1)
+PSAMPLE_CFLAGS = -DPSAMPLE_SUPPORT
+PSAMPLE_CB_OBJS = bcmgenl_psample.o
+endif
+
+obj-m := linux_bcmgenl.o
+
+ccflags-y := $(KNETCB_CPPFLAGS) $(LKM_CFLAGS) \
+	     $(SDK_PMD_KFLAGS) \
+	     -I$(SDK)/shr/include \
+	     -I$(SDK)/bcmdrd/include \
+	     -I$(SDK)/bcmltd/include \
+	     -I$(SDK)/bcmlrd/include \
+	     -I$(SDK)/linux/include \
+	     -I$(SDK)/linux/include/kernel \
+	     -I$(SDK)/linux/knet/include \
+	     -I$(SDK)/linux/knet \
+	     -I$(SDK)/linux/bcmgenl \
+	     $(PACKET_CFLAGS) \
+	     $(PSAMPLE_CFLAGS)
+
+linux_bcmgenl-y := $(SDK_PMD_KOBJS) \
+                   $(PACKET_CB_OBJS) \
+                   $(PSAMPLE_CB_OBJS) \
+                   bcmgenl.o
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/Makefile b/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/Makefile
new file mode 100644
index 000000000..3311fc413
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/Makefile
@@ -0,0 +1,55 @@
+#
+# $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+# The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+# 
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License 
+# version 2 as published by the Free Software Foundation.
+# 
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+# 
+# A copy of the GNU General Public License version 2 (GPLv2) can
+# be found in the LICENSES folder.$
+#
+# Linux KNET BCMGENL module.
+#
+
+# Include PMD library by default
+ifneq (0,$(KPMD))
+
+# Kernel module source directory
+KMODDIR = $(CURDIR)
+
+# Avoid creating links in original kernel module source directory
+GENDIR = $(KMODDIR)/generated
+ifneq ($(OUTPUT_DIR),)
+GENDIR = $(OUTPUT_DIR)/knet/generated/bcmgenl
+endif
+
+bcmgenl: kpmd
+	$(MAKE) -C $(GENDIR) all
+
+# SDK make helper for stand-alone PMD kernel module
+include $(SDK)/make/kpmd.mk
+
+distclean::
+	rm -rf $(GENDIR)
+
+endif # KPMD
+
+include Kbuild
+
+ifeq ($(KERNELRELEASE),)
+
+MOD_NAME = linux_bcmgenl
+
+include $(SDK)/make/lkm.mk
+
+endif
+
+.PHONY: bcmgenl distclean
+
+distclean::
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl.c b/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl.c
new file mode 100644
index 000000000..06bb99ff8
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl.c
@@ -0,0 +1,608 @@
+/*! \file bcmgenl.c
+ *
+ * BCMGENL module entry.
+ *
+ */
+/*
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ */
+
+#include <lkm/lkm.h>
+#include <lkm/ngknet_kapi.h>
+#include <ngknet_linux.h>
+#include <bcmgenl.h>
+
+#include <bcmgenl_packet.h>
+#include <bcmgenl_psample.h>
+
+#ifdef KPMD
+#include <bcmpkt/bcmpkt_flexhdr_internal.h>
+#include <bcmpkt/bcmpkt_flexhdr_field.h>
+#include <bcmpkt/bcmpkt_higig_defs.h>
+#include <bcmpkt/bcmpkt_lbhdr_field.h>
+#include <bcmpkt/bcmpkt_rxpmd.h>
+#include <bcmpkt/bcmpkt_rxpmd_fid.h>
+#include <bcmpkt/bcmpkt_rxpmd_field.h>
+#include <bcmpkt/bcmpkt_rxpmd_match_id.h>
+#include <bcmpkt/bcmpkt_txpmd_field.h>
+#endif /* KPMD */
+
+#include <shr/shr_error.h>
+
+/*! \cond */
+MODULE_AUTHOR("Broadcom Corporation");
+MODULE_DESCRIPTION("BCMGENL Module");
+MODULE_LICENSE("GPL");
+/*! \endcond */
+
+/*! driver proc entry root */
+static struct proc_dir_entry *bcmgenl_proc_root = NULL;
+
+/*! set BCMGENL_DEBUG for debug info */
+#define BCMGENL_DEBUG
+
+#ifdef BCMGENL_DEBUG
+#define DBG_LVL_VERB    0x1
+#define DBG_LVL_PDMP    0x2
+
+/*! \cond */
+static int debug = 0;
+MODULE_PARAM(debug, int, 0);
+MODULE_PARM_DESC(debug, "Debug level (default 0)");
+/*! \endcond */
+#endif /* BCMGENL_DEBUG */
+
+/*! These below need to match incoming enum values */
+#define FILTER_TAG_STRIP 0
+#define FILTER_TAG_KEEP  1
+#define FILTER_TAG_ORIGINAL 2
+
+#ifndef KPMD
+#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \
+    BCMDRD_DEV_T_##_bd,
+/*! Enumeration for all base device types. */
+typedef enum {
+    BCMDRD_DEV_T_NONE = 0,
+/*! \cond */
+#include <bcmdrd/bcmdrd_devlist.h>
+/*! \endcond */
+    BCMDRD_DEV_T_COUNT
+} bcmdrd_dev_type_t;
+
+/*! Create enumeration values from list of supported variants. */
+#define BCMLRD_VARIANT_ENTRY(_bd,_bu,_va,_ve,_vu,_vv,_vo,_vd,_r0,_r1)\
+    BCMLRD_VARIANT_T_##_bd##_##_ve,
+
+/*! Enumeration for all device variants. */
+typedef enum bcmlrd_variant_e {
+    BCMLRD_VARIANT_T_NONE = 0,
+/*! \cond */
+#include <bcmlrd/chip/bcmlrd_chip_variant.h>
+/*! \endcond */
+     BCMLRD_VARIANT_T_COUNT
+} bcmlrd_variant_t;
+#endif /* !KPMD */
+
+typedef struct ngknetcb_dev_s {
+    bool initialized;
+    bcmdrd_dev_type_t dev_type;
+    bcmlrd_variant_t var_type;
+} ngknetcb_dev_t;
+
+static ngknetcb_dev_t cb_dev[NUM_PDMA_DEV_MAX];
+
+#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \
+    {#_bd, BCMDRD_DEV_T_##_bd},
+static const struct {
+    char *name;
+    bcmdrd_dev_type_t dev;
+} device_types[] = {
+    {"device_none", BCMDRD_DEV_T_NONE},
+#include <bcmdrd/bcmdrd_devlist.h>
+    {"device_count", BCMDRD_DEV_T_COUNT}
+};
+
+#define BCMLRD_VARIANT_ENTRY(_bd,_bu,_va,_ve,_vu,_vv,_vo,_vd,_r0,_r1)\
+    {#_bd, #_ve, BCMLRD_VARIANT_T_##_bd##_##_ve},
+static const struct {
+    char *dev_name;
+    char *var_name;
+    bcmlrd_variant_t var;
+} variant_types[] = {
+    {"device_none", "variant_none", BCMLRD_VARIANT_T_NONE},
+#include <bcmlrd/chip/bcmlrd_chip_variant.h>
+    {"device_count", "variant_count", BCMLRD_VARIANT_T_COUNT}
+};
+
+void dump_skb(struct sk_buff *skb)
+{
+    int idx;
+    char str[128];
+    uint8_t *data = skb->data;
+
+    printk(KERN_INFO " SKB len: %4d\n", skb->len);
+    for (idx = 0; idx < skb->len; idx++) {
+        if ((idx & 0xf) == 0) {
+            printk(str, "%04x: ", idx);
+        }
+        if ((idx & 0xf) == 8) {
+            printk(&str[strlen(str)], "- ");
+        }
+        sprintf(&str[strlen(str)], "%02x ", data[idx]);
+        if ((idx & 0xf) == 0xf) {
+            sprintf(&str[strlen(str)], "\n");
+            printk("%s", str);
+        }
+    }
+    if ((idx & 0xf) != 0) {
+        sprintf(&str[strlen(str)], "\n");
+        printk("%s", str);
+    }
+}
+
+#ifdef BCMGENL_DEBUG
+static void
+dump_buffer(uint8_t * data, int size)
+{
+    const char         *const to_hex = "0123456789ABCDEF";
+    int i;
+    char                buffer[128];
+    char               *buffer_ptr;
+    int                 addr = 0;
+
+    buffer_ptr = buffer;
+    for (i = 0; i < size; i++) {
+        *buffer_ptr++ = ' ';
+        *buffer_ptr++ = to_hex[(data[i] >> 4) & 0xF];
+        *buffer_ptr++ = to_hex[data[i] & 0xF];
+        if (((i % 16) == 15) || (i == size - 1)) {
+            *buffer_ptr = '\0';
+            buffer_ptr = buffer;
+            printk(KERN_INFO "%04X  %s\n", addr, buffer);
+            addr = i + 1;
+        }
+    }
+}
+
+static void
+dump_pmd(uint8_t *pmd, int len)
+{
+    if (debug & DBG_LVL_PDMP) {
+        printk("PMD (%d bytes):\n", len);
+        dump_buffer(pmd, len);
+    }
+}
+
+void dump_bcmgenl_pkt(bcmgenl_pkt_t *bcmgenl_pkt)
+{
+    printk(KERN_INFO "Network namespace 0x%p\n",
+           bcmgenl_pkt->netns);
+    printk(KERN_INFO "ing_pp_port %d src_port %d, dst_port %d, dst_port_type %x\n",
+           bcmgenl_pkt->meta.ing_pp_port,
+           bcmgenl_pkt->meta.src_port,
+           bcmgenl_pkt->meta.dst_port,
+           bcmgenl_pkt->meta.dst_port_type);
+    printk(KERN_INFO "tag status %d",
+           bcmgenl_pkt->meta.tag_status);
+    printk(KERN_INFO "proto 0x%x, vlan 0x%x\n",
+           bcmgenl_pkt->meta.proto,
+           bcmgenl_pkt->meta.vlan);
+    printk(KERN_INFO "sample_rate %d, sample_size %d\n",
+           bcmgenl_pkt->psamp_meta.sample_rate,
+           bcmgenl_pkt->psamp_meta.sample_size);
+}
+#endif /* BCMGENL_DEBUG */
+
+/*
+ * The function get_tag_status() returns the tag status.
+ * 0  = Untagged
+ * 1  = Single inner-tag
+ * 2  = Single outer-tag
+ * 3  = Double tagged.
+ * -1 = Unsupported type
+ */
+static int
+get_tag_status(uint32_t dev_type, uint32_t variant, void *meta)
+{
+    uint32_t  *valptr;
+    uint32_t  fd_index;
+    uint32_t  outer_l2_hdr = 0;
+    int tag_status = -1;
+    uint32_t  match_id_minbit = 1;
+    uint32_t  outer_tag_match = 0x10;
+
+    if ((dev_type == 0xb880) || (dev_type == 0xb780)) {
+        /* Field BCM_PKTIO_RXPMD_MATCH_ID_LO has tag status in RX PMD */
+        fd_index = 2;
+        valptr = (uint32_t *)meta;
+        match_id_minbit = (dev_type == 0xb780) ? 2 : 1;
+        outer_l2_hdr = (valptr[fd_index] >> match_id_minbit & 0xFF);
+        outer_tag_match = ((dev_type == 0xb780 && variant == 1) ? 0x8 : 0x10);
+        if (outer_l2_hdr & 0x1) {
+            tag_status = 0;
+            if (outer_l2_hdr & 0x4) {
+                tag_status = 0;
+            }
+            if (outer_l2_hdr & outer_tag_match) {
+                tag_status = 2;
+                if (outer_l2_hdr & 0x20) {
+                    tag_status = 3;
+                }
+            }
+            else if (outer_l2_hdr & 0x20) {
+                tag_status = 1;
+            }
+        }
+    }
+    else if ((dev_type == 0xb990)|| (dev_type == 0xb996)) {
+        fd_index = 9;
+        valptr = (uint32_t *)meta;
+        /* On TH4, outer_l2_header means INCOMING_TAG_STATUS.
+         * TH4 only supports single tagging, so if TAG_STATUS
+         * says there's a tag, then we don't want to strip.
+         * Otherwise, we do.
+         */
+        outer_l2_hdr = (valptr[fd_index] >> 13) & 3;
+
+        if (outer_l2_hdr) {
+            tag_status = 2;
+        } else {
+            tag_status = 0;
+        }
+    }
+#ifdef BCMGENL_DEBUG
+    if (debug & DBG_LVL_VERB) {
+        if (outer_l2_hdr) {
+            printk("  L2 Header Present\n");
+            if (tag_status == 0) {
+                printk("  Incoming frame untagged\n");
+            } else {
+                printk("  Incoming frame tagged\n");
+            }
+            switch (tag_status) {
+            case 0:
+                printk("  SNAP/LLC\n");
+                break;
+            case 1:
+                printk("  Inner Tagged\n");
+                break;
+            case 2:
+                printk("  Outer Tagged\n");
+                break;
+            case 3:
+                printk("  Double Tagged\n");
+                break;
+            default:
+                break;
+            }
+        }
+        printk("%s; Device Type: %d; tag status: %d\n", __func__, dev_type, tag_status);
+    }
+#endif /* BCMGENL_DEBUG */
+    return tag_status;
+}
+
+static int
+dstport_get(void *pkt_meta)
+{
+    int dstport = 0;
+    HIGIG_t *hg = (HIGIG_t *)pkt_meta;
+    HIGIG2_t *hg2 = (HIGIG2_t *)pkt_meta;
+
+    if (HIGIG2_STARTf_GET(*hg2) == BCMPKT_HIGIG2_SOF)
+    {
+        if (HIGIG2_MCSTf_GET(*hg2))
+        {
+            dstport = 0;
+        }
+        else
+        {
+            dstport = HIGIG2_DST_PORT_MGIDLf_GET(*hg2);
+        }
+    }
+    else if (HIGIG_STARTf_GET(*hg) == BCMPKT_HIGIG_SOF)
+    {
+        dstport = HIGIG_DST_PORTf_GET(*hg);
+    }
+#ifdef BCMGENL_DEBUG
+    else
+    {
+        /* SDKLT-43751: Failed to parse dstport on TD4/TH4 */
+        if (debug & DBG_LVL_VERB) {
+            printk("%s: Could not detect metadata sop type: 0x%02x\n",
+                   __func__, HIGIG_STARTf_GET(*hg));
+            return (-1);
+        }
+    }
+#endif /* BCMGENL_DEBUG */
+    return dstport;
+}
+
+static bool
+dstport_type_get(void *pkt_meta)
+{
+    HIGIG2_t *hg2 = (HIGIG2_t *)pkt_meta;
+
+    if (HIGIG2_STARTf_GET(*hg2) == BCMPKT_HIGIG2_SOF)
+    {
+        if (HIGIG2_MCSTf_GET(*hg2))
+        {
+            return DSTPORT_TYPE_MC;
+        }
+    }
+    return DSTPORT_TYPE_NONE;
+}
+
+int
+bcmgenl_pkt_package(
+    int dev,
+    struct sk_buff *skb,
+    bcmgenl_info_t *bcmgenl_info,
+    bcmgenl_pkt_t *bcmgenl_pkt)
+{
+    int unit, rv, rv2;
+    struct ngknet_callback_desc *cbd;
+    uint8_t *pkt;
+    uint32_t rxpmd[BCMPKT_RXPMD_SIZE_WORDS];
+    uint32_t dev_type = 0;
+    bcmlrd_variant_t var_type;
+    uint32_t *rxpmd_flex = NULL;
+    uint32_t rxpmd_flex_len = 0;
+    uint32_t hid, val = 0;
+    int fid;
+
+    if (!skb || !bcmgenl_info || !bcmgenl_pkt) {
+        return SHR_E_PARAM;
+    }
+    cbd = NGKNET_SKB_CB(skb);
+    unit = cbd->dinfo->dev_no;
+    pkt = cbd->pmd + cbd->pmd_len;
+
+    bcmgenl_pkt->meta.proto = (uint16_t) ((pkt[12] << 8) | pkt[13]);
+    bcmgenl_pkt->meta.vlan = (uint16_t) ((pkt[14] << 8) | pkt[15]);
+
+    bcmgenl_pkt->netns = bcmgenl_info->netns;
+
+    if (cb_dev[unit].initialized) {
+#ifdef KPMD
+        dev_type = cb_dev[unit].dev_type;
+        var_type = cb_dev[unit].var_type;
+        /* Get tag status */
+        bcmgenl_pkt->meta.tag_status = get_tag_status(dev_type, var_type,(void *)cbd->pmd);
+
+        /* Get dst port */
+        bcmgenl_pkt->meta.dst_port = dstport_get((void *)cbd->pmd);
+        bcmgenl_pkt->meta.dst_port_type = dstport_type_get((void *)cbd->pmd);
+
+        /* Get src port */
+        rv = bcmpkt_rxpmd_field_get(dev_type,
+            (uint32_t *)cbd->pmd, BCMPKT_RXPMD_SRC_PORT_NUM, &val);
+        if (SHR_SUCCESS(rv)) {
+            bcmgenl_pkt->meta.src_port = val;
+        }
+        rv = bcmpkt_rxpmd_flexdata_get
+            (dev_type, rxpmd, &rxpmd_flex, &rxpmd_flex_len);
+        if (SHR_FAILURE(rv) && (rv != SHR_E_UNAVAIL)) {
+            printk("Failed to detect RXPMD_FLEX.\n");
+        } else {
+            if (rxpmd_flex_len) {
+                /* Get hid of RXPMD_FLEX_T */
+                if (bcmpkt_flexhdr_header_id_get(var_type,
+                                                 "RXPMD_FLEX_T", &hid)) {
+                    rv = SHR_E_UNAVAIL;
+                }
+
+                /* Get fid of INGRESS_PP_PORT_7_0 */
+                if (SHR_FAILURE(rv) ||
+                    bcmpkt_flexhdr_field_id_get(var_type, hid,
+                                                "INGRESS_PP_PORT_7_0",
+                                                &fid) ||
+                    bcmpkt_flexhdr_field_get(var_type, hid,
+                                             rxpmd_flex,
+                                             BCMPKT_FLEXHDR_PROFILE_NONE,
+                                             fid, &val)) {
+                    rv2 = SHR_E_UNAVAIL;
+                }
+                if (SHR_SUCCESS(rv) || SHR_SUCCESS(rv2)) {
+                    bcmgenl_pkt->meta.ing_pp_port = val;
+                }
+
+                /* Get fid of ING_TIMESTAMP_31_0 */
+                if (SHR_FAILURE(rv) ||
+                    bcmpkt_flexhdr_field_id_get(var_type, hid,
+                                                "ING_TIMESTAMP_31_0",
+                                                &fid) ||
+                    bcmpkt_flexhdr_field_get(var_type, hid,
+                                             rxpmd_flex,
+                                             BCMPKT_FLEXHDR_PROFILE_NONE,
+                                             fid, &val)) {
+                    rv2 = SHR_E_UNAVAIL;
+                }
+                if (SHR_SUCCESS(rv) || SHR_SUCCESS(rv2)) {
+                    bcmgenl_pkt->meta.timestamp = val;
+                }
+            }
+        }
+#endif /* KPMD */
+    }
+#ifdef BCMGENL_DEBUG
+    if (debug & DBG_LVL_PDMP) {
+        if (cb_dev[unit].initialized) {
+            printk("bcmgenl_pkt_package for dev %d: %s variant %s\n",
+                   cbd->dinfo->dev_no, cbd->dinfo->type_str,
+                   variant_types[cb_dev[unit].var_type].var_name);
+            printk("dev_type: %d\n", cb_dev[unit].dev_type);
+            printk("variant: %d\n\n", cb_dev[unit].var_type);
+
+            if (cbd->pmd_len != 0) {
+                dump_pmd(cbd->pmd, cbd->pmd_len);
+            }
+            printk("Packet raw data (%d):", cbd->pkt_len);
+            dump_buffer(pkt, cbd->pkt_len);
+        }
+        dump_bcmgenl_pkt(bcmgenl_pkt);
+    }
+#endif /* BCMGENL_DEBUG */
+    return SHR_E_NONE;
+}
+
+#ifdef KPMD
+/*
+  Change this structure to reflect the match_ids of interest.
+  This is an example of how it can be used.
+*/
+typedef struct cb_match_id_s {
+    int egress_pkt_fwd_l2_hdr_etag;
+    int egress_pkt_fwd_l2_hdr_l2;
+    int ingress_pkt_inner_l2_hdr_l2;
+    int ingress_pkt_fwd_l2_hdr_etag;
+} cb_match_id_t;
+
+static cb_match_id_t match_id;
+
+/*
+  Initialize the desired match_ids for use later in the code.
+*/
+static void
+init_match_ids(int unit)
+{
+    uint32_t val;
+
+    match_id.egress_pkt_fwd_l2_hdr_etag  = -1;
+    match_id.egress_pkt_fwd_l2_hdr_l2    = -1;
+    match_id.ingress_pkt_inner_l2_hdr_l2 = -1;
+    match_id.ingress_pkt_fwd_l2_hdr_etag = -1;
+    if (bcmpkt_rxpmd_match_id_get(cb_dev[unit].var_type,
+                                  "EGRESS_PKT_FWD_L2_HDR_ETAG", &val) == 0) {
+        match_id.egress_pkt_fwd_l2_hdr_etag = val;
+        printk("EGRESS_PKT_FWD_L2_HDR_ETAG: %d\n", val);
+    }
+    if (bcmpkt_rxpmd_match_id_get(cb_dev[unit].var_type,
+                                  "EGRESS_PKT_FWD_L2_HDR_L2", &val) == 0) {
+        match_id.egress_pkt_fwd_l2_hdr_l2 = val;
+        printk("EGRESS_PKT_FWD_L2_HDR_L2: %d\n", val);
+    }
+    if (bcmpkt_rxpmd_match_id_get(cb_dev[unit].var_type,
+                                  "INGRESS_PKT_INNER_L2_HDR_L2", &val) == 0) {
+        match_id.ingress_pkt_inner_l2_hdr_l2 = val;
+        printk("INGRESS_PKT_INNER_L2_HDR_L2: %d\n", val);
+    }
+    if (bcmpkt_rxpmd_match_id_get(cb_dev[unit].var_type,
+                                  "INGRESS_PKT_FWD_L2_HDR_ETAG", &val) == 0) {
+        match_id.ingress_pkt_fwd_l2_hdr_etag = val;
+        printk("INGRESS_PKT_FWD_L2_HDR_ETAG: %d\n", val);
+    }
+}
+#endif /* KPMD */
+
+/*!
+ * \brief Device Initialization Callback.
+ *
+ * The device initialization callback allows an external module to
+ * perform device-specific initialization in preparation for Tx and Rx
+ * packet processing.
+ *
+ * \param [in] dinfo Device information.
+ *
+ */
+static void
+init_cb(ngknet_dev_info_t *dinfo)
+{
+    int unit;
+    bcmdrd_dev_type_t dt;
+    bcmlrd_variant_t var;
+    unit = dinfo->dev_no;
+
+    if ((unsigned int)unit >= NUM_PDMA_DEV_MAX) {
+        return;
+    }
+
+    for (dt = 0; dt < BCMDRD_DEV_T_COUNT; dt++) {
+        if (!strcasecmp(dinfo->type_str, device_types[dt].name)) {
+            cb_dev[unit].dev_type = dt;
+            break;
+        }
+    }
+
+    for (var = 0; var < BCMLRD_VARIANT_T_COUNT; var++) {
+        if ((!strcasecmp(dinfo->type_str, variant_types[var].dev_name)) &&
+            (!strcasecmp(dinfo->var_str, variant_types[var].var_name))) {
+            cb_dev[unit].var_type = var;
+            break;
+        }
+    }
+
+    printk("init_cb unit %d, dev %s variant %s\n",
+           dinfo->dev_no, dinfo->type_str, dinfo->var_str);
+    printk("dev_type: %d\n", cb_dev[unit].dev_type);
+    printk("variant: %d\n", cb_dev[unit].var_type);
+
+    cb_dev[unit].initialized = true;
+
+#ifdef KPMD
+    init_match_ids(unit);
+#endif /* KPMD */
+}
+
+static int
+bcmgenl_proc_cleanup(void)
+{
+    remove_proc_entry(BCMGENL_PROCFS_PATH, NULL);
+    remove_proc_entry(BCM_PROCFS_NAME, NULL);
+    return 0;
+}
+
+static int
+bcmgenl_proc_init(void)
+{
+    /* initialize proc files (for bcmgenl) */
+    proc_mkdir(BCM_PROCFS_NAME, NULL);
+    bcmgenl_proc_root = proc_mkdir(BCMGENL_PROCFS_PATH, NULL);
+    return 0;
+}
+
+static int __init
+bcmgenl_init_module(void)
+{
+    ngknet_dev_init_cb_register(init_cb);
+
+    bcmgenl_proc_init();
+#ifdef PACKET_SUPPORT
+    bcmgenl_packet_init();
+#endif
+#ifdef PSAMPLE_SUPPORT
+    bcmgenl_psample_init();
+#endif
+    return 0;
+}
+
+static void __exit
+bcmgenl_exit_module(void)
+{
+    ngknet_dev_init_cb_unregister(init_cb);
+
+#ifdef PACKET_SUPPORT
+    bcmgenl_packet_cleanup();
+#endif
+#ifdef PSAMPLE_SUPPORT
+    bcmgenl_psample_cleanup();
+#endif
+    bcmgenl_proc_cleanup();
+}
+
+module_init(bcmgenl_init_module);
+module_exit(bcmgenl_exit_module);
+
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl.h b/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl.h
new file mode 100644
index 000000000..a3aa8c1ce
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl.h
@@ -0,0 +1,165 @@
+/*! \file bcmgenl.h
+ *
+ * BCMGENL module entry.
+ *
+ */
+/*
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ */
+
+#ifndef BCMGENL_H
+#define BCMGENL_H
+
+#include <lkm/lkm.h>
+#include <linux/netdevice.h>
+#include <linux/time.h>
+
+/*! Max length of proc path */
+#define PROCFS_MAX_PATH         1024
+
+/*! Module information */
+#define BCMGENL_MODULE_NAME     "linux_bcmgenl"
+
+/*! Use similar path to SDK6 genl psample path */
+#define BCM_PROCFS_NAME        "bcm"
+#define BCMGENL_PROCFS_NAME    "genl"
+#define BCMGENL_PROCFS_PATH    (BCM_PROCFS_NAME "/" BCMGENL_PROCFS_NAME)
+
+typedef struct {
+    uint8_t cmic_type;
+    uint8_t dcb_type;
+    uint8_t dcb_size;
+    uint8_t pkt_hdr_size;
+    uint32_t cdma_channels;
+} knet_hw_info_t;
+
+/*! generic netlink data per interface */
+typedef struct {
+    struct list_head list;
+    struct net_device *dev;
+    uint16_t id;
+    uint8_t  port;
+    uint16_t vlan;
+    uint16_t qnum;
+    uint32_t sample_rate; /* sFlow sample rate */
+    uint32_t sample_size; /* sFlow sample size */
+} bcmgenl_netif_t;
+
+/*! generic netlink interface info */
+typedef struct {
+    struct list_head netif_list;
+    int netif_count;
+    knet_hw_info_t hw;
+    struct net *netns;
+    spinlock_t lock;
+} bcmgenl_info_t;
+
+#define DSTPORT_TYPE_NONE    0
+#define DSTPORT_TYPE_DISCARD 1
+#define DSTPORT_TYPE_MC      2
+
+/*! generic netlink packet metadata */
+typedef struct bcmgenl_packet_meta_s {
+    int ing_pp_port;
+    int src_port;
+    int dst_port;
+    int dst_port_type;
+    uint32_t trunk_id;
+    uint64_t timestamp;
+    /*
+     * Tag status
+     * 0x0(Untagged)
+     * 0x1(Single inner-tag)
+     * 0x2(Single outer-tag)
+     * 0x3(Double tagged)
+     */
+    int tag_status;
+    uint16_t proto;
+    uint16_t vlan;
+} bcmgenl_packet_meta_t;
+
+/*! generic netlink packet sampling metadata */
+typedef struct bcmgenl_psample_meta_s {
+    int sample_rate; /* Sampling rate */
+    int sample_size; /* Truncated size of sampled packet */
+} bcmgenl_psample_meta_t;
+
+/*! generic netlink packet info */
+typedef struct bcmgenl_pkt_s {
+    struct net *netns; /* net namespace */
+    bcmgenl_packet_meta_t meta;
+    bcmgenl_psample_meta_t psamp_meta;
+} bcmgenl_pkt_t;
+
+/*!
+ * \brief Dump skb buffer.
+ *
+ * \param [in] skb socket buffer.
+ */
+void dump_skb(struct sk_buff *skb);
+
+/*!
+ * \brief Dump generic netlink packet.
+ *
+ * \param [in] bcmgenl_pkt generic netlink packet.
+ */
+void dump_bcmgenl_pkt(bcmgenl_pkt_t *bcmgenl_pkt);
+
+/*!
+ * \brief Package packet to Generic Netlink packet format.
+ *
+ * \param [in] dev NGKNET device structure point.
+ * \param [in] skb socket buffer.
+ * \param [in] pkt packet data buffer.
+ * \param [in] pkt_meta packet metadata buffer.
+ * \param [in] bcmgenl_info Generic Netlink interface information
+ *             structure point.
+ * \param [out] bcmgenl_pkt Generic Netlink packet information
+ *              structure point.
+ *
+ * \retval SHR_E_NONE No errors.
+ * \retval SHR_E_XXXX Operation failed.
+ */
+extern int
+bcmgenl_pkt_package(
+    int dev,
+    struct sk_buff *skb,
+    bcmgenl_info_t *bcmgenl_info,
+    bcmgenl_pkt_t *bcmgenl_pkt);
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(3,17,0)
+/* last should be static or global */
+#define bcmgenl_limited_gprintk(last, ...) { \
+  struct timeval tv; \
+  do_gettimeofday(&tv); \
+  if (tv.tv_sec != last) { \
+    printk(__VA_ARGS__); \
+    last = tv.tv_sec; \
+  } \
+}
+#else
+/* last should be static or global */
+#define bcmgenl_limited_gprintk(last, ...) { \
+  struct timespec64 ts; \
+  ktime_get_real_ts64(&ts); \
+  if (ts.tv_sec != last) { \
+    printk(__VA_ARGS__); \
+    last = ts.tv_sec; \
+  } \
+}
+
+#endif /* KERNEL_VERSION(3,17,0) */
+#endif /* BCMGENL_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl_packet.c b/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl_packet.c
new file mode 100644
index 000000000..5290d9f4e
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl_packet.c
@@ -0,0 +1,817 @@
+/*! \file bcmgenl_packet.c
+ *
+ * BCMGENL packet callback module.
+ *
+ */
+/*
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ */
+
+#include <lkm/lkm.h>
+#include <lkm/ngknet_kapi.h>
+#include <ngknet_linux.h>
+
+#include <linux/if_vlan.h>
+#include <linux/namei.h>
+#include <linux/netdevice.h>
+#include <linux/skbuff.h>
+#include <linux/sched.h>
+
+/*! \cond */
+MODULE_AUTHOR("Broadcom Corporation");
+MODULE_DESCRIPTION("BCMGENL Module");
+MODULE_LICENSE("GPL");
+/*! \endcond */
+
+#include <bcmgenl.h>
+#include <bcmgenl_packet.h>
+#include <net/genl-packet.h>
+
+#define BCMGENL_PACKET_NAME GENL_PACKET_NAME
+
+/* set BCMGENL_PACKET_CB_DBG for debug info */
+#define BCMGENL_PACKET_CB_DBG
+#ifdef BCMGENL_PACKET_CB_DBG
+static int debug;
+
+#define DBG_LVL_VERB    0x1
+#define DBG_LVL_PDMP    0x2
+#define BCMGENL_PACKET_DBG_VERB(...) \
+    if (debug & DBG_LVL_VERB) {      \
+        printk(__VA_ARGS__);         \
+    }
+#else
+#define BCMGENL_PACKET_DBG_VERB(...)
+#endif
+
+#define BCMGENL_PACKET_QLEN_DFLT 1024
+static int bcmgenl_packet_qlen = BCMGENL_PACKET_QLEN_DFLT;
+MODULE_PARAM(bcmgenl_packet_qlen, int, 0);
+MODULE_PARM_DESC(bcmgenl_packet_qlen, "generic cb queue length (default 1024 buffers)");
+
+#define FCS_SZ 4
+
+static bcmgenl_info_t g_bcmgenl_packet_info = {{0}};
+
+/* Maintain sampled pkt statistics */
+typedef struct bcmgenl_packet_stats_s {
+    unsigned long pkts_f_packet_cb;
+    unsigned long pkts_f_packet_mod;
+    unsigned long pkts_f_handled;
+    unsigned long pkts_f_tag_checked;
+    unsigned long pkts_f_tag_stripped;
+    unsigned long pkts_f_dst_mc;
+    unsigned long pkts_f_src_cpu;
+    unsigned long pkts_f_dst_cpu;
+    unsigned long pkts_c_qlen_cur;
+    unsigned long pkts_c_qlen_hi;
+    unsigned long pkts_d_qlen_max;
+    unsigned long pkts_d_no_mem;
+    unsigned long pkts_d_not_ready;
+    unsigned long pkts_d_metadata;
+    unsigned long pkts_d_skb;
+    unsigned long pkts_d_skb_cbd;
+    unsigned long pkts_d_meta_srcport;
+    unsigned long pkts_d_meta_dstport;
+    unsigned long pkts_d_invalid_size;
+} bcmgenl_packet_stats_t;
+static bcmgenl_packet_stats_t g_bcmgenl_packet_stats = {0};
+
+typedef struct genl_packet_meta_s {
+    int in_ifindex;
+    int out_ifindex;
+    unsigned int context;
+} genl_packet_meta_t;
+
+typedef struct genl_pkt_s {
+    struct list_head list;
+    struct net *netns;
+    genl_packet_meta_t meta;
+    struct sk_buff *skb;
+} genl_pkt_t;
+
+typedef struct bcmgenl_packet_work_s {
+    struct list_head pkt_list;
+    struct work_struct wq;
+    spinlock_t lock;
+} bcmgenl_packet_work_t;
+static bcmgenl_packet_work_t g_bcmgenl_packet_work = {{0}};
+
+/* driver proc entry root */
+static struct proc_dir_entry *bcmgenl_packet_proc_root = NULL;
+
+static bcmgenl_netif_t *
+bcmgenl_packet_netif_lookup_by_ifindex(int ifindex)  __attribute__ ((unused));
+static bcmgenl_netif_t *
+bcmgenl_packet_netif_lookup_by_ifindex(int ifindex)
+{
+    struct list_head *list;
+    bcmgenl_netif_t *bcmgenl_netif = NULL;
+    unsigned long flags;
+
+    /* look for ifindex from list of available net_devices */
+    spin_lock_irqsave(&g_bcmgenl_packet_info.lock, flags);
+    list_for_each(list, &g_bcmgenl_packet_info.netif_list) {
+        bcmgenl_netif = (bcmgenl_netif_t*)list;
+        if (bcmgenl_netif->dev->ifindex == ifindex) {
+            spin_unlock_irqrestore(&g_bcmgenl_packet_info.lock, flags);
+            return bcmgenl_netif;
+        }
+    }
+    spin_unlock_irqrestore(&g_bcmgenl_packet_info.lock, flags);
+    return (NULL);
+}
+
+static bcmgenl_netif_t *
+bcmgenl_packet_netif_lookup_by_port(int port)
+{
+    struct list_head *list;
+    bcmgenl_netif_t *bcmgenl_netif = NULL;
+    unsigned long flags;
+
+    /* look for port from list of available net_devices */
+    spin_lock_irqsave(&g_bcmgenl_packet_info.lock, flags);
+    list_for_each(list, &g_bcmgenl_packet_info.netif_list) {
+        bcmgenl_netif = (bcmgenl_netif_t*)list;
+        if (bcmgenl_netif->port == port) {
+            spin_unlock_irqrestore(&g_bcmgenl_packet_info.lock, flags);
+            return bcmgenl_netif;
+        }
+    }
+    spin_unlock_irqrestore(&g_bcmgenl_packet_info.lock, flags);
+    return (NULL);
+}
+
+static int
+bcmgenl_packet_generic_meta_get(bcmgenl_pkt_t *bcmgenl_pkt, genl_packet_meta_t *genl_packet_meta)
+{
+    int srcport, dstport, dstport_type;
+    int src_ifindex = 0, dst_ifindex = 0;
+    bcmgenl_netif_t *bcmgenl_netif = NULL;
+
+    if (!bcmgenl_pkt || !genl_packet_meta) {
+        printk("%s: bcmgenl_pkt or genl_packet_meta is NULL\n", __func__);
+        return (-1);
+    }
+
+    /* get src and dst ports */
+    srcport = bcmgenl_pkt->meta.src_port;
+    dstport = bcmgenl_pkt->meta.dst_port;
+    dstport_type = bcmgenl_pkt->meta.dst_port_type;
+    /* SDKLT-43751: Skip check of dstport on TD4/TH4 */
+    if (srcport == -1) {
+        printk("%s: invalid srcport %d\n", __func__, srcport);
+        return (-1);
+    }
+
+    /* find src port netif (no need to lookup CPU port) */
+    if (srcport != 0) {
+        if ((bcmgenl_netif = bcmgenl_packet_netif_lookup_by_port(srcport))) {
+            src_ifindex = bcmgenl_netif->dev->ifindex;
+        } else {
+            src_ifindex = -1;
+            g_bcmgenl_packet_stats.pkts_d_meta_srcport++;
+            BCMGENL_PACKET_DBG_VERB("%s: could not find srcport(%d)\n", __func__, srcport);
+        }
+    } else {
+        g_bcmgenl_packet_stats.pkts_f_src_cpu++;
+    }
+
+    /* set generic dst type for MC pkts */
+    if (dstport_type == DSTPORT_TYPE_MC) {
+        g_bcmgenl_packet_stats.pkts_f_dst_mc++;
+    } else if (dstport != 0) {
+        /* find dst port netif for UC pkts (no need to lookup CPU port) */
+        if ((bcmgenl_netif = bcmgenl_packet_netif_lookup_by_port(dstport))) {
+            dst_ifindex = bcmgenl_netif->dev->ifindex;
+        } else {
+            dst_ifindex = -1;
+            g_bcmgenl_packet_stats.pkts_d_meta_dstport++;
+            BCMGENL_PACKET_DBG_VERB("%s: could not find dstport(%d)\n", __func__, dstport);
+        }
+    } else if (dstport == 0) {
+        g_bcmgenl_packet_stats.pkts_f_dst_cpu++;
+    }
+
+    BCMGENL_PACKET_DBG_VERB
+        ("%s: srcport %d, dstport %d, src_ifindex %d, dst_ifindex %d\n",
+         __func__, srcport, dstport, src_ifindex, dst_ifindex);
+
+    memset(genl_packet_meta, 0, sizeof(genl_packet_meta_t));
+    genl_packet_meta->in_ifindex = src_ifindex;
+    genl_packet_meta->out_ifindex = dst_ifindex;
+    return (0);
+}
+
+static struct sk_buff *
+bcmgenl_packet_filter_cb(struct sk_buff *skb, ngknet_filter_t **filt)
+{
+    int rv = 0, dev_no, pkt_len;
+    const struct ngknet_callback_desc *cbd = NULL;
+    ngknet_filter_t *match_filt = NULL;
+    uint8_t *pkt_ptr = NULL;
+    unsigned long flags;
+    bcmgenl_pkt_t bcmgenl_pkt;
+    genl_pkt_t *generic_pkt;
+    bool strip_tag = false;
+    struct sk_buff *skb_generic_pkt;
+    static uint32_t last_drop, last_alloc, last_skb;
+
+    if (!skb) {
+        printk("%s: skb is NULL\n", __func__);
+        g_bcmgenl_packet_stats.pkts_d_skb++;
+        return (NULL);
+    }
+    cbd = NGKNET_SKB_CB(skb);
+    match_filt = cbd->filt;
+    /* SDKLT-43751: Get ptr offset to pkt payload to send to genetlink */
+    pkt_ptr = cbd->pmd + cbd->pmd_len;
+    pkt_len = skb->len - cbd->pmd_len;
+
+    if (!cbd || !match_filt) {
+        printk("%s: cbd(0x%p) or match_filt(0x%p) is NULL\n",
+            __func__, cbd, match_filt);
+        g_bcmgenl_packet_stats.pkts_d_skb_cbd++;
+        return (skb);
+    }
+
+    /* check if this packet is from the same filter */
+    if (!match_filt ||
+        (match_filt->dest_type != NGKNET_FILTER_DEST_T_CB) ||
+        (strncmp(match_filt->desc, BCMGENL_PACKET_NAME, NGKNET_FILTER_DESC_MAX) != 0)) {
+        return (skb);
+    }
+    dev_no = cbd->dinfo->dev_no;
+
+    BCMGENL_PACKET_DBG_VERB
+        ("pkt size %d, match_filt->dest_id %d\n",
+         cbd->pkt_len, match_filt->dest_id);
+    BCMGENL_PACKET_DBG_VERB
+        ("filter user data: 0x%08x\n", *(uint32_t *)match_filt->user_data);
+    BCMGENL_PACKET_DBG_VERB
+        ("filter_cb for dev %d: %s\n", dev_no, cbd->dinfo->type_str);
+    g_bcmgenl_packet_stats.pkts_f_packet_cb++;
+
+    /* Adjust original pkt_len to remove 4B FCS */
+    if (pkt_len < FCS_SZ) {
+        g_bcmgenl_packet_stats.pkts_d_invalid_size++;
+        goto FILTER_CB_PKT_HANDLED;
+    } else {
+        pkt_len -= FCS_SZ;
+    }
+
+    if (g_bcmgenl_packet_stats.pkts_c_qlen_cur >= bcmgenl_packet_qlen) {
+        g_bcmgenl_packet_stats.pkts_d_qlen_max++;
+        last_drop = 0;
+        bcmgenl_limited_gprintk
+            (last_drop, "%s: tail drop due to max qlen %d reached: %lu\n",
+             __func__, bcmgenl_packet_qlen,
+             g_bcmgenl_packet_stats.pkts_d_qlen_max);
+        goto FILTER_CB_PKT_HANDLED;
+    }
+
+    if ((generic_pkt = kmalloc(sizeof(genl_pkt_t), GFP_ATOMIC)) == NULL) {
+        g_bcmgenl_packet_stats.pkts_d_no_mem++;
+        last_alloc = 0;
+        bcmgenl_limited_gprintk
+            (last_alloc, "%s: failed to alloc generic mem for pkt: %lu\n",
+             __func__, g_bcmgenl_packet_stats.pkts_d_no_mem);
+        goto FILTER_CB_PKT_HANDLED;
+    }
+    /* get packet metadata */
+    rv = bcmgenl_pkt_package(dev_no, skb,
+                             &g_bcmgenl_packet_info,
+                             &bcmgenl_pkt);
+    if (rv < 0) {
+        printk("%s: Could not parse pkt metadata\n", __func__);
+        g_bcmgenl_packet_stats.pkts_d_metadata++;
+        goto FILTER_CB_PKT_HANDLED;
+    }
+
+    BCMGENL_PACKET_DBG_VERB
+        ("%s: netns 0x%p, src_port %d, dst_port %d, dst_port_type %x\n",
+         __func__,
+         bcmgenl_pkt.netns,
+         bcmgenl_pkt.meta.src_port,
+         bcmgenl_pkt.meta.dst_port,
+         bcmgenl_pkt.meta.dst_port_type);
+
+    /* generic_pkt start */
+    generic_pkt->netns = bcmgenl_pkt.netns;
+
+    /* get generic_pkt generic metadata */
+    rv = bcmgenl_packet_generic_meta_get(&bcmgenl_pkt, &generic_pkt->meta);
+    if (rv < 0) {
+        printk("%s: Could not parse pkt metadata\n", __func__);
+        g_bcmgenl_packet_stats.pkts_d_metadata++;
+        goto FILTER_CB_PKT_HANDLED;
+    }
+    generic_pkt->meta.context = *(uint32_t *)cbd->filt->user_data;
+
+    if (pkt_len >= 16) {
+        uint16_t proto = bcmgenl_pkt.meta.proto;
+        uint16_t vlan = bcmgenl_pkt.meta.vlan;
+        strip_tag = (vlan == 0xFFF) &&
+                    ((proto == 0x8100) || (proto == 0x88a8) ||
+                     (proto == 0x9100));
+        if (strip_tag) {
+            pkt_len -= 4;
+        }
+         g_bcmgenl_packet_stats.pkts_f_tag_checked++;
+    }
+
+    if ((skb_generic_pkt = dev_alloc_skb(pkt_len)) == NULL)
+    {
+        g_bcmgenl_packet_stats.pkts_d_no_mem++;
+        last_skb = 0;
+        bcmgenl_limited_gprintk
+            (last_skb, "%s: failed to alloc generic mem for pkt skb: %lu\n",
+             __func__, g_bcmgenl_packet_stats.pkts_d_no_mem);
+        goto FILTER_CB_PKT_HANDLED;
+    }
+
+    /* SDKLT-43751: Use ptr offset to pkt payload to send to genetlink */
+    /* setup skb by copying packet content */
+    if (strip_tag) {
+        memcpy(skb_generic_pkt->data, pkt_ptr, 12);
+        memcpy(skb_generic_pkt->data + 12, pkt_ptr + 16, pkt_len - 12);
+        g_bcmgenl_packet_stats.pkts_f_tag_stripped++;
+    } else {
+        memcpy(skb_generic_pkt->data, pkt_ptr, pkt_len);
+    }
+    skb_put(skb_generic_pkt, pkt_len);
+    skb_generic_pkt->len = pkt_len;
+    generic_pkt->skb = skb_generic_pkt;
+    /* generic_pkt end */
+
+    spin_lock_irqsave(&g_bcmgenl_packet_work.lock, flags);
+    list_add_tail(&generic_pkt->list, &g_bcmgenl_packet_work.pkt_list);
+
+    g_bcmgenl_packet_stats.pkts_c_qlen_cur++;
+    if (g_bcmgenl_packet_stats.pkts_c_qlen_cur >
+        g_bcmgenl_packet_stats.pkts_c_qlen_hi) {
+        g_bcmgenl_packet_stats.pkts_c_qlen_hi =
+            g_bcmgenl_packet_stats.pkts_c_qlen_cur;
+    }
+
+    schedule_work(&g_bcmgenl_packet_work.wq);
+    spin_unlock_irqrestore(&g_bcmgenl_packet_work.lock, flags);
+
+    /*
+     * expected rv values:
+     * -ve for error
+     * 0 for passthrough
+     * 1 for packet handled
+     *
+     */
+
+    /* Set rv to packet handled */
+    rv = 1;
+
+FILTER_CB_PKT_HANDLED:
+    g_bcmgenl_packet_stats.pkts_f_handled++;
+    return skb;
+}
+
+static void
+bcmgenl_packet_task(struct work_struct *work)
+{
+    bcmgenl_packet_work_t *packet_work =
+        container_of(work, bcmgenl_packet_work_t, wq);
+    unsigned long flags;
+    struct list_head *list_ptr, *list_next;
+    genl_pkt_t *pkt;
+
+    spin_lock_irqsave(&packet_work->lock, flags);
+    list_for_each_safe(list_ptr, list_next, &packet_work->pkt_list) {
+        /* dequeue pkt from list */
+        pkt = list_entry(list_ptr, genl_pkt_t, list);
+        list_del(list_ptr);
+        g_bcmgenl_packet_stats.pkts_c_qlen_cur--;
+        spin_unlock_irqrestore(&packet_work->lock, flags);
+
+        /* send generic_pkt to generic netlink */
+        if (pkt) {
+            BCMGENL_PACKET_DBG_VERB
+                ("%s: netns 0x%p, in_ifindex %d, out_ifindex %d, context 0x%08x\n",
+                 __func__,
+                 pkt->netns,
+                 pkt->meta.in_ifindex,
+                 pkt->meta.out_ifindex,
+                 pkt->meta.context);
+            genl_packet_send_packet(pkt->netns,
+                                    pkt->skb,
+                                    pkt->meta.in_ifindex,
+                                    pkt->meta.out_ifindex,
+                                    pkt->meta.context);
+            g_bcmgenl_packet_stats.pkts_f_packet_mod++;
+
+            dev_kfree_skb_any(pkt->skb);
+            kfree(pkt);
+        }
+        spin_lock_irqsave(&packet_work->lock, flags);
+    }
+    spin_unlock_irqrestore(&packet_work->lock, flags);
+}
+
+static int
+bcmgenl_packet_netif_create_cb(ngknet_dev_info_t *dinfo, ngknet_netif_t *netif)
+{
+    bool found;
+    struct list_head *list;
+    bcmgenl_netif_t *new_netif, *lbcmgenl_netif;
+    unsigned long flags;
+
+    if (!dinfo) {
+        printk("%s: dinfo is NULL\n", __func__);
+        return (-1);
+    }
+    if (netif->id == 0) {
+        printk("%s: netif->id == 0 is not a valid interface ID\n", __func__);
+        return (-1);
+    }
+    if ((new_netif = kmalloc(sizeof(bcmgenl_netif_t), GFP_ATOMIC)) == NULL) {
+        printk("%s: failed to alloc psample mem for netif '%s'\n",
+               __func__, netif->name);
+        return (-1);
+    }
+
+    spin_lock_irqsave(&g_bcmgenl_packet_info.lock, flags);
+    
+    new_netif->dev = dinfo->vdev[netif->id];
+    new_netif->id = netif->id;
+    new_netif->vlan = netif->vlan;
+    new_netif->port = netif->port;
+    /* insert netif sorted by ID similar to ngknet_netif_create() */
+    found = false;
+    list_for_each(list, &g_bcmgenl_packet_info.netif_list) {
+        lbcmgenl_netif = (bcmgenl_netif_t *)list;
+        if (netif->id < lbcmgenl_netif->id) {
+            found = true;
+            g_bcmgenl_packet_info.netif_count++;
+            break;
+        }
+    }
+
+    if (found) {
+        /* Replace previously removed interface */
+        list_add_tail(&new_netif->list, &lbcmgenl_netif->list);
+    } else {
+        /* No holes - add to end of list */
+        list_add_tail(&new_netif->list, &g_bcmgenl_packet_info.netif_list);
+    }
+
+    spin_unlock_irqrestore(&g_bcmgenl_packet_info.lock, flags);
+
+    BCMGENL_PACKET_DBG_VERB("%s: added netlink packet netif '%s'\n", __func__, netif->name);
+    return (0);
+}
+
+static int
+bcmgenl_packet_netif_destroy_cb(ngknet_dev_info_t *dinfo, ngknet_netif_t *netif)
+{
+    bool found = false;
+    struct list_head *list;
+    bcmgenl_netif_t *lbcmgenl_netif;
+    unsigned long flags;
+
+    if (!dinfo || !netif) {
+        printk("%s: dinfo or netif is NULL\n", __func__);
+        return (-1);
+    }
+
+    spin_lock_irqsave(&g_bcmgenl_packet_info.lock, flags);
+
+    list_for_each(list, &g_bcmgenl_packet_info.netif_list) {
+        lbcmgenl_netif = (bcmgenl_netif_t *)list;
+        if (netif->id == lbcmgenl_netif->id) {
+            found = true;
+            list_del(&lbcmgenl_netif->list);
+            BCMGENL_PACKET_DBG_VERB("%s: removing psample netif '%s'\n", __func__, netif->name);
+            kfree(lbcmgenl_netif);
+            g_bcmgenl_packet_info.netif_count--;
+            break;
+        }
+    }
+
+    spin_unlock_irqrestore(&g_bcmgenl_packet_info.lock, flags);
+
+    if (!found) {
+        printk("%s: netif ID %d not found!\n", __func__, netif->id);
+        return (-1);
+    }
+    return (0);
+}
+
+/*
+ * map Proc Read Entry
+ */
+static int
+bcmgenl_packet_proc_map_show(struct seq_file *m, void *v)
+{
+    struct list_head *list;
+    bcmgenl_netif_t *bcmgenl_netif;
+    unsigned long flags;
+
+    seq_printf(m, "  Interface      logical port   ifindex\n");
+    seq_printf(m, "-------------    ------------   -------\n");
+    spin_lock_irqsave(&g_bcmgenl_packet_info.lock, flags);
+
+    list_for_each(list, &g_bcmgenl_packet_info.netif_list) {
+        bcmgenl_netif = (bcmgenl_netif_t*)list;
+        seq_printf(m, "  %-14s %-14d %d\n",
+                bcmgenl_netif->dev->name,
+                bcmgenl_netif->port,
+                bcmgenl_netif->dev->ifindex);
+    }
+
+    spin_unlock_irqrestore(&g_bcmgenl_packet_info.lock, flags);
+    return 0;
+}
+
+static int
+bcmgenl_packet_proc_map_open(struct inode * inode, struct file * file)
+{
+    return single_open(file, bcmgenl_packet_proc_map_show, NULL);
+}
+
+static struct proc_ops bcmgenl_packet_proc_map_file_ops = {
+    PROC_OWNER(THIS_MODULE)
+    .proc_open =        bcmgenl_packet_proc_map_open,
+    .proc_read =        seq_read,
+    .proc_write =       NULL,
+    .proc_lseek =       seq_lseek,
+    .proc_release =     single_release,
+};
+
+static int
+bcmgenl_packet_proc_stats_show(struct seq_file *m, void *v)
+{
+    seq_printf(m, "BCM KNET %s Callback Stats\n", BCMGENL_PACKET_NAME);
+    seq_printf(m, "  DCB type %d\n",                          g_bcmgenl_packet_info.hw.dcb_type);
+    seq_printf(m, "  pkts filter generic cb         %10lu\n", g_bcmgenl_packet_stats.pkts_f_packet_cb);
+    seq_printf(m, "  pkts sent to generic module    %10lu\n", g_bcmgenl_packet_stats.pkts_f_packet_mod);
+    seq_printf(m, "  pkts handled by generic cb     %10lu\n", g_bcmgenl_packet_stats.pkts_f_handled);
+    seq_printf(m, "  pkts with vlan tag checked     %10lu\n", g_bcmgenl_packet_stats.pkts_f_tag_checked);
+    seq_printf(m, "  pkts with vlan tag stripped    %10lu\n", g_bcmgenl_packet_stats.pkts_f_tag_stripped);
+    seq_printf(m, "  pkts with mc destination       %10lu\n", g_bcmgenl_packet_stats.pkts_f_dst_mc);
+    seq_printf(m, "  pkts with cpu source           %10lu\n", g_bcmgenl_packet_stats.pkts_f_src_cpu);
+    seq_printf(m, "  pkts with cpu destination      %10lu\n", g_bcmgenl_packet_stats.pkts_f_dst_cpu);
+    seq_printf(m, "  pkts current queue length      %10lu\n", g_bcmgenl_packet_stats.pkts_c_qlen_cur);
+    seq_printf(m, "  pkts high queue length         %10lu\n", g_bcmgenl_packet_stats.pkts_c_qlen_hi);
+    seq_printf(m, "  pkts drop max queue length     %10lu\n", g_bcmgenl_packet_stats.pkts_d_qlen_max);
+    seq_printf(m, "  pkts drop no memory            %10lu\n", g_bcmgenl_packet_stats.pkts_d_no_mem);
+    seq_printf(m, "  pkts drop generic not ready    %10lu\n", g_bcmgenl_packet_stats.pkts_d_not_ready);
+    seq_printf(m, "  pkts drop metadata parse error %10lu\n", g_bcmgenl_packet_stats.pkts_d_metadata);
+    seq_printf(m, "  pkts drop skb error            %10lu\n", g_bcmgenl_packet_stats.pkts_d_skb);
+    seq_printf(m, "  pkts drop skb cbd error        %10lu\n", g_bcmgenl_packet_stats.pkts_d_skb_cbd);
+    seq_printf(m, "  pkts with invalid src port     %10lu\n", g_bcmgenl_packet_stats.pkts_d_meta_srcport);
+    seq_printf(m, "  pkts with invalid dst port     %10lu\n", g_bcmgenl_packet_stats.pkts_d_meta_dstport);
+    seq_printf(m, "  pkts with invalid orig pkt sz  %10lu\n", g_bcmgenl_packet_stats.pkts_d_invalid_size);
+    return 0;
+}
+
+static int
+bcmgenl_packet_proc_stats_open(struct inode * inode, struct file * file)
+{
+    return single_open(file, bcmgenl_packet_proc_stats_show, NULL);
+}
+
+/*
+ * generic stats Proc Write Entry
+ *
+ *   Syntax:
+ *   write any value to clear stats
+ */
+static ssize_t
+bcmgenl_packet_proc_stats_write(
+    struct file *file, const char *buf,
+    size_t count, loff_t *loff)
+{
+    int qlen_cur = 0;
+    unsigned long flags;
+
+    spin_lock_irqsave(&g_bcmgenl_packet_work.lock, flags);
+    qlen_cur = g_bcmgenl_packet_stats.pkts_c_qlen_cur;
+    memset(&g_bcmgenl_packet_stats, 0, sizeof(bcmgenl_packet_stats_t));
+    g_bcmgenl_packet_stats.pkts_c_qlen_cur = qlen_cur;
+    spin_unlock_irqrestore(&g_bcmgenl_packet_work.lock, flags);
+
+    return count;
+}
+
+static struct proc_ops bcmgenl_packet_proc_stats_file_ops = {
+    PROC_OWNER(THIS_MODULE)
+    .proc_open =        bcmgenl_packet_proc_stats_open,
+    .proc_read =        seq_read,
+    .proc_write =       bcmgenl_packet_proc_stats_write,
+    .proc_lseek =       seq_lseek,
+    .proc_release =     single_release,
+};
+
+/*
+ * generic debug Proc Read Entry
+ */
+static int
+bcmgenl_packet_proc_debug_show(struct seq_file *m, void *v)
+{
+    seq_printf(m, "BCM KNET %s Callback Config\n", BCMGENL_PACKET_NAME);
+    seq_printf(m, "  debug:           0x%x\n", debug);
+    seq_printf(m, "  cmic_type:       %d\n",   g_bcmgenl_packet_info.hw.cmic_type);
+    seq_printf(m, "  dcb_type:        %d\n",   g_bcmgenl_packet_info.hw.dcb_type);
+    seq_printf(m, "  dcb_size:        %d\n",   g_bcmgenl_packet_info.hw.dcb_size);
+    seq_printf(m, "  pkt_hdr_size:    %d\n",   g_bcmgenl_packet_info.hw.pkt_hdr_size);
+    seq_printf(m, "  cdma_channels:   %d\n",   g_bcmgenl_packet_info.hw.cdma_channels);
+    seq_printf(m, "  netif_count:     %d\n",   g_bcmgenl_packet_info.netif_count);
+    seq_printf(m, "  queue length:    %d\n",   bcmgenl_packet_qlen);
+
+    return 0;
+}
+
+static int
+bcmgenl_packet_proc_debug_open(struct inode * inode, struct file * file)
+{
+    return single_open(file, bcmgenl_packet_proc_debug_show, NULL);
+}
+
+/*
+ * generic debug Proc Write Entry
+ *
+ *   Syntax:
+ *   debug=<mask>
+ *
+ *   Where <mask> corresponds to the debug module parameter.
+ *
+ *   Examples:
+ *   debug=0x1
+ */
+static ssize_t
+bcmgenl_packet_proc_debug_write(
+    struct file *file, const char *buf,
+    size_t count, loff_t *loff)
+{
+    char debug_str[40];
+    char *ptr;
+
+    if (count > sizeof(debug_str)) {
+        count = sizeof(debug_str) - 1;
+        debug_str[count] = '\0';
+    }
+    if (copy_from_user(debug_str, buf, count)) {
+        return -EFAULT;
+    }
+
+    if ((ptr = strstr(debug_str, "debug=")) != NULL) {
+        ptr += 6;
+        debug = simple_strtol(ptr, NULL, 0);
+    } else {
+        printk("Warning: unknown configuration setting\n");
+    }
+
+    return count;
+}
+
+static struct proc_ops bcmgenl_packet_proc_debug_file_ops = {
+    PROC_OWNER(THIS_MODULE)
+    .proc_open =        bcmgenl_packet_proc_debug_open,
+    .proc_read =        seq_read,
+    .proc_write =       bcmgenl_packet_proc_debug_write,
+    .proc_lseek =       seq_lseek,
+    .proc_release =     single_release,
+};
+
+static int
+genl_cb_proc_cleanup(void)
+{
+    remove_proc_entry("stats", bcmgenl_packet_proc_root);
+    remove_proc_entry("debug", bcmgenl_packet_proc_root);
+    remove_proc_entry("map"  , bcmgenl_packet_proc_root);
+
+    proc_remove(bcmgenl_packet_proc_root);
+    return 0;
+}
+
+static int
+genl_cb_proc_init(void)
+{
+    char packet_procfs_path[PROCFS_MAX_PATH];
+    struct proc_dir_entry *entry;
+
+    /* create procfs for generic */
+    snprintf(packet_procfs_path, PROCFS_MAX_PATH, "%s/%s",
+             BCMGENL_PROCFS_PATH, BCMGENL_PACKET_NAME);
+    bcmgenl_packet_proc_root = proc_mkdir(packet_procfs_path, NULL);
+
+    /* create procfs for generic stats */
+    PROC_CREATE(entry, "stats", 0666, bcmgenl_packet_proc_root,
+                &bcmgenl_packet_proc_stats_file_ops);
+    if (entry == NULL) {
+        printk("%s: Unable to create procfs entry '/procfs/%s/stats'\n",
+               __func__, packet_procfs_path);
+        return -1;
+    }
+
+    /* create procfs for getting netdev mapping */
+    PROC_CREATE(entry, "map", 0666, bcmgenl_packet_proc_root,
+                &bcmgenl_packet_proc_map_file_ops);
+    if (entry == NULL) {
+        printk("%s: Unable to create procfs entry '/procfs/%s/map'\n",
+               __func__, packet_procfs_path);
+        return -1;
+    }
+
+    /* create procfs for debug log */
+    PROC_CREATE(entry, "debug", 0666, bcmgenl_packet_proc_root,
+                &bcmgenl_packet_proc_debug_file_ops);
+    if (entry == NULL) {
+        printk("%s: Unable to create procfs entry '/procfs/%s/debug'\n",
+               __func__, packet_procfs_path);
+        return -1;
+    }
+    return 0;
+}
+
+static int
+genl_cb_cleanup(void)
+{
+    genl_pkt_t *pkt;
+
+    cancel_work_sync(&g_bcmgenl_packet_work.wq);
+
+    while (!list_empty(&g_bcmgenl_packet_work.pkt_list)) {
+        pkt = list_entry(g_bcmgenl_packet_work.pkt_list.next,
+                         genl_pkt_t, list);
+        list_del(&pkt->list);
+        dev_kfree_skb_any(pkt->skb);
+        kfree(pkt);
+    }
+
+    return 0;
+}
+
+static int
+genl_cb_init(void)
+{
+    /* clear data structs */
+    memset(&g_bcmgenl_packet_stats, 0, sizeof(bcmgenl_packet_stats_t));
+    memset(&g_bcmgenl_packet_info, 0, sizeof(bcmgenl_info_t));
+    memset(&g_bcmgenl_packet_work, 0, sizeof(bcmgenl_packet_work_t));
+
+    /* setup bcmgenl_packet_info struct */
+    INIT_LIST_HEAD(&g_bcmgenl_packet_info.netif_list);
+    spin_lock_init(&g_bcmgenl_packet_info.lock);
+
+    /* setup generic work queue */
+    spin_lock_init(&g_bcmgenl_packet_work.lock);
+    INIT_LIST_HEAD(&g_bcmgenl_packet_work.pkt_list);
+    INIT_WORK(&g_bcmgenl_packet_work.wq, bcmgenl_packet_task);
+
+    /* get net namespace */
+    g_bcmgenl_packet_info.netns = get_net_ns_by_pid(current->pid);
+    if (!g_bcmgenl_packet_info.netns) {
+        printk("%s: Could not get network namespace for pid %d\n",
+               __func__, current->pid);
+        return (-1);
+    }
+    BCMGENL_PACKET_DBG_VERB
+        ("%s: current->pid %d, netns 0x%p\n",
+         __func__, current->pid, g_bcmgenl_packet_info.netns);
+    return 0;
+}
+
+int bcmgenl_packet_cleanup(void)
+{
+    ngknet_netif_create_cb_unregister(bcmgenl_packet_netif_create_cb);
+    ngknet_netif_destroy_cb_unregister(bcmgenl_packet_netif_destroy_cb);
+    ngknet_filter_cb_unregister(bcmgenl_packet_filter_cb);
+    genl_cb_cleanup();
+    genl_cb_proc_cleanup();
+    return 0;
+}
+
+int bcmgenl_packet_init(void)
+{
+    ngknet_netif_create_cb_register(bcmgenl_packet_netif_create_cb);
+    ngknet_netif_destroy_cb_register(bcmgenl_packet_netif_destroy_cb);
+    ngknet_filter_cb_register_by_name
+        (bcmgenl_packet_filter_cb, BCMGENL_PACKET_NAME);
+
+    genl_cb_proc_init();
+    return genl_cb_init();
+}
+
+EXPORT_SYMBOL(bcmgenl_packet_cleanup);
+EXPORT_SYMBOL(bcmgenl_packet_init);
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl_packet.h b/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl_packet.h
new file mode 100644
index 000000000..3ef3fe87d
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl_packet.h
@@ -0,0 +1,29 @@
+/*! \file bcmgenl_packet.h
+ *
+ * BCMGENL packet module.
+ *
+ */
+/*
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ */
+
+#ifndef BCMGENL_PACKET_H
+#define BCMGENL_PACKET_H
+
+extern int bcmgenl_packet_init(void);
+extern int bcmgenl_packet_cleanup(void);
+
+#endif /* BCMGENL_PACKET_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl_psample.c b/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl_psample.c
new file mode 100644
index 000000000..27944af15
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl_psample.c
@@ -0,0 +1,1076 @@
+/*! \file bcmgenl_psample.c
+ *
+ * BCMGENL psample callback module.
+ *
+ */
+/*
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ */
+
+#include <lkm/lkm.h>
+#include <lkm/ngknet_kapi.h>
+#include <ngknet_linux.h>
+
+#include <linux/if_vlan.h>
+#include <linux/namei.h>
+#include <linux/netdevice.h>
+#include <linux/skbuff.h>
+#include <linux/sched.h>
+
+/*! \cond */
+MODULE_AUTHOR("Broadcom Corporation");
+MODULE_DESCRIPTION("BCMGENL Module");
+MODULE_LICENSE("GPL");
+/*! \endcond */
+
+#include <bcmgenl.h>
+#include <bcmgenl_psample.h>
+
+#if BCMGENL_PSAMPLE_SUPPORT
+#include <net/psample.h>
+#define BCMGENL_PSAMPLE_NAME PSAMPLE_GENL_NAME
+
+/* set BCMGENL_PSAMPLE_CB_DBG for debug info */
+#define BCMGENL_PSAMPLE_CB_DBG
+#ifdef BCMGENL_PSAMPLE_CB_DBG
+static int debug;
+
+#define DBG_LVL_VERB    0x1
+#define DBG_LVL_PDMP    0x2
+#define BCMGENL_PSAMPLE_DBG_VERB(...) \
+    if (debug & DBG_LVL_VERB) {       \
+        printk(__VA_ARGS__);          \
+    }
+#else
+#define BCMGENL_PSAMPLE_DBG_VERB(...)
+#endif
+
+
+
+#define FCS_SZ 4
+
+#define PSAMPLE_NLA_PADDING 4
+#define PSAMPLE_PKT_HANDLED (1)
+
+#define PSAMPLE_RATE_DFLT 1
+#define PSAMPLE_SIZE_DFLT 128
+static int psample_size = PSAMPLE_SIZE_DFLT;
+MODULE_PARAM(psample_size, int, 0);
+MODULE_PARM_DESC(psample_size,
+"psample pkt size (default 128 bytes)");
+
+#define BCMGENL_PSAMPLE_QLEN_DFLT 1024
+static int bcmgenl_psample_qlen = BCMGENL_PSAMPLE_QLEN_DFLT;
+MODULE_PARAM(bcmgenl_psample_qlen, int, 0);
+MODULE_PARM_DESC(bcmgenl_psample_qlen, "psample queue length (default 1024 buffers)");
+
+static bcmgenl_info_t g_bcmgenl_psample_info = {{0}};
+
+/* Maintain sampled pkt statistics */
+typedef struct psample_stats_s {
+    unsigned long pkts_f_psample_cb;
+    unsigned long pkts_f_psample_mod;
+    unsigned long pkts_f_handled;
+    unsigned long pkts_f_pass_through;
+    unsigned long pkts_f_dst_mc;
+    unsigned long pkts_f_dst_cpu;
+    unsigned long pkts_c_qlen_cur;
+    unsigned long pkts_c_qlen_hi;
+    unsigned long pkts_d_qlen_max;
+    unsigned long pkts_d_no_mem;
+    unsigned long pkts_d_no_group;
+    unsigned long pkts_d_sampling_disabled;
+    unsigned long pkts_d_not_ready;
+    unsigned long pkts_d_metadata;
+    unsigned long pkts_d_skb;
+    unsigned long pkts_d_skb_cbd;
+    unsigned long pkts_d_meta_srcport;
+    unsigned long pkts_d_meta_dstport;
+    unsigned long pkts_d_invalid_size;
+} bcmgenl_psample_stats_t;
+static bcmgenl_psample_stats_t g_bcmgenl_psample_stats = {0};
+
+typedef struct psample_meta_s {
+    int trunc_size;
+    int src_ifindex;
+    int dst_ifindex;
+    int sample_rate;
+} psample_meta_t;
+
+typedef struct psample_pkt_s {
+    struct list_head list;
+    psample_meta_t meta;
+    struct sk_buff *skb;
+#if IS_ENABLED(CONFIG_PSAMPLE)
+    struct psample_group *group;
+#endif /* CONFIG_PSAMPLE */
+} psample_pkt_t;
+
+typedef struct bcmgenl_psample_work_s {
+    struct list_head pkt_list;
+    struct work_struct wq;
+    spinlock_t lock;
+} bcmgenl_psample_work_t;
+static bcmgenl_psample_work_t g_bcmgenl_psample_work = {{0}};
+
+/* driver proc entry root */
+static struct proc_dir_entry *psample_proc_root = NULL;
+
+static bcmgenl_netif_t *
+psample_netif_lookup_by_ifindex(int ifindex)  __attribute__ ((unused));
+static bcmgenl_netif_t *
+psample_netif_lookup_by_ifindex(int ifindex)
+{
+    struct list_head *list;
+    bcmgenl_netif_t *bcmgenl_netif = NULL;
+    unsigned long flags;
+
+    /* look for port from list of available net_devices */
+    spin_lock_irqsave(&g_bcmgenl_psample_info.lock, flags);
+    list_for_each(list, &g_bcmgenl_psample_info.netif_list) {
+        bcmgenl_netif = (bcmgenl_netif_t*)list;
+        if (bcmgenl_netif->dev->ifindex == ifindex) {
+            spin_unlock_irqrestore(&g_bcmgenl_psample_info.lock, flags);
+            return bcmgenl_netif;
+        }
+    }
+    spin_unlock_irqrestore(&g_bcmgenl_psample_info.lock, flags);
+    return (NULL);
+}
+
+static bcmgenl_netif_t *
+psample_netif_lookup_by_port(int port)
+{
+    struct list_head *list;
+    bcmgenl_netif_t *bcmgenl_netif = NULL;
+    unsigned long flags;
+
+    /* look for port from list of available net_devices */
+    spin_lock_irqsave(&g_bcmgenl_psample_info.lock, flags);
+    list_for_each(list, &g_bcmgenl_psample_info.netif_list) {
+        bcmgenl_netif = (bcmgenl_netif_t*)list;
+        if (bcmgenl_netif->port == port) {
+            spin_unlock_irqrestore(&g_bcmgenl_psample_info.lock, flags);
+            return bcmgenl_netif;
+        }
+    }
+    spin_unlock_irqrestore(&g_bcmgenl_psample_info.lock, flags);
+    return (NULL);
+}
+
+static int
+bcmgenl_psample_meta_get(struct sk_buff *skb, bcmgenl_pkt_t *bcmgenl_pkt, psample_meta_t *sflow_meta)
+{
+    int srcport, dstport, dstport_type;
+    int src_ifindex = 0, dst_ifindex = 0;
+    int sample_rate = 1;
+    int sample_size = PSAMPLE_SIZE_DFLT;
+    bcmgenl_netif_t *psample_netif = NULL;
+    const struct ngknet_callback_desc *cbd;
+
+    if (!skb || !sflow_meta) {
+        printk("%s: skb or sflow_meta is NULL\n", __func__);
+        return (-1);
+    }
+    cbd = NGKNET_SKB_CB(skb);
+    /* get src and dst ports */
+    srcport = bcmgenl_pkt->meta.src_port;
+    dstport = bcmgenl_pkt->meta.dst_port;
+    dstport_type = bcmgenl_pkt->meta.dst_port_type;
+    /* SDKLT-43751: Skip check of dstport on TD4/TH4 */
+    if (srcport == -1) {
+        printk("%s: invalid srcport %d\n", __func__, srcport);
+        return (-1);
+    }
+
+    /* find src port netif */
+    if ((psample_netif = psample_netif_lookup_by_port(srcport))) {
+        src_ifindex = psample_netif->dev->ifindex;
+        sample_rate = psample_netif->sample_rate;
+        sample_size = psample_netif->sample_size;
+    } else {
+        g_bcmgenl_psample_stats.pkts_d_meta_srcport++;
+        BCMGENL_PSAMPLE_DBG_VERB("%s: could not find psample netif for src dev %s (ifidx %d)\n",
+                                 __func__, cbd->net_dev->name, src_ifindex);
+    }
+
+    /* set generic dst type for MC pkts */
+    if (dstport_type == DSTPORT_TYPE_MC) {
+        g_bcmgenl_psample_stats.pkts_f_dst_mc++;
+    } else if (dstport != 0) {
+        /* find dst port netif for UC pkts (no need to lookup CPU port) */
+        if ((psample_netif = psample_netif_lookup_by_port(dstport))) {
+            dst_ifindex = psample_netif->dev->ifindex;
+        } else {
+            dst_ifindex = -1;
+            g_bcmgenl_psample_stats.pkts_d_meta_dstport++;
+            BCMGENL_PSAMPLE_DBG_VERB("%s: could not find dstport(%d)\n", __func__, dstport);
+        }
+    } else if (dstport == 0) {
+        g_bcmgenl_psample_stats.pkts_f_dst_cpu++;
+    }
+
+    BCMGENL_PSAMPLE_DBG_VERB
+        ("%s: srcport %d, dstport %d, src_ifindex %d, dst_ifindex %d\n",
+         __func__, srcport, dstport, src_ifindex, dst_ifindex);
+
+    memset(sflow_meta, 0, sizeof(psample_meta_t));
+    sflow_meta->src_ifindex = src_ifindex;
+    sflow_meta->dst_ifindex = dst_ifindex;
+    sflow_meta->trunc_size  = sample_size;
+    sflow_meta->sample_rate = sample_rate;
+    return (0);
+}
+
+static struct sk_buff *
+bcmgenl_psample_filter_cb(struct sk_buff *skb, ngknet_filter_t **filt)
+{
+    int rv = 0, dev_no, pkt_len;
+    const struct ngknet_callback_desc *cbd = NULL;
+    ngknet_filter_t *match_filt = NULL;
+    psample_meta_t meta;
+    uint8_t *pkt_ptr = NULL;
+    bcmgenl_pkt_t bcmgenl_pkt;
+    static uint32_t last_drop, last_alloc, last_skb;
+#if IS_ENABLED(CONFIG_PSAMPLE)
+    struct psample_group *group;
+#endif /* CONFIG_PSAMPLE */
+
+    if (!skb) {
+        printk("%s: skb is NULL\n", __func__);
+        g_bcmgenl_psample_stats.pkts_d_skb++;
+        return (NULL);
+    }
+    cbd = NGKNET_SKB_CB(skb);
+    match_filt = cbd->filt;
+    /* SDKLT-43751: Get ptr offset to pkt payload to send to genetlink */
+    pkt_ptr = cbd->pmd + cbd->pmd_len;
+    pkt_len = skb->len - cbd->pmd_len;
+
+    if (!cbd || !match_filt) {
+        printk("%s: cbd(0x%p) or match_filt(0x%p) is NULL\n",
+            __func__, cbd, match_filt);
+        g_bcmgenl_psample_stats.pkts_d_skb_cbd++;
+        return (skb);
+    }
+
+    /* check if this packet is sampled packet (from sample filter) */
+    if (!match_filt ||
+        (match_filt->dest_type != NGKNET_FILTER_DEST_T_CB) ||
+        (strncmp(match_filt->desc, BCMGENL_PSAMPLE_NAME, NGKNET_FILTER_DESC_MAX) != 0)) {
+        return (skb);
+    }
+    dev_no = cbd->dinfo->dev_no;
+
+    BCMGENL_PSAMPLE_DBG_VERB
+        ("pkt size %d, match_filt->dest_id %d\n", cbd->pkt_len, match_filt->dest_id);
+    BCMGENL_PSAMPLE_DBG_VERB
+        ("filter user data: 0x%08x\n", *(uint32_t *)match_filt->user_data);
+    BCMGENL_PSAMPLE_DBG_VERB
+        ("filter_cb for dev %d: %s\n", dev_no, cbd->dinfo->type_str);
+    g_bcmgenl_psample_stats.pkts_f_psample_cb++;
+
+#if IS_ENABLED(CONFIG_PSAMPLE)
+    /* get psample group info. psample genetlink group ID passed in match_filt->dest_id */
+    group = psample_group_get(g_bcmgenl_psample_info.netns, match_filt->dest_id);
+    if (!group) {
+        printk("%s: Could not find psample genetlink group %d\n", __func__, match_filt->dest_id);
+        g_bcmgenl_psample_stats.pkts_d_no_group++;
+        goto PSAMPLE_FILTER_CB_PKT_HANDLED;
+    }
+#endif /* CONFIG_PSAMPLE */
+    /* get packet metadata */
+    rv = bcmgenl_pkt_package(dev_no, skb,
+                             &g_bcmgenl_psample_info,
+                             &bcmgenl_pkt);
+    if (rv < 0) {
+        printk("%s: Could not parse pkt metadata\n", __func__);
+        g_bcmgenl_psample_stats.pkts_d_metadata++;
+        goto PSAMPLE_FILTER_CB_PKT_HANDLED;
+    }
+
+    BCMGENL_PSAMPLE_DBG_VERB
+        ("%s: netns 0x%p, src_port %d, dst_port %d, dst_port_type %x\n",
+         __func__,
+         bcmgenl_pkt.netns,
+         bcmgenl_pkt.meta.src_port,
+         bcmgenl_pkt.meta.dst_port,
+         bcmgenl_pkt.meta.dst_port_type);
+
+    /* get psample metadata */
+    rv = bcmgenl_psample_meta_get(skb, &bcmgenl_pkt, &meta);
+    if (rv < 0) {
+        printk("%s: Could not parse pkt metadata\n", __func__);
+        g_bcmgenl_psample_stats.pkts_d_metadata++;
+        goto PSAMPLE_FILTER_CB_PKT_HANDLED;
+    }
+
+    /* Adjust original pkt pkt_len to remove 4B FCS */
+    if (pkt_len < FCS_SZ) {
+        g_bcmgenl_psample_stats.pkts_d_invalid_size++;
+        goto PSAMPLE_FILTER_CB_PKT_HANDLED;
+    } else {
+       pkt_len -= FCS_SZ;
+    }
+
+    /* Account for padding in libnl used by psample */
+    if (meta.trunc_size >= pkt_len) {
+        meta.trunc_size = pkt_len - PSAMPLE_NLA_PADDING;
+    }
+    BCMGENL_PSAMPLE_DBG_VERB
+        ("%s: trunc_size %d, sample_rate %d "
+         "src_ifindex %d, dst_ifindex %d\n",
+         __func__, meta.trunc_size, meta.sample_rate,
+         meta.src_ifindex, meta.dst_ifindex);
+#if IS_ENABLED(CONFIG_PSAMPLE)
+    BCMGENL_PSAMPLE_DBG_VERB
+        ("%s: group 0x%x\n", __func__, group->group_num);
+#endif /* CONFIG_PSAMPLE */
+
+    /* drop if configured sample rate is 0 */
+    if (meta.sample_rate > 0) {
+        unsigned long flags;
+        psample_pkt_t *psample_pkt;
+        struct sk_buff *skb_psample;
+
+        if (g_bcmgenl_psample_stats.pkts_c_qlen_cur >= bcmgenl_psample_qlen) {
+            g_bcmgenl_psample_stats.pkts_d_qlen_max++;
+            last_drop = 0;
+            bcmgenl_limited_gprintk
+                (last_drop, "%s: tail drop due to max qlen %d reached: %lu\n",
+                 __func__, bcmgenl_psample_qlen,
+                 g_bcmgenl_psample_stats.pkts_d_qlen_max);
+            goto PSAMPLE_FILTER_CB_PKT_HANDLED;
+        }
+
+        if ((psample_pkt = kmalloc(sizeof(psample_pkt_t), GFP_ATOMIC)) == NULL) {
+            g_bcmgenl_psample_stats.pkts_d_no_mem++;
+            last_alloc = 0;
+            bcmgenl_limited_gprintk
+                (last_alloc, "%s: failed to alloc generic mem for pkt: %lu\n",
+                 __func__, g_bcmgenl_psample_stats.pkts_d_no_mem);
+            goto PSAMPLE_FILTER_CB_PKT_HANDLED;
+        }
+        memcpy(&psample_pkt->meta, &meta, sizeof(psample_meta_t));
+#if IS_ENABLED(CONFIG_PSAMPLE)
+        psample_pkt->group = group;
+#endif /* CONFIG_PSAMPLE */
+        if ((skb_psample = dev_alloc_skb(meta.trunc_size)) == NULL) {
+            g_bcmgenl_psample_stats.pkts_d_no_mem++;
+            last_skb = 0;
+            bcmgenl_limited_gprintk
+                (last_skb, "%s: failed to alloc generic mem for pkt skb: %lu\n",
+                 __func__, g_bcmgenl_psample_stats.pkts_d_no_mem);
+            goto PSAMPLE_FILTER_CB_PKT_HANDLED;
+        }
+
+        /* SDKLT-43751: Use ptr offset to pkt payload to send to genetlink */
+        /* setup skb to point to pkt */
+        memcpy(skb_psample->data, pkt_ptr, meta.trunc_size);
+        skb_put(skb_psample, meta.trunc_size);
+        skb_psample->len = pkt_len;
+        psample_pkt->skb = skb_psample;
+
+        spin_lock_irqsave(&g_bcmgenl_psample_work.lock, flags);
+        list_add_tail(&psample_pkt->list, &g_bcmgenl_psample_work.pkt_list);
+
+        g_bcmgenl_psample_stats.pkts_c_qlen_cur++;
+        if (g_bcmgenl_psample_stats.pkts_c_qlen_cur > g_bcmgenl_psample_stats.pkts_c_qlen_hi) {
+            g_bcmgenl_psample_stats.pkts_c_qlen_hi = g_bcmgenl_psample_stats.pkts_c_qlen_cur;
+        }
+
+        schedule_work(&g_bcmgenl_psample_work.wq);
+        spin_unlock_irqrestore(&g_bcmgenl_psample_work.lock, flags);
+    } else {
+        g_bcmgenl_psample_stats.pkts_d_sampling_disabled++;
+    }
+
+PSAMPLE_FILTER_CB_PKT_HANDLED:
+    g_bcmgenl_psample_stats.pkts_f_pass_through++;
+    return skb;
+}
+
+static void
+bcmgenl_psample_task(struct work_struct *work)
+{
+    bcmgenl_psample_work_t *psample_work = container_of(work, bcmgenl_psample_work_t, wq);
+    unsigned long flags;
+    struct list_head *list_ptr, *list_next;
+    psample_pkt_t *pkt;
+
+    spin_lock_irqsave(&psample_work->lock, flags);
+    list_for_each_safe(list_ptr, list_next, &psample_work->pkt_list) {
+        /* dequeue pkt from list */
+        pkt = list_entry(list_ptr, psample_pkt_t, list);
+        list_del(list_ptr);
+        g_bcmgenl_psample_stats.pkts_c_qlen_cur--;
+        spin_unlock_irqrestore(&psample_work->lock, flags);
+
+        /* send generic_pkt to generic netlink */
+        if (pkt) {
+#if ((IS_ENABLED(CONFIG_PSAMPLE) && LINUX_VERSION_CODE >= KERNEL_VERSION(5,13,0)) || \
+     (defined PSAMPLE_MD_EXTENDED_ATTR && PSAMPLE_MD_EXTENDED_ATTR))
+            struct psample_metadata md = {0};
+            md.trunc_size = pkt->meta.trunc_size;
+            md.in_ifindex = pkt->meta.src_ifindex;
+            md.out_ifindex = pkt->meta.dst_ifindex;
+#endif
+            BCMGENL_PSAMPLE_DBG_VERB
+                ("%s: trunc_size %d, sample_rate %d,"
+                 "src_ifindex %d, dst_ifindex %d group 0x%x\n",
+                 __func__, pkt->meta.trunc_size, pkt->meta.sample_rate,
+                 pkt->meta.src_ifindex, pkt->meta.dst_ifindex, pkt->group->group_num);
+#if ((IS_ENABLED(CONFIG_PSAMPLE) && LINUX_VERSION_CODE >= KERNEL_VERSION(5,13,0)) || \
+     (defined PSAMPLE_MD_EXTENDED_ATTR && PSAMPLE_MD_EXTENDED_ATTR))
+            psample_sample_packet(pkt->group, 
+                                  pkt->skb,
+                                  pkt->meta.sample_rate,
+                                  &md);
+#else
+            psample_sample_packet(pkt->group,
+                                  pkt->skb,
+                                  pkt->meta.trunc_size,
+                                  pkt->meta.src_ifindex,
+                                  pkt->meta.dst_ifindex,
+                                  pkt->meta.sample_rate);
+#endif /* CONFIG_PSAMPLE */
+            g_bcmgenl_psample_stats.pkts_f_psample_mod++;
+
+            dev_kfree_skb_any(pkt->skb);
+            kfree(pkt);
+        }
+        spin_lock_irqsave(&psample_work->lock, flags);
+    }
+    spin_unlock_irqrestore(&psample_work->lock, flags);
+}
+
+static int
+bcmgenl_psample_netif_create_cb(ngknet_dev_info_t *dinfo, ngknet_netif_t *netif)
+{
+    bool found;
+    struct list_head *list;
+    bcmgenl_netif_t *new_netif, *lbcmgenl_netif;
+    unsigned long flags;
+
+    if (!dinfo) {
+        printk("%s: dinfo is NULL\n", __func__);
+        return (-1);
+    }
+    if (netif->id == 0) {
+        printk("%s: netif->id == 0 is not a valid interface ID\n", __func__);
+        return (-1);
+    }
+    if ((new_netif = kmalloc(sizeof(bcmgenl_netif_t), GFP_ATOMIC)) == NULL) {
+        printk("%s: failed to alloc psample mem for netif '%s'\n",
+               __func__, netif->name);
+        return (-1);
+    }
+
+    spin_lock_irqsave(&g_bcmgenl_psample_info.lock, flags);
+    new_netif->dev = dinfo->vdev[netif->id];
+    new_netif->id = netif->id;
+    new_netif->port = netif->port;
+    new_netif->vlan = netif->vlan;
+    new_netif->sample_rate = PSAMPLE_RATE_DFLT;
+    new_netif->sample_size = PSAMPLE_SIZE_DFLT;
+
+    /* insert netif sorted by ID similar to ngknet_netif_create() */
+    found = false;
+    list_for_each(list, &g_bcmgenl_psample_info.netif_list) {
+        lbcmgenl_netif = (bcmgenl_netif_t*)list;
+        if (netif->id < lbcmgenl_netif->id) {
+            found = true;
+            g_bcmgenl_psample_info.netif_count++;
+            break;
+        }
+    }
+
+    if (found) {
+        /* Replace previously removed interface */
+        list_add_tail(&new_netif->list, &lbcmgenl_netif->list);
+    } else {
+        /* No holes - add to end of list */
+        list_add_tail(&new_netif->list, &g_bcmgenl_psample_info.netif_list);
+    }
+
+    spin_unlock_irqrestore(&g_bcmgenl_psample_info.lock, flags);
+
+    BCMGENL_PSAMPLE_DBG_VERB
+        ("%s: added netlink psample netif '%s'\n", __func__, netif->name);
+    return (0);
+}
+
+static int
+bcmgenl_psample_netif_destroy_cb(ngknet_dev_info_t *dinfo, ngknet_netif_t *netif)
+{
+    bool found = false;
+    struct list_head *list;
+    bcmgenl_netif_t *lbcmgenl_netif;
+    unsigned long flags;
+
+    if (!dinfo || !netif) {
+        printk("%s: dinfo or netif is NULL\n", __func__);
+        return (-1);
+    }
+
+    spin_lock_irqsave(&g_bcmgenl_psample_info.lock, flags);
+
+    list_for_each(list, &g_bcmgenl_psample_info.netif_list) {
+        lbcmgenl_netif = (bcmgenl_netif_t *)list;
+        if (netif->id == lbcmgenl_netif->id) {
+            found = true;
+            list_del(&lbcmgenl_netif->list);
+            BCMGENL_PSAMPLE_DBG_VERB
+                ("%s: removing psample netif '%s'\n", __func__, netif->name);
+            kfree(lbcmgenl_netif);
+            g_bcmgenl_psample_info.netif_count--;
+            break;
+        }
+    }
+
+    spin_unlock_irqrestore(&g_bcmgenl_psample_info.lock, flags);
+
+    if (!found) {
+        printk("%s: netif ID %d not found!\n", __func__, netif->id);
+        return (-1);
+    }
+    return (0);
+}
+
+/*
+ * psample rate Proc Read Entry
+ */
+static int
+bcmgenl_psample_proc_rate_show(struct seq_file *m, void *v)
+{
+    struct list_head *list;
+    bcmgenl_netif_t *psample_netif;
+    unsigned long flags;
+
+    spin_lock_irqsave(&g_bcmgenl_psample_info.lock, flags);
+
+    list_for_each(list, &g_bcmgenl_psample_info.netif_list) {
+        psample_netif = (bcmgenl_netif_t*)list;
+        seq_printf(m, "  %-14s %d\n", psample_netif->dev->name, psample_netif->sample_rate);
+    }
+
+    spin_unlock_irqrestore(&g_bcmgenl_psample_info.lock, flags);
+
+    return 0;
+}
+
+static int
+bcmgenl_psample_proc_rate_open(struct inode * inode, struct file * file)
+{
+    return single_open(file, bcmgenl_psample_proc_rate_show, NULL);
+}
+
+/*
+ * psample rate Proc Write Entry
+ *
+ *   Syntax:
+ *   <netif>=<pkt sample rate>
+ *
+ *   Where <netif> is a virtual network interface name.
+ *
+ *   Examples:
+ *   eth4=1000
+ */
+static ssize_t
+bcmgenl_psample_proc_rate_write(
+    struct file *file, const char *buf,
+    size_t count, loff_t *loff)
+{
+    bool found;
+    struct list_head *list;
+    bcmgenl_netif_t *psample_netif;
+    char sample_str[40], *ptr, *newline;
+    unsigned long flags;
+
+
+    if (count > sizeof(sample_str)) {
+        count = sizeof(sample_str) - 1;
+        sample_str[count] = '\0';
+    }
+    if (copy_from_user(sample_str, buf, count)) {
+        return -EFAULT;
+    }
+    sample_str[count] = 0;
+    newline = strchr(sample_str, '\n');
+    if (newline) {
+        /* Chop off the trailing newline */
+        *newline = '\0';
+    }
+
+    if ((ptr = strchr(sample_str, '=')) == NULL &&
+        (ptr = strchr(sample_str, ':')) == NULL) {
+        printk("Error: Pkt sample rate syntax not recognized: '%s'\n",
+               sample_str);
+        return count;
+    }
+    *ptr++ = 0;
+
+    spin_lock_irqsave(&g_bcmgenl_psample_info.lock, flags);
+
+    found = false;
+    list_for_each(list, &g_bcmgenl_psample_info.netif_list) {
+        psample_netif = (bcmgenl_netif_t*)list;
+        if (strcmp(psample_netif->dev->name, sample_str) == 0) {
+            psample_netif->sample_rate = simple_strtol(ptr, NULL, 10);
+            found = true;
+            break;
+        }
+    }
+
+    spin_unlock_irqrestore(&g_bcmgenl_psample_info.lock, flags);
+
+    if (!found) {
+        printk("Warning: Failed setting psample rate on unknown network"
+               "interface: '%s'\n", sample_str);
+    }
+    return count;
+}
+
+struct proc_ops bcmgenl_psample_proc_rate_file_ops = {
+    PROC_OWNER(THIS_MODULE)
+    .proc_open =       bcmgenl_psample_proc_rate_open,
+    .proc_read =       seq_read,
+    .proc_lseek =      seq_lseek,
+    .proc_write =       bcmgenl_psample_proc_rate_write,
+    .proc_release =    single_release,
+};
+
+/*
+ * psample size Proc Read Entry
+ */
+static int
+bcmgenl_psample_proc_size_show(struct seq_file *m, void *v)
+{
+    struct list_head *list;
+    bcmgenl_netif_t *psample_netif;
+    unsigned long flags;
+
+    spin_lock_irqsave(&g_bcmgenl_psample_info.lock, flags);
+
+    list_for_each(list, &g_bcmgenl_psample_info.netif_list) {
+        psample_netif = (bcmgenl_netif_t*)list;
+        seq_printf(m, "  %-14s %d\n", psample_netif->dev->name, psample_netif->sample_size);
+    }
+
+    spin_unlock_irqrestore(&g_bcmgenl_psample_info.lock, flags);
+    return 0;
+}
+
+static int
+bcmgenl_psample_proc_size_open(struct inode * inode, struct file * file)
+{
+    return single_open(file, bcmgenl_psample_proc_size_show, NULL);
+}
+
+/*
+ * psample size Proc Write Entry
+ *
+ *   Syntax:
+ *   <netif>=<pkt sample size in bytes>
+ *
+ *   Where <netif> is a virtual network interface name.
+ *
+ *   Examples:
+ *   eth4=128
+ */
+static ssize_t
+bcmgenl_psample_proc_size_write(
+    struct file *file, const char *buf,
+    size_t count, loff_t *loff)
+{
+    bool found;
+    struct list_head *list;
+    bcmgenl_netif_t *bcmgenl_netif;
+    char sample_str[40], *ptr, *newline;
+    unsigned long flags;
+
+    if (count > sizeof(sample_str)) {
+        count = sizeof(sample_str) - 1;
+        sample_str[count] = '\0';
+    }
+    if (copy_from_user(sample_str, buf, count)) {
+        return -EFAULT;
+    }
+    sample_str[count] = 0;
+    newline = strchr(sample_str, '\n');
+    if (newline) {
+        /* Chop off the trailing newline */
+        *newline = '\0';
+    }
+
+    if ((ptr = strchr(sample_str, '=')) == NULL &&
+        (ptr = strchr(sample_str, ':')) == NULL) {
+        printk("Error: Pkt sample size syntax not recognized: '%s'\n", sample_str);
+        return count;
+    }
+    *ptr++ = 0;
+
+    spin_lock_irqsave(&g_bcmgenl_psample_info.lock, flags);
+
+    found = false;
+    list_for_each(list, &g_bcmgenl_psample_info.netif_list) {
+        bcmgenl_netif = (bcmgenl_netif_t*)list;
+        if (strcmp(bcmgenl_netif->dev->name, sample_str) == 0) {
+            bcmgenl_netif->sample_size = simple_strtol(ptr, NULL, 10);
+            found = true;
+            break;
+        }
+    }
+
+    spin_unlock_irqrestore(&g_bcmgenl_psample_info.lock, flags);
+
+    if (!found) {
+        printk("Warning: Failed setting psample size on unknown network interface: '%s'\n", sample_str);
+    }
+    return count;
+}
+
+struct proc_ops bcmgenl_psample_proc_size_file_ops = {
+    PROC_OWNER(THIS_MODULE)
+    .proc_open =       bcmgenl_psample_proc_size_open,
+    .proc_read =       seq_read,
+    .proc_lseek =      seq_lseek,
+    .proc_write =       bcmgenl_psample_proc_size_write,
+    .proc_release =    single_release,
+};
+
+/*
+ * psample map Proc Read Entry
+ */
+static int
+bcmgenl_psample_proc_map_show(struct seq_file *m, void *v)
+{
+    struct list_head *list;
+    bcmgenl_netif_t *bcmgenl_netif;
+    unsigned long flags;
+
+    seq_printf(m, "  Interface      logical port   ifindex\n");
+    seq_printf(m, "-------------    ------------   -------\n");
+    spin_lock_irqsave(&g_bcmgenl_psample_info.lock, flags);
+
+    list_for_each(list, &g_bcmgenl_psample_info.netif_list) {
+        bcmgenl_netif = (bcmgenl_netif_t*)list;
+        seq_printf(m, "  %-14s %-14d %d\n",
+                bcmgenl_netif->dev->name,
+                bcmgenl_netif->port,
+                bcmgenl_netif->dev->ifindex);
+    }
+
+    spin_unlock_irqrestore(&g_bcmgenl_psample_info.lock, flags);
+    return 0;
+}
+
+static int
+bcmgenl_psample_proc_map_open(struct inode * inode, struct file * file)
+{
+    return single_open(file, bcmgenl_psample_proc_map_show, NULL);
+}
+
+struct proc_ops bcmgenl_psample_proc_map_file_ops = {
+    PROC_OWNER(THIS_MODULE)
+    .proc_open =       bcmgenl_psample_proc_map_open,
+    .proc_read =       seq_read,
+    .proc_lseek =      seq_lseek,
+    .proc_write =       NULL,
+    .proc_release =    single_release,
+};
+
+/*
+ * psample debug Proc Read Entry
+ */
+static int
+bcmgenl_psample_proc_debug_show(struct seq_file *m, void *v)
+{
+    seq_printf(m, "BCM KNET %s Callback Config\n", BCMGENL_PSAMPLE_NAME);
+    seq_printf(m, "  debug:           0x%x\n", debug);
+    seq_printf(m, "  netif_count:     %d\n",   g_bcmgenl_psample_info.netif_count);
+    seq_printf(m, "  queue length:    %d\n",   bcmgenl_psample_qlen);
+
+    return 0;
+}
+
+static int
+bcmgenl_psample_proc_debug_open(struct inode * inode, struct file * file)
+{
+    return single_open(file, bcmgenl_psample_proc_debug_show, NULL);
+}
+
+/*
+ * psample debug Proc Write Entry
+ *
+ *   Syntax:
+ *   debug=<mask>
+ *
+ *   Where <mask> corresponds to the debug module parameter.
+ *
+ *   Examples:
+ *   debug=0x1
+ */
+static ssize_t
+bcmgenl_psample_proc_debug_write(
+    struct file *file, const char *buf,
+    size_t count, loff_t *loff)
+{
+    char debug_str[40];
+    char *ptr;
+
+    if (count > sizeof(debug_str)) {
+        count = sizeof(debug_str) - 1;
+        debug_str[count] = '\0';
+    }
+    if (copy_from_user(debug_str, buf, count)) {
+        return -EFAULT;
+    }
+
+    if ((ptr = strstr(debug_str, "debug=")) != NULL) {
+        ptr += 6;
+        debug = simple_strtol(ptr, NULL, 0);
+    } else {
+        printk("Warning: unknown configuration setting\n");
+    }
+
+    return count;
+}
+
+struct proc_ops bcmgenl_psample_proc_debug_file_ops = {
+    PROC_OWNER(THIS_MODULE)
+    .proc_open =       bcmgenl_psample_proc_debug_open,
+    .proc_read =       seq_read,
+    .proc_lseek =      seq_lseek,
+    .proc_write =      bcmgenl_psample_proc_debug_write,
+    .proc_release =    single_release,
+};
+
+static int
+bcmgenl_psample_proc_stats_show(struct seq_file *m, void *v)
+{
+    seq_printf(m, "BCM KNET %s Callback Stats\n", BCMGENL_PSAMPLE_NAME);
+    seq_printf(m, "  pkts filter psample cb         %10lu\n", g_bcmgenl_psample_stats.pkts_f_psample_cb);
+    seq_printf(m, "  pkts sent to psample module    %10lu\n", g_bcmgenl_psample_stats.pkts_f_psample_mod);
+    seq_printf(m, "  pkts handled by psample        %10lu\n", g_bcmgenl_psample_stats.pkts_f_handled);
+    seq_printf(m, "  pkts pass through              %10lu\n", g_bcmgenl_psample_stats.pkts_f_pass_through);
+    seq_printf(m, "  pkts with mc destination       %10lu\n", g_bcmgenl_psample_stats.pkts_f_dst_mc);
+    seq_printf(m, "  pkts current queue length      %10lu\n", g_bcmgenl_psample_stats.pkts_c_qlen_cur);
+    seq_printf(m, "  pkts high queue length         %10lu\n", g_bcmgenl_psample_stats.pkts_c_qlen_hi);
+    seq_printf(m, "  pkts drop max queue length     %10lu\n", g_bcmgenl_psample_stats.pkts_d_qlen_max);
+    seq_printf(m, "  pkts drop no memory            %10lu\n", g_bcmgenl_psample_stats.pkts_d_no_mem);
+    seq_printf(m, "  pkts drop no psample group     %10lu\n", g_bcmgenl_psample_stats.pkts_d_no_group);
+    seq_printf(m, "  pkts drop sampling disabled    %10lu\n", g_bcmgenl_psample_stats.pkts_d_sampling_disabled);
+    seq_printf(m, "  pkts drop psample not ready    %10lu\n", g_bcmgenl_psample_stats.pkts_d_not_ready);
+    seq_printf(m, "  pkts drop metadata parse error %10lu\n", g_bcmgenl_psample_stats.pkts_d_metadata);
+    seq_printf(m, "  pkts drop skb error            %10lu\n", g_bcmgenl_psample_stats.pkts_d_skb);
+    seq_printf(m, "  pkts drop skb cbd error        %10lu\n", g_bcmgenl_psample_stats.pkts_d_skb_cbd);
+    seq_printf(m, "  pkts with invalid src port     %10lu\n", g_bcmgenl_psample_stats.pkts_d_meta_srcport);
+    seq_printf(m, "  pkts with invalid dst port     %10lu\n", g_bcmgenl_psample_stats.pkts_d_meta_dstport);
+    seq_printf(m, "  pkts with invalid orig pkt sz  %10lu\n", g_bcmgenl_psample_stats.pkts_d_invalid_size);
+    return 0;
+}
+
+static int
+bcmgenl_psample_proc_stats_open(struct inode * inode, struct file * file)
+{
+    return single_open(file, bcmgenl_psample_proc_stats_show, NULL);
+}
+
+/*
+ * psample stats Proc Write Entry
+ *
+ *   Syntax:
+ *   write any value to clear stats
+ */
+static ssize_t
+bcmgenl_psample_proc_stats_write(struct file *file, const char *buf,
+                    size_t count, loff_t *loff)
+{
+    int qlen_cur = 0;
+    unsigned long flags;
+
+    spin_lock_irqsave(&g_bcmgenl_psample_work.lock, flags);
+    qlen_cur = g_bcmgenl_psample_stats.pkts_c_qlen_cur;
+    memset(&g_bcmgenl_psample_stats, 0, sizeof(bcmgenl_psample_stats_t));
+    g_bcmgenl_psample_stats.pkts_c_qlen_cur = qlen_cur;
+    spin_unlock_irqrestore(&g_bcmgenl_psample_work.lock, flags);
+
+    return count;
+}
+struct proc_ops bcmgenl_psample_proc_stats_file_ops = {
+    PROC_OWNER(THIS_MODULE)
+    .proc_open =       bcmgenl_psample_proc_stats_open,
+    .proc_read =       seq_read,
+    .proc_lseek =      seq_lseek,
+    .proc_write =      bcmgenl_psample_proc_stats_write,
+    .proc_release =    single_release,
+};
+
+static int
+psample_cb_proc_cleanup(void)
+{
+    remove_proc_entry("stats", psample_proc_root);
+    remove_proc_entry("rate",  psample_proc_root);
+    remove_proc_entry("size",  psample_proc_root);
+    remove_proc_entry("debug", psample_proc_root);
+    remove_proc_entry("map"  , psample_proc_root);
+
+    proc_remove(psample_proc_root);
+    return 0;
+}
+
+static int
+psample_cb_proc_init(void)
+{
+    char psample_procfs_path[PROCFS_MAX_PATH];
+    struct proc_dir_entry *entry;
+
+    /* create procfs for psample */
+    snprintf(psample_procfs_path, PROCFS_MAX_PATH, "%s/%s",
+             BCMGENL_PROCFS_PATH, BCMGENL_PSAMPLE_NAME);
+    psample_proc_root = proc_mkdir(psample_procfs_path, NULL);
+
+    /* create procfs for psample stats */
+    PROC_CREATE(entry, "stats", 0666, psample_proc_root,
+                &bcmgenl_psample_proc_stats_file_ops);
+    if (entry == NULL) {
+        printk("%s: Unable to create procfs entry '/procfs/%s/stats'\n",
+               __func__, psample_procfs_path);
+        return -1;
+    }
+
+    /* create procfs for setting sample rates */
+    PROC_CREATE(entry, "rate", 0666, psample_proc_root,
+                &bcmgenl_psample_proc_rate_file_ops);
+    if (entry == NULL) {
+        printk("%s: Unable to create procfs entry '/procfs/%s/rate'\n",
+               __func__, psample_procfs_path);
+        return -1;
+    }
+
+    /* create procfs for setting sample size */
+    PROC_CREATE(entry, "size", 0666, psample_proc_root,
+                &bcmgenl_psample_proc_size_file_ops);
+    if (entry == NULL) {
+        printk("%s: Unable to create procfs entry '/procfs/%s/size'\n",
+               __func__, psample_procfs_path);
+        return -1;
+    }
+
+    /* create procfs for getting netdev mapping */
+    PROC_CREATE(entry, "map", 0666, psample_proc_root,
+                &bcmgenl_psample_proc_map_file_ops);
+    if (entry == NULL) {
+        printk("%s: Unable to create procfs entry '/procfs/%s/map'\n",
+               __func__, psample_procfs_path);
+        return -1;
+    }
+
+    /* create procfs for debug log */
+    PROC_CREATE(entry, "debug", 0666, psample_proc_root,
+                &bcmgenl_psample_proc_debug_file_ops);
+    if (entry == NULL) {
+        printk("%s: Unable to create procfs entry '/procfs/%s/debug'\n",
+               __func__, psample_procfs_path);
+        return -1;
+    }
+    return 0;
+}
+
+static int
+psample_cb_cleanup(void)
+{
+    psample_pkt_t *pkt;
+
+    cancel_work_sync(&g_bcmgenl_psample_work.wq);
+
+    while (!list_empty(&g_bcmgenl_psample_work.pkt_list)) {
+        pkt = list_entry(g_bcmgenl_psample_work.pkt_list.next,
+                         psample_pkt_t, list);
+        list_del(&pkt->list);
+        dev_kfree_skb_any(pkt->skb);
+        kfree(pkt);
+    }
+
+    return 0;
+}
+
+static int
+psample_cb_init(void)
+{
+    /* clear data structs */
+    memset(&g_bcmgenl_psample_stats, 0, sizeof(bcmgenl_psample_stats_t));
+    memset(&g_bcmgenl_psample_info, 0, sizeof(bcmgenl_info_t));
+    memset(&g_bcmgenl_psample_work, 0, sizeof(bcmgenl_psample_work_t));
+
+    /* setup psample_info struct */
+    INIT_LIST_HEAD(&g_bcmgenl_psample_info.netif_list);
+    spin_lock_init(&g_bcmgenl_psample_info.lock);
+
+    /* setup psample work queue */
+    spin_lock_init(&g_bcmgenl_psample_work.lock);
+    INIT_LIST_HEAD(&g_bcmgenl_psample_work.pkt_list);
+    INIT_WORK(&g_bcmgenl_psample_work.wq, bcmgenl_psample_task);
+
+    /* get net namespace */
+    g_bcmgenl_psample_info.netns = get_net_ns_by_pid(current->pid);
+    if (!g_bcmgenl_psample_info.netns) {
+        printk("%s: Could not get network namespace for pid %d\n",
+               __func__, current->pid);
+        return (-1);
+    }
+    BCMGENL_PSAMPLE_DBG_VERB
+        ("%s: current->pid %d, netns 0x%p, sample_size %d\n",
+         __func__, current->pid, g_bcmgenl_psample_info.netns, psample_size);
+    return 0;
+}
+
+int bcmgenl_psample_cleanup(void)
+{
+    ngknet_netif_create_cb_unregister(bcmgenl_psample_netif_create_cb);
+    ngknet_netif_destroy_cb_unregister(bcmgenl_psample_netif_destroy_cb);
+    ngknet_filter_cb_unregister(bcmgenl_psample_filter_cb);
+
+    psample_cb_cleanup();
+    psample_cb_proc_cleanup();
+    return 0;
+}
+
+int bcmgenl_psample_init(void)
+{
+    ngknet_netif_create_cb_register(bcmgenl_psample_netif_create_cb);
+    ngknet_netif_destroy_cb_register(bcmgenl_psample_netif_destroy_cb);
+    ngknet_filter_cb_register_by_name
+        (bcmgenl_psample_filter_cb, BCMGENL_PSAMPLE_NAME);
+
+    psample_cb_proc_init();
+    return psample_cb_init();
+}
+
+#else
+int bcmgenl_psample_cleanup(void)
+{
+    return 0;
+}
+
+int bcmgenl_psample_init(void)
+{
+    return 0;
+}
+#endif /* BCMGENL_PSAMPLE_SUPPORT */
+EXPORT_SYMBOL(bcmgenl_psample_cleanup);
+EXPORT_SYMBOL(bcmgenl_psample_init);
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl_psample.h b/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl_psample.h
new file mode 100644
index 000000000..a934a03c1
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl_psample.h
@@ -0,0 +1,35 @@
+/*! \file bcmgenl_psample.h
+ *
+ * BCMGENL psample module.
+ *
+ */
+/*
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ */
+
+#ifndef BCMGENL_PSAMPLE_H
+#define BCMGENL_PSAMPLE_H
+
+#include <linux/kconfig.h>
+
+#ifndef BCMGENL_PSAMPLE_SUPPORT
+#define BCMGENL_PSAMPLE_SUPPORT (IS_ENABLED(CONFIG_PSAMPLE))
+#endif /* BCMGENL_PSAMPLE_SUPPORT */
+
+extern int bcmgenl_psample_init(void);
+extern int bcmgenl_psample_cleanup(void);
+
+#endif /* BCMGENL_PSAMPLE_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bde/Kbuild b/platform/broadcom/saibcm-modules/sdklt/linux/bde/Kbuild
index 7b444f509..51bbcae56 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/bde/Kbuild
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/bde/Kbuild
@@ -6,7 +6,7 @@
 # builds of the NGBDE kernel module, for example, using a different
 # default DMA pool size or turning off MSI interrupts.
 #
-# $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+# $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
 # The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
 # 
 # This program is free software; you can redistribute it and/or
@@ -25,6 +25,7 @@
 obj-m := linux_ngbde.o
 
 ccflags-y := $(LKM_CFLAGS) $(NGBDE_CFLAGS) \
+             $(LKM_BUILD_INFO) \
              -I$(SDK)/linux/include \
              -I$(SDK)/linux/bde \
              -I$(SDK)/bcmdrd/include
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bde/Makefile b/platform/broadcom/saibcm-modules/sdklt/linux/bde/Makefile
index f4401e62d..1803ca728 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/bde/Makefile
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/bde/Makefile
@@ -1,5 +1,5 @@
 #
-# $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+# $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
 # The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
 # 
 # This program is free software; you can redistribute it and/or
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde.h b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde.h
index 5d3339ad7..b930e435e 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde.h
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde.h
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_dma.c b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_dma.c
index 6e1585503..082c00621 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_dma.c
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_dma.c
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -31,7 +31,7 @@ MODULE_PARM_DESC(dma_debug,
 
 /*! Default size of of DMA memory pools (in MB). */
 #ifndef DMAPOOL_SIZE_DEFAULT
-#define DMAPOOL_SIZE_DEFAULT    16
+#define DMAPOOL_SIZE_DEFAULT    32
 #endif
 
 /*! Default number of DMA memory pools per device. */
@@ -41,7 +41,7 @@ MODULE_PARM_DESC(dma_debug,
 static int dma_size = DMAPOOL_SIZE_DEFAULT;
 module_param(dma_size, int, S_IRUSR);
 MODULE_PARM_DESC(dma_size,
-"Size of of DMA memory pools in MB (default 16 MB).");
+"Size of of DMA memory pools in MB (default 32 MB).");
 /*! \endcond */
 
 /*! \cond */
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_iio.c b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_iio.c
index 99ced831e..3293493ae 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_iio.c
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_iio.c
@@ -5,7 +5,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_intr.c b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_intr.c
index 5d68fa92a..d92a63316 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_intr.c
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_intr.c
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_ioctl.c b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_ioctl.c
index f83857f6e..4d20ca654 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_ioctl.c
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_ioctl.c
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_iproc_probe.c b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_iproc_probe.c
index 10f221642..e297ca35e 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_iproc_probe.c
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_iproc_probe.c
@@ -8,7 +8,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_kapi.c b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_kapi.c
index 506231054..b95beee3a 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_kapi.c
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_kapi.c
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_main.c b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_main.c
index 38a60867b..13391c2d9 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_main.c
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_main.c
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_paxb.c b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_paxb.c
index 376062d34..44cd90867 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_paxb.c
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_paxb.c
@@ -5,7 +5,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_pci_probe.c b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_pci_probe.c
index f74ccf5a4..0d5d7417b 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_pci_probe.c
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_pci_probe.c
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_pgmem.c b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_pgmem.c
index ec6b36978..7cdd2f099 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_pgmem.c
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_pgmem.c
@@ -31,7 +31,7 @@
  * likely these requests are to succeed.
  */
 /*
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_pio.c b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_pio.c
index cfcc97a94..b124c0b02 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_pio.c
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_pio.c
@@ -5,7 +5,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_procfs.c b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_procfs.c
index 6fd02ebd3..0394f86a5 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_procfs.c
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_procfs.c
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -35,7 +35,9 @@ proc_show(struct seq_file *m, void *v)
     ngbde_swdev_get_all(&swdev, &num_swdev);
 
     seq_printf(m, "Broadcom Device Enumerator (%s)\n", MOD_NAME);
-
+#ifdef LKM_BUILD_INFO
+    seq_printf(m, "%s\n", LKM_BUILD_INFO);
+#endif
     seq_printf(m, "Found %d switch device(s):\n", num_swdev);
     for (idx = 0; idx < num_swdev; idx++) {
         if (swdev->inactive) {
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_swdev.c b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_swdev.c
index a6fedc2c4..1f56ed7fb 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_swdev.c
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_swdev.c
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/genl-packet/Kbuild b/platform/broadcom/saibcm-modules/sdklt/linux/genl-packet/Kbuild
new file mode 100644
index 000000000..0218b85de
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/genl-packet/Kbuild
@@ -0,0 +1,13 @@
+# -*- Kbuild -*-
+#
+# Linux Netlink channel for general packet I/O module.
+#
+# $Copyright: (c) 2023 Broadcom.
+# Broadcom Proprietary and Confidential. All rights reserved.$
+#
+
+obj-m := genl-packet.o
+
+ccflags-y := $(LKM_CFLAGS) \
+	     -I$(SDK)/linux/include/lkm \
+	     -I$(SDK)/linux/include/kernel
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/genl-packet/Makefile b/platform/broadcom/saibcm-modules/sdklt/linux/genl-packet/Makefile
new file mode 100644
index 000000000..9bf7afe3f
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/genl-packet/Makefile
@@ -0,0 +1,20 @@
+#
+# $Copyright: (c) 2023 Broadcom.
+# Broadcom Proprietary and Confidential. All rights reserved.$
+#
+# Linux Netlink channel for general packet I/O module.
+#
+
+include Kbuild
+
+ifeq ($(KERNELRELEASE),)
+
+MOD_NAME = genl-packet
+
+include $(SDK)/make/lkm.mk
+
+endif
+
+.PHONY: distclean
+
+distclean::
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/genl-packet/genl-packet.c b/platform/broadcom/saibcm-modules/sdklt/linux/genl-packet/genl-packet.c
new file mode 100644
index 000000000..141edc6d7
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/genl-packet/genl-packet.c
@@ -0,0 +1,118 @@
+/*
+ * net/genl-packet/genl-packet.c - Netlink channel for general packetIO
+ * Copyright (c) 2021 Google, based on psample.c (originally written by
+ * Yotam Gigi <yotamg@mellanox.com>)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <lkm.h>
+#include <linux/skbuff.h>
+#include <net/genetlink.h>
+#include <net/genl-packet.h>
+
+#define GENL_PACKET_MAX_PACKET_SIZE 0xffff
+
+/* multicast groups */
+enum genl_packet_multicast_groups {
+	GENL_PACKET_MCGRP_PACKET,
+};
+
+static const struct genl_multicast_group genl_packet_mcgrps[] = {
+	[GENL_PACKET_MCGRP_PACKET] = { .name = GENL_PACKET_MCGRP_NAME },
+};
+
+static struct genl_family genl_packet_family = {
+	.name		= GENL_PACKET_NAME,
+	.version	= GENL_PACKET_VERSION,
+	.maxattr	= GENL_PACKET_ATTR_MAX,
+	.netnsok	= true,
+	.module		= THIS_MODULE,
+	.mcgrps		= genl_packet_mcgrps,
+	.n_mcgrps	= ARRAY_SIZE(genl_packet_mcgrps),
+};
+
+void genl_packet_send_packet(struct net *net, struct sk_buff *skb,
+					  int in_ifindex, int out_ifindex, unsigned int context)
+{
+	struct sk_buff *nl_skb;
+	int data_len;
+	int meta_len;
+	void *data;
+	int ret;
+
+    /* Metalength is sum of netlink message sizes of in_ifindex + out_ifindex +
+     * context */
+	meta_len = nla_total_size(sizeof(s16)) +
+             nla_total_size(sizeof(s16)) +
+             nla_total_size(sizeof(u32));
+
+	data_len = skb->len;
+	if (meta_len + nla_total_size(data_len) > GENL_PACKET_MAX_PACKET_SIZE)
+		data_len = GENL_PACKET_MAX_PACKET_SIZE - meta_len - NLA_HDRLEN
+			    - NLA_ALIGNTO;
+	if (data_len <= 0)
+		return;
+
+	nl_skb = genlmsg_new(meta_len + nla_total_size(data_len), GFP_ATOMIC);
+	if (unlikely(!nl_skb))
+		return;
+
+	data = genlmsg_put(nl_skb, 0, 0, &genl_packet_family, 0,
+			   GENL_PACKET_CMD_PACKET);
+	if (unlikely(!data))
+		goto error;
+
+	ret = nla_put_s16(nl_skb, GENL_PACKET_ATTR_IIFINDEX, in_ifindex);
+	if (unlikely(ret < 0))
+		goto error;
+
+	ret = nla_put_s16(nl_skb, GENL_PACKET_ATTR_OIFINDEX, out_ifindex);
+	if (unlikely(ret < 0))
+		goto error;
+
+	ret = nla_put_u32(nl_skb, GENL_PACKET_ATTR_CONTEXT, context);
+	if (unlikely(ret < 0))
+		goto error;
+
+	if (data_len > 0) {
+		int nla_len = nla_total_size(data_len);
+		struct nlattr *nla;
+
+		nla = (struct nlattr *)skb_put(nl_skb, nla_len);
+		nla->nla_type = GENL_PACKET_ATTR_DATA;
+		nla->nla_len = nla_attr_size(data_len);
+
+		if (skb_copy_bits(skb, 0, nla_data(nla), data_len))
+			goto error;
+	}
+
+	genlmsg_end(nl_skb, data);
+	genlmsg_multicast_netns(&genl_packet_family, net, nl_skb, 0,
+				GENL_PACKET_MCGRP_PACKET, GFP_ATOMIC);
+
+	return;
+error:
+	pr_err_ratelimited("Could not create genl_packet message\n");
+	nlmsg_free(nl_skb);
+}
+EXPORT_SYMBOL_GPL(genl_packet_send_packet);
+
+static int __init genl_packet_module_init(void)
+{
+	return genl_register_family(&genl_packet_family);
+}
+
+static void __exit genl_packet_module_exit(void)
+{
+	genl_unregister_family(&genl_packet_family);
+}
+
+module_init(genl_packet_module_init);
+module_exit(genl_packet_module_exit);
+
+MODULE_AUTHOR("Google");
+MODULE_DESCRIPTION("netlink channel for genl_packet");
+MODULE_LICENSE("GPL v2");
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/include/kernel/README b/platform/broadcom/saibcm-modules/sdklt/linux/include/kernel/README
new file mode 100644
index 000000000..dd6ab429d
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/include/kernel/README
@@ -0,0 +1,8 @@
+This directory is mainly for the header files which are planned
+for upstreaming to the mainline kernels.
+The header files can be placed in the simulated kernel include path
+created in this directory.
+
+The directory (include/kernel) can be added to the include path (-I)
+when compiling the associated source files such that the standard Linux path
+can be used in the source files.
\ No newline at end of file
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/include/kernel/net/genl-packet.h b/platform/broadcom/saibcm-modules/sdklt/linux/include/kernel/net/genl-packet.h
new file mode 100644
index 000000000..48db3895d
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/include/kernel/net/genl-packet.h
@@ -0,0 +1,9 @@
+#ifndef __NET_GENL_PACKET_H
+#define __NET_GENL_PACKET_H
+
+#include <uapi/linux/genl-packet.h>
+
+extern void genl_packet_send_packet(struct net *net, struct sk_buff *skb,
+							 int in_ifindex, int out_ifindex, unsigned int context);
+
+#endif /* __NET_GENL_PACKET_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/include/kernel/uapi/linux/genl-packet.h b/platform/broadcom/saibcm-modules/sdklt/linux/include/kernel/uapi/linux/genl-packet.h
new file mode 100644
index 000000000..e57442117
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/include/kernel/uapi/linux/genl-packet.h
@@ -0,0 +1,24 @@
+#ifndef __UAPI_GENL_PACKET_H
+#define __UAPI_GENL_PACKET_H
+
+enum {
+	/* packet metadata */
+	GENL_PACKET_ATTR_IIFINDEX,
+	GENL_PACKET_ATTR_OIFINDEX,
+	GENL_PACKET_ATTR_CONTEXT,
+	GENL_PACKET_ATTR_DATA,
+
+	__GENL_PACKET_ATTR_MAX
+};
+
+enum genl_packet_command {
+	GENL_PACKET_CMD_PACKET,
+};
+
+/* Can be overridden at runtime by module option */
+#define GENL_PACKET_ATTR_MAX (__GENL_PACKET_ATTR_MAX - 1)
+
+#define GENL_PACKET_MCGRP_NAME "packets"
+#define GENL_PACKET_NAME "genl_packet"
+#define GENL_PACKET_VERSION 1
+#endif /* __UAPI_GENL_PACKET_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/lkm.h b/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/lkm.h
index 4da4ab985..d58ea5991 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/lkm.h
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/lkm.h
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngbde_ioctl.h b/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngbde_ioctl.h
index 1a3b94f0a..e8155a620 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngbde_ioctl.h
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngbde_ioctl.h
@@ -9,7 +9,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngbde_kapi.h b/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngbde_kapi.h
index 98a148711..84280ac36 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngbde_kapi.h
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngbde_kapi.h
@@ -6,7 +6,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngedk_ioctl.h b/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngedk_ioctl.h
index 05063d320..384adc2aa 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngedk_ioctl.h
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngedk_ioctl.h
@@ -9,7 +9,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -43,7 +43,7 @@
 
 /*! Maximum number of mHosts supported per switch device. */
 #ifndef MCS_NUM_UC
-#define MCS_NUM_UC     4
+#define MCS_NUM_UC     6
 #endif
 
 /*!
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngedk_kapi.h b/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngedk_kapi.h
new file mode 100644
index 000000000..e9db5cb31
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngedk_kapi.h
@@ -0,0 +1,39 @@
+/*! \file ngedk_kapi.h
+ *
+ * NGEDK kernel API.
+ *
+ * This file is intended for use by other kernel modules relying on the NGEDK.
+ *
+ */
+/*
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ */
+
+#ifndef NGEDK_KAPI_H
+#define NGEDK_KAPI_H
+
+/*!
+ * \brief Converts physical address to virtual address.
+ *
+ * \param [in] paddr physical address.
+ *
+ * \retval void * Corresponding virtual address.
+ */
+extern void *
+ngedk_dmamem_map_p2v(dma_addr_t paddr);
+
+#endif /* NGEDK_KAPI_H */
+
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngknet_dev.h b/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngknet_dev.h
index 1c6ec921c..02cb97df4 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngknet_dev.h
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngknet_dev.h
@@ -9,7 +9,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -104,6 +104,8 @@
 #define NGKNET_NETIF_F_ADD_TAG      (1U << 1)
 /*! Bind network interface to Rx channel */
 #define NGKNET_NETIF_F_BIND_CHAN    (1U << 2)
+/*! Create network interface with specified ID */
+#define NGKNET_NETIF_F_WITH_ID      (1U << 3)
 
 /*!
  * \brief Network interface description.
@@ -147,6 +149,9 @@ typedef struct ngknet_netif_s {
 
     /*! User data gotten back through callbacks */
     uint8_t user_data[NGKNET_NETIF_USER_DATA];
+
+    /*! Network interface port */
+    uint32_t port;
 } ngknet_netif_t;
 
 /*!
@@ -303,10 +308,12 @@ typedef struct ngknet_dev_info_s {
 
     /*! Device variant string */
     char var_str[NGKNET_DEV_NAME_MAX];
+    /*! Virtual network devices, pointer to ngknet_dev.vdev[] */
+    struct net_device **vdev;
 } ngknet_dev_info_t;
 
 /*!
- * \brief Device configure structure.
+ * \brief Device configuration structure.
  */
 typedef struct ngknet_dev_cfg_s {
     /*! Device name */
@@ -338,6 +345,11 @@ typedef struct ngknet_dev_cfg_s {
 
     /*! Base network interface */
     ngknet_netif_t base_netif;
+
+    /*! Configuration flags */
+    uint32_t flags;
+    /*! Rx polling for single queue */
+#define NGKNET_RX_POLL_SQ       (1 << 0)
 } ngknet_dev_cfg_t;
 
 /*!
@@ -404,8 +416,8 @@ struct ngknet_rcpu_hdr {
     /*! Packet data length */
     uint16_t data_len;
 
-    /*! Reserved must be 0 */
-    uint16_t rsvd0;
+    /*! Header profile */
+    uint16_t hdr_prof;
 
     /*! packet meta data length */
     uint8_t meta_len;
@@ -414,7 +426,7 @@ struct ngknet_rcpu_hdr {
     uint8_t queue_id;
 
     /*! Reserved must be 0 */
-    uint16_t rsvd1;
+    uint16_t rsvd;
 };
 
 /*! RCPU Rx operation */
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngknet_ioctl.h b/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngknet_ioctl.h
index ad1614f81..ed683111a 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngknet_ioctl.h
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngknet_ioctl.h
@@ -9,7 +9,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngknet_kapi.h b/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngknet_kapi.h
index 878a065ba..5230ba663 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngknet_kapi.h
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngknet_kapi.h
@@ -6,7 +6,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -49,28 +49,41 @@ struct ngknet_callback_desc {
 
     /*! Packet data length */
     int pkt_len;
+
+    /*! Network device */
+    struct net_device *net_dev;
 };
 
 /*! SKB callback data */
 #define NGKNET_SKB_CB(_skb) ((struct ngknet_callback_desc *)_skb->cb)
 
+/*!
+ * PHC specific private data
+ */
+struct ngknet_ptp_data {
+    /*! Physical port */
+    int phy_port;
+
+    /*! HW timestamp Tx type */
+    int hwts_tx_type;
+};
+
 /*! TX/RX callback init */
 typedef void
 (*ngknet_dev_init_cb_f)(ngknet_dev_info_t *dinfo);
 
 /*! Handle Rx packet */
 typedef struct sk_buff *
-(*ngknet_rx_cb_f)(struct net_device *dev, struct sk_buff *skb);
+(*ngknet_rx_cb_f)(struct sk_buff *skb);
 
 /*! Handle Tx packet */
 typedef struct sk_buff *
 (*ngknet_tx_cb_f)(struct sk_buff *skb);
 
-#if 0
 /*! Handle Netif callback */
 typedef int
 (*ngknet_netif_cb_f)(ngknet_dev_info_t *dinfo, ngknet_netif_t *netif);
-#endif
+
 /*! Handle Filter callback */
 typedef struct sk_buff *
 (*ngknet_filter_cb_f)(struct sk_buff *skb, ngknet_filter_t **filt);
@@ -95,9 +108,9 @@ typedef int
 typedef int
 (*ngknet_ptp_dev_ctrl_cb_f)(ngknet_dev_info_t *dinfo, int cmd, char *data, int len);
 
-/*! Netif callback  */
+/*! PTP RX Preprocessing */
 typedef int
-(*ngknet_netif_cb_f)(struct net_device *dev);
+(*ngknet_ptp_rx_pre_process_cb_f)(struct sk_buff *skb, uint32_t *cust_hdr_len);
 
 /*!
  * \brief Register TX/RX callback device initialization callback function.
@@ -225,6 +238,17 @@ ngknet_netif_destroy_cb_unregister(ngknet_netif_cb_f netif_cb);
 extern int
 ngknet_filter_cb_register(ngknet_filter_cb_f filter_cb);
 
+/*!
+ * \brief Register filter callback by name.
+ *
+ * \param [in] filter_cb Filter callback function.
+ * \param [in] desc Filter description.
+ *
+ * \retval SHR_E_NONE No errors.
+ */
+extern int
+ngknet_filter_cb_register_by_name(ngknet_filter_cb_f filter_cb, const char *desc);
+
 /*!
  * \brief Unregister filter callback.
  *
@@ -375,5 +399,25 @@ ngknet_ptp_dev_ctrl_cb_register(ngknet_ptp_dev_ctrl_cb_f ptp_dev_ctrl_cb);
 extern int
 ngknet_ptp_dev_ctrl_cb_unregister(ngknet_ptp_dev_ctrl_cb_f ptp_dev_ctrl_cb);
 
+/*!
+ * \brief Register PTP RX pre processing callback.
+ *
+ * \param [in] ptp_rx_pre_process_cb RX pre processing callback function.
+ *
+ * \retval SHR_E_NONE No errors.
+ */
+extern int
+ngknet_ptp_rx_pre_process_cb_register(ngknet_ptp_rx_pre_process_cb_f ptp_rx_pre_process_cb);
+
+/*!
+ * \brief Unregister PTP RX pre processing callback.
+ *
+ * \param [in] ptp_rx_pre_process_cb RX pre processing callback function.
+ *
+ * \retval SHR_E_NONE No errors.
+ */
+extern int
+ngknet_ptp_rx_pre_process_cb_unregister(ngknet_ptp_rx_pre_process_cb_f ptp_rx_pre_process_cb);
+
 #endif /* NGKNET_KAPI_H */
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngptpclock_ioctl.h b/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngptpclock_ioctl.h
new file mode 100644
index 000000000..0164b4b31
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngptpclock_ioctl.h
@@ -0,0 +1,43 @@
+/*! \file ngptpclock_ioctl.h
+ *
+ * NGPTPCLOCK I/O control definitions.
+ *
+ * This file is intended for use in both kernel mode and user mode.
+ *
+ * IMPORTANT!
+ * All shared structures must be properly 64-bit aligned.
+ *
+ */
+/*
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ */
+
+#ifndef NGPTPCLOCK_IOCTL_H
+#define NGPTPCLOCK_IOCTL_H
+
+/* Module Information */
+#define NGPTPCLOCK_MODULE_NAME     "linux_ngptpclock"
+
+/*!
+ * \brief PTP hardware clock driver commands
+ */
+/*! Initialize PTP hardware clock driver module */
+#define NGPTPCLOCK_HW_INIT                     0
+/*! Clean up PTP hardware clock driver module */
+#define NGPTPCLOCK_HW_CLEANUP                  1
+
+#endif /* NGPTPCLOCK_IOCTL_H */
+
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knet/Kbuild b/platform/broadcom/saibcm-modules/sdklt/linux/knet/Kbuild
index a23e587b1..38ddb39ec 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/knet/Kbuild
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/knet/Kbuild
@@ -2,7 +2,7 @@
 #
 # Linux KNET module.
 #
-# $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+# $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
 # The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
 # 
 # This program is free software; you can redistribute it and/or
@@ -39,6 +39,7 @@ linux_ngknet-y := $(CHIP_OBJS) \
                   bcmcnet_cmicx_pdma_rxtx.o \
                   bcmcnet_cmicr_pdma_hw.o \
                   bcmcnet_cmicr_pdma_rxtx.o \
+                  bcmcnet_cmicr2_pdma_rxtx.o \
                   bcmcnet_core.o \
                   bcmcnet_dev.o \
                   bcmcnet_rxtx.o \
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knet/Makefile b/platform/broadcom/saibcm-modules/sdklt/linux/knet/Makefile
index f13702ac9..9a20f596d 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/knet/Makefile
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/knet/Makefile
@@ -1,5 +1,5 @@
 #
-# $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+# $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
 # The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
 # 
 # This program is free software; you can redistribute it and/or
@@ -26,6 +26,7 @@ GENDIR = $(OUTPUT_DIR)/knet/generated
 endif
 DSTIDIR = $(GENDIR)/include/bcmcnet
 
+
 # Change comma-separated list to space-separated list
 comma = ,
 empty =
@@ -78,8 +79,9 @@ mklinks:
 	-ln -s $(SRCIDIR)/bcmcnet_rxtx.h $(DSTIDIR) $(R)
 	-ln -s $(SRCIDIR)/bcmcnet_cmicd.h $(DSTIDIR) $(R)
 	-ln -s $(SRCIDIR)/bcmcnet_cmicx.h $(DSTIDIR) $(R)
-	-ln -s $(SRCIDIR)/bcmcnet_cmicr.h $(DSTIDIR) $(R)
 	-ln -s $(SRCIDIR)/bcmcnet_cmicr_acc.h $(DSTIDIR) $(R)
+	-ln -s $(SRCIDIR)/bcmcnet_cmicr.h $(DSTIDIR) $(R)
+	-ln -s $(SRCIDIR)/bcmcnet_cmicr2.h $(DSTIDIR) $(R)
 	-ln -s $(CNETDIR)/chip/*/*attach.c $(GENDIR) $(R)
 	-ln -s $(CNETDIR)/hmi/cmicd/*.c $(GENDIR) $(R)
 	-ln -s $(CNETDIR)/hmi/cmicx/*.c $(GENDIR) $(R)
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_buff.c b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_buff.c
index 362c6e156..e4e27f6af 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_buff.c
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_buff.c
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -251,19 +251,8 @@ ngknet_rx_buf_mode(struct pdma_dev *dev, struct pdma_rx_queue *rxq)
 {
     uint32_t len, order;
 
-    switch (ngknet_page_buffer_mode_get()) {
-    case 0:
-        /* Forced SKB mode */
+    if (ngknet_page_buffer_mode_get() == 0) {
         return PDMA_BUF_MODE_SKB;
-    case 1:
-        /* Forced page mode */
-        break;
-    default: /* -1 */
-        /* Select buffer mode based on system capability */
-        if (kal_support_paged_skb() == 0) {
-            return PDMA_BUF_MODE_SKB;
-        }
-        break;
     }
 
     len = dev->rx_ph_size ? rxq->buf_size : rxq->buf_size + PDMA_RXB_META;
@@ -327,12 +316,7 @@ ngknet_tx_buf_free(struct pdma_dev *dev, struct pdma_tx_queue *txq,
     }
 
     dma_unmap_single(kdev->dev, pbuf->dma, pbuf->len, DMA_TO_DEVICE);
-    if (skb_shinfo(pbuf->skb)->tx_flags & SKBTX_IN_PROGRESS) {
-        skb_queue_tail(&kdev->ptp_tx_queue, pbuf->skb);
-        schedule_work(&kdev->ptp_tx_work);
-    } else {
-        dev_kfree_skb_any(pbuf->skb);
-    }
+    dev_kfree_skb_any(pbuf->skb);
 
     pbuf->dma = 0;
     pbuf->len = 0;
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_buff.h b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_buff.h
index e8d5a69dc..81a0e7e0c 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_buff.h
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_buff.h
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_callback.c b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_callback.c
index 04d1540a2..5a96e4f27 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_callback.c
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_callback.c
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -20,10 +20,48 @@
  * be found in the LICENSES folder.$
  */
 
+#include "ngknet_main.h"
 #include "ngknet_callback.h"
+#include "ngknet_extra.h"
 
 static struct ngknet_callback_ctrl callback_ctrl;
 
+void
+ngknet_callback_init(struct ngknet_dev *devs)
+{
+    INIT_LIST_HEAD(&callback_ctrl.netif_create_cb_list);
+    INIT_LIST_HEAD(&callback_ctrl.netif_destroy_cb_list);
+    INIT_LIST_HEAD(&callback_ctrl.filter_cb_list);
+    callback_ctrl.devs = devs;
+}
+
+void
+ngknet_callback_cleanup(void)
+{
+    netif_cb_t *netif_cb;
+    filter_cb_t *filter_cb;
+
+    /* Destroy any create/destroy netif which is not unregistered */
+    while (!list_empty(&callback_ctrl.netif_create_cb_list)) {
+        netif_cb = list_entry(callback_ctrl.netif_create_cb_list.next,
+                              netif_cb_t, list);
+        list_del(&netif_cb->list);
+        kfree(netif_cb);
+    }
+    while (!list_empty(&callback_ctrl.netif_destroy_cb_list)) {
+        netif_cb = list_entry(callback_ctrl.netif_destroy_cb_list.next,
+                              netif_cb_t, list);
+        list_del(&netif_cb->list);
+        kfree(netif_cb);
+    }
+    while (!list_empty(&callback_ctrl.filter_cb_list)) {
+        filter_cb = list_entry(callback_ctrl.filter_cb_list.next,
+                               filter_cb_t, list);
+        list_del(&filter_cb->list);
+        kfree(filter_cb);
+    }
+}
+
 int
 ngknet_callback_control_get(struct ngknet_callback_ctrl **cbc)
 {
@@ -105,10 +143,24 @@ ngknet_tx_cb_unregister(ngknet_tx_cb_f tx_cb)
 int
 ngknet_netif_create_cb_register(ngknet_netif_cb_f netif_cb)
 {
-    if (callback_ctrl.netif_create_cb != NULL) {
+    struct list_head *list;
+    netif_cb_t *netif_create_cb;
+
+    if (netif_cb == NULL) {
+        return -1;
+    }
+    list_for_each(list, &callback_ctrl.netif_create_cb_list) {
+        netif_create_cb = list_entry(list, netif_cb_t, list);
+        if (netif_create_cb->cb == netif_cb) {
+            return -1;
+        }
+    }
+    netif_create_cb = kmalloc(sizeof(*netif_create_cb), GFP_KERNEL);
+    if (netif_create_cb == NULL) {
         return -1;
     }
-    callback_ctrl.netif_create_cb = netif_cb;
+    netif_create_cb->cb = netif_cb;
+    list_add_tail(&netif_create_cb->list, &callback_ctrl.netif_create_cb_list);
 
     return 0;
 }
@@ -116,10 +168,25 @@ ngknet_netif_create_cb_register(ngknet_netif_cb_f netif_cb)
 int
 ngknet_netif_create_cb_unregister(ngknet_netif_cb_f netif_cb)
 {
-    if (netif_cb == NULL || callback_ctrl.netif_create_cb != netif_cb) {
+    struct list_head *list, *list_next;
+    netif_cb_t *netif_create_cb;
+    int found = 0;
+
+    if (netif_cb == NULL) {
         return -1;
     }
-    callback_ctrl.netif_create_cb = NULL;
+    list_for_each_safe(list, list_next, &callback_ctrl.netif_create_cb_list) {
+        netif_create_cb = list_entry(list, netif_cb_t, list);
+        if (netif_create_cb->cb == netif_cb) {
+            found = 1;
+            list_del(list);
+            break;
+        }
+    }
+    if (!found) {
+        return -1;
+    }
+    kfree(netif_create_cb);
 
     return 0;
 }
@@ -127,10 +194,24 @@ ngknet_netif_create_cb_unregister(ngknet_netif_cb_f netif_cb)
 int
 ngknet_netif_destroy_cb_register(ngknet_netif_cb_f netif_cb)
 {
-    if (callback_ctrl.netif_destroy_cb != NULL) {
+    struct list_head *list;
+    netif_cb_t *netif_destroy_cb;
+
+    if (netif_cb == NULL) {
+        return -1;
+    }
+    list_for_each(list, &callback_ctrl.netif_destroy_cb_list) {
+        netif_destroy_cb = list_entry(list, netif_cb_t, list);
+        if (netif_destroy_cb->cb == netif_cb) {
+            return -1;
+        }
+    }
+    netif_destroy_cb = kmalloc(sizeof(*netif_destroy_cb), GFP_KERNEL);
+    if (netif_destroy_cb == NULL) {
         return -1;
     }
-    callback_ctrl.netif_destroy_cb = netif_cb;
+    netif_destroy_cb->cb = netif_cb;
+    list_add_tail(&netif_destroy_cb->list, &callback_ctrl.netif_destroy_cb_list);
 
     return 0;
 }
@@ -138,10 +219,25 @@ ngknet_netif_destroy_cb_register(ngknet_netif_cb_f netif_cb)
 int
 ngknet_netif_destroy_cb_unregister(ngknet_netif_cb_f netif_cb)
 {
-    if (netif_cb == NULL || callback_ctrl.netif_destroy_cb != netif_cb) {
+    struct list_head *list, *list_next;
+    netif_cb_t *netif_destroy_cb;
+    int found = 0;
+
+    if (netif_cb == NULL) {
         return -1;
     }
-    callback_ctrl.netif_destroy_cb = NULL;
+    list_for_each_safe(list, list_next, &callback_ctrl.netif_destroy_cb_list) {
+        netif_destroy_cb = list_entry(list, netif_cb_t, list);
+        if (netif_destroy_cb->cb == netif_cb) {
+            found = 1;
+            list_del(list);
+            break;
+        }
+    }
+    if (!found) {
+        return -1;
+    }
+    kfree(netif_destroy_cb);
 
     return 0;
 }
@@ -157,14 +253,113 @@ ngknet_filter_cb_register(ngknet_filter_cb_f filter_cb)
     return 0;
 }
 
+int
+ngknet_filter_cb_register_by_name(ngknet_filter_cb_f filter_cb, const char *desc)
+{
+    struct ngknet_dev *dev;
+    struct list_head *list;
+    struct filt_ctrl *fc = NULL;
+    filter_cb_t *fcb;
+    unsigned long flags;
+    int idx;
+
+    if (filter_cb == NULL || desc == NULL) {
+        return -1;
+    }
+    if (desc[0] == '\0' || strlen(desc) >= NGKNET_FILTER_DESC_MAX) {
+        return -1;
+    }
+
+    list_for_each(list, &callback_ctrl.filter_cb_list) {
+        fcb = list_entry(list, filter_cb_t, list);
+        if (strcmp(fcb->desc, desc) == 0) {
+            return -1;
+        }
+    }
+    fcb = kmalloc(sizeof(*fcb), GFP_KERNEL);
+    if (fcb == NULL) {
+        return -1;
+    }
+    fcb->cb = filter_cb;
+    strcpy(fcb->desc, desc); // nosemgrep
+    list_add_tail(&fcb->list, &callback_ctrl.filter_cb_list);
+
+    /* Check if any existing filter matches the registered name */
+    for (idx = 0; idx < NUM_PDMA_DEV_MAX; idx++) {
+        dev = &callback_ctrl.devs[idx];
+        if (!(dev->flags & NGKNET_DEV_ACTIVE) ||
+            list_empty(&dev->filt_list)) {
+            continue;
+        }
+        spin_lock_irqsave(&dev->lock, flags);
+        list_for_each(list, &dev->filt_list) {
+            fc = (struct filt_ctrl *)list;
+            if (fc &&
+                fc->filt.dest_type == NGKNET_FILTER_DEST_T_CB &&
+                fc->filt.desc[0] != '\0') {
+                if (strcmp(fc->filt.desc, desc) == 0) {
+                    fc->filter_cb = filter_cb;
+                }
+            }
+        }
+        spin_unlock_irqrestore(&dev->lock, flags);
+    }
+    return 0;
+}
+
 int
 ngknet_filter_cb_unregister(ngknet_filter_cb_f filter_cb)
 {
-    if (filter_cb == NULL || callback_ctrl.filter_cb != filter_cb) {
+    struct ngknet_dev *dev;
+    struct list_head *list, *list2;
+    struct filt_ctrl *fc = NULL;
+    filter_cb_t *fcb;
+    unsigned long flags;
+    int found = 0, idx;
+
+    if (filter_cb == NULL) {
         return -1;
     }
-    callback_ctrl.filter_cb = NULL;
 
+    /* Check if the any existing filter-specific callback matches */
+
+    /* Remove from list */
+    list_for_each_safe(list, list2, &callback_ctrl.filter_cb_list) {
+        fcb = list_entry(list, filter_cb_t, list);
+        if (fcb->cb == filter_cb) {
+            found = 1;
+            list_del(&fcb->list);
+            kfree(fcb);
+            break;
+        }
+    }
+    /* Check if the callback is set to filters */
+    if (found) {
+        for (idx = 0; idx < NUM_PDMA_DEV_MAX; idx++) {
+            dev = &callback_ctrl.devs[idx];
+            if (!(dev->flags & NGKNET_DEV_ACTIVE) ||
+                list_empty(&dev->filt_list)) {
+                continue;
+            }
+            spin_lock_irqsave(&dev->lock, flags);
+            list_for_each(list, &dev->filt_list) {
+                fc = (struct filt_ctrl *)list;
+                if (fc &&
+                    fc->filt.dest_type == NGKNET_FILTER_DEST_T_CB &&
+                    fc->filter_cb == filter_cb) {
+                    fc->filter_cb = NULL;
+                }
+            }
+            spin_unlock_irqrestore(&dev->lock, flags);
+        }
+    }
+
+    if (!found && filter_cb != callback_ctrl.filter_cb) {
+        return -1;
+    }
+    if (!found || filter_cb == callback_ctrl.filter_cb) {
+        callback_ctrl.filter_cb = NULL;
+    }
     return 0;
 }
 
@@ -329,6 +524,29 @@ ngknet_ptp_dev_ctrl_cb_unregister(ngknet_ptp_dev_ctrl_cb_f ptp_dev_ctrl_cb)
     return 0;
 }
 
+int
+ngknet_ptp_rx_pre_process_cb_register(ngknet_ptp_rx_pre_process_cb_f ptp_rx_pre_process_cb)
+{
+    if (callback_ctrl.ptp_rx_pre_process_cb != NULL) {
+        return -1;
+    }
+    callback_ctrl.ptp_rx_pre_process_cb = ptp_rx_pre_process_cb;
+
+    return 0;
+}
+
+int
+ngknet_ptp_rx_pre_process_cb_unregister(ngknet_ptp_rx_pre_process_cb_f ptp_rx_pre_process_cb)
+{
+    if (ptp_rx_pre_process_cb == NULL ||
+        callback_ctrl.ptp_rx_pre_process_cb != ptp_rx_pre_process_cb) {
+        return -1;
+    }
+    callback_ctrl.ptp_rx_pre_process_cb = NULL;
+
+    return 0;
+}
+
 EXPORT_SYMBOL(ngknet_dev_init_cb_register);
 EXPORT_SYMBOL(ngknet_dev_init_cb_unregister);
 EXPORT_SYMBOL(ngknet_rx_cb_register);
@@ -340,6 +558,7 @@ EXPORT_SYMBOL(ngknet_netif_create_cb_unregister);
 EXPORT_SYMBOL(ngknet_netif_destroy_cb_register);
 EXPORT_SYMBOL(ngknet_netif_destroy_cb_unregister);
 EXPORT_SYMBOL(ngknet_filter_cb_register);
+EXPORT_SYMBOL(ngknet_filter_cb_register_by_name);
 EXPORT_SYMBOL(ngknet_filter_cb_unregister);
 EXPORT_SYMBOL(ngknet_ptp_rx_config_set_cb_register);
 EXPORT_SYMBOL(ngknet_ptp_rx_config_set_cb_unregister);
@@ -355,4 +574,6 @@ EXPORT_SYMBOL(ngknet_ptp_phc_index_get_cb_register);
 EXPORT_SYMBOL(ngknet_ptp_phc_index_get_cb_unregister);
 EXPORT_SYMBOL(ngknet_ptp_dev_ctrl_cb_register);
 EXPORT_SYMBOL(ngknet_ptp_dev_ctrl_cb_unregister);
+EXPORT_SYMBOL(ngknet_ptp_rx_pre_process_cb_register);
+EXPORT_SYMBOL(ngknet_ptp_rx_pre_process_cb_unregister);
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_callback.h b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_callback.h
index c330c1068..b0d16c891 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_callback.h
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_callback.h
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -25,6 +25,24 @@
 
 #include <lkm/ngknet_kapi.h>
 
+typedef struct netif_cb_s {
+    /*! List head */
+    struct list_head list;
+
+    /*! Handle Netif creation or destruction */
+    ngknet_netif_cb_f cb;
+} netif_cb_t;
+
+typedef struct filter_cb_s {
+    /*! List head */
+    struct list_head list;
+
+    char desc[NGKNET_FILTER_DESC_MAX];
+
+    /*! Handle Filter callback */
+    ngknet_filter_cb_f cb;
+} filter_cb_t;
+
 /*!
  * \brief NGKNET callback control.
  */
@@ -38,11 +56,14 @@ struct ngknet_callback_ctrl {
     /*! Handle Tx packet */
     ngknet_tx_cb_f tx_cb;
 
-    /*! Handle Netif creation */
-    ngknet_netif_cb_f netif_create_cb;
+    /*! Netif creation list */
+    struct list_head netif_create_cb_list;
 
-    /*! Handle Netif destruction */
-    ngknet_netif_cb_f netif_destroy_cb;
+    /*! Netif destruction list */
+    struct list_head netif_destroy_cb_list;
+
+    /*! Filter callback list */
+    struct list_head filter_cb_list;
 
     /*! Handle filter callback */
     ngknet_filter_cb_f filter_cb;
@@ -67,8 +88,29 @@ struct ngknet_callback_ctrl {
 
     /*! PTP device control */
     ngknet_ptp_dev_ctrl_cb_f ptp_dev_ctrl_cb;
+
+    /*! PTP Rx pre processing */
+    ngknet_ptp_rx_pre_process_cb_f ptp_rx_pre_process_cb;
+
+    /*! Devices */
+    struct ngknet_dev *devs;
 };
 
+/*!
+ * \brief Initialize callback control.
+ *
+ * \param [in] devs Devices array.
+ */
+extern void
+ngknet_callback_init(struct ngknet_dev *devs);
+
+/*!
+ * \brief Cleanup callback control.
+ *
+ */
+extern void
+ngknet_callback_cleanup(void);
+
 /*!
  * \brief Get callback control.
  *
@@ -80,4 +122,3 @@ extern int
 ngknet_callback_control_get(struct ngknet_callback_ctrl **cbc);
 
 #endif /* NGKNET_CALLBACK_H */
-
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_dep.h b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_dep.h
index 6292494bc..c52dbd7e4 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_dep.h
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_dep.h
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_extra.c b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_extra.c
index 3bf2dbfdc..92df52a37 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_extra.c
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_extra.c
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -45,10 +45,12 @@
 #include <linux/time.h>
 
 #include <lkm/ngknet_dev.h>
+#include <lkm/ngknet_kapi.h>
 #include <bcmcnet/bcmcnet_core.h>
 #include "ngknet_main.h"
 #include "ngknet_extra.h"
 #include "ngknet_callback.h"
+#include "ngknet_ptp.h"
 
 /*! Defalut Rx tick for Rx rate limit control. */
 #define NGKNET_EXTRA_RATE_LIMIT_DEFAULT_RX_TICK 10
@@ -61,6 +63,7 @@ ngknet_filter_create(struct ngknet_dev *dev, ngknet_filter_t *filter)
     struct filt_ctrl *fc = NULL;
     struct list_head *list = NULL;
     ngknet_filter_t *filt = NULL;
+    filter_cb_t *filter_cb;
     unsigned long flags;
     int num, id, done = 0;
 
@@ -107,6 +110,18 @@ ngknet_filter_create(struct ngknet_dev *dev, ngknet_filter_t *filter)
     memcpy(&fc->filt, filter, sizeof(fc->filt));
     fc->filt.id = id;
 
+    /* Check for filter-specific callback */
+    if (filter->dest_type == NGKNET_FILTER_DEST_T_CB &&
+        filter->desc[0] != '\0') {
+        list_for_each(list, &dev->cbc->filter_cb_list) {
+            filter_cb = list_entry(list, filter_cb_t, list);
+            if (strcmp(filter->desc, filter_cb->desc) == 0) {
+                fc->filter_cb = filter_cb->cb;
+                break;
+            }
+        }
+    }
+
     list_for_each(list, &dev->filt_list) {
         filt = &((struct filt_ctrl *)list)->filt;
         if (filt->flags & NGKNET_FILTER_F_MATCH_CHAN) {
@@ -248,22 +263,26 @@ ngknet_filter_get_next(struct ngknet_dev *dev, ngknet_filter_t *filter)
 }
 
 int
-ngknet_rx_pkt_filter(struct ngknet_dev *dev, struct sk_buff *skb, struct net_device **ndev,
-                     struct net_device **mndev, struct sk_buff **mskb)
+ngknet_rx_pkt_filter(struct ngknet_dev *dev,
+                     struct sk_buff **oskb, struct net_device **ndev,
+                     struct sk_buff **mskb, struct net_device **mndev)
 {
-    struct pkt_buf *pkb = (struct pkt_buf *)skb->data;
+    struct sk_buff *skb = *oskb, *mirror_skb = NULL;
     struct net_device *dest_ndev = NULL, *mirror_ndev = NULL;
-    struct sk_buff *mirror_skb = NULL;
     struct ngknet_private *priv = NULL;
     struct filt_ctrl *fc = NULL;
     struct list_head *list = NULL;
-    ngknet_filter_t scratch, *filt = NULL, *filt_cb = NULL;
+    ngknet_filter_t scratch, *filt = NULL;
+    struct pkt_buf *pkb = (struct pkt_buf *)skb->data;
     uint8_t *oob = &pkb->data, *data = NULL;
     uint16_t tpid;
     unsigned long flags;
     int wsize;
     int chan_id;
-    int rv, idx, match = 0,match_cb = 0;
+    int rv, idx, match = 0;
+    int eth_offset = 0;
+    int cust_hdr_len = 0;
+    ngknet_filter_cb_f filter_cb;
 
     rv = bcmcnet_pdma_dev_queue_to_chan(&dev->pdma_dev, pkb->pkh.queue_id,
                                         PDMA_Q_RX, &chan_id);
@@ -285,7 +304,7 @@ ngknet_rx_pkt_filter(struct ngknet_dev *dev, struct sk_buff *skb, struct net_dev
 
     if (list_empty(&dev->filt_list)) {
         spin_unlock_irqrestore(&dev->lock, flags);
-        return SHR_E_NONE;
+        return SHR_E_NO_HANDLER;
     }
 
     list_for_each(list, &dev->filt_list) {
@@ -311,11 +330,6 @@ ngknet_rx_pkt_filter(struct ngknet_dev *dev, struct sk_buff *skb, struct net_dev
             }
         }
         if (idx == wsize) {
-            if (NGKNET_FILTER_DEST_T_CB == filt->dest_type) {
-                match_cb = 1;
-                filt_cb = filt;
-                continue;
-            }
             match = 1;
             break;
         }
@@ -326,7 +340,8 @@ ngknet_rx_pkt_filter(struct ngknet_dev *dev, struct sk_buff *skb, struct net_dev
         if (filt->dest_type == NGKNET_FILTER_DEST_T_CB) {
             struct ngknet_callback_desc *cbd = NGKNET_SKB_CB(skb);
             struct pkt_hdr *pkh = (struct pkt_hdr *)skb->data;
-            if (!dev->cbc->filter_cb) {
+            filter_cb = fc->filter_cb ? fc->filter_cb : dev->cbc->filter_cb;
+            if (!filter_cb) {
                 spin_unlock_irqrestore(&dev->lock, flags);
                 return SHR_E_UNAVAIL;
             }
@@ -335,10 +350,19 @@ ngknet_rx_pkt_filter(struct ngknet_dev *dev, struct sk_buff *skb, struct net_dev
             cbd->pmd_len = pkh->meta_len;
             cbd->pkt_len = pkh->data_len;
             cbd->filt = filt;
-            skb = dev->cbc->filter_cb(skb, &filt);
-            if (!skb || !filt) {
+            skb = filter_cb(skb, &filt);
+            if (!skb) {
+                *oskb = NULL;
                 spin_unlock_irqrestore(&dev->lock, flags);
-                return SHR_E_UNAVAIL;
+                return SHR_E_NONE;
+            }
+            if (skb != *oskb) {
+                *oskb = skb;
+                pkb = (struct pkt_buf *)skb->data;
+            }
+            if (!filt) {
+                spin_unlock_irqrestore(&dev->lock, flags);
+                return SHR_E_NO_HANDLER;
             }
         }
         switch (filt->dest_type) {
@@ -361,40 +385,41 @@ ngknet_rx_pkt_filter(struct ngknet_dev *dev, struct sk_buff *skb, struct net_dev
         case NGKNET_FILTER_DEST_T_VNET:
             pkb->pkh.attrs |= PDMA_RX_TO_VNET;
             spin_unlock_irqrestore(&dev->lock, flags);
-            return SHR_E_NO_HANDLER;
+            return SHR_E_NONE;
         case NGKNET_FILTER_DEST_T_NULL:
         default:
             spin_unlock_irqrestore(&dev->lock, flags);
-            return SHR_E_UNAVAIL;
+            return SHR_E_NO_HANDLER;
         }
     }
 
     spin_unlock_irqrestore(&dev->lock, flags);
 
     if (!dest_ndev) {
-        return SHR_E_NONE;
+        return SHR_E_NO_HANDLER;
     } else {
         *ndev = dest_ndev;
     }
 
+    /* PTP Rx Pre processing */
+    if (priv->hwts_rx_filter) {
+        ngknet_ptp_rx_pre_process(dest_ndev, skb, &cust_hdr_len);
+    }
+
     if (filt->flags & NGKNET_FILTER_F_STRIP_TAG) {
         pkb->pkh.attrs |= PDMA_RX_STRIP_TAG;
-        data = skb->data + PKT_HDR_SIZE + pkb->pkh.meta_len;
+        eth_offset = PKT_HDR_SIZE + pkb->pkh.meta_len + cust_hdr_len;
+        data = skb->data + eth_offset;
         tpid = data[12] << 8 | data[13];
         if (tpid == ETH_P_8021Q || tpid == ETH_P_8021AD) {
             pkb->pkh.data_len -= VLAN_HLEN;
-            memmove(skb->data + VLAN_HLEN, skb->data,
-                    PKT_HDR_SIZE + pkb->pkh.meta_len + 2 * ETH_ALEN);
+            memmove(skb->data + VLAN_HLEN, skb->data, eth_offset + 2 * ETH_ALEN);
             skb_pull(skb, VLAN_HLEN);
         }
     }
 
     if (dev->cbc->rx_cb) {
         NGKNET_SKB_CB(skb)->filt = filt;
-        /* Add callback filter if matched */
-        if (priv) {
-            priv->filt_cb = match_cb? filt_cb : NULL;
-        }
     }
 
     if (filt->mirror_type == NGKNET_FILTER_DEST_T_NETIF) {
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_extra.h b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_extra.h
index 1dbeb8094..fdbc0c381 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_extra.h
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_extra.h
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -23,6 +23,8 @@
 #ifndef NGKNET_EXTRA_H
 #define NGKNET_EXTRA_H
 
+#include <lkm/ngknet_kapi.h>
+
 /*!
  * \brief Filter control.
  */
@@ -38,6 +40,9 @@ struct filt_ctrl {
 
     /*! Filter description */
     ngknet_filter_t filt;
+
+    /*! Filter callback */
+    ngknet_filter_cb_f filter_cb;
 };
 
 /*!
@@ -104,16 +109,18 @@ ngknet_filter_get_next(struct ngknet_dev *dev, ngknet_filter_t *filter);
  * \brief Filter packet.
  *
  * \param [in] dev Device structure point.
- * \param [in] skb Rx packet SKB.
- * \param [out] mndev Mirror network interface.
- * \param [out] mskb Mirror Rx packet SKB.
+ * \param [in] oskb Rx packet SKB.
+ * \param [out] ndev Network interface.
+ * \param [out] mskb Mirrored Rx packet SKB.
+ * \param [out] mndev Mirrored network interface.
  *
  * \retval Matched network interface.
  * \retval NULL No matched network interface.
  */
 extern int
-ngknet_rx_pkt_filter(struct ngknet_dev *dev, struct sk_buff *skb, struct net_device **ndev,
-                     struct net_device **mndev, struct sk_buff **mskb);
+ngknet_rx_pkt_filter(struct ngknet_dev *dev,
+                     struct sk_buff **oskb, struct net_device **ndev,
+                     struct sk_buff **mskb, struct net_device **mndev);
 
 /*!
  * \brief Rx rate limit control.
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_linux.c b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_linux.c
index 56d3f2371..b3fcaec24 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_linux.c
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_linux.c
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_linux.h b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_linux.h
index 14475167d..cc1400141 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_linux.h
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_linux.h
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -34,7 +34,6 @@
 
 #define MODULE_PARAM(n, t, p)   module_param(n, t, p)
 
-
 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(4,6,0))
 #define NGKNET_ETHTOOL_LINK_SETTINGS 1
 #else
@@ -186,16 +185,6 @@ kal_copy_to_user(void __user *to, const void *from,
     return copy_to_user(to, from, len);
 }
 
-static inline int
-kal_support_paged_skb(void)
-{
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,4,0)
-    return 1;
-#else
-    return 0;
-#endif
-}
-
 /*!
  * System abstraction
  */
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_main.c b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_main.c
index 040466751..a19fbb258 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_main.c
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_main.c
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -93,6 +93,26 @@
 #include "ngknet_callback.h"
 #include "ngknet_ptp.h"
 
+/* FIXME: SAI_FIXUP */
+#if SAI_FIXUP && KNET_SVTAG_HOTFIX  /* SONIC-76482 */
+#define NGKNET_IOC_SVTAG_SET            (SIOCDEVPRIVATE + 0)
+#define NGKNET_IOC_SVTAG_MAGIC          0x53565447 /* "SVTG" */
+#define NGKNET_NETIF_F_DEL_SVTAG        (1U << 15) /* Remove SVTAG from the RX packets */
+#define NGKNET_NETIF_F_ADD_SVTAG        (1U << 14) /* Insert SVTAG into the TX packets */
+
+/* Enum to define SVTAG packet type */
+#define NGKNET_SVTAG_PKTYPE_NONMACSEC   0  /* Unsecure data packet (Untag Control Port packet) */
+#define NGKNET_SVTAG_PKTYPE_MACSEC      1  /* Secure data packet (Tag Controlled Port packet) */
+#define NGKNET_SVTAG_PKTYPE_KAY         2  /* KaY Frame (KaY Uncontrolled Port packet) */
+
+/* Struct for SVTAG ioctl */
+struct ifru_svtag {
+    uint32_t magic;
+    uint32_t flags;
+    uint8_t svtag[4];
+};
+#endif
+
 /*! \cond */
 MODULE_AUTHOR("Broadcom Corporation");
 MODULE_DESCRIPTION("Network Device Driver Module");
@@ -124,42 +144,42 @@ MODULE_PARM_DESC(mac_addr,
 static int default_mtu = 1500;
 MODULE_PARAM(default_mtu, int, 0);
 MODULE_PARM_DESC(default_mtu,
-"Default MTU for NGKNET network interfaces (default 1500)");
+"MTU size for KNET network interfaces (default 1500)");
 /*! \endcond */
 
 /*! \cond */
 static int rx_buffer_size = RX_BUF_SIZE_DFLT;
 MODULE_PARAM(rx_buffer_size, int, 0);
 MODULE_PARM_DESC(rx_buffer_size,
-"Default size of RX packet buffers (default 9216)");
+"RX packet buffer size in bytes (default 9216)");
 /*! \endcond */
 
 /*! \cond */
 static int rx_rate_limit = -1;
 MODULE_PARAM(rx_rate_limit, int, 0);
 MODULE_PARM_DESC(rx_rate_limit,
-"Rx rate limit (pps, default -1 no limit)");
+"Rx rate limit in packets per second (default -1 for no limit)");
 /*! \endcond */
 
 /*! \cond */
 static int tx_polling = 0;
 MODULE_PARAM(tx_polling, int, 0);
 MODULE_PARM_DESC(tx_polling,
-"Tx polling mode (default 0 in interrupt mode)");
+"Enable Tx poll mode (default 0 for interrupt mode)");
 /*! \endcond */
 
 /*! \cond */
 static int rx_batching = 0;
 MODULE_PARAM(rx_batching, int, 0);
 MODULE_PARM_DESC(rx_batching,
-"Rx batching mode (default 0 in single fill mode)");
+"Enable Rx batch fill mode (default 0 for single fill mode)");
 /*! \endcond */
 
 /*! \cond */
-static int page_buffer_mode = -1;
+static int page_buffer_mode = 0;
 MODULE_PARAM(page_buffer_mode, int, 0);
-MODULE_PARM_DESC(rx_batching,
-"Page buffer mode (default -1 do not override, 0 forced disable, 1 forced enable)");
+MODULE_PARM_DESC(page_buffer_mode,
+"Enable SKB page buffer mode (default 0 for legacy SKB mode)");
 /*! \endcond */
 
 typedef int (*drv_ops_attach)(struct pdma_dev *dev);
@@ -347,11 +367,6 @@ ngknet_rx_frame_process(struct net_device *ndev, struct sk_buff **oskb)
     struct pkt_hdr *pkh = (struct pkt_hdr *)skb->data;
     uint8_t meta_len = pkh->meta_len;
 
-    /* Do Rx timestamping */
-    if (priv->hwts_rx_filter) {
-        ngknet_ptp_rx_hwts_set(ndev, skb);
-    }
-
     /* Remove FCS from packet length */
     skb_trim(skb, skb->len - ETH_FCS_LEN);
     pkh->data_len -= ETH_FCS_LEN;
@@ -380,14 +395,29 @@ ngknet_rx_frame_process(struct net_device *ndev, struct sk_buff **oskb)
         skb_pull(skb, PKT_HDR_SIZE + meta_len);
     }
 
-    /* Check to ensure ngknet_callback_desc struct fits in sk_buff->cb */
+    /* Do Rx timestamping */
+    if (priv->hwts_rx_filter) {
+        ngknet_ptp_rx_hwts_set(ndev, skb);
+    }
+
+      /* Check to ensure ngknet_callback_desc struct fits in sk_buff->cb */
     BUILD_BUG_ON(sizeof(struct ngknet_callback_desc) > sizeof(skb->cb));
+#if SAI_FIXUP && KNET_SVTAG_HOTFIX /* SONIC-76482 */
+    /* Strip SVTAG from the packets injected by the MACSEC block */
+    if (priv->netif.flags & NGKNET_NETIF_F_DEL_SVTAG) {
+        /* Strip SVTAG (4 bytes) */
+        memmove(skb->data + 4, skb->data, 12);
+        skb_pull(skb, 4);
+    }
+#endif
 
     /* Optional callback handle */
     if (dev->cbc->rx_cb) {
         struct ngknet_callback_desc *cbd = NGKNET_SKB_CB(skb);
         cbd->dinfo = &dev->dev_info;
         cbd->netif = &priv->netif;
+        cbd->net_dev = priv->net_dev;
+
         if (priv->netif.flags & NGKNET_NETIF_F_RCPU_ENCAP) {
             cbd->pmd = skb->data + PKT_HDR_SIZE;
             cbd->pkt_len = ntohs(rch->data_len);
@@ -396,7 +426,7 @@ ngknet_rx_frame_process(struct net_device *ndev, struct sk_buff **oskb)
             cbd->pkt_len = pkh->data_len;
         }
         cbd->pmd_len = meta_len;
-        skb = dev->cbc->rx_cb(ndev, skb);
+        skb = dev->cbc->rx_cb(skb);
         if (!skb) {
             *oskb = NULL;
             return SHR_E_UNAVAIL;
@@ -429,19 +459,17 @@ ngknet_netif_recv(struct net_device *ndev, struct sk_buff *skb)
 {
     struct ngknet_private *priv = netdev_priv(ndev);
     struct ngknet_dev *dev = priv->bkn_dev;
-    struct pdma_dev *pdev = &dev->pdma_dev;
     struct pkt_hdr *pkh = (struct pkt_hdr *)skb->data;
-    struct napi_struct *napi = NULL;
     uint16_t proto;
-    int chan_id, gi, qi, skb_len;
     int rv;
 
     /* Handle one incoming packet */
     rv = ngknet_rx_frame_process(ndev, &skb);
+    if (!skb) {
+        return SHR_E_NONE;
+    }
     if (SHR_FAILURE(rv)) {
-        if (!skb) {
-            return SHR_E_NONE;
-        }
+        return rv;
     }
 
     DBG_VERB(("Rx packet sent up to ndev%d (%d bytes).\n",
@@ -468,26 +496,11 @@ ngknet_netif_recv(struct net_device *ndev, struct sk_buff *skb)
 
     skb_record_rx_queue(skb, pkh->queue_id);
 
-    rv = bcmcnet_pdma_dev_queue_to_chan(pdev, pkh->queue_id, PDMA_Q_RX, &chan_id);
-    if (SHR_FAILURE(rv)) {
-        return rv;
-    }
-
-    gi = chan_id / pdev->grp_queues;
-    if (pdev->flags & PDMA_GROUP_INTR) {
-        napi = (struct napi_struct *)pdev->ctrl.grp[gi].intr_hdl[0].priv;
-    } else {
-        qi = pkh->queue_id;
-        napi = (struct napi_struct *)pdev->ctrl.grp[gi].intr_hdl[qi].priv;
-    }
-
-   /* FIXME: File CSP on KASAN warning on use-after-free in ngknet_netif_recv */
-    skb_len = skb->len;
-    napi_gro_receive(napi, skb);
     /* Update accounting */
     priv->stats.rx_packets++;
-    priv->stats.rx_bytes += skb_len;
+    priv->stats.rx_bytes += skb->len;
 
+    netif_receive_skb(skb);
 
     /* Rate limit */
     if (rx_rate_limit >= 0) {
@@ -529,9 +542,15 @@ ngknet_frame_recv(struct pdma_dev *pdev, int queue, void *buf)
     DBG_NDEV(("Valid virtual network devices: %ld.\n", (long)dev->vdev[0]));
 
     /* Go through the filters */
-    rv = ngknet_rx_pkt_filter(dev, skb, &ndev, &mndev, &mskb);
-    if (SHR_FAILURE(rv) || !ndev) {
-        return SHR_E_FAIL;
+    rv = ngknet_rx_pkt_filter(dev, &skb, &ndev, &mskb, &mndev);
+    if (!skb) {
+        return SHR_E_NONE;
+    }
+    if (SHR_FAILURE(rv)) {
+        dev_kfree_skb_any(skb);
+        return SHR_E_NONE;
+    } else if (!ndev) {
+        return SHR_E_NO_HANDLER;
     }
 
     /* Populate header, checksum status, VLAN, and protocol */
@@ -539,7 +558,7 @@ ngknet_frame_recv(struct pdma_dev *pdev, int queue, void *buf)
     if (!netif_carrier_ok(ndev) ||
         SHR_FAILURE(ngknet_netif_recv(ndev, skb))) {
         priv->stats.rx_dropped++;
-        rv = SHR_E_UNAVAIL;
+        dev_kfree_skb_any(skb);
     }
 
     spin_lock_irqsave(&dev->lock, flags);
@@ -623,6 +642,7 @@ ngknet_ptp_tx_config(struct net_device *ndev, struct sk_buff *skb)
 {
     struct ngknet_private *priv = netdev_priv(ndev);
     struct ngknet_dev *dev = priv->bkn_dev;
+    uint64_t *tx_ts = (uint64_t *)skb->cb;
     int rv;
 
     if (priv->netif.type == NGKNET_NETIF_T_PORT) {
@@ -634,6 +654,16 @@ ngknet_ptp_tx_config(struct net_device *ndev, struct sk_buff *skb)
         return SHR_E_UNAVAIL;
     }
 
+    /* For 1step meta_set will populate the TX timestamp for
+     * the required PTP packets (i.e. DELAY_REQ), only in such
+     * case we should schedule ptp_tx_work for the TX timestamp
+     * to be sent back on the socket.
+     */
+    if (priv->hwts_tx_type == HWTSTAMP_TX_ONESTEP_SYNC &&
+        *tx_ts == 0) {
+        return SHR_E_NONE;
+    }
+
     skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
 
     if (priv->hwts_tx_type == HWTSTAMP_TX_ONESTEP_SYNC) {
@@ -731,6 +761,7 @@ ngknet_tx_frame_process(struct net_device *ndev, struct sk_buff **oskb)
                 return SHR_E_MEMORY;
             }
             skb_shinfo(nskb)->tx_flags = skb_shinfo(skb)->tx_flags;
+            nskb->sk = skb->sk;
             skb = nskb;
         }
         skb_push(skb, PKT_HDR_SIZE + meta_len);
@@ -771,6 +802,7 @@ ngknet_tx_frame_process(struct net_device *ndev, struct sk_buff **oskb)
                 return SHR_E_MEMORY;
             }
             skb_shinfo(nskb)->tx_flags = skb_shinfo(skb)->tx_flags;
+            nskb->sk = skb->sk;
             skb = nskb;
         }
         skb_push(skb, VLAN_HLEN);
@@ -785,6 +817,45 @@ ngknet_tx_frame_process(struct net_device *ndev, struct sk_buff **oskb)
         tag_len = VLAN_HLEN;
     }
 
+#if SAI_FIXUP && KNET_SVTAG_HOTFIX /* SONIC-76482 */
+    /* XGS MACSEC: Add SVTAG (Secure Vlan TAG) */
+    if (priv->netif.flags & NGKNET_NETIF_F_ADD_SVTAG) {
+        uint16_t ether_type = 0;
+        static const uint16_t mgmt_et = 0x888e;
+        static const uint8_t mgmt_dst[] = {0x01, 0x80, 0xc2, 0x00, 0x00, 0x03};
+
+        copy_len = PKT_HDR_SIZE + pkh->meta_len + 2 * ETH_ALEN;
+        if (skb_header_cloned(skb) || skb_headroom(skb) < VLAN_HLEN) {
+            nskb = skb_copy_expand(skb, VLAN_HLEN, 0, GFP_ATOMIC);
+            if (!nskb) {
+                return SHR_E_MEMORY;
+            }
+            skb_shinfo(nskb)->tx_flags = skb_shinfo(skb)->tx_flags;
+            nskb->sk = skb->sk;
+            skb = nskb;
+        }
+        skb_push(skb, VLAN_HLEN);
+        memmove(skb->data, skb->data + VLAN_HLEN, copy_len);
+        pkh = (struct pkt_hdr *)skb->data;
+        data = skb->data + PKT_HDR_SIZE + pkh->meta_len;
+        ether_type = ((uint8_t)data[16] << 8) | (uint8_t)data[17];
+        data[12] = priv->svtag[0];
+        data[13] = priv->svtag[1];
+        if (mgmt_et == ether_type && !memcmp(mgmt_dst, data, 6)) {
+            if (priv->svtag[2])
+                data[14] = NGKNET_SVTAG_PKTYPE_KAY << 2;
+            else
+                data[14] = NGKNET_SVTAG_PKTYPE_NONMACSEC << 2;
+        } else {
+            data[14] = priv->svtag[2]; /* secured if configured */
+        }
+        data[15] = priv->svtag[3];
+        pkh->data_len += VLAN_HLEN;
+        tag_len += VLAN_HLEN;
+        printk(KERN_DEBUG "ether_type: %04x, pktype %d, subport %d\n", ether_type, (data[14] >> 2) & 0xf, data[15]);
+    }
+#endif
+
     /* Optional callback handle */
     if (dev->cbc->tx_cb) {
         struct ngknet_callback_desc *cbd = NGKNET_SKB_CB(skb);
@@ -965,28 +1036,30 @@ ngknet_poll(struct napi_struct *napi, int budget)
 
     DBG_NAPI(("Scheduled NAPI on queue %d.\n", hdl->queue));
 
-    kih->napi_resched = 0;
     kih->napi_pending = 0;
 
     if (pdev->flags & PDMA_GROUP_INTR) {
         work_done = bcmcnet_group_poll(pdev, hdl->group, budget);
     } else {
+        if (!kih->napi_resched) {
+            bcmcnet_queue_intr_ack(pdev, hdl);
+        }
         work_done = bcmcnet_queue_poll(pdev, hdl, budget);
     }
 
     if (work_done < budget) {
+        kih->napi_resched = 0;
         napi_complete(napi);
         if (kih->napi_pending && napi_schedule_prep(napi)) {
+            kih->napi_resched = 1;
             __napi_schedule(napi);
             return work_done;
         }
         spin_lock_irqsave(&dev->lock, flags);
-        if (!kih->napi_resched) {
-            if (pdev->flags & PDMA_GROUP_INTR) {
-                bcmcnet_group_intr_enable(pdev, hdl->group);
-            } else {
-                bcmcnet_queue_intr_enable(pdev, hdl);
-            }
+        if (pdev->flags & PDMA_GROUP_INTR) {
+            bcmcnet_group_intr_enable(pdev, hdl->group);
+        } else {
+            bcmcnet_queue_intr_enable(pdev, hdl);
         }
         spin_unlock_irqrestore(&dev->lock, flags);
     }
@@ -1004,6 +1077,7 @@ ngknet_isr(void *isr_data)
     struct pdma_dev *pdev = &dev->pdma_dev;
     struct intr_handle *hdl = NULL;
     struct napi_struct *napi = NULL;
+    unsigned long bm_queue;
     unsigned long flags;
     int gi, qi;
     int iv = 0;
@@ -1012,7 +1086,11 @@ ngknet_isr(void *isr_data)
         if (!pdev->ctrl.grp[gi].attached) {
             continue;
         }
+        bm_queue = pdev->ctrl.grp[gi].bm_rxq | pdev->ctrl.grp[gi].bm_txq;
         for (qi = 0; qi < pdev->grp_queues; qi++) {
+            if (!(pdev->flags & PDMA_GROUP_INTR) && !(1 << qi & bm_queue)) {
+                continue;
+            }
             hdl = &pdev->ctrl.grp[gi].intr_hdl[qi];
             if (pdev->flags & PDMA_GROUP_INTR) {
                 if (!bcmcnet_group_intr_check(pdev, gi)) {
@@ -1056,26 +1134,27 @@ ngknet_isr(void *isr_data)
 static void
 ngknet_dev_hnet_work(struct pdma_dev *pdev)
 {
-    struct ngknet_dev *dev = (struct ngknet_dev *)pdev->priv;
     struct intr_handle *hdl = NULL;
     struct napi_struct *napi = NULL;
     struct ngknet_intr_handle *kih = NULL;
-    unsigned long flags;
+    unsigned long bm_queue;
     int gi, qi;
 
     for (gi = 0; gi < pdev->num_groups; gi++) {
         if (!pdev->ctrl.grp[gi].attached) {
             continue;
         }
+        bm_queue = pdev->ctrl.grp[gi].bm_rxq | pdev->ctrl.grp[gi].bm_txq;
         for (qi = 0; qi < pdev->grp_queues; qi++) {
+            if (!(pdev->flags & PDMA_GROUP_INTR) && !(1 << qi & bm_queue)) {
+                continue;
+            }
             hdl = &pdev->ctrl.grp[gi].intr_hdl[qi];
             napi = (struct napi_struct *)hdl->priv;
             kih = (struct ngknet_intr_handle *)napi;
             kih->napi_pending = 1;
             if (napi_schedule_prep(napi)) {
-                spin_lock_irqsave(&dev->lock, flags);
                 kih->napi_resched = 1;
-                spin_unlock_irqrestore(&dev->lock, flags);
                 local_bh_disable();
                 __napi_schedule(napi);
                 local_bh_enable();
@@ -1134,8 +1213,10 @@ ngknet_dev_vnet_wake(struct pdma_dev *pdev)
 {
     struct ngknet_dev *dev = (struct ngknet_dev *)pdev->priv;
 
-    atomic_set(&dev->vnet_active, 1);
-    wake_up_interruptible(&dev->vnet_wq);
+    if (atomic_read(&dev->vnet_active) != 1) {
+        atomic_set(&dev->vnet_active, 1);
+        wake_up_interruptible(&dev->vnet_wq);
+    }
 
     return SHR_E_NONE;
 }
@@ -1463,6 +1544,20 @@ ngknet_do_ioctl(struct net_device *ndev, struct ifreq *ifr, int cmd)
     struct hwtstamp_config config;
     int rv;
 
+#if SAI_FIXUP && KNET_SVTAG_HOTFIX /* SONIC-76482 */
+    if (cmd == NGKNET_IOC_SVTAG_SET) {
+        struct ifru_svtag req;
+
+        if (copy_from_user(&req, ifr->ifr_data, sizeof(req)))
+            return -EFAULT;
+        if (ntohl(req.magic) != NGKNET_IOC_SVTAG_MAGIC)
+            return -EINVAL;
+        priv->netif.flags &= ~(NGKNET_NETIF_F_ADD_SVTAG | NGKNET_NETIF_F_DEL_SVTAG);
+        priv->netif.flags |= req.flags & (NGKNET_NETIF_F_ADD_SVTAG | NGKNET_NETIF_F_DEL_SVTAG);
+        memcpy(priv->svtag, req.svtag, 4);
+        return 0;
+    } else
+#endif
     if (cmd == SIOCSHWTSTAMP) {
         if (copy_from_user(&config, ifr->ifr_data, sizeof(config))) {
             return -EFAULT;
@@ -1692,7 +1787,7 @@ ngknet_ndev_init(ngknet_netif_t *netif, struct net_device **nd)
     ndev->ethtool_ops = &ngknet_ethtool_ops;
 
     /* Network device name */
-    if (netif->name && *netif->name) {
+    if (netif->name[0] != '\0') {
         strncpy(ndev->name, netif->name, IFNAMSIZ - 1);
     }
 
@@ -1777,7 +1872,6 @@ ngknet_pdev_init(struct ngknet_dev *dev)
     pdev->sys_p2v = ngknet_sys_p2v;
     pdev->sys_v2p = ngknet_sys_v2p;
 
-    pdev->flags |= PDMA_GROUP_INTR;
     if (tx_polling) {
         pdev->flags |= PDMA_TX_POLLING;
     }
@@ -1827,7 +1921,7 @@ ngknet_dev_info_get(int dn)
     dev->dev_info.dev_no = dn;
     strlcpy(dev->dev_info.type_str, drv_ops[dev->pdma_dev.dev_type]->drv_desc,
             sizeof(dev->dev_info.type_str));
-
+    dev->dev_info.vdev = dev->vdev;
     return SHR_E_NONE;
 }
 
@@ -2062,8 +2156,10 @@ ngknet_netif_create(struct ngknet_dev *dev, ngknet_netif_t *netif)
     struct net_device *ndev = NULL;
     struct ngknet_private *priv = NULL;
     unsigned long flags;
-    int num, id;
+    uint16_t id, num;
     int rv;
+    struct list_head *list;
+    netif_cb_t *netif_create_cb;
 
     switch (netif->type) {
     case NGKNET_NETIF_T_VLAN:
@@ -2100,20 +2196,39 @@ ngknet_netif_create(struct ngknet_dev *dev, ngknet_netif_t *netif)
     spin_lock_irqsave(&dev->lock, flags);
 
     num = (long)dev->vdev[0];
-    for (id = 1; id < num + 1; id++) {
-        if (!dev->vdev[id]) {
-            break;
+    id = netif->id;
+    if (netif->flags & NGKNET_NETIF_F_WITH_ID) {
+        if (id == 0 || id > NUM_VDEV_MAX) {
+            rv = SHR_E_PARAM;
+        } else {
+            /* ID assignment is specifed by user. */
+            if (dev->vdev[id]) {
+                DBG_WARN(("ID %d is already in use\n", id));
+                rv = SHR_E_BUSY;
+            }
+        }
+    } else {
+        /* Automatic ID assignment. */
+        for (id = 1; id < num + 1; id++) {
+            if (!dev->vdev[id]) {
+                break;
+            }
+        }
+        if (id > NUM_VDEV_MAX) {
+            rv = SHR_E_RESOURCE;
         }
     }
-    if (id > NUM_VDEV_MAX) {
+    if (SHR_FAILURE(rv)) {
         spin_unlock_irqrestore(&dev->lock, flags);
         unregister_netdev(ndev);
         free_netdev(ndev);
-        return SHR_E_RESOURCE;
+        return rv;
     }
 
     dev->vdev[id] = ndev;
-    num += id == (num + 1) ? 1 : 0;
+    if (id > num) {
+        num = id;
+    }
     dev->vdev[0] = (struct net_device *)(long)num;
 
     spin_unlock_irqrestore(&dev->lock, flags);
@@ -2133,8 +2248,9 @@ ngknet_netif_create(struct ngknet_dev *dev, ngknet_netif_t *netif)
     }
 
     /* Optional netif create callback handle */
-    if (dev->cbc->netif_create_cb) {
-        if (dev->cbc->netif_create_cb(ndev)) {
+    list_for_each(list, &dev->cbc->netif_create_cb_list) {
+        netif_create_cb = list_entry(list, netif_cb_t, list);
+        if (netif_create_cb->cb(&dev->dev_info, &priv->netif)) {
             DBG_WARN(("Network interface callback (create) failed for '%s'\n",
                       ndev->name));
         }
@@ -2153,6 +2269,8 @@ ngknet_netif_destroy(struct ngknet_dev *dev, int id)
     struct ngknet_private *priv = NULL;
     unsigned long flags;
     int num;
+    struct list_head *list;
+    netif_cb_t *netif_destroy_cb;
     DECLARE_WAITQUEUE(wait, current);
 
     if (id <= 0 || id > NUM_VDEV_MAX) {
@@ -2198,8 +2316,9 @@ ngknet_netif_destroy(struct ngknet_dev *dev, int id)
     remove_wait_queue(&dev->wq, &wait);
 
     /* Optional netif destroy callback handle */
-    if (dev->cbc->netif_destroy_cb) {
-        if (dev->cbc->netif_destroy_cb(ndev)) {
+    list_for_each(list, &dev->cbc->netif_destroy_cb_list) {
+        netif_destroy_cb = list_entry(list, netif_cb_t, list);
+        if (netif_destroy_cb->cb(&dev->dev_info, &priv->netif)) {
             DBG_WARN(("Network interface callback (destroy) failed for '%s'\n",
                       ndev->name));
         }
@@ -2426,6 +2545,10 @@ ngknet_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
         }
         pdev->rx_ph_size = dev_cfg->rx_ph_size;
         pdev->tx_ph_size = dev_cfg->tx_ph_size;
+        pdev->flags |= PDMA_GROUP_INTR;
+        if (dev_cfg->flags & NGKNET_RX_POLL_SQ) {
+            pdev->flags &= ~PDMA_GROUP_INTR;
+        }
         pdev->mode = dev_cfg->mode;
         if (pdev->mode != DEV_MODE_KNET && pdev->mode != DEV_MODE_HNET) {
             pdev->mode = DEV_MODE_KNET;
@@ -2561,8 +2684,10 @@ ngknet_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
             ioc.rc = SHR_E_UNAVAIL;
             break;
         }
-        atomic_set(&dev->hnet_active, 1);
-        wake_up_interruptible(&dev->hnet_wq);
+        if (atomic_read(&dev->hnet_active) != 1) {
+            atomic_set(&dev->hnet_active, 1);
+            wake_up_interruptible(&dev->hnet_wq);
+        }
         break;
     case NGKNET_DEV_VNET_DOCK:
         DBG_CMD(("NGKNET_DEV_VNET_DOCK\n"));
@@ -2818,6 +2943,9 @@ ngknet_init_module(void)
     /* Initialize Rx rate limit */
     ngknet_rx_rate_limit_init(ngknet_devices);
 
+    /* Initialize Callback control */
+    ngknet_callback_init(ngknet_devices);
+
     return 0;
 }
 
@@ -2826,6 +2954,9 @@ ngknet_exit_module(void)
 {
     int idx;
 
+    /* Cleanup Callback control */
+    ngknet_callback_cleanup();
+
     /* Cleanup Rx rate limit */
     ngknet_rx_rate_limit_cleanup();
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_main.h b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_main.h
index e31d4bb25..ac740a409 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_main.h
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_main.h
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -58,6 +58,10 @@
 #define DBG_RATE(_s)        do { if (debug & DBG_LVL_RATE) printk _s; } while (0)
 #define DBG_LINK(_s)        do { if (debug & DBG_LVL_LINK) printk _s; } while (0)
 
+/* FIXME: SAI_FIXUP */
+#define SAI_FIXUP           1
+#define KNET_SVTAG_HOTFIX   1
+
 /*!
  * Device description
  */
@@ -80,7 +84,7 @@ struct ngknet_dev {
     /*! PDMA device */
     struct pdma_dev pdma_dev;
 
-    /*! Virtual network devices, 0 is reserved for valid number of devices. */
+    /*! Virtual network devices, 0 is used for max ID number. */
     struct net_device *vdev[NUM_VDEV_MAX + 1];
 
     /*! Virtual network devices bound to queue */
@@ -166,8 +170,10 @@ struct ngknet_private {
     /* Link settings */
     struct ethtool_link_settings link_settings;
 #endif
-        /*! Matched callback filter */
-    struct ngknet_filter_s *filt_cb;
+#if SAI_FIXUP && KNET_SVTAG_HOTFIX  /* SONIC-76482 */
+    /* ! MACSEC SVTAG */
+    uint8_t svtag[4];
+#endif
 };
 
 /*!
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_procfs.c b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_procfs.c
index ad3aefe83..19b83df72 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_procfs.c
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_procfs.c
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_procfs.h b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_procfs.h
index f6df80fe7..4664f0973 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_procfs.h
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_procfs.h
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_ptp.c b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_ptp.c
index eaec51a98..e648db8c4 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_ptp.c
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_ptp.c
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -95,19 +95,11 @@ ngknet_ptp_tx_hwts_get(struct net_device *ndev, struct sk_buff *skb, uint64_t *t
 {
     struct ngknet_private *priv = netdev_priv(ndev);
     struct ngknet_dev *dev = priv->bkn_dev;
-    struct ngknet_callback_desc *cbd = NGKNET_SKB_CB(skb);
-    struct pkt_hdr *pkh = (struct pkt_hdr *)skb->data;
 
     if (!dev->cbc->ptp_tx_hwts_get_cb) {
         return SHR_E_UNAVAIL;
     }
 
-    cbd->dinfo = &dev->dev_info;
-    cbd->netif = &priv->netif;
-    cbd->pmd = skb->data + PKT_HDR_SIZE;
-    cbd->pmd_len = pkh->meta_len;
-    cbd->pkt_len = pkh->data_len;
-
     /*
      * The callback should get timestamp value for a Tx packet and return
      * by the parameter <ts>.
@@ -130,11 +122,14 @@ ngknet_ptp_tx_meta_set(struct net_device *ndev, struct sk_buff *skb)
     struct ngknet_dev *dev = priv->bkn_dev;
     struct ngknet_callback_desc *cbd = NGKNET_SKB_CB(skb);
     struct pkt_hdr *pkh = (struct pkt_hdr *)skb->data;
+    struct ngknet_ptp_data *pd = (struct ngknet_ptp_data *)priv->netif.user_data;
 
     if (!dev->cbc->ptp_tx_meta_set_cb) {
         return SHR_E_UNAVAIL;
     }
 
+    /* First 4bytes of user_data already has phy_port */
+    pd->hwts_tx_type = priv->hwts_tx_type;
     cbd->dinfo = &dev->dev_info;
     cbd->netif = &priv->netif;
     cbd->pmd = skb->data + PKT_HDR_SIZE;
@@ -187,3 +182,32 @@ ngknet_ptp_dev_ctrl(struct ngknet_dev *dev, int cmd, char *data, int len)
     return dev->cbc->ptp_dev_ctrl_cb(&dev->dev_info, cmd, data, len);
 }
 
+extern int
+ngknet_ptp_rx_pre_process(struct net_device *ndev, struct sk_buff *skb,
+                          uint32_t *cust_hdr_len)
+{
+    struct ngknet_private *priv = netdev_priv(ndev);
+    struct ngknet_dev *dev = priv->bkn_dev;
+    struct ngknet_callback_desc *cbd = NGKNET_SKB_CB(skb);
+    struct pkt_hdr *pkh = (struct pkt_hdr *)skb->data;
+
+    if (!dev->cbc->ptp_rx_pre_process_cb) {
+        return SHR_E_UNAVAIL;
+    }
+
+    cbd->dinfo = &dev->dev_info;
+    cbd->netif = &priv->netif;
+    cbd->pmd = skb->data + PKT_HDR_SIZE;
+    cbd->pmd_len = pkh->meta_len;
+    cbd->pkt_len = pkh->data_len;
+
+    /*
+     * The callback should get custom header length return by the parameter
+     * <cust_hdr_len>.
+     * Some parameters have been consolidated to SKB as above. They can be
+     * achieved by NGKNET_SKB_CB(skb). Specially more private paramters are
+     * in NGKNET_SKB_CB(skb)->dinfo or NGKNET_SKB_CB(skb)->netif->user_data
+     * such as dev_type, phys_port and so on.
+     */
+    return dev->cbc->ptp_rx_pre_process_cb(skb, cust_hdr_len);
+}
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_ptp.h b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_ptp.h
index c365a8d8d..bccbb3a99 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_ptp.h
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_ptp.h
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
@@ -107,5 +107,21 @@ ngknet_ptp_phc_index_get(struct net_device *ndev, int *index);
 extern int
 ngknet_ptp_dev_ctrl(struct ngknet_dev *dev, int cmd, char *data, int len);
 
+/*!
+ * \brief PTP Rx pre-process to get custom header length.
+ *
+ * If the RX PTP packet is timestamped by the HW and requires
+ * timestamp processing then, this function can be used
+ * to get the custom/system header length encapsulated by the FW.
+ *
+ * \param [in] dev NGKNET device structure point.
+ * \param [in] skb Rx packet SKB.
+ * \param [out] Custom header length.
+ *
+ * \retval SHR_E_NONE No errors.
+ */
+extern int
+ngknet_ptp_rx_pre_process(struct net_device *ndev, struct sk_buff *skb, uint32_t *cust_hdr_len);
+
 #endif /* NGKNET_PTP_H */
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knetcb/Kbuild b/platform/broadcom/saibcm-modules/sdklt/linux/knetcb/Kbuild
index 0469855c7..b60be7fda 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/knetcb/Kbuild
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/knetcb/Kbuild
@@ -2,7 +2,7 @@
 #
 # Linux KNET Callback module.
 #
-# $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+# $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
 # The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
 # 
 # This program is free software; you can redistribute it and/or
@@ -18,11 +18,6 @@
 # be found in the LICENSES folder.$
 #
 
-ifeq ($(BUILD_PSAMPLE),1)
-PSAMPLE_CFLAGS=-DPSAMPLE_SUPPORT
-PSAMPLE_CB_OBJS=psample-cb.o
-endif
-
 ifneq ($(OUTPUT_DIR),)
 INCLUDES := -I$(OUTPUT_DIR)/knet/generated/include -I$(OUTPUT_DIR)/knet/generated
 endif
@@ -40,9 +35,8 @@ ccflags-y := $(KNETCB_CPPFLAGS) $(LKM_CFLAGS) \
              -I$(SDK)/linux/knet \
              -I$(SDK)/linux/knet/generated/include \
              -I$(SDK)/linux/knet/generated \
-             $(INCLUDES) \
-             $(PSAMPLE_CFLAGS) \
+             $(INCLUDES)
+
 
 linux_ngknetcb-y := $(SDK_PMD_KOBJS) \
-                    ngknetcb_main.o \
-                    $(PSAMPLE_CB_OBJS) 
+                    ngknetcb_main.o
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knetcb/Makefile b/platform/broadcom/saibcm-modules/sdklt/linux/knetcb/Makefile
index b23af7ed4..704ea29a0 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/knetcb/Makefile
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/knetcb/Makefile
@@ -1,5 +1,5 @@
 #
-# $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+# $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
 # The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
 # 
 # This program is free software; you can redistribute it and/or
@@ -17,23 +17,27 @@
 # Linux KNET Callback module.
 #
 
-ifdef KPMD
+# Include PMD library by default
+ifneq (0,$(KPMD))
 
-BCMPKTDIR = $(SDK)/bcmpkt
-KPMDDIR = $(SDK)/linux/knetcb
-SHRDIR = $(SDK)/shr
+# Kernel module source directory
+KMODDIR = $(CURDIR)
 
-.PHONY: mklinks rmlinks
-
-knetcb: mklinks
-	$(MAKE) all
+# Avoid creating links in original kernel module source directory
+GENDIR = $(KMODDIR)/generated
+ifneq ($(OUTPUT_DIR),)
+GENDIR = $(OUTPUT_DIR)/knet/generated/knetcb
+endif
+knetcb: kpmd
+	$(MAKE) -C $(GENDIR) all
 
 # SDK make helper for stand-alone PMD kernel module
 include $(SDK)/make/kpmd.mk
 
-distclean:: rmlinks
+distclean::
+	rm -rf $(GENDIR)
 
-endif #KPMD
+endif # KPMD
 
 include Kbuild
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knetcb/ngknetcb_main.c b/platform/broadcom/saibcm-modules/sdklt/linux/knetcb/ngknetcb_main.c
index 0cfe939ac..704a3072a 100644
--- a/platform/broadcom/saibcm-modules/sdklt/linux/knetcb/ngknetcb_main.c
+++ b/platform/broadcom/saibcm-modules/sdklt/linux/knetcb/ngknetcb_main.c
@@ -9,7 +9,6 @@
 
 #include <lkm/lkm.h>
 #include <ngknet_callback.h>
-#include "psample-cb.h"
 #include "bcmcnet/bcmcnet_core.h"
 /*! \cond */
 MODULE_AUTHOR("Broadcom Corporation");
@@ -97,6 +96,14 @@ dev_id_get(char* dev_type)
     {
         dev_id = 0xb993;
     }
+    else if (0== strcmp(dev_type, "bcm78900_b0"))
+    {
+        dev_id = 0xf900;
+    }
+    else if (0== strcmp(dev_type, "bcm78905_a0"))
+    {
+        dev_id = 0xf905;
+    }
     return dev_id;
 }
 
@@ -134,7 +141,8 @@ get_tag_status(char* dev_type, char* dev_var, void *meta)
         match_id_minbit = (dev_id == 0xb780) ? 2 : 1;        
         outer_l2_hdr = (valptr[fd_index] >> match_id_minbit & 0xFF);
         outer_tag_match = (((dev_id == 0xb780) &&
-                           ((strncmp(dev_var, "DNA_", 4)) == 0)) ? 0x8 : 0x10);
+                           (((strncmp(dev_var, "DNA_", 4)) == 0)||
+                            ((strncmp(dev_var, "HNA_", 4)) == 0))) ? 0x8 : 0x10);
         if (outer_l2_hdr & 0x1) {
 #ifdef KNET_CB_DEBUG
             if (debug & 0x1) {
@@ -177,7 +185,8 @@ get_tag_status(char* dev_type, char* dev_var, void *meta)
         }
     }
     else if ((dev_id == 0xb990)|| (dev_id == 0xb996) || 
-             (dev_id == 0xb999)|| (dev_id == 0xb993))
+             (dev_id == 0xb999)|| (dev_id == 0xb993) ||
+             (dev_id == 0xf900)|| (dev_id == 0xf905))
     {
         fd_index = 9;
         valptr = (uint32_t *)meta;
@@ -186,8 +195,14 @@ get_tag_status(char* dev_type, char* dev_var, void *meta)
          * says there's a tag, then we don't want to strip.
          * Otherwise, we do.
          */
-        outer_l2_hdr = (valptr[fd_index] >> 13) & 3;
-
+        if ((dev_id == 0xf900) || (dev_id == 0xf905))
+        {
+            outer_l2_hdr = (valptr[fd_index]) & 1;
+        }
+        else 
+        {
+            outer_l2_hdr = (valptr[fd_index] >> 13) & 3;
+        }
         if (outer_l2_hdr)
         {
             tag_status = 2;
@@ -351,12 +366,9 @@ strip_tag_tx_cb(struct sk_buff *skb)
 }
 
 static struct sk_buff *
-ngknet_rx_cb(struct net_device *dev, struct sk_buff *skb)
+ngknet_rx_cb(struct sk_buff *skb)
 {
     skb = strip_tag_rx_cb(skb);
-#ifdef PSAMPLE_SUPPORT
-    skb = psample_rx_cb(dev, skb); 
-#endif
     return skb;
 }
 
@@ -367,26 +379,6 @@ ngknet_tx_cb(struct sk_buff *skb)
     return skb;
 }
 
-static int
-ngknet_netif_create_cb(struct net_device *dev)
-{
-    int retv = 0;
-#ifdef PSAMPLE_SUPPORT
-    retv = psample_netif_create_cb(dev); 
-#endif
-    return retv;
-}
-
-static int
-ngknet_netif_destroy_cb(struct net_device *dev)
-{
-    int retv = 0;
-#ifdef PSAMPLE_SUPPORT
-    retv = psample_netif_destroy_cb(dev); 
-#endif
-    return retv;
-}
-
 /*!
  * Generic module functions
  */
@@ -480,25 +472,12 @@ ngknetcb_init_module(void)
     ngknet_rx_cb_register(ngknet_rx_cb);
     ngknet_tx_cb_register(ngknet_tx_cb);
 
-#ifdef PSAMPLE_SUPPORT
-    psample_init();
-#endif
-
-    ngknet_netif_create_cb_register(ngknet_netif_create_cb);
-    ngknet_netif_destroy_cb_register(ngknet_netif_destroy_cb);
     return 0;
 }
 
 static void __exit
 ngknetcb_exit_module(void)
 {
-    ngknet_netif_create_cb_unregister(ngknet_netif_create_cb);
-    ngknet_netif_destroy_cb_unregister(ngknet_netif_destroy_cb);
-
-#ifdef PSAMPLE_SUPPORT
-    psample_cleanup();
-#endif
-
     ngknet_rx_cb_unregister(ngknet_rx_cb);
     ngknet_tx_cb_unregister(ngknet_tx_cb);
 
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knetcb/psample-cb.c b/platform/broadcom/saibcm-modules/sdklt/linux/knetcb/psample-cb.c
deleted file mode 100755
index bdd116434..000000000
--- a/platform/broadcom/saibcm-modules/sdklt/linux/knetcb/psample-cb.c
+++ /dev/null
@@ -1,974 +0,0 @@
-/*
- * Copyright 2017-2022 Broadcom
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License, version 2, as
- * published by the Free Software Foundation (the "GPL").
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License version 2 (GPLv2) for more details.
- *
- * You should have received a copy of the GNU General Public License
- * version 2 (GPLv2) along with this source code.
- */
-/*
- * $Id: psample_cb.c $
- * $Copyright: (c) 2019 Broadcom Corp.
- * All Rights Reserved.$
- */
-
-/*
- * Driver for call-back functions for Linux KNET driver.
- *
- * This code is used to integrate packet sampling KNET callback to 
- * the psample infra for sending sampled pkts to userspace sflow 
- * applications such as Host Sflow (https://github.com/sflow/host-sflow) 
- * using genetlink interfaces.  
- *
- * The module can be built from the standard Linux user mode target
- * directories using the following command (assuming bash), e.g.
- *
- *   cd $SDK/systems/linux/user/<target>
- *   make BUILD_KNET_CB=1
- *
- */
-
-#include <lkm/lkm.h>
-#include <ngknet_callback.h>
-#include <linux/if_vlan.h>
-#include <linux/skbuff.h>
-#include <linux/sched.h>
-#include <linux/netdevice.h>
-#include <net/net_namespace.h>
-#include <net/psample.h>
-#include "psample-cb.h"
-#include "ngknet_main.h"
-
-#define PSAMPLE_CB_DBG
-#ifdef PSAMPLE_CB_DBG 
-extern int debug;
-#define PSAMPLE_CB_DBG_LVL_VERB (0x1)
-#define PSAMPLE_CB_DBG_LVL_PMD  (0x2)
-#define PSAMPLE_CB_DBG_PRINT(...) if (debug & PSAMPLE_CB_DBG_LVL_VERB) { printk(__VA_ARGS__); }
-#define PSAMPLE_CB_PMD_PRINT(...) if (debug & PSAMPLE_CB_DBG_LVL_PMD)  { printk(__VA_ARGS__); }
-#else
-#define PSAMPLE_CB_DBG_PRINT(...)
-#define PSAMPLE_CB_PMD_PRINT(...)
-#endif
-
-#define FCS_SZ 4
-#define PSAMPLE_NLA_PADDING 4
-#define PSAMPLE_PKT_HANDLED (1)
-
-#define PSAMPLE_RATE_DFLT 1
-#define PSAMPLE_SIZE_DFLT 128
-static int psample_size = PSAMPLE_SIZE_DFLT;
-module_param(psample_size, int, 0);
-MODULE_PARM_DESC(psample_size,
-"psample pkt size (default 128 bytes)");
-
-#define PSAMPLE_QLEN_DFLT 1024
-static int psample_qlen = PSAMPLE_QLEN_DFLT;
-module_param(psample_qlen, int, 0);
-MODULE_PARM_DESC(psample_qlen,
-"psample queue length (default 1024 buffers)");
-
-#if !IS_ENABLED(CONFIG_PSAMPLE)
-inline struct 
-psample_group *psample_group_get(struct net *net, u32 group_num)
-{
-    return NULL;
-}
-#endif
-
-/* driver proc entry root */
-static struct proc_dir_entry *psample_proc_root = NULL;
-static struct proc_dir_entry *knet_cb_proc_root = NULL;
-
-/* psample general info */
-typedef struct {
-    struct list_head netif_list;
-    int netif_count;
-    struct net *netns;
-    spinlock_t lock;
-    int dcb_type;
-} psample_info_t;
-static psample_info_t g_psample_info = {0};
-
-/* Maintain sampled pkt statistics */
-typedef struct psample_stats_s {
-    unsigned long pkts_f_psample_cb;
-    unsigned long pkts_f_psample_mod;
-    unsigned long pkts_f_handled;
-    unsigned long pkts_f_pass_through;
-    unsigned long pkts_f_dst_mc;
-    unsigned long pkts_c_qlen_cur;
-    unsigned long pkts_c_qlen_hi;
-    unsigned long pkts_d_qlen_max;
-    unsigned long pkts_d_no_mem;
-    unsigned long pkts_d_no_group;
-    unsigned long pkts_d_sampling_disabled;
-    unsigned long pkts_d_not_ready;
-    unsigned long pkts_d_metadata;
-    unsigned long pkts_d_skb;
-    unsigned long pkts_d_skb_cbd;
-    unsigned long pkts_d_meta_srcport;
-    unsigned long pkts_d_meta_dstport;
-    unsigned long pkts_d_invalid_size;
-} psample_stats_t;
-static psample_stats_t g_psample_stats = {0};
-
-typedef struct psample_meta_s {
-    int trunc_size;
-    int src_ifindex;
-    int dst_ifindex;
-    int sample_rate;
-} psample_meta_t;
-
-typedef struct psample_pkt_s {
-    struct list_head list;
-    struct psample_group *group;
-    psample_meta_t meta;
-    struct sk_buff *skb;
-} psample_pkt_t;
-
-typedef struct psample_work_s {
-    struct list_head pkt_list;
-    struct work_struct wq;
-    spinlock_t lock;
-} psample_work_t;
-static psample_work_t g_psample_work = {0};
-
-static psample_netif_t*
-psample_netif_lookup_by_ifindex(int ifindex)
-{
-    struct list_head *list;
-    psample_netif_t *psample_netif = NULL;
-    unsigned long flags;
-
-    /* look for port from list of available net_devices */
-    spin_lock_irqsave(&g_psample_info.lock, flags);
-    list_for_each(list, &g_psample_info.netif_list) {
-        psample_netif = (psample_netif_t*)list;
-        if (psample_netif->dev->ifindex == ifindex) {
-            spin_unlock_irqrestore(&g_psample_info.lock, flags);
-            return psample_netif;
-        }
-    }
-    spin_unlock_irqrestore(&g_psample_info.lock, flags);
-    return (NULL);
-}
-        
-static psample_netif_t*
-psample_netif_lookup_by_port(int port)  __attribute__ ((unused));
-static psample_netif_t*
-psample_netif_lookup_by_port(int port)
-{
-    struct list_head *list;
-    psample_netif_t *psample_netif = NULL;
-    unsigned long flags;
-
-    /* look for port from list of available net_devices */
-    spin_lock_irqsave(&g_psample_info.lock, flags);
-    list_for_each(list, &g_psample_info.netif_list) {
-        psample_netif = (psample_netif_t*)list;
-        if (psample_netif->port == port) {
-            spin_unlock_irqrestore(&g_psample_info.lock, flags);
-            return psample_netif;
-        }
-    }
-    spin_unlock_irqrestore(&g_psample_info.lock, flags);
-    return (NULL);
-}
-
-static int
-psample_meta_get(struct sk_buff *skb, psample_meta_t *sflow_meta)
-{
-    int src_ifindex = 0;
-    int sample_rate = 1;
-    int sample_size = PSAMPLE_SIZE_DFLT;
-    psample_netif_t *psample_netif = NULL;
-    const struct ngknet_callback_desc *cbd = NGKNET_SKB_CB(skb);
-    ngknet_netif_t *netif = cbd->netif;
-    memset(sflow_meta, 0, sizeof(psample_meta_t));    
-
-    /* find src port */
-    if ((psample_netif = psample_netif_lookup_by_ifindex(netif->id))) {
-        src_ifindex = psample_netif->dev->ifindex;
-        sample_rate = psample_netif->sample_rate;
-        sample_size = psample_netif->sample_size;
-    } else {
-        g_psample_stats.pkts_d_meta_srcport++;
-        PSAMPLE_CB_DBG_PRINT("%s: could not find psample netif for src dev %s (ifidx %d)\n", 
-                             __func__, netif->name, netif->id);
-    }
-
-    sflow_meta->src_ifindex = src_ifindex;
-    sflow_meta->trunc_size  = sample_size;
-    sflow_meta->sample_rate = sample_rate;
-    return (0);
-}
-
-static void
-psample_task(struct work_struct *work)
-{
-    psample_work_t *psample_work = container_of(work, psample_work_t, wq);
-    unsigned long flags;
-    struct list_head *list_ptr, *list_next;
-    psample_pkt_t *pkt;
-
-    spin_lock_irqsave(&psample_work->lock, flags);
-    list_for_each_safe(list_ptr, list_next, &psample_work->pkt_list) {
-        /* dequeue pkt from list */
-        pkt = list_entry(list_ptr, psample_pkt_t, list);
-        list_del(list_ptr);
-        g_psample_stats.pkts_c_qlen_cur--;
-        spin_unlock_irqrestore(&psample_work->lock, flags);
- 
-        /* send to psample */
-        if (pkt) {
-#if ((IS_ENABLED(CONFIG_PSAMPLE) && LINUX_VERSION_CODE >= KERNEL_VERSION(5,13,0)) || \
-     (defined PSAMPLE_MD_EXTENDED_ATTR && PSAMPLE_MD_EXTENDED_ATTR))
-            struct psample_metadata md = {0};
-            md.trunc_size = pkt->meta.trunc_size;
-            md.in_ifindex = pkt->meta.src_ifindex;
-            md.out_ifindex = pkt->meta.dst_ifindex;
-#endif
-            PSAMPLE_CB_DBG_PRINT("%s: group 0x%x, trunc_size %d, src_ifdx 0x%x, dst_ifdx 0x%x, sample_rate %d\n",
-                    __func__, pkt->group->group_num, 
-                    pkt->meta.trunc_size, pkt->meta.src_ifindex, 
-                    pkt->meta.dst_ifindex, pkt->meta.sample_rate);
-
-#if ((IS_ENABLED(CONFIG_PSAMPLE) && LINUX_VERSION_CODE >= KERNEL_VERSION(5,13,0)) || \
-     (defined PSAMPLE_MD_EXTENDED_ATTR && PSAMPLE_MD_EXTENDED_ATTR))
-            psample_sample_packet(pkt->group, 
-                                  pkt->skb,
-                                  pkt->meta.sample_rate,
-                                  &md);
-#else
-            psample_sample_packet(pkt->group, 
-                                  pkt->skb, 
-                                  pkt->meta.trunc_size,
-                                  pkt->meta.src_ifindex,
-                                  pkt->meta.dst_ifindex,
-                                  pkt->meta.sample_rate);
-#endif
-            g_psample_stats.pkts_f_psample_mod++;
- 
-            dev_kfree_skb_any(pkt->skb);
-            kfree(pkt);
-        }
-        spin_lock_irqsave(&psample_work->lock, flags);
-    }
-    spin_unlock_irqrestore(&psample_work->lock, flags);
-}
-
-struct sk_buff*
-psample_rx_cb(struct net_device *dev, struct sk_buff *skb)
-{
-    struct psample_group *group;
-    psample_meta_t meta;   
-    int rv = 0, size;
-    const struct ngknet_callback_desc *cbd = NULL;
-    const struct ngknet_private *netif = NULL;
-    const struct ngknet_filter_s *filt = NULL;
-    const struct ngknet_filter_s *filt_src = NULL;
-
-    if (!skb) {
-        printk("%s: skb is NULL\n", __func__);
-        g_psample_stats.pkts_d_skb++;
-        return (NULL);
-    }
-    cbd = NGKNET_SKB_CB(skb);
-    netif = netdev_priv(dev);
-    filt_src = cbd->filt;
-    filt = netif->filt_cb;
-
-    if (!cbd || !netif || !filt_src) {
-        printk("%s: cbd(0x%p) or priv(0x%p) or filter src(0x%p) is NULL\n", 
-            __func__, cbd, netif, filt_src);
-        g_psample_stats.pkts_d_skb_cbd++;
-        return (skb);
-    }
-
-    /* Enable PMD output in dmesg: "echo "debug=0x2" > /proc/bcm/knet-cb/psample/debug"
-     * Use bshell cmd "pmddecode rxpmd ..." to decode pkt metadata 
-     */
-    if (debug & PSAMPLE_CB_DBG_LVL_PMD) {
-        char str[128];
-        int i, len = cbd->pmd_len > 128? 128 : cbd->pmd_len;
-        PSAMPLE_CB_PMD_PRINT("PMD (%d bytes): %s\n", 
-                cbd->pmd_len, skb->dev->name);
-        for (i=0; i<len; i+=4) {
-            if ((i & 0x1f) == 0) {
-                sprintf(str, "%04x: ", i);
-            }
-            sprintf(&str[strlen(str)], "0x%08x ", *((uint32_t*)(cbd->pmd+i)));
-            if ((i & 0x1c) == 0x1c) {
-                sprintf(&str[strlen(str)], "\n");
-                printk(str);
-                continue;
-            }
-        }
-        if ((i & 0x1f) != 0) {
-            sprintf(&str[strlen(str)], "\n");
-            PSAMPLE_CB_PMD_PRINT(str);
-        }
-    }
-
-    /* check if this packet is sampled packet (from sample filter) */
-    if (!filt || 
-        (NGKNET_FILTER_DEST_T_CB != filt->dest_type) ||
-        (strncmp(filt->desc, PSAMPLE_CB_NAME, NGKNET_FILTER_DESC_MAX) != 0)) {
-        return (skb);
-    }
-
-    PSAMPLE_CB_DBG_PRINT("%s: src dev %s, pkt size %d, filt->dest_id %d\n",
-            __func__, skb->dev->name, cbd->pkt_len, filt->dest_id);
-    g_psample_stats.pkts_f_psample_cb++;
-
-    /* get psample group info. psample genetlink group ID passed in filt->dest_id */
-    group = psample_group_get(g_psample_info.netns, filt->dest_id);
-    if (!group) {
-        printk("%s: Could not find psample genetlink group %d\n", __func__, filt->dest_id);
-        g_psample_stats.pkts_d_no_group++;
-        goto PSAMPLE_FILTER_CB_PKT_HANDLED;
-    }
-
-    /* get psample metadata */
-    rv = psample_meta_get(skb, &meta);
-    if (rv < 0) {
-        printk("%s: Could not parse pkt metadata\n", __func__);
-        g_psample_stats.pkts_d_metadata++;
-        goto PSAMPLE_FILTER_CB_PKT_HANDLED;
-    }
-
-    /* Adjust original pkt size to remove 4B FCS */
-    size = cbd->pkt_len;
-    if (size < FCS_SZ) {
-        g_psample_stats.pkts_d_invalid_size++;
-        goto PSAMPLE_FILTER_CB_PKT_HANDLED;
-    } else {
-       size -= FCS_SZ; 
-    }
-
-    /* Account for padding in libnl used by psample */
-    if (meta.trunc_size >= size) {
-        meta.trunc_size = size - PSAMPLE_NLA_PADDING;
-    }
-
-    PSAMPLE_CB_DBG_PRINT("%s: group 0x%x, trunc_size %d, src_ifdx 0x%x, dst_ifdx 0x%x, sample_rate %d\n",
-            __func__, group->group_num, meta.trunc_size, meta.src_ifindex, meta.dst_ifindex, meta.sample_rate);
-
-    /* drop if configured sample rate is 0 */
-    if (meta.sample_rate > 0) {
-        unsigned long flags;
-        psample_pkt_t *psample_pkt;
-        struct sk_buff *skb_psample;
-
-        if (g_psample_stats.pkts_c_qlen_cur >= psample_qlen) {
-            printk("%s: tail drop due to max qlen %d reached\n", __func__, psample_qlen);
-            g_psample_stats.pkts_d_qlen_max++;
-            goto PSAMPLE_FILTER_CB_PKT_HANDLED;
-        }
-
-        if ((psample_pkt = kmalloc(sizeof(psample_pkt_t), GFP_ATOMIC)) == NULL) {
-            printk("%s: failed to alloc psample mem for pkt\n", __func__);
-            g_psample_stats.pkts_d_no_mem++;
-            goto PSAMPLE_FILTER_CB_PKT_HANDLED;
-        }
-        memcpy(&psample_pkt->meta, &meta, sizeof(psample_meta_t));
-        psample_pkt->group = group;
-
-        if ((skb_psample = dev_alloc_skb(meta.trunc_size)) == NULL) {
-            printk("%s: failed to alloc psample mem for pkt skb\n", __func__);
-            g_psample_stats.pkts_d_no_mem++;
-            goto PSAMPLE_FILTER_CB_PKT_HANDLED;
-        }
-
-        /* setup skb to point to pkt */
-        memcpy(skb_psample->data, skb->data, meta.trunc_size);
-        skb_put(skb_psample, meta.trunc_size);
-        skb_psample->len = meta.trunc_size;
-        psample_pkt->skb = skb_psample;
-
-        spin_lock_irqsave(&g_psample_work.lock, flags);
-        list_add_tail(&psample_pkt->list, &g_psample_work.pkt_list); 
-
-        g_psample_stats.pkts_c_qlen_cur++;
-        if (g_psample_stats.pkts_c_qlen_cur > g_psample_stats.pkts_c_qlen_hi) {
-            g_psample_stats.pkts_c_qlen_hi = g_psample_stats.pkts_c_qlen_cur;
-        }
-
-        schedule_work(&g_psample_work.wq);
-        spin_unlock_irqrestore(&g_psample_work.lock, flags);
-    } else {
-        g_psample_stats.pkts_d_sampling_disabled++;
-    }
-
-PSAMPLE_FILTER_CB_PKT_HANDLED:
-    g_psample_stats.pkts_f_pass_through++;
-    return skb;
-}
-
-int 
-psample_netif_create_cb(struct net_device *dev)
-{
-    int found;
-    struct list_head *list;
-    psample_netif_t *psample_netif, *lpsample_netif;
-    unsigned long flags;
-    struct ngknet_private *netif = NULL;
-
-    if (!dev) {
-        printk("%s: net_device is NULL\n", __func__);
-        return (-1);
-    }
-    netif = netdev_priv(dev);
-
-    if ((psample_netif = kmalloc(sizeof(psample_netif_t), GFP_ATOMIC)) == NULL) {
-        printk("%s: failed to alloc psample mem for netif '%s'\n", 
-                __func__, dev->name);
-        return (-1);
-    }
-
-    spin_lock_irqsave(&g_psample_info.lock, flags);
-
-    psample_netif->dev = dev;
-    psample_netif->id = netif->netif.id;
-    /*Application has encoded the port in netif user data 0 & 1 */
-    if (netif->netif.type == NGKNET_NETIF_T_PORT)
-    {
-        psample_netif->port = netif->netif.user_data[0];
-        psample_netif->port |= netif->netif.user_data[1] << 8;
-    }
-    psample_netif->vlan = netif->netif.vlan;
-    psample_netif->sample_rate = PSAMPLE_RATE_DFLT;
-    psample_netif->sample_size = PSAMPLE_SIZE_DFLT;
-    printk("\r\n Type %d vlan %d", netif->netif.type, psample_netif->vlan);
-    /* insert netif sorted by ID similar to bkn_knet_netif_create() */
-    found = 0;
-    list_for_each(list, &g_psample_info.netif_list) {
-        lpsample_netif = (psample_netif_t*)list;
-        if (netif->netif.id < lpsample_netif->id) {
-            found = 1;
-            g_psample_info.netif_count++; 
-            break;
-        }
-    }
-
-    if (found) {
-        /* Replace previously removed interface */
-        list_add_tail(&psample_netif->list, &lpsample_netif->list);
-    } else {
-        /* No holes - add to end of list */
-        list_add_tail(&psample_netif->list, &g_psample_info.netif_list);
-    }
-   
-    spin_unlock_irqrestore(&g_psample_info.lock, flags);
-
-    PSAMPLE_CB_DBG_PRINT("%s: added psample netif '%s'\n", __func__, dev->name);
-    return (0);
-}
-
-int
-psample_netif_destroy_cb(struct net_device *dev)
-{
-    int found;
-    struct list_head *list;
-    psample_netif_t *psample_netif;
-    unsigned long flags; 
-    struct ngknet_private *netif = NULL;
-
-    if (!dev) {
-        printk("%s: net_device is NULL\n", __func__);
-        return (-1);
-    }
-    netif = netdev_priv(dev);
-
-    spin_lock_irqsave(&g_psample_info.lock, flags);
-    
-    list_for_each(list, &g_psample_info.netif_list) {
-        psample_netif = (psample_netif_t*)list;
-        if (netif->netif.id == psample_netif->id) {
-            found = 1; 
-            list_del(&psample_netif->list);
-            PSAMPLE_CB_DBG_PRINT("%s: removing psample netif '%s'\n", __func__, dev->name);
-            kfree(psample_netif);
-            g_psample_info.netif_count--; 
-            break;
-        }
-    }
-
-    spin_unlock_irqrestore(&g_psample_info.lock, flags);
-    
-    if (!found) {    
-        return (-1);
-    }
-    return (0);
-}
-
-/*
- * psample rate Proc Read Entry
- */
-static int
-psample_proc_rate_show(struct seq_file *m, void *v)
-{
-    struct list_head *list;
-    psample_netif_t *psample_netif;
-    unsigned long flags; 
-
-    spin_lock_irqsave(&g_psample_info.lock, flags);
-    
-    list_for_each(list, &g_psample_info.netif_list) {
-        psample_netif = (psample_netif_t*)list;
-        seq_printf(m, "  %-14s %d\n", psample_netif->dev->name, psample_netif->sample_rate);
-    }
-
-    spin_unlock_irqrestore(&g_psample_info.lock, flags);
- 
-    return 0;
-}
-
-static int
-psample_proc_rate_open(struct inode * inode, struct file * file)
-{
-    return single_open(file, psample_proc_rate_show, NULL);
-}
-
-/*
- * psample rate Proc Write Entry
- *
- *   Syntax:
- *   <netif>=<pkt sample rate>
- *
- *   Where <netif> is a virtual network interface name.
- *
- *   Examples:
- *   eth4=1000
- */
-static ssize_t
-psample_proc_rate_write(struct file *file, const char *buf,
-                    size_t count, loff_t *loff)
-{
-    int found;
-    struct list_head *list;
-    psample_netif_t *psample_netif;
-    char sample_str[40], *ptr, *newline;
-    unsigned long flags;
-
-
-    if (count > sizeof(sample_str)) {
-        count = sizeof(sample_str) - 1;
-        sample_str[count] = '\0';
-    }
-    if (copy_from_user(sample_str, buf, count)) {
-        return -EFAULT;
-    }
-    sample_str[count] = 0;
-    newline = strchr(sample_str, '\n');
-    if (newline) {
-        /* Chop off the trailing newline */
-        *newline = '\0';
-    }
-
-    if ((ptr = strchr(sample_str, '=')) == NULL &&
-        (ptr = strchr(sample_str, ':')) == NULL) {
-        printk("Error: Pkt sample rate syntax not recognized: '%s'\n", sample_str);
-        return count;
-    }
-    *ptr++ = 0;
-
-    spin_lock_irqsave(&g_psample_info.lock, flags);
-   
-    found = 0; 
-    list_for_each(list, &g_psample_info.netif_list) {
-        psample_netif = (psample_netif_t*)list;
-        if (strcmp(psample_netif->dev->name, sample_str) == 0) {
-            psample_netif->sample_rate = simple_strtol(ptr, NULL, 10);
-            // TODO MLI@BRCM - check valid sample rate
-            found = 1; 
-            break;
-        }
-    }
-    
-    spin_unlock_irqrestore(&g_psample_info.lock, flags);
-
-    if (!found) {
-        printk("Warning: Failed setting psample rate on unknown network interface: '%s'\n", sample_str);
-    }
-    return count;
-}
-
-struct proc_ops psample_proc_rate_file_ops = {
-    PROC_OWNER(THIS_MODULE)
-    .proc_open =       psample_proc_rate_open,
-    .proc_read =       seq_read,
-    .proc_lseek =      seq_lseek,
-    .proc_write =       psample_proc_rate_write,
-    .proc_release =    single_release,
-};
-
-/*
- * psample size Proc Read Entry
- */
-static int
-psample_proc_size_show(struct seq_file *m, void *v)
-{
-    struct list_head *list;
-    psample_netif_t *psample_netif;
-    unsigned long flags;
-
-    spin_lock_irqsave(&g_psample_info.lock, flags);
-    
-    list_for_each(list, &g_psample_info.netif_list) {
-        psample_netif = (psample_netif_t*)list;
-        seq_printf(m, "  %-14s %d\n", psample_netif->dev->name, psample_netif->sample_size);
-    }
-
-    spin_unlock_irqrestore(&g_psample_info.lock, flags);
-    return 0;
-}
-
-static int
-psample_proc_size_open(struct inode * inode, struct file * file)
-{
-    return single_open(file, psample_proc_size_show, NULL);
-}
-
-/*
- * psample size Proc Write Entry
- *
- *   Syntax:
- *   <netif>=<pkt sample size in bytes>
- *
- *   Where <netif> is a virtual network interface name.
- *
- *   Examples:
- *   eth4=128
- */
-static ssize_t
-psample_proc_size_write(struct file *file, const char *buf,
-                    size_t count, loff_t *loff)
-{
-    int found;
-    struct list_head *list;
-    psample_netif_t *psample_netif;
-    char sample_str[40], *ptr, *newline;
-    unsigned long flags;
-
-    if (count > sizeof(sample_str)) {
-        count = sizeof(sample_str) - 1;
-        sample_str[count] = '\0';
-    }
-    if (copy_from_user(sample_str, buf, count)) {
-        return -EFAULT;
-    }
-    sample_str[count] = 0;
-    newline = strchr(sample_str, '\n');
-    if (newline) {
-        /* Chop off the trailing newline */
-        *newline = '\0';
-    }
-
-    if ((ptr = strchr(sample_str, '=')) == NULL &&
-        (ptr = strchr(sample_str, ':')) == NULL) {
-        printk("Error: Pkt sample size syntax not recognized: '%s'\n", sample_str);
-        return count;
-    }
-    *ptr++ = 0;
-
-    spin_lock_irqsave(&g_psample_info.lock, flags);
-   
-    found = 0; 
-    list_for_each(list, &g_psample_info.netif_list) {
-        psample_netif = (psample_netif_t*)list;
-        if (strcmp(psample_netif->dev->name, sample_str) == 0) {
-            psample_netif->sample_size = simple_strtol(ptr, NULL, 10);
-            // TODO MLI@BRCM - check valid sample size
-            found = 1;
-            break; 
-        }
-    }
-    
-    spin_unlock_irqrestore(&g_psample_info.lock, flags);
-
-    if (!found) {
-        printk("Warning: Failed setting psample size on unknown network interface: '%s'\n", sample_str);
-    }
-    return count;
-}
-
-struct proc_ops psample_proc_size_file_ops = {
-    PROC_OWNER(THIS_MODULE)
-    .proc_open =       psample_proc_size_open,
-    .proc_read =       seq_read,
-    .proc_lseek =      seq_lseek,
-    .proc_write =       psample_proc_size_write,
-    .proc_release =    single_release,
-};
-
-/*
- * psample map Proc Read Entry
- */
-static int
-psample_proc_map_show(struct seq_file *m, void *v)
-{
-    struct list_head *list;
-    psample_netif_t *psample_netif;
-    unsigned long flags;
-
-    seq_printf(m, "  Interface      logical port   ifindex\n");
-    seq_printf(m, "-------------    ------------   -------\n");
-    spin_lock_irqsave(&g_psample_info.lock, flags);
-    
-    list_for_each(list, &g_psample_info.netif_list) {
-        psample_netif = (psample_netif_t*)list;
-        seq_printf(m, "  %-14s %-14d %d\n",
-                psample_netif->dev->name,
-                psample_netif->port,
-                psample_netif->dev->ifindex);
-    }
-
-    spin_unlock_irqrestore(&g_psample_info.lock, flags);
-    return 0;
-}
-
-static int
-psample_proc_map_open(struct inode * inode, struct file * file)
-{
-    return single_open(file, psample_proc_map_show, NULL);
-}
-
-struct proc_ops psample_proc_map_file_ops = {
-    PROC_OWNER(THIS_MODULE)
-    .proc_open =       psample_proc_map_open,
-    .proc_read =       seq_read,
-    .proc_lseek =      seq_lseek,
-    .proc_write =       NULL,
-    .proc_release =    single_release,
-};
-
-/*
- * psample debug Proc Read Entry
- */
-static int
-psample_proc_debug_show(struct seq_file *m, void *v)
-{
-    seq_printf(m, "BCM KNET %s Callback Config\n", PSAMPLE_CB_NAME);
-    seq_printf(m, "  debug:           0x%x\n", debug);
-    seq_printf(m, "  dcb_type:        %d\n",   g_psample_info.dcb_type);
-    seq_printf(m, "  netif_count:     %d\n",   g_psample_info.netif_count);
-    seq_printf(m, "  queue length:    %d\n",   psample_qlen);
-
-    return 0;
-}
-
-static int
-psample_proc_debug_open(struct inode * inode, struct file * file)
-{
-    return single_open(file, psample_proc_debug_show, NULL);
-}
-
-/*
- * psample debug Proc Write Entry
- *
- *   Syntax:
- *   debug=<mask>
- *
- *   Where <mask> corresponds to the debug module parameter.
- *
- *   Examples:
- *   debug=0x1
- */
-static ssize_t
-psample_proc_debug_write(struct file *file, const char *buf,
-                    size_t count, loff_t *loff)
-{
-    char debug_str[40];
-    char *ptr;
-
-    if (count > sizeof(debug_str)) {
-        count = sizeof(debug_str) - 1;
-        debug_str[count] = '\0';
-    }
-    if (copy_from_user(debug_str, buf, count)) {
-        return -EFAULT;
-    }
-
-    if ((ptr = strstr(debug_str, "debug=")) != NULL) {
-        ptr += 6;
-        debug = simple_strtol(ptr, NULL, 0);
-    } else {
-        printk("Warning: unknown configuration setting\n");
-    }
-
-    return count;
-}
-
-struct proc_ops psample_proc_debug_file_ops = {
-    PROC_OWNER(THIS_MODULE)
-    .proc_open =       psample_proc_debug_open,
-    .proc_read =       seq_read,
-    .proc_lseek =      seq_lseek,
-    .proc_write =       psample_proc_debug_write,
-    .proc_release =    single_release,
-};
-
-static int
-psample_proc_stats_show(struct seq_file *m, void *v)
-{
-    seq_printf(m, "BCM KNET %s Callback Stats\n", PSAMPLE_CB_NAME);
-    seq_printf(m, "  DCB type %d\n",                          g_psample_info.dcb_type);
-    seq_printf(m, "  pkts filter psample cb         %10lu\n", g_psample_stats.pkts_f_psample_cb);
-    seq_printf(m, "  pkts sent to psample module    %10lu\n", g_psample_stats.pkts_f_psample_mod);
-    seq_printf(m, "  pkts handled by psample        %10lu\n", g_psample_stats.pkts_f_handled);
-    seq_printf(m, "  pkts pass through              %10lu\n", g_psample_stats.pkts_f_pass_through);
-    seq_printf(m, "  pkts with mc destination       %10lu\n", g_psample_stats.pkts_f_dst_mc);
-    seq_printf(m, "  pkts current queue length      %10lu\n", g_psample_stats.pkts_c_qlen_cur);
-    seq_printf(m, "  pkts high queue length         %10lu\n", g_psample_stats.pkts_c_qlen_hi);
-    seq_printf(m, "  pkts drop max queue length     %10lu\n", g_psample_stats.pkts_d_qlen_max);
-    seq_printf(m, "  pkts drop no memory            %10lu\n", g_psample_stats.pkts_d_no_mem);
-    seq_printf(m, "  pkts drop no psample group     %10lu\n", g_psample_stats.pkts_d_no_group);
-    seq_printf(m, "  pkts drop sampling disabled    %10lu\n", g_psample_stats.pkts_d_sampling_disabled);
-    seq_printf(m, "  pkts drop psample not ready    %10lu\n", g_psample_stats.pkts_d_not_ready);
-    seq_printf(m, "  pkts drop metadata parse error %10lu\n", g_psample_stats.pkts_d_metadata);
-    seq_printf(m, "  pkts drop skb error            %10lu\n", g_psample_stats.pkts_d_skb);
-    seq_printf(m, "  pkts drop skb cbd error        %10lu\n", g_psample_stats.pkts_d_skb_cbd);
-    seq_printf(m, "  pkts with invalid src port     %10lu\n", g_psample_stats.pkts_d_meta_srcport);
-    seq_printf(m, "  pkts with invalid dst port     %10lu\n", g_psample_stats.pkts_d_meta_dstport);
-    seq_printf(m, "  pkts with invalid orig pkt sz  %10lu\n", g_psample_stats.pkts_d_invalid_size);
-    return 0;
-}
-
-static int
-psample_proc_stats_open(struct inode * inode, struct file * file)
-{
-    return single_open(file, psample_proc_stats_show, NULL);
-}
-
-/*
- * psample stats Proc Write Entry
- *
- *   Syntax:
- *   write any value to clear stats 
- */
-static ssize_t
-psample_proc_stats_write(struct file *file, const char *buf,
-                    size_t count, loff_t *loff)
-{
-    int qlen_cur = 0;
-    unsigned long flags;
-
-    spin_lock_irqsave(&g_psample_work.lock, flags);
-    qlen_cur = g_psample_stats.pkts_c_qlen_cur;
-    memset(&g_psample_stats, 0, sizeof(psample_stats_t));
-    g_psample_stats.pkts_c_qlen_cur = qlen_cur;
-    spin_unlock_irqrestore(&g_psample_work.lock, flags);
-
-    return count;
-}
-struct proc_ops psample_proc_stats_file_ops = {
-    PROC_OWNER(THIS_MODULE)
-    .proc_open =       psample_proc_stats_open,
-    .proc_read =       seq_read,
-    .proc_lseek =      seq_lseek,
-    .proc_write =      psample_proc_stats_write,
-    .proc_release =    single_release,
-};
-
-int psample_cleanup(void)
-{
-    cancel_work_sync(&g_psample_work.wq);
-    remove_proc_entry("stats", psample_proc_root);
-    remove_proc_entry("rate",  psample_proc_root);
-    remove_proc_entry("size",  psample_proc_root);
-    remove_proc_entry("debug", psample_proc_root);
-    remove_proc_entry("map"  , psample_proc_root);
-    remove_proc_entry("psample", knet_cb_proc_root);
-    remove_proc_entry("bcm/knet-cb", NULL);
-    remove_proc_entry("bcm", NULL);
-    return 0;
-}
-
-int psample_init(void)
-{
-    #define PROCFS_MAX_PATH 1024
-    char psample_procfs_path[PROCFS_MAX_PATH];
-    struct proc_dir_entry *entry;
-
-    /* initialize proc files (for ngknet) */
-    proc_mkdir("bcm", NULL);
-
-    /* create procfs for psample */
-    snprintf(psample_procfs_path, PROCFS_MAX_PATH, "bcm/knet-cb");
-    knet_cb_proc_root = proc_mkdir(psample_procfs_path, NULL);
-    snprintf(psample_procfs_path, PROCFS_MAX_PATH, "%s/%s", psample_procfs_path, PSAMPLE_CB_NAME);
-    psample_proc_root = proc_mkdir(psample_procfs_path, NULL);
-
-    /* create procfs for psample stats */
-    PROC_CREATE(entry, "stats", 0666, psample_proc_root, &psample_proc_stats_file_ops);
-    if (entry == NULL) {
-        printk("%s: Unable to create procfs entry '/procfs/%s/stats'\n", __func__, psample_procfs_path);
-        return -1;
-    }
-
-    /* create procfs for setting sample rates */
-    PROC_CREATE(entry, "rate", 0666, psample_proc_root, &psample_proc_rate_file_ops);
-    if (entry == NULL) {
-        printk("%s: Unable to create procfs entry '/procfs/%s/rate'\n", __func__, psample_procfs_path);
-        return -1;
-    }
-
-    /* create procfs for setting sample size */
-    PROC_CREATE(entry, "size", 0666, psample_proc_root, &psample_proc_size_file_ops);
-    if (entry == NULL) {
-        printk("%s: Unable to create procfs entry '/procfs/%s/size'\n", __func__, psample_procfs_path);
-        return -1;
-    }
-    
-    /* create procfs for getting netdev mapping */
-    PROC_CREATE(entry, "map", 0666, psample_proc_root, &psample_proc_map_file_ops);
-    if (entry == NULL) {
-        printk("%s: Unable to create procfs entry '/procfs/%s/map'\n", __func__, psample_procfs_path);
-        return -1;
-    }
-
-    /* create procfs for debug log */
-    PROC_CREATE(entry, "debug", 0666, psample_proc_root, &psample_proc_debug_file_ops);
-    if (entry == NULL) {
-        printk("%s: Unable to create procfs entry '/procfs/%s/debug'\n", __func__, psample_procfs_path);
-        return -1;
-    }
-
-    /* clear data structs */
-    memset(&g_psample_stats, 0, sizeof(psample_stats_t));
-    memset(&g_psample_info, 0, sizeof(psample_info_t));
-    memset(&g_psample_work, 0, sizeof(psample_work_t));
-
-    /* FIXME: How to get DCB type from NGKNET? */
-    //g_psample_info.dcb_type
-
-    /* setup psample_info struct */
-    INIT_LIST_HEAD(&g_psample_info.netif_list); 
-    spin_lock_init(&g_psample_info.lock);
-
-    /* setup psample work queue */
-    spin_lock_init(&g_psample_work.lock); 
-    INIT_LIST_HEAD(&g_psample_work.pkt_list); 
-    INIT_WORK(&g_psample_work.wq, psample_task);
-
-    /* get net namespace */ 
-    g_psample_info.netns = get_net_ns_by_pid(current->pid);
-    if (!g_psample_info.netns) {
-        printk("%s: Could not get network namespace for pid %d\n", __func__, current->pid);
-        return (-1);
-    }
-    PSAMPLE_CB_DBG_PRINT("%s: current->pid %d, netns 0x%p, sample_size %d\n", __func__, 
-            current->pid, g_psample_info.netns, psample_size);
-
-
-    return 0;
-}
diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knetcb/psample-cb.h b/platform/broadcom/saibcm-modules/sdklt/linux/knetcb/psample-cb.h
deleted file mode 100755
index d89c5f417..000000000
--- a/platform/broadcom/saibcm-modules/sdklt/linux/knetcb/psample-cb.h
+++ /dev/null
@@ -1,57 +0,0 @@
-/*
- * Copyright 2022 Broadcom
- * 
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License, version 2, as
- * published by the Free Software Foundation (the "GPL").
- * 
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License version 2 (GPLv2) for more details.
- * 
- * You should have received a copy of the GNU General Public License
- * version 2 (GPLv2) along with this source code.
- */
-/*
- * $Id: psample_cb.h $
- * $Copyright: (c) 2019 Broadcom Corp.
- * All Rights Reserved.$
- */
-#ifndef __PSAMPLE_CB_H__
-#define __PSAMPLE_CB_H__
-
-#include <lkm/lkm.h>
-#include <linux/netdevice.h>
-
-//#define PSAMPLE_SUPPORT 1  // TODO: MLI@BRCM - Add this as part of conditional in Makefile
-#define PSAMPLE_CB_NAME "psample"
-
-extern int
-psample_init(void);
-
-extern int
-psample_cleanup(void);
-
-extern struct sk_buff*
-psample_rx_cb(struct net_device *dev, struct sk_buff *skb);
-
-/* psample data per interface */
-typedef struct {
-    struct list_head list;
-    struct net_device *dev;
-    uint16_t id;
-    uint16_t port;
-    uint16_t vlan;
-    uint16_t qnum;
-    uint32_t sample_rate;
-    uint32_t sample_size;
-} psample_netif_t;
-
-extern int
-psample_netif_create_cb(struct net_device *dev);
-
-extern int
-psample_netif_destroy_cb(struct net_device *dev);
-
-#endif /* __PSAMPLE_CB_H__ */
diff --git a/platform/broadcom/saibcm-modules/sdklt/make/kpmd.mk b/platform/broadcom/saibcm-modules/sdklt/make/kpmd.mk
new file mode 100644
index 000000000..db21c5829
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/make/kpmd.mk
@@ -0,0 +1,202 @@
+#
+# $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+# The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+# 
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License 
+# version 2 as published by the Free Software Foundation.
+# 
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+# 
+# A copy of the GNU General Public License version 2 (GPLv2) can
+# be found in the LICENSES folder.$
+#
+# Helper makefile for building stand-alone PMD kernel module
+#
+
+# SDK make utilities
+include $(SDK)/make/makeutils.mk
+
+# SDK source directories
+SHRDIR = $(SDK)/shr
+BCMPKTDIR = $(SDK)/bcmpkt
+BCMPKTIDIR = $(BCMPKTDIR)/include/bcmpkt
+
+# Create links locally if no GENDIR was specified
+ifeq (,$(GENDIR))
+GENDIR = $(KMODDIR)
+endif
+
+#
+# Suppress symlink error messages.
+#
+# Note that we do not use "ln -f" as this may cause failures if
+# multiple builds are done in parallel on the same source tree.
+#
+R = 2>/dev/null
+
+# Check for valid FLTG configuration by default
+ifneq (0,$(KPMD_CONFIG_CHECK))
+KPMD_CONFIG := config
+endif
+
+mklinks: $(KPMD_CONFIG)
+	mkdir -p $(GENDIR)
+	-ln -s $(BCMPKTDIR)/chip/*/*lbhdr.c $(GENDIR) $(R)
+	-ln -s $(BCMPKTDIR)/chip/*/*rxpmd.c $(GENDIR) $(R)
+	-ln -s $(BCMPKTDIR)/chip/*/*rxpmd_field.c $(GENDIR) $(R)
+	-ln -s $(BCMPKTDIR)/chip/*/*txpmd.c $(GENDIR) $(R)
+	-ln -s $(BCMPKTDIR)/lbpmd/bcmpkt_lbhdr.c $(GENDIR) $(R)
+	-ln -s $(BCMPKTDIR)/rxpmd/bcmpkt_rxpmd.c $(GENDIR) $(R)
+	-ln -s $(BCMPKTDIR)/rxpmd/bcmpkt_rxpmd_match_id.c $(GENDIR) $(R)
+	-ln -s $(BCMPKTDIR)/txpmd/bcmpkt_txpmd.c $(GENDIR) $(R)
+	-ln -s $(BCMPKTDIR)/flexhdr/bcmpkt_flexhdr.c $(GENDIR) $(R)
+	-ln -s $(BCMPKTDIR)/include/bcmpkt/bcmpkt_flexhdr_field.h $(GENDIR) $(R)
+	-ln -s $(BCMPKTDIR)/include/bcmpkt/bcmpkt_rxpmd_match_id_defs.h $(GENDIR) $(R)
+	-ln -s $(BCMPKTDIR)/xfcr/*/*/*.c $(GENDIR) $(R)
+	-ln -s $(BCMPKTDIR)/ltt_stub/*/*/*/*.c $(GENDIR) $(R)
+	-ln -s $(SHRDIR)/bitop/shr_bitop_range_clear.c $(GENDIR) $(R)
+	-ln -s $(KMODDIR)/*.[ch] $(GENDIR) $(R)
+	-ln -s $(KMODDIR)/Makefile $(GENDIR) $(R)
+	-ln -s $(KMODDIR)/Kbuild $(GENDIR) $(R)
+
+rmlinks:
+	-rm -f $(KMODDIR)/bcm*
+	-rm -f $(KMODDIR)/shr*
+
+# FLTG tools directory (not present in GPL package)
+FLTG_DIR := $(SDK)/tools/fltg
+
+# File indicating that the FLTG build is complete
+FLTG_DONE := $(FLTG_DIR)/generated/ltt.sum
+
+# If not GPL, check that FLTG files have been generated
+config:
+	if [ -d $(FLTG_DIR) ]; then \
+	    if [ ! -e $(FLTG_DONE) ]; then \
+	        echo 'kpmd.mk: Please run "make -C $$SDK config"' \
+	             'before building the Linux PMD library'; \
+	        exit 1; \
+	    fi \
+	fi
+
+kpmd: mklinks
+
+distclean:: rmlinks
+
+.PHONY: mklinks rmlinks config kpmd distclean
+
+ALL_CHIPS := $(subst $(BCMPKTDIR)/chip/,,$(wildcard $(BCMPKTDIR)/chip/bcm*))
+VAR_CHIPS := $(subst $(BCMPKTDIR)/xfcr/,,$(wildcard $(BCMPKTDIR)/xfcr/bcm*))
+
+# If SDK_VARIANTS is defined but not SDK_CHIPS, find the chips for the
+# specified variants and set SDK_CHIPS so the partial build can work correctly
+ifdef SDK_VARIANTS
+SDK_VARIANTS_SPC := $(call spc_sep,$(SDK_VARIANTS))
+SDK_VARIANTS_LC := $(call var_lc,$(SDK_VARIANTS_SPC))
+ifdef SDK_CHIPS
+# Both SDK_CHIPS and SDK_VARIANTS
+# Set PMD_CHIPS and VARIANT_DIRS
+SDK_CHIPS_SPC := $(call spc_sep,$(SDK_CHIPS))
+SDK_CHIPS_LC := $(call var_lc,$(SDK_CHIPS_SPC))
+PMD_CHIPS := $(SDK_CHIPS_LC)
+TMP_ALL_VAR_DIRS = $(foreach K, $(PMD_CHIPS),$(filter-out $(SDK_VARIANTS_LC),\
+	$(shell find $(BCMPKTDIR)/xfcr/$K/* -type d)))
+VARIANT_DIRS := $(foreach K, $(SDK_CHIPS_LC),$(foreach V, $(SDK_VARIANTS_LC),\
+	$(findstring $(BCMPKTDIR)/xfcr/$K/$V,$(TMP_ALL_VAR_DIRS))))
+else
+# SDK_VARIANTS only
+# Set SDK_CHIPS, PMD_CHIPS and VARIANT_DIRS
+TMP_ALL_VAR_DIRS = $(foreach K, $(ALL_CHIPS),$(filter-out $(SDK_VARIANTS_LC),\
+	$(shell find $(BCMPKTDIR)/xfcr/$K/* -type d)))
+VARIANT_DIRS := $(foreach K, $(ALL_CHIPS),$(foreach V, $(SDK_VARIANTS_LC),\
+	$(findstring $(BCMPKTDIR)/xfcr/$K/$V,$(TMP_ALL_VAR_DIRS))))
+TMP_VARIANTS = $(foreach D, $(VARIANT_DIRS),$(lastword $(subst /, ,$D)))
+SDK_CHIPS_SPC := $(foreach D, $(VARIANT_DIRS),$(lastword $(filter-out \
+	$(lastword $(subst /, ,$D)),$(subst /, ,$D))))
+SDK_CHIPS_LC := $(call var_lc,$(SDK_CHIPS_SPC))
+SDK_CHIPS := $(SDK_CHIPS_LC)
+PMD_CHIPS := $(SDK_CHIPS)
+endif
+else
+# If SDK_VARIANTS is not defined but SDK_CHIPS is defined, we want all variants
+# for the chips so set SDK_VARIANTS for the partial build to work correctly
+ifdef SDK_CHIPS
+# SDK_CHIPS only
+# Set SDK_VARIANTS, PMD_CHIPS and VARIANT_DIRS
+SDK_CHIPS_SPC := $(call spc_sep,$(SDK_CHIPS))
+SDK_CHIPS_LC := $(call var_lc,$(SDK_CHIPS_SPC))
+VARIANT_DIRS := $(foreach K, $(SDK_CHIPS),\
+	$(shell find $(BCMPKTDIR)/xfcr/$K/* -type d))
+SDK_VARIANTS_SPC := $(foreach D, $(VARIANT_DIRS),$(lastword $(subst /, ,$D)))
+SDK_VARIANTS_LC := $(call var_lc,$(SDK_VARIANTS_SPC))
+SDK_VARIANTS := $(SDK_VARIANTS_LC)
+PMD_CHIPS := $(SDK_CHIPS_LC)
+else
+# Neither SDK_VARIANTS or SDK_CHIPS
+# Set PMD_CHIPS and VARIANT_DIRS
+PMD_CHIPS := $(ALL_CHIPS)
+VARIANT_DIRS := $(foreach K, $(filter $(VAR_CHIPS),$(PMD_CHIPS)),\
+	$(shell find $(BCMPKTDIR)/xfcr/$K/* -type d))
+endif
+endif
+
+# Set options for partial build support
+include $(SDK)/make/partial.mk
+
+ifdef SDK_CHIPS
+KNETCB_CPPFLAGS := $(SDK_CPPFLAGS)
+endif
+
+ifdef SDK_VARIANTS
+override KNETCB_CPPFLAGS := $(SDK_CPPFLAGS)
+endif
+
+KNETCB_CPPFLAGS += -DKPMD
+export KNETCB_CPPFLAGS
+
+PMD_FLEX_CHIPS := $(filter $(PMD_CHIPS),$(sort $(foreach D, $(VARIANT_DIRS), \
+	$(lastword $(filter-out $(lastword $(subst /, ,$D)),$(subst /, ,$D))))))
+
+CHIP_SRCS := $(addsuffix _pkt_lbhdr.c,$(PMD_CHIPS))
+CHIP_SRCS += $(addsuffix _pkt_rxpmd.c,$(PMD_CHIPS))
+ifneq (,$(PMD_FLEX_CHIPS))
+CHIP_SRCS += $(addsuffix _pkt_rxpmd_field.c,$(PMD_FLEX_CHIPS))
+endif
+CHIP_SRCS += $(addsuffix _pkt_txpmd.c,$(PMD_CHIPS))
+
+VARIANTS := $(subst /,_, $(subst $(BCMPKTDIR)/xfcr/,,$(sort $(VARIANT_DIRS))))
+CHIP_SRCS += $(addsuffix _pkt_flexhdr.c,$(VARIANTS))
+CHIP_SRCS += $(addsuffix _bcmpkt_rxpmd_match_id.c,$(VARIANTS))
+
+ifneq (,$(wildcard $(BCMPKTDIR)/ltt_stub/*))
+STUB_DIRS := $(sort $(shell find $(BCMPKTDIR)/ltt_stub -mindepth 3 -type d))
+endif
+ifneq (,$(STUB_DIRS))
+STUB_VARS := $(subst /,_, $(subst $(BCMPKTDIR)/ltt_stub/generated/,,$(sort $(STUB_DIRS))))
+CHIP_SRCS += $(addsuffix _pkt_flexhdr.c,$(STUB_VARS))
+CHIP_SRCS += $(addsuffix _bcmpkt_rxpmd_match_id.c,$(STUB_VARS))
+endif
+
+CHIP_OBJS ?= $(patsubst %.c, %.o, $(CHIP_SRCS))
+
+SDK_PMD_KFLAGS := -DSAL_LINUX \
+		  -I$(SDK)/sal/include \
+		  -I$(SDK)/bcmltd/include \
+		  -I$(SDK)/bcmlrd/include \
+		  -I$(SDK)/bcmdrd/include \
+		  -I$(SDK)/bcmpkt/include
+export SDK_PMD_KFLAGS
+
+COMMON_SRCS := bcmpkt_lbhdr.c
+COMMON_SRCS += bcmpkt_rxpmd.c
+COMMON_SRCS += bcmpkt_rxpmd_match_id.c
+COMMON_SRCS += bcmpkt_txpmd.c
+COMMON_SRCS += bcmpkt_flexhdr.c
+COMMON_SRCS += shr_bitop_range_clear.c
+
+SDK_PMD_KOBJS ?= $(patsubst %.c, %.o, $(COMMON_SRCS) $(CHIP_SRCS))
+export SDK_PMD_KOBJS
diff --git a/platform/broadcom/saibcm-modules/sdklt/make/lkm.mk b/platform/broadcom/saibcm-modules/sdklt/make/lkm.mk
index f565514a1..df45e7004 100644
--- a/platform/broadcom/saibcm-modules/sdklt/make/lkm.mk
+++ b/platform/broadcom/saibcm-modules/sdklt/make/lkm.mk
@@ -1,5 +1,5 @@
 #
-# $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+# $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
 # The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
 # 
 # This program is free software; you can redistribute it and/or
@@ -36,7 +36,11 @@ ifneq ($(LKM_BLDDIR),)
 # output as we want it.
 #
 MDIR := $(LKM_BLDDIR)
-MSRCS := $(patsubst %.o,%.c,$($(MOD_NAME)-y))
+MOBJS := $($(MOD_NAME)-y)
+ifeq (,$(MOBJS))
+MOBJS := $(obj-m)
+endif
+MSRCS := $(patsubst %.o,%.c,$(MOBJS))
 MSRCS += Makefile Kbuild
 BSRCS := $(addprefix $(PWD)/,$(MSRCS))
 else
diff --git a/platform/broadcom/saibcm-modules/sdklt/make/makeutils.mk b/platform/broadcom/saibcm-modules/sdklt/make/makeutils.mk
new file mode 100644
index 000000000..dd6477a7d
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/make/makeutils.mk
@@ -0,0 +1,42 @@
+#
+# $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+# The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+# 
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License 
+# version 2 as published by the Free Software Foundation.
+# 
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+# 
+# A copy of the GNU General Public License version 2 (GPLv2) can
+# be found in the LICENSES folder.$
+#
+# Various make utility functions.
+#
+
+ifneq (1,MAKEUTILS)
+MAKEUTILS := 1
+
+# Change comma-separated list to space-separated list
+comma = ,
+empty =
+space = $(empty) $(empty)
+spc_sep = $(subst $(comma),$(space),$1)
+comma_sep = $(subst $(space),$(comma),$1)
+
+# Convert chip name to uppercase
+chip_uc = $(subst a,A,$(subst b,B,$(subst c,C,$(subst m,M,$1))))
+
+# Convert chip name to lowercase
+chip_lc = $(subst A,a,$(subst B,b,$(subst C,c,$(subst M,m,$1))))
+
+# Convert chip variant name to uppercase
+var_uc = $(shell echo $1 | tr a-z A-Z)
+
+# Convert chip variant name to lowercase
+var_lc = $(shell echo $1 | tr A-Z a-z)
+
+endif
diff --git a/platform/broadcom/saibcm-modules/sdklt/make/partial.mk b/platform/broadcom/saibcm-modules/sdklt/make/partial.mk
new file mode 100644
index 000000000..ffbe3323d
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/make/partial.mk
@@ -0,0 +1,65 @@
+#
+# $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+# The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+# 
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License 
+# version 2 as published by the Free Software Foundation.
+# 
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+# 
+# A copy of the GNU General Public License version 2 (GPLv2) can
+# be found in the LICENSES folder.$
+#
+# SDK partial build support
+#
+
+include $(SDK)/make/makeutils.mk
+
+#
+# If SDK_CHIPS is defined, then exclude any chip which is not part of
+# this list. Note that bond-option chips must be added via SDK_SKUS
+# separately if needed.
+#
+ifneq (,$(SDK_CHIPS))
+# Create space-separated uppercase version of chip list
+SDK_CHIPS_SPC := $(call spc_sep,$(SDK_CHIPS))
+SDK_CHIPS_UC := $(call chip_uc,$(SDK_CHIPS_SPC))
+endif
+ifneq (,$(SDK_SKUS))
+# Create space-separated uppercase version of SKU list
+SDK_SKUS_SPC := $(call spc_sep,$(SDK_SKUS))
+SDK_SKUS_UC := $(call chip_uc,$(SDK_SKUS_SPC))
+endif
+
+#
+# If SDK_VARIANTS is defined, then exclude any chip variant which is
+# not part of this list.
+#
+ifneq (,$(SDK_VARIANTS))
+# Create space-separated uppercase version of chip variant list
+SDK_VARIANTS_SPC := $(call spc_sep,$(SDK_VARIANTS))
+SDK_VARIANTS_UC := $(call var_uc,$(SDK_VARIANTS_SPC))
+endif
+
+ifneq (,$(SDK_CHIPS))
+CHIP_CPPFLAGS := CHIP_DEFAULT=0 $(addsuffix =1,$(SDK_CHIPS_UC) $(SDK_SKUS_UC))
+CHIP_CPPFLAGS := $(addprefix -DBCMDRD_CONFIG_INCLUDE_,$(CHIP_CPPFLAGS))
+TMP_CPPFLAGS := $(filter-out $(CHIP_CPPFLAGS),$(SDK_CPPFLAGS))
+override SDK_CPPFLAGS := $(TMP_CPPFLAGS) $(CHIP_CPPFLAGS)
+ifdef SDK_VARIANTS
+VAR_CPPFLAGS := VARIANT_DEFAULT=0
+VAR_CPPFLAGS += $(foreach C,$(SDK_CHIPS_UC),$(addprefix $(C)_,$(addsuffix =1,$(SDK_VARIANTS_UC))))
+VAR_CPPFLAGS := $(addprefix -DBCMLTD_CONFIG_INCLUDE_,$(VAR_CPPFLAGS))
+TMP_CPPFLAGS := $(filter-out $(VAR_CPPFLAGS),$(SDK_CPPFLAGS))
+override SDK_CPPFLAGS := $(TMP_CPPFLAGS) $(VAR_CPPFLAGS)
+endif # SDK_VARIANTS
+else
+# If SDK_VARIANTS is defined, but SDK_CHIPS is not.
+ifneq (,$(SDK_VARIANTS))
+$(error 'Specifying SDK_VARIANTS requires a non-empty SDK_CHIPS')
+endif # SDK_VARIANTS
+endif # SDK_CHIPS
diff --git a/platform/broadcom/saibcm-modules/sdklt/sal/include/sal/sal_libc.h b/platform/broadcom/saibcm-modules/sdklt/sal/include/sal/sal_libc.h
new file mode 100644
index 000000000..10413f08b
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/sal/include/sal/sal_libc.h
@@ -0,0 +1,266 @@
+/*! \file sal_libc.h
+ *
+ * STandard C functions.
+ *
+ */
+/*
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ */
+
+#ifndef SAL_LIBC_H
+#define SAL_LIBC_H
+
+#include <sal/sal_types.h>
+
+/* System MUST supply stdarg.h */
+#include <linux/stdarg.h>
+
+/*!
+ * \cond SAL_STDC
+ *
+ * Standard C library functions.
+ */
+
+#ifndef sal_memcmp
+extern int sal_memcmp(const void *s1, const void *s2, size_t cnt);
+#endif
+
+#ifndef sal_memcpy
+extern void *sal_memcpy(void *dest, const void *src, size_t cnt);
+#endif
+
+#ifndef sal_memset
+extern void *sal_memset(void *dest, int c, size_t cnt);
+#endif
+
+#ifndef sal_memmove
+extern void *sal_memmove(void *dest, const void *src, size_t cnt);
+#endif
+
+#ifndef sal_strcpy
+extern char *sal_strcpy(char *dest, const char *src);
+#endif
+
+#ifndef sal_strncpy
+extern char *sal_strncpy(char *dest, const char *src, size_t cnt);
+#endif
+
+#ifndef sal_strlen
+extern size_t sal_strlen(const char *str);
+#endif
+
+#ifndef sal_strcmp
+extern int sal_strcmp(const char *dest, const char *src);
+#endif
+
+#ifndef sal_strncmp
+extern int sal_strncmp(const char *dest, const char *src, size_t cnt);
+#endif
+
+#ifndef sal_strchr
+extern char *sal_strchr(const char *dest, int c);
+#endif
+
+#ifndef sal_strrchr
+extern char *sal_strrchr(const char *dest, int c);
+#endif
+
+#ifndef sal_strstr
+extern char *sal_strstr(const char *dest, const char *src);
+#endif
+
+#ifndef sal_strcat
+extern char *sal_strcat(char *dest, const char *src);
+#endif
+
+#ifndef sal_strncat
+extern char *sal_strncat(char *dest, const char *src, size_t cnt);
+#endif
+
+/* ANSI/ISO ctype.h */
+
+#ifndef sal_tolower
+extern char sal_tolower(char c);
+#endif
+
+#ifndef sal_toupper
+extern char sal_toupper(char c);
+#endif
+
+#ifndef sal_isspace
+extern int sal_isspace(int c);
+#endif
+
+#ifndef sal_isupper
+extern int sal_isupper(int c);
+#endif
+
+#ifndef sal_islower
+extern int sal_islower(int c);
+#endif
+
+#ifndef sal_isalpha
+extern int sal_isalpha(int c);
+#endif
+
+#ifndef sal_isdigit
+extern int sal_isdigit(int c);
+#endif
+
+#ifndef sal_isalnum
+extern int sal_isalnum(int c);
+#endif
+
+#ifndef sal_isxdigit
+extern int sal_isxdigit(int c);
+#endif
+
+/* ANSI/ISO stdlib.h */
+
+#ifndef sal_strtol
+extern long sal_strtol(const char *s, char **end, int base);
+#endif
+
+#ifndef sal_strtoul
+extern unsigned long sal_strtoul(const char *s, char **end, int base);
+#endif
+
+#ifndef sal_strtoll
+extern long long sal_strtoll(const char *s, char **end, int base);
+#endif
+
+#ifndef sal_strtoull
+extern unsigned long long sal_strtoull(const char *s, char **end, int base);
+#endif
+
+#ifndef sal_atoi
+extern int sal_atoi(const char *s);
+#endif
+
+#ifndef sal_abs
+extern int sal_abs(int j);
+#endif
+
+#ifndef RAND_MAX
+#define RAND_MAX 32767
+#endif
+
+#ifndef sal_rand
+extern int sal_rand(void);
+#endif
+
+#ifndef sal_srand
+extern void sal_srand(unsigned seed);
+#endif
+
+#ifndef sal_qsort
+extern void sal_qsort(void *arr, size_t numel,
+                      size_t elsz, int (*cmpfn)(const void *, const void *));
+#endif
+
+#ifndef sal_bsearch
+extern void *sal_bsearch(const void *el, const void *arr, size_t numel,
+                         size_t elsz, int (*cmpfn)(const void *, const void *));
+#endif
+
+/* ANSI/ISO stdio.h */
+
+#ifndef sal_vsnprintf
+extern int sal_vsnprintf(char *buf, size_t bufsz, const char *fmt, va_list ap);
+#endif
+
+#ifndef sal_vsprintf
+extern int sal_vsprintf(char *buf, const char *fmt, va_list ap);
+#endif
+
+#ifndef sal_snprintf
+extern int sal_snprintf(char *buf, size_t bufsz, const char *fmt, ...);
+#endif
+
+#ifndef sal_sprintf
+extern int sal_sprintf(char *buf, const char *fmt, ...);
+#endif
+
+
+/* Non-standard ANSI/ISO functions */
+
+#ifndef sal_strcasecmp
+extern int sal_strcasecmp(const char *dest, const char *src);
+#endif
+
+#ifndef sal_strncasecmp
+extern int sal_strncasecmp(const char *dest, const char *src, size_t cnt);
+#endif
+
+#ifndef sal_strlcpy
+extern size_t sal_strlcpy(char *dest, const char *src, size_t cnt);
+#endif
+
+#ifndef sal_strupr
+extern void sal_strupr(char *s);
+#endif
+
+#ifndef sal_strlwr
+extern void sal_strlwr(char *s);
+#endif
+
+#ifndef sal_strnchr
+extern char *sal_strnchr(const char *dest, int c, size_t cnt);
+#endif
+
+#ifndef sal_strtok_r
+extern char *sal_strtok_r(char *s1, const char *delim, char **s2);
+#endif
+
+#ifndef sal_strcasestr
+extern char *sal_strcasestr(const char *dest, const char *src);
+#endif
+
+/*!
+ * End of standard C library functions.
+ *
+ * \endcond
+ */
+
+/* Special SAL library functions */
+
+#ifndef sal_ctoi
+/*!
+ * \brief Convert a string to an int type.
+ *
+ * Similar to atoi, but in addition to 0x it also reconizes prefix 0b
+ * for binary numbers (e.g. 0b10010) and 0 for octal numbers
+ * (e.g. 0347).
+ *
+ * If not NULL, the \c end pointer will be updated with the address of
+ * the first invalid character in the string. The functionality of \c
+ * end is similar to that of standard C \c strtol.
+ *
+ * \param [in] s Input string,
+ * \param [out] end Pointer to first invalid character in \c s.
+ *
+ * \return Parsed integer value of input string.
+ */
+extern int sal_ctoi(const char *s, char **end);
+#endif
+
+
+/*! Internal marker used by sal_vsnprintf. */
+#ifndef SAL_VSNPRINTF_X_INF
+#define SAL_VSNPRINTF_X_INF     0x7ff0
+#endif
+
+#endif /* SAL_LIBC_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/sal/include/sal/sal_linux.h b/platform/broadcom/saibcm-modules/sdklt/sal/include/sal/sal_linux.h
new file mode 100644
index 000000000..e24b073ff
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/sal/include/sal/sal_linux.h
@@ -0,0 +1,170 @@
+/*! \file sal_linux.h
+ *
+ * Convenience file for mapping SAL C library functions to Linux.
+ *
+ * The main purpose of this file is to allow shared SDK source files
+ * to be used for building Linux kernel modules.
+ *
+ */
+/*
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ */
+
+#ifndef SAL_LINUX_H
+#define SAL_LINUX_H
+
+#if !defined(SAL_CONFIG_H) || !defined(SAL_LINUX)
+
+/*
+ * If we get here it means that some file other than sal_config.h
+ * included this file before sal_config.h did.
+ */
+#error sal_linux.h file cannot be included by regular source files
+
+#else
+
+/*!
+ * \cond SAL_LINUX
+ */
+
+#include <linux/types.h>
+#define SAL_CONFIG_DEFINE_SIZE_T        0
+#define SAL_CONFIG_DEFINE_UINT8_T       0
+#define SAL_CONFIG_DEFINE_UINT16_T      0
+#define SAL_CONFIG_DEFINE_UINT32_T      0
+#define SAL_CONFIG_DEFINE_UINT64_T      0
+#define SAL_CONFIG_DEFINE_UINTPTR_T     0
+#define SAL_CONFIG_DEFINE_INT8_T        0
+#define SAL_CONFIG_DEFINE_INT16_T       0
+#define SAL_CONFIG_DEFINE_INT32_T       0
+#define SAL_CONFIG_DEFINE_INT64_T       0
+#define SAL_CONFIG_DEFINE_PRIu32        0
+#define SAL_CONFIG_DEFINE_PRId32        0
+#define SAL_CONFIG_DEFINE_PRIx32        0
+#define SAL_CONFIG_DEFINE_PRIu64        0
+#define SAL_CONFIG_DEFINE_PRId64        0
+#define SAL_CONFIG_DEFINE_PRIx64        0
+#define SAL_CONFIG_DEFINE_BOOL_T        0
+#define SAL_CONFIG_DEFINE_DMA_ADDR_T    0
+
+#include <linux/string.h>
+#ifndef sal_memcmp
+#define sal_memcmp memcmp
+#endif
+#ifndef sal_memcpy
+#define sal_memcpy memcpy
+#endif
+#ifndef sal_memset
+#define sal_memset memset
+#endif
+#ifndef sal_memmove
+#define sal_memmove memmove
+#endif
+#ifndef sal_strcpy
+#define sal_strcpy strcpy
+#endif
+#ifndef sal_strncpy
+#define sal_strncpy strncpy
+#endif
+#ifndef sal_strlen
+#define sal_strlen strlen
+#endif
+#ifndef sal_strcmp
+#define sal_strcmp strcmp
+#endif
+#ifndef sal_strncmp
+#define sal_strncmp strncmp
+#endif
+#ifndef sal_strchr
+#define sal_strchr strchr
+#endif
+#ifndef sal_strrchr
+#define sal_strrchr strrchr
+#endif
+#ifndef sal_strstr
+#define sal_strstr strstr
+#endif
+#ifndef sal_strcat
+#define sal_strcat strcat
+#endif
+#ifndef sal_strncat
+#define sal_strncat strncat
+#endif
+#ifndef sal_strcasecmp
+#define sal_strcasecmp strcasecmp
+#endif
+#ifndef sal_strncasecmp
+#define sal_strncasecmp strncasecmp
+#endif
+
+#include <linux/ctype.h>
+#ifndef sal_tolower
+#define sal_tolower tolower
+#endif
+#ifndef sal_toupper
+#define sal_toupper toupper
+#endif
+#ifndef sal_isspace
+#define sal_isspace isspace
+#endif
+#ifndef sal_isupper
+#define sal_isupper isupper
+#endif
+#ifndef sal_islower
+#define sal_islower islower
+#endif
+#ifndef sal_isalpha
+#define sal_isalpha isalpha
+#endif
+#ifndef sal_isdigit
+#define sal_isdigit isdigit
+#endif
+#ifndef sal_isalnum
+#define sal_isalnum isalnum
+#endif
+#ifndef sal_isxdigit
+#define sal_isxdigit isxdigit
+#endif
+
+#include <linux/kernel.h>
+#ifndef sal_vsnprintf
+#define sal_vsnprintf vsnprintf
+#endif
+#ifndef sal_vsprintf
+#define sal_vsprintf vsprintf
+#endif
+#ifndef sal_snprintf
+#define sal_snprintf snprintf
+#endif
+#ifndef sal_sprintf
+#define sal_sprintf sprintf
+#endif
+
+/*!
+ * \endcond
+ */
+
+#endif /* SAL_CONFIG_H */
+
+#else
+
+/*
+ * If we get here it means that some file other than sal_config.h
+ * included this file after sal_config.h already included it once.
+ */
+#error sal_linux.h file cannot be included by regular source files
+
+#endif /* SAL_LINUX_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/sal/include/sal/sal_types.h b/platform/broadcom/saibcm-modules/sdklt/sal/include/sal/sal_types.h
new file mode 100644
index 000000000..2ca0dcd40
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/sal/include/sal/sal_types.h
@@ -0,0 +1,154 @@
+/*! \file sal_types.h
+ *
+ * Basic types and convenience macros.
+ *
+ */
+/*
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ */
+
+#ifndef SAL_TYPES_H
+#define SAL_TYPES_H
+
+#include <sal_config.h>
+
+/*!
+ * \cond SAL_TYPES
+ */
+
+#if SAL_CONFIG_DEFINE_UINT8_T == 1
+typedef SAL_CONFIG_TYPE_UINT8_T uint8_t;
+#endif
+
+#if SAL_CONFIG_DEFINE_UINT16_T == 1
+typedef SAL_CONFIG_TYPE_UINT16_T uint16_t;
+#endif
+
+#if SAL_CONFIG_DEFINE_UINT32_T == 1
+typedef SAL_CONFIG_TYPE_UINT32_T uint32_t;
+#endif
+
+#if SAL_CONFIG_DEFINE_UINT64_T == 1
+typedef SAL_CONFIG_TYPE_UINT64_T uint64_t;
+#endif
+
+#if SAL_CONFIG_DEFINE_UINTPTR_T == 1
+typedef SAL_CONFIG_TYPE_UINTPTR_T uintptr_t;
+#endif
+
+#if SAL_CONFIG_DEFINE_INT8_T == 1
+typedef SAL_CONFIG_TYPE_INT8_T int8_t;
+#endif
+
+#if SAL_CONFIG_DEFINE_INT16_T == 1
+typedef SAL_CONFIG_TYPE_INT16_T int16_t;
+#endif
+
+#if SAL_CONFIG_DEFINE_INT32_T == 1
+typedef SAL_CONFIG_TYPE_INT32_T int32_t;
+#endif
+
+#if SAL_CONFIG_DEFINE_INT64_T == 1
+typedef SAL_CONFIG_TYPE_INT64_T int64_t;
+#endif
+
+#if SAL_CONFIG_DEFINE_SIZE_T == 1
+typedef SAL_CONFIG_TYPE_SIZE_T size_t;
+#endif
+
+#if SAL_CONFIG_DEFINE_BOOL_T == 1
+typedef SAL_CONFIG_TYPE_BOOL_T bool;
+#endif
+
+#if SAL_CONFIG_DEFINE_DMA_ADDR_T == 1
+typedef SAL_CONFIG_TYPE_DMA_ADDR_T dma_addr_t;
+#endif
+
+#if SAL_CONFIG_DEFINE_PRIu32 == 1
+#define PRIu32 SAL_CONFIG_MACRO_PRIu32
+#endif
+
+#if SAL_CONFIG_DEFINE_PRId32 == 1
+#define PRId32 SAL_CONFIG_MACRO_PRId32
+#endif
+
+#if SAL_CONFIG_DEFINE_PRIx32 == 1
+#define PRIx32 SAL_CONFIG_MACRO_PRIx32
+#endif
+
+#if SAL_CONFIG_DEFINE_PRIu64 == 1
+#define PRIu64 SAL_CONFIG_MACRO_PRIu64
+#endif
+
+#if SAL_CONFIG_DEFINE_PRId64 == 1
+#define PRId64 SAL_CONFIG_MACRO_PRId64
+#endif
+
+#if SAL_CONFIG_DEFINE_PRIx64 == 1
+#define PRIx64 SAL_CONFIG_MACRO_PRIx64
+#endif
+
+#ifndef offsetof
+#define offsetof(_s, _m) ((unsigned long)&(((_s *)0)->_m))
+#endif
+
+#ifndef NULL
+#define NULL (void*)0
+#endif
+
+#ifndef STATIC
+#define STATIC static
+#endif
+
+#ifndef VOLATILE
+#define VOLATILE volatile
+#endif
+
+#ifndef TRUE
+#define TRUE 1
+#endif
+
+#ifndef FALSE
+#define FALSE 0
+#endif
+
+#ifndef COUNTOF
+#define COUNTOF(ary) ((int) (sizeof(ary) / sizeof((ary)[0])))
+#endif
+
+#ifndef COMPILER_REFERENCE
+#define COMPILER_REFERENCE(_a) ((void)(_a))
+#endif
+
+/*!
+ * Compiler attribute keyword.
+ *
+ * We use this only for enhanced code validation, so it does not need
+ * to be fully portable.
+ */
+#ifndef SAL_ATTR
+#  if defined(__GNUC__) && !defined(__PEDANTIC__)
+#    define SAL_ATTR(_a) __attribute__(_a)
+#  else
+#    define SAL_ATTR(_a)
+#  endif
+#endif
+
+/*!
+ * \endcond
+ */
+
+#endif /* SAL_TYPES_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/sal/include/sal_config.h b/platform/broadcom/saibcm-modules/sdklt/sal/include/sal_config.h
new file mode 100644
index 000000000..6778b010d
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/sal/include/sal_config.h
@@ -0,0 +1,254 @@
+/*! \file sal_config.h
+ *
+ * Broadcom System Abstraction Layer (SAL) configuration
+ *
+ */
+/*
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ */
+
+#ifndef SAL_CONFIG_H
+#define SAL_CONFIG_H
+
+/*
+ * Include system config file if specified:
+ */
+#ifdef SAL_INCLUDE_CUSTOM_CONFIG
+#include <sal_custom_config.h>
+#endif
+
+/*
+ * Optionally use Linux C library and header files:
+ */
+#ifdef SAL_LINUX
+#include <sal/sal_linux.h>
+/* Linux implies no standard C (see below) */
+#ifndef SAL_NO_STDC
+#define SAL_NO_STDC
+#endif
+#endif
+
+/*
+ * Use standard C library and header files by default:
+ */
+#ifndef SAL_NO_STDC
+#include <sal/sal_stdc.h>
+#endif
+
+/*!
+ * \cond SAL_CONFIG
+ */
+
+/* Type uint8_t is not provided by the system */
+#ifndef SAL_CONFIG_DEFINE_UINT8_T
+#define SAL_CONFIG_DEFINE_UINT8_T               1
+#endif
+
+/* Default type definition for uint8_t */
+#ifndef SAL_CONFIG_TYPE_UINT8_T
+#define SAL_CONFIG_TYPE_UINT8_T                 unsigned char
+#endif
+
+/* Type uint16_t is not provided by the system */
+#ifndef SAL_CONFIG_DEFINE_UINT16_T
+#define SAL_CONFIG_DEFINE_UINT16_T              1
+#endif
+
+/* Default type definition for uint16_t */
+#ifndef SAL_CONFIG_TYPE_UINT16_T
+#define SAL_CONFIG_TYPE_UINT16_T                unsigned short
+#endif
+
+/* Type uint32_t is not provided by the system */
+#ifndef SAL_CONFIG_DEFINE_UINT32_T
+#define SAL_CONFIG_DEFINE_UINT32_T              1
+#endif
+
+/* Default type definition for uint32_t */
+#ifndef SAL_CONFIG_TYPE_UINT32_T
+#define SAL_CONFIG_TYPE_UINT32_T                unsigned int
+#endif
+
+/* Type uint64_t is not provided by the system */
+#ifndef SAL_CONFIG_DEFINE_UINT64_T
+#define SAL_CONFIG_DEFINE_UINT64_T              1
+#endif
+
+/* Default type definition for uint64_t */
+#ifndef SAL_CONFIG_TYPE_UINT64_T
+#define SAL_CONFIG_TYPE_UINT64_T                unsigned long long
+#endif
+
+/* Type uintptr_t is not provided by the system */
+#ifndef SAL_CONFIG_DEFINE_UINTPTR_T
+#define SAL_CONFIG_DEFINE_UINTPTR_T              1
+#endif
+
+/* Default type definition for uintptr_t */
+#ifndef SAL_CONFIG_TYPE_UINTPTR_T
+#define SAL_CONFIG_TYPE_UINTPTR_T               unsigned long long
+#endif
+
+/* Type int8_t is not provided by the system */
+#ifndef SAL_CONFIG_DEFINE_INT8_T
+#define SAL_CONFIG_DEFINE_INT8_T                1
+#endif
+
+/* Default type definition for int8_t */
+#ifndef SAL_CONFIG_TYPE_INT8_T
+#define SAL_CONFIG_TYPE_INT8_T                  signed char
+#endif
+
+/* Type int16_t is not provided by the system */
+#ifndef SAL_CONFIG_DEFINE_INT16_T
+#define SAL_CONFIG_DEFINE_INT16_T               1
+#endif
+
+/* Default type definition for int16_t */
+#ifndef SAL_CONFIG_TYPE_INT16_T
+#define SAL_CONFIG_TYPE_INT16_T                 signed short
+#endif
+
+/* Type int32_t is not provided by the system */
+#ifndef SAL_CONFIG_DEFINE_INT32_T
+#define SAL_CONFIG_DEFINE_INT32_T               1
+#endif
+
+/* Default type definition for int32_t */
+#ifndef SAL_CONFIG_TYPE_INT32_T
+#define SAL_CONFIG_TYPE_INT32_T                 signed int
+#endif
+
+/* Type int64_t is not provided by the system */
+#ifndef SAL_CONFIG_DEFINE_INT64_T
+#define SAL_CONFIG_DEFINE_INT64_T               1
+#endif
+
+/* Default type definition for int64_t */
+#ifndef SAL_CONFIG_TYPE_INT64_T
+#define SAL_CONFIG_TYPE_INT64_T                 signed long long
+#endif
+
+/* Type size_t is not provided by the system */
+#ifndef SAL_CONFIG_DEFINE_SIZE_T
+#define SAL_CONFIG_DEFINE_SIZE_T                1
+#endif
+
+/* Default type definition for size_t */
+#ifndef SAL_CONFIG_TYPE_SIZE_T
+#define SAL_CONFIG_TYPE_SIZE_T                  unsigned int
+#endif
+
+/* Type bool is not provided by the system */
+#ifndef SAL_CONFIG_DEFINE_BOOL_T
+#define SAL_CONFIG_DEFINE_BOOL_T                1
+#endif
+
+/* Default type definition for bool */
+#ifndef SAL_CONFIG_TYPE_BOOL_T
+#define SAL_CONFIG_TYPE_BOOL_T                  enum { false = 0, true = 1 }
+#endif
+
+/* Type dma_addr_t is not provided by the system */
+#ifndef SAL_CONFIG_DEFINE_DMA_ADDR_T
+#define SAL_CONFIG_DEFINE_DMA_ADDR_T            1
+#endif
+
+/* Default type definition for dma_addr_t */
+#ifndef SAL_CONFIG_TYPE_DMA_ADDR_T
+#define SAL_CONFIG_TYPE_DMA_ADDR_T              unsigned int
+#endif
+
+/* Formatting macro SAL_PRIu32 is not provided by the system */
+#ifndef SAL_CONFIG_DEFINE_PRIu32
+#define SAL_CONFIG_DEFINE_PRIu32                1
+#endif
+
+/* Default definition for formatting macro SAL_PRIu32 */
+#ifndef SAL_CONFIG_MACRO_PRIu32
+#define SAL_CONFIG_MACRO_PRIu32                 "u"
+#endif
+
+/* Formatting macro SAL_PRId32 is not provided by the system */
+#ifndef SAL_CONFIG_DEFINE_PRId32
+#define SAL_CONFIG_DEFINE_PRId32                1
+#endif
+
+/* Default definition for formatting macro SAL_PRId32 */
+#ifndef SAL_CONFIG_MACRO_PRId32
+#define SAL_CONFIG_MACRO_PRId32                 "d"
+#endif
+
+/* Formatting macro SAL_PRIx32 is not provided by the system */
+#ifndef SAL_CONFIG_DEFINE_PRIx32
+#define SAL_CONFIG_DEFINE_PRIx32                1
+#endif
+
+/* Default definition for formatting macro SAL_PRIx32 */
+#ifndef SAL_CONFIG_MACRO_PRIx32
+#define SAL_CONFIG_MACRO_PRIx32                 "x"
+#endif
+
+/* Formatting macro SAL_PRIu64 is not provided by the system */
+#ifndef SAL_CONFIG_DEFINE_PRIu64
+#define SAL_CONFIG_DEFINE_PRIu64                1
+#endif
+
+/* Default definition for formatting macro SAL_PRIu64 */
+#ifndef SAL_CONFIG_MACRO_PRIu64
+#define SAL_CONFIG_MACRO_PRIu64                 "llu"
+#endif
+
+/* Formatting macro SAL_PRId64 is not provided by the system */
+#ifndef SAL_CONFIG_DEFINE_PRId64
+#define SAL_CONFIG_DEFINE_PRId64                1
+#endif
+
+/* Default definition for formatting macro SAL_PRId64 */
+#ifndef SAL_CONFIG_MACRO_PRId64
+#define SAL_CONFIG_MACRO_PRId64                 "lld"
+#endif
+
+/* Formatting macro SAL_PRIx64 is not provided by the system */
+#ifndef SAL_CONFIG_DEFINE_PRIx64
+#define SAL_CONFIG_DEFINE_PRIx64                1
+#endif
+
+/* Default definition for formatting macro SAL_PRIx64 */
+#ifndef SAL_CONFIG_MACRO_PRIx64
+#define SAL_CONFIG_MACRO_PRIx64                 "llx"
+#endif
+
+/* Assert macro is not provided by the system */
+#ifndef SAL_CONFIG_DEFINE_ASSERT
+#define SAL_CONFIG_DEFINE_ASSERT                1
+#endif
+
+/* Default definition for assert macro */
+#ifndef SAL_CONFIG_MACRO_ASSERT
+#define SAL_CONFIG_MACRO_ASSERT                 SAL_ASSERT_DEFAULT
+#endif
+
+/* Memory Barrier if necessary */
+#ifndef SAL_CONFIG_MEMORY_BARRIER
+#define SAL_CONFIG_MEMORY_BARRIER               ;
+#endif
+
+/*!
+ * \endcond
+ */
+
+#endif /* SAL_CONFIG_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/shr/bitop/shr_bitop_range_clear.c b/platform/broadcom/saibcm-modules/sdklt/shr/bitop/shr_bitop_range_clear.c
new file mode 100644
index 000000000..307014215
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/shr/bitop/shr_bitop_range_clear.c
@@ -0,0 +1,79 @@
+/*! \file shr_bitop_range_clear.c
+ *
+ * Bit array operations.
+ *
+ */
+/*
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ */
+
+#include <shr/shr_bitop.h>
+
+/*!
+ * INTERNAL USE ONLY.
+ *
+ * Same as shr_bitop_range_clear, but for a single SHR_BITDCL.
+ */
+static inline void
+shr_bitop_range_clear_one_bitdcl(SHR_BITDCL *a, int offs, int n)
+{
+    SHR_BITDCL mask = ~0;
+
+    mask >>= (SHR_BITWID - n);
+    mask <<= offs;
+    *a &= ~mask;
+}
+
+/*!
+ * \brief Clear range of bits in a bit array.
+ *
+ * INTERNAL USE ONLY.
+ *
+ * Refer to \ref SHR_BITCLR_RANGE macro.
+ */
+void
+shr_bitop_range_clear(SHR_BITDCL *a, int offs, int n)
+{
+    SHR_BITDCL *pa;
+    int woffs, wremain;
+
+    if (n <= 0) {
+        return;
+    }
+
+    pa = a + (offs / SHR_BITWID);
+
+    woffs = offs % SHR_BITWID;
+
+    if (woffs != 0) {
+        wremain = SHR_BITWID - woffs;
+        if (n <= wremain) {
+            shr_bitop_range_clear_one_bitdcl(pa, woffs, n);
+            return;
+        }
+        shr_bitop_range_clear_one_bitdcl(pa, woffs, wremain);
+        n -= wremain;
+        ++pa;
+    }
+    while (n >= SHR_BITWID) {
+        *(pa++) = 0;
+        n -= SHR_BITWID;
+    }
+
+    if (n > 0) {
+        shr_bitop_range_clear_one_bitdcl(pa, 0, n);
+    }
+}
diff --git a/platform/broadcom/saibcm-modules/sdklt/shr/include/shr/shr_bitop.h b/platform/broadcom/saibcm-modules/sdklt/shr/include/shr/shr_bitop.h
new file mode 100644
index 000000000..c213fdcf2
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/shr/include/shr/shr_bitop.h
@@ -0,0 +1,411 @@
+/*! \file shr_bitop.h
+ *
+ * Bit array library.
+ *
+ * The macros provided by this library allows the user to declare and
+ * operate on bit arrays of arbitrary size.
+ *
+ * In addition to macros for setting, clearing and testing individual
+ * bits, there are macros for performing various operations on ranges
+ * of bits within one or between two bit arrays.
+ *
+ */
+/*
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ */
+
+#ifndef SHR_BITOP_H
+#define SHR_BITOP_H
+
+#include <sal/sal_libc.h>
+
+/*!
+ * Base type for bit arrays. This type is essentially a block of bits,
+ * and each block contains \ref SHR_BITWID bits.
+ */
+#define SHR_BITDCL      uint32_t
+
+/*!
+ * Number of bits in a bit array base type (\ref SHR_BITDCL). An
+ * applcation should normally not care about the size of the bit
+ * array base type.
+ */
+#define SHR_BITWID      32
+
+/*! \cond */
+/*
+ *--------------------------------------------------------------------------
+ *
+ * The following functions and macros should not be called directly.
+ */
+extern void
+shr_bitop_range_clear(SHR_BITDCL *a, int offs, int n);
+
+extern void
+shr_bitop_range_set(SHR_BITDCL *a, int offs, int n);
+
+extern void
+shr_bitop_range_copy(SHR_BITDCL *a1, int offs1, const SHR_BITDCL *a2,
+                     int offs2, int n);
+
+extern int
+shr_bitop_range_null(const SHR_BITDCL *a,
+                     int offs, int n);
+
+extern int
+shr_bitop_range_eq(const SHR_BITDCL *a1, const SHR_BITDCL *a2,
+                   int offs, int n);
+
+extern void
+shr_bitop_range_count(const SHR_BITDCL *a,
+                      int offs, int n, int *count);
+
+extern void
+shr_bitop_range_and(const SHR_BITDCL *a1, const SHR_BITDCL *a2,
+                    int offs, int n, SHR_BITDCL *dest);
+
+extern void
+shr_bitop_range_or(const SHR_BITDCL *a1, const SHR_BITDCL *a2,
+                   int offs, int n, SHR_BITDCL *dest);
+
+extern void
+shr_bitop_range_xor(const SHR_BITDCL *a1, const SHR_BITDCL *a2,
+                    int offs, int n, SHR_BITDCL *dest);
+
+extern void
+shr_bitop_range_remove(const SHR_BITDCL *a1, const SHR_BITDCL *a2,
+                       int offs, int n, SHR_BITDCL *dest);
+
+extern void
+shr_bitop_range_negate(const SHR_BITDCL *a1,
+                       int offs, int n, SHR_BITDCL *dest);
+
+extern int
+shr_bitop_str_decode(const char *str, SHR_BITDCL *dest, int max_bitdcl);
+
+/*!
+ * Number of SHR_BITDCLs needed to contain _max bits, i.e. the \ref
+ * SHR_BITWID-aligned number of bits needed to support _max bits.
+ */
+#define SHRi_BITDCLSIZE(_max) \
+    (((_max) + SHR_BITWID - 1) / SHR_BITWID)
+
+/*!
+ * Generic operation macro on bit array _a, with bit _b. Used for
+ * public set/clear/test macros.
+ */
+#define SHRi_BITOP(_a, _b, _op)    \
+        (((_a)[(_b) / SHR_BITWID]) _op (1U << ((_b) % SHR_BITWID)))
+
+/*
+ * End of internal functions and macros.
+ *--------------------------------------------------------------------------
+ */
+/*! \endcond */
+
+/*!
+ * Size in bytes of a bit array containing _max bits.
+ *
+ * This size is useful when calling malloc, memcpy, etc.
+ */
+#define SHR_BITALLOCSIZE(_max) \
+    (SHRi_BITDCLSIZE(_max) * sizeof (SHR_BITDCL))
+
+/*!
+ * Declare bit array _name of size _max bits.
+ *
+ * Used for declaring a bit array on the stack (or as a static).
+ *
+ * For example, to declare an array containing 80 bits:
+ *
+ * \code{.c}
+ * void my_func(void)
+ * {
+ *     SHR_BITDCLNAME(my_bit_array, 80);
+ *     ...
+ * }
+ * \endcode
+ */
+#define SHR_BITDCLNAME(_name, _max) \
+    SHR_BITDCL _name[SHRi_BITDCLSIZE(_max)]
+
+/*!
+ * \brief Test if a bit is set in a bit array.
+ *
+ * \param [in] _a Bit array to operate on
+ * \param [in] _b Bit number to test (first is 0)
+ *
+ * \return 0 if not set, otherwise non-zero.
+ */
+#define SHR_BITGET(_a, _b) \
+    SHRi_BITOP(_a, _b, &)
+
+/*!
+ * \brief Set a bit in a bit array.
+ *
+ * \param [in] _a Bit array to operate on
+ * \param [in] _b Bit number to set (first is 0)
+ *
+ * \return Nothing
+ */
+#define SHR_BITSET(_a, _b) \
+    SHRi_BITOP(_a, _b, |=)
+
+/*!
+ * \brief Clear a bit in a bit array.
+ *
+ * \param [in] _a Bit array to operate on
+ * \param [in] _b Bit number to clear (first is 0)
+ *
+ * \return Nothing
+ */
+#define SHR_BITCLR(_a, _b) \
+    SHRi_BITOP(_a, _b, &= ~)
+
+/*!
+ * \brief Iterate over bits in bit array.
+ *
+ * Used to perform a specific action for all the bits which are set in
+ * a bit array.
+ *
+ * Example:
+ *
+ * \code{.c}
+ * #define MAX_BITS 80
+ *
+ * static SHR_BITDCLNAME(my_bit_array, MAX_BITS);
+ *
+ * void my_biterator(void)
+ * {
+ *     int bitnum;
+ *
+ *     SHR_BIT_ITER(my_bit_array, MAX_BITS, bitnum) {
+ *         printf("Bit number %d is set\n", bitnum);
+ *     }
+ * }
+ * \endcode
+ *
+ * \param [in] _a Bit array to iterate over
+ * \param [in] _max Number of bits to iterate over (starting from 0)
+ * \param [in] _b Iterator variable (should be same type as _max)
+ */
+#define SHR_BIT_ITER(_a, _max, _b)               \
+    for ((_b) = 0; (_b) < (_max); (_b)++)        \
+        if ((_a)[(_b) / SHR_BITWID] == 0)        \
+            (_b) += (SHR_BITWID - 1);            \
+        else if (SHR_BITGET((_a), (_b)))
+
+/*!
+ * \brief Set range of bits in a bit array.
+ *
+ * This macro sets a specified range of bits within a bit array.
+ *
+ * \param [in] _a Bit array in which to set bits
+ * \param [in] _offs Offset (in bits) into the array
+ * \param [in] _n Number of bits to clear
+ *
+ * \return Nothing
+ */
+#define SHR_BITSET_RANGE(_a, _offs, _n) \
+    (shr_bitop_range_set(_a, _offs, _n))
+
+/*!
+ * \brief Clear range of bits in a bit array.
+ *
+ * This macro clears a specified range of bits within a bit array.
+ *
+ * \param [in] _a Bit array in which to clear bits
+ * \param [in] _offs Offset (in bits) into the array
+ * \param [in] _n Number of bits to clear
+ *
+ * \return Nothing
+ */
+#define SHR_BITCLR_RANGE(_a, _offs, _n) \
+    (shr_bitop_range_clear(_a, _offs, _n))
+
+/*!
+ * \brief Copy a range of bits between two bit arrays.
+ *
+ * This macro copies a range of bits from one bit array to
+ * another. The bit range may reside at different offsets within the
+ * source and destination bit arrays.
+ *
+ * If source and destination are within the same bit array, then the
+ * ranges must not overlap.
+ *
+ * \param [in] _a1 Destination bit array
+ * \param [in] _offs1 Offset (in bits) in destination bit array
+ * \param [in] _a2 Source bit array
+ * \param [in] _offs2 Offset (in bits) in source bit array
+ * \param [in] _n Number of bits to copy
+ *
+ * \return Nothing
+ */
+#define SHR_BITCOPY_RANGE(_a1, _offs1, _a2, _offs2, _n)   \
+    (shr_bitop_range_copy(_a1, _offs1, _a2, _offs2, _n))
+
+/*!
+ * \brief Perform bitwise AND for a range of bits in two bit arrays.
+ *
+ * The destination bit array may the same as one of the source bit
+ * arrays.
+ *
+ * \param [in] _a1 First source bit array
+ * \param [in] _a2 Second source bit array
+ * \param [in] _offs Offset (in bits) in bit array
+ * \param [in] _n Number of bits to operate on
+ * \param [in] _dest Destination bit array
+ *
+ * \return Nothing
+ */
+#define SHR_BITAND_RANGE(_a1, _a2, _offs, _n, _dest) \
+    (shr_bitop_range_and(_a1, _a2, _offs, _n, _dest))
+
+/*!
+ * \brief Perform bitwise OR for a range of bits in two bit arrays.
+ *
+ * This macro performs a logical AND operation between each bit of a
+ * specified range of bits within two bit arrays.
+ *
+ * The destination bit array may the same as one of the source bit
+ * arrays.
+ *
+ * \param [in] _a1 First bit array for operation
+ * \param [in] _a2 Second bit array for operation
+ * \param [in] _offs Offset (in bits) into the arrays
+ * \param [in] _n Number of bits to operate on
+ * \param [in] _dest Destination bit array
+ *
+ * \return Nothing
+ */
+#define SHR_BITOR_RANGE(_a1, _a2, _offs, _n, _dest) \
+    (shr_bitop_range_or(_a1, _a2, _offs, _n, _dest))
+
+/*!
+ * \brief Perform bitwise XOR operation on bit arrays.
+ *
+ * This macro performs a logical XOR operation between each bit of a
+ * specified range of bits within two bit arrays.
+ *
+ * The destination bit array may the same as one of the source bit
+ * arrays.
+ *
+ * \param [in] _a1 First bit array for operation
+ * \param [in] _a2 Second bit array for operation
+ * \param [in] _offs Offset (in bits) into the arrays
+ * \param [in] _n Number of bits to operate on
+ * \param [in] _dest Destination bit array
+ *
+ * \return Nothing
+ */
+#define SHR_BITXOR_RANGE(_a1, _a2, _offs, _n, _dest) \
+    (shr_bitop_range_xor(_a1, _a2, _offs, _n, _dest))
+
+/*!
+ * \brief Clear select bits in a bit array.
+ *
+ * This macro clears bits within a specified range of bits in a bit
+ * array. Only the bits which are set in the supplied mask bit array
+ * will be cleared, i.e. any bit not set in the mask (or outside the
+ * range) are unaffected.
+ *
+ * The destination bit array may the same as the source bit array.
+ *
+ * \param [in] _a1 Source bit array
+ * \param [in] _a2 Mask bit array
+ * \param [in] _offs Offset (in bits) into the arrays
+ * \param [in] _n Number of bits to operate on
+ * \param [in] _dest Destination bit array
+ *
+ * \return Nothing
+ */
+#define SHR_BITREMOVE_RANGE(_a1, _a2, _offs, _n, _dest) \
+    (shr_bitop_range_remove(_a1, _a2, _offs, _n, _dest))
+
+/*!
+ * \brief Negate a range of bits in a bit array.
+ *
+ * This operation is essentially the same as performing an XOR with a
+ * bit array consisting of all 1s.
+ *
+ * \param [in] _a Source bit array
+ * \param [in] _offs Offset (in bits) into the array
+ * \param [in] _n Number of bits to negate
+ * \param [in] _dest Destination bit array
+ */
+#define SHR_BITNEGATE_RANGE(_a, _offs, _n, _dest) \
+    (shr_bitop_range_negate(_a, _offs, _n, _dest))
+
+/*!
+ * \brief Test if bits are cleared in a bit array.
+ *
+ * <long-description>
+ *
+ * \param [in] _a Source bit array
+ * \param [in] _offs Offset (in bits) into the array
+ * \param [in] _n Number of bits to negate
+ *
+ * \return 1 if all bits in range are cleared, otherwise 0.
+ */
+#define SHR_BITNULL_RANGE(_a, _offs, _n) \
+    (shr_bitop_range_null(_a, _offs, _n))
+
+/*!
+ * \brief Test if two bit array bit ranges are equal.
+ *
+ * This macro compares a range of bits at the same offset within two
+ * bit arrays.
+ *
+ * \param [in] _a1 First bit array
+ * \param [in] _a2 Second bit array
+ * \param [in] _offs Offset (in bits) into the arrays
+ * \param [in] _n Number of bits to compare
+ *
+ * \return 1 if all bits in range are equal, otherwise 0.
+ */
+#define SHR_BITEQ_RANGE(_a1, _a2, _offs, _n) \
+    (shr_bitop_range_eq(_a1, _a2, _offs, _n))
+
+/*!
+ * \brief Count the number of bits set in a range of bits in a bit array.
+ *
+ * This macro counts the number of bits that are set in a range of \c
+ * _n bits starting at offset \c _offs within bit array \c _a.
+ *
+ * \param [in] _a Bit array.
+ * \param [out] _count Number of bits set within specified range.
+ * \param [in] _offs Offset into the bit array.
+ * \param [in] _n Number of bits to check.
+ */
+#define SHR_BITCOUNT_RANGE(_a, _count, _offs, _n) \
+    shr_bitop_range_count(_a, _offs, _n, &(_count))
+
+/*!
+ * \brief Decode a string in hex format into a bitmap.
+ *
+ * The string can be more than 32 bits worth of data if it is in hex
+ * format (0x...).  If not hex, it is treated as a 32 bit value.
+ *
+ * \param [in] _str String to decode.
+ * \param [out] _a Bit array where to store decoded data.
+ * \param [in] _max Size of output bit array in bits.
+ *
+ * \retval 0 No errors
+ */
+#define SHR_BITSTR_DECODE(_str, _a, _max) \
+    shr_bitop_str_decode(_str, _a, SHRi_BITDCLSIZE(_max))
+
+#endif /* SHR_BITOP_H */
diff --git a/platform/broadcom/saibcm-modules/sdklt/shr/include/shr/shr_error.h b/platform/broadcom/saibcm-modules/sdklt/shr/include/shr/shr_error.h
index 702e6317f..cca344b3f 100644
--- a/platform/broadcom/saibcm-modules/sdklt/shr/include/shr/shr_error.h
+++ b/platform/broadcom/saibcm-modules/sdklt/shr/include/shr/shr_error.h
@@ -4,7 +4,7 @@
  *
  */
 /*
- * $Copyright: Copyright 2018-2022 Broadcom. All rights reserved.
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
  * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
  * 
  * This program is free software; you can redistribute it and/or
diff --git a/platform/broadcom/saibcm-modules/sdklt/shr/include/shr/shr_types.h b/platform/broadcom/saibcm-modules/sdklt/shr/include/shr/shr_types.h
new file mode 100644
index 000000000..f180585ca
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/sdklt/shr/include/shr/shr_types.h
@@ -0,0 +1,161 @@
+/*! \file shr_types.h
+ *
+ * Shared data types.
+ *
+ */
+/*
+ * $Copyright: Copyright 2018-2023 Broadcom. All rights reserved.
+ * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries.
+ * 
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License 
+ * version 2 as published by the Free Software Foundation.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * A copy of the GNU General Public License version 2 (GPLv2) can
+ * be found in the LICENSES folder.$
+ */
+
+#ifndef SHR_TYPES_H
+#define SHR_TYPES_H
+
+#include <sal/sal_types.h>
+
+/*! IPv4 header version. */
+#define SHR_IPV4_VERSION                4
+
+/*! IPv4 header length in bytes. */
+#define SHR_IPV4_HEADER_LENGTH          20
+
+/*! IPv4 header length in 32-bit words. */
+#define SHR_IPV4_HDR_WLEN               5
+
+/*! IPv4 Address length. */
+#define SHR_IPV4_ADDR_LEN               4
+
+/*! IPv6 header version. */
+#define SHR_IPV6_VERSION                6
+
+/*! IPv6 header length in bytes. */
+#define SHR_IPV6_HEADER_LENGTH          40
+
+/*! IPv6 Address length. */
+#define SHR_IPV6_ADDR_LEN               16
+
+/*! L2 header EthertType for IPv4. */
+#define SHR_L2_ETYPE_IPV4               0x0800
+
+/*! L2 header ether type for IPv6. */
+#define SHR_L2_ETYPE_IPV6               0x86dd
+
+/*! L2 header ether type for MPLS unicast. */
+#define SHR_L2_ETYPE_MPLS_UNICAST       0x8847
+
+/*! L2 ether type length. */
+#define SHR_L2_ETYPE_LEN                2
+
+/*! IP protocol number of UDP. */
+#define SHR_IP_PROTO_UDP                17
+
+/*! IP protocol number of IPV4 (IPv4 in IP encapsulation). */
+#define SHR_IP_PROTO_IPV4               4
+
+/*! IP protocol number of IPV6 (IPv6 in IP encapsulation). */
+#define SHR_IP_PROTO_IPV6               41
+
+/*! IP protocol number of GRE (Generic Routing Encapsulation). */
+#define SHR_IP_PROTO_GRE                47
+
+/*! UDP header length */
+#define SHR_UDP_HDR_LEN                 8
+
+/*! Initial UDP Payload length. */
+#define SHR_UDP_PAYLOAD_LEN             0x10
+
+/*! Length of L2 CRC. */
+#define SHR_L2_CRC_LEN                  4
+
+/*! Ethernet MAC address length. */
+#define SHR_MAC_ADDR_LEN                6
+
+/*! VLAN header length. */
+#define SHR_VLAN_HDR_LEN                4
+
+/*! Generic Routing Encapsulation (GRE) header length. */
+#define SHR_GRE_HDR_LEN                 4
+
+/*! Length of the MPLS header. */
+#define SHR_MPLS_HDR_LEN                4
+
+/*! MPLS Associated Channel Header (ACH) length. */
+#define SHR_MPLS_ACH_LEN                4
+
+/*! Length of the MPLS label. */
+#define SHR_MPLS_LABEL_LEN              3
+
+/*! IPFIX header length */
+#define SHR_IPFIX_HDR_LEN               16
+
+/*! Initial IPFIX Timestamp */
+#define SHR_IPFIX_INITIAL_TIMESTAMP     0
+
+/*! Initial IPFIX Sequence Number */
+#define SHR_IPFIX_INITIAL_SEQNUM        0
+
+/*! Port number type. */
+typedef uint16_t shr_port_t;
+
+/*! Ethernet MAC address type. */
+typedef uint8_t shr_mac_t[SHR_MAC_ADDR_LEN];
+
+/*! Check if Ethernet MAC address is a multicast address. */
+#define SHR_MAC_IS_MCAST(_mac)  \
+    (_mac[0] & 0x1)
+
+/*! Check if Ethernet MAC address is all zeros. */
+#define SHR_MAC_IS_ZERO(_mac)  \
+    (((_mac)[0] | (_mac)[1] | (_mac)[2] | \
+      (_mac)[3] | (_mac)[4] | (_mac)[5]) == 0)
+
+/*! Virtual eXtensible Local Area Network(VxLAN) header length. */
+#define SHR_VXLAN_HDR_LEN               8
+
+/*! VxLAN Network Identifier(VNID) length. */
+#define SHR_VXLAN_VNID_LEN              3
+
+/*! VxLAN Network Identifier type. */
+typedef uint32_t shr_vxlan_vnid_t;
+
+/*! IPv4 address type. */
+typedef uint32_t shr_ip_t;
+
+/*! IPv6 address type. */
+typedef uint8_t shr_ip6_t[SHR_IPV6_ADDR_LEN];
+
+/*!
+ * \brief Enum string map entry.
+ *
+ * This type is intended for mapping enum values to strings, e.g. when
+ * an enum value needs to be printed on the console.
+ *
+ * The complete enum map will be an array of this type, i.e. with one
+ * entry per enum value.
+ *
+ * The type can also be used directly for CLI commands which take an
+ * enum value as a parameter.
+ */
+typedef struct shr_enum_map_s {
+
+    /*! Enum name. */
+    char *name;
+
+    /*! Enum value. */
+    int val;
+
+} shr_enum_map_t;
+
+#endif /* SHR_TYPES_H */
diff --git a/platform/broadcom/saibcm-modules/systems/bde/linux/include/linux-bde.h b/platform/broadcom/saibcm-modules/systems/bde/linux/include/linux-bde.h
index fa8849eb2..b287d3ede 100644
--- a/platform/broadcom/saibcm-modules/systems/bde/linux/include/linux-bde.h
+++ b/platform/broadcom/saibcm-modules/systems/bde/linux/include/linux-bde.h
@@ -1,5 +1,7 @@
-/*
- * Copyright 2007-2020 Broadcom Inc. All rights reserved.
+/***********************************************************************
+ *
+ * $Id: linux-bde.h,v 1.24 Broadcom SDK $
+ * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
  * 
  * Permission is granted to use, copy, modify and/or distribute this
  * software under either one of the licenses below.
@@ -22,13 +24,8 @@
  * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
  * 
  * This software is governed by the Broadcom Open Network Switch APIs license:
- * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa
- */
-/***********************************************************************
- *
- * $Id: linux-bde.h,v 1.24 Broadcom SDK $
- * $Copyright: (c) 2005 Broadcom Corp.
- * All Rights Reserved.$
+ * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+ * 
  *
  * Linux Broadcom Device Enumerators
  *
@@ -244,7 +241,6 @@ extern int lkbde_dev_state_set(int d, uint32 state);
 extern int lkbde_dev_instid_get(int d, uint32 *instid);
 extern int lkbde_dev_instid_set(int d, uint32 instid);
 
-
 /*
  * Return none-zero if the SDK instance with the given instance ID
  * manages the given device.
@@ -263,6 +259,7 @@ extern linux_bde_device_bitmap_t* lkbde_get_inst_devs(uint32 inst_id);
  */
 extern int lkbde_irq_mask_set(int d, uint32 addr, uint32 mask, uint32 fmask);
 extern int lkbde_irq_mask_get(int d, uint32 *mask, uint32 *fmask);
+extern int lkbde_irq_status_get(int d, uint32_t addr, uint32 *status);
 
 #ifdef BCM_SAND_SUPPORT
 extern int lkbde_cpu_write(int d, uint32 addr, uint32 *buf);
diff --git a/platform/broadcom/saibcm-modules/systems/bde/linux/include/linux_dma.h b/platform/broadcom/saibcm-modules/systems/bde/linux/include/linux_dma.h
index c2730c140..f4b3aa74f 100644
--- a/platform/broadcom/saibcm-modules/systems/bde/linux/include/linux_dma.h
+++ b/platform/broadcom/saibcm-modules/systems/bde/linux/include/linux_dma.h
@@ -1,5 +1,7 @@
-/*
- * Copyright 2007-2020 Broadcom Inc. All rights reserved.
+/***********************************************************************
+ *
+ * $Id: linux_dma.h,v 1.24 Broadcom SDK $
+ * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
  * 
  * Permission is granted to use, copy, modify and/or distribute this
  * software under either one of the licenses below.
@@ -22,13 +24,8 @@
  * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
  * 
  * This software is governed by the Broadcom Open Network Switch APIs license:
- * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa
- */
-/***********************************************************************
- *
- * $Id: linux_dma.h,v 1.24 Broadcom SDK $
- * $Copyright: (c) 2016 Broadcom Corp.
- * All Rights Reserved.$
+ * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+ * 
  *
  **********************************************************************/
 
diff --git a/platform/broadcom/saibcm-modules/systems/bde/linux/include/mpool.h b/platform/broadcom/saibcm-modules/systems/bde/linux/include/mpool.h
index 15d496ff6..ca96dc6c9 100644
--- a/platform/broadcom/saibcm-modules/systems/bde/linux/include/mpool.h
+++ b/platform/broadcom/saibcm-modules/systems/bde/linux/include/mpool.h
@@ -1,5 +1,6 @@
 /*
- * Copyright 2007-2020 Broadcom Inc. All rights reserved.
+ * $Id: mpool.h,v 1.2 Broadcom SDK $
+ * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
  * 
  * Permission is granted to use, copy, modify and/or distribute this
  * software under either one of the licenses below.
@@ -22,12 +23,8 @@
  * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
  * 
  * This software is governed by the Broadcom Open Network Switch APIs license:
- * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa
- */
-/*
- * $Id: mpool.h,v 1.2 Broadcom SDK $
- * $Copyright: (c) 2005 Broadcom Corp.
- * All Rights Reserved.$
+ * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+ * 
  */
 
 #ifndef __MPOOL_H__
diff --git a/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/Makefile b/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/Makefile
index 1c3e94815..d771c315d 100644
--- a/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/Makefile
+++ b/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/Makefile
@@ -1,33 +1,30 @@
-#
-#  Copyright 2007-2020 Broadcom Inc. All rights reserved.
-#  
-#  Permission is granted to use, copy, modify and/or distribute this
-#  software under either one of the licenses below.
-#  
-#  License Option 1: GPL
-#  
-#  This program is free software; you can redistribute it and/or modify
-#  it under the terms of the GNU General Public License, version 2, as
-#  published by the Free Software Foundation (the "GPL").
-#  
-#  This program is distributed in the hope that it will be useful, but
-#  WITHOUT ANY WARRANTY; without even the implied warranty of
-#  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
-#  General Public License version 2 (GPLv2) for more details.
-#  
-#  You should have received a copy of the GNU General Public License
-#  version 2 (GPLv2) along with this source code.
-#  
-#  
-#  License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
-#  
-#  This software is governed by the Broadcom Open Network Switch APIs license:
-#  https://www.broadcom.com/products/ethernet-connectivity/software/opennsa
-#
 # -*- Makefile -*-
 # $Id: Makefile,v 1.18 Broadcom SDK $
-# $Copyright: (c) 2005 Broadcom Corp.
-# All Rights Reserved.$
+# $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+# 
+# Permission is granted to use, copy, modify and/or distribute this
+# software under either one of the licenses below.
+# 
+# License Option 1: GPL
+# 
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License, version 2, as
+# published by the Free Software Foundation (the "GPL").
+# 
+# This program is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+# General Public License version 2 (GPLv2) for more details.
+# 
+# You should have received a copy of the GNU General Public License
+# version 2 (GPLv2) along with this source code.
+# 
+# 
+# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
+# 
+# This software is governed by the Broadcom Open Network Switch APIs license:
+# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+# 
 #
 # Makefile for Linux kernel BDE
 #
diff --git a/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/linux-kernel-bde.c b/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/linux-kernel-bde.c
index 0fc8b6343..6b591f75f 100644
--- a/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/linux-kernel-bde.c
+++ b/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/linux-kernel-bde.c
@@ -1,17 +1,29 @@
 /*
- * Copyright 2017 Broadcom
- *
+ * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * 
+ * Permission is granted to use, copy, modify and/or distribute this
+ * software under either one of the licenses below.
+ * 
+ * License Option 1: GPL
+ * 
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License, version 2, as
  * published by the Free Software Foundation (the "GPL").
- *
+ * 
  * This program is distributed in the hope that it will be useful, but
  * WITHOUT ANY WARRANTY; without even the implied warranty of
  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  * General Public License version 2 (GPLv2) for more details.
- *
+ * 
  * You should have received a copy of the GNU General Public License
  * version 2 (GPLv2) along with this source code.
+ * 
+ * 
+ * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
+ * 
+ * This software is governed by the Broadcom Open Network Switch APIs license:
+ * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+ * 
  */
 
 /*
@@ -21,7 +33,6 @@
 #include <gmodule.h>
 #include <linux-bde.h>
 #include <linux_dma.h>
-#include <mpool.h>
 #include <linux/delay.h>
 #include <linux/types.h>
 #include <sdk_config.h>
@@ -627,50 +638,6 @@ _eb_device_create(resource_size_t paddr, int irq, int rd_hw, int wr_hw)
     return 0;
 }
 
-#ifdef BCM_SAND_SUPPORT
-
-#include <soc/devids.h>
-
-static int
-sand_device_create(void)
-{
-#ifndef __DUNE_LINUX_BCM_CPU_PCIE__
-    bde_ctrl_t* ctrl;
-
-    ctrl = _devices; /* on petra, take first device */
-
-
-    ctrl->dev_type |= BDE_PCI_DEV_TYPE | BDE_SWITCH_DEV_TYPE;
-    ctrl->pci_device = NULL; /* No PCI bus */
-
-    /* Map in the device */ /* not realy map anything */
-    ctrl->bde_dev.base_address = (sal_vaddr_t)ioremap(0x40000000, 0x100000);
-    ctrl->iowin[0].addr = 0x40000000;
-    ctrl->iowin[0].size = 0x100000;
-
-    ctrl->iLine = 0;
-    ctrl->isr = NULL;
-    ctrl->isr_data = NULL;
-
-    ctrl->bde_dev.device = BCM88950_DEVICE_ID;
-    ctrl->bde_dev.rev = BCM88950_A0_REV_ID;
-#endif
-
-    /* Map CPU regs */
-#ifdef __DUNE_WRX_BCM_CPU__
-    cpu_address = ioremap(0x18000000, 0x4000000);
-#elif defined(__DUNE_GTO_BCM_CPU__)
-    cpu_address = ioremap(0xe0000000, 0x100000);
-#endif
-
-#ifndef __DUNE_LINUX_BCM_CPU_PCIE__
-    _bde_add_device();
-#endif
-
-    return 0;
-}
-#endif /* BCM_SAND_SUPPORT */
-
 #ifdef IPROC_CMICD
 static void
 iproc_cmicd_get_irqres(ibde_dev_t bde_dev, struct resource *res_irq)
@@ -1437,6 +1404,10 @@ static const struct pci_device_id _id_table[] = {
     { BROADCOM_VENDOR_ID, BCM56671_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
     { BROADCOM_VENDOR_ID, BCM56672_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
     { BROADCOM_VENDOR_ID, BCM56675_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
+    { BROADCOM_VENDOR_ID, BCM53650_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
+    { BROADCOM_VENDOR_ID, BCM53651_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
+    { BROADCOM_VENDOR_ID, BCM53652_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
+    { BROADCOM_VENDOR_ID, BCM53653_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
     { BROADCOM_VENDOR_ID, BCM56568_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
     { BROADCOM_VENDOR_ID, BCM56670_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
     { BROADCOM_VENDOR_ID, BCM56760_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
@@ -1690,8 +1661,42 @@ static const struct pci_device_id _id_table[] = {
     { BROADCOM_VENDOR_ID, BCM8883E_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
     { BROADCOM_VENDOR_ID, BCM8883F_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
 #ifdef BCM_DNX3_SUPPORT
-    { BROADCOM_VENDOR_ID, BCM88860_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
-    { BROADCOM_VENDOR_ID, BCM88870_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
+    { BROADCOM_VENDOR_ID, JERICHO3_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
+    { BROADCOM_VENDOR_ID, JERICHO3_DEVICE_ID + 1, PCI_ANY_ID, PCI_ANY_ID },
+    { BROADCOM_VENDOR_ID, JERICHO3_DEVICE_ID + 2, PCI_ANY_ID, PCI_ANY_ID },
+    { BROADCOM_VENDOR_ID, JERICHO3_DEVICE_ID + 3, PCI_ANY_ID, PCI_ANY_ID },
+    { BROADCOM_VENDOR_ID, JERICHO3_DEVICE_ID + 4, PCI_ANY_ID, PCI_ANY_ID },
+    { BROADCOM_VENDOR_ID, JERICHO3_DEVICE_ID + 5, PCI_ANY_ID, PCI_ANY_ID },
+    { BROADCOM_VENDOR_ID, JERICHO3_DEVICE_ID + 6, PCI_ANY_ID, PCI_ANY_ID },
+    { BROADCOM_VENDOR_ID, JERICHO3_DEVICE_ID + 7, PCI_ANY_ID, PCI_ANY_ID },
+    { BROADCOM_VENDOR_ID, JERICHO3_DEVICE_ID + 8, PCI_ANY_ID, PCI_ANY_ID },
+    { BROADCOM_VENDOR_ID, JERICHO3_DEVICE_ID + 9, PCI_ANY_ID, PCI_ANY_ID },
+    { BROADCOM_VENDOR_ID, Q3_DEVICE_ID_START, PCI_ANY_ID, PCI_ANY_ID },
+    { BROADCOM_VENDOR_ID, Q3_DEVICE_ID_START + 1, PCI_ANY_ID, PCI_ANY_ID },
+    { BROADCOM_VENDOR_ID, Q3_DEVICE_ID_START + 2, PCI_ANY_ID, PCI_ANY_ID },
+    { BROADCOM_VENDOR_ID, Q3_DEVICE_ID_START + 3, PCI_ANY_ID, PCI_ANY_ID },
+    { BROADCOM_VENDOR_ID, Q3_DEVICE_ID_START + 4, PCI_ANY_ID, PCI_ANY_ID },
+    { BROADCOM_VENDOR_ID, Q3_DEVICE_ID_START + 5, PCI_ANY_ID, PCI_ANY_ID },
+    { BROADCOM_VENDOR_ID, J3AI_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
+    { BROADCOM_VENDOR_ID, J3AI_DEVICE_ID + 1, PCI_ANY_ID, PCI_ANY_ID },
+    { BROADCOM_VENDOR_ID, J3AI_DEVICE_ID + 2, PCI_ANY_ID, PCI_ANY_ID },
+    { BROADCOM_VENDOR_ID, J3AI_DEVICE_ID + 3, PCI_ANY_ID, PCI_ANY_ID },
+    { BROADCOM_VENDOR_ID, J3AI_DEVICE_ID + 4, PCI_ANY_ID, PCI_ANY_ID },
+    { BROADCOM_VENDOR_ID, J3AI_DEVICE_ID + 5, PCI_ANY_ID, PCI_ANY_ID },
+    { BROADCOM_VENDOR_ID, J3AI_DEVICE_ID + 6, PCI_ANY_ID, PCI_ANY_ID },
+    { BROADCOM_VENDOR_ID, J3AI_DEVICE_ID + 7, PCI_ANY_ID, PCI_ANY_ID },
+    { BROADCOM_VENDOR_ID, J3AI_DEVICE_ID + 8, PCI_ANY_ID, PCI_ANY_ID },
+    { BROADCOM_VENDOR_ID, J3AI_DEVICE_ID + 9, PCI_ANY_ID, PCI_ANY_ID },
+    { BROADCOM_VENDOR_ID, Q3D_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
+    { BROADCOM_VENDOR_ID, Q3D_DEVICE_ID + 1, PCI_ANY_ID, PCI_ANY_ID },
+    { BROADCOM_VENDOR_ID, Q3D_DEVICE_ID + 2, PCI_ANY_ID, PCI_ANY_ID },
+    { BROADCOM_VENDOR_ID, Q3D_DEVICE_ID + 3, PCI_ANY_ID, PCI_ANY_ID },
+    { BROADCOM_VENDOR_ID, Q3D_DEVICE_ID + 4, PCI_ANY_ID, PCI_ANY_ID },
+    { BROADCOM_VENDOR_ID, Q3D_DEVICE_ID + 5, PCI_ANY_ID, PCI_ANY_ID },
+    { BROADCOM_VENDOR_ID, Q3D_DEVICE_ID + 6, PCI_ANY_ID, PCI_ANY_ID },
+    { BROADCOM_VENDOR_ID, Q3D_DEVICE_ID + 7, PCI_ANY_ID, PCI_ANY_ID },
+    { BROADCOM_VENDOR_ID, Q3D_DEVICE_ID + 8, PCI_ANY_ID, PCI_ANY_ID },
+    { BROADCOM_VENDOR_ID, Q3D_DEVICE_ID + 9, PCI_ANY_ID, PCI_ANY_ID },
 #endif
 #endif /* BCM_DNX_SUPPORT */
 #ifdef BCM_DFE_SUPPORT
@@ -1728,38 +1733,26 @@ static const struct pci_device_id _id_table[] = {
     { BROADCOM_VENDOR_ID, BCM8879D_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
     { BROADCOM_VENDOR_ID, BCM8879F_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
 #ifdef BCM_DNXF3_SUPPORT
-    { BROADCOM_VENDOR_ID, BCM88910_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
-    { BROADCOM_VENDOR_ID, BCM88911_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
-    { BROADCOM_VENDOR_ID, BCM88912_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
-    { BROADCOM_VENDOR_ID, BCM88913_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
-    { BROADCOM_VENDOR_ID, BCM88914_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
-    { BROADCOM_VENDOR_ID, BCM88915_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
-    { BROADCOM_VENDOR_ID, BCM88916_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
-    { BROADCOM_VENDOR_ID, BCM88917_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
-    { BROADCOM_VENDOR_ID, BCM88918_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
-    { BROADCOM_VENDOR_ID, BCM88919_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
-    { BROADCOM_VENDOR_ID, BCM8891A_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
-    { BROADCOM_VENDOR_ID, BCM8891B_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
-    { BROADCOM_VENDOR_ID, BCM8891C_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
-    { BROADCOM_VENDOR_ID, BCM8891D_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
-    { BROADCOM_VENDOR_ID, BCM8891E_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
-    { BROADCOM_VENDOR_ID, BCM8891F_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
-    { BROADCOM_VENDOR_ID, BCM88920_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
-    { BROADCOM_VENDOR_ID, BCM88921_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
-    { BROADCOM_VENDOR_ID, BCM88922_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
-    { BROADCOM_VENDOR_ID, BCM88923_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
-    { BROADCOM_VENDOR_ID, BCM88924_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
-    { BROADCOM_VENDOR_ID, BCM88925_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
-    { BROADCOM_VENDOR_ID, BCM88926_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
-    { BROADCOM_VENDOR_ID, BCM88927_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
-    { BROADCOM_VENDOR_ID, BCM88928_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
-    { BROADCOM_VENDOR_ID, BCM88929_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
-    { BROADCOM_VENDOR_ID, BCM8892A_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
-    { BROADCOM_VENDOR_ID, BCM8892B_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
-    { BROADCOM_VENDOR_ID, BCM8892C_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
-    { BROADCOM_VENDOR_ID, BCM8892D_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
-    { BROADCOM_VENDOR_ID, BCM8892E_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
-    { BROADCOM_VENDOR_ID, BCM8892F_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
+    { BROADCOM_VENDOR_ID, RAMON2_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
+    { BROADCOM_VENDOR_ID, RAMON2_DEVICE_ID + 1, PCI_ANY_ID, PCI_ANY_ID },
+    { BROADCOM_VENDOR_ID, RAMON2_DEVICE_ID + 2, PCI_ANY_ID, PCI_ANY_ID },
+    { BROADCOM_VENDOR_ID, RAMON2_DEVICE_ID + 3, PCI_ANY_ID, PCI_ANY_ID },
+    { BROADCOM_VENDOR_ID, RAMON2_DEVICE_ID + 4, PCI_ANY_ID, PCI_ANY_ID },
+    { BROADCOM_VENDOR_ID, RAMON2_DEVICE_ID + 5, PCI_ANY_ID, PCI_ANY_ID },
+    { BROADCOM_VENDOR_ID, RAMON2_DEVICE_ID + 6, PCI_ANY_ID, PCI_ANY_ID },
+    { BROADCOM_VENDOR_ID, RAMON2_DEVICE_ID + 7, PCI_ANY_ID, PCI_ANY_ID },
+    { BROADCOM_VENDOR_ID, RAMON2_DEVICE_ID + 8, PCI_ANY_ID, PCI_ANY_ID },
+    { BROADCOM_VENDOR_ID, RAMON2_DEVICE_ID + 9, PCI_ANY_ID, PCI_ANY_ID },
+    { BROADCOM_VENDOR_ID, RAMON3_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
+    { BROADCOM_VENDOR_ID, RAMON3_DEVICE_ID + 1, PCI_ANY_ID, PCI_ANY_ID },
+    { BROADCOM_VENDOR_ID, RAMON3_DEVICE_ID + 2, PCI_ANY_ID, PCI_ANY_ID },
+    { BROADCOM_VENDOR_ID, RAMON3_DEVICE_ID + 3, PCI_ANY_ID, PCI_ANY_ID },
+    { BROADCOM_VENDOR_ID, RAMON3_DEVICE_ID + 4, PCI_ANY_ID, PCI_ANY_ID },
+    { BROADCOM_VENDOR_ID, RAMON3_DEVICE_ID + 5, PCI_ANY_ID, PCI_ANY_ID },
+    { BROADCOM_VENDOR_ID, RAMON3_DEVICE_ID + 6, PCI_ANY_ID, PCI_ANY_ID },
+    { BROADCOM_VENDOR_ID, RAMON3_DEVICE_ID + 7, PCI_ANY_ID, PCI_ANY_ID },
+    { BROADCOM_VENDOR_ID, RAMON3_DEVICE_ID + 8, PCI_ANY_ID, PCI_ANY_ID },
+    { BROADCOM_VENDOR_ID, RAMON3_DEVICE_ID + 9, PCI_ANY_ID, PCI_ANY_ID },
 #endif
 #endif
     { BROADCOM_VENDOR_ID, BCM56860_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID },
@@ -3235,11 +3228,6 @@ _init(void)
 #endif
 #endif /* BCM_ICS */
 
-
-#ifdef BCM_SAND_SUPPORT
-    sand_device_create();
-#endif
-
     /*
      * Probe for EB Bus devices.
      */
@@ -3343,6 +3331,10 @@ _pprint(struct seq_file *m)
 
     pprintf(m, "Broadcom Device Enumerator (%s)\n", LINUX_KERNEL_BDE_NAME);
 
+#ifdef LKM_BUILD_INFO
+    pprintf(m, "%s\n", LKM_BUILD_INFO);
+#endif
+
     pprintf(m, "Module parameters:\n");
     pprintf(m, "\tmaxpayload=%d\n", maxpayload);
     pprintf(m, "\tusemsi=%d\n", usemsi);
@@ -3865,7 +3857,8 @@ _interrupt_connect(int d,
 #endif
         {
 #if defined(IPROC_CMICD) && defined(CONFIG_OF)
-            if (of_find_compatible_node(NULL, NULL, IPROC_CMICX_COMPATIBLE)) {
+            if (of_find_compatible_node(NULL, NULL, IPROC_CMICX_COMPATIBLE) &&
+                (ctrl->pci_device == NULL)) {
                 int i, j;
                 for (i = 0; i < IHOST_CMICX_MAX_INTRS; i++) {
                     if (!iproc_cmicx_irqs[i]) {
@@ -4008,7 +4001,8 @@ _interrupt_disconnect(int d)
 #endif
 #endif
 #if defined(IPROC_CMICD) && defined(CONFIG_OF)
-        if (of_find_compatible_node(NULL, NULL, IPROC_CMICX_COMPATIBLE)) {
+        if (of_find_compatible_node(NULL, NULL, IPROC_CMICX_COMPATIBLE) &&
+            (ctrl->pci_device == NULL)) {
             int i;
             for (i = 0; i < IHOST_CMICX_MAX_INTRS; i++) {
                 if (!iproc_cmicx_irqs[i]) {
@@ -4332,13 +4326,15 @@ lkbde_cpu_pci_register(int d)
       case J2X_DEVICE_ID:
 #ifdef BCM_DNX3_SUPPORT
       case JERICHO3_DEVICE_ID:
-      case Q4_DEVICE_ID:
+      case J3AI_DEVICE_ID:
+      case Q3D_DEVICE_ID:
 #endif
 #endif
 #ifdef BCM_DNXF_SUPPORT
       case  BCM88790_DEVICE_ID:
 #ifdef BCM_DNXF3_SUPPORT
-      case  BCM88920_DEVICE_ID:
+      case RAMON2_DEVICE_ID:
+      case RAMON3_DEVICE_ID:
 #endif
 #endif
         /*
@@ -4669,6 +4665,7 @@ lkbde_dev_instid_get(int d, uint32 *instid)
 
     return 0;
 }
+
 /*
  * When a secondary interrupt handler is installed this function
  * is used for synchronizing hardware access to the IRQ mask
@@ -4752,6 +4749,36 @@ lkbde_irq_mask_get(int d, uint32_t *mask, uint32_t *fmask)
     return 0;
 }
 
+int
+lkbde_irq_status_get(int d, uint32_t addr, uint32 *status)
+{
+    bde_ctrl_t *ctrl;
+    int iproc_reg;
+    unsigned long flags;
+
+    iproc_reg = d & LKBDE_IPROC_REG;
+    d &= ~LKBDE_IPROC_REG;
+
+    if (!VALID_DEVICE(d)) {
+        return -1;
+    }
+
+    ctrl = _devices + d;
+
+    /* Lock is required to synchronize access from user space */
+    spin_lock_irqsave(&ctrl->lock, flags);
+
+    if (iproc_reg) {
+        *status = _iproc_read(d, addr);
+    } else {
+        *status = _read(d, addr);
+    }
+
+    spin_unlock_irqrestore(&ctrl->lock, flags);
+
+    return 0;
+}
+
 int
 lkbde_get_num_devices(int type)
 {
@@ -4820,6 +4847,7 @@ LKM_EXPORT_SYM(lkbde_get_hw_dev);
 LKM_EXPORT_SYM(lkbde_get_dma_dev);
 LKM_EXPORT_SYM(lkbde_irq_mask_set);
 LKM_EXPORT_SYM(lkbde_irq_mask_get);
+LKM_EXPORT_SYM(lkbde_irq_status_get);
 LKM_EXPORT_SYM(lkbde_get_dev_phys_hi);
 LKM_EXPORT_SYM(lkbde_dev_state_set);
 LKM_EXPORT_SYM(lkbde_dev_state_get);
diff --git a/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/linux_dma.c b/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/linux_dma.c
index bdb8d121b..5c2c90a42 100644
--- a/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/linux_dma.c
+++ b/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/linux_dma.c
@@ -1,5 +1,6 @@
 /*
- * Copyright 2007-2020 Broadcom Inc. All rights reserved.
+ * $Id: linux_dma.c,v 1.414 Broadcom SDK $
+ * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
  * 
  * Permission is granted to use, copy, modify and/or distribute this
  * software under either one of the licenses below.
@@ -22,12 +23,8 @@
  * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
  * 
  * This software is governed by the Broadcom Open Network Switch APIs license:
- * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa
- */
-/*
- * $Id: linux_dma.c,v 1.414 Broadcom SDK $
- * $Copyright: (c) 2016 Broadcom Corp.
- * All Rights Reserved.$
+ * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+ * 
  *
  * Linux Kernel BDE DMA memory allocation
  *
diff --git a/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/linux_shbde.c b/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/linux_shbde.c
index dd003e1f9..f8bd381ee 100644
--- a/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/linux_shbde.c
+++ b/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/linux_shbde.c
@@ -1,5 +1,6 @@
 /*
- * Copyright 2007-2020 Broadcom Inc. All rights reserved.
+ * $Id: $
+ * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
  * 
  * Permission is granted to use, copy, modify and/or distribute this
  * software under either one of the licenses below.
@@ -22,12 +23,8 @@
  * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
  * 
  * This software is governed by the Broadcom Open Network Switch APIs license:
- * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa
- */
-/*
- * $Id: $
- * $Copyright: (c) 2014 Broadcom Corp.
- * All Rights Reserved.$
+ * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+ * 
  *
  */
 
diff --git a/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/linux_shbde.h b/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/linux_shbde.h
index ef4b49dc2..a37cc20a9 100644
--- a/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/linux_shbde.h
+++ b/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/linux_shbde.h
@@ -1,5 +1,6 @@
 /*
- * Copyright 2007-2020 Broadcom Inc. All rights reserved.
+ * $Id: $
+ * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
  * 
  * Permission is granted to use, copy, modify and/or distribute this
  * software under either one of the licenses below.
@@ -22,12 +23,8 @@
  * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
  * 
  * This software is governed by the Broadcom Open Network Switch APIs license:
- * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa
- */
-/*
- * $Id: $
- * $Copyright: (c) 2014 Broadcom Corp.
- * All Rights Reserved.$
+ * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+ * 
  *
  */
 
diff --git a/platform/broadcom/saibcm-modules/systems/bde/linux/shared/mpool.c b/platform/broadcom/saibcm-modules/systems/bde/linux/shared/mpool.c
index 4c2db5e4d..4f2dbe019 100644
--- a/platform/broadcom/saibcm-modules/systems/bde/linux/shared/mpool.c
+++ b/platform/broadcom/saibcm-modules/systems/bde/linux/shared/mpool.c
@@ -1,5 +1,6 @@
 /*
- * Copyright 2007-2020 Broadcom Inc. All rights reserved.
+ * $Id: mpool.c,v 1.18 Broadcom SDK $
+ * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
  * 
  * Permission is granted to use, copy, modify and/or distribute this
  * software under either one of the licenses below.
@@ -22,12 +23,8 @@
  * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
  * 
  * This software is governed by the Broadcom Open Network Switch APIs license:
- * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa
- */
-/*
- * $Id: mpool.c,v 1.18 Broadcom SDK $
- * $Copyright: (c) 2005 Broadcom Corp.
- * All Rights Reserved.$
+ * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+ * 
  */
 
 #include <mpool.h>
diff --git a/platform/broadcom/saibcm-modules/systems/bde/linux/user/kernel/Makefile b/platform/broadcom/saibcm-modules/systems/bde/linux/user/kernel/Makefile
index 633475c25..c5b31c9e4 100644
--- a/platform/broadcom/saibcm-modules/systems/bde/linux/user/kernel/Makefile
+++ b/platform/broadcom/saibcm-modules/systems/bde/linux/user/kernel/Makefile
@@ -1,33 +1,30 @@
-#
-#  Copyright 2007-2020 Broadcom Inc. All rights reserved.
-#  
-#  Permission is granted to use, copy, modify and/or distribute this
-#  software under either one of the licenses below.
-#  
-#  License Option 1: GPL
-#  
-#  This program is free software; you can redistribute it and/or modify
-#  it under the terms of the GNU General Public License, version 2, as
-#  published by the Free Software Foundation (the "GPL").
-#  
-#  This program is distributed in the hope that it will be useful, but
-#  WITHOUT ANY WARRANTY; without even the implied warranty of
-#  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
-#  General Public License version 2 (GPLv2) for more details.
-#  
-#  You should have received a copy of the GNU General Public License
-#  version 2 (GPLv2) along with this source code.
-#  
-#  
-#  License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
-#  
-#  This software is governed by the Broadcom Open Network Switch APIs license:
-#  https://www.broadcom.com/products/ethernet-connectivity/software/opennsa
-#
 # -*- Makefile -*-
 # $Id: Makefile,v 1.1 Broadcom SDK $
-# $Copyright: (c) 2005 Broadcom Corp.
-# All Rights Reserved.$
+# $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+# 
+# Permission is granted to use, copy, modify and/or distribute this
+# software under either one of the licenses below.
+# 
+# License Option 1: GPL
+# 
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License, version 2, as
+# published by the Free Software Foundation (the "GPL").
+# 
+# This program is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+# General Public License version 2 (GPLv2) for more details.
+# 
+# You should have received a copy of the GNU General Public License
+# version 2 (GPLv2) along with this source code.
+# 
+# 
+# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
+# 
+# This software is governed by the Broadcom Open Network Switch APIs license:
+# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+# 
 #
 LOCALDIR = systems/bde/linux/user/kernel
 
@@ -55,6 +52,7 @@ build: kernel_libs $(MODULE)
 endif
 
 KBUILD_EXTRA_SYMBOLS := ${BLDDIR}/../../kernel/kernel_module/Module.symvers
+export KBUILD_EXTRA_SYMBOLS
 
 $(MODULE): $(BLDDIR)/.tree $(BOBJS) $(LIBS)
 	$(LD) $(MODULE_LDFLAGS) -r -d $(BOBJS) $(LIBS) -o $@
@@ -63,7 +61,6 @@ $(KMODULE): $(MODULE)
 	rm -fr $(BLDDIR)/$(KERNEL_MODULE_DIR)
 	mkdir $(BLDDIR)/$(KERNEL_MODULE_DIR)
 	cp ${SDK}/make/Makefile.linux-kmodule $(BLDDIR)/$(KERNEL_MODULE_DIR)/Makefile
-	cat ${KBUILD_EXTRA_SYMBOLS} > $(BLDDIR)/$(KERNEL_MODULE_DIR)/Module.symvers
 	MOD_NAME=$(THIS_MOD_NAME) KBUILD_EXTRA_SYMBOLS="${KBUILD_EXTRA_SYMBOLS}" $(MAKE) -C $(BLDDIR)/$(KERNEL_MODULE_DIR) $(THIS_MOD_NAME).ko
 endif
 
diff --git a/platform/broadcom/saibcm-modules/systems/bde/linux/user/kernel/linux-user-bde.c b/platform/broadcom/saibcm-modules/systems/bde/linux/user/kernel/linux-user-bde.c
index deff89546..f0eee1e11 100644
--- a/platform/broadcom/saibcm-modules/systems/bde/linux/user/kernel/linux-user-bde.c
+++ b/platform/broadcom/saibcm-modules/systems/bde/linux/user/kernel/linux-user-bde.c
@@ -1,17 +1,29 @@
 /*
- * Copyright 2017 Broadcom
- *
+ * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * 
+ * Permission is granted to use, copy, modify and/or distribute this
+ * software under either one of the licenses below.
+ * 
+ * License Option 1: GPL
+ * 
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License, version 2, as
  * published by the Free Software Foundation (the "GPL").
- *
+ * 
  * This program is distributed in the hope that it will be useful, but
  * WITHOUT ANY WARRANTY; without even the implied warranty of
  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  * General Public License version 2 (GPLv2) for more details.
- *
+ * 
  * You should have received a copy of the GNU General Public License
  * version 2 (GPLv2) along with this source code.
+ * 
+ * 
+ * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
+ * 
+ * This software is governed by the Broadcom Open Network Switch APIs license:
+ * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+ * 
  */
 
 /*
@@ -122,12 +134,18 @@ be made.
 #define CMICX_GEN2_PAXB_0_PAXB_IC_INTRCLR_DELAY_REG0   (0x0292C3b0)
 #define CMICX_GEN2_PAXB_0_PAXB_IC_INTRCLR_DELAY_BASE     (CMICX_GEN2_PAXB_0_PAXB_IC_INTRCLR_DELAY_REG0)
 #define CMICX_GEN2_PAXB_0_PCIE_ERROR_STATUS            (0x0292C024)
-#define CMICX_GEN2_PAXB_0_INTC_INTR_ENABLE_REG0          (0x0292D100)
+#define CMICX_GEN2_PAXB_0_INTC_INTR_ENABLE_REG0          (0x0292d150)
 #define CMICX_GEN2_PAXB_0_INTC_INTR_STATUS_REG0          (0x0292D1A0)
 #define CMICX_GEN2_PAXB_0_INTC_INTR_RAW_STATUS_REG0      (0x0292D178)
+#define CMICX_GEN2_PAXB_0_INTC_SET_INTR_ENABLE_REG0      (0x0292d100)
+#define CMICX_GEN2_PAXB_0_INTC_CLEAR_INTR_ENABLE_REG0    (0x0292d128)
+
 #define CMICX_GEN2_PAXB_0_INTC_INTR_ENABLE_BASE           (CMICX_GEN2_PAXB_0_INTC_INTR_ENABLE_REG0)
 #define CMICX_GEN2_PAXB_0_INTC_INTR_STATUS_BASE           (CMICX_GEN2_PAXB_0_INTC_INTR_STATUS_REG0)
 #define CMICX_GEN2_PAXB_0_INTC_INTR_RAW_STATUS_BASE       (CMICX_GEN2_PAXB_0_INTC_INTR_RAW_STATUS_REG0)
+#define CMICX_GEN2_PAXB_0_INTC_INTR_SET_ENABLE_BASE       (CMICX_GEN2_PAXB_0_INTC_SET_INTR_ENABLE_REG0)
+#define CMICX_GEN2_PAXB_0_INTC_INTR_CLEAR_ENABLE_BASE     (CMICX_GEN2_PAXB_0_INTC_CLEAR_INTR_ENABLE_REG0)
+
 #define CMICX_GEN2_INTC_PDMA_INTR_REG_IND_0             5
 #define CMICX_GEN2_INTC_PDMA_INTR_REG_IND_1             6
 
@@ -154,9 +172,10 @@ be made.
 #define HX5_IHOST_INTR_STATUS_MAP_NUM      (INTC_INTR_REG_NUM * (sizeof(uint32)))
 #define IRQ_BIT(intr)                      (intr % (sizeof(uint32)*8))
 #define IRQ_MASK_INDEX(intr)               (intr / (sizeof(uint32)*8))
-#define HX5_SW_PROG_INTR_PRIORITY          73
-#define INTR_SW_PROG_INTR_BITPOS           (1 << IRQ_BIT(HX5_SW_PROG_INTR_PRIORITY))
-#define INTC_SW_PROG_INTR_REG_IND          IRQ_MASK_INDEX(HX5_SW_PROG_INTR_PRIORITY)
+#define P19_SW_PROG_INTR_IRQ               69
+#define HX5_SW_PROG_INTR_IRQ               73
+#define INTR_SW_PROG_INTR_BITPOS           (1 << IRQ_BIT(ihost_sw_prog_intr_num))
+#define INTC_SW_PROG_INTR_REG_IND          IRQ_MASK_INDEX(ihost_sw_prog_intr_num)
 #define HX5_CHIP_INTR_LOW_PRIORITY         119
 #define INTR_LOW_PRIORITY_BITPOS           (1 << IRQ_BIT(HX5_CHIP_INTR_LOW_PRIORITY))
 #define INTC_LOW_PRIORITY_INTR_REG_IND     IRQ_MASK_INDEX(HX5_CHIP_INTR_LOW_PRIORITY)
@@ -198,6 +217,7 @@ be made.
 
 static uint32 *ihost_intr_status_base = NULL;
 static uint32 *ihost_intr_enable_base = NULL;
+static int ihost_sw_prog_intr_num = HX5_SW_PROG_INTR_IRQ;
 
 /* Module parameter for Interruptible timeout */
 static int intr_timeout = 0;
@@ -228,6 +248,8 @@ typedef void (*isr_f)(void *);
 typedef struct _intr_regs_s {
     uint32 intc_intr_status_base;
     uint32 intc_intr_enable_base;
+    uint32 intc_intr_set_enable_base;
+    uint32 intc_intr_clear_enable_base;
     uint32 intc_intr_raw_status_base;
     uint32 intc_intr_clear_0;
     uint32 intc_intr_clear_1;
@@ -339,7 +361,7 @@ static _dma_pool_t _dma_pool;
  * Returns:
  *    Nothing
  */
-static void 
+static void
 _cmic_interrupt(bde_ctrl_t *ctrl)
 {
     int d;
@@ -650,6 +672,7 @@ _cmicx_gen2_interrupt(bde_ctrl_t *ctrl)
     uint32 stat, iena, mask, fmask;
     int active_interrupts = 0;
     bde_inst_resource_t *res;
+    uint32 intrs = 0;
 
     intr_count++;
     d = (((uint8 *)ctrl - (uint8 *)_devices) / sizeof (bde_ctrl_t));
@@ -664,25 +687,44 @@ _cmicx_gen2_interrupt(bde_ctrl_t *ctrl)
     }
 
     lkbde_irq_mask_get(d, &mask, &fmask);
-    for (ind = 0; ind < CMICX_GEN2_INTC_INTR_REG_NUM; ind++) {
-        IPROC_READ(d, ctrl->intr_regs.intc_intr_status_base + 4 * ind, stat);
-        if (stat == 0) {
-            continue;
-        }
 
-        if (fmask) {
-            /** Packet DMA 8 - 31 bits on IPROC_IRQ_BASE5 */
-            if ((ind == CMICX_GEN2_INTC_PDMA_INTR_REG_IND_0) && !(stat & 0xFF)) {
-                continue;
-            } else if ((ind == CMICX_GEN2_INTC_PDMA_INTR_REG_IND_1) && !(stat & 0xFFFFFF00)) {
-                /** Packet DMA 0 - 7 bits on IPROC_IRQ_BASE6 */
-                continue;
+    if (fmask) {
+        /*
+         * Packet DMA occupies 8 - 31 bits on IPROC_IRQ_BASE5, KNET only uses 8 - 23 bits for CMC0 currently
+         * Prioritizing IPROC_IRQ_BASE5 when ONLY Packet DMA interrupts are raised
+         */
+        IPROC_READ(d, ctrl->intr_regs.intc_intr_status_base + 4 * CMICX_GEN2_INTC_PDMA_INTR_REG_IND_0, stat);
+        IPROC_READ(d, ctrl->intr_regs.intc_intr_enable_base + 4 * CMICX_GEN2_INTC_PDMA_INTR_REG_IND_0, iena);
+        intrs = stat & iena;
+        if (intrs && (intrs == (intrs & fmask))) {
+            IPROC_WRITE(d, ctrl->intr_regs.intc_intr_clear_enable_base + (4 * CMICX_GEN2_INTC_PDMA_INTR_REG_IND_0), 0xFFFFFFFF);
+            IPROC_WRITE(d, ctrl->intr_regs.intc_intr_set_enable_base + (4 * CMICX_GEN2_INTC_PDMA_INTR_REG_IND_0), 0x0);
+
+            for (ind = 0; ind < CMICX_GEN2_INTC_INTR_REG_NUM; ind++) {
+                if (ind == CMICX_GEN2_INTC_PDMA_INTR_REG_IND_0) {
+                    continue;
+                }
+                IPROC_READ(d, ctrl->intr_regs.intc_intr_status_base + 4 * ind, stat);
+                IPROC_READ(d, ctrl->intr_regs.intc_intr_enable_base + 4 * ind, iena);
+                if (stat & iena) {
+                    active_interrupts = 1;
+                    break;
+                }
             }
-        }
-        IPROC_READ(d, ctrl->intr_regs.intc_intr_enable_base + 4 * ind, iena);
-        if (stat & iena) {
+        } else if (intrs) {
             active_interrupts = 1;
-            break;
+        }
+    } else {
+        for (ind = 0; ind < CMICX_GEN2_INTC_INTR_REG_NUM; ind++) {
+            IPROC_READ(d, ctrl->intr_regs.intc_intr_status_base + 4 * ind, stat);
+            if (stat == 0) {
+                continue;
+            }
+            IPROC_READ(d, ctrl->intr_regs.intc_intr_enable_base + 4 * ind, iena);
+            if (stat & iena) {
+                active_interrupts = 1;
+                break;
+            }
         }
     }
 
@@ -696,19 +738,11 @@ _cmicx_gen2_interrupt(bde_ctrl_t *ctrl)
      * enumerates the interrupts to be serviced
      */
     for (ind = 0; ind < CMICX_GEN2_INTC_INTR_REG_NUM; ind++) {
-        if (fmask) {
-            /** TODO? change by KNET */
-            if (ind == CMICX_GEN2_INTC_PDMA_INTR_REG_IND_0) {
-                IPROC_READ(d, ctrl->intr_regs.intc_intr_enable_base + 4 * ind, iena);
-                IPROC_WRITE(d, ctrl->intr_regs.intc_intr_enable_base + (4 * ind), iena & ((fmask & 0xFFFFFF) << 8));
-                continue;
-            } else if (ind == CMICX_GEN2_INTC_PDMA_INTR_REG_IND_1) {
-                IPROC_READ(d, ctrl->intr_regs.intc_intr_enable_base + 4 * ind, iena);
-                IPROC_WRITE(d, ctrl->intr_regs.intc_intr_enable_base + (4 * ind), iena & ((fmask & 0xFF) << 24));
-                continue;
-            }
+        if (fmask && (intrs == (intrs & fmask)) && ind == CMICX_GEN2_INTC_PDMA_INTR_REG_IND_0) {
+            continue;
         }
-        IPROC_WRITE(d, ctrl->intr_regs.intc_intr_enable_base + (4 * ind), 0);
+        IPROC_WRITE(d, ctrl->intr_regs.intc_intr_clear_enable_base + (4 * ind), 0xFFFFFFFF);
+        IPROC_WRITE(d, ctrl->intr_regs.intc_intr_set_enable_base + (4 * ind), 0);
     }
 
     /* Notify */
@@ -1024,7 +1058,7 @@ _cmicd_interrupt(bde_ctrl_t *ctrl)
 
 
 /* The actual interrupt handler of ethernet devices */
-static void 
+static void
 _ether_interrupt(bde_ctrl_t *ctrl)
 {
     SSOC_WRITEL(0, ctrl->ba + 0x024/4);
@@ -1047,6 +1081,9 @@ static struct _intr_mode_s {
     { (isr_f)_cmicd_interrupt,      "CMICd" },
     { (isr_f)_cmicd_cmc0_interrupt, "CMICd CMC0" },
     { (isr_f)_cmicx_interrupt,      "CMICx" },
+#ifdef NEED_CMICX_GEN2_INTERRUPT
+    { (isr_f)_cmicx_gen2_interrupt,	"CMICx Gen2" },
+#endif
     { NULL, NULL }
 };
 
@@ -1082,10 +1119,24 @@ _intr_regs_init(bde_ctrl_t *ctrl, int flag)
         ctrl->intr_regs.intc_intr_clear_delay_base = HX5_PAXB_0_PAXB_IC_INTRCLR_DELAY_BASE;
         ctrl->intr_regs.intc_intr_pcie_err_status = HX5_PAXB_0_PCIE_ERROR_STATUS;
         ctrl->intr_regs.intc_intr_nof_regs = INTC_INTR_REG_NUM;
+        if (ctrl->dev_type & BDE_AXI_DEV_TYPE) {
+            switch (ctrl->devid) {
+                case BCM53650_DEVICE_ID:
+                case BCM53651_DEVICE_ID:
+                case BCM53652_DEVICE_ID:
+                case BCM53653_DEVICE_ID:
+                    ihost_sw_prog_intr_num = P19_SW_PROG_INTR_IRQ;
+                    break;
+                default:
+                    break;
+            }
+        }
     } else if (flag == 2){
         ctrl->intr_regs.intc_intr_status_base = CMICX_GEN2_PAXB_0_INTC_INTR_STATUS_BASE;
         ctrl->intr_regs.intc_intr_raw_status_base = CMICX_GEN2_PAXB_0_INTC_INTR_RAW_STATUS_BASE;
         ctrl->intr_regs.intc_intr_enable_base = CMICX_GEN2_PAXB_0_INTC_INTR_ENABLE_BASE;
+        ctrl->intr_regs.intc_intr_set_enable_base = CMICX_GEN2_PAXB_0_INTC_INTR_SET_ENABLE_BASE;
+        ctrl->intr_regs.intc_intr_clear_enable_base = CMICX_GEN2_PAXB_0_INTC_INTR_CLEAR_ENABLE_BASE;
         ctrl->intr_regs.intc_intr_clear_0 = CMICX_GEN2_PAXB_0_PAXB_IC_INTRCLR_0;
         ctrl->intr_regs.intc_intr_clear_1 = CMICX_GEN2_PAXB_0_PAXB_IC_INTRCLR_1;
         ctrl->intr_regs.intc_intr_clear_mode_0 = CMICX_GEN2_PAXB_0_PAXB_IC_INTRCLR_MODE_0;
@@ -1227,6 +1278,10 @@ _devices_init(int d)
         case BCM56175_DEVICE_ID:
         case BCM56176_DEVICE_ID:
         case BCM53642_DEVICE_ID:
+        case BCM53650_DEVICE_ID:
+        case BCM53651_DEVICE_ID:
+        case BCM53652_DEVICE_ID:
+        case BCM53653_DEVICE_ID:
             ctrl->isr = (isr_f)_cmicx_interrupt;
             if (ctrl->dev_type & BDE_AXI_DEV_TYPE) {
                 if (!ihost_intr_enable_base) {
@@ -1291,11 +1346,13 @@ _devices_init(int d)
 
 #ifdef BCM_DNX3_SUPPORT
           case JERICHO3_DEVICE_ID:
-          case Q4_DEVICE_ID:
+          case J3AI_DEVICE_ID:
+
+          case Q3D_DEVICE_ID:
 #endif
 #ifdef BCM_DNXF3_SUPPORT
-          case  BCM88910_DEVICE_ID:
-          case  BCM88920_DEVICE_ID:
+          case  RAMON2_DEVICE_ID:
+          case  RAMON3_DEVICE_ID:
 #endif
 #if defined(BCM_DNX3_SUPPORT) || defined(BCM_DNXF3_SUPPORT)
             ctrl->isr = (isr_f)_cmicx_gen2_interrupt;
@@ -1438,6 +1495,9 @@ _pprint(struct seq_file *m)
     uint32 state, instid;
 
     pprintf(m, "Broadcom Device Enumerator (%s)\n", LINUX_USER_BDE_NAME);
+#ifdef LKM_BUILD_INFO
+    pprintf(m, "%s\n", LKM_BUILD_INFO);
+#endif
     for (idx = 0; idx < user_bde->num_devices(BDE_ALL_DEVICES); idx++) {
         name = _intr_mode_str(_devices[idx].isr);
         if (name == NULL) {
@@ -1477,7 +1537,7 @@ _pprint(struct seq_file *m)
 }
 
 #ifdef BCM_INSTANCE_SUPPORT
-/* 
+/*
  * Allocate the DMA resource from DMA pool
  * Parameter :
  * dma_size (IN): allocate dma_size in MB
@@ -1527,7 +1587,7 @@ _dma_resource_get(unsigned inst_id, phys_addr_t *cpu_pbase, phys_addr_t *dma_pba
 /*
  * Checks if we have the instance in _bde_inst_resource. If not, return LUBDE_SUCCESS==0 (considered a new instance).
  * If it exists with the same dmasize, return 1 (It is considered already in use)
- * Otherwise if the device with the same index of the resource, has resource/instance index 0, return LUBDE_SUCCESS==0. (bug)
+ * Otherwise if the device with the same index of the resource, has resource/instance index 0, return LUBDE_SUCCESS==0. (error)
  * Otherwise return LUBDE_FAIL==-1 (It is considered to exist with a different dmasize).
  */
 static int
@@ -1612,7 +1672,7 @@ _instance_attach(unsigned int inst_id, unsigned int dma_size, linux_bde_device_b
         _bde_inst_resource->is_active = 0;
         /*_bde_inst_resource->dev will not be used when _bde_inst_resource->is_active == 0 */
     }
-    
+
     /* Validate the resource with inst_devices */
     exist = _instance_validate(inst_id, dma_size, inst_devices);
 
@@ -1694,7 +1754,7 @@ _edk_instance_attach(unsigned int inst_id, unsigned int dma_size)
  * Returns:
  *    0 on success, <0 on error
  */
-static int 
+static int
 _ioctl(unsigned int cmd, unsigned long arg)
 {
     lubde_ioctl_t io;
@@ -1708,9 +1768,9 @@ _ioctl(unsigned int cmd, unsigned long arg)
     if (copy_from_user(&io, (void *)arg, sizeof(io))) {
         return -EFAULT;
     }
-  
+
     io.rc = LUBDE_SUCCESS;
-  
+
     switch(cmd) {
     case LUBDE_VERSION:
         io.d0 = KBDE_VERSION;
@@ -1832,7 +1892,7 @@ _ioctl(unsigned int cmd, unsigned long arg)
             /* FIXME: for multiple chips */
             if (!_devices[io.dev].enabled) {
                 user_bde->interrupt_connect(io.dev,
-                                            (void(*)(void *))_ether_interrupt, 
+                                            (void(*)(void *))_ether_interrupt,
                                             _devices+io.dev);
                 _devices[io.dev].enabled = 1;
             }
@@ -1880,7 +1940,7 @@ _ioctl(unsigned int cmd, unsigned long arg)
         if (_devices[io.dev].dev_type & BDE_SWITCH_DEV_TYPE) {
             res = &_bde_inst_resource[_devices[io.dev].inst];
 #ifdef BDE_LINUX_NON_INTERRUPTIBLE
-            wait_event_timeout(res->intr_wq, 
+            wait_event_timeout(res->intr_wq,
                                atomic_read(&res->intr) != 0, 100);
 
 #else
@@ -1913,21 +1973,21 @@ _ioctl(unsigned int cmd, unsigned long arg)
                                       atomic_read(&res->intr) != 0);
             }
 #endif
-            /* 
-             * Even if we get multiple interrupts, we 
+            /*
+             * Even if we get multiple interrupts, we
              * only run the interrupt handler once.
              */
             atomic_set(&res->intr, 0);
         } else {
 #ifdef BDE_LINUX_NON_INTERRUPTIBLE
-            wait_event_timeout(_ether_interrupt_wq,     
+            wait_event_timeout(_ether_interrupt_wq,
                                atomic_read(&_ether_interrupt_has_taken_place) != 0, 100);
 #else
-            wait_event_interruptible(_ether_interrupt_wq,     
+            wait_event_interruptible(_ether_interrupt_wq,
                                      atomic_read(&_ether_interrupt_has_taken_place) != 0);
 
 #endif
-            /* 
+            /*
              * Even if we get multiple interrupts, we
              * only run the interrupt handler once.
              */
@@ -1983,14 +2043,21 @@ _ioctl(unsigned int cmd, unsigned long arg)
         /* CMICx device */
         if (_devices[io.dev].isr == (isr_f)_cmicx_interrupt) {
             io.rc = lkbde_irq_mask_set(io.dev + LKBDE_IPROC_REG, io.d0, io.d1, 0);
-        } else {
+        }
+#ifdef NEED_CMICX_GEN2_INTERRUPT
+        else if (_devices[io.dev].isr == (isr_f)_cmicx_gen2_interrupt)
+        {
+            io.rc = lkbde_irq_mask_set(io.dev | LKBDE_IPROC_REG, io.d0, io.d1, 0);
+        }
+#endif
+        else {
             io.rc = lkbde_irq_mask_set(io.dev, io.d0, io.d1, 0);
         }
         break;
     case LUBDE_SPI_READ_REG:
         if (user_bde->spi_read(io.dev, io.d0, io.dx.buf, io.d1) == -1) {
             io.rc = LUBDE_FAIL;
-        } 
+        }
         break;
     case LUBDE_SPI_WRITE_REG:
         if (user_bde->spi_write(io.dev, io.d0, io.dx.buf, io.d1) == -1) {
@@ -2097,15 +2164,15 @@ _ioctl(unsigned int cmd, unsigned long arg)
 /* Workaround for broken Busybox/PPC insmod */
 static char _modname[] = LINUX_USER_BDE_NAME;
 
-static gmodule_t _gmodule = 
+static gmodule_t _gmodule =
 {
-    .name = LINUX_USER_BDE_NAME, 
-    .major = LINUX_USER_BDE_MAJOR, 
-    .init = _init, 
-    .cleanup = _cleanup, 
-    .pprint = _pprint, 
+    .name = LINUX_USER_BDE_NAME,
+    .major = LINUX_USER_BDE_MAJOR,
+    .init = _init,
+    .cleanup = _cleanup,
+    .pprint = _pprint,
     .ioctl = _ioctl,
-}; 
+};
 
 gmodule_t*
 gmodule_get(void)
diff --git a/platform/broadcom/saibcm-modules/systems/bde/linux/user/kernel/linux-user-bde.h b/platform/broadcom/saibcm-modules/systems/bde/linux/user/kernel/linux-user-bde.h
index 4bd4b746c..1716c31b2 100644
--- a/platform/broadcom/saibcm-modules/systems/bde/linux/user/kernel/linux-user-bde.h
+++ b/platform/broadcom/saibcm-modules/systems/bde/linux/user/kernel/linux-user-bde.h
@@ -1,5 +1,6 @@
 /*
- * Copyright 2007-2020 Broadcom Inc. All rights reserved.
+ * $Id: linux-user-bde.h,v 1.23 Broadcom SDK $
+ * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
  * 
  * Permission is granted to use, copy, modify and/or distribute this
  * software under either one of the licenses below.
@@ -22,12 +23,8 @@
  * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
  * 
  * This software is governed by the Broadcom Open Network Switch APIs license:
- * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa
- */
-/*
- * $Id: linux-user-bde.h,v 1.23 Broadcom SDK $
- * $Copyright: (c) 2005 Broadcom Corp.
- * All Rights Reserved.$
+ * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+ * 
  */
 
 #ifndef __LINUX_USER_BDE_H__
diff --git a/platform/broadcom/saibcm-modules/systems/bde/shared/include/shbde.h b/platform/broadcom/saibcm-modules/systems/bde/shared/include/shbde.h
index 2d0651191..82f141a1e 100644
--- a/platform/broadcom/saibcm-modules/systems/bde/shared/include/shbde.h
+++ b/platform/broadcom/saibcm-modules/systems/bde/shared/include/shbde.h
@@ -1,5 +1,6 @@
 /*
- * Copyright 2007-2020 Broadcom Inc. All rights reserved.
+ * $Id: $
+ * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
  * 
  * Permission is granted to use, copy, modify and/or distribute this
  * software under either one of the licenses below.
@@ -22,12 +23,8 @@
  * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
  * 
  * This software is governed by the Broadcom Open Network Switch APIs license:
- * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa
- */
-/*
- * $Id: $
- * $Copyright: (c) 2014 Broadcom Corp.
- * All Rights Reserved.$
+ * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+ * 
  *
  */
 
diff --git a/platform/broadcom/saibcm-modules/systems/bde/shared/include/shbde_iproc.h b/platform/broadcom/saibcm-modules/systems/bde/shared/include/shbde_iproc.h
index 4b71b8f16..b5277d09c 100644
--- a/platform/broadcom/saibcm-modules/systems/bde/shared/include/shbde_iproc.h
+++ b/platform/broadcom/saibcm-modules/systems/bde/shared/include/shbde_iproc.h
@@ -1,5 +1,6 @@
 /*
- * Copyright 2007-2020 Broadcom Inc. All rights reserved.
+ * $Id: $
+ * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
  * 
  * Permission is granted to use, copy, modify and/or distribute this
  * software under either one of the licenses below.
@@ -22,12 +23,8 @@
  * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
  * 
  * This software is governed by the Broadcom Open Network Switch APIs license:
- * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa
- */
-/*
- * $Id: $
- * $Copyright: (c) 2014 Broadcom Corp.
- * All Rights Reserved.$
+ * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+ * 
  *
  */
 
diff --git a/platform/broadcom/saibcm-modules/systems/bde/shared/include/shbde_mdio.h b/platform/broadcom/saibcm-modules/systems/bde/shared/include/shbde_mdio.h
index a51dd2ac6..9e1f73032 100644
--- a/platform/broadcom/saibcm-modules/systems/bde/shared/include/shbde_mdio.h
+++ b/platform/broadcom/saibcm-modules/systems/bde/shared/include/shbde_mdio.h
@@ -1,5 +1,6 @@
 /*
- * Copyright 2007-2020 Broadcom Inc. All rights reserved.
+ * $Id: $
+ * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
  * 
  * Permission is granted to use, copy, modify and/or distribute this
  * software under either one of the licenses below.
@@ -22,12 +23,8 @@
  * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
  * 
  * This software is governed by the Broadcom Open Network Switch APIs license:
- * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa
- */
-/*
- * $Id: $
- * $Copyright: (c) 2015 Broadcom Corp.
- * All Rights Reserved.$
+ * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+ * 
  *
  */
 
diff --git a/platform/broadcom/saibcm-modules/systems/bde/shared/include/shbde_pci.h b/platform/broadcom/saibcm-modules/systems/bde/shared/include/shbde_pci.h
index a0b884948..b1f2614ff 100644
--- a/platform/broadcom/saibcm-modules/systems/bde/shared/include/shbde_pci.h
+++ b/platform/broadcom/saibcm-modules/systems/bde/shared/include/shbde_pci.h
@@ -1,5 +1,6 @@
 /*
- * Copyright 2007-2020 Broadcom Inc. All rights reserved.
+ * $Id: $
+ * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
  * 
  * Permission is granted to use, copy, modify and/or distribute this
  * software under either one of the licenses below.
@@ -22,12 +23,8 @@
  * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
  * 
  * This software is governed by the Broadcom Open Network Switch APIs license:
- * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa
- */
-/*
- * $Id: $
- * $Copyright: (c) 2014 Broadcom Corp.
- * All Rights Reserved.$
+ * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+ * 
  *
  */
 
diff --git a/platform/broadcom/saibcm-modules/systems/bde/shared/shbde_iproc.c b/platform/broadcom/saibcm-modules/systems/bde/shared/shbde_iproc.c
index ca8024c78..0596775a0 100644
--- a/platform/broadcom/saibcm-modules/systems/bde/shared/shbde_iproc.c
+++ b/platform/broadcom/saibcm-modules/systems/bde/shared/shbde_iproc.c
@@ -1,5 +1,6 @@
 /*
- * Copyright 2007-2020 Broadcom Inc. All rights reserved.
+ * $Id: $
+ * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
  * 
  * Permission is granted to use, copy, modify and/or distribute this
  * software under either one of the licenses below.
@@ -22,12 +23,8 @@
  * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
  * 
  * This software is governed by the Broadcom Open Network Switch APIs license:
- * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa
- */
-/*
- * $Id: $
- * $Copyright: (c) 2014 Broadcom Corp.
- * All Rights Reserved.$
+ * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+ * 
  *
  */
 
@@ -349,7 +346,7 @@ shbde_iproc_pci_read(shbde_hal_t *shbde, void *iproc_regs,
                      unsigned int addr)
 {
     unsigned int subwin_base;
-    void *reg;
+    void *reg = 0;
     shbde_iproc_config_t *icfg = &shbde->icfg;
 
     if (!iproc_regs) {
@@ -359,16 +356,29 @@ shbde_iproc_pci_read(shbde_hal_t *shbde, void *iproc_regs,
     /* Sub-window size is 0x1000 (4K) */
     subwin_base = (addr & ~0xfff);
 
-    if((icfg->cmic_ver >= 4) &&
-       ((subwin_base == 0x10230000) || (subwin_base == 0x18012000))) {
-        /* Route the PAXB register through IMAP0_2 */
-        reg = ROFFS(iproc_regs, 0x2000 + (addr & 0xfff));
-    } else if((icfg->cmic_ver >= 4) &&
-       ((subwin_base == 0x10231000) || (subwin_base == 0x18013000))) {
-        /* Route the INTC block access through IMAP0_6 */
-        reg = ROFFS(iproc_regs, 0x6000 + (addr & 0xfff));
+    if (icfg->iproc_ver >= 20) {
+        if (subwin_base == 0x292c000) {
+            /* Route PAXB register through IMAP0_2 */
+            reg = ROFFS(iproc_regs, 0x2000 + (addr & 0xfff));
+        } else if (subwin_base == 0x292d000) {
+            /* Route INTC register through IMAP0_6 */
+            reg = ROFFS(iproc_regs, 0x6000 + (addr & 0xfff));
+        }
     } else {
-    /* Update base address for sub-window 7 */
+        if((icfg->cmic_ver >= 4) &&
+           ((subwin_base == 0x10230000) || (subwin_base == 0x18012000))) {
+            /* Route the PAXB register through IMAP0_2 */
+            reg = ROFFS(iproc_regs, 0x2000 + (addr & 0xfff));
+        } else if((icfg->cmic_ver >= 4) &&
+           ((subwin_base == 0x10231000) || (subwin_base == 0x18013000))) {
+            /* Route the INTC block access through IMAP0_6 */
+            reg = ROFFS(iproc_regs, 0x6000 + (addr & 0xfff));
+        }
+    }
+
+    /* Not found fixed sub-window, reuse the sub-window 7 */
+    if (0 == reg) {
+        /* Update base address for sub-window 7 */
         subwin_base |= 1; /* Valid bit */
         reg = ROFFS(iproc_regs, BAR0_PAXB_IMAP0_7);
         iproc32_write(shbde, reg, subwin_base);
@@ -400,7 +410,7 @@ shbde_iproc_pci_write(shbde_hal_t *shbde, void *iproc_regs,
                       unsigned int addr, unsigned int data)
 {
     unsigned int subwin_base;
-    void *reg;
+    void *reg = 0;
     shbde_iproc_config_t *icfg = &shbde->icfg;
 
     if (!iproc_regs) {
@@ -410,16 +420,29 @@ shbde_iproc_pci_write(shbde_hal_t *shbde, void *iproc_regs,
     /* Sub-window size is 0x1000 (4K) */
     subwin_base = (addr & ~0xfff);
 
-    if((icfg->cmic_ver >= 4) &&
-       ((subwin_base == 0x10230000) || (subwin_base == 0x18012000))) {
-        /* Route the PAXB register through IMAP0_2 */
-        reg = ROFFS(iproc_regs, 0x2000 + (addr & 0xfff));
-    } else if((icfg->cmic_ver >= 4) &&
-       ((subwin_base == 0x10231000) || (subwin_base == 0x18013000))) {
-        /* Route the INTC block access through IMAP0_6 */
-        reg = ROFFS(iproc_regs, 0x6000 + (addr & 0xfff));
+    if (icfg->iproc_ver >= 20) {
+        if (subwin_base == 0x292c000) {
+            /* Route PAXB register through IMAP0_2 */
+            reg = ROFFS(iproc_regs, 0x2000 + (addr & 0xfff));
+        } else if (subwin_base == 0x292d000) {
+             /* Route INTC register through IMAP0_6 */
+             reg = ROFFS(iproc_regs, 0x6000 + (addr & 0xfff));
+        }
     } else {
-    /* Update base address for sub-window 7 */
+        if((icfg->cmic_ver >= 4) &&
+           ((subwin_base == 0x10230000) || (subwin_base == 0x18012000))) {
+            /* Route the PAXB register through IMAP0_2 */
+            reg = ROFFS(iproc_regs, 0x2000 + (addr & 0xfff));
+        } else if((icfg->cmic_ver >= 4) &&
+           ((subwin_base == 0x10231000) || (subwin_base == 0x18013000))) {
+            /* Route the INTC block access through IMAP0_6 */
+            reg = ROFFS(iproc_regs, 0x6000 + (addr & 0xfff));
+        }
+    }
+
+    /* Not found fixed sub-window */
+    if (0 == reg) {
+        /* Update base address for sub-window 7 */
         subwin_base |= 1; /* Valid bit */
         reg = ROFFS(iproc_regs, BAR0_PAXB_IMAP0_7);
         iproc32_write(shbde, reg, subwin_base);
diff --git a/platform/broadcom/saibcm-modules/systems/bde/shared/shbde_mdio.c b/platform/broadcom/saibcm-modules/systems/bde/shared/shbde_mdio.c
index 1e38eb024..e5e8c6dc7 100644
--- a/platform/broadcom/saibcm-modules/systems/bde/shared/shbde_mdio.c
+++ b/platform/broadcom/saibcm-modules/systems/bde/shared/shbde_mdio.c
@@ -1,5 +1,6 @@
 /*
- * Copyright 2007-2020 Broadcom Inc. All rights reserved.
+ * $Id: $
+ * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
  * 
  * Permission is granted to use, copy, modify and/or distribute this
  * software under either one of the licenses below.
@@ -22,12 +23,8 @@
  * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
  * 
  * This software is governed by the Broadcom Open Network Switch APIs license:
- * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa
- */
-/*
- * $Id: $
- * $Copyright: (c) 2015 Broadcom Corp.
- * All Rights Reserved.$
+ * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+ * 
  *
  */
 
diff --git a/platform/broadcom/saibcm-modules/systems/bde/shared/shbde_pci.c b/platform/broadcom/saibcm-modules/systems/bde/shared/shbde_pci.c
index 8e64b475a..869d4b169 100644
--- a/platform/broadcom/saibcm-modules/systems/bde/shared/shbde_pci.c
+++ b/platform/broadcom/saibcm-modules/systems/bde/shared/shbde_pci.c
@@ -1,5 +1,6 @@
 /*
- * Copyright 2007-2020 Broadcom Inc. All rights reserved.
+ * $Id: $
+ * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
  * 
  * Permission is granted to use, copy, modify and/or distribute this
  * software under either one of the licenses below.
@@ -22,12 +23,8 @@
  * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
  * 
  * This software is governed by the Broadcom Open Network Switch APIs license:
- * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa
- */
-/*
- * $Id: $
- * $Copyright: (c) 2014 Broadcom Corp.
- * All Rights Reserved.$
+ * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+ * 
  *
  */
 
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/Makefile b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/Makefile
index b599580ae..74591ad78 100644
--- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/Makefile
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/Makefile
@@ -1,33 +1,30 @@
-#
-#  Copyright 2007-2020 Broadcom Inc. All rights reserved.
-#  
-#  Permission is granted to use, copy, modify and/or distribute this
-#  software under either one of the licenses below.
-#  
-#  License Option 1: GPL
-#  
-#  This program is free software; you can redistribute it and/or modify
-#  it under the terms of the GNU General Public License, version 2, as
-#  published by the Free Software Foundation (the "GPL").
-#  
-#  This program is distributed in the hope that it will be useful, but
-#  WITHOUT ANY WARRANTY; without even the implied warranty of
-#  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
-#  General Public License version 2 (GPLv2) for more details.
-#  
-#  You should have received a copy of the GNU General Public License
-#  version 2 (GPLv2) along with this source code.
-#  
-#  
-#  License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
-#  
-#  This software is governed by the Broadcom Open Network Switch APIs license:
-#  https://www.broadcom.com/products/ethernet-connectivity/software/opennsa
-#
 # -*- Makefile -*-
 # $Id: Makefile,v 1.10 Broadcom SDK $
-# $Copyright: (c) 2005 Broadcom Corp.
-# All Rights Reserved.$
+# $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+# 
+# Permission is granted to use, copy, modify and/or distribute this
+# software under either one of the licenses below.
+# 
+# License Option 1: GPL
+# 
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License, version 2, as
+# published by the Free Software Foundation (the "GPL").
+# 
+# This program is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+# General Public License version 2 (GPLv2) for more details.
+# 
+# You should have received a copy of the GNU General Public License
+# version 2 (GPLv2) along with this source code.
+# 
+# 
+# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
+# 
+# This software is governed by the Broadcom Open Network Switch APIs license:
+# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+# 
 #
 # Makefile for SOC SAL support
 #
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/Makefile b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/Makefile
new file mode 100644
index 000000000..c12c4e0b6
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/Makefile
@@ -0,0 +1,91 @@
+# -*- Makefile -*-
+# $Id: Makefile,v 1.3 Broadcom SDK $
+# $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+# 
+# Permission is granted to use, copy, modify and/or distribute this
+# software under either one of the licenses below.
+# 
+# License Option 1: GPL
+# 
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License, version 2, as
+# published by the Free Software Foundation (the "GPL").
+# 
+# This program is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+# General Public License version 2 (GPLv2) for more details.
+# 
+# You should have received a copy of the GNU General Public License
+# version 2 (GPLv2) along with this source code.
+# 
+# 
+# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
+# 
+# This software is governed by the Broadcom Open Network Switch APIs license:
+# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+# 
+#
+LOCALDIR = systems/linux/kernel/modules/bcm-genl
+
+include ${SDK}/make/Make.config
+
+LIBS = $(LIBDIR)/libkern.a
+ifndef DCBDIR
+DCBDIR = $(SDK)/systems/linux/kernel/modules/dcb
+# $(error 'The $$DCBDIR variable is not set')
+endif
+ifeq (1,$(NO_PRECOMPILED_MODULE))
+$(error 'DCB_LIB build is not supported if NO_PRECOMPILED_MODULE=1')
+endif
+LIBS += $(LIBDIR)/libdcb.a
+CFLAGS += -DDCBLIB_SUPPORT -I$(DCBDIR)/include
+ifeq (1,$(BUILD_GENL_PACKET))
+CFLAGS += -I${SDK}/systems/linux/kernel/modules/include/kernel
+endif
+
+KERNEL_MODULE_DIR = kernel_module
+
+THIS_MOD_NAME := linux-bcm-genl
+MODULE = $(LIBDIR)/$(THIS_MOD_NAME).o
+KMODULE = $(LIBDIR)/$(THIS_MOD_NAME).ko
+
+# BCM Network Device
+# {
+KBUILD_EXTRA_SYMBOLS := ${BLDDIR}/../bcm-knet/kernel_module/Module.symvers
+ifeq (1,$(BUILD_GENL_PACKET))
+KBUILD_EXTRA_SYMBOLS += ${BLDDIR}/../genl-packet/kernel_module/Module.symvers
+endif
+export KBUILD_EXTRA_SYMBOLS
+
+build: $(MODULE) $(KMODULE)
+#
+# This is for the compilation of the 'precompiled' object. We keep it
+# here for compatibility.
+#
+$(LIBDIR)/libdcb.a:
+	$(MAKE) -C $(DCBDIR)/make BLDDIR=$(LIBDIR) \
+		KADD_CFLAGS="-I${SDK}/systems/linux/kernel/modules/include $(KFLAGS) -D$(ENDIAN)" \
+		CROSS_COMPILE=$(CROSS_COMPILE)
+
+$(MODULE): $(BLDDIR)/.tree $(BOBJS) $(LIBS)
+	$(LD) $(MODULE_LDFLAGS) -r -d $(BOBJS) $(LIBS) -o $@
+
+$(KMODULE): $(MODULE)
+	rm -fr $(BLDDIR)/$(KERNEL_MODULE_DIR)
+	mkdir $(BLDDIR)/$(KERNEL_MODULE_DIR)
+	cp ${SDK}/make/Makefile.linux-kmodule $(BLDDIR)/$(KERNEL_MODULE_DIR)/Makefile
+	cat ${KBUILD_EXTRA_SYMBOLS} > $(BLDDIR)/$(KERNEL_MODULE_DIR)/Module.symvers
+	MOD_NAME=$(THIS_MOD_NAME) $(MAKE) -C $(BLDDIR)/$(KERNEL_MODULE_DIR) $(THIS_MOD_NAME).ko
+# }
+
+# Make.depend is before clean:: so that Make.depend's clean:: runs first.
+
+include ${SDK}/make/Make.depend
+
+clean::
+	$(RM) $(BLDDIR)/version.c $(BLDDIR)/version.o
+	$(RM) $(BOBJS) $(MODULE)
+	$(MAKE) -C $(DCBDIR)/make BLDDIR=$(LIBDIR) clean
+
+.PHONY: build
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-dev.c b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-dev.c
new file mode 100644
index 000000000..7e0d85e3e
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-dev.c
@@ -0,0 +1,199 @@
+/*
+ * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * 
+ * Permission is granted to use, copy, modify and/or distribute this
+ * software under either one of the licenses below.
+ * 
+ * License Option 1: GPL
+ * 
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License, version 2, as
+ * published by the Free Software Foundation (the "GPL").
+ * 
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License version 2 (GPLv2) for more details.
+ * 
+ * You should have received a copy of the GNU General Public License
+ * version 2 (GPLv2) along with this source code.
+ * 
+ * 
+ * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
+ * 
+ * This software is governed by the Broadcom Open Network Switch APIs license:
+ * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+ * 
+ */
+
+/*
+ * Middle-driver for communication between Linux KNET driver and
+ * drivers support Generic Netlink channel.
+ *
+ * This code is used to provide the device information.
+ * This driver is built with the DCB library as the helper for parsing
+ * the RX packet meta data from the Linux KNET driver filter call-back function.
+ * The environment DCBDIR must be set to indicate the directroy of the DCB
+ * library.
+ */
+
+#include <gmodule.h> /* Must be included first */
+#include <linux-bde.h>
+#include <kcom.h>
+#include <bcm-knet.h>
+
+#include <appl/dcb/dcb_handler.h>
+
+#include "bcm-genl-dev.h"
+
+/* Module header Op-Codes */
+#define SOC_HIGIG_OP_CPU        0x00 /* CPU Frame */
+#define SOC_HIGIG_OP_UC         0x01 /* Unicast Frame */
+#define SOC_HIGIG_OP_BC         0x02 /* Broadcast or DLF frame */
+#define SOC_HIGIG_OP_MC         0x03 /* Multicast Frame */
+#define SOC_HIGIG_OP_IPMC       0x04 /* IP Multicast Frame */
+
+static dcb_handle_t g_dcb_hdl[LINUX_BDE_MAX_DEVICES];
+
+static dcb_handle_t *
+dcb_handle_get(int dev_no)
+{
+    uint16_t dev_id;
+    uint8_t rev_id;
+    dcb_handle_t *dcbh;
+
+    if (dev_no >= LINUX_BDE_MAX_DEVICES || dev_no < 0) {
+        return NULL;
+    }
+
+    dcbh = &g_dcb_hdl[dev_no];
+    if (DCB_OP(dcbh) == NULL) {
+        if (bkn_hw_device_get(dev_no, &dev_id, &rev_id) < 0) {
+            return NULL;
+        }
+        if (dcb_handle_init(dcbh, dev_id, rev_id) != DCB_OK) {
+            gprintk("%s: dev id 0x%04x rev id 0x%02x is not supported\n",
+                    __func__, dev_id, rev_id);
+            return NULL;
+        }
+    }
+
+    return DCB_OP(dcbh) ? dcbh : NULL;
+}
+
+int
+bcmgenl_dev_pktmeta_rx_srcport_get(int dev_no, void *pkt_meta,
+                                   uint32_t *srcport)
+{
+    dcb_handle_t *dcbh = dcb_handle_get(dev_no);
+
+    if (dcbh == NULL || srcport == NULL) {
+        return -1;
+    }
+
+    *srcport = DCB_RX_SRCPORT_GET(dcbh, pkt_meta);
+
+    return 0;
+}
+
+int
+bcmgenl_dev_pktmeta_rx_dstport_get(int dev_no, void *pkt_meta,
+                                   bool *mcast, uint32_t *dstport)
+{
+    dcb_handle_t *dcbh = dcb_handle_get(dev_no);
+    uint32_t opc;
+
+    if (dcbh == NULL || mcast == NULL || dstport == NULL) {
+        return -1;
+    }
+
+    opc = DCB_RX_OPCODE_GET(dcbh, pkt_meta);
+    *mcast = (opc == SOC_HIGIG_OP_CPU || opc == SOC_HIGIG_OP_UC) ? 0 : 1;
+    if (*mcast) {
+        *dstport = 0;
+    } else {
+        *dstport = DCB_RX_DESTPORT_GET(dcbh, pkt_meta);
+    }
+
+    return 0;
+}
+
+int
+bcmgenl_dev_pktmeta_rx_reason_get(int dev_no, void *pkt_meta, uint64_t *reason)
+{
+    dcb_handle_t *dcbh = dcb_handle_get(dev_no);
+
+    if (dcbh == NULL || reason == NULL) {
+        return -1;
+    }
+
+    *reason = (uint64_t)DCB_RX_REASON_HI_GET(dcbh, pkt_meta) << 32;
+    *reason |= DCB_RX_REASON_GET(dcbh, pkt_meta);
+
+    return 0;
+}
+
+int
+bcmgenl_dev_rx_reason_sample_source_get(int dev_no, uint64_t *val)
+{
+    dcb_handle_t *dcbh = dcb_handle_get(dev_no);
+    soc_rx_reason_t *map;
+    int idx = 0;
+
+    if (dcbh == NULL || val == NULL) {
+        return -1;
+    }
+    *val = 0;
+
+    if (DCB_TYPE(dcbh) == 38) {
+        /* Rx reason for SampleSouce is an encoded value (3) in bits [17:16] */
+        *val = 0x30000;
+    } else {
+        map = DCB_OP(dcbh)->rx_reason_maps[0];
+        do {
+            if (map[idx] == socRxReasonSampleSource) {
+                *val = (uint64_t)1 << idx;
+                break;
+            }
+        } while (map[++idx] != socRxReasonInvalid);
+    }
+
+    if (*val == 0) {
+        gprintk("%s: No rx reasone sample source for dcb type %d\n",
+                __func__, DCB_TYPE(dcbh));
+        return -1;
+    }
+    return 0;
+}
+
+int
+bcmgenl_dev_dcb_info_get(int dev_no, int *dcb_type, int *dcb_size)
+{
+    dcb_handle_t *dcbh = dcb_handle_get(dev_no);
+
+    if (dcbh == NULL) {
+        return -1;
+    }
+
+    if (dcb_type) {
+        *dcb_type = DCB_TYPE(dcbh);
+    }
+    if (dcb_size) {
+        *dcb_size = DCB_SIZE(dcbh);
+    }
+
+    return 0;
+}
+
+int
+bcmgenl_dev_init(void)
+{
+    memset(g_dcb_hdl, 0, sizeof(g_dcb_hdl));
+    return 0;
+}
+
+int
+bcmgenl_dev_cleanup(void)
+{
+    return 0;
+}
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-dev.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-dev.h
new file mode 100644
index 000000000..edff871d1
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-dev.h
@@ -0,0 +1,55 @@
+/*
+ * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * 
+ * Permission is granted to use, copy, modify and/or distribute this
+ * software under either one of the licenses below.
+ * 
+ * License Option 1: GPL
+ * 
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License, version 2, as
+ * published by the Free Software Foundation (the "GPL").
+ * 
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License version 2 (GPLv2) for more details.
+ * 
+ * You should have received a copy of the GNU General Public License
+ * version 2 (GPLv2) along with this source code.
+ * 
+ * 
+ * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
+ * 
+ * This software is governed by the Broadcom Open Network Switch APIs license:
+ * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+ * 
+ */
+
+#ifndef __BCM_GENL_DEV_H__
+#define __BCM_GENL_DEV_H__
+
+extern int
+bcmgenl_dev_pktmeta_rx_srcport_get(int dev_no, void *pkt_meta,
+                                   uint32_t *srcport);
+
+extern int
+bcmgenl_dev_pktmeta_rx_dstport_get(int dev_no, void *pkt_meta,
+                                   bool *mcast, uint32_t *dstport);
+
+extern int
+bcmgenl_dev_pktmeta_rx_reason_get(int dev_no, void *pkt_meta, uint64_t *reason);
+
+extern int
+bcmgenl_dev_rx_reason_sample_source_get(int dev_no, uint64_t *val);
+
+extern int
+bcmgenl_dev_dcb_info_get(int dev_no, int *dcb_type, int *dcb_size);
+
+extern int
+bcmgenl_dev_init(void);
+
+extern int
+bcmgenl_dev_cleanup(void);
+
+#endif /* __BCM_GENL_DEV_H__ */
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-netif.c b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-netif.c
new file mode 100644
index 000000000..b8eb60148
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-netif.c
@@ -0,0 +1,293 @@
+/*
+ * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * 
+ * Permission is granted to use, copy, modify and/or distribute this
+ * software under either one of the licenses below.
+ * 
+ * License Option 1: GPL
+ * 
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License, version 2, as
+ * published by the Free Software Foundation (the "GPL").
+ * 
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License version 2 (GPLv2) for more details.
+ * 
+ * You should have received a copy of the GNU General Public License
+ * version 2 (GPLv2) along with this source code.
+ * 
+ * 
+ * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
+ * 
+ * This software is governed by the Broadcom Open Network Switch APIs license:
+ * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+ * 
+ */
+
+/*
+ * Middle-driver for communication between Linux KNET driver and
+ * drivers support Generic Netlink channel.
+ *
+ * This code is to handle the NET interfaces from the create and destroy
+ * call-back functios of Linux KNET driver.
+ */
+
+#include <gmodule.h> /* Must be included first */
+#include <kcom.h>
+#include <bcm-knet.h>
+#include <linux/if_vlan.h>
+#include <linux/skbuff.h>
+#include <linux/sched.h>
+#include <linux/netdevice.h>
+#include "bcm-genl-netif.h"
+
+/* generic netlink interface info */
+typedef struct {
+    struct list_head netif_list;
+    int netif_count;
+    spinlock_t lock;
+} genl_netif_info_t;
+static genl_netif_info_t g_netif_info;
+
+typedef struct {
+    struct list_head list;
+    bcmgenl_netif_t netif;
+} genl_netif_t;
+
+static uint32 g_sample_rate;
+static uint32 g_sample_size;
+
+static int
+knet_netif_create_cb(struct net_device *dev, int dev_no, kcom_netif_t *netif)
+{
+    int found = 0;
+    struct list_head *list_ptr;
+    genl_netif_t *genl_netif, *lgenl_netif;
+    bcmgenl_netif_t *bcmgenl_netif;
+    unsigned long flags;
+
+    if ((genl_netif = kmalloc(sizeof(genl_netif_t), GFP_ATOMIC)) == NULL) {
+        gprintk("%s: failed to alloc genl-netif memory for netif '%s'\n",
+                __func__, dev->name);
+        return -1;
+    }
+
+    bcmgenl_netif = &genl_netif->netif;
+    bcmgenl_netif->dev = dev;
+    bcmgenl_netif->id = netif->id;
+    bcmgenl_netif->port = netif->port;
+    bcmgenl_netif->vlan = netif->vlan;
+    bcmgenl_netif->qnum = netif->qnum;
+    bcmgenl_netif->sample_rate = g_sample_rate;
+    bcmgenl_netif->sample_size = g_sample_size;
+
+    /* insert netif sorted by ID similar to bkn_knet_netif_create() */
+    spin_lock_irqsave(&g_netif_info.lock, flags);
+
+    list_for_each(list_ptr, &g_netif_info.netif_list) {
+        lgenl_netif = list_entry(list_ptr, genl_netif_t, list);
+        bcmgenl_netif = &lgenl_netif->netif;
+        if (netif->id < bcmgenl_netif->id) {
+            found = 1;
+            break;
+        }
+    }
+    if (found) {
+        /* Replace previously removed interface */
+        list_add_tail(&genl_netif->list, &lgenl_netif->list);
+    } else {
+        /* No holes - add to end of list */
+        list_add_tail(&genl_netif->list, &g_netif_info.netif_list);
+    }
+    g_netif_info.netif_count++;
+
+    spin_unlock_irqrestore(&g_netif_info.lock, flags);
+
+    return 0;
+}
+
+static int
+knet_netif_destroy_cb(struct net_device *dev, int dev_no, kcom_netif_t *netif)
+{
+    int found = 0;
+    struct list_head *list_ptr, *list_next;
+    genl_netif_t *genl_netif;
+    bcmgenl_netif_t *bcmgenl_netif;
+    unsigned long flags;
+
+    if (!netif || !dev) {
+        gprintk("%s: netif or net_device is NULL\n", __func__);
+        return -1;
+    }
+
+    spin_lock_irqsave(&g_netif_info.lock, flags);
+    list_for_each_safe(list_ptr, list_next, &g_netif_info.netif_list) {
+        genl_netif = list_entry(list_ptr, genl_netif_t, list);
+        bcmgenl_netif = &genl_netif->netif;
+        if (netif->id == bcmgenl_netif->id) {
+            found = 1;
+            list_del(list_ptr);
+            g_netif_info.netif_count--;
+            break;
+        }
+    }
+    spin_unlock_irqrestore(&g_netif_info.lock, flags);
+
+    if (!found) {
+        gprintk("%s: netif ID %d not found!\n", __func__, netif->id);
+        return -1;
+    }
+    kfree(genl_netif);
+    return 0;
+}
+
+int
+bcmgenl_netif_search(char *dev_name,
+                     bcmgenl_netif_search_f cb, void *cb_data)
+{
+    struct list_head *list_ptr;
+    genl_netif_t *genl_netif;
+    bcmgenl_netif_t *bcmgenl_netif;
+    unsigned long flags;
+    int rv;
+    int cnt = 0;
+
+    if (cb == NULL) {
+        return -1;
+    }
+
+    spin_lock_irqsave(&g_netif_info.lock, flags);
+    list_for_each(list_ptr, &g_netif_info.netif_list) {
+        genl_netif = list_entry(list_ptr, genl_netif_t, list);
+        bcmgenl_netif = &genl_netif->netif;
+        if (dev_name && strcmp(bcmgenl_netif->dev->name, dev_name) != 0) {
+            continue;
+        }
+        rv = cb(cb_data, bcmgenl_netif);
+        if (rv < 0) {
+            spin_unlock_irqrestore(&g_netif_info.lock, flags);
+            return rv;
+        }
+        cnt++;
+    }
+    spin_unlock_irqrestore(&g_netif_info.lock, flags);
+
+    return cnt;
+}
+
+int
+bcmgenl_netif_num_get(void)
+{
+    int num = 0;
+    unsigned long flags;
+
+    spin_lock_irqsave(&g_netif_info.lock, flags);
+    num = g_netif_info.netif_count;
+    spin_unlock_irqrestore(&g_netif_info.lock, flags);
+
+    return num;
+}
+
+int
+bcmgenl_netif_get_by_ifindex(int ifindex, bcmgenl_netif_t *bcmgenl_netif)
+{
+    struct list_head *list_ptr;
+    genl_netif_t *genl_netif;
+    bcmgenl_netif_t *netif;
+    unsigned long flags;
+
+    if (bcmgenl_netif == NULL) {
+        return -1;
+    }
+
+    /* look for port from list of available net_devices */
+    spin_lock_irqsave(&g_netif_info.lock, flags);
+    list_for_each(list_ptr, &g_netif_info.netif_list) {
+        genl_netif = list_entry(list_ptr, genl_netif_t, list);
+        netif = &genl_netif->netif;
+        if (netif->dev->ifindex == ifindex) {
+            memcpy(bcmgenl_netif, netif, sizeof(*bcmgenl_netif));
+            spin_unlock_irqrestore(&g_netif_info.lock, flags);
+            return 0;
+        }
+    }
+    spin_unlock_irqrestore(&g_netif_info.lock, flags);
+
+    return -1;
+}
+
+int
+bcmgenl_netif_get_by_port(int port, bcmgenl_netif_t *bcmgenl_netif)
+{
+    struct list_head *list_ptr;
+    genl_netif_t *genl_netif;
+    bcmgenl_netif_t *netif;
+    unsigned long flags;
+
+    if (bcmgenl_netif == NULL) {
+        return -1;
+    }
+
+    /* look for port from list of available net_devices */
+    spin_lock_irqsave(&g_netif_info.lock, flags);
+    list_for_each(list_ptr, &g_netif_info.netif_list) {
+        genl_netif = list_entry(list_ptr, genl_netif_t, list);
+        netif = &genl_netif->netif;
+        if (netif->port == port) {
+            memcpy(bcmgenl_netif, netif, sizeof(bcmgenl_netif_t));
+            spin_unlock_irqrestore(&g_netif_info.lock, flags);
+            return 0;
+        }
+    }
+    spin_unlock_irqrestore(&g_netif_info.lock, flags);
+
+    return -1;
+}
+
+int
+bcmgenl_netif_default_sample_set(int sample_rate, int sample_size)
+{
+    if (sample_rate >= 0) {
+        g_sample_rate = sample_rate;
+    }
+    if (sample_size >= 0) {
+        g_sample_size = sample_size;
+    }
+
+    return 0;
+}
+
+int
+bcmgenl_netif_init(void)
+{
+    memset(&g_netif_info, 0, sizeof(genl_netif_info_t));
+
+    INIT_LIST_HEAD(&g_netif_info.netif_list);
+    spin_lock_init(&g_netif_info.lock);
+
+    bkn_netif_create_cb_register(knet_netif_create_cb);
+    bkn_netif_destroy_cb_register(knet_netif_destroy_cb);
+
+    return 0;
+}
+
+int
+bcmgenl_netif_cleanup(void)
+{
+    genl_netif_t *genl_netif;
+
+    bkn_netif_create_cb_unregister(knet_netif_create_cb);
+    bkn_netif_destroy_cb_unregister(knet_netif_destroy_cb);
+
+    while (!list_empty(&g_netif_info.netif_list)) {
+        genl_netif = list_entry(g_netif_info.netif_list.next,
+                                genl_netif_t, list);
+        list_del(&genl_netif->list);
+        kfree(genl_netif);
+    }
+
+    return 0;
+}
+
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-netif.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-netif.h
new file mode 100644
index 000000000..2a7c31cee
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-netif.h
@@ -0,0 +1,69 @@
+/*
+ * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * 
+ * Permission is granted to use, copy, modify and/or distribute this
+ * software under either one of the licenses below.
+ * 
+ * License Option 1: GPL
+ * 
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License, version 2, as
+ * published by the Free Software Foundation (the "GPL").
+ * 
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License version 2 (GPLv2) for more details.
+ * 
+ * You should have received a copy of the GNU General Public License
+ * version 2 (GPLv2) along with this source code.
+ * 
+ * 
+ * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
+ * 
+ * This software is governed by the Broadcom Open Network Switch APIs license:
+ * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+ * 
+ */
+
+#ifndef __BCM_GENL_NETIF_H__
+#define __BCM_GENL_NETIF_H__
+
+#include <linux/netdevice.h>
+
+/* generic netlink data per interface */
+typedef struct {
+    struct net_device *dev;
+    unsigned short id;
+    unsigned char  port;
+    unsigned short vlan;
+    unsigned short qnum;
+    unsigned int sample_rate;
+    unsigned int sample_size;
+} bcmgenl_netif_t;
+
+typedef int
+(*bcmgenl_netif_search_f)(void *cb_data, bcmgenl_netif_t *bcmgenl_netif);
+
+extern int
+bcmgenl_netif_search(char *dev_name, bcmgenl_netif_search_f cb, void *cb_data);
+
+extern int
+bcmgenl_netif_num_get(void);
+
+extern int
+bcmgenl_netif_get_by_ifindex(int ifindex, bcmgenl_netif_t *bcmgenl_netif);
+
+extern int
+bcmgenl_netif_get_by_port(int port, bcmgenl_netif_t *bcmgenl_netif);
+
+extern int
+bcmgenl_netif_default_sample_set(int sample_rate, int sample_size);
+
+extern int
+bcmgenl_netif_init(void);
+
+extern int
+bcmgenl_netif_cleanup(void);
+
+#endif /* __BCM_GENL_NETIF_H__ */
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-packet.c b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-packet.c
new file mode 100644
index 000000000..095c001c5
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-packet.c
@@ -0,0 +1,664 @@
+/*
+ * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * 
+ * Permission is granted to use, copy, modify and/or distribute this
+ * software under either one of the licenses below.
+ * 
+ * License Option 1: GPL
+ * 
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License, version 2, as
+ * published by the Free Software Foundation (the "GPL").
+ * 
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License version 2 (GPLv2) for more details.
+ * 
+ * You should have received a copy of the GNU General Public License
+ * version 2 (GPLv2) along with this source code.
+ * 
+ * 
+ * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
+ * 
+ * This software is governed by the Broadcom Open Network Switch APIs license:
+ * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+ * 
+ */
+
+/*
+ * Middle-driver for communication between Linux KNET driver and
+ * drivers support Generic Netlink channel.
+ *
+ * This code is used to integrate packet from KNET Rx filter
+ * call-back function to the genl_packet driver from Google
+ * for sending packets to userspace applications using Generic Netlink
+ * interfaces.
+ *
+ * This driver is also built with the DCB library as the helper for parsing
+ * the RX packet meta data from the Linux KNET driver filter call-back function.
+ * The environment DCBDIR must be set to indicate the directroy of the DCB
+ * library.
+ */
+#ifdef BUILD_GENL_PACKET
+#include <gmodule.h> /* Must be included first */
+#include <kcom.h>
+#include <bcm-knet.h>
+#include <linux/if_vlan.h>
+#include <linux/skbuff.h>
+#include <linux/sched.h>
+#include <linux/netdevice.h>
+#include <linux/namei.h>
+#include <linux/time.h>
+#ifndef LINUX_HAS_MONOTONIC_TIME
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,17,0)
+#include <linux/timekeeping.h>
+#define LINUX_HAS_MONOTONIC_TIME
+#endif
+#endif
+#include <net/net_namespace.h>
+#include <net/genl-packet.h>
+#include <uapi/linux/genl-packet.h>
+#include "bcm-genl-packet.h"
+#include "bcm-genl-dev.h"
+#include "bcm-genl-netif.h"
+
+#define GENL_CB_DBG
+#ifdef GENL_CB_DBG
+static int debug;
+
+#define DBG_LVL_PRINT   0x1
+#define DBG_LVL_PDMP    0x2
+#define GENL_CB_DBG_PRINT(...) \
+    if (debug & DBG_LVL_PRINT) {         \
+        gprintk(__VA_ARGS__);  \
+    }
+#else
+#define GENL_CB_DBG_PRINT(...)
+#endif
+
+/* last should be static or global */
+#ifdef LINUX_HAS_MONOTONIC_TIME
+#define genl_limited_gprintk(last, ...) { \
+  struct timespec64 tv; \
+  ktime_get_ts64(&tv); \
+  if (tv.tv_sec != last) { \
+    gprintk(__VA_ARGS__); \
+    last = tv.tv_sec; \
+  } \
+}
+#else
+#define genl_limited_gprintk(last, ...) { \
+  struct timeval tv; \
+  do_gettimeofday(&tv); \
+  if (tv.tv_sec != last) { \
+    gprintk(__VA_ARGS__); \
+    last = tv.tv_sec; \
+  } \
+}
+#endif
+
+#define FCS_SZ 4
+
+#define GENL_QLEN_DFLT 1024
+static int genl_qlen = GENL_QLEN_DFLT;
+LKM_MOD_PARAM(genl_qlen, "i", int, 0);
+MODULE_PARM_DESC(genl_qlen,
+"generic cb queue length (default 1024 buffers)");
+
+/* driver proc entry root */
+static struct proc_dir_entry *genl_proc_root = NULL;
+static char genl_procfs_path[80];
+
+/* generic general info */
+typedef struct {
+    struct net *netns;
+} genl_info_t;
+static genl_info_t g_genl_info = {0};
+
+/* Maintain sampled pkt statistics */
+typedef struct genl_stats_s {
+    unsigned long pkts_f_genl_cb;
+    unsigned long pkts_f_genl_mod;
+    unsigned long pkts_f_handled;
+    unsigned long pkts_f_tag_stripped;
+    unsigned long pkts_f_dst_mc;
+    unsigned long pkts_f_src_cpu;
+    unsigned long pkts_f_dst_cpu;
+    unsigned long pkts_c_qlen_cur;
+    unsigned long pkts_c_qlen_hi;
+    unsigned long pkts_d_qlen_max;
+    unsigned long pkts_d_no_mem;
+    unsigned long pkts_d_not_ready;
+    unsigned long pkts_d_metadata;
+    unsigned long pkts_d_meta_srcport;
+    unsigned long pkts_d_meta_dstport;
+    unsigned long pkts_d_invalid_size;
+} genl_stats_t;
+static genl_stats_t g_genl_stats = {0};
+
+typedef struct genl_meta_s {
+    int src_ifindex;
+    int dst_ifindex;
+    uint32 user_data;
+} genl_meta_t;
+
+typedef struct genl_pkt_s {
+    struct list_head list;
+    struct net *netns;
+    genl_meta_t meta;
+    struct sk_buff *skb;
+} genl_pkt_t;
+
+typedef struct genl_work_s {
+    struct list_head pkt_list;
+    struct work_struct wq;
+    spinlock_t lock;
+} genl_work_t;
+static genl_work_t g_genl_work;
+
+static int
+genl_meta_srcport_get(int dev_no, void *pkt_meta)
+{
+    uint32_t p;
+
+    if (bcmgenl_dev_pktmeta_rx_srcport_get(dev_no, pkt_meta, &p) < 0) {
+        return -1;
+    }
+
+    return p;
+}
+
+static int
+genl_meta_dstport_get(int dev_no, void *pkt_meta, bool *is_mcast)
+{
+    bool mcast;
+    uint32_t p;
+
+    if (bcmgenl_dev_pktmeta_rx_dstport_get(dev_no, pkt_meta, &mcast, &p) < 0) {
+        return -1;
+    }
+    if (is_mcast) {
+        *is_mcast = mcast;
+    }
+
+    return p;
+}
+
+static int
+genl_meta_get(int dev_no, kcom_filter_t *kf, void *pkt_meta,
+              genl_meta_t *genl_meta)
+{
+    bool mcast = false;
+    int srcport, dstport;
+    int src_ifindex = 0;
+    int dst_ifindex = 0;
+    bcmgenl_netif_t bcmgenl_netif;
+
+#ifdef GENL_CB_DBG
+    if (debug & 0x1) {
+        int i=0;
+        uint8_t *meta = (uint8_t*)pkt_meta;
+        GENL_CB_DBG_PRINT("%s: generic pkt metadata\n", __func__);
+        for (i=0; i<64; i+=16) {
+            GENL_CB_DBG_PRINT("%02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n",
+                    meta[i+0], meta[i+1], meta[i+2], meta[i+3], meta[i+4], meta[i+5], meta[i+6], meta[i+7],
+                    meta[i+8], meta[i+9], meta[i+10], meta[i+11], meta[i+12], meta[i+13], meta[i+14], meta[i+15]);
+        }
+    }
+#endif
+
+    /* parse pkt metadata for src and dst ports */
+    srcport = genl_meta_srcport_get(dev_no, pkt_meta);
+    dstport = genl_meta_dstport_get(dev_no, pkt_meta, &mcast);
+    if (srcport == -1 || dstport == -1) {
+        gprintk("%s: invalid srcport %d or dstport %d\n", __func__, srcport, dstport);
+        return -1;
+    }
+
+    /* find src port netif (no need to lookup CPU port) */
+    if (srcport != 0) {
+        if (bcmgenl_netif_get_by_port(srcport, &bcmgenl_netif) == 0) {
+            src_ifindex = bcmgenl_netif.dev->ifindex;
+        } else {
+            src_ifindex = -1;
+            g_genl_stats.pkts_d_meta_srcport++;
+            GENL_CB_DBG_PRINT("%s: could not find srcport(%d)\n", __func__, srcport);
+        }
+    } else {
+        g_genl_stats.pkts_f_src_cpu++;
+    }
+
+    /* set generic dst type for MC pkts */
+    if (mcast) {
+        g_genl_stats.pkts_f_dst_mc++;
+    /* find dst port netif for UC pkts (no need to lookup CPU port) */
+    } else if (dstport != 0) {
+        if (bcmgenl_netif_get_by_port(dstport, &bcmgenl_netif) == 0) {
+            dst_ifindex = bcmgenl_netif.dev->ifindex;
+        } else {
+            g_genl_stats.pkts_d_meta_dstport++;
+            GENL_CB_DBG_PRINT("%s: could not find dstport(%d)\n", __func__, dstport);
+        }
+    } else if (dstport == 0) {
+        dst_ifindex = 0;
+        g_genl_stats.pkts_f_dst_cpu++;
+    }
+
+    GENL_CB_DBG_PRINT("%s: dstport %d, src_ifindex 0x%x, dst_ifindex 0x%x\n",
+                      __func__, dstport, src_ifindex, dst_ifindex);
+
+    genl_meta->src_ifindex = src_ifindex;
+    genl_meta->dst_ifindex = dst_ifindex;
+    return 0;
+}
+
+static void dump_pkt(struct sk_buff *skb)
+{
+    int idx;
+    char str[128];
+    uint8_t *data = skb->data;
+
+    for (idx = 0; idx < skb->len; idx++) {
+        if ((idx & 0xf) == 0) {
+            sprintf(str, "%04x: ", idx);
+        }
+        if ((idx & 0xf) == 8) {
+            sprintf(&str[strlen(str)], "- ");
+        }
+        sprintf(&str[strlen(str)], "%02x ", data[idx]);
+        if ((idx & 0xf) == 0xf) {
+            sprintf(&str[strlen(str)], "\n");
+            gprintk(str);
+        }
+    }
+    if ((idx & 0xf) != 0) {
+        sprintf(&str[strlen(str)], "\n");
+        gprintk(str);
+    }
+}
+
+static void
+genl_task(struct work_struct *work)
+{
+    genl_work_t *genl_work = container_of(work, genl_work_t, wq);
+    unsigned long flags;
+    struct list_head *list_ptr, *list_next;
+    genl_pkt_t *pkt;
+
+    spin_lock_irqsave(&genl_work->lock, flags);
+    list_for_each_safe(list_ptr, list_next, &genl_work->pkt_list) {
+        /* dequeue pkt from list */
+        pkt = list_entry(list_ptr, genl_pkt_t, list);
+        list_del(list_ptr);
+        g_genl_stats.pkts_c_qlen_cur--;
+        spin_unlock_irqrestore(&genl_work->lock, flags);
+
+        /* send to genl */
+        if (pkt) {
+            GENL_CB_DBG_PRINT("%s: netns 0x%p, src_ifdx 0x%x, dst_ifdx 0x%x\n",
+                    __func__, pkt->netns, pkt->meta.src_ifindex,
+                    pkt->meta.dst_ifindex);
+
+            if (debug & DBG_LVL_PDMP) {
+                dump_pkt(pkt->skb);
+            }
+
+            genl_packet_send_packet(pkt->netns,
+                                    pkt->skb,
+                                    pkt->meta.src_ifindex,
+                                    pkt->meta.dst_ifindex,
+                                    pkt->meta.user_data);
+            g_genl_stats.pkts_f_genl_mod++;
+
+            dev_kfree_skb_any(pkt->skb);
+            kfree(pkt);
+        }
+        spin_lock_irqsave(&genl_work->lock, flags);
+    }
+    spin_unlock_irqrestore(&genl_work->lock, flags);
+}
+
+static int
+genl_filter_cb(uint8_t * pkt, int size, int dev_no, void *pkt_meta,
+                  int chan, kcom_filter_t *kf)
+{
+    genl_meta_t meta;
+    int rv = 0;
+    unsigned long flags;
+    genl_pkt_t *genl_pkt;
+    struct sk_buff *skb;
+    bool strip_tag = false;
+    static uint32_t last_drop = 0;
+    static uint32_t last_alloc = 0;
+    static uint32_t last_skb_fail = 0;
+
+    GENL_CB_DBG_PRINT("%s: pkt size %d, kf->dest_id %d, kf->cb_user_data %d\n",
+            __func__, size, kf->dest_id, kf->cb_user_data);
+
+    g_genl_stats.pkts_f_genl_cb++;
+
+    /* get generic metadata */
+    rv = genl_meta_get(dev_no, kf, pkt_meta, &meta);
+    if (rv < 0) {
+        gprintk("%s: Could not parse pkt metadata\n", __func__);
+        g_genl_stats.pkts_d_metadata++;
+        goto GENL_FILTER_CB_PKT_HANDLED;
+    }
+
+    meta.user_data = kf->cb_user_data;
+
+    /* Adjust original pkt size to remove 4B FCS */
+    if (size < FCS_SZ) {
+        g_genl_stats.pkts_d_invalid_size++;
+        goto GENL_FILTER_CB_PKT_HANDLED;
+    } else {
+       size -= FCS_SZ;
+    }
+
+    GENL_CB_DBG_PRINT("%s: netns 0x%p, src_ifdx 0x%x, dst_ifdx 0x%x, user_data %d\n",
+                      __func__, g_genl_info.netns, meta.src_ifindex, meta.dst_ifindex, meta.user_data);
+
+    if (g_genl_stats.pkts_c_qlen_cur >= genl_qlen) {
+        g_genl_stats.pkts_d_qlen_max++;
+        genl_limited_gprintk(last_drop,
+                             "%s: tail drop due to max qlen %d reached: %lu\n",
+                             __func__, genl_qlen, g_genl_stats.pkts_d_qlen_max);
+        goto GENL_FILTER_CB_PKT_HANDLED;
+    }
+
+    if ((genl_pkt = kmalloc(sizeof(genl_pkt_t), GFP_ATOMIC)) == NULL)
+    {
+        g_genl_stats.pkts_d_no_mem++;
+        genl_limited_gprintk(last_alloc, "%s: failed to alloc generic mem for pkt: %lu\n", __func__, g_genl_stats.pkts_d_no_mem);
+        goto GENL_FILTER_CB_PKT_HANDLED;
+    }
+    memcpy(&genl_pkt->meta, &meta, sizeof(genl_meta_t));
+    genl_pkt->netns = g_genl_info.netns;
+
+    if (size >= 16) {
+        uint16_t vlan_proto = (uint16_t) ((pkt[12] << 8) | pkt[13]);
+        uint16_t vlan = (uint16_t) ((pkt[14] << 8) | pkt[15]);
+        strip_tag =  ((vlan_proto == 0x8100) || (vlan_proto == 0x88a8) || (vlan_proto == 0x9100))
+                     && (vlan == 0xFFF);
+    }
+
+    if (strip_tag) {
+        size -= 4;
+    }
+
+    if ((skb = dev_alloc_skb(size)) == NULL)
+    {
+        g_genl_stats.pkts_d_no_mem++;
+        genl_limited_gprintk(last_skb_fail, "%s: failed to alloc generic mem for pkt skb: %lu\n", __func__, g_genl_stats.pkts_d_no_mem);
+        goto GENL_FILTER_CB_PKT_HANDLED;
+    }
+
+    /* setup skb by copying packet content */
+    /*
+     * Strip reserved vlan tag
+     * FIXME: enhance GENL interface to support FILTER_TAG_STRIP,
+     * FILTER_TAG_KEEP and FILTER_TAG_ORIGINAL
+     */
+    if(strip_tag) {
+        memcpy(skb->data, pkt, 12);
+        memcpy(skb->data + 12, pkt + 16, size - 12);
+        g_genl_stats.pkts_f_tag_stripped++;
+    } else {
+        memcpy(skb->data, pkt, size);
+    }
+
+    skb_put(skb, size);
+    skb->len = size;
+    genl_pkt->skb = skb;
+
+    spin_lock_irqsave(&g_genl_work.lock, flags);
+    list_add_tail(&genl_pkt->list, &g_genl_work.pkt_list);
+
+    g_genl_stats.pkts_c_qlen_cur++;
+    if (g_genl_stats.pkts_c_qlen_cur > g_genl_stats.pkts_c_qlen_hi)
+    {
+        g_genl_stats.pkts_c_qlen_hi = g_genl_stats.pkts_c_qlen_cur;
+    }
+
+    schedule_work(&g_genl_work.wq);
+    spin_unlock_irqrestore(&g_genl_work.lock, flags);
+
+    /* expected rv values:
+     * -ve for error
+     * 0 for passthrough
+     * 1 for packet handled
+     *  */
+
+    /* Set rv to packet handled */
+    rv = 1;
+
+GENL_FILTER_CB_PKT_HANDLED:
+    g_genl_stats.pkts_f_handled++;
+    return rv;
+}
+
+/*
+ * generic debug Proc Read Entry
+ */
+static int
+genl_proc_debug_show(struct seq_file *m, void *v)
+{
+    seq_printf(m, "BCM KNET %s Callback Config\n", GENL_PACKET_NAME);
+    seq_printf(m, "  debug:           0x%x\n", debug);
+    seq_printf(m, "  netif_count:     %d\n",   bcmgenl_netif_num_get());
+    seq_printf(m, "  queue length:    %d\n",   genl_qlen);
+
+    return 0;
+}
+
+static int
+genl_proc_debug_open(struct inode * inode, struct file * file)
+{
+    return single_open(file, genl_proc_debug_show, NULL);
+}
+
+/*
+ * generic debug Proc Write Entry
+ *
+ *   Syntax:
+ *   debug=<mask>
+ *
+ *   Where <mask> corresponds to the debug module parameter.
+ *
+ *   Examples:
+ *   debug=0x1
+ */
+static ssize_t
+genl_proc_debug_write(struct file *file, const char *buf,
+                    size_t count, loff_t *loff)
+{
+    char debug_str[40];
+    char *ptr;
+
+    if (count > sizeof(debug_str)) {
+        count = sizeof(debug_str) - 1;
+        debug_str[count] = '\0';
+    }
+    if (copy_from_user(debug_str, buf, count)) {
+        return -EFAULT;
+    }
+
+    if ((ptr = strstr(debug_str, "debug=")) != NULL) {
+        ptr += 6;
+        debug = simple_strtol(ptr, NULL, 0);
+    } else {
+        gprintk("Warning: unknown configuration setting\n");
+    }
+
+    return count;
+}
+
+struct proc_ops genl_proc_debug_file_ops = {
+    PROC_OWNER(THIS_MODULE)
+    .proc_open =       genl_proc_debug_open,
+    .proc_read =       seq_read,
+    .proc_lseek =      seq_lseek,
+    .proc_write =      genl_proc_debug_write,
+    .proc_release =    single_release,
+};
+
+static int
+genl_proc_stats_show(struct seq_file *m, void *v)
+{
+    seq_printf(m, "BCM KNET %s Callback Stats\n", GENL_PACKET_NAME);
+    seq_printf(m, "  pkts filter generic cb         %10lu\n", g_genl_stats.pkts_f_genl_cb);
+    seq_printf(m, "  pkts sent to generic module    %10lu\n", g_genl_stats.pkts_f_genl_mod);
+    seq_printf(m, "  pkts handled by generic cb     %10lu\n", g_genl_stats.pkts_f_handled);
+    seq_printf(m, "  pkts with vlan tag stripped    %10lu\n", g_genl_stats.pkts_f_tag_stripped);
+    seq_printf(m, "  pkts with mc destination       %10lu\n", g_genl_stats.pkts_f_dst_mc);
+    seq_printf(m, "  pkts with cpu source           %10lu\n", g_genl_stats.pkts_f_src_cpu);
+    seq_printf(m, "  pkts with cpu destination      %10lu\n", g_genl_stats.pkts_f_dst_cpu);
+    seq_printf(m, "  pkts current queue length      %10lu\n", g_genl_stats.pkts_c_qlen_cur);
+    seq_printf(m, "  pkts high queue length         %10lu\n", g_genl_stats.pkts_c_qlen_hi);
+    seq_printf(m, "  pkts drop max queue length     %10lu\n", g_genl_stats.pkts_d_qlen_max);
+    seq_printf(m, "  pkts drop no memory            %10lu\n", g_genl_stats.pkts_d_no_mem);
+    seq_printf(m, "  pkts drop generic not ready    %10lu\n", g_genl_stats.pkts_d_not_ready);
+    seq_printf(m, "  pkts drop metadata parse error %10lu\n", g_genl_stats.pkts_d_metadata);
+    seq_printf(m, "  pkts with invalid src port     %10lu\n", g_genl_stats.pkts_d_meta_srcport);
+    seq_printf(m, "  pkts with invalid dst port     %10lu\n", g_genl_stats.pkts_d_meta_dstport);
+    seq_printf(m, "  pkts with invalid orig pkt sz  %10lu\n", g_genl_stats.pkts_d_invalid_size);
+    return 0;
+}
+
+static int
+genl_proc_stats_open(struct inode * inode, struct file * file)
+{
+    return single_open(file, genl_proc_stats_show, NULL);
+}
+
+/*
+ * generic stats Proc Write Entry
+ *
+ *   Syntax:
+ *   write any value to clear stats
+ */
+static ssize_t
+genl_proc_stats_write(struct file *file, const char *buf,
+                    size_t count, loff_t *loff)
+{
+    int qlen_cur = 0;
+    unsigned long flags;
+
+    spin_lock_irqsave(&g_genl_work.lock, flags);
+    qlen_cur = g_genl_stats.pkts_c_qlen_cur;
+    memset(&g_genl_stats, 0, sizeof(genl_stats_t));
+    g_genl_stats.pkts_c_qlen_cur = qlen_cur;
+    spin_unlock_irqrestore(&g_genl_work.lock, flags);
+
+    return count;
+}
+struct proc_ops genl_proc_stats_file_ops = {
+    PROC_OWNER(THIS_MODULE)
+    .proc_open =       genl_proc_stats_open,
+    .proc_read =       seq_read,
+    .proc_lseek =      seq_lseek,
+    .proc_write =      genl_proc_stats_write,
+    .proc_release =    single_release,
+};
+
+static int
+genl_cb_proc_init(char *procfs_path)
+{
+    struct proc_dir_entry *entry;
+
+    if (procfs_path == NULL || procfs_path[0] == '\0') {
+        return 0;
+    }
+
+    /* create procfs for generic */
+    snprintf(genl_procfs_path, sizeof(genl_procfs_path) - 1,
+             "%s/%s", procfs_path, GENL_PACKET_NAME);
+    genl_proc_root = proc_mkdir(genl_procfs_path, NULL);
+
+    /* create procfs for generic stats */
+    PROC_CREATE(entry, "stats", 0666, genl_proc_root,
+                &genl_proc_stats_file_ops);
+    if (entry == NULL) {
+        return -1;
+    }
+
+    /* create procfs for debug log */
+    PROC_CREATE(entry, "debug", 0666, genl_proc_root, &genl_proc_debug_file_ops);
+    if (entry == NULL) {
+        return -1;
+    }
+
+    return 0;
+}
+
+static int
+genl_cb_proc_cleanup(void)
+{
+    if (genl_proc_root) {
+        remove_proc_entry("stats", genl_proc_root);
+        remove_proc_entry("debug", genl_proc_root);
+        remove_proc_entry(genl_procfs_path, NULL);
+        genl_proc_root = NULL;
+    }
+    return 0;
+}
+
+static int
+genl_cb_cleanup(void)
+{
+    genl_pkt_t *pkt;
+
+    cancel_work_sync(&g_genl_work.wq);
+
+    while (!list_empty(&g_genl_work.pkt_list)) {
+        pkt = list_entry(g_genl_work.pkt_list.next, genl_pkt_t, list);
+        list_del(&pkt->list);
+        dev_kfree_skb_any(pkt->skb);
+        kfree(pkt);
+    }
+
+    return 0;
+}
+
+static int
+genl_cb_init(void)
+{
+    /* clear data structs */
+    memset(&g_genl_stats, 0, sizeof(genl_stats_t));
+    memset(&g_genl_work, 0, sizeof(genl_work_t));
+
+    /* setup generic work queue */
+    spin_lock_init(&g_genl_work.lock);
+    INIT_LIST_HEAD(&g_genl_work.pkt_list);
+    INIT_WORK(&g_genl_work.wq, genl_task);
+
+    /* get net namespace */
+    g_genl_info.netns = get_net_ns_by_pid(current->pid);
+    if (!g_genl_info.netns) {
+        gprintk("%s: Could not get network namespace for pid %d\n",
+                __func__, current->pid);
+        return -1;
+    }
+    GENL_CB_DBG_PRINT("%s: current->pid %d, netns 0x%p\n", __func__,
+                         current->pid, g_genl_info.netns);
+
+    return 0;
+}
+
+int bcmgenl_packet_cleanup(void)
+{
+    genl_cb_cleanup();
+    genl_cb_proc_cleanup();
+    bkn_filter_cb_unregister(genl_filter_cb);
+    return 0;
+}
+
+int
+bcmgenl_packet_init(char *procfs_path)
+{
+    bkn_filter_cb_register_by_name(genl_filter_cb, GENL_PACKET_NAME);
+    genl_cb_proc_init(procfs_path);
+    return genl_cb_init();
+}
+#endif
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-packet.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-packet.h
new file mode 100644
index 000000000..aa3945489
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-packet.h
@@ -0,0 +1,38 @@
+/*
+ * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * 
+ * Permission is granted to use, copy, modify and/or distribute this
+ * software under either one of the licenses below.
+ * 
+ * License Option 1: GPL
+ * 
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License, version 2, as
+ * published by the Free Software Foundation (the "GPL").
+ * 
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License version 2 (GPLv2) for more details.
+ * 
+ * You should have received a copy of the GNU General Public License
+ * version 2 (GPLv2) along with this source code.
+ * 
+ * 
+ * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
+ * 
+ * This software is governed by the Broadcom Open Network Switch APIs license:
+ * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+ * 
+ */
+
+#ifndef __BCM_GENL_PACKET_H__
+#define __BCM_GENL_PACKET_H__
+
+extern int
+bcmgenl_packet_init(char *procfs_path);
+
+extern int
+bcmgenl_packet_cleanup(void);
+
+#endif /* __BCM_GENL_PACKET_H__ */
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/knet-cb/psample-cb.c b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-psample.c
similarity index 52%
rename from platform/broadcom/saibcm-modules/systems/linux/kernel/modules/knet-cb/psample-cb.c
rename to platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-psample.c
index 38c5bee6f..1ea33c7fc 100644
--- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/knet-cb/psample-cb.c
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-psample.c
@@ -1,41 +1,50 @@
 /*
- * Copyright 2017-2019 Broadcom
- *
+ * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * 
+ * Permission is granted to use, copy, modify and/or distribute this
+ * software under either one of the licenses below.
+ * 
+ * License Option 1: GPL
+ * 
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License, version 2, as
  * published by the Free Software Foundation (the "GPL").
- *
+ * 
  * This program is distributed in the hope that it will be useful, but
  * WITHOUT ANY WARRANTY; without even the implied warranty of
  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  * General Public License version 2 (GPLv2) for more details.
- *
+ * 
  * You should have received a copy of the GNU General Public License
  * version 2 (GPLv2) along with this source code.
- */
-/*
- * $Id: psample_cb.c $
- * $Copyright: (c) 2019 Broadcom Corp.
- * All Rights Reserved.$
+ * 
+ * 
+ * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
+ * 
+ * This software is governed by the Broadcom Open Network Switch APIs license:
+ * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+ * 
  */
 
 /*
- * Driver for call-back functions for Linux KNET driver.
- *
- * This code is used to integrate packet sampling KNET callback to 
- * the psample infra for sending sampled pkts to userspace sflow 
- * applications such as Host Sflow (https://github.com/sflow/host-sflow) 
- * using genetlink interfaces.  
- *
- * The module can be built from the standard Linux user mode target
- * directories using the following command (assuming bash), e.g.
+ * Middle-driver for communication between Linux KNET driver and
+ * drivers support Generic Netlink channel.
  *
- *   cd $SDK/systems/linux/user/<target>
- *   make BUILD_KNET_CB=1
+ * This code is used to integrate packet sampling from KNET Rx filter
+ * call-back function to the psample infra (kernel/linux/net/psample)
+ * for sending sampled packets to userspace sflow applications such as
+ * Host Sflow (https://github.com/sflow/host-sflow) using Generic Netlink
+ * interfaces.
  *
+ * This driver is also built with the DCB library as the helper for parsing
+ * the RX packet meta data from the Linux KNET driver filter call-back function.
+ * The environment DCBDIR must be set to indicate the directroy of the DCB
+ * library.
  */
 
+
 #include <gmodule.h> /* Must be included first */
+#include <linux-bde.h>
 #include <kcom.h>
 #include <bcm-knet.h>
 #include <linux/if_vlan.h>
@@ -43,12 +52,16 @@
 #include <linux/sched.h>
 #include <linux/netdevice.h>
 #include <net/net_namespace.h>
+#include "bcm-genl-psample.h"
+#include "bcm-genl-dev.h"
+#include "bcm-genl-netif.h"
+#if BCMGENL_PSAMPLE_SUPPORT
 #include <net/psample.h>
-#include "psample-cb.h"
+#include <uapi/linux/psample.h>
 
 #define PSAMPLE_CB_DBG
-#ifdef PSAMPLE_CB_DBG 
-extern int debug;
+#ifdef PSAMPLE_CB_DBG
+static int debug;
 #define PSAMPLE_CB_DBG_PRINT(...) \
     if (debug & 0x1) {         \
         gprintk(__VA_ARGS__);  \
@@ -57,31 +70,6 @@ extern int debug;
 #define PSAMPLE_CB_DBG_PRINT(...)
 #endif
 
-/* HIGIG2 header fields */
-#define SOC_HIGIG_SOP         (0xfb)
-#define SOC_HIGIG_START(x)    ((x[0] >> 24) & 0xff)
-#define SOC_HIGIG_DSTPORT(x)  ((x[1] >> 11) & 0x1f)
-#define SOC_HIGIG_SRCPORT(x)  ((x[1] >> 16) & 0x1f)
-#define SOC_HIGIG2_SOP        (0xfb) //0xfc - TODO: how can we differentiate between Higig and higig2?
-#define SOC_HIGIG2_START(x)   ((x[0] >> 24) & 0xff)
-#define SOC_HIGIG2_IS_MC(x)   ((x[0] >> 20) &  0x1)
-#define SOC_HIGIG2_DSTPORT(x) ((x[0] >>  0) & 0xff)
-#define SOC_HIGIG2_SRCPORT(x) ((x[1] >> 16) & 0xff)
-#define SOC_DCB32_HG_OFFSET   (6)
-
-/* sFlow v5 datagram dst ifindex field type
- * dst ifindex encoding bits [31:30]
- */
-#define DSTPORT_TYPE_DISCARD 1
-#define DSTPORT_TYPE_MC      2
-
-#define DSTPORT_TYPE_OFFSET  30
-#define DSTPORT_TYPE_MASK    0x3
-#define DSTPORT_TYPE_CLR(_dst) (_dst &= ~(DSTPORT_TYPE_MASK << DSTPORT_TYPE_OFFSET))
-#define DSTPORT_TYPE_SET(_dst,_type) (_dst |= ((_type & DSTPORT_TYPE_MASK) << DSTPORT_TYPE_OFFSET))
-#define DSTPORT_TYPE_GET(_dst) ((_dst >> DSTPORT_TYPE_OFFSET) & DSTPORT_TYPE_MASK)
-#define DSTPORT_GET(_dst)      (_dst & ~(DSTPORT_TYPE_MASK << DSTPORT_TYPE_OFFSET))
-
 #define FCS_SZ 4
 #define PSAMPLE_NLA_PADDING 4
 
@@ -98,27 +86,23 @@ LKM_MOD_PARAM(psample_qlen, "i", int, 0);
 MODULE_PARM_DESC(psample_qlen,
 "psample queue length (default 1024 buffers)");
 
-#if !IS_ENABLED(CONFIG_PSAMPLE)
-inline struct 
-psample_group *psample_group_get(struct net *net, u32 group_num)
-{
-    return NULL;
-}
-#endif
-
 /* driver proc entry root */
 static struct proc_dir_entry *psample_proc_root = NULL;
-static struct proc_dir_entry *knet_cb_proc_root = NULL;
+static char psample_procfs_path[80];
 
 /* psample general info */
-typedef struct {
-    struct list_head netif_list;
-    int netif_count;
-    knet_hw_info_t hw;
+typedef struct psample_info_s {
     struct net *netns;
-    spinlock_t lock;
+    struct list_head group_list;
+    uint64_t rx_reason_sample_source[LINUX_BDE_MAX_DEVICES];
 } psample_info_t;
-static psample_info_t g_psample_info = {0};
+static psample_info_t g_psample_info;
+
+typedef struct psample_group_data_s {
+    struct list_head list;
+    struct psample_group *group;
+    uint32_t group_num;
+} psample_group_data_t;
 
 /* Maintain sampled pkt statistics */
 typedef struct psample_stats_s {
@@ -139,7 +123,7 @@ typedef struct psample_stats_s {
     unsigned long pkts_d_meta_dstport;
     unsigned long pkts_d_invalid_size;
 } psample_stats_t;
-static psample_stats_t g_psample_stats = {0};
+static psample_stats_t g_psample_stats;
 
 typedef struct psample_meta_s {
     int trunc_size;
@@ -160,186 +144,108 @@ typedef struct psample_work_s {
     struct work_struct wq;
     spinlock_t lock;
 } psample_work_t;
-static psample_work_t g_psample_work = {0};
+static psample_work_t g_psample_work;
 
-static psample_netif_t*
-psample_netif_lookup_by_port(int unit, int port)
+static struct psample_group *
+psample_group_get_from_list(uint32_t grp_num)
 {
-    struct list_head *list;
-    psample_netif_t *psample_netif = NULL;
-    unsigned long flags;
+    struct list_head *list_ptr;
+    psample_group_data_t *grp;
 
-    /* look for port from list of available net_devices */
-    spin_lock_irqsave(&g_psample_info.lock, flags);
-    list_for_each(list, &g_psample_info.netif_list) {
-        psample_netif = (psample_netif_t*)list;
-        if (psample_netif->port == port) {
-            spin_unlock_irqrestore(&g_psample_info.lock, flags);
-            return psample_netif;
+    list_for_each(list_ptr, &g_psample_info.group_list) {
+        grp = list_entry(list_ptr, psample_group_data_t, list);
+        if (grp->group_num == grp_num) {
+            return grp->group;
         }
     }
-    spin_unlock_irqrestore(&g_psample_info.lock, flags);
-    return (NULL);
-}
-        
-static int
-psample_info_get (int unit, psample_info_t *psample_info)
-{
-    int rv = 0;
-    if (!psample_info) {
-        gprintk("%s: psample_info is NULL\n", __func__);
-        return (-1);
-    }
 
-    /* get hw info */
-    rv = bkn_hw_info_get(unit, &psample_info->hw);
-    if (rv < 0) {
-        gprintk("%s: failed to get hw info\n", __func__);
-        return (-1);
+    if ((grp = kmalloc(sizeof(psample_group_data_t), GFP_ATOMIC)) == NULL) {
+        return NULL;
+    }
+    grp->group = psample_group_get(g_psample_info.netns, grp_num);
+    if (grp->group == NULL) {
+        kfree(grp);
+        return NULL;
     }
+    grp->group_num = grp_num;
+    list_add_tail(&grp->list, &g_psample_info.group_list);
 
-    PSAMPLE_CB_DBG_PRINT("%s: DCB type %d\n",
-            __func__, psample_info->hw.dcb_type);
-    return (0);
+    return grp->group;
 }
 
 static int
-psample_meta_srcport_get(uint8_t *pkt, void *pkt_meta)
+psample_meta_srcport_get(int dev_no, void *pkt_meta)
 {
-    int srcport = 0;
-    uint32_t *metadata = (uint32_t*)pkt_meta;
-
-    switch(g_psample_info.hw.dcb_type) {
-        case 36: /* TD3 */
-        case 38: /* TH3 */
-            break;
-        case 32: /* TH1/TH2 */
-        case 26: /* TD2 */
-        case 23: /* HX4 */
-            metadata += SOC_DCB32_HG_OFFSET;
-        default:
-            break;
-    }
+    uint32_t p;
 
-    if (SOC_HIGIG2_START(metadata) == SOC_HIGIG2_SOP) 
-    {
-        srcport = SOC_HIGIG2_SRCPORT(metadata);
-    } 
-    else if (SOC_HIGIG_START(metadata) == SOC_HIGIG_SOP) 
-    {
-        srcport = SOC_HIGIG_SRCPORT(metadata);
-    } 
-    else 
-    {
-        PSAMPLE_CB_DBG_PRINT("%s: Could not detect metadata sop type: 0x%02x (w[0]: 0x%04x)\n", __func__, 
-                SOC_HIGIG_START(metadata), metadata[0]);
+    if (bcmgenl_dev_pktmeta_rx_srcport_get(dev_no, pkt_meta, &p) < 0) {
         return -1;
     }
-    return srcport;
+
+    return p;
 }
 
 static int
-psample_meta_dstport_get(uint8_t *pkt, void *pkt_meta)
+psample_meta_dstport_get(int dev_no, void *pkt_meta, bool *is_mcast)
 {
-    int dstport = 0;
-    uint32_t *metadata = (uint32_t*)pkt_meta;
-
-    switch(g_psample_info.hw.dcb_type) {
-        case 36: /* TD3 */
-        case 38: /* TH3 */
-            break;
-        case 32: /* TH1/TH2 */
-        case 26: /* TD2 */
-        case 23: /* HX4 */
-        default:
-            metadata += SOC_DCB32_HG_OFFSET;
-            break;
+    bool mcast;
+    uint32_t p;
+
+    if (bcmgenl_dev_pktmeta_rx_dstport_get(dev_no, pkt_meta, &mcast, &p) < 0) {
+        return -1;
     }
-    
-    if (SOC_HIGIG2_START(metadata) == SOC_HIGIG2_SOP) 
-    {
-        if (SOC_HIGIG2_IS_MC(metadata))
-        {
-            DSTPORT_TYPE_CLR(dstport);
-            DSTPORT_TYPE_SET(dstport, DSTPORT_TYPE_MC);
-        }
-        else
-        {
-        dstport = SOC_HIGIG2_DSTPORT(metadata);
-    } 
-    } 
-    else if (SOC_HIGIG_START(metadata) == SOC_HIGIG_SOP) 
-    {
-        dstport = SOC_HIGIG_DSTPORT(metadata);
-    } 
-    else 
-    {
-        PSAMPLE_CB_DBG_PRINT("%s: Could not detect metadata sop type: 0x%02x (w[0]: 0x%04x)\n", __func__, 
-                SOC_HIGIG_START(metadata), metadata[0]);
-        return (-1);
+    if (is_mcast) {
+        *is_mcast = mcast;
     }
-    return dstport;
+
+    return p;
 }
 
 static int
-psample_meta_sample_reason(uint8_t *pkt, void *pkt_meta)
+psample_meta_sample_reason(int dev_no, void *pkt_meta)
 {
-    uint32_t *metadata = (uint32_t*)pkt_meta;
-    uint32_t reason = 0;
-    uint32_t reason_hi = 0;
-    uint32_t sample_rx_reason_mask = 0;
-
-    /* Sample Pkt reason code (bcmRxReasonSampleSource) */
-    switch(g_psample_info.hw.dcb_type) {
-        case 36: /* TD3 */
-        case 38: /* TH3 */
-            reason_hi = *(metadata + 4);
-            reason    = *(metadata + 5);
-            sample_rx_reason_mask = (1 << 3);
-            break;
-        case 32: /* TH1/TH2 */
-        case 26: /* TD2 */
-        case 23: /* HX4 */
-        default:
-            reason_hi = *(metadata + 2);
-            reason    = *(metadata + 3);
-            sample_rx_reason_mask = (1 << 5);
-            break;
+    uint64_t rx_reason;
+    uint64_t *exp_reason = &g_psample_info.rx_reason_sample_source[dev_no];
+
+    if (bcmgenl_dev_pktmeta_rx_reason_get(dev_no, pkt_meta, &rx_reason) < 0) {
+        return 0;
+    }
+    if (*exp_reason == 0) {
+        if (bcmgenl_dev_rx_reason_sample_source_get(dev_no, exp_reason) < 0) {
+            return 0;
+        }
     }
-        
-    PSAMPLE_CB_DBG_PRINT("%s: DCB%d sample_rx_reason_mask: 0x%08x, reason: 0x%08x, reason_hi: 0x%08x\n", 
-            __func__, g_psample_info.hw.dcb_type, sample_rx_reason_mask, reason, reason_hi);
 
     /* Check if only sample reason code is set.
      * If only sample reason code, then consume pkt.
-     * If other reason codes exist, then pkt should be 
+     * If other reason codes exist, then pkt should be
      * passed through to Linux network stack.
      */
-    if ((reason & ~sample_rx_reason_mask) || reason_hi) {
-        return 0; /* multiple reasons set, pass through */
+    if ((rx_reason & *exp_reason) == *exp_reason) {
+        return 1;
     }
-
-    /* only sample rx reason set, consume pkt */
-    return (1);
+    return 0;
 }
 
 static int
-psample_meta_get(int unit, uint8_t *pkt, void *pkt_meta, psample_meta_t *sflow_meta)
+psample_meta_get(int dev_no, kcom_filter_t *kf, void *pkt_meta,
+                 psample_meta_t *sflow_meta)
 {
-    int srcport, dstport, dstport_type;
+    bool mcast = false;
+    int srcport, dstport;
     int src_ifindex = 0;
     int dst_ifindex = 0;
     int sample_rate = 1;
     int sample_size = PSAMPLE_SIZE_DFLT;
-    psample_netif_t *psample_netif = NULL;
+    bcmgenl_netif_t bcmgenl_netif;
 
 #ifdef PSAMPLE_CB_DBG
     if (debug & 0x1) {
         int i=0;
-        uint8_t *meta = (uint8_t*)pkt_meta;
+        uint8_t *meta = (uint8_t *)pkt_meta;
         PSAMPLE_CB_DBG_PRINT("%s: psample pkt metadata\n", __func__);
         for (i=0; i<64; i+=16) {
-            PSAMPLE_CB_DBG_PRINT("%02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n", 
+            PSAMPLE_CB_DBG_PRINT("%02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n",
                     meta[i+0], meta[i+1], meta[i+2], meta[i+3], meta[i+4], meta[i+5], meta[i+6], meta[i+7],
                     meta[i+8], meta[i+9], meta[i+10], meta[i+11], meta[i+12], meta[i+13], meta[i+14], meta[i+15]);
         }
@@ -347,52 +253,46 @@ psample_meta_get(int unit, uint8_t *pkt, void *pkt_meta, psample_meta_t *sflow_m
 #endif
 
     /* parse pkt metadata for src and dst ports */
-    srcport = psample_meta_srcport_get(pkt, pkt_meta);
-    dstport = psample_meta_dstport_get(pkt, pkt_meta);
+    srcport = psample_meta_srcport_get(dev_no, pkt_meta);
+    dstport = psample_meta_dstport_get(dev_no, pkt_meta, &mcast);
     if ((srcport == -1) || (dstport == -1)) {
         gprintk("%s: invalid srcport %d or dstport %d\n", __func__, srcport, dstport);
-        return (-1);
+        return -1;
     }
 
     /* find src port netif (no need to lookup CPU port) */
     if (srcport != 0) {
-        if ((psample_netif = psample_netif_lookup_by_port(unit, srcport))) {
-            src_ifindex = psample_netif->dev->ifindex;
-            sample_rate = psample_netif->sample_rate;
-            sample_size = psample_netif->sample_size;
+        if (bcmgenl_netif_get_by_port(srcport, &bcmgenl_netif) == 0) {
+            src_ifindex = bcmgenl_netif.dev->ifindex;
+            sample_rate = bcmgenl_netif.sample_rate;
+            sample_size = bcmgenl_netif.sample_size;
         } else {
             g_psample_stats.pkts_d_meta_srcport++;
             PSAMPLE_CB_DBG_PRINT("%s: could not find srcport(%d)\n", __func__, srcport);
         }
     }
 
-    dstport_type = DSTPORT_TYPE_GET(dstport);
-    dstport = DSTPORT_GET(dstport);
-
     /* set sFlow dst type for MC pkts */
-    if (dstport_type == DSTPORT_TYPE_MC) {
-        DSTPORT_TYPE_SET(dst_ifindex, DSTPORT_TYPE_MC);
+    if (mcast) {
         g_psample_stats.pkts_f_dst_mc++;
-
     /* find dst port netif for UC pkts (no need to lookup CPU port) */
     } else if (dstport != 0) {
-        if ((psample_netif = psample_netif_lookup_by_port(unit, dstport))) {
-            dst_ifindex = psample_netif->dev->ifindex;
+        if (bcmgenl_netif_get_by_port(dstport, &bcmgenl_netif) == 0) {
+            dst_ifindex = bcmgenl_netif.dev->ifindex;
         } else {
             g_psample_stats.pkts_d_meta_dstport++;
             PSAMPLE_CB_DBG_PRINT("%s: could not find dstport(%d)\n", __func__, dstport);
         }
     }
 
-    PSAMPLE_CB_DBG_PRINT("%s: srcport %d, dstport %d, src_ifindex 0x%x, dst_ifindex 0x%x, trunc_size %d, sample_rate %d\n", 
-            __func__, srcport, dstport, src_ifindex, dst_ifindex, sample_size, sample_rate);
+    PSAMPLE_CB_DBG_PRINT("%s: dstport %d, src_ifindex 0x%x, dst_ifindex 0x%x\n",
+                         __func__, dstport, src_ifindex, dst_ifindex);
 
     sflow_meta->src_ifindex = src_ifindex;
     sflow_meta->dst_ifindex = dst_ifindex;
     sflow_meta->trunc_size  = sample_size;
     sflow_meta->sample_rate = sample_rate;
-
-    return (0);
+    return 0;
 }
 
 static void
@@ -424,7 +324,6 @@ psample_task(struct work_struct *work)
                     __func__, pkt->group->group_num, 
                     pkt->meta.trunc_size, pkt->meta.src_ifindex, 
                     pkt->meta.dst_ifindex, pkt->meta.sample_rate);
-
 #if ((IS_ENABLED(CONFIG_PSAMPLE) && LINUX_VERSION_CODE >= KERNEL_VERSION(5,13,0)) || \
      (defined PSAMPLE_MD_EXTENDED_ATTR && PSAMPLE_MD_EXTENDED_ATTR))
             psample_sample_packet(pkt->group, 
@@ -449,30 +348,20 @@ psample_task(struct work_struct *work)
     spin_unlock_irqrestore(&psample_work->lock, flags);
 }
 
-int 
-psample_filter_cb(uint8_t * pkt, int size, int dev_no, void *pkt_meta,
+static int
+psample_filter_cb(uint8_t *pkt, int size, int dev_no, void *pkt_meta,
                   int chan, kcom_filter_t *kf)
 {
-    struct psample_group *group;
+    struct psample_group *group = NULL;
     psample_meta_t meta;   
     int rv = 0;
-    static int info_get = 0;
-
-    if (!info_get) {
-        rv = psample_info_get (dev_no, &g_psample_info);
-        if (rv < 0) {
-            gprintk("%s: failed to get psample info\n", __func__);
-            goto PSAMPLE_FILTER_CB_PKT_HANDLED;
-        }
-        info_get = 1;
-    }
 
     PSAMPLE_CB_DBG_PRINT("%s: pkt size %d, kf->dest_id %d, kf->cb_user_data %d\n",
             __func__, size, kf->dest_id, kf->cb_user_data);
     g_psample_stats.pkts_f_psample_cb++;
 
     /* get psample group info. psample genetlink group ID passed in kf->dest_id */
-    group = psample_group_get(g_psample_info.netns, kf->dest_id);
+    group = psample_group_get_from_list(kf->dest_id);
     if (!group) {
         gprintk("%s: Could not find psample genetlink group %d\n", __func__, kf->cb_user_data);
         g_psample_stats.pkts_d_no_group++;
@@ -480,7 +369,7 @@ psample_filter_cb(uint8_t * pkt, int size, int dev_no, void *pkt_meta,
     }
 
     /* get psample metadata */
-    rv = psample_meta_get(dev_no, pkt, pkt_meta, &meta);
+    rv = psample_meta_get(dev_no, kf, pkt_meta, &meta);
     if (rv < 0) {
         gprintk("%s: Could not parse pkt metadata\n", __func__);
         g_psample_stats.pkts_d_metadata++;
@@ -532,7 +421,7 @@ psample_filter_cb(uint8_t * pkt, int size, int dev_no, void *pkt_meta,
         /* setup skb to point to pkt */
         memcpy(skb->data, pkt, meta.trunc_size);
         skb_put(skb, meta.trunc_size);
-        skb->len = meta.trunc_size;
+        skb->len = size;
         psample_pkt->skb = skb;
 
         spin_lock_irqsave(&g_psample_work.lock, flags);
@@ -551,7 +440,7 @@ psample_filter_cb(uint8_t * pkt, int size, int dev_no, void *pkt_meta,
 
 PSAMPLE_FILTER_CB_PKT_HANDLED:
     /* if sample reason only, consume pkt. else pass through */
-    rv = psample_meta_sample_reason(pkt, pkt_meta);
+    rv = psample_meta_sample_reason(dev_no, pkt_meta);
     if (rv) {
         g_psample_stats.pkts_f_handled++;
     } else {
@@ -560,110 +449,23 @@ psample_filter_cb(uint8_t * pkt, int size, int dev_no, void *pkt_meta,
     return rv;
 }
 
-int 
-psample_netif_create_cb(int unit, kcom_netif_t *netif, struct net_device *dev)
-{
-    int found;
-    struct list_head *list;
-    psample_netif_t *psample_netif, *lpsample_netif;
-    unsigned long flags;
-
-    if ((psample_netif = kmalloc(sizeof(psample_netif_t), GFP_ATOMIC)) == NULL) {
-        gprintk("%s: failed to alloc psample mem for netif '%s'\n", 
-                __func__, dev->name);
-        return (-1);
-    }
-
-    spin_lock_irqsave(&g_psample_info.lock, flags);
-
-    psample_netif->dev = dev;
-    psample_netif->id = netif->id;
-    psample_netif->port = netif->port;
-    psample_netif->vlan = netif->vlan;
-    psample_netif->qnum = netif->qnum;
-    psample_netif->sample_rate = PSAMPLE_RATE_DFLT;
-    psample_netif->sample_size = PSAMPLE_SIZE_DFLT;
-
-    /* insert netif sorted by ID similar to bkn_knet_netif_create() */
-    found = 0;
-    list_for_each(list, &g_psample_info.netif_list) {
-        lpsample_netif = (psample_netif_t*)list;
-        if (netif->id < lpsample_netif->id) {
-            found = 1;
-            g_psample_info.netif_count++; 
-            break;
-        }
-    }
-
-    if (found) {
-        /* Replace previously removed interface */
-        list_add_tail(&psample_netif->list, &lpsample_netif->list);
-    } else {
-        /* No holes - add to end of list */
-        list_add_tail(&psample_netif->list, &g_psample_info.netif_list);
-    }
-    
-    spin_unlock_irqrestore(&g_psample_info.lock, flags);
-
-    PSAMPLE_CB_DBG_PRINT("%s: added psample netif '%s'\n", __func__, dev->name);
-    return (0);
-}
-
-int
-psample_netif_destroy_cb(int unit, kcom_netif_t *netif, struct net_device *dev)
-{
-    int found;
-    struct list_head *list;
-    psample_netif_t *psample_netif;
-    unsigned long flags; 
-
-    if (!netif || !dev) {
-        gprintk("%s: netif or net_device is NULL\n", __func__);
-        return (-1);
-    }
-
-    spin_lock_irqsave(&g_psample_info.lock, flags);
-    
-    list_for_each(list, &g_psample_info.netif_list) {
-        psample_netif = (psample_netif_t*)list;
-        if (netif->id == psample_netif->id) {
-            found = 1; 
-            list_del(&psample_netif->list);
-            PSAMPLE_CB_DBG_PRINT("%s: removing psample netif '%s'\n", __func__, dev->name);
-            kfree(psample_netif);
-            g_psample_info.netif_count--; 
-            break;
-        }
-    }
-
-    spin_unlock_irqrestore(&g_psample_info.lock, flags);
-    
-    if (!found) {    
-        gprintk("%s: netif ID %d not found!\n", __func__, netif->id);
-        return (-1);
-    }
-    return (0);
-}
-
 /*
  * psample rate Proc Read Entry
  */
 static int
-psample_proc_rate_show(struct seq_file *m, void *v)
+proc_rate_show(void *cb_data, bcmgenl_netif_t *netif)
 {
-    struct list_head *list;
-    psample_netif_t *psample_netif;
-    unsigned long flags; 
-
-    spin_lock_irqsave(&g_psample_info.lock, flags);
+    struct seq_file *m = (struct seq_file *)cb_data;
     
-    list_for_each(list, &g_psample_info.netif_list) {
-        psample_netif = (psample_netif_t*)list;
-        seq_printf(m, "  %-14s %d\n", psample_netif->dev->name, psample_netif->sample_rate);
-    }
+    seq_printf(m, "  %-14s %d\n",
+               netif->dev->name, netif->sample_rate);
+    return 0;
+}
 
-    spin_unlock_irqrestore(&g_psample_info.lock, flags);
- 
+static int
+psample_proc_rate_show(struct seq_file *m, void *v)
+{
+    bcmgenl_netif_search(NULL, proc_rate_show, (void *)m);
     return 0;
 }
 
@@ -684,16 +486,21 @@ psample_proc_rate_open(struct inode * inode, struct file * file)
  *   Examples:
  *   eth4=1000
  */
+static int
+proc_rate_write(void *cb_data, bcmgenl_netif_t *netif)
+{
+    uint32 sample_rate = (uint32)(uintptr_t)cb_data;
+
+    netif->sample_rate = sample_rate;
+    return 0;
+}
+
 static ssize_t
 psample_proc_rate_write(struct file *file, const char *buf,
-                    size_t count, loff_t *loff)
+                        size_t count, loff_t *loff)
 {
-    int found;
-    struct list_head *list;
-    psample_netif_t *psample_netif;
+    int netif_cnt;
     char sample_str[40], *ptr, *newline;
-    unsigned long flags;
-
 
     if (count > sizeof(sample_str)) {
         count = sizeof(sample_str) - 1;
@@ -716,24 +523,13 @@ psample_proc_rate_write(struct file *file, const char *buf,
     }
     *ptr++ = 0;
 
-    spin_lock_irqsave(&g_psample_info.lock, flags);
-   
-    found = 0; 
-    list_for_each(list, &g_psample_info.netif_list) {
-        psample_netif = (psample_netif_t*)list;
-        if (strcmp(psample_netif->dev->name, sample_str) == 0) {
-            psample_netif->sample_rate = simple_strtol(ptr, NULL, 10);
-            // TODO MLI@BRCM - check valid sample rate
-            found = 1; 
-            break;
-        }
+    netif_cnt = bcmgenl_netif_search(sample_str, proc_rate_write,
+                                     (void *)(uintptr_t)simple_strtol(ptr, NULL, 10));
+    if (netif_cnt <= 0) {
+        gprintk("Warning: Failed setting psample rate on "
+                "unknown network interface: '%s'\n", sample_str);
     }
-    
-    spin_unlock_irqrestore(&g_psample_info.lock, flags);
 
-    if (!found) {
-        gprintk("Warning: Failed setting psample rate on unknown network interface: '%s'\n", sample_str);
-    }
     return count;
 }
 
@@ -750,20 +546,18 @@ struct proc_ops psample_proc_rate_file_ops = {
  * psample size Proc Read Entry
  */
 static int
-psample_proc_size_show(struct seq_file *m, void *v)
+proc_size_show(void *cb_data, bcmgenl_netif_t *netif)
 {
-    struct list_head *list;
-    psample_netif_t *psample_netif;
-    unsigned long flags;
-
-    spin_lock_irqsave(&g_psample_info.lock, flags);
+    struct seq_file *m = (struct seq_file *)cb_data;
     
-    list_for_each(list, &g_psample_info.netif_list) {
-        psample_netif = (psample_netif_t*)list;
-        seq_printf(m, "  %-14s %d\n", psample_netif->dev->name, psample_netif->sample_size);
-    }
+    seq_printf(m, "  %-14s %d\n", netif->dev->name, netif->sample_size);
+    return 0;
+}
 
-    spin_unlock_irqrestore(&g_psample_info.lock, flags);
+static int
+psample_proc_size_show(struct seq_file *m, void *v)
+{
+    bcmgenl_netif_search(NULL, proc_size_show, (void *)m);
     return 0;
 }
 
@@ -784,15 +578,21 @@ psample_proc_size_open(struct inode * inode, struct file * file)
  *   Examples:
  *   eth4=128
  */
+static int
+proc_size_write(void *cb_data, bcmgenl_netif_t *netif)
+{
+    uint32 sample_size = (uint32)(uintptr_t)cb_data;
+
+    netif->sample_size = sample_size;
+    return 0;
+}
+
 static ssize_t
 psample_proc_size_write(struct file *file, const char *buf,
                     size_t count, loff_t *loff)
 {
-    int found;
-    struct list_head *list;
-    psample_netif_t *psample_netif;
+    int netif_cnt;
     char sample_str[40], *ptr, *newline;
-    unsigned long flags;
 
     if (count > sizeof(sample_str)) {
         count = sizeof(sample_str) - 1;
@@ -815,24 +615,13 @@ psample_proc_size_write(struct file *file, const char *buf,
     }
     *ptr++ = 0;
 
-    spin_lock_irqsave(&g_psample_info.lock, flags);
-   
-    found = 0; 
-    list_for_each(list, &g_psample_info.netif_list) {
-        psample_netif = (psample_netif_t*)list;
-        if (strcmp(psample_netif->dev->name, sample_str) == 0) {
-            psample_netif->sample_size = simple_strtol(ptr, NULL, 10);
-            // TODO MLI@BRCM - check valid sample size
-            found = 1;
-            break; 
-        }
+    netif_cnt = bcmgenl_netif_search(sample_str, proc_size_write,
+                                     (void *)(uintptr_t)simple_strtol(ptr, NULL, 10));
+    if (netif_cnt <= 0) {
+        gprintk("Warning: Failed setting psample size on "
+                "unknown network interface: '%s'\n", sample_str);
     }
     
-    spin_unlock_irqrestore(&g_psample_info.lock, flags);
-
-    if (!found) {
-        gprintk("Warning: Failed setting psample size on unknown network interface: '%s'\n", sample_str);
-    }
     return count;
 }
 
@@ -845,61 +634,15 @@ struct proc_ops psample_proc_size_file_ops = {
     .proc_release =   single_release,
 };
 
-/*
- * psample map Proc Read Entry
- */
-static int
-psample_proc_map_show(struct seq_file *m, void *v)
-{
-    struct list_head *list;
-    psample_netif_t *psample_netif;
-    unsigned long flags;
-
-    seq_printf(m, "  Interface      logical port   ifindex\n");
-    seq_printf(m, "-------------    ------------   -------\n");
-    spin_lock_irqsave(&g_psample_info.lock, flags);
-    
-    list_for_each(list, &g_psample_info.netif_list) {
-        psample_netif = (psample_netif_t*)list;
-        seq_printf(m, "  %-14s %-14d %d\n",
-                psample_netif->dev->name,
-                psample_netif->port,
-                psample_netif->dev->ifindex);
-    }
-
-    spin_unlock_irqrestore(&g_psample_info.lock, flags);
-    return 0;
-}
-
-static int
-psample_proc_map_open(struct inode * inode, struct file * file)
-{
-    return single_open(file, psample_proc_map_show, NULL);
-}
-
-struct proc_ops psample_proc_map_file_ops = {
-    PROC_OWNER(THIS_MODULE)
-    .proc_open =       psample_proc_map_open,
-    .proc_read =       seq_read,
-    .proc_lseek =      seq_lseek,
-    .proc_write =      NULL,
-    .proc_release =    single_release,
-};
-
 /*
  * psample debug Proc Read Entry
  */
 static int
 psample_proc_debug_show(struct seq_file *m, void *v)
 {
-    seq_printf(m, "BCM KNET %s Callback Config\n", PSAMPLE_CB_NAME);
+    seq_printf(m, "BCM KNET %s Callback Config\n", PSAMPLE_GENL_NAME);
     seq_printf(m, "  debug:           0x%x\n", debug);
-    seq_printf(m, "  cmic_type:       %d\n",   g_psample_info.hw.cmic_type);
-    seq_printf(m, "  dcb_type:        %d\n",   g_psample_info.hw.dcb_type);
-    seq_printf(m, "  dcb_size:        %d\n",   g_psample_info.hw.dcb_size);
-    seq_printf(m, "  pkt_hdr_size:    %d\n",   g_psample_info.hw.pkt_hdr_size);
-    seq_printf(m, "  cdma_channels:   %d\n",   g_psample_info.hw.cdma_channels);
-    seq_printf(m, "  netif_count:     %d\n",   g_psample_info.netif_count);
+    seq_printf(m, "  netif_count:     %d\n",   bcmgenl_netif_num_get());
     seq_printf(m, "  queue length:    %d\n",   psample_qlen);
 
     return 0;
@@ -959,8 +702,7 @@ struct proc_ops psample_proc_debug_file_ops = {
 static int
 psample_proc_stats_show(struct seq_file *m, void *v)
 {
-    seq_printf(m, "BCM KNET %s Callback Stats\n", PSAMPLE_CB_NAME);
-    seq_printf(m, "  DCB type %d\n",                          g_psample_info.hw.dcb_type);
+    seq_printf(m, "BCM KNET %s Callback Stats\n", PSAMPLE_GENL_NAME);
     seq_printf(m, "  pkts filter psample cb         %10lu\n", g_psample_stats.pkts_f_psample_cb);
     seq_printf(m, "  pkts sent to psample module    %10lu\n", g_psample_stats.pkts_f_psample_mod);
     seq_printf(m, "  pkts handled by psample        %10lu\n", g_psample_stats.pkts_f_handled);
@@ -1007,6 +749,7 @@ psample_proc_stats_write(struct file *file, const char *buf,
 
     return count;
 }
+
 struct proc_ops psample_proc_stats_file_ops = {
     PROC_OWNER(THIS_MODULE)
     .proc_open =      psample_proc_stats_open,
@@ -1016,74 +759,101 @@ struct proc_ops psample_proc_stats_file_ops = {
     .proc_release =   single_release,
 };
 
-int psample_cleanup(void)
-{
-    cancel_work_sync(&g_psample_work.wq);
-    remove_proc_entry("stats", psample_proc_root);
-    remove_proc_entry("rate",  psample_proc_root);
-    remove_proc_entry("size",  psample_proc_root);
-    remove_proc_entry("debug", psample_proc_root);
-    remove_proc_entry("map"  , psample_proc_root);
-    remove_proc_entry("psample", knet_cb_proc_root);
-    remove_proc_entry("bcm/knet-cb", NULL);
-    return 0;
-}
-
-int psample_init(void)
+static int
+psample_proc_init(char *procfs_path)
 {
-    #define PROCFS_MAX_PATH 1024
-    #define PSAMPLE_PROCFS_PATH "bcm/knet-cb"
-    char psample_procfs_path[PROCFS_MAX_PATH];
     struct proc_dir_entry *entry;
 
-    /* create procfs for psample */
-    knet_cb_proc_root = proc_mkdir(PSAMPLE_PROCFS_PATH, NULL);
-    snprintf(psample_procfs_path, sizeof(psample_procfs_path), "%s/%s", PSAMPLE_PROCFS_PATH, PSAMPLE_CB_NAME);
+    if (procfs_path == NULL || procfs_path[0] == '\0') {
+        return 0;
+    }
+
+    /* Initialize proc files for psample */
+    snprintf(psample_procfs_path, sizeof(psample_procfs_path) - 1,
+             "%s/%s", procfs_path, PSAMPLE_GENL_NAME);
     psample_proc_root = proc_mkdir(psample_procfs_path, NULL);
 
     /* create procfs for psample stats */
-    PROC_CREATE(entry, "stats", 0666, psample_proc_root, &psample_proc_stats_file_ops);
+    PROC_CREATE(entry, "stats", 0666, psample_proc_root,
+                &psample_proc_stats_file_ops);
     if (entry == NULL) {
-        gprintk("%s: Unable to create procfs entry '/procfs/%s/stats'\n", __func__, psample_procfs_path);
         return -1;
     }
 
     /* create procfs for setting sample rates */
-    PROC_CREATE(entry, "rate", 0666, psample_proc_root, &psample_proc_rate_file_ops);
+    PROC_CREATE(entry, "rate", 0666, psample_proc_root,
+                &psample_proc_rate_file_ops);
     if (entry == NULL) {
-        gprintk("%s: Unable to create procfs entry '/procfs/%s/rate'\n", __func__, psample_procfs_path);
         return -1;
     }
 
     /* create procfs for setting sample size */
-    PROC_CREATE(entry, "size", 0666, psample_proc_root, &psample_proc_size_file_ops);
+    PROC_CREATE(entry, "size", 0666, psample_proc_root,
+                &psample_proc_size_file_ops);
     if (entry == NULL) {
-        gprintk("%s: Unable to create procfs entry '/procfs/%s/size'\n", __func__, psample_procfs_path);
         return -1;
     }
 
-    /* create procfs for getting netdev mapping */
-    PROC_CREATE(entry, "map", 0666, psample_proc_root, &psample_proc_map_file_ops);
+    /* create procfs for debug log */
+    PROC_CREATE(entry, "debug", 0666, psample_proc_root,
+                &psample_proc_debug_file_ops);
     if (entry == NULL) {
-        gprintk("%s: Unable to create procfs entry '/procfs/%s/map'\n", __func__, psample_procfs_path);
         return -1;
     }
 
-    /* create procfs for debug log */
-    PROC_CREATE(entry, "debug", 0666, psample_proc_root, &psample_proc_debug_file_ops);
-    if (entry == NULL) {
-        gprintk("%s: Unable to create procfs entry '/procfs/%s/debug'\n", __func__, psample_procfs_path);
-        return -1;
+    return 0;
+}
+
+static int
+psample_proc_cleanup(void)
+{
+    if (psample_proc_root) {
+        remove_proc_entry("stats", psample_proc_root);
+        remove_proc_entry("rate",  psample_proc_root);
+        remove_proc_entry("size",  psample_proc_root);
+        remove_proc_entry("debug", psample_proc_root);
+        remove_proc_entry(psample_procfs_path, NULL);
+        psample_proc_root = NULL;
     }
+    return 0;
+}
 
+static int
+psample_cleanup(void)
+{
+    psample_pkt_t *pkt;
+    psample_group_data_t *grp;
+
+    cancel_work_sync(&g_psample_work.wq);
+
+    while (!list_empty(&g_psample_work.pkt_list)) {
+        pkt = list_entry(g_psample_work.pkt_list.next, psample_pkt_t, list);
+        list_del(&pkt->list);
+        dev_kfree_skb_any(pkt->skb);
+        kfree(pkt);
+    }
+
+    while (!list_empty(&g_psample_info.group_list)) {
+        grp = list_entry(g_psample_info.group_list.next,
+                         psample_group_data_t, list);
+        list_del(&grp->list);
+        psample_group_put(grp->group);
+        kfree(grp);
+    }
+
+    return 0;
+}
+
+static int
+psample_init(void)
+{
     /* clear data structs */
     memset(&g_psample_stats, 0, sizeof(psample_stats_t));
     memset(&g_psample_info, 0, sizeof(psample_info_t));
     memset(&g_psample_work, 0, sizeof(psample_work_t));
 
     /* setup psample_info struct */
-    INIT_LIST_HEAD(&g_psample_info.netif_list);
-    spin_lock_init(&g_psample_info.lock);
+    INIT_LIST_HEAD(&g_psample_info.group_list);
 
     /* setup psample work queue */
     spin_lock_init(&g_psample_work.lock);
@@ -1093,12 +863,46 @@ int psample_init(void)
     /* get net namespace */
     g_psample_info.netns = get_net_ns_by_pid(current->pid);
     if (!g_psample_info.netns) {
-        gprintk("%s: Could not get network namespace for pid %d\n", __func__, current->pid);
-        return (-1);
+        gprintk("%s: Could not get network namespace for pid %d\n",
+                __func__, current->pid);
+        return -1;
     }
-    PSAMPLE_CB_DBG_PRINT("%s: current->pid %d, netns 0x%p, sample_size %d\n", __func__,
-            current->pid, g_psample_info.netns, psample_size);
+    PSAMPLE_CB_DBG_PRINT("%s: current->pid %d, netns 0x%p, sample_size %d\n",
+                         __func__,
+                         current->pid, g_psample_info.netns, psample_size);
+
+    return 0;
+}
+
+int bcmgenl_psample_cleanup(void)
+{
+    psample_cleanup();
+    psample_proc_cleanup();
+    bkn_filter_cb_unregister(psample_filter_cb);
+    return 0;
+}
+
+int
+bcmgenl_psample_init(char *procfs_path)
+{
+    bkn_filter_cb_register_by_name(psample_filter_cb, PSAMPLE_GENL_NAME);
+    bcmgenl_netif_default_sample_set(PSAMPLE_RATE_DFLT, PSAMPLE_SIZE_DFLT);
+    psample_proc_init(procfs_path);
+    return psample_init();
+}
 
+#else
+
+int
+bcmgenl_psample_init(char *procfs_path)
+{
+    return 0;
+}
 
+int
+bcmgenl_psample_cleanup(void)
+{
     return 0;
 }
+
+#endif /* BCMGENL_PSAMPLE_SUPPORT */
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-psample.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-psample.h
new file mode 100644
index 000000000..d3b6521d1
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-psample.h
@@ -0,0 +1,44 @@
+/*
+ * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * 
+ * Permission is granted to use, copy, modify and/or distribute this
+ * software under either one of the licenses below.
+ * 
+ * License Option 1: GPL
+ * 
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License, version 2, as
+ * published by the Free Software Foundation (the "GPL").
+ * 
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License version 2 (GPLv2) for more details.
+ * 
+ * You should have received a copy of the GNU General Public License
+ * version 2 (GPLv2) along with this source code.
+ * 
+ * 
+ * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
+ * 
+ * This software is governed by the Broadcom Open Network Switch APIs license:
+ * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+ * 
+ */
+
+#ifndef __BCM_GENL_PSAMPLE_H__
+#define __BCM_GENL_PSAMPLE_H__
+
+#include <lkm.h>
+
+#ifndef BCMGENL_PSAMPLE_SUPPORT
+#define BCMGENL_PSAMPLE_SUPPORT (IS_ENABLED(CONFIG_PSAMPLE))
+#endif
+
+extern int
+bcmgenl_psample_init(char *procfs_path);
+
+extern int
+bcmgenl_psample_cleanup(void);
+
+#endif /* __BCM_GENL_PSAMPLE_H__ */
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl.c b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl.c
new file mode 100644
index 000000000..e78d4e217
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl.c
@@ -0,0 +1,253 @@
+/*
+ * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * 
+ * Permission is granted to use, copy, modify and/or distribute this
+ * software under either one of the licenses below.
+ * 
+ * License Option 1: GPL
+ * 
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License, version 2, as
+ * published by the Free Software Foundation (the "GPL").
+ * 
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License version 2 (GPLv2) for more details.
+ * 
+ * You should have received a copy of the GNU General Public License
+ * version 2 (GPLv2) along with this source code.
+ * 
+ * 
+ * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
+ * 
+ * This software is governed by the Broadcom Open Network Switch APIs license:
+ * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+ * 
+ */
+
+/*
+ * Middle-driver for communication between Linux KNET driver and
+ * drivers support Generic Netlink channel.
+ *
+ * This driver utilizes the NETIF and RX filter call-back functions
+ * of Linux KNET driver to trasform the RX filter packets to Generic Netlink
+ * packets for application usage.
+ *
+ * Current supported Generic Netlink kernel modules are:
+ *
+ * - psample module in kernel/linux/net/psample
+ *
+ *   Filter call-back function is registered for recevieing KNET filter
+ *   created with description name 'psample'.
+ *
+ * - genl_packet module from Google
+ *
+ *   Filter call-back function is registered for recevieing KNET filter
+ *   created with description name 'genl_packet'.
+ *
+ * This driver is also built with the DCB library as the helper for parsing
+ * the RX packet meta data from the Linux KNET driver filter call-back function.
+ * The environment DCBDIR must be set to indicate the directroy of the DCB
+ * library.
+ *
+ * The module can be built from the standard Linux user mode target
+ * directories using the following command (assuming bash), e.g.
+ *
+ *   cd $SDK/systems/linux/user/gto-2_6
+ *   BUILD_BCM_GENL=1 make -s mod
+ *
+ */
+
+#include <gmodule.h> /* Must be included first */
+#include <linux-bde.h>
+#include "bcm-genl-dev.h"
+#include "bcm-genl-netif.h"
+#include "bcm-genl-psample.h"
+#include "bcm-genl-packet.h"
+
+MODULE_AUTHOR("Broadcom Corporation");
+MODULE_DESCRIPTION("Broadcom Linux KNET Call-Back Driver for GenLink");
+MODULE_LICENSE("GPL");
+
+int debug;
+LKM_MOD_PARAM(debug, "i", int, 0);
+MODULE_PARM_DESC(debug,
+"Debug level (default 0)");
+
+/* Module Information */
+#define MODULE_MAJOR 0
+#define MODULE_NAME "linux-bcm-genl"
+
+#define BCMGENL_PROCFS_PATH "bcm/genl"
+
+/* driver proc entry root */
+static struct proc_dir_entry *bcmgenl_proc_root = NULL;
+
+/*
+ * dev Proc Read Entry
+ */
+static int
+proc_dev_show(struct seq_file *m, void *v)
+{
+    int dev_no;
+    int dcb_type, dcb_size;
+
+    for (dev_no = 0; dev_no < LINUX_BDE_MAX_DEVICES; dev_no++) {
+        if (bcmgenl_dev_dcb_info_get(dev_no, &dcb_type, &dcb_size) == 0) {
+            seq_printf(m, "Device number %d:\n", dev_no);
+            seq_printf(m, "  dcb_type:    %d\n", dcb_type);
+            seq_printf(m, "  dcb_size:    %d\n", dcb_size);
+        }
+    }
+    return 0;
+}
+
+static int
+proc_dev_open(struct inode *inode, struct file *file)
+{
+    return single_open(file, proc_dev_show, NULL);
+}
+
+struct proc_ops proc_dev_file_ops = {
+    PROC_OWNER(THIS_MODULE)
+    .proc_open =       proc_dev_open,
+    .proc_read =       seq_read,
+    .proc_lseek =      seq_lseek,
+    .proc_write =      NULL,
+    .proc_release =    single_release,
+};
+
+/*
+ * netif Proc Read Entry
+ */
+static int
+netif_show(void *cb_data, bcmgenl_netif_t *netif)
+{
+    struct seq_file *m = (struct seq_file *)cb_data;
+
+    seq_printf(m, "  %-14s %-14d %d\n",
+               netif->dev->name, netif->port, netif->dev->ifindex);
+    return 0;
+}
+
+static int
+proc_netif_show(struct seq_file *m, void *v)
+{
+    if (bcmgenl_netif_num_get() == 0) {
+        seq_printf(m, "No interfaces are available\n");
+        return 0;
+    }
+    seq_printf(m, "  Interface      logical port   ifindex\n");
+    seq_printf(m, "-------------    ------------   -------\n");
+    bcmgenl_netif_search(NULL, netif_show, (void *)m);
+    return 0;
+}
+
+static int
+proc_netif_open(struct inode *inode, struct file *file)
+{
+    return single_open(file, proc_netif_show, NULL);
+}
+
+struct proc_ops proc_netif_file_ops = {
+    PROC_OWNER(THIS_MODULE)
+    .proc_open =       proc_netif_open,
+    .proc_read =       seq_read,
+    .proc_lseek =      seq_lseek,
+    .proc_write =      NULL,
+    .proc_release =    single_release,
+};
+
+static int
+bcmgenl_proc_init(void)
+{
+    struct proc_dir_entry *entry;
+
+    /* Initialize proc files */
+    bcmgenl_proc_root = proc_mkdir(BCMGENL_PROCFS_PATH, NULL);
+
+    /* create procfs for getting netdev mapping */
+    PROC_CREATE(entry, "netif", 0666, bcmgenl_proc_root, &proc_netif_file_ops);
+    if (entry == NULL) {
+        return -1;
+    }
+
+    /* create procfs for generic stats */
+    PROC_CREATE(entry, "dev", 0666, bcmgenl_proc_root, &proc_dev_file_ops);
+    if (entry == NULL) {
+        return -1;
+    }
+
+    return 0;
+}
+
+static int
+bcmgenl_proc_cleanup(void)
+{
+    remove_proc_entry("netif", bcmgenl_proc_root);
+    remove_proc_entry("dev", bcmgenl_proc_root);
+    remove_proc_entry(BCMGENL_PROCFS_PATH, NULL);
+    return 0;
+}
+
+/*
+ * Get statistics.
+ * % cat /proc/linux-bcm-genl
+ */
+static int
+_pprint(struct seq_file *m)
+{
+    pprintf(m, "Broadcom Linux KNET Call-Back: genlink\n");
+
+    return 0;
+}
+
+static int
+_cleanup(void)
+{
+    bcmgenl_psample_cleanup();
+#ifdef BUILD_GENL_PACKET
+    bcmgenl_packet_cleanup();
+#endif
+    bcmgenl_netif_cleanup();
+    bcmgenl_dev_cleanup();
+
+    bcmgenl_proc_cleanup();
+
+    return 0;
+}
+
+static int
+_init(void)
+{
+    bcmgenl_proc_init();
+
+    bcmgenl_dev_init();
+    bcmgenl_netif_init();
+
+    bcmgenl_psample_init(BCMGENL_PROCFS_PATH);
+#ifdef BUILD_GENL_PACKET
+    bcmgenl_packet_init(BCMGENL_PROCFS_PATH);
+#endif
+
+    return 0;
+}
+
+static gmodule_t _gmodule = {
+    name: MODULE_NAME,
+    major: MODULE_MAJOR,
+    init: _init,
+    cleanup: _cleanup,
+    pprint: _pprint,
+    ioctl: NULL,
+    open: NULL,
+    close: NULL,
+};
+
+gmodule_t*
+gmodule_get(void)
+{
+    EXPORT_NO_SYMBOLS;
+    return &_gmodule;
+}
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-knet/Makefile b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-knet/Makefile
index d42798e73..42e6c7405 100644
--- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-knet/Makefile
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-knet/Makefile
@@ -1,33 +1,30 @@
-#
-#  Copyright 2007-2020 Broadcom Inc. All rights reserved.
-#  
-#  Permission is granted to use, copy, modify and/or distribute this
-#  software under either one of the licenses below.
-#  
-#  License Option 1: GPL
-#  
-#  This program is free software; you can redistribute it and/or modify
-#  it under the terms of the GNU General Public License, version 2, as
-#  published by the Free Software Foundation (the "GPL").
-#  
-#  This program is distributed in the hope that it will be useful, but
-#  WITHOUT ANY WARRANTY; without even the implied warranty of
-#  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
-#  General Public License version 2 (GPLv2) for more details.
-#  
-#  You should have received a copy of the GNU General Public License
-#  version 2 (GPLv2) along with this source code.
-#  
-#  
-#  License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
-#  
-#  This software is governed by the Broadcom Open Network Switch APIs license:
-#  https://www.broadcom.com/products/ethernet-connectivity/software/opennsa
-#
 # -*- Makefile -*-
 # $Id: Makefile,v 1.3 Broadcom SDK $
-# $Copyright: (c) 2005 Broadcom Corp.
-# All Rights Reserved.$
+# $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+# 
+# Permission is granted to use, copy, modify and/or distribute this
+# software under either one of the licenses below.
+# 
+# License Option 1: GPL
+# 
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License, version 2, as
+# published by the Free Software Foundation (the "GPL").
+# 
+# This program is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+# General Public License version 2 (GPLv2) for more details.
+# 
+# You should have received a copy of the GNU General Public License
+# version 2 (GPLv2) along with this source code.
+# 
+# 
+# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
+# 
+# This software is governed by the Broadcom Open Network Switch APIs license:
+# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+# 
 #
 LOCALDIR = systems/linux/kernel/modules/bcm-knet
 
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-knet/bcm-knet.c b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-knet/bcm-knet.c
old mode 100755
new mode 100644
index a45acfe2f..ca569d785
--- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-knet/bcm-knet.c
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-knet/bcm-knet.c
@@ -1,17 +1,29 @@
 /*
- * Copyright 2017 Broadcom
- *
+ * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * 
+ * Permission is granted to use, copy, modify and/or distribute this
+ * software under either one of the licenses below.
+ * 
+ * License Option 1: GPL
+ * 
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License, version 2, as
  * published by the Free Software Foundation (the "GPL").
- *
+ * 
  * This program is distributed in the hope that it will be useful, but
  * WITHOUT ANY WARRANTY; without even the implied warranty of
  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  * General Public License version 2 (GPLv2) for more details.
- *
+ * 
  * You should have received a copy of the GNU General Public License
  * version 2 (GPLv2) along with this source code.
+ * 
+ * 
+ * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
+ * 
+ * This software is governed by the Broadcom Open Network Switch APIs license:
+ * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+ * 
  */
 
 /*
@@ -143,12 +155,12 @@ LKM_MOD_PARAM(num_rx_prio, "i", int, 0);
 MODULE_PARM_DESC(num_rx_prio,
 "Number of filter priorities per Rx DMA channel");
 
-static int rx_rate[8] = { 100000, 100000, 100000, 100000, 100000, 100000, 100000, 0 };
+static int rx_rate[16] = { 100000, 100000, 100000, 100000, 100000, 100000, 100000, 100000, 100000, 100000, 100000, 100000, 100000, 100000, 100000, 100000};
 LKM_MOD_PARAM_ARRAY(rx_rate, "1-4i", int, NULL, 0);
 MODULE_PARM_DESC(rx_rate,
 "Rx rate in packets per second (default 100000)");
 
-static int rx_burst[8] = { 0, 0, 0, 0, 0, 0, 0, 0 };
+static int rx_burst[16] = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 };
 LKM_MOD_PARAM_ARRAY(rx_burst, "1-4i", int, NULL, 0);
 MODULE_PARM_DESC(rx_burst,
 "Rx rate burst maximum in packets (default rx_rate/10)");
@@ -173,11 +185,7 @@ MODULE_PARM_DESC(mirror_local,
 /*
  * Force to add one layer of VLAN tag to untagged packets on Dune devices
  */
-#if defined(SAI_FIXUP) && defined(BCM_DNX_SUPPORT)  /* SONIC-16195 CS9129167 - Change the default to NOT add tag */
-static int force_tagged = 0;
-#else
 static int force_tagged = 1;
-#endif
 LKM_MOD_PARAM(force_tagged, "i", int, 0);
 MODULE_PARM_DESC(force_tagged,
 "Always tagged with VLAN tag with spceified VID or VSI(default 1)");
@@ -306,6 +314,10 @@ static int napi_weight = 0;
 
 /* Compatibility */
 
+#ifndef DMA_BIT_MASK
+#define DMA_BIT_MASK(n) (((n) == 64) ? ~0ULL : ((1ULL<<(n))-1))
+#endif
+
 #if (LINUX_VERSION_CODE < KERNEL_VERSION(4,7,0))
 #define NETDEV_UPDATE_TRANS_START_TIME(dev) dev->trans_start = jiffies
 #else
@@ -560,8 +572,11 @@ typedef struct bkn_dcb_chain_s {
 #define MAX_TX_DCBS 64
 #define MAX_RX_DCBS 64
 
-#define NUM_DMA_CHAN 8
-#define NUM_RX_CHAN 7
+#define NUM_DMA_CHAN 16
+#define NUM_CMICX_DMA_CHAN 8
+#define NUM_CMICR_DMA_CHAN 16
+#define NUM_RX_CHAN 15
+#define NUM_CMICR_RX_CHAN 15
 #define NUM_CMICX_RX_CHAN 7
 #define NUM_CMICM_RX_CHAN 3
 
@@ -628,7 +643,9 @@ typedef struct bkn_switch_info_s {
     uint32_t poll_channels;     /* Channels for polling */
     uint32_t unet_channels;     /* User network channels */
     uint32_t inst_id;           /* Instance id of this device */
-    uint32_t device_id;         /* Device ID, like 0x8675 for Jericho A0, 0x */
+    uint32_t base_id;           /* Device (family) ID, like 0x8675 for Jericho A0, 0x */
+    uint16_t dev_id;            /* Device ID */
+    uint8_t rev_id;             /* Revision ID */
     int evt_idx;                /* Event queue index for this device*/
     int basedev_suspended;      /* Base device suspended */
     int pcie_link_status;       /* This flag is used to indicate PCIE Link status, 0 for up and 1 for down */
@@ -977,6 +994,7 @@ typedef struct bkn_filter_s {
     int dev_no;
     unsigned long hits;
     kcom_filter_t kf;
+    knet_filter_cb_f cb;
 } bkn_filter_t;
 
 
@@ -1018,8 +1036,22 @@ static knet_hw_tstamp_ptp_clock_index_cb_f knet_hw_tstamp_ptp_clock_index_cb = N
 static knet_hw_tstamp_rx_time_upscale_cb_f knet_hw_tstamp_rx_time_upscale_cb = NULL;
 static knet_hw_tstamp_rx_pre_process_cb_f knet_hw_tstamp_rx_pre_process_cb = NULL;
 static knet_hw_tstamp_ioctl_cmd_cb_f knet_hw_tstamp_ioctl_cmd_cb = NULL;
-static knet_netif_cb_f knet_netif_create_cb = NULL;
-static knet_netif_cb_f knet_netif_destroy_cb = NULL;
+static knet_hw_tstamp_ptp_transport_get_cb_f knet_hw_tstamp_ptp_transport_get_cb = NULL;
+
+typedef struct bkn_netif_cb_s {
+    struct list_head list;
+    knet_netif_cb_f cb;
+} bkn_netif_cb_t;
+LIST_HEAD(netif_create_cb_list);
+LIST_HEAD(netif_destroy_cb_list);
+
+typedef struct bkn_filter_cb_s {
+    struct list_head list;
+    char desc[KCOM_FILTER_DESC_MAX];
+    knet_filter_cb_f cb;
+} bkn_filter_cb_t;
+LIST_HEAD(filter_cb_list);
+
 /*
  * Thread management
  */
@@ -1105,6 +1137,31 @@ bkn_sleep(int clicks)
 /* CMICx interrupts reserved for kernel handler */
 #define CMICX_TXRX_IRQ_MASK     0xffffffff
 
+/* CMICR registers */
+#define CMICR_CMC_BASE          0x00000000
+#define CMICR_DMA_CTRLr         (CMICR_CMC_BASE + 0x00003100)
+#define CMICR_DMA_STATr         (CMICR_CMC_BASE + 0x00003114)
+#define CMICR_DMA_DESC_HIr      (CMICR_CMC_BASE + 0x00003108)
+#define CMICR_DMA_DESC_LOr      (CMICR_CMC_BASE + 0x00003104)
+#define CMICR_DMA_HALT_HIr      (CMICR_CMC_BASE + 0x00003110)
+#define CMICR_DMA_HALT_LOr      (CMICR_CMC_BASE + 0x0000310c)
+#define CMICR_INTR_STATr        (CMICR_CMC_BASE + 0x00003118)
+#define CMICR_INTR_ENABr        (CMICR_CMC_BASE + 0x0000311C)
+#define CMICR_INTR_CLRr         (CMICR_CMC_BASE + 0x00003120)
+
+/*
+ * PAXB_0_INTC_SET_INTR_ENABLE_REG5r sets interrupt enable bit for interrupts 191 down to 160
+ * Packet DMA interrupt enable bit is [168 : 199], here bit [168 : 183] is considered because it is assumed that only cmc0
+ */
+#define PAXB_0_INTC_SET_INTR_ENABLE_REG5r   0x0292D114
+#define PAXB_0_INTC_INTR_RAW_STATUS_REG5r   0x0292D18C
+
+
+/* CMICR interrupts reserved for kernel handler */
+#define CMICR_TXRX_IRQ_MASK     0xffff00
+
+
+#define DEV_IS_CMICR(_sinfo)    ((_sinfo)->cmic_type == 'r')
 #define DEV_IS_CMICX(_sinfo)    ((_sinfo)->cmic_type == 'x')
 #define DEV_IS_CMICM(_sinfo)    ((_sinfo)->cmic_type == 'm')
 #define DEV_IS_CMIC(_sinfo)     ((_sinfo)->cmic_type != 0)
@@ -1145,6 +1202,14 @@ bkn_sleep(int clicks)
 #define CMICX_DS_CMC_DMA_CHAIN_DONE     (0x00000001)
 #define CMICX_DS_CMC_DMA_ACTIVE         (0x00000002)
 
+#define CMICR_DS_CHAIN_DONE_INTR        (0x00000001)
+#define CMICR_DS_DESC_DONE_INTR         (0x00000002)
+#define CMICR_DS_DESC_CONTROLLED_INTR   (0x00000004)
+#define CMICR_DS_INTR_COALESCING_INTR   (0x00000008)
+
+#define CMICR_DS_CMC_DMA_CHAIN_DONE     (0x00000001)
+#define CMICR_DS_CMC_DMA_ACTIVE         (0x00000002)
+
 #define DMA_TO_BUS_HI(dma)              ((dma) | sinfo->dma_hi)
 #define BUS_TO_DMA_HI(bus)              ((bus) & ~sinfo->dma_hi)
 
@@ -1163,10 +1228,23 @@ bkn_sleep(int clicks)
 #define CMICX_DC_CMC_CTRLD_INT          (0x00000080)
 #define CMICX_DC_CMC_CONTINUOUS         (0x00000100)
 
+#define CMICR_DC_CMC_DIRECTION          (0x00000001)
+#define CMICR_DC_CMC_ENABLE             (0x00000002)
+#define CMICR_DC_CMC_ABORT              (0x00000004)
+#define CMICR_DC_CMC_CTRLD_INT          (0x00000080)
+#define CMICR_DC_CMC_CONTINUOUS         (0x00000100)
+#define CMICR_DC_CHAIN_DONE_INTR_ENABLE        (0x00000001)
+#define CMICR_DC_DESC_DONE_INTR_ENABLE         (0x00000002)
+#define CMICR_DC_DESC_CONTROLLED_INTR_ENABLE   (0x00000004)
+#define CMICR_DC_INTR_COALESCING_INTR_ENABLE   (0x00000008)
+
+
 /* Minimum packet header size for protect underflow. */
 #define CMICX_PKT_HDR_SIZE_MIN          8
 /* CMICX minimum packet header size for protect underflow. */
 #define CMICX_DCB_SIZE_MIN              16
+/* CMICR minimum packet header size for protect underflow. */
+#define CMICR_DCB_SIZE_MIN         16
 /* Minimum packet header size for protect underflow. */
 #define DCB_SIZE_MIN                    20
 /* Maximum packet raw data size for filter validation. */
@@ -1176,7 +1254,7 @@ static void
 dev_read32(bkn_switch_info_t *sinfo, uint32_t address, uint32_t *value)
 {
     /* Devices id started with 0x8 is always from DNX devices */
-    if ((sinfo->device_id & 0x8000) == 0x8000)  {
+    if ((sinfo->base_id & 0x8000) == 0x8000)  {
         if (sinfo->pcie_link_status == PCIE_LINK_STATUS_DOWN) {
             /* Bypass register access when PCIE Link is down */
             return;
@@ -1190,7 +1268,7 @@ static void
 dev_write32(bkn_switch_info_t *sinfo, uint32_t address, uint32_t value)
 {
     /* Devices id started with 0x8 is always from DNX devices */
-    if ((sinfo->device_id & 0x8000) == 0x8000)  {
+    if ((sinfo->base_id & 0x8000) == 0x8000)  {
         if (sinfo->pcie_link_status == PCIE_LINK_STATUS_DOWN) {
             /* Bypass register access when PCIE Link is down */
             return;
@@ -1318,7 +1396,7 @@ static inline void
 xgs_irq_mask_set(bkn_switch_info_t *sinfo, uint32_t mask)
 {
     /* Devices id started with 0x8 is always from DNX devices */
-    if ((sinfo->device_id & 0x8000) == 0x8000)  {
+    if ((sinfo->base_id & 0x8000) == 0x8000)  {
         if (sinfo->pcie_link_status == PCIE_LINK_STATUS_DOWN) {
             /* Bypass hw access when PCIE Link is down */
             return;
@@ -1498,7 +1576,7 @@ xgsm_irq_mask_set(bkn_switch_info_t *sinfo, uint32_t mask)
     uint32_t ctrld_mask = 0;
 
     /* Devices id started with 0x8 is always from DNX devices */
-    if ((sinfo->device_id & 0x8000) == 0x8000)  {
+    if ((sinfo->base_id & 0x8000) == 0x8000)  {
         if (sinfo->pcie_link_status == PCIE_LINK_STATUS_DOWN) {
             /* Bypass hw access when PCIE Link is down */
             return;
@@ -1729,7 +1807,7 @@ xgsx_irq_mask_set(bkn_switch_info_t *sinfo, uint32_t mask)
     uint32_t fmask = CMICX_TXRX_IRQ_MASK;
 
     /* Devices id started with 0x8 is always from DNX devices */
-    if ((sinfo->device_id & 0x8000) == 0x8000)  {
+    if ((sinfo->base_id & 0x8000) == 0x8000)  {
         if (sinfo->pcie_link_status == PCIE_LINK_STATUS_DOWN) {
             /* Bypass hw access when PCIE Link is down */
             return;
@@ -1801,10 +1879,239 @@ xgsx_irq_mask_disable(bkn_switch_info_t *sinfo, int chan, int update_hw)
     }
 }
 
+static inline void
+xgsr_dma_chain_clear(bkn_switch_info_t *sinfo, int chan)
+{
+    uint32_t ctrl = 0;
+    uint32_t stat = 0;
+
+    /* Disabing DMA clears chain done */
+    dev_read32(sinfo, CMICR_DMA_CTRLr + 0x80 * chan, &ctrl);
+    ctrl &= ~(CMICR_DC_CMC_ENABLE | CMICR_DC_CMC_ABORT);
+    dev_write32(sinfo, CMICR_DMA_CTRLr + 0x80 * chan, ctrl);
+
+    stat = CMICR_DS_CHAIN_DONE_INTR;
+    dev_write32(sinfo, CMICR_INTR_CLRr + 0x80 * chan, stat);
+
+    MEMORY_BARRIER;
+
+    /* Flush write buffer */
+    dev_read32(sinfo, CMICR_INTR_CLRr + 0x80 * chan, &stat);
+
+    MEMORY_BARRIER;
+}
+
+static inline void
+xgsr_dma_desc_clear(bkn_switch_info_t *sinfo, int chan)
+{
+    uint32_t stat = 0;
+
+    if (CDMA_CH(sinfo, chan)) {
+        stat = CMICR_DS_DESC_CONTROLLED_INTR;
+    } else {
+        stat = CMICR_DS_DESC_DONE_INTR;
+    }
+    dev_write32(sinfo, CMICR_INTR_CLRr + 0x80 * chan, stat);
+
+    MEMORY_BARRIER;
+
+    /* Flush write buffer */
+    dev_read32(sinfo, CMICR_INTR_CLRr + 0x80 * chan, &stat);
+
+    MEMORY_BARRIER;
+}
+
+static int
+xgsr_dma_chan_clear(bkn_switch_info_t *sinfo, int chan)
+{
+    xgsr_dma_chain_clear(sinfo, chan);
+    xgsr_dma_desc_clear(sinfo, chan);
+
+    return 0;
+}
+
+static inline void
+xgsr_cdma_halt_set(bkn_switch_info_t *sinfo, int chan)
+{
+    dev_write32(sinfo, CMICR_DMA_HALT_LOr + 0x80 * chan,
+                sinfo->halt_addr[chan]);
+    dev_write32(sinfo, CMICR_DMA_HALT_HIr + 0x80 * chan,
+                DMA_TO_BUS_HI(sinfo->halt_addr[chan] >> 32));
+
+    MEMORY_BARRIER;
+}
+
+static int
+xgsr_dma_chan_init(bkn_switch_info_t *sinfo, int chan, int dir)
+{
+    uint32_t ctrl = 0;
+
+    dev_read32(sinfo, CMICR_DMA_CTRLr + 0x80 * chan, &ctrl);
+    ctrl &= ~CMICR_DC_CMC_DIRECTION;
+    if (dir) {
+        ctrl |= CMICR_DC_CMC_DIRECTION;
+    }
+    if (CDMA_CH(sinfo, chan)) {
+        ctrl |= CMICR_DC_CMC_CONTINUOUS | CMICR_DC_CMC_CTRLD_INT;
+        xgsr_cdma_halt_set(sinfo, chan);
+    }
+    dev_write32(sinfo, CMICR_DMA_CTRLr + 0x80 * chan, ctrl);
+
+    MEMORY_BARRIER;
+
+    return 0;
+}
+
+static int
+xgsr_dma_chan_start(bkn_switch_info_t *sinfo, int chan, uint64_t dcb)
+{
+    uint32_t ctrl = 0;
+
+    /* Write the DCB address to the DESC address for this channel */
+    dev_write32(sinfo, CMICR_DMA_DESC_LOr + 0x80 * chan, dcb);
+    dev_write32(sinfo, CMICR_DMA_DESC_HIr + 0x80 * chan, DMA_TO_BUS_HI(dcb >> 32));
+
+    MEMORY_BARRIER;
+
+    /* Kick it off */
+    dev_read32(sinfo, CMICR_DMA_CTRLr + 0x80 * chan, &ctrl);
+    ctrl |= CMICR_DC_CMC_ENABLE;
+    dev_write32(sinfo, CMICR_DMA_CTRLr + 0x80 * chan, ctrl);
+
+    MEMORY_BARRIER;
+
+    return 0;
+}
+
+static int
+xgsr_dma_chan_abort(bkn_switch_info_t *sinfo, int chan, int polls)
+{
+    uint32_t ctrl = 0;
+    uint32_t stat = 0;
+    int p;
+
+    /* Skip abort sequence if channel is not active */
+    dev_read32(sinfo, CMICR_DMA_STATr + 0x80 * chan, &stat);
+    if (!(stat & CMICR_DS_CMC_DMA_ACTIVE)) {
+        return 0;
+    }
+
+    /* Abort the channel */
+    dev_read32(sinfo, CMICR_DMA_CTRLr + 0x80 * chan, &ctrl);
+    ctrl |= CMICR_DC_CMC_ENABLE | CMICR_DC_CMC_ABORT;
+    dev_write32(sinfo, CMICR_DMA_CTRLr + 0x80 * chan, ctrl);
+
+    MEMORY_BARRIER;
+
+    /* Poll for abort completion */
+    for (p = 0; p < polls; p++) {
+        dev_read32(sinfo, CMICR_DMA_STATr + 0x80 * chan, &stat);
+        if (!(stat & CMICR_DS_CMC_DMA_ACTIVE)) {
+            /* Clear up channel */
+            xgsr_dma_chan_clear(sinfo, chan);
+            return polls;
+        }
+    }
+
+    DBG_WARN(("DMA channel %d abort failed\n", chan));
+
+    return -1;
+}
+
+static inline void
+xgsr_irq_fmask_get(bkn_switch_info_t *sinfo, uint32_t *fmask)
+{
+    int chan, bits = 1, base = 8;
+
+    if (fmask == NULL) {
+        return;
+    }
+
+    *fmask = CMICR_TXRX_IRQ_MASK;
+
+    for (chan = 0; chan < sinfo->rx_chans; chan++) {
+        if (UNET_CH(sinfo, XGS_DMA_RX_CHAN + chan)) {
+            *fmask &= ~(((0x1 << bits) - 1) << ((XGS_DMA_RX_CHAN + chan) * bits + base));
+        }
+    }
+    return;
+}
+
+static inline void
+xgsr_irq_mask_set(bkn_switch_info_t *sinfo, uint32_t mask)
+{
+    uint32_t irq_mask_reg = PAXB_0_INTC_SET_INTR_ENABLE_REG5r;
+    uint32_t fmask = CMICR_TXRX_IRQ_MASK;
+
+    if ((sinfo->base_id & 0x8000) == 0x8000)  {
+        /* Devices id started with 0x8 is always from DNX devices */
+        if (sinfo->pcie_link_status == PCIE_LINK_STATUS_DOWN) {
+            /* Bypass hw access when PCIE Link is down */
+            return;
+        }
+    }
+
+    if (sinfo->napi_poll_mode) {
+        mask = 0;
+    }
+
+    xgsr_irq_fmask_get(sinfo, &fmask);
+    if (sinfo->cpu_no == 1) {
+        DBG_WARN(("IHost(AXI) is not supported.\n"));
+    }
+
+    lkbde_irq_mask_set(sinfo->dev_no | LKBDE_ISR2_DEV | LKBDE_IPROC_REG,
+                       irq_mask_reg, mask, fmask);
+}
+
+static inline void
+xgsr_irq_mask_enable(bkn_switch_info_t *sinfo, int chan, int update_hw)
+{
+    uint32_t enabler;
+    int bits = 1, base = 8;
+
+    if (CDMA_CH(sinfo, chan)) {
+        dev_read32(sinfo, CMICR_INTR_ENABr + 0x80 * chan, &enabler);
+        enabler |= CMICR_DC_DESC_CONTROLLED_INTR_ENABLE;
+        dev_write32(sinfo, CMICR_INTR_ENABr + 0x80 * chan, enabler);
+    } else {
+        DBG_WARN(("Chained mode is not supported.\n"));
+    }
+
+    sinfo->irq_mask |= (((0x1 << bits) - 1) << (chan * bits + base));
+
+    if (update_hw) {
+        xgsr_irq_mask_set(sinfo, sinfo->irq_mask);
+    }
+}
+
+static inline void
+xgsr_irq_mask_disable(bkn_switch_info_t *sinfo, int chan, int update_hw)
+{
+    uint32_t enabler;
+    int bits = 1, base = 8;
+
+    if (CDMA_CH(sinfo, chan)) {
+        dev_read32(sinfo, CMICR_INTR_ENABr + 0x80 * chan, &enabler);
+        enabler &= ~CMICR_DC_DESC_CONTROLLED_INTR_ENABLE;
+        dev_write32(sinfo, CMICR_INTR_ENABr + 0x80 * chan, enabler);
+    } else {
+        DBG_WARN(("Chained mode is not supported.\n"));
+    }
+
+    sinfo->irq_mask &= ~(((0x1 << bits) - 1) << (chan * bits + base));
+
+    if (update_hw) {
+        xgsr_irq_mask_set(sinfo, sinfo->irq_mask);
+    }
+}
+
 static inline void
 dev_dma_chain_clear(bkn_switch_info_t *sinfo, int chan)
 {
-    if (DEV_IS_CMICX(sinfo)) {
+    if (DEV_IS_CMICR(sinfo)) {
+        xgsr_dma_chain_clear(sinfo, chan);
+    } else if (DEV_IS_CMICX(sinfo)) {
         xgsx_dma_chain_clear(sinfo, chan);
     } else if (DEV_IS_CMICM(sinfo)) {
         xgsm_dma_chain_clear(sinfo, chan);
@@ -1816,7 +2123,9 @@ dev_dma_chain_clear(bkn_switch_info_t *sinfo, int chan)
 static inline void
 dev_dma_desc_clear(bkn_switch_info_t *sinfo, int chan)
 {
-    if (DEV_IS_CMICX(sinfo)) {
+    if (DEV_IS_CMICR(sinfo)) {
+        xgsr_dma_desc_clear(sinfo, chan);
+    } else if (DEV_IS_CMICX(sinfo)) {
         xgsx_dma_desc_clear(sinfo, chan);
     } else if (DEV_IS_CMICM(sinfo)) {
         xgsm_dma_desc_clear(sinfo, chan);
@@ -1828,7 +2137,9 @@ dev_dma_desc_clear(bkn_switch_info_t *sinfo, int chan)
 static int
 dev_dma_chan_clear(bkn_switch_info_t *sinfo, int chan)
 {
-    if (DEV_IS_CMICX(sinfo)) {
+    if (DEV_IS_CMICR(sinfo)) {
+        return xgsr_dma_chan_clear(sinfo, chan);
+    } else if (DEV_IS_CMICX(sinfo)) {
         return xgsx_dma_chan_clear(sinfo, chan);
     } else if (DEV_IS_CMICM(sinfo)) {
         return xgsm_dma_chan_clear(sinfo, chan);
@@ -1840,7 +2151,9 @@ dev_dma_chan_clear(bkn_switch_info_t *sinfo, int chan)
 static void
 dev_cdma_halt_set(bkn_switch_info_t *sinfo, int chan)
 {
-    if (DEV_IS_CMICX(sinfo)) {
+    if (DEV_IS_CMICR(sinfo)) {
+        xgsr_cdma_halt_set(sinfo, chan);
+    } else if (DEV_IS_CMICX(sinfo)) {
         xgsx_cdma_halt_set(sinfo, chan);
     } else if (DEV_IS_CMICM(sinfo)) {
         xgsm_cdma_halt_set(sinfo, chan);
@@ -1850,7 +2163,9 @@ dev_cdma_halt_set(bkn_switch_info_t *sinfo, int chan)
 static int
 dev_dma_chan_init(bkn_switch_info_t *sinfo, int chan, int dir)
 {
-    if (DEV_IS_CMICX(sinfo)) {
+    if (DEV_IS_CMICR(sinfo)) {
+        return xgsr_dma_chan_init(sinfo, chan, dir);
+    } else if (DEV_IS_CMICX(sinfo)) {
         return xgsx_dma_chan_init(sinfo, chan, dir);
     } else if (DEV_IS_CMICM(sinfo)) {
         return xgsm_dma_chan_init(sinfo, chan, dir);
@@ -1862,7 +2177,9 @@ dev_dma_chan_init(bkn_switch_info_t *sinfo, int chan, int dir)
 static int
 dev_dma_chan_start(bkn_switch_info_t *sinfo, int chan, uint64_t dcb)
 {
-    if (DEV_IS_CMICX(sinfo)) {
+    if (DEV_IS_CMICR(sinfo)) {
+        return xgsr_dma_chan_start(sinfo, chan, dcb);
+    } else if (DEV_IS_CMICX(sinfo)) {
         return xgsx_dma_chan_start(sinfo, chan, dcb);
     } else if (DEV_IS_CMICM(sinfo)) {
         return xgsm_dma_chan_start(sinfo, chan, dcb);
@@ -1874,7 +2191,9 @@ dev_dma_chan_start(bkn_switch_info_t *sinfo, int chan, uint64_t dcb)
 static int
 dev_dma_chan_abort(bkn_switch_info_t *sinfo, int chan, int polls)
 {
-    if (DEV_IS_CMICX(sinfo)) {
+    if (DEV_IS_CMICR(sinfo)) {
+        return xgsr_dma_chan_abort(sinfo, chan, polls);
+    } else if (DEV_IS_CMICX(sinfo)) {
         return xgsx_dma_chan_abort(sinfo, chan, polls);
     } else if (DEV_IS_CMICM(sinfo)) {
         return xgsm_dma_chan_abort(sinfo, chan, polls);
@@ -1886,7 +2205,9 @@ dev_dma_chan_abort(bkn_switch_info_t *sinfo, int chan, int polls)
 static inline void
 dev_irq_mask_set(bkn_switch_info_t *sinfo, uint32_t mask)
 {
-    if (DEV_IS_CMICX(sinfo)) {
+    if (DEV_IS_CMICR(sinfo)) {
+        xgsr_irq_mask_set(sinfo, mask);
+    } else if (DEV_IS_CMICX(sinfo)) {
         xgsx_irq_mask_set(sinfo, mask);
     } else if (DEV_IS_CMICM(sinfo)) {
         xgsm_irq_mask_set(sinfo, mask);
@@ -1898,7 +2219,9 @@ dev_irq_mask_set(bkn_switch_info_t *sinfo, uint32_t mask)
 static inline void
 dev_irq_mask_enable(bkn_switch_info_t *sinfo, int chan, int update_hw)
 {
-    if (DEV_IS_CMICX(sinfo)) {
+    if (DEV_IS_CMICR(sinfo)) {
+        xgsr_irq_mask_enable(sinfo, chan, update_hw);
+    } else if (DEV_IS_CMICX(sinfo)) {
         xgsx_irq_mask_enable(sinfo, chan, update_hw);
     } else if (DEV_IS_CMICM(sinfo)) {
         xgsm_irq_mask_enable(sinfo, chan, update_hw);
@@ -1910,7 +2233,9 @@ dev_irq_mask_enable(bkn_switch_info_t *sinfo, int chan, int update_hw)
 static void
 dev_irq_mask_disable(bkn_switch_info_t *sinfo, int chan, int update_hw)
 {
-    if (DEV_IS_CMICX(sinfo)) {
+    if (DEV_IS_CMICR(sinfo)) {
+        xgsr_irq_mask_disable(sinfo, chan, update_hw);
+    } else if (DEV_IS_CMICX(sinfo)) {
         xgsx_irq_mask_disable(sinfo, chan, update_hw);
     } else if (DEV_IS_CMICM(sinfo)) {
         xgsm_irq_mask_disable(sinfo, chan, update_hw);
@@ -2043,13 +2368,13 @@ bkn_init_dcbs(bkn_switch_info_t *sinfo)
 
     for (idx = 0; idx < (MAX_TX_DCBS + 1); idx++) {
         if (CDMA_CH(sinfo, XGS_DMA_TX_CHAN)) {
-            if (sinfo->cmic_type == 'x') {
+            if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) {
                 dcb_mem[2] |= 1 << 24 | 1 << 16;
             } else {
                 dcb_mem[1] |= 1 << 24 | 1 << 16;
             }
             if (idx == MAX_TX_DCBS) {
-                if (sinfo->cmic_type == 'x') {
+                if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) {
                     dcb_mem[0] = sinfo->tx.desc[0].dcb_dma;
                     dcb_mem[1] = DMA_TO_BUS_HI(sinfo->tx.desc[0].dcb_dma >> 32);
                     dcb_mem[2] |= 1 << 18;
@@ -2076,13 +2401,13 @@ bkn_init_dcbs(bkn_switch_info_t *sinfo)
     for (chan = 0; chan < sinfo->rx_chans; chan++) {
         for (idx = 0; idx < (MAX_RX_DCBS + 1); idx++) {
             if (CDMA_CH(sinfo, XGS_DMA_RX_CHAN + chan)) {
-                if (sinfo->cmic_type == 'x') {
+                if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) {
                     dcb_mem[2] |= 1 << 24 | 1 << 16;
                 } else {
                     dcb_mem[1] |= 1 << 24 | 1 << 16;
                 }
                 if (idx == MAX_RX_DCBS) {
-                    if (sinfo->cmic_type == 'x') {
+                    if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) {
                         dcb_mem[0] = sinfo->rx[chan].desc[0].dcb_dma;
                         dcb_mem[1] = DMA_TO_BUS_HI(sinfo->rx[chan].desc[0].dcb_dma >> 32);
                         dcb_mem[2] |= 1 << 18;
@@ -2154,12 +2479,12 @@ bkn_dump_pkt(uint8_t *data, int size, int txrx)
         sprintf(&str[strlen(str)], "%02x ", data[idx]);
         if ((idx & 0xf) == 0xf) {
             sprintf(&str[strlen(str)], "\n");
-            gprintk(str);
+            gprintk("%s", str);
         }
     }
     if ((idx & 0xf) != 0) {
         sprintf(&str[strlen(str)], "\n");
-        gprintk(str);
+        gprintk("%s", str);
     }
 }
 
@@ -2277,12 +2602,12 @@ bkn_api_rx_copy_from_skb(bkn_switch_info_t *sinfo,
         return -1;
     }
     dcb = &dcb_chain->dcb_mem[dcb_chain->dcb_cur * sinfo->dcb_wsize];
-    if ((sinfo->cmic_type == 'x' && (dcb[2] & 0xffff) < pktlen) ||
-        (sinfo->cmic_type != 'x' && (dcb[1] & 0xffff) < pktlen)) {
+    if ((((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) && (dcb[2] & 0xffff) < pktlen) ||
+        (((sinfo->cmic_type != 'x') && (sinfo->cmic_type != 'r')) && (dcb[1] & 0xffff) < pktlen)) {
         DBG_WARN(("Rx API buffer too small\n"));
         return -1;
     }
-    if (sinfo->cmic_type == 'x') {
+    if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) {
         pkt_dma = BUS_TO_DMA_HI(dcb[1]);
         pkt_dma = pkt_dma << 32 | dcb[0];
     } else {
@@ -2308,7 +2633,7 @@ bkn_api_rx_copy_from_skb(bkn_switch_info_t *sinfo,
     memcpy(pkt, skb_pkt, pktlen);
 
     /* Copy packet metadata and mark as done */
-    if (sinfo->cmic_type != 'x') {
+    if ((sinfo->cmic_type != 'x') && (sinfo->cmic_type != 'r')) {
         for (i = SOC_DCB_META_OFFSET; i < sinfo->dcb_wsize; i++) {
             dcb[i] = desc->dcb_mem[i];
         }
@@ -2320,8 +2645,8 @@ bkn_api_rx_copy_from_skb(bkn_switch_info_t *sinfo,
 
     if (CDMA_CH(sinfo, XGS_DMA_RX_CHAN + chan)) {
         dcb = &dcb_chain->dcb_mem[dcb_chain->dcb_cur * sinfo->dcb_wsize];
-        if ((sinfo->cmic_type == 'x' && dcb[2] & (1 << 18)) ||
-            (sinfo->cmic_type != 'x' && dcb[1] & (1 << 18))) {
+        if ((((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) && dcb[2] & (1 << 18)) ||
+            (((sinfo->cmic_type != 'x') && (sinfo->cmic_type != 'r')) && dcb[1] & (1 << 18))) {
             /* Get the next chain if reload done */
             dcb[sinfo->dcb_wsize-1] |= 1 << 31 | SOC_DCB_KNET_DONE;
             MEMORY_BARRIER;
@@ -2332,8 +2657,8 @@ bkn_api_rx_copy_from_skb(bkn_switch_info_t *sinfo,
             }
         }
     } else {
-        if ((sinfo->cmic_type == 'x' && (dcb[2] & (1 << 16)) == 0) ||
-            (sinfo->cmic_type != 'x' && (dcb[1] & (1 << 16)) == 0)) {
+        if ((((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) && (dcb[2] & (1 << 16)) == 0) ||
+            (((sinfo->cmic_type != 'x') && (sinfo->cmic_type != 'r')) && (dcb[1] & (1 << 16)) == 0)) {
             bkn_api_rx_chain_done(sinfo, chan);
         }
     }
@@ -2353,8 +2678,8 @@ bkn_rx_refill(bkn_switch_info_t *sinfo, int chan)
     struct sk_buff *skb;
     bkn_desc_info_t *desc;
     uint32_t *dcb;
-    uint32_t resv_size = sinfo->cmic_type == 'x' ? RCPU_HDR_SIZE : RCPU_RX_ENCAP_SIZE;
-    uint32_t meta_size = sinfo->cmic_type == 'x' ? RCPU_RX_META_SIZE : 0;
+    uint32_t resv_size = ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) ? RCPU_HDR_SIZE : RCPU_RX_ENCAP_SIZE;
+    uint32_t meta_size = ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) ? RCPU_RX_META_SIZE : 0;
     int prev;
 
     if (sinfo->rx[chan].use_rx_skb == 0) {
@@ -2414,7 +2739,7 @@ bkn_rx_refill(bkn_switch_info_t *sinfo, int chan)
         dcb = desc->dcb_mem;
         dcb[0] = desc->skb_dma;
         if (CDMA_CH(sinfo, XGS_DMA_RX_CHAN + chan)) {
-            if (sinfo->cmic_type == 'x') {
+            if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) {
                 dcb[2] |= 1 << 24 | 1 << 16;
             } else {
                 dcb[1] |= 1 << 24 | 1 << 16;
@@ -2422,14 +2747,14 @@ bkn_rx_refill(bkn_switch_info_t *sinfo, int chan)
         } else {
             prev = PREV_IDX(sinfo->rx[chan].cur, MAX_RX_DCBS);
             if (prev < (MAX_RX_DCBS - 1)) {
-                if (sinfo->cmic_type == 'x') {
+                if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) {
                     sinfo->rx[chan].desc[prev].dcb_mem[2] |= 1 << 16;
                 } else {
                     sinfo->rx[chan].desc[prev].dcb_mem[1] |= 1 << 16;
                 }
             }
         }
-        if (sinfo->cmic_type == 'x') {
+        if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) {
             dcb[1] = DMA_TO_BUS_HI(desc->skb_dma >> 32);
             dcb[2] |= rx_buffer_size + meta_size;
         } else {
@@ -2639,6 +2964,7 @@ bkn_match_rx_pkt(bkn_switch_info_t *sinfo, uint8_t *pkt, int pktlen,
     uint8_t *oob = (uint8_t *)meta;
     int size, wsize;
     int idx, match;
+    knet_filter_cb_f filter_cb;
 
     list_for_each(list, &sinfo->rxpf_list) {
         filter = (bkn_filter_t *)list;
@@ -2704,11 +3030,12 @@ bkn_match_rx_pkt(bkn_switch_info_t *sinfo, uint8_t *pkt, int pktlen,
         if (match) {
             if (kf->dest_type == KCOM_DEST_T_CB) {
                 /* Check for custom filters */
-                if (knet_filter_cb != NULL && cbf != NULL) {
+                filter_cb = filter->cb ? filter->cb : knet_filter_cb;
+                if (filter_cb != NULL && cbf != NULL) {
                     memset(cbf, 0, sizeof(*cbf));
                     memcpy(&cbf->kf, kf, sizeof(cbf->kf));
-                    if (knet_filter_cb(pkt, pktlen, sinfo->dev_no,
-                                       meta, chan, &cbf->kf)) {
+                    if (filter_cb(pkt, pktlen, sinfo->dev_no,
+                                  meta, chan, &cbf->kf)) {
                         filter->hits++;
                         return cbf;
                     }
@@ -2791,7 +3118,7 @@ bkn_add_rcpu_encap(bkn_switch_info_t *sinfo, struct sk_buff *skb, void *meta, in
         psize = RCPU_HDR_SIZE + len;
         skb_push(skb, psize);
         memset(skb->data, 0, psize);
-    } else if (sinfo->cmic_type == 'x') {
+    } else if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) {
         psize = RCPU_HDR_SIZE + sinfo->pkt_hdr_size;
         skb_push(skb, psize);
         memset(skb->data, 0, RCPU_HDR_SIZE);
@@ -2833,8 +3160,8 @@ bkn_add_rcpu_encap(bkn_switch_info_t *sinfo, struct sk_buff *skb, void *meta, in
         len = len > RCPU_RX_META_SIZE_MAX ? RCPU_RX_META_SIZE_MAX : len;
         memcpy(&skb->data[RCPU_HDR_SIZE], (uint8_t *)meta, len);
     } else {
-        smeta = sinfo->cmic_type == 'x' ? (uint32_t *)meta : (uint32_t *)meta + 2;
-        wsize = sinfo->cmic_type == 'x' ? sinfo->pkt_hdr_size / 4 : sinfo->dcb_wsize - 3;
+        smeta = ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) ? (uint32_t *)meta : (uint32_t *)meta + 2;
+        wsize = ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) ? sinfo->pkt_hdr_size / 4 : sinfo->dcb_wsize - 3;
         for (idx = 0; idx < wsize; idx++) {
             dmeta[idx] = htonl(smeta[idx]);
         }
@@ -3729,8 +4056,8 @@ bkn_do_api_rx(bkn_switch_info_t *sinfo, int chan, int budget)
             if (dcbs_done >= budget) {
                 break;
             }
-            if ((sinfo->cmic_type == 'x' && dcb[2] & (1 << 18)) ||
-                (sinfo->cmic_type != 'x' && dcb[1] & (1 << 18))) {
+            if (((sinfo->cmic_type == 'x' || sinfo->cmic_type == 'r') && dcb[2] & (1 << 18)) ||
+                ((sinfo->cmic_type != 'x' && sinfo->cmic_type != 'r') && dcb[1] & (1 << 18))) {
                 dcb[sinfo->dcb_wsize-1] |= SOC_DCB_KNET_DONE;
                 bkn_api_rx_chain_done(sinfo, chan);
                 dcb_chain = sinfo->rx[chan].api_dcb_chain;
@@ -3740,12 +4067,12 @@ bkn_do_api_rx(bkn_switch_info_t *sinfo, int chan, int budget)
                 continue;
             }
         }
-        if ((sinfo->cmic_type == 'x' && (dcb[2] & (1 << 16)) == 0) ||
-            (sinfo->cmic_type != 'x' && (dcb[1] & (1 << 16)) == 0)) {
+        if (((sinfo->cmic_type == 'x' || sinfo->cmic_type == 'r') && (dcb[2] & (1 << 16)) == 0) ||
+            ((sinfo->cmic_type != 'x' && sinfo->cmic_type != 'r') && (dcb[1] & (1 << 16)) == 0)) {
             sinfo->rx[chan].chain_complete = 1;
         }
         sinfo->rx[chan].pkts++;
-        if (sinfo->cmic_type == 'x') {
+        if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) {
             pkt_dma = BUS_TO_DMA_HI(dcb[1]);
             pkt_dma = pkt_dma << 32 | dcb[0];
         } else {
@@ -3764,7 +4091,7 @@ bkn_do_api_rx(bkn_switch_info_t *sinfo, int chan, int budget)
             bkn_packet_header_parse(sinfo, pkt, (uint32_t)pktlen, &packet_info);
             pkt_hdr_size = packet_info.system_header_size;
         } else {
-            if (sinfo->cmic_type == 'x') {
+            if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) {
                 meta = (uint32_t *)pkt;
                 err_woff = sinfo->pkt_hdr_size / sizeof(uint32_t) - 1;
                 meta[err_woff] = dcb[sinfo->dcb_wsize-1];
@@ -4150,8 +4477,8 @@ bkn_do_skb_rx(bkn_switch_info_t *sinfo, int chan, int budget)
         if ((dcb[sinfo->dcb_wsize-1] & (1 << 31)) == 0) {
             break;
         }
-        if ((sinfo->cmic_type == 'x' && (dcb[2] & (1 << 16)) == 0) ||
-            (sinfo->cmic_type != 'x' && (dcb[1] & (1 << 16)) == 0)) {
+        if ((((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) && (dcb[2] & (1 << 16)) == 0) ||
+            (((sinfo->cmic_type != 'x') && (sinfo->cmic_type != 'r')) && (dcb[1] & (1 << 16)) == 0)) {
             sinfo->rx[chan].chain_complete = 1;
             /* Request one extra poll to check for chain done interrupt */
             if (sinfo->napi_poll_mode) {
@@ -4201,7 +4528,7 @@ bkn_do_skb_rx(bkn_switch_info_t *sinfo, int chan, int budget)
             }
 
         } else {
-            if (sinfo->cmic_type == 'x') {
+            if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) {
                 meta = (uint32_t *)skb->data;
                 err_woff = sinfo->pkt_hdr_size / sizeof(uint32_t) - 1;
                 meta[err_woff] = dcb[sinfo->dcb_wsize-1];
@@ -4377,7 +4704,7 @@ bkn_do_skb_rx(bkn_switch_info_t *sinfo, int chan, int budget)
                                     for (idx = pkt_hdr_size; idx >= 4; idx--) {
                                         pkt[idx] = pkt[idx - 4];
                                     }
-                                } else if (sinfo->cmic_type == 'x') {
+                                } else if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) {
                                     for (idx = pkt_hdr_size / sizeof(uint32_t);
                                          idx; idx--) {
                                         meta[idx] = meta[idx - 1];
@@ -4568,7 +4895,7 @@ bkn_rx_debug_dump(bkn_switch_info_t *sinfo, int chan)
                 (unsigned long)sinfo->rx[chan].desc[0].dcb_dma);
         for (cnt = 0; cnt < MAX_RX_DCBS; cnt++) {
             dcb = sinfo->rx[chan].desc[cnt].dcb_mem;
-            if (sinfo->cmic_type == 'x') {
+            if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) {
                 gprintk("  DCB %2d: 0x%08x 0x%08x 0x%08x 0x%08x\n", cnt,
                         dcb[0], dcb[1], dcb[2], dcb[sinfo->dcb_wsize-1]);
             } else {
@@ -4583,7 +4910,7 @@ bkn_rx_debug_dump(bkn_switch_info_t *sinfo, int chan)
             gprintk("  [0x%08lx]--->\n", (unsigned long)dcb_chain->dcb_dma);
             for (cnt = 0; cnt < dcb_chain->dcb_cnt; cnt++) {
                 dcb = &dcb_chain->dcb_mem[sinfo->dcb_wsize * cnt];
-                if (sinfo->cmic_type == 'x') {
+                if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) {
                     gprintk("  DCB %2d: 0x%08x 0x%08x 0x%08x 0x%08x\n", cnt,
                             dcb[0], dcb[1], dcb[2], dcb[sinfo->dcb_wsize-1]);
                 } else {
@@ -4714,7 +5041,9 @@ bkn_suspend_tx(bkn_switch_info_t *sinfo)
     /* Stop associated virtual devices */
     list_for_each(list, &sinfo->ndev_list) {
         priv = (bkn_priv_t *)list;
-        netif_stop_queue(priv->dev);
+        if (priv->dev) {
+            netif_stop_queue(priv->dev);
+        }
     }
 }
 
@@ -4731,8 +5060,10 @@ bkn_resume_tx(bkn_switch_info_t *sinfo)
     /* Check associated virtual devices */
     list_for_each(list, &sinfo->ndev_list) {
         priv = (bkn_priv_t *)list;
-        if (netif_queue_stopped(priv->dev) && sinfo->tx.free > 1) {
-            netif_wake_queue(priv->dev);
+        if (priv->dev) {
+            if (netif_queue_stopped(priv->dev) && sinfo->tx.free > 1) {
+                netif_wake_queue(priv->dev);
+            }
         }
     }
 }
@@ -4752,7 +5083,7 @@ bkn_hw_tstamp_tx_set(bkn_switch_info_t *sinfo, struct sk_buff *skb)
     int hwts;
     int port;
     uint64_t ts = 0;
-    uint32_t hdrlen = sinfo->cmic_type == 'x' ? PKT_TX_HDR_SIZE : 0;
+    uint32_t hdrlen = ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) ? PKT_TX_HDR_SIZE : 0;
     struct skb_shared_hwtstamps shhwtstamps;
 
     if (!knet_hw_tstamp_tx_time_get_cb) {
@@ -4918,7 +5249,7 @@ bkn_tx_cdma_chain_switch(bkn_switch_info_t *sinfo)
         dcb_mem = sinfo->tx.desc[sinfo->tx.cur].dcb_mem;
         memset(dcb_mem, 0, sinfo->dcb_wsize * sizeof(uint32_t));
         dcb_mem[0] = dcb_chain->dcb_dma;
-        if (sinfo->cmic_type == 'x') {
+        if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) {
             dcb_mem[1] = DMA_TO_BUS_HI(dcb_chain->dcb_dma >> 32);
             dcb_mem[2] |= 1 << 24 | 1 << 18 | 1 << 16;
         } else {
@@ -4938,7 +5269,7 @@ bkn_tx_cdma_chain_switch(bkn_switch_info_t *sinfo)
         woffset = (dcb_chain->dcb_cnt - 1) * sinfo->dcb_wsize;
         dcb_mem = &dcb_chain->dcb_mem[woffset];
         dcb_mem[0] = sinfo->tx.desc[sinfo->tx.dirty].dcb_dma;
-        if (sinfo->cmic_type == 'x') {
+        if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) {
             dcb_mem[1] = DMA_TO_BUS_HI(sinfo->tx.desc[sinfo->tx.dirty].dcb_dma >> 32);
         }
         dcb_dma = sinfo->tx.desc[sinfo->tx.cur].dcb_dma;
@@ -4978,14 +5309,14 @@ bkn_api_tx(bkn_switch_info_t *sinfo)
             if (CDMA_CH(sinfo, XGS_DMA_TX_CHAN) && i == dcb_chain->dcb_cnt - 1) {
                 break;
             }
-            if (sinfo->cmic_type == 'x') {
+            if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) {
                 pkt_dma = BUS_TO_DMA_HI(dcb_chain->dcb_mem[sinfo->dcb_wsize * i + 1]);
                 pkt_dma = pkt_dma << 32 | dcb_chain->dcb_mem[sinfo->dcb_wsize * i];
             } else {
                 pkt_dma = dcb_chain->dcb_mem[sinfo->dcb_wsize * i];
             }
             pktdata = kernel_bde->p2l(sinfo->dev_no, pkt_dma);
-            if (sinfo->cmic_type == 'x') {
+            if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) {
                 pktlen = dcb_chain->dcb_mem[sinfo->dcb_wsize * i + 2] & 0xffff;
             } else {
                 pktlen = dcb_chain->dcb_mem[sinfo->dcb_wsize * i + 1] & 0xffff;
@@ -5117,7 +5448,7 @@ bkn_tx_chain_done(bkn_switch_info_t *sinfo, int done)
         pending = MAX_TX_DCBS - sinfo->tx.free;
         idx = sinfo->tx.dirty;
         while (--pending && idx < (MAX_TX_DCBS - 1)) {
-            if (sinfo->cmic_type == 'x') {
+            if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) {
                 sinfo->tx.desc[idx++].dcb_mem[2] |= 1 << 16;
             } else {
                 sinfo->tx.desc[idx++].dcb_mem[1] |= 1 << 16;
@@ -5333,6 +5664,7 @@ xgsx_do_dma(bkn_switch_info_t *sinfo, int budget)
 
     dev_read32(sinfo, CMICX_IRQ_STATr, &irq_stat);
     dev_read32(sinfo, CMICX_DMA_STATr + 0x80 * XGS_DMA_TX_CHAN, &tx_dma_stat);
+
     for (chan = 0; chan < sinfo->rx_chans; chan++) {
         if (UNET_CH(sinfo, XGS_DMA_RX_CHAN + chan)) {
             unet_chans++;
@@ -5408,54 +5740,139 @@ xgsx_do_dma(bkn_switch_info_t *sinfo, int budget)
 }
 
 static int
-dev_do_dma(bkn_switch_info_t *sinfo, int budget)
-{
-    if (DEV_IS_CMICX(sinfo)) {
-        return xgsx_do_dma(sinfo, budget);
-    } else if (DEV_IS_CMICM(sinfo)) {
-        return xgsm_do_dma(sinfo, budget);
-    } else {
-        return xgs_do_dma(sinfo, budget);
-    }
-}
-
-static void
-xgs_isr(bkn_switch_info_t *sinfo)
+xgsr_do_dma(bkn_switch_info_t *sinfo, int budget)
 {
-    uint32_t irq_stat = 0;
-    int rx_dcbs_done;
+    int rx_dcbs_done = 0, tx_dcbs_done = 0;
+    int chan_done, budget_chans = 0;
+    uint32_t tx_dma_stat = 0;
+    uint32_t rx_dma_stat[NUM_CMICR_RX_CHAN] = {0};
+    int chan;
+    int unet_chans = 0;
 
-    dev_read32(sinfo, CMIC_IRQ_STATr, &irq_stat);
-    if ((irq_stat & sinfo->irq_mask) == 0) {
-        /* Not ours */
-        return;
+    dev_read32(sinfo, CMICR_INTR_STATr + 0x80 * XGS_DMA_TX_CHAN, &tx_dma_stat);
+    for (chan = 0; chan < sinfo->rx_chans; chan++) {
+        if (UNET_CH(sinfo, XGS_DMA_RX_CHAN + chan)) {
+            unet_chans++;
+            continue;
+        }
+        dev_read32(sinfo,
+                   CMICR_INTR_STATr + 0x80 * (XGS_DMA_RX_CHAN + chan),
+                   &rx_dma_stat[chan]);
     }
-    sinfo->interrupts++;
-
-    DBG_IRQ(("Got interrupt on device %d (0x%08x)\n",
-             sinfo->dev_no, irq_stat));
 
-    if (use_napi) {
-        bkn_schedule_napi_poll(sinfo);
-    } else {
-        xgs_irq_mask_set(sinfo, 0);
-        do {
-            rx_dcbs_done = xgs_do_dma(sinfo, MAX_RX_DCBS);
-        } while (rx_dcbs_done);
+    for (chan = 0; chan < sinfo->rx_chans; chan++) {
+        if (UNET_CH(sinfo, XGS_DMA_RX_CHAN + chan)) {
+            continue;
+        }
+        if (rx_dma_stat[chan] & CMICR_DS_DESC_CONTROLLED_INTR) {
+            xgsr_dma_desc_clear(sinfo, XGS_DMA_RX_CHAN + chan);
+            sinfo->poll_channels |= 1 << chan;
+        }
     }
-
-    xgs_irq_mask_set(sinfo, sinfo->irq_mask);
-}
-
-static void
-xgsm_isr(bkn_switch_info_t *sinfo)
-{
-    uint32_t irq_stat = 0;
-    int rx_dcbs_done;
-
-    dev_read32(sinfo, CMICM_IRQ_STATr, &irq_stat);
-    if ((irq_stat & sinfo->irq_mask) == 0) {
-        /* Not ours */
+    if (!sinfo->poll_channels) {
+        sinfo->poll_channels = (uint32_t)(1 << sinfo->rx_chans) - 1;
+        sinfo->poll_channels &= ~(sinfo->unet_channels >> 1);
+        if (sinfo->rx_chans > unet_chans) {
+            budget_chans = budget / (sinfo->rx_chans - unet_chans);
+        }
+    } else {
+        for (chan = 0; chan < sinfo->rx_chans; chan++) {
+            if (1 << chan & sinfo->poll_channels) {
+                budget_chans++;
+            }
+        }
+        if (budget_chans) {
+            budget_chans = budget / budget_chans;
+        }
+    }
+
+    for (chan = 0; chan < sinfo->rx_chans; chan++) {
+        if (1 << chan & sinfo->poll_channels) {
+            chan_done = bkn_do_rx(sinfo, chan, budget_chans);
+            rx_dcbs_done += chan_done;
+            if (chan_done < budget_chans) {
+                sinfo->poll_channels &= ~(1 << chan);
+            }
+            bkn_rx_desc_done(sinfo, chan);
+        }
+
+        if (CDMA_CH(sinfo, XGS_DMA_RX_CHAN + chan)) {
+            continue;
+        }
+
+        if (rx_dma_stat[chan] & CMICR_DS_CMC_DMA_CHAIN_DONE) {
+            if (UNET_CH(sinfo, XGS_DMA_RX_CHAN + chan)) {
+                continue;
+            }
+            xgsx_dma_chain_clear(sinfo, XGS_DMA_RX_CHAN + chan);
+            bkn_rx_chain_done(sinfo, chan);
+        }
+    }
+
+    if (tx_dma_stat & CMICR_DS_DESC_CONTROLLED_INTR) {
+        if (CDMA_CH(sinfo, XGS_DMA_TX_CHAN)) {
+            xgsr_dma_desc_clear(sinfo, XGS_DMA_TX_CHAN);
+        } else {
+            xgsr_dma_chain_clear(sinfo, XGS_DMA_TX_CHAN);
+        }
+        tx_dcbs_done = bkn_do_tx(sinfo);
+        bkn_tx_chain_done(sinfo, tx_dcbs_done);
+    }
+
+    return sinfo->poll_channels ? budget : rx_dcbs_done;
+}
+
+static int
+dev_do_dma(bkn_switch_info_t *sinfo, int budget)
+{
+    if (DEV_IS_CMICR(sinfo)) {
+        return xgsr_do_dma(sinfo, budget);
+    } else if (DEV_IS_CMICX(sinfo)) {
+        return xgsx_do_dma(sinfo, budget);
+    } else if (DEV_IS_CMICM(sinfo)) {
+        return xgsm_do_dma(sinfo, budget);
+    } else {
+        return xgs_do_dma(sinfo, budget);
+    }
+}
+
+static void
+xgs_isr(bkn_switch_info_t *sinfo)
+{
+    uint32_t irq_stat = 0;
+    int rx_dcbs_done;
+
+    dev_read32(sinfo, CMIC_IRQ_STATr, &irq_stat);
+    if ((irq_stat & sinfo->irq_mask) == 0) {
+        /* Not ours */
+        return;
+    }
+    sinfo->interrupts++;
+
+    DBG_IRQ(("Got interrupt on device %d (0x%08x)\n",
+             sinfo->dev_no, irq_stat));
+
+    if (use_napi) {
+        bkn_schedule_napi_poll(sinfo);
+    } else {
+        xgs_irq_mask_set(sinfo, 0);
+        do {
+            rx_dcbs_done = xgs_do_dma(sinfo, MAX_RX_DCBS);
+        } while (rx_dcbs_done);
+    }
+
+    xgs_irq_mask_set(sinfo, sinfo->irq_mask);
+}
+
+static void
+xgsm_isr(bkn_switch_info_t *sinfo)
+{
+    uint32_t irq_stat = 0;
+    int rx_dcbs_done;
+
+    dev_read32(sinfo, CMICM_IRQ_STATr, &irq_stat);
+    if ((irq_stat & sinfo->irq_mask) == 0) {
+        /* Not ours */
         return;
     }
     sinfo->interrupts++;
@@ -5497,7 +5914,7 @@ xgsx_isr(bkn_switch_info_t *sinfo)
     if (device_is_dnx(sinfo)) {
         uint32_t ctrl = 0;
         int chan = 0;
-        for (chan = 0; chan < NUM_DMA_CHAN; chan++) {
+        for (chan = 0; chan < NUM_CMICX_DMA_CHAN; chan++) {
             if (irq_stat & CMICX_DS_CMC_CHAIN_DONE(chan)) {
                 dev_read32(sinfo, CMICX_DMA_CTRLr + 0x80 * chan, &ctrl);
                 if (ctrl & CMICX_DC_CMC_ABORT) {
@@ -5531,6 +5948,59 @@ xgsx_isr(bkn_switch_info_t *sinfo)
     xgsx_irq_mask_set(sinfo, sinfo->irq_mask);
 }
 
+static void
+xgsr_isr(bkn_switch_info_t *sinfo)
+{
+    uint32_t irq_stat = 0;
+    int rx_dcbs_done;
+
+    lkbde_irq_status_get(sinfo->dev_no | LKBDE_IPROC_REG, PAXB_0_INTC_INTR_RAW_STATUS_REG5r, &irq_stat);
+
+    if ((irq_stat & sinfo->irq_mask) == 0) {
+        /* Not ours */
+        return;
+    }
+
+    /* Bypass chain_done from Abort */
+    if (device_is_dnx(sinfo)) {
+        uint32_t ctrl = 0;
+        uint32_t intr_stat = 0;
+        int chan = 0;
+        for (chan = 0; chan < NUM_CMICR_DMA_CHAN; chan++) {
+            dev_read32(sinfo, CMICR_INTR_STATr + 0x80 * chan, &intr_stat);
+            if (intr_stat & CMICR_DS_CHAIN_DONE_INTR) {
+                dev_read32(sinfo, CMICR_DMA_CTRLr + 0x80 * chan, &ctrl);
+                if (ctrl & CMICR_DC_CMC_ABORT) {
+                    DBG_IRQ(("chain %d: chain done for Abort\n", chan));
+                    return;
+                }
+            }
+        }
+    }
+
+    sinfo->interrupts++;
+
+    DBG_IRQ(("Got interrupt on device %d (0x%08x)\n",
+             sinfo->dev_no, irq_stat));
+
+    if (use_napi) {
+        bkn_schedule_napi_poll(sinfo);
+    } else {
+        xgsr_irq_mask_set(sinfo, 0);
+        do {
+            rx_dcbs_done = xgsr_do_dma(sinfo, MAX_RX_DCBS);
+            if (sinfo->cdma_channels) {
+                if (rx_dcbs_done >= MAX_RX_DCBS || sinfo->tx_yield) {
+                    /* Continuous DMA mode requires to yield timely */
+                    break;
+                }
+            }
+        } while (rx_dcbs_done);
+    }
+
+    xgsr_irq_mask_set(sinfo, sinfo->irq_mask);
+}
+
 static void
 bkn_isr(void *isr_data)
 {
@@ -5555,7 +6025,9 @@ bkn_isr(void *isr_data)
         return;
     }
 
-    if (DEV_IS_CMICX(sinfo)) {
+    if (DEV_IS_CMICR(sinfo)) {
+        xgsr_isr(sinfo);
+    } else if (DEV_IS_CMICX(sinfo)) {
         xgsx_isr(sinfo);
     } else if (DEV_IS_CMICM(sinfo)) {
         xgsm_isr(sinfo);
@@ -5948,6 +6420,7 @@ bkn_tx(struct sk_buff *skb, struct net_device *dev)
     unsigned long flags;
     uint8_t cpu_channel = 0;
     int headroom, tailroom;
+    int ptp_transport = 0;
 
     DBG_VERB(("Netif Tx(%s): Len=%d priv->id=%d\n", dev->name, skb->len, priv->id));
 
@@ -5987,9 +6460,25 @@ bkn_tx(struct sk_buff *skb, struct net_device *dev)
             /* Account for extra OAM-TS header. */
             if ((bkn_skb_tx_flags(skb) & SKBTX_HW_TSTAMP) &&
                 (hdrlen > (BKN_DNX_PTCH_2_SIZE))) {
-                /* T_LOCAL_PORT intf will use Module Hdr + PTCH + ITMH + ASE1588 + TSH */
                 if (device_is_dnx(sinfo)) {
-                    hdrlen += (BKN_DNX_FTMH_APP_SPECIFIC_EXT_SIZE + BKN_DNX_TSH_SIZE);
+                    if (knet_hw_tstamp_ptp_transport_get_cb != NULL) {
+                        ptp_transport = knet_hw_tstamp_ptp_transport_get_cb(skb->data);
+                        switch(ptp_transport) {
+                            case 6: /* UDP IPv6   */
+                                /* T_LOCAL_PORT intf will use
+                                    Module Hdr + PTCH + ITMH + ASE1588 + TSH + INTERNAL_HDR + UDH base
+                                */
+                                hdrlen += (BKN_DNX_FTMH_APP_SPECIFIC_EXT_SIZE + BKN_DNX_TSH_SIZE +
+                                            BKN_DNX_INTERNAL_BASE_TYPE_12 + BKN_DNX_UDH_BASE_SIZE);
+                                break;
+                            case 4: /* UDP IPv4   */
+                            case 2: /* IEEE 802.3 */
+                            default:
+                                /* T_LOCAL_PORT intf will use Module Hdr + PTCH + ITMH + ASE1588 + TSH */
+                                hdrlen += (BKN_DNX_FTMH_APP_SPECIFIC_EXT_SIZE + BKN_DNX_TSH_SIZE);
+                                break;
+                        }
+                    }
                 } else {
                     hdrlen += BKN_DPP_OTSH_SIZE_BYTE;
                 }
@@ -5997,7 +6486,7 @@ bkn_tx(struct sk_buff *skb, struct net_device *dev)
 
         }
         else {
-            hdrlen = (sinfo->cmic_type == 'x' ) ? PKT_TX_HDR_SIZE : 0;
+            hdrlen = ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) ? PKT_TX_HDR_SIZE : 0;
         }
         rcpulen = 0;
         sop = 0;
@@ -6122,7 +6611,7 @@ bkn_tx(struct sk_buff *skb, struct net_device *dev)
                 }
             }
         } else {
-            if (((sinfo->cmic_type == 'x') && (priv->port >= 0))
+            if ((((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) && (priv->port >= 0))
                     || device_is_sand(sinfo)) {
                 if (skb_header_cloned(skb) || skb_headroom(skb) < hdrlen + 4) {
                     /* Current SKB cannot be modified */
@@ -6236,11 +6725,11 @@ bkn_tx(struct sk_buff *skb, struct net_device *dev)
         }
 
         dcb = desc->dcb_mem;
-        meta = (sinfo->cmic_type == 'x') ? (uint32_t *)pktdata : dcb;
+        meta = ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) ? (uint32_t *)pktdata : dcb;
         memset(dcb, 0, sinfo->dcb_wsize * sizeof(uint32_t));
         if (priv->flags & KCOM_NETIF_F_RCPU_ENCAP) {
             if (device_is_sand(sinfo)) {
-                if (sinfo->cmic_type == 'x') {
+                if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) {
                     dcb[2] |= 1 << 19;
                     /* Given Module Header exists and set first byte to be CPU channel  */
                     pktdata[0] = cpu_channel;
@@ -6252,7 +6741,7 @@ bkn_tx(struct sk_buff *skb, struct net_device *dev)
 
             } else if (sop != 0) {
                 /* If module header SOP is non-zero, use RCPU meta data */
-                if (sinfo->cmic_type == 'x') {
+                if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) {
                     dcb[2] |= 1 << 19;
                 } else {
                     metalen = (sinfo->dcb_wsize - 3) * sizeof(uint32_t);
@@ -6268,7 +6757,7 @@ bkn_tx(struct sk_buff *skb, struct net_device *dev)
             }
         } else if (priv->port >= 0) {
             /* Send to physical port */
-            if (sinfo->cmic_type == 'x') {
+            if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) {
                 dcb[2] |= 1 << 19;
             } else {
                 dcb[1] |= 1 << 19;
@@ -6276,16 +6765,28 @@ bkn_tx(struct sk_buff *skb, struct net_device *dev)
             switch (sinfo->dcb_type) {
             case 23:
             case 26:
-            case 30:
-            case 31:
-            case 34:
-            case 37:
                 dcb[2] = 0x81000000;
                 dcb[3] = priv->port;
                 dcb[3] |= (priv->qnum & 0xc00) << 20;
                 dcb[4] = 0x00040000;
                 dcb[4] |= (priv->qnum & 0x3ff) << 8;
                 break;
+            case 30:
+            case 31:
+            case 34:
+            case 37:
+            case 40:
+                if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) {
+                    meta[0] = htonl(0x81000000);
+                    meta[1] = htonl(priv->port);
+                    meta[2] = htonl(0x00040000 | (priv->qnum & 0x7) << 24);
+                } else {
+                    dcb[2] = 0x81000000;
+                    dcb[3] = priv->port;
+                    dcb[4] = 0x00040000;
+                    dcb[4] |= (priv->qnum & 0x7) << 24;
+                }
+                break;
             case 24:
                 dcb[2] = 0xff000000;
                 dcb[3] = 0x00000100;
@@ -6327,7 +6828,7 @@ bkn_tx(struct sk_buff *skb, struct net_device *dev)
                 dcb[4] |= (priv->qnum & 0x3fff) << 8;
                 break;
             case 36:
-                if (sinfo->cmic_type == 'x') {
+                if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) {
                     meta[0] = htonl(0x81000000);
                     meta[1] = htonl(priv->port);
                     meta[2] = htonl(0x00008000 | (priv->qnum & 0x3f) << 9);
@@ -6339,7 +6840,7 @@ bkn_tx(struct sk_buff *skb, struct net_device *dev)
                 }
                 break;
             case 38:
-                if (sinfo->cmic_type == 'x') {
+                if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) {
                     meta[0] = htonl(0x81000000);
                     meta[1] = htonl(priv->port);
                     meta[2] = htonl(0x00004000 | (priv->qnum & 0x3f) << 8);
@@ -6360,17 +6861,16 @@ bkn_tx(struct sk_buff *skb, struct net_device *dev)
                     memcpy(&pktdata[0], priv->system_headers, priv->system_headers_size);
                 }
                 break;
-            case 40:
-                if (sinfo->cmic_type == 'x') {
+            case 41:
+                if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) {
                     meta[0] = htonl(0x81000000);
-                    meta[1] = htonl(priv->port | (priv->qnum & 0xc00) << 20);
-                    meta[2] = htonl(0x00040000 | (priv->qnum & 0x3ff) << 8);
+                    meta[1] = htonl((priv->port) << 4);
+                    meta[2] = htonl(0x00400000 | (priv->qnum & 0x3fff) << 8);
                 } else {
                     dcb[2] = 0x81000000;
-                    dcb[3] = priv->port;
-                    dcb[3] |= (priv->qnum & 0xc00) << 20;
-                    dcb[4] = 0x00040000;
-                    dcb[4] |= (priv->qnum & 0x3ff) << 8;
+                    dcb[3] = (priv->port) << 4;
+                    dcb[4] = 0x00400000;
+                    dcb[4] |= (priv->qnum & 0x3fff) << 8;
                 }
                 break;
             default:
@@ -6412,7 +6912,7 @@ bkn_tx(struct sk_buff *skb, struct net_device *dev)
                     DBG_SKB(("Packet padded to %d bytes after tx callback\n", pktlen));
                 }
                 pktdata = skb->data;
-                if (sinfo->cmic_type == 'x') {
+                if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) {
                     meta = (uint32_t *)pktdata;
                 }
             } else {
@@ -6477,7 +6977,7 @@ bkn_tx(struct sk_buff *skb, struct net_device *dev)
             return 0;
         }
         dcb[0] = desc->skb_dma;
-        if (sinfo->cmic_type == 'x') {
+        if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) {
             dcb[1] = DMA_TO_BUS_HI(desc->skb_dma >> 32);
             dcb[2] &= ~SOC_DCB_KNET_COUNT_MASK;
             dcb[2] |= pktlen;
@@ -6493,7 +6993,7 @@ bkn_tx(struct sk_buff *skb, struct net_device *dev)
         bkn_dump_pkt(pktdata, pktlen, XGS_DMA_TX_CHAN);
 
         if (CDMA_CH(sinfo, XGS_DMA_TX_CHAN)) {
-            if (sinfo->cmic_type == 'x') {
+            if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) {
                 dcb[2] |= 1 << 24 | 1 << 16;
             } else {
                 dcb[1] |= 1 << 24 | 1 << 16;
@@ -6873,6 +7373,7 @@ bkn_get_ts_info(struct net_device *dev, struct ethtool_ts_info *info)
     case 36:
     case 38:
     case 40:
+    case 41:
     case 37:
         info->so_timestamping = SOF_TIMESTAMPING_TX_HARDWARE |
                                 SOF_TIMESTAMPING_TX_SOFTWARE |
@@ -7003,9 +7504,9 @@ bkn_init_ndev(u8 *mac, char *name)
     if (name && *name) {
         strncpy(dev->name, name, IFNAMSIZ-1);
     }
-#if defined(CONFIG_NET_NS)
+
     bkn_dev_net_set(dev, current->nsproxy->net_ns);
-#endif
+
     /* Register the kernel Ethernet device */
     if (register_netdev(dev)) {
         DBG_WARN(("Error registering Ethernet device.\n"));
@@ -7365,7 +7866,7 @@ bkn_seq_dma_show(struct seq_file *s, void *v)
                 seq_printf(s, "  [0x%08lx]--->\n", (unsigned long)dcb_chain->dcb_dma);
                 for (cnt = 0; cnt < dcb_chain->dcb_cnt; cnt++) {
                     dcb = &dcb_chain->dcb_mem[sinfo->dcb_wsize * cnt];
-                    if (sinfo->cmic_type == 'x') {
+                    if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) {
                         seq_printf(s, "  DCB %2d: 0x%08x 0x%08x 0x%08x 0x%08x\n", cnt,
                                    dcb[0], dcb[1], dcb[2], dcb[sinfo->dcb_wsize-1]);
                     } else {
@@ -7445,7 +7946,7 @@ bkn_seq_dma_show(struct seq_file *s, void *v)
                 seq_printf(s, "  [0x%08lx]--->\n", (unsigned long)dcb_chain->dcb_dma);
                 for (cnt = 0; cnt < dcb_chain->dcb_cnt; cnt++) {
                     dcb = &dcb_chain->dcb_mem[sinfo->dcb_wsize * cnt];
-                    if (sinfo->cmic_type == 'x') {
+                    if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) {
                         seq_printf(s, "  DCB %2d: 0x%08x 0x%08x 0x%08x 0x%08x\n", cnt,
                                    dcb[0], dcb[1], dcb[2], dcb[sinfo->dcb_wsize-1]);
                     } else {
@@ -7466,7 +7967,7 @@ bkn_seq_dma_show(struct seq_file *s, void *v)
         }
     }
     if (dcb) {
-        if (sinfo->cmic_type == 'x') {
+        if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) {
             seq_printf(s, "  DCB %2d: 0x%08x 0x%08x 0x%08x 0x%08x\n", iter->idx,
                        dcb[0], dcb[1], dcb[2], dcb[sinfo->dcb_wsize-1]);
         } else {
@@ -7615,7 +8116,7 @@ bkn_proc_debug_show(struct seq_file *m, void *v)
                       sinfo->oamp_ports[1],
                       sinfo->oamp_ports[2],
                       sinfo->oamp_ports[3]);
-        seq_printf(m, "  device_id:      0x%x\n", sinfo->device_id);
+        seq_printf(m, "  device_id:      0x%x\n", sinfo->base_id);
         seq_printf(m, "  pcie_status:    %d\n", sinfo->pcie_link_status);
         unit++;
     }
@@ -8165,7 +8666,7 @@ bkn_knet_dma_info(kcom_msg_dma_info_t *kmsg, int len)
         /* Handle for Continuous DMA mode */
         if (CDMA_CH(sinfo, XGS_DMA_TX_CHAN)) {
             woffset = (dcb_chain->dcb_cnt - 1) * sinfo->dcb_wsize + 1;
-            if (sinfo->cmic_type == 'x') {
+            if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) {
                 woffset += 1;
             }
             if ((dcb_chain->dcb_mem[woffset] & ((1 << 18) | (1 << 16))) != 0x50000) {
@@ -8181,7 +8682,7 @@ bkn_knet_dma_info(kcom_msg_dma_info_t *kmsg, int len)
                 /* Stitch this chain */
                 woffset = (dcb_chain_end->dcb_cnt - 1) * sinfo->dcb_wsize;
                 dcb_chain_end->dcb_mem[woffset] = dcb_chain->dcb_dma;
-                if (sinfo->cmic_type == 'x') {
+                if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) {
                     dcb_chain_end->dcb_mem[woffset + 1] = DMA_TO_BUS_HI(dcb_chain->dcb_dma >> 32);
                 }
                 MEMORY_BARRIER;
@@ -8220,7 +8721,7 @@ bkn_knet_dma_info(kcom_msg_dma_info_t *kmsg, int len)
         /* Handle for Continuous DMA mode */
         if (CDMA_CH(sinfo, XGS_DMA_RX_CHAN + chan)) {
             woffset = (dcb_chain->dcb_cnt - 1) * sinfo->dcb_wsize + 1;
-            if (sinfo->cmic_type == 'x') {
+            if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) {
                 woffset += 1;
             }
             if ((dcb_chain->dcb_mem[woffset] & ((1 << 18) | (1 << 16))) != 0x50000) {
@@ -8236,7 +8737,7 @@ bkn_knet_dma_info(kcom_msg_dma_info_t *kmsg, int len)
                 /* Stitch this chain */
                 woffset = (dcb_chain_end->dcb_cnt - 1) * sinfo->dcb_wsize;
                 dcb_chain_end->dcb_mem[woffset] = dcb_chain->dcb_dma;
-                if (sinfo->cmic_type == 'x') {
+                if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) {
                     dcb_chain_end->dcb_mem[woffset + 1] = DMA_TO_BUS_HI(dcb_chain->dcb_dma >> 32);
                 }
                 MEMORY_BARRIER;
@@ -8284,7 +8785,10 @@ bkn_create_inst(uint32 inst_id)
         if ((_bkn_multi_inst == 0) || (evt->inst_id == INVALID_INSTANCE_ID)) {
             _bkn_multi_inst ++;
             evt_idx = i;
-            init_waitqueue_head(&evt->evt_wq);
+            /* avoid repeated initialization */
+            if (!waitqueue_active(&evt->evt_wq)) {
+                init_waitqueue_head(&evt->evt_wq);
+            }
             evt->inst_id = inst_id;
             DBG_INST(("%s evt_idx %d inst_id 0x%x\n",__FUNCTION__, i, inst_id));
             break;
@@ -8478,8 +8982,9 @@ bkn_knet_hw_init(kcom_msg_hw_init_t *kmsg, int len)
         return sizeof(kcom_msg_hdr_t);
     }
 
-    if ((kmsg->cmic_type == 'x' && kmsg->dcb_size < CMICX_DCB_SIZE_MIN) ||
-        (kmsg->cmic_type != 'x' && kmsg->dcb_size < DCB_SIZE_MIN) ||
+    if ((kmsg->cmic_type == 'r' && kmsg->dcb_size < CMICR_DCB_SIZE_MIN) ||
+        (kmsg->cmic_type == 'x' && kmsg->dcb_size < CMICX_DCB_SIZE_MIN) ||
+        ((kmsg->cmic_type != 'x' && kmsg->cmic_type != 'r') && kmsg->dcb_size < DCB_SIZE_MIN) ||
         (kmsg->dcb_type != 39 && kmsg->cmic_type == 'x' && kmsg->pkt_hdr_size < CMICX_PKT_HDR_SIZE_MIN)) {
         kmsg->hdr.status = KCOM_E_PARAM;
         return sizeof(kcom_msg_hdr_t);
@@ -8492,7 +8997,7 @@ bkn_knet_hw_init(kcom_msg_hw_init_t *kmsg, int len)
     sinfo->dcb_wsize = BYTES2WORDS(kmsg->dcb_size);
     sinfo->pkt_hdr_size = kmsg->pkt_hdr_size;
     sinfo->dma_hi = kmsg->dma_hi;
-    sinfo->rx_chans = sinfo->cmic_type == 'x' ? NUM_CMICX_RX_CHAN : NUM_CMICM_RX_CHAN;
+    sinfo->rx_chans = sinfo->cmic_type == 'r' ? NUM_CMICR_RX_CHAN : (sinfo->cmic_type == 'x' ? NUM_CMICX_RX_CHAN : NUM_CMICM_RX_CHAN);
     if (sinfo->rx_chans > NUM_RX_CHAN) {
         sinfo->rx_chans = NUM_RX_CHAN;
     }
@@ -8510,8 +9015,8 @@ bkn_knet_hw_init(kcom_msg_hw_init_t *kmsg, int len)
 
     /* Ensure 32-bit PCI DMA is mapped properly on 64-bit platforms */
     dev_type = kernel_bde->get_dev_type(sinfo->dev_no);
-    if (dev_type & BDE_PCI_DEV_TYPE && sinfo->cmic_type != 'x') {
-        if (dma_set_mask_and_coherent(&sinfo->pdev->dev, 0xffffffff)) {
+    if (dev_type & BDE_PCI_DEV_TYPE && (sinfo->cmic_type != 'x' && sinfo->cmic_type != 'r')) {
+        if (dma_set_mask(&sinfo->pdev->dev, DMA_BIT_MASK(32))) {
             cfg_api_unlock(sinfo, &flags);
             gprintk("No suitable DMA available for SKBs\n");
             kmsg->hdr.status = KCOM_E_RESOURCE;
@@ -8672,6 +9177,25 @@ bkn_knet_reprobe(kcom_msg_reprobe_t *kmsg, int len)
     return sizeof(kcom_msg_reprobe_t);
 }
 
+static void
+bkn_knet_netif_from_priv(kcom_netif_t *netif, bkn_priv_t *priv)
+{
+    memcpy(netif->macaddr, priv->dev->dev_addr, 6);
+    memcpy(netif->name, priv->dev->name, KCOM_NETIF_NAME_MAX - 1);
+    netif->vlan = priv->vlan;
+    netif->type = priv->type;
+    netif->id = priv->id;
+    netif->flags = priv->flags;
+    netif->cb_user_data = priv->cb_user_data;
+
+    if (priv->port < 0) {
+        netif->port = 0;
+    } else {
+        netif->port = priv->port;
+    }
+    netif->qnum = priv->qnum;
+}
+
 static int
 bkn_knet_netif_create(kcom_msg_netif_create_t *kmsg, int len)
 {
@@ -8680,8 +9204,12 @@ bkn_knet_netif_create(kcom_msg_netif_create_t *kmsg, int len)
     struct list_head *list;
     bkn_priv_t *priv, *lpriv;
     unsigned long flags;
-    int found, id;
+    int found;
     uint8_t *ma;
+    uint16_t id;
+    int realloc;
+    int rv = KCOM_E_NONE;
+    bkn_netif_cb_t *netif_create_cb;
 
     kmsg->hdr.type = KCOM_MSG_TYPE_RSP;
 
@@ -8754,42 +9282,52 @@ bkn_knet_netif_create(kcom_msg_netif_create_t *kmsg, int len)
         DBG_RCPU(("RCPU auto-enabled\n"));
     }
 
+    id = kmsg->netif.id;
     /* Prevent (incorrect) compiler warning */
     lpriv = NULL;
+    realloc = 0;
 
     spin_lock_irqsave(&sinfo->lock, flags);
 
-    /*
-     * We insert network interfaces sorted by ID.
-     * In case an interface is destroyed, we reuse the ID
-     * the next time an interface is created.
-     */
-    found = 0;
-    id = 1;
-    list_for_each(list, &sinfo->ndev_list) {
-        lpriv = (bkn_priv_t *)list;
-        if (id < lpriv->id) {
-            found = 1;
-            break;
+    if (id > KCOM_NETIF_MAX) {
+        DBG_NDEV(("ID %d exceeds maximum network interface ID (max: %d)\n",
+                  id, KCOM_NETIF_MAX));
+        rv = KCOM_E_PARAM;
+    } else if (id == 0) {
+        for (id = 1; id < sinfo->ndev_max; id++) {
+            if (!sinfo->ndevs[id]) {
+                break;
+            }
+        }
+        if (id >= sinfo->ndev_max) {
+            realloc = 1;
         }
-        id = lpriv->id + 1;
-    }
-    priv->id = id;
-    if (found) {
-        /* Replace previously removed interface */
-        list_add_tail(&priv->list, &lpriv->list);
     } else {
-        /* No holes - add to end of list */
-        list_add_tail(&priv->list, &sinfo->ndev_list);
+        if (id >= sinfo->ndev_max) {
+            realloc = 1;
+        } else {
+            if (sinfo->ndevs[id]) {
+                DBG_NDEV(("ID %d is already in use\n", id));
+                rv = KCOM_E_RESOURCE;
+            }
+        }
     }
 
-    if (id < sinfo->ndev_max) {
-        DBG_NDEV(("Add netif ID %d to table\n", id));
-        sinfo->ndevs[id] = dev;
-    } else {
-        int ndev_max = sinfo->ndev_max + NDEVS_CHUNK;
-        int size = ndev_max * sizeof(struct net_device *);
-        void *ndevs = kmalloc(size, GFP_ATOMIC);
+    if (realloc) {
+        int ndev_max;
+        int size;
+        void *ndevs;
+
+        ndev_max = sinfo->ndev_max;
+        do {
+            ndev_max += NDEVS_CHUNK;
+        } while ((id + 1) > ndev_max);
+
+        if (ndev_max >= KCOM_NETIF_MAX) {
+            ndev_max = KCOM_NETIF_MAX + 1;
+        }
+        size = ndev_max * sizeof(struct net_device *);
+        ndevs = kmalloc(size, GFP_ATOMIC);
         if (ndevs != NULL) {
             DBG_NDEV(("Reallocate netif table for ID %d\n", id));
             memset(ndevs, 0, size);
@@ -8800,11 +9338,38 @@ bkn_knet_netif_create(kcom_msg_netif_create_t *kmsg, int len)
             }
             sinfo->ndevs = ndevs;
             sinfo->ndev_max = ndev_max;
-            sinfo->ndevs[id] = dev;
+        } else {
+            rv = KCOM_E_RESOURCE;
         }
     }
+    if (rv != KCOM_E_NONE) {
+        spin_unlock_irqrestore(&sinfo->lock, flags);
+        unregister_netdev(dev);
+        free_netdev(dev);
+        kmsg->hdr.status = rv;
+        return sizeof(kcom_msg_hdr_t);
+    }
 
+    priv->id = id;
+    DBG_NDEV(("Add netif ID %d to table\n", id));
+    sinfo->ndevs[id] = dev;
+
+    found = 0;
+    list_for_each(list, &sinfo->ndev_list) {
+        lpriv = (bkn_priv_t *)list;
+        if (id < lpriv->id) {
+            found = 1;
+            break;
+        }
+    }
 
+    if (found) {
+        /* Replace previously removed interface */
+        list_add_tail(&priv->list, &lpriv->list);
+    } else {
+        /* No holes - add to end of list */
+        list_add_tail(&priv->list, &sinfo->ndev_list);
+    }
     DBG_VERB(("Assigned ID %d to Ethernet device %s\n",
               priv->id, dev->name));
 
@@ -8812,10 +9377,11 @@ bkn_knet_netif_create(kcom_msg_netif_create_t *kmsg, int len)
     memcpy(kmsg->netif.macaddr, dev->dev_addr, 6);
     memcpy(kmsg->netif.name, dev->name, KCOM_NETIF_NAME_MAX - 1);
 
-    if (knet_netif_create_cb != NULL) {
-        int retv = knet_netif_create_cb(kmsg->hdr.unit, &(kmsg->netif), dev);
-        if (retv) {
-            gprintk("Warning: knet_netif_create_cb() returned %d for netif '%s'\n", retv, dev->name);
+    list_for_each(list, &netif_create_cb_list) {
+        netif_create_cb = list_entry(list, bkn_netif_cb_t, list);
+        if (netif_create_cb->cb(dev, sinfo->dev_no, &kmsg->netif) != 0) {
+            DBG_WARN(("Network interface create callback failed for '%s'\n",
+                      dev->name));
         }
     }
 
@@ -8841,6 +9407,8 @@ bkn_knet_netif_destroy(kcom_msg_netif_destroy_t *kmsg, int len)
     struct list_head *list;
     unsigned long flags;
     int found;
+    bkn_netif_cb_t *netif_destroy_cb;
+    kcom_netif_t kcom_netif;
 
     kmsg->hdr.type = KCOM_MSG_TYPE_RSP;
 
@@ -8867,20 +9435,6 @@ bkn_knet_netif_destroy(kcom_msg_netif_destroy_t *kmsg, int len)
         return sizeof(kcom_msg_hdr_t);
     }
 
-    if (!device_is_sand(sinfo)) {
-        if (knet_netif_destroy_cb != NULL) {
-            int retv;
-            kcom_netif_t netif;
-            memset(&netif, 0, sizeof(kcom_netif_t));
-            netif.id = priv->id;
-            retv = knet_netif_destroy_cb(kmsg->hdr.unit, &netif, priv->dev);
-            if (retv) {
-                gprintk("warning: knet_netif_destroy_cb() returned %d for netif '%s'\n",
-                        retv, priv->dev? priv->dev->name : "unknown");
-            }
-        }
-    }
-
     list_del(&priv->list);
 
     if (priv->id < sinfo->ndev_max) {
@@ -8890,6 +9444,19 @@ bkn_knet_netif_destroy(kcom_msg_netif_destroy_t *kmsg, int len)
     cfg_api_unlock(sinfo, &flags);
 
     dev = priv->dev;
+
+    if (!list_empty(&netif_destroy_cb_list)) {
+        memset(&kcom_netif, 0, sizeof(kcom_netif));
+        bkn_knet_netif_from_priv(&kcom_netif, priv);
+        list_for_each(list, &netif_destroy_cb_list) {
+            netif_destroy_cb = list_entry(list, bkn_netif_cb_t, list);
+            if (netif_destroy_cb->cb(dev, sinfo->dev_no, &kcom_netif) != 0) {
+                DBG_WARN(("Network interface destroy callback failed for '%s'\n",
+                          dev->name));
+            }
+        }
+    }
+
     DBG_VERB(("Removing virtual Ethernet device %s (%d).\n",
               dev->name, priv->id));
     unregister_netdev(dev);
@@ -8960,20 +9527,7 @@ bkn_knet_netif_get(kcom_msg_netif_get_t *kmsg, int len)
         return sizeof(kcom_msg_hdr_t);
     }
 
-    memcpy(kmsg->netif.macaddr, priv->dev->dev_addr, 6);
-    memcpy(kmsg->netif.name, priv->dev->name, KCOM_NETIF_NAME_MAX - 1);
-    kmsg->netif.vlan = priv->vlan;
-    kmsg->netif.type = priv->type;
-    kmsg->netif.id = priv->id;
-    kmsg->netif.flags = priv->flags;
-    kmsg->netif.cb_user_data = priv->cb_user_data;
-
-    if (priv->port < 0) {
-        kmsg->netif.port = 0;
-    } else {
-        kmsg->netif.port = priv->port;
-    }
-    kmsg->netif.qnum = priv->qnum;
+    bkn_knet_netif_from_priv(&kmsg->netif, priv);
 
     spin_unlock_irqrestore(&sinfo->lock, flags);
 
@@ -8986,6 +9540,7 @@ bkn_knet_filter_create(kcom_msg_filter_create_t *kmsg, int len)
     bkn_switch_info_t *sinfo;
     struct list_head *list;
     bkn_filter_t *filter, *lfilter;
+    bkn_filter_cb_t *filter_cb;
     unsigned long flags;
     int found, id;
     int oob_offset_max;
@@ -9008,7 +9563,7 @@ bkn_knet_filter_create(kcom_msg_filter_create_t *kmsg, int len)
 
     if (device_is_sand(sinfo)) {
         oob_offset_max = BKN_SAND_SCRATCH_DATA_SIZE * 4;
-    } else if (sinfo->cmic_type == 'x') {
+    } else if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) {
         oob_offset_max = sinfo->pkt_hdr_size;
     } else {
         oob_offset_max = sinfo->dcb_wsize * 4;
@@ -9042,21 +9597,34 @@ bkn_knet_filter_create(kcom_msg_filter_create_t *kmsg, int len)
             }
         }
     }
+
+    spin_unlock_irqrestore(&sinfo->lock, flags);
+
     if (found) {
         /* Too many filters */
-        spin_unlock_irqrestore(&sinfo->lock, flags);
         kmsg->hdr.status = KCOM_E_RESOURCE;
         return sizeof(kcom_msg_hdr_t);
     }
-    filter = kmalloc(sizeof(*filter), GFP_ATOMIC);
+    filter = kmalloc(sizeof(*filter), GFP_KERNEL);
     if (filter == NULL) {
-        spin_unlock_irqrestore(&sinfo->lock, flags);
         kmsg->hdr.status = KCOM_E_PARAM;
         return sizeof(kcom_msg_hdr_t);
     }
     memset(filter, 0, sizeof(*filter));
     memcpy(&filter->kf, &kmsg->filter, sizeof(filter->kf));
     filter->kf.id = id;
+    /* Check for filter-specific callback */
+    if (filter->kf.dest_type == KCOM_DEST_T_CB && filter->kf.desc[0] != '\0') {
+        list_for_each(list, &filter_cb_list) {
+            filter_cb = list_entry(list, bkn_filter_cb_t, list);
+            if (strcmp(filter->kf.desc, filter_cb->desc) == 0) {
+                filter->cb = filter_cb->cb;
+                break;
+            }
+        }
+    }
+
+    spin_lock_irqsave(&sinfo->lock, flags);
 
     /* Add according to priority */
     found = 0;
@@ -9515,6 +10083,8 @@ _cleanup(void)
     bkn_priv_t *priv;
     bkn_switch_info_t *sinfo;
     unsigned long flags;
+    bkn_netif_cb_t *netif_cb;
+    bkn_filter_cb_t *filter_cb;
 
     /* Inidicate that we are shutting down */
     module_initialized = 0;
@@ -9587,6 +10157,26 @@ _cleanup(void)
         bkn_destroy_sinfo(sinfo);
     }
 
+    /* Destroy any callback list which is not unregistered */
+    while (!list_empty(&netif_create_cb_list)) {
+        netif_cb = list_entry(netif_create_cb_list.next,
+                              bkn_netif_cb_t, list);
+        list_del(&netif_cb->list);
+        kfree(netif_cb);
+    }
+    while (!list_empty(&netif_destroy_cb_list)) {
+        netif_cb = list_entry(netif_destroy_cb_list.next,
+                              bkn_netif_cb_t, list);
+        list_del(&netif_cb->list);
+        kfree(netif_cb);
+    }
+    while (!list_empty(&filter_cb_list)) {
+        filter_cb = list_entry(filter_cb_list.next,
+                               bkn_filter_cb_t, list);
+        list_del(&filter_cb->list);
+        kfree(filter_cb);
+    }
+
     return 0;
 }
 
@@ -9665,7 +10255,9 @@ bkn_knet_dev_init(int d)
     /* Initialize default RCPU signature */
     if ((bde_dev = kernel_bde->get_dev(d)) != NULL) {
         sinfo->rcpu_sig = bde_dev->device & ~0xf;
-        sinfo->device_id= bde_dev->device & ~0xf;
+        sinfo->base_id = bde_dev->device & ~0xf;
+        sinfo->dev_id = bde_dev->device;
+        sinfo->rev_id = bde_dev->rev;
     }
     /* Check for override */
     if (rcpu_signature) {
@@ -9751,11 +10343,11 @@ _init(void)
 
     /* Initialize event queue */
     for (idx = 0; idx < LINUX_BDE_MAX_DEVICES; idx++) {
-        memset(&_bkn_evt[idx], 0, sizeof(bkn_evt_resource_t));
-        _bkn_evt[idx].inst_id = INVALID_INSTANCE_ID;
+        evt = &_bkn_evt[idx];
+        memset(evt, 0, sizeof(bkn_evt_resource_t));
+        evt->inst_id = INVALID_INSTANCE_ID;
+        init_waitqueue_head(&evt->evt_wq);
     }
-    evt = &_bkn_evt[0];
-    init_waitqueue_head(&evt->evt_wq);
 
     module_initialized = 1;
 
@@ -9844,139 +10436,269 @@ gmodule_get(void)
 }
 
 /*
- * Get DCB type and other HW info
+ * Call-back interfaces for other Linux kernel drivers.
+ *
+ * The Rx call-back allows an external module to modify SKB contents
+ * before it is handed off to the Linux network stack.
+ *
+ * The Tx call-back allows an external module to modify SKB contents
+ * before it is injected inot the switch.
+ *
+ * The HW timestamp callbacks invoke an external module to enable, disable
+ * HW timestamp on a specific port which is indicated while the netif is
+ * created through KNET API. KNET can also get device-specific SOBMH and
+ * timestamp for a Tx PTP packet through these callbacks.
  */
+
 int
-bkn_hw_info_get(int unit, knet_hw_info_t *hw_info)
+bkn_rx_skb_cb_register(knet_skb_cb_f rx_cb)
 {
-    bkn_switch_info_t *sinfo;
-    sinfo = bkn_sinfo_from_unit(unit);
-    if (sinfo == NULL) {
-        gprintk("Warning: unknown unit: %d\n", unit);
-        return (-1);
+    if (knet_rx_cb != NULL) {
+        return -1;
     }
-
-    hw_info->cmic_type = sinfo->cmic_type;
-    hw_info->dcb_type = sinfo->dcb_type;
-    hw_info->dcb_size = WORDS2BYTES(sinfo->dcb_wsize);
-    hw_info->pkt_hdr_size = sinfo->pkt_hdr_size;
-    hw_info->cdma_channels = sinfo->cdma_channels;
-
-    return (0);
+    knet_rx_cb = rx_cb;
+    return 0;
 }
 
 int
-bkn_netif_create_cb_register(knet_netif_cb_f netif_cb)
+bkn_rx_skb_cb_unregister(knet_skb_cb_f rx_cb)
 {
-    if (knet_netif_create_cb != NULL) {
+    if (rx_cb != NULL && knet_rx_cb != rx_cb) {
         return -1;
     }
-    knet_netif_create_cb = netif_cb;
+    knet_rx_cb = NULL;
     return 0;
 }
 
 int
-bkn_netif_create_cb_unregister(knet_netif_cb_f netif_cb)
+bkn_tx_skb_cb_register(knet_skb_cb_f tx_cb)
 {
-    if (netif_cb != NULL && knet_netif_create_cb != netif_cb) {
+    if (knet_tx_cb != NULL) {
         return -1;
     }
-    knet_netif_create_cb = NULL;
+    knet_tx_cb = tx_cb;
     return 0;
 }
 
 int
-bkn_netif_destroy_cb_register(knet_netif_cb_f netif_cb)
+bkn_tx_skb_cb_unregister(knet_skb_cb_f tx_cb)
 {
-    if (knet_netif_destroy_cb != NULL) {
+    if (tx_cb != NULL && knet_tx_cb != tx_cb) {
         return -1;
     }
-    knet_netif_destroy_cb = netif_cb;
+    knet_tx_cb = NULL;
     return 0;
 }
 
 int
-bkn_netif_destroy_cb_unregister(knet_netif_cb_f netif_cb)
+bkn_netif_create_cb_register(knet_netif_cb_f netif_cb)
 {
-    if (netif_cb != NULL && knet_netif_destroy_cb != netif_cb) {
+    struct list_head *list;
+    bkn_netif_cb_t *netif_create_cb;
+
+    if (netif_cb == NULL) {
         return -1;
     }
-    knet_netif_destroy_cb = NULL;
+    list_for_each(list, &netif_create_cb_list) {
+        netif_create_cb = list_entry(list, bkn_netif_cb_t, list);
+        if (netif_create_cb->cb == netif_cb) {
+            return -1;
+        }
+    }
+    netif_create_cb = kmalloc(sizeof(*netif_create_cb), GFP_KERNEL);
+    if (netif_create_cb == NULL) {
+        return -1;
+    }
+    netif_create_cb->cb = netif_cb;
+    list_add_tail(&netif_create_cb->list, &netif_create_cb_list);
     return 0;
 }
 
-/*
- * Call-back interfaces for other Linux kernel drivers.
- *
- * The Rx call-back allows an external module to modify SKB contents
- * before it is handed off to the Linux network stack.
- *
- * The Tx call-back allows an external module to modify SKB contents
- * before it is injected inot the switch.
- *
- * The HW timestamp callbacks invoke an external module to enable, disable
- * HW timestamp on a specific port which is indicated while the netif is
- * created through KNET API. KNET can also get device-specific SOBMH and
- * timestamp for a Tx PTP packet through these callbacks.
- */
-
 int
-bkn_rx_skb_cb_register(knet_skb_cb_f rx_cb)
+bkn_netif_create_cb_unregister(knet_netif_cb_f netif_cb)
 {
-    if (knet_rx_cb != NULL) {
+    struct list_head *list, *list_next;
+    bkn_netif_cb_t *netif_create_cb;
+    int found = 0;
+
+    if (netif_cb == NULL) {
         return -1;
     }
-    knet_rx_cb = rx_cb;
+    list_for_each_safe(list, list_next, &netif_create_cb_list) {
+        netif_create_cb = list_entry(list, bkn_netif_cb_t, list);
+        if (netif_create_cb->cb == netif_cb) {
+            found = 1;
+            list_del(list);
+            break;
+        }
+    }
+    if (!found) {
+        return -1;
+    }
+    kfree(netif_create_cb);
     return 0;
 }
 
 int
-bkn_rx_skb_cb_unregister(knet_skb_cb_f rx_cb)
+bkn_netif_destroy_cb_register(knet_netif_cb_f netif_cb)
 {
-    if (rx_cb != NULL && knet_rx_cb != rx_cb) {
+    struct list_head *list;
+    bkn_netif_cb_t *netif_destroy_cb;
+
+    if (netif_cb == NULL) {
         return -1;
     }
-    knet_rx_cb = NULL;
+    list_for_each(list, &netif_destroy_cb_list) {
+        netif_destroy_cb = list_entry(list, bkn_netif_cb_t, list);
+        if (netif_destroy_cb->cb == netif_cb) {
+            return -1;
+        }
+    }
+    netif_destroy_cb = kmalloc(sizeof(*netif_destroy_cb), GFP_KERNEL);
+    if (netif_destroy_cb == NULL) {
+        return -1;
+    }
+    netif_destroy_cb->cb = netif_cb;
+    list_add_tail(&netif_destroy_cb->list, &netif_destroy_cb_list);
     return 0;
 }
 
 int
-bkn_tx_skb_cb_register(knet_skb_cb_f tx_cb)
+bkn_netif_destroy_cb_unregister(knet_netif_cb_f netif_cb)
 {
-    if (knet_tx_cb != NULL) {
+    struct list_head *list, *list_next;
+    bkn_netif_cb_t *netif_destroy_cb;
+    int found = 0;
+
+    if (netif_cb == NULL) {
         return -1;
     }
-    knet_tx_cb = tx_cb;
+    list_for_each_safe(list, list_next, &netif_destroy_cb_list) {
+        netif_destroy_cb = list_entry(list, bkn_netif_cb_t, list);
+        if (netif_destroy_cb->cb == netif_cb) {
+            found = 1;
+            list_del(list);
+            break;
+        }
+    }
+    if (!found) {
+        return -1;
+    }
+    kfree(netif_destroy_cb);
     return 0;
 }
 
 int
-bkn_tx_skb_cb_unregister(knet_skb_cb_f tx_cb)
+bkn_filter_cb_register(knet_filter_cb_f filter_cb)
 {
-    if (tx_cb != NULL && knet_tx_cb != tx_cb) {
+    if (knet_filter_cb != NULL) {
         return -1;
     }
-    knet_tx_cb = NULL;
+    knet_filter_cb = filter_cb;
     return 0;
 }
 
 int
-bkn_filter_cb_register(knet_filter_cb_f filter_cb)
+bkn_filter_cb_register_by_name(knet_filter_cb_f filter_cb, char *filter_name)
 {
-    if (knet_filter_cb != NULL) {
+    struct list_head *list, *list2;
+    bkn_switch_info_t *sinfo;
+    bkn_filter_t *filter;
+    bkn_filter_cb_t *fcb;
+    unsigned long flags;
+
+    if (filter_cb == NULL || filter_name == NULL) {
         return -1;
     }
-    knet_filter_cb = filter_cb;
+    if (filter_name[0] == '\0' || strlen(filter_name) >= KCOM_FILTER_DESC_MAX) {
+        return -1;
+    }
+
+    list_for_each(list, &filter_cb_list) {
+        fcb = list_entry(list, bkn_filter_cb_t, list);
+        if (strcmp(fcb->desc, filter_name) == 0) {
+            return -1;
+        }
+    }
+    fcb = kmalloc(sizeof(*fcb), GFP_KERNEL);
+    if (fcb == NULL) {
+        return -1;
+    }
+    fcb->cb = filter_cb;
+    strcpy(fcb->desc, filter_name);
+    list_add_tail(&fcb->list, &filter_cb_list);
+
+    /* Check if any existing filter matches the registered name */
+    list_for_each(list, &_sinfo_list) {
+        sinfo = list_entry(list, bkn_switch_info_t, list);
+        spin_lock_irqsave(&sinfo->lock, flags);
+
+        list_for_each(list2, &sinfo->rxpf_list) {
+            filter = list_entry(list2, bkn_filter_t, list);
+            if (filter->kf.dest_type != KCOM_DEST_T_CB) {
+                continue;
+            }
+            if (filter->kf.desc[0] != '\0') {
+                if (strcmp(filter->kf.desc, filter_name) == 0) {
+                    filter->cb = filter_cb;
+                }
+            }
+        }
+
+        spin_unlock_irqrestore(&sinfo->lock, flags);
+    }
     return 0;
 }
 
 int
 bkn_filter_cb_unregister(knet_filter_cb_f filter_cb)
 {
-    if (filter_cb != NULL && knet_filter_cb != filter_cb) {
+    struct list_head *list, *list2;
+    bkn_switch_info_t *sinfo;
+    bkn_filter_t *filter;
+    bkn_filter_cb_t *fcb;
+    unsigned long flags;
+    int found = 0;
+
+    /* Check if the any existing filter-specific callback matches */
+    if (filter_cb) {
+        /* Remove from list */
+        list_for_each_safe(list, list2, &filter_cb_list) {
+            fcb = list_entry(list, bkn_filter_cb_t, list);
+            if (fcb->cb == filter_cb) {
+                found = 1;
+                list_del(&fcb->list);
+                kfree(fcb);
+                break;
+            }
+        }
+        /* Check if the callback is set to filters */
+        if (found) {
+            list_for_each(list, &_sinfo_list) {
+                sinfo = list_entry(list, bkn_switch_info_t, list);
+                spin_lock_irqsave(&sinfo->lock, flags);
+
+                list_for_each(list2, &sinfo->rxpf_list) {
+                    filter = list_entry(list2, bkn_filter_t, list);
+                    if (filter->kf.dest_type != KCOM_DEST_T_CB) {
+                        continue;
+                    }
+                    if (filter->cb == filter_cb) {
+                        filter->cb = NULL;
+                    }
+                }
+
+                spin_unlock_irqrestore(&sinfo->lock, flags);
+            }
+        }
+    }
+
+    if (!found && filter_cb != NULL && knet_filter_cb != filter_cb) {
         return -1;
     }
-    knet_filter_cb = NULL;
+    if (!found || filter_cb == knet_filter_cb) {
+        knet_filter_cb = NULL;
+    }
     return 0;
 }
 
@@ -10149,11 +10871,61 @@ bkn_hw_tstamp_ioctl_cmd_cb_unregister(knet_hw_tstamp_ioctl_cmd_cb_f hw_tstamp_io
     return 0;
 }
 
+int
+bkn_hw_tstamp_ptp_transport_get_cb_register(knet_hw_tstamp_ptp_transport_get_cb_f hw_tstamp_ptp_transport_get_cb)
+{
+    if (knet_hw_tstamp_ptp_transport_get_cb != NULL) {
+        return -1;
+    }
+    knet_hw_tstamp_ptp_transport_get_cb = hw_tstamp_ptp_transport_get_cb;
+    return 0;
+}
+
+int
+bkn_hw_tstamp_ptp_transport_get_cb_unregister(knet_hw_tstamp_ptp_transport_get_cb_f hw_tstamp_ptp_transport_get_cb)
+{
+    if (knet_hw_tstamp_ptp_transport_get_cb == NULL ||
+        knet_hw_tstamp_ptp_transport_get_cb != hw_tstamp_ptp_transport_get_cb) {
+        return -1;
+    }
+    knet_hw_tstamp_ptp_transport_get_cb = NULL;
+    return 0;
+}
+
+/*
+ * Get HW device info
+ */
+int
+bkn_hw_device_get(int dev_no, uint16_t *dev_id, uint8_t *rev_id)
+{
+    bkn_switch_info_t *sinfo;
+
+    sinfo = bkn_sinfo_from_unit(dev_no);
+    if (sinfo == NULL) {
+        DBG_WARN(("Warning: unknown unit: %d\n", dev_no));
+        return -1;
+    }
+
+    if (dev_id) {
+        *dev_id = sinfo->dev_id;
+    }
+    if (rev_id) {
+        *rev_id = sinfo->rev_id;
+    }
+
+    return 0;
+}
+
 LKM_EXPORT_SYM(bkn_rx_skb_cb_register);
 LKM_EXPORT_SYM(bkn_rx_skb_cb_unregister);
 LKM_EXPORT_SYM(bkn_tx_skb_cb_register);
 LKM_EXPORT_SYM(bkn_tx_skb_cb_unregister);
+LKM_EXPORT_SYM(bkn_netif_create_cb_register);
+LKM_EXPORT_SYM(bkn_netif_create_cb_unregister);
+LKM_EXPORT_SYM(bkn_netif_destroy_cb_register);
+LKM_EXPORT_SYM(bkn_netif_destroy_cb_unregister);
 LKM_EXPORT_SYM(bkn_filter_cb_register);
+LKM_EXPORT_SYM(bkn_filter_cb_register_by_name);
 LKM_EXPORT_SYM(bkn_filter_cb_unregister);
 LKM_EXPORT_SYM(bkn_hw_tstamp_enable_cb_register);
 LKM_EXPORT_SYM(bkn_hw_tstamp_enable_cb_unregister);
@@ -10169,10 +10941,8 @@ LKM_EXPORT_SYM(bkn_hw_tstamp_rx_time_upscale_cb_register);
 LKM_EXPORT_SYM(bkn_hw_tstamp_rx_time_upscale_cb_unregister);
 LKM_EXPORT_SYM(bkn_hw_tstamp_rx_pre_process_cb_register);
 LKM_EXPORT_SYM(bkn_hw_tstamp_rx_pre_process_cb_unregister);
-LKM_EXPORT_SYM(bkn_hw_info_get);
-LKM_EXPORT_SYM(bkn_netif_create_cb_register);
-LKM_EXPORT_SYM(bkn_netif_create_cb_unregister);
-LKM_EXPORT_SYM(bkn_netif_destroy_cb_register);
-LKM_EXPORT_SYM(bkn_netif_destroy_cb_unregister);
 LKM_EXPORT_SYM(bkn_hw_tstamp_ioctl_cmd_cb_register);
 LKM_EXPORT_SYM(bkn_hw_tstamp_ioctl_cmd_cb_unregister);
+LKM_EXPORT_SYM(bkn_hw_tstamp_ptp_transport_get_cb_register);
+LKM_EXPORT_SYM(bkn_hw_tstamp_ptp_transport_get_cb_unregister);
+LKM_EXPORT_SYM(bkn_hw_device_get);
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/README b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/README
new file mode 100644
index 000000000..e5ddd7d92
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/README
@@ -0,0 +1,114 @@
+$Id:$
+$Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+
+Permission is granted to use, copy, modify and/or distribute this
+software under either one of the licenses below.
+
+License Option 1: GPL
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License, version 2, as
+published by the Free Software Foundation (the "GPL").
+
+This program is distributed in the hope that it will be useful, but
+WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+General Public License version 2 (GPLv2) for more details.
+
+You should have received a copy of the GNU General Public License
+version 2 (GPLv2) along with this source code.
+
+
+License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
+
+This software is governed by the Broadcom Open Network Switch APIs license:
+https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+
+
+DCB Library
+
+The DCB Library is a stand-alone library that allows access to 
+DCB fields easily without bringing all the complexity of the 
+SDK source tree.
+
+
+DCB Initialization
+
+The following routine initializes a DCB handle.  A unique DCB handle
+needs to be initialized for a given device ID and revision ID.
+
+This initialization function needs to be called before accessing
+any DCB field.
+
+Function:
+#include <appl/dcb/dcb.h>
+
+  int dcb_handle_init(dcb_handle_t *handle, uint16 dev_id, uint8 rev_id);
+
+Parameters:
+  handle    - (IN/OUT) Pointer to DCB library handle
+  device_id - (IN)     Device ID
+  rev_id    - (IN)     Revision ID
+
+Returns:
+  DCB_OK    Success
+  DCB_ERROR Failure
+
+
+DCB Field GET
+
+Set of macros that return the value from a DCB field.
+
+The correct DCB structure needs to be allocated and
+initialized prior to calling any of the get/set macros.
+
+Macro:
+  DCB_<field>_GET(handle, dcb)
+
+Parameters:
+  handle - (IN) Pointer to the handle for a given device;
+           type is dcb_handle_t *
+  dcb    - (IN) Pointer to the DCB structure to get the field value from;
+           type is dcb_t *
+Returns:
+  Value of DCB field
+
+
+DCB Field SET
+
+Set of macros to set the value for a DCB field.
+
+The correct DCB structure needs to be allocated and
+initialized prior to calling any of the get/set macros.
+
+Macro:
+  DCB_<field>_SET(handle, dcb, value)
+
+Parameters:
+  handle - (IN) Pointer to the handle for a given device;
+           type is dcb_handle_t *
+  dcb    - (IN/OUT) Pointer to the DCB structure to set the field value to;
+           type is dcb_t *
+  value  - (IN) Value to set for the DCB field;
+           type varies
+
+Returns:
+  None
+
+
+Compiling the DCB Library
+
+To compile the DCB library, the DCBDIR environment variable needs
+to be set to point to the location where the DCB library resides
+and run make. If DCBDIR is not set, the default value of DCBDIR is the parent
+directory of this README file.
+
+The DCB library output will be generated in $DCBDIR/build/ by default.
+The output directory can be specified by setting the BLDDIR environment
+variable.
+
+Example:
+  cd <dcb_dir>
+  export DCBDIR=`pwd`
+  cd make
+  make
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/RELEASE b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/RELEASE
new file mode 100644
index 000000000..889d5e0ce
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/RELEASE
@@ -0,0 +1 @@
+DCB SDK-HEAD
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/appl/dcb/dcb_handler.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/appl/dcb/dcb_handler.h
new file mode 100644
index 000000000..cda80ad5d
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/appl/dcb/dcb_handler.h
@@ -0,0 +1,226 @@
+/* 
+ * $Id:$
+ * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * 
+ * Permission is granted to use, copy, modify and/or distribute this
+ * software under either one of the licenses below.
+ * 
+ * License Option 1: GPL
+ * 
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License, version 2, as
+ * published by the Free Software Foundation (the "GPL").
+ * 
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License version 2 (GPLv2) for more details.
+ * 
+ * You should have received a copy of the GNU General Public License
+ * version 2 (GPLv2) along with this source code.
+ * 
+ * 
+ * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
+ * 
+ * This software is governed by the Broadcom Open Network Switch APIs license:
+ * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+ * 
+ *
+ * File:        dcb.h
+ * Purpose:     DCB Library interface
+ */
+
+#ifndef   _DCB_DCB_H_
+#define   _DCB_DCB_H_
+
+#include <sal/types.h>
+#include <appl/dcb/dcb_int.h>
+
+
+/*
+ * DCB Return Codes
+ */
+#define DCB_OK        0
+#define DCB_ERROR     1
+
+
+/*
+ * DCB Handle
+ */
+typedef struct dcb_handle_s {
+    dcb_op_t    *dcb_op;
+} dcb_handle_t;
+
+#define DCB_HANDLE(_h)         (_h)
+#define DCB_OP(_h)             DCB_HANDLE(_h)->dcb_op
+
+
+/*
+ * Function to initialize the DCB library for a
+ * given device type and revision ID.
+ *
+ * It must be called before accessing any of the DCB fields.
+ */
+extern int
+dcb_handle_init(dcb_handle_t *handle, uint16 dev_id, uint8 rev_id);
+
+
+/*
+ * DCB Fields
+ */
+
+#define DCB_TYPE(_h)                                                    \
+    DCB_OP(_h)->dcbtype
+
+#define DCB_SIZE(_h)                                                    \
+    DCB_OP(_h)->dcbsize
+
+#define DCB_INIT(_h, _dcb)                                              \
+    DCB_OP(_h)->init(_dcb)
+
+#define DCB_REQCOUNT_SET(_h, _dcb, _count)                              \
+    DCB_OP(_h)->reqcount_set(_dcb, _count)
+#define DCB_REQCOUNT_GET(_h, _dcb)                                      \
+    DCB_OP(_h)->reqcount_get(_dcb)
+
+#ifdef INCLUDE_KNET
+/* Mask off indicator for kernel processing done */
+#define DCB_XFERCOUNT_GET(_h, _dcb)                                     \
+    (DCB_OP(_h)->xfercount_get(_dcb) & ~SOC_DCB_KNET_DONE)
+#else
+#define DCB_XFERCOUNT_GET(_h, _dcb)                                     \
+    DCB_OP(_h)->xfercount_get(_dcb)
+#endif
+
+#define DCB_DONE_SET(_h, _dcb, _val)                                    \
+    DCB_OP(_h)->done_set(_dcb, _val)
+#define DCB_DONE_GET(_h, _dcb)                                          \
+    DCB_OP(_h)->done_get(_dcb)
+#define DCB_SG_SET(_h, _dcb, _val)                                      \
+    DCB_OP(_h)->sg_set(_dcb, _val)
+#define DCB_SG_GET(_h, _dcb)                                            \
+    DCB_OP(_h)->sg_get(_dcb)
+#define DCB_CHAIN_SET(_h, _dcb, _val)                                   \
+    DCB_OP(_h)->chain_set(_dcb, _val)
+#define DCB_CHAIN_GET(_h, _dcb)                                         \
+    DCB_OP(_h)->chain_get(_dcb)
+#define DCB_RELOAD_SET(_h, _dcb, _val)                                  \
+    DCB_OP(_h)->reload_set(_dcb, _val)
+#define DCB_RELOAD_GET(_h, _dcb)                                        \
+    DCB_OP(_h)->reload_get(_dcb)
+
+#define DCB_TX_CRC_SET(_h, _dcb, _val)                                  \
+    DCB_OP(_h)->tx_crc_set(_dcb, _val)
+#define DCB_TX_COS_SET(_h, _dcb, _val)                                  \
+    DCB_OP(_h)->tx_cos_set(_dcb, _val)
+#define DCB_TX_DESTMOD_SET(_h, _dcb, _val)                              \
+    DCB_OP(_h)->tx_destmod_set(_dcb, _val)
+#define DCB_TX_DESTPORT_SET(_h, _dcb, _val)                             \
+    DCB_OP(_h)->tx_destport_set(_dcb, _val)
+#define DCB_TX_OPCODE_SET(_h, _dcb, _val)                               \
+    DCB_OP(_h)->tx_opcode_set(_dcb, _val)
+#define DCB_TX_SRCMOD_SET(_h, _dcb, _val)                               \
+    DCB_OP(_h)->tx_srcmod_set(_dcb, _val)
+#define DCB_TX_SRCPORT_SET(_h, _dcb, _val)                              \
+    DCB_OP(_h)->tx_srcport_set(_dcb, _val)
+#define DCB_TX_PRIO_SET(_h, _dcb, _val)                                 \
+    DCB_OP(_h)->tx_prio_set(_dcb, _val)
+#define DCB_TX_PFM_SET(_h, _dcb, _val)                                  \
+    DCB_OP(_h)->tx_pfm_set(_dcb, _val)
+
+#define DCB_RX_UNTAGGED_GET(_h, _dcb, _dt_mode, _ingport_is_hg)         \
+    DCB_OP(_h)->rx_untagged_get(_dcb, _dt_mode, _ingport_is_hg)
+#define DCB_RX_CRC_GET(_h, _dcb)                                        \
+    DCB_OP(_h)->rx_crc_get(_dcb)
+#define DCB_RX_COS_GET(_h, _dcb)                                        \
+    DCB_OP(_h)->rx_cos_get(_dcb)
+#define DCB_RX_DESTMOD_GET(_h, _dcb)                                    \
+    DCB_OP(_h)->rx_destmod_get(_dcb)
+#define DCB_RX_DESTPORT_GET(_h, _dcb)                                   \
+    DCB_OP(_h)->rx_destport_get(_dcb)
+#define DCB_RX_OPCODE_GET(_h, _dcb)                                     \
+    DCB_OP(_h)->rx_opcode_get(_dcb)
+
+#define DCB_RX_CLASSTAG_GET(_h, _dcb)                                   \
+    DCB_OP(_h)->rx_classtag_get(_dcb)
+#define DCB_RX_MATCHRULE_GET(_h, _dcb)                                  \
+    DCB_OP(_h)->rx_matchrule_get(_dcb)
+#define DCB_RX_START_GET(_h, _dcb)                                      \
+    DCB_OP(_h)->rx_start_get(_dcb)
+#define DCB_RX_END_GET(_h, _dcb)                                        \
+    DCB_OP(_h)->rx_end_get(_dcb)
+#define DCB_RX_ERROR_GET(_h, _dcb)                                      \
+    DCB_OP(_h)->rx_error_get(_dcb)
+#define DCB_RX_PRIO_GET(_h, _dcb)                                       \
+    DCB_OP(_h)->rx_prio_get(_dcb)
+#define DCB_RX_REASON_GET(_h, _dcb)                                     \
+    DCB_OP(_h)->rx_reason_get(_dcb)
+#define DCB_RX_REASON_HI_GET(_h, _dcb)                                  \
+    DCB_OP(_h)->rx_reason_hi_get(_dcb)
+#define DCB_RX_REASONS_GET(_h, _dcb, _reasons)                          \
+    DCB_OP(_h)->rx_reasons_get(DCB_OP(_h), _dcb, _reasons)
+#define DCB_RX_INGPORT_GET(_h, _dcb)                                    \
+    DCB_OP(_h)->rx_ingport_get(_dcb)
+#define DCB_RX_SRCPORT_GET(_h, _dcb)                                    \
+    DCB_OP(_h)->rx_srcport_get(_dcb)
+#define DCB_RX_SRCMOD_GET(_h, _dcb)                                     \
+    DCB_OP(_h)->rx_srcmod_get(_dcb)
+#define DCB_RX_MCAST_GET(_h, _dcb)                                      \
+    DCB_OP(_h)->rx_mcast_get(_dcb)
+#define DCB_RX_VCLABEL_GET(_h, _dcb)                                    \
+    DCB_OP(_h)->rx_vclabel_get(_dcb)
+#define DCB_RX_MIRROR_GET(_h, _dcb)                                     \
+    DCB_OP(_h)->rx_mirror_get(_dcb)
+#define DCB_RX_MATCHRULE_GET(_h, _dcb)                                  \
+    DCB_OP(_h)->rx_matchrule_get(_dcb)
+#define DCB_RX_TIMESTAMP_GET(_h, _dcb)                                  \
+    DCB_OP(_h)->rx_timestamp_get(_dcb)
+#define DCB_RX_TIMESTAMP_UPPER_GET(_h, _dcb)                            \
+    DCB_OP(_h)->rx_timestamp_upper_get(_dcb)
+    
+#define DCB_HG_SET(_h, _dcb, _val)                                      \
+    DCB_OP(_h)->hg_set(_dcb, _val)
+#define DCB_HG_GET(_h, _dcb)                                            \
+    DCB_OP(_h)->hg_get(_dcb)
+#define DCB_STAT_SET(_h, _dcb, _val)                                    \
+    DCB_OP(_h)->stat_set(_dcb, _val)
+#define DCB_STAT_GET(_h, _dcb)                                          \
+    DCB_OP(_h)->stat_get(_dcb)
+#define DCB_PURGE_SET(_h, _dcb, _val)                                   \
+    DCB_OP(_h)->purge_set(_dcb, _val)
+#define DCB_PURGE_GET(_h, _dcb)                                         \
+    DCB_OP(_h)->purge_get(_dcb)
+
+#define DCB_MHP_GET(_h, _dcb)               \
+    DCB_OP(_h)->mhp_get(_dcb)
+#define DCB_RX_OUTER_VID_GET(_h, _dcb)      \
+    DCB_OP(_h)->rx_outer_vid_get(_dcb)
+#define DCB_RX_OUTER_PRI_GET(_h, _dcb)      \
+    DCB_OP(_h)->rx_outer_pri_get(_dcb)
+#define DCB_RX_OUTER_CFI_GET(_h, _dcb)      \
+    DCB_OP(_h)->rx_outer_cfi_get(_dcb)
+#define DCB_RX_OUTER_TAG_ACTION_GET(_h, _dcb)     \
+    DCB_OP(_h)->rx_outer_tag_action_get(_dcb)
+#define DCB_RX_INNER_VID_GET(_h, _dcb)      \
+    DCB_OP(_h)->rx_inner_vid_get(_dcb)
+#define DCB_RX_INNER_PRI_GET(_h, _dcb)      \
+    DCB_OP(_h)->rx_inner_pri_get(_dcb)
+#define DCB_RX_INNER_CFI_GET(_h, _dcb)      \
+    DCB_OP(_h)->rx_inner_cfi_get(_dcb)
+#define DCB_RX_INNER_TAG_ACTION_GET(_h, _dcb)     \
+    DCB_OP(_h)->rx_inner_tag_action_get(_dcb)
+#define DCB_RX_BPDU_GET(_h, _dcb)           \
+    DCB_OP(_h)->rx_bpdu_get(_dcb)
+#define DCB_RX_L3_INTF_GET(_h, _dcb)        \
+    DCB_OP(_h)->rx_l3_intf_get(_dcb)
+#define DCB_RX_DECAP_TUNNEL_GET(_h, _dcb)   \
+    DCB_OP(_h)->rx_decap_tunnel_get(_dcb)
+#define DCB_RX_SWITCH_DROP_GET(_h, _dcb)    \
+    DCB_OP(_h)->rx_switch_drop_get(_dcb)
+#define DCB_OLP_ENCAP_OAM_PKT_GET(_h, _dcb) \
+    DCB_OP(_h)->olp_encap_oam_pkt_get(_dcb)
+#define DCB_READ_ECC_ERROR_GET(_h, _dcb)    \
+    DCB_OP(_h)->read_ecc_error_get(_dcb)
+
+
+#endif /* _DCB_DCB_H_ */
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/appl/dcb/dcb_int.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/appl/dcb/dcb_int.h
new file mode 100644
index 000000000..af041f525
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/appl/dcb/dcb_int.h
@@ -0,0 +1,162 @@
+/* 
+ * $Id:$
+ * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * 
+ * Permission is granted to use, copy, modify and/or distribute this
+ * software under either one of the licenses below.
+ * 
+ * License Option 1: GPL
+ * 
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License, version 2, as
+ * published by the Free Software Foundation (the "GPL").
+ * 
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License version 2 (GPLv2) for more details.
+ * 
+ * You should have received a copy of the GNU General Public License
+ * version 2 (GPLv2) along with this source code.
+ * 
+ * 
+ * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
+ * 
+ * This software is governed by the Broadcom Open Network Switch APIs license:
+ * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+ * 
+ *
+ * File:        dcb_int.h
+ * Purpose:     DCB Library Internal
+ */
+
+#ifndef   _DCB_INT_H_
+#define   _DCB_INT_H_
+
+#ifdef DCB_CUSTOM_CONFIG
+/* Allow application to override soc_cm_print, etc. */
+#include <dcb_custom_config.h>
+#else
+#ifdef __KERNEL__
+#include <lkm.h>
+#else
+/* Needed for printf */
+#include <stdio.h>
+#endif
+#endif
+
+#include <sal/types.h>
+#include <soc/defs.h>
+
+/* Include first <soc/dcb.h> to redefine macros */
+#include <soc/dcb.h>     
+
+
+/**********************
+ * Stubs and Redefines
+ */
+
+/*
+ * <soc/drv.h>
+ */
+typedef struct soc_control_s {
+    dcb_op_t    *dcb_op;
+} soc_control_t;
+extern soc_control_t       soc_control;
+
+#define SOC_CONTROL(_u)    (&soc_control)
+
+/*
+ * <soc/dcb.h>
+ */
+#ifdef SOC_DCB
+#undef SOC_DCB
+#endif
+#define SOC_DCB(_h)                          DCB_OP(_h)
+
+#ifdef SOC_DCB_IDX2PTR
+#undef SOC_DCB_IDX2PTR
+#endif
+#define SOC_DCB_IDX2PTR(_u, _dcb, _i)        NULL
+
+#ifdef SOC_DCB_PTR2IDX
+#undef SOC_DCB_PTR2IDX
+#endif
+#define SOC_DCB_PTR2IDX(_u, _dcb1, _dcb2)    0
+
+/*
+ * <soc/dma.h>
+ */
+#define SOC_DMA_HG_GET(_flags)          0
+#define SOC_DMA_PURGE_GET(_flags)       0
+#define SOC_DMA_COS_GET(flags)          0
+#define SOC_DMA_CRC_GET(flags)          0
+#define SOC_DV_TX_ALIGN(dv, i)          0
+
+typedef struct dv_s {
+    int         dv_unit;
+    int         dv_cnt;
+    int         dv_vcnt;
+    int         dv_flags;
+#   define      DV_F_NOTIFY_DSC         0x01
+#   define      DV_F_NOTIFY_CHN         0x02
+#   define      DV_F_COMBINE_DCB        0x04
+#   define      DV_F_NEEDS_REFILL       0x10
+    dcb_t       *dv_dcb;
+} dv_t;
+
+/*
+ * <soc/cm.h>
+ */
+#ifdef __KERNEL__
+#define printf printk
+#endif
+
+#ifndef soc_cm_debug
+#define soc_cm_debug(flags, format, ...)  printf(format, __VA_ARGS__)
+#endif
+#ifndef soc_cm_print
+#define soc_cm_print(format, ...)         printf(format, __VA_ARGS__)
+#endif
+
+#define soc_cm_l2p(unit, addr) ((uint32)(((sal_vaddr_t)(addr))&0xFFFFFFFF))
+#define soc_cm_p2l(dev, addr)  (addr)
+
+/*
+ * <soc/enet.h>
+ */
+typedef int enet_hdr_t;
+
+/*
+ * <soc/util.h>
+ */
+extern uint32 _dcb_htonl(uint32 value);
+
+#define soc_ntohl(_x)                                            \
+    ((((uint8 *)&(_x))[0] << 24) | (((uint8 *)&(_x))[1] << 16) | \
+     (((uint8 *)&(_x))[2] << 8)  | (((uint8 *)&(_x))[3]))
+   
+#define soc_htonl(_x)  _dcb_htonl(_x)
+
+/*
+ * <soc/feature.h>
+ */
+#define soc_feature(_u, _f)    0
+
+/*
+ * <soc/error.h>
+ */
+#define SOC_E_PARAM  -4
+#define SOC_E_FULL   -6
+
+/*
+ * <assert.h>
+ */
+#define assert(_x)
+
+/*
+ * <shared/types.h>
+ */
+#define _SHR_L3_EGRESS_IDX_MIN   (0x186A0) /* Egress object start index */
+
+#endif /* _DCB_INT_H_ */
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/sal/types.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/sal/types.h
new file mode 100644
index 000000000..3f2ea4081
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/sal/types.h
@@ -0,0 +1,85 @@
+/* 
+ * $Id: types.h,v 1.1 Broadcom SDK $
+ * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * 
+ * Permission is granted to use, copy, modify and/or distribute this
+ * software under either one of the licenses below.
+ * 
+ * License Option 1: GPL
+ * 
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License, version 2, as
+ * published by the Free Software Foundation (the "GPL").
+ * 
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License version 2 (GPLv2) for more details.
+ * 
+ * You should have received a copy of the GNU General Public License
+ * version 2 (GPLv2) along with this source code.
+ * 
+ * 
+ * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
+ * 
+ * This software is governed by the Broadcom Open Network Switch APIs license:
+ * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+ * 
+ *
+ * File:        types.h
+ * Purpose:     SAL Definitions 
+ */
+
+#ifndef   _SAL_TYPES_H_
+#define   _SAL_TYPES_H_
+
+#ifdef DCB_CUSTOM_CONFIG
+/* Allow application to override sal_sprintf, sal_memset, sal_memcpy */
+#include <dcb_custom_config.h>
+#else
+#ifdef __KERNEL__
+#include <lkm.h>
+#else
+/* Needed for sprintf, memset */
+#include <stdint.h>
+#include <string.h>
+#endif
+#endif
+
+
+/* Booleans */
+#ifndef TRUE
+#define TRUE               1
+#endif
+
+#ifndef FALSE
+#define FALSE              0
+#endif
+
+/* Data types */
+typedef unsigned char     uint8;        /*  8-bit quantity  */
+typedef unsigned short    uint16;       /* 16-bit quantity */
+typedef unsigned int      uint32;       /* 32-bit quantity */
+typedef uint64_t          uint64;       /* 64-bit quantity */
+
+typedef signed char       int8;         /*  8-bit quantity */
+typedef signed short      int16;        /* 16-bit quantity */
+typedef signed int        int32;        /* 32-bit quantity */
+
+typedef uint32            sal_paddr_t;  /* Physical address (PCI address) */
+typedef uintptr_t         sal_vaddr_t;  /* Virtual address (Host address) */
+
+#define PTR_TO_INT(x)     ((uint32)(((uint64)(x))&0xFFFFFFFF))
+#define PTR_HI_TO_INT(x)  ((uint32)((((uint64)(x))>>32)&0xFFFFFFFF))
+
+typedef uint8             sal_mac_addr_t[6];  /* MAC address */
+
+/* Macros */
+#define COMPILER_REFERENCE(_a)    ((void)(_a))
+
+/* Functions */
+#define sal_memset        memset
+#define sal_sprintf       sprintf
+#define sal_memcpy        memcpy
+
+#endif /* _SAL_TYPES_H_ */
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/sdk_config.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/sdk_config.h
new file mode 100644
index 000000000..31ae2947b
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/sdk_config.h
@@ -0,0 +1,30 @@
+/*
+ * $Id:$
+ * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * 
+ * Permission is granted to use, copy, modify and/or distribute this
+ * software under either one of the licenses below.
+ * 
+ * License Option 1: GPL
+ * 
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License, version 2, as
+ * published by the Free Software Foundation (the "GPL").
+ * 
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License version 2 (GPLv2) for more details.
+ * 
+ * You should have received a copy of the GNU General Public License
+ * version 2 (GPLv2) along with this source code.
+ * 
+ * 
+ * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
+ * 
+ * This software is governed by the Broadcom Open Network Switch APIs license:
+ * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+ * 
+ *
+ * Stub header file
+ */
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/shared/bsl.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/shared/bsl.h
new file mode 100644
index 000000000..319f88600
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/shared/bsl.h
@@ -0,0 +1,56 @@
+/*
+ * $Id: $
+ * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * 
+ * Permission is granted to use, copy, modify and/or distribute this
+ * software under either one of the licenses below.
+ * 
+ * License Option 1: GPL
+ * 
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License, version 2, as
+ * published by the Free Software Foundation (the "GPL").
+ * 
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License version 2 (GPLv2) for more details.
+ * 
+ * You should have received a copy of the GNU General Public License
+ * version 2 (GPLv2) along with this source code.
+ * 
+ * 
+ * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
+ * 
+ * This software is governed by the Broadcom Open Network Switch APIs license:
+ * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+ * 
+ *
+ * Broadcom System Log (bSL)
+ *
+ * Defines for INTERNAL usage only.
+ */
+
+#ifndef _SHR_BSL_H_
+#define _SHR_BSL_H_
+
+#ifdef DCB_CUSTOM_CONFIG
+/* Allow application to override BSL_META, LOG_CLI, etc. */
+#include <dcb_custom_config.h>
+#else
+#ifdef __KERNEL__
+#include <lkm.h>
+
+#define printf printk
+#else
+/* Needed for printf */
+#include <stdio.h>
+#endif
+
+#define BSL_META(_str) _str
+#define BSL_META_U(_unit, _str) _str
+#define LOG_ERROR(_chk, _str) printf _str
+#define LOG_CLI(_str) printf _str
+
+#endif
+#endif /* _SHR_BSL_H_ */
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/shared/rx.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/shared/rx.h
new file mode 100644
index 000000000..973e8cab6
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/shared/rx.h
@@ -0,0 +1,621 @@
+/*
+ * $Id: rx.h,v 1.35 Broadcom SDK $
+ * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * 
+ * Permission is granted to use, copy, modify and/or distribute this
+ * software under either one of the licenses below.
+ * 
+ * License Option 1: GPL
+ * 
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License, version 2, as
+ * published by the Free Software Foundation (the "GPL").
+ * 
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License version 2 (GPLv2) for more details.
+ * 
+ * You should have received a copy of the GNU General Public License
+ * version 2 (GPLv2) along with this source code.
+ * 
+ * 
+ * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
+ * 
+ * This software is governed by the Broadcom Open Network Switch APIs license:
+ * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+ * 
+ *
+ * File:        rx.h
+ * Purpose:     Packet Receive Reason Types shared between BCM and SOC layers
+ */
+
+#ifndef   _SHR_RX_H_
+#define   _SHR_RX_H_
+
+/*
+ * PKT RX Packet Reasons; reason CPU received the packet.
+ * Notes: It is possible no reasons are set (directed to CPU from ARL
+ *        for example), or multiple reasons may be set.
+ */
+
+typedef enum _shr_rx_reason_e {
+    _SHR_RX_INVALID                     = 0,
+    _SHR_RX_ARP                         = 1,   /* ARP Packet                          */
+    _SHR_RX_BPDU                        = 2,   /* BPDU Packet                         */
+    _SHR_RX_BROADCAST                   = 3,   /* Broadcast packet                    */
+    _SHR_RX_CLASS_BASED_MOVE            = 4,   /* Class-based move prevented          */
+    _SHR_RX_CLASS_TAG_PACKETS           = 5,   /* Higig Header with PPD=1             */
+    _SHR_RX_CONTROL                     = 6,   /* Control frame or reserved addr      */
+    _SHR_RX_CPU_LEARN                   = 7,   /* CPU Learned (or VLAN not found      */
+                                               /* on Strata devices)                  */
+    _SHR_RX_DEST_LOOKUP_FAIL            = 8,   /* Destination lookup fail (or L3      */
+                                               /* station move on Strata devices)     */
+    _SHR_RX_DHCP                        = 9,   /* DHCP packets                        */
+    _SHR_RX_DOS_ATTACK                  = 10,  /* DOS Attack Packet                   */
+    _SHR_RX_E2E_HOL_IBP                 = 11,  /* E2E HOL or IBP Packet               */
+    _SHR_RX_ENCAP_HIGIG_ERROR           = 12,  /* Non-HG packets received on an       */
+                                               /* E-HG port                           */
+    _SHR_RX_FILTER_MATCH                = 13,  /* Filter Match                        */
+    _SHR_RX_GRE_CHECKSUM                = 14,  /* GRE checksum                        */
+    _SHR_RX_GRE_SOURCE_ROUTE            = 15,  /* GRE source routing                  */
+    _SHR_RX_HIGIG_CONTROL               = 16,  /* Higig Packet with Control Opcode    */
+    _SHR_RX_HIGIG_HDR_ERROR             = 17,  /* Higig+ header errors                */
+    _SHR_RX_ICMP_REDIRECT               = 18,  /* ICMP Recirect                       */
+    _SHR_RX_IGMP                        = 19,  /* IGMP packet                         */
+    _SHR_RX_INGRESS_FILTER              = 20,  /* Ingress Filter (VLAN membership)    */
+    _SHR_RX_IP                          = 21,  /* IP packet                           */
+    _SHR_RX_IPFIX_RATE_VIOLATION        = 22,  /* IPFIX flows exceed metering         */
+    _SHR_RX_IP_MCAST_MISS               = 23,  /* IPMC miss                           */
+    _SHR_RX_IP_OPTION_VERSION           = 24,  /* IP options present or IP ver != 4   */
+    _SHR_RX_IPMC                        = 25,  /* Class D IP multicast packet         */
+    _SHR_RX_IPMC_RSVD                   = 26,  /* IPMC Reserved Packet                */
+    _SHR_RX_L2_CPU                      = 27,  /* L2_TABLE - copy to CPU (on 5690)    */
+    _SHR_RX_L2_DEST_MISS                = 28,  /* L2 destination lookup failure       */
+    _SHR_RX_L2_LEARN_LIMIT              = 29,  /* L2 Learn Limit                      */
+    _SHR_RX_L2_MOVE                     = 30,  /* L2 Station Movement                 */
+    _SHR_RX_L2_MTU_FAIL                 = 31,  /* L2 MTU check fail                   */
+    _SHR_RX_L2_NON_UNICAST_MISS         = 32,  /* L2 Non-Unicast lookup miss          */
+    _SHR_RX_L2_SOURCE_MISS              = 33,  /* L2 source lookup failure            */
+    _SHR_RX_L3_ADDR_BIND_FAIL           = 34,  /* MAC to IP bind check failure        */
+    _SHR_RX_L3_DEST_MISS                = 35,  /* L3 DIP Miss                         */
+    _SHR_RX_L3_HEADER_ERROR             = 36,  /* L3 header - IP options,             */
+    _SHR_RX_L3_MTU_FAIL                 = 37,  /* L3 MTU check fail                   */
+    _SHR_RX_L3_SLOW_PATH                = 38,  /* L3 slow path processed pkt.         */
+    _SHR_RX_L3_SOURCE_MISS              = 39,  /* L3 SIP Miss                         */
+    _SHR_RX_L3_SOUCE_MOVE               = 40,  /* L3 Station Movement                 */
+    _SHR_RX_MARTIAN_ADDR                = 41,  /* Pkt. with Martian address           */
+    _SHR_RX_MCAST_IDX_ERROR             = 42,  /* Multicast index error               */
+    _SHR_RX_MCAST_MISS                  = 43,  /* MC miss                             */
+    _SHR_RX_MIM_SERVICE_ERROR           = 44,  /* MiM terminated unicast packets      */
+                                               /* that do not have a valid I-SID      */
+    _SHR_RX_MPLS_CTRL_WORD_ERROR        = 45,  /* MPLS Control Word type is not 0     */
+    _SHR_RX_MPLS_ERROR                  = 46,  /* MPLS error                          */
+    _SHR_RX_MPLS_INVALID_ACTION         = 47,  /* MPLS Invalid Action                 */
+    _SHR_RX_MPLS_INVALID_PAYLOAD        = 48,  /* MPLS Invalid Payload                */
+    _SHR_RX_MPLS_LABEL_MISS             = 49,  /* MPLS table miss                     */
+    _SHR_RX_MPLS_SEQUENCE_NUMBER        = 50,  /* MPLS Sequence number                */
+    _SHR_RX_MPLS_TTL                    = 51,  /* MPLS TTL                            */
+    _SHR_RX_MULTICAST                   = 52,  /* Multicast packet                    */
+    _SHR_RX_NHOP                        = 53,  /* Copy to CPU from NH Idx Tbl         */
+    _SHR_RX_OAM_ERROR                   = 54,  /* OAM packets to CPU for error cases  */
+    _SHR_RX_OAM_SLOW_PATH               = 55,  /* OAM packets to CPU - slowpath       */
+                                               /* process                             */
+    _SHR_RX_OAM_LMDM                    = 56,  /* OAM LMM/LMR, DMM/DMR packets to CPU */
+    _SHR_RX_PARITY_ERROR                = 57,  /* Parity error on IP tables           */
+    _SHR_RX_PROTOCOL                    = 58,  /* Protocol Packet                     */
+    _SHR_RX_SAMPLE_DEST                 = 59,  /* Egress  sFlow sampled               */
+    _SHR_RX_SAMPLE_SOURCE               = 60,  /* Ingress sFlow sampled               */
+    _SHR_RX_SHARED_VLAN_MISMATCH        = 61,  /* Private VLAN Mismatch               */
+    _SHR_RX_SOURCE_ROUTE                = 62,  /* Source routing bit set              */
+    _SHR_RX_TIME_STAMP                  = 63,  /* Network time sync packet            */
+    _SHR_RX_TTL                         = 64,  /* TTL <= 0 or TTL < IPMC threshold    */
+    _SHR_RX_TTL1                        = 65,  /* L3UC or IPMC packet with TTL        */
+                                               /* equal to 1                          */
+    _SHR_RX_TUNNEL_ERROR                = 66,  /* Tunnel error trap                   */
+    _SHR_RX_UDP_CHECKSUM                = 67,  /* UDP checksum                        */
+    _SHR_RX_UNKNOWN_VLAN                = 68,  /* Unknown VLAN; VID = 0xfff;          */
+                                               /* CPU Learn bit (on 5690 devices)     */
+    _SHR_RX_URPF_FAIL                   = 69,  /* URPF Check Failed                   */
+    _SHR_RX_VC_LABEL_MISS               = 70,  /* VPLS table miss                     */
+    _SHR_RX_VLAN_FILTER_MATCH           = 71,  /* VLAN Filter Match                   */
+    _SHR_RX_WLAN_CLIENT_ERROR           = 72,  /* ROC error packets to the CPU        */
+    _SHR_RX_WLAN_SLOW_PATH              = 73,  /* WLAN packets slowpath to the CPU    */
+    _SHR_RX_WLAN_DOT1X_DROP             = 74,  /* WLAN client is unauthenticated      */
+    _SHR_RX_EXCEPTION_FLOOD             = 75,  /* Exception processing or flooding    */
+    _SHR_RX_TIMESYNC                    = 76,  /* Time Sync protocol packet           */
+    _SHR_RX_EAV_DATA                    = 77,  /* Ethernet AV data packet             */
+    _SHR_RX_SAME_PORT_BRIDGE            = 78,  /* Hairpin or Same port                */
+                                               /* switching/bridging                  */
+    _SHR_RX_SPLIT_HORIZON               = 79,  /* Basic bridging or VPLS Split        */
+                                               /* horizon                             */
+    _SHR_RX_L4_ERROR                    = 80,  /* TCP/UDP header or port number       */
+                                               /* errors                              */
+    _SHR_RX_STP                         = 81,  /* STP Ingress or Egress checks        */
+    _SHR_RX_EGRESS_FILTER_REDIRECT      = 82,  /* Vlan egress filter redirect         */
+    _SHR_RX_FILTER_REDIRECT             = 83,  /* Field processor redirect            */
+    _SHR_RX_LOOPBACK                    = 84,  /* Loopbacked                          */
+    _SHR_RX_VLAN_TRANSLATE              = 85,  /* VLAN translation table missed when  */
+                                               /* it is expected to hit               */
+    _SHR_RX_MMRP                        = 86,  /* Packet of type MMRP                 */
+    _SHR_RX_SRP                         = 87,  /* Packet of type SRP                  */
+    _SHR_RX_TUNNEL_CONTROL              = 88,  /* Tunnel control packet               */
+    _SHR_RX_L2_MARKED                   = 89,  /* L2 table marked                     */
+    _SHR_RX_WLAN_SLOWPATH_KEEPALIVE     = 90,  /* WLAN slowpath to the CPU,           */
+                                               /* otherwise dropped                   */
+    _SHR_RX_STATION                     = 91,  /* My Station packet to CPU            */
+    _SHR_RX_NIV                         = 92,  /* NIV packet                          */
+    _SHR_RX_NIV_PRIO_DROP               = 93,  /* NIV packet, priority drop           */
+    _SHR_RX_NIV_INTERFACE_MISS          = 94,  /* NIV packet, interface miss          */
+    _SHR_RX_NIV_RPF_FAIL                = 95,  /* NIV packet, RPF failed              */
+    _SHR_RX_NIV_TAG_INVALID             = 96,  /* NIV packet, invalid tag             */
+    _SHR_RX_NIV_TAG_DROP                = 97,  /* NIV packet, tag drop                */
+    _SHR_RX_NIV_UNTAG_DROP              = 98,  /* NIV packet, untagged drop           */
+    _SHR_RX_TRILL                       = 99,  /* TRILL packet                        */
+    _SHR_RX_TRILL_INVALID               = 100, /* TRILL packet, header error          */
+    _SHR_RX_TRILL_MISS                  = 101, /* TRILL packet, lookup miss           */
+    _SHR_RX_TRILL_RPF_FAIL              = 102, /* TRILL packet, RPF check failed      */
+    _SHR_RX_TRILL_SLOWPATH              = 103, /* TRILL packet, slowpath to CPU       */
+    _SHR_RX_TRILL_CORE_IS_IS            = 104, /* TRILL packet, Core IS-IS            */
+    _SHR_RX_TRILL_TTL                   = 105, /* TRILL packet, TTL check failed      */
+    _SHR_RX_BFD_SLOWPATH                = 106, /* The BFD packet is being fwd to the  */
+                                               /* local uC for processing             */
+    _SHR_RX_BFD                         = 107, /* BFD Error                           */
+    _SHR_RX_MIRROR                      = 108, /* Mirror packet                       */
+    _SHR_RX_REGEX_ACTION                = 109, /* Flow tracker                        */
+    _SHR_RX_REGEX_MATCH                 = 110, /* Signature Match                     */
+    _SHR_RX_FAILOVER_DROP               = 111, /* Protection drop data                */
+    _SHR_RX_WLAN_TUNNEL_ERROR           = 112, /* WLAN shim header error to CPU       */
+    _SHR_RX_CONGESTION_CNM_PROXY        = 113, /* Congestion CNM Proxy                */
+    _SHR_RX_CONGESTION_CNM_PROXY_ERROR  = 114, /* Congestion CNM Proxy Error          */
+    _SHR_RX_CONGESTION_CNM              = 115, /* Congestion CNM Internal Packet      */
+    _SHR_RX_MPLS_UNKNOWN_ACH            = 116, /* MPLS Unknown ACH                    */
+    _SHR_RX_MPLS_LOOKUPS_EXCEEDED       = 117, /* MPLS out of lookups                 */
+    _SHR_RX_MPLS_RESERVED_ENTROPY_LABEL = 118, /* MPLS Entropy label in unallowed     */
+                                               /* range                               */
+    _SHR_RX_MPLS_ILLEGAL_RESERVED_LABEL = 119, /* MPLS illegal reserved label         */
+    _SHR_RX_MPLS_ROUTER_ALERT_LABEL     = 120, /* MPLS alert label                    */
+    _SHR_RX_NIV_PRUNE                   = 121, /* NIV access port pruning (dst = src) */
+    _SHR_RX_VIRTUAL_PORT_PRUNE          = 122, /* SVP == DVP                          */
+    _SHR_RX_NON_UNICAST_DROP            = 123, /* Explicit multicast packet drop      */
+    _SHR_RX_TRILL_PACKET_PORT_MISMATCH  = 124, /* TRILL packet vs Rbridge port        */
+                                               /* conflict                            */
+    _SHR_RX_WLAN_CLIENT_MOVE            = 125, /* WLAN client moved                   */
+    _SHR_RX_WLAN_SOURCE_PORT_MISS       = 126, /* WLAN SVP miss                       */
+    _SHR_RX_WLAN_CLIENT_SOURCE_MISS     = 127, /* WLAN client database SA miss        */
+    _SHR_RX_WLAN_CLIENT_DEST_MISS       = 128, /* WLAN client database DA miss        */
+    _SHR_RX_WLAN_MTU                    = 129, /* WLAN MTU error                      */
+    _SHR_RX_TRILL_NAME                  = 130, /* TRILL packet, Name check failed     */
+    _SHR_RX_L2GRE_SIP_MISS              = 131, /* L2 GRE SIP miss                     */
+    _SHR_RX_L2GRE_VPN_ID_MISS           = 132, /* L2 GRE VPN id miss                  */
+    _SHR_RX_TIMESYNC_UNKNOWN_VERSION    = 133, /* Unknown version of IEEE1588         */
+    _SHR_RX_BFD_ERROR                   = 134, /* BFD ERROR                           */
+    _SHR_RX_BFD_UNKNOWN_VERSION         = 135, /* BFD UNKNOWN VERSION                 */
+    _SHR_RX_BFD_INVALID_VERSION         = 136, /* BFD INVALID VERSION                 */
+    _SHR_RX_BFD_LOOKUP_FAILURE          = 137, /* BFD LOOKUP FAILURE                  */
+    _SHR_RX_BFD_INVALID_PACKET          = 138, /* BFD INVALID PACKET                  */
+    _SHR_RX_VXLAN_SIP_MISS              = 139, /* Vxlan SIP miss                      */
+    _SHR_RX_VXLAN_VPN_ID_MISS           = 140, /* Vxlan VPN id miss                   */
+    _SHR_RX_FCOE_ZONE_CHECK_FAIL        = 141, /* Fcoe zone check failed              */
+    _SHR_RX_IPMC_INTERFACE_MISMATCH     = 142, /* IPMC input interface check failed   */
+    _SHR_RX_NAT                         = 143, /* NAT                                 */
+    _SHR_RX_TCP_UDP_NAT_MISS            = 144, /* TCP/UDP packet NAT lookup miss      */
+    _SHR_RX_ICMP_NAT_MISS               = 145, /* ICMP packet NAT lookup miss         */
+    _SHR_RX_NAT_FRAGMENT                = 146, /* NAT lookup on fragmented packet     */
+    _SHR_RX_NAT_MISS                    = 147, /* Non TCP/UDP/ICMP packet NAT lookup  */
+                                               /* miss                                */
+    _SHR_RX_UNKNOWN_SUBTENTING_PORT     = 148, /* UNKNOWN_SUBTENTING_PORT             */
+    _SHR_RX_LLTAG_ABSENT_DROP           = 149, /* LLTAG_ABSENT                        */
+    _SHR_RX_LLTAG_PRESENT_DROP          = 150, /* LLTAG_PRESENT                       */
+    _SHR_RX_OAM_CCM_SLOWPATH            = 151, /* OAM CCM packet copied to CPU        */
+    _SHR_RX_OAM_INCOMPLETE_OPCODE       = 152, /* OAM INCOMPLETE_OPCODE               */
+    _SHR_RX_BHH_OAM_PACKET              = 153, /* BHH OAM Packet                      */
+    _SHR_RX_RESERVED_0                  = 154, /* Broadcom Reserved                   */
+    _SHR_RX_OAM_MPLS_LMDM               = 155, /* MPLS LM/DM (RFC 6374) packet        */
+    _SHR_RX_SAT                         = 156, /* OAM SAT pkt                         */
+    _SHR_RX_SAMPLE_SOURCE_FLEX          = 157, /* Flexible sampled packets to CPU     */
+    _SHR_RX_FLEX_SFLOW                  = 158, /* Flex Sflow?                         */
+    _SHR_RX_VXLT_MISS                   = 159, /* VLAN Translation miss packet        */
+    _SHR_RX_TUNNEL_DECAP_ECN_ERROR      = 160, /* Tunnel decap ECN error              */
+    _SHR_RX_TUNNEL_OBJECT_VALIDATION_FAIL = 161, /* Tunnel Object Validation Fail     */
+    _SHR_RX_L3_CPU                      = 162, /* L3 Copy to CPU                      */
+    _SHR_RX_TUNNEL_ADAPT_LOOKUP_MISS    = 163, /* Tunnel Adapt Lookup Miss Drop       */
+    _SHR_RX_PACKET_FLOW_SELECT_MISS     = 164, /* Packet Flow Select Miss             */
+    _SHR_RX_PROTECTION_DATA_DROP        = 165, /* Protection Data Drop                */
+    _SHR_RX_PACKET_FLOW_SELECT          = 166, /* Packet Flow Select                  */
+    _SHR_RX_OTHER_LOOKUP_MISS           = 167, /* Neither Source or Dest type of      */
+                                               /* Lookup Miss                         */
+    _SHR_RX_INVALID_TPID                = 168, /* Invalid TPID                        */
+    _SHR_RX_MPLS_CONTROL_PACKET         = 169, /* MPLS Control Packet                 */
+    _SHR_RX_TUNNEL_TTL_ERROR            = 170, /* Tunnel TTL Error                    */
+    _SHR_RX_L2_HEADER_ERROR             = 171, /* L2 header                           */
+    _SHR_RX_OTHER_LOOKUP_HIT            = 172, /* Neither Source or Dest type of      */
+                                               /* Lookup Hit                          */
+    _SHR_RX_L2_SRC_LOOKUP_MISS          = 173, /* L2 Source Lookup Miss               */
+    _SHR_RX_L2_SRC_LOOKUP_HIT           = 174, /* L2 Source Lookup Hit                */
+    _SHR_RX_L2_DST_LOOKUP_MISS          = 175, /* L2 Dest Lookup Miss                 */
+    _SHR_RX_L2_DST_LOOKUP_HIT           = 176, /* L2 Dest Lookup Hit                  */
+    _SHR_RX_L3_SRC_ROUTE_LOOKUP_MISS    = 177, /* L3 Source Route Lookup Miss         */
+    _SHR_RX_L3_SRC_HOST_LOOKUP_MISS     = 178, /* L3 Source Host Lookup Miss          */
+    _SHR_RX_L3_SRC_ROUTE_LOOKUP_HIT     = 179, /* L3 Source Route Lookup Hit          */
+    _SHR_RX_L3_SRC_HOST_LOOKUP_HIT      = 180, /* L3 Source Host Lookup Hit           */
+    _SHR_RX_L3_DST_ROUTE_LOOKUP_MISS    = 181, /* L3 Dest Route Lookup Miss           */
+    _SHR_RX_L3_DST_HOST_LOOKUP_MISS     = 182, /* L3 Dest Host Lookup Miss            */
+    _SHR_RX_L3_DST_ROUTE_LOOKUP_HIT     = 183, /* L3 Dest Route Lookup Hit            */
+    _SHR_RX_L3_DST_HOST_LOOKUP_HIT      = 184, /* L3 Dest Host Lookup Hit             */
+    _SHR_RX_VLAN_TRANSLATE1_LOOKUP1_MISS = 185, /* VLAN Translate1 Lookup1 Miss       */
+    _SHR_RX_VLAN_TRANSLATE1_LOOKUP2_MISS = 186, /* VLAN Translate1 Lookup2 Miss       */
+    _SHR_RX_MPLS_LOOKUP1_MISS            = 187, /* MPLS Lookup1 Miss                  */
+    _SHR_RX_MPLS_LOOKUP2_MISS            = 188, /* MPLS Lookup2 Miss                  */
+    _SHR_RX_L3_TUNNEL_LOOKUP_MISS        = 189, /* L3 Tunnel Lookup Miss              */
+    _SHR_RX_VLAN_TRANSLATE2_LOOKUP1_MISS = 190, /* VLAN Translate2 Lookup1 Miss       */
+    _SHR_RX_VLAN_TRANSLATE2_LOOKUP2_MISS = 191, /* VLAN Translate2 Lookup2 Miss       */
+    _SHR_RX_L2_STU_FAIL                 = 192, /* L2 STU check fail                   */
+    _SHR_RX_SR_COUNTER_EXCEEDED         = 193, /* Seamless Redundancy(SR) -           */
+                                               /* Counter Threshold Exceeded          */
+    _SHR_RX_SR_COPY_TO_CPU_BIT0         = 194, /* Seamless Redundancy(SR) copy to CPU */
+                                               /* SR custom reason code bit 0         */
+    _SHR_RX_SR_COPY_TO_CPU_BIT1         = 195, /* SR custom reason code bit 1         */
+    _SHR_RX_SR_COPY_TO_CPU_BIT2         = 196, /* SR custom reason code bit 2         */
+    _SHR_RX_SR_COPY_TO_CPU_BIT3         = 197, /* SR custom reason code bit 3         */
+    _SHR_RX_SR_COPY_TO_CPU_BIT4         = 198, /* SR custom reason code bit 4         */
+    _SHR_RX_SR_COPY_TO_CPU_BIT5         = 199, /* SR custom reason code bit 5         */
+    _SHR_RX_L3_HEADER_MISMATCH          = 200, /* L3 Header Mismatch                  */
+    _SHR_RX_DLB_MONITOR                 = 201, /* DLB Monitor                         */
+    _SHR_RX_ETRAP_MONITOR               = 202, /* ETRAP Monitor                       */
+    _SHR_RX_INT_TURNAROUND              = 203, /* INT TurnAround                      */
+    _SHR_RX_INT_HOP_LIMIT               = 204, /* INT Hop Limit                       */
+    _SHR_RX_PROTECTION_STATUS_DOWN      = 205, /* Protection Status Down              */
+    _SHR_RX_SVTAG                       = 206, /* SVtag                               */
+    _SHR_RX_SVTAG_LOOKUP_MISS           = 207, /* SVtag Lookup Miss                   */
+    _SHR_RX_PKT_DROP_ON_PORT_HIGIG3_CHECK = 208, /* Port HIGIG3 check fail            */
+    _SHR_RX_SRV6_PROCESS_ERROR          = 209, /* SRV6 process error                  */
+    _SHR_RX_SRV6_VALIDATION_ERROR       = 210, /* SRV6 validation error               */
+    _SHR_RX_SRV6_UNKNOWN_RT_WITH_NONZERO_SL = 211, /* unknown routing type in SRV6    */
+                                                   /* packets with nonzero segment    */
+                                                   /* left field                      */
+    _SHR_RX_RCPU_TO_CPU                 = 212, /* RCPU copied to CPU                  */
+    _SHR_RX_REASON_COUNT                = 213  /* MUST BE LAST                        */
+} _shr_rx_reason_t;
+
+#define _SHR_RX_REASON_NAMES_INITIALIZER { \
+    "Invalid",                  \
+    "Arp",                      \
+    "Bpdu",                     \
+    "Broadcast",                \
+    "ClassBasedMove",           \
+    "ClassTagPackets",          \
+    "Control",                  \
+    "CpuLearn",                 \
+    "DestLookupFail",           \
+    "Dhcp",                     \
+    "DosAttack",                \
+    "E2eHolIbp",                \
+    "EncapHiGigError",          \
+    "FilterMatch",              \
+    "GreChecksum",              \
+    "GreSourceRoute",           \
+    "HigigControl",             \
+    "HigigHdrError",            \
+    "IcmpRedirect",             \
+    "Igmp",                     \
+    "IngressFilter",            \
+    "Ip",                       \
+    "IpfixRateViolation",       \
+    "IpMcastMiss",              \
+    "IpOptionVersion",          \
+    "Ipmc",                     \
+    "IpmcRsvd",                 \
+    "L2Cpu",                    \
+    "L2DestMiss",               \
+    "L2LearnLimit",             \
+    "L2Move",                   \
+    "L2MtuFail",                \
+    "L2NonUnicastMiss",         \
+    "L2SourceMiss",             \
+    "L3AddrBindFail",           \
+    "L3DestMiss",               \
+    "L3HeaderError",            \
+    "L3MtuFail",                \
+    "L3Slowpath",               \
+    "L3SourceMiss",             \
+    "L3SourceMove",             \
+    "MartianAddr",              \
+    "McastIdxError",            \
+    "McastMiss",                \
+    "MimServiceError",          \
+    "MplsCtrlWordError",        \
+    "MplsError",                \
+    "MplsInvalidAction",        \
+    "MplsInvalidPayload",       \
+    "MplsLabelMiss",            \
+    "MplsSequenceNumber",       \
+    "MplsTtl",                  \
+    "Multicast",                \
+    "Nhop",                     \
+    "OamError",                 \
+    "OamSlowPath",              \
+    "OamLMDM",                  \
+    "ParityError",              \
+    "Protocol",                 \
+    "SampleDest",               \
+    "SampleSource",             \
+    "SharedVlanMismatch",       \
+    "SourceRoute",              \
+    "TimeStamp",                \
+    "Ttl",                      \
+    "Ttl1",                     \
+    "TunnelError",              \
+    "UdpChecksum",              \
+    "UnknownVlan",              \
+    "UrpfFail",                 \
+    "VcLabelMiss",              \
+    "VlanFilterMatch",          \
+    "WlanClientError",          \
+    "WlanSlowPath",             \
+    "WlanDot1xDrop",            \
+    "ExceptionFlood",           \
+    "Timesync",                 \
+    "EavData",                  \
+    "SamePortBridge",           \
+    "SplitHorizon",             \
+    "L4Error",                  \
+    "Stp",                      \
+    "EgressFilterRedirect",     \
+    "FilterRedirect",           \
+    "Loopback",                 \
+    "VlanTranslate",            \
+    "Mmrp",                     \
+    "Srp",                      \
+    "TunnelControl",            \
+    "L2Marked",                 \
+    "WlanSlowpathKeepalive",    \
+    "Station",                  \
+    "Niv",                      \
+    "NivPrioDrop",              \
+    "NivInterfaceMiss",         \
+    "NivRpfFail",               \
+    "NivTagInvalid",            \
+    "NivTagDrop",               \
+    "NivUntagDrop",             \
+    "Trill",                    \
+    "TrillInvalid",             \
+    "TrillMiss",                \
+    "TrillRpfFail",             \
+    "TrillSlowpath",            \
+    "TrillCoreIsIs",            \
+    "TrillTtl",                 \
+    "BfdSlowpath",              \
+    "Bfd",                      \
+    "Mirror",                   \
+    "RegexAction",              \
+    "RegexMatch",               \
+    "FailoverDrop",             \
+    "WlanTunnelError",          \
+    "CongestionCnmProxy",       \
+    "CongestionCnmProxyError",  \
+    "CongestionCnm",            \
+    "MplsUnknownAch",           \
+    "MplsLookupsExceeded",      \
+    "MplsReservedEntropyLabel", \
+    "MplsIllegalReservedLabel", \
+    "MplsRouterAlertLabel",     \
+    "NivPrune",                 \
+    "VirtualPortPrune",         \
+    "NonUnicastDrop",           \
+    "TrillPacketPortMismatch",  \
+    "WlanClientMove",           \
+    "WlanSourcePortMiss",       \
+    "WlanClientSourceMiss",     \
+    "WlanClientDestMiss",       \
+    "WlanMtu",                  \
+    "TrillName",                \
+    "L2GreSipMiss",             \
+    "L2GreVpnIdMiss",           \
+    "TimesyncUnknownVersion",   \
+    "BfdError",                 \
+    "BfdUnknownVersion",        \
+    "BfdInvalidVersion",        \
+    "BfdLookupFailure",         \
+    "BfdInvalidPacket",         \
+    "VxlanSipMiss",             \
+    "VxlanVpnIdMiss",           \
+    "FcoeZoneCheckFail",        \
+    "IpmcInterfaceMismatch",    \
+    "Nat",                      \
+    "TcpUdpNatMiss",            \
+    "IcmpNatMiss",              \
+    "NatFragment",              \
+    "NatMiss",                  \
+    "UnknownSubtentingPort",    \
+    "LLTagAbsentDrop",          \
+    "LLTagpresenDrop",          \
+    "OAMCCMslowpath",           \
+    "OAMIncompleteOpcode",      \
+    "OAMCCMpacket",             \
+    "Reserved0",                \
+    "OAMMplsLmDM",              \
+    "SAT",                      \
+    "SampleSourceFlex",         \
+    "FlexSflow",                \
+    "VxltMiss",                 \
+    "TunnelDecapEcnError",      \
+    "TunnelObjectValidationFail",   \
+    "L3Cpu",                    \
+    "TunnelAdaptLookupMiss",    \
+    "PacketFlowSelectMiss",     \
+    "ProtectionDataDrop",       \
+    "PacketFlowSelect",         \
+    "OtherLookupMiss",          \
+    "InvalidTpid",              \
+    "MplsControlPacket",        \
+    "TunnelTtlError",           \
+    "L2HeaderError",            \
+    "OtherLookupHit",           \
+    "L2SrcLookupMiss",          \
+    "L2SrcLookupHit",           \
+    "L2DstLookupMiss",          \
+    "L2DstLookupHit",           \
+    "L3SrcRouteLookupMiss",     \
+    "L3SrcHostLookupMiss",      \
+    "L3SrcRouteLookupHit",      \
+    "L3SrcHostLookupHit",       \
+    "L3DstRouteLookupMiss",     \
+    "L3DstHostLookupMiss",      \
+    "L3DstRouteLookupHit",      \
+    "L3DstHostLookupHit",       \
+    "MplsLookup1Miss",          \
+    "MplsLookup2Miss",          \
+    "L3TunnelLookupMiss",       \
+    "VlanTranslate1Lookup1Miss",\
+    "VlanTranslate1Lookup2Miss",\
+    "VlanTranslate2Lookup1Miss",\
+    "VlanTranslate2Lookup2Miss",\
+    "L2StuFail",                \
+    "SrCounterExceeded",        \
+    "SrCopyToCpuBit0",          \
+    "SrCopyToCpuBit1",          \
+    "SrCopyToCpuBit2",          \
+    "SrCopyToCpuBit3",          \
+    "SrCopyToCpuBit4",          \
+    "SrCopyToCpuBit5",          \
+    "L3HeaderMismatch",         \
+    "DlbMonitor",               \
+    "EtrapMonitor",             \
+    "IntTurnAround",            \
+    "IntHopLimit",              \
+    "ProtectionStatusDown",     \
+    "Svtag",                    \
+    "SvtagLookupMiss",          \
+    "PktDropOnPortHigig3Check", \
+    "Srv6ProcessError",         \
+    "Srv6ValidationError",      \
+    "Srv6UnknownRoutingTypeWithNonZeroSl",   \
+    "RcpuToCpu",                \
+}
+
+/* Base type for declarations */
+#define    SHR_BITDCL        uint32
+#define    SHR_BITWID        32
+
+/* (internal) Number of SHR_BITDCLs needed to contain _max bits */
+#define    _SHR_BITDCLSIZE(_max)    (((_max) + SHR_BITWID - 1) / SHR_BITWID)
+
+/*
+ * Set of "reasons" (see _SHR_RX_*) why a packet came to the CPU.
+ */
+typedef struct _shr_rx_reasons_s {
+    SHR_BITDCL  pbits[_SHR_BITDCLSIZE(_SHR_RX_REASON_COUNT)];
+} _shr_rx_reasons_t;
+
+/*
+ * Macro to add a reason (_SHR_RX_*) to a set of
+ * reasons (_shr_rx_reasons_t)
+ */
+#define _SHR_RX_REASON_SET(_reasons, _reason) \
+        ((((_reasons).pbits)[(_reason) / SHR_BITWID]) |= (1U << ((_reason) % SHR_BITWID)))
+
+/*
+ * Macro to clear a set of reasons (_shr_rx_reasons_t).
+ */
+#define _SHR_RX_REASON_CLEAR_ALL(_reasons)      \
+{                                               \
+    SHR_BITDCL *_ptr;                           \
+    int _c = _SHR_RX_REASON_COUNT;              \
+                                                \
+    if (_c <= 0) {                              \
+        return;                                 \
+    }                                           \
+                                                \
+    _ptr = (((_reasons).pbits));                \
+                                                \
+    while (_c >= SHR_BITWID) {                  \
+        *(_ptr++) = 0;                          \
+        _c -= SHR_BITWID;                       \
+    }                                           \
+                                                \
+    if(_c > 0) {                                \
+        SHR_BITDCL _mask = ~0;                  \
+        _mask >>= (SHR_BITWID - _c);            \
+        *(_ptr) &= ~_mask;                      \
+    }                                           \
+}
+
+/*
+ * Macro to check if a reason (_SHR_RX_*) is included in a
+ * set of reasons (_shr_rx_reasons_t). Returns:
+ *   zero     => reason is not included in the set
+ *   non-zero => reason is included in the set
+ */
+#define _SHR_RX_REASON_GET(_reasons, _reason) \
+        ((((_reasons).pbits)[(_reason) / SHR_BITWID]) & (1U << ((_reason) % SHR_BITWID)))
+
+#define _SHR_RX_REASON_ITER(_reasons, reason) \
+    for(reason = _SHR_RX_INVALID; reason < (int)_SHR_RX_REASON_COUNT; reason++) \
+        if(_SHR_RX_REASON_GET(_reasons, reason))
+
+typedef enum _shr_rx_redirect_e { 
+    _SHR_RX_REDIRECT_NORMAL = 0, 
+    _SHR_RX_REDIRECT_HIGIG  = 1, 
+    _SHR_RX_REDIRECT_TRUNCATED = 2,
+    _SHR_RX_REDIRECT_MAX = _SHR_RX_REDIRECT_TRUNCATED
+} _shr_rx_redirect_e; 
+
+
+typedef enum _shr_rx_decap_tunnel_e {
+    _SHR_RX_DECAP_NONE            = 0,  /* No tunnel Decap */
+    _SHR_RX_DECAP_ACCESS_SVP      = 1,  /* Packet ingress on Access SVP (No decap) */
+    _SHR_RX_DECAP_MIM             = 2,  /* Decap Mac-in-Mac tunnel */
+    _SHR_RX_DECAP_L2GRE           = 3,  /* Decap L2GRE tunnel */
+    _SHR_RX_DECAP_VXLAN           = 4,  /* Decap VXLAN tunnel */
+    _SHR_RX_DECAP_AMT             = 5,  /* Decap AMT tunnel */
+    _SHR_RX_DECAP_IP              = 6,  /* Decap IP tunnel */
+    _SHR_RX_DECAP_TRILL           = 7,  /* Decap TRILL tunnel */
+    _SHR_RX_DECAP_L2MPLS_1LABEL   = 8,  /* Decap MPLS 1 Label, L2 payload, no
+                                           Control Word */
+    _SHR_RX_DECAP_L2MPLS_2LABEL   = 9,  /* Decap MPLS 2 Label, L2 payload, no
+                                           Control Word */
+    _SHR_RX_DECAP_L2MPLS_1LABELCW = 10, /* Decap MPLS 1 Label, L2 payload, Control
+                                           Word present */
+    _SHR_RX_DECAP_L2MPLS_2LABELCW = 11, /* Decap MPLS 2 Label, L2 payload, Control
+                                           Word present */
+    _SHR_RX_DECAP_L3MPLS_1LABEL   = 12, /* Decap MPLS 1 Label, L3 payload, no
+                                           Control Word present */
+    _SHR_RX_DECAP_L3MPLS_2LABEL   = 13, /* Decap MPLS 2 Label, L3 payload, no
+                                           Control Word present */
+    _SHR_RX_DECAP_L3MPLS_1LABELCW = 14, /* Decap MPLS 1 Label, L3 payload, Control
+                                           Word present */
+    _SHR_RX_DECAP_L3MPLS_2LABELCW = 15, /* Decap MPLS 2 Label, L3 payload, Control
+                                           Word present */
+    _SHR_RX_DECAP_WTP2AC          = 16, /* Decap WTP2AC Tunnel */
+    _SHR_RX_DECAP_AC2AC           = 17, /* Decap AC2AC Tunnel */
+    _SHR_RX_DECAP_MPLS_1LABELCW   = 18, /* Decap MPLS 1 Label, Control
+                                           Word present */
+    _SHR_RX_DECAP_MPLS_2LABELCW   = 19, /* Decap MPLS 2 Label, Control
+                                           Word present */
+    _SHR_RX_DECAP_MPLS_1LABEL     = 20,  /* Decap MPLS 1 Label, no
+                                           Control Word */
+    _SHR_RX_DECAP_MPLS_2LABEL     = 21,  /* Decap MPLS 2 Label, no
+                                           Control Word */
+    _SHR_RX_DECAP_MPLS_3LABEL     = 22,  /* Decap MPLS 3 Label, no Control
+                                            Word */
+    _SHR_RX_DECAP_MPLS_3LABELCW   = 23,  /* Decap MPLS 3 Label, Control
+                                            Word present */
+    _SHR_RX_DECAP_MPLS_3LABEL_ENTROPY   = 25,  /* Decap MPLS 3 Label + entropy,
+                                                 no Control Word */
+    _SHR_RX_DECAP_MPLS_3LABEL_ENTROPYCW = 26,  /* Decap MPLS 3 Label + entropy,
+                                                 Control Word present */
+    _SHR_RX_DECAP_COUNT                = 27   /* Decap Tunnel Max */
+} _shr_rx_decap_tunnel_t;
+
+typedef enum _shr_rx_decap_hdr_e {
+    _SHR_RX_DECAP_HDR_NONE         = 0,  /* No headers Decapped */
+    _SHR_RX_DECAP_SYSTEM_HDR       = 1,  /* Decap System Header */
+    _SHR_RX_DECAP_OUTER_L2_HDR     = 2,  /* Decap Outer L2 Header */
+    _SHR_RX_DECAP_L3_L4_TUNNEL_HDR = 4,  /* Decap Outer L3/L4/TUNNEL Header */
+    _SHR_RX_DECAP_INNER_L2_HDR     = 8,  /* Decap Inner L2 Header */
+    _SHR_RX_DECAP_INNER_L3_L4_HDR  = 16, /* Decap Inner L3 and L4 Header */
+    _SHR_RX_DECAP_HDR_MAX          = _SHR_RX_DECAP_INNER_L3_L4_HDR /* Max Value */
+} _shr_rx_decap_hdr_t;
+
+#endif /* _SHR_RX_H_ */
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/dcb.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/dcb.h
new file mode 100644
index 000000000..2ec41adad
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/dcb.h
@@ -0,0 +1,354 @@
+/*
+ * $Id: dcb.h,v 1.32 Broadcom SDK $
+ * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * 
+ * Permission is granted to use, copy, modify and/or distribute this
+ * software under either one of the licenses below.
+ * 
+ * License Option 1: GPL
+ * 
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License, version 2, as
+ * published by the Free Software Foundation (the "GPL").
+ * 
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License version 2 (GPLv2) for more details.
+ * 
+ * You should have received a copy of the GNU General Public License
+ * version 2 (GPLv2) along with this source code.
+ * 
+ * 
+ * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
+ * 
+ * This software is governed by the Broadcom Open Network Switch APIs license:
+ * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+ * 
+ *
+ * File:        soc/dcb.h
+ * Purpose:     Define dma control block (DCB) operations
+ *              A uniform set of operations is defined here and loaded
+ *              into SOC_CONTROL during initialization.
+ */
+
+#ifndef _SOC_DCB_H
+#define _SOC_DCB_H
+
+#include <soc/types.h>
+#include <soc/rx.h>
+
+typedef void    dcb_t;
+struct dv_s;            /* in soc/dma.h, but we have recursive problems */
+
+#ifdef INCLUDE_KNET
+/*
+ * On XGS devices bit 15 fo the Transferred Bytes field in
+ * the DCBs is used to indicate that kernel processing is
+ * complete. Using this bit reduces the theoretically maximum
+ * supported packet size from 64K to 32K, but this is still
+ * adequate for 16K jumbo packets.
+ */
+#define SOC_DCB_KNET_DONE       0x8000
+
+#endif
+
+/*
+ * DCB Operations
+ */
+
+typedef struct dcb_op_s {
+    int         dcbtype;
+    int         dcbsize;
+    soc_rx_reason_t **rx_reason_maps;
+    soc_rx_reason_t * (*rx_reason_map_get)(struct dcb_op_s *dcb_op, dcb_t *dcb);
+    void        (*rx_reasons_get)(struct dcb_op_s *dcb_op, dcb_t *dcb,
+                                  soc_rx_reasons_t *reasons);
+    void        (*init)(dcb_t *dcb);
+    /* composite helper functions */
+    int         (*addtx)(struct dv_s *dv, sal_vaddr_t addr, uint32 count,
+                         pbmp_t l2pbm, pbmp_t utpbm, pbmp_t l3pbm,
+                         uint32 flags, uint32 *hgh);
+    int         (*addrx)(struct dv_s *dv, sal_vaddr_t addr, uint32 count,
+                         uint32 flags);
+    uint32      (*intrinfo)(int unit, dcb_t *dcb, int tx, uint32 *count);
+    /* basic dcb values */
+    void        (*reqcount_set)(dcb_t *dcb, uint32 count);
+    uint32      (*reqcount_get)(dcb_t *dcb);
+    uint32      (*xfercount_get)(dcb_t *dcb);
+    void        (*addr_set)(int unit, dcb_t *dcb, sal_vaddr_t addr);
+    sal_vaddr_t (*addr_get)(int unit, dcb_t *dcb);
+    sal_paddr_t (*paddr_get)(dcb_t *dcb);
+    void        (*done_set)(dcb_t *dcb, int val);
+    uint32      (*done_get)(dcb_t *dcb);
+    void        (*sg_set)(dcb_t *dcb, int val);
+    uint32      (*sg_get)(dcb_t *dcb);
+    void        (*chain_set)(dcb_t *dcb, int val);
+    uint32      (*chain_get)(dcb_t *dcb);
+    void        (*reload_set)(dcb_t *dcb, int val);
+    uint32      (*reload_get)(dcb_t *dcb);
+    void        (*desc_intr_set)(dcb_t *dcb, int val);
+    uint32      (*desc_intr_get)(dcb_t *dcb);
+    /* transmit dcb controls */
+    void        (*tx_l2pbm_set)(dcb_t *dcb, pbmp_t pbm);
+    void        (*tx_utpbm_set)(dcb_t *dcb, pbmp_t pbm);
+    void        (*tx_l3pbm_set)(dcb_t *dcb, pbmp_t pbm);
+    void        (*tx_crc_set)(dcb_t *dcb, int crc);
+    void        (*tx_cos_set)(dcb_t *dcb, int cos);
+    void        (*tx_destmod_set)(dcb_t *dcb, uint32 modid);
+    void        (*tx_destport_set)(dcb_t *dcb, uint32 port);
+    void        (*tx_opcode_set)(dcb_t *dcb, uint32 opcode);
+    void        (*tx_srcmod_set)(dcb_t *dcb, uint32 modid);
+    void        (*tx_srcport_set)(dcb_t *dcb, uint32 port);
+    void        (*tx_prio_set)(dcb_t *dcb, uint32 prio);
+    void        (*tx_pfm_set)(dcb_t *dcb, uint32 pfm);
+
+    /* receive dcb controls */
+    uint32      (*rx_untagged_get)(dcb_t *dcb, int dt_mode, int ingport_is_hg);
+    uint32      (*rx_crc_get)(dcb_t *dcb);
+    uint32      (*rx_cos_get)(dcb_t *dcb);
+    uint32      (*rx_destmod_get)(dcb_t *dcb);
+    uint32      (*rx_destport_get)(dcb_t *dcb);
+    uint32      (*rx_opcode_get)(dcb_t *dcb);
+    uint32      (*rx_classtag_get)(dcb_t *dcb);
+    uint32      (*rx_matchrule_get)(dcb_t *dcb);
+    uint32      (*rx_start_get)(dcb_t *dcb);
+    uint32      (*rx_end_get)(dcb_t *dcb);
+    uint32      (*rx_error_get)(dcb_t *dcb);
+    uint32      (*rx_prio_get)(dcb_t *dcb);
+    uint32      (*rx_reason_get)(dcb_t *dcb);
+    uint32      (*rx_reason_hi_get)(dcb_t *dcb);
+    uint32      (*rx_ingport_get)(dcb_t *dcb);
+    uint32      (*rx_srcport_get)(dcb_t *dcb);
+    uint32      (*rx_srcmod_get)(dcb_t *dcb);
+    uint32      (*rx_mcast_get)(dcb_t *dcb);
+    uint32      (*rx_vclabel_get)(dcb_t *dcb);
+    uint32      (*rx_mirror_get)(dcb_t *dcb);
+    uint32      (*rx_timestamp_get)(dcb_t *dcb);
+    uint32      (*rx_timestamp_upper_get)(dcb_t *dcb);
+    void        (*hg_set)(dcb_t *dcb, uint32 hg);
+    uint32      (*hg_get)(dcb_t *dcb);
+    void        (*stat_set)(dcb_t *dcb, uint32 stat);
+    uint32      (*stat_get)(dcb_t *dcb);
+    void        (*purge_set)(dcb_t *dcb, uint32 purge);
+    uint32      (*purge_get)(dcb_t *dcb);
+    uint32 *    (*mhp_get)(dcb_t *dcb);
+    uint32      (*rx_outer_vid_get)(dcb_t *dcb);
+    uint32      (*rx_outer_pri_get)(dcb_t *dcb);
+    uint32      (*rx_outer_cfi_get)(dcb_t *dcb);
+    uint32      (*rx_outer_tag_action_get)(dcb_t *dcb);
+    uint32      (*rx_inner_vid_get)(dcb_t *dcb);
+    uint32      (*rx_inner_pri_get)(dcb_t *dcb);
+    uint32      (*rx_inner_cfi_get)(dcb_t *dcb);
+    uint32      (*rx_inner_tag_action_get)(dcb_t *dcb);
+    uint32      (*rx_bpdu_get)(dcb_t *dcb);
+    uint32      (*rx_l3_intf_get)(dcb_t *dcb);
+    uint32      (*rx_decap_tunnel_get)(dcb_t *dcb);
+    uint32      (*rx_switch_drop_get)(dcb_t *dcb);
+    uint32      (*olp_encap_oam_pkt_get)(dcb_t *dcb);
+    uint32      (*read_ecc_error_get)(dcb_t *dcb);
+    uint32      (*desc_remaining_get)(dcb_t *dcb);
+    uint32      (*desc_remaining_set)(dcb_t *dcb, uint32 val);
+    uint32      (*desc_status_get)(dcb_t *dcb);
+    uint32      (*desc_status_set)(dcb_t *dcb, uint32 val);
+    uint32      (*rx_hg2_ext_eh_type_get)(dcb_t *dcb);
+} dcb_op_t;
+
+#define SOC_DCB(_u)             SOC_CONTROL(_u)->dcb_op
+
+#define SOC_DCB_TYPE(_u)        SOC_DCB(_u)->dcbtype
+#define SOC_DCB_SIZE(_u)        SOC_DCB(_u)->dcbsize
+
+#define SOC_DCB_RX_REASON_MAPS( _u)  SOC_DCB(_u)->rx_reason_maps
+
+#define SOC_DCB_INIT(_u, _dcb)  SOC_DCB(_u)->init(_dcb)
+#define SOC_DCB_ADDTX(_u, _dv, _addr, _count, _l2pbm, _utpbm, _l3pbm, _f, _hgh) \
+        SOC_DCB(_u)->addtx(_dv, _addr, _count, _l2pbm, _utpbm, _l3pbm, _f, _hgh)
+#define SOC_DCB_ADDRX(_u, _dv, _addr, _count, _f)       \
+        SOC_DCB(_u)->addrx(_dv, _addr, _count, _f)
+#define SOC_DCB_INTRINFO(_u, _dcb, _tx, _countp)        \
+        SOC_DCB(_u)->intrinfo(_u, _dcb, _tx, _countp)
+
+/* flags returned from INTRINFO */
+#define SOC_DCB_INFO_DONE       0x02
+#define SOC_DCB_INFO_PKTEND     0x01
+
+#define SOC_DCB_REQCOUNT_SET(_u, _dcb, _count)  \
+        SOC_DCB(_u)->reqcount_set(_dcb, _count)
+#define SOC_DCB_REQCOUNT_GET(_u, _dcb)          \
+        SOC_DCB(_u)->reqcount_get(_dcb)
+#ifdef INCLUDE_KNET
+/* Mask off indicator for kernel processing done */
+#define SOC_DCB_XFERCOUNT_GET(_u, _dcb)         \
+        (SOC_DCB(_u)->xfercount_get(_dcb) & ~SOC_DCB_KNET_DONE)
+#else
+#define SOC_DCB_XFERCOUNT_GET(_u, _dcb)         \
+        SOC_DCB(_u)->xfercount_get(_dcb)
+#endif
+#define SOC_DCB_ADDR_SET(_u, _dcb, _addr)       \
+        SOC_DCB(_u)->addr_set(_u, _dcb, _addr)
+#define SOC_DCB_ADDR_GET(_u, _dcb)              \
+        SOC_DCB(_u)->addr_get(_u, _dcb)
+#define SOC_DCB_PADDR_GET(_u, _dcb)             \
+        SOC_DCB(_u)->paddr_get(_dcb)
+#define SOC_DCB_DONE_SET(_u, _dcb, _val)        \
+        SOC_DCB(_u)->done_set(_dcb, _val)
+#define SOC_DCB_DONE_GET(_u, _dcb)              \
+        SOC_DCB(_u)->done_get(_dcb)
+#define SOC_DCB_SG_SET(_u, _dcb, _val)          \
+        SOC_DCB(_u)->sg_set(_dcb, _val)
+#define SOC_DCB_SG_GET(_u, _dcb)                \
+        SOC_DCB(_u)->sg_get(_dcb)
+#define SOC_DCB_CHAIN_SET(_u, _dcb, _val)       \
+        SOC_DCB(_u)->chain_set(_dcb, _val)
+#define SOC_DCB_CHAIN_GET(_u, _dcb)             \
+        SOC_DCB(_u)->chain_get(_dcb)
+#define SOC_DCB_RELOAD_SET(_u, _dcb, _val)      \
+        SOC_DCB(_u)->reload_set(_dcb, _val)
+#define SOC_DCB_RELOAD_GET(_u, _dcb)            \
+        SOC_DCB(_u)->reload_get(_dcb)
+
+#define SOC_DCB_ALL_DESC_INTR      0x1
+#define SOC_DCB_CNTLD_DESC_INTR    0x2
+
+#define SOC_DCB_DESC_INTR_SET(_u, _dcb, _val)   \
+        SOC_DCB(_u)->desc_intr_set(_dcb, _val)
+#define SOC_DCB_DESC_INTR_GET(_u, _dcb)         \
+        SOC_DCB(_u)->desc_intr_get(_dcb)
+
+#define SOC_DCB_TX_L2PBM_SET(_u, _dcb, _pbm)    \
+        SOC_DCB(_u)->tx_l2pbm_set(_dcb, _pbm)
+#define SOC_DCB_TX_UTPBM_SET(_u, _dcb, _pbm)    \
+        SOC_DCB(_u)->tx_utpbm_set(_dcb, _pbm)
+#define SOC_DCB_TX_L3PBM_SET(_u, _dcb, _pbm)    \
+        SOC_DCB(_u)->tx_l3pbm_set(_dcb, _pbm)
+#define SOC_DCB_TX_CRC_SET(_u, _dcb, _val)      \
+        SOC_DCB(_u)->tx_crc_set(_dcb, _val)
+#define SOC_DCB_TX_COS_SET(_u, _dcb, _val)      \
+        SOC_DCB(_u)->tx_cos_set(_dcb, _val)
+#define SOC_DCB_TX_DESTMOD_SET(_u, _dcb, _val)  \
+        SOC_DCB(_u)->tx_destmod_set(_dcb, _val)
+#define SOC_DCB_TX_DESTPORT_SET(_u, _dcb, _val) \
+        SOC_DCB(_u)->tx_destport_set(_dcb, _val)
+#define SOC_DCB_TX_OPCODE_SET(_u, _dcb, _val)   \
+        SOC_DCB(_u)->tx_opcode_set(_dcb, _val)
+#define SOC_DCB_TX_SRCMOD_SET(_u, _dcb, _val)   \
+        SOC_DCB(_u)->tx_srcmod_set(_dcb, _val)
+#define SOC_DCB_TX_SRCPORT_SET(_u, _dcb, _val)  \
+        SOC_DCB(_u)->tx_srcport_set(_dcb, _val)
+#define SOC_DCB_TX_PRIO_SET(_u, _dcb, _val)     \
+        SOC_DCB(_u)->tx_prio_set(_dcb, _val)
+#define SOC_DCB_TX_PFM_SET(_u, _dcb, _val)      \
+        SOC_DCB(_u)->tx_pfm_set(_dcb, _val)
+
+#define SOC_DCB_RX_UNTAGGED_GET(_u, _dcb)       \
+        SOC_DCB(_u)->rx_untagged_get(_dcb,      \
+        SOC_DT_MODE(_u), IS_HG_PORT(_u, SOC_DCB_RX_INGPORT_GET(_u, _dcb)))
+#define SOC_DCB_RX_CRC_GET(_u, _dcb)            \
+        SOC_DCB(_u)->rx_crc_get(_dcb)
+#define SOC_DCB_RX_COS_GET(_u, _dcb)            \
+        SOC_DCB(_u)->rx_cos_get(_dcb)
+#define SOC_DCB_RX_DESTMOD_GET(_u, _dcb)        \
+        SOC_DCB(_u)->rx_destmod_get(_dcb)
+#define SOC_DCB_RX_DESTPORT_GET(_u, _dcb)       \
+        SOC_DCB(_u)->rx_destport_get(_dcb)
+#define SOC_DCB_RX_OPCODE_GET(_u, _dcb)         \
+        SOC_DCB(_u)->rx_opcode_get(_dcb)
+#define SOC_DCB_RX_CLASSTAG_GET(_u, _dcb)       \
+        SOC_DCB(_u)->rx_classtag_get(_dcb)
+#define SOC_DCB_RX_MATCHRULE_GET(_u, _dcb)      \
+        SOC_DCB(_u)->rx_matchrule_get(_dcb)
+#define SOC_DCB_OLP_ENCAP_OAM_PKT_GET(_u, _dcb) \
+        SOC_DCB(_u)->olp_encap_oam_pkt_get(_dcb)
+#define SOC_DCB_READ_ECC_ERROR_GET(_u, _dcb)    \
+        SOC_DCB(_u)->read_ecc_error_get(_dcb)
+#define SOC_DCB_DESC_REMAINING_GET(_u, _dcb)    \
+        SOC_DCB(_u)->desc_remaining_get(_dcb)
+#define SOC_DCB_DESC_REMAINING_SET(_u, _dcb, _val)    \
+        SOC_DCB(_u)->desc_remaining_set(_dcb, _val)
+#define SOC_DCB_DESC_STATUS_GET(_u, _dcb)       \
+        SOC_DCB(_u)->desc_status_get(_dcb)
+#define SOC_DCB_DESC_STATUS_SET(_u, _dcb)       \
+        SOC_DCB(_u)->desc_status_set(_dcb)
+#define SOC_DCB_RX_START_GET(_u, _dcb)          \
+        SOC_DCB(_u)->rx_start_get(_dcb)
+#define SOC_DCB_RX_END_GET(_u, _dcb)            \
+        SOC_DCB(_u)->rx_end_get(_dcb)
+#define SOC_DCB_RX_ERROR_GET(_u, _dcb)          \
+        SOC_DCB(_u)->rx_error_get(_dcb)
+#define SOC_DCB_RX_PRIO_GET(_u, _dcb)           \
+        SOC_DCB(_u)->rx_prio_get(_dcb)
+#define SOC_DCB_RX_REASON_GET(_u, _dcb)         \
+        SOC_DCB(_u)->rx_reason_get(_dcb)
+#define SOC_DCB_RX_REASON_HI_GET(_u, _dcb)      \
+        SOC_DCB(_u)->rx_reason_hi_get(_dcb)
+#define SOC_DCB_RX_REASONS_GET(_u, _dcb, _reasons)  \
+        SOC_DCB(_u)->rx_reasons_get(SOC_DCB(_u), _dcb, _reasons)
+#define SOC_DCB_RX_INGPORT_GET(_u, _dcb)        \
+        SOC_DCB(_u)->rx_ingport_get(_dcb)
+#define SOC_DCB_RX_SRCPORT_GET(_u, _dcb)        \
+        SOC_DCB(_u)->rx_srcport_get(_dcb)
+#define SOC_DCB_RX_SRCMOD_GET(_u, _dcb)         \
+        SOC_DCB(_u)->rx_srcmod_get(_dcb)
+#define SOC_DCB_RX_MCAST_GET(_u, _dcb)          \
+        SOC_DCB(_u)->rx_mcast_get(_dcb)
+#define SOC_DCB_RX_VCLABEL_GET(_u, _dcb)        \
+        SOC_DCB(_u)->rx_vclabel_get(_dcb)
+#define SOC_DCB_RX_MIRROR_GET(_u, _dcb)         \
+        SOC_DCB(_u)->rx_mirror_get(_dcb)
+#define SOC_DCB_RX_TIMESTAMP_GET(_u, _dcb)      \
+        SOC_DCB(_u)->rx_timestamp_get(_dcb)
+#define SOC_DCB_RX_TIMESTAMP_UPPER_GET(_u, _dcb)      \
+        SOC_DCB(_u)->rx_timestamp_upper_get(_dcb)
+
+#define SOC_DCB_HG_SET(_u, _dcb, _val)          \
+        SOC_DCB(_u)->hg_set(_dcb, _val)
+#define SOC_DCB_HG_GET(_u, _dcb)                \
+        SOC_DCB(_u)->hg_get(_dcb)
+#define SOC_DCB_STAT_SET(_u, _dcb, _val)        \
+        SOC_DCB(_u)->stat_set(_dcb, _val)
+#define SOC_DCB_STAT_GET(_u, _dcb)              \
+        SOC_DCB(_u)->stat_get(_dcb)
+#define SOC_DCB_PURGE_SET(_u, _dcb, _val)       \
+        SOC_DCB(_u)->purge_set(_dcb, _val)
+#define SOC_DCB_PURGE_GET(_u, _dcb)             \
+        SOC_DCB(_u)->purge_get(_dcb)
+
+#define SOC_DCB_MHP_GET(_u, _dcb)               \
+        SOC_DCB(_u)->mhp_get(_dcb)
+#define SOC_DCB_RX_OUTER_VID_GET(_u, _dcb)      \
+        SOC_DCB(_u)->rx_outer_vid_get(_dcb)
+#define SOC_DCB_RX_OUTER_PRI_GET(_u, _dcb)      \
+        SOC_DCB(_u)->rx_outer_pri_get(_dcb)
+#define SOC_DCB_RX_OUTER_CFI_GET(_u, _dcb)      \
+        SOC_DCB(_u)->rx_outer_cfi_get(_dcb)
+#define SOC_DCB_RX_OUTER_TAG_ACTION_GET(_u, _dcb)     \
+        SOC_DCB(_u)->rx_outer_tag_action_get(_dcb)
+#define SOC_DCB_RX_INNER_VID_GET(_u, _dcb)      \
+        SOC_DCB(_u)->rx_inner_vid_get(_dcb)
+#define SOC_DCB_RX_INNER_PRI_GET(_u, _dcb)      \
+        SOC_DCB(_u)->rx_inner_pri_get(_dcb)
+#define SOC_DCB_RX_INNER_CFI_GET(_u, _dcb)      \
+        SOC_DCB(_u)->rx_inner_cfi_get(_dcb)
+#define SOC_DCB_RX_INNER_TAG_ACTION_GET(_u, _dcb)     \
+        SOC_DCB(_u)->rx_inner_tag_action_get(_dcb)
+#define SOC_DCB_RX_BPDU_GET(_u, _dcb)           \
+        SOC_DCB(_u)->rx_bpdu_get(_dcb)
+#define SOC_DCB_RX_L3_INTF_GET(_u, _dcb)           \
+        SOC_DCB(_u)->rx_l3_intf_get(_dcb)
+#define SOC_DCB_RX_DECAP_TUNNEL_GET(_u, _dcb)   \
+        SOC_DCB(_u)->rx_decap_tunnel_get(_dcb)
+#define SOC_DCB_RX_SWITCH_DROP_GET(_u, _dcb)   \
+        SOC_DCB(_u)->rx_switch_drop_get(_dcb)
+
+#define SOC_DCB_RX_HG2_EXT_EH_TYPE_GET(_u, _dcb)       \
+        SOC_DCB(_u)->rx_hg2_ext_eh_type_get(_dcb)
+
+#define SOC_DCB_IDX2PTR(_u, _dcb, _i) \
+        (dcb_t *)((char *)_dcb + (SOC_DCB_SIZE(_u) * (_i)))
+#define SOC_DCB_PTR2IDX(_u, _dcb1, _dcb2) \
+        (int)(((char *)_dcb1 - (char *)_dcb2) / SOC_DCB_SIZE(_u))
+
+extern void     soc_dcb_unit_init(int unit);
+
+#endif  /* _SOC_DCB_H */
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/dcbformats.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/dcbformats.h
new file mode 100644
index 000000000..80f6481c6
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/dcbformats.h
@@ -0,0 +1,552 @@
+/*
+ * $Id$
+ * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * 
+ * Permission is granted to use, copy, modify and/or distribute this
+ * software under either one of the licenses below.
+ * 
+ * License Option 1: GPL
+ * 
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License, version 2, as
+ * published by the Free Software Foundation (the "GPL").
+ * 
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License version 2 (GPLv2) for more details.
+ * 
+ * You should have received a copy of the GNU General Public License
+ * version 2 (GPLv2) along with this source code.
+ * 
+ * 
+ * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
+ * 
+ * This software is governed by the Broadcom Open Network Switch APIs license:
+ * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+ * 
+ *
+ * File:        soc/dcbformats.h
+ * Purpose:     Define dma control block (DCB) formats for various chips.
+ *              This information is only needed in soc/dcb.c, which
+ *              provides a uniform interface to the reset of software
+ *              for controlling DCBs.
+ *
+ * There are currently 32 DMA Control block formats
+ * (also known as DMA descriptors):
+ *
+ *      Type 2          5670/75 (TX)
+ *      Type 3          5690 aka DRACO1
+ *      Type 4          5670/75 (RX) aka HERCULES
+ *      Type 5          5673 aka LYNX
+ *      Type 6          5665 aka TUCANA
+ *      Type 7          5695 aka DRACO15
+ *      Type 9          56504 aka XGS3 (Firebolt)
+ *      Type 10         56601 aka XGS3 (Easyrider)
+ *      Type 11         56800 aka XGS3 (HUMV)
+ *      Type 12         56218 aka XGS3 (Raptor) (Derived from DCB 9)
+ *      Type 13         56514 aka XGS3 (Firebolt2) (Derived from DCB 9)
+ *      Type 14         56624 & 56680 aka XGS3 (Triumph & Valkyrie)
+ *      Type 15         56224 aka XGS3 (Raven A0) (Derived from DCB 12)
+ *      Type 16         56820 aka XGS3 (Scorpion)
+ *      Type 17         53314 aka XGS3 (Hawkeye) (Derived from DCB 15)
+ *      Type 18         56224 aka XGS3 (Raven B0) (Derived from DCB 15)
+ *      Type 19         56634/56524/56685 aka XGS3 (Triumph2/Apollo/Valkyrie2)
+ *      Type 20         56334 aka XGS3 (Enduro) (Derived from DCB 19)
+ *      Type 21         56840 aka XGS3 (Trident)
+ *      Type 23         56640 aka XGS3 (Triumph3)
+ *      Type 24         56440 aka XGS3 (Katana)
+ *      Type 25         Obsolete 88030 aka SBX Caladan3
+ *      Type 26         56850 aka XGS3 (Trident2) (Derived from DCB 23)
+ *      Type 27         Obsolete 88230 aka SBX Sirius
+ *      Type 29         56450 aka XGX3 (Katana2)
+ *      Type 31         53400 aka XGX3 (Greyhound)
+ *      Type 32         56960 aka XGX3 (Tomahawk) (Derived from DCB 26)
+ *      Type 33         56860 aka XGS3 (Trident2+) (Derived from DCB 26)
+ *      Type 34         56160 aka XGX3 (Hurricane3)
+ *      Type 35         56560 APACHE
+ *      Type 36         56870 (Trident 3)
+ *      Type 37         53570 aka XGX3 (Greyhound2)
+ *      Type 38         56980 (Tomahawk 3)
+ *
+ * The 5670/75 uses two different formats depending on whether the DCB is
+ * for transmit or receive.
+ *
+ * The 5695 can be configured to use type 3 or type 7 depending on whether
+ * CMIC_CONFIG.EXTENDED_DCB_ENABLE is set or not.
+ */
+
+#ifndef _SOC_DCBFORMATS_H
+#define _SOC_DCBFORMATS_H
+
+#include <soc/types.h>
+#include <soc/defs.h>
+
+#define DCB_STRATA_OPTIM_PURGE  3
+#define DCB_STRATA_CRC_LEAVE    0
+#define DCB_STRATA_CRC_REGEN    2
+#define DCB_XGS_CRC_LEAVE       0
+#define DCB_XGS_CRC_REGEN       1
+
+#define DCB_MAX_REQCOUNT        0x7fff          /* 32KB */
+#define DCB_MAX_SIZE            (16*4)          /* type 14 */
+
+#if defined(BCM_XGS3_SWITCH_SUPPORT)
+/*
+ * DMA Control Block - Type 9
+ * Used on 56504 devices
+ * 11 words
+ */
+typedef struct {
+        uint32  addr;                   /* T9.0: physical address */
+                                        /* T9.1: Control 0 */
+#ifdef  LE_HOST
+        uint32  c_count:16,             /* Requested byte count */
+                c_chain:1,              /* Chaining */
+                c_sg:1,                 /* Scatter Gather */
+                c_reload:1,             /* Reload */
+                c_hg:1,                 /* Higig (TX) */
+                c_stat:1,               /* update stats (TX) */
+                c_pause:1,              /* Pause packet (TX) */
+                c_purge:1,              /* Purge packet (TX) */
+                :9;                     /* Don't care */
+#else
+        uint32  :9,                     /* Don't care */
+                c_purge:1,              /* Purge packet (TX) */
+                c_pause:1,
+                c_stat:1,
+                c_hg:1,
+                c_reload:1,
+                c_sg:1,
+                c_chain:1,
+                c_count:16;
+#endif  /* LE_HOST */
+        uint32  mh0;                    /* T9.2: Module Header word 0 */
+        uint32  mh1;                    /* T9.3: Module Header word 1 */
+        uint32  mh2;                    /* T9.4: Module Header word 2 */
+#ifdef  LE_HOST
+                                        /* T9.5: RX Status 0 */
+        uint32  mtp_index_hi:5,         /* Mirror-to-Port Index */
+                l3uc:1,                 /* L3 UC */
+                l3only:1,               /* L3 only */
+                l3ipmc:1,               /* L3 IPMC */
+                l3_intf:12,             /* L3 Intf number */
+                imirror:1,              /* Ingress Mirroring */
+                emirror:1,              /* Egress Mirroring */
+                cos:3,                  /* Packet Priority */
+                cpu_cos:3,              /* CPU COS */
+                chg_tos:1,              /* DSCP Changed */
+                cell_error:1,           /* Cell CRC Checksum Error Detected */
+                bpdu:1,                 /* BPDU Packet */
+                add_vid:1;              /* VLAN ID Added */
+                                        /* T9.6: RX Status 1 */
+        uint32  reason:25,              /* CPU opcode */
+                regen_crc:1,            /* Regenerate CRC */
+                switch_pkt:1,           /* Switched packet */
+                src_hg:1,               /* Source is Higig */
+                purge_cell:1,           /* Packet is marked Purged */
+                pkt_aged:1,             /* Pkt is Aged */
+                mtp_index_lo:2;         /* Mirror-to-Port Index */
+                                        /* T9.7: RX Status 2 */
+        uint32  dscp_hi:2,              /* New DSCP */
+                srcport:5,              /* Source port */
+                nh_index:13,            /* Next hop index */
+                match_rule:10,          /* Matched Rule */
+                match_rule_valid:1,     /* Matched Rule valid */
+                decap_iptunnel:1;       /* Decap IP Tunneling Packet */
+
+                                        /* T9.8: RX Status 3 */
+        uint32  :11,
+                ingress_untagged:1,     /* Pkt came in untagged */
+                outer_vid:12,           /* VID */
+                outer_cfi:1,            /* CFI */
+                outer_pri:3,            /* Priority */
+                dscp_lo:4;              /* New DSCP */
+#else
+                                        /* T9.5: RX Status 0 */
+        uint32  add_vid:1,              /* VLAN ID Added */
+                bpdu:1,                 /* BPDU Packet */
+                cell_error:1,           /* Cell CRC Checksum Error Detected */
+                chg_tos:1,              /* DSCP Changed */
+                cpu_cos:3,              /* CPU COS */
+                cos:3,                  /* Packet Priority */
+                emirror:1,              /* Egress Mirroring */
+                imirror:1,              /* Ingress Mirroring */
+                l3_intf:12,             /* L3 Intf number */
+                l3ipmc:1,               /* L3 IPMC */
+                l3only:1,               /* L3 only */
+                l3uc:1,                 /* L3 UC */
+                mtp_index_hi:5;         /* Mirror-to-Port Index */
+                                        /* T9.6: RX Status 1 */
+        uint32  mtp_index_lo:2,         /* Mirror-to-Port Index */
+                pkt_aged:1,             /* Pkt is Aged */
+                purge_cell:1,           /* Packet is marked Purged */
+                src_hg:1,               /* Source is Higig */
+                switch_pkt:1,           /* Switched packet */
+                regen_crc:1,            /* Regenerate CRC */
+                reason:25;              /* CPU opcode */
+                                        /* T9.7: RX Status 2 */
+        uint32  decap_iptunnel:1,       /* Decap IP Tunneling Packet */
+                match_rule_valid:1,     /* Matched Rule valid */
+                match_rule:10,          /* Matched Rule */
+                nh_index:13,            /* Next hop index */
+                srcport:5,              /* Source port */
+                dscp_hi:2;              /* New DSCP */
+                                        /* T9.8: RX Status 3 */
+        uint32  dscp_lo:4,              /* New DSCP */
+                outer_pri:3,            /* Priority (D)*/
+                outer_cfi:1,            /* CFI (D)*/
+                outer_vid:12,           /* VID (D)*/
+                ingress_untagged:1,     /* Pkt came in untagged (D)*/
+                :11;
+#endif
+
+        uint32  s_4;                    /* T9.9: RX Status 4 */
+                                        /* T9.10: DMA Status 0 */
+#ifdef  LE_HOST
+        uint32  count:16,               /* Transferred byte count */
+                end:1,                  /* End bit (RX) */
+                start:1,                /* Start bit (RX) */
+                error:1,                /* Cell Error (RX) */
+                dc:12,                  /* Don't Care */
+                done:1;                 /* Descriptor Done */
+#else
+        uint32  done:1,
+                dc:12,
+                error:1,
+                start:1,
+                end:1,
+                count:16;
+#endif
+} dcb9_t;
+#endif /* BCM_XGS3_SWITCH_SUPPORT */
+
+#if defined(BCM_TRIUMPH2_SUPPORT)
+/*
+ * DMA Control Block - Type 19
+ * Used on 5663x devices
+ * 16 words
+ */
+#include <soc/shared/dcbformats/type19.h>
+#endif  /* BCM_TRIUMPH2_SUPPORT */
+
+#if defined(BCM_ENDURO_SUPPORT)
+/*
+ * DMA Control Block - Type 20
+ * Used on 5623x devices
+ * 16 words
+ */
+typedef struct {
+        uint32  addr;                   /* T20.0: physical address */
+                                        /* T20.1: Control 0 */
+#ifdef  LE_HOST
+        uint32  c_count:16,             /* Requested byte count */
+                c_chain:1,              /* Chaining */
+                c_sg:1,                 /* Scatter Gather */
+                c_reload:1,             /* Reload */
+                c_hg:1,                 /* Higig (TX) */
+                c_stat:1,               /* update stats (TX) */
+                c_pause:1,              /* Pause packet (TX) */
+                c_purge:1,              /* Purge packet (TX) */
+                :9;                     /* Don't care */
+#else
+        uint32  :9,                     /* Don't care */
+                c_purge:1,              /* Purge packet (TX) */
+                c_pause:1,
+                c_stat:1,
+                c_hg:1,
+                c_reload:1,
+                c_sg:1,
+                c_chain:1,
+                c_count:16;
+#endif  /* LE_HOST */
+        uint32  mh0;                    /* T20.2: Module Header word 0 */
+        uint32  mh1;                    /* T20.3: Module Header word 1 */
+        uint32  mh2;                    /* T20.4: Module Header word 2 */
+        uint32  mh3;                    /* T20.5: Module Header word 3 */
+#ifdef  LE_HOST
+                                        /* T20.6: RX Status 0 */
+        uint32  timestamp_type:2,       /* TIMESTAMP field type indicator */
+                em_mtp_index:5,         /* EM Mirror-to-Port Index */
+                :1,                     /* Reserved */
+                cpu_cos:6,              /* COS queue for CPU packets */
+                :2,                     /* Reserved */
+                inner_vid:12,           /* Inner VLAN ID */
+                inner_cfi:1,            /* Inner Canoncial Format Indicator */
+                inner_pri:3;            /* Inner priority */
+
+                                        /* T20.7 */ 
+        uint32  reason_hi:16,           /* CPU opcode (high bits) */
+                pkt_len:14,             /* Packet Length After Modification */
+                :2;                     /* Reserved */
+
+                                        /* T20.8 */
+        uint32  reason;                 /* CPU opcode */
+
+                                        /* T20.9 */
+        uint32  dscp:8,                 /* New DSCP */
+                chg_tos:1,              /* DSCP has been changed by HW */
+                decap_tunnel_type:4,    /* Tunnel type that was decapsulated */
+                regen_crc:1,            /* Packet modified and needs new CRC */
+                :2,                     /* Reserved */
+                outer_vid:12,           /* Outer VLAN ID */
+                outer_cfi:1,            /* Outer Canoncial Format Indicator */
+                outer_pri:3;            /* Outer priority */
+
+                                        /* T20.10 */
+        uint32  timestamp;              /* Timestamp */
+
+                                        /* T20.11 */
+        uint32  cos:4,                  /* COS */
+                higig_cos:5,            /* Higig COS */
+                vlan_cos:5,             /* VLAN COS */
+                shaping_cos_sel:2,      /* Shaping COS Select */
+                vfi:12,                 /* Internal VFI or FID value */
+                vfi_valid:1,            /* VFI or FID */
+                :3;                     /* Reserved */
+
+                                        /* T20.12 */
+        uint32  srcport:8,              /* Source port number */
+                hgi:2,                  /* Higig Interface Format Indicator */
+                itag_status:2,          /* Ingress incoming tag status */
+                otag_action:2,          /* Ingress Outer tag action */
+                itag_action:2,          /* Ingress Inner tag action */
+                service_tag:1,          /* SD tag present */
+                switch_pkt:1,           /* Switched packet */
+                hg_type:1,              /* 0: Higig+, 1: Higig2 */
+                src_hg:1,               /* Source is Higig */
+                l3routed:1,             /* Any IP routed packet */
+                l3only:1,               /* L3 only IPMC packet */
+                replicated:1,           /* Replicated copy */
+                imirror:1,              /* Ingress Mirroring */
+                emirror:1,              /* Egress Mirroring */
+                do_not_change_ttl:1,    /* Do not change TTL */
+                bpdu:1,                 /* BPDU Packet */
+                hg_lookup:1,            /* Reserved for future use */
+                :4;                     /* Reserved */
+
+                                        /* T20.13 */
+        uint32  nhop_index:15,          /* L3 IP Multicast Interface Number or Next HOP Index */
+                :1,                     /* Reserved */
+                match_rule:8,           /* Matched FP rule */
+                im_mtp_index:5,         /* IM Mirror-to-Port Index */
+                ecn:2,                  /* Reserved */
+                change_ecn:1;           /* Reserved */
+
+                                        /* T20.14 */
+        uint32  timestamp_upper;        /* OAM delay measurement: Upper 32-bit of 64-bit timestamp */
+
+                                        /* T20.15: DMA Status 0 */
+        uint32  count:16,               /* Transferred byte count */
+                end:1,                  /* End bit (RX) */
+                start:1,                /* Start bit (RX) */
+                error:1,                /* Cell Error (RX) */
+                dc:12,                  /* Don't Care */
+                done:1;                 /* Descriptor Done */
+#else
+                                        /* T20.6: RX Status 0 */
+        uint32  inner_pri:3,            /* Inner priority */
+                inner_cfi:1,            /* Inner Canoncial Format Indicator */
+                inner_vid:12,           /* Inner VLAN ID */
+                :2,                     /* Reserved */
+                cpu_cos:6,              /* COS queue for CPU packets */
+                :1,                     /* Reserved */
+                em_mtp_index:5,         /* EM Mirror-to-Port Index */
+                timestamp_type:2;       /* TIMESTAMP field type indicator */
+
+                                        /* T20.7 */
+        uint32  :2,                     /* Reserved */
+                pkt_len:14,             /* Packet Length After Modification */
+                reason_hi:16;           /* CPU opcode (high bits) */
+
+                                        /* T20.8 */
+        uint32  reason;                 /* CPU opcode */
+
+                                        /* T20.9 */
+        uint32  outer_pri:3,            /* Outer priority */
+                outer_cfi:1,            /* Outer Canoncial Format Indicator */
+                outer_vid:12,           /* Outer VLAN ID */
+                :2,                     /* Reserved */
+                regen_crc:1,            /* Packet modified and needs new CRC */
+                decap_tunnel_type:4,    /* Tunnel type that was decapsulated */
+                chg_tos:1,              /* DSCP has been changed by HW */
+                dscp:8;                 /* New DSCP */
+
+                                        /* T20.10 */
+        uint32  timestamp;              /* Timestamp */
+
+                                        /* T20.11 */
+        uint32  :3,                     /* Reserved */
+                vfi_valid:1,            /* VFI or FID */
+                vfi:12,                 /* Internal VFI or FID value */
+                shaping_cos_sel:2,      /* Shaping COS Select */
+                vlan_cos:5,             /* VLAN COS */
+                higig_cos:5,            /* Higig COS */
+                cos:4;                  /* COS */
+
+                                        /* T20.12 */
+        uint32  :4,                     /* Reserved */
+                hg_lookup:1,            /* Reserved for future use */
+                bpdu:1,                 /* BPDU Packet */
+                do_not_change_ttl:1,    /* Do not change TTL */
+                emirror:1,              /* Egress Mirroring */
+                imirror:1,              /* Ingress Mirroring */
+                replicated:1,           /* Replicated copy */
+                l3only:1,               /* L3 only IPMC packet */
+                l3routed:1,             /* Any IP routed packet */
+                src_hg:1,               /* Source is Higig */
+                hg_type:1,              /* 0: Higig+, 1: Higig2 */
+                switch_pkt:1,           /* Switched packet */
+                service_tag:1,          /* SD tag present */
+                itag_action:2,          /* Ingress Inner tag action */
+                otag_action:2,          /* Ingress Outer tag action */
+                itag_status:2,          /* Ingress incoming tag status */
+                hgi:2,                  /* Higig Interface Format Indicator */
+                srcport:8;              /* Source port number */
+
+                                        /* T20.13 */
+        uint32  change_ecn:1,           /* Reserved */
+                ecn:2,                  /* Reserved */
+                im_mtp_index:5,         /* IM Mirror-to-Port Index */
+                match_rule:8,           /* Matched FP rule */
+                :1,                     /* Reserved */
+                nhop_index:15;          /* L3 IP Multicast Interface Number or Next HOP Index */
+
+                                        /* T20.14 */
+        uint32  timestamp_upper;        /* OAM delay measurement: Upper 32-bit of 64-bit timestamp */
+
+                                        /* T20.15: DMA Status 0 */
+        uint32  done:1,                 /* Descriptor Done */
+                dc:12,                  /* Don't Care */
+                error:1,                /* Cell Error (RX) */
+                start:1,                /* Start bit (RX) */
+                end:1,                  /* End bit (RX) */
+                count:16;               /* Transferred byte count */
+#endif
+} dcb20_t;
+#endif  /* BCM_ENDURO_SUPPORT */
+
+#if defined(BCM_TRIUMPH3_SUPPORT) || defined(BCM_KATANA_SUPPORT) || \
+    defined(BCM_TRIDENT2_SUPPORT) || defined(BCM_GREYHOUND_SUPPORT)
+/*
+ * DMA Control Block - Type 23
+ * Used on 56640 devices
+ * 16 words
+ */
+#include <soc/shared/dcbformats/type23.h>
+
+#endif  /* BCM_TRIUMPH3_SUPPORT || BCM_KATANA_SUPPORT || \
+           BCM_TRIDENT2_SUPPORT || BCM_GREYHOUND_SUPPORT */
+
+#if defined(BCM_KATANA_SUPPORT)
+/*
+ * DMA Control Block - Type 24
+ * Used on 56440 devices
+ * 16 words
+ */
+#include <soc/shared/dcbformats/type24.h>
+
+#endif  /* BCM_KATANA_SUPPORT */
+
+#if defined(BCM_TRIDENT2_SUPPORT) || defined(BCM_HURRICANE2_SUPPORT)
+/*
+ * DMA Control Block - Type 26
+ * Used on 56850 devices
+ * 16 words
+ */
+#include <soc/shared/dcbformats/type26.h>
+
+#endif  /* BCM_TRIDENT2_SUPPORT */
+
+#if defined(BCM_KATANA2_SUPPORT)
+/*
+ * DMA Control Block - Type 29
+ * Used on 56450 devices
+ * 16 words
+ */
+#include <soc/shared/dcbformats/type29.h>
+
+#endif  /* BCM_KATANA2_SUPPORT */
+
+#if defined(BCM_GREYHOUND_SUPPORT)
+/*
+ * DMA Control Block - Type 31
+ * Used on 53400 devices
+ * 16 words
+ */
+#include <soc/shared/dcbformats/type31.h>
+
+#endif  /* BCM_GREYHOUND_SUPPORT */
+
+#if defined(BCM_TOMAHAWK_SUPPORT) || defined(BCM_TOMAHAWK2_SUPPORT)
+/*
+ * DMA Control Block - Type 32
+ * Used on 5696X devices
+ * 16 words
+ */
+#include <soc/shared/dcbformats/type32.h>
+
+#endif  /* BCM_TOMAHAWK_SUPPORT */
+
+#if defined(BCM_TRIDENT2PLUS_SUPPORT)
+/*
+ * DMA Control Block - Type 33
+ * Used on 56860 devices
+ * 16 words
+ */
+#include <soc/shared/dcbformats/type33.h>
+
+#endif  /* BCM_TRIDENT2PLUS_SUPPORT */
+
+#if defined(BCM_HURRICANE3_SUPPORT)
+/*
+ * DMA Control Block - Type 34
+ * Used on 56160 devices
+ * 16 words
+ */
+#include <soc/shared/dcbformats/type34.h>
+
+#endif  /* BCM_HURRICANE3_SUPPORT */
+
+#if defined(BCM_APACHE_SUPPORT)
+/*
+ * DMA Control Block - Type 35
+ * Used on 56560 devices
+ * 16 words
+ */
+#include <soc/shared/dcbformats/type35.h>
+
+#endif  /* BCM_APACHE_SUPPORT */
+
+#if defined(BCM_TRIDENT3_SUPPORT)
+/*
+ * DMA Control Block - Type 36
+ * Used on 56870 devices
+ * 16 words
+ */
+#include <soc/shared/dcbformats/type36.h>
+
+#endif  /* BCM_TRIDENT3_SUPPORT */
+
+#if defined(BCM_GREYHOUND2_SUPPORT)
+/*
+ * DMA Control Block - Type 37
+ * Used on XXXXX devices
+ * 16 words
+ */
+#include <soc/shared/dcbformats/type37.h>
+
+#endif  /* BCM_GREYHOUND2_SUPPORT */
+
+#if defined(BCM_TOMAHAWK3_SUPPORT)
+/*
+ * DMA Control Block - Type 38
+ * Used on XXXXX devices
+ * 16 words
+ */
+#include <soc/shared/dcbformats/type38.h>
+
+#endif  /* BCM_TOMAHAWK3_SUPPORT */
+
+
+#endif  /* _SOC_DCBFORMATS_H */
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/defs.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/defs.h
new file mode 100644
index 000000000..c49fa06f4
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/defs.h
@@ -0,0 +1,2742 @@
+/*
+ * $Id: defs.h,v 1.271 Broadcom SDK $
+ * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * 
+ * Permission is granted to use, copy, modify and/or distribute this
+ * software under either one of the licenses below.
+ * 
+ * License Option 1: GPL
+ * 
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License, version 2, as
+ * published by the Free Software Foundation (the "GPL").
+ * 
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License version 2 (GPLv2) for more details.
+ * 
+ * You should have received a copy of the GNU General Public License
+ * version 2 (GPLv2) along with this source code.
+ * 
+ * 
+ * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
+ * 
+ * This software is governed by the Broadcom Open Network Switch APIs license:
+ * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+ * 
+ *
+ * File:        defs.h
+ * Purpose:     Basic defines for system and chips
+ *              This should be included before all other SOC include
+ *              files to make sure BCM_xxxx is defined for them.
+ */
+
+#ifndef _SOC_DEFS_H
+#define _SOC_DEFS_H
+
+/* add the definition below to add memory measurement diagnostics capabilities */
+/* #define MEMORY_MEASUREMENT_DIAGNOSTICS 1 */
+
+#include <sdk_config.h>
+#if defined(BCM_ESW_SUPPORT) || defined(BCM_SAND_SUPPORT) || defined(BCM_LTSW_SUPPORT) || defined(BCM_CTSW_SUPPORT)
+#include <soc/mcm/allenum.h>
+#endif
+#include <soc/maxdef.h>
+
+/* Enable per unit linkscan lock for all ESW devices. */
+#if defined(BCM_ESW_SUPPORT)
+#define BCM_LINKSCAN_LOCK_PER_UNIT
+#endif
+
+/*
+ * BCM Chip Support
+ *
+ * There are a few classes of defines used throughout the code:
+ * - chip number defines with revsion numbers (from soc/allenum.h,
+ *   but it can be modified from $SDK/make/Make.local)
+ * - chip number defines without revision numbers
+ * - chip type or group defines (such as BCM_*_SUPPORT)
+ * - component support defines (GBP or FILTER)
+ */
+#if defined(BCM_5675_A0)
+#define BCM_5675
+#define BCM_5670
+#define BCM_HERCULES15_SUPPORT
+#define BCM_HERCULES_SUPPORT
+#endif
+
+#if defined(BCM_56504_A0) || defined(BCM_56504_B0)
+#define BCM_56504
+#define BCM_FIREBOLT_SUPPORT
+#endif
+
+#if defined(BCM_56102_A0)
+#define BCM_56102
+#define BCM_FIREBOLT_SUPPORT
+#define BCM_FELIX_SUPPORT
+#define BCM_FELIX1_SUPPORT
+#endif
+
+#if defined(BCM_56304_B0)
+#define BCM_56304
+#define BCM_FIREBOLT_SUPPORT
+#define BCM_HELIX_SUPPORT
+#define BCM_HELIX1_SUPPORT
+#define BCM_MIRAGE_SUPPORT
+#endif
+
+#if defined(BCM_56112_A0)
+#define BCM_56112
+#define BCM_FIREBOLT_SUPPORT
+#define BCM_FELIX_SUPPORT
+#define BCM_FELIX15_SUPPORT
+#endif
+
+#if defined(BCM_56314_A0)
+#define BCM_56314
+#define BCM_FIREBOLT_SUPPORT
+#define BCM_HELIX_SUPPORT
+#define BCM_HELIX15_SUPPORT
+#define BCM_MIRAGE_SUPPORT
+#endif
+
+#if defined(BCM_56580_A0)
+#define BCM_56580
+#define BCM_FIREBOLT_SUPPORT
+#define BCM_BRADLEY_SUPPORT
+#define BCM_GOLDWING_SUPPORT
+#define BCM_HB_GW_SUPPORT /* HumV & Goldwing use the Bradley Driver */
+#endif
+
+#if defined(BCM_56700_A0)
+#define BCM_56700
+#define BCM_FIREBOLT_SUPPORT
+#define BCM_BRADLEY_SUPPORT
+#define BCM_HUMV_SUPPORT
+#define BCM_HB_GW_SUPPORT
+#endif
+
+#if defined(BCM_56800_A0)
+#define BCM_56800
+#define BCM_56304
+#define BCM_FIREBOLT_SUPPORT
+#define BCM_BRADLEY_SUPPORT
+#define BCM_BRADLEY1_SUPPORT /* Only Bradley, excluding HumV & Goldwing */
+#define BCM_HB_GW_SUPPORT
+#endif
+
+#if defined(BCM_56218_A0)
+#define BCM_56218
+#define BCM_FIREBOLT_SUPPORT
+#define BCM_HELIX_SUPPORT
+#define BCM_RAPTOR_SUPPORT
+#define BCM_RAPTOR1_SUPPORT
+#endif
+
+#if defined(BCM_56514_A0)
+#define BCM_56514
+#define BCM_FIREBOLT_SUPPORT
+#define BCM_FIREBOLT2_SUPPORT
+#endif
+
+#if defined(BCM_56624_A0) || defined(BCM_56624_B0)
+#define BCM_56624
+#define BCM_56304
+#define BCM_56800
+#define BCM_FIREBOLT_SUPPORT
+#define BCM_BRADLEY_SUPPORT
+#define BCM_TRIUMPH_SUPPORT
+#define BCM_TRX_SUPPORT
+#define BCM_MPLS_SUPPORT
+#define BCM_IPFIX_SUPPORT
+#endif
+
+#if defined(BCM_56680_A0) || defined(BCM_56680_B0)
+#define BCM_56680
+#define BCM_56624
+#define BCM_56304
+#define BCM_56800
+#define BCM_FIREBOLT_SUPPORT
+#define BCM_BRADLEY_SUPPORT
+#define BCM_TRIUMPH_SUPPORT
+#define BCM_VALKYRIE_SUPPORT
+#define BCM_TRX_SUPPORT
+#define BCM_MPLS_SUPPORT
+#define BCM_IPFIX_SUPPORT
+#endif
+
+#if defined(BCM_56224_A0) || defined(BCM_56224_B0)
+#define BCM_56224
+#define BCM_FIREBOLT_SUPPORT
+#define BCM_HELIX_SUPPORT
+#define BCM_RAPTOR_SUPPORT
+#define BCM_RAVEN_SUPPORT
+#endif
+
+#if defined(BCM_53314_A0) || defined(BCM_53324_A0)
+#define BCM_53314
+#define BCM_FIREBOLT_SUPPORT
+#define BCM_HELIX_SUPPORT
+#define BCM_RAPTOR_SUPPORT
+#define BCM_RAVEN_SUPPORT
+#define BCM_HAWKEYE_SUPPORT
+#define BCM_TIMESYNC_SUPPORT
+#endif
+
+#if defined(BCM_56820_A0)
+#define BCM_56820
+#define BCM_56800
+#define BCM_56304
+#define BCM_FIREBOLT_SUPPORT
+#define BCM_BRADLEY_SUPPORT
+#define BCM_SCORPION_SUPPORT
+#define BCM_TRX_SUPPORT
+#endif
+
+#if defined(BCM_56725_A0)
+#define BCM_56725
+#define BCM_56820
+#define BCM_56800
+#define BCM_56304
+#define BCM_FIREBOLT_SUPPORT
+#define BCM_BRADLEY_SUPPORT
+#define BCM_HUMV_SUPPORT
+#define BCM_SCORPION_SUPPORT
+#define BCM_CONQUEROR_SUPPORT
+#define BCM_TRX_SUPPORT
+#endif
+
+#if defined(BCM_56634_A0) || defined(BCM_56634_B0)
+#define BCM_56634
+#define BCM_56624
+#define BCM_56304
+#define BCM_56800
+#define BCM_FIREBOLT_SUPPORT
+#define BCM_BRADLEY_SUPPORT
+#define BCM_TRIUMPH_SUPPORT
+#define BCM_TRIUMPH2_SUPPORT
+#define BCM_TRX_SUPPORT
+#define BCM_MPLS_SUPPORT
+#define BCM_IPFIX_SUPPORT
+#define BCM_TIMESYNC_SUPPORT
+#endif
+
+#if defined(BCM_56524_A0) || defined(BCM_56524_B0)
+#define BCM_56524
+#define BCM_56634
+#define BCM_56624
+#define BCM_56304
+#define BCM_56800
+#define BCM_FIREBOLT_SUPPORT
+#define BCM_BRADLEY_SUPPORT
+#define BCM_TRIUMPH_SUPPORT
+#define BCM_TRIUMPH2_SUPPORT
+#define BCM_APOLLO_SUPPORT
+#define BCM_TRX_SUPPORT
+#define BCM_MPLS_SUPPORT
+#define BCM_IPFIX_SUPPORT
+#define BCM_CMICM_SUPPORT
+#endif
+
+#if defined(BCM_56685_A0) || defined(BCM_56685_B0)
+#define BCM_56685
+#define BCM_56634
+#define BCM_56624
+#define BCM_56304
+#define BCM_56800
+#define BCM_FIREBOLT_SUPPORT
+#define BCM_BRADLEY_SUPPORT
+#define BCM_TRIUMPH_SUPPORT
+#define BCM_TRIUMPH2_SUPPORT
+#define BCM_VALKYRIE2_SUPPORT
+#define BCM_TRX_SUPPORT
+#define BCM_MPLS_SUPPORT
+#define BCM_IPFIX_SUPPORT
+#endif
+
+#if defined(BCM_56334_A0) || defined(BCM_56334_B0)
+#define BCM_56334
+#define BCM_56624
+#define BCM_56304
+#define BCM_56800
+#define BCM_FIREBOLT_SUPPORT
+#define BCM_BRADLEY_SUPPORT
+#define BCM_TRIUMPH_SUPPORT
+#define BCM_TRIUMPH2_SUPPORT
+#define BCM_ENDURO_SUPPORT
+#define BCM_TRX_SUPPORT
+#define BCM_MPLS_SUPPORT
+#define BCM_CMICM_SUPPORT
+#define BCM_TIMESYNC_SUPPORT
+#endif
+
+#if defined(BCM_56142_A0)
+#define BCM_56142
+#define BCM_56334
+#define BCM_56624
+#define BCM_56304
+#define BCM_56800
+#define BCM_FIREBOLT_SUPPORT
+#define BCM_BRADLEY_SUPPORT
+#define BCM_TRIUMPH_SUPPORT
+#define BCM_TRIUMPH2_SUPPORT
+#define BCM_ENDURO_SUPPORT
+#define BCM_TRX_SUPPORT
+#define BCM_HURRICANE_SUPPORT
+#define BCM_HURRICANE1_SUPPORT
+#endif
+
+#if defined(BCM_56840_A0) || defined(BCM_56840_B0)
+#define BCM_56840
+#define BCM_56634
+#define BCM_56624
+#define BCM_56304
+#define BCM_56800
+#define BCM_FIREBOLT_SUPPORT
+#define BCM_BRADLEY_SUPPORT
+#define BCM_HUMV_SUPPORT
+#define BCM_SCORPION_SUPPORT
+#define BCM_TRIUMPH_SUPPORT
+#define BCM_TRIUMPH2_SUPPORT
+#define BCM_TRX_SUPPORT
+#define BCM_TRIDENT_SUPPORT
+#define BCM_MPLS_SUPPORT
+#define BCM_XGS3_FABRIC_SUPPORT
+#define BCM_EXTND_SBUS_SUPPORT
+#endif
+
+#if defined(BCM_56640_A0) || defined(BCM_56640_B0)
+#define BCM_56640
+#define BCM_56840
+#define BCM_56634
+#define BCM_56624
+#define BCM_56304
+#define BCM_56800
+#define BCM_FIREBOLT_SUPPORT
+#define BCM_BRADLEY_SUPPORT
+#define BCM_SCORPION_SUPPORT
+#define BCM_TRIUMPH_SUPPORT
+#define BCM_TRIUMPH2_SUPPORT
+#define BCM_TRX_SUPPORT
+#define BCM_TRIDENT_SUPPORT
+#define BCM_TRIUMPH3_SUPPORT
+#define BCM_MPLS_SUPPORT
+#define BCM_CMICM_SUPPORT
+#define BCM_EXTND_SBUS_SUPPORT
+#define BCM_TIMESYNC_SUPPORT
+#define BCM_SBUSDMA_SUPPORT
+#define BCM_IPFIX_SUPPORT
+#endif
+
+#if defined(BCM_56340_A0)
+#define BCM_56340
+#define BCM_56840
+#define BCM_56634
+#define BCM_56624
+#define BCM_56304
+#define BCM_56800
+#define BCM_56640
+#define BCM_FIREBOLT_SUPPORT
+#define BCM_BRADLEY_SUPPORT
+#define BCM_SCORPION_SUPPORT
+#define BCM_TRIUMPH_SUPPORT
+#define BCM_TRIUMPH2_SUPPORT
+#define BCM_TRX_SUPPORT
+#define BCM_TRIDENT_SUPPORT
+#define BCM_TRIUMPH3_SUPPORT
+#define BCM_HELIX4_SUPPORT
+#define BCM_MPLS_SUPPORT
+#define BCM_CMICM_SUPPORT
+#define BCM_IPROC_SUPPORT
+#define BCM_EXTND_SBUS_SUPPORT
+#define BCM_TIMESYNC_SUPPORT
+#define BCM_SBUSDMA_SUPPORT
+#define BCM_HUMV_SUPPORT
+#define BCM_XGS3_FABRIC_SUPPORT
+#endif
+
+#if defined(BCM_56440_A0) || defined(BCM_56440_B0)
+#define BCM_56440
+#define BCM_56840
+#define BCM_56634
+#define BCM_56334
+#define BCM_56624
+#define BCM_56304
+#define BCM_56800
+#define BCM_FIREBOLT_SUPPORT
+#define BCM_BRADLEY_SUPPORT
+#define BCM_HUMV_SUPPORT
+#define BCM_SCORPION_SUPPORT
+#define BCM_TRIUMPH_SUPPORT
+#define BCM_TRIUMPH2_SUPPORT
+#define BCM_TRX_SUPPORT
+#define BCM_ENDURO_SUPPORT
+#define BCM_TRIDENT_SUPPORT
+#define BCM_KATANA_SUPPORT
+#define BCM_MPLS_SUPPORT
+#define BCM_CMICM_SUPPORT
+#define BCM_DDR3_SUPPORT
+#define BCM_TIMESYNC_SUPPORT
+#define BCM_SBUSDMA_SUPPORT
+#endif
+
+#if defined(BCM_56260_A0)
+#define BCM_56260
+#define BCM_56450
+#define BCM_56440
+#define BCM_56840
+#define BCM_56634
+#define BCM_56640
+#define BCM_56334
+#define BCM_56624
+#define BCM_56304
+#define BCM_56800
+#define BCM_SABER2_SUPPORT
+#define BCM_FIREBOLT_SUPPORT
+#define BCM_BRADLEY_SUPPORT
+#define BCM_SCORPION_SUPPORT
+#define BCM_TRIUMPH_SUPPORT
+#define BCM_TRIUMPH2_SUPPORT
+#define BCM_TRIUMPH3_SUPPORT
+#define BCM_TRX_SUPPORT
+#define BCM_ENDURO_SUPPORT
+#define BCM_TRIDENT_SUPPORT
+#define BCM_KATANA2_SUPPORT
+#define BCM_KATANA_SUPPORT
+#define BCM_MPLS_SUPPORT
+#define BCM_IPROC_SUPPORT
+#define BCM_DDR3_SUPPORT
+#define BCM_TIMESYNC_SUPPORT
+#define BCM_EXTND_SBUS_SUPPORT
+#define BCM_SBUSDMA_SUPPORT
+#define BCM_CMICM_SUPPORT
+#define BCM_UC_MHOST_SUPPORT
+#define BCM_PE_SUPPORT
+#define BCM_OLP_SUPPORT
+#endif
+
+#if defined(BCM_56270_A0)
+#define BCM_56270
+#define BCM_56260
+#define BCM_56450
+#define BCM_56440
+#define BCM_56840
+#define BCM_56634
+#define BCM_56640
+#define BCM_56334
+#define BCM_56624
+#define BCM_56304
+#define BCM_56800
+#define BCM_SABER2_SUPPORT
+#define BCM_METROLITE_SUPPORT
+#define BCM_FIREBOLT_SUPPORT
+#define BCM_BRADLEY_SUPPORT
+#define BCM_SCORPION_SUPPORT
+#define BCM_TRIUMPH_SUPPORT
+#define BCM_TRIUMPH2_SUPPORT
+#define BCM_TRIUMPH3_SUPPORT
+#define BCM_TRX_SUPPORT
+#define BCM_ENDURO_SUPPORT
+#define BCM_TRIDENT_SUPPORT
+#define BCM_KATANA2_SUPPORT
+#define BCM_KATANA_SUPPORT
+#define BCM_MPLS_SUPPORT
+#define BCM_IPROC_SUPPORT
+#define BCM_DDR3_SUPPORT
+#define BCM_TIMESYNC_SUPPORT
+#define BCM_EXTND_SBUS_SUPPORT
+#define BCM_SBUSDMA_SUPPORT
+#define BCM_CMICM_SUPPORT
+#define BCM_UC_MHOST_SUPPORT
+#define BCM_PE_SUPPORT
+#define BCM_OLP_SUPPORT
+#endif
+
+
+#if defined(BCM_56450_A0) || defined(BCM_56450_B0) || defined(BCM_56450_B1)
+#define BCM_56450
+#define BCM_56440
+#define BCM_56840
+#define BCM_56634
+#define BCM_56640
+#define BCM_56334
+#define BCM_56624
+#define BCM_56304
+#define BCM_56800
+#define BCM_FIREBOLT_SUPPORT
+#define BCM_BRADLEY_SUPPORT
+#define BCM_SCORPION_SUPPORT
+#define BCM_TRIUMPH_SUPPORT
+#define BCM_TRIUMPH2_SUPPORT
+#define BCM_TRIUMPH3_SUPPORT
+#define BCM_TRX_SUPPORT
+#define BCM_ENDURO_SUPPORT
+#define BCM_TRIDENT_SUPPORT
+#define BCM_KATANA2_SUPPORT
+#define BCM_KATANA_SUPPORT
+#define BCM_MPLS_SUPPORT
+#define BCM_IPROC_SUPPORT
+#define BCM_DDR3_SUPPORT
+#define BCM_TIMESYNC_SUPPORT
+#define BCM_EXTND_SBUS_SUPPORT
+#define BCM_CMICM_SUPPORT
+#define BCM_SBUSDMA_SUPPORT
+#define BCM_PE_SUPPORT
+#define BCM_OLP_SUPPORT
+#endif
+
+#if defined(BCM_56850_A0)
+#define BCM_56850
+#define BCM_56840
+#define BCM_56634
+#define BCM_56624
+#define BCM_56304
+#define BCM_56800
+#define BCM_FIREBOLT_SUPPORT
+#define BCM_BRADLEY_SUPPORT
+#define BCM_HUMV_SUPPORT
+#define BCM_SCORPION_SUPPORT
+#define BCM_TRIUMPH_SUPPORT
+#define BCM_TRIUMPH2_SUPPORT
+#define BCM_TRX_SUPPORT
+#define BCM_TRIDENT_SUPPORT
+#define BCM_TRIUMPH3_SUPPORT
+#define BCM_TRIDENT2_SUPPORT
+#define BCM_MPLS_SUPPORT
+#define BCM_XGS3_FABRIC_SUPPORT
+#define BCM_EXTND_SBUS_SUPPORT
+#define BCM_CMICM_SUPPORT
+#define BCM_SBUSDMA_SUPPORT
+#define BCM_FIFODMA_SUPPORT
+#define BCM_TIMESYNC_SUPPORT
+#endif
+
+#if defined(BCM_56560_A0) || defined(BCM_56560_B0)
+#define BCM_56860
+#define BCM_56850
+#define BCM_56840
+#define BCM_56634
+#define BCM_56624
+#define BCM_56304
+#define BCM_56800
+#define BCM_56560
+#define BCM_APACHE_SUPPORT
+#define BCM_FIREBOLT_SUPPORT
+#define BCM_BRADLEY_SUPPORT
+#define BCM_HUMV_SUPPORT
+#define BCM_SCORPION_SUPPORT
+#define BCM_TRIUMPH_SUPPORT
+#define BCM_TRIUMPH2_SUPPORT
+#define BCM_TRX_SUPPORT
+#define BCM_TRIDENT_SUPPORT
+#define BCM_TRIUMPH3_SUPPORT
+#define BCM_TRIDENT2_SUPPORT
+#define BCM_TRIDENT2PLUS_SUPPORT
+#define BCM_TIME_V3_SUPPORT
+#define BCM_MPLS_SUPPORT
+#define BCM_XGS3_FABRIC_SUPPORT
+#define BCM_EXTND_SBUS_SUPPORT
+#define BCM_SBUSDMA_SUPPORT
+#define BCM_FIFODMA_SUPPORT
+#define BCM_TIMESYNC_SUPPORT
+#define BCM_HGPROXY_COE_SUPPORT
+#define SOC_ROBUST_HASH
+#define BCM_IPROC_SUPPORT
+#define BCM_CMICDV2_SUPPORT
+#define BCM_CMICDV3_SUPPORT
+#define BCM_CMICM_SUPPORT
+#define BCM_UC_MHOST_SUPPORT
+#define BCM_OLP_SUPPORT
+#define PORTMOD_PM4X10_SUPPORT
+#define PORTMOD_PM12X10_SUPPORT
+#define PORTMOD_PM12X10_XGS_SUPPORT
+#define PORTMOD_PM4X25_SUPPORT
+#define PORTMOD_PMNULL_SUPPORT
+#define BCM_EP_REDIRECT_VERSION_2
+#endif
+
+#if defined(BCM_56670_A0) || defined(BCM_56670_B0) || defined(BCM_56670_C0)
+#define BCM_56860
+#define BCM_56850
+#define BCM_56840
+#define BCM_56634
+#define BCM_56624
+#define BCM_56304
+#define BCM_56800
+#define BCM_56560
+#define BCM_56670
+#define BCM_MONTEREY_SUPPORT
+#define BCM_APACHE_SUPPORT
+#define BCM_FIREBOLT_SUPPORT
+#define BCM_BRADLEY_SUPPORT
+#define BCM_HUMV_SUPPORT
+#define BCM_SCORPION_SUPPORT
+#define BCM_TRIUMPH_SUPPORT
+#define BCM_TRIUMPH2_SUPPORT
+#define BCM_TRX_SUPPORT
+#define BCM_TRIDENT_SUPPORT
+#define BCM_TRIUMPH3_SUPPORT
+#define BCM_TRIDENT2_SUPPORT
+#define BCM_TRIDENT2PLUS_SUPPORT
+#define BCM_MPLS_SUPPORT
+#define BCM_XGS3_FABRIC_SUPPORT
+#define BCM_EXTND_SBUS_SUPPORT
+#define BCM_SBUSDMA_SUPPORT
+#define BCM_HGPROXY_COE_SUPPORT
+#define BCM_TIMESYNC_SUPPORT
+#define SOC_ROBUST_HASH
+#define BCM_IPROC_SUPPORT
+#define BCM_CMICDV2_SUPPORT
+#define BCM_CMICDV3_SUPPORT
+#define BCM_CMICM_SUPPORT
+#define BCM_UC_MHOST_SUPPORT
+#define BCM_OLP_SUPPORT
+#define PORTMOD_PM4X10_SUPPORT
+#define PORTMOD_PM4X25_SUPPORT
+#define PORTMOD_CPM4X25_SUPPORT
+#define PORTMOD_PM12X10_SUPPORT
+#define PORTMOD_PM12X10_XGS_SUPPORT
+#define PORTMOD_PMNULL_SUPPORT
+#define BCM_PREEMPTION_SUPPORT
+#define BCM_FIFODMA_SUPPORT
+#endif
+
+#if defined(BCM_53650_A0)
+#define BCM_56860
+#define BCM_56850
+#define BCM_56840
+#define BCM_56634
+#define BCM_56624
+#define BCM_56304
+#define BCM_56800
+#define BCM_56560
+#define BCM_56670
+#define BCM_53650
+#define BCM_MONTEREY_SUPPORT
+#define BCM_APACHE_SUPPORT
+#define BCM_FIREBOLT_SUPPORT
+#define BCM_BRADLEY_SUPPORT
+#define BCM_HUMV_SUPPORT
+#define BCM_SCORPION_SUPPORT
+#define BCM_TRIUMPH_SUPPORT
+#define BCM_TRIUMPH2_SUPPORT
+#define BCM_TRX_SUPPORT
+#define BCM_TRIDENT_SUPPORT
+#define BCM_TRIUMPH3_SUPPORT
+#define BCM_TRIDENT2_SUPPORT
+#define BCM_TRIDENT2PLUS_SUPPORT
+#define BCM_MPLS_SUPPORT
+#define BCM_XGS3_FABRIC_SUPPORT
+#define BCM_EXTND_SBUS_SUPPORT
+#define BCM_HGPROXY_COE_SUPPORT
+#define BCM_TIMESYNC_SUPPORT
+#define BCM_TIMESYNC_V3_SUPPORT
+#define BCM_TIMESYNC_LIVE_WIRE_TOD_SUPPORT
+#define BCM_TIME_V3_SUPPORT
+#define SOC_ROBUST_HASH
+#define BCM_IPROC_SUPPORT
+#define BCM_CMICX_SUPPORT
+#define BCM_CCMDMA_SUPPORT
+#define BCM_SBUSDMA_SUPPORT
+#define BCM_EXTND_SBUS_SUPPORT
+#define BCM_FIFODMA_SUPPORT
+#define BCM_UC_MHOST_SUPPORT
+#define BCM_OLP_SUPPORT
+#define PORTMOD_PM4X10_SUPPORT
+#define PORTMOD_PM4X25_SUPPORT
+#define PORTMOD_CPM4X25_SUPPORT
+#define PORTMOD_PM12X10_SUPPORT
+#define PORTMOD_PM12X10_XGS_SUPPORT
+#define PORTMOD_PMNULL_SUPPORT
+#define BCM_PREEMPTION_SUPPORT
+#define BCM_MIXED_LEGACY_AND_PORTMOD_SUPPORT
+#define BCM_WOLFHOUND3_PLUS_SUPPORT
+#endif
+
+#if defined(BCM_56860_A0)
+#define BCM_56860
+#define BCM_56850
+#define BCM_56840
+#define BCM_56634
+#define BCM_56624
+#define BCM_56304
+#define BCM_56800
+#define BCM_FIREBOLT_SUPPORT
+#define BCM_BRADLEY_SUPPORT
+#define BCM_HUMV_SUPPORT
+#define BCM_SCORPION_SUPPORT
+#define BCM_TRIUMPH_SUPPORT
+#define BCM_TRIUMPH2_SUPPORT
+#define BCM_TRX_SUPPORT
+#define BCM_TRIDENT_SUPPORT
+#define BCM_TRIUMPH3_SUPPORT
+#define BCM_TRIDENT2_SUPPORT
+#define BCM_TRIDENT2PLUS_SUPPORT
+#define BCM_MPLS_SUPPORT
+#define BCM_XGS3_FABRIC_SUPPORT
+#define BCM_EXTND_SBUS_SUPPORT
+#define BCM_CMICM_SUPPORT
+#define BCM_CCMDMA_SUPPORT
+#define BCM_SBUSDMA_SUPPORT
+#define BCM_FIFODMA_SUPPORT
+#define BCM_TIMESYNC_SUPPORT
+#define PORTMOD_PMNULL_SUPPORT
+#define PORTMOD_PM4X10_SUPPORT
+#define PORTMOD_PM4X10TD_SUPPORT
+#define PORTMOD_PM12X10_SUPPORT
+#define PORTMOD_PM4x10Q_SUPPORT
+#define PORTMOD_PM4X25_SUPPORT
+#define PORTMOD_PM4X25TD_SUPPORT
+#define BCM_HGPROXY_COE_SUPPORT
+#define SOC_ROBUST_HASH
+#define BCM_OLP_SUPPORT
+#endif
+
+#if defined(BCM_56960_A0)
+#define BCM_56960
+#define BCM_56850
+#define BCM_56840
+#define BCM_56634
+#define BCM_56624
+#define BCM_56304
+#define BCM_56800
+#define BCM_FIREBOLT_SUPPORT
+#define BCM_BRADLEY_SUPPORT
+#define BCM_HUMV_SUPPORT
+#define BCM_SCORPION_SUPPORT
+#define BCM_TRIUMPH_SUPPORT
+#define BCM_TRIUMPH2_SUPPORT
+#define BCM_TRX_SUPPORT
+#define BCM_TRIDENT_SUPPORT
+#define BCM_TRIUMPH3_SUPPORT
+#define BCM_TRIDENT2_SUPPORT
+#define BCM_TOMAHAWK_SUPPORT
+#define BCM_TOMAHAWKX_SUPPORT
+#define BCM_MPLS_SUPPORT
+#define BCM_XGS3_FABRIC_SUPPORT
+#define BCM_EXTND_SBUS_SUPPORT
+#define BCM_SOC_ASYNC_SUPPORT
+#define BCM_CMICM_SUPPORT
+#define BCM_SBUSDMA_SUPPORT
+#define BCM_CCMDMA_SUPPORT
+#define BCM_FIFODMA_SUPPORT
+#define BCM_TIMESYNC_SUPPORT
+#define BCM_TIME_V3_SUPPORT
+#define BCM_IPROC_SUPPORT
+#define SOC_ROBUST_HASH
+#define BCM_CMICDV2_SUPPORT
+#define BCM_CMICM_SUPPORT
+#define BCM_UC_MHOST_SUPPORT
+#define PORTMOD_PMNULL_SUPPORT
+#define PORTMOD_PM4X10_SUPPORT
+#define PORTMOD_PM4X25_SUPPORT
+#endif
+
+#if defined(BCM_56980_A0) || defined(BCM_56980_B0)
+#define BCM_56980
+#define BCM_56960
+#define BCM_56850
+#define BCM_56840
+#define BCM_56634
+#define BCM_56624
+#define BCM_56304
+#define BCM_56800
+#define BCM_FIREBOLT_SUPPORT
+#define BCM_BRADLEY_SUPPORT
+#define BCM_HUMV_SUPPORT
+#define BCM_SCORPION_SUPPORT
+#define BCM_TRIUMPH_SUPPORT
+#define BCM_TRIUMPH2_SUPPORT
+#define BCM_TRX_SUPPORT
+#define BCM_TRIDENT_SUPPORT
+#define BCM_TRIUMPH3_SUPPORT
+#define BCM_TRIDENT2_SUPPORT
+#define BCM_TOMAHAWK_SUPPORT
+#define BCM_MPLS_SUPPORT
+#define BCM_EXTND_SBUS_SUPPORT
+#define BCM_SOC_ASYNC_SUPPORT
+#define BCM_CCMDMA_SUPPORT
+#define BCM_CMICDV2_SUPPORT
+#define BCM_CMICX_SUPPORT
+#define BCM_CMICX_SIM_SUPPORT 
+#define BCM_SBUSDMA_SUPPORT
+#define BCM_FIFODMA_SUPPORT
+#define BCM_TIMESYNC_SUPPORT
+#define BCM_TIME_V3_SUPPORT
+#define BCM_IPROC_SUPPORT
+#define SOC_ROBUST_HASH
+#define SOC_COUNTER_TABLE_SUPPORT
+#define BCM_UC_MHOST_SUPPORT
+#define PORTMOD_PMNULL_SUPPORT
+#define PORTMOD_PM4X10_SUPPORT
+#define PORTMOD_PM4X25_SUPPORT
+#define PORTMOD_PM8X50_SUPPORT
+#define BCM_CPU_TX_PROC_SUPPORT
+
+/* TH2 dependent code */
+#define BCM_TOMAHAWK2_SUPPORT
+#define BCM_TOMAHAWKX_SUPPORT
+
+/*
+ * TH3 dependent code.
+ *
+ * Note that this define is normally provided by the BCM dispatcher,
+ * but we also need it for non-dispatched environments like the
+ * stand-alone DCB library.
+ */
+#ifndef BCM_TOMAHAWK3_SUPPORT
+#define BCM_TOMAHAWK3_SUPPORT
+#endif
+
+#endif
+
+#if defined(BCM_56870_A0)
+#define BCM_56870
+#define BCM_56960
+#define BCM_56850
+#define BCM_56840
+#define BCM_56634
+#define BCM_56624
+#define BCM_56304
+#define BCM_56800
+#define BCM_FIREBOLT_SUPPORT
+#define BCM_BRADLEY_SUPPORT
+#define BCM_HUMV_SUPPORT
+#define BCM_SCORPION_SUPPORT
+#define BCM_TRIUMPH_SUPPORT
+#define BCM_TRIUMPH2_SUPPORT
+#define BCM_TRX_SUPPORT
+#define BCM_TRIDENT_SUPPORT
+#define BCM_TRIUMPH3_SUPPORT
+#define BCM_TRIDENT2_SUPPORT
+#define BCM_TRIDENT2PLUS_SUPPORT
+#define BCM_TRIDENT3_SUPPORT
+#define BCM_TOMAHAWK_SUPPORT
+#define BCM_MPLS_SUPPORT
+#define BCM_TCB_SUPPORT
+#define BCM_EXTND_SBUS_SUPPORT
+#define BCM_SBUSDMA_SUPPORT
+#define BCM_TIMESYNC_SUPPORT
+#define BCM_TIME_V3_SUPPORT
+#define BCM_IPROC_SUPPORT
+#define SOC_ROBUST_HASH
+#define BCM_CMICX_TX_PREALLOC_SUPPORT
+#define BCM_CMICX_SUPPORT
+#define BCM_FIFODMA_SUPPORT
+#define BCM_CCMDMA_SUPPORT
+#define BCM_SOC_ASYNC_SUPPORT
+#define PORTMOD_PMNULL_SUPPORT
+#define PORTMOD_PM4X10_SUPPORT
+#define PORTMOD_PM4X25_SUPPORT
+#define BCM_HGPROXY_COE_SUPPORT
+#define BCM_OLP_SUPPORT
+#define BCM_UC_MHOST_SUPPORT
+#endif
+
+#if defined(BCM_56470_A0)
+#define BCM_56470
+#define BCM_56275
+#define BCM_56370
+#define BCM_56870
+#define BCM_56960
+#define BCM_56850
+#define BCM_56840
+#define BCM_56634
+#define BCM_56624
+#define BCM_56304
+#define BCM_56800
+#define BCM_FIREBOLT_SUPPORT
+#define BCM_BRADLEY_SUPPORT
+#define BCM_HUMV_SUPPORT
+#define BCM_SCORPION_SUPPORT
+#define BCM_TRIUMPH_SUPPORT
+#define BCM_TRIUMPH2_SUPPORT
+#define BCM_TRX_SUPPORT
+#define BCM_TRIDENT_SUPPORT
+#define BCM_TRIUMPH3_SUPPORT
+#define BCM_TRIDENT2_SUPPORT
+#define BCM_TRIDENT2PLUS_SUPPORT
+#define BCM_TRIDENT3_SUPPORT
+#define BCM_HELIX5_SUPPORT
+#define BCM_HURRICANE4_SUPPORT
+#define BCM_FIREBOLT6_SUPPORT
+#define BCM_TOMAHAWK_SUPPORT
+#define BCM_MPLS_SUPPORT  /* TODO: FB6 */
+#define BCM_EXTND_SBUS_SUPPORT
+#define BCM_SBUSDMA_SUPPORT
+#define BCM_TIMESYNC_SUPPORT
+#define BCM_TIMESYNC_V3_SUPPORT
+#define BCM_TIMESYNC_LIVE_WIRE_TOD_SUPPORT
+#define BCM_TIME_V3_SUPPORT
+#define BCM_IPROC_SUPPORT
+#define BCM_IPROC_DDR_SUPPORT
+#define BCM_DDR3_SUPPORT
+#define SOC_ROBUST_HASH
+#define BCM_CMICX_TX_PREALLOC_SUPPORT
+#define BCM_CMICX_SUPPORT
+#define BCM_FIFODMA_SUPPORT
+#define BCM_CCMDMA_SUPPORT
+#define BCM_SOC_ASYNC_SUPPORT
+#define PORTMOD_PMNULL_SUPPORT
+#define PORTMOD_PM4X10_SUPPORT
+#define PORTMOD_PM4X25_SUPPORT
+#define PHYMOD_EAGLE_SUPPORT
+#define PHYMOD_FALCON_SUPPORT
+#define BCM_OLP_SUPPORT
+#define BCM_HGPROXY_COE_SUPPORT
+#define BCM_CHANNELIZED_SWITCHING_SUPPORT
+#define BCM_FLOWTRACKER_SUPPORT
+#define BCM_FLOWTRACKER_V2_SUPPORT
+#define BCM_FLOWTRACKER_V3_SUPPORT
+#define BCM_FLOWTRACKER_EXPORT_FIFO_SUPPORT
+#define BCM_UTT_SUPPORT
+#define BCM_HLA_SUPPORT
+#define BCM_APPL_SIGNATURE_SUPPORT
+#define BCM_UC_MHOST_SUPPORT
+#endif
+
+#if defined(BCM_56275_A0)
+#define BCM_56275
+#define BCM_56370
+#define BCM_56870
+#define BCM_56960
+#define BCM_56850
+#define BCM_56840
+#define BCM_56634
+#define BCM_56624
+#define BCM_56304
+#define BCM_56800
+#define BCM_FIREBOLT_SUPPORT
+#define BCM_BRADLEY_SUPPORT
+#define BCM_HUMV_SUPPORT
+#define BCM_SCORPION_SUPPORT
+#define BCM_TRIUMPH_SUPPORT
+#define BCM_TRIUMPH2_SUPPORT
+#define BCM_TRX_SUPPORT
+#define BCM_TRIDENT_SUPPORT
+#define BCM_TRIUMPH3_SUPPORT
+#define BCM_TRIDENT2_SUPPORT
+#define BCM_TRIDENT2PLUS_SUPPORT
+#define BCM_TRIDENT3_SUPPORT
+#define BCM_HELIX5_SUPPORT
+#define BCM_HURRICANE4_SUPPORT
+#define BCM_TOMAHAWK_SUPPORT
+#define BCM_MPLS_SUPPORT  /* TODO: HR4 */
+#define BCM_EXTND_SBUS_SUPPORT
+#define BCM_SBUSDMA_SUPPORT
+#define BCM_TIMESYNC_SUPPORT
+#define BCM_TIMESYNC_V3_SUPPORT
+#define BCM_TIMESYNC_LIVE_WIRE_TOD_SUPPORT
+#define BCM_TIME_V3_SUPPORT
+#define BCM_IPROC_SUPPORT
+#define SOC_ROBUST_HASH
+#define BCM_CMICX_TX_PREALLOC_SUPPORT
+#define BCM_CMICX_SUPPORT
+#define BCM_FIFODMA_SUPPORT
+#define BCM_CCMDMA_SUPPORT
+#define BCM_SOC_ASYNC_SUPPORT
+#define PORTMOD_PMNULL_SUPPORT
+#define PORTMOD_PM4X10_SUPPORT
+#define PORTMOD_PM4x10Q_SUPPORT
+#define PORTMOD_PM4X25_SUPPORT
+#define PORTMOD_PM4X10_QTC_SUPPORT
+#define BCM_OLP_SUPPORT
+#define BCM_HGPROXY_COE_SUPPORT
+#define BCM_FLOWTRACKER_SUPPORT
+#define BCM_FLOWTRACKER_V2_SUPPORT
+#define BCM_FLOWTRACKER_EXPORT_FIFO_SUPPORT
+#define BCM_DDR3_SUPPORT
+#define BCM_IPROC_DDR_SUPPORT
+#define BCM_MIXED_LEGACY_AND_PORTMOD_SUPPORT
+#define BCM_UTT_SUPPORT
+#endif
+
+#if defined(BCM_56370_A0)
+#define BCM_56370
+#define BCM_56870
+#define BCM_56960
+#define BCM_56850
+#define BCM_56840
+#define BCM_56634
+#define BCM_56624
+#define BCM_56304
+#define BCM_56800
+#define BCM_FIREBOLT_SUPPORT
+#define BCM_BRADLEY_SUPPORT
+#define BCM_HUMV_SUPPORT
+#define BCM_SCORPION_SUPPORT
+#define BCM_TRIUMPH_SUPPORT
+#define BCM_TRIUMPH2_SUPPORT
+#define BCM_TRX_SUPPORT
+#define BCM_TRIDENT_SUPPORT
+#define BCM_TRIUMPH3_SUPPORT
+#define BCM_TRIDENT2_SUPPORT
+#define BCM_TRIDENT2PLUS_SUPPORT
+#define BCM_TRIDENT3_SUPPORT
+#define BCM_HELIX5_SUPPORT
+#define BCM_TOMAHAWK_SUPPORT
+#define BCM_MPLS_SUPPORT
+#define BCM_TCB_SUPPORT
+#define BCM_EXTND_SBUS_SUPPORT
+#define BCM_SBUSDMA_SUPPORT
+#define BCM_TIMESYNC_SUPPORT
+#define BCM_TIMESYNC_V3_SUPPORT
+#define BCM_TIME_V3_SUPPORT
+#define BCM_IPROC_SUPPORT
+#define SOC_ROBUST_HASH
+#define BCM_CMICX_TX_PREALLOC_SUPPORT
+#define BCM_CMICX_SUPPORT
+#define BCM_FIFODMA_SUPPORT
+#define BCM_SOC_ASYNC_SUPPORT
+#define PORTMOD_PMNULL_SUPPORT
+#define PORTMOD_PM4X10_SUPPORT
+#define PORTMOD_PM4x10Q_SUPPORT
+#define PORTMOD_PM4X25_SUPPORT
+#define PORTMOD_PM4X10_QTC_SUPPORT
+#define BCM_OLP_SUPPORT
+#define BCM_HGPROXY_COE_SUPPORT
+#define BCM_FLOWTRACKER_SUPPORT
+#define BCM_FLOWTRACKER_EXPORT_FIFO_SUPPORT
+#define BCM_DDR3_SUPPORT
+#define BCM_IPROC_DDR_SUPPORT
+#endif
+
+#if defined(BCM_56770_A0)
+#define BCM_56770
+#define BCM_56870
+#define BCM_56960
+#define BCM_56850
+#define BCM_56840
+#define BCM_56634
+#define BCM_56624
+#define BCM_56304
+#define BCM_56800
+#define BCM_FIREBOLT_SUPPORT
+#define BCM_BRADLEY_SUPPORT
+#define BCM_HUMV_SUPPORT
+#define BCM_SCORPION_SUPPORT
+#define BCM_TRIUMPH_SUPPORT
+#define BCM_TRIUMPH2_SUPPORT
+#define BCM_TRX_SUPPORT
+#define BCM_TRIDENT_SUPPORT
+#define BCM_TRIUMPH3_SUPPORT
+#define BCM_TRIDENT2_SUPPORT
+#define BCM_TRIDENT2PLUS_SUPPORT
+#define BCM_TRIDENT3_SUPPORT
+#define BCM_MAVERICK2_SUPPORT
+#define BCM_TOMAHAWK_SUPPORT
+#define BCM_MPLS_SUPPORT
+#define BCM_TCB_SUPPORT
+#define BCM_EXTND_SBUS_SUPPORT
+#define BCM_SBUSDMA_SUPPORT
+#define BCM_TIMESYNC_SUPPORT
+#define BCM_TIME_V3_SUPPORT
+#define BCM_IPROC_SUPPORT
+#define SOC_ROBUST_HASH
+#define BCM_CMICX_TX_PREALLOC_SUPPORT
+#define BCM_CMICX_SUPPORT
+#define BCM_FIFODMA_SUPPORT
+#define BCM_SOC_ASYNC_SUPPORT
+#define PORTMOD_PMNULL_SUPPORT
+#define PORTMOD_PM4X10_SUPPORT
+#define PORTMOD_PM4X25_SUPPORT
+#define BCM_HGPROXY_COE_SUPPORT
+#define BCM_OLP_SUPPORT
+#define BCM_UC_MHOST_SUPPORT
+#endif
+
+#if defined(BCM_56965_A0)
+#define BCM_56965
+#define BCM_56960
+#define BCM_56850
+#define BCM_56840
+#define BCM_56634
+#define BCM_56624
+#define BCM_56304
+#define BCM_56800
+#define BCM_FIREBOLT_SUPPORT
+#define BCM_BRADLEY_SUPPORT
+#define BCM_HUMV_SUPPORT
+#define BCM_SCORPION_SUPPORT
+#define BCM_TRIUMPH_SUPPORT
+#define BCM_TRIUMPH2_SUPPORT
+#define BCM_TRX_SUPPORT
+#define BCM_TRIDENT_SUPPORT
+#define BCM_TRIUMPH3_SUPPORT
+#define BCM_TRIDENT2_SUPPORT
+#define BCM_TOMAHAWK_SUPPORT
+#define BCM_TOMAHAWKX_SUPPORT
+#define BCM_TOMAHAWKPLUS_SUPPORT
+#define BCM_MPLS_SUPPORT
+#define BCM_EXTND_SBUS_SUPPORT
+#define BCM_SBUSDMA_SUPPORT
+#define BCM_FIFODMA_SUPPORT
+#define BCM_TIMESYNC_SUPPORT
+#define BCM_TIME_V3_SUPPORT
+#define BCM_IPROC_SUPPORT
+#define SOC_ROBUST_HASH
+#define BCM_CMICDV2_SUPPORT
+#define BCM_CMICM_SUPPORT
+#define BCM_UC_MHOST_SUPPORT
+#define PORTMOD_PMNULL_SUPPORT
+#define PORTMOD_PM4X10_SUPPORT
+#define PORTMOD_PM4X25_SUPPORT
+#endif
+
+#if defined(BCM_56970_A0)
+#define BCM_56970
+#define BCM_56960
+#define BCM_56850
+#define BCM_56840
+#define BCM_56634
+#define BCM_56624
+#define BCM_56304
+#define BCM_56800
+#define BCM_FIREBOLT_SUPPORT
+#define BCM_BRADLEY_SUPPORT
+#define BCM_HUMV_SUPPORT
+#define BCM_SCORPION_SUPPORT
+#define BCM_TRIUMPH_SUPPORT
+#define BCM_TRIUMPH2_SUPPORT
+#define BCM_TRX_SUPPORT
+#define BCM_TRIDENT_SUPPORT
+#define BCM_TRIUMPH3_SUPPORT
+#define BCM_TRIDENT2_SUPPORT
+#define BCM_TOMAHAWK_SUPPORT
+#define BCM_TOMAHAWK2_SUPPORT
+#define BCM_TOMAHAWKX_SUPPORT
+#define BCM_MPLS_SUPPORT
+#define BCM_XGS3_FABRIC_SUPPORT
+#define BCM_EXTND_SBUS_SUPPORT
+#define BCM_SBUSDMA_SUPPORT
+#define BCM_FIFODMA_SUPPORT
+#define BCM_TIMESYNC_SUPPORT
+#define BCM_TIME_V3_SUPPORT
+#define BCM_IPROC_SUPPORT
+#define BCM_TCB_SUPPORT
+#define SOC_ROBUST_HASH
+#define BCM_CMICDV2_SUPPORT
+#define BCM_CMICDV3_SUPPORT
+#define BCM_CMICDV4_SUPPORT
+#define BCM_UC_MHOST_SUPPORT
+#define PORTMOD_PMNULL_SUPPORT
+#define PORTMOD_PM4X10_SUPPORT
+#define PORTMOD_PM4X25_SUPPORT
+#endif
+
+/* if ARAD_A0, ARAD_B0, ARAD_PLUS is defined, define also ARAD_A0, ARAD_B0, ARAD_PLUS */
+/* Pay attention that effectively all chip flags defined here are functionally equal to BCM_PETRA_SUPPORT */
+#if defined(BCM_88660_A0) || defined(BCM_88675_A0)|| defined(BCM_88675_B0) || defined(BCM_88375_A0) || defined(BCM_88680_A0) || defined(BCM_88470_A0) || defined(BCM_88470_B0) || defined(BCM_88270_A0)
+#define BCM_88660
+#define BCM_88660_A0
+#define BCM_ARAD_SUPPORT
+#define BCM_CMICM_SUPPORT
+#define BCM_SBUSDMA_SUPPORT
+#ifndef BCM_DPP_SUPPORT
+#define BCM_DPP_SUPPORT
+#endif
+/* #define BCM_EXTND_SBUS_SUPPORT */
+#define BCM_DDR3_SUPPORT
+/*Compilation features*/
+#define BCM_LINKSCAN_LOCK_PER_UNIT
+#endif
+
+#if defined(BCM_88675_A0) /* Defined via mcmrelease: genallchips.pl... */
+#define BCM_88675
+#define BCM_IPROC_SUPPORT
+#define BCM_UC_MHOST_SUPPORT
+/* Compilation features */
+#define BCM_LINKSCAN_LOCK_PER_UNIT
+#define PORTMOD_PMNULL_SUPPORT
+#define PORTMOD_PM4X10_SUPPORT
+#define PORTMOD_PM4x10Q_SUPPORT
+#define PORTMOD_PM_OS_ILKN_SUPPORT
+#define PORTMOD_PM4X25_SUPPORT
+#define PORTMOD_DNX_FABRIC_SUPPORT
+#endif
+
+#if defined(BCM_88675_B0) /* Defined via mcmrelease: genallchips.pl... */
+#define BCM_88675
+#define BCM_IPROC_SUPPORT
+#define BCM_UC_MHOST_SUPPORT
+/* Compilation features */
+#define BCM_LINKSCAN_LOCK_PER_UNIT
+#define PORTMOD_PMNULL_SUPPORT
+#define PORTMOD_PM4X10_SUPPORT
+#define PORTMOD_PM4x10Q_SUPPORT
+#define PORTMOD_PM_OS_ILKN_SUPPORT
+#define PORTMOD_PM4X25_SUPPORT
+#define PORTMOD_DNX_FABRIC_SUPPORT
+#endif
+
+#if defined(BCM_88375_A0) /* Defined via mcmrelease: genallchips.pl... ??? */
+#define BCM_88375
+#define BCM_IPROC_SUPPORT
+#define BCM_UC_MHOST_SUPPORT
+/* Compilation features */
+#define BCM_LINKSCAN_LOCK_PER_UNIT
+#define PORTMOD_PM4X10_SUPPORT
+#define PORTMOD_PM4x10Q_SUPPORT
+#define PORTMOD_PM_OS_ILKN_SUPPORT
+#define PORTMOD_PM4X25_SUPPORT
+#define PORTMOD_DNX_FABRIC_SUPPORT
+#endif
+
+
+#if defined(BCM_88680_A0) /* Defined via mcmrelease: genallchips.pl... ??? */
+#define BCM_88680
+#define BCM_IPROC_SUPPORT
+#define BCM_UC_MHOST_SUPPORT
+/* Compilation features */
+#define BCM_LINKSCAN_LOCK_PER_UNIT
+#define PORTMOD_PM4X10_SUPPORT
+#define PORTMOD_PM4x10Q_SUPPORT
+#define PORTMOD_PM_OS_ILKN_SUPPORT
+#define PORTMOD_PM4X25_SUPPORT
+#define PORTMOD_DNX_FABRIC_SUPPORT
+#endif
+
+#if defined(BCM_88690_A0) || defined(BCM_88690_B0) || defined(BCM_88690_B1) /* Defined via mcmrelease: genallchips.pl... ??? */
+#define BCM_88690
+#define BCM_IPROC_SUPPORT
+#define BCM_UC_MHOST_SUPPORT
+/* Compilation features */
+#define BCM_LINKSCAN_LOCK_PER_UNIT
+#define PORTMOD_PM_OS_ILKN_SUPPORT
+#define PORTMOD_PM_OS_ILKN_50G_SUPPORT
+#define PORTMOD_PM4X25_SUPPORT
+#define PORTMOD_PM8X50_FABRIC_SUPPORT
+#define PORTMOD_PM8X50_SUPPORT
+#define BCM_CMICX_SUPPORT
+#define BCM_SBUSDMA_SUPPORT
+
+#endif
+
+#if defined(BCM_88800_A0) || defined(BCM_88800_A1) /* Defined via mcmrelease: genallchips.pl... ??? */
+#define BCM_88800
+#define BCM_IPROC_SUPPORT
+#define BCM_UC_MHOST_SUPPORT
+/* Compilation features */
+#define BCM_LINKSCAN_LOCK_PER_UNIT
+#define PORTMOD_PM_OS_ILKN_SUPPORT
+#define PORTMOD_PM_OS_ILKN_50G_SUPPORT
+#define PORTMOD_PM4X25_SUPPORT
+#define PORTMOD_PM8X50_FABRIC_SUPPORT
+#define PORTMOD_PM8X50_SUPPORT
+#define BCM_CMICX_SUPPORT
+#define BCM_SBUSDMA_SUPPORT
+
+#endif
+
+#if defined(BCM_88850_A0) || defined(BCM_88850_A1) || defined(BCM_88850_A2)/* Defined via mcmrelease: genallchips.pl... ??? */
+#define BCM_88850
+#define BCM_IPROC_SUPPORT
+#define BCM_UC_MHOST_SUPPORT
+/* Compilation features */
+#define BCM_LINKSCAN_LOCK_PER_UNIT
+#define PORTMOD_PM_OS_ILKN_SUPPORT
+#define PORTMOD_PM_OS_ILKN_50G_SUPPORT
+#define PORTMOD_PM4X25_SUPPORT
+#define PORTMOD_PM8X50_FABRIC_SUPPORT
+#define PORTMOD_PM8X50_SUPPORT
+#define BCM_CMICX_SUPPORT
+#define BCM_SBUSDMA_SUPPORT
+#endif
+
+#if defined(BCM_88830_A0) /* Defined via mcmrelease: genallchips.pl... ??? */
+#define BCM_88830
+#define BCM_IPROC_SUPPORT
+#define BCM_UC_MHOST_SUPPORT
+/* Compilation features */
+#define BCM_LINKSCAN_LOCK_PER_UNIT
+#define PORTMOD_PM_OS_ILKN_SUPPORT
+#define PORTMOD_PM_OS_ILKN_50G_SUPPORT
+#define PORTMOD_PM4X25_SUPPORT
+#define PORTMOD_PM8X50_FLEXE_GEN2_SUPPORT
+#define PORTMOD_PM8X50_FABRIC_SUPPORT
+#define PORTMOD_PM8X50_SUPPORT
+#define BCM_CMICX_SUPPORT
+#define BCM_SBUSDMA_SUPPORT
+#endif
+
+#ifdef BCM_DNX3_SUPPORT
+#define BCM_88860
+#define BCM_88870
+#define BCM_IPROC_SUPPORT
+#define BCM_UC_MHOST_SUPPORT
+/* Compilation features */
+#define BCM_LINKSCAN_LOCK_PER_UNIT
+#define PORTMOD_PM4X25_SUPPORT
+#define PORTMOD_PM4X25D_SUPPORT
+#define PORTMOD_PM8X100_FABRIC_SUPPORT
+#define PORTMOD_PM8X100_GEN2_SUPPORT
+#define BCM_CMICX_SUPPORT
+#define BCM_CMICX_GEN2_SUPPORT
+#define BCM_SBUSDMA_SUPPORT
+#endif
+
+#ifdef BCM_DNX3_SUPPORT
+#endif
+
+
+#if defined(BCM_88480_A0) || defined(BCM_88480_B0) /* Defined via mcmrelease: genallchips.pl... ??? */
+#define BCM_88480
+#define BCM_IPROC_SUPPORT
+#define BCM_UC_MHOST_SUPPORT
+/* Compilation features */
+#define BCM_LINKSCAN_LOCK_PER_UNIT
+#define PORTMOD_PM_OS_ILKN_SUPPORT
+#define PORTMOD_PM_OS_ILKN_50G_SUPPORT
+#define PORTMOD_PM4X25_SUPPORT
+#define PORTMOD_PM8X50_FABRIC_SUPPORT
+#define PORTMOD_PM8X50_SUPPORT
+#define BCM_CMICX_SUPPORT
+#define BCM_SBUSDMA_SUPPORT
+#endif
+
+#if defined(BCM_88470_A0) /* Defined via mcmrelease: genallchips.pl... ??? */
+#define BCM_88470
+#define BCM_IPROC_SUPPORT
+#define BCM_UC_MHOST_SUPPORT
+/* Compilation features */
+#define BCM_LINKSCAN_LOCK_PER_UNIT
+#define PORTMOD_PMNULL_SUPPORT
+#define PORTMOD_PM4X10_SUPPORT
+#define PORTMOD_PM4x10Q_SUPPORT
+#define PORTMOD_PM_OS_ILKN_SUPPORT
+#define PORTMOD_PM4X25_SUPPORT
+#define PORTMOD_DNX_FABRIC_SUPPORT
+#define PORTMOD_DNX_FABRIC_O_NIF_SUPPORT
+#endif
+
+#if defined(BCM_88470_B0) /* Defined via mcmrelease: genallchips.pl... ??? */
+#define BCM_88470
+#define BCM_IPROC_SUPPORT
+#define BCM_UC_MHOST_SUPPORT
+/* Compilation features */
+#define BCM_LINKSCAN_LOCK_PER_UNIT
+#define PORTMOD_PMNULL_SUPPORT
+#define PORTMOD_PM4X10_SUPPORT
+#define PORTMOD_PM4x10Q_SUPPORT
+#define PORTMOD_PM_OS_ILKN_SUPPORT
+#define PORTMOD_PM4X25_SUPPORT
+#define PORTMOD_DNX_FABRIC_SUPPORT
+#define PORTMOD_DNX_FABRIC_O_NIF_SUPPORT
+#endif
+
+#if defined(BCM_88270_A0) /* Defined via mcmrelease: genallchips.pl... ??? */
+#define BCM_88270
+#define BCM_IPROC_SUPPORT
+#define BCM_UC_MHOST_SUPPORT
+/* Compilation features */
+#define BCM_LINKSCAN_LOCK_PER_UNIT
+#define PORTMOD_PMNULL_SUPPORT
+#define PORTMOD_PM4X10_SUPPORT
+#define PORTMOD_PM4x10Q_SUPPORT
+#define PORTMOD_PM_OS_ILKN_SUPPORT
+#define PORTMOD_PM4X25_SUPPORT
+#define PORTMOD_DNX_FABRIC_SUPPORT
+#define PORTMOD_PM4X2P5_SUPPORT
+#endif
+
+
+#if defined(BCM_88950_A0) || defined(BCM_88950_A1) || defined(BCM_88770_A1)
+#define BCM_88770
+#define BCM_88770_A1
+#define BCM_88770_SUPPORT
+#define BCM_88773
+#define BCM_88773_A1
+#define BCM_88773_SUPPORT
+#define BCM_88774
+#define BCM_88774_A1
+#define BCM_88774_SUPPORT
+#define BCM_88775
+#define BCM_88775_A1
+#define BCM_88775_SUPPORT
+#define BCM_88776
+#define BCM_88776_A1
+#define BCM_88776_SUPPORT
+#define BCM_88950
+#define BCM_88950_A0
+#define BCM_88950_A1
+#define BCM_88950_SUPPORT
+#define BCM_88953
+#define BCM_88953_A1
+#define BCM_88953_SUPPORT
+#define BCM_88954
+#define BCM_88954_A1
+#define BCM_88954_SUPPORT
+#define BCM_88955
+#define BCM_88955_A1
+#define BCM_88955_SUPPORT
+#define BCM_88956
+#define BCM_88956_A1
+#define BCM_88956_SUPPORT
+#define BCM_LINKSCAN_LOCK_PER_UNIT
+#define BCM_CMICM_SUPPORT
+#define BCM_SBUSDMA_SUPPORT
+#define BCM_IPROC_SUPPORT
+#define PORTMOD_DNX_FABRIC_SUPPORT
+#endif
+
+/*
+*This flag is defined by the MCM release
+*/
+#if defined(BCM_88790_A0)
+#define BCM_88790
+#define BCM_SBUSDMA_SUPPORT
+#define BCM_IPROC_SUPPORT
+#define BCM_CMICX_SUPPORT
+#define PORTMOD_PM8X50_FABRIC_SUPPORT
+#endif
+
+/*
+*This flag is defined by the MCM release
+*/
+#ifdef BCM_DNXF3_SUPPORT
+#define BCM_88920
+#define BCM_SBUSDMA_SUPPORT
+#define BCM_IPROC_SUPPORT
+#define BCM_CMICX_SUPPORT
+#define PORTMOD_PM8X100_FABRIC_SUPPORT
+#define BCM_CMICX_GEN2_SUPPORT
+#endif
+
+#if defined(BCM_56150_A0)
+#define BCM_56150
+#define BCM_56142
+#define BCM_56334
+#define BCM_56624
+#define BCM_56304
+#define BCM_56800
+#define BCM_FIREBOLT_SUPPORT
+#define BCM_BRADLEY_SUPPORT
+#define BCM_TRIUMPH_SUPPORT
+#define BCM_TRIUMPH2_SUPPORT
+#define BCM_ENDURO_SUPPORT
+#define BCM_TRX_SUPPORT
+#define BCM_HURRICANE_SUPPORT
+#define BCM_HURRICANE2_SUPPORT
+#define BCM_CMICM_SUPPORT
+#define BCM_IPROC_SUPPORT
+#define BCM_EXTND_SBUS_SUPPORT
+#define BCM_CMICM_SUPPORT
+#define BCM_SBUSDMA_SUPPORT
+#define BCM_TIMESYNC_SUPPORT
+#define BCM_TIMESYNC_V3_SUPPORT
+#define BCM_TIME_V3_SUPPORT
+#define BCM_DDR3_SUPPORT
+#define BCM_IPROC_DDR_SUPPORT
+#endif
+
+#if defined(BCM_53400_A0)
+#define BCM_53400
+#define BCM_56304
+#define BCM_FIREBOLT_SUPPORT
+#define BCM_BRADLEY_SUPPORT
+#define BCM_TRIUMPH_SUPPORT
+#define BCM_TRIUMPH2_SUPPORT
+#define BCM_ENDURO_SUPPORT
+#define BCM_TRX_SUPPORT
+#define BCM_HURRICANE_SUPPORT
+#define BCM_HURRICANE2_SUPPORT
+#define BCM_CMICM_SUPPORT
+#define BCM_IPROC_SUPPORT
+#define BCM_EXTND_SBUS_SUPPORT
+#define BCM_SBUSDMA_SUPPORT
+#define BCM_TIMESYNC_SUPPORT
+#define BCM_TIMESYNC_V3_SUPPORT
+#define BCM_TIME_V3_SUPPORT
+#define BCM_UC_MHOST_SUPPORT
+#define BCM_GREYHOUND_SUPPORT
+#define PORTMOD_PMNULL_SUPPORT
+#define PORTMOD_PM4X10_SUPPORT
+#define BCM_DDR3_SUPPORT
+#define BCM_IPROC_DDR_SUPPORT
+#endif
+
+#if defined(BCM_56160_A0)
+#define BCM_56160
+#define BCM_53400
+#define BCM_56304
+#define BCM_FIREBOLT_SUPPORT
+#define BCM_BRADLEY_SUPPORT
+#define BCM_TRIUMPH_SUPPORT
+#define BCM_TRIUMPH2_SUPPORT
+#define BCM_ENDURO_SUPPORT
+#define BCM_TRX_SUPPORT
+#define BCM_HURRICANE_SUPPORT
+#define BCM_HURRICANE2_SUPPORT
+#define BCM_CMICM_SUPPORT
+#define BCM_IPROC_SUPPORT
+#define BCM_IPROC_DDR_SUPPORT
+#define BCM_DDR3_SUPPORT
+#define BCM_EXTND_SBUS_SUPPORT
+#define BCM_SBUSDMA_SUPPORT
+#define BCM_TIMESYNC_SUPPORT
+#define BCM_TIMESYNC_V3_SUPPORT
+#define BCM_TIME_V3_SUPPORT
+#define BCM_SWITCH_MATCH_SUPPORT
+#define BCM_GREYHOUND_SUPPORT
+#define BCM_HURRICANE3_SUPPORT
+#endif
+
+#if defined(BCM_53540_A0)
+#define BCM_53540
+#define BCM_56160
+#define BCM_56304
+#define BCM_FIREBOLT_SUPPORT
+#define BCM_BRADLEY_SUPPORT
+#define BCM_TRIUMPH_SUPPORT
+#define BCM_TRIUMPH2_SUPPORT
+#define BCM_ENDURO_SUPPORT
+#define BCM_TRX_SUPPORT
+#define BCM_HURRICANE_SUPPORT
+#define BCM_HURRICANE2_SUPPORT
+#define BCM_CMICM_SUPPORT
+#define BCM_IPROC_SUPPORT
+#define BCM_IPROC_DDR_SUPPORT
+#define BCM_DDR3_SUPPORT
+#define BCM_EXTND_SBUS_SUPPORT
+#define BCM_SBUSDMA_SUPPORT
+#define BCM_TIMESYNC_SUPPORT
+#define BCM_TIMESYNC_V3_SUPPORT
+#define BCM_TIME_V3_SUPPORT
+#define BCM_GREYHOUND_SUPPORT
+#define BCM_HURRICANE3_SUPPORT
+#endif
+
+#if defined(BCM_53570_A0) || defined(BCM_53570_B0)
+#define BCM_53570
+#define BCM_56160
+#define BCM_53400
+#define BCM_56304
+#define BCM_FIREBOLT_SUPPORT
+#define BCM_BRADLEY_SUPPORT
+#define BCM_TRIUMPH_SUPPORT
+#define BCM_TRIUMPH2_SUPPORT
+#define BCM_ENDURO_SUPPORT
+#define BCM_TRX_SUPPORT
+#define BCM_HURRICANE_SUPPORT
+#define BCM_HURRICANE2_SUPPORT
+#define BCM_CMICM_SUPPORT
+#define BCM_CMICDV2_SUPPORT
+#define BCM_IPROC_SUPPORT
+#define BCM_EXTND_SBUS_SUPPORT
+#define BCM_SBUSDMA_SUPPORT
+#define BCM_TIMESYNC_SUPPORT
+#define BCM_TIMESYNC_V3_SUPPORT
+#define BCM_TIME_V3_SUPPORT
+#define BCM_UC_MHOST_SUPPORT
+#define BCM_GREYHOUND_SUPPORT
+#define BCM_HURRICANE3_SUPPORT
+#define BCM_GREYHOUND2_SUPPORT
+#define BCM_GLOBAL_METER_SUPPORT
+#define BCM_GLOBAL_METER_V2_SUPPORT
+#define PORTMOD_PM4X10_SUPPORT
+#define BCM_PREEMPTION_SUPPORT
+#define BCM_SWITCH_MATCH_SUPPORT
+#define BCM_TSN_SUPPORT
+#define BCM_TSN_SR_SUPPORT
+#define BCM_TAS_SUPPORT
+#define BCM_IPROC_DDR_SUPPORT
+#define BCM_DDR3_SUPPORT
+#endif
+
+#if defined(BCM_56070_A0)
+#define BCM_56070
+#define BCM_53570
+#define BCM_56160
+#define BCM_53400
+#define BCM_56304
+#define BCM_FIREBOLT_SUPPORT
+#define BCM_BRADLEY_SUPPORT
+#define BCM_TRIUMPH_SUPPORT
+#define BCM_TRIUMPH2_SUPPORT
+#define BCM_ENDURO_SUPPORT
+#define BCM_TRX_SUPPORT
+#define BCM_HURRICANE_SUPPORT
+#define BCM_HURRICANE2_SUPPORT
+#define BCM_CMICX_SUPPORT
+#define BCM_FIFODMA_SUPPORT
+#define BCM_IPROC_SUPPORT
+#define BCM_IPROC_DDR_SUPPORT
+#define BCM_DDR3_SUPPORT
+#define BCM_EXTND_SBUS_SUPPORT
+#define BCM_SBUSDMA_SUPPORT
+#define BCM_TIMESYNC_SUPPORT
+#define BCM_TIMESYNC_V3_SUPPORT
+#define BCM_TIME_V3_SUPPORT
+#define BCM_UC_MHOST_SUPPORT
+#define BCM_GREYHOUND_SUPPORT
+#define BCM_HURRICANE3_SUPPORT
+#define BCM_GREYHOUND2_SUPPORT
+#define BCM_GLOBAL_METER_SUPPORT
+#define BCM_GLOBAL_METER_V2_SUPPORT
+#define BCM_SWITCH_MATCH_SUPPORT
+#define BCM_TSN_SUPPORT
+#define BCM_TSN_SR_SUPPORT
+#define BCM_TAS_SUPPORT
+#define BCM_FIRELIGHT_SUPPORT
+#define PORTMOD_PMNULL_SUPPORT
+#define PORTMOD_PM4X10_SUPPORT
+#define PORTMOD_PM4X25_SUPPORT
+#define PORTMOD_PM4X10_QTC_SUPPORT
+#endif
+
+/*
+ * Strata XGS
+ */
+#if defined(BCM_5673) || defined(BCM_5690)
+#define BCM_XGS1_SWITCH_SUPPORT
+#endif
+
+#if defined(BCM_5665) || defined(BCM_5695) || defined(BCM_5674)
+#define BCM_XGS2_SWITCH_SUPPORT
+#endif
+
+#if defined(BCM_56504) || \
+    defined(BCM_56102) || defined(BCM_56304) || defined(BCM_56218) || \
+    defined(BCM_56112) || defined(BCM_56314) || defined(BCM_56514) || \
+    defined(BCM_56580) || defined(BCM_56700) || defined(BCM_56800) || \
+    defined(BCM_56624) || defined(BCM_56224) || defined(BCM_56820) || \
+    defined(BCM_53314) || defined(BCM_56680) || defined(BCM_56725) || \
+    defined(BCM_56634) || defined(BCM_56524) || defined(BCM_56685) || \
+    defined(BCM_56334) || defined(BCM_56840) || defined(BCM_56142) || \
+    defined(BCM_56640) || defined(BCM_56440) || \
+    defined(BCM_56850) || defined(BCM_56450) || defined(BCM_56340) || \
+    defined(BCM_56260) || defined(BCM_56160) || defined(BCM_56270) || \
+    defined(BCM_56150) || defined(BCM_53400) || defined(BCM_56960) || \
+    defined(BCM_56870) || defined(BCM_56965) || defined(BCM_56970) || \
+    defined(BCM_56980) || defined(BCM_53570) || defined(BCM_53540) || \
+    defined(BCM_56370) || defined(BCM_56770) || defined(BCM_56275) || \
+    defined(BCM_56470) || defined(BCM_56070) || defined(BCM_53650)
+#define BCM_XGS3_SWITCH_SUPPORT
+#endif
+
+#if defined(BCM_5675)
+#define BCM_XGS2_FABRIC_SUPPORT
+#endif
+
+#if defined(BCM_56700) || defined(BCM_56701) || defined(BCM_56725)
+#define BCM_XGS3_FABRIC_SUPPORT
+#endif
+
+#if defined(BCM_XGS3_SWITCH_SUPPORT)
+#define BCM_XGS_SWITCH_SUPPORT
+#endif
+
+#if defined(BCM_XGS2_FABRIC_SUPPORT)
+#define BCM_XGS12_FABRIC_SUPPORT
+#endif
+
+#if defined(BCM_XGS12_FABRIC_SUPPORT)
+#define BCM_XGS12_SUPPORT
+#endif
+
+#if defined(BCM_XGS12_FABRIC_SUPPORT) || defined(BCM_XGS3_FABRIC_SUPPORT)
+#define BCM_XGS_FABRIC_SUPPORT
+#endif
+
+#if defined(BCM_XGS_SWITCH_SUPPORT) || defined(BCM_XGS_FABRIC_SUPPORT)
+#define BCM_XGS_SUPPORT
+#endif
+
+#if defined(BCM_XGS_SWITCH_SUPPORT)
+#define BCM_SWITCH_SUPPORT
+#endif
+
+#if defined(BCM_56960) || defined(BCM_56965) || defined(BCM_56970) || \
+    defined(BCM_56980)
+#define SOC_UNIQUE_ACC_TYPE_ACCESS
+#endif
+
+/* Common XGS5 Port Module Support */
+#if defined(BCM_56450) || defined(BCM_56560) || defined(BCM_56860) || \
+    defined(BCM_56870) || defined(BCM_56970) || defined(BCM_56370) || \
+    defined(BCM_56770) || defined(BCM_56980) || defined(BCM_56275) || \
+    defined(BCM_56470)
+#define BCM_XGS5_SWITCH_PORT_SUPPORT
+#endif
+
+/*
+ * RIOT
+ */
+#if defined(INCLUDE_L3)
+#if defined(BCM_56860_A0) || defined (BCM_56560) || defined(BCM_56870_A0) || \
+    defined(BCM_56370) || defined(BCM_56770) || defined(BCM_56275) || \
+    defined(BCM_56470) || defined(BCM_53650)
+#define BCM_RIOT_SUPPORT
+#endif
+#endif
+/*
+ * SwapToItself
+ */
+#if defined(INCLUDE_L3)
+#if defined (BCM_56560) || defined (BCM_56970_A0) || defined(BCM_56870_A0) || \
+    defined(BCM_56370) || defined(BCM_56770) || defined(BCM_56470)
+#define BCM_SWAP_TO_SELF_SUPPORT
+#endif
+#endif
+ /*
+  * Multi-level ECMP
+  */
+#if defined(INCLUDE_L3)
+#if defined(BCM_56860_A0) || defined (BCM_56560) || defined(BCM_56870) || \
+    defined(BCM_56370) || defined(BCM_56770) || defined(BCM_56980) || \
+    defined(BCM_56275) || defined(BCM_56470) || defined(BCM_53650)
+#define BCM_MULTI_LEVEL_ECMP_SUPPORT
+#endif
+#endif
+
+/*
+ * Multi-Level Failover Support.
+ */
+#if defined(INCLUDE_L3)
+#if defined(BCM_56560)
+#define BCM_MULTI_LEVEL_FAILOVER_SUPPORT
+#endif
+#endif
+
+/*
+ * Special Label Enhancement Support.
+ */
+#if defined(INCLUDE_L3)
+#if defined(BCM_56870) || defined(BCM_56370) || defined(BCM_56770) || \
+    defined(BCM_56470)
+#define BCM_SPECIAL_LABEL_SUPPORT
+#endif
+#endif
+
+/*
+ * L3_ECMP Protected write
+ */
+#if defined(INCLUDE_L3)
+#if defined(BCM_56370)
+#define SOC_L3_ECMP_PROTECTED_ACCESS_SUPPORT
+#endif
+#endif
+
+/*
+ * Packet-based rate limiting to CPU for HW only.
+ */
+#if defined(BCM_56150) || defined(BCM_53400) || defined(BCM_56160) || \
+    defined(BCM_53540) || defined(BCM_53570) || defined(BCM_56070)
+#define BCM_PACKET_RATE_LIMIT_HW_ONLY_SUPPORT
+#endif
+
+/*
+ * Common Collector APIs support.
+ */
+#if defined(BCM_FLOWTRACKER_SUPPORT) || \
+    defined(BCM_FLOWTRACKER_V2_SUPPORT) || \
+    defined(BCM_FLOWTRACKER_V3_SUPPORT) || \
+    defined(INCLUDE_FLOWTRACKER)     || \
+    defined(INCLUDE_IFA)             || \
+    defined(INCLUDE_TELEMETRY)
+#define BCM_COLLECTOR_SUPPORT
+#endif
+
+/*
+ * TimeSync Time Capture support.
+ */
+#if defined(BCM_56960_A0) || \
+    defined(BCM_56970_A0) || \
+    defined(BCM_56770_A0) || \
+    defined(BCM_88690_A0) || \
+    defined(BCM_88690_B0) || \
+    defined(BCM_88690_B1) || \
+    defined(BCM_56275_A0) || \
+    defined(BCM_56980_A0) || defined(BCM_56980_A0) || \
+    defined(BCM_53570_A0) || defined(BCM_53570_B0) || \
+    defined(BCM_56070_A0) || \
+    defined(BCM_88480_A0) || defined(BCM_88480_B0) || \
+    defined(BCM_88800_A0) || defined(BCM_88800_A1) || defined(BCM_88800_B0) || \
+    defined(BCM_88850_A0) || defined(BCM_88850_A1) || defined(BCM_88850_A2) || defined(BCM_88830_A0) || \
+    defined(BCM_56370_A0) || defined(BCM_56370_A2) || defined(BCM_56375_A0) || defined(BCM_56375_A2)
+#define BCM_TIMESYNC_TIME_CAPTURE_SUPPORT
+#endif
+
+/*
+ * TimeSync nanosync support.
+ */
+#if defined(BCM_56275) || defined(BCM_56980) || defined(BCM_56670) || \
+    defined(BCM_56070) || defined(BCM_56470) || defined(BCM_53650)
+#define BCM_TIME_NANOSYNC_SUPPORT
+#endif
+
+
+/*
+ * Local Time of Day support.
+ */
+#if defined(BCM_56070) || defined(BCM_56270) || defined(BCM_56670)
+#define BCM_TIME_LOCAL_TOD_SUPPORT
+#endif
+
+/*
+ * PCS 1588 TS for TSC Falcon Gen 3.
+ */
+#if defined(BCM_56070) || defined(BCM_56470)
+#define BCM_TSCF_GEN3_PCS_TIMESTAMP
+#endif
+
+/* 
+ * EA
+ */
+
+#if defined(BCM_XGS3_SWITCH_SUPPORT)
+#define BCM_FIELD_SUPPORT
+#endif
+
+/*
+ * If any supported chip includes a Fast Filter Processor (FFP)
+ * or Field Processor (FP)
+ */
+#if defined(BCM_XGS1_SWITCH_SUPPORT) || defined(BCM_XGS2_SWITCH_SUPPORT)
+#define BCM_FILTER_SUPPORT 
+#endif
+
+#if defined(INCLUDE_ACL)
+#define BCM_ACL_SUPPORT
+#endif
+
+/*
+ * CMIC
+ */
+#if defined(BCM_ESW_SUPPORT) || defined(BCM_SAND_SUPPORT) || defined(PORTMOD_SUPPORT)
+#define BCM_CMIC_SUPPORT
+#endif
+
+/*
+ * If any supported chip supports Higig2
+ */
+#if defined(BCM_56580) || defined(BCM_56700) || defined(BCM_56800) || \
+    defined(BCM_56218) || defined(BCM_56624) || defined(BCM_56224) || \
+    defined(BCM_56820) || defined(BCM_56680) || defined(BCM_56725) || \
+    defined(BCM_53314) || defined(BCM_56634) || defined(BCM_56524) || \
+    defined(BCM_56685) || defined(BCM_56334) || \
+    defined(BCM_56840) || defined(BCM_56142) || \
+    defined(BCM_56640) || defined(BCM_56440) || defined(BCM_56850) || \
+    defined(BCM_56450) || defined(BCM_56340) || defined(BCM_56150) || \
+    defined(BCM_56260) || defined(BCM_56160) || defined(BCM_56270) || \
+    defined(BCM_53400) || defined(BCM_56960) || \
+    defined(BCM_56860) || defined(BCM_56965) || defined(BCM_56970) || \
+    defined(BCM_56870) || defined(BCM_53570) || defined(BCM_56370) || \
+    defined(BCM_56770) || defined(BCM_53540) || defined(BCM_56980) || \
+    defined(BCM_56275) || defined(BCM_56470) || defined(BCM_56070) || \
+    defined(BCM_53650)
+#define BCM_HIGIG2_SUPPORT
+#endif
+
+/*
+ * If any supported chip has GXPORTS
+ */
+#if defined(BCM_56580) || defined(BCM_56700) || defined(BCM_56800) || \
+    defined(BCM_56624) || defined(BCM_56820) || defined(BCM_56680) || \
+    defined(BCM_56725) || defined(BCM_56634) || defined(BCM_56524) || \
+    defined(BCM_56685) || defined(BCM_56334) || \
+    defined(BCM_56840) || defined(BCM_56142) || \
+    defined(BCM_56640) || defined(BCM_56440) || defined(BCM_56850) || \
+    defined(BCM_56450) || defined(BCM_56340) || defined(BCM_56150) || \
+    defined(BCM_56260) || defined(BCM_56160) || defined(BCM_56270) || \
+    defined(BCM_53400) || defined(BCM_56960) || defined(BCM_56965) || \
+    defined(BCM_56970) || defined(BCM_53570) || defined(BCM_56980) || \
+    defined(BCM_56070)
+#define BCM_GXPORT_SUPPORT
+#endif
+
+/*
+ * If any supported chip includes storm control (bandwidth rate) capability
+ */
+#if defined(BCM_56218) || defined(BCM_56224) || defined(BCM_53314)
+#define BCM_BANDWIDTH_RATE_METER
+#endif
+
+/*
+ * If any supported chip has BigMAC ports
+ */
+#if defined(BCM_XGS12_SUPPORT) || \
+    defined(BCM_56504) || \
+    defined(BCM_56102) || defined(BCM_56304) || defined(BCM_56112) || \
+    defined(BCM_56314) || defined(BCM_56580) || defined(BCM_56700) || \
+    defined(BCM_56800) || defined(BCM_56514) || defined(BCM_56624) || \
+    defined(BCM_56680) || defined(BCM_56820) || defined(BCM_56725) || \
+    defined(BCM_56334)
+#define BCM_BIGMAC_SUPPORT
+#endif
+
+/*
+ * If any supported chip has XMAC ports
+ */
+#if defined(BCM_56840) || defined(BCM_56640) || \
+    defined(BCM_56440) || defined(BCM_56450) || defined(BCM_56340)
+#define BCM_XMAC_SUPPORT
+#endif
+
+/*
+ * If any supported chip has XLMAC ports
+ */
+#if defined(BCM_56850) || defined(BCM_56150) || defined(BCM_56960) || \
+    defined(BCM_53400) || defined(BCM_56260) || defined(BCM_56160) || \
+    defined(BCM_56270) || defined(BCM_56965) || defined(BCM_56970) || \
+    defined(BCM_56870) || defined(BCM_56980)
+#define BCM_XLMAC_SUPPORT
+#endif
+
+/*
+ * If any supported chip has CLMAC ports
+ */
+#if defined(BCM_56960) || defined(BCM_56860) || defined(BCM_56560) || \
+    defined(BCM_56870) || \
+    defined(BCM_56965) || defined(BCM_56970) || defined(BCM_53570) || \
+    defined(BCM_56980) || defined(BCM_56070)
+#define BCM_CLMAC_SUPPORT
+#endif
+
+/*
+ * If any supported chip has UniMAC ports
+ */
+#if defined(BCM_56224) || defined(BCM_56624) || defined(BCM_56820) || \
+    defined(BCM_53314) || defined(BCM_56680) || defined(BCM_56725) || \
+    defined(BCM_56634) || defined(BCM_56524) || \
+    defined(BCM_56685) || defined(BCM_56334) || \
+    defined(BCM_56840) || defined(BCM_56142) || \
+    defined(BCM_56440) || defined(BCM_56450) || defined(BCM_56150) || \
+    defined(BCM_53400) || defined(BCM_56260) || defined(BCM_56160) || \
+    defined(BCM_56270) || defined(BCM_53570) || defined(BCM_53540) || \
+    defined(BCM_56070)
+#define BCM_UNIMAC_SUPPORT
+#endif
+
+/*
+ * If any supported chip has CMAC ports
+ */
+#if defined(BCM_56640) || defined(BCM_56850) || \
+    defined(BCM_56960) || defined(BCM_56965) || defined(BCM_56970) || \
+    defined(BCM_56870) || defined(BCM_56980)
+#define BCM_CMAC_SUPPORT
+#endif
+
+/*
+ * If any supported chip has Unified ports
+ */
+#if defined(BCM_56640) || defined(BCM_56850) || defined(BCM_56340) || \
+    defined(BCM_56960) || defined(BCM_56965) || \
+    defined(BCM_56970) || defined(BCM_56870) || defined(BCM_56980)
+#define BCM_UNIPORT_SUPPORT
+#endif
+
+/*
+ * If any supported chip has ISM support
+ */
+#if defined(BCM_56640) || defined(BCM_56340) || defined(BCM_56850) || \
+    defined(BCM_56960) || defined(BCM_56965) || defined(BCM_56870) || \
+    defined(BCM_56970) || defined(BCM_56980)
+#define BCM_ISM_SUPPORT
+#endif
+
+/*
+ * If any supported chip has CMICM support
+ */
+#ifdef BCM_SBUSDMA_SUPPORT
+#define BCM_CMICM_SUPPORT
+#endif
+
+/*
+ * If any supported chip has instrumentation feature
+ */
+#if defined(BCM_56960) || defined(BCM_56965) || \
+    defined(BCM_56870) || defined(BCM_56970) || defined(BCM_56980) || \
+    defined(BCM_56770) || defined(BCM_56370) || defined(BCM_56470)
+#define BCM_INSTRUMENTATION_SUPPORT
+#endif
+
+/*
+ * If any supported chip includes an LED Processor
+ */
+
+#if defined(BCM_5675)  || defined(BCM_56504) || \
+    defined(BCM_56102) || defined(BCM_56304) || \
+    defined(BCM_56112) || defined(BCM_56314) || \
+    defined(BCM_56580) || defined(BCM_56700) || \
+    defined(BCM_56800) || defined(BCM_56218) || \
+    defined(BCM_56514) || defined(BCM_56624) || \
+    defined(BCM_56224) || defined(BCM_56820) || \
+    defined(BCM_53314) || defined(BCM_56680) || \
+    defined(BCM_56725) || defined(BCM_56634) || \
+    defined(BCM_56524) || defined(BCM_56334) || \
+    defined(BCM_56685) || \
+    defined(BCM_56840) || defined(BCM_56142) || \
+    defined(BCM_56640) || \
+    defined(BCM_56440) || defined(BCM_56850) || \
+    defined(BCM_56450) || defined(BCM_56340) || \
+    defined(BCM_56150) || \
+    defined(BCM_53400) || defined(BCM_56960) || \
+    defined(BCM_56260) || defined(BCM_56160) || \
+    defined(BCM_56270) || defined(BCM_56965) || \
+    defined(BCM_56870) || \
+    defined(BCM_56970) || defined(BCM_53570) || \
+    defined(BCM_56980) || defined(BCM_53540) || \
+    defined(BCM_56370) || defined(BCM_56770) || \
+    defined(BCM_56275) || defined(BCM_56470) || \
+    defined(BCM_56070)
+#define BCM_LEDPROC_SUPPORT
+#endif
+
+#if defined(BCM_53400) || defined(BCM_56340) || \
+    defined(BCM_56150) || defined(BCM_56160) || \
+    defined(BCM_56260)
+#define BCM_AND28_SUPPORT
+#endif
+
+#if defined(BCM_53570)
+#define BCM_AND28_F4_SUPPORT
+#endif
+
+#if defined(BCM_56275)
+#define BCM_AND16_SUPPORT
+#endif
+
+#if defined(BCM_88675) || defined(BCM_88680) || \
+    defined(BCM_88470) || defined(BCM_88375) || \
+    defined(BCM_88270)
+#define BCM_DDRC28_SUPPORT
+#endif
+
+#if defined(INCLUDE_ACL)
+#define BCM_ACL_SUPPORT
+#endif
+
+#if defined(BCM_XGS_SUPPORT)
+#ifndef BCM_ESW_SUPPORT
+#define BCM_ESW_SUPPORT
+#endif
+#endif
+
+#if defined(INCLUDE_RCPU)
+#define BCM_RCPU_SUPPORT
+#endif
+
+#if defined(INCLUDE_OOB_RCPU)
+#define BCM_OOB_RCPU_SUPPORT
+#endif
+
+/* MACSEC special definition for those switch device within bounded MACSEC supports. */
+#ifdef INCLUDE_MACSEC
+/*  Current MACSEC solution in SDK can be classified to two solutions.
+ *      1. PHY-MACSEC : MACSEC is bounded in a stand-along PHY chip.
+ *      2. Switch-MACSEC : MACSEC is bounded with switch device.
+ *          - BCM_SWITCHMACSEC_SUPPORT is specified for this solution.
+ */
+#endif  /* INCLUDE_MACSEC */
+
+/* EDK support */
+#ifdef INCLUDE_EDK
+#ifndef BCM_EDK_SUPPORT
+#define BCM_EDK_SUPPORT
+#endif
+#endif
+
+/****************************************************************
+ *
+ * This is a list of all known chips which may or may not be supported
+ * by a given image.
+ *
+ * Use soc_chip_supported() for which are supported
+ * CHANGE soc_chip_type_map if you change this
+ *
+ * See also socchip.h
+ *
+ * Enumerated types include:
+ *   Unit numbers
+ *   Chip type numbers (specific chip references w/ rev id)
+ *   Chip group numbers (groups of chips, usually dropping revision
+ *        number)
+ *
+ * All of the above are 0-based.
+ *
+ ****************************************************************/
+
+typedef enum soc_chip_types_e {
+    SOC_CHIP_BCM5670_A0,
+    SOC_CHIP_BCM5673_A0,
+    SOC_CHIP_BCM5690_A0,
+    SOC_CHIP_BCM5665_A0,
+    SOC_CHIP_BCM5695_A0,
+    SOC_CHIP_BCM5675_A0,
+    SOC_CHIP_BCM5674_A0,
+    SOC_CHIP_BCM5665_B0,
+    SOC_CHIP_BCM56601_A0,
+    SOC_CHIP_BCM56601_B0,
+    SOC_CHIP_BCM56601_C0,
+    SOC_CHIP_BCM56602_A0,
+    SOC_CHIP_BCM56602_B0,
+    SOC_CHIP_BCM56602_C0,
+    SOC_CHIP_BCM56504_A0,
+    SOC_CHIP_BCM56504_B0,
+    SOC_CHIP_BCM56102_A0,
+    SOC_CHIP_BCM56304_B0,
+    SOC_CHIP_BCM56112_A0,
+    SOC_CHIP_BCM56314_A0,
+    SOC_CHIP_BCM5650_C0,
+    SOC_CHIP_BCM56800_A0,
+    SOC_CHIP_BCM56218_A0,
+    SOC_CHIP_BCM56514_A0,
+    SOC_CHIP_BCM56624_A0,
+    SOC_CHIP_BCM56624_B0,
+    SOC_CHIP_BCM56680_A0,
+    SOC_CHIP_BCM56680_B0,
+    SOC_CHIP_BCM56224_A0,
+    SOC_CHIP_BCM56224_B0,
+    SOC_CHIP_BCM53314_A0,
+    SOC_CHIP_BCM53324_A0,
+    SOC_CHIP_BCM56725_A0,
+    SOC_CHIP_BCM56820_A0,
+    SOC_CHIP_BCM56634_A0,
+    SOC_CHIP_BCM56634_B0,
+    SOC_CHIP_BCM56524_A0,
+    SOC_CHIP_BCM56524_B0,
+    SOC_CHIP_BCM56685_A0,
+    SOC_CHIP_BCM56685_B0,
+    SOC_CHIP_BCM56334_A0,
+    SOC_CHIP_BCM56334_B0,
+    SOC_CHIP_BCM56840_A0,
+    SOC_CHIP_BCM56840_B0,
+    SOC_CHIP_BCM56850_A0,
+    SOC_CHIP_BCM56960_A0,
+    SOC_CHIP_BCM56980_A0,
+    SOC_CHIP_BCM56980_B0,
+    SOC_CHIP_BCM56870_A0,
+    SOC_CHIP_BCM56873_A0,
+    SOC_CHIP_BCM56275_A0,
+    SOC_CHIP_BCM56370_A0,
+    SOC_CHIP_BCM56470_A0,
+    SOC_CHIP_BCM56770_A0,
+    SOC_CHIP_BCM56771_A0,
+    SOC_CHIP_BCM56970_A0,
+    SOC_CHIP_BCM56142_A0,
+    SOC_CHIP_BCM56150_A0,
+    SOC_CHIP_BCM88660_A0,
+    SOC_CHIP_BCM88675_A0,
+    SOC_CHIP_BCM88675_B0,
+    SOC_CHIP_BCM88375_A0,
+    SOC_CHIP_BCM88375_B0,
+    SOC_CHIP_BCM88680_A0,
+    SOC_CHIP_BCM88690_A0,
+    SOC_CHIP_BCM88690_B0,
+    SOC_CHIP_BCM88800_A0,
+    SOC_CHIP_BCM88800_A1,
+    SOC_CHIP_BCM88850_A0,
+    SOC_CHIP_BCM88830_A0,
+#ifdef BCM_DNX3_SUPPORT
+    SOC_CHIP_BCM88860_A0,
+    SOC_CHIP_BCM88870_A0,
+#endif
+    SOC_CHIP_BCM88480_A0,
+    SOC_CHIP_BCM88480_B0,
+    SOC_CHIP_BCM88480_B1,
+    SOC_CHIP_BCM88470_A0,
+    SOC_CHIP_BCM88470_B0,
+    SOC_CHIP_BCM88270_A0,
+    SOC_CHIP_BCM56640_A0,
+    SOC_CHIP_BCM56640_B0,
+    SOC_CHIP_BCM56340_A0, /* Helix4 */
+    SOC_CHIP_BCM56440_A0,
+    SOC_CHIP_BCM56440_B0,
+    SOC_CHIP_BCM56450_A0,
+    SOC_CHIP_BCM56450_B0,
+    SOC_CHIP_BCM56450_B1,
+    SOC_CHIP_BCM56260_A0, /* Saber2 */
+    SOC_CHIP_BCM56260_B0, /* Saber2 */
+    SOC_CHIP_BCM56270_A0, /* Metrolite */
+    SOC_CHIP_BCM56860_A0, /* Trident2 Plus */
+    SOC_CHIP_BCM56560_A0, /* Apache */
+    SOC_CHIP_BCM56560_B0, /* Apache */
+    SOC_CHIP_BCM56670_A0, /* Monterey */
+    SOC_CHIP_BCM56670_B0, /* Monterey */
+    SOC_CHIP_BCM56670_C0, /* Monterey */
+    SOC_CHIP_BCM53650_A0, /* Wolfhound3 Plus */
+    SOC_CHIP_BCM88770_A1,
+    SOC_CHIP_BCM88773_A1,
+    SOC_CHIP_BCM88774_A1,
+    SOC_CHIP_BCM88775_A1,
+    SOC_CHIP_BCM88776_A1,
+    SOC_CHIP_BCM88950_A0,
+    SOC_CHIP_BCM88950_A1,
+    SOC_CHIP_BCM88953_A1,
+    SOC_CHIP_BCM88954_A1,
+    SOC_CHIP_BCM88955_A1,
+    SOC_CHIP_BCM88956_A1,
+    SOC_CHIP_BCM88790_A0,
+    SOC_CHIP_BCM88790_B0,
+#ifdef BCM_DNXF3_SUPPORT
+    SOC_CHIP_BCM88920_A0,
+#endif
+    SOC_CHIP_ACP,
+    SOC_CHIP_BCM53400_A0,
+    SOC_CHIP_BCM56160_A0,
+    SOC_CHIP_BCM53570_A0,
+    SOC_CHIP_BCM53570_B0,
+    SOC_CHIP_BCM88772_A1,
+    SOC_CHIP_BCM88952_A0,
+    SOC_CHIP_BCM88952_A1,
+    SOC_CHIP_BCM56965_A0, /* Tomahawk+ */
+    SOC_CHIP_BCM56965_A1, /* Tomahawk+ */
+    SOC_CHIP_BCM53540_A0,
+    SOC_CHIP_BCM56070_A0,
+#if defined(BCM_LTSW_SUPPORT) || defined(BCM_CTSW_SUPPORT)
+    SOC_CHIP_LTSW,
+#endif
+    SOC_CHIP_TYPES_COUNT
+} soc_chip_types;
+
+/****************************************************************
+ * 
+ * NB: Order of this array must match soc_chip_types_e above.
+ *
+ ****************************************************************/
+#ifdef BCM_DNX3_SUPPORT
+#define SOC_CHIP_TYPE_MAP_INIT_ADDITIONAL  /* SOC_CHIP_BCM88860_A0 */ SOC_CHIP_BCM8886X,\
+                                           /* SOC_CHIP_BCM88870_A0 */ SOC_CHIP_BCM8887X,
+#else
+#define SOC_CHIP_TYPE_MAP_INIT_ADDITIONAL
+#endif
+#define SOC_CHIP_DNX_TYPE_MAP_INIT_ADDITIONAL
+#ifdef BCM_DNXF3_SUPPORT
+#define SOC_CHIP_DNXF_TYPE_MAP_INIT_ADDITIONAL  /* SOC_CHIP_BCM88920_A0 */ SOC_CHIP_BCM8892X,
+#else
+#define SOC_CHIP_DNXF_TYPE_MAP_INIT_ADDITIONAL
+#endif
+#define SOC_CHIP_TYPE_MAP_INIT \
+    /* SOC_CHIP_BCM5670_A0,  */ SOC_CHIP_BCM5670,  \
+    /* SOC_CHIP_BCM5673_A0,  */ SOC_CHIP_BCM5673,  \
+    /* SOC_CHIP_BCM5690_A0,  */ SOC_CHIP_BCM5690,  \
+    /* SOC_CHIP_BCM5665_A0,  */ SOC_CHIP_BCM5665,  \
+    /* SOC_CHIP_BCM5695_A0,  */ SOC_CHIP_BCM5695,  \
+    /* SOC_CHIP_BCM5675_A0,  */ SOC_CHIP_BCM5675,  \
+    /* SOC_CHIP_BCM5674_A0,  */ SOC_CHIP_BCM5674,  \
+    /* SOC_CHIP_BCM5665_B0,  */ SOC_CHIP_BCM5665,  \
+    /* SOC_CHIP_BCM56601_A0, */ SOC_CHIP_BCM56601, \
+    /* SOC_CHIP_BCM56601_B0, */ SOC_CHIP_BCM56601, \
+    /* SOC_CHIP_BCM56601_C0, */ SOC_CHIP_BCM56601, \
+    /* SOC_CHIP_BCM56602_A0, */ SOC_CHIP_BCM56602, \
+    /* SOC_CHIP_BCM56602_B0, */ SOC_CHIP_BCM56602, \
+    /* SOC_CHIP_BCM56602_C0, */ SOC_CHIP_BCM56602, \
+    /* SOC_CHIP_BCM56504_A0, */ SOC_CHIP_BCM56504, \
+    /* SOC_CHIP_BCM56504_B0, */ SOC_CHIP_BCM56504, \
+    /* SOC_CHIP_BCM56102_A0, */ SOC_CHIP_BCM56102, \
+    /* SOC_CHIP_BCM56304_B0, */ SOC_CHIP_BCM56304, \
+    /* SOC_CHIP_BCM56112_A0, */ SOC_CHIP_BCM56112, \
+    /* SOC_CHIP_BCM56314_A0, */ SOC_CHIP_BCM56314, \
+    /* SOC_CHIP_BCM5650_C0,  */ SOC_CHIP_BCM5650,  \
+    /* SOC_CHIP_BCM56800_A0, */ SOC_CHIP_BCM56800, \
+    /* SOC_CHIP_BCM56218_A0, */ SOC_CHIP_BCM56218, \
+    /* SOC_CHIP_BCM56514_A0, */ SOC_CHIP_BCM56514, \
+    /* SOC_CHIP_BCM56624_A0, */ SOC_CHIP_BCM56624, \
+    /* SOC_CHIP_BCM56624_B0, */ SOC_CHIP_BCM56624, \
+    /* SOC_CHIP_BCM56680_A0, */ SOC_CHIP_BCM56680, \
+    /* SOC_CHIP_BCM56680_B0, */ SOC_CHIP_BCM56680, \
+    /* SOC_CHIP_BCM56224_A0, */ SOC_CHIP_BCM56224, \
+    /* SOC_CHIP_BCM56224_B0, */ SOC_CHIP_BCM56224, \
+    /* SOC_CHIP_BCM53314_A0, */ SOC_CHIP_BCM53314, \
+    /* SOC_CHIP_BCM53324_A0, */ SOC_CHIP_BCM53314, \
+    /* SOC_CHIP_BCM56725_A0, */ SOC_CHIP_BCM56725, \
+    /* SOC_CHIP_BCM56820_A0, */ SOC_CHIP_BCM56820, \
+    /* SOC_CHIP_BCM56634_A0, */ SOC_CHIP_BCM56634, \
+    /* SOC_CHIP_BCM56634_B0, */ SOC_CHIP_BCM56634, \
+    /* SOC_CHIP_BCM56524_A0, */ SOC_CHIP_BCM56524, \
+    /* SOC_CHIP_BCM56524_B0, */ SOC_CHIP_BCM56524, \
+    /* SOC_CHIP_BCM56685_A0, */ SOC_CHIP_BCM56685, \
+    /* SOC_CHIP_BCM56685_B0, */ SOC_CHIP_BCM56685, \
+    /* SOC_CHIP_BCM56334_A0, */ SOC_CHIP_BCM56334, \
+    /* SOC_CHIP_BCM56334_B0, */ SOC_CHIP_BCM56334, \
+    /* SOC_CHIP_BCM56840_A0, */ SOC_CHIP_BCM56840, \
+    /* SOC_CHIP_BCM56840_B0, */ SOC_CHIP_BCM56840, \
+    /* SOC_CHIP_BCM56850_A0, */ SOC_CHIP_BCM56850, \
+    /* SOC_CHIP_BCM56960_A0, */ SOC_CHIP_BCM56960, \
+    /* SOC_CHIP_BCM56980_A0, */ SOC_CHIP_BCM56980, \
+    /* SOC_CHIP_BCM56980_B0, */ SOC_CHIP_BCM56980, \
+    /* SOC_CHIP_BCM56870_A0, */ SOC_CHIP_BCM56870, \
+    /* SOC_CHIP_BCM56873_A0, */ SOC_CHIP_BCM56870, \
+    /* SOC_CHIP_BCM56275_A0, */ SOC_CHIP_BCM56275, \
+    /* SOC_CHIP_BCM56370_A0, */ SOC_CHIP_BCM56370, \
+    /* SOC_CHIP_BCM56470_A0, */ SOC_CHIP_BCM56470, \
+    /* SOC_CHIP_BCM56770_A0, */ SOC_CHIP_BCM56770, \
+    /* SOC_CHIP_BCM56771_A0, */ SOC_CHIP_BCM56770, \
+    /* SOC_CHIP_BCM56970_A0, */ SOC_CHIP_BCM56970, \
+    /* SOC_CHIP_BCM56142_A0, */ SOC_CHIP_BCM56142, \
+    /* SOC_CHIP_BCM56150_A0, */ SOC_CHIP_BCM56150, \
+    /* SOC_CHIP_BCM88660_A0  */ SOC_CHIP_BCM88660, \
+    /* SOC_CHIP_BCM88675_A0  */ SOC_CHIP_BCM88675, \
+    /* SOC_CHIP_BCM88675_B0  */ SOC_CHIP_BCM88675, \
+    /* SOC_CHIP_BCM88375_A0 */ SOC_CHIP_BCM88375, \
+    /* SOC_CHIP_BCM88375_B0 */ SOC_CHIP_BCM88375, \
+    /* SOC_CHIP_BCM88680_A0 */ SOC_CHIP_BCM88680, \
+    /* SOC_CHIP_BCM88690_A0 */ SOC_CHIP_BCM8869X, \
+    /* SOC_CHIP_BCM88690_B0 */ SOC_CHIP_BCM8869X, \
+    /* SOC_CHIP_BCM88800_A0 */ SOC_CHIP_BCM8880X, \
+    /* SOC_CHIP_BCM88800_A1 */ SOC_CHIP_BCM8880X, \
+    /* SOC_CHIP_BCM88850_A0 */ SOC_CHIP_BCM8885X, \
+    /* SOC_CHIP_BCM88830_A0 */ SOC_CHIP_BCM8883X, \
+    SOC_CHIP_TYPE_MAP_INIT_ADDITIONAL \
+    SOC_CHIP_DNX_TYPE_MAP_INIT_ADDITIONAL \
+    /* SOC_CHIP_BCM88480_A0 */ SOC_CHIP_BCM8848X, \
+    /* SOC_CHIP_BCM88480_B0 */ SOC_CHIP_BCM8848X, \
+    /* SOC_CHIP_BCM88480_B1 */ SOC_CHIP_BCM8848X, \
+    /* SOC_CHIP_BCM88470_A0 */ SOC_CHIP_BCM88470, \
+    /* SOC_CHIP_BCM88470_B0 */ SOC_CHIP_BCM88470, \
+    /* SOC_CHIP_BCM88270_A0 */ SOC_CHIP_BCM88270, \
+    /* SOC_CHIP_BCM56640_A0, */ SOC_CHIP_BCM56640, \
+    /* SOC_CHIP_BCM56640_B0, */ SOC_CHIP_BCM56640, \
+    /* SOC_CHIP_BCM56340_A0, */ SOC_CHIP_BCM56340, \
+    /* SOC_CHIP_BCM56440_A0  */ SOC_CHIP_BCM56440, \
+    /* SOC_CHIP_BCM56440_B0  */ SOC_CHIP_BCM56440, \
+    /* SOC_CHIP_BCM56450_A0  */ SOC_CHIP_BCM56450, \
+    /* SOC_CHIP_BCM56450_B0  */ SOC_CHIP_BCM56450, \
+    /* SOC_CHIP_BCM56450_B1  */ SOC_CHIP_BCM56450, \
+    /* SOC_CHIP_BCM56260_A0  */ SOC_CHIP_BCM56260, \
+    /* SOC_CHIP_BCM56260_B0  */ SOC_CHIP_BCM56260, \
+    /* SOC_CHIP_BCM56270_A0  */ SOC_CHIP_BCM56270, \
+    /* SOC_CHIP_BCM56860_A0, */ SOC_CHIP_BCM56860, \
+    /* SOC_CHIP_BCM56560_A0, */ SOC_CHIP_BCM56560, \
+    /* SOC_CHIP_BCM56560_B0, */ SOC_CHIP_BCM56560, \
+    /* SOC_CHIP_BCM56670_A0, */ SOC_CHIP_BCM56670, \
+    /* SOC_CHIP_BCM56670_B0, */ SOC_CHIP_BCM56670, \
+    /* SOC_CHIP_BCM56670_C0, */ SOC_CHIP_BCM56670, \
+    /* SOC_CHIP_BCM53650_A0, */ SOC_CHIP_BCM53650, \
+    /* SOC_CHIP_BCM88770_A1  */ SOC_CHIP_BCM88770,  \
+    /* SOC_CHIP_BCM88773_A1  */ SOC_CHIP_BCM88773,  \
+    /* SOC_CHIP_BCM88774_A1  */ SOC_CHIP_BCM88774,  \
+    /* SOC_CHIP_BCM88775_A1  */ SOC_CHIP_BCM88775,  \
+    /* SOC_CHIP_BCM88776_A1  */ SOC_CHIP_BCM88776,  \
+    /* SOC_CHIP_BCM88950_A0  */ SOC_CHIP_BCM88950,  \
+    /* SOC_CHIP_BCM88950_A1  */ SOC_CHIP_BCM88950,  \
+    /* SOC_CHIP_BCM88953_A1  */ SOC_CHIP_BCM88953,  \
+    /* SOC_CHIP_BCM88954_A1  */ SOC_CHIP_BCM88954,  \
+    /* SOC_CHIP_BCM88955_A1  */ SOC_CHIP_BCM88955,  \
+    /* SOC_CHIP_BCM88956_A1  */ SOC_CHIP_BCM88956,  \
+    /* SOC_CHIP_BCM88790_A0  */ SOC_CHIP_BCM8879X,  \
+    /* SOC_CHIP_BCM88790_B0  */ SOC_CHIP_BCM8879X,  \
+    SOC_CHIP_DNXF_TYPE_MAP_INIT_ADDITIONAL \
+    /* SOC_CHIP_ACP  */         SOC_CHIP_BCM88650ACP,\
+    /* SOC_CHIP_BCM53400_A0 */  SOC_CHIP_BCM53400, \
+    /* SOC_CHIP_BCM56160_A0 */  SOC_CHIP_BCM56160, \
+	/* SOC_CHIP_BCM53570_A0 */  SOC_CHIP_BCM53570, \
+    /* SOC_CHIP_BCM53570_B0 */  SOC_CHIP_BCM53570, \
+    /* SOC_CHIP_BCM88772_A1  */ SOC_CHIP_BCM88772, \
+    /* SOC_CHIP_BCM88952_A0  */ SOC_CHIP_BCM88952, \
+    /* SOC_CHIP_BCM88952_A1  */ SOC_CHIP_BCM88952, \
+    /* SOC_CHIP_BCM56965_A0, */ SOC_CHIP_BCM56965, \
+    /* SOC_CHIP_BCM56965_A1, */ SOC_CHIP_BCM56965, \
+    /* SOC_CHIP_BCM53540_A0, */ SOC_CHIP_BCM53540, \
+    /* SOC_CHIP_BCM56070_A0, */ SOC_CHIP_BCM56070,
+
+
+
+#if defined(BCM_LTSW_SUPPORT) || defined(BCM_CTSW_SUPPORT)
+#define SOC_CHIP_TYPE_MAP_LTSW_INIT \
+    /* SOC_CHIP_LTSW,        */ SOC_CHIP_LTSW_GRP,
+#endif
+
+#ifdef BCM_DNX3_SUPPORT
+#define SOC_CHIP_TYPE_NAMES_INIT_ADDITIONAL     "BCM88860_A0", \
+                                                "BCM88870_A0",
+#else
+#define SOC_CHIP_TYPE_NAMES_INIT_ADDITIONAL
+#endif
+#define SOC_CHIP_DNX_TYPE_NAMES_INIT_ADDITIONAL
+#ifdef BCM_DNXF3_SUPPORT
+#define SOC_CHIP_DNXF_TYPE_NAMES_INIT_ADDITIONAL     "BCM88920_A0",
+#else
+#define SOC_CHIP_DNXF_TYPE_NAMES_INIT_ADDITIONAL
+#endif
+#define SOC_CHIP_TYPE_NAMES_INIT \
+    "BCM5670_A0",  \
+    "BCM5673_A0",  \
+    "BCM5690_A0",  \
+    "BCM5665_A0",  \
+    "BCM5695_A0",  \
+    "BCM5675_A0",  \
+    "BCM5674_A0",  \
+    "BCM5665_B0",  \
+    "BCM56601_A0", \
+    "BCM56601_B0", \
+    "BCM56601_C0", \
+    "BCM56602_A0", \
+    "BCM56602_B0", \
+    "BCM56602_C0", \
+    "BCM56504_A0", \
+    "BCM56504_B0", \
+    "BCM56102_A0", \
+    "BCM56304_B0", \
+    "BCM56112_A0", \
+    "BCM56314_A0", \
+    "BCM5650_C0",  \
+    "BCM56800_A0", \
+    "BCM56218_A0", \
+    "BCM56514_A0", \
+    "BCM56624_A0", \
+    "BCM56624_B0", \
+    "BCM56680_A0", \
+    "BCM56680_B0", \
+    "BCM56224_A0", \
+    "BCM56224_B0", \
+    "BCM53314_A0", \
+    "BCM53324_A0", \
+    "BCM56725_A0", \
+    "BCM56820_A0", \
+    "BCM56634_A0", \
+    "BCM56634_B0", \
+    "BCM56524_A0", \
+    "BCM56524_B0", \
+    "BCM56685_A0", \
+    "BCM56685_B0", \
+    "BCM56334_A0", \
+    "BCM56334_B0", \
+    "BCM56840_A0", \
+    "BCM56840_B0", \
+    "BCM56850_A0", \
+    "BCM56960_A0", \
+    "BCM56980_A0", \
+    "BCM56980_B0", \
+    "BCM56870_A0", \
+    "BCM56873_A0", \
+    "BCM56275_A0", \
+    "BCM56370_A0", \
+    "BCM56470_A0", \
+    "BCM56770_A0", \
+    "BCM56771_A0", \
+    "BCM56970_A0", \
+    "BCM56142_A0", \
+    "BCM56150_A0", \
+    "BCM88660_A0", \
+    "BCM88675_A0", \
+    "BCM88675_B0", \
+    "BCM88375_A0", \
+    "BCM88375_B0", \
+    "BCM88680_A0", \
+    "BCM88690_A0", \
+    "BCM88690_B0", \
+    "BCM88800_A0", \
+    "BCM88800_A1", \
+    "BCM88850_A0", \
+    "BCM88830_A0", \
+    SOC_CHIP_TYPE_NAMES_INIT_ADDITIONAL \
+    SOC_CHIP_DNX_TYPE_NAMES_INIT_ADDITIONAL \
+    "BCM88480_A0", \
+    "BCM88480_B0", \
+    "BCM88480_B1", \
+    "BCM88470_A0", \
+    "BCM88470_B0", \
+    "BCM88270_A0", \
+    "BCM56640_A0", \
+    "BCM56640_B0", \
+    "BCM56340_A0", \
+    "BCM56440_A0", \
+    "BCM56440_B0", \
+    "BCM56450_A0", \
+    "BCM56450_B0", \
+    "BCM56450_B1", \
+    "BCM56260_A0", \
+    "BCM56260_B0", \
+    "BCM56270_A0", \
+    "BCM56860_A0", \
+    "BCM56560_A0", \
+    "BCM56560_B0", \
+    "BCM56670_A0", \
+    "BCM56670_B0", \
+    "BCM56670_C0", \
+    "BCM53650_A0", \
+    "BCM88770_A1", \
+    "BCM88773_A1", \
+    "BCM88774_A1", \
+    "BCM88775_A1", \
+    "BCM88776_A1", \
+    "BCM88950_A0", \
+    "BCM88950_A1", \
+    "BCM88953_A1", \
+    "BCM88954_A1", \
+    "BCM88955_A1", \
+    "BCM88956_A1", \
+    "BCM88790_A0", \
+    "BCM88790_B0", \
+    SOC_CHIP_DNXF_TYPE_NAMES_INIT_ADDITIONAL \
+    "ACP",         \
+    "BCM53400_A0", \
+    "BCM56160_A0", \
+	"BCM53570_A0", \
+    "BCM53570_B0", \
+    "BCM88772_A1", \
+    "BCM88952_A0", \
+    "BCM88952_A1", \
+    "BCM56965_A0", \
+    "BCM56965_A1", \
+    "BCM53540_A0", \
+    "BCM56070_A0",
+
+
+
+
+#if defined(BCM_LTSW_SUPPORT) || defined(BCM_CTSW_SUPPORT)
+#define SOC_CHIP_TYPE_NAMES_LTSW_INIT \
+    "LTSW",
+#endif
+
+typedef enum soc_chip_groups_e {
+    /* Chip names w/o revision */
+    SOC_CHIP_BCM5670,
+    SOC_CHIP_BCM5673,
+    SOC_CHIP_BCM5690,
+    SOC_CHIP_BCM5665,
+    SOC_CHIP_BCM5695,
+    SOC_CHIP_BCM5675,
+    SOC_CHIP_BCM5674,
+    SOC_CHIP_BCM56601,
+    SOC_CHIP_BCM56602,
+    SOC_CHIP_BCM56504,
+    SOC_CHIP_BCM56102,
+    SOC_CHIP_BCM56304,
+    SOC_CHIP_BCM5650,
+    SOC_CHIP_BCM56800,
+    SOC_CHIP_BCM56218,
+    SOC_CHIP_BCM56112,
+    SOC_CHIP_BCM56314,
+    SOC_CHIP_BCM56514,
+    SOC_CHIP_BCM56624,
+    SOC_CHIP_BCM56680,
+    SOC_CHIP_BCM56224,
+    SOC_CHIP_BCM53314,
+    SOC_CHIP_BCM56725,
+    SOC_CHIP_BCM56820,
+    SOC_CHIP_BCM56634,
+    SOC_CHIP_BCM56524,
+    SOC_CHIP_BCM56685,
+    SOC_CHIP_BCM56334,
+    SOC_CHIP_BCM56840,
+    SOC_CHIP_BCM56850,
+    SOC_CHIP_BCM56960,
+    SOC_CHIP_BCM56980,
+    SOC_CHIP_BCM56870,
+    SOC_CHIP_BCM56275,
+    SOC_CHIP_BCM56370,
+    SOC_CHIP_BCM56470,
+    SOC_CHIP_BCM56770,
+    SOC_CHIP_BCM56970,
+    SOC_CHIP_BCM56142,
+    SOC_CHIP_BCM56150,
+    SOC_CHIP_BCM88660,
+    SOC_CHIP_BCM88675,
+    SOC_CHIP_BCM88680,
+    SOC_CHIP_BCM8869X,
+    SOC_CHIP_BCM8880X,
+    SOC_CHIP_BCM8885X,
+    SOC_CHIP_BCM8883X,
+#ifdef BCM_DNX3_SUPPORT
+    SOC_CHIP_BCM8886X,
+    SOC_CHIP_BCM8887X,
+#endif
+    SOC_CHIP_BCM8848X,
+    SOC_CHIP_BCM88375,
+    SOC_CHIP_BCM88470,
+    SOC_CHIP_BCM88270,
+    SOC_CHIP_BCM56640,
+    SOC_CHIP_BCM56340,
+    SOC_CHIP_BCM56440,
+    SOC_CHIP_BCM56450,
+    SOC_CHIP_BCM56260,
+    SOC_CHIP_BCM56270,
+    SOC_CHIP_BCM56860,
+    SOC_CHIP_BCM56560,
+    SOC_CHIP_BCM56670,
+    SOC_CHIP_BCM53650,
+    SOC_CHIP_BCM88770,
+    SOC_CHIP_BCM88773,
+    SOC_CHIP_BCM88774,
+    SOC_CHIP_BCM88775,
+    SOC_CHIP_BCM88776,
+    SOC_CHIP_BCM88950,
+    SOC_CHIP_BCM88953,
+    SOC_CHIP_BCM88954,
+    SOC_CHIP_BCM88955,
+    SOC_CHIP_BCM88956,
+    SOC_CHIP_BCM8879X,
+#ifdef BCM_DNXF3_SUPPORT
+    SOC_CHIP_BCM8892X,
+#endif
+    SOC_CHIP_BCM88650ACP,
+    SOC_CHIP_BCM53400,
+    SOC_CHIP_BCM56160,
+	SOC_CHIP_BCM53570,
+    SOC_CHIP_BCM88772,
+    SOC_CHIP_BCM88952,
+    SOC_CHIP_BCM56965,
+    SOC_CHIP_BCM53540,
+    SOC_CHIP_BCM56070,
+#if defined(BCM_LTSW_SUPPORT) || defined(BCM_CTSW_SUPPORT)
+    SOC_CHIP_LTSW_GRP,
+#endif
+    SOC_CHIP_GROUPS_COUNT
+} soc_chip_groups_t;
+
+#ifdef BCM_DNX3_SUPPORT
+#define SOC_CHIP_GROUP_NAMES_INIT_ADDITIONAL      "BCM8886X", \
+                                                  "BCM8887X",
+#else
+#define SOC_CHIP_GROUP_NAMES_INIT_ADDITIONAL
+#endif
+#define SOC_CHIP_DNX_GROUP_NAMES_INIT_ADDITIONAL
+#ifdef BCM_DNXF3_SUPPORT
+#define SOC_CHIP_DNXF_GROUP_NAMES_INIT_ADDITIONAL      "BCM8892X",
+#else
+#define SOC_CHIP_DNXF_GROUP_NAMES_INIT_ADDITIONAL
+#endif
+#define SOC_CHIP_GROUP_NAMES_INIT \
+    "BCM5670",  \
+    "BCM5673",  \
+    "BCM5690",  \
+    "BCM5665",  \
+    "BCM5695",  \
+    "BCM5675",  \
+    "BCM5674",  \
+    "BCM56601", \
+    "BCM56602", \
+    "BCM56504", \
+    "BCM56102", \
+    "BCM56304", \
+    "BCM5650",  \
+    "BCM56800", \
+    "BCM56218", \
+    "BCM56112", \
+    "BCM56314", \
+    "BCM56514", \
+    "BCM56624", \
+    "BCM56680", \
+    "BCM56224", \
+    "BCM53314", \
+    "BCM56725", \
+    "BCM56820", \
+    "BCM56634", \
+    "BCM56524", \
+    "BCM56685", \
+    "BCM56334", \
+    "BCM56840", \
+    "BCM56850", \
+    "BCM56960", \
+    "BCM56980", \
+    "BCM56870", \
+    "BCM56275", \
+    "BCM56370", \
+    "BCM56470", \
+    "BCM56770", \
+    "BCM56970", \
+    "BCM56142", \
+    "BCM56150", \
+    "BCM88660", \
+    "BCM88675", \
+    "BCM88680", \
+    "BCM8869X", \
+    "BCM8880X", \
+    "BCM8885X", \
+    "BCM8883X", \
+    SOC_CHIP_GROUP_NAMES_INIT_ADDITIONAL \
+    SOC_CHIP_DNX_GROUP_NAMES_INIT_ADDITIONAL \
+    "BCM8848X", \
+    "BCM88375", \
+    "BCM88470", \
+    "BCM88270", \
+    "BCM56640", \
+    "BCM56340", \
+    "BCM56440", \
+    "BCM56450", \
+    "BCM56260", \
+    "BCM56270", \
+    "BCM56860", \
+    "BCM56560", \
+    "BCM56670", \
+    "BCM53650", \
+    "BCM88770",  \
+    "BCM88773",  \
+    "BCM88774",  \
+    "BCM88775",  \
+    "BCM88776",  \
+    "BCM88950",  \
+    "BCM88953",  \
+    "BCM88954",  \
+    "BCM88955",  \
+    "BCM88956",  \
+    "BCM8879X",  \
+    SOC_CHIP_DNXF_GROUP_NAMES_INIT_ADDITIONAL \
+    "SOC_CHIP_BCM88650ACP", \
+    "BCM53400", \
+    "BCM56160", \
+    "BCM53570", \
+    "BCM88772", \
+    "BCM88952", \
+    "BCM56965", \
+    "BCM53540", \
+    "BCM56070",
+
+#if defined(BCM_LTSW_SUPPORT) || defined(BCM_CTSW_SUPPORT)
+#define SOC_CHIP_GROUP_NAMES_LTSW_INIT \
+    "LTSW",
+#endif
+
+#if defined(BCM_TRIUMPH2_SUPPORT) || defined(BCM_TRIDENT_SUPPORT)
+#define SER_TR_TEST_SUPPORT
+#endif
+
+/*
+ * If you add anything here, check soc/common.c for arrays
+ * indexed by soc_regtype_t.
+ */
+typedef enum soc_regtype_t {
+    soc_schan_reg,      /* Generic register read thru SCHAN */
+    soc_genreg,         /* General soc registers */
+    soc_portreg,        /* Port soc registers */
+    soc_ppportreg,      /* Packet-Processing-Port soc registers */
+    soc_cosreg,         /* COS soc registers */
+    soc_pipereg,        /* per pipe soc registers */
+    soc_xpereg,         /* per XPE soc registers */
+    soc_slicereg,       /* per slice soc registers */
+    soc_layerreg,       /* per layer soc registers */
+    soc_itmreg,       /* per layer soc registers */
+    soc_ebreg,       /* per layer soc registers */
+    soc_cpureg,         /* AKA PCI memory */
+    soc_pci_cfg_reg,    /* PCI configuration space register */
+    soc_phy_reg,        /* PHY register, access thru mii */
+    soc_spi_reg,        /* SPI relevant Registers*/
+    soc_mcsreg,         /* Microcontroller Subsystem - Indirect Access */
+    soc_iprocreg,       /* iProc Reg in AXI Address Space */
+    soc_hostmem_w,      /* word */
+    soc_hostmem_h,      /* half word */
+    soc_hostmem_b,      /* byte */
+    soc_customreg,         /* Custom Register */
+    soc_invalidreg
+} soc_regtype_t;
+
+#if defined(BCM_JERICHO_SUPPORT) || defined(BCM_SABER2_SUPPORT) || defined(BCM_QAX_SUPPORT) || defined(BCM_QUX_SUPPORT)
+#define BCM_SAT_SUPPORT
+#endif
+
+#if defined(BCM_QAX_SUPPORT) || defined(BCM_QUX_SUPPORT)
+#define BCM_LB_SUPPORT
+#endif
+
+/* All chips which builds on the Triumph baseline require SER support */
+#ifdef BCM_TRIUMPH_SUPPORT
+#define BCM_SER_SUPPORT
+#endif
+
+/* Current SER implementation relies on memscan thread */
+#ifdef BCM_SER_SUPPORT
+#ifndef INCLUDE_MEM_SCAN
+#define INCLUDE_MEM_SCAN
+#endif
+#endif
+
+#if defined(BCM_TRIDENT2_SUPPORT)
+#define BCM_SRAM_SCAN_SUPPORT
+#endif
+#endif  /* !_SOC_DEFS_H */
+
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/devids.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/devids.h
new file mode 100644
index 000000000..4db0a7076
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/devids.h
@@ -0,0 +1,2149 @@
+/*
+ * $Id:$
+ * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * 
+ * Permission is granted to use, copy, modify and/or distribute this
+ * software under either one of the licenses below.
+ * 
+ * License Option 1: GPL
+ * 
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License, version 2, as
+ * published by the Free Software Foundation (the "GPL").
+ * 
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License version 2 (GPLv2) for more details.
+ * 
+ * You should have received a copy of the GNU General Public License
+ * version 2 (GPLv2) along with this source code.
+ * 
+ * 
+ * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
+ * 
+ * This software is governed by the Broadcom Open Network Switch APIs license:
+ * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+ * 
+ */
+
+#ifndef _SOC_DEVIDS_H
+#define _SOC_DEVIDS_H
+
+
+#define BROADCOM_VENDOR_ID      0x14e4
+
+#define BCM5690_DEVICE_ID       0x5690
+#define BCM5690_A0_REV_ID       1
+#define BCM5690_A1_REV_ID       2
+#define BCM5690_A2_REV_ID       3
+
+#define BCM5691_DEVICE_ID       0x5691
+#define BCM5691_A0_REV_ID       1
+#define BCM5691_A1_REV_ID       2
+#define BCM5691_A2_REV_ID       3
+
+#define BCM5692_DEVICE_ID       0x5692
+#define BCM5692_A0_REV_ID       1
+#define BCM5692_A1_REV_ID       2
+#define BCM5692_A2_REV_ID       3
+
+#define BCM5693_DEVICE_ID       0x5693
+#define BCM5693_A0_REV_ID       1
+#define BCM5693_A1_REV_ID       2
+#define BCM5693_A2_REV_ID       3
+
+#define BCM5695_DEVICE_ID       0x5695
+#define BCM5695_A0_REV_ID       1
+#define BCM5695_A1_REV_ID       2
+#define BCM5695_B0_REV_ID       0x11
+
+#define BCM5696_DEVICE_ID       0x5696
+#define BCM5696_A0_REV_ID       1
+#define BCM5696_A1_REV_ID       2
+#define BCM5696_B0_REV_ID       0x11
+
+#define BCM5697_DEVICE_ID       0x5697
+#define BCM5697_A0_REV_ID       1
+#define BCM5697_A1_REV_ID       2
+#define BCM5697_B0_REV_ID       0x11
+
+#define BCM5698_DEVICE_ID       0x5698
+#define BCM5698_A0_REV_ID       1
+#define BCM5698_A1_REV_ID       2
+#define BCM5698_B0_REV_ID       0x11
+
+#define BCM5670_DEVICE_ID       0x5670
+#define BCM5670_A0_REV_ID       1
+#define BCM5670_A1_REV_ID       2
+
+#define BCM5671_DEVICE_ID       0x5671
+#define BCM5671_A0_REV_ID       1
+#define BCM5671_A1_REV_ID       2
+#define BCM5671_A2_REV_ID       3       
+
+#define BCM5675_DEVICE_ID       0x5675
+#define BCM5675_A0_REV_ID       1
+#define BCM5675_A1_REV_ID       2
+
+#define BCM5676_DEVICE_ID       0x5676
+#define BCM5676_A0_REV_ID       1
+#define BCM5676_A1_REV_ID       2
+
+#define BCM5673_DEVICE_ID       0x5673
+#define BCM5673_A0_REV_ID       1
+#define BCM5673_A1_REV_ID       2
+#define BCM5673_A2_REV_ID       3
+
+#define BCM5674_DEVICE_ID       0x5674
+#define BCM5674_A0_REV_ID       1
+
+#define BCM56100_DEVICE_ID      0xb100
+#define BCM56100_A0_REV_ID      1
+#define BCM56100_A1_REV_ID      2
+#define BCM56101_DEVICE_ID      0xb101
+#define BCM56101_A0_REV_ID      1
+#define BCM56101_A1_REV_ID      2
+#define BCM56102_DEVICE_ID      0xb102
+#define BCM56102_A0_REV_ID      1
+#define BCM56102_A1_REV_ID      2
+#define BCM56105_DEVICE_ID      0xb105
+#define BCM56105_A0_REV_ID      1
+#define BCM56105_A1_REV_ID      2
+#define BCM56106_DEVICE_ID      0xb106
+#define BCM56106_A0_REV_ID      1
+#define BCM56106_A1_REV_ID      2
+#define BCM56107_DEVICE_ID      0xb107
+#define BCM56107_A0_REV_ID      1
+#define BCM56107_A1_REV_ID      2
+
+#define BCM56110_DEVICE_ID      0xb110
+#define BCM56110_A0_REV_ID      1
+#define BCM56111_DEVICE_ID      0xb111
+#define BCM56111_A0_REV_ID      1
+#define BCM56112_DEVICE_ID      0xb112
+#define BCM56112_A0_REV_ID      1
+#define BCM56115_DEVICE_ID      0xb115
+#define BCM56115_A0_REV_ID      1
+#define BCM56116_DEVICE_ID      0xb116
+#define BCM56116_A0_REV_ID      1
+#define BCM56117_DEVICE_ID      0xb117
+#define BCM56117_A0_REV_ID      1
+
+#define BCM56300_DEVICE_ID      0xb300
+#define BCM56300_A0_REV_ID      1
+#define BCM56300_A1_REV_ID      2
+#define BCM56300_B0_REV_ID      0x11
+#define BCM56300_B1_REV_ID      0x12
+#define BCM56301_DEVICE_ID      0xb301
+#define BCM56301_A0_REV_ID      1
+#define BCM56301_A1_REV_ID      2
+#define BCM56301_B0_REV_ID      0x11
+#define BCM56301_B1_REV_ID      0x12
+#define BCM56302_DEVICE_ID      0xb302
+#define BCM56302_A0_REV_ID      1
+#define BCM56302_A1_REV_ID      2
+#define BCM56302_B0_REV_ID      0x11
+#define BCM56302_B1_REV_ID      0x12
+#define BCM56303_DEVICE_ID      0xb303
+#define BCM56303_A1_REV_ID      2
+#define BCM56303_A0_REV_ID      1
+#define BCM56303_B0_REV_ID      0x11
+#define BCM56303_B1_REV_ID      0x12
+#define BCM56304_DEVICE_ID      0xb304
+#define BCM56304_A0_REV_ID      1
+#define BCM56304_A1_REV_ID      2
+#define BCM56304_B0_REV_ID      0x11
+#define BCM56304_B1_REV_ID      0x12
+#define BCM56404_DEVICE_ID      0xb404
+#define BCM56404_A0_REV_ID      1
+#define BCM56404_A1_REV_ID      2
+#define BCM56305_DEVICE_ID      0xb305
+#define BCM56305_A0_REV_ID      1
+#define BCM56305_A1_REV_ID      2
+#define BCM56305_B0_REV_ID      0x11
+#define BCM56305_B1_REV_ID      0x12
+#define BCM56306_DEVICE_ID      0xb306
+#define BCM56306_A0_REV_ID      1
+#define BCM56306_A1_REV_ID      2
+#define BCM56306_B0_REV_ID      0x11
+#define BCM56306_B1_REV_ID      0x12
+#define BCM56307_DEVICE_ID      0xb307
+#define BCM56307_A0_REV_ID      1
+#define BCM56307_A1_REV_ID      2
+#define BCM56307_B0_REV_ID      0x11
+#define BCM56307_B1_REV_ID      0x12
+#define BCM56308_DEVICE_ID      0xb308
+#define BCM56308_A0_REV_ID      1
+#define BCM56308_A1_REV_ID      2
+#define BCM56308_B0_REV_ID      0x11
+#define BCM56308_B1_REV_ID      0x12
+#define BCM56309_DEVICE_ID      0xb309
+#define BCM56309_A0_REV_ID      1
+#define BCM56309_A1_REV_ID      2
+#define BCM56309_B0_REV_ID      0x11
+#define BCM56309_B1_REV_ID      0x12
+
+#define BCM56310_DEVICE_ID      0xb310
+#define BCM56310_A0_REV_ID      1
+#define BCM56311_DEVICE_ID      0xb311
+#define BCM56311_A0_REV_ID      1
+#define BCM56312_DEVICE_ID      0xb312
+#define BCM56312_A0_REV_ID      1
+#define BCM56313_DEVICE_ID      0xb313
+#define BCM56313_A0_REV_ID      1
+#define BCM56314_DEVICE_ID      0xb314
+#define BCM56314_A0_REV_ID      1
+#define BCM56315_DEVICE_ID      0xb315
+#define BCM56315_A0_REV_ID      1
+#define BCM56316_DEVICE_ID      0xb316
+#define BCM56316_A0_REV_ID      1
+#define BCM56317_DEVICE_ID      0xb317
+#define BCM56317_A0_REV_ID      1
+#define BCM56318_DEVICE_ID      0xb318
+#define BCM56318_A0_REV_ID      1
+#define BCM56319_DEVICE_ID      0xb319
+#define BCM56319_A0_REV_ID      1
+
+#ifndef EXCLUDE_BCM56324
+#define BCM56322_DEVICE_ID      0xb322
+#define BCM56322_A0_REV_ID      1
+#define BCM56324_DEVICE_ID      0xb324
+#define BCM56324_A0_REV_ID      1
+#endif 
+
+#define BCM53300_DEVICE_ID      0xb006
+#define BCM53300_A0_REV_ID      0x11
+#define BCM53300_A1_REV_ID      0x12
+#define BCM53301_DEVICE_ID      0xb206
+#define BCM53301_A0_REV_ID      0x11
+#define BCM53301_A1_REV_ID      0x12
+#define BCM53302_DEVICE_ID      0xb008
+#define BCM53302_A0_REV_ID      0x11
+#define BCM53302_A1_REV_ID      0x12
+
+#define BCM56500_DEVICE_ID      0xb500
+#define BCM56500_A0_REV_ID      1
+#define BCM56500_A1_REV_ID      2
+#define BCM56500_B0_REV_ID      0x11
+#define BCM56500_B1_REV_ID      0x12
+#define BCM56500_B2_REV_ID      0x13
+#define BCM56501_DEVICE_ID      0xb501
+#define BCM56501_A0_REV_ID      1
+#define BCM56501_A1_REV_ID      2
+#define BCM56501_B0_REV_ID      0x11
+#define BCM56501_B1_REV_ID      0x12
+#define BCM56501_B2_REV_ID      0x13
+#define BCM56502_DEVICE_ID      0xb502
+#define BCM56502_A0_REV_ID      1
+#define BCM56502_A1_REV_ID      2
+#define BCM56502_B0_REV_ID      0x11
+#define BCM56502_B1_REV_ID      0x12
+#define BCM56502_B2_REV_ID      0x13
+#define BCM56503_DEVICE_ID      0xb503
+#define BCM56503_A0_REV_ID      1
+#define BCM56503_A1_REV_ID      2
+#define BCM56503_B0_REV_ID      0x11
+#define BCM56503_B1_REV_ID      0x12
+#define BCM56503_B2_REV_ID      0x13
+#define BCM56504_DEVICE_ID      0xb504
+#define BCM56504_A0_REV_ID      1
+#define BCM56504_A1_REV_ID      2
+#define BCM56504_B0_REV_ID      0x11
+#define BCM56504_B1_REV_ID      0x12
+#define BCM56504_B2_REV_ID      0x13
+#define BCM56505_DEVICE_ID      0xb505
+#define BCM56505_A0_REV_ID      1
+#define BCM56505_A1_REV_ID      2
+#define BCM56505_B0_REV_ID      0x11
+#define BCM56505_B1_REV_ID      0x12
+#define BCM56505_B2_REV_ID      0x13
+#define BCM56506_DEVICE_ID      0xb506
+#define BCM56506_A0_REV_ID      1
+#define BCM56506_A1_REV_ID      2
+#define BCM56506_B0_REV_ID      0x11
+#define BCM56506_B1_REV_ID      0x12
+#define BCM56506_B2_REV_ID      0x13
+#define BCM56507_DEVICE_ID      0xb507
+#define BCM56507_A0_REV_ID      1
+#define BCM56507_A1_REV_ID      2
+#define BCM56507_B0_REV_ID      0x11
+#define BCM56507_B1_REV_ID      0x12
+#define BCM56507_B2_REV_ID      0x13
+#define BCM56508_DEVICE_ID      0xb508
+#define BCM56508_A0_REV_ID      1
+#define BCM56508_A1_REV_ID      2
+#define BCM56508_B0_REV_ID      0x11
+#define BCM56508_B1_REV_ID      0x12
+#define BCM56508_B2_REV_ID      0x13
+#define BCM56509_DEVICE_ID      0xb509
+#define BCM56509_A0_REV_ID      1
+#define BCM56509_A1_REV_ID      2
+#define BCM56509_B0_REV_ID      0x11
+#define BCM56509_B1_REV_ID      0x12
+#define BCM56509_B2_REV_ID      0x13
+
+#define BCM56600_DEVICE_ID      0xb600
+#define BCM56600_A0_REV_ID      1
+#define BCM56600_B0_REV_ID      0x11
+#define BCM56600_C0_REV_ID      0x21
+#define BCM56601_DEVICE_ID      0xb601
+#define BCM56601_A0_REV_ID      1
+#define BCM56601_B0_REV_ID      0x11
+#define BCM56601_C0_REV_ID      0x21
+#define BCM56602_DEVICE_ID      0xb602
+#define BCM56602_A0_REV_ID      1
+#define BCM56602_B0_REV_ID      0x11
+#define BCM56602_C0_REV_ID      0x21
+#define BCM56603_DEVICE_ID      0xb603
+#define BCM56603_A0_REV_ID      1
+#define BCM56603_B0_REV_ID      0x11
+#define BCM56603_C0_REV_ID      0x21
+#define BCM56605_DEVICE_ID      0xb605
+#define BCM56605_A0_REV_ID      1
+#define BCM56605_B0_REV_ID      0x11
+#define BCM56605_C0_REV_ID      0x21
+#define BCM56606_DEVICE_ID      0xb606
+#define BCM56606_A0_REV_ID      1
+#define BCM56606_B0_REV_ID      0x11
+#define BCM56606_C0_REV_ID      0x21
+#define BCM56607_DEVICE_ID      0xb607
+#define BCM56607_A0_REV_ID      1
+#define BCM56607_B0_REV_ID      0x11
+#define BCM56607_C0_REV_ID      0x21
+#define BCM56608_DEVICE_ID      0xb608
+#define BCM56608_A0_REV_ID      1
+#define BCM56608_B0_REV_ID      0x11
+#define BCM56608_C0_REV_ID      0x21
+
+#define BCM56580_DEVICE_ID      0xb580
+#define BCM56580_A0_REV_ID      1
+
+#define BCM56700_DEVICE_ID      0xb700
+#define BCM56700_A0_REV_ID      1
+#define BCM56701_DEVICE_ID      0xb701
+#define BCM56701_A0_REV_ID      1
+
+#define BCM56800_DEVICE_ID      0xb800
+#define BCM56800_A0_REV_ID      1
+#define BCM56801_DEVICE_ID      0xb801
+#define BCM56801_A0_REV_ID      1
+#define BCM56802_DEVICE_ID      0xb802
+#define BCM56802_A0_REV_ID      1
+#define BCM56803_DEVICE_ID      0xb803
+#define BCM56803_A0_REV_ID      1
+
+#define BCM56224_DEVICE_ID      0xb224
+#define BCM56224_A0_REV_ID      1
+#define BCM56224_B0_REV_ID      0x11
+#define BCM56225_DEVICE_ID      0xb225
+#define BCM56225_A0_REV_ID      1
+#define BCM56225_B0_REV_ID      0x11
+#define BCM56226_DEVICE_ID      0xb226
+#define BCM56226_A0_REV_ID      1
+#define BCM56226_B0_REV_ID      0x11
+#define BCM56227_DEVICE_ID      0xb227
+#define BCM56227_A0_REV_ID      1
+#define BCM56227_B0_REV_ID      0x11
+#define BCM56228_DEVICE_ID      0xb228
+#define BCM56228_A0_REV_ID      1
+#define BCM56228_B0_REV_ID      0x11
+#define BCM56229_DEVICE_ID      0xb229
+#define BCM56229_A0_REV_ID      1
+#define BCM56229_B0_REV_ID      0x11
+#define BCM56024_DEVICE_ID      0xb024
+#define BCM56024_A0_REV_ID      1
+#define BCM56024_B0_REV_ID      0x11
+#define BCM56025_DEVICE_ID      0xb025
+#define BCM56025_A0_REV_ID      1
+#define BCM56025_B0_REV_ID      0x11
+#define BCM53724_DEVICE_ID      0xc724
+#define BCM53724_A0_REV_ID      1
+#define BCM53724_B0_REV_ID      0x11
+#define BCM53726_DEVICE_ID      0xc726
+#define BCM53726_A0_REV_ID      1
+#define BCM53726_B0_REV_ID      0x11
+
+#define BCM53312_DEVICE_ID      0xc312
+#define BCM53312_A0_REV_ID      1
+#define BCM53312_B0_REV_ID      0x11
+#define BCM53313_DEVICE_ID      0xc313
+#define BCM53313_A0_REV_ID      1
+#define BCM53313_B0_REV_ID      0x11
+#define BCM53314_DEVICE_ID      0xc314
+#define BCM53314_A0_REV_ID      1
+#define BCM53314_B0_REV_ID      0x11
+
+#define BCM53322_DEVICE_ID      0xc322
+#define BCM53322_A0_REV_ID      1
+#define BCM53323_DEVICE_ID      0xc323
+#define BCM53323_A0_REV_ID      1
+#define BCM53324_DEVICE_ID      0xc324
+#define BCM53324_A0_REV_ID      1
+
+
+#define BCM56218_DEVICE_ID              0xB218
+#define BCM56218_A0_REV_ID              1
+#define BCM56218_A1_REV_ID              2
+#define BCM56218_A2_REV_ID              3
+#define BCM56218X_DEVICE_ID             0xc710
+#define BCM56218X_A0_REV_ID             1
+#define BCM56218X_A1_REV_ID             2
+#define BCM56218X_A2_REV_ID             3
+#define BCM56219_DEVICE_ID              0xB219
+#define BCM56219_A0_REV_ID              1
+#define BCM56219_A1_REV_ID              2
+#define BCM56219_A2_REV_ID              3
+#define BCM56218R_DEVICE_ID             0xB21A
+#define BCM56218R_A0_REV_ID             1
+#define BCM56218R_A1_REV_ID             2
+#define BCM56218R_A2_REV_ID             3
+#define BCM56219R_DEVICE_ID             0xB21B
+#define BCM56219R_A0_REV_ID             1
+#define BCM56219R_A1_REV_ID             2
+#define BCM56219R_A2_REV_ID             3
+#define BCM56214_DEVICE_ID              0xB214
+#define BCM56214_A0_REV_ID              1
+#define BCM56214_A1_REV_ID              2
+#define BCM56214_A2_REV_ID              3
+#define BCM56215_DEVICE_ID              0xB215
+#define BCM56215_A0_REV_ID              1
+#define BCM56215_A1_REV_ID              2
+#define BCM56215_A2_REV_ID              3
+#define BCM56214R_DEVICE_ID             0xB21C
+#define BCM56214R_A0_REV_ID             1
+#define BCM56214R_A1_REV_ID             2
+#define BCM56214R_A2_REV_ID             3
+#define BCM56215R_DEVICE_ID             0xB21D
+#define BCM56215R_A0_REV_ID             1
+#define BCM56215R_A1_REV_ID             2
+#define BCM56215R_A2_REV_ID             3
+#define BCM56216_DEVICE_ID              0xB216
+#define BCM56216_A0_REV_ID              1
+#define BCM56216_A1_REV_ID              2
+#define BCM56216_A2_REV_ID              3
+#define BCM56217_DEVICE_ID              0xB217
+#define BCM56217_A0_REV_ID              1
+#define BCM56217_A1_REV_ID              2
+#define BCM56217_A2_REV_ID              3
+#define BCM56212_DEVICE_ID              0xB212
+#define BCM56212_A0_REV_ID              1
+#define BCM56212_A1_REV_ID              2
+#define BCM56212_A2_REV_ID              3
+#define BCM56213_DEVICE_ID              0xB213
+#define BCM56213_A0_REV_ID              1
+#define BCM56213_A1_REV_ID              2
+#define BCM56213_A2_REV_ID              3
+#define BCM53718_DEVICE_ID              0xC71A
+#define BCM53718_A0_REV_ID              1
+#define BCM53718_A1_REV_ID              2
+#define BCM53718_A2_REV_ID              3
+#define BCM53714_DEVICE_ID              0xC71B
+#define BCM53714_A0_REV_ID              1
+#define BCM53714_A1_REV_ID              2
+#define BCM53714_A2_REV_ID              3
+#define BCM53716_DEVICE_ID              0xC716
+#define BCM53716_A0_REV_ID              1
+#define BCM53716_A1_REV_ID              2
+#define BCM53716_A2_REV_ID              3
+#define BCM56018_DEVICE_ID              0xB018
+#define BCM56018_A0_REV_ID              1
+#define BCM56018_A1_REV_ID              2
+#define BCM56018_A2_REV_ID              3
+#define BCM56014_DEVICE_ID              0xB014
+#define BCM56014_A0_REV_ID              1
+#define BCM56014_A1_REV_ID              2
+#define BCM56014_A2_REV_ID              3
+
+#define BCM56510_DEVICE_ID      0xb510
+#define BCM56510_A0_REV_ID      1
+#define BCM56511_DEVICE_ID      0xb511
+#define BCM56511_A0_REV_ID      1
+#define BCM56512_DEVICE_ID      0xb512
+#define BCM56512_A0_REV_ID      1
+#define BCM56513_DEVICE_ID      0xb513
+#define BCM56513_A0_REV_ID      1
+#define BCM56514_DEVICE_ID      0xb514
+#define BCM56514_A0_REV_ID      1
+#define BCM56516_DEVICE_ID      0xb516
+#define BCM56516_A0_REV_ID      1
+#define BCM56517_DEVICE_ID      0xb517
+#define BCM56517_A0_REV_ID      1
+#define BCM56518_DEVICE_ID      0xb518
+#define BCM56518_A0_REV_ID      1
+#define BCM56519_DEVICE_ID      0xb519
+#define BCM56519_A0_REV_ID      1
+
+#define BCM56620_DEVICE_ID      0xb620
+#define BCM56620_A0_REV_ID      1
+#define BCM56620_A1_REV_ID      2
+#define BCM56620_B0_REV_ID      0x11
+#define BCM56620_B1_REV_ID      0x12
+#define BCM56620_B2_REV_ID      0x13
+#define BCM56624_DEVICE_ID      0xb624
+#define BCM56624_A0_REV_ID      1
+#define BCM56624_A1_REV_ID      2
+#define BCM56624_B0_REV_ID      0x11
+#define BCM56624_B1_REV_ID      0x12
+#define BCM56624_B2_REV_ID      0x13
+#define BCM56626_DEVICE_ID      0xb626
+#define BCM56626_A0_REV_ID      1
+#define BCM56626_A1_REV_ID      2
+#define BCM56626_B0_REV_ID      0x11
+#define BCM56626_B1_REV_ID      0x12
+#define BCM56626_B2_REV_ID      0x13
+#define BCM56628_DEVICE_ID      0xb628
+#define BCM56628_A0_REV_ID      1
+#define BCM56628_A1_REV_ID      2
+#define BCM56628_B0_REV_ID      0x11
+#define BCM56628_B1_REV_ID      0x12
+#define BCM56628_B2_REV_ID      0x13
+#define BCM56629_DEVICE_ID      0xb629
+#define BCM56629_A0_REV_ID      1
+#define BCM56629_A1_REV_ID      2
+#define BCM56629_B0_REV_ID      0x11
+#define BCM56629_B1_REV_ID      0x12
+#define BCM56629_B2_REV_ID      0x13
+
+#define BCM56680_DEVICE_ID      0xb680
+#define BCM56680_A0_REV_ID      1
+#define BCM56680_A1_REV_ID      2
+#define BCM56680_B0_REV_ID      0x11
+#define BCM56680_B1_REV_ID      0x12
+#define BCM56680_B2_REV_ID      0x13
+#define BCM56684_DEVICE_ID      0xb684
+#define BCM56684_A0_REV_ID      1
+#define BCM56684_A1_REV_ID      2
+#define BCM56684_B0_REV_ID      0x11
+#define BCM56684_B1_REV_ID      0x12
+#define BCM56684_B2_REV_ID      0x13
+#define BCM56686_DEVICE_ID      0xb686
+#define BCM56686_B0_REV_ID      0x11
+#define BCM56686_B1_REV_ID      0x12
+#define BCM56686_B2_REV_ID      0x13
+
+#define BCM56820_DEVICE_ID      0xb820
+#define BCM56820_A0_REV_ID      1
+#define BCM56820_B0_REV_ID      0x11
+#define BCM56821_DEVICE_ID      0xb821
+#define BCM56821_A0_REV_ID      1
+#define BCM56821_B0_REV_ID      0x11
+#define BCM56822_DEVICE_ID      0xb822
+#define BCM56822_A0_REV_ID      1
+#define BCM56822_B0_REV_ID      0x11
+#define BCM56823_DEVICE_ID      0xb823
+#define BCM56823_A0_REV_ID      1
+#define BCM56823_B0_REV_ID      0x11
+#define BCM56825_DEVICE_ID      0xb825
+#define BCM56825_B0_REV_ID      0x11
+
+#define BCM56720_DEVICE_ID      0xb720
+#define BCM56720_A0_REV_ID      1
+#define BCM56720_B0_REV_ID      0x11
+#define BCM56721_DEVICE_ID      0xb721
+#define BCM56721_A0_REV_ID      1
+#define BCM56721_B0_REV_ID      0x11
+
+#define BCM56725_DEVICE_ID      0xb725
+#define BCM56725_A0_REV_ID      1
+#define BCM56725_B0_REV_ID      0x11
+
+#define BCM56630_DEVICE_ID      0xb630
+#define BCM56630_A0_REV_ID      1
+#define BCM56630_B0_REV_ID      0x11
+#define BCM56634_DEVICE_ID      0xb634
+#define BCM56634_A0_REV_ID      1
+#define BCM56634_B0_REV_ID      0x11
+#define BCM56636_DEVICE_ID      0xb636
+#define BCM56636_A0_REV_ID      1
+#define BCM56636_B0_REV_ID      0x11
+#define BCM56638_DEVICE_ID      0xb638
+#define BCM56638_A0_REV_ID      1
+#define BCM56638_B0_REV_ID      0x11
+#define BCM56639_DEVICE_ID      0xb639
+#define BCM56639_A0_REV_ID      1
+#define BCM56639_B0_REV_ID      0x11
+
+#define BCM56685_DEVICE_ID      0xb685
+#define BCM56685_A0_REV_ID      1
+#define BCM56685_B0_REV_ID      0x11
+#define BCM56689_DEVICE_ID      0xb689
+#define BCM56689_A0_REV_ID      1
+#define BCM56689_B0_REV_ID      0x11
+
+#define BCM56520_DEVICE_ID      0xb520
+#define BCM56520_A0_REV_ID      1
+#define BCM56520_B0_REV_ID      0x11
+#define BCM56521_DEVICE_ID      0xb521
+#define BCM56521_A0_REV_ID      1
+#define BCM56521_B0_REV_ID      0x11
+#define BCM56522_DEVICE_ID      0xb522
+#define BCM56522_A0_REV_ID      1
+#define BCM56522_B0_REV_ID      0x11
+#define BCM56524_DEVICE_ID      0xb524
+#define BCM56524_A0_REV_ID      1
+#define BCM56524_B0_REV_ID      0x11
+#define BCM56526_DEVICE_ID      0xb526
+#define BCM56526_A0_REV_ID      1
+#define BCM56526_B0_REV_ID      0x11
+
+#define BCM56534_DEVICE_ID      0xb534
+#define BCM56534_B0_REV_ID      0x11
+#define BCM56538_DEVICE_ID      0xb538
+#define BCM56538_B0_REV_ID      0x11
+
+#define BCM56331_DEVICE_ID      0xb331
+#define BCM56331_A0_REV_ID      1
+#define BCM56331_B0_REV_ID      0x11
+#define BCM56331_B1_REV_ID      0x12
+#define BCM56333_DEVICE_ID      0xb333
+#define BCM56333_A0_REV_ID      1
+#define BCM56333_B0_REV_ID      0x11
+#define BCM56333_B1_REV_ID      0x12
+#define BCM56334_DEVICE_ID      0xb334
+#define BCM56334_A0_REV_ID      1
+#define BCM56334_B0_REV_ID      0x11
+#define BCM56334_B1_REV_ID      0x12
+#define BCM56338_DEVICE_ID      0xb338
+#define BCM56338_A0_REV_ID      1
+#define BCM56338_B0_REV_ID      0x11
+#define BCM56338_B1_REV_ID      0x12
+
+#define BCM56320_DEVICE_ID      0xb320
+#define BCM56320_A0_REV_ID      1
+#define BCM56320_B0_REV_ID      0x11
+#define BCM56320_B1_REV_ID      0x12
+#define BCM56321_DEVICE_ID      0xb321
+#define BCM56321_A0_REV_ID      1
+#define BCM56321_B0_REV_ID      0x11
+#define BCM56321_B1_REV_ID      0x12
+
+
+#define BCM56548H_DEVICE_ID     0xB54A
+#define BCM56548H_A0_REV_ID     1
+#define BCM56548_DEVICE_ID      0xb548
+#define BCM56548_A0_REV_ID      1
+#define BCM56547_DEVICE_ID      0xb547
+#define BCM56547_A0_REV_ID      1
+
+#define BCM56346_DEVICE_ID      0xb346
+#define BCM56346_A0_REV_ID      1
+#define BCM56345_DEVICE_ID      0xb345
+#define BCM56345_A0_REV_ID      1
+#define BCM56344_DEVICE_ID      0xb344
+#define BCM56344_A0_REV_ID      1
+#define BCM56342_DEVICE_ID      0xb342
+#define BCM56342_A0_REV_ID      1
+#define BCM56340_DEVICE_ID      0xb340
+#define BCM56340_A0_REV_ID      1
+
+#define BCM56049_DEVICE_ID      0xb049
+#define BCM56049_A0_REV_ID      1
+#define BCM56048_DEVICE_ID      0xb048
+#define BCM56048_A0_REV_ID      1
+#define BCM56047_DEVICE_ID      0xb047
+#define BCM56047_A0_REV_ID      1
+
+#define BCM56042_DEVICE_ID      0xb042
+#define BCM56042_A0_REV_ID      1
+#define BCM56041_DEVICE_ID      0xb041
+#define BCM56041_A0_REV_ID      1
+#define BCM56040_DEVICE_ID      0xb040
+#define BCM56040_A0_REV_ID      1
+
+#define BCM56132_DEVICE_ID      0xb132
+#define BCM56132_A0_REV_ID      1
+#define BCM56132_B0_REV_ID      0x11
+#define BCM56132_B1_REV_ID      0x12
+#define BCM56134_DEVICE_ID      0xb134
+#define BCM56134_A0_REV_ID      1
+#define BCM56134_B0_REV_ID      0x11
+#define BCM56134_B1_REV_ID      0x12
+
+#define BCM56230_DEVICE_ID      0xb230
+#define BCM56230_B1_REV_ID      0x12
+#define BCM56231_DEVICE_ID      0xb231
+#define BCM56231_B1_REV_ID      0x12
+
+#define BCM56140_DEVICE_ID      0xb140
+#define BCM56140_A0_REV_ID      1
+#define BCM56142_DEVICE_ID      0xb142
+#define BCM56142_A0_REV_ID      1
+#define BCM56143_DEVICE_ID      0xb143
+#define BCM56143_A0_REV_ID      1
+#define BCM56144_DEVICE_ID      0xb144
+#define BCM56144_A0_REV_ID      1
+#define BCM56146_DEVICE_ID      0xb146
+#define BCM56146_A0_REV_ID      1
+#define BCM56147_DEVICE_ID      0xb147
+#define BCM56147_A0_REV_ID      1
+#define BCM56149_DEVICE_ID      0xb149
+#define BCM56149_A0_REV_ID      1
+
+#define BCM56840_DEVICE_ID      0xb840
+#define BCM56840_A0_REV_ID      1
+#define BCM56840_A1_REV_ID      2
+#define BCM56840_A2_REV_ID      3
+#define BCM56840_A3_REV_ID      4
+#define BCM56840_A4_REV_ID      5
+#define BCM56840_B0_REV_ID      0x11
+#define BCM56840_B1_REV_ID      0x12
+#define BCM56841_DEVICE_ID      0xb841
+#define BCM56841_A0_REV_ID      1
+#define BCM56841_A1_REV_ID      2
+#define BCM56841_A2_REV_ID      3
+#define BCM56841_A3_REV_ID      4
+#define BCM56841_A4_REV_ID      5
+#define BCM56841_B0_REV_ID      0x11
+#define BCM56841_B1_REV_ID      0x12
+#define BCM56843_DEVICE_ID      0xb843
+#define BCM56843_A0_REV_ID      1
+#define BCM56843_A1_REV_ID      2
+#define BCM56843_A2_REV_ID      3
+#define BCM56843_A3_REV_ID      4
+#define BCM56843_A4_REV_ID      5
+#define BCM56843_B0_REV_ID      0x11
+#define BCM56843_B1_REV_ID      0x12
+#define BCM56845_DEVICE_ID      0xb845
+#define BCM56845_A0_REV_ID      1
+#define BCM56845_A1_REV_ID      2
+#define BCM56845_A2_REV_ID      3
+#define BCM56845_A3_REV_ID      4
+#define BCM56845_A4_REV_ID      5
+#define BCM56845_B0_REV_ID      0x11
+#define BCM56845_B1_REV_ID      0x12
+
+#define BCM56743_DEVICE_ID      0xb743
+#define BCM56743_A0_REV_ID      1
+#define BCM56743_A1_REV_ID      2
+#define BCM56743_A2_REV_ID      3
+#define BCM56743_A3_REV_ID      4
+#define BCM56743_A4_REV_ID      5
+#define BCM56743_B0_REV_ID      0x11
+#define BCM56743_B1_REV_ID      0x12
+#define BCM56745_DEVICE_ID      0xb745
+#define BCM56745_A0_REV_ID      1
+#define BCM56745_A1_REV_ID      2
+#define BCM56745_A2_REV_ID      3
+#define BCM56745_A3_REV_ID      4
+#define BCM56745_A4_REV_ID      5
+#define BCM56745_B0_REV_ID      0x11
+#define BCM56745_B1_REV_ID      0x12
+
+#define BCM56260_DEVICE_ID      0xb260
+#define BCM56260_A0_REV_ID      1
+#define BCM56260_B0_REV_ID      0x11
+#define BCM56261_DEVICE_ID      0xb261
+#define BCM56261_A0_REV_ID      1
+#define BCM56261_B0_REV_ID      0x11
+#define BCM56262_DEVICE_ID      0xb262
+#define BCM56262_A0_REV_ID      1
+#define BCM56262_B0_REV_ID      0x11
+#define BCM56263_DEVICE_ID      0xb263
+#define BCM56263_A0_REV_ID      1
+#define BCM56263_B0_REV_ID      0x11
+
+#define BCM56265_DEVICE_ID      0xb265
+#define BCM56265_A0_REV_ID      1
+#define BCM56265_B0_REV_ID      0x11
+#define BCM56266_DEVICE_ID      0xb266
+#define BCM56266_A0_REV_ID      1
+#define BCM56266_B0_REV_ID      0x11
+#define BCM56267_DEVICE_ID      0xb267
+#define BCM56267_A0_REV_ID      1
+#define BCM56267_B0_REV_ID      0x11
+#define BCM56268_DEVICE_ID      0xb268
+#define BCM56268_A0_REV_ID      1
+#define BCM56268_B0_REV_ID      0x11
+
+#define BCM56233_DEVICE_ID      0xb233
+#define BCM56233_B0_REV_ID      0x11
+
+#define BCM56460_DEVICE_ID      0xb460
+#define BCM56460_A0_REV_ID      1
+#define BCM56460_B0_REV_ID      0x11
+#define BCM56461_DEVICE_ID      0xb461
+#define BCM56461_A0_REV_ID      1
+#define BCM56461_B0_REV_ID      0x11
+#define BCM56462_DEVICE_ID      0xb462
+#define BCM56462_A0_REV_ID      1
+#define BCM56462_B0_REV_ID      0x11
+#define BCM56463_DEVICE_ID      0xb463
+#define BCM56463_A0_REV_ID      1
+#define BCM56463_B0_REV_ID      0x11
+
+#define BCM56465_DEVICE_ID      0xb465
+#define BCM56465_A0_REV_ID      1
+#define BCM56465_B0_REV_ID      0x11
+#define BCM56466_DEVICE_ID      0xb466
+#define BCM56466_A0_REV_ID      1
+#define BCM56466_B0_REV_ID      0x11
+#define BCM56467_DEVICE_ID      0xb467
+#define BCM56467_A0_REV_ID      1
+#define BCM56467_B0_REV_ID      0x11
+#define BCM56468_DEVICE_ID      0xb468
+#define BCM56468_A0_REV_ID      1
+#define BCM56468_B0_REV_ID      0x11
+
+#define BCM56270_DEVICE_ID      0xb270
+#define BCM56270_A0_REV_ID      1
+#define BCM56271_DEVICE_ID      0xb271
+#define BCM56271_A0_REV_ID      1
+#define BCM56272_DEVICE_ID      0xb272
+#define BCM56272_A0_REV_ID      1
+
+#define BCM53460_DEVICE_ID      0x8460
+#define BCM53460_A0_REV_ID      1
+#define BCM53461_DEVICE_ID      0x8461
+#define BCM53461_A0_REV_ID      1
+
+#define BCM56842_DEVICE_ID      0xb842
+#define BCM56842_A0_REV_ID      1
+#define BCM56842_A1_REV_ID      2
+#define BCM56844_DEVICE_ID      0xb844
+#define BCM56844_A0_REV_ID      1
+#define BCM56844_A1_REV_ID      2
+#define BCM56846_DEVICE_ID      0xb846
+#define BCM56846_A0_REV_ID      1
+#define BCM56846_A1_REV_ID      2
+#define BCM56549_DEVICE_ID      0xb549
+#define BCM56549_A0_REV_ID      1
+#define BCM56549_A1_REV_ID      2
+#define BCM56053_DEVICE_ID      0xb053
+#define BCM56053_A0_REV_ID      1
+#define BCM56053_A1_REV_ID      2
+#define BCM56831_DEVICE_ID      0xb831
+#define BCM56831_A0_REV_ID      1
+#define BCM56831_A1_REV_ID      2
+#define BCM56835_DEVICE_ID      0xb835
+#define BCM56835_A0_REV_ID      1
+#define BCM56835_A1_REV_ID      2
+#define BCM56838_DEVICE_ID      0xb838
+#define BCM56838_A0_REV_ID      1
+#define BCM56838_A1_REV_ID      2
+#define BCM56847_DEVICE_ID      0xb847
+#define BCM56847_A0_REV_ID      1
+#define BCM56847_A1_REV_ID      2
+#define BCM56847_A2_REV_ID      3
+#define BCM56847_A3_REV_ID      4
+#define BCM56847_A4_REV_ID      5
+#define BCM56847_B0_REV_ID      0x11
+#define BCM56847_B1_REV_ID      0x12
+#define BCM56849_DEVICE_ID      0xb849
+#define BCM56849_A0_REV_ID      1
+#define BCM56849_A1_REV_ID      2
+
+#define BCM56742_DEVICE_ID      0xb742
+#define BCM56742_A0_REV_ID      1
+#define BCM56742_A1_REV_ID      2
+#define BCM56742_A2_REV_ID      3
+#define BCM56744_DEVICE_ID      0xb744
+#define BCM56744_A0_REV_ID      1
+#define BCM56744_A1_REV_ID      2
+#define BCM56746_DEVICE_ID      0xb746
+#define BCM56746_A0_REV_ID      1
+#define BCM56746_A1_REV_ID      2
+
+
+#define BCM56640_DEVICE_ID      0xb640
+#define BCM56640_A0_REV_ID      1
+#define BCM56640_A1_REV_ID      2
+#define BCM56640_B0_REV_ID      0x11
+#define BCM56643_DEVICE_ID      0xb643
+#define BCM56643_A0_REV_ID      1
+#define BCM56643_A1_REV_ID      2
+#define BCM56643_B0_REV_ID      0x11
+#define BCM56644_DEVICE_ID      0xb644
+#define BCM56644_A0_REV_ID      1
+#define BCM56644_A1_REV_ID      2
+#define BCM56644_B0_REV_ID      0x11
+#define BCM56648_DEVICE_ID      0xb648
+#define BCM56648_A0_REV_ID      1
+#define BCM56648_A1_REV_ID      2
+#define BCM56648_B0_REV_ID      0x11
+#define BCM56649_DEVICE_ID      0xb649
+#define BCM56649_A0_REV_ID      1
+#define BCM56649_A1_REV_ID      2
+#define BCM56649_B0_REV_ID      0x11
+
+#define BCM56540_DEVICE_ID      0xb540
+#define BCM56540_A0_REV_ID      1
+#define BCM56540_A1_REV_ID      2
+#define BCM56540_B0_REV_ID      0x11
+#define BCM56541_DEVICE_ID      0xb541
+#define BCM56541_A0_REV_ID      1
+#define BCM56541_A1_REV_ID      2
+#define BCM56541_B0_REV_ID      0x11
+#define BCM56542_DEVICE_ID      0xb542
+#define BCM56542_A0_REV_ID      1
+#define BCM56542_A1_REV_ID      2
+#define BCM56542_B0_REV_ID      0x11
+#define BCM56543_DEVICE_ID      0xb543
+#define BCM56543_A0_REV_ID      1
+#define BCM56543_A1_REV_ID      2
+#define BCM56543_B0_REV_ID      0x11
+#define BCM56544_DEVICE_ID      0xb544
+#define BCM56544_A0_REV_ID      1
+#define BCM56544_A1_REV_ID      2
+#define BCM56544_B0_REV_ID      0x11
+
+#define BCM56545_DEVICE_ID      0xb545
+#define BCM56545_A0_REV_ID      1
+#define BCM56545_A1_REV_ID      2
+#define BCM56545_B0_REV_ID      0x11
+#define BCM56546_DEVICE_ID      0xb546
+#define BCM56546_A0_REV_ID      1
+#define BCM56546_A1_REV_ID      2
+#define BCM56546_B0_REV_ID      0x11
+
+#define BCM56044_DEVICE_ID      0xb044
+#define BCM56044_B0_REV_ID      0x11
+#define BCM56045_DEVICE_ID      0xb045
+#define BCM56045_A0_REV_ID      1
+#define BCM56045_A1_REV_ID      2
+#define BCM56045_B0_REV_ID      0x11
+#define BCM56046_DEVICE_ID      0xb046
+#define BCM56046_A0_REV_ID      1
+#define BCM56046_A1_REV_ID      2
+#define BCM56046_B0_REV_ID      0x11
+
+
+#define BCM56440_DEVICE_ID      0xb440
+#define BCM56440_A0_REV_ID      1
+#define BCM56440_B0_REV_ID      0x11
+#define BCM56441_DEVICE_ID      0xb441
+#define BCM56441_A0_REV_ID      1
+#define BCM56441_B0_REV_ID      0x11
+#define BCM56442_DEVICE_ID      0xb442
+#define BCM56442_A0_REV_ID      1
+#define BCM56442_B0_REV_ID      0x11
+#define BCM56443_DEVICE_ID      0xb443
+#define BCM56443_A0_REV_ID      1
+#define BCM56443_B0_REV_ID      0x11
+#define BCM56445_DEVICE_ID      0xb445
+#define BCM56445_A0_REV_ID      1
+#define BCM56445_B0_REV_ID      0x11
+#define BCM56446_DEVICE_ID      0xb446
+#define BCM56446_A0_REV_ID      1
+#define BCM56446_B0_REV_ID      0x11
+#define BCM56447_DEVICE_ID      0xb447
+#define BCM56447_A0_REV_ID      1
+#define BCM56447_B0_REV_ID      0x11
+#define BCM56448_DEVICE_ID      0xb448
+#define BCM56448_A0_REV_ID      1
+#define BCM56448_B0_REV_ID      0x11
+#define BCM56449_DEVICE_ID      0xb449
+#define BCM56449_A0_REV_ID      1
+#define BCM56449_B0_REV_ID      0x11
+#define BCM56240_DEVICE_ID      0xb240
+#define BCM56240_A0_REV_ID      1
+#define BCM56240_B0_REV_ID      0x11
+#define BCM56241_DEVICE_ID      0xb241
+#define BCM56241_A0_REV_ID      1
+#define BCM56241_B0_REV_ID      0x11
+#define BCM56242_DEVICE_ID      0xb242
+#define BCM56242_A0_REV_ID      1
+#define BCM56242_B0_REV_ID      0x11
+#define BCM56243_DEVICE_ID      0xb243
+#define BCM56243_A0_REV_ID      1
+#define BCM56243_B0_REV_ID      0x11
+#define BCM56245_DEVICE_ID      0xb245
+#define BCM56245_A0_REV_ID      1
+#define BCM56245_B0_REV_ID      0x11
+#define BCM56246_DEVICE_ID      0xb246
+#define BCM56246_A0_REV_ID      1
+#define BCM56246_B0_REV_ID      0x11
+#define BCM55440_DEVICE_ID      0xa440
+#define BCM55440_A0_REV_ID      1
+#define BCM55440_B0_REV_ID      0x11
+#define BCM55441_DEVICE_ID      0xa441
+#define BCM55441_A0_REV_ID      1
+#define BCM55441_B0_REV_ID      0x11
+
+#define BCM55450_DEVICE_ID      0xa450
+#define BCM55450_A0_REV_ID      1
+#define BCM55450_B0_REV_ID      0x11
+#define BCM55450_B1_REV_ID      0x12
+
+#define BCM55455_DEVICE_ID      0xa455
+#define BCM55455_A0_REV_ID      1
+#define BCM55455_B0_REV_ID      0x11
+#define BCM55455_B1_REV_ID      0x12
+
+#define BCM56248_DEVICE_ID      0xb248
+#define BCM56248_A0_REV_ID      1
+#define BCM56248_B0_REV_ID      0x11
+#define BCM56248_B1_REV_ID      0x12
+
+#define BCM56450_DEVICE_ID      0xb450
+#define BCM56450_A0_REV_ID      1
+#define BCM56450_B0_REV_ID      0x11
+#define BCM56450_B1_REV_ID      0x12
+
+#define BCM56452_DEVICE_ID      0xb452
+#define BCM56452_A0_REV_ID      1
+#define BCM56452_B0_REV_ID      0x11
+#define BCM56452_B1_REV_ID      0x12
+
+#define BCM56454_DEVICE_ID      0xb454
+#define BCM56454_A0_REV_ID      1
+#define BCM56454_B0_REV_ID      0x11
+#define BCM56454_B1_REV_ID      0x12
+
+#define BCM56455_DEVICE_ID      0xb455
+#define BCM56455_A0_REV_ID      1
+#define BCM56455_B0_REV_ID      0x11
+#define BCM56455_B1_REV_ID      0x12
+
+#define BCM56456_DEVICE_ID      0xb456
+#define BCM56456_A0_REV_ID      1
+#define BCM56456_B0_REV_ID      0x11
+#define BCM56456_B1_REV_ID      0x12
+
+#define BCM56457_DEVICE_ID      0xb457
+#define BCM56457_A0_REV_ID      1
+#define BCM56457_B0_REV_ID      0x11
+#define BCM56457_B1_REV_ID      0x12
+
+#define BCM56458_DEVICE_ID      0xb458
+#define BCM56458_A0_REV_ID      1
+#define BCM56458_B0_REV_ID      0x11
+#define BCM56458_B1_REV_ID      0x12
+
+#define BCM56850_DEVICE_ID      0xb850
+#define BCM56850_A0_REV_ID      1
+#define BCM56850_A1_REV_ID      2
+#define BCM56850_A2_REV_ID      3
+#define BCM56851_DEVICE_ID      0xb851
+#define BCM56851_A0_REV_ID      1
+#define BCM56851_A1_REV_ID      2
+#define BCM56851_A2_REV_ID      3
+#define BCM56852_DEVICE_ID      0xb852
+#define BCM56852_A0_REV_ID      1
+#define BCM56852_A1_REV_ID      2
+#define BCM56852_A2_REV_ID      3
+#define BCM56853_DEVICE_ID      0xb853
+#define BCM56853_A0_REV_ID      1
+#define BCM56853_A1_REV_ID      2
+#define BCM56853_A2_REV_ID      3
+#define BCM56854_DEVICE_ID      0xb854
+#define BCM56854_A0_REV_ID      1
+#define BCM56854_A1_REV_ID      2
+#define BCM56854_A2_REV_ID      3
+#define BCM56855_DEVICE_ID      0xb855
+#define BCM56855_A0_REV_ID      1
+#define BCM56855_A1_REV_ID      2
+#define BCM56855_A2_REV_ID      3
+#define BCM56834_DEVICE_ID      0xb834
+#define BCM56834_A0_REV_ID      1
+#define BCM56834_A1_REV_ID      2
+#define BCM56834_A2_REV_ID      3
+
+#define BCM56860_DEVICE_ID      0xb860
+#define BCM56860_A0_REV_ID      1
+#define BCM56860_A1_REV_ID      2
+#define BCM56861_DEVICE_ID      0xb861
+#define BCM56861_A0_REV_ID      1
+#define BCM56861_A1_REV_ID      2
+#define BCM56862_DEVICE_ID      0xb862
+#define BCM56862_A0_REV_ID      1
+#define BCM56862_A1_REV_ID      2
+#define BCM56864_DEVICE_ID      0xb864
+#define BCM56864_A0_REV_ID      1
+#define BCM56864_A1_REV_ID      2
+#define BCM56865_DEVICE_ID      0xb865
+#define BCM56865_A0_REV_ID      1
+#define BCM56865_A1_REV_ID      2
+#define BCM56866_DEVICE_ID      0xb866
+#define BCM56866_A0_REV_ID      1
+#define BCM56866_A1_REV_ID      2
+#define BCM56867_DEVICE_ID      0xb867
+#define BCM56867_A0_REV_ID      1
+#define BCM56867_A1_REV_ID      2
+#define BCM56868_DEVICE_ID      0xb868
+#define BCM56868_A0_REV_ID      1
+#define BCM56868_A1_REV_ID      2
+#define BCM56832_DEVICE_ID      0xb832
+#define BCM56832_A0_REV_ID      1
+#define BCM56832_A1_REV_ID      2
+#define BCM56833_DEVICE_ID      0xb833
+#define BCM56833_A0_REV_ID      1
+#define BCM56833_A1_REV_ID      2
+#define BCM56836_DEVICE_ID      0xb836
+#define BCM56836_A0_REV_ID      1
+#define BCM56836_A1_REV_ID      2
+
+
+#define BCM56750_DEVICE_ID      0xb750
+#define BCM56750_A0_REV_ID      1
+#define BCM56750_A1_REV_ID      2
+#define BCM56750_A2_REV_ID      3
+
+#define BCM56830_DEVICE_ID      0xb830
+#define BCM56830_A0_REV_ID      1
+#define BCM56830_A1_REV_ID      2
+#define BCM56830_A2_REV_ID      3
+
+#define BCM56150_DEVICE_ID      0xb150
+#define BCM56150_A0_REV_ID      1
+#define BCM56151_DEVICE_ID      0xb151
+#define BCM56151_A0_REV_ID      1
+#define BCM56152_DEVICE_ID      0xb152
+#define BCM56152_A0_REV_ID      1
+
+#define BCM53342_DEVICE_ID      0x8342
+#define BCM53342_A0_REV_ID      1
+#define BCM53343_DEVICE_ID      0x8343
+#define BCM53343_A0_REV_ID      1
+#define BCM53344_DEVICE_ID      0x8344
+#define BCM53344_A0_REV_ID      1
+#define BCM53346_DEVICE_ID      0x8346
+#define BCM53346_A0_REV_ID      1
+#define BCM53347_DEVICE_ID      0x8347
+#define BCM53347_A0_REV_ID      1
+
+#define BCM53333_DEVICE_ID      0x8333
+#define BCM53333_A0_REV_ID      1
+#define BCM53334_DEVICE_ID      0x8334
+#define BCM53334_A0_REV_ID      1
+
+#define BCM53393_DEVICE_ID      0x8393
+#define BCM53393_A0_REV_ID      1
+#define BCM53394_DEVICE_ID      0x8394
+#define BCM53394_A0_REV_ID      1
+
+#define BCM53400_DEVICE_ID      0x8400 
+#define BCM53400_A0_REV_ID      1
+#define BCM56060_DEVICE_ID      0xb060
+#define BCM56060_A0_REV_ID      1
+#define BCM56062_DEVICE_ID      0xb062
+#define BCM56062_A0_REV_ID      1
+#define BCM56063_DEVICE_ID      0xb063
+#define BCM56063_A0_REV_ID      1
+#define BCM56064_DEVICE_ID      0xb064
+#define BCM56064_A0_REV_ID      1
+#define BCM56065_DEVICE_ID      0xb065
+#define BCM56065_A0_REV_ID      1
+#define BCM56066_DEVICE_ID      0xb066
+#define BCM56066_A0_REV_ID      1
+#define BCM53401_DEVICE_ID      0x8401
+#define BCM53411_DEVICE_ID      0x8411
+#define BCM53401_A0_REV_ID      1
+#define BCM53402_DEVICE_ID      0x8402
+#define BCM53412_DEVICE_ID      0x8412
+#define BCM53402_A0_REV_ID      1
+#define BCM53403_DEVICE_ID      0x8403
+#define BCM53413_DEVICE_ID      0x8413
+#define BCM53403_A0_REV_ID      1
+#define BCM53404_DEVICE_ID      0x8404
+#define BCM53414_DEVICE_ID      0x8414
+#define BCM53404_A0_REV_ID      1
+#define BCM53405_DEVICE_ID      0x8405
+#define BCM53415_DEVICE_ID      0x8415
+#define BCM53405_A0_REV_ID      1
+#define BCM53406_DEVICE_ID      0x8406
+#define BCM53416_DEVICE_ID      0x8416
+#define BCM53406_A0_REV_ID      1
+#define BCM53408_DEVICE_ID      0x8408
+#define BCM53418_DEVICE_ID      0x8418
+#define BCM53408_A0_REV_ID      1
+#define BCM53365_DEVICE_ID      0x8365
+#define BCM53365_A0_REV_ID      1
+#define BCM53369_DEVICE_ID      0x8369
+#define BCM53369_A0_REV_ID      1
+
+#define BCM53454_DEVICE_ID      0x8454
+#define BCM53455_DEVICE_ID      0x8455
+#define BCM53454_A0_REV_ID      1
+#define BCM53456_DEVICE_ID      0x8456
+#define BCM53457_DEVICE_ID      0x8457
+#define BCM53456_A0_REV_ID      1
+
+#define BCM53422_DEVICE_ID      0x8422
+#define BCM53422_A0_REV_ID      1
+#define BCM53424_DEVICE_ID      0x8424
+#define BCM53424_A0_REV_ID      1
+#define BCM53426_DEVICE_ID      0x8426
+#define BCM53426_A0_REV_ID      1
+
+#define BCM56960_DEVICE_ID      0xb960
+#define BCM56960_A0_REV_ID      1
+#define BCM56960_B0_REV_ID      0x11
+#define BCM56960_B1_REV_ID      0x12
+#define BCM56961_DEVICE_ID      0xb961
+#define BCM56961_A0_REV_ID      1
+#define BCM56961_B0_REV_ID      0x11
+#define BCM56961_B1_REV_ID      0x12
+#define BCM56962_DEVICE_ID      0xb962
+#define BCM56962_A0_REV_ID      1
+#define BCM56962_B0_REV_ID      0x11
+#define BCM56962_B1_REV_ID      0x12
+#define BCM56963_DEVICE_ID      0xb963
+#define BCM56963_A0_REV_ID      1
+#define BCM56963_B0_REV_ID      0x11
+#define BCM56963_B1_REV_ID      0x12
+#define BCM56930_DEVICE_ID      0xb930
+#define BCM56930_A0_REV_ID      1
+#define BCM56930_B0_REV_ID      0x11
+#define BCM56930_B1_REV_ID      0x12
+#define BCM56930_C0_REV_ID      0x21
+#define BCM56931_DEVICE_ID      0xb931
+#define BCM56931_A0_REV_ID      1
+#define BCM56931_B0_REV_ID      0x11
+#define BCM56931_C0_REV_ID      0x21
+#define BCM56935_DEVICE_ID      0xb935
+#define BCM56935_A0_REV_ID      1
+#define BCM56935_B0_REV_ID      0x11
+#define BCM56935_C0_REV_ID      0x21
+#define BCM56936_DEVICE_ID      0xb936
+#define BCM56936_A0_REV_ID      1
+#define BCM56936_B0_REV_ID      0x11
+#define BCM56936_C0_REV_ID      0x21
+#define BCM56939_DEVICE_ID      0xb939
+#define BCM56939_A0_REV_ID      1
+#define BCM56939_B0_REV_ID      0x11
+#define BCM56939_C0_REV_ID      0x21
+
+#define BCM56168_DEVICE_ID      0xb168
+#define BCM56168_A0_REV_ID      1
+#define BCM56168_B0_REV_ID      0x11
+#define BCM56168_B1_REV_ID      0x12
+#define BCM56169_DEVICE_ID      0xb169
+#define BCM56169_A0_REV_ID      1
+#define BCM56169_B0_REV_ID      0x11
+#define BCM56169_B1_REV_ID      0x12
+
+#define BCM56980_DEVICE_ID_MASK 0xFFF0
+#define BCM56980_DEVICE_ID      0xb980
+#define BCM56980_A0_REV_ID      1
+#define BCM56980_B0_REV_ID      0x11
+#define BCM56981_DEVICE_ID      0xb981
+#define BCM56981_A0_REV_ID      1
+#define BCM56981_B0_REV_ID      0x11
+#define BCM56982_DEVICE_ID      0xb982
+#define BCM56982_A0_REV_ID      1
+#define BCM56982_B0_REV_ID      0x11
+#define BCM56983_DEVICE_ID      0xb983
+#define BCM56983_A0_REV_ID      1
+#define BCM56983_B0_REV_ID      0x11
+#define BCM56984_DEVICE_ID      0xb984
+#define BCM56984_A0_REV_ID      1
+#define BCM56984_B0_REV_ID      0x11
+
+#define BCM56968_DEVICE_ID      0xb968
+#define BCM56968_A0_REV_ID      1
+#define BCM56968_B0_REV_ID      0x11
+#define BCM56968_B1_REV_ID      0x12
+
+#define BCM56160_DEVICE_ID      0xb160
+#define BCM56160_A0_REV_ID      1
+#define BCM56160_B0_REV_ID      0x11
+#define BCM56162_DEVICE_ID      0xb162
+#define BCM56162_A0_REV_ID      1
+#define BCM56162_B0_REV_ID      0x11
+
+#define BCM56163_DEVICE_ID      0xb163
+#define BCM56163_A0_REV_ID      1
+#define BCM56163_B0_REV_ID      0x11
+#define BCM56164_DEVICE_ID      0xb164
+#define BCM56164_A0_REV_ID      1
+#define BCM56164_B0_REV_ID      0x11
+#define BCM56166_DEVICE_ID      0xb166
+#define BCM56166_A0_REV_ID      1
+#define BCM56166_B0_REV_ID      0x11
+
+#define BCM56273_DEVICE_ID      0xb273
+#define BCM56273_A0_REV_ID      1
+#define BCM56273_A1_REV_ID      2
+
+#define BCM56274_DEVICE_ID      0xb274
+#define BCM56274_A0_REV_ID      1
+#define BCM56274_A1_REV_ID      2
+
+#define BCM56275_DEVICE_ID      0xb275
+#define BCM56275_A0_REV_ID      1
+#define BCM56275_A1_REV_ID      2
+
+#define BCM56276_DEVICE_ID      0xb276
+#define BCM56276_A0_REV_ID      1
+#define BCM56276_A1_REV_ID      2
+
+#define BCM56277_DEVICE_ID      0xb277
+#define BCM56277_A0_REV_ID      1
+#define BCM56277_A1_REV_ID      2
+
+#define BCM56278_DEVICE_ID      0xb278
+#define BCM56278_A0_REV_ID      1
+#define BCM56278_A1_REV_ID      2
+
+#define BCM56279_DEVICE_ID      0xb279
+#define BCM56279_A1_REV_ID      2
+
+#define BCM56575_DEVICE_ID      0xb575
+#define BCM56575_A1_REV_ID      2
+
+#define BCM56175_DEVICE_ID      0xb175
+#define BCM56175_A1_REV_ID      2
+
+#define BCM56176_DEVICE_ID      0xb176
+#define BCM56176_A1_REV_ID      2
+
+#define BCM53440_DEVICE_ID      0x8440
+#define BCM53440_A0_REV_ID      1
+#define BCM53440_B0_REV_ID      0x11
+#define BCM53442_DEVICE_ID      0x8442
+#define BCM53442_A0_REV_ID      1
+#define BCM53442_B0_REV_ID      0x11
+#define BCM53443_DEVICE_ID      0x8443
+#define BCM53443_A0_REV_ID      1
+#define BCM53443_B0_REV_ID      0x11
+
+#define BCM53434_DEVICE_ID      0x8434
+#define BCM53434_A0_REV_ID      1
+#define BCM53434_B0_REV_ID      0x11
+
+#define BCM56560_DEVICE_ID      0xb560
+#define BCM56560_A0_REV_ID      1
+#define BCM56560_B0_REV_ID      0x11
+
+#define BCM56561_DEVICE_ID      0xb561
+#define BCM56561_A0_REV_ID      1
+#define BCM56561_B0_REV_ID      0x11
+
+#define BCM56562_DEVICE_ID      0xb562
+#define BCM56562_A0_REV_ID      1
+#define BCM56562_B0_REV_ID      0x11
+
+#define BCM56670_DEVICE_ID      0xb670
+#define BCM56670_A0_REV_ID      1
+#define BCM56670_B0_REV_ID      0x11
+#define BCM56670_C0_REV_ID      0x21
+
+
+#define BCM56671_DEVICE_ID      0xb671
+#define BCM56671_A0_REV_ID      1
+#define BCM56671_B0_REV_ID      0x11
+#define BCM56671_C0_REV_ID      0x21
+
+#define BCM56672_DEVICE_ID      0xb672
+#define BCM56672_A0_REV_ID      1
+#define BCM56672_B0_REV_ID      0x11
+#define BCM56672_C0_REV_ID      0x21
+
+#define BCM56675_DEVICE_ID      0xb675
+#define BCM56675_A0_REV_ID      1
+#define BCM56675_B0_REV_ID      0x11
+#define BCM56675_C0_REV_ID      0x21
+
+#define BCM53650_DEVICE_ID      0x8650
+#define BCM53650_A0_REV_ID      1
+#define BCM53650_B0_REV_ID      0x11
+#define BCM53650_C0_REV_ID      0x21
+
+#define BCM53651_DEVICE_ID      0x8651
+#define BCM53651_A0_REV_ID      1
+#define BCM53651_B0_REV_ID      0x11
+#define BCM53651_C0_REV_ID      0x21
+
+#define BCM53652_DEVICE_ID      0x8652
+#define BCM53652_A0_REV_ID      1
+#define BCM53652_B0_REV_ID      0x11
+#define BCM53652_C0_REV_ID      0x21
+
+#define BCM53653_DEVICE_ID      0x8653
+#define BCM53653_A0_REV_ID      1
+#define BCM53653_B0_REV_ID      0x11
+#define BCM53653_C0_REV_ID      0x21
+
+#define BCM56565_DEVICE_ID      0xb565
+#define BCM56565_A0_REV_ID      1
+#define BCM56565_B0_REV_ID      0x11
+
+#define BCM56566_DEVICE_ID      0xb566
+#define BCM56566_A0_REV_ID      1
+#define BCM56566_B0_REV_ID      0x11
+
+#define BCM56567_DEVICE_ID      0xb567
+#define BCM56567_A0_REV_ID      1
+#define BCM56567_B0_REV_ID      0x11
+
+#define BCM56568_DEVICE_ID      0xb568
+#define BCM56568_A0_REV_ID      1
+#define BCM56568_B0_REV_ID      0x11
+
+#define BCM56760_DEVICE_ID      0xb760
+#define BCM56760_A0_REV_ID      1
+#define BCM56760_A1_REV_ID      2
+#define BCM56760_B0_REV_ID      0x11
+
+
+#define BCM56761_DEVICE_ID      0xb761
+#define BCM56761_A0_REV_ID      1
+#define BCM56761_A1_REV_ID      2
+#define BCM56761_B0_REV_ID      0x11
+#define BCM56761_B1_REV_ID      0x12
+
+#define BCM56762_DEVICE_ID      0xb762
+#define BCM56762_A0_REV_ID      1
+#define BCM56762_B0_REV_ID      0x11
+
+#define BCM56764_DEVICE_ID      0xb764
+#define BCM56764_A0_REV_ID      1
+#define BCM56764_B0_REV_ID      0x11
+
+#define BCM56765_DEVICE_ID      0xb765
+#define BCM56765_A0_REV_ID      1
+#define BCM56765_B0_REV_ID      0x11
+
+#define BCM56766_DEVICE_ID      0xb766
+#define BCM56766_A0_REV_ID      1
+#define BCM56766_B0_REV_ID      0x11
+
+#define BCM56768_DEVICE_ID      0xb768
+#define BCM56768_A0_REV_ID      1
+#define BCM56768_B0_REV_ID      0x11
+
+#define BCM56068_DEVICE_ID      0xb068
+#define BCM56068_A0_REV_ID      1
+#define BCM56068_B0_REV_ID      0x11
+#define BCM56068_B1_REV_ID      0x12
+
+#define BCM56069_DEVICE_ID      0xb069
+#define BCM56069_A0_REV_ID      1
+#define BCM56069_B0_REV_ID      0x11
+
+#define BCM56170_DEVICE_ID      0xb170
+#define BCM56170_A0_REV_ID      1
+#define BCM56170_B0_REV_ID      0x11
+#define BCM56172_DEVICE_ID      0xb172
+#define BCM56172_A0_REV_ID      1
+#define BCM56172_B0_REV_ID      0x11
+#define BCM56174_DEVICE_ID      0xb174
+#define BCM56174_A0_REV_ID      1
+#define BCM56174_B0_REV_ID      0x11
+
+#define BCM53570_DEVICE_ID      0x8570
+#define BCM53570_A0_REV_ID      1
+#define BCM53570_B0_REV_ID      0x11
+#define BCM53575_DEVICE_ID      0x8575
+#define BCM53575_A0_REV_ID      1
+#define BCM53575_B0_REV_ID      0x11
+
+#define BCM56070_DEVICE_ID      0xb070
+#define BCM56070_A0_REV_ID      1
+#define BCM56071_DEVICE_ID      0xb071
+#define BCM56071_A0_REV_ID      1
+#define BCM56072_DEVICE_ID      0xb072
+#define BCM56072_A0_REV_ID      1
+
+
+#define BCM56965_DEVICE_ID      0xb965
+#define BCM56965_A0_REV_ID      1
+#define BCM56965_A1_REV_ID      2
+#define BCM56969_DEVICE_ID      0xb969        
+#define BCM56969_A0_REV_ID      1
+#define BCM56966_DEVICE_ID      0xb966        
+#define BCM56966_A0_REV_ID      1
+#define BCM56967_DEVICE_ID      0xb967        
+#define BCM56967_A0_REV_ID      1
+
+#define BCM56970_DEVICE_ID      0xb970
+#define BCM56970_A0_REV_ID      1
+#define BCM56970_B0_REV_ID      0x11
+#define BCM56971_DEVICE_ID      0xb971
+#define BCM56971_A0_REV_ID      1
+#define BCM56971_B0_REV_ID      0x11
+#define BCM56972_DEVICE_ID      0xb972
+#define BCM56972_A0_REV_ID      1
+#define BCM56972_B0_REV_ID      0x11
+#define BCM56974_DEVICE_ID      0xb974
+#define BCM56974_A0_REV_ID      1
+#define BCM56974_B0_REV_ID      0x11
+#define BCM56975_DEVICE_ID      0xb975
+#define BCM56975_A0_REV_ID      1
+#define BCM56975_B0_REV_ID      0x11
+
+#define BCM56870_DEVICE_ID      0xb870
+#define BCM56870_A0_REV_ID      1
+#define BCM56873_DEVICE_ID      0xb873
+#define BCM56873_A0_REV_ID      1
+
+#define BCM56370_DEVICE_ID      0xb370
+#define BCM56370_A0_REV_ID      1
+#define BCM56370_A1_REV_ID      0x02
+#define BCM56370_A2_REV_ID      0x03
+
+#define BCM56371_DEVICE_ID      0xb371
+#define BCM56371_A0_REV_ID      1
+#define BCM56371_A1_REV_ID      0x02
+#define BCM56371_A2_REV_ID      0x03
+
+#define BCM56372_DEVICE_ID      0xb372
+#define BCM56372_A0_REV_ID      1
+#define BCM56372_A1_REV_ID      0x02
+#define BCM56372_A2_REV_ID      0x03
+
+#define BCM56374_DEVICE_ID      0xb374
+#define BCM56374_A0_REV_ID      1
+#define BCM56374_A1_REV_ID      0x02
+#define BCM56374_A2_REV_ID      0x03
+
+#define BCM56375_DEVICE_ID      0xb375
+#define BCM56375_A0_REV_ID      1
+#define BCM56375_A1_REV_ID      0x02
+#define BCM56375_A2_REV_ID      0x03
+
+#define BCM56376_DEVICE_ID      0xb376
+#define BCM56376_A0_REV_ID      1
+#define BCM56376_A1_REV_ID      0x02
+#define BCM56376_A2_REV_ID      0x03
+
+#define BCM56377_DEVICE_ID      0xb377
+#define BCM56377_A0_REV_ID      1
+#define BCM56377_A1_REV_ID      0x02
+#define BCM56377_A2_REV_ID      0x03
+
+#define BCM56577_DEVICE_ID      0xb577
+#define BCM56577_A0_REV_ID      1
+#define BCM56577_A1_REV_ID      0x02
+#define BCM56577_A2_REV_ID      0x03
+
+#define BCM56578_DEVICE_ID      0xb578
+#define BCM56578_A0_REV_ID      1
+#define BCM56578_A1_REV_ID      0x02
+#define BCM56578_A2_REV_ID      0x03
+
+#define BCM56579_DEVICE_ID      0xb579
+#define BCM56579_A0_REV_ID      1
+#define BCM56579_A1_REV_ID      0x02
+#define BCM56579_A2_REV_ID      0x03
+
+#define BCM56770_DEVICE_ID      0xb770
+#define BCM56770_A0_REV_ID      1
+
+#define BCM56771_DEVICE_ID      0xb771
+#define BCM56771_A0_REV_ID      1
+
+#define BCM56470_DEVICE_ID      0xb470
+#define BCM56470_A0_REV_ID      1
+#define BCM56471_DEVICE_ID      0xb471
+#define BCM56471_A0_REV_ID      1
+#define BCM56472_DEVICE_ID      0xb472
+#define BCM56472_A0_REV_ID      1
+#define BCM56475_DEVICE_ID      0xb475
+#define BCM56475_A0_REV_ID      1
+#define BCM56474_DEVICE_ID      0xb474
+#define BCM56474_A0_REV_ID      1
+
+
+#define BCM53540_DEVICE_ID      0x8540
+#define BCM53540_A0_REV_ID      1
+#define BCM53547_DEVICE_ID      0x8547
+#define BCM53547_A0_REV_ID      1
+#define BCM53548_DEVICE_ID      0x8548
+#define BCM53548_A0_REV_ID      1
+#define BCM53549_DEVICE_ID      0x8549
+#define BCM53549_A0_REV_ID      1
+
+#define BCM53642_DEVICE_ID      0x8642
+#define BCM53642_A0_REV_ID      1
+
+#define BCM5665_DEVICE_ID       0x5665
+#define BCM5665_A0_REV_ID       1
+#define BCM5665_B0_REV_ID       0x11
+
+
+#define BCM5655_DEVICE_ID       0x5655
+#define BCM5655_A0_REV_ID       1
+#define BCM5655_B0_REV_ID       0x11
+
+
+#define BCM5650_DEVICE_ID       0x5650
+#define BCM5650_A0_REV_ID       1
+#define BCM5650_B0_REV_ID       0x11
+#define BCM5650_C0_REV_ID       0x21
+
+#define BROADCOM_PHYID_HIGH 0x0040
+
+#define ARAD_DEVICE_ID          0x8650
+#define ARAD_A0_REV_ID          0x0000
+#define ARAD_B0_REV_ID          0x0011
+#define ARAD_B1_REV_ID          0x0012
+#define BCM88770_DEVICE_ID      0x8770
+#define BCM88770_A1_REV_ID      0x0002
+#define BCM88773_DEVICE_ID      0x8773
+#define BCM88773_A1_REV_ID      0x0002
+#define BCM88774_DEVICE_ID      0x8774
+#define BCM88774_A1_REV_ID      0x0002
+#define BCM88775_DEVICE_ID      0x8775
+#define BCM88775_A1_REV_ID      0x0002
+#define BCM88776_DEVICE_ID      0x8776
+#define BCM88776_A1_REV_ID      0x0002
+#define BCM88777_DEVICE_ID      0x8777
+#define BCM88777_A1_REV_ID      0x0002
+#define BCM88950_DEVICE_ID      0x8950
+#define BCM88950_A0_REV_ID      0x0001
+#define BCM88950_A1_REV_ID      0x0002
+#define BCM88953_DEVICE_ID      0x8953
+#define BCM88953_A1_REV_ID      0x0002
+#define BCM88954_DEVICE_ID      0x8954
+#define BCM88954_A1_REV_ID      0x0002
+#define BCM88955_DEVICE_ID      0x8955
+#define BCM88955_A1_REV_ID      0x0002
+#define BCM88956_DEVICE_ID      0x8956
+#define BCM88956_A1_REV_ID      0x0002
+#define DNXC_A0_REV_ID          0x0001
+#define DNXC_A1_REV_ID          0x0002
+#define DNXC_A2_REV_ID          0x0003
+#define DNXC_B0_REV_ID          0x0011
+#define DNXC_B1_REV_ID          0x0012
+#define DNXC_DEVID_FAMILY_MASK  0xfff0
+#define BCM88790_DEVICE_ID      0x8790
+#define BCM88790_A0_REV_ID      DNXC_A0_REV_ID
+#define BCM88790_B0_REV_ID      DNXC_B0_REV_ID
+#define BCM88791_DEVICE_ID      0x8791
+#define BCM88792_DEVICE_ID      0x8792
+#define BCM88793_DEVICE_ID      0x8793
+#define BCM88794_DEVICE_ID      0x8794
+#define BCM88795_DEVICE_ID      0x8795
+#define BCM88796_DEVICE_ID      0x8796
+#define BCM88797_DEVICE_ID      0x8797
+#define BCM88798_DEVICE_ID      0x8798
+#define BCM88799_DEVICE_ID      0x8799
+#define BCM8879A_DEVICE_ID      0x879A
+#define BCM8879B_DEVICE_ID      0x879B
+#define BCM8879C_DEVICE_ID      0x879C
+#define BCM8879D_DEVICE_ID      0x879D
+#define BCM8879E_DEVICE_ID      0x879E
+#define BCM8879F_DEVICE_ID      0x879F
+#ifdef BCM_DNXF3_SUPPORT
+#define RAMON2_DEVICE_ID      0x8910
+#define BCM8891F_DEVICE_ID      0x891F
+#define RAMON3_DEVICE_ID      0x8920
+#endif
+#define ARADPLUS_DEVICE_ID      0x8660
+#define ARADPLUS_A0_REV_ID      0x0001
+#define BCM88660_DEVICE_ID      ARADPLUS_DEVICE_ID
+#define BCM88660_A0_REV_ID      ARADPLUS_A0_REV_ID
+#define JERICHO_DEVICE_ID       0x8675
+#define JERICHO_A0_REV_ID       0x0001
+#define JERICHO_B0_REV_ID       0x0011
+#define JERICHO_A1_REV_ID       0x0002
+#define BCM88670_DEVICE_ID      0x8670
+#define BCM88670_A0_REV_ID      JERICHO_A0_REV_ID
+#define BCM88670_A1_REV_ID      JERICHO_A1_REV_ID
+#define BCM88671_DEVICE_ID      0x8671
+#define BCM88671_A0_REV_ID      JERICHO_A0_REV_ID
+#define BCM88671_A1_REV_ID      JERICHO_A1_REV_ID
+#define BCM88671M_DEVICE_ID     0x867A
+#define BCM88671M_A0_REV_ID     JERICHO_A0_REV_ID
+#define BCM88671M_A1_REV_ID     JERICHO_A1_REV_ID
+
+#define BCM88670_B0_REV_ID      JERICHO_B0_REV_ID
+#define BCM88671_B0_REV_ID      JERICHO_B0_REV_ID
+#define BCM88671M_B0_REV_ID     JERICHO_B0_REV_ID
+
+#define BCM88672_DEVICE_ID      0x8672
+#define BCM88672_A0_REV_ID      JERICHO_A0_REV_ID
+#define BCM88672_A1_REV_ID      JERICHO_A1_REV_ID
+
+#define BCM88672_B0_REV_ID      JERICHO_B0_REV_ID
+
+#define BCM88673_DEVICE_ID      0x8673
+#define BCM88673_A0_REV_ID      JERICHO_A0_REV_ID
+#define BCM88673_A1_REV_ID      JERICHO_A1_REV_ID
+#define BCM88674_DEVICE_ID      0x8674
+#define BCM88674_A0_REV_ID      JERICHO_A0_REV_ID
+#define BCM88674_A1_REV_ID      JERICHO_A1_REV_ID
+#define BCM88675_DEVICE_ID      JERICHO_DEVICE_ID
+#define BCM88675_A0_REV_ID      JERICHO_A0_REV_ID
+#define BCM88675_A1_REV_ID      JERICHO_A1_REV_ID
+#define BCM88675M_DEVICE_ID     0x867B
+#define BCM88675M_A0_REV_ID     JERICHO_A0_REV_ID
+#define BCM88675M_A1_REV_ID     JERICHO_A1_REV_ID
+#define BCM88676_DEVICE_ID      0x8676
+#define BCM88676_A0_REV_ID      JERICHO_A0_REV_ID
+#define BCM88676_A1_REV_ID      JERICHO_A1_REV_ID
+#define BCM88676M_DEVICE_ID     0x867C
+#define BCM88676M_A0_REV_ID     JERICHO_A0_REV_ID
+#define BCM88676M_A1_REV_ID     JERICHO_A1_REV_ID
+#define BCM88677_DEVICE_ID      0x8677
+#define BCM88677_A0_REV_ID      JERICHO_A0_REV_ID
+#define BCM88677_A1_REV_ID      JERICHO_A1_REV_ID
+#define BCM88678_DEVICE_ID      0x8678
+#define BCM88678_A0_REV_ID      JERICHO_A0_REV_ID
+#define BCM88678_A1_REV_ID      JERICHO_A1_REV_ID
+#define BCM88679_DEVICE_ID      0x8679
+#define BCM88679_A0_REV_ID      JERICHO_A0_REV_ID
+#define BCM88679_A1_REV_ID      JERICHO_A1_REV_ID
+
+#define BCM88673_B0_REV_ID      JERICHO_B0_REV_ID
+#define BCM88674_B0_REV_ID      JERICHO_B0_REV_ID
+#define BCM88675_B0_REV_ID      JERICHO_B0_REV_ID
+#define BCM88675M_B0_REV_ID     JERICHO_B0_REV_ID
+#define BCM88676_B0_REV_ID      JERICHO_B0_REV_ID
+#define BCM88676M_B0_REV_ID     JERICHO_B0_REV_ID
+#define BCM88677_B0_REV_ID      JERICHO_B0_REV_ID
+#define BCM88678_B0_REV_ID      JERICHO_B0_REV_ID
+#define BCM88679_B0_REV_ID      JERICHO_B0_REV_ID
+#define QMX_DEVICE_ID           0x8375
+#define QMX_A0_REV_ID           0x0001
+#define QMX_B0_REV_ID           0x0011
+#define QMX_A1_REV_ID           0x0002
+#define BCM88370_DEVICE_ID      0x8370
+#define BCM88370_A0_REV_ID      QMX_A0_REV_ID
+#define BCM88370_A1_REV_ID      QMX_A1_REV_ID
+#define BCM88371_DEVICE_ID      0x8371
+#define BCM88371_A0_REV_ID      QMX_A0_REV_ID
+#define BCM88371_A1_REV_ID      QMX_A1_REV_ID
+#define BCM88371M_DEVICE_ID     0x837A
+#define BCM88371M_A0_REV_ID     QMX_A0_REV_ID
+#define BCM88371M_A1_REV_ID     QMX_A1_REV_ID
+#define BCM88375_DEVICE_ID      QMX_DEVICE_ID
+#define BCM88375_A0_REV_ID      QMX_A0_REV_ID
+#define BCM88375_A1_REV_ID      QMX_A1_REV_ID
+#define BCM88376_DEVICE_ID      0x8376
+#define BCM88376_A0_REV_ID      QMX_A0_REV_ID
+#define BCM88376_A1_REV_ID      QMX_A1_REV_ID
+#define BCM88376M_DEVICE_ID     0x837B
+#define BCM88376M_A0_REV_ID     QMX_A0_REV_ID
+#define BCM88376M_A1_REV_ID     QMX_A1_REV_ID
+#define BCM88377_DEVICE_ID      0x8377
+#define BCM88377_A0_REV_ID      QMX_A0_REV_ID
+#define BCM88377_A1_REV_ID      QMX_A1_REV_ID
+#define BCM88378_DEVICE_ID      0x8378
+#define BCM88378_A0_REV_ID      QMX_A0_REV_ID
+#define BCM88378_A1_REV_ID      QMX_A1_REV_ID
+#define BCM88379_DEVICE_ID      0x8379
+#define BCM88379_A0_REV_ID      QMX_A0_REV_ID
+#define BCM88379_A1_REV_ID      QMX_A1_REV_ID
+
+#define BCM88370_B0_REV_ID      QMX_B0_REV_ID
+#define BCM88371_B0_REV_ID      QMX_B0_REV_ID
+#define BCM88371M_B0_REV_ID     QMX_B0_REV_ID
+#define BCM88375_B0_REV_ID      QMX_B0_REV_ID
+#define BCM88376_B0_REV_ID      QMX_B0_REV_ID
+#define BCM88376M_B0_REV_ID     QMX_B0_REV_ID
+#define BCM88377_B0_REV_ID      QMX_B0_REV_ID
+#define BCM88378_B0_REV_ID      QMX_B0_REV_ID
+#define BCM88379_B0_REV_ID      QMX_B0_REV_ID
+
+
+#define JERICHO_PLUS_DEVICE_ID           0x8680
+#define JERICHO_PLUS_A0_REV_ID           0x0001
+#define BCM88680_DEVICE_ID      JERICHO_PLUS_DEVICE_ID
+#define BCM88680_A0_REV_ID      JERICHO_PLUS_A0_REV_ID
+#define BCM88680_A1_REV_ID               0x0002
+
+
+#define BCM88681_DEVICE_ID               0x8681
+#define BCM88681_A0_REV_ID      JERICHO_PLUS_A0_REV_ID
+
+#define BCM88682_DEVICE_ID               0x8682
+#define BCM88682_A0_REV_ID      JERICHO_PLUS_A0_REV_ID
+
+#define BCM88683_DEVICE_ID               0x8683
+#define BCM88683_A0_REV_ID      JERICHO_PLUS_A0_REV_ID
+
+#define BCM88684_DEVICE_ID               0x8684
+#define BCM88684_A0_REV_ID      JERICHO_PLUS_A0_REV_ID
+
+#define BCM88685_DEVICE_ID               0x8685
+#define BCM88685_A0_REV_ID      JERICHO_PLUS_A0_REV_ID
+
+#define BCM88687_DEVICE_ID               0x8687
+#define BCM88687_A0_REV_ID      JERICHO_PLUS_A0_REV_ID
+
+#define BCM88380_DEVICE_ID      0x8380
+#define BCM88380_A0_REV_ID      JERICHO_PLUS_A0_REV_ID
+#define BCM88381_DEVICE_ID      0x8381
+#define BCM88381_A0_REV_ID      JERICHO_PLUS_A0_REV_ID
+
+#define JERICHO2_DEVICE_ID           0x8690
+#define JERICHO2_A0_REV_ID     DNXC_A0_REV_ID
+#define JERICHO2_B0_REV_ID     DNXC_B0_REV_ID
+#define JERICHO2_B1_REV_ID     DNXC_B1_REV_ID
+#define BCM88690_DEVICE_ID      JERICHO2_DEVICE_ID
+#define BCM88690_A0_REV_ID      JERICHO2_A0_REV_ID
+#define BCM88690_B0_REV_ID      JERICHO2_B0_REV_ID
+#define BCM88690_B1_REV_ID      JERICHO2_B1_REV_ID
+#define BCM88691_DEVICE_ID      0x8691
+#define BCM88692_DEVICE_ID      0x8692
+#define BCM88693_DEVICE_ID      0x8693
+#define BCM88694_DEVICE_ID      0x8694
+#define BCM88695_DEVICE_ID      0x8695
+#define BCM88696_DEVICE_ID      0x8696
+#define BCM88697_DEVICE_ID      0x8697
+#define BCM88698_DEVICE_ID      0x8698
+#define BCM88699_DEVICE_ID      0x8699
+#define BCM8869A_DEVICE_ID      0x869A
+#define BCM8869B_DEVICE_ID      0x869B
+#define BCM8869C_DEVICE_ID      0x869C
+#define BCM8869D_DEVICE_ID      0x869D
+#define BCM8869E_DEVICE_ID      0x869E
+#define BCM8869F_DEVICE_ID      0x869F
+
+#define J2C_DEVICE_ID           0x8800
+#define J2C_2ND_DEVICE_ID       0x8820
+#define J2C_DEVID_FAMILY_MASK   0xffd0
+#define J2C_A0_REV_ID           DNXC_A0_REV_ID
+#define J2C_A1_REV_ID           DNXC_A1_REV_ID
+#define BCM88800_DEVICE_ID      J2C_DEVICE_ID
+#define BCM88820_DEVICE_ID      J2C_2ND_DEVICE_ID
+#define BCM88800_A0_REV_ID      J2C_A0_REV_ID
+#define BCM88800_A1_REV_ID      J2C_A1_REV_ID
+#define BCM88801_DEVICE_ID      0x8801
+#define BCM88802_DEVICE_ID      0x8802
+#define BCM88803_DEVICE_ID      0x8803
+#define BCM88804_DEVICE_ID      0x8804
+#define BCM88805_DEVICE_ID      0x8805
+#define BCM88806_DEVICE_ID      0x8806
+#define BCM88807_DEVICE_ID      0x8807
+#define BCM88808_DEVICE_ID      0x8808
+#define BCM88809_DEVICE_ID      0x8809
+#define BCM8880A_DEVICE_ID      0x880A
+#define BCM8880B_DEVICE_ID      0x880B
+#define BCM8880C_DEVICE_ID      0x880C
+#define BCM8880D_DEVICE_ID      0x880D
+#define BCM8880E_DEVICE_ID      0x880E
+#define BCM8880F_DEVICE_ID      0x880F
+#define BCM88821_DEVICE_ID      0x8821
+#define BCM88822_DEVICE_ID      0x8822
+#define BCM88823_DEVICE_ID      0x8823
+#define BCM88824_DEVICE_ID      0x8824
+#define BCM88825_DEVICE_ID      0x8825
+#define BCM88826_DEVICE_ID      0x8826
+#define BCM88827_DEVICE_ID      0x8827
+#define BCM88828_DEVICE_ID      0x8828
+#define BCM88829_DEVICE_ID      0x8829
+#define BCM8882A_DEVICE_ID      0x882A
+#define BCM8882B_DEVICE_ID      0x882B
+#define BCM8882C_DEVICE_ID      0x882C
+#define BCM8882D_DEVICE_ID      0x882D
+#define BCM8882E_DEVICE_ID      0x882E
+#define BCM8882F_DEVICE_ID      0x882F
+
+#define J2P_DEVICE_ID                 0x8850
+#define J2P_A0_REV_ID           DNXC_A0_REV_ID
+#define J2P_A1_REV_ID           DNXC_A1_REV_ID
+#define J2P_A2_REV_ID           DNXC_A2_REV_ID
+#define BCM88850_DEVICE_ID      J2P_DEVICE_ID
+#define BCM88850_A0_REV_ID      J2P_A0_REV_ID
+#define BCM88850_A1_REV_ID      J2P_A1_REV_ID
+#define BCM88850_A2_REV_ID      J2P_A2_REV_ID
+#define BCM88851_DEVICE_ID      0x8851
+#define BCM88852_DEVICE_ID      0x8852
+#define BCM88853_DEVICE_ID      0x8853
+#define BCM88854_DEVICE_ID      0x8854
+#define BCM88855_DEVICE_ID      0x8855
+#define BCM88856_DEVICE_ID      0x8856
+#define BCM88857_DEVICE_ID      0x8857
+#define BCM88858_DEVICE_ID      0x8858
+#define BCM88859_DEVICE_ID      0x8859
+#define BCM8885A_DEVICE_ID      0x885A
+#define BCM8885B_DEVICE_ID      0x885B
+#define BCM8885C_DEVICE_ID      0x885C
+#define BCM8885D_DEVICE_ID      0x885D
+#define BCM8885E_DEVICE_ID      0x885E
+#define BCM8885F_DEVICE_ID      0x885F
+
+#define BCM88840_DEVICE_ID      0x8840
+#define BCM88841_DEVICE_ID      0x8841
+#define BCM88842_DEVICE_ID      0x8842
+#define BCM88843_DEVICE_ID      0x8843
+#define BCM88844_DEVICE_ID      0x8844
+#define BCM88845_DEVICE_ID      0x8845
+#define BCM88846_DEVICE_ID      0x8846
+#define BCM88847_DEVICE_ID      0x8847
+#define BCM88848_DEVICE_ID      0x8848
+#define BCM88849_DEVICE_ID      0x8849
+#define BCM8884A_DEVICE_ID      0x884A
+#define BCM8884B_DEVICE_ID      0x884B
+#define BCM8884C_DEVICE_ID      0x884C
+#define BCM8884D_DEVICE_ID      0x884D
+#define BCM8884E_DEVICE_ID      0x884E
+#define BCM8884F_DEVICE_ID      0x884F
+
+#define J2X_DEVICE_ID                 0x8830
+#define J2X_A0_REV_ID           DNXC_A0_REV_ID
+#define BCM88830_DEVICE_ID      J2X_DEVICE_ID
+#define BCM88830_A0_REV_ID      J2X_A0_REV_ID
+#define BCM88831_DEVICE_ID      0x8831
+#define BCM88832_DEVICE_ID      0x8832
+#define BCM88833_DEVICE_ID      0x8833
+#define BCM88834_DEVICE_ID      0x8834
+#define BCM88835_DEVICE_ID      0x8835
+#define BCM88836_DEVICE_ID      0x8836
+#define BCM88837_DEVICE_ID      0x8837
+#define BCM88838_DEVICE_ID      0x8838
+#define BCM88839_DEVICE_ID      0x8839
+#define BCM8883A_DEVICE_ID      0x883A
+#define BCM8883B_DEVICE_ID      0x883B
+#define BCM8883C_DEVICE_ID      0x883C
+#define BCM8883D_DEVICE_ID      0x883D
+#define BCM8883E_DEVICE_ID      0x883E
+#define BCM8883F_DEVICE_ID      0x883F
+
+#ifdef BCM_DNX3_SUPPORT
+#define JERICHO3_DEVICE_ID      0x8860
+#define Q3_DEVICE_ID_START      0x886a
+#define Q3_DEVICE_ID_END        0x886f
+#define J3AI_DEVICE_ID           0x8890
+#define Q3D_DEVICE_ID           0x8870
+#endif
+#define Q2A_DEVICE_ID           0x8480
+#define Q2A_A0_REV_ID           DNXC_A0_REV_ID
+#define Q2A_B0_REV_ID           DNXC_B0_REV_ID
+#define Q2A_B1_REV_ID           DNXC_B1_REV_ID
+#define BCM88480_DEVICE_ID      Q2A_DEVICE_ID
+#define BCM88480_A0_REV_ID      Q2A_A0_REV_ID
+#define BCM88480_B0_REV_ID      Q2A_B0_REV_ID
+#define BCM88480_B1_REV_ID      Q2A_B1_REV_ID
+#define BCM88481_DEVICE_ID      0x8481
+#define BCM88482_DEVICE_ID      0x8482
+#define BCM88483_DEVICE_ID      0x8483
+#define BCM88484_DEVICE_ID      0x8484
+#define BCM88485_DEVICE_ID      0x8485
+#define BCM88486_DEVICE_ID      0x8486
+#define BCM88487_DEVICE_ID      0x8487
+#define BCM88488_DEVICE_ID      0x8488
+#define BCM88489_DEVICE_ID      0x8489
+#define BCM8848A_DEVICE_ID      0x848A
+#define BCM8848B_DEVICE_ID      0x848B
+#define BCM8848C_DEVICE_ID      0x848C
+#define BCM8848D_DEVICE_ID      0x848D
+#define BCM8848E_DEVICE_ID      0x848E
+#define BCM8848F_DEVICE_ID      0x848F
+
+#define Q2U_DEVICE_ID           0x8280
+#define BCM88280_DEVICE_ID      Q2U_DEVICE_ID
+#define BCM88281_DEVICE_ID      0x8281
+#define BCM88282_DEVICE_ID      0x8282
+#define BCM88283_DEVICE_ID      0x8283
+#define BCM88284_DEVICE_ID      0x8284
+#define BCM88285_DEVICE_ID      0x8285
+#define BCM88286_DEVICE_ID      0x8286
+#define BCM88287_DEVICE_ID      0x8287
+#define BCM88288_DEVICE_ID      0x8288
+#define BCM88289_DEVICE_ID      0x8289
+#define BCM8828A_DEVICE_ID      0x828A
+#define BCM8828B_DEVICE_ID      0x828B
+#define BCM8828C_DEVICE_ID      0x828C
+#define BCM8828D_DEVICE_ID      0x828D
+#define BCM8828E_DEVICE_ID      0x828E
+#define BCM8828F_DEVICE_ID      0x828F
+
+#define Q2N_DEVICE_ID           0x8290
+#define BCM88290_DEVICE_ID      Q2N_DEVICE_ID
+#define BCM88291_DEVICE_ID      0x8291
+#define BCM88292_DEVICE_ID      0x8292
+#define BCM88293_DEVICE_ID      0x8293
+#define BCM88294_DEVICE_ID      0x8294
+#define BCM88295_DEVICE_ID      0x8295
+#define BCM88296_DEVICE_ID      0x8296
+#define BCM88297_DEVICE_ID      0x8297
+#define BCM88298_DEVICE_ID      0x8298
+#define BCM88299_DEVICE_ID      0x8299
+#define BCM8829A_DEVICE_ID      0x829A
+#define BCM8829B_DEVICE_ID      0x829B
+#define BCM8829C_DEVICE_ID      0x829C
+#define BCM8829D_DEVICE_ID      0x829D
+#define BCM8829E_DEVICE_ID      0x829E
+#define BCM8829F_DEVICE_ID      0x829F
+
+#define QAX_DEVICE_ID           0x8470
+#define QAX_A0_REV_ID           0x0001
+#define QAX_B0_REV_ID           0x0011
+#define BCM88470_DEVICE_ID      QAX_DEVICE_ID
+#define BCM88470_B0_REV_ID      QAX_B0_REV_ID
+#define BCM88470P_DEVICE_ID     0x847C
+#define BCM88471_DEVICE_ID      0x8471
+#define BCM88473_DEVICE_ID      0x8473
+#define BCM88474_DEVICE_ID      0x8474
+#define BCM88474H_DEVICE_ID     0x847B
+#define BCM88476_DEVICE_ID      0x8476
+#define BCM88477_DEVICE_ID      0x8477
+
+#define BCM88479_DEVICE_ID      0x8479
+
+
+
+#define BCM88470_A0_REV_ID      QAX_A0_REV_ID
+
+#define QUX_DEVICE_ID           0x8270
+#define QUX_A0_REV_ID           0x0001
+#define QUX_A1_REV_ID           0x0002
+#define QUX_B0_REV_ID           0x0011
+#define BCM88270_DEVICE_ID      QUX_DEVICE_ID
+#define BCM88270_A0_REV_ID      QUX_A0_REV_ID
+#define BCM88270_A1_REV_ID      QUX_A1_REV_ID
+#define BCM88271_DEVICE_ID      0x8271
+#define BCM88272_DEVICE_ID      0x8272
+#define BCM88273_DEVICE_ID      0x8273
+#define BCM88274_DEVICE_ID      0x8274
+#define BCM88276_DEVICE_ID      0x8276
+#define BCM88278_DEVICE_ID      0x8278
+#define BCM88279_DEVICE_ID      0x8279
+
+#define BCM88360_DEVICE_ID      0x8360
+#define BCM88360_A0_REV_ID      ARADPLUS_A0_REV_ID
+#define BCM88361_DEVICE_ID      0x8361
+#define BCM88361_A0_REV_ID      ARADPLUS_A0_REV_ID
+#define BCM88363_DEVICE_ID      0x8363
+#define BCM88363_A0_REV_ID      ARADPLUS_A0_REV_ID
+#define BCM88460_DEVICE_ID      0x8460
+#define BCM88460_A0_REV_ID      ARADPLUS_A0_REV_ID
+#define BCM88461_DEVICE_ID      0x8461
+#define BCM88461_A0_REV_ID      ARADPLUS_A0_REV_ID
+#define BCM88560_DEVICE_ID      0x8560
+#define BCM88560_A0_REV_ID      ARADPLUS_A0_REV_ID
+#define BCM88561_DEVICE_ID      0x8561
+#define BCM88561_A0_REV_ID      ARADPLUS_A0_REV_ID
+#define BCM88562_DEVICE_ID      0x8562
+#define BCM88562_A0_REV_ID      ARADPLUS_A0_REV_ID
+#define BCM88661_DEVICE_ID      0x8661
+#define BCM88661_A0_REV_ID      ARADPLUS_A0_REV_ID
+#define BCM88664_DEVICE_ID      0x8664
+#define BCM88664_A0_REV_ID      ARADPLUS_A0_REV_ID
+
+
+#define BCM88350_DEVICE_ID      0x8350
+#define BCM88350_B1_REV_ID      ARAD_B1_REV_ID
+#define BCM88351_DEVICE_ID      0x8351
+#define BCM88351_B1_REV_ID      ARAD_B1_REV_ID
+#define BCM88450_DEVICE_ID      0x8450
+#define BCM88450_B1_REV_ID      ARAD_B1_REV_ID
+#define BCM88451_DEVICE_ID      0x8451
+#define BCM88451_B1_REV_ID      ARAD_B1_REV_ID
+#define BCM88550_DEVICE_ID      0x8550
+#define BCM88550_B1_REV_ID      ARAD_B0_REV_ID
+#define BCM88551_DEVICE_ID      0x8551
+#define BCM88551_B1_REV_ID      ARAD_B1_REV_ID
+#define BCM88552_DEVICE_ID      0x8552
+#define BCM88552_B1_REV_ID      ARAD_B1_REV_ID
+
+#define BCM88772_DEVICE_ID		0x8772
+#define BCM88952_DEVICE_ID		0x8952
+#define BCM88772_A1_REV_ID		0x0002
+#define BCM88952_A0_REV_ID		0x0001
+#define BCM88952_A1_REV_ID		0x0002
+
+#define PLX9056_DEVICE_ID       0x9056 
+
+#define BCM56890_DEVICE_ID 0xb890
+#define BCM56890_A0_REV_ID 0x0001
+#define BCM56891_DEVICE_ID 0xb891
+#define BCM56891_A0_REV_ID 0x0001
+#define BCM56892_DEVICE_ID 0xb892
+#define BCM56892_A0_REV_ID 0x0001
+#define BCM56895_DEVICE_ID 0xb895
+#define BCM56895_A0_REV_ID 0x0001
+#define BCM56896_DEVICE_ID 0xb896
+#define BCM56896_A0_REV_ID 0x0001
+
+#define BCM56690_DEVICE_ID 0xb690
+#define BCM56690_A0_REV_ID 0x0001
+#define BCM56692_DEVICE_ID 0xb692
+#define BCM56692_A0_REV_ID 0x0001
+
+#define BCM56880_DEVICE_ID 0xb880
+#define BCM56880_A0_REV_ID 0x0001
+#define BCM56880_B0_REV_ID 0x0011
+#define BCM56881_DEVICE_ID 0xb881
+#define BCM56881_A0_REV_ID 0x0001
+#define BCM56881_B0_REV_ID 0x0011
+#define BCM56883_DEVICE_ID 0xb883
+#define BCM56883_A0_REV_ID 0x0001
+#define BCM56883_B0_REV_ID 0x0011
+
+#define BCM56780_DEVICE_ID 0xb780
+#define BCM56780_A0_REV_ID 0x0001
+#define BCM56782_DEVICE_ID 0xb782
+#define BCM56782_A0_REV_ID 0x0001
+#define BCM56782_A1_REV_ID 0x0002
+#define BCM56784_DEVICE_ID 0xb784
+#define BCM56784_A0_REV_ID 0x0001
+#define BCM56785_DEVICE_ID 0xb785
+#define BCM56785_A0_REV_ID 0x0001
+#define BCM56786_DEVICE_ID 0xb786
+#define BCM56786_A0_REV_ID 0x0001
+#define BCM56786_A1_REV_ID 0x0002
+#define BCM56787_DEVICE_ID 0xb787
+#define BCM56787_A0_REV_ID 0x0001
+#define BCM56787_A1_REV_ID 0x0002
+#define BCM56788_DEVICE_ID 0xb788
+#define BCM56788_A0_REV_ID 0x0001
+#define BCM56788_A1_REV_ID 0x0002
+#define BCM56789_DEVICE_ID 0xb789
+#define BCM56789_A0_REV_ID 0x0001
+
+#define BCM56990_DEVICE_ID 0xb990
+#define BCM56990_A0_REV_ID 0x0001
+
+#ifndef BCM56990_DEVICE_ID
+#define BCM56990_DEVICE_ID 0xb990
+#define BCM56990_A0_REV_ID 0x0001
+#endif
+#define BCM56990_B0_REV_ID 0x0011
+#define BCM56991_DEVICE_ID 0xb991
+#define BCM56991_B0_REV_ID 0x0011
+#define BCM56992_DEVICE_ID 0xb992
+#define BCM56992_B0_REV_ID 0x0011
+#define BCM56993_DEVICE_ID 0xb993
+#define BCM56993_B0_REV_ID 0x0011
+
+#define BCM56996_DEVICE_ID 0xb996
+#define BCM56996_A0_REV_ID 0x0001
+#define BCM56997_DEVICE_ID 0xb997
+#define BCM56997_A0_REV_ID 0x0001
+
+#ifndef BCM56996_DEVICE_ID
+#define BCM56996_DEVICE_ID 0xb996
+#define BCM56996_A0_REV_ID 0x0001
+#define BCM56997_DEVICE_ID 0xb997
+#endif
+#define BCM56996_B0_REV_ID 0x0011
+#define BCM56997_B0_REV_ID 0x0011
+
+#define BCM56998_DEVICE_ID 0xb998
+#define BCM56998_A0_REV_ID 0x0001
+
+#define BCM56999_DEVICE_ID 0xb999
+#define BCM56999_A0_REV_ID 0x0001
+#define BCM56999_B0_REV_ID 0x0011
+#define BCM56995_DEVICE_ID 0xb995
+#define BCM56995_A0_REV_ID 0x0001
+#define BCM56995_B0_REV_ID 0x0011
+
+#define BCM78900_DEVICE_ID 0xf900
+#define BCM78900_B0_REV_ID 0x0011
+
+#define BCM78902_DEVICE_ID 0xf902
+#define BCM78902_B0_REV_ID 0x0011
+
+#define BCM78903_DEVICE_ID 0xf903
+#define BCM78903_B0_REV_ID 0x0011
+
+#define BCM78905_DEVICE_ID 0xf905
+#define BCM78905_A0_REV_ID 0x0001
+
+#define BCM56080_DEVICE_ID 0xb080
+#define BCM56080_A0_REV_ID 0x0001
+#define BCM56080_A1_REV_ID 0x0002
+#define BCM56081_DEVICE_ID 0xb081
+#define BCM56081_A0_REV_ID 0x0001
+#define BCM56081_A1_REV_ID 0x0002
+#define BCM56082_DEVICE_ID 0xb082
+#define BCM56082_A0_REV_ID 0x0001
+#define BCM56082_A1_REV_ID 0x0002
+#define BCM56083_DEVICE_ID 0xb083
+#define BCM56083_A0_REV_ID 0x0001
+#define BCM56083_A1_REV_ID 0x0002
+#define BCM56084_DEVICE_ID 0xb084
+#define BCM56084_A0_REV_ID 0x0001
+#define BCM56084_A1_REV_ID 0x0002
+#define BCM56085_DEVICE_ID 0xb085
+#define BCM56085_A0_REV_ID 0x0001
+#define BCM56085_A1_REV_ID 0x0002
+
+#endif  
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/drv.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/drv.h
new file mode 100644
index 000000000..e204a84b2
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/drv.h
@@ -0,0 +1,39 @@
+/* 
+ * $Id:$
+ * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * 
+ * Permission is granted to use, copy, modify and/or distribute this
+ * software under either one of the licenses below.
+ * 
+ * License Option 1: GPL
+ * 
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License, version 2, as
+ * published by the Free Software Foundation (the "GPL").
+ * 
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License version 2 (GPLv2) for more details.
+ * 
+ * You should have received a copy of the GNU General Public License
+ * version 2 (GPLv2) along with this source code.
+ * 
+ * 
+ * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
+ * 
+ * This software is governed by the Broadcom Open Network Switch APIs license:
+ * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+ * 
+ *
+ * File:        drv.h
+ * Purpose:     Driver definitions
+ */
+
+#ifndef   _SOC_DRV_H_
+#define   _SOC_DRV_H_
+
+/* DCB Library */
+#include <appl/dcb/dcb_int.h>
+
+#endif /* _SOC_DRV_H_ */
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/enet.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/enet.h
new file mode 100644
index 000000000..31ae2947b
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/enet.h
@@ -0,0 +1,30 @@
+/*
+ * $Id:$
+ * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * 
+ * Permission is granted to use, copy, modify and/or distribute this
+ * software under either one of the licenses below.
+ * 
+ * License Option 1: GPL
+ * 
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License, version 2, as
+ * published by the Free Software Foundation (the "GPL").
+ * 
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License version 2 (GPLv2) for more details.
+ * 
+ * You should have received a copy of the GNU General Public License
+ * version 2 (GPLv2) along with this source code.
+ * 
+ * 
+ * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
+ * 
+ * This software is governed by the Broadcom Open Network Switch APIs license:
+ * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+ * 
+ *
+ * Stub header file
+ */
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/higig.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/higig.h
new file mode 100644
index 000000000..6658c81ef
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/higig.h
@@ -0,0 +1,1021 @@
+/*
+ * $Id: higig.h,v 1.29 Broadcom SDK $
+ * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * 
+ * Permission is granted to use, copy, modify and/or distribute this
+ * software under either one of the licenses below.
+ * 
+ * License Option 1: GPL
+ * 
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License, version 2, as
+ * published by the Free Software Foundation (the "GPL").
+ * 
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License version 2 (GPLv2) for more details.
+ * 
+ * You should have received a copy of the GNU General Public License
+ * version 2 (GPLv2) along with this source code.
+ * 
+ * 
+ * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
+ * 
+ * This software is governed by the Broadcom Open Network Switch APIs license:
+ * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+ * 
+ *
+ * File:        higig.h
+ */
+
+#include <soc/defs.h>
+#include <soc/enet.h>
+
+#ifndef _SOC_HIGIG_H
+#define _SOC_HIGIG_H
+
+#if defined(BCM_XGS_SUPPORT) || defined(BCM_PETRA_SUPPORT) || defined(BCM_DNX_SUPPORT)
+
+/****************************************************************************
+ * Higig Header Format
+ *
+ * On BCM5670/BCM5675 (Hercules/Hercules1.5), to send or receive packets
+ * on an HG port, the following HIGIG header is always prepended to
+ * an UNTAGGED ethernet frame.
+ *
+ * ANSI only permits signed or unsigned int for bit field type.  This
+ * structure will only work for compilers for which uint32 is unsigned
+ * int, and which completely pack bit fields beginning at the MSbit for
+ * big-endian machines and at the LSbit for little-endian machines.
+ *
+ * NOTE: these structures already put the the individual bytes in memory
+ * in big endian order for both big- and little-endian machines, so no
+ * further swapping is required.
+ ***************************************************************************/
+
+typedef union soc_higig_hdr_u {
+    struct {
+        uint8   bytes[12];
+    } overlay0;
+
+#if defined(LE_HOST)
+
+    struct {                            /* Byte # */
+        uint32  start:8;                /* 0 */
+        uint32  hgi:8;                  /* 1 */
+        uint32  vlan_id_hi:4;           /* 2 */
+        uint32  vlan_cfi:1;
+        uint32  vlan_pri:3;
+        uint32  vlan_id_lo:8;           /* 3 */
+        uint32  opcode:3;               /* 4 */
+        uint32  src_mod:5;
+        uint32  src_port:6;             /* 5 */
+        uint32  pfm:2;
+        uint32  cos:3;                  /* 6 */
+        uint32  dst_port:5;
+        uint32  dst_mod:5;              /* 7 */
+        uint32  cng:1;
+        uint32  hdr_format:2;
+        uint32  mirror:1;               /* 8 */
+        uint32  mirror_done:1;
+        uint32  mirror_only:1;
+        uint32  ingress_tagged:1;
+        uint32  dst_tgid:3;
+        uint32  dst_t:1;
+        uint32  _rsvd1:8;               /* 9 */
+        uint32  _rsvd2:8;               /* 10 */
+        uint32  _rsvd3:8;               /* 11 */
+    } overlay1;
+
+    struct {                            /* Byte # */
+        uint32  _rsvd1:8;               /* 0 */
+        uint32  _rsvd2:8;               /* 1 */
+        uint32  _rsvd3:8;               /* 2 */
+        uint32  _rsvd4:8;               /* 3 */
+        uint32  _rsvd5:8;               /* 4 */
+        uint32  tgid:6;                 /* 5 */
+        uint32  _rsvd6:2;
+        uint32  _rsvd7:3;               /* 6 */
+        uint32  l2mc_ptr_lo:5;
+        uint32  l2mc_ptr_hi:5;          /* 7 */
+        uint32  _rsvd8:3;
+        uint32  ctag_hi:8;              /* 8 */
+        uint32  ctag_lo:8;              /* 9 */
+        uint32  _rsvd9:8;               /* 10 */
+        uint32  _rsvd10:8;              /* 11 */
+    } overlay2;
+
+    struct {                            /* Byte # */
+        uint32  start:8;                /* 0 */
+        uint32  dst_mod_6:1;            /* 1 */
+        uint32  src_mod_6:1;
+        uint32  hdr_ext_len:3;
+        uint32  cng_hi:1;
+        uint32  hgi:2;
+        uint32  vlan_id_hi:4;           /* 2 */
+        uint32  vlan_cfi:1;
+        uint32  vlan_pri:3;
+        uint32  vlan_id_lo:8;           /* 3 */
+        uint32  opcode:3;               /* 4 */
+        uint32  src_mod:5;
+        uint32  src_port:6;             /* 5 */
+        uint32  pfm:2;
+        uint32  cos:3;                  /* 6 */
+        uint32  dst_port:5;
+        uint32  dst_mod:5;              /* 7 */
+        uint32  cng:1;
+        uint32  hdr_format:2;
+        uint32  mirror:1;               /* 8 */
+        uint32  mirror_done:1;
+        uint32  mirror_only:1;
+        uint32  ingress_tagged:1;
+        uint32  dst_tgid:3;
+        uint32  dst_t:1;
+        uint32  vc_label_19_16:4;       /* 9 */
+        uint32  label_present:1;
+        uint32  l3:1;
+        uint32  dst_mod_5:1;
+        uint32  src_mod_5:1;
+        uint32  vc_label_15_8:8;        /* 10 */
+        uint32  vc_label_7_0:8;         /* 11 */
+    } hgp_overlay1;
+
+    struct {                            /* Byte # */
+        uint32  start:8;                /* 0 */
+        uint32  dst_mod_6:1;            /* 1 */
+        uint32  src_mod_6:1;
+        uint32  hdr_ext_len:3;
+        uint32  cng_hi:1;
+        uint32  hgi:2;
+        uint32  vlan_id_hi:4;           /* 2 */
+        uint32  vlan_cfi:1;
+        uint32  vlan_pri:3;
+        uint32  vlan_id_lo:8;           /* 3 */
+        uint32  opcode:3;               /* 4 */
+        uint32  src_mod:5;
+        uint32  src_port:6;             /* 5 */
+        uint32  pfm:2;
+        uint32  cos:3;                  /* 6 */
+        uint32  dst_port:5;
+        uint32  dst_mod:5;              /* 7 */
+        uint32  cng:1;
+        uint32  hdr_format:2;
+        uint32  mirror:1;               /* 8 */
+        uint32  mirror_done:1;
+        uint32  mirror_only:1;
+        uint32  ingress_tagged:1;
+        uint32  lag_failover:1;
+        uint32  donot_learn:1;
+        uint32  donot_modify:1;
+        uint32  dst_t:1;
+        uint32  vc_label_19_16:4;       /* 9 */
+        uint32  label_present:1;
+        uint32  l3:1;
+        uint32  dst_mod_5:1;
+        uint32  src_mod_5:1;
+        uint32  vc_label_15_8:8;        /* 10 */
+        uint32  vc_label_7_0:8;         /* 11 */
+    } hgp_overlay2;
+
+#else /* !LE_HOST */
+
+    struct {                            /* Byte # */
+        uint32  start:8;                /* 0 */
+        uint32  hgi:8;                  /* 1 */
+        uint32  vlan_pri:3;             /* 2 */
+        uint32  vlan_cfi:1;
+        uint32  vlan_id_hi:4;
+        uint32  vlan_id_lo:8;           /* 3 */
+        uint32  src_mod:5;              /* 4 */
+        uint32  opcode:3;
+        uint32  pfm:2;                  /* 5 */
+        uint32  src_port:6;
+        uint32  dst_port:5;             /* 6 */
+        uint32  cos:3;
+        uint32  hdr_format:2;           /* 7 */
+        uint32  cng:1;
+        uint32  dst_mod:5;
+        uint32  dst_t:1;                /* 8 */
+        uint32  dst_tgid:3;
+        uint32  ingress_tagged:1;
+        uint32  mirror_only:1;
+        uint32  mirror_done:1;
+        uint32  mirror:1;
+        uint32  _rsvd1:8;               /* 9 */
+        uint32  _rsvd2:8;               /* 10 */
+        uint32  _rsvd3:8;               /* 11 */
+    } overlay1;
+
+    struct {                            /* Byte # */
+        uint32  _rsvd1:8;               /* 0 */
+        uint32  _rsvd2:8;               /* 1 */
+        uint32  _rsvd3:8;               /* 2 */
+        uint32  _rsvd4:8;               /* 3 */
+        uint32  _rsvd5:8;               /* 4 */
+        uint32  _rsvd6:2;               /* 5 */
+        uint32  tgid:6;
+        uint32  l2mc_ptr_lo:5;          /* 6 */
+        uint32  _rsvd7:3;
+        uint32  _rsvd8:3;               /* 7 */
+        uint32  l2mc_ptr_hi:5;
+        uint32  ctag_hi:8;              /* 8 */
+        uint32  ctag_lo:8;              /* 9 */
+        uint32  _rsvd9:8;               /* 10 */
+        uint32  _rsvd10:8;              /* 11 */
+    } overlay2;
+
+    struct {                            /* Byte # */
+        uint32  start:8;                /* 0 */
+        uint32  hgi:2;                  /* 1 */
+        uint32  cng_hi:1;
+        uint32  hdr_ext_len:3;
+        uint32  src_mod_6:1;
+        uint32  dst_mod_6:1;
+        uint32  vlan_pri:3;             /* 2 */
+        uint32  vlan_cfi:1;
+        uint32  vlan_id_hi:4;
+        uint32  vlan_id_lo:8;           /* 3 */
+        uint32  src_mod:5;              /* 4 */
+        uint32  opcode:3;
+        uint32  pfm:2;                  /* 5 */
+        uint32  src_port:6;
+        uint32  dst_port:5;             /* 6 */
+        uint32  cos:3;
+        uint32  hdr_format:2;           /* 7 */
+        uint32  cng:1;
+        uint32  dst_mod:5;
+        uint32  dst_t:1;                /* 8 */
+        uint32  dst_tgid:3;
+        uint32  ingress_tagged:1;
+        uint32  mirror_only:1;
+        uint32  mirror_done:1;
+        uint32  mirror:1;
+        uint32  src_mod_5:1;            /* 9 */
+        uint32  dst_mod_5:1;
+        uint32  l3:1;
+        uint32  label_present:1;
+        uint32  vc_label_19_16:4;
+        uint32  vc_label_15_8:8;        /* 10 */
+        uint32  vc_label_7_0:8; /* 11 */
+    } hgp_overlay1;
+
+    struct {                            /* Byte # */
+        uint32  start:8;                /* 0 */
+        uint32  hgi:2;                  /* 1 */
+        uint32  cng_hi:1;
+        uint32  hdr_ext_len:3;
+        uint32  src_mod_6:1;
+        uint32  dst_mod_6:1;
+        uint32  vlan_pri:3;             /* 2 */
+        uint32  vlan_cfi:1;
+        uint32  vlan_id_hi:4;
+        uint32  vlan_id_lo:8;           /* 3 */
+        uint32  src_mod:5;              /* 4 */
+        uint32  opcode:3;
+        uint32  pfm:2;                  /* 5 */
+        uint32  src_port:6;
+        uint32  dst_port:5;             /* 6 */
+        uint32  cos:3;
+        uint32  hdr_format:2;           /* 7 */
+        uint32  cng:1;
+        uint32  dst_mod:5;
+        uint32  dst_t:1;                /* 8 */
+        uint32  donot_modify:1;
+        uint32  donot_learn:1;
+        uint32  lag_failover:1;
+        uint32  ingress_tagged:1;
+        uint32  mirror_only:1;
+        uint32  mirror_done:1;
+        uint32  mirror:1;
+        uint32  src_mod_5:1;            /* 9 */
+        uint32  dst_mod_5:1;
+        uint32  l3:1;
+        uint32  label_present:1;
+        uint32  vc_label_19_16:4;
+        uint32  vc_label_15_8:8;        /* 10 */
+        uint32  vc_label_7_0:8; /* 11 */
+    } hgp_overlay2;
+
+#endif /* !LE_HOST */
+
+} soc_higig_hdr_t;
+
+#define SOC_HIGIG_HDR_SIZE      ((int) sizeof(soc_higig_hdr_t))
+
+/*
+ * Higig Header Field Manipulation
+ */
+
+typedef enum {
+    /* NOTE: strings in soc_higig_field_names[] must match */
+    HG_invalid = -1,
+    HG_start = 0,
+    HG_hgi,
+    HG_vlan_tag,                /* aggregate of pri, cfi, and id */
+    HG_vlan_pri,
+    HG_vlan_cfi,
+    HG_vlan_id,
+    HG_src_mod,
+    HG_opcode,
+    HG_pfm,
+    HG_src_port,
+    HG_dst_port,
+    HG_cos,
+    HG_hdr_format,
+    HG_cng,
+    HG_dst_mod,
+    HG_dst_t,
+    HG_dst_tgid,
+    HG_ingress_tagged,
+    HG_mirror_only,
+    HG_mirror_done,
+    HG_mirror,
+    HG_tgid,
+    HG_l2mc_ptr,
+    HG_ctag,
+    HG_hdr_ext_len,     /* HG+ fields */
+    HG_l3,
+    HG_donot_modify,
+    HG_donot_learn,
+    HG_lag_failover,
+    HG_label_present,
+    HG_vc_label,
+#if defined(BCM_HIGIG2_SUPPORT)
+    HG_tc,              /* HG2 fields */
+    HG_mcst,
+    HG_mgid,
+    HG_lbid,
+    HG_dp,
+    HG_ehv,
+    HG_ppd_type,
+    HG_src_t,
+    HG_multipoint,
+    HG_fwd_type,
+    HG_dst_vp,
+    HG_src_vp,
+    HG_vni,
+    HG_data_container_type,
+    HG_data_container,
+    HG_preserve_dscp,
+    HG_preserve_dot1p,
+    HG_dst_type,
+    HG_src_type,
+    HG_deferred_drop,
+    HG_vxlt_done,
+    HG_deferred_change_pkt_pri,
+    HG_new_pkt_pri,
+    HG_deferred_change_dscp,
+    HG_new_dscp,
+    HG_label_overlay_type,
+    HG_protection_status,
+    HG_replication_id,
+    HG_ether_type,
+    HG_class_id,
+    HG_cn,
+    HG_sw_gen,
+#endif /* BCM_HIGIG2_SUPPORT */
+    HG_COUNT
+} soc_higig_field_t;
+
+#if defined(BCM_HIGIG2_SUPPORT)
+#define SOC_HIGIG2_FIELD_NAMES_INIT                     \
+    "tc",              /* HG2 fields */                 \
+    "mcst",                                             \
+    "mgid",                                             \
+    "lbid",                                             \
+    "dp",                                               \
+    "ehv",                                              \
+    "ppd_type",                                         \
+    "src_t",                                            \
+    "multipoint",                                       \
+    "fwd_type",                                         \
+    "dst_vp",                                           \
+    "src_vp",                                           \
+    "vni",                                              \
+    "data_container_type",                              \
+    "data_container",                                   \
+    "preserve_dscp",                                    \
+    "preserve_dot1p",                                   \
+    "dst_type",                                         \
+    "src_type",                                         \
+    "deferred_drop",                                    \
+    "vxlt_done",                                        \
+    "deferred_change_pkt_pri",                          \
+    "new_pkt_pri",                                      \
+    "deferred_change_dscp",                             \
+    "new_dscp",                                         \
+    "label_overlay_type",                               \
+    "protection_status",                                \
+    "replication_id",                                   \
+    "ether_type",                                       \
+    "class_id",                                         \
+    "cn",                                               \
+    "sw_gen",
+#else
+#define SOC_HIGIG2_FIELD_NAMES_INIT
+#endif /* BCM_HIGIG2_SUPPORT */
+
+/* NOTE: strings must match soc_higig_field_t */
+#define SOC_HIGIG_FIELD_NAMES_INIT                      \
+    "start",                                            \
+    "hgi",                                              \
+    "vlan_tag",                                         \
+    "vlan_pri",                                         \
+    "vlan_cfi",                                         \
+    "vlan_id",                                          \
+    "src_mod",                                          \
+    "opcode",                                           \
+    "pfm",                                              \
+    "src_port",                                         \
+    "dst_port",                                         \
+    "cos",                                              \
+    "hdr_format",                                       \
+    "cng",                                              \
+    "dst_mod",                                          \
+    "dst_t",                                            \
+    "dst_tgid",                                         \
+    "ingress_tagged",                                   \
+    "mirror_only",                                      \
+    "mirror_done",                                      \
+    "mirror",                                           \
+    "tgid",                                             \
+    "l2mc_ptr",                                         \
+    "ctag",                                             \
+    "hdr_ext_len",     /* HG+ fields */                 \
+    "l3",                                               \
+    "donot_modify",                                     \
+    "donot_learn",                                      \
+    "lag_failover",                                     \
+    "label_present",                                    \
+    "vc_label",                                         \
+    SOC_HIGIG2_FIELD_NAMES_INIT                         \
+    NULL
+
+#ifdef BCM_HIGIG2_SUPPORT
+
+#define SOC_HIGIG2_START        0xfc /* Higig2 Module Header for CMIC TX */
+
+typedef union soc_higig2_hdr_u {
+    struct {
+        uint8   bytes[16];
+    } overlay0;
+
+#if defined(LE_HOST)
+
+    struct {                            /* Byte # */
+        /* "Legacy" PPD Overlay 1 */
+        uint32  start:8;                /* 0 */
+        uint32  tc:4;                   /* 1 */
+        uint32  mcst:1;
+        uint32  _rsvd1:3;
+        uint32  dst_mod:8;              /* 2 */
+        uint32  dst_port:8;             /* 3 */
+        uint32  src_mod:8;              /* 4 */
+        uint32  src_port:8;             /* 5 */
+        uint32  lbid:8;                 /* 6 */
+        uint32  ppd_type:3;             /* 7 */
+        uint32  _rsvd2:2;
+        uint32  ehv:1;
+        uint32  dp:2;
+        uint32  mirror:1;               /* 8 */
+        uint32  mirror_done:1;
+        uint32  mirror_only:1;
+        uint32  ingress_tagged:1;
+        uint32  lag_failover:1;
+        uint32  donot_learn:1;
+        uint32  donot_modify:1;
+        uint32  dst_t:1;
+        uint32  vc_label_19_16:4;       /* 9 */
+        uint32  label_present:1;
+        uint32  l3:1;
+        uint32  label_overlay_type:2;
+        uint32  vc_label_15_8:8;        /* 10 */
+        uint32  vc_label_7_0:8;         /* 11 */
+        uint32  vlan_id_hi:4;           /* 12 */
+        uint32  vlan_cfi:1;
+        uint32  vlan_pri:3;
+        uint32  vlan_id_lo:8;           /* 13 */
+        uint32  opcode:3;               /* 14 */
+        uint32  preserve_dot1p:1;
+        uint32  preserve_dscp:1;
+        uint32  src_t:1;
+        uint32  pfm:2;
+        uint32  _rsvd5:5;               /* 15 */
+        uint32  hdr_ext_len:3;
+   } ppd_overlay1;
+
+    struct {                            /* Byte # */
+        /* "Legacy" PPD Overlay 2 */
+        uint32  start:8;                /* 0 */
+        uint32  tc:4;                   /* 1 */
+        uint32  mcst:1;
+        uint32  _rsvd1:3;
+        uint32  dst_mod:8;              /* 2 */
+        uint32  dst_port:8;             /* 3 */
+        uint32  src_mod:8;              /* 4 */
+        uint32  src_port:8;             /* 5 */
+        uint32  lbid:8;                 /* 6 */
+        uint32  ppd_type:3;             /* 7 */
+        uint32  _rsvd2:2;
+        uint32  ehv:1;
+        uint32  dp:2;
+        uint32  ctag_hi:8;              /* 8 */
+        uint32  ctag_lo:8;              /* 9 */
+        uint32  _rsvd3:8;               /* 10 */
+        uint32  _rsvd4:8;               /* 11 */
+        uint32  vlan_id_hi:4;           /* 12 */
+        uint32  vlan_cfi:1;
+        uint32  vlan_pri:3;
+        uint32  vlan_id_lo:8;           /* 13 */
+        uint32  opcode:3;               /* 14 */
+        uint32  _rsvd5:2;
+        uint32  src_t:1;
+        uint32  pfm:2;
+        uint32  _rsvd6:5;               /* 15 */
+        uint32  hdr_ext_len:3;
+    } ppd_overlay2;
+
+    struct {                            /* Byte # */
+        /* "Next Gen" PPD Overlay 3 */
+        uint32  start:8;                /* 0 */
+        uint32  tc:4;                   /* 1 */
+        uint32  mcst:1;
+        uint32  _rsvd1:3;
+        uint32  dst_mod:8;              /* 2 */
+        uint32  dst_port:8;             /* 3 */
+        uint32  src_mod:8;              /* 4 */
+        uint32  src_port:8;             /* 5 */
+        uint32  lbid:8;                 /* 6 */
+        uint32  ppd_type:3;             /* 7 */
+        uint32  _rsvd2:2;
+        uint32  ehv:1;
+        uint32  dp:2;
+        uint32  vni_mid:2;              /* 8 */
+        uint32  fwd_type:5;
+        uint32  multipoint:1;
+        uint32  vni_low:8;              /* 9 */
+        uint32  dst_vp_high:8;          /* 10 */
+        uint32  dst_vp_low:8;           /* 11 */
+        uint32  src_vp_high:8;          /* 12 */
+        uint32  src_vp_low:8;           /* 13 */
+        uint32  opcode:3;               /* 14 */
+        uint32  protection_status:1;
+        uint32  lag_failover:1;
+        uint32  donot_learn:1;
+        uint32  donot_modify:1;
+        uint32  mirror:1;
+        uint32  source_type:1;          /* 15 */
+        uint32  dest_type:1;
+        uint32  preserve_dot1p:1;
+        uint32  preserve_dscp:1;
+        uint32  vni_high:4;
+    } ppd_overlay3;
+
+    struct {                            /* Byte # */
+        /* "Offload Engine" PPD Overlay 4 */
+        uint32  start:8;                /* 0 */
+        uint32  tc:4;                   /* 1 */
+        uint32  mcst:1;
+        uint32  _rsvd1:3;
+        uint32  dst_mod:8;              /* 2 */
+        uint32  dst_port:8;             /* 3 */
+        uint32  src_mod:8;              /* 4 */
+        uint32  src_port:8;             /* 5 */
+        uint32  lbid:8;                 /* 6 */
+        uint32  ppd_type:3;             /* 7 */
+        uint32  _rsvd2:2;
+        uint32  ehv:1;
+        uint32  dp:2;
+
+        union {
+            /* The data container has several sub-formats */
+            struct {                    /* Byte # */
+                /* Abstract data container */
+                uint8  bytes[4];       /* 8-11 */
+            } abstract;
+
+            struct {                    /* Byte # */
+                uint32  ctag_hi:8;      /* 8 */
+                uint32  ctag_lo:8;      /* 9 */
+                uint32  deferred_change_dscp:1; /* 10 */
+                uint32  new_pkt_pri:3;
+                uint32  deferred_change_pkt_pri:1;
+                uint32  vxlt_done:2;
+                uint32  deferred_drop:1;
+                uint32  _rsvd1:2;       /* 11 */
+                uint32  new_dscp:6;
+            } offload_engine;
+        } data_container;
+
+        uint32  src_vp_high:8;          /* 12 */
+        uint32  src_vp_low:8;           /* 13 */
+        uint32  opcode:3;               /* 14 */
+        uint32  source_type:1;
+        uint32  _rsvd3:1;
+        uint32  donot_learn:1;
+        uint32  preserve_dot1p:1;
+        uint32  preserve_dscp:1;
+        uint32  data_container_type:4;  /* 15 */
+        uint32  _rsvd4:4;
+    } ppd_overlay4;
+
+#else /* !LE_HOST */
+
+    struct {                            /* Byte # */
+        /* "Legacy" PPD Overlay 1 */
+        uint32  start:8;                /* 0 */
+        uint32  _rsvd1:3;               /* 1 */
+        uint32  mcst:1;
+        uint32  tc:4;
+        uint32  dst_mod:8;              /* 2 */
+        uint32  dst_port:8;             /* 3 */
+        uint32  src_mod:8;              /* 4 */
+        uint32  src_port:8;             /* 5 */
+        uint32  lbid:8;                 /* 6 */
+        uint32  dp:2;                   /* 7 */
+        uint32  ehv:1;
+        uint32  _rsvd2:2;
+        uint32  ppd_type:3;
+        uint32  dst_t:1;                /* 8 */
+        uint32  donot_modify:1;
+        uint32  donot_learn:1;
+        uint32  lag_failover:1;
+        uint32  ingress_tagged:1;
+        uint32  mirror_only:1;
+        uint32  mirror_done:1;
+        uint32  mirror:1;
+        uint32  label_overlay_type:2;               /* 9 */
+        uint32  l3:1;
+        uint32  label_present:1;
+        uint32  vc_label_19_16:4;
+        uint32  vc_label_15_8:8;        /* 10 */
+        uint32  vc_label_7_0:8;         /* 11 */
+        uint32  vlan_pri:3;             /* 12 */
+        uint32  vlan_cfi:1;
+        uint32  vlan_id_hi:4;
+        uint32  vlan_id_lo:8;           /* 13 */
+        uint32  pfm:2;                  /* 14 */
+        uint32  src_t:1;
+        uint32  preserve_dscp:1;
+        uint32  preserve_dot1p:1;
+        uint32  opcode:3;
+        uint32  hdr_ext_len:3;          /* 15 */
+        uint32  _rsvd5:5;
+   } ppd_overlay1;
+
+    struct {                            /* Byte # */
+        /* "Legacy" PPD Overlay 2 */
+        uint32  start:8;                /* 0 */
+        uint32  _rsvd1:3;               /* 1 */
+        uint32  mcst:1;
+        uint32  tc:4;
+        uint32  dst_mod:8;              /* 2 */
+        uint32  dst_port:8;             /* 3 */
+        uint32  src_mod:8;              /* 4 */
+        uint32  src_port:8;             /* 5 */
+        uint32  lbid:8;                 /* 6 */
+        uint32  dp:2;                   /* 7 */
+        uint32  ehv:1;
+        uint32  _rsvd2:2;
+        uint32  ppd_type:3;
+        uint32  ctag_hi:8;              /* 8 */
+        uint32  ctag_lo:8;              /* 9 */
+        uint32  _rsvd3:8;               /* 10 */
+        uint32  _rsvd4:8;               /* 11 */
+        uint32  vlan_pri:3;             /* 12 */
+        uint32  vlan_cfi:1;
+        uint32  vlan_id_hi:4;
+        uint32  vlan_id_lo:8;           /* 13 */
+        uint32  pfm:2;                  /* 14 */
+        uint32  src_t:1;
+        uint32  _rsvd5:2;
+        uint32  opcode:3;
+        uint32  hdr_ext_len:3;          /* 15 */
+        uint32  _rsvd6:5;
+    } ppd_overlay2;
+
+    struct {                            /* Byte # */
+        /* "Next Gen" PPD Overlay 3 */
+        uint32  start:8;                /* 0 */
+        uint32  _rsvd1:3;               /* 1 */
+        uint32  mcst:1;
+        uint32  tc:4;
+        uint32  dst_mod:8;              /* 2 */
+        uint32  dst_port:8;             /* 3 */
+        uint32  src_mod:8;              /* 4 */
+        uint32  src_port:8;             /* 5 */
+        uint32  lbid:8;                 /* 6 */
+        uint32  dp:2;                   /* 7 */
+        uint32  ehv:1;
+        uint32  _rsvd2:2;
+        uint32  ppd_type:3;
+        uint32  multipoint:1;           /* 8 */
+        uint32  fwd_type:5;
+        uint32  vni_mid:2;
+        uint32  vni_low:8;              /* 9 */
+        uint32  dst_vp_high:8;          /* 10 */
+        uint32  dst_vp_low:8;           /* 11 */
+        uint32  src_vp_high:8;          /* 12 */
+        uint32  src_vp_low:8;           /* 13 */
+        uint32  mirror:1;               /* 14 */
+        uint32  donot_modify:1;
+        uint32  donot_learn:1;
+        uint32  lag_failover:1;
+        uint32  protection_status:1;
+        uint32  opcode:3;
+        uint32  vni_high:4;             /* 15 */
+        uint32  preserve_dscp:1;
+        uint32  preserve_dot1p:1;
+        uint32  dest_type:1;
+        uint32  source_type:1;
+    } ppd_overlay3;
+
+    struct {                            /* Byte # */
+        /* "Offload Engine" PPD Overlay 4 */
+        uint32  start:8;                /* 0 */
+        uint32  _rsvd1:3;               /* 1 */
+        uint32  mcst:1;
+        uint32  tc:4;
+        uint32  dst_mod:8;              /* 2 */
+        uint32  dst_port:8;             /* 3 */
+        uint32  src_mod:8;              /* 4 */
+        uint32  src_port:8;             /* 5 */
+        uint32  lbid:8;                 /* 6 */
+        uint32  dp:2;                   /* 7 */
+        uint32  ehv:1;
+        uint32  _rsvd2:2;
+        uint32  ppd_type:3;
+
+        union {
+            /* The data container has several sub-formats */
+            struct {                    /* Byte # */
+                /* Abstract data container */
+                uint8  bytes[4];       /* 8-11 */
+            } abstract;
+
+            struct {                    /* Byte # */
+                uint32  ctag_hi:8;      /* 8 */
+                uint32  ctag_lo:8;      /* 9 */
+                uint32  deferred_drop:1; /* 10 */
+                uint32  vxlt_done:2;
+                uint32  deferred_change_pkt_pri:1;
+                uint32  new_pkt_pri:3;
+                uint32  deferred_change_dscp:1;
+                uint32  new_dscp:6;     /* 11 */
+                uint32  _rsvd1:2;
+            } offload_engine;
+        } data_container;
+
+        uint32  src_vp_high:8;          /* 12 */
+        uint32  src_vp_low:8;           /* 13 */
+        uint32  preserve_dscp:1;        /* 14 */
+        uint32  preserve_dot1p:1;
+        uint32  donot_learn:1;
+        uint32  _rsvd3:1;
+        uint32  source_type:1;
+        uint32  opcode:3;
+        uint32  _rsvd4:4;               /* 15 */
+        uint32  data_container_type:4;
+    } ppd_overlay4;
+#endif /* !LE_HOST */
+
+} soc_higig2_hdr_t;
+
+#define SOC_HIGIG2_LABEL_OVERLAY_TYPE_VC_LABEL             0
+#define SOC_HIGIG2_LABEL_OVERLAY_TYPE_SYSTEM_INGRESS_PORT  1
+#define SOC_HIGIG2_LABEL_OVERLAY_TYPE_MIRROR_CLASS_TAG     2
+#define SOC_HIGIG2_LABEL_OVERLAY_TYPE_QTAG                 3
+
+#define SOC_HIGIG2_HDR_SIZE     ((int) sizeof(soc_higig2_hdr_t))
+
+extern uint32 soc_higig2_field_get(int unit, soc_higig2_hdr_t *hg,
+                                  soc_higig_field_t field);
+extern void soc_higig2_field_set(int unit, soc_higig2_hdr_t *hg,
+                                soc_higig_field_t field, uint32 val);
+extern void soc_higig2_dump(int unit, char *pfx, soc_higig2_hdr_t *hg);
+
+
+typedef union soc_higig3_hdr_u {
+    struct {
+        uint8   bytes[16];
+    } overlay0;
+#if defined(LE_HOST)
+    struct {
+        uint32  ethertype_high:8;
+        uint32  ethertype_mirror_copy:1;
+        uint32  ethertype_reserved:1;
+        uint32  ethertype_exthdr:2;
+        uint32  ethertype_ver:2;
+        uint32  ethertype_low:2;
+        uint32  system_dest_high:7;
+        uint32  system_dest_type:1;
+        uint32  system_dest_low:8;
+
+        uint32  system_source_high:7;
+        uint32  l3_routed:1;
+        uint32  system_source_low:8;
+        uint32  entropy:8;
+        uint32  tc:4;
+        uint32  cn:2;
+        uint32  cng:2;
+
+        uint32  class_id_high:2;
+        uint32  flags:6;
+        uint32  class_id_low:8;
+        uint32  forwarding_domain_high:8;
+        uint32  forwarding_domain_low:8;
+
+        uint32  svp_high:8;
+        uint32  svp_low:8;
+        uint32  dvp_or_l3_iif_high:8;
+        uint32  dvp_or_l3_iif_low:8;
+    } hg3_overlay;
+#else
+    struct {
+        /* Word 0 */
+        uint32  ethertype_high:8;
+        uint32  ethertype_low:2;
+        uint32  ethertype_ver:2;
+        uint32  ethertype_exthdr:2;
+        uint32  ethertype_reserved:1;
+        uint32  ethertype_mirror_copy:1;
+        uint32  system_dest_type:1;
+        uint32  system_dest_high:7;
+        uint32  system_dest_low:8;
+
+        /* Word 1  */
+        uint32  l3_routed:1;
+        uint32  system_source_high:7;
+        uint32  system_source_low:8;
+        uint32  entropy:8;
+        uint32  cng:2;
+        uint32  cn:2;
+        uint32  tc:4;
+
+        /* Extension header Type 0 */
+        /* Word 2 */
+        uint32  flags:6;
+        uint32  class_id_high:2;
+        uint32  class_id_low:8;
+        uint32  forwarding_domain_high:8;
+        uint32  forwarding_domain_low:8;
+
+        /* Word 3 */
+        uint32  svp_high:8;
+        uint32  svp_low:8;
+        uint32  dvp_or_l3_iif_high:8;
+        uint32  dvp_or_l3_iif_low:8;
+    } hg3_overlay;
+#endif /* LE_HOST */
+} soc_higig3_hdr_t;
+
+
+#define SOC_HIGIG3_HDR_SIZE     ((int) sizeof(soc_higig3_hdr_t))
+extern uint32 soc_higig3_field_get(int unit, soc_higig3_hdr_t *hg,
+                                  soc_higig_field_t field);
+extern void soc_higig3_field_set(int unit, soc_higig3_hdr_t *hg,
+                                soc_higig_field_t field, uint32 val);
+extern void soc_higig3_dump(int unit, char *pfx, soc_higig3_hdr_t *hg);
+
+#endif /* BCM_HIGIG2_SUPPORT */
+
+extern soc_higig_field_t soc_higig_name_to_field(int unit, char *name);
+extern char *soc_higig_field_to_name(int unit, soc_higig_field_t f);
+
+extern uint32 soc_higig_field_get(int unit, soc_higig_hdr_t *hg,
+                                  soc_higig_field_t field);
+extern void soc_higig_field_set(int unit, soc_higig_hdr_t *hg,
+                                soc_higig_field_t field, uint32 val);
+
+extern void soc_higig_dump(int unit, char *pfx, soc_higig_hdr_t *hg);
+
+/* HIGIG Header field default values */
+
+/* default SOP Symbol */
+#define SOC_HIGIG_START         0xfb /* Default Start for BIGMAC */
+
+/* HGI */
+#define SOC_HIGIG_HGI           0x80 /* Default HGI */
+#define SOC_HIGIG_HGI_MASK      0xc0 /* HGI field mask */
+
+/* Module header Op-Codes */
+#define SOC_HIGIG_OP_CPU        0x00 /* CPU Frame */
+#define SOC_HIGIG_OP_UC         0x01 /* Unicast Frame */
+#define SOC_HIGIG_OP_BC         0x02 /* Broadcast or DLF frame */
+#define SOC_HIGIG_OP_MC         0x03 /* Multicast Frame */
+#define SOC_HIGIG_OP_IPMC       0x04 /* IP Multicast Frame */
+
+#define SOC_HIGIG_DST_MOD_CPU   0x00
+
+/* Header Format */
+#define SOC_HIGIG_HDR_DEFAULT   0x00
+#define SOC_HIGIG_HDR_CLASS_TAG 0x01
+#define SOC_HIGIG_HDR_EXT_LEN   0x02
+#define SOC_HIGIG_HDR_RSVD2     0x03
+
+#if defined(BCM_XGS_SUPPORT)
+
+/* XGS Frame format */
+typedef struct xgs_pkt_s {
+    soc_higig_hdr_t     higig_hdr;
+    enet_hdr_t          enet_hdr;
+} xgs_pkt_t;
+
+/* Hercules Header modes */
+#define SOC_XGS_ENCAP_IEEE      0x00 /* Standard IEEE 802.3 (Default) */
+#define SOC_XGS_ENCAP_HIGIG     0x01 /* Broadcom HIGIG Format */
+#define SOC_XGS_ENCAP_ALLYR     0x02 /* BCM5632 compatible mode */
+#define SOC_XGS_ENCAP_RSVP      0x03 /* Reserved */
+
+/****************************************************************************
+ * BCM5632 Header Format
+ * When the MAC is in BCM5632 header mode, we prepend the following
+ * two words of data to a standard 802.3 Ethernet Frame.
+ *
+ * ANSI only permits signed or unsigned int for bit field type.  This
+ * structure will only work for compilers for which uint32 is unsigned
+ * int, and which completely pack bit fields beginning at the MSbit for
+ * big-endian machines and at the LSbit for little-endian machines.
+ *
+ * NOTE: these structures already put the the individual bytes in memory
+ * in big endian order for both big- and little-endian machines, so no
+ * further swapping is required.
+ ****************************************************************************/
+
+typedef union soc_bcm5632_hdr_u {
+    struct {
+        uint8   bytes[8];
+    } overlay0;
+
+#if defined(LE_HOST)
+
+    struct {                            /* Byte # */
+        uint32  d_portid:6;             /* 0 */
+        uint32  _rsvd1:2;
+        uint32  _rsvd2:8;               /* 1 */
+        uint32  _rsvd3:8;               /* 2 */
+        uint32  _rsvd4:8;               /* 3 */
+
+        uint32  start:8;                /* 4 */
+        uint32  length_hi:8;            /* 5 */
+        uint32  length_lo:8;            /* 6 */
+        uint32  s_portid:6;             /* 7 */
+        uint32  _rsvd5:2;
+    } overlay1;
+
+#else /* !LE_HOST */
+
+    struct {                            /* Byte # */
+        uint32  _rsvd1:2;               /* 0 */
+        uint32  d_portid:6;
+        uint32  _rsvd2:8;               /* 1 */
+        uint32  _rsvd3:8;               /* 2 */
+        uint32  _rsvd4:8;               /* 3 */
+
+        uint32  start:8;                /* 4 */
+        uint32  length_hi:8;            /* 5 */
+        uint32  length_lo:8;            /* 6 */
+        uint32  _rsvd5:2;               /* 7 */
+        uint32  s_portid:6;
+    } overlay1;
+
+#endif
+
+} soc_bcm5632_hdr_t;
+
+#define SOC_BCM5632_HDR_SIZE    ((int) sizeof(soc_bcm5632_hdr_t))
+
+/* BCM5632 Frame format */
+typedef struct b5632_pkt_s {
+    soc_bcm5632_hdr_t   b5632_hdr;
+    enet_hdr_t          enet_hdr;
+} b5632_pkt_t;
+
+/* BCM5632 Header field default values */
+
+/* HGI */
+#define SOC_BCM5632_HGI         0x00 /* Default HGI for BCM5632 */
+
+#endif /* defined(BCM_XGS_SUPPORT) */
+
+
+#define SOC_HIGIG_HDR_MAX_MODID           0xFF
+#define SOC_HIGIG_E2ECC_MAX_PORT_STATUS   64
+
+/* E2ECC Header */
+typedef union soc_higig_e2ecc_hdr_u {
+    struct {
+        uint8   bytes[32];
+    } overlay0;
+
+    struct {
+        uint32  words[8];
+    } overlay1;
+
+} soc_higig_e2ecc_hdr_t;
+
+
+#endif /* defined(BCM_XGS_SUPPORT) || defined(BCM_PETRA_SUPPORT)*/
+
+#endif  /* !_SOC_HIGIG_H */
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/maxdef.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/maxdef.h
new file mode 100644
index 000000000..31ae2947b
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/maxdef.h
@@ -0,0 +1,30 @@
+/*
+ * $Id:$
+ * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * 
+ * Permission is granted to use, copy, modify and/or distribute this
+ * software under either one of the licenses below.
+ * 
+ * License Option 1: GPL
+ * 
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License, version 2, as
+ * published by the Free Software Foundation (the "GPL").
+ * 
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License version 2 (GPLv2) for more details.
+ * 
+ * You should have received a copy of the GNU General Public License
+ * version 2 (GPLv2) along with this source code.
+ * 
+ * 
+ * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
+ * 
+ * This software is governed by the Broadcom Open Network Switch APIs license:
+ * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+ * 
+ *
+ * Stub header file
+ */
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/rx.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/rx.h
new file mode 100644
index 000000000..cc9269710
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/rx.h
@@ -0,0 +1,269 @@
+/*
+ * $Id: rx.h,v 1.16 Broadcom SDK $
+ * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * 
+ * Permission is granted to use, copy, modify and/or distribute this
+ * software under either one of the licenses below.
+ * 
+ * License Option 1: GPL
+ * 
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License, version 2, as
+ * published by the Free Software Foundation (the "GPL").
+ * 
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License version 2 (GPLv2) for more details.
+ * 
+ * You should have received a copy of the GNU General Public License
+ * version 2 (GPLv2) along with this source code.
+ * 
+ * 
+ * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
+ * 
+ * This software is governed by the Broadcom Open Network Switch APIs license:
+ * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+ * 
+ */
+
+#ifndef _SOC_RX_H
+#define _SOC_RX_H
+
+#include <sal/types.h>
+
+#include <shared/rx.h>
+
+/*
+ * PKT RX Packet Reasons; reason CPU received the packet.
+ * Notes:
+ *      It is possible no reasons are set (directed to CPU from ARL
+ *      for example), or multiple reasons may be set.
+ *
+ * See "include/shared/rx.h" for full description.
+ */
+
+typedef enum soc_rx_reason_e {
+    socRxReasonInvalid = _SHR_RX_INVALID, 
+    socRxReasonArp = _SHR_RX_ARP, 
+    socRxReasonBpdu = _SHR_RX_BPDU, 
+    socRxReasonBroadcast = _SHR_RX_BROADCAST, 
+    socRxReasonClassBasedMove = _SHR_RX_CLASS_BASED_MOVE, 
+    socRxReasonClassTagPackets = _SHR_RX_CLASS_TAG_PACKETS, 
+    socRxReasonControl = _SHR_RX_CONTROL, 
+    socRxReasonCpuLearn = _SHR_RX_CPU_LEARN, 
+    socRxReasonDestLookupFail = _SHR_RX_DEST_LOOKUP_FAIL, 
+    socRxReasonDhcp = _SHR_RX_DHCP, 
+    socRxReasonDosAttack = _SHR_RX_DOS_ATTACK, 
+    socRxReasonE2eHolIbp = _SHR_RX_E2E_HOL_IBP, 
+    socRxReasonEncapHigigError = _SHR_RX_ENCAP_HIGIG_ERROR, 
+    socRxReasonFilterMatch = _SHR_RX_FILTER_MATCH, 
+    socRxReasonGreChecksum = _SHR_RX_GRE_CHECKSUM, 
+    socRxReasonGreSourceRoute = _SHR_RX_GRE_SOURCE_ROUTE, 
+    socRxReasonHigigControl = _SHR_RX_HIGIG_CONTROL, 
+    socRxReasonHigigHdrError = _SHR_RX_HIGIG_HDR_ERROR, 
+    socRxReasonIcmpRedirect = _SHR_RX_ICMP_REDIRECT, 
+    socRxReasonIgmp = _SHR_RX_IGMP, 
+    socRxReasonIngressFilter = _SHR_RX_INGRESS_FILTER, 
+    socRxReasonIp = _SHR_RX_IP, 
+    socRxReasonIpfixRateViolation = _SHR_RX_IPFIX_RATE_VIOLATION, 
+    socRxReasonIpMcastMiss = _SHR_RX_IP_MCAST_MISS, 
+    socRxReasonIpmcReserved = _SHR_RX_IPMC_RSVD, 
+    socRxReasonIpOptionVersion = _SHR_RX_IP_OPTION_VERSION, 
+    socRxReasonIpmc = _SHR_RX_IPMC, 
+    socRxReasonL2Cpu = _SHR_RX_L2_CPU, 
+    socRxReasonL2DestMiss = _SHR_RX_L2_DEST_MISS, 
+    socRxReasonL2LearnLimit = _SHR_RX_L2_LEARN_LIMIT, 
+    socRxReasonL2Move = _SHR_RX_L2_MOVE, 
+    socRxReasonL2MtuFail = _SHR_RX_L2_MTU_FAIL, 
+    socRxReasonL2NonUnicastMiss = _SHR_RX_L2_NON_UNICAST_MISS, 
+    socRxReasonL2SourceMiss = _SHR_RX_L2_SOURCE_MISS, 
+    socRxReasonL3AddrBindFail = _SHR_RX_L3_ADDR_BIND_FAIL, 
+    socRxReasonL3DestMiss = _SHR_RX_L3_DEST_MISS, 
+    socRxReasonL3HeaderError = _SHR_RX_L3_HEADER_ERROR, 
+    socRxReasonL3MtuFail = _SHR_RX_L3_MTU_FAIL, 
+    socRxReasonL3Slowpath = _SHR_RX_L3_SLOW_PATH, 
+    socRxReasonL3SourceMiss = _SHR_RX_L3_SOURCE_MISS, 
+    socRxReasonL3SourceMove = _SHR_RX_L3_SOUCE_MOVE, 
+    socRxReasonMartianAddr = _SHR_RX_MARTIAN_ADDR, 
+    socRxReasonMcastIdxError = _SHR_RX_MCAST_IDX_ERROR, 
+    socRxReasonMcastMiss = _SHR_RX_MCAST_MISS, 
+    socRxReasonMimServiceError = _SHR_RX_MIM_SERVICE_ERROR, 
+    socRxReasonMplsCtrlWordError = _SHR_RX_MPLS_CTRL_WORD_ERROR, 
+    socRxReasonMplsError = _SHR_RX_MPLS_ERROR, 
+    socRxReasonMplsInvalidAction = _SHR_RX_MPLS_INVALID_ACTION, 
+    socRxReasonMplsInvalidPayload = _SHR_RX_MPLS_INVALID_PAYLOAD, 
+    socRxReasonMplsLabelMiss = _SHR_RX_MPLS_LABEL_MISS, 
+    socRxReasonMplsSequenceNumber = _SHR_RX_MPLS_SEQUENCE_NUMBER, 
+    socRxReasonMplsTtl = _SHR_RX_MPLS_TTL, 
+    socRxReasonMulticast = _SHR_RX_MULTICAST, 
+    socRxReasonNhop = _SHR_RX_NHOP, 
+    socRxReasonOAMError = _SHR_RX_OAM_ERROR, 
+    socRxReasonOAMSlowpath = _SHR_RX_OAM_SLOW_PATH, 
+    socRxReasonOAMLMDM = _SHR_RX_OAM_LMDM, 
+    socRxReasonParityError = _SHR_RX_PARITY_ERROR, 
+    socRxReasonProtocol = _SHR_RX_PROTOCOL, 
+    socRxReasonSampleDest = _SHR_RX_SAMPLE_DEST, 
+    socRxReasonSampleSource = _SHR_RX_SAMPLE_SOURCE, 
+    socRxReasonSharedVlanMismatch = _SHR_RX_SHARED_VLAN_MISMATCH, 
+    socRxReasonSourceRoute = _SHR_RX_SOURCE_ROUTE, 
+    socRxReasonTimeStamp = _SHR_RX_TIME_STAMP, 
+    socRxReasonTtl = _SHR_RX_TTL, 
+    socRxReasonTtl1 = _SHR_RX_TTL1, 
+    socRxReasonTunnelError = _SHR_RX_TUNNEL_ERROR, 
+    socRxReasonUdpChecksum = _SHR_RX_UDP_CHECKSUM, 
+    socRxReasonUnknownVlan = _SHR_RX_UNKNOWN_VLAN, 
+    socRxReasonUrpfFail = _SHR_RX_URPF_FAIL, 
+    socRxReasonVcLabelMiss = _SHR_RX_VC_LABEL_MISS, 
+    socRxReasonVlanFilterMatch = _SHR_RX_VLAN_FILTER_MATCH, 
+    socRxReasonWlanClientError = _SHR_RX_WLAN_CLIENT_ERROR, 
+    socRxReasonWlanSlowpath = _SHR_RX_WLAN_SLOW_PATH, 
+    socRxReasonWlanDot1xDrop = _SHR_RX_WLAN_DOT1X_DROP, 
+    socRxReasonExceptionFlood = _SHR_RX_EXCEPTION_FLOOD, 
+    socRxReasonTimeSync = _SHR_RX_TIMESYNC, 
+    socRxReasonEAVData = _SHR_RX_EAV_DATA, 
+    socRxReasonSamePortBridge = _SHR_RX_SAME_PORT_BRIDGE, 
+    socRxReasonSplitHorizon = _SHR_RX_SPLIT_HORIZON, 
+    socRxReasonL4Error = _SHR_RX_L4_ERROR, 
+    socRxReasonStp = _SHR_RX_STP, 
+    socRxReasonEgressFilterRedirect = _SHR_RX_EGRESS_FILTER_REDIRECT, 
+    socRxReasonFilterRedirect = _SHR_RX_FILTER_REDIRECT, 
+    socRxReasonLoopback = _SHR_RX_LOOPBACK,
+    socRxReasonVlanTranslate = _SHR_RX_VLAN_TRANSLATE, 
+    socRxReasonMmrp = _SHR_RX_MMRP, 
+    socRxReasonSrp = _SHR_RX_SRP, 
+    socRxReasonTunnelControl = _SHR_RX_TUNNEL_CONTROL, 
+    socRxReasonL2Marked = _SHR_RX_L2_MARKED, 
+    socRxReasonWlanSlowpathKeepalive = _SHR_RX_WLAN_SLOWPATH_KEEPALIVE, 
+    socRxReasonStation = _SHR_RX_STATION, 
+    socRxReasonNiv = _SHR_RX_NIV, 
+    socRxReasonNivPrioDrop = _SHR_RX_NIV_PRIO_DROP, 
+    socRxReasonNivInterfaceMiss = _SHR_RX_NIV_INTERFACE_MISS, 
+    socRxReasonNivRpfFail = _SHR_RX_NIV_RPF_FAIL, 
+    socRxReasonNivTagInvalid = _SHR_RX_NIV_TAG_INVALID, 
+    socRxReasonNivTagDrop = _SHR_RX_NIV_TAG_DROP, 
+    socRxReasonNivUntagDrop = _SHR_RX_NIV_UNTAG_DROP, 
+    socRxReasonTrill = _SHR_RX_TRILL, 
+    socRxReasonTrillInvalid = _SHR_RX_TRILL_INVALID, 
+    socRxReasonTrillMiss = _SHR_RX_TRILL_MISS, 
+    socRxReasonTrillRpfFail = _SHR_RX_TRILL_RPF_FAIL, 
+    socRxReasonTrillSlowpath = _SHR_RX_TRILL_SLOWPATH, 
+    socRxReasonTrillCoreIsIs = _SHR_RX_TRILL_CORE_IS_IS, 
+    socRxReasonTrillTtl = _SHR_RX_TRILL_TTL, 
+    socRxReasonTrillName = _SHR_RX_TRILL_NAME, 
+    socRxReasonBfdSlowpath = _SHR_RX_BFD_SLOWPATH, 
+    socRxReasonBfd = _SHR_RX_BFD, 
+    socRxReasonMirror = _SHR_RX_MIRROR, 
+    socRxReasonRegexAction = _SHR_RX_REGEX_ACTION, 
+    socRxReasonFailoverDrop = _SHR_RX_FAILOVER_DROP, 
+    socRxReasonWlanTunnelError = _SHR_RX_WLAN_TUNNEL_ERROR, 
+    socRxReasonMplsReservedEntropyLabel = \
+                                      _SHR_RX_MPLS_RESERVED_ENTROPY_LABEL, 
+    socRxReasonCongestionCnmProxy = _SHR_RX_CONGESTION_CNM_PROXY,
+    socRxReasonCongestionCnmProxyError = _SHR_RX_CONGESTION_CNM_PROXY_ERROR,
+    socRxReasonCongestionCnm = _SHR_RX_CONGESTION_CNM,
+    socRxReasonMplsUnknownAch = _SHR_RX_MPLS_UNKNOWN_ACH, 
+    socRxReasonMplsLookupsExceeded = _SHR_RX_MPLS_LOOKUPS_EXCEEDED, 
+    socRxReasonMplsIllegalReservedLabel = \
+                                      _SHR_RX_MPLS_ILLEGAL_RESERVED_LABEL, 
+    socRxReasonMplsRouterAlertLabel = _SHR_RX_MPLS_ROUTER_ALERT_LABEL, 
+    socRxReasonNivPrune = _SHR_RX_NIV_PRUNE, 
+    socRxReasonVirtualPortPrune = _SHR_RX_VIRTUAL_PORT_PRUNE, 
+    socRxReasonNonUnicastDrop = _SHR_RX_NON_UNICAST_DROP, 
+    socRxReasonTrillPacketPortMismatch = _SHR_RX_TRILL_PACKET_PORT_MISMATCH, 
+    socRxReasonRegexMatch = _SHR_RX_REGEX_MATCH, 
+    socRxReasonWlanClientMove = _SHR_RX_WLAN_CLIENT_MOVE, 
+    socRxReasonWlanSourcePortMiss = _SHR_RX_WLAN_SOURCE_PORT_MISS, 
+    socRxReasonWlanClientSourceMiss = _SHR_RX_WLAN_CLIENT_SOURCE_MISS, 
+    socRxReasonWlanClientDestMiss = _SHR_RX_WLAN_CLIENT_DEST_MISS, 
+    socRxReasonWlanMtu = _SHR_RX_WLAN_MTU, 
+    socRxReasonL2GreSipMiss = _SHR_RX_L2GRE_SIP_MISS, 
+    socRxReasonL2GreVpnIdMiss = _SHR_RX_L2GRE_VPN_ID_MISS, 
+    socRxReasonTimesyncUnknownVersion = _SHR_RX_TIMESYNC_UNKNOWN_VERSION,
+    socRxReasonVxlanSipMiss = _SHR_RX_VXLAN_SIP_MISS, 
+    socRxReasonVxlanVpnIdMiss = _SHR_RX_VXLAN_VPN_ID_MISS, 
+    socRxReasonFcoeZoneCheckFail = _SHR_RX_FCOE_ZONE_CHECK_FAIL, 
+    socRxReasonIpmcInterfaceMismatch = _SHR_RX_IPMC_INTERFACE_MISMATCH, 
+    socRxReasonNat = _SHR_RX_NAT, 
+    socRxReasonTcpUdpNatMiss = _SHR_RX_TCP_UDP_NAT_MISS, 
+    socRxReasonIcmpNatMiss = _SHR_RX_ICMP_NAT_MISS, 
+    socRxReasonNatFragment = _SHR_RX_NAT_FRAGMENT, 
+    socRxReasonNatMiss = _SHR_RX_NAT_MISS,
+    socRxReasonUnknownSubtendingPort = _SHR_RX_UNKNOWN_SUBTENTING_PORT,
+    socRxReasonLLTagAbsentDrop = _SHR_RX_LLTAG_ABSENT_DROP,
+    socRxReasonLLTagPresentDrop = _SHR_RX_LLTAG_PRESENT_DROP,  
+    socRxReasonOAMCCMSlowPath = _SHR_RX_OAM_CCM_SLOWPATH,  
+    socRxReasonOAMIncompleteOpcode = _SHR_RX_OAM_INCOMPLETE_OPCODE,
+    socRxReasonReserved0 = _SHR_RX_RESERVED_0,
+    socRxReasonOAMMplsLmDm = _SHR_RX_OAM_MPLS_LMDM,
+    socRxReasonSat = _SHR_RX_SAT,
+    socRxReasonSampleSourceFlex = _SHR_RX_SAMPLE_SOURCE_FLEX,
+    socRxReasonFlexSflow = _SHR_RX_FLEX_SFLOW,
+    socRxReasonVxltMiss = _SHR_RX_VXLT_MISS,
+    socRxReasonTunnelDecapEcnError = _SHR_RX_TUNNEL_DECAP_ECN_ERROR,
+    socRxReasonTunnelObjectValidationFail = _SHR_RX_TUNNEL_OBJECT_VALIDATION_FAIL,
+    socRxReasonL3Cpu = _SHR_RX_L3_CPU,
+    socRxReasonTunnelAdaptLookupMiss = _SHR_RX_TUNNEL_ADAPT_LOOKUP_MISS,
+    socRxReasonPacketFlowSelectMiss = _SHR_RX_PACKET_FLOW_SELECT_MISS,
+    socRxReasonProtectionDataDrop = _SHR_RX_PROTECTION_DATA_DROP,
+    socRxReasonPacketFlowSelect = _SHR_RX_PACKET_FLOW_SELECT,
+    socRxReasonOtherLookupMiss = _SHR_RX_OTHER_LOOKUP_MISS,
+    socRxReasonInvalidTpid = _SHR_RX_INVALID_TPID,
+    socRxReasonMplsControlPacket = _SHR_RX_MPLS_CONTROL_PACKET,
+    socRxReasonTunnelTtlError = _SHR_RX_TUNNEL_TTL_ERROR,
+    socRxReasonL2HeaderError = _SHR_RX_L2_HEADER_ERROR,
+    socRxReasonOtherLookupHit = _SHR_RX_OTHER_LOOKUP_HIT,
+    socRxReasonL2SrcLookupMiss = _SHR_RX_L2_SRC_LOOKUP_MISS,
+    socRxReasonL2SrcLookupHit = _SHR_RX_L2_SRC_LOOKUP_HIT,
+    socRxReasonL2DstLookupMiss = _SHR_RX_L2_DST_LOOKUP_MISS,
+    socRxReasonL2DstLookupHit = _SHR_RX_L2_DST_LOOKUP_HIT,
+    socRxReasonL3SrcRouteLookupMiss = _SHR_RX_L3_SRC_ROUTE_LOOKUP_MISS,
+    socRxReasonL3SrcHostLookupMiss = _SHR_RX_L3_SRC_HOST_LOOKUP_MISS,
+    socRxReasonL3SrcRouteLookupHit = _SHR_RX_L3_SRC_ROUTE_LOOKUP_HIT,
+    socRxReasonL3SrcHostLookupHit = _SHR_RX_L3_SRC_HOST_LOOKUP_HIT,
+    socRxReasonL3DstRouteLookupMiss = _SHR_RX_L3_DST_ROUTE_LOOKUP_MISS,
+    socRxReasonL3DstHostLookupMiss = _SHR_RX_L3_DST_HOST_LOOKUP_MISS,
+    socRxReasonL3DstRouteLookupHit = _SHR_RX_L3_DST_ROUTE_LOOKUP_HIT,
+    socRxReasonL3DstHostLookupHit = _SHR_RX_L3_DST_HOST_LOOKUP_HIT,
+    socRxReasonVlanTranslate1Lookup1Miss = _SHR_RX_VLAN_TRANSLATE1_LOOKUP1_MISS,
+    socRxReasonVlanTranslate1Lookup2Miss = _SHR_RX_VLAN_TRANSLATE1_LOOKUP2_MISS,
+    socRxReasonMplsLookup1Miss = _SHR_RX_MPLS_LOOKUP1_MISS,
+    socRxReasonMplsLookup2Miss = _SHR_RX_MPLS_LOOKUP2_MISS,
+    socRxReasonL3TunnelLookupMiss = _SHR_RX_L3_TUNNEL_LOOKUP_MISS,
+    socRxReasonVlanTranslate2Lookup1Miss = _SHR_RX_VLAN_TRANSLATE2_LOOKUP1_MISS,
+    socRxReasonVlanTranslate2Lookup2Miss = _SHR_RX_VLAN_TRANSLATE2_LOOKUP2_MISS,
+    socRxReasonL2StuFail = _SHR_RX_L2_STU_FAIL,
+    socReasonSrCounterExceeded = _SHR_RX_SR_COUNTER_EXCEEDED,
+    socRxReasonSrCopyToCpuBit0 = _SHR_RX_SR_COPY_TO_CPU_BIT0,
+    socRxReasonSrCopyToCpuBit1 = _SHR_RX_SR_COPY_TO_CPU_BIT1,
+    socRxReasonSrCopyToCpuBit2 = _SHR_RX_SR_COPY_TO_CPU_BIT2,
+    socRxReasonSrCopyToCpuBit3 = _SHR_RX_SR_COPY_TO_CPU_BIT3,
+    socRxReasonSrCopyToCpuBit4 = _SHR_RX_SR_COPY_TO_CPU_BIT4,
+    socRxReasonSrCopyToCpuBit5 = _SHR_RX_SR_COPY_TO_CPU_BIT5,
+    socRxReasonL3HeaderMismatch = _SHR_RX_L3_HEADER_MISMATCH,
+    socRxReasonEtrapMonitor = _SHR_RX_ETRAP_MONITOR,
+    socRxReasonDlbMonitor = _SHR_RX_DLB_MONITOR,
+    socRxReasonIntTurnAround = _SHR_RX_INT_TURNAROUND,
+    socRxReasonCount = _SHR_RX_REASON_COUNT /* MUST BE LAST */
+} soc_rx_reason_t;
+
+
+/*
+ * Set of "reasons" (see socRxReason*) why a packet came to the CPU.
+ */
+typedef _shr_rx_reasons_t soc_rx_reasons_t;
+
+/*
+ * Macro to add a reason (socRxReason*) to a set of
+ * reasons (soc_rx_reasons_t)
+ */
+#define SOC_RX_REASON_SET(_reasons, _reason) \
+       _SHR_RX_REASON_SET(_reasons, _reason)
+
+/*
+ * Macro to clear a set of reasons (soc_rx_reasons_t).
+ */
+#define SOC_RX_REASON_CLEAR_ALL(_reasons) \
+       _SHR_RX_REASON_CLEAR_ALL(_reasons)
+
+#endif  /* !_SOC_RX_H */
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type19.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type19.h
new file mode 100644
index 000000000..836eede1a
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type19.h
@@ -0,0 +1,247 @@
+/*
+ * $Id: type19.h,v 1.4 Broadcom SDK $
+ * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * 
+ * Permission is granted to use, copy, modify and/or distribute this
+ * software under either one of the licenses below.
+ * 
+ * License Option 1: GPL
+ * 
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License, version 2, as
+ * published by the Free Software Foundation (the "GPL").
+ * 
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License version 2 (GPLv2) for more details.
+ * 
+ * You should have received a copy of the GNU General Public License
+ * version 2 (GPLv2) along with this source code.
+ * 
+ * 
+ * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
+ * 
+ * This software is governed by the Broadcom Open Network Switch APIs license:
+ * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+ * 
+ *
+ * File:        soc/shared/dcbformats/type19.h
+ * Purpose:     Define dma control block (DCB) format for a type19 DCB
+ *              used by the 56640 (Triumph3/Firebolt4)
+ *
+ *              This file is shared between the SDK and the embedded applications.
+ */
+
+#ifndef _SOC_SHARED_DCBFORMATS_TYPE19_H
+#define _SOC_SHARED_DCBFORMATS_TYPE19_H
+
+/*
+ * DMA Control Block - Type 19
+ * Used on 5663x devices
+ * 16 words
+ */
+typedef struct {
+        uint32  addr;                   /* T19.0: physical address */
+                                        /* T19.1: Control 0 */
+#ifdef  LE_HOST
+        uint32  c_count:16,             /* Requested byte count */
+                c_chain:1,              /* Chaining */
+                c_sg:1,                 /* Scatter Gather */
+                c_reload:1,             /* Reload */
+                c_hg:1,                 /* Higig (TX) */
+                c_stat:1,               /* update stats (TX) */
+                c_pause:1,              /* Pause packet (TX) */
+                c_purge:1,              /* Purge packet (TX) */
+                :9;                     /* Don't care */
+#else
+        uint32  :9,                     /* Don't care */
+                c_purge:1,              /* Purge packet (TX) */
+                c_pause:1,
+                c_stat:1,
+                c_hg:1,
+                c_reload:1,
+                c_sg:1,
+                c_chain:1,
+                c_count:16;
+#endif  /* LE_HOST */
+        uint32  mh0;                    /* T19.2: Module Header word 0 */
+        uint32  mh1;                    /* T19.3: Module Header word 1 */
+        uint32  mh2;                    /* T19.4: Module Header word 2 */
+        uint32  mh3;                    /* T19.5: Module Header word 3 */
+#ifdef  LE_HOST
+                                        /* T19.6: RX Status 0 */
+        uint32  :3,                     /* Reserved */
+                mtp_index:5,            /* MTP index */
+                cpu_cos:6,              /* COS queue for CPU packets */
+                :2,                     /* Reserved */
+                inner_vid:12,           /* Inner VLAN ID */
+                inner_cfi:1,            /* Inner Canoncial Format Indicator */
+                inner_pri:3;            /* Inner priority */
+
+                                        /* T19.7 */ 
+        uint32  reason_hi:16,           /* CPU opcode (high bits) */
+                pkt_len:14,             /* Packet length */
+                :2;                     /* Reserved */
+
+                                        /* T19.8 */
+        uint32  reason;                 /* CPU opcode */
+
+                                        /* T19.9 */
+        uint32  dscp:8,                 /* New DSCP */
+                chg_tos:1,              /* DSCP has been changed by HW */
+                decap_tunnel_type:4,    /* Tunnel type that was decapsulated */
+                regen_crc:1,            /* Packet modified and needs new CRC */
+                :2,                     /* Reserved */
+                outer_vid:12,           /* Outer VLAN ID */
+                outer_cfi:1,            /* Outer Canoncial Format Indicator */
+                outer_pri:3;            /* Outer priority */
+
+                                        /* T19.10 */
+        uint32  timestamp;              /* Timestamp */
+
+                                        /* T19.11 */
+        uint32  cos:4,                  /* COS */
+                higig_cos:5,            /* Higig COS */
+                vlan_cos:5,             /* VLAN COS */
+                shaping_cos_sel:2,      /* Shaping COS Select */
+                vfi:12,                 /* Internal VFI value */
+                :4;                     /* Reserved */
+
+                                        /* T19.12 */
+        uint32  srcport:8,              /* Source port number */
+                hgi:2,                  /* Higig Interface Format Indicator */
+                itag_status:2,          /* Ingress incoming tag status */
+                otag_action:2,          /* Ingress Outer tag action */
+                itag_action:2,          /* Ingress Inner tag action */
+		service_tag:1,          /* SD tag present */
+		switch_pkt:1,           /* Switched packet */
+                hg_type:1,              /* 0: Higig+, 1: Higig2 */
+                src_hg:1,               /* Source is Higig */
+                l3routed:1,             /* Any IP routed packet */
+                l3only:1,               /* L3 only IPMC packet */
+                replicated:1,           /* Replicated copy */
+                imirror:1,              /* Ingress Mirroring */
+                emirror:1,              /* Egress Mirroring */
+                do_not_change_ttl:1,    /* Do not change TTL */
+                bpdu:1,                 /* BPDU Packet */
+                :5;                     /* Reserved */
+
+                                        /* T19.13 */
+        uint32  orig_dstport:6,         /* Original dst port (EP redirection) */
+                true_egr_mirror:1,      /* True egress mirrored */
+                egr_cpu_copy:1,         /* True egress copy-to-CPU */
+                oam_pkt:1,              /* OAM packet */
+                eh_tbl_idx:2,           /* Extended Higig table select */
+                eh_tag_type:2,          /* Extended Higig tag type */
+                eh_tm:1,                /* Extended Higig traffic manager ctrl */
+                eh_queue_tag:16,        /* Extended Higig queue tag */
+                :2;                     /* Reserved */
+
+                                        /* T19.14 */
+        uint32  l3_intf:15,             /* L3 Intf num / Next hop idx */
+                :1,                     /* Reserved */
+                match_rule:8,           /* Matched FP rule */
+                :8;                     /* Reserved */
+
+                                         /* T19.15: DMA Status 0 */
+        uint32  count:16,                /* Transferred byte count */
+                end:1,                   /* End bit (RX) */
+                start:1,                 /* Start bit (RX) */
+                error:1,                 /* Cell Error (RX) */
+                pktdata_read_ecc_error:1,/* 2 bit ECC error while reading packet
+                                            data from RX data Buffers.*/
+                status_read_ecc_error:1, /* 2 bit ECC error while reading Status
+                                            from RX Status Buffers.*/
+                dc:10,                   /* Don't Care */
+                done:1;                  /* Descriptor Done */
+#else
+                                        /* T19.6: RX Status 0 */
+        uint32  inner_pri:3,            /* Inner priority */
+                inner_cfi:1,            /* Inner Canoncial Format Indicator */
+                inner_vid:12,           /* Inner VLAN ID */
+                :2,                     /* Reserved */
+                cpu_cos:6,              /* COS queue for CPU packets */
+                mtp_index:5,            /* MTP index */
+                :3;                     /* Reserved */
+
+                                        /* T19.7 */
+        uint32  :2,                     /* Reserved */
+                pkt_len:14,             /* Packet length */
+                reason_hi:16;           /* CPU opcode (high bits) */
+
+                                        /* T19.8 */
+        uint32  reason;                 /* CPU opcode */
+
+                                        /* T19.9 */
+        uint32  outer_pri:3,            /* Outer priority */
+                outer_cfi:1,            /* Outer Canoncial Format Indicator */
+                outer_vid:12,           /* Outer VLAN ID */
+                :2,                     /* Reserved */
+                regen_crc:1,            /* Packet modified and needs new CRC */
+                decap_tunnel_type:4,    /* Tunnel type that was decapsulated */
+                chg_tos:1,              /* DSCP has been changed by HW */
+                dscp:8;                 /* New DSCP */
+
+                                        /* T19.10 */
+        uint32  timestamp;              /* Timestamp */
+
+                                        /* T19.11 */
+        uint32  :4,                     /* Reserved */
+                vfi:12,                 /* Internal VFI value */
+                shaping_cos_sel:2,      /* Shaping COS Select */
+                vlan_cos:5,             /* VLAN COS */
+                higig_cos:5,            /* Higig COS */
+                cos:4;                  /* COS */
+
+                                        /* T19.12 */
+        uint32  :5,                     /* Reserved */
+                bpdu:1,                 /* BPDU Packet */
+                do_not_change_ttl:1,    /* Do not change TTL */
+                emirror:1,              /* Egress Mirroring */
+                imirror:1,              /* Ingress Mirroring */
+		replicated:1,           /* Replicated copy */
+		l3only:1,               /* L3 only IPMC packet */
+                l3routed:1,             /* Any IP routed packet */
+                src_hg:1,               /* Source is Higig */
+                hg_type:1,              /* 0: Higig+, 1: Higig2 */
+                switch_pkt:1,           /* Switched packet */
+                service_tag:1,          /* SD tag present */
+                itag_action:2,          /* Ingress Inner tag action */
+                otag_action:2,          /* Ingress Outer tag action */
+                itag_status:2,          /* Ingress incoming tag status */
+                hgi:2,                  /* Higig Interface Format Indicator */
+                srcport:8;              /* Source port number */
+
+                                        /* T19.13 */
+        uint32  :2,                     /* Reserved */
+                eh_queue_tag:16,        /* Extended Higig queue tag */
+                eh_tm:1,                /* Extended Higig traffic manager ctrl */
+                eh_tag_type:2,          /* Extended Higig tag type */
+                eh_tbl_idx:2,           /* Extended Higig table select */
+                oam_pkt:1,              /* OAM packet */
+                egr_cpu_copy:1,         /* True egress copy-to-CPU */
+                true_egr_mirror:1,      /* True egress mirrored */
+                orig_dstport:6;         /* Original dst port (EP redirection) */
+
+                                        /* T19.14 */
+        uint32  :8,                     /* Reserved */
+                match_rule:8,           /* Matched FP rule */
+                :1,                     /* Reserved */
+                l3_intf:15;             /* L3 Intf num / Next hop idx */
+ 
+                                         /* T19.15: DMA Status 0 */
+        uint32  done:1,                  /* Descriptor Done */
+                dc:10,                   /* Don't Care */
+                status_read_ecc_error:1, /* 2 bit ECC error while reading Status
+                                            from RX Status Buffers. */
+                pktdata_read_ecc_error:1,/* 2 bit ECC error while reading packet
+                                            data from RX data Buffers.*/
+                error:1,                 /* Cell Error (RX) */
+                start:1,                 /* Start bit (RX) */
+                end:1,                   /* End bit (RX) */
+                count:16;                /* Transferred byte count */
+#endif
+} dcb19_t;
+
+#endif
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type23.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type23.h
new file mode 100644
index 000000000..4edcfbe62
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type23.h
@@ -0,0 +1,298 @@
+/*
+ * $Id: type23.h,v 1.6 Broadcom SDK $
+ * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * 
+ * Permission is granted to use, copy, modify and/or distribute this
+ * software under either one of the licenses below.
+ * 
+ * License Option 1: GPL
+ * 
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License, version 2, as
+ * published by the Free Software Foundation (the "GPL").
+ * 
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License version 2 (GPLv2) for more details.
+ * 
+ * You should have received a copy of the GNU General Public License
+ * version 2 (GPLv2) along with this source code.
+ * 
+ * 
+ * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
+ * 
+ * This software is governed by the Broadcom Open Network Switch APIs license:
+ * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+ * 
+ *
+ * File:        soc/shared/dcbformats/type23.h
+ * Purpose:     Define dma control block (DCB) format for a type23 DCB
+ *              used by the 56640 (Triumph3/Firebolt4)
+ *
+ *              This file is shared between the SDK and the embedded applications.
+ */
+
+#ifndef _SOC_SHARED_DCBFORMATS_TYPE23_H
+#define _SOC_SHARED_DCBFORMATS_TYPE23_H
+
+/*
+ * DMA Control Block - Type 23
+ * Used on 56640 devices
+ * 16 words
+ */
+typedef struct {
+        uint32  addr;                   /* T23.0: physical address */
+                                        /* T23.1: Control 0 */
+#ifdef  LE_HOST
+        uint32  c_count:16,             /* Requested byte count */
+                c_chain:1,              /* Chaining */
+                c_sg:1,                 /* Scatter Gather */
+                c_reload:1,             /* Reload */
+                c_hg:1,                 /* Higig (TX) */
+                c_stat:1,               /* Update stats (TX) */
+                c_pause:1,              /* Pause packet (TX) */
+                c_purge:1,              /* Purge packet (TX) */
+                :9;                     /* Don't care */
+#else
+        uint32  :9,                     /* Don't care */
+                c_purge:1,              /* Purge packet (TX) */
+                c_pause:1,              /* Pause packet (TX) */
+                c_stat:1,               /* Update stats (TX) */
+                c_hg:1,                 /* Higig (TX) */
+                c_reload:1,             /* Reload */
+                c_sg:1,                 /* Scatter Gather */
+                c_chain:1,              /* Chaining */
+                c_count:16;             /* Requested byte count */
+#endif  /* LE_HOST */
+        uint32  reason_hi;              /* T23.2: CPU opcode (hi bits) */
+        uint32  reason;                 /* T23.3: CPU opcode (low bits) */
+#ifdef  LE_HOST
+    union {                             /* T23.4 */
+        struct {
+            uint32  queue_num:16,       /* Queue number for CPU packets */
+                    outer_vid:12,       /* Outer VLAN ID */
+                    cpu_opcode_type:4;  /* CPU opcode type */
+        } overlay1;
+        struct {
+            uint32  cpu_cos:6,          /* CPU COS */
+                    :26;                /* Reserved */
+        } overlay2;
+    } word4;
+
+                                        /* T23.5 */
+        uint32  srcport:8,              /* Source port number */
+                pkt_len:14,             /* Packet length */
+                match_rule:8,           /* Matched FP rule */
+                hgi:2;                  /* Higig Interface Format Indicator */
+#else
+    union {                             /* T23.4 */
+        struct {
+            uint32  cpu_opcode_type:4,  /* CPU opcode type */
+                    outer_vid:12,       /* Outer VLAN ID */
+                    queue_num:16;       /* Queue number for CPU packets */
+        } overlay1;
+        struct {
+            uint32  :26,                /* Reserved */
+                    cpu_cos:6;          /* CPU COS */
+        } overlay2;
+    } word4;
+
+                                        /* T23.5 */
+        uint32  hgi:2,                  /* Higig Interface Format Indicator */
+                match_rule:8,           /* Matched FP rule */
+                pkt_len:14,             /* Packet length */
+                srcport:8;              /* Source port number */
+#endif
+
+        uint32  mh0;                    /* T23.6: Module Header word 0 */
+        uint32  mh1;                    /* T23.7: Module Header word 1 */
+        uint32  mh2;                    /* T23.8: Module Header word 2 */
+        uint32  mh3;                    /* T23.9: Module Header word 3 */
+#ifdef  LE_HOST
+                                        /* T23.10 */
+        uint32  inner_pri:3,            /* Inner priority */
+                dvp_nhi_sel:1,          /* DVP overlay indicator */
+                regen_crc:1,            /* Packet modified and needs new CRC */
+                repl_nhi:19,            /* Replication or Next Hop index */
+                vfi_valid:1,            /* Validates VFI field */
+                :7;                     /* Reserved */
+
+    union {                             /* T23.11 */
+        struct {
+            uint32  dscp:6,             /* New DSCP (+ special pkt type:3) */
+                    chg_tos:1,          /* DSCP has been changed by HW */
+                    vntag_action:2,     /* VN tag action */
+                    outer_cfi:1,        /* Outer Canoncial Format Indicator */
+                    outer_pri:3,        /* Outer priority */
+                    decap_tunnel_type:5,/* Tunnel type that was decapsulated */
+                    inner_vid:12,       /* Inner VLAN ID */
+                    inner_cfi:1,        /* Inner Canoncial Format Indicator */
+                    :1;                 /* Reserved */
+        } overlay1;
+        struct {
+            uint32  special_pkt_type:3, /* Special packet type (OAM, BFD) */
+                    :29;                /* Reserved */
+        } overlay2;
+    } word11;
+
+    union {                             /* T23.12 */
+        struct {
+            uint32  timestamp;          /* Timestamp */
+        } overlay1;
+        struct {
+            uint32  vfi:14,             /* VFI or FID */
+                    :18;                /* Reserved */
+        } overlay2;
+    } word12;
+
+                                        /* T23.13 */
+        uint32  itag_status:2,          /* Ingress Inner tag status */
+                otag_action:2,          /* Ingress Outer tag action */
+                itag_action:2,          /* Ingress Inner tag action */
+                service_tag:1,          /* SD tag present */
+                switch_pkt:1,           /* Switched packet */
+                all_switch_drop:1,      /* All switched copies dropped */
+                hg_type:1,              /* 0: Higig+, 1: Higig2 */
+                src_hg:1,               /* Source is Higig */
+                l3routed:1,             /* Any IP routed packet */
+                l3only:1,               /* L3 only IPMC packet */
+                replicated:1,           /* Replicated copy */
+                hg2_ext_hdr:1,          /* Extended Higig2 header valid */
+                special_pkt:1,          /* Special Packet indicator */
+                do_not_change_ttl:1,    /* Do not change TTL */
+                bpdu:1,                 /* BPDU Packet */
+                timestamp_type:2,       /* Timestamp type */
+                loopback_pkt_type:4,    /* Loopback packet type */
+                mtp_index:5,            /* MTP index */
+                ecn:2,                  /* New ECN value */
+                chg_ecn:1;              /* ECN changed */
+
+    union {                             /* T23.14 */
+        struct {
+            uint32  timestamp_hi;       /* Timestamp upper bits */
+        } overlay1;
+        struct {
+            uint32  eh_seg_sel:3,       /* HG2 EH seg sel */
+                    eh_tag_type:2,      /* HG2 EH tag type */
+                    eh_tm:1,            /* HG2 EH tm */
+                    eh_queue_tag: 16,   /* HG2 EH queue tag */                
+                    eh_tag_reserved:10; /* Reserved */
+        } overlay2;
+        struct {
+            uint32  rx_bfd_session_index:11,    /* Rx BFD pkt session ID */
+                    rx_bfd_start_offset_type:2, /* Rx BFD pkt st offset type */
+                    rx_bfd_start_offset:8,      /* Rx BFD pkt start offset */
+                   :11;                        /* Reserved */
+        } overlay3;
+    } word14;
+
+                                         /* T23.15: DMA Status 0 */
+        uint32  count:16,                /* Transferred byte count */
+                end:1,                   /* End bit (RX) */
+                start:1,                 /* Start bit (RX) */
+                error:1,                 /* Cell Error (RX) */
+                pktdata_read_ecc_error:1,/* 2 bit ECC error while reading packet
+                                            data from RX data Buffers.*/
+                status_read_ecc_error:1, /* 2 bit ECC error while reading Status
+                                            from RX Status Buffers.*/
+                :10,                     /* Reserved */
+                done:1;                  /* Descriptor Done */
+#else
+                                        /* T23.10 */
+        uint32  :7,                     /* Reserved */
+                vfi_valid:1,            /* Validates VFI field */
+                repl_nhi:19,            /* Replication or Next Hop index */
+                regen_crc:1,            /* Packet modified and needs new CRC */
+                dvp_nhi_sel:1,          /* DVP overlay indicator */
+                inner_pri:3;            /* Inner priority */
+
+    union {                             /* T23.11 */
+        struct {
+            uint32  :1,                 /* Reserved */
+                    inner_cfi:1,        /* Inner Canoncial Format Indicator */
+                    inner_vid:12,       /* Inner VLAN ID */
+                    decap_tunnel_type:5,/* Tunnel type that was decapsulated */
+                    outer_pri:3,        /* Outer priority */
+                    outer_cfi:1,        /* Outer Canoncial Format Indicator */
+                    vntag_action:2,     /* VN tag action */
+                    chg_tos:1,          /* DSCP has been changed by HW */
+                    dscp:6;             /* New DSCP (+ special pkt type:3) */
+        } overlay1;
+        struct {
+            uint32  :29,                /* Reserved */
+                    special_pkt_type:3; /* Special packet type (OAM, BFD) */
+        } overlay2;
+    } word11;
+
+    union {                             /* T23.12 */
+        struct {
+            uint32  timestamp;          /* Timestamp */
+        } overlay1;
+        struct {
+            uint32  :18,                /* Reserved */
+                    vfi:14;             /* VFI or FID */
+        } overlay2;
+    } word12;
+
+                                        /* T23.13 */
+        uint32  chg_ecn:1,              /* ECN changed */
+                ecn:2,                  /* New ECN value */
+                mtp_index:5,            /* MTP index */
+                loopback_pkt_type:4,    /* Loopback packet type */
+                timestamp_type:2,       /* Timestamp type */
+                bpdu:1,                 /* BPDU Packet */
+                do_not_change_ttl:1,    /* Do not change TTL */
+                special_pkt:1,          /* Special Packet indicator */
+                hg2_ext_hdr:1,          /* Extended Higig2 header valid */
+                replicated:1,           /* Replicated copy */
+                l3only:1,               /* L3 only IPMC packet */
+                l3routed:1,             /* Any IP routed packet */
+                src_hg:1,               /* Source is Higig */
+                hg_type:1,              /* 0: Higig+, 1: Higig2 */
+                all_switch_drop:1,      /* All switched copies dropped */
+                switch_pkt:1,           /* Switched packet */
+                service_tag:1,          /* SD tag present */
+                itag_action:2,          /* Ingress Inner tag action */
+                otag_action:2,          /* Ingress Outer tag action */
+                itag_status:2;          /* Ingress Inner tag status */
+
+    union {                             /* T23.14 */
+        struct {
+            uint32  timestamp_hi;       /* Timestamp upper bits */
+        } overlay1;
+        struct {
+            uint32  eh_tag_reserved:10, /* Reserved */
+                    eh_queue_tag: 16,   /* HG2 EH queue tag */
+                    eh_tm:1,            /* HG2 EH tm */
+                    eh_tag_type:2,      /* HG2 EH tag type */
+                    eh_seg_sel:3;       /* HG2 EH seg sel */
+        } overlay2;
+        struct {
+            uint32  :11,                        /* Reserved */
+                    rx_bfd_start_offset:8,      /* Rx BFD pkt start offset */
+                    rx_bfd_start_offset_type:2, /* Rx BFD pkt st offset type */
+                    rx_bfd_session_index:11;    /* Rx BFD pkt session ID */
+        } overlay3;
+    } word14;
+
+                                         /* T23.15: DMA Status 0 */
+        uint32  done:1,                  /* Descriptor Done */
+                :10,                     /* Reserved */
+                status_read_ecc_error:1, /* 2 bit ECC error while reading Status
+                                            from RX Status Buffers. */
+                pktdata_read_ecc_error:1,/* 2 bit ECC error while reading packet
+                                            data from RX data Buffers.*/
+                error:1,                 /* Cell Error (RX) */
+                start:1,                 /* Start bit (RX) */
+                end:1,                   /* End bit (RX) */
+                count:16;                /* Transferred byte count */
+#endif
+} dcb23_t;
+
+#define SOC_CPU_OPCODE_TYPE_IP_0        0
+#define SOC_CPU_OPCODE_TYPE_IP_1        1
+#define SOC_CPU_OPCODE_TYPE_EP          2
+#define SOC_CPU_OPCODE_TYPE_NLF         3
+
+#endif
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type24.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type24.h
new file mode 100644
index 000000000..52667f664
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type24.h
@@ -0,0 +1,280 @@
+/*
+ * $Id: type24.h,v 1.3 Broadcom SDK $
+ * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * 
+ * Permission is granted to use, copy, modify and/or distribute this
+ * software under either one of the licenses below.
+ * 
+ * License Option 1: GPL
+ * 
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License, version 2, as
+ * published by the Free Software Foundation (the "GPL").
+ * 
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License version 2 (GPLv2) for more details.
+ * 
+ * You should have received a copy of the GNU General Public License
+ * version 2 (GPLv2) along with this source code.
+ * 
+ * 
+ * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
+ * 
+ * This software is governed by the Broadcom Open Network Switch APIs license:
+ * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+ * 
+ *
+ * File:        soc/shared/dcbformats/type24.h
+ * Purpose:     Define dma control block (DCB) format for a type24 DCB
+ *              used by the 56440 (Katana)
+ *
+ *              This file is shared between the SDK and the embedded applications.
+ */
+
+#ifndef _SOC_SHARED_DCBFORMATS_TYPE24_H
+#define _SOC_SHARED_DCBFORMATS_TYPE24_H
+
+/*
+ * DMA Control Block - Type 24
+ * Used on 56440 devices
+ * 16 words
+ */
+typedef struct {
+        uint32  addr;                   /* T24.0: physical address */
+                                        /* T24.1: Control 0 */
+#ifdef  LE_HOST
+        uint32  c_count:16,             /* Requested byte count */
+                c_chain:1,              /* Chaining */
+                c_sg:1,                 /* Scatter Gather */
+                c_reload:1,             /* Reload */
+                c_hg:1,                 /* Higig (TX) */
+                c_stat:1,               /* Update stats (TX) */
+                c_pause:1,              /* Pause packet (TX) */
+                c_purge:1,              /* Purge packet (TX) */
+                :9;                     /* Don't care */
+#else
+        uint32  :9,                     /* Don't care */
+                c_purge:1,              /* Purge packet (TX) */
+                c_pause:1,              /* Pause packet (TX) */
+                c_stat:1,               /* Update stats (TX) */
+                c_hg:1,                 /* Higig (TX) */
+                c_reload:1,             /* Reload */
+                c_sg:1,                 /* Scatter Gather */
+                c_chain:1,              /* Chaining */
+                c_count:16;             /* Requested byte count */
+#endif  /* LE_HOST */
+        uint32  reason_hi;              /* T24.2: CPU opcode (hi bits) */
+        uint32  reason;                 /* T24.3: CPU opcode (low bits) */
+#ifdef  LE_HOST
+    union {                             /* T24.4 */
+        struct {
+            uint32  queue_num:16,       /* Queue number for CPU packets */
+                    :4,                 /* Reserved */
+                    outer_vid:12;       /* Outer VLAN ID */
+        } overlay1;
+        struct {
+            uint32  cpu_cos:6,          /* CPU COS */
+                    :26;                /* Reserved */
+        } overlay2;
+    } word4;
+
+                                        /* T24.5 */
+        uint32  srcport:8,              /* Source port number */
+                pkt_len:14,             /* Packet length */
+                match_rule:8,           /* Matched FP rule */
+                hgi:2;                  /* Higig Interface Format Indicator */
+#else
+    union {                             /* T24.4 */
+        struct {
+            uint32  outer_vid:12,       /* Outer VLAN ID */
+                    :4,                 /* Reserved */
+                    queue_num:16;       /* Queue number for CPU packets */
+        } overlay1;
+        struct {
+            uint32  :26,                /* Reserved */
+                    cpu_cos:6;          /* CPU COS */
+        } overlay2;
+    } word4;
+
+                                        /* T24.5 */
+        uint32  hgi:2,                  /* Higig Interface Format Indicator */
+                match_rule:8,           /* Matched FP rule */
+                pkt_len:14,             /* Packet length */
+                srcport:8;              /* Source port number */
+#endif
+
+        uint32  mh0;                    /* T24.6: Module Header word 0 */
+        uint32  mh1;                    /* T24.7: Module Header word 1 */
+        uint32  mh2;                    /* T24.8: Module Header word 2 */
+        uint32  mh3;                    /* T24.9: Module Header word 3 */
+#ifdef  LE_HOST
+                                        /* T24.10 */
+        uint32  inner_pri:3,            /* Inner priority */
+                :1,                     /* Reserved */
+                regen_crc:1,            /* Packet modified and needs new CRC */
+                repl_nhi:19,            /* Replication or Next Hop index */
+                vfi_valid:1,            /* Validates VFI field */
+                :7;                     /* Reserved */
+
+    union {                             /* T24.11 */
+        struct {
+            uint32  dscp:6,             /* New DSCP (+ oam pkt type:3) */
+                    chg_tos:1,          /* DSCP has been changed by HW */
+                    vntag_action:2,     /* VN tag action */
+                    outer_cfi:1,        /* Outer Canoncial Format Indicator */
+                    outer_pri:3,        /* Outer priority */
+                    decap_tunnel_type:5,/* Tunnel type that was decapsulated */
+                    inner_vid:12,       /* Inner VLAN ID */
+                    inner_cfi:1,        /* Inner Canoncial Format Indicator */
+                    :1;                 /* Reserved */
+        } overlay1;
+        struct {
+            uint32  special_pkt_type:3, /* Special packet type (OAM, BFD) */
+                    :29;                /* Reserved */
+        } overlay2;
+    } word11;
+
+                                        /* T24.12 */
+        uint32  timestamp;              /* Timestamp (+ VFI:14) */
+
+                                        /* T24.13 */
+        uint32  itag_status:2,          /* Ingress Inner tag status */
+                otag_action:2,          /* Ingress Outer tag action */
+                itag_action:2,          /* Ingress Inner tag action */
+                service_tag:1,          /* SD tag present */
+                switch_pkt:1,           /* Switched packet */
+                all_switch_drop:1,      /* All switched copies dropped */
+                hg_type:1,              /* 0: Higig+, 1: Higig2 */
+                src_hg:1,               /* Source is Higig */
+                l3routed:1,             /* Any IP routed packet */
+                l3only:1,               /* L3 only IPMC packet */
+                replicated:1,           /* Replicated copy */
+                hg2_ext_hdr:1,          /* Extended Higig2 header valid */
+                oam_pkt:1,              /* OAM Packet indicator */
+                do_not_change_ttl:1,    /* Do not change TTL */
+                bpdu:1,                 /* BPDU Packet */
+                timestamp_type:2,       /* Timestamp type */
+                loopback_pkt_type:4,    /* Loopback packet type */
+                mtp_index:5,            /* MTP index */
+                ecn:2,                  /* New ECN value */
+                chg_ecn:1;              /* ECN changed */
+
+    union {                             /* T24.14 */
+        struct {
+            uint32  timestamp_hi;       /* Timestamp upper bits */
+        } overlay1;
+        struct {
+            uint32  eh_seg_sel:3,       /* HG2 EH seg sel */
+                    eh_tag_type:2,      /* HG2 EH tag type */
+                    eh_tm:1,            /* HG2 EH tm */
+                    eh_queue_tag: 16,   /* HG2 EH queue tag */                
+                    eh_tag_reserved:10; /* Reserved */
+        } overlay2;
+        struct {
+            uint32  rx_bfd_session_index:11,    /* Rx BFD pkt session ID */
+                    rx_bfd_start_offset_type:2, /* Rx BFD pkt st offset type */
+                    rx_bfd_start_offset:8,      /* Rx BFD pkt start offset */
+                   :11;                        /* Reserved */
+        } overlay3;
+    } word14;
+
+                                         /* T24.15: DMA Status 0 */
+        uint32  count:16,                /* Transferred byte count */
+                end:1,                   /* End bit (RX) */
+                start:1,                 /* Start bit (RX) */
+                error:1,                 /* Cell Error (RX) */
+                pktdata_read_ecc_error:1,/* 2 bit ECC error while reading packet
+                                            data from RX data Buffers.*/
+                status_read_ecc_error:1, /* 2 bit ECC error while reading Status
+                                            from RX Status Buffers.*/
+                :10,                     /* Reserved */
+                done:1;                  /* Descriptor Done */
+#else
+                                        /* T24.10 */
+        uint32  :7,                     /* Reserved */
+                vfi_valid:1,            /* Validates VFI field */
+                repl_nhi:19,            /* Replication or Next Hop index */
+                regen_crc:1,            /* Packet modified and needs new CRC */
+                :1,                     /* Reserved */
+                inner_pri:3;            /* Inner priority */
+
+
+    union {                             /* T24.11 */
+        struct {
+            uint32  :1,                 /* Reserved */
+                    inner_cfi:1,        /* Inner Canoncial Format Indicator */
+                    inner_vid:12,       /* Inner VLAN ID */
+                    decap_tunnel_type:5,/* Tunnel type that was decapsulated */
+                    outer_pri:3,        /* Outer priority */
+                    outer_cfi:1,        /* Outer Canoncial Format Indicator */
+                    vntag_action:2,     /* VN tag action */
+                    chg_tos:1,          /* DSCP has been changed by HW */
+                    dscp:6;             /* New DSCP (+ oam pkt type:3) */
+        } overlay1;
+        struct {
+            uint32  :29,                /* Reserved */
+                    special_pkt_type:3; /* Special packet type (OAM, BFD) */
+        } overlay2;
+    } word11;
+
+                                        /* T24.12 */
+        uint32  timestamp;              /* Timestamp (+ VFI:14) */
+
+                                        /* T24.13 */
+        uint32  chg_ecn:1,              /* ECN changed */
+                ecn:2,                  /* New ECN value */
+                mtp_index:5,            /* MTP index */
+                loopback_pkt_type:4,    /* Loopback packet type */
+                timestamp_type:2,       /* Timestamp type */
+                bpdu:1,                 /* BPDU Packet */
+                do_not_change_ttl:1,    /* Do not change TTL */
+                oam_pkt:1,              /* OAM Packet indicator */
+                hg2_ext_hdr:1,          /* Extended Higig2 header valid */
+                replicated:1,           /* Replicated copy */
+                l3only:1,               /* L3 only IPMC packet */
+                l3routed:1,             /* Any IP routed packet */
+                src_hg:1,               /* Source is Higig */
+                hg_type:1,              /* 0: Higig+, 1: Higig2 */
+                all_switch_drop:1,      /* All switched copies dropped */
+                switch_pkt:1,           /* Switched packet */
+                service_tag:1,          /* SD tag present */
+                itag_action:2,          /* Ingress Inner tag action */
+                otag_action:2,          /* Ingress Outer tag action */
+                itag_status:2;          /* Ingress Inner tag status */
+
+    union {                             /* T24.14 */
+        struct {
+            uint32  timestamp_hi;       /* Timestamp upper bits */
+        } overlay1;
+        struct {
+            uint32  eh_tag_reserved:10, /* Reserved */
+                    eh_queue_tag: 16,   /* HG2 EH queue tag */
+                    eh_tm:1,            /* HG2 EH tm */
+                    eh_tag_type:2,      /* HG2 EH tag type */
+                    eh_seg_sel:3;       /* HG2 EH seg sel */
+        } overlay2;
+        struct {
+            uint32  :11,                        /* Reserved */
+                    rx_bfd_start_offset:8,      /* Rx BFD pkt start offset */
+                    rx_bfd_start_offset_type:2, /* Rx BFD pkt st offset type */
+                    rx_bfd_session_index:11;    /* Rx BFD pkt session ID */
+        } overlay3;
+    } word14;
+
+                                         /* T24.15: DMA Status 0 */
+        uint32  done:1,                  /* Descriptor Done */
+                :10,                     /* Reserved */
+                status_read_ecc_error:1, /* 2 bit ECC error while reading Status
+                                            from RX Status Buffers. */
+                pktdata_read_ecc_error:1,/* 2 bit ECC error while reading packet
+                                            data from RX data Buffers.*/
+                error:1,                 /* Cell Error (RX) */
+                start:1,                 /* Start bit (RX) */
+                end:1,                   /* End bit (RX) */
+                count:16;                /* Transferred byte count */
+#endif
+} dcb24_t;
+#endif
+
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type26.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type26.h
new file mode 100644
index 000000000..2d9d70156
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type26.h
@@ -0,0 +1,335 @@
+/*
+ * $Id: type26.h,v 1.5 Broadcom SDK $
+ * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * 
+ * Permission is granted to use, copy, modify and/or distribute this
+ * software under either one of the licenses below.
+ * 
+ * License Option 1: GPL
+ * 
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License, version 2, as
+ * published by the Free Software Foundation (the "GPL").
+ * 
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License version 2 (GPLv2) for more details.
+ * 
+ * You should have received a copy of the GNU General Public License
+ * version 2 (GPLv2) along with this source code.
+ * 
+ * 
+ * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
+ * 
+ * This software is governed by the Broadcom Open Network Switch APIs license:
+ * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+ * 
+ *
+ * File:        soc/shared/dcbformats/type26.h
+ * Purpose:     Define dma control block (DCB) format for a type26 DCB
+ *              used by the 56850 (Trident2)
+ *
+ *              This file is shared between the SDK and the embedded applications.
+ */
+
+#ifndef _SOC_SHARED_DCBFORMATS_TYPE26_H
+#define _SOC_SHARED_DCBFORMATS_TYPE26_H
+
+/*
+ * DMA Control Block - Type 26
+ * Used on 56850 devices
+ * 16 words
+ */
+typedef struct {
+    uint32  addr;                       /* T26.0: physical address */
+                                        /* T26.1: Control 0 */
+#ifdef  LE_HOST
+    uint32  c_count:16,                 /* Requested byte count */
+            c_chain:1,                  /* Chaining */
+            c_sg:1,                     /* Scatter Gather */
+            c_reload:1,                 /* Reload */
+            c_hg:1,                     /* Higig (TX) */
+            c_stat:1,                   /* Update stats (TX) */
+            c_pause:1,                  /* Pause packet (TX) */
+            c_purge:1,                  /* Purge packet (TX) */
+            :9;                         /* Don't care */
+#else
+    uint32  :9,                         /* Don't care */
+            c_purge:1,                  /* Purge packet (TX) */
+            c_pause:1,                  /* Pause packet (TX) */
+            c_stat:1,                   /* Update stats (TX) */
+            c_hg:1,                     /* Higig (TX) */
+            c_reload:1,                 /* Reload */
+            c_sg:1,                     /* Scatter Gather */
+            c_chain:1,                  /* Chaining */
+            c_count:16;                 /* Requested byte count */
+#endif  /* LE_HOST */
+
+                                        /* T26.2 (word 12 in EP_TO_CPU_HDR) */
+    uint32  reason_hi;                  /* CPU opcode (hi bits) */
+                                        /* T26.3 (word 11 in EP_TO_CPU_HDR) */
+    uint32  reason;                     /* CPU opcode (low bits) */
+
+#ifdef  LE_HOST
+    union {                             /* T26.4 (word 10 in EP_TO_CPU_HDR) */
+        struct {
+            uint32  queue_num:12,       /* Queue number for CPU packets */
+                    :4,                 /* Reserved */
+                    outer_vid:12,       /* Outer VLAN ID */
+                    cpu_opcode_type:4;  /* CPU opcode type */
+        } overlay1;
+        struct {
+            uint32  cpu_cos:6,          /* CPU COS */
+                    :10,                /* Reserved */
+                    outer_vid:12,       /* Outer VLAN ID */
+                    cpu_opcode_type:4;  /* CPU opcode type */
+        } overlay2;
+    } word4;
+
+                                        /* T26.5 (word 9 in EP_TO_CPU_HDR) */
+    uint32  srcport:7,                  /* Source port number */
+            :1,                         /* Reserved */
+            pkt_len:14,                 /* Packet length */
+            match_rule:8,               /* Matched FP rule */
+            hgi:2;                      /* Higig Interface Format Indicator */
+#else
+    union {                             /* T26.4 (word 10 in EP_TO_CPU_HDR) */
+        struct {
+            uint32  cpu_opcode_type:4,  /* CPU opcode type */
+                    outer_vid:12,       /* Outer VLAN ID */
+                    :4,                 /* Reserved */
+                    queue_num:12;       /* Queue number for CPU packets */
+        } overlay1;
+        struct {
+            uint32  cpu_opcode_type:4,  /* CPU opcode type */
+                    outer_vid:12,       /* Outer VLAN ID */
+                    :10,                /* Reserved */
+                    cpu_cos:6;          /* CPU COS */
+        } overlay2;
+    } word4;
+
+                                        /* T26.5 (word 9 in EP_TO_CPU_HDR) */
+    uint32  hgi:2,                      /* Higig Interface Format Indicator */
+            match_rule:8,               /* Matched FP rule */
+            pkt_len:14,                 /* Packet length */
+            :1,                         /* Reserved */
+            srcport:7;                  /* Source port number */
+#endif
+
+                                        /* T26.6 (word 8 in EP_TO_CPU_HDR) */
+    uint32  mh0;                        /* Module Header word 0 */
+                                        /* T26.7 (word 7 in EP_TO_CPU_HDR) */
+    uint32  mh1;                        /* Module Header word 1 */
+                                        /* T26.8 (word 6 in EP_TO_CPU_HDR) */
+    uint32  mh2;                        /* Module Header word 2 */
+                                        /* T26.9 (word 5 in EP_TO_CPU_HDR) */
+    uint32  mh3;                        /* Module Header word 3 */
+
+#ifdef  LE_HOST
+                                        /* T26.10 (word 4 in EP_TO_CPU_HDR) */
+    uint32  inner_pri:3,                /* Inner priority */
+            dvp_nhi_sel:1,              /* DVP overlay indicator */
+            regen_crc:1,                /* Packet modified and needs new CRC */
+            repl_nhi:17,                /* Replication or Next Hop index */
+            :2,                         /* Reserved */
+            vfi_valid:1,                /* Validates VFI field */
+            :7;                         /* Reserved */
+
+    union {                             /* T26.11 (word 3 in EP_TO_CPU_HDR) */
+        struct {
+            uint32  dscp:6,             /* New DSCP */
+                    chg_tos:1,          /* DSCP has been changed by HW */
+                    vntag_action:2,     /* VN tag action */
+                    outer_cfi:1,        /* Outer Canoncial Format Indicator */
+                    outer_pri:3,        /* Outer priority */
+                    decap_tunnel_type:4,/* Tunnel type that was decapsulated */
+                    :1,                 /* Reserved */
+                    inner_vid:12,       /* Inner VLAN ID */
+                    inner_cfi:1,        /* Inner Canoncial Format Indicator */
+                    mcq:1;              /* Multicast queue */
+        } overlay1;
+        struct {
+            uint32  special_pkt_type:3, /* Special packet type (OAM, BFD) */
+                    :29;                /* Reserved */
+        } overlay2;
+    } word11;
+
+#else
+                                        /* T26.10 (word 4 in EP_TO_CPU_HDR) */
+    uint32  :7,                         /* Reserved */
+            vfi_valid:1,                /* Validates VFI field */
+            :2,                         /* Reserved */
+            repl_nhi:17,                /* Replication or Next Hop index */
+            regen_crc:1,                /* Packet modified and needs new CRC */
+            dvp_nhi_sel:1,              /* DVP overlay indicator */
+            inner_pri:3;                /* Inner priority */
+
+    union {                             /* T26.11 (word 3 in EP_TO_CPU_HDR) */
+        struct {
+            uint32  mcq:1,              /* Multicast queue */
+                    inner_cfi:1,        /* Inner Canoncial Format Indicator */
+                    inner_vid:12,       /* Inner VLAN ID */
+                    :1,                 /* Reserved */
+                    decap_tunnel_type:4,/* Tunnel type that was decapsulated */
+                    outer_pri:3,        /* Outer priority */
+                    outer_cfi:1,        /* Outer Canoncial Format Indicator */
+                    vntag_action:2,     /* VN tag action */
+                    chg_tos:1,          /* DSCP has been changed by HW */
+                    dscp:6;             /* New DSCP */
+        } overlay1;
+        struct {
+            uint32  :29,                /* Reserved */
+                    special_pkt_type:3; /* Special packet type (OAM, BFD) */
+        } overlay2;
+    } word11;
+
+#endif
+                                        /* T26.12 (word 2 in EP_TO_CPU_HDR) */
+    uint32  timestamp;                  /* Timestamp */
+
+#ifdef  LE_HOST
+                                        /* T26.13 (word 1 in EP_TO_CPU_HDR) */
+    uint32  tag_status:2,               /* Ingress incoming tag status */
+            otag_action:2,              /* Ingress outer tag action */
+            itag_action:2,              /* Ingress inner tag action */
+            service_tag:1,              /* SD tag present */
+            switch_pkt:1,               /* Switched packet */
+            all_switch_drop:1,          /* All switched copies dropped */
+            hg_type:1,                  /* 0: Higig+, 1: Higig2 */
+            src_hg:1,                   /* Source is Higig */
+            l3routed:1,                 /* Any IP routed packet */
+            l3only:1,                   /* L3 only IPMC packet */
+            replicated:1,               /* Replicated copy */
+            hg2_ext_hdr:1,              /* Extended Higig2 header valid */
+            special_pkt:1,              /* Special Packet indicator */
+            do_not_change_ttl:1,        /* Do not change TTL */
+            bpdu:1,                     /* BPDU Packet */
+            timestamp_type:2,           /* Timestamp type */
+            loopback_pkt_type:3,        /* Loopback packet type */
+            :1,                         /* Reserved */
+            mtp_index:5,                /* MTP index */
+            ecn:2,                      /* New ECN value */
+            chg_ecn:1;                  /* ECN changed */
+
+    union {                             /* T26.14 (word 0 in EP_TO_CPU_HDR) */
+        uint32  timestamp_hi;           /* Timestamp upper bits */
+        struct {                        /* EH_TYPE_0 */
+            uint32  eh_queue_tag:16,
+                    :3,
+                    eh_tag_type:2,
+                    eh_seg_sel:3,
+                    :3,
+                    os1588_done:1,
+                    eh_type:4;
+        } overlay1;
+        struct {                        /* EH_TYPE_1 */
+            uint32  classid: 9,
+                    l3_iif:14,
+                    classid_type:4,
+                    os1588_done:1,
+                    eh_type:4;
+        } overlay2;
+        struct {                        /* EH_TYPE 2 */
+            uint32  eh_queue_tag: 14,
+                    classid:9,
+                    classid_type:4,
+                    os1588_done:1,
+                    eh_type:4;
+        } overlay3;
+        struct {
+            uint32  rx_bfd_session_index:12,    /* Rx BFD pkt session ID */
+                    rx_bfd_start_offset_type:2, /* Rx BFD pkt st offset type */
+                    rx_bfd_start_offset:8,      /* Rx BFD pkt start offset */
+                    :10;                        /* Reserved */
+        } overlay4;
+    } word14;
+
+                                        /* T26.15: DMA Status 0 */
+    uint32  count:16,                   /* Transferred byte count */
+            end:1,                      /* End bit (RX) */
+            start:1,                    /* Start bit (RX) */
+            error:1,                    /* Cell Error (RX) */
+            pktdata_read_ecc_error:1,   /* 2 bit ECC error while reading packet
+                                           data from RX data Buffers.*/
+            status_read_ecc_error:1,    /* 2 bit ECC error while reading Status
+                                           from RX Status Buffers.*/
+            :10,                        /* Reserved */
+            done:1;                     /* Descriptor Done */
+#else
+                                        /* T26.13 (word 1 in EP_TO_CPU_HDR) */
+    uint32  chg_ecn:1,                  /* ECN changed */
+            ecn:2,                      /* New ECN value */
+            mtp_index:5,                /* MTP index */
+            :1,                         /* Reserved */
+            loopback_pkt_type:3,        /* Loopback packet type */
+            timestamp_type:2,           /* Timestamp type */
+            bpdu:1,                     /* BPDU Packet */
+            do_not_change_ttl:1,        /* Do not change TTL */
+            special_pkt:1,              /* Special Packet indicator */
+            hg2_ext_hdr:1,              /* Extended Higig2 header valid */
+            replicated:1,               /* Replicated copy */
+            l3only:1,                   /* L3 only IPMC packet */
+            l3routed:1,                 /* Any IP routed packet */
+            src_hg:1,                   /* Source is Higig */
+            hg_type:1,                  /* 0: Higig+, 1: Higig2 */
+            all_switch_drop:1,          /* All switched copies dropped */
+            switch_pkt:1,               /* Switched packet */
+            service_tag:1,              /* SD tag present */
+            itag_action:2,              /* Ingress inner tag action */
+            otag_action:2,              /* Ingress outer tag action */
+            tag_status:2;               /* Ingress incoming tag status */
+
+    union {                             /* T26.14 (word 0 in EP_TO_CPU_HDR) */
+        uint32  timestamp_hi;           /* Timestamp upper bits */
+        struct {                        /* EH_TYPE_0 */
+            uint32  eh_type:4,
+                    os1588_done:1,
+                    :3,
+                    eh_seg_sel:3,
+                    eh_tag_type:2,
+                    :3,
+                    eh_queue_tag:16;
+        } overlay1;
+        struct {                        /* EH_TYPE_1 */
+            uint32  eh_type:4,
+                    os1588_done:1,
+                    classid_type:4,
+                    l3_iif:14,
+                    classid: 9;
+        } overlay2;
+        struct {                        /* EH_TYPE 2 */
+            uint32  eh_type:4,
+                    os1588_done:1,
+                    classid_type:4,
+                    classid:9,
+                    eh_queue_tag:14;
+        } overlay3;
+        struct {
+            uint32  :10,                        /* Reserved */
+                    rx_bfd_start_offset:8,      /* Rx BFD pkt start offset */
+                    rx_bfd_start_offset_type:2, /* Rx BFD pkt st offset type */
+                    rx_bfd_session_index:12;    /* Rx BFD pkt session ID */
+        } overlay4;
+    } word14;
+
+                                        /* T26.15: DMA Status 0 */
+    uint32  done:1,                     /* Descriptor Done */
+            :10,                        /* Reserved */
+            status_read_ecc_error:1,    /* 2 bit ECC error while reading Status
+                                           from RX Status Buffers. */
+            pktdata_read_ecc_error:1,   /* 2 bit ECC error while reading packet
+                                           data from RX data Buffers.*/
+            error:1,                    /* Cell Error (RX) */
+            start:1,                    /* Start bit (RX) */
+            end:1,                      /* End bit (RX) */
+            count:16;                   /* Transferred byte count */
+#endif
+} dcb26_t;
+
+#define SOC_CPU_OPCODE_TYPE_IP_0        0
+#define SOC_CPU_OPCODE_TYPE_IP_1        1
+#define SOC_CPU_OPCODE_TYPE_EP          2
+#define SOC_CPU_OPCODE_TYPE_NLF         3
+
+#endif
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type29.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type29.h
new file mode 100644
index 000000000..723d36613
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type29.h
@@ -0,0 +1,339 @@
+/*
+ * $Id: type29.h,v 1.2 Broadcom SDK $
+ * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * 
+ * Permission is granted to use, copy, modify and/or distribute this
+ * software under either one of the licenses below.
+ * 
+ * License Option 1: GPL
+ * 
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License, version 2, as
+ * published by the Free Software Foundation (the "GPL").
+ * 
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License version 2 (GPLv2) for more details.
+ * 
+ * You should have received a copy of the GNU General Public License
+ * version 2 (GPLv2) along with this source code.
+ * 
+ * 
+ * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
+ * 
+ * This software is governed by the Broadcom Open Network Switch APIs license:
+ * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+ * 
+ *
+ * File:        soc/shared/dcbformats/type29.h
+ * Purpose:     Define dma control block (DCB) format for a type29 DCB
+ *              used by the 56450 (Katana-2)
+ *
+ *              This file is shared between the SDK and the embedded applications.
+ */
+
+#ifndef _SOC_SHARED_DCBFORMATS_TYPE29_H
+#define _SOC_SHARED_DCBFORMATS_TYPE29_H
+
+/*
+ * DMA Control Block - Type 29
+ * Used on 56450 devices
+ * 16 words
+ */
+typedef struct {
+        uint32  addr;                   /* T29.0: physical address */
+                                        /* T21.1: Control 0 */
+#ifdef  LE_HOST
+        uint32  c_count:16,             /* Requested byte count */
+                c_chain:1,              /* Chaining */
+                c_sg:1,                 /* Scatter Gather */
+                c_reload:1,             /* Reload */
+                c_hg:1,                 /* Higig (TX) */
+                c_stat:1,               /* Update stats (TX) */
+                c_pause:1,              /* Pause packet (TX) */
+                c_purge:1,              /* Purge packet (TX) */
+                :9;                     /* Don't care */
+#else
+        uint32  :9,                     /* Don't care */
+                c_purge:1,              /* Purge packet (TX) */
+                c_pause:1,              /* Pause packet (TX) */
+                c_stat:1,               /* Update stats (TX) */
+                c_hg:1,                 /* Higig (TX) */
+                c_reload:1,             /* Reload */
+                c_sg:1,                 /* Scatter Gather */
+                c_chain:1,              /* Chaining */
+                c_count:16;             /* Requested byte count */
+#endif  /* LE_HOST */
+
+#ifdef  LE_HOST    
+    union {                             /* T29.2 */
+        struct {
+            uint32  reason_hi;          /* CPU opcode (hi bits) */
+        } overlay1;
+        struct {
+            uint32  reason_hi:18,
+                    ma_ptr:13,          /* OAM session pointer */
+                    :1;                 /* Reserved */
+        } overlay2;
+    } word2;
+#else
+    union {                             /* T29.2 */
+        struct {
+            uint32  reason_hi;          /* CPU opcode (hi bits) */
+        } overlay1;
+        struct {
+            uint32  :1,                 /* Reserved */
+                    ma_ptr:13,          /* OAM session pointer */
+                    reason_hi:18;
+        } overlay2;
+    } word2;
+#endif
+
+    uint32  reason;                     /* T29.3: CPU opcode (low bits) */
+
+#ifdef  LE_HOST
+    union {                             /* T29.4 */
+        struct {
+            uint32  queue_num:16,       /* Queue number for CPU packets */
+                    cpu_opcode_type:4,  /* CPU opcode type */
+                    outer_vid:12;       /* Outer VLAN ID */
+        } overlay1;
+        struct {
+            uint32  cpu_cos:6,          /* CPU COS */
+                    :26;                /* Reserved */
+        } overlay2;
+        struct {
+            uint32 queue_num:15,       /* Queue number for CPU packets */
+                   olp_encap_oam_pkt:1,/* OLP encapsulated OAM packet */
+                   cpu_opcode_type:4,  /* CPU opcode type */
+                   outer_vid:12;       /* Outer VLAN ID */
+        } overlay3;                    /* Overlay1 is not used in Saber2.
+                                          This is used instead */
+    } word4;
+
+                                        /* T29.5 */
+        uint32  srcport:8,              /* Source port number */
+                pkt_len:14,             /* Packet length */
+                match_rule:8,           /* Matched FP rule */
+                hgi:2;                  /* Higig Interface Format Indicator */
+#else
+    union {                             /* T29.4 */
+        struct {
+            uint32  outer_vid:12,       /* Outer VLAN ID */
+                    cpu_opcode_type:4,  /* CPU opcode type */
+                    queue_num:16;       /* Queue number for CPU packets */
+        } overlay1;
+        struct {
+            uint32  :26,                /* Reserved */
+                    cpu_cos:6;          /* CPU COS */
+        } overlay2;
+        struct {
+            uint32  outer_vid:12,       /* Outer VLAN ID */
+                    cpu_opcode_type:4,  /* CPU opcode type */
+                    olp_encap_oam_pkt:1,/* OLP encapsulated OAM packet */
+                    queue_num:15;       /* Queue number for CPU packets */
+        } overlay3;                     /* Overlay1 is not used in Saber2.
+                                           This is used instead */
+    } word4;
+
+                                        /* T29.5 */
+        uint32  hgi:2,                  /* Higig Interface Format Indicator */
+                match_rule:8,           /* Matched FP rule */
+                pkt_len:14,             /* Packet length */
+                srcport:8;              /* Source port number */
+#endif
+
+        uint32  mh0;                    /* T29.6: Module Header word 0 */
+        uint32  mh1;                    /* T29.7: Module Header word 1 */
+        uint32  mh2;                    /* T29.8: Module Header word 2 */
+        uint32  mh3;                    /* T29.9: Module Header word 3 */
+#ifdef  LE_HOST
+                                        /* T29.10 */
+        uint32  inner_pri:3,            /* Inner priority */
+                regen_crc:1,            /* Packet modified and needs new CRC */
+                repl_nhi:19,            /* Replication or Next Hop index */
+                vfi_valid:1,            /* Validates VFI field */
+                orig_dest_pp_port:8;    /* Original PP-destiantion-port */
+
+    union {                             /* T29.11 */
+        struct {
+            uint32  dscp:6,             /* New DSCP (+ oam pkt type:3) */
+                    chg_tos:1,          /* DSCP has been changed by HW */
+                    vntag_action:2,     /* VN tag action */
+                    outer_cfi:1,        /* Outer Canoncial Format Indicator */
+                    outer_pri:3,        /* Outer priority */
+                    decap_tunnel_type:5,/* Tunnel type that was decapsulated */
+                    inner_vid:12,       /* Inner VLAN ID */
+                    inner_cfi:1,        /* Inner Canoncial Format Indicator */
+                    ep_mirror:1;        /* EP Redirected packet copied to CPU */
+        } overlay1;
+        struct {
+            uint32  oam_command:4,      /* Special packet type (OAM, BFD) */
+                    :28;                /* Reserved */
+        } overlay2;
+    } word11;
+
+    union {                             /* T29.12 */
+        struct {
+            uint32  timestamp;          /* Timestamp */
+        } overlay1;
+        struct {
+            uint32  vfi:14,             /* VFI or FID */
+                    :18;                /* Reserved */
+        } overlay2;
+    } word12;
+
+                                        /* T29.13 */
+        uint32  itag_status:2,          /* Ingress Inner tag status */
+                otag_action:2,          /* Ingress Outer tag action */
+                itag_action:2,          /* Ingress Inner tag action */
+                service_tag:1,          /* SD tag present */
+                switch_pkt:1,           /* Switched packet */
+                all_switch_drop:1,      /* All switched copies dropped */
+                hg_type:1,              /* 0: Higig+, 1: Higig2 */
+                src_hg:1,               /* Source is Higig */
+                l3routed:1,             /* Any IP routed packet */
+                l3only:1,               /* L3 only IPMC packet */
+                replicated:1,           /* Replicated copy */
+                hg2_ext_hdr:1,          /* Extended Higig2 header valid */
+                oam_pkt:1,              /* OAM Packet indicator */
+                do_not_change_ttl:1,    /* Do not change TTL */
+                bpdu:1,                 /* BPDU Packet */
+                timestamp_type:2,       /* Timestamp type */
+                loopback_pkt_type:4,    /* Loopback packet type */
+                mtp_index:5,            /* MTP index */
+                ecn:2,                  /* New ECN value */
+                chg_ecn:1;              /* ECN changed */
+
+    union {                             /* T29.14 */
+        struct {
+            uint32  timestamp_hi;       /* Timestamp upper bits */
+        } overlay1;
+        struct {
+            uint32  eh_tag;             /* Extension-Header TAG */
+        } overlay2;
+        struct {
+            uint32  eh_queue_tag: 16,   /* HG2 EH queue tag */ 
+                    eh_tag_type:2,      /* HG2 EH tag type */
+                    eh_seg_sel:3,       /* HG2 EH seg sel */
+                   :11;                        /* Reserved */
+        } overlay3;
+        struct {
+            uint32  rx_bfd_session_index:13,    /* Rx BFD pkt session ID */
+                    rx_bfd_start_offset_type:2, /* Rx BFD pkt st offset type */
+                    rx_bfd_start_offset:8,      /* Rx BFD pkt start offset */
+                   :9;                          /* Reserved */
+        } overlay4;
+    } word14;
+
+                                         /* T29.15: DMA Status 0 */
+        uint32  count:16,                /* Transferred byte count */
+                end:1,                   /* End bit (RX) */
+                start:1,                 /* Start bit (RX) */
+                error:1,                 /* Cell Error (RX) */
+                pktdata_read_ecc_error:1,/* 2 bit ECC error while reading packet
+                                            data from RX data Buffers.*/
+                status_read_ecc_error:1, /* 2 bit ECC error while reading Status
+                                            from RX Status Buffers.*/
+                :10,                     /* Reserved */
+                done:1;                  /* Descriptor Done */
+#else
+                                        /* T29.10 */
+        uint32  orig_dest_pp_port:8,    /* Original PP-destiantion-port */
+                vfi_valid:1,            /* Validates VFI field */
+                repl_nhi:19,            /* Replication or Next Hop index */
+                regen_crc:1,            /* Packet modified and needs new CRC */
+                inner_pri:3;            /* Inner priority */
+
+    union {                             /* T29.11 */
+        struct {
+            uint32  ep_mirror:1,        /* EP Redirected packet copied to CPU */
+                    inner_cfi:1,        /* Inner Canoncial Format Indicator */
+                    inner_vid:12,       /* Inner VLAN ID */
+                    decap_tunnel_type:5,/* Tunnel type that was decapsulated */
+                    outer_pri:3,        /* Outer priority */
+                    outer_cfi:1,        /* Outer Canoncial Format Indicator */
+                    vntag_action:2,     /* VN tag action */
+                    chg_tos:1,          /* DSCP has been changed by HW */
+                    dscp:6;             /* New DSCP (+ oam pkt type:3) */
+        } overlay1;
+        struct {
+            uint32  :28,                /* Reserved */
+                    oam_command:4; /* Special packet type (OAM, BFD) */
+        } overlay2;
+    } word11;
+
+    union {                             /* T29.12 */
+        struct {
+            uint32  timestamp;          /* Timestamp */
+        } overlay1;
+        struct {
+            uint32  :18,                /* Reserved */
+                    vfi:14;             /* VFI or FID */
+        } overlay2;
+    } word12;
+
+                                        /* T29.13 */
+        uint32  chg_ecn:1,              /* ECN changed */
+                ecn:2,                  /* New ECN value */
+                mtp_index:5,            /* MTP index */
+                loopback_pkt_type:4,    /* Loopback packet type */
+                timestamp_type:2,       /* Timestamp type */
+                bpdu:1,                 /* BPDU Packet */
+                do_not_change_ttl:1,    /* Do not change TTL */
+                oam_pkt:1,              /* OAM Packet indicator */
+                hg2_ext_hdr:1,          /* Extended Higig2 header valid */
+                replicated:1,           /* Replicated copy */
+                l3only:1,               /* L3 only IPMC packet */
+                l3routed:1,             /* Any IP routed packet */
+                src_hg:1,               /* Source is Higig */
+                hg_type:1,              /* 0: Higig+, 1: Higig2 */
+                all_switch_drop:1,      /* All switched copies dropped */
+                switch_pkt:1,           /* Switched packet */
+                service_tag:1,          /* SD tag present */
+                itag_action:2,          /* Ingress Inner tag action */
+                otag_action:2,          /* Ingress Outer tag action */
+                itag_status:2;          /* Ingress Inner tag status */
+
+    union {                             /* T29.14 */
+        struct {
+            uint32  timestamp_hi;       /* Timestamp upper bits */
+        } overlay1;
+        struct {
+            uint32  eh_tag;             /* Extension-Header TAG */
+        } overlay2;
+        struct {
+            uint32  :11,                /* Reserved */
+                    eh_seg_sel:3,       /* HG2 EH seg sel */
+                    eh_tag_type:2,      /* HG2 EH tag type */
+                    eh_queue_tag: 16;   /* HG2 EH queue tag */ 
+        } overlay3;
+        struct {
+            uint32  :9,                         /* Reserved */
+                    rx_bfd_start_offset:8,      /* Rx BFD pkt start offset */
+                    rx_bfd_start_offset_type:2, /* Rx BFD pkt st offset type */
+                    rx_bfd_session_index:13;    /* Rx BFD pkt session ID */
+        } overlay4;
+    } word14;
+
+                                         /* T29.15: DMA Status 0 */
+        uint32  done:1,                  /* Descriptor Done */
+                :10,                     /* Reserved */
+                status_read_ecc_error:1, /* 2 bit ECC error while reading Status
+                                            from RX Status Buffers. */
+                pktdata_read_ecc_error:1,/* 2 bit ECC error while reading packet
+                                            data from RX data Buffers.*/
+                error:1,                 /* Cell Error (RX) */
+                start:1,                 /* Start bit (RX) */
+                end:1,                   /* End bit (RX) */
+                count:16;                /* Transferred byte count */
+#endif
+} dcb29_t;
+
+#define SOC_CPU_OPCODE_TYPE_IP_0        0
+#define SOC_CPU_OPCODE_TYPE_IP_1        1
+#define SOC_CPU_OPCODE_TYPE_EP          2 
+#define SOC_CPU_OPCODE_TYPE_IP_3        3
+#endif
+
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type31.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type31.h
new file mode 100644
index 000000000..6a57b710b
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type31.h
@@ -0,0 +1,251 @@
+/*
+ * $Id: type31.h,v 1.1.6.2 Broadcom SDK $
+ * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * 
+ * Permission is granted to use, copy, modify and/or distribute this
+ * software under either one of the licenses below.
+ * 
+ * License Option 1: GPL
+ * 
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License, version 2, as
+ * published by the Free Software Foundation (the "GPL").
+ * 
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License version 2 (GPLv2) for more details.
+ * 
+ * You should have received a copy of the GNU General Public License
+ * version 2 (GPLv2) along with this source code.
+ * 
+ * 
+ * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
+ * 
+ * This software is governed by the Broadcom Open Network Switch APIs license:
+ * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+ * 
+ *
+ * File:        soc/shared/dcbformats/type31.h
+ * Purpose:     Define dma control block (DCB) format for a type31 DCB
+ *              used by the 53400 (Greyhound)
+ *
+ *              This file is shared between the SDK and the embedded applications.
+ */
+
+#ifndef _SOC_SHARED_DCBFORMATS_TYPE31_H
+#define _SOC_SHARED_DCBFORMATS_TYPE31_H
+
+/*
+ * DMA Control Block - Type 31
+ * Used on 53400 devices
+ * 16 words
+ */
+typedef struct {
+        uint32  addr;                   /* T31.0: physical address */
+                                        /* T31.1: Control 0 */
+#ifdef  LE_HOST
+        uint32  c_count:16,             /* Requested byte count */
+                c_chain:1,              /* Chaining */
+                c_sg:1,                 /* Scatter Gather */
+                c_reload:1,             /* Reload */
+                c_hg:1,                 /* Higig (TX) */
+                c_stat:1,               /* Update stats (TX) */
+                c_pause:1,              /* Pause packet (TX) */
+                c_purge:1,              /* Purge packet (TX) */
+                :9;                     /* Don't care */
+#else
+        uint32  :9,                     /* Don't care */
+                c_purge:1,              /* Purge packet (TX) */
+                c_pause:1,              /* Pause packet (TX) */
+                c_stat:1,               /* Update stats (TX) */
+                c_hg:1,                 /* Higig (TX) */
+                c_reload:1,             /* Reload */
+                c_sg:1,                 /* Scatter Gather */
+                c_chain:1,              /* Chaining */
+                c_count:16;             /* Requested byte count */
+#endif  /* LE_HOST */
+        uint32  reason_hi;              /* T31.2: CPU opcode (hi bits) */
+        uint32  reason;                 /* T31.3: CPU opcode (low bits) */
+#ifdef  LE_HOST
+    union {                             /* T31.4 */
+        struct {
+            uint32  :16,                /* Reserved */
+                    cpu_opcode_type:4,  /* CPU opcode type */
+                    outer_vid:12;       /* Outer VLAN ID */
+        } overlay1;
+        struct {
+            uint32  cpu_cos:6,          /* CPU COS */
+                    :26;                /* Reserved */
+        } overlay2;
+    } word4;
+
+                                        /* T31.5 */
+        uint32  srcport:8,              /* Source port number */
+                pkt_len:14,             /* Packet length */
+                match_rule:8,           /* Matched FP rule */
+                hgi:2;                  /* Higig Interface Format Indicator */
+#else
+    union {                             /* T31.4 */
+        struct {
+            uint32  outer_vid:12,       /* Outer VLAN ID */
+                    cpu_opcode_type:4,  /* CPU opcode type */
+                    :16;                /* Reserved */
+        } overlay1;
+        struct {
+            uint32  :26,                /* Reserved */
+                    cpu_cos:6;          /* CPU COS */
+        } overlay2;
+    } word4;
+
+                                        /* T31.5 */
+        uint32  hgi:2,                  /* Higig Interface Format Indicator */
+                match_rule:8,           /* Matched FP rule */
+                pkt_len:14,             /* Packet length */
+                srcport:8;              /* Source port number */
+#endif
+
+        uint32  mh0;                    /* T31.6: Module Header word 0 */
+        uint32  mh1;                    /* T31.7: Module Header word 1 */
+        uint32  mh2;                    /* T31.8: Module Header word 2 */
+        uint32  mh3;                    /* T31.9: Module Header word 3 */
+#ifdef  LE_HOST
+                                        /* T31.10 */
+        uint32  inner_pri:3,            /* Inner priority */
+                regen_crc:1,            /* Packet modified and needs new CRC */
+                repl_nhi:12,            /* Replication or Next Hop index */
+                :5,                     /* reserved.*/
+                shaping_cos_sel:2,      /* */                    
+                vfi_valid:1,            /* Validates VFI field */
+                em_mtp_index:4,         /* em mirror-to-port index */
+                oam_command:4;          /* Special packet type (OAM, BFD) */
+
+                                        /* T31.11 */
+        uint32  dscp:6,                 /* New DSCP (+ oam pkt type:3) */
+                chg_tos:1,              /* DSCP has been changed by HW */
+                imirror:1,              /* Ingress Mirroring PBE field*/
+                emirror:1,              /* Egress Mirroring, PBE field */
+                outer_cfi:1,            /* Outer Canoncial Format Indicator */
+                outer_pri:3,            /* Outer priority */
+                :5,                     /* Reserved */
+                inner_vid:12,           /* Inner VLAN ID */
+                inner_cfi:1,            /* Inner Canoncial Format Indicator */
+                replicated:1;           /* Replicated copy */
+
+    
+
+    union {                             /* T29.12 */
+        struct {
+            uint32  timestamp;          /* Timestamp */
+        } overlay1;
+        struct {
+            uint32  vfi:14,             /* VFI or FID */
+                    :18;                /* Reserved */
+        } overlay2;
+    } word12;
+
+                                        /* T31.13 */
+        uint32  itag_status:2,          /* Ingress Inner tag status */
+                otag_action:2,          /* Ingress Outer tag action */
+                itag_action:2,          /* Ingress Inner tag action */
+                service_tag:1,          /* SD tag present */
+                switch_pkt:1,           /* Switched packet */
+                hg_lookup:1,            /* Higig lookup */
+                hg_type:1,              /* 0: Higig+, 1: Higig2 */
+                src_hg:1,               /* Source is Higig */
+                l3routed:1,             /* Any IP routed packet */
+                l3only:1,               /* L3 only IPMC packet */
+                vntag_action:2,         /* VNTAG/ETAG*/
+                oam_pkt:1,              /* OAM Packet indicator */
+                do_not_change_ttl:1,    /* Do not change TTL */
+                bpdu:1,                 /* BPDU Packet */
+                timestamp_type:2,       /* Timestamp type */
+                cos:4,                  /* Port queue number */
+                mtp_index:5,            /* IM MTP index, PBE field */
+                ecn:2,                  /* New ECN value */
+                chg_ecn:1;              /* ECN changed */
+
+                                        /* T31.14 */
+        uint32  timestamp_hi;           /* Timestamp upper bits */
+
+                                        /* T31.15: DMA Status 0 */
+        uint32  count:16,               /* Transferred byte count */
+                end:1,                  /* End bit (RX) */
+                start:1,                /* Start bit (RX) */
+                error:1,                /* Cell Error (RX) */
+                :12,                    /* Reserved */
+                done:1;                 /* Descriptor Done */
+#else
+                                        /* T31.10 */
+        uint32  oam_command:4,          /* Special packet type (OAM, BFD) */
+                em_mtp_index:4,         /* em mirror-to-port index */
+                vfi_valid:1,            /* Validates VFI field */
+                shaping_cos_sel:2,      /* */
+                :5,                     /* reserved.*/
+                repl_nhi:12,            /* Replication or Next Hop index */
+                regen_crc:1,            /* Packet modified and needs new CRC */
+                inner_pri:3;            /* Inner priority */
+
+                                        /* T31.11 */
+        uint32  replicated:1,           /* Replicated copy */
+                inner_cfi:1,            /* Inner Canoncial Format Indicator */
+                inner_vid:12,           /* Inner VLAN ID */
+                :5,                     /* Reserved */
+                outer_pri:3,            /* Outer priority */
+                outer_cfi:1,            /* Outer Canoncial Format Indicator */
+                emirror:1,              /* Egress Mirroring, PBE field */
+                imirror:1,              /* Ingress Mirroring PBE field*/
+                chg_tos:1,              /* DSCP has been changed by HW */
+                dscp:6;                 /* New DSCP (+ oam pkt type:3) */
+
+    union {                             /* T31.12 */
+        struct {
+            uint32  timestamp;          /* Timestamp */
+        } overlay1;
+        struct {
+            uint32  :18,                /* Reserved */
+                    vfi:14;             /* VFI or FID */
+        } overlay2;
+    } word12;
+
+                                        /* T31.13 */
+        uint32  chg_ecn:1,              /* ECN changed */
+                ecn:2,                  /* New ECN value */
+                mtp_index:5,            /* IM MTP index, PBE field */
+                cos:4,                  /* Port queue number */
+                timestamp_type:2,       /* Timestamp type */
+                bpdu:1,                 /* BPDU Packet */
+                do_not_change_ttl:1,    /* Do not change TTL */
+                oam_pkt:1,              /* OAM Packet indicator */
+                vntag_action:2,         /* VNTAG/ETAG*/
+                l3only:1,               /* L3 only IPMC packet */
+                l3routed:1,             /* Any IP routed packet */
+                src_hg:1,               /* Source is Higig */
+                hg_type:1,              /* 0: Higig+, 1: Higig2 */
+                hg_lookup:1,            /* Higig lookup */
+                switch_pkt:1,           /* Switched packet */
+                service_tag:1,          /* SD tag present */
+                itag_action:2,          /* Ingress Inner tag action */
+                otag_action:2,          /* Ingress Outer tag action */
+                itag_status:2;          /* Ingress Inner tag status */
+
+    
+        uint32  timestamp_hi;           /* Timestamp upper bits */    
+
+                                        /* T29.15: DMA Status 0 */
+        uint32  done:1,                 /* Descriptor Done */
+                :12,                    /* Reserved */
+                error:1,                /* Cell Error (RX) */
+                start:1,                /* Start bit (RX) */
+                end:1,                  /* End bit (RX) */
+                count:16;               /* Transferred byte count */
+#endif
+} dcb31_t;
+
+#define SOC_CPU_OPCODE_TYPE_IP_0        0
+#define SOC_CPU_OPCODE_TYPE_IP_1        1
+#define SOC_CPU_OPCODE_TYPE_EP          2
+#define SOC_CPU_OPCODE_TYPE_NLF         3
+
+#endif
+
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type32.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type32.h
new file mode 100644
index 000000000..ec87c0e04
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type32.h
@@ -0,0 +1,294 @@
+/*
+ * $Id: $
+ * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * 
+ * Permission is granted to use, copy, modify and/or distribute this
+ * software under either one of the licenses below.
+ * 
+ * License Option 1: GPL
+ * 
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License, version 2, as
+ * published by the Free Software Foundation (the "GPL").
+ * 
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License version 2 (GPLv2) for more details.
+ * 
+ * You should have received a copy of the GNU General Public License
+ * version 2 (GPLv2) along with this source code.
+ * 
+ * 
+ * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
+ * 
+ * This software is governed by the Broadcom Open Network Switch APIs license:
+ * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+ * 
+ *
+ * File:        soc/shared/dcbformats/type32.h
+ * Purpose:     Define dma control block (DCB) format for a type32 DCB
+ *              used by the 56960 (Tomahawk)
+ *
+ *              This file is shared between the SDK and the embedded applications.
+ */
+
+#ifndef _SOC_SHARED_DCBFORMATS_TYPE32_H
+#define _SOC_SHARED_DCBFORMATS_TYPE32_H
+
+/*
+ * DMA Control Block - Type 32
+ * Used on 56960 devices
+ * 16 words
+ */
+typedef struct {
+    uint32  addr;                       /* T31.0: physical address */
+                                        /* T31.1: Control 0 */
+#ifdef  LE_HOST
+    uint32  c_count:16,                 /* Requested byte count */
+            c_chain:1,                  /* Chaining */
+            c_sg:1,                     /* Scatter Gather */
+            c_reload:1,                 /* Reload */
+            c_hg:1,                     /* Higig (TX) */
+            c_stat:1,                   /* Update stats (TX) */
+            c_pause:1,                  /* Pause packet (TX) */
+            c_purge:1,                  /* Purge packet (TX) */
+            c_intr:2,                   /* Desc Intr Mode */
+            :7;                         /* Don't care */
+#else
+    uint32  :7,                         /* Don't care */
+            c_intr:2,                   /* Desc Intr Mode */
+            c_purge:1,                  /* Purge packet (TX) */
+            c_pause:1,                  /* Pause packet (TX) */
+            c_stat:1,                   /* Update stats (TX) */
+            c_hg:1,                     /* Higig (TX) */
+            c_reload:1,                 /* Reload */
+            c_sg:1,                     /* Scatter Gather */
+            c_chain:1,                  /* Chaining */
+            c_count:16;                 /* Requested byte count */
+#endif  /* LE_HOST */
+
+                                        /* T31.2 (word 12 in EP_TO_CPU_HDR) */
+    uint32  reason_hi;                  /* CPU opcode (hi bits) */
+                                        /* T31.3 (word 11 in EP_TO_CPU_HDR) */
+    uint32  reason;                     /* CPU opcode (low bits) */
+
+#ifdef  LE_HOST
+                                        /* T31.4 (word 10 in EP_TO_CPU_HDR) */
+    uint32  cos:6,                      /* CPU COS or MMU COS */
+            ucq:1,                      /* Unicast queue */
+            :9,                         /* Reserved */
+            cpu_opcode_type:4,          /* CPU opcode type */
+            outer_vid:12;               /* Outer VLAN ID */
+
+                                        /* T31.5 (word 9 in EP_TO_CPU_HDR) */
+    uint32  srcport:8,                  /* Source port number */
+            pkt_len:14,                 /* Packet length */
+            match_rule:8,               /* Matched FP rule */
+            hgi:2;                      /* Higig Interface Format Indicator */
+#else
+                                        /* T31.4 (word 10 in EP_TO_CPU_HDR) */
+    uint32  outer_vid:12,               /* Outer VLAN ID */
+            cpu_opcode_type:4,          /* CPU opcode type */
+            :9,                         /* Reserved */
+            ucq:1,                      /* Unicast queue */
+            cos:6;                      /* CPU COS or MMU COS */
+                                        /* T31.5 (word 9 in EP_TO_CPU_HDR) */
+    uint32  hgi:2,                      /* Higig Interface Format Indicator */
+            match_rule:8,               /* Matched FP rule */
+            pkt_len:14,                 /* Packet length */
+            srcport:8;                  /* Source port number */
+#endif
+
+                                        /* T31.6 (word 8 in EP_TO_CPU_HDR) */
+    uint32  mh0;                        /* Module Header word 0 */
+                                        /* T31.7 (word 7 in EP_TO_CPU_HDR) */
+    uint32  mh1;                        /* Module Header word 1 */
+                                        /* T31.8 (word 6 in EP_TO_CPU_HDR) */
+    uint32  mh2;                        /* Module Header word 2 */
+                                        /* T31.9 (word 5 in EP_TO_CPU_HDR) */
+    uint32  mh3;                        /* Module Header word 3 */
+
+#ifdef  LE_HOST
+                                        /* T31.10 (word 4 in EP_TO_CPU_HDR) */
+    uint32  inner_pri:3,                /* Inner priority */
+            dvp_nhi_sel:1,              /* DVP overlay indicator */
+            regen_crc:1,                /* Packet modified and needs new CRC */
+            repl_nhi:17,                /* Replication or Next Hop index */
+            :2,                         /* Reserved */
+            vfi_valid:1,                /* Validates VFI field */
+            :7;                         /* Reserved */
+
+                                        /* T31.11 (word 3 in EP_TO_CPU_HDR) */
+    uint32  dscp:6,                     /* New DSCP */
+            chg_tos:1,                  /* DSCP has been changed by HW */
+            vntag_action:2,             /* VN tag action */
+            outer_cfi:1,                /* Outer Canoncial Format Indicator */
+            outer_pri:3,                /* Outer priority */
+            decap_tunnel_type:4,        /* Tunnel type that was decapsulated */
+            :1,                         /* Reserved */
+            inner_vid:12,               /* Inner VLAN ID */
+            inner_cfi:1,                /* Inner Canoncial Format Indicator */
+            :1;                         /* Reserved */
+#else
+                                        /* T31.10 (word 4 in EP_TO_CPU_HDR) */
+    uint32  :7,                         /* Reserved */
+            vfi_valid:1,                /* Validates VFI field */
+            :2,                         /* Reserved */
+            repl_nhi:17,                /* Replication or Next Hop index */
+            regen_crc:1,                /* Packet modified and needs new CRC */
+            dvp_nhi_sel:1,              /* DVP overlay indicator */
+            inner_pri:3;                /* Inner priority */
+
+                                        /* T31.11 (word 3 in EP_TO_CPU_HDR) */
+    uint32  :1,                         /* Reserved */
+            inner_cfi:1,                /* Inner Canoncial Format Indicator */
+            inner_vid:12,               /* Inner VLAN ID */
+            :1,                         /* Reserved */
+            decap_tunnel_type:4,        /* Tunnel type that was decapsulated */
+            outer_pri:3,                /* Outer priority */
+            outer_cfi:1,                /* Outer Canoncial Format Indicator */
+            vntag_action:2,             /* VN tag action */
+            chg_tos:1,                  /* DSCP has been changed by HW */
+            dscp:6;                     /* New DSCP */
+#endif
+                                        /* T31.12 (word 2 in EP_TO_CPU_HDR) */
+    uint32  timestamp;                  /* Timestamp */
+
+#ifdef  LE_HOST
+                                        /* T31.13 (word 1 in EP_TO_CPU_HDR) */
+    uint32  tag_status:2,               /* Ingress incoming tag status */
+            otag_action:2,              /* Ingress outer tag action */
+            itag_action:2,              /* Ingress inner tag action */
+            service_tag:1,              /* SD tag present */
+            switch_pkt:1,               /* Switched packet */
+            uc_switch_drop:1,           /* Unicast switched copies dropped */
+            hg_type:1,                  /* 0: Higig+, 1: Higig2 */
+            src_hg:1,                   /* Source is Higig */
+            l3routed:1,                 /* Any IP routed packet */
+            l3only:1,                   /* L3 only IPMC packet */
+            replicated:1,               /* Replicated copy */
+            hg2_ext_hdr:1,              /* Extended Higig2 header valid */
+            special_pkt:1,              /* Special Packet indicator */
+            do_not_change_ttl:1,        /* Do not change TTL */
+            bpdu:1,                     /* BPDU Packet */
+            timestamp_type:2,           /* Timestamp type */
+            loopback_pkt_type:3,        /* Loopback packet type */
+            :1,                         /* Reserved */
+            mtp_index:5,                /* MTP index */
+            ecn:2,                      /* New ECN value */
+            chg_ecn:1;                  /* ECN changed */
+
+    union {                             /* T31.14 (word 0 in EP_TO_CPU_HDR) */
+        uint32  timestamp_hi;           /* Timestamp upper bits */
+        struct {                        /* EH_TYPE_0 */
+            uint32  eh_queue_tag:16,
+                    :3,
+                    eh_tag_type:2,
+                    eh_seg_sel:3,
+                    :3,
+                    os1588_done:1,
+                    eh_type:4;
+        } overlay1;
+        struct {                        /* EH_TYPE_1 */
+            uint32  classid: 9,
+                    l3_iif:14,
+                    classid_type:4,
+                    os1588_done:1,
+                    eh_type:4;
+        } overlay2;
+        struct {                        /* EH_TYPE 2 */
+            uint32  eh_queue_tag: 14,
+                    classid:9,
+                    classid_type:4,
+                    os1588_done:1,
+                    eh_type:4;
+        } overlay3;
+        struct {
+            uint32  rx_bfd_session_index:12,    /* Rx BFD pkt session ID */
+                    rx_bfd_start_offset_type:2, /* Rx BFD pkt st offset type */
+                    rx_bfd_start_offset:8,      /* Rx BFD pkt start offset */
+                    :10;                        /* Reserved */
+        } overlay4;
+    } word14;
+
+                                        /* T31.15: DMA Status 0 */
+    uint32  count:16,                   /* Transferred byte count */
+            end:1,                      /* End bit (RX) */
+            start:1,                    /* Start bit (RX) */
+            error:1,                    /* Cell Error (RX) */
+            :12,                        /* Reserved */
+            done:1;                     /* Descriptor Done */
+#else
+                                        /* T31.13 (word 1 in EP_TO_CPU_HDR) */
+    uint32  chg_ecn:1,                  /* ECN changed */
+            ecn:2,                      /* New ECN value */
+            mtp_index:5,                /* MTP index */
+            :1,                         /* Reserved */
+            loopback_pkt_type:3,        /* Loopback packet type */
+            timestamp_type:2,           /* Timestamp type */
+            bpdu:1,                     /* BPDU Packet */
+            do_not_change_ttl:1,        /* Do not change TTL */
+            special_pkt:1,              /* Special Packet indicator */
+            hg2_ext_hdr:1,              /* Extended Higig2 header valid */
+            replicated:1,               /* Replicated copy */
+            l3only:1,                   /* L3 only IPMC packet */
+            l3routed:1,                 /* Any IP routed packet */
+            src_hg:1,                   /* Source is Higig */
+            hg_type:1,                  /* 0: Higig+, 1: Higig2 */
+            uc_switch_drop:1,           /* Unicast switched copies dropped */
+            switch_pkt:1,               /* Switched packet */
+            service_tag:1,              /* SD tag present */
+            itag_action:2,              /* Ingress inner tag action */
+            otag_action:2,              /* Ingress outer tag action */
+            tag_status:2;               /* Ingress incoming tag status */
+
+    union {                             /* T31.14 (word 0 in EP_TO_CPU_HDR) */
+        uint32  timestamp_hi;           /* Timestamp upper bits */
+        struct {                        /* EH_TYPE_0 */
+            uint32  eh_type:4,
+                    os1588_done:1,
+                    :3,
+                    eh_seg_sel:3,
+                    eh_tag_type:2,
+                    :3,
+                    eh_queue_tag:16;
+        } overlay1;
+        struct {                        /* EH_TYPE_1 */
+            uint32  eh_type:4,
+                    os1588_done:1,
+                    classid_type:4,
+                    l3_iif:14,
+                    classid: 9;
+        } overlay2;
+        struct {                        /* EH_TYPE 2 */
+            uint32  eh_type:4,
+                    os1588_done:1,
+                    classid_type:4,
+                    classid:9,
+                    eh_queue_tag:14;
+        } overlay3;
+        struct {
+            uint32  :10,                        /* Reserved */
+                    rx_bfd_start_offset:8,      /* Rx BFD pkt start offset */
+                    rx_bfd_start_offset_type:2, /* Rx BFD pkt st offset type */
+                    rx_bfd_session_index:12;    /* Rx BFD pkt session ID */
+        } overlay4;
+    } word14;
+
+                                        /* T31.15: DMA Status 0 */
+    uint32  done:1,                     /* Descriptor Done */
+            :12,                        /* Reserved */
+            error:1,                    /* Cell Error (RX) */
+            start:1,                    /* Start bit (RX) */
+            end:1,                      /* End bit (RX) */
+            count:16;                   /* Transferred byte count */
+#endif
+} dcb32_t;
+
+#define SOC_CPU_OPCODE_TYPE_IP_0        0
+#define SOC_CPU_OPCODE_TYPE_IP_1        1
+#define SOC_CPU_OPCODE_TYPE_EP          2
+#define SOC_CPU_OPCODE_TYPE_NLF         3
+
+#endif /* _SOC_SHARED_DCBFOMATS_TYPE32_H */
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type33.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type33.h
new file mode 100644
index 000000000..dcf1dd930
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type33.h
@@ -0,0 +1,328 @@
+/*
+ * $Id$
+ * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * 
+ * Permission is granted to use, copy, modify and/or distribute this
+ * software under either one of the licenses below.
+ * 
+ * License Option 1: GPL
+ * 
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License, version 2, as
+ * published by the Free Software Foundation (the "GPL").
+ * 
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License version 2 (GPLv2) for more details.
+ * 
+ * You should have received a copy of the GNU General Public License
+ * version 2 (GPLv2) along with this source code.
+ * 
+ * 
+ * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
+ * 
+ * This software is governed by the Broadcom Open Network Switch APIs license:
+ * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+ * 
+ *
+ * File:        soc/shared/dcbformats/type33.h
+ * Purpose:     Define dma control block (DCB) format for a type33 DCB
+ *              used by the 56860 (TD2+)
+ *
+ *              This file is shared between the SDK and the embedded applications.
+ */
+
+#ifndef _SOC_SHARED_DCBFORMATS_TYPE33_H
+#define _SOC_SHARED_DCBFORMATS_TYPE33_H
+
+/*
+ * DMA Control Block - Type 33
+ * Used on 56860 devices
+ * 16 words
+ */
+typedef struct {
+    uint32  addr;                       /* T33.0: physical address */
+                                        /* T33.1: Control 0 */
+#ifdef  LE_HOST
+    uint32  c_count:16,                 /* Requested byte count */
+            c_chain:1,                  /* Chaining */
+            c_sg:1,                     /* Scatter Gather */
+            c_reload:1,                 /* Reload */
+            c_hg:1,                     /* Higig (TX) */
+            c_stat:1,                   /* Update stats (TX) */
+            c_pause:1,                  /* Pause packet (TX) */
+            c_purge:1,                  /* Purge packet (TX) */
+            c_intr:2,                   /* Desc Intr Mode */
+            :7;                         /* Don't care */
+#else
+    uint32  :7,                         /* Don't care */
+            c_intr:2,                   /* Desc Intr Mode */
+            c_purge:1,                  /* Purge packet (TX) */
+            c_pause:1,                  /* Pause packet (TX) */
+            c_stat:1,                   /* Update stats (TX) */
+            c_hg:1,                     /* Higig (TX) */
+            c_reload:1,                 /* Reload */
+            c_sg:1,                     /* Scatter Gather */
+            c_chain:1,                  /* Chaining */
+            c_count:16;                 /* Requested byte count */
+#endif  /* LE_HOST */
+
+                                        /* T33.2 (word 12 in EP_TO_CPU_HDR) */
+    uint32  reason_hi;                  /* CPU opcode (hi bits) */
+                                        /* T33.3 (word 11 in EP_TO_CPU_HDR) */
+    uint32  reason;                     /* CPU opcode (low bits) */
+
+#ifdef  LE_HOST
+    union {                             /* T33.4 (word 10 in EP_TO_CPU_HDR) */
+        struct {
+            uint32  queue_num:12,       /* Queue number for CPU packets */
+                    :4,                 /* Reserved */
+                    cpu_opcode_type:4,  /* CPU opcode type */
+                    outer_vid:12;       /* Outer VLAN ID */
+        } overlay1;
+        struct {
+            uint32  cpu_cos:6,          /* CPU COS */
+                    :10,                /* Reserved */
+                    cpu_opcode_type:4,  /* CPU opcode type */
+                    outer_vid:12;       /* Outer VLAN ID */
+        } overlay2;
+    } word4;
+
+                                        /* T33.5 (word 9 in EP_TO_CPU_HDR) */
+    uint32  srcport:7,                  /* Source port number */
+            :1,                         /* Reserved */
+            pkt_len:14,                 /* Packet length */
+            match_rule:8,               /* Matched FP rule */
+            hgi:2;                      /* Higig Interface Format Indicator */
+#else
+    union {                             /* T33.4 (word 10 in EP_TO_CPU_HDR) */
+        struct {
+            uint32  outer_vid:12,       /* Outer VLAN ID */
+                    cpu_opcode_type:4,  /* CPU opcode type */
+                    :4,                 /* Reserved */
+                    queue_num:12;       /* Queue number for CPU packets */
+        } overlay1;
+        struct {
+            uint32  outer_vid:12,       /* Outer VLAN ID */
+                    cpu_opcode_type:4,  /* CPU opcode type */
+                    :10,                /* Reserved */
+                    cpu_cos:6;          /* CPU COS */
+        } overlay2;
+    } word4;
+
+                                        /* T33.5 (word 9 in EP_TO_CPU_HDR) */
+    uint32  hgi:2,                      /* Higig Interface Format Indicator */
+            match_rule:8,               /* Matched FP rule */
+            pkt_len:14,                 /* Packet length */
+            :1,                         /* Reserved */
+            srcport:7;                  /* Source port number */
+#endif
+                                        /* T33.6 (word 8 in EP_TO_CPU_HDR) */
+    uint32  mh0;                        /* Module Header word 0 */
+                                        /* T33.7 (word 7 in EP_TO_CPU_HDR) */
+    uint32  mh1;                        /* Module Header word 1 */
+                                        /* T33.8 (word 6 in EP_TO_CPU_HDR) */
+    uint32  mh2;                        /* Module Header word 2 */
+                                        /* T33.9 (word 5 in EP_TO_CPU_HDR) */
+    uint32  mh3;                        /* Module Header word 3 */
+
+#ifdef  LE_HOST
+                                        /* T33.10 (word 4 in EP_TO_CPU_HDR) */
+    uint32  inner_pri:3,                /* Inner priority */
+            dvp_nhi_sel:1,              /* DVP overlay indicator */
+            regen_crc:1,                /* Packet modified and needs new CRC */
+            repl_nhi:17,                /* Replication or Next Hop index */
+            :2,                         /* Reserved */
+            vfi_valid:1,                /* Validates VFI field */
+            :7;                         /* Reserved */
+
+    union {                                     /* T33.11 (word 3 in EP_TO_CPU_HDR) */
+        struct {
+            uint32  dscp:6,                     /* New DSCP */
+                    chg_tos:1,                  /* DSCP has been changed by HW */
+                    vntag_action:2,             /* VN tag action */
+                    outer_cfi:1,                /* Outer Canoncial Format Indicator */
+                    outer_pri:3,                /* Outer priority */
+                    decap_tunnel_type:4,        /* Tunnel type that was decapsulated */
+                    :1,                         /* Reserved */
+                    inner_vid:12,               /* Inner VLAN ID */
+                    inner_cfi:1,                /* Inner Canoncial Format Indicator */
+                    mcq:1;                      /* Multicast queue */
+        } overlay1;
+
+        struct {
+            uint32  special_pkt_type:3, /* Special packet type (OAM, BFD) */
+                    :29;
+        } overlay2;
+    } word3;
+#else
+                                        /* T33.10 (word 4 in EP_TO_CPU_HDR) */
+    uint32  :7,                         /* Reserved */
+            vfi_valid:1,                /* Validates VFI field */
+            :2,                         /* Reserved */
+            repl_nhi:17,                /* Replication or Next Hop index */
+            regen_crc:1,                /* Packet modified and needs new CRC */
+            dvp_nhi_sel:1,              /* DVP overlay indicator */
+            inner_pri:3;                /* Inner priority */
+
+    union {                                 /* T33.11 (word 3 in EP_TO_CPU_HDR) */
+        struct {
+            uint32  mcq:1,                      /* Multicast queue */
+                inner_cfi:1,                /* Inner Canoncial Format Indicator */
+                inner_vid:12,               /* Inner VLAN ID */
+                :1,                         /* Reserved */
+                decap_tunnel_type:4,        /* Tunnel type that was decapsulated */
+                outer_pri:3,                /* Outer priority */
+                outer_cfi:1,                /* Outer Canoncial Format Indicator */
+                vntag_action:2,             /* VN tag action */
+                chg_tos:1,                  /* DSCP has been changed by HW */
+                dscp:6;                     /* New DSCP */
+        } overlay1;
+
+        struct {
+            uint32  :29,
+                    special_pkt_type:3;
+        } overlay2;
+    } word3;
+#endif
+                                        /* T33.12 (word 2 in EP_TO_CPU_HDR) */
+    uint32  timestamp;                  /* Timestamp */
+
+#ifdef  LE_HOST
+                                        /* T33.13 (word 1 in EP_TO_CPU_HDR) */
+    uint32  tag_status:2,               /* Ingress incoming tag status */
+            otag_action:2,              /* Ingress outer tag action */
+            itag_action:2,              /* Ingress inner tag action */
+            service_tag:1,              /* SD tag present */
+            switch_pkt:1,               /* Switched packet */
+            all_switch_drop:1,          /* All switched copies dropped */
+            hg_type:1,                  /* 0: Higig+, 1: Higig2 */
+            src_hg:1,                   /* Source is Higig */
+            l3routed:1,                 /* Any IP routed packet */
+            l3only:1,                   /* L3 only IPMC packet */
+            replicated:1,               /* Replicated copy */
+            hg2_ext_hdr:1,              /* Extended Higig2 header valid */
+            special_pkt:1,              /* Special Packet indicator */
+            do_not_change_ttl:1,        /* Do not change TTL */
+            bpdu:1,                     /* BPDU Packet */
+            timestamp_type:2,           /* Timestamp type */
+            loopback_pkt_type:3,        /* Loopback packet type */
+            :1,                         /* Reserved */
+            mtp_index:5,                /* MTP index */
+            ecn:2,                      /* New ECN value */
+            chg_ecn:1;                  /* ECN changed */
+
+    union {                             /* T33.14 (word 0 in EP_TO_CPU_HDR) */
+        uint32  timestamp_hi;           /* Timestamp upper bits */
+        struct {                        /* EH_TYPE_0 */
+            uint32  eh_queue_tag:16,
+                    :3,
+                    eh_tag_type:2,
+                    eh_seg_sel:3,
+                    :3,
+                    os1588_done:1,
+                    eh_type:4;
+        } overlay1;
+        struct {                        /* EH_TYPE_1 */
+            uint32  classid: 9,
+                    l3_iif:14,
+                    classid_type:4,
+                    os1588_done:1,
+                    eh_type:4;
+        } overlay2;
+        struct {                        /* EH_TYPE 2 */
+            uint32  eh_queue_tag: 14,
+                    classid:9,
+                    classid_type:4,
+                    os1588_done:1,
+                    eh_type:4;
+        } overlay3;
+        struct {
+            uint32  rx_bfd_session_index:12,    /* Rx BFD pkt session ID */
+                    rx_bfd_start_offset_type:2, /* Rx BFD pkt st offset type */
+                    rx_bfd_start_offset:8,      /* Rx BFD pkt start offset */
+                    :10;                        /* Reserved */
+        } overlay4;
+    } word14;
+
+                                        /* T33.15: DMA Status 0 */
+    uint32  count:16,                   /* Transferred byte count */
+            end:1,                      /* End bit (RX) */
+            start:1,                    /* Start bit (RX) */
+            error:1,                    /* Cell Error (RX) */
+            :12,                        /* Reserved */
+            done:1;                     /* Descriptor Done */
+#else
+                                        /* T33.13 (word 1 in EP_TO_CPU_HDR) */
+    uint32  chg_ecn:1,                  /* ECN changed */
+            ecn:2,                      /* New ECN value */
+            mtp_index:5,                /* MTP index */
+            :1,                         /* Reserved */
+            loopback_pkt_type:3,        /* Loopback packet type */
+            timestamp_type:2,           /* Timestamp type */
+            bpdu:1,                     /* BPDU Packet */
+            do_not_change_ttl:1,        /* Do not change TTL */
+            special_pkt:1,              /* Special Packet indicator */
+            hg2_ext_hdr:1,              /* Extended Higig2 header valid */
+            replicated:1,               /* Replicated copy */
+            l3only:1,                   /* L3 only IPMC packet */
+            l3routed:1,                 /* Any IP routed packet */
+            src_hg:1,                   /* Source is Higig */
+            hg_type:1,                  /* 0: Higig+, 1: Higig2 */
+            all_switch_drop:1,          /* All switched copies dropped */
+            switch_pkt:1,               /* Switched packet */
+            service_tag:1,              /* SD tag present */
+            itag_action:2,              /* Ingress inner tag action */
+            otag_action:2,              /* Ingress outer tag action */
+            tag_status:2;               /* Ingress incoming tag status */
+
+    union {                             /* T33.14 (word 0 in EP_TO_CPU_HDR) */
+        uint32  timestamp_hi;           /* Timestamp upper bits */
+        struct {                        /* EH_TYPE_0 */
+            uint32  eh_type:4,
+                    os1588_done:1,
+                    :3,
+                    eh_seg_sel:3,
+                    eh_tag_type:2,
+                    :3,
+                    eh_queue_tag:16;
+        } overlay1;
+        struct {                        /* EH_TYPE_1 */
+            uint32  eh_type:4,
+                    os1588_done:1,
+                    classid_type:4,
+                    l3_iif:14,
+                    classid: 9;
+        } overlay2;
+        struct {                        /* EH_TYPE 2 */
+            uint32  eh_type:4,
+                    os1588_done:1,
+                    classid_type:4,
+                    classid:9,
+                    eh_queue_tag:14;
+        } overlay3;
+        struct {
+            uint32  :10,                        /* Reserved */
+                    rx_bfd_start_offset:8,      /* Rx BFD pkt start offset */
+                    rx_bfd_start_offset_type:2, /* Rx BFD pkt st offset type */
+                    rx_bfd_session_index:12;    /* Rx BFD pkt session ID */
+        } overlay4;
+    } word14;
+
+                                        /* T33.15: DMA Status 0 */
+    uint32  done:1,                     /* Descriptor Done */
+            :12,                        /* Reserved */
+            error:1,                    /* Cell Error (RX) */
+            start:1,                    /* Start bit (RX) */
+            end:1,                      /* End bit (RX) */
+            count:16;                   /* Transferred byte count */
+#endif
+} dcb33_t;
+
+#define SOC_CPU_OPCODE_TYPE_IP_0        0
+#define SOC_CPU_OPCODE_TYPE_IP_1        1
+#define SOC_CPU_OPCODE_TYPE_EP          2
+#define SOC_CPU_OPCODE_TYPE_NLF         3
+
+#endif /* _SOC_SHARED_DCBFOMATS_TYPE33_H */
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type34.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type34.h
new file mode 100644
index 000000000..1a8ff84f0
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type34.h
@@ -0,0 +1,251 @@
+/*
+ * $Id: $
+ * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * 
+ * Permission is granted to use, copy, modify and/or distribute this
+ * software under either one of the licenses below.
+ * 
+ * License Option 1: GPL
+ * 
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License, version 2, as
+ * published by the Free Software Foundation (the "GPL").
+ * 
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License version 2 (GPLv2) for more details.
+ * 
+ * You should have received a copy of the GNU General Public License
+ * version 2 (GPLv2) along with this source code.
+ * 
+ * 
+ * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
+ * 
+ * This software is governed by the Broadcom Open Network Switch APIs license:
+ * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+ * 
+ *
+ * File:        soc/shared/dcbformats/type34.h
+ * Purpose:     Define dma control block (DCB) format for a type34 DCB
+ *              used by the 56160 (Hurricane3)
+ *
+ *              This file is shared between the SDK and the embedded applications.
+ */
+
+#ifndef _SOC_SHARED_DCBFORMATS_TYPE34_H
+#define _SOC_SHARED_DCBFORMATS_TYPE34_H
+
+/*
+ * DMA Control Block - Type 34
+ * Used on 56160 devices
+ * 16 words
+ */
+typedef struct {
+        uint32  addr;                   /* T34.0: physical address */
+                                        /* T34.1: Control 0 */
+#ifdef  LE_HOST
+        uint32  c_count:16,             /* Requested byte count */
+                c_chain:1,              /* Chaining */
+                c_sg:1,                 /* Scatter Gather */
+                c_reload:1,             /* Reload */
+                c_hg:1,                 /* Higig (TX) */
+                c_stat:1,               /* Update stats (TX) */
+                c_pause:1,              /* Pause packet (TX) */
+                c_purge:1,              /* Purge packet (TX) */
+                :9;                     /* Don't care */
+#else
+        uint32  :9,                     /* Don't care */
+                c_purge:1,              /* Purge packet (TX) */
+                c_pause:1,              /* Pause packet (TX) */
+                c_stat:1,               /* Update stats (TX) */
+                c_hg:1,                 /* Higig (TX) */
+                c_reload:1,             /* Reload */
+                c_sg:1,                 /* Scatter Gather */
+                c_chain:1,              /* Chaining */
+                c_count:16;             /* Requested byte count */
+#endif  /* LE_HOST */
+        uint32  reason_hi;              /* T34.2: CPU opcode (hi bits) */
+        uint32  reason;                 /* T34.3: CPU opcode (low bits) */
+#ifdef  LE_HOST
+    union {                             /* T34.4 */
+        struct {
+            uint32  :16,                /* Reserved */
+                    cpu_opcode_type:4,  /* CPU opcode type */
+                    outer_vid:12;       /* Outer VLAN ID */
+        } overlay1;
+        struct {
+            uint32  cpu_cos:6,          /* CPU COS */
+                    regen_crc:1,        /* Packet modified and needs new CRC */
+                    :25;                /* Reserved */
+        } overlay2;
+    } word4;
+
+                                        /* T34.5 */
+        uint32  srcport:8,              /* Source port number */
+                pkt_len:14,             /* Packet length */
+                match_rule:8,           /* Matched FP rule */
+                hgi:2;                  /* Higig Interface Format Indicator */
+#else
+    union {                             /* T34.4 */
+        struct {
+            uint32  outer_vid:12,       /* Outer VLAN ID */
+                    cpu_opcode_type:4,  /* CPU opcode type */
+                    :16;                /* Reserved */
+        } overlay1;
+        struct {
+            uint32  :25,                /* Reserved */
+                    regen_crc:1,        /* Packet modified and needs new CRC */
+                    cpu_cos:6;          /* CPU COS */
+        } overlay2;
+    } word4;
+
+                                        /* T34.5 */
+        uint32  hgi:2,                  /* Higig Interface Format Indicator */
+                match_rule:8,           /* Matched FP rule */
+                pkt_len:14,             /* Packet length */
+                srcport:8;              /* Source port number */
+#endif
+
+        uint32  mh0;                    /* T34.6: Module Header word 0 */
+        uint32  mh1;                    /* T34.7: Module Header word 1 */
+        uint32  mh2;                    /* T34.8: Module Header word 2 */
+        uint32  mh3;                    /* T34.9: Module Header word 3 */
+#ifdef  LE_HOST
+                                        /* T34.10 */
+        uint32  inner_pri:3,            /* Inner priority */
+                repl_nhi:13,            /* Replication or Next Hop index */
+                :5,                     /* reserved.*/
+                shaping_cos_sel:2,      /* */                    
+                vfi_valid:1,            /* Validates VFI field */
+                em_mtp_index:4,         /* em mirror-to-port index */
+                oam_command:4;          /* Special packet type (OAM, BFD) */
+
+                                        /* T34.11 */
+        uint32  dscp:6,                 /* New DSCP (+ oam pkt type:3) */
+                chg_tos:1,              /* DSCP has been changed by HW */
+                imirror:1,              /* Ingress Mirroring PBE field*/
+                emirror:1,              /* Egress Mirroring, PBE field */
+                outer_cfi:1,            /* Outer Canoncial Format Indicator */
+                outer_pri:3,            /* Outer priority */
+                :5,                     /* Reserved */
+                inner_vid:12,           /* Inner VLAN ID */
+                inner_cfi:1,            /* Inner Canoncial Format Indicator */
+                replicated:1;           /* Replicated copy */
+
+    
+
+    union {                             /* T34.12 */
+        struct {
+            uint32  timestamp;          /* Timestamp */
+        } overlay1;
+        struct {
+            uint32  vfi:14,             /* VFI or FID */
+                    :18;                /* Reserved */
+        } overlay2;
+    } word12;
+
+                                        /* T34.13 */
+        uint32  itag_status:2,          /* Ingress Inner tag status */
+                otag_action:2,          /* Ingress Outer tag action */
+                itag_action:2,          /* Ingress Inner tag action */
+                service_tag:1,          /* SD tag present */
+                switch_pkt:1,           /* Switched packet */
+                hg_lookup:1,            /* Higig lookup */
+                hg_type:1,              /* 0: Higig+, 1: Higig2 */
+                src_hg:1,               /* Source is Higig */
+                l3routed:1,             /* Any IP routed packet */
+                l3only:1,               /* L3 only IPMC packet */
+                vntag_action:2,         /* VNTAG/ETAG*/
+                oam_pkt:1,              /* OAM Packet indicator */
+                do_not_change_ttl:1,    /* Do not change TTL */
+                bpdu:1,                 /* BPDU Packet */
+                timestamp_type:2,       /* Timestamp type */
+                cos:4,                  /* Port queue number */
+                mtp_index:5,            /* IM MTP index, PBE field */
+                ecn:2,                  /* New ECN value */
+                chg_ecn:1;              /* ECN changed */
+
+                                        /* T34.14 */
+        uint32  timestamp_hi;           /* Timestamp upper bits */
+
+                                        /* T34.15: DMA Status 0 */
+        uint32  count:16,               /* Transferred byte count */
+                end:1,                  /* End bit (RX) */
+                start:1,                /* Start bit (RX) */
+                error:1,                /* Cell Error (RX) */
+                :12,                    /* Reserved */
+                done:1;                 /* Descriptor Done */
+#else
+                                        /* T34.10 */
+        uint32  oam_command:4,          /* Special packet type (OAM, BFD) */
+                em_mtp_index:4,         /* em mirror-to-port index */
+                vfi_valid:1,            /* Validates VFI field */
+                shaping_cos_sel:2,      /* */
+                :5,                     /* reserved.*/
+                repl_nhi:13,            /* Replication or Next Hop index */
+                inner_pri:3;            /* Inner priority */
+
+                                        /* T34.11 */
+        uint32  replicated:1,           /* Replicated copy */
+                inner_cfi:1,            /* Inner Canoncial Format Indicator */
+                inner_vid:12,           /* Inner VLAN ID */
+                :5,                     /* Reserved */
+                outer_pri:3,            /* Outer priority */
+                outer_cfi:1,            /* Outer Canoncial Format Indicator */
+                emirror:1,              /* Egress Mirroring, PBE field */
+                imirror:1,              /* Ingress Mirroring PBE field*/
+                chg_tos:1,              /* DSCP has been changed by HW */
+                dscp:6;                 /* New DSCP (+ oam pkt type:3) */
+
+    union {                             /* T34.12 */
+        struct {
+            uint32  timestamp;          /* Timestamp */
+        } overlay1;
+        struct {
+            uint32  :18,                /* Reserved */
+                    vfi:14;             /* VFI or FID */
+        } overlay2;
+    } word12;
+
+                                        /* T34.13 */
+        uint32  chg_ecn:1,              /* ECN changed */
+                ecn:2,                  /* New ECN value */
+                mtp_index:5,            /* IM MTP index, PBE field */
+                cos:4,                  /* Port queue number */
+                timestamp_type:2,       /* Timestamp type */
+                bpdu:1,                 /* BPDU Packet */
+                do_not_change_ttl:1,    /* Do not change TTL */
+                oam_pkt:1,              /* OAM Packet indicator */
+                vntag_action:2,         /* VNTAG/ETAG*/
+                l3only:1,               /* L3 only IPMC packet */
+                l3routed:1,             /* Any IP routed packet */
+                src_hg:1,               /* Source is Higig */
+                hg_type:1,              /* 0: Higig+, 1: Higig2 */
+                hg_lookup:1,            /* Higig lookup */
+                switch_pkt:1,           /* Switched packet */
+                service_tag:1,          /* SD tag present */
+                itag_action:2,          /* Ingress Inner tag action */
+                otag_action:2,          /* Ingress Outer tag action */
+                itag_status:2;          /* Ingress Inner tag status */
+
+    
+        uint32  timestamp_hi;           /* Timestamp upper bits */    
+
+                                        /* T34.15: DMA Status 0 */
+        uint32  done:1,                 /* Descriptor Done */
+                :12,                    /* Reserved */
+                error:1,                /* Cell Error (RX) */
+                start:1,                /* Start bit (RX) */
+                end:1,                  /* End bit (RX) */
+                count:16;               /* Transferred byte count */
+#endif
+} dcb34_t;
+
+#define SOC_CPU_OPCODE_TYPE_IP_0        0
+#define SOC_CPU_OPCODE_TYPE_IP_1        1
+#define SOC_CPU_OPCODE_TYPE_EP          2
+#define SOC_CPU_OPCODE_TYPE_NLF         3
+
+#endif
+
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type35.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type35.h
new file mode 100644
index 000000000..b201ed2cc
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type35.h
@@ -0,0 +1,328 @@
+/*
+ * $Id$
+ * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * 
+ * Permission is granted to use, copy, modify and/or distribute this
+ * software under either one of the licenses below.
+ * 
+ * License Option 1: GPL
+ * 
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License, version 2, as
+ * published by the Free Software Foundation (the "GPL").
+ * 
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License version 2 (GPLv2) for more details.
+ * 
+ * You should have received a copy of the GNU General Public License
+ * version 2 (GPLv2) along with this source code.
+ * 
+ * 
+ * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
+ * 
+ * This software is governed by the Broadcom Open Network Switch APIs license:
+ * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+ * 
+ *
+ * File:        soc/shared/dcbformats/type35.h
+ * Purpose:     Define dma control block (DCB) format for a type35 DCB
+ *              used by the 56560 (APACHE)
+ *
+ *              This file is shared between the SDK and the embedded applications.
+ */
+
+#ifndef _SOC_SHARED_DCBFORMATS_TYPE35_H
+#define _SOC_SHARED_DCBFORMATS_TYPE35_H
+
+/*
+ * DMA Control Block - Type 35
+ * Used on 56560 devices
+ * 16 words
+ */
+typedef struct {
+    uint32  addr;                       /* T32.0: physical address */
+                                        /* T32.1: Control 0 */
+#ifdef  LE_HOST
+    uint32  c_count:16,                 /* Requested byte count */
+            c_chain:1,                  /* Chaining */
+            c_sg:1,                     /* Scatter Gather */
+            c_reload:1,                 /* Reload */
+            c_hg:1,                     /* Higig (TX) */
+            c_stat:1,                   /* Update stats (TX) */
+            c_pause:1,                  /* Pause packet (TX) */
+            c_purge:1,                  /* Purge packet (TX) */
+            :9;                         /* Don't care */
+#else
+    uint32  :9,                         /* Don't care */
+            c_purge:1,                  /* Purge packet (TX) */
+            c_pause:1,                  /* Pause packet (TX) */
+            c_stat:1,                   /* Update stats (TX) */
+            c_hg:1,                     /* Higig (TX) */
+            c_reload:1,                 /* Reload */
+            c_sg:1,                     /* Scatter Gather */
+            c_chain:1,                  /* Chaining */
+            c_count:16;                 /* Requested byte count */
+#endif  /* LE_HOST */
+
+                                        /* T32.2 (word 12 in EP_TO_CPU_HDR) */
+    uint32  reason_hi;                  /* CPU opcode (hi bits) */
+                                        /* T32.3 (word 11 in EP_TO_CPU_HDR) */
+    uint32  reason;                     /* CPU opcode (low bits) */
+
+#ifdef  LE_HOST
+    union {                             /* T26.4 (word 10 in EP_TO_CPU_HDR) */
+        struct {
+            uint32  queue_num:15,       /* Queue number for CPU packets */
+                    ep_mirror:1,        /* EP_MIRROR */
+                    cpu_opcode_type:4,  /* CPU opcode type */
+                    outer_vid:12;       /* Outer VLAN ID */
+        } overlay1;
+        struct {
+            uint32  cpu_cos:6,          /* CPU COS */
+                    :10,                /* Reserved */
+                    cpu_opcode_type:4,  /* CPU opcode type */
+                    outer_vid:12;       /* Outer VLAN ID */
+        } overlay2;
+    } word4;
+
+                                        /* T26.5 (word 9 in EP_TO_CPU_HDR) */
+    uint32  srcport:7,                  /* Source port number */
+            :1,                         /* Reserved */
+            pkt_len:14,                 /* Packet length */
+            match_rule:8,               /* Matched FP rule */
+            hgi:2;                      /* Higig Interface Format Indicator */
+#else
+    union {                             /* T26.4 (word 10 in EP_TO_CPU_HDR) */
+        struct {
+            uint32  outer_vid:12,       /* Outer VLAN ID */
+                    cpu_opcode_type:4,  /* CPU opcode type */
+                    ep_mirror:1,        /* EP_MIRROR */
+                    queue_num:15;       /* Queue number for CPU packets */
+        } overlay1;
+        struct {
+            uint32  outer_vid:12,       /* Outer VLAN ID */
+                    cpu_opcode_type:4,  /* CPU opcode type */
+                    :10,                /* Reserved */
+                    cpu_cos:6;          /* CPU COS */
+        } overlay2;
+    } word4;
+
+                                        /* T26.5 (word 9 in EP_TO_CPU_HDR) */
+    uint32  hgi:2,                      /* Higig Interface Format Indicator */
+            match_rule:8,               /* Matched FP rule */
+            pkt_len:14,                 /* Packet length */
+            :1,                         /* Reserved */
+            srcport:7;                  /* Source port number */
+#endif
+                                        /* T32.6 (word 8 in EP_TO_CPU_HDR) */
+    uint32  mh0;                        /* Module Header word 0 */
+                                        /* T32.7 (word 7 in EP_TO_CPU_HDR) */
+    uint32  mh1;                        /* Module Header word 1 */
+                                        /* T32.8 (word 6 in EP_TO_CPU_HDR) */
+    uint32  mh2;                        /* Module Header word 2 */
+                                        /* T32.9 (word 5 in EP_TO_CPU_HDR) */
+    uint32  mh3;                        /* Module Header word 3 */
+
+#ifdef  LE_HOST
+                                        /* T32.10 (word 4 in EP_TO_CPU_HDR) */
+    uint32  inner_pri:3,                /* Inner priority */
+            dvp_nhi_sel:1,              /* DVP overlay indicator */
+            regen_crc:1,                /* Packet modified and needs new CRC */
+            repl_nhi:17,                /* Replication or Next Hop index */
+            :2,                         /* Reserved */
+            vfi_valid:1,                /* Validates VFI field */
+            olp_encap_oam_pkt:1,        /* OLP encapsulated OAM packet */
+            :6;                         /* Reserved */
+
+    union {                                     /* T33.11 (word 3 in EP_TO_CPU_HDR) */
+        struct {
+            uint32  dscp:6,                     /* New DSCP */
+                    chg_tos:1,                  /* DSCP has been changed by HW */
+                    vntag_action:2,             /* VN tag action */
+                    outer_cfi:1,                /* Outer Canoncial Format Indicator */
+                    outer_pri:3,                /* Outer priority */
+                    decap_tunnel_type:4,        /* Tunnel type that was decapsulated */
+                    :1,                         /* Reserved */
+                    inner_vid:12,               /* Inner VLAN ID */
+                    inner_cfi:1,                /* Inner Canoncial Format Indicator */
+                    mcq:1;                      /* Multicast queue */
+        } overlay1;
+
+        struct {
+            uint32  special_pkt_type:3, /* Special packet type (OAM, BFD) */
+                    :29;
+        } overlay2;
+    } word3;
+#else
+                                        /* T32.10 (word 4 in EP_TO_CPU_HDR) */
+    uint32  :6,                         /* Reserved */
+            olp_encap_oam_pkt:1,        /* OLP encapsulated OAM packet */
+            vfi_valid:1,                /* Validates VFI field */
+            :2,                         /* Reserved */
+            repl_nhi:17,                /* Replication or Next Hop index */
+            regen_crc:1,                /* Packet modified and needs new CRC */
+            dvp_nhi_sel:1,              /* DVP overlay indicator */
+            inner_pri:3;                /* Inner priority */
+
+    union {                                 /* T33.11 (word 3 in EP_TO_CPU_HDR) */
+        struct {
+            uint32  mcq:1,                      /* Multicast queue */
+                inner_cfi:1,                /* Inner Canoncial Format Indicator */
+                inner_vid:12,               /* Inner VLAN ID */
+                :1,                         /* Reserved */
+                decap_tunnel_type:4,        /* Tunnel type that was decapsulated */
+                outer_pri:3,                /* Outer priority */
+                outer_cfi:1,                /* Outer Canoncial Format Indicator */
+                vntag_action:2,             /* VN tag action */
+                chg_tos:1,                  /* DSCP has been changed by HW */
+                dscp:6;                     /* New DSCP */
+        } overlay1;
+
+        struct {
+            uint32  :29,
+                    special_pkt_type:3;
+        } overlay2;
+    } word3;
+#endif
+                                        /* T32.12 (word 2 in EP_TO_CPU_HDR) */
+    uint32  timestamp;                  /* Timestamp */
+
+#ifdef  LE_HOST
+                                        /* T32.13 (word 1 in EP_TO_CPU_HDR) */
+    uint32  tag_status:2,               /* Ingress incoming tag status */
+            otag_action:2,              /* Ingress outer tag action */
+            itag_action:2,              /* Ingress inner tag action */
+            service_tag:1,              /* SD tag present */
+            switch_pkt:1,               /* Switched packet */
+            all_switch_drop:1,          /* All switched copies dropped */
+            hg_type:1,                  /* 0: Higig+, 1: Higig2 */
+            src_hg:1,                   /* Source is Higig */
+            l3routed:1,                 /* Any IP routed packet */
+            l3only:1,                   /* L3 only IPMC packet */
+            replicated:1,               /* Replicated copy */
+            hg2_ext_hdr:1,              /* Extended Higig2 header valid */
+            special_pkt:1,              /* Special Packet indicator */
+            do_not_change_ttl:1,        /* Do not change TTL */
+            bpdu:1,                     /* BPDU Packet */
+            timestamp_type:2,           /* Timestamp type */
+            loopback_pkt_type:3,        /* Loopback packet type */
+            :1,                         /* Reserved */
+            mtp_index:5,                /* MTP index */
+            ecn:2,                      /* New ECN value */
+            chg_ecn:1;                  /* ECN changed */
+
+    union {                             /* T32.14 (word 0 in EP_TO_CPU_HDR) */
+        uint32  timestamp_hi;           /* Timestamp upper bits */
+        struct {                        /* EH_TYPE_0 */
+            uint32  eh_queue_tag:16,
+                    :3,
+                    eh_tag_type:2,
+                    eh_seg_sel:3,
+                    :3,
+                    os1588_done:1,
+                    eh_type:4;
+        } overlay1;
+        struct {                        /* EH_TYPE_1 */
+            uint32  classid: 9,
+                    l3_iif:14,
+                    classid_type:4,
+                    os1588_done:1,
+                    eh_type:4;
+        } overlay2;
+        struct {                        /* EH_TYPE 2 */
+            uint32  eh_queue_tag: 14,
+                    classid:9,
+                    classid_type:4,
+                    os1588_done:1,
+                    eh_type:4;
+        } overlay3;
+        struct {
+            uint32  rx_bfd_session_index:12,    /* Rx BFD pkt session ID */
+                    rx_bfd_start_offset_type:2, /* Rx BFD pkt st offset type */
+                    rx_bfd_start_offset:8,      /* Rx BFD pkt start offset */
+                    :10;                        /* Reserved */
+        } overlay4;
+    } word14;
+
+                                        /* T32.15: DMA Status 0 */
+    uint32  count:16,                   /* Transferred byte count */
+            end:1,                      /* End bit (RX) */
+            start:1,                    /* Start bit (RX) */
+            error:1,                    /* Cell Error (RX) */
+            :12,                        /* Reserved */
+            done:1;                     /* Descriptor Done */
+#else
+                                        /* T32.13 (word 1 in EP_TO_CPU_HDR) */
+    uint32  chg_ecn:1,                  /* ECN changed */
+            ecn:2,                      /* New ECN value */
+            mtp_index:5,                /* MTP index */
+            :1,                         /* Reserved */
+            loopback_pkt_type:3,        /* Loopback packet type */
+            timestamp_type:2,           /* Timestamp type */
+            bpdu:1,                     /* BPDU Packet */
+            do_not_change_ttl:1,        /* Do not change TTL */
+            special_pkt:1,              /* Special Packet indicator */
+            hg2_ext_hdr:1,              /* Extended Higig2 header valid */
+            replicated:1,               /* Replicated copy */
+            l3only:1,                   /* L3 only IPMC packet */
+            l3routed:1,                 /* Any IP routed packet */
+            src_hg:1,                   /* Source is Higig */
+            hg_type:1,                  /* 0: Higig+, 1: Higig2 */
+            all_switch_drop:1,          /* All switched copies dropped */
+            switch_pkt:1,               /* Switched packet */
+            service_tag:1,              /* SD tag present */
+            itag_action:2,              /* Ingress inner tag action */
+            otag_action:2,              /* Ingress outer tag action */
+            tag_status:2;               /* Ingress incoming tag status */
+
+    union {                             /* T32.14 (word 0 in EP_TO_CPU_HDR) */
+        uint32  timestamp_hi;           /* Timestamp upper bits */
+        struct {                        /* EH_TYPE_0 */
+            uint32  eh_type:4,
+                    os1588_done:1,
+                    :3,
+                    eh_seg_sel:3,
+                    eh_tag_type:2,
+                    :3,
+                    eh_queue_tag:16;
+        } overlay1;
+        struct {                        /* EH_TYPE_1 */
+            uint32  eh_type:4,
+                    os1588_done:1,
+                    classid_type:4,
+                    l3_iif:14,
+                    classid: 9;
+        } overlay2;
+        struct {                        /* EH_TYPE 2 */
+            uint32  eh_type:4,
+                    os1588_done:1,
+                    classid_type:4,
+                    classid:9,
+                    eh_queue_tag:14;
+        } overlay3;
+        struct {
+            uint32  :10,                        /* Reserved */
+                    rx_bfd_start_offset:8,      /* Rx BFD pkt start offset */
+                    rx_bfd_start_offset_type:2, /* Rx BFD pkt st offset type */
+                    rx_bfd_session_index:12;    /* Rx BFD pkt session ID */
+        } overlay4;
+    } word14;
+
+                                        /* T32.15: DMA Status 0 */
+    uint32  done:1,                     /* Descriptor Done */
+            :12,                        /* Reserved */
+            error:1,                    /* Cell Error (RX) */
+            start:1,                    /* Start bit (RX) */
+            end:1,                      /* End bit (RX) */
+            count:16;                   /* Transferred byte count */
+#endif
+} dcb35_t;
+
+#define SOC_CPU_OPCODE_TYPE_IP_0        0
+#define SOC_CPU_OPCODE_TYPE_IP_1        1
+#define SOC_CPU_OPCODE_TYPE_EP          2
+#define SOC_CPU_OPCODE_TYPE_NLF         3
+
+#endif /* _SOC_SHARED_DCBFORMATS_TYPE35_H */
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type36.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type36.h
new file mode 100644
index 000000000..5c9b3b499
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type36.h
@@ -0,0 +1,358 @@
+/*
+ * $Id: $
+ * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * 
+ * Permission is granted to use, copy, modify and/or distribute this
+ * software under either one of the licenses below.
+ * 
+ * License Option 1: GPL
+ * 
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License, version 2, as
+ * published by the Free Software Foundation (the "GPL").
+ * 
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License version 2 (GPLv2) for more details.
+ * 
+ * You should have received a copy of the GNU General Public License
+ * version 2 (GPLv2) along with this source code.
+ * 
+ * 
+ * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
+ * 
+ * This software is governed by the Broadcom Open Network Switch APIs license:
+ * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+ * 
+ *
+ * File:        soc/shared/dcbformats/type36.h
+ * Purpose:     Define dma control block (DCB) format for a type36 DCB
+ *              used by the 56870 (Trident 3)
+ *
+ *              This file is shared between the SDK and the embedded applications.
+ */
+
+#ifndef _SOC_SHARED_DCBFORMATS_TYPE36_H
+#define _SOC_SHARED_DCBFORMATS_TYPE36_H
+
+/*
+ * DMA Control Block - Type 36
+ * Used on 56870 devices
+ * 4 words
+ */
+typedef struct {
+    uint32  addr_lo;                    /* T36.0: physical address, lower 32 bits */
+    uint32  addr_hi;                    /* T36.0: physical address, upper 32 bits */
+
+#ifdef  LE_HOST
+    uint32  c_count:16,                 /* Requested byte count */
+            c_chain:1,                  /* Chaining */
+            c_sg:1,                     /* Scatter Gather */
+            c_reload:1,                 /* Reload */
+            c_hg:1,                     /* Higig (TX) */
+            :2,                         /* reserved */
+            c_purge:1,                  /* Purge packet (TX) */
+            c_intr:2,                   /* Desc Intr Mode */
+            c_desc:4,                   /* descriptors remaining */
+            c_desc_status:1,            /* disable descriptor status write */
+            :2;                         /* reserved */
+#else
+    uint32  :2,                         /* resered */
+            c_desc_status:1,            /* disable descriptor status write */
+            c_desc:4,                   /* descriptors remaining */
+            c_intr:2,                   /* Desc Intr Mode */
+            c_purge:1,                  /* Purge packet (TX) */
+            :2,                         /* reserved */
+            c_hg:1,                     /* Higig (TX) */
+            c_reload:1,                 /* Reload */
+            c_sg:1,                     /* Scatter Gather */
+            c_chain:1,                  /* Chaining */
+            c_count:16;                 /* Requested byte count */
+#endif  /* LE_HOST */
+
+#ifdef  LE_HOST
+    uint32  count:16,                   /* Transferred byte count */
+            end:1,                      /* End bit (RX) */
+            start:1,                    /* Start bit (RX) */
+            error:1,                    /* Cell Error (RX) */
+            ecc_error:1,                /* packet ECC Error (RX) */
+            :11,                        /* Reserved */
+            done:1;                     /* Descriptor Done */
+#else
+    uint32  done:1,                     /* Descriptor Done */
+            :11,                        /* Reserved */
+            ecc_error:1,                /* Packet ECC Error (RX) */
+            error:1,                    /* Cell Error (RX) */
+            start:1,                    /* Start bit (RX) */
+            end:1,                      /* End bit (RX) */
+            count:16;                   /* Transferred byte count */
+#endif
+} dcb36_t;
+
+typedef struct {
+    uint32  mh0;                        /* Module Header word 0 */
+                                        /* (word 14 in EP_TO_CPU_HDR) */
+    uint32  mh1;                        /* Module Header word 1 */
+                                        /* (word 13 in EP_TO_CPU_HDR) */
+    uint32  mh2;                        /* Module Header word 2 */
+                                        /* (word 12 in EP_TO_CPU_HDR) */
+    uint32  mh3;                        /* Module Header word 3 */
+                                        /* (word 11 in EP_TO_CPU_HDR) */
+
+                                        /* (word 10 in EP_TO_CPU_HDR) */
+                                        /* word 9 in EP_TO_CPU_COMPOSITES_BUS */
+    uint32  reason_hi;                  /* CPU opcode (hi bits) */
+
+                                        /* (word 9 in EP_TO_CPU_HDR) */
+                                        /* word 8 in EP_TO_CPU_COMPOSITES_BUS */
+    uint32  reason;                     /* CPU opcode (low bits) */
+
+#ifdef  LE_HOST
+                                        /* (word 8 in EP_TO_CPU_HDR) */
+                                        /* word 7 in EP_TO_CPU_COMPOSITES_BUS */
+    union {
+        struct {
+            uint32  srcport:8,          /* Source port number */
+                    pkt_len:14,         /* Packet length */
+                    cpu_cos:6,          /* CPU COS*/
+                    ecn:2,              /* New ECN value */
+                    chg_ecn:1,          /* ECN changed */
+                    bfd_session_index_valid:1;  /* Indicate a BFD terminated packet */
+        } overlay1;
+        struct {
+            uint32  srcport:8,          /* Source port number */
+                    pkt_len:14,         /* Packet length */
+                    queue_num:6,        /* MMU COS*/
+                    ecn:2,              /* New ECN value */
+                    chg_ecn:1,          /* ECN changed */
+                    bfd_session_index_valid:1;  /* Indicate a BFD terminated packet */
+        } overlay2;
+    } word8;
+
+#else
+                                        /* (word 8 in EP_TO_CPU_HDR) */
+                                        /* word 7 in EP_TO_CPU_COMPOSITES_BUS */
+    union {
+        struct {
+            uint32  bfd_session_index_valid:1,  /* Indicate a BFD terminated packet */
+                    chg_ecn:1,          /* ECN changed */
+                    ecn:2,              /* New ECN value */
+                    cpu_cos:6,          /* CPU COS*/
+                    pkt_len:14,         /* Packet length */
+                    srcport:8;          /* Source port number */
+        } overlay1;
+        struct {
+            uint32  bfd_session_index_valid:1,  /* Indicate a BFD terminated packet */
+                    chg_ecn:1,          /* ECN changed */
+                    ecn:2,              /* New ECN value */
+                    queue_num:6,        /* MMU COS*/
+                    pkt_len:14,         /* Packet length */
+                    srcport:8;          /* Source port number */
+        } overlay2;
+    } word8;
+#endif
+
+
+#ifdef  LE_HOST
+                                        /* (word 7 in EP_TO_CPU_HDR) */
+                                        /* word 6 in EP_TO_CPU_COMPOSITES_BUS */
+    uint32  nhi_a_hi:7,                 /* NEXT_HOP_INDEX_A (Underlay) */
+            nhi_type:2,                 /* Type for NEXT_HOP_INDEX_A and B */
+            match_rule:8,               /* Matched FP rule */
+            forwarding_type:2,          /* Packet forwarding type */
+            ucq:1,                      /* Unicast queue */
+            outer_vid:12;               /* Outer VLAN ID */
+
+                                        /* (word 6 in EP_TO_CPU_HDR) */
+                                        /* word 5 in EP_TO_CPU_COMPOSITES_BUS */
+
+    union {
+        struct {
+            uint32  outer_pri:3,                /* Outer priority */
+                    inner_cfi:1,                /* Inner Canoncial Format Indicator */
+                    inner_pri:3,                /* Inner priority */
+                    nhi_b:16,                   /* NEXT_HOP_INDEX_B (Overlay) */
+                    nhi_a_lo:9;                 /* NEXT_HOP_INDEX_A (Underlay) */
+        } overlay1;
+        struct {
+            uint32  outer_pri:3,                /* Outer priority */
+                    inner_cfi:1,                /* Inner Canoncial Format Indicator */
+                    inner_pri:3,                /* Inner priority */
+                    bfd_session_index:12,       /* Indicates the Session ID for the Rx BFD packet */
+                    :4,                         /* Reserved */
+                    nhi_a_lo:9;                 /* NEXT_HOP_INDEX_A (Underlay) */
+        } overlay2;
+    } word6;                                    /* (word 5 in EP_TO_CPU_HDR) */
+                                        /* word 4 in EP_TO_CPU_COMPOSITES_BUS */
+    uint32  mtp_index:5,                /* MTP index */
+            dscp:6,                     /* New DSCP */
+            chg_tos:1,                  /* DSCP has been changed by HW */
+            vntag_action:2,             /* VN tag action */
+            outer_cfi:1,                /* Outer Canoncial Format Indicator */
+            decap_tunnel_type:5,        /* Tunnel type that was decapsulated */
+            inner_vid:12;               /* Inner VLAN ID */
+
+#else
+                                        /* (word 7 in EP_TO_CPU_HDR) */
+                                        /* word 6 in EP_TO_CPU_COMPOSITES_BUS */
+    uint32  outer_vid:12,               /* Outer VLAN ID */
+            ucq:1,                      /* Unicast queue */
+            forwarding_type:2,          /* Packet forwarding type */
+            match_rule:8,               /* Matched FP rule */
+            nhi_type:2,                 /* Type for NEXT_HOP_INDEX_A and B */
+            nhi_a_hi:7;                 /* NEXT_HOP_INDEX_A (Underlay) */
+
+                                        /* (word 6 in EP_TO_CPU_HDR) */
+                                        /* word 5 in EP_TO_CPU_COMPOSITES_BUS */
+    union {
+        struct {
+            uint32  nhi_a_lo:9,                 /* NEXT_HOP_INDEX_A (Underlay) */
+                    nhi_b:16,                   /* NEXT_HOP_INDEX_B (Overlay) */
+                    inner_pri:3,                /* Inner priority */
+                    inner_cfi:1,                /* Inner Canoncial Format Indicator */
+                    outer_pri:3;                /* Outer priority */
+        } overlay1;
+        struct {
+            uint32  nhi_a_lo:9,                 /* NEXT_HOP_INDEX_A (Underlay) */
+                    :4,                         /* Reserved */
+                    bfd_session_index:12,       /* Indicates the Session ID for the Rx BFD packet */
+                    inner_pri:3,                /* Inner priority */
+                    inner_cfi:1,                /* Inner Canoncial Format Indicator */
+                    outer_pri:3;                /* Outer priority */
+        } overlay2;
+
+    } word6;
+                                        /* (word 5 in EP_TO_CPU_HDR) */
+                                        /* word 4 in EP_TO_CPU_COMPOSITES_BUS */
+    uint32  inner_vid:12,               /* Inner VLAN ID */
+            decap_tunnel_type:5,        /* Tunnel type that was decapsulated */
+            outer_cfi:1,                /* Outer Canoncial Format Indicator */
+            vntag_action:2,             /* VN tag action */
+            chg_tos:1,                  /* DSCP has been changed by HW */
+            dscp:6,                     /* New DSCP */
+            mtp_index:5;                /* MTP index */
+#endif
+
+                                        /* (word 4 in EP_TO_CPU_HDR) */
+                                        /* word 3 in EP_TO_CPU_COMPOSITES_BUS */
+    uint32  timestamp;                  /* Timestamp */
+
+#ifdef  LE_HOST
+                                        /* (word 3 in EP_TO_CPU_HDR) */
+                                        /* word 2 in EP_TO_CPU_COMPOSITES_BUS */
+    uint32  bpdu:1,                     /* BPDU Packet */
+            :2,                         /* Reserved */
+            hg_lookup_pkt:1,            /* Higig Lookup Packet */
+            vrf:12,                     /* VRF */
+            timestamp_type:2,           /* Timestamp type */
+            l3_iif:14;                  /* L3 IIF */
+
+                                        /* (word 2 in EP_TO_CPU_HDR) */
+                                        /* word 1 in EP_TO_CPU_COMPOSITES_BUS*/
+    uint32  match_id_hi:18,             /* Packet MATCH_ID upper bits*/
+            otag_action:2,              /* Ingress outer tag action */
+            itag_action:2,              /* Ingress inner tag action */
+            service_tag:1,              /* SD tag present */
+            switch_pkt:1,               /* Switched packet */
+            uc_switch_drop:1,           /* Unicast switched copies dropped */
+            src_hg:1,                   /* Source is Higig */
+            forwarding_zone_id:3,       /* Indicates packet was routed - UC or MC */
+            l3only:1,                   /* L3 only IPMC packet */
+            replicated:1,               /* Replicated copy */
+            do_not_change_ttl:1;        /* Do not change TTL */
+
+                                        /* (word 1 in EP_TO_CPU_HDR) */
+                                        /* word 0 in EP_TO_CPU_COMPOSITES_BUS*/
+    uint32  match_id_lo;                /* Packet MATCH_ID lower bits*/
+
+    union {                             /* (word 0 in EP_TO_CPU_HDR) */
+        struct {                        /* EH_TYPE_0 */
+            uint32  eh_queue_tag:16,
+                    :3,
+                    eh_tag_type:2,
+                    eh_seg_sel:3,
+                    :3,
+                    os1588_done:1,
+                    eh_type:4;
+        } overlay1;
+        struct {                        /* EH_TYPE_1 */
+            uint32  classid: 9,
+                    l3_iif:14,
+                    classid_type:4,
+                    os1588_done:1,
+                    eh_type:4;
+        } overlay2;
+        struct {                        /* EH_TYPE 2 */
+            uint32  eh_queue_tag: 14,
+                    classid:9,
+                    classid_type:4,
+                    os1588_done:1,
+                    eh_type:4;
+        } overlay3;
+    } word16;
+
+#else
+                                        /* (word 3 in EP_TO_CPU_HDR) */
+                                        /* word 2 in EP_TO_CPU_COMPOSITES_BUS */
+    uint32  l3_iif:14,                  /* L3 IIF */
+            timestamp_type:2,           /* Timestamp type */
+            vrf:12,                     /* VRF */
+            hg_lookup_pkt:1,            /* Higig Lookup Packet */
+            :2,                         /* Reserved */
+            bpdu:1;                     /* BPDU Packet */
+
+                                        /* (word 2 in EP_TO_CPU_HDR) */
+                                        /* word 1 in EP_TO_CPU_COMPOSITES_BUS*/
+    uint32  do_not_change_ttl:1,        /* Do not change TTL */
+            replicated:1,               /* Replicated copy */
+            l3only:1,                   /* L3 only IPMC packet */
+            forwarding_zone_id:3,       /* Indicates packet was routed - UC or MC */
+            src_hg:1,                   /* Source is Higig */
+            uc_switch_drop:1,           /* Unicast switched copies dropped */
+            switch_pkt:1,               /* Switched packet */
+            service_tag:1,              /* SD tag present */
+            itag_action:2,              /* Ingress inner tag action */
+            otag_action:2,              /* Ingress outer tag action */
+            match_id_hi:18;             /* Packet MATCH_ID upper bits*/
+
+                                        /* (word 1 in EP_TO_CPU_HDR) */
+                                        /* word 0 in EP_TO_CPU_COMPOSITES_BUS*/
+    uint32  match_id_lo;                /* Packet MATCH_ID lower bits*/
+
+    union {                             /* (word 0 in EP_TO_CPU_HDR) */
+        struct {                        /* EH_TYPE_0 */
+            uint32  eh_type:4,
+                    os1588_done:1,
+                    :3,
+                    eh_seg_sel:3,
+                    eh_tag_type:2,
+                    :3,
+                    eh_queue_tag:16;
+        } overlay1;
+        struct {                        /* EH_TYPE_1 */
+            uint32  eh_type:4,
+                    os1588_done:1,
+                    classid_type:4,
+                    l3_iif:14,
+                    classid: 9;
+        } overlay2;
+        struct {                        /* EH_TYPE 2 */
+            uint32  eh_type:4,
+                    os1588_done:1,
+                    classid_type:4,
+                    classid:9,
+                    eh_queue_tag:14;
+        } overlay3;
+    } word16;
+#endif
+
+    uint32 rsvd;                        /* padding to get header to 16 words */
+} ep_to_cpu_hdr36_t;
+
+#define SOC_CPU_OPCODE_TYPE_IP_0        0
+#define SOC_CPU_OPCODE_TYPE_IP_1        1
+#define SOC_CPU_OPCODE_TYPE_EP          2
+#define SOC_CPU_OPCODE_TYPE_NLF         3
+
+#endif /* _SOC_SHARED_DCBFORMATS_TYPE36_H */
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type37.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type37.h
new file mode 100644
index 000000000..846c5f678
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type37.h
@@ -0,0 +1,251 @@
+/*
+ * $Id: $
+ * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * 
+ * Permission is granted to use, copy, modify and/or distribute this
+ * software under either one of the licenses below.
+ * 
+ * License Option 1: GPL
+ * 
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License, version 2, as
+ * published by the Free Software Foundation (the "GPL").
+ * 
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License version 2 (GPLv2) for more details.
+ * 
+ * You should have received a copy of the GNU General Public License
+ * version 2 (GPLv2) along with this source code.
+ * 
+ * 
+ * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
+ * 
+ * This software is governed by the Broadcom Open Network Switch APIs license:
+ * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+ * 
+ *
+ * File:        soc/shared/dcbformats/type37.h
+ * Purpose:     Define dma control block (DCB) format for a type37 DCB
+ *              used by the 53570 (Greyhound2)
+ *
+ *              This file is shared between the SDK and the embedded applications.
+ */
+
+#ifndef _SOC_SHARED_DCBFORMATS_TYPE37_H
+#define _SOC_SHARED_DCBFORMATS_TYPE37_H
+
+/*
+ * DMA Control Block - Type 37
+ * Used on 53570 devices
+ * 16 words
+ */
+typedef struct {
+        uint32  addr;                   /* T37.0: physical address */
+                                        /* T37.1: Control 0 */
+#ifdef  LE_HOST
+        uint32  c_count:16,             /* Requested byte count */
+                c_chain:1,              /* Chaining */
+                c_sg:1,                 /* Scatter Gather */
+                c_reload:1,             /* Reload */
+                c_hg:1,                 /* Higig (TX) */
+                c_stat:1,               /* Update stats (TX) */
+                c_pause:1,              /* Pause packet (TX) */
+                c_purge:1,              /* Purge packet (TX) */
+                :9;                     /* Don't care */
+#else
+        uint32  :9,                     /* Don't care */
+                c_purge:1,              /* Purge packet (TX) */
+                c_pause:1,              /* Pause packet (TX) */
+                c_stat:1,               /* Update stats (TX) */
+                c_hg:1,                 /* Higig (TX) */
+                c_reload:1,             /* Reload */
+                c_sg:1,                 /* Scatter Gather */
+                c_chain:1,              /* Chaining */
+                c_count:16;             /* Requested byte count */
+#endif  /* LE_HOST */
+        uint32  reason_hi;              /* T37.2: CPU opcode (hi bits) */
+        uint32  reason;                 /* T37.3: CPU opcode (low bits) */
+#ifdef  LE_HOST
+    union {                             /* T37.4 */
+        struct {
+            uint32  :16,                /* Reserved */
+                    cpu_opcode_type:4,  /* CPU opcode type */
+                    outer_vid:12;       /* Outer VLAN ID */
+        } overlay1;
+        struct {
+            uint32  cpu_cos:6,          /* CPU COS */
+                    regen_crc:1,        /* Packet modified and needs new CRC */
+                    :25;                /* Reserved */
+        } overlay2;
+    } word4;
+
+                                        /* T37.5 */
+        uint32  srcport:8,              /* Source port number */
+                pkt_len:14,             /* Packet length */
+                match_rule:8,           /* Matched FP rule */
+                hgi:2;                  /* Higig Interface Format Indicator */
+#else
+    union {                             /* T37.4 */
+        struct {
+            uint32  outer_vid:12,       /* Outer VLAN ID */
+                    cpu_opcode_type:4,  /* CPU opcode type */
+                    :16;                /* Reserved */
+        } overlay1;
+        struct {
+            uint32  :25,                /* Reserved */
+                    regen_crc:1,        /* Packet modified and needs new CRC */
+                    cpu_cos:6;          /* CPU COS */
+        } overlay2;
+    } word4;
+
+                                        /* T37.5 */
+        uint32  hgi:2,                  /* Higig Interface Format Indicator */
+                match_rule:8,           /* Matched FP rule */
+                pkt_len:14,             /* Packet length */
+                srcport:8;              /* Source port number */
+#endif
+
+        uint32  mh0;                    /* T37.6: Module Header word 0 */
+        uint32  mh1;                    /* T37.7: Module Header word 1 */
+        uint32  mh2;                    /* T37.8: Module Header word 2 */
+        uint32  mh3;                    /* T37.9: Module Header word 3 */
+#ifdef  LE_HOST
+                                        /* T37.10 */
+        uint32  inner_pri:3,            /* Inner priority */
+                repl_nhi:13,            /* Replication or Next Hop index */
+                :5,                     /* reserved.*/
+                shaping_cos_sel:2,      /* */
+                vfi_valid:1,            /* Validates VFI field */
+                em_mtp_index:4,         /* em mirror-to-port index */
+                oam_command:4;          /* Special packet type (OAM, BFD) */
+
+                                        /* T37.11 */
+        uint32  dscp:6,                 /* New DSCP (+ oam pkt type:3) */
+                chg_tos:1,              /* DSCP has been changed by HW */
+                imirror:1,              /* Ingress Mirroring PBE field*/
+                emirror:1,              /* Egress Mirroring, PBE field */
+                outer_cfi:1,            /* Outer Canoncial Format Indicator */
+                outer_pri:3,            /* Outer priority */
+                :5,                     /* Reserved */
+                inner_vid:12,           /* Inner VLAN ID */
+                inner_cfi:1,            /* Inner Canoncial Format Indicator */
+                replicated:1;           /* Replicated copy */
+
+
+
+    union {                             /* T37.12 */
+        struct {
+            uint32  timestamp;          /* Timestamp */
+        } overlay1;
+        struct {
+            uint32  vfi:14,             /* VFI or FID */
+                    :18;                /* Reserved */
+        } overlay2;
+    } word12;
+
+                                        /* T37.13 */
+        uint32  itag_status:2,          /* Ingress Inner tag status */
+                otag_action:2,          /* Ingress Outer tag action */
+                itag_action:2,          /* Ingress Inner tag action */
+                service_tag:1,          /* SD tag present */
+                switch_pkt:1,           /* Switched packet */
+                hg_lookup:1,            /* Higig lookup */
+                hg_type:1,              /* 0: Higig+, 1: Higig2 */
+                src_hg:1,               /* Source is Higig */
+                l3routed:1,             /* Any IP routed packet */
+                l3only:1,               /* L3 only IPMC packet */
+                vntag_action:2,         /* VNTAG/ETAG*/
+                oam_pkt:1,              /* OAM Packet indicator */
+                do_not_change_ttl:1,    /* Do not change TTL */
+                bpdu:1,                 /* BPDU Packet */
+                timestamp_type:2,       /* Timestamp type */
+                cos:4,                  /* Port queue number */
+                mtp_index:5,            /* IM MTP index, PBE field */
+                ecn:2,                  /* New ECN value */
+                chg_ecn:1;              /* ECN changed */
+
+                                        /* T37.14 */
+        uint32  timestamp_hi;           /* Timestamp upper bits */
+
+                                        /* T37.15: DMA Status 0 */
+        uint32  count:16,               /* Transferred byte count */
+                end:1,                  /* End bit (RX) */
+                start:1,                /* Start bit (RX) */
+                error:1,                /* Cell Error (RX) */
+                :12,                    /* Reserved */
+                done:1;                 /* Descriptor Done */
+#else
+                                        /* T37.10 */
+        uint32  oam_command:4,          /* Special packet type (OAM, BFD) */
+                em_mtp_index:4,         /* em mirror-to-port index */
+                vfi_valid:1,            /* Validates VFI field */
+                shaping_cos_sel:2,      /* */
+                :5,                     /* reserved.*/
+                repl_nhi:13,            /* Replication or Next Hop index */
+                inner_pri:3;            /* Inner priority */
+
+                                        /* T37.11 */
+        uint32  replicated:1,           /* Replicated copy */
+                inner_cfi:1,            /* Inner Canoncial Format Indicator */
+                inner_vid:12,           /* Inner VLAN ID */
+                :5,                     /* Reserved */
+                outer_pri:3,            /* Outer priority */
+                outer_cfi:1,            /* Outer Canoncial Format Indicator */
+                emirror:1,              /* Egress Mirroring, PBE field */
+                imirror:1,              /* Ingress Mirroring PBE field*/
+                chg_tos:1,              /* DSCP has been changed by HW */
+                dscp:6;                 /* New DSCP (+ oam pkt type:3) */
+
+    union {                             /* T37.12 */
+        struct {
+            uint32  timestamp;          /* Timestamp */
+        } overlay1;
+        struct {
+            uint32  :18,                /* Reserved */
+                    vfi:14;             /* VFI or FID */
+        } overlay2;
+    } word12;
+
+                                        /* T37.13 */
+        uint32  chg_ecn:1,              /* ECN changed */
+                ecn:2,                  /* New ECN value */
+                mtp_index:5,            /* IM MTP index, PBE field */
+                cos:4,                  /* Port queue number */
+                timestamp_type:2,       /* Timestamp type */
+                bpdu:1,                 /* BPDU Packet */
+                do_not_change_ttl:1,    /* Do not change TTL */
+                oam_pkt:1,              /* OAM Packet indicator */
+                vntag_action:2,         /* VNTAG/ETAG*/
+                l3only:1,               /* L3 only IPMC packet */
+                l3routed:1,             /* Any IP routed packet */
+                src_hg:1,               /* Source is Higig */
+                hg_type:1,              /* 0: Higig+, 1: Higig2 */
+                hg_lookup:1,            /* Higig lookup */
+                switch_pkt:1,           /* Switched packet */
+                service_tag:1,          /* SD tag present */
+                itag_action:2,          /* Ingress Inner tag action */
+                otag_action:2,          /* Ingress Outer tag action */
+                itag_status:2;          /* Ingress Inner tag status */
+
+
+        uint32  timestamp_hi;           /* Timestamp upper bits */
+
+                                        /* T37.15: DMA Status 0 */
+        uint32  done:1,                 /* Descriptor Done */
+                :12,                    /* Reserved */
+                error:1,                /* Cell Error (RX) */
+                start:1,                /* Start bit (RX) */
+                end:1,                  /* End bit (RX) */
+                count:16;               /* Transferred byte count */
+#endif
+} dcb37_t;
+
+#define SOC_CPU_OPCODE_TYPE_IP_0        0
+#define SOC_CPU_OPCODE_TYPE_IP_1        1
+#define SOC_CPU_OPCODE_TYPE_EP          2
+#define SOC_CPU_OPCODE_TYPE_NLF         3
+
+#endif
+
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type38.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type38.h
new file mode 100644
index 000000000..9399b9d28
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type38.h
@@ -0,0 +1,288 @@
+/*
+ * $Id: $
+ * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * 
+ * Permission is granted to use, copy, modify and/or distribute this
+ * software under either one of the licenses below.
+ * 
+ * License Option 1: GPL
+ * 
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License, version 2, as
+ * published by the Free Software Foundation (the "GPL").
+ * 
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License version 2 (GPLv2) for more details.
+ * 
+ * You should have received a copy of the GNU General Public License
+ * version 2 (GPLv2) along with this source code.
+ * 
+ * 
+ * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
+ * 
+ * This software is governed by the Broadcom Open Network Switch APIs license:
+ * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+ * 
+ *
+ * File:        soc/shared/dcbformats/type38.h
+ * Purpose:     Define dma control block (DCB) format for a type38 DCB
+ *              used by the 56980 (Tomahawk 3)
+ *
+ *              This file is shared between the SDK and the embedded applications.
+ */
+
+#ifndef _SOC_SHARED_DCBFORMATS_TYPE38_H
+#define _SOC_SHARED_DCBFORMATS_TYPE38_H
+
+/*
+ * DMA Control Block - Type 38
+ * Used on 56980 devices
+ * 16 words
+ */
+/* Tomahawk 3 CMICX DCB */
+typedef struct {
+    uint32  addr_lo;                    /* T36.0: physical address, lower 32 bits */
+    uint32  addr_hi;                    /* T36.0: physical address, upper 32 bits */
+
+#ifdef  LE_HOST
+    uint32  c_count:16,                 /* Requested byte count */
+            c_chain:1,                  /* Chaining */
+            c_sg:1,                     /* Scatter Gather */
+            c_reload:1,                 /* Reload */
+            c_hg:1,                     /* Higig (TX) */
+            :2,                         /* reserved */
+            c_purge:1,                  /* Purge packet (TX) */
+            c_intr:2,                   /* Desc Intr Mode */
+            c_desc:4,                   /* descriptors remaining */
+            c_desc_status:1,            /* disable descriptor status write */
+            :2;                         /* reserved */
+#else
+    uint32  :2,                         /* resered */
+            c_desc_status:1,            /* disable descriptor status write */
+            c_desc:4,                   /* descriptors remaining */
+            c_intr:2,                   /* Desc Intr Mode */
+            c_purge:1,                  /* Purge packet (TX) */
+            :2,                         /* reserved */
+            c_hg:1,                     /* Higig (TX) */
+            c_reload:1,                 /* Reload */
+            c_sg:1,                     /* Scatter Gather */
+            c_chain:1,                  /* Chaining */
+            c_count:16;                 /* Requested byte count */
+#endif  /* LE_HOST */
+
+#ifdef  LE_HOST
+    uint32  count:16,                   /* Transferred byte count */
+            end:1,                      /* End bit (RX) */
+            start:1,                    /* Start bit (RX) */
+            error:1,                    /* Cell Error (RX) */
+            ecc_error:1,                /* packet ECC Error (RX) */
+            :11,                        /* Reserved */
+            done:1;                     /* Descriptor Done */
+#else
+    uint32  done:1,                     /* Descriptor Done */
+            :11,                        /* Reserved */
+            ecc_error:1,                /* Packet ECC Error (RX) */
+            error:1,                    /* Cell Error (RX) */
+            start:1,                    /* Start bit (RX) */
+            end:1,                      /* End bit (RX) */
+            count:16;                   /* Transferred byte count */
+#endif
+} dcb38_t;
+
+/* EP_TO_CPU_HDR
+ * - MODULE_HDR               [288:415] WORD9 - WORD12
+ * - EP_TO_CPU_COMPOSITES_BUS [  0:287] WORD0 - WORD8
+ */
+typedef struct {
+    uint32  mh0;                               /* WORD12 in EP_TO_CPU_HDR */
+    uint32  mh1;                               /* WORD11 in EP_TO_CPU_HDR */
+    uint32  mh2;                               /* WORD10 in EP_TO_CPU_HDR */
+    uint32  mh3;                               /* WORD9  in EP_TO_CPU_HDR */
+
+                                               /* WORD8  in EP_TO_CPU_HDR */
+                                               /* WORD8  in EP_TO_CPU_COMPOSITES_BUS */
+#ifdef LE_HOST
+    uint32 timestamp_hi:16,                    /* TIMESTAMP_HI             [256:271] 16 */
+           timestamp_type:2,                   /* TIMESTAMP_TYPE           [272:273] 2 */
+           decap_tunnel_type:5,                /* TUNNEL_DECAP_TYPE        [274:278] 5 */
+           uc_switch_drop:1,                   /* UC_SW_COPY_DROPPED       [279:279] 1 */
+           ucq:1,                              /* UNICAST_QUEUE            [280:280] 1 */
+           :7;                                 /* RESERVED                 [281:287] 7 */
+#else
+    uint32 :7,                                 /* RESERVED                 [281:287] 7 */
+           ucq:1,                              /* UNICAST_QUEUE            [280:280] 1 */
+           uc_switch_drop:1,                   /* UC_SW_COPY_DROPPED       [279:279] 1 */
+           decap_tunnel_type:5,                /* TUNNEL_DECAP_TYPE        [274:278] 5 */
+           timestamp_type:2,                   /* TIMESTAMP_TYPE           [272:273] 2 */
+           timestamp_hi:16;                    /* TIMESTAMP_HI             [256:271] 16 */
+#endif
+
+                                               /* WORD7  in EP_TO_CPU_HDR */
+                                               /* WORD7  in EP_TO_CPU_COMPOSITES_BUS */
+    uint32 timestamp;                          /* TIMESTAMP                [224:255] 32 */
+
+                                               /* WORD6  in EP_TO_CPU_HDR */
+                                               /* WORD6  in EP_TO_CPU_COMPOSITES_BUS */
+#ifdef LE_HOST
+    uint32 :2,                                 /* RESERVED                 [192:193] 2 */
+           entropy_label:20,                   /* ENTROPY LABEL            [194:213] 20 */
+           special_pkt_indicator:1,            /* SPECIAL_PACKET_INDICATOR [214:214] 1 */
+           srcport:8,                          /* SRC_PORT_NUM             [215:222] 8 */
+           switch_pkt:1;                       /* SWITCH                   [223:223] 1 */
+#else
+    uint32 switch_pkt:1,                       /* SWITCH                   [223:223] 1 */
+           srcport:8,                          /* SRC_PORT_NUM             [215:222] 8 */
+           special_pkt_indicator:1,            /* SPECIAL_PACKET_INDICATOR [214:214] 1 */
+           entropy_label:20,                   /* ENTROPY LABEL            [194:213] 20 */
+           :2;                                 /* RESERVED                 [192:193] 2 */
+#endif
+
+                                               /* WORD5  in EP_TO_CPU_HDR */
+                                               /* WORD5  in EP_TO_CPU_COMPOSITES_BUS */
+#ifdef LE_HOST
+    uint32 pkt_len:14,                         /* PKT_LENGTH	           [160:173] 14 */
+           regen_crc:1,                        /* REGEN_CRC	           [174:174] 1 */
+           replication_or_nhi:17;              /* REPLICATION_OR_NHOP_INDEX[175:191] 17 */
+#else
+    uint32 replication_or_nhi:17,              /* REPLICATION_OR_NHOP_INDEX[175:191] 17 */
+           regen_crc:1,                        /* REGEN_CRC	           [174:174] 1 */
+           pkt_len:14;                         /* PKT_LENGTH	           [160:173] 14 */
+#endif
+
+                                               /* WORD4  in EP_TO_CPU_HDR */
+                                               /* WORD4  in EP_TO_CPU_COMPOSITES_BUS */
+#ifdef LE_HOST
+    uint32 loopback_pkt_type:3,                /* LOOPBACK_PACKET_TYPE     [128:130] 3 */
+           match_rule:8,                       /* MATCHED_RULE             [131:138] 8 */
+           mtp_index:5,                        /* MTP_INDEX                [139:143] 5 */
+           outer_cfi:1,                        /* OUTER_CFI                [144:144] 1 */
+           outer_pri:3,                        /* OUTER_PRI                [145:147] 3 */
+           outer_vid:12;                       /* OUTER_VID                [148:159] 12 */
+#else
+    uint32 outer_vid:12,                       /* OUTER_VID                [148:159] 12 */
+           outer_pri:3,                        /* OUTER_PRI                [145:147] 3 */
+           outer_cfi:1,                        /* OUTER_CFI                [144:144] 1 */
+           mtp_index:5,                        /* MTP_INDEX                [139:143] 5 */
+           match_rule:8,                       /* MATCHED_RULE             [131:138] 8 */
+           loopback_pkt_type:3;                /* LOOPBACK_PACKET_TYPE     [128:130] 3 */
+#endif
+
+                                               /* WORD3  in EP_TO_CPU_HDR */
+                                               /* WORD3  in EP_TO_CPU_COMPOSITES_BUS */
+    union {
+#ifdef LE_HOST
+        struct {
+            uint32 cpu_opcode_type:4,          /* CPU_OPCODE_TYPE          [ 96: 99] 4 */
+                   do_not_change_ttl:1,        /* DO_NOT_CHANGE_TTL	   [100:100] 1 */
+                   dscp:6,                     /* DSCP                     [101:106] 6 */
+                   ecn:2,                      /* ECN                      [107:108] 2 */
+                   tag_status:2,               /* INCOMING_TAG_STATUS      [109:110] 2 */
+                   ing_l3_intf:13,             /* ING_L3_INTF              [111:123] 13 */
+                   otag_action:2,              /* ING_OTAG_ACTION          [124:125] 2 */
+                   ip_routed:1,                /* IP_ROUTED                [126:126] 1 */
+                   l3only:1;                   /* L3ONLY                   [127:127] 1 */
+        } overlay1;
+        struct {
+            uint32 cpu_opcode_type:4,          /* CPU_OPCODE_TYPE          [ 96: 99] 4 */
+                   do_not_change_ttl:1,        /* DO_NOT_CHANGE_TTL	   [100:100] 1 */
+                   special_pkt_type:3,         /* SPECIAL_PACKET_TYPE      [101:103] 3 */
+                   :3,                         /* RESERVED                 [104:106] 3 */
+                   ecn:2,                      /* ECN                      [107:108] 2 */
+                   tag_status:2,               /* INCOMING_TAG_STATUS      [109:110] 2 */
+                   ing_l3_intf:13,             /* ING_L3_INTF              [111:123] 13 */
+                   otag_action:2,              /* ING_OTAG_ACTION          [124:125] 2 */
+                   ip_routed:1,                /* IP_ROUTED                [126:126] 1 */
+                   l3only:1;                   /* L3ONLY                   [127:127] 1 */
+        } overlay2;
+#else
+        struct {
+            uint32 l3only:1,                   /* L3ONLY                   [127:127] 1 */
+                   ip_routed:1,                /* IP_ROUTED                [126:126] 1 */
+                   otag_action:2,              /* ING_OTAG_ACTION          [124:125] 2 */
+                   ing_l3_intf:13,             /* ING_L3_INTF              [111:123] 13 */
+                   tag_status:2,               /* INCOMING_TAG_STATUS      [109:110] 2 */
+                   ecn:2,                      /* ECN                      [107:108] 2 */
+                   dscp:6,                     /* DSCP                     [101:106] 6 */
+                   do_not_change_ttl:1,        /* DO_NOT_CHANGE_TTL	   [100:100] 1 */
+                   cpu_opcode_type:4;          /* CPU_OPCODE_TYPE          [ 96: 99] 4 */
+        } overlay1;
+        struct {
+            uint32 l3only:1,                   /* L3ONLY                   [127:127] 1 */
+                   ip_routed:1,                /* IP_ROUTED                [126:126] 1 */
+                   otag_action:2,              /* ING_OTAG_ACTION          [124:125] 2 */
+                   ing_l3_intf:13,             /* ING_L3_INTF              [111:123] 13 */
+                   tag_status:2,               /* INCOMING_TAG_STATUS      [109:110] 2 */
+                   ecn:2,                      /* ECN                      [107:108] 2 */
+                   :3,                         /* RESERVED                 [104:106] 3 */
+                   special_pkt_type:3,         /* SPECIAL_PACKET_TYPE      [101:103] 3 */
+                   do_not_change_ttl:1,        /* DO_NOT_CHANGE_TTL	   [100:100] 1 */
+                   cpu_opcode_type:4;          /* CPU_OPCODE_TYPE          [ 96: 99] 4 */
+        } overlay2;
+#endif
+    } word3;
+                                               /* WORD2  in EP_TO_CPU_HDR */
+                                               /* WORD2  in EP_TO_CPU_COMPOSITES_BUS */
+    uint32 reason_hi;                          /* CPU_OPCODE_HI            [ 64: 95] 32 */
+
+                                               /* WORD1  in EP_TO_CPU_HDR */
+                                               /* WORD1  in EP_TO_CPU_COMPOSITES_BUS */
+    uint32 reason;                             /* CPU_OPCODE_LO            [ 32: 63] 32 */
+
+    union {
+                                               /* WORD0  in EP_TO_CPU_HDR */
+                                               /* WORD0  in EP_TO_CPU_COMPOSITES_BUS */
+#ifdef LE_HOST
+        struct {
+            uint32 rx_bfd_session_index:12,    /* RX_BFD_SESSION_INDEX     [  0: 11] 12 */
+                   rx_bfd_start_offset_type:2, /* RX_BFD_START_OFFSET_TYPE [ 12: 13] 2 */
+                   rx_bfd_start_offset:8,      /* RX_BFD_START_OFFSET      [ 14: 21] 8 */
+                   queue_num:6,                /* MMU_COS                  [ 22: 27] 6 */
+                   bpdu:1,                     /* BPDU                     [ 28: 28] 1 */
+                   chg_dscp:1,                 /* CHANGE_DSCP              [ 29: 29] 1 */
+                   chg_ecn:1,                  /* CHANGE_ECN               [ 30: 30] 1 */
+                   :1;                         /* RESERVED                 [ 31: 31] 1 */
+        } overlay1;
+        struct {
+            uint32 i2e_classid:12,             /* I2E_CLASSID              [  0: 11] 12 */
+                   i2e_classid_type:4,         /* I2E_CLASSID_TYPE         [ 12: 15] 4 */
+                   :6,                         /* RESERVED2                [ 16: 21] 6 */
+                   cpu_cos:6,                  /* CPU_COS                  [ 22: 27] 6 */
+                   bpdu:1,                     /* BPDU                     [ 28: 28] 1 */
+                   chg_dscp:1,                 /* CHANGE_DSCP              [ 29: 29] 1 */
+                   chg_ecn:1,                  /* CHANGE_ECN               [ 30: 30] 1 */
+                   :1;                         /* RESERVED                 [ 31: 31] 1 */
+        } overlay2;
+#else
+        struct {
+            uint32 :1,                         /* RESERVED                 [ 31: 31] 1 */
+                   chg_ecn:1,                  /* CHANGE_ECN               [ 30: 30] 1 */
+                   chg_dscp:1,                 /* CHANGE_DSCP              [ 29: 29] 1 */
+                   bpdu:1,                     /* BPDU                     [ 28: 28] 1 */
+                   queue_num:6,                /* MMU_COS                  [ 22: 27] 6 */
+                   rx_bfd_start_offset:8,      /* RX_BFD_START_OFFSET      [ 14: 21] 8 */
+                   rx_bfd_start_offset_type:2, /* RX_BFD_START_OFFSET_TYPE [ 12: 13] 2 */
+                   rx_bfd_session_index:12;    /* RX_BFD_SESSION_INDEX     [  0: 11] 12 */
+        } overlay1;
+        struct {
+            uint32 :1,                         /* RESERVED                 [ 31: 31] 1 */
+                   chg_ecn:1,                  /* CHANGE_ECN               [ 30: 30] 1 */
+                   chg_dscp:1,                 /* CHANGE_DSCP              [ 29: 29] 1 */
+                   bpdu:1,                     /* BPDU                     [ 28: 28] 1 */
+                   cpu_cos:6,                  /* CPU_COS                  [ 22: 27] 6 */
+                   :6,                         /* RESERVED2                [ 16: 21] 6 */
+                   i2e_classid_type:4,         /* I2E_CLASSID_TYPE         [ 12: 15] 4 */
+                   i2e_classid:12;             /* I2E_CLASSID              [  0: 11] 12 */
+        } overlay2;
+#endif
+    } word0;
+    uint32 rsvd;                  /* 4 byte padding to make it 56 bytes */
+} ep_to_cpu_hdr38_t;
+
+#define SOC_CPU_OPCODE_TYPE_IP_0        0
+#define SOC_CPU_OPCODE_TYPE_IP_1        1
+#define SOC_CPU_OPCODE_TYPE_EP          2
+#define SOC_CPU_OPCODE_TYPE_NLF         3
+
+#endif /* _SOC_SHARED_DCBFORMATS_TYPE38_H */
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/types.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/types.h
new file mode 100644
index 000000000..4799553b8
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/types.h
@@ -0,0 +1,41 @@
+/* 
+ * $Id:$
+ * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * 
+ * Permission is granted to use, copy, modify and/or distribute this
+ * software under either one of the licenses below.
+ * 
+ * License Option 1: GPL
+ * 
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License, version 2, as
+ * published by the Free Software Foundation (the "GPL").
+ * 
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License version 2 (GPLv2) for more details.
+ * 
+ * You should have received a copy of the GNU General Public License
+ * version 2 (GPLv2) along with this source code.
+ * 
+ * 
+ * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
+ * 
+ * This software is governed by the Broadcom Open Network Switch APIs license:
+ * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+ * 
+ *
+ * File:        types.h
+ * Purpose:     System-on-a-Chip data types
+ */
+
+#ifndef   _SOC_TYPES_H_
+#define   _SOC_TYPES_H_
+
+#include <sal/types.h>
+
+typedef uint32 soc_pbmp_t;
+#define pbmp_t      soc_pbmp_t
+
+#endif /* _SOC_TYPES_H_ */
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/make/Makefile b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/make/Makefile
new file mode 100644
index 000000000..02d411ede
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/make/Makefile
@@ -0,0 +1,153 @@
+# $Id: Makefile,v 1.2 Broadcom SDK $
+# $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+# 
+# Permission is granted to use, copy, modify and/or distribute this
+# software under either one of the licenses below.
+# 
+# License Option 1: GPL
+# 
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License, version 2, as
+# published by the Free Software Foundation (the "GPL").
+# 
+# This program is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+# General Public License version 2 (GPLv2) for more details.
+# 
+# You should have received a copy of the GNU General Public License
+# version 2 (GPLv2) along with this source code.
+# 
+# 
+# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
+# 
+# This software is governed by the Broadcom Open Network Switch APIs license:
+# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+# 
+#
+# Makefile for DCB Library
+#
+
+# General Compilation Flags
+CC = $(CROSS_COMPILE)gcc
+AR = $(CROSS_COMPILE)ar
+CFLAGS = -c -Wall -Werror
+ARFLAGS = cru
+
+# DCB Directory
+ifndef DCBDIR
+DCBDIR = $(SDK)/systems/linux/kernel/modules/dcb
+endif
+
+# Build Directory
+ifndef BLDDIR
+BLDDIR = $(DCBDIR)/build
+endif
+
+# Kernel Build
+ifdef KADD_CFLAGS
+CFLAGS += $(KADD_CFLAGS)
+# Prevent false GCC warnings when compiling dcb.c
+CFLAGS += -Wno-error=array-bounds
+endif
+
+# Include Directories
+INCDIR = -I$(DCBDIR)/include
+
+# Sources
+SOURCES = \
+	$(DCBDIR)/src/soc/common/dcb.c \
+	$(DCBDIR)/src/appl/dcb/dcb_handler.c
+
+# Objects
+OBJECTS=$(subst .c,.o,$(subst $(DCBDIR),$(BLDDIR),$(SOURCES)))
+OBJECTSDIR = $(dir $(OBJECTS))
+
+# Library
+LIB = $(BLDDIR)/libdcb.a
+
+
+# Compilation Flags
+CFLAGS += $(INCDIR)
+
+DFLAGS =
+DFLAGS += -DBCM_53400_A0    # GREYHOUND
+DFLAGS += -DBCM_53570_A0    # GREYHOUND2
+DFLAGS += -DBCM_56150_A0    # HURRICANE2
+DFLAGS += -DBCM_56160_A0    # HURRICANE3
+DFLAGS += -DBCM_56340_A0    # HELIX4
+DFLAGS += -DBCM_56450_A0    # KATANA2
+DFLAGS += -DBCM_56560_A0    # APACHE
+DFLAGS += -DBCM_56850_A0    # TRIDENT2
+DFLAGS += -DBCM_56860_A0    # TRIDENT2+
+DFLAGS += -DBCM_56870_A0    # TRIDENT3
+DFLAGS += -DBCM_56770_A0    # MAVERICK2
+DFLAGS += -DBCM_56370_A0    # HELIX5
+DFLAGS += -DBCM_56960_A0    # TOMAHAWK
+DFLAGS += -DBCM_56970_A0    # TOMAHAWK2
+DFLAGS += -DBCM_56980_A0    # TOMAHAWK3
+# SONIC-79319 Start
+DFLAGS += -DBCM_56470_A0    # FIREBOLT6
+DFLAGS += -DBCM_56275_A0    # HURRICANE4
+DFLAGS += -DBCM_56175_A0    # TRIDENT3-X1
+# SONIC-79319 End
+
+#
+# Compiler Related Options
+#
+
+# Define if pointers are 64 bits on your compiler;
+# this is typically true ONLY for 64-bit processors.
+# NOTE: This support works ONLY under conditions where the
+# upper 32 bits for ALL pointers are ZERO.
+#CFGFLAGS += -DPTRS_ARE_64BITS
+
+# Disable inlining of functions
+#CFGFLAGS += -DCOMPILER_OVERRIDE_NO_INLINE
+
+# Disable use of const
+#CFGFLAGS += -DCOMPILER_OVERRIDE_NO_CONST
+
+# Disable use of static functions
+#CFGFLAGS += -DCOMPILER_OVERRIDE_NO_STATIC
+
+
+#
+# Rules
+#
+all: build_dir
+	$(MAKE) $(LIB)
+
+$(LIB): $(OBJECTS)
+	$(AR) $(ARFLAGS) $@ $^
+
+define compile_rules
+$(1): $(subst .o,.c,$(subst $(BLDDIR),$(DCBDIR),$(1)))
+	$(CC) $(CFLAGS) $(DFLAGS) $$< -o $$@
+endef
+
+$(foreach object,$(OBJECTS),$(eval $(call compile_rules,$(object))))
+
+.PHONY: clean
+clean:
+	rm -f $(OBJECTS) $(LIB)
+
+.PHONY: build_dir
+build_dir:
+	mkdir -p $(BLDDIR)
+	mkdir -p $(OBJECTSDIR)
+
+.PHONY: print_vars
+print_vars:
+	echo $(SOURCES)
+	echo $(OBJECTS)
+
+#
+#
+# Example
+#
+test: all $(DCBDIR)/src/appl/test/dcb_test.c
+	$(CC) -Wall -I$(DCBDIR)/include \
+	$(DCBDIR)/src/appl/test/dcb_test.c $(LIB) \
+	-o  $(BLDDIR)/test.exe
+
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/src/appl/dcb/dcb_handler.c b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/src/appl/dcb/dcb_handler.c
new file mode 100644
index 000000000..2fa8f7b9d
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/src/appl/dcb/dcb_handler.c
@@ -0,0 +1,243 @@
+/* 
+ * $Id:$
+ * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * 
+ * Permission is granted to use, copy, modify and/or distribute this
+ * software under either one of the licenses below.
+ * 
+ * License Option 1: GPL
+ * 
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License, version 2, as
+ * published by the Free Software Foundation (the "GPL").
+ * 
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License version 2 (GPLv2) for more details.
+ * 
+ * You should have received a copy of the GNU General Public License
+ * version 2 (GPLv2) along with this source code.
+ * 
+ * 
+ * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
+ * 
+ * This software is governed by the Broadcom Open Network Switch APIs license:
+ * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+ * 
+ *
+ * File:        dcb.c
+ * Purpose:     DCB Library
+ *
+ */
+
+#include <sal/types.h>
+#include <soc/drv.h>
+#include <soc/dcb.h>
+#include <soc/devids.h>
+#include <appl/dcb/dcb_int.h>
+#include <appl/dcb/dcb_handler.h>
+
+soc_control_t       soc_control;
+
+#define DEVICE_FAMILY(_dev)    ((_dev) & 0xfff0)
+
+#if defined(BCM_TRIUMPH3_SUPPORT) || defined(BCM_KATANA_SUPPORT) || \
+    defined(BCM_TRIDENT2_SUPPORT)
+extern dcb_op_t dcb23_op;
+#endif
+#if defined(BCM_TRIDENT2_SUPPORT)
+extern dcb_op_t dcb26_op;
+#endif
+#if defined(BCM_KATANA2_SUPPORT)
+extern dcb_op_t dcb29_op;
+#endif
+#if defined(BCM_HURRICANE2_SUPPORT)
+extern dcb_op_t dcb30_op;
+#endif
+#if defined(BCM_GREYHOUND_SUPPORT)
+extern dcb_op_t dcb31_op;
+#endif
+#if defined(BCM_TOMAHAWK_SUPPORT) || defined(BCM_TOMAHAWK2_SUPPORT)
+extern dcb_op_t dcb32_op;
+#endif
+#if defined(BCM_TRIDENT2PLUS_SUPPORT)
+extern dcb_op_t dcb33_op;
+#endif
+#if defined(BCM_HURRICANE3_SUPPORT)
+extern dcb_op_t dcb34_op;
+#endif
+#if defined(BCM_APACHE_SUPPORT)
+extern dcb_op_t dcb35_op;
+#endif
+#if defined(BCM_TRIDENT3_SUPPORT)
+extern dcb_op_t dcb36_op;
+#endif
+#if defined(BCM_GREYHOUND2_SUPPORT)
+extern dcb_op_t dcb37_op;
+#endif
+#if defined(BCM_TOMAHAWK3_SUPPORT)
+extern dcb_op_t dcb38_op;
+#endif
+
+/*
+ * Function:
+ *      _dcb_op_get
+ * Description:
+ *      Get DCB operation structure for a given device type and revision ID.
+ * Parameters:
+ *      dev_id  - (IN) Device ID
+ *      rev_id  - (IN) Revision ID
+ * Return:
+ *      !NULL    Pointer to DCB operations object
+ *       NULL    Failure
+ */
+static dcb_op_t *
+_dcb_op_get(uint16 dev_id, uint8 rev_id)
+{
+    switch(dev_id) {
+#if defined(BCM_TRIUMPH3_SUPPORT) || defined(BCM_KATANA_SUPPORT) || \
+    defined(BCM_TRIDENT2_SUPPORT)
+    case DEVICE_FAMILY(BCM56640_DEVICE_ID):    /* Triumph 3 */
+    case DEVICE_FAMILY(BCM56340_DEVICE_ID):    /* Helix 4 */
+        return &dcb23_op;
+        break;
+#endif
+#if defined(BCM_TRIDENT2_SUPPORT)
+    case DEVICE_FAMILY(BCM56850_DEVICE_ID):    /* Trident 2 */
+        return &dcb26_op;
+        break;
+#endif
+#if defined(BCM_KATANA2_SUPPORT)  
+    case DEVICE_FAMILY(BCM56450_DEVICE_ID):    /* Katana 2 */
+        return &dcb29_op;
+        break;
+#endif
+#if defined(BCM_HURRICANE2_SUPPORT)  
+    case DEVICE_FAMILY(BCM56150_DEVICE_ID):    /* Hurricane 2 */
+        return &dcb30_op;
+        break;
+#endif
+#if defined(BCM_GREYHOUND_SUPPORT)  
+    case DEVICE_FAMILY(BCM53400_DEVICE_ID):    /* Greyhound */
+        return &dcb31_op;
+        break;
+#endif
+#if defined(BCM_TOMAHAWK_SUPPORT) || defined(BCM_TOMAHAWK2_SUPPORT)
+    case DEVICE_FAMILY(BCM56960_DEVICE_ID):    /* Tomahawk */
+    case DEVICE_FAMILY(BCM56970_DEVICE_ID):    /* Tomahawk 2 */
+        return &dcb32_op;
+        break;
+#endif
+#if defined(BCM_TRIDENT2PLUS_SUPPORT)
+    case DEVICE_FAMILY(BCM56860_DEVICE_ID):    /* Trident 2 plus*/
+        return &dcb33_op;
+        break;
+#endif
+#if defined(BCM_HURRICANE3_SUPPORT)  
+    case DEVICE_FAMILY(BCM56160_DEVICE_ID):    /* Hurricane 3 */
+        return &dcb34_op;
+        break;
+#endif
+#if defined(BCM_APACHE_SUPPORT)  
+    case DEVICE_FAMILY(BCM56560_DEVICE_ID):    /* Apache */
+    case DEVICE_FAMILY(BCM56760_DEVICE_ID):    /* Maverick */
+        return &dcb35_op;
+        break;
+#endif
+#if defined(BCM_TRIDENT3_SUPPORT)
+    case DEVICE_FAMILY(BCM56870_DEVICE_ID):    /* Trident 3*/
+    /* SONIC-79319 Start */
+    case DEVICE_FAMILY(BCM56770_DEVICE_ID):    /* Maverick 2*/
+    case DEVICE_FAMILY(BCM56370_DEVICE_ID):    /* Helix 5*/
+    case DEVICE_FAMILY(BCM56470_DEVICE_ID):    /* Firebolt 6*/
+    case DEVICE_FAMILY(BCM56275_DEVICE_ID):    /* Hurricane 4*/
+    case DEVICE_FAMILY(BCM56175_DEVICE_ID):    /* Trident3 X1*/
+    /* SONIC-79319 End */
+        return &dcb36_op;
+        break;
+#endif
+#if defined(BCM_GREYHOUND2_SUPPORT)  
+    case DEVICE_FAMILY(BCM53570_DEVICE_ID):    /* Greyhound 2 */
+        return &dcb37_op;
+        break;
+#endif
+#if defined(BCM_TOMAHAWK3_SUPPORT)
+    case DEVICE_FAMILY(BCM56980_DEVICE_ID):    /* Tomahawk 3 */
+        return &dcb38_op;
+        break;
+#endif
+    default:
+        return NULL;
+        break;
+    }
+
+    return NULL;
+}
+
+/*
+ * Function:
+ *      _dcb_htonl
+ * Description:
+ *      Returns the value in network byte order.
+ * Parameters:
+ *      value - (IN) Value
+ * Return:
+ *      Value in network byte order
+ */
+uint32
+_dcb_htonl(uint32 value)
+{
+    uint32 new_value;
+    uint8  *buf =(uint8 *)&new_value;
+
+    buf[0] = (value >> 24) & 0xff;
+    buf[1] = (value >> 16) & 0xff;
+    buf[2] = (value >> 8) & 0xff;
+    buf[3] = value & 0xff;
+
+    return new_value;
+}
+
+/*
+ * Function:
+ *      dcb_handle_init
+ * Description:
+ *      Initialize a DCB library handle for a given device type and revision.
+ *      It must be called before calling any of the macros.
+ * Parameters:
+ *      handle  - (IN/OUT) Pointer to DCB library handle for given device
+ *      dev_id  - (IN) Device ID
+ *      rev_id  - (IN) Revision ID
+ * Return:
+ *      DCB_OK     Success
+ *      DCB_ERROR  Failure
+ * Notes:
+ *      Each device type and revision (in some) needs to have a unique
+ *      DCB library handle associated with it.
+ */
+int
+dcb_handle_init(dcb_handle_t *handle, uint16 dev_id, uint8 rev_id)
+{
+    dcb_op_t  *dcb_op;
+
+    if (handle == NULL) {
+        return DCB_ERROR;
+    }
+
+    handle->dcb_op = NULL;
+
+    /* Get DCB operations */
+    /* First use given specific device ID */
+    if ((dcb_op = _dcb_op_get(dev_id, rev_id)) == NULL) {
+        /* Try family device */
+        if ((dcb_op = _dcb_op_get(DEVICE_FAMILY(dev_id), rev_id)) == NULL) {
+            return DCB_ERROR;
+        }
+    }
+
+    handle->dcb_op = dcb_op;
+
+    return DCB_OK;
+}
+
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/src/appl/test/dcb_test.c b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/src/appl/test/dcb_test.c
new file mode 100644
index 000000000..20f64e4f3
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/src/appl/test/dcb_test.c
@@ -0,0 +1,200 @@
+/* 
+ * $Id:$
+ * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * 
+ * Permission is granted to use, copy, modify and/or distribute this
+ * software under either one of the licenses below.
+ * 
+ * License Option 1: GPL
+ * 
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License, version 2, as
+ * published by the Free Software Foundation (the "GPL").
+ * 
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License version 2 (GPLv2) for more details.
+ * 
+ * You should have received a copy of the GNU General Public License
+ * version 2 (GPLv2) along with this source code.
+ * 
+ * 
+ * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
+ * 
+ * This software is governed by the Broadcom Open Network Switch APIs license:
+ * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+ * 
+ *
+ * File:        test.c
+ * Purpose:     DCB Library Example
+ *
+ */
+
+#include <appl/dcb/dcb_handler.h>
+
+int dcb_example()
+{
+    int rv;
+    dcb_handle_t dcb_handle;
+    int device_id = 0xb820;
+    int rev_id = 0;
+    int dcb_type, dcb_size;
+    uint8 dcb_buffer[256];
+    dcb_t *dcb = (dcb_t *)dcb_buffer;
+    int value;
+    int dt_mode;
+    int ingport_is_hg;
+    soc_rx_reasons_t reasons;
+    soc_rx_reason_t reason;
+    dcb_handle_t  *dcb_null = NULL;
+    
+    /* Error condition */
+    rv = dcb_handle_init(dcb_null, device_id, rev_id);
+    printf("Error check: null handle. dcb_handle_init = %d\n", rv);
+
+    rv = dcb_handle_init(&dcb_handle, 0xffff, 0xff);
+    printf("Error check: invalid device. dcb_handle_init = %d\n", rv);
+
+    /* Init DCB library */
+    printf("\n\nEnter device ID in hex (e.g. b860 for Trident 2+): ");
+    scanf("%x", &device_id);
+    rv = dcb_handle_init(&dcb_handle, device_id, rev_id);
+    printf("For device ID 0x%04X, dcb_handle_init = %d\n", device_id, rv);
+
+    if (rv != DCB_OK) {
+        return 1;
+    }
+
+    /* Get DCB type */
+    dcb_type = DCB_TYPE(&dcb_handle);
+    printf("DCB type %d\n", dcb_type);
+
+    /* Get DCB size */
+    dcb_size = DCB_SIZE(&dcb_handle);
+    printf("DCB size %d\n", dcb_size);
+
+    DCB_INIT(&dcb_handle, dcb);
+
+    printf("\n");
+    DCB_REQCOUNT_SET(&dcb_handle, dcb, 5);
+    value = DCB_REQCOUNT_GET(&dcb_handle, dcb);
+    printf("DCB_REQCOUNT_GET %d\n", value);
+
+    value = DCB_XFERCOUNT_GET(&dcb_handle, dcb);
+    printf("DCB_XFERCOUNT_GET %d\n", value);
+
+    DCB_DONE_SET(&dcb_handle, dcb, 1);
+    printf("DCB_DONE_GET %d\n", DCB_DONE_GET(&dcb_handle, dcb));
+
+    DCB_SG_SET(&dcb_handle, dcb, 1);
+    printf("DCB_SG_GET %d\n", DCB_SG_GET(&dcb_handle, dcb));
+
+    DCB_CHAIN_SET(&dcb_handle, dcb, 1);
+    printf("DCB_CHAIN_GET %d\n", DCB_CHAIN_GET(&dcb_handle, dcb));
+
+    DCB_RELOAD_SET(&dcb_handle, dcb, 1);
+    printf("DCB_RELOAD_GET %d\n", DCB_RELOAD_GET(&dcb_handle, dcb));
+
+    printf("\n");
+    DCB_TX_CRC_SET(&dcb_handle, dcb, 1);
+    DCB_TX_COS_SET(&dcb_handle, dcb, 4);
+    DCB_TX_DESTMOD_SET(&dcb_handle, dcb, 2);
+    DCB_TX_DESTPORT_SET(&dcb_handle, dcb, 8);
+    DCB_TX_OPCODE_SET(&dcb_handle, dcb, 3);
+    DCB_TX_SRCMOD_SET(&dcb_handle, dcb, 1);
+    DCB_TX_SRCPORT_SET(&dcb_handle, dcb, 7);
+    DCB_TX_PRIO_SET(&dcb_handle, dcb, 4);
+    DCB_TX_PFM_SET(&dcb_handle, dcb, 1);
+
+    printf("\n");
+    dt_mode = 0;
+    ingport_is_hg = 0;
+    value = DCB_RX_UNTAGGED_GET(&dcb_handle, dcb, dt_mode, ingport_is_hg);
+    printf("DCB_RX_UNTAGGED_GET 0x%x (%d)\n", value, value);
+          
+    dt_mode = 0;
+    ingport_is_hg = 1;
+    value = DCB_RX_UNTAGGED_GET(&dcb_handle, dcb, dt_mode, ingport_is_hg);
+    printf("DCB_RX_UNTAGGED_GET 0x%x (%d)\n", value, value);
+
+    printf("\n");
+    printf("DCB_RX_CRC_GET %d\n", DCB_RX_CRC_GET(&dcb_handle, dcb));
+    printf("DCB_RX_COS_GET %d\n", DCB_RX_COS_GET(&dcb_handle, dcb));
+    printf("DCB_RX_DESTMOD_GET %d\n", DCB_RX_DESTMOD_GET(&dcb_handle, dcb));
+    printf("DCB_RX_DESTPORT_GET %d\n", DCB_RX_DESTPORT_GET(&dcb_handle, dcb));
+    printf("DCB_RX_OPCODE_GET %d\n", DCB_RX_OPCODE_GET(&dcb_handle, dcb));
+
+    printf("\n");
+    printf("DCB_RX_CLASSTAG_GET %d\n", DCB_RX_CLASSTAG_GET(&dcb_handle, dcb));
+    printf("DCB_RX_MATCHRULE_GET %d\n", DCB_RX_MATCHRULE_GET(&dcb_handle, dcb));
+    printf("DCB_RX_START_GET %d\n", DCB_RX_START_GET(&dcb_handle, dcb));
+    printf("DCB_RX_END_GET %d\n", DCB_RX_END_GET(&dcb_handle, dcb));
+    printf("DCB_RX_ERROR_GET %d\n", DCB_RX_ERROR_GET(&dcb_handle, dcb));
+    printf("DCB_RX_PRIO_GET %d\n", DCB_RX_PRIO_GET(&dcb_handle, dcb));
+
+    printf("\n");
+    printf("DCB_RX_REASON_GET 0x%x\n", DCB_RX_REASON_GET(&dcb_handle, dcb));
+    printf("DCB_RX_REASON_HI_GET 0x%x\n",
+           DCB_RX_REASON_HI_GET(&dcb_handle, dcb));
+    printf("DCB_RX_REASONS_GET\n");
+    DCB_RX_REASONS_GET(&dcb_handle, dcb, &reasons);
+    _SHR_RX_REASON_ITER(reasons, reason) {
+        printf("    %d\n", reason);
+    }
+    printf("\n");
+    printf("DCB_RX_INGPORT_GET %d\n", DCB_RX_INGPORT_GET(&dcb_handle, dcb));
+    printf("DCB_RX_SRCPORT_GET %d\n", DCB_RX_SRCPORT_GET(&dcb_handle, dcb));
+    printf("DCB_RX_SRCMOD_GET %d\n", DCB_RX_SRCMOD_GET(&dcb_handle, dcb));
+
+    printf("\n");
+    printf("DCB_RX_MCAST_GET %d\n", DCB_RX_MCAST_GET(&dcb_handle, dcb));
+    printf("DCB_RX_VCLABEL_GET %d\n", DCB_RX_VCLABEL_GET(&dcb_handle, dcb));
+    printf("DCB_RX_MIRROR_GET %d\n", DCB_RX_MIRROR_GET(&dcb_handle, dcb));
+    printf("DCB_RX_MATCHRULE_GET %d\n", DCB_RX_MATCHRULE_GET(&dcb_handle, dcb));
+    printf("DCB_RX_TIMESTAMP_GET %d\n", DCB_RX_TIMESTAMP_GET(&dcb_handle, dcb));
+    printf("DCB_RX_TIMESTAMP_UPPER_GET %d\n",
+           DCB_RX_TIMESTAMP_UPPER_GET(&dcb_handle, dcb));
+
+    printf("\n");
+    DCB_HG_SET(&dcb_handle, dcb, 1);
+    printf("DCB_HG_GET %d\n", DCB_HG_GET(&dcb_handle, dcb));
+    DCB_STAT_SET(&dcb_handle, dcb, 1);
+    printf("DCB_STAT_GET %d\n", DCB_STAT_GET(&dcb_handle, dcb));
+    DCB_PURGE_SET(&dcb_handle, dcb, 1);
+    printf("DCB_PURGE_GET %d\n", DCB_PURGE_GET(&dcb_handle, dcb));
+         
+    printf("\n");
+    printf("DCB_MHP_GET 0x%lx\n",
+           (((uintptr_t)(DCB_MHP_GET(&dcb_handle, dcb))) & 0xffffffff));
+    printf("DCB_RX_OUTER_VID_GET %d\n",
+           DCB_RX_OUTER_VID_GET(&dcb_handle, dcb));
+    printf("DCB_RX_OUTER_PRI_GET %d\n",
+           DCB_RX_OUTER_PRI_GET(&dcb_handle, dcb));
+    printf("DCB_RX_OUTER_CFI_GET %d\n",
+           DCB_RX_OUTER_CFI_GET(&dcb_handle, dcb));
+    printf("DCB_RX_OUTER_TAG_ACTION_GET %d\n",
+           DCB_RX_OUTER_TAG_ACTION_GET(&dcb_handle, dcb));
+    printf("DCB_RX_INNER_VID_GET %d\n",
+           DCB_RX_INNER_VID_GET(&dcb_handle, dcb));
+    printf("DCB_RX_INNER_PRI_GET %d\n",
+           DCB_RX_INNER_PRI_GET(&dcb_handle, dcb));
+    printf("DCB_RX_INNER_CFI_GET %d\n",
+           DCB_RX_INNER_CFI_GET(&dcb_handle, dcb));
+    printf("DCB_RX_INNER_TAG_ACTION_GET %d\n",
+           DCB_RX_INNER_TAG_ACTION_GET(&dcb_handle, dcb));
+    printf("DCB_RX_BPDU_GET %d\n",
+           DCB_RX_BPDU_GET(&dcb_handle, dcb));
+    printf("DCB_RX_L3_INTF_GET %d\n",\
+           DCB_RX_L3_INTF_GET(&dcb_handle, dcb));
+
+    return rv;
+}
+
+int main()
+{
+    dcb_example();
+
+    return 0;
+}
+
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/src/soc/common/dcb.c b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/src/soc/common/dcb.c
new file mode 100644
index 000000000..4f767e415
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/src/soc/common/dcb.c
@@ -0,0 +1,4891 @@
+/*
+ * $Id$
+ * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+ * 
+ * Permission is granted to use, copy, modify and/or distribute this
+ * software under either one of the licenses below.
+ * 
+ * License Option 1: GPL
+ * 
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License, version 2, as
+ * published by the Free Software Foundation (the "GPL").
+ * 
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License version 2 (GPLv2) for more details.
+ * 
+ * You should have received a copy of the GNU General Public License
+ * version 2 (GPLv2) along with this source code.
+ * 
+ * 
+ * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
+ * 
+ * This software is governed by the Broadcom Open Network Switch APIs license:
+ * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+ * 
+ *
+ * File:        dcb.c
+ * Purpose:     DCB manipulation routines
+ *              Provide a uniform means of manipulation of DMA control blocks
+ *              that is independent of the actual DCB format used in any
+ *              particular chip.
+ */
+
+#include <shared/bsl.h>
+
+#include <soc/types.h>
+#include <soc/drv.h>
+#include <soc/dcb.h>
+#include <soc/dcbformats.h>
+#include <soc/higig.h>
+#include <soc/rx.h>
+#include <shared/bsl.h>
+
+#if defined(BCM_ESW_SUPPORT)
+
+#define GETHDRFUNCEXPR(_dt, _name, _expr)                                        \
+        static uint32 ep_to_cpu_hdr##_dt##_##_name##_get(void *hdr) {            \
+                ep_to_cpu_hdr##_dt##_t *h = (ep_to_cpu_hdr##_dt##_t *)hdr;       \
+                return _expr;                                                    \
+        }
+#define GETHDRFUNCFIELD(_dt, _name, _field)                                      \
+        GETHDRFUNCEXPR(_dt, _name, h->_field)
+#define GETHDRFUNCERR(_dt, _name)                                                \
+        static uint32 ep_to_cpu_hdr##_dt##_##_name##_get(void *hdr) {            \
+                COMPILER_REFERENCE(hdr);                                         \
+                ep_to_cpu_hdr_funcerr(_dt, #_name "_get");                       \
+                return 0;                                                        \
+        }
+#define GETHDRFUNCNULL(_dt, _name)                                               \
+        static uint32 ep_to_cpu_hdr##_dt##_##_name##_get(void *hdr) {            \
+                COMPILER_REFERENCE(hdr);                                         \
+                return 0;                                                        \
+        }
+#define GETHDRPTREXPR(_dt, _name, _expr)                                         \
+        static uint32 * ep_to_cpu_hdr##_dt##_##_name##_get(void *hdr) {          \
+                ep_to_cpu_hdr##_dt##_t *h = (ep_to_cpu_hdr##_dt##_t *)hdr;       \
+                return _expr;                                                    \
+        }
+#define GETHDRPTRERR(_dt, _name)                                                 \
+        static uint32 * ep_to_cpu_hdr##_dt##_##_name##_get(void *hdr) {          \
+                COMPILER_REFERENCE(hdr);                                         \
+                ep_to_cpu_hdr_funcerr(_dt, #_name "_get");                       \
+                return NULL;                                                     \
+        }
+#define GETHDRFUNCUNITEXPR(_dt, _name, _expr)                                    \
+        static uint32 ep_to_cpu_hdr##_dt##_##_name##_get(int unit, void *hdr) {  \
+                ep_to_cpu_hdr##_dt##_t *h = (ep_to_cpu_hdr##_dt##_t *)hdr;       \
+                COMPILER_REFERENCE(unit);                                        \
+                return _expr;                                                    \
+        }
+#define GETHDRFUNCUNITFIELD(_dt, _name, _field)                                  \
+        GETHDRFUNCUNITEXPR(_dt, _name, h->_field)
+#define GETHDRFUNCUNITERR(_dt, _name)                                            \
+        static uint32 ep_to_cpu_hdr##_dt##_##_name##_get(int unit, void *hdr) {  \
+                COMPILER_REFERENCE(unit);                                        \
+                COMPILER_REFERENCE(hdr);                                         \
+                ep_to_cpu_hdr_funcerr(_dt, #_name "_get");                       \
+                return 0;                                                        \
+        }
+#define SETHDRFUNCEXPR(_dt, _name, _arg, _expr)                                  \
+        static void ep_to_cpu_hdr##_dt##_##_name##_set(void *hdr, _arg) {        \
+                ep_to_cpu_hdr##_dt##_t *h = (ep_to_cpu_hdr##_dt##_t *)hdr;       \
+                _expr;                                                           \
+        }
+#define SETHDRFUNCFIELD(_dt, _name, _field, _arg, _expr)                         \
+        SETHDRFUNCEXPR(_dt, _name, _arg, h->_field = _expr)
+#define SETHDRFUNCERR(_dt, _name, _type)                                         \
+        static void ep_to_cpu_hdr##_dt##_##_name##_set(void *hdr, _type val) {   \
+                COMPILER_REFERENCE(hdr);                                         \
+                COMPILER_REFERENCE(val);                                         \
+                ep_to_cpu_hdr_funcerr(_dt, #_name "_set");                       \
+        }
+#define SETHDRFUNCNULL(_dt, _name)                                                \
+        static uint32 ep_to_cpu_hdr##_dt##_##_name##_set(void *hdr, uint32 val) { \
+                COMPILER_REFERENCE(hdr);                                          \
+                return 0;                                                         \
+        }
+#define SETHDRFUNCEXPRIGNORE(_dt, _name, _arg, _expr)                               \
+        SETHDRFUNCEXPR(_dt, _name, _arg, COMPILER_REFERENCE(h))
+#if defined(LE_HOST)
+#define GETHDRHGFUNCEXPR(_dt, _name, _expr)                                      \
+        static uint32 ep_to_cpu_hdr##_dt##_##_name##_get(void *hdr) {            \
+                ep_to_cpu_hdr##_dt##_t *hd = (ep_to_cpu_hdr##_dt##_t *)hdr;      \
+                uint32  hgh[3];                                                  \
+                soc_higig_hdr_t *h = (soc_higig_hdr_t *)&hgh[0];                 \
+                hgh[0] = soc_htonl(hd->mh0);                                     \
+                hgh[1] = soc_htonl(hd->mh1);                                     \
+                hgh[2] = soc_htonl(hd->mh2);                                     \
+                return _expr;                                                    \
+        }
+#else
+#define GETHDRHGFUNCEXPR(_dt, _name, _expr)                                      \
+        static uint32 ep_to_cpu_hdr##_dt##_##_name##_get(void *hdr) {            \
+                ep_to_cpu_hdr##_dt##_t *hd = (ep_to_cpu_hdr##_dt##_t *)hdr;      \
+                soc_higig_hdr_t *h = (soc_higig_hdr_t *)&hd->mh0;                \
+                return _expr;                                                    \
+        }
+#endif
+#define GETHDRHGFUNCFIELD(_dt, _name, _field)                                    \
+        GETHDRHGFUNCEXPR(_dt, _name, h->hgp_overlay1._field)
+
+#if defined(LE_HOST)
+#define GETHDRHG2FUNCEXPR(_dt, _name, _expr)                                     \
+        static uint32 ep_to_cpu_hdr##_dt##_##_name##_get(void *hdr) {            \
+                ep_to_cpu_hdr##_dt##_t *hd = (ep_to_cpu_hdr##_dt##_t *)hdr;      \
+                uint32  hgh[4];                                                  \
+                soc_higig2_hdr_t *h = (soc_higig2_hdr_t *)&hgh[0];               \
+                hgh[0] = soc_htonl(hd->mh0);                                     \
+                hgh[1] = soc_htonl(hd->mh1);                                     \
+                hgh[2] = soc_htonl(hd->mh2);                                     \
+                hgh[3] = soc_htonl(hd->mh3);                                     \
+                return _expr;                                                    \
+        }
+#else
+#define GETHDRHG2FUNCEXPR(_dt, _name, _expr)                                     \
+        static uint32 ep_to_cpu_hdr##_dt##_##_name##_get(void *hdr) {            \
+                ep_to_cpu_hdr##_dt##_t *hd = (ep_to_cpu_hdr##_dt##_t *)hdr;      \
+                soc_higig2_hdr_t *h = (soc_higig2_hdr_t *)&hd->mh0;              \
+                return _expr;                                                    \
+        }
+#endif
+#define GETHDRHG2FUNCFIELD(_dt, _name, _field)                                   \
+        GETHDRHG2FUNCEXPR(_dt, _name, h->ppd_overlay1._field)
+
+#if defined(LE_HOST)
+#define GETHDRHGFUNCUNITEXPR(_dt, _name, _expr)                                  \
+        static uint32 ep_to_cpu_hdr##_dt##_##_name##_get(int unit, void *hdr) {  \
+                ep_to_cpu_hdr##_dt##_t *hd = (ep_to_cpu_hdr##_dt##_t *)hdr;      \
+                uint32  hgh[3];                                                  \
+                soc_higig_hdr_t *h = (soc_higig_hdr_t *)&hgh[0];                 \
+                COMPILER_REFERENCE(unit);                                        \
+                hgh[0] = soc_htonl(hd->mh0);                                     \
+                hgh[1] = soc_htonl(hd->mh1);                                     \
+                hgh[2] = soc_htonl(hd->mh2);                                     \
+                return _expr;                                                    \
+        }
+#else
+#define GETHDRHGFUNCUNITEXPR(_dt, _name, _expr)                                  \
+        static uint32 ep_to_cpu_hdr##_dt##_##_name##_get(int unit, void *hdr) {  \
+                ep_to_cpu_hdr##_dt##_t *hd = (ep_to_cpu_hdr##_dt##_t *)dcb;      \
+                soc_higig_hdr_t *h = (soc_higig_hdr_t *)&hd->mh0;                \
+                COMPILER_REFERENCE(unit);                                        \
+                return _expr;                                                    \
+        }
+#endif
+
+#if defined(LE_HOST)
+#define GETHDRHG2FUNCUNITEXPR(_dt, _name, _expr)                                 \
+        static uint32 ep_to_cpu_hdr##_dt##_##_name##_get(int unit, void *hdr) {  \
+                ep_to_cpu_hdr##_dt##_t *hd = (ep_to_cpu_hdr##_dt##_t *)hdr;      \
+                uint32  hgh[4];                                                  \
+                soc_higig2_hdr_t *h = (soc_higig2_hdr_t *)&hgh[0];               \
+                COMPILER_REFERENCE(unit);                                        \
+                hgh[0] = soc_htonl(hd->mh0);                                     \
+                hgh[1] = soc_htonl(hd->mh1);                                     \
+                hgh[2] = soc_htonl(hd->mh2);                                     \
+                hgh[3] = soc_htonl(hd->mh3);                                     \
+                return _expr;                                                    \
+        }
+#else
+#define GETHDRHG2FUNCUNITEXPR(_dt, _name, _expr)                                 \
+        static uint32 ep_to_cpu_hdr##_dt##_##_name##_get(int unit, void *hdr) {  \
+                ep_to_cpu_hdr##_dt##_t *hd = (ep_to_cpu_hdr##_dt##_t *)hdr;      \
+                soc_higig2_hdr_t *h = (soc_higig2_hdr_t *)&hd->mh0;              \
+                COMPILER_REFERENCE(unit);                                        \
+                return _expr;                                                    \
+        }
+#endif
+
+/*
+ * Short cuts for generating dcb support functions.
+ * Most support functions are just setting or getting a field
+ * in the appropriate dcb structure or doing a simple expression
+ * based on a couple of fields.
+ *      GETFUNCFIELD - get a field from DCB
+ *      SETFUNCFIELD - set a field in DCB
+ *      SETFUNCERR - dummy handler for field that does not exist for
+ *                      a descriptor type
+ *      GETFUNCERR - dummy handler for field that does not exist for
+ *                      a descriptor type
+ */
+#define GETFUNCEXPR(_dt, _name, _expr)                                  \
+        static uint32 dcb##_dt##_##_name##_get(dcb_t *dcb) {            \
+                dcb##_dt##_t *d = (dcb##_dt##_t *)dcb;                  \
+                return _expr;                                           \
+        }
+#define GETFUNCFIELD(_dt, _name, _field)                                \
+        GETFUNCEXPR(_dt, _name, d->_field)
+#define GETFUNCERR(_dt, _name)                                          \
+        static uint32 dcb##_dt##_##_name##_get(dcb_t *dcb) {            \
+                COMPILER_REFERENCE(dcb);                                \
+                dcb0_funcerr(_dt, #_name "_get");                       \
+                return 0;                                               \
+        }
+#define GETFUNCNULL(_dt, _name)                                         \
+        static uint32 dcb##_dt##_##_name##_get(dcb_t *dcb) {            \
+                COMPILER_REFERENCE(dcb);                                \
+                return 0;                                               \
+        }
+#define GETPTREXPR(_dt, _name, _expr)                                   \
+        static uint32 * dcb##_dt##_##_name##_get(dcb_t *dcb) {          \
+                dcb##_dt##_t *d = (dcb##_dt##_t *)dcb;                  \
+                return _expr;                                           \
+        }
+#define GETPTRERR(_dt, _name)                                           \
+        static uint32 * dcb##_dt##_##_name##_get(dcb_t *dcb) {          \
+                COMPILER_REFERENCE(dcb);                                \
+                dcb0_funcerr(_dt, #_name "_get");                       \
+                return NULL;                                            \
+        }
+#define GETFUNCUNITEXPR(_dt, _name, _expr)                              \
+        static uint32 dcb##_dt##_##_name##_get(int unit, dcb_t *dcb) {  \
+                dcb##_dt##_t *d = (dcb##_dt##_t *)dcb;                  \
+                COMPILER_REFERENCE(unit);                               \
+                return _expr;                                           \
+        }
+#define GETFUNCUNITFIELD(_dt, _name, _field)                            \
+        GETFUNCUNITEXPR(_dt, _name, d->_field)
+#define GETFUNCUNITERR(_dt, _name)                                      \
+        static uint32 dcb##_dt##_##_name##_get(int unit, dcb_t *dcb) {  \
+                COMPILER_REFERENCE(unit);                               \
+                COMPILER_REFERENCE(dcb);                                \
+                dcb0_funcerr(_dt, #_name "_get");                       \
+                return 0;                                               \
+        }
+#define SETFUNCEXPR(_dt, _name, _arg, _expr)                            \
+        static void dcb##_dt##_##_name##_set(dcb_t *dcb, _arg) {        \
+                dcb##_dt##_t *d = (dcb##_dt##_t *)dcb;                  \
+                _expr;                                                  \
+        }
+#define SETFUNCFIELD(_dt, _name, _field, _arg, _expr)                   \
+        SETFUNCEXPR(_dt, _name, _arg, d->_field = _expr)
+#define SETFUNCERR(_dt, _name, _type)                                   \
+        static void dcb##_dt##_##_name##_set(dcb_t *dcb, _type val) {   \
+                COMPILER_REFERENCE(dcb);                                \
+                COMPILER_REFERENCE(val);                                \
+                dcb0_funcerr(_dt, #_name "_set");                       \
+        }
+#define SETFUNCNULL(_dt, _name)                                         \
+        static uint32 dcb##_dt##_##_name##_set(dcb_t *dcb,uint32 val) { \
+                COMPILER_REFERENCE(dcb);                                \
+                return 0;                                               \
+        }
+#define SETFUNCNULL2(_dt, _name)                                        \
+        static void dcb##_dt##_##_name##_set(dcb_t *dcb,uint32 val) {   \
+                COMPILER_REFERENCE(dcb);                                \
+        }
+
+#define SETFUNCEXPRIGNORE(_dt, _name, _arg, _expr)                      \
+        SETFUNCEXPR(_dt, _name, _arg, COMPILER_REFERENCE(d))
+#if defined(LE_HOST)
+#define GETHGFUNCEXPR(_dt, _name, _expr)                                \
+        static uint32 dcb##_dt##_##_name##_get(dcb_t *dcb) {            \
+                dcb##_dt##_t *d = (dcb##_dt##_t *)dcb;                  \
+                uint32  hgh[3];                                         \
+                soc_higig_hdr_t *h = (soc_higig_hdr_t *)&hgh[0];        \
+                hgh[0] = soc_htonl(d->mh0);                             \
+                hgh[1] = soc_htonl(d->mh1);                             \
+                hgh[2] = soc_htonl(d->mh2);                             \
+                return _expr;                                           \
+        }
+#else
+#define GETHGFUNCEXPR(_dt, _name, _expr)                                \
+        static uint32 dcb##_dt##_##_name##_get(dcb_t *dcb) {            \
+                dcb##_dt##_t *d = (dcb##_dt##_t *)dcb;                  \
+                soc_higig_hdr_t *h = (soc_higig_hdr_t *)&d->mh0;        \
+                return _expr;                                           \
+        }
+#endif
+#define GETHGFUNCFIELD(_dt, _name, _field)                              \
+        GETHGFUNCEXPR(_dt, _name, h->hgp_overlay1._field)
+
+#if defined(LE_HOST)
+#define GETHG2FUNCEXPR(_dt, _name, _expr)                               \
+        static uint32 dcb##_dt##_##_name##_get(dcb_t *dcb) {            \
+                dcb##_dt##_t *d = (dcb##_dt##_t *)dcb;                  \
+                uint32  hgh[4];                                         \
+                soc_higig2_hdr_t *h = (soc_higig2_hdr_t *)&hgh[0];      \
+                hgh[0] = soc_htonl(d->mh0);                             \
+                hgh[1] = soc_htonl(d->mh1);                             \
+                hgh[2] = soc_htonl(d->mh2);                             \
+                hgh[3] = soc_htonl(d->mh3);                             \
+                return _expr;                                           \
+        }
+#else
+#define GETHG2FUNCEXPR(_dt, _name, _expr)                               \
+        static uint32 dcb##_dt##_##_name##_get(dcb_t *dcb) {            \
+                dcb##_dt##_t *d = (dcb##_dt##_t *)dcb;                  \
+                soc_higig2_hdr_t *h = (soc_higig2_hdr_t *)&d->mh0;      \
+                return _expr;                                           \
+        }
+#endif
+#define GETHG2FUNCFIELD(_dt, _name, _field)                             \
+        GETHG2FUNCEXPR(_dt, _name, h->ppd_overlay1._field)
+
+#if defined(LE_HOST)
+#define GETHGFUNCUNITEXPR(_dt, _name, _expr)                           \
+        static uint32 dcb##_dt##_##_name##_get(int unit, dcb_t *dcb) {  \
+                dcb##_dt##_t *d = (dcb##_dt##_t *)dcb;                  \
+                uint32  hgh[3];                                         \
+                soc_higig_hdr_t *h = (soc_higig_hdr_t *)&hgh[0];      \
+                COMPILER_REFERENCE(unit);                               \
+                hgh[0] = soc_htonl(d->mh0);                             \
+                hgh[1] = soc_htonl(d->mh1);                             \
+                hgh[2] = soc_htonl(d->mh2);                             \
+                return _expr;                                           \
+        }
+#else
+#define GETHGFUNCUNITEXPR(_dt, _name, _expr)                           \
+        static uint32 dcb##_dt##_##_name##_get(int unit, dcb_t *dcb) {  \
+                dcb##_dt##_t *d = (dcb##_dt##_t *)dcb;                  \
+                soc_higig_hdr_t *h = (soc_higig_hdr_t *)&d->mh0;      \
+                COMPILER_REFERENCE(unit);                               \
+                return _expr;                                           \
+        }
+#endif
+
+#if defined(LE_HOST)
+#define GETHG2FUNCUNITEXPR(_dt, _name, _expr)                           \
+        static uint32 dcb##_dt##_##_name##_get(int unit, dcb_t *dcb) {  \
+                dcb##_dt##_t *d = (dcb##_dt##_t *)dcb;                  \
+                uint32  hgh[4];                                         \
+                soc_higig2_hdr_t *h = (soc_higig2_hdr_t *)&hgh[0];      \
+                COMPILER_REFERENCE(unit);                               \
+                hgh[0] = soc_htonl(d->mh0);                             \
+                hgh[1] = soc_htonl(d->mh1);                             \
+                hgh[2] = soc_htonl(d->mh2);                             \
+                hgh[3] = soc_htonl(d->mh3);                             \
+                return _expr;                                           \
+        }
+#else
+#define GETHG2FUNCUNITEXPR(_dt, _name, _expr)                           \
+        static uint32 dcb##_dt##_##_name##_get(int unit, dcb_t *dcb) {  \
+                dcb##_dt##_t *d = (dcb##_dt##_t *)dcb;                  \
+                soc_higig2_hdr_t *h = (soc_higig2_hdr_t *)&d->mh0;      \
+                COMPILER_REFERENCE(unit);                               \
+                return _expr;                                           \
+        }
+#endif
+
+/*
+ * This is a standard function used to generate a debug message whenever 
+ * the code tries to access a field not present in the specific DCB
+ */
+static void
+dcb0_funcerr(int dt, char *name)
+{
+    LOG_ERROR(BSL_LS_SOC_COMMON,
+              (BSL_META("ERROR: dcb%d_%s called\n"), dt, name));
+}
+
+/* the addr related functions are the same for all dcb types */
+static void
+dcb0_addr_set(int unit, dcb_t *dcb, sal_vaddr_t addr)
+{
+    uint32      *d = (uint32 *)dcb;
+
+    if (addr == 0) {
+        *d = 0;
+    } else {
+        *d = soc_cm_l2p(unit, (void *)addr);
+    }
+}
+
+static sal_vaddr_t
+dcb0_addr_get(int unit, dcb_t *dcb)
+{
+    uint32      *d = (uint32 *)dcb;
+
+    if (*d == 0) {
+        return (sal_vaddr_t)0;
+    } else {
+        return (sal_vaddr_t)soc_cm_p2l(unit, *d);
+    }
+}
+
+static sal_paddr_t
+dcb0_paddr_get(dcb_t *dcb)
+{
+    uint32      *d = (uint32 *)dcb;
+
+    return (sal_paddr_t)*d;
+}
+
+/*
+ * Function:
+ *      dcb0_rx_reason_map_get
+ * Purpose:
+ *      Return the RX reason map for a series of DCB types.
+ * Parameters:
+ *      dcb_op - DCB operations
+ *      dcb    - dma control block
+ * Returns:
+ *      RX reason map pointer
+ * Notes:
+ *      Function made global to resolve compiler link issue.
+ */
+soc_rx_reason_t *
+dcb0_rx_reason_map_get(dcb_op_t *dcb_op, dcb_t *dcb)
+{
+    COMPILER_REFERENCE(dcb);
+
+    return dcb_op->rx_reason_maps[0];
+}
+
+/*
+ * Function:
+ *      dcb0_rx_reasons_get
+ * Purpose:
+ *      Map the hardware reason bits from 'dcb' into the set
+ *      of "reasons".
+ * Parameters:
+ *      dcb_op  - DCB operations
+ *      dcb     - dma control block
+ *      reasons - set of "reasons", socRxReason*
+ */
+static void        
+dcb0_rx_reasons_get(dcb_op_t *dcb_op, dcb_t *dcb, soc_rx_reasons_t *reasons)
+{
+    soc_rx_reason_t *map;
+    uint32 reason;
+    uint32 mask;
+    int i;    
+
+    SOC_RX_REASON_CLEAR_ALL(*reasons);
+
+    map = dcb_op->rx_reason_map_get(dcb_op, dcb);
+    if (map == NULL) {
+        return;
+    }
+
+    reason = dcb_op->rx_reason_get(dcb);
+    mask = 1;
+    for (i = 0; i < 32; i++) {
+        if ((mask & reason)) {
+            SOC_RX_REASON_SET(*reasons, map[i]);
+        }
+        mask <<= 1;
+    }
+
+    reason = dcb_op->rx_reason_hi_get(dcb);
+    mask = 1;
+    for (i = 0; i < 32; i++) {
+        if ((mask & reason)) {
+            SOC_RX_REASON_SET(*reasons, map[i + 32]);
+        }
+        mask <<= 1;
+    }
+
+    /* BPDU bit should be a reason, paste it in here */
+    if (dcb_op->rx_bpdu_get(dcb)) {
+        SOC_RX_REASON_SET(*reasons, socRxReasonBpdu);
+    }
+
+    return;
+}
+
+#if defined(BCM_XGS3_SWITCH_SUPPORT)
+/*
+ * DCB Type 9 Support
+ */
+GETFUNCFIELD(9, rx_l3_intf, l3_intf)
+#endif /* BCM_XGS3_SWITCH_SUPPORT */
+
+#if defined(BCM_TRIUMPH2_SUPPORT)
+static void
+dcb19_init(dcb_t *dcb)
+{
+    uint32      *d = (uint32 *)dcb;
+
+    d[0] = d[1] = d[2] = d[3] = d[4] = 0;
+    d[5] = d[6] = d[7] = d[8] = d[9] = d[10] = 0;
+    d[11] = d[12] = d[13] = d[14] = d[15] = 0;
+}
+
+static int
+dcb19_addtx(dv_t *dv, sal_vaddr_t addr, uint32 count,
+            pbmp_t l2pbm, pbmp_t utpbm, pbmp_t l3pbm, uint32 flags, uint32 *hgh)
+{
+    dcb19_t     *d;     /* DCB */
+    uint32      *di;    /* DCB integer pointer */
+    uint32      paddr;  /* Packet buffer physical address */
+    int         unaligned;
+    int         unaligned_bytes;
+    uint8       *unaligned_buffer;
+    uint8       *aligned_buffer;
+
+    d = (dcb19_t *)SOC_DCB_IDX2PTR(dv->dv_unit, dv->dv_dcb, dv->dv_vcnt);
+
+    if (addr) {
+        paddr = soc_cm_l2p(dv->dv_unit, (void *)addr);
+    } else {
+        paddr = 0;
+    }
+
+    if (dv->dv_vcnt > 0 && (dv->dv_flags & DV_F_COMBINE_DCB) &&
+        (d[-1].c_sg != 0) &&
+        (d[-1].addr + d[-1].c_count) == paddr &&
+        d[-1].c_count + count <= DCB_MAX_REQCOUNT) {
+        d[-1].c_count += count;
+        return dv->dv_cnt - dv->dv_vcnt;
+    }
+
+    /*
+     * A few chip revisions do not support 128 byte PCI bursts
+     * correctly if the address is not word-aligned. In case
+     * we encounter an unaligned address, we consume an extra
+     * DCB to correct the alignment.
+     */
+    do {
+        if (dv->dv_vcnt >= dv->dv_cnt) {
+            return SOC_E_FULL;
+        }
+        if (dv->dv_vcnt > 0) {      /* chain off previous dcb */
+            d[-1].c_chain = 1;
+        }
+
+        di = (uint32 *)d;
+        di[0] = di[1] = di[2] = di[3] = di[4] = 0;
+        di[5] = di[6] = di[7] = di[8] = di[9] = di[10] = 0;
+        di[11] = di[12] = di[13] = di[14] = di[15] = 0;
+
+        d->addr = paddr;
+        d->c_count = count;
+        d->c_sg = 1;
+
+        d->c_stat = 1;
+        d->c_purge = SOC_DMA_PURGE_GET(flags);
+        if (SOC_DMA_HG_GET(flags)) {
+            soc_higig_hdr_t *mh = (soc_higig_hdr_t *)hgh;
+            if (mh->overlay1.start == SOC_HIGIG2_START) {
+                d->mh3 = soc_ntohl(hgh[3]);
+            }
+            d->c_hg = 1;
+            d->mh0 = soc_ntohl(hgh[0]);
+            d->mh1 = soc_ntohl(hgh[1]);
+            d->mh2 = soc_ntohl(hgh[2]);
+            d->mh3 = soc_ntohl(hgh[3]);
+        }
+
+        unaligned = 0;
+        if (soc_feature(dv->dv_unit, soc_feature_pkt_tx_align)) {
+            if (paddr & 0x3) {
+                unaligned_bytes = 4 - (paddr & 0x3);
+                unaligned_buffer = (uint8 *)addr;
+                aligned_buffer = SOC_DV_TX_ALIGN(dv, dv->dv_vcnt);
+                aligned_buffer[0] = unaligned_buffer[0];
+                aligned_buffer[1] = unaligned_buffer[1];
+                aligned_buffer[2] = unaligned_buffer[2];
+                d->addr = soc_cm_l2p(dv->dv_unit, aligned_buffer);
+                if (count > 3) {
+                    d->c_count = unaligned_bytes;
+                    paddr += unaligned_bytes;
+                    count -= unaligned_bytes;
+                    unaligned = 1;
+                }
+            }
+        }
+
+        dv->dv_vcnt += 1;
+
+        d = (dcb19_t *)SOC_DCB_IDX2PTR(dv->dv_unit, dv->dv_dcb, dv->dv_vcnt);
+
+    } while (unaligned);
+
+    return dv->dv_cnt - dv->dv_vcnt;
+}
+
+static int
+dcb19_addrx(dv_t *dv, sal_vaddr_t addr, uint32 count, uint32 flags)
+{
+    dcb19_t     *d;     /* DCB */
+    uint32      *di;    /* DCB integer pointer */
+
+    d = (dcb19_t *)SOC_DCB_IDX2PTR(dv->dv_unit, dv->dv_dcb, dv->dv_vcnt);
+
+    if (dv->dv_vcnt > 0) {      /* chain off previous dcb */
+        d[-1].c_chain = 1;
+    }
+
+    di = (uint32 *)d;
+    di[0] = di[1] = di[2] = di[3] = di[4] = 0;
+    di[5] = di[6] = di[7] = di[8] = di[9] = di[10] = 0;
+    di[11] = di[12] = di[13] = di[14] = di[15] = 0;
+
+    if (addr) {
+        d->addr = soc_cm_l2p(dv->dv_unit, (void *)addr);
+    }
+    d->c_count = count;
+    d->c_sg = 1;
+
+    dv->dv_vcnt += 1;
+    return dv->dv_cnt - dv->dv_vcnt;
+}
+
+static uint32
+dcb19_intrinfo(int unit, dcb_t *dcb, int tx, uint32 *count)
+{
+    dcb19_t      *d = (dcb19_t *)dcb;     /*  DCB */
+    uint32      f;                      /* SOC_DCB_INFO_* flags */
+
+    if (!d->done) {
+        return 0;
+    }
+    f = SOC_DCB_INFO_DONE;
+    if (tx) {
+        if (!d->c_sg) {
+            f |= SOC_DCB_INFO_PKTEND;
+        }
+    } else {
+        if (d->end) {
+            f |= SOC_DCB_INFO_PKTEND;
+        }
+    }
+    *count = d->count;
+    return f;
+}
+
+static uint32
+dcb19_rx_untagged_get(dcb_t *dcb, int dt_mode, int ingport_is_hg)
+{
+    dcb19_t *d = (dcb19_t *)dcb;
+
+    COMPILER_REFERENCE(dt_mode);
+
+    return (ingport_is_hg ?
+            ((d->itag_status) ? 0 : 2) :
+            ((d->itag_status & 0x2) ?
+             ((d->itag_status & 0x1) ? 0 : 2) :
+             ((d->itag_status & 0x1) ? 1 : 3)));
+}
+
+SETFUNCFIELD(19, reqcount, c_count, uint32 count, count)
+GETFUNCFIELD(19, reqcount, c_count)
+GETFUNCFIELD(19, xfercount, count)
+/* addr_set, addr_get, paddr_get - Same as DCB 0 */
+SETFUNCFIELD(19, done, done, int val, val ? 1 : 0)
+GETFUNCFIELD(19, done, done)
+SETFUNCFIELD(19, sg, c_sg, int val, val ? 1 : 0)
+GETFUNCFIELD(19, sg, c_sg)
+SETFUNCFIELD(19, chain, c_chain, int val, val ? 1 : 0)
+GETFUNCFIELD(19, chain, c_chain)
+SETFUNCFIELD(19, reload, c_reload, int val, val ? 1 : 0)
+GETFUNCFIELD(19, reload, c_reload)
+SETFUNCERR(19, desc_intr, int)
+GETFUNCERR(19, desc_intr)
+SETFUNCERR(19, tx_l2pbm, pbmp_t)
+SETFUNCERR(19, tx_utpbm, pbmp_t)
+SETFUNCERR(19, tx_l3pbm, pbmp_t)
+SETFUNCERR(19, tx_crc, int)
+SETFUNCERR(19, tx_cos, int)
+SETFUNCERR(19, tx_destmod, uint32)
+SETFUNCERR(19, tx_destport, uint32)
+SETFUNCERR(19, tx_opcode, uint32)
+SETFUNCERR(19, tx_srcmod, uint32)
+SETFUNCERR(19, tx_srcport, uint32)
+SETFUNCERR(19, tx_prio, uint32)
+SETFUNCERR(19, tx_pfm, uint32)
+GETFUNCFIELD(19, rx_start, start)
+GETFUNCFIELD(19, rx_end, end)
+GETFUNCFIELD(19, rx_error, error)
+GETFUNCFIELD(19, rx_cos, cpu_cos)
+/* Fields extracted from MH/PBI */
+GETHG2FUNCFIELD(19, rx_destmod, dst_mod)
+GETHG2FUNCFIELD(19, rx_destport, dst_port)
+GETHG2FUNCFIELD(19, rx_srcmod, src_mod)
+GETHG2FUNCFIELD(19, rx_srcport, src_port)
+GETHG2FUNCFIELD(19, rx_opcode, opcode)
+GETHG2FUNCFIELD(19, rx_prio, vlan_pri) /* outer_pri */
+GETHG2FUNCEXPR(19, rx_mcast, ((h->ppd_overlay1.dst_mod << 8) |
+                              (h->ppd_overlay1.dst_port)))
+GETHG2FUNCEXPR(19, rx_vclabel, ((h->ppd_overlay1.vc_label_19_16 << 16) |
+                              (h->ppd_overlay1.vc_label_15_8 << 8) |
+                              (h->ppd_overlay1.vc_label_7_0)))
+GETHG2FUNCEXPR(19, rx_classtag, (h->ppd_overlay1.ppd_type != 1 ? 0 :
+                                 (h->ppd_overlay2.ctag_hi << 8) |
+                                 (h->ppd_overlay2.ctag_lo)))
+GETFUNCFIELD(19, rx_reason, reason)
+GETFUNCFIELD(19, rx_reason_hi, reason_hi)
+GETFUNCFIELD(19, rx_ingport, srcport)
+GETFUNCEXPR(19, rx_mirror, ((d->imirror) | (d->emirror)))
+SETFUNCFIELD(19, hg, c_hg, uint32 hg, hg)
+GETFUNCFIELD(19, hg, c_hg)
+SETFUNCFIELD(19, stat, c_stat, uint32 stat, stat)
+GETFUNCFIELD(19, stat, c_stat)
+SETFUNCFIELD(19, purge, c_purge, uint32 purge, purge)
+GETFUNCFIELD(19, purge, c_purge)
+GETPTREXPR(19, mhp, &(d->mh0))
+GETFUNCFIELD(19, outer_vid, outer_vid)
+GETFUNCFIELD(19, outer_pri, outer_pri)
+GETFUNCFIELD(19, outer_cfi, outer_cfi)
+GETFUNCFIELD(19, rx_outer_tag_action, otag_action)
+GETFUNCFIELD(19, inner_vid, inner_vid)
+GETFUNCFIELD(19, inner_pri, inner_pri)
+GETFUNCFIELD(19, inner_cfi, inner_cfi)
+GETFUNCFIELD(19, rx_inner_tag_action, itag_action)
+GETFUNCFIELD(19, rx_bpdu, bpdu)
+GETFUNCNULL(19, rx_decap_tunnel)
+
+static uint32 dcb19_rx_crc_get(dcb_t *dcb) {
+    return 0;
+}
+
+#endif /* BCM_TRIUMPH2_SUPPORT */
+
+#if defined(BCM_ENDURO_SUPPORT) || defined(BCM_HURRICANE_SUPPORT)
+/*
+ * DCB Type 20 Support
+ */
+
+static soc_rx_reason_t
+dcb20_rx_reason_map[] = {
+    socRxReasonUnknownVlan,        /* Offset 0 */
+    socRxReasonL2SourceMiss,       /* Offset 1 */
+    socRxReasonL2DestMiss,         /* Offset 2 */
+    socRxReasonL2Move,             /* Offset 3 */
+    socRxReasonL2Cpu,              /* Offset 4 */
+    socRxReasonSampleSource,       /* Offset 5 */
+    socRxReasonSampleDest,         /* Offset 6 */
+    socRxReasonL3SourceMiss,       /* Offset 7 */
+    socRxReasonL3DestMiss,         /* Offset 8 */
+    socRxReasonL3SourceMove,       /* Offset 9 */
+    socRxReasonMcastMiss,          /* Offset 10 */
+    socRxReasonIpMcastMiss,        /* Offset 11 */
+    socRxReasonFilterMatch,        /* Offset 12 */
+    socRxReasonL3HeaderError,      /* Offset 13 */
+    socRxReasonProtocol,           /* Offset 14 */
+    socRxReasonDosAttack,          /* Offset 15 */
+    socRxReasonMartianAddr,        /* Offset 16 */
+    socRxReasonTunnelError,        /* Offset 17 */
+    socRxReasonL2MtuFail,          /* Offset 18 */
+    socRxReasonIcmpRedirect,       /* Offset 19 */
+    socRxReasonL3Slowpath,         /* Offset 20 */
+    socRxReasonParityError,        /* Offset 21 */
+    socRxReasonL3MtuFail,          /* Offset 22 */
+    socRxReasonHigigHdrError,      /* Offset 23 */
+    socRxReasonMcastIdxError,      /* Offset 24 */
+    socRxReasonVlanFilterMatch,    /* Offset 25 */
+    socRxReasonClassBasedMove,     /* Offset 26 */
+    socRxReasonL2LearnLimit,       /* Offset 27 */
+    socRxReasonMplsLabelMiss,      /* Offset 28 */
+    socRxReasonMplsInvalidAction,  /* Offset 29 */
+    socRxReasonMplsInvalidPayload, /* Offset 30 */
+    socRxReasonMplsTtl,            /* Offset 31 */
+    socRxReasonMplsSequenceNumber, /* Offset 32 */
+    socRxReasonL2NonUnicastMiss,   /* Offset 33 */
+    socRxReasonNhop,               /* Offset 34 */
+    socRxReasonMplsCtrlWordError,  /* Offset 35 */
+    socRxReasonTimeSync,           /* Offset 36 */
+    socRxReasonOAMSlowpath,        /* Offset 37 */
+    socRxReasonOAMError,           /* Offset 38 */
+    socRxReasonOAMLMDM,            /* Offset 39 */
+    socRxReasonInvalid,            /* Offset 40 */
+    socRxReasonInvalid,            /* Offset 41 */
+    socRxReasonInvalid,            /* Offset 42 */
+    socRxReasonInvalid,            /* Offset 43 */
+    socRxReasonInvalid,            /* Offset 44 */
+    socRxReasonInvalid,            /* Offset 45 */
+    socRxReasonInvalid,            /* Offset 46 */
+    socRxReasonInvalid,            /* Offset 47 */
+    socRxReasonInvalid,            /* Offset 48 */
+    socRxReasonInvalid,            /* Offset 49 */
+    socRxReasonInvalid,            /* Offset 50 */
+    socRxReasonInvalid,            /* Offset 51 */
+    socRxReasonInvalid,            /* Offset 52 */
+    socRxReasonInvalid,            /* Offset 53 */
+    socRxReasonInvalid,            /* Offset 54 */
+    socRxReasonInvalid,            /* Offset 55 */
+    socRxReasonInvalid,            /* Offset 56 */
+    socRxReasonInvalid,            /* Offset 57 */
+    socRxReasonInvalid,            /* Offset 58 */
+    socRxReasonInvalid,            /* Offset 59 */
+    socRxReasonInvalid,            /* Offset 60 */
+    socRxReasonInvalid,            /* Offset 61 */
+    socRxReasonInvalid,            /* Offset 62 */
+    socRxReasonInvalid             /* Offset 63 */
+};
+
+static soc_rx_reason_t *dcb20_rx_reason_maps[] = {
+    dcb20_rx_reason_map,
+    NULL
+};
+
+GETFUNCFIELD(20, rx_matchrule, match_rule)
+GETFUNCFIELD(20, rx_timestamp, timestamp)
+GETFUNCFIELD(20, rx_timestamp_upper, timestamp_upper)
+#endif /* BCM_ENDURO_SUPPORT || BCM_HURRICANE_SUPPORT */
+
+#if defined(BCM_TRIDENT_SUPPORT)
+/*
+ * DCB Type 21 Support
+ */
+/* From FORMAT NIV_CPU_OPCODE_ENCODING */
+static soc_rx_reason_t dcb21_rx_reason_niv_encoding_map[] = {
+    socRxReasonNiv,                /* 0: NO_ERRORS
+                                    * Base field, must match the entries above */
+    socRxReasonNivPrioDrop,        /* 1:DOT1P_ADMITTANCE_DISCARD */
+    socRxReasonNivInterfaceMiss,   /* 2:VIF_LOOKUP_MISS */
+    socRxReasonNivRpfFail,         /* 3:RPF_LOOKUP_MISS */
+    socRxReasonNivTagInvalid,      /* 4:VNTAG_FORMAT_ERROR */
+    socRxReasonNivTagDrop,         /* 5:VNTAG_PRESENT_DROP */
+    socRxReasonNivUntagDrop,       /* 6:VNTAG_NOT_PRESENT_DROP */
+    socRxReasonInvalid,            /* Offset 7 */
+    socRxReasonInvalid,            /* Offset 8 */
+    socRxReasonInvalid,            /* Offset 9 */
+    socRxReasonInvalid,            /* Offset 10 */
+    socRxReasonInvalid,            /* Offset 11 */
+    socRxReasonInvalid,            /* Offset 12 */
+    socRxReasonInvalid,            /* Offset 13 */
+    socRxReasonInvalid,            /* Offset 14 */
+    socRxReasonInvalid,            /* Offset 15 */
+    socRxReasonInvalid,            /* Offset 16 */
+    socRxReasonInvalid,            /* Offset 17 */
+    socRxReasonInvalid,            /* Offset 18 */
+    socRxReasonInvalid,            /* Offset 19 */
+    socRxReasonInvalid,            /* Offset 20 */
+    socRxReasonInvalid,            /* Offset 21 */
+    socRxReasonInvalid,            /* Offset 22 */
+    socRxReasonInvalid,            /* Offset 23 */
+    socRxReasonInvalid,            /* Offset 24 */
+    socRxReasonInvalid,            /* Offset 25 */
+    socRxReasonInvalid,            /* Offset 26 */
+    socRxReasonInvalid,            /* Offset 27 */
+    socRxReasonInvalid,            /* Offset 28 */
+    socRxReasonInvalid,            /* Offset 29 */
+    socRxReasonInvalid,            /* Offset 30 */
+    socRxReasonInvalid,            /* Offset 31 */
+    socRxReasonInvalid,            /* Offset 32 */
+    socRxReasonInvalid,            /* Offset 33 */
+    socRxReasonInvalid,            /* Offset 34 */
+    socRxReasonInvalid,            /* Offset 35 */
+    socRxReasonInvalid,            /* Offset 36 */
+    socRxReasonInvalid,            /* Offset 37 */
+    socRxReasonInvalid,            /* Offset 38 */
+    socRxReasonInvalid,            /* Offset 39 */
+    socRxReasonInvalid,            /* Offset 40 */
+    socRxReasonInvalid,            /* Offset 41 */
+    socRxReasonInvalid,            /* Offset 42 */
+    socRxReasonInvalid,            /* Offset 43 */
+    socRxReasonInvalid,            /* Offset 44 */
+    socRxReasonInvalid,            /* Offset 45 */
+    socRxReasonInvalid,            /* Offset 46 */
+    socRxReasonInvalid,            /* Offset 47 */
+    socRxReasonInvalid,            /* Offset 48 */
+    socRxReasonInvalid,            /* Offset 49 */
+    socRxReasonInvalid,            /* Offset 50 */
+    socRxReasonInvalid,            /* Offset 51 */
+    socRxReasonInvalid,            /* Offset 52 */
+    socRxReasonInvalid,            /* Offset 53 */
+    socRxReasonInvalid,            /* Offset 54 */
+    socRxReasonInvalid,            /* Offset 55 */
+    socRxReasonInvalid,            /* Offset 56 */
+    socRxReasonInvalid,            /* Offset 57 */
+    socRxReasonInvalid,            /* Offset 58 */
+    socRxReasonInvalid,            /* Offset 59 */
+    socRxReasonInvalid,            /* Offset 60 */
+    socRxReasonInvalid,            /* Offset 61 */
+    socRxReasonInvalid,            /* Offset 62 */
+    socRxReasonInvalid             /* Offset 63 */
+};
+
+static void
+dcb21_rx_reasons_get(dcb_op_t *dcb_op, dcb_t *dcb, soc_rx_reasons_t *reasons)
+{
+    soc_rx_reason_t *map, *encoding_map;
+    uint32 opcode[2], encoding[3];
+    uint32 bit_val;
+    int word_idx, bit_idx, opcode_idx, map_idx, word_count;
+    int enc_bit = 0;
+
+    SOC_RX_REASON_CLEAR_ALL(*reasons);
+
+    opcode[0] = dcb_op->rx_reason_get(dcb);
+    opcode[1] = dcb_op->rx_reason_hi_get(dcb);
+    word_count = 2;
+    sal_memset(encoding, 0, sizeof(encoding));
+    map = dcb_op->rx_reason_map_get(dcb_op, dcb);
+    for (word_idx = 0; word_idx < word_count; word_idx++) {
+        for (bit_idx = 0; bit_idx < 32; bit_idx++) {
+            opcode_idx = word_idx * 32 + bit_idx;
+            bit_val = opcode[word_idx] & (1 << bit_idx) ? 1 : 0;
+            for (map_idx = 0; ; map_idx++) {
+                encoding_map = dcb_op->rx_reason_maps[1 + map_idx];
+                if (encoding_map == NULL) {
+                    break;
+                }
+                if (map[opcode_idx] != encoding_map[0]) {
+                    continue;
+                }
+                if (opcode_idx == 0 || map[opcode_idx - 1] != encoding_map[0]) {
+                    enc_bit = 0;
+                }
+                encoding[map_idx] |= bit_val << enc_bit;
+                enc_bit++;
+                break;
+            }
+            if (encoding_map == NULL && bit_val) {
+                SOC_RX_REASON_SET(*reasons, map[opcode_idx]);
+            }
+        }
+    }
+
+    for (map_idx = 0; ; map_idx++) {
+        encoding_map = dcb_op->rx_reason_maps[1 + map_idx];
+        if (encoding_map == NULL) {
+            break;
+        }
+        if (encoding[map_idx] != socRxReasonInvalid) {
+            SOC_RX_REASON_SET(*reasons, encoding_map[encoding[map_idx]]);
+        }
+    }
+
+    /* BPDU bit should be a reason, paste it in here */
+    if (dcb_op->rx_bpdu_get(dcb)) {
+        SOC_RX_REASON_SET(*reasons, socRxReasonBpdu);
+    }
+
+    return;
+}
+#endif /* BCM_TRIDENT_SUPPORT */
+
+#if defined(BCM_TRIUMPH3_SUPPORT) || defined(BCM_KATANA_SUPPORT) || \
+    defined(BCM_TRIDENT2_SUPPORT) || defined(BCM_GREYHOUND_SUPPORT)
+/*
+ * DCB Type 23 Support
+ */
+static soc_rx_reason_t
+dcb23_rx_reason_map_ip_0[] = { /* IP Overlay 0 */
+    socRxReasonUnknownVlan,        /* Offset 0 */
+    socRxReasonL2SourceMiss,       /* Offset 1 */
+    socRxReasonL2DestMiss,         /* Offset 2 */
+    socRxReasonL2Move,             /* Offset 3 */
+    socRxReasonL2Cpu,              /* Offset 4 */
+    socRxReasonSampleSource,       /* Offset 5 */
+    socRxReasonSampleDest,         /* Offset 6 */
+    socRxReasonL3SourceMiss,       /* Offset 7 */
+    socRxReasonL3DestMiss,         /* Offset 8 */
+    socRxReasonL3SourceMove,       /* Offset 9 */
+    socRxReasonMcastMiss,          /* Offset 10 */
+    socRxReasonIpMcastMiss,        /* Offset 11 */
+    socRxReasonL3HeaderError,      /* Offset 12 */
+    socRxReasonProtocol,           /* Offset 13 */
+    socRxReasonDosAttack,          /* Offset 14 */
+    socRxReasonMartianAddr,        /* Offset 15 */
+    socRxReasonTunnelError,        /* Offset 16 */
+    socRxReasonMirror,             /* Offset 17 */ 
+    socRxReasonIcmpRedirect,       /* Offset 18 */
+    socRxReasonL3Slowpath,         /* Offset 19 */
+    socRxReasonL3MtuFail,          /* Offset 20 */
+    socRxReasonMcastIdxError,      /* Offset 21 */
+    socRxReasonVlanFilterMatch,    /* Offset 22 */
+    socRxReasonClassBasedMove,     /* Offset 23 */
+    socRxReasonL3AddrBindFail,     /* Offset 24 */
+    socRxReasonMplsLabelMiss,      /* Offset 25 */
+    socRxReasonMplsInvalidAction,  /* Offset 26 */
+    socRxReasonMplsInvalidPayload, /* Offset 27 */
+    socRxReasonMplsTtl,            /* Offset 28 */
+    socRxReasonMplsSequenceNumber, /* Offset 29 */
+    socRxReasonL2NonUnicastMiss,   /* Offset 30 */
+    socRxReasonNhop,               /* Offset 31 */
+    socRxReasonStation,            /* Offset 32 */
+    socRxReasonVlanTranslate,      /* Offset 33 */
+    socRxReasonTimeSync,           /* Offset 34 */
+    socRxReasonOAMSlowpath,        /* Offset 35 */
+    socRxReasonOAMError,           /* Offset 36 */
+    socRxReasonIpfixRateViolation, /* Offset 37 */
+    socRxReasonL2LearnLimit,       /* Offset 38 */
+    socRxReasonEncapHigigError,    /* Offset 39 */
+    socRxReasonRegexMatch,         /* Offset 40 */
+    socRxReasonOAMLMDM,            /* Offset 41 */
+    socRxReasonBfd,                /* Offset 42 */
+    socRxReasonBfdSlowpath,        /* Offset 43 */
+    socRxReasonFailoverDrop,       /* Offset 44 */
+    socRxReasonTrillName,          /* Offset 45 */
+    socRxReasonTrillTtl,           /* Offset 46 */
+    socRxReasonTrillCoreIsIs,      /* Offset 47 */
+    socRxReasonTrillSlowpath,      /* Offset 48 */
+    socRxReasonTrillRpfFail,       /* Offset 49 */
+    socRxReasonTrillMiss,          /* Offset 50 */
+    socRxReasonTrillInvalid,       /* Offset 51 */
+    socRxReasonNivUntagDrop,       /* Offset 52 */
+    socRxReasonNivTagDrop,         /* Offset 53 */
+    socRxReasonNivTagInvalid,      /* Offset 54 */
+    socRxReasonNivRpfFail,         /* Offset 55 */
+    socRxReasonNivInterfaceMiss,   /* Offset 56 */
+    socRxReasonNivPrioDrop,        /* Offset 57 */
+    socRxReasonParityError,        /* Offset 58 */
+    socRxReasonHigigHdrError,      /* Offset 59 */
+    socRxReasonFilterMatch,        /* Offset 60 */
+    socRxReasonL2GreSipMiss,       /* Offset 61 */
+    socRxReasonL2GreVpnIdMiss,     /* Offset 62 */
+    socRxReasonInvalid             /* Offset 63 */
+};
+
+static soc_rx_reason_t
+dcb23_rx_reason_map_ip_1[] = { /* IP Overlay 1 */
+    socRxReasonUnknownVlan,        /* Offset 0 */
+    socRxReasonL2SourceMiss,       /* Offset 1 */
+    socRxReasonL2DestMiss,         /* Offset 2 */
+    socRxReasonL2Move,             /* Offset 3 */
+    socRxReasonL2Cpu,              /* Offset 4 */
+    socRxReasonSampleSource,       /* Offset 5 */
+    socRxReasonSampleDest,         /* Offset 6 */
+    socRxReasonL3SourceMiss,       /* Offset 7 */
+    socRxReasonL3DestMiss,         /* Offset 8 */
+    socRxReasonL3SourceMove,       /* Offset 9 */
+    socRxReasonMcastMiss,          /* Offset 10 */
+    socRxReasonIpMcastMiss,        /* Offset 11 */
+    socRxReasonL3HeaderError,      /* Offset 12 */
+    socRxReasonProtocol,           /* Offset 13 */
+    socRxReasonDosAttack,          /* Offset 14 */
+    socRxReasonMartianAddr,        /* Offset 15 */
+    socRxReasonTunnelError,        /* Offset 16 */
+    socRxReasonMirror,             /* Offset 17 */ 
+    socRxReasonIcmpRedirect,       /* Offset 18 */
+    socRxReasonL3Slowpath,         /* Offset 19 */
+    socRxReasonL3MtuFail,          /* Offset 20 */
+    socRxReasonMcastIdxError,      /* Offset 21 */
+    socRxReasonVlanFilterMatch,    /* Offset 22 */
+    socRxReasonClassBasedMove,     /* Offset 23 */
+    socRxReasonL3AddrBindFail,     /* Offset 24 */
+    socRxReasonMplsLabelMiss,      /* Offset 25 */
+    socRxReasonMplsInvalidAction,  /* Offset 26 */
+    socRxReasonMplsInvalidPayload, /* Offset 27 */
+    socRxReasonMplsTtl,            /* Offset 28 */
+    socRxReasonMplsSequenceNumber, /* Offset 29 */
+    socRxReasonL2NonUnicastMiss,   /* Offset 30 */
+    socRxReasonNhop,               /* Offset 31 */
+    socRxReasonStation,            /* Offset 32 */
+    socRxReasonVlanTranslate,      /* Offset 33 */
+    socRxReasonTimeSync,           /* Offset 34 */
+    socRxReasonOAMSlowpath,        /* Offset 35 */
+    socRxReasonOAMError,           /* Offset 36 */
+    socRxReasonIpfixRateViolation, /* Offset 37 */
+    socRxReasonL2LearnLimit,       /* Offset 38 */
+    socRxReasonEncapHigigError,    /* Offset 39 */
+    socRxReasonRegexMatch,         /* Offset 40 */
+    socRxReasonOAMLMDM,            /* Offset 41 */
+    socRxReasonBfd,                /* Offset 42 */
+    socRxReasonBfdSlowpath,        /* Offset 43 */
+    socRxReasonFailoverDrop,       /* Offset 44 */
+    socRxReasonWlanSlowpathKeepalive, /* Offset 45 */
+    socRxReasonWlanTunnelError,    /* Offset 46 */
+    socRxReasonWlanSlowpath,       /* Offset 47 */
+    socRxReasonWlanDot1xDrop,      /* Offset 48 */
+    socRxReasonMplsReservedEntropyLabel, /* Offset 49 */
+    socRxReasonCongestionCnmProxy, /* Offset 50 */
+    socRxReasonCongestionCnmProxyError, /* Offset 51 */
+    socRxReasonCongestionCnm,      /* Offset 52 */
+    socRxReasonMplsUnknownAch,     /* Offset 53 */
+    socRxReasonMplsLookupsExceeded, /* Offset 54 */
+    socRxReasonMplsIllegalReservedLabel, /* Offset 55 */
+    socRxReasonMplsRouterAlertLabel, /* Offset 56 */
+    socRxReasonInvalid,            /* Offset 57 */
+    socRxReasonParityError,        /* Offset 58 */
+    socRxReasonHigigHdrError,      /* Offset 59 */
+    socRxReasonFilterMatch,        /* Offset 60 */
+    socRxReasonL2GreSipMiss,       /* Offset 61 */
+    socRxReasonL2GreVpnIdMiss,     /* Offset 62 */
+    socRxReasonInvalid             /* Offset 63 */
+};
+
+static soc_rx_reason_t
+dcb23_rx_reason_map_ep[] = {
+    socRxReasonUnknownVlan,        /* Offset 0 */
+    socRxReasonStp,                /* Offset 1 */
+    socRxReasonVlanTranslate,      /* Offset 2 new */
+    socRxReasonTunnelError,        /* Offset 3 */
+    socRxReasonIpmc,               /* Offset 4 */
+    socRxReasonL3HeaderError,      /* Offset 5 */
+    socRxReasonTtl,                /* Offset 6 */
+    socRxReasonL2MtuFail,          /* Offset 7 */
+    socRxReasonHigigHdrError,      /* Offset 8 */
+    socRxReasonSplitHorizon,       /* Offset 9 */
+    socRxReasonNivPrune,           /* Offset 10 */
+    socRxReasonVirtualPortPrune,   /* Offset 11 */
+    socRxReasonFilterMatch,        /* Offset 12 */
+    socRxReasonNonUnicastDrop,     /* Offset 13 */
+    socRxReasonTrillPacketPortMismatch, /* Offset 14 */
+    socRxReasonInvalid,            /* Offset 15 */
+    socRxReasonInvalid,            /* Offset 16 */
+    socRxReasonInvalid,            /* Offset 17 */
+    socRxReasonInvalid,            /* Offset 18 */
+    socRxReasonInvalid,            /* Offset 19 */
+    socRxReasonInvalid,            /* Offset 20 */
+    socRxReasonInvalid,            /* Offset 21 */
+    socRxReasonInvalid,            /* Offset 22 */
+    socRxReasonInvalid,            /* Offset 23 */
+    socRxReasonInvalid,            /* Offset 24 */
+    socRxReasonInvalid,            /* Offset 25 */
+    socRxReasonInvalid,            /* Offset 26 */
+    socRxReasonInvalid,            /* Offset 27 */
+    socRxReasonInvalid,            /* Offset 28 */
+    socRxReasonInvalid,            /* Offset 29 */
+    socRxReasonInvalid,            /* Offset 30 */
+    socRxReasonInvalid,            /* Offset 31 */
+    socRxReasonInvalid,            /* Offset 32 */
+    socRxReasonInvalid,            /* Offset 33 */
+    socRxReasonInvalid,            /* Offset 34 */
+    socRxReasonInvalid,            /* Offset 35 */
+    socRxReasonInvalid,            /* Offset 36 */
+    socRxReasonInvalid,            /* Offset 37 */
+    socRxReasonInvalid,            /* Offset 38 */
+    socRxReasonInvalid,            /* Offset 39 */
+    socRxReasonInvalid,            /* Offset 40 */
+    socRxReasonInvalid,            /* Offset 41 */
+    socRxReasonInvalid,            /* Offset 42 */
+    socRxReasonInvalid,            /* Offset 43 */
+    socRxReasonInvalid,            /* Offset 44 */
+    socRxReasonInvalid,            /* Offset 45 */
+    socRxReasonInvalid,            /* Offset 46 */
+    socRxReasonInvalid,            /* Offset 47 */
+    socRxReasonInvalid,            /* Offset 48 */
+    socRxReasonInvalid,            /* Offset 49 */
+    socRxReasonInvalid,            /* Offset 50 */
+    socRxReasonInvalid,            /* Offset 51 */
+    socRxReasonInvalid,            /* Offset 52 */
+    socRxReasonInvalid,            /* Offset 53 */
+    socRxReasonInvalid,            /* Offset 54 */
+    socRxReasonInvalid,            /* Offset 55 */
+    socRxReasonInvalid,            /* Offset 56 */
+    socRxReasonInvalid,            /* Offset 57 */
+    socRxReasonInvalid,            /* Offset 58 */
+    socRxReasonInvalid,            /* Offset 59 */
+    socRxReasonInvalid,            /* Offset 60 */
+    socRxReasonInvalid,            /* Offset 61 */
+    socRxReasonInvalid,            /* Offset 62 */
+    socRxReasonInvalid             /* Offset 63 */
+};
+
+static soc_rx_reason_t
+dcb23_rx_reason_map_nlf[] = {
+    socRxReasonRegexAction,     /* Offset 0 */
+    socRxReasonWlanClientMove,     /* Offset 1 */
+    socRxReasonWlanSourcePortMiss, /* Offset 2 */
+    socRxReasonWlanClientError,    /* Offset 3 */
+    socRxReasonWlanClientSourceMiss, /* Offset 4 */
+    socRxReasonWlanClientDestMiss, /* Offset 5 */
+    socRxReasonWlanMtu,            /* Offset 6 */
+    socRxReasonInvalid,            /* Offset 7 */
+    socRxReasonInvalid,            /* Offset 8 */
+    socRxReasonInvalid,            /* Offset 9 */
+    socRxReasonInvalid,            /* Offset 10 */
+    socRxReasonInvalid,            /* Offset 11 */
+    socRxReasonInvalid,            /* Offset 12 */
+    socRxReasonInvalid,            /* Offset 13 */
+    socRxReasonInvalid,            /* Offset 14 */
+    socRxReasonInvalid,            /* Offset 15 */
+    socRxReasonInvalid,            /* Offset 16 */
+    socRxReasonInvalid,            /* Offset 17 */
+    socRxReasonInvalid,            /* Offset 18 */
+    socRxReasonInvalid,            /* Offset 19 */
+    socRxReasonInvalid,            /* Offset 20 */
+    socRxReasonInvalid,            /* Offset 21 */
+    socRxReasonInvalid,            /* Offset 22 */
+    socRxReasonInvalid,            /* Offset 23 */
+    socRxReasonInvalid,            /* Offset 24 */
+    socRxReasonInvalid,            /* Offset 25 */
+    socRxReasonInvalid,            /* Offset 26 */
+    socRxReasonInvalid,            /* Offset 27 */
+    socRxReasonInvalid,            /* Offset 28 */
+    socRxReasonInvalid,            /* Offset 29 */
+    socRxReasonInvalid,            /* Offset 30 */
+    socRxReasonInvalid,            /* Offset 31 */
+    socRxReasonInvalid,            /* Offset 32 */
+    socRxReasonInvalid,            /* Offset 33 */
+    socRxReasonInvalid,            /* Offset 34 */
+    socRxReasonInvalid,            /* Offset 35 */
+    socRxReasonInvalid,            /* Offset 36 */
+    socRxReasonInvalid,            /* Offset 37 */
+    socRxReasonInvalid,            /* Offset 38 */
+    socRxReasonInvalid,            /* Offset 39 */
+    socRxReasonInvalid,            /* Offset 40 */
+    socRxReasonInvalid,            /* Offset 41 */
+    socRxReasonInvalid,            /* Offset 42 */
+    socRxReasonInvalid,            /* Offset 43 */
+    socRxReasonInvalid,            /* Offset 44 */
+    socRxReasonInvalid,            /* Offset 45 */
+    socRxReasonInvalid,            /* Offset 46 */
+    socRxReasonInvalid,            /* Offset 47 */
+    socRxReasonInvalid,            /* Offset 48 */
+    socRxReasonInvalid,            /* Offset 49 */
+    socRxReasonInvalid,            /* Offset 50 */
+    socRxReasonInvalid,            /* Offset 51 */
+    socRxReasonInvalid,            /* Offset 52 */
+    socRxReasonInvalid,            /* Offset 53 */
+    socRxReasonInvalid,            /* Offset 54 */
+    socRxReasonInvalid,            /* Offset 55 */
+    socRxReasonInvalid,            /* Offset 56 */
+    socRxReasonInvalid,            /* Offset 57 */
+    socRxReasonInvalid,            /* Offset 58 */
+    socRxReasonInvalid,            /* Offset 59 */
+    socRxReasonInvalid,            /* Offset 60 */
+    socRxReasonInvalid,            /* Offset 61 */
+    socRxReasonInvalid,            /* Offset 62 */
+    socRxReasonInvalid             /* Offset 63 */
+};
+
+static soc_rx_reason_t *dcb23_rx_reason_maps[] = {
+    dcb23_rx_reason_map_ip_0,
+    dcb23_rx_reason_map_ip_1,
+    dcb23_rx_reason_map_ep,
+    dcb23_rx_reason_map_nlf,
+    NULL
+};
+
+
+/*
+ * Function:
+ *      dcb23_rx_reason_map_get
+ * Purpose:
+ *      Return the RX reason map for DCB 23 type.
+ * Parameters:
+ *      dcb_op - DCB operations
+ *      dcb    - dma control block
+ * Returns:
+ *      RX reason map pointer
+ */
+static soc_rx_reason_t *
+dcb23_rx_reason_map_get(dcb_op_t *dcb_op, dcb_t *dcb)
+{
+    soc_rx_reason_t *map = NULL;
+    dcb23_t  *d = (dcb23_t *)dcb;
+
+    switch (d->word4.overlay1.cpu_opcode_type) {
+    case SOC_CPU_OPCODE_TYPE_IP_0:
+        map = dcb23_rx_reason_map_ip_0;
+        break;
+    case SOC_CPU_OPCODE_TYPE_IP_1:
+        map = dcb23_rx_reason_map_ip_1;
+        break;
+    case SOC_CPU_OPCODE_TYPE_EP:
+        map = dcb23_rx_reason_map_ep;
+        break;
+    case SOC_CPU_OPCODE_TYPE_NLF:
+        map = dcb23_rx_reason_map_nlf;
+        break;
+    default:
+        /* Unknown reason type */
+        break;
+    }
+
+    return map;
+}
+
+static _shr_rx_decap_tunnel_t dcb23_rx_decap_tunnel_map[] = {
+    _SHR_RX_DECAP_NONE,
+    _SHR_RX_DECAP_ACCESS_SVP,
+    _SHR_RX_DECAP_MIM,
+    _SHR_RX_DECAP_WTP2AC,
+    _SHR_RX_DECAP_AC2AC,
+    _SHR_RX_DECAP_AMT,
+    _SHR_RX_DECAP_IP,
+    _SHR_RX_DECAP_TRILL,
+    _SHR_RX_DECAP_L2MPLS_1LABEL,
+    _SHR_RX_DECAP_L2MPLS_1LABELCW,
+    _SHR_RX_DECAP_L3MPLS_1LABEL,
+    _SHR_RX_DECAP_L3MPLS_1LABELCW,
+    _SHR_RX_DECAP_NONE,
+    _SHR_RX_DECAP_L2GRE
+}; 
+static uint32 dcb23_rx_decap_tunnel_get(dcb_t *dcb) {
+    dcb23_t *d = (dcb23_t *)dcb;
+    uint32 decap_tunnel_type = d->word11.overlay1.decap_tunnel_type;
+    /* Check for array bounds */
+    if ( (decap_tunnel_type <  
+    (sizeof (dcb23_rx_decap_tunnel_map) / sizeof (_shr_rx_decap_tunnel_t))) ) {
+        return (uint32)dcb23_rx_decap_tunnel_map[decap_tunnel_type];
+    }
+    return (uint32)_SHR_RX_DECAP_NONE;
+}
+
+static uint32
+dcb23_rx_untagged_get(dcb_t *dcb, int dt_mode, int ingport_is_hg)
+{
+    dcb23_t *d = (dcb23_t *)dcb;
+    uint32 hgh[4];
+    soc_higig2_hdr_t *h = (soc_higig2_hdr_t *)&hgh[0];
+    COMPILER_REFERENCE(dt_mode);
+    
+    hgh[0] = soc_htonl(d->mh0);
+    hgh[1] = soc_htonl(d->mh1);
+    hgh[2] = soc_htonl(d->mh2);
+    hgh[3] = soc_htonl(d->mh3);
+
+   return ((ingport_is_hg &&
+        ((h->ppd_overlay1.ppd_type == 0) ||
+        (h->ppd_overlay1.ppd_type == 1))) ?
+        ((d->itag_status) ? 0 : 2) :
+        ((d->itag_status & 0x2) ?
+        ((d->itag_status & 0x1) ? 0 : 2) :
+        ((d->itag_status & 0x1) ? 1 : 3)));
+
+
+}
+
+GETFUNCFIELD(23, xfercount, count)
+GETFUNCFIELD(23, rx_cos, word4.overlay1.queue_num)
+
+/* Fields extracted from MH/PBI */
+GETHG2FUNCFIELD(23, rx_destmod, dst_mod)
+GETHG2FUNCFIELD(23, rx_destport, dst_port)
+GETHG2FUNCFIELD(23, rx_srcmod, src_mod)
+GETHG2FUNCFIELD(23, rx_srcport, src_port)
+GETHG2FUNCFIELD(23, rx_opcode, opcode)
+GETHG2FUNCFIELD(23, rx_prio, vlan_pri) /* outer_pri */
+GETHG2FUNCEXPR(23, rx_mcast, ((h->ppd_overlay1.dst_mod << 8) |
+                              (h->ppd_overlay1.dst_port)))
+GETHG2FUNCEXPR(23, rx_vclabel, ((h->ppd_overlay1.vc_label_19_16 << 16) |
+                              (h->ppd_overlay1.vc_label_15_8 << 8) |
+                              (h->ppd_overlay1.vc_label_7_0)))
+GETHG2FUNCEXPR(23, rx_classtag, (h->ppd_overlay1.ppd_type != 1 ? 0 :
+                                 (h->ppd_overlay2.ctag_hi << 8) |
+                                 (h->ppd_overlay2.ctag_lo)))
+GETFUNCFIELD(23, rx_matchrule, match_rule)
+GETFUNCFIELD(23, rx_reason, reason)
+GETFUNCFIELD(23, rx_reason_hi, reason_hi)
+GETFUNCFIELD(23, rx_ingport, srcport)
+GETFUNCEXPR(23, rx_mirror, ((SOC_CPU_OPCODE_TYPE_IP_0 ==
+                            d->word4.overlay1.cpu_opcode_type) ?
+                            (d->reason & (1 << 17)) : 0))
+GETFUNCFIELD(23, rx_timestamp, word12.overlay1.timestamp)
+GETFUNCFIELD(23, rx_timestamp_upper, word14.overlay1.timestamp_hi)
+GETPTREXPR(23, mhp, &(d->mh0))
+GETFUNCFIELD(23, outer_vid, word4.overlay1.outer_vid)
+GETFUNCFIELD(23, outer_pri, word11.overlay1.outer_pri)
+GETFUNCFIELD(23, outer_cfi, word11.overlay1.outer_cfi)
+GETFUNCFIELD(23, rx_outer_tag_action, otag_action)
+GETFUNCFIELD(23, inner_vid, word11.overlay1.inner_vid)
+GETFUNCFIELD(23, inner_pri, inner_pri)
+GETFUNCFIELD(23, inner_cfi, word11.overlay1.inner_cfi)
+GETFUNCFIELD(23, rx_inner_tag_action, itag_action)
+GETFUNCFIELD(23, rx_bpdu, bpdu)
+GETFUNCEXPR(23, rx_l3_intf, ((d->replicated) ? (d->repl_nhi) :
+                (((d->repl_nhi) & 0x40000) ?  /* TR3 NHI */
+                 (((d->repl_nhi) & 0x3ffff) + _SHR_L3_EGRESS_IDX_MIN) :
+                 ((d->repl_nhi) & 0x4000) ?   /* HX4 NHI */
+                 (((d->repl_nhi) & 0x3fff) + _SHR_L3_EGRESS_IDX_MIN) :
+                 (d->repl_nhi))))
+GETFUNCFIELD(23, rx_switch_drop, all_switch_drop)
+GETFUNCNULL(23, olp_encap_oam_pkt)
+GETFUNCNULL(23, read_ecc_error)
+GETFUNCNULL(23, desc_remaining)
+SETFUNCNULL(23, desc_remaining)
+GETFUNCNULL(23, desc_status)
+SETFUNCNULL(23, desc_status)
+
+dcb_op_t dcb23_op = {
+    23,
+    sizeof(dcb23_t),
+    dcb23_rx_reason_maps,
+    dcb23_rx_reason_map_get,
+    dcb0_rx_reasons_get,
+    dcb19_init,
+    dcb19_addtx,
+    dcb19_addrx,
+    dcb19_intrinfo,
+    dcb19_reqcount_set,
+    dcb19_reqcount_get,
+    dcb23_xfercount_get,
+    dcb0_addr_set,
+    dcb0_addr_get,
+    dcb0_paddr_get,
+    dcb19_done_set,
+    dcb19_done_get,
+    dcb19_sg_set,
+    dcb19_sg_get,
+    dcb19_chain_set,
+    dcb19_chain_get,
+    dcb19_reload_set,
+    dcb19_reload_get,
+    dcb19_desc_intr_set,
+    dcb19_desc_intr_get,
+    dcb19_tx_l2pbm_set,
+    dcb19_tx_utpbm_set,
+    dcb19_tx_l3pbm_set,
+    dcb19_tx_crc_set,
+    dcb19_tx_cos_set,
+    dcb19_tx_destmod_set,
+    dcb19_tx_destport_set,
+    dcb19_tx_opcode_set,
+    dcb19_tx_srcmod_set,
+    dcb19_tx_srcport_set,
+    dcb19_tx_prio_set,
+    dcb19_tx_pfm_set,
+    dcb23_rx_untagged_get,
+    dcb19_rx_crc_get,
+    dcb23_rx_cos_get,
+    dcb23_rx_destmod_get,
+    dcb23_rx_destport_get,
+    dcb23_rx_opcode_get,
+    dcb23_rx_classtag_get,
+    dcb23_rx_matchrule_get,
+    dcb19_rx_start_get,
+    dcb19_rx_end_get,
+    dcb19_rx_error_get,
+    dcb23_rx_prio_get,
+    dcb23_rx_reason_get,
+    dcb23_rx_reason_hi_get,
+    dcb23_rx_ingport_get,
+    dcb23_rx_srcport_get,
+    dcb23_rx_srcmod_get,
+    dcb23_rx_mcast_get,
+    dcb23_rx_vclabel_get,
+    dcb23_rx_mirror_get,
+    dcb23_rx_timestamp_get,
+    dcb23_rx_timestamp_upper_get,
+    dcb19_hg_set,
+    dcb19_hg_get,
+    dcb19_stat_set,
+    dcb19_stat_get,
+    dcb19_purge_set,
+    dcb19_purge_get,
+    dcb23_mhp_get,
+    dcb23_outer_vid_get,
+    dcb23_outer_pri_get,
+    dcb23_outer_cfi_get,
+    dcb23_rx_outer_tag_action_get,
+    dcb23_inner_vid_get,
+    dcb23_inner_pri_get,
+    dcb23_inner_cfi_get,
+    dcb23_rx_inner_tag_action_get,
+    dcb23_rx_bpdu_get,
+    dcb23_rx_l3_intf_get,
+    dcb23_rx_decap_tunnel_get,
+    dcb23_rx_switch_drop_get,
+    dcb23_olp_encap_oam_pkt_get,
+    dcb23_read_ecc_error_get,
+    dcb23_desc_remaining_get,
+    dcb23_desc_remaining_set,
+    dcb23_desc_status_get,
+    dcb23_desc_status_set,
+    NULL,
+};
+#endif /* BCM_TRIUMPH3_SUPPORT */
+
+#if defined(BCM_TRIDENT2_SUPPORT)
+/*
+ * DCB Type 26 Support
+ */
+/* From FORMAT CPU_OPCODES */
+static soc_rx_reason_t
+dcb26_rx_reason_map[] = {
+    socRxReasonUnknownVlan,        /*  0: CPU_UVLAN */
+    socRxReasonL2SourceMiss,       /*  1: CPU_SLF */
+    socRxReasonL2DestMiss,         /*  2: CPU_DLF */
+    socRxReasonL2Move,             /*  3: CPU_L2MOVE */
+    socRxReasonL2Cpu,              /*  4: CPU_L2CPU */
+    socRxReasonSampleSource,       /*  5: CPU_SFLOW_SRC */
+    socRxReasonSampleDest,         /*  6: CPU_SFLOW_DST */
+    socRxReasonL3SourceMiss,       /*  7: CPU_L3SRC_MISS */
+    socRxReasonL3DestMiss,         /*  8: CPU_L3DST_MISS */
+    socRxReasonL3SourceMove,       /*  9: CPU_L3SRC_MOVE */
+    socRxReasonMcastMiss,          /* 10: CPU_MC_MISS */
+    socRxReasonIpMcastMiss,        /* 11: CPU_IPMC_MISS */
+    socRxReasonFilterMatch,        /* 12: CPU_FFP */
+    socRxReasonL3HeaderError,      /* 13: CPU_L3HDR_ERR */
+    socRxReasonProtocol,           /* 14: CPU_PROTOCOL_PKT */
+    socRxReasonDosAttack,          /* 15: CPU_DOS_ATTACK */
+    socRxReasonMartianAddr,        /* 16: CPU_MARTIAN_ADDR */
+    socRxReasonTunnelError,        /* 17: CPU_TUNNEL_ERR */
+    socRxReasonInvalid,            /* 18: RESERVED_0 */ 
+    socRxReasonIcmpRedirect,       /* 19: ICMP_REDIRECT */
+    socRxReasonL3Slowpath,         /* 20: L3_SLOWPATH */
+    socRxReasonParityError,        /* 21: PARITY_ERROR */
+    socRxReasonL3MtuFail,          /* 22: L3_MTU_CHECK_FAIL */
+    socRxReasonHigigHdrError,      /* 23: HGHDR_ERROR */
+    socRxReasonMcastIdxError,      /* 24: MCIDX_ERROR */
+    socRxReasonVlanFilterMatch,    /* 25: VFP */
+    socRxReasonClassBasedMove,     /* 26: CBSM_PREVENTED */
+    socRxReasonL3AddrBindFail,     /* 27: MAC_BIND_FAIL */
+    socRxReasonMplsLabelMiss,      /* 28: MPLS_LABEL_MISS */
+    socRxReasonMplsInvalidAction,  /* 29: MPLS_INVALID_ACTION */
+    socRxReasonMplsInvalidPayload, /* 30: MPLS_INVALID_PAYLOAD */
+    socRxReasonMplsTtl,            /* 31: MPLS_TTL_CHECK_FAIL */
+    socRxReasonMplsSequenceNumber, /* 32: MPLS_SEQ_NUM_FAIL */
+    socRxReasonL2NonUnicastMiss,   /* 33: PBT_NONUC_PKT */
+    socRxReasonNhop,               /* 34: L3_NEXT_HOP */
+    socRxReasonMplsUnknownAch,     /* 35: MPLS_UNKNOWN_ACH_ERROR */
+    socRxReasonStation,            /* 36: MY_STATION */
+    socRxReasonNiv,                /* 37: NIV_DROP_REASON_ENCODING */
+    socRxReasonNiv,                /* 38: ->  */
+    socRxReasonNiv,                /* 39: 3-bit */
+    socRxReasonVlanTranslate,      /* 40: VXLT_MISS */
+    socRxReasonTimeSync,           /* 41: TIME_SYNC */
+    socRxReasonOAMSlowpath,        /* 42: OAM_SLOWPATH */
+    socRxReasonOAMError,           /* 43: OAM_ERROR */
+    socRxReasonTrill,              /* 44: TRILL_DROP_REASON_ENCODING */
+    socRxReasonTrill,              /* 45: -> */
+    socRxReasonTrill,              /* 46: 3-bit */
+    socRxReasonL2GreSipMiss,       /* 47: L2GRE_SIP_MISS */
+    socRxReasonL2GreVpnIdMiss,     /* 48: L2GRE_VPNID_MISS */
+    socRxReasonBfdSlowpath,        /* 49: BFD_SLOWPATH */
+    socRxReasonBfd,                /* 50: BFD_ERROR */
+    socRxReasonOAMLMDM,            /* 51: OAM_LMDM */
+    socRxReasonCongestionCnm,      /* 52: ICNM */
+    socRxReasonMplsIllegalReservedLabel, /* 53: MPLS_ILLEGAL_RESERVED_LABEL */
+    socRxReasonMplsRouterAlertLabel, /* 54: MPLS_ALERT_LABEL */
+    socRxReasonCongestionCnmProxy, /* 55: QCN_CNM_PRP */
+    socRxReasonCongestionCnmProxyError, /* 56: QCN_CNM_PRP_DLF */
+    socRxReasonVxlanSipMiss,       /* 57: VXLAN_SIP_MISS */
+    socRxReasonVxlanVpnIdMiss,     /* 58: VXLAN_VN_ID_MISS */
+    socRxReasonFcoeZoneCheckFail,  /* 59: FCOE_ZONE_CHECK_FAIL */
+    socRxReasonNat,                /* 60: NAT_DROP_REASON_ENCODING */
+    socRxReasonNat,                /* 61: -> */
+    socRxReasonNat,                /* 62: 3-bit */
+    socRxReasonIpmcInterfaceMismatch /* 63: CPU_IPMC_INTERFACE_MISMATCH */
+};
+/* From FORMAT TRILL_CPU_OPCODE_ENCODING */
+static soc_rx_reason_t dcb26_rx_reason_trill_encoding_map[] = {
+    socRxReasonTrill,              /* 0:NO_ERRORS
+                                    * Base field, must match the entries above */
+    socRxReasonTrillInvalid,       /* 1:TRILL_HDR_ERROR */
+    socRxReasonTrillMiss,          /* 2:TRILL_LOOKUP_MISS */
+    socRxReasonTrillRpfFail,       /* 3:TRILL_RPF_CHECK_FAIL */
+    socRxReasonTrillSlowpath,      /* 4:TRILL_SLOWPATH */
+    socRxReasonTrillCoreIsIs,      /* 5:TRILL_CORE_IS_IS_PKT */
+    socRxReasonTrillTtl,           /* 6:TRILL_HOP_COUNT_CHECK_FAIL */
+    socRxReasonTrillName,          /* 7:NICKNAME_TABLE_COPYTOCPU */
+    socRxReasonInvalid,            /* Offset 8 */
+    socRxReasonInvalid,            /* Offset 9 */
+    socRxReasonInvalid,            /* Offset 10 */
+    socRxReasonInvalid,            /* Offset 11 */
+    socRxReasonInvalid,            /* Offset 12 */
+    socRxReasonInvalid,            /* Offset 13 */
+    socRxReasonInvalid,            /* Offset 14 */
+    socRxReasonInvalid,            /* Offset 15 */
+    socRxReasonInvalid,            /* Offset 16 */
+    socRxReasonInvalid,            /* Offset 17 */
+    socRxReasonInvalid,            /* Offset 18 */
+    socRxReasonInvalid,            /* Offset 19 */
+    socRxReasonInvalid,            /* Offset 20 */
+    socRxReasonInvalid,            /* Offset 21 */
+    socRxReasonInvalid,            /* Offset 22 */
+    socRxReasonInvalid,            /* Offset 23 */
+    socRxReasonInvalid,            /* Offset 24 */
+    socRxReasonInvalid,            /* Offset 25 */
+    socRxReasonInvalid,            /* Offset 26 */
+    socRxReasonInvalid,            /* Offset 27 */
+    socRxReasonInvalid,            /* Offset 28 */
+    socRxReasonInvalid,            /* Offset 29 */
+    socRxReasonInvalid,            /* Offset 30 */
+    socRxReasonInvalid,            /* Offset 31 */
+    socRxReasonInvalid,            /* Offset 32 */
+    socRxReasonInvalid,            /* Offset 33 */
+    socRxReasonInvalid,            /* Offset 34 */
+    socRxReasonInvalid,            /* Offset 35 */
+    socRxReasonInvalid,            /* Offset 36 */
+    socRxReasonInvalid,            /* Offset 37 */
+    socRxReasonInvalid,            /* Offset 38 */
+    socRxReasonInvalid,            /* Offset 39 */
+    socRxReasonInvalid,            /* Offset 40 */
+    socRxReasonInvalid,            /* Offset 41 */
+    socRxReasonInvalid,            /* Offset 42 */
+    socRxReasonInvalid,            /* Offset 43 */
+    socRxReasonInvalid,            /* Offset 44 */
+    socRxReasonInvalid,            /* Offset 45 */
+    socRxReasonInvalid,            /* Offset 46 */
+    socRxReasonInvalid,            /* Offset 47 */
+    socRxReasonInvalid,            /* Offset 48 */
+    socRxReasonInvalid,            /* Offset 49 */
+    socRxReasonInvalid,            /* Offset 50 */
+    socRxReasonInvalid,            /* Offset 51 */
+    socRxReasonInvalid,            /* Offset 52 */
+    socRxReasonInvalid,            /* Offset 53 */
+    socRxReasonInvalid,            /* Offset 54 */
+    socRxReasonInvalid,            /* Offset 55 */
+    socRxReasonInvalid,            /* Offset 56 */
+    socRxReasonInvalid,            /* Offset 57 */
+    socRxReasonInvalid,            /* Offset 58 */
+    socRxReasonInvalid,            /* Offset 59 */
+    socRxReasonInvalid,            /* Offset 60 */
+    socRxReasonInvalid,            /* Offset 61 */
+    socRxReasonInvalid,            /* Offset 62 */
+    socRxReasonInvalid             /* Offset 63 */
+};
+/* From FORMAT NAT_CPU_OPCODE_ENCODING */
+static soc_rx_reason_t dcb26_rx_reason_nat_encoding_map[] = {
+    socRxReasonNat,                /* 0:NOP
+                                    * Base field, must match the entries above */
+    socRxReasonTcpUdpNatMiss,      /* 1:NORMAL */
+    socRxReasonIcmpNatMiss,        /* 2:ICMP */
+    socRxReasonNatFragment,        /* 3:FRAGMEMT */
+    socRxReasonNatMiss,            /* 4:OTHER */
+    socRxReasonInvalid,            /* Offset 5 */
+    socRxReasonInvalid,            /* Offset 6 */
+    socRxReasonInvalid,            /* Offset 7 */
+    socRxReasonInvalid,            /* Offset 8 */
+    socRxReasonInvalid,            /* Offset 9 */
+    socRxReasonInvalid,            /* Offset 10 */
+    socRxReasonInvalid,            /* Offset 11 */
+    socRxReasonInvalid,            /* Offset 12 */
+    socRxReasonInvalid,            /* Offset 13 */
+    socRxReasonInvalid,            /* Offset 14 */
+    socRxReasonInvalid,            /* Offset 15 */
+    socRxReasonInvalid,            /* Offset 16 */
+    socRxReasonInvalid,            /* Offset 17 */
+    socRxReasonInvalid,            /* Offset 18 */
+    socRxReasonInvalid,            /* Offset 19 */
+    socRxReasonInvalid,            /* Offset 20 */
+    socRxReasonInvalid,            /* Offset 21 */
+    socRxReasonInvalid,            /* Offset 22 */
+    socRxReasonInvalid,            /* Offset 23 */
+    socRxReasonInvalid,            /* Offset 24 */
+    socRxReasonInvalid,            /* Offset 25 */
+    socRxReasonInvalid,            /* Offset 26 */
+    socRxReasonInvalid,            /* Offset 27 */
+    socRxReasonInvalid,            /* Offset 28 */
+    socRxReasonInvalid,            /* Offset 29 */
+    socRxReasonInvalid,            /* Offset 30 */
+    socRxReasonInvalid,            /* Offset 31 */
+    socRxReasonInvalid,            /* Offset 32 */
+    socRxReasonInvalid,            /* Offset 33 */
+    socRxReasonInvalid,            /* Offset 34 */
+    socRxReasonInvalid,            /* Offset 35 */
+    socRxReasonInvalid,            /* Offset 36 */
+    socRxReasonInvalid,            /* Offset 37 */
+    socRxReasonInvalid,            /* Offset 38 */
+    socRxReasonInvalid,            /* Offset 39 */
+    socRxReasonInvalid,            /* Offset 40 */
+    socRxReasonInvalid,            /* Offset 41 */
+    socRxReasonInvalid,            /* Offset 42 */
+    socRxReasonInvalid,            /* Offset 43 */
+    socRxReasonInvalid,            /* Offset 44 */
+    socRxReasonInvalid,            /* Offset 45 */
+    socRxReasonInvalid,            /* Offset 46 */
+    socRxReasonInvalid,            /* Offset 47 */
+    socRxReasonInvalid,            /* Offset 48 */
+    socRxReasonInvalid,            /* Offset 49 */
+    socRxReasonInvalid,            /* Offset 50 */
+    socRxReasonInvalid,            /* Offset 51 */
+    socRxReasonInvalid,            /* Offset 52 */
+    socRxReasonInvalid,            /* Offset 53 */
+    socRxReasonInvalid,            /* Offset 54 */
+    socRxReasonInvalid,            /* Offset 55 */
+    socRxReasonInvalid,            /* Offset 56 */
+    socRxReasonInvalid,            /* Offset 57 */
+    socRxReasonInvalid,            /* Offset 58 */
+    socRxReasonInvalid,            /* Offset 59 */
+    socRxReasonInvalid,            /* Offset 60 */
+    socRxReasonInvalid,            /* Offset 61 */
+    socRxReasonInvalid,            /* Offset 62 */
+    socRxReasonInvalid             /* Offset 63 */
+};
+static soc_rx_reason_t *dcb26_rx_reason_maps[] = {
+    dcb26_rx_reason_map,
+    dcb21_rx_reason_niv_encoding_map,
+    dcb26_rx_reason_trill_encoding_map,
+    dcb26_rx_reason_nat_encoding_map,
+    NULL
+};
+
+static _shr_rx_decap_tunnel_t dcb26_rx_decap_tunnel_map[] = {
+    _SHR_RX_DECAP_NONE,
+    _SHR_RX_DECAP_ACCESS_SVP,
+    _SHR_RX_DECAP_MIM,
+    _SHR_RX_DECAP_L2GRE,
+    _SHR_RX_DECAP_VXLAN,
+    _SHR_RX_DECAP_AMT,
+    _SHR_RX_DECAP_IP,
+    _SHR_RX_DECAP_TRILL,
+    _SHR_RX_DECAP_L2MPLS_1LABEL,
+    _SHR_RX_DECAP_L2MPLS_2LABEL,
+    _SHR_RX_DECAP_L2MPLS_1LABELCW,
+    _SHR_RX_DECAP_L2MPLS_2LABELCW,
+    _SHR_RX_DECAP_L3MPLS_1LABEL,
+    _SHR_RX_DECAP_L3MPLS_2LABEL,
+    _SHR_RX_DECAP_L3MPLS_1LABELCW,
+    _SHR_RX_DECAP_L3MPLS_2LABELCW
+}; 
+static uint32 dcb26_rx_decap_tunnel_get(dcb_t *dcb) {
+    dcb26_t *d = (dcb26_t *)dcb;
+    /* Check for array bounds */
+    if ( (d->word11.overlay1.decap_tunnel_type <  
+    (sizeof (dcb26_rx_decap_tunnel_map) / sizeof (_shr_rx_decap_tunnel_t))) ) {
+        return (uint32)dcb26_rx_decap_tunnel_map[d->word11.overlay1.decap_tunnel_type];
+    }
+    return (uint32)_SHR_RX_DECAP_NONE;
+}
+static uint32
+dcb26_rx_untagged_get(dcb_t *dcb, int dt_mode, int ingport_is_hg)
+{
+    dcb26_t *d = (dcb26_t *)dcb;
+
+    COMPILER_REFERENCE(dt_mode);
+
+    return (ingport_is_hg ?
+            ((d->tag_status) ? 0 : 2) :
+            ((d->tag_status & 0x2) ?
+             ((d->tag_status & 0x1) ? 0 : 2) :
+             ((d->tag_status & 0x1) ? 1 : 3)));
+}
+
+static uint32 
+dcb26_rx_reason_get(dcb_t *dcb)
+{
+    dcb26_t *d = (dcb26_t *)dcb;
+
+    return (d->switch_pkt) ? (d->reason) : 0;
+}
+
+static uint32 
+dcb26_rx_reason_hi_get(dcb_t *dcb)
+{
+    dcb26_t *d = (dcb26_t *)dcb;
+
+    return (d->switch_pkt) ? (d->reason_hi) : 0;
+}
+
+GETFUNCFIELD(26, xfercount, count)
+GETFUNCFIELD(26, rx_cos, word4.overlay2.cpu_cos)
+
+/* Fields extracted from MH/PBI */
+GETHG2FUNCFIELD(26, rx_destmod, dst_mod)
+GETHG2FUNCFIELD(26, rx_destport, dst_port)
+GETHG2FUNCFIELD(26, rx_srcmod, src_mod)
+GETHG2FUNCFIELD(26, rx_srcport, src_port)
+GETHG2FUNCFIELD(26, rx_opcode, opcode)
+GETHG2FUNCFIELD(26, rx_prio, vlan_pri) /* outer_pri */
+GETHG2FUNCEXPR(26, rx_mcast, ((h->ppd_overlay1.dst_mod << 8) |
+                              (h->ppd_overlay1.dst_port)))
+GETHG2FUNCEXPR(26, rx_vclabel, ((h->ppd_overlay1.vc_label_19_16 << 16) |
+                              (h->ppd_overlay1.vc_label_15_8 << 8) |
+                              (h->ppd_overlay1.vc_label_7_0)))
+GETHG2FUNCEXPR(26, rx_classtag, (h->ppd_overlay1.ppd_type != 1 ? 0 :
+                                 (h->ppd_overlay2.ctag_hi << 8) |
+                                 (h->ppd_overlay2.ctag_lo)))
+GETFUNCFIELD(26, rx_matchrule, match_rule)
+GETFUNCFIELD(26, rx_ingport, srcport)
+GETFUNCFIELD(26, rx_timestamp, timestamp)
+GETFUNCFIELD(26, rx_timestamp_upper, word14.timestamp_hi)
+GETPTREXPR(26, mhp, &(d->mh0))
+GETFUNCFIELD(26, outer_vid, word4.overlay1.outer_vid)
+GETFUNCFIELD(26, outer_pri, word11.overlay1.outer_pri)
+GETFUNCFIELD(26, outer_cfi, word11.overlay1.outer_cfi)
+GETFUNCFIELD(26, inner_vid, word11.overlay1.inner_vid)
+GETFUNCFIELD(26, inner_pri, inner_pri)
+GETFUNCFIELD(26, inner_cfi, word11.overlay1.inner_cfi)
+GETFUNCFIELD(26, rx_bpdu, bpdu)
+GETFUNCEXPR(26, rx_l3_intf,
+            (((d->repl_nhi) & 0xffff) + _SHR_L3_EGRESS_IDX_MIN))
+
+dcb_op_t dcb26_op = {
+    26,
+    sizeof(dcb26_t),
+    dcb26_rx_reason_maps,
+    dcb0_rx_reason_map_get,
+    dcb21_rx_reasons_get,
+    dcb19_init,
+    dcb19_addtx,
+    dcb19_addrx,
+    dcb19_intrinfo,
+    dcb19_reqcount_set,
+    dcb19_reqcount_get,
+    dcb26_xfercount_get,
+    dcb0_addr_set,
+    dcb0_addr_get,
+    dcb0_paddr_get,
+    dcb19_done_set,
+    dcb19_done_get,
+    dcb19_sg_set,
+    dcb19_sg_get,
+    dcb19_chain_set,
+    dcb19_chain_get,
+    dcb19_reload_set,
+    dcb19_reload_get,
+    dcb19_desc_intr_set,
+    dcb19_desc_intr_get,
+    dcb19_tx_l2pbm_set,
+    dcb19_tx_utpbm_set,
+    dcb19_tx_l3pbm_set,
+    dcb19_tx_crc_set,
+    dcb19_tx_cos_set,
+    dcb19_tx_destmod_set,
+    dcb19_tx_destport_set,
+    dcb19_tx_opcode_set,
+    dcb19_tx_srcmod_set,
+    dcb19_tx_srcport_set,
+    dcb19_tx_prio_set,
+    dcb19_tx_pfm_set,
+    dcb26_rx_untagged_get,
+    dcb19_rx_crc_get,
+    dcb26_rx_cos_get,
+    dcb26_rx_destmod_get,
+    dcb26_rx_destport_get,
+    dcb26_rx_opcode_get,
+    dcb26_rx_classtag_get,
+    dcb26_rx_matchrule_get,
+    dcb19_rx_start_get,
+    dcb19_rx_end_get,
+    dcb19_rx_error_get,
+    dcb26_rx_prio_get,
+    dcb26_rx_reason_get,
+    dcb26_rx_reason_hi_get,
+    dcb26_rx_ingport_get,
+    dcb26_rx_srcport_get,
+    dcb26_rx_srcmod_get,
+    dcb26_rx_mcast_get,
+    dcb26_rx_vclabel_get,
+    dcb23_rx_mirror_get,
+    dcb26_rx_timestamp_get,
+    dcb26_rx_timestamp_upper_get,
+    dcb19_hg_set,
+    dcb19_hg_get,
+    dcb19_stat_set,
+    dcb19_stat_get,
+    dcb19_purge_set,
+    dcb19_purge_get,
+    dcb26_mhp_get,
+    dcb26_outer_vid_get,
+    dcb26_outer_pri_get,
+    dcb26_outer_cfi_get,
+    dcb23_rx_outer_tag_action_get,
+    dcb26_inner_vid_get,
+    dcb26_inner_pri_get,
+    dcb26_inner_cfi_get,
+    dcb23_rx_inner_tag_action_get,
+    dcb26_rx_bpdu_get,
+    dcb26_rx_l3_intf_get,
+    dcb26_rx_decap_tunnel_get,
+    dcb23_rx_switch_drop_get,
+    dcb23_olp_encap_oam_pkt_get,
+    dcb23_read_ecc_error_get,
+    dcb23_desc_remaining_get,
+    dcb23_desc_remaining_set,
+    dcb23_desc_status_get,
+    dcb23_desc_status_set,
+    NULL,
+};
+#endif /* BCM_TRIDENT2_SUPPORT */
+
+#if defined(BCM_KATANA2_SUPPORT)
+/*
+ * DCB Type 29 Support
+ */
+static soc_rx_reason_t
+dcb29_rx_reason_map_ip_0[] = { /* IP Overlay 0 */
+    socRxReasonUnknownVlan,        /* Offset 0 */
+    socRxReasonL2SourceMiss,       /* Offset 1 */
+    socRxReasonL2DestMiss,         /* Offset 2 */
+    socRxReasonL2Move,             /* Offset 3 */
+    socRxReasonL2Cpu,              /* Offset 4 */
+    socRxReasonSampleSource,       /* Offset 5 */
+    socRxReasonSampleDest,         /* Offset 6 */
+    socRxReasonL3SourceMiss,       /* Offset 7 */
+    socRxReasonL3DestMiss,         /* Offset 8 */
+    socRxReasonL3SourceMove,       /* Offset 9 */
+    socRxReasonMcastMiss,          /* Offset 10 */
+    socRxReasonIpMcastMiss,        /* Offset 11 */
+    socRxReasonFilterMatch,        /* Offset 12 */
+    socRxReasonL3HeaderError,      /* Offset 13 */
+    socRxReasonProtocol,           /* Offset 14 */
+    socRxReasonDosAttack,          /* Offset 15 */
+    socRxReasonMartianAddr,        /* Offset 16 */
+    socRxReasonTunnelError,        /* Offset 17 */
+    socRxReasonMirror,             /* Offset 18 */ 
+    socRxReasonIcmpRedirect,       /* Offset 19 */
+    socRxReasonL3Slowpath,         /* Offset 20 */
+    socRxReasonParityError,        /* Offset 21 */
+    socRxReasonL3MtuFail,          /* Offset 22 */
+    socRxReasonHigigHdrError,      /* Offset 23 */
+    socRxReasonMcastIdxError,      /* Offset 24 */
+    socRxReasonVlanFilterMatch,    /* Offset 25 */
+    socRxReasonClassBasedMove,     /* Offset 26 */
+    socRxReasonL3AddrBindFail,     /* Offset 27 */
+    socRxReasonMplsLabelMiss,      /* Offset 28 */
+    socRxReasonMplsInvalidAction,  /* Offset 29 */
+    socRxReasonMplsInvalidPayload, /* Offset 30 */
+    socRxReasonMplsTtl,            /* Offset 31 */
+    socRxReasonMplsSequenceNumber, /* Offset 32 */
+    socRxReasonL2NonUnicastMiss,   /* Offset 33 */
+    socRxReasonNhop,               /* Offset 34 */
+    socRxReasonBfdSlowpath,        /* Offset 35 */
+    socRxReasonStation,            /* Offset 36 */
+    socRxReasonVlanTranslate,      /* Offset 37 */
+    socRxReasonTimeSync,           /* Offset 38 */
+    socRxReasonL2LearnLimit,       /* Offset 39 */
+    socRxReasonBfd,                /* Offset 40 */
+    socRxReasonFailoverDrop,       /* Offset 41 */
+    socRxReasonUnknownSubtendingPort,      /* Offset 42 */
+    socRxReasonMplsReservedEntropyLabel,   /* Offset 43 */
+    socRxReasonLLTagAbsentDrop,            /* Offset 44 */
+    socRxReasonLLTagPresentDrop,           /* Offset 45 */
+    socRxReasonMplsLookupsExceeded,        /* Offset 46 */
+    socRxReasonMplsIllegalReservedLabel,   /* Offset 47 */
+    socRxReasonMplsRouterAlertLabel,       /* Offset 48 */
+    socRxReasonMplsUnknownAch,             /* Offset 49 */
+    socRxReasonInvalid,                    /* Offset 50 */
+    socRxReasonInvalid,            /* Offset 51 */
+    socRxReasonInvalid,            /* Offset 52 */
+    socRxReasonInvalid,            /* Offset 53 */
+    socRxReasonInvalid,            /* Offset 54 */
+    socRxReasonInvalid,            /* Offset 55 */
+    socRxReasonInvalid,            /* Offset 56 */
+    socRxReasonInvalid,            /* Offset 57 */
+    socRxReasonInvalid,            /* Offset 58 */
+    socRxReasonInvalid,            /* Offset 59 */
+    socRxReasonInvalid,            /* Offset 60 */
+    socRxReasonInvalid,            /* Offset 61 */
+    socRxReasonInvalid,            /* Offset 62 */
+    socRxReasonInvalid             /* Offset 63 */
+};
+
+static soc_rx_reason_t
+dcb29_rx_reason_map_ip_1[] = { /* IP Overlay 1 */
+    socRxReasonUnknownVlan,        /* Offset 0 */
+    socRxReasonL2SourceMiss,       /* Offset 1 */
+    socRxReasonL2DestMiss,         /* Offset 2 */
+    socRxReasonL2Move,             /* Offset 3 */
+    socRxReasonL2Cpu,              /* Offset 4 */
+    socRxReasonSampleSource,       /* Offset 5 */
+    socRxReasonSampleDest,         /* Offset 6 */
+    socRxReasonL3SourceMiss,       /* Offset 7 */
+    socRxReasonL3DestMiss,         /* Offset 8 */
+    socRxReasonL3SourceMove,       /* Offset 9 */
+    socRxReasonMcastMiss,          /* Offset 10 */
+    socRxReasonIpMcastMiss,        /* Offset 11 */
+    socRxReasonFilterMatch,        /* Offset 12 */
+    socRxReasonL3HeaderError,      /* Offset 13 */
+    socRxReasonProtocol,           /* Offset 14 */
+    socRxReasonDosAttack,          /* Offset 15 */
+    socRxReasonMartianAddr,        /* Offset 16 */
+    socRxReasonTunnelError,        /* Offset 17 */
+    socRxReasonMirror,             /* Offset 18 */ 
+    socRxReasonIcmpRedirect,       /* Offset 19 */
+    socRxReasonL3Slowpath,         /* Offset 20 */
+    socRxReasonParityError,        /* Offset 21 */
+    socRxReasonL3MtuFail,          /* Offset 22 */
+    socRxReasonHigigHdrError,      /* Offset 23 */
+    socRxReasonMcastIdxError,      /* Offset 24 */
+    socRxReasonVlanFilterMatch,    /* Offset 25 */
+    socRxReasonClassBasedMove,     /* Offset 26 */
+    socRxReasonL3AddrBindFail,     /* Offset 27 */
+    socRxReasonMplsLabelMiss,      /* Offset 28 */
+    socRxReasonMplsInvalidAction,  /* Offset 29 */
+    socRxReasonMplsInvalidPayload, /* Offset 30 */
+    socRxReasonMplsTtl,            /* Offset 31 */
+    socRxReasonMplsSequenceNumber, /* Offset 32 */
+    socRxReasonL2NonUnicastMiss,   /* Offset 33 */
+    socRxReasonNhop,               /* Offset 34 */
+    socRxReasonBfdSlowpath,        /* Offset 35 */
+    socRxReasonStation,            /* Offset 36 */
+    socRxReasonVlanTranslate,      /* Offset 37 */
+    socRxReasonTimeSync,           /* Offset 38 */
+    socRxReasonL2LearnLimit,       /* Offset 39 */
+    socRxReasonBfd,                /* Offset 40 */
+    socRxReasonFailoverDrop,       /* Offset 41 */
+    socRxReasonOAMSlowpath,        /* Offset 42 */
+    socRxReasonOAMError,           /* Offset 43 */
+    socRxReasonOAMLMDM,            /* Offset 44 */
+    socRxReasonOAMCCMSlowPath,     /* Offset 45 */
+    socRxReasonOAMIncompleteOpcode,/* Offset 46 */
+    socRxReasonInvalid,            /* Offset 47 */
+    socRxReasonSat,                /* Offset 48 */
+    socRxReasonOAMMplsLmDm,        /* Offset 49 */
+    socRxReasonInvalid,            /* Offset 50 */
+    socRxReasonInvalid,            /* Offset 51 */
+    socRxReasonInvalid,            /* Offset 52 */
+    socRxReasonInvalid,            /* Offset 53 */
+    socRxReasonInvalid,            /* Offset 54 */
+    socRxReasonInvalid,            /* Offset 55 */
+    socRxReasonInvalid,            /* Offset 56 */
+    socRxReasonInvalid,            /* Offset 57 */
+    socRxReasonInvalid,            /* Offset 58 */
+    socRxReasonInvalid,            /* Offset 59 */
+    socRxReasonInvalid,            /* Offset 60 */
+    socRxReasonInvalid,            /* Offset 61 */
+    socRxReasonInvalid,            /* Offset 62 */
+    socRxReasonInvalid             /* Offset 63 */
+};
+static soc_rx_reason_t
+dcb29_rx_reason_map_ip_3[] = { /* IP Overlay 3 */
+    socRxReasonUnknownVlan,        /* Offset 0 */
+    socRxReasonL2SourceMiss,       /* Offset 1 */
+    socRxReasonL2DestMiss,         /* Offset 2 */
+    socRxReasonL2Move,             /* Offset 3 */
+    socRxReasonL2Cpu,              /* Offset 4 */
+    socRxReasonSampleSource,       /* Offset 5 */
+    socRxReasonSampleDest,         /* Offset 6 */
+    socRxReasonL3SourceMiss,       /* Offset 7 */
+    socRxReasonL3DestMiss,         /* Offset 8 */
+    socRxReasonL3SourceMove,       /* Offset 9 */
+    socRxReasonMcastMiss,          /* Offset 10 */
+    socRxReasonIpMcastMiss,        /* Offset 11 */
+    socRxReasonFilterMatch,        /* Offset 12 */
+    socRxReasonL3HeaderError,      /* Offset 13 */
+    socRxReasonProtocol,           /* Offset 14 */
+    socRxReasonDosAttack,          /* Offset 15 */
+    socRxReasonMartianAddr,        /* Offset 16 */
+    socRxReasonTunnelError,        /* Offset 17 */
+    socRxReasonMirror,             /* Offset 18 */ 
+    socRxReasonIcmpRedirect,       /* Offset 19 */
+    socRxReasonL3Slowpath,         /* Offset 20 */
+    socRxReasonParityError,        /* Offset 21 */
+    socRxReasonL3MtuFail,          /* Offset 22 */
+    socRxReasonHigigHdrError,      /* Offset 23 */
+    socRxReasonMcastIdxError,      /* Offset 24 */
+    socRxReasonVlanFilterMatch,    /* Offset 25 */
+    socRxReasonClassBasedMove,     /* Offset 26 */
+    socRxReasonL3AddrBindFail,     /* Offset 27 */
+    socRxReasonMplsLabelMiss,      /* Offset 28 */
+    socRxReasonMplsInvalidAction,  /* Offset 29 */
+    socRxReasonMplsInvalidPayload, /* Offset 30 */
+    socRxReasonMplsTtl,            /* Offset 31 */
+    socRxReasonMplsSequenceNumber, /* Offset 32 */
+    socRxReasonL2NonUnicastMiss,   /* Offset 33 */
+    socRxReasonNhop,               /* Offset 34 */
+    socRxReasonBfdSlowpath,        /* Offset 35 */
+    socRxReasonStation,            /* Offset 36 */
+    socRxReasonVlanTranslate,      /* Offset 37 */
+    socRxReasonTimeSync,           /* Offset 38 */
+    socRxReasonL2LearnLimit,       /* Offset 39 */
+    socRxReasonBfd,                /* Offset 40 */
+    socRxReasonFailoverDrop,       /* Offset 41 */
+    socRxReasonNivUntagDrop,       /* Offset 42 */
+    socRxReasonNivTagDrop,         /* Offset 43 */
+    socRxReasonNivTagInvalid,      /* Offset 44 */
+    socRxReasonNivRpfFail,         /* Offset 45 */
+    socRxReasonNivInterfaceMiss,   /* Offset 46 */
+    socRxReasonNivPrioDrop,        /* Offset 47 */
+    socRxReasonInvalid,            /* Offset 48 */
+    socRxReasonInvalid,            /* Offset 49 */
+    socRxReasonInvalid,            /* Offset 50 */
+    socRxReasonInvalid,            /* Offset 51 */
+    socRxReasonInvalid,            /* Offset 52 */
+    socRxReasonInvalid,            /* Offset 53 */
+    socRxReasonInvalid,            /* Offset 54 */
+    socRxReasonInvalid,            /* Offset 55 */
+    socRxReasonInvalid,            /* Offset 56 */
+    socRxReasonInvalid,            /* Offset 57 */
+    socRxReasonInvalid,            /* Offset 58 */
+    socRxReasonInvalid,            /* Offset 59 */
+    socRxReasonInvalid,            /* Offset 60 */
+    socRxReasonInvalid,            /* Offset 61 */
+    socRxReasonInvalid,            /* Offset 62 */
+    socRxReasonInvalid             /* Offset 63 */
+  };
+static soc_rx_reason_t
+dcb29_rx_reason_map_ep[] = {
+    socRxReasonUnknownVlan,        /* Offset 0 */
+    socRxReasonStp,                /* Offset 1 */
+    socRxReasonVlanTranslate,      /* Offset 2 new */
+    socRxReasonTunnelError,        /* Offset 3 */
+    socRxReasonIpmc,               /* Offset 4 */
+    socRxReasonL3HeaderError,      /* Offset 5 */
+    socRxReasonTtl,                /* Offset 6 */
+    socRxReasonL2MtuFail,          /* Offset 7 */
+    socRxReasonHigigHdrError,      /* Offset 8 */
+    socRxReasonSplitHorizon,       /* Offset 9 */
+    socRxReasonNivPrune,           /* Offset 10 */
+    socRxReasonVirtualPortPrune,   /* Offset 11 */
+    socRxReasonFilterMatch,        /* Offset 12 */
+    socRxReasonNonUnicastDrop,     /* Offset 13 */
+    socRxReasonTrillPacketPortMismatch, /* Offset 14 */
+    socRxReasonOAMError,           /* Offset 15 */
+    socRxReasonOAMLMDM,            /* Offset 16 */
+    socRxReasonOAMCCMSlowPath,     /* Offset 17 */
+    socRxReasonOAMSlowpath,        /* Offset 18 */
+    socRxReasonInvalid,            /* Offset 19 */
+    socRxReasonInvalid,            /* Offset 20 */
+    socRxReasonInvalid,            /* Offset 21 */
+    socRxReasonInvalid,            /* Offset 22 */
+    socRxReasonInvalid,            /* Offset 23 */
+    socRxReasonInvalid,            /* Offset 24 */
+    socRxReasonInvalid,            /* Offset 25 */
+    socRxReasonInvalid,            /* Offset 26 */
+    socRxReasonInvalid,            /* Offset 27 */
+    socRxReasonInvalid,            /* Offset 28 */
+    socRxReasonInvalid,            /* Offset 29 */
+    socRxReasonInvalid,            /* Offset 30 */
+    socRxReasonInvalid,            /* Offset 31 */
+    socRxReasonInvalid,            /* Offset 32 */
+    socRxReasonInvalid,            /* Offset 33 */
+    socRxReasonInvalid,            /* Offset 34 */
+    socRxReasonInvalid,            /* Offset 35 */
+    socRxReasonInvalid,            /* Offset 36 */
+    socRxReasonInvalid,            /* Offset 37 */
+    socRxReasonInvalid,            /* Offset 38 */
+    socRxReasonInvalid,            /* Offset 39 */
+    socRxReasonInvalid,            /* Offset 40 */
+    socRxReasonInvalid,            /* Offset 41 */
+    socRxReasonInvalid,            /* Offset 42 */
+    socRxReasonInvalid,            /* Offset 43 */
+    socRxReasonInvalid,            /* Offset 44 */
+    socRxReasonInvalid,            /* Offset 45 */
+    socRxReasonInvalid,            /* Offset 46 */
+    socRxReasonInvalid,            /* Offset 47 */
+    socRxReasonInvalid,            /* Offset 48 */
+    socRxReasonInvalid,            /* Offset 49 */
+    socRxReasonInvalid,            /* Offset 50 */
+    socRxReasonInvalid,            /* Offset 51 */
+    socRxReasonInvalid,            /* Offset 52 */
+    socRxReasonInvalid,            /* Offset 53 */
+    socRxReasonInvalid,            /* Offset 54 */
+    socRxReasonInvalid,            /* Offset 55 */
+    socRxReasonInvalid,            /* Offset 56 */
+    socRxReasonInvalid,            /* Offset 57 */
+    socRxReasonInvalid,            /* Offset 58 */
+    socRxReasonInvalid,            /* Offset 59 */
+    socRxReasonInvalid,            /* Offset 60 */
+    socRxReasonInvalid,            /* Offset 61 */
+    socRxReasonInvalid,            /* Offset 62 */
+    socRxReasonInvalid             /* Offset 63 */
+};
+
+
+static soc_rx_reason_t *dcb29_rx_reason_maps[] = {
+    dcb29_rx_reason_map_ip_0,
+    dcb29_rx_reason_map_ip_1,
+    dcb29_rx_reason_map_ip_3,
+    dcb29_rx_reason_map_ep,
+    NULL
+};
+/*
+ * Function:
+ *      dcb29_rx_reason_map_get
+ * Purpose:
+ *      Return the RX reason map for DCB 23 type.
+ * Parameters:
+ *      dcb_op - DCB operations
+ *      dcb    - dma control block
+ * Returns:
+ *      RX reason map pointer
+ */
+static soc_rx_reason_t *
+dcb29_rx_reason_map_get(dcb_op_t *dcb_op, dcb_t *dcb)
+{
+    soc_rx_reason_t *map = NULL;
+    dcb29_t  *d = (dcb29_t *)dcb;
+
+    switch (d->word4.overlay1.cpu_opcode_type) {
+    case SOC_CPU_OPCODE_TYPE_IP_0:
+        map = dcb29_rx_reason_map_ip_0;
+        break;
+    case SOC_CPU_OPCODE_TYPE_IP_1:
+        map = dcb29_rx_reason_map_ip_1;
+        break;
+    case SOC_CPU_OPCODE_TYPE_IP_3:
+        map = dcb29_rx_reason_map_ip_3;
+        break;
+    case SOC_CPU_OPCODE_TYPE_EP:
+        map = dcb29_rx_reason_map_ep;
+        break;
+    default:
+        /* Unknown reason type */
+        break;
+    }
+
+    return map;
+}
+
+static _shr_rx_decap_tunnel_t dcb29_rx_decap_tunnel_map[] = {
+    _SHR_RX_DECAP_NONE,
+    _SHR_RX_DECAP_ACCESS_SVP,
+    _SHR_RX_DECAP_MIM,
+    _SHR_RX_DECAP_NONE,
+    _SHR_RX_DECAP_NONE,
+    _SHR_RX_DECAP_NONE,
+    _SHR_RX_DECAP_IP,
+    _SHR_RX_DECAP_NONE,
+    _SHR_RX_DECAP_L2MPLS_1LABEL,
+    _SHR_RX_DECAP_L2MPLS_1LABELCW,
+    _SHR_RX_DECAP_L3MPLS_1LABEL,
+    _SHR_RX_DECAP_L3MPLS_1LABELCW,
+}; 
+static uint32 dcb29_rx_decap_tunnel_get(dcb_t *dcb) {
+    dcb29_t *d = (dcb29_t *)dcb;
+    uint32 decap_tunnel_type = d->word11.overlay1.decap_tunnel_type;
+    /* Check for array bounds */
+    if ( (decap_tunnel_type <  
+    (sizeof (dcb29_rx_decap_tunnel_map) / sizeof (_shr_rx_decap_tunnel_t))) ) {
+        return (uint32)dcb29_rx_decap_tunnel_map[decap_tunnel_type];
+    }
+    return (uint32)_SHR_RX_DECAP_NONE;
+}
+
+GETFUNCEXPR(29, rx_l3_intf, ((d->replicated) ? (d->repl_nhi) :
+                             (((d->repl_nhi) & 0x3fff) +
+                              _SHR_L3_EGRESS_IDX_MIN)))
+
+GETFUNCFIELD(29, outer_vid, word4.overlay1.outer_vid)
+GETFUNCFIELD(29, olp_encap_oam_pkt, word4.overlay3.olp_encap_oam_pkt)
+GETFUNCNULL(29, read_ecc_error)
+GETFUNCNULL(29, desc_remaining)
+SETFUNCNULL(29, desc_remaining)
+GETFUNCNULL(29, desc_status)
+SETFUNCNULL(29, desc_status)
+
+dcb_op_t dcb29_op = {
+    29,
+    sizeof(dcb29_t),
+    dcb29_rx_reason_maps,
+    dcb29_rx_reason_map_get,
+    dcb0_rx_reasons_get,
+    dcb19_init,
+    dcb19_addtx,
+    dcb19_addrx,
+    dcb19_intrinfo,
+    dcb19_reqcount_set,
+    dcb19_reqcount_get,
+    dcb23_xfercount_get,
+    dcb0_addr_set,
+    dcb0_addr_get,
+    dcb0_paddr_get,
+    dcb19_done_set,
+    dcb19_done_get,
+    dcb19_sg_set,
+    dcb19_sg_get,
+    dcb19_chain_set,
+    dcb19_chain_get,
+    dcb19_reload_set,
+    dcb19_reload_get,
+    dcb19_desc_intr_set,
+    dcb19_desc_intr_get,
+    dcb19_tx_l2pbm_set,
+    dcb19_tx_utpbm_set,
+    dcb19_tx_l3pbm_set,
+    dcb19_tx_crc_set,
+    dcb19_tx_cos_set,
+    dcb19_tx_destmod_set,
+    dcb19_tx_destport_set,
+    dcb19_tx_opcode_set,
+    dcb19_tx_srcmod_set,
+    dcb19_tx_srcport_set,
+    dcb19_tx_prio_set,
+    dcb19_tx_pfm_set,
+    dcb23_rx_untagged_get,
+    dcb19_rx_crc_get,
+    dcb23_rx_cos_get,
+    dcb23_rx_destmod_get,
+    dcb23_rx_destport_get,
+    dcb23_rx_opcode_get,
+    dcb23_rx_classtag_get,
+    dcb23_rx_matchrule_get,
+    dcb19_rx_start_get,
+    dcb19_rx_end_get,
+    dcb19_rx_error_get,
+    dcb23_rx_prio_get,
+    dcb23_rx_reason_get,
+    dcb23_rx_reason_hi_get,
+    dcb23_rx_ingport_get,
+    dcb23_rx_srcport_get,
+    dcb23_rx_srcmod_get,
+    dcb23_rx_mcast_get,
+    dcb23_rx_vclabel_get,
+    dcb23_rx_mirror_get,
+    dcb23_rx_timestamp_get,
+    dcb23_rx_timestamp_upper_get,
+    dcb19_hg_set,
+    dcb19_hg_get,
+    dcb19_stat_set,
+    dcb19_stat_get,
+    dcb19_purge_set,
+    dcb19_purge_get,
+    dcb23_mhp_get,
+    dcb29_outer_vid_get,
+    dcb23_outer_pri_get,
+    dcb23_outer_cfi_get,
+    dcb23_rx_outer_tag_action_get,
+    dcb23_inner_vid_get,
+    dcb23_inner_pri_get,
+    dcb23_inner_cfi_get,
+    dcb23_rx_inner_tag_action_get,
+    dcb23_rx_bpdu_get,
+    dcb29_rx_l3_intf_get,
+    dcb29_rx_decap_tunnel_get,
+    dcb23_rx_switch_drop_get,
+    dcb29_olp_encap_oam_pkt_get,
+    dcb29_read_ecc_error_get,
+    dcb29_desc_remaining_get,
+    dcb29_desc_remaining_set,
+    dcb29_desc_status_get,
+    dcb29_desc_status_set,
+    NULL,
+};
+#endif /* BCM_KATANA2_SUPPORT */
+
+#if defined(BCM_HURRICANE2_SUPPORT)  
+GETFUNCNULL(30, rx_switch_drop)
+GETFUNCNULL(30, olp_encap_oam_pkt)
+GETFUNCNULL(30, read_ecc_error)
+GETFUNCNULL(30, desc_remaining)
+SETFUNCNULL(30, desc_remaining)
+GETFUNCNULL(30, desc_status)
+SETFUNCNULL(30, desc_status)
+
+dcb_op_t dcb30_op = {
+    30,
+    sizeof(dcb20_t),
+    dcb20_rx_reason_maps,
+    dcb0_rx_reason_map_get,
+    dcb0_rx_reasons_get,
+    dcb19_init,
+    dcb19_addtx,
+    dcb19_addrx,
+    dcb19_intrinfo,
+    dcb19_reqcount_set,
+    dcb19_reqcount_get,
+    dcb19_xfercount_get,
+    dcb0_addr_set,
+    dcb0_addr_get,
+    dcb0_paddr_get,
+    dcb19_done_set,
+    dcb19_done_get,
+    dcb19_sg_set,
+    dcb19_sg_get,
+    dcb19_chain_set,
+    dcb19_chain_get,
+    dcb19_reload_set,
+    dcb19_reload_get,
+    dcb19_desc_intr_set,
+    dcb19_desc_intr_get,
+    dcb19_tx_l2pbm_set,
+    dcb19_tx_utpbm_set,
+    dcb19_tx_l3pbm_set,
+    dcb19_tx_crc_set,
+    dcb19_tx_cos_set,
+    dcb19_tx_destmod_set,
+    dcb19_tx_destport_set,
+    dcb19_tx_opcode_set,
+    dcb19_tx_srcmod_set,
+    dcb19_tx_srcport_set,
+    dcb19_tx_prio_set,
+    dcb19_tx_pfm_set,
+    dcb19_rx_untagged_get,
+    dcb19_rx_crc_get,
+    dcb19_rx_cos_get,
+    dcb19_rx_destmod_get,
+    dcb19_rx_destport_get,
+    dcb19_rx_opcode_get,
+    dcb19_rx_classtag_get,
+    dcb20_rx_matchrule_get,
+    dcb19_rx_start_get,
+    dcb19_rx_end_get,
+    dcb19_rx_error_get,
+    dcb19_rx_prio_get,
+    dcb19_rx_reason_get,
+    dcb19_rx_reason_hi_get,
+    dcb19_rx_ingport_get,
+    dcb19_rx_srcport_get,
+    dcb19_rx_srcmod_get,
+    dcb19_rx_mcast_get,
+    dcb19_rx_vclabel_get,
+    dcb19_rx_mirror_get,
+    dcb20_rx_timestamp_get,
+    dcb20_rx_timestamp_upper_get,
+    dcb19_hg_set,
+    dcb19_hg_get,
+    dcb19_stat_set,
+    dcb19_stat_get,
+    dcb19_purge_set,
+    dcb19_purge_get,
+    dcb19_mhp_get,
+    dcb19_outer_vid_get,
+    dcb19_outer_pri_get,
+    dcb19_outer_cfi_get,
+    dcb19_rx_outer_tag_action_get,
+    dcb19_inner_vid_get,
+    dcb19_inner_pri_get,
+    dcb19_inner_cfi_get,
+    dcb19_rx_inner_tag_action_get,
+    dcb19_rx_bpdu_get,
+    dcb9_rx_l3_intf_get,
+    dcb19_rx_decap_tunnel_get,
+    dcb30_rx_switch_drop_get,
+    dcb30_olp_encap_oam_pkt_get,
+    dcb30_read_ecc_error_get,
+    dcb30_desc_remaining_get,
+    dcb30_desc_remaining_set,
+    dcb30_desc_status_get,
+    dcb30_desc_status_set,
+    NULL,
+};
+#endif /* BCM_HURRICANE2_SUPPORT */
+
+#if defined(BCM_GREYHOUND_SUPPORT)  
+/*
+ * DCB Type 31 Support
+ */
+static soc_rx_reason_t
+dcb31_rx_reason_map[] = {
+    socRxReasonUnknownVlan,        /* Offset 0 */
+    socRxReasonL2SourceMiss,       /* Offset 1 */
+    socRxReasonL2DestMiss,         /* Offset 2 */
+    socRxReasonL2Move,             /* Offset 3 */
+    socRxReasonL2Cpu,              /* Offset 4 */
+    socRxReasonSampleSource,       /* Offset 5 */
+    socRxReasonSampleDest,         /* Offset 6 */
+    socRxReasonL3SourceMiss,       /* Offset 7 */
+    socRxReasonL3DestMiss,         /* Offset 8 */
+    socRxReasonL3SourceMove,       /* Offset 9 */
+    socRxReasonMcastMiss,          /* Offset 10 */
+    socRxReasonIpMcastMiss,        /* Offset 11 */
+    socRxReasonFilterMatch,        /* Offset 12 */
+    socRxReasonL3HeaderError,      /* Offset 13 */
+    socRxReasonProtocol,           /* Offset 14 */
+    socRxReasonDosAttack,          /* Offset 15 */
+    socRxReasonMartianAddr,        /* Offset 16 */
+    socRxReasonTunnelError,        /* Offset 17 */
+    socRxReasonL2MtuFail,          /* Offset 18 */
+    socRxReasonIcmpRedirect,       /* Offset 19 */
+    socRxReasonL3Slowpath,         /* Offset 20 */
+    socRxReasonParityError,        /* Offset 21 */
+    socRxReasonL3MtuFail,          /* Offset 22 */
+    socRxReasonHigigHdrError,      /* Offset 23 */
+    socRxReasonMcastIdxError,      /* Offset 24 */
+    socRxReasonVlanFilterMatch,    /* Offset 25 */
+    socRxReasonClassBasedMove,     /* Offset 26 */
+    socRxReasonL2LearnLimit,       /* Offset 27 */
+    socRxReasonMplsLabelMiss,      /* Offset 28 */
+    socRxReasonMplsInvalidAction,  /* Offset 29 */
+    socRxReasonMplsInvalidPayload, /* Offset 30 */
+    socRxReasonMplsTtl,            /* Offset 31 */
+    socRxReasonMplsSequenceNumber, /* Offset 32 */
+    socRxReasonL2NonUnicastMiss,   /* Offset 33 */
+    socRxReasonNhop,               /* Offset 34 */
+    socRxReasonMplsCtrlWordError,  /* Offset 35 */  
+    socRxReasonTimeSync,           /* Offset 36 */ 
+    socRxReasonOAMSlowpath,        /* Offset 37 */  
+    socRxReasonOAMError,           /* Offset 38 */  
+    socRxReasonOAMLMDM,            /* Offset 39 */ 
+    socRxReasonL3AddrBindFail,     /* Offset 40 */  
+    socRxReasonVlanTranslate,      /* Offset 41 */  
+    socRxReasonNiv,                /* Offset 42 */ 
+    socRxReasonNiv,                /* Offset 43 */ 
+    socRxReasonNiv,                /* Offset 44 */ 
+    socRxReasonInvalid,            /* Offset 45 */
+    socRxReasonInvalid,            /* Offset 46 */
+    socRxReasonInvalid,            /* Offset 47 */
+    socRxReasonInvalid,            /* Offset 48 */
+    socRxReasonInvalid,            /* Offset 49 */
+    socRxReasonInvalid,            /* Offset 50 */
+    socRxReasonInvalid,            /* Offset 51 */
+    socRxReasonInvalid,            /* Offset 52 */
+    socRxReasonInvalid,            /* Offset 53 */
+    socRxReasonInvalid,            /* Offset 54 */
+    socRxReasonInvalid,            /* Offset 55 */
+    socRxReasonInvalid,            /* Offset 56 */
+    socRxReasonInvalid,            /* Offset 57 */
+    socRxReasonInvalid,            /* Offset 58 */
+    socRxReasonInvalid,            /* Offset 59 */
+    socRxReasonInvalid,            /* Offset 60 */
+    socRxReasonInvalid,            /* Offset 61 */
+    socRxReasonInvalid,            /* Offset 62 */
+    socRxReasonInvalid             /* Offset 63 */
+};
+static soc_rx_reason_t *dcb31_rx_reason_maps[] = {
+    dcb31_rx_reason_map,
+    NULL
+};
+
+static uint32
+dcb31_rx_untagged_get(dcb_t *dcb, int dt_mode, int ingport_is_hg)
+{
+    dcb31_t *d = (dcb31_t *)dcb;
+
+    COMPILER_REFERENCE(dt_mode);
+
+    return (ingport_is_hg ?
+            ((d->itag_status) ? 0 : 2) :
+            ((d->itag_status & 0x2) ?
+             ((d->itag_status & 0x1) ? 0 : 2) :
+             ((d->itag_status & 0x1) ? 1 : 3)));
+}
+
+GETFUNCEXPR(31, rx_mirror, ((d->imirror) | (d->emirror)))
+
+GETFUNCFIELD(31, rx_cos, word4.overlay2.cpu_cos)
+GETFUNCFIELD(31, outer_vid, word4.overlay1.outer_vid)
+GETFUNCFIELD(31, outer_pri, outer_pri)
+GETFUNCFIELD(31, outer_cfi, outer_cfi)
+GETFUNCFIELD(31, rx_outer_tag_action, otag_action)
+GETFUNCFIELD(31, inner_vid, inner_vid)
+GETFUNCFIELD(31, inner_pri, inner_pri)
+GETFUNCFIELD(31, inner_cfi, inner_cfi)
+GETFUNCFIELD(31, rx_inner_tag_action, itag_action)
+GETFUNCFIELD(31, rx_bpdu, bpdu)
+
+GETFUNCFIELD(31, rx_timestamp_upper, timestamp_hi)
+GETFUNCEXPR(31, rx_l3_intf, ((d->replicated) ? (d->repl_nhi) :
+        (((d->repl_nhi) & 0x3ff) + _SHR_L3_EGRESS_IDX_MIN)))
+GETFUNCNULL(31, rx_switch_drop)
+GETFUNCNULL(31, olp_encap_oam_pkt)
+GETFUNCNULL(31, read_ecc_error)
+GETFUNCNULL(31, desc_remaining)
+SETFUNCNULL(31, desc_remaining)
+GETFUNCNULL(31, desc_status)
+SETFUNCNULL(31, desc_status)
+
+dcb_op_t dcb31_op = {
+    31,
+    sizeof(dcb31_t),
+    dcb31_rx_reason_maps,
+    dcb0_rx_reason_map_get,
+    dcb0_rx_reasons_get,
+    dcb19_init,
+    dcb19_addtx,
+    dcb19_addrx,
+    dcb19_intrinfo,
+    dcb19_reqcount_set,
+    dcb19_reqcount_get,
+    dcb19_xfercount_get,
+    dcb0_addr_set,
+    dcb0_addr_get,
+    dcb0_paddr_get,
+    dcb19_done_set,
+    dcb19_done_get,
+    dcb19_sg_set,
+    dcb19_sg_get,
+    dcb19_chain_set,
+    dcb19_chain_get,
+    dcb19_reload_set,
+    dcb19_reload_get,
+    dcb19_desc_intr_set,
+    dcb19_desc_intr_get,
+    dcb19_tx_l2pbm_set,
+    dcb19_tx_utpbm_set,
+    dcb19_tx_l3pbm_set,
+    dcb19_tx_crc_set,
+    dcb19_tx_cos_set,
+    dcb19_tx_destmod_set,
+    dcb19_tx_destport_set,
+    dcb19_tx_opcode_set,
+    dcb19_tx_srcmod_set,
+    dcb19_tx_srcport_set,
+    dcb19_tx_prio_set,
+    dcb19_tx_pfm_set,
+    dcb31_rx_untagged_get,
+    dcb19_rx_crc_get,
+    dcb31_rx_cos_get,
+    dcb23_rx_destmod_get,
+    dcb23_rx_destport_get,
+    dcb23_rx_opcode_get,
+    dcb23_rx_classtag_get,
+    dcb23_rx_matchrule_get,
+    dcb19_rx_start_get,
+    dcb19_rx_end_get,
+    dcb19_rx_error_get,
+    dcb23_rx_prio_get,
+    dcb23_rx_reason_get,
+    dcb23_rx_reason_hi_get,
+    dcb23_rx_ingport_get,
+    dcb23_rx_srcport_get,
+    dcb23_rx_srcmod_get,
+    dcb23_rx_mcast_get,
+    dcb23_rx_vclabel_get,
+    dcb31_rx_mirror_get,
+    dcb23_rx_timestamp_get,
+    dcb31_rx_timestamp_upper_get,
+    dcb19_hg_set,
+    dcb19_hg_get,
+    dcb19_stat_set,
+    dcb19_stat_get,
+    dcb19_purge_set,
+    dcb19_purge_get,
+    dcb23_mhp_get,
+    dcb31_outer_vid_get,
+    dcb31_outer_pri_get,
+    dcb31_outer_cfi_get,
+    dcb31_rx_outer_tag_action_get,
+    dcb31_inner_vid_get,
+    dcb31_inner_pri_get,
+    dcb31_inner_cfi_get,
+    dcb31_rx_inner_tag_action_get,
+    dcb31_rx_bpdu_get,
+    dcb31_rx_l3_intf_get,
+    dcb19_rx_decap_tunnel_get,
+    dcb31_rx_switch_drop_get,
+    dcb31_olp_encap_oam_pkt_get,
+    dcb31_read_ecc_error_get,
+    dcb31_desc_remaining_get,
+    dcb31_desc_remaining_set,
+    dcb31_desc_status_get,
+    dcb31_desc_status_set,
+    NULL,
+};
+#endif /* BCM_GREYHOUND_SUPPORT */
+
+#if defined(BCM_TOMAHAWK_SUPPORT) || defined(BCM_TOMAHAWK2_SUPPORT)
+static uint32
+dcb32_rx_hg2_ext_eh_type_get(dcb_t *dcb)
+{
+   uint32 eh_type = 0;
+   dcb32_t *d = (dcb32_t *)dcb;
+
+   if (d->hg2_ext_hdr) {
+      switch (d->word14.overlay1.eh_type) {
+         case 0:
+              eh_type = d->word14.overlay1.eh_queue_tag;
+              break;
+         default:
+              break;
+      }
+   } 
+   return eh_type;
+}
+
+/*
+ * DCB Type 32 Support
+ */
+/* From FORMAT CPU_OPCODES */
+static soc_rx_reason_t
+dcb32_rx_reason_map[] = {
+    socRxReasonUnknownVlan,        /*  0: CPU_UVLAN */
+    socRxReasonL2SourceMiss,       /*  1: CPU_SLF */
+    socRxReasonL2DestMiss,         /*  2: CPU_DLF */
+    socRxReasonL2Move,             /*  3: CPU_L2MOVE */
+    socRxReasonL2Cpu,              /*  4: CPU_L2CPU */
+    socRxReasonSampleSource,       /*  5: CPU_SFLOW_SRC */
+    socRxReasonSampleDest,         /*  6: CPU_SFLOW_DST */
+    socRxReasonL3SourceMiss,       /*  7: CPU_L3SRC_MISS */
+    socRxReasonL3DestMiss,         /*  8: CPU_L3DST_MISS */
+    socRxReasonL3SourceMove,       /*  9: CPU_L3SRC_MOVE */
+    socRxReasonMcastMiss,          /* 10: CPU_MC_MISS */
+    socRxReasonIpMcastMiss,        /* 11: CPU_IPMC_MISS */
+    socRxReasonFilterMatch,        /* 12: CPU_FFP */
+    socRxReasonL3HeaderError,      /* 13: CPU_L3HDR_ERR */
+    socRxReasonProtocol,           /* 14: CPU_PROTOCOL_PKT */
+    socRxReasonDosAttack,          /* 15: CPU_DOS_ATTACK */
+    socRxReasonMartianAddr,        /* 16: CPU_MARTIAN_ADDR */
+    socRxReasonTunnelError,        /* 17: CPU_TUNNEL_ERR */
+    socRxReasonSampleSourceFlex,   /* 18: CPU_SFLOW_FLEX */
+    socRxReasonIcmpRedirect,       /* 19: ICMP_REDIRECT */
+    socRxReasonL3Slowpath,         /* 20: L3_SLOWPATH */
+    socRxReasonParityError,        /* 21: PARITY_ERROR */
+    socRxReasonL3MtuFail,          /* 22: L3_MTU_CHECK_FAIL */
+    socRxReasonHigigHdrError,      /* 23: HGHDR_ERROR */
+    socRxReasonMcastIdxError,      /* 24: MCIDX_ERROR */
+    socRxReasonVlanFilterMatch,    /* 25: VFP */
+    socRxReasonClassBasedMove,     /* 26: CBSM_PREVENTED */
+    socRxReasonL3AddrBindFail,     /* 27: MAC_BIND_FAIL */
+    socRxReasonMplsLabelMiss,      /* 28: MPLS_LABEL_MISS */
+    socRxReasonMplsInvalidAction,  /* 29: MPLS_INVALID_ACTION */
+    socRxReasonMplsInvalidPayload, /* 30: MPLS_INVALID_PAYLOAD */
+    socRxReasonMplsTtl,            /* 31: MPLS_TTL_CHECK_FAIL */
+    socRxReasonMplsSequenceNumber, /* 32: MPLS_SEQ_NUM_FAIL */
+    socRxReasonL2NonUnicastMiss,   /* 33: PBT_NONUC_PKT */
+    socRxReasonNhop,               /* 34: L3_NEXT_HOP */
+    socRxReasonMplsUnknownAch,     /* 35: MPLS_UNKNOWN_ACH_ERROR */
+    socRxReasonStation,            /* 36: MY_STATION */
+    socRxReasonNiv,                /* 37: NIV_DROP_REASON_ENCODING */
+    socRxReasonNiv,                /* 38: ->  */
+    socRxReasonNiv,                /* 39: 3-bit */
+    socRxReasonVlanTranslate,      /* 40: XLT_MISS */
+    socRxReasonTimeSync,           /* 41: TIME_SYNC */
+    socRxReasonOAMSlowpath,        /* 42: OAM_SLOWPATH */
+    socRxReasonOAMError,           /* 43: OAM_ERROR */
+    socRxReasonTrill,              /* 44: TRILL_DROP_REASON_ENCODING */
+    socRxReasonTrill,              /* 45: -> */
+    socRxReasonTrill,              /* 46: 3-bit */
+    socRxReasonL2GreSipMiss,       /* 47: L2GRE_SIP_MISS */
+    socRxReasonL2GreVpnIdMiss,     /* 48: L2GRE_VPNID_MISS */
+    socRxReasonBfdSlowpath,        /* 49: BFD_SLOWPATH */
+    socRxReasonBfd,                /* 50: BFD_ERROR */
+#if 1
+    socRxReasonInvalid,            /* 51: NOT DEFINED */
+#endif
+    socRxReasonCongestionCnm,      /* 52: ICNM */
+    socRxReasonMplsIllegalReservedLabel, /* 53: MPLS_ILLEGAL_RESERVED_LABEL */
+    socRxReasonMplsRouterAlertLabel, /* 54: MPLS_ALERT_LABEL */
+    socRxReasonCongestionCnmProxy, /* 55: QCN_CNM_PRP */
+    socRxReasonCongestionCnmProxyError, /* 56: QCN_CNM_PRP_DLF */
+    socRxReasonVxlanSipMiss,       /* 57: VXLAN_SIP_MISS */
+    socRxReasonVxlanVpnIdMiss,     /* 58: VXLAN_VN_ID_MISS */
+    socRxReasonFcoeZoneCheckFail,  /* 59: FCOE_ZONE_CHECK_FAIL */
+    socRxReasonNat,                /* 60: NAT_DROP_REASON_ENCODING */
+    socRxReasonNat,                /* 61: -> */
+    socRxReasonNat,                /* 62: 3-bit */
+    socRxReasonIpmcInterfaceMismatch /* 63: CPU_IPMC_INTERFACE_MISMATCH */
+};
+
+static soc_rx_reason_t *dcb32_rx_reason_maps[] = {
+    dcb32_rx_reason_map,
+    dcb21_rx_reason_niv_encoding_map,
+    dcb26_rx_reason_trill_encoding_map,
+    dcb26_rx_reason_nat_encoding_map,
+    NULL
+};
+
+static _shr_rx_decap_tunnel_t dcb32_rx_decap_tunnel_map[] = {
+    _SHR_RX_DECAP_NONE,
+    _SHR_RX_DECAP_ACCESS_SVP,
+    _SHR_RX_DECAP_MIM,
+    _SHR_RX_DECAP_L2GRE,
+    _SHR_RX_DECAP_VXLAN,
+    _SHR_RX_DECAP_AMT,
+    _SHR_RX_DECAP_IP,
+    _SHR_RX_DECAP_TRILL,
+    _SHR_RX_DECAP_L2MPLS_1LABEL,
+    _SHR_RX_DECAP_L2MPLS_2LABEL,
+    _SHR_RX_DECAP_L2MPLS_1LABELCW,
+    _SHR_RX_DECAP_L2MPLS_2LABELCW,
+    _SHR_RX_DECAP_L3MPLS_1LABEL,
+    _SHR_RX_DECAP_L3MPLS_2LABEL,
+    _SHR_RX_DECAP_L3MPLS_1LABELCW,
+    _SHR_RX_DECAP_L3MPLS_2LABELCW
+};
+static uint32 dcb32_rx_decap_tunnel_get(dcb_t *dcb) {
+    dcb32_t *d = (dcb32_t *)dcb;
+    /* Check for array bounds */
+    if ( (d->decap_tunnel_type <
+    (sizeof (dcb32_rx_decap_tunnel_map) / sizeof (_shr_rx_decap_tunnel_t))) ) {
+        return (uint32)dcb32_rx_decap_tunnel_map[d->decap_tunnel_type];
+    }
+    return (uint32)_SHR_RX_DECAP_NONE;
+}
+
+/* Fields extracted from MH/PBI */
+GETFUNCFIELD(32, rx_ingport, srcport)
+
+GETFUNCFIELD(32, rx_cos, cos)
+GETFUNCEXPR(32, rx_mirror, ((SOC_CPU_OPCODE_TYPE_IP_0 == d->cpu_opcode_type) ?
+                            (d->reason & (1 << 17)) : 0))
+GETFUNCFIELD(32, outer_vid, outer_vid)
+GETFUNCFIELD(32, rx_switch_drop, uc_switch_drop)
+GETFUNCNULL(32, olp_encap_oam_pkt)
+GETFUNCNULL(32, read_ecc_error)
+GETFUNCNULL(32, desc_remaining)
+SETFUNCNULL(32, desc_remaining)
+GETFUNCNULL(32, desc_status)
+SETFUNCNULL(32, desc_status)
+
+static void
+dcb32_desc_intr_set(dcb_t * dcb, int val)
+{
+    dcb32_t * d = (dcb32_t *)dcb;
+
+    d->c_intr = val;
+    return;
+}
+
+static uint32
+dcb32_desc_intr_get(dcb_t * dcb)
+{
+    dcb32_t * d = (dcb32_t *)dcb;
+    return (d->c_intr);
+}
+
+/*
+ * DCB Type 32 Support
+ */
+dcb_op_t dcb32_op = {
+    32,
+    sizeof(dcb32_t),
+    dcb32_rx_reason_maps,
+    dcb0_rx_reason_map_get,
+    dcb21_rx_reasons_get,
+    dcb19_init,
+    dcb19_addtx,
+    dcb19_addrx,
+    dcb19_intrinfo,
+    dcb19_reqcount_set,
+    dcb19_reqcount_get,
+    dcb26_xfercount_get,
+    dcb0_addr_set,
+    dcb0_addr_get,
+    dcb0_paddr_get,
+    dcb19_done_set,
+    dcb19_done_get,
+    dcb19_sg_set,
+    dcb19_sg_get,
+    dcb19_chain_set,
+    dcb19_chain_get,
+    dcb19_reload_set,
+    dcb19_reload_get,
+    dcb32_desc_intr_set,
+    dcb32_desc_intr_get,
+    dcb19_tx_l2pbm_set,
+    dcb19_tx_utpbm_set,
+    dcb19_tx_l3pbm_set,
+    dcb19_tx_crc_set,
+    dcb19_tx_cos_set,
+    dcb19_tx_destmod_set,
+    dcb19_tx_destport_set,
+    dcb19_tx_opcode_set,
+    dcb19_tx_srcmod_set,
+    dcb19_tx_srcport_set,
+    dcb19_tx_prio_set,
+    dcb19_tx_pfm_set,
+    dcb26_rx_untagged_get,
+    dcb19_rx_crc_get,
+    dcb32_rx_cos_get,
+    dcb26_rx_destmod_get,
+    dcb26_rx_destport_get,
+    dcb26_rx_opcode_get,
+    dcb26_rx_classtag_get,
+    dcb26_rx_matchrule_get,
+    dcb19_rx_start_get,
+    dcb19_rx_end_get,
+    dcb19_rx_error_get,
+    dcb26_rx_prio_get,
+    dcb26_rx_reason_get,
+    dcb26_rx_reason_hi_get,
+    dcb32_rx_ingport_get,
+    dcb26_rx_srcport_get,
+    dcb26_rx_srcmod_get,
+    dcb26_rx_mcast_get,
+    dcb26_rx_vclabel_get,
+    dcb32_rx_mirror_get,
+    dcb26_rx_timestamp_get,
+    dcb26_rx_timestamp_upper_get,
+    dcb19_hg_set,
+    dcb19_hg_get,
+    dcb19_stat_set,
+    dcb19_stat_get,
+    dcb19_purge_set,
+    dcb19_purge_get,
+    dcb26_mhp_get,
+    dcb32_outer_vid_get,
+    dcb26_outer_pri_get,
+    dcb26_outer_cfi_get,
+    dcb23_rx_outer_tag_action_get,
+    dcb26_inner_vid_get,
+    dcb26_inner_pri_get,
+    dcb26_inner_cfi_get,
+    dcb23_rx_inner_tag_action_get,
+    dcb26_rx_bpdu_get,
+    dcb26_rx_l3_intf_get,
+    dcb32_rx_decap_tunnel_get,
+    dcb32_rx_switch_drop_get,
+    dcb32_olp_encap_oam_pkt_get,
+    dcb32_read_ecc_error_get,
+    dcb32_desc_remaining_get,
+    dcb32_desc_remaining_set,
+    dcb32_desc_status_get,
+    dcb32_desc_status_set,
+    dcb32_rx_hg2_ext_eh_type_get,
+};
+#endif /* BCM_TOMAHAWK_SUPPORT */
+
+#if defined(BCM_TRIDENT2PLUS_SUPPORT)
+/*
+ * DCB Type 33 Support
+ */
+/* From FORMAT CPU_OPCODES */
+static soc_rx_reason_t
+dcb33_rx_reason_map[] = {
+    socRxReasonUnknownVlan,        /*  0: CPU_UVLAN */
+    socRxReasonL2SourceMiss,       /*  1: CPU_SLF */
+    socRxReasonL2DestMiss,         /*  2: CPU_DLF */
+    socRxReasonL2Move,             /*  3: CPU_L2MOVE */
+    socRxReasonL2Cpu,              /*  4: CPU_L2CPU */
+    socRxReasonSampleSource,       /*  5: CPU_SFLOW_SRC */
+    socRxReasonSampleDest,         /*  6: CPU_SFLOW_DST */
+    socRxReasonL3SourceMiss,       /*  7: CPU_L3SRC_MISS */
+    socRxReasonL3DestMiss,         /*  8: CPU_L3DST_MISS */
+    socRxReasonL3SourceMove,       /*  9: CPU_L3SRC_MOVE */
+    socRxReasonMcastMiss,          /* 10: CPU_MC_MISS */
+    socRxReasonIpMcastMiss,        /* 11: CPU_IPMC_MISS */
+    socRxReasonFilterMatch,        /* 12: CPU_FFP */
+    socRxReasonL3HeaderError,      /* 13: CPU_L3HDR_ERR */
+    socRxReasonProtocol,           /* 14: CPU_PROTOCOL_PKT */
+    socRxReasonDosAttack,          /* 15: CPU_DOS_ATTACK */
+    socRxReasonMartianAddr,        /* 16: CPU_MARTIAN_ADDR */
+    socRxReasonTunnelError,        /* 17: CPU_TUNNEL_ERR */
+    socRxReasonFailoverDrop,       /* 18: FAILOVER_DROP */
+    socRxReasonIcmpRedirect,       /* 19: ICMP_REDIRECT */
+    socRxReasonL3Slowpath,         /* 20: L3_SLOWPATH */
+    socRxReasonParityError,        /* 21: PARITY_ERROR */
+    socRxReasonL3MtuFail,          /* 22: L3_MTU_CHECK_FAIL */
+    socRxReasonHigigHdrError,      /* 23: HGHDR_ERROR */
+    socRxReasonMcastIdxError,      /* 24: MCIDX_ERROR */
+    socRxReasonVlanFilterMatch,    /* 25: VFP */
+    socRxReasonClassBasedMove,     /* 26: CBSM_PREVENTED */
+    socRxReasonL3AddrBindFail,     /* 27: MAC_BIND_FAIL */
+    socRxReasonMplsLabelMiss,      /* 28: MPLS_LABEL_MISS */
+    socRxReasonMplsInvalidAction,  /* 29: MPLS_INVALID_ACTION */
+    socRxReasonMplsInvalidPayload, /* 30: MPLS_INVALID_PAYLOAD */
+    socRxReasonMplsTtl,            /* 31: MPLS_TTL_CHECK_FAIL */
+    socRxReasonMplsSequenceNumber, /* 32: MPLS_SEQ_NUM_FAIL */
+    socRxReasonL2NonUnicastMiss,   /* 33: PBT_NONUC_PKT */
+    socRxReasonNhop,               /* 34: L3_NEXT_HOP */
+    socRxReasonMplsUnknownAch,     /* 35: MPLS_UNKNOWN_ACH_ERROR */
+    socRxReasonStation,            /* 36: MY_STATION */
+    socRxReasonNiv,                /* 37: NIV_DROP_REASON_ENCODING */
+    socRxReasonNiv,                /* 38: ->  */
+    socRxReasonNiv,                /* 39: 3-bit */
+    socRxReasonVlanTranslate,      /* 40: VXLT_MISS */
+    socRxReasonTimeSync,           /* 41: TIME_SYNC */
+    socRxReasonOAMSlowpath,        /* 42: OAM_SLOWPATH */
+    socRxReasonOAMError,           /* 43: OAM_ERROR */
+    socRxReasonTrill,              /* 44: TRILL_DROP_REASON_ENCODING */
+    socRxReasonTrill,              /* 45: -> */
+    socRxReasonTrill,              /* 46: 3-bit */
+    socRxReasonL2GreSipMiss,       /* 47: L2GRE_SIP_MISS */
+    socRxReasonL2GreVpnIdMiss,     /* 48: L2GRE_VPNID_MISS */
+    socRxReasonBfdSlowpath,        /* 49: BFD_SLOWPATH */
+    socRxReasonBfd,                /* 50: BFD_ERROR */
+    socRxReasonOAMLMDM,            /* 51: OAM_LMDM */
+    socRxReasonCongestionCnm,      /* 52: ICNM */
+    socRxReasonMplsIllegalReservedLabel, /* 53: MPLS_ILLEGAL_RESERVED_LABEL */
+    socRxReasonMplsRouterAlertLabel, /* 54: MPLS_ALERT_LABEL */
+    socRxReasonCongestionCnmProxy, /* 55: QCN_CNM_PRP */
+    socRxReasonCongestionCnmProxyError, /* 56: QCN_CNM_PRP_DLF */
+    socRxReasonVxlanSipMiss,       /* 57: VXLAN_SIP_MISS */
+    socRxReasonVxlanVpnIdMiss,     /* 58: VXLAN_VN_ID_MISS */
+    socRxReasonFcoeZoneCheckFail,  /* 59: FCOE_ZONE_CHECK_FAIL */
+    socRxReasonNat,                /* 60: NAT_DROP_REASON_ENCODING */
+    socRxReasonNat,                /* 61: -> */
+    socRxReasonNat,                /* 62: 3-bit */
+    socRxReasonIpmcInterfaceMismatch /* 63: CPU_IPMC_INTERFACE_MISMATCH */
+};
+
+/* From FORMAT NIV_CPU_OPCODE_ENCODING  */
+static soc_rx_reason_t dcb33_rx_reason_niv_encoding_map[] = {
+    socRxReasonNiv,                  /* 0: NO_ERRORS
+                                      * Base field, must match the entries above */
+    socRxReasonNivPrioDrop,          /* 1:DOT1P_ADMITTANCE_DISCARD */
+    socRxReasonNivInterfaceMiss,     /* 2:VIF_LOOKUP_MISS */
+    socRxReasonNivRpfFail,           /* 3:RPF_LOOKUP_MISS */
+    socRxReasonNivTagInvalid,        /* 4:VNTAG_FORMAT_ERROR */
+    socRxReasonNivTagDrop,           /* 5:VNTAG_PRESENT_DROP */
+    socRxReasonNivUntagDrop,         /* 6:VNTAG_NOT_PRESENT_DROP */
+    socRxReasonUnknownSubtendingPort /* 7:UNKOWN SUBTENDING PORT */
+};
+
+/* From FORMAT NAT_CPU_OPCODE_ENCODING */
+static soc_rx_reason_t dcb33_rx_reason_nat_encoding_map[] = {
+    socRxReasonNat,                /* 0:NOP
+                                    * Base field, must match the entries above */
+    socRxReasonTcpUdpNatMiss,      /* 1:NORMAL */
+    socRxReasonIcmpNatMiss,        /* 2:ICMP */
+    socRxReasonNatFragment,        /* 3:FRAGMEMT */
+    socRxReasonNatMiss,            /* 4:OTHER */
+    socRxReasonInvalid,            /* 5:NOT DEFINED */
+    socRxReasonInvalid,            /* 6:NOT DEFINED */
+#if 1
+    socRxReasonInvalid             /* 7:NOT DEFINED */
+#endif
+};
+
+static soc_rx_reason_t *dcb33_rx_reason_maps[] = {
+    dcb33_rx_reason_map,
+    dcb33_rx_reason_niv_encoding_map,
+    dcb26_rx_reason_trill_encoding_map,
+    dcb33_rx_reason_nat_encoding_map,
+    NULL
+};
+
+static _shr_rx_decap_tunnel_t dcb33_rx_decap_tunnel_map[] = {
+    _SHR_RX_DECAP_NONE,
+    _SHR_RX_DECAP_ACCESS_SVP,
+    _SHR_RX_DECAP_MIM,
+    _SHR_RX_DECAP_L2GRE,
+    _SHR_RX_DECAP_VXLAN,
+    _SHR_RX_DECAP_AMT,
+    _SHR_RX_DECAP_IP,
+    _SHR_RX_DECAP_TRILL,
+    _SHR_RX_DECAP_MPLS_1LABELCW,
+    _SHR_RX_DECAP_MPLS_2LABELCW,
+    _SHR_RX_DECAP_MPLS_1LABEL,
+    _SHR_RX_DECAP_MPLS_2LABEL,
+    _SHR_RX_DECAP_L3MPLS_1LABEL,
+    _SHR_RX_DECAP_L3MPLS_2LABEL,
+    _SHR_RX_DECAP_L3MPLS_1LABELCW,
+    _SHR_RX_DECAP_L3MPLS_2LABELCW
+}; 
+static uint32 dcb33_rx_decap_tunnel_get(dcb_t *dcb) {
+    dcb33_t *d = (dcb33_t *)dcb;
+    /* Check for array bounds */
+    if ( (d->word3.overlay1.decap_tunnel_type <  
+    (sizeof (dcb33_rx_decap_tunnel_map) / sizeof (_shr_rx_decap_tunnel_t))) ) {
+        return (uint32)dcb33_rx_decap_tunnel_map[d->word3.overlay1.decap_tunnel_type];
+    }
+    return (uint32)_SHR_RX_DECAP_NONE;
+}
+GETFUNCFIELD(33, outer_vid, word4.overlay1.outer_vid)
+
+static void
+dcb33_desc_intr_set(dcb_t * dcb, int val)
+{
+    dcb33_t * d = (dcb33_t *)dcb;
+
+    d->c_intr = val;
+    return;
+}
+
+static uint32
+dcb33_desc_intr_get(dcb_t * dcb)
+{
+    dcb33_t * d = (dcb33_t *)dcb;
+    return (d->c_intr);
+}
+
+dcb_op_t dcb33_op = {
+    33,
+    sizeof(dcb33_t),
+    dcb33_rx_reason_maps,
+    dcb0_rx_reason_map_get,
+    dcb21_rx_reasons_get,
+    dcb19_init,
+    dcb19_addtx,
+    dcb19_addrx,
+    dcb19_intrinfo,
+    dcb19_reqcount_set,
+    dcb19_reqcount_get,
+    dcb26_xfercount_get,
+    dcb0_addr_set,
+    dcb0_addr_get,
+    dcb0_paddr_get,
+    dcb19_done_set,
+    dcb19_done_get,
+    dcb19_sg_set,
+    dcb19_sg_get,
+    dcb19_chain_set,
+    dcb19_chain_get,
+    dcb19_reload_set,
+    dcb19_reload_get,
+    dcb33_desc_intr_set,
+    dcb33_desc_intr_get,
+    dcb19_tx_l2pbm_set,
+    dcb19_tx_utpbm_set,
+    dcb19_tx_l3pbm_set,
+    dcb19_tx_crc_set,
+    dcb19_tx_cos_set,
+    dcb19_tx_destmod_set,
+    dcb19_tx_destport_set,
+    dcb19_tx_opcode_set,
+    dcb19_tx_srcmod_set,
+    dcb19_tx_srcport_set,
+    dcb19_tx_prio_set,
+    dcb19_tx_pfm_set,
+    dcb26_rx_untagged_get,
+    dcb19_rx_crc_get,
+    dcb26_rx_cos_get,
+    dcb26_rx_destmod_get,
+    dcb26_rx_destport_get,
+    dcb26_rx_opcode_get,
+    dcb26_rx_classtag_get,
+    dcb26_rx_matchrule_get,
+    dcb19_rx_start_get,
+    dcb19_rx_end_get,
+    dcb19_rx_error_get,
+    dcb26_rx_prio_get,
+    dcb26_rx_reason_get,
+    dcb26_rx_reason_hi_get,
+    dcb26_rx_ingport_get,
+    dcb26_rx_srcport_get,
+    dcb26_rx_srcmod_get,
+    dcb26_rx_mcast_get,
+    dcb26_rx_vclabel_get,
+    dcb23_rx_mirror_get,
+    dcb26_rx_timestamp_get,
+    dcb26_rx_timestamp_upper_get,
+    dcb19_hg_set,
+    dcb19_hg_get,
+    dcb19_stat_set,
+    dcb19_stat_get,
+    dcb19_purge_set,
+    dcb19_purge_get,
+    dcb26_mhp_get,
+    dcb33_outer_vid_get,
+    dcb26_outer_pri_get,
+    dcb26_outer_cfi_get,
+    dcb23_rx_outer_tag_action_get,
+    dcb26_inner_vid_get,
+    dcb26_inner_pri_get,
+    dcb26_inner_cfi_get,
+    dcb23_rx_inner_tag_action_get,
+    dcb26_rx_bpdu_get,
+    dcb26_rx_l3_intf_get,
+    dcb33_rx_decap_tunnel_get,
+    dcb23_rx_switch_drop_get,
+    dcb23_olp_encap_oam_pkt_get,
+    dcb23_read_ecc_error_get,
+    dcb23_desc_remaining_get,
+    dcb23_desc_remaining_set,
+    dcb23_desc_status_get,
+    dcb23_desc_status_set,
+    NULL,
+};
+#endif /* BCM_TRIDENT2PLUS_SUPPORT */
+
+
+#ifdef BCM_APACHE_SUPPORT
+
+/* From FORMAT CPU_OPCODES */
+static soc_rx_reason_t
+dcb35_rx_reason_map_ip[] = {
+    socRxReasonUnknownVlan,        /*  0: CPU_UVLAN */
+    socRxReasonL2SourceMiss,       /*  1: CPU_SLF */
+    socRxReasonL2DestMiss,         /*  2: CPU_DLF */
+    socRxReasonL2Move,             /*  3: CPU_L2MOVE */
+    socRxReasonL2Cpu,              /*  4: CPU_L2CPU */
+    socRxReasonSampleSource,       /*  5: CPU_SFLOW_SRC */
+    socRxReasonSampleDest,         /*  6: CPU_SFLOW_DST */
+    socRxReasonL3SourceMiss,       /*  7: CPU_L3SRC_MISS */
+    socRxReasonL3DestMiss,         /*  8: CPU_L3DST_MISS */
+    socRxReasonL3SourceMove,       /*  9: CPU_L3SRC_MOVE */
+    socRxReasonMcastMiss,          /* 10: CPU_MC_MISS */
+    socRxReasonIpMcastMiss,        /* 11: CPU_IPMC_MISS */
+    socRxReasonFilterMatch,        /* 12: CPU_FFP */
+    socRxReasonL3HeaderError,      /* 13: CPU_L3HDR_ERR */
+    socRxReasonProtocol,           /* 14: CPU_PROTOCOL_PKT */
+    socRxReasonDosAttack,          /* 15: CPU_DOS_ATTACK */
+    socRxReasonMartianAddr,        /* 16: CPU_MARTIAN_ADDR */
+    socRxReasonTunnelError,        /* 17: CPU_TUNNEL_ERR */
+    socRxReasonFailoverDrop,       /* 18: FAILOVER_DROP */
+    socRxReasonIcmpRedirect,       /* 19: ICMP_REDIRECT */
+    socRxReasonL3Slowpath,         /* 20: L3_SLOWPATH */
+    socRxReasonParityError,        /* 21: PARITY_ERROR */
+    socRxReasonL3MtuFail,          /* 22: L3_MTU_CHECK_FAIL */
+    socRxReasonHigigHdrError,      /* 23: HGHDR_ERROR */
+    socRxReasonMcastIdxError,      /* 24: MCIDX_ERROR */
+    socRxReasonVlanFilterMatch,    /* 25: VFP */
+    socRxReasonClassBasedMove,     /* 26: CBSM_PREVENTED */
+    socRxReasonL3AddrBindFail,     /* 27: MAC_BIND_FAIL */
+    socRxReasonMplsLabelMiss,      /* 28: MPLS_LABEL_MISS */
+    socRxReasonMplsInvalidAction,  /* 29: MPLS_INVALID_ACTION */
+    socRxReasonMplsInvalidPayload, /* 30: MPLS_INVALID_PAYLOAD */
+    socRxReasonMplsTtl,            /* 31: MPLS_TTL_CHECK_FAIL */
+    socRxReasonMplsSequenceNumber, /* 32: MPLS_SEQ_NUM_FAIL */
+    socRxReasonL2NonUnicastMiss,   /* 33: PBT_NONUC_PKT */
+    socRxReasonNhop,               /* 34: L3_NEXT_HOP */
+    socRxReasonMplsUnknownAch,     /* 35: MPLS_UNKNOWN_ACH_ERROR */
+    socRxReasonStation,            /* 36: MY_STATION */
+    socRxReasonNiv,                /* 37: NIV_DROP_REASON_ENCODING */
+    socRxReasonNiv,                /* 38: ->  */
+    socRxReasonNiv,                /* 39: 3-bit */
+    socRxReasonVlanTranslate,      /* 40: VXLT_MISS */
+    socRxReasonTimeSync,           /* 41: TIME_SYNC */
+    socRxReasonOAMSlowpath,        /* 42: OAM_SLOWPATH */
+    socRxReasonMplsLookupsExceeded,/* 43: MPLS_OUT_OF_LOOKUPS */
+    socRxReasonTrill,              /* 44: TRILL_DROP_REASON_ENCODING */
+    socRxReasonTrill,              /* 45: -> */
+    socRxReasonTrill,              /* 46: 3-bit */
+    socRxReasonL2GreSipMiss,       /* 47: L2GRE_SIP_MISS */
+    socRxReasonL2GreVpnIdMiss,     /* 48: L2GRE_VPNID_MISS */
+    socRxReasonBfdSlowpath,        /* 49: BFD_SLOWPATH */
+    socRxReasonBfd,                /* 50: BFD_ERROR */
+    socRxReasonMplsReservedEntropyLabel,/* 51: ENTROPY_LABEL_IN_UNALLOWED_RANGE */
+    socRxReasonCongestionCnm,      /* 52: ICNM */
+    socRxReasonMplsIllegalReservedLabel, /* 53: MPLS_ILLEGAL_RESERVED_LABEL */
+    socRxReasonMplsRouterAlertLabel, /* 54: MPLS_ALERT_LABEL */
+    socRxReasonCongestionCnmProxy, /* 55: QCN_CNM_PRP */
+    socRxReasonCongestionCnmProxyError, /* 56: QCN_CNM_PRP_DLF */
+    socRxReasonVxlanSipMiss,       /* 57: VXLAN_SIP_MISS */
+    socRxReasonVxlanVpnIdMiss,     /* 58: VXLAN_VN_ID_MISS */
+    socRxReasonFcoeZoneCheckFail,  /* 59: FCOE_ZONE_CHECK_FAIL */
+    socRxReasonNat,                /* 60: NAT_DROP_REASON_ENCODING */
+    socRxReasonNat,                /* 61: -> */
+    socRxReasonNat,                /* 62: 3-bit */
+    socRxReasonIpmcInterfaceMismatch /* 63: CPU_IPMC_INTERFACE_MISMATCH */
+};
+
+/* From format EP_CPU_OPCODES */
+static soc_rx_reason_t
+dcb35_rx_reason_map_ep[] = {
+    socRxReasonSplitHorizon,       /* 0: CPUE_PRUNE */
+    socRxReasonNivPrune,           /* 1: CPUE_NIV_DISCARD */
+    socRxReasonVirtualPortPrune,   /* 2: CPUE_SPLIT_HORIZON */
+    socRxReasonHigigHdrError,      /* 3: CPUE_HIGIG */
+    socRxReasonTrillPacketPortMismatch, /* 4: CPUE_TRILL */
+    socRxReasonL2MtuFail,          /* 5: CPUE_MTU */
+    socRxReasonInvalid,            /* 6: CPUE_PKT_SMALL_OR_BIG */
+    socRxReasonUnknownVlan,        /* 7: CPUE_VLAN */
+    socRxReasonStp,                /* 8: CPUE_STG */
+    socRxReasonVlanTranslate,      /* 9: CPUE_VXLT */
+    socRxReasonNonUnicastDrop,     /* 10: CPUE_MULTI_DEST */
+    socRxReasonInvalid,            /* 11: CPUE_CNM */
+    socRxReasonInvalid,            /* 12: CPUE_FCOE */
+    socRxReasonInvalid,            /* 13: CPUE_CFI */
+    socRxReasonTtl,                /* 14: CPUE_TTL_DROP */
+    socRxReasonIpmc,               /* 15: CPUE_L3ERR */
+    socRxReasonTunnelError,        /* 16: CPUE_TUNNEL */
+    socRxReasonFilterMatch,        /* 17: CPUE_EFP */
+    socRxReasonInvalid,            /* 18: CPUE_PROT */
+    socRxReasonInvalid,            /* 19: CPUE_1588 */
+    socRxReasonInvalid,            /* 20: CPUE_COMPOSITE_ERROR */
+    socRxReasonInvalid,            /* 21: EP_DROP_ORIG */
+
+    socRxReasonInvalid,            /* Offset 22 */
+    socRxReasonInvalid,            /* Offset 23 */
+    socRxReasonInvalid,            /* Offset 24 */
+    socRxReasonInvalid,            /* Offset 25 */
+    socRxReasonInvalid,            /* Offset 26 */
+    socRxReasonInvalid,            /* Offset 27 */
+    socRxReasonInvalid,            /* Offset 28 */
+    socRxReasonInvalid,            /* Offset 29 */
+    socRxReasonInvalid,            /* Offset 30 */
+    socRxReasonInvalid,            /* Offset 31 */
+    socRxReasonInvalid,            /* Offset 32 */
+    socRxReasonInvalid,            /* Offset 33 */
+    socRxReasonInvalid,            /* Offset 34 */
+    socRxReasonInvalid,            /* Offset 35 */
+    socRxReasonInvalid,            /* Offset 36 */
+    socRxReasonInvalid,            /* Offset 37 */
+    socRxReasonInvalid,            /* Offset 38 */
+    socRxReasonInvalid,            /* Offset 39 */
+    socRxReasonInvalid,            /* Offset 40 */
+    socRxReasonInvalid,            /* Offset 41 */
+    socRxReasonInvalid,            /* Offset 42 */
+    socRxReasonInvalid,            /* Offset 43 */
+    socRxReasonInvalid,            /* Offset 44 */
+    socRxReasonInvalid,            /* Offset 45 */
+    socRxReasonInvalid,            /* Offset 46 */
+    socRxReasonInvalid,            /* Offset 47 */
+    socRxReasonInvalid,            /* Offset 48 */
+    socRxReasonInvalid,            /* Offset 49 */
+    socRxReasonInvalid,            /* Offset 50 */
+    socRxReasonInvalid,            /* Offset 51 */
+    socRxReasonInvalid,            /* Offset 52 */
+    socRxReasonInvalid,            /* Offset 53 */
+    socRxReasonInvalid,            /* Offset 54 */
+    socRxReasonInvalid,            /* Offset 55 */
+    socRxReasonInvalid,            /* Offset 56 */
+    socRxReasonInvalid,            /* Offset 57 */
+    socRxReasonInvalid,            /* Offset 58 */
+    socRxReasonInvalid,            /* Offset 59 */
+    socRxReasonInvalid,            /* Offset 60 */
+    socRxReasonInvalid,            /* Offset 61 */
+    socRxReasonInvalid,            /* Offset 62 */
+    socRxReasonInvalid             /* Offset 63 */
+};
+
+static soc_rx_reason_t *dcb35_rx_reason_maps[4][5] = {
+    {   /* IP_0 */
+        dcb35_rx_reason_map_ip,
+        dcb33_rx_reason_niv_encoding_map,
+        dcb26_rx_reason_trill_encoding_map,
+        dcb33_rx_reason_nat_encoding_map,
+        NULL
+    },
+    {NULL}, /* Index 1 is invalid */
+    {   /*  EP */
+        dcb35_rx_reason_map_ep,
+        NULL
+    },
+    {NULL} /* Index 3 is invalid */
+};
+
+
+/*
+ * Function:
+ *      dcb35_rx_reason_map_get
+ * Purpose:
+ *      Return the RX reason map for DCB 35 type.
+ * Parameters:
+ *      dcb_op - DCB operations
+ *      dcb    - dma control block
+ * Returns:
+ *      RX reason map pointer
+ */
+static soc_rx_reason_t *
+dcb35_rx_reason_map_get(dcb_op_t *dcb_op, dcb_t *dcb)
+{
+    soc_rx_reason_t *map = NULL;
+    dcb35_t * d = (dcb35_t *)dcb;
+
+    map = dcb35_rx_reason_maps[(d->word4.overlay1.cpu_opcode_type)][0];
+
+    return map;
+}
+
+static _shr_rx_decap_tunnel_t dcb35_rx_decap_tunnel_map[] = {
+    _SHR_RX_DECAP_NONE,
+    _SHR_RX_DECAP_ACCESS_SVP,
+    _SHR_RX_DECAP_MIM,
+    _SHR_RX_DECAP_L2GRE,
+    _SHR_RX_DECAP_VXLAN,
+    _SHR_RX_DECAP_AMT,
+    _SHR_RX_DECAP_IP,
+    _SHR_RX_DECAP_TRILL,
+    _SHR_RX_DECAP_MPLS_1LABELCW,
+    _SHR_RX_DECAP_MPLS_2LABELCW,
+    _SHR_RX_DECAP_MPLS_3LABELCW,
+    _SHR_RX_DECAP_MPLS_3LABEL_ENTROPYCW,
+    _SHR_RX_DECAP_MPLS_1LABEL,
+    _SHR_RX_DECAP_MPLS_2LABEL,
+    _SHR_RX_DECAP_MPLS_3LABEL,
+    _SHR_RX_DECAP_MPLS_3LABEL_ENTROPY
+};
+static uint32 dcb35_rx_decap_tunnel_get(dcb_t *dcb) {
+    dcb35_t *d = (dcb35_t *)dcb;
+    /* Check for array bounds */
+    if ( (d->word3.overlay1.decap_tunnel_type <
+    (sizeof (dcb35_rx_decap_tunnel_map) / sizeof (_shr_rx_decap_tunnel_t))) ) {
+        return (uint32)dcb35_rx_decap_tunnel_map[d->word3.overlay1.decap_tunnel_type];
+    }
+    return (uint32)_SHR_RX_DECAP_NONE;
+}
+
+GETFUNCFIELD(35, olp_encap_oam_pkt, olp_encap_oam_pkt)
+GETFUNCNULL(35, read_ecc_error)
+GETFUNCNULL(35, desc_remaining)
+SETFUNCNULL(35, desc_remaining)
+GETFUNCNULL(35, desc_status)
+SETFUNCNULL(35, desc_status)
+
+dcb_op_t dcb35_op = {
+    35,
+    sizeof(dcb35_t),
+    dcb35_rx_reason_maps[0],
+    dcb35_rx_reason_map_get,
+    dcb21_rx_reasons_get,
+    dcb19_init,
+    dcb19_addtx,
+    dcb19_addrx,
+    dcb19_intrinfo,
+    dcb19_reqcount_set,
+    dcb19_reqcount_get,
+    dcb26_xfercount_get,
+    dcb0_addr_set,
+    dcb0_addr_get,
+    dcb0_paddr_get,
+    dcb19_done_set,
+    dcb19_done_get,
+    dcb19_sg_set,
+    dcb19_sg_get,
+    dcb19_chain_set,
+    dcb19_chain_get,
+    dcb19_reload_set,
+    dcb19_reload_get,
+    dcb33_desc_intr_set,
+    dcb33_desc_intr_get,
+    dcb19_tx_l2pbm_set,
+    dcb19_tx_utpbm_set,
+    dcb19_tx_l3pbm_set,
+    dcb19_tx_crc_set,
+    dcb19_tx_cos_set,
+    dcb19_tx_destmod_set,
+    dcb19_tx_destport_set,
+    dcb19_tx_opcode_set,
+    dcb19_tx_srcmod_set,
+    dcb19_tx_srcport_set,
+    dcb19_tx_prio_set,
+    dcb19_tx_pfm_set,
+    dcb26_rx_untagged_get,
+    dcb19_rx_crc_get,
+    dcb26_rx_cos_get,
+    dcb26_rx_destmod_get,
+    dcb26_rx_destport_get,
+    dcb26_rx_opcode_get,
+    dcb26_rx_classtag_get,
+    dcb26_rx_matchrule_get,
+    dcb19_rx_start_get,
+    dcb19_rx_end_get,
+    dcb19_rx_error_get,
+    dcb26_rx_prio_get,
+    dcb26_rx_reason_get,
+    dcb26_rx_reason_hi_get,
+    dcb26_rx_ingport_get,
+    dcb26_rx_srcport_get,
+    dcb26_rx_srcmod_get,
+    dcb26_rx_mcast_get,
+    dcb26_rx_vclabel_get,
+    dcb23_rx_mirror_get,
+    dcb26_rx_timestamp_get,
+    dcb26_rx_timestamp_upper_get,
+    dcb19_hg_set,
+    dcb19_hg_get,
+    dcb19_stat_set,
+    dcb19_stat_get,
+    dcb19_purge_set,
+    dcb19_purge_get,
+    dcb26_mhp_get,
+    dcb33_outer_vid_get,
+    dcb26_outer_pri_get,
+    dcb26_outer_cfi_get,
+    dcb23_rx_outer_tag_action_get,
+    dcb26_inner_vid_get,
+    dcb26_inner_pri_get,
+    dcb26_inner_cfi_get,
+    dcb23_rx_inner_tag_action_get,
+    dcb26_rx_bpdu_get,
+    dcb26_rx_l3_intf_get,
+    dcb35_rx_decap_tunnel_get,
+    dcb23_rx_switch_drop_get,
+    dcb35_olp_encap_oam_pkt_get,
+    dcb35_read_ecc_error_get,
+    dcb35_desc_remaining_get,
+    dcb35_desc_remaining_set,
+    dcb35_desc_status_get,
+    dcb35_desc_status_set,
+    NULL,
+};
+#endif /* BCM_APACHE_SUPPORT */
+
+#if defined(BCM_TRIDENT3_SUPPORT)
+SETFUNCFIELD(36, reqcount, c_count, uint32 count, count)
+GETFUNCFIELD(36, reqcount, c_count)
+GETFUNCFIELD(36, xfercount, count)
+SETFUNCFIELD(36, done, done, int val, val ? 1 : 0)
+GETFUNCFIELD(36, done, done)
+SETFUNCFIELD(36, sg, c_sg, int val, val ? 1 : 0)
+GETFUNCFIELD(36, sg, c_sg)
+SETFUNCFIELD(36, chain, c_chain, int val, val ? 1 : 0)
+GETFUNCFIELD(36, chain, c_chain)
+SETFUNCFIELD(36, reload, c_reload, int val, val ? 1 : 0)
+GETFUNCFIELD(36, reload, c_reload)
+GETFUNCFIELD(36, rx_start, start)
+GETFUNCFIELD(36, rx_end, end)
+GETFUNCFIELD(36, rx_error, error)
+SETFUNCFIELD(36, hg, c_hg, uint32 hg, hg)
+GETFUNCFIELD(36, hg, c_hg)
+SETFUNCFIELD(36, purge, c_purge, uint32 purge, purge)
+GETFUNCFIELD(36, purge, c_purge)
+GETFUNCFIELD(36, read_ecc_error, ecc_error)
+GETFUNCFIELD(36, desc_status, c_desc_status)
+GETFUNCFIELD(36, desc_intr, c_intr)
+GETFUNCFIELD(36, desc_remaining, c_desc)
+
+GETHDRFUNCFIELD(36, rx_timestamp, timestamp)
+GETHDRFUNCNULL(36, rx_timestamp_upper)
+GETHDRPTREXPR(36, mhp, &(h->mh0))
+GETHDRFUNCFIELD(36, outer_vid, outer_vid)
+GETHDRFUNCFIELD(36, outer_pri, word6.overlay1.outer_pri)
+GETHDRFUNCFIELD(36, outer_cfi, outer_cfi)
+GETHDRFUNCFIELD(36, rx_outer_tag_action, otag_action)
+GETHDRFUNCFIELD(36, inner_vid, inner_vid)
+GETHDRFUNCFIELD(36, inner_pri, word6.overlay1.inner_pri)
+GETHDRFUNCFIELD(36, inner_cfi, word6.overlay1.inner_cfi)
+GETHDRFUNCFIELD(36, rx_inner_tag_action, itag_action)
+GETHDRFUNCFIELD(36, rx_bpdu, bpdu)
+GETHDRFUNCFIELD(36, rx_decap_tunnel, decap_tunnel_type)
+
+static uint32 ep_to_cpu_hdr36_rx_crc_get(void *hdr) {
+    return 0;
+}
+
+static uint32
+ep_to_cpu_hdr36_rx_untagged_get(void *hdr, int dt_mode, int ingport_is_hg)
+{
+/*FIXME: tag_status (itag_status) field is removed*/
+    return 0;
+}
+
+static void
+ep_to_cpu_hdr36_rx_reasons_get(dcb_op_t *dcb_op, void *hdr, soc_rx_reasons_t *reasons)
+{
+    soc_rx_reason_t *map, *encoding_map;
+    uint32 opcode[2], encoding[3];
+    uint32 bit_val;
+    int word_idx, bit_idx, opcode_idx, map_idx, word_count;
+    int enc_bit = 0;
+
+    SOC_RX_REASON_CLEAR_ALL(*reasons);
+
+    opcode[0] = dcb_op->rx_reason_get(hdr);
+    opcode[1] = dcb_op->rx_reason_hi_get(hdr);
+    word_count = 2;
+    sal_memset(encoding, 0, sizeof(encoding));
+    map = dcb_op->rx_reason_maps[0];
+    for (word_idx = 0; word_idx < word_count; word_idx++) {
+        for (bit_idx = 0; bit_idx < 32; bit_idx++) {
+            opcode_idx = word_idx * 32 + bit_idx;
+            bit_val = opcode[word_idx] & (1 << bit_idx) ? 1 : 0;
+            for (map_idx = 0; ; map_idx++) {
+                encoding_map = dcb_op->rx_reason_maps[1 + map_idx];
+                if (encoding_map == NULL) {
+                    break;
+                }
+                if (map[opcode_idx] != encoding_map[0]) {
+                    continue;
+                }
+                if (opcode_idx == 0 || map[opcode_idx - 1] != encoding_map[0]) {
+                    enc_bit = 0;
+                }
+                encoding[map_idx] |= bit_val << enc_bit;
+                enc_bit++;
+                break;
+            }
+            if (encoding_map == NULL && bit_val) {
+                SOC_RX_REASON_SET(*reasons, map[opcode_idx]);
+            }
+        }
+    }
+
+    for (map_idx = 0; ; map_idx++) {
+        encoding_map = dcb_op->rx_reason_maps[1 + map_idx];
+        if (encoding_map == NULL) {
+            break;
+        }
+        if (encoding[map_idx] != socRxReasonInvalid) {
+            SOC_RX_REASON_SET(*reasons, encoding_map[encoding[map_idx]]);
+        }
+    }
+
+    /* BPDU bit should be a reason, paste it in here */
+    if (dcb_op->rx_bpdu_get(hdr)) {
+        SOC_RX_REASON_SET(*reasons, socRxReasonBpdu);
+    }
+
+    return;
+}
+
+
+GETHDRFUNCFIELD(36, rx_cos, word8.overlay1.cpu_cos)
+GETHDRHG2FUNCFIELD(36, rx_destmod, dst_mod)
+GETHDRHG2FUNCFIELD(36, rx_destport, dst_port)
+
+GETHDRHG2FUNCFIELD(36, rx_opcode, opcode)
+GETHDRHG2FUNCEXPR(36, rx_classtag, (h->ppd_overlay1.ppd_type != 1 ? 0 :
+                                 (h->ppd_overlay2.ctag_hi << 8) |
+                                 (h->ppd_overlay2.ctag_lo)))
+GETHDRFUNCFIELD(36, rx_matchrule, match_rule)
+GETHDRHG2FUNCFIELD(36, rx_prio, vlan_pri) /* outer_pri */
+
+static uint32
+ep_to_cpu_hdr36_rx_reason_get(void *hdr)
+{
+    ep_to_cpu_hdr36_t *h = (ep_to_cpu_hdr36_t *)hdr;
+
+    return (h->switch_pkt) ? (h->reason) : 0;
+}
+
+static uint32
+ep_to_cpu_hdr36_rx_reason_hi_get(void *hdr)
+{
+    ep_to_cpu_hdr36_t *h = (ep_to_cpu_hdr36_t *)hdr;
+
+    return (h->switch_pkt) ? (h->reason_hi) : 0;
+}
+
+GETHDRFUNCFIELD(36, rx_ingport, word8.overlay1.srcport)
+GETHDRHG2FUNCFIELD(36, rx_srcport, src_port)
+GETHDRHG2FUNCFIELD(36, rx_srcmod, src_mod)
+GETHDRHG2FUNCEXPR(36, rx_mcast, ((h->ppd_overlay1.dst_mod << 8) |
+                              (h->ppd_overlay1.dst_port)))
+GETHDRHG2FUNCEXPR(36, rx_vclabel, ((h->ppd_overlay1.vc_label_19_16 << 16) |
+                              (h->ppd_overlay1.vc_label_15_8 << 8) |
+                              (h->ppd_overlay1.vc_label_7_0)))
+GETHDRFUNCEXPR(36, rx_mirror, ((h->switch_pkt) ? 0:1))
+
+GETHDRFUNCEXPR(36, rx_l3_intf, h->word6.overlay1.nhi_b ? \
+   (h->word6.overlay1.nhi_b + _SHR_L3_EGRESS_IDX_MIN): \
+   (((h->nhi_a_hi << 8) | h->word6.overlay1.nhi_a_lo) + _SHR_L3_EGRESS_IDX_MIN))
+GETHDRFUNCNULL(36, rx_switch_drop)
+GETHDRFUNCNULL(36, olp_encap_oam_pkt)
+
+#if 0
+/* FIXME: Keep it for now, maybe useful later */
+static void
+ep_to_cpu_hdr_funcerr(int dt, char *name)
+{
+    LOG_ERROR(BSL_LS_SOC_COMMON,
+              (BSL_META("ERROR: ep_to_cpu_hdr%d_%s called\n"), dt, name));
+}
+#endif
+
+static void
+dcb36_init(dcb_t *dcb)
+{
+    uint32      *d = (uint32 *)dcb;
+
+    d[0] = d[1] = d[2] = d[3] = 0;
+}
+
+static int
+dcb36_add_rx(dv_t *dv, sal_vaddr_t addr, uint32 count, uint32 flags)
+{
+    dcb36_t     *d;     /* DCB */
+    uint32            *di;    /* DCB integer pointer */
+    sal_paddr_t        paddr;
+
+    d = (dcb36_t *)SOC_DCB_IDX2PTR(dv->dv_unit, dv->dv_dcb, dv->dv_vcnt);
+
+    if (dv->dv_vcnt > 0) {      /* chain off previous dcb */
+        d[-1].c_chain = 1;
+    }
+
+    di = (uint32 *)d;
+    di[0] = di[1] = di[2] = di[3] = 0;
+
+    if (addr) {
+        paddr = soc_cm_l2p(dv->dv_unit, (void *)addr);
+        d->addr_lo = PTR_TO_INT(paddr);
+        d->addr_hi = (0x10000000 | PTR_HI_TO_INT(paddr));
+    }
+
+    d->c_count = count;
+    d->c_sg = 1;
+
+    dv->dv_vcnt += 1;
+    return dv->dv_cnt - dv->dv_vcnt;
+}
+
+static int
+dcb36_add_tx(dv_t *dv, sal_vaddr_t addr, uint32 count,
+            pbmp_t l2pbm, pbmp_t utpbm, pbmp_t l3pbm, uint32 flags, uint32 *hgh)
+{
+    dcb36_t     *d;     /* DCB */
+    uint32            *di;    /* DCB integer pointer */
+    sal_paddr_t       paddr = 0;  /* Packet buffer physical address */
+
+    d = (dcb36_t *)SOC_DCB_IDX2PTR(dv->dv_unit, dv->dv_dcb, dv->dv_vcnt);
+
+    if (addr)
+        paddr = soc_cm_l2p(dv->dv_unit, (void *)addr);
+
+    if (dv->dv_vcnt > 0 && (dv->dv_flags & DV_F_COMBINE_DCB) &&
+        (d[-1].c_sg != 0) &&
+        ((d[-1].addr_lo + d[-1].c_count) == paddr) &&
+        (d[-1].c_count + count <= DCB_MAX_REQCOUNT)) {
+        d[-1].c_count += count;
+        return dv->dv_cnt - dv->dv_vcnt;
+    }
+
+    if (dv->dv_vcnt >= dv->dv_cnt) {
+        return SOC_E_FULL;
+    }
+    if (dv->dv_vcnt > 0) {      /* chain off previous dcb */
+        d[-1].c_chain = 1;
+    }
+
+    di = (uint32 *)d;
+    di[0] = di[1] = di[2] = di[3] = 0;
+
+    d->addr_lo = PTR_TO_INT(paddr);
+    d->addr_hi = (0x10000000 | PTR_HI_TO_INT(paddr));
+    d->c_count = count;
+    d->c_sg = 1;
+
+    d->c_purge = SOC_DMA_PURGE_GET(flags);
+
+    if (SOC_DMA_HG_GET(flags)) {
+        d->c_hg = 1;
+    }
+
+    dv->dv_vcnt += 1;
+
+    return dv->dv_cnt - dv->dv_vcnt;
+}
+
+static uint32
+dcb36_intr_info(int unit, dcb_t *dcb, int tx, uint32 *count)
+{
+    dcb36_t      *d = (dcb36_t *)dcb;     /*  DCB */
+    uint32      f;                                    /* SOC_DCB_INFO_* flags */
+
+    if (!d->done) {
+        return 0;
+    }
+
+    f = SOC_DCB_INFO_DONE;
+    if (tx) {
+        if (!d->c_sg) {
+            f |= SOC_DCB_INFO_PKTEND;
+        }
+    } else {
+        if (d->end) {
+            f |= SOC_DCB_INFO_PKTEND;
+        }
+    }
+
+    *count = d->count;
+    return f;
+}
+
+/* the addr related functions are the same for all dcb types */
+static void
+dcb36_addr_set(int unit, dcb_t *dcb, sal_vaddr_t addr)
+{
+    dcb36_t      *d = (dcb36_t *)dcb;     /*  DCB */
+    sal_paddr_t        paddr;
+
+    if (addr == 0) {
+        d->addr_lo = 0;
+        d->addr_hi = 0;
+    } else {
+        paddr = soc_cm_l2p(unit, (void *)addr);
+        d->addr_lo = PTR_TO_INT(paddr);
+        d->addr_hi = (0x10000000 | PTR_HI_TO_INT(paddr));
+    }
+}
+
+static sal_vaddr_t
+dcb36_addr_get(int unit, dcb_t *dcb)
+{
+    dcb36_t      *d = (dcb36_t *)dcb;     /*  DCB */
+    sal_paddr_t        paddr;
+
+#if defined(COMPILER_OVERRIDE_NO_LONGLONG) || defined(__PEDANTIC__)
+    paddr = d->addr_lo;
+#else
+    paddr = (((uint64)(d->addr_hi & ~(0x10000000)) << 32) | d->addr_lo);
+#endif
+
+    return (sal_vaddr_t)soc_cm_p2l(unit, paddr);
+}
+
+static sal_paddr_t
+dcb36_paddr_get(dcb_t *dcb)
+{
+    uint32      *d = (uint32 *)dcb;
+
+    return (sal_paddr_t)*d;
+}
+
+static void
+dcb36_desc_intr_set(dcb_t * dcb, int val)
+{
+    dcb36_t * d = (dcb36_t *)dcb;
+
+    d->c_intr = val;
+    return;
+}
+
+static uint32
+dcb36_desc_status_set(dcb_t * dcb, uint32 val)
+{
+    dcb36_t * d = (dcb36_t *)dcb;
+
+    d->c_desc_status = val;
+    return 0;
+}
+
+static uint32
+dcb36_desc_remaining_set(dcb_t * dcb, uint32 val)
+{
+    dcb36_t * d = (dcb36_t *)dcb;
+
+    d->c_desc = val;
+    return 0;
+}
+
+/*
+ * DCB Type 36 Support
+ */
+/* From FORMAT CPU_OPCODES */
+static soc_rx_reason_t
+dcb36_rx_reason_map[] = {
+    socRxReasonFilterMatch,        /*  0: CPU_FFP */
+    socRxReasonVlanFilterMatch,    /*  1: VFP */
+    socRxReasonSampleSourceFlex,   /*  2: CPU_SFLOW_FLEX */
+    socRxReasonSampleSource,       /*  3: CPU_SFLOW_SRC */
+    socRxReasonSampleDest,         /*  4: CPU_SFLOW_DST */
+    socRxReasonL2Move,             /*  5: CPU_L2MOVE */
+    socRxReasonL2Cpu,              /*  6: CPU_L2CPU */
+    socRxReasonL3SourceMiss,       /*  7: CPU_L3SRC_MISS */
+    socRxReasonL3DestMiss,         /*  8: CPU_L3DST_MISS */
+    socRxReasonL3SourceMove,       /*  9: CPU_L3SRC_MOVE */
+    socRxReasonMcastMiss,          /* 10: CPU_MC_MISS */
+    socRxReasonIpMcastMiss,        /* 11: CPU_IPMC_MISS */
+    socRxReasonUnknownVlan,        /* 12: CPU_UVLAN */
+    socRxReasonL3HeaderError,      /* 13: CPU_L3HDR_ERR */
+    socRxReasonProtocol,           /* 14: CPU_PROTOCOL_PKT */
+    socRxReasonDosAttack,          /* 15: CPU_DOS_ATTACK */
+    socRxReasonMartianAddr,        /* 16: CPU_MARTIAN_ADDR */
+    socRxReasonTunnelError,        /* 17: CPU_TUNNEL_ERR */
+    socRxReasonL2DestMiss,         /* 18: CPU_DLF */
+    socRxReasonIcmpRedirect,       /* 19: ICMP_REDIRECT */
+    socRxReasonL3Slowpath,         /* 20: L3_SLOWPATH */
+    socRxReasonParityError,        /* 21: PARITY_ERROR */
+    socRxReasonL3MtuFail,          /* 22: L3_MTU_CHECK_FAIL */
+    socRxReasonHigigHdrError,      /* 23: HGHDR_ERROR */
+    socRxReasonMcastIdxError,      /* 24: MCIDX_ERROR */
+    socRxReasonL2SourceMiss,       /* 25: CPU_SLF */
+    socRxReasonClassBasedMove,     /* 26: CBSM_PREVENTED */
+    socRxReasonL3AddrBindFail,     /* 27: MAC_BIND_FAIL */
+    socRxReasonMplsLabelMiss,      /* 28: MPLS_LABEL_MISS */
+    socRxReasonMplsInvalidAction,  /* 29: MPLS_INVALID_ACTION */
+    socRxReasonMplsInvalidPayload, /* 30: MPLS_INVALID_PAYLOAD */
+    socRxReasonTunnelObjectValidationFail,  /* 31: TUNNEL_OBJECT_VALIDATION_FAIL */
+    socRxReasonMplsSequenceNumber, /* 32: MPLS_SEQ_NUM_FAIL */
+    socRxReasonL2NonUnicastMiss,   /* 33: PBT_NONUC_PKT */
+    socRxReasonNhop,               /* 34: L3_NEXT_HOP */
+    socRxReasonL3Cpu,              /* 35: CPU_L3CPU */
+    socRxReasonStation,            /* 36: MY_STATION */
+    socRxReasonNivPrioDrop,        /* 37: DOT1P_ADMITTANCE_DISCARD */
+    socRxReasonNivRpfFail,         /* 38: RPF_LOOKUP_MISS */
+    socRxReasonUnknownSubtendingPort, /* 39: UNKOWN SUBTENDING PORT */
+    socRxReasonTunnelAdaptLookupMiss, /* 40: TUNNEL_ADAPT_LOOKUP_MISS_DROP */
+    socRxReasonTimeSync,           /* 41: TIME_SYNC */
+    socRxReasonPacketFlowSelectMiss,  /* 42: PKT_FLOW_SELECT_MISS */
+    socRxReasonTunnelDecapEcnError,/* 43: TUNNEL_DECAP_ECN_ERROR (new) */
+    socRxReasonFailoverDrop, /* 44: PROTECTION_DATA_DROP */
+    socRxReasonPacketFlowSelect,   /* 45: PKT_FLOW_SELECT */
+    socRxReasonOtherLookupMiss,    /* 46: CPU_FORWARDING_OTHER */
+    socRxReasonInvalidTpid,        /* 47: INVALID_TPID */
+    socRxReasonMplsControlPacket,  /* 48: MPLS_CONTROL_PKT */
+    socRxReasonTunnelError,        /* 49: TUNNEL_ERROR */
+    socRxReasonTunnelTtlError,     /* 50: TUNNEL_TTL_ERR */
+#if 1
+    socRxReasonInvalid,            /* 51:NOT DEFINED */
+#endif
+    socRxReasonCongestionCnm,      /* 52: ICNM */
+    socRxReasonMplsIllegalReservedLabel, /* 53: MPLS_ILLEGAL_RESERVED_LABEL */
+    socRxReasonMplsRouterAlertLabel, /* 54: MPLS_ALERT_LABEL */
+    socRxReasonL3HeaderError,      /* 55: L3_HEADER_ERROR */
+    socRxReasonL2HeaderError,      /* 56: L2_HDR_ERROR */
+    socRxReasonTtl1,               /* 57: TTL1 */
+    socRxReasonTtl,                /* 58: TTL */
+    socRxReasonFcoeZoneCheckFail,  /* 59: FCOE_ZONE_CHECK_FAIL */
+    socRxReasonNat,                /* 60: NAT_DROP_REASON_ENCODING */
+    socRxReasonNat,                /* 61: -> */
+    socRxReasonNat,                /* 62: 3-bit */
+    socRxReasonIpmcInterfaceMismatch /* 63: CPU_IPMC_INTERFACE_MISMATCH */
+};
+
+static soc_rx_reason_t *dcb36_rx_reason_maps[] = {
+    dcb36_rx_reason_map,
+    dcb26_rx_reason_nat_encoding_map,
+    NULL
+};
+
+SETFUNCERR(36, tx_l2pbm, pbmp_t)
+SETFUNCERR(36, tx_utpbm, pbmp_t)
+SETFUNCERR(36, tx_l3pbm, pbmp_t)
+SETFUNCERR(36, tx_crc, int)
+SETFUNCERR(36, tx_cos, int)
+SETFUNCERR(36, tx_destmod, uint32)
+SETFUNCERR(36, tx_destport, uint32)
+SETFUNCERR(36, tx_opcode, uint32)
+SETFUNCERR(36, tx_srcmod, uint32)
+SETFUNCERR(36, tx_srcport, uint32)
+SETFUNCERR(36, tx_prio, uint32)
+SETFUNCERR(36, tx_pfm, uint32)
+
+GETFUNCNULL(36, stat)
+SETFUNCNULL2(36, stat)
+
+dcb_op_t dcb36_op = {
+    36,
+    sizeof(dcb36_t),
+    dcb36_rx_reason_maps,
+    dcb0_rx_reason_map_get,
+    ep_to_cpu_hdr36_rx_reasons_get,
+    dcb36_init,
+    dcb36_add_tx,
+    dcb36_add_rx,
+    dcb36_intr_info,
+    dcb36_reqcount_set,
+    dcb36_reqcount_get,
+    dcb36_xfercount_get,
+    dcb36_addr_set,
+    dcb36_addr_get,
+    dcb36_paddr_get,
+    dcb36_done_set,
+    dcb36_done_get,
+    dcb36_sg_set,
+    dcb36_sg_get,
+    dcb36_chain_set,
+    dcb36_chain_get,
+    dcb36_reload_set,
+    dcb36_reload_get,
+    dcb36_desc_intr_set,
+    dcb36_desc_intr_get,
+    dcb36_tx_l2pbm_set,
+    dcb36_tx_utpbm_set,
+    dcb36_tx_l3pbm_set,
+    dcb36_tx_crc_set,
+    dcb36_tx_cos_set,
+    dcb36_tx_destmod_set,
+    dcb36_tx_destport_set,
+    dcb36_tx_opcode_set,
+    dcb36_tx_srcmod_set,
+    dcb36_tx_srcport_set,
+    dcb36_tx_prio_set,
+    dcb36_tx_pfm_set,
+    ep_to_cpu_hdr36_rx_untagged_get,
+    ep_to_cpu_hdr36_rx_crc_get,
+    ep_to_cpu_hdr36_rx_cos_get,
+    ep_to_cpu_hdr36_rx_destmod_get,
+    ep_to_cpu_hdr36_rx_destport_get,
+    ep_to_cpu_hdr36_rx_opcode_get,
+    ep_to_cpu_hdr36_rx_classtag_get,
+    ep_to_cpu_hdr36_rx_matchrule_get,
+    dcb36_rx_start_get,
+    dcb36_rx_end_get,
+    dcb36_rx_error_get,
+    ep_to_cpu_hdr36_rx_prio_get,
+    ep_to_cpu_hdr36_rx_reason_get,
+    ep_to_cpu_hdr36_rx_reason_hi_get,
+    ep_to_cpu_hdr36_rx_ingport_get,
+    ep_to_cpu_hdr36_rx_srcport_get,
+    ep_to_cpu_hdr36_rx_srcmod_get,
+    ep_to_cpu_hdr36_rx_mcast_get,
+    ep_to_cpu_hdr36_rx_vclabel_get,
+    ep_to_cpu_hdr36_rx_mirror_get,
+    ep_to_cpu_hdr36_rx_timestamp_get,
+    ep_to_cpu_hdr36_rx_timestamp_upper_get,
+    dcb36_hg_set,
+    dcb36_hg_get,
+    dcb36_stat_set,
+    dcb36_stat_get,
+    dcb36_purge_set,
+    dcb36_purge_get,
+    ep_to_cpu_hdr36_mhp_get,
+    ep_to_cpu_hdr36_outer_vid_get,
+    ep_to_cpu_hdr36_outer_pri_get,
+    ep_to_cpu_hdr36_outer_cfi_get,
+    ep_to_cpu_hdr36_rx_outer_tag_action_get,
+    ep_to_cpu_hdr36_inner_vid_get,
+    ep_to_cpu_hdr36_inner_pri_get,
+    ep_to_cpu_hdr36_inner_cfi_get,
+    ep_to_cpu_hdr36_rx_inner_tag_action_get,
+    ep_to_cpu_hdr36_rx_bpdu_get,
+    ep_to_cpu_hdr36_rx_l3_intf_get,
+    ep_to_cpu_hdr36_rx_decap_tunnel_get,
+    ep_to_cpu_hdr36_rx_switch_drop_get,
+    ep_to_cpu_hdr36_olp_encap_oam_pkt_get,
+    dcb36_read_ecc_error_get,
+    dcb36_desc_remaining_get,
+    dcb36_desc_remaining_set,
+    dcb36_desc_status_get,
+    dcb36_desc_status_set,
+    NULL,
+};
+#endif /* BCM_TRIDENT3_SUPPORT */
+
+#if defined(BCM_HURRICANE3_SUPPORT)
+/*
+ * DCB Type 34 Support
+ */
+GETFUNCEXPR(34, rx_l3_intf, ((d->replicated) ? (d->repl_nhi) :
+        (((d->repl_nhi) & 0x7ff) + _SHR_L3_EGRESS_IDX_MIN)))
+
+dcb_op_t dcb34_op = {
+    34,
+    sizeof(dcb34_t),
+    dcb31_rx_reason_maps,
+    dcb0_rx_reason_map_get,
+    dcb0_rx_reasons_get,
+    dcb19_init,
+    dcb19_addtx,
+    dcb19_addrx,
+    dcb19_intrinfo,
+    dcb19_reqcount_set,
+    dcb19_reqcount_get,
+    dcb19_xfercount_get,
+    dcb0_addr_set,
+    dcb0_addr_get,
+    dcb0_paddr_get,
+    dcb19_done_set,
+    dcb19_done_get,
+    dcb19_sg_set,
+    dcb19_sg_get,
+    dcb19_chain_set,
+    dcb19_chain_get,
+    dcb19_reload_set,
+    dcb19_reload_get,
+    dcb19_desc_intr_set,
+    dcb19_desc_intr_get,
+    dcb19_tx_l2pbm_set,
+    dcb19_tx_utpbm_set,
+    dcb19_tx_l3pbm_set,
+    dcb19_tx_crc_set,
+    dcb19_tx_cos_set,
+    dcb19_tx_destmod_set,
+    dcb19_tx_destport_set,
+    dcb19_tx_opcode_set,
+    dcb19_tx_srcmod_set,
+    dcb19_tx_srcport_set,
+    dcb19_tx_prio_set,
+    dcb19_tx_pfm_set,
+    dcb31_rx_untagged_get,
+    dcb19_rx_crc_get,
+    dcb31_rx_cos_get,
+    dcb23_rx_destmod_get,
+    dcb23_rx_destport_get,
+    dcb23_rx_opcode_get,
+    dcb23_rx_classtag_get,
+    dcb23_rx_matchrule_get,
+    dcb19_rx_start_get,
+    dcb19_rx_end_get,
+    dcb19_rx_error_get,
+    dcb23_rx_prio_get,
+    dcb23_rx_reason_get,
+    dcb23_rx_reason_hi_get,
+    dcb23_rx_ingport_get,
+    dcb23_rx_srcport_get,
+    dcb23_rx_srcmod_get,
+    dcb23_rx_mcast_get,
+    dcb23_rx_vclabel_get,
+    dcb31_rx_mirror_get,
+    dcb23_rx_timestamp_get,
+    dcb31_rx_timestamp_upper_get,
+    dcb19_hg_set,
+    dcb19_hg_get,
+    dcb19_stat_set,
+    dcb19_stat_get,
+    dcb19_purge_set,
+    dcb19_purge_get,
+    dcb23_mhp_get,
+    dcb31_outer_vid_get,
+    dcb31_outer_pri_get,
+    dcb31_outer_cfi_get,
+    dcb31_rx_outer_tag_action_get,
+    dcb31_inner_vid_get,
+    dcb31_inner_pri_get,
+    dcb31_inner_cfi_get,
+    dcb31_rx_inner_tag_action_get,
+    dcb31_rx_bpdu_get,
+    dcb34_rx_l3_intf_get,
+    dcb19_rx_decap_tunnel_get,
+    dcb31_rx_switch_drop_get,
+    dcb23_olp_encap_oam_pkt_get,
+    dcb23_read_ecc_error_get,
+    dcb23_desc_remaining_get,
+    dcb23_desc_remaining_set,
+    dcb23_desc_status_get,
+    dcb23_desc_status_set,
+    NULL,
+};
+#endif /* BCM_HURRICANE3_SUPPORT */
+
+#if defined(BCM_GREYHOUND2_SUPPORT)
+/*
+ * DCB Type 37 Support
+ */
+/* From FORMAT CPU_OPCODES */
+static soc_rx_reason_t
+dcb37_rx_reason_map[] = {
+    socRxReasonUnknownVlan,        /* Offset 0 */
+    socRxReasonL2SourceMiss,       /* Offset 1 */
+    socRxReasonL2DestMiss,         /* Offset 2 */
+    socRxReasonL2Move,             /* Offset 3 */
+    socRxReasonL2Cpu,              /* Offset 4 */
+    socRxReasonSampleSource,       /* Offset 5 */
+    socRxReasonSampleDest,         /* Offset 6 */
+    socRxReasonL3SourceMiss,       /* Offset 7 */
+    socRxReasonL3DestMiss,         /* Offset 8 */
+    socRxReasonL3SourceMove,       /* Offset 9 */
+    socRxReasonMcastMiss,          /* Offset 10 */
+    socRxReasonIpMcastMiss,        /* Offset 11 */
+    socRxReasonFilterMatch,        /* Offset 12 */
+    socRxReasonL3HeaderError,      /* Offset 13 */
+    socRxReasonProtocol,           /* Offset 14 */
+    socRxReasonDosAttack,          /* Offset 15 */
+    socRxReasonMartianAddr,        /* Offset 16 */
+    socRxReasonTunnelError,        /* Offset 17 */
+    socRxReasonL2MtuFail,          /* Offset 18 */
+    socRxReasonIcmpRedirect,       /* Offset 19 */
+    socRxReasonL3Slowpath,         /* Offset 20 */
+    socRxReasonParityError,        /* Offset 21 */
+    socRxReasonL3MtuFail,          /* Offset 22 */
+    socRxReasonHigigHdrError,      /* Offset 23 */
+    socRxReasonMcastIdxError,      /* Offset 24 */
+    socRxReasonVlanFilterMatch,    /* Offset 25 */
+    socRxReasonClassBasedMove,     /* Offset 26 */
+    socRxReasonL2LearnLimit,       /* Offset 27 */
+    socRxReasonMplsLabelMiss,      /* Offset 28 */
+    socRxReasonMplsInvalidAction,  /* Offset 29 */
+    socRxReasonMplsInvalidPayload, /* Offset 30 */
+    socRxReasonMplsTtl,            /* Offset 31 */
+    socRxReasonMplsSequenceNumber, /* Offset 32 */
+    socRxReasonL2NonUnicastMiss,   /* Offset 33 */
+    socRxReasonNhop,               /* Offset 34 */
+    socRxReasonMplsCtrlWordError,  /* Offset 35 */
+    socRxReasonTimeSync,           /* Offset 36 */
+    socRxReasonOAMSlowpath,        /* Offset 37 */
+    socRxReasonOAMError,           /* Offset 38 */
+    socRxReasonOAMLMDM,            /* Offset 39 */
+    socRxReasonL3AddrBindFail,     /* Offset 40 */
+    socRxReasonVlanTranslate,      /* Offset 41 */
+    socRxReasonNiv,                /* Offset 42 */
+    socRxReasonNiv,                /* Offset 43 */
+    socRxReasonNiv,                /* Offset 44 */
+    socRxReasonStation,            /* Offset 45 */
+    socRxReasonL2StuFail,          /* Offset 46 */
+    socReasonSrCounterExceeded,    /* Offset 47 */
+    socRxReasonSrCopyToCpuBit0,    /* Offset 48 */
+    socRxReasonSrCopyToCpuBit1,    /* Offset 49 */
+    socRxReasonSrCopyToCpuBit2,    /* Offset 50 */
+    socRxReasonSrCopyToCpuBit3,    /* Offset 51 */
+    socRxReasonSrCopyToCpuBit4,    /* Offset 52 */
+    socRxReasonSrCopyToCpuBit5,    /* Offset 53 */
+    socRxReasonInvalid,            /* Offset 54 */
+    socRxReasonInvalid,            /* Offset 55 */
+    socRxReasonInvalid,            /* Offset 56 */
+    socRxReasonInvalid,            /* Offset 57 */
+    socRxReasonInvalid,            /* Offset 58 */
+    socRxReasonInvalid,            /* Offset 59 */
+    socRxReasonInvalid,            /* Offset 60 */
+    socRxReasonInvalid,            /* Offset 61 */
+    socRxReasonInvalid,            /* Offset 62 */
+    socRxReasonInvalid             /* Offset 63 */
+};
+static soc_rx_reason_t *dcb37_rx_reason_maps[] = {
+    dcb37_rx_reason_map,
+    NULL
+};
+
+GETFUNCEXPR(37, rx_l3_intf, ((d->replicated) ? (d->repl_nhi) :
+        (((d->repl_nhi) & 0x7ff) + _SHR_L3_EGRESS_IDX_MIN)))
+GETFUNCNULL(37, read_ecc_error)
+GETFUNCNULL(37, desc_remaining)
+SETFUNCNULL(37, desc_remaining)
+GETFUNCNULL(37, desc_status)
+SETFUNCNULL(37, desc_status)
+
+dcb_op_t dcb37_op = {
+    37,
+    sizeof(dcb37_t),
+    dcb37_rx_reason_maps,
+    dcb0_rx_reason_map_get,
+    dcb0_rx_reasons_get,
+    dcb19_init,
+    dcb19_addtx,
+    dcb19_addrx,
+    dcb19_intrinfo,
+    dcb19_reqcount_set,
+    dcb19_reqcount_get,
+    dcb19_xfercount_get,
+    dcb0_addr_set,
+    dcb0_addr_get,
+    dcb0_paddr_get,
+    dcb19_done_set,
+    dcb19_done_get,
+    dcb19_sg_set,
+    dcb19_sg_get,
+    dcb19_chain_set,
+    dcb19_chain_get,
+    dcb19_reload_set,
+    dcb19_reload_get,
+    dcb19_desc_intr_set,
+    dcb19_desc_intr_get,
+    dcb19_tx_l2pbm_set,
+    dcb19_tx_utpbm_set,
+    dcb19_tx_l3pbm_set,
+    dcb19_tx_crc_set,
+    dcb19_tx_cos_set,
+    dcb19_tx_destmod_set,
+    dcb19_tx_destport_set,
+    dcb19_tx_opcode_set,
+    dcb19_tx_srcmod_set,
+    dcb19_tx_srcport_set,
+    dcb19_tx_prio_set,
+    dcb19_tx_pfm_set,
+    dcb31_rx_untagged_get,
+    dcb19_rx_crc_get,
+    dcb31_rx_cos_get,
+    dcb23_rx_destmod_get,
+    dcb23_rx_destport_get,
+    dcb23_rx_opcode_get,
+    dcb23_rx_classtag_get,
+    dcb23_rx_matchrule_get,
+    dcb19_rx_start_get,
+    dcb19_rx_end_get,
+    dcb19_rx_error_get,
+    dcb23_rx_prio_get,
+    dcb23_rx_reason_get,
+    dcb23_rx_reason_hi_get,
+    dcb23_rx_ingport_get,
+    dcb23_rx_srcport_get,
+    dcb23_rx_srcmod_get,
+    dcb23_rx_mcast_get,
+    dcb23_rx_vclabel_get,
+    dcb31_rx_mirror_get,
+    dcb23_rx_timestamp_get,
+    dcb31_rx_timestamp_upper_get,
+    dcb19_hg_set,
+    dcb19_hg_get,
+    dcb19_stat_set,
+    dcb19_stat_get,
+    dcb19_purge_set,
+    dcb19_purge_get,
+    dcb23_mhp_get,
+    dcb31_outer_vid_get,
+    dcb31_outer_pri_get,
+    dcb31_outer_cfi_get,
+    dcb31_rx_outer_tag_action_get,
+    dcb31_inner_vid_get,
+    dcb31_inner_pri_get,
+    dcb31_inner_cfi_get,
+    dcb31_rx_inner_tag_action_get,
+    dcb31_rx_bpdu_get,
+    dcb37_rx_l3_intf_get,
+    dcb19_rx_decap_tunnel_get,
+    dcb31_rx_switch_drop_get,
+    dcb23_olp_encap_oam_pkt_get,
+    dcb37_read_ecc_error_get,
+    dcb37_desc_remaining_get,
+    dcb37_desc_remaining_set,
+    dcb37_desc_status_get,
+    dcb37_desc_status_set,
+    NULL,
+};
+#endif /* BCM_GREYHOUND2_SUPPORT */
+
+#if defined(BCM_TOMAHAWK3_SUPPORT)
+SETFUNCFIELD(38, reqcount, c_count, uint32 count, count)
+GETFUNCFIELD(38, reqcount, c_count)
+GETFUNCFIELD(38, xfercount, count)
+SETFUNCFIELD(38, done, done, int val, val ? 1 : 0)
+GETFUNCFIELD(38, done, done)
+SETFUNCFIELD(38, sg, c_sg, int val, val ? 1 : 0)
+GETFUNCFIELD(38, sg, c_sg)
+SETFUNCFIELD(38, chain, c_chain, int val, val ? 1 : 0)
+GETFUNCFIELD(38, chain, c_chain)
+SETFUNCFIELD(38, reload, c_reload, int val, val ? 1 : 0)
+GETFUNCFIELD(38, reload, c_reload)
+GETFUNCFIELD(38, rx_start, start)
+GETFUNCFIELD(38, rx_end, end)
+GETFUNCFIELD(38, rx_error, error)
+SETFUNCFIELD(38, hg, c_hg, uint32 hg, hg)
+GETFUNCFIELD(38, hg, c_hg)
+SETFUNCFIELD(38, purge, c_purge, uint32 purge, purge)
+GETFUNCFIELD(38, purge, c_purge)
+GETFUNCFIELD(38, read_ecc_error, ecc_error)
+GETFUNCFIELD(38, desc_status, c_desc_status)
+GETFUNCFIELD(38, desc_intr, c_intr)
+GETFUNCFIELD(38, desc_remaining, c_desc)
+
+GETHDRFUNCFIELD(38, rx_timestamp, timestamp)
+GETHDRFUNCFIELD(38, rx_timestamp_upper, timestamp_hi)
+GETHDRPTREXPR(38, mhp, &(h->mh0))
+GETHDRFUNCFIELD(38, outer_vid, outer_vid)
+GETHDRFUNCFIELD(38, outer_pri, outer_pri)
+GETHDRFUNCFIELD(38, outer_cfi, outer_cfi)
+GETHDRFUNCFIELD(38, rx_outer_tag_action, word3.overlay1.otag_action)
+GETHDRFUNCNULL(38, inner_vid)
+GETHDRFUNCNULL(38, inner_pri)
+GETHDRFUNCNULL(38, inner_cfi)
+GETHDRFUNCNULL(38, rx_inner_tag_action)
+GETHDRFUNCFIELD(38, rx_bpdu, word0.overlay1.bpdu)
+
+static uint32 ep_to_cpu_hdr38_rx_crc_get(void *hdr) {
+    return 0;
+}
+
+static uint32
+ep_to_cpu_hdr38_rx_untagged_get(void *hdr, int dt_mode, int ingport_is_hg)
+{
+    ep_to_cpu_hdr38_t *h = (ep_to_cpu_hdr38_t *)hdr;
+    uint32 tag_status = h->word3.overlay1.tag_status;
+
+    COMPILER_REFERENCE(dt_mode);
+    /* We have a case where though the number of bits for the
+     * tag status is 2, we support only 2 states
+     * 0 = untagged
+     * 1 = single outer-tag
+     */
+    return (ingport_is_hg ?
+            ((tag_status) ? 0 : 2) :
+            ((tag_status) ? 2 : 3));
+}
+
+static void
+ep_to_cpu_hdr38_rx_reasons_get(dcb_op_t *dcb_op, void *hdr, soc_rx_reasons_t *reasons)
+{
+    soc_rx_reason_t *map, *encoding_map;
+    uint32 opcode[2], encoding[3];
+    uint32 bit_val;
+    int word_idx, bit_idx, opcode_idx, map_idx, word_count;
+    int enc_bit = 0;
+
+    SOC_RX_REASON_CLEAR_ALL(*reasons);
+
+    opcode[0] = dcb_op->rx_reason_get(hdr);
+    opcode[1] = dcb_op->rx_reason_hi_get(hdr);
+    word_count = 2;
+    sal_memset(encoding, 0, sizeof(encoding));
+    map = dcb_op->rx_reason_maps[0];
+    for (word_idx = 0; word_idx < word_count; word_idx++) {
+        for (bit_idx = 0; bit_idx < 32; bit_idx++) {
+            opcode_idx = word_idx * 32 + bit_idx;
+            bit_val = opcode[word_idx] & (1 << bit_idx) ? 1 : 0;
+            for (map_idx = 0; ; map_idx++) {
+                encoding_map = dcb_op->rx_reason_maps[1 + map_idx];
+                if (encoding_map == NULL) {
+                    break;
+                }
+                if (map[opcode_idx] != encoding_map[0]) {
+                    continue;
+                }
+                if (opcode_idx == 0 || map[opcode_idx - 1] != encoding_map[0]) {
+                    enc_bit = 0;
+                }
+                encoding[map_idx] |= bit_val << enc_bit;
+                enc_bit++;
+                break;
+            }
+            if (encoding_map == NULL && bit_val) {
+                SOC_RX_REASON_SET(*reasons, map[opcode_idx]);
+            }
+        }
+    }
+
+    for (map_idx = 0; ; map_idx++) {
+        encoding_map = dcb_op->rx_reason_maps[1 + map_idx];
+        if (encoding_map == NULL) {
+            break;
+        }
+        if (encoding[map_idx] != socRxReasonInvalid) {
+            SOC_RX_REASON_SET(*reasons, encoding_map[encoding[map_idx]]);
+        }
+    }
+
+    /* BPDU bit should be a reason, paste it in here */
+    if (dcb_op->rx_bpdu_get(hdr)) {
+        SOC_RX_REASON_SET(*reasons, socRxReasonBpdu);
+    }
+
+    return;
+}
+
+GETHDRFUNCFIELD(38, rx_cos, word0.overlay2.cpu_cos)
+GETHDRHG2FUNCFIELD(38, rx_destmod, dst_mod)
+GETHDRHG2FUNCFIELD(38, rx_destport, dst_port)
+
+GETHDRHG2FUNCFIELD(38, rx_opcode, opcode)
+GETHDRHG2FUNCEXPR(38, rx_classtag, (h->ppd_overlay1.ppd_type != 1 ? 0 :
+                                 (h->ppd_overlay2.ctag_hi << 8) |
+                                 (h->ppd_overlay2.ctag_lo)))
+GETHDRFUNCFIELD(38, rx_matchrule, match_rule)
+GETHDRHG2FUNCFIELD(38, rx_prio, vlan_pri) /* outer_pri */
+
+static uint32
+ep_to_cpu_hdr38_rx_reason_get(void *hdr)
+{
+    ep_to_cpu_hdr38_t *h = (ep_to_cpu_hdr38_t *)hdr;
+
+    return (h->switch_pkt) ? (h->reason) : 0;
+}
+
+static uint32
+ep_to_cpu_hdr38_rx_reason_hi_get(void *hdr)
+{
+    ep_to_cpu_hdr38_t *h = (ep_to_cpu_hdr38_t *)hdr;
+
+    return (h->switch_pkt) ? (h->reason_hi) : 0;
+}
+
+GETHDRFUNCFIELD(38, rx_ingport, srcport)
+GETHDRHG2FUNCFIELD(38, rx_srcport, src_port)
+GETHDRHG2FUNCFIELD(38, rx_srcmod, src_mod)
+GETHDRHG2FUNCEXPR(38, rx_mcast, ((h->ppd_overlay1.dst_mod << 8) |
+                              (h->ppd_overlay1.dst_port)))
+GETHDRHG2FUNCEXPR(38, rx_vclabel, ((h->ppd_overlay1.vc_label_19_16 << 16) |
+                              (h->ppd_overlay1.vc_label_15_8 << 8) |
+                              (h->ppd_overlay1.vc_label_7_0)))
+GETHDRFUNCEXPR(38, rx_mirror, ((SOC_CPU_OPCODE_TYPE_IP_0 ==
+                          h->word3.overlay1.cpu_opcode_type) ?
+                          (h->reason & (1 << 17)) : 0))
+
+static _shr_rx_decap_tunnel_t dcb38_rx_decap_tunnel_map[] = {
+    _SHR_RX_DECAP_NONE,
+    _SHR_RX_DECAP_IP,
+    _SHR_RX_DECAP_L2MPLS_1LABEL,
+    _SHR_RX_DECAP_L2MPLS_2LABEL,
+    _SHR_RX_DECAP_MPLS_3LABEL,
+    _SHR_RX_DECAP_L3MPLS_1LABEL,
+    _SHR_RX_DECAP_L3MPLS_2LABEL,
+    _SHR_RX_DECAP_MPLS_3LABEL
+};
+
+static uint32 ep_to_cpu_hdr38_rx_decap_tunnel_get(void *hdr) {
+    ep_to_cpu_hdr38_t *h = (ep_to_cpu_hdr38_t *)hdr;
+    /* Check for array bounds */
+    if ( (h->decap_tunnel_type <
+    (sizeof (dcb38_rx_decap_tunnel_map) / sizeof (_shr_rx_decap_tunnel_t))) ) {
+        return (uint32)dcb38_rx_decap_tunnel_map[h->decap_tunnel_type];
+    }
+    return (uint32)_SHR_RX_DECAP_NONE;
+}
+GETHDRFUNCFIELD(38, rx_l3_intf, word3.overlay1.ing_l3_intf)
+GETHDRFUNCNULL(38, rx_switch_drop)
+GETHDRFUNCNULL(38, olp_encap_oam_pkt)
+
+static void
+dcb38_init(dcb_t *dcb)
+{
+    uint32      *d = (uint32 *)dcb;
+
+    d[0] = d[1] = d[2] = d[3] = 0;
+}
+
+static int
+dcb38_add_rx(dv_t *dv, sal_vaddr_t addr, uint32 count, uint32 flags)
+{
+    dcb38_t           *d;     /* DCB */
+    uint32            *di;    /* DCB integer pointer */
+    sal_paddr_t        paddr;
+
+    if(!addr)
+        return SOC_E_PARAM;
+
+    d = (dcb38_t *)SOC_DCB_IDX2PTR(dv->dv_unit, dv->dv_dcb, dv->dv_vcnt);
+
+    if (dv->dv_vcnt > 0) {      /* chain off previous dcb */
+        d[-1].c_chain = 1;
+    }
+
+    di = (uint32 *)d;
+    di[0] = di[1] = di[2] = di[3] = 0;
+
+    if (addr) {
+        paddr = soc_cm_l2p(dv->dv_unit, (void *)addr);
+        d->addr_lo = PTR_TO_INT(paddr);
+        d->addr_hi = (0x10000000 | PTR_HI_TO_INT(paddr));
+    }
+
+    d->c_count = count;
+    d->c_sg = 1;
+
+    dv->dv_vcnt += 1;
+    return dv->dv_cnt - dv->dv_vcnt;
+}
+
+static int
+dcb38_add_tx(dv_t *dv, sal_vaddr_t addr, uint32 count,
+            pbmp_t l2pbm, pbmp_t utpbm, pbmp_t l3pbm, uint32 flags, uint32 *hgh)
+{
+    dcb38_t           *d;     /* DCB */
+    uint32            *di;    /* DCB integer pointer */
+    sal_paddr_t       paddr;  /* Packet buffer physical address */
+
+    if(!addr)
+        return SOC_E_PARAM;
+
+    d = (dcb38_t *)SOC_DCB_IDX2PTR(dv->dv_unit, dv->dv_dcb, dv->dv_vcnt);
+
+    if (addr)
+        paddr = soc_cm_l2p(dv->dv_unit, (void *)addr);
+
+    if (dv->dv_vcnt > 0 && (dv->dv_flags & DV_F_COMBINE_DCB) &&
+        (d[-1].c_sg != 0) &&
+        ((d[-1].addr_lo + d[-1].c_count) == paddr) &&
+        (d[-1].c_count + count <= DCB_MAX_REQCOUNT)) {
+        d[-1].c_count += count;
+        return dv->dv_cnt - dv->dv_vcnt;
+    }
+
+    if (dv->dv_vcnt >= dv->dv_cnt) {
+        return SOC_E_FULL;
+    }
+    if (dv->dv_vcnt > 0) {      /* chain off previous dcb */
+        d[-1].c_chain = 1;
+    }
+
+    di = (uint32 *)d;
+    di[0] = di[1] = di[2] = di[3] = 0;
+
+    d->addr_lo = PTR_TO_INT(paddr);
+    d->addr_hi = (0x10000000 | PTR_HI_TO_INT(paddr));
+    d->c_count = count;
+    d->c_sg = 1;
+
+    d->c_purge = SOC_DMA_PURGE_GET(flags);
+
+    if (SOC_DMA_HG_GET(flags)) {
+        d->c_hg = 1;
+    }
+
+    dv->dv_vcnt += 1;
+
+    return dv->dv_cnt - dv->dv_vcnt;
+}
+
+static uint32
+dcb38_intr_info(int unit, dcb_t *dcb, int tx, uint32 *count)
+{
+    dcb38_t *d = (dcb38_t *)dcb;     /*  DCB */
+    uint32  f;                             /* SOC_DCB_INFO_* flags */
+
+    if (!d->done) {
+        return 0;
+    }
+
+    f = SOC_DCB_INFO_DONE;
+    if (tx) {
+        if (!d->c_sg) {
+            f |= SOC_DCB_INFO_PKTEND;
+        }
+    } else {
+        if (d->end) {
+            f |= SOC_DCB_INFO_PKTEND;
+        }
+    }
+
+    *count = d->count;
+    return f;
+}
+
+/* the addr related functions are the same for all dcb types */
+static void
+dcb38_addr_set(int unit, dcb_t *dcb, sal_vaddr_t addr)
+{
+    dcb38_t      *d = (dcb38_t *)dcb;     /*  DCB */
+    sal_paddr_t  paddr;
+
+    if (addr == 0) {
+        d->addr_lo = 0;
+        d->addr_hi = 0;
+    } else {
+        paddr = soc_cm_l2p(unit, (void *)addr);
+        d->addr_lo = PTR_TO_INT(paddr);
+        d->addr_hi = (0x10000000 | PTR_HI_TO_INT(paddr));
+    }
+}
+
+static sal_vaddr_t
+dcb38_addr_get(int unit, dcb_t *dcb)
+{
+    dcb38_t      *d = (dcb38_t *)dcb;     /*  DCB */
+    sal_paddr_t        paddr;
+
+#if defined(COMPILER_OVERRIDE_NO_LONGLONG) || defined(__PEDANTIC__)
+    paddr = d->addr_lo;
+#else
+    paddr = (((uint64)(d->addr_hi & ~(0x10000000)) << 32) | d->addr_lo);
+#endif
+
+    return (sal_vaddr_t)soc_cm_p2l(unit, paddr);
+}
+
+static sal_paddr_t
+dcb38_paddr_get(dcb_t *dcb)
+{
+    uint32      *d = (uint32 *)dcb;
+
+    return (sal_paddr_t)*d;
+}
+
+static void
+dcb38_desc_intr_set(dcb_t * dcb, int val)
+{
+    dcb38_t * d = (dcb38_t *)dcb;
+
+    d->c_intr = val;
+    return;
+}
+
+static uint32
+dcb38_desc_status_set(dcb_t * dcb, uint32 val)
+{
+    dcb38_t * d = (dcb38_t *)dcb;
+
+    d->c_desc_status = val;
+    return 0;
+}
+
+static uint32
+dcb38_desc_remaining_set(dcb_t * dcb, uint32 val)
+{
+    dcb38_t * d = (dcb38_t *)dcb;
+
+    d->c_desc = val;
+    return 0;
+}
+
+/*
+ * DCB Type 38 Support
+ */
+/* From FORMAT CPU_OPCODES */
+static soc_rx_reason_t
+dcb38_rx_reason_map[] = {
+    socRxReasonUnknownVlan,        /*  0: CPU_UVLAN */
+    socRxReasonL2SourceMiss,       /*  1: CPU_SLF */
+    socRxReasonL2DestMiss,         /*  2: CPU_DLF */
+    socRxReasonL2Move,             /*  3: CPU_L2MOVE */
+    socRxReasonL2Cpu,              /*  4: CPU_L2CPU */
+    socRxReasonL3SourceMiss,       /*  5: CPU_L3SRC_MISS */
+    socRxReasonL3DestMiss,         /*  6: CPU_L3DST_MISS */
+    socRxReasonL3SourceMove,       /*  7: CPU_L3SRC_MOVE */
+    socRxReasonMcastMiss,          /*  8: CPU_MC_MISS */
+    socRxReasonIpMcastMiss,        /*  9: CPU_IPMC_MISS */
+    socRxReasonFilterMatch,        /* 10: CPU_FFP */
+    socRxReasonL3HeaderError,      /* 11: CPU_L3HDR_ERR */
+    socRxReasonProtocol,           /* 12: CPU_PROTOCOL_PKT */
+    socRxReasonDosAttack,          /* 13: CPU_DOS_ATTACK */
+    socRxReasonMartianAddr,        /* 14: CPU_MARTIAN_ADDR */
+    socRxReasonTunnelError,        /* 15: CPU_TUNNEL_ERR */
+    socRxReasonSampleSourceFlex,   /* 16: CPU_SFLOW_FLEX */
+    socRxReasonSampleSourceFlex,   /* 17: CPU_SFLOW_FLEX */
+    socRxReasonIcmpRedirect,       /* 18: ICMP_REDIRECT */
+    socRxReasonL3Slowpath,         /* 19: L3_SLOWPATH */
+    socRxReasonParityError,        /* 20: PARITY_ERROR */
+    socRxReasonL3MtuFail,          /* 21: L3_MTU_CHECK_FAIL */
+    socRxReasonMcastIdxError,      /* 22: MCIDX_ERROR */
+    socRxReasonVlanFilterMatch,    /* 23: VFP */
+    socRxReasonMplsError,          /* 24: MPLS_LABEL_MISS */
+    socRxReasonMplsError,          /* 25: MPLS_INVALID_ACTION */
+    socRxReasonMplsError,          /* 26: MPLS_INVALID_PAYLOAD */
+    socRxReasonL2NonUnicastMiss,   /* 27: PBT_NONUC_PKT */
+    socRxReasonNhop,               /* 28: L3_NEXT_HOP */
+    socRxReasonStation,            /* 29: MY_STATION */
+    socRxReasonTimeSync,           /* 30: TIME_SYNC */
+    socRxReasonTunnelDecapEcnError,/* 31: TUNNEL_DECAP_ECN_ERROR (new) */
+    socRxReasonBfdSlowpath,        /* 32: BFD SLOWPATH */
+    socRxReasonBfd,                /* 33: BFD_ERROR */
+#if 1
+    socRxReasonInvalid,            /* 34:NOT DEFINED */
+#endif
+    socRxReasonMplsUnknownAch,     /* 35: MPLS_UNKNOWN_ACH_ERROR */
+    socRxReasonMplsRouterAlertLabel, /* 36: MPLS_ALERT_LABEL */
+    socRxReasonIpmcInterfaceMismatch, /* 37: CPU_IPMC_INTERFACE_MISMATCH */
+    socRxReasonDlbMonitor,         /* 38: DLB_MONITOR */
+    socRxReasonIntTurnAround,      /* 39: INBAND_TELEMETRY */
+    socRxReasonEtrapMonitor,       /* 40: ETRAP_MONITOR */
+    socRxReasonInvalid,            /* 41: Reserved */
+    socRxReasonInvalid,            /* 42: Reserved */
+    socRxReasonInvalid,            /* 43: Reserved */
+    socRxReasonInvalid,            /* 44: Reserved */
+    socRxReasonInvalid,            /* 45: Reserved */
+    socRxReasonInvalid,            /* 46: Reserved */
+    socRxReasonInvalid,            /* 47: Reserved */
+    socRxReasonInvalid,            /* 48: Reserved */
+    socRxReasonInvalid,            /* 49: Reserved */
+    socRxReasonInvalid,            /* 50: Reserved */
+    socRxReasonInvalid,            /* 51: Reserved */
+    socRxReasonInvalid,            /* 52: Reserved */
+    socRxReasonInvalid,            /* 53: Reserved */
+    socRxReasonInvalid,            /* 54: Reserved */
+    socRxReasonInvalid,            /* 55: Reserved */
+    socRxReasonInvalid,            /* 56: Reserved */
+    socRxReasonInvalid,            /* 57: Reserved */
+    socRxReasonInvalid,            /* 58: Reserved */
+    socRxReasonInvalid,            /* 59: Reserved */
+    socRxReasonInvalid,            /* 60: Reserved */
+    socRxReasonInvalid,            /* 61: Reserved */
+    socRxReasonInvalid,            /* 62: Reserved */
+    socRxReasonInvalid             /* 63: Reserved */
+};
+
+/* From CPU_SFLOW encoding from TH3 regsfile */
+static soc_rx_reason_t dcb38_rx_reason_cpu_sflow_encoding_map[] = {
+    socRxReasonSampleSourceFlex,   /* 0: NO_ERRORS
+                                    * Basefield, must match the entries above */
+    socRxReasonSampleSourceFlex,   /* 1: CPU_SFLOW_FLEX */
+    socRxReasonSampleDest,         /* 2: CPU_SFLOW_DST */
+    socRxReasonSampleSource,       /* 3: CPU_SFLOW_SRC */
+    socRxReasonInvalid,            /* Offset 4 */
+    socRxReasonInvalid,            /* Offset 5 */
+    socRxReasonInvalid,            /* Offset 6 */
+    socRxReasonInvalid,            /* Offset 7 */
+    socRxReasonInvalid,            /* Offset 8 */
+    socRxReasonInvalid,            /* Offset 9 */
+    socRxReasonInvalid,            /* Offset 10 */
+    socRxReasonInvalid,            /* Offset 11 */
+    socRxReasonInvalid,            /* Offset 12 */
+    socRxReasonInvalid,            /* Offset 13 */
+    socRxReasonInvalid,            /* Offset 14 */
+    socRxReasonInvalid,            /* Offset 15 */
+    socRxReasonInvalid,            /* Offset 16 */
+    socRxReasonInvalid,            /* Offset 17 */
+    socRxReasonInvalid,            /* Offset 18 */
+    socRxReasonInvalid,            /* Offset 19 */
+    socRxReasonInvalid,            /* Offset 20 */
+    socRxReasonInvalid,            /* Offset 21 */
+    socRxReasonInvalid,            /* Offset 22 */
+    socRxReasonInvalid,            /* Offset 23 */
+    socRxReasonInvalid,            /* Offset 24 */
+    socRxReasonInvalid,            /* Offset 25 */
+    socRxReasonInvalid,            /* Offset 26 */
+    socRxReasonInvalid,            /* Offset 27 */
+    socRxReasonInvalid,            /* Offset 28 */
+    socRxReasonInvalid,            /* Offset 29 */
+    socRxReasonInvalid,            /* Offset 30 */
+    socRxReasonInvalid,            /* Offset 31 */
+    socRxReasonInvalid,            /* Offset 32 */
+    socRxReasonInvalid,            /* Offset 33 */
+    socRxReasonInvalid,            /* Offset 34 */
+    socRxReasonInvalid,            /* Offset 35 */
+    socRxReasonInvalid,            /* Offset 36 */
+    socRxReasonInvalid,            /* Offset 37 */
+    socRxReasonInvalid,            /* Offset 38 */
+    socRxReasonInvalid,            /* Offset 39 */
+    socRxReasonInvalid,            /* Offset 40 */
+    socRxReasonInvalid,            /* Offset 41 */
+    socRxReasonInvalid,            /* Offset 42 */
+    socRxReasonInvalid,            /* Offset 43 */
+    socRxReasonInvalid,            /* Offset 44 */
+    socRxReasonInvalid,            /* Offset 45 */
+    socRxReasonInvalid,            /* Offset 46 */
+    socRxReasonInvalid,            /* Offset 47 */
+    socRxReasonInvalid,            /* Offset 48 */
+    socRxReasonInvalid,            /* Offset 49 */
+    socRxReasonInvalid,            /* Offset 50 */
+    socRxReasonInvalid,            /* Offset 51 */
+    socRxReasonInvalid,            /* Offset 52 */
+    socRxReasonInvalid,            /* Offset 53 */
+    socRxReasonInvalid,            /* Offset 54 */
+    socRxReasonInvalid,            /* Offset 55 */
+    socRxReasonInvalid,            /* Offset 56 */
+    socRxReasonInvalid,            /* Offset 57 */
+    socRxReasonInvalid,            /* Offset 58 */
+    socRxReasonInvalid,            /* Offset 59 */
+    socRxReasonInvalid,            /* Offset 60 */
+    socRxReasonInvalid,            /* Offset 61 */
+    socRxReasonInvalid,            /* Offset 62 */
+    socRxReasonInvalid             /* Offset 63 */
+};
+
+/* From MPLS_PROC_ERROR encoding in TH3 regsfile */
+static soc_rx_reason_t dcb38_rx_reason_mpls_proc_err_encoding_map[] = {
+    socRxReasonMplsError,          /* 0: NO_ERRORS
+                                    * Basefield, must match the entries above */
+    socRxReasonMplsInvalidPayload, /* 1: Invalid Payload */
+    socRxReasonMplsInvalidAction,  /* 2: Invalid Action */
+    socRxReasonMplsLabelMiss,      /* 3: Lookup Label Miss */
+    socRxReasonMplsTtl,            /* 4: TTL Check Fail */
+    socRxReasonInvalid,            /* Offset 5 */
+    socRxReasonInvalid,            /* Offset 6 */
+    socRxReasonInvalid,            /* Offset 7 */
+    socRxReasonInvalid,            /* Offset 8 */
+    socRxReasonInvalid,            /* Offset 9 */
+    socRxReasonInvalid,            /* Offset 10 */
+    socRxReasonInvalid,            /* Offset 11 */
+    socRxReasonInvalid,            /* Offset 12 */
+    socRxReasonInvalid,            /* Offset 13 */
+    socRxReasonInvalid,            /* Offset 14 */
+    socRxReasonInvalid,            /* Offset 15 */
+    socRxReasonInvalid,            /* Offset 16 */
+    socRxReasonInvalid,            /* Offset 17 */
+    socRxReasonInvalid,            /* Offset 18 */
+    socRxReasonInvalid,            /* Offset 19 */
+    socRxReasonInvalid,            /* Offset 20 */
+    socRxReasonInvalid,            /* Offset 21 */
+    socRxReasonInvalid,            /* Offset 22 */
+    socRxReasonInvalid,            /* Offset 23 */
+    socRxReasonInvalid,            /* Offset 24 */
+    socRxReasonInvalid,            /* Offset 25 */
+    socRxReasonInvalid,            /* Offset 26 */
+    socRxReasonInvalid,            /* Offset 27 */
+    socRxReasonInvalid,            /* Offset 28 */
+    socRxReasonInvalid,            /* Offset 29 */
+    socRxReasonInvalid,            /* Offset 30 */
+    socRxReasonInvalid,            /* Offset 31 */
+    socRxReasonInvalid,            /* Offset 32 */
+    socRxReasonInvalid,            /* Offset 33 */
+    socRxReasonInvalid,            /* Offset 34 */
+    socRxReasonInvalid,            /* Offset 35 */
+    socRxReasonInvalid,            /* Offset 36 */
+    socRxReasonInvalid,            /* Offset 37 */
+    socRxReasonInvalid,            /* Offset 38 */
+    socRxReasonInvalid,            /* Offset 39 */
+    socRxReasonInvalid,            /* Offset 40 */
+    socRxReasonInvalid,            /* Offset 41 */
+    socRxReasonInvalid,            /* Offset 42 */
+    socRxReasonInvalid,            /* Offset 43 */
+    socRxReasonInvalid,            /* Offset 44 */
+    socRxReasonInvalid,            /* Offset 45 */
+    socRxReasonInvalid,            /* Offset 46 */
+    socRxReasonInvalid,            /* Offset 47 */
+    socRxReasonInvalid,            /* Offset 48 */
+    socRxReasonInvalid,            /* Offset 49 */
+    socRxReasonInvalid,            /* Offset 50 */
+    socRxReasonInvalid,            /* Offset 51 */
+    socRxReasonInvalid,            /* Offset 52 */
+    socRxReasonInvalid,            /* Offset 53 */
+    socRxReasonInvalid,            /* Offset 54 */
+    socRxReasonInvalid,            /* Offset 55 */
+    socRxReasonInvalid,            /* Offset 56 */
+    socRxReasonInvalid,            /* Offset 57 */
+    socRxReasonInvalid,            /* Offset 58 */
+    socRxReasonInvalid,            /* Offset 59 */
+    socRxReasonInvalid,            /* Offset 60 */
+    socRxReasonInvalid,            /* Offset 61 */
+    socRxReasonInvalid,            /* Offset 62 */
+    socRxReasonInvalid             /* Offset 63 */
+};
+
+static soc_rx_reason_t *dcb38_rx_reason_maps[] = {
+    dcb38_rx_reason_map,
+    dcb38_rx_reason_cpu_sflow_encoding_map,
+    dcb38_rx_reason_mpls_proc_err_encoding_map,
+    NULL
+};
+
+SETFUNCERR(38, tx_l2pbm, pbmp_t)
+SETFUNCERR(38, tx_utpbm, pbmp_t)
+SETFUNCERR(38, tx_l3pbm, pbmp_t)
+SETFUNCERR(38, tx_crc, int)
+SETFUNCERR(38, tx_cos, int)
+SETFUNCERR(38, tx_destmod, uint32)
+SETFUNCERR(38, tx_destport, uint32)
+SETFUNCERR(38, tx_opcode, uint32)
+SETFUNCERR(38, tx_srcmod, uint32)
+SETFUNCERR(38, tx_srcport, uint32)
+SETFUNCERR(38, tx_prio, uint32)
+SETFUNCERR(38, tx_pfm, uint32)
+
+GETFUNCNULL(38, stat)
+SETFUNCNULL2(38, stat)
+
+dcb_op_t dcb38_op = {
+    38,
+    sizeof(dcb38_t),
+    dcb38_rx_reason_maps,
+    dcb0_rx_reason_map_get,
+    ep_to_cpu_hdr38_rx_reasons_get,
+    dcb38_init,
+    dcb38_add_tx,
+    dcb38_add_rx,
+    dcb38_intr_info,
+    dcb38_reqcount_set,
+    dcb38_reqcount_get,
+    dcb38_xfercount_get,
+    dcb38_addr_set,
+    dcb38_addr_get,
+    dcb38_paddr_get,
+    dcb38_done_set,
+    dcb38_done_get,
+    dcb38_sg_set,
+    dcb38_sg_get,
+    dcb38_chain_set,
+    dcb38_chain_get,
+    dcb38_reload_set,
+    dcb38_reload_get,
+    dcb38_desc_intr_set,
+    dcb38_desc_intr_get,
+    dcb38_tx_l2pbm_set,
+    dcb38_tx_utpbm_set,
+    dcb38_tx_l3pbm_set,
+    dcb38_tx_crc_set,
+    dcb38_tx_cos_set,
+    dcb38_tx_destmod_set,
+    dcb38_tx_destport_set,
+    dcb38_tx_opcode_set,
+    dcb38_tx_srcmod_set,
+    dcb38_tx_srcport_set,
+    dcb38_tx_prio_set,
+    dcb38_tx_pfm_set,
+    ep_to_cpu_hdr38_rx_untagged_get,
+    ep_to_cpu_hdr38_rx_crc_get,
+    ep_to_cpu_hdr38_rx_cos_get,
+    ep_to_cpu_hdr38_rx_destmod_get,
+    ep_to_cpu_hdr38_rx_destport_get,
+    ep_to_cpu_hdr38_rx_opcode_get,
+    ep_to_cpu_hdr38_rx_classtag_get,
+    ep_to_cpu_hdr38_rx_matchrule_get,
+    dcb38_rx_start_get,
+    dcb38_rx_end_get,
+    dcb38_rx_error_get,
+    ep_to_cpu_hdr38_rx_prio_get,
+    ep_to_cpu_hdr38_rx_reason_get,
+    ep_to_cpu_hdr38_rx_reason_hi_get,
+    ep_to_cpu_hdr38_rx_ingport_get,
+    ep_to_cpu_hdr38_rx_srcport_get,
+    ep_to_cpu_hdr38_rx_srcmod_get,
+    ep_to_cpu_hdr38_rx_mcast_get,
+    ep_to_cpu_hdr38_rx_vclabel_get,
+    ep_to_cpu_hdr38_rx_mirror_get,
+    ep_to_cpu_hdr38_rx_timestamp_get,
+    ep_to_cpu_hdr38_rx_timestamp_upper_get,
+    dcb38_hg_set,
+    dcb38_hg_get,
+    dcb38_stat_set,
+    dcb38_stat_get,
+    dcb38_purge_set,
+    dcb38_purge_get,
+    ep_to_cpu_hdr38_mhp_get,
+    ep_to_cpu_hdr38_outer_vid_get,
+    ep_to_cpu_hdr38_outer_pri_get,
+    ep_to_cpu_hdr38_outer_cfi_get,
+    ep_to_cpu_hdr38_rx_outer_tag_action_get,
+    ep_to_cpu_hdr38_inner_vid_get,
+    ep_to_cpu_hdr38_inner_pri_get,
+    ep_to_cpu_hdr38_inner_cfi_get,
+    ep_to_cpu_hdr38_rx_inner_tag_action_get,
+    ep_to_cpu_hdr38_rx_bpdu_get,
+    ep_to_cpu_hdr38_rx_l3_intf_get,
+    ep_to_cpu_hdr38_rx_decap_tunnel_get,
+    ep_to_cpu_hdr38_rx_switch_drop_get,
+    ep_to_cpu_hdr38_olp_encap_oam_pkt_get,
+    dcb38_read_ecc_error_get,
+    dcb38_desc_remaining_get,
+    dcb38_desc_remaining_set,
+    dcb38_desc_status_get,
+    dcb38_desc_status_set,
+    NULL,
+};
+#endif /* BCM_TOMAHAWK3_SUPPORT */
+
+#endif /* defined(BCM_ESW_SUPPORT) */
+
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/genl-packet/Makefile b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/genl-packet/Makefile
new file mode 100644
index 000000000..46e907c4a
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/genl-packet/Makefile
@@ -0,0 +1,96 @@
+# -*- Makefile -*-
+# $Id: Makefile,v 1.3 Broadcom SDK $
+# $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+# 
+# Permission is granted to use, copy, modify and/or distribute this
+# software under either one of the licenses below.
+# 
+# License Option 1: GPL
+# 
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License, version 2, as
+# published by the Free Software Foundation (the "GPL").
+# 
+# This program is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+# General Public License version 2 (GPLv2) for more details.
+# 
+# You should have received a copy of the GNU General Public License
+# version 2 (GPLv2) along with this source code.
+# 
+# 
+# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
+# 
+# This software is governed by the Broadcom Open Network Switch APIs license:
+# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+# 
+#
+LOCALDIR = systems/linux/kernel/modules/genl-packet
+
+include ${SDK}/make/Make.config
+
+LIBS =
+
+CFLAGS += -I${SDK}/systems/linux/kernel/modules/include/kernel
+
+KERNEL_MODULE_DIR = kernel_module
+
+THIS_MOD_NAME := genl-packet
+MODULE = $(LIBDIR)/$(THIS_MOD_NAME).o
+KMODULE = $(LIBDIR)/$(THIS_MOD_NAME).ko
+
+# BCM Network Device
+
+ifeq (1,$(NO_PRECOMPILED_MODULE))
+# {
+#
+# These are the objects which need to be compiled, in the kernel, to
+# created the module object file.
+#
+SRCS_COMPOSING = genl-packet.c
+OBJECTS_COMPOSING = genl-packet.o
+#
+# Note that for NO_PRECOMPILED_MODULE, the subdirectory  'systems/linux/kernel/modules/genl-packet/kernel_module'
+# is not created and all action is done in systems/linux/kernel/modules/genl-packet
+#
+
+build: $(KMODULE)
+
+$(KMODULE): $(SRCS_COMPOSING)
+	rm -fr $(BLDDIR)/$(KERNEL_MODULE_DIR)
+	rm -f $(BLDDIR)/*.c
+	rm -f $(BLDDIR)/*.o
+	rm -f $(BLDDIR)/*.ko
+	cp ${SDK}/make/Makefile.linux-kmodule $(BLDDIR)/Makefile
+	cp ./*.c $(BLDDIR)/
+	MOD_OBJS=$(OBJECTS_COMPOSING) MOD_NAME=$(THIS_MOD_NAME) $(MAKE) -C $(BLDDIR) $(THIS_MOD_NAME).ko LOC_BLDDIR=$(BLDDIR) LOC_SRCDIR=$(PWD)
+# }
+else
+# {
+build: $(MODULE) $(KMODULE)
+#
+# This is for the compilation of the 'precompiled' object. We keep it
+# here for compatibility.
+#
+$(MODULE): $(BLDDIR)/.tree $(BOBJS) $(LIBS)
+	$(LD) $(MODULE_LDFLAGS) -r -d $(BOBJS) $(LIBS) -o $@
+
+$(KMODULE): $(MODULE)
+	rm -fr $(BLDDIR)/$(KERNEL_MODULE_DIR)
+	mkdir $(BLDDIR)/$(KERNEL_MODULE_DIR)
+	cp ${SDK}/make/Makefile.linux-kmodule $(BLDDIR)/$(KERNEL_MODULE_DIR)/Makefile
+	MOD_NAME=$(THIS_MOD_NAME) $(MAKE) -C $(BLDDIR)/$(KERNEL_MODULE_DIR) $(THIS_MOD_NAME).ko
+# }
+endif
+
+# Make.depend is before clean:: so that Make.depend's clean:: runs first.
+
+include ${SDK}/make/Make.depend
+
+clean::
+	$(RM) $(BLDDIR)/version.c $(BLDDIR)/version.o
+	$(RM) $(BOBJS) $(MODULE)
+
+.PHONY: build
+
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/genl-packet/genl-packet.c b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/genl-packet/genl-packet.c
new file mode 100644
index 000000000..141edc6d7
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/genl-packet/genl-packet.c
@@ -0,0 +1,118 @@
+/*
+ * net/genl-packet/genl-packet.c - Netlink channel for general packetIO
+ * Copyright (c) 2021 Google, based on psample.c (originally written by
+ * Yotam Gigi <yotamg@mellanox.com>)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <lkm.h>
+#include <linux/skbuff.h>
+#include <net/genetlink.h>
+#include <net/genl-packet.h>
+
+#define GENL_PACKET_MAX_PACKET_SIZE 0xffff
+
+/* multicast groups */
+enum genl_packet_multicast_groups {
+	GENL_PACKET_MCGRP_PACKET,
+};
+
+static const struct genl_multicast_group genl_packet_mcgrps[] = {
+	[GENL_PACKET_MCGRP_PACKET] = { .name = GENL_PACKET_MCGRP_NAME },
+};
+
+static struct genl_family genl_packet_family = {
+	.name		= GENL_PACKET_NAME,
+	.version	= GENL_PACKET_VERSION,
+	.maxattr	= GENL_PACKET_ATTR_MAX,
+	.netnsok	= true,
+	.module		= THIS_MODULE,
+	.mcgrps		= genl_packet_mcgrps,
+	.n_mcgrps	= ARRAY_SIZE(genl_packet_mcgrps),
+};
+
+void genl_packet_send_packet(struct net *net, struct sk_buff *skb,
+					  int in_ifindex, int out_ifindex, unsigned int context)
+{
+	struct sk_buff *nl_skb;
+	int data_len;
+	int meta_len;
+	void *data;
+	int ret;
+
+    /* Metalength is sum of netlink message sizes of in_ifindex + out_ifindex +
+     * context */
+	meta_len = nla_total_size(sizeof(s16)) +
+             nla_total_size(sizeof(s16)) +
+             nla_total_size(sizeof(u32));
+
+	data_len = skb->len;
+	if (meta_len + nla_total_size(data_len) > GENL_PACKET_MAX_PACKET_SIZE)
+		data_len = GENL_PACKET_MAX_PACKET_SIZE - meta_len - NLA_HDRLEN
+			    - NLA_ALIGNTO;
+	if (data_len <= 0)
+		return;
+
+	nl_skb = genlmsg_new(meta_len + nla_total_size(data_len), GFP_ATOMIC);
+	if (unlikely(!nl_skb))
+		return;
+
+	data = genlmsg_put(nl_skb, 0, 0, &genl_packet_family, 0,
+			   GENL_PACKET_CMD_PACKET);
+	if (unlikely(!data))
+		goto error;
+
+	ret = nla_put_s16(nl_skb, GENL_PACKET_ATTR_IIFINDEX, in_ifindex);
+	if (unlikely(ret < 0))
+		goto error;
+
+	ret = nla_put_s16(nl_skb, GENL_PACKET_ATTR_OIFINDEX, out_ifindex);
+	if (unlikely(ret < 0))
+		goto error;
+
+	ret = nla_put_u32(nl_skb, GENL_PACKET_ATTR_CONTEXT, context);
+	if (unlikely(ret < 0))
+		goto error;
+
+	if (data_len > 0) {
+		int nla_len = nla_total_size(data_len);
+		struct nlattr *nla;
+
+		nla = (struct nlattr *)skb_put(nl_skb, nla_len);
+		nla->nla_type = GENL_PACKET_ATTR_DATA;
+		nla->nla_len = nla_attr_size(data_len);
+
+		if (skb_copy_bits(skb, 0, nla_data(nla), data_len))
+			goto error;
+	}
+
+	genlmsg_end(nl_skb, data);
+	genlmsg_multicast_netns(&genl_packet_family, net, nl_skb, 0,
+				GENL_PACKET_MCGRP_PACKET, GFP_ATOMIC);
+
+	return;
+error:
+	pr_err_ratelimited("Could not create genl_packet message\n");
+	nlmsg_free(nl_skb);
+}
+EXPORT_SYMBOL_GPL(genl_packet_send_packet);
+
+static int __init genl_packet_module_init(void)
+{
+	return genl_register_family(&genl_packet_family);
+}
+
+static void __exit genl_packet_module_exit(void)
+{
+	genl_unregister_family(&genl_packet_family);
+}
+
+module_init(genl_packet_module_init);
+module_exit(genl_packet_module_exit);
+
+MODULE_AUTHOR("Google");
+MODULE_DESCRIPTION("netlink channel for genl_packet");
+MODULE_LICENSE("GPL v2");
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/include/bcm-knet.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/include/bcm-knet.h
index 003495364..849470d8c 100644
--- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/include/bcm-knet.h
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/include/bcm-knet.h
@@ -1,5 +1,6 @@
 /*
- * Copyright 2007-2020 Broadcom Inc. All rights reserved.
+ * $Id: bcm-knet.h,v 1.4 Broadcom SDK $
+ * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
  * 
  * Permission is granted to use, copy, modify and/or distribute this
  * software under either one of the licenses below.
@@ -22,12 +23,8 @@
  * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
  * 
  * This software is governed by the Broadcom Open Network Switch APIs license:
- * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa
- */
-/*
- * $Id: bcm-knet.h,v 1.4 Broadcom SDK $
- * $Copyright: (c) 2005 Broadcom Corp.
- * All Rights Reserved.$
+ * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+ * 
  */
 #ifndef __LINUX_BCM_KNET_H__
 #define __LINUX_BCM_KNET_H__
@@ -50,8 +47,6 @@ typedef struct  {
  * Call-back interfaces for other Linux kernel drivers.
  */
 #include <linux/skbuff.h>
-#include <linux/netdevice.h>
-#include <kcom.h>
 
 typedef struct {
     uint32 netif_user_data;
@@ -67,6 +62,9 @@ typedef struct {
 typedef struct sk_buff *
 (*knet_skb_cb_f)(struct sk_buff *skb, int dev_no, void *meta);
 
+typedef int
+(*knet_netif_cb_f)(struct net_device *dev, int dev_no, kcom_netif_t *netif);
+
 typedef int
 (*knet_filter_cb_f)(uint8_t *pkt, int size, int dev_no, void *meta,
                     int chan, kcom_filter_t *filter);
@@ -92,6 +90,9 @@ typedef int
 typedef int
 (*knet_hw_tstamp_ioctl_cmd_cb_f)(kcom_msg_clock_cmd_t *kmsg, int len, int dcb_type);
 
+typedef int
+(*knet_hw_tstamp_ptp_transport_get_cb_f)(uint8_t *pkt);
+
 extern int
 bkn_rx_skb_cb_register(knet_skb_cb_f rx_cb);
 
@@ -104,9 +105,24 @@ bkn_tx_skb_cb_register(knet_skb_cb_f tx_cb);
 extern int
 bkn_tx_skb_cb_unregister(knet_skb_cb_f tx_cb);
 
+extern int
+bkn_netif_create_cb_register(knet_netif_cb_f netif_cb);
+
+extern int
+bkn_netif_create_cb_unregister(knet_netif_cb_f netif_cb);
+
+extern int
+bkn_netif_destroy_cb_register(knet_netif_cb_f netif_cb);
+
+extern int
+bkn_netif_destroy_cb_unregister(knet_netif_cb_f netif_cb);
+
 extern int
 bkn_filter_cb_register(knet_filter_cb_f filter_cb);
 
+extern int
+bkn_filter_cb_register_by_name(knet_filter_cb_f filter_cb, char *filter_name);
+
 extern int
 bkn_filter_cb_unregister(knet_filter_cb_f filter_cb);
 
@@ -157,31 +173,16 @@ bkn_hw_tstamp_ioctl_cmd_cb_register(knet_hw_tstamp_ioctl_cmd_cb_f hw_tstamp_ioct
 
 extern int
 bkn_hw_tstamp_ioctl_cmd_cb_unregister(knet_hw_tstamp_ioctl_cmd_cb_f hw_tstamp_ioctl_cmd_cb);
-typedef struct {
-    uint8 cmic_type;
-    uint8 dcb_type;
-    uint8 dcb_size;
-    uint8 pkt_hdr_size;
-    uint32 cdma_channels;
-} knet_hw_info_t;
-
-extern int
-bkn_hw_info_get(int unit, knet_hw_info_t *hw_info);
-
-typedef int
-(*knet_netif_cb_f)(int unit, kcom_netif_t *netif, struct net_device *dev);
 
 extern int
-bkn_netif_create_cb_register(knet_netif_cb_f netif_cb);
+bkn_hw_tstamp_ptp_transport_get_cb_register(knet_hw_tstamp_ptp_transport_get_cb_f hw_tstamp_ptp_transport_get_cb);
 
 extern int
-bkn_netif_create_cb_unregister(knet_netif_cb_f netif_cb);
+bkn_hw_tstamp_ptp_transport_get_cb_unregister(knet_hw_tstamp_ptp_transport_get_cb_f hw_tstamp_ptp_transport_get_cb);
 
 extern int
-bkn_netif_destroy_cb_register(knet_netif_cb_f netif_cb);
+bkn_hw_device_get(int dev_no, uint16_t *dev_id, uint8_t *rev_id);
 
-extern int
-bkn_netif_destroy_cb_unregister(knet_netif_cb_f netif_cb);
 #endif
 
 #endif /* __LINUX_BCM_KNET_H__ */
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/include/gmodule.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/include/gmodule.h
index a9db097f3..66fd0211e 100644
--- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/include/gmodule.h
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/include/gmodule.h
@@ -1,5 +1,6 @@
 /*
- * Copyright 2007-2020 Broadcom Inc. All rights reserved.
+ * $Id: gmodule.h,v 1.9 Broadcom SDK $
+ * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
  * 
  * Permission is granted to use, copy, modify and/or distribute this
  * software under either one of the licenses below.
@@ -22,12 +23,8 @@
  * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
  * 
  * This software is governed by the Broadcom Open Network Switch APIs license:
- * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa
- */
-/*
- * $Id: gmodule.h,v 1.9 Broadcom SDK $
- * $Copyright: (c) 2005 Broadcom Corp.
- * All Rights Reserved.$
+ * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+ * 
  */
 
 #ifndef __COMMON_LINUX_KRN_GMODULE_H__
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/include/kernel/README b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/include/kernel/README
new file mode 100644
index 000000000..95678d22b
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/include/kernel/README
@@ -0,0 +1,8 @@
+This directory is mainly for the header files which are planned
+for upstreaming to the mainline kernels.
+The header files can be placed in the simulated kernel include path
+created in this directory.
+
+The directory (include/kernel) can be added to the include path (-I)
+when compiling the associated source files such that the standard Linux path
+can be used in the source files.
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/include/kernel/net/genl-packet.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/include/kernel/net/genl-packet.h
new file mode 100644
index 000000000..48db3895d
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/include/kernel/net/genl-packet.h
@@ -0,0 +1,9 @@
+#ifndef __NET_GENL_PACKET_H
+#define __NET_GENL_PACKET_H
+
+#include <uapi/linux/genl-packet.h>
+
+extern void genl_packet_send_packet(struct net *net, struct sk_buff *skb,
+							 int in_ifindex, int out_ifindex, unsigned int context);
+
+#endif /* __NET_GENL_PACKET_H */
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/include/kernel/uapi/linux/genl-packet.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/include/kernel/uapi/linux/genl-packet.h
new file mode 100644
index 000000000..9945118a4
--- /dev/null
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/include/kernel/uapi/linux/genl-packet.h
@@ -0,0 +1,25 @@
+#ifndef __UAPI_GENL_PACKET_H
+#define __UAPI_GENL_PACKET_H
+
+enum {
+	/* packet metadata */
+	GENL_PACKET_ATTR_IIFINDEX,
+	GENL_PACKET_ATTR_OIFINDEX,
+	GENL_PACKET_ATTR_CONTEXT,
+	GENL_PACKET_ATTR_DATA,
+
+	__GENL_PACKET_ATTR_MAX
+};
+
+enum genl_packet_command {
+	GENL_PACKET_CMD_PACKET,
+};
+
+/* Can be overridden at runtime by module option */
+#define GENL_PACKET_ATTR_MAX (__GENL_PACKET_ATTR_MAX - 1)
+
+#define GENL_PACKET_MCGRP_NAME "packets"
+#define GENL_PACKET_NAME "genl_packet"
+#define GENL_PACKET_VERSION 1
+
+#endif
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/include/lkm.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/include/lkm.h
index 7a749a40a..cf117eb65 100644
--- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/include/lkm.h
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/include/lkm.h
@@ -1,5 +1,6 @@
 /*
- * Copyright 2007-2020 Broadcom Inc. All rights reserved.
+ * $Id: lkm.h,v 1.22 Broadcom SDK $
+ * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
  * 
  * Permission is granted to use, copy, modify and/or distribute this
  * software under either one of the licenses below.
@@ -22,12 +23,8 @@
  * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
  * 
  * This software is governed by the Broadcom Open Network Switch APIs license:
- * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa
- */
-/*
- * $Id: lkm.h,v 1.22 Broadcom SDK $
- * $Copyright: (c) 2005 Broadcom Corp.
- * All Rights Reserved.$
+ * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+ * 
  */
 
 #ifndef __COMMON_LINUX_KRN_LKM_H__
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/knet-cb/Makefile b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/knet-cb/Makefile
index 79223a372..c8d629ac1 100644
--- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/knet-cb/Makefile
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/knet-cb/Makefile
@@ -1,33 +1,30 @@
-#
-#  Copyright 2007-2020 Broadcom Inc. All rights reserved.
-#  
-#  Permission is granted to use, copy, modify and/or distribute this
-#  software under either one of the licenses below.
-#  
-#  License Option 1: GPL
-#  
-#  This program is free software; you can redistribute it and/or modify
-#  it under the terms of the GNU General Public License, version 2, as
-#  published by the Free Software Foundation (the "GPL").
-#  
-#  This program is distributed in the hope that it will be useful, but
-#  WITHOUT ANY WARRANTY; without even the implied warranty of
-#  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
-#  General Public License version 2 (GPLv2) for more details.
-#  
-#  You should have received a copy of the GNU General Public License
-#  version 2 (GPLv2) along with this source code.
-#  
-#  
-#  License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
-#  
-#  This software is governed by the Broadcom Open Network Switch APIs license:
-#  https://www.broadcom.com/products/ethernet-connectivity/software/opennsa
-#
 # -*- Makefile -*-
 # $Id: Makefile,v 1.3 Broadcom SDK $
-# $Copyright: (c) 2005 Broadcom Corp.
-# All Rights Reserved.$
+# $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+# 
+# Permission is granted to use, copy, modify and/or distribute this
+# software under either one of the licenses below.
+# 
+# License Option 1: GPL
+# 
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License, version 2, as
+# published by the Free Software Foundation (the "GPL").
+# 
+# This program is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+# General Public License version 2 (GPLv2) for more details.
+# 
+# You should have received a copy of the GNU General Public License
+# version 2 (GPLv2) along with this source code.
+# 
+# 
+# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
+# 
+# This software is governed by the Broadcom Open Network Switch APIs license:
+# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+# 
 #
 LOCALDIR = systems/linux/kernel/modules/knet-cb
 
@@ -35,6 +32,18 @@ include ${SDK}/make/Make.config
 
 LIBS = $(LIBDIR)/libkern.a
 
+ifeq (1,$(BUILD_DCBLIB))
+ifndef DCBDIR
+DCBDIR = $(SDK)/systems/linux/kernel/modules/dcb
+# $(error 'The $$DCBDIR variable is not set')
+endif
+ifeq (1,$(NO_PRECOMPILED_MODULE))
+$(error 'DCB_LIB build is not supported if NO_PRECOMPILED_MODULE=1')
+endif
+LIBS += $(LIBDIR)/libdcb.a
+CFLAGS += -DDCBLIB_SUPPORT -I$(DCBDIR)/include
+endif
+
 KERNEL_MODULE_DIR = kernel_module
 
 THIS_MOD_NAME := linux-knet-cb
@@ -85,6 +94,11 @@ build: $(MODULE) $(KMODULE)
 # This is for the compilation of the 'precompiled' object. We keep it
 # here for compatibility.
 #
+$(LIBDIR)/libdcb.a:
+	$(MAKE) -C $(DCBDIR)/make BLDDIR=$(LIBDIR) \
+		KADD_CFLAGS="-I${SDK}/systems/linux/kernel/modules/include $(KFLAGS) -D$(ENDIAN)" \
+		CROSS_COMPILE=$(CROSS_COMPILE)
+
 $(MODULE): $(BLDDIR)/.tree $(BOBJS) $(LIBS)
 	$(LD) $(MODULE_LDFLAGS) -r -d $(BOBJS) $(LIBS) -o $@
 
@@ -104,5 +118,8 @@ include ${SDK}/make/Make.depend
 clean::
 	$(RM) $(BLDDIR)/version.c $(BLDDIR)/version.o
 	$(RM) $(BOBJS) $(MODULE)
+ifeq (1,$(BUILD_DCBLIB))
+	$(MAKE) -C $(DCBDIR)/make BLDDIR=$(LIBDIR) clean
+endif
 
 .PHONY: build
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/knet-cb/knet-cb.c b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/knet-cb/knet-cb.c
index 89428e072..4aebc6a0d 100644
--- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/knet-cb/knet-cb.c
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/knet-cb/knet-cb.c
@@ -45,11 +45,6 @@
 #include <bcm-knet.h>
 #include <linux/if_vlan.h>
 
-/* Enable sflow sampling using psample */
-#ifdef PSAMPLE_SUPPORT
-#include "psample-cb.h"
-#endif
-
 MODULE_AUTHOR("Broadcom Corporation");
 MODULE_DESCRIPTION("Broadcom Linux KNET Call-Back Driver");
 MODULE_LICENSE("GPL");
@@ -343,7 +338,8 @@ knet_filter_cb(uint8_t * pkt, int size, int dev_no, void *meta,
 }
 
 static int
-knet_netif_create_cb(int unit, kcom_netif_t *netif, struct net_device *dev)
+/*knet_netif_create_cb(int unit, kcom_netif_t *netif, struct net_device *dev)*/
+knet_netif_create_cb(struct net_device *dev, int unit, kcom_netif_t *netif)
 {
     int retv = 0;
 #ifdef PSAMPLE_SUPPORT
@@ -353,7 +349,8 @@ knet_netif_create_cb(int unit, kcom_netif_t *netif, struct net_device *dev)
 }
 
 static int
-knet_netif_destroy_cb(int unit, kcom_netif_t *netif, struct net_device *dev)
+/*knet_netif_destroy_cb(int unit, kcom_netif_t *netif, struct net_device *dev)*/
+knet_netif_destroy_cb(struct net_device *dev, int unit, kcom_netif_t *netif)
 {
     int retv = 0;
 #ifdef PSAMPLE_SUPPORT
@@ -361,41 +358,7 @@ knet_netif_destroy_cb(int unit, kcom_netif_t *netif, struct net_device *dev)
 #endif
     return retv;
 }
-#else
-static int
-knet_filter_cb(uint8_t * pkt, int size, int dev_no, void *meta,
-                     int chan, kcom_filter_t *kf)
-{
-    /* check for filter callback handler */
-#ifdef PSAMPLE_SUPPORT
-    if (strncmp(kf->desc, PSAMPLE_CB_NAME, KCOM_FILTER_DESC_MAX) == 0) {
-        return psample_filter_cb (pkt, size, dev_no, meta, chan, kf);
-    }
-#endif
-    return strip_tag_filter_cb (pkt, size, dev_no, meta, chan, kf);
-}
-
-static int
-knet_netif_create_cb(int unit, kcom_netif_t *netif, struct net_device *dev)
-{
-    int retv = 0;
-#ifdef PSAMPLE_SUPPORT
-    retv = psample_netif_create_cb(unit, netif, dev);
 #endif
-    return retv;
-}
-
-static int
-knet_netif_destroy_cb(int unit, kcom_netif_t *netif, struct net_device *dev)
-{
-    int retv = 0;
-#ifdef PSAMPLE_SUPPORT
-    retv = psample_netif_destroy_cb(unit, netif, dev);
-#endif
-    return retv;
-}
-#endif
-
 /*
  * Get statistics.
  * % cat /proc/linux-knet-cb
@@ -423,13 +386,6 @@ _cleanup(void)
         bkn_tx_skb_cb_unregister(strip_tag_tx_cb);
     }
 
-    bkn_filter_cb_unregister(knet_filter_cb);
-    bkn_netif_create_cb_unregister(knet_netif_create_cb);
-    bkn_netif_destroy_cb_unregister(knet_netif_destroy_cb);
-
-#ifdef PSAMPLE_SUPPORT
-    psample_cleanup();
-#endif
     return 0;
 }
 
@@ -445,13 +401,6 @@ _init(void)
         bkn_tx_skb_cb_register(strip_tag_tx_cb);
     }
 
-#ifdef PSAMPLE_SUPPORT
-    psample_init();
-#endif
-    bkn_filter_cb_register(knet_filter_cb);
-    bkn_netif_create_cb_register(knet_netif_create_cb);
-    bkn_netif_destroy_cb_register(knet_netif_destroy_cb);
-
     return 0;
 }
 
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/knet-cb/psample-cb.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/knet-cb/psample-cb.h
deleted file mode 100644
index 40408819e..000000000
--- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/knet-cb/psample-cb.h
+++ /dev/null
@@ -1,58 +0,0 @@
-/*
- * Copyright 2017 Broadcom
- * 
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License, version 2, as
- * published by the Free Software Foundation (the "GPL").
- * 
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License version 2 (GPLv2) for more details.
- * 
- * You should have received a copy of the GNU General Public License
- * version 2 (GPLv2) along with this source code.
- */
-/*
- * $Id: psample_cb.h $
- * $Copyright: (c) 2019 Broadcom Corp.
- * All Rights Reserved.$
- */
-#ifndef __PSAMPLE_CB_H__
-#define __PSAMPLE_CB_H__
-
-#include <gmodule.h>
-#include <kcom.h>
-#include <linux/netdevice.h>
-
-#define PSAMPLE_CB_NAME "psample"
-
-extern int
-psample_init(void);
-
-extern int
-psample_cleanup(void);
-
-extern int
-psample_filter_cb(uint8_t * pkt, int size, int dev_no, void *pkt_meta,
-                  int chan, kcom_filter_t *kf);
-
-/* psample data per interface */
-typedef struct {
-    struct list_head list;
-    struct net_device *dev;
-    uint16 id;
-    uint16 port;
-    uint16 vlan;
-    uint16 qnum;
-    uint32 sample_rate;
-    uint32 sample_size;
-} psample_netif_t;
-
-extern int
-psample_netif_create_cb(int unit, kcom_netif_t *netif, struct net_device *dev);
-
-extern int
-psample_netif_destroy_cb(int unit, kcom_netif_t *netif, struct net_device *dev);
-
-#endif /* __PSAMPLE_CB_H__ */
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/shared/Makefile b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/shared/Makefile
index 966f639f6..b5106a586 100644
--- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/shared/Makefile
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/shared/Makefile
@@ -1,33 +1,30 @@
-#
-#  Copyright 2007-2020 Broadcom Inc. All rights reserved.
-#  
-#  Permission is granted to use, copy, modify and/or distribute this
-#  software under either one of the licenses below.
-#  
-#  License Option 1: GPL
-#  
-#  This program is free software; you can redistribute it and/or modify
-#  it under the terms of the GNU General Public License, version 2, as
-#  published by the Free Software Foundation (the "GPL").
-#  
-#  This program is distributed in the hope that it will be useful, but
-#  WITHOUT ANY WARRANTY; without even the implied warranty of
-#  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
-#  General Public License version 2 (GPLv2) for more details.
-#  
-#  You should have received a copy of the GNU General Public License
-#  version 2 (GPLv2) along with this source code.
-#  
-#  
-#  License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
-#  
-#  This software is governed by the Broadcom Open Network Switch APIs license:
-#  https://www.broadcom.com/products/ethernet-connectivity/software/opennsa
-#
 # -*- Makefile -*-
 # $Id: Makefile,v 1.2 Broadcom SDK $
-# $Copyright: (c) 2005 Broadcom Corp.
-# All Rights Reserved.$
+# $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+# 
+# Permission is granted to use, copy, modify and/or distribute this
+# software under either one of the licenses below.
+# 
+# License Option 1: GPL
+# 
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License, version 2, as
+# published by the Free Software Foundation (the "GPL").
+# 
+# This program is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+# General Public License version 2 (GPLv2) for more details.
+# 
+# You should have received a copy of the GNU General Public License
+# version 2 (GPLv2) along with this source code.
+# 
+# 
+# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
+# 
+# This software is governed by the Broadcom Open Network Switch APIs license:
+# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+# 
 #
 LOCALDIR = systems/linux/kernel/modules/shared
 
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/shared/gmodule.c b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/shared/gmodule.c
index fd43ee5bd..db80d3d3a 100644
--- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/shared/gmodule.c
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/shared/gmodule.c
@@ -1,5 +1,6 @@
 /*
- * Copyright 2007-2020 Broadcom Inc. All rights reserved.
+ * $Id: gmodule.c,v 1.20 Broadcom SDK $
+ * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
  * 
  * Permission is granted to use, copy, modify and/or distribute this
  * software under either one of the licenses below.
@@ -22,12 +23,8 @@
  * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
  * 
  * This software is governed by the Broadcom Open Network Switch APIs license:
- * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa
- */
-/*
- * $Id: gmodule.c,v 1.20 Broadcom SDK $
- * $Copyright: (c) 2005 Broadcom Corp.
- * All Rights Reserved.$
+ * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+ * 
  * 
  * Generic Linux Module Framework
  *
diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/shared/ksal.c b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/shared/ksal.c
index 089d47c8c..683928cde 100644
--- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/shared/ksal.c
+++ b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/shared/ksal.c
@@ -1,5 +1,6 @@
 /*
- * Copyright 2007-2020 Broadcom Inc. All rights reserved.
+ * $Id: ksal.c,v 1.1 Broadcom SDK $
+ * $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
  * 
  * Permission is granted to use, copy, modify and/or distribute this
  * software under either one of the licenses below.
@@ -22,12 +23,8 @@
  * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
  * 
  * This software is governed by the Broadcom Open Network Switch APIs license:
- * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa
- */
-/*
- * $Id: ksal.c,v 1.1 Broadcom SDK $
- * $Copyright: (c) 2005 Broadcom Corp.
- * All Rights Reserved.$
+ * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+ * 
  */
 
 #include <sal/core/sync.h>
@@ -45,6 +42,13 @@
 #include <linux/sched/rt.h>
 #endif
 #include <linux/time.h>
+/* Check if system has ktime_get_ts64() */
+#ifndef LINUX_HAS_MONOTONIC_TIME
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,17,0)
+#include <linux/timekeeping.h>
+#define LINUX_HAS_MONOTONIC_TIME
+#endif
+#endif
 
 #if defined(MAX_USER_RT_PRIO) || defined(MAX_RT_PRIO)
 /* Assume 2.6 scheduler */
@@ -191,21 +195,15 @@ sal_sem_give(sal_sem_t b)
 uint32
 sal_time_usecs(void)
 {
-#if !defined(SAI_FIXUP)
-     struct timeval ltv;
-     do_gettimeofday(&ltv);
-     return (ltv.tv_sec * SECOND_USEC + ltv.tv_usec);
-#else
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(4,19,0)
-    /* ktime_to_us and ktime_get_real_ns return 64-bit integets, but this */
-    /* function is returning a 32-bit integer. This should be fine until 2038. */
-    return ktime_to_us(ktime_get_real_ns());
+#ifdef LINUX_HAS_MONOTONIC_TIME
+    struct timespec64 ts;
+    ktime_get_ts64(&ts);
+    return (ts.tv_sec * SECOND_USEC + ts.tv_nsec / 1000);
 #else
     struct timeval ltv;
     do_gettimeofday(&ltv);
     return (ltv.tv_sec * SECOND_USEC + ltv.tv_usec);
 #endif
-#endif
 }
     
 void
diff --git a/platform/broadcom/saibcm-modules/systems/linux/user/common/Makefile b/platform/broadcom/saibcm-modules/systems/linux/user/common/Makefile
index fe1b6fd08..333ddc27a 100644
--- a/platform/broadcom/saibcm-modules/systems/linux/user/common/Makefile
+++ b/platform/broadcom/saibcm-modules/systems/linux/user/common/Makefile
@@ -1,33 +1,30 @@
-#
-#  Copyright 2007-2020 Broadcom Inc. All rights reserved.
-#  
-#  Permission is granted to use, copy, modify and/or distribute this
-#  software under either one of the licenses below.
-#  
-#  License Option 1: GPL
-#  
-#  This program is free software; you can redistribute it and/or modify
-#  it under the terms of the GNU General Public License, version 2, as
-#  published by the Free Software Foundation (the "GPL").
-#  
-#  This program is distributed in the hope that it will be useful, but
-#  WITHOUT ANY WARRANTY; without even the implied warranty of
-#  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
-#  General Public License version 2 (GPLv2) for more details.
-#  
-#  You should have received a copy of the GNU General Public License
-#  version 2 (GPLv2) along with this source code.
-#  
-#  
-#  License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
-#  
-#  This software is governed by the Broadcom Open Network Switch APIs license:
-#  https://www.broadcom.com/products/ethernet-connectivity/software/opennsa
-#
 # -*- Makefile -*-
 # $Id: Makefile,v 1.4 Broadcom SDK $
-# $Copyright: (c) 2005 Broadcom Corp.
-# All Rights Reserved.$
+# $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+# 
+# Permission is granted to use, copy, modify and/or distribute this
+# software under either one of the licenses below.
+# 
+# License Option 1: GPL
+# 
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License, version 2, as
+# published by the Free Software Foundation (the "GPL").
+# 
+# This program is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+# General Public License version 2 (GPLv2) for more details.
+# 
+# You should have received a copy of the GNU General Public License
+# version 2 (GPLv2) along with this source code.
+# 
+# 
+# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
+# 
+# This software is governed by the Broadcom Open Network Switch APIs license:
+# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+# 
 #
 
 SDK :=$(shell if [ -n "$$SDK" ] ; then\
@@ -49,7 +46,6 @@ $(error Please run this in a tree)
 endif 				
 
 export SDK
-
 override-target=linux-$(platform)
 
 ifeq ($(LINUX_MAKE_SHARED_LIB),1)
@@ -94,17 +90,26 @@ ifeq ($(DEST_DIR),)
 DEST_DIR=${BLDDIR}
 endif
 
-KERNEL_BDE_LOCAL :=linux-kernel-bde.$(KOBJ)
-KERNEL_BDE :=$(DEST_DIR)/$(KERNEL_BDE_LOCAL)
+KERNEL_BDE_LOCAL := linux-kernel-bde.$(KOBJ)
+KERNEL_BDE := $(DEST_DIR)/$(KERNEL_BDE_LOCAL)
 
-USER_BDE_LOCAL :=linux-user-bde.$(KOBJ)
-USER_BDE=$(DEST_DIR)/$(USER_BDE_LOCAL)
+USER_BDE_LOCAL := linux-user-bde.$(KOBJ)
+USER_BDE := $(DEST_DIR)/$(USER_BDE_LOCAL)
 
 KNET_CB_LOCAL := linux-knet-cb.$(KOBJ)
 KNET_CB := $(DEST_DIR)/$(KNET_CB_LOCAL)
 
-BCM_KNET_LOCAL :=linux-bcm-knet.$(KOBJ)
-BCM_KNET=$(DEST_DIR)/$(BCM_KNET_LOCAL)
+GENL_PACKET_LOCAL := genl-packet.$(KOBJ)
+GENL_PACKET := $(DEST_DIR)/$(GENL_PACKET_LOCAL)
+ifndef BUILD_GENL_PACKET
+export BUILD_GENL_PACKET = 0
+endif
+
+BCM_GENL_LOCAL := linux-bcm-genl.$(KOBJ)
+BCM_GENL := $(DEST_DIR)/$(BCM_GENL_LOCAL)
+
+BCM_KNET_LOCAL := linux-bcm-knet.$(KOBJ)
+BCM_KNET := $(DEST_DIR)/$(BCM_KNET_LOCAL)
 
 ifeq (,$(findstring DELIVER,$(MAKECMDGOALS)))
 .DEFAULT_GOAL := all
@@ -126,6 +131,7 @@ endif
 ifeq ($(BUILD_KNET),1)
 # Kernel network support
 all_targets += $(BCM_KNET)
+knet_subdirs = bcm-knet
 
 ifeq ($(NO_LOCAL_TARGETS),)
 LOCAL_TARGETS +=$(patsubst %,../$(platform)/%,$(BCM_KNET_LOCAL))
@@ -134,6 +140,7 @@ endif
 
 ifdef BUILD_KNET_CB
 all_targets += $(KNET_CB)
+knet_subdirs += knet-cb
 
 ifeq ($(NO_LOCAL_TARGETS),)
 LOCAL_TARGETS +=$(patsubst %,../$(platform)/%,$(KNET_CB_LOCAL))
@@ -141,6 +148,26 @@ all_targets +=$(LOCAL_TARGETS)
 endif
 endif
 
+export BUILD_BCM_GENL=1
+ifeq ($(BUILD_BCM_GENL),1)
+ifeq ($(BUILD_GENL_PACKET),1)
+all_targets += $(GENL_PACKET)
+knet_subdirs += genl-packet
+
+ifeq ($(NO_LOCAL_TARGETS),)
+LOCAL_TARGETS +=$(patsubst %,../$(platform)/%,$(GENL_PACKET_LOCAL))
+all_targets +=$(LOCAL_TARGETS)
+endif
+endif
+all_targets += $(BCM_GENL)
+knet_subdirs += bcm-genl
+
+ifeq ($(NO_LOCAL_TARGETS),)
+LOCAL_TARGETS +=$(patsubst %,../$(platform)/%,$(BCM_GENL_LOCAL))
+all_targets +=$(LOCAL_TARGETS)
+endif
+endif
+
 ifdef BUILD_PSAMPLE
 ADD_TO_CFLAGS += -DPSAMPLE_SUPPORT
 endif
@@ -161,9 +188,6 @@ endif
 # User BDE libraries
 ADD_TO_CFLAGS += -I$(SDK)/systems/bde/linux/include
 
-# Use raw IOCTL for KNET
-ADD_TO_CFLAGS += -DPROXY_SUPPORT=0
-
 CFLAGS += $(ADD_TO_CFLAGS)
 
 #SAI_FIXUP
@@ -173,27 +197,46 @@ kernel_modules:
 	$(MAKE) -C $(SDK)/systems/bde/linux/kernel kernel_version=$(kernel_version)
 	$(MAKE) -C $(SDK)/systems/bde/linux/user/kernel kernel_version=$(kernel_version)
 ifeq ($(BUILD_KNET),1)
-	$(MAKE) -C $(SDK)/systems/linux/kernel/modules kernel_version=$(kernel_version) \
-		subdirs="shared bcm-knet" override-target=linux-$(platform) CFLAGS="$(CFLAGS)"
-ifdef BUILD_KNET_CB
-	$(MAKE) -C $(SDK)/systems/linux/kernel/modules kernel_version=$(kernel_version) \
-		subdirs="knet-cb" override-target=linux-$(platform) CFLAGS="$(CFLAGS)"
+	$(MAKE) -C $(SDK)/systems/linux/kernel/modules/shared kernel_version=$(kernel_version) \
+		override-target=linux-$(platform)
+	$(MAKE) -C $(SDK)/systems/linux/kernel/modules/bcm-knet kernel_version=$(kernel_version) \
+		override-target=linux-$(platform)
+ifneq (,$(filter knet-cb,$(knet_subdirs)))
+	$(MAKE) -C $(SDK)/systems/linux/kernel/modules/knet-cb kernel_version=$(kernel_version) \
+		override-target=linux-$(platform)
+endif
+ifneq (,$(filter bcm-genl,$(knet_subdirs)))
+ifneq (,$(filter genl-packet,$(knet_subdirs)))
+	$(MAKE) -C $(SDK)/systems/linux/kernel/modules/genl-packet kernel_version=$(kernel_version) \
+		override-target=linux-$(platform)
+endif
+	$(MAKE) -C $(SDK)/systems/linux/kernel/modules/bcm-genl kernel_version=$(kernel_version) \
+		override-target=linux-$(platform)
 endif
 endif
 
-$(KERNEL_BDE): $(KERN_BLDROOT)/linux-kernel-bde.$(KOBJ)
+$(KERNEL_BDE): $(KERN_BLDROOT)/$(KERNEL_BDE_LOCAL)
 	mkdir -p $(@D)
 	$(OBJCOPY) --strip-debug $< $@
 
-$(USER_BDE): $(KERN_BLDROOT)/linux-user-bde.$(KOBJ)
+$(USER_BDE): $(KERN_BLDROOT)/$(USER_BDE_LOCAL)
+	$(OBJCOPY) --strip-debug $< $@
+
+$(BCM_KNET): $(KERN_BLDROOT)/$(BCM_KNET_LOCAL)
 	$(OBJCOPY) --strip-debug $< $@
 
-$(BCM_KNET): $(KERN_BLDROOT)/linux-bcm-knet.$(KOBJ)
+$(KNET_CB): $(KERN_BLDROOT)/$(KNET_CB_LOCAL)
 	$(OBJCOPY) --strip-debug $< $@
 
-$(KNET_CB): $(KERN_BLDROOT)/linux-knet-cb.$(KOBJ)
+$(GENL_PACKET): $(KERN_BLDROOT)/$(GENL_PACKET_LOCAL)
 	$(OBJCOPY) --strip-debug $< $@
 
+$(BCM_GENL): $(KERN_BLDROOT)/$(BCM_GENL_LOCAL)
+	$(OBJCOPY) --strip-debug $< $@
+
+$(KERN_BLDROOT)/%.$(KOBJ): kernel_modules
+	@echo Force execution of kernel_modules target > /dev/null
+
 ifeq ($(NO_LOCAL_TARGETS),)
 $(foreach targ,$(LOCAL_TARGETS),$(eval $(call LOCAL_TARGET_DEF,$(targ))))
 endif
@@ -202,14 +245,16 @@ clean::
 	$(MAKE) -C $(SDK)/systems/bde/linux/kernel $@
 	$(MAKE) -C $(SDK)/systems/bde/linux/user/kernel $@
 	$(MAKE) -C $(SDK)/systems/linux/kernel/modules \
-		subdirs="shared bcm-knet knet-cb" \
+		subdirs="shared $(knet_subdirs)" \
 		override-target=linux-$(platform) $@
 	$(RM) $(KERNEL_BDE) $(USER_BDE)
-	$(RM) $(BCM_KNET) $(KNET_CB)
-	$(RM) $(KERN_BLDROOT)/linux-kernel-bde.$(KOBJ)
-	$(RM) $(KERN_BLDROOT)/linux-user-bde.$(KOBJ)
-	$(RM) $(KERN_BLDROOT)/linux-bcm-knet.$(KOBJ)
-	$(RM) $(KERN_BLDROOT)/linux-knet-cb.$(KOBJ)
+	$(RM) $(BCM_KNET) $(KNET_CB) $(GENL_PACKET) $(BCM_GENL)
+	$(RM) $(KERN_BLDROOT)/$(KERNEL_BDE_LOCAL)
+	$(RM) $(KERN_BLDROOT)/$(USER_BDE_LOCAL)
+	$(RM) $(KERN_BLDROOT)/$(BCM_KNET_LOCAL)
+	$(RM) $(KERN_BLDROOT)/$(KNET_CB_LOCAL)
+	$(RM) $(KERN_BLDROOT)/$(GENL_PACKET_LOCAL)
+	$(RM) $(KERN_BLDROOT)/$(BCM_GENL_LOCAL)
 	$(RM) $(LOCAL_TARGETS)
 
 distclean:: clean
diff --git a/platform/broadcom/saibcm-modules/systems/linux/user/gts/Makefile b/platform/broadcom/saibcm-modules/systems/linux/user/gts/Makefile
index 921ce62eb..8b75c6e43 100644
--- a/platform/broadcom/saibcm-modules/systems/linux/user/gts/Makefile
+++ b/platform/broadcom/saibcm-modules/systems/linux/user/gts/Makefile
@@ -1,33 +1,30 @@
-#
-#  Copyright 2007-2020 Broadcom Inc. All rights reserved.
-#  
-#  Permission is granted to use, copy, modify and/or distribute this
-#  software under either one of the licenses below.
-#  
-#  License Option 1: GPL
-#  
-#  This program is free software; you can redistribute it and/or modify
-#  it under the terms of the GNU General Public License, version 2, as
-#  published by the Free Software Foundation (the "GPL").
-#  
-#  This program is distributed in the hope that it will be useful, but
-#  WITHOUT ANY WARRANTY; without even the implied warranty of
-#  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
-#  General Public License version 2 (GPLv2) for more details.
-#  
-#  You should have received a copy of the GNU General Public License
-#  version 2 (GPLv2) along with this source code.
-#  
-#  
-#  License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
-#  
-#  This software is governed by the Broadcom Open Network Switch APIs license:
-#  https://www.broadcom.com/products/ethernet-connectivity/software/opennsa
-#
 # -*- Makefile -*-
 # $Id: Makefile,v 0.1 Broadcom SDK $
-# $Copyright: (c) 2015 Broadcom Corp.
-# All Rights Reserved.$
+# $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+# 
+# Permission is granted to use, copy, modify and/or distribute this
+# software under either one of the licenses below.
+# 
+# License Option 1: GPL
+# 
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License, version 2, as
+# published by the Free Software Foundation (the "GPL").
+# 
+# This program is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+# General Public License version 2 (GPLv2) for more details.
+# 
+# You should have received a copy of the GNU General Public License
+# version 2 (GPLv2) along with this source code.
+# 
+# 
+# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
+# 
+# This software is governed by the Broadcom Open Network Switch APIs license:
+# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+# 
 
 #
 # This make job requires the following environment variables to be set:
diff --git a/platform/broadcom/saibcm-modules/systems/linux/user/iproc-3_14/Makefile b/platform/broadcom/saibcm-modules/systems/linux/user/iproc-3_14/Makefile
index b874340dd..0f4a40a16 100644
--- a/platform/broadcom/saibcm-modules/systems/linux/user/iproc-3_14/Makefile
+++ b/platform/broadcom/saibcm-modules/systems/linux/user/iproc-3_14/Makefile
@@ -1,33 +1,30 @@
-#
-#  Copyright 2007-2020 Broadcom Inc. All rights reserved.
-#  
-#  Permission is granted to use, copy, modify and/or distribute this
-#  software under either one of the licenses below.
-#  
-#  License Option 1: GPL
-#  
-#  This program is free software; you can redistribute it and/or modify
-#  it under the terms of the GNU General Public License, version 2, as
-#  published by the Free Software Foundation (the "GPL").
-#  
-#  This program is distributed in the hope that it will be useful, but
-#  WITHOUT ANY WARRANTY; without even the implied warranty of
-#  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
-#  General Public License version 2 (GPLv2) for more details.
-#  
-#  You should have received a copy of the GNU General Public License
-#  version 2 (GPLv2) along with this source code.
-#  
-#  
-#  License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
-#  
-#  This software is governed by the Broadcom Open Network Switch APIs license:
-#  https://www.broadcom.com/products/ethernet-connectivity/software/opennsa
-#
 # -*- Makefile -*-
 # $Id: Makefile,v 1.7 Broadcom SDK $
-# $Copyright: (c) 2005 Broadcom Corp.
-# All Rights Reserved.$
+# $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+# 
+# Permission is granted to use, copy, modify and/or distribute this
+# software under either one of the licenses below.
+# 
+# License Option 1: GPL
+# 
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License, version 2, as
+# published by the Free Software Foundation (the "GPL").
+# 
+# This program is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+# General Public License version 2 (GPLv2) for more details.
+# 
+# You should have received a copy of the GNU General Public License
+# version 2 (GPLv2) along with this source code.
+# 
+# 
+# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
+# 
+# This software is governed by the Broadcom Open Network Switch APIs license:
+# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+# 
 
 #
 # This make job requires the following environment variables to be set:
diff --git a/platform/broadcom/saibcm-modules/systems/linux/user/iproc-4_4/Makefile b/platform/broadcom/saibcm-modules/systems/linux/user/iproc-4_4/Makefile
index 2b724be32..195345051 100644
--- a/platform/broadcom/saibcm-modules/systems/linux/user/iproc-4_4/Makefile
+++ b/platform/broadcom/saibcm-modules/systems/linux/user/iproc-4_4/Makefile
@@ -1,33 +1,30 @@
-#
-#  Copyright 2007-2020 Broadcom Inc. All rights reserved.
-#  
-#  Permission is granted to use, copy, modify and/or distribute this
-#  software under either one of the licenses below.
-#  
-#  License Option 1: GPL
-#  
-#  This program is free software; you can redistribute it and/or modify
-#  it under the terms of the GNU General Public License, version 2, as
-#  published by the Free Software Foundation (the "GPL").
-#  
-#  This program is distributed in the hope that it will be useful, but
-#  WITHOUT ANY WARRANTY; without even the implied warranty of
-#  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
-#  General Public License version 2 (GPLv2) for more details.
-#  
-#  You should have received a copy of the GNU General Public License
-#  version 2 (GPLv2) along with this source code.
-#  
-#  
-#  License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
-#  
-#  This software is governed by the Broadcom Open Network Switch APIs license:
-#  https://www.broadcom.com/products/ethernet-connectivity/software/opennsa
-#
 # -*- Makefile -*-
 # $Id: Makefile,v 1.7 Broadcom SDK $
-# $Copyright: (c) 2005 Broadcom Corp.
-# All Rights Reserved.$
+# $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+# 
+# Permission is granted to use, copy, modify and/or distribute this
+# software under either one of the licenses below.
+# 
+# License Option 1: GPL
+# 
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License, version 2, as
+# published by the Free Software Foundation (the "GPL").
+# 
+# This program is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+# General Public License version 2 (GPLv2) for more details.
+# 
+# You should have received a copy of the GNU General Public License
+# version 2 (GPLv2) along with this source code.
+# 
+# 
+# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
+# 
+# This software is governed by the Broadcom Open Network Switch APIs license:
+# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+# 
 
 #
 # This make job requires the following environment variables to be set:
diff --git a/platform/broadcom/saibcm-modules/systems/linux/user/iproc/Makefile b/platform/broadcom/saibcm-modules/systems/linux/user/iproc/Makefile
index 7f2c7bc6e..cc5a64556 100644
--- a/platform/broadcom/saibcm-modules/systems/linux/user/iproc/Makefile
+++ b/platform/broadcom/saibcm-modules/systems/linux/user/iproc/Makefile
@@ -1,33 +1,30 @@
-#
-#  Copyright 2007-2020 Broadcom Inc. All rights reserved.
-#  
-#  Permission is granted to use, copy, modify and/or distribute this
-#  software under either one of the licenses below.
-#  
-#  License Option 1: GPL
-#  
-#  This program is free software; you can redistribute it and/or modify
-#  it under the terms of the GNU General Public License, version 2, as
-#  published by the Free Software Foundation (the "GPL").
-#  
-#  This program is distributed in the hope that it will be useful, but
-#  WITHOUT ANY WARRANTY; without even the implied warranty of
-#  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
-#  General Public License version 2 (GPLv2) for more details.
-#  
-#  You should have received a copy of the GNU General Public License
-#  version 2 (GPLv2) along with this source code.
-#  
-#  
-#  License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
-#  
-#  This software is governed by the Broadcom Open Network Switch APIs license:
-#  https://www.broadcom.com/products/ethernet-connectivity/software/opennsa
-#
 # -*- Makefile -*-
 # $Id: Makefile,v 1.7 Broadcom SDK $
-# $Copyright: (c) 2005 Broadcom Corp.
-# All Rights Reserved.$
+# $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+# 
+# Permission is granted to use, copy, modify and/or distribute this
+# software under either one of the licenses below.
+# 
+# License Option 1: GPL
+# 
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License, version 2, as
+# published by the Free Software Foundation (the "GPL").
+# 
+# This program is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+# General Public License version 2 (GPLv2) for more details.
+# 
+# You should have received a copy of the GNU General Public License
+# version 2 (GPLv2) along with this source code.
+# 
+# 
+# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
+# 
+# This software is governed by the Broadcom Open Network Switch APIs license:
+# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+# 
 
 #
 # This make job requires the following environment variables to be set:
@@ -55,7 +52,7 @@ endif
 
 export SDK
 
-override kernel_version=5_4
+override kernel_version=5_10
 platform=iproc
 
 IPROC_BUILD=1
diff --git a/platform/broadcom/saibcm-modules/systems/linux/user/iproc_64/Makefile b/platform/broadcom/saibcm-modules/systems/linux/user/iproc_64/Makefile
index 3f0a819d8..163dd916c 100644
--- a/platform/broadcom/saibcm-modules/systems/linux/user/iproc_64/Makefile
+++ b/platform/broadcom/saibcm-modules/systems/linux/user/iproc_64/Makefile
@@ -1,33 +1,30 @@
-#
-#  Copyright 2007-2020 Broadcom Inc. All rights reserved.
-#  
-#  Permission is granted to use, copy, modify and/or distribute this
-#  software under either one of the licenses below.
-#  
-#  License Option 1: GPL
-#  
-#  This program is free software; you can redistribute it and/or modify
-#  it under the terms of the GNU General Public License, version 2, as
-#  published by the Free Software Foundation (the "GPL").
-#  
-#  This program is distributed in the hope that it will be useful, but
-#  WITHOUT ANY WARRANTY; without even the implied warranty of
-#  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
-#  General Public License version 2 (GPLv2) for more details.
-#  
-#  You should have received a copy of the GNU General Public License
-#  version 2 (GPLv2) along with this source code.
-#  
-#  
-#  License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
-#  
-#  This software is governed by the Broadcom Open Network Switch APIs license:
-#  https://www.broadcom.com/products/ethernet-connectivity/software/opennsa
-#
 # -*- Makefile -*-
 # $Id: Makefile,v 1.7 Broadcom SDK $
-# $Copyright: (c) 2005 Broadcom Corp.
-# All Rights Reserved.$
+# $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+# 
+# Permission is granted to use, copy, modify and/or distribute this
+# software under either one of the licenses below.
+# 
+# License Option 1: GPL
+# 
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License, version 2, as
+# published by the Free Software Foundation (the "GPL").
+# 
+# This program is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+# General Public License version 2 (GPLv2) for more details.
+# 
+# You should have received a copy of the GNU General Public License
+# version 2 (GPLv2) along with this source code.
+# 
+# 
+# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
+# 
+# This software is governed by the Broadcom Open Network Switch APIs license:
+# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+# 
 
 #
 # This make job requires the following environment variables to be set:
@@ -55,7 +52,7 @@ endif
 
 export SDK
 
-override kernel_version=5_4
+override kernel_version=5_10
 platform=iproc_64
 
 IPROC_BUILD=1
diff --git a/platform/broadcom/saibcm-modules/systems/linux/user/slk/Makefile b/platform/broadcom/saibcm-modules/systems/linux/user/slk/Makefile
index 6ef360156..ac8c81722 100644
--- a/platform/broadcom/saibcm-modules/systems/linux/user/slk/Makefile
+++ b/platform/broadcom/saibcm-modules/systems/linux/user/slk/Makefile
@@ -1,33 +1,30 @@
-#
-#  Copyright 2007-2020 Broadcom Inc. All rights reserved.
-#  
-#  Permission is granted to use, copy, modify and/or distribute this
-#  software under either one of the licenses below.
-#  
-#  License Option 1: GPL
-#  
-#  This program is free software; you can redistribute it and/or modify
-#  it under the terms of the GNU General Public License, version 2, as
-#  published by the Free Software Foundation (the "GPL").
-#  
-#  This program is distributed in the hope that it will be useful, but
-#  WITHOUT ANY WARRANTY; without even the implied warranty of
-#  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
-#  General Public License version 2 (GPLv2) for more details.
-#  
-#  You should have received a copy of the GNU General Public License
-#  version 2 (GPLv2) along with this source code.
-#  
-#  
-#  License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
-#  
-#  This software is governed by the Broadcom Open Network Switch APIs license:
-#  https://www.broadcom.com/products/ethernet-connectivity/software/opennsa
-#
 # -*- Makefile -*-
 # $Id: Makefile,v 0.1 Broadcom SDK $
-# $Copyright: (c) 2015 Broadcom Corp.
-# All Rights Reserved.$
+# $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+# 
+# Permission is granted to use, copy, modify and/or distribute this
+# software under either one of the licenses below.
+# 
+# License Option 1: GPL
+# 
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License, version 2, as
+# published by the Free Software Foundation (the "GPL").
+# 
+# This program is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+# General Public License version 2 (GPLv2) for more details.
+# 
+# You should have received a copy of the GNU General Public License
+# version 2 (GPLv2) along with this source code.
+# 
+# 
+# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
+# 
+# This software is governed by the Broadcom Open Network Switch APIs license:
+# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+# 
 
 #
 # This make job requires the following environment variables to be set:
diff --git a/platform/broadcom/saibcm-modules/systems/linux/user/x86-smp_generic_64-2_6/Makefile b/platform/broadcom/saibcm-modules/systems/linux/user/x86-smp_generic_64-2_6/Makefile
index 78c2c0cb1..e952ca235 100644
--- a/platform/broadcom/saibcm-modules/systems/linux/user/x86-smp_generic_64-2_6/Makefile
+++ b/platform/broadcom/saibcm-modules/systems/linux/user/x86-smp_generic_64-2_6/Makefile
@@ -1,33 +1,30 @@
-#
-#  Copyright 2007-2020 Broadcom Inc. All rights reserved.
-#  
-#  Permission is granted to use, copy, modify and/or distribute this
-#  software under either one of the licenses below.
-#  
-#  License Option 1: GPL
-#  
-#  This program is free software; you can redistribute it and/or modify
-#  it under the terms of the GNU General Public License, version 2, as
-#  published by the Free Software Foundation (the "GPL").
-#  
-#  This program is distributed in the hope that it will be useful, but
-#  WITHOUT ANY WARRANTY; without even the implied warranty of
-#  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
-#  General Public License version 2 (GPLv2) for more details.
-#  
-#  You should have received a copy of the GNU General Public License
-#  version 2 (GPLv2) along with this source code.
-#  
-#  
-#  License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
-#  
-#  This software is governed by the Broadcom Open Network Switch APIs license:
-#  https://www.broadcom.com/products/ethernet-connectivity/software/opennsa
-#
 # -*- Makefile -*-
 # $Id: Makefile,v 1.2 Broadcom SDK $
-# $Copyright: (c) 2005 Broadcom Corp.
-# All Rights Reserved.$
+# $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+# 
+# Permission is granted to use, copy, modify and/or distribute this
+# software under either one of the licenses below.
+# 
+# License Option 1: GPL
+# 
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License, version 2, as
+# published by the Free Software Foundation (the "GPL").
+# 
+# This program is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+# General Public License version 2 (GPLv2) for more details.
+# 
+# You should have received a copy of the GNU General Public License
+# version 2 (GPLv2) along with this source code.
+# 
+# 
+# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
+# 
+# This software is governed by the Broadcom Open Network Switch APIs license:
+# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+# 
 
 SDK :=$(shell if [ -n "$$SDK" ] ; then\
 	echo $$SDK;\
diff --git a/platform/broadcom/saibcm-modules/systems/linux/user/xlr/Makefile b/platform/broadcom/saibcm-modules/systems/linux/user/xlr/Makefile
index a5b0dadf8..c5b2b6205 100644
--- a/platform/broadcom/saibcm-modules/systems/linux/user/xlr/Makefile
+++ b/platform/broadcom/saibcm-modules/systems/linux/user/xlr/Makefile
@@ -1,33 +1,30 @@
-#
-#  Copyright 2007-2020 Broadcom Inc. All rights reserved.
-#  
-#  Permission is granted to use, copy, modify and/or distribute this
-#  software under either one of the licenses below.
-#  
-#  License Option 1: GPL
-#  
-#  This program is free software; you can redistribute it and/or modify
-#  it under the terms of the GNU General Public License, version 2, as
-#  published by the Free Software Foundation (the "GPL").
-#  
-#  This program is distributed in the hope that it will be useful, but
-#  WITHOUT ANY WARRANTY; without even the implied warranty of
-#  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
-#  General Public License version 2 (GPLv2) for more details.
-#  
-#  You should have received a copy of the GNU General Public License
-#  version 2 (GPLv2) along with this source code.
-#  
-#  
-#  License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
-#  
-#  This software is governed by the Broadcom Open Network Switch APIs license:
-#  https://www.broadcom.com/products/ethernet-connectivity/software/opennsa
-#
 # -*- Makefile -*-
 # $Id: Makefile,v 0.1 Broadcom SDK $
-# $Copyright: (c) 2015 Broadcom Corp.
-# All Rights Reserved.$
+# $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+# 
+# Permission is granted to use, copy, modify and/or distribute this
+# software under either one of the licenses below.
+# 
+# License Option 1: GPL
+# 
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License, version 2, as
+# published by the Free Software Foundation (the "GPL").
+# 
+# This program is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+# General Public License version 2 (GPLv2) for more details.
+# 
+# You should have received a copy of the GNU General Public License
+# version 2 (GPLv2) along with this source code.
+# 
+# 
+# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
+# 
+# This software is governed by the Broadcom Open Network Switch APIs license:
+# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+# 
 
 #
 # This make job requires the following environment variables to be set:
diff --git a/platform/broadcom/saibcm-modules/tools/mktool.pl b/platform/broadcom/saibcm-modules/tools/mktool.pl
index 518ab2553..75e411e8c 100644
--- a/platform/broadcom/saibcm-modules/tools/mktool.pl
+++ b/platform/broadcom/saibcm-modules/tools/mktool.pl
@@ -1,36 +1,33 @@
 #
-#  Copyright 2007-2020 Broadcom Inc. All rights reserved.
-#  
-#  Permission is granted to use, copy, modify and/or distribute this
-#  software under either one of the licenses below.
-#  
-#  License Option 1: GPL
-#  
-#  This program is free software; you can redistribute it and/or modify
-#  it under the terms of the GNU General Public License, version 2, as
-#  published by the Free Software Foundation (the "GPL").
-#  
-#  This program is distributed in the hope that it will be useful, but
-#  WITHOUT ANY WARRANTY; without even the implied warranty of
-#  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
-#  General Public License version 2 (GPLv2) for more details.
-#  
-#  You should have received a copy of the GNU General Public License
-#  version 2 (GPLv2) along with this source code.
-#  
-#  
-#  License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
-#  
-#  This software is governed by the Broadcom Open Network Switch APIs license:
-#  https://www.broadcom.com/products/ethernet-connectivity/software/opennsa
-#
-#
 # mktool.pl
 #
 # $Id: mktool.pl,v 1.5 Broadcom SDK $
 # 
-# $Copyright: (c) 2005 Broadcom Corp.
-# All Rights Reserved. $
+# $Copyright: 2007-2023 Broadcom Inc. All rights reserved.
+# 
+# Permission is granted to use, copy, modify and/or distribute this
+# software under either one of the licenses below.
+# 
+# License Option 1: GPL
+# 
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License, version 2, as
+# published by the Free Software Foundation (the "GPL").
+# 
+# This program is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+# General Public License version 2 (GPLv2) for more details.
+# 
+# You should have received a copy of the GNU General Public License
+# version 2 (GPLv2) along with this source code.
+# 
+# 
+# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license
+# 
+# This software is governed by the Broadcom Open Network Switch APIs license:
+# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $
+# 
 
 use File::Path;
 use File::Find;

From 93f3cad6faaf0be67548c4e99a66ffedad98ca52 Mon Sep 17 00:00:00 2001
From: Liu Shilong <shilongliu@microsoft.com>
Date: Thu, 29 Aug 2024 04:06:32 +0800
Subject: [PATCH 0932/1115] Revert "Event  and alarm management (#17949)"
 (#20052)

This reverts commit 10f0fe8d8c22f41ae24a264a6e0298864c8eb755.
---
 .../docker-database/database_config.json.j2   |   6 -
 dockers/docker-eventd/supervisord.conf        |  10 -
 files/build_templates/docker_image_ctl.j2     |  13 +-
 src/sonic-eventd/Makefile                     |  17 +-
 src/sonic-eventd/debian/sonic-eventd.install  |   3 -
 src/sonic-eventd/etc/eventd.json              |   5 -
 src/sonic-eventd/src/eventconsume.cpp         | 662 ------------------
 src/sonic-eventd/src/eventconsume.h           |  54 --
 src/sonic-eventd/src/eventdb.cpp              |  30 -
 src/sonic-eventd/src/eventutils.cpp           |  76 --
 src/sonic-eventd/src/eventutils.h             |  43 --
 src/sonic-eventd/src/loghandler.cpp           |  37 -
 src/sonic-eventd/src/loghandler.h             |   5 -
 src/sonic-eventd/src/subdir.mk                |   6 +-
 src/sonic-eventd/tests/default.json           |  24 -
 src/sonic-eventd/tests/eventd.json            |   5 -
 .../tests/eventdb_database_config.json        | 107 ---
 .../tests/eventdb_database_config_global.json |   8 -
 src/sonic-eventd/tests/eventdb_ut.cpp         | 434 ------------
 src/sonic-eventd/tests/subdir.mk              |   7 +-
 src/sonic-eventd/var/evprofile/default.json   |   7 -
 .../yang-models/sonic-alarm.yang              | 142 ----
 .../yang-models/sonic-event.yang              | 134 ----
 .../yang-models/sonic-events-common.yang      |  41 --
 24 files changed, 10 insertions(+), 1866 deletions(-)
 delete mode 100644 src/sonic-eventd/etc/eventd.json
 delete mode 100644 src/sonic-eventd/src/eventconsume.cpp
 delete mode 100644 src/sonic-eventd/src/eventconsume.h
 delete mode 100644 src/sonic-eventd/src/eventdb.cpp
 delete mode 100644 src/sonic-eventd/src/eventutils.cpp
 delete mode 100644 src/sonic-eventd/src/eventutils.h
 delete mode 100755 src/sonic-eventd/src/loghandler.cpp
 delete mode 100644 src/sonic-eventd/src/loghandler.h
 delete mode 100755 src/sonic-eventd/tests/default.json
 delete mode 100755 src/sonic-eventd/tests/eventd.json
 delete mode 100644 src/sonic-eventd/tests/eventdb_database_config.json
 delete mode 100644 src/sonic-eventd/tests/eventdb_database_config_global.json
 delete mode 100644 src/sonic-eventd/tests/eventdb_ut.cpp
 delete mode 100644 src/sonic-eventd/var/evprofile/default.json
 delete mode 100644 src/sonic-yang-models/yang-models/sonic-alarm.yang
 delete mode 100644 src/sonic-yang-models/yang-models/sonic-event.yang

diff --git a/dockers/docker-database/database_config.json.j2 b/dockers/docker-database/database_config.json.j2
index 0e772cc06..65db6cb72 100644
--- a/dockers/docker-database/database_config.json.j2
+++ b/dockers/docker-database/database_config.json.j2
@@ -130,12 +130,6 @@
             "instance" : {% if include_remote_db %} "remote_redis" {% else %} "redis" {% endif %}
         }
 {% endif %}
-        ,
-        "EVENT_DB" : {
-            "id" : 19,
-            "separator": "|",
-            "instance" : "redis"
-        }
     },
     "VERSION" : "1.0"
 }
diff --git a/dockers/docker-eventd/supervisord.conf b/dockers/docker-eventd/supervisord.conf
index ef8411545..be51f922c 100644
--- a/dockers/docker-eventd/supervisord.conf
+++ b/dockers/docker-eventd/supervisord.conf
@@ -50,13 +50,3 @@ stderr_logfile=syslog
 dependent_startup=true
 dependent_startup_wait_for=start:exited
 
-[program:eventdb]
-command=/usr/bin/eventdb
-priority=3
-autostart=false
-autorestart=false
-stdout_logfile=syslog
-stderr_logfile=syslog
-dependent_startup=true
-dependent_startup_wait_for=start:exited
-
diff --git a/files/build_templates/docker_image_ctl.j2 b/files/build_templates/docker_image_ctl.j2
index 56e5dc913..7e64845c8 100644
--- a/files/build_templates/docker_image_ctl.j2
+++ b/files/build_templates/docker_image_ctl.j2
@@ -91,16 +91,9 @@ function preStartAction()
             # Load redis content from /host/warmboot/dump.rdb
             docker cp $WARM_DIR/dump.rdb database$DEV:/var/lib/redis/dump.rdb
         else
-            COLD_DIR=/host/coldboot
-            #In case of cold reboot, load redis content from /host/coldboot/dump.rdb
-            if [[ -f $COLD_DIR/dump.rdb ]]; then
-                #Load redis content from /host/coldboot/dump.rdb
-                docker cp $COLD_DIR/dump.rdb database$DEV:/var/lib/redis/dump.rdb
-            else   
-                # Create an emtpy file and overwrite any RDB if already there
-                echo -n > /tmp/dump.rdb
-                docker cp /tmp/dump.rdb database$DEV:/var/lib/redis/
-            fi        
+            # Create an emtpy file and overwrite any RDB if already there
+            echo -n > /tmp/dump.rdb
+            docker cp /tmp/dump.rdb database$DEV:/var/lib/redis/
         fi
     fi
 {%- elif docker_container_name == "pde" %}
diff --git a/src/sonic-eventd/Makefile b/src/sonic-eventd/Makefile
index 73adf10ca..835d0732a 100644
--- a/src/sonic-eventd/Makefile
+++ b/src/sonic-eventd/Makefile
@@ -1,16 +1,12 @@
 RM := rm -rf
 EVENTD_TARGET := eventd
 EVENTD_TEST := tests/tests
-EVENTDB_TEST := tests/eventdb
 EVENTD_TOOL := tools/events_tool
 EVENTD_PUBLISH_TOOL := tools/events_publish_tool.py
 RSYSLOG-PLUGIN_TARGET := rsyslog_plugin/rsyslog_plugin
 RSYSLOG-PLUGIN_TEST := rsyslog_plugin_tests/tests
 EVENTD_MONIT := tools/events_monit_test.py
 EVENTD_MONIT_CONF := tools/monit_events
-EVENTDB_TARGET := eventdb
-EVENTDB_DEFAULT_PROFILE := var/evprofile/default.json
-EVENTDB_PROF := etc/eventd.json
 
 CP := cp
 MKDIR := mkdir
@@ -23,7 +19,7 @@ PWD := $(shell pwd)
 
 ifneq ($(MAKECMDGOALS),clean)
 ifneq ($(strip $(C_DEPS)),)
--include $(C_DEPS) $(OBJS) $(EVENTDB_OBJS)
+-include $(C_DEPS) $(OBJS)
 endif
 endif
 
@@ -35,11 +31,10 @@ endif
 
 all: sonic-eventd eventd-tests eventd-tool rsyslog-plugin rsyslog-plugin-tests
 
-sonic-eventd: $(OBJS) $(EVENTDB_OBJS)
+sonic-eventd: $(OBJS)
 	@echo 'Building target: $@'
 	@echo 'Invoking: G++ Linker'
 	$(CC) $(LDFLAGS) -o $(EVENTD_TARGET) $(OBJS) $(LIBS)
-	$(CC) $(LDFLAGS) -o $(EVENTDB_TARGET) $(EVENTDB_OBJS) $(LIBS)
 	@echo 'Finished building target: $@'
 	@echo ' '
 
@@ -57,14 +52,12 @@ rsyslog-plugin: $(RSYSLOG-PLUGIN_OBJS)
 	@echo 'Finished building target: $@'
 	@echo ' '
 
-eventd-tests: $(TEST_OBJS) $(EVENTDB_TEST_OBJS)
+eventd-tests: $(TEST_OBJS)
 	@echo 'Building target: $@'
 	@echo 'Invoking: G++ Linker'
 	$(CC) $(LDFLAGS) -o $(EVENTD_TEST) $(TEST_OBJS) $(LIBS) $(TEST_LIBS)
-	$(CC) $(LDFLAGS) -o $(EVENTDB_TEST) $(EVENTDB_TEST_OBJS) $(LIBS) $(TEST_LIBS)
 	@echo 'Finished building target: $@'
 	$(EVENTD_TEST)
-	$(EVENTDB_TEST)
 	@echo 'Finished running tests'
 	@echo ' '
 
@@ -80,16 +73,12 @@ rsyslog-plugin-tests: $(RSYSLOG-PLUGIN-TEST_OBJS)
 install:
 	$(MKDIR) -p $(DESTDIR)/usr/bin
 	$(MKDIR) -p $(DESTDIR)/etc/monit/conf.d
-	$(MKDIR) -p $(DESTDIR)/etc/evprofile
 	$(CP) $(EVENTD_TARGET) $(DESTDIR)/usr/bin
 	$(CP) $(EVENTD_TOOL) $(DESTDIR)/usr/bin
 	$(CP) $(EVENTD_PUBLISH_TOOL) $(DESTDIR)/usr/bin
 	$(CP) $(RSYSLOG-PLUGIN_TARGET) $(DESTDIR)/usr/bin
 	$(CP) $(EVENTD_MONIT) $(DESTDIR)/usr/bin
 	$(CP) $(EVENTD_MONIT_CONF) $(DESTDIR)/etc/monit/conf.d
-	$(CP) $(EVENTDB_TARGET) $(DESTDIR)/usr/bin
-	$(CP) $(EVENTDB_PROF) $(DESTDIR)/etc/eventd.json
-	$(CP) $(EVENTDB_DEFAULT_PROFILE) $(DESTDIR)/etc/evprofile/default.json
 
 deinstall:
 	$(RM) -rf $(DESTDIR)/usr
diff --git a/src/sonic-eventd/debian/sonic-eventd.install b/src/sonic-eventd/debian/sonic-eventd.install
index 273b07adf..bdba566c7 100644
--- a/src/sonic-eventd/debian/sonic-eventd.install
+++ b/src/sonic-eventd/debian/sonic-eventd.install
@@ -1,6 +1,3 @@
 usr/bin/eventd
-usr/bin/eventdb
 usr/bin/events_tool
 usr/bin/events_publish_tool.py
-etc/evprofile/default.json
-etc/eventd.json
diff --git a/src/sonic-eventd/etc/eventd.json b/src/sonic-eventd/etc/eventd.json
deleted file mode 100644
index ee441eb32..000000000
--- a/src/sonic-eventd/etc/eventd.json
+++ /dev/null
@@ -1,5 +0,0 @@
-{
-    "__README__": "Specify size of event history table. Whichever limit is hit first, eventd wraps event history table around and deletes older records.",
-    "max-records": 40000,
-    "max-days": 30
-}
diff --git a/src/sonic-eventd/src/eventconsume.cpp b/src/sonic-eventd/src/eventconsume.cpp
deleted file mode 100644
index 5ef249e27..000000000
--- a/src/sonic-eventd/src/eventconsume.cpp
+++ /dev/null
@@ -1,662 +0,0 @@
-
-#include <math.h>
-#include <syslog.h>
-#include <limits>
-#include <queue>
-#include <unistd.h>
-#include "eventconsume.h"
-#include "loghandler.h"
-#include "eventutils.h"
-#include "events_common.h"
-
-
-using namespace std::chrono;
-
-// map to store sequence-id for alarms
-unordered_map<string, uint64_t> cal_lookup_map;
-
-// temporary map to hold merge of default map of events and any event profile
-EventMap static_event_table;
-
-bool g_run = true;
-uint64_t seq_id = 0;
-uint64_t PURGE_SECONDS = 86400;
-
-typedef pair<uint64_t, uint64_t> pi;
-priority_queue<pi, vector<pi>, greater<pi> > event_history_list;
-
-map<string, int> SYSLOG_SEVERITY = {
-    {EVENT_SEVERITY_CRITICAL_STR,      LOG_ALERT},
-    {EVENT_SEVERITY_MAJOR_STR,         LOG_CRIT},
-    {EVENT_SEVERITY_MINOR_STR,         LOG_ERR},
-    {EVENT_SEVERITY_WARNING_STR,       LOG_WARNING},
-    {EVENT_SEVERITY_INFORMATIONAL_STR, LOG_NOTICE}
-};
-
-map <int, string> SYSLOG_SEVERITY_STR = {
-    {LOG_ALERT   , EVENT_SEVERITY_CRITICAL_STR},
-    {LOG_CRIT    , EVENT_SEVERITY_MAJOR_STR},
-    {LOG_ERR     , EVENT_SEVERITY_MINOR_STR},
-    {LOG_WARNING , EVENT_SEVERITY_WARNING_STR},
-    {LOG_NOTICE  , EVENT_SEVERITY_INFORMATIONAL_STR}
-};
-
-static string flood_ev_id;
-static string flood_ev_action;
-static string flood_ev_resource;
-static string flood_ev_msg;
-
-EventConsume::EventConsume(DBConnector* dbConn,
-                           string evProfile,
-                           string dbProfile):
-    m_eventTable(dbConn, EVENT_HISTORY_TABLE_NAME),
-    m_alarmTable(dbConn, EVENT_CURRENT_ALARM_TABLE_NAME),
-    m_eventStatsTable(dbConn, EVENT_STATS_TABLE_NAME),
-    m_alarmStatsTable(dbConn, EVENT_ALARM_STATS_TABLE_NAME),
-    m_evProfile(evProfile),
-    m_dbProfile(dbProfile) {
-
-    // open syslog connection
-    openSyslog();
-
-    // init stats
-    initStats();
-
-    // populate local queue of event histor table
-    read_events();
-
-    // read and apply eventd configuration files 
-    // read eventd.json and apply it on history table. 
-    // read default and custom profiles, build static_event_table
-    read_eventd_config();
-
-    SWSS_LOG_NOTICE("DONE WITH EventConsume constructor");
-}
-
-EventConsume::~EventConsume() {
-}
-
-void EventConsume::run()
-{
-
-    SWSS_LOG_ENTER();
-    event_handle_t hsub;
-    hsub = events_init_subscriber();
-    
-    while (g_run) {
-        event_receive_op_t evt;
-        map_str_str_t evtOp;
-        int rc = event_receive(hsub, evt); 
-        if (rc != 0) {
-            SWSS_LOG_ERROR("Failed to receive rc=%d", rc);
-             continue;
-        }
-        handle_notification(evt);
-    }
-    events_deinit_subscriber(hsub);
-}
-
-void EventConsume::read_eventd_config(bool read_all) {
-    // read manifest file for config options
-    if (read_all) {
-        read_config_and_purge();
-    }
-
-    // read from default map
-    static_event_table.clear();
-    if (!parse(m_evProfile.c_str(), static_event_table)) {
-        SWSS_LOG_ERROR("Can not initialize event map");
-        closeSyslog();
-        exit(0);
-    }
-
-    SWSS_LOG_NOTICE("Event map is built as follows:");
-    for (auto& x: static_event_table) {
-        SWSS_LOG_NOTICE("    %s (%s %s %s)", x.first.c_str(), x.second.severity.c_str(), x.second.enable.c_str(), x.second.static_event_msg.c_str());
-    }
-}
-
-
-void EventConsume::handle_notification(const event_receive_op_t& evt)
-{
-    SWSS_LOG_ENTER();
-
-    string ev_id, ev_msg, ev_src, ev_act, ev_timestamp, ev_type("EVENT"),
-           ev_static_msg(""), ev_reckey;
-    string ev_sev = string(EVENT_SEVERITY_INFORMATIONAL_STR);
-    bool is_raise = false;
-    bool is_clear = false;
-    bool is_ack = false;
-    vector<FieldValueTuple> vec;
-
-    fetchFieldValues(evt, vec, ev_id, ev_msg, ev_src, ev_act, ev_timestamp);
-
-    // flood protection. If a rogue application sends same event repeatedly, throttle repeated instances of that event
-    if (isFloodedEvent(ev_src, ev_act, ev_id, ev_msg)) {
-        return;
-    }
-
-    // get static info
-    if (!staticInfoExists(ev_id, ev_act, ev_sev, ev_static_msg, vec)) {
-        return;
-    }
-
-    // increment save seq-id for the newly received event
-    uint64_t new_seq_id = seq_id + 1;
-
-    FieldValueTuple seqfv("id", to_string(new_seq_id));
-    vec.push_back(seqfv);
-
-    if (ev_act.length() > 0) {
-        SWSS_LOG_DEBUG("ev_act %s", ev_act.c_str());
-        ev_type = "ALARM";
-        string almkey = ev_id;
-        if (!ev_src.empty()) {
-            almkey += "|" + ev_src;
-        }
-
-        if (ev_act.compare(EVENT_ACTION_RAISE_STR) == 0) {
-            is_raise = true;
-            // add entry to the lookup map
-            cal_lookup_map.insert(make_pair(almkey, new_seq_id));
-
-            // add acknowledged field intializing it to false
-            FieldValueTuple seqfv1("acknowledged", "false");
-            vec.push_back(seqfv1);
-            m_alarmTable.set(to_string(new_seq_id), vec);
-
-            // update alarm counters
-            updateAlarmStatistics(ev_sev, ev_act);
-        } else if (ev_act.compare(EVENT_ACTION_CLEAR_STR) == 0) {
-            is_clear = true;
-            SWSS_LOG_DEBUG(" Received clear alarm for %s", almkey.c_str());
-
-            bool ack_flag = false;
-            // remove entry from local cache, alarm table
-            if (!udpateLocalCacheAndAlarmTable(almkey, ack_flag)) {
-                SWSS_LOG_ERROR("Received clear for non-existent alarm %s", almkey.c_str());
-                return;
-            }
-
-            // update alarm counters ONLY if it has not been ack'd before.
-            // This is because when alarm is ack'd, alarms/severity counter is reduced already.
-            if (!ack_flag) {
-                updateAlarmStatistics(ev_sev, ev_act);
-            } else {
-                // if it has been ack'd before, ack counter would have been incremented for this alrm.
-                // Now is the time reduce it.
-                clearAckAlarmStatistic();
-            }
-        } else {
-            // ack/unack events comes with seq-id of raised alarm as resource field.
-            // fetch details of "raised" alarm record
-            string raise_act;
-            string raise_ack_flag;
-            string raise_ts;
-
-            // fetch information from raised event record
-            if (!fetchRaiseInfo(vec, ev_src, ev_id, ev_sev, raise_act, raise_ack_flag, raise_ts))
-            {
-                SWSS_LOG_ERROR("Action %s on a non-existent Alarm id %s", ev_act.c_str(), ev_src.c_str());
-                return;
-            }
-
-            if (ev_act.compare(EVENT_ACTION_ACK_STR) == 0) {
-                if (raise_ack_flag.compare("true") == 0) {
-                    SWSS_LOG_INFO("%s/%s is already acknowledged", ev_id.c_str(), ev_src.c_str());
-                    return;
-                }
-                if (raise_act.compare(EVENT_ACTION_RAISE_STR) == 0) {
-                    is_ack = true;
-                    SWSS_LOG_DEBUG("Received acknowledge event - %s/%s", ev_id.c_str(), ev_src.c_str());
-
-                    // update the record with ack flag and ack-time and stats
-                    updateAckInfo(is_ack, ev_timestamp, ev_sev, ev_act, ev_src);
-                } else {
-                    SWSS_LOG_ERROR("Alarm %s/%s not in RAISE state", ev_id.c_str(), ev_src.c_str());
-                    return;
-                }
-            } else if (ev_act.compare(EVENT_ACTION_UNACK_STR) == 0) {
-                if (raise_ack_flag.compare("true") == 0) {
-                    SWSS_LOG_DEBUG(" received un-ACKnowledge event - %s/%s", ev_id.c_str(), ev_src.c_str());
-
-                    // update the record with ack flag and ack-time and stats
-                    updateAckInfo(is_ack, ev_timestamp, ev_sev, ev_act, ev_src);
-                } else {
-                    SWSS_LOG_INFO(" %s/%s is already un-acknowledged", ev_id.c_str(), ev_src.c_str());
-                    return;
-                }
-            }
-        }
-    }
-    // verify the size of history table; delete older entry; add new entry
-    seq_id = new_seq_id;
-    update_events(to_string(seq_id), ev_timestamp, vec);
-
-    updateEventStatistics(true, is_raise, is_ack, is_clear);
-
-    // raise a syslog message
-    writeToSyslog(ev_id, (int)(SYSLOG_SEVERITY.find(ev_sev)->second), ev_type, ev_act, ev_msg, ev_static_msg);
-
-    return;
-}
-
-void EventConsume::read_events() {
-    vector<KeyOpFieldsValuesTuple> tuples;
-    m_eventTable.getContent(tuples);
-
-    SWSS_LOG_ENTER();
-    // find out last sequence-id; build local history list
-    for (auto tuple: tuples) {
-        for (auto fv: kfvFieldsValues(tuple)) {
-            if (fvField(fv) == "time-created") {
-                char* end;
-                uint64_t seq = strtoull(kfvKey(tuple).c_str(), &end,10);
-                if (seq > seq_id) {
-                    seq_id = seq;
-                }
-                uint64_t val = strtoull(fvValue(fv).c_str(), &end,10);
-                event_history_list.push(make_pair( seq, val ));
-            }
-        }
-    }
-    SWSS_LOG_NOTICE("eventd sequence-id intialized to %lu", seq_id);
-}
-
-void EventConsume::updateAlarmStatistics(string ev_sev, string ev_act) {
-    vector<FieldValueTuple> vec;
-    vector<FieldValueTuple> temp;
-
-    // severity counter names are of lower case
-    transform(ev_sev.begin(), ev_sev.end(), ev_sev.begin(), ::tolower);
-
-    if (m_alarmStatsTable.get("state", vec)) {
-        for (auto fv: vec) {
-            if (!fv.first.compare("alarms")) {
-                if ((ev_act.compare(EVENT_ACTION_RAISE_STR) == 0) || (ev_act.compare(EVENT_ACTION_UNACK_STR) == 0)) {
-                    fv.second = to_string(stoi(fv.second.c_str())+1);
-                } else {
-                    fv.second = to_string(stoi(fv.second.c_str())-1);
-                }
-                temp.push_back(fv);
-            } else if (!fv.first.compare(ev_sev)) {
-                if ((ev_act.compare(EVENT_ACTION_RAISE_STR) == 0) || (ev_act.compare(EVENT_ACTION_UNACK_STR) == 0)) {
-                    fv.second = to_string(stoi(fv.second.c_str())+1);
-                } else {
-                    fv.second = to_string(stoi(fv.second.c_str())-1);
-                }
-                temp.push_back(fv);
-            } else if (!fv.first.compare("acknowledged")) {
-                if (ev_act.compare(EVENT_ACTION_ACK_STR) == 0)  {
-                    fv.second = to_string(stoi(fv.second.c_str())+1);
-                } else if (ev_act.compare(EVENT_ACTION_UNACK_STR) == 0) { 
-                    fv.second = to_string(stoi(fv.second.c_str())-1);
-                }
-                temp.push_back(fv);
-            }
-        }
-        m_alarmStatsTable.set("state", temp);
-    } else {
-        SWSS_LOG_ERROR("Can not update alarm statistics (table does not exist)");
-    }
-}
-
-void EventConsume::updateEventStatistics(bool is_add, bool is_raise, bool is_ack, bool is_clear) {
-    vector<FieldValueTuple> vec;
-    vector<FieldValueTuple> temp;
-
-    if (m_eventStatsTable.get("state", vec)) {
-        for (auto fv: vec) {
-            if (!fv.first.compare("events")) {
-                if (is_add) {
-                    fv.second = to_string(stoi(fv.second.c_str())+1);
-                } else {
-                    fv.second = to_string(stoi(fv.second.c_str())-1);
-                }
-                temp.push_back(fv);
-            } else if (!fv.first.compare("raised")) {
-                if (is_raise) {
-                    if (is_add) {
-                        fv.second = to_string(stoi(fv.second.c_str())+1);
-                    } else {
-                        fv.second = to_string(stoi(fv.second.c_str())-1);
-                    }
-                    temp.push_back(fv);
-                }
-            } else if (!fv.first.compare("cleared")) {
-                if (is_clear) {
-                    if (is_add) {
-                        fv.second = to_string(stoi(fv.second.c_str())+1);
-                    } else {
-                        fv.second = to_string(stoi(fv.second.c_str())-1);
-                    }
-                    temp.push_back(fv);
-                }
-            } else if (!fv.first.compare("acked")) {
-                if (is_ack) {
-                    if (is_add) {
-                        fv.second = to_string(stoi(fv.second.c_str())+1);
-                    } else {
-                        fv.second = to_string(stoi(fv.second.c_str())-1);
-                    }
-                    temp.push_back(fv);
-                }
-            }
-        }
-
-        m_eventStatsTable.set("state", temp);
-    } else {
-        SWSS_LOG_ERROR("Can not update event statistics (table does not exist)");
-    }
-}
-
-void EventConsume::modifyEventStats(string seq_id) { 
-    vector<FieldValueTuple> rec;
-    m_eventTable.get(seq_id, rec);
-    bool is_raise = false;
-    bool is_clear = false;
-    bool is_ack = false;
-    for (auto fvr: rec) {
-        if (!fvr.first.compare("action")) {
-            if (!fvr.second.compare(EVENT_ACTION_RAISE_STR)) {
-                is_raise = true;
-            } else if (!fvr.second.compare(EVENT_ACTION_CLEAR_STR)) {
-                is_clear = true;
-            }
-        }
-        if (!fvr.first.compare("acknowledged")) {
-            if (!fvr.second.compare("true")) {
-                is_ack = true;
-            }
-        }
-    }
-    updateEventStatistics(false, is_raise, is_ack, is_clear);
-}
-
-void EventConsume::purge_events() {
-    SWSS_LOG_ENTER();
-    uint32_t size = event_history_list.size();
-
-    while (size >= m_count) {
-        pair <uint64_t,uint64_t> oldest_entry = event_history_list.top();
-        SWSS_LOG_NOTICE("Rollover based on count(%d/%d). Deleting %lu", size, m_count, oldest_entry.first);
-        m_eventTable.del(to_string(oldest_entry.first));
-        modifyEventStats(to_string(oldest_entry.first));
-        event_history_list.pop();
-        --size;
-    }
-
-    const auto p1 = system_clock::now();
-    unsigned tnow_seconds = duration_cast<seconds>(p1.time_since_epoch()).count();
-
-    while (!event_history_list.empty()) {
-        pair <uint64_t,uint64_t> oldest_entry = event_history_list.top();
-	    unsigned old_seconds = oldest_entry.second / 1000000000ULL;
-
-        if ((tnow_seconds - old_seconds) > PURGE_SECONDS) {
-            SWSS_LOG_NOTICE("Rollover based on time (%lu days). Deleting %lu.. now %u old %u", (PURGE_SECONDS/m_days), oldest_entry.second, tnow_seconds, old_seconds);
-            m_eventTable.del(to_string(oldest_entry.first));
-            modifyEventStats(to_string(oldest_entry.first));
-            event_history_list.pop();
-        } else {
-            return;
-        }
-    }
-    return;
-}
-
-void EventConsume::read_config_and_purge() {
-    m_days = 0;
-    m_count = 0;
-    // read from the manifest file
-    parse_config(m_dbProfile.c_str(), m_days, m_count);
-    SWSS_LOG_NOTICE("max-days %d max-records %d", m_days, m_count);
-
-    // update the nanosecond limit
-    PURGE_SECONDS *= m_days; 
-
-    // purge events based on # of days
-    purge_events();
-}
-
-void EventConsume::update_events(string seq_id, string ts, vector<FieldValueTuple> vec) {
-    // purge events based on # of days
-    purge_events();
-
-    // now add the event to the event table
-    m_eventTable.set(seq_id, vec);
-
-    // store it into the event history list
-    char* end;
-    uint64_t seq = strtoull(seq_id.c_str(), &end, 10);
-    uint64_t val = strtoull(ts.c_str(), &end, 10);
-    event_history_list.push(make_pair( seq, val ));
-}
-
-void EventConsume::resetAlarmStats(int alarms, int critical, int major, int minor, int warning, int acknowledged) {
-    vector<FieldValueTuple> temp;
-    FieldValueTuple fv;
-    map<int, string>::iterator it;
-    for (it = SYSLOG_SEVERITY_STR.begin(); it != SYSLOG_SEVERITY_STR.end(); it++) {
-        // there wont be any informational alarms
-        if (it->second.compare(EVENT_SEVERITY_CRITICAL_STR) == 0) {
-            fv = FieldValueTuple("critical", to_string(critical));
-            temp.push_back(fv);
-        } else if (it->second.compare(EVENT_SEVERITY_MAJOR_STR) == 0) {
-            fv = FieldValueTuple("major", to_string(major));
-            temp.push_back(fv);
-        } else if (it->second.compare(EVENT_SEVERITY_MINOR_STR) == 0) {
-            fv = FieldValueTuple("minor", to_string(minor));
-            temp.push_back(fv);
-        } else if (it->second.compare(EVENT_SEVERITY_WARNING_STR) == 0) {
-            fv = FieldValueTuple("warning", to_string(warning));
-            temp.push_back(fv);
-        }
-    }
-    fv = FieldValueTuple("alarms", to_string(alarms));
-    temp.push_back(fv);
-    fv = FieldValueTuple("acknowledged", to_string(acknowledged));
-    temp.push_back(fv);
-    m_alarmStatsTable.set("state", temp);
-}
-
-void EventConsume::clearAckAlarmStatistic() {
-    vector<FieldValueTuple> vec;
-    vector<FieldValueTuple> temp;
-
-    if (m_alarmStatsTable.get("state", vec)) {
-        for (auto fv: vec) {
-            if (!fv.first.compare("acknowledged")) {
-                fv.second = to_string(stoi(fv.second.c_str())-1);
-                temp.push_back(fv);
-                m_alarmStatsTable.set("state", temp);
-		return;
-            }
-        }
-    } 
-}
-
-
-void EventConsume::fetchFieldValues(const event_receive_op_t& evt, 
-                                    vector<FieldValueTuple>& vec, 
-                                    string& ev_id, 
-                                    string& ev_msg, 
-                                    string& ev_src, 
-                                    string& ev_act, 
-                                    string &ev_timestamp) {
-
-    ev_timestamp = to_string(evt.publish_epoch_ms);                          
-    vec.push_back(FieldValueTuple("time-created", ev_timestamp));
-    for (const auto& idx : evt.params) {
-        if (idx.first == "type-id") {
-            ev_id = idx.second;
-            vec.push_back(FieldValueTuple("type-id", ev_id));
-            SWSS_LOG_DEBUG("type-id: <%s> ", ev_id.c_str());
-        } else if (idx.first == "text") {
-            ev_msg = idx.second;
-            vec.push_back(FieldValueTuple("text", ev_msg));
-            SWSS_LOG_DEBUG("text: <%s> ", ev_msg.c_str());
-        } else if (idx.first == "resource") {
-            ev_src = idx.second;
-            vec.push_back(idx);
-            SWSS_LOG_DEBUG("resource: <%s> ", ev_src.c_str());
-        } else if (idx.first == "action") {
-            ev_act = idx.second;
-            // for events, action is empty
-            if (!ev_act.empty()) {
-                vec.push_back(FieldValueTuple("action", ev_act));
-            }
-        }
-    }
-}
-
-bool EventConsume::isFloodedEvent(string ev_src, string ev_act, string ev_id, string ev_msg) {
-    // flood protection. If a rogue application sends same event repeatedly, throttle repeated instances of that event
-    if (!flood_ev_resource.compare(ev_src) &&
-        !flood_ev_action.compare(ev_act) &&
-        !flood_ev_id.compare(ev_id) &&
-        !(flood_ev_msg.compare(ev_msg))) {
-            SWSS_LOG_INFO("Ignoring the event %s from %s action %s msg %s as it is repeated", ev_id.c_str(), ev_src.c_str(), ev_act.c_str(), ev_msg.c_str());
-            return true;
-    }
-
-    flood_ev_resource = ev_src;
-    flood_ev_action = ev_act;
-    flood_ev_id = ev_id;
-    flood_ev_msg = ev_msg;
-    return false;
-}
-
-bool EventConsume::staticInfoExists(string &ev_id, string &ev_act, string &ev_sev, string &ev_static_msg, vector<FieldValueTuple> &vec) {
-    auto it = static_event_table.find(ev_id);
-    if (it != static_event_table.end()) {
-        EventInfo tmp = (EventInfo) (it->second);
-        // discard the event as event_static_map shows enable is false for this event
-        if (tmp.enable == EVENT_ENABLE_FALSE_STR) {
-            SWSS_LOG_NOTICE("Discarding event <%s> as it is set to disabled", ev_id.c_str());
-            return false;;
-        }
-
-        // get severity in the map and store it in the db
-        ev_sev = tmp.severity;
-        ev_static_msg = tmp.static_event_msg;
-        SWSS_LOG_DEBUG("static info: <%s> <%s> ", tmp.severity.c_str(), tmp.static_event_msg.c_str());
-
-        FieldValueTuple seqfv1("severity", tmp.severity);
-        vec.push_back(seqfv1);
-        return true;
-    } else {
-        // dont process the incoming alarms if action is neither raise nor clear
-        // for ack/unack, no need for this check
-        if ((ev_act.compare(EVENT_ACTION_ACK_STR) && ev_act.compare(EVENT_ACTION_UNACK_STR))) {
-            // TODO currently, applications may raise events but default evprofile doesnt contain 
-            // ID info. This is planned for later. 
-            // Change it back to SWSS_LOG_ERROR once event profile contains event-ids
-            SWSS_LOG_DEBUG("static info NOT FOUND for <%s> ", ev_id.c_str());
-            return false;
-        }
-    }
-    return true;
-}
-
-bool EventConsume::udpateLocalCacheAndAlarmTable(string almkey, bool &ack_flag) {
-    // find and remove the raised alarm
-    uint64_t lookup_seq_id = 0;
-    auto it = cal_lookup_map.find(almkey);
-    if (it != cal_lookup_map.end()) {
-        lookup_seq_id = (uint64_t) (it->second);
-        cal_lookup_map.erase(almkey);
-
-        // get status of is_aknowledged flag so that we dont decrement counters twice
-        vector<FieldValueTuple> alm_rec;
-        m_alarmTable.get(to_string(lookup_seq_id), alm_rec);
-        for (auto fvr: alm_rec) {
-            if (!fvr.first.compare("acknowledged")) {
-                ack_flag = (fvr.second.compare("true") == 0) ? true : false;
-                break;
-            }
-        }
-
-        // delete the record from alarm table
-        m_alarmTable.del(to_string(lookup_seq_id));
-    } else {
-        // possible - when event profile removes alarms for which enable is false and application cleared them later.
-        // ignore by logging a debug message..
-        SWSS_LOG_INFO("Received alarm-clear for non-existing alarm %s", almkey.c_str());
-        return false;
-    }
-    return true;
-}
-
-void EventConsume::initStats() {
-    vector<FieldValueTuple> vec;
-    // possible after a cold-boot or very first time
-    if (! m_eventStatsTable.get("state", vec)) {
-        FieldValueTuple fv;
-        vector<FieldValueTuple> temp;
-
-        SWSS_LOG_DEBUG("resetting Event Statistics table");
-        fv = FieldValueTuple("events", to_string(0));
-        temp.push_back(fv);
-        fv = FieldValueTuple("raised", to_string(0));
-        temp.push_back(fv);
-        fv = FieldValueTuple("cleared", to_string(0));
-        temp.push_back(fv);
-        fv = FieldValueTuple("acked", to_string(0));
-        temp.push_back(fv);
-        m_eventStatsTable.set("state", temp);
-    }
-    if (! m_alarmStatsTable.get("state", vec)) {
-        SWSS_LOG_DEBUG("resetting Alarm Statistics table");
-        resetAlarmStats(0, 0, 0, 0, 0, 0);
-    }
-}
-
-void EventConsume::updateAckInfo(bool is_ack, string ev_timestamp, string ev_sev, string ev_act, string ev_src) {
-    vector<FieldValueTuple> ack_vec;
-
-    FieldValueTuple seqfv1("acknowledged", (is_ack ? "true" : "false"));
-    ack_vec.push_back(seqfv1);
-
-    FieldValueTuple seqfv2("acknowledge-time", ev_timestamp);
-    ack_vec.push_back(seqfv2);
-
-    // update alarm stats
-    updateAlarmStatistics(ev_sev, ev_act);
-
-    // update alarm/event tables for the "raise" record with ack flag and ack timestamp
-    // for ack/unack, ev_src contains the "seq-id"
-    m_alarmTable.set(ev_src, ack_vec);
-    m_eventTable.set(ev_src, ack_vec);
-}
-
-
-bool EventConsume::fetchRaiseInfo(vector<FieldValueTuple> &vec, string ev_src, string &ev_id, string &ev_sev, string &raise_act, 
-                                  string &raise_ack_flag, string &raise_ts) {
-    vector<FieldValueTuple> raise_vec;
-    if (!m_alarmTable.get(ev_src, raise_vec)) {
-        return false;
-    }
-    for (auto fv: raise_vec) {
-        if (!fv.first.compare("type-id")) {
-            ev_id = fv.second;
-            vec.push_back(fv);
-        }
-        if (!fv.first.compare("severity")) {
-            ev_sev = fv.second;
-            vec.push_back(fv);
-        }
-        if (!fv.first.compare("action")) {
-            raise_act = fv.second;
-        }
-        if (!fv.first.compare("acknowledged")) {
-            raise_ack_flag = fv.second;
-        }
-        if (!fv.first.compare("time-created")) {
-            raise_ts = fv.second;
-        }
-    }
-    return true;
-}
-
-
diff --git a/src/sonic-eventd/src/eventconsume.h b/src/sonic-eventd/src/eventconsume.h
deleted file mode 100644
index 36e75f7da..000000000
--- a/src/sonic-eventd/src/eventconsume.h
+++ /dev/null
@@ -1,54 +0,0 @@
-#ifndef __EVENTCONSUME_H__
-#define __EVENTCONSUME_H__
-
-#include <string>
-#include <map>
-#include "events.h"
-#include "eventutils.h"
-#include "dbconnector.h"
-#include "subscriberstatetable.h"
-
-using namespace swss;
-using namespace std;
-
-class EventConsume
-{
-public:
-    EventConsume(DBConnector *dbConn,
-                 string evProfile =EVENTD_DEFAULT_MAP_FILE,
-                 string dbProfile =EVENTD_CONF_FILE);
-    ~EventConsume();
-    void read_eventd_config(bool read_all=true);
-    void run();
-
-private:
-    Table m_eventTable;
-    Table m_alarmTable;
-    Table m_eventStatsTable;
-    Table m_alarmStatsTable;
-    u_int32_t m_days, m_count;
-    string m_evProfile;
-    string m_dbProfile;
-
-    void handle_notification(const event_receive_op_t& evt);
-    void read_events();
-    void updateAlarmStatistics(string ev_sev, string ev_act);
-    void updateEventStatistics(bool is_add, bool is_alarm, bool is_ack, bool is_clear);
-    void read_config_and_purge();
-    void update_events(string seq_id, string ts, vector<FieldValueTuple> vec);
-    void purge_events();
-    void modifyEventStats(string seq_id);
-    void clearAckAlarmStatistic();
-    void resetAlarmStats(int, int, int, int, int, int);
-    void fetchFieldValues(const event_receive_op_t& evt , vector<FieldValueTuple> &, string &, string &, string &, string &, string &);
-    bool isFloodedEvent(string, string, string, string);
-    bool staticInfoExists(string &, string &, string &, string &, vector<FieldValueTuple> &);
-    bool udpateLocalCacheAndAlarmTable(string, bool &);
-    void initStats();
-    void updateAckInfo(bool, string, string, string, string);
-    bool fetchRaiseInfo(vector<FieldValueTuple> &, string, string &, string &, string &, string &, string &);
-};
-
-
-#endif /* __EVENTCONSUME_H__ */
-
diff --git a/src/sonic-eventd/src/eventdb.cpp b/src/sonic-eventd/src/eventdb.cpp
deleted file mode 100644
index 9b162416b..000000000
--- a/src/sonic-eventd/src/eventdb.cpp
+++ /dev/null
@@ -1,30 +0,0 @@
-#include "eventconsume.h"
-#include <csignal>
-
-static EventConsume *evtd_instance = NULL;
-
-void signalHandler(const int signal) { 
-    SWSS_LOG_NOTICE("in signalHandler");
-
-    if (signal == SIGINT) {
-        evtd_instance->read_eventd_config();
-    }
-}
-
-int main()
-{
-    swss::Logger::getInstance().setMinPrio(swss::Logger::SWSS_DEBUG);
-
-    swss::DBConnector eventDb("EVENT_DB", 0);
-    
-    // register signal SIGINT and signal handler  
-    signal(SIGINT, signalHandler);
-
-    EventConsume evtd(&eventDb);
-    evtd_instance = &evtd;
-
-    evtd.run();
-
-    return 0;
-}
-
diff --git a/src/sonic-eventd/src/eventutils.cpp b/src/sonic-eventd/src/eventutils.cpp
deleted file mode 100644
index 0a977b447..000000000
--- a/src/sonic-eventd/src/eventutils.cpp
+++ /dev/null
@@ -1,76 +0,0 @@
-#include "eventutils.h"
-#include <swss/logger.h>
-#include <swss/table.h>
-#include <string.h>
-#include <cstdlib>
-#include <iostream>
-#include <fstream>
-#include <sstream>
-#include <vector>
-#include <unistd.h>
-#include <nlohmann/json.hpp>
-
-
-using namespace swss;
-using json = nlohmann::json;
-
-bool isValidSeverity(string severityStr) {
-    transform(severityStr.begin(), severityStr.end(), severityStr.begin(), ::toupper);
-    if (severityStr == EVENT_SEVERITY_MAJOR_STR) return true;
-    if (severityStr == EVENT_SEVERITY_CRITICAL_STR) return true;
-    if (severityStr == EVENT_SEVERITY_MINOR_STR) return true;
-    if (severityStr == EVENT_SEVERITY_WARNING_STR) return true;
-    if (severityStr == EVENT_SEVERITY_INFORMATIONAL_STR) return true;
-    return false;
-}
-
-bool isValidEnable(string enableStr) {
-    if (enableStr == EVENT_ENABLE_TRUE_STR) return true;
-    if (enableStr == EVENT_ENABLE_FALSE_STR) return true;
-    return false;
-}
-
-bool parse_config(const char *filename, unsigned int& days, unsigned int& count) {
-    days = EHT_MAX_DAYS;
-    count = EHT_MAX_ELEMS;
-    std::ifstream ifs(filename);
-    json j = json::parse(ifs);
-    for (json::iterator it = j.begin(); it != j.end(); ++it) {
-        if(it.key() == "max-days") {
-            days = it.value();
-        }
-        if(it.key() == "max-records") {
-            count = it.value();
-        }
-    }
-    return true;
-}
-
-bool parse(const char *filename, EventMap& tmp_event_table) {
-    ifstream fs(filename);
-    if (!fs.is_open()) {
-        return false;
-    }
-
-    fstream file(filename, fstream::in);
-    json j;
-    file >> j;
-
-    if (j["events"].size() == 0) {
-        SWSS_LOG_ERROR("No entries in 'events' field in %s", filename);
-        return false;
-    }
-
-    for (size_t i = 0; i < j["events"].size(); i++) {
-        auto elem = j["events"][i];
-        struct EventInfo_t ev_info;
-        string ev_name = elem["name"];
-        ev_info.severity = elem["severity"];
-        ev_info.enable = elem["enable"];
-        ev_info.static_event_msg = elem["message"];
-        tmp_event_table.emplace(ev_name, ev_info);
-    }
-
-    return true;
-}
-
diff --git a/src/sonic-eventd/src/eventutils.h b/src/sonic-eventd/src/eventutils.h
deleted file mode 100644
index 8ec6d3955..000000000
--- a/src/sonic-eventd/src/eventutils.h
+++ /dev/null
@@ -1,43 +0,0 @@
-#ifndef __EVENTUTILS_H__
-#define __EVENTUTILS_H__
-
-#include <string>
-#include <unordered_map>
-
-using namespace std;
-
-const string EVENT_SEVERITY_CRITICAL_STR = "CRITICAL";
-const string EVENT_SEVERITY_MAJOR_STR    = "MAJOR";
-const string EVENT_SEVERITY_MINOR_STR    = "MINOR";
-const string EVENT_SEVERITY_WARNING_STR  = "WARNING";
-const string EVENT_SEVERITY_INFORMATIONAL_STR = "INFORMATIONAL";
-
-const string EVENT_ENABLE_TRUE_STR  = "true";
-const string EVENT_ENABLE_FALSE_STR = "false";
-
-const string EVENT_ACTION_RAISE_STR  = "RAISE";
-const string EVENT_ACTION_CLEAR_STR  = "CLEAR";
-const string EVENT_ACTION_ACK_STR    = "ACKNOWLEDGE";
-const string EVENT_ACTION_UNACK_STR  = "UNACKNOWLEDGE";
-
-constexpr char EVENTD_DEFAULT_MAP_FILE[] = "/etc/evprofile/default.json";
-
-constexpr size_t EHT_MAX_ELEMS    = 40000;
-constexpr size_t EHT_MAX_DAYS     = 30;
-constexpr char EVENTD_CONF_FILE[] = "/etc/eventd.json";
-
-typedef struct EventInfo_t {
-    string  severity;
-    string  enable;
-    string  static_event_msg;
-} EventInfo;
-
-//unordered_map<string, EventInfo> static_event_table;
-typedef unordered_map<string, EventInfo> EventMap; 
-
-bool isValidSeverity(string severityStr);
-bool isValidEnable(string enableStr);
-bool parse_config(const char *filename, unsigned int& days, unsigned int& count);
-bool parse(const char *filename, EventMap& tmp_event_table);
-
-#endif
diff --git a/src/sonic-eventd/src/loghandler.cpp b/src/sonic-eventd/src/loghandler.cpp
deleted file mode 100755
index d560ccc2e..000000000
--- a/src/sonic-eventd/src/loghandler.cpp
+++ /dev/null
@@ -1,37 +0,0 @@
-#include <iostream>
-#include <syslog.h>
-
-extern "C" void openSyslog() {
-    openlog (NULL, LOG_CONS | LOG_PID | LOG_NDELAY, LOG_LOCAL4);
-}
-
-extern "C" void writeToSyslog(std::string ev_id, int ev_sev, std::string ev_type, std::string ev_act, std::string ev_msg, std::string ev_static_msg) {
-    int SYSLOG_FACILITY = LOG_LOCAL4;
-    if (ev_act.empty()) {
-        const char LOG_FORMAT[] = "[%s], %%%s: %s %s"; 
-                                                      // event Type
-                                                      // Event Name
-                                                      // Static Desc
-                                                      // Dynamic Desc
-
-        // raise a syslog message
-        syslog(LOG_MAKEPRI(ev_sev, SYSLOG_FACILITY), LOG_FORMAT,
-            ev_type.c_str(), 
-            ev_id.c_str(), ev_static_msg.c_str(), ev_msg.c_str());
-    } else {
-        const char LOG_FORMAT[] = "[%s] (%s), %%%s: %s %s"; 
-                                                      // event Type
-                                                      // event action
-                                                      // Event Name
-                                                      // Static Desc
-                                                      // Dynamic Desc
-        // raise a syslog message
-        syslog(LOG_MAKEPRI(ev_sev, SYSLOG_FACILITY), LOG_FORMAT,
-            ev_type.c_str(), ev_act.c_str(), 
-            ev_id.c_str(), ev_static_msg.c_str(), ev_msg.c_str());
-    }
-}
-
-extern "C" void closeSyslog() {
-    closelog ();
-}
diff --git a/src/sonic-eventd/src/loghandler.h b/src/sonic-eventd/src/loghandler.h
deleted file mode 100644
index 1e98a9401..000000000
--- a/src/sonic-eventd/src/loghandler.h
+++ /dev/null
@@ -1,5 +0,0 @@
-#include <iostream>
-extern "C" void openSyslog();
-extern "C" void writeToSyslog(std::string ev_id, int ev_sev, std::string ev_type, std::string ev_act, std::string ev_msg, std::string ev_static_msg);
-extern "C" void closeSyslog();
-
diff --git a/src/sonic-eventd/src/subdir.mk b/src/sonic-eventd/src/subdir.mk
index 1b03f3d4b..eb067fd6e 100644
--- a/src/sonic-eventd/src/subdir.mk
+++ b/src/sonic-eventd/src/subdir.mk
@@ -1,11 +1,9 @@
 CC := g++
 
-TEST_OBJS += ./src/eventd.o ./src/eventconsume.o ./src/eventutils.o ./src/loghandler.o
-EVENTDB_TEST_OBJS += ./src/eventd.o ./src/eventconsume.o ./src/eventutils.o ./src/loghandler.o
+TEST_OBJS += ./src/eventd.o
 OBJS += ./src/eventd.o ./src/main.o
-EVENTDB_OBJS += ./src/eventdb.o ./src/eventconsume.o ./src/loghandler.o ./src/eventutils.o
 
-C_DEPS += ./src/eventd.d ./src/main.d ./src/eventdb.d ./src/eventconsume.d ./src/loghandler.d ./src/eventutils.d
+C_DEPS += ./src/eventd.d ./src/main.d
 
 src/%.o: src/%.cpp
 	@echo 'Building file: $<'
diff --git a/src/sonic-eventd/tests/default.json b/src/sonic-eventd/tests/default.json
deleted file mode 100755
index 9a1511188..000000000
--- a/src/sonic-eventd/tests/default.json
+++ /dev/null
@@ -1,24 +0,0 @@
-{
-    "__README__" : "This is default map of events that eventd uses. Developer can modify this file and send SIGINT to eventd to make it read and use the updated file. Alternatively developer can test the new event by adding it to a custom event profile and use 'event profile <filename>' command to apply that profile without having to send SIGINT to eventd. Developer need to commit default.json file with the new event after testing it out. Supported severities are: CRITICAL, MAJOR, MINOR, WARNING and INFORMATIONAL. Supported enable flag values are: true and false.",
-    "events":[
-        {
-            "name": "SYSTEM_STATE",
-            "severity": "INFORMATIONAL",
-            "enable": "true",
-            "message" : ""
-        },
-        {
-            "name": "SENSOR_TEMP_HIGH",
-            "severity": "WARNING",
-            "enable": "true",
-            "message" : ""
-        },        
-        {
-            "name": "USER_LOGIN",
-            "severity": "INFORMATIONAL",
-            "enable": "true",
-            "message" : ""
-	    }
-    ]
-}
-           
diff --git a/src/sonic-eventd/tests/eventd.json b/src/sonic-eventd/tests/eventd.json
deleted file mode 100755
index 2236e0c6a..000000000
--- a/src/sonic-eventd/tests/eventd.json
+++ /dev/null
@@ -1,5 +0,0 @@
-{
-    "__README__": "Specify size of event history table. Whichever limit is hit first, eventd wraps event history table around and deletes older records.",
-    "max-records": 200,
-    "max-days": 30
-}
diff --git a/src/sonic-eventd/tests/eventdb_database_config.json b/src/sonic-eventd/tests/eventdb_database_config.json
deleted file mode 100644
index 3fb6d6339..000000000
--- a/src/sonic-eventd/tests/eventdb_database_config.json
+++ /dev/null
@@ -1,107 +0,0 @@
-{
-    "INSTANCES": {
-        "redis":{
-            "hostname" : "127.0.0.1",
-            "port": 6379,
-            "unix_socket_path": "/var/run/redis/redis.sock"
-        },
-        "redis1":{
-            "hostname" : "127.0.0.1",
-            "port": 6380,
-            "unix_socket_path": "/var/run/redis/redis1.sock"
-        },
-        "redis2":{
-            "hostname" : "127.0.0.1",
-            "port": 6381,
-            "unix_socket_path": "/var/run/redis/redis2.sock"
-        },
-        "redis3":{
-            "hostname" : "127.0.0.1",
-            "port": 6382,
-            "unix_socket_path": "/var/run/redis/redis3.sock"
-        },
-        "redis4":{
-            "hostname" : "127.0.0.1",
-            "port": 6383,
-            "unix_socket_path": "/var/run/redis/redis4.sock"
-        }
-    },
-    "DATABASES" : {
-        "APPL_DB" : {
-            "id" : 0,
-            "separator": ":",
-            "instance" : "redis"
-        },
-        "ASIC_DB" : {
-            "id" : 1,
-            "separator": ":",
-            "instance" : "redis"
-        },
-        "COUNTERS_DB" : {
-            "id" : 2,
-            "separator": ":",
-            "instance" : "redis"
-        },
-        "CONFIG_DB" : {
-            "id" : 4,
-            "separator": "|",
-            "instance" : "redis"
-        },
-        "PFC_WD_DB" : {
-            "id" : 5,
-            "separator": ":",
-            "instance" : "redis"
-        },
-        "FLEX_COUNTER_DB" : {
-            "id" : 5,
-            "separator": ":",
-            "instance" : "redis"
-        },
-        "STATE_DB" : {
-            "id" : 6,
-            "separator": "|",
-            "instance" : "redis"
-        },
-        "SNMP_OVERLAY_DB" : {
-            "id" : 7,
-            "separator": "|",
-            "instance" : "redis"
-        },
-        "RESTAPI_DB": {
-            "id": 8,
-            "separator": "|",
-            "instance": "redis"
-        },
-        "GB_ASIC_DB": {
-            "id": 9,
-            "separator": ":",
-            "instance": "redis"
-        },
-        "GB_COUNTERS_DB": {
-            "id": 10,
-            "separator": ":",
-            "instance": "redis"
-        },
-        "GB_FLEX_COUNTER_DB": {
-            "id": 11,
-            "separator": ":",
-            "instance": "redis"
-        },
-        "STATE_DB2" : {
-            "id" : 13,
-            "separator": "|",
-            "instance" : "redis"
-        },
-        "APPL_STATE_DB" : {
-            "id" : 14,
-            "separator": ":",
-            "instance" : "redis"
-        },
-        "EVENT_DB" : {
-            "id" : 15,
-            "separator": ":",
-            "instance" : "redis"
-        }   
-    },
-    "VERSION" : "1.0"
-}
diff --git a/src/sonic-eventd/tests/eventdb_database_config_global.json b/src/sonic-eventd/tests/eventdb_database_config_global.json
deleted file mode 100644
index e55e1ab1b..000000000
--- a/src/sonic-eventd/tests/eventdb_database_config_global.json
+++ /dev/null
@@ -1,8 +0,0 @@
-{
-    "INCLUDES" : [
-        {
-            "include" : "eventdb_database_config.json"
-        }
-    ],
-    "VERSION" : "1.0"
-}
diff --git a/src/sonic-eventd/tests/eventdb_ut.cpp b/src/sonic-eventd/tests/eventdb_ut.cpp
deleted file mode 100644
index a3e9e4aba..000000000
--- a/src/sonic-eventd/tests/eventdb_ut.cpp
+++ /dev/null
@@ -1,434 +0,0 @@
-#include<string>
-#include "gtest/gtest.h"
-#include "events_common.h"
-#include "events.h"
-#include <unordered_map>
-#include "dbconnector.h"
-#include <iostream>
-
-#include<sstream>
-#include "../src/eventd.h"
-#include "../src/eventconsume.h"
-
-using namespace std;
-using namespace swss;
-
-extern volatile bool g_run;
-extern uint64_t seq_id;
-extern uint64_t PURGE_SECONDS;
-extern unordered_map<string, uint64_t> cal_lookup_map;
-typedef pair<uint64_t, uint64_t> pi;
-extern priority_queue<pi, vector<pi>, greater<pi> > event_history_list;
-extern EventMap static_event_table;
-
-
-#define TEST_DB  "APPL_DB"
-#define TEST_NAMESPACE  "asic0"
-#define INVALID_NAMESPACE  "invalid"
-
-//extern void run_pub(void *mock_pub, const string wr_source, internal_events_lst_t &lst);
-
-string existing_file = "./tests//eventdb_database_config.json";
-string nonexisting_file = "./tests//database_config_nonexisting.json";
-string global_existing_file = "./tests//eventdb_database_global.json";
-
-
-
-typedef struct {
-    map<string, string> ev_data;
-    string severity;
-} ev_data_struct;
-map<pair<string, string>, ev_data_struct> event_data_t = {
-    {{"SYSTEM_STATE","NOTIFY"}, 
-      {{{"type-id","SYSTEM_STATE"}, {"resource", "system-state"}, {"text", "System Ready"}},
-      "INFORMATIONAL"}},
-    {{"INTERFACE_OPER_STATE", "NOTIFY"}, 
-      {{{"type-id", "INTERFACE_OPER_STATE"}, {"resource", "Ethernet1"}, {"text", "Operational Down"}, {"state", "up"}},
-      "INFORMATIONAL"}},  
-    {{"SENSOR_TEMP_HIGH", "RAISE"},
-        {{{"type-id", "SENSOR_TEMP_HIGH"}, {"resource", "cpu_sensor"}, {"action", "RAISE"}, {"text", "sensor temp 55C, threshold temp 52C"}},
-        "WARNING"}},
-    {{"SENSOR_TEMP_HIGH", "CLEAR"},
-        {{{"type-id", "SENSOR_TEMP_HIGH"}, {"resource", "cpu_sensor"}, {"action", "CLEAR"}, {"text", "sensor temp 50C, threshold temp 52C"}},
-        "WARNING"}}
-};
-
-
-typedef struct {
-    int id;
-    string source;
-    string tag;
-    string rid;
-    string seq;
-} test_data_t;
-
-const string event_profile = "tests/default.json";
-const string event_db_profile = "tests/eventd.json";
-
-void delete_evdb(DBConnector& dbConn)
-{
-    auto keys = dbConn.keys("*");
-    for (const auto& key : keys)
-    {
-        dbConn.del(key);
-    }
-}
-
-void clear_eventdb_data()
-{
-    g_run = true;
-    seq_id =0;
-    cal_lookup_map.clear();
-    PURGE_SECONDS = 86400;
-    event_history_list = priority_queue<pi, vector<pi>, greater<pi> >();
-    static_event_table.clear();
-}
-
-void run_pub(void *mock_pub, const string wr_source, internal_events_lst_t &lst)
-{
-    for(internal_events_lst_t::const_iterator itc = lst.begin(); itc != lst.end(); ++itc) {
-        EXPECT_EQ(0, zmq_message_send(mock_pub, wr_source, *itc));
-    }
-}
-
-class EventDbFixture : public ::testing::Test { 
-    protected:
-    void SetUp() override {
-        zctx = zmq_ctx_new();
-        EXPECT_TRUE(NULL != zctx);
-
-        /* Run proxy to enable receive as capture test needs to receive */
-        pxy = new eventd_proxy(zctx);
-        EXPECT_TRUE(NULL != pxy);
-
-        /* Starting proxy */
-        EXPECT_EQ(0, pxy->init());
-        DBConnector eventDb("EVENT_DB", 0, true);
-        //delete any entries in the EVENT_DB        
-        delete_evdb(eventDb);
-
-        try
-        {
-            /* Start Eventdb in a separate thread*/
-            evtConsume= new EventConsume(&eventDb, event_profile, event_db_profile);
-            thread thr(&EventConsume::run, evtConsume);
-            thr.detach();
-        }
-        catch (exception &e)
-        {
-            printf("EventDbFixture::SetUP: Unable to get DB Connector, e=(%s)\n", e.what());
-       }
-    }
-    
-    void TearDown() override {
-        delete evtConsume;
-        evtConsume = NULL;
-        delete pxy;
-        pxy= NULL;
-        zmq_ctx_term(zctx);
-        zctx = NULL;
-        clear_eventdb_data();
-    }
-    EventConsume *evtConsume;
-    void *zctx;
-    eventd_proxy *pxy;
-};
-
-
-void *init_publish(void *zctx)
-{
-    void *mock_pub = zmq_socket (zctx, ZMQ_PUB);
-    EXPECT_TRUE(NULL != mock_pub);
-    EXPECT_EQ(0, zmq_connect(mock_pub, get_config(XSUB_END_KEY).c_str()));
-
-    /* Provide time for async connect to complete */
-    this_thread::sleep_for(chrono::milliseconds(200));
-
-    return mock_pub;
-}
-
-internal_event_t create_ev(const int id, const int ev_id, const string& event,
-                           const string& action,
-                           map<string, unordered_map<string, string>> &verify_data)
-{
-    internal_event_t event_data;
-    stringstream ss;
-
-    test_data_t data;
-    data.id = id;
-    data.source = "source" + to_string(id);
-    data.tag = "tag" + to_string(id);
-    data.rid = "guid-" + to_string(id);
-    data.seq = to_string(id);
-
-    event_data[EVENT_STR_DATA] = convert_to_json(
-            data.source + ":" + data.tag, map(event_data_t[make_pair(event, action)].ev_data));
-    event_data[EVENT_RUNTIME_ID] = data.rid;
-    event_data[EVENT_SEQUENCE] = data.seq;
-    auto timepoint = system_clock::now();
-    ss << duration_cast<nanoseconds>(timepoint.time_since_epoch()).count();
-
-    event_data[EVENT_EPOCH] = ss.str();
-    unordered_map<string, string> ev_val(event_data_t[make_pair(event, action)].ev_data.begin(),
-                                         event_data_t[make_pair(event, action)].ev_data.end());
-    ev_val.insert({{"id", to_string(ev_id)}});
-    ev_val.insert({{"time-created", ss.str()}});
-    ev_val.insert({{"severity", event_data_t[make_pair(event, action)].severity}});
-
-    if (action == "RAISE") {
-        ev_val.insert({{"acknowledged", "false"}});
-        ev_val.insert({{"action", action}});
-    }
-    verify_data.insert({to_string(ev_id), ev_val});
-
-    return event_data;
-}
-
-
-void verify_events(map<string, unordered_map<string, string>> verifyData) 
-{
-    DBConnector eventDb("EVENT_DB", 0, true);
-    auto dbKeys = eventDb.keys("EVENT:*");
-    EXPECT_EQ(verifyData.size(), dbKeys.size());
-
-    for (const auto& vKey : verifyData)
-    {
-        string evtKey = "EVENT:" + vKey.first;
-        EXPECT_TRUE(count(dbKeys.begin(), dbKeys.end(), evtKey) == 1);
-        auto ev = eventDb.hgetall(evtKey);
-        EXPECT_TRUE(ev == verifyData[vKey.first]);
-    }
-}
-
-
-void verify_alarms_clear(map<string, unordered_map<string, string>> verifyData)
-{
-    DBConnector eventDb("EVENT_DB", 0, true);
-    auto dbKeys = eventDb.keys("ALARM:*");
-    EXPECT_EQ(0, dbKeys.size());
-}
-
-void verify_alarms_raise(map<string, unordered_map<string, string>> verifyData) 
-{
-    DBConnector eventDb("EVENT_DB", 0, true);
-    auto dbKeys = eventDb.keys("ALARM:*");
-    EXPECT_EQ(verifyData.size(), dbKeys.size());
-
-    for (const auto& vKey : verifyData)
-    {
-        string almKey = "ALARM:" + vKey.first;
-        EXPECT_TRUE(count(dbKeys.begin(), dbKeys.end(), almKey) == 1);
-        auto ev = eventDb.hgetall(almKey);
-        EXPECT_TRUE(ev == verifyData[vKey.first]);
-    }
-}
-
-TEST_F(EventDbFixture, validate_events)
-{  
-    printf("Validate events TEST started\n");
-
-    internal_events_lst_t wr_evts;
-    string wr_source("eventd-test");        
-
-    void *mock_pub = init_publish(zctx);
-
-    map<string, unordered_map<string, string>> verify_data;
-
-    wr_evts.push_back(create_ev(1, 1, "SENSOR_TEMP_HIGH", "RAISE", verify_data));
-    wr_evts.push_back(create_ev(2, 2, "SYSTEM_STATE", "NOTIFY", verify_data));
-
-    run_pub(mock_pub, wr_source, wr_evts);
-
-    this_thread::sleep_for(chrono::milliseconds(2000));
-  
-    // verify events logged in DB.
-    verify_events(verify_data);
-
-    //send events to close eventdb task
-    g_run = false;
-        wr_evts.clear();
-    wr_evts.push_back(create_ev(301, 3, "SYSTEM_STATE", "NOTIFY", verify_data));
-    run_pub(mock_pub, wr_source, wr_evts);
-    this_thread::sleep_for(chrono::milliseconds(2000));
-    zmq_close(mock_pub);
-
-    printf("Validate events TEST completed\n");
- 
-}
-
-
-TEST_F(EventDbFixture, validate_alarms)
-{  
-    printf("Validate alarms TEST started\n");
-    internal_events_lst_t wr_evts;
-    string wr_source("eventd-test");
-    void *mock_pub = init_publish(zctx);
-
-    map<string, unordered_map<string, string>> verify_data;
-    wr_evts.push_back(create_ev(3, 1, "SENSOR_TEMP_HIGH", "RAISE", verify_data));
- 
-    run_pub(mock_pub, wr_source, wr_evts);
-
-    this_thread::sleep_for(chrono::milliseconds(2000));
-
-    // verify events logged in DB.
-    verify_events(verify_data);
-    verify_alarms_raise(verify_data);
-
-    wr_evts.clear();
-    wr_evts.push_back(create_ev(4, 2, "SENSOR_TEMP_HIGH", "CLEAR", verify_data));
-
-    run_pub(mock_pub, wr_source, wr_evts);
-    this_thread::sleep_for(chrono::milliseconds(2000));
-    verify_events(verify_data);
-    verify_alarms_clear(verify_data);
-    g_run = false;
-        wr_evts.clear();
-    wr_evts.push_back(create_ev(302, 3, "SYSTEM_STATE", "NOTIFY", verify_data));
-    run_pub(mock_pub, wr_source, wr_evts); 
-    this_thread::sleep_for(chrono::milliseconds(2000));
-    zmq_close(mock_pub);
-    printf("Validate alarms TEST completed\n");
-}
-
-
-TEST_F(EventDbFixture, expiry_purge)
-{
-    printf("Expiry purge TEST started\n");
-    internal_events_lst_t wr_evts;
-    string wr_source("eventd-test");
-    void *mock_pub = init_publish(zctx);
-    map<string, unordered_map<string, string>> verify_data;
-    //set epoch time back to 31 days
-    auto timepoint = system_clock::now();
-    auto epochTimeNs = duration_cast<nanoseconds>(timepoint.time_since_epoch()).count();
-    epochTimeNs = epochTimeNs - (32UL * 24 * 60 * 60 * 1000 * 1000 * 1000);
-    auto ev_data = create_ev(5, 1, "SENSOR_TEMP_HIGH", "RAISE", verify_data);
-
-    ev_data[EVENT_EPOCH] = to_string(epochTimeNs);
-    verify_data["1"]["time-created"] = ev_data[EVENT_EPOCH];
-    wr_evts.push_back(ev_data);
-
-    run_pub(mock_pub, wr_source, wr_evts);
-    this_thread::sleep_for(chrono::milliseconds(2000));
-
-    // verify events logged in DB.
-    verify_events(verify_data);
-    verify_alarms_raise(verify_data);
-
-    wr_evts.clear();
-    verify_data.clear();
-    wr_evts.push_back(create_ev(6, 2, "SENSOR_TEMP_HIGH", "CLEAR", verify_data));
-    run_pub(mock_pub, wr_source, wr_evts);
-    this_thread::sleep_for(chrono::milliseconds(2000));
-
-    verify_events(verify_data);
-    verify_alarms_clear(verify_data);
-    wr_evts.clear();
-    g_run = false;
-    wr_evts.push_back(create_ev(303, 3, "SYSTEM_STATE", "NOTIFY", verify_data));
-    run_pub(mock_pub, wr_source, wr_evts); 
-    this_thread::sleep_for(chrono::milliseconds(2000));    
-    zmq_close(mock_pub);
-    printf("Expiry purge TEST completed\n");    
-}
-
-
-TEST_F(EventDbFixture, rollover_purge)
-{
-    printf("Rollover purge TEST started\n");
-    internal_events_lst_t wr_evts;
-    string wr_source("eventd-test");
-    void *mock_pub = init_publish(zctx);
-    map<string, unordered_map<string, string>> verify_data;
-    int i=0,j=6;
-
-    for (; i <= 198; i+=2, j+=2)
-    {
-        wr_evts.push_back(create_ev(j+1, i+1, "SENSOR_TEMP_HIGH", "RAISE", verify_data));
-        wr_evts.push_back(create_ev(j+2, i+2, "SENSOR_TEMP_HIGH", "CLEAR", verify_data));
-    }
-
-    run_pub(mock_pub, wr_source, wr_evts);
-
-    this_thread::sleep_for(chrono::milliseconds(5000));
-
-    // verify events logged in DB.
-    verify_events(verify_data);
-    // This will make it out of limit
-    wr_evts.push_back(create_ev(j+1, i+1, "SENSOR_TEMP_HIGH", "RAISE", verify_data));
-    run_pub(mock_pub, wr_source, wr_evts);
-
-    this_thread::sleep_for(chrono::milliseconds(2000));
-
-    DBConnector eventDb("EVENT_DB", 0, true);
-    auto dbKeys = eventDb.keys("EVENT:*");
-    EXPECT_EQ(200, dbKeys.size());
-    EXPECT_TRUE(count(dbKeys.begin(), dbKeys.end(), "EVENT:1") == 0);
-    EXPECT_TRUE(count(dbKeys.begin(), dbKeys.end(), "EVENT:2") == 1);
-    EXPECT_TRUE(count(dbKeys.begin(), dbKeys.end(), "EVENT:" + to_string(i+1)) == 1);
-    g_run = false;
-    wr_evts.push_back(create_ev(303, 3, "SYSTEM_STATE", "NOTIFY", verify_data));
-    run_pub(mock_pub, wr_source, wr_evts); 
-    this_thread::sleep_for(chrono::milliseconds(2000));        
-    zmq_close(mock_pub);
-    printf("Rollover purge TEST completed\n");
-}
-
-class SwsscommonEnvironment : public ::testing::Environment {
-public:
-    // Override this to define how to set up the environment
-    void SetUp() override {
-        // by default , init should be false
-        cout << "Default : isInit = " << SonicDBConfig::isInit() << endl;
-        EXPECT_FALSE(SonicDBConfig::isInit());
-        EXPECT_THROW(SonicDBConfig::initialize(nonexisting_file), runtime_error);
-
-        EXPECT_FALSE(SonicDBConfig::isInit());
-
-        // load local config file, init should be true
-        SonicDBConfig::initialize(existing_file);
-        cout << "INIT: load local db config file, isInit = " << SonicDBConfig::isInit() << endl;
-        EXPECT_TRUE(SonicDBConfig::isInit());
-
-        // Test the database_global.json file
-        // by default , global_init should be false
-        cout << "Default : isGlobalInit = " << SonicDBConfig::isGlobalInit() << endl;
-        EXPECT_FALSE(SonicDBConfig::isGlobalInit());
-
-        // Call an API which actually needs the data populated by SonicDBConfig::initializeGlobalConfig
-//        EXPECT_THROW(SonicDBConfig::getDbId(EVENT_DB, TEST_NAMESPACE), runtime_error);
-
-        // load local global file, init should be true
-        SonicDBConfig::initializeGlobalConfig(global_existing_file);
-        cout<<"INIT: load global db config file, isInit = "<<SonicDBConfig::isGlobalInit()<<endl;
-        EXPECT_TRUE(SonicDBConfig::isGlobalInit());
-
-        // Call an API with wrong namespace passed
-        cout << "INIT: Invoking SonicDBConfig::getDbId(APPL_DB, invalid)" << endl;
-//        EXPECT_THROW(SonicDBConfig::getDbId(EVENT_DB, INVALID_NAMESPACE), out_of_range);
-
-        // Get this info handy
-        try
-        {
-            DBConnector db("EVENT_DB", 0, true);
-        }
-        catch (exception &e)
-        {
-            printf("Unable to get DB Connector, e=(%s)\n", e.what());            
-            GTEST_SKIP() << "Condition not met";
-        }
-    }
-};
-
-
-int main(int argc, char* argv[])
-{
-    testing::InitGoogleTest(&argc, argv);
-    // Registers a global test environment, and verifies that the
-    // registration function returns its argument.
-    
-    SwsscommonEnvironment* const env = new SwsscommonEnvironment;
-    testing::AddGlobalTestEnvironment(env);
-    return RUN_ALL_TESTS();
-}
diff --git a/src/sonic-eventd/tests/subdir.mk b/src/sonic-eventd/tests/subdir.mk
index 757d7bfdd..a251b4bea 100644
--- a/src/sonic-eventd/tests/subdir.mk
+++ b/src/sonic-eventd/tests/subdir.mk
@@ -1,10 +1,8 @@
 CC := g++
 
-TEST_OBJS += ./tests/eventd_ut.o  ./tests/main.o 
+TEST_OBJS += ./tests/eventd_ut.o ./tests/main.o
 
-C_DEPS += ./tests/eventd_ut.d ./tests/main.d ./tests/eventdb_ut.d
-
-EVENTDB_TEST_OBJS += ./tests/eventdb_ut.o
+C_DEPS += ./tests/eventd_ut.d ./tests/main.d
 
 tests/%.o: tests/%.cpp
 	@echo 'Building file: $<'
@@ -12,4 +10,3 @@ tests/%.o: tests/%.cpp
 	$(CC) -D__FILENAME__="$(subst tests/,,$<)" $(CFLAGS) -c -fmessage-length=0 -MMD -MP -MF"$(@:%.o=%.d)" -MT"$(@)" -o "$@" "$<"
 	@echo 'Finished building: $<'
 	@echo ' '
-
diff --git a/src/sonic-eventd/var/evprofile/default.json b/src/sonic-eventd/var/evprofile/default.json
deleted file mode 100644
index af4166fc0..000000000
--- a/src/sonic-eventd/var/evprofile/default.json
+++ /dev/null
@@ -1,7 +0,0 @@
-{
-    "__README__" : "This is default map of events that eventd uses. Developer can modify this file and send SIGINT to eventd to make it read and use the updated file. Alternatively developer can test the new event by adding it to a custom event profile and use 'event profile <filename>' command to apply that profile without having to send SIGINT to eventd. Developer need to commit default.json file with the new event after testing it out. Supported severities are: CRITICAL, MAJOR, MINOR, WARNING and INFORMATIONAL. Supported enable flag values are: true and false.",
-    "events":[
-
-    ]
-}
-           
\ No newline at end of file
diff --git a/src/sonic-yang-models/yang-models/sonic-alarm.yang b/src/sonic-yang-models/yang-models/sonic-alarm.yang
deleted file mode 100644
index e54ad6985..000000000
--- a/src/sonic-yang-models/yang-models/sonic-alarm.yang
+++ /dev/null
@@ -1,142 +0,0 @@
-  module sonic-alarm {
-
-    namespace "http://github.com/sonic-net/sonic-alarm";
-    prefix salarm;
-    yang-version 1.1;
-
-    import sonic-event {
-        prefix event;
-    }
-
-    // meta
-    organization
-    "SONiC";
-
-    contact
-    "SONiC";
-
-    description
-    "This module defines operational state data for SONiC alarms.";
-
-    revision "2024-01-30" {
-      description
-      "Initial revision.";
-    }
-
-
-    grouping alarm-state {
-
-      leaf id {
-        type string;
-        description "Sequence identifier for an alarm.";
-      }
-
-      leaf resource {
-        type string;
-        description "The item that is under alarm within the device.";
-      }          
-
-      leaf text {
-        type string;
-        description "Dynamic message raised with the alarm.";
-      }
-
-      leaf time-created {
-        type uint64;
-        description
-          "The time at which the alarm was raised by the system.
-          Expressed in nanoseconds since Unix epoch.";
-      }
-
-      leaf type-id {
-        type string;
-        description "Type of the alarm raised";
-      }
-
-      leaf severity {
-        type event:severity-type;
-        description
-        "Severity of a raised condition.";
-      }
-
-      leaf acknowledged {
-        type boolean;
-        description
-        "This denotes whether an alarm is acknowledged by the operator.
-         An acknowledged alarm is not considered in determining the 
-         health of the system.";
-      }
-
-      leaf acknowledge-time {
-        type uint64;
-        description
-         "The time at which alarm is acknowledged by the system.
-          This value is expressed as nanoseconds since the Unix Epoch.";
-      }
-
-    }
-
-    container sonic-alarm {
-
-      container ALARM {
-
-        list ALARM_LIST {
-          key "id";
-          uses alarm-state;
-        }
-      }
-
-      container ALARM_STATS {
-
-
-        list ALARM_STATS_LIST {
-
-          key "id";
-          leaf id {
-            type enumeration {
-              enum state;
-            }
-            description
-            "Table identifier value defined as state.";
-          }
-          
-          leaf alarms {
-            type uint64;
-            description
-            "Total alarms in the system.";
-          }
-
-          leaf critical {
-            type uint64;
-            description
-            "Total critical alarms in the system.";
-          }
-
-          leaf major {
-            type uint64;
-            description
-            "Total major alarms in the system.";
-          }
-
-          leaf minor {
-            type uint64;
-            description
-            "Total minor alarms in the system.";
-          }
-
-          leaf warning {
-            type uint64;
-            description
-            "Total warnings in the system.";
-          }
-
-          leaf acknowledged {
-            type uint64;
-            description
-            "Total acknowledged alarms in the system.";
-          }
-
-        }
-      }
-    }
-}
diff --git a/src/sonic-yang-models/yang-models/sonic-event.yang b/src/sonic-yang-models/yang-models/sonic-event.yang
deleted file mode 100644
index f5bb27782..000000000
--- a/src/sonic-yang-models/yang-models/sonic-event.yang
+++ /dev/null
@@ -1,134 +0,0 @@
-  module sonic-event {
-    namespace "http://github.com/sonic-net/sonic-event";
-    prefix sevents;
-    yang-version 1.1;
-
-    organization
-    "SONiC";
-
-    contact
-    "SONiC";
-
-    description
-    "This module defines operational state data for SONiC events.";
-
-    revision "2024-01-30" {
-      description
-      "Initial revision.";
-    }
-
-    typedef severity-type {
-        type enumeration {
-          enum CRITICAL;
-          enum MAJOR;
-          enum MINOR;
-          enum WARNING;
-          enum INFORMATIONAL;
-        }
-        description
-        "Severity of a raised condition.";
-      }
-
-    typedef action-type {
-        type enumeration {
-          enum RAISE;
-          enum CLEAR;
-          enum ACKNOWLEDGE;
-          enum UNACKNOWLEDGE;
-        }
-        description
-        "Action on a raised condition.";
-      }
-
-    grouping event-state {
-
-      leaf id {
-        type string;
-        description "Sequence identifier for events.";
-      }
-
-      leaf resource {
-        type string;
-        description "The item in the device that raised the event.";
-      }          
-
-      leaf text {
-        type string;
-        description "Dynamic message raised with the event.";
-      }
-
-      leaf time-created {
-        type uint64;
-        description
-          "The time at which the event was raised by the system.
-          Expressed in epoch time.";
-      }
-
-      leaf type-id {
-        type string;
-        description "Type of event raised by the device.";
-      }
-
-      leaf severity {
-        type severity-type;
-        description
-        "Severity of the event.";
-      }
-
-      leaf action {
-        type action-type;
-        description "Action on the event.";
-      }
-    }
-
-    container sonic-event {
-
-      container EVENT {
-
-        list EVENT_LIST {
-          key "id";
-          uses event-state;
-        }
-      }
-
-      container EVENT_STATS {
-
-
-        list EVENT_STATS_LIST {
-
-          key "id";
-          leaf id {
-            type enumeration {
-              enum state;
-            }
-            description
-            "Table identifier value defined as state.";
-          }
-          
-          leaf events {
-            type uint64;
-            description
-            "Total number of events in the system store.";
-          }
-
-          leaf raised {
-            type uint64;
-            description
-            "Total number of events for raise operation in system store.";
-          }
-
-          leaf acked {
-            type uint64;
-            description
-            "Total number of events for ack operation in system store.";
-          }
-
-          leaf cleared {
-            type uint64;
-            description
-            "Total number of events for clear operation in system store.";
-          }
-        }
-      }
-    }
-  }
diff --git a/src/sonic-yang-models/yang-models/sonic-events-common.yang b/src/sonic-yang-models/yang-models/sonic-events-common.yang
index cac93a69c..ed6c81a7b 100644
--- a/src/sonic-yang-models/yang-models/sonic-events-common.yang
+++ b/src/sonic-yang-models/yang-models/sonic-events-common.yang
@@ -21,52 +21,11 @@ module sonic-events-common {
             "Common reusable definitions";
     }
 
-    typedef action-type {
-        type enumeration {
-            enum RAISE {
-                description "Event with raise alarm action.";
-            }
-            enum CLEAR {
-                description "Event with clear alarm action.";
-            }
-        }
-        description
-        "This type defines the actions associated with an event notification.";
-    }
-
     grouping sonic-events-cmn {
         leaf timestamp {
             type yang:date-and-time;
             description "time of the event";
         }
-        leaf type-id {
-            type string;
-            description
-            "The abbreviated name of the event, for example FAN_SPEED_STATUS,
-            SYSTEM_STATUS, or PSU_FAULTY.";
-        }
-
-        leaf resource {
-            type string;
-            description
-            "The item generating the event. for example eth1, cpu_sensor";
-        }
-
-        leaf text {
-            type string;
-            description
-            "The string used to inform operators about the event. This
-            MUST contain enough information for an operator to be able
-            to understand the problem. If this string contains structure,
-            this format should be clearly documented for programs to be
-            able to parse that information";
-        }
-
-        leaf action {
-            type action-type;
-            description
-            "This denotes the action associated with the event.";
-        }
     }
 
     grouping sonic-events-usage {

From 8dcf1922e40c9bb7f93f753c3da9309e6cd69131 Mon Sep 17 00:00:00 2001
From: "Marty Y. Lok" <76118573+mlok-nokia@users.noreply.github.com>
Date: Wed, 28 Aug 2024 17:08:29 -0400
Subject: [PATCH 0933/1115] [Nokia][snmpwalk] Fix the snmpwalk
 cefcFruPowerStatusTable on Nokia LC platform (#19733)

Executes "docker exec -it snmp snmpwalk -v2c -c 127.0.0.1 1.3.6.1.4.1.9.9.117.1.1.2.1" Nokia LC - Nokia_IXR7250E_36x400G will get error in the syslog.
This PR will enable  Psud in LC to address this issue. Fixes #19535
Signed-off-by: mlok <marty.lok@nokia.com>
---
 .../x86_64-nokia_ixr7250e_36x400g-r0/pmon_daemon_control.json    | 1 -
 1 file changed, 1 deletion(-)

diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/pmon_daemon_control.json b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/pmon_daemon_control.json
index 74ade4eb9..2c63c0851 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/pmon_daemon_control.json
+++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/pmon_daemon_control.json
@@ -1,3 +1,2 @@
 {
-    "skip_psud": true
 }

From 13e3f8076bba020290bb761532acecc05abe8ccd Mon Sep 17 00:00:00 2001
From: Julian Chang <puffc@users.noreply.github.com>
Date: Thu, 29 Aug 2024 06:07:57 +0800
Subject: [PATCH 0934/1115] [BGP] Fix TCP MD5 authentication problem in VRF
 (#19980)

[BGP] Fix TCP MD5 authentication problem in VRF

Signed-off-by: Julian Chang - TW <julianc@supermicro.com.tw>
---
 ...tion-for-outgoing-connections-on-listener.patch | 14 ++++++++++++++
 src/sonic-frr/patch/series                         |  1 +
 2 files changed, 15 insertions(+)
 create mode 100644 src/sonic-frr/patch/0053-bgpd-Set-md5-TCP-socket-option-for-outgoing-connections-on-listener.patch

diff --git a/src/sonic-frr/patch/0053-bgpd-Set-md5-TCP-socket-option-for-outgoing-connections-on-listener.patch b/src/sonic-frr/patch/0053-bgpd-Set-md5-TCP-socket-option-for-outgoing-connections-on-listener.patch
new file mode 100644
index 000000000..791f52de3
--- /dev/null
+++ b/src/sonic-frr/patch/0053-bgpd-Set-md5-TCP-socket-option-for-outgoing-connections-on-listener.patch
@@ -0,0 +1,14 @@
+diff --git a/bgpd/bgp_network.c b/bgpd/bgp_network.c
+index 76bb9949d..974a57ef2 100644
+--- a/bgpd/bgp_network.c
++++ b/bgpd/bgp_network.c
+@@ -774,6 +774,9 @@ int bgp_connect(struct peer *peer)
+ 					     ? IPV4_MAX_BITLEN
+ 					     : IPV6_MAX_BITLEN;
+ 
++		if (!BGP_PEER_SU_UNSPEC(peer))
++			bgp_md5_set(peer);
++
+ 		bgp_md5_set_connect(peer->fd, &peer->su, prefixlen,
+ 				    peer->password);
+ 	}
diff --git a/src/sonic-frr/patch/series b/src/sonic-frr/patch/series
index 7f1d79d81..1606b6706 100644
--- a/src/sonic-frr/patch/series
+++ b/src/sonic-frr/patch/series
@@ -50,3 +50,4 @@
 0050-bgpd-backpressure-Avoid-use-after-free.patch
 0051-bgpd-backpressure-fix-ret-value-evpn_route_select_in.patch
 0052-bgpd-backpressure-log-error-for-evpn-when-route-inst.patch
+0053-bgpd-Set-md5-TCP-socket-option-for-outgoing-connections-on-listener.patch

From 0b5f71f92fdc61f532d220945b37538155c3bda9 Mon Sep 17 00:00:00 2001
From: Tejaswini Chadaga <85581939+tjchadaga@users.noreply.github.com>
Date: Wed, 28 Aug 2024 19:28:21 -0700
Subject: [PATCH 0935/1115] Adding the missed route-map calls for idf isolation
 (#19752)

Fixes #19380
To enable idf_isolation route-map towards BGP peer
---
 .../frr/bgpd/templates/general/policies.conf.j2               | 4 ++++
 .../tests/data/general/policies.conf/result_all.conf          | 4 ++++
 .../tests/data/general/policies.conf/result_base.conf         | 4 ++++
 .../tests/data/general/policies.conf/result_deny.conf         | 4 ++++
 4 files changed, 16 insertions(+)

diff --git a/dockers/docker-fpm-frr/frr/bgpd/templates/general/policies.conf.j2 b/dockers/docker-fpm-frr/frr/bgpd/templates/general/policies.conf.j2
index 7cf5e148f..3dc9447f7 100644
--- a/dockers/docker-fpm-frr/frr/bgpd/templates/general/policies.conf.j2
+++ b/dockers/docker-fpm-frr/frr/bgpd/templates/general/policies.conf.j2
@@ -50,6 +50,7 @@ route-map FROM_BGP_PEER_V6 permit 11
 route-map FROM_BGP_PEER_V4 permit 100
 !
 route-map TO_BGP_PEER_V4 permit 100
+  call CHECK_IDF_ISOLATION
 !
 !
 route-map FROM_BGP_PEER_V6 permit 1
@@ -59,6 +60,9 @@ route-map FROM_BGP_PEER_V6 permit 1
 route-map FROM_BGP_PEER_V6 permit 100
 !
 route-map TO_BGP_PEER_V6 permit 100
+  call CHECK_IDF_ISOLATION
+!
+route-map CHECK_IDF_ISOLATION permit 10
 !
 ! end of template: bgpd/templates/general/policies.conf.j2
 !
diff --git a/src/sonic-bgpcfgd/tests/data/general/policies.conf/result_all.conf b/src/sonic-bgpcfgd/tests/data/general/policies.conf/result_all.conf
index 8d0c17d59..f19b98a85 100644
--- a/src/sonic-bgpcfgd/tests/data/general/policies.conf/result_all.conf
+++ b/src/sonic-bgpcfgd/tests/data/general/policies.conf/result_all.conf
@@ -31,6 +31,7 @@ route-map FROM_BGP_PEER_V6 permit 11
 route-map FROM_BGP_PEER_V4 permit 100
 !
 route-map TO_BGP_PEER_V4 permit 100
+  call CHECK_IDF_ISOLATION
 !
 route-map FROM_BGP_PEER_V6 permit 1
  on-match next
@@ -39,6 +40,9 @@ route-map FROM_BGP_PEER_V6 permit 1
 route-map FROM_BGP_PEER_V6 permit 100
 !
 route-map TO_BGP_PEER_V6 permit 100
+  call CHECK_IDF_ISOLATION
+!
+route-map CHECK_IDF_ISOLATION permit 10
 !
 ! end of template: bgpd/templates/general/policies.conf.j2
 !
diff --git a/src/sonic-bgpcfgd/tests/data/general/policies.conf/result_base.conf b/src/sonic-bgpcfgd/tests/data/general/policies.conf/result_base.conf
index 8f7631caa..671eea007 100644
--- a/src/sonic-bgpcfgd/tests/data/general/policies.conf/result_base.conf
+++ b/src/sonic-bgpcfgd/tests/data/general/policies.conf/result_base.conf
@@ -4,6 +4,7 @@
 route-map FROM_BGP_PEER_V4 permit 100
 !
 route-map TO_BGP_PEER_V4 permit 100
+  call CHECK_IDF_ISOLATION
 !
 route-map FROM_BGP_PEER_V6 permit 1
  on-match next
@@ -12,6 +13,9 @@ route-map FROM_BGP_PEER_V6 permit 1
 route-map FROM_BGP_PEER_V6 permit 100
 !
 route-map TO_BGP_PEER_V6 permit 100
+  call CHECK_IDF_ISOLATION
+!
+route-map CHECK_IDF_ISOLATION permit 10
 !
 ! end of template: bgpd/templates/general/policies.conf.j2
 !
diff --git a/src/sonic-bgpcfgd/tests/data/general/policies.conf/result_deny.conf b/src/sonic-bgpcfgd/tests/data/general/policies.conf/result_deny.conf
index 661414bd5..fdc10b84b 100644
--- a/src/sonic-bgpcfgd/tests/data/general/policies.conf/result_deny.conf
+++ b/src/sonic-bgpcfgd/tests/data/general/policies.conf/result_deny.conf
@@ -31,6 +31,7 @@ route-map FROM_BGP_PEER_V6 permit 11
 route-map FROM_BGP_PEER_V4 permit 100
 !
 route-map TO_BGP_PEER_V4 permit 100
+  call CHECK_IDF_ISOLATION
 !
 route-map FROM_BGP_PEER_V6 permit 1
  on-match next
@@ -39,6 +40,9 @@ route-map FROM_BGP_PEER_V6 permit 1
 route-map FROM_BGP_PEER_V6 permit 100
 !
 route-map TO_BGP_PEER_V6 permit 100
+  call CHECK_IDF_ISOLATION
+!
+route-map CHECK_IDF_ISOLATION permit 10
 !
 ! end of template: bgpd/templates/general/policies.conf.j2
 !

From 1fe8153acb92fa1d800005a627ed3c0140791d10 Mon Sep 17 00:00:00 2001
From: zitingguo-ms <zitingguo@microsoft.com>
Date: Thu, 29 Aug 2024 15:52:48 +0800
Subject: [PATCH 0936/1115] Upgrade xgs SAI version to 10.1.38.0 (#19915)

Why I did it
Upgrade xgs SAI version to 10.1.38.0

10.1.38.0: [CSP CS00012359404] Port SONIC-93179 to SAI 10.1 branch
Work item tracking
Microsoft ADO (number only): 29094720
How I did it
Upgrade the SAI version in the sai.mk file.

How to verify it
https://dev.azure.com/mssonic/internal/_build/results?buildId=620112&view=results
---
 platform/broadcom/sai.mk | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/platform/broadcom/sai.mk b/platform/broadcom/sai.mk
index bae4bf67d..0ab4bc618 100644
--- a/platform/broadcom/sai.mk
+++ b/platform/broadcom/sai.mk
@@ -1,4 +1,4 @@
-LIBSAIBCM_XGS_VERSION = 10.1.37.0
+LIBSAIBCM_XGS_VERSION = 10.1.38.0
 LIBSAIBCM_DNX_VERSION = 11.2.4.1
 LIBSAIBCM_XGS_BRANCH_NAME = SAI_10.1.0_GA
 LIBSAIBCM_DNX_BRANCH_NAME = SAI_11.2.0_GA

From 5c298158adc14826b97db4cfa8fccfda947fb150 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Thu, 29 Aug 2024 19:01:16 +0800
Subject: [PATCH 0937/1115] [submodule] Update submodule sonic-utilities to the
 latest HEAD automatically (#20073)

#### Why I did it
src/sonic-utilities
```
* c4ce5ae5 - (HEAD -> master, origin/master, origin/HEAD) Enable show interfacess counters on chassis supervisor (#3488) (10 hours ago) [Changrong Wu]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-utilities | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-utilities b/src/sonic-utilities
index e4df80a5c..c4ce5ae59 160000
--- a/src/sonic-utilities
+++ b/src/sonic-utilities
@@ -1 +1 @@
-Subproject commit e4df80a5c89c570dfe6580d91ac25c99e425c02d
+Subproject commit c4ce5ae5947554258608ae5ba97c50bdaf761015

From 7879ab38c8f6c2f38511883524c222055c9c4cda Mon Sep 17 00:00:00 2001
From: saksarav-nokia <sakthivadivu.saravanaraj@nokia.com>
Date: Thu, 29 Aug 2024 10:23:10 -0400
Subject: [PATCH 0938/1115] [Nokia Device] Add Programmability path and
 dpp_path for Nokia DNX platforms (#19739)

* [Nokia][Device] Update SUP device to set the dpp_db_path
* [Nokia Device] Set the programmability ucode relative path for Nokia DNX platforms.
Added Programmability path and dpp_path for Nokia DNX platforms to work with SAI 11.x
---------

Signed-off-by: saksarav <sakthivadivu.saravanaraj@nokia.com>
---
 .../0/jr2cp-nokia-18x100g-4x25g-config.bcm                      | 2 ++
 .../1/jr2cp-nokia-18x100g-4x25g-config.bcm                      | 2 ++
 .../Nokia-IXR7250E-36x400G/0/jr2cp-nokia-18x400g-config.bcm     | 2 ++
 .../Nokia-IXR7250E-36x400G/1/jr2cp-nokia-18x400g-config.bcm     | 2 ++
 .../Nokia-IXR7250E-SUP-10/0/config-ramon-1-0.bcm                | 2 ++
 .../Nokia-IXR7250E-SUP-10/1/config-ramon-1-1.bcm                | 2 ++
 .../Nokia-IXR7250E-SUP-10/10/config-ramon-6-0.bcm               | 2 ++
 .../Nokia-IXR7250E-SUP-10/11/config-ramon-6-1.bcm               | 2 ++
 .../Nokia-IXR7250E-SUP-10/12/config-ramon-7-0.bcm               | 2 ++
 .../Nokia-IXR7250E-SUP-10/13/config-ramon-7-1.bcm               | 2 ++
 .../Nokia-IXR7250E-SUP-10/14/config-ramon-8-0.bcm               | 2 ++
 .../Nokia-IXR7250E-SUP-10/15/config-ramon-8-1.bcm               | 2 ++
 .../Nokia-IXR7250E-SUP-10/2/config-ramon-2-0.bcm                | 2 ++
 .../Nokia-IXR7250E-SUP-10/3/config-ramon-2-1.bcm                | 2 ++
 .../Nokia-IXR7250E-SUP-10/4/config-ramon-3-0.bcm                | 2 ++
 .../Nokia-IXR7250E-SUP-10/5/config-ramon-3-1.bcm                | 2 ++
 .../Nokia-IXR7250E-SUP-10/6/config-ramon-4-0.bcm                | 2 ++
 .../Nokia-IXR7250E-SUP-10/7/config-ramon-4-1.bcm                | 2 ++
 .../Nokia-IXR7250E-SUP-10/8/config-ramon-5-0.bcm                | 2 ++
 .../Nokia-IXR7250E-SUP-10/9/config-ramon-5-1.bcm                | 2 ++
 20 files changed, 40 insertions(+)

diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/0/jr2cp-nokia-18x100g-4x25g-config.bcm b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/0/jr2cp-nokia-18x100g-4x25g-config.bcm
index bb75db8b9..6f07539f9 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/0/jr2cp-nokia-18x100g-4x25g-config.bcm
+++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/0/jr2cp-nokia-18x100g-4x25g-config.bcm
@@ -8,6 +8,8 @@ dma_desc_aggregator_chain_length_max.BCM8885X=1000
 dma_desc_aggregator_enable_specific_MDB_LPM.BCM8885X=1
 dma_desc_aggregator_timeout_usec.BCM8885X=1000
 dport_map_direct.BCM8885X=1
+programmability_image_name.BCM8885X=standard_1
+programmability_ucode_relative_path.BCM8885X=pemla/ucode/standard_1/jer2pemla/u_code_db2pem.txt
 dtm_flow_mapping_mode_region_64.BCM8885X=3
 dtm_flow_mapping_mode_region_65.BCM8885X=3
 dtm_flow_mapping_mode_region_66.BCM8885X=3
diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/1/jr2cp-nokia-18x100g-4x25g-config.bcm b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/1/jr2cp-nokia-18x100g-4x25g-config.bcm
index d97725a26..a1419db8f 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/1/jr2cp-nokia-18x100g-4x25g-config.bcm
+++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/1/jr2cp-nokia-18x100g-4x25g-config.bcm
@@ -8,6 +8,8 @@ dma_desc_aggregator_chain_length_max.BCM8885X=1000
 dma_desc_aggregator_enable_specific_MDB_LPM.BCM8885X=1
 dma_desc_aggregator_timeout_usec.BCM8885X=1000
 dport_map_direct.BCM8885X=1
+programmability_image_name.BCM8885X=standard_1
+programmability_ucode_relative_path.BCM8885X=pemla/ucode/standard_1/jer2pemla/u_code_db2pem.txt
 dtm_flow_mapping_mode_region_64.BCM8885X=3
 dtm_flow_mapping_mode_region_65.BCM8885X=3
 dtm_flow_mapping_mode_region_66.BCM8885X=3
diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/0/jr2cp-nokia-18x400g-config.bcm b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/0/jr2cp-nokia-18x400g-config.bcm
index a14241358..fa5849f45 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/0/jr2cp-nokia-18x400g-config.bcm
+++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/0/jr2cp-nokia-18x400g-config.bcm
@@ -8,6 +8,8 @@ dma_desc_aggregator_chain_length_max.BCM8885X=1000
 dma_desc_aggregator_enable_specific_MDB_LPM.BCM8885X=1
 dma_desc_aggregator_timeout_usec.BCM8885X=1000
 dport_map_direct.BCM8885X=1
+programmability_image_name.BCM8885X=standard_1
+programmability_ucode_relative_path.BCM8885X=pemla/ucode/standard_1/jer2pemla/u_code_db2pem.txt
 sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc
 dtm_flow_mapping_mode_region_64.BCM8885X=3
 dtm_flow_mapping_mode_region_65.BCM8885X=3
diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/1/jr2cp-nokia-18x400g-config.bcm b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/1/jr2cp-nokia-18x400g-config.bcm
index dc8f73ae6..ccb87e9ad 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/1/jr2cp-nokia-18x400g-config.bcm
+++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/1/jr2cp-nokia-18x400g-config.bcm
@@ -8,6 +8,8 @@ dma_desc_aggregator_chain_length_max.BCM8885X=1000
 dma_desc_aggregator_enable_specific_MDB_LPM.BCM8885X=1
 dma_desc_aggregator_timeout_usec.BCM8885X=1000
 dport_map_direct.BCM8885X=1
+programmability_image_name.BCM8885X=standard_1
+programmability_ucode_relative_path.BCM8885X=pemla/ucode/standard_1/jer2pemla/u_code_db2pem.txt
 sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc
 dtm_flow_mapping_mode_region_64.BCM8885X=3
 dtm_flow_mapping_mode_region_65.BCM8885X=3
diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/0/config-ramon-1-0.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/0/config-ramon-1-0.bcm
index 3ebf67393..12a0b532f 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/0/config-ramon-1-0.bcm
+++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/0/config-ramon-1-0.bcm
@@ -1396,3 +1396,5 @@ serdes_qrtt_active_44.0=1
 serdes_qrtt_active_45.0=1
 serdes_qrtt_active_46.0=1
 serdes_qrtt_active_47.0=1
+
+dpp_db_path=/usr/share/bcm/db
diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/1/config-ramon-1-1.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/1/config-ramon-1-1.bcm
index e4b15db2a..59106ba59 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/1/config-ramon-1-1.bcm
+++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/1/config-ramon-1-1.bcm
@@ -1393,3 +1393,5 @@ serdes_qrtt_active_44.0=1
 serdes_qrtt_active_45.0=1
 serdes_qrtt_active_46.0=1
 serdes_qrtt_active_47.0=1
+
+dpp_db_path=/usr/share/bcm/db
diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/10/config-ramon-6-0.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/10/config-ramon-6-0.bcm
index 6bc3e88c9..a481d75a9 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/10/config-ramon-6-0.bcm
+++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/10/config-ramon-6-0.bcm
@@ -1392,3 +1392,5 @@ serdes_qrtt_active_44.0=1
 serdes_qrtt_active_45.0=1
 serdes_qrtt_active_46.0=1
 serdes_qrtt_active_47.0=1
+
+dpp_db_path=/usr/share/bcm/db
diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/11/config-ramon-6-1.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/11/config-ramon-6-1.bcm
index 6fcec3b66..2c315e84a 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/11/config-ramon-6-1.bcm
+++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/11/config-ramon-6-1.bcm
@@ -1393,3 +1393,5 @@ serdes_qrtt_active_44.0=1
 serdes_qrtt_active_45.0=1
 serdes_qrtt_active_46.0=1
 serdes_qrtt_active_47.0=1
+
+dpp_db_path=/usr/share/bcm/db
diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/12/config-ramon-7-0.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/12/config-ramon-7-0.bcm
index 2e0aedcc0..581b5d76a 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/12/config-ramon-7-0.bcm
+++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/12/config-ramon-7-0.bcm
@@ -1392,3 +1392,5 @@ serdes_qrtt_active_44.0=1
 serdes_qrtt_active_45.0=1
 serdes_qrtt_active_46.0=1
 serdes_qrtt_active_47.0=1
+
+dpp_db_path=/usr/share/bcm/db
diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/13/config-ramon-7-1.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/13/config-ramon-7-1.bcm
index faea7ed71..364690e7a 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/13/config-ramon-7-1.bcm
+++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/13/config-ramon-7-1.bcm
@@ -1393,3 +1393,5 @@ serdes_qrtt_active_44.0=1
 serdes_qrtt_active_45.0=1
 serdes_qrtt_active_46.0=1
 serdes_qrtt_active_47.0=1
+
+dpp_db_path=/usr/share/bcm/db
diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/14/config-ramon-8-0.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/14/config-ramon-8-0.bcm
index 8a03f70e4..d12d791c8 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/14/config-ramon-8-0.bcm
+++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/14/config-ramon-8-0.bcm
@@ -1394,3 +1394,5 @@ serdes_qrtt_active_44.0=1
 serdes_qrtt_active_45.0=1
 serdes_qrtt_active_46.0=1
 serdes_qrtt_active_47.0=1
+
+dpp_db_path=/usr/share/bcm/db
diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/15/config-ramon-8-1.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/15/config-ramon-8-1.bcm
index 94afa0bc1..86d9af38e 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/15/config-ramon-8-1.bcm
+++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/15/config-ramon-8-1.bcm
@@ -1393,3 +1393,5 @@ serdes_qrtt_active_44.0=1
 serdes_qrtt_active_45.0=1
 serdes_qrtt_active_46.0=1
 serdes_qrtt_active_47.0=1
+
+dpp_db_path=/usr/share/bcm/db
diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/2/config-ramon-2-0.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/2/config-ramon-2-0.bcm
index 182fdc176..0c4b5403b 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/2/config-ramon-2-0.bcm
+++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/2/config-ramon-2-0.bcm
@@ -1392,3 +1392,5 @@ serdes_qrtt_active_44.0=1
 serdes_qrtt_active_45.0=1
 serdes_qrtt_active_46.0=1
 serdes_qrtt_active_47.0=1
+
+dpp_db_path=/usr/share/bcm/db
diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/3/config-ramon-2-1.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/3/config-ramon-2-1.bcm
index 199a57b72..1617c40e6 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/3/config-ramon-2-1.bcm
+++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/3/config-ramon-2-1.bcm
@@ -1393,3 +1393,5 @@ serdes_qrtt_active_44.0=1
 serdes_qrtt_active_45.0=1
 serdes_qrtt_active_46.0=1
 serdes_qrtt_active_47.0=1
+
+dpp_db_path=/usr/share/bcm/db
diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/4/config-ramon-3-0.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/4/config-ramon-3-0.bcm
index dac08d72a..f905a66b2 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/4/config-ramon-3-0.bcm
+++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/4/config-ramon-3-0.bcm
@@ -1392,3 +1392,5 @@ serdes_qrtt_active_44.0=1
 serdes_qrtt_active_45.0=1
 serdes_qrtt_active_46.0=1
 serdes_qrtt_active_47.0=1
+
+dpp_db_path=/usr/share/bcm/db
diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/5/config-ramon-3-1.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/5/config-ramon-3-1.bcm
index d60d6a4f7..f25c8b10d 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/5/config-ramon-3-1.bcm
+++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/5/config-ramon-3-1.bcm
@@ -1393,3 +1393,5 @@ serdes_qrtt_active_44.0=1
 serdes_qrtt_active_45.0=1
 serdes_qrtt_active_46.0=1
 serdes_qrtt_active_47.0=1
+
+dpp_db_path=/usr/share/bcm/db
diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/6/config-ramon-4-0.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/6/config-ramon-4-0.bcm
index 1b1932a99..5a824fcde 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/6/config-ramon-4-0.bcm
+++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/6/config-ramon-4-0.bcm
@@ -1392,3 +1392,5 @@ serdes_qrtt_active_44.0=1
 serdes_qrtt_active_45.0=1
 serdes_qrtt_active_46.0=1
 serdes_qrtt_active_47.0=1
+
+dpp_db_path=/usr/share/bcm/db
diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/7/config-ramon-4-1.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/7/config-ramon-4-1.bcm
index 8f7adaaff..d27ebd282 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/7/config-ramon-4-1.bcm
+++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/7/config-ramon-4-1.bcm
@@ -1393,3 +1393,5 @@ serdes_qrtt_active_44.0=1
 serdes_qrtt_active_45.0=1
 serdes_qrtt_active_46.0=1
 serdes_qrtt_active_47.0=1
+
+dpp_db_path=/usr/share/bcm/db
diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/8/config-ramon-5-0.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/8/config-ramon-5-0.bcm
index 96ceaa6cf..cb8307452 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/8/config-ramon-5-0.bcm
+++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/8/config-ramon-5-0.bcm
@@ -1392,3 +1392,5 @@ serdes_qrtt_active_44.0=1
 serdes_qrtt_active_45.0=1
 serdes_qrtt_active_46.0=1
 serdes_qrtt_active_47.0=1
+
+dpp_db_path=/usr/share/bcm/db
diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/9/config-ramon-5-1.bcm b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/9/config-ramon-5-1.bcm
index abc566225..184d11360 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/9/config-ramon-5-1.bcm
+++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/Nokia-IXR7250E-SUP-10/9/config-ramon-5-1.bcm
@@ -1393,3 +1393,5 @@ serdes_qrtt_active_44.0=1
 serdes_qrtt_active_45.0=1
 serdes_qrtt_active_46.0=1
 serdes_qrtt_active_47.0=1
+
+dpp_db_path=/usr/share/bcm/db

From 7e4d58c0ec347e27857236c0999aa3a4b4b63d29 Mon Sep 17 00:00:00 2001
From: Pavan Prakash <120486223+Pavan-Nokia@users.noreply.github.com>
Date: Thu, 29 Aug 2024 10:37:42 -0400
Subject: [PATCH 0939/1115] [Nokia-7215][Nokia-7215-A1] Update EZB files
 (#19862)

Update EZB files to version 1.08 to support SAI 1.14.0.1
---
 .../Nokia-7215-A1/ASK-Board-AC5X-xb.md5       |   2 +-
 .../Nokia-7215-A1/ASK-Board-AC5X-xb.xml       |  71 +-
 .../Nokia-7215-A1/ASK-L1-AC5X-xb.md5          |   2 +-
 .../Nokia-7215-A1/ASK-L1-AC5X-xb.xml          | 776 ++++++++----------
 .../Nokia-7215-A1/ASK-PP-AC5X-xb.md5          |   2 +-
 .../Nokia-7215-A1/ASK-PP-AC5X-xb.xml          |   2 +-
 .../Nokia-7215-A1/SAI-AC5X-xb.md5             |   2 +-
 .../Nokia-7215-A1/SAI-AC5X-xb.xml             |  27 +-
 .../Nokia-7215/ASK-Board-M0-48x1G-4x10G.md5   |   2 +-
 .../Nokia-7215/ASK-Board-M0-48x1G-4x10G.xml   | 115 +--
 .../Nokia-7215/ASK-L1-M0-D0-48x1G-4x10G.md5   |   2 +-
 .../Nokia-7215/ASK-L1-M0-D0-48x1G-4x10G.xml   | 499 +++--------
 .../Nokia-7215/ASK-L1-M0-D1-48x1G-4x10G.md5   |   2 +-
 .../Nokia-7215/ASK-L1-M0-D1-48x1G-4x10G.xml   | 499 +++--------
 .../Nokia-7215/ASK-PP-M0-48x1G-4x10G.md5      |   2 +-
 .../Nokia-7215/ASK-PP-M0-48x1G-4x10G.xml      |  24 +-
 .../Nokia-7215/SAI-M0-48x1G-4x10G.md5         |   2 +-
 .../Nokia-7215/SAI-M0-48x1G-4x10G.xml         |  49 +-
 18 files changed, 705 insertions(+), 1375 deletions(-)

diff --git a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-Board-AC5X-xb.md5 b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-Board-AC5X-xb.md5
index b11b209e5..d38f07fac 100644
--- a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-Board-AC5X-xb.md5
+++ b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-Board-AC5X-xb.md5
@@ -1 +1 @@
-c99947340cd205fa728bd418d1ca7a92
\ No newline at end of file
+f3d3345bef9c6ac4eea19c6170e92970
\ No newline at end of file
diff --git a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-Board-AC5X-xb.xml b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-Board-AC5X-xb.xml
index f23c2e9ba..6f615816b 100644
--- a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-Board-AC5X-xb.xml
+++ b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-Board-AC5X-xb.xml
@@ -1,5 +1,5 @@
 <?xml version="1.0" encoding="utf-8"?>
-<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-02-19-1.06" profile="Askboard" dsig="md5" sid="c3bbe06d-10a0-44e5-9673-58f50238498a">
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-06-05-1.08" profile="Askboard" sid="9396a3c9-f447-4460-bd9f-7d0c21ca4d16">
   <askboardplt:ASK-Board xmlns:askboardplt="urn:marvell:askboard:yang">
     <askboardplt:typedefs>
       <askboardplt:typedef>
@@ -727,7 +727,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">0</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">0</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -746,7 +745,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">1</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">0</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -765,7 +763,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">2</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">0</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -784,7 +781,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">3</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">0</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -803,7 +799,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">4</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">0</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -822,7 +817,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">5</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">0</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -841,7 +835,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">6</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">0</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -860,7 +853,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">7</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">0</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -879,7 +871,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">8</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">0</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -898,7 +889,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">9</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">0</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -917,7 +907,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">10</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">0</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -936,7 +925,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">11</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">0</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -955,7 +943,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">12</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">0</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -974,7 +961,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">13</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">0</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -993,7 +979,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">14</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">0</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1012,7 +997,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">15</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">0</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1031,7 +1015,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">16</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">0</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1050,7 +1033,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">17</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">0</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1069,7 +1051,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">18</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">0</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1088,7 +1069,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">19</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">0</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1107,7 +1087,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">20</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">0</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1126,7 +1105,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">21</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">0</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1145,7 +1123,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">22</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">0</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1164,7 +1141,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">23</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">0</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1183,7 +1159,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">0</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1202,7 +1177,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">1</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1221,7 +1195,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">2</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1240,7 +1213,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">3</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1259,7 +1231,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">4</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1278,7 +1249,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">5</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1297,7 +1267,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">6</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1316,7 +1285,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">7</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1335,7 +1303,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">8</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1354,7 +1321,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">23</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1373,7 +1339,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">22</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1392,7 +1357,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">21</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1411,7 +1375,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">20</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1430,7 +1393,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">19</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1449,7 +1411,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">18</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1468,7 +1429,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">17</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1487,7 +1447,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">16</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1506,7 +1465,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">15</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1525,7 +1483,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">14</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1544,7 +1501,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">13</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1563,7 +1519,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">12</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1582,7 +1537,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">11</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1601,7 +1555,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">10</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1620,7 +1573,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">9</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1636,7 +1588,6 @@ lowercase characters.</askboardplt:description>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">0</askboardplt:ledPosition>
           <askboardplt:polarityInvertList-list>
@@ -1656,7 +1607,6 @@ lowercase characters.</askboardplt:description>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">1</askboardplt:ledPosition>
           <askboardplt:polarityInvertList-list>
@@ -1676,7 +1626,6 @@ lowercase characters.</askboardplt:description>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">0</askboardplt:ledPosition>
           <askboardplt:polarityInvertList-list>
@@ -1696,7 +1645,6 @@ lowercase characters.</askboardplt:description>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">1</askboardplt:ledPosition>
           <askboardplt:polarityInvertList-list>
@@ -1874,6 +1822,23 @@ lowercase characters.</askboardplt:description>
         </askboardplt:ledstream-class-manipulation-list>
       </askboardplt:Ledstream-interface-list>
     </askboardplt:device-list>
+    <askboardplt:phyLedControl>
+      <askboardplt:phy-type-list>
+        <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
+        <askboardplt:phy-led-regs-list>
+          <askboardplt:reg-addr askboardplt:type="uint16">16</askboardplt:reg-addr>
+          <askboardplt:page-num askboardplt:type="uint16">3</askboardplt:page-num>
+          <askboardplt:reg-value askboardplt:type="uint16">64</askboardplt:reg-value>
+          <askboardplt:reg-value-mask askboardplt:type="uint16">65280</askboardplt:reg-value-mask>
+        </askboardplt:phy-led-regs-list>
+        <askboardplt:phy-led-regs-list>
+          <askboardplt:reg-addr askboardplt:type="uint16">1</askboardplt:reg-addr>
+          <askboardplt:page-num askboardplt:type="uint16">28</askboardplt:page-num>
+          <askboardplt:reg-value askboardplt:type="uint16">1024</askboardplt:reg-value>
+          <askboardplt:reg-value-mask askboardplt:type="uint16">64511</askboardplt:reg-value-mask>
+        </askboardplt:phy-led-regs-list>
+      </askboardplt:phy-type-list>
+    </askboardplt:phyLedControl>
     <askboardplt:UDSFilePath askboardplt:type="std-string">.</askboardplt:UDSFilePath>
     <askboardplt:serdesMux>
       <askboardplt:serdesMuxSchemePortMod askboardplt:type="uint32">1</askboardplt:serdesMuxSchemePortMod>
diff --git a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-L1-AC5X-xb.md5 b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-L1-AC5X-xb.md5
index 575bbf06a..1d7a55660 100644
--- a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-L1-AC5X-xb.md5
+++ b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-L1-AC5X-xb.md5
@@ -1 +1 @@
-83b91095c99529e49619e31e3fd72101
\ No newline at end of file
+4ad719e69b522db7ee969da2894cb04a
\ No newline at end of file
diff --git a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-L1-AC5X-xb.xml b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-L1-AC5X-xb.xml
index eff23c06f..7789d2511 100644
--- a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-L1-AC5X-xb.xml
+++ b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-L1-AC5X-xb.xml
@@ -1,5 +1,5 @@
 <?xml version="1.0" encoding="utf-8"?>
-<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-02-19-1.06" profile="Askl1" sid="71d3ab0f-3ac2-452a-a5c9-2dfdc969734a">
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-06-05-1.08" profile="Askl1" sid="d7694ab8-0eab-47cd-82ce-10074030f449">
   <ASKL1plt:ASK-L1 xmlns:ASKL1plt="urn:marvell:ASKL1:yang">
     <ASKL1plt:typedefs>
       <ASKL1plt:typedef>
@@ -239,8 +239,8 @@
         <ASKL1plt:type>enumeration</ASKL1plt:type>
         <ASKL1plt:description>Tx parameter type</ASKL1plt:description>
         <ASKL1plt:enum>
-          <ASKL1plt:name>atten</ASKL1plt:name>
-          <ASKL1plt:description>atten</ASKL1plt:description>
+          <ASKL1plt:name>pre</ASKL1plt:name>
+          <ASKL1plt:description>pre</ASKL1plt:description>
           <ASKL1plt:value>0</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
@@ -248,75 +248,10 @@
           <ASKL1plt:description>post</ASKL1plt:description>
           <ASKL1plt:value>1</ASKL1plt:value>
         </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>pre</ASKL1plt:name>
-          <ASKL1plt:description>pre</ASKL1plt:description>
-          <ASKL1plt:value>2</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>pre2</ASKL1plt:name>
-          <ASKL1plt:description>pre2</ASKL1plt:description>
-          <ASKL1plt:value>3</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>pre3</ASKL1plt:name>
-          <ASKL1plt:description>pre3</ASKL1plt:description>
-          <ASKL1plt:value>4</ASKL1plt:value>
-        </ASKL1plt:enum>
         <ASKL1plt:enum>
           <ASKL1plt:name>peak</ASKL1plt:name>
           <ASKL1plt:description>peak</ASKL1plt:description>
-          <ASKL1plt:value>5</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>main</ASKL1plt:name>
-          <ASKL1plt:description>main</ASKL1plt:description>
-          <ASKL1plt:value>6</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>txAmpAdjEn</ASKL1plt:name>
-          <ASKL1plt:description>txAmpAdjEn</ASKL1plt:description>
-          <ASKL1plt:value>7</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>emph0</ASKL1plt:name>
-          <ASKL1plt:description>emph0</ASKL1plt:description>
-          <ASKL1plt:value>8</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>emph1</ASKL1plt:name>
-          <ASKL1plt:description>emph1</ASKL1plt:description>
-          <ASKL1plt:value>9</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>txAmpShft</ASKL1plt:name>
-          <ASKL1plt:description>txAmpShft</ASKL1plt:description>
-          <ASKL1plt:value>10</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>txEmphEn</ASKL1plt:name>
-          <ASKL1plt:description>txEmphEn</ASKL1plt:description>
-          <ASKL1plt:value>11</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>txEmphEn1</ASKL1plt:name>
-          <ASKL1plt:description>txEmphEn1</ASKL1plt:description>
-          <ASKL1plt:value>12</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>txAmpAdj</ASKL1plt:name>
-          <ASKL1plt:description>txAmpAdj</ASKL1plt:description>
-          <ASKL1plt:value>13</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>slewCtrlEn</ASKL1plt:name>
-          <ASKL1plt:description>slewCtrlEn</ASKL1plt:description>
-          <ASKL1plt:value>14</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>slewRate</ASKL1plt:name>
-          <ASKL1plt:description>slewRate</ASKL1plt:description>
-          <ASKL1plt:value>15</ASKL1plt:value>
+          <ASKL1plt:value>2</ASKL1plt:value>
         </ASKL1plt:enum>
       </ASKL1plt:typedef>
       <ASKL1plt:typedef>
@@ -324,400 +259,180 @@
         <ASKL1plt:type>enumeration</ASKL1plt:type>
         <ASKL1plt:description>Rx parameter type</ASKL1plt:description>
         <ASKL1plt:enum>
-          <ASKL1plt:name>sqlch</ASKL1plt:name>
-          <ASKL1plt:description>sqlch</ASKL1plt:description>
+          <ASKL1plt:name>dataRate</ASKL1plt:name>
+          <ASKL1plt:description>dataRate</ASKL1plt:description>
           <ASKL1plt:value>0</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
-          <ASKL1plt:name>DC</ASKL1plt:name>
-          <ASKL1plt:description>DC</ASKL1plt:description>
+          <ASKL1plt:name>res1Sel</ASKL1plt:name>
+          <ASKL1plt:description>res1Sel</ASKL1plt:description>
           <ASKL1plt:value>1</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
-          <ASKL1plt:name>LF</ASKL1plt:name>
-          <ASKL1plt:description>LF</ASKL1plt:description>
+          <ASKL1plt:name>res2Sel</ASKL1plt:name>
+          <ASKL1plt:description>res2Sel</ASKL1plt:description>
           <ASKL1plt:value>2</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
-          <ASKL1plt:name>HF</ASKL1plt:name>
-          <ASKL1plt:description>HF</ASKL1plt:description>
+          <ASKL1plt:name>cap1Sel</ASKL1plt:name>
+          <ASKL1plt:description>cap1Sel</ASKL1plt:description>
           <ASKL1plt:value>3</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
-          <ASKL1plt:name>gainShape1</ASKL1plt:name>
-          <ASKL1plt:description>gainShape1</ASKL1plt:description>
+          <ASKL1plt:name>cap2Sel</ASKL1plt:name>
+          <ASKL1plt:description>cap2Sel</ASKL1plt:description>
           <ASKL1plt:value>4</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
-          <ASKL1plt:name>gainShape2</ASKL1plt:name>
-          <ASKL1plt:description>gainShape2</ASKL1plt:description>
+          <ASKL1plt:name>minCap</ASKL1plt:name>
+          <ASKL1plt:description>minCap</ASKL1plt:description>
           <ASKL1plt:value>5</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
-          <ASKL1plt:name>shortChannelEn</ASKL1plt:name>
-          <ASKL1plt:description>shortChannelEn</ASKL1plt:description>
+          <ASKL1plt:name>minCapN</ASKL1plt:name>
+          <ASKL1plt:description>minCapN</ASKL1plt:description>
+          <ASKL1plt:value>6</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>sumfBoostTargetC0</ASKL1plt:name>
+          <ASKL1plt:description>sumfBoostTargetC0</ASKL1plt:description>
           <ASKL1plt:value>7</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
-          <ASKL1plt:name>bfLf</ASKL1plt:name>
-          <ASKL1plt:description>bfLf</ASKL1plt:description>
+          <ASKL1plt:name>sumfBoostTargetC1</ASKL1plt:name>
+          <ASKL1plt:description>sumfBoostTargetC1</ASKL1plt:description>
           <ASKL1plt:value>8</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
-          <ASKL1plt:name>bfHf</ASKL1plt:name>
-          <ASKL1plt:description>bfHf</ASKL1plt:description>
+          <ASKL1plt:name>sumfBoostTargetC2</ASKL1plt:name>
+          <ASKL1plt:description>sumfBoostTargetC2</ASKL1plt:description>
           <ASKL1plt:value>9</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
-          <ASKL1plt:name>minLf</ASKL1plt:name>
-          <ASKL1plt:description>minLf</ASKL1plt:description>
+          <ASKL1plt:name>midpointPhaseOs0</ASKL1plt:name>
+          <ASKL1plt:description>midpointPhaseOs0</ASKL1plt:description>
           <ASKL1plt:value>10</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
-          <ASKL1plt:name>maxLf</ASKL1plt:name>
-          <ASKL1plt:description>maxLf</ASKL1plt:description>
+          <ASKL1plt:name>midpointPhaseOs1</ASKL1plt:name>
+          <ASKL1plt:description>midpointPhaseOs1</ASKL1plt:description>
           <ASKL1plt:value>11</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
-          <ASKL1plt:name>minHf</ASKL1plt:name>
-          <ASKL1plt:description>minHf</ASKL1plt:description>
+          <ASKL1plt:name>midpointPhaseOs2</ASKL1plt:name>
+          <ASKL1plt:description>midpointPhaseOs2</ASKL1plt:description>
           <ASKL1plt:value>12</ASKL1plt:value>
         </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>maxHf</ASKL1plt:name>
-          <ASKL1plt:description>maxHf</ASKL1plt:description>
-          <ASKL1plt:value>13</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>minPre1</ASKL1plt:name>
-          <ASKL1plt:description>minPre1</ASKL1plt:description>
-          <ASKL1plt:value>14</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>maxPre1</ASKL1plt:name>
-          <ASKL1plt:description>maxPre1</ASKL1plt:description>
-          <ASKL1plt:value>15</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>minPre2</ASKL1plt:name>
-          <ASKL1plt:description>minPre2</ASKL1plt:description>
-          <ASKL1plt:value>16</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>maxPre2</ASKL1plt:name>
-          <ASKL1plt:description/>
-          <ASKL1plt:value>17</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>minPost</ASKL1plt:name>
-          <ASKL1plt:description>minPost</ASKL1plt:description>
-          <ASKL1plt:value>18</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>maxPost</ASKL1plt:name>
-          <ASKL1plt:description>maxPost</ASKL1plt:description>
-          <ASKL1plt:value>19</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>squelch</ASKL1plt:name>
-          <ASKL1plt:description>squelch</ASKL1plt:description>
-          <ASKL1plt:value>20</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>termination</ASKL1plt:name>
-          <ASKL1plt:description>termination</ASKL1plt:description>
-          <ASKL1plt:value>27</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>coldEnvelope</ASKL1plt:name>
-          <ASKL1plt:description>coldEnvelope</ASKL1plt:description>
-          <ASKL1plt:value>35</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>hotEnvelope</ASKL1plt:name>
-          <ASKL1plt:description>hotEnvelope</ASKL1plt:description>
-          <ASKL1plt:value>36</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>dcGain</ASKL1plt:name>
-          <ASKL1plt:description>dcGain</ASKL1plt:description>
-          <ASKL1plt:value>37</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>bandWidth</ASKL1plt:name>
-          <ASKL1plt:description>bandWidth</ASKL1plt:description>
-          <ASKL1plt:value>38</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>dfe</ASKL1plt:name>
-          <ASKL1plt:description>dfe</ASKL1plt:description>
-          <ASKL1plt:value>39</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>ffeR</ASKL1plt:name>
-          <ASKL1plt:description>ffeR</ASKL1plt:description>
-          <ASKL1plt:value>40</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>ffeC</ASKL1plt:name>
-          <ASKL1plt:description>ffeC</ASKL1plt:description>
-          <ASKL1plt:value>41</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>sampler</ASKL1plt:name>
-          <ASKL1plt:description>sampler</ASKL1plt:description>
-          <ASKL1plt:value>42</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>align90</ASKL1plt:name>
-          <ASKL1plt:description>align90</ASKL1plt:description>
-          <ASKL1plt:value>43</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>ffeS</ASKL1plt:name>
-          <ASKL1plt:description>ffeS</ASKL1plt:description>
-          <ASKL1plt:value>44</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>resSel</ASKL1plt:name>
-          <ASKL1plt:description>resSel</ASKL1plt:description>
-          <ASKL1plt:value>45</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>resShift</ASKL1plt:name>
-          <ASKL1plt:description>resShift</ASKL1plt:description>
-          <ASKL1plt:value>46</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>capSel</ASKL1plt:name>
-          <ASKL1plt:description>capSel</ASKL1plt:description>
-          <ASKL1plt:value>47</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>ffeSettingForce</ASKL1plt:name>
-          <ASKL1plt:description>ffeSettingForce</ASKL1plt:description>
-          <ASKL1plt:value>48</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>adaptedResSel</ASKL1plt:name>
-          <ASKL1plt:description>adaptedResSel</ASKL1plt:description>
-          <ASKL1plt:value>49</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>adaptedCapSel</ASKL1plt:name>
-          <ASKL1plt:description>adaptedCapSel</ASKL1plt:description>
-          <ASKL1plt:value>50</ASKL1plt:value>
-        </ASKL1plt:enum>
         <ASKL1plt:enum>
           <ASKL1plt:name>selmufi</ASKL1plt:name>
           <ASKL1plt:description>selmufi</ASKL1plt:description>
-          <ASKL1plt:value>51</ASKL1plt:value>
+          <ASKL1plt:value>13</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
           <ASKL1plt:name>selmuff</ASKL1plt:name>
           <ASKL1plt:description>selmuff</ASKL1plt:description>
-          <ASKL1plt:value>52</ASKL1plt:value>
+          <ASKL1plt:value>14</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
           <ASKL1plt:name>selmupi</ASKL1plt:name>
           <ASKL1plt:description>selmupi</ASKL1plt:description>
-          <ASKL1plt:value>53</ASKL1plt:value>
+          <ASKL1plt:value>15</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
           <ASKL1plt:name>selmupf</ASKL1plt:name>
           <ASKL1plt:description>selmupf</ASKL1plt:description>
-          <ASKL1plt:value>54</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>slewRateCtrl0</ASKL1plt:name>
-          <ASKL1plt:description>slewRateCtrl0</ASKL1plt:description>
-          <ASKL1plt:value>55</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>slewRateCtrl1</ASKL1plt:name>
-          <ASKL1plt:description>slewRateCtrl1</ASKL1plt:description>
-          <ASKL1plt:value>56</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>EO</ASKL1plt:name>
-          <ASKL1plt:description>EO</ASKL1plt:description>
-          <ASKL1plt:value>57</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>dataRate</ASKL1plt:name>
-          <ASKL1plt:description>dataRate</ASKL1plt:description>
-          <ASKL1plt:value>58</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>res1Sel</ASKL1plt:name>
-          <ASKL1plt:description>res1Sel</ASKL1plt:description>
-          <ASKL1plt:value>59</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>res2Sel</ASKL1plt:name>
-          <ASKL1plt:description>res2Sel</ASKL1plt:description>
-          <ASKL1plt:value>60</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>cap1Sel</ASKL1plt:name>
-          <ASKL1plt:description>cap1Sel</ASKL1plt:description>
-          <ASKL1plt:value>61</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>cap2Sel</ASKL1plt:name>
-          <ASKL1plt:description>cap2Sel</ASKL1plt:description>
-          <ASKL1plt:value>62</ASKL1plt:value>
+          <ASKL1plt:value>16</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
           <ASKL1plt:name>midpointLargeThresKLane</ASKL1plt:name>
           <ASKL1plt:description>midpointLargeThresKLane</ASKL1plt:description>
-          <ASKL1plt:value>63</ASKL1plt:value>
+          <ASKL1plt:value>17</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
           <ASKL1plt:name>midpointSmallThresKLane</ASKL1plt:name>
           <ASKL1plt:description>midpointSmallThresKLane</ASKL1plt:description>
-          <ASKL1plt:value>64</ASKL1plt:value>
+          <ASKL1plt:value>18</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
           <ASKL1plt:name>midpointLargeThresCLane</ASKL1plt:name>
           <ASKL1plt:description>midpointLargeThresCLane</ASKL1plt:description>
-          <ASKL1plt:value>65</ASKL1plt:value>
+          <ASKL1plt:value>19</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
           <ASKL1plt:name>midpointSmallThresCLane</ASKL1plt:name>
           <ASKL1plt:description>midpointSmallThresCLane</ASKL1plt:description>
-          <ASKL1plt:value>66</ASKL1plt:value>
+          <ASKL1plt:value>20</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>inxSumfMidpointAdatptiveEnLane</ASKL1plt:name>
+          <ASKL1plt:description>inxSumfMidpointAdatptiveEnLane</ASKL1plt:description>
+          <ASKL1plt:value>21</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
           <ASKL1plt:name>dfeResF0aHighThresInitLane</ASKL1plt:name>
           <ASKL1plt:description>dfeResF0aHighThresInitLane</ASKL1plt:description>
-          <ASKL1plt:value>67</ASKL1plt:value>
+          <ASKL1plt:value>22</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
           <ASKL1plt:name>dfeResF0aHighThresEndLane</ASKL1plt:name>
           <ASKL1plt:description>dfeResF0aHighThresEndLane</ASKL1plt:description>
-          <ASKL1plt:value>68</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>current1Sel</ASKL1plt:name>
-          <ASKL1plt:description>current1Sel</ASKL1plt:description>
-          <ASKL1plt:value>69</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>rl1Sel</ASKL1plt:name>
-          <ASKL1plt:description>rl1Sel</ASKL1plt:description>
-          <ASKL1plt:value>70</ASKL1plt:value>
+          <ASKL1plt:value>23</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
-          <ASKL1plt:name>rl1Extra</ASKL1plt:name>
-          <ASKL1plt:description>rl1Extra</ASKL1plt:description>
-          <ASKL1plt:value>71</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>cl1Ctrl</ASKL1plt:name>
-          <ASKL1plt:description>cl1Ctrl</ASKL1plt:description>
-          <ASKL1plt:value>72</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>enMidFreq</ASKL1plt:name>
-          <ASKL1plt:description>enMidFreq</ASKL1plt:description>
-          <ASKL1plt:value>73</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>cs1Mid</ASKL1plt:name>
-          <ASKL1plt:description>cs1Mid</ASKL1plt:description>
-          <ASKL1plt:value>74</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>rs1Mid</ASKL1plt:name>
-          <ASKL1plt:description>rs1Mid</ASKL1plt:description>
-          <ASKL1plt:value>75</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>rfCtrl</ASKL1plt:name>
-          <ASKL1plt:description>rfCtrl</ASKL1plt:description>
-          <ASKL1plt:value>76</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>rl1TiaSel</ASKL1plt:name>
-          <ASKL1plt:description>rl1TiaSel</ASKL1plt:description>
-          <ASKL1plt:value>77</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>rl1TiaExtra</ASKL1plt:name>
-          <ASKL1plt:description>rl1TiaExtra</ASKL1plt:description>
-          <ASKL1plt:value>78</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>hpfRSel1st</ASKL1plt:name>
-          <ASKL1plt:description>hpfRSel1st</ASKL1plt:description>
-          <ASKL1plt:value>79</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>current1TiaSel</ASKL1plt:name>
-          <ASKL1plt:description>current1TiaSel</ASKL1plt:description>
-          <ASKL1plt:value>80</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>rl2Tune</ASKL1plt:name>
-          <ASKL1plt:description>rl2Tune</ASKL1plt:description>
-          <ASKL1plt:value>81</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>rl2Sel</ASKL1plt:name>
-          <ASKL1plt:description>rl2Sel</ASKL1plt:description>
-          <ASKL1plt:value>82</ASKL1plt:value>
+          <ASKL1plt:name>squelch</ASKL1plt:name>
+          <ASKL1plt:description>squelch</ASKL1plt:description>
+          <ASKL1plt:value>24</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
-          <ASKL1plt:name>rs2Sel</ASKL1plt:name>
-          <ASKL1plt:description>rs2Sel</ASKL1plt:description>
-          <ASKL1plt:value>83</ASKL1plt:value>
+          <ASKL1plt:name>align90</ASKL1plt:name>
+          <ASKL1plt:description>align90</ASKL1plt:description>
+          <ASKL1plt:value>25</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
-          <ASKL1plt:name>current2Sel</ASKL1plt:name>
-          <ASKL1plt:description>current2Sel</ASKL1plt:description>
-          <ASKL1plt:value>84</ASKL1plt:value>
+          <ASKL1plt:name>sampler</ASKL1plt:name>
+          <ASKL1plt:description>sampler</ASKL1plt:description>
+          <ASKL1plt:value>26</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
-          <ASKL1plt:name>hpfRsel2nd</ASKL1plt:name>
-          <ASKL1plt:description>hpfRsel2nd</ASKL1plt:description>
-          <ASKL1plt:value>85</ASKL1plt:value>
+          <ASKL1plt:name>slewRateCtrl0</ASKL1plt:name>
+          <ASKL1plt:description>slewRateCtrl0</ASKL1plt:description>
+          <ASKL1plt:value>27</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
-          <ASKL1plt:name>BW</ASKL1plt:name>
-          <ASKL1plt:description>BW</ASKL1plt:description>
-          <ASKL1plt:value>86</ASKL1plt:value>
+          <ASKL1plt:name>slewRateCtrl1</ASKL1plt:name>
+          <ASKL1plt:description>slewRateCtrl1</ASKL1plt:description>
+          <ASKL1plt:value>28</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
-          <ASKL1plt:name>dfeGAIN</ASKL1plt:name>
-          <ASKL1plt:description>dfeGAIN</ASKL1plt:description>
-          <ASKL1plt:value>87</ASKL1plt:value>
+          <ASKL1plt:name>EO</ASKL1plt:name>
+          <ASKL1plt:description>EO</ASKL1plt:description>
+          <ASKL1plt:value>29</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
-          <ASKL1plt:name>dfeGAIN2</ASKL1plt:name>
-          <ASKL1plt:description>dfeGAIN2</ASKL1plt:description>
-          <ASKL1plt:value>88</ASKL1plt:value>
+          <ASKL1plt:name>minCap1</ASKL1plt:name>
+          <ASKL1plt:description>minCap1</ASKL1plt:description>
+          <ASKL1plt:value>30</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
-          <ASKL1plt:name>pre1</ASKL1plt:name>
-          <ASKL1plt:description>pre1</ASKL1plt:description>
-          <ASKL1plt:value>89</ASKL1plt:value>
+          <ASKL1plt:name>maxCap1</ASKL1plt:name>
+          <ASKL1plt:description>maxCap1</ASKL1plt:description>
+          <ASKL1plt:value>31</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
-          <ASKL1plt:name>pre2</ASKL1plt:name>
-          <ASKL1plt:description>pre2</ASKL1plt:description>
-          <ASKL1plt:value>90</ASKL1plt:value>
+          <ASKL1plt:name>minRes1</ASKL1plt:name>
+          <ASKL1plt:description>minRes1</ASKL1plt:description>
+          <ASKL1plt:value>32</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
-          <ASKL1plt:name>post1</ASKL1plt:name>
-          <ASKL1plt:description>post1</ASKL1plt:description>
-          <ASKL1plt:value>91</ASKL1plt:value>
+          <ASKL1plt:name>maxRes1</ASKL1plt:name>
+          <ASKL1plt:description>maxRes1</ASKL1plt:description>
+          <ASKL1plt:value>33</ASKL1plt:value>
         </ASKL1plt:enum>
       </ASKL1plt:typedef>
       <ASKL1plt:typedef>
         <ASKL1plt:name>boolean-type</ASKL1plt:name>
         <ASKL1plt:type>enumeration</ASKL1plt:type>
-        <ASKL1plt:description>Boolean 32 bits , due to bing endian</ASKL1plt:description>
+        <ASKL1plt:description>Boolean 32 bits , due to big endian</ASKL1plt:description>
         <ASKL1plt:enum>
           <ASKL1plt:name>false</ASKL1plt:name>
           <ASKL1plt:description>False</ASKL1plt:description>
@@ -764,33 +479,6 @@
           <ASKL1plt:value>5</ASKL1plt:value>
         </ASKL1plt:enum>
       </ASKL1plt:typedef>
-      <ASKL1plt:typedef>
-        <ASKL1plt:name>uint8-type</ASKL1plt:name>
-        <ASKL1plt:type>uint32</ASKL1plt:type>
-        <ASKL1plt:description>Uint8 32 bits , due to bing endian</ASKL1plt:description>
-        <ASKL1plt:min>0</ASKL1plt:min>
-        <ASKL1plt:max>255</ASKL1plt:max>
-      </ASKL1plt:typedef>
-      <ASKL1plt:typedef>
-        <ASKL1plt:name>serdes-termination-type</ASKL1plt:name>
-        <ASKL1plt:type>enumeration</ASKL1plt:type>
-        <ASKL1plt:description>RX termination mode</ASKL1plt:description>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>GND</ASKL1plt:name>
-          <ASKL1plt:description>Enabled</ASKL1plt:description>
-          <ASKL1plt:value>0</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>VDD</ASKL1plt:name>
-          <ASKL1plt:description>Disabled</ASKL1plt:description>
-          <ASKL1plt:value>1</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>FLOATING</ASKL1plt:name>
-          <ASKL1plt:description>RS FEC enabled</ASKL1plt:description>
-          <ASKL1plt:value>2</ASKL1plt:value>
-        </ASKL1plt:enum>
-      </ASKL1plt:typedef>
       <ASKL1plt:typedef>
         <ASKL1plt:name>port-interconnect-profile-type</ASKL1plt:name>
         <ASKL1plt:type>enumeration</ASKL1plt:type>
@@ -860,315 +548,517 @@
     <ASKL1plt:Port>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">0</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:laneList-list>
+          <ASKL1plt:laneNumber ASKL1plt:type="uint32">0</ASKL1plt:laneNumber>
+          <ASKL1plt:txParams-list>
+            <ASKL1plt:tx-param ASKL1plt:type="tx-param-type">pre</ASKL1plt:tx-param>
+            <ASKL1plt:tx-param-uint32-value ASKL1plt:type="uint32">0</ASKL1plt:tx-param-uint32-value>
+          </ASKL1plt:txParams-list>
+          <ASKL1plt:txParams-list>
+            <ASKL1plt:tx-param ASKL1plt:type="tx-param-type">post</ASKL1plt:tx-param>
+            <ASKL1plt:tx-param-uint32-value ASKL1plt:type="uint32">0</ASKL1plt:tx-param-uint32-value>
+          </ASKL1plt:txParams-list>
+          <ASKL1plt:txParams-list>
+            <ASKL1plt:tx-param ASKL1plt:type="tx-param-type">peak</ASKL1plt:tx-param>
+            <ASKL1plt:tx-param-uint32-value ASKL1plt:type="uint32">1</ASKL1plt:tx-param-uint32-value>
+          </ASKL1plt:txParams-list>
+        </ASKL1plt:laneList-list>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">1</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">2</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">3</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">4</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">5</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">6</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">7</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">8</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:laneList-list>
+          <ASKL1plt:laneNumber ASKL1plt:type="uint32">0</ASKL1plt:laneNumber>
+          <ASKL1plt:txParams-list>
+            <ASKL1plt:tx-param ASKL1plt:type="tx-param-type">pre</ASKL1plt:tx-param>
+            <ASKL1plt:tx-param-uint32-value ASKL1plt:type="uint32">0</ASKL1plt:tx-param-uint32-value>
+          </ASKL1plt:txParams-list>
+          <ASKL1plt:txParams-list>
+            <ASKL1plt:tx-param ASKL1plt:type="tx-param-type">post</ASKL1plt:tx-param>
+            <ASKL1plt:tx-param-uint32-value ASKL1plt:type="uint32">0</ASKL1plt:tx-param-uint32-value>
+          </ASKL1plt:txParams-list>
+          <ASKL1plt:txParams-list>
+            <ASKL1plt:tx-param ASKL1plt:type="tx-param-type">peak</ASKL1plt:tx-param>
+            <ASKL1plt:tx-param-uint32-value ASKL1plt:type="uint32">5</ASKL1plt:tx-param-uint32-value>
+          </ASKL1plt:txParams-list>
+        </ASKL1plt:laneList-list>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">9</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">10</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">11</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">12</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">13</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">14</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">15</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">16</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:laneList-list>
+          <ASKL1plt:laneNumber ASKL1plt:type="uint32">0</ASKL1plt:laneNumber>
+          <ASKL1plt:txParams-list>
+            <ASKL1plt:tx-param ASKL1plt:type="tx-param-type">pre</ASKL1plt:tx-param>
+            <ASKL1plt:tx-param-uint32-value ASKL1plt:type="uint32">0</ASKL1plt:tx-param-uint32-value>
+          </ASKL1plt:txParams-list>
+          <ASKL1plt:txParams-list>
+            <ASKL1plt:tx-param ASKL1plt:type="tx-param-type">post</ASKL1plt:tx-param>
+            <ASKL1plt:tx-param-uint32-value ASKL1plt:type="uint32">0</ASKL1plt:tx-param-uint32-value>
+          </ASKL1plt:txParams-list>
+          <ASKL1plt:txParams-list>
+            <ASKL1plt:tx-param ASKL1plt:type="tx-param-type">peak</ASKL1plt:tx-param>
+            <ASKL1plt:tx-param-uint32-value ASKL1plt:type="uint32">9</ASKL1plt:tx-param-uint32-value>
+          </ASKL1plt:txParams-list>
+        </ASKL1plt:laneList-list>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">17</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">18</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">19</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">20</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">21</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">22</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">23</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">24</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:laneList-list>
+          <ASKL1plt:laneNumber ASKL1plt:type="uint32">0</ASKL1plt:laneNumber>
+          <ASKL1plt:txParams-list>
+            <ASKL1plt:tx-param ASKL1plt:type="tx-param-type">pre</ASKL1plt:tx-param>
+            <ASKL1plt:tx-param-uint32-value ASKL1plt:type="uint32">0</ASKL1plt:tx-param-uint32-value>
+          </ASKL1plt:txParams-list>
+          <ASKL1plt:txParams-list>
+            <ASKL1plt:tx-param ASKL1plt:type="tx-param-type">post</ASKL1plt:tx-param>
+            <ASKL1plt:tx-param-uint32-value ASKL1plt:type="uint32">0</ASKL1plt:tx-param-uint32-value>
+          </ASKL1plt:txParams-list>
+          <ASKL1plt:txParams-list>
+            <ASKL1plt:tx-param ASKL1plt:type="tx-param-type">peak</ASKL1plt:tx-param>
+            <ASKL1plt:tx-param-uint32-value ASKL1plt:type="uint32">10</ASKL1plt:tx-param-uint32-value>
+          </ASKL1plt:txParams-list>
+        </ASKL1plt:laneList-list>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">25</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">26</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">27</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">28</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">29</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">30</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">31</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">32</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:laneList-list>
+          <ASKL1plt:laneNumber ASKL1plt:type="uint32">0</ASKL1plt:laneNumber>
+          <ASKL1plt:txParams-list>
+            <ASKL1plt:tx-param ASKL1plt:type="tx-param-type">pre</ASKL1plt:tx-param>
+            <ASKL1plt:tx-param-uint32-value ASKL1plt:type="uint32">0</ASKL1plt:tx-param-uint32-value>
+          </ASKL1plt:txParams-list>
+          <ASKL1plt:txParams-list>
+            <ASKL1plt:tx-param ASKL1plt:type="tx-param-type">post</ASKL1plt:tx-param>
+            <ASKL1plt:tx-param-uint32-value ASKL1plt:type="uint32">0</ASKL1plt:tx-param-uint32-value>
+          </ASKL1plt:txParams-list>
+          <ASKL1plt:txParams-list>
+            <ASKL1plt:tx-param ASKL1plt:type="tx-param-type">peak</ASKL1plt:tx-param>
+            <ASKL1plt:tx-param-uint32-value ASKL1plt:type="uint32">14</ASKL1plt:tx-param-uint32-value>
+          </ASKL1plt:txParams-list>
+        </ASKL1plt:laneList-list>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">33</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">34</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">35</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">36</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">37</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">38</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">39</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">40</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:laneList-list>
+          <ASKL1plt:laneNumber ASKL1plt:type="uint32">0</ASKL1plt:laneNumber>
+          <ASKL1plt:txParams-list>
+            <ASKL1plt:tx-param ASKL1plt:type="tx-param-type">pre</ASKL1plt:tx-param>
+            <ASKL1plt:tx-param-uint32-value ASKL1plt:type="uint32">0</ASKL1plt:tx-param-uint32-value>
+          </ASKL1plt:txParams-list>
+          <ASKL1plt:txParams-list>
+            <ASKL1plt:tx-param ASKL1plt:type="tx-param-type">post</ASKL1plt:tx-param>
+            <ASKL1plt:tx-param-uint32-value ASKL1plt:type="uint32">0</ASKL1plt:tx-param-uint32-value>
+          </ASKL1plt:txParams-list>
+          <ASKL1plt:txParams-list>
+            <ASKL1plt:tx-param ASKL1plt:type="tx-param-type">peak</ASKL1plt:tx-param>
+            <ASKL1plt:tx-param-uint32-value ASKL1plt:type="uint32">11</ASKL1plt:tx-param-uint32-value>
+          </ASKL1plt:txParams-list>
+        </ASKL1plt:laneList-list>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">41</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">42</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">43</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">44</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">45</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">46</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">47</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">48</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">10GR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:laneList-list>
+          <ASKL1plt:laneNumber ASKL1plt:type="uint32">0</ASKL1plt:laneNumber>
+          <ASKL1plt:txParams-list>
+            <ASKL1plt:tx-param ASKL1plt:type="tx-param-type">pre</ASKL1plt:tx-param>
+            <ASKL1plt:tx-param-uint32-value ASKL1plt:type="uint32">0</ASKL1plt:tx-param-uint32-value>
+          </ASKL1plt:txParams-list>
+          <ASKL1plt:txParams-list>
+            <ASKL1plt:tx-param ASKL1plt:type="tx-param-type">peak</ASKL1plt:tx-param>
+            <ASKL1plt:tx-param-uint32-value ASKL1plt:type="uint32">0</ASKL1plt:tx-param-uint32-value>
+          </ASKL1plt:txParams-list>
+          <ASKL1plt:txParams-list>
+            <ASKL1plt:tx-param ASKL1plt:type="tx-param-type">post</ASKL1plt:tx-param>
+            <ASKL1plt:tx-param-uint32-value ASKL1plt:type="uint32">9</ASKL1plt:tx-param-uint32-value>
+          </ASKL1plt:txParams-list>
+        </ASKL1plt:laneList-list>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">49</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">10GR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:laneList-list>
+          <ASKL1plt:laneNumber ASKL1plt:type="uint32">0</ASKL1plt:laneNumber>
+          <ASKL1plt:txParams-list>
+            <ASKL1plt:tx-param ASKL1plt:type="tx-param-type">pre</ASKL1plt:tx-param>
+            <ASKL1plt:tx-param-uint32-value ASKL1plt:type="uint32">0</ASKL1plt:tx-param-uint32-value>
+          </ASKL1plt:txParams-list>
+          <ASKL1plt:txParams-list>
+            <ASKL1plt:tx-param ASKL1plt:type="tx-param-type">peak</ASKL1plt:tx-param>
+            <ASKL1plt:tx-param-uint32-value ASKL1plt:type="uint32">0</ASKL1plt:tx-param-uint32-value>
+          </ASKL1plt:txParams-list>
+          <ASKL1plt:txParams-list>
+            <ASKL1plt:tx-param ASKL1plt:type="tx-param-type">post</ASKL1plt:tx-param>
+            <ASKL1plt:tx-param-uint32-value ASKL1plt:type="uint32">10</ASKL1plt:tx-param-uint32-value>
+          </ASKL1plt:txParams-list>
+        </ASKL1plt:laneList-list>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">50</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">10GR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:laneList-list>
+          <ASKL1plt:laneNumber ASKL1plt:type="uint32">0</ASKL1plt:laneNumber>
+          <ASKL1plt:txParams-list>
+            <ASKL1plt:tx-param ASKL1plt:type="tx-param-type">pre</ASKL1plt:tx-param>
+            <ASKL1plt:tx-param-uint32-value ASKL1plt:type="uint32">0</ASKL1plt:tx-param-uint32-value>
+          </ASKL1plt:txParams-list>
+          <ASKL1plt:txParams-list>
+            <ASKL1plt:tx-param ASKL1plt:type="tx-param-type">post</ASKL1plt:tx-param>
+            <ASKL1plt:tx-param-uint32-value ASKL1plt:type="uint32">9</ASKL1plt:tx-param-uint32-value>
+          </ASKL1plt:txParams-list>
+          <ASKL1plt:txParams-list>
+            <ASKL1plt:tx-param ASKL1plt:type="tx-param-type">peak</ASKL1plt:tx-param>
+            <ASKL1plt:tx-param-uint32-value ASKL1plt:type="uint32">0</ASKL1plt:tx-param-uint32-value>
+          </ASKL1plt:txParams-list>
+        </ASKL1plt:laneList-list>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">51</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">10GR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
+        <ASKL1plt:laneList-list>
+          <ASKL1plt:laneNumber ASKL1plt:type="uint32">0</ASKL1plt:laneNumber>
+          <ASKL1plt:txParams-list>
+            <ASKL1plt:tx-param ASKL1plt:type="tx-param-type">pre</ASKL1plt:tx-param>
+            <ASKL1plt:tx-param-uint32-value ASKL1plt:type="uint32">0</ASKL1plt:tx-param-uint32-value>
+          </ASKL1plt:txParams-list>
+          <ASKL1plt:txParams-list>
+            <ASKL1plt:tx-param ASKL1plt:type="tx-param-type">post</ASKL1plt:tx-param>
+            <ASKL1plt:tx-param-uint32-value ASKL1plt:type="uint32">10</ASKL1plt:tx-param-uint32-value>
+          </ASKL1plt:txParams-list>
+          <ASKL1plt:txParams-list>
+            <ASKL1plt:tx-param ASKL1plt:type="tx-param-type">peak</ASKL1plt:tx-param>
+            <ASKL1plt:tx-param-uint32-value ASKL1plt:type="uint32">0</ASKL1plt:tx-param-uint32-value>
+          </ASKL1plt:txParams-list>
+        </ASKL1plt:laneList-list>
       </ASKL1plt:port-list>
     </ASKL1plt:Port>
   </ASKL1plt:ASK-L1>
diff --git a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-PP-AC5X-xb.md5 b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-PP-AC5X-xb.md5
index c043a0d72..5c1c480eb 100644
--- a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-PP-AC5X-xb.md5
+++ b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-PP-AC5X-xb.md5
@@ -1 +1 @@
-209426f8b550ddf85db19925f9f202a1
\ No newline at end of file
+7ca6eaf67da8ee4c5b2a4f480db8919f
\ No newline at end of file
diff --git a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-PP-AC5X-xb.xml b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-PP-AC5X-xb.xml
index 9e40492cf..13b344d6b 100644
--- a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-PP-AC5X-xb.xml
+++ b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-PP-AC5X-xb.xml
@@ -1,5 +1,5 @@
 <?xml version="1.0" encoding="utf-8"?>
-<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-02-19-1.06" profile="Askpp" sid="34f1c14a-b581-422d-bd10-426dfac013dd">
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-06-05-1.08" profile="Askpp" dsig="md5" sid="4cd9a9b8-0123-48b5-a955-6a5c64917f70">
   <askppplt:ASK-PP xmlns:askppplt="urn:marvell:askpp:yang">
     <askppplt:typedefs>
       <askppplt:typedef>
diff --git a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/SAI-AC5X-xb.md5 b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/SAI-AC5X-xb.md5
index 04eaffc09..7d2cfc524 100644
--- a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/SAI-AC5X-xb.md5
+++ b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/SAI-AC5X-xb.md5
@@ -1 +1 @@
-8918d787a5ccaa80a481ddb8b169574a
\ No newline at end of file
+751d5fb74a0861240aa86afad8ad13ef
\ No newline at end of file
diff --git a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/SAI-AC5X-xb.xml b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/SAI-AC5X-xb.xml
index 00c77001f..91246fc35 100644
--- a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/SAI-AC5X-xb.xml
+++ b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/SAI-AC5X-xb.xml
@@ -1,5 +1,5 @@
 <?xml version="1.0" encoding="utf-8"?>
-<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-02-19-1.06" profile="SAI" dsig="md5" sid="c310bbb1-ffca-4c99-9bae-f7d4caff5941">
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-06-05-1.08" profile="SAI" dsig="md5" sid="daa51f10-6b7d-424f-ab07-3c51ae064e20">
   <SAIplt:SAI xmlns:SAIplt="urn:marvell:SAI:yang">
     <SAIplt:typedefs>
       <SAIplt:typedef>
@@ -50,10 +50,20 @@
           <SAIplt:description>Router In Drop Counters track Route Black Hole Packets</SAIplt:description>
           <SAIplt:value>1</SAIplt:value>
         </SAIplt:enum>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>Feature-enable</SAIplt:name>
+        <SAIplt:type>enumeration</SAIplt:type>
+        <SAIplt:description>Feature Enabled/Disabled</SAIplt:description>
         <SAIplt:enum>
-          <SAIplt:name>IN_DROP_ANY</SAIplt:name>
-          <SAIplt:description>Router In Drop Counters track either TTL &amp; Hop Limit Exceeded or Route Black Hole Packets</SAIplt:description>
-          <SAIplt:value>2</SAIplt:value>
+          <SAIplt:name>Disabled</SAIplt:name>
+          <SAIplt:description>Disabled</SAIplt:description>
+          <SAIplt:value>0</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>Enabled</SAIplt:name>
+          <SAIplt:description>Enabled</SAIplt:description>
+          <SAIplt:value>1</SAIplt:value>
         </SAIplt:enum>
       </SAIplt:typedef>
       <SAIplt:typedef>
@@ -432,14 +442,15 @@
       <SAIplt:max_tti SAIplt:type="uint32">1024</SAIplt:max_tti>
     </SAIplt:scalingAC5>
     <SAIplt:Counters>
-      <SAIplt:cnc-base-list>
-        <SAIplt:counter-base SAIplt:type="uint32">0</SAIplt:counter-base>
-      </SAIplt:cnc-base-list>
-      <SAIplt:router-in-drop-counter SAIplt:type="InDropCounter-type">IN_DROP_ANY</SAIplt:router-in-drop-counter>
+      <SAIplt:counter-base SAIplt:type="uint32">0</SAIplt:counter-base>
+      <SAIplt:router-in-drop-counter SAIplt:type="InDropCounter-type">ROUTE_BLACKHOLE</SAIplt:router-in-drop-counter>
     </SAIplt:Counters>
     <SAIplt:Logging>
       <SAIplt:log_dest SAIplt:type="logDest-type">SAI_LOG_SYSLOG</SAIplt:log_dest>
     </SAIplt:Logging>
+    <SAIplt:Feature>
+      <SAIplt:MACsec SAIplt:type="Feature-enable">Disabled</SAIplt:MACsec>
+    </SAIplt:Feature>
     <SAIplt:Features-using-acl>
       <SAIplt:feature SAIplt:type="acl-feature-name-type">control-acl</SAIplt:feature>
       <SAIplt:feature-priority SAIplt:type="feature-priority-type">3</SAIplt:feature-priority>
diff --git a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-Board-M0-48x1G-4x10G.md5 b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-Board-M0-48x1G-4x10G.md5
index d381d2541..5422b86a5 100644
--- a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-Board-M0-48x1G-4x10G.md5
+++ b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-Board-M0-48x1G-4x10G.md5
@@ -1 +1 @@
-78ea2f9bc238a32b68823bc7b082198d
\ No newline at end of file
+d7069397e7466efe2bd6cf4a952b56db
\ No newline at end of file
diff --git a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-Board-M0-48x1G-4x10G.xml b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-Board-M0-48x1G-4x10G.xml
index 63b6aeba3..efb1432c6 100644
--- a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-Board-M0-48x1G-4x10G.xml
+++ b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-Board-M0-48x1G-4x10G.xml
@@ -1,5 +1,5 @@
 <?xml version="1.0" encoding="utf-8"?>
-<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2023-11-20-1.05" profile="Askboard" sid="20929980-c61f-4f1d-b08a-4e64f6d717c2">
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-05-22-1.08" profile="Askboard" sid="9396a3c9-f447-4460-bd9f-7d0c21ca4d16">
   <askboardplt:ASK-Board xmlns:askboardplt="urn:marvell:askboard:yang">
     <askboardplt:typedefs>
       <askboardplt:typedef>
@@ -52,7 +52,7 @@
       <askboardplt:typedef>
         <askboardplt:name>board-pp-interface-channel-type</askboardplt:name>
         <askboardplt:type>enumeration</askboardplt:type>
-        <askboardplt:description>Specifies interface tunnel.</askboardplt:description>
+        <askboardplt:description>Specifies channel interface type.</askboardplt:description>
         <askboardplt:enum>
           <askboardplt:name>pci</askboardplt:name>
           <askboardplt:description>PCI</askboardplt:description>
@@ -64,19 +64,29 @@
           <askboardplt:value>1</askboardplt:value>
         </askboardplt:enum>
         <askboardplt:enum>
-          <askboardplt:name>pex</askboardplt:name>
-          <askboardplt:description>PEX</askboardplt:description>
-          <askboardplt:value>3</askboardplt:value>
+          <askboardplt:name>twsi</askboardplt:name>
+          <askboardplt:description>TWSI</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
         </askboardplt:enum>
+      </askboardplt:typedef>
+      <askboardplt:typedef>
+        <askboardplt:name>board-pp-as-type</askboardplt:name>
+        <askboardplt:type>enumeration</askboardplt:type>
+        <askboardplt:description>Specifies Address space type.</askboardplt:description>
         <askboardplt:enum>
-          <askboardplt:name>pex_eagle</askboardplt:name>
-          <askboardplt:description>PEX EAGLE</askboardplt:description>
-          <askboardplt:value>5</askboardplt:value>
+          <askboardplt:name>4_regions</askboardplt:name>
+          <askboardplt:description>address-space 4 regions</askboardplt:description>
+          <askboardplt:value>0</askboardplt:value>
         </askboardplt:enum>
         <askboardplt:enum>
-          <askboardplt:name>pex_falcon_z</askboardplt:name>
-          <askboardplt:description>PEX FALCON Z</askboardplt:description>
-          <askboardplt:value>6</askboardplt:value>
+          <askboardplt:name>8_regions</askboardplt:name>
+          <askboardplt:description>address-space 8 regions</askboardplt:description>
+          <askboardplt:value>1</askboardplt:value>
+        </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>atu</askboardplt:name>
+          <askboardplt:description>address translation unit</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
         </askboardplt:enum>
       </askboardplt:typedef>
       <askboardplt:typedef>
@@ -683,6 +693,11 @@ lowercase characters.</askboardplt:description>
           <askboardplt:description>AC5X</askboardplt:description>
           <askboardplt:value>1</askboardplt:value>
         </askboardplt:enum>
+        <askboardplt:enum>
+          <askboardplt:name>ASIC_Falcon</askboardplt:name>
+          <askboardplt:description>FALCON</askboardplt:description>
+          <askboardplt:value>2</askboardplt:value>
+        </askboardplt:enum>
       </askboardplt:typedef>
     </askboardplt:typedefs>
     <askboardplt:ASIC_Type askboardplt:type="asic-type">ASIC_AC3X</askboardplt:ASIC_Type>
@@ -691,7 +706,8 @@ lowercase characters.</askboardplt:description>
     <askboardplt:extDrvCallType askboardplt:type="board-callback-type">linux-static</askboardplt:extDrvCallType>
     <askboardplt:mapType askboardplt:type="board-pp-map-type">autoscan</askboardplt:mapType>
     <askboardplt:cpuType askboardplt:type="cpu-type">external</askboardplt:cpuType>
-    <askboardplt:mngInterfaceType askboardplt:type="board-pp-interface-channel-type">pex</askboardplt:mngInterfaceType>
+    <askboardplt:mngInterfaceType askboardplt:type="board-pp-interface-channel-type">pci</askboardplt:mngInterfaceType>
+    <askboardplt:adressSpaceType askboardplt:type="board-pp-as-type">8_regions</askboardplt:adressSpaceType>
     <askboardplt:device-list>
       <askboardplt:devNum askboardplt:type="device-id-type">0</askboardplt:devNum>
       <askboardplt:deviceId askboardplt:type="device-id-type">0</askboardplt:deviceId>
@@ -713,7 +729,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">1</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">0</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -734,7 +749,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">0</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">0</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -755,7 +769,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">3</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">0</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -776,7 +789,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">2</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">0</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -797,7 +809,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">5</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">0</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -818,7 +829,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">4</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">0</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -839,7 +849,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">7</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">0</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -860,7 +869,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">6</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">0</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -881,7 +889,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">1</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -902,7 +909,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">0</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -923,7 +929,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">3</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -944,7 +949,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">2</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -965,7 +969,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">5</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -986,7 +989,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">4</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1007,7 +1009,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">7</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1028,7 +1029,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">6</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1049,7 +1049,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">9</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1070,7 +1069,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">8</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1091,7 +1089,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">11</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1112,7 +1109,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">10</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1133,7 +1129,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">13</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1154,7 +1149,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">12</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1175,7 +1169,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">15</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1196,7 +1189,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">14</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1214,7 +1206,6 @@ lowercase characters.</askboardplt:description>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">0</askboardplt:ledPosition>
           <askboardplt:polarityInvertList-list>
@@ -1242,7 +1233,6 @@ lowercase characters.</askboardplt:description>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">1</askboardplt:ledPosition>
           <askboardplt:polarityInvertList-list>
@@ -1274,7 +1264,6 @@ lowercase characters.</askboardplt:description>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1296,7 +1285,6 @@ lowercase characters.</askboardplt:description>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1318,7 +1306,6 @@ lowercase characters.</askboardplt:description>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1444,7 +1431,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">5</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">0</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1465,7 +1451,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">4</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">0</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1486,7 +1471,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">7</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">0</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1507,7 +1491,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">6</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">0</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1528,7 +1511,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">1</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">0</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1549,7 +1531,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">0</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">0</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1570,7 +1551,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">3</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">0</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1591,7 +1571,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">2</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">0</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1612,7 +1591,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">1</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1633,7 +1611,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">0</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1654,7 +1631,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">3</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1675,7 +1651,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">2</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1696,7 +1671,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">5</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1717,7 +1691,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">4</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1738,7 +1711,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">7</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1759,7 +1731,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">6</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1780,7 +1751,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">9</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1801,7 +1771,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">8</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1822,7 +1791,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">11</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1843,7 +1811,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">10</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1864,7 +1831,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">13</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1885,7 +1851,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">12</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1906,7 +1871,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">15</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1927,7 +1891,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">14</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1945,7 +1908,6 @@ lowercase characters.</askboardplt:description>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">0</askboardplt:ledPosition>
           <askboardplt:polarityInvertList-list>
@@ -1973,7 +1935,6 @@ lowercase characters.</askboardplt:description>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">1</askboardplt:ledPosition>
           <askboardplt:polarityInvertList-list>
@@ -2005,7 +1966,6 @@ lowercase characters.</askboardplt:description>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -2027,7 +1987,6 @@ lowercase characters.</askboardplt:description>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -2049,7 +2008,6 @@ lowercase characters.</askboardplt:description>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -2154,6 +2112,23 @@ lowercase characters.</askboardplt:description>
         </askboardplt:ledstream-class-manipulation-list>
       </askboardplt:Ledstream-interface-list>
     </askboardplt:device-list>
+    <askboardplt:phyLedControl>
+      <askboardplt:phy-type-list>
+        <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1680</askboardplt:phyType>
+        <askboardplt:phy-led-regs-list>
+          <askboardplt:reg-addr askboardplt:type="uint16">16</askboardplt:reg-addr>
+          <askboardplt:page-num askboardplt:type="uint16">3</askboardplt:page-num>
+          <askboardplt:reg-value askboardplt:type="uint16">23</askboardplt:reg-value>
+          <askboardplt:reg-value-mask askboardplt:type="uint16">65280</askboardplt:reg-value-mask>
+        </askboardplt:phy-led-regs-list>
+        <askboardplt:phy-led-regs-list>
+          <askboardplt:reg-addr askboardplt:type="uint16">27</askboardplt:reg-addr>
+          <askboardplt:page-num askboardplt:type="uint16">4</askboardplt:page-num>
+          <askboardplt:reg-value askboardplt:type="uint16">32</askboardplt:reg-value>
+          <askboardplt:reg-value-mask askboardplt:type="uint16">65503</askboardplt:reg-value-mask>
+        </askboardplt:phy-led-regs-list>
+      </askboardplt:phy-type-list>
+    </askboardplt:phyLedControl>
     <askboardplt:UDSFilePath askboardplt:type="std-string">.</askboardplt:UDSFilePath>
     <askboardplt:serdesMux>
       <askboardplt:serdesMuxSchemePortMod askboardplt:type="uint32">1</askboardplt:serdesMuxSchemePortMod>
diff --git a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D0-48x1G-4x10G.md5 b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D0-48x1G-4x10G.md5
index 7ff2b96da..a232c8381 100644
--- a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D0-48x1G-4x10G.md5
+++ b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D0-48x1G-4x10G.md5
@@ -1 +1 @@
-a51445be255ef6afa324278ba9e191d9
\ No newline at end of file
+bf932ba262c96acdfe677bd5078a21d7
\ No newline at end of file
diff --git a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D0-48x1G-4x10G.xml b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D0-48x1G-4x10G.xml
index a254fbaa5..f1cc5989d 100644
--- a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D0-48x1G-4x10G.xml
+++ b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D0-48x1G-4x10G.xml
@@ -1,5 +1,5 @@
 <?xml version="1.0" encoding="utf-8"?>
-<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2023-11-20-1.05" profile="Askl1" sid="a9deb744-f6cb-4675-bab3-11132e7db1cd">
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-05-22-1.08" profile="Askl1" sid="d7694ab8-0eab-47cd-82ce-10074030f449">
   <ASKL1plt:ASK-L1 xmlns:ASKL1plt="urn:marvell:ASKL1:yang">
     <ASKL1plt:typedefs>
       <ASKL1plt:typedef>
@@ -239,8 +239,8 @@
         <ASKL1plt:type>enumeration</ASKL1plt:type>
         <ASKL1plt:description>Tx parameter type</ASKL1plt:description>
         <ASKL1plt:enum>
-          <ASKL1plt:name>atten</ASKL1plt:name>
-          <ASKL1plt:description>atten</ASKL1plt:description>
+          <ASKL1plt:name>pre</ASKL1plt:name>
+          <ASKL1plt:description>pre</ASKL1plt:description>
           <ASKL1plt:value>0</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
@@ -248,75 +248,10 @@
           <ASKL1plt:description>post</ASKL1plt:description>
           <ASKL1plt:value>1</ASKL1plt:value>
         </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>pre</ASKL1plt:name>
-          <ASKL1plt:description>pre</ASKL1plt:description>
-          <ASKL1plt:value>2</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>pre2</ASKL1plt:name>
-          <ASKL1plt:description>pre2</ASKL1plt:description>
-          <ASKL1plt:value>3</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>pre3</ASKL1plt:name>
-          <ASKL1plt:description>pre3</ASKL1plt:description>
-          <ASKL1plt:value>4</ASKL1plt:value>
-        </ASKL1plt:enum>
         <ASKL1plt:enum>
           <ASKL1plt:name>peak</ASKL1plt:name>
           <ASKL1plt:description>peak</ASKL1plt:description>
-          <ASKL1plt:value>5</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>main</ASKL1plt:name>
-          <ASKL1plt:description>main</ASKL1plt:description>
-          <ASKL1plt:value>6</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>txAmpAdjEn</ASKL1plt:name>
-          <ASKL1plt:description>txAmpAdjEn</ASKL1plt:description>
-          <ASKL1plt:value>7</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>emph0</ASKL1plt:name>
-          <ASKL1plt:description>emph0</ASKL1plt:description>
-          <ASKL1plt:value>8</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>emph1</ASKL1plt:name>
-          <ASKL1plt:description>emph1</ASKL1plt:description>
-          <ASKL1plt:value>9</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>txAmpShft</ASKL1plt:name>
-          <ASKL1plt:description>txAmpShft</ASKL1plt:description>
-          <ASKL1plt:value>10</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>txEmphEn</ASKL1plt:name>
-          <ASKL1plt:description>txEmphEn</ASKL1plt:description>
-          <ASKL1plt:value>11</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>txEmphEn1</ASKL1plt:name>
-          <ASKL1plt:description>txEmphEn1</ASKL1plt:description>
-          <ASKL1plt:value>12</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>txAmpAdj</ASKL1plt:name>
-          <ASKL1plt:description>txAmpAdj</ASKL1plt:description>
-          <ASKL1plt:value>13</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>slewCtrlEn</ASKL1plt:name>
-          <ASKL1plt:description>slewCtrlEn</ASKL1plt:description>
-          <ASKL1plt:value>14</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>slewRate</ASKL1plt:name>
-          <ASKL1plt:description>slewRate</ASKL1plt:description>
-          <ASKL1plt:value>15</ASKL1plt:value>
+          <ASKL1plt:value>2</ASKL1plt:value>
         </ASKL1plt:enum>
       </ASKL1plt:typedef>
       <ASKL1plt:typedef>
@@ -324,400 +259,180 @@
         <ASKL1plt:type>enumeration</ASKL1plt:type>
         <ASKL1plt:description>Rx parameter type</ASKL1plt:description>
         <ASKL1plt:enum>
-          <ASKL1plt:name>sqlch</ASKL1plt:name>
-          <ASKL1plt:description>sqlch</ASKL1plt:description>
+          <ASKL1plt:name>dataRate</ASKL1plt:name>
+          <ASKL1plt:description>dataRate</ASKL1plt:description>
           <ASKL1plt:value>0</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
-          <ASKL1plt:name>DC</ASKL1plt:name>
-          <ASKL1plt:description>DC</ASKL1plt:description>
+          <ASKL1plt:name>res1Sel</ASKL1plt:name>
+          <ASKL1plt:description>res1Sel</ASKL1plt:description>
           <ASKL1plt:value>1</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
-          <ASKL1plt:name>LF</ASKL1plt:name>
-          <ASKL1plt:description>LF</ASKL1plt:description>
+          <ASKL1plt:name>res2Sel</ASKL1plt:name>
+          <ASKL1plt:description>res2Sel</ASKL1plt:description>
           <ASKL1plt:value>2</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
-          <ASKL1plt:name>HF</ASKL1plt:name>
-          <ASKL1plt:description>HF</ASKL1plt:description>
+          <ASKL1plt:name>cap1Sel</ASKL1plt:name>
+          <ASKL1plt:description>cap1Sel</ASKL1plt:description>
           <ASKL1plt:value>3</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
-          <ASKL1plt:name>gainShape1</ASKL1plt:name>
-          <ASKL1plt:description>gainShape1</ASKL1plt:description>
+          <ASKL1plt:name>cap2Sel</ASKL1plt:name>
+          <ASKL1plt:description>cap2Sel</ASKL1plt:description>
           <ASKL1plt:value>4</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
-          <ASKL1plt:name>gainShape2</ASKL1plt:name>
-          <ASKL1plt:description>gainShape2</ASKL1plt:description>
+          <ASKL1plt:name>minCap</ASKL1plt:name>
+          <ASKL1plt:description>minCap</ASKL1plt:description>
           <ASKL1plt:value>5</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
-          <ASKL1plt:name>shortChannelEn</ASKL1plt:name>
-          <ASKL1plt:description>shortChannelEn</ASKL1plt:description>
+          <ASKL1plt:name>minCapN</ASKL1plt:name>
+          <ASKL1plt:description>minCapN</ASKL1plt:description>
+          <ASKL1plt:value>6</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>sumfBoostTargetC0</ASKL1plt:name>
+          <ASKL1plt:description>sumfBoostTargetC0</ASKL1plt:description>
           <ASKL1plt:value>7</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
-          <ASKL1plt:name>bfLf</ASKL1plt:name>
-          <ASKL1plt:description>bfLf</ASKL1plt:description>
+          <ASKL1plt:name>sumfBoostTargetC1</ASKL1plt:name>
+          <ASKL1plt:description>sumfBoostTargetC1</ASKL1plt:description>
           <ASKL1plt:value>8</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
-          <ASKL1plt:name>bfHf</ASKL1plt:name>
-          <ASKL1plt:description>bfHf</ASKL1plt:description>
+          <ASKL1plt:name>sumfBoostTargetC2</ASKL1plt:name>
+          <ASKL1plt:description>sumfBoostTargetC2</ASKL1plt:description>
           <ASKL1plt:value>9</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
-          <ASKL1plt:name>minLf</ASKL1plt:name>
-          <ASKL1plt:description>minLf</ASKL1plt:description>
+          <ASKL1plt:name>midpointPhaseOs0</ASKL1plt:name>
+          <ASKL1plt:description>midpointPhaseOs0</ASKL1plt:description>
           <ASKL1plt:value>10</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
-          <ASKL1plt:name>maxLf</ASKL1plt:name>
-          <ASKL1plt:description>maxLf</ASKL1plt:description>
+          <ASKL1plt:name>midpointPhaseOs1</ASKL1plt:name>
+          <ASKL1plt:description>midpointPhaseOs1</ASKL1plt:description>
           <ASKL1plt:value>11</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
-          <ASKL1plt:name>minHf</ASKL1plt:name>
-          <ASKL1plt:description>minHf</ASKL1plt:description>
+          <ASKL1plt:name>midpointPhaseOs2</ASKL1plt:name>
+          <ASKL1plt:description>midpointPhaseOs2</ASKL1plt:description>
           <ASKL1plt:value>12</ASKL1plt:value>
         </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>maxHf</ASKL1plt:name>
-          <ASKL1plt:description>maxHf</ASKL1plt:description>
-          <ASKL1plt:value>13</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>minPre1</ASKL1plt:name>
-          <ASKL1plt:description>minPre1</ASKL1plt:description>
-          <ASKL1plt:value>14</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>maxPre1</ASKL1plt:name>
-          <ASKL1plt:description>maxPre1</ASKL1plt:description>
-          <ASKL1plt:value>15</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>minPre2</ASKL1plt:name>
-          <ASKL1plt:description>minPre2</ASKL1plt:description>
-          <ASKL1plt:value>16</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>maxPre2</ASKL1plt:name>
-          <ASKL1plt:description/>
-          <ASKL1plt:value>17</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>minPost</ASKL1plt:name>
-          <ASKL1plt:description>minPost</ASKL1plt:description>
-          <ASKL1plt:value>18</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>maxPost</ASKL1plt:name>
-          <ASKL1plt:description>maxPost</ASKL1plt:description>
-          <ASKL1plt:value>19</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>squelch</ASKL1plt:name>
-          <ASKL1plt:description>squelch</ASKL1plt:description>
-          <ASKL1plt:value>20</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>termination</ASKL1plt:name>
-          <ASKL1plt:description>termination</ASKL1plt:description>
-          <ASKL1plt:value>27</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>coldEnvelope</ASKL1plt:name>
-          <ASKL1plt:description>coldEnvelope</ASKL1plt:description>
-          <ASKL1plt:value>35</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>hotEnvelope</ASKL1plt:name>
-          <ASKL1plt:description>hotEnvelope</ASKL1plt:description>
-          <ASKL1plt:value>36</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>dcGain</ASKL1plt:name>
-          <ASKL1plt:description>dcGain</ASKL1plt:description>
-          <ASKL1plt:value>37</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>bandWidth</ASKL1plt:name>
-          <ASKL1plt:description>bandWidth</ASKL1plt:description>
-          <ASKL1plt:value>38</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>dfe</ASKL1plt:name>
-          <ASKL1plt:description>dfe</ASKL1plt:description>
-          <ASKL1plt:value>39</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>ffeR</ASKL1plt:name>
-          <ASKL1plt:description>ffeR</ASKL1plt:description>
-          <ASKL1plt:value>40</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>ffeC</ASKL1plt:name>
-          <ASKL1plt:description>ffeC</ASKL1plt:description>
-          <ASKL1plt:value>41</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>sampler</ASKL1plt:name>
-          <ASKL1plt:description>sampler</ASKL1plt:description>
-          <ASKL1plt:value>42</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>align90</ASKL1plt:name>
-          <ASKL1plt:description>align90</ASKL1plt:description>
-          <ASKL1plt:value>43</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>ffeS</ASKL1plt:name>
-          <ASKL1plt:description>ffeS</ASKL1plt:description>
-          <ASKL1plt:value>44</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>resSel</ASKL1plt:name>
-          <ASKL1plt:description>resSel</ASKL1plt:description>
-          <ASKL1plt:value>45</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>resShift</ASKL1plt:name>
-          <ASKL1plt:description>resShift</ASKL1plt:description>
-          <ASKL1plt:value>46</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>capSel</ASKL1plt:name>
-          <ASKL1plt:description>capSel</ASKL1plt:description>
-          <ASKL1plt:value>47</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>ffeSettingForce</ASKL1plt:name>
-          <ASKL1plt:description>ffeSettingForce</ASKL1plt:description>
-          <ASKL1plt:value>48</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>adaptedResSel</ASKL1plt:name>
-          <ASKL1plt:description>adaptedResSel</ASKL1plt:description>
-          <ASKL1plt:value>49</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>adaptedCapSel</ASKL1plt:name>
-          <ASKL1plt:description>adaptedCapSel</ASKL1plt:description>
-          <ASKL1plt:value>50</ASKL1plt:value>
-        </ASKL1plt:enum>
         <ASKL1plt:enum>
           <ASKL1plt:name>selmufi</ASKL1plt:name>
           <ASKL1plt:description>selmufi</ASKL1plt:description>
-          <ASKL1plt:value>51</ASKL1plt:value>
+          <ASKL1plt:value>13</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
           <ASKL1plt:name>selmuff</ASKL1plt:name>
           <ASKL1plt:description>selmuff</ASKL1plt:description>
-          <ASKL1plt:value>52</ASKL1plt:value>
+          <ASKL1plt:value>14</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
           <ASKL1plt:name>selmupi</ASKL1plt:name>
           <ASKL1plt:description>selmupi</ASKL1plt:description>
-          <ASKL1plt:value>53</ASKL1plt:value>
+          <ASKL1plt:value>15</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
           <ASKL1plt:name>selmupf</ASKL1plt:name>
           <ASKL1plt:description>selmupf</ASKL1plt:description>
-          <ASKL1plt:value>54</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>slewRateCtrl0</ASKL1plt:name>
-          <ASKL1plt:description>slewRateCtrl0</ASKL1plt:description>
-          <ASKL1plt:value>55</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>slewRateCtrl1</ASKL1plt:name>
-          <ASKL1plt:description>slewRateCtrl1</ASKL1plt:description>
-          <ASKL1plt:value>56</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>EO</ASKL1plt:name>
-          <ASKL1plt:description>EO</ASKL1plt:description>
-          <ASKL1plt:value>57</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>dataRate</ASKL1plt:name>
-          <ASKL1plt:description>dataRate</ASKL1plt:description>
-          <ASKL1plt:value>58</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>res1Sel</ASKL1plt:name>
-          <ASKL1plt:description>res1Sel</ASKL1plt:description>
-          <ASKL1plt:value>59</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>res2Sel</ASKL1plt:name>
-          <ASKL1plt:description>res2Sel</ASKL1plt:description>
-          <ASKL1plt:value>60</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>cap1Sel</ASKL1plt:name>
-          <ASKL1plt:description>cap1Sel</ASKL1plt:description>
-          <ASKL1plt:value>61</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>cap2Sel</ASKL1plt:name>
-          <ASKL1plt:description>cap2Sel</ASKL1plt:description>
-          <ASKL1plt:value>62</ASKL1plt:value>
+          <ASKL1plt:value>16</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
           <ASKL1plt:name>midpointLargeThresKLane</ASKL1plt:name>
           <ASKL1plt:description>midpointLargeThresKLane</ASKL1plt:description>
-          <ASKL1plt:value>63</ASKL1plt:value>
+          <ASKL1plt:value>17</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
           <ASKL1plt:name>midpointSmallThresKLane</ASKL1plt:name>
           <ASKL1plt:description>midpointSmallThresKLane</ASKL1plt:description>
-          <ASKL1plt:value>64</ASKL1plt:value>
+          <ASKL1plt:value>18</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
           <ASKL1plt:name>midpointLargeThresCLane</ASKL1plt:name>
           <ASKL1plt:description>midpointLargeThresCLane</ASKL1plt:description>
-          <ASKL1plt:value>65</ASKL1plt:value>
+          <ASKL1plt:value>19</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
           <ASKL1plt:name>midpointSmallThresCLane</ASKL1plt:name>
           <ASKL1plt:description>midpointSmallThresCLane</ASKL1plt:description>
-          <ASKL1plt:value>66</ASKL1plt:value>
+          <ASKL1plt:value>20</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>inxSumfMidpointAdatptiveEnLane</ASKL1plt:name>
+          <ASKL1plt:description>inxSumfMidpointAdatptiveEnLane</ASKL1plt:description>
+          <ASKL1plt:value>21</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
           <ASKL1plt:name>dfeResF0aHighThresInitLane</ASKL1plt:name>
           <ASKL1plt:description>dfeResF0aHighThresInitLane</ASKL1plt:description>
-          <ASKL1plt:value>67</ASKL1plt:value>
+          <ASKL1plt:value>22</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
           <ASKL1plt:name>dfeResF0aHighThresEndLane</ASKL1plt:name>
           <ASKL1plt:description>dfeResF0aHighThresEndLane</ASKL1plt:description>
-          <ASKL1plt:value>68</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>current1Sel</ASKL1plt:name>
-          <ASKL1plt:description>current1Sel</ASKL1plt:description>
-          <ASKL1plt:value>69</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>rl1Sel</ASKL1plt:name>
-          <ASKL1plt:description>rl1Sel</ASKL1plt:description>
-          <ASKL1plt:value>70</ASKL1plt:value>
+          <ASKL1plt:value>23</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
-          <ASKL1plt:name>rl1Extra</ASKL1plt:name>
-          <ASKL1plt:description>rl1Extra</ASKL1plt:description>
-          <ASKL1plt:value>71</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>cl1Ctrl</ASKL1plt:name>
-          <ASKL1plt:description>cl1Ctrl</ASKL1plt:description>
-          <ASKL1plt:value>72</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>enMidFreq</ASKL1plt:name>
-          <ASKL1plt:description>enMidFreq</ASKL1plt:description>
-          <ASKL1plt:value>73</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>cs1Mid</ASKL1plt:name>
-          <ASKL1plt:description>cs1Mid</ASKL1plt:description>
-          <ASKL1plt:value>74</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>rs1Mid</ASKL1plt:name>
-          <ASKL1plt:description>rs1Mid</ASKL1plt:description>
-          <ASKL1plt:value>75</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>rfCtrl</ASKL1plt:name>
-          <ASKL1plt:description>rfCtrl</ASKL1plt:description>
-          <ASKL1plt:value>76</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>rl1TiaSel</ASKL1plt:name>
-          <ASKL1plt:description>rl1TiaSel</ASKL1plt:description>
-          <ASKL1plt:value>77</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>rl1TiaExtra</ASKL1plt:name>
-          <ASKL1plt:description>rl1TiaExtra</ASKL1plt:description>
-          <ASKL1plt:value>78</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>hpfRSel1st</ASKL1plt:name>
-          <ASKL1plt:description>hpfRSel1st</ASKL1plt:description>
-          <ASKL1plt:value>79</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>current1TiaSel</ASKL1plt:name>
-          <ASKL1plt:description>current1TiaSel</ASKL1plt:description>
-          <ASKL1plt:value>80</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>rl2Tune</ASKL1plt:name>
-          <ASKL1plt:description>rl2Tune</ASKL1plt:description>
-          <ASKL1plt:value>81</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>rl2Sel</ASKL1plt:name>
-          <ASKL1plt:description>rl2Sel</ASKL1plt:description>
-          <ASKL1plt:value>82</ASKL1plt:value>
+          <ASKL1plt:name>squelch</ASKL1plt:name>
+          <ASKL1plt:description>squelch</ASKL1plt:description>
+          <ASKL1plt:value>24</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
-          <ASKL1plt:name>rs2Sel</ASKL1plt:name>
-          <ASKL1plt:description>rs2Sel</ASKL1plt:description>
-          <ASKL1plt:value>83</ASKL1plt:value>
+          <ASKL1plt:name>align90</ASKL1plt:name>
+          <ASKL1plt:description>align90</ASKL1plt:description>
+          <ASKL1plt:value>25</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
-          <ASKL1plt:name>current2Sel</ASKL1plt:name>
-          <ASKL1plt:description>current2Sel</ASKL1plt:description>
-          <ASKL1plt:value>84</ASKL1plt:value>
+          <ASKL1plt:name>sampler</ASKL1plt:name>
+          <ASKL1plt:description>sampler</ASKL1plt:description>
+          <ASKL1plt:value>26</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
-          <ASKL1plt:name>hpfRsel2nd</ASKL1plt:name>
-          <ASKL1plt:description>hpfRsel2nd</ASKL1plt:description>
-          <ASKL1plt:value>85</ASKL1plt:value>
+          <ASKL1plt:name>slewRateCtrl0</ASKL1plt:name>
+          <ASKL1plt:description>slewRateCtrl0</ASKL1plt:description>
+          <ASKL1plt:value>27</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
-          <ASKL1plt:name>BW</ASKL1plt:name>
-          <ASKL1plt:description>BW</ASKL1plt:description>
-          <ASKL1plt:value>86</ASKL1plt:value>
+          <ASKL1plt:name>slewRateCtrl1</ASKL1plt:name>
+          <ASKL1plt:description>slewRateCtrl1</ASKL1plt:description>
+          <ASKL1plt:value>28</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
-          <ASKL1plt:name>dfeGAIN</ASKL1plt:name>
-          <ASKL1plt:description>dfeGAIN</ASKL1plt:description>
-          <ASKL1plt:value>87</ASKL1plt:value>
+          <ASKL1plt:name>EO</ASKL1plt:name>
+          <ASKL1plt:description>EO</ASKL1plt:description>
+          <ASKL1plt:value>29</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
-          <ASKL1plt:name>dfeGAIN2</ASKL1plt:name>
-          <ASKL1plt:description>dfeGAIN2</ASKL1plt:description>
-          <ASKL1plt:value>88</ASKL1plt:value>
+          <ASKL1plt:name>minCap1</ASKL1plt:name>
+          <ASKL1plt:description>minCap1</ASKL1plt:description>
+          <ASKL1plt:value>30</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
-          <ASKL1plt:name>pre1</ASKL1plt:name>
-          <ASKL1plt:description>pre1</ASKL1plt:description>
-          <ASKL1plt:value>89</ASKL1plt:value>
+          <ASKL1plt:name>maxCap1</ASKL1plt:name>
+          <ASKL1plt:description>maxCap1</ASKL1plt:description>
+          <ASKL1plt:value>31</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
-          <ASKL1plt:name>pre2</ASKL1plt:name>
-          <ASKL1plt:description>pre2</ASKL1plt:description>
-          <ASKL1plt:value>90</ASKL1plt:value>
+          <ASKL1plt:name>minRes1</ASKL1plt:name>
+          <ASKL1plt:description>minRes1</ASKL1plt:description>
+          <ASKL1plt:value>32</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
-          <ASKL1plt:name>post1</ASKL1plt:name>
-          <ASKL1plt:description>post1</ASKL1plt:description>
-          <ASKL1plt:value>91</ASKL1plt:value>
+          <ASKL1plt:name>maxRes1</ASKL1plt:name>
+          <ASKL1plt:description>maxRes1</ASKL1plt:description>
+          <ASKL1plt:value>33</ASKL1plt:value>
         </ASKL1plt:enum>
       </ASKL1plt:typedef>
       <ASKL1plt:typedef>
         <ASKL1plt:name>boolean-type</ASKL1plt:name>
         <ASKL1plt:type>enumeration</ASKL1plt:type>
-        <ASKL1plt:description>Boolean 32 bits , due to bing endian</ASKL1plt:description>
+        <ASKL1plt:description>Boolean 32 bits , due to big endian</ASKL1plt:description>
         <ASKL1plt:enum>
           <ASKL1plt:name>false</ASKL1plt:name>
           <ASKL1plt:description>False</ASKL1plt:description>
@@ -764,33 +479,6 @@
           <ASKL1plt:value>5</ASKL1plt:value>
         </ASKL1plt:enum>
       </ASKL1plt:typedef>
-      <ASKL1plt:typedef>
-        <ASKL1plt:name>uint8-type</ASKL1plt:name>
-        <ASKL1plt:type>uint32</ASKL1plt:type>
-        <ASKL1plt:description>Uint8 32 bits , due to bing endian</ASKL1plt:description>
-        <ASKL1plt:min>0</ASKL1plt:min>
-        <ASKL1plt:max>255</ASKL1plt:max>
-      </ASKL1plt:typedef>
-      <ASKL1plt:typedef>
-        <ASKL1plt:name>serdes-termination-type</ASKL1plt:name>
-        <ASKL1plt:type>enumeration</ASKL1plt:type>
-        <ASKL1plt:description>RX termination mode</ASKL1plt:description>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>GND</ASKL1plt:name>
-          <ASKL1plt:description>Enabled</ASKL1plt:description>
-          <ASKL1plt:value>0</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>VDD</ASKL1plt:name>
-          <ASKL1plt:description>Disabled</ASKL1plt:description>
-          <ASKL1plt:value>1</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>FLOATING</ASKL1plt:name>
-          <ASKL1plt:description>RS FEC enabled</ASKL1plt:description>
-          <ASKL1plt:value>2</ASKL1plt:value>
-        </ASKL1plt:enum>
-      </ASKL1plt:typedef>
       <ASKL1plt:typedef>
         <ASKL1plt:name>port-interconnect-profile-type</ASKL1plt:name>
         <ASKL1plt:type>enumeration</ASKL1plt:type>
@@ -870,174 +558,203 @@
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">18</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">19</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">20</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">21</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">22</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">23</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">24</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">25</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">26</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">27</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">28</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">29</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">30</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">31</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">32</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">33</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">34</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">35</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">36</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">37</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">38</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">39</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">40</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">49</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">10GR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">50</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">10GR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">53</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">25GR2</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">55</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">25GR2</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">57</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">25GR2</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
     </ASKL1plt:Port>
   </ASKL1plt:ASK-L1>
diff --git a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D1-48x1G-4x10G.md5 b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D1-48x1G-4x10G.md5
index 63460edb3..2e3f0e034 100644
--- a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D1-48x1G-4x10G.md5
+++ b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D1-48x1G-4x10G.md5
@@ -1 +1 @@
-afe146bae79635a1513eba92343210b6
\ No newline at end of file
+bb2f27ac93e33103554948dee6f3a1f1
\ No newline at end of file
diff --git a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D1-48x1G-4x10G.xml b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D1-48x1G-4x10G.xml
index d9ea4a9e2..30c2712f2 100644
--- a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D1-48x1G-4x10G.xml
+++ b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D1-48x1G-4x10G.xml
@@ -1,5 +1,5 @@
 <?xml version="1.0" encoding="utf-8"?>
-<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2023-11-20-1.05" profile="Askl1" sid="a9deb744-f6cb-4675-bab3-11132e7db1cd">
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-05-22-1.08" profile="Askl1" sid="d7694ab8-0eab-47cd-82ce-10074030f449">
   <ASKL1plt:ASK-L1 xmlns:ASKL1plt="urn:marvell:ASKL1:yang">
     <ASKL1plt:typedefs>
       <ASKL1plt:typedef>
@@ -239,8 +239,8 @@
         <ASKL1plt:type>enumeration</ASKL1plt:type>
         <ASKL1plt:description>Tx parameter type</ASKL1plt:description>
         <ASKL1plt:enum>
-          <ASKL1plt:name>atten</ASKL1plt:name>
-          <ASKL1plt:description>atten</ASKL1plt:description>
+          <ASKL1plt:name>pre</ASKL1plt:name>
+          <ASKL1plt:description>pre</ASKL1plt:description>
           <ASKL1plt:value>0</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
@@ -248,75 +248,10 @@
           <ASKL1plt:description>post</ASKL1plt:description>
           <ASKL1plt:value>1</ASKL1plt:value>
         </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>pre</ASKL1plt:name>
-          <ASKL1plt:description>pre</ASKL1plt:description>
-          <ASKL1plt:value>2</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>pre2</ASKL1plt:name>
-          <ASKL1plt:description>pre2</ASKL1plt:description>
-          <ASKL1plt:value>3</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>pre3</ASKL1plt:name>
-          <ASKL1plt:description>pre3</ASKL1plt:description>
-          <ASKL1plt:value>4</ASKL1plt:value>
-        </ASKL1plt:enum>
         <ASKL1plt:enum>
           <ASKL1plt:name>peak</ASKL1plt:name>
           <ASKL1plt:description>peak</ASKL1plt:description>
-          <ASKL1plt:value>5</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>main</ASKL1plt:name>
-          <ASKL1plt:description>main</ASKL1plt:description>
-          <ASKL1plt:value>6</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>txAmpAdjEn</ASKL1plt:name>
-          <ASKL1plt:description>txAmpAdjEn</ASKL1plt:description>
-          <ASKL1plt:value>7</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>emph0</ASKL1plt:name>
-          <ASKL1plt:description>emph0</ASKL1plt:description>
-          <ASKL1plt:value>8</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>emph1</ASKL1plt:name>
-          <ASKL1plt:description>emph1</ASKL1plt:description>
-          <ASKL1plt:value>9</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>txAmpShft</ASKL1plt:name>
-          <ASKL1plt:description>txAmpShft</ASKL1plt:description>
-          <ASKL1plt:value>10</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>txEmphEn</ASKL1plt:name>
-          <ASKL1plt:description>txEmphEn</ASKL1plt:description>
-          <ASKL1plt:value>11</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>txEmphEn1</ASKL1plt:name>
-          <ASKL1plt:description>txEmphEn1</ASKL1plt:description>
-          <ASKL1plt:value>12</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>txAmpAdj</ASKL1plt:name>
-          <ASKL1plt:description>txAmpAdj</ASKL1plt:description>
-          <ASKL1plt:value>13</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>slewCtrlEn</ASKL1plt:name>
-          <ASKL1plt:description>slewCtrlEn</ASKL1plt:description>
-          <ASKL1plt:value>14</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>slewRate</ASKL1plt:name>
-          <ASKL1plt:description>slewRate</ASKL1plt:description>
-          <ASKL1plt:value>15</ASKL1plt:value>
+          <ASKL1plt:value>2</ASKL1plt:value>
         </ASKL1plt:enum>
       </ASKL1plt:typedef>
       <ASKL1plt:typedef>
@@ -324,400 +259,180 @@
         <ASKL1plt:type>enumeration</ASKL1plt:type>
         <ASKL1plt:description>Rx parameter type</ASKL1plt:description>
         <ASKL1plt:enum>
-          <ASKL1plt:name>sqlch</ASKL1plt:name>
-          <ASKL1plt:description>sqlch</ASKL1plt:description>
+          <ASKL1plt:name>dataRate</ASKL1plt:name>
+          <ASKL1plt:description>dataRate</ASKL1plt:description>
           <ASKL1plt:value>0</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
-          <ASKL1plt:name>DC</ASKL1plt:name>
-          <ASKL1plt:description>DC</ASKL1plt:description>
+          <ASKL1plt:name>res1Sel</ASKL1plt:name>
+          <ASKL1plt:description>res1Sel</ASKL1plt:description>
           <ASKL1plt:value>1</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
-          <ASKL1plt:name>LF</ASKL1plt:name>
-          <ASKL1plt:description>LF</ASKL1plt:description>
+          <ASKL1plt:name>res2Sel</ASKL1plt:name>
+          <ASKL1plt:description>res2Sel</ASKL1plt:description>
           <ASKL1plt:value>2</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
-          <ASKL1plt:name>HF</ASKL1plt:name>
-          <ASKL1plt:description>HF</ASKL1plt:description>
+          <ASKL1plt:name>cap1Sel</ASKL1plt:name>
+          <ASKL1plt:description>cap1Sel</ASKL1plt:description>
           <ASKL1plt:value>3</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
-          <ASKL1plt:name>gainShape1</ASKL1plt:name>
-          <ASKL1plt:description>gainShape1</ASKL1plt:description>
+          <ASKL1plt:name>cap2Sel</ASKL1plt:name>
+          <ASKL1plt:description>cap2Sel</ASKL1plt:description>
           <ASKL1plt:value>4</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
-          <ASKL1plt:name>gainShape2</ASKL1plt:name>
-          <ASKL1plt:description>gainShape2</ASKL1plt:description>
+          <ASKL1plt:name>minCap</ASKL1plt:name>
+          <ASKL1plt:description>minCap</ASKL1plt:description>
           <ASKL1plt:value>5</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
-          <ASKL1plt:name>shortChannelEn</ASKL1plt:name>
-          <ASKL1plt:description>shortChannelEn</ASKL1plt:description>
+          <ASKL1plt:name>minCapN</ASKL1plt:name>
+          <ASKL1plt:description>minCapN</ASKL1plt:description>
+          <ASKL1plt:value>6</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>sumfBoostTargetC0</ASKL1plt:name>
+          <ASKL1plt:description>sumfBoostTargetC0</ASKL1plt:description>
           <ASKL1plt:value>7</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
-          <ASKL1plt:name>bfLf</ASKL1plt:name>
-          <ASKL1plt:description>bfLf</ASKL1plt:description>
+          <ASKL1plt:name>sumfBoostTargetC1</ASKL1plt:name>
+          <ASKL1plt:description>sumfBoostTargetC1</ASKL1plt:description>
           <ASKL1plt:value>8</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
-          <ASKL1plt:name>bfHf</ASKL1plt:name>
-          <ASKL1plt:description>bfHf</ASKL1plt:description>
+          <ASKL1plt:name>sumfBoostTargetC2</ASKL1plt:name>
+          <ASKL1plt:description>sumfBoostTargetC2</ASKL1plt:description>
           <ASKL1plt:value>9</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
-          <ASKL1plt:name>minLf</ASKL1plt:name>
-          <ASKL1plt:description>minLf</ASKL1plt:description>
+          <ASKL1plt:name>midpointPhaseOs0</ASKL1plt:name>
+          <ASKL1plt:description>midpointPhaseOs0</ASKL1plt:description>
           <ASKL1plt:value>10</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
-          <ASKL1plt:name>maxLf</ASKL1plt:name>
-          <ASKL1plt:description>maxLf</ASKL1plt:description>
+          <ASKL1plt:name>midpointPhaseOs1</ASKL1plt:name>
+          <ASKL1plt:description>midpointPhaseOs1</ASKL1plt:description>
           <ASKL1plt:value>11</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
-          <ASKL1plt:name>minHf</ASKL1plt:name>
-          <ASKL1plt:description>minHf</ASKL1plt:description>
+          <ASKL1plt:name>midpointPhaseOs2</ASKL1plt:name>
+          <ASKL1plt:description>midpointPhaseOs2</ASKL1plt:description>
           <ASKL1plt:value>12</ASKL1plt:value>
         </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>maxHf</ASKL1plt:name>
-          <ASKL1plt:description>maxHf</ASKL1plt:description>
-          <ASKL1plt:value>13</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>minPre1</ASKL1plt:name>
-          <ASKL1plt:description>minPre1</ASKL1plt:description>
-          <ASKL1plt:value>14</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>maxPre1</ASKL1plt:name>
-          <ASKL1plt:description>maxPre1</ASKL1plt:description>
-          <ASKL1plt:value>15</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>minPre2</ASKL1plt:name>
-          <ASKL1plt:description>minPre2</ASKL1plt:description>
-          <ASKL1plt:value>16</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>maxPre2</ASKL1plt:name>
-          <ASKL1plt:description/>
-          <ASKL1plt:value>17</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>minPost</ASKL1plt:name>
-          <ASKL1plt:description>minPost</ASKL1plt:description>
-          <ASKL1plt:value>18</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>maxPost</ASKL1plt:name>
-          <ASKL1plt:description>maxPost</ASKL1plt:description>
-          <ASKL1plt:value>19</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>squelch</ASKL1plt:name>
-          <ASKL1plt:description>squelch</ASKL1plt:description>
-          <ASKL1plt:value>20</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>termination</ASKL1plt:name>
-          <ASKL1plt:description>termination</ASKL1plt:description>
-          <ASKL1plt:value>27</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>coldEnvelope</ASKL1plt:name>
-          <ASKL1plt:description>coldEnvelope</ASKL1plt:description>
-          <ASKL1plt:value>35</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>hotEnvelope</ASKL1plt:name>
-          <ASKL1plt:description>hotEnvelope</ASKL1plt:description>
-          <ASKL1plt:value>36</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>dcGain</ASKL1plt:name>
-          <ASKL1plt:description>dcGain</ASKL1plt:description>
-          <ASKL1plt:value>37</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>bandWidth</ASKL1plt:name>
-          <ASKL1plt:description>bandWidth</ASKL1plt:description>
-          <ASKL1plt:value>38</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>dfe</ASKL1plt:name>
-          <ASKL1plt:description>dfe</ASKL1plt:description>
-          <ASKL1plt:value>39</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>ffeR</ASKL1plt:name>
-          <ASKL1plt:description>ffeR</ASKL1plt:description>
-          <ASKL1plt:value>40</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>ffeC</ASKL1plt:name>
-          <ASKL1plt:description>ffeC</ASKL1plt:description>
-          <ASKL1plt:value>41</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>sampler</ASKL1plt:name>
-          <ASKL1plt:description>sampler</ASKL1plt:description>
-          <ASKL1plt:value>42</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>align90</ASKL1plt:name>
-          <ASKL1plt:description>align90</ASKL1plt:description>
-          <ASKL1plt:value>43</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>ffeS</ASKL1plt:name>
-          <ASKL1plt:description>ffeS</ASKL1plt:description>
-          <ASKL1plt:value>44</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>resSel</ASKL1plt:name>
-          <ASKL1plt:description>resSel</ASKL1plt:description>
-          <ASKL1plt:value>45</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>resShift</ASKL1plt:name>
-          <ASKL1plt:description>resShift</ASKL1plt:description>
-          <ASKL1plt:value>46</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>capSel</ASKL1plt:name>
-          <ASKL1plt:description>capSel</ASKL1plt:description>
-          <ASKL1plt:value>47</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>ffeSettingForce</ASKL1plt:name>
-          <ASKL1plt:description>ffeSettingForce</ASKL1plt:description>
-          <ASKL1plt:value>48</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>adaptedResSel</ASKL1plt:name>
-          <ASKL1plt:description>adaptedResSel</ASKL1plt:description>
-          <ASKL1plt:value>49</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>adaptedCapSel</ASKL1plt:name>
-          <ASKL1plt:description>adaptedCapSel</ASKL1plt:description>
-          <ASKL1plt:value>50</ASKL1plt:value>
-        </ASKL1plt:enum>
         <ASKL1plt:enum>
           <ASKL1plt:name>selmufi</ASKL1plt:name>
           <ASKL1plt:description>selmufi</ASKL1plt:description>
-          <ASKL1plt:value>51</ASKL1plt:value>
+          <ASKL1plt:value>13</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
           <ASKL1plt:name>selmuff</ASKL1plt:name>
           <ASKL1plt:description>selmuff</ASKL1plt:description>
-          <ASKL1plt:value>52</ASKL1plt:value>
+          <ASKL1plt:value>14</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
           <ASKL1plt:name>selmupi</ASKL1plt:name>
           <ASKL1plt:description>selmupi</ASKL1plt:description>
-          <ASKL1plt:value>53</ASKL1plt:value>
+          <ASKL1plt:value>15</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
           <ASKL1plt:name>selmupf</ASKL1plt:name>
           <ASKL1plt:description>selmupf</ASKL1plt:description>
-          <ASKL1plt:value>54</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>slewRateCtrl0</ASKL1plt:name>
-          <ASKL1plt:description>slewRateCtrl0</ASKL1plt:description>
-          <ASKL1plt:value>55</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>slewRateCtrl1</ASKL1plt:name>
-          <ASKL1plt:description>slewRateCtrl1</ASKL1plt:description>
-          <ASKL1plt:value>56</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>EO</ASKL1plt:name>
-          <ASKL1plt:description>EO</ASKL1plt:description>
-          <ASKL1plt:value>57</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>dataRate</ASKL1plt:name>
-          <ASKL1plt:description>dataRate</ASKL1plt:description>
-          <ASKL1plt:value>58</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>res1Sel</ASKL1plt:name>
-          <ASKL1plt:description>res1Sel</ASKL1plt:description>
-          <ASKL1plt:value>59</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>res2Sel</ASKL1plt:name>
-          <ASKL1plt:description>res2Sel</ASKL1plt:description>
-          <ASKL1plt:value>60</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>cap1Sel</ASKL1plt:name>
-          <ASKL1plt:description>cap1Sel</ASKL1plt:description>
-          <ASKL1plt:value>61</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>cap2Sel</ASKL1plt:name>
-          <ASKL1plt:description>cap2Sel</ASKL1plt:description>
-          <ASKL1plt:value>62</ASKL1plt:value>
+          <ASKL1plt:value>16</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
           <ASKL1plt:name>midpointLargeThresKLane</ASKL1plt:name>
           <ASKL1plt:description>midpointLargeThresKLane</ASKL1plt:description>
-          <ASKL1plt:value>63</ASKL1plt:value>
+          <ASKL1plt:value>17</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
           <ASKL1plt:name>midpointSmallThresKLane</ASKL1plt:name>
           <ASKL1plt:description>midpointSmallThresKLane</ASKL1plt:description>
-          <ASKL1plt:value>64</ASKL1plt:value>
+          <ASKL1plt:value>18</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
           <ASKL1plt:name>midpointLargeThresCLane</ASKL1plt:name>
           <ASKL1plt:description>midpointLargeThresCLane</ASKL1plt:description>
-          <ASKL1plt:value>65</ASKL1plt:value>
+          <ASKL1plt:value>19</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
           <ASKL1plt:name>midpointSmallThresCLane</ASKL1plt:name>
           <ASKL1plt:description>midpointSmallThresCLane</ASKL1plt:description>
-          <ASKL1plt:value>66</ASKL1plt:value>
+          <ASKL1plt:value>20</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>inxSumfMidpointAdatptiveEnLane</ASKL1plt:name>
+          <ASKL1plt:description>inxSumfMidpointAdatptiveEnLane</ASKL1plt:description>
+          <ASKL1plt:value>21</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
           <ASKL1plt:name>dfeResF0aHighThresInitLane</ASKL1plt:name>
           <ASKL1plt:description>dfeResF0aHighThresInitLane</ASKL1plt:description>
-          <ASKL1plt:value>67</ASKL1plt:value>
+          <ASKL1plt:value>22</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
           <ASKL1plt:name>dfeResF0aHighThresEndLane</ASKL1plt:name>
           <ASKL1plt:description>dfeResF0aHighThresEndLane</ASKL1plt:description>
-          <ASKL1plt:value>68</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>current1Sel</ASKL1plt:name>
-          <ASKL1plt:description>current1Sel</ASKL1plt:description>
-          <ASKL1plt:value>69</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>rl1Sel</ASKL1plt:name>
-          <ASKL1plt:description>rl1Sel</ASKL1plt:description>
-          <ASKL1plt:value>70</ASKL1plt:value>
+          <ASKL1plt:value>23</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
-          <ASKL1plt:name>rl1Extra</ASKL1plt:name>
-          <ASKL1plt:description>rl1Extra</ASKL1plt:description>
-          <ASKL1plt:value>71</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>cl1Ctrl</ASKL1plt:name>
-          <ASKL1plt:description>cl1Ctrl</ASKL1plt:description>
-          <ASKL1plt:value>72</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>enMidFreq</ASKL1plt:name>
-          <ASKL1plt:description>enMidFreq</ASKL1plt:description>
-          <ASKL1plt:value>73</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>cs1Mid</ASKL1plt:name>
-          <ASKL1plt:description>cs1Mid</ASKL1plt:description>
-          <ASKL1plt:value>74</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>rs1Mid</ASKL1plt:name>
-          <ASKL1plt:description>rs1Mid</ASKL1plt:description>
-          <ASKL1plt:value>75</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>rfCtrl</ASKL1plt:name>
-          <ASKL1plt:description>rfCtrl</ASKL1plt:description>
-          <ASKL1plt:value>76</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>rl1TiaSel</ASKL1plt:name>
-          <ASKL1plt:description>rl1TiaSel</ASKL1plt:description>
-          <ASKL1plt:value>77</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>rl1TiaExtra</ASKL1plt:name>
-          <ASKL1plt:description>rl1TiaExtra</ASKL1plt:description>
-          <ASKL1plt:value>78</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>hpfRSel1st</ASKL1plt:name>
-          <ASKL1plt:description>hpfRSel1st</ASKL1plt:description>
-          <ASKL1plt:value>79</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>current1TiaSel</ASKL1plt:name>
-          <ASKL1plt:description>current1TiaSel</ASKL1plt:description>
-          <ASKL1plt:value>80</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>rl2Tune</ASKL1plt:name>
-          <ASKL1plt:description>rl2Tune</ASKL1plt:description>
-          <ASKL1plt:value>81</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>rl2Sel</ASKL1plt:name>
-          <ASKL1plt:description>rl2Sel</ASKL1plt:description>
-          <ASKL1plt:value>82</ASKL1plt:value>
+          <ASKL1plt:name>squelch</ASKL1plt:name>
+          <ASKL1plt:description>squelch</ASKL1plt:description>
+          <ASKL1plt:value>24</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
-          <ASKL1plt:name>rs2Sel</ASKL1plt:name>
-          <ASKL1plt:description>rs2Sel</ASKL1plt:description>
-          <ASKL1plt:value>83</ASKL1plt:value>
+          <ASKL1plt:name>align90</ASKL1plt:name>
+          <ASKL1plt:description>align90</ASKL1plt:description>
+          <ASKL1plt:value>25</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
-          <ASKL1plt:name>current2Sel</ASKL1plt:name>
-          <ASKL1plt:description>current2Sel</ASKL1plt:description>
-          <ASKL1plt:value>84</ASKL1plt:value>
+          <ASKL1plt:name>sampler</ASKL1plt:name>
+          <ASKL1plt:description>sampler</ASKL1plt:description>
+          <ASKL1plt:value>26</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
-          <ASKL1plt:name>hpfRsel2nd</ASKL1plt:name>
-          <ASKL1plt:description>hpfRsel2nd</ASKL1plt:description>
-          <ASKL1plt:value>85</ASKL1plt:value>
+          <ASKL1plt:name>slewRateCtrl0</ASKL1plt:name>
+          <ASKL1plt:description>slewRateCtrl0</ASKL1plt:description>
+          <ASKL1plt:value>27</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
-          <ASKL1plt:name>BW</ASKL1plt:name>
-          <ASKL1plt:description>BW</ASKL1plt:description>
-          <ASKL1plt:value>86</ASKL1plt:value>
+          <ASKL1plt:name>slewRateCtrl1</ASKL1plt:name>
+          <ASKL1plt:description>slewRateCtrl1</ASKL1plt:description>
+          <ASKL1plt:value>28</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
-          <ASKL1plt:name>dfeGAIN</ASKL1plt:name>
-          <ASKL1plt:description>dfeGAIN</ASKL1plt:description>
-          <ASKL1plt:value>87</ASKL1plt:value>
+          <ASKL1plt:name>EO</ASKL1plt:name>
+          <ASKL1plt:description>EO</ASKL1plt:description>
+          <ASKL1plt:value>29</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
-          <ASKL1plt:name>dfeGAIN2</ASKL1plt:name>
-          <ASKL1plt:description>dfeGAIN2</ASKL1plt:description>
-          <ASKL1plt:value>88</ASKL1plt:value>
+          <ASKL1plt:name>minCap1</ASKL1plt:name>
+          <ASKL1plt:description>minCap1</ASKL1plt:description>
+          <ASKL1plt:value>30</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
-          <ASKL1plt:name>pre1</ASKL1plt:name>
-          <ASKL1plt:description>pre1</ASKL1plt:description>
-          <ASKL1plt:value>89</ASKL1plt:value>
+          <ASKL1plt:name>maxCap1</ASKL1plt:name>
+          <ASKL1plt:description>maxCap1</ASKL1plt:description>
+          <ASKL1plt:value>31</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
-          <ASKL1plt:name>pre2</ASKL1plt:name>
-          <ASKL1plt:description>pre2</ASKL1plt:description>
-          <ASKL1plt:value>90</ASKL1plt:value>
+          <ASKL1plt:name>minRes1</ASKL1plt:name>
+          <ASKL1plt:description>minRes1</ASKL1plt:description>
+          <ASKL1plt:value>32</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
-          <ASKL1plt:name>post1</ASKL1plt:name>
-          <ASKL1plt:description>post1</ASKL1plt:description>
-          <ASKL1plt:value>91</ASKL1plt:value>
+          <ASKL1plt:name>maxRes1</ASKL1plt:name>
+          <ASKL1plt:description>maxRes1</ASKL1plt:description>
+          <ASKL1plt:value>33</ASKL1plt:value>
         </ASKL1plt:enum>
       </ASKL1plt:typedef>
       <ASKL1plt:typedef>
         <ASKL1plt:name>boolean-type</ASKL1plt:name>
         <ASKL1plt:type>enumeration</ASKL1plt:type>
-        <ASKL1plt:description>Boolean 32 bits , due to bing endian</ASKL1plt:description>
+        <ASKL1plt:description>Boolean 32 bits , due to big endian</ASKL1plt:description>
         <ASKL1plt:enum>
           <ASKL1plt:name>false</ASKL1plt:name>
           <ASKL1plt:description>False</ASKL1plt:description>
@@ -764,33 +479,6 @@
           <ASKL1plt:value>5</ASKL1plt:value>
         </ASKL1plt:enum>
       </ASKL1plt:typedef>
-      <ASKL1plt:typedef>
-        <ASKL1plt:name>uint8-type</ASKL1plt:name>
-        <ASKL1plt:type>uint32</ASKL1plt:type>
-        <ASKL1plt:description>Uint8 32 bits , due to bing endian</ASKL1plt:description>
-        <ASKL1plt:min>0</ASKL1plt:min>
-        <ASKL1plt:max>255</ASKL1plt:max>
-      </ASKL1plt:typedef>
-      <ASKL1plt:typedef>
-        <ASKL1plt:name>serdes-termination-type</ASKL1plt:name>
-        <ASKL1plt:type>enumeration</ASKL1plt:type>
-        <ASKL1plt:description>RX termination mode</ASKL1plt:description>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>GND</ASKL1plt:name>
-          <ASKL1plt:description>Enabled</ASKL1plt:description>
-          <ASKL1plt:value>0</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>VDD</ASKL1plt:name>
-          <ASKL1plt:description>Disabled</ASKL1plt:description>
-          <ASKL1plt:value>1</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>FLOATING</ASKL1plt:name>
-          <ASKL1plt:description>RS FEC enabled</ASKL1plt:description>
-          <ASKL1plt:value>2</ASKL1plt:value>
-        </ASKL1plt:enum>
-      </ASKL1plt:typedef>
       <ASKL1plt:typedef>
         <ASKL1plt:name>port-interconnect-profile-type</ASKL1plt:name>
         <ASKL1plt:type>enumeration</ASKL1plt:type>
@@ -870,174 +558,203 @@
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">2</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">3</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">4</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">5</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">6</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">7</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">8</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">9</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">10</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">11</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">12</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">13</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">14</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">15</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">16</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">41</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">42</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">43</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">44</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">45</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">46</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">47</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">48</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">51</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">10GR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">52</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">10GR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">53</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">25GR2</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">55</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">25GR2</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">57</ASKL1plt:portNumber>
         <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">25GR2</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
     </ASKL1plt:Port>
   </ASKL1plt:ASK-L1>
diff --git a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-PP-M0-48x1G-4x10G.md5 b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-PP-M0-48x1G-4x10G.md5
index 6405ae291..410763693 100644
--- a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-PP-M0-48x1G-4x10G.md5
+++ b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-PP-M0-48x1G-4x10G.md5
@@ -1 +1 @@
-e9257245632ec82a066bef433451b17f
\ No newline at end of file
+411f788b1a253e5ad2e0e9026d0bb1aa
\ No newline at end of file
diff --git a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-PP-M0-48x1G-4x10G.xml b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-PP-M0-48x1G-4x10G.xml
index 4c89ace68..fe782eb5c 100644
--- a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-PP-M0-48x1G-4x10G.xml
+++ b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-PP-M0-48x1G-4x10G.xml
@@ -1,5 +1,5 @@
 <?xml version="1.0" encoding="utf-8"?>
-<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2023-11-20-1.05" profile="Askpp" sid="fdf5b1c2-b80a-47a6-ac37-47e174286524">
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-05-22-1.08" profile="Askpp" sid="4cd9a9b8-0123-48b5-a955-6a5c64917f70">
   <askppplt:ASK-PP xmlns:askppplt="urn:marvell:askpp:yang">
     <askppplt:typedefs>
       <askppplt:typedef>
@@ -519,7 +519,28 @@
           <askppplt:value>1</askppplt:value>
         </askppplt:enum>
       </askppplt:typedef>
+      <askppplt:typedef>
+        <askppplt:name>asic-type</askppplt:name>
+        <askppplt:type>enumeration</askppplt:type>
+        <askppplt:description>ASIC Type</askppplt:description>
+        <askppplt:enum>
+          <askppplt:name>ASIC_AC3X</askppplt:name>
+          <askppplt:description>AC3X</askppplt:description>
+          <askppplt:value>0</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>ASIC_AC5X</askppplt:name>
+          <askppplt:description>AC5X</askppplt:description>
+          <askppplt:value>1</askppplt:value>
+        </askppplt:enum>
+        <askppplt:enum>
+          <askppplt:name>ASIC_Falcon</askppplt:name>
+          <askppplt:description>FALCON</askppplt:description>
+          <askppplt:value>2</askppplt:value>
+        </askppplt:enum>
+      </askppplt:typedef>
     </askppplt:typedefs>
+    <askppplt:ASIC_Type askppplt:type="asic-type">ASIC_AC3X</askppplt:ASIC_Type>
     <askppplt:PPInit>
       <askppplt:PP-name askppplt:type="std-string">AC3X</askppplt:PP-name>
       <askppplt:Phase1>
@@ -593,7 +614,6 @@
       <askppplt:LogicalInit>
         <askppplt:routingMode askppplt:type="routing-mode-type">TCAM_ROUTER_BASED</askppplt:routingMode>
         <askppplt:maxNumOfPbrEntries askppplt:type="uint32">0</askppplt:maxNumOfPbrEntries>
-        <askppplt:sharedTableMode askppplt:type="shared-table-mode-type">MID_L3_MID_L2_NO_EM</askppplt:sharedTableMode>
         <askppplt:ingressDropEnable askppplt:type="boolean-type">false</askppplt:ingressDropEnable>
       </askppplt:LogicalInit>
       <askppplt:LibInit>
diff --git a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/SAI-M0-48x1G-4x10G.md5 b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/SAI-M0-48x1G-4x10G.md5
index 3f32972fe..97def7a90 100644
--- a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/SAI-M0-48x1G-4x10G.md5
+++ b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/SAI-M0-48x1G-4x10G.md5
@@ -1 +1 @@
-999d0a26c697a35601fcef34127c216d
\ No newline at end of file
+e56672c96f9a00b3652bdbe8a4ec4a23
\ No newline at end of file
diff --git a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/SAI-M0-48x1G-4x10G.xml b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/SAI-M0-48x1G-4x10G.xml
index ca34f67ad..43dde6b94 100644
--- a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/SAI-M0-48x1G-4x10G.xml
+++ b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/SAI-M0-48x1G-4x10G.xml
@@ -1,5 +1,5 @@
 <?xml version="1.0" encoding="utf-8"?>
-<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2023-11-20-1.05" profile="SAI" sid="fd56a8b4-6b41-4ead-9a27-c491bc2f95b9">
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-05-22-1.08" profile="SAI" sid="daa51f10-6b7d-424f-ab07-3c51ae064e20">
   <SAIplt:SAI xmlns:SAIplt="urn:marvell:SAI:yang">
     <SAIplt:typedefs>
       <SAIplt:typedef>
@@ -36,6 +36,36 @@
           <SAIplt:value>2</SAIplt:value>
         </SAIplt:enum>
       </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>InDropCounter-type</SAIplt:name>
+        <SAIplt:type>enumeration</SAIplt:type>
+        <SAIplt:description>Router In Drop Reason Feature Options</SAIplt:description>
+        <SAIplt:enum>
+          <SAIplt:name>TTL_HOPLIMIT_EXCEEDED</SAIplt:name>
+          <SAIplt:description>Router In Drop Counters track TTL &amp; Hop Limit Exceeded Packets</SAIplt:description>
+          <SAIplt:value>0</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>ROUTE_BLACKHOLE</SAIplt:name>
+          <SAIplt:description>Router In Drop Counters track Route Black Hole Packets</SAIplt:description>
+          <SAIplt:value>1</SAIplt:value>
+        </SAIplt:enum>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>Feature-enable</SAIplt:name>
+        <SAIplt:type>enumeration</SAIplt:type>
+        <SAIplt:description>Feature Enabled/Disabled</SAIplt:description>
+        <SAIplt:enum>
+          <SAIplt:name>Disabled</SAIplt:name>
+          <SAIplt:description>Disabled</SAIplt:description>
+          <SAIplt:value>0</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>Enabled</SAIplt:name>
+          <SAIplt:description>Enabled</SAIplt:description>
+          <SAIplt:value>1</SAIplt:value>
+        </SAIplt:enum>
+      </SAIplt:typedef>
       <SAIplt:typedef>
         <SAIplt:name>log-dest-file-path-type</SAIplt:name>
         <SAIplt:type>string</SAIplt:type>
@@ -62,6 +92,11 @@
           <SAIplt:description>ACLs for control packet handling</SAIplt:description>
           <SAIplt:value>2</SAIplt:value>
         </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>debug-counter-acl</SAIplt:name>
+          <SAIplt:description>ACLs for Debug Counters</SAIplt:description>
+          <SAIplt:value>3</SAIplt:value>
+        </SAIplt:enum>
       </SAIplt:typedef>
       <SAIplt:typedef>
         <SAIplt:name>ingress-acl-stage-type</SAIplt:name>
@@ -126,13 +161,15 @@
           <SAIplt:description>AC5X</SAIplt:description>
           <SAIplt:value>1</SAIplt:value>
         </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>ASIC_Falcon</SAIplt:name>
+          <SAIplt:description>FALCON</SAIplt:description>
+          <SAIplt:value>2</SAIplt:value>
+        </SAIplt:enum>
       </SAIplt:typedef>
     </SAIplt:typedefs>
     <SAIplt:ASIC_Type SAIplt:type="asic-type">ASIC_AC3X</SAIplt:ASIC_Type>
     <SAIplt:ASK-BOARD-Profile-Name SAIplt:type="string">ASK-Board-M0-48x1G-4x10G.xml</SAIplt:ASK-BOARD-Profile-Name>
-    <SAIplt:Features>
-      <SAIplt:RoCE SAIplt:type="boolean">false</SAIplt:RoCE>
-    </SAIplt:Features>
     <SAIplt:Ports>
       <SAIplt:port-list>
         <SAIplt:sai_port_id SAIplt:type="port-id-type">1</SAIplt:sai_port_id>
@@ -405,9 +442,7 @@
       <SAIplt:max_tti SAIplt:type="uint32">1024</SAIplt:max_tti>
     </SAIplt:scalingAC3>
     <SAIplt:Counters>
-      <SAIplt:cnc-base-list>
-        <SAIplt:counter-base SAIplt:type="uint32">4096</SAIplt:counter-base>
-      </SAIplt:cnc-base-list>
+      <SAIplt:counter-base SAIplt:type="uint32">4096</SAIplt:counter-base>
     </SAIplt:Counters>
     <SAIplt:Logging>
       <SAIplt:log_dest SAIplt:type="logDest-type">SAI_LOG_SYSLOG</SAIplt:log_dest>

From 9bb20da72f629ba8718f58b8bd4d96dd0815346f Mon Sep 17 00:00:00 2001
From: Keshav Gupta <keshavg@marvell.com>
Date: Thu, 29 Aug 2024 20:07:54 +0530
Subject: [PATCH 0940/1115] [Marvell] Updating hwsku configs to EZB1.08 version
 (#19403)

Updating hwsku config file to EZB1.08 for AC5X RD board
---
 .../ASK-Board-ac5x-rd-32x1G-16x2_5G-6x25G.md5 |   2 +-
 .../ASK-Board-ac5x-rd-32x1G-16x2_5G-6x25G.xml | 103 ++-
 .../ASK-L1-AC5X-RD-32x1G-16x2_5G-6x25G.md5    |   2 +-
 .../ASK-L1-AC5X-RD-32x1G-16x2_5G-6x25G.xml    | 632 ++++++------------
 .../rd98DX35xx/ASK-PP-AC5X-RD.md5             |   2 +-
 .../rd98DX35xx/ASK-PP-AC5X-RD.xml             |   2 +-
 .../SAI-AC5X-RD-32x1G-16x2_5G-6x25G.md5       |   2 +-
 .../SAI-AC5X-RD-32x1G-16x2_5G-6x25G.xml       |  27 +-
 .../ASK-Board-ac5x-rd-32x1G-16x2_5G-6x25G.md5 |   2 +-
 .../ASK-Board-ac5x-rd-32x1G-16x2_5G-6x25G.xml | 103 ++-
 .../ASK-L1-AC5X-RD-32x1G-16x2_5G-6x25G.md5    |   2 +-
 .../ASK-L1-AC5X-RD-32x1G-16x2_5G-6x25G.xml    | 632 ++++++------------
 .../rd98DX35xx_cn9131/ASK-PP-AC5X-RD.md5      |   2 +-
 .../rd98DX35xx_cn9131/ASK-PP-AC5X-RD.xml      |   2 +-
 .../SAI-AC5X-RD-32x1G-16x2_5G-6x25G.md5       |   2 +-
 .../SAI-AC5X-RD-32x1G-16x2_5G-6x25G.xml       |  27 +-
 16 files changed, 518 insertions(+), 1026 deletions(-)

diff --git a/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/ASK-Board-ac5x-rd-32x1G-16x2_5G-6x25G.md5 b/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/ASK-Board-ac5x-rd-32x1G-16x2_5G-6x25G.md5
index 0e8ad2bf7..a8dd0dadc 100644
--- a/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/ASK-Board-ac5x-rd-32x1G-16x2_5G-6x25G.md5
+++ b/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/ASK-Board-ac5x-rd-32x1G-16x2_5G-6x25G.md5
@@ -1 +1 @@
-266aa59b7e63faf97657313fe65cdf86
\ No newline at end of file
+8b28fac0d174b9f0e9120f8ee8c52fd2
\ No newline at end of file
diff --git a/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/ASK-Board-ac5x-rd-32x1G-16x2_5G-6x25G.xml b/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/ASK-Board-ac5x-rd-32x1G-16x2_5G-6x25G.xml
index fc26d290e..ecda116a6 100644
--- a/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/ASK-Board-ac5x-rd-32x1G-16x2_5G-6x25G.xml
+++ b/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/ASK-Board-ac5x-rd-32x1G-16x2_5G-6x25G.xml
@@ -1,5 +1,5 @@
 <?xml version="1.0" encoding="utf-8"?>
-<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-02-19-1.06" profile="Askboard" sid="eb53f80b-5892-4f8b-9197-a6f626effaba">
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-05-22-1.08" profile="Askboard" sid="9396a3c9-f447-4460-bd9f-7d0c21ca4d16">
   <askboardplt:ASK-Board xmlns:askboardplt="urn:marvell:askboard:yang">
     <askboardplt:typedefs>
       <askboardplt:typedef>
@@ -727,7 +727,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">1</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -746,7 +745,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">0</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -765,7 +763,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">3</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -784,7 +781,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">2</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -803,7 +799,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">5</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -822,7 +817,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">4</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -841,7 +835,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">7</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -860,7 +853,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">6</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -879,7 +871,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">9</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -898,7 +889,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">8</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -917,7 +907,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">11</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -936,7 +925,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">10</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -955,7 +943,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">13</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -974,7 +961,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">12</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -993,7 +979,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">15</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1012,7 +997,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">14</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1031,7 +1015,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">17</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1050,7 +1033,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">16</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1069,7 +1051,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">19</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1088,7 +1069,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">18</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1107,7 +1087,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">21</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1126,7 +1105,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">20</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1145,7 +1123,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">23</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1164,7 +1141,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">22</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1183,7 +1159,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">25</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1202,7 +1177,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">24</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1221,7 +1195,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">27</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1240,7 +1213,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">26</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1259,7 +1231,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">29</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1278,7 +1249,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">28</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1297,7 +1267,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">31</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1316,7 +1285,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">30</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1335,7 +1303,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">1</askboardplt:phyAddr>
           <askboardplt:xSmiItf askboardplt:type="phy-xsmi-interface-type">0</askboardplt:xSmiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1354,7 +1321,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">14</askboardplt:phyAddr>
           <askboardplt:xSmiItf askboardplt:type="phy-xsmi-interface-type">0</askboardplt:xSmiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1373,7 +1339,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">15</askboardplt:phyAddr>
           <askboardplt:xSmiItf askboardplt:type="phy-xsmi-interface-type">0</askboardplt:xSmiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1392,7 +1357,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">12</askboardplt:phyAddr>
           <askboardplt:xSmiItf askboardplt:type="phy-xsmi-interface-type">0</askboardplt:xSmiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1411,7 +1375,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">13</askboardplt:phyAddr>
           <askboardplt:xSmiItf askboardplt:type="phy-xsmi-interface-type">0</askboardplt:xSmiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1430,7 +1393,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">10</askboardplt:phyAddr>
           <askboardplt:xSmiItf askboardplt:type="phy-xsmi-interface-type">0</askboardplt:xSmiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1449,7 +1411,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">11</askboardplt:phyAddr>
           <askboardplt:xSmiItf askboardplt:type="phy-xsmi-interface-type">0</askboardplt:xSmiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1468,7 +1429,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">8</askboardplt:phyAddr>
           <askboardplt:xSmiItf askboardplt:type="phy-xsmi-interface-type">0</askboardplt:xSmiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1487,7 +1447,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">9</askboardplt:phyAddr>
           <askboardplt:xSmiItf askboardplt:type="phy-xsmi-interface-type">0</askboardplt:xSmiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1506,7 +1465,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">6</askboardplt:phyAddr>
           <askboardplt:xSmiItf askboardplt:type="phy-xsmi-interface-type">0</askboardplt:xSmiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1525,7 +1483,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">7</askboardplt:phyAddr>
           <askboardplt:xSmiItf askboardplt:type="phy-xsmi-interface-type">0</askboardplt:xSmiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1544,7 +1501,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">4</askboardplt:phyAddr>
           <askboardplt:xSmiItf askboardplt:type="phy-xsmi-interface-type">0</askboardplt:xSmiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1563,7 +1519,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">5</askboardplt:phyAddr>
           <askboardplt:xSmiItf askboardplt:type="phy-xsmi-interface-type">0</askboardplt:xSmiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1582,7 +1537,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">2</askboardplt:phyAddr>
           <askboardplt:xSmiItf askboardplt:type="phy-xsmi-interface-type">0</askboardplt:xSmiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1601,7 +1555,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">3</askboardplt:phyAddr>
           <askboardplt:xSmiItf askboardplt:type="phy-xsmi-interface-type">0</askboardplt:xSmiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1620,7 +1573,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">0</askboardplt:phyAddr>
           <askboardplt:xSmiItf askboardplt:type="phy-xsmi-interface-type">0</askboardplt:xSmiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1636,7 +1588,6 @@ lowercase characters.</askboardplt:description>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">0</askboardplt:ledPosition>
           <askboardplt:polarityInvertList-list>
@@ -1656,7 +1607,6 @@ lowercase characters.</askboardplt:description>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">1</askboardplt:ledPosition>
           <askboardplt:polarityInvertList-list>
@@ -1676,7 +1626,6 @@ lowercase characters.</askboardplt:description>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">0</askboardplt:ledPosition>
           <askboardplt:polarityInvertList-list>
@@ -1696,7 +1645,6 @@ lowercase characters.</askboardplt:description>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">1</askboardplt:ledPosition>
           <askboardplt:polarityInvertList-list>
@@ -1716,7 +1664,6 @@ lowercase characters.</askboardplt:description>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">2</askboardplt:ledPosition>
           <askboardplt:polarityInvertList-list>
@@ -1736,7 +1683,6 @@ lowercase characters.</askboardplt:description>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">3</askboardplt:ledPosition>
           <askboardplt:polarityInvertList-list>
@@ -1810,6 +1756,53 @@ lowercase characters.</askboardplt:description>
         </askboardplt:ledstream-class-manipulation-list>
       </askboardplt:Ledstream-interface-list>
     </askboardplt:device-list>
+    <askboardplt:phyLedControl>
+      <askboardplt:phy-type-list>
+        <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
+        <askboardplt:phy-led-regs-list>
+          <askboardplt:reg-addr askboardplt:type="uint16">16</askboardplt:reg-addr>
+          <askboardplt:page-num askboardplt:type="uint16">3</askboardplt:page-num>
+          <askboardplt:reg-value askboardplt:type="uint16">23</askboardplt:reg-value>
+          <askboardplt:reg-value-mask askboardplt:type="uint16">65280</askboardplt:reg-value-mask>
+        </askboardplt:phy-led-regs-list>
+        <askboardplt:phy-led-regs-list>
+          <askboardplt:reg-addr askboardplt:type="uint16">1</askboardplt:reg-addr>
+          <askboardplt:page-num askboardplt:type="uint16">28</askboardplt:page-num>
+          <askboardplt:reg-value askboardplt:type="uint16">1024</askboardplt:reg-value>
+          <askboardplt:reg-value-mask askboardplt:type="uint16">64511</askboardplt:reg-value-mask>
+        </askboardplt:phy-led-regs-list>
+      </askboardplt:phy-type-list>
+      <askboardplt:phy-type-list>
+        <askboardplt:phyType askboardplt:type="phy-type">alaska-88E2580</askboardplt:phyType>
+        <askboardplt:phy-led-regs-list>
+          <askboardplt:reg-addr askboardplt:type="uint16">61472</askboardplt:reg-addr>
+          <askboardplt:page-num askboardplt:type="uint16">31</askboardplt:page-num>
+          <askboardplt:reg-value askboardplt:type="uint16">168</askboardplt:reg-value>
+          <askboardplt:reg-value-mask askboardplt:type="uint16">57351</askboardplt:reg-value-mask>
+        </askboardplt:phy-led-regs-list>
+        <askboardplt:phy-led-regs-list>
+          <askboardplt:reg-addr askboardplt:type="uint16">61473</askboardplt:reg-addr>
+          <askboardplt:page-num askboardplt:type="uint16">31</askboardplt:page-num>
+          <askboardplt:reg-value askboardplt:type="uint16">296</askboardplt:reg-value>
+          <askboardplt:reg-value-mask askboardplt:type="uint16">57351</askboardplt:reg-value-mask>
+        </askboardplt:phy-led-regs-list>
+      </askboardplt:phy-type-list>
+      <askboardplt:phy-type-list>
+        <askboardplt:phyType askboardplt:type="phy-type">alaska-88E2540</askboardplt:phyType>
+        <askboardplt:phy-led-regs-list>
+          <askboardplt:reg-addr askboardplt:type="uint16">61472</askboardplt:reg-addr>
+          <askboardplt:page-num askboardplt:type="uint16">31</askboardplt:page-num>
+          <askboardplt:reg-value askboardplt:type="uint16">168</askboardplt:reg-value>
+          <askboardplt:reg-value-mask askboardplt:type="uint16">57351</askboardplt:reg-value-mask>
+        </askboardplt:phy-led-regs-list>
+        <askboardplt:phy-led-regs-list>
+          <askboardplt:reg-addr askboardplt:type="uint16">61473</askboardplt:reg-addr>
+          <askboardplt:page-num askboardplt:type="uint16">31</askboardplt:page-num>
+          <askboardplt:reg-value askboardplt:type="uint16">296</askboardplt:reg-value>
+          <askboardplt:reg-value-mask askboardplt:type="uint16">57351</askboardplt:reg-value-mask>
+        </askboardplt:phy-led-regs-list>
+      </askboardplt:phy-type-list>
+    </askboardplt:phyLedControl>
     <askboardplt:UDSFilePath askboardplt:type="std-string">.</askboardplt:UDSFilePath>
     <askboardplt:serdesMux>
       <askboardplt:serdesMuxSchemePortMod askboardplt:type="uint32">1</askboardplt:serdesMuxSchemePortMod>
diff --git a/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/ASK-L1-AC5X-RD-32x1G-16x2_5G-6x25G.md5 b/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/ASK-L1-AC5X-RD-32x1G-16x2_5G-6x25G.md5
index f2cf3d5b6..e4baf309b 100644
--- a/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/ASK-L1-AC5X-RD-32x1G-16x2_5G-6x25G.md5
+++ b/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/ASK-L1-AC5X-RD-32x1G-16x2_5G-6x25G.md5
@@ -1 +1 @@
-85b49bcb9d399bcd1b8128a42caba2d2
\ No newline at end of file
+fcd5642435f602883aab5c9672e96aa5
\ No newline at end of file
diff --git a/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/ASK-L1-AC5X-RD-32x1G-16x2_5G-6x25G.xml b/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/ASK-L1-AC5X-RD-32x1G-16x2_5G-6x25G.xml
index 980d4267b..78460a4e0 100644
--- a/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/ASK-L1-AC5X-RD-32x1G-16x2_5G-6x25G.xml
+++ b/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/ASK-L1-AC5X-RD-32x1G-16x2_5G-6x25G.xml
@@ -1,5 +1,5 @@
 <?xml version="1.0" encoding="utf-8"?>
-<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-02-19-1.06" profile="Askl1" sid="71d3ab0f-3ac2-452a-a5c9-2dfdc969734a">
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-05-22-1.08" profile="Askl1" sid="d7694ab8-0eab-47cd-82ce-10074030f449">
   <ASKL1plt:ASK-L1 xmlns:ASKL1plt="urn:marvell:ASKL1:yang">
     <ASKL1plt:typedefs>
       <ASKL1plt:typedef>
@@ -239,8 +239,8 @@
         <ASKL1plt:type>enumeration</ASKL1plt:type>
         <ASKL1plt:description>Tx parameter type</ASKL1plt:description>
         <ASKL1plt:enum>
-          <ASKL1plt:name>atten</ASKL1plt:name>
-          <ASKL1plt:description>atten</ASKL1plt:description>
+          <ASKL1plt:name>pre</ASKL1plt:name>
+          <ASKL1plt:description>pre</ASKL1plt:description>
           <ASKL1plt:value>0</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
@@ -248,75 +248,10 @@
           <ASKL1plt:description>post</ASKL1plt:description>
           <ASKL1plt:value>1</ASKL1plt:value>
         </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>pre</ASKL1plt:name>
-          <ASKL1plt:description>pre</ASKL1plt:description>
-          <ASKL1plt:value>2</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>pre2</ASKL1plt:name>
-          <ASKL1plt:description>pre2</ASKL1plt:description>
-          <ASKL1plt:value>3</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>pre3</ASKL1plt:name>
-          <ASKL1plt:description>pre3</ASKL1plt:description>
-          <ASKL1plt:value>4</ASKL1plt:value>
-        </ASKL1plt:enum>
         <ASKL1plt:enum>
           <ASKL1plt:name>peak</ASKL1plt:name>
           <ASKL1plt:description>peak</ASKL1plt:description>
-          <ASKL1plt:value>5</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>main</ASKL1plt:name>
-          <ASKL1plt:description>main</ASKL1plt:description>
-          <ASKL1plt:value>6</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>txAmpAdjEn</ASKL1plt:name>
-          <ASKL1plt:description>txAmpAdjEn</ASKL1plt:description>
-          <ASKL1plt:value>7</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>emph0</ASKL1plt:name>
-          <ASKL1plt:description>emph0</ASKL1plt:description>
-          <ASKL1plt:value>8</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>emph1</ASKL1plt:name>
-          <ASKL1plt:description>emph1</ASKL1plt:description>
-          <ASKL1plt:value>9</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>txAmpShft</ASKL1plt:name>
-          <ASKL1plt:description>txAmpShft</ASKL1plt:description>
-          <ASKL1plt:value>10</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>txEmphEn</ASKL1plt:name>
-          <ASKL1plt:description>txEmphEn</ASKL1plt:description>
-          <ASKL1plt:value>11</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>txEmphEn1</ASKL1plt:name>
-          <ASKL1plt:description>txEmphEn1</ASKL1plt:description>
-          <ASKL1plt:value>12</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>txAmpAdj</ASKL1plt:name>
-          <ASKL1plt:description>txAmpAdj</ASKL1plt:description>
-          <ASKL1plt:value>13</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>slewCtrlEn</ASKL1plt:name>
-          <ASKL1plt:description>slewCtrlEn</ASKL1plt:description>
-          <ASKL1plt:value>14</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>slewRate</ASKL1plt:name>
-          <ASKL1plt:description>slewRate</ASKL1plt:description>
-          <ASKL1plt:value>15</ASKL1plt:value>
+          <ASKL1plt:value>2</ASKL1plt:value>
         </ASKL1plt:enum>
       </ASKL1plt:typedef>
       <ASKL1plt:typedef>
@@ -324,400 +259,180 @@
         <ASKL1plt:type>enumeration</ASKL1plt:type>
         <ASKL1plt:description>Rx parameter type</ASKL1plt:description>
         <ASKL1plt:enum>
-          <ASKL1plt:name>sqlch</ASKL1plt:name>
-          <ASKL1plt:description>sqlch</ASKL1plt:description>
+          <ASKL1plt:name>dataRate</ASKL1plt:name>
+          <ASKL1plt:description>dataRate</ASKL1plt:description>
           <ASKL1plt:value>0</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
-          <ASKL1plt:name>DC</ASKL1plt:name>
-          <ASKL1plt:description>DC</ASKL1plt:description>
+          <ASKL1plt:name>res1Sel</ASKL1plt:name>
+          <ASKL1plt:description>res1Sel</ASKL1plt:description>
           <ASKL1plt:value>1</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
-          <ASKL1plt:name>LF</ASKL1plt:name>
-          <ASKL1plt:description>LF</ASKL1plt:description>
+          <ASKL1plt:name>res2Sel</ASKL1plt:name>
+          <ASKL1plt:description>res2Sel</ASKL1plt:description>
           <ASKL1plt:value>2</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
-          <ASKL1plt:name>HF</ASKL1plt:name>
-          <ASKL1plt:description>HF</ASKL1plt:description>
+          <ASKL1plt:name>cap1Sel</ASKL1plt:name>
+          <ASKL1plt:description>cap1Sel</ASKL1plt:description>
           <ASKL1plt:value>3</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
-          <ASKL1plt:name>gainShape1</ASKL1plt:name>
-          <ASKL1plt:description>gainShape1</ASKL1plt:description>
+          <ASKL1plt:name>cap2Sel</ASKL1plt:name>
+          <ASKL1plt:description>cap2Sel</ASKL1plt:description>
           <ASKL1plt:value>4</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
-          <ASKL1plt:name>gainShape2</ASKL1plt:name>
-          <ASKL1plt:description>gainShape2</ASKL1plt:description>
+          <ASKL1plt:name>minCap</ASKL1plt:name>
+          <ASKL1plt:description>minCap</ASKL1plt:description>
           <ASKL1plt:value>5</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
-          <ASKL1plt:name>shortChannelEn</ASKL1plt:name>
-          <ASKL1plt:description>shortChannelEn</ASKL1plt:description>
+          <ASKL1plt:name>minCapN</ASKL1plt:name>
+          <ASKL1plt:description>minCapN</ASKL1plt:description>
+          <ASKL1plt:value>6</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>sumfBoostTargetC0</ASKL1plt:name>
+          <ASKL1plt:description>sumfBoostTargetC0</ASKL1plt:description>
           <ASKL1plt:value>7</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
-          <ASKL1plt:name>bfLf</ASKL1plt:name>
-          <ASKL1plt:description>bfLf</ASKL1plt:description>
+          <ASKL1plt:name>sumfBoostTargetC1</ASKL1plt:name>
+          <ASKL1plt:description>sumfBoostTargetC1</ASKL1plt:description>
           <ASKL1plt:value>8</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
-          <ASKL1plt:name>bfHf</ASKL1plt:name>
-          <ASKL1plt:description>bfHf</ASKL1plt:description>
+          <ASKL1plt:name>sumfBoostTargetC2</ASKL1plt:name>
+          <ASKL1plt:description>sumfBoostTargetC2</ASKL1plt:description>
           <ASKL1plt:value>9</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
-          <ASKL1plt:name>minLf</ASKL1plt:name>
-          <ASKL1plt:description>minLf</ASKL1plt:description>
+          <ASKL1plt:name>midpointPhaseOs0</ASKL1plt:name>
+          <ASKL1plt:description>midpointPhaseOs0</ASKL1plt:description>
           <ASKL1plt:value>10</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
-          <ASKL1plt:name>maxLf</ASKL1plt:name>
-          <ASKL1plt:description>maxLf</ASKL1plt:description>
+          <ASKL1plt:name>midpointPhaseOs1</ASKL1plt:name>
+          <ASKL1plt:description>midpointPhaseOs1</ASKL1plt:description>
           <ASKL1plt:value>11</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
-          <ASKL1plt:name>minHf</ASKL1plt:name>
-          <ASKL1plt:description>minHf</ASKL1plt:description>
+          <ASKL1plt:name>midpointPhaseOs2</ASKL1plt:name>
+          <ASKL1plt:description>midpointPhaseOs2</ASKL1plt:description>
           <ASKL1plt:value>12</ASKL1plt:value>
         </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>maxHf</ASKL1plt:name>
-          <ASKL1plt:description>maxHf</ASKL1plt:description>
-          <ASKL1plt:value>13</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>minPre1</ASKL1plt:name>
-          <ASKL1plt:description>minPre1</ASKL1plt:description>
-          <ASKL1plt:value>14</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>maxPre1</ASKL1plt:name>
-          <ASKL1plt:description>maxPre1</ASKL1plt:description>
-          <ASKL1plt:value>15</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>minPre2</ASKL1plt:name>
-          <ASKL1plt:description>minPre2</ASKL1plt:description>
-          <ASKL1plt:value>16</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>maxPre2</ASKL1plt:name>
-          <ASKL1plt:description/>
-          <ASKL1plt:value>17</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>minPost</ASKL1plt:name>
-          <ASKL1plt:description>minPost</ASKL1plt:description>
-          <ASKL1plt:value>18</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>maxPost</ASKL1plt:name>
-          <ASKL1plt:description>maxPost</ASKL1plt:description>
-          <ASKL1plt:value>19</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>squelch</ASKL1plt:name>
-          <ASKL1plt:description>squelch</ASKL1plt:description>
-          <ASKL1plt:value>20</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>termination</ASKL1plt:name>
-          <ASKL1plt:description>termination</ASKL1plt:description>
-          <ASKL1plt:value>27</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>coldEnvelope</ASKL1plt:name>
-          <ASKL1plt:description>coldEnvelope</ASKL1plt:description>
-          <ASKL1plt:value>35</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>hotEnvelope</ASKL1plt:name>
-          <ASKL1plt:description>hotEnvelope</ASKL1plt:description>
-          <ASKL1plt:value>36</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>dcGain</ASKL1plt:name>
-          <ASKL1plt:description>dcGain</ASKL1plt:description>
-          <ASKL1plt:value>37</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>bandWidth</ASKL1plt:name>
-          <ASKL1plt:description>bandWidth</ASKL1plt:description>
-          <ASKL1plt:value>38</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>dfe</ASKL1plt:name>
-          <ASKL1plt:description>dfe</ASKL1plt:description>
-          <ASKL1plt:value>39</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>ffeR</ASKL1plt:name>
-          <ASKL1plt:description>ffeR</ASKL1plt:description>
-          <ASKL1plt:value>40</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>ffeC</ASKL1plt:name>
-          <ASKL1plt:description>ffeC</ASKL1plt:description>
-          <ASKL1plt:value>41</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>sampler</ASKL1plt:name>
-          <ASKL1plt:description>sampler</ASKL1plt:description>
-          <ASKL1plt:value>42</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>align90</ASKL1plt:name>
-          <ASKL1plt:description>align90</ASKL1plt:description>
-          <ASKL1plt:value>43</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>ffeS</ASKL1plt:name>
-          <ASKL1plt:description>ffeS</ASKL1plt:description>
-          <ASKL1plt:value>44</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>resSel</ASKL1plt:name>
-          <ASKL1plt:description>resSel</ASKL1plt:description>
-          <ASKL1plt:value>45</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>resShift</ASKL1plt:name>
-          <ASKL1plt:description>resShift</ASKL1plt:description>
-          <ASKL1plt:value>46</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>capSel</ASKL1plt:name>
-          <ASKL1plt:description>capSel</ASKL1plt:description>
-          <ASKL1plt:value>47</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>ffeSettingForce</ASKL1plt:name>
-          <ASKL1plt:description>ffeSettingForce</ASKL1plt:description>
-          <ASKL1plt:value>48</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>adaptedResSel</ASKL1plt:name>
-          <ASKL1plt:description>adaptedResSel</ASKL1plt:description>
-          <ASKL1plt:value>49</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>adaptedCapSel</ASKL1plt:name>
-          <ASKL1plt:description>adaptedCapSel</ASKL1plt:description>
-          <ASKL1plt:value>50</ASKL1plt:value>
-        </ASKL1plt:enum>
         <ASKL1plt:enum>
           <ASKL1plt:name>selmufi</ASKL1plt:name>
           <ASKL1plt:description>selmufi</ASKL1plt:description>
-          <ASKL1plt:value>51</ASKL1plt:value>
+          <ASKL1plt:value>13</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
           <ASKL1plt:name>selmuff</ASKL1plt:name>
           <ASKL1plt:description>selmuff</ASKL1plt:description>
-          <ASKL1plt:value>52</ASKL1plt:value>
+          <ASKL1plt:value>14</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
           <ASKL1plt:name>selmupi</ASKL1plt:name>
           <ASKL1plt:description>selmupi</ASKL1plt:description>
-          <ASKL1plt:value>53</ASKL1plt:value>
+          <ASKL1plt:value>15</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
           <ASKL1plt:name>selmupf</ASKL1plt:name>
           <ASKL1plt:description>selmupf</ASKL1plt:description>
-          <ASKL1plt:value>54</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>slewRateCtrl0</ASKL1plt:name>
-          <ASKL1plt:description>slewRateCtrl0</ASKL1plt:description>
-          <ASKL1plt:value>55</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>slewRateCtrl1</ASKL1plt:name>
-          <ASKL1plt:description>slewRateCtrl1</ASKL1plt:description>
-          <ASKL1plt:value>56</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>EO</ASKL1plt:name>
-          <ASKL1plt:description>EO</ASKL1plt:description>
-          <ASKL1plt:value>57</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>dataRate</ASKL1plt:name>
-          <ASKL1plt:description>dataRate</ASKL1plt:description>
-          <ASKL1plt:value>58</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>res1Sel</ASKL1plt:name>
-          <ASKL1plt:description>res1Sel</ASKL1plt:description>
-          <ASKL1plt:value>59</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>res2Sel</ASKL1plt:name>
-          <ASKL1plt:description>res2Sel</ASKL1plt:description>
-          <ASKL1plt:value>60</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>cap1Sel</ASKL1plt:name>
-          <ASKL1plt:description>cap1Sel</ASKL1plt:description>
-          <ASKL1plt:value>61</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>cap2Sel</ASKL1plt:name>
-          <ASKL1plt:description>cap2Sel</ASKL1plt:description>
-          <ASKL1plt:value>62</ASKL1plt:value>
+          <ASKL1plt:value>16</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
           <ASKL1plt:name>midpointLargeThresKLane</ASKL1plt:name>
           <ASKL1plt:description>midpointLargeThresKLane</ASKL1plt:description>
-          <ASKL1plt:value>63</ASKL1plt:value>
+          <ASKL1plt:value>17</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
           <ASKL1plt:name>midpointSmallThresKLane</ASKL1plt:name>
           <ASKL1plt:description>midpointSmallThresKLane</ASKL1plt:description>
-          <ASKL1plt:value>64</ASKL1plt:value>
+          <ASKL1plt:value>18</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
           <ASKL1plt:name>midpointLargeThresCLane</ASKL1plt:name>
           <ASKL1plt:description>midpointLargeThresCLane</ASKL1plt:description>
-          <ASKL1plt:value>65</ASKL1plt:value>
+          <ASKL1plt:value>19</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
           <ASKL1plt:name>midpointSmallThresCLane</ASKL1plt:name>
           <ASKL1plt:description>midpointSmallThresCLane</ASKL1plt:description>
-          <ASKL1plt:value>66</ASKL1plt:value>
+          <ASKL1plt:value>20</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>inxSumfMidpointAdatptiveEnLane</ASKL1plt:name>
+          <ASKL1plt:description>inxSumfMidpointAdatptiveEnLane</ASKL1plt:description>
+          <ASKL1plt:value>21</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
           <ASKL1plt:name>dfeResF0aHighThresInitLane</ASKL1plt:name>
           <ASKL1plt:description>dfeResF0aHighThresInitLane</ASKL1plt:description>
-          <ASKL1plt:value>67</ASKL1plt:value>
+          <ASKL1plt:value>22</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
           <ASKL1plt:name>dfeResF0aHighThresEndLane</ASKL1plt:name>
           <ASKL1plt:description>dfeResF0aHighThresEndLane</ASKL1plt:description>
-          <ASKL1plt:value>68</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>current1Sel</ASKL1plt:name>
-          <ASKL1plt:description>current1Sel</ASKL1plt:description>
-          <ASKL1plt:value>69</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>rl1Sel</ASKL1plt:name>
-          <ASKL1plt:description>rl1Sel</ASKL1plt:description>
-          <ASKL1plt:value>70</ASKL1plt:value>
+          <ASKL1plt:value>23</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
-          <ASKL1plt:name>rl1Extra</ASKL1plt:name>
-          <ASKL1plt:description>rl1Extra</ASKL1plt:description>
-          <ASKL1plt:value>71</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>cl1Ctrl</ASKL1plt:name>
-          <ASKL1plt:description>cl1Ctrl</ASKL1plt:description>
-          <ASKL1plt:value>72</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>enMidFreq</ASKL1plt:name>
-          <ASKL1plt:description>enMidFreq</ASKL1plt:description>
-          <ASKL1plt:value>73</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>cs1Mid</ASKL1plt:name>
-          <ASKL1plt:description>cs1Mid</ASKL1plt:description>
-          <ASKL1plt:value>74</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>rs1Mid</ASKL1plt:name>
-          <ASKL1plt:description>rs1Mid</ASKL1plt:description>
-          <ASKL1plt:value>75</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>rfCtrl</ASKL1plt:name>
-          <ASKL1plt:description>rfCtrl</ASKL1plt:description>
-          <ASKL1plt:value>76</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>rl1TiaSel</ASKL1plt:name>
-          <ASKL1plt:description>rl1TiaSel</ASKL1plt:description>
-          <ASKL1plt:value>77</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>rl1TiaExtra</ASKL1plt:name>
-          <ASKL1plt:description>rl1TiaExtra</ASKL1plt:description>
-          <ASKL1plt:value>78</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>hpfRSel1st</ASKL1plt:name>
-          <ASKL1plt:description>hpfRSel1st</ASKL1plt:description>
-          <ASKL1plt:value>79</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>current1TiaSel</ASKL1plt:name>
-          <ASKL1plt:description>current1TiaSel</ASKL1plt:description>
-          <ASKL1plt:value>80</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>rl2Tune</ASKL1plt:name>
-          <ASKL1plt:description>rl2Tune</ASKL1plt:description>
-          <ASKL1plt:value>81</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>rl2Sel</ASKL1plt:name>
-          <ASKL1plt:description>rl2Sel</ASKL1plt:description>
-          <ASKL1plt:value>82</ASKL1plt:value>
+          <ASKL1plt:name>squelch</ASKL1plt:name>
+          <ASKL1plt:description>squelch</ASKL1plt:description>
+          <ASKL1plt:value>24</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
-          <ASKL1plt:name>rs2Sel</ASKL1plt:name>
-          <ASKL1plt:description>rs2Sel</ASKL1plt:description>
-          <ASKL1plt:value>83</ASKL1plt:value>
+          <ASKL1plt:name>align90</ASKL1plt:name>
+          <ASKL1plt:description>align90</ASKL1plt:description>
+          <ASKL1plt:value>25</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
-          <ASKL1plt:name>current2Sel</ASKL1plt:name>
-          <ASKL1plt:description>current2Sel</ASKL1plt:description>
-          <ASKL1plt:value>84</ASKL1plt:value>
+          <ASKL1plt:name>sampler</ASKL1plt:name>
+          <ASKL1plt:description>sampler</ASKL1plt:description>
+          <ASKL1plt:value>26</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
-          <ASKL1plt:name>hpfRsel2nd</ASKL1plt:name>
-          <ASKL1plt:description>hpfRsel2nd</ASKL1plt:description>
-          <ASKL1plt:value>85</ASKL1plt:value>
+          <ASKL1plt:name>slewRateCtrl0</ASKL1plt:name>
+          <ASKL1plt:description>slewRateCtrl0</ASKL1plt:description>
+          <ASKL1plt:value>27</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
-          <ASKL1plt:name>BW</ASKL1plt:name>
-          <ASKL1plt:description>BW</ASKL1plt:description>
-          <ASKL1plt:value>86</ASKL1plt:value>
+          <ASKL1plt:name>slewRateCtrl1</ASKL1plt:name>
+          <ASKL1plt:description>slewRateCtrl1</ASKL1plt:description>
+          <ASKL1plt:value>28</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
-          <ASKL1plt:name>dfeGAIN</ASKL1plt:name>
-          <ASKL1plt:description>dfeGAIN</ASKL1plt:description>
-          <ASKL1plt:value>87</ASKL1plt:value>
+          <ASKL1plt:name>EO</ASKL1plt:name>
+          <ASKL1plt:description>EO</ASKL1plt:description>
+          <ASKL1plt:value>29</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
-          <ASKL1plt:name>dfeGAIN2</ASKL1plt:name>
-          <ASKL1plt:description>dfeGAIN2</ASKL1plt:description>
-          <ASKL1plt:value>88</ASKL1plt:value>
+          <ASKL1plt:name>minCap1</ASKL1plt:name>
+          <ASKL1plt:description>minCap1</ASKL1plt:description>
+          <ASKL1plt:value>30</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
-          <ASKL1plt:name>pre1</ASKL1plt:name>
-          <ASKL1plt:description>pre1</ASKL1plt:description>
-          <ASKL1plt:value>89</ASKL1plt:value>
+          <ASKL1plt:name>maxCap1</ASKL1plt:name>
+          <ASKL1plt:description>maxCap1</ASKL1plt:description>
+          <ASKL1plt:value>31</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
-          <ASKL1plt:name>pre2</ASKL1plt:name>
-          <ASKL1plt:description>pre2</ASKL1plt:description>
-          <ASKL1plt:value>90</ASKL1plt:value>
+          <ASKL1plt:name>minRes1</ASKL1plt:name>
+          <ASKL1plt:description>minRes1</ASKL1plt:description>
+          <ASKL1plt:value>32</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
-          <ASKL1plt:name>post1</ASKL1plt:name>
-          <ASKL1plt:description>post1</ASKL1plt:description>
-          <ASKL1plt:value>91</ASKL1plt:value>
+          <ASKL1plt:name>maxRes1</ASKL1plt:name>
+          <ASKL1plt:description>maxRes1</ASKL1plt:description>
+          <ASKL1plt:value>33</ASKL1plt:value>
         </ASKL1plt:enum>
       </ASKL1plt:typedef>
       <ASKL1plt:typedef>
         <ASKL1plt:name>boolean-type</ASKL1plt:name>
         <ASKL1plt:type>enumeration</ASKL1plt:type>
-        <ASKL1plt:description>Boolean 32 bits , due to bing endian</ASKL1plt:description>
+        <ASKL1plt:description>Boolean 32 bits , due to big endian</ASKL1plt:description>
         <ASKL1plt:enum>
           <ASKL1plt:name>false</ASKL1plt:name>
           <ASKL1plt:description>False</ASKL1plt:description>
@@ -764,33 +479,6 @@
           <ASKL1plt:value>5</ASKL1plt:value>
         </ASKL1plt:enum>
       </ASKL1plt:typedef>
-      <ASKL1plt:typedef>
-        <ASKL1plt:name>uint8-type</ASKL1plt:name>
-        <ASKL1plt:type>uint32</ASKL1plt:type>
-        <ASKL1plt:description>Uint8 32 bits , due to bing endian</ASKL1plt:description>
-        <ASKL1plt:min>0</ASKL1plt:min>
-        <ASKL1plt:max>255</ASKL1plt:max>
-      </ASKL1plt:typedef>
-      <ASKL1plt:typedef>
-        <ASKL1plt:name>serdes-termination-type</ASKL1plt:name>
-        <ASKL1plt:type>enumeration</ASKL1plt:type>
-        <ASKL1plt:description>RX termination mode</ASKL1plt:description>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>GND</ASKL1plt:name>
-          <ASKL1plt:description>Enabled</ASKL1plt:description>
-          <ASKL1plt:value>0</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>VDD</ASKL1plt:name>
-          <ASKL1plt:description>Disabled</ASKL1plt:description>
-          <ASKL1plt:value>1</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>FLOATING</ASKL1plt:name>
-          <ASKL1plt:description>RS FEC enabled</ASKL1plt:description>
-          <ASKL1plt:value>2</ASKL1plt:value>
-        </ASKL1plt:enum>
-      </ASKL1plt:typedef>
       <ASKL1plt:typedef>
         <ASKL1plt:name>port-interconnect-profile-type</ASKL1plt:name>
         <ASKL1plt:type>enumeration</ASKL1plt:type>
@@ -912,327 +600,381 @@
     <ASKL1plt:Port>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">0</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">1</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">2</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">3</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">4</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">5</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">6</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">7</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">8</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">9</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">10</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">11</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">12</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">13</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">14</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">15</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">16</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">17</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">18</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">19</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">20</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">21</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">22</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">23</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">24</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">25</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">26</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">27</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">28</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">29</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">30</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">31</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">32</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">2500MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">33</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">2500MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">34</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">2500MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">35</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">2500MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">36</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">2500MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">37</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">2500MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">38</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">2500MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">39</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">2500MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">40</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">2500MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">41</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">2500MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">42</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">2500MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">43</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">2500MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">44</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">2500MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">45</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">2500MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">46</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">2500MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">47</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">2500MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">48</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">49</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">50</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">51</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">52</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">53</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
     </ASKL1plt:Port>
   </ASKL1plt:ASK-L1>
diff --git a/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/ASK-PP-AC5X-RD.md5 b/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/ASK-PP-AC5X-RD.md5
index c043a0d72..a8cacfdd9 100644
--- a/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/ASK-PP-AC5X-RD.md5
+++ b/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/ASK-PP-AC5X-RD.md5
@@ -1 +1 @@
-209426f8b550ddf85db19925f9f202a1
\ No newline at end of file
+7e0317c4f0c86cc16929b1a143d90c32
\ No newline at end of file
diff --git a/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/ASK-PP-AC5X-RD.xml b/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/ASK-PP-AC5X-RD.xml
index 9e40492cf..8ed10be62 100644
--- a/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/ASK-PP-AC5X-RD.xml
+++ b/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/ASK-PP-AC5X-RD.xml
@@ -1,5 +1,5 @@
 <?xml version="1.0" encoding="utf-8"?>
-<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-02-19-1.06" profile="Askpp" sid="34f1c14a-b581-422d-bd10-426dfac013dd">
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-05-22-1.08" profile="Askpp" sid="4cd9a9b8-0123-48b5-a955-6a5c64917f70">
   <askppplt:ASK-PP xmlns:askppplt="urn:marvell:askpp:yang">
     <askppplt:typedefs>
       <askppplt:typedef>
diff --git a/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/SAI-AC5X-RD-32x1G-16x2_5G-6x25G.md5 b/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/SAI-AC5X-RD-32x1G-16x2_5G-6x25G.md5
index 41cd16295..cee8e830a 100644
--- a/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/SAI-AC5X-RD-32x1G-16x2_5G-6x25G.md5
+++ b/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/SAI-AC5X-RD-32x1G-16x2_5G-6x25G.md5
@@ -1 +1 @@
-fec8b7884a940c38451ef84be6fdbb24
\ No newline at end of file
+feb884bbff293ba58dc7b1cae36aa1d1
\ No newline at end of file
diff --git a/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/SAI-AC5X-RD-32x1G-16x2_5G-6x25G.xml b/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/SAI-AC5X-RD-32x1G-16x2_5G-6x25G.xml
index bbedd396d..58298363c 100644
--- a/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/SAI-AC5X-RD-32x1G-16x2_5G-6x25G.xml
+++ b/device/marvell/arm64-marvell_rd98DX35xx-r0/rd98DX35xx/SAI-AC5X-RD-32x1G-16x2_5G-6x25G.xml
@@ -1,5 +1,5 @@
 <?xml version="1.0" encoding="utf-8"?>
-<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-02-19-1.06" profile="SAI" sid="c310bbb1-ffca-4c99-9bae-f7d4caff5941">
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-05-22-1.08" profile="SAI" sid="daa51f10-6b7d-424f-ab07-3c51ae064e20">
   <SAIplt:SAI xmlns:SAIplt="urn:marvell:SAI:yang">
     <SAIplt:typedefs>
       <SAIplt:typedef>
@@ -50,10 +50,20 @@
           <SAIplt:description>Router In Drop Counters track Route Black Hole Packets</SAIplt:description>
           <SAIplt:value>1</SAIplt:value>
         </SAIplt:enum>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>Feature-enable</SAIplt:name>
+        <SAIplt:type>enumeration</SAIplt:type>
+        <SAIplt:description>Feature Enabled/Disabled</SAIplt:description>
         <SAIplt:enum>
-          <SAIplt:name>IN_DROP_ANY</SAIplt:name>
-          <SAIplt:description>Router In Drop Counters track either TTL &amp; Hop Limit Exceeded or Route Black Hole Packets</SAIplt:description>
-          <SAIplt:value>2</SAIplt:value>
+          <SAIplt:name>Disabled</SAIplt:name>
+          <SAIplt:description>Disabled</SAIplt:description>
+          <SAIplt:value>0</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>Enabled</SAIplt:name>
+          <SAIplt:description>Enabled</SAIplt:description>
+          <SAIplt:value>1</SAIplt:value>
         </SAIplt:enum>
       </SAIplt:typedef>
       <SAIplt:typedef>
@@ -442,14 +452,15 @@
       <SAIplt:max_tti SAIplt:type="uint32">1024</SAIplt:max_tti>
     </SAIplt:scalingAC5>
     <SAIplt:Counters>
-      <SAIplt:cnc-base-list>
-        <SAIplt:counter-base SAIplt:type="uint32">0</SAIplt:counter-base>
-      </SAIplt:cnc-base-list>
-      <SAIplt:router-in-drop-counter SAIplt:type="InDropCounter-type">IN_DROP_ANY</SAIplt:router-in-drop-counter>
+      <SAIplt:counter-base SAIplt:type="uint32">0</SAIplt:counter-base>
+      <SAIplt:router-in-drop-counter SAIplt:type="InDropCounter-type">ROUTE_BLACKHOLE</SAIplt:router-in-drop-counter>
     </SAIplt:Counters>
     <SAIplt:Logging>
       <SAIplt:log_dest SAIplt:type="logDest-type">SAI_LOG_SYSLOG</SAIplt:log_dest>
     </SAIplt:Logging>
+    <SAIplt:Feature>
+      <SAIplt:MACsec SAIplt:type="Feature-enable">Disabled</SAIplt:MACsec>
+    </SAIplt:Feature>
     <SAIplt:Features-using-acl>
       <SAIplt:feature SAIplt:type="acl-feature-name-type">control-acl</SAIplt:feature>
       <SAIplt:feature-priority SAIplt:type="feature-priority-type">3</SAIplt:feature-priority>
diff --git a/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/ASK-Board-ac5x-rd-32x1G-16x2_5G-6x25G.md5 b/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/ASK-Board-ac5x-rd-32x1G-16x2_5G-6x25G.md5
index 7b8c7b490..42941a1d2 100644
--- a/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/ASK-Board-ac5x-rd-32x1G-16x2_5G-6x25G.md5
+++ b/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/ASK-Board-ac5x-rd-32x1G-16x2_5G-6x25G.md5
@@ -1 +1 @@
-69af36a9007f8c9e4d33ea6465cc6b89
\ No newline at end of file
+1e32906bd09b43df35ce12534b2599c8
\ No newline at end of file
diff --git a/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/ASK-Board-ac5x-rd-32x1G-16x2_5G-6x25G.xml b/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/ASK-Board-ac5x-rd-32x1G-16x2_5G-6x25G.xml
index 7fd11122c..253c46780 100644
--- a/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/ASK-Board-ac5x-rd-32x1G-16x2_5G-6x25G.xml
+++ b/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/ASK-Board-ac5x-rd-32x1G-16x2_5G-6x25G.xml
@@ -1,5 +1,5 @@
 <?xml version="1.0" encoding="utf-8"?>
-<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-02-19-1.06" profile="Askboard" sid="eb53f80b-5892-4f8b-9197-a6f626effaba">
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-05-22-1.08" profile="Askboard" sid="9396a3c9-f447-4460-bd9f-7d0c21ca4d16">
   <askboardplt:ASK-Board xmlns:askboardplt="urn:marvell:askboard:yang">
     <askboardplt:typedefs>
       <askboardplt:typedef>
@@ -727,7 +727,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">1</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -746,7 +745,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">0</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -765,7 +763,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">3</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -784,7 +781,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">2</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -803,7 +799,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">5</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -822,7 +817,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">4</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -841,7 +835,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">7</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -860,7 +853,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">6</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -879,7 +871,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">9</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -898,7 +889,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">8</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -917,7 +907,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">11</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -936,7 +925,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">10</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -955,7 +943,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">13</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -974,7 +961,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">12</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -993,7 +979,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">15</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1012,7 +997,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">14</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1031,7 +1015,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">17</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1050,7 +1033,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">16</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1069,7 +1051,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">19</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1088,7 +1069,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">18</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1107,7 +1087,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">21</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1126,7 +1105,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">20</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1145,7 +1123,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">23</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1164,7 +1141,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">22</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1183,7 +1159,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">25</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1202,7 +1177,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">24</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1221,7 +1195,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">27</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1240,7 +1213,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">26</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1259,7 +1231,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">29</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1278,7 +1249,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">28</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1297,7 +1267,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">31</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1316,7 +1285,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">30</askboardplt:phyAddr>
           <askboardplt:smiItf askboardplt:type="phy-smi-interface-type">1</askboardplt:smiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1335,7 +1303,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">1</askboardplt:phyAddr>
           <askboardplt:xSmiItf askboardplt:type="phy-xsmi-interface-type">0</askboardplt:xSmiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1354,7 +1321,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">14</askboardplt:phyAddr>
           <askboardplt:xSmiItf askboardplt:type="phy-xsmi-interface-type">0</askboardplt:xSmiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1373,7 +1339,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">15</askboardplt:phyAddr>
           <askboardplt:xSmiItf askboardplt:type="phy-xsmi-interface-type">0</askboardplt:xSmiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1392,7 +1357,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">12</askboardplt:phyAddr>
           <askboardplt:xSmiItf askboardplt:type="phy-xsmi-interface-type">0</askboardplt:xSmiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1411,7 +1375,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">13</askboardplt:phyAddr>
           <askboardplt:xSmiItf askboardplt:type="phy-xsmi-interface-type">0</askboardplt:xSmiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1430,7 +1393,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">10</askboardplt:phyAddr>
           <askboardplt:xSmiItf askboardplt:type="phy-xsmi-interface-type">0</askboardplt:xSmiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1449,7 +1411,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">11</askboardplt:phyAddr>
           <askboardplt:xSmiItf askboardplt:type="phy-xsmi-interface-type">0</askboardplt:xSmiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1468,7 +1429,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">8</askboardplt:phyAddr>
           <askboardplt:xSmiItf askboardplt:type="phy-xsmi-interface-type">0</askboardplt:xSmiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1487,7 +1447,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">9</askboardplt:phyAddr>
           <askboardplt:xSmiItf askboardplt:type="phy-xsmi-interface-type">0</askboardplt:xSmiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1506,7 +1465,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">6</askboardplt:phyAddr>
           <askboardplt:xSmiItf askboardplt:type="phy-xsmi-interface-type">0</askboardplt:xSmiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1525,7 +1483,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">7</askboardplt:phyAddr>
           <askboardplt:xSmiItf askboardplt:type="phy-xsmi-interface-type">0</askboardplt:xSmiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1544,7 +1501,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">4</askboardplt:phyAddr>
           <askboardplt:xSmiItf askboardplt:type="phy-xsmi-interface-type">0</askboardplt:xSmiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1563,7 +1519,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">5</askboardplt:phyAddr>
           <askboardplt:xSmiItf askboardplt:type="phy-xsmi-interface-type">0</askboardplt:xSmiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1582,7 +1537,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">2</askboardplt:phyAddr>
           <askboardplt:xSmiItf askboardplt:type="phy-xsmi-interface-type">0</askboardplt:xSmiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1601,7 +1555,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">3</askboardplt:phyAddr>
           <askboardplt:xSmiItf askboardplt:type="phy-xsmi-interface-type">0</askboardplt:xSmiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1620,7 +1573,6 @@ lowercase characters.</askboardplt:description>
           <askboardplt:phyAddr askboardplt:type="uint32">0</askboardplt:phyAddr>
           <askboardplt:xSmiItf askboardplt:type="phy-xsmi-interface-type">0</askboardplt:xSmiItf>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">63</askboardplt:ledPosition>
           <askboardplt:portForceDataSupported askboardplt:type="boolean-type">false</askboardplt:portForceDataSupported>
@@ -1636,7 +1588,6 @@ lowercase characters.</askboardplt:description>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">0</askboardplt:ledPosition>
           <askboardplt:polarityInvertList-list>
@@ -1656,7 +1607,6 @@ lowercase characters.</askboardplt:description>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">1</askboardplt:ledPosition>
           <askboardplt:polarityInvertList-list>
@@ -1676,7 +1626,6 @@ lowercase characters.</askboardplt:description>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">0</askboardplt:ledPosition>
           <askboardplt:polarityInvertList-list>
@@ -1696,7 +1645,6 @@ lowercase characters.</askboardplt:description>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">1</askboardplt:ledPosition>
           <askboardplt:polarityInvertList-list>
@@ -1716,7 +1664,6 @@ lowercase characters.</askboardplt:description>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">2</askboardplt:ledPosition>
           <askboardplt:polarityInvertList-list>
@@ -1736,7 +1683,6 @@ lowercase characters.</askboardplt:description>
         <askboardplt:phy>
           <askboardplt:phyType askboardplt:type="phy-type">NA</askboardplt:phyType>
         </askboardplt:phy>
-        <askboardplt:serdesMuxScheme askboardplt:type="string"/>
         <askboardplt:ledstream-port>
           <askboardplt:ledPosition askboardplt:type="led-position-type">3</askboardplt:ledPosition>
           <askboardplt:polarityInvertList-list>
@@ -1810,6 +1756,53 @@ lowercase characters.</askboardplt:description>
         </askboardplt:ledstream-class-manipulation-list>
       </askboardplt:Ledstream-interface-list>
     </askboardplt:device-list>
+    <askboardplt:phyLedControl>
+      <askboardplt:phy-type-list>
+        <askboardplt:phyType askboardplt:type="phy-type">alaska-88E1780</askboardplt:phyType>
+        <askboardplt:phy-led-regs-list>
+          <askboardplt:reg-addr askboardplt:type="uint16">16</askboardplt:reg-addr>
+          <askboardplt:page-num askboardplt:type="uint16">3</askboardplt:page-num>
+          <askboardplt:reg-value askboardplt:type="uint16">23</askboardplt:reg-value>
+          <askboardplt:reg-value-mask askboardplt:type="uint16">65280</askboardplt:reg-value-mask>
+        </askboardplt:phy-led-regs-list>
+        <askboardplt:phy-led-regs-list>
+          <askboardplt:reg-addr askboardplt:type="uint16">1</askboardplt:reg-addr>
+          <askboardplt:page-num askboardplt:type="uint16">28</askboardplt:page-num>
+          <askboardplt:reg-value askboardplt:type="uint16">1024</askboardplt:reg-value>
+          <askboardplt:reg-value-mask askboardplt:type="uint16">64511</askboardplt:reg-value-mask>
+        </askboardplt:phy-led-regs-list>
+      </askboardplt:phy-type-list>
+      <askboardplt:phy-type-list>
+        <askboardplt:phyType askboardplt:type="phy-type">alaska-88E2580</askboardplt:phyType>
+        <askboardplt:phy-led-regs-list>
+          <askboardplt:reg-addr askboardplt:type="uint16">61472</askboardplt:reg-addr>
+          <askboardplt:page-num askboardplt:type="uint16">31</askboardplt:page-num>
+          <askboardplt:reg-value askboardplt:type="uint16">168</askboardplt:reg-value>
+          <askboardplt:reg-value-mask askboardplt:type="uint16">57351</askboardplt:reg-value-mask>
+        </askboardplt:phy-led-regs-list>
+        <askboardplt:phy-led-regs-list>
+          <askboardplt:reg-addr askboardplt:type="uint16">61473</askboardplt:reg-addr>
+          <askboardplt:page-num askboardplt:type="uint16">31</askboardplt:page-num>
+          <askboardplt:reg-value askboardplt:type="uint16">296</askboardplt:reg-value>
+          <askboardplt:reg-value-mask askboardplt:type="uint16">57351</askboardplt:reg-value-mask>
+        </askboardplt:phy-led-regs-list>
+      </askboardplt:phy-type-list>
+      <askboardplt:phy-type-list>
+        <askboardplt:phyType askboardplt:type="phy-type">alaska-88E2540</askboardplt:phyType>
+        <askboardplt:phy-led-regs-list>
+          <askboardplt:reg-addr askboardplt:type="uint16">61472</askboardplt:reg-addr>
+          <askboardplt:page-num askboardplt:type="uint16">31</askboardplt:page-num>
+          <askboardplt:reg-value askboardplt:type="uint16">168</askboardplt:reg-value>
+          <askboardplt:reg-value-mask askboardplt:type="uint16">57351</askboardplt:reg-value-mask>
+        </askboardplt:phy-led-regs-list>
+        <askboardplt:phy-led-regs-list>
+          <askboardplt:reg-addr askboardplt:type="uint16">61473</askboardplt:reg-addr>
+          <askboardplt:page-num askboardplt:type="uint16">31</askboardplt:page-num>
+          <askboardplt:reg-value askboardplt:type="uint16">296</askboardplt:reg-value>
+          <askboardplt:reg-value-mask askboardplt:type="uint16">57351</askboardplt:reg-value-mask>
+        </askboardplt:phy-led-regs-list>
+      </askboardplt:phy-type-list>
+    </askboardplt:phyLedControl>
     <askboardplt:UDSFilePath askboardplt:type="std-string">.</askboardplt:UDSFilePath>
     <askboardplt:serdesMux>
       <askboardplt:serdesMuxSchemePortMod askboardplt:type="uint32">1</askboardplt:serdesMuxSchemePortMod>
diff --git a/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/ASK-L1-AC5X-RD-32x1G-16x2_5G-6x25G.md5 b/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/ASK-L1-AC5X-RD-32x1G-16x2_5G-6x25G.md5
index f2cf3d5b6..e4baf309b 100644
--- a/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/ASK-L1-AC5X-RD-32x1G-16x2_5G-6x25G.md5
+++ b/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/ASK-L1-AC5X-RD-32x1G-16x2_5G-6x25G.md5
@@ -1 +1 @@
-85b49bcb9d399bcd1b8128a42caba2d2
\ No newline at end of file
+fcd5642435f602883aab5c9672e96aa5
\ No newline at end of file
diff --git a/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/ASK-L1-AC5X-RD-32x1G-16x2_5G-6x25G.xml b/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/ASK-L1-AC5X-RD-32x1G-16x2_5G-6x25G.xml
index 980d4267b..78460a4e0 100644
--- a/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/ASK-L1-AC5X-RD-32x1G-16x2_5G-6x25G.xml
+++ b/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/ASK-L1-AC5X-RD-32x1G-16x2_5G-6x25G.xml
@@ -1,5 +1,5 @@
 <?xml version="1.0" encoding="utf-8"?>
-<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-02-19-1.06" profile="Askl1" sid="71d3ab0f-3ac2-452a-a5c9-2dfdc969734a">
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-05-22-1.08" profile="Askl1" sid="d7694ab8-0eab-47cd-82ce-10074030f449">
   <ASKL1plt:ASK-L1 xmlns:ASKL1plt="urn:marvell:ASKL1:yang">
     <ASKL1plt:typedefs>
       <ASKL1plt:typedef>
@@ -239,8 +239,8 @@
         <ASKL1plt:type>enumeration</ASKL1plt:type>
         <ASKL1plt:description>Tx parameter type</ASKL1plt:description>
         <ASKL1plt:enum>
-          <ASKL1plt:name>atten</ASKL1plt:name>
-          <ASKL1plt:description>atten</ASKL1plt:description>
+          <ASKL1plt:name>pre</ASKL1plt:name>
+          <ASKL1plt:description>pre</ASKL1plt:description>
           <ASKL1plt:value>0</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
@@ -248,75 +248,10 @@
           <ASKL1plt:description>post</ASKL1plt:description>
           <ASKL1plt:value>1</ASKL1plt:value>
         </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>pre</ASKL1plt:name>
-          <ASKL1plt:description>pre</ASKL1plt:description>
-          <ASKL1plt:value>2</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>pre2</ASKL1plt:name>
-          <ASKL1plt:description>pre2</ASKL1plt:description>
-          <ASKL1plt:value>3</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>pre3</ASKL1plt:name>
-          <ASKL1plt:description>pre3</ASKL1plt:description>
-          <ASKL1plt:value>4</ASKL1plt:value>
-        </ASKL1plt:enum>
         <ASKL1plt:enum>
           <ASKL1plt:name>peak</ASKL1plt:name>
           <ASKL1plt:description>peak</ASKL1plt:description>
-          <ASKL1plt:value>5</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>main</ASKL1plt:name>
-          <ASKL1plt:description>main</ASKL1plt:description>
-          <ASKL1plt:value>6</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>txAmpAdjEn</ASKL1plt:name>
-          <ASKL1plt:description>txAmpAdjEn</ASKL1plt:description>
-          <ASKL1plt:value>7</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>emph0</ASKL1plt:name>
-          <ASKL1plt:description>emph0</ASKL1plt:description>
-          <ASKL1plt:value>8</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>emph1</ASKL1plt:name>
-          <ASKL1plt:description>emph1</ASKL1plt:description>
-          <ASKL1plt:value>9</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>txAmpShft</ASKL1plt:name>
-          <ASKL1plt:description>txAmpShft</ASKL1plt:description>
-          <ASKL1plt:value>10</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>txEmphEn</ASKL1plt:name>
-          <ASKL1plt:description>txEmphEn</ASKL1plt:description>
-          <ASKL1plt:value>11</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>txEmphEn1</ASKL1plt:name>
-          <ASKL1plt:description>txEmphEn1</ASKL1plt:description>
-          <ASKL1plt:value>12</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>txAmpAdj</ASKL1plt:name>
-          <ASKL1plt:description>txAmpAdj</ASKL1plt:description>
-          <ASKL1plt:value>13</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>slewCtrlEn</ASKL1plt:name>
-          <ASKL1plt:description>slewCtrlEn</ASKL1plt:description>
-          <ASKL1plt:value>14</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>slewRate</ASKL1plt:name>
-          <ASKL1plt:description>slewRate</ASKL1plt:description>
-          <ASKL1plt:value>15</ASKL1plt:value>
+          <ASKL1plt:value>2</ASKL1plt:value>
         </ASKL1plt:enum>
       </ASKL1plt:typedef>
       <ASKL1plt:typedef>
@@ -324,400 +259,180 @@
         <ASKL1plt:type>enumeration</ASKL1plt:type>
         <ASKL1plt:description>Rx parameter type</ASKL1plt:description>
         <ASKL1plt:enum>
-          <ASKL1plt:name>sqlch</ASKL1plt:name>
-          <ASKL1plt:description>sqlch</ASKL1plt:description>
+          <ASKL1plt:name>dataRate</ASKL1plt:name>
+          <ASKL1plt:description>dataRate</ASKL1plt:description>
           <ASKL1plt:value>0</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
-          <ASKL1plt:name>DC</ASKL1plt:name>
-          <ASKL1plt:description>DC</ASKL1plt:description>
+          <ASKL1plt:name>res1Sel</ASKL1plt:name>
+          <ASKL1plt:description>res1Sel</ASKL1plt:description>
           <ASKL1plt:value>1</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
-          <ASKL1plt:name>LF</ASKL1plt:name>
-          <ASKL1plt:description>LF</ASKL1plt:description>
+          <ASKL1plt:name>res2Sel</ASKL1plt:name>
+          <ASKL1plt:description>res2Sel</ASKL1plt:description>
           <ASKL1plt:value>2</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
-          <ASKL1plt:name>HF</ASKL1plt:name>
-          <ASKL1plt:description>HF</ASKL1plt:description>
+          <ASKL1plt:name>cap1Sel</ASKL1plt:name>
+          <ASKL1plt:description>cap1Sel</ASKL1plt:description>
           <ASKL1plt:value>3</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
-          <ASKL1plt:name>gainShape1</ASKL1plt:name>
-          <ASKL1plt:description>gainShape1</ASKL1plt:description>
+          <ASKL1plt:name>cap2Sel</ASKL1plt:name>
+          <ASKL1plt:description>cap2Sel</ASKL1plt:description>
           <ASKL1plt:value>4</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
-          <ASKL1plt:name>gainShape2</ASKL1plt:name>
-          <ASKL1plt:description>gainShape2</ASKL1plt:description>
+          <ASKL1plt:name>minCap</ASKL1plt:name>
+          <ASKL1plt:description>minCap</ASKL1plt:description>
           <ASKL1plt:value>5</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
-          <ASKL1plt:name>shortChannelEn</ASKL1plt:name>
-          <ASKL1plt:description>shortChannelEn</ASKL1plt:description>
+          <ASKL1plt:name>minCapN</ASKL1plt:name>
+          <ASKL1plt:description>minCapN</ASKL1plt:description>
+          <ASKL1plt:value>6</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>sumfBoostTargetC0</ASKL1plt:name>
+          <ASKL1plt:description>sumfBoostTargetC0</ASKL1plt:description>
           <ASKL1plt:value>7</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
-          <ASKL1plt:name>bfLf</ASKL1plt:name>
-          <ASKL1plt:description>bfLf</ASKL1plt:description>
+          <ASKL1plt:name>sumfBoostTargetC1</ASKL1plt:name>
+          <ASKL1plt:description>sumfBoostTargetC1</ASKL1plt:description>
           <ASKL1plt:value>8</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
-          <ASKL1plt:name>bfHf</ASKL1plt:name>
-          <ASKL1plt:description>bfHf</ASKL1plt:description>
+          <ASKL1plt:name>sumfBoostTargetC2</ASKL1plt:name>
+          <ASKL1plt:description>sumfBoostTargetC2</ASKL1plt:description>
           <ASKL1plt:value>9</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
-          <ASKL1plt:name>minLf</ASKL1plt:name>
-          <ASKL1plt:description>minLf</ASKL1plt:description>
+          <ASKL1plt:name>midpointPhaseOs0</ASKL1plt:name>
+          <ASKL1plt:description>midpointPhaseOs0</ASKL1plt:description>
           <ASKL1plt:value>10</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
-          <ASKL1plt:name>maxLf</ASKL1plt:name>
-          <ASKL1plt:description>maxLf</ASKL1plt:description>
+          <ASKL1plt:name>midpointPhaseOs1</ASKL1plt:name>
+          <ASKL1plt:description>midpointPhaseOs1</ASKL1plt:description>
           <ASKL1plt:value>11</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
-          <ASKL1plt:name>minHf</ASKL1plt:name>
-          <ASKL1plt:description>minHf</ASKL1plt:description>
+          <ASKL1plt:name>midpointPhaseOs2</ASKL1plt:name>
+          <ASKL1plt:description>midpointPhaseOs2</ASKL1plt:description>
           <ASKL1plt:value>12</ASKL1plt:value>
         </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>maxHf</ASKL1plt:name>
-          <ASKL1plt:description>maxHf</ASKL1plt:description>
-          <ASKL1plt:value>13</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>minPre1</ASKL1plt:name>
-          <ASKL1plt:description>minPre1</ASKL1plt:description>
-          <ASKL1plt:value>14</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>maxPre1</ASKL1plt:name>
-          <ASKL1plt:description>maxPre1</ASKL1plt:description>
-          <ASKL1plt:value>15</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>minPre2</ASKL1plt:name>
-          <ASKL1plt:description>minPre2</ASKL1plt:description>
-          <ASKL1plt:value>16</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>maxPre2</ASKL1plt:name>
-          <ASKL1plt:description/>
-          <ASKL1plt:value>17</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>minPost</ASKL1plt:name>
-          <ASKL1plt:description>minPost</ASKL1plt:description>
-          <ASKL1plt:value>18</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>maxPost</ASKL1plt:name>
-          <ASKL1plt:description>maxPost</ASKL1plt:description>
-          <ASKL1plt:value>19</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>squelch</ASKL1plt:name>
-          <ASKL1plt:description>squelch</ASKL1plt:description>
-          <ASKL1plt:value>20</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>termination</ASKL1plt:name>
-          <ASKL1plt:description>termination</ASKL1plt:description>
-          <ASKL1plt:value>27</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>coldEnvelope</ASKL1plt:name>
-          <ASKL1plt:description>coldEnvelope</ASKL1plt:description>
-          <ASKL1plt:value>35</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>hotEnvelope</ASKL1plt:name>
-          <ASKL1plt:description>hotEnvelope</ASKL1plt:description>
-          <ASKL1plt:value>36</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>dcGain</ASKL1plt:name>
-          <ASKL1plt:description>dcGain</ASKL1plt:description>
-          <ASKL1plt:value>37</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>bandWidth</ASKL1plt:name>
-          <ASKL1plt:description>bandWidth</ASKL1plt:description>
-          <ASKL1plt:value>38</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>dfe</ASKL1plt:name>
-          <ASKL1plt:description>dfe</ASKL1plt:description>
-          <ASKL1plt:value>39</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>ffeR</ASKL1plt:name>
-          <ASKL1plt:description>ffeR</ASKL1plt:description>
-          <ASKL1plt:value>40</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>ffeC</ASKL1plt:name>
-          <ASKL1plt:description>ffeC</ASKL1plt:description>
-          <ASKL1plt:value>41</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>sampler</ASKL1plt:name>
-          <ASKL1plt:description>sampler</ASKL1plt:description>
-          <ASKL1plt:value>42</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>align90</ASKL1plt:name>
-          <ASKL1plt:description>align90</ASKL1plt:description>
-          <ASKL1plt:value>43</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>ffeS</ASKL1plt:name>
-          <ASKL1plt:description>ffeS</ASKL1plt:description>
-          <ASKL1plt:value>44</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>resSel</ASKL1plt:name>
-          <ASKL1plt:description>resSel</ASKL1plt:description>
-          <ASKL1plt:value>45</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>resShift</ASKL1plt:name>
-          <ASKL1plt:description>resShift</ASKL1plt:description>
-          <ASKL1plt:value>46</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>capSel</ASKL1plt:name>
-          <ASKL1plt:description>capSel</ASKL1plt:description>
-          <ASKL1plt:value>47</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>ffeSettingForce</ASKL1plt:name>
-          <ASKL1plt:description>ffeSettingForce</ASKL1plt:description>
-          <ASKL1plt:value>48</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>adaptedResSel</ASKL1plt:name>
-          <ASKL1plt:description>adaptedResSel</ASKL1plt:description>
-          <ASKL1plt:value>49</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>adaptedCapSel</ASKL1plt:name>
-          <ASKL1plt:description>adaptedCapSel</ASKL1plt:description>
-          <ASKL1plt:value>50</ASKL1plt:value>
-        </ASKL1plt:enum>
         <ASKL1plt:enum>
           <ASKL1plt:name>selmufi</ASKL1plt:name>
           <ASKL1plt:description>selmufi</ASKL1plt:description>
-          <ASKL1plt:value>51</ASKL1plt:value>
+          <ASKL1plt:value>13</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
           <ASKL1plt:name>selmuff</ASKL1plt:name>
           <ASKL1plt:description>selmuff</ASKL1plt:description>
-          <ASKL1plt:value>52</ASKL1plt:value>
+          <ASKL1plt:value>14</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
           <ASKL1plt:name>selmupi</ASKL1plt:name>
           <ASKL1plt:description>selmupi</ASKL1plt:description>
-          <ASKL1plt:value>53</ASKL1plt:value>
+          <ASKL1plt:value>15</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
           <ASKL1plt:name>selmupf</ASKL1plt:name>
           <ASKL1plt:description>selmupf</ASKL1plt:description>
-          <ASKL1plt:value>54</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>slewRateCtrl0</ASKL1plt:name>
-          <ASKL1plt:description>slewRateCtrl0</ASKL1plt:description>
-          <ASKL1plt:value>55</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>slewRateCtrl1</ASKL1plt:name>
-          <ASKL1plt:description>slewRateCtrl1</ASKL1plt:description>
-          <ASKL1plt:value>56</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>EO</ASKL1plt:name>
-          <ASKL1plt:description>EO</ASKL1plt:description>
-          <ASKL1plt:value>57</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>dataRate</ASKL1plt:name>
-          <ASKL1plt:description>dataRate</ASKL1plt:description>
-          <ASKL1plt:value>58</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>res1Sel</ASKL1plt:name>
-          <ASKL1plt:description>res1Sel</ASKL1plt:description>
-          <ASKL1plt:value>59</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>res2Sel</ASKL1plt:name>
-          <ASKL1plt:description>res2Sel</ASKL1plt:description>
-          <ASKL1plt:value>60</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>cap1Sel</ASKL1plt:name>
-          <ASKL1plt:description>cap1Sel</ASKL1plt:description>
-          <ASKL1plt:value>61</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>cap2Sel</ASKL1plt:name>
-          <ASKL1plt:description>cap2Sel</ASKL1plt:description>
-          <ASKL1plt:value>62</ASKL1plt:value>
+          <ASKL1plt:value>16</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
           <ASKL1plt:name>midpointLargeThresKLane</ASKL1plt:name>
           <ASKL1plt:description>midpointLargeThresKLane</ASKL1plt:description>
-          <ASKL1plt:value>63</ASKL1plt:value>
+          <ASKL1plt:value>17</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
           <ASKL1plt:name>midpointSmallThresKLane</ASKL1plt:name>
           <ASKL1plt:description>midpointSmallThresKLane</ASKL1plt:description>
-          <ASKL1plt:value>64</ASKL1plt:value>
+          <ASKL1plt:value>18</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
           <ASKL1plt:name>midpointLargeThresCLane</ASKL1plt:name>
           <ASKL1plt:description>midpointLargeThresCLane</ASKL1plt:description>
-          <ASKL1plt:value>65</ASKL1plt:value>
+          <ASKL1plt:value>19</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
           <ASKL1plt:name>midpointSmallThresCLane</ASKL1plt:name>
           <ASKL1plt:description>midpointSmallThresCLane</ASKL1plt:description>
-          <ASKL1plt:value>66</ASKL1plt:value>
+          <ASKL1plt:value>20</ASKL1plt:value>
+        </ASKL1plt:enum>
+        <ASKL1plt:enum>
+          <ASKL1plt:name>inxSumfMidpointAdatptiveEnLane</ASKL1plt:name>
+          <ASKL1plt:description>inxSumfMidpointAdatptiveEnLane</ASKL1plt:description>
+          <ASKL1plt:value>21</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
           <ASKL1plt:name>dfeResF0aHighThresInitLane</ASKL1plt:name>
           <ASKL1plt:description>dfeResF0aHighThresInitLane</ASKL1plt:description>
-          <ASKL1plt:value>67</ASKL1plt:value>
+          <ASKL1plt:value>22</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
           <ASKL1plt:name>dfeResF0aHighThresEndLane</ASKL1plt:name>
           <ASKL1plt:description>dfeResF0aHighThresEndLane</ASKL1plt:description>
-          <ASKL1plt:value>68</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>current1Sel</ASKL1plt:name>
-          <ASKL1plt:description>current1Sel</ASKL1plt:description>
-          <ASKL1plt:value>69</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>rl1Sel</ASKL1plt:name>
-          <ASKL1plt:description>rl1Sel</ASKL1plt:description>
-          <ASKL1plt:value>70</ASKL1plt:value>
+          <ASKL1plt:value>23</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
-          <ASKL1plt:name>rl1Extra</ASKL1plt:name>
-          <ASKL1plt:description>rl1Extra</ASKL1plt:description>
-          <ASKL1plt:value>71</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>cl1Ctrl</ASKL1plt:name>
-          <ASKL1plt:description>cl1Ctrl</ASKL1plt:description>
-          <ASKL1plt:value>72</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>enMidFreq</ASKL1plt:name>
-          <ASKL1plt:description>enMidFreq</ASKL1plt:description>
-          <ASKL1plt:value>73</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>cs1Mid</ASKL1plt:name>
-          <ASKL1plt:description>cs1Mid</ASKL1plt:description>
-          <ASKL1plt:value>74</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>rs1Mid</ASKL1plt:name>
-          <ASKL1plt:description>rs1Mid</ASKL1plt:description>
-          <ASKL1plt:value>75</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>rfCtrl</ASKL1plt:name>
-          <ASKL1plt:description>rfCtrl</ASKL1plt:description>
-          <ASKL1plt:value>76</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>rl1TiaSel</ASKL1plt:name>
-          <ASKL1plt:description>rl1TiaSel</ASKL1plt:description>
-          <ASKL1plt:value>77</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>rl1TiaExtra</ASKL1plt:name>
-          <ASKL1plt:description>rl1TiaExtra</ASKL1plt:description>
-          <ASKL1plt:value>78</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>hpfRSel1st</ASKL1plt:name>
-          <ASKL1plt:description>hpfRSel1st</ASKL1plt:description>
-          <ASKL1plt:value>79</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>current1TiaSel</ASKL1plt:name>
-          <ASKL1plt:description>current1TiaSel</ASKL1plt:description>
-          <ASKL1plt:value>80</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>rl2Tune</ASKL1plt:name>
-          <ASKL1plt:description>rl2Tune</ASKL1plt:description>
-          <ASKL1plt:value>81</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>rl2Sel</ASKL1plt:name>
-          <ASKL1plt:description>rl2Sel</ASKL1plt:description>
-          <ASKL1plt:value>82</ASKL1plt:value>
+          <ASKL1plt:name>squelch</ASKL1plt:name>
+          <ASKL1plt:description>squelch</ASKL1plt:description>
+          <ASKL1plt:value>24</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
-          <ASKL1plt:name>rs2Sel</ASKL1plt:name>
-          <ASKL1plt:description>rs2Sel</ASKL1plt:description>
-          <ASKL1plt:value>83</ASKL1plt:value>
+          <ASKL1plt:name>align90</ASKL1plt:name>
+          <ASKL1plt:description>align90</ASKL1plt:description>
+          <ASKL1plt:value>25</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
-          <ASKL1plt:name>current2Sel</ASKL1plt:name>
-          <ASKL1plt:description>current2Sel</ASKL1plt:description>
-          <ASKL1plt:value>84</ASKL1plt:value>
+          <ASKL1plt:name>sampler</ASKL1plt:name>
+          <ASKL1plt:description>sampler</ASKL1plt:description>
+          <ASKL1plt:value>26</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
-          <ASKL1plt:name>hpfRsel2nd</ASKL1plt:name>
-          <ASKL1plt:description>hpfRsel2nd</ASKL1plt:description>
-          <ASKL1plt:value>85</ASKL1plt:value>
+          <ASKL1plt:name>slewRateCtrl0</ASKL1plt:name>
+          <ASKL1plt:description>slewRateCtrl0</ASKL1plt:description>
+          <ASKL1plt:value>27</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
-          <ASKL1plt:name>BW</ASKL1plt:name>
-          <ASKL1plt:description>BW</ASKL1plt:description>
-          <ASKL1plt:value>86</ASKL1plt:value>
+          <ASKL1plt:name>slewRateCtrl1</ASKL1plt:name>
+          <ASKL1plt:description>slewRateCtrl1</ASKL1plt:description>
+          <ASKL1plt:value>28</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
-          <ASKL1plt:name>dfeGAIN</ASKL1plt:name>
-          <ASKL1plt:description>dfeGAIN</ASKL1plt:description>
-          <ASKL1plt:value>87</ASKL1plt:value>
+          <ASKL1plt:name>EO</ASKL1plt:name>
+          <ASKL1plt:description>EO</ASKL1plt:description>
+          <ASKL1plt:value>29</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
-          <ASKL1plt:name>dfeGAIN2</ASKL1plt:name>
-          <ASKL1plt:description>dfeGAIN2</ASKL1plt:description>
-          <ASKL1plt:value>88</ASKL1plt:value>
+          <ASKL1plt:name>minCap1</ASKL1plt:name>
+          <ASKL1plt:description>minCap1</ASKL1plt:description>
+          <ASKL1plt:value>30</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
-          <ASKL1plt:name>pre1</ASKL1plt:name>
-          <ASKL1plt:description>pre1</ASKL1plt:description>
-          <ASKL1plt:value>89</ASKL1plt:value>
+          <ASKL1plt:name>maxCap1</ASKL1plt:name>
+          <ASKL1plt:description>maxCap1</ASKL1plt:description>
+          <ASKL1plt:value>31</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
-          <ASKL1plt:name>pre2</ASKL1plt:name>
-          <ASKL1plt:description>pre2</ASKL1plt:description>
-          <ASKL1plt:value>90</ASKL1plt:value>
+          <ASKL1plt:name>minRes1</ASKL1plt:name>
+          <ASKL1plt:description>minRes1</ASKL1plt:description>
+          <ASKL1plt:value>32</ASKL1plt:value>
         </ASKL1plt:enum>
         <ASKL1plt:enum>
-          <ASKL1plt:name>post1</ASKL1plt:name>
-          <ASKL1plt:description>post1</ASKL1plt:description>
-          <ASKL1plt:value>91</ASKL1plt:value>
+          <ASKL1plt:name>maxRes1</ASKL1plt:name>
+          <ASKL1plt:description>maxRes1</ASKL1plt:description>
+          <ASKL1plt:value>33</ASKL1plt:value>
         </ASKL1plt:enum>
       </ASKL1plt:typedef>
       <ASKL1plt:typedef>
         <ASKL1plt:name>boolean-type</ASKL1plt:name>
         <ASKL1plt:type>enumeration</ASKL1plt:type>
-        <ASKL1plt:description>Boolean 32 bits , due to bing endian</ASKL1plt:description>
+        <ASKL1plt:description>Boolean 32 bits , due to big endian</ASKL1plt:description>
         <ASKL1plt:enum>
           <ASKL1plt:name>false</ASKL1plt:name>
           <ASKL1plt:description>False</ASKL1plt:description>
@@ -764,33 +479,6 @@
           <ASKL1plt:value>5</ASKL1plt:value>
         </ASKL1plt:enum>
       </ASKL1plt:typedef>
-      <ASKL1plt:typedef>
-        <ASKL1plt:name>uint8-type</ASKL1plt:name>
-        <ASKL1plt:type>uint32</ASKL1plt:type>
-        <ASKL1plt:description>Uint8 32 bits , due to bing endian</ASKL1plt:description>
-        <ASKL1plt:min>0</ASKL1plt:min>
-        <ASKL1plt:max>255</ASKL1plt:max>
-      </ASKL1plt:typedef>
-      <ASKL1plt:typedef>
-        <ASKL1plt:name>serdes-termination-type</ASKL1plt:name>
-        <ASKL1plt:type>enumeration</ASKL1plt:type>
-        <ASKL1plt:description>RX termination mode</ASKL1plt:description>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>GND</ASKL1plt:name>
-          <ASKL1plt:description>Enabled</ASKL1plt:description>
-          <ASKL1plt:value>0</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>VDD</ASKL1plt:name>
-          <ASKL1plt:description>Disabled</ASKL1plt:description>
-          <ASKL1plt:value>1</ASKL1plt:value>
-        </ASKL1plt:enum>
-        <ASKL1plt:enum>
-          <ASKL1plt:name>FLOATING</ASKL1plt:name>
-          <ASKL1plt:description>RS FEC enabled</ASKL1plt:description>
-          <ASKL1plt:value>2</ASKL1plt:value>
-        </ASKL1plt:enum>
-      </ASKL1plt:typedef>
       <ASKL1plt:typedef>
         <ASKL1plt:name>port-interconnect-profile-type</ASKL1plt:name>
         <ASKL1plt:type>enumeration</ASKL1plt:type>
@@ -912,327 +600,381 @@
     <ASKL1plt:Port>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">0</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">1</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">2</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">3</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">4</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">5</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">6</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">7</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">8</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">9</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">10</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">11</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">12</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">13</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">14</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">15</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">16</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">17</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">18</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">19</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">20</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">21</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">22</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">23</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">24</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">25</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">26</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">27</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">28</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">29</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">30</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">31</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">1000MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">32</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">2500MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">33</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">2500MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">34</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">2500MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">35</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">2500MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">36</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">2500MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">37</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">2500MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">38</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">2500MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">39</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">2500MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">40</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">2500MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">41</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">2500MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">42</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">2500MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">43</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">2500MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">44</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">2500MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">45</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">2500MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">46</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">2500MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">47</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">2500MR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">48</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">49</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">50</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">51</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">52</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
       <ASKL1plt:port-list>
         <ASKL1plt:portNumber ASKL1plt:type="physical-port-num-type">53</ASKL1plt:portNumber>
-        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">AVAGO</ASKL1plt:Serdes>
+        <ASKL1plt:Serdes ASKL1plt:type="serdes-type">COMPHY_C28G</ASKL1plt:Serdes>
         <ASKL1plt:interconnectProfile ASKL1plt:type="port-interconnect-profile-type">profile_default</ASKL1plt:interconnectProfile>
         <ASKL1plt:ifModeName ASKL1plt:type="string">25GR1</ASKL1plt:ifModeName>
+        <ASKL1plt:supportDynamicPortBrkout ASKL1plt:type="boolean-type">false</ASKL1plt:supportDynamicPortBrkout>
       </ASKL1plt:port-list>
     </ASKL1plt:Port>
   </ASKL1plt:ASK-L1>
diff --git a/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/ASK-PP-AC5X-RD.md5 b/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/ASK-PP-AC5X-RD.md5
index c043a0d72..a8cacfdd9 100644
--- a/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/ASK-PP-AC5X-RD.md5
+++ b/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/ASK-PP-AC5X-RD.md5
@@ -1 +1 @@
-209426f8b550ddf85db19925f9f202a1
\ No newline at end of file
+7e0317c4f0c86cc16929b1a143d90c32
\ No newline at end of file
diff --git a/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/ASK-PP-AC5X-RD.xml b/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/ASK-PP-AC5X-RD.xml
index 9e40492cf..8ed10be62 100644
--- a/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/ASK-PP-AC5X-RD.xml
+++ b/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/ASK-PP-AC5X-RD.xml
@@ -1,5 +1,5 @@
 <?xml version="1.0" encoding="utf-8"?>
-<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-02-19-1.06" profile="Askpp" sid="34f1c14a-b581-422d-bd10-426dfac013dd">
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-05-22-1.08" profile="Askpp" sid="4cd9a9b8-0123-48b5-a955-6a5c64917f70">
   <askppplt:ASK-PP xmlns:askppplt="urn:marvell:askpp:yang">
     <askppplt:typedefs>
       <askppplt:typedef>
diff --git a/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/SAI-AC5X-RD-32x1G-16x2_5G-6x25G.md5 b/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/SAI-AC5X-RD-32x1G-16x2_5G-6x25G.md5
index 41cd16295..cee8e830a 100644
--- a/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/SAI-AC5X-RD-32x1G-16x2_5G-6x25G.md5
+++ b/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/SAI-AC5X-RD-32x1G-16x2_5G-6x25G.md5
@@ -1 +1 @@
-fec8b7884a940c38451ef84be6fdbb24
\ No newline at end of file
+feb884bbff293ba58dc7b1cae36aa1d1
\ No newline at end of file
diff --git a/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/SAI-AC5X-RD-32x1G-16x2_5G-6x25G.xml b/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/SAI-AC5X-RD-32x1G-16x2_5G-6x25G.xml
index bbedd396d..58298363c 100644
--- a/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/SAI-AC5X-RD-32x1G-16x2_5G-6x25G.xml
+++ b/device/marvell/arm64-marvell_rd98DX35xx_cn9131-r0/rd98DX35xx_cn9131/SAI-AC5X-RD-32x1G-16x2_5G-6x25G.xml
@@ -1,5 +1,5 @@
 <?xml version="1.0" encoding="utf-8"?>
-<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-02-19-1.06" profile="SAI" sid="c310bbb1-ffca-4c99-9bae-f7d4caff5941">
+<data xmlns="urn:ietf:params:xml:ns:netconf:base:1.0" version="2024-05-22-1.08" profile="SAI" sid="daa51f10-6b7d-424f-ab07-3c51ae064e20">
   <SAIplt:SAI xmlns:SAIplt="urn:marvell:SAI:yang">
     <SAIplt:typedefs>
       <SAIplt:typedef>
@@ -50,10 +50,20 @@
           <SAIplt:description>Router In Drop Counters track Route Black Hole Packets</SAIplt:description>
           <SAIplt:value>1</SAIplt:value>
         </SAIplt:enum>
+      </SAIplt:typedef>
+      <SAIplt:typedef>
+        <SAIplt:name>Feature-enable</SAIplt:name>
+        <SAIplt:type>enumeration</SAIplt:type>
+        <SAIplt:description>Feature Enabled/Disabled</SAIplt:description>
         <SAIplt:enum>
-          <SAIplt:name>IN_DROP_ANY</SAIplt:name>
-          <SAIplt:description>Router In Drop Counters track either TTL &amp; Hop Limit Exceeded or Route Black Hole Packets</SAIplt:description>
-          <SAIplt:value>2</SAIplt:value>
+          <SAIplt:name>Disabled</SAIplt:name>
+          <SAIplt:description>Disabled</SAIplt:description>
+          <SAIplt:value>0</SAIplt:value>
+        </SAIplt:enum>
+        <SAIplt:enum>
+          <SAIplt:name>Enabled</SAIplt:name>
+          <SAIplt:description>Enabled</SAIplt:description>
+          <SAIplt:value>1</SAIplt:value>
         </SAIplt:enum>
       </SAIplt:typedef>
       <SAIplt:typedef>
@@ -442,14 +452,15 @@
       <SAIplt:max_tti SAIplt:type="uint32">1024</SAIplt:max_tti>
     </SAIplt:scalingAC5>
     <SAIplt:Counters>
-      <SAIplt:cnc-base-list>
-        <SAIplt:counter-base SAIplt:type="uint32">0</SAIplt:counter-base>
-      </SAIplt:cnc-base-list>
-      <SAIplt:router-in-drop-counter SAIplt:type="InDropCounter-type">IN_DROP_ANY</SAIplt:router-in-drop-counter>
+      <SAIplt:counter-base SAIplt:type="uint32">0</SAIplt:counter-base>
+      <SAIplt:router-in-drop-counter SAIplt:type="InDropCounter-type">ROUTE_BLACKHOLE</SAIplt:router-in-drop-counter>
     </SAIplt:Counters>
     <SAIplt:Logging>
       <SAIplt:log_dest SAIplt:type="logDest-type">SAI_LOG_SYSLOG</SAIplt:log_dest>
     </SAIplt:Logging>
+    <SAIplt:Feature>
+      <SAIplt:MACsec SAIplt:type="Feature-enable">Disabled</SAIplt:MACsec>
+    </SAIplt:Feature>
     <SAIplt:Features-using-acl>
       <SAIplt:feature SAIplt:type="acl-feature-name-type">control-acl</SAIplt:feature>
       <SAIplt:feature-priority SAIplt:type="feature-priority-type">3</SAIplt:feature-priority>

From a5a2cf177b2bbffb634e97215bb9c09fc1195ed7 Mon Sep 17 00:00:00 2001
From: Zain Budhwani <99770260+zbud-msft@users.noreply.github.com>
Date: Thu, 29 Aug 2024 14:07:43 -0700
Subject: [PATCH 0941/1115] Fix flaky capture service start (#20024)

#### Why I did it

Dropping control character (message sent when XSUB connects to XPUB as part of ZMQ Proxy setup to notify that subscription has been made) in do capture has been flaky since control character is not guaranteed to be the first message sent if there are events (like event-down-ctr) being published to XSUB.

Scenarios

1) Control character is sent and is first message when starting capture service

`eventd#eventd#eventd: :- heartbeat_ctrl: Set heartbeat_ctrl pause=1`
`eventd#eventd#eventd: :- do_capture: Received subscription message when XSUB connects to XPUB`

2) Events like event-down ctr is sent before control character

`eventd#eventd#eventd: :- run: Dropping Message: 22 serialization::archive 18 17 sonic-events-host`
`eventd#eventd#eventd: :- run: Dropping Message: 22 serialization::archive 18 0 0 4 0 0 0 1 d 103 {"sonic-events-host:event-stopped-ctr":{"ctr_name":"EVENTD","timestamp":"2024-08-27T00:02:51.407518Z"}} 1 r 36 3357542f-bae1-458f-a804-660e620d21f5 1 s 1 9 1 t 19 1724716971407591080`
`heartbeat_ctrl: Set heartbeat_ctrl pause=1`
`do_capture: Received subscription message when XSUB connects to XPUB`

3) Control character is not sent at all

`eventd#eventd#eventd: :- heartbeat_ctrl: Set heartbeat_ctrl pause=1`

4) Control character is delayed and not caught when starting capture service, but is then caught after causing deserialize error.

`do_capture: Receiving event from source: 22 serialization::archive 18 17 sonic-events-host, will read second part of event`
`deserialize: deserialize Failed: input stream errorstr[0:64]:(#001) data type: std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char> >&`
`zmq_read_part: Failed to deserialize part rc=-2`
`zmq_read_part: last:errno=11`
`zmq_message_read: Failure to read part1 rc=-2`
`zmq_message_read: last:errno=11`

We can cover these scenarios by just dropping the control character inside zmq_message_read as part of events_common in swsscommon (different PR). In this PR we will remove such handling logic and make sure that empty events that will be sent by control character are ignored.

##### Work item tracking
- Microsoft ADO **(number only)**:28728116

#### How I did it

Remove logic for handling control character

#### How to verify it

UT and sonic-mgmt test cases.
---
 src/sonic-eventd/src/eventd.cpp      | 24 +++---------------------
 src/sonic-eventd/tests/eventd_ut.cpp | 23 ++++++-----------------
 2 files changed, 9 insertions(+), 38 deletions(-)

diff --git a/src/sonic-eventd/src/eventd.cpp b/src/sonic-eventd/src/eventd.cpp
index eb692d5b3..d4da44f32 100644
--- a/src/sonic-eventd/src/eventd.cpp
+++ b/src/sonic-eventd/src/eventd.cpp
@@ -302,7 +302,9 @@ static bool
 validate_event(const internal_event_t &event, runtime_id_t &rid, sequence_t &seq)
 {
     bool ret = false;
-
+    if(event.empty()) {
+        return ret;
+    }
     internal_event_t::const_iterator itc_r, itc_s, itc_e;
     itc_r = event.find(EVENT_RUNTIME_ID);
     itc_s = event.find(EVENT_SEQUENCE);
@@ -357,7 +359,6 @@ capture_service::do_capture()
     int init_cnt;
     void *cap_sub_sock = NULL;
     counters_t total_overflow = 0;
-    static bool init_done = false;
 
     typedef enum {
         /*
@@ -394,25 +395,6 @@ capture_service::do_capture()
 
     m_cap_run = true;
 
-    if(!init_done) {
-        zmq_msg_t msg;
-        zmq_msg_init(&msg);
-        int rc = zmq_msg_recv(&msg, cap_sub_sock, 0);
-        RET_ON_ERR(rc == 1, "Failed to read subscription message when XSUB connects to XPUB");
-        /*
-         * When XSUB socket connects to XPUB, a subscription message is sent as a single byte 1.
-         * When capture service begins to read, the very first message that it will read is this
-         * control character.
-         *
-         * We will handle by reading this message and dropping it before we begin reading for
-         * cached events.
-         *
-         * This behavior will only happen once when XSUB connects to XPUB not everytime cache is started.
-         *
-         */
-         init_done = true;
-    }
-
     while (m_ctrl != START_CAPTURE) {
         /* Wait for capture start */
         this_thread::sleep_for(chrono::milliseconds(10));
diff --git a/src/sonic-eventd/tests/eventd_ut.cpp b/src/sonic-eventd/tests/eventd_ut.cpp
index 729563fcd..a499bb67a 100644
--- a/src/sonic-eventd/tests/eventd_ut.cpp
+++ b/src/sonic-eventd/tests/eventd_ut.cpp
@@ -150,9 +150,8 @@ static const test_data_t ldata[] = {
     },
 };
 
-
 void run_cap(void *zctx, bool &term, string &read_source,
-        int &cnt, bool &should_read_control)
+        int &cnt)
 {
     void *mock_cap = zmq_socket (zctx, ZMQ_SUB);
     string source;
@@ -165,11 +164,10 @@ void run_cap(void *zctx, bool &term, string &read_source,
     EXPECT_EQ(0, zmq_setsockopt(mock_cap, ZMQ_SUBSCRIBE, "", 0));
     EXPECT_EQ(0, zmq_setsockopt(mock_cap, ZMQ_RCVTIMEO, &block_ms, sizeof (block_ms)));
 
-    if(should_read_control) {
-        zmq_msg_t msg;
-        zmq_msg_init(&msg);
-        EXPECT_NE(1, zmq_msg_recv(&msg, mock_cap, 0)); // Subscription message should be read by do_capture
-    }
+    zmq_msg_t msg;
+    zmq_msg_init(&msg);
+    int rc = zmq_msg_recv(&msg, mock_cap, 0);
+    EXPECT_EQ(1, rc); // read control character
 
     while(!term) {
         string source;
@@ -228,7 +226,6 @@ void run_pub(void *mock_pub, const string wr_source, internal_events_lst_t &lst)
 TEST(eventd, proxy)
 {
     printf("Proxy TEST started\n");
-    bool should_read_control = false;
     bool term_sub = false;
     bool term_cap = false;
     string rd_csource, rd_source, wr_source("hello");
@@ -246,7 +243,7 @@ TEST(eventd, proxy)
     EXPECT_EQ(0, pxy->init());
 
     /* capture in a thread */
-    thread thrc(&run_cap, zctx, ref(term_cap), ref(rd_csource), ref(rd_cevts_sz), ref(should_read_control));
+    thread thrc(&run_cap, zctx, ref(term_cap), ref(rd_csource), ref(rd_cevts_sz));
 
     /* subscriber in a thread */
     thread thr(&run_sub, zctx, ref(term_sub), ref(rd_source), ref(rd_evts), ref(rd_evts_sz));
@@ -283,17 +280,9 @@ TEST(eventd, proxy)
 
     zmq_close(mock_pub);
 
-    /* Do control test */
-
-    should_read_control = true;
-
-    /* capture in a thread */
-    thread thrcc(&run_cap, zctx, ref(term_cap), ref(rd_csource), ref(rd_cevts_sz), ref(should_read_control));
-
     delete pxy;
     pxy = NULL;
 
-    thrcc.join();
     zmq_ctx_term(zctx);
 
     /* Provide time for async proxy removal to complete */

From 433a5280a0d135734dc9a4d341552e2ee3edac10 Mon Sep 17 00:00:00 2001
From: anamehra <54692434+anamehra@users.noreply.github.com>
Date: Thu, 29 Aug 2024 17:17:57 -0700
Subject: [PATCH 0942/1115] Update cisco-8000.ini to 202405.0.3 release
 (#19899)

Signed-off-by: anamehra anamehra@cisco.com

Cisco platform 202405.0.3 release

Why I did it
Cisco platform 202405.0.3 release

Work item tracking
Microsoft ADO (number only):
---
 platform/checkout/cisco-8000.ini | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/platform/checkout/cisco-8000.ini b/platform/checkout/cisco-8000.ini
index c1930b7c3..7d2338648 100644
--- a/platform/checkout/cisco-8000.ini
+++ b/platform/checkout/cisco-8000.ini
@@ -1,3 +1,3 @@
 [module]
 repo=git@github.com:Cisco-8000-sonic/platform-cisco-8000.git
-ref=202405.0.2
+ref=202405.0.3

From 5ac82b5cacf94f0ffdf1023d351a79b90d90e2f6 Mon Sep 17 00:00:00 2001
From: siqbal1986 <shahzad.iqbal@gmail.com>
Date: Thu, 29 Aug 2024 19:14:13 -0700
Subject: [PATCH 0943/1115] [Bug Fix] Route map for BGP profile
 FROM_SDN_APPLIANCE_ROUTES (#19871)

Why I did it
This is a bug fix and this change should go into 202305 brranch and onwards.
Added Route map support for BGP profile FROM_SDN_APPLIANCE_ROUTES
With this change the following route map should be added if the BGP profile is added

route-map FROM_SDN_APPLIANCE_ROUTES_RM permit 100
set as-path prepend <Prepend value of FROM_SDN_SLB_DEPLOYMENT_ID>
set community <community id>
set origin incomplete
Work item tracking
Microsoft ADO (number only):
28896695
How I did it
How to verify it
Added test to verify the rotue map creation.
---
 src/sonic-bgpcfgd/bgpcfgd/managers_rm.py |  4 +-
 src/sonic-bgpcfgd/tests/test_rm.py       | 79 ++++++++++++++++++++++--
 2 files changed, 75 insertions(+), 8 deletions(-)

diff --git a/src/sonic-bgpcfgd/bgpcfgd/managers_rm.py b/src/sonic-bgpcfgd/bgpcfgd/managers_rm.py
index 35a3f864d..2412dc3d9 100644
--- a/src/sonic-bgpcfgd/bgpcfgd/managers_rm.py
+++ b/src/sonic-bgpcfgd/bgpcfgd/managers_rm.py
@@ -2,7 +2,7 @@
 from swsscommon import swsscommon
 from .log import log_err, log_debug
 
-ROUTE_MAPS = ["FROM_SDN_SLB_ROUTES"]
+ROUTE_MAPS = ["FROM_SDN_SLB_ROUTES", "FROM_SDN_APPLIANCE_ROUTES"]
 FROM_SDN_SLB_DEPLOYMENT_ID = '2'
 
 class RouteMapMgr(Manager):
@@ -83,7 +83,7 @@ def __read_asn(self):
 
     def __update_rm(self, rm, data):
         cmds = []
-        if rm == "FROM_SDN_SLB_ROUTES":
+        if rm in ROUTE_MAPS :
             cmds.append("route-map %s permit 100" % ("%s_RM" % rm))
             bgp_asn = self.__read_asn()
             if bgp_asn is None or bgp_asn is '':
diff --git a/src/sonic-bgpcfgd/tests/test_rm.py b/src/sonic-bgpcfgd/tests/test_rm.py
index 867ae1a7a..697e30966 100644
--- a/src/sonic-bgpcfgd/tests/test_rm.py
+++ b/src/sonic-bgpcfgd/tests/test_rm.py
@@ -25,7 +25,7 @@ def constructor():
     mgr = RouteMapMgr(common_objs, "APPL_DB", "BGP_PROFILE_TABLE")
     return mgr
 
-def set_del_test(mgr, op, args, expected_ret, expected_cmds):
+def set_del_test(mgr, op, cfg_args, expected_ret, expected_cmds):
     set_del_test.push_list_called = False
     def push_list(cmds):
         set_del_test.push_list_called = True
@@ -34,10 +34,12 @@ def push_list(cmds):
     mgr.cfg_mgr.push_list = push_list
 
     if op == "SET":
-        ret = mgr.set_handler(*args)
-        assert ret == expected_ret
+        for i in range(0, len(cfg_args)):
+            ret = mgr.set_handler(cfg_args[i][0], cfg_args[i][1])
+            assert ret == expected_ret
     elif op == "DEL":
-        mgr.del_handler(*args)
+        for i in range(0, len(cfg_args)):               
+            mgr.del_handler(cfg_args[i])
     else:
         assert False, "Wrong operation"
 
@@ -51,9 +53,9 @@ def test_set_del():
     set_del_test(
         mgr,
         "SET",
-        ("FROM_SDN_SLB_ROUTES", {
+        [("FROM_SDN_SLB_ROUTES", {
             "community_id": "1234:1234"
-        }),
+        })],
         True,
         [
             ["route-map FROM_SDN_SLB_ROUTES_RM permit 100",
@@ -72,3 +74,68 @@ def test_set_del():
             ["no route-map FROM_SDN_SLB_ROUTES_RM permit 100"]
         ]
     )
+
+def test_set_del_com_sdn_apl():
+    mgr = constructor()
+    set_del_test(
+        mgr,
+        "SET",
+        [("FROM_SDN_APPLIANCE_ROUTES", {
+            "community_id": "1235:1235"
+        })],
+        True,
+        [
+            ["route-map FROM_SDN_APPLIANCE_ROUTES_RM permit 100",
+             " set as-path prepend 12346 12346",
+             " set community 1235:1235",
+             " set origin incomplete"]
+        ]
+    )
+
+    set_del_test(
+        mgr,
+        "DEL",
+        ("FROM_SDN_APPLIANCE_ROUTES",),
+        True,
+        [
+            ["no route-map FROM_SDN_APPLIANCE_ROUTES_RM permit 100"]
+        ]
+    )
+
+def test_set_del_com_sdn_apl_and_slb():
+    mgr = constructor()
+    set_del_test(
+        mgr,
+        "SET",
+        [("FROM_SDN_APPLIANCE_ROUTES", {
+            "community_id": "1235:1235"
+        }),
+        ("FROM_SDN_SLB_ROUTES", {
+            "community_id": "1234:1234"
+        }
+        )],
+        True,
+        [
+            ["route-map FROM_SDN_APPLIANCE_ROUTES_RM permit 100",
+             " set as-path prepend 12346 12346",
+             " set community 1235:1235",
+             " set origin incomplete"],
+           ["route-map FROM_SDN_SLB_ROUTES_RM permit 100",
+             " set as-path prepend 12346 12346",
+             " set community 1234:1234",
+             " set origin incomplete"]
+                   
+        ]
+    )
+
+    set_del_test(
+        mgr,
+        "DEL",
+        ("FROM_SDN_APPLIANCE_ROUTES", "FROM_SDN_SLB_ROUTES",),
+        True,
+        [
+            ["no route-map FROM_SDN_APPLIANCE_ROUTES_RM permit 100"],
+            ["no route-map FROM_SDN_SLB_ROUTES_RM permit 100"]
+        ] 
+    )
+

From 8ea34e2512baeed10db908515a9ab14c082bfa2a Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Fri, 30 Aug 2024 16:01:42 +0800
Subject: [PATCH 0944/1115] [submodule] Update submodule sonic-host-services to
 the latest HEAD automatically (#20022)

#### Why I did it
src/sonic-host-services
```
* e21db16 - (HEAD -> master, origin/master, origin/HEAD) [BFD]Fix BFD blackout issue (#150) (26 hours ago) [Sudharsan Dhamal Gopalarathnam]
* 39834f2 - Password Hardening: Add support to disable expiration date (#93) (4 days ago) [davidpil2002]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-host-services | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-host-services b/src/sonic-host-services
index 39e31a95b..e21db16de 160000
--- a/src/sonic-host-services
+++ b/src/sonic-host-services
@@ -1 +1 @@
-Subproject commit 39e31a95ba96d601bae90c54556a27f84691c910
+Subproject commit e21db16de7e095a15874a64d12afb8e770325434

From 962672e49f14555c8acd0cd29c9342ca119b0b9c Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Fri, 30 Aug 2024 19:01:20 +0800
Subject: [PATCH 0945/1115] [submodule] Update submodule sonic-platform-common
 to the latest HEAD automatically (#20027)

#### Why I did it
src/sonic-platform-common
```
* a61bc23 - (HEAD -> master, origin/master, origin/HEAD) Use latest natsort package (#492) (3 days ago) [Vivek]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-platform-common | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-platform-common b/src/sonic-platform-common
index e55eebf00..a61bc23d3 160000
--- a/src/sonic-platform-common
+++ b/src/sonic-platform-common
@@ -1 +1 @@
-Subproject commit e55eebf00382642db43026bf39594da7b158dad2
+Subproject commit a61bc23d3bfa70ef21aaf988d790ad54ce726244

From cd27349b47f1678ff878a92c68cb209496419765 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Fri, 30 Aug 2024 22:01:12 +0800
Subject: [PATCH 0946/1115] [submodule] Update submodule sonic-swss-common to
 the latest HEAD automatically (#20084)

#### Why I did it
src/sonic-swss-common
```
* 636f565 - (HEAD -> master, origin/master, origin/HEAD) Account for control character as part of zmq_read_part (#906) (11 hours ago) [Zain Budhwani]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-swss-common | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-swss-common b/src/sonic-swss-common
index aba0f66df..636f56502 160000
--- a/src/sonic-swss-common
+++ b/src/sonic-swss-common
@@ -1 +1 @@
-Subproject commit aba0f66dfe1c77c6256cd6be6d2edeefa611efa4
+Subproject commit 636f565025d5b4b235791c71e8c9ca25ce289f47

From cd576f839bddb0778226dd14c104c24b775d6d53 Mon Sep 17 00:00:00 2001
From: wenyiz2021 <91497961+wenyiz2021@users.noreply.github.com>
Date: Fri, 30 Aug 2024 14:55:00 -0700
Subject: [PATCH 0947/1115] [master] DNX SAI update to 11.2.7.1 (#20079)

Fix #19592

Microsoft ADO (number only): 29261835

Verified on Arista linecard

admin@str2-7804-lc3-1:~$ bcmcmd bsv
bsv
BRCM SAI ver: [11.2.7.1], OCP SAI ver: [1.14.0], SDK ver: [sdk-6.5.30-SP4]
---
 platform/broadcom/sai-modules.mk | 2 +-
 platform/broadcom/sai.mk         | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/platform/broadcom/sai-modules.mk b/platform/broadcom/sai-modules.mk
index b0fdecfa5..ffcdacbac 100644
--- a/platform/broadcom/sai-modules.mk
+++ b/platform/broadcom/sai-modules.mk
@@ -10,7 +10,7 @@ $(BRCM_OPENNSL_KERNEL)_MACHINE = broadcom
 SONIC_DPKG_DEBS += $(BRCM_OPENNSL_KERNEL)
 
 # SAI bcm modules for DNX family ASIC
-BRCM_DNX_OPENNSL_KERNEL_VERSION = 11.2.4.1
+BRCM_DNX_OPENNSL_KERNEL_VERSION = 11.2.7.1
 
 BRCM_DNX_OPENNSL_KERNEL = opennsl-modules-dnx_$(BRCM_DNX_OPENNSL_KERNEL_VERSION)_amd64.deb
 $(BRCM_DNX_OPENNSL_KERNEL)_SRC_PATH = $(PLATFORM_PATH)/saibcm-modules-dnx
diff --git a/platform/broadcom/sai.mk b/platform/broadcom/sai.mk
index 0ab4bc618..be25ea194 100644
--- a/platform/broadcom/sai.mk
+++ b/platform/broadcom/sai.mk
@@ -1,5 +1,5 @@
 LIBSAIBCM_XGS_VERSION = 10.1.38.0
-LIBSAIBCM_DNX_VERSION = 11.2.4.1
+LIBSAIBCM_DNX_VERSION = 11.2.7.1
 LIBSAIBCM_XGS_BRANCH_NAME = SAI_10.1.0_GA
 LIBSAIBCM_DNX_BRANCH_NAME = SAI_11.2.0_GA
 LIBSAIBCM_XGS_URL_PREFIX = "https://sonicstorage.blob.core.windows.net/public/sai/sai-broadcom/$(LIBSAIBCM_XGS_BRANCH_NAME)/$(LIBSAIBCM_XGS_VERSION)/xgs"

From 8c66a7e226514f9b598242417f4375f204022cbf Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sat, 31 Aug 2024 07:01:14 +0800
Subject: [PATCH 0948/1115] [submodule] Update submodule sonic-dash-api to the
 latest HEAD automatically (#20083)

#### Why I did it
src/sonic-dash-api
```
* 4919d9e - (HEAD -> master, origin/master, origin/HEAD) Allow `underlay_sip` to coexist with `vnet` in Route table (#27) (4 hours ago) [Lawrence Lee]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-dash-api | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-dash-api b/src/sonic-dash-api
index 39e4a6319..4919d9e6f 160000
--- a/src/sonic-dash-api
+++ b/src/sonic-dash-api
@@ -1 +1 @@
-Subproject commit 39e4a63195423a18789a209bbec0cb8531215d3a
+Subproject commit 4919d9e6f6d2c1b8ecc1941a58c71dd74f21776f

From 219da22be0426f07e182b1e3dc5f03db698dacbd Mon Sep 17 00:00:00 2001
From: Saikrishna Arcot <sarcot@microsoft.com>
Date: Fri, 30 Aug 2024 18:04:26 -0700
Subject: [PATCH 0949/1115] [debian]: Update to Linux 6.1.94 (#19564)

* Update to Linux 6.1.94
* Integrate HW-MGMT 7.0040.1008 Changes (#17)
* Update DNX kernel module build
* Update kernel and saibcm-modules-dnx to versions on branch

Signed-off-by: Saikrishna Arcot <sarcot@microsoft.com>
Co-authored-by: Vivek <vivekreddykarri98@gmail.com>
---
 build_debian.sh                               |  2 +-
 files/dsc/install_debian.j2                   |  4 +--
 installer/default_platform.conf               |  4 +--
 platform/barefoot/bfn-modules/debian/control  |  2 +-
 .../debian/control                            |  2 +-
 .../debian/control                            |  4 +--
 .../sonic-platform-modules-bfn/debian/control |  2 +-
 .../debian/control                            |  2 +-
 platform/broadcom/saibcm-modules-dnx          |  2 +-
 .../broadcom/saibcm-modules/debian/control    |  2 +-
 .../debian/opennsl-modules.dirs               |  2 +-
 .../debian/opennsl-modules.install            | 14 +++++-----
 platform/broadcom/saibcm-modules/debian/rules |  4 +--
 .../debian/control                            |  8 +++---
 .../sonic-platform-modules-cel/debian/control | 10 +++----
 .../debian/control                            | 28 +++++++++----------
 .../debian/control                            |  8 +++---
 .../sonic-platform-modules-fs/debian/control  |  2 +-
 platform/centec-arm64/sonic_fit.its           |  4 +--
 .../centec-arm64/tsingma-bsp/debian/control   |  2 +-
 .../tsingma-bsp/debian/tsingma-bsp.install    | 28 +++++++++----------
 .../debian/control                            |  4 +--
 .../debian/control                            |  2 +-
 .../debian/control                            |  6 ++--
 platform/marvell/platform_arm64.conf          |  2 +-
 platform/marvell/platform_armhf.conf          |  4 +--
 .../7215-a1/scripts/nokia-7215-init.sh        |  4 +--
 platform/marvell/sonic_fit.its                | 16 +++++------
 platform/mellanox/hw-management.mk            |  2 +-
 platform/mellanox/hw-management/hw-mgmt       |  2 +-
 .../external-changes.patch                    |  3 +-
 platform/pensando/dsc-drivers/debian/control  |  2 +-
 .../dsc-drivers/debian/ionic-modules.install  |  6 ++--
 platform/pensando/platform.conf               |  4 +--
 rules/linux-kernel.mk                         |  6 ++--
 src/sonic-linux-kernel                        |  2 +-
 36 files changed, 101 insertions(+), 100 deletions(-)

diff --git a/build_debian.sh b/build_debian.sh
index 3763e5e25..8c767d619 100755
--- a/build_debian.sh
+++ b/build_debian.sh
@@ -33,7 +33,7 @@ CONFIGURED_ARCH=$([ -f .arch ] && cat .arch || echo amd64)
 ## docker engine version (with platform)
 DOCKER_VERSION=5:24.0.2-1~debian.12~$IMAGE_DISTRO
 CONTAINERD_IO_VERSION=1.6.21-1
-LINUX_KERNEL_VERSION=6.1.0-11-2
+LINUX_KERNEL_VERSION=6.1.0-22-2
 
 ## Working directory to prepare the file system
 FILESYSTEM_ROOT=./fsroot
diff --git a/files/dsc/install_debian.j2 b/files/dsc/install_debian.j2
index 4cb6d2463..def175249 100755
--- a/files/dsc/install_debian.j2
+++ b/files/dsc/install_debian.j2
@@ -244,8 +244,8 @@ cat <<EOF >> $root_mnt/$BL_CONF
 default main
 
 label main
-    kernel /$image_dir/boot/vmlinuz-6.1.0-11-2-arm64
-    initrd /$image_dir/boot/initrd.img-6.1.0-11-2-arm64
+    kernel /$image_dir/boot/vmlinuz-6.1.0-22-2-arm64
+    initrd /$image_dir/boot/initrd.img-6.1.0-22-2-arm64
     devicetree /$image_dir/boot/elba-asic-psci.dtb
     append softdog.soft_panic=1 FW_NAME=mainfwa root=/dev/mmcblk0p10 rw rootwait rootfstype=ext4 loopfstype=squashfs loop=/$image_dir/fs.squashfs
 }
diff --git a/installer/default_platform.conf b/installer/default_platform.conf
index 85882f001..85aeddb0e 100755
--- a/installer/default_platform.conf
+++ b/installer/default_platform.conf
@@ -588,13 +588,13 @@ menuentry '$demo_grub_entry' {
         if [ x$grub_platform = xxen ]; then insmod xzio; insmod lzopio; fi
         insmod part_msdos
         insmod ext2
-        $GRUB_CFG_LINUX_CMD   /$image_dir/boot/vmlinuz-6.1.0-11-2-${arch} root=$grub_cfg_root rw $GRUB_CMDLINE_LINUX  \
+        $GRUB_CFG_LINUX_CMD   /$image_dir/boot/vmlinuz-6.1.0-22-2-${arch} root=$grub_cfg_root rw $GRUB_CMDLINE_LINUX  \
                 net.ifnames=0 biosdevname=0 \
                 loop=$image_dir/$FILESYSTEM_SQUASHFS loopfstype=squashfs                       \
                 systemd.unified_cgroup_hierarchy=0 \
                 apparmor=1 security=apparmor varlog_size=$VAR_LOG_SIZE usbcore.autosuspend=-1 $ONIE_PLATFORM_EXTRA_CMDLINE_LINUX
         echo    'Loading $demo_volume_label $demo_type initial ramdisk ...'
-        $GRUB_CFG_INITRD_CMD  /$image_dir/boot/initrd.img-6.1.0-11-2-${arch}
+        $GRUB_CFG_INITRD_CMD  /$image_dir/boot/initrd.img-6.1.0-22-2-${arch}
 }
 EOF
 
diff --git a/platform/barefoot/bfn-modules/debian/control b/platform/barefoot/bfn-modules/debian/control
index c6fd3ef47..1d7a74bde 100644
--- a/platform/barefoot/bfn-modules/debian/control
+++ b/platform/barefoot/bfn-modules/debian/control
@@ -7,6 +7,6 @@ Standards-Version: 3.9.3
 
 Package: bfn-modules
 Architecture: amd64
-Depends: linux-image-6.1.0-11-2-amd64-unsigned
+Depends: linux-image-6.1.0-22-2-amd64-unsigned
 Description: kernel modules for bfn asic for mmap
 
diff --git a/platform/barefoot/sonic-platform-modules-bfn-montara/debian/control b/platform/barefoot/sonic-platform-modules-bfn-montara/debian/control
index 9aaded6c6..eff91a7fa 100644
--- a/platform/barefoot/sonic-platform-modules-bfn-montara/debian/control
+++ b/platform/barefoot/sonic-platform-modules-bfn-montara/debian/control
@@ -7,6 +7,6 @@ Standards-Version: 3.9.3
 
 Package: sonic-platform-modules-bfn-montara
 Architecture: amd64
-Depends: linux-image-6.1.0-11-2-amd64-unsigned
+Depends: linux-image-6.1.0-22-2-amd64-unsigned
 Description: kernel modules for platform devices such as fan, led, sfp
 
diff --git a/platform/barefoot/sonic-platform-modules-bfn-newport/debian/control b/platform/barefoot/sonic-platform-modules-bfn-newport/debian/control
index 538667450..0bcc98273 100644
--- a/platform/barefoot/sonic-platform-modules-bfn-newport/debian/control
+++ b/platform/barefoot/sonic-platform-modules-bfn-newport/debian/control
@@ -7,11 +7,11 @@ Standards-Version: 3.9.3
 
 Package: sonic-platform-modules-bfn-newport-as9516
 Architecture: amd64
-Depends: linux-image-6.1.0-11-2-amd64-unsigned
+Depends: linux-image-6.1.0-22-2-amd64-unsigned
 Description: kernel module for bfn platform fpga and scripts for the devices such as fan, led, sfp
 
 Package: sonic-platform-modules-bfn-newport-as9516bf
 Architecture: amd64
-Depends: linux-image-6.1.0-11-2-amd64-unsigned
+Depends: linux-image-6.1.0-22-2-amd64-unsigned
 Description: kernel module for bfn platform fpga and scripts for the devices such as fan, led, sfp
 
diff --git a/platform/barefoot/sonic-platform-modules-bfn/debian/control b/platform/barefoot/sonic-platform-modules-bfn/debian/control
index 923b096d4..78a556eea 100644
--- a/platform/barefoot/sonic-platform-modules-bfn/debian/control
+++ b/platform/barefoot/sonic-platform-modules-bfn/debian/control
@@ -7,6 +7,6 @@ Standards-Version: 3.9.3
 
 Package: sonic-platform-modules-bfn
 Architecture: amd64
-Depends: linux-image-6.1.0-11-2-amd64-unsigned
+Depends: linux-image-6.1.0-22-2-amd64-unsigned
 Description: kernel modules for platform devices such as fan, led, sfp
 
diff --git a/platform/barefoot/sonic-platform-modules-wnc-osw1800/debian/control b/platform/barefoot/sonic-platform-modules-wnc-osw1800/debian/control
index 415d82c5c..7e60b796c 100644
--- a/platform/barefoot/sonic-platform-modules-wnc-osw1800/debian/control
+++ b/platform/barefoot/sonic-platform-modules-wnc-osw1800/debian/control
@@ -7,6 +7,6 @@ Standards-Version: 3.9.3
 
 Package: platform-modules-wnc-osw1800
 Architecture: amd64
-Depends: linux-image-6.1.0-11-2-amd64-unsigned
+Depends: linux-image-6.1.0-22-2-amd64-unsigned
 Description: kernel modules for platform devices such as fan, led, sfp
 
diff --git a/platform/broadcom/saibcm-modules-dnx b/platform/broadcom/saibcm-modules-dnx
index 6d2b735f5..3a1e939bc 160000
--- a/platform/broadcom/saibcm-modules-dnx
+++ b/platform/broadcom/saibcm-modules-dnx
@@ -1 +1 @@
-Subproject commit 6d2b735f5c6b66867e01b423f3343ca4119c83b2
+Subproject commit 3a1e939bc2b7169953ebd89f2494341a34ed78f7
diff --git a/platform/broadcom/saibcm-modules/debian/control b/platform/broadcom/saibcm-modules/debian/control
index ccef115a3..09648fd9a 100644
--- a/platform/broadcom/saibcm-modules/debian/control
+++ b/platform/broadcom/saibcm-modules/debian/control
@@ -10,5 +10,5 @@ Standards-Version: 3.9.3
 Package: opennsl-modules
 Architecture: amd64
 Section: main
-Depends: linux-image-6.1.0-11-2-amd64-unsigned
+Depends: linux-image-6.1.0-22-2-amd64-unsigned
 Description: kernel modules for broadcom SAI
diff --git a/platform/broadcom/saibcm-modules/debian/opennsl-modules.dirs b/platform/broadcom/saibcm-modules/debian/opennsl-modules.dirs
index 58fb6cdd4..1fc81d870 100644
--- a/platform/broadcom/saibcm-modules/debian/opennsl-modules.dirs
+++ b/platform/broadcom/saibcm-modules/debian/opennsl-modules.dirs
@@ -1 +1 @@
-lib/modules/6.1.0-11-2-amd64/extra
+lib/modules/6.1.0-22-2-amd64/extra
diff --git a/platform/broadcom/saibcm-modules/debian/opennsl-modules.install b/platform/broadcom/saibcm-modules/debian/opennsl-modules.install
index b43f23360..999195fda 100644
--- a/platform/broadcom/saibcm-modules/debian/opennsl-modules.install
+++ b/platform/broadcom/saibcm-modules/debian/opennsl-modules.install
@@ -1,8 +1,8 @@
-systems/linux/user/x86-smp_generic_64-2_6/linux-bcm-knet.ko lib/modules/6.1.0-11-2-amd64/extra
-systems/linux/user/x86-smp_generic_64-2_6/linux-kernel-bde.ko lib/modules/6.1.0-11-2-amd64/extra
-systems/linux/user/x86-smp_generic_64-2_6/linux-user-bde.ko lib/modules/6.1.0-11-2-amd64/extra
-systems/linux/user/x86-smp_generic_64-2_6/linux-knet-cb.ko lib/modules/6.1.0-11-2-amd64/extra
+systems/linux/user/x86-smp_generic_64-2_6/linux-bcm-knet.ko lib/modules/6.1.0-22-2-amd64/extra
+systems/linux/user/x86-smp_generic_64-2_6/linux-kernel-bde.ko lib/modules/6.1.0-22-2-amd64/extra
+systems/linux/user/x86-smp_generic_64-2_6/linux-user-bde.ko lib/modules/6.1.0-22-2-amd64/extra
+systems/linux/user/x86-smp_generic_64-2_6/linux-knet-cb.ko lib/modules/6.1.0-22-2-amd64/extra
 systemd/opennsl-modules.service lib/systemd/system
-sdklt/build/bde/linux_ngbde.ko lib/modules/6.1.0-11-2-amd64/extra
-sdklt/build/knet/linux_ngknet.ko lib/modules/6.1.0-11-2-amd64/extra
-sdklt/build/knetcb/linux_ngknetcb.ko lib/modules/6.1.0-11-2-amd64/extra
+sdklt/build/bde/linux_ngbde.ko lib/modules/6.1.0-22-2-amd64/extra
+sdklt/build/knet/linux_ngknet.ko lib/modules/6.1.0-22-2-amd64/extra
+sdklt/build/knetcb/linux_ngknetcb.ko lib/modules/6.1.0-22-2-amd64/extra
diff --git a/platform/broadcom/saibcm-modules/debian/rules b/platform/broadcom/saibcm-modules/debian/rules
index 052dcdca9..2c81ab6d0 100755
--- a/platform/broadcom/saibcm-modules/debian/rules
+++ b/platform/broadcom/saibcm-modules/debian/rules
@@ -34,8 +34,8 @@ sname:=opennsl
 PACKAGE=opennsl-modules
 # modifieable for experiments or debugging m-a
 MA_DIR ?= /usr/share/modass
-KVERSION ?= 6.1.0-11-2-amd64
-KERNVERSION ?= 6.1.0-11-2
+KVERSION ?= 6.1.0-22-2-amd64
+KERNVERSION ?= 6.1.0-22-2
 
 # load generic variable handling
 -include $(MA_DIR)/include/generic.make
diff --git a/platform/broadcom/sonic-platform-modules-alphanetworks/debian/control b/platform/broadcom/sonic-platform-modules-alphanetworks/debian/control
index c02a84f9f..5ead58f70 100644
--- a/platform/broadcom/sonic-platform-modules-alphanetworks/debian/control
+++ b/platform/broadcom/sonic-platform-modules-alphanetworks/debian/control
@@ -7,20 +7,20 @@ Standards-Version: 3.9.3
 
 Package: sonic-platform-alphanetworks-snh60a0-320fv2
 Architecture: amd64
-Depends: linux-image-6.1.0-11-2-amd64-unsigned
+Depends: linux-image-6.1.0-22-2-amd64-unsigned
 Description: kernel modules for platform devices such as fan, led, sfp
 
 Package: sonic-platform-alphanetworks-snh60b0-640f
 Architecture: amd64
-Depends: linux-image-6.1.0-11-2-amd64-unsigned
+Depends: linux-image-6.1.0-22-2-amd64-unsigned
 Description: kernel modules for platform devices such as fan, led, sfp
 
 Package: sonic-platform-alphanetworks-snj60d0-320f
 Architecture: amd64
-Depends: linux-image-6.1.0-11-2-amd64-unsigned
+Depends: linux-image-6.1.0-22-2-amd64-unsigned
 Description: kernel modules for platform devices such as fan, led, sfp
 
 Package: sonic-platform-alphanetworks-bes2348t
 Architecture: amd64
-Depends: linux-image-6.1.0-11-2-amd64-unsigned
+Depends: linux-image-6.1.0-22-2-amd64-unsigned
 Description: kernel modules for platform devices such as fan, led, sfp
diff --git a/platform/broadcom/sonic-platform-modules-cel/debian/control b/platform/broadcom/sonic-platform-modules-cel/debian/control
index 0dd6eb76e..f2b3b4ee3 100644
--- a/platform/broadcom/sonic-platform-modules-cel/debian/control
+++ b/platform/broadcom/sonic-platform-modules-cel/debian/control
@@ -7,26 +7,26 @@ Standards-Version: 3.9.3
 
 Package: platform-modules-dx010
 Architecture: amd64
-Depends: linux-image-6.1.0-11-2-amd64-unsigned
+Depends: linux-image-6.1.0-22-2-amd64-unsigned
 Description: kernel modules for platform devices such as fan, led, sfp
 
 
 Package: platform-modules-haliburton
 Architecture: amd64
-Depends: linux-image-6.1.0-11-2-amd64-unsigned
+Depends: linux-image-6.1.0-22-2-amd64-unsigned
 Description: kernel modules for platform devices such as fan, led, sfp
 
 Package: platform-modules-seastone2
 Architecture: amd64
-Depends: linux-image-6.1.0-11-2-amd64-unsigned
+Depends: linux-image-6.1.0-22-2-amd64-unsigned
 Description: kernel modules for platform devices such as led, sfp
 
 Package: platform-modules-silverstone
 Architecture: amd64
-Depends: linux-image-6.1.0-11-2-amd64-unsigned
+Depends: linux-image-6.1.0-22-2-amd64-unsigned
 Description: kernel modules for platform devices such as led, sfp.
 
 Package: platform-modules-belgite
 Architecture: amd64
-Depends: linux-image-6.1.0-11-2-amd64-unsigned
+Depends: linux-image-6.1.0-22-2-amd64-unsigned
 Description: kernel modules for platform devices such as led, sfp
diff --git a/platform/broadcom/sonic-platform-modules-dell/debian/control b/platform/broadcom/sonic-platform-modules-dell/debian/control
index ad88ade68..d9ae20c99 100644
--- a/platform/broadcom/sonic-platform-modules-dell/debian/control
+++ b/platform/broadcom/sonic-platform-modules-dell/debian/control
@@ -7,70 +7,70 @@ Standards-Version: 3.9.3
 
 Package: platform-modules-s6000
 Architecture: amd64
-Depends: linux-image-6.1.0-11-2-amd64-unsigned
+Depends: linux-image-6.1.0-22-2-amd64-unsigned
 Description: kernel modules for platform devices such as fan, led, sfp
 
 Package: platform-modules-z9100
 Architecture: amd64
-Depends: linux-image-6.1.0-11-2-amd64-unsigned
+Depends: linux-image-6.1.0-22-2-amd64-unsigned
 Description: kernel modules for platform devices such as fan, led, sfp
 
 Package: platform-modules-s6100
 Architecture: amd64
-Depends: linux-image-6.1.0-11-2-amd64-unsigned
+Depends: linux-image-6.1.0-22-2-amd64-unsigned
 Description: kernel modules for platform devices such as fan, led, sfp
 
 Package: platform-modules-z9264f
 Architecture: amd64
-Depends: linux-image-6.1.0-11-2-amd64-unsigned
+Depends: linux-image-6.1.0-22-2-amd64-unsigned
 Description: kernel modules for platform devices such as fan, led, sfp
 
 Package: platform-modules-s5212f
 Architecture: amd64
-Depends: linux-image-6.1.0-11-2-amd64-unsigned
+Depends: linux-image-6.1.0-22-2-amd64-unsigned
 Description: kernel modules for platform devices such as fan, led, sfp
 
 Package: platform-modules-s5224f
 Architecture: amd64
-Depends: linux-image-6.1.0-11-2-amd64-unsigned
+Depends: linux-image-6.1.0-22-2-amd64-unsigned
 Description: kernel modules for platform devices such as fan, led, sfp
 
 Package: platform-modules-s5232f
 Architecture: amd64
-Depends: linux-image-6.1.0-11-2-amd64-unsigned
+Depends: linux-image-6.1.0-22-2-amd64-unsigned
 Description: kernel modules for platform devices such as fan, led, sfp
 
 Package: platform-modules-s5248f
 Architecture: amd64
-Depends: linux-image-6.1.0-11-2-amd64-unsigned
+Depends: linux-image-6.1.0-22-2-amd64-unsigned
 Description: kernel modules for platform devices such as fan, led, sfp
 
 Package: platform-modules-n3248te
 Architecture: amd64
-Depends: linux-image-6.1.0-11-2-amd64-unsigned
+Depends: linux-image-6.1.0-22-2-amd64-unsigned
 Description: kernel modules for platform devices such as fan, led, sfp
 
 Package: platform-modules-z9332f
 Architecture: amd64
-Depends: linux-image-6.1.0-11-2-amd64-unsigned
+Depends: linux-image-6.1.0-22-2-amd64-unsigned
 Description: kernel modules for platform devices such as fan, led, sfp
 
 Package: platform-modules-z9432f
 Architecture: amd64
-Depends: linux-image-6.1.0-11-2-amd64-unsigned
+Depends: linux-image-6.1.0-22-2-amd64-unsigned
 Description: kernel modules for platform devices such as fan, led, sfp
 
 Package: platform-modules-n3248pxe
 Architecture: amd64
-Depends: linux-image-6.1.0-11-2-amd64-unsigned
+Depends: linux-image-6.1.0-22-2-amd64-unsigned
 Description: kernel modules for platform devices such as fan, led, sfp
 
 Package: platform-modules-e3224f
 Architecture: amd64
-Depends: linux-image-6.1.0-11-2-amd64-unsigned
+Depends: linux-image-6.1.0-22-2-amd64-unsigned
 Description: kernel modules for platform devices such as fan, led, sfp
 
 Package: platform-modules-s5296f
 Architecture: amd64
-Depends: linux-image-6.1.0-11-2-amd64-unsigned
+Depends: linux-image-6.1.0-22-2-amd64-unsigned
 Description: kernel modules for platform devices such as fan, led, sfp
diff --git a/platform/centec-arm64/sonic-platform-modules-e530/debian/control b/platform/centec-arm64/sonic-platform-modules-e530/debian/control
index 595673e04..0c5f0da49 100644
--- a/platform/centec-arm64/sonic-platform-modules-e530/debian/control
+++ b/platform/centec-arm64/sonic-platform-modules-e530/debian/control
@@ -7,20 +7,20 @@ Standards-Version: 3.9.3
 
 Package: platform-modules-e530-48t4x-p
 Architecture: arm64
-Depends: linux-image-6.1.0-11-2-arm64-unsigned
+Depends: linux-image-6.1.0-22-2-arm64-unsigned
 Description: kernel modules for platform devices such as fan, led, sfp
 
 Package: platform-modules-e530-24x2c
 Architecture: arm64
-Depends: linux-image-6.1.0-11-2-arm64-unsigned
+Depends: linux-image-6.1.0-22-2-arm64-unsigned
 Description: kernel modules for platform devices such as fan, led, sfp
 
 Package: platform-modules-e530-48s4x
 Architecture: arm64
-Depends: linux-image-6.1.0-11-2-arm64-unsigned
+Depends: linux-image-6.1.0-22-2-arm64-unsigned
 Description: kernel modules for platform devices such as fan, led, sfp
 
 Package: platform-modules-e530-24x2q
 Architecture: arm64
-Depends: linux-image-6.1.0-11-2-arm64-unsigned
+Depends: linux-image-6.1.0-22-2-arm64-unsigned
 Description: kernel modules for platform devices such as fan, led, sfp
diff --git a/platform/centec-arm64/sonic-platform-modules-fs/debian/control b/platform/centec-arm64/sonic-platform-modules-fs/debian/control
index bf84935d4..c691b0b58 100755
--- a/platform/centec-arm64/sonic-platform-modules-fs/debian/control
+++ b/platform/centec-arm64/sonic-platform-modules-fs/debian/control
@@ -7,5 +7,5 @@ Standards-Version: 3.9.3
 
 Package: platform-modules-s5800-48t4s
 Architecture: arm64
-Depends: linux-image-6.1.0-11-2-arm64-unsigned
+Depends: linux-image-6.1.0-22-2-arm64-unsigned
 Description: kernel modules for platform devices such as fan, led, sfp
diff --git a/platform/centec-arm64/sonic_fit.its b/platform/centec-arm64/sonic_fit.its
index d7158e242..53b8dba4e 100644
--- a/platform/centec-arm64/sonic_fit.its
+++ b/platform/centec-arm64/sonic_fit.its
@@ -12,7 +12,7 @@
 	images {
 		kernel_ctc {
 			description = "ARM64 Kernel";			
-			data = /incbin/("./vmlinuz-6.1.0-11-2-arm64");
+			data = /incbin/("./vmlinuz-6.1.0-22-2-arm64");
 			type = "kernel";			
 			arch = "arm64";			
 			os = "linux";			
@@ -25,7 +25,7 @@
 		};
 		initramfs {
 			description = "initramfs";
-			data = /incbin/("./initrd.img-6.1.0-11-2-arm64");
+			data = /incbin/("./initrd.img-6.1.0-22-2-arm64");
 			type = "ramdisk";
 			arch = "arm64";
 			os = "linux";
diff --git a/platform/centec-arm64/tsingma-bsp/debian/control b/platform/centec-arm64/tsingma-bsp/debian/control
index de5eab663..c439be832 100644
--- a/platform/centec-arm64/tsingma-bsp/debian/control
+++ b/platform/centec-arm64/tsingma-bsp/debian/control
@@ -7,5 +7,5 @@ Standards-Version: 3.9.3
 
 Package: tsingma-bsp
 Architecture: arm64
-Depends: linux-image-6.1.0-11-2-arm64-unsigned
+Depends: linux-image-6.1.0-22-2-arm64-unsigned
 Description: kernel modules for tsingma bsp
diff --git a/platform/centec-arm64/tsingma-bsp/debian/tsingma-bsp.install b/platform/centec-arm64/tsingma-bsp/debian/tsingma-bsp.install
index 30757f33e..b27752503 100644
--- a/platform/centec-arm64/tsingma-bsp/debian/tsingma-bsp.install
+++ b/platform/centec-arm64/tsingma-bsp/debian/tsingma-bsp.install
@@ -1,17 +1,17 @@
-src/ctc5236-mc/ctc5236-mc.ko /lib/modules/6.1.0-11-2-arm64/kernel/extra
-src/pwm-ctc/pwm-ctc.ko /lib/modules/6.1.0-11-2-arm64/kernel/extra
-src/ctc5236_switch/ctc5236_switch.ko /lib/modules/6.1.0-11-2-arm64/kernel/extra
-src/pinctrl-ctc/pinctrl-ctc.ko /lib/modules/6.1.0-11-2-arm64/kernel/extra
-src/ctc_wdt/ctc_wdt.ko /lib/modules/6.1.0-11-2-arm64/kernel/extra
-src/ctcmac/ctcmac.ko /lib/modules/6.1.0-11-2-arm64/kernel/extra
-src/ctcmac/ctc5236_mdio.ko /lib/modules/6.1.0-11-2-arm64/kernel/extra
-src/ctc-phy/mars.ko /lib/modules/6.1.0-11-2-arm64/kernel/extra
-src/i2c-ctc/i2c-ctc.ko /lib/modules/6.1.0-11-2-arm64/kernel/extra
-src/gpio-ctc/gpio-ctc.ko /lib/modules/6.1.0-11-2-arm64/kernel/extra
-src/ehci-ctc/ehci-ctc.ko /lib/modules/6.1.0-11-2-arm64/kernel/extra
-src/rtc-sd2405/rtc-sd2405.ko /lib/modules/6.1.0-11-2-arm64/kernel/extra
-src/sdhci-ctc5236/sdhci-ctc5236.ko /lib/modules/6.1.0-11-2-arm64/kernel/extra
-src/spi-ctc-qspi/spi-ctc-qspi.ko /lib/modules/6.1.0-11-2-arm64/kernel/extra
+src/ctc5236-mc/ctc5236-mc.ko /lib/modules/6.1.0-22-2-arm64/kernel/extra
+src/pwm-ctc/pwm-ctc.ko /lib/modules/6.1.0-22-2-arm64/kernel/extra
+src/ctc5236_switch/ctc5236_switch.ko /lib/modules/6.1.0-22-2-arm64/kernel/extra
+src/pinctrl-ctc/pinctrl-ctc.ko /lib/modules/6.1.0-22-2-arm64/kernel/extra
+src/ctc_wdt/ctc_wdt.ko /lib/modules/6.1.0-22-2-arm64/kernel/extra
+src/ctcmac/ctcmac.ko /lib/modules/6.1.0-22-2-arm64/kernel/extra
+src/ctcmac/ctc5236_mdio.ko /lib/modules/6.1.0-22-2-arm64/kernel/extra
+src/ctc-phy/mars.ko /lib/modules/6.1.0-22-2-arm64/kernel/extra
+src/i2c-ctc/i2c-ctc.ko /lib/modules/6.1.0-22-2-arm64/kernel/extra
+src/gpio-ctc/gpio-ctc.ko /lib/modules/6.1.0-22-2-arm64/kernel/extra
+src/ehci-ctc/ehci-ctc.ko /lib/modules/6.1.0-22-2-arm64/kernel/extra
+src/rtc-sd2405/rtc-sd2405.ko /lib/modules/6.1.0-22-2-arm64/kernel/extra
+src/sdhci-ctc5236/sdhci-ctc5236.ko /lib/modules/6.1.0-22-2-arm64/kernel/extra
+src/spi-ctc-qspi/spi-ctc-qspi.ko /lib/modules/6.1.0-22-2-arm64/kernel/extra
 src/ctc-dts/e530-ctc5236.dtb /boot/
 src/m2-w6010-48gt4x/m2-w6010-48gt4x-r0.dtb /boot/
 src/config/fw_env.config /etc/
diff --git a/platform/centec/sonic-platform-modules-e582/debian/control b/platform/centec/sonic-platform-modules-e582/debian/control
index bf1f71f24..529aac43d 100644
--- a/platform/centec/sonic-platform-modules-e582/debian/control
+++ b/platform/centec/sonic-platform-modules-e582/debian/control
@@ -7,11 +7,11 @@ Standards-Version: 3.9.3
 
 Package: platform-modules-e582-48x2q4z
 Architecture: amd64
-Depends: linux-image-6.1.0-11-2-amd64-unsigned
+Depends: linux-image-6.1.0-22-2-amd64-unsigned
 Description: kernel modules for platform devices such as fan, led, sfp
 
 Package: platform-modules-e582-48x6q
 Architecture: amd64
-Depends: linux-image-6.1.0-11-2-amd64-unsigned
+Depends: linux-image-6.1.0-22-2-amd64-unsigned
 Description: kernel modules for platform devices such as fan, led, sfp
 
diff --git a/platform/centec/sonic-platform-modules-embedway/debian/control b/platform/centec/sonic-platform-modules-embedway/debian/control
index 0b4837e02..c01f8f2c6 100644
--- a/platform/centec/sonic-platform-modules-embedway/debian/control
+++ b/platform/centec/sonic-platform-modules-embedway/debian/control
@@ -7,6 +7,6 @@ Standards-Version: 3.9.3
 
 Package: platform-modules-embedway-es6220
 Architecture: amd64
-Depends: linux-image-6.1.0-11-2-amd64-unsigned
+Depends: linux-image-6.1.0-22-2-amd64-unsigned
 Description: kernel modules for platform devices such as fan, led, sfp
 
diff --git a/platform/centec/sonic-platform-modules-v682/debian/control b/platform/centec/sonic-platform-modules-v682/debian/control
index 5f03f2778..b775827ab 100644
--- a/platform/centec/sonic-platform-modules-v682/debian/control
+++ b/platform/centec/sonic-platform-modules-v682/debian/control
@@ -7,15 +7,15 @@ Standards-Version: 3.9.3
 
 Package: platform-modules-v682-48y8c-d
 Architecture: amd64
-Depends: linux-image-6.1.0-11-2-amd64-unsigned
+Depends: linux-image-6.1.0-22-2-amd64-unsigned
 Description: kernel modules for platform devices such as fan, led, sfp
 
 Package: platform-modules-v682-48y8c
 Architecture: amd64
-Depends: linux-image-6.1.0-11-2-amd64-unsigned
+Depends: linux-image-6.1.0-22-2-amd64-unsigned
 Description: kernel modules for platform devices such as fan, led, sfp
 
 Package: platform-modules-v682-48x8c
 Architecture: amd64
-Depends: linux-image-6.1.0-11-2-amd64-unsigned
+Depends: linux-image-6.1.0-22-2-amd64-unsigned
 Description: kernel modules for platform devices such as fan, led, sfp
diff --git a/platform/marvell/platform_arm64.conf b/platform/marvell/platform_arm64.conf
index 51af700c4..4c55dd3ae 100644
--- a/platform/marvell/platform_arm64.conf
+++ b/platform/marvell/platform_arm64.conf
@@ -9,7 +9,7 @@ VAR_LOG=512
 UBOOT_FW_DEFAULT=1
 
 kernel_addr=0x1100000
-kernel_version=6.1.0-11-2-arm64
+kernel_version=6.1.0-22-2-arm64
 kernel_fname="/boot/vmlinuz-$kernel_version"
 initrd_fname="/boot/initrd.img-$kernel_version"
 fit_fname="/boot/sonic_arm64.fit"
diff --git a/platform/marvell/platform_armhf.conf b/platform/marvell/platform_armhf.conf
index 931cddd12..de0405b2c 100644
--- a/platform/marvell/platform_armhf.conf
+++ b/platform/marvell/platform_armhf.conf
@@ -10,8 +10,8 @@ fdt_addr=0x2800000
 fdt_high=0x28fffff
 initrd_addr=0x2900000
 
-kernel_fname="/boot/vmlinuz-6.1.0-11-2-armmp"
-initrd_fname="/boot/initrd.img-6.1.0-11-2-armmp"
+kernel_fname="/boot/vmlinuz-6.1.0-22-2-armmp"
+initrd_fname="/boot/initrd.img-6.1.0-22-2-armmp"
 fdt_fname="/boot/armada-385-ET6448M_4G_Nand.dtb"
 
 if [ "$install_env" = "onie" ]; then
diff --git a/platform/marvell/sonic-platform-nokia/7215-a1/scripts/nokia-7215-init.sh b/platform/marvell/sonic-platform-nokia/7215-a1/scripts/nokia-7215-init.sh
index 51474c2e0..68613cb86 100644
--- a/platform/marvell/sonic-platform-nokia/7215-a1/scripts/nokia-7215-init.sh
+++ b/platform/marvell/sonic-platform-nokia/7215-a1/scripts/nokia-7215-init.sh
@@ -5,8 +5,8 @@
 # Load required kernel-mode drivers
 load_kernel_drivers() {
     echo "Loading Kernel Drivers"
-    sudo insmod /lib/modules/6.1.0-11-2-arm64/kernel/extra/nokia_7215_ixs_a1_cpld.ko
-    sudo insmod /lib/modules/6.1.0-11-2-arm64/kernel/extra/cn9130_cpu_thermal_sensor.ko
+    sudo insmod /lib/modules/6.1.0-22-2-arm64/kernel/extra/nokia_7215_ixs_a1_cpld.ko
+    sudo insmod /lib/modules/6.1.0-22-2-arm64/kernel/extra/cn9130_cpu_thermal_sensor.ko
 }
 
 fw_uboot_env_cfg()
diff --git a/platform/marvell/sonic_fit.its b/platform/marvell/sonic_fit.its
index 3208388d9..f3ff5ac7c 100644
--- a/platform/marvell/sonic_fit.its
+++ b/platform/marvell/sonic_fit.its
@@ -7,7 +7,7 @@
     images {
         kernel_ac5x {
             description = "Linux Kernel for AC5x";
-            data = /incbin/("/boot/vmlinuz-6.1.0-11-2-arm64");
+            data = /incbin/("/boot/vmlinuz-6.1.0-22-2-arm64");
             type = "kernel";
             arch = "arm64";
             os = "linux";
@@ -20,7 +20,7 @@
         };
         fdt_ac5x {
             description = "Flattened Device Tree blob for AC5x";
-            data = /incbin/("/usr/lib/linux-image-6.1.0-11-2-arm64/marvell/ac5-98dx35xx-rd.dtb");
+            data = /incbin/("/usr/lib/linux-image-6.1.0-22-2-arm64/marvell/ac5-98dx35xx-rd.dtb");
             type = "flat_dt";
             arch = "arm64";
             compression = "none";
@@ -31,7 +31,7 @@
         };
         fdt_7215_a1 {
             description = "Flattened Device Tree blob for 7215_IXS_A1";
-            data = /incbin/("/usr/lib/linux-image-6.1.0-11-2-arm64/marvell/7215-ixs-a1.dtb");
+            data = /incbin/("/usr/lib/linux-image-6.1.0-22-2-arm64/marvell/7215-ixs-a1.dtb");
             type = "flat_dt";
             arch = "arm64";
             compression = "none";
@@ -42,7 +42,7 @@
         };
         ramdisk_ac5x {
             description = "ramdisk for AC5x";
-            data = /incbin/("/boot/initrd.img-6.1.0-11-2-arm64");
+            data = /incbin/("/boot/initrd.img-6.1.0-22-2-arm64");
             type = "ramdisk";
             arch = "arm64";
             os = "linux";
@@ -55,7 +55,7 @@
         };
         kernel_1 {
             description = "Linux Kernel";
-            data = /incbin/("/boot/vmlinuz-6.1.0-11-2-arm64");
+            data = /incbin/("/boot/vmlinuz-6.1.0-22-2-arm64");
             type = "kernel";
             arch = "arm64";
             os = "linux";
@@ -68,7 +68,7 @@
         };
         ramdisk_1 {
             description = "ramdisk";
-            data = /incbin/("/boot/initrd.img-6.1.0-11-2-arm64");
+            data = /incbin/("/boot/initrd.img-6.1.0-22-2-arm64");
             type = "ramdisk";
             arch = "arm64";
             os = "linux";
@@ -81,7 +81,7 @@
         };
         kernel_2 {
             description = "Linux Kernel";
-            data = /incbin/("/boot/vmlinuz-6.1.0-11-2-arm64");
+            data = /incbin/("/boot/vmlinuz-6.1.0-22-2-arm64");
             type = "kernel";
             arch = "arm64";
             os = "linux";
@@ -94,7 +94,7 @@
         };
         ramdisk_2 {
             description = "ramdisk";
-            data = /incbin/("/boot/initrd.img-6.1.0-11-2-arm64");
+            data = /incbin/("/boot/initrd.img-6.1.0-22-2-arm64");
             type = "ramdisk";
             arch = "arm64";
             os = "linux";
diff --git a/platform/mellanox/hw-management.mk b/platform/mellanox/hw-management.mk
index 9664435a1..cab5e2ecf 100644
--- a/platform/mellanox/hw-management.mk
+++ b/platform/mellanox/hw-management.mk
@@ -16,7 +16,7 @@
 #
 # Mellanox HW Management
 
-MLNX_HW_MANAGEMENT_VERSION = 7.0030.4003
+MLNX_HW_MANAGEMENT_VERSION = 7.0040.1008
 
 export MLNX_HW_MANAGEMENT_VERSION
 
diff --git a/platform/mellanox/hw-management/hw-mgmt b/platform/mellanox/hw-management/hw-mgmt
index 6cf13ac60..cc3c0e00e 160000
--- a/platform/mellanox/hw-management/hw-mgmt
+++ b/platform/mellanox/hw-management/hw-mgmt
@@ -1 +1 @@
-Subproject commit 6cf13ac6000ad7be68ef9b6b25261bbb0fd5d5a5
+Subproject commit cc3c0e00e8e03bf2edcffaaf356777292ad8d22b
diff --git a/platform/mellanox/non-upstream-patches/external-changes.patch b/platform/mellanox/non-upstream-patches/external-changes.patch
index ffc749cfc..cde69e93e 100644
--- a/platform/mellanox/non-upstream-patches/external-changes.patch
+++ b/platform/mellanox/non-upstream-patches/external-changes.patch
@@ -1,13 +1,14 @@
 
 --- a/patch/kconfig-inclusions
 +++ b/patch/kconfig-inclusions
-@@ -117,6 +117,9 @@
+@@ -124,6 +124,10 @@
  CONFIG_PINCTRL_AMD=y
  CONFIG_EDAC_AMD64=m
  CONFIG_AMD_XGBE_DCB=y
 +CONFIG_USB_NET_DRIVERS=m
 +CONFIG_USB_USBNET=m
 +CONFIG_USB_NET_CDCETHER=m
++CONFIG_HOTPLUG_PCI_PCIE=n
  ###-> mellanox_amd64-end
  # For Cisco 8000
  CONFIG_PHYLIB=m
diff --git a/platform/pensando/dsc-drivers/debian/control b/platform/pensando/dsc-drivers/debian/control
index 342424ccb..07d8ed353 100644
--- a/platform/pensando/dsc-drivers/debian/control
+++ b/platform/pensando/dsc-drivers/debian/control
@@ -10,5 +10,5 @@ Standards-Version: 3.9.3
 Package: ionic-modules
 Architecture: arm64
 Section: main
-Depends: linux-image-6.1.0-11-2-arm64-unsigned
+Depends: linux-image-6.1.0-22-2-arm64-unsigned
 Description: kernel modules for pensando elba
diff --git a/platform/pensando/dsc-drivers/debian/ionic-modules.install b/platform/pensando/dsc-drivers/debian/ionic-modules.install
index cad27cea2..9e1d39a9b 100644
--- a/platform/pensando/dsc-drivers/debian/ionic-modules.install
+++ b/platform/pensando/dsc-drivers/debian/ionic-modules.install
@@ -1,4 +1,4 @@
-src/drivers/linux/build/mdev.ko lib/modules/6.1.0-11-2-arm64/extra
-src/drivers/linux/build/mnet_uio_pdrv_genirq.ko lib/modules/6.1.0-11-2-arm64/extra
-src/drivers/linux/build/ionic_mnic.ko lib/modules/6.1.0-11-2-arm64/extra
+src/drivers/linux/build/mdev.ko lib/modules/6.1.0-22-2-arm64/extra
+src/drivers/linux/build/mnet_uio_pdrv_genirq.ko lib/modules/6.1.0-22-2-arm64/extra
+src/drivers/linux/build/ionic_mnic.ko lib/modules/6.1.0-22-2-arm64/extra
 systemd/ionic-modules.service lib/systemd/system
diff --git a/platform/pensando/platform.conf b/platform/pensando/platform.conf
index b10f20e1c..8ebae0e2a 100644
--- a/platform/pensando/platform.conf
+++ b/platform/pensando/platform.conf
@@ -172,8 +172,8 @@ cat <<EOF >> $bl_conf_path/$BL_CONF
 default main
 
 label main
-	kernel /$image_dir/boot/vmlinuz-6.1.0-11-2-arm64
-	initrd /$image_dir/boot/initrd.img-6.1.0-11-2-arm64
+	kernel /$image_dir/boot/vmlinuz-6.1.0-22-2-arm64
+	initrd /$image_dir/boot/initrd.img-6.1.0-22-2-arm64
 	devicetree /$image_dir/boot/elba-asic-psci.dtb
 	append softdog.soft_panic=1 FW_NAME=mainfwa root=/dev/mmcblk0p10 rw rootwait rootfstype=ext4 loopfstype=squashfs loop=/$image_dir/fs.squashfs
 }
diff --git a/rules/linux-kernel.mk b/rules/linux-kernel.mk
index acd900431..246578086 100644
--- a/rules/linux-kernel.mk
+++ b/rules/linux-kernel.mk
@@ -1,9 +1,9 @@
 # linux kernel package
 
-KVERSION_SHORT = 6.1.0-11-2
+KVERSION_SHORT = 6.1.0-22-2
 KVERSION = $(KVERSION_SHORT)-$(CONFIGURED_ARCH)
-KERNEL_VERSION = 6.1.38
-KERNEL_SUBVERSION = 4
+KERNEL_VERSION = 6.1.94
+KERNEL_SUBVERSION = 1
 ifeq ($(CONFIGURED_ARCH), armhf)
 # Override kernel version for ARMHF as it uses arm MP (multi-platform) for short version
 KVERSION = $(KVERSION_SHORT)-armmp
diff --git a/src/sonic-linux-kernel b/src/sonic-linux-kernel
index b9ac5ddff..72d451673 160000
--- a/src/sonic-linux-kernel
+++ b/src/sonic-linux-kernel
@@ -1 +1 @@
-Subproject commit b9ac5ddff682490432c080562670888128f0a2b6
+Subproject commit 72d451673d0d84ec274ebc5ad6fafc0ec7d6bd57

From d66cb58f400b062e9f27b1ca56245ea8744217b7 Mon Sep 17 00:00:00 2001
From: Oleksandr Ivantsiv <oivantsiv@nvidia.com>
Date: Fri, 30 Aug 2024 18:05:35 -0700
Subject: [PATCH 0950/1115] [Mellanox] Update mlnx-fw-upgrade.j2 to support BF3
 DPU NIC FW. (#20090)

Add support for the new device to the script
---
 platform/mellanox/mlnx-fw-upgrade.j2 | 100 +++++++++++++++++++++++++--
 1 file changed, 94 insertions(+), 6 deletions(-)

diff --git a/platform/mellanox/mlnx-fw-upgrade.j2 b/platform/mellanox/mlnx-fw-upgrade.j2
index e4c567c1b..6bfea7762 100755
--- a/platform/mellanox/mlnx-fw-upgrade.j2
+++ b/platform/mellanox/mlnx-fw-upgrade.j2
@@ -36,6 +36,7 @@ declare -r VERBOSE_MIN="${VERBOSE_ERROR}"
 declare -r EXIT_SUCCESS="0"
 declare -r EXIT_FAILURE="1"
 declare -r FW_ALREADY_UPDATED_FAILURE="2"
+declare -r FW_UPGRADE_IS_REQUIRED="10"
 
 declare -r QUERY_XML="mlxfwmanager --query-format XML"
 declare -r QUERY_CMD="mlxfwmanager --query"
@@ -49,6 +50,7 @@ declare -r SPC1_ASIC="spc1"
 declare -r SPC2_ASIC="spc2"
 declare -r SPC3_ASIC="spc3"
 declare -r SPC4_ASIC="spc4"
+declare -r BF3_NIC="bf3"
 declare -r UNKN_ASIC="unknown"
 declare -r UNKN_MST="unknown"
 
@@ -57,8 +59,10 @@ declare -rA FW_FILE_MAP=( \
     [$SPC2_ASIC]="fw-SPC2.mfa" \
     [$SPC3_ASIC]="fw-SPC3.mfa" \
     [$SPC4_ASIC]="fw-SPC4.mfa" \
+    [$BF3_NIC]="fw-BF3.mfa" \
 )
 
+DRY_RUN="${NO_PARAM}"
 IMAGE_UPGRADE="${NO_PARAM}"
 SYSLOG_LOGGER="${NO_PARAM}"
 VERBOSE_LEVEL="${VERBOSE_MIN}"
@@ -72,6 +76,7 @@ function PrintHelp() {
     echo "  -u, --upgrade  Upgrade ASIC firmware using next boot image (useful after SONiC-To-SONiC update)"
     echo "  -s, --syslog   Use syslog logger (enabled when -u|--upgrade)"
     echo "  -v, --verbose  Verbose mode (enabled when -u|--upgrade)"
+    echo "  -d, --dry-run  Compare the FW versions without installation. Return code "0" means the FW is up-to-date, return code "10" means an upgrade is required, otherwise an error is detected."
     echo "  -h, --help     Print help"
     echo
     echo "Examples:"
@@ -95,6 +100,9 @@ function ParseArguments() {
             -s|--syslog)
                 SYSLOG_LOGGER="${YES_PARAM}"
             ;;
+            -d|--dry-run)
+                DRY_RUN="${YES_PARAM}"
+            ;;
             -h|--help)
                 PrintHelp
                 exit "${EXIT_SUCCESS}"
@@ -179,9 +187,29 @@ function UnlockStateChange() {
     /usr/bin/flock -u ${LOCKFD}
 }
 
+function GetMstDeviceType() {
+    local -r asic_type=$(GetAsicType)
+
+    case $asic_type in
+    ${SPC1_ASIC}|${SPC2_ASIC}|${SPC3_ASIC}|${SPC4_ASIC})
+        echo "Spectrum"
+        return ${EXIT_SUCCESS}
+        ;;
+    ${BF3_NIC})
+        echo "BlueField3"
+        return ${EXIT_SUCCESS}
+        ;;
+    *)
+        echo "Unknown"
+        return ${EXIT_FAILURE}
+        ;;
+    esac
+}
+
 function WaitForDevice() {
     local -i QUERY_RETRY_COUNT_MAX="10"
     local -i QUERY_RETRY_COUNT="0"
+    local -r DEVICE_TYPE=$(GetMstDeviceType)
 
     local SPC_MST_DEV=$(GetSPCMstDevice)
 
@@ -198,7 +226,7 @@ function WaitForDevice() {
         ExitFailure "FW Query command: ${QUERY_CMD} failed to detect spectrum device with error: ${failure_msg}"
     fi
 
-    LogInfo "Spectrum ASIC successfully detected at ${SPC_MST_DEV}"
+    LogInfo "${DEVICE_TYPE} ASIC successfully detected at ${SPC_MST_DEV}"
 }
 
 function GetAsicType() {
@@ -208,6 +236,7 @@ function GetAsicType() {
     local -r SPC2_PRODUCT_ID="cf6c"
     local -r SPC3_PRODUCT_ID="cf70"
     local -r SPC4_PRODUCT_ID="cf80"
+    local -r BF3_PRODUCT_ID="a2dc"
 
     if lspci -n | grep "${VENDOR_ID}:${SPC1_PRODUCT_ID}" &>/dev/null; then
         echo "${SPC1_ASIC}"
@@ -221,6 +250,9 @@ function GetAsicType() {
     elif lspci -n | grep "${VENDOR_ID}:${SPC4_PRODUCT_ID}" &>/dev/null; then
         echo "${SPC4_ASIC}"
         exit "${EXIT_SUCCESS}"
+    elif lspci -n | grep "${VENDOR_ID}:${BF3_PRODUCT_ID}" &>/dev/null; then
+        echo "${BF3_NIC}"
+        exit "${EXIT_SUCCESS}"
     fi
 
     echo "${UNKN_ASIC}"
@@ -228,7 +260,8 @@ function GetAsicType() {
 }
 
 function GetSPCMstDevice() {
-    local _MST_DEVICE=$(${QUERY_XML} | xmlstarlet sel -t -m "//Device[contains(@type,'Spectrum')]" -v @pciName | head -n 1)
+    local _DEVICE_TYPE=$(GetMstDeviceType)
+    local _MST_DEVICE=$(${QUERY_XML} | xmlstarlet sel -t -m "//Device[contains(@type,'${_DEVICE_TYPE}')]" -v @pciName | head -n 1)
 
     if [[ ! -c "${_MST_DEVICE}" ]]; then
         echo "${UNKN_MST}"
@@ -267,6 +300,8 @@ function RunCmd() {
     fi
 }
 
+{% if sonic_asic_platform == "mellanox" %}
+
 function RunFwUpdateCmd() {
     local ERROR_CODE="${EXIT_SUCCESS}"
     local COMMAND="${MFT_DIAGNOSIS_FLAGS} ${BURN_CMD} $@"
@@ -301,6 +336,56 @@ function RunFwUpdateCmd() {
     fi
 }
 
+function GetAvailableFwVersion() {
+    local -r _FW_FILE="$1"
+    local -r _MST_DEVICE="$2"
+    local -r _PSID="$3"
+
+    RunCmd "${LIST_CONTENT_CMD} -i ${_FW_FILE} -d ${_MST_DEVICE} -o ${LIST_CONTENT_FILE}"
+
+    local -r _FW_AVAILABLE_INFO="$(grep ${_PSID} ${LIST_CONTENT_FILE})"
+    local -r _FW_AVAILABLE="$(echo ${_FW_AVAILABLE_INFO} | awk '{print $4}')"
+
+    echo ${_FW_AVAILABLE}
+}
+
+{% elif sonic_asic_platform == "nvidia-bluefield" %}
+
+function RunFwUpdateCmd() {
+    local ERROR_CODE="${EXIT_SUCCESS}"
+    local -r _MST_DEVICE="$(GetSPCMstDevice)"
+
+    # Reactivate FW prior to burning...
+    eval "flint -d ${_MST_DEVICE} ir" 2>&1 >/dev/null
+
+    local COMMAND="${MFT_DIAGNOSIS_FLAGS} flint $@ burn"
+
+    output=$(eval "${COMMAND}")
+
+    ERROR_CODE="$?"
+
+    if [[ "${ERROR_CODE}" != "${EXIT_SUCCESS}" ]]; then
+        echo "${output}"
+        failure_msg="${output#*Fail : }"
+        ExitFailure "FW Update command: ${COMMAND} failed with error: ${failure_msg}"
+    fi
+}
+
+function GetAvailableFwVersion() {
+    local -r _FW_FILE="$1"
+    local -r _MST_DEVICE="$2"
+    local -r _PSID="$3"
+
+    RunCmd "flint -i ${_FW_FILE} --psid ${_PSID} query 2>&1 > ${LIST_CONTENT_FILE}"
+
+    local -r _FW_AVAILABLE_INFO="$(grep 'FW Version:' ${LIST_CONTENT_FILE})"
+    local -r _FW_AVAILABLE="$(echo ${_FW_AVAILABLE_INFO} | awk '{print $3}')"
+
+    echo ${_FW_AVAILABLE}
+}
+
+{% endif %}
+
 function UpgradeFW() {
     local -r _FW_BIN_PATH="$1"
 
@@ -323,10 +408,7 @@ function UpgradeFW() {
     RunCmd "${QUERY_XML} -d ${_MST_DEVICE} -o ${QUERY_FILE}"
     local -r _FW_CURRENT=$(GetXPathXML "//Device/Versions/FW/@current" ${QUERY_FILE})
     local -r _PSID=$(GetXPathXML "//Device/@psid" ${QUERY_FILE})
-
-    RunCmd "${LIST_CONTENT_CMD} -i ${_FW_FILE} -d ${_MST_DEVICE} -o ${LIST_CONTENT_FILE}"
-    local -r _FW_AVAILABLE_INFO="$(grep ${_PSID} ${LIST_CONTENT_FILE})"
-    local -r _FW_AVAILABLE="$(echo ${_FW_AVAILABLE_INFO} | awk '{print $4}')"
+    local -r _FW_AVAILABLE="$(GetAvailableFwVersion ${_FW_FILE} ${_MST_DEVICE} ${_PSID})"
 
     if [[ -z "${_FW_CURRENT}" ]]; then
         ExitFailure "could not retreive current FW version"
@@ -339,7 +421,13 @@ function UpgradeFW() {
     if [[ "${_FW_CURRENT}" == "${_FW_AVAILABLE}" ]]; then
         ExitSuccess "firmware is up to date"
     else
+        if [[ "${DRY_RUN}" == "${YES_PARAM}" ]]; then
+            LogNotice "firmware upgrade is required"
+            exit ${FW_UPGRADE_IS_REQUIRED}
+        fi
+
         LogNotice "firmware upgrade is required. Installing compatible version..."
+
         if [[ "${_MST_DEVICE}" = "${UNKN_MST}" ]]; then
             LogWarning "could not find fastest mst device, using default device"
             RunFwUpdateCmd "-i ${_FW_FILE}"

From 84acf27ba283c445dbe3afeee6afd369e9328c6d Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sun, 1 Sep 2024 02:56:45 +0800
Subject: [PATCH 0951/1115] [ci/build]: Upgrade SONiC package versions (#20096)

---
 .../versions-deb-bookworm                        |  1 +
 .../versions-deb-bookworm-arm64                  |  1 +
 .../build-sonic-slave-bookworm/versions-git      |  1 -
 .../build-sonic-slave-bookworm/versions-py3      |  2 +-
 .../versions-deb-bullseye                        |  2 +-
 .../versions-deb-bullseye-arm64                  |  1 +
 .../build-sonic-slave-bullseye/versions-git      |  1 -
 .../build-sonic-slave-bullseye/versions-py3      |  4 +---
 .../versions-py3-all-arm64                       |  2 ++
 files/build/versions/default/versions-git        | 14 +++++++-------
 files/build/versions/default/versions-mirror     |  8 ++++----
 files/build/versions/default/versions-web        |  6 +++---
 .../docker-config-engine-bookworm/versions-py3   |  2 +-
 .../docker-config-engine-bullseye/versions-py3   |  2 +-
 .../dockers/docker-platform-monitor/versions-py3 |  4 ++--
 .../docker-sonic-mgmt-framework/versions-py3     |  4 ++--
 .../dockers/docker-sonic-vs/versions-py3         |  4 ++--
 .../versions-deb-bookworm-arm64                  |  2 +-
 .../versions-deb-bookworm-armhf                  |  2 +-
 .../sonic-slave-bookworm/versions-deb-bookworm   | 16 ++++++++--------
 .../versions-deb-bookworm-arm64                  |  7 -------
 .../versions-deb-bookworm-armhf                  |  7 -------
 .../dockers/sonic-slave-bookworm/versions-py3    |  4 ++--
 .../sonic-slave-bookworm/versions-py3-all-arm64  |  2 --
 .../sonic-slave-bookworm/versions-py3-all-armhf  |  2 --
 .../sonic-slave-bullseye/versions-deb-bullseye   |  8 ++++----
 .../versions-deb-bullseye-arm64                  |  3 ---
 .../versions-deb-bullseye-armhf                  |  3 ---
 .../dockers/sonic-slave-bullseye/versions-py3    |  2 +-
 .../sonic-slave-bullseye/versions-py3-all-arm64  |  1 -
 .../sonic-slave-bullseye/versions-py3-all-armhf  |  1 -
 .../sonic-slave-buster/versions-deb-buster       |  2 +-
 .../sonic-slave-buster/versions-deb-buster-arm64 |  1 -
 .../sonic-slave-buster/versions-deb-buster-armhf |  1 +
 .../versions/host-image/versions-deb-bookworm    |  4 ++--
 .../host-image/versions-deb-bookworm-arm64       |  1 -
 .../host-image/versions-deb-bookworm-armhf       |  1 -
 files/build/versions/host-image/versions-py3     |  6 +++---
 38 files changed, 54 insertions(+), 81 deletions(-)
 create mode 100644 files/build/versions/build/build-sonic-slave-bookworm/versions-deb-bookworm-arm64
 delete mode 100644 files/build/versions/build/build-sonic-slave-bookworm/versions-git
 create mode 100644 files/build/versions/build/build-sonic-slave-bullseye/versions-deb-bullseye-arm64
 delete mode 100644 files/build/versions/build/build-sonic-slave-bullseye/versions-git
 create mode 100644 files/build/versions/build/build-sonic-slave-bullseye/versions-py3-all-arm64
 delete mode 100644 files/build/versions/dockers/sonic-slave-bookworm/versions-deb-bookworm-arm64
 delete mode 100644 files/build/versions/dockers/sonic-slave-bookworm/versions-py3-all-arm64
 delete mode 100644 files/build/versions/dockers/sonic-slave-bookworm/versions-py3-all-armhf
 delete mode 100644 files/build/versions/dockers/sonic-slave-bullseye/versions-deb-bullseye-arm64
 delete mode 100644 files/build/versions/dockers/sonic-slave-bullseye/versions-py3-all-arm64
 delete mode 100644 files/build/versions/dockers/sonic-slave-bullseye/versions-py3-all-armhf
 delete mode 100644 files/build/versions/dockers/sonic-slave-buster/versions-deb-buster-arm64

diff --git a/files/build/versions/build/build-sonic-slave-bookworm/versions-deb-bookworm b/files/build/versions/build/build-sonic-slave-bookworm/versions-deb-bookworm
index 4c337ee0a..9e866beb2 100644
--- a/files/build/versions/build/build-sonic-slave-bookworm/versions-deb-bookworm
+++ b/files/build/versions/build/build-sonic-slave-bookworm/versions-deb-bookworm
@@ -47,6 +47,7 @@ mlnx-dpdk==22.11.0-2404.0.2
 mlnx-dpdk-dev==22.11.0-2404.0.2
 mlnx-iproute2==6.7.0-1.2404066
 mlnx-ofed-kernel-utils==24.04.OFED.24.04.0.6.6.1-1
+mlnx-sai==1.mlnx.SAIBuild2405.28.0.33
 mlnx-tools==24.04.0-1.2404066
 mlxbf-bootctl==2.1
 mlxbf-bootimages==4.7.0-13127
diff --git a/files/build/versions/build/build-sonic-slave-bookworm/versions-deb-bookworm-arm64 b/files/build/versions/build/build-sonic-slave-bookworm/versions-deb-bookworm-arm64
new file mode 100644
index 000000000..5ab60ae1e
--- /dev/null
+++ b/files/build/versions/build/build-sonic-slave-bookworm/versions-deb-bookworm-arm64
@@ -0,0 +1 @@
+mrvllibsai==1.14.0-1
diff --git a/files/build/versions/build/build-sonic-slave-bookworm/versions-git b/files/build/versions/build/build-sonic-slave-bookworm/versions-git
deleted file mode 100644
index 5ba32e1f3..000000000
--- a/files/build/versions/build/build-sonic-slave-bookworm/versions-git
+++ /dev/null
@@ -1 +0,0 @@
-https://github.com/thom311/libnl==fa05d58ebef426a545b4170b35214492b401c8af
diff --git a/files/build/versions/build/build-sonic-slave-bookworm/versions-py3 b/files/build/versions/build/build-sonic-slave-bookworm/versions-py3
index b73981a6f..933217760 100644
--- a/files/build/versions/build/build-sonic-slave-bookworm/versions-py3
+++ b/files/build/versions/build/build-sonic-slave-bookworm/versions-py3
@@ -13,7 +13,7 @@ filelock==3.15.4
 freezegun==1.5.1
 ijson==3.2.3
 ipaddress==1.0.23
-jsondiff==2.2.0
+jsondiff==2.2.1
 jsonpatch==1.33
 jsonpointer==3.0.0
 jsonschema==2.6.0
diff --git a/files/build/versions/build/build-sonic-slave-bullseye/versions-deb-bullseye b/files/build/versions/build/build-sonic-slave-bullseye/versions-deb-bullseye
index 1a89e443e..ed43881c5 100644
--- a/files/build/versions/build/build-sonic-slave-bullseye/versions-deb-bullseye
+++ b/files/build/versions/build/build-sonic-slave-bullseye/versions-deb-bullseye
@@ -13,7 +13,7 @@ libprotobuf-dev==3.21.12-3
 libprotobuf-lite32==3.21.12-3
 libprotobuf32==3.21.12-3
 libprotoc32==3.21.12-3
-libsai==1.13.0-1
+libsai==1.10.1-0
 libsai-dev==1.13.0-1
 libsaimetadata==1.0.0
 libsaimetadata-dev==1.0.0
diff --git a/files/build/versions/build/build-sonic-slave-bullseye/versions-deb-bullseye-arm64 b/files/build/versions/build/build-sonic-slave-bullseye/versions-deb-bullseye-arm64
new file mode 100644
index 000000000..2ccb237eb
--- /dev/null
+++ b/files/build/versions/build/build-sonic-slave-bullseye/versions-deb-bullseye-arm64
@@ -0,0 +1 @@
+libsai==1.13.0-1
diff --git a/files/build/versions/build/build-sonic-slave-bullseye/versions-git b/files/build/versions/build/build-sonic-slave-bullseye/versions-git
deleted file mode 100644
index 5ba32e1f3..000000000
--- a/files/build/versions/build/build-sonic-slave-bullseye/versions-git
+++ /dev/null
@@ -1 +0,0 @@
-https://github.com/thom311/libnl==fa05d58ebef426a545b4170b35214492b401c8af
diff --git a/files/build/versions/build/build-sonic-slave-bullseye/versions-py3 b/files/build/versions/build/build-sonic-slave-bullseye/versions-py3
index 8b7f60378..1ef3c81ea 100644
--- a/files/build/versions/build/build-sonic-slave-bullseye/versions-py3
+++ b/files/build/versions/build/build-sonic-slave-bullseye/versions-py3
@@ -1,4 +1,3 @@
-bitarray==2.8.1
 blessed==1.20.0
 cffi==1.17.0
 charset-normalizer==3.3.2
@@ -10,7 +9,7 @@ enlighten==1.12.4
 filelock==3.15.4
 ijson==3.2.3
 ipaddress==1.0.23
-jsondiff==2.2.0
+jsondiff==2.2.1
 jsonpatch==1.33
 jsonpointer==3.0.0
 natsort==6.2.1
@@ -22,7 +21,6 @@ prettyprinter==0.18.0
 pycairo==1.26.1
 pycparser==2.22
 pynacl==1.5.0
-pyyaml==6.0.1
 scp==0.14.5
 semantic-version==2.10.0
 systemd-python==235
diff --git a/files/build/versions/build/build-sonic-slave-bullseye/versions-py3-all-arm64 b/files/build/versions/build/build-sonic-slave-bullseye/versions-py3-all-arm64
new file mode 100644
index 000000000..dd22191a0
--- /dev/null
+++ b/files/build/versions/build/build-sonic-slave-bullseye/versions-py3-all-arm64
@@ -0,0 +1,2 @@
+bitarray==2.8.1
+pyyaml==6.0.1
diff --git a/files/build/versions/default/versions-git b/files/build/versions/default/versions-git
index 0306db65f..cd33a9ac6 100644
--- a/files/build/versions/default/versions-git
+++ b/files/build/versions/default/versions-git
@@ -1,12 +1,12 @@
-https://chromium.googlesource.com/chromium/tools/depot_tools.git==0bc7c4832e4f2d453e4826c9a2e1197e11bd6ec7
+https://chromium.googlesource.com/chromium/tools/depot_tools.git==2836a02f55cd943760ab4949d5846cc5fb1fadcb
 https://github.com/aristanetworks/swi-tools.git==b5f087e4774168bf536360d43c9c509c8f14ad9f
 https://github.com/CESNET/libyang.git==fba28260f382d81cf8f4b91b24cd717b52324fc2
 https://github.com/daveolson53/audisp-tacplus.git==559c9f22edd4f2dea0ecedffb3ad9502b12a75b6
 https://github.com/daveolson53/libnss-tacplus.git==19008ab68d9d504aa58eb34d5f564755a1613b8b
 https://github.com/dyninc/OpenBFDD.git==e35f43ad8d2b3f084e96a84c392528a90d05a287
-https://github.com/flashrom/flashrom.git==8685230caa03940772358db6927c6076397a6d78
-https://github.com/FreeRADIUS/freeradius-server.git==da410bd1698ffce69486a94558d61bc13bac9dbc
-https://github.com/FreeRADIUS/pam_radius.git==b6442c3e0147f1019990520483fa3a30e4ccf059
+https://github.com/flashrom/flashrom.git==00e02a61840d0f230d25f8988d2f30100ae1388d
+https://github.com/FreeRADIUS/freeradius-server.git==e61cfd0d01dfebd290beb499fce6476443018c98
+https://github.com/FreeRADIUS/pam_radius.git==c898ed12675cf386218e6e071bb158b725e9bdf4
 https://github.com/jeroennijhof/pam_tacplus.git==b839c440e33c36eced9dcbc287fcfe6237c4c4ce
 https://github.com/lguohan/gnxi.git==3adf8b97755b49947e465b5a14645f11e79fa0cd
 https://github.com/Mellanox/libpsample.git==62bb27d9a49424e45191eee81df7ce0d8c74e774
@@ -15,8 +15,8 @@ https://github.com/p4lang/ptf.git==c554f83685186be4cfa9387eb5d6d700d2bbd7c0
 https://github.com/p4lang/scapy-vxlan.git==85ffe83da156568ee47a0750f638227e6e1d7479
 https://github.com/sflow/host-sflow==2893b4808608233da0c26531dff942a960445006
 https://github.com/sflow/sflowtool==c350bc8a6c5ef73d5b6b6529329391be4a2f5543
-https://github.com/sonic-net/DASH.git==173f1c79e7b549bcf1ad038f3a8eadcd3b309de8
-https://github.com/thom311/libnl==fa05d58ebef426a545b4170b35214492b401c8af
-https://salsa.debian.org/kernel-team/initramfs-tools.git==18b98fa239af9b8a02dd009091b2085193681c64
+https://github.com/sonic-net/DASH.git==78fca1e632cc664798ad0ddd6c75cd0b7cbaa69a
+https://github.com/thom311/libnl==81c40cbb904fb4844411cc660eaa0fd1d5d9f5f3
+https://salsa.debian.org/kernel-team/initramfs-tools.git==1030062ea45fe8c0dcde0586e588bd95075afe5c
 https://salsa.debian.org/sk-guest/monit.git==c9da7ebb1f35dfba17b50b5969a6e75e29cbec0d
 https://salsa.debian.org/tai271828/rasdaemon.git==51a7f485f8b2e2ae43e613f19c5a387595174132
diff --git a/files/build/versions/default/versions-mirror b/files/build/versions/default/versions-mirror
index 291de46fb..dc917aeaf 100644
--- a/files/build/versions/default/versions-mirror
+++ b/files/build/versions/default/versions-mirror
@@ -1,13 +1,13 @@
 archive.ubuntu.com_ubuntu_dists_focal==2020-04-23T17:33:17Z
 archive.ubuntu.com_ubuntu_dists_focal-backports==2024-05-31T11:48:10Z
-archive.ubuntu.com_ubuntu_dists_focal-updates==2024-08-19T02:41:01Z
+archive.ubuntu.com_ubuntu_dists_focal-updates==2024-08-31T04:28:43Z
 deb.nodesource.com_node%5f14.x_dists_bookworm==2023-02-17T00:35:29Z
 deb.nodesource.com_node%5f14.x_dists_bullseye==2023-02-17T00:35:28Z
 deb.nodesource.com_node%5f14.x_dists_buster==2023-02-17T00:35:28Z
 debian==20240801T000314Z
 debian-security==20240801T000306Z
-download.docker.com_linux_debian_dists_bookworm==2024-08-16T23:21:06Z
-download.docker.com_linux_debian_dists_bullseye==2024-08-16T23:21:06Z
+download.docker.com_linux_debian_dists_bookworm==2024-08-27T19:23:45Z
+download.docker.com_linux_debian_dists_bullseye==2024-08-27T19:23:45Z
 download.docker.com_linux_debian_dists_buster==2024-06-17T16:53:50Z
 packages.trafficmanager.net_snapshot_debian-security_20240801T000306Z_dists_bookworm-security==2024-07-31T23:24:08Z
 packages.trafficmanager.net_snapshot_debian-security_20240801T000306Z_dists_bullseye-security==2024-07-31T23:24:07Z
@@ -21,4 +21,4 @@ packages.trafficmanager.net_snapshot_debian_20240801T000314Z_dists_bullseye-upda
 packages.trafficmanager.net_snapshot_debian_20240801T000314Z_dists_buster==2023-06-10T08:53:33Z
 packages.trafficmanager.net_snapshot_debian_20240801T000314Z_dists_buster-backports==2024-03-09T20:54:54Z
 packages.trafficmanager.net_snapshot_debian_20240801T000314Z_dists_buster-updates==2023-06-10T08:55:10Z
-security.ubuntu.com_ubuntu_dists_focal-security==2024-08-15T23:58:16Z
+security.ubuntu.com_ubuntu_dists_focal-security==2024-08-23T00:11:18Z
diff --git a/files/build/versions/default/versions-web b/files/build/versions/default/versions-web
index 788d0ac5b..78d7b529e 100644
--- a/files/build/versions/default/versions-web
+++ b/files/build/versions/default/versions-web
@@ -23,7 +23,7 @@ http://download.opensuse.org/repositories/home:/p4lang/Debian_11/p4lang-p4c_1.2.
 http://download.opensuse.org/repositories/home:/p4lang/Debian_11/p4lang-pi_0.1.0-15.debian.tar.xz==b9d8e4ce4cb66385250cf6dded0ef57a
 http://download.opensuse.org/repositories/home:/p4lang/Debian_11/p4lang-pi_0.1.0-15.dsc==03154ab52843ee9efa380febb8053c06
 http://download.opensuse.org/repositories/home:/p4lang/Debian_11/p4lang-pi_0.1.0.orig.tar.gz==551d3780d615557674e93fa11210499d
-http://www.iana.org/assignments/enterprise-numbers.txt==a1246c0137a93741b1a68322f3c473c2
+http://www.iana.org/assignments/enterprise-numbers.txt==2dc962e3f609c1503727a8028a526d05
 http://www.mellanox.com/downloads/MFT/mft-4.28.0-96-arm64-deb.tgz==39b3244a00029f97734ee75e5a321065
 http://www.mellanox.com/downloads/MFT/mft-4.28.0-96-x86_64-deb.tgz==f552e1faddc8f76fe4eb0b8902606c2a
 https://archive.apache.org/dist/thrift/0.14.1/thrift-0.14.1.tar.gz==c64434548438df2cb1e53fb27c600e85
@@ -42,7 +42,7 @@ https://deb.nodesource.com/node_14.x/dists/bullseye/Release==6b7d50c433d129d4c6f
 https://deb.nodesource.com/node_14.x/dists/buster/Release==42875141604382f0abb4d047f645dfe1
 https://deb.nodesource.com/setup_14.x==c30873f4a513bb935afaf8f65e7de9e1
 https://download.docker.com/linux/debian/gpg==1afae06b34a13c1b3d9cb61a26285a15
-https://github.com/aristanetworks/sonic-firmware/raw/9e34da2a2d2d1e7e972cda3064b7b73c0558b322/phy/phy-credo_1.0_amd64.deb==a9c38d11ae4e34ca728d9b3b92fd89af
+https://github.com/aristanetworks/sonic-firmware/raw/24716c4e03f223d8e18afff786ac427f6ac77fe0/phy/phy-credo_1.0_amd64.deb==14e233cd68bc5db22eb8c9e177242851
 https://github.com/bazelbuild/bazelisk/releases/latest/download/bazelisk-linux-amd64==4c5f03df0d1074addce889dd53d9564a
 https://github.com/bazelbuild/bazelisk/releases/latest/download/bazelisk-linux-arm64==bd02444daced3e97685d1067fbe6498d
 https://github.com/CentecNetworks/sonic-binaries/raw/master/amd64/sai/libsaictc-dev_1.13.0-1_amd64.deb==b2e4b33541d4ab5de4c1b8eb4a783761
@@ -81,7 +81,7 @@ https://github.com/Mellanox/sonic-bluefield-packages/releases/download/dpu-sdk-2
 https://github.com/Mellanox/sonic-bluefield-packages/releases/download/dpu-sdk-24.7-RC4-bookworm//rdma-core_2404mlnx51-1.2404066_arm64.deb==fc1135a6c64cc4402732261f12c64bfe
 https://github.com/Mellanox/sonic-bluefield-packages/releases/download/dpu-sdk-24.7-RC4-bookworm//rxp-compiler_22.05.1_arm64.deb==dd7265c708beffaf4a1dc4cdeac28c6e
 https://github.com/Mellanox/sonic-bluefield-packages/releases/download/dpu-sdk-24.7-RC4-bookworm//sdn-appliance_1.5-1mlnx1_arm64.deb==75c91f2efe5b452b4751e45f666e1daf
-https://github.com/Mellanox/sonic-bluefield-packages/releases/download/rshim-2.0.19-bookworm-amd64/rshim_2.0.19_amd64.deb==8128219b0328704b67def640a356df1f
+https://github.com/Mellanox/sonic-bluefield-packages/releases/download/rshim-2.0.29-bookworm-amd64/rshim_2.0.29_amd64.deb==f78f52c7e36ddeb04602c11c95b10181
 https://github.com/Mellanox/Spectrum-SDK-Drivers-SONiC-Bins/releases/download/fw-2012.4072/fw-SPC-rel-13_2012_4072-EVB.mfa==fbcd5f1192855031a6f4b678474fa2d4
 https://github.com/Mellanox/Spectrum-SDK-Drivers-SONiC-Bins/releases/download/fw-2012.4072/fw-SPC2-rel-29_2012_4072-EVB.mfa==857c07996d406a7130b2a422dff44d7c
 https://github.com/Mellanox/Spectrum-SDK-Drivers-SONiC-Bins/releases/download/fw-2012.4072/fw-SPC3-rel-30_2012_4072-EVB.mfa==c040593a9eb8927d85b5394e246ca2d4
diff --git a/files/build/versions/dockers/docker-config-engine-bookworm/versions-py3 b/files/build/versions/dockers/docker-config-engine-bookworm/versions-py3
index 87add86ea..463edbeae 100644
--- a/files/build/versions/dockers/docker-config-engine-bookworm/versions-py3
+++ b/files/build/versions/dockers/docker-config-engine-bookworm/versions-py3
@@ -1,7 +1,7 @@
 bitarray==2.8.1
 ijson==3.2.3
 ipaddress==1.0.23
-jsondiff==2.2.0
+jsondiff==2.2.1
 lxml==4.9.1
 natsort==6.2.1
 netaddr==0.8.0
diff --git a/files/build/versions/dockers/docker-config-engine-bullseye/versions-py3 b/files/build/versions/dockers/docker-config-engine-bullseye/versions-py3
index 1a1c92509..51c6d30eb 100644
--- a/files/build/versions/dockers/docker-config-engine-bullseye/versions-py3
+++ b/files/build/versions/dockers/docker-config-engine-bullseye/versions-py3
@@ -1,7 +1,7 @@
 bitarray==2.8.1
 ijson==3.2.3
 ipaddress==1.0.23
-jsondiff==2.2.0
+jsondiff==2.2.1
 lxml==4.9.1
 natsort==6.2.1
 netaddr==0.8.0
diff --git a/files/build/versions/dockers/docker-platform-monitor/versions-py3 b/files/build/versions/dockers/docker-platform-monitor/versions-py3
index 960078b05..cede940bf 100644
--- a/files/build/versions/dockers/docker-platform-monitor/versions-py3
+++ b/files/build/versions/dockers/docker-platform-monitor/versions-py3
@@ -1,11 +1,11 @@
 attrs==22.2.0
-certifi==2024.7.4
+certifi==2024.8.30
 charset-normalizer==3.3.2
 enum34==1.1.10
 grpcio==1.51.1
 grpcio-tools==1.51.1
 guacamole==0.9.2
-idna==3.7
+idna==3.8
 jsonschema==2.6.0
 libpci==0.2
 netifaces==0.11.0
diff --git a/files/build/versions/dockers/docker-sonic-mgmt-framework/versions-py3 b/files/build/versions/dockers/docker-sonic-mgmt-framework/versions-py3
index 8fbb76d5f..0d7901881 100644
--- a/files/build/versions/dockers/docker-sonic-mgmt-framework/versions-py3
+++ b/files/build/versions/dockers/docker-sonic-mgmt-framework/versions-py3
@@ -1,5 +1,5 @@
-certifi==2024.7.4
+certifi==2024.8.30
 charset-normalizer==3.3.2
-idna==3.7
+idna==3.8
 requests==2.32.3
 urllib3==2.2.2
diff --git a/files/build/versions/dockers/docker-sonic-vs/versions-py3 b/files/build/versions/dockers/docker-sonic-vs/versions-py3
index a7d5f91d9..ab8596ef5 100644
--- a/files/build/versions/dockers/docker-sonic-vs/versions-py3
+++ b/files/build/versions/dockers/docker-sonic-vs/versions-py3
@@ -1,7 +1,7 @@
 async-timeout==4.0.2
 bcrypt==3.2.2
 blessed==1.20.0
-certifi==2024.7.4
+certifi==2024.8.30
 cffi==1.17.0
 charset-normalizer==3.3.2
 click==7.0
@@ -13,7 +13,7 @@ docker==7.1.0
 docker-image-py==0.1.13
 enlighten==1.12.4
 filelock==3.15.4
-idna==3.7
+idna==3.8
 importlib-metadata==6.1.0
 jsonpatch==1.33
 jsonpointer==3.0.0
diff --git a/files/build/versions/dockers/docker-syncd-mrvl/versions-deb-bookworm-arm64 b/files/build/versions/dockers/docker-syncd-mrvl/versions-deb-bookworm-arm64
index 9b956a86a..c4a2333b4 100644
--- a/files/build/versions/dockers/docker-syncd-mrvl/versions-deb-bookworm-arm64
+++ b/files/build/versions/dockers/docker-syncd-mrvl/versions-deb-bookworm-arm64
@@ -11,7 +11,7 @@ libpython3-dev==3.11.2-1+b1
 libpython3.11-dev==3.11.2-6+deb12u2
 libsaimetadata==1.0.0
 libsairedis==1.0.0
-mrvllibsai==1.13.0-1
+mrvllibsai==1.14.0-1
 pkg-config==1.8.1-1
 pkgconf==1.8.1-1
 pkgconf-bin==1.8.1-1
diff --git a/files/build/versions/dockers/docker-syncd-mrvl/versions-deb-bookworm-armhf b/files/build/versions/dockers/docker-syncd-mrvl/versions-deb-bookworm-armhf
index 637e2933d..c4a2333b4 100644
--- a/files/build/versions/dockers/docker-syncd-mrvl/versions-deb-bookworm-armhf
+++ b/files/build/versions/dockers/docker-syncd-mrvl/versions-deb-bookworm-armhf
@@ -11,7 +11,7 @@ libpython3-dev==3.11.2-1+b1
 libpython3.11-dev==3.11.2-6+deb12u2
 libsaimetadata==1.0.0
 libsairedis==1.0.0
-mrvllibsai==1.13.0-3
+mrvllibsai==1.14.0-1
 pkg-config==1.8.1-1
 pkgconf==1.8.1-1
 pkgconf-bin==1.8.1-1
diff --git a/files/build/versions/dockers/sonic-slave-bookworm/versions-deb-bookworm b/files/build/versions/dockers/sonic-slave-bookworm/versions-deb-bookworm
index 902ef9de3..12e46295f 100644
--- a/files/build/versions/dockers/sonic-slave-bookworm/versions-deb-bookworm
+++ b/files/build/versions/dockers/sonic-slave-bookworm/versions-deb-bookworm
@@ -25,7 +25,7 @@ automake==1:1.16.5-1.3
 autopoint==0.21-12
 autotools-dev==20220109.1
 bash-completion==1:2.11-6
-bc==1.07.1-3+b1
+bc==1.07.1-3
 bind9-dnsutils==1:9.18.28-1~deb12u2
 bind9-host==1:9.18.28-1~deb12u2
 bind9-libs==1:9.18.28-1~deb12u2
@@ -76,7 +76,7 @@ dbus-system-bus-common==1.14.10-1~deb12u1
 dbus-user-session==1.14.10-1~deb12u1
 dconf-gsettings-backend==0.40.0-4
 dconf-service==0.40.0-4
-dctrl-tools==2.24-3+b1
+dctrl-tools==2.24-3
 debhelper==13.11.4
 debian-keyring==2022.12.24
 debootstrap==1.0.128+nmu2+deb12u1
@@ -110,14 +110,14 @@ docbook-xml==4.5-12
 docker-buildx-plugin==0.10.5-1~debian.12~bookworm
 docker-ce==5:24.0.2-1~debian.12~bookworm
 docker-ce-cli==5:24.0.2-1~debian.12~bookworm
-docker-ce-rootless-extras==5:27.1.2-1~debian.12~bookworm
+docker-ce-rootless-extras==5:27.2.0-1~debian.12~bookworm
 docker-compose-plugin==2.18.1-1~debian.12~bookworm
 docutils-common==0.19+dfsg-6
 dosfstools==4.2-1
 doxygen==1.9.4-4
 dpkg-dev==1.21.22
 dput==1.1.3
-dvipng==1.15-1.1+b1
+dvipng==1.15-1.1
 dvisvgm==3.0.3-1
 dwz==0.15-1
 eatmydata==130-2
@@ -1016,8 +1016,8 @@ libmunge2==0.5.15-2
 libmysofa1==1.3.1~dfsg0-1
 libnamespace-autoclean-perl==0.29-2
 libnamespace-clean-perl==0.27-2
-libnanomsg-dev==1.1.5+dfsg-1.1+b1
-libnanomsg5==1.1.5+dfsg-1.1+b1
+libnanomsg-dev==1.1.5+dfsg-1.1
+libnanomsg5==1.1.5+dfsg-1.1
 libncurses-dev==6.4-4
 libncurses5-dev==6.4-4
 libncurses6==6.4-4
@@ -2035,10 +2035,10 @@ velocity==1.7-6
 vim==2:9.0.1378-2
 vim-common==2:9.0.1378-2
 vim-runtime==2:9.0.1378-2
-watchdog==5.16-1+b2
+watchdog==5.16-1+b1
 wayland-protocols==1.31-1
 wdiff==1.2.2-5
-wget==1.21.3-1+b2
+wget==1.21.3-1+b1
 x11-common==1:7.7+23
 x11-utils==7.7+5
 x11-xserver-utils==7.7+9+b1
diff --git a/files/build/versions/dockers/sonic-slave-bookworm/versions-deb-bookworm-arm64 b/files/build/versions/dockers/sonic-slave-bookworm/versions-deb-bookworm-arm64
deleted file mode 100644
index 3b6c4c092..000000000
--- a/files/build/versions/dockers/sonic-slave-bookworm/versions-deb-bookworm-arm64
+++ /dev/null
@@ -1,7 +0,0 @@
-bc==1.07.1-3
-dctrl-tools==2.24-3
-dvipng==1.15-1.1
-libnanomsg-dev==1.1.5+dfsg-1.1
-libnanomsg5==1.1.5+dfsg-1.1
-watchdog==5.16-1+b1
-wget==1.21.3-1+b1
diff --git a/files/build/versions/dockers/sonic-slave-bookworm/versions-deb-bookworm-armhf b/files/build/versions/dockers/sonic-slave-bookworm/versions-deb-bookworm-armhf
index 5a56eb851..6fd0984f5 100644
--- a/files/build/versions/dockers/sonic-slave-bookworm/versions-deb-bookworm-armhf
+++ b/files/build/versions/dockers/sonic-slave-bookworm/versions-deb-bookworm-armhf
@@ -1,10 +1,3 @@
-bc==1.07.1-3
-dctrl-tools==2.24-3
-dvipng==1.15-1.1
-libnanomsg-dev==1.1.5+dfsg-1.1
-libnanomsg5==1.1.5+dfsg-1.1
 linux-compiler-gcc-12-arm==6.1.99-1
 linux-headers-6.1.0-23-armmp==6.1.99-1
 linux-headers-armmp==6.1.99-1
-watchdog==5.16-1+b1
-wget==1.21.3-1+b1
diff --git a/files/build/versions/dockers/sonic-slave-bookworm/versions-py3 b/files/build/versions/dockers/sonic-slave-bookworm/versions-py3
index 402f9445a..6ae5e3eda 100644
--- a/files/build/versions/dockers/sonic-slave-bookworm/versions-py3
+++ b/files/build/versions/dockers/sonic-slave-bookworm/versions-py3
@@ -97,8 +97,8 @@ platformdirs==2.6.0
 pluggy==1.0.0+repack
 ply==3.11
 prompt-toolkit==3.0.36
-protobuf==4.21.12
-psutil==5.9.4
+protobuf==4.25.4
+psutil==6.0.0
 ptyprocess==0.7.0
 pure-eval==0.0.0
 py==1.11.0
diff --git a/files/build/versions/dockers/sonic-slave-bookworm/versions-py3-all-arm64 b/files/build/versions/dockers/sonic-slave-bookworm/versions-py3-all-arm64
deleted file mode 100644
index 5206c39a5..000000000
--- a/files/build/versions/dockers/sonic-slave-bookworm/versions-py3-all-arm64
+++ /dev/null
@@ -1,2 +0,0 @@
-protobuf==4.25.4
-psutil==6.0.0
diff --git a/files/build/versions/dockers/sonic-slave-bookworm/versions-py3-all-armhf b/files/build/versions/dockers/sonic-slave-bookworm/versions-py3-all-armhf
deleted file mode 100644
index 5206c39a5..000000000
--- a/files/build/versions/dockers/sonic-slave-bookworm/versions-py3-all-armhf
+++ /dev/null
@@ -1,2 +0,0 @@
-protobuf==4.25.4
-psutil==6.0.0
diff --git a/files/build/versions/dockers/sonic-slave-bullseye/versions-deb-bullseye b/files/build/versions/dockers/sonic-slave-bullseye/versions-deb-bullseye
index 8f0505d04..9d40025ca 100644
--- a/files/build/versions/dockers/sonic-slave-bullseye/versions-deb-bullseye
+++ b/files/build/versions/dockers/sonic-slave-bullseye/versions-deb-bullseye
@@ -70,7 +70,7 @@ dbus==1.12.28-0+deb11u1
 dbus-user-session==1.12.28-0+deb11u1
 dconf-gsettings-backend==0.38.0-2
 dconf-service==0.38.0-2
-dctrl-tools==2.24-3+b1
+dctrl-tools==2.24-3
 debhelper==13.3.4
 debian-keyring==2021.07.26
 debootstrap==1.0.123+deb11u2
@@ -106,7 +106,7 @@ docbook-xsl==1.79.2+dfsg-1
 docker-buildx-plugin==0.10.5-1~debian.11~bullseye
 docker-ce==5:24.0.2-1~debian.11~bullseye
 docker-ce-cli==5:24.0.2-1~debian.11~bullseye
-docker-ce-rootless-extras==5:27.1.2-1~debian.11~bullseye
+docker-ce-rootless-extras==5:27.2.0-1~debian.11~bullseye
 docker-compose-plugin==2.18.1-1~debian.11~bullseye
 docutils-common==0.16+dfsg-4
 dosfstools==4.2-1
@@ -114,7 +114,7 @@ doxygen==1.9.1-1
 dpatch==2.0.41
 dpkg-dev==1.20.13
 dput==1.1.0
-dvipng==1.15-1.1+b1
+dvipng==1.15-1.1
 dvisvgm==2.11.1-1
 dwarves==1.20-1
 dwz==0.13+20210201-1
@@ -1295,7 +1295,7 @@ libucx0==1.10.1~rc1+really.1.10.0-1
 libudev-dev==247.3-7+deb11u5
 libudfread0==1.1.1-1
 libunbound8==1.13.1-1+deb11u2
-libunicode-linebreak-perl==0.0.20190101-1+b3
+libunicode-linebreak-perl==0.0.20190101-1+b2
 libunicode-utf8-perl==0.62-1+b2
 libunivocity-parsers-java==2.8.3-2
 libunwind-dev==1.3.2-2
diff --git a/files/build/versions/dockers/sonic-slave-bullseye/versions-deb-bullseye-arm64 b/files/build/versions/dockers/sonic-slave-bullseye/versions-deb-bullseye-arm64
deleted file mode 100644
index 8c3682088..000000000
--- a/files/build/versions/dockers/sonic-slave-bullseye/versions-deb-bullseye-arm64
+++ /dev/null
@@ -1,3 +0,0 @@
-dctrl-tools==2.24-3
-dvipng==1.15-1.1
-libunicode-linebreak-perl==0.0.20190101-1+b2
diff --git a/files/build/versions/dockers/sonic-slave-bullseye/versions-deb-bullseye-armhf b/files/build/versions/dockers/sonic-slave-bullseye/versions-deb-bullseye-armhf
index eef585c8b..f98b360d3 100644
--- a/files/build/versions/dockers/sonic-slave-bullseye/versions-deb-bullseye-armhf
+++ b/files/build/versions/dockers/sonic-slave-bullseye/versions-deb-bullseye-armhf
@@ -1,8 +1,5 @@
-dctrl-tools==2.24-3
-dvipng==1.15-1.1
 libjpeg-dev==1:2.0.6-4
 libjpeg62-turbo-dev==1:2.0.6-4
-libunicode-linebreak-perl==0.0.20190101-1+b2
 linux-compiler-gcc-10-arm==5.10.221-1
 linux-headers-5.10.0-31-armmp==5.10.221-1
 linux-headers-armmp==5.10.221-1
diff --git a/files/build/versions/dockers/sonic-slave-bullseye/versions-py3 b/files/build/versions/dockers/sonic-slave-bullseye/versions-py3
index 19ed5b019..3cc1b88b9 100644
--- a/files/build/versions/dockers/sonic-slave-bullseye/versions-py3
+++ b/files/build/versions/dockers/sonic-slave-bullseye/versions-py3
@@ -75,7 +75,7 @@ pluggy==0.13.0
 ply==3.11
 prompt-toolkit==3.0.14
 protobuf==4.25.4
-psutil==5.8.0
+psutil==6.0.0
 ptyprocess==0.7.0
 py==1.10.0
 pyang==2.4.0
diff --git a/files/build/versions/dockers/sonic-slave-bullseye/versions-py3-all-arm64 b/files/build/versions/dockers/sonic-slave-bullseye/versions-py3-all-arm64
deleted file mode 100644
index 84f3d20c0..000000000
--- a/files/build/versions/dockers/sonic-slave-bullseye/versions-py3-all-arm64
+++ /dev/null
@@ -1 +0,0 @@
-psutil==6.0.0
diff --git a/files/build/versions/dockers/sonic-slave-bullseye/versions-py3-all-armhf b/files/build/versions/dockers/sonic-slave-bullseye/versions-py3-all-armhf
deleted file mode 100644
index 84f3d20c0..000000000
--- a/files/build/versions/dockers/sonic-slave-bullseye/versions-py3-all-armhf
+++ /dev/null
@@ -1 +0,0 @@
-psutil==6.0.0
diff --git a/files/build/versions/dockers/sonic-slave-buster/versions-deb-buster b/files/build/versions/dockers/sonic-slave-buster/versions-deb-buster
index 4469ca16b..f97105806 100644
--- a/files/build/versions/dockers/sonic-slave-buster/versions-deb-buster
+++ b/files/build/versions/dockers/sonic-slave-buster/versions-deb-buster
@@ -1140,7 +1140,7 @@ libtexlua53==2018.20181218.49446-1+deb10u2
 libtexluajit2==2018.20181218.49446-1+deb10u2
 libtext-charwidth-perl==0.04-7.1+b1
 libtext-glob-perl==0.10-1
-libtext-iconv-perl==1.7-5+b7
+libtext-iconv-perl==1.7-5+b6
 libtext-levenshtein-perl==0.13-1
 libtext-unidecode-perl==1.30-1
 libtext-wrapi18n-perl==0.06-7.1
diff --git a/files/build/versions/dockers/sonic-slave-buster/versions-deb-buster-arm64 b/files/build/versions/dockers/sonic-slave-buster/versions-deb-buster-arm64
deleted file mode 100644
index 8f68d6329..000000000
--- a/files/build/versions/dockers/sonic-slave-buster/versions-deb-buster-arm64
+++ /dev/null
@@ -1 +0,0 @@
-libtext-iconv-perl==1.7-5+b6
diff --git a/files/build/versions/dockers/sonic-slave-buster/versions-deb-buster-armhf b/files/build/versions/dockers/sonic-slave-buster/versions-deb-buster-armhf
index 4db6ea2c4..201942d33 100644
--- a/files/build/versions/dockers/sonic-slave-buster/versions-deb-buster-armhf
+++ b/files/build/versions/dockers/sonic-slave-buster/versions-deb-buster-armhf
@@ -17,6 +17,7 @@ libqt5sql5-sqlite==5.11.3+dfsg1-1+deb10u5
 libqt5test5==5.11.3+dfsg1-1+deb10u5
 libqt5widgets5==5.11.3+dfsg1-1+deb10u5
 libqt5xml5==5.11.3+dfsg1-1+deb10u5
+libtext-iconv-perl==1.7-5+b7
 linux-compiler-gcc-8-arm==4.19.316-1
 nasm==2.14-1
 qt5-default==5.11.3+dfsg1-1+deb10u5
diff --git a/files/build/versions/host-image/versions-deb-bookworm b/files/build/versions/host-image/versions-deb-bookworm
index 820dfc3ab..f48451bfa 100644
--- a/files/build/versions/host-image/versions-deb-bookworm
+++ b/files/build/versions/host-image/versions-deb-bookworm
@@ -310,7 +310,7 @@ ntpdate==1:4.2.8p15+dfsg-2~1.2.2+dfsg1-1+deb12u1
 ntpsec==1.2.2+dfsg1-1+deb12u1
 ntpsec-ntpdate==1.2.2+dfsg1-1+deb12u1
 ntpsec-ntpdig==1.2.2+dfsg1-1+deb12u1
-ntpstat==0.0.0.1-2+b1
+ntpstat==0.0.0.1-2
 nvme-cli==2.4+really2.3-3
 opennsl-modules==7.1.0.0
 openssh-client==1:9.2p1-2+deb12u3+fips
@@ -357,7 +357,7 @@ rasdaemon==0.6.8-1
 readline-common==8.2-1.3
 resolvconf==1.91+nmu1
 rpcsvc-proto==1.4.3-1
-rshim==2.0.19
+rshim==2.0.29
 rsyslog==8.2302.0-1
 runit-helper==2.15.2
 sbsigntool==0.9.4-3.1
diff --git a/files/build/versions/host-image/versions-deb-bookworm-arm64 b/files/build/versions/host-image/versions-deb-bookworm-arm64
index d82ad8838..8260d1e41 100644
--- a/files/build/versions/host-image/versions-deb-bookworm-arm64
+++ b/files/build/versions/host-image/versions-deb-bookworm-arm64
@@ -1,3 +1,2 @@
 mrvlprestera==1.0
-ntpstat==0.0.0.1-2
 tsingma-bsp==1.0
diff --git a/files/build/versions/host-image/versions-deb-bookworm-armhf b/files/build/versions/host-image/versions-deb-bookworm-armhf
index 85aa015ee..f5c751412 100644
--- a/files/build/versions/host-image/versions-deb-bookworm-armhf
+++ b/files/build/versions/host-image/versions-deb-bookworm-armhf
@@ -1,5 +1,4 @@
 binutils-arm-linux-gnueabihf==2.40-2
 linux-image-6.1.0-11-2-armmp==6.1.38-4
 mrvlprestera==1.0
-ntpstat==0.0.0.1-2
 python3-gi==3.42.2-3+b1
diff --git a/files/build/versions/host-image/versions-py3 b/files/build/versions/host-image/versions-py3
index 548519d7c..aba273871 100644
--- a/files/build/versions/host-image/versions-py3
+++ b/files/build/versions/host-image/versions-py3
@@ -5,7 +5,7 @@ bcrypt==3.2.2
 bitarray==2.8.1
 blessed==1.20.0
 blkinfo==0.2.0
-certifi==2024.7.4
+certifi==2024.8.30
 cffi==1.15.1
 charset-normalizer==3.3.2
 click==7.0
@@ -19,13 +19,13 @@ enlighten==1.12.4
 filelock==3.15.4
 grpcio==1.51.1
 grpcio-tools==1.51.1
-idna==3.7
+idna==3.8
 ijson==3.2.3
 ipaddr==2.2.0
 ipaddress==1.0.23
 j2cli==0.3.12b0
 jinja2==3.1.2
-jsondiff==2.2.0
+jsondiff==2.2.1
 jsonpatch==1.33
 jsonpointer==3.0.0
 jsonschema==2.6.0

From 7e2255bf7e55e7961af9e794b4e18c3b4ebe79e7 Mon Sep 17 00:00:00 2001
From: anamehra <54692434+anamehra@users.noreply.github.com>
Date: Sat, 31 Aug 2024 12:01:09 -0700
Subject: [PATCH 0952/1115] [cisco]: Update cisco-8000.ini to 202405.0.4
 release (#20091)

---
 platform/checkout/cisco-8000.ini | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/platform/checkout/cisco-8000.ini b/platform/checkout/cisco-8000.ini
index 7d2338648..0c22272d7 100644
--- a/platform/checkout/cisco-8000.ini
+++ b/platform/checkout/cisco-8000.ini
@@ -1,3 +1,3 @@
 [module]
 repo=git@github.com:Cisco-8000-sonic/platform-cisco-8000.git
-ref=202405.0.3
+ref=202405.0.4

From 06a90a8c1afb4904f18a09a75f80d26b67ce15b6 Mon Sep 17 00:00:00 2001
From: Vivek <vivekreddykarri98@gmail.com>
Date: Sat, 31 Aug 2024 12:02:11 -0700
Subject: [PATCH 0953/1115] [Nvidia]: Enable CMIS host management on
 Mellanox-SN4280-O28 SKU (#20036)

Signed-off-by: Vivek Reddy <vkarri@nvidia.com>
---
 .../Mellanox-SN4280-O28/hwsku.json            | 169 +++++-
 .../Mellanox-SN4280-O28/media_settings.json   | 506 ++++++++++++++++++
 .../optics_si_settings.json                   | 108 ++++
 .../pmon_daemon_control.json                  |   1 +
 .../Mellanox-SN4280-O28/sai.profile           |   1 +
 .../pmon_immediate_start                      |   0
 6 files changed, 784 insertions(+), 1 deletion(-)
 mode change 120000 => 100644 device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/hwsku.json
 create mode 100644 device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/media_settings.json
 create mode 100644 device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/optics_si_settings.json
 create mode 120000 device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/pmon_daemon_control.json
 create mode 100644 device/mellanox/x86_64-nvidia_sn4280-r0/pmon_immediate_start

diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/hwsku.json b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/hwsku.json
deleted file mode 120000
index 049927198..000000000
--- a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/hwsku.json
+++ /dev/null
@@ -1 +0,0 @@
-../ACS-SN4280/hwsku.json
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/hwsku.json b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/hwsku.json
new file mode 100644
index 000000000..41e245c85
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/hwsku.json
@@ -0,0 +1,168 @@
+{
+    "interfaces": {
+        "Ethernet0": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet8": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet16": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet24": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet32": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet40": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet48": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet56": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet64": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet72": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet80": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet88": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet96": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet104": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet112": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet120": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet128": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet136": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet144": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet152": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet160": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet168": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet176": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet184": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet192": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet200": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet208": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet216": {
+            "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]",
+            "subport": "1",
+            "autoneg": "off"
+        },
+        "Ethernet224": {
+            "default_brkout_mode": "1x400G",
+            "subport": "1",
+            "autoneg": "on",
+            "role": "Dpc"
+        },
+        "Ethernet232": {
+            "default_brkout_mode": "1x400G",
+            "subport": "1",
+            "autoneg": "on",
+            "role": "Dpc"
+        },
+        "Ethernet240": {
+            "default_brkout_mode": "1x400G",
+            "subport": "1",
+            "autoneg": "on",
+            "role": "Dpc"
+        },
+        "Ethernet248": {
+            "default_brkout_mode": "1x400G",
+            "subport": "1",
+            "autoneg": "on",
+            "role": "Dpc"
+        }
+    }
+}
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/media_settings.json b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/media_settings.json
new file mode 100644
index 000000000..3bd288caa
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/media_settings.json
@@ -0,0 +1,506 @@
+{
+  "GLOBAL_MEDIA_SETTINGS": {
+      "1-28": {
+          "QSFP-DD-sm_media_interface": {
+              "speed:400GAUI-8": {
+                  "idriver": {
+                      "lane0": "0x0000003c",
+                      "lane1": "0x0000003c",
+                      "lane2": "0x0000003c",
+                      "lane3": "0x0000003c",
+                      "lane4": "0x0000003c",
+                      "lane5": "0x0000003c",
+                      "lane6": "0x0000003c",
+                      "lane7": "0x0000003c"
+                  },
+                  "pre1": {
+                      "lane0": "0xfffffffe",
+                      "lane1": "0xfffffffe",
+                      "lane2": "0xfffffffe",
+                      "lane3": "0xfffffffe",
+                      "lane4": "0xfffffffe",
+                      "lane5": "0xfffffffe",
+                      "lane6": "0xfffffffe",
+                      "lane7": "0xfffffffe"
+                  },
+                  "pre2": {
+                      "lane0": "0x00000000",
+                      "lane1": "0x00000000",
+                      "lane2": "0x00000000",
+                      "lane3": "0x00000000",
+                      "lane4": "0x00000000",
+                      "lane5": "0x00000000",
+                      "lane6": "0x00000000",
+                      "lane7": "0x00000000"
+                  },
+                  "main": {
+                      "lane0": "0x00000020",
+                      "lane1": "0x00000020",
+                      "lane2": "0x00000020",
+                      "lane3": "0x00000020",
+                      "lane4": "0x00000020",
+                      "lane5": "0x00000020",
+                      "lane6": "0x00000020",
+                      "lane7": "0x00000020"
+                  },
+                  "post1": {
+                      "lane0": "0x00000006",
+                      "lane1": "0x00000006",
+                      "lane2": "0x00000006",
+                      "lane3": "0x00000006",
+                      "lane4": "0x00000006",
+                      "lane5": "0x00000006",
+                      "lane6": "0x00000006",
+                      "lane7": "0x00000006"
+                  },
+                  "ob_m2lp": {
+                      "lane0": "0x00000004",
+                      "lane1": "0x00000004",
+                      "lane2": "0x00000004",
+                      "lane3": "0x00000004",
+                      "lane4": "0x00000004",
+                      "lane5": "0x00000004",
+                      "lane6": "0x00000004",
+                      "lane7": "0x00000004"
+                  },
+                  "ob_alev_out": {
+                      "lane0": "0x0000000f",
+                      "lane1": "0x0000000f",
+                      "lane2": "0x0000000f",
+                      "lane3": "0x0000000f",
+                      "lane4": "0x0000000f",
+                      "lane5": "0x0000000f",
+                      "lane6": "0x0000000f",
+                      "lane7": "0x0000000f"
+                  },
+                  "obplev": {
+                      "lane0": "0x00000069",
+                      "lane1": "0x00000069",
+                      "lane2": "0x00000069",
+                      "lane3": "0x00000069",
+                      "lane4": "0x00000069",
+                      "lane5": "0x00000069",
+                      "lane6": "0x00000069",
+                      "lane7": "0x00000069"
+                  },
+                  "obnlev": {
+                      "lane0": "0x0000005f",
+                      "lane1": "0x0000005f",
+                      "lane2": "0x0000005f",
+                      "lane3": "0x0000005f",
+                      "lane4": "0x0000005f",
+                      "lane5": "0x0000005f",
+                      "lane6": "0x0000005f",
+                      "lane7": "0x0000005f"
+                  },
+                  "regn_bfm1p": {
+                      "lane0": "0x0000001e",
+                      "lane1": "0x0000001e",
+                      "lane2": "0x0000001e",
+                      "lane3": "0x0000001e",
+                      "lane4": "0x0000001e",
+                      "lane5": "0x0000001e",
+                      "lane6": "0x0000001e",
+                      "lane7": "0x0000001e"
+                  },
+                  "regn_bfm1n": {
+                      "lane0": "0x000000aa",
+                      "lane1": "0x000000aa",
+                      "lane2": "0x000000aa",
+                      "lane3": "0x000000aa",
+                      "lane4": "0x000000aa",
+                      "lane5": "0x000000aa",
+                      "lane6": "0x000000aa",
+                      "lane7": "0x000000aa"
+                  }
+              },
+              "speed:100GAUI-2": {
+                  "idriver": {
+                      "lane0": "0x0000003c",
+                      "lane1": "0x0000003c"
+                  },
+                  "pre1": {
+                      "lane0": "0xfffffffe",
+                      "lane1": "0xfffffffe"
+                  },
+                  "pre2": {
+                      "lane0": "0x00000000",
+                      "lane1": "0x00000000"
+                  },
+                  "main": {
+                      "lane0": "0x00000020",
+                      "lane1": "0x00000020"
+                  },
+                  "post1": {
+                      "lane0": "0x00000006",
+                      "lane1": "0x00000006"
+                  },
+                  "ob_m2lp": {
+                      "lane0": "0x00000004",
+                      "lane1": "0x00000004"
+                  },
+                  "ob_alev_out": {
+                      "lane0": "0x0000000f",
+                      "lane1": "0x0000000f"
+                  },
+                  "obplev": {
+                      "lane0": "0x00000069",
+                      "lane1": "0x00000069"
+                  },
+                  "obnlev": {
+                      "lane0": "0x0000005f",
+                      "lane1": "0x0000005f"
+                  },
+                  "regn_bfm1p": {
+                      "lane0": "0x0000001e",
+                      "lane1": "0x0000001e"
+                  },
+                  "regn_bfm1n": {
+                      "lane0": "0x000000aa",
+                      "lane1": "0x000000aa"
+                  }
+              }
+          },
+          "QSFP-DD-active_cable_media_interface": {
+              "speed:400GAUI-8": {
+                  "idriver": {
+                      "lane0": "0x0000003c",
+                      "lane1": "0x0000003c",
+                      "lane2": "0x0000003c",
+                      "lane3": "0x0000003c",
+                      "lane4": "0x0000003c",
+                      "lane5": "0x0000003c",
+                      "lane6": "0x0000003c",
+                      "lane7": "0x0000003c"
+                  },
+                  "pre1": {
+                      "lane0": "0xfffffffe",
+                      "lane1": "0xfffffffe",
+                      "lane2": "0xfffffffe",
+                      "lane3": "0xfffffffe",
+                      "lane4": "0xfffffffe",
+                      "lane5": "0xfffffffe",
+                      "lane6": "0xfffffffe",
+                      "lane7": "0xfffffffe"
+                  },
+                  "pre2": {
+                      "lane0": "0x00000000",
+                      "lane1": "0x00000000",
+                      "lane2": "0x00000000",
+                      "lane3": "0x00000000",
+                      "lane4": "0x00000000",
+                      "lane5": "0x00000000",
+                      "lane6": "0x00000000",
+                      "lane7": "0x00000000"
+                  },
+                  "main": {
+                      "lane0": "0x00000020",
+                      "lane1": "0x00000020",
+                      "lane2": "0x00000020",
+                      "lane3": "0x00000020",
+                      "lane4": "0x00000020",
+                      "lane5": "0x00000020",
+                      "lane6": "0x00000020",
+                      "lane7": "0x00000020"
+                  },
+                  "post1": {
+                      "lane0": "0x00000006",
+                      "lane1": "0x00000006",
+                      "lane2": "0x00000006",
+                      "lane3": "0x00000006",
+                      "lane4": "0x00000006",
+                      "lane5": "0x00000006",
+                      "lane6": "0x00000006",
+                      "lane7": "0x00000006"
+                  },
+                  "ob_m2lp": {
+                      "lane0": "0x00000004",
+                      "lane1": "0x00000004",
+                      "lane2": "0x00000004",
+                      "lane3": "0x00000004",
+                      "lane4": "0x00000004",
+                      "lane5": "0x00000004",
+                      "lane6": "0x00000004",
+                      "lane7": "0x00000004"
+                  },
+                  "ob_alev_out": {
+                      "lane0": "0x0000000f",
+                      "lane1": "0x0000000f",
+                      "lane2": "0x0000000f",
+                      "lane3": "0x0000000f",
+                      "lane4": "0x0000000f",
+                      "lane5": "0x0000000f",
+                      "lane6": "0x0000000f",
+                      "lane7": "0x0000000f"
+                  },
+                  "obplev": {
+                      "lane0": "0x00000069",
+                      "lane1": "0x00000069",
+                      "lane2": "0x00000069",
+                      "lane3": "0x00000069",
+                      "lane4": "0x00000069",
+                      "lane5": "0x00000069",
+                      "lane6": "0x00000069",
+                      "lane7": "0x00000069"
+                  },
+                  "obnlev": {
+                      "lane0": "0x0000005f",
+                      "lane1": "0x0000005f",
+                      "lane2": "0x0000005f",
+                      "lane3": "0x0000005f",
+                      "lane4": "0x0000005f",
+                      "lane5": "0x0000005f",
+                      "lane6": "0x0000005f",
+                      "lane7": "0x0000005f"
+                  },
+                  "regn_bfm1p": {
+                      "lane0": "0x0000001e",
+                      "lane1": "0x0000001e",
+                      "lane2": "0x0000001e",
+                      "lane3": "0x0000001e",
+                      "lane4": "0x0000001e",
+                      "lane5": "0x0000001e",
+                      "lane6": "0x0000001e",
+                      "lane7": "0x0000001e"
+                  },
+                  "regn_bfm1n": {
+                      "lane0": "0x000000aa",
+                      "lane1": "0x000000aa",
+                      "lane2": "0x000000aa",
+                      "lane3": "0x000000aa",
+                      "lane4": "0x000000aa",
+                      "lane5": "0x000000aa",
+                      "lane6": "0x000000aa",
+                      "lane7": "0x000000aa"
+                  }
+              },
+              "speed:CAUI-4": {
+                  "idriver": {
+                      "lane0": "0x00000028",
+                      "lane1": "0x00000028",
+                      "lane2": "0x00000028",
+                      "lane3": "0x00000028",
+                      "lane4": "0x00000028",
+                      "lane5": "0x00000028",
+                      "lane6": "0x00000028",
+                      "lane7": "0x00000028"
+                  },
+                  "pre1": {
+                      "lane0": "0xfffffff3",
+                      "lane1": "0xfffffff3",
+                      "lane2": "0xfffffff3",
+                      "lane3": "0xfffffff3",
+                      "lane4": "0xfffffff3",
+                      "lane5": "0xfffffff3",
+                      "lane6": "0xfffffff3",
+                      "lane7": "0xfffffff3"
+                  },
+                  "pre2": {
+                      "lane0": "0x00000000",
+                      "lane1": "0x00000000",
+                      "lane2": "0x00000000",
+                      "lane3": "0x00000000",
+                      "lane4": "0x00000000",
+                      "lane5": "0x00000000",
+                      "lane6": "0x00000000",
+                      "lane7": "0x00000000"
+                  },
+                  "main": {
+                      "lane0": "0x00000033",
+                      "lane1": "0x00000033",
+                      "lane2": "0x00000033",
+                      "lane3": "0x00000033",
+                      "lane4": "0x00000033",
+                      "lane5": "0x00000033",
+                      "lane6": "0x00000033",
+                      "lane7": "0x00000033"
+                  },
+                  "post1": {
+                      "lane0": "0x00000000",
+                      "lane1": "0x00000000",
+                      "lane2": "0x00000000",
+                      "lane3": "0x00000000",
+                      "lane4": "0x00000000",
+                      "lane5": "0x00000000",
+                      "lane6": "0x00000000",
+                      "lane7": "0x00000000"
+                  },
+                  "ob_m2lp": {
+                      "lane0": "0x00000000",
+                      "lane1": "0x00000000",
+                      "lane2": "0x00000000",
+                      "lane3": "0x00000000",
+                      "lane4": "0x00000000",
+                      "lane5": "0x00000000",
+                      "lane6": "0x00000000",
+                      "lane7": "0x00000000"
+                  },
+                  "ob_alev_out": {
+                      "lane0": "0x0000000f",
+                      "lane1": "0x0000000f",
+                      "lane2": "0x0000000f",
+                      "lane3": "0x0000000f",
+                      "lane4": "0x0000000f",
+                      "lane5": "0x0000000f",
+                      "lane6": "0x0000000f",
+                      "lane7": "0x0000000f"
+                  },
+                  "obplev": {
+                      "lane0": "0x00000050",
+                      "lane1": "0x00000050",
+                      "lane2": "0x00000050",
+                      "lane3": "0x00000050",
+                      "lane4": "0x00000050",
+                      "lane5": "0x00000050",
+                      "lane6": "0x00000050",
+                      "lane7": "0x00000050"
+                  },
+                  "obnlev": {
+                      "lane0": "0x00000078",
+                      "lane1": "0x00000078",
+                      "lane2": "0x00000078",
+                      "lane3": "0x00000078",
+                      "lane4": "0x00000078",
+                      "lane5": "0x00000078",
+                      "lane6": "0x00000078",
+                      "lane7": "0x00000078"
+                  },
+                  "regn_bfm1p": {
+                      "lane0": "0x0000003c",
+                      "lane1": "0x0000003c",
+                      "lane2": "0x0000003c",
+                      "lane3": "0x0000003c",
+                      "lane4": "0x0000003c",
+                      "lane5": "0x0000003c",
+                      "lane6": "0x0000003c",
+                      "lane7": "0x0000003c"
+                  },
+                  "regn_bfm1n": {
+                      "lane0": "0x0000008c",
+                      "lane1": "0x0000008c",
+                      "lane2": "0x0000008c",
+                      "lane3": "0x0000008c",
+                      "lane4": "0x0000008c",
+                      "lane5": "0x0000008c",
+                      "lane6": "0x0000008c",
+                      "lane7": "0x0000008c"
+                  }
+              }
+          },
+          "QSFP+-active_cable_media_interface": {
+              "speed:CAUI-4": {
+                  "idriver": {
+                      "lane0": "0x00000028",
+                      "lane1": "0x00000028",
+                      "lane2": "0x00000028",
+                      "lane3": "0x00000028",
+                      "lane4": "0x00000028",
+                      "lane5": "0x00000028",
+                      "lane6": "0x00000028",
+                      "lane7": "0x00000028"
+                  },
+                  "pre1": {
+                      "lane0": "0xfffffff3",
+                      "lane1": "0xfffffff3",
+                      "lane2": "0xfffffff3",
+                      "lane3": "0xfffffff3",
+                      "lane4": "0xfffffff3",
+                      "lane5": "0xfffffff3",
+                      "lane6": "0xfffffff3",
+                      "lane7": "0xfffffff3"
+                  },
+                  "pre2": {
+                      "lane0": "0x00000000",
+                      "lane1": "0x00000000",
+                      "lane2": "0x00000000",
+                      "lane3": "0x00000000",
+                      "lane4": "0x00000000",
+                      "lane5": "0x00000000",
+                      "lane6": "0x00000000",
+                      "lane7": "0x00000000"
+                  },
+                  "main": {
+                      "lane0": "0x00000033",
+                      "lane1": "0x00000033",
+                      "lane2": "0x00000033",
+                      "lane3": "0x00000033",
+                      "lane4": "0x00000033",
+                      "lane5": "0x00000033",
+                      "lane6": "0x00000033",
+                      "lane7": "0x00000033"
+                  },
+                  "post1": {
+                      "lane0": "0x00000000",
+                      "lane1": "0x00000000",
+                      "lane2": "0x00000000",
+                      "lane3": "0x00000000",
+                      "lane4": "0x00000000",
+                      "lane5": "0x00000000",
+                      "lane6": "0x00000000",
+                      "lane7": "0x00000000"
+                  },
+                  "ob_m2lp": {
+                      "lane0": "0x00000000",
+                      "lane1": "0x00000000",
+                      "lane2": "0x00000000",
+                      "lane3": "0x00000000",
+                      "lane4": "0x00000000",
+                      "lane5": "0x00000000",
+                      "lane6": "0x00000000",
+                      "lane7": "0x00000000"
+                  },
+                  "ob_alev_out": {
+                      "lane0": "0x0000000f",
+                      "lane1": "0x0000000f",
+                      "lane2": "0x0000000f",
+                      "lane3": "0x0000000f",
+                      "lane4": "0x0000000f",
+                      "lane5": "0x0000000f",
+                      "lane6": "0x0000000f",
+                      "lane7": "0x0000000f"
+                  },
+                  "obplev": {
+                      "lane0": "0x00000050",
+                      "lane1": "0x00000050",
+                      "lane2": "0x00000050",
+                      "lane3": "0x00000050",
+                      "lane4": "0x00000050",
+                      "lane5": "0x00000050",
+                      "lane6": "0x00000050",
+                      "lane7": "0x00000050"
+                  },
+                  "obnlev": {
+                      "lane0": "0x00000078",
+                      "lane1": "0x00000078",
+                      "lane2": "0x00000078",
+                      "lane3": "0x00000078",
+                      "lane4": "0x00000078",
+                      "lane5": "0x00000078",
+                      "lane6": "0x00000078",
+                      "lane7": "0x00000078"
+                  },
+                  "regn_bfm1p": {
+                      "lane0": "0x0000003c",
+                      "lane1": "0x0000003c",
+                      "lane2": "0x0000003c",
+                      "lane3": "0x0000003c",
+                      "lane4": "0x0000003c",
+                      "lane5": "0x0000003c",
+                      "lane6": "0x0000003c",
+                      "lane7": "0x0000003c"
+                  },
+                  "regn_bfm1n": {
+                      "lane0": "0x0000008c",
+                      "lane1": "0x0000008c",
+                      "lane2": "0x0000008c",
+                      "lane3": "0x0000008c",
+                      "lane4": "0x0000008c",
+                      "lane5": "0x0000008c",
+                      "lane6": "0x0000008c",
+                      "lane7": "0x0000008c"
+                  }
+              }
+          }
+      }
+  }
+}
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/optics_si_settings.json b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/optics_si_settings.json
new file mode 100644
index 000000000..6e427a5b0
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/optics_si_settings.json
@@ -0,0 +1,108 @@
+{
+    "GLOBAL_MEDIA_SETTINGS": {
+        "1-28": {
+            "50G_SPEED": {
+                "Default": {
+                    "OutputAmplitudeTargetRx": {
+                        "OutputAmplitudeTargetRx1": 0,
+                        "OutputAmplitudeTargetRx2": 0,
+                        "OutputAmplitudeTargetRx3": 0,
+                        "OutputAmplitudeTargetRx4": 0,
+                        "OutputAmplitudeTargetRx5": 0,
+                        "OutputAmplitudeTargetRx6": 0,
+                        "OutputAmplitudeTargetRx7": 0,
+                        "OutputAmplitudeTargetRx8": 0
+                    },
+                    "OutputEqPreCursorTargetRx": {
+                        "OutputEqPreCursorTargetRx1": 0,
+                        "OutputEqPreCursorTargetRx2": 0,
+                        "OutputEqPreCursorTargetRx3": 0,
+                        "OutputEqPreCursorTargetRx4": 0,
+                        "OutputEqPreCursorTargetRx5": 0,
+                        "OutputEqPreCursorTargetRx6": 0,
+                        "OutputEqPreCursorTargetRx7": 0,
+                        "OutputEqPreCursorTargetRx8": 0
+                    },
+                    "OutputEqPostCursorTargetRx": {
+                        "OutputEqPostCursorTargetRx1": 0,
+                        "OutputEqPostCursorTargetRx2": 0,
+                        "OutputEqPostCursorTargetRx3": 0,
+                        "OutputEqPostCursorTargetRx4": 0,
+                        "OutputEqPostCursorTargetRx5": 0,
+                        "OutputEqPostCursorTargetRx6": 0,
+                        "OutputEqPostCursorTargetRx7": 0,
+                        "OutputEqPostCursorTargetRx8": 0
+                    }
+                }
+            },
+            "25G_SPEED": {
+                "Default": {
+                    "OutputAmplitudeTargetRx": {
+                        "OutputAmplitudeTargetRx1": 0,
+                        "OutputAmplitudeTargetRx2": 0,
+                        "OutputAmplitudeTargetRx3": 0,
+                        "OutputAmplitudeTargetRx4": 0,
+                        "OutputAmplitudeTargetRx5": 0,
+                        "OutputAmplitudeTargetRx6": 0,
+                        "OutputAmplitudeTargetRx7": 0,
+                        "OutputAmplitudeTargetRx8": 0
+                    },
+                    "OutputEqPreCursorTargetRx": {
+                        "OutputEqPreCursorTargetRx1": 0,
+                        "OutputEqPreCursorTargetRx2": 0,
+                        "OutputEqPreCursorTargetRx3": 0,
+                        "OutputEqPreCursorTargetRx4": 0,
+                        "OutputEqPreCursorTargetRx5": 0,
+                        "OutputEqPreCursorTargetRx6": 0,
+                        "OutputEqPreCursorTargetRx7": 0,
+                        "OutputEqPreCursorTargetRx8": 0
+                    },
+                    "OutputEqPostCursorTargetRx": {
+                        "OutputEqPostCursorTargetRx1": 0,
+                        "OutputEqPostCursorTargetRx2": 0,
+                        "OutputEqPostCursorTargetRx3": 0,
+                        "OutputEqPostCursorTargetRx4": 0,
+                        "OutputEqPostCursorTargetRx5": 0,
+                        "OutputEqPostCursorTargetRx6": 0,
+                        "OutputEqPostCursorTargetRx7": 0,
+                        "OutputEqPostCursorTargetRx8": 0
+                    }
+                }
+            },
+            "10G_SPEED": {
+                "Default": {
+                    "OutputAmplitudeTargetRx": {
+                        "OutputAmplitudeTargetRx1": 0,
+                        "OutputAmplitudeTargetRx2": 0,
+                        "OutputAmplitudeTargetRx3": 0,
+                        "OutputAmplitudeTargetRx4": 0,
+                        "OutputAmplitudeTargetRx5": 0,
+                        "OutputAmplitudeTargetRx6": 0,
+                        "OutputAmplitudeTargetRx7": 0,
+                        "OutputAmplitudeTargetRx8": 0
+                    },
+                    "OutputEqPreCursorTargetRx": {
+                        "OutputEqPreCursorTargetRx1": 0,
+                        "OutputEqPreCursorTargetRx2": 0,
+                        "OutputEqPreCursorTargetRx3": 0,
+                        "OutputEqPreCursorTargetRx4": 0,
+                        "OutputEqPreCursorTargetRx5": 0,
+                        "OutputEqPreCursorTargetRx6": 0,
+                        "OutputEqPreCursorTargetRx7": 0,
+                        "OutputEqPreCursorTargetRx8": 0
+                    },
+                    "OutputEqPostCursorTargetRx": {
+                        "OutputEqPostCursorTargetRx1": 0,
+                        "OutputEqPostCursorTargetRx2": 0,
+                        "OutputEqPostCursorTargetRx3": 0,
+                        "OutputEqPostCursorTargetRx4": 0,
+                        "OutputEqPostCursorTargetRx5": 0,
+                        "OutputEqPostCursorTargetRx6": 0,
+                        "OutputEqPostCursorTargetRx7": 0,
+                        "OutputEqPostCursorTargetRx8": 0
+                    }
+                }
+            }
+        }
+    }
+}
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/pmon_daemon_control.json b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/pmon_daemon_control.json
new file mode 120000
index 000000000..5f26f0b03
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/pmon_daemon_control.json
@@ -0,0 +1 @@
+../../x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/pmon_daemon_control.json
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/sai.profile b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/sai.profile
index 18fd34bcf..84e9021d0 100644
--- a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/sai.profile
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/sai.profile
@@ -1,3 +1,4 @@
 SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_4280.xml
 SAI_DEFAULT_SWITCHING_MODE_STORE_FORWARD=1
+SAI_INDEPENDENT_MODULE_MODE=1
 SAI_NOT_DROP_SIP_DIP_LINK_LOCAL=1
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/pmon_immediate_start b/device/mellanox/x86_64-nvidia_sn4280-r0/pmon_immediate_start
new file mode 100644
index 000000000..e69de29bb

From 40834d51ee9b31ebf89b58b176b7fa7773d6d3f3 Mon Sep 17 00:00:00 2001
From: Kebo Liu <kebol@nvidia.com>
Date: Sun, 1 Sep 2024 19:20:16 +0800
Subject: [PATCH 0954/1115] [Mellanox] Updating SDK/FW to 4.6.4082/2012.4082
 (#19579)

- Why I did it
Updating SDK/FW to 4.6.4082/2012.4082

- How I did it
updating Makefiles

- How to verify it
Running sonic-mgmt tests

Signed-off-by: Kebo Liu <kebol@nvidia.com>
---
 platform/mellanox/fw.mk  | 12 ++++++------
 platform/mellanox/sdk.mk |  2 +-
 2 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/platform/mellanox/fw.mk b/platform/mellanox/fw.mk
index c1f1311d8..1e7d02b99 100644
--- a/platform/mellanox/fw.mk
+++ b/platform/mellanox/fw.mk
@@ -21,33 +21,33 @@ MLNX_FW_BASE_PATH = $(MLNX_SDK_BASE_PATH)
 # Place an URL here to FW if you want to download FW instead
 MLNX_FW_BASE_URL =
 
-SIMX_VERSION = 24.4-1091
+SIMX_VERSION = 24.4-1098
 
 FW_FROM_URL = y
 
-MLNX_FW_ASSETS_RELEASE_TAG = fw-2012.4072
+MLNX_FW_ASSETS_RELEASE_TAG = fw-2012.4082
 MLNX_FW_ASSETS_URL = $(MLNX_ASSETS_GITHUB_URL)/releases/download/$(MLNX_FW_ASSETS_RELEASE_TAG)
 
 ifeq ($(MLNX_FW_BASE_URL), )
 MLNX_FW_BASE_URL = $(MLNX_FW_ASSETS_URL)
 endif
 
-MLNX_SPC_FW_VERSION = 13.2012.4072
+MLNX_SPC_FW_VERSION = 13.2012.4082
 MLNX_SPC_FW_FILE = fw-SPC-rel-$(subst .,_,$(MLNX_SPC_FW_VERSION))-EVB.mfa
 $(MLNX_SPC_FW_FILE)_PATH = $(MLNX_FW_BASE_PATH)
 $(MLNX_SPC_FW_FILE)_URL = $(MLNX_FW_BASE_URL)/$(MLNX_SPC_FW_FILE)
 
-MLNX_SPC2_FW_VERSION = 29.2012.4072
+MLNX_SPC2_FW_VERSION = 29.2012.4082
 MLNX_SPC2_FW_FILE = fw-SPC2-rel-$(subst .,_,$(MLNX_SPC2_FW_VERSION))-EVB.mfa
 $(MLNX_SPC2_FW_FILE)_PATH = $(MLNX_FW_BASE_PATH)
 $(MLNX_SPC2_FW_FILE)_URL = $(MLNX_FW_BASE_URL)/$(MLNX_SPC2_FW_FILE)
 
-MLNX_SPC3_FW_VERSION = 30.2012.4072
+MLNX_SPC3_FW_VERSION = 30.2012.4082
 MLNX_SPC3_FW_FILE = fw-SPC3-rel-$(subst .,_,$(MLNX_SPC3_FW_VERSION))-EVB.mfa
 $(MLNX_SPC3_FW_FILE)_PATH = $(MLNX_FW_BASE_PATH)
 $(MLNX_SPC3_FW_FILE)_URL = $(MLNX_FW_BASE_URL)/$(MLNX_SPC3_FW_FILE)
 
-MLNX_SPC4_FW_VERSION = 34.2012.4072
+MLNX_SPC4_FW_VERSION = 34.2012.4082
 MLNX_SPC4_FW_FILE = fw-SPC4-rel-$(subst .,_,$(MLNX_SPC4_FW_VERSION))-EVB.mfa
 $(MLNX_SPC4_FW_FILE)_PATH = $(MLNX_FW_BASE_PATH)
 $(MLNX_SPC4_FW_FILE)_URL = $(MLNX_FW_BASE_URL)/$(MLNX_SPC4_FW_FILE)
diff --git a/platform/mellanox/sdk.mk b/platform/mellanox/sdk.mk
index 422bb9f5f..14b0caceb 100644
--- a/platform/mellanox/sdk.mk
+++ b/platform/mellanox/sdk.mk
@@ -14,7 +14,7 @@
 # See the License for the specific language governing permissions and
 # limitations under the License.
 #
-MLNX_SDK_VERSION = 4.6.4072
+MLNX_SDK_VERSION = 4.6.4082
 MLNX_SDK_ISSU_VERSION = 101
 
 MLNX_SDK_DRIVERS_GITHUB_URL = https://github.com/Mellanox/Spectrum-SDK-Drivers

From 0b4c3a135bfea24f928174f8f5a6339e967e9458 Mon Sep 17 00:00:00 2001
From: Sudharsan Dhamal Gopalarathnam <sudharsand@nvidia.com>
Date: Mon, 2 Sep 2024 06:44:59 -0700
Subject: [PATCH 0955/1115] Revert "Revert suppress FIB pending feature
 (#19027)" (#19836)

Reverts #19027

The support for BGP zebra enhancements is merged in #19717. Hence re-enabling BGP suppress fib pending feature.
---
 .../docker-fpm-frr/frr/bgpd/bgpd.main.conf.j2 |  1 +
 .../frr/supervisord/supervisord.conf.j2       |  2 +-
 .../vs/docker-sonic-vs/supervisord.conf.j2    |  2 +-
 src/sonic-bgpcfgd/bgpcfgd/managers_bgp.py     |  5 ++--
 .../data/sonic-cfggen/bgpd.conf.j2/all.conf   |  1 +
 .../sonic-cfggen/bgpd.main.conf.j2/all.conf   |  1 +
 .../sonic-cfggen/bgpd.main.conf.j2/base.conf  |  1 +
 .../bgpd.main.conf.j2/defaults.conf           |  1 +
 .../bgpd.main.conf.j2/defaults_router_id.conf |  1 +
 .../bgpd.main.conf.j2/ipv6_lo.conf            |  1 +
 .../bgpd.main.conf.j2/lo0_ipv6_only.conf      |  1 +
 .../lo0_ipv6_only_router_id.conf              |  1 +
 .../bgpd.main.conf.j2/packet_chassis.conf     |  1 +
 .../packet_chassis_ipv6_lo4096.conf           |  1 +
 .../packet_chassis_ipv6_lo4096_router_id.conf |  1 +
 .../packet_chassis_router_id.conf             |  1 +
 .../bgpd.main.conf.j2/voq_chassis.conf        |  1 +
 .../data/sonic-cfggen/frr.conf.j2/all.conf    |  1 +
 src/sonic-config-engine/minigraph.py          |  5 ++++
 .../tests/sample_output/py2/bgpd_frr.conf     |  1 +
 .../py2/bgpd_frr_backend_asic.conf            |  1 +
 .../sample_output/py2/bgpd_frr_dualtor.conf   |  1 +
 .../py2/bgpd_frr_frontend_asic.conf           |  1 +
 .../tests/sample_output/py2/frr.conf          |  1 +
 .../sample_output/py2/t2-chassis-fe-bgpd.conf |  1 +
 .../tests/sample_output/py3/bgpd_frr.conf     |  1 +
 .../py3/bgpd_frr_backend_asic.conf            |  1 +
 .../sample_output/py3/bgpd_frr_dualtor.conf   |  1 +
 .../py3/bgpd_frr_frontend_asic.conf           |  1 +
 .../tests/sample_output/py3/frr.conf          |  1 +
 .../sample_output/py3/t2-chassis-fe-bgpd.conf |  1 +
 .../tests/device_metadata.json                | 10 +++++++
 .../tests_config/device_metadata.json         | 30 +++++++++++++++++++
 .../yang-models/sonic-device_metadata.yang    | 12 ++++++++
 34 files changed, 89 insertions(+), 4 deletions(-)

diff --git a/dockers/docker-fpm-frr/frr/bgpd/bgpd.main.conf.j2 b/dockers/docker-fpm-frr/frr/bgpd/bgpd.main.conf.j2
index 1b920e7a5..da6358a00 100644
--- a/dockers/docker-fpm-frr/frr/bgpd/bgpd.main.conf.j2
+++ b/dockers/docker-fpm-frr/frr/bgpd/bgpd.main.conf.j2
@@ -70,6 +70,7 @@ router bgp {{ DEVICE_METADATA['localhost']['bgp_asn'] }}
 !
 {% block bgp_init %}
   bgp log-neighbor-changes
+  bgp suppress-fib-pending
   no bgp default ipv4-unicast
   no bgp ebgp-requires-policy
 {% if (DEVICE_METADATA is defined) and ('localhost' in DEVICE_METADATA) and ('subtype' in DEVICE_METADATA['localhost']) and (DEVICE_METADATA['localhost']['subtype'].lower() == 'dualtor') %}
diff --git a/dockers/docker-fpm-frr/frr/supervisord/supervisord.conf.j2 b/dockers/docker-fpm-frr/frr/supervisord/supervisord.conf.j2
index 4ee96cf84..0b26be8d3 100644
--- a/dockers/docker-fpm-frr/frr/supervisord/supervisord.conf.j2
+++ b/dockers/docker-fpm-frr/frr/supervisord/supervisord.conf.j2
@@ -30,7 +30,7 @@ stderr_logfile=syslog
 dependent_startup=true
 
 [program:zebra]
-command=/usr/lib/frr/zebra -A 127.0.0.1 -s 90000000 -M dplane_fpm_nl -M snmp
+command=/usr/lib/frr/zebra -A 127.0.0.1 -s 90000000 -M dplane_fpm_nl -M snmp --asic-offload=notify_on_offload
 priority=4
 autostart=false
 autorestart=false
diff --git a/platform/vs/docker-sonic-vs/supervisord.conf.j2 b/platform/vs/docker-sonic-vs/supervisord.conf.j2
index ae32fe41d..5b988a5a5 100644
--- a/platform/vs/docker-sonic-vs/supervisord.conf.j2
+++ b/platform/vs/docker-sonic-vs/supervisord.conf.j2
@@ -164,7 +164,7 @@ environment=ASAN_OPTIONS="log_path=/var/log/asan/teammgrd-asan.log{{ asan_extra_
 {% endif %}
 
 [program:zebra]
-command=/usr/lib/frr/zebra -A 127.0.0.1 -s 90000000 -M dplane_fpm_nl
+command=/usr/lib/frr/zebra -A 127.0.0.1 -s 90000000 -M dplane_fpm_nl --asic-offload=notify_on_offload
 priority=13
 autostart=false
 autorestart=false
diff --git a/src/sonic-bgpcfgd/bgpcfgd/managers_bgp.py b/src/sonic-bgpcfgd/bgpcfgd/managers_bgp.py
index cb47d1976..0b07f9cbc 100644
--- a/src/sonic-bgpcfgd/bgpcfgd/managers_bgp.py
+++ b/src/sonic-bgpcfgd/bgpcfgd/managers_bgp.py
@@ -312,10 +312,11 @@ def apply_op(self, cmd, vrf):
         :return: True if no errors, False if there are errors
         """
         bgp_asn = self.directory.get_slot("CONFIG_DB", swsscommon.CFG_DEVICE_METADATA_TABLE_NAME)["localhost"]["bgp_asn"]
+        enable_bgp_suppress_fib_pending_cmd = 'bgp suppress-fib-pending'
         if vrf == 'default':
-            cmd = ('router bgp %s\n' % bgp_asn) + cmd
+            cmd = ('router bgp %s\n %s\n' % (bgp_asn, enable_bgp_suppress_fib_pending_cmd)) + cmd
         else:
-            cmd = ('router bgp %s vrf %s\n' % (bgp_asn, vrf)) + cmd
+            cmd = ('router bgp %s vrf %s\n %s\n' % (bgp_asn, vrf, enable_bgp_suppress_fib_pending_cmd)) + cmd
         self.cfg_mgr.push(cmd)
         return True
 
diff --git a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.conf.j2/all.conf b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.conf.j2/all.conf
index c39115706..a7f342458 100644
--- a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.conf.j2/all.conf
+++ b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.conf.j2/all.conf
@@ -55,6 +55,7 @@ route-map HIDE_INTERNAL permit 20
 router bgp 55555
 !
   bgp log-neighbor-changes
+  bgp suppress-fib-pending
   no bgp default ipv4-unicast
   no bgp ebgp-requires-policy
 !
diff --git a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/all.conf b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/all.conf
index c5ba79d34..d2dc9e40e 100644
--- a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/all.conf
+++ b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/all.conf
@@ -34,6 +34,7 @@ route-map HIDE_INTERNAL permit 10
 router bgp 55555
 !
   bgp log-neighbor-changes
+  bgp suppress-fib-pending
   no bgp default ipv4-unicast
   no bgp ebgp-requires-policy
 !
diff --git a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/base.conf b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/base.conf
index 77cc9d6ff..27d04b953 100644
--- a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/base.conf
+++ b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/base.conf
@@ -12,6 +12,7 @@ ip prefix-list PL_LoopbackV4 permit 55.55.55.55/32
 router bgp 55555
 !
   bgp log-neighbor-changes
+  bgp suppress-fib-pending
   no bgp default ipv4-unicast
   no bgp ebgp-requires-policy
 !
diff --git a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/defaults.conf b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/defaults.conf
index 00b09bd40..b85dd67a5 100644
--- a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/defaults.conf
+++ b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/defaults.conf
@@ -34,6 +34,7 @@ route-map HIDE_INTERNAL permit 10
 router bgp 55555
 !
   bgp log-neighbor-changes
+  bgp suppress-fib-pending
   no bgp default ipv4-unicast
   no bgp ebgp-requires-policy
 !
diff --git a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/defaults_router_id.conf b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/defaults_router_id.conf
index c042f00a7..96a30d0ab 100644
--- a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/defaults_router_id.conf
+++ b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/defaults_router_id.conf
@@ -34,6 +34,7 @@ route-map HIDE_INTERNAL permit 10
 router bgp 55555
 !
   bgp log-neighbor-changes
+  bgp suppress-fib-pending
   no bgp default ipv4-unicast
   no bgp ebgp-requires-policy
 !
diff --git a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/ipv6_lo.conf b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/ipv6_lo.conf
index 50414a89a..5ee5ce544 100644
--- a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/ipv6_lo.conf
+++ b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/ipv6_lo.conf
@@ -14,6 +14,7 @@ ipv6 prefix-list PL_LoopbackV6 permit fc00::1/128
 router bgp 55555
 !
   bgp log-neighbor-changes
+  bgp suppress-fib-pending
   no bgp default ipv4-unicast
   no bgp ebgp-requires-policy
 !
diff --git a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/lo0_ipv6_only.conf b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/lo0_ipv6_only.conf
index 31e0e66cb..b181dbd5e 100644
--- a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/lo0_ipv6_only.conf
+++ b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/lo0_ipv6_only.conf
@@ -32,6 +32,7 @@ route-map HIDE_INTERNAL permit 10
 router bgp 55555
 !
   bgp log-neighbor-changes
+  bgp suppress-fib-pending
   no bgp default ipv4-unicast
   no bgp ebgp-requires-policy
 !
diff --git a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/lo0_ipv6_only_router_id.conf b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/lo0_ipv6_only_router_id.conf
index f0526d739..c41fa0cfe 100644
--- a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/lo0_ipv6_only_router_id.conf
+++ b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/lo0_ipv6_only_router_id.conf
@@ -32,6 +32,7 @@ route-map HIDE_INTERNAL permit 10
 router bgp 55555
 !
   bgp log-neighbor-changes
+  bgp suppress-fib-pending
   no bgp default ipv4-unicast
   no bgp ebgp-requires-policy
 !
diff --git a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/packet_chassis.conf b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/packet_chassis.conf
index a949ce6e4..6b2e1f257 100644
--- a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/packet_chassis.conf
+++ b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/packet_chassis.conf
@@ -34,6 +34,7 @@ route-map HIDE_INTERNAL permit 10
 router bgp 55555
 !
   bgp log-neighbor-changes
+  bgp suppress-fib-pending
   no bgp default ipv4-unicast
   no bgp ebgp-requires-policy
 !
diff --git a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/packet_chassis_ipv6_lo4096.conf b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/packet_chassis_ipv6_lo4096.conf
index 81c7d0f2b..381c5b05a 100644
--- a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/packet_chassis_ipv6_lo4096.conf
+++ b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/packet_chassis_ipv6_lo4096.conf
@@ -34,6 +34,7 @@ route-map HIDE_INTERNAL permit 10
 router bgp 55555
 !
   bgp log-neighbor-changes
+  bgp suppress-fib-pending
   no bgp default ipv4-unicast
   no bgp ebgp-requires-policy
 !
diff --git a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/packet_chassis_ipv6_lo4096_router_id.conf b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/packet_chassis_ipv6_lo4096_router_id.conf
index 3acce1ffb..213872f45 100644
--- a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/packet_chassis_ipv6_lo4096_router_id.conf
+++ b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/packet_chassis_ipv6_lo4096_router_id.conf
@@ -34,6 +34,7 @@ route-map HIDE_INTERNAL permit 10
 router bgp 55555
 !
   bgp log-neighbor-changes
+  bgp suppress-fib-pending
   no bgp default ipv4-unicast
   no bgp ebgp-requires-policy
 !
diff --git a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/packet_chassis_router_id.conf b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/packet_chassis_router_id.conf
index 3acce1ffb..213872f45 100644
--- a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/packet_chassis_router_id.conf
+++ b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/packet_chassis_router_id.conf
@@ -34,6 +34,7 @@ route-map HIDE_INTERNAL permit 10
 router bgp 55555
 !
   bgp log-neighbor-changes
+  bgp suppress-fib-pending
   no bgp default ipv4-unicast
   no bgp ebgp-requires-policy
 !
diff --git a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/voq_chassis.conf b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/voq_chassis.conf
index 0d9eeebe9..efd45eda1 100644
--- a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/voq_chassis.conf
+++ b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/voq_chassis.conf
@@ -34,6 +34,7 @@ route-map HIDE_INTERNAL permit 10
 router bgp 55555
 !
   bgp log-neighbor-changes
+  bgp suppress-fib-pending
   no bgp default ipv4-unicast
   no bgp ebgp-requires-policy
 !
diff --git a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/frr.conf.j2/all.conf b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/frr.conf.j2/all.conf
index af2e974ee..8856e58db 100644
--- a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/frr.conf.j2/all.conf
+++ b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/frr.conf.j2/all.conf
@@ -71,6 +71,7 @@ route-map HIDE_INTERNAL permit 10
 router bgp 55555
 !
   bgp log-neighbor-changes
+  bgp suppress-fib-pending
   no bgp default ipv4-unicast
   no bgp ebgp-requires-policy
 !
diff --git a/src/sonic-config-engine/minigraph.py b/src/sonic-config-engine/minigraph.py
index ed557d55e..c9d060993 100644
--- a/src/sonic-config-engine/minigraph.py
+++ b/src/sonic-config-engine/minigraph.py
@@ -52,6 +52,7 @@
 console_device_types = ['MgmtTsToR']
 dhcp_server_enabled_device_types = ['BmcMgmtToRRouter']
 mgmt_device_types = ['BmcMgmtToRRouter', 'MgmtToRRouter', 'MgmtTsToR']
+leafrouter_device_types = ['LeafRouter']
 
 # Counters disabled on management devices
 mgmt_disabled_counters = ["BUFFER_POOL_WATERMARK", "PFCWD", "PG_DROP", "PG_WATERMARK", "PORT_BUFFER_DROP", "QUEUE", "QUEUE_WATERMARK"]
@@ -2707,6 +2708,10 @@ def parse_xml(filename, platform=None, port_config_file=None, asic_name=None, hw
     if current_device and current_device['type'] in mgmt_device_types:
         results["FLEX_COUNTER_TABLE"] = {counter: {"FLEX_COUNTER_STATUS": "disable"} for counter in mgmt_disabled_counters}
 
+    # Enable bgp-suppress-fib by default for leafrouter
+    if current_device and current_device['type'] in leafrouter_device_types:
+        results['DEVICE_METADATA']['localhost']['suppress-fib-pending'] = 'enabled'
+
     return results
 
 def get_tunnel_entries(tunnel_intfs, tunnel_intfs_qos_remap_config, lo_intfs, tunnel_qos_remap, mux_tunnel_name, peer_switch_ip):
diff --git a/src/sonic-config-engine/tests/sample_output/py2/bgpd_frr.conf b/src/sonic-config-engine/tests/sample_output/py2/bgpd_frr.conf
index 2c146698a..3828af13f 100644
--- a/src/sonic-config-engine/tests/sample_output/py2/bgpd_frr.conf
+++ b/src/sonic-config-engine/tests/sample_output/py2/bgpd_frr.conf
@@ -42,6 +42,7 @@ ip prefix-list LOCAL_VLAN_IPV4_PREFIX seq 10 permit 192.168.0.0/27
 router bgp 65100
 !
   bgp log-neighbor-changes
+  bgp suppress-fib-pending
   no bgp default ipv4-unicast
   no bgp ebgp-requires-policy
 !
diff --git a/src/sonic-config-engine/tests/sample_output/py2/bgpd_frr_backend_asic.conf b/src/sonic-config-engine/tests/sample_output/py2/bgpd_frr_backend_asic.conf
index d793dfa39..45cd03a54 100644
--- a/src/sonic-config-engine/tests/sample_output/py2/bgpd_frr_backend_asic.conf
+++ b/src/sonic-config-engine/tests/sample_output/py2/bgpd_frr_backend_asic.conf
@@ -53,6 +53,7 @@ route-map HIDE_INTERNAL permit 10
 router bgp 65100
 !
   bgp log-neighbor-changes
+  bgp suppress-fib-pending
   no bgp default ipv4-unicast
   no bgp ebgp-requires-policy
 !
diff --git a/src/sonic-config-engine/tests/sample_output/py2/bgpd_frr_dualtor.conf b/src/sonic-config-engine/tests/sample_output/py2/bgpd_frr_dualtor.conf
index 364a2c34b..eda11ab9f 100644
--- a/src/sonic-config-engine/tests/sample_output/py2/bgpd_frr_dualtor.conf
+++ b/src/sonic-config-engine/tests/sample_output/py2/bgpd_frr_dualtor.conf
@@ -42,6 +42,7 @@ ip prefix-list LOCAL_VLAN_IPV4_PREFIX seq 10 permit 192.168.0.0/27
 router bgp 65100
 !
   bgp log-neighbor-changes
+  bgp suppress-fib-pending
   no bgp default ipv4-unicast
   no bgp ebgp-requires-policy
   coalesce-time 10000
diff --git a/src/sonic-config-engine/tests/sample_output/py2/bgpd_frr_frontend_asic.conf b/src/sonic-config-engine/tests/sample_output/py2/bgpd_frr_frontend_asic.conf
index 94bd37e3b..8daeff2a6 100644
--- a/src/sonic-config-engine/tests/sample_output/py2/bgpd_frr_frontend_asic.conf
+++ b/src/sonic-config-engine/tests/sample_output/py2/bgpd_frr_frontend_asic.conf
@@ -53,6 +53,7 @@ route-map HIDE_INTERNAL permit 10
 router bgp 65100
 !
   bgp log-neighbor-changes
+  bgp suppress-fib-pending
   no bgp default ipv4-unicast
   no bgp ebgp-requires-policy
 !
diff --git a/src/sonic-config-engine/tests/sample_output/py2/frr.conf b/src/sonic-config-engine/tests/sample_output/py2/frr.conf
index 2653f8fc0..032adb8c5 100644
--- a/src/sonic-config-engine/tests/sample_output/py2/frr.conf
+++ b/src/sonic-config-engine/tests/sample_output/py2/frr.conf
@@ -62,6 +62,7 @@ ip prefix-list LOCAL_VLAN_IPV4_PREFIX seq 10 permit 192.168.0.0/27
 router bgp 65100
 !
   bgp log-neighbor-changes
+  bgp suppress-fib-pending
   no bgp default ipv4-unicast
   no bgp ebgp-requires-policy
 !
diff --git a/src/sonic-config-engine/tests/sample_output/py2/t2-chassis-fe-bgpd.conf b/src/sonic-config-engine/tests/sample_output/py2/t2-chassis-fe-bgpd.conf
index 20744efaa..32a9abf88 100644
--- a/src/sonic-config-engine/tests/sample_output/py2/t2-chassis-fe-bgpd.conf
+++ b/src/sonic-config-engine/tests/sample_output/py2/t2-chassis-fe-bgpd.conf
@@ -58,6 +58,7 @@ ip prefix-list PL_LoopbackV4 permit 4.0.0.0/32
 router bgp 4000
 !
   bgp log-neighbor-changes
+  bgp suppress-fib-pending
   no bgp default ipv4-unicast
   no bgp ebgp-requires-policy
 !
diff --git a/src/sonic-config-engine/tests/sample_output/py3/bgpd_frr.conf b/src/sonic-config-engine/tests/sample_output/py3/bgpd_frr.conf
index e7534d4b9..e5ad89644 100644
--- a/src/sonic-config-engine/tests/sample_output/py3/bgpd_frr.conf
+++ b/src/sonic-config-engine/tests/sample_output/py3/bgpd_frr.conf
@@ -42,6 +42,7 @@ ip prefix-list LOCAL_VLAN_IPV4_PREFIX seq 10 permit 192.168.200.0/27
 router bgp 65100
 !
   bgp log-neighbor-changes
+  bgp suppress-fib-pending
   no bgp default ipv4-unicast
   no bgp ebgp-requires-policy
 !
diff --git a/src/sonic-config-engine/tests/sample_output/py3/bgpd_frr_backend_asic.conf b/src/sonic-config-engine/tests/sample_output/py3/bgpd_frr_backend_asic.conf
index d793dfa39..45cd03a54 100644
--- a/src/sonic-config-engine/tests/sample_output/py3/bgpd_frr_backend_asic.conf
+++ b/src/sonic-config-engine/tests/sample_output/py3/bgpd_frr_backend_asic.conf
@@ -53,6 +53,7 @@ route-map HIDE_INTERNAL permit 10
 router bgp 65100
 !
   bgp log-neighbor-changes
+  bgp suppress-fib-pending
   no bgp default ipv4-unicast
   no bgp ebgp-requires-policy
 !
diff --git a/src/sonic-config-engine/tests/sample_output/py3/bgpd_frr_dualtor.conf b/src/sonic-config-engine/tests/sample_output/py3/bgpd_frr_dualtor.conf
index 4f606b808..0ada9a4f8 100644
--- a/src/sonic-config-engine/tests/sample_output/py3/bgpd_frr_dualtor.conf
+++ b/src/sonic-config-engine/tests/sample_output/py3/bgpd_frr_dualtor.conf
@@ -42,6 +42,7 @@ ip prefix-list LOCAL_VLAN_IPV4_PREFIX seq 10 permit 192.168.200.0/27
 router bgp 65100
 !
   bgp log-neighbor-changes
+  bgp suppress-fib-pending
   no bgp default ipv4-unicast
   no bgp ebgp-requires-policy
   coalesce-time 10000
diff --git a/src/sonic-config-engine/tests/sample_output/py3/bgpd_frr_frontend_asic.conf b/src/sonic-config-engine/tests/sample_output/py3/bgpd_frr_frontend_asic.conf
index 94bd37e3b..8daeff2a6 100644
--- a/src/sonic-config-engine/tests/sample_output/py3/bgpd_frr_frontend_asic.conf
+++ b/src/sonic-config-engine/tests/sample_output/py3/bgpd_frr_frontend_asic.conf
@@ -53,6 +53,7 @@ route-map HIDE_INTERNAL permit 10
 router bgp 65100
 !
   bgp log-neighbor-changes
+  bgp suppress-fib-pending
   no bgp default ipv4-unicast
   no bgp ebgp-requires-policy
 !
diff --git a/src/sonic-config-engine/tests/sample_output/py3/frr.conf b/src/sonic-config-engine/tests/sample_output/py3/frr.conf
index 5b7eacefe..d0821f1b1 100644
--- a/src/sonic-config-engine/tests/sample_output/py3/frr.conf
+++ b/src/sonic-config-engine/tests/sample_output/py3/frr.conf
@@ -62,6 +62,7 @@ ip prefix-list LOCAL_VLAN_IPV4_PREFIX seq 10 permit 192.168.200.0/27
 router bgp 65100
 !
   bgp log-neighbor-changes
+  bgp suppress-fib-pending
   no bgp default ipv4-unicast
   no bgp ebgp-requires-policy
 !
diff --git a/src/sonic-config-engine/tests/sample_output/py3/t2-chassis-fe-bgpd.conf b/src/sonic-config-engine/tests/sample_output/py3/t2-chassis-fe-bgpd.conf
index 20744efaa..32a9abf88 100644
--- a/src/sonic-config-engine/tests/sample_output/py3/t2-chassis-fe-bgpd.conf
+++ b/src/sonic-config-engine/tests/sample_output/py3/t2-chassis-fe-bgpd.conf
@@ -58,6 +58,7 @@ ip prefix-list PL_LoopbackV4 permit 4.0.0.0/32
 router bgp 4000
 !
   bgp log-neighbor-changes
+  bgp suppress-fib-pending
   no bgp default ipv4-unicast
   no bgp ebgp-requires-policy
 !
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/device_metadata.json b/src/sonic-yang-models/tests/yang_model_tests/tests/device_metadata.json
index 43100cf3a..bd3a44c37 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests/device_metadata.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests/device_metadata.json
@@ -135,6 +135,16 @@
     "DEVICE_METADATA_ADVERTISE_LO_PREFIX_AS_128": {
         "desc": "Verifying advertising lo prefix as /128."
     },
+    "DEVICE_METADATA_SUPPRESS_PENDING_FIB_ENABLED": {
+        "desc": "Enable bgp-suppress-fib-pending"
+    },
+    "DEVICE_METADATA_SUPPRESS_PENDING_FIB_DISABLED": {
+        "desc": "Disable bgp-suppress-fib-pending"
+    },
+    "DEVICE_METADATA_SUPPRESS_PENDING_FIB_ENABLED_SYNCHRONOUS_MODE_DISABLED": {
+        "desc": "Enable bgp-suppress-fib-pending when synchronous mode is disabled",
+        "eStr": ["ASIC synchronous mode must be enabled in order to enable suppress FIB pending feature"]
+    },
     "DEVICE_METADATA_VALID_RACK_MGMT_MAP": {
         "desc": "Verifying rack_mgmt_map configuration."
     },
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/device_metadata.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/device_metadata.json
index 4efaca823..3d5adcabc 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/device_metadata.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/device_metadata.json
@@ -371,6 +371,36 @@
             }
         }
     },
+    "DEVICE_METADATA_SUPPRESS_PENDING_FIB_ENABLED": {
+        "sonic-device_metadata:sonic-device_metadata": {
+            "sonic-device_metadata:DEVICE_METADATA": {
+                "sonic-device_metadata:localhost": {
+                    "synchronous_mode": "enable",
+                    "suppress-fib-pending": "enabled"
+                }
+            }
+        }
+    },
+    "DEVICE_METADATA_SUPPRESS_PENDING_FIB_DISABLED": {
+        "sonic-device_metadata:sonic-device_metadata": {
+            "sonic-device_metadata:DEVICE_METADATA": {
+                "sonic-device_metadata:localhost": {
+                    "synchronous_mode": "disable",
+                    "suppress-fib-pending": "disabled"
+                }
+            }
+        }
+    },
+    "DEVICE_METADATA_SUPPRESS_PENDING_FIB_ENABLED_SYNCHRONOUS_MODE_DISABLED": {
+        "sonic-device_metadata:sonic-device_metadata": {
+            "sonic-device_metadata:DEVICE_METADATA": {
+                "sonic-device_metadata:localhost": {
+                    "synchronous_mode": "disable",
+                    "suppress-fib-pending": "enabled"
+                }
+            }
+        }
+    },
     "DEVICE_METADATA_VALID_RACK_MGMT_MAP": {
         "sonic-device_metadata:sonic-device_metadata": {
             "sonic-device_metadata:DEVICE_METADATA": {
diff --git a/src/sonic-yang-models/yang-models/sonic-device_metadata.yang b/src/sonic-yang-models/yang-models/sonic-device_metadata.yang
index efa1d4c96..5c5abdeb1 100644
--- a/src/sonic-yang-models/yang-models/sonic-device_metadata.yang
+++ b/src/sonic-yang-models/yang-models/sonic-device_metadata.yang
@@ -212,6 +212,18 @@ module sonic-device_metadata {
                                  By default SONiC advertises /128 subnet prefix in Loopback0 as /64 subnet route";
                 }
 
+                leaf suppress-fib-pending {
+                    description "Enable BGP suppress FIB pending feature. BGP will wait for route FIB installation before announcing routes";
+                    type enumeration {
+                        enum enabled;
+                        enum disabled;
+                    }
+                    default disabled;
+
+                    must "((current() = 'disabled') or (current() = 'enabled' and ../synchronous_mode = 'enable'))" {
+                        error-message "ASIC synchronous mode must be enabled in order to enable suppress FIB pending feature";
+                    }
+                }
                 leaf rack_mgmt_map {
                     type string {
                         length 0..128 {

From 9a565fe2babc7f7de06c1e32c39a8dd936f09ff7 Mon Sep 17 00:00:00 2001
From: Sai Kiran <110003254+opcoder0@users.noreply.github.com>
Date: Tue, 3 Sep 2024 11:42:37 +1000
Subject: [PATCH 0956/1115] [docker-ptf]: Remove unused yabgp from py3only
 image  (#20086)

Why I did it
yabgp is unused and causes a force Flask downgrade (to version 1.0) in the py3only environment. This breaks ExaBGP http_api.

Work item tracking
Microsoft ADO (number only): 29207995

How I did it
Remove yabgp from the docker-ptf image for py3only case.

How to verify it
Ran PTF nightly verification test a WIP pipeline change on sonic-mgmt.

Tested branch (Please provide the tested image version)
202305

Description for the changelog
[docker-ptf]: Remove unused yabgp
* Remove unused package that causes flask downgrade in py3only image causing ExaBGP to fail
* Fix formatting

Link to config_db schema for YANG module changes
Not applicable.
---
 dockers/docker-ptf/Dockerfile.j2 | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/dockers/docker-ptf/Dockerfile.j2 b/dockers/docker-ptf/Dockerfile.j2
index d19c14418..5148dd112 100644
--- a/dockers/docker-ptf/Dockerfile.j2
+++ b/dockers/docker-ptf/Dockerfile.j2
@@ -118,7 +118,7 @@ RUN rm -rf /debs \
     && rm -fr scapy-vxlan \
 {% else %}
     && wget --https-only https://bootstrap.pypa.io/pip/get-pip.py \
-    && python get-pip.py \
+    && python3 get-pip.py \
     && rm -f get-pip.py \
 {% endif %}
     && git clone https://github.com/sflow/sflowtool \
@@ -197,7 +197,7 @@ RUN pip3 install setuptools \
     && pip3 install Flask   \
     && pip3 install exabgp \
     && pip3 install pyaml   \
-    && pip3 install pybrctl pyro4 rpyc yabgp \
+    && pip3 install pybrctl pyro4 rpyc \
     && pip3 install unittest-xml-reporting \
     && pip3 install pyrasite \
     && pip3 install python-libpcap \

From 76af66f3fc54c26795ae5fcd0f9701971fcde66b Mon Sep 17 00:00:00 2001
From: Gagan Punathil Ellath <gpunathilell@nvidia.com>
Date: Mon, 2 Sep 2024 22:33:22 -0700
Subject: [PATCH 0957/1115] [Mellanox] Test fixes and URL support for BFB
 installer (#19860)

- Why I did it
Test Fixes:
1. Changed timeout from 300 seconds to 600 seconds
2. Changes to the logic for existing rshim list
3. Changed the kill signals for sub processes from SIGTERM to SIGKILL

Features added:
1. Added url support for the installer: Image can be installed in the following method:
sonic-bfb-installer.sh -r rshim3,rshim5 -b http://server.com/path/to/image/sonic-nvidia-bluefield.bfb
---
 platform/mellanox/sonic-bfb-installer.sh | 38 ++++++++++++++++++------
 1 file changed, 29 insertions(+), 9 deletions(-)

diff --git a/platform/mellanox/sonic-bfb-installer.sh b/platform/mellanox/sonic-bfb-installer.sh
index 57930d991..8950797fe 100755
--- a/platform/mellanox/sonic-bfb-installer.sh
+++ b/platform/mellanox/sonic-bfb-installer.sh
@@ -26,12 +26,12 @@ usage(){
     echo "-c			Config file"
     echo "-h		        Help"
 }
+WORK_DIR=`mktemp -d -p "$DIR"`
 
 bfb_install_call(){
     #Example:sudo bfb-install -b <full path to image> -r rshim<id>
-    local result_file=$(mktemp "/tmp/result_file.XXXXX")
-    trap "rm -f $result_file" EXIT
-    local cmd="timeout 300s bfb-install -b $2 -r $1 $appendix"
+    local result_file=$(mktemp "${WORK_DIR}/result_file.XXXXX")
+    local cmd="timeout 600s bfb-install -b $2 -r $1 $appendix"
     echo "Installing bfb image on DPU connected to $1 using $cmd"
     local indicator="$1:"
     eval "$cmd" > "$result_file" 2>&1 > >(while IFS= read -r line; do echo "$indicator $line"; done > "$result_file")
@@ -44,7 +44,26 @@ bfb_install_call(){
     if [ $exit_status -ne 0 ] ||[ $verbose = true ]; then
         cat "$result_file"
     fi
-    rm -f $result_file
+}
+
+file_cleanup(){
+    rm -rf "$WORK_DIR"
+}
+
+is_url() {
+    local link=$1
+    if [[ $link =~ https?:// ]]; then 
+        echo "Detected URL. Downloading file"
+        filename="${WORK_DIR}/sonic-nvidia-bluefield.bfb"
+        curl -L -o "$filename" "$link"
+        res=$?
+        if test "$res" != "0"; then
+            echo "the curl command failed with: $res"
+            exit 1
+        fi
+        bfb="$filename"
+        echo "bfb path changed to $bfb"
+    fi
 }
 
 validate_rshim(){
@@ -71,8 +90,6 @@ check_for_root(){
     fi
 }
 
-
-
 main(){
     check_for_root
     local config=
@@ -104,13 +121,16 @@ main(){
         echo "Error : bfb image is not provided."
         usage
         exit 1
+    else
+        is_url $bfb
     fi
+    trap "file_cleanup" EXIT
     if [[ -f ${config} ]]; then
         echo "Using ${config} file"
         appendix="-c ${config}"
     fi
     dev_names_det+=($(
-        ls /dev/rshim* | awk -F'/' '/^\/dev\/rshim/ {gsub(/:/,"",$NF); print $NF}'
+        ls -d /dev/rshim? | awk -F'/' '{print $NF}'
     ))
     if [ "${#dev_names_det[@]}" -eq 0 ]; then
         echo "No rshim interfaces detected! Make sure to run the $command_name script from the host device/ switch!"
@@ -127,7 +147,7 @@ main(){
             echo "${dev_names_det[@]}"
         else
             IFS=',' read -ra dev_names <<< "$rshim_dev"
-            validate_rshim $dev_names
+            validate_rshim ${dev_names[@]}
         fi
     fi
     trap 'kill_ch_procs' SIGINT SIGTERM SIGHUP
@@ -148,7 +168,7 @@ kill_all_descendant_procs() {
         done
     fi
     if [[ "$self_kill" == true ]]; then
-        kill -15 "$pid" > /dev/null 2>&1
+        kill -9 "$pid" > /dev/null 2>&1
     fi
 }
 

From 3fb7de156cc6c896859c9b5d12808bbe74f8c50c Mon Sep 17 00:00:00 2001
From: Gagan Punathil Ellath <gpunathilell@nvidia.com>
Date: Mon, 2 Sep 2024 22:35:35 -0700
Subject: [PATCH 0958/1115] [Mellanox] dpuctl utility for controlling DPU power
 flows (#19863)

- Why I did it
For adding Platform API Wrapper Implementation for DPU specific reset flows.
Added functionality for
dpu-reset : Used to reboot the DPUs
dpu-status : Used to obtain the status of the DPUs (Reads relevant sysfs files related to the dpus and prints the data)
dpu-power-on: Used to power on the DPUs
dpu-power-off: Used to power off the DPUs

Options provided:
--force/-f: (Relevant for power on, power off and reset) Used to perform force power off/on , by default normal power off/on is performed
--all/-a: Used to select all the available DPUs, this is enabled by default for the dpu-status command so the option is not present for this command
--v/-v: Used to change the verbosity during a specific operation, (Prints extra messages required for debugging)

- How I did it
Added click functionality for dpuctl commands, Created a file dpuctlplat.py for interaction to all the relevant sysfs files

- How to verify it
Commands can be executed as:
dpuctl dpu-power-on dpu1,dpu2 --force
dpuctl dpu-power-off -a --force
dpuctl dpu-reset --all
dpuctl dpu-status
---
 platform/mellanox/mlnx-platform-api/setup.py  |  13 +-
 .../smart_switch/dpuctl/__init__.py           |  18 +
 .../smart_switch/dpuctl/main.py               | 193 +++++++
 .../sonic_platform/device_data.py             |  14 +
 .../sonic_platform/dpuctlplat.py              | 430 ++++++++++++++++
 .../sonic_platform/inotify_helper.py          |  61 +++
 .../tests/dpuctl_inputs/dpuctl_test_inputs.py | 143 ++++++
 .../tests/dpuctl_inputs/platform.json         |  16 +
 .../mlnx-platform-api/tests/test_dpuctl.py    | 161 ++++++
 .../tests/test_dpuctlplat.py                  | 478 ++++++++++++++++++
 10 files changed, 1525 insertions(+), 2 deletions(-)
 create mode 100644 platform/mellanox/mlnx-platform-api/smart_switch/dpuctl/__init__.py
 create mode 100644 platform/mellanox/mlnx-platform-api/smart_switch/dpuctl/main.py
 create mode 100644 platform/mellanox/mlnx-platform-api/sonic_platform/dpuctlplat.py
 create mode 100644 platform/mellanox/mlnx-platform-api/sonic_platform/inotify_helper.py
 create mode 100644 platform/mellanox/mlnx-platform-api/tests/dpuctl_inputs/dpuctl_test_inputs.py
 create mode 100644 platform/mellanox/mlnx-platform-api/tests/dpuctl_inputs/platform.json
 create mode 100644 platform/mellanox/mlnx-platform-api/tests/test_dpuctl.py
 create mode 100644 platform/mellanox/mlnx-platform-api/tests/test_dpuctlplat.py

diff --git a/platform/mellanox/mlnx-platform-api/setup.py b/platform/mellanox/mlnx-platform-api/setup.py
index 31dba9d2a..cfa39aa2b 100644
--- a/platform/mellanox/mlnx-platform-api/setup.py
+++ b/platform/mellanox/mlnx-platform-api/setup.py
@@ -1,5 +1,5 @@
 #
-# Copyright (c) 2019-2021 NVIDIA CORPORATION & AFFILIATES.
+# Copyright (c) 2019-2024 NVIDIA CORPORATION & AFFILIATES.
 # Apache-2.0
 #
 # Licensed under the Apache License, Version 2.0 (the "License");
@@ -28,15 +28,24 @@
     maintainer_email='kevinw@mellanox.com',
     packages=[
         'sonic_platform',
-        'tests'
+        'tests',
+        'smart_switch.dpuctl'
     ],
     setup_requires= [
         'pytest-runner'
     ],
+    install_requires= [
+        'inotify'
+    ],
     tests_require = [
         'pytest',
         'mock>=2.0.0'
     ],
+    entry_points={
+    'console_scripts': [
+            'dpuctl = smart_switch.dpuctl.main:dpuctl',
+    ]
+    },
     classifiers=[
         'Development Status :: 3 - Alpha',
         'Environment :: Plugins',
diff --git a/platform/mellanox/mlnx-platform-api/smart_switch/dpuctl/__init__.py b/platform/mellanox/mlnx-platform-api/smart_switch/dpuctl/__init__.py
new file mode 100644
index 000000000..0a2c565b0
--- /dev/null
+++ b/platform/mellanox/mlnx-platform-api/smart_switch/dpuctl/__init__.py
@@ -0,0 +1,18 @@
+#
+# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+from smart_switch.dpuctl import *
diff --git a/platform/mellanox/mlnx-platform-api/smart_switch/dpuctl/main.py b/platform/mellanox/mlnx-platform-api/smart_switch/dpuctl/main.py
new file mode 100644
index 000000000..7abcd2477
--- /dev/null
+++ b/platform/mellanox/mlnx-platform-api/smart_switch/dpuctl/main.py
@@ -0,0 +1,193 @@
+#
+# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+"""Click Implemenetation for dpuctl related commands"""
+from multiprocessing import Process
+from tabulate import tabulate
+try:
+    import click
+    from sonic_platform.dpuctlplat import DpuCtlPlat
+except ImportError as e:
+    raise ImportError(str(e) + '- required module not found') from e
+
+
+def call_dpu_reset(obj, force):
+    """Function to call object specific Reset for each dpu"""
+    try:
+        obj.dpu_reboot(force)
+    except Exception as error:
+        print(f"An error occurred: {type(error).__name__} - {error}")
+
+
+def call_dpu_power_on(obj, force):
+    """Function to call object specific power on for each dpu"""
+    try:
+        obj.dpu_power_on(force)
+    except Exception as error:
+        print(f"An error occurred: {type(error).__name__} - {error}")
+
+
+def call_dpu_power_off(obj, force):
+    """Function to call object specific power off for each dpu"""
+    try:
+        obj.dpu_power_off(force)
+    except Exception as error:
+        print(f"An error occurred: {type(error).__name__} - {error}")
+
+
+def call_dpu_status_update(obj):
+    """Function to call object specific status update for each dpu"""
+    try:
+        obj.dpu_status_update()
+    except Exception as error:
+        print(f"An error occurred: {type(error).__name__} - {error}")
+
+
+def validate_return_dpus(all_dpus, dpu_names, dpuctl_list):
+    """Function to validate list of dpus provided by User"""
+    if (((not all_dpus) and (dpu_names is None)) or (all_dpus and (dpu_names is not None))):
+        raise AssertionError("Invalid Arguments provided!"
+                             "Please provide either dpu_names or -all option")
+
+    if all_dpus:
+        return dpuctl_list
+    dpu_names_l = dpu_names.split(',')
+    dpu_names_l = [dpu_name.strip() for dpu_name in dpu_names_l]
+    for provided_dpu in dpu_names_l:
+        if provided_dpu not in dpuctl_list:
+            raise AssertionError("Invalid Arguments provided!"
+                                 f"{provided_dpu} does not exist!")
+    return dpu_names_l
+
+
+def execute_function_call(ctx,
+                          all_dpus,
+                          force,
+                          dpu_names,
+                          function_to_call,
+                          verbose=None):
+    """Function to fork multiple child process for each DPU
+       and call required function"""
+    try:
+        dpuctl_dict = ctx.obj['dpuctl_dict']
+        selected_dpus = validate_return_dpus(all_dpus, dpu_names, dpuctl_dict.keys())
+        selected_dpus = list(set(selected_dpus))
+        proc_list = []
+        for dpu_name, dpu_obj in dpuctl_dict.items():
+            if verbose:
+                dpu_obj.verbosity = True
+            if dpu_name in selected_dpus:
+                if function_to_call == "PW_ON":
+                    proc = Process(target=call_dpu_power_on, args=(dpu_obj, force))
+                elif function_to_call == "PW_OFF":
+                    proc = Process(target=call_dpu_power_off,
+                                   args=(dpu_obj, force))
+                elif function_to_call == "RST":
+                    proc = Process(target=call_dpu_reset, args=(dpu_obj, force))
+                proc_list.append(proc)
+        for proc in proc_list:
+            proc.start()
+        for proc in proc_list:
+            proc.join()
+    except Exception as error:
+        print(f"An error occurred: {type(error).__name__} - {error}")
+
+
+@click.group()
+@click.pass_context
+def dpuctl(ctx=None):
+    """SONiC command line - 'dpuctl' Wrapper command:
+        Smart Switch DPU reset flow commands"""
+    # Hardcoded HW-mgmt names
+    try:
+        existing_dpu_list=['dpu0', 'dpu1', 'dpu2', 'dpu3']
+        # dpu0 in Platform.json = dpu1 in HW-mgmt
+        dpuctl_dict = {}
+        for dpu_name in existing_dpu_list:
+            dpu_obj = DpuCtlPlat(dpu_name)
+            dpu_obj.setup_logger(use_print=True)
+            dpuctl_dict[dpu_name] = dpu_obj
+        context = {
+            "dpuctl_dict": dpuctl_dict,
+        }
+        ctx.obj = context
+    except Exception as error:
+        print(f"An error occurred: {type(error).__name__} - {error}")
+        ctx.exit()
+
+
+@dpuctl.command(name='dpu-reset')
+@click.option('--force', '-f', is_flag=True, default=False, help='Perform force Reboot - Turned off by default')
+@click.option('--all', '-a', 'all_dpus', is_flag=True, default=False, help='Execute for all DPUs')
+@click.argument('dpu_names', metavar='<dpu_names>', required=False)
+@click.option('--verbose', '-v', 'verbose', is_flag=True, default=False, help='Print debug messages')
+@click.pass_context
+def dpuctl_reset(ctx, force, all_dpus, verbose, dpu_names=None):
+    """Reboot individual or all DPUs"""
+    execute_function_call(ctx, all_dpus, force, dpu_names, "RST", verbose)
+
+
+@dpuctl.command(name='dpu-power-on')
+@click.option('--force', '-f', is_flag=True, default=False, help='Perform force power on - Turned off by default')
+@click.option('--all', '-a', 'all_dpus', is_flag=True, default=False, help='Execute on all DPUs')
+@click.option('--verbose', '-v', 'verbose', is_flag=True, default=False, help='Print debug messages')
+@click.argument('dpu_names', metavar='<dpu_names>', required=False)
+@click.pass_context
+def dpuctl_power_on(ctx, force, all_dpus, verbose, dpu_names=None):
+    """Power On individual or all DPUs"""
+    execute_function_call(ctx, all_dpus, force, dpu_names, "PW_ON", verbose)
+
+
+@dpuctl.command(name='dpu-power-off')
+@click.option('--force', '-f', is_flag=True, default=False, help='Perform force power off Turned of by default')
+@click.option('--all', '-a', 'all_dpus', is_flag=True, default=False, help='Execute on all DPUs')
+@click.option('--verbose', '-v', 'verbose', is_flag=True, default=False, help='Print debug messages')
+@click.argument('dpu_names', metavar='<dpu_names>', required=False)
+@click.pass_context
+def dpuctl_power_off(ctx, force, all_dpus, verbose, dpu_names=None):
+    """Power Off individual or all DPUs"""
+    execute_function_call(ctx, all_dpus, force, dpu_names, "PW_OFF", verbose)
+
+
+@dpuctl.command(name='dpu-status')
+@click.argument('dpu_names', metavar='<dpu_names>', required=False)
+@click.pass_context
+def dpuctl_get_status(ctx, all_dpus=False, dpu_names=None):
+    """Obtain current status of the DPUs"""
+    try:
+        if not dpu_names:
+            all_dpus = True
+        dpuctl_dict = ctx.obj['dpuctl_dict']
+        selected_dpus = validate_return_dpus(all_dpus, dpu_names, dpuctl_dict.keys())
+        selected_dpus = list(set(selected_dpus))
+        status_list = []
+        for dpu_name, dpu_obj in dpuctl_dict.items():
+            if dpu_name in selected_dpus:
+                call_dpu_status_update(dpu_obj)
+                dpu_status_list = [dpu_name,
+                                   dpu_obj.dpu_ready_indication,
+                                   dpu_obj.dpu_shtdn_ready_indication,
+                                   dpu_obj.boot_prog_indication]
+                status_list.append(dpu_status_list)
+        header = ['DPU', 'dpu ready', 'dpu shutdown ready', 'boot progress']
+        click.echo(tabulate(status_list, header))
+    except Exception as error:
+        print(f"An error occurred: {type(error).__name__} - {error}")
+
+
+if __name__ == '__main__':
+    dpuctl()
diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/device_data.py b/platform/mellanox/mlnx-platform-api/sonic_platform/device_data.py
index 673e6258a..e0592fd58 100644
--- a/platform/mellanox/mlnx-platform-api/sonic_platform/device_data.py
+++ b/platform/mellanox/mlnx-platform-api/sonic_platform/device_data.py
@@ -268,6 +268,20 @@ def get_linecard_max_port_count(cls):
             return 0
         return sfp_data.get('max_port_per_line_card', 0)
 
+    @classmethod
+    @utils.read_only_cache()
+    def get_platform_dpus_data(cls):
+        json_data = cls.get_platform_json_data()
+        return json_data.get('DPUS', None)
+
+    @classmethod
+    @utils.read_only_cache()
+    def get_platform_json_data(cls):
+        from sonic_py_common import device_info
+        platform_path = device_info.get_path_to_platform_dir()
+        platform_json_path = os.path.join(platform_path, 'platform.json')
+        return utils.load_json_file(platform_json_path)
+
     @classmethod
     def get_bios_component(cls):
         from .component import ComponentBIOS, ComponentBIOSSN2201
diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/dpuctlplat.py b/platform/mellanox/mlnx-platform-api/sonic_platform/dpuctlplat.py
new file mode 100644
index 000000000..12281db1e
--- /dev/null
+++ b/platform/mellanox/mlnx-platform-api/sonic_platform/dpuctlplat.py
@@ -0,0 +1,430 @@
+#
+# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+"""Class Implementation for per DPU functionality"""
+import os.path
+import time
+import multiprocessing
+import subprocess
+from contextlib import contextmanager
+from select import poll, POLLPRI, POLLIN
+from enum import Enum
+
+try:
+    from .inotify_helper import InotifyHelper
+    from sonic_py_common.syslogger import SysLogger
+    from . import utils
+except ImportError as e:
+    raise ImportError(str(e)) from e
+
+HW_BASE = "/var/run/hw-management/"
+EVENT_BASE = os.path.join(HW_BASE, "events/")
+SYSTEM_BASE = os.path.join(HW_BASE, "system/")
+PCI_BASE = "/sys/bus/pci/"
+PCI_DEV_BASE = os.path.join(PCI_BASE, "devices/")
+
+logger = SysLogger()
+
+WAIT_FOR_SHTDN = 120
+WAIT_FOR_DPU_READY = 180
+WAIT_FOR_PCI_DEV = 60
+
+
+class OperationType(Enum):
+    CLR = "0"
+    SET = "1"
+
+class BootProgEnum(Enum):
+    RST = 0
+    BL2 = 1
+    BL31 = 2
+    UEFI = 3
+    OS_START = 4
+    OS_RUN = 5
+    LOW_POWER = 6
+    FW_UPDATE = 7
+    OS_CRASH_PROG = 8
+    OS_CRASH_DONE = 9
+    FW_FAULT_PROG = 10
+    FW_FAULT_DONE = 11
+    SW_INACTIVE = 15
+
+# The rshim services are in a different order as compared to the DPU names
+dpu_map = {
+    "dpu1": {"pci_id": "0000:08:00.0", "rshim": "rshim@0"},
+    "dpu2": {"pci_id": "0000:07:00.0", "rshim": "rshim@1"},
+    "dpu3": {"pci_id": "0000:01:00.0", "rshim": "rshim@2"},
+    "dpu4": {"pci_id": "0000:02:00.0", "rshim": "rshim@3"},
+}
+
+
+class DpuCtlPlat():
+    """Class for Per DPU API Call"""
+    def __init__(self, dpu_name):
+        self.dpu_name = dpu_name
+        self._name = self.get_hwmgmt_name()
+        self.rst_path = os.path.join(SYSTEM_BASE,
+                                     f"{self._name}_rst")
+        self.pwr_path = os.path.join(SYSTEM_BASE,
+                                     f"{self._name}_pwr")
+        self.pwr_f_path = os.path.join(SYSTEM_BASE,
+                                       f"{self._name}_pwr_force")
+        self.dpu_rdy_path = os.path.join(EVENT_BASE,
+                                         f"{self._name}_ready")
+        self.shtdn_ready_path = os.path.join(EVENT_BASE,
+                                             f"{self._name}_shtdn_ready")
+        self.boot_prog_path = os.path.join(HW_BASE,
+                                           f"{self._name}/system/boot_progress")
+        self.pci_dev_path = os.path.join(PCI_DEV_BASE,
+                                         dpu_map[self._name]["pci_id"],
+                                         "remove")
+        self.boot_prog_map = {
+            BootProgEnum.RST.value: "Reset/Boot-ROM",
+            BootProgEnum.BL2.value: "BL2 (from ATF image on eMMC partition)",
+            BootProgEnum.BL31.value: "BL31 (from ATF image on eMMC partition)",
+            BootProgEnum.UEFI.value: "UEFI (from UEFI image on eMMC partition)",
+            BootProgEnum.OS_START.value: "OS Starting",
+            BootProgEnum.OS_RUN.value: "OS is running",
+            BootProgEnum.LOW_POWER.value: "Low-Power Standby",
+            BootProgEnum.FW_UPDATE.value: "FW Update in progress",
+            BootProgEnum.OS_CRASH_PROG.value: "OS Crash Dump in progress",
+            BootProgEnum.OS_CRASH_DONE.value: "OS Crash Dump is complete",
+            BootProgEnum.FW_FAULT_PROG.value: "FW Fault Crash Dump in progress",
+            BootProgEnum.FW_FAULT_DONE.value: "FW Fault Crash Dump is complete",
+            BootProgEnum.SW_INACTIVE.value: "Software is inactive"
+        }
+        self.boot_prog_state = None
+        self.shtdn_state = None
+        self.dpu_ready_state = None
+        self.setup_logger()
+        self.verbosity = False
+
+    def setup_logger(self, use_print=False):
+        if use_print:
+            self.logger_info = print
+            self.logger_error = print
+            self.logger_debug = print
+            return
+        self.logger_debug = logger.log_debug
+        self.logger_info = logger.log_info
+        self.logger_error = logger.log_error
+
+    def log_debug(self, msg=None):
+        # Print only in verbose mode
+        if self.verbosity:
+            self.logger_debug(f"{self.dpu_name}: {msg}")
+
+    def log_info(self, msg=None):
+        self.logger_info(f"{self.dpu_name}: {msg}")
+
+    def log_error(self, msg=None):
+        self.logger_error(f"{self.dpu_name}: {msg}")
+
+    def run_cmd_output(self, cmd):
+        try:
+            subprocess.check_output(cmd)
+        except Exception as err:
+            self.log_error(f"Failed to run cmd {' '.join(cmd)}")
+            raise err
+
+    def dpu_pre_shutdown(self):
+        """Method to execute shutdown activities for the DPU"""
+        self.dpu_rshim_service_control("stop")
+        self.dpu_pci_remove()
+
+    def dpu_post_startup(self):
+        """Method to execute all post startup activities for the DPU"""
+        self.dpu_pci_scan()
+        self.wait_for_pci()
+        self.dpu_rshim_service_control("start")
+
+    def dpu_rshim_service_control(self, set_state):
+        """Start/Stop the RSHIM service for the current DPU"""
+        try:
+            cmd = ['systemctl', set_state, dpu_map[self.get_hwmgmt_name()]['rshim'] + ".service"]
+            self.run_cmd_output(cmd)
+            self.log_debug(f"Executed rshim service command: {' '.join(cmd)}")
+        except Exception:
+            self.log_error(f"Failed to start rshim!")
+
+    @contextmanager
+    def get_open_fd(self, path, flag):
+        fd = os.open(path, flag)
+        try:
+            yield fd
+        finally:
+            os.close(fd)
+
+    def wait_for_pci(self):
+        """Wait for the PCI device folder in the PCI Path, required before starting rshim"""
+        try:
+            with self.get_open_fd(PCI_DEV_BASE, os.O_RDONLY) as dir_fd:
+                if os.path.exists(os.path.dirname(self.pci_dev_path)):
+                    return True
+                poll_obj = poll()
+                poll_obj.register(dir_fd, POLLIN)
+                start = time.time()
+                while (time.time() - start) < WAIT_FOR_PCI_DEV:
+                    events = poll_obj.poll(WAIT_FOR_PCI_DEV * 1000)
+                    if events:
+                        if os.path.exists(os.path.dirname(self.pci_dev_path)):
+                            return True
+                return os.path.exists(os.path.dirname(self.pci_dev_path))
+        except Exception:
+            self.log_error("Unable to wait for PCI device")
+
+    def write_file(self, file_name, content_towrite):
+        """Write given value to file only if file exists"""
+        try:
+            utils.write_file(file_name, content_towrite, raise_exception=True)
+        except Exception as e:
+            self.log_error(f'Failed to write {content_towrite} to file {file_name}')
+            raise type(e)(f"{self.dpu_name}:{str(e)}")
+        return True
+
+    def get_hwmgmt_name(self):
+        """Return name of the DPU in the HW Management mapping"""
+        return f"{self.dpu_name[:3]}{str(int(self.dpu_name[3:])+1)}"
+
+    def dpu_go_down(self):
+        """Per DPU going down API"""
+        self.write_file(self.rst_path, OperationType.CLR.value)
+        try:
+            get_shtdn_inotify = InotifyHelper(self.shtdn_ready_path)
+            with self.time_check_context("going down"):
+                dpu_shtdn_rdy = get_shtdn_inotify.wait_watch(WAIT_FOR_SHTDN, 1)
+        except (FileNotFoundError, PermissionError) as inotify_exc:
+            raise type(inotify_exc)(f"{self.dpu_name}:{str(inotify_exc)}")
+        if not dpu_shtdn_rdy:
+            self.log_error(f"Going Down Unsuccessful")
+            return False
+        return True
+
+    def _power_off(self):
+        """Per DPU Power off private function"""
+        if not self.dpu_go_down():
+            return self._power_off_force()
+        self.write_file(self.pwr_path, OperationType.CLR.value)
+        self.log_info(f"Power Off complete")
+        return True
+
+    def _power_off_force(self):
+        """Per DPU Force Power off private function"""
+        self.write_file(self.rst_path, OperationType.CLR.value)
+        self.write_file(self.pwr_f_path, OperationType.CLR.value)
+        self.log_info(f"Force Power Off complete")
+        return True
+
+    def _power_on_force(self, count=4):
+        """Per DPU Power on with force private function"""
+        if count < 4:
+            self.log_error(f"Failed Force Power on! Retry {4-count}..")
+        self.write_file(self.pwr_f_path, OperationType.SET.value)
+        self.write_file(self.rst_path, OperationType.SET.value)
+        get_rdy_inotify = InotifyHelper(self.dpu_rdy_path)
+        with self.time_check_context("power on force"):
+            dpu_rdy = get_rdy_inotify.wait_watch(WAIT_FOR_DPU_READY, 1)
+        if not dpu_rdy:
+            if count > 1:
+                time.sleep(1)
+                self._power_off_force()
+                return self._power_on_force(count=count - 1)
+            self.log_error(f"Failed Force power on! Exiting")
+            return False
+        self.log_info(f"Force Power on Successful!")
+        return True
+
+    def _power_on(self):
+        """Per DPU Power on without force private function"""
+        self.write_file(self.pwr_path, OperationType.SET.value)
+        self.write_file(self.rst_path, OperationType.SET.value)
+        get_rdy_inotify = InotifyHelper(self.dpu_rdy_path)
+        with self.time_check_context("power on"):
+            dpu_rdy = get_rdy_inotify.wait_watch(WAIT_FOR_DPU_READY, 1)
+        if not dpu_rdy:
+            self.log_error(f"Failed power on! Trying Force Power on")
+            self._power_off_force()
+            return self._power_on_force()
+        self.log_info(f"Power on Successful!")
+        return True
+
+    def dpu_pci_remove(self):
+        """Per DPU PCI remove API"""
+        try:
+            self.write_file(self.pci_dev_path, OperationType.SET.value)
+        except Exception:
+            self.log_info(f"Failed PCI Removal!")
+
+    def dpu_pci_scan(self):
+        """PCI Scan API"""
+        pci_scan_path = "/sys/bus/pci/rescan"
+        self.write_file(pci_scan_path, OperationType.SET.value)
+
+    def dpu_power_on(self, forced=False):
+        """Per DPU Power on API"""
+        with self.boot_prog_context():
+            self.log_info(f"Power on with force = {forced}")
+            if forced:
+                return_value = self._power_on_force()
+            else:
+                return_value = self._power_on()
+            self.dpu_post_startup()
+            return return_value
+
+    def dpu_power_off(self, forced=False):
+        """Per DPU Power off API"""
+        with self.boot_prog_context():
+            self.dpu_pre_shutdown()
+            self.log_info(f"Power off with force = {forced}")
+            if forced:
+                return self._power_off_force()
+            elif self.read_boot_prog() != BootProgEnum.OS_RUN.value:
+                self.log_info(f"Power off with force = True since since OS is not in running state on DPU")
+                return self._power_off_force()
+            return self._power_off()
+
+    def _reboot(self):
+        """Per DPU Reboot Private function API"""
+        if not self.dpu_go_down():
+            self._power_off_force()
+        self.write_file(self.rst_path, OperationType.SET.value)
+        get_rdy_inotify = InotifyHelper(self.dpu_rdy_path)
+        with self.time_check_context("power on"):
+            dpu_rdy = get_rdy_inotify.wait_watch(WAIT_FOR_DPU_READY, 1)
+        return_value = True
+        if not dpu_rdy:
+            self._power_off_force()
+            return_value = self._power_on_force()
+        return return_value
+
+    def _reboot_force(self):
+        """Per DPU Force Reboot Private function API"""
+        self._power_off_force()
+        return_value = self._power_on_force()
+        return return_value
+
+    def dpu_reboot(self, forced=False):
+        """Per DPU Power on API"""
+        with self.boot_prog_context():
+            self.dpu_pre_shutdown()
+            self.log_info(f"Reboot with force = {forced}")
+            if forced:
+                return_value = self._reboot_force()
+            elif self.read_boot_prog() != BootProgEnum.OS_RUN.value:
+                self.log_info(f"Reboot with force = True since OS is not in running state on DPU")
+                return_value = self._reboot_force()
+            else:
+                return_value = self._reboot()
+            self.dpu_post_startup()
+            if return_value:
+                self.log_info("Reboot Complete")
+            return return_value
+
+    def dpu_boot_prog_update(self, read_value=None):
+        """Monitor and read changes to boot_progress sysfs file and map it to corresponding indication"""
+        try:
+            if read_value:
+                self.boot_prog_state = read_value
+            else:
+                self.boot_prog_state = self.read_boot_prog()
+            self.boot_prog_indication = f"{self.boot_prog_state} - {self.boot_prog_map.get(self.boot_prog_state,'N/A')}"
+        except Exception as e:
+            self.log_error(f"Could not update boot_progress of DPU")
+            raise e
+
+    def dpu_ready_update(self):
+        """Monitor and read changes to dpu_ready sysfs file and map it to corresponding indication"""
+        try:
+            self.dpu_ready_state = utils.read_int_from_file(self.dpu_rdy_path,
+                                                            raise_exception=True)
+            self.dpu_ready_indication = f"{False if self.dpu_ready_state == 0 else True if self.dpu_ready_state == 1 else str(self.dpu_ready_state)+' - N/A'}"
+        except Exception as e:
+            self.log_error(f"Could not update dpu_ready for DPU")
+            raise e
+
+    def dpu_shtdn_ready_update(self):
+        """Monitor and read changes to dpu_shtdn_ready sysfs file and map it to corresponding indication"""
+        try:
+            self.dpu_shtdn_ready_state = utils.read_int_from_file(self.shtdn_ready_path,
+                                                                  raise_exception=True)
+            self.dpu_shtdn_ready_indication = f"{False if self.dpu_shtdn_ready_state == 0 else True if self.dpu_shtdn_ready_state == 1 else str(self.dpu_shtdn_ready_state)+' - N/A'}"
+        except Exception as e:
+            self.log_error(f"Could not update dpu_shtdn_ready for DPU")
+            raise e
+
+    def dpu_status_update(self):
+        """Update status for all the three relevant sysfs files for DPU monitoring"""
+        try:
+            self.dpu_boot_prog_update()
+            self.dpu_ready_update()
+            self.dpu_shtdn_ready_update()
+        except Exception as e:
+            self.log_error(f"Could not obtain status of DPU")
+            raise e
+
+    def read_boot_prog(self):
+        return utils.read_int_from_file(self.boot_prog_path, raise_exception=True)
+
+    def update_boot_prog_once(self, poll_var):
+        """Read boot_progress and update the value once """
+        poll_var.poll()
+        read_value = self.read_boot_prog()
+        if read_value != self.boot_prog_state:
+            self.dpu_boot_prog_update(read_value)
+            self.log_error(f"The boot_progress status is changed to = {self.boot_prog_indication}")
+
+    def watch_boot_prog(self):
+        """Read boot_progress and update the value in an infinite loop"""
+        try:
+            self.dpu_boot_prog_update()
+            self.log_info(f"The initial boot_progress status is = {self.boot_prog_indication}")
+            file = open(self.boot_prog_path, "r")
+            p = poll()
+            p.register(file.fileno(), POLLPRI)
+            while True:
+                self.update_boot_prog_once(p)
+        except Exception:
+            self.log_error(f"Exception occured during watch_boot_progress!")
+
+    @contextmanager
+    def boot_prog_context(self):
+        """Context manager for boot_progress update"""
+        if self.verbosity:
+            self.boot_prog_proc = None
+            try:
+                self.boot_prog_proc = multiprocessing.Process(target=self.watch_boot_prog)
+                self.boot_prog_proc.start()
+                yield
+            except Exception:
+                self.log_error(f"Exception occured during creating boot_prog_context manager!")
+                yield
+            finally:
+                if self.boot_prog_proc and self.boot_prog_proc.is_alive():
+                    self.boot_prog_proc.terminate()
+                    self.boot_prog_proc.join()
+        else:
+            yield
+
+    @contextmanager
+    def time_check_context(self, msg):
+        if self.verbosity:
+            start_time = time.time()
+            yield
+            end_time = time.time()
+            self.log_info(f"Total time taken = {end_time - start_time} for {msg}")
+            return
+        yield
diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/inotify_helper.py b/platform/mellanox/mlnx-platform-api/sonic_platform/inotify_helper.py
new file mode 100644
index 000000000..b3ddae905
--- /dev/null
+++ b/platform/mellanox/mlnx-platform-api/sonic_platform/inotify_helper.py
@@ -0,0 +1,61 @@
+#
+# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+"""Helper code for Inotify Implementation for reading file until timeout"""
+import os
+import errno
+import inotify.adapters
+
+try:
+    from sonic_py_common.syslogger import SysLogger
+    from . import utils
+except ImportError as e:
+    raise ImportError(str(e) + '- required module not found') from e
+
+logger = SysLogger()
+
+
+class InotifyHelper():
+    """Helper Code for Inotify Implmentation"""
+    def __init__(self, file_path):
+        self.file_path = file_path
+        self.inotify_obj = inotify.adapters.Inotify()
+        if not self.inotify_obj:
+            logger.log_error("INOTIFY adapter error!")
+            raise RuntimeError("INOTIFY is not present!")
+        if not os.path.exists(self.file_path):
+            logger.log_error(f"{self.file_path} does not exist")
+            raise FileNotFoundError(errno.ENOENT,
+                                    os.strerror(errno.ENOENT),
+                                    self.file_path)
+
+    def wait_watch(self, timeout, expected_value):
+        """Waits for changes in file until specified time and
+          compares written value to expected value"""
+        self.inotify_obj.add_watch(self.file_path,
+                                   mask=inotify.constants.IN_CLOSE_WRITE)
+        for event in self.inotify_obj.event_gen(timeout_s=timeout,
+                                                yield_nones=False):
+            read_value = utils.read_int_from_file(self.file_path,
+                                                  raise_exception=True)
+            if read_value == expected_value:
+                return read_value
+        read_value = utils.read_int_from_file(self.file_path,
+                                              raise_exception=True)
+        if read_value != expected_value:
+            return None
+        return read_value
diff --git a/platform/mellanox/mlnx-platform-api/tests/dpuctl_inputs/dpuctl_test_inputs.py b/platform/mellanox/mlnx-platform-api/tests/dpuctl_inputs/dpuctl_test_inputs.py
new file mode 100644
index 000000000..ad71d26c9
--- /dev/null
+++ b/platform/mellanox/mlnx-platform-api/tests/dpuctl_inputs/dpuctl_test_inputs.py
@@ -0,0 +1,143 @@
+#
+# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+"""Input Data for dpuctl tests"""
+testData = {
+             'PW_OFF': {'AssertionError':
+                        {'arg_list': [['dpu5'],
+                                      ['dpu1', '--all'],
+                                      ['dpu1,dpu2,dpu3,dpu5'],
+                                      ['dpu5', '--all'],
+                                      ['dpu5', '--all', '--force'],
+                                      ]},
+                        'Returncheck':
+                        {'arg_list': [['dpu1'],
+                                      ['dpu1, dpu2,dpu3', '--force'],
+                                      ['--all', '--force'],
+                                      ['dpu4', '--path'],
+                                      ['--all', '--test'],
+                                      ],
+                         'rc': [0, 0, 0, 2, 2],
+                         'return_message': ["",
+                                            "",
+                                            "",
+                                            "Usage: dpu-power-off [OPTIONS]"
+                                            " <dpu_names>\n"
+                                            "Try 'dpu-power-off --help' for"
+                                            " help.\n\nError: "
+                                            "No such option: --path\n",
+                                            "Usage: dpu-power-off [OPTIONS] "
+                                            "<dpu_names>\n"
+                                            "Try 'dpu-power-off --help' for"
+                                            " help.\n\n"
+                                            "Error: No such option: --test\n"],
+                         }
+                        },
+             'PW_ON': {'AssertionError':
+                       {'arg_list': [['dpu5'],
+                                     ['dpu1', '--all'],
+                                     ['dpu1,dpu2,dpu3,dpu5'],
+                                     ['dpu5', '--all'],
+                                     ['dpu5', '--all', '--force'],
+                                     ]},
+                       'Returncheck':
+                       {'arg_list': [['dpu1'],
+                                     ['dpu1,dpu2,dpu3', '--force'],
+                                     ['--all'],
+                                     ['--all', '--force'],
+                                     ['dpu4', '--path'],
+                                     ['--all', '--test'],
+                                     ],
+                        'rc': [0, 0, 0, 0, 2, 2],
+                        'return_message': ["",
+                                           "",
+                                           "",
+                                           "",
+                                           "Usage: dpu-power-on [OPTIONS]"
+                                           " <dpu_names>\n"
+                                           "Try 'dpu-power-on --help'"
+                                           " for help.\n\nError: "
+                                           "No such option: --path\n",
+                                           "Usage: dpu-power-on [OPTIONS]"
+                                           " <dpu_names>\n"
+                                           "Try 'dpu-power-on --help'"
+                                           " for help.\n\nError: "
+                                           "No such option: --test\n"],
+                        }
+                       },
+             'RST': {'AssertionError':
+                     {'arg_list': [['dpu5'],
+                                   ['dpu1', '--all'],
+                                   ['dpu1,dpu2,dpu3,dpu5'],
+                                   ['dpu5', '--all'],
+                                   ['dpu1,dpu5', '--all'],
+                                   ]},
+                     'Returncheck':
+                     {'arg_list': [['dpu1'],
+                                   ['dpu1,dpu2,dpu3', '--force'],
+                                   ['--all'],
+                                   ['--all', '--test'],
+                                   ['dpu1,dpu2,dpu3'],
+                                   ['--all', '--test'],
+                                   ],
+                      'rc': [0, 0, 0, 2, 0, 2],
+                      'return_message': ["",
+                                         "",
+                                         "",
+                                         "Usage: dpu-reset [OPTIONS]"
+                                         " <dpu_names>\n"
+                                         "Try 'dpu-reset --help' for help."
+                                         "\n\nError: "
+                                         "No such option: --test\n",
+                                         "",
+                                         "Usage: dpu-reset [OPTIONS]"
+                                         " <dpu_names>\n"
+                                         "Try 'dpu-reset --help' for help."
+                                         "\n\nError: "
+                                         "No such option: --test\n"],
+                      }
+                     },
+}
+
+status_output = ["""DPU    dpu ready    dpu shutdown ready    boot progress
+-----  -----------  --------------------  -----------------
+dpu0   True         False                 5 - OS is running
+dpu1   True         False                 5 - OS is running
+dpu2   True         False                 5 - OS is running
+dpu3   True         False                 5 - OS is running
+""",
+                 """DPU    dpu ready    dpu shutdown ready    boot progress
+-----  -----------  --------------------  -----------------
+dpu1   True         False                 5 - OS is running
+""",
+                 """DPU    dpu ready    dpu shutdown ready    boot progress
+-----  -----------  --------------------  -----------------
+dpu0   True         False                 5 - OS is running
+""",
+                 """An error occurred: AssertionError - Invalid Arguments provided!dpu5 does not exist!
+""",
+                 """An error occurred: AssertionError - Invalid Arguments provided!dpu10 does not exist!
+""",
+                 """DPU    dpu ready    dpu shutdown ready    boot progress
+-----  -----------  --------------------  ------------------
+dpu0   False        True                  0 - Reset/Boot-ROM
+dpu1   False        True                  0 - Reset/Boot-ROM
+dpu2   False        True                  0 - Reset/Boot-ROM
+dpu3   False        True                  0 - Reset/Boot-ROM
+""",
+                 ["dpu1", "True", "False"],
+                 ]
diff --git a/platform/mellanox/mlnx-platform-api/tests/dpuctl_inputs/platform.json b/platform/mellanox/mlnx-platform-api/tests/dpuctl_inputs/platform.json
new file mode 100644
index 000000000..7af93ee06
--- /dev/null
+++ b/platform/mellanox/mlnx-platform-api/tests/dpuctl_inputs/platform.json
@@ -0,0 +1,16 @@
+{
+    "DPUS": {
+        "dpu0": {
+            "midplane_interface":  "dpu0"
+        },
+        "dpu1": {
+            "midplane_interface":  "dpu1"
+        },
+        "dpu2": {
+            "midplane_interface":  "dpu2"
+        },
+        "dpu3": {
+            "midplane_interface":  "dpu3"
+        }
+    }
+}
\ No newline at end of file
diff --git a/platform/mellanox/mlnx-platform-api/tests/test_dpuctl.py b/platform/mellanox/mlnx-platform-api/tests/test_dpuctl.py
new file mode 100644
index 000000000..7f6d2be78
--- /dev/null
+++ b/platform/mellanox/mlnx-platform-api/tests/test_dpuctl.py
@@ -0,0 +1,161 @@
+#
+# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+"""dpuctl Tests Implementation"""
+import os
+import sys
+import json
+from tabulate import tabulate
+
+from click.testing import CliRunner
+from smart_switch.dpuctl.main import dpuctl, dpuctl_get_status, dpuctl_power_off, dpuctl_power_on, dpuctl_reset
+from sonic_platform.dpuctlplat import DpuCtlPlat
+from tests.dpuctl_inputs.dpuctl_test_inputs import testData, status_output
+
+if sys.version_info.major == 3:
+    from unittest.mock import MagicMock, patch
+
+
+test_path = os.path.dirname(os.path.abspath(__file__))
+modules_path = os.path.dirname(test_path)
+sys.path.insert(0, modules_path)
+scripts_path = os.path.join(modules_path, "scripts")
+test_ip = os.path.join(modules_path, "tests")
+example_platform = os.path.join(str(test_ip), "dpuctl_inputs", "platform.json")
+
+
+def create_dpu_list():
+    """Create dpu object list for Function calls"""
+    existing_dpu_list = ['dpu0', 'dpu1', 'dpu2', 'dpu3']
+    dpuctl_dict = {}
+    for dpu_name in existing_dpu_list:
+        dpuctl_dict[dpu_name] = DpuCtlPlat(dpu_name)
+    context = {
+        "dpuctl_dict": dpuctl_dict,
+    }
+    return context
+
+
+obj = create_dpu_list()
+
+
+def dpuctl_command_exec(exec_cmd, command_name):
+    """General Command Execution and return value
+        validation function for all the APIs"""
+    test_data_checks = testData[command_name]
+    runner = CliRunner()
+    assertion_checks = test_data_checks['AssertionError']
+    for args in assertion_checks['arg_list']:
+        result = runner.invoke(exec_cmd, args, catch_exceptions=False, obj=obj)
+        assert "AssertionError" in result.output
+
+    result_checks = test_data_checks['Returncheck']
+    for index_value in range(len(result_checks['arg_list'])):
+        print(index_value)
+        args = result_checks['arg_list'][index_value]
+        return_code = result_checks['rc'][index_value]
+        return_message = result_checks['return_message'][index_value]
+        return_message = return_message.replace('"', "'").lower()
+        result = runner.invoke(exec_cmd, args, catch_exceptions=False, obj=obj)
+        assert result.exit_code == return_code
+        assert return_message == result.output.replace('"', "'").lower()
+
+
+class Testdpuctl:
+    """Tests for dpuctl Platform API Wrapper"""
+    @classmethod
+    def setup_class(cls):
+        """Setup function for all tests for dpuctl implementation"""
+        os.environ["PATH"] += os.pathsep + scripts_path
+        os.environ["MLNX_PLATFORM_API_DPUCTL_UNIT_TESTING"] = "2"
+
+    @patch('multiprocessing.Process.start', MagicMock(return_value=True))
+    @patch('multiprocessing.Process.join', MagicMock(return_value=True))
+    def test_dpuctl_power_off(self):
+        """Tests for dpuctl click Implementation for Power Off API"""
+        exec_cmd = dpuctl_power_off
+        dpuctl_command_exec(exec_cmd, "PW_OFF")
+
+    @patch('multiprocessing.Process.start', MagicMock(return_value=True))
+    @patch('multiprocessing.Process.join', MagicMock(return_value=True))
+    def test_dpuctl_power_on(self):
+        """Tests for dpuctl click Implementation for Power On API"""
+        exec_cmd = dpuctl_power_on
+        dpuctl_command_exec(exec_cmd, "PW_ON")
+
+    @patch('multiprocessing.Process.start', MagicMock(return_value=True))
+    @patch('multiprocessing.Process.join', MagicMock(return_value=True))
+    def test_dpuctl_reset(self):
+        """Tests for dpuctl click Implementation for Reset API"""
+        exec_cmd = dpuctl_reset
+        dpuctl_command_exec(exec_cmd, "RST")
+
+    def test_dpuctl_status(self):
+        """Tests for dpuctl click Implementation for Status API"""
+        mock_file_list = ['shtdn_ready', '_ready', 'boot_progress']
+        mock_return_value = [0, 1, 5]
+
+        def mock_read_int_from_file(file_path, default=0, raise_exception=False, log_func=None):
+            for index, value in enumerate(mock_file_list):
+                if file_path.endswith(value):
+                    return mock_return_value[index]
+            return 0
+
+        with patch("sonic_platform.utils.read_int_from_file", wraps=mock_read_int_from_file):
+            cmd = dpuctl_get_status
+            runner = CliRunner()
+            result = runner.invoke(cmd, catch_exceptions=False, obj=obj)
+            assert result.output == status_output[0]
+            result = runner.invoke(cmd, ['dpu1'], catch_exceptions=False, obj=obj)
+            assert result.output == status_output[1]
+            result = runner.invoke(cmd, ['dpu0'], catch_exceptions=False, obj=obj)
+            assert result.output == status_output[2]
+            result = runner.invoke(cmd, ['dpu5'], catch_exceptions=False, obj=obj)
+            assert result.output == status_output[3]
+            result = runner.invoke(cmd, ['dpu10'], catch_exceptions=False, obj=obj)
+            assert result.output == status_output[4]
+            mock_return_value = [1, 0, 0]
+            result = runner.invoke(cmd, catch_exceptions=False, obj=obj)
+            assert result.output == status_output[5]
+            header = ["DPU", "dpu ready", "dpu shutdown ready", "boot progress"]
+            boot_prog_map = {
+                0: "Reset/Boot-ROM",
+                1: "BL2 (from ATF image on eMMC partition)",
+                2: "BL31 (from ATF image on eMMC partition)",
+                3: "UEFI (from UEFI image on eMMC partition)",
+                4: "OS Starting",
+                5: "OS is running",
+                6: "Low-Power Standby",
+                7: "FW Update in progress",
+                8: "OS Crash Dump in progress",
+                9: "OS Crash Dump is complete",
+                10: "FW Fault Crash Dump in progress",
+                11: "FW Fault Crash Dump is complete",
+                15: "Software is inactive"
+            }
+            for key in boot_prog_map.keys():
+                mock_return_value = [0, 1, key]
+                result = runner.invoke(cmd, ['dpu1'], catch_exceptions=False, obj=obj)
+                expected_value = f"{key} - {boot_prog_map.get(key)}"
+                expected_data = [[status_output[6][0], status_output[6][1], status_output[6][2], expected_value]]
+                expected_res = tabulate(expected_data, header)
+                assert result.output == expected_res + "\n"
+            mock_return_value = [5, 5, 25]
+            expected_data = [["dpu1", "5 - N/A", "5 - N/A", "25 - N/A"]]
+            result = runner.invoke(cmd, ['dpu1'], catch_exceptions=False, obj=obj)
+            expected_res = tabulate(expected_data, header)
+            assert result.output == expected_res + "\n"
diff --git a/platform/mellanox/mlnx-platform-api/tests/test_dpuctlplat.py b/platform/mellanox/mlnx-platform-api/tests/test_dpuctlplat.py
new file mode 100644
index 000000000..7340a0041
--- /dev/null
+++ b/platform/mellanox/mlnx-platform-api/tests/test_dpuctlplat.py
@@ -0,0 +1,478 @@
+#
+# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+"""dpuctlplat Tests Implementation"""
+import os
+import sys
+import pytest
+from sonic_platform.dpuctlplat import DpuCtlPlat, dpu_map, BootProgEnum
+
+from unittest.mock import MagicMock, patch, Mock, call
+
+test_path = os.path.dirname(os.path.abspath(__file__))
+modules_path = os.path.dirname(test_path)
+sys.path.insert(0, modules_path)
+scripts_path = os.path.join(modules_path, "scripts")
+
+
+def create_dpu_list():
+    """Create dpu object list for Function calls"""
+    existing_dpu_list = ['dpu0', 'dpu1', 'dpu2', 'dpu3']
+    dpuctl_list = []
+    for dpu_name in existing_dpu_list:
+        dpuctl_obj = DpuCtlPlat(dpu_name)
+        dpuctl_obj.setup_logger(True)
+        dpuctl_list.append(dpuctl_obj)
+    context = {
+        "dpuctl_list": dpuctl_list,
+    }
+    return context
+
+
+obj = create_dpu_list()
+
+
+class TestDpuClass:
+    """Tests for dpuctl Platform API Wrapper"""
+    @classmethod
+    def setup_class(cls):
+        """Setup function for all tests for dpuctl implementation"""
+        os.environ["PATH"] += os.pathsep + scripts_path
+        os.environ["MLNX_PLATFORM_API_DPUCTL_UNIT_TESTING"] = "2"
+
+    @patch('os.path.exists', MagicMock(return_value=True))
+    @patch('multiprocessing.Process.start', MagicMock(return_value=True))
+    @patch('multiprocessing.Process.is_alive', MagicMock(return_value=False))
+    @patch('sonic_platform.inotify_helper.InotifyHelper.wait_watch')
+    @patch('sonic_platform.inotify_helper.InotifyHelper.__init__')
+    @patch('subprocess.check_output', MagicMock(return_value=True))
+    def test_power_off(self, mock_inotify, mock_add_watch):
+        """Tests for Per DPU Power Off function"""
+        dpuctl_obj = obj["dpuctl_list"][0]
+        mock_inotify.return_value = None
+        mock_add_watch.return_value = True
+        written_data = []
+
+        def mock_write_file(file_name, content_towrite):
+            written_data.append({"file": file_name,
+                                 "data": content_towrite})
+            return True
+        with patch.object(dpuctl_obj, 'write_file', wraps=mock_write_file), \
+             patch.object(dpuctl_obj, 'read_boot_prog', MagicMock(return_value=BootProgEnum.OS_RUN.value)):
+            assert dpuctl_obj.dpu_power_off(True)
+            assert written_data[0]["file"].endswith(
+                f"{dpu_map.get(dpuctl_obj.get_hwmgmt_name()).get('pci_id')}/remove")
+            assert "1" == written_data[0]["data"]
+            assert "0" == written_data[1]["data"]
+            assert written_data[1]["file"].endswith(
+                f"{dpuctl_obj.get_hwmgmt_name()}_rst")
+            assert "0" == written_data[2]["data"]
+            assert written_data[2]["file"].endswith(
+                f"{dpuctl_obj.get_hwmgmt_name()}_pwr_force")
+            written_data = []
+            assert dpuctl_obj.dpu_power_off(False)
+            assert mock_inotify.call_args.args[0].endswith(
+                f"{dpuctl_obj.get_hwmgmt_name()}_shtdn_ready")
+            assert written_data[0]["file"].endswith(
+                f"{dpu_map.get(dpuctl_obj.get_hwmgmt_name()).get('pci_id')}/remove")
+            assert "1" == written_data[0]["data"]
+            assert written_data[1]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_rst")
+            assert "0" == written_data[1]["data"]
+            assert written_data[2]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_pwr")
+            assert "0" == written_data[2]["data"]
+            written_data = []
+            mock_add_watch.return_value = None
+            assert dpuctl_obj.dpu_power_off(False)
+            assert mock_inotify.call_args.args[0].endswith(
+                f"{dpuctl_obj.get_hwmgmt_name()}_shtdn_ready")
+            assert written_data[0]["file"].endswith(
+                f"{dpu_map.get(dpuctl_obj.get_hwmgmt_name()).get('pci_id')}/remove")
+            assert "1" == written_data[0]["data"]
+            assert written_data[1]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_rst")
+            assert "0" == written_data[1]["data"]
+            assert written_data[2]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_rst")
+            assert "0" == written_data[2]["data"]
+            assert written_data[3]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_pwr_force")
+            assert "0" == written_data[3]["data"]
+        # Test whether value of boot_progress changes power off to force_power_off
+        with patch.object(dpuctl_obj, 'read_boot_prog') as mock_boot_prog, \
+             patch.object(dpuctl_obj, 'write_file', wraps=mock_write_file), \
+             patch.object(dpuctl_obj, '_power_off_force') as mock_power_off_force, \
+             patch.object(dpuctl_obj, '_power_off') as mock_power_off, \
+             patch.object(dpuctl_obj, 'log_info') as mock_obj:
+            mock_boot_prog.return_value = BootProgEnum.RST.value
+            mock_add_watch.return_value = True
+            assert dpuctl_obj.dpu_power_off(False)
+            assert mock_obj.call_args_list[1].args[0] == "Power off with force = True since since OS is not in running state on DPU"
+            mock_power_off_force.assert_called_once()
+            mock_power_off.assert_not_called()
+            mock_boot_prog.return_value = BootProgEnum.OS_RUN.value
+            mock_power_off_force.reset_mock()
+            mock_power_off.reset_mock()
+            assert dpuctl_obj.dpu_power_off(False)
+            mock_power_off_force.assert_not_called()
+            mock_power_off.assert_called_once()
+            
+
+    @patch('os.path.exists', MagicMock(return_value=True))
+    @patch('multiprocessing.Process.start', MagicMock(return_value=True))
+    @patch('multiprocessing.Process.is_alive', MagicMock(return_value=False))
+    @patch('sonic_platform.inotify_helper.InotifyHelper.wait_watch')
+    @patch('sonic_platform.inotify_helper.InotifyHelper.__init__')
+    @patch('subprocess.check_output', MagicMock(return_value=True))
+    def test_power_on(self, mock_inotify, mock_add_watch):
+        """Tests for Per DPU Power On function"""
+        dpuctl_obj = obj["dpuctl_list"][0]
+        mock_inotify.return_value = None
+        mock_add_watch.return_value = True
+        written_data = []
+
+        def mock_write_file(file_name, content_towrite):
+            written_data.append({"file": file_name,
+                                 "data": content_towrite})
+            return True
+        with patch.object(dpuctl_obj, 'write_file', wraps=mock_write_file), \
+             patch.object(dpuctl_obj, 'wait_for_pci', wraps=MagicMock(return_value=None)), \
+             patch.object(dpuctl_obj, 'dpu_rshim_service_control', wraps=MagicMock(return_value=None)):
+            assert dpuctl_obj.dpu_power_on(True)
+            assert mock_inotify.call_args.args[0].endswith(
+                f"{dpuctl_obj.get_hwmgmt_name()}_ready")
+            assert written_data[0]["file"].endswith(
+                f"{dpuctl_obj.get_hwmgmt_name()}_pwr_force")
+            assert "1" == written_data[0]["data"]
+            assert written_data[1]["file"].endswith(
+                f"{dpuctl_obj.get_hwmgmt_name()}_rst")
+            assert "1" == written_data[1]["data"]
+            written_data = []
+            assert dpuctl_obj.dpu_power_on(False)
+            assert written_data[0]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_pwr")
+            assert "1" == written_data[0]["data"]
+            assert written_data[1]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_rst")
+            assert "1" == written_data[1]["data"]
+            assert written_data[2]["file"].endswith(f"rescan")
+            assert "1" == written_data[2]["data"]
+            written_data = []
+            mock_add_watch.return_value = None
+            assert not dpuctl_obj.dpu_power_on(False)
+            assert len(written_data) == 19
+            assert written_data[0]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_pwr")
+            assert "1" == written_data[0]["data"]
+            assert written_data[1]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_rst")
+            assert "1" == written_data[1]["data"]
+            for i in range(4):
+                assert written_data[2 + 4 * i]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_rst")
+                assert "0" == written_data[2 + 4 * i]["data"]
+                assert written_data[3 + 4 * i]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_pwr_force")
+                assert "0" == written_data[3 + 4 * i]["data"]
+                assert written_data[4 + 4 * i]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_pwr_force")
+                assert "1" == written_data[4 + 4 * i]["data"]
+                assert written_data[5 + 4 * i]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_rst")
+                assert "1" == written_data[5 + 4 * i]["data"]
+            assert written_data[18]["file"].endswith(f"rescan")
+            assert "1" == written_data[18]["data"]
+
+    @patch('os.path.exists', MagicMock(return_value=True))
+    @patch('multiprocessing.Process.start', MagicMock(return_value=True))
+    @patch('multiprocessing.Process.is_alive', MagicMock(return_value=False))
+    @patch('sonic_platform.inotify_helper.InotifyHelper.wait_watch')
+    @patch('sonic_platform.inotify_helper.InotifyHelper.__init__')
+    def test_dpu_reset(self, mock_inotify, mock_add_watch):
+        """Tests for Per DPU Reset function"""
+        dpuctl_obj = obj["dpuctl_list"][0]
+        mock_inotify.return_value = None
+        mock_add_watch.return_value = True
+        written_data = []
+
+        def mock_write_file(file_name, content_towrite):
+            written_data.append({"file": file_name,
+                                 "data": content_towrite})
+            return True
+        with patch.object(dpuctl_obj, 'write_file', wraps=mock_write_file), \
+             patch.object(dpuctl_obj, 'read_boot_prog', MagicMock(return_value=BootProgEnum.OS_RUN.value)), \
+             patch.object(dpuctl_obj, 'dpu_rshim_service_control', wraps=MagicMock(return_value=None)):
+            dpuctl_obj.write_file = mock_write_file
+            assert dpuctl_obj.dpu_reboot(False)
+            assert len(written_data) == 4
+            assert written_data[0]["file"].endswith(f"{dpu_map.get(dpuctl_obj.get_hwmgmt_name()).get('pci_id')}/remove")
+            assert "1" == written_data[0]["data"]
+            assert written_data[1]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_rst")
+            assert "0" == written_data[1]["data"]
+            assert written_data[2]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_rst")
+            assert "1" == written_data[2]["data"]
+            assert written_data[3]["file"].endswith(f"rescan")
+            assert "1" == written_data[3]["data"]
+            assert mock_inotify.call_args.args[0].endswith(
+                f"{dpuctl_obj.get_hwmgmt_name()}_ready")
+            mock_add_watch.return_value = None
+            written_data = []
+            assert not dpuctl_obj.dpu_reboot()
+            assert len(written_data) == 22
+            assert written_data[0]["file"].endswith(f"{dpu_map.get(dpuctl_obj.get_hwmgmt_name()).get('pci_id')}/remove")
+            assert "1" == written_data[0]["data"]
+            assert written_data[1]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_rst")
+            assert "0" == written_data[1]["data"]
+            assert written_data[2]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_rst")
+            assert "0" == written_data[2]["data"]
+            assert written_data[3]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_pwr_force")
+            assert "0" == written_data[3]["data"]
+            assert written_data[4]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_rst")
+            assert "1" == written_data[4]["data"]
+            for i in range(4):
+                assert written_data[5 + 4 * i]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_rst")
+                assert "0" == written_data[5 + 4 * i]["data"]
+                assert written_data[6 + 4 * i]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_pwr_force")
+                assert "0" == written_data[6 + 4 * i]["data"]
+                assert written_data[7 + 4 * i]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_pwr_force")
+                assert "1" == written_data[7 + 4 * i]["data"]
+                assert written_data[8 + 4 * i]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_rst")
+                assert "1" == written_data[8 + 4 * i]["data"]
+            assert written_data[21]["file"].endswith(f"rescan")
+            assert "1" == written_data[21]["data"]
+        # Force Reboot
+        mock_inotify.reset_mock()
+        mock_add_watch.return_value = True
+        mock_inotify.return_value = None
+        written_data=[]
+        with patch.object(dpuctl_obj, 'write_file', wraps=mock_write_file), \
+             patch.object(dpuctl_obj, 'read_boot_prog', MagicMock(return_value=BootProgEnum.OS_RUN.value)), \
+             patch.object(dpuctl_obj, 'dpu_rshim_service_control', wraps=MagicMock(return_value=None)):
+            dpuctl_obj.write_file = mock_write_file
+            assert dpuctl_obj.dpu_reboot(True)
+            mock_add_watch.return_value = None
+            assert len(written_data) == 6
+            assert written_data[0]["file"].endswith(f"{dpu_map.get(dpuctl_obj.get_hwmgmt_name()).get('pci_id')}/remove")
+            assert "1" == written_data[0]["data"]
+            assert written_data[1]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_rst")
+            assert "0" == written_data[1]["data"]
+            assert written_data[2]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_pwr_force")
+            assert "0" == written_data[2]["data"]
+            assert written_data[3]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_pwr_force")
+            assert "1" == written_data[3]["data"]
+            assert written_data[4]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_rst")
+            assert "1" == written_data[4]["data"]
+            assert written_data[5]["file"].endswith(f"rescan")
+            assert "1" == written_data[5]["data"]
+            assert mock_inotify.call_args.args[0].endswith(
+                f"{dpuctl_obj.get_hwmgmt_name()}_ready")
+            mock_add_watch.return_value = None
+            written_data = []
+            assert not dpuctl_obj.dpu_reboot(True)
+            assert len(written_data) == 18
+            assert written_data[0]["file"].endswith(f"{dpu_map.get(dpuctl_obj.get_hwmgmt_name()).get('pci_id')}/remove")
+            assert "1" == written_data[0]["data"]
+            assert written_data[1]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_rst")
+            assert "0" == written_data[1]["data"]
+            assert written_data[2]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_pwr_force")
+            assert "0" == written_data[2]["data"]
+            assert written_data[3]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_pwr_force")
+            assert "1" == written_data[3]["data"]
+            assert written_data[4]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_rst")
+            assert "1" == written_data[4]["data"]
+            for i in range(3):
+                assert written_data[5 + 4 * i]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_rst")
+                assert "0" == written_data[5 + 4 * i]["data"]
+                assert written_data[6 + 4 * i]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_pwr_force")
+                assert "0" == written_data[6 + 4 * i]["data"]
+                assert written_data[7 + 4 * i]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_pwr_force")
+                assert "1" == written_data[7 + 4 * i]["data"]
+                assert written_data[8 + 4 * i]["file"].endswith(f"{dpuctl_obj.get_hwmgmt_name()}_rst")
+                assert "1" == written_data[8 + 4 * i]["data"]
+            assert written_data[17]["file"].endswith(f"rescan")
+            assert "1" == written_data[17]["data"]
+        # Test whether value of boot_progress changes power off to force_power_off
+        with patch.object(dpuctl_obj, 'read_boot_prog') as mock_boot_prog, \
+             patch.object(dpuctl_obj, 'write_file', wraps=mock_write_file), \
+             patch.object(dpuctl_obj, '_reboot') as mock_reset, \
+             patch.object(dpuctl_obj, '_reboot_force') as mock_reset_force, \
+             patch.object(dpuctl_obj, 'dpu_rshim_service_control', wraps=MagicMock(return_value=None)), \
+             patch.object(dpuctl_obj, 'log_info') as mock_obj:
+            mock_boot_prog.return_value = BootProgEnum.RST.value
+            mock_add_watch.return_value = True
+            assert dpuctl_obj.dpu_reboot(False)
+            assert mock_obj.call_args_list[1].args[0] == "Reboot with force = True since OS is not in running state on DPU"
+            mock_reset_force.assert_called_once()
+            mock_reset.assert_not_called()
+            mock_boot_prog.return_value = 5
+            mock_reset_force.reset_mock()
+            mock_reset.reset_mock()
+            assert dpuctl_obj.dpu_reboot(False)
+            mock_reset_force.assert_not_called()
+            mock_reset.assert_called_once()
+
+    def test_prog_update(self):
+        dpuctl_obj = obj["dpuctl_list"][0]
+        dpuctl_obj.boot_prog_path = os.path.join(test_path, 'mock_dpu_boot_prog')
+
+        class Dummy:
+            def poll(self):
+                return True
+        dummy_obj = Dummy()
+        mock_file_path = "mock_dpu_boot_prog"
+        mock_val = 0
+        boot_prog_map = dpuctl_obj.boot_prog_map
+
+        def mock_read_int_from_file(file_path, default=0, raise_exception=False, log_func=None):
+            if file_path.endswith(mock_file_path):
+                return mock_val
+            else:
+                return 0
+        with patch("sonic_platform.utils.read_int_from_file", wraps=mock_read_int_from_file), \
+             patch.object(dpuctl_obj, 'wait_for_pci', wraps=MagicMock(return_value=None)), \
+             patch.object(dpuctl_obj, 'dpu_rshim_service_control', wraps=MagicMock(return_value=None)):
+            for key_val in boot_prog_map.keys():
+                mock_val = key_val
+                dpuctl_obj.update_boot_prog_once(dummy_obj)
+                assert dpuctl_obj.boot_prog_state == key_val
+                assert dpuctl_obj.boot_prog_indication == f"{key_val} - {boot_prog_map.get(key_val)}"
+            mock_val = 25
+            dpuctl_obj.update_boot_prog_once(dummy_obj)
+            assert dpuctl_obj.boot_prog_state == 25
+            assert dpuctl_obj.boot_prog_indication == "25 - N/A"
+            mock_val = 36
+            dpuctl_obj.update_boot_prog_once(dummy_obj)
+            assert dpuctl_obj.boot_prog_state == 36
+            assert dpuctl_obj.boot_prog_indication == "36 - N/A"
+            mock_file_path = "dpu1_ready"
+            mock_val = 1
+            dpuctl_obj.dpu_status_update()
+            assert dpuctl_obj.boot_prog_state == 0
+            assert dpuctl_obj.boot_prog_indication == f"0 - {boot_prog_map.get(0)}"
+            assert dpuctl_obj.dpu_ready_state == 1
+            assert dpuctl_obj.dpu_ready_indication == f"True"
+            assert dpuctl_obj.dpu_shtdn_ready_state == 0
+            assert dpuctl_obj.dpu_shtdn_ready_indication == f"False"
+            mock_file_path = "dpu1_shtdn_ready"
+            dpuctl_obj.dpu_status_update()
+            assert dpuctl_obj.boot_prog_state == 0
+            assert dpuctl_obj.boot_prog_indication == f"0 - {boot_prog_map.get(0)}"
+            assert dpuctl_obj.dpu_ready_state == 0
+            assert dpuctl_obj.dpu_ready_indication == "False"
+            assert dpuctl_obj.dpu_shtdn_ready_state == 1
+            assert dpuctl_obj.dpu_shtdn_ready_indication == "True"
+            mock_file_path = "dpu1_shtdn_ready"
+            mock_val = 25
+            dpuctl_obj.dpu_status_update()
+            assert dpuctl_obj.dpu_shtdn_ready_indication == "25 - N/A"
+            mock_file_path = "dpu1_ready"
+            mock_val = 50
+            dpuctl_obj.dpu_status_update()
+            assert dpuctl_obj.dpu_ready_indication == "50 - N/A"
+
+    @patch('os.path.exists')
+    @patch('os.open', MagicMock(return_value=-1))
+    @patch('os.close', MagicMock(return_value=None))
+    @patch('sonic_platform.dpuctlplat.poll')
+    def test_pci_func(self, m1, mock_exists):
+        dpuctl_obj = obj["dpuctl_list"][0]
+        mock_exists.return_value = False
+        mock_obj = Mock()
+        mock_obj.register.return_value = None
+        mock_obj.poll.return_value = None
+        m1.return_value = mock_obj
+        timeout_val = 45
+
+        def mock_time_diff():
+            mock_time_diff.counter += 1
+            return mock_time_diff.counter * timeout_val
+        mock_time_diff.counter = 0
+        with patch("time.time", wraps=mock_time_diff):
+            # PCI Device is not recognized
+            assert not dpuctl_obj.wait_for_pci()
+            assert f"{dpu_map.get(dpuctl_obj.get_hwmgmt_name()).get('pci_id')}" in mock_exists.call_args.args[0]
+            mock_obj.register.assert_called_once()
+            mock_obj.poll.assert_called_once()
+            # PCI device is recognized immediately
+            mock_obj.reset_mock()
+            mock_exists.reset_mock()
+            mock_exists.return_value = True
+            assert dpuctl_obj.wait_for_pci()
+            assert f"{dpu_map.get(dpuctl_obj.get_hwmgmt_name()).get('pci_id')}" in mock_exists.call_args.args[0]
+            mock_obj.register.assert_not_called()
+            mock_obj.poll.assert_not_called()
+            # PCI device is added later (Detected in Loop)
+            timeout_val = 20
+            mock_exists.reset_mock()
+            mock_obj.reset_mock()
+            mock_exists.side_effect = [False, True]
+            mock_obj.poll.return_value = True
+            assert dpuctl_obj.wait_for_pci()
+            mock_obj.register.assert_called_once()
+            mock_obj.poll.assert_called_once()
+            # PCI device is added later (Detected at the end)
+            timeout_val = 80
+            mock_exists.reset_mock()
+            mock_obj.reset_mock()
+            mock_exists.side_effect = [False, True]
+            assert dpuctl_obj.wait_for_pci()
+            mock_obj.register.assert_called_once()
+            mock_obj.poll.assert_not_called()
+        with patch.object(dpuctl_obj, '_name', "dpua"), patch.object(dpuctl_obj, 'log_error') as mock_obj:
+            dpuctl_obj.wait_for_pci()
+            mock_obj.assert_called_once_with("Unable to wait for PCI device")
+
+    def test_rshim_service(self):
+        dpuctl_obj = obj["dpuctl_list"][0]
+        with patch.object(dpuctl_obj, 'run_cmd_output') as mock_method:
+            dpuctl_obj.dpu_rshim_service_control('start')
+            mock_method.assert_called_once()
+            cmd_string = ' '.join(mock_method.call_args.args[0])
+            cmd_string == f"systemctl start {dpu_map.get(dpuctl_obj.get_hwmgmt_name()).get('rshim')}.service"
+            mock_method.reset_mock()
+            dpuctl_obj.dpu_rshim_service_control('stop')
+            cmd_string == f"systemctl stop {dpu_map.get(dpuctl_obj.get_hwmgmt_name()).get('rshim')}.service"
+            mock_method.assert_called_once()
+            with pytest.raises(TypeError):
+                dpuctl_obj.dpu_rshim_service_control()
+            with patch.object(dpuctl_obj, 'get_hwmgmt_name', return_value="dpu5"), patch.object(dpuctl_obj, 'log_error') as mock_obj:
+                dpuctl_obj.dpu_rshim_service_control('start')
+                mock_obj.assert_called_once_with("Failed to start rshim!")
+
+    def test_pre_and_post(self):
+        dpuctl_obj = obj["dpuctl_list"][0]
+        with patch.object(dpuctl_obj, 'dpu_rshim_service_control') as mock_rshim, patch.object(dpuctl_obj, 'write_file') as mock_write:
+            manager_mock = Mock()
+            manager_mock.attach_mock(mock_rshim, 'rshim')
+            manager_mock.attach_mock(mock_write, 'write')
+            dpuctl_obj.dpu_pre_shutdown()
+            mock_rshim.assert_called_once()
+            mock_write.assert_called_once()
+            # Confirm the order of calls and the parameters
+            manager_mock.mock_calls[0] == call.rshim('stop')
+            manager_mock.mock_calls[1] == call.rshim(dpuctl_obj.pci_dev_path, '1')
+            # Test post startup
+            mock_rshim.reset_mock()
+            mock_write.reset_mock()
+            manager_mock.reset_mock()
+            with patch.object(dpuctl_obj, 'wait_for_pci') as mock_pci:
+                manager_mock.attach_mock(mock_rshim, 'rshim')
+                manager_mock.attach_mock(mock_write, 'write')
+                manager_mock.attach_mock(mock_pci, 'pci')
+                dpuctl_obj.dpu_post_startup()
+                mock_rshim.assert_called_once()
+                mock_write.assert_called_once()
+                mock_pci.assert_called_once()
+                # Confirm the order of calls and the parameters
+                manager_mock.mock_calls[0] == call.rshim('/sys/bus/pci/rescan', '1')
+                manager_mock.mock_calls[1] == call.pci()
+                manager_mock.mock_calls[2] == call.rshim('start')
+
+    @classmethod
+    def teardown_class(cls):
+        """Teardown function for all tests for dpuctl implementation"""
+        os.environ["MLNX_PLATFORM_API_DPUCTL_UNIT_TESTING"] = "0"
+        os.environ["PATH"] = os.pathsep.join(
+            os.environ["PATH"].split(os.pathsep)[:-1])

From 345ce81d8c04c8b480f3a4aa0496ba308e972ebe Mon Sep 17 00:00:00 2001
From: Tomer Shalvi <116184476+tshalvi@users.noreply.github.com>
Date: Tue, 3 Sep 2024 10:19:40 +0300
Subject: [PATCH 0959/1115] Updated media_settings.json and
 optics_si_settings.json for SKUs 4700 and 5600. Created symbolic links to
 redirect other SKUs to these updated files. (#20076)

- Why I did it
On Mellanox platforms, There are two JSON files related to the CMIS host management feature: media_settings.json and optics_si_settings.json. Multiple copies of these JSON files exist across different SKUs of the 4700 and 5600, which can cause confusion and make tracking difficult. The goal is to create a unified version of each JSON file and redirect all other JSON files to these unified versions.

- How I did it
I updated unified media_settings.json and optics_si_settings.json for Mellanox SKUs 4700 and 5600. Additionally, I created symbolic links to redirect other SKUs to these updated files.

- How to verify it
Verify link is up and running on the different SKUs
---
 .../Mellanox-SN4700-O8V48/media_settings.json | 507 +-----------------
 .../optics_si_settings.json                   | 109 +---
 .../Mellanox-SN5600-V256/media_settings.json  | 310 +++++++++++
 3 files changed, 312 insertions(+), 614 deletions(-)
 mode change 100644 => 120000 device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/media_settings.json
 mode change 100644 => 120000 device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/optics_si_settings.json

diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/media_settings.json b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/media_settings.json
deleted file mode 100644
index 372b1cb28..000000000
--- a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/media_settings.json
+++ /dev/null
@@ -1,506 +0,0 @@
-{
-  "GLOBAL_MEDIA_SETTINGS": {
-      "1-32": {
-          "QSFP-DD-sm_media_interface": {
-              "speed:400GAUI-8": {
-                  "idriver": {
-                      "lane0": "0x0000003c",
-                      "lane1": "0x0000003c",
-                      "lane2": "0x0000003c",
-                      "lane3": "0x0000003c",
-                      "lane4": "0x0000003c",
-                      "lane5": "0x0000003c",
-                      "lane6": "0x0000003c",
-                      "lane7": "0x0000003c"
-                  },
-                  "pre1": {
-                      "lane0": "0xfffffffe",
-                      "lane1": "0xfffffffe",
-                      "lane2": "0xfffffffe",
-                      "lane3": "0xfffffffe",
-                      "lane4": "0xfffffffe",
-                      "lane5": "0xfffffffe",
-                      "lane6": "0xfffffffe",
-                      "lane7": "0xfffffffe"
-                  },
-                  "pre2": {
-                      "lane0": "0x00000000",
-                      "lane1": "0x00000000",
-                      "lane2": "0x00000000",
-                      "lane3": "0x00000000",
-                      "lane4": "0x00000000",
-                      "lane5": "0x00000000",
-                      "lane6": "0x00000000",
-                      "lane7": "0x00000000"
-                  },
-                  "main": {
-                      "lane0": "0x00000020",
-                      "lane1": "0x00000020",
-                      "lane2": "0x00000020",
-                      "lane3": "0x00000020",
-                      "lane4": "0x00000020",
-                      "lane5": "0x00000020",
-                      "lane6": "0x00000020",
-                      "lane7": "0x00000020"
-                  },
-                  "post1": {
-                      "lane0": "0x00000006",
-                      "lane1": "0x00000006",
-                      "lane2": "0x00000006",
-                      "lane3": "0x00000006",
-                      "lane4": "0x00000006",
-                      "lane5": "0x00000006",
-                      "lane6": "0x00000006",
-                      "lane7": "0x00000006"
-                  },
-                  "ob_m2lp": {
-                      "lane0": "0x00000004",
-                      "lane1": "0x00000004",
-                      "lane2": "0x00000004",
-                      "lane3": "0x00000004",
-                      "lane4": "0x00000004",
-                      "lane5": "0x00000004",
-                      "lane6": "0x00000004",
-                      "lane7": "0x00000004"
-                  },
-                  "ob_alev_out": {
-                      "lane0": "0x0000000f",
-                      "lane1": "0x0000000f",
-                      "lane2": "0x0000000f",
-                      "lane3": "0x0000000f",
-                      "lane4": "0x0000000f",
-                      "lane5": "0x0000000f",
-                      "lane6": "0x0000000f",
-                      "lane7": "0x0000000f"
-                  },
-                  "obplev": {
-                      "lane0": "0x00000069",
-                      "lane1": "0x00000069",
-                      "lane2": "0x00000069",
-                      "lane3": "0x00000069",
-                      "lane4": "0x00000069",
-                      "lane5": "0x00000069",
-                      "lane6": "0x00000069",
-                      "lane7": "0x00000069"
-                  },
-                  "obnlev": {
-                      "lane0": "0x0000005f",
-                      "lane1": "0x0000005f",
-                      "lane2": "0x0000005f",
-                      "lane3": "0x0000005f",
-                      "lane4": "0x0000005f",
-                      "lane5": "0x0000005f",
-                      "lane6": "0x0000005f",
-                      "lane7": "0x0000005f"
-                  },
-                  "regn_bfm1p": {
-                      "lane0": "0x0000001e",
-                      "lane1": "0x0000001e",
-                      "lane2": "0x0000001e",
-                      "lane3": "0x0000001e",
-                      "lane4": "0x0000001e",
-                      "lane5": "0x0000001e",
-                      "lane6": "0x0000001e",
-                      "lane7": "0x0000001e"
-                  },
-                  "regn_bfm1n": {
-                      "lane0": "0x000000aa",
-                      "lane1": "0x000000aa",
-                      "lane2": "0x000000aa",
-                      "lane3": "0x000000aa",
-                      "lane4": "0x000000aa",
-                      "lane5": "0x000000aa",
-                      "lane6": "0x000000aa",
-                      "lane7": "0x000000aa"
-                  }
-              },
-              "speed:100GAUI-2": {
-                  "idriver": {
-                      "lane0": "0x0000003c",
-                      "lane1": "0x0000003c"
-                  },
-                  "pre1": {
-                      "lane0": "0xfffffffe",
-                      "lane1": "0xfffffffe"
-                  },
-                  "pre2": {
-                      "lane0": "0x00000000",
-                      "lane1": "0x00000000"
-                  },
-                  "main": {
-                      "lane0": "0x00000020",
-                      "lane1": "0x00000020"
-                  },
-                  "post1": {
-                      "lane0": "0x00000006",
-                      "lane1": "0x00000006"
-                  },
-                  "ob_m2lp": {
-                      "lane0": "0x00000004",
-                      "lane1": "0x00000004"
-                  },
-                  "ob_alev_out": {
-                      "lane0": "0x0000000f",
-                      "lane1": "0x0000000f"
-                  },
-                  "obplev": {
-                      "lane0": "0x00000069",
-                      "lane1": "0x00000069"
-                  },
-                  "obnlev": {
-                      "lane0": "0x0000005f",
-                      "lane1": "0x0000005f"
-                  },
-                  "regn_bfm1p": {
-                      "lane0": "0x0000001e",
-                      "lane1": "0x0000001e"
-                  },
-                  "regn_bfm1n": {
-                      "lane0": "0x000000aa",
-                      "lane1": "0x000000aa"
-                  }
-              }
-          },
-          "QSFP-DD-active_cable_media_interface": {
-              "speed:400GAUI-8": {
-                  "idriver": {
-                      "lane0": "0x0000003c",
-                      "lane1": "0x0000003c",
-                      "lane2": "0x0000003c",
-                      "lane3": "0x0000003c",
-                      "lane4": "0x0000003c",
-                      "lane5": "0x0000003c",
-                      "lane6": "0x0000003c",
-                      "lane7": "0x0000003c"
-                  },
-                  "pre1": {
-                      "lane0": "0xfffffffe",
-                      "lane1": "0xfffffffe",
-                      "lane2": "0xfffffffe",
-                      "lane3": "0xfffffffe",
-                      "lane4": "0xfffffffe",
-                      "lane5": "0xfffffffe",
-                      "lane6": "0xfffffffe",
-                      "lane7": "0xfffffffe"
-                  },
-                  "pre2": {
-                      "lane0": "0x00000000",
-                      "lane1": "0x00000000",
-                      "lane2": "0x00000000",
-                      "lane3": "0x00000000",
-                      "lane4": "0x00000000",
-                      "lane5": "0x00000000",
-                      "lane6": "0x00000000",
-                      "lane7": "0x00000000"
-                  },
-                  "main": {
-                      "lane0": "0x00000020",
-                      "lane1": "0x00000020",
-                      "lane2": "0x00000020",
-                      "lane3": "0x00000020",
-                      "lane4": "0x00000020",
-                      "lane5": "0x00000020",
-                      "lane6": "0x00000020",
-                      "lane7": "0x00000020"
-                  },
-                  "post1": {
-                      "lane0": "0x00000006",
-                      "lane1": "0x00000006",
-                      "lane2": "0x00000006",
-                      "lane3": "0x00000006",
-                      "lane4": "0x00000006",
-                      "lane5": "0x00000006",
-                      "lane6": "0x00000006",
-                      "lane7": "0x00000006"
-                  },
-                  "ob_m2lp": {
-                      "lane0": "0x00000004",
-                      "lane1": "0x00000004",
-                      "lane2": "0x00000004",
-                      "lane3": "0x00000004",
-                      "lane4": "0x00000004",
-                      "lane5": "0x00000004",
-                      "lane6": "0x00000004",
-                      "lane7": "0x00000004"
-                  },
-                  "ob_alev_out": {
-                      "lane0": "0x0000000f",
-                      "lane1": "0x0000000f",
-                      "lane2": "0x0000000f",
-                      "lane3": "0x0000000f",
-                      "lane4": "0x0000000f",
-                      "lane5": "0x0000000f",
-                      "lane6": "0x0000000f",
-                      "lane7": "0x0000000f"
-                  },
-                  "obplev": {
-                      "lane0": "0x00000069",
-                      "lane1": "0x00000069",
-                      "lane2": "0x00000069",
-                      "lane3": "0x00000069",
-                      "lane4": "0x00000069",
-                      "lane5": "0x00000069",
-                      "lane6": "0x00000069",
-                      "lane7": "0x00000069"
-                  },
-                  "obnlev": {
-                      "lane0": "0x0000005f",
-                      "lane1": "0x0000005f",
-                      "lane2": "0x0000005f",
-                      "lane3": "0x0000005f",
-                      "lane4": "0x0000005f",
-                      "lane5": "0x0000005f",
-                      "lane6": "0x0000005f",
-                      "lane7": "0x0000005f"
-                  },
-                  "regn_bfm1p": {
-                      "lane0": "0x0000001e",
-                      "lane1": "0x0000001e",
-                      "lane2": "0x0000001e",
-                      "lane3": "0x0000001e",
-                      "lane4": "0x0000001e",
-                      "lane5": "0x0000001e",
-                      "lane6": "0x0000001e",
-                      "lane7": "0x0000001e"
-                  },
-                  "regn_bfm1n": {
-                      "lane0": "0x000000aa",
-                      "lane1": "0x000000aa",
-                      "lane2": "0x000000aa",
-                      "lane3": "0x000000aa",
-                      "lane4": "0x000000aa",
-                      "lane5": "0x000000aa",
-                      "lane6": "0x000000aa",
-                      "lane7": "0x000000aa"
-                  }
-              },
-              "speed:CAUI-4": {
-                  "idriver": {
-                      "lane0": "0x00000028",
-                      "lane1": "0x00000028",
-                      "lane2": "0x00000028",
-                      "lane3": "0x00000028",
-                      "lane4": "0x00000028",
-                      "lane5": "0x00000028",
-                      "lane6": "0x00000028",
-                      "lane7": "0x00000028"
-                  },
-                  "pre1": {
-                      "lane0": "0xfffffff3",
-                      "lane1": "0xfffffff3",
-                      "lane2": "0xfffffff3",
-                      "lane3": "0xfffffff3",
-                      "lane4": "0xfffffff3",
-                      "lane5": "0xfffffff3",
-                      "lane6": "0xfffffff3",
-                      "lane7": "0xfffffff3"
-                  },
-                  "pre2": {
-                      "lane0": "0x00000000",
-                      "lane1": "0x00000000",
-                      "lane2": "0x00000000",
-                      "lane3": "0x00000000",
-                      "lane4": "0x00000000",
-                      "lane5": "0x00000000",
-                      "lane6": "0x00000000",
-                      "lane7": "0x00000000"
-                  },
-                  "main": {
-                      "lane0": "0x00000033",
-                      "lane1": "0x00000033",
-                      "lane2": "0x00000033",
-                      "lane3": "0x00000033",
-                      "lane4": "0x00000033",
-                      "lane5": "0x00000033",
-                      "lane6": "0x00000033",
-                      "lane7": "0x00000033"
-                  },
-                  "post1": {
-                      "lane0": "0x00000000",
-                      "lane1": "0x00000000",
-                      "lane2": "0x00000000",
-                      "lane3": "0x00000000",
-                      "lane4": "0x00000000",
-                      "lane5": "0x00000000",
-                      "lane6": "0x00000000",
-                      "lane7": "0x00000000"
-                  },
-                  "ob_m2lp": {
-                      "lane0": "0x00000000",
-                      "lane1": "0x00000000",
-                      "lane2": "0x00000000",
-                      "lane3": "0x00000000",
-                      "lane4": "0x00000000",
-                      "lane5": "0x00000000",
-                      "lane6": "0x00000000",
-                      "lane7": "0x00000000"
-                  },
-                  "ob_alev_out": {
-                      "lane0": "0x0000000f",
-                      "lane1": "0x0000000f",
-                      "lane2": "0x0000000f",
-                      "lane3": "0x0000000f",
-                      "lane4": "0x0000000f",
-                      "lane5": "0x0000000f",
-                      "lane6": "0x0000000f",
-                      "lane7": "0x0000000f"
-                  },
-                  "obplev": {
-                      "lane0": "0x00000050",
-                      "lane1": "0x00000050",
-                      "lane2": "0x00000050",
-                      "lane3": "0x00000050",
-                      "lane4": "0x00000050",
-                      "lane5": "0x00000050",
-                      "lane6": "0x00000050",
-                      "lane7": "0x00000050"
-                  },
-                  "obnlev": {
-                      "lane0": "0x00000078",
-                      "lane1": "0x00000078",
-                      "lane2": "0x00000078",
-                      "lane3": "0x00000078",
-                      "lane4": "0x00000078",
-                      "lane5": "0x00000078",
-                      "lane6": "0x00000078",
-                      "lane7": "0x00000078"
-                  },
-                  "regn_bfm1p": {
-                      "lane0": "0x0000003c",
-                      "lane1": "0x0000003c",
-                      "lane2": "0x0000003c",
-                      "lane3": "0x0000003c",
-                      "lane4": "0x0000003c",
-                      "lane5": "0x0000003c",
-                      "lane6": "0x0000003c",
-                      "lane7": "0x0000003c"
-                  },
-                  "regn_bfm1n": {
-                      "lane0": "0x0000008c",
-                      "lane1": "0x0000008c",
-                      "lane2": "0x0000008c",
-                      "lane3": "0x0000008c",
-                      "lane4": "0x0000008c",
-                      "lane5": "0x0000008c",
-                      "lane6": "0x0000008c",
-                      "lane7": "0x0000008c"
-                  }
-              }
-          },
-          "QSFP+-active_cable_media_interface": {
-              "speed:CAUI-4": {
-                  "idriver": {
-                      "lane0": "0x00000028",
-                      "lane1": "0x00000028",
-                      "lane2": "0x00000028",
-                      "lane3": "0x00000028",
-                      "lane4": "0x00000028",
-                      "lane5": "0x00000028",
-                      "lane6": "0x00000028",
-                      "lane7": "0x00000028"
-                  },
-                  "pre1": {
-                      "lane0": "0xfffffff3",
-                      "lane1": "0xfffffff3",
-                      "lane2": "0xfffffff3",
-                      "lane3": "0xfffffff3",
-                      "lane4": "0xfffffff3",
-                      "lane5": "0xfffffff3",
-                      "lane6": "0xfffffff3",
-                      "lane7": "0xfffffff3"
-                  },
-                  "pre2": {
-                      "lane0": "0x00000000",
-                      "lane1": "0x00000000",
-                      "lane2": "0x00000000",
-                      "lane3": "0x00000000",
-                      "lane4": "0x00000000",
-                      "lane5": "0x00000000",
-                      "lane6": "0x00000000",
-                      "lane7": "0x00000000"
-                  },
-                  "main": {
-                      "lane0": "0x00000033",
-                      "lane1": "0x00000033",
-                      "lane2": "0x00000033",
-                      "lane3": "0x00000033",
-                      "lane4": "0x00000033",
-                      "lane5": "0x00000033",
-                      "lane6": "0x00000033",
-                      "lane7": "0x00000033"
-                  },
-                  "post1": {
-                      "lane0": "0x00000000",
-                      "lane1": "0x00000000",
-                      "lane2": "0x00000000",
-                      "lane3": "0x00000000",
-                      "lane4": "0x00000000",
-                      "lane5": "0x00000000",
-                      "lane6": "0x00000000",
-                      "lane7": "0x00000000"
-                  },
-                  "ob_m2lp": {
-                      "lane0": "0x00000000",
-                      "lane1": "0x00000000",
-                      "lane2": "0x00000000",
-                      "lane3": "0x00000000",
-                      "lane4": "0x00000000",
-                      "lane5": "0x00000000",
-                      "lane6": "0x00000000",
-                      "lane7": "0x00000000"
-                  },
-                  "ob_alev_out": {
-                      "lane0": "0x0000000f",
-                      "lane1": "0x0000000f",
-                      "lane2": "0x0000000f",
-                      "lane3": "0x0000000f",
-                      "lane4": "0x0000000f",
-                      "lane5": "0x0000000f",
-                      "lane6": "0x0000000f",
-                      "lane7": "0x0000000f"
-                  },
-                  "obplev": {
-                      "lane0": "0x00000050",
-                      "lane1": "0x00000050",
-                      "lane2": "0x00000050",
-                      "lane3": "0x00000050",
-                      "lane4": "0x00000050",
-                      "lane5": "0x00000050",
-                      "lane6": "0x00000050",
-                      "lane7": "0x00000050"
-                  },
-                  "obnlev": {
-                      "lane0": "0x00000078",
-                      "lane1": "0x00000078",
-                      "lane2": "0x00000078",
-                      "lane3": "0x00000078",
-                      "lane4": "0x00000078",
-                      "lane5": "0x00000078",
-                      "lane6": "0x00000078",
-                      "lane7": "0x00000078"
-                  },
-                  "regn_bfm1p": {
-                      "lane0": "0x0000003c",
-                      "lane1": "0x0000003c",
-                      "lane2": "0x0000003c",
-                      "lane3": "0x0000003c",
-                      "lane4": "0x0000003c",
-                      "lane5": "0x0000003c",
-                      "lane6": "0x0000003c",
-                      "lane7": "0x0000003c"
-                  },
-                  "regn_bfm1n": {
-                      "lane0": "0x0000008c",
-                      "lane1": "0x0000008c",
-                      "lane2": "0x0000008c",
-                      "lane3": "0x0000008c",
-                      "lane4": "0x0000008c",
-                      "lane5": "0x0000008c",
-                      "lane6": "0x0000008c",
-                      "lane7": "0x0000008c"
-                  }
-              }
-          }
-      }
-  }
-}
diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/media_settings.json b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/media_settings.json
new file mode 120000
index 000000000..79e88a14f
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/media_settings.json
@@ -0,0 +1 @@
+../Mellanox-SN4700-O8C48/media_settings.json
\ No newline at end of file
diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/optics_si_settings.json b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/optics_si_settings.json
deleted file mode 100644
index bf71e818a..000000000
--- a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/optics_si_settings.json
+++ /dev/null
@@ -1,108 +0,0 @@
-{
-    "GLOBAL_MEDIA_SETTINGS": {
-        "1-32": {
-            "50G_SPEED": {
-                "Default": {
-                    "OutputAmplitudeTargetRx": {
-                        "OutputAmplitudeTargetRx1": 0,
-                        "OutputAmplitudeTargetRx2": 0,
-                        "OutputAmplitudeTargetRx3": 0,
-                        "OutputAmplitudeTargetRx4": 0,
-                        "OutputAmplitudeTargetRx5": 0,
-                        "OutputAmplitudeTargetRx6": 0,
-                        "OutputAmplitudeTargetRx7": 0,
-                        "OutputAmplitudeTargetRx8": 0
-                    },
-                    "OutputEqPreCursorTargetRx": {
-                        "OutputEqPreCursorTargetRx1": 0,
-                        "OutputEqPreCursorTargetRx2": 0,
-                        "OutputEqPreCursorTargetRx3": 0,
-                        "OutputEqPreCursorTargetRx4": 0,
-                        "OutputEqPreCursorTargetRx5": 0,
-                        "OutputEqPreCursorTargetRx6": 0,
-                        "OutputEqPreCursorTargetRx7": 0,
-                        "OutputEqPreCursorTargetRx8": 0
-                    },
-                    "OutputEqPostCursorTargetRx": {
-                        "OutputEqPostCursorTargetRx1": 0,
-                        "OutputEqPostCursorTargetRx2": 0,
-                        "OutputEqPostCursorTargetRx3": 0,
-                        "OutputEqPostCursorTargetRx4": 0,
-                        "OutputEqPostCursorTargetRx5": 0,
-                        "OutputEqPostCursorTargetRx6": 0,
-                        "OutputEqPostCursorTargetRx7": 0,
-                        "OutputEqPostCursorTargetRx8": 0
-                    }
-                }
-            },
-            "25G_SPEED": {
-                "Default": {
-                    "OutputAmplitudeTargetRx": {
-                        "OutputAmplitudeTargetRx1": 0,
-                        "OutputAmplitudeTargetRx2": 0,
-                        "OutputAmplitudeTargetRx3": 0,
-                        "OutputAmplitudeTargetRx4": 0,
-                        "OutputAmplitudeTargetRx5": 0,
-                        "OutputAmplitudeTargetRx6": 0,
-                        "OutputAmplitudeTargetRx7": 0,
-                        "OutputAmplitudeTargetRx8": 0
-                    },
-                    "OutputEqPreCursorTargetRx": {
-                        "OutputEqPreCursorTargetRx1": 0,
-                        "OutputEqPreCursorTargetRx2": 0,
-                        "OutputEqPreCursorTargetRx3": 0,
-                        "OutputEqPreCursorTargetRx4": 0,
-                        "OutputEqPreCursorTargetRx5": 0,
-                        "OutputEqPreCursorTargetRx6": 0,
-                        "OutputEqPreCursorTargetRx7": 0,
-                        "OutputEqPreCursorTargetRx8": 0
-                    },
-                    "OutputEqPostCursorTargetRx": {
-                        "OutputEqPostCursorTargetRx1": 0,
-                        "OutputEqPostCursorTargetRx2": 0,
-                        "OutputEqPostCursorTargetRx3": 0,
-                        "OutputEqPostCursorTargetRx4": 0,
-                        "OutputEqPostCursorTargetRx5": 0,
-                        "OutputEqPostCursorTargetRx6": 0,
-                        "OutputEqPostCursorTargetRx7": 0,
-                        "OutputEqPostCursorTargetRx8": 0
-                    }
-                }
-            },
-            "10G_SPEED": {
-                "Default": {
-                    "OutputAmplitudeTargetRx": {
-                        "OutputAmplitudeTargetRx1": 0,
-                        "OutputAmplitudeTargetRx2": 0,
-                        "OutputAmplitudeTargetRx3": 0,
-                        "OutputAmplitudeTargetRx4": 0,
-                        "OutputAmplitudeTargetRx5": 0,
-                        "OutputAmplitudeTargetRx6": 0,
-                        "OutputAmplitudeTargetRx7": 0,
-                        "OutputAmplitudeTargetRx8": 0
-                    },
-                    "OutputEqPreCursorTargetRx": {
-                        "OutputEqPreCursorTargetRx1": 0,
-                        "OutputEqPreCursorTargetRx2": 0,
-                        "OutputEqPreCursorTargetRx3": 0,
-                        "OutputEqPreCursorTargetRx4": 0,
-                        "OutputEqPreCursorTargetRx5": 0,
-                        "OutputEqPreCursorTargetRx6": 0,
-                        "OutputEqPreCursorTargetRx7": 0,
-                        "OutputEqPreCursorTargetRx8": 0
-                    },
-                    "OutputEqPostCursorTargetRx": {
-                        "OutputEqPostCursorTargetRx1": 0,
-                        "OutputEqPostCursorTargetRx2": 0,
-                        "OutputEqPostCursorTargetRx3": 0,
-                        "OutputEqPostCursorTargetRx4": 0,
-                        "OutputEqPostCursorTargetRx5": 0,
-                        "OutputEqPostCursorTargetRx6": 0,
-                        "OutputEqPostCursorTargetRx7": 0,
-                        "OutputEqPostCursorTargetRx8": 0
-                    }
-                }
-            }
-        }
-    }
-}
diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/optics_si_settings.json b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/optics_si_settings.json
new file mode 120000
index 000000000..f2f54cb0b
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/optics_si_settings.json
@@ -0,0 +1 @@
+../Mellanox-SN4700-O8C48/optics_si_settings.json
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/media_settings.json b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/media_settings.json
index d5884a727..6b48c7b70 100644
--- a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/media_settings.json
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/media_settings.json
@@ -190,6 +190,316 @@
                 }
             },
             "OSFP-8X-nm_850_media_interface": {
+		"speed:800G": {
+                    "pre3": {
+                        "lane0": "0x00000000",
+                        "lane1": "0x00000000",
+                        "lane2": "0x00000000",
+                        "lane3": "0x00000000",
+                        "lane4": "0x00000000",
+                        "lane5": "0x00000000",
+                        "lane6": "0x00000000",
+                        "lane7": "0x00000000"
+                    },
+                    "pre2": {
+                        "lane0": "0x00000005",
+                        "lane1": "0x00000005",
+                        "lane2": "0x00000005",
+                        "lane3": "0x00000005",
+                        "lane4": "0x00000005",
+                        "lane5": "0x00000005",
+                        "lane6": "0x00000005",
+                        "lane7": "0x00000005"
+                    },
+                    "pre1": {
+                        "lane0": "0xfffffff1",
+                        "lane1": "0xfffffff1",
+                        "lane2": "0xfffffff1",
+                        "lane3": "0xfffffff1",
+                        "lane4": "0xfffffff1",
+                        "lane5": "0xfffffff1",
+                        "lane6": "0xfffffff1",
+                        "lane7": "0xfffffff1"
+                    },
+                    "main": {
+                        "lane0": "0x0000002b",
+                        "lane1": "0x0000002b",
+                        "lane2": "0x0000002b",
+                        "lane3": "0x0000002b",
+                        "lane4": "0x0000002b",
+                        "lane5": "0x0000002b",
+                        "lane6": "0x0000002b",
+                        "lane7": "0x0000002b"
+                    },
+                    "post1": {
+                        "lane0": "0x00000000",
+                        "lane1": "0x00000000",
+                        "lane2": "0x00000000",
+                        "lane3": "0x00000000",
+                        "lane4": "0x00000000",
+                        "lane5": "0x00000000",
+                        "lane6": "0x00000000",
+                        "lane7": "0x00000000"
+                    },
+                    "idriver": {
+                        "lane0": "0x00000032",
+                        "lane1": "0x00000032",
+                        "lane2": "0x00000032",
+                        "lane3": "0x00000032",
+                        "lane4": "0x00000032",
+                        "lane5": "0x00000032",
+                        "lane6": "0x00000032",
+                        "lane7": "0x00000032"
+                    }
+                },
+                "speed:400GAUI-4-S": {
+                    "pre3": {
+                        "lane0": "0x00000000",
+                        "lane1": "0x00000000",
+                        "lane2": "0x00000000",
+                        "lane3": "0x00000000",
+                        "lane4": "0x00000000",
+                        "lane5": "0x00000000",
+                        "lane6": "0x00000000",
+                        "lane7": "0x00000000"
+                    },
+                    "pre2": {
+                        "lane0": "0x00000005",
+                        "lane1": "0x00000005",
+                        "lane2": "0x00000005",
+                        "lane3": "0x00000005",
+                        "lane4": "0x00000005",
+                        "lane5": "0x00000005",
+                        "lane6": "0x00000005",
+                        "lane7": "0x00000005"
+                    },
+                    "pre1": {
+                        "lane0": "0xfffffff1",
+                        "lane1": "0xfffffff1",
+                        "lane2": "0xfffffff1",
+                        "lane3": "0xfffffff1",
+                        "lane4": "0xfffffff1",
+                        "lane5": "0xfffffff1",
+                        "lane6": "0xfffffff1",
+                        "lane7": "0xfffffff1"
+                    },
+                    "main": {
+                        "lane0": "0x0000002b",
+                        "lane1": "0x0000002b",
+                        "lane2": "0x0000002b",
+                        "lane3": "0x0000002b",
+                        "lane4": "0x0000002b",
+                        "lane5": "0x0000002b",
+                        "lane6": "0x0000002b",
+                        "lane7": "0x0000002b"
+                    },
+                    "post1": {
+                        "lane0": "0x00000000",
+                        "lane1": "0x00000000",
+                        "lane2": "0x00000000",
+                        "lane3": "0x00000000",
+                        "lane4": "0x00000000",
+                        "lane5": "0x00000000",
+                        "lane6": "0x00000000",
+                        "lane7": "0x00000000"
+                    },
+                    "idriver": {
+                        "lane0": "0x00000032",
+                        "lane1": "0x00000032",
+                        "lane2": "0x00000032",
+                        "lane3": "0x00000032",
+                        "lane4": "0x00000032",
+                        "lane5": "0x00000032",
+                        "lane6": "0x00000032",
+                        "lane7": "0x00000032"
+                    }
+                },
+                "speed:400GAUI-8": {
+                    "pre3": {
+                        "lane0": "0x00000000",
+                        "lane1": "0x00000000",
+                        "lane2": "0x00000000",
+                        "lane3": "0x00000000",
+                        "lane4": "0x00000000",
+                        "lane5": "0x00000000",
+                        "lane6": "0x00000000",
+                        "lane7": "0x00000000"
+                    },
+                    "pre2": {
+                        "lane0": "0x00000000",
+                        "lane1": "0x00000000",
+                        "lane2": "0x00000000",
+                        "lane3": "0x00000000",
+                        "lane4": "0x00000000",
+                        "lane5": "0x00000000",
+                        "lane6": "0x00000000",
+                        "lane7": "0x00000000"
+                    },
+                    "pre1": {
+                        "lane0": "0x00000000",
+                        "lane1": "0x00000000",
+                        "lane2": "0x00000000",
+                        "lane3": "0x00000000",
+                        "lane4": "0x00000000",
+                        "lane5": "0x00000000",
+                        "lane6": "0x00000000",
+                        "lane7": "0x00000000"
+                    },
+                    "main": {
+                        "lane0": "0x0000003f",
+                        "lane1": "0x0000003f",
+                        "lane2": "0x0000003f",
+                        "lane3": "0x0000003f",
+                        "lane4": "0x0000003f",
+                        "lane5": "0x0000003f",
+                        "lane6": "0x0000003f",
+                        "lane7": "0x0000003f"
+                    },
+                    "post1": {
+                        "lane0": "0x00000000",
+                        "lane1": "0x00000000",
+                        "lane2": "0x00000000",
+                        "lane3": "0x00000000",
+                        "lane4": "0x00000000",
+                        "lane5": "0x00000000",
+                        "lane6": "0x00000000",
+                        "lane7": "0x00000000"
+                    },
+                    "idriver": {
+                        "lane0": "0x0000003f",
+                        "lane1": "0x0000003f",
+                        "lane2": "0x0000003f",
+                        "lane3": "0x0000003f",
+                        "lane4": "0x0000003f",
+                        "lane5": "0x0000003f",
+                        "lane6": "0x0000003f",
+                        "lane7": "0x0000003f"
+                    }
+                },
+                "speed:400GAUI-4-L": {
+                    "pre3": {
+                        "lane0": "0x00000000",
+                        "lane1": "0x00000000",
+                        "lane2": "0x00000000",
+                        "lane3": "0x00000000",
+                        "lane4": "0x00000000",
+                        "lane5": "0x00000000",
+                        "lane6": "0x00000000",
+                        "lane7": "0x00000000"
+                    },
+                    "pre2": {
+                        "lane0": "0x00000005",
+                        "lane1": "0x00000005",
+                        "lane2": "0x00000005",
+                        "lane3": "0x00000005",
+                        "lane4": "0x00000005",
+                        "lane5": "0x00000005",
+                        "lane6": "0x00000005",
+                        "lane7": "0x00000005"
+                    },
+                    "pre1": {
+                        "lane0": "0xfffffff1",
+                        "lane1": "0xfffffff1",
+                        "lane2": "0xfffffff1",
+                        "lane3": "0xfffffff1",
+                        "lane4": "0xfffffff1",
+                        "lane5": "0xfffffff1",
+                        "lane6": "0xfffffff1",
+                        "lane7": "0xfffffff1"
+                    },
+                    "main": {
+                        "lane0": "0x0000002b",
+                        "lane1": "0x0000002b",
+                        "lane2": "0x0000002b",
+                        "lane3": "0x0000002b",
+                        "lane4": "0x0000002b",
+                        "lane5": "0x0000002b",
+                        "lane6": "0x0000002b",
+                        "lane7": "0x0000002b"
+                    },
+                    "post1": {
+                        "lane0": "0x00000000",
+                        "lane1": "0x00000000",
+                        "lane2": "0x00000000",
+                        "lane3": "0x00000000",
+                        "lane4": "0x00000000",
+                        "lane5": "0x00000000",
+                        "lane6": "0x00000000",
+                        "lane7": "0x00000000"
+                    },
+                    "idriver": {
+                        "lane0": "0x00000032",
+                        "lane1": "0x00000032",
+                        "lane2": "0x00000032",
+                        "lane3": "0x00000032",
+                        "lane4": "0x00000032",
+                        "lane5": "0x00000032",
+                        "lane6": "0x00000032",
+                        "lane7": "0x00000032"
+                    }
+                },
+                "speed:200GAUI-2-L": {
+                    "pre3": {
+                        "lane0": "0x00000000",
+                        "lane1": "0x00000000",
+                        "lane2": "0x00000000",
+                        "lane3": "0x00000000",
+                        "lane4": "0x00000000",
+                        "lane5": "0x00000000",
+                        "lane6": "0x00000000",
+                        "lane7": "0x00000000"
+                    },
+                    "pre2": {
+                        "lane0": "0x00000005",
+                        "lane1": "0x00000005",
+                        "lane2": "0x00000005",
+                        "lane3": "0x00000005",
+                        "lane4": "0x00000005",
+                        "lane5": "0x00000005",
+                        "lane6": "0x00000005",
+                        "lane7": "0x00000005"
+                    },
+                    "pre1": {
+                        "lane0": "0xfffffff1",
+                        "lane1": "0xfffffff1",
+                        "lane2": "0xfffffff1",
+                        "lane3": "0xfffffff1",
+                        "lane4": "0xfffffff1",
+                        "lane5": "0xfffffff1",
+                        "lane6": "0xfffffff1",
+                        "lane7": "0xfffffff1"
+                    },
+                    "main": {
+                        "lane0": "0x0000002b",
+                        "lane1": "0x0000002b",
+                        "lane2": "0x0000002b",
+                        "lane3": "0x0000002b",
+                        "lane4": "0x0000002b",
+                        "lane5": "0x0000002b",
+                        "lane6": "0x0000002b",
+                        "lane7": "0x0000002b"
+                    },
+                    "post1": {
+                        "lane0": "0x00000000",
+                        "lane1": "0x00000000",
+                        "lane2": "0x00000000",
+                        "lane3": "0x00000000",
+                        "lane4": "0x00000000",
+                        "lane5": "0x00000000",
+                        "lane6": "0x00000000",
+                        "lane7": "0x00000000"
+                    },
+                    "idriver": {
+                        "lane0": "0x00000032",
+                        "lane1": "0x00000032",
+                        "lane2": "0x00000032",
+                        "lane3": "0x00000032",
+                        "lane4": "0x00000032",
+                        "lane5": "0x00000032",
+                        "lane6": "0x00000032",
+                        "lane7": "0x00000032"
+                    }
+                },
                 "speed:200GAUI-4": {
                     "post1": {
                         "lane0": "0x00000000",

From 603ee43ab5eb07ac59a3b4554d05a4d62cd0e02a Mon Sep 17 00:00:00 2001
From: Junchao-Mellanox <57339448+Junchao-Mellanox@users.noreply.github.com>
Date: Tue, 3 Sep 2024 15:24:35 +0800
Subject: [PATCH 0960/1115] [Mellanox] Suppress TPM error log (#19965)

- Why I did it
Suppress TPM error log:
ERR kernel: [    3.434153] tpm tpm0: [Firmware Bug]: TPM interrupt not working, polling instead

- How I did it
By setting kernel option "tpm_tis.interrupts=0"

- How to verify it
Manual test and sonic-mgmt regression
---
 device/mellanox/x86_64-nvidia_sn5400-r0/installer.conf | 2 +-
 device/mellanox/x86_64-nvidia_sn5600-r0/installer.conf | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/device/mellanox/x86_64-nvidia_sn5400-r0/installer.conf b/device/mellanox/x86_64-nvidia_sn5400-r0/installer.conf
index d43a240ee..cdaaf72f6 100644
--- a/device/mellanox/x86_64-nvidia_sn5400-r0/installer.conf
+++ b/device/mellanox/x86_64-nvidia_sn5400-r0/installer.conf
@@ -1 +1 @@
-ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="modprobe.blacklist=tpm_tis,tpm_crb,tpm"
+ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="tpm_tis.interrupts=0"
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/installer.conf b/device/mellanox/x86_64-nvidia_sn5600-r0/installer.conf
index 306cde03b..71628d62e 100644
--- a/device/mellanox/x86_64-nvidia_sn5600-r0/installer.conf
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/installer.conf
@@ -1 +1 @@
-ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="libata.force=noncq modprobe.blacklist=tpm_tis,tpm_crb,tpm"
+ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="libata.force=noncq tpm_tis.interrupts=0"

From 6b974cebaa11e87c8010db9f11cb261c901a309a Mon Sep 17 00:00:00 2001
From: Vivek <vivekreddykarri98@gmail.com>
Date: Tue, 3 Sep 2024 00:25:14 -0700
Subject: [PATCH 0961/1115] Use latest natsort package (#19962)

- Why I did it
Fix #17246

- How to verify it
root@sn2700:/home/admin# docker exec swss pip3 show natsort
Name: natsort
Version: 8.4.0

root@sn2700:/home/admin# pip3 show natsort
Name: natsort
Version: 8.4.0

root@sn2700:/home/admin# docker exec syncd pip3 show natsort
Name: natsort
Version: 8.4.0
---
 src/sonic-py-common/setup.py | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-py-common/setup.py b/src/sonic-py-common/setup.py
index 59e7bb0bf..d4ae68536 100644
--- a/src/sonic-py-common/setup.py
+++ b/src/sonic-py-common/setup.py
@@ -8,7 +8,7 @@
 sonic_dependencies = ['redis-dump-load']
 
 dependencies = [
-    'natsort==6.2.1', # 6.2.1 is the last version which supports Python 2
+    'natsort',
     'pyyaml',
 ]
 

From 08b359c0fe8b9662e3ad0b025bc1d13b12b1f5b7 Mon Sep 17 00:00:00 2001
From: Tomer Shalvi <116184476+tshalvi@users.noreply.github.com>
Date: Tue, 3 Sep 2024 10:28:04 +0300
Subject: [PATCH 0962/1115] [Mellanox] Fix Mellanox-SN5600-V256 SKU for CMIS
 host management (#19877)

- Why I did it
On Mellanox platforms, certain configuration files related to the CMIS host management feature were not updated for the V256 SKU, leading to link issues on some ports.

- How I did it
I updated two files for the V256 SKU: media_settings.json to include SerDes SI parameters for the relevant modules, and sai_5600_256x200g.xml to resolve a known host_tx_ready issue.

- How to verify it
Enable the CMIS host management feature on the V256 SKU and verify that all ports successfully come up.
---
 .../Mellanox-SN5600-V256/sai_5600_256x200g.xml                 | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/sai_5600_256x200g.xml b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/sai_5600_256x200g.xml
index 89518aa8c..c03466d84 100644
--- a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/sai_5600_256x200g.xml
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/sai_5600_256x200g.xml
@@ -27,6 +27,9 @@
         <!-- Number of ports in the following port list -->
         <number-of-physical-ports>65</number-of-physical-ports>
 
+        <!-- Global port late create -->
+        <late-create-all-ports>1</late-create-all-ports>
+
         <!-- List of ports in the device -->
         <ports-list>
             <port-info>

From c4d75f841947f5c5916abe2cbc29e2905ffc3ca0 Mon Sep 17 00:00:00 2001
From: Junchao-Mellanox <57339448+Junchao-Mellanox@users.noreply.github.com>
Date: Tue, 3 Sep 2024 15:28:45 +0800
Subject: [PATCH 0963/1115] [Mellanox] wait SFP ready when receive an insert
 event with module host management mode enabled (#19812)

- Why I did it
In dynamic module detection flow, sonic should wait module become ready.

- How I did it
In dynamic module detection flow, sonic should wait module become ready.

- How to verify it
unit test
---
 .../mellanox/mlnx-platform-api/sonic_platform/chassis.py  | 2 ++
 platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py | 8 +++++++-
 .../sonic_platform/wait_sfp_ready_task.py                 | 4 ++--
 .../mellanox/mlnx-platform-api/tests/test_change_event.py | 8 ++++++--
 4 files changed, 17 insertions(+), 5 deletions(-)

diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/chassis.py b/platform/mellanox/mlnx-platform-api/sonic_platform/chassis.py
index 1db831f58..e0bcb2846 100644
--- a/platform/mellanox/mlnx-platform-api/sonic_platform/chassis.py
+++ b/platform/mellanox/mlnx-platform-api/sonic_platform/chassis.py
@@ -475,6 +475,8 @@ def get_change_event_for_module_host_management_mode(self, timeout):
                 if fd_type == 'hw_present':
                     # event could be EVENT_NOT_PRESENT or EVENT_PRESENT
                     event = sfp.EVENT_NOT_PRESENT if fd_value == 0 else sfp.EVENT_PRESENT
+                    if fd_value == 1:
+                        s.processing_insert_event = True
                     s.on_event(event)
                 elif fd_type == 'present':
                     if str(fd_value) == sfp.SFP_STATUS_ERROR:
diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py b/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py
index 342dff2b6..1a0245b79 100644
--- a/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py
+++ b/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py
@@ -476,6 +476,7 @@ def __init__(self, sfp_index, sfp_type=None, slot_id=0, linecard_port_count=0, l
             self.state = STATE_DOWN
         else:
             self.state = STATE_FCP_DOWN
+        self.processing_insert_event = False
 
     def __str__(self):
         return f'SFP {self.sdk_index}'
@@ -1504,7 +1505,12 @@ def action_on_start(cls, sfp):
                 sfp.set_hw_reset(1)
                 sfp.on_event(EVENT_RESET)
             else:
-                sfp.on_event(EVENT_POWER_ON)
+                if not sfp.processing_insert_event:
+                    sfp.on_event(EVENT_POWER_ON)
+                else:
+                    sfp.processing_insert_event = False
+                    logger.log_info(f'SFP {sfp.sdk_index} is processing insert event and needs to wait module ready')
+                    sfp.on_event(EVENT_RESET)
 
     @classmethod
     def action_fcp_on_start(cls, sfp):
diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/wait_sfp_ready_task.py b/platform/mellanox/mlnx-platform-api/sonic_platform/wait_sfp_ready_task.py
index 56b1f479f..4aa893773 100644
--- a/platform/mellanox/mlnx-platform-api/sonic_platform/wait_sfp_ready_task.py
+++ b/platform/mellanox/mlnx-platform-api/sonic_platform/wait_sfp_ready_task.py
@@ -62,8 +62,8 @@ def schedule_wait(self, sfp_index):
         """
         logger.log_debug(f'SFP {sfp_index} is scheduled for waiting reset done')
         with self.lock:
-            if len(self._wait_dict) == 0:
-                is_empty = True
+            is_empty = len(self._wait_dict) == 0
+  
             # The item will be expired in 3 seconds
             self._wait_dict[sfp_index] = time.time() + self.WAIT_TIME
 
diff --git a/platform/mellanox/mlnx-platform-api/tests/test_change_event.py b/platform/mellanox/mlnx-platform-api/tests/test_change_event.py
index 0d3429c48..70652dc74 100644
--- a/platform/mellanox/mlnx-platform-api/tests/test_change_event.py
+++ b/platform/mellanox/mlnx-platform-api/tests/test_change_event.py
@@ -83,7 +83,8 @@ def test_get_change_event_legacy(self, mock_status, mock_time, mock_create_poll,
         _, change_event = c.get_change_event(timeout)
         assert 'sfp' in change_event and sfp_index in change_event['sfp'] and change_event['sfp'][sfp_index] == '2'
         assert 'sfp_error' in change_event and sfp_index in change_event['sfp_error'] and change_event['sfp_error'][sfp_index] == 'some error'
-        
+    
+    @mock.patch('sonic_platform.wait_sfp_ready_task.WaitSfpReadyTask.get_ready_set')    
     @mock.patch('sonic_platform.sfp.SFP.get_fd')
     @mock.patch('select.poll')
     @mock.patch('time.time')
@@ -91,7 +92,7 @@ def test_get_change_event_legacy(self, mock_status, mock_time, mock_create_poll,
     @mock.patch('sonic_platform.device_data.DeviceDataManager.get_sfp_count', mock.MagicMock(return_value=1))
     @mock.patch('sonic_platform.chassis.extract_RJ45_ports_index', mock.MagicMock(return_value=[]))
     @mock.patch('sonic_platform.module_host_mgmt_initializer.ModuleHostMgmtInitializer.initialize', mock.MagicMock())
-    def test_get_change_event_for_module_host_management_mode(self, mock_time, mock_create_poll, mock_get_fd):
+    def test_get_change_event_for_module_host_management_mode(self, mock_time, mock_create_poll, mock_get_fd, mock_ready):
         """Test steps:
             1. Simulate polling with no event
             2. Simulate polling the first dummy event. (SDK always return a event when first polling the fd even if there is no change)
@@ -163,6 +164,7 @@ def get_fd(fd_type):
         s.determine_control_type = mock.MagicMock(return_value=sfp.SFP_FW_CONTROL)
         s.set_control_type = mock.MagicMock()
         mock_time.side_effect = [0, timeout]
+        mock_ready.return_value = set([0])
         mock_hw_present_file.read.return_value = sfp.SFP_STATUS_INSERTED
         _, change_event = c.get_change_event(timeout)
         assert 'sfp' in change_event and sfp_index in change_event['sfp'] and change_event['sfp'][sfp_index] == sfp.SFP_STATUS_INSERTED
@@ -173,6 +175,7 @@ def get_fd(fd_type):
         print(c.registered_fds)
         
         # error event, expect returning error
+        mock_ready.return_value = []
         mock_time.side_effect = [0, timeout]
         mock_poll.poll.return_value = [(3, 10)]
         mock_present_file.read.return_value = sfp.SFP_STATUS_ERROR
@@ -193,6 +196,7 @@ def get_fd(fd_type):
         
         # plug in a software control cable, expect returning insert event
         mock_time.side_effect = [0, timeout]
+        mock_ready.return_value = set([0])
         mock_poll.poll.return_value = [(1, 10)]
         mock_hw_present_file.read.return_value = sfp.SFP_STATUS_INSERTED
         s.determine_control_type.return_value = sfp.SFP_SW_CONTROL

From 2ff111cb94113ef01841597e95c2c5ddbee2a6f8 Mon Sep 17 00:00:00 2001
From: Yakiv Huryk <62013282+Yakiv-Huryk@users.noreply.github.com>
Date: Tue, 3 Sep 2024 10:29:38 +0300
Subject: [PATCH 0964/1115] [CRM][DASH] add the default CRM DASH thresholds to
 the t1-smartswitch DPU template (#19776)

- Why I did it
To add the DASH CRM resource thresholds to the t1-smartswitch DPU configuration template

- How I did it
Updated sonic-cfggen generate_t1_smartswitch_dpu_sample_config()
Updated sonic-cfggen tests

- How to verify it
Run sonic-cfggen tests

Signed-off-by: Yakiv Huryk <yhuryk@nvidia.com>
---
 src/sonic-config-engine/config_samples.py     | 12 +++++
 .../sample_output/t1-smartswitch-dpu.json     | 49 +++++++++++++++++++
 2 files changed, 61 insertions(+)

diff --git a/src/sonic-config-engine/config_samples.py b/src/sonic-config-engine/config_samples.py
index b5b25757b..d72925c84 100644
--- a/src/sonic-config-engine/config_samples.py
+++ b/src/sonic-config-engine/config_samples.py
@@ -150,6 +150,18 @@ def generate_t1_smartswitch_dpu_sample_config(data, ss_config):
         data['PORT'][port]['admin_status'] = 'up'
         data['PORT'][port]['mtu'] = '9100'
 
+    dash_crm_resources = ["vnet", "eni", "eni_ether_address_map", "ipv4_inbound_routing", "ipv6_inbound_routing", "ipv4_outbound_routing",
+                          "ipv6_outbound_routing", "ipv4_pa_validation", "ipv6_pa_validation", "ipv4_outbound_ca_to_pa", "ipv6_outbound_ca_to_pa",
+                          "ipv4_acl_group", "ipv6_acl_group", "ipv4_acl_rule", "ipv6_acl_rule"]
+    dash_crm_thresholds = dict([thresholds for res in dash_crm_resources for thresholds in (
+            (f"dash_{res}_threshold_type", "percentage"),
+            (f"dash_{res}_low_threshold", "70"),
+            (f"dash_{res}_high_threshold", "85")
+        )])
+
+    crmconfig = data.setdefault('CRM', {}).setdefault('Config', {})
+    crmconfig.update(dash_crm_thresholds)
+
     return data
 
 def generate_t1_smartswitch_sample_config(data):
diff --git a/src/sonic-config-engine/tests/sample_output/t1-smartswitch-dpu.json b/src/sonic-config-engine/tests/sample_output/t1-smartswitch-dpu.json
index 23a29ba6e..9421f40c3 100644
--- a/src/sonic-config-engine/tests/sample_output/t1-smartswitch-dpu.json
+++ b/src/sonic-config-engine/tests/sample_output/t1-smartswitch-dpu.json
@@ -23,5 +23,54 @@
             "FLEX_COUNTER_DELAY_STATUS": "true",
             "POLL_INTERVAL": "10000"
         }
+    },
+    "CRM": {
+        "Config": {
+            "dash_vnet_threshold_type": "percentage",
+            "dash_vnet_low_threshold": "70",
+            "dash_vnet_high_threshold": "85",
+            "dash_eni_threshold_type": "percentage",
+            "dash_eni_low_threshold": "70",
+            "dash_eni_high_threshold": "85",
+            "dash_eni_ether_address_map_threshold_type": "percentage",
+            "dash_eni_ether_address_map_low_threshold": "70",
+            "dash_eni_ether_address_map_high_threshold": "85",
+            "dash_ipv4_inbound_routing_threshold_type": "percentage",
+            "dash_ipv4_inbound_routing_low_threshold": "70",
+            "dash_ipv4_inbound_routing_high_threshold": "85",
+            "dash_ipv6_inbound_routing_threshold_type": "percentage",
+            "dash_ipv6_inbound_routing_low_threshold": "70",
+            "dash_ipv6_inbound_routing_high_threshold": "85",
+            "dash_ipv4_outbound_routing_threshold_type": "percentage",
+            "dash_ipv4_outbound_routing_low_threshold": "70",
+            "dash_ipv4_outbound_routing_high_threshold": "85",
+            "dash_ipv6_outbound_routing_threshold_type": "percentage",
+            "dash_ipv6_outbound_routing_low_threshold": "70",
+            "dash_ipv6_outbound_routing_high_threshold": "85",
+            "dash_ipv4_pa_validation_threshold_type": "percentage",
+            "dash_ipv4_pa_validation_low_threshold": "70",
+            "dash_ipv4_pa_validation_high_threshold": "85",
+            "dash_ipv6_pa_validation_threshold_type": "percentage",
+            "dash_ipv6_pa_validation_low_threshold": "70",
+            "dash_ipv6_pa_validation_high_threshold": "85",
+            "dash_ipv4_outbound_ca_to_pa_threshold_type": "percentage",
+            "dash_ipv4_outbound_ca_to_pa_low_threshold": "70",
+            "dash_ipv4_outbound_ca_to_pa_high_threshold": "85",
+            "dash_ipv6_outbound_ca_to_pa_threshold_type": "percentage",
+            "dash_ipv6_outbound_ca_to_pa_low_threshold": "70",
+            "dash_ipv6_outbound_ca_to_pa_high_threshold": "85",
+            "dash_ipv4_acl_group_threshold_type": "percentage",
+            "dash_ipv4_acl_group_low_threshold": "70",
+            "dash_ipv4_acl_group_high_threshold": "85",
+            "dash_ipv6_acl_group_threshold_type": "percentage",
+            "dash_ipv6_acl_group_low_threshold": "70",
+            "dash_ipv6_acl_group_high_threshold": "85",
+            "dash_ipv4_acl_rule_threshold_type": "percentage",
+            "dash_ipv4_acl_rule_low_threshold": "70",
+            "dash_ipv4_acl_rule_high_threshold": "85",
+            "dash_ipv6_acl_rule_threshold_type": "percentage",
+            "dash_ipv6_acl_rule_low_threshold": "70",
+            "dash_ipv6_acl_rule_high_threshold": "85"
+        }
     }
 }

From 428dc8995b289d4e24abdc9bafabf2a123462d5b Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Tue, 3 Sep 2024 19:00:57 +0800
Subject: [PATCH 0965/1115] [submodule] Update submodule sonic-utilities to the
 latest HEAD automatically (#20106)

#### Why I did it
src/sonic-utilities
```
* d25e531f - (HEAD -> master, origin/master, origin/HEAD) [reboot]: Allow reboot to happen regardless vendor hook errors (#3454) (2 hours ago) [Nazarii Hnydyn]
* ee906811 - Revert "Remove suppress-fib-pending CLI and make route_check.py check suppress-fib in BGP configuration" (#3477) (13 hours ago) [Sudharsan Dhamal Gopalarathnam]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-utilities | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-utilities b/src/sonic-utilities
index c4ce5ae59..d25e531f1 160000
--- a/src/sonic-utilities
+++ b/src/sonic-utilities
@@ -1 +1 @@
-Subproject commit c4ce5ae5947554258608ae5ba97c50bdaf761015
+Subproject commit d25e531f1b587ffd4c280a8ca2b7ad6a15f339ab

From eee217d4509cba021947b678c6c0aa953271c290 Mon Sep 17 00:00:00 2001
From: Yaqiang Zhu <zyq1512099831@gmail.com>
Date: Wed, 4 Sep 2024 08:33:27 +0800
Subject: [PATCH 0966/1115] [isc-dhcp-relay] Add patch to init io obj before
 creating fd watch (#20021)

Why I did it
In the scenario dhcrelay startup with DHCP packets come, there is possibility that dhcrelay try to attach FD wather to I/O handler before I/O handler initiated, which cause dhcrelay wouldn't read any packets from FD. This PR is to fix that issue.

How I did it
Move initialization part to place before attach FD watcher
Add log when it fails to attach FD watcher

How to verify it
Build image and run tests
---
 ...gister-IO-obj-before-create-fd-watch.patch | 110 ++++++++++++++++++
 src/isc-dhcp/patch/series                     |   1 +
 2 files changed, 111 insertions(+)
 create mode 100644 src/isc-dhcp/patch/0017-Register-IO-obj-before-create-fd-watch.patch

diff --git a/src/isc-dhcp/patch/0017-Register-IO-obj-before-create-fd-watch.patch b/src/isc-dhcp/patch/0017-Register-IO-obj-before-create-fd-watch.patch
new file mode 100644
index 000000000..7e1bddd63
--- /dev/null
+++ b/src/isc-dhcp/patch/0017-Register-IO-obj-before-create-fd-watch.patch
@@ -0,0 +1,110 @@
+From debe69ebc8df454f0fa7a8c6f3a7c9622ceaf3c2 Mon Sep 17 00:00:00 2001
+From: yaqiangz <zyq1512099831@gmail.com>
+Date: Mon, 26 Aug 2024 02:18:52 +0000
+Subject: [PATCH] Register IO obj before create fd watch
+
+---
+ omapip/dispatch.c | 44 +++++++++++++++++++++++++++-----------------
+ 1 file changed, 27 insertions(+), 17 deletions(-)
+
+diff --git a/omapip/dispatch.c b/omapip/dispatch.c
+index 644ab43..d9b9a57 100644
+--- a/omapip/dispatch.c
++++ b/omapip/dispatch.c
+@@ -123,6 +123,7 @@ omapi_iscsock_cb(isc_task_t   *task,
+ 		 int           flags)
+ {
+ 	omapi_io_object_t *obj;
++	omapi_io_object_t *temp_obj;
+ 	isc_result_t status;
+ 
+ 	/* Get the current time... */
+@@ -140,6 +141,9 @@ omapi_iscsock_cb(isc_task_t   *task,
+ 	}
+ 
+ 	if (obj == NULL) {
++		temp_obj = (omapi_io_object_t *) cbarg;
++		log_error ("Isc socket callback of fd %d return 0 because obj is NULL",
++		           temp_obj->fd->methods->getfd(temp_obj->fd));
+ 		return(0);
+ 	}
+ #else
+@@ -157,6 +161,8 @@ omapi_iscsock_cb(isc_task_t   *task,
+ 	 * close the socket.
+ 	 */
+ 	if (obj->closed == ISC_TRUE) {
++		log_error ("Isc socket callback of fd %d return 0 because fd closed",
++		           obj->fd->methods->getfd(obj->fd));
+ 		return(0);
+ 	}
+ #endif
+@@ -170,8 +176,11 @@ omapi_iscsock_cb(isc_task_t   *task,
+ 		 * read and got no bytes) we don't need to try
+ 		 * again.
+ 		 */
+-		if (status == ISC_R_SHUTTINGDOWN)
++		if (status == ISC_R_SHUTTINGDOWN) {
++			log_error ("Isc socket callback of fd %d return 0 because reader shutdown",
++			           obj->fd->methods->getfd(obj->fd));
+ 			return (0);
++		}
+ 		/* Otherwise We always ask for more when reading */
+ 		return (1);
+ 	} else if ((flags == ISC_SOCKFDWATCH_WRITE) &&
+@@ -190,6 +199,8 @@ omapi_iscsock_cb(isc_task_t   *task,
+ 	 * structures etc) or no more to write, tell the socket
+ 	 * lib we don't have more to do right now.
+ 	 */
++	log_error ("Isc socket callback of fd %d return 0 because unknown issue",
++			   obj->fd->methods->getfd(obj->fd));
+ 	return (0);
+ }
+ 
+@@ -255,6 +266,21 @@ isc_result_t omapi_register_io_object (omapi_object_t *h,
+ 		fd = writefd(h);
+ 	}
+ 
++	/* Find the last I/O state, if there are any. */
++	for (p = omapi_io_states.next;
++	     p && p -> next; p = p -> next)
++		;
++	if (p)
++		omapi_io_reference (&p -> next, obj, MDL);
++	else
++		omapi_io_reference (&omapi_io_states.next, obj, MDL);
++
++	obj -> readfd = readfd;
++	obj -> writefd = writefd;
++	obj -> reader = reader;
++	obj -> writer = writer;
++	obj -> reaper = reaper;
++
+ 	if (fd_flags != 0) {
+ 		status = isc_socket_fdwatchcreate(dhcp_gbl_ctx.socketmgr,
+ 						  fd, fd_flags,
+@@ -274,22 +300,6 @@ isc_result_t omapi_register_io_object (omapi_object_t *h,
+ 		}
+ 	}
+ 
+-
+-	/* Find the last I/O state, if there are any. */
+-	for (p = omapi_io_states.next;
+-	     p && p -> next; p = p -> next)
+-		;
+-	if (p)
+-		omapi_io_reference (&p -> next, obj, MDL);
+-	else
+-		omapi_io_reference (&omapi_io_states.next, obj, MDL);
+-
+-	obj -> readfd = readfd;
+-	obj -> writefd = writefd;
+-	obj -> reader = reader;
+-	obj -> writer = writer;
+-	obj -> reaper = reaper;
+-
+ 	omapi_io_dereference(&obj, MDL);
+ 	return ISC_R_SUCCESS;
+ }
+-- 
+2.25.1
+
diff --git a/src/isc-dhcp/patch/series b/src/isc-dhcp/patch/series
index 755200d9e..d61fd2bf7 100644
--- a/src/isc-dhcp/patch/series
+++ b/src/isc-dhcp/patch/series
@@ -14,3 +14,4 @@
 0014-enable-parallel-build.patch
 0015-option-to-set-primary-address-in-interface.patch
 0016-Don-t-look-up-the-ifindex-for-fallback.patch
+0017-Register-IO-obj-before-create-fd-watch.patch

From f0979dd1f86d268ea648cc6420f6e2b66fa31118 Mon Sep 17 00:00:00 2001
From: anamehra <54692434+anamehra@users.noreply.github.com>
Date: Tue, 3 Sep 2024 22:56:02 -0700
Subject: [PATCH 0967/1115] Remove default hash-offset for chassis-packet
 (#19745)

Why I did it
Fixes #19746

switch.json in swss docker sets the default hash offset to 0 for chassis-packet. The change was recently introduced via #18912 which was supposed to be only for T0/T1. On chassis-packet, each asics needs to set an unique hash offset to set an unique offset for load balancing algorithm. The new change overwrites platform setting and resets the hash-offset to 0 on all asics. This breaks the ecmp load balancing algorithm on chassis-packet.

How I did it
Remove the default hash-offset setting for chassis-packet. This setting is provided by platform based on platform specific rules.

How to verify it
Run sonic-mgmt fib/test_fib.py

Signed-off-by: anamehra <anamehra@cisco.com>
---
 dockers/docker-orchagent/switch.json.j2       |  2 ++
 .../tests/sample_output/t2-switch-masic1.json | 11 +++++++
 .../tests/sample_output/t2-switch-masic3.json | 11 +++++++
 src/sonic-config-engine/tests/test_j2files.py | 31 +++++++++++++++++++
 4 files changed, 55 insertions(+)
 create mode 100644 src/sonic-config-engine/tests/sample_output/t2-switch-masic1.json
 create mode 100644 src/sonic-config-engine/tests/sample_output/t2-switch-masic3.json

diff --git a/dockers/docker-orchagent/switch.json.j2 b/dockers/docker-orchagent/switch.json.j2
index 565d6b500..63d3e80e3 100644
--- a/dockers/docker-orchagent/switch.json.j2
+++ b/dockers/docker-orchagent/switch.json.j2
@@ -26,8 +26,10 @@
             "ecmp_hash_seed": "{{ hash_seed_value }}",
             "lag_hash_seed": "{{ hash_seed_value }}",
             "fdb_aging_time": "600",
+{% if not DEVICE_METADATA.localhost.switch_type or DEVICE_METADATA.localhost.switch_type != "chassis-packet" %}
             "ecmp_hash_offset": "{{ ecmp_hash_offset_value }}",
             "lag_hash_offset": "{{ lag_hash_offset_value }}",
+{% endif %}
 {% if DEVICE_METADATA.localhost.type and "LeafRouter" in DEVICE_METADATA.localhost.type %}
             "ordered_ecmp": "true"
 {% else %}
diff --git a/src/sonic-config-engine/tests/sample_output/t2-switch-masic1.json b/src/sonic-config-engine/tests/sample_output/t2-switch-masic1.json
new file mode 100644
index 000000000..c88d4c699
--- /dev/null
+++ b/src/sonic-config-engine/tests/sample_output/t2-switch-masic1.json
@@ -0,0 +1,11 @@
+[
+    {
+        "SWITCH_TABLE:switch": {
+            "ecmp_hash_seed": "26",
+            "lag_hash_seed": "26",
+            "fdb_aging_time": "600",
+            "ordered_ecmp": "false"
+        },
+        "OP": "SET"
+    }
+]
diff --git a/src/sonic-config-engine/tests/sample_output/t2-switch-masic3.json b/src/sonic-config-engine/tests/sample_output/t2-switch-masic3.json
new file mode 100644
index 000000000..2e5e3fbf4
--- /dev/null
+++ b/src/sonic-config-engine/tests/sample_output/t2-switch-masic3.json
@@ -0,0 +1,11 @@
+[
+    {
+        "SWITCH_TABLE:switch": {
+            "ecmp_hash_seed": "28",
+            "lag_hash_seed": "28",
+            "fdb_aging_time": "600",
+            "ordered_ecmp": "false"
+        },
+        "OP": "SET"
+    }
+]
diff --git a/src/sonic-config-engine/tests/test_j2files.py b/src/sonic-config-engine/tests/test_j2files.py
index ed8ed58e4..2f424f6c3 100644
--- a/src/sonic-config-engine/tests/test_j2files.py
+++ b/src/sonic-config-engine/tests/test_j2files.py
@@ -47,6 +47,7 @@ def setUp(self):
         self.no_ip_helper_minigraph = os.path.join(self.test_dir, 't0-sample-no-ip-helper-graph.xml')
         self.nokia_ixr7250e_36x100g_t2_minigraph = os.path.join(self.test_dir, 'sample-nokia-ixr7250e-36x100g-t2-minigraph.xml')
         self.nokia_ixr7250e_36x400g_t2_minigraph = os.path.join(self.test_dir, 'sample-nokia-ixr7250e-36x400g-t2-minigraph.xml')
+        self.t2_sample_graph_chassis_packet = os.path.join(self.test_dir, 'sample-chassis-packet-lc-graph.xml')
         self.output_file = os.path.join(self.test_dir, 'output')
         os.environ["CFGGEN_UNIT_TESTING"] = "2"
 
@@ -753,6 +754,36 @@ def test_swss_switch_render_template_multi_asic(self):
             assert utils.cmp(sample_output_file, self.output_file), self.run_diff(sample_output_file, self.output_file)
         os.environ["NAMESPACE_ID"] = ""
 
+    def test_swss_switch_render_template_t2(self):
+        # verify the ECMP hash seed changes per namespace
+        switch_template = os.path.join(
+            self.test_dir, '..', '..', '..', 'dockers', 'docker-orchagent',
+            'switch.json.j2'
+        )
+        constants_yml = os.path.join(
+            self.test_dir, '..', '..', '..', 'files', 'image_config',
+            'constants', 'constants.yml'
+        )
+        test_list = {
+            "0": {
+                "namespace_id": "1",
+                "output": "t2-switch-masic1.json"
+            },
+            "1": {
+                "namespace_id": "3",
+                "output": "t2-switch-masic3.json"
+            },
+        }
+        for _, v in test_list.items():
+            os.environ["NAMESPACE_ID"] = v["namespace_id"]
+            argument = ["-m", self.t2_sample_graph_chassis_packet, "-y", constants_yml, "-t", switch_template]
+            sample_output_file = os.path.join(
+                self.test_dir, 'sample_output', v["output"]
+            )
+            self.run_script(argument, output_file=self.output_file)
+            assert utils.cmp(sample_output_file, self.output_file), self.run_diff(sample_output_file, self.output_file)
+        os.environ["NAMESPACE_ID"] = ""
+
     def test_ndppd_conf(self):
         conf_template = os.path.join(self.test_dir, "ndppd.conf.j2")
         vlan_interfaces_json = os.path.join(self.test_dir, "data", "ndppd", "vlan_interfaces.json")

From 7cb7e791053a810d2e045b30de411de335ebfbdd Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Wed, 4 Sep 2024 19:00:59 +0800
Subject: [PATCH 0968/1115] [submodule] Update submodule sonic-utilities to the
 latest HEAD automatically (#20122)

#### Why I did it
src/sonic-utilities
```
* d29b8241 - (HEAD -> master, origin/master, origin/HEAD) Revert "[wol] Implement wol command line utility" (#3515) (3 hours ago) [Wenda Chu]
* 9357c45f - [chassis][cli] Fix config chassis module startup/shutdown command for fabric module (#3483) (9 hours ago) [Marty Y. Lok]
* 4c7e54a9 - [qos reload] Fix "config qos reload" overriding entire CONFIG_DB (#3479) (18 hours ago) [Stepan Blyshchak]
* 544584ea - Add back the option f to the reboot script (#3492) (18 hours ago) [DavidZagury]
* dc955e80 - [Mellanox] Add CMIS Host Management Files to 'show techsupport' Dumps (#3501) (18 hours ago) [Tomer Shalvi]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-utilities | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-utilities b/src/sonic-utilities
index d25e531f1..d29b8241a 160000
--- a/src/sonic-utilities
+++ b/src/sonic-utilities
@@ -1 +1 @@
-Subproject commit d25e531f1b587ffd4c280a8ca2b7ad6a15f339ab
+Subproject commit d29b8241abdec0c90cafd2fa5bd6b64d698fd98a

From 18233afb08dbfb93e0f665fc9c1dcb42f49f1357 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Wed, 4 Sep 2024 19:01:03 +0800
Subject: [PATCH 0969/1115] [submodule] Update submodule sonic-platform-common
 to the latest HEAD automatically (#20121)

#### Why I did it
src/sonic-platform-common
```
* 309a5fb - (HEAD -> master, origin/master, origin/HEAD) Make is_flat_memory more robust (#491) (18 hours ago) [Junchao-Mellanox]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-platform-common | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-platform-common b/src/sonic-platform-common
index a61bc23d3..309a5fbb4 160000
--- a/src/sonic-platform-common
+++ b/src/sonic-platform-common
@@ -1 +1 @@
-Subproject commit a61bc23d3bfa70ef21aaf988d790ad54ce726244
+Subproject commit 309a5fbb4c3d08fe13d74a16bb1d53bdc5c06cbf

From a791d542894d47a044bb8eb1aa48c35a1c98a94b Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Wed, 4 Sep 2024 19:01:34 +0800
Subject: [PATCH 0970/1115] [submodule] Update submodule sonic-swss to the
 latest HEAD automatically (#19898)

#### Why I did it
src/sonic-swss
```
* 42ea859c - (HEAD -> master, origin/master, origin/HEAD) Reset skip error counter on a fabric link if it was down. (#3247) (5 hours ago) [jfeng-arista]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-swss | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-swss b/src/sonic-swss
index 29cea04a0..42ea859ce 160000
--- a/src/sonic-swss
+++ b/src/sonic-swss
@@ -1 +1 @@
-Subproject commit 29cea04a0b98cc440fd5730c758a9b73ac95362c
+Subproject commit 42ea859ce982b21ff40c78c92a5ab21aafb52fad

From cab94964d94381ac399361436e85d6ca6637cbd9 Mon Sep 17 00:00:00 2001
From: Andriy Yurkiv <70649192+ayurkiv-nvda@users.noreply.github.com>
Date: Wed, 4 Sep 2024 23:08:36 +0300
Subject: [PATCH 0971/1115] [Mellanox] update buffers and align QoS to add
 support for DSCP remapping (for Dual-Tor on t1) for Mellanox-SN4700-O8C48
 (#19999)

* [Mellanox] update buffers and align QoS to add support for DSCP remapping (for Dual-Tor on t1) for Mellanox-SN4700-O8C48

Signed-off-by: Andriy Yurkiv <ayurkiv@nvidia.com>
---
 .../buffers_defaults_t0.j2                    | 23 ++++++--
 .../buffers_defaults_t1.j2                    | 23 ++++++--
 .../pg_profile_lookup.ini                     | 54 ++++++++++++++++++-
 .../Mellanox-SN4700-O8C48/qos.json.j2         |  2 +-
 4 files changed, 92 insertions(+), 10 deletions(-)
 mode change 120000 => 100644 device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/pg_profile_lookup.ini

diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/buffers_defaults_t0.j2 b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/buffers_defaults_t0.j2
index a4aa03be8..4caa1ca8f 100644
--- a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/buffers_defaults_t0.j2
+++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/buffers_defaults_t0.j2
@@ -1,5 +1,5 @@
 {#
-    Copyright (c) 2022-2023 NVIDIA CORPORATION & AFFILIATES.
+    Copyright (c) 2022-2024 NVIDIA CORPORATION & AFFILIATES.
     Apache-2.0
     Licensed under the Apache License, Version 2.0 (the "License");
     you may not use this file except in compliance with the License.
@@ -12,10 +12,17 @@
     limitations under the License.
 #}
 {% set default_cable = '5m' %}
-{% set ingress_lossless_pool_size =  '44433408' %}
-{% set ingress_lossless_pool_xoff  =  '9576448' %}
+{%- if ((SYSTEM_DEFAULTS is defined) and ('tunnel_qos_remap' in SYSTEM_DEFAULTS) and (SYSTEM_DEFAULTS['tunnel_qos_remap']['status'] == 'enabled')) -%}
+{% set ingress_lossless_pool_size =  '50397184' %}
+{% set ingress_lossless_pool_xoff  =  '2990080' %}
 {% set egress_lossless_pool_size =  '60817392' %}
-{% set egress_lossy_pool_size =  '44433408' %}
+{% set egress_lossy_pool_size =  '50397184' %}
+{%- else -%}
+{% set ingress_lossless_pool_size =  '51748864' %}
+{% set ingress_lossless_pool_xoff  =  '2260992' %}
+{% set egress_lossless_pool_size =  '60817392' %}
+{% set egress_lossy_pool_size =  '51748864' %}
+{%- endif -%}
 
 {% import 'buffers_defaults_objects.j2' as defs with context %}
 
@@ -23,10 +30,18 @@
 {{ defs.generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) }}
 {%- endmacro %}
 
+{%- macro generate_queue_buffers_with_extra_lossless_queues_with_inactive_ports(port_names_active, port_names_extra_queues, port_names_inactive) %}
+{{ defs.generate_queue_buffers_with_extra_lossless_queues(port_names_active, port_names_extra_queues, port_names_inactive) }}
+{%- endmacro %}
+
 {%- macro generate_profile_lists_with_inactive_ports(port_names_active, port_names_inactive) %}
 {{ defs.generate_profile_lists(port_names_active, port_names_inactive) }}
 {%- endmacro %}
 
+{%- macro generate_pg_profiles_with_extra_lossless_pgs_with_inactive_ports(port_names_active, port_names_extra_pgs, port_names_inactive) %}
+{{ defs.generate_pg_profiles_with_extra_lossless_pgs(port_names_active, port_names_extra_pgs, port_names_inactive) }}
+{%- endmacro %}
+
 {%- macro generate_queue_buffers_with_inactive_ports(port_names_active, port_names_inactive) %}
 {{ defs.generate_queue_buffers(port_names_active, port_names_inactive) }}
 {%- endmacro %}
diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/buffers_defaults_t1.j2 b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/buffers_defaults_t1.j2
index 40048d03e..0cb2d6fc6 100644
--- a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/buffers_defaults_t1.j2
+++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/buffers_defaults_t1.j2
@@ -1,5 +1,5 @@
 {#
-    Copyright (c) 2022-2023 NVIDIA CORPORATION & AFFILIATES.
+    Copyright (c) 2022-2024 NVIDIA CORPORATION & AFFILIATES.
     Apache-2.0
     Licensed under the Apache License, Version 2.0 (the "License");
     you may not use this file except in compliance with the License.
@@ -12,10 +12,17 @@
     limitations under the License.
 #}
 {% set default_cable = '300m' %}
-{% set ingress_lossless_pool_size =  '44089344' %}
-{% set ingress_lossless_pool_xoff  =  '9920512' %}
+{%- if ((SYSTEM_DEFAULTS is defined) and ('tunnel_qos_remap' in SYSTEM_DEFAULTS) and (SYSTEM_DEFAULTS['tunnel_qos_remap']['status'] == 'enabled')) -%}
+{% set ingress_lossless_pool_size =  '43859968' %}
+{% set ingress_lossless_pool_xoff  =  '8282112' %}
 {% set egress_lossless_pool_size =  '60817392' %}
-{% set egress_lossy_pool_size =  '44089344' %}
+{% set egress_lossy_pool_size =  '43859968' %}
+{%- else -%}
+{% set ingress_lossless_pool_size =  '47792128' %}
+{% set ingress_lossless_pool_xoff  =  '6217728 ' %}
+{% set egress_lossless_pool_size =  '60817392' %}
+{% set egress_lossy_pool_size =  '47792128 ' %}
+{%- endif -%}
 
 {% import 'buffers_defaults_objects.j2' as defs with context %}
 
@@ -27,10 +34,18 @@
 {{ defs.generate_profile_lists(port_names_active, port_names_inactive) }}
 {%- endmacro %}
 
+{%- macro generate_queue_buffers_with_extra_lossless_queues_with_inactive_ports(port_names_active, port_names_extra_queues, port_names_inactive) %}
+{{ defs.generate_queue_buffers_with_extra_lossless_queues(port_names_active, port_names_extra_queues, port_names_inactive) }}
+{%- endmacro %}
+
 {%- macro generate_queue_buffers_with_inactive_ports(port_names_active, port_names_inactive) %}
 {{ defs.generate_queue_buffers(port_names_active, port_names_inactive) }}
 {%- endmacro %}
 
+{%- macro generate_pg_profiles_with_extra_lossless_pgs_with_inactive_ports(port_names_active, port_names_extra_pgs, port_names_inactive) %}
+{{ defs.generate_pg_profiles_with_extra_lossless_pgs(port_names_active, port_names_extra_pgs, port_names_inactive) }}
+{%- endmacro %}
+
 {%- macro generate_pg_profiles_with_inactive_ports(port_names_active, port_names_inactive) %}
 {{ defs.generate_pg_profiles(port_names_active, port_names_inactive) }}
 {%- endmacro %}
diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/pg_profile_lookup.ini b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/pg_profile_lookup.ini
deleted file mode 120000
index 66cab04d2..000000000
--- a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/pg_profile_lookup.ini
+++ /dev/null
@@ -1 +0,0 @@
-../Mellanox-SN4700-C128/pg_profile_lookup.ini
\ No newline at end of file
diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/pg_profile_lookup.ini b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/pg_profile_lookup.ini
new file mode 100644
index 000000000..9fbb8eacf
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/pg_profile_lookup.ini
@@ -0,0 +1,53 @@
+##
+## Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+## Apache-2.0
+##
+## Licensed under the Apache License, Version 2.0 (the "License");
+## you may not use this file except in compliance with the License.
+## You may obtain a copy of the License at
+##
+## http://www.apache.org/licenses/LICENSE-2.0
+##
+## Unless required by applicable law or agreed to in writing, software
+## distributed under the License is distributed on an "AS IS" BASIS,
+## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+## See the License for the specific language governing permissions and
+## limitations under the License.
+##
+#  PG lossless profiles.
+# speed cable  size   xon    xoff   threshold
+  10000    5m 19456  19456  16384          0
+  25000    5m 19456  19456  17408          0
+  40000    5m 19456  19456  19456          0
+  50000    5m 19456  19456  21504          0
+ 100000    5m 19456  19456  37888          0
+ 200000    5m 19456  19456  43008          0
+ 400000    5m 38912  38912  73728          0
+  10000   40m 19456  19456  16384          0
+  25000   40m 19456  19456  18432          0
+  40000   40m 19456  19456  21504          0
+  50000   40m 19456  19456  23552          0
+ 100000   40m 19456  19456  43008          0
+ 200000   40m 19456  19456  51200          0
+ 400000   40m 38912  38912  91136          0
+  10000  300m 19456  19456  19456          0
+  25000  300m 19456  19456  26624          0
+  40000  300m 19456  19456  34816          0
+  50000  300m 19456  19456  40960          0
+ 100000  300m 19456  19456  75776          0
+ 200000  300m 19456  19456  118784         0
+ 400000  300m 38912  38912  225280         0
+  10000 1500m 19456  19456  35840          0
+  25000 1500m 19456  19456  65536          0
+  40000 1500m 19456  19456  96256          0
+  50000 1500m 19456  19456  117760         0
+ 100000 1500m 19456  19456  230400         0
+ 200000 1500m 19456  19456  427008         0
+ 400000 1500m 38912  38912  427008         0
+  10000 2000m 19456  19456  41984          0
+  25000 2000m 19456  19456  80896          0
+  40000 2000m 19456  19456  121856         0
+  50000 2000m 19456  19456  149504         0
+ 100000 2000m 19456  19456  293888         0
+ 200000 2000m 19456  19456  555008         0
+ 400000 2000m 38912  38912  555008         0
diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/qos.json.j2 b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/qos.json.j2
index eccf286dc..48221aa2b 120000
--- a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/qos.json.j2
+++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/qos.json.j2
@@ -1 +1 @@
-../../x86_64-mlnx_msn2700-r0/ACS-MSN2700/qos.json.j2
\ No newline at end of file
+../../x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-C64/qos.json.j2
\ No newline at end of file

From c3acfdcec914c5b04cf81841b1b993305ac4376f Mon Sep 17 00:00:00 2001
From: Yakiv Huryk <62013282+Yakiv-Huryk@users.noreply.github.com>
Date: Thu, 5 Sep 2024 09:41:55 +0300
Subject: [PATCH 0972/1115] [Mellanox] set default IMA algorithm to sha384 on
 SN4280 (#19973)

- Why I did it
To avoid the following error message:
ima: No suitable TPM algorithm for boot aggregate

- How I did it
Set the IMA hash algorithm to sha384 so the IMA can find the TPM algorithm

- How to verify it
Manual test

Signed-off-by: Yakiv Huryk <yhuryk@nvidia.com>
---
 device/mellanox/x86_64-nvidia_sn4280-r0/installer.conf | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/installer.conf b/device/mellanox/x86_64-nvidia_sn4280-r0/installer.conf
index b5ee161d1..867e2217c 100644
--- a/device/mellanox/x86_64-nvidia_sn4280-r0/installer.conf
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/installer.conf
@@ -1 +1 @@
-ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="libata.force=noncq module_blacklist=mlx5_ib,mlx5_core"
+ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="libata.force=noncq module_blacklist=mlx5_ib,mlx5_core ima_hash=sha384"

From 3df36696ce956c91c6c295a32414777b9f153792 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Thu, 5 Sep 2024 16:01:07 +0800
Subject: [PATCH 0973/1115] [submodule] Update submodule sonic-utilities to the
 latest HEAD automatically (#20137)

#### Why I did it
src/sonic-utilities
```
* c019c48b - (HEAD -> master, origin/master, origin/HEAD) Exit early if YANG validation fails in Golden Config (#3490) (3 hours ago) [jingwenxie]
* 40026f98 - Remove redundant mmuconfig file (#3446) (7 hours ago) [HP]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-utilities | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-utilities b/src/sonic-utilities
index d29b8241a..c019c48b0 160000
--- a/src/sonic-utilities
+++ b/src/sonic-utilities
@@ -1 +1 @@
-Subproject commit d29b8241abdec0c90cafd2fa5bd6b64d698fd98a
+Subproject commit c019c48b0988099ec8ee726ca44021c2dba6c1ee

From f0eeae7f4a984b39a3b4b70475350f76b90d32d7 Mon Sep 17 00:00:00 2001
From: Liu Shilong <shilongliu@microsoft.com>
Date: Thu, 5 Sep 2024 17:23:29 +0800
Subject: [PATCH 0974/1115] Enable MG step in azure pipeline checker. (#20128)

Why I did it
Creates a manifest.json and bsi.json for all the files in a folder.
This generated manifest can be used to validate the contents of the folder in the future.

Work item tracking
Microsoft ADO (number only): 29207108
How I did it
How to verify it
---
 .azure-pipelines/azure-pipelines-build.yml | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/.azure-pipelines/azure-pipelines-build.yml b/.azure-pipelines/azure-pipelines-build.yml
index 9ef929530..941c30ecb 100644
--- a/.azure-pipelines/azure-pipelines-build.yml
+++ b/.azure-pipelines/azure-pipelines-build.yml
@@ -186,3 +186,13 @@ jobs:
           fi
         displayName: "Build sonic image"
       - template: .azure-pipelines/check-dirty-version.yml@buildimage
+      - task: ManifestGeneratorTask@0
+        condition: ne(variables.SKIP_MG, 'y')
+        timeoutInMinutes: 60
+        continueOnError: true
+        displayName: "Manifest Generator"
+        inputs:
+          BuildDropPath: '$(System.DefaultWorkingDirectory)/target/'
+          ManifestDirPath: 'target/'
+          BuildComponentPath: $(System.DefaultWorkingDirectory)/src/
+

From e5376a0cd5cbcd667c403a43334a03b06751af33 Mon Sep 17 00:00:00 2001
From: Pavan Naregundi <92989231+pavannaregundi@users.noreply.github.com>
Date: Thu, 5 Sep 2024 22:49:02 +0530
Subject: [PATCH 0975/1115] Update mrvl-prestera SDK driver (#19710)

Signed-off-by: Pavan Naregundi <pnaregundi@marvell.com>
---
 platform/marvell/mrvl-prestera | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/platform/marvell/mrvl-prestera b/platform/marvell/mrvl-prestera
index 5834b7338..36fa3a3f4 160000
--- a/platform/marvell/mrvl-prestera
+++ b/platform/marvell/mrvl-prestera
@@ -1 +1 @@
-Subproject commit 5834b7338ff9ac6f03d45ab85568048be1f62199
+Subproject commit 36fa3a3f4e317d8c0c111cc74aafffce12e1546d

From 0f5166df0b20b0e0838216b307ef7be5213f2d6f Mon Sep 17 00:00:00 2001
From: Feng-msft <fenpan@microsoft.com>
Date: Fri, 6 Sep 2024 09:08:26 +0800
Subject: [PATCH 0976/1115] [memory_monitoring] Enhance monitoring the memory
 usage of containers (#19179)

### Why I did it
We need to restrict memory usage of container specifically, and the reliable option is to read cgroup subsystem files instead of using "docker stats" commands, since the commands will be no response if containers hits hard limit.

### How I did it
Instead of depending on the output of docker stats, the background script memory_checker will calculate the memory usage of a container based on values reading from the cgroup subsystem files /sys/fs/cgroup/memory/docker/<container_name>/memory.usage_in_bytes and /sys/fs/cgroup/memory/docker/<container_name>/memory.stats.

Refer to this Docker official document (https://docs.docker.com/engine/reference/commandline/stats/#extended-description) to make sure the memory usage of a specific container reading from command output of docker stats is equal to the value subtracting cache usage from the total memory usage.

#### How to verify it
Local verified, since it's just internal enhancement for getting memory usage of container, below are comparison between new memory_check and previous implementation based on "docker stats --no-stream --format {{.MemUsage}} telemetry"

<img width="799" alt="image" src="https://github.com/sonic-net/sonic-buildimage/assets/97083744/3807fc7f-cfc2-4e2f-a078-eaf08b68f803">


Added Unit test code, since there's no build time UT available in this repo currently so verified manually as below:
<img width="1121" alt="image" src="https://github.com/user-attachments/assets/2c7ce241-7967-41ee-a2e9-4bdb2e43f8c2">
---
 files/image_config/monit/memory_checker       | 184 ++++++++++++++----
 files/image_config/monit/tests/__init__.py    |   0
 .../monit/tests/test_memory_checker.py        |  81 ++++++++
 3 files changed, 227 insertions(+), 38 deletions(-)
 create mode 100644 files/image_config/monit/tests/__init__.py
 create mode 100644 files/image_config/monit/tests/test_memory_checker.py

diff --git a/files/image_config/monit/memory_checker b/files/image_config/monit/memory_checker
index e5bfe4e38..74779ffb3 100755
--- a/files/image_config/monit/memory_checker
+++ b/files/image_config/monit/memory_checker
@@ -20,6 +20,7 @@ check program container_memory_<container_name> with path "/usr/bin/memory_check
 """
 
 import argparse
+import os
 import subprocess
 import sys
 import syslog
@@ -33,6 +34,29 @@ from swsscommon import swsscommon
 EVENTS_PUBLISHER_SOURCE = "sonic-events-host"
 EVENTS_PUBLISHER_TAG = "mem-threshold-exceeded"
 
+CGROUP_DOCKER_MEMORY_DIR = "/sys/fs/cgroup/memory/docker/"
+
+# Define common error codes
+ERROR_CONTAINER_ID_NOT_FOUND = "[memory_checker] Failed to get container ID of '{}'! Exiting ..."
+ERROR_CGROUP_MEMORY_USAGE_NOT_FOUND = "[memory_checker] cgroup memory usage file '{}' of container '{}' does not exist on device! Exiting ..."
+ERROR_CONTAINER_MEMORY_USAGE_NOT_FOUND = "[memory_checker] Failed to get the memory usage of container '{}'! Exiting ..."
+ERROR_CONTAINER_CACHE_USAGE_NOT_FOUND = "[memory_checker] Failed to get the cache usage of container '{}'! Exiting ..."
+ERROR_CGROUP_MEMORY_STATS_NOT_FOUND = "[memory_checker] cgroup memory statistics file '{}' of container '{}' does not exist on device! Exiting ..."
+ERROR_CGROUP_MEMORY_STATS_LINE_FORMAT = "[memory_checker] cgroup memory statistics file '{}' of container '{}' has invalid line format! Exiting ..."
+
+# Define common exit codes
+CONTAINER_NOT_RUNNING = 0
+INTERNAL_ERROR = 1
+INVALID_VALUE = 2
+EXCEED_THRESHOLD = 3
+
+def validate_container_id(container_id):
+    pattern = r'^[a-zA-Z0-9]+$'
+
+    if not re.match(pattern, container_id):
+        syslog.syslog(syslog.LOG_ERR, "Invalid container_id: {}".format(container_id))
+        sys.exit(INTERNAL_ERROR)
+
 def get_command_result(command):
     """Executes the command and return the resulting output.
 
@@ -50,15 +74,99 @@ def get_command_result(command):
         command_stdout, command_stderr = proc_instance.communicate()
         if proc_instance.returncode != 0:
             syslog.syslog(syslog.LOG_ERR, "[memory_checker] Failed to execute the command '{}'. Return code: '{}'"
-                          .format(command, proc_instance.returncode))
-            sys.exit(1)
+                          .format(' '.join(command), proc_instance.returncode))
+            sys.exit(INTERNAL_ERROR)
     except (OSError, ValueError) as err:
         syslog.syslog(syslog.LOG_ERR, "[memory_checker] Failed to execute the command '{}'. Error: '{}'"
-                      .format(command, err))
-        sys.exit(2)
+                      .format(' '.join(command), err))
+        sys.exit(INTERNAL_ERROR)
 
     return command_stdout.strip()
 
+def get_container_id(container_name):
+    """Gets full container ID of the specified container
+    Args:
+        container_name: A string indicates the name of specified container.
+    Returns:
+        container_id: A string indicates the full ID of specified container.
+    """
+    container_id = ""
+
+    get_container_info_cmd = ["docker", "ps", "--no-trunc", "--filter", "name={}".format(container_name)]
+
+    command_stdout = get_command_result(get_container_info_cmd)
+
+    for line in command_stdout.splitlines():
+        if container_name in line:
+            container_id = line.split()[0].strip()
+            break
+
+    if not container_id:
+        syslog.syslog(syslog.LOG_ERR, ERROR_CONTAINER_ID_NOT_FOUND.format(container_name))
+
+        sys.exit(INTERNAL_ERROR)
+
+    return container_id
+
+def get_memory_usage(container_id):
+    """Reads the container's memory usage from the control group subsystem's file
+    '/sys/fs/cgroup/memory/docker/<container_id>/memory.usage_in_bytes'.
+    Args:
+        container_id: A string indicates the full ID of a container.
+    Returns:
+        memory_usage_in_bytes: A string indicates memory usage (Bytes) of a container.
+    """
+    memory_usage_in_bytes = ""
+
+    validate_container_id(container_id)
+
+    docker_memory_usage_file_path = CGROUP_DOCKER_MEMORY_DIR + container_id + "/memory.usage_in_bytes"
+    if not os.path.exists(docker_memory_usage_file_path):
+        syslog.syslog(syslog.LOG_ERR, ERROR_CGROUP_MEMORY_USAGE_NOT_FOUND.format(docker_memory_usage_file_path, container_id))
+        sys.exit(INTERNAL_ERROR)
+
+    try:
+        with open(docker_memory_usage_file_path, 'r') as file:
+            memory_usage_in_bytes = file.read().strip()
+    except IOError as err:
+        syslog.syslog(syslog.LOG_ERR, ERROR_CONTAINER_MEMORY_USAGE_NOT_FOUND.format(container_id))
+        sys.exit(INTERNAL_ERROR)
+
+    return memory_usage_in_bytes
+
+def get_inactive_cache_usage(container_id):
+    """Reads the container's cache usage from the field 'total_inactive_file' in control
+    group subsystem's file '/sys/fs/cgroup/memory/docker/<container_id>/memory.stat'.
+    Args:
+        container_id: A string indicates the full ID of a container.
+    Returns:
+        cache_usage_in_bytes: A string indicates the cache usage (Bytes) of a container.
+    """
+    cache_usage_in_bytes = ""
+
+    validate_container_id(container_id)
+
+    docker_memory_stat_file_path = CGROUP_DOCKER_MEMORY_DIR + container_id + "/memory.stat"
+    if not os.path.exists(docker_memory_stat_file_path):
+        syslog.syslog(syslog.LOG_ERR, ERROR_CGROUP_MEMORY_STATS_NOT_FOUND.format(docker_memory_stat_file_path, container_id))
+        sys.exit(INTERNAL_ERROR)
+
+    try:
+        with open(docker_memory_stat_file_path, 'r') as file:
+            for line in file:
+                if "total_inactive_file" in line:
+                    split_line = line.split()
+                    if len(split_line) >= 2:
+                        cache_usage_in_bytes = split_line[1].strip()
+                    else:
+                        syslog.syslog(syslog.LOG_ERR, ERROR_CGROUP_MEMORY_STATS_LINE_FORMAT.format(docker_memory_stat_file_path, container_id))
+                        sys.exit(INTERNAL_ERROR)
+                    break
+    except IOError as err:
+        syslog.syslog(syslog.LOG_ERR, ERROR_CONTAINER_CACHE_USAGE_NOT_FOUND.format(container_id))
+        sys.exit(INTERNAL_ERROR)
+
+    return cache_usage_in_bytes
 
 def publish_events(container_name, mem_usage_bytes, threshold_value):
     events_handle = swsscommon.events_init_publisher(EVENTS_PUBLISHER_SOURCE)
@@ -71,8 +179,8 @@ def publish_events(container_name, mem_usage_bytes, threshold_value):
 
 
 def check_memory_usage(container_name, threshold_value):
-    """Checks the memory usage of a container and writes an alerting messages into
-    the syslog if the memory usage is larger than the threshold value.
+    """Checks the memory usage of a container from its cgroup subsystem and writes an alerting
+    messages into the syslog if the memory usage is larger than the threshold value.
 
     Args:
         container_name: A string represtents name of a container
@@ -81,37 +189,37 @@ def check_memory_usage(container_name, threshold_value):
     Returns:
         None.
     """
-    command = ["docker", "stats", "--no-stream", "--format", "{{.MemUsage}}", container_name]
-    command_stdout = get_command_result(command)
-    mem_usage = command_stdout.split("/")[0].strip()
-    match_obj = re.match(r"\d+\.?\d*", mem_usage)
-    if match_obj:
-        mem_usage_value = float(mem_usage[match_obj.start():match_obj.end()])
-        mem_usage_unit = mem_usage[match_obj.end():]
-
-        mem_usage_bytes = 0.0
-        if mem_usage_unit == "B":
-            mem_usage_bytes = mem_usage_value
-        elif mem_usage_unit == "KiB":
-            mem_usage_bytes = mem_usage_value * 1024
-        elif mem_usage_unit == "MiB":
-            mem_usage_bytes = mem_usage_value * 1024 ** 2
-        elif mem_usage_unit == "GiB":
-            mem_usage_bytes = mem_usage_value * 1024 ** 3
-
-        if mem_usage_bytes > threshold_value:
-            print("[{}]: Memory usage ({} Bytes) is larger than the threshold ({} Bytes)!"
-                  .format(container_name, mem_usage_bytes, threshold_value))
-            syslog.syslog(syslog.LOG_INFO, "[{}]: Memory usage ({} Bytes) is larger than the threshold ({} Bytes)!"
-                          .format(container_name, mem_usage_bytes, threshold_value))
-            # publish event
-            publish_events(container_name, "{:.2f}".format(mem_usage_bytes), str(threshold_value))
-            sys.exit(3)
-    else:
-        syslog.syslog(syslog.LOG_ERR, "[memory_checker] Failed to retrieve memory value from '{}'"
-                      .format(mem_usage))
-        sys.exit(4)
+    if not isinstance(threshold_value, int) or threshold_value <= 0:
+        syslog.syslog(syslog.LOG_ERR, "[memory_checker] Invalid threshold value! Threshold value should be a positive integer.")
+        sys.exit(INVALID_VALUE)
+
+    container_id = get_container_id(container_name)
+    syslog.syslog(syslog.LOG_INFO, "[memory_checker] Container ID of '{}' is: '{}'."
+                  .format(container_name, container_id))
+
+    memory_usage_in_bytes = get_memory_usage(container_id)
+    syslog.syslog(syslog.LOG_INFO, "[memory_checker] The memory usage of container '{}' is '{}' Bytes!"
+                  .format(container_name, memory_usage_in_bytes))
+
+    cache_usage_in_bytes = get_inactive_cache_usage(container_id)
+    syslog.syslog(syslog.LOG_INFO, "[memory_checker] The cache usage of container '{}' is '{}' Bytes!"
+                  .format(container_name, cache_usage_in_bytes))
+
+    try:
+        memory_usage = int(memory_usage_in_bytes)
+        cache_usage = int(cache_usage_in_bytes)
+    except ValueError as err:
+        syslog.syslog(syslog.LOG_ERR, "[memory_checker] Failed to convert the memory or cache usage in string to integer! Exiting ...")
+        sys.exit(INVALID_VALUE)
+
+    total_memory_usage = memory_usage - cache_usage
+    syslog.syslog(syslog.LOG_INFO, "[memory_checker] Total memory usage of container '{}' is '{}' Bytes!"
+                  .format(container_name, total_memory_usage))
 
+    if total_memory_usage > threshold_value:
+        print("[{}]: Memory usage ({} Bytes) is larger than the threshold ({} Bytes)!"
+              .format(container_name, total_memory_usage, threshold_value))
+        sys.exit(EXCEED_THRESHOLD)
 
 def is_service_active(service_name):
     """Test if service is running.
@@ -148,7 +256,7 @@ def get_running_container_names():
         syslog.syslog(syslog.LOG_ERR,
                       "Failed to retrieve the running container list from docker daemon! Error message is: '{}'"
                       .format(err))
-        sys.exit(5)
+        sys.exit(INTERNAL_ERROR)
 
     return running_container_names
 
@@ -167,7 +275,7 @@ def main():
         syslog.syslog(syslog.LOG_INFO,
                       "[memory_checker] Exits without checking memory usage of container '{}' since docker daemon is not running!"
                       .format(args.container_name))
-        sys.exit(0)
+        sys.exit(CONTAINER_NOT_RUNNING)
 
     running_container_names = get_running_container_names()
     if args.container_name in running_container_names:
diff --git a/files/image_config/monit/tests/__init__.py b/files/image_config/monit/tests/__init__.py
new file mode 100644
index 000000000..e69de29bb
diff --git a/files/image_config/monit/tests/test_memory_checker.py b/files/image_config/monit/tests/test_memory_checker.py
new file mode 100644
index 000000000..d856fa335
--- /dev/null
+++ b/files/image_config/monit/tests/test_memory_checker.py
@@ -0,0 +1,81 @@
+import unittest
+from unittest.mock import patch, MagicMock
+import sys
+import subprocess
+
+import memory_checker
+
+
+class TestMemoryChecker(unittest.TestCase):
+
+    @patch('subprocess.Popen')
+    def test_get_command_result(self, mock_popen):
+        command = 'your command'
+        stdout = 'Command output'
+        returncode = 0
+        mock_popen.return_value.communicate.return_value = (stdout, None)
+        mock_popen.return_value.returncode = returncode
+
+        result = memory_checker.get_command_result(command)
+
+        self.assertEqual(result, stdout.strip())
+        mock_popen.assert_called_once_with(command, stdout=subprocess.PIPE, stderr=subprocess.PIPE,
+                                           universal_newlines=True)
+        mock_popen.return_value.communicate.assert_called_once()
+        mock_popen.return_value.communicate.assert_called_with()
+        self.assertEqual(mock_popen.return_value.returncode, returncode)
+
+    @patch('memory_checker.get_command_result')
+    def test_get_container_id(self, mock_get_command_result):
+        container_name = 'your_container'
+        command = ['docker', 'ps', '--no-trunc', '--filter', 'name=your_container']
+        mock_get_command_result.return_value = ''
+
+        with self.assertRaises(SystemExit) as cm:
+            memory_checker.get_container_id(container_name)
+        self.assertEqual(cm.exception.code, 1)
+        mock_get_command_result.assert_called_once_with(command)
+
+    @patch('memory_checker.open', side_effect=FileNotFoundError)
+    def test_get_memory_usage(self, mock_open):
+        container_id = 'your_container_id'
+        with self.assertRaises(SystemExit) as cm:
+            memory_checker.get_memory_usage(container_id)
+        self.assertEqual(cm.exception.code, 1)
+
+    @patch('memory_checker.open', side_effect=FileNotFoundError)
+    def test_get_memory_usage_invalid(self, mock_open):
+        container_id = '../..'
+        with self.assertRaises(SystemExit) as cm:
+            memory_checker.get_memory_usage(container_id)
+        self.assertEqual(cm.exception.code, 1)
+
+    @patch('builtins.open', side_effect=FileNotFoundError)
+    def test_get_inactive_cache_usage(self, mock_open):
+        container_id = 'your_container_id'
+        with self.assertRaises(SystemExit) as cm:
+            memory_checker.get_inactive_cache_usage(container_id)
+        self.assertEqual(cm.exception.code, 1)
+
+    @patch('syslog.syslog')
+    @patch('memory_checker.get_container_id')
+    @patch('memory_checker.get_memory_usage')
+    @patch('memory_checker.get_inactive_cache_usage')
+    def test_check_memory_usage(self, mock_get_inactive_cache_usage, mock_get_memory_usage, mock_get_container_id, mock_syslog):
+        container_name = 'your_container'
+        threshold_value = 1024
+        container_id = 'your_container'
+        memory_usage = 2048
+        cache_usage = 512
+        mock_get_container_id.return_value = container_id
+        mock_get_memory_usage.return_value = str(memory_usage)
+        mock_get_inactive_cache_usage.return_value = str(cache_usage)
+
+        with self.assertRaises(SystemExit) as cm:
+            memory_checker.check_memory_usage(container_name, threshold_value)
+
+        self.assertEqual(cm.exception.code, 3)
+        mock_get_memory_usage.assert_called_once_with(container_name)
+
+if __name__ == '__main__':
+    unittest.main()

From a7da2b5c6d5a05a6d1e5f52deb995731cda5f109 Mon Sep 17 00:00:00 2001
From: zitingguo-ms <zitingguo@microsoft.com>
Date: Thu, 5 Sep 2024 19:57:56 -0700
Subject: [PATCH 0977/1115] Upgrade xgs SAI version to 10.1.42.0 (#20119)

Why I did it
Upgrade xgs SAI version to 10.1.42.0 with the following fixes.

10.1.39.0: [CSP CS00012349283] back-porting SONIC-88703 to SAI10.1
10.1.40.0: [CSP CS00012352844] port SONIC-92490 to rel_ocp_sai_10_1
10.1.41.0: [CS00012358054] Port SONIC-93029 to 10.1GA. Description: [TH2/TH] Warm reboot from SAI 4.3.5 to SAI 8.4 SONiC image fails
10.1.42.0: [CS00012361544] Backport SONIC-93974 to 10.1. Description: MSFT Prod Issue - TD2 device is sending massive PFC
Work item tracking
Microsoft ADO (number only): 29305413
How I did it
Update xgs SAI version to 10.1.42.0 in sai.mk file.

How to verify it
Run SAI release validation pipeline: https://dev.azure.com/mssonic/internal/_build/results?buildId=632622&view=results

Which release branch to backport (provide reason below if selected)
 202311
 202405
---
 platform/broadcom/sai.mk | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/platform/broadcom/sai.mk b/platform/broadcom/sai.mk
index be25ea194..ac5675bc5 100644
--- a/platform/broadcom/sai.mk
+++ b/platform/broadcom/sai.mk
@@ -1,4 +1,4 @@
-LIBSAIBCM_XGS_VERSION = 10.1.38.0
+LIBSAIBCM_XGS_VERSION = 10.1.42.0
 LIBSAIBCM_DNX_VERSION = 11.2.7.1
 LIBSAIBCM_XGS_BRANCH_NAME = SAI_10.1.0_GA
 LIBSAIBCM_DNX_BRANCH_NAME = SAI_11.2.0_GA

From 3a8fc954be977d104fc6591fdfb1d013d97dbad5 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Fri, 6 Sep 2024 16:01:08 +0800
Subject: [PATCH 0978/1115] [submodule] Update submodule sonic-gnmi to the
 latest HEAD automatically (#20158)

#### Why I did it
src/sonic-gnmi
```
* 95f4400 - (HEAD -> master, origin/master, origin/HEAD) Revert "Replace PFC_WD_TABLE with PFC_WD (#173)" (#284) (2 hours ago) [Zain Budhwani]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-gnmi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-gnmi b/src/sonic-gnmi
index 64ed32b71..95f4400d9 160000
--- a/src/sonic-gnmi
+++ b/src/sonic-gnmi
@@ -1 +1 @@
-Subproject commit 64ed32b715e1673c3376701ee192d6292f5ec0ec
+Subproject commit 95f4400d96982c9f6a6a02ed62e30a9cb2454a85

From 4a30a1b64582a4f705bad9247163da1bec75a53e Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Fri, 6 Sep 2024 19:01:08 +0800
Subject: [PATCH 0979/1115] [submodule] Update submodule sonic-utilities to the
 latest HEAD automatically (#20161)

#### Why I did it
src/sonic-utilities
```
* b82115c9 - (HEAD -> master, origin/master, origin/HEAD) Add show CLI for bmp related dataset. (#3289) (48 minutes ago) [Feng-msft]
* 785d7bd5 - Fix multi-asic support to PFC config/show (#3521) (6 hours ago) [HP]
* 8f5e4b6f - Fix multi-asic behaviour for mmuconfig (#3061) (10 hours ago) [bktsim]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-utilities | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-utilities b/src/sonic-utilities
index c019c48b0..b82115c94 160000
--- a/src/sonic-utilities
+++ b/src/sonic-utilities
@@ -1 +1 @@
-Subproject commit c019c48b0988099ec8ee726ca44021c2dba6c1ee
+Subproject commit b82115c941869f13999c8f7abe93f32711a9472a

From 08a156526dd3be425e7dc77696b8173562780f93 Mon Sep 17 00:00:00 2001
From: Eddie Ruan <119699263+eddieruan-alibaba@users.noreply.github.com>
Date: Fri, 6 Sep 2024 22:39:04 +0800
Subject: [PATCH 0980/1115] Add VPN related configuration in frrcfgd.py
 (#19924)

Add VPN related configuration in frrcfgd.py
---
 src/sonic-frr-mgmt-framework/frrcfgd/frrcfgd.py     | 13 ++++++++++++-
 .../templates/frr/frr.conf.j2                       |  3 +++
 2 files changed, 15 insertions(+), 1 deletion(-)

diff --git a/src/sonic-frr-mgmt-framework/frrcfgd/frrcfgd.py b/src/sonic-frr-mgmt-framework/frrcfgd/frrcfgd.py
index 8db49bf32..c2a9f0c14 100755
--- a/src/sonic-frr-mgmt-framework/frrcfgd/frrcfgd.py
+++ b/src/sonic-frr-mgmt-framework/frrcfgd/frrcfgd.py
@@ -1486,7 +1486,7 @@ def listen(self):
         """Start listen Redis keyspace events and will trigger corresponding handlers when content of a table changes.
         """
         self.pubsub = self.get_redis_client(self.db_name).pubsub()
-        self.sub_thread = threading.Thread(target=self.listen_thread, args=(0.01,))
+        self.sub_thread = threading.Thread(target=self.listen_thread, args=(10,))
         self.sub_thread.start()
 
     def stop_listen(self):
@@ -1718,6 +1718,7 @@ class BGPConfigDaemon:
     DEFAULT_VRF = 'default'
 
     global_key_map = [('router_id',                                     '{no:no-prefix}bgp router-id {}'),
+                      ('srv6_locator',                                  '{no:no-prefix}srv6-locator {}'),
                       (['load_balance_mp_relax', '+as_path_mp_as_set'], '{no:no-prefix}bgp bestpath as-path multipath-relax {:mp-as-set}', ['true', 'false']),
                       ('always_compare_med',                            '{no:no-prefix}bgp always-compare-med', ['true', 'false']),
                       ('external_compare_router_id',                    '{no:no-prefix}bgp bestpath compare-routerid', ['true', 'false']),
@@ -1759,6 +1760,16 @@ class BGPConfigDaemon:
     global_af_key_map = [(['ebgp_route_distance',
                            'ibgp_route_distance',
                            'local_route_distance'],                     '{no:no-prefix}distance bgp {} {} {}'),
+                         ('rd_vpn_export',                              '{no:no-prefix}rd vpn export {}'),
+                         ('rt_vpn_export',                              '{no:no-prefix}rt vpn export {}'),
+                         ('rt_vpn_import',                              '{no:no-prefix}rt vpn import {}'),
+                         ('rt_vpn_both',                                '{no:no-prefix}rt vpn both {}'),
+                         ('export_vpn',                                 '{no:no-prefix}export vpn', ['true','false']),
+                         ('import_vpn',                                 '{no:no-prefix}import vpn', ['true','false']),
+                         ('redistribute_connected',                     '{no:no-prefix}redistribute connected', ['true','false']),
+                         ('redistribute_static_rmap',                   '{no:no-prefix}redistribute static route-map {}'),
+                         ('rmap_vpn_export',                            '{no:no-prefix}route-map vpn export {}'),
+                         ('rmap_vpn_import',                            '{no:no-prefix}route-map vpn import {}'),
                          ('max_ebgp_paths',                             '{no:no-prefix}maximum-paths {}'),
                          (['max_ibgp_paths',
                            '+ibgp_equal_cluster_length'],               '{no:no-prefix}maximum-paths ibgp {} {:match-clust-len}', hdl_ibgp_maxpath),
diff --git a/src/sonic-frr-mgmt-framework/templates/frr/frr.conf.j2 b/src/sonic-frr-mgmt-framework/templates/frr/frr.conf.j2
index f1f015a6e..391e5d581 100644
--- a/src/sonic-frr-mgmt-framework/templates/frr/frr.conf.j2
+++ b/src/sonic-frr-mgmt-framework/templates/frr/frr.conf.j2
@@ -10,6 +10,9 @@
 !
 agentx
 !
+！Add fpm address for zebra
+fpm address 127.0.0.1
+！
 {% include "zebra/zebra.interfaces.conf.j2" %}
 !
 {% if MGMT_VRF_CONFIG %}

From c9ec757abb2111134313751372ad932d86569008 Mon Sep 17 00:00:00 2001
From: Pavan Prakash <120486223+Pavan-Nokia@users.noreply.github.com>
Date: Sun, 8 Sep 2024 02:36:10 -0400
Subject: [PATCH 0981/1115] [Nokia-7215] Fix software upgrade corner case
 (#20169)

After software upgrade the box fails to boot to the new image due to a
bug in uboot of unable to read fragmented files.
Make sure all files accessed by Uboot are defragmented before rebooting
the device
---
 platform/marvell/platform_armhf.conf | 22 +++++++++++++++++++---
 1 file changed, 19 insertions(+), 3 deletions(-)

diff --git a/platform/marvell/platform_armhf.conf b/platform/marvell/platform_armhf.conf
index de0405b2c..9c3568957 100644
--- a/platform/marvell/platform_armhf.conf
+++ b/platform/marvell/platform_armhf.conf
@@ -61,6 +61,15 @@ demo_mnt=/tmp
 FW_ENV_DEFAULT='/dev/mtd0 0x00500000 0x80000 0x100000 8'
 UBOOT_FW_DEFAULT=1
 
+defrag_file() {
+    echo "Defragment file: $1 (used by U-Boot)"
+    e4defrag $1 >/dev/null
+    if [ $? -ne 0 ]; then
+        echo "ERROR: defrag failed for $1"
+        exit 3
+    fi
+}
+
 prepare_boot_menu() {
     echo "Sync up cache ..."
     sync
@@ -100,15 +109,22 @@ prepare_boot_menu() {
         echo $FW_ENV_DEFAULT > /etc/fw_env.config
         echo "Using pre-configured uboot env"
     fi
+    
+    image_name=${image_dir}${kernel_fname}
+    initrd_name=${image_dir}${initrd_fname}
+    fdt_name=${image_dir}${fdt_fname}
+
     if [ "$PLATFORM" = "armhf-nokia_ixs7215_52x-r0" ]; then
         FW_ENV_DEFAULT='/dev/mtd0 0x00100000 0x10000 0x10000'
         echo $FW_ENV_DEFAULT > /etc/fw_env.config
         echo "Using pre-configured uboot env for armhf-nokia_ixs7215_52x-r0"
+        if [ "$install_env" != "onie" ]; then
+            defrag_file ${demo_mnt}/${image_name}
+            defrag_file ${demo_mnt}/${initrd_name}
+            defrag_file ${demo_mnt}/${fdt_name}
+        fi
     fi
 
-    image_name=${image_dir}${kernel_fname}
-    initrd_name=${image_dir}${initrd_fname}
-    fdt_name=${image_dir}${fdt_fname}
 
     if [ "$install_env" = "onie" ]; then
         FW_ARG="-f"

From 66b9ec509e5751c2d1d07897f1cad09f93f5f93c Mon Sep 17 00:00:00 2001
From: Keshav Gupta <keshavg@marvell.com>
Date: Sun, 8 Sep 2024 12:10:21 +0530
Subject: [PATCH 0982/1115] [doc]: add 202405 build badge (#20140)

Signed-off-by: Keshav Gupta <keshavg@marvell.com>
---
 README.md | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/README.md b/README.md
index 9ea169542..2488f972d 100644
--- a/README.md
+++ b/README.md
@@ -13,6 +13,20 @@
 
 [![VS](https://dev.azure.com/mssonic/build/_apis/build/status/vs/Azure.sonic-buildimage.official.vs?branchName=master&label=VS)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=142&branchName=master)
 
+*202405 builds*:
+
+[![Broadcom](https://dev.azure.com/mssonic/build/_apis/build/status/broadcom/Azure.sonic-buildimage.official.broadcom?branchName=202405&label=Broadcom)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=138&branchName=202405)
+[![Centec](https://dev.azure.com/mssonic/build/_apis/build/status/centec/Azure.sonic-buildimage.official.centec?branchName=202405&label=Centec)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=143&branchName=202405)
+[![Centec(arm64)](https://dev.azure.com/mssonic/build/_apis/build/status/centec/Azure.sonic-buildimage.official.centec-arm64?branchName=202405&label=Centec-arm64)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=140&branchName=202405)
+[![Innovium](https://dev.azure.com/mssonic/build/_apis/build/status/innovium/Azure.sonic-buildimage.official.innovium?branchName=202405&label=Innovium)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=148&branchName=202405)
+[![Mellanox](https://dev.azure.com/mssonic/build/_apis/build/status/mellanox/Azure.sonic-buildimage.official.mellanox?branchName=202405&label=Mellanox)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=139&branchName=202405)
+[![Marvell(armhf)](https://dev.azure.com/mssonic/build/_apis/build/status/marvell/Azure.sonic-buildimage.official.marvell-armhf?branchName=202405&label=Marvell-armhf)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=141&branchName=202405)
+[![Marvell(arm64)](https://dev.azure.com/mssonic/build/_apis/build/status/marvell/Azure.sonic-buildimage.official.marvell-arm64?branchName=202405&label=Marvell-arm64)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=999&branchName=202405)
+[![Nephos](https://dev.azure.com/mssonic/build/_apis/build/status/nephos/Azure.sonic-buildimage.official.nephos?branchName=202405&label=Nephos)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=149&branchName=202405)
+[![Nvidia-Bluefield](https://dev.azure.com/mssonic/build/_apis/build/status/nvidia/Azure.sonic-buildimage.official.nvidia-bluefield?branchName=202405&label=Nvidia-Bluefield)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=1665&branchName=202405)
+[![Pensando](https://dev.azure.com/mssonic/build/_apis/build/status/pensando/Azure.sonic-buildimage.official.pensando?branchName=202405&label=Pensando)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=1366&branchName=202405)
+[![VS](https://dev.azure.com/mssonic/build/_apis/build/status/vs/Azure.sonic-buildimage.official.vs?branchName=202405&label=VS)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=142&branchName=202405)
+
 *202311 builds*:
 
 [![Broadcom](https://dev.azure.com/mssonic/build/_apis/build/status/broadcom/Azure.sonic-buildimage.official.broadcom?branchName=202311&label=Broadcom)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=138&branchName=202311)

From 4e2390476b1e8b5e947010d15960915762623d5b Mon Sep 17 00:00:00 2001
From: Eddie Ruan <119699263+eddieruan-alibaba@users.noreply.github.com>
Date: Mon, 9 Sep 2024 13:14:19 +0800
Subject: [PATCH 0983/1115] Fix Two issues when using config node as unified
 #20019 (#20020)

Fix Two issues when using config node as unified
---
 dockers/docker-fpm-frr/docker_init.sh | 1 +
 1 file changed, 1 insertion(+)

diff --git a/dockers/docker-fpm-frr/docker_init.sh b/dockers/docker-fpm-frr/docker_init.sh
index 0ed274ec7..662a78b5a 100755
--- a/dockers/docker-fpm-frr/docker_init.sh
+++ b/dockers/docker-fpm-frr/docker_init.sh
@@ -88,6 +88,7 @@ elif [ "$CONFIG_TYPE" == "unified" ]; then
     CFGGEN_PARAMS=" \
         -d \
         -y /etc/sonic/constants.yml \
+        -T /usr/local/sonic/frrcfgd \
         -t /usr/share/sonic/templates/gen_frr.conf.j2,/etc/frr/frr.conf \
     "
     sonic-cfggen $CFGGEN_PARAMS

From 9989a27f99d04b901b16d52ff0df73d03dc09db4 Mon Sep 17 00:00:00 2001
From: jfeng-arista <98421150+jfeng-arista@users.noreply.github.com>
Date: Sun, 8 Sep 2024 23:25:04 -0700
Subject: [PATCH 0984/1115] YANG model for enabling fabric monitor attribute
 (#19767)

### Why I did it
The new added attributes related fabric link monitoring are missing YANG model. Adding them in this change.

For fabric monitor table:
> monCapacityThreshWarn
> monState

For fabric port:
> forceUnisolateStatus
---
 .../tests/test_cfggen_from_yang.py            |  7 +++--
 .../tests/test_yang_data.json                 |  7 +++--
 src/sonic-yang-models/doc/Configuration.md    | 10 ++++---
 .../tests/files/sample_config_db.json         | 10 ++++---
 .../tests_config/fabric_monitor_data.json     |  4 ++-
 .../tests_config/fabric_port.json             |  3 ++-
 .../yang-models/sonic-fabric-monitor.yang     | 26 +++++++++++++++++--
 .../yang-models/sonic-fabric-port.yang        |  6 +++++
 8 files changed, 59 insertions(+), 14 deletions(-)

diff --git a/src/sonic-config-engine/tests/test_cfggen_from_yang.py b/src/sonic-config-engine/tests/test_cfggen_from_yang.py
index 48b970df8..7caf1425e 100644
--- a/src/sonic-config-engine/tests/test_cfggen_from_yang.py
+++ b/src/sonic-config-engine/tests/test_cfggen_from_yang.py
@@ -272,7 +272,9 @@ def test_fabric_monitor_data_table(self):
                 "monErrThreshCrcCells": "1",
                 "monErrThreshRxCells": "61035156",
                 "monPollThreshIsolation": "1",
-                "monPollThreshRecovery": "8"
+                "monPollThreshRecovery": "8",
+                "monCapacityThreshWarn": "10",
+                "monState": "enable"
             }
         })
 
@@ -283,6 +285,7 @@ def test_fabric_port_table(self):
             "Fabric0": {
                 "alias": "Fabric0",
                 "isolateStatus": "False",
-                "lanes": "0"
+                "lanes": "0",
+                "forceUnisolateStatus": "0"
             }
         })
diff --git a/src/sonic-config-engine/tests/test_yang_data.json b/src/sonic-config-engine/tests/test_yang_data.json
index 8126e7bc2..b5cd43c71 100644
--- a/src/sonic-config-engine/tests/test_yang_data.json
+++ b/src/sonic-config-engine/tests/test_yang_data.json
@@ -378,7 +378,9 @@
                 "monErrThreshCrcCells": "1",
                 "monErrThreshRxCells": "61035156",
                 "monPollThreshIsolation": "1",
-                "monPollThreshRecovery": "8"
+                "monPollThreshRecovery": "8",
+                "monCapacityThreshWarn": "10",
+                "monState": "enable"
             }
         }
     },
@@ -389,7 +391,8 @@
                     "name": "Fabric0",
                     "alias": "Fabric0",
                     "isolateStatus": "False",
-                    "lanes": "0"
+                    "lanes": "0",
+                    "forceUnisolateStatus": "0"
                 }
             ]
         }
diff --git a/src/sonic-yang-models/doc/Configuration.md b/src/sonic-yang-models/doc/Configuration.md
index 3c2401597..090bebc39 100644
--- a/src/sonic-yang-models/doc/Configuration.md
+++ b/src/sonic-yang-models/doc/Configuration.md
@@ -1197,7 +1197,9 @@ The FG_NHG_PREFIX table provides the FG_NHG_PREFIX for which FG behavior is desi
         "monErrThreshCrcCells": "1",
         "monErrThreshRxCells": "61035156",
         "monPollThreshIsolation": "1",
-        "monPollThreshRecovery": "8"
+        "monPollThreshRecovery": "8",
+        "monCapacityThreshWarn": "10",
+        "monState": "enable"
     }
   }
 }
@@ -1211,12 +1213,14 @@ The FG_NHG_PREFIX table provides the FG_NHG_PREFIX for which FG behavior is desi
     "Fabric0": {
         "alias": "Fabric0",
         "isolateStatus": "False",
-        "lanes": "0"
+        "lanes": "0",
+        "forceUnisolateStatus": "0"
     },
     "Fabric1": {
         "alias": "Fabric1",
         "isolateStatus": "False",
-        "lanes": "1"
+        "lanes": "1",
+        "forceUnisolateStatus": "0"
     }
   }
 }
diff --git a/src/sonic-yang-models/tests/files/sample_config_db.json b/src/sonic-yang-models/tests/files/sample_config_db.json
index 05f64029b..b47805d14 100644
--- a/src/sonic-yang-models/tests/files/sample_config_db.json
+++ b/src/sonic-yang-models/tests/files/sample_config_db.json
@@ -1386,19 +1386,23 @@
                 "monErrThreshCrcCells": "1",
                 "monErrThreshRxCells": "61035156",
                 "monPollThreshIsolation": "1",
-                "monPollThreshRecovery": "8"
+                "monPollThreshRecovery": "8",
+                "monCapacityThreshWarn": "10",
+                "monState": "enable"
             }
         },
         "FABRIC_PORT": {
             "Fabric0": {
                 "alias": "Fabric0",
                 "isolateStatus": "False",
-                "lanes": "0"
+                "lanes": "0",
+                "forceUnisolateStatus": "0"
             },
             "Fabric1": {
                 "alias": "Fabric1",
                 "isolateStatus": "False",
-                "lanes": "1"
+                "lanes": "1",
+                "forceUnisolateStatus": "0"
             }
         },
         "FLEX_COUNTER_TABLE": {
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/fabric_monitor_data.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/fabric_monitor_data.json
index ad71aabd9..a7452bf32 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/fabric_monitor_data.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/fabric_monitor_data.json
@@ -6,7 +6,9 @@
                     "monErrThreshCrcCells": "1",
                     "monErrThreshRxCells": "61035156",
                     "monPollThreshIsolation": "1",
-                    "monPollThreshRecovery": "8"
+                    "monPollThreshRecovery": "8",
+                    "monCapacityThreshWarn": "10",
+                    "monState": "enable"
                 }
             }
         }
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/fabric_port.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/fabric_port.json
index 278834826..401607c92 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/fabric_port.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/fabric_port.json
@@ -7,7 +7,8 @@
                         "name": "Fabric0",
                         "alias": "Fabric0",
                         "isolateStatus": "False",
-                        "lanes": "0"
+                        "lanes": "0",
+                        "forceUnisolateStatus": "0"
                     }
                 ]
             }
diff --git a/src/sonic-yang-models/yang-models/sonic-fabric-monitor.yang b/src/sonic-yang-models/yang-models/sonic-fabric-monitor.yang
index 0c0464ab9..e97304967 100644
--- a/src/sonic-yang-models/yang-models/sonic-fabric-monitor.yang
+++ b/src/sonic-yang-models/yang-models/sonic-fabric-monitor.yang
@@ -5,6 +5,10 @@ module sonic-fabric-monitor{
     namespace "http://github.com/sonic-net/sonic-fabric-monitor";
     prefix fabric-monitor;
 
+    import sonic-types {
+        prefix stypes;
+    }
+
     description "FABRIC_MONITOR yang Module for SONiC OS";
 
     revision 2023-03-14 {
@@ -32,17 +36,35 @@ module sonic-fabric-monitor{
                 }
 
                 leaf monPollThreshIsolation {
-                    type uint32;
+                    type uint8 {
+                        range 1..10;
+                    }
                     default 1;
                     description "Consecutive polls with higher error rate for isolation.";
                 }
 
                 leaf monPollThreshRecovery {
-                    type uint32;
+                    type uint8 {
+                        range 1..10;
+                    }
                     default 8;
                     description "Consecutive polls with lesser error rate for inclusion.";
                 }
 
+                leaf monCapacityThreshWarn {
+                    type uint8 {
+                        range 5..100;
+                    }
+                    default 10;
+                    description "Percentage of up fabric links.";
+                }
+
+                leaf monState {
+                    description "Configuration to set fabric link monitoring state: enable/disable";
+                    type stypes:mode-status;
+                    default disable;
+                }
+
             } /* end of container FABRIC_MONITOR_DATA */
 
         } /* end of container FABRIC_MONITOR */
diff --git a/src/sonic-yang-models/yang-models/sonic-fabric-port.yang b/src/sonic-yang-models/yang-models/sonic-fabric-port.yang
index f2266507d..92b384ab7 100644
--- a/src/sonic-yang-models/yang-models/sonic-fabric-port.yang
+++ b/src/sonic-yang-models/yang-models/sonic-fabric-port.yang
@@ -52,6 +52,12 @@ module sonic-fabric-port{
                     }
                 }
 
+                leaf forceUnisolateStatus {
+                    description "Force unisolate status of a fabric port";
+                    type uint32;
+                    default 0;
+                }
+
             } /* end of list FABRIC_PORT_LIST */
 
         } /* end of container FABRIC_PORT */

From caf23e961ecb1b47a3b6fc909d710238a6301858 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Mon, 9 Sep 2024 19:01:10 +0800
Subject: [PATCH 0985/1115] [submodule] Update submodule sonic-platform-common
 to the latest HEAD automatically (#20192)
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

#### Why I did it
src/sonic-platform-common
```
* ccea995 - (HEAD -> master, origin/master, origin/HEAD) [CMIS] Add lane_mask parameter to set_loopback_mode() to enable setti… (#490) (10 hours ago) [Xinyu Lin]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-platform-common | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-platform-common b/src/sonic-platform-common
index 309a5fbb4..ccea99528 160000
--- a/src/sonic-platform-common
+++ b/src/sonic-platform-common
@@ -1 +1 @@
-Subproject commit 309a5fbb4c3d08fe13d74a16bb1d53bdc5c06cbf
+Subproject commit ccea99528a5054bd5c172b4a7e0c34f84c103a69

From c883f161a6a9e68685b667945a5a1e77bf8136ae Mon Sep 17 00:00:00 2001
From: abdosi <58047199+abdosi@users.noreply.github.com>
Date: Mon, 9 Sep 2024 09:51:34 -0700
Subject: [PATCH 0986/1115] [VOQ Chassis] Reduce the i-BGP Keep alive and Hold
 timer value (#20189)

* Change the Hold timer to 7 sec and Keep alive to 2 sec for i-BGP session
in VOQ Chassis

Signed-off-by: Abhishek Dosi <abdosi@microsoft.com>
---
 .../frr/bgpd/templates/voq_chassis/instance.conf.j2             | 2 +-
 .../tests/data/voq_chassis/instance.conf/result_all_v4.conf     | 2 +-
 .../tests/data/voq_chassis/instance.conf/result_all_v6.conf     | 2 +-
 .../tests/data/voq_chassis/instance.conf/result_base_v4.conf    | 2 +-
 .../tests/data/voq_chassis/instance.conf/result_base_v6.conf    | 2 +-
 .../data/voq_chassis/instance.conf/result_shutdown_v4_1.conf    | 2 +-
 .../data/voq_chassis/instance.conf/result_shutdown_v4_2.conf    | 2 +-
 .../data/voq_chassis/instance.conf/result_shutdown_v6_1.conf    | 2 +-
 .../data/voq_chassis/instance.conf/result_shutdown_v6_2.conf    | 2 +-
 .../data/voq_chassis/instance.conf/result_timers_v4_1.conf      | 2 +-
 .../data/voq_chassis/instance.conf/result_timers_v4_2.conf      | 2 +-
 .../data/voq_chassis/instance.conf/result_timers_v6_1.conf      | 2 +-
 .../data/voq_chassis/instance.conf/result_timers_v6_2.conf      | 2 +-
 13 files changed, 13 insertions(+), 13 deletions(-)

diff --git a/dockers/docker-fpm-frr/frr/bgpd/templates/voq_chassis/instance.conf.j2 b/dockers/docker-fpm-frr/frr/bgpd/templates/voq_chassis/instance.conf.j2
index 4f7bde5dd..c40d3b842 100644
--- a/dockers/docker-fpm-frr/frr/bgpd/templates/voq_chassis/instance.conf.j2
+++ b/dockers/docker-fpm-frr/frr/bgpd/templates/voq_chassis/instance.conf.j2
@@ -11,7 +11,7 @@
 {% endif %}
   neighbor {{ neighbor_addr }} remote-as {{ bgp_session['asn'] }}
   neighbor {{ neighbor_addr }} description {{ bgp_session['name'] }}
-  neighbor {{ neighbor_addr }} timers 3 10
+  neighbor {{ neighbor_addr }} timers 2 7
   neighbor {{ neighbor_addr }} timers connect 10
 !
 {% if 'admin_status' in bgp_session and bgp_session['admin_status'] == 'down' or 'admin_status' not in bgp_session and 'default_bgp_status' in CONFIG_DB__DEVICE_METADATA['localhost'] and CONFIG_DB__DEVICE_METADATA['localhost']['default_bgp_status'] == 'down' %}
diff --git a/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_all_v4.conf b/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_all_v4.conf
index 604af65d5..125055221 100644
--- a/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_all_v4.conf
+++ b/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_all_v4.conf
@@ -7,7 +7,7 @@
   neighbor 10.10.10.10 peer-group VOQ_CHASSIS_V4_PEER
   neighbor 10.10.10.10 remote-as 555
   neighbor 10.10.10.10 description internal1
-  neighbor 10.10.10.10 timers 3 10
+  neighbor 10.10.10.10 timers 2 7
   neighbor 10.10.10.10 timers connect 10
   neighbor 10.10.10.10 shutdown
 !
diff --git a/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_all_v6.conf b/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_all_v6.conf
index 793473c2e..e6274e053 100644
--- a/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_all_v6.conf
+++ b/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_all_v6.conf
@@ -7,7 +7,7 @@
   neighbor fc00::01 peer-group VOQ_CHASSIS_V6_PEER
   neighbor fc00::01 remote-as 555
   neighbor fc00::01 description internal1
-  neighbor fc00::01 timers 3 10
+  neighbor fc00::01 timers 2 7
   neighbor fc00::01 timers connect 10
   neighbor fc00::01 shutdown
 !
diff --git a/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_base_v4.conf b/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_base_v4.conf
index 23bf5841f..4d2f2c251 100644
--- a/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_base_v4.conf
+++ b/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_base_v4.conf
@@ -7,7 +7,7 @@
   neighbor 10.10.10.10 peer-group VOQ_CHASSIS_V4_PEER
   neighbor 10.10.10.10 remote-as 555
   neighbor 10.10.10.10 description internal1
-  neighbor 10.10.10.10 timers 3 10
+  neighbor 10.10.10.10 timers 2 7
   neighbor 10.10.10.10 timers connect 10
   address-family ipv4
     maximum-paths ibgp 64
diff --git a/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_base_v6.conf b/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_base_v6.conf
index a0bd9379c..375d00051 100644
--- a/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_base_v6.conf
+++ b/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_base_v6.conf
@@ -7,7 +7,7 @@
   neighbor fc00::01 peer-group VOQ_CHASSIS_V6_PEER
   neighbor fc00::01 remote-as 555
   neighbor fc00::01 description internal1
-  neighbor fc00::01 timers 3 10
+  neighbor fc00::01 timers 2 7
   neighbor fc00::01 timers connect 10
   address-family ipv4
     maximum-paths ibgp 64
diff --git a/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_shutdown_v4_1.conf b/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_shutdown_v4_1.conf
index f26f0d6d3..5181fad51 100644
--- a/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_shutdown_v4_1.conf
+++ b/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_shutdown_v4_1.conf
@@ -7,7 +7,7 @@
   neighbor 10.10.10.10 peer-group VOQ_CHASSIS_V4_PEER
   neighbor 10.10.10.10 remote-as 555
   neighbor 10.10.10.10 description internal1
-  neighbor 10.10.10.10 timers 3 10
+  neighbor 10.10.10.10 timers 2 7
   neighbor 10.10.10.10 timers connect 10
   neighbor 10.10.10.10 shutdown
 !
diff --git a/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_shutdown_v4_2.conf b/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_shutdown_v4_2.conf
index 23bf5841f..4d2f2c251 100644
--- a/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_shutdown_v4_2.conf
+++ b/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_shutdown_v4_2.conf
@@ -7,7 +7,7 @@
   neighbor 10.10.10.10 peer-group VOQ_CHASSIS_V4_PEER
   neighbor 10.10.10.10 remote-as 555
   neighbor 10.10.10.10 description internal1
-  neighbor 10.10.10.10 timers 3 10
+  neighbor 10.10.10.10 timers 2 7
   neighbor 10.10.10.10 timers connect 10
   address-family ipv4
     maximum-paths ibgp 64
diff --git a/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_shutdown_v6_1.conf b/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_shutdown_v6_1.conf
index 4057147d5..144a26ca4 100644
--- a/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_shutdown_v6_1.conf
+++ b/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_shutdown_v6_1.conf
@@ -7,7 +7,7 @@
   neighbor fc00::01 peer-group VOQ_CHASSIS_V6_PEER
   neighbor fc00::01 remote-as 555
   neighbor fc00::01 description internal1
-  neighbor fc00::01 timers 3 10
+  neighbor fc00::01 timers 2 7
   neighbor fc00::01 timers connect 10
   neighbor fc00::01 shutdown
 !
diff --git a/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_shutdown_v6_2.conf b/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_shutdown_v6_2.conf
index a0bd9379c..375d00051 100644
--- a/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_shutdown_v6_2.conf
+++ b/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_shutdown_v6_2.conf
@@ -7,7 +7,7 @@
   neighbor fc00::01 peer-group VOQ_CHASSIS_V6_PEER
   neighbor fc00::01 remote-as 555
   neighbor fc00::01 description internal1
-  neighbor fc00::01 timers 3 10
+  neighbor fc00::01 timers 2 7
   neighbor fc00::01 timers connect 10
   address-family ipv4
     maximum-paths ibgp 64
diff --git a/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_timers_v4_1.conf b/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_timers_v4_1.conf
index 23bf5841f..4d2f2c251 100644
--- a/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_timers_v4_1.conf
+++ b/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_timers_v4_1.conf
@@ -7,7 +7,7 @@
   neighbor 10.10.10.10 peer-group VOQ_CHASSIS_V4_PEER
   neighbor 10.10.10.10 remote-as 555
   neighbor 10.10.10.10 description internal1
-  neighbor 10.10.10.10 timers 3 10
+  neighbor 10.10.10.10 timers 2 7
   neighbor 10.10.10.10 timers connect 10
   address-family ipv4
     maximum-paths ibgp 64
diff --git a/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_timers_v4_2.conf b/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_timers_v4_2.conf
index 23bf5841f..4d2f2c251 100644
--- a/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_timers_v4_2.conf
+++ b/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_timers_v4_2.conf
@@ -7,7 +7,7 @@
   neighbor 10.10.10.10 peer-group VOQ_CHASSIS_V4_PEER
   neighbor 10.10.10.10 remote-as 555
   neighbor 10.10.10.10 description internal1
-  neighbor 10.10.10.10 timers 3 10
+  neighbor 10.10.10.10 timers 2 7
   neighbor 10.10.10.10 timers connect 10
   address-family ipv4
     maximum-paths ibgp 64
diff --git a/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_timers_v6_1.conf b/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_timers_v6_1.conf
index a0bd9379c..375d00051 100644
--- a/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_timers_v6_1.conf
+++ b/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_timers_v6_1.conf
@@ -7,7 +7,7 @@
   neighbor fc00::01 peer-group VOQ_CHASSIS_V6_PEER
   neighbor fc00::01 remote-as 555
   neighbor fc00::01 description internal1
-  neighbor fc00::01 timers 3 10
+  neighbor fc00::01 timers 2 7
   neighbor fc00::01 timers connect 10
   address-family ipv4
     maximum-paths ibgp 64
diff --git a/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_timers_v6_2.conf b/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_timers_v6_2.conf
index a0bd9379c..375d00051 100644
--- a/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_timers_v6_2.conf
+++ b/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_timers_v6_2.conf
@@ -7,7 +7,7 @@
   neighbor fc00::01 peer-group VOQ_CHASSIS_V6_PEER
   neighbor fc00::01 remote-as 555
   neighbor fc00::01 description internal1
-  neighbor fc00::01 timers 3 10
+  neighbor fc00::01 timers 2 7
   neighbor fc00::01 timers connect 10
   address-family ipv4
     maximum-paths ibgp 64

From b0061f99e27082c7a53fb83ffe24f37c115fed09 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Wed, 11 Sep 2024 16:01:22 +0800
Subject: [PATCH 0987/1115] [submodule] Update submodule sonic-host-services to
 the latest HEAD automatically (#20200)

#### Why I did it
src/sonic-host-services
```
* d2170c9 - (HEAD -> master, origin/master, origin/HEAD) Disable connection tracking for icmpv6 traffic (#158) (30 hours ago) [prabhataravind]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-host-services | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-host-services b/src/sonic-host-services
index e21db16de..d2170c9d4 160000
--- a/src/sonic-host-services
+++ b/src/sonic-host-services
@@ -1 +1 @@
-Subproject commit e21db16de7e095a15874a64d12afb8e770325434
+Subproject commit d2170c9d48e59aeeec2058cb9a85e59b7761ad36

From 72170bce363204104458601a4882ab240d17fe42 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Wed, 11 Sep 2024 19:01:35 +0800
Subject: [PATCH 0988/1115] [submodule] Update submodule sonic-utilities to the
 latest HEAD automatically (#20202)

#### Why I did it
src/sonic-utilities
```
* a7897d1f - (HEAD -> master, origin/master, origin/HEAD) [show][interface][counters] Add proposal and changes for fec-histogram for interface counters fec-histogram subcommand (#3519) (10 hours ago) [vdahiya12]
* 5fdc1b61 - [Mellanox] Add new SKU Mellanox-SN5600-C256 (#3431) (34 hours ago) [DavidZagury]
* d103bfd7 - Fix ntp conf file path (#3525) (34 hours ago) [Vivek]
* 5eb266ac - [chassis] Modify the show ip route to hide the Ethernet-IB port in the output (#3537) (34 hours ago) [Arvindsrinivasan Lakshmi Narasimhan]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-utilities | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-utilities b/src/sonic-utilities
index b82115c94..a7897d1fd 160000
--- a/src/sonic-utilities
+++ b/src/sonic-utilities
@@ -1 +1 @@
-Subproject commit b82115c941869f13999c8f7abe93f32711a9472a
+Subproject commit a7897d1fd43603272f99dd7daaa08dc28f5bda7a

From 64bc7174e623a61ea40a350e45e913ef50829357 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Wed, 11 Sep 2024 19:01:44 +0800
Subject: [PATCH 0989/1115] [submodule] Update submodule sonic-dash-api to the
 latest HEAD automatically (#20199)

#### Why I did it
src/sonic-dash-api
```
* 0b33087 - (HEAD -> master, origin/master, origin/HEAD) Add local region ID field to Dash appliance table (#26) (31 hours ago) [Mukesh Moopath Velayudhan]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-dash-api | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-dash-api b/src/sonic-dash-api
index 4919d9e6f..0b33087d8 160000
--- a/src/sonic-dash-api
+++ b/src/sonic-dash-api
@@ -1 +1 @@
-Subproject commit 4919d9e6f6d2c1b8ecc1941a58c71dd74f21776f
+Subproject commit 0b33087d82c2d297aadd75b2862fbd11a2fce386

From dbcfc280869bed8c7592bb25e047d36847a03901 Mon Sep 17 00:00:00 2001
From: Vineet  Mittal <46945843+vmittal-msft@users.noreply.github.com>
Date: Wed, 11 Sep 2024 15:00:09 -0700
Subject: [PATCH 0990/1115] [Chassis] Update lossy profile to restrict buffer
 usage in congestion state (#20132)

Why I did it
This change is to restrict lossy queue buffer usage in case of congestion state.

Work item tracking
Microsoft ADO (29315559):

How I did it
Updated alpha from 0 to -4 (400g) & -5 (100g) port speed. This configuration is applied on system port and will be using HWSKU port speed settings.

How to verify it
It is verified using sonic-mgmt tests and running ok.
---
 .../Arista-7800R3-48CQ2-C48/buffers_defaults_t2.j2              | 2 +-
 .../Arista-7800R3-48CQM2-C48/buffers_defaults_t2.j2             | 2 +-
 .../Arista-7800R3A-36D2-C36/0/buffers_defaults_t2.j2            | 2 +-
 .../Arista-7800R3A-36D2-C36/1/buffers_defaults_t2.j2            | 2 +-
 .../Arista-7800R3A-36D2-C72/0/buffers_defaults_t2.j2            | 2 +-
 .../Arista-7800R3A-36D2-C72/1/buffers_defaults_t2.j2            | 2 +-
 .../Arista-7800R3A-36D2-D36/0/buffers_defaults_t2.j2            | 2 +-
 .../Arista-7800R3A-36D2-D36/1/buffers_defaults_t2.j2            | 2 +-
 .../Nokia-IXR7250E-36x100G/0/buffers_defaults_t2.j2             | 2 +-
 .../Nokia-IXR7250E-36x100G/1/buffers_defaults_t2.j2             | 2 +-
 .../Nokia-IXR7250E-36x400G/0/buffers_defaults_t2.j2             | 2 +-
 .../Nokia-IXR7250E-36x400G/1/buffers_defaults_t2.j2             | 2 +-
 .../tests/sample_output/py2/buffer-arista7800r3-48cq2-lc.json   | 2 +-
 .../tests/sample_output/py2/buffer-arista7800r3-48cqm2-lc.json  | 2 +-
 .../sample_output/py2/buffer-arista7800r3a-36dm2-c36-lc.json    | 2 +-
 .../sample_output/py2/buffer-arista7800r3a-36dm2-d36-lc.json    | 2 +-
 .../tests/sample_output/py2/buffer-nokia-ixr7250e-36x100g.json  | 2 +-
 .../tests/sample_output/py2/buffer-nokia-ixr7250e-36x400g.json  | 2 +-
 .../tests/sample_output/py3/buffer-arista7800r3-48cq2-lc.json   | 2 +-
 .../tests/sample_output/py3/buffer-arista7800r3-48cqm2-lc.json  | 2 +-
 .../sample_output/py3/buffer-arista7800r3a-36dm2-c36-lc.json    | 2 +-
 .../sample_output/py3/buffer-arista7800r3a-36dm2-d36-lc.json    | 2 +-
 .../tests/sample_output/py3/buffer-nokia-ixr7250e-36x100g.json  | 2 +-
 .../tests/sample_output/py3/buffer-nokia-ixr7250e-36x400g.json  | 2 +-
 24 files changed, 24 insertions(+), 24 deletions(-)

diff --git a/device/arista/x86_64-arista_7800r3_48cq2_lc/Arista-7800R3-48CQ2-C48/buffers_defaults_t2.j2 b/device/arista/x86_64-arista_7800r3_48cq2_lc/Arista-7800R3-48CQ2-C48/buffers_defaults_t2.j2
index efee1fee3..b036683d1 100644
--- a/device/arista/x86_64-arista_7800r3_48cq2_lc/Arista-7800R3-48CQ2-C48/buffers_defaults_t2.j2
+++ b/device/arista/x86_64-arista_7800r3_48cq2_lc/Arista-7800R3-48CQ2-C48/buffers_defaults_t2.j2
@@ -40,7 +40,7 @@
         "egress_lossy_profile": {
             "pool":"ingress_lossless_pool",
             "size":"0",
-            "dynamic_th":"-1"
+            "dynamic_th":"-4"
         }
     },
 {%- endmacro %}
diff --git a/device/arista/x86_64-arista_7800r3_48cqm2_lc/Arista-7800R3-48CQM2-C48/buffers_defaults_t2.j2 b/device/arista/x86_64-arista_7800r3_48cqm2_lc/Arista-7800R3-48CQM2-C48/buffers_defaults_t2.j2
index 5825848d4..38ee97c30 100644
--- a/device/arista/x86_64-arista_7800r3_48cqm2_lc/Arista-7800R3-48CQM2-C48/buffers_defaults_t2.j2
+++ b/device/arista/x86_64-arista_7800r3_48cqm2_lc/Arista-7800R3-48CQM2-C48/buffers_defaults_t2.j2
@@ -40,7 +40,7 @@
         "egress_lossy_profile": {
             "pool":"ingress_lossless_pool",
             "size":"0",
-            "dynamic_th":"-1"
+            "dynamic_th":"-4"
         }
     },
 {%- endmacro %}
diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/0/buffers_defaults_t2.j2 b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/0/buffers_defaults_t2.j2
index 35a7f5357..6990e4de7 100644
--- a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/0/buffers_defaults_t2.j2
+++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/0/buffers_defaults_t2.j2
@@ -40,7 +40,7 @@
         "egress_lossy_profile": {
             "pool":"ingress_lossless_pool",
             "size":"0",
-            "dynamic_th":"-1"
+            "dynamic_th":"-4"
         }
     },
 {%- endmacro %}
diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/1/buffers_defaults_t2.j2 b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/1/buffers_defaults_t2.j2
index 18bf47b01..857d7f265 100644
--- a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/1/buffers_defaults_t2.j2
+++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/1/buffers_defaults_t2.j2
@@ -40,7 +40,7 @@
         "egress_lossy_profile": {
             "pool":"ingress_lossless_pool",
             "size":"0",
-            "dynamic_th":"-1"
+            "dynamic_th":"-4"
         }
     },
 {%- endmacro %}
diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/0/buffers_defaults_t2.j2 b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/0/buffers_defaults_t2.j2
index b49aea940..1aea50e1f 100644
--- a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/0/buffers_defaults_t2.j2
+++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/0/buffers_defaults_t2.j2
@@ -40,7 +40,7 @@
         "egress_lossy_profile": {
             "pool":"ingress_lossless_pool",
             "size":"0",
-            "dynamic_th":"-1"
+            "dynamic_th":"-4"
         }
     },
 {%- endmacro %}
diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/1/buffers_defaults_t2.j2 b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/1/buffers_defaults_t2.j2
index 9fa59b61c..19caf55f0 100644
--- a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/1/buffers_defaults_t2.j2
+++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/1/buffers_defaults_t2.j2
@@ -40,7 +40,7 @@
         "egress_lossy_profile": {
             "pool":"ingress_lossless_pool",
             "size":"0",
-            "dynamic_th":"-1"
+            "dynamic_th":"-4"
         }
     },
 {%- endmacro %}
diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/0/buffers_defaults_t2.j2 b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/0/buffers_defaults_t2.j2
index 615280ab2..2af84b9a9 100644
--- a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/0/buffers_defaults_t2.j2
+++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/0/buffers_defaults_t2.j2
@@ -40,7 +40,7 @@
         "egress_lossy_profile": {
             "pool":"ingress_lossless_pool",
             "size":"0",
-            "dynamic_th":"-1"
+            "dynamic_th":"-4"
         }
     },
 {%- endmacro %}
diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/1/buffers_defaults_t2.j2 b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/1/buffers_defaults_t2.j2
index 407058909..b4c4ff9cc 100644
--- a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/1/buffers_defaults_t2.j2
+++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/1/buffers_defaults_t2.j2
@@ -40,7 +40,7 @@
         "egress_lossy_profile": {
             "pool":"ingress_lossless_pool",
             "size":"0",
-            "dynamic_th":"-1"
+            "dynamic_th":"-4"
         }
     },
 {%- endmacro %}
diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/0/buffers_defaults_t2.j2 b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/0/buffers_defaults_t2.j2
index 030060d45..f911a0e58 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/0/buffers_defaults_t2.j2
+++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/0/buffers_defaults_t2.j2
@@ -40,7 +40,7 @@
         "egress_lossy_profile": {
             "pool":"ingress_lossless_pool",
             "size":"0",
-            "dynamic_th":"-1"
+            "dynamic_th":"-4"
         }
     },
 {%- endmacro %}
diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/1/buffers_defaults_t2.j2 b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/1/buffers_defaults_t2.j2
index 030060d45..f911a0e58 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/1/buffers_defaults_t2.j2
+++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/1/buffers_defaults_t2.j2
@@ -40,7 +40,7 @@
         "egress_lossy_profile": {
             "pool":"ingress_lossless_pool",
             "size":"0",
-            "dynamic_th":"-1"
+            "dynamic_th":"-4"
         }
     },
 {%- endmacro %}
diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/0/buffers_defaults_t2.j2 b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/0/buffers_defaults_t2.j2
index 3fb88267a..cf0e02f6d 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/0/buffers_defaults_t2.j2
+++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/0/buffers_defaults_t2.j2
@@ -40,7 +40,7 @@
         "egress_lossy_profile": {
             "pool":"ingress_lossless_pool",
             "size":"0",
-            "dynamic_th":"-1"
+            "dynamic_th":"-4"
         }
     },
 {%- endmacro %}
diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/1/buffers_defaults_t2.j2 b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/1/buffers_defaults_t2.j2
index 3fb88267a..cf0e02f6d 100644
--- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/1/buffers_defaults_t2.j2
+++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/1/buffers_defaults_t2.j2
@@ -40,7 +40,7 @@
         "egress_lossy_profile": {
             "pool":"ingress_lossless_pool",
             "size":"0",
-            "dynamic_th":"-1"
+            "dynamic_th":"-4"
         }
     },
 {%- endmacro %}
diff --git a/src/sonic-config-engine/tests/sample_output/py2/buffer-arista7800r3-48cq2-lc.json b/src/sonic-config-engine/tests/sample_output/py2/buffer-arista7800r3-48cq2-lc.json
index 35b9c69d4..661fd8cc2 100644
--- a/src/sonic-config-engine/tests/sample_output/py2/buffer-arista7800r3-48cq2-lc.json
+++ b/src/sonic-config-engine/tests/sample_output/py2/buffer-arista7800r3-48cq2-lc.json
@@ -75,7 +75,7 @@
         "egress_lossy_profile": {
             "pool":"ingress_lossless_pool",
             "size":"0",
-            "dynamic_th":"-1"
+            "dynamic_th":"-4"
         }
     },
     "BUFFER_PG": {
diff --git a/src/sonic-config-engine/tests/sample_output/py2/buffer-arista7800r3-48cqm2-lc.json b/src/sonic-config-engine/tests/sample_output/py2/buffer-arista7800r3-48cqm2-lc.json
index ebca473bc..8a1163f95 100644
--- a/src/sonic-config-engine/tests/sample_output/py2/buffer-arista7800r3-48cqm2-lc.json
+++ b/src/sonic-config-engine/tests/sample_output/py2/buffer-arista7800r3-48cqm2-lc.json
@@ -75,7 +75,7 @@
         "egress_lossy_profile": {
             "pool":"ingress_lossless_pool",
             "size":"0",
-            "dynamic_th":"-1"
+            "dynamic_th":"-4"
         }
     },
     "BUFFER_PG": {
diff --git a/src/sonic-config-engine/tests/sample_output/py2/buffer-arista7800r3a-36dm2-c36-lc.json b/src/sonic-config-engine/tests/sample_output/py2/buffer-arista7800r3a-36dm2-c36-lc.json
index 6ab0f7c68..b82f36fdd 100644
--- a/src/sonic-config-engine/tests/sample_output/py2/buffer-arista7800r3a-36dm2-c36-lc.json
+++ b/src/sonic-config-engine/tests/sample_output/py2/buffer-arista7800r3a-36dm2-c36-lc.json
@@ -45,7 +45,7 @@
         "egress_lossy_profile": {
             "pool":"ingress_lossless_pool",
             "size":"0",
-            "dynamic_th":"-1"
+            "dynamic_th":"-4"
         }
     },
 
diff --git a/src/sonic-config-engine/tests/sample_output/py2/buffer-arista7800r3a-36dm2-d36-lc.json b/src/sonic-config-engine/tests/sample_output/py2/buffer-arista7800r3a-36dm2-d36-lc.json
index ba77ebdcf..7d7af2c68 100644
--- a/src/sonic-config-engine/tests/sample_output/py2/buffer-arista7800r3a-36dm2-d36-lc.json
+++ b/src/sonic-config-engine/tests/sample_output/py2/buffer-arista7800r3a-36dm2-d36-lc.json
@@ -45,7 +45,7 @@
         "egress_lossy_profile": {
             "pool":"ingress_lossless_pool",
             "size":"0",
-            "dynamic_th":"-1"
+            "dynamic_th":"-4"
         }
     },
 
diff --git a/src/sonic-config-engine/tests/sample_output/py2/buffer-nokia-ixr7250e-36x100g.json b/src/sonic-config-engine/tests/sample_output/py2/buffer-nokia-ixr7250e-36x100g.json
index 4ed219574..7e39255e7 100644
--- a/src/sonic-config-engine/tests/sample_output/py2/buffer-nokia-ixr7250e-36x100g.json
+++ b/src/sonic-config-engine/tests/sample_output/py2/buffer-nokia-ixr7250e-36x100g.json
@@ -45,7 +45,7 @@
         "egress_lossy_profile": {
             "pool":"ingress_lossless_pool",
             "size":"0",
-            "dynamic_th":"-1"
+            "dynamic_th":"-4"
         }
     },
 
diff --git a/src/sonic-config-engine/tests/sample_output/py2/buffer-nokia-ixr7250e-36x400g.json b/src/sonic-config-engine/tests/sample_output/py2/buffer-nokia-ixr7250e-36x400g.json
index 7b8186206..010a8677e 100644
--- a/src/sonic-config-engine/tests/sample_output/py2/buffer-nokia-ixr7250e-36x400g.json
+++ b/src/sonic-config-engine/tests/sample_output/py2/buffer-nokia-ixr7250e-36x400g.json
@@ -45,7 +45,7 @@
         "egress_lossy_profile": {
             "pool":"ingress_lossless_pool",
             "size":"0",
-            "dynamic_th":"-1"
+            "dynamic_th":"-4"
         }
     },
 
diff --git a/src/sonic-config-engine/tests/sample_output/py3/buffer-arista7800r3-48cq2-lc.json b/src/sonic-config-engine/tests/sample_output/py3/buffer-arista7800r3-48cq2-lc.json
index 35b9c69d4..661fd8cc2 100644
--- a/src/sonic-config-engine/tests/sample_output/py3/buffer-arista7800r3-48cq2-lc.json
+++ b/src/sonic-config-engine/tests/sample_output/py3/buffer-arista7800r3-48cq2-lc.json
@@ -75,7 +75,7 @@
         "egress_lossy_profile": {
             "pool":"ingress_lossless_pool",
             "size":"0",
-            "dynamic_th":"-1"
+            "dynamic_th":"-4"
         }
     },
     "BUFFER_PG": {
diff --git a/src/sonic-config-engine/tests/sample_output/py3/buffer-arista7800r3-48cqm2-lc.json b/src/sonic-config-engine/tests/sample_output/py3/buffer-arista7800r3-48cqm2-lc.json
index ebca473bc..8a1163f95 100644
--- a/src/sonic-config-engine/tests/sample_output/py3/buffer-arista7800r3-48cqm2-lc.json
+++ b/src/sonic-config-engine/tests/sample_output/py3/buffer-arista7800r3-48cqm2-lc.json
@@ -75,7 +75,7 @@
         "egress_lossy_profile": {
             "pool":"ingress_lossless_pool",
             "size":"0",
-            "dynamic_th":"-1"
+            "dynamic_th":"-4"
         }
     },
     "BUFFER_PG": {
diff --git a/src/sonic-config-engine/tests/sample_output/py3/buffer-arista7800r3a-36dm2-c36-lc.json b/src/sonic-config-engine/tests/sample_output/py3/buffer-arista7800r3a-36dm2-c36-lc.json
index 6ab0f7c68..b82f36fdd 100644
--- a/src/sonic-config-engine/tests/sample_output/py3/buffer-arista7800r3a-36dm2-c36-lc.json
+++ b/src/sonic-config-engine/tests/sample_output/py3/buffer-arista7800r3a-36dm2-c36-lc.json
@@ -45,7 +45,7 @@
         "egress_lossy_profile": {
             "pool":"ingress_lossless_pool",
             "size":"0",
-            "dynamic_th":"-1"
+            "dynamic_th":"-4"
         }
     },
 
diff --git a/src/sonic-config-engine/tests/sample_output/py3/buffer-arista7800r3a-36dm2-d36-lc.json b/src/sonic-config-engine/tests/sample_output/py3/buffer-arista7800r3a-36dm2-d36-lc.json
index ba77ebdcf..7d7af2c68 100644
--- a/src/sonic-config-engine/tests/sample_output/py3/buffer-arista7800r3a-36dm2-d36-lc.json
+++ b/src/sonic-config-engine/tests/sample_output/py3/buffer-arista7800r3a-36dm2-d36-lc.json
@@ -45,7 +45,7 @@
         "egress_lossy_profile": {
             "pool":"ingress_lossless_pool",
             "size":"0",
-            "dynamic_th":"-1"
+            "dynamic_th":"-4"
         }
     },
 
diff --git a/src/sonic-config-engine/tests/sample_output/py3/buffer-nokia-ixr7250e-36x100g.json b/src/sonic-config-engine/tests/sample_output/py3/buffer-nokia-ixr7250e-36x100g.json
index 4ed219574..7e39255e7 100644
--- a/src/sonic-config-engine/tests/sample_output/py3/buffer-nokia-ixr7250e-36x100g.json
+++ b/src/sonic-config-engine/tests/sample_output/py3/buffer-nokia-ixr7250e-36x100g.json
@@ -45,7 +45,7 @@
         "egress_lossy_profile": {
             "pool":"ingress_lossless_pool",
             "size":"0",
-            "dynamic_th":"-1"
+            "dynamic_th":"-4"
         }
     },
 
diff --git a/src/sonic-config-engine/tests/sample_output/py3/buffer-nokia-ixr7250e-36x400g.json b/src/sonic-config-engine/tests/sample_output/py3/buffer-nokia-ixr7250e-36x400g.json
index 7b8186206..010a8677e 100644
--- a/src/sonic-config-engine/tests/sample_output/py3/buffer-nokia-ixr7250e-36x400g.json
+++ b/src/sonic-config-engine/tests/sample_output/py3/buffer-nokia-ixr7250e-36x400g.json
@@ -45,7 +45,7 @@
         "egress_lossy_profile": {
             "pool":"ingress_lossless_pool",
             "size":"0",
-            "dynamic_th":"-1"
+            "dynamic_th":"-4"
         }
     },
 

From dfa500203dd382642999ef4c1a4c471c1b73aba6 Mon Sep 17 00:00:00 2001
From: rick-arista <148895369+rick-arista@users.noreply.github.com>
Date: Wed, 11 Sep 2024 15:56:41 -0700
Subject: [PATCH 0991/1115] [Arista] No-op qos buffer templates, remove bcm
 baseline configs (#20157)

[Arista] No-op qos buffer templates, remove bcm baseline configs
---
 .../th5-a7060x6-64de.config.bcm               | 92 -------------------
 .../th5-a7060x6-64de.config.bcm               | 92 -------------------
 .../th5-a7060x6-64pe.config.bcm               | 92 -------------------
 .../th5-a7060x6-64pe.config.bcm               | 92 -------------------
 .../th5-a7060x6-64pe.config.bcm               | 92 -------------------
 .../th5/gen/BALANCED/buffers_defaults_t0.j2   | 46 +++-------
 .../th5/gen/BALANCED/buffers_defaults_t1.j2   | 46 +++-------
 .../th5/gen/BALANCED/pg_profile_lookup.ini    | 21 -----
 8 files changed, 24 insertions(+), 549 deletions(-)

diff --git a/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-256x200G/th5-a7060x6-64de.config.bcm b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-256x200G/th5-a7060x6-64de.config.bcm
index bcd5bb3e5..79ebb0dfe 100644
--- a/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-256x200G/th5-a7060x6-64de.config.bcm
+++ b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-256x200G/th5-a7060x6-64de.config.bcm
@@ -1926,95 +1926,3 @@ device:
         DEVICE_CONFIG:
             AUTOLOAD_BOARD_SETTINGS: 0
 ...
-## Baseline
----
-device:
-    0:
-        TM_THD_CONFIG:
-            SKIP_BUFFER_RESERVATION: 1
-            THRESHOLD_MODE: LOSSY_AND_LOSSLESS
-...
----
-device:
-    0:
-        TM_ING_THD_HEADROOM_POOL:
-            ?
-                BUFFER_POOL: [[0,1]]
-                TM_HEADROOM_POOL_ID: [[0,3]]
-            :
-                LIMIT_CELLS: 0
-
-        TM_ING_THD_SERVICE_POOL:
-            ?
-                BUFFER_POOL: [[0,1]]
-                TM_ING_SERVICE_POOL_ID: [[0,3]]
-            :
-                SHARED_LIMIT_CELLS: 0
-                SHARED_RESUME_OFFSET_CELLS: 0
-                COLOR_SPECIFIC_LIMITS: 0
-
-        TM_EGR_THD_SERVICE_POOL:
-            ?
-                BUFFER_POOL: [[0,1]]
-                TM_EGR_SERVICE_POOL_ID: [[0,3]]
-            :
-                SHARED_LIMIT_CELLS: 0
-                SHARED_RESUME_LIMIT_CELLS: 0
-                COLOR_SPECIFIC_LIMITS: 0
-                YELLOW_SHARED_LIMIT_CELLS: 0
-                YELLOW_SHARED_RESUME_LIMIT_CELLS: 0
-                RED_SHARED_LIMIT_CELLS: 0
-                RED_SHARED_RESUME_LIMIT_CELLS: 0
-
-        TM_THD_MC_EGR_SERVICE_POOL:
-            ?
-                BUFFER_POOL: [[0,1]]
-                TM_EGR_SERVICE_POOL_ID: [[0,3]]
-            :
-                SHARED_LIMIT_CELLS: 0
-                SHARED_RESUME_LIMIT_CELLS: 0
-                COLOR_SPECIFIC_LIMITS: 0
-                YELLOW_SHARED_LIMIT_CELLS: 0
-                YELLOW_SHARED_RESUME_LIMIT_CELLS: 0
-                RED_SHARED_LIMIT_CELLS: 0
-                RED_SHARED_RESUME_LIMIT_CELLS: 0
-
-        TM_ING_PORT_PRI_GRP:
-            ?
-                PORT_ID: [[1, 8],
-                          [11, 18],
-                          [22, 29],
-                          [33, 40],
-                          [44, 51],
-                          [55, 62],
-                          [66, 73],
-                          [77, 84],
-                          [88, 95],
-                          [99, 106],
-                          [110, 117],
-                          [121, 128],
-                          [132, 139],
-                          [143, 150],
-                          [154, 161],
-                          [165, 172],
-                          [176, 183],
-                          [187, 194],
-                          [198, 205],
-                          [209, 216],
-                          [220, 227],
-                          [231, 238],
-                          [242, 249],
-                          [253, 260],
-                          [264, 271],
-                          [275, 282],
-                          [286, 293],
-                          [297, 304],
-                          [308, 315],
-                          [319, 326],
-                          [330, 337],
-                          [341, 348]]
-                TM_PRI_GRP_ID: 3
-            :
-                PFC: 1
-                LOSSLESS: 1
-...
diff --git a/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE/th5-a7060x6-64de.config.bcm b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE/th5-a7060x6-64de.config.bcm
index ee71dbf00..afe53dfe8 100644
--- a/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE/th5-a7060x6-64de.config.bcm
+++ b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE/th5-a7060x6-64de.config.bcm
@@ -1158,95 +1158,3 @@ device:
         DEVICE_CONFIG:
             AUTOLOAD_BOARD_SETTINGS: 0
 ...
-## Baseline
----
-device:
-    0:
-        TM_THD_CONFIG:
-            SKIP_BUFFER_RESERVATION: 1
-            THRESHOLD_MODE: LOSSY_AND_LOSSLESS
-...
----
-device:
-    0:
-        TM_ING_THD_HEADROOM_POOL:
-            ?
-                BUFFER_POOL: [[0,1]]
-                TM_HEADROOM_POOL_ID: [[0,3]]
-            :
-                LIMIT_CELLS: 0
-
-        TM_ING_THD_SERVICE_POOL:
-            ?
-                BUFFER_POOL: [[0,1]]
-                TM_ING_SERVICE_POOL_ID: [[0,3]]
-            :
-                SHARED_LIMIT_CELLS: 0
-                SHARED_RESUME_OFFSET_CELLS: 0
-                COLOR_SPECIFIC_LIMITS: 0
-
-        TM_EGR_THD_SERVICE_POOL:
-            ?
-                BUFFER_POOL: [[0,1]]
-                TM_EGR_SERVICE_POOL_ID: [[0,3]]
-            :
-                SHARED_LIMIT_CELLS: 0
-                SHARED_RESUME_LIMIT_CELLS: 0
-                COLOR_SPECIFIC_LIMITS: 0
-                YELLOW_SHARED_LIMIT_CELLS: 0
-                YELLOW_SHARED_RESUME_LIMIT_CELLS: 0
-                RED_SHARED_LIMIT_CELLS: 0
-                RED_SHARED_RESUME_LIMIT_CELLS: 0
-
-        TM_THD_MC_EGR_SERVICE_POOL:
-            ?
-                BUFFER_POOL: [[0,1]]
-                TM_EGR_SERVICE_POOL_ID: [[0,3]]
-            :
-                SHARED_LIMIT_CELLS: 0
-                SHARED_RESUME_LIMIT_CELLS: 0
-                COLOR_SPECIFIC_LIMITS: 0
-                YELLOW_SHARED_LIMIT_CELLS: 0
-                YELLOW_SHARED_RESUME_LIMIT_CELLS: 0
-                RED_SHARED_LIMIT_CELLS: 0
-                RED_SHARED_RESUME_LIMIT_CELLS: 0
-
-        TM_ING_PORT_PRI_GRP:
-            ?
-                PORT_ID: [[1, 2],
-                          [11, 12],
-                          [22, 23],
-                          [33, 34],
-                          [44, 45],
-                          [55, 56],
-                          [66, 67],
-                          [77, 78],
-                          [88, 89],
-                          [99, 100],
-                          [110, 111],
-                          [121, 122],
-                          [132, 133],
-                          [143, 144],
-                          [154, 155],
-                          [165, 166],
-                          [176, 177],
-                          [187, 188],
-                          [198, 199],
-                          [209, 210],
-                          [220, 221],
-                          [231, 232],
-                          [242, 243],
-                          [253, 254],
-                          [264, 265],
-                          [275, 276],
-                          [286, 287],
-                          [297, 298],
-                          [308, 309],
-                          [319, 320],
-                          [330, 331],
-                          [341, 342]]
-                TM_PRI_GRP_ID: 3
-            :
-                PFC: 1
-                LOSSLESS: 1
-...
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-128x400G/th5-a7060x6-64pe.config.bcm b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-128x400G/th5-a7060x6-64pe.config.bcm
index cf48a993b..d4af799ff 100644
--- a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-128x400G/th5-a7060x6-64pe.config.bcm
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-128x400G/th5-a7060x6-64pe.config.bcm
@@ -1425,95 +1425,3 @@ device:
         DEVICE_CONFIG:
             AUTOLOAD_BOARD_SETTINGS: 0
 ...
-## Baseline
----
-device:
-    0:
-        TM_THD_CONFIG:
-            SKIP_BUFFER_RESERVATION: 1
-            THRESHOLD_MODE: LOSSY_AND_LOSSLESS
-...
----
-device:
-    0:
-        TM_ING_THD_HEADROOM_POOL:
-            ?
-                BUFFER_POOL: [[0,1]]
-                TM_HEADROOM_POOL_ID: [[0,3]]
-            :
-                LIMIT_CELLS: 0
-
-        TM_ING_THD_SERVICE_POOL:
-            ?
-                BUFFER_POOL: [[0,1]]
-                TM_ING_SERVICE_POOL_ID: [[0,3]]
-            :
-                SHARED_LIMIT_CELLS: 0
-                SHARED_RESUME_OFFSET_CELLS: 0
-                COLOR_SPECIFIC_LIMITS: 0
-
-        TM_EGR_THD_SERVICE_POOL:
-            ?
-                BUFFER_POOL: [[0,1]]
-                TM_EGR_SERVICE_POOL_ID: [[0,3]]
-            :
-                SHARED_LIMIT_CELLS: 0
-                SHARED_RESUME_LIMIT_CELLS: 0
-                COLOR_SPECIFIC_LIMITS: 0
-                YELLOW_SHARED_LIMIT_CELLS: 0
-                YELLOW_SHARED_RESUME_LIMIT_CELLS: 0
-                RED_SHARED_LIMIT_CELLS: 0
-                RED_SHARED_RESUME_LIMIT_CELLS: 0
-
-        TM_THD_MC_EGR_SERVICE_POOL:
-            ?
-                BUFFER_POOL: [[0,1]]
-                TM_EGR_SERVICE_POOL_ID: [[0,3]]
-            :
-                SHARED_LIMIT_CELLS: 0
-                SHARED_RESUME_LIMIT_CELLS: 0
-                COLOR_SPECIFIC_LIMITS: 0
-                YELLOW_SHARED_LIMIT_CELLS: 0
-                YELLOW_SHARED_RESUME_LIMIT_CELLS: 0
-                RED_SHARED_LIMIT_CELLS: 0
-                RED_SHARED_RESUME_LIMIT_CELLS: 0
-
-        TM_ING_PORT_PRI_GRP:
-            ?
-                PORT_ID: [[1, 4],
-                          [11, 14],
-                          [22, 25],
-                          [33, 36],
-                          [44, 47],
-                          [55, 58],
-                          [66, 69],
-                          [77, 80],
-                          [88, 91],
-                          [99, 102],
-                          [110, 113],
-                          [121, 124],
-                          [132, 135],
-                          [143, 146],
-                          [154, 157],
-                          [165, 168],
-                          [176, 179],
-                          [187, 190],
-                          [198, 201],
-                          [209, 212],
-                          [220, 223],
-                          [231, 234],
-                          [242, 245],
-                          [253, 256],
-                          [264, 267],
-                          [275, 278],
-                          [286, 289],
-                          [297, 300],
-                          [308, 311],
-                          [319, 322],
-                          [330, 333],
-                          [341, 344]]
-                TM_PRI_GRP_ID: 3
-            :
-                PFC: 1
-                LOSSLESS: 1
-...
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-64x400G/th5-a7060x6-64pe.config.bcm b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-64x400G/th5-a7060x6-64pe.config.bcm
index 425915e05..bc493b222 100644
--- a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-64x400G/th5-a7060x6-64pe.config.bcm
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-64x400G/th5-a7060x6-64pe.config.bcm
@@ -1169,95 +1169,3 @@ device:
         DEVICE_CONFIG:
             AUTOLOAD_BOARD_SETTINGS: 0
 ...
-## Baseline
----
-device:
-    0:
-        TM_THD_CONFIG:
-            SKIP_BUFFER_RESERVATION: 1
-            THRESHOLD_MODE: LOSSY_AND_LOSSLESS
-...
----
-device:
-    0:
-        TM_ING_THD_HEADROOM_POOL:
-            ?
-                BUFFER_POOL: [[0,1]]
-                TM_HEADROOM_POOL_ID: [[0,3]]
-            :
-                LIMIT_CELLS: 0
-
-        TM_ING_THD_SERVICE_POOL:
-            ?
-                BUFFER_POOL: [[0,1]]
-                TM_ING_SERVICE_POOL_ID: [[0,3]]
-            :
-                SHARED_LIMIT_CELLS: 0
-                SHARED_RESUME_OFFSET_CELLS: 0
-                COLOR_SPECIFIC_LIMITS: 0
-
-        TM_EGR_THD_SERVICE_POOL:
-            ?
-                BUFFER_POOL: [[0,1]]
-                TM_EGR_SERVICE_POOL_ID: [[0,3]]
-            :
-                SHARED_LIMIT_CELLS: 0
-                SHARED_RESUME_LIMIT_CELLS: 0
-                COLOR_SPECIFIC_LIMITS: 0
-                YELLOW_SHARED_LIMIT_CELLS: 0
-                YELLOW_SHARED_RESUME_LIMIT_CELLS: 0
-                RED_SHARED_LIMIT_CELLS: 0
-                RED_SHARED_RESUME_LIMIT_CELLS: 0
-
-        TM_THD_MC_EGR_SERVICE_POOL:
-            ?
-                BUFFER_POOL: [[0,1]]
-                TM_EGR_SERVICE_POOL_ID: [[0,3]]
-            :
-                SHARED_LIMIT_CELLS: 0
-                SHARED_RESUME_LIMIT_CELLS: 0
-                COLOR_SPECIFIC_LIMITS: 0
-                YELLOW_SHARED_LIMIT_CELLS: 0
-                YELLOW_SHARED_RESUME_LIMIT_CELLS: 0
-                RED_SHARED_LIMIT_CELLS: 0
-                RED_SHARED_RESUME_LIMIT_CELLS: 0
-
-        TM_ING_PORT_PRI_GRP:
-            ?
-                PORT_ID: [[1, 2],
-                          [11, 12],
-                          [22, 23],
-                          [33, 34],
-                          [44, 45],
-                          [55, 56],
-                          [66, 67],
-                          [77, 78],
-                          [88, 89],
-                          [99, 100],
-                          [110, 111],
-                          [121, 122],
-                          [132, 133],
-                          [143, 144],
-                          [154, 155],
-                          [165, 166],
-                          [176, 177],
-                          [187, 188],
-                          [198, 199],
-                          [209, 210],
-                          [220, 221],
-                          [231, 232],
-                          [242, 243],
-                          [253, 254],
-                          [264, 265],
-                          [275, 276],
-                          [286, 287],
-                          [297, 298],
-                          [308, 309],
-                          [319, 320],
-                          [330, 331],
-                          [341, 342]]
-                TM_PRI_GRP_ID: 3
-            :
-                PFC: 1
-                LOSSLESS: 1
-...
diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE/th5-a7060x6-64pe.config.bcm b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE/th5-a7060x6-64pe.config.bcm
index 969e74474..b76c615c2 100644
--- a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE/th5-a7060x6-64pe.config.bcm
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE/th5-a7060x6-64pe.config.bcm
@@ -1169,95 +1169,3 @@ device:
         DEVICE_CONFIG:
             AUTOLOAD_BOARD_SETTINGS: 0
 ...
-## Baseline
----
-device:
-    0:
-        TM_THD_CONFIG:
-            SKIP_BUFFER_RESERVATION: 1
-            THRESHOLD_MODE: LOSSY_AND_LOSSLESS
-...
----
-device:
-    0:
-        TM_ING_THD_HEADROOM_POOL:
-            ?
-                BUFFER_POOL: [[0,1]]
-                TM_HEADROOM_POOL_ID: [[0,3]]
-            :
-                LIMIT_CELLS: 0
-
-        TM_ING_THD_SERVICE_POOL:
-            ?
-                BUFFER_POOL: [[0,1]]
-                TM_ING_SERVICE_POOL_ID: [[0,3]]
-            :
-                SHARED_LIMIT_CELLS: 0
-                SHARED_RESUME_OFFSET_CELLS: 0
-                COLOR_SPECIFIC_LIMITS: 0
-
-        TM_EGR_THD_SERVICE_POOL:
-            ?
-                BUFFER_POOL: [[0,1]]
-                TM_EGR_SERVICE_POOL_ID: [[0,3]]
-            :
-                SHARED_LIMIT_CELLS: 0
-                SHARED_RESUME_LIMIT_CELLS: 0
-                COLOR_SPECIFIC_LIMITS: 0
-                YELLOW_SHARED_LIMIT_CELLS: 0
-                YELLOW_SHARED_RESUME_LIMIT_CELLS: 0
-                RED_SHARED_LIMIT_CELLS: 0
-                RED_SHARED_RESUME_LIMIT_CELLS: 0
-
-        TM_THD_MC_EGR_SERVICE_POOL:
-            ?
-                BUFFER_POOL: [[0,1]]
-                TM_EGR_SERVICE_POOL_ID: [[0,3]]
-            :
-                SHARED_LIMIT_CELLS: 0
-                SHARED_RESUME_LIMIT_CELLS: 0
-                COLOR_SPECIFIC_LIMITS: 0
-                YELLOW_SHARED_LIMIT_CELLS: 0
-                YELLOW_SHARED_RESUME_LIMIT_CELLS: 0
-                RED_SHARED_LIMIT_CELLS: 0
-                RED_SHARED_RESUME_LIMIT_CELLS: 0
-
-        TM_ING_PORT_PRI_GRP:
-            ?
-                PORT_ID: [[1, 2],
-                          [11, 12],
-                          [22, 23],
-                          [33, 34],
-                          [44, 45],
-                          [55, 56],
-                          [66, 67],
-                          [77, 78],
-                          [88, 89],
-                          [99, 100],
-                          [110, 111],
-                          [121, 122],
-                          [132, 133],
-                          [143, 144],
-                          [154, 155],
-                          [165, 166],
-                          [176, 177],
-                          [187, 188],
-                          [198, 199],
-                          [209, 210],
-                          [220, 221],
-                          [231, 232],
-                          [242, 243],
-                          [253, 254],
-                          [264, 265],
-                          [275, 276],
-                          [286, 287],
-                          [297, 298],
-                          [308, 309],
-                          [319, 320],
-                          [330, 331],
-                          [341, 342]]
-                TM_PRI_GRP_ID: 3
-            :
-                PFC: 1
-                LOSSLESS: 1
-...
diff --git a/device/common/profiles/th5/gen/BALANCED/buffers_defaults_t0.j2 b/device/common/profiles/th5/gen/BALANCED/buffers_defaults_t0.j2
index bc3aadd26..daaba0539 100644
--- a/device/common/profiles/th5/gen/BALANCED/buffers_defaults_t0.j2
+++ b/device/common/profiles/th5/gen/BALANCED/buffers_defaults_t0.j2
@@ -2,40 +2,18 @@
 
 {%- include 'buffer_ports.j2' %}
 
+{# Skip BUFFER_POOL, BUFFER_PROFILE #}
 {%- macro generate_buffer_pool_and_profiles() %}
-    "BUFFER_POOL": {
-        "ingress_lossless_pool": {
-            "size": "60000000",
-            "type": "ingress",
-            "mode": "dynamic",
-            "xoff": "22600000"
-        },
-        "egress_lossy_pool": {
-            "size": "41300000",
-            "type": "egress",
-            "mode": "dynamic"
-        },
-        "egress_lossless_pool": {
-            "size": "41300000",
-            "type": "egress",
-            "mode": "static"
-        }
-    },
-    "BUFFER_PROFILE": {
-        "ingress_lossy_profile": {
-            "pool":"ingress_lossless_pool",
-            "size":"0",
-            "dynamic_th":"3"
-        },
-        "egress_lossy_profile": {
-            "pool":"egress_lossy_pool",
-            "size":"4096",
-            "dynamic_th":"3"
-        },
-        "egress_lossless_profile": {
-            "pool":"egress_lossless_pool",
-            "size":"4096",
-            "static_th":"41300000"
-        }
+{%- endmacro %}
+
+{# Skip BUFFER_QUEUE #}
+{%- macro generate_queue_buffers(ports) %}
+    "BUFFER_QUEUE": {
+    }
+{%- endmacro %}
+
+{# Skip BUFFER_PG #}
+{%- macro generate_pg_profils(ports) %}
+    "BUFFER_PG": {
     },
 {%- endmacro %}
diff --git a/device/common/profiles/th5/gen/BALANCED/buffers_defaults_t1.j2 b/device/common/profiles/th5/gen/BALANCED/buffers_defaults_t1.j2
index bc3aadd26..daaba0539 100644
--- a/device/common/profiles/th5/gen/BALANCED/buffers_defaults_t1.j2
+++ b/device/common/profiles/th5/gen/BALANCED/buffers_defaults_t1.j2
@@ -2,40 +2,18 @@
 
 {%- include 'buffer_ports.j2' %}
 
+{# Skip BUFFER_POOL, BUFFER_PROFILE #}
 {%- macro generate_buffer_pool_and_profiles() %}
-    "BUFFER_POOL": {
-        "ingress_lossless_pool": {
-            "size": "60000000",
-            "type": "ingress",
-            "mode": "dynamic",
-            "xoff": "22600000"
-        },
-        "egress_lossy_pool": {
-            "size": "41300000",
-            "type": "egress",
-            "mode": "dynamic"
-        },
-        "egress_lossless_pool": {
-            "size": "41300000",
-            "type": "egress",
-            "mode": "static"
-        }
-    },
-    "BUFFER_PROFILE": {
-        "ingress_lossy_profile": {
-            "pool":"ingress_lossless_pool",
-            "size":"0",
-            "dynamic_th":"3"
-        },
-        "egress_lossy_profile": {
-            "pool":"egress_lossy_pool",
-            "size":"4096",
-            "dynamic_th":"3"
-        },
-        "egress_lossless_profile": {
-            "pool":"egress_lossless_pool",
-            "size":"4096",
-            "static_th":"41300000"
-        }
+{%- endmacro %}
+
+{# Skip BUFFER_QUEUE #}
+{%- macro generate_queue_buffers(ports) %}
+    "BUFFER_QUEUE": {
+    }
+{%- endmacro %}
+
+{# Skip BUFFER_PG #}
+{%- macro generate_pg_profils(ports) %}
+    "BUFFER_PG": {
     },
 {%- endmacro %}
diff --git a/device/common/profiles/th5/gen/BALANCED/pg_profile_lookup.ini b/device/common/profiles/th5/gen/BALANCED/pg_profile_lookup.ini
index 090370bc5..2e2b7e88e 100644
--- a/device/common/profiles/th5/gen/BALANCED/pg_profile_lookup.ini
+++ b/device/common/profiles/th5/gen/BALANCED/pg_profile_lookup.ini
@@ -1,23 +1,2 @@
 # PG lossless profiles.
 # speed cable size    xon  xoff threshold xon_offset
-  10000  5m   1248    2288 35776   0        2288
-  25000  5m   1248    2288 53248   0        2288
-  40000  5m   1248    2288 66560   0        2288
-  50000  5m   1248    2288 90272   0        2288
- 100000  5m   1248    2288 165568  0        2288
- 200000  5m   1248    2288 165568  0        2288
- 400000  5m   1248    2288 165568  0        2288
-  10000  40m  1248    2288 37024   0        2288
-  25000  40m  1248    2288 53248   0        2288
-  40000  40m  1248    2288 71552   0        2288
-  50000  40m  1248    2288 96096   0        2288
- 100000  40m  1248    2288 177632  0        2288
- 200000  40m  1248    2288 177632  0        2288
- 400000  40m  1248    2288 177632  0        2288
-  10000  300m 1248    2288 46176   0        2288
-  25000  300m 1248    2288 79040   0        2288
-  40000  300m 1248    2288 108160  0        2288
-  50000  300m 1248    2288 141856  0        2288
- 100000  300m 1248    2288 268736  0        2288
- 200000  300m 1248    2288 268736  0        2288
- 400000  300m 1248    2288 268736  0        2288

From d9079b3c4ab8ea3ab49e7c923e435ff355c4ecc0 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Thu, 12 Sep 2024 19:01:02 +0800
Subject: [PATCH 0992/1115] [submodule] Update submodule sonic-platform-daemons
 to the latest HEAD automatically (#20238)

#### Why I did it
src/sonic-platform-daemons
```
* f581c06 - (HEAD -> master, origin/master, origin/HEAD) [PMON][psud] Fix the repeated NOTICE log message on Chassis platform (#529) (50 minutes ago) [Marty Y. Lok]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-platform-daemons | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-platform-daemons b/src/sonic-platform-daemons
index b3189e32d..f581c06cd 160000
--- a/src/sonic-platform-daemons
+++ b/src/sonic-platform-daemons
@@ -1 +1 @@
-Subproject commit b3189e32dcc070c09bf575ed7366b6930c50d9ef
+Subproject commit f581c06cd8adeb4b82816ee0fc38fd07b3f9e692

From 46069d144de102363431054d7972ce084b3fbbac Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Thu, 12 Sep 2024 19:01:08 +0800
Subject: [PATCH 0993/1115] [submodule] Update submodule sonic-swss-common to
 the latest HEAD automatically (#20221)

#### Why I did it
src/sonic-swss-common
```
* e271c9b - (HEAD -> master, origin/master, origin/HEAD) [DASH] Add support for ENI Counters (#904) (5 hours ago) [Vivek]
* a76b983 - run DASH vs tests (#913) (29 hours ago) [Lawrence Lee]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-swss-common | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-swss-common b/src/sonic-swss-common
index 636f56502..e271c9bef 160000
--- a/src/sonic-swss-common
+++ b/src/sonic-swss-common
@@ -1 +1 @@
-Subproject commit 636f565025d5b4b235791c71e8c9ca25ce289f47
+Subproject commit e271c9bef5aea4801b01a88a54ec589d81b47a2b

From 9080f811c77fb3b8bf25f0e9eaa57c84a15e38f7 Mon Sep 17 00:00:00 2001
From: Yaqiang Zhu <zyq1512099831@gmail.com>
Date: Fri, 13 Sep 2024 00:08:46 +0800
Subject: [PATCH 0994/1115] [ntp] Add interface existance check for ntp
 configuration (#20205)

Why I did it
NTP configuration wouldn't check existence of configured interface in config_db if it is eth0. This PR is to add this check

Work item tracking
Microsoft ADO (number only): 29385974

How I did it
Add interface existence check in config_db for ntp configuration

How to verify it
Generate NTP configuration and run ntp test in sonic-mgmt with new template
---
 files/image_config/ntp/ntp.conf.j2 | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/files/image_config/ntp/ntp.conf.j2 b/files/image_config/ntp/ntp.conf.j2
index e50822a67..9b8b9264a 100644
--- a/files/image_config/ntp/ntp.conf.j2
+++ b/files/image_config/ntp/ntp.conf.j2
@@ -102,7 +102,7 @@ interface ignore wildcard
     {%- set ns.source_intf = global.src_intf %}
     {%- if ns.source_intf != "" %}
         {%- if ns.source_intf == "eth0" %}
-            {%- set ns.source_intf_ip = 'true' %}
+            {%- set ns.source_intf_ip = check_ip_on_interface(ns.source_intf, MGMT_INTERFACE) %}
         {%- elif ns.source_intf.startswith('Vlan') %}
             {%- set ns.source_intf_ip = check_ip_on_interface(ns.source_intf, VLAN_INTERFACE) %}
         {%- elif ns.source_intf.startswith('Ethernet') %}

From 702dd4e29189c40dd0dd130a644fc67997e70802 Mon Sep 17 00:00:00 2001
From: Longxiang Lyu <35479537+lolyu@users.noreply.github.com>
Date: Fri, 13 Sep 2024 00:43:19 +0800
Subject: [PATCH 0995/1115] [subnet decap] Fix VLAN prefix decap term  (#19229)

Why I did it
If subnet decap is enabled on T0, the subnet decap term should be created for VLAN prefixes.

Work item tracking
Microsoft ADO (number only): 28316828

How I did it
For VLAN prefixes, if subnet decap is enabled, created MP2MP decap terms with subnet type vlan and under the subnet decap tunnels.

Signed-off-by: Longxiang Lyu <lolv@microsoft.com>
---
 dockers/docker-orchagent/ipinip.json.j2       | 26 +++++++++++++++++--
 .../py2/ipinip_subnet_decap_enable.json       | 14 ++++++++++
 .../py3/ipinip_subnet_decap_enable.json       | 14 ++++++++++
 3 files changed, 52 insertions(+), 2 deletions(-)

diff --git a/dockers/docker-orchagent/ipinip.json.j2 b/dockers/docker-orchagent/ipinip.json.j2
index f25f7d9fb..478a19a8f 100644
--- a/dockers/docker-orchagent/ipinip.json.j2
+++ b/dockers/docker-orchagent/ipinip.json.j2
@@ -3,6 +3,8 @@
 {% else %}
 {% set ipv4_addresses = [] %}
 {% set ipv6_addresses = [] %}
+{% set ipv4_vlan_addresses = [] %}
+{% set ipv6_vlan_addresses = [] %}
 {% set ipv4_loopback_addresses = [] %}
 {% set ipv6_loopback_addresses = [] %}
 {% if DEVICE_METADATA['localhost']['sub_role'] == 'FrontEnd' or  DEVICE_METADATA['localhost']['sub_role'] == 'BackEnd'%}
@@ -44,12 +46,14 @@
 {% endfor %}
 {% for (name, prefix) in VLAN_INTERFACE|pfx_filter %}
     {%- if prefix | ipv4 %}
-        {%- set ipv4_addresses = ipv4_addresses.append(prefix) %}
+        {%- set ipv4_vlan_addresses = ipv4_vlan_addresses.append(prefix) %}
     {%- endif %}
     {%- if prefix | ipv6 %}
-        {%- set ipv6_addresses = ipv6_addresses.append(prefix) %}
+        {%- set ipv6_vlan_addresses = ipv6_vlan_addresses.append(prefix) %}
     {%- endif %}
 {% endfor %}
+{%- set ipv4_addresses = ipv4_addresses + ipv4_vlan_addresses %}
+{%- set ipv6_addresses = ipv6_addresses + ipv6_vlan_addresses %}
 [
 {% if ipv4_loopback_addresses %}
 {% if subnet_decap.enable %}
@@ -66,6 +70,15 @@
         },
         "OP": "SET"
     },
+{% for prefix in ipv4_vlan_addresses|sort %}
+    {
+        "TUNNEL_DECAP_TERM_TABLE:IPINIP_SUBNET:{{ prefix | network }}/{{ prefix | prefixlen }}" : {
+            "term_type":"MP2MP",
+            "subnet_type": "vlan"
+        },
+        "OP": "SET"
+    },
+{% endfor %}
 {% endif %}
     {
         "TUNNEL_DECAP_TABLE:IPINIP_TUNNEL" : {
@@ -110,6 +123,15 @@
         },
         "OP": "SET"
     },
+{% for prefix in ipv6_vlan_addresses|sort %}
+    {
+        "TUNNEL_DECAP_TERM_TABLE:IPINIP_SUBNET_V6:{{ prefix | network }}/{{ prefix | prefixlen }}" : {
+            "term_type":"MP2MP",
+            "subnet_type": "vlan"
+        },
+        "OP": "SET"
+    },
+{% endfor %}
 {% endif %}
     {
         "TUNNEL_DECAP_TABLE:IPINIP_V6_TUNNEL" : {
diff --git a/src/sonic-config-engine/tests/sample_output/py2/ipinip_subnet_decap_enable.json b/src/sonic-config-engine/tests/sample_output/py2/ipinip_subnet_decap_enable.json
index ad978b886..abcfa56ea 100644
--- a/src/sonic-config-engine/tests/sample_output/py2/ipinip_subnet_decap_enable.json
+++ b/src/sonic-config-engine/tests/sample_output/py2/ipinip_subnet_decap_enable.json
@@ -8,6 +8,20 @@
         },
         "OP": "SET"
     },
+    {
+        "TUNNEL_DECAP_TERM_TABLE:IPINIP_SUBNET:192.168.0.0/27" : {
+            "term_type":"MP2MP",
+            "subnet_type": "vlan"
+        },
+        "OP": "SET"
+    },
+    {
+        "TUNNEL_DECAP_TERM_TABLE:IPINIP_SUBNET:192.168.200.0/27" : {
+            "term_type":"MP2MP",
+            "subnet_type": "vlan"
+        },
+        "OP": "SET"
+    },
     {
         "TUNNEL_DECAP_TABLE:IPINIP_TUNNEL" : {
             "tunnel_type":"IPINIP",
diff --git a/src/sonic-config-engine/tests/sample_output/py3/ipinip_subnet_decap_enable.json b/src/sonic-config-engine/tests/sample_output/py3/ipinip_subnet_decap_enable.json
index ad978b886..abcfa56ea 100644
--- a/src/sonic-config-engine/tests/sample_output/py3/ipinip_subnet_decap_enable.json
+++ b/src/sonic-config-engine/tests/sample_output/py3/ipinip_subnet_decap_enable.json
@@ -8,6 +8,20 @@
         },
         "OP": "SET"
     },
+    {
+        "TUNNEL_DECAP_TERM_TABLE:IPINIP_SUBNET:192.168.0.0/27" : {
+            "term_type":"MP2MP",
+            "subnet_type": "vlan"
+        },
+        "OP": "SET"
+    },
+    {
+        "TUNNEL_DECAP_TERM_TABLE:IPINIP_SUBNET:192.168.200.0/27" : {
+            "term_type":"MP2MP",
+            "subnet_type": "vlan"
+        },
+        "OP": "SET"
+    },
     {
         "TUNNEL_DECAP_TABLE:IPINIP_TUNNEL" : {
             "tunnel_type":"IPINIP",

From b73d613bf581076192dd0150cb35d6d2de6645b1 Mon Sep 17 00:00:00 2001
From: Yilan Ji <baxia.lan@gmail.com>
Date: Thu, 12 Sep 2024 21:22:02 +0000
Subject: [PATCH 0996/1115] Update ipmitool version to
 ipmitool_1.8.19-4+deb12u1 (#20241)

---
 rules/ipmitool.mk | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/rules/ipmitool.mk b/rules/ipmitool.mk
index aad6fea3a..a3d084524 100644
--- a/rules/ipmitool.mk
+++ b/rules/ipmitool.mk
@@ -1,6 +1,6 @@
 # ipmitool packages
 IPMITOOL_VERSION = 1.8.19
-IPMITOOL_VERSION_SUFFIX = 4
+IPMITOOL_VERSION_SUFFIX = 4+deb12u1
 IPMITOOL_VERSION_FULL = $(IPMITOOL_VERSION)-$(IPMITOOL_VERSION_SUFFIX)
 IPMITOOL = ipmitool_$(IPMITOOL_VERSION_FULL)_$(CONFIGURED_ARCH).deb
 $(IPMITOOL)_SRC_PATH = $(SRC_PATH)/ipmitool

From 64c818b3a3d30d16a0b9e9a03d4447ceca5fa70d Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Fri, 13 Sep 2024 19:01:22 +0800
Subject: [PATCH 0997/1115] [submodule] Update submodule sonic-platform-common
 to the latest HEAD automatically (#20201)
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

#### Why I did it
src/sonic-platform-common
```
* 174bbd4 - (HEAD -> master, origin/master, origin/HEAD) [CMIS] Return the CDB status value for the caller to check the status… (#485) (4 days ago) [Xinyu Lin]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-platform-common | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-platform-common b/src/sonic-platform-common
index ccea99528..174bbd47f 160000
--- a/src/sonic-platform-common
+++ b/src/sonic-platform-common
@@ -1 +1 @@
-Subproject commit ccea99528a5054bd5c172b4a7e0c34f84c103a69
+Subproject commit 174bbd47f0c5a3b8bd181f79b9e700ffa38906f6

From 8afb10332e3a016672e79603d9a916ceaa5df4ff Mon Sep 17 00:00:00 2001
From: Justin Thomas <justin@jdt.io>
Date: Fri, 13 Sep 2024 15:07:22 -0700
Subject: [PATCH 0998/1115] eliminate dmidecode because it requires root
 privileges (#17509)

Why I did it
As described in #16878, every show command on the N3248TE-ON results in an error about dmidecode not being found. This is because that command is called in the get_bios_version function of component.py, which is used in a lot of places (many which should not require privileged access).

The error message prior to this change:

jdt@sonic:~$ show system-health
failed to import plugin show.plugins.cisco-8000: [Errno 2] No such file or directory: 'dmidecode'
Usage: show system-health [OPTIONS] COMMAND [ARGS]...

  Show system-health information

How I did it
On this platform, at least, the BIOS version can be obtained from /sys/class/dmi/id/bios_versionwithout requiring root privileges. I adjusted component.py to use that instead of dmidecode.

How to verify it
With that change in place, you can see that commands no longer complain about dmidecode:
---
 .../n3248te/sonic_platform/component.py                         | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/platform/broadcom/sonic-platform-modules-dell/n3248te/sonic_platform/component.py b/platform/broadcom/sonic-platform-modules-dell/n3248te/sonic_platform/component.py
index c69d5ef34..800f895d0 100644
--- a/platform/broadcom/sonic-platform-modules-dell/n3248te/sonic_platform/component.py
+++ b/platform/broadcom/sonic-platform-modules-dell/n3248te/sonic_platform/component.py
@@ -16,7 +16,7 @@
 except ImportError as e:
     raise ImportError(str(e) + "- required module not found")
 def get_bios_version():
-    return subprocess.check_output(['dmidecode', '-s', 'system-version']).strip().decode()
+    return subprocess.check_output(['cat', '/sys/class/dmi/id/bios_version']).strip().decode()
 
 def get_cpld_version(cpld):
     mjr_ver_path = '/sys/devices/platform/dell-n3248te-cpld.0/' + cpld + '_mjr_ver'

From 87282ed27cdca92bfed7f6cd1c4fc036fa6d4b52 Mon Sep 17 00:00:00 2001
From: Yaqiang Zhu <zyq1512099831@gmail.com>
Date: Sat, 14 Sep 2024 07:08:22 +0800
Subject: [PATCH 0999/1115] [ntp] Add support for ntp to listen ipv4/ipv6
 address depends on server config (#20227)

Why I did it
Switch cannot connect to NTP server with Loopback ipv6 in Loopback ipv6 only scenario.

Work item tracking
Microsoft ADO (number only): 29415265

How I did it
Add support for ntp to listen ipv4/ipv6 address depends on server config

How to verify it
Run ntp test with new template
---
 files/image_config/ntp/ntp.conf.j2 | 12 +++++++++++-
 1 file changed, 11 insertions(+), 1 deletion(-)

diff --git a/files/image_config/ntp/ntp.conf.j2 b/files/image_config/ntp/ntp.conf.j2
index 9b8b9264a..a3b0f0909 100644
--- a/files/image_config/ntp/ntp.conf.j2
+++ b/files/image_config/ntp/ntp.conf.j2
@@ -18,6 +18,7 @@ leapfile /usr/share/zoneinfo/leap-seconds.list
 {# Adding NTP servers. We need to know if we have some pools, to set proper
 config -#}
 {% set ns = namespace(is_pools=false) %}
+{% set ip_ver_ns = namespace(ipv4_server=false, ipv6_server=false) %}
 {% for server in NTP_SERVER if NTP_SERVER[server].admin_state != 'disabled' -%}
     {% set config = NTP_SERVER[server] -%}
     {# Server options -#}
@@ -56,6 +57,13 @@ config -#}
 restrict {{ resolve_as }} kod limited nomodify noquery
 {% endif %}
 
+{% if resolve_as | ipv4 -%}
+    {% set ip_ver_ns.ipv4_server = true %}
+{% elif resolve_as | ipv6 %}
+    {% set ip_ver_ns.ipv6_server = true %}
+{% endif -%}
+
+
 {% endfor -%}
 
 {% set trusted_keys_arr = [] -%}
@@ -125,9 +133,11 @@ interface listen {{ mgmt_prefix | ip }}
 {% endfor %}
 {% elif LOOPBACK_INTERFACE %}
 {% for (name, prefix) in LOOPBACK_INTERFACE|pfx_filter %}
-{% if prefix | ipv4 and name == 'Loopback0' %}
+{% if name == 'Loopback0' %}
+{% if prefix | ipv4 and ip_ver_ns.ipv4_server or prefix | ipv6 and ip_ver_ns.ipv6_server %}
 interface listen {{ prefix | ip }}
 {% endif %}
+{% endif %}
 {% endfor %}
 {% else %}
 interface listen eth0

From 050a2aee51a7880fa3c4668ebc3639a93ad31c5c Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sat, 14 Sep 2024 19:00:47 +0800
Subject: [PATCH 1000/1115] [submodule] Update submodule sonic-swss-common to
 the latest HEAD automatically (#20263)

#### Why I did it
src/sonic-swss-common
```
* 24979b0 - (HEAD -> master, origin/master, origin/HEAD) Add dpu db in schema (#903) (5 hours ago) [Ze Gan]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-swss-common | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-swss-common b/src/sonic-swss-common
index e271c9bef..24979b05f 160000
--- a/src/sonic-swss-common
+++ b/src/sonic-swss-common
@@ -1 +1 @@
-Subproject commit e271c9bef5aea4801b01a88a54ec589d81b47a2b
+Subproject commit 24979b05ff9c2daa18432abcd0dd8518bd5c7e60

From 35e87a69ff6467a0191a81de787ce1cc737b5b5b Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sat, 14 Sep 2024 19:00:56 +0800
Subject: [PATCH 1001/1115] [submodule] Update submodule sonic-utilities to the
 latest HEAD automatically (#20240)

#### Why I did it
src/sonic-utilities
```
* 2cb8cc65 - (HEAD -> master, origin/master, origin/HEAD) [sfputil] Configure the debug loopback mode only on the relevant lanes of the logical port (#3485) (2 days ago) [Xinyu Lin]
* 1aac5e2c - [VoQ chassis] : Script to debug packet drops (#3536) (2 days ago) [Vineet Mittal]
* ad5b0c0a - [Mellanox] Add SPC5 to generic config updater file (#3542) (3 days ago) [noaOrMlnx]
* 8fa076d2 - sonic-installer: enhance next image detection for Aboot (#3433) (3 days ago) [Samuel Angebault]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-utilities | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-utilities b/src/sonic-utilities
index a7897d1fd..2cb8cc65b 160000
--- a/src/sonic-utilities
+++ b/src/sonic-utilities
@@ -1 +1 @@
-Subproject commit a7897d1fd43603272f99dd7daaa08dc28f5bda7a
+Subproject commit 2cb8cc65b6dc57d9613ce271a681743aa4fa0f3c

From fe553ab3fc33eacaf07310f0c3a745d194e67509 Mon Sep 17 00:00:00 2001
From: Oleksandr Ivantsiv <oivantsiv@nvidia.com>
Date: Sun, 15 Sep 2024 15:43:19 -0700
Subject: [PATCH 1002/1115] [Mellanox] Add dpuctl services to support "dark
 mode". (#19931)

- Why I did it
Smart Switch Dark Mode allows disabling of all DPUs, removing any influence the DPU has on the system.

- How I did it
Add the dpuctl.service that runs on system start and shuts down DPUs if needed.

- How to verify it
Compile the image and run it on the Nvidia Smart Switch. Verify that all DPUs are down after the system starts.
---
 .../x86_64-nvidia_sn4280-r0/services.conf     |  2 +-
 .../build_templates/sonic_debian_extension.j2 |  8 +++
 platform/mellanox/smartswitch/dpuctl/dpu.conf |  1 +
 .../smartswitch/dpuctl/dpuctl.service         | 12 ++++
 .../mellanox/smartswitch/dpuctl/dpuctl.sh     | 60 +++++++++++++++++++
 5 files changed, 82 insertions(+), 1 deletion(-)
 create mode 100644 platform/mellanox/smartswitch/dpuctl/dpu.conf
 create mode 100644 platform/mellanox/smartswitch/dpuctl/dpuctl.service
 create mode 100644 platform/mellanox/smartswitch/dpuctl/dpuctl.sh

diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/services.conf b/device/mellanox/x86_64-nvidia_sn4280-r0/services.conf
index 7621d96e7..a9030b090 100644
--- a/device/mellanox/x86_64-nvidia_sn4280-r0/services.conf
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/services.conf
@@ -1 +1 @@
-rshim-manager.service
+dpuctl.service
diff --git a/files/build_templates/sonic_debian_extension.j2 b/files/build_templates/sonic_debian_extension.j2
index 1845f9b8c..e76505f9f 100644
--- a/files/build_templates/sonic_debian_extension.j2
+++ b/files/build_templates/sonic_debian_extension.j2
@@ -1095,6 +1095,14 @@ sudo install -m 755 platform/mellanox/rshim/files/rshim.sh $FILESYSTEM_ROOT/usr/
 # Install rshim services
 sudo cp platform/mellanox/rshim/files/rshim@.service $FILESYSTEM_ROOT_USR_LIB_SYSTEMD_SYSTEM/
 sudo cp platform/mellanox/rshim/files/rshim-manager.service $FILESYSTEM_ROOT_USR_LIB_SYSTEMD_SYSTEM/
+
+# Install dpuctl script and config file
+sudo install -m 755 platform/mellanox/smartswitch/dpuctl/dpuctl.sh $FILESYSTEM_ROOT/usr/bin/dpuctl.sh
+sudo install -m 755 platform/mellanox/smartswitch/dpuctl/dpu.conf $FILESYSTEM_ROOT_ETC/mlnx/
+
+# Install dpuctl services
+sudo cp platform/mellanox/smartswitch/dpuctl/dpuctl.service $FILESYSTEM_ROOT_USR_LIB_SYSTEMD_SYSTEM/
+
 {% endif %}
 
 {% if sonic_asic_platform == "nvidia-bluefield" %}
diff --git a/platform/mellanox/smartswitch/dpuctl/dpu.conf b/platform/mellanox/smartswitch/dpuctl/dpu.conf
new file mode 100644
index 000000000..b0dcbfee9
--- /dev/null
+++ b/platform/mellanox/smartswitch/dpuctl/dpu.conf
@@ -0,0 +1 @@
+DARK_MODE=true
diff --git a/platform/mellanox/smartswitch/dpuctl/dpuctl.service b/platform/mellanox/smartswitch/dpuctl/dpuctl.service
new file mode 100644
index 000000000..e914d3e7a
--- /dev/null
+++ b/platform/mellanox/smartswitch/dpuctl/dpuctl.service
@@ -0,0 +1,12 @@
+[Unit]
+Description=Controle DPUs state
+Requires=hw-management.service
+After=hw-management.service
+
+[Service]
+Type=oneshot
+RemainAfterExit=yes
+ExecStart=/usr/bin/dpuctl.sh start
+
+[Install]
+WantedBy=multi-user.target
diff --git a/platform/mellanox/smartswitch/dpuctl/dpuctl.sh b/platform/mellanox/smartswitch/dpuctl/dpuctl.sh
new file mode 100644
index 000000000..c5393aa1f
--- /dev/null
+++ b/platform/mellanox/smartswitch/dpuctl/dpuctl.sh
@@ -0,0 +1,60 @@
+#!/usr/bin/env bash
+#
+# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+# By default the dark mode is enabled
+DARK_MODE=true
+
+bf3_pci_id="15b3:c2d5"
+dpu2pcie[0]="08:00.0"
+dpu2pcie[1]="07:00.0"
+dpu2pcie[2]="01:00.0"
+dpu2pcie[3]="02:00.0"
+
+if [[ -f /etc/mlnx/dpu.conf ]]; then
+    . /etc/mlnx/dpu.conf
+fi
+
+do_start() {
+    if [[ $DARK_MODE == "true" ]]; then
+        # By default all the DPUs are on. Power off the DPUs when is dark mode is required.
+
+        for dpu_id in ${!dpu2pcie[@]}; do
+            pci_id=$(lspci -n | grep "${dpu2pcie[$dpu_id]}" | awk '{print $3}')
+            if [[ $pci_id == $bf3_pci_id ]]; then
+                dpuctl dpu-power-off dpu${dpu_id} &
+            fi
+        done
+
+        # Wait for all dpuctl processes to finish
+        wait
+    else
+        # Start RSHIM per each DPU to create interfaces
+        systemctl start rshim-manager.service
+    fi
+}
+
+case "$1" in
+    start)
+        do_start
+        ;;
+    *)
+        echo "Error: Invalid argument."
+        echo "Usage: $0 {start}"
+        exit 1
+        ;;
+esac

From 20ea16fa8c8852bb04514e570d1bcf4f638b8308 Mon Sep 17 00:00:00 2001
From: Gagan Punathil Ellath <gpunathilell@nvidia.com>
Date: Sun, 15 Sep 2024 15:44:15 -0700
Subject: [PATCH 1003/1115] [Mellanox] SN4280 Platform pcie changes (#20093)

- Why I did it
The pcie ids of some specific devices is updated for the SN4280 device. Due to this there are some changes to be updated in the platform specific code for mellanox
sensors.conf - This change is due to pci id change for a sensor
rshim..sh - This change is due to the pci id changes for the dpus, which have to be aligned to the platform
pcie.yaml - This change is due to pci id change for the devices
---
 .../x86_64-nvidia_sn4280-r0/pcie.yaml         | 58 +++++++++----------
 .../x86_64-nvidia_sn4280-r0/sensors.conf      |  2 +-
 platform/mellanox/rshim/files/rshim.sh        |  4 +-
 3 files changed, 29 insertions(+), 35 deletions(-)

diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/pcie.yaml b/device/mellanox/x86_64-nvidia_sn4280-r0/pcie.yaml
index c9ef7ee70..99ebce459 100644
--- a/device/mellanox/x86_64-nvidia_sn4280-r0/pcie.yaml
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/pcie.yaml
@@ -51,6 +51,18 @@
   id: '1453'
   name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh)
     PCIe GPP Bridge'
+- bus: '00'
+  dev: '01'
+  fn: '5'
+  id: '1453'
+  name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh)
+    PCIe GPP Bridge'
+- bus: '00'
+  dev: '01'
+  fn: '6'
+  id: '1453'
+  name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh)
+    PCIe GPP Bridge'
 - bus: '00'
   dev: '02'
   fn: '0'
@@ -217,75 +229,57 @@
   id: '1467'
   name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh)
     Data Fabric: Device 18h; Function 7'
-- bus: '01'
-  dev: '00'
-  fn: '0'
-  id: c2d5
-  name: 'DMA controller: Mellanox Technologies MT43244 BlueField-3 SoC Management
-    Interface (rev 01)'
-- bus: '02'
-  dev: '00'
-  fn: '0'
-  id: c2d5
-  name: 'DMA controller: Mellanox Technologies MT43244 BlueField-3 SoC Management
-    Interface (rev 01)'
 - bus: '03'
   dev: '00'
   fn: '0'
   id: '5765'
-  name: 'Non-Volatile memory controller: Device 1f9f:5765 (rev 01)'
-- bus: '04'
+  name: 'Non-Volatile memory controller: Realtek Semiconductor Co., Ltd. RTS5765DL
+    NVMe SSD Controller (DRAM-less) (rev 01)'
+- bus: '06'
   dev: '00'
   fn: '0'
   id: cf70
   name: 'Ethernet controller: Mellanox Technologies Spectrum-3'
-- bus: '05'
-  dev: '00'
-  fn: '0'
-  id: c2d5
-  name: 'DMA controller: Mellanox Technologies MT43244 BlueField-3 SoC Management
-    Interface (rev 01)'
-- bus: '06'
-  dev: '00'
-  fn: '0'
-  id: c2d5
-  name: 'DMA controller: Mellanox Technologies MT43244 BlueField-3 SoC Management
-    Interface (rev 01)'
-- bus: '07'
+- bus: 09
   dev: '00'
   fn: '0'
   id: 145a
   name: 'Non-Essential Instrumentation [1300]: Advanced Micro Devices, Inc. [AMD]
     Zeppelin/Raven/Raven2 PCIe Dummy Function'
-- bus: '07'
+- bus: 09
   dev: '00'
   fn: '2'
   id: '1456'
   name: 'Encryption controller: Advanced Micro Devices, Inc. [AMD] Family 17h (Models
     00h-0fh) Platform Security Processor (PSP) 3.0 Device'
-- bus: '07'
+- bus: 09
   dev: '00'
   fn: '3'
   id: 145f
   name: 'USB controller: Advanced Micro Devices, Inc. [AMD] Zeppelin USB 3.0 xHCI
     Compliant Host Controller'
-- bus: 08
+- bus: 0a
   dev: '00'
   fn: '0'
   id: '1455'
   name: 'Non-Essential Instrumentation [1300]: Advanced Micro Devices, Inc. [AMD]
     Zeppelin/Renoir PCIe Dummy Function'
-- bus: 08
+- bus: 0a
   dev: '00'
   fn: '1'
   id: '1468'
   name: 'Encryption controller: Advanced Micro Devices, Inc. [AMD] Zeppelin Cryptographic
     Coprocessor NTBCCP'
-- bus: 08
+- bus: 0a
   dev: '00'
   fn: '4'
   id: '1458'
   name: 'Ethernet controller: Advanced Micro Devices, Inc. [AMD] XGMAC 10GbE Controller'
+- bus: 0a
+  dev: '00'
+  fn: '5'
+  id: '1458'
+  name: 'Ethernet controller: Advanced Micro Devices, Inc. [AMD] XGMAC 10GbE Controller'
 - bus: '40'
   dev: '00'
   fn: '0'
diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/sensors.conf b/device/mellanox/x86_64-nvidia_sn4280-r0/sensors.conf
index 111e46967..4e607aaa0 100644
--- a/device/mellanox/x86_64-nvidia_sn4280-r0/sensors.conf
+++ b/device/mellanox/x86_64-nvidia_sn4280-r0/sensors.conf
@@ -561,5 +561,5 @@ chip "nvme-pci-*"
     ignore temp2
     ignore temp3
 
-chip "00000400400-mdio-*"
+chip "00000a00400-mdio-*"
    label temp1 "PHY TEMP"
\ No newline at end of file
diff --git a/platform/mellanox/rshim/files/rshim.sh b/platform/mellanox/rshim/files/rshim.sh
index e384ba9c1..9663e39a6 100644
--- a/platform/mellanox/rshim/files/rshim.sh
+++ b/platform/mellanox/rshim/files/rshim.sh
@@ -24,8 +24,8 @@ fi
 dpu_id=$1
 
 declare -A dpu2pcie
-dpu2pcie[0]="06:00.0"
-dpu2pcie[1]="05:00.0"
+dpu2pcie[0]="08:00.0"
+dpu2pcie[1]="07:00.0"
 dpu2pcie[2]="01:00.0"
 dpu2pcie[3]="02:00.0"
 

From 367495d03632f6dd12577ef118cd02c3f1dd96fc Mon Sep 17 00:00:00 2001
From: i-davydenko <41341620+i-davydenko@users.noreply.github.com>
Date: Mon, 16 Sep 2024 03:56:44 +0300
Subject: [PATCH 1004/1115] Dev cli sessions (#17623)

https://github.com/sonic-net/SONiC/pull/1367

Why I did it
Give ability to:
1. configure limit for active login sessions.
2. configure ssh-server / serial console autologout timeout
3. configure sysrq-capabilities (enable / disable)

Work item tracking
Microsoft ADO (number only):

How I did it
Add new service that responsible for serial configuration;
Update existing flows for extended ssh-server configurations in hostcfgd;
Add YANG model to support new configuration.

How to verify it
Which release branch to backport (provide reason below if selected)

Tested branch (Please provide the tested image version)

Description for the changelog
Link to config_db schema for YANG module changes
[ssh_server](https://github.com/sonic-net/sonic-buildimage/blob/master/src/sonic-yang-models/doc/Configuration.md#ssh_server)
[serial_console](https://github.com/sonic-net/sonic-buildimage/blob/master/src/sonic-yang-models/doc/Configuration.md#serial_console)
---
 .../build_templates/sonic_debian_extension.j2 |  7 ++++
 .../cli_sessions/serial-config.service        | 13 +++++++
 .../cli_sessions/serial-config.sh             | 15 ++++++++
 .../cli_sessions/sysrq-sysctl.conf.j2         | 10 +++++
 .../image_config/cli_sessions/tmout-env.sh.j2 | 11 ++++++
 src/sonic-yang-models/doc/Configuration.md    | 25 ++++++++++++-
 src/sonic-yang-models/setup.py                |  3 ++
 .../tests/files/sample_config_db.json         | 11 +++++-
 .../tests/serial_console.json                 | 13 +++++++
 .../yang_model_tests/tests/ssh-server.json    | 10 ++++-
 .../tests_config/serial_console.json          | 31 ++++++++++++++++
 .../tests_config/ssh-server.json              | 20 +++++++++-
 .../yang-models/sonic-serial-console.yang     | 37 +++++++++++++++++++
 .../yang-models/sonic-ssh-server.yang         | 19 ++++++++++
 14 files changed, 220 insertions(+), 5 deletions(-)
 create mode 100644 files/image_config/cli_sessions/serial-config.service
 create mode 100755 files/image_config/cli_sessions/serial-config.sh
 create mode 100644 files/image_config/cli_sessions/sysrq-sysctl.conf.j2
 create mode 100644 files/image_config/cli_sessions/tmout-env.sh.j2
 create mode 100644 src/sonic-yang-models/tests/yang_model_tests/tests/serial_console.json
 create mode 100644 src/sonic-yang-models/tests/yang_model_tests/tests_config/serial_console.json
 create mode 100644 src/sonic-yang-models/yang-models/sonic-serial-console.yang

diff --git a/files/build_templates/sonic_debian_extension.j2 b/files/build_templates/sonic_debian_extension.j2
index e76505f9f..5b5c6a080 100644
--- a/files/build_templates/sonic_debian_extension.j2
+++ b/files/build_templates/sonic_debian_extension.j2
@@ -431,6 +431,13 @@ echo "ntpsec.service" | sudo tee -a $GENERATED_SERVICE_FILE
 # Copy DNS templates
 sudo cp $BUILD_TEMPLATES/dns.j2 $FILESYSTEM_ROOT_USR_SHARE_SONIC_TEMPLATES/
 
+# Copy cli-sessions config files
+sudo cp $IMAGE_CONFIGS/cli_sessions/tmout-env.sh.j2 $FILESYSTEM_ROOT_USR_SHARE_SONIC_TEMPLATES/
+sudo cp $IMAGE_CONFIGS/cli_sessions/sysrq-sysctl.conf.j2 $FILESYSTEM_ROOT_USR_SHARE_SONIC_TEMPLATES/
+sudo cp $IMAGE_CONFIGS/cli_sessions/serial-config.sh $FILESYSTEM_ROOT/usr/bin/
+sudo cp $IMAGE_CONFIGS/cli_sessions/serial-config.service $FILESYSTEM_ROOT_USR_LIB_SYSTEMD_SYSTEM
+echo "serial-config.service" | sudo tee -a $GENERATED_SERVICE_FILE
+
 # Copy warmboot-finalizer files
 sudo LANG=C cp $IMAGE_CONFIGS/warmboot-finalizer/finalize-warmboot.sh $FILESYSTEM_ROOT/usr/local/bin/finalize-warmboot.sh
 sudo LANG=C cp $IMAGE_CONFIGS/warmboot-finalizer/warmboot-finalizer.service $FILESYSTEM_ROOT_USR_LIB_SYSTEMD_SYSTEM
diff --git a/files/image_config/cli_sessions/serial-config.service b/files/image_config/cli_sessions/serial-config.service
new file mode 100644
index 000000000..6211ecaaa
--- /dev/null
+++ b/files/image_config/cli_sessions/serial-config.service
@@ -0,0 +1,13 @@
+[Unit]
+Description=Update serial console config
+Requires=sonic.target
+After=sonic.target
+Before=getty-pre.target
+StartLimitIntervalSec=0
+
+[Service]
+Type=oneshot
+ExecStart=/usr/bin/serial-config.sh
+
+[Install]
+WantedBy=sonic.target
diff --git a/files/image_config/cli_sessions/serial-config.sh b/files/image_config/cli_sessions/serial-config.sh
new file mode 100755
index 000000000..b02d65ffa
--- /dev/null
+++ b/files/image_config/cli_sessions/serial-config.sh
@@ -0,0 +1,15 @@
+#!/bin/bash
+
+# generate conf file for sysrq capabilities.
+sonic-cfggen -d -t /usr/share/sonic/templates/sysrq-sysctl.conf.j2 > /etc/sysctl.d/95-sysrq-sysctl.conf
+
+SYSRQ_CONF=0
+# update sysrq for current boot.
+sysrq_conf=`sonic-db-cli CONFIG_DB HGET "SERIAL_CONSOLE|POLICIES" sysrq_capabilities`
+if [ ${sysrq_conf} = "enabled" ]; then
+        SYSRQ_CONF=1
+fi
+sudo echo $SYSRQ_CONF > /proc/sys/kernel/sysrq
+
+# generate env file for profile.d to set auto-logout timeout for serial consoles.
+sonic-cfggen -d -t /usr/share/sonic/templates/tmout-env.sh.j2 > /etc/profile.d/tmout-env.sh
diff --git a/files/image_config/cli_sessions/sysrq-sysctl.conf.j2 b/files/image_config/cli_sessions/sysrq-sysctl.conf.j2
new file mode 100644
index 000000000..9d7b96660
--- /dev/null
+++ b/files/image_config/cli_sessions/sysrq-sysctl.conf.j2
@@ -0,0 +1,10 @@
+###############################################################################
+# This file was AUTOMATICALLY GENERATED. DO NOT MODIFY.
+# Controlled by serial-config.sh
+###############################################################################
+{% set sysrq = 0 %}
+{% set serial_policies = (SERIAL_CONSOLE | d({})).get('POLICIES', {}) -%}
+{% if serial_policies.sysrq_capabilities == 'enabled' %}
+{% set sysrq = 1 %}
+{% endif %}
+kernel.sysrq={{ sysrq }}
\ No newline at end of file
diff --git a/files/image_config/cli_sessions/tmout-env.sh.j2 b/files/image_config/cli_sessions/tmout-env.sh.j2
new file mode 100644
index 000000000..528504ee7
--- /dev/null
+++ b/files/image_config/cli_sessions/tmout-env.sh.j2
@@ -0,0 +1,11 @@
+{# Default timeout (15 min) #}
+{% set inactivity_timeout_sec = 900 %}
+
+{% set serial_pol = (SERIAL_CONSOLE | d({})).get('POLICIES', {}) -%}
+{% if serial_pol and serial_pol.inactivity_timeout and serial_pol.inactivity_timeout | int >= 0 %}
+{% set inactivity_timeout_sec = serial_pol.inactivity_timeout | int * 60 %}
+{% endif %}
+
+{# apply only for serial tty #}
+tty | grep -q tty &&  \
+export TMOUT={{ inactivity_timeout_sec }}
diff --git a/src/sonic-yang-models/doc/Configuration.md b/src/sonic-yang-models/doc/Configuration.md
index 090bebc39..06ee8d26a 100644
--- a/src/sonic-yang-models/doc/Configuration.md
+++ b/src/sonic-yang-models/doc/Configuration.md
@@ -2694,20 +2694,41 @@ There are 4 classes
 }
 ```
 
+### SERIAL_CONSOLE
+
+In this table collected configuration of the next serial-console attributes:
+-   inactivity_timeout - Inactivity timeout for serial-console session, allowed values: 0-35000 (minutes), default value: 15
+-   sysrq_capabilities - Enabling or disabling SysRq functionality for serial-console session, allowed values: enabled/disabled, default value disabled
+
+```
+{
+    SERIAL_CONSOLE:{
+        "POLICIES":{
+            "inactivity_timeout": 15
+            "sysrq_capabilities": "disabled"
+        }
+    }
+}
+```
+
 ### SSH_SERVER
 
-In this table, we allow configuring ssh server global settings. This will feature includes 3 configurations:
+In this table, we allow configuring ssh server global settings. This will feature includes 5 configurations:
 
 -   authentication_retries - number of login attepmts 1-100
 -   login_timeout - Timeout in seconds for login session for user to connect 1-600
 -   ports - Ssh port numbers - string of port numbers seperated by ','
+-   inactivity_timeout - Inactivity timeout for SSH session, allowed values: 0-35000 (min), default value: 15 (min)
+-   max_sessions - Max number of concurrent logins, allowed values: 0-100 (where 0 means no limit), default value: 0
 ```
 {
     "SSH_SERVER": {
         "POLICIES":{
             "authentication_retries": "6",
             "login_timeout": "120",
-            "ports": "22"
+            "ports": "22",
+            "inactivity_timeout": "15",
+            "max_sessions": "0"
         }
     }
 }
diff --git a/src/sonic-yang-models/setup.py b/src/sonic-yang-models/setup.py
index 6748bb137..420dd36a2 100644
--- a/src/sonic-yang-models/setup.py
+++ b/src/sonic-yang-models/setup.py
@@ -203,6 +203,7 @@ def run(self):
                          './yang-models/sonic-macsec.yang',
                          './yang-models/sonic-bgp-sentinel.yang',
                          './yang-models/sonic-bmp.yang',
+                         './yang-models/sonic-serial-console.yang',
                          './yang-models/sonic-smart-switch.yang',]),
         ('cvlyang-models', ['./cvlyang-models/sonic-acl.yang',
                          './cvlyang-models/sonic-banner.yang',
@@ -245,6 +246,7 @@ def run(self):
                          './cvlyang-models/sonic-nat.yang',
                          './cvlyang-models/sonic-nvgre-tunnel.yang',
                          './cvlyang-models/sonic-pbh.yang',
+                         './cvlyang-models/sonic-ssh-server.yang',
                          './cvlyang-models/sonic-policer.yang',
                          './cvlyang-models/sonic-port.yang',
                          './cvlyang-models/sonic-portchannel.yang',
@@ -280,6 +282,7 @@ def run(self):
                          './cvlyang-models/sonic-system-port.yang',
                          './cvlyang-models/sonic-macsec.yang',
                          './cvlyang-models/sonic-bmp.yang',
+                         './cvlyang-models/sonic-serial-console.yang',
                          './cvlyang-models/sonic-bgp-sentinel.yang']),
     ],
     zip_safe=False,
diff --git a/src/sonic-yang-models/tests/files/sample_config_db.json b/src/sonic-yang-models/tests/files/sample_config_db.json
index b47805d14..8fefa69f8 100644
--- a/src/sonic-yang-models/tests/files/sample_config_db.json
+++ b/src/sonic-yang-models/tests/files/sample_config_db.json
@@ -2448,7 +2448,16 @@
             "POLICIES":{
                 "authentication_retries": "6",
                 "login_timeout": "120",
-                "ports": "22"
+                "ports": "22",
+                "inactivity_timeout": "15",
+                "max_sessions": "0"
+            }
+        },
+
+        "SERIAL_CONSOLE": {
+            "POLICIES":{
+                "inactivity_timeout": "15",
+                "sysrq_capabilities": "disabled"
             }
         },
 
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/serial_console.json b/src/sonic-yang-models/tests/yang_model_tests/tests/serial_console.json
new file mode 100644
index 000000000..76e39bb17
--- /dev/null
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests/serial_console.json
@@ -0,0 +1,13 @@
+{
+    "SERIAL_CONSOLE": {
+        "desc": "SERIAL_CONSOLE configuration in the Config DB table."
+    },
+    "SERIAL_CONSOLE_INVALID_INACTIVITY_TIMEOUT": {
+        "desc": "SERIAL_CONSOLE attribute 'inactivity_timeout' set to invalid value (out of allowed range of [0, 35000] minutes).",
+        "eStr": "does not satisfy the constraint \"0..35000\""
+    },
+    "SERIAL_CONSOLE_INVALID_SYSRQ" : {
+        "desc": "SERIAL_CONSOLE attribute 'sysrq' set to invalid value",
+        "eStr": "Invalid value"
+    }
+}
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/ssh-server.json b/src/sonic-yang-models/tests/yang_model_tests/tests/ssh-server.json
index f3a1c30ef..e7bc0af10 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests/ssh-server.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests/ssh-server.json
@@ -22,5 +22,13 @@
     "SSH_SERVER_INVALID_PORTS_2": {
         "desc": "Configure invalid port value in SSH_SERVER.",
         "eStr": "Invalid port numbers value"
+    },
+    "SSH_SERVER_INVALID_INACTIVITY_TIMEOUT": {
+        "desc": "Configure invalid inactivity_timeout value in SSH_SERVER.",
+        "eStr": "does not satisfy the constraint \"0..35000\""
+    },
+    "SSH_SERVER_INVALID_MAX_SESSIONS": {
+        "desc": "Configure invalid max_sessions value in SSH_SERVER.",
+        "eStr": "does not satisfy the constraint \"0..100\""
     }
-}
\ No newline at end of file
+}
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/serial_console.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/serial_console.json
new file mode 100644
index 000000000..34453ac63
--- /dev/null
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/serial_console.json
@@ -0,0 +1,31 @@
+{
+    "SERIAL_CONSOLE": {
+        "sonic-serial-console:sonic-serial-console": {
+            "sonic-serial-console:SERIAL_CONSOLE": {
+                "POLICIES": {
+                        "inactivity_timeout": 900,
+                        "sysrq_capabilities": "disabled"
+                }
+            }
+        }
+    },
+
+    "SERIAL_CONSOLE_INVALID_INACTIVITY_TIMEOUT": {
+        "sonic-serial-console:sonic-serial-console": {
+            "sonic-serial-console:SERIAL_CONSOLE": {
+                "POLICIES": {
+                        "inactivity_timeout": -500
+                }
+            }
+        }
+    },
+    "SERIAL_CONSOLE_INVALID_SYSRQ" : {
+        "sonic-serial-console:sonic-serial-console": {
+            "sonic-serial-console:SERIAL_CONSOLE": {
+                "POLICIES": {
+                        "sysrq_capabilities": "negative"
+                }
+            }
+        }
+    }
+}
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/ssh-server.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/ssh-server.json
index e0abc1a13..1780bab89 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/ssh-server.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/ssh-server.json
@@ -56,5 +56,23 @@
                 }
             }
         }
+    },
+    "SSH_SERVER_INVALID_INACTIVITY_TIMEOUT": {
+        "sonic-ssh-server:sonic-ssh-server": {
+            "sonic-ssh-server:SSH_SERVER": {
+                "POLICIES":{
+                    "inactivity_timeout": 500000
+                }
+            }
+        }
+    },
+    "SSH_SERVER_INVALID_MAX_SESSIONS": {
+        "sonic-ssh-server:sonic-ssh-server": {
+            "sonic-ssh-server:SSH_SERVER": {
+                "POLICIES":{
+                    "max_sessions": 222
+                }
+            }
+        }
     }
-}
\ No newline at end of file
+}
diff --git a/src/sonic-yang-models/yang-models/sonic-serial-console.yang b/src/sonic-yang-models/yang-models/sonic-serial-console.yang
new file mode 100644
index 000000000..378910e72
--- /dev/null
+++ b/src/sonic-yang-models/yang-models/sonic-serial-console.yang
@@ -0,0 +1,37 @@
+//filename:  sonic-serial-console.yang
+module sonic-serial-console {
+    yang-version 1.1;
+    namespace "http://github.com/Azure/sonic-serial-console";
+    prefix cli-sessions;
+    import sonic-types {
+        prefix stypes;
+    }
+    description "SERIAL_CONSOLE YANG Module for SONiC-based OS";
+    revision 2023-06-07 {
+        description "First Revision";
+    }
+    container sonic-serial-console {
+        container SERIAL_CONSOLE {
+            description "SERIAL_CONSOLE part of config_db.json";
+            container POLICIES {
+                leaf inactivity_timeout {
+                    description "serial-console inactivity-timeout timer value in minutes";
+                    type int32 {
+                        range "0..35000";
+                    }
+                    default 15;
+                }
+
+                leaf sysrq_capabilities {
+                    type stypes:admin_mode;
+                    description "managing SysRq capabilities";
+                    default disabled;
+                }
+        }
+        /* end of container POLICIES */
+        }
+        /* end of container SERIAL_CONSOLE */
+    }
+    /* end of top level container */
+}
+/* end of module sonic-serial-console */
diff --git a/src/sonic-yang-models/yang-models/sonic-ssh-server.yang b/src/sonic-yang-models/yang-models/sonic-ssh-server.yang
index a53fddac5..fb17159ee 100644
--- a/src/sonic-yang-models/yang-models/sonic-ssh-server.yang
+++ b/src/sonic-yang-models/yang-models/sonic-ssh-server.yang
@@ -11,6 +11,11 @@ module sonic-ssh-server {
         description
             "First Revision";
     }
+    
+    revision 2023-06-07 {
+        description
+            "Introduce inactivity timeout and max syslogins options";
+    }
 
     container sonic-ssh-server {
         container SSH_SERVER {
@@ -40,6 +45,20 @@ module sonic-ssh-server {
                         }
                     }
                 }
+                leaf inactivity_timeout {
+                    description "inactivity timeout (in minutes), 0 means no timeout";
+                    default 15;
+                    type uint32 {
+                        range 0..35000;
+                    }
+                }
+                leaf max_sessions {
+                    description "limit of concurrent system logins, 0 means no limit";
+                    default 0;
+                    type uint32 {
+                        range 0..100;
+                    }
+                }
             }/*container policies */
         } /* container SSH_SERVER  */
     }/* container sonic-ssh-server */

From 9b415fd4ece83d9ec4c0f1ca49a57d09575f5600 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Mon, 16 Sep 2024 19:00:54 +0800
Subject: [PATCH 1005/1115] [submodule] Update submodule sonic-utilities to the
 latest HEAD automatically (#20268)

#### Why I did it
src/sonic-utilities
```
* ed624895 - (HEAD -> master, origin/master, origin/HEAD) SONIC CLI for CLI-Sessions feature (#3175) (2 hours ago) [i-davydenko]
* c6637553 - Move from bootctl to mokutil when checking for Secure Boot status (#3486) (3 hours ago) [DavidZagury]
* 5fc0ee6c - [spm]: Clean up timers auto generation logic. (#3523) (3 hours ago) [Nazarii Hnydyn]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-utilities | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-utilities b/src/sonic-utilities
index 2cb8cc65b..ed624895f 160000
--- a/src/sonic-utilities
+++ b/src/sonic-utilities
@@ -1 +1 @@
-Subproject commit 2cb8cc65b6dc57d9613ce271a681743aa4fa0f3c
+Subproject commit ed624895f218b5c81fabc0c4655b317374e246d7

From 69f94421c8e2436c62054dda05413840ff417e85 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Mon, 16 Sep 2024 19:01:03 +0800
Subject: [PATCH 1006/1115] [submodule] Update submodule sonic-host-services to
 the latest HEAD automatically (#20266)

#### Why I did it
src/sonic-host-services
```
* b7f26d4 - (HEAD -> master, origin/master, origin/HEAD) [cli-sessions] Add support for cli-sessions feature (#99) (2 hours ago) [i-davydenko]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-host-services | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-host-services b/src/sonic-host-services
index d2170c9d4..b7f26d4ea 160000
--- a/src/sonic-host-services
+++ b/src/sonic-host-services
@@ -1 +1 @@
-Subproject commit d2170c9d48e59aeeec2058cb9a85e59b7761ad36
+Subproject commit b7f26d4eaf125af4c889a9dbadeebacbeb9e9271

From e40ff63835fceed5c0120f21f9e2ef7072782c41 Mon Sep 17 00:00:00 2001
From: Janet Cui <janet970527@gmail.com>
Date: Tue, 17 Sep 2024 02:58:48 +1000
Subject: [PATCH 1007/1115] Revert "[Arista]: Fix TH5 egress pool creation
 failure with BCM YAML file and SAI update on 07/16 (#19640)" (#20245)

This reverts commit 0344d4a8ba674d224ade7fc61d30997974697f51.
---
 .../BALANCED/buffers_defaults_t0.j2                           | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/BALANCED/buffers_defaults_t0.j2 b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/BALANCED/buffers_defaults_t0.j2
index b1418a68e..f4b26e0f3 100644
--- a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/BALANCED/buffers_defaults_t0.j2
+++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/BALANCED/buffers_defaults_t0.j2
@@ -5,13 +5,13 @@
 {%- macro generate_buffer_pool_and_profiles() %}
     "BUFFER_POOL": {
         "ingress_lossless_pool": {
-            "size": "165603428",
+            "size": "165660324",
             "type": "ingress",
             "mode": "dynamic",
             "xoff": "29520896"
         },
         "egress_lossless_pool": {
-            "size": "165603428",
+            "size": "165660324",
             "type": "egress",
             "mode": "dynamic"
         }

From e4808cffaeb703119670b06ee3ed40429a0d5428 Mon Sep 17 00:00:00 2001
From: Junhua Zhai <junhua.zhai@outlook.com>
Date: Tue, 17 Sep 2024 01:03:47 +0800
Subject: [PATCH 1008/1115] [arista]: Upgrade credo sai package to v0.9.9
 (#20209)

Upgrade credo sai package to the latest v0.9.9 to deliver a key fix from Credo to the community
or the blackhawk phys used on Arista platform 7060dx5_64s.

ADO: 29387310
---
 platform/components/docker-gbsyncd-credo.mk | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/platform/components/docker-gbsyncd-credo.mk b/platform/components/docker-gbsyncd-credo.mk
index e0833068d..c8b14c93f 100644
--- a/platform/components/docker-gbsyncd-credo.mk
+++ b/platform/components/docker-gbsyncd-credo.mk
@@ -1,11 +1,11 @@
 DOCKER_GBSYNCD_PLATFORM_CODE = credo
 
-LIBSAI_CREDO = libsaicredo_0.9.6_amd64.deb
-$(LIBSAI_CREDO)_URL = "https://sonicstorage.blob.core.windows.net/public/credosai/libsaicredo_0.9.6_amd64.deb"
-LIBSAI_CREDO_OWL = libsaicredo-owl_0.9.6_amd64.deb
-$(LIBSAI_CREDO_OWL)_URL = "https://sonicstorage.blob.core.windows.net/public/credosai/libsaicredo-owl_0.9.6_amd64.deb"
-LIBSAI_CREDO_BLACKHAWK = libsaicredo-blackhawk_0.9.6_amd64.deb
-$(LIBSAI_CREDO_BLACKHAWK)_URL = "https://sonicstorage.blob.core.windows.net/public/credosai/libsaicredo-blackhawk_0.9.6_amd64.deb"
+LIBSAI_CREDO = libsaicredo_0.9.9_amd64.deb
+$(LIBSAI_CREDO)_URL = "https://sonicstorage.blob.core.windows.net/public/credosai/$(LIBSAI_CREDO)"
+LIBSAI_CREDO_OWL = libsaicredo-owl_0.9.9_amd64.deb
+$(LIBSAI_CREDO_OWL)_URL = "https://sonicstorage.blob.core.windows.net/public/credosai/$(LIBSAI_CREDO_OWL)"
+LIBSAI_CREDO_BLACKHAWK = libsaicredo-blackhawk_0.9.9_amd64.deb
+$(LIBSAI_CREDO_BLACKHAWK)_URL = "https://sonicstorage.blob.core.windows.net/public/credosai/$(LIBSAI_CREDO_BLACKHAWK)"
 
 ifneq ($($(LIBSAI_CREDO)_URL),)
 include $(PLATFORM_PATH)/../template/docker-gbsyncd-base.mk

From 7167382778cb6e05ce228b75b424cc9f9e01495b Mon Sep 17 00:00:00 2001
From: Kumaresh Perumal <kperumal@microsoft.com>
Date: Mon, 16 Sep 2024 10:24:26 -0700
Subject: [PATCH 1009/1115] Update default Mellanox WRED profile (#20265)

Why I did it
Update default WRED profile values.

Work item tracking
Microsoft ADO (number only): 29444846

How I did it
Update Mellanox qos j2 file to generate WRED profile values.

How to verify it
Redeploy minigraph with the new image and verify the latest WRED profile values.
---
 .../Mellanox-SN4600C-C64/qos.json.j2          | 20 +++++++++++++++++++
 .../qos-mellanox4600c-c64-remap-disabled.json | 12 +++++------
 .../py3/qos-mellanox4600c-c64.json            | 12 +++++------
 ...ellanox4600c-d48c40-t0-remap-disabled.json | 12 +++++------
 .../py3/qos-mellanox4600c-d48c40-t0.json      | 12 +++++------
 5 files changed, 44 insertions(+), 24 deletions(-)

diff --git a/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-C64/qos.json.j2 b/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-C64/qos.json.j2
index b3bc96fb8..8e736843d 100644
--- a/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-C64/qos.json.j2
+++ b/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-C64/qos.json.j2
@@ -277,4 +277,24 @@
 
 {% endif %}
 
+{%- macro generate_wred_profiles() %}
+    "WRED_PROFILE": {
+        "AZURE_LOSSLESS" : {
+            "wred_green_enable"      : "true",
+            "wred_yellow_enable"     : "true",
+            "wred_red_enable"        : "true",
+            "ecn"                    : "ecn_all",
+            "green_max_threshold"    : "10000000",
+            "green_min_threshold"    : "2000000",
+            "yellow_max_threshold"   : "10000000",
+            "yellow_min_threshold"   : "2000000",
+            "red_max_threshold"      : "10000000",
+            "red_min_threshold"      : "2000000",
+            "green_drop_probability" : "5",
+            "yellow_drop_probability": "5",
+            "red_drop_probability"   : "5"
+        }
+    },
+{%- endmacro %}
+
 {%- include 'qos_config.j2' %}
diff --git a/src/sonic-config-engine/tests/sample_output/py3/qos-mellanox4600c-c64-remap-disabled.json b/src/sonic-config-engine/tests/sample_output/py3/qos-mellanox4600c-c64-remap-disabled.json
index 6e15d7207..d3abbd4da 100644
--- a/src/sonic-config-engine/tests/sample_output/py3/qos-mellanox4600c-c64-remap-disabled.json
+++ b/src/sonic-config-engine/tests/sample_output/py3/qos-mellanox4600c-c64-remap-disabled.json
@@ -345,12 +345,12 @@
             "wred_yellow_enable"     : "true",
             "wred_red_enable"        : "true",
             "ecn"                    : "ecn_all",
-            "green_max_threshold"    : "2097152",
-            "green_min_threshold"    : "1048576",
-            "yellow_max_threshold"   : "2097152",
-            "yellow_min_threshold"   : "1048576",
-            "red_max_threshold"      : "2097152",
-            "red_min_threshold"      : "1048576",
+            "green_max_threshold"    : "10000000",
+            "green_min_threshold"    : "2000000",
+            "yellow_max_threshold"   : "10000000",
+            "yellow_min_threshold"   : "2000000",
+            "red_max_threshold"      : "10000000",
+            "red_min_threshold"      : "2000000",
             "green_drop_probability" : "5",
             "yellow_drop_probability": "5",
             "red_drop_probability"   : "5"
diff --git a/src/sonic-config-engine/tests/sample_output/py3/qos-mellanox4600c-c64.json b/src/sonic-config-engine/tests/sample_output/py3/qos-mellanox4600c-c64.json
index df3e773b7..c09f14c4b 100644
--- a/src/sonic-config-engine/tests/sample_output/py3/qos-mellanox4600c-c64.json
+++ b/src/sonic-config-engine/tests/sample_output/py3/qos-mellanox4600c-c64.json
@@ -411,12 +411,12 @@
             "wred_yellow_enable"     : "true",
             "wred_red_enable"        : "true",
             "ecn"                    : "ecn_all",
-            "green_max_threshold"    : "2097152",
-            "green_min_threshold"    : "1048576",
-            "yellow_max_threshold"   : "2097152",
-            "yellow_min_threshold"   : "1048576",
-            "red_max_threshold"      : "2097152",
-            "red_min_threshold"      : "1048576",
+            "green_max_threshold"    : "10000000",
+            "green_min_threshold"    : "2000000",
+            "yellow_max_threshold"   : "10000000",
+            "yellow_min_threshold"   : "2000000",
+            "red_max_threshold"      : "10000000",
+            "red_min_threshold"      : "2000000",
             "green_drop_probability" : "5",
             "yellow_drop_probability": "5",
             "red_drop_probability"   : "5"
diff --git a/src/sonic-config-engine/tests/sample_output/py3/qos-mellanox4600c-d48c40-t0-remap-disabled.json b/src/sonic-config-engine/tests/sample_output/py3/qos-mellanox4600c-d48c40-t0-remap-disabled.json
index a131d36a5..3b205e0a1 100644
--- a/src/sonic-config-engine/tests/sample_output/py3/qos-mellanox4600c-d48c40-t0-remap-disabled.json
+++ b/src/sonic-config-engine/tests/sample_output/py3/qos-mellanox4600c-d48c40-t0-remap-disabled.json
@@ -316,12 +316,12 @@
             "wred_yellow_enable"     : "true",
             "wred_red_enable"        : "true",
             "ecn"                    : "ecn_all",
-            "green_max_threshold"    : "2097152",
-            "green_min_threshold"    : "1048576",
-            "yellow_max_threshold"   : "2097152",
-            "yellow_min_threshold"   : "1048576",
-            "red_max_threshold"      : "2097152",
-            "red_min_threshold"      : "1048576",
+            "green_max_threshold"    : "10000000",
+            "green_min_threshold"    : "2000000",
+            "yellow_max_threshold"   : "10000000",
+            "yellow_min_threshold"   : "2000000",
+            "red_max_threshold"      : "10000000",
+            "red_min_threshold"      : "2000000",
             "green_drop_probability" : "5",
             "yellow_drop_probability": "5",
             "red_drop_probability"   : "5"
diff --git a/src/sonic-config-engine/tests/sample_output/py3/qos-mellanox4600c-d48c40-t0.json b/src/sonic-config-engine/tests/sample_output/py3/qos-mellanox4600c-d48c40-t0.json
index 6c15a0fd9..14cdb37ab 100644
--- a/src/sonic-config-engine/tests/sample_output/py3/qos-mellanox4600c-d48c40-t0.json
+++ b/src/sonic-config-engine/tests/sample_output/py3/qos-mellanox4600c-d48c40-t0.json
@@ -507,12 +507,12 @@
             "wred_yellow_enable"     : "true",
             "wred_red_enable"        : "true",
             "ecn"                    : "ecn_all",
-            "green_max_threshold"    : "2097152",
-            "green_min_threshold"    : "1048576",
-            "yellow_max_threshold"   : "2097152",
-            "yellow_min_threshold"   : "1048576",
-            "red_max_threshold"      : "2097152",
-            "red_min_threshold"      : "1048576",
+            "green_max_threshold"    : "10000000",
+            "green_min_threshold"    : "2000000",
+            "yellow_max_threshold"   : "10000000",
+            "yellow_min_threshold"   : "2000000",
+            "red_max_threshold"      : "10000000",
+            "red_min_threshold"      : "2000000",
             "green_drop_probability" : "5",
             "yellow_drop_probability": "5",
             "red_drop_probability"   : "5"

From 433d039a4ff87b038bde293c1083b9e5a8e570d0 Mon Sep 17 00:00:00 2001
From: Lawrence Lee <lawlee@microsoft.com>
Date: Mon, 16 Sep 2024 17:40:11 -0700
Subject: [PATCH 1010/1115] Update swss and sairedis submodules (#20213)

Update swss and sairedis submodules (#20213)

Signed-off-by: Lawrence Lee <lawlee@microsoft.com>
---
 src/sonic-sairedis | 2 +-
 src/sonic-swss     | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/sonic-sairedis b/src/sonic-sairedis
index 45ff42c3c..dbcba69b0 160000
--- a/src/sonic-sairedis
+++ b/src/sonic-sairedis
@@ -1 +1 @@
-Subproject commit 45ff42c3ca002b4426f6dad1fe8fc132be9dece7
+Subproject commit dbcba69b04e774a442cccda642d9bddbe82b9ee9
diff --git a/src/sonic-swss b/src/sonic-swss
index 42ea859ce..8e81856ef 160000
--- a/src/sonic-swss
+++ b/src/sonic-swss
@@ -1 +1 @@
-Subproject commit 42ea859ce982b21ff40c78c92a5ab21aafb52fad
+Subproject commit 8e81856ef1bf28f86c805f98899adf12d2a7e491

From 0760229dbf64d74568d7f4343ab5727bf808c77a Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Tue, 17 Sep 2024 19:01:08 +0800
Subject: [PATCH 1011/1115] [submodule] Update submodule sonic-sairedis to the
 latest HEAD automatically (#20185)

#### Why I did it
src/sonic-sairedis
```
* 9b9d3306 - (HEAD -> master, origin/master, origin/HEAD) Add support for DASH ENI Counters (#1418) (5 hours ago) [Vivek]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-sairedis | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-sairedis b/src/sonic-sairedis
index dbcba69b0..9b9d33060 160000
--- a/src/sonic-sairedis
+++ b/src/sonic-sairedis
@@ -1 +1 @@
-Subproject commit dbcba69b04e774a442cccda642d9bddbe82b9ee9
+Subproject commit 9b9d3306080e25568dd89261de87beac01738a0a

From c0eebae0bccbbcc90b188773a642542fb670baaa Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Tue, 17 Sep 2024 19:01:12 +0800
Subject: [PATCH 1012/1115] [submodule] Update submodule sonic-swss to the
 latest HEAD automatically (#20159)

#### Why I did it
src/sonic-swss
```
* 20e8b362 - (HEAD -> master, origin/master, origin/HEAD) [dash] Set CA to PA underlay DIP for static encap (#3286) (5 days ago) [Lawrence Lee]
* 60f9dde5 - Add pass pl_sip_encoding to SAI (#3285) (5 days ago) [Lawrence Lee]
* 3943093d - [Mellanox] Update headroom calculation algorithm (#3235) (6 days ago) [Stephen Sun]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-swss | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-swss b/src/sonic-swss
index 8e81856ef..20e8b362a 160000
--- a/src/sonic-swss
+++ b/src/sonic-swss
@@ -1 +1 @@
-Subproject commit 8e81856ef1bf28f86c805f98899adf12d2a7e491
+Subproject commit 20e8b362a5e4fd5361a6f08effddd08d61d5d262

From 2c47e35472b1f9fd5801a884ce7993d873c07afa Mon Sep 17 00:00:00 2001
From: ntt-omw <133925107+ntt-omw@users.noreply.github.com>
Date: Wed, 18 Sep 2024 00:51:00 +0900
Subject: [PATCH 1013/1115] [fpmsyncd] Fpmsyncd Next Hop Table Enhancement
 (#16762)

[fpmsyncd] Fpmsyncd Next Hop Table Enhancement (#16762)

Signed-off-by: nakano.kanji <kanji.nakano@ntt.com>
---
 .../docker-fpm-frr/frr/zebra/zebra.conf.j2    |   6 +
 ...ding-support-for-RTA_NH_ID-attribute.patch | 154 ++++++++++++++++++
 src/libnl3/patch/series                       |   1 +
 .../tests/files/sample_config_db.json         |   3 +-
 .../tests/device_metadata.json                |   5 +-
 .../tests_config/device_metadata.json         |   9 +
 .../yang-models/sonic-device_metadata.yang    |   9 +
 7 files changed, 185 insertions(+), 2 deletions(-)
 create mode 100644 src/libnl3/patch/0003-Adding-support-for-RTA_NH_ID-attribute.patch

diff --git a/dockers/docker-fpm-frr/frr/zebra/zebra.conf.j2 b/dockers/docker-fpm-frr/frr/zebra/zebra.conf.j2
index f5a56c316..673918b3d 100644
--- a/dockers/docker-fpm-frr/frr/zebra/zebra.conf.j2
+++ b/dockers/docker-fpm-frr/frr/zebra/zebra.conf.j2
@@ -7,8 +7,14 @@
 {% endblock banner %}
 !
 {% block fpm %}
+{% if ( ('localhost' in DEVICE_METADATA) and ('nexthop_group' in  DEVICE_METADATA['localhost']) and
+        (DEVICE_METADATA['localhost']['nexthop_group'] == 'enabled') ) %}
+! enable next hop group support
+fpm use-next-hop-groups
+{% else %}
 ! Uses the old known FPM behavior of including next hop information in the route (e.g. RTM_NEWROUTE) messages
 no fpm use-next-hop-groups
+{% endif %}
 !
 fpm address 127.0.0.1
 {% endblock fpm %}
diff --git a/src/libnl3/patch/0003-Adding-support-for-RTA_NH_ID-attribute.patch b/src/libnl3/patch/0003-Adding-support-for-RTA_NH_ID-attribute.patch
new file mode 100644
index 000000000..80f94a2a0
--- /dev/null
+++ b/src/libnl3/patch/0003-Adding-support-for-RTA_NH_ID-attribute.patch
@@ -0,0 +1,154 @@
+From 70e995bd076b5027414e1332a453f366f20c7002 Mon Sep 17 00:00:00 2001
+From: Fernando <fernando.agnes@venkonetworks.com.br>
+Date: Mon, 19 Sep 2022 12:56:46 -0300
+Subject: Adding support for RTA_NH_ID attribute
+
+---
+ include/netlink-private/types.h |  1 +
+ include/netlink/route/route.h   |  2 ++
+ lib/route/route_obj.c           | 23 +++++++++++++++++++++++
+ 3 files changed, 26 insertions(+)
+
+diff --git a/include/netlink-private/types.h b/include/netlink-private/types.h
+index 97af3e5..51e58b1 100644
+--- a/include/netlink-private/types.h
++++ b/include/netlink-private/types.h
+@@ -348,6 +348,7 @@ struct rtnl_route
+ 	uint32_t		rt_metrics[RTAX_MAX];
+ 	uint32_t		rt_metrics_mask;
+ 	uint32_t		rt_nr_nh;
++	uint32_t		rt_nh_id;
+ 	struct nl_addr *	rt_pref_src;
+ 	struct nl_list_head	rt_nexthops;
+ 	struct rtnl_rtcacheinfo	rt_cacheinfo;
+diff --git a/include/netlink/route/route.h b/include/netlink/route/route.h
+index 824dae3..9cfa393 100644
+--- a/include/netlink/route/route.h
++++ b/include/netlink/route/route.h
+@@ -93,6 +93,8 @@ extern int	rtnl_route_set_pref_src(struct rtnl_route *, struct nl_addr *);
+ extern struct nl_addr *rtnl_route_get_pref_src(struct rtnl_route *);
+ extern void	rtnl_route_set_iif(struct rtnl_route *, int);
+ extern int	rtnl_route_get_iif(struct rtnl_route *);
++extern void	rtnl_route_set_nh_id(struct rtnl_route *, uint32_t);
++extern uint32_t	rtnl_route_get_nh_id(struct rtnl_route *);
+ extern int	rtnl_route_get_src_len(struct rtnl_route *);
+ extern void	rtnl_route_set_ttl_propagate(struct rtnl_route *route,
+ 					     uint8_t ttl_prop);
+diff --git a/lib/route/route_obj.c b/lib/route/route_obj.c
+index bacabe8..5d9d4ce 100644
+--- a/lib/route/route_obj.c
++++ b/lib/route/route_obj.c
+@@ -65,6 +65,7 @@
+ #define ROUTE_ATTR_REALMS    0x010000
+ #define ROUTE_ATTR_CACHEINFO 0x020000
+ #define ROUTE_ATTR_TTL_PROPAGATE 0x040000
++#define ROUTE_ATTR_NH_ID     0x080000
+ /** @endcond */
+ 
+ static void route_constructor(struct nl_object *c)
+@@ -252,6 +253,8 @@ static void route_dump_details(struct nl_object *a, struct nl_dump_params *p)
+ 		nl_dump(p, " ttl-propagate %s",
+ 			r->rt_ttl_propagate ? "enabled" : "disabled");
+ 	}
++	if (r->ce_mask & ROUTE_ATTR_NH_ID)
++		nl_dump(p, "nh id %d ", r->rt_nh_id);
+ 
+ 	nl_dump(p, "\n");
+ 
+@@ -391,6 +394,7 @@ static uint64_t route_compare(struct nl_object *_a, struct nl_object *_b,
+ 						    b->rt_pref_src));
+ 	diff |= ROUTE_DIFF(TTL_PROPAGATE,
+ 			   a->rt_ttl_propagate != b->rt_ttl_propagate);
++	diff |= ROUTE_DIFF(NH_ID,		a->rt_nh_id != b->rt_nh_id);
+ 
+ 	if (flags & LOOSE_COMPARISON) {
+ 		nl_list_for_each_entry(nh_b, &b->rt_nexthops, rtnh_list) {
+@@ -589,6 +593,7 @@ static const struct trans_tbl route_attrs[] = {
+ 	__ADD(ROUTE_ATTR_REALMS, realms),
+ 	__ADD(ROUTE_ATTR_CACHEINFO, cacheinfo),
+ 	__ADD(ROUTE_ATTR_TTL_PROPAGATE, ttl_propagate),
++	__ADD(ROUTE_ATTR_NH_ID, nh_id),
+ };
+ 
+ static char *route_attrs2str(int attrs, char *buf, size_t len)
+@@ -862,6 +867,17 @@ int rtnl_route_get_iif(struct rtnl_route *route)
+ 	return route->rt_iif;
+ }
+ 
++void rtnl_route_set_nh_id(struct rtnl_route *route, uint32_t nhid)
++{
++	route->rt_nh_id = nhid;
++	route->ce_mask |= ROUTE_ATTR_NH_ID;
++}
++
++uint32_t rtnl_route_get_nh_id(struct rtnl_route *route)
++{
++	return route->rt_nh_id;
++}
++
+ void rtnl_route_add_nexthop(struct rtnl_route *route, struct rtnl_nexthop *nh)
+ {
+ 	nl_list_add_tail(&nh->rtnh_list, &route->rt_nexthops);
+@@ -1018,6 +1034,7 @@ static struct nla_policy route_policy[RTA_MAX+1] = {
+ 	[RTA_TTL_PROPAGATE] = { .type = NLA_U8 },
+ 	[RTA_ENCAP]	= { .type = NLA_NESTED },
+ 	[RTA_ENCAP_TYPE] = { .type = NLA_U16 },
++	[RTA_NH_ID] = { .type = NLA_U32 },
+ };
+ 
+ static int parse_multipath(struct rtnl_route *route, struct nlattr *attr)
+@@ -1201,6 +1218,9 @@ int rtnl_route_parse(struct nlmsghdr *nlh, struct rtnl_route **result)
+ 		nl_addr_put(addr);
+ 	}
+ 
++	if (tb[RTA_NH_ID])
++		rtnl_route_set_nh_id(route, nla_get_u32(tb[RTA_NH_ID]));
++
+ 	if (tb[RTA_METRICS]) {
+ 		struct nlattr *mtb[RTAX_MAX + 1];
+ 		int i;
+@@ -1404,6 +1424,9 @@ int rtnl_route_build_msg(struct nl_msg *msg, struct rtnl_route *route)
+ 	if (route->ce_mask & ROUTE_ATTR_TTL_PROPAGATE)
+ 		NLA_PUT_U8(msg, RTA_TTL_PROPAGATE, route->rt_ttl_propagate);
+ 
++	if (route->ce_mask & ROUTE_ATTR_NH_ID)
++		NLA_PUT_U32(msg, RTA_NH_ID, route->rt_nh_id);
++
+ 	if (route->rt_nmetrics > 0) {
+ 		uint32_t val;
+ 
+-- 
+2.25.1
+
+diff --git a/include/linux-private/linux/rtnetlink.h b/include/linux-private/linux/rtnetlink.h
+index 8c1d600..82fb56b 100644
+--- a/include/linux-private/linux/rtnetlink.h
++++ b/include/linux-private/linux/rtnetlink.h
+@@ -342,6 +342,7 @@ enum rtattr_type_t {
+ 	RTA_IP_PROTO,
+ 	RTA_SPORT,
+ 	RTA_DPORT,
++	RTA_NH_ID,
+ 	__RTA_MAX
+ };
+ 
+diff --git a/libnl-route-3.sym b/libnl-route-3.sym
+index ce6d714..fb81b7f 100644
+--- a/libnl-route-3.sym
++++ b/libnl-route-3.sym
+@@ -690,6 +690,7 @@ global:
+ 	rtnl_route_get_family;
+ 	rtnl_route_get_flags;
+ 	rtnl_route_get_iif;
++	rtnl_route_get_nh_id;
+ 	rtnl_route_get_metric;
+ 	rtnl_route_get_nexthops;
+ 	rtnl_route_get_nnexthops;
+@@ -732,6 +733,7 @@ global:
+ 	rtnl_route_set_family;
+ 	rtnl_route_set_flags;
+ 	rtnl_route_set_iif;
++	rtnl_route_set_nh_id;
+ 	rtnl_route_set_metric;
+ 	rtnl_route_set_pref_src;
+ 	rtnl_route_set_priority;
diff --git a/src/libnl3/patch/series b/src/libnl3/patch/series
index 4508b1dd6..4c7c2d8e2 100644
--- a/src/libnl3/patch/series
+++ b/src/libnl3/patch/series
@@ -1,2 +1,3 @@
 0001-mpls-encap-accessors.patch
 0002-mpls-remove-nl_addr_valid.patch
+0003-Adding-support-for-RTA_NH_ID-attribute.patch
diff --git a/src/sonic-yang-models/tests/files/sample_config_db.json b/src/sonic-yang-models/tests/files/sample_config_db.json
index 8fefa69f8..d7f640667 100644
--- a/src/sonic-yang-models/tests/files/sample_config_db.json
+++ b/src/sonic-yang-models/tests/files/sample_config_db.json
@@ -377,7 +377,8 @@
                 "timezone": "Europe/Kiev",
                 "bgp_router_id": "8.8.8.8",
                 "chassis_hostname": "str-sonic-chassis-1",
-                "slice_type": "AZNG_Production"
+                "slice_type": "AZNG_Production",
+                "nexthop_group": "disabled"
             }
         },
         "VLAN": {
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/device_metadata.json b/src/sonic-yang-models/tests/yang_model_tests/tests/device_metadata.json
index bd3a44c37..119e5b7ce 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests/device_metadata.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests/device_metadata.json
@@ -178,5 +178,8 @@
     },
     "DEVICE_METADATA_VALID_SLICE_TYPE": {
         "desc": "Verifying valid slice_type configuration."
-    }
+    },
+    "DEVICE_METADATA_VALID_NEXTHOP_GROUP": {
+        "desc": "Verifying nexthop_group configuration."
+     }
 }
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/device_metadata.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/device_metadata.json
index 3d5adcabc..5d0e0201b 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/device_metadata.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/device_metadata.json
@@ -490,5 +490,14 @@
                 }
             }
         }
+    },
+    "DEVICE_METADATA_VALID_NEXTHOP_GROUP": {
+        "sonic-device_metadata:sonic-device_metadata": {
+            "sonic-device_metadata:DEVICE_METADATA": {
+                "sonic-device_metadata:localhost": {
+                    "nexthop_group": "disabled"
+                }
+            }
+        }
     }
 }
diff --git a/src/sonic-yang-models/yang-models/sonic-device_metadata.yang b/src/sonic-yang-models/yang-models/sonic-device_metadata.yang
index 5c5abdeb1..c097da81a 100644
--- a/src/sonic-yang-models/yang-models/sonic-device_metadata.yang
+++ b/src/sonic-yang-models/yang-models/sonic-device_metadata.yang
@@ -265,6 +265,15 @@ module sonic-device_metadata {
                     type string;
                 }
 
+                leaf nexthop_group {
+                    description "Enable or disable Nexthop Group feature. This value only takes effect during boot time.";
+                    type enumeration {
+                        enum enabled;
+                        enum disabled;
+                    }
+                    default disabled;
+                }
+
             }
             /* end of container localhost */
         }

From e0e0c0c1b3c58635bc25fde6a77ca3b0849dfde1 Mon Sep 17 00:00:00 2001
From: Vivek <vivekreddykarri98@gmail.com>
Date: Wed, 18 Sep 2024 18:26:19 -0500
Subject: [PATCH 1014/1115] [DASH] Add support for ENI counters (#19997)

[DASH] Add support for ENI counters

Signed-off-by: Vivek Reddy <vkarri@nvidia.com>
---
 dockers/docker-orchagent/enable_counters.py         |  9 ++++++++-
 .../tests/files/sample_config_db.json               |  4 ++++
 .../yang_model_tests/tests_config/flex_counter.json |  4 ++++
 .../yang-models/sonic-flex_counter.yang             | 13 +++++++++++++
 4 files changed, 29 insertions(+), 1 deletion(-)

diff --git a/dockers/docker-orchagent/enable_counters.py b/dockers/docker-orchagent/enable_counters.py
index 605450389..53b9568cf 100755
--- a/dockers/docker-orchagent/enable_counters.py
+++ b/dockers/docker-orchagent/enable_counters.py
@@ -2,6 +2,7 @@
 
 import time
 from swsscommon import swsscommon
+from sonic_py_common import device_info
 
 # ALPHA defines the size of the window over which we calculate the average value. ALPHA is 2/(N+1) where N is the interval(window size)
 # In this case we configure the window to be 10s. This way if we have a huge 1s spike in traffic,
@@ -40,11 +41,17 @@ def enable_counters():
     db.connect()
     default_enabled_counters = ['PORT', 'RIF', 'QUEUE', 'PFCWD', 'PG_WATERMARK', 'PG_DROP', 
                                 'QUEUE_WATERMARK', 'BUFFER_POOL_WATERMARK', 'PORT_BUFFER_DROP', 'ACL']
-    
+    dpu_counters = ["ENI"]
+
     # Enable those default counters
     for key in default_enabled_counters:
         enable_counter_group(db, key)
 
+    platform_info = device_info.get_platform_info(db)
+    if platform_info.get('switch_type') == 'dpu':
+        for key in dpu_counters:
+            enable_counter_group(db, key)
+
     # Set FLEX_COUNTER_DELAY_STATUS to false for those non-default counters
     keys = db.get_keys('FLEX_COUNTER_TABLE')
     for key in keys:
diff --git a/src/sonic-yang-models/tests/files/sample_config_db.json b/src/sonic-yang-models/tests/files/sample_config_db.json
index d7f640667..e48260714 100644
--- a/src/sonic-yang-models/tests/files/sample_config_db.json
+++ b/src/sonic-yang-models/tests/files/sample_config_db.json
@@ -1447,6 +1447,10 @@
             "TUNNEL": {
                 "FLEX_COUNTER_STATUS": "enable",
                 "POLL_INTERVAL": "10000"
+            },
+            "ENI": {
+                "FLEX_COUNTER_STATUS": "enable",
+                "POLL_INTERVAL": "10000"
             }
         },
         "FLOW_COUNTER_ROUTE_PATTERN": {
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/flex_counter.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/flex_counter.json
index 73da6d21d..60386bdd7 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/flex_counter.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/flex_counter.json
@@ -9,6 +9,10 @@
                 "DEBUG_COUNTER": {
                     "FLEX_COUNTER_STATUS": "enable"
                 },
+                "ENI": {
+                    "FLEX_COUNTER_STATUS": "enable",
+                    "POLL_INTERVAL": 10000
+                },
                 "PFCWD": {
                     "FLEX_COUNTER_STATUS": "enable"
                 },
diff --git a/src/sonic-yang-models/yang-models/sonic-flex_counter.yang b/src/sonic-yang-models/yang-models/sonic-flex_counter.yang
index 90c75eadc..11e09f9f2 100644
--- a/src/sonic-yang-models/yang-models/sonic-flex_counter.yang
+++ b/src/sonic-yang-models/yang-models/sonic-flex_counter.yang
@@ -68,6 +68,19 @@ module sonic-flex_counter {
                 }
             }
 
+            container ENI {
+                /* ENI_STAT_COUNTER_FLEX_COUNTER_GROUP */
+                leaf FLEX_COUNTER_STATUS {
+                    type flex_status;
+                }
+                leaf FLEX_COUNTER_DELAY_STATUS {
+                    type flex_delay_status;
+                }
+                leaf POLL_INTERVAL {
+                    type poll_interval;
+                }
+            }
+
             container PFCWD {
                 /* PFC_WD_FLEX_COUNTER_GROUP */
                 leaf FLEX_COUNTER_STATUS {

From 82861b162244568e1f5b5e3bb29226c55c4d3a13 Mon Sep 17 00:00:00 2001
From: Ashwin Srinivasan <93744978+assrinivasan@users.noreply.github.com>
Date: Thu, 19 Sep 2024 09:12:34 -0700
Subject: [PATCH 1015/1115] Adds blkinfo for use by stormond to instantiate
 UsbUtil object (#20053)

Why I did it
This module is required in the pmon container for Storage Monitoring Daemon (stormond) to instantiate objects of type (UsbUtil)[https://github.com/sonic-net/sonic-platform-common/pull/493].

Work item tracking
Microsoft ADO (number only): 29203991

How I did it
Added config to pmon Dockerfile.j2 to install blkinfo

How to verify it
On an image containing this change, verify following output:

root@str2-7050qx-32s-acs-03:/# pip3 list | grep -i blkinfo
blkinfo                       0.2.0
---
 dockers/docker-platform-monitor/Dockerfile.j2 | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/dockers/docker-platform-monitor/Dockerfile.j2 b/dockers/docker-platform-monitor/Dockerfile.j2
index 1bd0b1b1c..b357133f5 100755
--- a/dockers/docker-platform-monitor/Dockerfile.j2
+++ b/dockers/docker-platform-monitor/Dockerfile.j2
@@ -54,6 +54,10 @@ RUN pip3 install libpci
 # Install psutil for process and system monitoring operations
 RUN pip3 install psutil
 
+# Install blkinfo for block device information gathering operations
+RUN pip3 install blkinfo
+
+
 {% if docker_platform_monitor_debs.strip() -%}
 # Copy locally-built Debian package dependencies
 {{ copy_files("debs/", docker_platform_monitor_debs.split(' '), "/debs/") }}

From b9e70a3f40a8e030f508a1de0de5f4976c40af12 Mon Sep 17 00:00:00 2001
From: Xichen96 <lukelin0907@gmail.com>
Date: Fri, 20 Sep 2024 00:14:00 +0800
Subject: [PATCH 1016/1115] [dhcp_relay] optimize dhcp relay cli (#20094)

Why I did it
Dhcp implementation included inefficient code

How I did it
Using redis.keys with pattern instead of looping over all keys.

How to verify it
Run unit tests.
---
 .../docker-dhcp-relay/cli-plugin-tests/mock_tables.py | 11 +++++++++++
 .../cli/show/plugins/show_dhcp_relay.py               |  6 +++---
 2 files changed, 14 insertions(+), 3 deletions(-)

diff --git a/dockers/docker-dhcp-relay/cli-plugin-tests/mock_tables.py b/dockers/docker-dhcp-relay/cli-plugin-tests/mock_tables.py
index 650d2cf48..e81a041ee 100644
--- a/dockers/docker-dhcp-relay/cli-plugin-tests/mock_tables.py
+++ b/dockers/docker-dhcp-relay/cli-plugin-tests/mock_tables.py
@@ -58,6 +58,16 @@ def connect_SonicV2Connector(self, db_name, retry_on=True):
 def _subscribe_keyspace_notification(self, db_name, client):
     pass
 
+def keys(self, db_name, pattern='*'):
+    """
+    Retrieve all the keys of DB %db_name
+    """
+    client = self.redis_clients[db_name]
+    keys = client.keys(pattern=pattern)
+    if not keys:
+        return []
+    else:
+        return keys
 
 def config_set(self, *args):
     pass
@@ -146,6 +156,7 @@ def keys(self, pattern='*'):
 
 
 swsssdk.interface.DBInterface._subscribe_keyspace_notification = _subscribe_keyspace_notification
+swsssdk.interface.DBInterface.keys = keys
 mockredis.MockRedis.config_set = config_set
 redis.StrictRedis = SwssSyncClient
 SonicV2Connector.connect = connect_SonicV2Connector
diff --git a/dockers/docker-dhcp-relay/cli/show/plugins/show_dhcp_relay.py b/dockers/docker-dhcp-relay/cli/show/plugins/show_dhcp_relay.py
index d9e87b2b3..7a3ea15d5 100644
--- a/dockers/docker-dhcp-relay/cli/show/plugins/show_dhcp_relay.py
+++ b/dockers/docker-dhcp-relay/cli/show/plugins/show_dhcp_relay.py
@@ -45,13 +45,13 @@ def __init__(self):
         self.db = SonicV2Connector(use_unix_socket_path=False)
         self.db.connect(self.db.STATE_DB)
         self.table_name = DHCPv6_COUNTER_TABLE + self.db.get_db_separator(self.db.STATE_DB)
+        self.table_prefix_len = len(self.table_name)
 
     def get_interface(self):
         """ Get all names of all interfaces in DHCPv6_COUNTER_TABLE """
         vlans = []
-        for key in self.db.keys(self.db.STATE_DB):
-            if DHCPv6_COUNTER_TABLE in key:
-                vlans.append(key[21:])
+        for key in self.db.keys(self.db.STATE_DB, self.table_name + "*"):
+            vlans.append(key[self.table_prefix_len:])
         return vlans
 
     def get_dhcp6relay_msg_count(self, interface, msg):

From 856fcc96edbcddcd49731dc2d5a27232e07e6204 Mon Sep 17 00:00:00 2001
From: DavidZagury <32644413+DavidZagury@users.noreply.github.com>
Date: Thu, 19 Sep 2024 21:03:15 +0300
Subject: [PATCH 1017/1115] [Mellanox] Adding SKU Mellanox-SN5600-C256A1
 (#19619)

Why I did it
Support Mellanox-SN5600-C256A1

How I did it
Add relevant files to support the new SKU

How to verify it
Regression test
---
 .../Mellanox-SN5600-C256A1/buffers.json.j2    |   1 +
 .../buffers_defaults_objects.j2               |   1 +
 .../buffers_defaults_t0.j2                    |  47 ++
 .../buffers_defaults_t1.j2                    |  47 ++
 .../buffers_dynamic.json.j2                   |  16 +
 .../create_only_config_db_buffers.json        |   7 +
 .../media_settings.json                       |   1 +
 .../optics_si_settings.json                   |   1 +
 .../pg_profile_lookup.ini                     |  42 ++
 .../pmon_daemon_control.json                  |   5 +
 .../Mellanox-SN5600-C256A1/port_config.ini    | 275 +++++++++
 .../Mellanox-SN5600-C256A1/qos.json.j2        |   1 +
 .../Mellanox-SN5600-C256A1/sai.profile        |   4 +
 .../sai_5600_256x100g.xml                     | 560 ++++++++++++++++++
 14 files changed, 1008 insertions(+)
 create mode 120000 device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/buffers.json.j2
 create mode 120000 device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/buffers_defaults_objects.j2
 create mode 100644 device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/buffers_defaults_t0.j2
 create mode 100644 device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/buffers_defaults_t1.j2
 create mode 100644 device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/buffers_dynamic.json.j2
 create mode 100644 device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/create_only_config_db_buffers.json
 create mode 120000 device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/media_settings.json
 create mode 120000 device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/optics_si_settings.json
 create mode 100644 device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/pg_profile_lookup.ini
 create mode 100644 device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/pmon_daemon_control.json
 create mode 100644 device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/port_config.ini
 create mode 120000 device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/qos.json.j2
 create mode 100644 device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/sai.profile
 create mode 100644 device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/sai_5600_256x100g.xml

diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/buffers.json.j2 b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/buffers.json.j2
new file mode 120000
index 000000000..add8bf8bb
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/buffers.json.j2
@@ -0,0 +1 @@
+../../x86_64-mlnx_msn2700-r0/ACS-MSN2700/buffers.json.j2
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/buffers_defaults_objects.j2 b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/buffers_defaults_objects.j2
new file mode 120000
index 000000000..c01aebb7a
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/buffers_defaults_objects.j2
@@ -0,0 +1 @@
+../../x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D48C8/buffers_defaults_objects.j2
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/buffers_defaults_t0.j2 b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/buffers_defaults_t0.j2
new file mode 100644
index 000000000..664f3a7a6
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/buffers_defaults_t0.j2
@@ -0,0 +1,47 @@
+{#
+    Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+    Apache-2.0
+
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+
+    http://www.apache.org/licenses/LICENSE-2.0
+
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+#}
+{% set default_cable = '40m' %}
+{% set ingress_lossless_pool_size =  '118249472' %}
+{% set ingress_lossless_pool_xoff =  '15728640' %}
+{% set egress_lossless_pool_size =  '158229504' %}
+{% set egress_lossy_pool_size =  '118249472' %}
+
+{% import 'buffers_defaults_objects.j2' as defs with context %}
+
+{%- macro generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) %}
+{{ defs.generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_profile_lists_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_profile_lists(port_names_active, port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_queue_buffers_with_extra_lossless_queues_with_inactive_ports(port_names_active, port_names_extra_queues, port_names_inactive) %}
+{{ defs.generate_queue_buffers_with_extra_lossless_queues(port_names_active, port_names_extra_queues, port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_queue_buffers_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_queue_buffers(port_names_active, port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_pg_profiles_with_extra_lossless_pgs_with_inactive_ports(port_names_active, port_names_extra_pgs, port_names_inactive) %}
+{{ defs.generate_pg_profiles_with_extra_lossless_pgs(port_names_active, port_names_extra_pgs, port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_pg_profiles_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_pg_profiles(port_names_active, port_names_inactive) }}
+{%- endmacro %}
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/buffers_defaults_t1.j2 b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/buffers_defaults_t1.j2
new file mode 100644
index 000000000..6a576b70d
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/buffers_defaults_t1.j2
@@ -0,0 +1,47 @@
+{#
+    Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+    Apache-2.0
+
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+
+    http://www.apache.org/licenses/LICENSE-2.0
+
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+#}
+{% set default_cable = '300m' %}
+{% set ingress_lossless_pool_size =  '137779200' %}
+{% set ingress_lossless_pool_xoff =  '10092544' %}
+{% set egress_lossless_pool_size =  '158229504' %}
+{% set egress_lossy_pool_size =  '137779200' %}
+
+{% import 'buffers_defaults_objects.j2' as defs with context %}
+
+{%- macro generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) %}
+{{ defs.generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_profile_lists_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_profile_lists(port_names_active, port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_queue_buffers_with_extra_lossless_queues_with_inactive_ports(port_names_active, port_names_extra_queues, port_names_inactive) %}
+{{ defs.generate_queue_buffers_with_extra_lossless_queues(port_names_active, port_names_extra_queues, port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_queue_buffers_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_queue_buffers(port_names_active, port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_pg_profiles_with_extra_lossless_pgs_with_inactive_ports(port_names_active, port_names_extra_pgs, port_names_inactive) %}
+{{ defs.generate_pg_profiles_with_extra_lossless_pgs(port_names_active, port_names_extra_pgs, port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_pg_profiles_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_pg_profiles(port_names_active, port_names_inactive) }}
+{%- endmacro %}
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/buffers_dynamic.json.j2 b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/buffers_dynamic.json.j2
new file mode 100644
index 000000000..b2cc958b7
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/buffers_dynamic.json.j2
@@ -0,0 +1,16 @@
+{#
+    Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+    Apache-2.0
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+    http://www.apache.org/licenses/LICENSE-2.0
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+#}
+{%- set default_topo = 't0' %}
+{%- set dynamic_mode = 'true' %}
+{%- include 'buffers_config.j2' %}
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/create_only_config_db_buffers.json b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/create_only_config_db_buffers.json
new file mode 100644
index 000000000..6feb15671
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/create_only_config_db_buffers.json
@@ -0,0 +1,7 @@
+{
+    "DEVICE_METADATA": {
+        "localhost": {
+            "create_only_config_db_buffers": "true"
+        }
+    }
+}
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/media_settings.json b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/media_settings.json
new file mode 120000
index 000000000..2f4f358b3
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/media_settings.json
@@ -0,0 +1 @@
+../Mellanox-SN5600-V256/media_settings.json
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/optics_si_settings.json b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/optics_si_settings.json
new file mode 120000
index 000000000..f0e582a4d
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/optics_si_settings.json
@@ -0,0 +1 @@
+../Mellanox-SN5600-V256/optics_si_settings.json
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/pg_profile_lookup.ini b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/pg_profile_lookup.ini
new file mode 100644
index 000000000..54a46fff3
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/pg_profile_lookup.ini
@@ -0,0 +1,42 @@
+##
+## Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+## Apache-2.0
+##
+## Licensed under the Apache License, Version 2.0 (the "License");
+## you may not use this file except in compliance with the License.
+## You may obtain a copy of the License at
+##
+## http://www.apache.org/licenses/LICENSE-2.0
+##
+## Unless required by applicable law or agreed to in writing, software
+## distributed under the License is distributed on an "AS IS" BASIS,
+## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+## See the License for the specific language governing permissions and
+## limitations under the License.
+##
+#  PG lossless profiles.
+# speed cable  size   xon    xoff   threshold
+  10000    5m 39936   19456  20480         0
+  25000    5m 40960   19456  21504         0
+  40000    5m 44032   19456  24576         0
+  50000    5m 46080   19456  26624         0
+ 100000    5m 63488   19456  44032         0
+ 200000    5m 69632   19456  50176         0
+ 400000    5m 105472  19456  86016         0
+ 800000    5m 134144  38912  95232         0
+  10000   40m 39936   19456  20480         0
+  25000   40m 41984   19456  22528         0
+  40000   40m 45056   19456  25600         0
+  50000   40m 48128   19456  28672         0
+ 100000   40m 68608   19456  49152         0
+ 200000   40m 79872   19456  60416         0
+ 400000   40m 123904  19456  104448        0
+ 800000   40m 171008  38912  132096        0
+  10000  300m 43008   19456  23552         0
+  25000  300m 50176   19456  30720         0
+  40000  300m 59392   19456  39936         0
+  50000  300m 65536   19456  46080         0
+ 100000  300m 103424  19456  83968         0
+ 200000  300m 149504  19456  130048        0
+ 400000  300m 263168  19456  243712        0
+ 800000  300m 450560  38912  411648        0
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/pmon_daemon_control.json b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/pmon_daemon_control.json
new file mode 100644
index 000000000..281b96b71
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/pmon_daemon_control.json
@@ -0,0 +1,5 @@
+{
+    "skip_ledd": true,
+    "skip_fancontrol": true,
+    "skip_xcvrd_cmis_mgr": false
+}
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/port_config.ini b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/port_config.ini
new file mode 100644
index 000000000..ab734780f
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/port_config.ini
@@ -0,0 +1,275 @@
+##
+## Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+## Apache-2.0
+##
+## Licensed under the Apache License, Version 2.0 (the "License");
+## you may not use this file except in compliance with the License.
+## You may obtain a copy of the License at
+##
+## http://www.apache.org/licenses/LICENSE-2.0
+##
+## Unless required by applicable law or agreed to in writing, software
+## distributed under the License is distributed on an "AS IS" BASIS,
+## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+## See the License for the specific language governing permissions and
+## limitations under the License.
+##
+
+# name         lanes                                  alias     index    speed    fec   autoneg subport
+Ethernet0      0                                      etp1a     1        100000   rs    off     1
+Ethernet1      1                                      etp1b     1        100000   rs    off     2
+Ethernet2      2                                      etp1c     1        100000   rs    off     3
+Ethernet3      3                                      etp1d     1        100000   rs    off     4
+Ethernet4      4                                      etp1e     1        100000   rs    off     5
+Ethernet5      5                                      etp1f     1        100000   rs    off     6
+Ethernet6      6                                      etp1g     1        100000   rs    off     7
+Ethernet7      7                                      etp1h     1        100000   rs    off     8
+Ethernet16     16                                     etp3a     3        100000   rs    off     1
+Ethernet17     17                                     etp3b     3        100000   rs    off     2
+Ethernet18     18                                     etp3c     3        100000   rs    off     3
+Ethernet19     19                                     etp3d     3        100000   rs    off     4
+Ethernet20     20                                     etp3e     3        100000   rs    off     5
+Ethernet21     21                                     etp3f     3        100000   rs    off     6
+Ethernet22     22                                     etp3g     3        100000   rs    off     7
+Ethernet23     23                                     etp3h     3        100000   rs    off     8
+Ethernet32     32                                     etp5a     5        100000   rs    off     1
+Ethernet33     33                                     etp5b     5        100000   rs    off     2
+Ethernet34     34                                     etp5c     5        100000   rs    off     3
+Ethernet35     35                                     etp5d     5        100000   rs    off     4
+Ethernet36     36                                     etp5e     5        100000   rs    off     5
+Ethernet37     37                                     etp5f     5        100000   rs    off     6
+Ethernet38     38                                     etp5g     5        100000   rs    off     7
+Ethernet39     39                                     etp5h     5        100000   rs    off     8
+Ethernet48     48                                     etp7a     7        100000   rs    off     1
+Ethernet49     49                                     etp7b     7        100000   rs    off     2
+Ethernet50     50                                     etp7c     7        100000   rs    off     3
+Ethernet51     51                                     etp7d     7        100000   rs    off     4
+Ethernet52     52                                     etp7e     7        100000   rs    off     5
+Ethernet53     53                                     etp7f     7        100000   rs    off     6
+Ethernet54     54                                     etp7g     7        100000   rs    off     7
+Ethernet55     55                                     etp7h     7        100000   rs    off     8
+Ethernet64     64                                     etp9a     9        100000   rs    off     1
+Ethernet65     65                                     etp9b     9        100000   rs    off     2
+Ethernet66     66                                     etp9c     9        100000   rs    off     3
+Ethernet67     67                                     etp9d     9        100000   rs    off     4
+Ethernet68     68                                     etp9e     9        100000   rs    off     5
+Ethernet69     69                                     etp9f     9        100000   rs    off     6
+Ethernet70     70                                     etp9g     9        100000   rs    off     7
+Ethernet71     71                                     etp9h     9        100000   rs    off     8
+Ethernet80     80                                     etp11a    11       100000   rs    off     1
+Ethernet81     81                                     etp11b    11       100000   rs    off     2
+Ethernet82     82                                     etp11c    11       100000   rs    off     3
+Ethernet83     83                                     etp11d    11       100000   rs    off     4
+Ethernet84     84                                     etp11e    11       100000   rs    off     5
+Ethernet85     85                                     etp11f    11       100000   rs    off     6
+Ethernet86     86                                     etp11g    11       100000   rs    off     7
+Ethernet87     87                                     etp11h    11       100000   rs    off     8
+Ethernet96     96                                     etp13a    13       100000   rs    off     1
+Ethernet97     97                                     etp13b    13       100000   rs    off     2
+Ethernet98     98                                     etp13c    13       100000   rs    off     3
+Ethernet99     99                                     etp13d    13       100000   rs    off     4
+Ethernet100    100                                    etp13e    13       100000   rs    off     5
+Ethernet101    101                                    etp13f    13       100000   rs    off     6
+Ethernet102    102                                    etp13g    13       100000   rs    off     7
+Ethernet103    103                                    etp13h    13       100000   rs    off     8
+Ethernet112    112                                    etp15a    15       100000   rs    off     1
+Ethernet113    113                                    etp15b    15       100000   rs    off     2
+Ethernet114    114                                    etp15c    15       100000   rs    off     3
+Ethernet115    115                                    etp15d    15       100000   rs    off     4
+Ethernet116    116                                    etp15e    15       100000   rs    off     5
+Ethernet117    117                                    etp15f    15       100000   rs    off     6
+Ethernet118    118                                    etp15g    15       100000   rs    off     7
+Ethernet119    119                                    etp15h    15       100000   rs    off     8
+Ethernet128    128                                    etp17a    17       100000   rs    off     1
+Ethernet129    129                                    etp17b    17       100000   rs    off     2
+Ethernet130    130                                    etp17c    17       100000   rs    off     3
+Ethernet131    131                                    etp17d    17       100000   rs    off     4
+Ethernet132    132                                    etp17e    17       100000   rs    off     5
+Ethernet133    133                                    etp17f    17       100000   rs    off     6
+Ethernet134    134                                    etp17g    17       100000   rs    off     7
+Ethernet135    135                                    etp17h    17       100000   rs    off     8
+Ethernet144    144                                    etp19a    19       100000   rs    off     1
+Ethernet145    145                                    etp19b    19       100000   rs    off     2
+Ethernet146    146                                    etp19c    19       100000   rs    off     3
+Ethernet147    147                                    etp19d    19       100000   rs    off     4
+Ethernet148    148                                    etp19e    19       100000   rs    off     5
+Ethernet149    149                                    etp19f    19       100000   rs    off     6
+Ethernet150    150                                    etp19g    19       100000   rs    off     7
+Ethernet151    151                                    etp19h    19       100000   rs    off     8
+Ethernet160    160                                    etp21a    21       100000   rs    off     1
+Ethernet161    161                                    etp21b    21       100000   rs    off     2
+Ethernet162    162                                    etp21c    21       100000   rs    off     3
+Ethernet163    163                                    etp21d    21       100000   rs    off     4
+Ethernet164    164                                    etp21e    21       100000   rs    off     5
+Ethernet165    165                                    etp21f    21       100000   rs    off     6
+Ethernet166    166                                    etp21g    21       100000   rs    off     7
+Ethernet167    167                                    etp21h    21       100000   rs    off     8
+Ethernet176    176                                    etp23a    23       100000   rs    off     1
+Ethernet177    177                                    etp23b    23       100000   rs    off     2
+Ethernet178    178                                    etp23c    23       100000   rs    off     3
+Ethernet179    179                                    etp23d    23       100000   rs    off     4
+Ethernet180    180                                    etp23e    23       100000   rs    off     5
+Ethernet181    181                                    etp23f    23       100000   rs    off     6
+Ethernet182    182                                    etp23g    23       100000   rs    off     7
+Ethernet183    183                                    etp23h    23       100000   rs    off     8
+Ethernet192    192                                    etp25a    25       100000   rs    off     1
+Ethernet193    193                                    etp25b    25       100000   rs    off     2
+Ethernet194    194                                    etp25c    25       100000   rs    off     3
+Ethernet195    195                                    etp25d    25       100000   rs    off     4
+Ethernet196    196                                    etp25e    25       100000   rs    off     5
+Ethernet197    197                                    etp25f    25       100000   rs    off     6
+Ethernet198    198                                    etp25g    25       100000   rs    off     7
+Ethernet199    199                                    etp25h    25       100000   rs    off     8
+Ethernet208    208                                    etp27a    27       100000   rs    off     1
+Ethernet209    209                                    etp27b    27       100000   rs    off     2
+Ethernet210    210                                    etp27c    27       100000   rs    off     3
+Ethernet211    211                                    etp27d    27       100000   rs    off     4
+Ethernet212    212                                    etp27e    27       100000   rs    off     5
+Ethernet213    213                                    etp27f    27       100000   rs    off     6
+Ethernet214    214                                    etp27g    27       100000   rs    off     7
+Ethernet215    215                                    etp27h    27       100000   rs    off     8
+Ethernet224    224                                    etp29a    29       100000   rs    off     1
+Ethernet225    225                                    etp29b    29       100000   rs    off     2
+Ethernet226    226                                    etp29c    29       100000   rs    off     3
+Ethernet227    227                                    etp29d    29       100000   rs    off     4
+Ethernet228    228                                    etp29e    29       100000   rs    off     5
+Ethernet229    229                                    etp29f    29       100000   rs    off     6
+Ethernet230    230                                    etp29g    29       100000   rs    off     7
+Ethernet231    231                                    etp29h    29       100000   rs    off     8
+Ethernet240    240                                    etp31a    31       100000   rs    off     1
+Ethernet241    241                                    etp31b    31       100000   rs    off     2
+Ethernet242    242                                    etp31c    31       100000   rs    off     3
+Ethernet243    243                                    etp31d    31       100000   rs    off     4
+Ethernet244    244                                    etp31e    31       100000   rs    off     5
+Ethernet245    245                                    etp31f    31       100000   rs    off     6
+Ethernet246    246                                    etp31g    31       100000   rs    off     7
+Ethernet247    247                                    etp31h    31       100000   rs    off     8
+Ethernet256    256                                    etp33a    33       100000   rs    off     1
+Ethernet257    257                                    etp33b    33       100000   rs    off     2
+Ethernet258    258                                    etp33c    33       100000   rs    off     3
+Ethernet259    259                                    etp33d    33       100000   rs    off     4
+Ethernet260    260                                    etp33e    33       100000   rs    off     5
+Ethernet261    261                                    etp33f    33       100000   rs    off     6
+Ethernet262    262                                    etp33g    33       100000   rs    off     7
+Ethernet263    263                                    etp33h    33       100000   rs    off     8
+Ethernet272    272                                    etp35a    35       100000   rs    off     1
+Ethernet273    273                                    etp35b    35       100000   rs    off     2
+Ethernet274    274                                    etp35c    35       100000   rs    off     3
+Ethernet275    275                                    etp35d    35       100000   rs    off     4
+Ethernet276    276                                    etp35e    35       100000   rs    off     5
+Ethernet277    277                                    etp35f    35       100000   rs    off     6
+Ethernet278    278                                    etp35g    35       100000   rs    off     7
+Ethernet279    279                                    etp35h    35       100000   rs    off     8
+Ethernet288    288                                    etp37a    37       100000   rs    off     1
+Ethernet289    289                                    etp37b    37       100000   rs    off     2
+Ethernet290    290                                    etp37c    37       100000   rs    off     3
+Ethernet291    291                                    etp37d    37       100000   rs    off     4
+Ethernet292    292                                    etp37e    37       100000   rs    off     5
+Ethernet293    293                                    etp37f    37       100000   rs    off     6
+Ethernet294    294                                    etp37g    37       100000   rs    off     7
+Ethernet295    295                                    etp37h    37       100000   rs    off     8
+Ethernet304    304                                    etp39a    39       100000   rs    off     1
+Ethernet305    305                                    etp39b    39       100000   rs    off     2
+Ethernet306    306                                    etp39c    39       100000   rs    off     3
+Ethernet307    307                                    etp39d    39       100000   rs    off     4
+Ethernet308    308                                    etp39e    39       100000   rs    off     5
+Ethernet309    309                                    etp39f    39       100000   rs    off     6
+Ethernet310    310                                    etp39g    39       100000   rs    off     7
+Ethernet311    311                                    etp39h    39       100000   rs    off     8
+Ethernet320    320                                    etp41a    41       100000   rs    off     1
+Ethernet321    321                                    etp41b    41       100000   rs    off     2
+Ethernet322    322                                    etp41c    41       100000   rs    off     3
+Ethernet323    323                                    etp41d    41       100000   rs    off     4
+Ethernet324    324                                    etp41e    41       100000   rs    off     5
+Ethernet325    325                                    etp41f    41       100000   rs    off     6
+Ethernet326    326                                    etp41g    41       100000   rs    off     7
+Ethernet327    327                                    etp41h    41       100000   rs    off     8
+Ethernet336    336                                    etp43a    43       100000   rs    off     1
+Ethernet337    337                                    etp43b    43       100000   rs    off     2
+Ethernet338    338                                    etp43c    43       100000   rs    off     3
+Ethernet339    339                                    etp43d    43       100000   rs    off     4
+Ethernet340    340                                    etp43e    43       100000   rs    off     5
+Ethernet341    341                                    etp43f    43       100000   rs    off     6
+Ethernet342    342                                    etp43g    43       100000   rs    off     7
+Ethernet343    343                                    etp43h    43       100000   rs    off     8
+Ethernet352    352                                    etp45a    45       100000   rs    off     1
+Ethernet353    353                                    etp45b    45       100000   rs    off     2
+Ethernet354    354                                    etp45c    45       100000   rs    off     3
+Ethernet355    355                                    etp45d    45       100000   rs    off     4
+Ethernet356    356                                    etp45e    45       100000   rs    off     5
+Ethernet357    357                                    etp45f    45       100000   rs    off     6
+Ethernet358    358                                    etp45g    45       100000   rs    off     7
+Ethernet359    359                                    etp45h    45       100000   rs    off     8
+Ethernet368    368                                    etp47a    47       100000   rs    off     1
+Ethernet369    369                                    etp47b    47       100000   rs    off     2
+Ethernet370    370                                    etp47c    47       100000   rs    off     3
+Ethernet371    371                                    etp47d    47       100000   rs    off     4
+Ethernet372    372                                    etp47e    47       100000   rs    off     5
+Ethernet373    373                                    etp47f    47       100000   rs    off     6
+Ethernet374    374                                    etp47g    47       100000   rs    off     7
+Ethernet375    375                                    etp47h    47       100000   rs    off     8
+Ethernet384    384                                    etp49a    49       100000   rs    off     1
+Ethernet385    385                                    etp49b    49       100000   rs    off     2
+Ethernet386    386                                    etp49c    49       100000   rs    off     3
+Ethernet387    387                                    etp49d    49       100000   rs    off     4
+Ethernet388    388                                    etp49e    49       100000   rs    off     5
+Ethernet389    389                                    etp49f    49       100000   rs    off     6
+Ethernet390    390                                    etp49g    49       100000   rs    off     7
+Ethernet391    391                                    etp49h    49       100000   rs    off     8
+Ethernet400    400                                    etp51a    51       100000   rs    off     1
+Ethernet401    401                                    etp51b    51       100000   rs    off     2
+Ethernet402    402                                    etp51c    51       100000   rs    off     3
+Ethernet403    403                                    etp51d    51       100000   rs    off     4
+Ethernet404    404                                    etp51e    51       100000   rs    off     5
+Ethernet405    405                                    etp51f    51       100000   rs    off     6
+Ethernet406    406                                    etp51g    51       100000   rs    off     7
+Ethernet407    407                                    etp51h    51       100000   rs    off     8
+Ethernet416    416                                    etp53a    53       100000   rs    off     1
+Ethernet417    417                                    etp53b    53       100000   rs    off     2
+Ethernet418    418                                    etp53c    53       100000   rs    off     3
+Ethernet419    419                                    etp53d    53       100000   rs    off     4
+Ethernet420    420                                    etp53e    53       100000   rs    off     5
+Ethernet421    421                                    etp53f    53       100000   rs    off     6
+Ethernet422    422                                    etp53g    53       100000   rs    off     7
+Ethernet423    423                                    etp53h    53       100000   rs    off     8
+Ethernet432    432                                    etp55a    55       100000   rs    off     1
+Ethernet433    433                                    etp55b    55       100000   rs    off     2
+Ethernet434    434                                    etp55c    55       100000   rs    off     3
+Ethernet435    435                                    etp55d    55       100000   rs    off     4
+Ethernet436    436                                    etp55e    55       100000   rs    off     5
+Ethernet437    437                                    etp55f    55       100000   rs    off     6
+Ethernet438    438                                    etp55g    55       100000   rs    off     7
+Ethernet439    439                                    etp55h    55       100000   rs    off     8
+Ethernet448    448                                    etp57a    57       100000   rs    off     1
+Ethernet449    449                                    etp57b    57       100000   rs    off     2
+Ethernet450    450                                    etp57c    57       100000   rs    off     3
+Ethernet451    451                                    etp57d    57       100000   rs    off     4
+Ethernet452    452                                    etp57e    57       100000   rs    off     5
+Ethernet453    453                                    etp57f    57       100000   rs    off     6
+Ethernet454    454                                    etp57g    57       100000   rs    off     7
+Ethernet455    455                                    etp57h    57       100000   rs    off     8
+Ethernet464    464                                    etp59a    59       100000   rs    off     1
+Ethernet465    465                                    etp59b    59       100000   rs    off     2
+Ethernet466    466                                    etp59c    59       100000   rs    off     3
+Ethernet467    467                                    etp59d    59       100000   rs    off     4
+Ethernet468    468                                    etp59e    59       100000   rs    off     5
+Ethernet469    469                                    etp59f    59       100000   rs    off     6
+Ethernet470    470                                    etp59g    59       100000   rs    off     7
+Ethernet471    471                                    etp59h    59       100000   rs    off     8
+Ethernet480    480                                    etp61a    61       100000   rs    off     1
+Ethernet481    481                                    etp61b    61       100000   rs    off     2
+Ethernet482    482                                    etp61c    61       100000   rs    off     3
+Ethernet483    483                                    etp61d    61       100000   rs    off     4
+Ethernet484    484                                    etp61e    61       100000   rs    off     5
+Ethernet485    485                                    etp61f    61       100000   rs    off     6
+Ethernet486    486                                    etp61g    61       100000   rs    off     7
+Ethernet487    487                                    etp61h    61       100000   rs    off     8
+Ethernet496    496                                    etp63a    63       100000   rs    off     1
+Ethernet497    497                                    etp63b    63       100000   rs    off     2
+Ethernet498    498                                    etp63c    63       100000   rs    off     3
+Ethernet499    499                                    etp63d    63       100000   rs    off     4
+Ethernet500    500                                    etp63e    63       100000   rs    off     5
+Ethernet501    501                                    etp63f    63       100000   rs    off     6
+Ethernet502    502                                    etp63g    63       100000   rs    off     7
+Ethernet503    503                                    etp63h    63       100000   rs    off     8
+Ethernet512    512                                    etp65     65        25000   rs
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/qos.json.j2 b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/qos.json.j2
new file mode 120000
index 000000000..eccf286dc
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/qos.json.j2
@@ -0,0 +1 @@
+../../x86_64-mlnx_msn2700-r0/ACS-MSN2700/qos.json.j2
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/sai.profile b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/sai.profile
new file mode 100644
index 000000000..271c8cf70
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/sai.profile
@@ -0,0 +1,4 @@
+SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_5600_256x100g.xml
+SAI_INDEPENDENT_MODULE_MODE=1
+SAI_DEFAULT_SWITCHING_MODE_STORE_FORWARD=1
+SAI_NOT_DROP_SIP_DIP_LINK_LOCAL=1
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/sai_5600_256x100g.xml b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/sai_5600_256x100g.xml
new file mode 100644
index 000000000..f45f28da3
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/sai_5600_256x100g.xml
@@ -0,0 +1,560 @@
+<?xml version="1.0"?>
+<!--
+  Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+  Apache-2.0
+
+  Licensed under the Apache License, Version 2.0 (the "License");
+  you may not use this file except in compliance with the License.
+  You may obtain a copy of the License at
+
+  http://www.apache.org/licenses/LICENSE-2.0
+
+  Unless required by applicable law or agreed to in writing, software
+  distributed under the License is distributed on an "AS IS" BASIS,
+  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+  See the License for the specific language governing permissions and
+  limitations under the License.
+-->
+<root>
+    <platform_info type="5600">
+
+        <!-- Device MAC address  -->
+        <device-mac-address>00:02:03:04:05:00</device-mac-address>
+
+        <!-- ISSU enabled -->
+        <issu-enabled>0</issu-enabled>
+
+        <!-- Number of ports in the following port list -->
+        <number-of-physical-ports>65</number-of-physical-ports>
+
+        <!-- Global port late create -->
+        <late-create-all-ports>1</late-create-all-ports>
+
+        <!-- List of ports in the device -->
+        <ports-list>
+            <port-info>
+                <local-port>1</local-port>
+                <width>8</width>
+                <module>34</module>
+
+                <!-- 0 none, 1=2, 2=4, 3=2,4 -->
+                <breakout-modes>3</breakout-modes>
+
+                <!-- (BITMASK) 2 - 1Gb , 16 - 10Gb , 32 - 40Gb , 384 - 50Gb , 4096 - 100Gb , 4096 - 200Gb, 32768 - 400G, 262144 - 800G -->
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>5</local-port>
+                <width>8</width>
+                <module>35</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>9</local-port>
+                <width>8</width>
+                <module>33</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>13</local-port>
+                <width>8</width>
+                <module>32</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>17</local-port>
+                <width>8</width>
+                <module>38</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>21</local-port>
+                <width>8</width>
+                <module>39</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>25</local-port>
+                <width>8</width>
+                <module>37</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>29</local-port>
+                <width>8</width>
+                <module>36</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>33</local-port>
+                <width>8</width>
+                <module>42</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>37</local-port>
+                <width>8</width>
+                <module>43</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>41</local-port>
+                <width>8</width>
+                <module>41</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>45</local-port>
+                <width>8</width>
+                <module>40</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>49</local-port>
+                <width>8</width>
+                <module>46</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>53</local-port>
+                <width>8</width>
+                <module>47</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>57</local-port>
+                <width>8</width>
+                <module>45</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>61</local-port>
+                <width>8</width>
+                <module>44</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>65</local-port>
+                <width>8</width>
+                <module>51</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>69</local-port>
+                <width>8</width>
+                <module>50</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>73</local-port>
+                <width>8</width>
+                <module>48</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>77</local-port>
+                <width>8</width>
+                <module>49</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>81</local-port>
+                <width>8</width>
+                <module>55</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>85</local-port>
+                <width>8</width>
+                <module>54</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>89</local-port>
+                <width>8</width>
+                <module>52</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>93</local-port>
+                <width>8</width>
+                <module>53</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>97</local-port>
+                <width>8</width>
+                <module>59</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>101</local-port>
+                <width>8</width>
+                <module>58</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>105</local-port>
+                <width>8</width>
+                <module>56</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>109</local-port>
+                <width>8</width>
+                <module>57</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>113</local-port>
+                <width>8</width>
+                <module>63</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>117</local-port>
+                <width>8</width>
+                <module>62</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>121</local-port>
+                <width>8</width>
+                <module>60</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>125</local-port>
+                <width>8</width>
+                <module>61</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>129</local-port>
+                <width>8</width>
+                <module>29</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>133</local-port>
+                <width>8</width>
+                <module>28</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>137</local-port>
+                <width>8</width>
+                <module>30</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>141</local-port>
+                <width>8</width>
+                <module>31</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>145</local-port>
+                <width>8</width>
+                <module>25</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>149</local-port>
+                <width>8</width>
+                <module>24</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>153</local-port>
+                <width>8</width>
+                <module>26</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>157</local-port>
+                <width>8</width>
+                <module>27</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>161</local-port>
+                <width>8</width>
+                <module>21</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>165</local-port>
+                <width>8</width>
+                <module>20</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>169</local-port>
+                <width>8</width>
+                <module>22</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>173</local-port>
+                <width>8</width>
+                <module>23</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>177</local-port>
+                <width>8</width>
+                <module>17</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>181</local-port>
+                <width>8</width>
+                <module>16</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>185</local-port>
+                <width>8</width>
+                <module>18</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>189</local-port>
+                <width>8</width>
+                <module>19</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>193</local-port>
+                <width>8</width>
+                <module>12</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>197</local-port>
+                <width>8</width>
+                <module>13</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>201</local-port>
+                <width>8</width>
+                <module>15</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>205</local-port>
+                <width>8</width>
+                <module>14</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>209</local-port>
+                <width>8</width>
+                <module>8</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>213</local-port>
+                <width>8</width>
+                <module>9</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>217</local-port>
+                <width>8</width>
+                <module>11</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>221</local-port>
+                <width>8</width>
+                <module>10</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>225</local-port>
+                <width>8</width>
+                <module>4</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>229</local-port>
+                <width>8</width>
+                <module>5</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>233</local-port>
+                <width>8</width>
+                <module>7</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>237</local-port>
+                <width>8</width>
+                <module>6</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>241</local-port>
+                <width>8</width>
+                <module>0</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>245</local-port>
+                <width>8</width>
+                <module>1</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>249</local-port>
+                <width>8</width>
+                <module>3</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>253</local-port>
+                <width>8</width>
+                <module>2</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>262144</port-speed>
+                <split>8</split>
+            </port-info>
+            <port-info>
+                <local-port>257</local-port>
+                <width>1</width>
+                <module>64</module>
+                <breakout-modes>0</breakout-modes>
+                <port-speed>64</port-speed>
+            </port-info>
+        </ports-list>
+    </platform_info>
+</root>

From 2ed6e1734c0992c401debc8bfb81d5d77080f4c3 Mon Sep 17 00:00:00 2001
From: rameshraghupathy <43161235+rameshraghupathy@users.noreply.github.com>
Date: Thu, 19 Sep 2024 14:12:40 -0700
Subject: [PATCH 1018/1115] Smartswitch support for container checker and frr
 (#19729)

[Smartswitch] support for container checker and frr
---
 dockers/docker-fpm-frr/base_image_files/TSA    |  5 ++++-
 dockers/docker-fpm-frr/base_image_files/TSB    |  5 ++++-
 dockers/docker-fpm-frr/base_image_files/TSC    |  5 ++++-
 .../base_image_files/platform_utils            | 18 ++++++++++++++++++
 .../docker-pmon.supervisord.conf.j2            |  2 +-
 files/image_config/monit/container_checker     |  9 ++++++++-
 rules/config                                   |  8 ++++++++
 .../sonic_py_common/device_info.py             | 16 ++++++++++++++++
 8 files changed, 63 insertions(+), 5 deletions(-)
 create mode 100755 dockers/docker-fpm-frr/base_image_files/platform_utils

diff --git a/dockers/docker-fpm-frr/base_image_files/TSA b/dockers/docker-fpm-frr/base_image_files/TSA
index beeb86819..4f78cd58c 100755
--- a/dockers/docker-fpm-frr/base_image_files/TSA
+++ b/dockers/docker-fpm-frr/base_image_files/TSA
@@ -1,12 +1,15 @@
 #!/bin/bash
 
+# Source the platform_utils script
+source "$(dirname "$0")/platform_utils"
+
 # Restrict command to sudo users
 if [ "$EUID" -ne 0 ] ; then
   echo "Root priveleges are needed for this operation"
   exit 1
 fi
 
-if [ -f /etc/sonic/chassisdb.conf ]; then
+if [ -f /etc/sonic/chassisdb.conf ] && [ "$SMARTSWITCH" = false ] ; then
   CHASSIS_TSA_STATE_UPDATE="CHASSIS_APP_DB HMSET "BGP_DEVICE_GLOBAL\|STATE" tsa_enabled "true""
   CONFIG_DB_TSA_STATE_UPDATE='{"BGP_DEVICE_GLOBAL":{"STATE":{"tsa_enabled": "true"}}}'
   current_tsa_state="$(sonic-cfggen -d -v BGP_DEVICE_GLOBAL.STATE.tsa_enabled)"
diff --git a/dockers/docker-fpm-frr/base_image_files/TSB b/dockers/docker-fpm-frr/base_image_files/TSB
index 36c69843b..8c82796f1 100755
--- a/dockers/docker-fpm-frr/base_image_files/TSB
+++ b/dockers/docker-fpm-frr/base_image_files/TSB
@@ -1,12 +1,15 @@
 #!/bin/bash
 
+# Source the platform_utils script
+source "$(dirname "$0")/platform_utils"
+
 # Restrict command to sudo users
 if [ "$EUID" -ne 0 ] ; then
   echo "Root priveleges are needed for this operation"
   exit 1
 fi
 
-if [ -f /etc/sonic/chassisdb.conf ]; then
+if [ -f /etc/sonic/chassisdb.conf ] && [ "$SMARTSWITCH" = false ] ; then
   CHASSIS_TSA_STATE_UPDATE="CHASSIS_APP_DB HMSET "BGP_DEVICE_GLOBAL\|STATE" tsa_enabled "false""
   CONFIG_DB_TSA_STATE_UPDATE='{"BGP_DEVICE_GLOBAL":{"STATE":{"tsa_enabled": "false"}}}'
   current_tsa_state="$(sonic-cfggen -d -v BGP_DEVICE_GLOBAL.STATE.tsa_enabled)"
diff --git a/dockers/docker-fpm-frr/base_image_files/TSC b/dockers/docker-fpm-frr/base_image_files/TSC
index bcdd9d187..ccb6c7d6e 100755
--- a/dockers/docker-fpm-frr/base_image_files/TSC
+++ b/dockers/docker-fpm-frr/base_image_files/TSC
@@ -1,12 +1,15 @@
 #!/bin/bash
 
+# Source the platform_utils script
+source "$(dirname "$0")/platform_utils"
+
 # Restrict command to sudo users
 if [ "$EUID" -ne 0 ] ; then
   echo "Root priveleges are needed for this operation"
   exit 1
 fi
 
-if [ -f /etc/sonic/chassisdb.conf ]; then
+if [ -f /etc/sonic/chassisdb.conf ] && [ "$SMARTSWITCH" = false ] ; then
   if [[ $1 == "no-stats" ]]; then
     rexec all -c "sudo TSC no-stats"
   else
diff --git a/dockers/docker-fpm-frr/base_image_files/platform_utils b/dockers/docker-fpm-frr/base_image_files/platform_utils
new file mode 100755
index 000000000..e4d8da76e
--- /dev/null
+++ b/dockers/docker-fpm-frr/base_image_files/platform_utils
@@ -0,0 +1,18 @@
+#!/bin/bash
+
+# platform_utils
+
+# Determine platform and is smartswitch
+PLATFORM="$(sonic-cfggen -d -v DEVICE_METADATA.localhost.platform)"
+SMARTSWITCH=false
+PLATFORM_JSON=/usr/share/sonic/device/$PLATFORM/platform.json
+
+if [ -f "$PLATFORM_JSON" ]; then
+    NUM_DPU=$(jq -r '.DPUS | length' $PLATFORM_JSON 2>/dev/null)
+    if [[ $NUM_DPU -gt 0 ]]; then
+        SMARTSWITCH=true
+    fi
+fi
+
+# Export SMARTSWITCH for other scripts
+export SMARTSWITCH
diff --git a/dockers/docker-platform-monitor/docker-pmon.supervisord.conf.j2 b/dockers/docker-platform-monitor/docker-pmon.supervisord.conf.j2
index 1cfd61ee8..b023a8f2b 100644
--- a/dockers/docker-platform-monitor/docker-pmon.supervisord.conf.j2
+++ b/dockers/docker-platform-monitor/docker-pmon.supervisord.conf.j2
@@ -28,7 +28,7 @@ stdout_logfile=syslog
 stderr_logfile=syslog
 dependent_startup=true
 
-{% if not skip_chassisd and IS_MODULAR_CHASSIS == 1 %}
+{% if not skip_chassisd and (IS_MODULAR_CHASSIS == 1 or is_smartswitch) %}
 [program:chassisd]
 command=/usr/local/bin/chassisd
 priority=3
diff --git a/files/image_config/monit/container_checker b/files/image_config/monit/container_checker
index f4e499506..58f5aa75c 100755
--- a/files/image_config/monit/container_checker
+++ b/files/image_config/monit/container_checker
@@ -109,8 +109,15 @@ def get_expected_running_containers():
             else:
                 always_running_containers.add(container_name)
 
-    if device_info.is_supervisor():
+    if device_info.is_supervisor() or device_info.is_smartswitch():
         always_running_containers.add("database-chassis")
+
+    if device_info.is_smartswitch():
+        raw_dpustable = config_db.get_table("DPUS")
+        for dpu_name in raw_dpustable:
+            container_name = f"databasedpu{dpu_name.replace('dpu', '')}"
+            always_running_containers.add(container_name)
+
     return expected_running_containers, always_running_containers
 
 def get_current_running_from_DB(always_running_containers):
diff --git a/rules/config b/rules/config
index d2ddcb704..8229160b0 100644
--- a/rules/config
+++ b/rules/config
@@ -42,6 +42,9 @@ DEFAULT_BUILD_LOG_TIMESTAMP = none
 # CHANGE_DEFAULT_PASSWORD - enforce default user/users to change password on 1st login
 CHANGE_DEFAULT_PASSWORD ?= n
 
+# Default value for SMARTSWITCH
+SMARTSWITCH ?= 0
+
 # DEFAULT_USERNAME - default username for installer build
 DEFAULT_USERNAME = admin
 
@@ -152,6 +155,11 @@ INCLUDE_DHCP_RELAY = y
 # INCLUDE_DHCP_SERVER - build and install dhcp-server package
 INCLUDE_DHCP_SERVER ?= n
 
+# Conditionally enable DHCP_SERVER when SMARTSWITCH is set to 1
+ifeq ($(SMARTSWITCH), 1)
+    INCLUDE_DHCP_SERVER = y
+endif
+
 # INCLUDE_P4RT - build docker-p4rt for P4RT support
 INCLUDE_P4RT = n
 
diff --git a/src/sonic-py-common/sonic_py_common/device_info.py b/src/sonic-py-common/sonic_py_common/device_info.py
index a5f982130..75e8dcb57 100644
--- a/src/sonic-py-common/sonic_py_common/device_info.py
+++ b/src/sonic-py-common/sonic_py_common/device_info.py
@@ -576,6 +576,22 @@ def is_chassis():
     return is_voq_chassis() or is_packet_chassis()
 
 
+def is_smartswitch():
+    # Get platform
+    platform = get_platform()
+    if not platform:
+        return False
+
+    # get platform.json file path
+    platform_json = os.path.join(HOST_DEVICE_PATH, platform, "platform.json")
+    try:
+        with open(platform_json, 'r') as f:
+            platform_cfg = json.loads(f.read())
+            return "DPUS" in platform_cfg
+    except IOError:
+        return False
+
+
 def is_supervisor():
     platform_env_conf_file_path = get_platform_env_conf_file_path()
     if platform_env_conf_file_path is None:

From e1069096beb4aa8658d6fd08463459b7144e6f2c Mon Sep 17 00:00:00 2001
From: Feng-msft <fenpan@microsoft.com>
Date: Fri, 20 Sep 2024 07:26:17 +0800
Subject: [PATCH 1019/1115] Add bmpcfgd for monitoring config_db state change.
 (#18940)

#### Why I did it
https://github.com/sonic-net/SONiC/pull/1621, need dedicated daemon to monitor config_db and manage openbmpd state.
#### How I did it
Use swss-common lib to monitor config_db change.
---
 src/sonic-bmpcfgd/__init__.py                 |   0
 .../sonic-services-data.bmpcfgd.service       |  14 ++
 src/sonic-bmpcfgd/scripts/bmpcfgd             | 111 ++++++++++++
 src/sonic-bmpcfgd/setup.cfg                   |   5 +
 src/sonic-bmpcfgd/setup.py                    |  75 ++++++++
 src/sonic-bmpcfgd/tests/__init__.py           |   0
 src/sonic-bmpcfgd/tests/bmpcfgd_test.py       | 116 +++++++++++++
 .../tests/common/mock_configdb.py             | 162 ++++++++++++++++++
 src/sonic-bmpcfgd/tests/mock_connector.py     |  39 +++++
 9 files changed, 522 insertions(+)
 create mode 100644 src/sonic-bmpcfgd/__init__.py
 create mode 100644 src/sonic-bmpcfgd/data/debian/sonic-services-data.bmpcfgd.service
 create mode 100644 src/sonic-bmpcfgd/scripts/bmpcfgd
 create mode 100644 src/sonic-bmpcfgd/setup.cfg
 create mode 100644 src/sonic-bmpcfgd/setup.py
 create mode 100644 src/sonic-bmpcfgd/tests/__init__.py
 create mode 100644 src/sonic-bmpcfgd/tests/bmpcfgd_test.py
 create mode 100644 src/sonic-bmpcfgd/tests/common/mock_configdb.py
 create mode 100644 src/sonic-bmpcfgd/tests/mock_connector.py

diff --git a/src/sonic-bmpcfgd/__init__.py b/src/sonic-bmpcfgd/__init__.py
new file mode 100644
index 000000000..e69de29bb
diff --git a/src/sonic-bmpcfgd/data/debian/sonic-services-data.bmpcfgd.service b/src/sonic-bmpcfgd/data/debian/sonic-services-data.bmpcfgd.service
new file mode 100644
index 000000000..0a16edf77
--- /dev/null
+++ b/src/sonic-bmpcfgd/data/debian/sonic-services-data.bmpcfgd.service
@@ -0,0 +1,14 @@
+[Unit]
+Description=Process which monitors config_db and manage openbmpd daemon
+Requires=database.service config-setup.service
+After=database.service config-setup.service
+BindsTo=sonic.target
+After=sonic.target
+
+[Service]
+Type=simple
+ExecStart=/usr/local/bin/bmpcfgd
+Restart=always
+
+[Install]
+WantedBy=sonic.target
diff --git a/src/sonic-bmpcfgd/scripts/bmpcfgd b/src/sonic-bmpcfgd/scripts/bmpcfgd
new file mode 100644
index 000000000..448ca5b24
--- /dev/null
+++ b/src/sonic-bmpcfgd/scripts/bmpcfgd
@@ -0,0 +1,111 @@
+#!/usr/bin/env python3
+'''
+bmpcfgd
+Daemon which monitors bmp relevant table enablement from CONFIG_DB, and reset BMP states
+'''
+
+import os
+import sys
+import subprocess
+import syslog
+import signal
+from shutil import copy2
+from datetime import datetime
+from sonic_py_common import device_info
+from sonic_py_common.general import check_output_pipe
+from swsscommon.swsscommon import ConfigDBConnector, DBConnector, Table
+from swsscommon import swsscommon
+from sonic_py_common.daemon_base import DaemonBase
+
+CFG_DB = "CONFIG_DB"
+BMP_STATE_DB = "BMP_STATE_DB"
+REDIS_HOSTIP = "127.0.0.1"
+BMP_TABLE = "BMP"
+
+def is_true(val):
+    return str(val).lower() == 'true'
+
+class BMPCfg(DaemonBase):
+    def __init__(self, state_db_conn):
+        DaemonBase.__init__(self, SYSLOG_IDENTIFIER)
+        self.bgp_neighbor_table  = False
+        self.bgp_rib_in_table  = False
+        self.bgp_rib_out_table  = False
+        self.state_db_conn = state_db_conn
+
+
+    def load(self, data={}):
+        common_config = data.get('table', {})
+
+        self.bgp_neighbor_table = is_true(common_config.get('bgp_neighbor_table', 'false'))
+        self.bgp_rib_in_table = is_true(common_config.get('bgp_rib_in_table', 'false'))
+        self.bgp_rib_out_table = is_true(common_config.get('bgp_rib_out_table', 'false'))
+        self.log_info(f'BMPCfg: update : {self.bgp_neighbor_table}, {self.bgp_rib_in_table}, {self.bgp_rib_out_table}')
+
+        # reset bmp table state once config is changed.
+        self.stop_bmp()
+        self.reset_bmp_table()
+        self.start_bmp()
+
+
+    def cfg_handler(self, data):
+        self.load(data)
+
+
+    def stop_bmp(self):
+        self.log_info('BMPCfg: stop bmp daemon')
+        subprocess.call(["service", "openbmpd", "stop"])
+
+
+    def reset_bmp_table(self):
+        self.log_info('BMPCfg: Reset bmp table from state_db')
+        self.state_db_conn.delete_all_by_pattern(BMP_STATE_DB, 'BGP_NEIGHBOR*')
+        self.state_db_conn.delete_all_by_pattern(BMP_STATE_DB, 'BGP_RIB_IN_TABLE*')
+        self.state_db_conn.delete_all_by_pattern(BMP_STATE_DB, 'BGP_RIB_OUT_TABLE*')
+
+
+    def start_bmp(self):
+        self.log_info('BMPCfg: start bmp daemon')
+        subprocess.call(["service", "openbmpd", "start"])
+
+
+class BMPCfgDaemon:
+    def __init__(self):
+        self.state_db_conn = swsscommon.SonicV2Connector(host=REDIS_HOSTIP)
+        self.state_db_conn.connect(BMP_STATE_DB)
+        self.config_db = ConfigDBConnector()
+        self.config_db.connect(wait_for_init=True, retry_on=True)
+        self.bmpcfg = BMPCfg(self.state_db_conn)
+
+    def bmp_handler(self, key, op, data):
+        data = self.config_db.get_table(BMP_TABLE)
+        self.bmpcfg.cfg_handler(data)
+
+    def register_callbacks(self):
+        self.config_db.subscribe(BMP_TABLE,
+                                 lambda table, key, data:
+                                     self.bmp_handler(key, op, data))
+
+def signal_handler(sig, frame):
+    if sig == signal.SIGHUP:
+        self.log_info("bmpcfgd: signal 'SIGHUP' is caught and ignoring..")
+    elif sig == signal.SIGINT:
+        self.log_info("bmpcfgd: signal 'SIGINT' is caught and exiting...")
+        sys.exit(128 + sig)
+    elif sig == signal.SIGTERM:
+        self.log_info("bmpcfgd: signal 'SIGTERM' is caught and exiting...")
+        sys.exit(128 + sig)
+    else:
+        self.log_info("bmpcfgd: invalid signal - ignoring..")
+
+
+def main():
+    signal.signal(signal.SIGTERM, signal_handler)
+    signal.signal(signal.SIGINT, signal_handler)
+    signal.signal(signal.SIGHUP, signal_handler)
+    daemon = BMPCfgDaemon()
+    daemon.register_callbacks()
+
+
+if __name__ == "__main__":
+    main()
diff --git a/src/sonic-bmpcfgd/setup.cfg b/src/sonic-bmpcfgd/setup.cfg
new file mode 100644
index 000000000..1ce2f2f07
--- /dev/null
+++ b/src/sonic-bmpcfgd/setup.cfg
@@ -0,0 +1,5 @@
+[aliases]
+test=pytest
+[tool:pytest]
+addopts = --verbose
+python_files = tests/*.py
\ No newline at end of file
diff --git a/src/sonic-bmpcfgd/setup.py b/src/sonic-bmpcfgd/setup.py
new file mode 100644
index 000000000..33c3fd980
--- /dev/null
+++ b/src/sonic-bmpcfgd/setup.py
@@ -0,0 +1,75 @@
+from __future__ import print_function
+import sys
+from setuptools import setup
+import pkg_resources
+from packaging import version
+
+# sonic_dependencies, version requirement only supports '>='
+sonic_dependencies = ['sonic-py-common', 'sonic-utilities']
+for package in sonic_dependencies:
+    try:
+        package_dist = pkg_resources.get_distribution(package.split(">=")[0])
+    except pkg_resources.DistributionNotFound:
+        print(package + " is not found!", file=sys.stderr)
+        print("Please build and install SONiC python wheels dependencies from sonic-buildimage", file=sys.stderr)
+        exit(1)
+    if ">=" in package:
+        if version.parse(package_dist.version) >= version.parse(package.split(">=")[1]):
+            continue
+        print(package + " version not match!", file=sys.stderr)
+        exit(1)
+
+setup(
+    name = 'sonic-bmpcfgd-services',
+    version = '1.0',
+    description = 'Python services which run in the bmp container',
+    license = 'Apache 2.0',
+    author = 'SONiC Team',
+    author_email = 'linuxnetdev@microsoft.com',
+    url = 'https://github.com/Azure/sonic-buildimage',
+    maintainer = 'Feng Pan',
+    maintainer_email = 'fenpan@microsoft.com',
+    packages = setuptools.find_packages(),
+    scripts = [
+        'scripts/bmpcfgd'
+    ],
+    install_requires = [
+        'jinja2>=2.10',
+        'netaddr==0.8.0',
+        'pyyaml==6.0.1',
+        'ipaddress==1.0.23'
+    ] + sonic_dependencies,
+    setup_requires = [
+        'pytest-runner',
+        'wheel'
+    ],
+    tests_require = [
+        'parameterized',
+        'pytest',
+        'pyfakefs',
+        'sonic-py-common',
+        'pytest-cov'
+    ],
+    extras_require = {
+        "testing": [
+            'parameterized',
+            'pytest',
+            'pyfakefs',
+            'sonic-py-common'
+        ]
+    },
+    classifiers = [
+        'Development Status :: 3 - Alpha',
+        'Environment :: Console',
+        'Intended Audience :: Developers',
+        'Intended Audience :: Information Technology',
+        'Intended Audience :: System Administrators',
+        'License :: OSI Approved :: Apache Software License',
+        'Natural Language :: English',
+        'Operating System :: POSIX :: Linux',
+        'Programming Language :: Python :: 3.7',
+        'Topic :: System',
+    ],
+    keywords = 'sonic SONiC bmp services',
+    test_suite = 'setup.get_test_suite'
+)
diff --git a/src/sonic-bmpcfgd/tests/__init__.py b/src/sonic-bmpcfgd/tests/__init__.py
new file mode 100644
index 000000000..e69de29bb
diff --git a/src/sonic-bmpcfgd/tests/bmpcfgd_test.py b/src/sonic-bmpcfgd/tests/bmpcfgd_test.py
new file mode 100644
index 000000000..a6abc6c3b
--- /dev/null
+++ b/src/sonic-bmpcfgd/tests/bmpcfgd_test.py
@@ -0,0 +1,116 @@
+import importlib.machinery
+import importlib.util
+import filecmp
+import json
+import shutil
+import os
+import sys
+import signal
+from swsscommon import swsscommon
+
+from parameterized import parameterized
+from unittest import TestCase, mock
+from tests.common.mock_configdb import MockConfigDb, MockDBConnector
+from tests.common.mock_bootloader import MockBootloader
+from sonic_py_common.general import getstatusoutput_noshell
+from .mock_connector import MockConnector
+from sonic_py_common.general import load_module_from_source
+from mock import patch
+
+test_path = os.path.dirname(os.path.abspath(__file__))
+modules_path = os.path.dirname(test_path)
+scripts_path = os.path.join(modules_path, "scripts")
+sys.path.insert(0, modules_path)
+
+# Load the file under test
+bmpcfgd_path = os.path.join(scripts_path, 'bmpcfgd')
+bmpcfgd = load_module_from_source('bmpcfgd', bmpcfgd_path)
+
+
+from bmpcfgd import signal_handler
+
+original_syslog = bmpcfgd.syslog
+
+# Mock swsscommon classes
+bmpcfgd.ConfigDBConnector = MockConfigDb
+bmpcfgd.DBConnector = MockDBConnector
+bmpcfgd.Table = mock.Mock()
+swsscommon.SonicV2Connector = MockConnector
+
+class TestBMPCfgDaemon(TestCase):
+    """
+        Test bmpcfgd daemon
+    """
+    def setUp(self):
+        self.test_data = {}
+        self.test_data['BMP'] = {}
+        self.test_data['BMP']['table'] = {'bgp_neighbor_table': 'false', 'bgp_rib_in_table': 'false', 'bgp_rib_out_table': 'false'}
+
+    @mock.patch('sonic_installer.bootloader.get_bootloader', side_effect=[MockBootloader()])
+    @mock.patch('syslog.syslog')
+    @mock.patch('subprocess.call')
+    def test_bmpcfgd_neighbor_enable(self, mock_check_call, mock_syslog, mock_get_bootloader):
+        self.test_data['BMP']['table']['bgp_neighbor_table'] = 'true'
+        MockConfigDb.set_config_db(self.test_data)
+        bmp_config_daemon = bmpcfgd.BMPCfgDaemon()
+        bmp_config_daemon.register_callbacks()
+        bmp_config_daemon.bmp_handler("BMP", '', self.test_data)
+        expected_calls = [
+            mock.call(original_syslog.LOG_INFO, 'BMPCfg: update : True, False, False'),
+            mock.call(original_syslog.LOG_INFO, 'BMPCfg: stop bmp daemon'),
+            mock.call(original_syslog.LOG_INFO, 'BMPCfg: Reset bmp table from state_db'),
+            mock.call(original_syslog.LOG_INFO, 'BMPCfg: start bmp daemon'),
+        ]
+        mock_syslog.assert_has_calls(expected_calls)
+
+    @mock.patch('sonic_installer.bootloader.get_bootloader', side_effect=[MockBootloader()])
+    @mock.patch('syslog.syslog')
+    @mock.patch('subprocess.check_call')
+    def test_bmpcfgd_bgp_rib_in_enable(self, mock_check_call, mock_syslog, mock_get_bootloader):
+        self.test_data['BMP']['table']['bgp_rib_in_table'] = 'true'
+        MockConfigDb.set_config_db(self.test_data)
+        bmp_config_daemon = bmpcfgd.BMPCfgDaemon()
+        bmp_config_daemon.bmp_handler("BMP", '', self.test_data)
+        expected_calls = [
+            mock.call(original_syslog.LOG_INFO, 'BMPCfg: update : False, True, False'),
+            mock.call(original_syslog.LOG_INFO, 'BMPCfg: stop bmp daemon'),
+            mock.call(original_syslog.LOG_INFO, 'BMPCfg: Reset bmp table from state_db'),
+            mock.call(original_syslog.LOG_INFO, 'BMPCfg: start bmp daemon'),
+        ]
+        mock_syslog.assert_has_calls(expected_calls)
+
+    @mock.patch('sonic_installer.bootloader.get_bootloader', side_effect=[MockBootloader()])
+    @mock.patch('syslog.syslog')
+    @mock.patch('subprocess.check_call')
+    def test_bmpcfgd_bgp_rib_out_enable(self, mock_check_call, mock_syslog, mock_get_bootloader):
+        self.test_data['BMP']['table']['bgp_rib_out_table'] = 'true'
+        MockConfigDb.set_config_db(self.test_data)
+        bmp_config_daemon = bmpcfgd.BMPCfgDaemon()
+        bmp_config_daemon.bmp_handler("BMP", '', self.test_data)
+        expected_calls = [
+            mock.call(original_syslog.LOG_INFO, 'BMPCfg: update : False, False, True'),
+            mock.call(original_syslog.LOG_INFO, 'BMPCfg: stop bmp daemon'),
+            mock.call(original_syslog.LOG_INFO, 'BMPCfg: Reset bmp table from state_db'),
+            mock.call(original_syslog.LOG_INFO, 'BMPCfg: start bmp daemon'),
+        ]
+        mock_syslog.assert_has_calls(expected_calls)
+
+
+    @mock.patch('syslog.syslog')
+    @mock.patch.object(sys, 'exit')
+    def test_signal_handler(self, mock_exit, mock_syslog):
+        # Test SIGHUP signal
+        signal_handler(signal.SIGHUP, None)
+        mock_syslog.assert_called_with(original_syslog.LOG_INFO, "bmpcfgd: signal 'SIGHUP' is caught and ignoring..")
+        mock_exit.assert_not_called()
+        # Test SIGINT signal
+        signal_handler(signal.SIGINT, None)
+        mock_syslog.assert_called_with(original_syslog.LOG_INFO, "bmpcfgd: signal 'SIGINT' is caught and exiting...")
+        mock_exit.assert_called_once_with(128 + signal.SIGINT)
+        # Test SIGTERM signal
+        signal_handler(signal.SIGTERM, None)
+        mock_syslog.assert_called_with(original_syslog.LOG_INFO, "bmpcfgd: signal 'SIGTERM' is caught and exiting...")
+        mock_exit.assert_called_with(128 + signal.SIGTERM)
+        # Test invalid signal
+        signal_handler(999, None)
+        mock_syslog.assert_called_with(original_syslog.LOG_INFO, "bmpcfgd: invalid signal - ignoring..")
diff --git a/src/sonic-bmpcfgd/tests/common/mock_configdb.py b/src/sonic-bmpcfgd/tests/common/mock_configdb.py
new file mode 100644
index 000000000..d6c3c055b
--- /dev/null
+++ b/src/sonic-bmpcfgd/tests/common/mock_configdb.py
@@ -0,0 +1,162 @@
+class MockConfigDb(object):
+    """
+        Mock Config DB which responds to data tables requests and store updates to the data table
+    """
+    STATE_DB = None
+    CONFIG_DB = None
+    event_queue = []
+
+    def __init__(self, **kwargs):
+        self.handlers = {}
+
+    @staticmethod
+    def set_config_db(test_config_db):
+        MockConfigDb.CONFIG_DB = test_config_db
+
+    @staticmethod
+    def mod_config_db(test_config_db):
+        MockConfigDb.CONFIG_DB.update(test_config_db)
+
+    @staticmethod
+    def deserialize_key(key, separator="|"):
+        tokens = key.split(separator)
+        if len(tokens) > 1:
+            return tuple(tokens)
+        else:
+            return key
+
+    @staticmethod
+    def get_config_db():
+        return MockConfigDb.CONFIG_DB
+
+    def connect(self, wait_for_init=True, retry_on=True):
+        pass
+
+    def close(self, db_name):
+        pass
+
+    def get(self, db_id, key, field):
+        return MockConfigDb.CONFIG_DB[key][field]
+
+    def get_entry(self, key, field):
+        return MockConfigDb.CONFIG_DB[key][field]
+
+    def mod_entry(self, key, field, data):
+        existing_data = self.get_entry(key, field)
+        existing_data.update(data)
+        self.set_entry(key, field, existing_data)
+
+    def set_entry(self, key, field, data):
+        MockConfigDb.CONFIG_DB[key][field] = data
+
+    def get_table(self, table_name):
+        data = {}
+        if table_name in MockConfigDb.CONFIG_DB:
+            for k, v in MockConfigDb.CONFIG_DB[table_name].items():
+                data[self.deserialize_key(k)] = v
+        return data
+
+    def subscribe(self, table_name, callback):
+        self.handlers[table_name] = callback
+
+    def publish(self, table_name, key, op, data):
+        self.handlers[table_name](key, op, data)
+
+    def listen(self, init_data_handler=None):
+        for e in MockConfigDb.event_queue:
+            self.handlers[e[0]](e[0], e[1], self.get_entry(e[0], e[1]))
+
+
+class MockSelect():
+
+    event_queue = []
+    OBJECT = "OBJECT"
+    TIMEOUT = "TIMEOUT"
+    ERROR = ""
+    NUM_TIMEOUT_TRIES = 0
+
+    @staticmethod
+    def set_event_queue(Q):
+        MockSelect.event_queue = Q
+
+    @staticmethod
+    def get_event_queue():
+        return MockSelect.event_queue
+
+    @staticmethod
+    def reset_event_queue():
+        MockSelect.event_queue = []
+
+    def __init__(self):
+        self.sub_map = {}
+        self.TIMEOUT = "TIMEOUT"
+        self.ERROR = "ERROR"
+
+    def addSelectable(self, subscriber):
+        self.sub_map[subscriber.table] = subscriber
+
+    def select(self, TIMEOUT):
+        if not MockSelect.get_event_queue() and MockSelect.NUM_TIMEOUT_TRIES == 0:
+            raise TimeoutError
+        elif MockSelect.NUM_TIMEOUT_TRIES != 0:
+            MockSelect.NUM_TIMEOUT_TRIES = MockSelect.NUM_TIMEOUT_TRIES - 1
+            return MockSelect.TIMEOUT, 0
+        
+        table, key = MockSelect.get_event_queue().pop(0)
+        self.sub_map[table].nextKey(key)
+        return "OBJECT", self.sub_map[table]
+
+
+class MockSubscriberStateTable():
+
+    FD_INIT = 0
+
+    @staticmethod
+    def generate_fd():
+        curr = MockSubscriberStateTable.FD_INIT
+        MockSubscriberStateTable.FD_INIT = curr + 1
+        return curr
+
+    @staticmethod
+    def reset_fd():
+        MockSubscriberStateTable.FD_INIT = 0
+
+    def __init__(self, conn, table, pop=None, pri=None):
+        self.fd = MockSubscriberStateTable.generate_fd()
+        self.next_key = ''
+        self.table = table
+
+    def getFd(self):
+        return self.fd
+
+    def nextKey(self, key):
+        print("next key")
+        self.next_key = key
+
+    def pop(self):
+        table = MockConfigDb.CONFIG_DB.get(self.table, {})
+        print(self.next_key)
+        if self.next_key not in table:
+            op = "DEL"
+            fvs = {}
+        else:
+            op = "SET"
+            fvs = table.get(self.next_key, {})
+        return self.next_key, op, fvs
+
+
+class MockDBConnector():
+    def __init__(self, db, val, tcpFlag=False, name=None):
+        self.data = {}
+
+    def hget(self, key, field):
+        if key not in self.data:
+            return None
+        if field not in self.data[key]:
+            return None
+        return self.data[key][field]
+
+    def hset(self, key, field, value):
+        if key not in self.data:
+            self.data[key] = {}
+        self.data[key][field] = value
diff --git a/src/sonic-bmpcfgd/tests/mock_connector.py b/src/sonic-bmpcfgd/tests/mock_connector.py
new file mode 100644
index 000000000..71490796c
--- /dev/null
+++ b/src/sonic-bmpcfgd/tests/mock_connector.py
@@ -0,0 +1,39 @@
+class MockConnector(object):
+    STATE_DB = None
+    data = {}
+
+    def __init__(self, host):
+        pass
+
+    def connect(self, db_id):
+        pass
+
+    def get(self, db_id, key, field):
+        return MockConnector.data[key][field]
+
+    def set(self, db_id, key, field, value):
+        if key not in MockConnector.data:
+            MockConnector.data[key] = {}
+        MockConnector.data[key][field] = value
+
+    def keys(self, db_id, pattern):
+        match = pattern.split('*')[0]
+        ret = []
+        for key in MockConnector.data.keys():
+            if match in key:
+                ret.append(key)
+
+        return ret
+
+    def get_all(self, db_id, key):
+        return MockConnector.data[key]
+
+    def delete(self, db_id, key):
+        return MockConnector.data.delete(key)
+
+    def delete_all_by_pattern(self, db_id, pattern):
+        keys = self.keys(db_id, pattern)
+        for key in keys:
+            self.delete(db_id, key)
+
+

From 75e4bbef8bc9468397c30dd6f2b2cbe5535ad979 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Fri, 20 Sep 2024 19:01:31 +0800
Subject: [PATCH 1020/1115] [submodule] Update submodule sonic-platform-daemons
 to the latest HEAD automatically (#20309)

#### Why I did it
src/sonic-platform-daemons
```
* 2c39785 - (HEAD -> master, origin/master, origin/HEAD) [xcvrd] Add logs to improve debugging in xcvrd (#539) (4 hours ago) [mihirpat1]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-platform-daemons | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-platform-daemons b/src/sonic-platform-daemons
index f581c06cd..2c39785a8 160000
--- a/src/sonic-platform-daemons
+++ b/src/sonic-platform-daemons
@@ -1 +1 @@
-Subproject commit f581c06cd8adeb4b82816ee0fc38fd07b3f9e692
+Subproject commit 2c39785a8d82a57429b1bc5b3b544751ca18aa88

From e598de678096668ec6e75969ee08cbf277812ed6 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Fri, 20 Sep 2024 19:01:40 +0800
Subject: [PATCH 1021/1115] [submodule] Update submodule sonic-utilities to the
 latest HEAD automatically (#20290)

#### Why I did it
src/sonic-utilities
```
* 867fc540 - (HEAD -> master, origin/master, origin/HEAD) [DASH] Add support for ENI counters (#3496) (28 hours ago) [Vivek]
* b4d27c4b - Fix multi-asic behaviour for watermarkstat (#3060) (2 days ago) [bktsim]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-utilities | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-utilities b/src/sonic-utilities
index ed624895f..867fc5400 160000
--- a/src/sonic-utilities
+++ b/src/sonic-utilities
@@ -1 +1 @@
-Subproject commit ed624895f218b5c81fabc0c4655b317374e246d7
+Subproject commit 867fc5400e7c53e068bf61e7c4c9e33b54a3fea3

From 50ddacb382ea89a9ddecd11e11cf9a8ab75f40ba Mon Sep 17 00:00:00 2001
From: Gagan Punathil Ellath <gpunathilell@nvidia.com>
Date: Fri, 20 Sep 2024 11:10:48 -0700
Subject: [PATCH 1022/1115] [SmartSwitch] Yang model change for bridge midplane
 (#19819)

- Why I did it
The yang model for bridge-midplane is not aligned with the actual implementation present in #18178,
This PR is to align the yang model to change bridge_midplane to bridge-midplane since this is the value used in the systemd-networkd in CONFIG_DB so that the yang validation does not fail

- How I did it

- How to verify it
Enhance unit test
---
 .../dhcp_utilities/dhcpservd/dhcp_cfggen.py        |  2 +-
 .../tests/test_data/dhcp_db_monitor_test_data.json |  4 ++--
 .../test_data/mock_config_db_smart_switch.json     | 12 ++++++------
 src/sonic-dhcp-utilities/tests/test_dhcp_cfggen.py |  4 ++--
 .../tests/test_dhcp_db_monitor.py                  |  2 +-
 .../tests/test_smart_switch.py                     | 10 +++++-----
 src/sonic-yang-models/doc/Configuration.md         |  2 +-
 .../tests/files/sample_config_db.json              |  2 +-
 .../tests/yang_model_pytests/test_smart_switch.py  |  8 ++++----
 .../tests_config/dhcp_server_ipv4.json             | 14 +++++++-------
 .../yang-models/sonic-smart-switch.yang            |  2 +-
 11 files changed, 31 insertions(+), 31 deletions(-)

diff --git a/src/sonic-dhcp-utilities/dhcp_utilities/dhcpservd/dhcp_cfggen.py b/src/sonic-dhcp-utilities/dhcp_utilities/dhcpservd/dhcp_cfggen.py
index c41e61d5f..53eab7b20 100755
--- a/src/sonic-dhcp-utilities/dhcp_utilities/dhcpservd/dhcp_cfggen.py
+++ b/src/sonic-dhcp-utilities/dhcp_utilities/dhcpservd/dhcp_cfggen.py
@@ -107,7 +107,7 @@ def _parse_dpu(self, dpus_table, mid_plane_table):
         Returns:
             Parsed obj, sample:
                 mid_plane = {
-                    "bridge": "bridge_midplane",
+                    "bridge": "bridge-midplane",
                     "address": "169.254.200.254/24"
                 }
                 dpus = {
diff --git a/src/sonic-dhcp-utilities/tests/test_data/dhcp_db_monitor_test_data.json b/src/sonic-dhcp-utilities/tests/test_data/dhcp_db_monitor_test_data.json
index da422685a..c22cc6f24 100644
--- a/src/sonic-dhcp-utilities/tests/test_data/dhcp_db_monitor_test_data.json
+++ b/src/sonic-dhcp-utilities/tests/test_data/dhcp_db_monitor_test_data.json
@@ -293,13 +293,13 @@
     "test_mid_plane_update": [
         {
             "table": [
-                ["GLOBAL", "SET", [["bridge", "bridge_midplane"], ["ip_prefix", "169.254.200.254/24"]]]
+                ["GLOBAL", "SET", [["bridge", "bridge-midplane"], ["ip_prefix", "169.254.200.254/24"]]]
             ],
             "exp_res": true
         },
         {
             "table": [
-                ["GLOBAL", "SET", [["bridge", "bridge_midplane2"], ["ip_prefix", "169.254.200.254/24"]]]
+                ["GLOBAL", "SET", [["bridge", "bridge-midplane2"], ["ip_prefix", "169.254.200.254/24"]]]
             ],
             "exp_res": false
         },
diff --git a/src/sonic-dhcp-utilities/tests/test_data/mock_config_db_smart_switch.json b/src/sonic-dhcp-utilities/tests/test_data/mock_config_db_smart_switch.json
index 06c3050a2..c30716de7 100644
--- a/src/sonic-dhcp-utilities/tests/test_data/mock_config_db_smart_switch.json
+++ b/src/sonic-dhcp-utilities/tests/test_data/mock_config_db_smart_switch.json
@@ -7,12 +7,12 @@
     },
     "MID_PLANE_BRIDGE": {
         "GLOBAL": {
-            "bridge": "bridge_midplane",
+            "bridge": "bridge-midplane",
             "ip_prefix": "169.254.200.254/24"
         }
     },
     "DHCP_SERVER_IPV4": {
-        "bridge_midplane": {
+        "bridge-midplane": {
             "customized_options": [
                 "option60",
                 "option223"
@@ -25,22 +25,22 @@
         }
     },
     "DHCP_SERVER_IPV4_PORT": {
-        "bridge_midplane|dpu0": {
+        "bridge-midplane|dpu0": {
             "ips": [
                 "169.254.200.1"
             ]
         },
-        "bridge_midplane|dpu1": {
+        "bridge-midplane|dpu1": {
             "ips": [
                 "169.254.200.2"
             ]
         },
-        "bridge_midplane|dpu2": {
+        "bridge-midplane|dpu2": {
             "ips": [
                 "169.254.200.3"
             ]
         },
-        "bridge_midplane|dpu3": {
+        "bridge-midplane|dpu3": {
             "ips": [
                 "169.254.200.4"
             ]
diff --git a/src/sonic-dhcp-utilities/tests/test_dhcp_cfggen.py b/src/sonic-dhcp-utilities/tests/test_dhcp_cfggen.py
index 3548e39c1..4e8b0504b 100644
--- a/src/sonic-dhcp-utilities/tests/test_dhcp_cfggen.py
+++ b/src/sonic-dhcp-utilities/tests/test_dhcp_cfggen.py
@@ -416,7 +416,7 @@ def test_parse_dpus(mock_swsscommon_dbconnector_init, mock_get_render_template,
     dhcp_db_connector = DhcpDbConnector()
     dhcp_cfg_generator = DhcpServCfgGenerator(dhcp_db_connector, "/usr/local/lib/kea/hooks/libdhcp_run_script.so")
     dpus_table = {"dpu0": {"midplane_interface": "dpu0"}}
-    mid_plane_table = {"GLOBAL": {"bridge": "bridge_midplane", "ip_prefix": "169.254.200.254/24"}}
+    mid_plane_table = {"GLOBAL": {"bridge": "bridge-midplane", "ip_prefix": "169.254.200.254/24"}}
     mid_plane, dpus = dhcp_cfg_generator._parse_dpu(dpus_table, mid_plane_table)
-    assert mid_plane == {"bridge": "bridge_midplane", "ip_prefix": "169.254.200.254/24"}
+    assert mid_plane == {"bridge": "bridge-midplane", "ip_prefix": "169.254.200.254/24"}
     assert dpus == set(["dpu0"])
diff --git a/src/sonic-dhcp-utilities/tests/test_dhcp_db_monitor.py b/src/sonic-dhcp-utilities/tests/test_dhcp_db_monitor.py
index 4352ee60f..86c34663b 100644
--- a/src/sonic-dhcp-utilities/tests/test_dhcp_db_monitor.py
+++ b/src/sonic-dhcp-utilities/tests/test_dhcp_db_monitor.py
@@ -369,7 +369,7 @@ def test_feature_table_checker(mock_swsscommon_dbconnector_init, tested_data, te
             assert expected_res == check_res
 
 
-@pytest.mark.parametrize("tested_db_snapshot", [{"enabled_dhcp_interfaces": {"bridge_midplane"}}, {}])
+@pytest.mark.parametrize("tested_db_snapshot", [{"enabled_dhcp_interfaces": {"bridge-midplane"}}, {}])
 @pytest.mark.parametrize("tested_data", get_subscribe_table_tested_data("test_mid_plane_update"))
 def test_mid_plane_table_checker(mock_swsscommon_dbconnector_init, tested_data, tested_db_snapshot):
     with patch.object(ConfigDbEventChecker, "enable"), \
diff --git a/src/sonic-dhcp-utilities/tests/test_smart_switch.py b/src/sonic-dhcp-utilities/tests/test_smart_switch.py
index a5c6be2fd..239cc00ba 100644
--- a/src/sonic-dhcp-utilities/tests/test_smart_switch.py
+++ b/src/sonic-dhcp-utilities/tests/test_smart_switch.py
@@ -106,22 +106,22 @@
 
 
 expected_lease = {
-    'bridge_midplane|aa:bb:cc:dd:ff:01': {
+    'bridge-midplane|aa:bb:cc:dd:ff:01': {
         'ip': '169.254.200.1',
         'lease_end': '1718053209',
         'lease_start': '1718052309'
     },
-    'bridge_midplane|aa:bb:cc:dd:ff:02': {
+    'bridge-midplane|aa:bb:cc:dd:ff:02': {
         'ip': '169.254.200.2',
         'lease_end': '1718053210',
         'lease_start': '1718052310'
     },
-    'bridge_midplane|aa:bb:cc:dd:ff:03': {
+    'bridge-midplane|aa:bb:cc:dd:ff:03': {
         'ip': '169.254.200.3',
         'lease_end': '1718053210',
         'lease_start': '1718052310'
     },
-   'bridge_midplane|aa:bb:cc:dd:ff:04': {
+   'bridge-midplane|aa:bb:cc:dd:ff:04': {
        'ip': '169.254.200.4',
        'lease_end': '1718053209',
        'lease_start': '1718052309'
@@ -154,7 +154,7 @@ def test_dhcp_dhcp_cfggen_generate(mock_swsscommon_dbconnector_init, mock_parse_
             dhcp_cfg_generator.generate()
         assert json.loads(kea_dhcp4_config) == expected_kea_config
         assert used_ranges == set()
-        assert enabled_dhcp_interfaces == set(["bridge_midplane"])
+        assert enabled_dhcp_interfaces == set(["bridge-midplane"])
         assert used_options == set(["option60", "option223"])
         expected_tables = set(["DpusTableEventChecker", "MidPlaneTableEventChecker", "VlanTableEventChecker",
                                "VlanIntfTableEventChecker", "DhcpRangeTableEventChecker", "VlanMemberTableEventChecker",
diff --git a/src/sonic-yang-models/doc/Configuration.md b/src/sonic-yang-models/doc/Configuration.md
index 06ee8d26a..4d264417d 100644
--- a/src/sonic-yang-models/doc/Configuration.md
+++ b/src/sonic-yang-models/doc/Configuration.md
@@ -2871,7 +2871,7 @@ The MID_PLANE_BRIDGE" table introduces the configuration for the midplane bridge
 {
     "MID_PLANE_BRIDGE": {
         "GLOBAL" : {
-            "bridge": "bridge_midplane",
+            "bridge": "bridge-midplane",
             "ip_prefix": "169.254.200.254/24"
         }
     }
diff --git a/src/sonic-yang-models/tests/files/sample_config_db.json b/src/sonic-yang-models/tests/files/sample_config_db.json
index e48260714..1ed8940f8 100644
--- a/src/sonic-yang-models/tests/files/sample_config_db.json
+++ b/src/sonic-yang-models/tests/files/sample_config_db.json
@@ -2691,7 +2691,7 @@
         },
         "MID_PLANE_BRIDGE": {
             "GLOBAL" : {
-                "bridge": "bridge_midplane",
+                "bridge": "bridge-midplane",
                 "ip_prefix": "169.254.200.254/24"
             }
         },
diff --git a/src/sonic-yang-models/tests/yang_model_pytests/test_smart_switch.py b/src/sonic-yang-models/tests/yang_model_pytests/test_smart_switch.py
index ccd0f312e..f1242719c 100644
--- a/src/sonic-yang-models/tests/yang_model_pytests/test_smart_switch.py
+++ b/src/sonic-yang-models/tests/yang_model_pytests/test_smart_switch.py
@@ -8,7 +8,7 @@ def test_valid_data(self, yang_model):
             "sonic-smart-switch:sonic-smart-switch": {
                 "sonic-smart-switch:MID_PLANE_BRIDGE": {
                     "GLOBAL": {
-                        "bridge": "bridge_midplane",
+                        "bridge": "bridge-midplane",
                         "ip_prefix": "169.254.200.254/24"
                     }
                 },
@@ -31,8 +31,8 @@ def test_valid_data(self, yang_model):
 
     @pytest.mark.parametrize(
         "bridge_name, error_message", [
-            ("bridge_midplane", None),
-            ("wrong_name", 'Value "wrong_name" does not satisfy the constraint "bridge_midplane"')]
+            ("bridge-midplane", None),
+            ("wrong_name", 'Value "wrong_name" does not satisfy the constraint "bridge-midplane"')]
         )
     def test_bridge_name(self, yang_model, bridge_name, error_message):
         data = {
@@ -58,7 +58,7 @@ def test_bridge_ip_prefix(self, yang_model, ip_prefix, error_message):
             "sonic-smart-switch:sonic-smart-switch": {
                 "sonic-smart-switch:MID_PLANE_BRIDGE": {
                     "GLOBAL": {
-                        "bridge": "bridge_midplane",
+                        "bridge": "bridge-midplane",
                         "ip_prefix": ip_prefix
                     }
                 }
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/dhcp_server_ipv4.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/dhcp_server_ipv4.json
index 9e0f6f686..42e03c647 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/dhcp_server_ipv4.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/dhcp_server_ipv4.json
@@ -3,7 +3,7 @@
         "sonic-smart-switch:sonic-smart-switch": {
             "sonic-smart-switch:MID_PLANE_BRIDGE": {
                 "GLOBAL": {
-                    "bridge": "bridge_midplane",
+                    "bridge": "bridge-midplane",
                     "ip_prefix": "169.254.200.254/24"
                 }
             }
@@ -49,7 +49,7 @@
                         "state": "enabled"
                     },
                     {
-                        "name": "bridge_midplane",
+                        "name": "bridge-midplane",
                         "gateway": "169.254.200.254",
                         "lease_time": 3600,
                         "mode": "PORT",
@@ -185,7 +185,7 @@
         "sonic-smart-switch:sonic-smart-switch": {
             "sonic-smart-switch:MID_PLANE_BRIDGE": {
                 "GLOBAL": {
-                    "bridge": "bridge_midplane",
+                    "bridge": "bridge-midplane",
                     "ip_prefix": "169.254.200.254/24"
                 }
             }
@@ -194,7 +194,7 @@
             "sonic-dhcp-server-ipv4:DHCP_SERVER_IPV4": {
                 "DHCP_SERVER_IPV4_LIST": [
                     {
-                        "name": "non_exist_bridge_midplane",
+                        "name": "non_exist_bridge-midplane",
                         "gateway": "192.168.0.1",
                         "lease_time": 3600,
                         "mode": "PORT",
@@ -294,7 +294,7 @@
         "sonic-smart-switch:sonic-smart-switch": {
             "sonic-smart-switch:MID_PLANE_BRIDGE": {
                 "GLOBAL": {
-                    "bridge": "bridge_midplane",
+                    "bridge": "bridge-midplane",
                     "ip_prefix": "169.254.200.254/24"
                 }
             }
@@ -303,7 +303,7 @@
             "sonic-dhcp-server-ipv4:DHCP_SERVER_IPV4": {
                 "DHCP_SERVER_IPV4_LIST": [
                     {
-                        "name": "bridge_midplane",
+                        "name": "bridge-midplane",
                         "gateway": "169.254.200.254",
                         "lease_time": 3600,
                         "mode": "PORT",
@@ -315,7 +315,7 @@
             "sonic-dhcp-server-ipv4:DHCP_SERVER_IPV4_PORT": {
                 "DHCP_SERVER_IPV4_PORT_LIST": [
                     {
-                        "name": "bridge_midplane",
+                        "name": "bridge-midplane",
                         "port": "non_exit_dpu",
                         "ips": [
                             "169.254.200.1"
diff --git a/src/sonic-yang-models/yang-models/sonic-smart-switch.yang b/src/sonic-yang-models/yang-models/sonic-smart-switch.yang
index fdd4deb17..77880f036 100644
--- a/src/sonic-yang-models/yang-models/sonic-smart-switch.yang
+++ b/src/sonic-yang-models/yang-models/sonic-smart-switch.yang
@@ -32,7 +32,7 @@ module sonic-smart-switch {
 			container GLOBAL {
 				leaf bridge {
 					type string {
-						pattern "bridge_midplane";
+						pattern "bridge-midplane";
 					}
 					description "Name of the midplane bridge";
 

From 3d452b412637dc82273c34252d80ba82d4f49f39 Mon Sep 17 00:00:00 2001
From: arista-nwolfe <94405414+arista-nwolfe@users.noreply.github.com>
Date: Fri, 20 Sep 2024 15:53:12 -0400
Subject: [PATCH 1023/1115] [Arista]: Fix tuning values in the
 media_settings.json of 7800r3a_36d2_lc (#20308)

Master PR of #20283 which was made for 202405
---
 .../media_settings.json                       | 2552 ++++++++---------
 1 file changed, 1276 insertions(+), 1276 deletions(-)

diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/media_settings.json b/device/arista/x86_64-arista_7800r3a_36d2_lc/media_settings.json
index 7ce47e003..e9f452042 100644
--- a/device/arista/x86_64-arista_7800r3a_36d2_lc/media_settings.json
+++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/media_settings.json
@@ -13,44 +13,44 @@
                     "lane7": "0x88"
                 },
                 "post1": {
-                    "lane0": "-0x3",
-                    "lane1": "-0x5",
-                    "lane2": "-0x7",
-                    "lane3": "-0x1",
-                    "lane4": "-0xc",
-                    "lane5": "-0x5",
-                    "lane6": "-0x3",
-                    "lane7": "-0xe"
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffb",
+                    "lane2": "0xfffffff9",
+                    "lane3": "0xffffffff",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0xfffffffb",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffff2"
                 },
                 "post2": {
                     "lane0": "0x0",
-                    "lane1": "-0x2",
-                    "lane2": "-0x2",
-                    "lane3": "-0x3",
+                    "lane1": "0xfffffffe",
+                    "lane2": "0xfffffffe",
+                    "lane3": "0xfffffffd",
                     "lane4": "0x0",
-                    "lane5": "-0x2",
+                    "lane5": "0xfffffffe",
                     "lane6": "0x0",
                     "lane7": "0x0"
                 },
                 "post3": {
-                    "lane0": "-0x1",
-                    "lane1": "-0x3",
-                    "lane2": "-0x3",
-                    "lane3": "-0x3",
-                    "lane4": "-0x3",
-                    "lane5": "-0x3",
-                    "lane6": "-0x1",
-                    "lane7": "-0x4"
+                    "lane0": "0xffffffff",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xffffffff",
+                    "lane7": "0xfffffffc"
                 },
                 "pre1": {
-                    "lane0": "-0x10",
-                    "lane1": "-0x10",
-                    "lane2": "-0x10",
-                    "lane3": "-0x11",
-                    "lane4": "-0x10",
-                    "lane5": "-0x10",
-                    "lane6": "-0x10",
-                    "lane7": "-0xe"
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xffffffef",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff2"
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                 "pre2": {
                     "lane0": "0x2",
@@ -71,10 +71,10 @@
                     "lane3": "0x4b"
                 },
                 "post1": {
-                    "lane0": "-0x1d",
-                    "lane1": "-0x19",
-                    "lane2": "-0x17",
-                    "lane3": "-0x15"
+                    "lane0": "0xffffffe3",
+                    "lane1": "0xffffffe7",
+                    "lane2": "0xffffffe9",
+                    "lane3": "0xffffffeb"
                 },
                 "post2": {
                     "lane0": "0x0",
@@ -89,10 +89,10 @@
                     "lane3": "0x0"
                 },
                 "pre1": {
-                    "lane0": "-0x8",
-                    "lane1": "-0x7",
-                    "lane2": "-0x5",
-                    "lane3": "-0x4"
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff9",
+                    "lane2": "0xfffffffb",
+                    "lane3": "0xfffffffc"
                 },
                 "pre2": {
                     "lane0": "0x0",
@@ -115,44 +115,44 @@
                     "lane7": "0x8d"
                 },
                 "post1": {
-                    "lane0": "-0x5",
-                    "lane1": "-0x8",
-                    "lane2": "-0xc",
-                    "lane3": "-0x5",
-                    "lane4": "-0x8",
-                    "lane5": "-0xa",
-                    "lane6": "-0x5",
-                    "lane7": "-0x8"
+                    "lane0": "0xfffffffb",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffffb",
+                    "lane4": "0xfffffff8",
+                    "lane5": "0xfffffff6",
+                    "lane6": "0xfffffffb",
+                    "lane7": "0xfffffff8"
                 },
                 "post2": {
-                    "lane0": "-0x2",
-                    "lane1": "-0x3",
+                    "lane0": "0xfffffffe",
+                    "lane1": "0xfffffffd",
                     "lane2": "0x0",
-                    "lane3": "-0x2",
-                    "lane4": "-0x3",
-                    "lane5": "-0x2",
-                    "lane6": "-0x2",
-                    "lane7": "-0x3"
+                    "lane3": "0xfffffffe",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffffe",
+                    "lane6": "0xfffffffe",
+                    "lane7": "0xfffffffd"
                 },
                 "post3": {
-                    "lane0": "-0x3",
-                    "lane1": "-0x1",
-                    "lane2": "-0x3",
-                    "lane3": "-0x3",
-                    "lane4": "-0x1",
-                    "lane5": "-0x3",
-                    "lane6": "-0x3",
-                    "lane7": "-0x1"
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xffffffff",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xffffffff"
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                 "pre1": {
-                    "lane0": "-0x10",
-                    "lane1": "-0xf",
-                    "lane2": "-0x10",
-                    "lane3": "-0x10",
-                    "lane4": "-0xf",
-                    "lane5": "-0x14",
-                    "lane6": "-0x10",
-                    "lane7": "-0xf"
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff1",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff1",
+                    "lane5": "0xffffffec",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff1"
                 },
                 "pre2": {
                     "lane0": "0x3",
@@ -173,10 +173,10 @@
                     "lane3": "0x4e"
                 },
                 "post1": {
-                    "lane0": "-0x14",
-                    "lane1": "-0x14",
-                    "lane2": "-0x16",
-                    "lane3": "-0x16"
+                    "lane0": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane2": "0xffffffea",
+                    "lane3": "0xffffffea"
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                 "post2": {
                     "lane0": "0x0",
@@ -191,10 +191,10 @@
                     "lane3": "0x0"
                 },
                 "pre1": {
-                    "lane0": "-0x5",
-                    "lane1": "-0x5",
-                    "lane2": "-0x5",
-                    "lane3": "-0x5"
+                    "lane0": "0xfffffffb",
+                    "lane1": "0xfffffffb",
+                    "lane2": "0xfffffffb",
+                    "lane3": "0xfffffffb"
                 },
                 "pre2": {
                     "lane0": "0x0",
@@ -217,44 +217,44 @@
                     "lane7": "0x94"
                 },
                 "post1": {
-                    "lane0": "-0xc",
-                    "lane1": "-0xe",
-                    "lane2": "-0x7",
-                    "lane3": "-0x7",
-                    "lane4": "-0x3",
-                    "lane5": "-0xe",
-                    "lane6": "-0x7",
-                    "lane7": "-0x3"
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff9",
+                    "lane3": "0xfffffff9",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffff2",
+                    "lane6": "0xfffffff9",
+                    "lane7": "0xfffffffd"
                 },
                 "post2": {
                     "lane0": "0x0",
                     "lane1": "0x0",
-                    "lane2": "-0x2",
-                    "lane3": "-0x2",
+                    "lane2": "0xfffffffe",
+                    "lane3": "0xfffffffe",
                     "lane4": "0x0",
                     "lane5": "0x0",
-                    "lane6": "-0x2",
+                    "lane6": "0xfffffffe",
                     "lane7": "0x0"
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                 "post3": {
-                    "lane0": "-0x3",
-                    "lane1": "-0x4",
-                    "lane2": "-0x3",
-                    "lane3": "-0x3",
-                    "lane4": "-0x1",
-                    "lane5": "-0x4",
-                    "lane6": "-0x3",
-                    "lane7": "-0x1"
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xffffffff"
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-                    "lane0": "-0x10",
-                    "lane1": "-0xe",
-                    "lane2": "-0x10",
-                    "lane3": "-0x10",
-                    "lane4": "-0x10",
-                    "lane5": "-0xe",
-                    "lane6": "-0x10",
-                    "lane7": "-0x10"
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff2",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
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                 "pre2": {
                     "lane0": "0x2",
@@ -275,10 +275,10 @@
                     "lane3": "0x55"
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                 "post1": {
-                    "lane0": "-0x17",
-                    "lane1": "-0x17",
-                    "lane2": "-0x19",
-                    "lane3": "-0x19"
+                    "lane0": "0xffffffe9",
+                    "lane1": "0xffffffe9",
+                    "lane2": "0xffffffe7",
+                    "lane3": "0xffffffe7"
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                 "post2": {
                     "lane0": "0x0",
@@ -293,10 +293,10 @@
                     "lane3": "0x0"
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                 "pre1": {
-                    "lane0": "-0x5",
-                    "lane1": "-0x5",
-                    "lane2": "-0x7",
-                    "lane3": "-0x7"
+                    "lane0": "0xfffffffb",
+                    "lane1": "0xfffffffb",
+                    "lane2": "0xfffffff9",
+                    "lane3": "0xfffffff9"
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                 "pre2": {
                     "lane0": "0x0",
@@ -319,44 +319,44 @@
                     "lane7": "0x8d"
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                 "post1": {
-                    "lane0": "-0xc",
-                    "lane1": "-0x5",
-                    "lane2": "-0x8",
-                    "lane3": "-0x5",
-                    "lane4": "-0xc",
-                    "lane5": "-0x8",
-                    "lane6": "-0x8",
-                    "lane7": "-0x5"
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffffb",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffffb",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0xfffffff8",
+                    "lane6": "0xfffffff8",
+                    "lane7": "0xfffffffb"
                 },
                 "post2": {
                     "lane0": "0x0",
-                    "lane1": "-0x2",
-                    "lane2": "-0x3",
-                    "lane3": "-0x2",
+                    "lane1": "0xfffffffe",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffe",
                     "lane4": "0x0",
-                    "lane5": "-0x3",
-                    "lane6": "-0x3",
-                    "lane7": "-0x2"
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffe"
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                 "post3": {
-                    "lane0": "-0x3",
-                    "lane1": "-0x3",
-                    "lane2": "-0x1",
-                    "lane3": "-0x3",
-                    "lane4": "-0x3",
-                    "lane5": "-0x1",
-                    "lane6": "-0x1",
-                    "lane7": "-0x3"
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xffffffff",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xffffffff",
+                    "lane6": "0xffffffff",
+                    "lane7": "0xfffffffd"
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-                    "lane1": "-0x10",
-                    "lane2": "-0xf",
-                    "lane3": "-0x10",
-                    "lane4": "-0x10",
-                    "lane5": "-0xf",
-                    "lane6": "-0xf",
-                    "lane7": "-0x10"
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff1",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff1",
+                    "lane6": "0xfffffff1",
+                    "lane7": "0xfffffff0"
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                 "pre2": {
                     "lane0": "0x2",
@@ -377,10 +377,10 @@
                     "lane3": "0x59"
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                 "post1": {
-                    "lane0": "-0x1d",
-                    "lane1": "-0x1d",
-                    "lane2": "-0x1d",
-                    "lane3": "-0x1d"
+                    "lane0": "0xffffffe3",
+                    "lane1": "0xffffffe3",
+                    "lane2": "0xffffffe3",
+                    "lane3": "0xffffffe3"
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                 "post2": {
                     "lane0": "0x0",
@@ -395,10 +395,10 @@
                     "lane3": "0x0"
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                 "pre1": {
-                    "lane0": "-0x8",
-                    "lane1": "-0x8",
-                    "lane2": "-0x8",
-                    "lane3": "-0x8"
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8"
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                 "pre2": {
                     "lane0": "0x0",
@@ -421,44 +421,44 @@
                     "lane7": "0x94"
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                 "post1": {
-                    "lane0": "-0x3",
-                    "lane1": "-0xc",
-                    "lane2": "-0xe",
-                    "lane3": "-0x7",
-                    "lane4": "-0xe",
-                    "lane5": "-0x7",
-                    "lane6": "-0xe",
-                    "lane7": "-0x3"
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffff4",
+                    "lane2": "0xfffffff2",
+                    "lane3": "0xfffffff9",
+                    "lane4": "0xfffffff2",
+                    "lane5": "0xfffffff9",
+                    "lane6": "0xfffffff2",
+                    "lane7": "0xfffffffd"
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                 "post2": {
                     "lane0": "0x0",
                     "lane1": "0x0",
                     "lane2": "0x0",
-                    "lane3": "-0x2",
+                    "lane3": "0xfffffffe",
                     "lane4": "0x0",
-                    "lane5": "-0x2",
+                    "lane5": "0xfffffffe",
                     "lane6": "0x0",
                     "lane7": "0x0"
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                 "post3": {
-                    "lane0": "-0x1",
-                    "lane1": "-0x3",
-                    "lane2": "-0x4",
-                    "lane3": "-0x3",
-                    "lane4": "-0x4",
-                    "lane5": "-0x3",
-                    "lane6": "-0x4",
-                    "lane7": "-0x1"
+                    "lane0": "0xffffffff",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xffffffff"
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                 "pre1": {
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-                    "lane1": "-0x10",
-                    "lane2": "-0xe",
-                    "lane3": "-0x10",
-                    "lane4": "-0xe",
-                    "lane5": "-0x10",
-                    "lane6": "-0xe",
-                    "lane7": "-0x10"
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff2",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff2",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff2",
+                    "lane7": "0xfffffff0"
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                 "pre2": {
                     "lane0": "0x2",
@@ -479,10 +479,10 @@
                     "lane3": "0x59"
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                 "post1": {
-                    "lane0": "-0x1d",
-                    "lane1": "-0x1d",
-                    "lane2": "-0x1d",
-                    "lane3": "-0x1d"
+                    "lane0": "0xffffffe3",
+                    "lane1": "0xffffffe3",
+                    "lane2": "0xffffffe3",
+                    "lane3": "0xffffffe3"
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                 "post2": {
                     "lane0": "0x0",
@@ -497,10 +497,10 @@
                     "lane3": "0x0"
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                 "pre1": {
-                    "lane0": "-0x8",
-                    "lane1": "-0x8",
-                    "lane2": "-0x8",
-                    "lane3": "-0x8"
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8"
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                 "pre2": {
                     "lane0": "0x0",
@@ -523,44 +523,44 @@
                     "lane7": "0x94"
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                 "post1": {
-                    "lane0": "-0x3",
-                    "lane1": "-0xe",
-                    "lane2": "-0x7",
-                    "lane3": "-0x7",
-                    "lane4": "-0x3",
-                    "lane5": "-0xe",
-                    "lane6": "-0x7",
-                    "lane7": "-0x3"
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff9",
+                    "lane3": "0xfffffff9",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffff2",
+                    "lane6": "0xfffffff9",
+                    "lane7": "0xfffffffd"
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                 "post2": {
                     "lane0": "0x0",
                     "lane1": "0x0",
-                    "lane2": "-0x2",
-                    "lane3": "-0x2",
+                    "lane2": "0xfffffffe",
+                    "lane3": "0xfffffffe",
                     "lane4": "0x0",
                     "lane5": "0x0",
-                    "lane6": "-0x2",
+                    "lane6": "0xfffffffe",
                     "lane7": "0x0"
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-                    "lane0": "-0x1",
-                    "lane1": "-0x4",
-                    "lane2": "-0x3",
-                    "lane3": "-0x3",
-                    "lane4": "-0x1",
-                    "lane5": "-0x4",
-                    "lane6": "-0x3",
-                    "lane7": "-0x1"
+                    "lane0": "0xffffffff",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xffffffff"
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-                    "lane1": "-0xe",
-                    "lane2": "-0x10",
-                    "lane3": "-0x10",
-                    "lane4": "-0x10",
-                    "lane5": "-0xe",
-                    "lane6": "-0x10",
-                    "lane7": "-0x10"
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff2",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
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                 "pre2": {
                     "lane0": "0x2",
@@ -581,10 +581,10 @@
                     "lane3": "0x59"
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-                    "lane0": "-0x1d",
-                    "lane1": "-0x1d",
-                    "lane2": "-0x1d",
-                    "lane3": "-0x1d"
+                    "lane0": "0xffffffe3",
+                    "lane1": "0xffffffe3",
+                    "lane2": "0xffffffe3",
+                    "lane3": "0xffffffe3"
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                 "post2": {
                     "lane0": "0x0",
@@ -599,10 +599,10 @@
                     "lane3": "0x0"
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-                    "lane0": "-0x8",
-                    "lane1": "-0x8",
-                    "lane2": "-0x8",
-                    "lane3": "-0x8"
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8"
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                 "pre2": {
                     "lane0": "0x0",
@@ -625,44 +625,44 @@
                     "lane7": "0x88"
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-                    "lane1": "-0xe",
-                    "lane2": "-0x7",
-                    "lane3": "-0xe",
-                    "lane4": "-0x3",
-                    "lane5": "-0x7",
-                    "lane6": "-0x7",
-                    "lane7": "-0xe"
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff9",
+                    "lane3": "0xfffffff2",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffff9",
+                    "lane6": "0xfffffff9",
+                    "lane7": "0xfffffff2"
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                 "post2": {
                     "lane0": "0x0",
                     "lane1": "0x0",
-                    "lane2": "-0x2",
+                    "lane2": "0xfffffffe",
                     "lane3": "0x0",
                     "lane4": "0x0",
-                    "lane5": "-0x2",
-                    "lane6": "-0x2",
+                    "lane5": "0xfffffffe",
+                    "lane6": "0xfffffffe",
                     "lane7": "0x0"
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-                    "lane1": "-0x4",
-                    "lane2": "-0x3",
-                    "lane3": "-0x4",
-                    "lane4": "-0x1",
-                    "lane5": "-0x3",
-                    "lane6": "-0x3",
-                    "lane7": "-0x4"
+                    "lane0": "0xffffffff",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffc"
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-                    "lane1": "-0xe",
-                    "lane2": "-0x10",
-                    "lane3": "-0xe",
-                    "lane4": "-0x10",
-                    "lane5": "-0x10",
-                    "lane6": "-0x10",
-                    "lane7": "-0xe"
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff2",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff2"
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@@ -683,10 +683,10 @@
                     "lane3": "0x59"
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-                    "lane0": "-0x1d",
-                    "lane1": "-0x1d",
-                    "lane2": "-0x1d",
-                    "lane3": "-0x1d"
+                    "lane0": "0xffffffe3",
+                    "lane1": "0xffffffe3",
+                    "lane2": "0xffffffe3",
+                    "lane3": "0xffffffe3"
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                 "post2": {
                     "lane0": "0x0",
@@ -701,10 +701,10 @@
                     "lane3": "0x0"
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-                    "lane0": "-0x8",
-                    "lane1": "-0x8",
-                    "lane2": "-0x8",
-                    "lane3": "-0x8"
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8"
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                 "pre2": {
                     "lane0": "0x0",
@@ -727,44 +727,44 @@
                     "lane7": "0x94"
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-                    "lane0": "-0x3",
-                    "lane1": "-0x3",
-                    "lane2": "-0xe",
-                    "lane3": "-0x7",
-                    "lane4": "-0xe",
-                    "lane5": "-0x7",
-                    "lane6": "-0xe",
-                    "lane7": "-0x3"
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffff2",
+                    "lane3": "0xfffffff9",
+                    "lane4": "0xfffffff2",
+                    "lane5": "0xfffffff9",
+                    "lane6": "0xfffffff2",
+                    "lane7": "0xfffffffd"
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                     "lane0": "0x0",
                     "lane1": "0x0",
                     "lane2": "0x0",
-                    "lane3": "-0x2",
+                    "lane3": "0xfffffffe",
                     "lane4": "0x0",
-                    "lane5": "-0x2",
+                    "lane5": "0xfffffffe",
                     "lane6": "0x0",
                     "lane7": "0x0"
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-                    "lane0": "-0x1",
-                    "lane1": "-0x1",
-                    "lane2": "-0x4",
-                    "lane3": "-0x3",
-                    "lane4": "-0x4",
-                    "lane5": "-0x3",
-                    "lane6": "-0x4",
-                    "lane7": "-0x1"
+                    "lane0": "0xffffffff",
+                    "lane1": "0xffffffff",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xffffffff"
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-                    "lane1": "-0x10",
-                    "lane2": "-0xe",
-                    "lane3": "-0x10",
-                    "lane4": "-0xe",
-                    "lane5": "-0x10",
-                    "lane6": "-0xe",
-                    "lane7": "-0x10"
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+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff2",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff2",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff2",
+                    "lane7": "0xfffffff0"
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@@ -785,10 +785,10 @@
                     "lane3": "0x59"
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-                    "lane0": "-0x1d",
-                    "lane1": "-0x1d",
-                    "lane2": "-0x1d",
-                    "lane3": "-0x1d"
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+                    "lane1": "0xffffffe3",
+                    "lane2": "0xffffffe3",
+                    "lane3": "0xffffffe3"
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@@ -803,10 +803,10 @@
                     "lane3": "0x0"
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-                    "lane0": "-0x8",
-                    "lane1": "-0x8",
-                    "lane2": "-0x8",
-                    "lane3": "-0x8"
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8"
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                     "lane0": "0x0",
@@ -829,44 +829,44 @@
                     "lane7": "0x94"
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-                    "lane0": "-0x3",
-                    "lane1": "-0xe",
-                    "lane2": "-0x7",
-                    "lane3": "-0x7",
-                    "lane4": "-0x3",
-                    "lane5": "-0xe",
-                    "lane6": "-0x7",
-                    "lane7": "-0x3"
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff9",
+                    "lane3": "0xfffffff9",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffff2",
+                    "lane6": "0xfffffff9",
+                    "lane7": "0xfffffffd"
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                     "lane0": "0x0",
                     "lane1": "0x0",
-                    "lane2": "-0x2",
-                    "lane3": "-0x2",
+                    "lane2": "0xfffffffe",
+                    "lane3": "0xfffffffe",
                     "lane4": "0x0",
                     "lane5": "0x0",
-                    "lane6": "-0x2",
+                    "lane6": "0xfffffffe",
                     "lane7": "0x0"
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-                    "lane0": "-0x1",
-                    "lane1": "-0x4",
-                    "lane2": "-0x3",
-                    "lane3": "-0x3",
-                    "lane4": "-0x1",
-                    "lane5": "-0x4",
-                    "lane6": "-0x3",
-                    "lane7": "-0x1"
+                    "lane0": "0xffffffff",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xffffffff"
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-                    "lane1": "-0xe",
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-                    "lane4": "-0x10",
-                    "lane5": "-0xe",
-                    "lane6": "-0x10",
-                    "lane7": "-0x10"
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+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff2",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
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@@ -887,10 +887,10 @@
                     "lane3": "0x59"
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-                    "lane0": "-0x1d",
-                    "lane1": "-0x1d",
-                    "lane2": "-0x1d",
-                    "lane3": "-0x1d"
+                    "lane0": "0xffffffe3",
+                    "lane1": "0xffffffe3",
+                    "lane2": "0xffffffe3",
+                    "lane3": "0xffffffe3"
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@@ -905,10 +905,10 @@
                     "lane3": "0x0"
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-                    "lane0": "-0x8",
-                    "lane1": "-0x8",
-                    "lane2": "-0x8",
-                    "lane3": "-0x8"
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8"
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@@ -931,44 +931,44 @@
                     "lane7": "0x94"
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-                    "lane1": "-0xe",
-                    "lane2": "-0x7",
-                    "lane3": "-0x7",
-                    "lane4": "-0x3",
-                    "lane5": "-0xe",
-                    "lane6": "-0x7",
-                    "lane7": "-0x3"
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff9",
+                    "lane3": "0xfffffff9",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffff2",
+                    "lane6": "0xfffffff9",
+                    "lane7": "0xfffffffd"
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                     "lane0": "0x0",
                     "lane1": "0x0",
-                    "lane2": "-0x2",
-                    "lane3": "-0x2",
+                    "lane2": "0xfffffffe",
+                    "lane3": "0xfffffffe",
                     "lane4": "0x0",
                     "lane5": "0x0",
-                    "lane6": "-0x2",
+                    "lane6": "0xfffffffe",
                     "lane7": "0x0"
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-                    "lane1": "-0x4",
-                    "lane2": "-0x3",
-                    "lane3": "-0x3",
-                    "lane4": "-0x1",
-                    "lane5": "-0x4",
-                    "lane6": "-0x3",
-                    "lane7": "-0x1"
+                    "lane0": "0xffffffff",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xffffffff"
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-                    "lane1": "-0xe",
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-                    "lane4": "-0x10",
-                    "lane5": "-0xe",
-                    "lane6": "-0x10",
-                    "lane7": "-0x10"
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+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff2",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
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@@ -989,10 +989,10 @@
                     "lane3": "0x53"
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-                    "lane0": "-0x15",
-                    "lane1": "-0x16",
-                    "lane2": "-0x14",
-                    "lane3": "-0x16"
+                    "lane0": "0xffffffeb",
+                    "lane1": "0xffffffea",
+                    "lane2": "0xffffffec",
+                    "lane3": "0xffffffea"
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@@ -1007,10 +1007,10 @@
                     "lane3": "0x0"
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-                    "lane0": "-0x6",
-                    "lane1": "-0x5",
-                    "lane2": "-0x5",
-                    "lane3": "-0x5"
+                    "lane0": "0xfffffffa",
+                    "lane1": "0xfffffffb",
+                    "lane2": "0xfffffffb",
+                    "lane3": "0xfffffffb"
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                     "lane0": "0x0",
@@ -1033,44 +1033,44 @@
                     "lane7": "0x94"
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-                    "lane1": "-0x3",
-                    "lane2": "-0xe",
-                    "lane3": "-0x7",
-                    "lane4": "-0xe",
-                    "lane5": "-0x7",
-                    "lane6": "-0xe",
-                    "lane7": "-0x3"
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffff2",
+                    "lane3": "0xfffffff9",
+                    "lane4": "0xfffffff2",
+                    "lane5": "0xfffffff9",
+                    "lane6": "0xfffffff2",
+                    "lane7": "0xfffffffd"
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                     "lane0": "0x0",
                     "lane1": "0x0",
                     "lane2": "0x0",
-                    "lane3": "-0x2",
+                    "lane3": "0xfffffffe",
                     "lane4": "0x0",
-                    "lane5": "-0x2",
+                    "lane5": "0xfffffffe",
                     "lane6": "0x0",
                     "lane7": "0x0"
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-                    "lane1": "-0x1",
-                    "lane2": "-0x4",
-                    "lane3": "-0x3",
-                    "lane4": "-0x4",
-                    "lane5": "-0x3",
-                    "lane6": "-0x4",
-                    "lane7": "-0x1"
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+                    "lane1": "0xffffffff",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffd",
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+                    "lane7": "0xffffffff"
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-                    "lane1": "-0x10",
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-                    "lane3": "-0x10",
-                    "lane4": "-0xe",
-                    "lane5": "-0x10",
-                    "lane6": "-0xe",
-                    "lane7": "-0x10"
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+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff2",
+                    "lane3": "0xfffffff0",
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+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff2",
+                    "lane7": "0xfffffff0"
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@@ -1091,10 +1091,10 @@
                     "lane3": "0x59"
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-                    "lane1": "-0x15",
-                    "lane2": "-0x1d",
-                    "lane3": "-0x1d"
+                    "lane0": "0xffffffeb",
+                    "lane1": "0xffffffeb",
+                    "lane2": "0xffffffe3",
+                    "lane3": "0xffffffe3"
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@@ -1109,10 +1109,10 @@
                     "lane3": "0x0"
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-                    "lane0": "-0x4",
-                    "lane1": "-0x4",
-                    "lane2": "-0x8",
-                    "lane3": "-0x8"
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8"
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                     "lane0": "0x0",
@@ -1135,44 +1135,44 @@
                     "lane7": "0x88"
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-                    "lane1": "-0xe",
-                    "lane2": "-0x7",
-                    "lane3": "-0xe",
-                    "lane4": "-0x3",
-                    "lane5": "-0x7",
-                    "lane6": "-0x7",
-                    "lane7": "-0xe"
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff9",
+                    "lane3": "0xfffffff2",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffff9",
+                    "lane6": "0xfffffff9",
+                    "lane7": "0xfffffff2"
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                     "lane0": "0x0",
                     "lane1": "0x0",
-                    "lane2": "-0x2",
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                     "lane3": "0x0",
                     "lane4": "0x0",
-                    "lane5": "-0x2",
-                    "lane6": "-0x2",
+                    "lane5": "0xfffffffe",
+                    "lane6": "0xfffffffe",
                     "lane7": "0x0"
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-                    "lane1": "-0x4",
-                    "lane2": "-0x3",
-                    "lane3": "-0x4",
-                    "lane4": "-0x1",
-                    "lane5": "-0x3",
-                    "lane6": "-0x3",
-                    "lane7": "-0x4"
+                    "lane0": "0xffffffff",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffc"
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-                    "lane1": "-0xe",
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-                    "lane3": "-0xe",
-                    "lane4": "-0x10",
-                    "lane5": "-0x10",
-                    "lane6": "-0x10",
-                    "lane7": "-0xe"
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+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff2",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff2"
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@@ -1193,10 +1193,10 @@
                     "lane3": "0x53"
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-                    "lane1": "-0x16",
-                    "lane2": "-0x15",
-                    "lane3": "-0x16"
+                    "lane0": "0xffffffeb",
+                    "lane1": "0xffffffea",
+                    "lane2": "0xffffffeb",
+                    "lane3": "0xffffffea"
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@@ -1211,10 +1211,10 @@
                     "lane3": "0x0"
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-                    "lane1": "-0x5",
-                    "lane2": "-0x6",
-                    "lane3": "-0x5"
+                    "lane0": "0xfffffffa",
+                    "lane1": "0xfffffffb",
+                    "lane2": "0xfffffffa",
+                    "lane3": "0xfffffffb"
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                     "lane0": "0x0",
@@ -1237,44 +1237,44 @@
                     "lane7": "0x94"
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-                    "lane1": "-0xe",
-                    "lane2": "-0x7",
-                    "lane3": "-0x7",
-                    "lane4": "-0x3",
-                    "lane5": "-0xe",
-                    "lane6": "-0x7",
-                    "lane7": "-0x3"
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff9",
+                    "lane3": "0xfffffff9",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffff2",
+                    "lane6": "0xfffffff9",
+                    "lane7": "0xfffffffd"
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                     "lane0": "0x0",
                     "lane1": "0x0",
-                    "lane2": "-0x2",
-                    "lane3": "-0x2",
+                    "lane2": "0xfffffffe",
+                    "lane3": "0xfffffffe",
                     "lane4": "0x0",
                     "lane5": "0x0",
-                    "lane6": "-0x2",
+                    "lane6": "0xfffffffe",
                     "lane7": "0x0"
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-                    "lane1": "-0x4",
-                    "lane2": "-0x3",
-                    "lane3": "-0x3",
-                    "lane4": "-0x1",
-                    "lane5": "-0x4",
-                    "lane6": "-0x3",
-                    "lane7": "-0x1"
+                    "lane0": "0xffffffff",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xffffffff"
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-                    "lane1": "-0xe",
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-                    "lane4": "-0x10",
-                    "lane5": "-0xe",
-                    "lane6": "-0x10",
-                    "lane7": "-0x10"
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+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff2",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
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@@ -1295,10 +1295,10 @@
                     "lane3": "0x4b"
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-                    "lane1": "-0x16",
-                    "lane2": "-0x16",
-                    "lane3": "-0x14"
+                    "lane0": "0xffffffea",
+                    "lane1": "0xffffffea",
+                    "lane2": "0xffffffea",
+                    "lane3": "0xffffffec"
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@@ -1313,10 +1313,10 @@
                     "lane3": "0x0"
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-                    "lane1": "-0x5",
-                    "lane2": "-0x5",
-                    "lane3": "-0x5"
+                    "lane0": "0xfffffffb",
+                    "lane1": "0xfffffffb",
+                    "lane2": "0xfffffffb",
+                    "lane3": "0xfffffffb"
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                     "lane0": "0x0",
@@ -1339,44 +1339,44 @@
                     "lane7": "0x94"
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-                    "lane1": "-0x3",
-                    "lane2": "-0xe",
-                    "lane3": "-0x7",
-                    "lane4": "-0xe",
-                    "lane5": "-0x7",
-                    "lane6": "-0xe",
-                    "lane7": "-0x3"
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffff2",
+                    "lane3": "0xfffffff9",
+                    "lane4": "0xfffffff2",
+                    "lane5": "0xfffffff9",
+                    "lane6": "0xfffffff2",
+                    "lane7": "0xfffffffd"
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                     "lane1": "0x0",
                     "lane2": "0x0",
-                    "lane3": "-0x2",
+                    "lane3": "0xfffffffe",
                     "lane4": "0x0",
-                    "lane5": "-0x2",
+                    "lane5": "0xfffffffe",
                     "lane6": "0x0",
                     "lane7": "0x0"
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-                    "lane1": "-0x1",
-                    "lane2": "-0x4",
-                    "lane3": "-0x3",
-                    "lane4": "-0x4",
-                    "lane5": "-0x3",
-                    "lane6": "-0x4",
-                    "lane7": "-0x1"
+                    "lane0": "0xffffffff",
+                    "lane1": "0xffffffff",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffd",
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+                    "lane5": "0xfffffffd",
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+                    "lane7": "0xffffffff"
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-                    "lane3": "-0x10",
-                    "lane4": "-0xe",
-                    "lane5": "-0x10",
-                    "lane6": "-0xe",
-                    "lane7": "-0x10"
+                    "lane0": "0xfffffff0",
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+                    "lane3": "0xfffffff0",
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+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff2",
+                    "lane7": "0xfffffff0"
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@@ -1397,10 +1397,10 @@
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-                    "lane1": "-0x19",
-                    "lane2": "-0x15",
-                    "lane3": "-0x17"
+                    "lane0": "0xffffffe7",
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+                    "lane2": "0xffffffeb",
+                    "lane3": "0xffffffe9"
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@@ -1415,10 +1415,10 @@
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-                    "lane1": "-0x7",
-                    "lane2": "-0x4",
-                    "lane3": "-0x5"
+                    "lane0": "0xfffffff9",
+                    "lane1": "0xfffffff9",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffb"
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@@ -1441,44 +1441,44 @@
                     "lane7": "0x88"
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-                    "lane0": "-0xc",
-                    "lane1": "-0xe",
-                    "lane2": "-0x7",
-                    "lane3": "-0x5",
-                    "lane4": "-0x3",
-                    "lane5": "-0x7",
-                    "lane6": "-0x7",
-                    "lane7": "-0xe"
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff9",
+                    "lane3": "0xfffffffb",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffff9",
+                    "lane6": "0xfffffff9",
+                    "lane7": "0xfffffff2"
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                 "post2": {
                     "lane0": "0x0",
                     "lane1": "0x0",
-                    "lane2": "-0x2",
-                    "lane3": "-0x2",
+                    "lane2": "0xfffffffe",
+                    "lane3": "0xfffffffe",
                     "lane4": "0x0",
-                    "lane5": "-0x2",
-                    "lane6": "-0x2",
+                    "lane5": "0xfffffffe",
+                    "lane6": "0xfffffffe",
                     "lane7": "0x0"
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                 "post3": {
-                    "lane0": "-0x5",
-                    "lane1": "-0x4",
-                    "lane2": "-0x3",
-                    "lane3": "-0x3",
-                    "lane4": "-0x1",
-                    "lane5": "-0x3",
-                    "lane6": "-0x3",
-                    "lane7": "-0x4"
+                    "lane0": "0xfffffffb",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffc"
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-                    "lane1": "-0xe",
-                    "lane2": "-0x10",
-                    "lane3": "-0x10",
-                    "lane4": "-0x10",
-                    "lane5": "-0x10",
-                    "lane6": "-0x10",
-                    "lane7": "-0xe"
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff2"
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                     "lane0": "0x3",
@@ -1499,10 +1499,10 @@
                     "lane3": "0x53"
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                 "post1": {
-                    "lane0": "-0x16",
-                    "lane1": "-0x16",
-                    "lane2": "-0x15",
-                    "lane3": "-0x16"
+                    "lane0": "0xffffffea",
+                    "lane1": "0xffffffea",
+                    "lane2": "0xffffffeb",
+                    "lane3": "0xffffffea"
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                     "lane0": "0x0",
@@ -1517,10 +1517,10 @@
                     "lane3": "0x0"
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-                    "lane0": "-0x5",
-                    "lane1": "-0x5",
-                    "lane2": "-0x6",
-                    "lane3": "-0x5"
+                    "lane0": "0xfffffffb",
+                    "lane1": "0xfffffffb",
+                    "lane2": "0xfffffffa",
+                    "lane3": "0xfffffffb"
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                     "lane0": "0x0",
@@ -1543,44 +1543,44 @@
                     "lane7": "0x94"
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-                    "lane0": "-0x3",
-                    "lane1": "-0xe",
-                    "lane2": "-0x7",
-                    "lane3": "-0x7",
-                    "lane4": "-0x3",
-                    "lane5": "-0xe",
-                    "lane6": "-0x7",
-                    "lane7": "-0x3"
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff9",
+                    "lane3": "0xfffffff9",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffff2",
+                    "lane6": "0xfffffff9",
+                    "lane7": "0xfffffffd"
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                 "post2": {
                     "lane0": "0x0",
                     "lane1": "0x0",
-                    "lane2": "-0x2",
-                    "lane3": "-0x2",
+                    "lane2": "0xfffffffe",
+                    "lane3": "0xfffffffe",
                     "lane4": "0x0",
                     "lane5": "0x0",
-                    "lane6": "-0x2",
+                    "lane6": "0xfffffffe",
                     "lane7": "0x0"
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-                    "lane0": "-0x1",
-                    "lane1": "-0x4",
-                    "lane2": "-0x3",
-                    "lane3": "-0x3",
-                    "lane4": "-0x1",
-                    "lane5": "-0x4",
-                    "lane6": "-0x3",
-                    "lane7": "-0x1"
+                    "lane0": "0xffffffff",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xffffffff"
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-                    "lane1": "-0xe",
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-                    "lane3": "-0x10",
-                    "lane4": "-0x10",
-                    "lane5": "-0xe",
-                    "lane6": "-0x10",
-                    "lane7": "-0x10"
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff2",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
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@@ -1601,10 +1601,10 @@
                     "lane3": "0x50"
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-                    "lane0": "-0x19",
-                    "lane1": "-0x15",
-                    "lane2": "-0x1d",
-                    "lane3": "-0x17"
+                    "lane0": "0xffffffe7",
+                    "lane1": "0xffffffeb",
+                    "lane2": "0xffffffe3",
+                    "lane3": "0xffffffe9"
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@@ -1619,10 +1619,10 @@
                     "lane3": "0x0"
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-                    "lane0": "-0x7",
-                    "lane1": "-0x4",
-                    "lane2": "-0x8",
-                    "lane3": "-0x5"
+                    "lane0": "0xfffffff9",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffffb"
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@@ -1645,44 +1645,44 @@
                     "lane7": "0x90"
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-                    "lane1": "-0x1",
-                    "lane2": "-0xc",
-                    "lane3": "-0xe",
-                    "lane4": "-0x7",
-                    "lane5": "-0xc",
-                    "lane6": "-0x5",
-                    "lane7": "-0x1"
+                    "lane0": "0xfffffffb",
+                    "lane1": "0xffffffff",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffff2",
+                    "lane4": "0xfffffff9",
+                    "lane5": "0xfffffff4",
+                    "lane6": "0xfffffffb",
+                    "lane7": "0xffffffff"
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-                    "lane0": "-0x2",
-                    "lane1": "-0x3",
+                    "lane0": "0xfffffffe",
+                    "lane1": "0xfffffffd",
                     "lane2": "0x0",
                     "lane3": "0x0",
-                    "lane4": "-0x2",
+                    "lane4": "0xfffffffe",
                     "lane5": "0x0",
-                    "lane6": "-0x2",
-                    "lane7": "-0x3"
+                    "lane6": "0xfffffffe",
+                    "lane7": "0xfffffffd"
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-                    "lane1": "-0x3",
-                    "lane2": "-0x3",
-                    "lane3": "-0x4",
-                    "lane4": "-0x3",
-                    "lane5": "-0x3",
-                    "lane6": "-0x3",
-                    "lane7": "-0x3"
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffd"
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-                    "lane1": "-0x11",
-                    "lane2": "-0x10",
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-                    "lane4": "-0x10",
-                    "lane5": "-0x10",
-                    "lane6": "-0x10",
-                    "lane7": "-0x11"
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+                    "lane1": "0xffffffef",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff2",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xffffffef"
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@@ -1703,10 +1703,10 @@
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-                    "lane1": "-0x16",
-                    "lane2": "-0x15",
-                    "lane3": "-0x15"
+                    "lane0": "0xffffffea",
+                    "lane1": "0xffffffea",
+                    "lane2": "0xffffffeb",
+                    "lane3": "0xffffffeb"
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@@ -1721,10 +1721,10 @@
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-                    "lane1": "-0x5",
-                    "lane2": "-0x6",
-                    "lane3": "-0x6"
+                    "lane0": "0xfffffffb",
+                    "lane1": "0xfffffffb",
+                    "lane2": "0xfffffffa",
+                    "lane3": "0xfffffffa"
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@@ -1747,44 +1747,44 @@
                     "lane7": "0x8d"
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-                    "lane2": "-0x8",
-                    "lane3": "-0x8",
-                    "lane4": "-0xc",
-                    "lane5": "-0x5",
-                    "lane6": "-0xc",
-                    "lane7": "-0x5"
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffffb",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0xfffffffb",
+                    "lane6": "0xfffffff4",
+                    "lane7": "0xfffffffb"
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                     "lane0": "0x0",
-                    "lane1": "-0x2",
-                    "lane2": "-0x3",
-                    "lane3": "-0x3",
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+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
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-                    "lane5": "-0x2",
+                    "lane5": "0xfffffffe",
                     "lane6": "0x0",
-                    "lane7": "-0x2"
+                    "lane7": "0xfffffffe"
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-                    "lane1": "-0x3",
-                    "lane2": "-0x1",
-                    "lane3": "-0x1",
-                    "lane4": "-0x3",
-                    "lane5": "-0x3",
-                    "lane6": "-0x3",
-                    "lane7": "-0x3"
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+                    "lane1": "0xfffffffd",
+                    "lane2": "0xffffffff",
+                    "lane3": "0xffffffff",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffffd",
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-                    "lane4": "-0x10",
-                    "lane5": "-0x10",
-                    "lane6": "-0x10",
-                    "lane7": "-0x10"
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+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff1",
+                    "lane3": "0xfffffff1",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
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@@ -1805,10 +1805,10 @@
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-                    "lane1": "-0x1d",
-                    "lane2": "-0x1d",
-                    "lane3": "-0x15"
+                    "lane0": "0xffffffeb",
+                    "lane1": "0xffffffe3",
+                    "lane2": "0xffffffe3",
+                    "lane3": "0xffffffeb"
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@@ -1823,10 +1823,10 @@
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-                    "lane1": "-0x8",
-                    "lane2": "-0x8",
-                    "lane3": "-0x4"
+                    "lane0": "0xfffffffc",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffffc"
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@@ -1849,44 +1849,44 @@
                     "lane7": "0x8d"
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-                    "lane1": "-0x5",
-                    "lane2": "-0x1",
-                    "lane3": "-0x1",
-                    "lane4": "-0xc",
-                    "lane5": "-0x5",
-                    "lane6": "-0xc",
-                    "lane7": "-0x5"
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffffb",
+                    "lane2": "0xffffffff",
+                    "lane3": "0xffffffff",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0xfffffffb",
+                    "lane6": "0xfffffff4",
+                    "lane7": "0xfffffffb"
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                     "lane0": "0x0",
-                    "lane1": "-0x2",
-                    "lane2": "-0x3",
-                    "lane3": "-0x3",
+                    "lane1": "0xfffffffe",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
                     "lane4": "0x0",
-                    "lane5": "-0x2",
+                    "lane5": "0xfffffffe",
                     "lane6": "0x0",
-                    "lane7": "-0x2"
+                    "lane7": "0xfffffffe"
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-                    "lane1": "-0x3",
-                    "lane2": "-0x3",
-                    "lane3": "-0x3",
-                    "lane4": "-0x3",
-                    "lane5": "-0x3",
-                    "lane6": "-0x3",
-                    "lane7": "-0x3"
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffd"
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-                    "lane4": "-0x10",
-                    "lane5": "-0x10",
-                    "lane6": "-0x10",
-                    "lane7": "-0x10"
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+                    "lane1": "0xfffffff0",
+                    "lane2": "0xffffffef",
+                    "lane3": "0xffffffef",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
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@@ -1907,10 +1907,10 @@
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-                    "lane1": "-0x19",
-                    "lane2": "-0x17",
-                    "lane3": "-0x17"
+                    "lane0": "0xffffffe7",
+                    "lane1": "0xffffffe7",
+                    "lane2": "0xffffffe9",
+                    "lane3": "0xffffffe9"
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@@ -1925,10 +1925,10 @@
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-                    "lane1": "-0x7",
-                    "lane2": "-0x5",
-                    "lane3": "-0x5"
+                    "lane0": "0xfffffff9",
+                    "lane1": "0xfffffff9",
+                    "lane2": "0xfffffffb",
+                    "lane3": "0xfffffffb"
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@@ -1951,44 +1951,44 @@
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-                    "lane1": "-0x8",
-                    "lane2": "-0xc",
-                    "lane3": "-0x5",
-                    "lane4": "-0x8",
-                    "lane5": "-0xc",
-                    "lane6": "-0x5",
-                    "lane7": "-0x8"
+                    "lane0": "0xfffffffb",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffffb",
+                    "lane4": "0xfffffff8",
+                    "lane5": "0xfffffff4",
+                    "lane6": "0xfffffffb",
+                    "lane7": "0xfffffff8"
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                 "post2": {
-                    "lane0": "-0x2",
-                    "lane1": "-0x3",
+                    "lane0": "0xfffffffe",
+                    "lane1": "0xfffffffd",
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-                    "lane3": "-0x2",
-                    "lane4": "-0x3",
+                    "lane3": "0xfffffffe",
+                    "lane4": "0xfffffffd",
                     "lane5": "0x0",
-                    "lane6": "-0x2",
-                    "lane7": "-0x3"
+                    "lane6": "0xfffffffe",
+                    "lane7": "0xfffffffd"
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-                    "lane1": "-0x1",
-                    "lane2": "-0x3",
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-                    "lane4": "-0x1",
-                    "lane5": "-0x3",
-                    "lane6": "-0x3",
-                    "lane7": "-0x1"
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+                    "lane4": "0xffffffff",
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+                    "lane7": "0xffffffff"
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-                    "lane3": "-0x10",
-                    "lane4": "-0xf",
-                    "lane5": "-0x10",
-                    "lane6": "-0x10",
-                    "lane7": "-0xf"
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+                    "lane3": "0xfffffff0",
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+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff1"
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@@ -2009,10 +2009,10 @@
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-                    "lane1": "-0x14",
-                    "lane2": "-0x16",
-                    "lane3": "-0x16"
+                    "lane0": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane2": "0xffffffea",
+                    "lane3": "0xffffffea"
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@@ -2027,10 +2027,10 @@
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-                    "lane1": "-0x5",
-                    "lane2": "-0x5",
-                    "lane3": "-0x5"
+                    "lane0": "0xfffffffb",
+                    "lane1": "0xfffffffb",
+                    "lane2": "0xfffffffb",
+                    "lane3": "0xfffffffb"
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@@ -2053,44 +2053,44 @@
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-                    "lane3": "-0x7",
-                    "lane4": "-0x3",
-                    "lane5": "-0xe",
-                    "lane6": "-0x7",
-                    "lane7": "-0xc"
+                    "lane0": "0xfffffffd",
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+                    "lane2": "0xfffffff9",
+                    "lane3": "0xfffffff9",
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+                    "lane5": "0xfffffff2",
+                    "lane6": "0xfffffff9",
+                    "lane7": "0xfffffff4"
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                     "lane0": "0x0",
                     "lane1": "0x0",
-                    "lane2": "-0x2",
-                    "lane3": "-0x2",
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                     "lane5": "0x0",
-                    "lane6": "-0x2",
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-                    "lane6": "-0x3",
-                    "lane7": "-0x3"
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+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffd"
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-                    "lane1": "-0xe",
-                    "lane2": "-0x10",
-                    "lane3": "-0x10",
-                    "lane4": "-0x10",
-                    "lane5": "-0xe",
-                    "lane6": "-0x10",
-                    "lane7": "-0x10"
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff2",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
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                     "lane0": "0x2",
@@ -2111,10 +2111,10 @@
                     "lane3": "0x55"
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-                    "lane0": "-0x17",
-                    "lane1": "-0x17",
-                    "lane2": "-0x19",
-                    "lane3": "-0x19"
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+                    "lane1": "0xffffffe9",
+                    "lane2": "0xffffffe7",
+                    "lane3": "0xffffffe7"
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                     "lane0": "0x0",
@@ -2129,10 +2129,10 @@
                     "lane3": "0x0"
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-                    "lane0": "-0x5",
-                    "lane1": "-0x5",
-                    "lane2": "-0x7",
-                    "lane3": "-0x7"
+                    "lane0": "0xfffffffb",
+                    "lane1": "0xfffffffb",
+                    "lane2": "0xfffffff9",
+                    "lane3": "0xfffffff9"
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                 "pre2": {
                     "lane0": "0x0",
@@ -2155,44 +2155,44 @@
                     "lane7": "0x88"
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                 "post1": {
-                    "lane0": "-0xc",
-                    "lane1": "-0xe",
-                    "lane2": "-0x7",
-                    "lane3": "-0xe",
-                    "lane4": "-0x3",
-                    "lane5": "-0x7",
-                    "lane6": "-0x7",
-                    "lane7": "-0xe"
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff9",
+                    "lane3": "0xfffffff2",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffff9",
+                    "lane6": "0xfffffff9",
+                    "lane7": "0xfffffff2"
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                 "post2": {
                     "lane0": "0x0",
                     "lane1": "0x0",
-                    "lane2": "-0x2",
+                    "lane2": "0xfffffffe",
                     "lane3": "0x0",
                     "lane4": "0x0",
-                    "lane5": "-0x2",
-                    "lane6": "-0x2",
+                    "lane5": "0xfffffffe",
+                    "lane6": "0xfffffffe",
                     "lane7": "0x0"
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                 "post3": {
-                    "lane0": "-0x3",
-                    "lane1": "-0x4",
-                    "lane2": "-0x3",
-                    "lane3": "-0x4",
-                    "lane4": "-0x1",
-                    "lane5": "-0x3",
-                    "lane6": "-0x3",
-                    "lane7": "-0x4"
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffc"
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-                    "lane1": "-0xe",
-                    "lane2": "-0x10",
-                    "lane3": "-0xe",
-                    "lane4": "-0x10",
-                    "lane5": "-0x10",
-                    "lane6": "-0x10",
-                    "lane7": "-0xe"
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff2",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff2"
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                     "lane0": "0x2",
@@ -2213,10 +2213,10 @@
                     "lane3": "0x59"
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-                    "lane0": "-0x1d",
-                    "lane1": "-0x1d",
-                    "lane2": "-0x1d",
-                    "lane3": "-0x1d"
+                    "lane0": "0xffffffe3",
+                    "lane1": "0xffffffe3",
+                    "lane2": "0xffffffe3",
+                    "lane3": "0xffffffe3"
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                 "post2": {
                     "lane0": "0x0",
@@ -2231,10 +2231,10 @@
                     "lane3": "0x0"
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                 "pre1": {
-                    "lane0": "-0x8",
-                    "lane1": "-0x8",
-                    "lane2": "-0x8",
-                    "lane3": "-0x8"
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8"
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                 "pre2": {
                     "lane0": "0x0",
@@ -2257,44 +2257,44 @@
                     "lane7": "0x94"
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-                    "lane0": "-0x3",
-                    "lane1": "-0x3",
-                    "lane2": "-0xe",
-                    "lane3": "-0x7",
-                    "lane4": "-0xe",
-                    "lane5": "-0x7",
-                    "lane6": "-0xe",
-                    "lane7": "-0x3"
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffff2",
+                    "lane3": "0xfffffff9",
+                    "lane4": "0xfffffff2",
+                    "lane5": "0xfffffff9",
+                    "lane6": "0xfffffff2",
+                    "lane7": "0xfffffffd"
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                 "post2": {
                     "lane0": "0x0",
                     "lane1": "0x0",
                     "lane2": "0x0",
-                    "lane3": "-0x2",
+                    "lane3": "0xfffffffe",
                     "lane4": "0x0",
-                    "lane5": "-0x2",
+                    "lane5": "0xfffffffe",
                     "lane6": "0x0",
                     "lane7": "0x0"
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-                    "lane0": "-0x1",
-                    "lane1": "-0x1",
-                    "lane2": "-0x4",
-                    "lane3": "-0x3",
-                    "lane4": "-0x4",
-                    "lane5": "-0x3",
-                    "lane6": "-0x4",
-                    "lane7": "-0x1"
+                    "lane0": "0xffffffff",
+                    "lane1": "0xffffffff",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xffffffff"
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-                    "lane1": "-0x10",
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-                    "lane3": "-0x10",
-                    "lane4": "-0xe",
-                    "lane5": "-0x10",
-                    "lane6": "-0xe",
-                    "lane7": "-0x10"
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff2",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff2",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff2",
+                    "lane7": "0xfffffff0"
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                     "lane0": "0x2",
@@ -2315,10 +2315,10 @@
                     "lane3": "0x59"
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-                    "lane0": "-0x1d",
-                    "lane1": "-0x1d",
-                    "lane2": "-0x1d",
-                    "lane3": "-0x1d"
+                    "lane0": "0xffffffe3",
+                    "lane1": "0xffffffe3",
+                    "lane2": "0xffffffe3",
+                    "lane3": "0xffffffe3"
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                     "lane0": "0x0",
@@ -2333,10 +2333,10 @@
                     "lane3": "0x0"
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-                    "lane0": "-0x8",
-                    "lane1": "-0x8",
-                    "lane2": "-0x8",
-                    "lane3": "-0x8"
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8"
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                     "lane0": "0x0",
@@ -2359,44 +2359,44 @@
                     "lane7": "0x94"
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-                    "lane1": "-0xe",
-                    "lane2": "-0x7",
-                    "lane3": "-0x7",
-                    "lane4": "-0x3",
-                    "lane5": "-0xe",
-                    "lane6": "-0x7",
-                    "lane7": "-0x3"
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff9",
+                    "lane3": "0xfffffff9",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffff2",
+                    "lane6": "0xfffffff9",
+                    "lane7": "0xfffffffd"
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                 "post2": {
                     "lane0": "0x0",
                     "lane1": "0x0",
-                    "lane2": "-0x2",
-                    "lane3": "-0x2",
+                    "lane2": "0xfffffffe",
+                    "lane3": "0xfffffffe",
                     "lane4": "0x0",
                     "lane5": "0x0",
-                    "lane6": "-0x2",
+                    "lane6": "0xfffffffe",
                     "lane7": "0x0"
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-                    "lane1": "-0x4",
-                    "lane2": "-0x3",
-                    "lane3": "-0x3",
-                    "lane4": "-0x1",
-                    "lane5": "-0x4",
-                    "lane6": "-0x3",
-                    "lane7": "-0x1"
+                    "lane0": "0xffffffff",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xffffffff"
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-                    "lane4": "-0x10",
-                    "lane5": "-0xe",
-                    "lane6": "-0x10",
-                    "lane7": "-0x10"
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+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff2",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
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                     "lane0": "0x2",
@@ -2417,10 +2417,10 @@
                     "lane3": "0x59"
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-                    "lane0": "-0x1d",
-                    "lane1": "-0x1d",
-                    "lane2": "-0x1d",
-                    "lane3": "-0x1d"
+                    "lane0": "0xffffffe3",
+                    "lane1": "0xffffffe3",
+                    "lane2": "0xffffffe3",
+                    "lane3": "0xffffffe3"
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@@ -2435,10 +2435,10 @@
                     "lane3": "0x0"
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-                    "lane0": "-0x8",
-                    "lane1": "-0x8",
-                    "lane2": "-0x8",
-                    "lane3": "-0x8"
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8"
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                     "lane0": "0x0",
@@ -2461,44 +2461,44 @@
                     "lane7": "0x88"
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-                    "lane1": "-0xe",
-                    "lane2": "-0x7",
-                    "lane3": "-0xe",
-                    "lane4": "-0x3",
-                    "lane5": "-0x7",
-                    "lane6": "-0x7",
-                    "lane7": "-0xe"
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff9",
+                    "lane3": "0xfffffff2",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffff9",
+                    "lane6": "0xfffffff9",
+                    "lane7": "0xfffffff2"
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                     "lane0": "0x0",
                     "lane1": "0x0",
-                    "lane2": "-0x2",
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                     "lane3": "0x0",
                     "lane4": "0x0",
-                    "lane5": "-0x2",
-                    "lane6": "-0x2",
+                    "lane5": "0xfffffffe",
+                    "lane6": "0xfffffffe",
                     "lane7": "0x0"
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-                    "lane1": "-0x4",
-                    "lane2": "-0x3",
-                    "lane3": "-0x4",
-                    "lane4": "-0x1",
-                    "lane5": "-0x3",
-                    "lane6": "-0x3",
-                    "lane7": "-0x4"
+                    "lane0": "0xffffffff",
+                    "lane1": "0xfffffffc",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffc",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffc"
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-                    "lane3": "-0xe",
-                    "lane4": "-0x10",
-                    "lane5": "-0x10",
-                    "lane6": "-0x10",
-                    "lane7": "-0xe"
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff2",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff2"
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                 "pre2": {
                     "lane0": "0x2",
@@ -2519,10 +2519,10 @@
                     "lane3": "0x59"
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-                    "lane1": "-0x1d",
-                    "lane2": "-0x1d",
-                    "lane3": "-0x1d"
+                    "lane0": "0xffffffe3",
+                    "lane1": "0xffffffe3",
+                    "lane2": "0xffffffe3",
+                    "lane3": "0xffffffe3"
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                     "lane0": "0x0",
@@ -2537,10 +2537,10 @@
                     "lane3": "0x0"
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-                    "lane1": "-0x8",
-                    "lane2": "-0x8",
-                    "lane3": "-0x8"
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8"
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                     "lane0": "0x0",
@@ -2563,44 +2563,44 @@
                     "lane7": "0x94"
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-                    "lane1": "-0x3",
-                    "lane2": "-0xe",
-                    "lane3": "-0x7",
-                    "lane4": "-0xe",
-                    "lane5": "-0x7",
-                    "lane6": "-0xe",
-                    "lane7": "-0x3"
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffff2",
+                    "lane3": "0xfffffff9",
+                    "lane4": "0xfffffff2",
+                    "lane5": "0xfffffff9",
+                    "lane6": "0xfffffff2",
+                    "lane7": "0xfffffffd"
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                 "post2": {
                     "lane0": "0x0",
                     "lane1": "0x0",
                     "lane2": "0x0",
-                    "lane3": "-0x2",
+                    "lane3": "0xfffffffe",
                     "lane4": "0x0",
-                    "lane5": "-0x2",
+                    "lane5": "0xfffffffe",
                     "lane6": "0x0",
                     "lane7": "0x0"
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-                    "lane1": "-0x1",
-                    "lane2": "-0x4",
-                    "lane3": "-0x3",
-                    "lane4": "-0x4",
-                    "lane5": "-0x3",
-                    "lane6": "-0x4",
-                    "lane7": "-0x1"
+                    "lane0": "0xffffffff",
+                    "lane1": "0xffffffff",
+                    "lane2": "0xfffffffc",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xfffffffc",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffc",
+                    "lane7": "0xffffffff"
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-                    "lane1": "-0x10",
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-                    "lane3": "-0x10",
-                    "lane4": "-0xe",
-                    "lane5": "-0x10",
-                    "lane6": "-0xe",
-                    "lane7": "-0x10"
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff2",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xfffffff2",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff2",
+                    "lane7": "0xfffffff0"
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                     "lane0": "0x2",
@@ -2621,10 +2621,10 @@
                     "lane3": "0x59"
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-                    "lane0": "-0x1d",
-                    "lane1": "-0x1d",
-                    "lane2": "-0x1d",
-                    "lane3": "-0x1d"
+                    "lane0": "0xffffffe3",
+                    "lane1": "0xffffffe3",
+                    "lane2": "0xffffffe3",
+                    "lane3": "0xffffffe3"
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                 "post2": {
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@@ -2639,10 +2639,10 @@
                     "lane3": "0x0"
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-                    "lane1": "-0x8",
-                    "lane2": "-0x8",
-                    "lane3": "-0x8"
+                    "lane0": "0xfffffff8",
+                    "lane1": "0xfffffff8",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8"
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                 "pre2": {
                     "lane0": "0x0",
@@ -2665,44 +2665,44 @@
                     "lane7": "0x94"
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-                    "lane1": "-0xe",
-                    "lane2": "-0x7",
-                    "lane3": "-0x7",
-                    "lane4": "-0x3",
-                    "lane5": "-0xe",
-                    "lane6": "-0x7",
-                    "lane7": "-0x3"
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff9",
+                    "lane3": "0xfffffff9",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffff2",
+                    "lane6": "0xfffffff9",
+                    "lane7": "0xfffffffd"
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                     "lane0": "0x0",
                     "lane1": "0x0",
-                    "lane2": "-0x2",
-                    "lane3": "-0x2",
+                    "lane2": "0xfffffffe",
+                    "lane3": "0xfffffffe",
                     "lane4": "0x0",
                     "lane5": "0x0",
-                    "lane6": "-0x2",
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                     "lane7": "0x0"
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-                    "lane1": "-0x4",
-                    "lane2": "-0x3",
-                    "lane3": "-0x3",
-                    "lane4": "-0x1",
-                    "lane5": "-0x4",
-                    "lane6": "-0x3",
-                    "lane7": "-0x1"
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+                    "lane1": "0xfffffffc",
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+                    "lane3": "0xfffffffd",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xfffffffc",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xffffffff"
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-                    "lane4": "-0x10",
-                    "lane5": "-0xe",
-                    "lane6": "-0x10",
-                    "lane7": "-0x10"
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+                    "lane4": "0xfffffff0",
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+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
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@@ -2723,10 +2723,10 @@
                     "lane3": "0x59"
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-                    "lane1": "-0x1d",
-                    "lane2": "-0x1d",
-                    "lane3": "-0x1d"
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+                    "lane2": "0xffffffe3",
+                    "lane3": "0xffffffe3"
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@@ -2741,10 +2741,10 @@
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-                    "lane1": "-0x8",
-                    "lane2": "-0x8",
-                    "lane3": "-0x8"
+                    "lane0": "0xfffffff8",
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+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8"
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@@ -2767,44 +2767,44 @@
                     "lane7": "0x94"
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-                    "lane4": "-0x3",
-                    "lane5": "-0xe",
-                    "lane6": "-0x7",
-                    "lane7": "-0x3"
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffff2",
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+                    "lane3": "0xfffffff9",
+                    "lane4": "0xfffffffd",
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+                    "lane7": "0xfffffffd"
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                     "lane0": "0x0",
                     "lane1": "0x0",
-                    "lane2": "-0x2",
-                    "lane3": "-0x2",
+                    "lane2": "0xfffffffe",
+                    "lane3": "0xfffffffe",
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                     "lane5": "0x0",
-                    "lane6": "-0x2",
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-                    "lane1": "-0x4",
-                    "lane2": "-0x3",
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-                    "lane4": "-0x1",
-                    "lane5": "-0x4",
-                    "lane6": "-0x3",
-                    "lane7": "-0x1"
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-                    "lane4": "-0x10",
-                    "lane5": "-0xe",
-                    "lane6": "-0x10",
-                    "lane7": "-0x10"
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@@ -2825,10 +2825,10 @@
                     "lane3": "0x4b"
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-                    "lane1": "-0x16",
-                    "lane2": "-0x14",
-                    "lane3": "-0x14"
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@@ -2843,10 +2843,10 @@
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-                    "lane1": "-0x5",
-                    "lane2": "-0x5",
-                    "lane3": "-0x5"
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+                    "lane1": "0xfffffffb",
+                    "lane2": "0xfffffffb",
+                    "lane3": "0xfffffffb"
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@@ -2869,44 +2869,44 @@
                     "lane7": "0x94"
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-                    "lane3": "-0x7",
-                    "lane4": "-0xe",
-                    "lane5": "-0x7",
-                    "lane6": "-0xe",
-                    "lane7": "-0x3"
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+                    "lane1": "0xfffffffd",
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+                    "lane3": "0xfffffff9",
+                    "lane4": "0xfffffff2",
+                    "lane5": "0xfffffff9",
+                    "lane6": "0xfffffff2",
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                     "lane0": "0x0",
                     "lane1": "0x0",
                     "lane2": "0x0",
-                    "lane3": "-0x2",
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-                    "lane5": "-0x2",
+                    "lane5": "0xfffffffe",
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                     "lane7": "0x0"
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-                    "lane1": "-0x1",
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-                    "lane4": "-0x4",
-                    "lane5": "-0x3",
-                    "lane6": "-0x4",
-                    "lane7": "-0x1"
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+                    "lane1": "0xffffffff",
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-                    "lane5": "-0x10",
-                    "lane6": "-0xe",
-                    "lane7": "-0x10"
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@@ -2927,10 +2927,10 @@
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-                    "lane1": "-0x17",
-                    "lane2": "-0x19",
-                    "lane3": "-0x1d"
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+                    "lane1": "0xffffffe9",
+                    "lane2": "0xffffffe7",
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@@ -2945,10 +2945,10 @@
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-                    "lane1": "-0x5",
-                    "lane2": "-0x7",
-                    "lane3": "-0x8"
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+                    "lane1": "0xfffffffb",
+                    "lane2": "0xfffffff9",
+                    "lane3": "0xfffffff8"
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@@ -2971,44 +2971,44 @@
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-                    "lane3": "-0xe",
-                    "lane4": "-0x3",
-                    "lane5": "-0x7",
-                    "lane6": "-0x7",
-                    "lane7": "-0xe"
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+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff9",
+                    "lane3": "0xfffffff2",
+                    "lane4": "0xfffffffd",
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+                    "lane7": "0xfffffff2"
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                     "lane0": "0x0",
                     "lane1": "0x0",
-                    "lane2": "-0x2",
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                     "lane4": "0x0",
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-                    "lane6": "-0x2",
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-                    "lane5": "-0x3",
-                    "lane6": "-0x3",
-                    "lane7": "-0x4"
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-                    "lane5": "-0x10",
-                    "lane6": "-0x10",
-                    "lane7": "-0xe"
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@@ -3029,10 +3029,10 @@
                     "lane3": "0x4b"
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-                    "lane1": "-0x16",
-                    "lane2": "-0x16",
-                    "lane3": "-0x14"
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+                    "lane2": "0xffffffea",
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@@ -3047,10 +3047,10 @@
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-                    "lane1": "-0x5",
-                    "lane2": "-0x5",
-                    "lane3": "-0x5"
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+                    "lane2": "0xfffffffb",
+                    "lane3": "0xfffffffb"
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@@ -3073,44 +3073,44 @@
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-                    "lane4": "-0x3",
-                    "lane5": "-0xe",
-                    "lane6": "-0x7",
-                    "lane7": "-0x3"
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+                    "lane2": "0xfffffff9",
+                    "lane3": "0xfffffff9",
+                    "lane4": "0xfffffffd",
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                     "lane1": "0x0",
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-                    "lane3": "-0x2",
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                     "lane5": "0x0",
-                    "lane6": "-0x2",
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-                    "lane5": "-0x4",
-                    "lane6": "-0x3",
-                    "lane7": "-0x1"
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-                    "lane5": "-0xe",
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-                    "lane7": "-0x10"
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@@ -3131,10 +3131,10 @@
                     "lane3": "0x4b"
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-                    "lane1": "-0x16",
-                    "lane2": "-0x14",
-                    "lane3": "-0x14"
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@@ -3149,10 +3149,10 @@
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-                    "lane1": "-0x5",
-                    "lane2": "-0x5",
-                    "lane3": "-0x5"
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+                    "lane1": "0xfffffffb",
+                    "lane2": "0xfffffffb",
+                    "lane3": "0xfffffffb"
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@@ -3175,44 +3175,44 @@
                     "lane7": "0x94"
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-                    "lane3": "-0x7",
-                    "lane4": "-0xe",
-                    "lane5": "-0x7",
-                    "lane6": "-0xe",
-                    "lane7": "-0x3"
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+                    "lane1": "0xfffffffd",
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+                    "lane3": "0xfffffff9",
+                    "lane4": "0xfffffff2",
+                    "lane5": "0xfffffff9",
+                    "lane6": "0xfffffff2",
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                     "lane1": "0x0",
                     "lane2": "0x0",
-                    "lane3": "-0x2",
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-                    "lane5": "-0x2",
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-                    "lane5": "-0x3",
-                    "lane6": "-0x4",
-                    "lane7": "-0x1"
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-                    "lane6": "-0xe",
-                    "lane7": "-0x10"
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+                    "lane3": "0xfffffff0",
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+                    "lane5": "0xfffffff0",
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+                    "lane7": "0xfffffff0"
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@@ -3233,10 +3233,10 @@
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-                    "lane1": "-0x19",
-                    "lane2": "-0x17",
-                    "lane3": "-0x17"
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@@ -3251,10 +3251,10 @@
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-                    "lane1": "-0x7",
-                    "lane2": "-0x5",
-                    "lane3": "-0x5"
+                    "lane0": "0xfffffff9",
+                    "lane1": "0xfffffff9",
+                    "lane2": "0xfffffffb",
+                    "lane3": "0xfffffffb"
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@@ -3277,44 +3277,44 @@
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-                    "lane3": "-0xe",
-                    "lane4": "-0x3",
-                    "lane5": "-0x7",
-                    "lane6": "-0x7",
-                    "lane7": "-0xe"
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffff2",
+                    "lane2": "0xfffffff9",
+                    "lane3": "0xfffffff2",
+                    "lane4": "0xfffffffd",
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+                    "lane6": "0xfffffff9",
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                     "lane3": "0x0",
                     "lane4": "0x0",
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-                    "lane6": "-0x2",
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-                    "lane5": "-0x3",
-                    "lane6": "-0x3",
-                    "lane7": "-0x4"
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-                    "lane5": "-0x10",
-                    "lane6": "-0x10",
-                    "lane7": "-0xe"
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+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
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@@ -3335,10 +3335,10 @@
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-                    "lane1": "-0x14",
-                    "lane2": "-0x16",
-                    "lane3": "-0x14"
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+                    "lane3": "0xffffffec"
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@@ -3353,10 +3353,10 @@
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-                    "lane1": "-0x5",
-                    "lane2": "-0x5",
-                    "lane3": "-0x5"
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+                    "lane1": "0xfffffffb",
+                    "lane2": "0xfffffffb",
+                    "lane3": "0xfffffffb"
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@@ -3379,44 +3379,44 @@
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-                    "lane4": "-0x3",
-                    "lane5": "-0x5",
-                    "lane6": "-0xf",
-                    "lane7": "-0x3"
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+                    "lane3": "0xfffffff8",
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                     "lane1": "0x0",
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-                    "lane3": "-0x3",
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-                    "lane6": "-0x3",
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-                    "lane5": "-0x3",
-                    "lane6": "-0x2",
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@@ -3437,10 +3437,10 @@
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-                    "lane1": "-0x17",
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@@ -3455,10 +3455,10 @@
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                 },
                 "pre1": {
-                    "lane0": "-0x7",
-                    "lane1": "-0x5",
-                    "lane2": "-0x7",
-                    "lane3": "-0x5"
+                    "lane0": "0xfffffff9",
+                    "lane1": "0xfffffffb",
+                    "lane2": "0xfffffff9",
+                    "lane3": "0xfffffffb"
                 },
                 "pre2": {
                     "lane0": "0x0",
@@ -3481,44 +3481,44 @@
                     "lane7": "0x90"
                 },
                 "post1": {
-                    "lane0": "-0x5",
-                    "lane1": "-0x1",
-                    "lane2": "-0xc",
-                    "lane3": "-0x5",
-                    "lane4": "-0x1",
-                    "lane5": "-0xc",
-                    "lane6": "-0x5",
-                    "lane7": "-0x1"
+                    "lane0": "0xfffffffb",
+                    "lane1": "0xffffffff",
+                    "lane2": "0xfffffff4",
+                    "lane3": "0xfffffffb",
+                    "lane4": "0xffffffff",
+                    "lane5": "0xfffffff4",
+                    "lane6": "0xfffffffb",
+                    "lane7": "0xffffffff"
                 },
                 "post2": {
-                    "lane0": "-0x2",
-                    "lane1": "-0x3",
+                    "lane0": "0xfffffffe",
+                    "lane1": "0xfffffffd",
                     "lane2": "0x0",
-                    "lane3": "-0x2",
-                    "lane4": "-0x3",
+                    "lane3": "0xfffffffe",
+                    "lane4": "0xfffffffd",
                     "lane5": "0x0",
-                    "lane6": "-0x2",
-                    "lane7": "-0x3"
+                    "lane6": "0xfffffffe",
+                    "lane7": "0xfffffffd"
                 },
                 "post3": {
-                    "lane0": "-0x3",
-                    "lane1": "-0x3",
-                    "lane2": "-0x3",
-                    "lane3": "-0x3",
-                    "lane4": "-0x3",
-                    "lane5": "-0x3",
-                    "lane6": "-0x3",
-                    "lane7": "-0x3"
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffd"
                 },
                 "pre1": {
-                    "lane0": "-0x10",
-                    "lane1": "-0x11",
-                    "lane2": "-0x10",
-                    "lane3": "-0x10",
-                    "lane4": "-0x11",
-                    "lane5": "-0x10",
-                    "lane6": "-0x10",
-                    "lane7": "-0x11"
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xffffffef",
+                    "lane2": "0xfffffff0",
+                    "lane3": "0xfffffff0",
+                    "lane4": "0xffffffef",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xffffffef"
                 },
                 "pre2": {
                     "lane0": "0x3",
@@ -3539,10 +3539,10 @@
                     "lane3": "0x4e"
                 },
                 "post1": {
-                    "lane0": "-0x14",
-                    "lane1": "-0x14",
-                    "lane2": "-0x16",
-                    "lane3": "-0x16"
+                    "lane0": "0xffffffec",
+                    "lane1": "0xffffffec",
+                    "lane2": "0xffffffea",
+                    "lane3": "0xffffffea"
                 },
                 "post2": {
                     "lane0": "0x0",
@@ -3557,10 +3557,10 @@
                     "lane3": "0x0"
                 },
                 "pre1": {
-                    "lane0": "-0x5",
-                    "lane1": "-0x5",
-                    "lane2": "-0x5",
-                    "lane3": "-0x5"
+                    "lane0": "0xfffffffb",
+                    "lane1": "0xfffffffb",
+                    "lane2": "0xfffffffb",
+                    "lane3": "0xfffffffb"
                 },
                 "pre2": {
                     "lane0": "0x0",
@@ -3583,44 +3583,44 @@
                     "lane7": "0x8d"
                 },
                 "post1": {
-                    "lane0": "-0xc",
-                    "lane1": "-0x5",
-                    "lane2": "-0x8",
-                    "lane3": "-0x8",
-                    "lane4": "-0xc",
-                    "lane5": "-0x5",
-                    "lane6": "-0xc",
-                    "lane7": "-0x5"
+                    "lane0": "0xfffffff4",
+                    "lane1": "0xfffffffb",
+                    "lane2": "0xfffffff8",
+                    "lane3": "0xfffffff8",
+                    "lane4": "0xfffffff4",
+                    "lane5": "0xfffffffb",
+                    "lane6": "0xfffffff4",
+                    "lane7": "0xfffffffb"
                 },
                 "post2": {
                     "lane0": "0x0",
-                    "lane1": "-0x2",
-                    "lane2": "-0x3",
-                    "lane3": "-0x3",
+                    "lane1": "0xfffffffe",
+                    "lane2": "0xfffffffd",
+                    "lane3": "0xfffffffd",
                     "lane4": "0x0",
-                    "lane5": "-0x2",
+                    "lane5": "0xfffffffe",
                     "lane6": "0x0",
-                    "lane7": "-0x2"
+                    "lane7": "0xfffffffe"
                 },
                 "post3": {
-                    "lane0": "-0x3",
-                    "lane1": "-0x3",
-                    "lane2": "-0x1",
-                    "lane3": "-0x1",
-                    "lane4": "-0x3",
-                    "lane5": "-0x3",
-                    "lane6": "-0x3",
-                    "lane7": "-0x3"
+                    "lane0": "0xfffffffd",
+                    "lane1": "0xfffffffd",
+                    "lane2": "0xffffffff",
+                    "lane3": "0xffffffff",
+                    "lane4": "0xfffffffd",
+                    "lane5": "0xfffffffd",
+                    "lane6": "0xfffffffd",
+                    "lane7": "0xfffffffd"
                 },
                 "pre1": {
-                    "lane0": "-0x10",
-                    "lane1": "-0x10",
-                    "lane2": "-0xf",
-                    "lane3": "-0xf",
-                    "lane4": "-0x10",
-                    "lane5": "-0x10",
-                    "lane6": "-0x10",
-                    "lane7": "-0x10"
+                    "lane0": "0xfffffff0",
+                    "lane1": "0xfffffff0",
+                    "lane2": "0xfffffff1",
+                    "lane3": "0xfffffff1",
+                    "lane4": "0xfffffff0",
+                    "lane5": "0xfffffff0",
+                    "lane6": "0xfffffff0",
+                    "lane7": "0xfffffff0"
                 },
                 "pre2": {
                     "lane0": "0x2",
@@ -3641,10 +3641,10 @@
                     "lane3": "0x50"
                 },
                 "post1": {
-                    "lane0": "-0x17",
-                    "lane1": "-0x19",
-                    "lane2": "-0x19",
-                    "lane3": "-0x17"
+                    "lane0": "0xffffffe9",
+                    "lane1": "0xffffffe7",
+                    "lane2": "0xffffffe7",
+                    "lane3": "0xffffffe9"
                 },
                 "post2": {
                     "lane0": "0x0",
@@ -3659,10 +3659,10 @@
                     "lane3": "0x0"
                 },
                 "pre1": {
-                    "lane0": "-0x5",
-                    "lane1": "-0x7",
-                    "lane2": "-0x7",
-                    "lane3": "-0x5"
+                    "lane0": "0xfffffffb",
+                    "lane1": "0xfffffff9",
+                    "lane2": "0xfffffff9",
+                    "lane3": "0xfffffffb"
                 },
                 "pre2": {
                     "lane0": "0x0",

From a63a837378621d98df625b1139f2ca8ce84ffb10 Mon Sep 17 00:00:00 2001
From: Nazarii Hnydyn <nazariig@nvidia.com>
Date: Sat, 21 Sep 2024 04:06:34 +0300
Subject: [PATCH 1024/1115] [Mellanox]: Add Mellanox-SN4600C-D24C52 SKU.
 (#20142)
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

A new SKU for `MSN4600C` platform: `Mellanox-SN4600C-D24C52`

Requirements for `Mellanox-SN4600C-D24C52`:
* 8 x 100Gbps uplink to T2 switch (C25, C26, C29-C30, C33-C34, C37-C38)
* 12 x 100Gbps downlinks to T0 switch (C1-C2, C3-C4, C7-C8, C53-C54, C57-C58, C63-C64)
* 1 x 50Gbps downlinks to T0 switch (D62)
* Type of transceiver: "100Gb AOC between T0-T1, 100G DAC between T0-Server"
* Cable length: “T0-T1 40m default, 300m max; T0-Server 2m”
* Breakout mode: "per port layout"
* FEC mode: "none"
* VxLAN source port: "no"
* Static Policy Based Hashing: "no"
* Traditional buffer model: "yes"
* Shared headroom: “yes”
* Over-subscription ratio: “2”
* Warm boot: “yes”

Additional details:
* `Mellanox-SN4600C-D24C52` is a replacement for [Mellanox-SN3800-D24C52](https://github.com/sonic-net/sonic-buildimage/tree/master/device/mellanox/x86_64-mlnx_msn3800-r0/Mellanox-SN3800-D24C52)

#### Why I did it
* Added `Mellanox-SN4600C-D24C52` to replace `Mellanox-SN3800-D24C52`

### How I did it
* Added relevant configuration files

#### How to verify it
1. Generate port configuration:
```bash
sonic-cfggen -H -k Mellanox-SN4600C-D24C52 --preset t1 > /etc/sonic/config_db.json
```
2. Generate QoS configuration:
```bash
config qos clear
config qos reload --no-dynamic-buffer
config save -y
```
---
 .../Mellanox-SN4600C-D24C52/buffers.json.j2   |   1 +
 .../buffers_defaults_objects.j2               |   1 +
 .../buffers_defaults_t0.j2                    |  39 ++
 .../buffers_defaults_t1.j2                    |  39 ++
 .../buffers_dynamic.json.j2                   |   1 +
 .../Mellanox-SN4600C-D24C52/hwsku.json        | 308 +++++++++++
 .../pg_profile_lookup.ini                     |  44 ++
 .../Mellanox-SN4600C-D24C52/port_config.ini   |  94 ++++
 .../Mellanox-SN4600C-D24C52/qos.json.j2       |   1 +
 .../Mellanox-SN4600C-D24C52/sai.profile       |   1 +
 .../sai_4600c_24x50g_52x100g.xml              | 501 ++++++++++++++++++
 11 files changed, 1030 insertions(+)
 create mode 120000 device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/buffers.json.j2
 create mode 120000 device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/buffers_defaults_objects.j2
 create mode 100644 device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/buffers_defaults_t0.j2
 create mode 100644 device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/buffers_defaults_t1.j2
 create mode 120000 device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/buffers_dynamic.json.j2
 create mode 100644 device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/hwsku.json
 create mode 100644 device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/pg_profile_lookup.ini
 create mode 100644 device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/port_config.ini
 create mode 120000 device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/qos.json.j2
 create mode 100644 device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/sai.profile
 create mode 100644 device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/sai_4600c_24x50g_52x100g.xml

diff --git a/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/buffers.json.j2 b/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/buffers.json.j2
new file mode 120000
index 000000000..117d740b0
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/buffers.json.j2
@@ -0,0 +1 @@
+../ACS-MSN4600C/buffers.json.j2
\ No newline at end of file
diff --git a/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/buffers_defaults_objects.j2 b/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/buffers_defaults_objects.j2
new file mode 120000
index 000000000..c01aebb7a
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/buffers_defaults_objects.j2
@@ -0,0 +1 @@
+../../x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D48C8/buffers_defaults_objects.j2
\ No newline at end of file
diff --git a/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/buffers_defaults_t0.j2 b/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/buffers_defaults_t0.j2
new file mode 100644
index 000000000..c9f4597a6
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/buffers_defaults_t0.j2
@@ -0,0 +1,39 @@
+{#
+    Copyright (c) 2020-2021 NVIDIA CORPORATION & AFFILIATES.
+    Apache-2.0
+
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+
+    http://www.apache.org/licenses/LICENSE-2.0
+
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+#}
+{% set default_cable = '2m' %}
+{% set ingress_lossless_pool_size = '57176064' %}
+{% set ingress_lossless_pool_xoff = '1099776' %}
+{% set egress_lossless_pool_size = '60817392' %}
+{% set egress_lossy_pool_size = '57176064' %}
+
+{% import 'buffers_defaults_objects.j2' as defs with context %}
+
+{%- macro generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) %}
+{{ defs.generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_profile_lists_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_profile_lists(port_names_active, port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_queue_buffers_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_queue_buffers(port_names_active, port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_pg_profiles_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_pg_profiles(port_names_active, port_names_inactive) }}
+{%- endmacro %}
diff --git a/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/buffers_defaults_t1.j2 b/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/buffers_defaults_t1.j2
new file mode 100644
index 000000000..1b3b9c50d
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/buffers_defaults_t1.j2
@@ -0,0 +1,39 @@
+{#
+    Copyright (c) 2020-2021 NVIDIA CORPORATION & AFFILIATES.
+    Apache-2.0
+
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+
+    http://www.apache.org/licenses/LICENSE-2.0
+
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+#}
+{% set default_cable = '40m' %}
+{% set ingress_lossless_pool_size = '57099264' %}
+{% set ingress_lossless_pool_xoff = '1176576' %}
+{% set egress_lossless_pool_size = '60817392' %}
+{% set egress_lossy_pool_size = '57099264' %}
+
+{% import 'buffers_defaults_objects.j2' as defs with context %}
+
+{%- macro generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) %}
+{{ defs.generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_profile_lists_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_profile_lists(port_names_active, port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_queue_buffers_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_queue_buffers(port_names_active, port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_pg_profiles_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_pg_profiles(port_names_active, port_names_inactive) }}
+{%- endmacro %}
diff --git a/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/buffers_dynamic.json.j2 b/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/buffers_dynamic.json.j2
new file mode 120000
index 000000000..8c4117c66
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/buffers_dynamic.json.j2
@@ -0,0 +1 @@
+../../x86_64-mlnx_msn2700-r0/ACS-MSN2700/buffers_dynamic.json.j2
\ No newline at end of file
diff --git a/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/hwsku.json b/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/hwsku.json
new file mode 100644
index 000000000..839ad08f5
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/hwsku.json
@@ -0,0 +1,308 @@
+{
+    "interfaces": {
+        "Ethernet0":{
+            "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]",
+            "subport": "0"
+        },
+        "Ethernet4":{
+            "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]",
+            "subport": "0"
+        },
+        "Ethernet8":{
+            "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]",
+            "subport": "0"
+        },
+        "Ethernet12":{
+            "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]",
+            "subport": "0"
+        },
+        "Ethernet16":{
+            "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]",
+            "subport": "0"
+        },
+        "Ethernet20":{
+            "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]",
+            "subport": "0"
+        },
+        "Ethernet24":{
+            "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]",
+            "subport": "0"
+        },
+        "Ethernet28":{
+            "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]",
+            "subport": "0"
+        },
+        "Ethernet32":{
+            "default_brkout_mode": "2x50G[25G,10G,1G]",
+            "subport": "1"
+        },
+        "Ethernet34":{
+            "default_brkout_mode": "2x50G[25G,10G,1G]",
+            "subport": "2"
+        },
+        "Ethernet36":{
+            "default_brkout_mode": "2x50G[25G,10G,1G]",
+            "subport": "1"
+        },
+        "Ethernet38":{
+            "default_brkout_mode": "2x50G[25G,10G,1G]",
+            "subport": "2"
+        },
+        "Ethernet40":{
+            "default_brkout_mode": "2x50G[25G,10G,1G]",
+            "subport": "1"
+        },
+        "Ethernet42":{
+            "default_brkout_mode": "2x50G[25G,10G,1G]",
+            "subport": "2"
+        },
+        "Ethernet44":{
+            "default_brkout_mode": "2x50G[25G,10G,1G]",
+            "subport": "1"
+        },
+        "Ethernet46":{
+            "default_brkout_mode": "2x50G[25G,10G,1G]",
+            "subport": "2"
+        },
+        "Ethernet48":{
+            "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]",
+            "subport": "0"
+        },
+        "Ethernet52":{
+            "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]",
+            "subport": "0"
+        },
+        "Ethernet56":{
+            "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]",
+            "subport": "0"
+        },
+        "Ethernet60":{
+            "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]",
+            "subport": "0"
+        },
+        "Ethernet64":{
+            "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]",
+            "subport": "0"
+        },
+        "Ethernet68":{
+            "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]",
+            "subport": "0"
+        },
+        "Ethernet72":{
+            "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]",
+            "subport": "0"
+        },
+        "Ethernet76":{
+            "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]",
+            "subport": "0"
+        },
+        "Ethernet80":{
+            "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]",
+            "subport": "0"
+        },
+        "Ethernet84":{
+            "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]",
+            "subport": "0"
+        },
+        "Ethernet88":{
+            "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]",
+            "subport": "0"
+        },
+        "Ethernet92":{
+            "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]",
+            "subport": "0"
+        },
+        "Ethernet96":{
+            "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]",
+            "subport": "0"
+        },
+        "Ethernet100":{
+            "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]",
+            "subport": "0"
+        },
+        "Ethernet104":{
+            "default_brkout_mode": "2x50G[25G,10G,1G]",
+            "subport": "1"
+        },
+        "Ethernet106":{
+            "default_brkout_mode": "2x50G[25G,10G,1G]",
+            "subport": "2"
+        },
+        "Ethernet108":{
+            "default_brkout_mode": "2x50G[25G,10G,1G]",
+            "subport": "1"
+        },
+        "Ethernet110":{
+            "default_brkout_mode": "2x50G[25G,10G,1G]",
+            "subport": "2"
+        },
+        "Ethernet112":{
+            "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]",
+            "subport": "0"
+        },
+        "Ethernet116":{
+            "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]",
+            "subport": "0"
+        },
+        "Ethernet120":{
+            "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]",
+            "subport": "0"
+        },
+        "Ethernet124":{
+            "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]",
+            "subport": "0"
+        },
+        "Ethernet128":{
+            "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]",
+            "subport": "0"
+        },
+        "Ethernet132":{
+            "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]",
+            "subport": "0"
+        },
+        "Ethernet136":{
+            "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]",
+            "subport": "0"
+        },
+        "Ethernet140":{
+            "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]",
+            "subport": "0"
+        },
+        "Ethernet144":{
+            "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]",
+            "subport": "0"
+        },
+        "Ethernet148":{
+            "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]",
+            "subport": "0"
+        },
+        "Ethernet152":{
+            "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]",
+            "subport": "0"
+        },
+        "Ethernet156":{
+            "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]",
+            "subport": "0"
+        },
+        "Ethernet160":{
+            "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]",
+            "subport": "0"
+        },
+        "Ethernet164":{
+            "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]",
+            "subport": "0"
+        },
+        "Ethernet168":{
+            "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]",
+            "subport": "0"
+        },
+        "Ethernet172":{
+            "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]",
+            "subport": "0"
+        },
+        "Ethernet176":{
+            "default_brkout_mode": "2x50G[25G,10G,1G]",
+            "subport": "1"
+        },
+        "Ethernet178":{
+            "default_brkout_mode": "2x50G[25G,10G,1G]",
+            "subport": "2"
+        },
+        "Ethernet180":{
+            "default_brkout_mode": "2x50G[25G,10G,1G]",
+            "subport": "1"
+        },
+        "Ethernet182":{
+            "default_brkout_mode": "2x50G[25G,10G,1G]",
+            "subport": "2"
+        },
+        "Ethernet184":{
+            "default_brkout_mode": "2x50G[25G,10G,1G]",
+            "subport": "1"
+        },
+        "Ethernet186":{
+            "default_brkout_mode": "2x50G[25G,10G,1G]",
+            "subport": "2"
+        },
+        "Ethernet188":{
+            "default_brkout_mode": "2x50G[25G,10G,1G]",
+            "subport": "1"
+        },
+        "Ethernet190":{
+            "default_brkout_mode": "2x50G[25G,10G,1G]",
+            "subport": "2"
+        },
+        "Ethernet192":{
+            "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]",
+            "subport": "0"
+        },
+        "Ethernet196":{
+            "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]",
+            "subport": "0"
+        },
+        "Ethernet200":{
+            "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]",
+            "subport": "0"
+        },
+        "Ethernet204":{
+            "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]",
+            "subport": "0"
+        },
+        "Ethernet208":{
+            "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]",
+            "subport": "0"
+        },
+        "Ethernet212":{
+            "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]",
+            "subport": "0"
+        },
+        "Ethernet216":{
+            "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]",
+            "subport": "0"
+        },
+        "Ethernet220":{
+            "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]",
+            "subport": "0"
+        },
+        "Ethernet224":{
+            "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]",
+            "subport": "0"
+        },
+        "Ethernet228":{
+            "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]",
+            "subport": "0"
+        },
+        "Ethernet232":{
+            "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]",
+            "subport": "0"
+        },
+        "Ethernet236":{
+            "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]",
+            "subport": "0"
+        },
+        "Ethernet240":{
+            "default_brkout_mode": "2x50G[25G,10G,1G]",
+            "subport": "1"
+        },
+        "Ethernet242":{
+            "default_brkout_mode": "2x50G[25G,10G,1G]",
+            "subport": "2"
+        },
+        "Ethernet244":{
+            "default_brkout_mode": "2x50G[25G,10G,1G]",
+            "subport": "1"
+        },
+        "Ethernet246":{
+            "default_brkout_mode": "2x50G[25G,10G,1G]",
+            "subport": "2"
+        },
+        "Ethernet248":{
+            "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]",
+            "subport": "0"
+        },
+        "Ethernet252":{
+            "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]",
+            "subport": "0"
+        }
+    }
+}
diff --git a/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/pg_profile_lookup.ini b/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/pg_profile_lookup.ini
new file mode 100644
index 000000000..7523a8d4d
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/pg_profile_lookup.ini
@@ -0,0 +1,44 @@
+##
+## Copyright (c) 2019-2021 NVIDIA CORPORATION & AFFILIATES.
+## Apache-2.0
+##
+## Licensed under the Apache License, Version 2.0 (the "License");
+## you may not use this file except in compliance with the License.
+## You may obtain a copy of the License at
+##
+## http://www.apache.org/licenses/LICENSE-2.0
+##
+## Unless required by applicable law or agreed to in writing, software
+## distributed under the License is distributed on an "AS IS" BASIS,
+## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+## See the License for the specific language governing permissions and
+## limitations under the License.
+##
+
+# PG lossless profiles
+# speed  cable   size    xon    xoff  threshold
+  10000     2m  19456  19456   18432          0
+  25000     2m  19456  19456   19456          0
+  40000     2m  19456  19456   21504          0
+  50000     2m  19456  19456   23552          0
+ 100000     2m  19456  19456   41984          0
+  10000     5m  19456  19456   18432          0
+  25000     5m  19456  19456   19456          0
+  40000     5m  19456  19456   21504          0
+  50000     5m  19456  19456   24576          0
+ 100000     5m  19456  19456   43008          0
+  10000    40m  19456  19456   18432          0
+  25000    40m  19456  19456   20480          0
+  40000    40m  19456  19456   23552          0
+  50000    40m  19456  19456   26624          0
+ 100000    40m  19456  19456   48128          0
+  10000   300m  19456  19456   22528          0
+  25000   300m  19456  19456   29696          0
+  40000   300m  19456  19456   38912          0
+  50000   300m  19456  19456   45056          0
+ 100000   300m  19456  19456   84992          0
+  10000  2000m  19456  19456   47104          0
+  25000  2000m  19456  19456   91136          0
+  40000  2000m  19456  19456  137216          0
+  50000  2000m  19456  19456  168960          0
+ 100000  2000m  19456  19456  331776          0
diff --git a/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/port_config.ini b/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/port_config.ini
new file mode 100644
index 000000000..cd067d6da
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/port_config.ini
@@ -0,0 +1,94 @@
+##
+## Copyright (c) 2020-2021 NVIDIA CORPORATION & AFFILIATES.
+## Apache-2.0
+##
+## Licensed under the Apache License, Version 2.0 (the "License");
+## you may not use this file except in compliance with the License.
+## You may obtain a copy of the License at
+##
+## http://www.apache.org/licenses/LICENSE-2.0
+##
+## Unless required by applicable law or agreed to in writing, software
+## distributed under the License is distributed on an "AS IS" BASIS,
+## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+## See the License for the specific language governing permissions and
+## limitations under the License.
+##
+
+# name       lanes            alias   index   speed
+Ethernet0    0,1,2,3          etp1        1  100000
+Ethernet4    8,9,10,11        etp2        2  100000
+Ethernet8    16,17,18,19      etp3        3  100000
+Ethernet12   24,25,26,27      etp4        4  100000
+Ethernet16   32,33,34,35      etp5        5  100000
+Ethernet20   40,41,42,43      etp6        6  100000
+Ethernet24   48,49,50,51      etp7        7  100000
+Ethernet28   56,57,58,59      etp8        8  100000
+Ethernet32   64,65            etp9a       9   50000
+Ethernet34   66,67            etp9b       9   50000
+Ethernet36   72,73            etp10a     10   50000
+Ethernet38   74,75            etp10b     10   50000
+Ethernet40   80,81            etp11a     11   50000
+Ethernet42   82,83            etp11b     11   50000
+Ethernet44   88,89            etp12a     12   50000
+Ethernet46   90,91            etp12b     12   50000
+Ethernet48   96,97,98,99      etp13      13  100000
+Ethernet52   104,105,106,107  etp14      14  100000
+Ethernet56   112,113,114,115  etp15      15  100000
+Ethernet60   120,121,122,123  etp16      16  100000
+Ethernet64   128,129,130,131  etp17      17  100000
+Ethernet68   136,137,138,139  etp18      18  100000
+Ethernet72   144,145,146,147  etp19      19  100000
+Ethernet76   152,153,154,155  etp20      20  100000
+Ethernet80   160,161,162,163  etp21      21  100000
+Ethernet84   168,169,170,171  etp22      22  100000
+Ethernet88   176,177,178,179  etp23      23  100000
+Ethernet92   184,185,186,187  etp24      24  100000
+Ethernet96   192,193,194,195  etp25      25  100000
+Ethernet100  200,201,202,203  etp26      26  100000
+Ethernet104  208,209          etp27a     27   50000
+Ethernet106  210,211          etp27b     27   50000
+Ethernet108  216,217          etp28a     28   50000
+Ethernet110  218,219          etp28b     28   50000
+Ethernet112  224,225,226,227  etp29      29  100000
+Ethernet116  232,233,234,235  etp30      30  100000
+Ethernet120  240,241,242,243  etp31      31  100000
+Ethernet124  248,249,250,251  etp32      32  100000
+Ethernet128  256,257,258,259  etp33      33  100000
+Ethernet132  264,265,266,267  etp34      34  100000
+Ethernet136  272,273,274,275  etp35      35  100000
+Ethernet140  280,281,282,283  etp36      36  100000
+Ethernet144  288,289,290,291  etp37      37  100000
+Ethernet148  296,297,298,299  etp38      38  100000
+Ethernet152  304,305,306,307  etp39      39  100000
+Ethernet156  312,313,314,315  etp40      40  100000
+Ethernet160  320,321,322,323  etp41      41  100000
+Ethernet164  328,329,330,331  etp42      42  100000
+Ethernet168  336,337,338,339  etp43      43  100000
+Ethernet172  344,345,346,347  etp44      44  100000
+Ethernet176  352,353          etp45a     45   50000
+Ethernet178  354,355          etp45b     45   50000
+Ethernet180  360,361          etp46a     46   50000
+Ethernet182  362,363          etp46b     46   50000
+Ethernet184  368,369          etp47a     47   50000
+Ethernet186  370,371          etp47b     47   50000
+Ethernet188  376,377          etp48a     48   50000
+Ethernet190  378,379          etp48b     48   50000
+Ethernet192  384,385,386,387  etp49      49  100000
+Ethernet196  392,393,394,395  etp50      50  100000
+Ethernet200  400,401,402,403  etp51      51  100000
+Ethernet204  408,409,410,411  etp52      52  100000
+Ethernet208  416,417,418,419  etp53      53  100000
+Ethernet212  424,425,426,427  etp54      54  100000
+Ethernet216  432,433,434,435  etp55      55  100000
+Ethernet220  440,441,442,443  etp56      56  100000
+Ethernet224  448,449,450,451  etp57      57  100000
+Ethernet228  456,457,458,459  etp58      58  100000
+Ethernet232  464,465,466,467  etp59      59  100000
+Ethernet236  472,473,474,475  etp60      60  100000
+Ethernet240  480,481          etp61a     61   50000
+Ethernet242  482,483          etp61b     61   50000
+Ethernet244  488,489          etp62a     62   50000
+Ethernet246  490,491          etp62b     62   50000
+Ethernet248  496,497,498,499  etp63      63  100000
+Ethernet252  504,505,506,507  etp64      64  100000
diff --git a/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/qos.json.j2 b/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/qos.json.j2
new file mode 120000
index 000000000..05394016a
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/qos.json.j2
@@ -0,0 +1 @@
+../ACS-MSN4600C/qos.json.j2
\ No newline at end of file
diff --git a/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/sai.profile b/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/sai.profile
new file mode 100644
index 000000000..2bde3a074
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/sai.profile
@@ -0,0 +1 @@
+SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_4600c_24x50g_52x100g.xml
diff --git a/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/sai_4600c_24x50g_52x100g.xml b/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/sai_4600c_24x50g_52x100g.xml
new file mode 100644
index 000000000..b069da68b
--- /dev/null
+++ b/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/sai_4600c_24x50g_52x100g.xml
@@ -0,0 +1,501 @@
+<?xml version="1.0"?>
+<!--
+  Copyright (c) 2019-2023 NVIDIA CORPORATION & AFFILIATES.
+  Apache-2.0
+
+  Licensed under the Apache License, Version 2.0 (the "License");
+  you may not use this file except in compliance with the License.
+  You may obtain a copy of the License at
+
+  http://www.apache.org/licenses/LICENSE-2.0
+
+  Unless required by applicable law or agreed to in writing, software
+  distributed under the License is distributed on an "AS IS" BASIS,
+  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+  See the License for the specific language governing permissions and
+  limitations under the License.
+-->
+<root>
+    <platform_info type="4601">
+
+        <!-- Device MAC address  -->
+        <device-mac-address>00:02:03:04:05:80</device-mac-address>
+
+        <!-- ISSU enabled -->
+        <issu-enabled>1</issu-enabled>
+
+        <!-- Number of ports in the following port list -->
+        <number-of-physical-ports>64</number-of-physical-ports>
+
+        <!-- Global port late create -->
+        <late-create-all-ports>1</late-create-all-ports>
+
+        <!-- List of ports in the device -->
+        <ports-list>
+            <port-info>
+                <local-port>105</local-port>
+                <width>4</width>
+                <module>0</module>
+
+                <!-- 0 none, 1=2, 2=4, 3=2,4 -->
+                <breakout-modes>3</breakout-modes>
+
+                <!-- (BITMASK) 2 - 1Gb , 16 - 10Gb , 32 - 40Gb , 384 - 50Gb , 1536 - 100Gb , 1536 - 200Gb -->
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>107</local-port>
+                <width>4</width>
+                <module>1</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>109</local-port>
+                <width>4</width>
+                <module>2</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>111</local-port>
+                <width>4</width>
+                <module>3</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>97</local-port>
+                <width>4</width>
+                <module>4</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>99</local-port>
+                <width>4</width>
+                <module>5</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>101</local-port>
+                <width>4</width>
+                <module>6</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>103</local-port>
+                <width>4</width>
+                <module>7</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>121</local-port>
+                <split>2</split>
+                <width>4</width>
+                <module>8</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>384</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>123</local-port>
+                <split>2</split>
+                <width>4</width>
+                <module>9</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>384</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>125</local-port>
+                <split>2</split>
+                <width>4</width>
+                <module>10</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>384</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>127</local-port>
+                <split>2</split>
+                <width>4</width>
+                <module>11</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>384</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>113</local-port>
+                <width>4</width>
+                <module>12</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>115</local-port>
+                <width>4</width>
+                <module>13</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>117</local-port>
+                <width>4</width>
+                <module>14</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>119</local-port>
+                <width>4</width>
+                <module>15</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>89</local-port>
+                <width>4</width>
+                <module>16</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>91</local-port>
+                <width>4</width>
+                <module>17</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>93</local-port>
+                <width>4</width>
+                <module>18</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>95</local-port>
+                <width>4</width>
+                <module>19</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>81</local-port>
+                <width>4</width>
+                <module>20</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>83</local-port>
+                <width>4</width>
+                <module>21</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>85</local-port>
+                <width>4</width>
+                <module>22</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>87</local-port>
+                <width>4</width>
+                <module>23</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>73</local-port>
+                <width>4</width>
+                <module>24</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>75</local-port>
+                <width>4</width>
+                <module>25</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>77</local-port>
+                <split>2</split>
+                <width>4</width>
+                <module>26</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>384</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>79</local-port>
+                <split>2</split>
+                <width>4</width>
+                <module>27</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>384</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>65</local-port>
+                <width>4</width>
+                <module>28</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>67</local-port>
+                <width>4</width>
+                <module>29</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>69</local-port>
+                <width>4</width>
+                <module>30</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>71</local-port>
+                <width>4</width>
+                <module>31</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>5</local-port>
+                <width>4</width>
+                <module>32</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>7</local-port>
+                <width>4</width>
+                <module>33</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>1</local-port>
+                <width>4</width>
+                <module>34</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>3</local-port>
+                <width>4</width>
+                <module>35</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>13</local-port>
+                <width>4</width>
+                <module>36</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>15</local-port>
+                <width>4</width>
+                <module>37</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>9</local-port>
+                <width>4</width>
+                <module>38</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>11</local-port>
+                <width>4</width>
+                <module>39</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>21</local-port>
+                <width>4</width>
+                <module>40</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>23</local-port>
+                <width>4</width>
+                <module>41</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>17</local-port>
+                <width>4</width>
+                <module>42</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>19</local-port>
+                <width>4</width>
+                <module>43</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>29</local-port>
+                <split>2</split>
+                <width>4</width>
+                <module>44</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>384</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>31</local-port>
+                <split>2</split>
+                <width>4</width>
+                <module>45</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>384</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>25</local-port>
+                <split>2</split>
+                <width>4</width>
+                <module>46</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>384</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>27</local-port>
+                <split>2</split>
+                <width>4</width>
+                <module>47</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>384</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>53</local-port>
+                <width>4</width>
+                <module>48</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>55</local-port>
+                <width>4</width>
+                <module>49</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>49</local-port>
+                <width>4</width>
+                <module>50</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>51</local-port>
+                <width>4</width>
+                <module>51</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>61</local-port>
+                <width>4</width>
+                <module>52</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>63</local-port>
+                <width>4</width>
+                <module>53</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>57</local-port>
+                <width>4</width>
+                <module>54</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>59</local-port>
+                <width>4</width>
+                <module>55</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>37</local-port>
+                <width>4</width>
+                <module>56</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>39</local-port>
+                <width>4</width>
+                <module>57</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>33</local-port>
+                <width>4</width>
+                <module>58</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>35</local-port>
+                <width>4</width>
+                <module>59</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>45</local-port>
+                <split>2</split>
+                <width>4</width>
+                <module>60</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>384</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>47</local-port>
+                <split>2</split>
+                <width>4</width>
+                <module>61</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>384</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>41</local-port>
+                <width>4</width>
+                <module>62</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>43</local-port>
+                <width>4</width>
+                <module>63</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+        </ports-list>
+    </platform_info>
+</root>

From d36056f6ad871a982f8581444b97a8cfd4ef3f55 Mon Sep 17 00:00:00 2001
From: Philo <135693886+philo-micas@users.noreply.github.com>
Date: Sat, 21 Sep 2024 09:27:43 +0800
Subject: [PATCH 1025/1115] [Micas/Platform]platform M2-W6510 uses Linux kernel
 drivers (#19599)

### Why I did it

### How I did it
We try to use Linux kernel drivers to replace our drivers, except for some drivers that we have implemented ourselves.
For this purpose, we have submitted the following PR to the sonic-linux-kernel repository:
https://github.com/sonic-net/sonic-linux-kernel/pull/411
https://github.com/sonic-net/sonic-linux-kernel/pull/413
https://github.com/sonic-net/sonic-linux-kernel/pull/417
---
 .../kernel_drivers_blacklist.conf             |    2 -
 .../common/modules/Makefile                   |    8 +-
 .../common/modules/linux/Makefile             |   36 -
 .../common/modules/linux/wb_i2c_algo_bit.c    |  725 -----
 .../common/modules/linux/wb_i2c_gpio.c        |  431 ---
 .../common/modules/linux/wb_i2c_i801.c        | 2114 -------------
 .../common/modules/linux/wb_i2c_ismt.c        | 1131 -------
 .../common/modules/linux/wb_ina3221.c         | 1031 ------
 .../common/modules/linux/wb_isl68137.c        |  577 ----
 .../common/modules/linux/wb_lm75.c            |  992 ------
 .../common/modules/linux/wb_lm75.h            |   40 -
 .../common/modules/linux/wb_pmbus.h           |  535 ----
 .../common/modules/linux/wb_pmbus_core.c      | 2780 -----------------
 .../common/modules/linux/wb_tmp401.c          | 1010 ------
 .../common/modules/linux/wb_tps53622.c        |  265 --
 .../common/modules/linux/wb_ucd9000.c         |  720 -----
 .../common/modules/linux/wb_xdpe12284.c       |  499 ---
 .../common/modules/pmbus.h                    |  511 +++
 .../common/modules/{linux => }/wb_csu550.c    |   58 +-
 .../modules/{linux => }/wb_i2c_gpio_device.c  |    6 +-
 .../modules/{linux => }/wb_i2c_mux_pca954x.c  |    0
 .../modules/{linux => }/wb_i2c_mux_pca954x.h  |    0
 .../modules/{linux => }/wb_i2c_mux_pca9641.c  |    0
 .../modules/{linux => }/wb_i2c_mux_pca9641.h  |    0
 .../modules/{linux => }/wb_xdpe132g5c_pmbus.c |  152 +-
 .../debian/changelog                          |    2 +-
 .../x86_64_micas_m2_w6510_48v8c_r0_config.py  |   77 +-
 .../m2-w6510-48v8c/modules/driver/Makefile    |    1 -
 28 files changed, 603 insertions(+), 13100 deletions(-)
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/linux/Makefile
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_algo_bit.c
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_gpio.c
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_i801.c
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_ismt.c
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_ina3221.c
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_isl68137.c
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_lm75.c
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_lm75.h
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_pmbus.h
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_pmbus_core.c
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_tmp401.c
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_tps53622.c
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_ucd9000.c
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_xdpe12284.c
 create mode 100755 platform/broadcom/sonic-platform-modules-micas/common/modules/pmbus.h
 rename platform/broadcom/sonic-platform-modules-micas/common/modules/{linux => }/wb_csu550.c (76%)
 rename platform/broadcom/sonic-platform-modules-micas/common/modules/{linux => }/wb_i2c_gpio_device.c (96%)
 rename platform/broadcom/sonic-platform-modules-micas/common/modules/{linux => }/wb_i2c_mux_pca954x.c (100%)
 rename platform/broadcom/sonic-platform-modules-micas/common/modules/{linux => }/wb_i2c_mux_pca954x.h (100%)
 rename platform/broadcom/sonic-platform-modules-micas/common/modules/{linux => }/wb_i2c_mux_pca9641.c (100%)
 rename platform/broadcom/sonic-platform-modules-micas/common/modules/{linux => }/wb_i2c_mux_pca9641.h (100%)
 rename platform/broadcom/sonic-platform-modules-micas/common/modules/{linux => }/wb_xdpe132g5c_pmbus.c (69%)
 mode change 100755 => 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/modules/driver/Makefile

diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modprobe_conf/kernel_drivers_blacklist.conf b/platform/broadcom/sonic-platform-modules-micas/common/modprobe_conf/kernel_drivers_blacklist.conf
index a49166ab6..9e0111a73 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modprobe_conf/kernel_drivers_blacklist.conf
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modprobe_conf/kernel_drivers_blacklist.conf
@@ -1,3 +1 @@
 blacklist wb_fpga_pcie
-blacklist wb_i2c_i801
-blacklist wb_i2c_ismt
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/Makefile b/platform/broadcom/sonic-platform-modules-micas/common/modules/Makefile
index bacb3839e..e432430db 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/Makefile
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/Makefile
@@ -7,8 +7,6 @@ KERNEL_SRC ?=  /lib/modules/$(KVERSION)
 module_out_put_dir := $(PWD)/build
 export module_out_put_dir
 
-KERNEL_MODULES_SRC = $(PWD)/linux
-
 PLAT_SYSFS_DIR = $(PWD)/plat_sysfs
 PINCTRL = $(PWD)/pinctrl
 
@@ -36,9 +34,13 @@ obj-m += wb_xdpe132g5c.o
 obj-m += wb_uio_irq.o
 obj-m += hw_test.o
 obj-m += wb_mdio_gpio_device.o
+obj-m += wb_csu550.o
+obj-m += wb_i2c_mux_pca9641.o
+obj-m += wb_i2c_mux_pca954x.o
+obj-m += wb_xdpe132g5c_pmbus.o
+obj-m += wb_i2c_gpio_device.o
 
 all :
-	$(MAKE) -C $(KERNEL_MODULES_SRC)
 	$(MAKE) -C $(PLAT_SYSFS_DIR)
 	$(MAKE) -C $(PINCTRL)
 	$(MAKE) -C $(KERNEL_SRC)/build M=$(PWD) modules
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/Makefile b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/Makefile
deleted file mode 100644
index a3da5aadf..000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/Makefile
+++ /dev/null
@@ -1,36 +0,0 @@
-PWD		= $(shell pwd)
-
-EXTRA_CFLAGS:= -I$(M)/include
-EXTRA_CFLAGS+= -Wall
-#ifdef ENABLE_GCOV
-#ifeq ($(ENABLE_GCOV), y)
-#EXTRA_CFLAGS+= -fprofile-arcs -ftest-coverage -lgcov
-#endif
-#endif # ENABLE_GCOV
-
-obj-m := wb_lm75.o
-obj-m += wb_tmp401.o
-obj-m += wb_i2c_mux_pca9641.o
-obj-m += wb_i2c_mux_pca954x.o
-obj-m += wb_i2c_i801.o
-obj-m += wb_i2c_algo_bit.o
-obj-m += wb_i2c_gpio.o
-obj-m += wb_i2c_gpio_device.o
-obj-m += wb_pmbus_core.o
-obj-m += wb_csu550.o
-obj-m += wb_ina3221.o
-obj-m += wb_isl68137.o
-obj-m += wb_tps53622.o
-obj-m += wb_ucd9000.o
-obj-m += wb_xdpe12284.o
-obj-m += wb_xdpe132g5c_pmbus.o
-obj-m += wb_i2c_ismt.o
-
-all:
-	$(MAKE) -C $(KERNEL_SRC)/build M=$(PWD) modules
-	@if [ ! -d $(module_out_put_dir) ]; then mkdir -p $(module_out_put_dir) ;fi
-	cp -p  $(PWD)/*.ko $(module_out_put_dir)
-clean:
-	rm -f $(PWD)/*.o $(PWD)/*.ko $(PWD)/*.mod.c $(PWD)/.*.cmd $(PWD)/*.mod
-	rm -f $(PWD)/Module.markers $(PWD)/Module.symvers $(PWD)/modules.order
-	rm -rf $(PWD)/.tmp_versions
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_algo_bit.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_algo_bit.c
deleted file mode 100644
index c98ac7a1c..000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_algo_bit.c
+++ /dev/null
@@ -1,725 +0,0 @@
-/* -------------------------------------------------------------------------
- * i2c-algo-bit.c i2c driver algorithms for bit-shift adapters
- * -------------------------------------------------------------------------
- *   Copyright (C) 1995-2000 Simon G. Vogl
-
-    This program is free software; you can redistribute it and/or modify
-    it under the terms of the GNU General Public License as published by
-    the Free Software Foundation; either version 2 of the License, or
-    (at your option) any later version.
-
-    This program is distributed in the hope that it will be useful,
-    but WITHOUT ANY WARRANTY; without even the implied warranty of
-    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-    GNU General Public License for more details.
- * ------------------------------------------------------------------------- */
-
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <linux/delay.h>
-#include <linux/errno.h>
-#include <linux/sched.h>
-#include <linux/i2c.h>
-#include <linux/i2c-algo-bit.h>
-
-static int g_i2c_algo_bit_debug = 0;
-static int g_i2c_algo_bit_error = 0;
-
-module_param(g_i2c_algo_bit_debug, int, S_IRUGO | S_IWUSR);
-module_param(g_i2c_algo_bit_error, int, S_IRUGO | S_IWUSR);
-
-#define I2C_ALGO_BIT_DEBUG(fmt, args...) do {                                        \
-    if (g_i2c_algo_bit_debug) { \
-        printk(KERN_INFO "[I2C_ALGO_BIT][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
-    } \
-} while (0)
-
-#define I2C_ALGO_BIT_ERROR(fmt, args...) do {                                        \
-    if (g_i2c_algo_bit_error) { \
-        printk(KERN_ERR "[I2C_ALGO_BIT][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
-    } \
-} while (0)
-
-/* ----- global defines ----------------------------------------------- */
-
-#ifdef DEBUG
-#define bit_dbg(level, dev, format, args...) \
-	do { \
-		if (i2c_debug >= level) \
-			dev_dbg(dev, format, ##args); \
-	} while (0)
-#else
-#define bit_dbg(level, dev, format, args...) \
-	do {} while (0)
-#endif /* DEBUG */
-
-/* ----- global variables ---------------------------------------------	*/
-
-static int bit_test;	/* see if the line-setting functions work	*/
-module_param(bit_test, int, S_IRUGO);
-MODULE_PARM_DESC(bit_test, "lines testing - 0 off; 1 report; 2 fail if stuck");
-
-#ifdef DEBUG
-static int i2c_debug = 1;
-module_param(i2c_debug, int, S_IRUGO | S_IWUSR);
-MODULE_PARM_DESC(i2c_debug,
-		 "debug level - 0 off; 1 normal; 2 verbose; 3 very verbose");
-#endif
-
-/* --- setting states on the bus with the right timing: ---------------	*/
-
-#define setsda(adap, val)	adap->setsda(adap->data, val)
-#define setscl(adap, val)	adap->setscl(adap->data, val)
-#define getsda(adap)		adap->getsda(adap->data)
-#define getscl(adap)		adap->getscl(adap->data)
-
-static inline void sdalo(struct i2c_algo_bit_data *adap)
-{
-	setsda(adap, 0);
-	udelay((adap->udelay + 1) / 2);
-}
-
-static inline void sdahi(struct i2c_algo_bit_data *adap)
-{
-	setsda(adap, 1);
-	udelay((adap->udelay + 1) / 2);
-}
-
-static inline void scllo(struct i2c_algo_bit_data *adap)
-{
-	setscl(adap, 0);
-	udelay(adap->udelay / 2);
-}
-
-/*
- * Raise scl line, and do checking for delays. This is necessary for slower
- * devices.
- */
-static int sclhi(struct i2c_algo_bit_data *adap)
-{
-	unsigned long start;
-
-	setscl(adap, 1);
-
-	/* Not all adapters have scl sense line... */
-	if (!adap->getscl)
-		goto done;
-
-	start = jiffies;
-	while (!getscl(adap)) {
-		/* This hw knows how to read the clock line, so we wait
-		 * until it actually gets high.  This is safer as some
-		 * chips may hold it low ("clock stretching") while they
-		 * are processing data internally.
-		 */
-		if (time_after(jiffies, start + adap->timeout)) {
-			/* Test one last time, as we may have been preempted
-			 * between last check and timeout test.
-			 */
-			if (getscl(adap))
-				break;
-			return -ETIMEDOUT;
-		}
-		cpu_relax();
-	}
-#ifdef DEBUG
-	if (jiffies != start && i2c_debug >= 3)
-		pr_debug("i2c-algo-bit: needed %ld jiffies for SCL to go "
-			 "high\n", jiffies - start);
-#endif
-
-done:
-	udelay(adap->udelay);
-	return 0;
-}
-
-/* --- other auxiliary functions --------------------------------------	*/
-static void i2c_start(struct i2c_algo_bit_data *adap)
-{
-	/* assert: scl, sda are high */
-	setsda(adap, 0);
-	udelay(adap->udelay);
-	scllo(adap);
-}
-
-static void i2c_repstart(struct i2c_algo_bit_data *adap)
-{
-	/* assert: scl is low */
-	sdahi(adap);
-	sclhi(adap);
-	setsda(adap, 0);
-	udelay(adap->udelay);
-	scllo(adap);
-}
-
-static void i2c_stop(struct i2c_algo_bit_data *adap)
-{
-	/* assert: scl is low */
-	sdalo(adap);
-	sclhi(adap);
-	setsda(adap, 1);
-	udelay(adap->udelay);
-}
-
-/* send a byte without start cond., look for arbitration,
-   check ackn. from slave */
-/* returns:
- * 1 if the device acknowledged
- * 0 if the device did not ack
- * -ETIMEDOUT if an error occurred (while raising the scl line)
- */
-static int i2c_outb(struct i2c_adapter *i2c_adap, unsigned char c)
-{
-	int i;
-	int sb;
-	int ack;
-	struct i2c_algo_bit_data *adap = i2c_adap->algo_data;
-
-	/* assert: scl is low */
-	for (i = 7; i >= 0; i--) {
-		sb = (c >> i) & 1;
-		setsda(adap, sb);
-		udelay((adap->udelay + 1) / 2);
-		if (sclhi(adap) < 0) { /* timed out */
-			bit_dbg(1, &i2c_adap->dev, "i2c_outb: 0x%02x, "
-				"timeout at bit #%d\n", (int)c, i);
-			return -ETIMEDOUT;
-		}
-		/* FIXME do arbitration here:
-		 * if (sb && !getsda(adap)) -> ouch! Get out of here.
-		 *
-		 * Report a unique code, so higher level code can retry
-		 * the whole (combined) message and *NOT* issue STOP.
-		 */
-		scllo(adap);
-	}
-	sdahi(adap);
-	if (sclhi(adap) < 0) { /* timeout */
-		bit_dbg(1, &i2c_adap->dev, "i2c_outb: 0x%02x, "
-			"timeout at ack\n", (int)c);
-		return -ETIMEDOUT;
-	}
-
-	/* read ack: SDA should be pulled down by slave, or it may
-	 * NAK (usually to report problems with the data we wrote).
-	 */
-	ack = !getsda(adap);    /* ack: sda is pulled low -> success */
-	bit_dbg(2, &i2c_adap->dev, "i2c_outb: 0x%02x %s\n", (int)c,
-		ack ? "A" : "NA");
-
-	scllo(adap);
-	return ack;
-	/* assert: scl is low (sda undef) */
-}
-
-static int i2c_inb(struct i2c_adapter *i2c_adap)
-{
-	/* read byte via i2c port, without start/stop sequence	*/
-	/* acknowledge is sent in i2c_read.			*/
-	int i;
-	unsigned char indata = 0;
-	struct i2c_algo_bit_data *adap = i2c_adap->algo_data;
-
-	/* assert: scl is low */
-	sdahi(adap);
-	for (i = 0; i < 8; i++) {
-		if (sclhi(adap) < 0) { /* timeout */
-			bit_dbg(1, &i2c_adap->dev, "i2c_inb: timeout at bit "
-				"#%d\n", 7 - i);
-			return -ETIMEDOUT;
-		}
-		indata *= 2;
-		if (getsda(adap))
-			indata |= 0x01;
-		setscl(adap, 0);
-		udelay(i == 7 ? adap->udelay / 2 : adap->udelay);
-	}
-	/* assert: scl is low */
-	return indata;
-}
-
-/*
- * Sanity check for the adapter hardware - check the reaction of
- * the bus lines only if it seems to be idle.
- */
-static int test_bus(struct i2c_adapter *i2c_adap)
-{
-	struct i2c_algo_bit_data *adap = i2c_adap->algo_data;
-	const char *name = i2c_adap->name;
-	int scl, sda, ret;
-
-	if (adap->pre_xfer) {
-		ret = adap->pre_xfer(i2c_adap);
-		if (ret < 0)
-			return -ENODEV;
-	}
-
-	if (adap->getscl == NULL)
-		pr_info("%s: Testing SDA only, SCL is not readable\n", name);
-
-	sda = getsda(adap);
-	scl = (adap->getscl == NULL) ? 1 : getscl(adap);
-	if (!scl || !sda) {
-		printk(KERN_WARNING
-		       "%s: bus seems to be busy (scl=%d, sda=%d)\n",
-		       name, scl, sda);
-		goto bailout;
-	}
-
-	sdalo(adap);
-	sda = getsda(adap);
-	scl = (adap->getscl == NULL) ? 1 : getscl(adap);
-	if (sda) {
-		printk(KERN_WARNING "%s: SDA stuck high!\n", name);
-		goto bailout;
-	}
-	if (!scl) {
-		printk(KERN_WARNING "%s: SCL unexpected low "
-		       "while pulling SDA low!\n", name);
-		goto bailout;
-	}
-
-	sdahi(adap);
-	sda = getsda(adap);
-	scl = (adap->getscl == NULL) ? 1 : getscl(adap);
-	if (!sda) {
-		printk(KERN_WARNING "%s: SDA stuck low!\n", name);
-		goto bailout;
-	}
-	if (!scl) {
-		printk(KERN_WARNING "%s: SCL unexpected low "
-		       "while pulling SDA high!\n", name);
-		goto bailout;
-	}
-
-	scllo(adap);
-	sda = getsda(adap);
-	scl = (adap->getscl == NULL) ? 0 : getscl(adap);
-	if (scl) {
-		printk(KERN_WARNING "%s: SCL stuck high!\n", name);
-		goto bailout;
-	}
-	if (!sda) {
-		printk(KERN_WARNING "%s: SDA unexpected low "
-		       "while pulling SCL low!\n", name);
-		goto bailout;
-	}
-
-	sclhi(adap);
-	sda = getsda(adap);
-	scl = (adap->getscl == NULL) ? 1 : getscl(adap);
-	if (!scl) {
-		printk(KERN_WARNING "%s: SCL stuck low!\n", name);
-		goto bailout;
-	}
-	if (!sda) {
-		printk(KERN_WARNING "%s: SDA unexpected low "
-		       "while pulling SCL high!\n", name);
-		goto bailout;
-	}
-
-	if (adap->post_xfer)
-		adap->post_xfer(i2c_adap);
-
-	pr_info("%s: Test OK\n", name);
-	return 0;
-bailout:
-	sdahi(adap);
-	sclhi(adap);
-
-	if (adap->post_xfer)
-		adap->post_xfer(i2c_adap);
-
-	return -ENODEV;
-}
-
-/* ----- Utility functions
- */
-
-/* try_address tries to contact a chip for a number of
- * times before it gives up.
- * return values:
- * 1 chip answered
- * 0 chip did not answer
- * -x transmission error
- */
-static int try_address(struct i2c_adapter *i2c_adap,
-		       unsigned char addr, int retries)
-{
-	struct i2c_algo_bit_data *adap = i2c_adap->algo_data;
-	int i, ret = 0;
-
-	for (i = 0; i <= retries; i++) {
-		ret = i2c_outb(i2c_adap, addr);
-		if (ret == 1 || i == retries)
-			break;
-		bit_dbg(3, &i2c_adap->dev, "emitting stop condition\n");
-		i2c_stop(adap);
-		udelay(adap->udelay);
-		yield();
-		bit_dbg(3, &i2c_adap->dev, "emitting start condition\n");
-		i2c_start(adap);
-	}
-	if (i && ret)
-		bit_dbg(1, &i2c_adap->dev, "Used %d tries to %s client at "
-			"0x%02x: %s\n", i + 1,
-			addr & 1 ? "read from" : "write to", addr >> 1,
-			ret == 1 ? "success" : "failed, timeout?");
-	return ret;
-}
-
-static int sendbytes(struct i2c_adapter *i2c_adap, struct i2c_msg *msg)
-{
-	const unsigned char *temp = msg->buf;
-	int count = msg->len;
-	unsigned short nak_ok = msg->flags & I2C_M_IGNORE_NAK;
-	int retval;
-	int wrcount = 0;
-
-	while (count > 0) {
-		retval = i2c_outb(i2c_adap, *temp);
-
-		/* OK/ACK; or ignored NAK */
-		if ((retval > 0) || (nak_ok && (retval == 0))) {
-			count--;
-			temp++;
-			wrcount++;
-
-		/* A slave NAKing the master means the slave didn't like
-		 * something about the data it saw.  For example, maybe
-		 * the SMBus PEC was wrong.
-		 */
-		} else if (retval == 0) {
-			dev_err(&i2c_adap->dev, "sendbytes: NAK bailout.\n");
-			return -EIO;
-
-		/* Timeout; or (someday) lost arbitration
-		 *
-		 * FIXME Lost ARB implies retrying the transaction from
-		 * the first message, after the "winning" master issues
-		 * its STOP.  As a rule, upper layer code has no reason
-		 * to know or care about this ... it is *NOT* an error.
-		 */
-		} else {
-			dev_err(&i2c_adap->dev, "sendbytes: error %d\n",
-					retval);
-			return retval;
-		}
-	}
-	return wrcount;
-}
-
-static int acknak(struct i2c_adapter *i2c_adap, int is_ack)
-{
-	struct i2c_algo_bit_data *adap = i2c_adap->algo_data;
-
-	/* assert: sda is high */
-	if (is_ack)		/* send ack */
-		setsda(adap, 0);
-	udelay((adap->udelay + 1) / 2);
-	if (sclhi(adap) < 0) {	/* timeout */
-		dev_err(&i2c_adap->dev, "readbytes: ack/nak timeout\n");
-		return -ETIMEDOUT;
-	}
-	scllo(adap);
-	return 0;
-}
-
-static int readbytes(struct i2c_adapter *i2c_adap, struct i2c_msg *msg)
-{
-	int inval;
-	int rdcount = 0;	/* counts bytes read */
-	unsigned char *temp = msg->buf;
-	int count = msg->len;
-	const unsigned flags = msg->flags;
-
-	while (count > 0) {
-		inval = i2c_inb(i2c_adap);
-		if (inval >= 0) {
-			*temp = inval;
-			rdcount++;
-		} else {   /* read timed out */
-			break;
-		}
-
-		temp++;
-		count--;
-
-		/* Some SMBus transactions require that we receive the
-		   transaction length as the first read byte. */
-		if (rdcount == 1 && (flags & I2C_M_RECV_LEN)) {
-			if (inval <= 0 || inval > I2C_SMBUS_BLOCK_MAX) {
-				if (!(flags & I2C_M_NO_RD_ACK))
-					acknak(i2c_adap, 0);
-				dev_err(&i2c_adap->dev, "readbytes: invalid "
-					"block length (%d)\n", inval);
-				return -EPROTO;
-			}
-			/* The original count value accounts for the extra
-			   bytes, that is, either 1 for a regular transaction,
-			   or 2 for a PEC transaction. */
-			count += inval;
-			msg->len += inval;
-		}
-
-		bit_dbg(2, &i2c_adap->dev, "readbytes: 0x%02x %s\n",
-			inval,
-			(flags & I2C_M_NO_RD_ACK)
-				? "(no ack/nak)"
-				: (count ? "A" : "NA"));
-
-		if (!(flags & I2C_M_NO_RD_ACK)) {
-			inval = acknak(i2c_adap, count);
-			if (inval < 0)
-				return inval;
-		}
-	}
-	return rdcount;
-}
-
-/* doAddress initiates the transfer by generating the start condition (in
- * try_address) and transmits the address in the necessary format to handle
- * reads, writes as well as 10bit-addresses.
- * returns:
- *  0 everything went okay, the chip ack'ed, or IGNORE_NAK flag was set
- * -x an error occurred (like: -ENXIO if the device did not answer, or
- *	-ETIMEDOUT, for example if the lines are stuck...)
- */
-static int bit_doAddress(struct i2c_adapter *i2c_adap, struct i2c_msg *msg)
-{
-	unsigned short flags = msg->flags;
-	unsigned short nak_ok = msg->flags & I2C_M_IGNORE_NAK;
-	struct i2c_algo_bit_data *adap = i2c_adap->algo_data;
-
-	unsigned char addr;
-	int ret, retries;
-
-	retries = nak_ok ? 0 : i2c_adap->retries;
-
-	if (flags & I2C_M_TEN) {
-		/* a ten bit address */
-		addr = 0xf0 | ((msg->addr >> 7) & 0x06);
-		bit_dbg(2, &i2c_adap->dev, "addr0: %d\n", addr);
-		/* try extended address code...*/
-		ret = try_address(i2c_adap, addr, retries);
-		if ((ret != 1) && !nak_ok)  {
-			dev_err(&i2c_adap->dev,
-				"died at extended address code\n");
-			return -ENXIO;
-		}
-		/* the remaining 8 bit address */
-		ret = i2c_outb(i2c_adap, msg->addr & 0xff);
-		if ((ret != 1) && !nak_ok) {
-			/* the chip did not ack / xmission error occurred */
-			dev_err(&i2c_adap->dev, "died at 2nd address code\n");
-			return -ENXIO;
-		}
-		if (flags & I2C_M_RD) {
-			bit_dbg(3, &i2c_adap->dev, "emitting repeated "
-				"start condition\n");
-			i2c_repstart(adap);
-			/* okay, now switch into reading mode */
-			addr |= 0x01;
-			ret = try_address(i2c_adap, addr, retries);
-			if ((ret != 1) && !nak_ok) {
-				dev_err(&i2c_adap->dev,
-					"died at repeated address code\n");
-				return -EIO;
-			}
-		}
-	} else {		/* normal 7bit address	*/
-		addr = msg->addr << 1;
-		if (flags & I2C_M_RD)
-			addr |= 1;
-		if (flags & I2C_M_REV_DIR_ADDR)
-			addr ^= 1;
-		ret = try_address(i2c_adap, addr, retries);
-		if ((ret != 1) && !nak_ok)
-			return -ENXIO;
-	}
-
-	return 0;
-}
-
-static void bit_i2c_unblock(struct i2c_adapter *i2c_adap)
-{
-    int i;
-    struct i2c_algo_bit_data *adap = i2c_adap->algo_data;
-
-    for (i = 0; i < 9; i++) {
-        setscl(adap, 0);
-        udelay(5);
-        setscl(adap, 1);
-        udelay(5);
-    }
-    setscl(adap, 0);
-    setsda(adap, 0);
-    udelay(5);
-    setscl(adap, 1);
-    udelay(5);
-    setsda(adap, 1);
-}
-
-static int check_bit_i2c_unblock(struct i2c_adapter *i2c_adap)
-{
-    struct i2c_algo_bit_data *adap = i2c_adap->algo_data;
-    int sda, scl;
-
-    sda = getsda(adap);
-    scl = getscl(adap);
-    if ((sda == 0) && scl) {
-        I2C_ALGO_BIT_ERROR("SCL is high and SDA is low, send 9 clock to device.\n");
-        bit_i2c_unblock(i2c_adap);
-    }
-
-    sda = getsda(adap);
-    scl = getscl(adap);
-    if (sda && scl) {
-        I2C_ALGO_BIT_DEBUG("SCL and SDA are both high, i2c level check ok.\n");
-        return 0;
-    }
-    dev_warn(&i2c_adap->dev, "Check i2c level failed, SCL %s, SDA %s.\n", scl ? "high" : "low", sda ? "high" : "low");
-    return -EIO;
-}
-
-static int bit_xfer(struct i2c_adapter *i2c_adap,
-		    struct i2c_msg msgs[], int num)
-{
-	struct i2c_msg *pmsg;
-	struct i2c_algo_bit_data *adap = i2c_adap->algo_data;
-	int i, ret;
-	unsigned short nak_ok;
-
-	if (adap->pre_xfer) {
-		ret = adap->pre_xfer(i2c_adap);
-		if (ret < 0)
-			return ret;
-	}
-
-    if (check_bit_i2c_unblock(i2c_adap) < 0) {
-        I2C_ALGO_BIT_ERROR("check i2c is block.\n");
-        return -EIO;
-    }
-
-	bit_dbg(3, &i2c_adap->dev, "emitting start condition\n");
-	i2c_start(adap);
-	for (i = 0; i < num; i++) {
-		pmsg = &msgs[i];
-		nak_ok = pmsg->flags & I2C_M_IGNORE_NAK;
-		if (!(pmsg->flags & I2C_M_NOSTART)) {
-			if (i) {
-				bit_dbg(3, &i2c_adap->dev, "emitting "
-					"repeated start condition\n");
-				i2c_repstart(adap);
-			}
-			ret = bit_doAddress(i2c_adap, pmsg);
-			if ((ret != 0) && !nak_ok) {
-				bit_dbg(1, &i2c_adap->dev, "NAK from "
-					"device addr 0x%02x msg #%d\n",
-					msgs[i].addr, i);
-				goto bailout;
-			}
-		}
-		if (pmsg->flags & I2C_M_RD) {
-			/* read bytes into buffer*/
-			ret = readbytes(i2c_adap, pmsg);
-			if (ret >= 1)
-				bit_dbg(2, &i2c_adap->dev, "read %d byte%s\n",
-					ret, ret == 1 ? "" : "s");
-			if (ret < pmsg->len) {
-				if (ret >= 0)
-					ret = -EIO;
-				goto bailout;
-			}
-		} else {
-			/* write bytes from buffer */
-			ret = sendbytes(i2c_adap, pmsg);
-			if (ret >= 1)
-				bit_dbg(2, &i2c_adap->dev, "wrote %d byte%s\n",
-					ret, ret == 1 ? "" : "s");
-			if (ret < pmsg->len) {
-				if (ret >= 0)
-					ret = -EIO;
-				goto bailout;
-			}
-		}
-	}
-	ret = i;
-
-bailout:
-	bit_dbg(3, &i2c_adap->dev, "emitting stop condition\n");
-	i2c_stop(adap);
-
-	if (adap->post_xfer)
-		adap->post_xfer(i2c_adap);
-	return ret;
-}
-
-static u32 bit_func(struct i2c_adapter *adap)
-{
-	return I2C_FUNC_I2C | I2C_FUNC_NOSTART | I2C_FUNC_SMBUS_EMUL |
-	       I2C_FUNC_SMBUS_READ_BLOCK_DATA |
-	       I2C_FUNC_SMBUS_BLOCK_PROC_CALL |
-	       I2C_FUNC_10BIT_ADDR | I2C_FUNC_PROTOCOL_MANGLING;
-}
-
-/* -----exported algorithm data: -------------------------------------	*/
-
-const struct i2c_algorithm wb_i2c_bit_algo = {
-	.master_xfer	= bit_xfer,
-	.functionality	= bit_func,
-};
-EXPORT_SYMBOL(wb_i2c_bit_algo);
-
-static const struct i2c_adapter_quirks i2c_bit_quirk_no_clk_stretch = {
-	.flags = I2C_AQ_NO_CLK_STRETCH,
-};
-
-/*
- * registering functions to load algorithms at runtime
- */
-static int __i2c_bit_add_bus(struct i2c_adapter *adap,
-			     int (*add_adapter)(struct i2c_adapter *))
-{
-	struct i2c_algo_bit_data *bit_adap = adap->algo_data;
-	int ret;
-
-	if (bit_test) {
-		ret = test_bus(adap);
-		if (bit_test >= 2 && ret < 0)
-			return -ENODEV;
-	}
-
-	/* register new adapter to i2c module... */
-	adap->algo = &wb_i2c_bit_algo;
-	adap->retries = 3;
-	if (bit_adap->getscl == NULL)
-		adap->quirks = &i2c_bit_quirk_no_clk_stretch;
-
-	ret = add_adapter(adap);
-	if (ret < 0)
-		return ret;
-
-	/* Complain if SCL can't be read */
-	if (bit_adap->getscl == NULL) {
-		dev_warn(&adap->dev, "Not I2C compliant: can't read SCL\n");
-		dev_warn(&adap->dev, "Bus may be unreliable\n");
-	}
-	return 0;
-}
-
-int wb_i2c_bit_add_bus(struct i2c_adapter *adap)
-{
-	return __i2c_bit_add_bus(adap, i2c_add_adapter);
-}
-EXPORT_SYMBOL(wb_i2c_bit_add_bus);
-
-int wb_i2c_bit_add_numbered_bus(struct i2c_adapter *adap)
-{
-	return __i2c_bit_add_bus(adap, i2c_add_numbered_adapter);
-}
-EXPORT_SYMBOL(wb_i2c_bit_add_numbered_bus);
-
-MODULE_AUTHOR("support");
-MODULE_DESCRIPTION("I2C-Bus bit-banging algorithm");
-MODULE_LICENSE("GPL");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_gpio.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_gpio.c
deleted file mode 100644
index 0362e905f..000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_gpio.c
+++ /dev/null
@@ -1,431 +0,0 @@
-/*
- * Bitbanging I2C bus driver using the GPIO API
- *
- * Copyright (C) 2007 Atmel Corporation
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#include <linux/debugfs.h>
-#include <linux/delay.h>
-#include <linux/i2c.h>
-#include <linux/i2c-algo-bit.h>
-#include <linux/platform_data/i2c-gpio.h>
-#include <linux/init.h>
-#include <linux/module.h>
-#include <linux/slab.h>
-#include <linux/platform_device.h>
-#include <linux/gpio/consumer.h>
-#include <linux/of.h>
-
-extern int wb_i2c_bit_add_numbered_bus(struct i2c_adapter *adap);
-
-struct i2c_gpio_private_data {
-	struct gpio_desc *sda;
-	struct gpio_desc *scl;
-	struct i2c_adapter adap;
-	struct i2c_algo_bit_data bit_data;
-	struct i2c_gpio_platform_data pdata;
-#ifdef CONFIG_I2C_GPIO_FAULT_INJECTOR
-	struct dentry *debug_dir;
-#endif
-};
-
-/*
- * Toggle SDA by changing the output value of the pin. This is only
- * valid for pins configured as open drain (i.e. setting the value
- * high effectively turns off the output driver.)
- */
-static void i2c_gpio_setsda_val(void *data, int state)
-{
-	struct i2c_gpio_private_data *priv = data;
-
-	gpiod_set_value_cansleep(priv->sda, state);
-}
-
-/*
- * Toggle SCL by changing the output value of the pin. This is used
- * for pins that are configured as open drain and for output-only
- * pins. The latter case will break the i2c protocol, but it will
- * often work in practice.
- */
-static void i2c_gpio_setscl_val(void *data, int state)
-{
-	struct i2c_gpio_private_data *priv = data;
-
-	gpiod_set_value_cansleep(priv->scl, state);
-}
-
-static int i2c_gpio_getsda(void *data)
-{
-	struct i2c_gpio_private_data *priv = data;
-
-	return gpiod_get_value_cansleep(priv->sda);
-}
-
-static int i2c_gpio_getscl(void *data)
-{
-	struct i2c_gpio_private_data *priv = data;
-
-	return gpiod_get_value_cansleep(priv->scl);
-}
-
-#ifdef CONFIG_I2C_GPIO_FAULT_INJECTOR
-static struct dentry *i2c_gpio_debug_dir;
-
-#define setsda(bd, val)	((bd)->setsda((bd)->data, val))
-#define setscl(bd, val)	((bd)->setscl((bd)->data, val))
-#define getsda(bd)	((bd)->getsda((bd)->data))
-#define getscl(bd)	((bd)->getscl((bd)->data))
-
-#define WIRE_ATTRIBUTE(wire) \
-static int fops_##wire##_get(void *data, u64 *val)		\
-{								\
-	struct i2c_gpio_private_data *priv = data;		\
-								\
-	i2c_lock_bus(&priv->adap, I2C_LOCK_ROOT_ADAPTER);	\
-	*val = get##wire(&priv->bit_data);			\
-	i2c_unlock_bus(&priv->adap, I2C_LOCK_ROOT_ADAPTER);	\
-	return 0;						\
-}								\
-static int fops_##wire##_set(void *data, u64 val)		\
-{								\
-	struct i2c_gpio_private_data *priv = data;		\
-								\
-	i2c_lock_bus(&priv->adap, I2C_LOCK_ROOT_ADAPTER);	\
-	set##wire(&priv->bit_data, val);			\
-	i2c_unlock_bus(&priv->adap, I2C_LOCK_ROOT_ADAPTER);	\
-	return 0;						\
-}								\
-DEFINE_DEBUGFS_ATTRIBUTE(fops_##wire, fops_##wire##_get, fops_##wire##_set, "%llu\n")
-
-WIRE_ATTRIBUTE(scl);
-WIRE_ATTRIBUTE(sda);
-
-static void i2c_gpio_incomplete_transfer(struct i2c_gpio_private_data *priv,
-					u32 pattern, u8 pattern_size)
-{
-	struct i2c_algo_bit_data *bit_data = &priv->bit_data;
-	int i;
-
-	i2c_lock_bus(&priv->adap, I2C_LOCK_ROOT_ADAPTER);
-
-	/* START condition */
-	setsda(bit_data, 0);
-	udelay(bit_data->udelay);
-
-	/* Send pattern, request ACK, don't send STOP */
-	for (i = pattern_size - 1; i >= 0; i--) {
-		setscl(bit_data, 0);
-		udelay(bit_data->udelay / 2);
-		setsda(bit_data, (pattern >> i) & 1);
-		udelay((bit_data->udelay + 1) / 2);
-		setscl(bit_data, 1);
-		udelay(bit_data->udelay);
-	}
-
-	i2c_unlock_bus(&priv->adap, I2C_LOCK_ROOT_ADAPTER);
-}
-
-static int fops_incomplete_addr_phase_set(void *data, u64 addr)
-{
-	struct i2c_gpio_private_data *priv = data;
-	u32 pattern;
-
-	if (addr > 0x7f)
-		return -EINVAL;
-
-	/* ADDR (7 bit) + RD (1 bit) + Client ACK, keep SDA hi (1 bit) */
-	pattern = (addr << 2) | 3;
-
-	i2c_gpio_incomplete_transfer(priv, pattern, 9);
-
-	return 0;
-}
-DEFINE_DEBUGFS_ATTRIBUTE(fops_incomplete_addr_phase, NULL, fops_incomplete_addr_phase_set, "%llu\n");
-
-static int fops_incomplete_write_byte_set(void *data, u64 addr)
-{
-	struct i2c_gpio_private_data *priv = data;
-	u32 pattern;
-
-	if (addr > 0x7f)
-		return -EINVAL;
-
-	/* ADDR (7 bit) + WR (1 bit) + Client ACK (1 bit) */
-	pattern = (addr << 2) | 1;
-	/* 0x00 (8 bit) + Client ACK, keep SDA hi (1 bit) */
-	pattern = (pattern << 9) | 1;
-
-	i2c_gpio_incomplete_transfer(priv, pattern, 18);
-
-	return 0;
-}
-DEFINE_DEBUGFS_ATTRIBUTE(fops_incomplete_write_byte, NULL, fops_incomplete_write_byte_set, "%llu\n");
-
-static void i2c_gpio_fault_injector_init(struct platform_device *pdev)
-{
-	struct i2c_gpio_private_data *priv = platform_get_drvdata(pdev);
-
-	/*
-	 * If there will be a debugfs-dir per i2c adapter somewhen, put the
-	 * 'fault-injector' dir there. Until then, we have a global dir with
-	 * all adapters as subdirs.
-	 */
-	if (!i2c_gpio_debug_dir) {
-		i2c_gpio_debug_dir = debugfs_create_dir("i2c-fault-injector", NULL);
-		if (!i2c_gpio_debug_dir)
-			return;
-	}
-
-	priv->debug_dir = debugfs_create_dir(pdev->name, i2c_gpio_debug_dir);
-	if (!priv->debug_dir)
-		return;
-
-	debugfs_create_file_unsafe("scl", 0600, priv->debug_dir, priv, &fops_scl);
-	debugfs_create_file_unsafe("sda", 0600, priv->debug_dir, priv, &fops_sda);
-	debugfs_create_file_unsafe("incomplete_address_phase", 0200, priv->debug_dir,
-				   priv, &fops_incomplete_addr_phase);
-	debugfs_create_file_unsafe("incomplete_write_byte", 0200, priv->debug_dir,
-				   priv, &fops_incomplete_write_byte);
-}
-
-static void i2c_gpio_fault_injector_exit(struct platform_device *pdev)
-{
-	struct i2c_gpio_private_data *priv = platform_get_drvdata(pdev);
-
-	debugfs_remove_recursive(priv->debug_dir);
-}
-#else
-static inline void i2c_gpio_fault_injector_init(struct platform_device *pdev) {}
-static inline void i2c_gpio_fault_injector_exit(struct platform_device *pdev) {}
-#endif /* CONFIG_I2C_GPIO_FAULT_INJECTOR*/
-
-static void of_i2c_gpio_get_props(struct device_node *np,
-				  struct i2c_gpio_platform_data *pdata)
-{
-	u32 reg;
-
-	of_property_read_u32(np, "i2c-gpio,delay-us", &pdata->udelay);
-
-	if (!of_property_read_u32(np, "i2c-gpio,timeout-ms", &reg))
-		pdata->timeout = msecs_to_jiffies(reg);
-
-	pdata->sda_is_open_drain =
-		of_property_read_bool(np, "i2c-gpio,sda-open-drain");
-	pdata->scl_is_open_drain =
-		of_property_read_bool(np, "i2c-gpio,scl-open-drain");
-	pdata->scl_is_output_only =
-		of_property_read_bool(np, "i2c-gpio,scl-output-only");
-}
-
-static struct gpio_desc *i2c_gpio_get_desc(struct device *dev,
-					   const char *con_id,
-					   unsigned int index,
-					   enum gpiod_flags gflags)
-{
-	struct gpio_desc *retdesc;
-	int ret;
-
-	retdesc = devm_gpiod_get(dev, con_id, gflags);
-	if (!IS_ERR(retdesc)) {
-		dev_dbg(dev, "got GPIO from name %s\n", con_id);
-		return retdesc;
-	}
-
-	retdesc = devm_gpiod_get_index(dev, NULL, index, gflags);
-	if (!IS_ERR(retdesc)) {
-		dev_dbg(dev, "got GPIO from index %u\n", index);
-		return retdesc;
-	}
-
-	ret = PTR_ERR(retdesc);
-
-	/* FIXME: hack in the old code, is this really necessary? */
-	if (ret == -EINVAL)
-		retdesc = ERR_PTR(-EPROBE_DEFER);
-
-	/* This happens if the GPIO driver is not yet probed, let's defer */
-	if (ret == -ENOENT)
-		retdesc = ERR_PTR(-EPROBE_DEFER);
-
-	if (PTR_ERR(retdesc) != -EPROBE_DEFER)
-		dev_err(dev, "error trying to get descriptor: %d\n", ret);
-
-	return retdesc;
-}
-
-static int i2c_gpio_probe(struct platform_device *pdev)
-{
-	struct i2c_gpio_private_data *priv;
-	struct i2c_gpio_platform_data *pdata;
-	struct i2c_algo_bit_data *bit_data;
-	struct i2c_adapter *adap;
-	struct device *dev = &pdev->dev;
-	struct device_node *np = dev->of_node;
-	enum gpiod_flags gflags;
-	int ret;
-
-	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
-	if (!priv)
-		return -ENOMEM;
-
-	adap = &priv->adap;
-	bit_data = &priv->bit_data;
-	pdata = &priv->pdata;
-
-	if (np) {
-		of_i2c_gpio_get_props(np, pdata);
-	} else {
-		/*
-		 * If all platform data settings are zero it is OK
-		 * to not provide any platform data from the board.
-		 */
-		if (dev_get_platdata(dev))
-			memcpy(pdata, dev_get_platdata(dev), sizeof(*pdata));
-	}
-
-	/*
-	 * First get the GPIO pins; if it fails, we'll defer the probe.
-	 * If the SDA line is marked from platform data or device tree as
-	 * "open drain" it means something outside of our control is making
-	 * this line being handled as open drain, and we should just handle
-	 * it as any other output. Else we enforce open drain as this is
-	 * required for an I2C bus.
-	 */
-	if (pdata->sda_is_open_drain)
-		gflags = GPIOD_OUT_HIGH;
-	else
-		gflags = GPIOD_OUT_HIGH_OPEN_DRAIN;
-	priv->sda = i2c_gpio_get_desc(dev, "sda", 0, gflags);
-	if (IS_ERR(priv->sda))
-		return PTR_ERR(priv->sda);
-
-	/*
-	 * If the SCL line is marked from platform data or device tree as
-	 * "open drain" it means something outside of our control is making
-	 * this line being handled as open drain, and we should just handle
-	 * it as any other output. Else we enforce open drain as this is
-	 * required for an I2C bus.
-	 */
-	if (pdata->scl_is_open_drain)
-		gflags = GPIOD_OUT_HIGH;
-	else
-		gflags = GPIOD_OUT_HIGH_OPEN_DRAIN;
-	priv->scl = i2c_gpio_get_desc(dev, "scl", 1, gflags);
-	if (IS_ERR(priv->scl))
-		return PTR_ERR(priv->scl);
-
-	if (gpiod_cansleep(priv->sda) || gpiod_cansleep(priv->scl))
-		dev_warn(dev, "Slow GPIO pins might wreak havoc into I2C/SMBus bus timing");
-
-	bit_data->setsda = i2c_gpio_setsda_val;
-	bit_data->setscl = i2c_gpio_setscl_val;
-
-	if (!pdata->scl_is_output_only)
-		bit_data->getscl = i2c_gpio_getscl;
-	bit_data->getsda = i2c_gpio_getsda;
-
-	if (pdata->udelay)
-		bit_data->udelay = pdata->udelay;
-	else if (pdata->scl_is_output_only)
-		bit_data->udelay = 50;			/* 10 kHz */
-	else
-		bit_data->udelay = 5;			/* 100 kHz */
-
-	if (pdata->timeout)
-		bit_data->timeout = pdata->timeout;
-	else
-		bit_data->timeout = HZ / 10;		/* 100 ms */
-
-	bit_data->data = priv;
-
-	adap->owner = THIS_MODULE;
-	if (np)
-		strlcpy(adap->name, dev_name(dev), sizeof(adap->name));
-	else
-		snprintf(adap->name, sizeof(adap->name), "i2c-gpio%d", pdev->id);
-
-	adap->algo_data = bit_data;
-	adap->class = I2C_CLASS_HWMON | I2C_CLASS_SPD;
-	adap->dev.parent = dev;
-	adap->dev.of_node = np;
-
-	adap->nr = pdev->id;
-	ret = wb_i2c_bit_add_numbered_bus(adap);
-	if (ret)
-		return ret;
-
-	platform_set_drvdata(pdev, priv);
-
-	/*
-	 * FIXME: using global GPIO numbers is not helpful. If/when we
-	 * get accessors to get the actual name of the GPIO line,
-	 * from the descriptor, then provide that instead.
-	 */
-	dev_info(dev, "using lines %u (SDA) and %u (SCL%s)\n",
-		 desc_to_gpio(priv->sda), desc_to_gpio(priv->scl),
-		 pdata->scl_is_output_only
-		 ? ", no clock stretching" : "");
-
-	i2c_gpio_fault_injector_init(pdev);
-
-	return 0;
-}
-
-static int i2c_gpio_remove(struct platform_device *pdev)
-{
-	struct i2c_gpio_private_data *priv;
-	struct i2c_adapter *adap;
-
-	i2c_gpio_fault_injector_exit(pdev);
-
-	priv = platform_get_drvdata(pdev);
-	adap = &priv->adap;
-
-	i2c_del_adapter(adap);
-
-	return 0;
-}
-
-#if defined(CONFIG_OF)
-static const struct of_device_id i2c_gpio_dt_ids[] = {
-	{ .compatible = "wb-i2c-gpio", },
-	{ /* sentinel */ }
-};
-
-MODULE_DEVICE_TABLE(of, i2c_gpio_dt_ids);
-#endif
-
-static struct platform_driver i2c_gpio_driver = {
-	.driver		= {
-		.name	= "wb-i2c-gpio",
-		.of_match_table	= of_match_ptr(i2c_gpio_dt_ids),
-	},
-	.probe		= i2c_gpio_probe,
-	.remove		= i2c_gpio_remove,
-};
-
-static int __init i2c_gpio_init(void)
-{
-	int ret;
-
-	ret = platform_driver_register(&i2c_gpio_driver);
-	if (ret)
-		printk(KERN_ERR "i2c-gpio: probe failed: %d\n", ret);
-
-	return ret;
-}
-subsys_initcall(i2c_gpio_init);
-
-static void __exit i2c_gpio_exit(void)
-{
-	platform_driver_unregister(&i2c_gpio_driver);
-}
-module_exit(i2c_gpio_exit);
-
-MODULE_AUTHOR("support");
-MODULE_DESCRIPTION("Platform-independent bitbanging I2C driver");
-MODULE_LICENSE("GPL");
-MODULE_ALIAS("platform:i2c-gpio");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_i801.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_i801.c
deleted file mode 100644
index a733c1154..000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_i801.c
+++ /dev/null
@@ -1,2114 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later
-/*
-    Copyright (c) 1998 - 2002  Frodo Looijaard <frodol@dds.nl>,
-    Philip Edelbrock <phil@netroedge.com>, and Mark D. Studebaker
-    <mdsxyz123@yahoo.com>
-    Copyright (C) 2007 - 2014  Jean Delvare <jdelvare@suse.de>
-    Copyright (C) 2010         Intel Corporation,
-                               David Woodhouse <dwmw2@infradead.org>
-
-*/
-
-/*
- * Supports the following Intel I/O Controller Hubs (ICH):
- *
- *					I/O			Block	I2C
- *					region	SMBus	Block	proc.	block
- * Chip name			PCI ID	size	PEC	buffer	call	read
- * ---------------------------------------------------------------------------
- * 82801AA (ICH)		0x2413	16	no	no	no	no
- * 82801AB (ICH0)		0x2423	16	no	no	no	no
- * 82801BA (ICH2)		0x2443	16	no	no	no	no
- * 82801CA (ICH3)		0x2483	32	soft	no	no	no
- * 82801DB (ICH4)		0x24c3	32	hard	yes	no	no
- * 82801E (ICH5)		0x24d3	32	hard	yes	yes	yes
- * 6300ESB			0x25a4	32	hard	yes	yes	yes
- * 82801F (ICH6)		0x266a	32	hard	yes	yes	yes
- * 6310ESB/6320ESB		0x269b	32	hard	yes	yes	yes
- * 82801G (ICH7)		0x27da	32	hard	yes	yes	yes
- * 82801H (ICH8)		0x283e	32	hard	yes	yes	yes
- * 82801I (ICH9)		0x2930	32	hard	yes	yes	yes
- * EP80579 (Tolapai)		0x5032	32	hard	yes	yes	yes
- * ICH10			0x3a30	32	hard	yes	yes	yes
- * ICH10			0x3a60	32	hard	yes	yes	yes
- * 5/3400 Series (PCH)		0x3b30	32	hard	yes	yes	yes
- * 6 Series (PCH)		0x1c22	32	hard	yes	yes	yes
- * Patsburg (PCH)		0x1d22	32	hard	yes	yes	yes
- * Patsburg (PCH) IDF		0x1d70	32	hard	yes	yes	yes
- * Patsburg (PCH) IDF		0x1d71	32	hard	yes	yes	yes
- * Patsburg (PCH) IDF		0x1d72	32	hard	yes	yes	yes
- * DH89xxCC (PCH)		0x2330	32	hard	yes	yes	yes
- * Panther Point (PCH)		0x1e22	32	hard	yes	yes	yes
- * Lynx Point (PCH)		0x8c22	32	hard	yes	yes	yes
- * Lynx Point-LP (PCH)		0x9c22	32	hard	yes	yes	yes
- * Avoton (SOC)			0x1f3c	32	hard	yes	yes	yes
- * Wellsburg (PCH)		0x8d22	32	hard	yes	yes	yes
- * Wellsburg (PCH) MS		0x8d7d	32	hard	yes	yes	yes
- * Wellsburg (PCH) MS		0x8d7e	32	hard	yes	yes	yes
- * Wellsburg (PCH) MS		0x8d7f	32	hard	yes	yes	yes
- * Coleto Creek (PCH)		0x23b0	32	hard	yes	yes	yes
- * Wildcat Point (PCH)		0x8ca2	32	hard	yes	yes	yes
- * Wildcat Point-LP (PCH)	0x9ca2	32	hard	yes	yes	yes
- * BayTrail (SOC)		0x0f12	32	hard	yes	yes	yes
- * Braswell (SOC)		0x2292	32	hard	yes	yes	yes
- * Sunrise Point-H (PCH) 	0xa123  32	hard	yes	yes	yes
- * Sunrise Point-LP (PCH)	0x9d23	32	hard	yes	yes	yes
- * DNV (SOC)			0x19df	32	hard	yes	yes	yes
- * Emmitsburg (PCH)		0x1bc9	32	hard	yes	yes	yes
- * Broxton (SOC)		0x5ad4	32	hard	yes	yes	yes
- * Lewisburg (PCH)		0xa1a3	32	hard	yes	yes	yes
- * Lewisburg Supersku (PCH)	0xa223	32	hard	yes	yes	yes
- * Kaby Lake PCH-H (PCH)	0xa2a3	32	hard	yes	yes	yes
- * Gemini Lake (SOC)		0x31d4	32	hard	yes	yes	yes
- * Cannon Lake-H (PCH)		0xa323	32	hard	yes	yes	yes
- * Cannon Lake-LP (PCH)		0x9da3	32	hard	yes	yes	yes
- * Cedar Fork (PCH)		0x18df	32	hard	yes	yes	yes
- * Ice Lake-LP (PCH)		0x34a3	32	hard	yes	yes	yes
- * Comet Lake (PCH)		0x02a3	32	hard	yes	yes	yes
- * Comet Lake-H (PCH)		0x06a3	32	hard	yes	yes	yes
- * Elkhart Lake (PCH)		0x4b23	32	hard	yes	yes	yes
- * Tiger Lake-LP (PCH)		0xa0a3	32	hard	yes	yes	yes
- * Tiger Lake-H (PCH)		0x43a3	32	hard	yes	yes	yes
- * Jasper Lake (SOC)		0x4da3	32	hard	yes	yes	yes
- * Comet Lake-V (PCH)		0xa3a3	32	hard	yes	yes	yes
- * Alder Lake-S (PCH)		0x7aa3	32	hard	yes	yes	yes
- *
- * Features supported by this driver:
- * Software PEC				no
- * Hardware PEC				yes
- * Block buffer				yes
- * Block process call transaction	yes
- * I2C block read transaction		yes (doesn't use the block buffer)
- * Slave mode				no
- * SMBus Host Notify			yes
- * Interrupt processing			yes
- *
- * See the file Documentation/i2c/busses/i2c-i801.rst for details.
- */
-
-#include <linux/interrupt.h>
-#include <linux/module.h>
-#include <linux/pci.h>
-#include <linux/kernel.h>
-#include <linux/stddef.h>
-#include <linux/delay.h>
-#include <linux/ioport.h>
-#include <linux/init.h>
-#include <linux/i2c.h>
-#include <linux/i2c-smbus.h>
-#include <linux/acpi.h>
-#include <linux/io.h>
-#include <linux/dmi.h>
-#include <linux/slab.h>
-#include <linux/string.h>
-#include <linux/wait.h>
-#include <linux/err.h>
-#include <linux/platform_device.h>
-#include <linux/platform_data/itco_wdt.h>
-#include <linux/pm_runtime.h>
-#include <linux/string.h>
-
-#if IS_ENABLED(CONFIG_I2C_MUX_GPIO) && defined CONFIG_DMI
-#include <linux/gpio/machine.h>
-#include <linux/platform_data/i2c-mux-gpio.h>
-#endif
-
-#define mem_clear(data, size) memset((data), 0, (size))
-
-/* I801 SMBus address offsets */
-#define SMBHSTSTS(p)	(0 + (p)->smba)
-#define SMBHSTCNT(p)	(2 + (p)->smba)
-#define SMBHSTCMD(p)	(3 + (p)->smba)
-#define SMBHSTADD(p)	(4 + (p)->smba)
-#define SMBHSTDAT0(p)	(5 + (p)->smba)
-#define SMBHSTDAT1(p)	(6 + (p)->smba)
-#define SMBBLKDAT(p)	(7 + (p)->smba)
-#define SMBPEC(p)	(8 + (p)->smba)		/* ICH3 and later */
-#define SMBAUXSTS(p)	(12 + (p)->smba)	/* ICH4 and later */
-#define SMBAUXCTL(p)	(13 + (p)->smba)	/* ICH4 and later */
-#define SMBSLVSTS(p)	(16 + (p)->smba)	/* ICH3 and later */
-#define SMBSLVCMD(p)	(17 + (p)->smba)	/* ICH3 and later */
-#define SMBNTFDADD(p)	(20 + (p)->smba)	/* ICH3 and later */
-#define SMBPINCTL(p)	(15 + (p)->smba)	/* SMBus Pin Control Register */
-
-/* PCI Address Constants */
-#define SMBBAR		4
-#define SMBPCICTL	0x004
-#define SMBPCISTS	0x006
-#define SMBHSTCFG	0x040
-#define TCOBASE		0x050
-#define TCOCTL		0x054
-
-#define SBREG_BAR		0x10
-#define SBREG_SMBCTRL		0xc6000c
-#define SBREG_SMBCTRL_DNV	0xcf000c
-
-/* Host status bits for SMBPCISTS */
-#define SMBPCISTS_INTS		BIT(3)
-
-/* Control bits for SMBPCICTL */
-#define SMBPCICTL_INTDIS	BIT(10)
-
-/* Host configuration bits for SMBHSTCFG */
-#define SMBHSTCFG_HST_EN	BIT(0)
-#define SMBHSTCFG_SMB_SMI_EN	BIT(1)
-#define SMBHSTCFG_I2C_EN	BIT(2)
-#define SMBHSTCFG_SSRESET	BIT(3)
-#define SSRESET_SLEEP_TIME  1   /* 1us */
-#define SSRESET_RETRY_TIME  (1000 / SSRESET_SLEEP_TIME)
-
-/* Pin status for SMBPINCTL */
-#define SMBPINCTL_CLK_STS	1       /* bit0 SMBCLK_CUR_STS*/
-#define SMBPINCTL_SDA_STS	2       /* bit1 SMBDATA_CUR_STS*/
-#define SMBPINCTL_CLK_CTL	4       /* bit2 SMBCLK_CTL */
-
-#define SMBHSTCFG_SPD_WD	BIT(4)
-
-/* TCO configuration bits for TCOCTL */
-#define TCOCTL_EN		BIT(8)
-
-/* Auxiliary status register bits, ICH4+ only */
-#define SMBAUXSTS_CRCE		BIT(0)
-#define SMBAUXSTS_STCO		BIT(1)
-
-/* Auxiliary control register bits, ICH4+ only */
-#define SMBAUXCTL_CRC		BIT(0)
-#define SMBAUXCTL_E32B		BIT(1)
-
-/* Other settings */
-#define MAX_RETRIES		400
-
-/* I801 command constants */
-#define I801_QUICK		0x00
-#define I801_BYTE		0x04
-#define I801_BYTE_DATA		0x08
-#define I801_WORD_DATA		0x0C
-#define I801_PROC_CALL		0x10	/* unimplemented */
-#define I801_BLOCK_DATA		0x14
-#define I801_I2C_BLOCK_DATA	0x18	/* ICH5 and later */
-#define I801_BLOCK_PROC_CALL	0x1C
-
-/* I801 Host Control register bits */
-#define SMBHSTCNT_INTREN	BIT(0)
-#define SMBHSTCNT_KILL		BIT(1)
-#define SMBHSTCNT_LAST_BYTE	BIT(5)
-#define SMBHSTCNT_START		BIT(6)
-#define SMBHSTCNT_PEC_EN	BIT(7)	/* ICH3 and later */
-
-/* I801 Hosts Status register bits */
-#define SMBHSTSTS_BYTE_DONE	BIT(7)
-#define SMBHSTSTS_INUSE_STS	BIT(6)
-#define SMBHSTSTS_SMBALERT_STS	BIT(5)
-#define SMBHSTSTS_FAILED	BIT(4)
-#define SMBHSTSTS_BUS_ERR	BIT(3)
-#define SMBHSTSTS_DEV_ERR	BIT(2)
-#define SMBHSTSTS_INTR		BIT(1)
-#define SMBHSTSTS_HOST_BUSY	BIT(0)
-
-/* Host Notify Status register bits */
-#define SMBSLVSTS_HST_NTFY_STS	BIT(0)
-
-/* Host Notify Command register bits */
-#define SMBSLVCMD_HST_NTFY_INTREN	BIT(0)
-
-#define STATUS_ERROR_FLAGS	(SMBHSTSTS_FAILED | SMBHSTSTS_BUS_ERR | \
-				 SMBHSTSTS_DEV_ERR)
-
-#define STATUS_FLAGS		(SMBHSTSTS_BYTE_DONE | SMBHSTSTS_INTR | \
-				 STATUS_ERROR_FLAGS)
-
-/* Older devices have their ID defined in <linux/pci_ids.h> */
-#define PCI_DEVICE_ID_INTEL_COMETLAKE_SMBUS		0x02a3
-#define PCI_DEVICE_ID_INTEL_COMETLAKE_H_SMBUS		0x06a3
-#define PCI_DEVICE_ID_INTEL_BAYTRAIL_SMBUS		0x0f12
-#define PCI_DEVICE_ID_INTEL_CDF_SMBUS			0x18df
-#define PCI_DEVICE_ID_INTEL_DNV_SMBUS			0x19df
-#define PCI_DEVICE_ID_INTEL_EBG_SMBUS			0x1bc9
-#define PCI_DEVICE_ID_INTEL_COUGARPOINT_SMBUS		0x1c22
-#define PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS		0x1d22
-/* Patsburg also has three 'Integrated Device Function' SMBus controllers */
-#define PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF0		0x1d70
-#define PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF1		0x1d71
-#define PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF2		0x1d72
-#define PCI_DEVICE_ID_INTEL_PANTHERPOINT_SMBUS		0x1e22
-#define PCI_DEVICE_ID_INTEL_AVOTON_SMBUS		0x1f3c
-#define PCI_DEVICE_ID_INTEL_BRASWELL_SMBUS		0x2292
-#define PCI_DEVICE_ID_INTEL_DH89XXCC_SMBUS		0x2330
-#define PCI_DEVICE_ID_INTEL_COLETOCREEK_SMBUS		0x23b0
-#define PCI_DEVICE_ID_INTEL_GEMINILAKE_SMBUS		0x31d4
-#define PCI_DEVICE_ID_INTEL_ICELAKE_LP_SMBUS		0x34a3
-#define PCI_DEVICE_ID_INTEL_5_3400_SERIES_SMBUS		0x3b30
-#define PCI_DEVICE_ID_INTEL_TIGERLAKE_H_SMBUS		0x43a3
-#define PCI_DEVICE_ID_INTEL_ELKHART_LAKE_SMBUS		0x4b23
-#define PCI_DEVICE_ID_INTEL_JASPER_LAKE_SMBUS		0x4da3
-#define PCI_DEVICE_ID_INTEL_BROXTON_SMBUS		0x5ad4
-#define PCI_DEVICE_ID_INTEL_ALDER_LAKE_S_SMBUS		0x7aa3
-#define PCI_DEVICE_ID_INTEL_LYNXPOINT_SMBUS		0x8c22
-#define PCI_DEVICE_ID_INTEL_WILDCATPOINT_SMBUS		0x8ca2
-#define PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS		0x8d22
-#define PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS0		0x8d7d
-#define PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS1		0x8d7e
-#define PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS2		0x8d7f
-#define PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_SMBUS		0x9c22
-#define PCI_DEVICE_ID_INTEL_WILDCATPOINT_LP_SMBUS	0x9ca2
-#define PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_SMBUS	0x9d23
-#define PCI_DEVICE_ID_INTEL_CANNONLAKE_LP_SMBUS		0x9da3
-#define PCI_DEVICE_ID_INTEL_TIGERLAKE_LP_SMBUS		0xa0a3
-#define PCI_DEVICE_ID_INTEL_SUNRISEPOINT_H_SMBUS	0xa123
-#define PCI_DEVICE_ID_INTEL_LEWISBURG_SMBUS		0xa1a3
-#define PCI_DEVICE_ID_INTEL_LEWISBURG_SSKU_SMBUS	0xa223
-#define PCI_DEVICE_ID_INTEL_KABYLAKE_PCH_H_SMBUS	0xa2a3
-#define PCI_DEVICE_ID_INTEL_CANNONLAKE_H_SMBUS		0xa323
-#define PCI_DEVICE_ID_INTEL_COMETLAKE_V_SMBUS		0xa3a3
-
-struct i801_mux_config {
-	char *gpio_chip;
-	unsigned values[3];
-	int n_values;
-	unsigned classes[3];
-	unsigned gpios[2];		/* Relative to gpio_chip->base */
-	int n_gpios;
-};
-
-struct i801_priv {
-	struct i2c_adapter adapter;
-	unsigned long smba;
-	unsigned char original_hstcfg;
-	unsigned char original_slvcmd;
-	struct pci_dev *pci_dev;
-	unsigned int features;
-
-	/* isr processing */
-	wait_queue_head_t waitq;
-	u8 status;
-
-	/* Command state used by isr for byte-by-byte block transactions */
-	u8 cmd;
-	bool is_read;
-	int count;
-	int len;
-	u8 *data;
-
-#if IS_ENABLED(CONFIG_I2C_MUX_GPIO) && defined CONFIG_DMI
-	const struct i801_mux_config *mux_drvdata;
-	struct platform_device *mux_pdev;
-	struct gpiod_lookup_table *lookup;
-#endif
-	struct platform_device *tco_pdev;
-
-	/*
-	 * If set to true the host controller registers are reserved for
-	 * ACPI AML use. Protected by acpi_lock.
-	 */
-	bool acpi_reserved;
-	struct mutex acpi_lock;
-};
-
-#define FEATURE_SMBUS_PEC	BIT(0)
-#define FEATURE_BLOCK_BUFFER	BIT(1)
-#define FEATURE_BLOCK_PROC	BIT(2)
-#define FEATURE_I2C_BLOCK_READ	BIT(3)
-#define FEATURE_IRQ		BIT(4)
-#define FEATURE_HOST_NOTIFY	BIT(5)
-/* Not really a feature, but it's convenient to handle it as such */
-#define FEATURE_IDF		BIT(15)
-#define FEATURE_TCO_SPT		BIT(16)
-#define FEATURE_TCO_CNL		BIT(17)
-
-static const char *i801_feature_names[] = {
-	"SMBus PEC",
-	"Block buffer",
-	"Block process call",
-	"I2C block read",
-	"Interrupt",
-	"SMBus Host Notify",
-};
-
-static unsigned int disable_features;
-module_param(disable_features, uint, S_IRUGO | S_IWUSR);
-MODULE_PARM_DESC(disable_features, "Disable selected driver features:\n"
-	"\t\t  0x01  disable SMBus PEC\n"
-	"\t\t  0x02  disable the block buffer\n"
-	"\t\t  0x08  disable the I2C block read functionality\n"
-	"\t\t  0x10  don't use interrupts\n"
-	"\t\t  0x20  disable SMBus Host Notify ");
-
-static void i801_setscl(struct i801_priv *priv, unsigned int level)
-{
-    int pin_status;
-    pin_status = inb_p(SMBPINCTL(priv));
-    if (level == 0) {
-        pin_status &= (~SMBPINCTL_CLK_CTL);
-    }
-    else {
-        pin_status |= SMBPINCTL_CLK_CTL;
-    }
-    outb_p(pin_status, SMBPINCTL(priv));
-	return;
-}
-
-static void i801_i2c_unblock(struct i801_priv *priv)
-{
-    int i;
-    for (i = 0; i < 10; i++) {
-        i801_setscl(priv, 0);
-        udelay(5);
-        i801_setscl(priv, 1);
-        udelay(5);
-    }
-	return;
-}
-
-static int i801_check_i2c_unblock(struct i801_priv *priv)
-{
-	int pin_status;
-
-	pin_status = inb_p(SMBPINCTL(priv));
-    if ( (!(pin_status & SMBPINCTL_SDA_STS) ) && (pin_status & SMBPINCTL_CLK_STS) ) {
-        dev_dbg(&priv->pci_dev->dev, "SDA is low, send 9 clock to device!\n");
-        i801_i2c_unblock(priv);
-    }
-    return 0;
-}
-
-static void i801_do_reset(struct i801_priv *priv)
-{
-    unsigned char tmp;
-    unsigned int retry_count = 0;
-
-    pci_read_config_byte(priv->pci_dev, SMBHSTCFG, &tmp);
-    tmp |= SMBHSTCFG_SSRESET;
-    pci_write_config_byte(priv->pci_dev, SMBHSTCFG, tmp);
-    pci_read_config_byte(priv->pci_dev, SMBHSTCFG, &tmp);
-
-    while( ((tmp & SMBHSTCFG_SSRESET) != 0) && (retry_count < SSRESET_RETRY_TIME)) {
-        usleep_range(SSRESET_SLEEP_TIME, SSRESET_SLEEP_TIME + 1);
-        retry_count++;
-        pci_read_config_byte(priv->pci_dev, SMBHSTCFG, &tmp);
-    }
-
-    return ;
-}
-
-static int i801_check_i2c_scl(struct i801_priv *priv)
-{
-	int pin_status;
-
-	pin_status = inb_p(SMBPINCTL(priv));
-    if ( (pin_status & SMBPINCTL_SDA_STS) && (pin_status & SMBPINCTL_CLK_STS) ) {
-        return 0;
-    }
-
-    dev_dbg(&priv->pci_dev->dev, "SDA or SCL is low, begin to reset SMBus adapter, pin_status: 0x%x\n",pin_status);
-    i801_do_reset(priv);
-    pin_status = inb_p(SMBPINCTL(priv));
-    if ( (pin_status & SMBPINCTL_SDA_STS) && (pin_status & SMBPINCTL_CLK_STS) ) {
-        return 0;
-    }
-    dev_warn(&priv->pci_dev->dev, "SDA or SCL is low.pin_status:0x%x\n",pin_status);
-    return -1;
-}
-
-/* Make sure the SMBus host is ready to start transmitting.
-   Return 0 if it is, -EBUSY if it is not. */
-static int i801_check_pre(struct i801_priv *priv)
-{
-	int status;
-
-	i801_check_i2c_unblock(priv);
-
-	if (i801_check_i2c_scl(priv)) {
-		return -EIO;
-	}
-
-	status = inb_p(SMBHSTSTS(priv));
-	if (status & SMBHSTSTS_HOST_BUSY) {
-		dev_dbg(&priv->pci_dev->dev, "SMBus is busy, begin to reset SMBus adapter!\n");
-
-		i801_do_reset(priv);
-
-		status = inb_p(SMBHSTSTS(priv));
-		if (status & SMBHSTSTS_HOST_BUSY) {
-			dev_err(&priv->pci_dev->dev, "SMBus is busy, can't use it!\n");
-			return -EBUSY;
-		}
-	}
-
-	status &= STATUS_FLAGS;
-	if (status) {
-		dev_dbg(&priv->pci_dev->dev, "Clearing status flags (%02x)\n",
-			status);
-		outb_p(status, SMBHSTSTS(priv));
-		status = inb_p(SMBHSTSTS(priv)) & STATUS_FLAGS;
-		if (status) {
-			dev_err(&priv->pci_dev->dev,
-				"Failed clearing status flags (%02x)\n",
-				status);
-			return -EBUSY;
-		}
-	}
-
-	/*
-	 * Clear CRC status if needed.
-	 * During normal operation, i801_check_post() takes care
-	 * of it after every operation.  We do it here only in case
-	 * the hardware was already in this state when the driver
-	 * started.
-	 */
-	if (priv->features & FEATURE_SMBUS_PEC) {
-		status = inb_p(SMBAUXSTS(priv)) & SMBAUXSTS_CRCE;
-		if (status) {
-			dev_dbg(&priv->pci_dev->dev,
-				"Clearing aux status flags (%02x)\n", status);
-			outb_p(status, SMBAUXSTS(priv));
-			status = inb_p(SMBAUXSTS(priv)) & SMBAUXSTS_CRCE;
-			if (status) {
-				dev_err(&priv->pci_dev->dev,
-					"Failed clearing aux status flags (%02x)\n",
-					status);
-				return -EBUSY;
-			}
-		}
-	}
-
-	return 0;
-}
-
-/*
- * Convert the status register to an error code, and clear it.
- * Note that status only contains the bits we want to clear, not the
- * actual register value.
- */
-static int i801_check_post(struct i801_priv *priv, int status)
-{
-	int result = 0;
-
-	/*
-	 * If the SMBus is still busy, we give up
-	 * Note: This timeout condition only happens when using polling
-	 * transactions.  For interrupt operation, NAK/timeout is indicated by
-	 * DEV_ERR.
-	 */
-	if (unlikely(status < 0)) {
-		dev_err(&priv->pci_dev->dev, "Transaction timeout\n");
-		/* try to stop the current command */
-		dev_dbg(&priv->pci_dev->dev, "Terminating the current operation\n");
-		outb_p(SMBHSTCNT_KILL, SMBHSTCNT(priv));
-		usleep_range(1000, 2000);
-		outb_p(0, SMBHSTCNT(priv));
-
-		/* Check if it worked */
-		status = inb_p(SMBHSTSTS(priv));
-		if ((status & SMBHSTSTS_HOST_BUSY) ||
-		    !(status & SMBHSTSTS_FAILED))
-			dev_err(&priv->pci_dev->dev,
-				"Failed terminating the transaction\n");
-		outb_p(STATUS_FLAGS, SMBHSTSTS(priv));
-		return -ETIMEDOUT;
-	}
-
-	if (status & SMBHSTSTS_FAILED) {
-		result = -EIO;
-		dev_err(&priv->pci_dev->dev, "Transaction failed\n");
-	}
-	if (status & SMBHSTSTS_DEV_ERR) {
-		/*
-		 * This may be a PEC error, check and clear it.
-		 *
-		 * AUXSTS is handled differently from HSTSTS.
-		 * For HSTSTS, i801_isr() or i801_wait_intr()
-		 * has already cleared the error bits in hardware,
-		 * and we are passed a copy of the original value
-		 * in "status".
-		 * For AUXSTS, the hardware register is left
-		 * for us to handle here.
-		 * This is asymmetric, slightly iffy, but safe,
-		 * since all this code is serialized and the CRCE
-		 * bit is harmless as long as it's cleared before
-		 * the next operation.
-		 */
-		if ((priv->features & FEATURE_SMBUS_PEC) &&
-		    (inb_p(SMBAUXSTS(priv)) & SMBAUXSTS_CRCE)) {
-			outb_p(SMBAUXSTS_CRCE, SMBAUXSTS(priv));
-			result = -EBADMSG;
-			dev_dbg(&priv->pci_dev->dev, "PEC error\n");
-		} else {
-			result = -ENXIO;
-			dev_dbg(&priv->pci_dev->dev, "No response\n");
-		}
-	}
-	if (status & SMBHSTSTS_BUS_ERR) {
-		result = -EAGAIN;
-		dev_dbg(&priv->pci_dev->dev, "Lost arbitration\n");
-	}
-
-	/* Clear status flags except BYTE_DONE, to be cleared by caller */
-	outb_p(status, SMBHSTSTS(priv));
-
-	return result;
-}
-
-/* Wait for BUSY being cleared and either INTR or an error flag being set */
-static int i801_wait_intr(struct i801_priv *priv)
-{
-	int timeout = 0;
-	int status;
-
-	/* We will always wait for a fraction of a second! */
-	do {
-		usleep_range(250, 500);
-		status = inb_p(SMBHSTSTS(priv));
-	} while (((status & SMBHSTSTS_HOST_BUSY) ||
-		  !(status & (STATUS_ERROR_FLAGS | SMBHSTSTS_INTR))) &&
-		 (timeout++ < MAX_RETRIES));
-
-	if (timeout > MAX_RETRIES) {
-		dev_dbg(&priv->pci_dev->dev, "INTR Timeout!\n");
-		return -ETIMEDOUT;
-	}
-	return status & (STATUS_ERROR_FLAGS | SMBHSTSTS_INTR);
-}
-
-/* Wait for either BYTE_DONE or an error flag being set */
-static int i801_wait_byte_done(struct i801_priv *priv)
-{
-	int timeout = 0;
-	int status;
-
-	/* We will always wait for a fraction of a second! */
-	do {
-		usleep_range(250, 500);
-		status = inb_p(SMBHSTSTS(priv));
-	} while (!(status & (STATUS_ERROR_FLAGS | SMBHSTSTS_BYTE_DONE)) &&
-		 (timeout++ < MAX_RETRIES));
-
-	if (timeout > MAX_RETRIES) {
-		dev_dbg(&priv->pci_dev->dev, "BYTE_DONE Timeout!\n");
-		return -ETIMEDOUT;
-	}
-	return status & STATUS_ERROR_FLAGS;
-}
-
-static int i801_transaction(struct i801_priv *priv, int xact)
-{
-	int status;
-	int result;
-	const struct i2c_adapter *adap = &priv->adapter;
-
-	result = i801_check_pre(priv);
-	if (result < 0)
-		return result;
-
-	if (priv->features & FEATURE_IRQ) {
-		outb_p(xact | SMBHSTCNT_INTREN | SMBHSTCNT_START,
-		       SMBHSTCNT(priv));
-		result = wait_event_timeout(priv->waitq,
-					    (status = priv->status),
-					    adap->timeout);
-		if (!result) {
-			status = -ETIMEDOUT;
-			dev_warn(&priv->pci_dev->dev,
-				 "Timeout waiting for interrupt!\n");
-		}
-		priv->status = 0;
-		return i801_check_post(priv, status);
-	}
-
-	/* the current contents of SMBHSTCNT can be overwritten, since PEC,
-	 * SMBSCMD are passed in xact */
-	outb_p(xact | SMBHSTCNT_START, SMBHSTCNT(priv));
-
-	status = i801_wait_intr(priv);
-	return i801_check_post(priv, status);
-}
-
-static int i801_block_transaction_by_block(struct i801_priv *priv,
-					   union i2c_smbus_data *data,
-					   char read_write, int command,
-					   int hwpec)
-{
-	int i, len;
-	int status;
-	int xact = hwpec ? SMBHSTCNT_PEC_EN : 0;
-
-	switch (command) {
-	case I2C_SMBUS_BLOCK_PROC_CALL:
-		xact |= I801_BLOCK_PROC_CALL;
-		break;
-	case I2C_SMBUS_BLOCK_DATA:
-		xact |= I801_BLOCK_DATA;
-		break;
-	default:
-		return -EOPNOTSUPP;
-	}
-
-	inb_p(SMBHSTCNT(priv)); /* reset the data buffer index */
-
-	/* Use 32-byte buffer to process this transaction */
-	if (read_write == I2C_SMBUS_WRITE) {
-		len = data->block[0];
-		outb_p(len, SMBHSTDAT0(priv));
-		for (i = 0; i < len; i++)
-			outb_p(data->block[i+1], SMBBLKDAT(priv));
-	}
-
-	status = i801_transaction(priv, xact);
-	if (status)
-		return status;
-
-	if (read_write == I2C_SMBUS_READ ||
-	    command == I2C_SMBUS_BLOCK_PROC_CALL) {
-		len = inb_p(SMBHSTDAT0(priv));
-		if (len < 1 || len > I2C_SMBUS_BLOCK_MAX)
-			return -EPROTO;
-
-		data->block[0] = len;
-		for (i = 0; i < len; i++)
-			data->block[i + 1] = inb_p(SMBBLKDAT(priv));
-	}
-	return 0;
-}
-
-static void i801_isr_byte_done(struct i801_priv *priv)
-{
-	if (priv->is_read) {
-		/* For SMBus block reads, length is received with first byte */
-		if (((priv->cmd & 0x1c) == I801_BLOCK_DATA) &&
-		    (priv->count == 0)) {
-			priv->len = inb_p(SMBHSTDAT0(priv));
-			if (priv->len < 1 || priv->len > I2C_SMBUS_BLOCK_MAX) {
-				dev_err(&priv->pci_dev->dev,
-					"Illegal SMBus block read size %d\n",
-					priv->len);
-				/* FIXME: Recover */
-				priv->len = I2C_SMBUS_BLOCK_MAX;
-			} else {
-				dev_dbg(&priv->pci_dev->dev,
-					"SMBus block read size is %d\n",
-					priv->len);
-			}
-			priv->data[-1] = priv->len;
-		}
-
-		/* Read next byte */
-		if (priv->count < priv->len)
-			priv->data[priv->count++] = inb(SMBBLKDAT(priv));
-		else
-			dev_dbg(&priv->pci_dev->dev,
-				"Discarding extra byte on block read\n");
-
-		/* Set LAST_BYTE for last byte of read transaction */
-		if (priv->count == priv->len - 1)
-			outb_p(priv->cmd | SMBHSTCNT_LAST_BYTE,
-			       SMBHSTCNT(priv));
-	} else if (priv->count < priv->len - 1) {
-		/* Write next byte, except for IRQ after last byte */
-		outb_p(priv->data[++priv->count], SMBBLKDAT(priv));
-	}
-
-	/* Clear BYTE_DONE to continue with next byte */
-	outb_p(SMBHSTSTS_BYTE_DONE, SMBHSTSTS(priv));
-}
-
-static irqreturn_t i801_host_notify_isr(struct i801_priv *priv)
-{
-	unsigned short addr;
-
-	addr = inb_p(SMBNTFDADD(priv)) >> 1;
-
-	/*
-	 * With the tested platforms, reading SMBNTFDDAT (22 + (p)->smba)
-	 * always returns 0. Our current implementation doesn't provide
-	 * data, so we just ignore it.
-	 */
-	i2c_handle_smbus_host_notify(&priv->adapter, addr);
-
-	/* clear Host Notify bit and return */
-	outb_p(SMBSLVSTS_HST_NTFY_STS, SMBSLVSTS(priv));
-	return IRQ_HANDLED;
-}
-
-/*
- * There are three kinds of interrupts:
- *
- * 1) i801 signals transaction completion with one of these interrupts:
- *      INTR - Success
- *      DEV_ERR - Invalid command, NAK or communication timeout
- *      BUS_ERR - SMI# transaction collision
- *      FAILED - transaction was canceled due to a KILL request
- *    When any of these occur, update ->status and wake up the waitq.
- *    ->status must be cleared before kicking off the next transaction.
- *
- * 2) For byte-by-byte (I2C read/write) transactions, one BYTE_DONE interrupt
- *    occurs for each byte of a byte-by-byte to prepare the next byte.
- *
- * 3) Host Notify interrupts
- */
-static irqreturn_t i801_isr(int irq, void *dev_id)
-{
-	struct i801_priv *priv = dev_id;
-	u16 pcists;
-	u8 status;
-
-	/* Confirm this is our interrupt */
-	pci_read_config_word(priv->pci_dev, SMBPCISTS, &pcists);
-	if (!(pcists & SMBPCISTS_INTS))
-		return IRQ_NONE;
-
-	if (priv->features & FEATURE_HOST_NOTIFY) {
-		status = inb_p(SMBSLVSTS(priv));
-		if (status & SMBSLVSTS_HST_NTFY_STS)
-			return i801_host_notify_isr(priv);
-	}
-
-	status = inb_p(SMBHSTSTS(priv));
-	if (status & SMBHSTSTS_BYTE_DONE)
-		i801_isr_byte_done(priv);
-
-	/*
-	 * Clear irq sources and report transaction result.
-	 * ->status must be cleared before the next transaction is started.
-	 */
-	status &= SMBHSTSTS_INTR | STATUS_ERROR_FLAGS;
-	if (status) {
-		outb_p(status, SMBHSTSTS(priv));
-		priv->status = status;
-		wake_up(&priv->waitq);
-	}
-
-	return IRQ_HANDLED;
-}
-
-/*
- * For "byte-by-byte" block transactions:
- *   I2C write uses cmd=I801_BLOCK_DATA, I2C_EN=1
- *   I2C read uses cmd=I801_I2C_BLOCK_DATA
- */
-static int i801_block_transaction_byte_by_byte(struct i801_priv *priv,
-					       union i2c_smbus_data *data,
-					       char read_write, int command,
-					       int hwpec)
-{
-	int i, len;
-	int smbcmd;
-	int status;
-	int result;
-	const struct i2c_adapter *adap = &priv->adapter;
-
-	if (command == I2C_SMBUS_BLOCK_PROC_CALL)
-		return -EOPNOTSUPP;
-
-	result = i801_check_pre(priv);
-	if (result < 0)
-		return result;
-
-	len = data->block[0];
-
-	if (read_write == I2C_SMBUS_WRITE) {
-		outb_p(len, SMBHSTDAT0(priv));
-		outb_p(data->block[1], SMBBLKDAT(priv));
-	}
-
-	if (command == I2C_SMBUS_I2C_BLOCK_DATA &&
-	    read_write == I2C_SMBUS_READ)
-		smbcmd = I801_I2C_BLOCK_DATA;
-	else
-		smbcmd = I801_BLOCK_DATA;
-
-	if (priv->features & FEATURE_IRQ) {
-		priv->is_read = (read_write == I2C_SMBUS_READ);
-		if (len == 1 && priv->is_read)
-			smbcmd |= SMBHSTCNT_LAST_BYTE;
-		priv->cmd = smbcmd | SMBHSTCNT_INTREN;
-		priv->len = len;
-		priv->count = 0;
-		priv->data = &data->block[1];
-
-		outb_p(priv->cmd | SMBHSTCNT_START, SMBHSTCNT(priv));
-		result = wait_event_timeout(priv->waitq,
-					    (status = priv->status),
-					    adap->timeout);
-		if (!result) {
-			status = -ETIMEDOUT;
-			dev_warn(&priv->pci_dev->dev,
-				 "Timeout waiting for interrupt!\n");
-		}
-		priv->status = 0;
-		return i801_check_post(priv, status);
-	}
-
-	for (i = 1; i <= len; i++) {
-		if (i == len && read_write == I2C_SMBUS_READ)
-			smbcmd |= SMBHSTCNT_LAST_BYTE;
-		outb_p(smbcmd, SMBHSTCNT(priv));
-
-		if (i == 1)
-			outb_p(inb(SMBHSTCNT(priv)) | SMBHSTCNT_START,
-			       SMBHSTCNT(priv));
-
-		status = i801_wait_byte_done(priv);
-		if (status)
-			goto exit;
-
-		if (i == 1 && read_write == I2C_SMBUS_READ
-		 && command != I2C_SMBUS_I2C_BLOCK_DATA) {
-			len = inb_p(SMBHSTDAT0(priv));
-			if (len < 1 || len > I2C_SMBUS_BLOCK_MAX) {
-				dev_err(&priv->pci_dev->dev,
-					"Illegal SMBus block read size %d\n",
-					len);
-				/* Recover */
-				while (inb_p(SMBHSTSTS(priv)) &
-				       SMBHSTSTS_HOST_BUSY)
-					outb_p(SMBHSTSTS_BYTE_DONE,
-					       SMBHSTSTS(priv));
-				outb_p(SMBHSTSTS_INTR, SMBHSTSTS(priv));
-				return -EPROTO;
-			}
-			data->block[0] = len;
-		}
-
-		/* Retrieve/store value in SMBBLKDAT */
-		if (read_write == I2C_SMBUS_READ)
-			data->block[i] = inb_p(SMBBLKDAT(priv));
-		if (read_write == I2C_SMBUS_WRITE && i+1 <= len)
-			outb_p(data->block[i+1], SMBBLKDAT(priv));
-
-		/* signals SMBBLKDAT ready */
-		outb_p(SMBHSTSTS_BYTE_DONE, SMBHSTSTS(priv));
-	}
-
-	status = i801_wait_intr(priv);
-exit:
-	return i801_check_post(priv, status);
-}
-
-static int i801_set_block_buffer_mode(struct i801_priv *priv)
-{
-	outb_p(inb_p(SMBAUXCTL(priv)) | SMBAUXCTL_E32B, SMBAUXCTL(priv));
-	if ((inb_p(SMBAUXCTL(priv)) & SMBAUXCTL_E32B) == 0)
-		return -EIO;
-	return 0;
-}
-
-/* Block transaction function */
-static int i801_block_transaction(struct i801_priv *priv,
-				  union i2c_smbus_data *data, char read_write,
-				  int command, int hwpec)
-{
-	int result = 0;
-	unsigned char hostc;
-
-	if (command == I2C_SMBUS_I2C_BLOCK_DATA) {
-		if (read_write == I2C_SMBUS_WRITE) {
-			/* set I2C_EN bit in configuration register */
-			pci_read_config_byte(priv->pci_dev, SMBHSTCFG, &hostc);
-			pci_write_config_byte(priv->pci_dev, SMBHSTCFG,
-					      hostc | SMBHSTCFG_I2C_EN);
-		} else if (!(priv->features & FEATURE_I2C_BLOCK_READ)) {
-			dev_err(&priv->pci_dev->dev,
-				"I2C block read is unsupported!\n");
-			return -EOPNOTSUPP;
-		}
-	}
-
-	if (read_write == I2C_SMBUS_WRITE
-	 || command == I2C_SMBUS_I2C_BLOCK_DATA) {
-		if (data->block[0] < 1)
-			data->block[0] = 1;
-		if (data->block[0] > I2C_SMBUS_BLOCK_MAX)
-			data->block[0] = I2C_SMBUS_BLOCK_MAX;
-	} else {
-		data->block[0] = 32;	/* max for SMBus block reads */
-	}
-
-	/* Experience has shown that the block buffer can only be used for
-	   SMBus (not I2C) block transactions, even though the datasheet
-	   doesn't mention this limitation. */
-	if ((priv->features & FEATURE_BLOCK_BUFFER)
-	 && command != I2C_SMBUS_I2C_BLOCK_DATA
-	 && i801_set_block_buffer_mode(priv) == 0)
-		result = i801_block_transaction_by_block(priv, data,
-							 read_write,
-							 command, hwpec);
-	else
-		result = i801_block_transaction_byte_by_byte(priv, data,
-							     read_write,
-							     command, hwpec);
-
-	if (command == I2C_SMBUS_I2C_BLOCK_DATA
-	 && read_write == I2C_SMBUS_WRITE) {
-		/* restore saved configuration register value */
-		pci_write_config_byte(priv->pci_dev, SMBHSTCFG, hostc);
-	}
-	return result;
-}
-
-/* Return negative errno on error. */
-static s32 i801_access(struct i2c_adapter *adap, u16 addr,
-		       unsigned short flags, char read_write, u8 command,
-		       int size, union i2c_smbus_data *data)
-{
-	int hwpec;
-	int block = 0;
-	int ret = 0, xact = 0;
-	struct i801_priv *priv = i2c_get_adapdata(adap);
-
-	mutex_lock(&priv->acpi_lock);
-	if (priv->acpi_reserved) {
-		mutex_unlock(&priv->acpi_lock);
-		return -EBUSY;
-	}
-
-	pm_runtime_get_sync(&priv->pci_dev->dev);
-
-	hwpec = (priv->features & FEATURE_SMBUS_PEC) && (flags & I2C_CLIENT_PEC)
-		&& size != I2C_SMBUS_QUICK
-		&& size != I2C_SMBUS_I2C_BLOCK_DATA;
-
-	switch (size) {
-	case I2C_SMBUS_QUICK:
-		outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
-		       SMBHSTADD(priv));
-		xact = I801_QUICK;
-		break;
-	case I2C_SMBUS_BYTE:
-		outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
-		       SMBHSTADD(priv));
-		if (read_write == I2C_SMBUS_WRITE)
-			outb_p(command, SMBHSTCMD(priv));
-		xact = I801_BYTE;
-		break;
-	case I2C_SMBUS_BYTE_DATA:
-		outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
-		       SMBHSTADD(priv));
-		outb_p(command, SMBHSTCMD(priv));
-		if (read_write == I2C_SMBUS_WRITE)
-			outb_p(data->byte, SMBHSTDAT0(priv));
-		xact = I801_BYTE_DATA;
-		break;
-	case I2C_SMBUS_WORD_DATA:
-		outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
-		       SMBHSTADD(priv));
-		outb_p(command, SMBHSTCMD(priv));
-		if (read_write == I2C_SMBUS_WRITE) {
-			outb_p(data->word & 0xff, SMBHSTDAT0(priv));
-			outb_p((data->word & 0xff00) >> 8, SMBHSTDAT1(priv));
-		}
-		xact = I801_WORD_DATA;
-		break;
-	case I2C_SMBUS_BLOCK_DATA:
-		outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
-		       SMBHSTADD(priv));
-		outb_p(command, SMBHSTCMD(priv));
-		block = 1;
-		break;
-	case I2C_SMBUS_I2C_BLOCK_DATA:
-		/*
-		 * NB: page 240 of ICH5 datasheet shows that the R/#W
-		 * bit should be cleared here, even when reading.
-		 * However if SPD Write Disable is set (Lynx Point and later),
-		 * the read will fail if we don't set the R/#W bit.
-		 */
-		outb_p(((addr & 0x7f) << 1) |
-		       ((priv->original_hstcfg & SMBHSTCFG_SPD_WD) ?
-			(read_write & 0x01) : 0),
-		       SMBHSTADD(priv));
-		if (read_write == I2C_SMBUS_READ) {
-			/* NB: page 240 of ICH5 datasheet also shows
-			 * that DATA1 is the cmd field when reading */
-			outb_p(command, SMBHSTDAT1(priv));
-		} else
-			outb_p(command, SMBHSTCMD(priv));
-		block = 1;
-		break;
-	case I2C_SMBUS_BLOCK_PROC_CALL:
-		/*
-		 * Bit 0 of the slave address register always indicate a write
-		 * command.
-		 */
-		outb_p((addr & 0x7f) << 1, SMBHSTADD(priv));
-		outb_p(command, SMBHSTCMD(priv));
-		block = 1;
-		break;
-	default:
-		dev_err(&priv->pci_dev->dev, "Unsupported transaction %d\n",
-			size);
-		ret = -EOPNOTSUPP;
-		goto out;
-	}
-
-	if (hwpec)	/* enable/disable hardware PEC */
-		outb_p(inb_p(SMBAUXCTL(priv)) | SMBAUXCTL_CRC, SMBAUXCTL(priv));
-	else
-		outb_p(inb_p(SMBAUXCTL(priv)) & (~SMBAUXCTL_CRC),
-		       SMBAUXCTL(priv));
-
-	if (block)
-		ret = i801_block_transaction(priv, data, read_write, size,
-					     hwpec);
-	else
-		ret = i801_transaction(priv, xact);
-
-	/* Some BIOSes don't like it when PEC is enabled at reboot or resume
-	   time, so we forcibly disable it after every transaction. Turn off
-	   E32B for the same reason. */
-	if (hwpec || block)
-		outb_p(inb_p(SMBAUXCTL(priv)) &
-		       ~(SMBAUXCTL_CRC | SMBAUXCTL_E32B), SMBAUXCTL(priv));
-
-	if (block)
-		goto out;
-	if (ret)
-		goto out;
-	if ((read_write == I2C_SMBUS_WRITE) || (xact == I801_QUICK))
-		goto out;
-
-	switch (xact & 0x7f) {
-	case I801_BYTE:	/* Result put in SMBHSTDAT0 */
-	case I801_BYTE_DATA:
-		data->byte = inb_p(SMBHSTDAT0(priv));
-		break;
-	case I801_WORD_DATA:
-		data->word = inb_p(SMBHSTDAT0(priv)) +
-			     (inb_p(SMBHSTDAT1(priv)) << 8);
-		break;
-	}
-
-out:
-	pm_runtime_mark_last_busy(&priv->pci_dev->dev);
-	pm_runtime_put_autosuspend(&priv->pci_dev->dev);
-	mutex_unlock(&priv->acpi_lock);
-	return ret;
-}
-
-static u32 i801_func(struct i2c_adapter *adapter)
-{
-	struct i801_priv *priv = i2c_get_adapdata(adapter);
-
-	return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
-	       I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
-	       I2C_FUNC_SMBUS_BLOCK_DATA | I2C_FUNC_SMBUS_WRITE_I2C_BLOCK |
-	       ((priv->features & FEATURE_SMBUS_PEC) ? I2C_FUNC_SMBUS_PEC : 0) |
-	       ((priv->features & FEATURE_BLOCK_PROC) ?
-		I2C_FUNC_SMBUS_BLOCK_PROC_CALL : 0) |
-	       ((priv->features & FEATURE_I2C_BLOCK_READ) ?
-		I2C_FUNC_SMBUS_READ_I2C_BLOCK : 0) |
-	       ((priv->features & FEATURE_HOST_NOTIFY) ?
-		I2C_FUNC_SMBUS_HOST_NOTIFY : 0);
-}
-
-static void i801_enable_host_notify(struct i2c_adapter *adapter)
-{
-	struct i801_priv *priv = i2c_get_adapdata(adapter);
-
-	if (!(priv->features & FEATURE_HOST_NOTIFY))
-		return;
-
-	if (!(SMBSLVCMD_HST_NTFY_INTREN & priv->original_slvcmd))
-		outb_p(SMBSLVCMD_HST_NTFY_INTREN | priv->original_slvcmd,
-		       SMBSLVCMD(priv));
-
-	/* clear Host Notify bit to allow a new notification */
-	outb_p(SMBSLVSTS_HST_NTFY_STS, SMBSLVSTS(priv));
-}
-
-static void i801_disable_host_notify(struct i801_priv *priv)
-{
-	if (!(priv->features & FEATURE_HOST_NOTIFY))
-		return;
-
-	outb_p(priv->original_slvcmd, SMBSLVCMD(priv));
-}
-
-static const struct i2c_algorithm smbus_algorithm = {
-	.smbus_xfer	= i801_access,
-	.functionality	= i801_func,
-};
-
-static const struct pci_device_id i801_ids[] = {
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801AA_3) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801AB_3) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801BA_2) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801CA_3) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801DB_3) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801EB_3) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB_4) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH6_16) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH7_17) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB2_17) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH8_5) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH9_6) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_EP80579_1) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH10_4) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH10_5) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_5_3400_SERIES_SMBUS) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_COUGARPOINT_SMBUS) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF0) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF1) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF2) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_DH89XXCC_SMBUS) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PANTHERPOINT_SMBUS) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_LYNXPOINT_SMBUS) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_SMBUS) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_AVOTON_SMBUS) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS0) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS1) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS2) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_COLETOCREEK_SMBUS) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_GEMINILAKE_SMBUS) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_WILDCATPOINT_SMBUS) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_WILDCATPOINT_LP_SMBUS) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BAYTRAIL_SMBUS) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BRASWELL_SMBUS) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_SUNRISEPOINT_H_SMBUS) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_SMBUS) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CDF_SMBUS) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_DNV_SMBUS) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_EBG_SMBUS) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BROXTON_SMBUS) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_LEWISBURG_SMBUS) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_LEWISBURG_SSKU_SMBUS) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_KABYLAKE_PCH_H_SMBUS) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CANNONLAKE_H_SMBUS) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CANNONLAKE_LP_SMBUS) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICELAKE_LP_SMBUS) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_COMETLAKE_SMBUS) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_COMETLAKE_H_SMBUS) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_COMETLAKE_V_SMBUS) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ELKHART_LAKE_SMBUS) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_TIGERLAKE_LP_SMBUS) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_TIGERLAKE_H_SMBUS) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_JASPER_LAKE_SMBUS) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ALDER_LAKE_S_SMBUS) },
-	{ 0, }
-};
-
-MODULE_DEVICE_TABLE(pci, i801_ids);
-
-#if defined CONFIG_X86 && defined CONFIG_DMI
-static unsigned char apanel_addr;
-
-/* Scan the system ROM for the signature "FJKEYINF" */
-static __init const void __iomem *bios_signature(const void __iomem *bios)
-{
-	ssize_t offset;
-	const unsigned char signature[] = "FJKEYINF";
-
-	for (offset = 0; offset < 0x10000; offset += 0x10) {
-		if (check_signature(bios + offset, signature,
-				    sizeof(signature)-1))
-			return bios + offset;
-	}
-	return NULL;
-}
-
-static void __init input_apanel_init(void)
-{
-	void __iomem *bios;
-	const void __iomem *p;
-
-	bios = ioremap(0xF0000, 0x10000); /* Can't fail */
-	p = bios_signature(bios);
-	if (p) {
-		/* just use the first address */
-		apanel_addr = readb(p + 8 + 3) >> 1;
-	}
-	iounmap(bios);
-}
-
-struct dmi_onboard_device_info {
-	const char *name;
-	u8 type;
-	unsigned short i2c_addr;
-	const char *i2c_type;
-};
-
-static const struct dmi_onboard_device_info dmi_devices[] = {
-	{ "Syleus", DMI_DEV_TYPE_OTHER, 0x73, "fscsyl" },
-	{ "Hermes", DMI_DEV_TYPE_OTHER, 0x73, "fscher" },
-	{ "Hades",  DMI_DEV_TYPE_OTHER, 0x73, "fschds" },
-};
-
-static void dmi_check_onboard_device(u8 type, const char *name,
-				     struct i2c_adapter *adap)
-{
-	int i;
-	struct i2c_board_info info;
-
-	for (i = 0; i < ARRAY_SIZE(dmi_devices); i++) {
-		/* & ~0x80, ignore enabled/disabled bit */
-		if ((type & ~0x80) != dmi_devices[i].type)
-			continue;
-		if (strcasecmp(name, dmi_devices[i].name))
-			continue;
-
-		mem_clear(&info, sizeof(struct i2c_board_info));
-		info.addr = dmi_devices[i].i2c_addr;
-		strlcpy(info.type, dmi_devices[i].i2c_type, I2C_NAME_SIZE);
-		i2c_new_client_device(adap, &info);
-		break;
-	}
-}
-
-/* We use our own function to check for onboard devices instead of
-   dmi_find_device() as some buggy BIOS's have the devices we are interested
-   in marked as disabled */
-static void dmi_check_onboard_devices(const struct dmi_header *dm, void *adap)
-{
-	int i, count;
-
-	if (dm->type != 10)
-		return;
-
-	count = (dm->length - sizeof(struct dmi_header)) / 2;
-	for (i = 0; i < count; i++) {
-		const u8 *d = (char *)(dm + 1) + (i * 2);
-		const char *name = ((char *) dm) + dm->length;
-		u8 type = d[0];
-		u8 s = d[1];
-
-		if (!s)
-			continue;
-		s--;
-		while (s > 0 && name[0]) {
-			name += strlen(name) + 1;
-			s--;
-		}
-		if (name[0] == 0) /* Bogus string reference */
-			continue;
-
-		dmi_check_onboard_device(type, name, adap);
-	}
-}
-
-/* NOTE: Keep this list in sync with drivers/platform/x86/dell-smo8800.c */
-static const char *const acpi_smo8800_ids[] = {
-	"SMO8800",
-	"SMO8801",
-	"SMO8810",
-	"SMO8811",
-	"SMO8820",
-	"SMO8821",
-	"SMO8830",
-	"SMO8831",
-};
-
-static acpi_status check_acpi_smo88xx_device(acpi_handle obj_handle,
-					     u32 nesting_level,
-					     void *context,
-					     void **return_value)
-{
-	struct acpi_device_info *info;
-	acpi_status status;
-	char *hid;
-	int i;
-
-	status = acpi_get_object_info(obj_handle, &info);
-	if (ACPI_FAILURE(status))
-		return AE_OK;
-
-	if (!(info->valid & ACPI_VALID_HID))
-		goto smo88xx_not_found;
-
-	hid = info->hardware_id.string;
-	if (!hid)
-		goto smo88xx_not_found;
-
-	i = match_string(acpi_smo8800_ids, ARRAY_SIZE(acpi_smo8800_ids), hid);
-	if (i < 0)
-		goto smo88xx_not_found;
-
-	kfree(info);
-
-	*((bool *)return_value) = true;
-	return AE_CTRL_TERMINATE;
-
-smo88xx_not_found:
-	kfree(info);
-	return AE_OK;
-}
-
-static bool is_dell_system_with_lis3lv02d(void)
-{
-	bool found;
-	const char *vendor;
-
-	vendor = dmi_get_system_info(DMI_SYS_VENDOR);
-	if (!vendor || strcmp(vendor, "Dell Inc."))
-		return false;
-
-	/*
-	 * Check that ACPI device SMO88xx is present and is functioning.
-	 * Function acpi_get_devices() already filters all ACPI devices
-	 * which are not present or are not functioning.
-	 * ACPI device SMO88xx represents our ST microelectronics lis3lv02d
-	 * accelerometer but unfortunately ACPI does not provide any other
-	 * information (like I2C address).
-	 */
-	found = false;
-	acpi_get_devices(NULL, check_acpi_smo88xx_device, NULL,
-			 (void **)&found);
-
-	return found;
-}
-
-/*
- * Accelerometer's I2C address is not specified in DMI nor ACPI,
- * so it is needed to define mapping table based on DMI product names.
- */
-static const struct {
-	const char *dmi_product_name;
-	unsigned short i2c_addr;
-} dell_lis3lv02d_devices[] = {
-	/*
-	 * Dell platform team told us that these Latitude devices have
-	 * ST microelectronics accelerometer at I2C address 0x29.
-	 */
-	{ "Latitude E5250",     0x29 },
-	{ "Latitude E5450",     0x29 },
-	{ "Latitude E5550",     0x29 },
-	{ "Latitude E6440",     0x29 },
-	{ "Latitude E6440 ATG", 0x29 },
-	{ "Latitude E6540",     0x29 },
-	/*
-	 * Additional individual entries were added after verification.
-	 */
-	{ "Latitude 5480",      0x29 },
-	{ "Vostro V131",        0x1d },
-};
-
-static void register_dell_lis3lv02d_i2c_device(struct i801_priv *priv)
-{
-	struct i2c_board_info info;
-	const char *dmi_product_name;
-	int i;
-
-	dmi_product_name = dmi_get_system_info(DMI_PRODUCT_NAME);
-	for (i = 0; i < ARRAY_SIZE(dell_lis3lv02d_devices); ++i) {
-		if (strcmp(dmi_product_name,
-			   dell_lis3lv02d_devices[i].dmi_product_name) == 0)
-			break;
-	}
-
-	if (i == ARRAY_SIZE(dell_lis3lv02d_devices)) {
-		dev_warn(&priv->pci_dev->dev,
-			 "Accelerometer lis3lv02d is present on SMBus but its"
-			 " address is unknown, skipping registration\n");
-		return;
-	}
-
-	mem_clear(&info, sizeof(struct i2c_board_info));
-	info.addr = dell_lis3lv02d_devices[i].i2c_addr;
-	strlcpy(info.type, "lis3lv02d", I2C_NAME_SIZE);
-	i2c_new_client_device(&priv->adapter, &info);
-}
-
-/* Register optional slaves */
-static void i801_probe_optional_slaves(struct i801_priv *priv)
-{
-	/* Only register slaves on main SMBus channel */
-	if (priv->features & FEATURE_IDF)
-		return;
-
-	if (apanel_addr) {
-		struct i2c_board_info info;
-
-		mem_clear(&info, sizeof(struct i2c_board_info));
-		info.addr = apanel_addr;
-		strlcpy(info.type, "fujitsu_apanel", I2C_NAME_SIZE);
-		i2c_new_client_device(&priv->adapter, &info);
-	}
-
-	if (dmi_name_in_vendors("FUJITSU"))
-		dmi_walk(dmi_check_onboard_devices, &priv->adapter);
-
-	if (is_dell_system_with_lis3lv02d())
-		register_dell_lis3lv02d_i2c_device(priv);
-
-	/* Instantiate SPD EEPROMs unless the SMBus is multiplexed */
-#if IS_ENABLED(CONFIG_I2C_MUX_GPIO)
-	if (!priv->mux_drvdata)
-#endif
-		i2c_register_spd(&priv->adapter);
-}
-#else
-static void __init input_apanel_init(void) {}
-static void i801_probe_optional_slaves(struct i801_priv *priv) {}
-#endif	/* CONFIG_X86 && CONFIG_DMI */
-
-#if IS_ENABLED(CONFIG_I2C_MUX_GPIO) && defined CONFIG_DMI
-static struct i801_mux_config i801_mux_config_asus_z8_d12 = {
-	.gpio_chip = "gpio_ich",
-	.values = { 0x02, 0x03 },
-	.n_values = 2,
-	.classes = { I2C_CLASS_SPD, I2C_CLASS_SPD },
-	.gpios = { 52, 53 },
-	.n_gpios = 2,
-};
-
-static struct i801_mux_config i801_mux_config_asus_z8_d18 = {
-	.gpio_chip = "gpio_ich",
-	.values = { 0x02, 0x03, 0x01 },
-	.n_values = 3,
-	.classes = { I2C_CLASS_SPD, I2C_CLASS_SPD, I2C_CLASS_SPD },
-	.gpios = { 52, 53 },
-	.n_gpios = 2,
-};
-
-static const struct dmi_system_id mux_dmi_table[] = {
-	{
-		.matches = {
-			DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
-			DMI_MATCH(DMI_BOARD_NAME, "Z8NA-D6(C)"),
-		},
-		.driver_data = &i801_mux_config_asus_z8_d12,
-	},
-	{
-		.matches = {
-			DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
-			DMI_MATCH(DMI_BOARD_NAME, "Z8P(N)E-D12(X)"),
-		},
-		.driver_data = &i801_mux_config_asus_z8_d12,
-	},
-	{
-		.matches = {
-			DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
-			DMI_MATCH(DMI_BOARD_NAME, "Z8NH-D12"),
-		},
-		.driver_data = &i801_mux_config_asus_z8_d12,
-	},
-	{
-		.matches = {
-			DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
-			DMI_MATCH(DMI_BOARD_NAME, "Z8PH-D12/IFB"),
-		},
-		.driver_data = &i801_mux_config_asus_z8_d12,
-	},
-	{
-		.matches = {
-			DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
-			DMI_MATCH(DMI_BOARD_NAME, "Z8NR-D12"),
-		},
-		.driver_data = &i801_mux_config_asus_z8_d12,
-	},
-	{
-		.matches = {
-			DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
-			DMI_MATCH(DMI_BOARD_NAME, "Z8P(N)H-D12"),
-		},
-		.driver_data = &i801_mux_config_asus_z8_d12,
-	},
-	{
-		.matches = {
-			DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
-			DMI_MATCH(DMI_BOARD_NAME, "Z8PG-D18"),
-		},
-		.driver_data = &i801_mux_config_asus_z8_d18,
-	},
-	{
-		.matches = {
-			DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
-			DMI_MATCH(DMI_BOARD_NAME, "Z8PE-D18"),
-		},
-		.driver_data = &i801_mux_config_asus_z8_d18,
-	},
-	{
-		.matches = {
-			DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
-			DMI_MATCH(DMI_BOARD_NAME, "Z8PS-D12"),
-		},
-		.driver_data = &i801_mux_config_asus_z8_d12,
-	},
-	{ }
-};
-
-/* Setup multiplexing if needed */
-static int i801_add_mux(struct i801_priv *priv)
-{
-	struct device *dev = &priv->adapter.dev;
-	const struct i801_mux_config *mux_config;
-	struct i2c_mux_gpio_platform_data gpio_data;
-	struct gpiod_lookup_table *lookup;
-	int err, i;
-
-	if (!priv->mux_drvdata)
-		return 0;
-	mux_config = priv->mux_drvdata;
-
-	/* Prepare the platform data */
-	mem_clear(&gpio_data, sizeof(struct i2c_mux_gpio_platform_data));
-	gpio_data.parent = priv->adapter.nr;
-	gpio_data.values = mux_config->values;
-	gpio_data.n_values = mux_config->n_values;
-	gpio_data.classes = mux_config->classes;
-	gpio_data.idle = I2C_MUX_GPIO_NO_IDLE;
-
-	/* Register GPIO descriptor lookup table */
-	lookup = devm_kzalloc(dev,
-			      struct_size(lookup, table, mux_config->n_gpios + 1),
-			      GFP_KERNEL);
-	if (!lookup)
-		return -ENOMEM;
-	lookup->dev_id = "i2c-mux-gpio";
-	for (i = 0; i < mux_config->n_gpios; i++) {
-		lookup->table[i] = (struct gpiod_lookup)
-			GPIO_LOOKUP(mux_config->gpio_chip,
-				    mux_config->gpios[i], "mux", 0);
-	}
-	gpiod_add_lookup_table(lookup);
-	priv->lookup = lookup;
-
-	/*
-	 * Register the mux device, we use PLATFORM_DEVID_NONE here
-	 * because since we are referring to the GPIO chip by name we are
-	 * anyways in deep trouble if there is more than one of these
-	 * devices, and there should likely only be one platform controller
-	 * hub.
-	 */
-	priv->mux_pdev = platform_device_register_data(dev, "i2c-mux-gpio",
-				PLATFORM_DEVID_NONE, &gpio_data,
-				sizeof(struct i2c_mux_gpio_platform_data));
-	if (IS_ERR(priv->mux_pdev)) {
-		err = PTR_ERR(priv->mux_pdev);
-		gpiod_remove_lookup_table(lookup);
-		priv->mux_pdev = NULL;
-		dev_err(dev, "Failed to register i2c-mux-gpio device\n");
-		return err;
-	}
-
-	return 0;
-}
-
-static void i801_del_mux(struct i801_priv *priv)
-{
-	if (priv->mux_pdev)
-		platform_device_unregister(priv->mux_pdev);
-	if (priv->lookup)
-		gpiod_remove_lookup_table(priv->lookup);
-}
-
-static unsigned int i801_get_adapter_class(struct i801_priv *priv)
-{
-	const struct dmi_system_id *id;
-	const struct i801_mux_config *mux_config;
-	unsigned int class = I2C_CLASS_HWMON | I2C_CLASS_SPD;
-	int i;
-
-	id = dmi_first_match(mux_dmi_table);
-	if (id) {
-		/* Remove branch classes from trunk */
-		mux_config = id->driver_data;
-		for (i = 0; i < mux_config->n_values; i++)
-			class &= ~mux_config->classes[i];
-
-		/* Remember for later */
-		priv->mux_drvdata = mux_config;
-	}
-
-	return class;
-}
-#else
-static inline int i801_add_mux(struct i801_priv *priv) { return 0; }
-static inline void i801_del_mux(struct i801_priv *priv) { }
-
-static inline unsigned int i801_get_adapter_class(struct i801_priv *priv)
-{
-	return I2C_CLASS_HWMON | I2C_CLASS_SPD;
-}
-#endif
-
-static const struct itco_wdt_platform_data spt_tco_platform_data = {
-	.name = "Intel PCH",
-	.version = 4,
-};
-
-static DEFINE_SPINLOCK(p2sb_spinlock);
-
-static struct platform_device *
-i801_add_tco_spt(struct i801_priv *priv, struct pci_dev *pci_dev,
-		 struct resource *tco_res)
-{
-	struct resource *res;
-	unsigned int devfn;
-	u64 base64_addr;
-	u32 base_addr;
-	u8 hidden;
-
-	/*
-	 * We must access the NO_REBOOT bit over the Primary to Sideband
-	 * bridge (P2SB). The BIOS prevents the P2SB device from being
-	 * enumerated by the PCI subsystem, so we need to unhide/hide it
-	 * to lookup the P2SB BAR.
-	 */
-	spin_lock(&p2sb_spinlock);
-
-	devfn = PCI_DEVFN(PCI_SLOT(pci_dev->devfn), 1);
-
-	/* Unhide the P2SB device, if it is hidden */
-	pci_bus_read_config_byte(pci_dev->bus, devfn, 0xe1, &hidden);
-	if (hidden)
-		pci_bus_write_config_byte(pci_dev->bus, devfn, 0xe1, 0x0);
-
-	pci_bus_read_config_dword(pci_dev->bus, devfn, SBREG_BAR, &base_addr);
-	base64_addr = base_addr & 0xfffffff0;
-
-	pci_bus_read_config_dword(pci_dev->bus, devfn, SBREG_BAR + 0x4, &base_addr);
-	base64_addr |= (u64)base_addr << 32;
-
-	/* Hide the P2SB device, if it was hidden before */
-	if (hidden)
-		pci_bus_write_config_byte(pci_dev->bus, devfn, 0xe1, hidden);
-	spin_unlock(&p2sb_spinlock);
-
-	res = &tco_res[1];
-	if (pci_dev->device == PCI_DEVICE_ID_INTEL_DNV_SMBUS)
-		res->start = (resource_size_t)base64_addr + SBREG_SMBCTRL_DNV;
-	else
-		res->start = (resource_size_t)base64_addr + SBREG_SMBCTRL;
-
-	res->end = res->start + 3;
-	res->flags = IORESOURCE_MEM;
-
-	return platform_device_register_resndata(&pci_dev->dev, "iTCO_wdt", -1,
-					tco_res, 2, &spt_tco_platform_data,
-					sizeof(spt_tco_platform_data));
-}
-
-static const struct itco_wdt_platform_data cnl_tco_platform_data = {
-	.name = "Intel PCH",
-	.version = 6,
-};
-
-static struct platform_device *
-i801_add_tco_cnl(struct i801_priv *priv, struct pci_dev *pci_dev,
-		 struct resource *tco_res)
-{
-	return platform_device_register_resndata(&pci_dev->dev,
-			"iTCO_wdt", -1, tco_res, 1, &cnl_tco_platform_data,
-			sizeof(cnl_tco_platform_data));
-}
-
-static void i801_add_tco(struct i801_priv *priv)
-{
-	struct pci_dev *pci_dev = priv->pci_dev;
-	struct resource tco_res[2], *res;
-	u32 tco_base, tco_ctl;
-
-	/* If we have ACPI based watchdog use that instead */
-	if (acpi_has_watchdog())
-		return;
-
-	if (!(priv->features & (FEATURE_TCO_SPT | FEATURE_TCO_CNL)))
-		return;
-
-	pci_read_config_dword(pci_dev, TCOBASE, &tco_base);
-	pci_read_config_dword(pci_dev, TCOCTL, &tco_ctl);
-	if (!(tco_ctl & TCOCTL_EN))
-		return;
-
-	mem_clear(tco_res, sizeof(tco_res));
-	/*
-	 * Always populate the main iTCO IO resource here. The second entry
-	 * for NO_REBOOT MMIO is filled by the SPT specific function.
-	 */
-	res = &tco_res[0];
-	res->start = tco_base & ~1;
-	res->end = res->start + 32 - 1;
-	res->flags = IORESOURCE_IO;
-
-	if (priv->features & FEATURE_TCO_CNL)
-		priv->tco_pdev = i801_add_tco_cnl(priv, pci_dev, tco_res);
-	else
-		priv->tco_pdev = i801_add_tco_spt(priv, pci_dev, tco_res);
-
-	if (IS_ERR(priv->tco_pdev))
-		dev_warn(&pci_dev->dev, "failed to create iTCO device\n");
-}
-
-#ifdef CONFIG_ACPI
-static bool i801_acpi_is_smbus_ioport(const struct i801_priv *priv,
-				      acpi_physical_address address)
-{
-	return address >= priv->smba &&
-	       address <= pci_resource_end(priv->pci_dev, SMBBAR);
-}
-
-static acpi_status
-i801_acpi_io_handler(u32 function, acpi_physical_address address, u32 bits,
-		     u64 *value, void *handler_context, void *region_context)
-{
-	struct i801_priv *priv = handler_context;
-	struct pci_dev *pdev = priv->pci_dev;
-	acpi_status status;
-
-	/*
-	 * Once BIOS AML code touches the OpRegion we warn and inhibit any
-	 * further access from the driver itself. This device is now owned
-	 * by the system firmware.
-	 */
-	mutex_lock(&priv->acpi_lock);
-
-	if (!priv->acpi_reserved && i801_acpi_is_smbus_ioport(priv, address)) {
-		priv->acpi_reserved = true;
-
-		dev_warn(&pdev->dev, "BIOS is accessing SMBus registers\n");
-		dev_warn(&pdev->dev, "Driver SMBus register access inhibited\n");
-
-		/*
-		 * BIOS is accessing the host controller so prevent it from
-		 * suspending automatically from now on.
-		 */
-		pm_runtime_get_sync(&pdev->dev);
-	}
-
-	if ((function & ACPI_IO_MASK) == ACPI_READ)
-		status = acpi_os_read_port(address, (u32 *)value, bits);
-	else
-		status = acpi_os_write_port(address, (u32)*value, bits);
-
-	mutex_unlock(&priv->acpi_lock);
-
-	return status;
-}
-
-static int i801_acpi_probe(struct i801_priv *priv)
-{
-	struct acpi_device *adev;
-	acpi_status status;
-
-	adev = ACPI_COMPANION(&priv->pci_dev->dev);
-	if (adev) {
-		status = acpi_install_address_space_handler(adev->handle,
-				ACPI_ADR_SPACE_SYSTEM_IO, i801_acpi_io_handler,
-				NULL, priv);
-		if (ACPI_SUCCESS(status))
-			return 0;
-	}
-
-	return acpi_check_resource_conflict(&priv->pci_dev->resource[SMBBAR]);
-}
-
-static void i801_acpi_remove(struct i801_priv *priv)
-{
-	struct acpi_device *adev;
-
-	adev = ACPI_COMPANION(&priv->pci_dev->dev);
-	if (!adev)
-		return;
-
-	acpi_remove_address_space_handler(adev->handle,
-		ACPI_ADR_SPACE_SYSTEM_IO, i801_acpi_io_handler);
-
-	mutex_lock(&priv->acpi_lock);
-	if (priv->acpi_reserved)
-		pm_runtime_put(&priv->pci_dev->dev);
-	mutex_unlock(&priv->acpi_lock);
-}
-#else
-static inline int i801_acpi_probe(struct i801_priv *priv) { return 0; }
-static inline void i801_acpi_remove(struct i801_priv *priv) { }
-#endif
-
-static unsigned char i801_setup_hstcfg(struct i801_priv *priv)
-{
-	unsigned char hstcfg = priv->original_hstcfg;
-
-	hstcfg &= ~SMBHSTCFG_I2C_EN;	/* SMBus timing */
-	hstcfg |= SMBHSTCFG_HST_EN;
-	pci_write_config_byte(priv->pci_dev, SMBHSTCFG, hstcfg);
-	return hstcfg;
-}
-
-static int i801_probe(struct pci_dev *dev, const struct pci_device_id *id)
-{
-	unsigned char temp;
-	int err, i;
-	struct i801_priv *priv;
-
-	priv = devm_kzalloc(&dev->dev, sizeof(*priv), GFP_KERNEL);
-	if (!priv)
-		return -ENOMEM;
-
-	i2c_set_adapdata(&priv->adapter, priv);
-	priv->adapter.owner = THIS_MODULE;
-	priv->adapter.class = i801_get_adapter_class(priv);
-	priv->adapter.algo = &smbus_algorithm;
-	priv->adapter.dev.parent = &dev->dev;
-	ACPI_COMPANION_SET(&priv->adapter.dev, ACPI_COMPANION(&dev->dev));
-	priv->adapter.retries = 3;
-	mutex_init(&priv->acpi_lock);
-
-	priv->pci_dev = dev;
-	switch (dev->device) {
-	case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_H_SMBUS:
-	case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_SMBUS:
-	case PCI_DEVICE_ID_INTEL_LEWISBURG_SMBUS:
-	case PCI_DEVICE_ID_INTEL_LEWISBURG_SSKU_SMBUS:
-	case PCI_DEVICE_ID_INTEL_DNV_SMBUS:
-	case PCI_DEVICE_ID_INTEL_KABYLAKE_PCH_H_SMBUS:
-	case PCI_DEVICE_ID_INTEL_COMETLAKE_V_SMBUS:
-		priv->features |= FEATURE_BLOCK_PROC;
-		priv->features |= FEATURE_I2C_BLOCK_READ;
-		priv->features |= FEATURE_IRQ;
-		priv->features |= FEATURE_SMBUS_PEC;
-		priv->features |= FEATURE_BLOCK_BUFFER;
-		priv->features |= FEATURE_TCO_SPT;
-		priv->features |= FEATURE_HOST_NOTIFY;
-		break;
-
-	case PCI_DEVICE_ID_INTEL_CANNONLAKE_H_SMBUS:
-	case PCI_DEVICE_ID_INTEL_CANNONLAKE_LP_SMBUS:
-	case PCI_DEVICE_ID_INTEL_CDF_SMBUS:
-	case PCI_DEVICE_ID_INTEL_ICELAKE_LP_SMBUS:
-	case PCI_DEVICE_ID_INTEL_COMETLAKE_SMBUS:
-	case PCI_DEVICE_ID_INTEL_COMETLAKE_H_SMBUS:
-	case PCI_DEVICE_ID_INTEL_ELKHART_LAKE_SMBUS:
-	case PCI_DEVICE_ID_INTEL_TIGERLAKE_LP_SMBUS:
-	case PCI_DEVICE_ID_INTEL_TIGERLAKE_H_SMBUS:
-	case PCI_DEVICE_ID_INTEL_JASPER_LAKE_SMBUS:
-	case PCI_DEVICE_ID_INTEL_EBG_SMBUS:
-	case PCI_DEVICE_ID_INTEL_ALDER_LAKE_S_SMBUS:
-		priv->features |= FEATURE_BLOCK_PROC;
-		priv->features |= FEATURE_I2C_BLOCK_READ;
-		priv->features |= FEATURE_IRQ;
-		priv->features |= FEATURE_SMBUS_PEC;
-		priv->features |= FEATURE_BLOCK_BUFFER;
-		priv->features |= FEATURE_TCO_CNL;
-		priv->features |= FEATURE_HOST_NOTIFY;
-		break;
-
-	case PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF0:
-	case PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF1:
-	case PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF2:
-	case PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS0:
-	case PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS1:
-	case PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS2:
-		priv->features |= FEATURE_IDF;
-		fallthrough;
-	default:
-		priv->features |= FEATURE_BLOCK_PROC;
-		priv->features |= FEATURE_I2C_BLOCK_READ;
-		priv->features |= FEATURE_IRQ;
-		fallthrough;
-	case PCI_DEVICE_ID_INTEL_82801DB_3:
-		priv->features |= FEATURE_SMBUS_PEC;
-		priv->features |= FEATURE_BLOCK_BUFFER;
-		fallthrough;
-	case PCI_DEVICE_ID_INTEL_82801CA_3:
-		priv->features |= FEATURE_HOST_NOTIFY;
-		fallthrough;
-	case PCI_DEVICE_ID_INTEL_82801BA_2:
-	case PCI_DEVICE_ID_INTEL_82801AB_3:
-	case PCI_DEVICE_ID_INTEL_82801AA_3:
-		break;
-	}
-
-	/* Disable features on user request */
-	for (i = 0; i < ARRAY_SIZE(i801_feature_names); i++) {
-		if (priv->features & disable_features & (1 << i))
-			dev_notice(&dev->dev, "%s disabled by user\n",
-				   i801_feature_names[i]);
-	}
-	priv->features &= ~disable_features;
-
-	err = pcim_enable_device(dev);
-	if (err) {
-		dev_err(&dev->dev, "Failed to enable SMBus PCI device (%d)\n",
-			err);
-		return err;
-	}
-	pcim_pin_device(dev);
-
-	/* Determine the address of the SMBus area */
-	priv->smba = pci_resource_start(dev, SMBBAR);
-	if (!priv->smba) {
-		dev_err(&dev->dev,
-			"SMBus base address uninitialized, upgrade BIOS\n");
-		return -ENODEV;
-	}
-
-	if (i801_acpi_probe(priv))
-		return -ENODEV;
-
-	err = pcim_iomap_regions(dev, 1 << SMBBAR,
-				 dev_driver_string(&dev->dev));
-	if (err) {
-		dev_err(&dev->dev,
-			"Failed to request SMBus region 0x%lx-0x%Lx\n",
-			priv->smba,
-			(unsigned long long)pci_resource_end(dev, SMBBAR));
-		i801_acpi_remove(priv);
-		return err;
-	}
-
-	pci_read_config_byte(priv->pci_dev, SMBHSTCFG, &priv->original_hstcfg);
-	temp = i801_setup_hstcfg(priv);
-	if (!(priv->original_hstcfg & SMBHSTCFG_HST_EN))
-		dev_info(&dev->dev, "Enabling SMBus device\n");
-
-	if (temp & SMBHSTCFG_SMB_SMI_EN) {
-		dev_dbg(&dev->dev, "SMBus using interrupt SMI#\n");
-		/* Disable SMBus interrupt feature if SMBus using SMI# */
-		priv->features &= ~FEATURE_IRQ;
-	}
-	if (temp & SMBHSTCFG_SPD_WD)
-		dev_info(&dev->dev, "SPD Write Disable is set\n");
-
-	/* Clear special mode bits */
-	if (priv->features & (FEATURE_SMBUS_PEC | FEATURE_BLOCK_BUFFER))
-		outb_p(inb_p(SMBAUXCTL(priv)) &
-		       ~(SMBAUXCTL_CRC | SMBAUXCTL_E32B), SMBAUXCTL(priv));
-
-	/* Remember original Host Notify setting */
-	if (priv->features & FEATURE_HOST_NOTIFY)
-		priv->original_slvcmd = inb_p(SMBSLVCMD(priv));
-
-	/* Default timeout in interrupt mode: 200 ms */
-	priv->adapter.timeout = HZ / 5;
-
-	if (dev->irq == IRQ_NOTCONNECTED)
-		priv->features &= ~FEATURE_IRQ;
-
-	if (priv->features & FEATURE_IRQ) {
-		u16 pcictl, pcists;
-
-		/* Complain if an interrupt is already pending */
-		pci_read_config_word(priv->pci_dev, SMBPCISTS, &pcists);
-		if (pcists & SMBPCISTS_INTS)
-			dev_warn(&dev->dev, "An interrupt is pending!\n");
-
-		/* Check if interrupts have been disabled */
-		pci_read_config_word(priv->pci_dev, SMBPCICTL, &pcictl);
-		if (pcictl & SMBPCICTL_INTDIS) {
-			dev_info(&dev->dev, "Interrupts are disabled\n");
-			priv->features &= ~FEATURE_IRQ;
-		}
-	}
-
-	if (priv->features & FEATURE_IRQ) {
-		init_waitqueue_head(&priv->waitq);
-
-		err = devm_request_irq(&dev->dev, dev->irq, i801_isr,
-				       IRQF_SHARED,
-				       dev_driver_string(&dev->dev), priv);
-		if (err) {
-			dev_err(&dev->dev, "Failed to allocate irq %d: %d\n",
-				dev->irq, err);
-			priv->features &= ~FEATURE_IRQ;
-		}
-	}
-	dev_info(&dev->dev, "SMBus using %s\n",
-		 priv->features & FEATURE_IRQ ? "PCI interrupt" : "polling");
-
-	i801_add_tco(priv);
-
-	snprintf(priv->adapter.name, sizeof(priv->adapter.name),
-		"SMBus I801 adapter at %04lx", priv->smba);
-	err = i2c_add_adapter(&priv->adapter);
-	if (err) {
-		i801_acpi_remove(priv);
-		return err;
-	}
-
-	i801_enable_host_notify(&priv->adapter);
-
-	i801_probe_optional_slaves(priv);
-	/* We ignore errors - multiplexing is optional */
-	i801_add_mux(priv);
-
-	pci_set_drvdata(dev, priv);
-
-	dev_pm_set_driver_flags(&dev->dev, DPM_FLAG_NO_DIRECT_COMPLETE);
-	pm_runtime_set_autosuspend_delay(&dev->dev, 1000);
-	pm_runtime_use_autosuspend(&dev->dev);
-	pm_runtime_put_autosuspend(&dev->dev);
-	pm_runtime_allow(&dev->dev);
-	dev_info(&dev->dev, "wb-i2c-i801 probe ok.\n");
-
-	return 0;
-}
-
-static void i801_remove(struct pci_dev *dev)
-{
-	struct i801_priv *priv = pci_get_drvdata(dev);
-
-	pm_runtime_forbid(&dev->dev);
-	pm_runtime_get_noresume(&dev->dev);
-
-	i801_disable_host_notify(priv);
-	i801_del_mux(priv);
-	i2c_del_adapter(&priv->adapter);
-	i801_acpi_remove(priv);
-	pci_write_config_byte(dev, SMBHSTCFG, priv->original_hstcfg);
-
-	platform_device_unregister(priv->tco_pdev);
-
-	/*
-	 * do not call pci_disable_device(dev) since it can cause hard hangs on
-	 * some systems during power-off (eg. Fujitsu-Siemens Lifebook E8010)
-	 */
-}
-
-static void i801_shutdown(struct pci_dev *dev)
-{
-	struct i801_priv *priv = pci_get_drvdata(dev);
-
-	/* Restore config registers to avoid hard hang on some systems */
-	i801_disable_host_notify(priv);
-	pci_write_config_byte(dev, SMBHSTCFG, priv->original_hstcfg);
-}
-
-#ifdef CONFIG_PM_SLEEP
-static int i801_suspend(struct device *dev)
-{
-	struct i801_priv *priv = dev_get_drvdata(dev);
-
-	pci_write_config_byte(priv->pci_dev, SMBHSTCFG, priv->original_hstcfg);
-	return 0;
-}
-
-static int i801_resume(struct device *dev)
-{
-	struct i801_priv *priv = dev_get_drvdata(dev);
-
-	i801_setup_hstcfg(priv);
-	i801_enable_host_notify(&priv->adapter);
-
-	return 0;
-}
-#endif
-
-static SIMPLE_DEV_PM_OPS(i801_pm_ops, i801_suspend, i801_resume);
-
-static struct pci_driver i801_driver = {
-	.name		= "wb_i801_smbus",
-	.id_table	= i801_ids,
-	.probe		= i801_probe,
-	.remove		= i801_remove,
-	.shutdown	= i801_shutdown,
-	.driver		= {
-		.pm	= &i801_pm_ops,
-	},
-};
-
-static int __init i2c_i801_init(void)
-{
-	if (dmi_name_in_vendors("FUJITSU"))
-		input_apanel_init();
-	return pci_register_driver(&i801_driver);
-}
-
-static void __exit i2c_i801_exit(void)
-{
-	pci_unregister_driver(&i801_driver);
-}
-
-MODULE_AUTHOR("support");
-MODULE_DESCRIPTION("I801 SMBus driver");
-MODULE_LICENSE("GPL");
-
-module_init(i2c_i801_init);
-module_exit(i2c_i801_exit);
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_ismt.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_ismt.c
deleted file mode 100644
index 94a3ed827..000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_ismt.c
+++ /dev/null
@@ -1,1131 +0,0 @@
-/*
- * This file is provided under a dual BSD/GPLv2 license.  When using or
- * redistributing this file, you may do so under either license.
- *
- * Copyright(c) 2012 Intel Corporation. All rights reserved.
- *
- * GPL LICENSE SUMMARY
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of version 2 of the GNU General Public License as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- * The full GNU General Public License is included in this distribution
- * in the file called LICENSE.GPL.
- *
- * BSD LICENSE
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- *   * Redistributions of source code must retain the above copyright
- *     notice, this list of conditions and the following disclaimer.
- *   * Redistributions in binary form must reproduce the above copyright
- *     notice, this list of conditions and the following disclaimer in
- *     the documentation and/or other materials provided with the
- *     distribution.
- *   * Neither the name of Intel Corporation nor the names of its
- *     contributors may be used to endorse or promote products derived
- *     from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-/*
- *  Supports the SMBus Message Transport (SMT) in the Intel Atom Processor
- *  S12xx Product Family.
- *
- *  Features supported by this driver:
- *  Hardware PEC                     yes
- *  Block buffer                     yes
- *  Block process call transaction   yes
- *  Slave mode                       no
- */
-
-#include <linux/module.h>
-#include <linux/pci.h>
-#include <linux/kernel.h>
-#include <linux/stddef.h>
-#include <linux/completion.h>
-#include <linux/dma-mapping.h>
-#include <linux/i2c.h>
-#include <linux/acpi.h>
-#include <linux/interrupt.h>
-#include <linux/delay.h>
-
-#include <linux/io-64-nonatomic-lo-hi.h>
-#include <linux/string.h>
-
-#define mem_clear(data, size) memset((data), 0, (size))
-
-/* PCI Address Constants */
-#define SMBBAR		0
-
-#define ISMT_DBCTRL		0x388	/* ISMT PIN Control Register */
-#define ISMT_DBSTS		0X38C	/* ISMT PIN Status Register */
-
-#define ISMT_DBSTS_CLK_STS	(1<<9)	/* bit9 SMBCLK_CUR_STS */
-#define ISMT_DBSTS_SDA_STS	(1<<8)	/* bit8 SMBDATA_CUR_STS */
-#define ISMT_DBCTRL_CLK_CTL	(1<<1)	/* bit1 SMBCLK_CTL */
-#define ISMT_DBCTRL_ENABLE	(1<<31)	/* bit31 EN */
-
-/* PCI DIDs for the Intel SMBus Message Transport (SMT) Devices */
-#define PCI_DEVICE_ID_INTEL_S1200_SMT0	0x0c59
-#define PCI_DEVICE_ID_INTEL_S1200_SMT1	0x0c5a
-#define PCI_DEVICE_ID_INTEL_CDF_SMT	0x18ac
-#define PCI_DEVICE_ID_INTEL_DNV_SMT	0x19ac
-#define PCI_DEVICE_ID_INTEL_EBG_SMT	0x1bff
-#define PCI_DEVICE_ID_INTEL_AVOTON_SMT	0x1f15
-
-#define ISMT_DESC_ENTRIES	2	/* number of descriptor entries */
-#define ISMT_MAX_RETRIES	3	/* number of SMBus retries to attempt */
-#define ISMT_LOG_ENTRIES	3	/* number of interrupt cause log entries */
-
-/* Hardware Descriptor Constants - Control Field */
-#define ISMT_DESC_CWRL	0x01	/* Command/Write Length */
-#define ISMT_DESC_BLK	0X04	/* Perform Block Transaction */
-#define ISMT_DESC_FAIR	0x08	/* Set fairness flag upon successful arbit. */
-#define ISMT_DESC_PEC	0x10	/* Packet Error Code */
-#define ISMT_DESC_I2C	0x20	/* I2C Enable */
-#define ISMT_DESC_INT	0x40	/* Interrupt */
-#define ISMT_DESC_SOE	0x80	/* Stop On Error */
-
-/* Hardware Descriptor Constants - Status Field */
-#define ISMT_DESC_SCS	0x01	/* Success */
-#define ISMT_DESC_DLTO	0x04	/* Data Low Time Out */
-#define ISMT_DESC_NAK	0x08	/* NAK Received */
-#define ISMT_DESC_CRC	0x10	/* CRC Error */
-#define ISMT_DESC_CLTO	0x20	/* Clock Low Time Out */
-#define ISMT_DESC_COL	0x40	/* Collisions */
-#define ISMT_DESC_LPR	0x80	/* Large Packet Received */
-
-/* Macros */
-#define ISMT_DESC_ADDR_RW(addr, rw) (((addr) << 1) | (rw))
-
-/* iSMT General Register address offsets (SMBBAR + <addr>) */
-#define ISMT_GR_GCTRL		0x000	/* General Control */
-#define ISMT_GR_SMTICL		0x008	/* SMT Interrupt Cause Location */
-#define ISMT_GR_ERRINTMSK	0x010	/* Error Interrupt Mask */
-#define ISMT_GR_ERRAERMSK	0x014	/* Error AER Mask */
-#define ISMT_GR_ERRSTS		0x018	/* Error Status */
-#define ISMT_GR_ERRINFO		0x01c	/* Error Information */
-
-/* iSMT Master Registers */
-#define ISMT_MSTR_MDBA		0x100	/* Master Descriptor Base Address */
-#define ISMT_MSTR_MCTRL		0x108	/* Master Control */
-#define ISMT_MSTR_MSTS		0x10c	/* Master Status */
-#define ISMT_MSTR_MDS		0x110	/* Master Descriptor Size */
-#define ISMT_MSTR_RPOLICY	0x114	/* Retry Policy */
-
-/* iSMT Miscellaneous Registers */
-#define ISMT_SPGT	0x300	/* SMBus PHY Global Timing */
-
-/* General Control Register (GCTRL) bit definitions */
-#define ISMT_GCTRL_TRST	0x04	/* Target Reset */
-#define ISMT_GCTRL_KILL	0x08	/* Kill */
-#define ISMT_GCTRL_SRST	0x40	/* Soft Reset */
-
-/* Master Control Register (MCTRL) bit definitions */
-#define ISMT_MCTRL_SS	0x01		/* Start/Stop */
-#define ISMT_MCTRL_MEIE	0x10		/* Master Error Interrupt Enable */
-#define ISMT_MCTRL_FMHP	0x00ff0000	/* Firmware Master Head Ptr (FMHP) */
-
-/* Master Status Register (MSTS) bit definitions */
-#define ISMT_MSTS_HMTP	0xff0000	/* HW Master Tail Pointer (HMTP) */
-#define ISMT_MSTS_MIS	0x20		/* Master Interrupt Status (MIS) */
-#define ISMT_MSTS_MEIS	0x10		/* Master Error Int Status (MEIS) */
-#define ISMT_MSTS_IP	0x01		/* In Progress */
-
-/* Master Descriptor Size (MDS) bit definitions */
-#define ISMT_MDS_MASK	0xff	/* Master Descriptor Size mask (MDS) */
-
-/* SMBus PHY Global Timing Register (SPGT) bit definitions */
-#define ISMT_SPGT_SPD_MASK	0xc0000000	/* SMBus Speed mask */
-#define ISMT_SPGT_SPD_80K	0x00		/* 80 kHz */
-#define ISMT_SPGT_SPD_100K	(0x1 << 30)	/* 100 kHz */
-#define ISMT_SPGT_SPD_400K	(0x2U << 30)	/* 400 kHz */
-#define ISMT_SPGT_SPD_1M	(0x3U << 30)	/* 1 MHz */
-
-
-/* MSI Control Register (MSICTL) bit definitions */
-#define ISMT_MSICTL_MSIE	0x01	/* MSI Enable */
-
-/* iSMT Hardware Descriptor */
-struct ismt_desc {
-	u8 tgtaddr_rw;	/* target address & r/w bit */
-	u8 wr_len_cmd;	/* write length in bytes or a command */
-	u8 rd_len;	/* read length */
-	u8 control;	/* control bits */
-	u8 status;	/* status bits */
-	u8 retry;	/* collision retry and retry count */
-	u8 rxbytes;	/* received bytes */
-	u8 txbytes;	/* transmitted bytes */
-	u32 dptr_low;	/* lower 32 bit of the data pointer */
-	u32 dptr_high;	/* upper 32 bit of the data pointer */
-} __packed;
-
-struct ismt_priv {
-	struct i2c_adapter adapter;
-	void __iomem *smba;			/* PCI BAR */
-	struct pci_dev *pci_dev;
-	struct ismt_desc *hw;			/* descriptor virt base addr */
-	dma_addr_t io_rng_dma;			/* descriptor HW base addr */
-	u8 head;				/* ring buffer head pointer */
-	struct completion cmp;			/* interrupt completion */
-	u8 buffer[I2C_SMBUS_BLOCK_MAX + 16];	/* temp R/W data buffer */
-	dma_addr_t log_dma;
-	u32 *log;
-};
-
-static const struct pci_device_id ismt_ids[] = {
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_S1200_SMT0) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_S1200_SMT1) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CDF_SMT) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_DNV_SMT) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_EBG_SMT) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_AVOTON_SMT) },
-	{ 0, }
-};
-
-MODULE_DEVICE_TABLE(pci, ismt_ids);
-
-/* Bus speed control bits for slow debuggers - refer to the docs for usage */
-static unsigned int bus_speed;
-module_param(bus_speed, uint, S_IRUGO);
-MODULE_PARM_DESC(bus_speed, "Bus Speed in kHz (0 = BIOS default)");
-
-static unsigned int dma_reset_timeout = 1000;
-module_param(dma_reset_timeout, uint, S_IRUGO);
-
-static void ismt_hw_init(struct ismt_priv *priv);
-
-/**
- * __ismt_desc_dump() - dump the contents of a specific descriptor
- * @dev: the iSMT device
- * @desc: the iSMT hardware descriptor
- */
-static void __ismt_desc_dump(struct device *dev, const struct ismt_desc *desc)
-{
-
-	dev_dbg(dev, "Descriptor struct:  %p\n", desc);
-	dev_dbg(dev, "\ttgtaddr_rw=0x%02X\n", desc->tgtaddr_rw);
-	dev_dbg(dev, "\twr_len_cmd=0x%02X\n", desc->wr_len_cmd);
-	dev_dbg(dev, "\trd_len=    0x%02X\n", desc->rd_len);
-	dev_dbg(dev, "\tcontrol=   0x%02X\n", desc->control);
-	dev_dbg(dev, "\tstatus=    0x%02X\n", desc->status);
-	dev_dbg(dev, "\tretry=     0x%02X\n", desc->retry);
-	dev_dbg(dev, "\trxbytes=   0x%02X\n", desc->rxbytes);
-	dev_dbg(dev, "\ttxbytes=   0x%02X\n", desc->txbytes);
-	dev_dbg(dev, "\tdptr_low=  0x%08X\n", desc->dptr_low);
-	dev_dbg(dev, "\tdptr_high= 0x%08X\n", desc->dptr_high);
-}
-/**
- * ismt_desc_dump() - dump the contents of a descriptor for debug purposes
- * @priv: iSMT private data
- */
-static void ismt_desc_dump(struct ismt_priv *priv)
-{
-	struct device *dev = &priv->pci_dev->dev;
-	struct ismt_desc *desc = &priv->hw[priv->head];
-
-	dev_dbg(dev, "Dump of the descriptor struct:  0x%X\n", priv->head);
-	__ismt_desc_dump(dev, desc);
-}
-
-static void ismt_reset_dma(struct ismt_priv *priv)
-{
-    uint val;
-    u16 ctrl;
-    struct pci_dev *pdev;
-    u32 addr_lo, addr_hi;
-
-    /* save msiaddr */
-    pdev = priv->pci_dev;
-    pci_read_config_dword(pdev, pdev->msi_cap + PCI_MSI_ADDRESS_LO, &addr_lo);
-    pci_read_config_dword(pdev, pdev->msi_cap + PCI_MSI_ADDRESS_HI, &addr_hi);
-
-    /* Clear the start bit */
-    val = readl(priv->smba + ISMT_MSTR_MCTRL);
-    val &= ~ISMT_MCTRL_SS;
-    writel(val, priv->smba + ISMT_MSTR_MCTRL);
-
-    val = readl(priv->smba + ISMT_GR_GCTRL);
-    writel(val | ISMT_GCTRL_KILL | ISMT_GCTRL_TRST | ISMT_GCTRL_SRST, priv->smba + ISMT_GR_GCTRL);
-
-    if (dma_reset_timeout > 0) {
-        usleep_range(dma_reset_timeout, dma_reset_timeout + 1);
-    }
-
-    ismt_hw_init(priv);
-    pci_write_config_dword(pdev, pdev->msi_cap + PCI_MSI_ADDRESS_LO, addr_lo);
-    pci_write_config_dword(pdev, pdev->msi_cap + PCI_MSI_ADDRESS_HI, addr_hi);
-    /* enable msi */
-    pci_read_config_word(pdev, pdev->msi_cap + PCI_MSI_FLAGS, &ctrl);
-    ctrl |= PCI_MSI_FLAGS_ENABLE;
-    pci_write_config_word(pdev, pdev->msi_cap + PCI_MSI_FLAGS, ctrl);
-}
-
-/**
- * ismt_gen_reg_dump() - dump the iSMT General Registers
- * @priv: iSMT private data
- */
-static void ismt_gen_reg_dump(struct ismt_priv *priv)
-{
-	struct device *dev = &priv->pci_dev->dev;
-
-	dev_dbg(dev, "Dump of the iSMT General Registers\n");
-	dev_dbg(dev, "  GCTRL.... : (0x%p)=0x%X\n",
-		priv->smba + ISMT_GR_GCTRL,
-		readl(priv->smba + ISMT_GR_GCTRL));
-	dev_dbg(dev, "  SMTICL... : (0x%p)=0x%016llX\n",
-		priv->smba + ISMT_GR_SMTICL,
-		(long long unsigned int)readq(priv->smba + ISMT_GR_SMTICL));
-	dev_dbg(dev, "  ERRINTMSK : (0x%p)=0x%X\n",
-		priv->smba + ISMT_GR_ERRINTMSK,
-		readl(priv->smba + ISMT_GR_ERRINTMSK));
-	dev_dbg(dev, "  ERRAERMSK : (0x%p)=0x%X\n",
-		priv->smba + ISMT_GR_ERRAERMSK,
-		readl(priv->smba + ISMT_GR_ERRAERMSK));
-	dev_dbg(dev, "  ERRSTS... : (0x%p)=0x%X\n",
-		priv->smba + ISMT_GR_ERRSTS,
-		readl(priv->smba + ISMT_GR_ERRSTS));
-	dev_dbg(dev, "  ERRINFO.. : (0x%p)=0x%X\n",
-		priv->smba + ISMT_GR_ERRINFO,
-		readl(priv->smba + ISMT_GR_ERRINFO));
-}
-
-/**
- * ismt_mstr_reg_dump() - dump the iSMT Master Registers
- * @priv: iSMT private data
- */
-static void ismt_mstr_reg_dump(struct ismt_priv *priv)
-{
-	struct device *dev = &priv->pci_dev->dev;
-
-	dev_dbg(dev, "Dump of the iSMT Master Registers\n");
-	dev_dbg(dev, "  MDBA..... : (0x%p)=0x%016llX\n",
-		priv->smba + ISMT_MSTR_MDBA,
-		(long long unsigned int)readq(priv->smba + ISMT_MSTR_MDBA));
-	dev_dbg(dev, "  MCTRL.... : (0x%p)=0x%X\n",
-		priv->smba + ISMT_MSTR_MCTRL,
-		readl(priv->smba + ISMT_MSTR_MCTRL));
-	dev_dbg(dev, "  MSTS..... : (0x%p)=0x%X\n",
-		priv->smba + ISMT_MSTR_MSTS,
-		readl(priv->smba + ISMT_MSTR_MSTS));
-	dev_dbg(dev, "  MDS...... : (0x%p)=0x%X\n",
-		priv->smba + ISMT_MSTR_MDS,
-		readl(priv->smba + ISMT_MSTR_MDS));
-	dev_dbg(dev, "  RPOLICY.. : (0x%p)=0x%X\n",
-		priv->smba + ISMT_MSTR_RPOLICY,
-		readl(priv->smba + ISMT_MSTR_RPOLICY));
-	dev_dbg(dev, "  SPGT..... : (0x%p)=0x%X\n",
-		priv->smba + ISMT_SPGT,
-		readl(priv->smba + ISMT_SPGT));
-}
-
-/**
- * ismt_submit_desc() - add a descriptor to the ring
- * @priv: iSMT private data
- */
-static void ismt_submit_desc(struct ismt_priv *priv)
-{
-	uint fmhp;
-	uint val;
-
-	ismt_desc_dump(priv);
-	ismt_gen_reg_dump(priv);
-	ismt_mstr_reg_dump(priv);
-
-	/* Set the FMHP (Firmware Master Head Pointer)*/
-	fmhp = ((priv->head + 1) % ISMT_DESC_ENTRIES) << 16;
-	val = readl(priv->smba + ISMT_MSTR_MCTRL);
-	writel((val & ~ISMT_MCTRL_FMHP) | fmhp,
-	       priv->smba + ISMT_MSTR_MCTRL);
-
-	/* Set the start bit */
-	val = readl(priv->smba + ISMT_MSTR_MCTRL);
-	writel(val | ISMT_MCTRL_SS,
-	       priv->smba + ISMT_MSTR_MCTRL);
-}
-
-/**
- * ismt_process_desc() - handle the completion of the descriptor
- * @desc: the iSMT hardware descriptor
- * @data: data buffer from the upper layer
- * @priv: ismt_priv struct holding our dma buffer
- * @size: SMBus transaction type
- * @read_write: flag to indicate if this is a read or write
- */
-static int ismt_process_desc(const struct ismt_desc *desc,
-			     union i2c_smbus_data *data,
-			     struct ismt_priv *priv, int size,
-			     char read_write)
-{
-	u8 *dma_buffer = PTR_ALIGN(&priv->buffer[0], 16);
-
-	dev_dbg(&priv->pci_dev->dev, "Processing completed descriptor\n");
-	__ismt_desc_dump(&priv->pci_dev->dev, desc);
-	ismt_gen_reg_dump(priv);
-	ismt_mstr_reg_dump(priv);
-
-	if (desc->status & ISMT_DESC_SCS) {
-		if (read_write == I2C_SMBUS_WRITE &&
-		    size != I2C_SMBUS_PROC_CALL &&
-		    size != I2C_SMBUS_BLOCK_PROC_CALL)
-			return 0;
-
-		switch (size) {
-		case I2C_SMBUS_BYTE:
-		case I2C_SMBUS_BYTE_DATA:
-			data->byte = dma_buffer[0];
-			break;
-		case I2C_SMBUS_WORD_DATA:
-		case I2C_SMBUS_PROC_CALL:
-			data->word = dma_buffer[0] | (dma_buffer[1] << 8);
-			break;
-		case I2C_SMBUS_BLOCK_DATA:
-		case I2C_SMBUS_BLOCK_PROC_CALL:
-			if (desc->rxbytes != dma_buffer[0] + 1)
-				return -EMSGSIZE;
-
-			memcpy(data->block, dma_buffer, desc->rxbytes);
-			break;
-		case I2C_SMBUS_I2C_BLOCK_DATA:
-			memcpy(&data->block[1], dma_buffer, desc->rxbytes);
-			data->block[0] = desc->rxbytes;
-			break;
-		}
-		return 0;
-	}
-
-	if (likely(desc->status & ISMT_DESC_NAK))
-		return -ENXIO;
-
-	if (desc->status & ISMT_DESC_CRC)
-		return -EBADMSG;
-
-	if (desc->status & ISMT_DESC_COL)
-		return -EAGAIN;
-
-	if (desc->status & ISMT_DESC_LPR)
-		return -EPROTO;
-
-	if (desc->status & (ISMT_DESC_DLTO | ISMT_DESC_CLTO))
-		return -ETIMEDOUT;
-
-	return -EIO;
-}
-
-static void ismt_setscl(struct ismt_priv *priv, unsigned int level)
-{
-    int pin_status;
-
-    pin_status = readl(priv->smba + ISMT_DBCTRL);
-    if (level == 0) {
-        pin_status &= (~ISMT_DBCTRL_CLK_CTL);
-    } else {
-        pin_status |= ISMT_DBCTRL_CLK_CTL;
-    }
-    writel(pin_status, priv->smba + ISMT_DBCTRL);
-    pin_status = readl(priv->smba + ISMT_DBCTRL);
-    dev_dbg(&priv->pci_dev->dev, "dbctrl status = 0x%04x\r\n", pin_status);
-    return;
-}
-
-static void ismt_i2c_unblock(struct ismt_priv *priv)
-{
-    int i;
-    int pin_status, ori_status;
-
-    pin_status = readl(priv->smba + ISMT_DBCTRL);
-    ori_status = pin_status;
-    if ((pin_status & ISMT_DBCTRL_ENABLE) == 0) {
-        pin_status |= ISMT_DBCTRL_ENABLE;
-        writel(pin_status, priv->smba + ISMT_DBCTRL);
-        pin_status = readl(priv->smba + ISMT_DBCTRL);
-        dev_dbg(&priv->pci_dev->dev, "enable dbctrl pin status = 0x%04x\r\n", pin_status);
-    }
-
-    for (i = 0; i < 10; i++) {
-        ismt_setscl(priv, 0);
-        udelay(5);
-        ismt_setscl(priv, 1);
-        udelay(5);
-    }
-
-    pin_status = readl(priv->smba + ISMT_DBCTRL);
-    if (pin_status != ori_status) {
-        writel(ori_status, priv->smba + ISMT_DBCTRL);
-        pin_status = readl(priv->smba + ISMT_DBCTRL);
-        dev_dbg(&priv->pci_dev->dev, "reback dbctrl pin status = 0x%04x\r\n", pin_status);
-    }
-
-    return;
-}
-
-static int ismt_check_i2c_unblock(struct ismt_priv *priv)
-{
-    int pin_status;
-
-    pin_status = readl(priv->smba + ISMT_DBSTS);
-
-    if ( (!(pin_status & ISMT_DBSTS_SDA_STS) ) && (pin_status & ISMT_DBSTS_CLK_STS) ) {
-        dev_dbg(&priv->pci_dev->dev, "SDA is low, send 9 clock to device!\n");
-        ismt_i2c_unblock(priv);
-    }
-    return 0;
-}
-
-static int ismt_check_i2c_scl(struct ismt_priv *priv)
-{
-    int pin_status;
-
-    pin_status = readl(priv->smba + ISMT_DBSTS);
-
-    if ( (pin_status & ISMT_DBSTS_SDA_STS) && (pin_status & ISMT_DBSTS_CLK_STS) ) {
-        return 0;
-    }
-
-    dev_warn(&priv->pci_dev->dev, "SDA or SCL is low.pin_status:0x%x\n", pin_status);
-    return -1;
-}
-
-/* Make sure the SMBus host is ready to start transmitting.
-   Return 0 if it is, -EIO if it is not. */
-static int ismt_check_pre(struct ismt_priv *priv)
-{
-    ismt_check_i2c_unblock(priv);
-
-    /* SDA or SCL is low, return -EIO */
-    if (ismt_check_i2c_scl(priv)) {
-        return -EIO;
-    }
-
-    return 0;
-}
-
-/**
- * ismt_access() - process an SMBus command
- * @adap: the i2c host adapter
- * @addr: address of the i2c/SMBus target
- * @flags: command options
- * @read_write: read from or write to device
- * @command: the i2c/SMBus command to issue
- * @size: SMBus transaction type
- * @data: read/write data buffer
- */
-static int ismt_access(struct i2c_adapter *adap, u16 addr,
-		       unsigned short flags, char read_write, u8 command,
-		       int size, union i2c_smbus_data *data)
-{
-	int ret;
-	unsigned long time_left;
-	dma_addr_t dma_addr = 0; /* address of the data buffer */
-	u8 dma_size = 0;
-	enum dma_data_direction dma_direction = 0;
-	struct ismt_desc *desc;
-	struct ismt_priv *priv = i2c_get_adapdata(adap);
-	struct device *dev = &priv->pci_dev->dev;
-	u8 *dma_buffer = PTR_ALIGN(&priv->buffer[0], 16);
-
-	ret = ismt_check_pre(priv);
-	if (ret < 0) {
-		return ret;
-	}
-
-	desc = &priv->hw[priv->head];
-
-	/* Initialize the DMA buffer */
-	mem_clear(priv->buffer, sizeof(priv->buffer));
-
-	/* Initialize the descriptor */
-	mem_clear(desc, sizeof(struct ismt_desc));
-	desc->tgtaddr_rw = ISMT_DESC_ADDR_RW(addr, read_write);
-
-	/* Always clear the log entries */
-	mem_clear(priv->log, ISMT_LOG_ENTRIES * sizeof(u32));
-
-	/* Initialize common control bits */
-	if (likely(pci_dev_msi_enabled(priv->pci_dev)))
-		desc->control = ISMT_DESC_INT | ISMT_DESC_FAIR;
-	else
-		desc->control = ISMT_DESC_FAIR;
-
-	if ((flags & I2C_CLIENT_PEC) && (size != I2C_SMBUS_QUICK)
-	    && (size != I2C_SMBUS_I2C_BLOCK_DATA))
-		desc->control |= ISMT_DESC_PEC;
-
-	switch (size) {
-	case I2C_SMBUS_QUICK:
-		dev_dbg(dev, "I2C_SMBUS_QUICK\n");
-		break;
-
-	case I2C_SMBUS_BYTE:
-		if (read_write == I2C_SMBUS_WRITE) {
-			/*
-			 * Send Byte
-			 * The command field contains the write data
-			 */
-			dev_dbg(dev, "I2C_SMBUS_BYTE:  WRITE\n");
-			desc->control |= ISMT_DESC_CWRL;
-			desc->wr_len_cmd = command;
-		} else {
-			/* Receive Byte */
-			dev_dbg(dev, "I2C_SMBUS_BYTE:  READ\n");
-			dma_size = 1;
-			dma_direction = DMA_FROM_DEVICE;
-			desc->rd_len = 1;
-		}
-		break;
-
-	case I2C_SMBUS_BYTE_DATA:
-		if (read_write == I2C_SMBUS_WRITE) {
-			/*
-			 * Write Byte
-			 * Command plus 1 data byte
-			 */
-			dev_dbg(dev, "I2C_SMBUS_BYTE_DATA:  WRITE\n");
-			desc->wr_len_cmd = 2;
-			dma_size = 2;
-			dma_direction = DMA_TO_DEVICE;
-			dma_buffer[0] = command;
-			dma_buffer[1] = data->byte;
-		} else {
-			/* Read Byte */
-			dev_dbg(dev, "I2C_SMBUS_BYTE_DATA:  READ\n");
-			desc->control |= ISMT_DESC_CWRL;
-			desc->wr_len_cmd = command;
-			desc->rd_len = 1;
-			dma_size = 1;
-			dma_direction = DMA_FROM_DEVICE;
-		}
-		break;
-
-	case I2C_SMBUS_WORD_DATA:
-		if (read_write == I2C_SMBUS_WRITE) {
-			/* Write Word */
-			dev_dbg(dev, "I2C_SMBUS_WORD_DATA:  WRITE\n");
-			desc->wr_len_cmd = 3;
-			dma_size = 3;
-			dma_direction = DMA_TO_DEVICE;
-			dma_buffer[0] = command;
-			dma_buffer[1] = data->word & 0xff;
-			dma_buffer[2] = data->word >> 8;
-		} else {
-			/* Read Word */
-			dev_dbg(dev, "I2C_SMBUS_WORD_DATA:  READ\n");
-			desc->wr_len_cmd = command;
-			desc->control |= ISMT_DESC_CWRL;
-			desc->rd_len = 2;
-			dma_size = 2;
-			dma_direction = DMA_FROM_DEVICE;
-		}
-		break;
-
-	case I2C_SMBUS_PROC_CALL:
-		dev_dbg(dev, "I2C_SMBUS_PROC_CALL\n");
-		desc->wr_len_cmd = 3;
-		desc->rd_len = 2;
-		dma_size = 3;
-		dma_direction = DMA_BIDIRECTIONAL;
-		dma_buffer[0] = command;
-		dma_buffer[1] = data->word & 0xff;
-		dma_buffer[2] = data->word >> 8;
-		break;
-
-	case I2C_SMBUS_BLOCK_DATA:
-		if (read_write == I2C_SMBUS_WRITE) {
-			/* Block Write */
-			dev_dbg(dev, "I2C_SMBUS_BLOCK_DATA:  WRITE\n");
-			if (data->block[0] < 1 || data->block[0] > I2C_SMBUS_BLOCK_MAX)
-				return -EINVAL;
-
-			dma_size = data->block[0] + 1;
-			dma_direction = DMA_TO_DEVICE;
-			desc->wr_len_cmd = dma_size;
-			desc->control |= ISMT_DESC_BLK;
-			dma_buffer[0] = command;
-			memcpy(&dma_buffer[1], &data->block[1], dma_size - 1);
-		} else {
-			/* Block Read */
-			dev_dbg(dev, "I2C_SMBUS_BLOCK_DATA:  READ\n");
-			dma_size = I2C_SMBUS_BLOCK_MAX;
-			dma_direction = DMA_FROM_DEVICE;
-			desc->rd_len = dma_size;
-			desc->wr_len_cmd = command;
-			desc->control |= (ISMT_DESC_BLK | ISMT_DESC_CWRL);
-		}
-		break;
-
-	case I2C_SMBUS_BLOCK_PROC_CALL:
-		dev_dbg(dev, "I2C_SMBUS_BLOCK_PROC_CALL\n");
-		if (data->block[0] > I2C_SMBUS_BLOCK_MAX)
-			return -EINVAL;
-
-		dma_size = I2C_SMBUS_BLOCK_MAX;
-		desc->tgtaddr_rw = ISMT_DESC_ADDR_RW(addr, 1);
-		desc->wr_len_cmd = data->block[0] + 1;
-		desc->rd_len = dma_size;
-		desc->control |= ISMT_DESC_BLK;
-		dma_direction = DMA_BIDIRECTIONAL;
-		dma_buffer[0] = command;
-		memcpy(&dma_buffer[1], &data->block[1], data->block[0]);
-		break;
-
-	case I2C_SMBUS_I2C_BLOCK_DATA:
-		/* Make sure the length is valid */
-		if (data->block[0] < 1)
-			data->block[0] = 1;
-
-		if (data->block[0] > I2C_SMBUS_BLOCK_MAX)
-			data->block[0] = I2C_SMBUS_BLOCK_MAX;
-
-		if (read_write == I2C_SMBUS_WRITE) {
-			/* i2c Block Write */
-			dev_dbg(dev, "I2C_SMBUS_I2C_BLOCK_DATA:  WRITE\n");
-			dma_size = data->block[0] + 1;
-			dma_direction = DMA_TO_DEVICE;
-			desc->wr_len_cmd = dma_size;
-			desc->control |= ISMT_DESC_I2C;
-			dma_buffer[0] = command;
-			memcpy(&dma_buffer[1], &data->block[1], dma_size - 1);
-		} else {
-			/* i2c Block Read */
-			dev_dbg(dev, "I2C_SMBUS_I2C_BLOCK_DATA:  READ\n");
-			dma_size = data->block[0];
-			dma_direction = DMA_FROM_DEVICE;
-			desc->rd_len = dma_size;
-			desc->wr_len_cmd = command;
-			desc->control |= (ISMT_DESC_I2C | ISMT_DESC_CWRL);
-			/*
-			 * Per the "Table 15-15. I2C Commands",
-			 * in the External Design Specification (EDS),
-			 * (Document Number: 508084, Revision: 2.0),
-			 * the _rw bit must be 0
-			 */
-			desc->tgtaddr_rw = ISMT_DESC_ADDR_RW(addr, 0);
-		}
-		break;
-
-	default:
-		dev_err(dev, "Unsupported transaction %d\n",
-			size);
-		return -EOPNOTSUPP;
-	}
-
-	/* map the data buffer */
-	if (dma_size != 0) {
-		dev_dbg(dev, " dev=%p\n", dev);
-		dev_dbg(dev, " data=%p\n", data);
-		dev_dbg(dev, " dma_buffer=%p\n", dma_buffer);
-		dev_dbg(dev, " dma_size=%d\n", dma_size);
-		dev_dbg(dev, " dma_direction=%d\n", dma_direction);
-
-		dma_addr = dma_map_single(dev,
-				      dma_buffer,
-				      dma_size,
-				      dma_direction);
-
-		if (dma_mapping_error(dev, dma_addr)) {
-			dev_err(dev, "Error in mapping dma buffer %p\n",
-				dma_buffer);
-			return -EIO;
-		}
-
-		dev_dbg(dev, " dma_addr = %pad\n", &dma_addr);
-
-		desc->dptr_low = lower_32_bits(dma_addr);
-		desc->dptr_high = upper_32_bits(dma_addr);
-	}
-
-	reinit_completion(&priv->cmp);
-
-	/* Add the descriptor */
-	ismt_submit_desc(priv);
-
-	/* Now we wait for interrupt completion, 1s */
-	time_left = wait_for_completion_timeout(&priv->cmp, HZ*1);
-
-	/* unmap the data buffer */
-	if (dma_size != 0)
-		dma_unmap_single(dev, dma_addr, dma_size, dma_direction);
-
-	if (unlikely(!time_left)) {
-		dev_warn(dev, "completion wait timed out:addr[%d-0x%x], read_write[%d], command[0x%x], size[%d]\n",
-					adap->nr, addr, read_write, command, size);
-		ismt_reset_dma(priv);
-		ret = -ETIMEDOUT;
-		priv->head = 0;
-		return ret;
-	}
-
-	/* do any post processing of the descriptor here */
-	ret = ismt_process_desc(desc, data, priv, size, read_write);
-
-	/* Update the ring pointer */
-	priv->head++;
-	priv->head %= ISMT_DESC_ENTRIES;
-
-	return ret;
-}
-
-/**
- * ismt_func() - report which i2c commands are supported by this adapter
- * @adap: the i2c host adapter
- */
-static u32 ismt_func(struct i2c_adapter *adap)
-{
-	return I2C_FUNC_SMBUS_QUICK		|
-	       I2C_FUNC_SMBUS_BYTE		|
-	       I2C_FUNC_SMBUS_BYTE_DATA		|
-	       I2C_FUNC_SMBUS_WORD_DATA		|
-	       I2C_FUNC_SMBUS_PROC_CALL		|
-	       I2C_FUNC_SMBUS_BLOCK_PROC_CALL	|
-	       I2C_FUNC_SMBUS_BLOCK_DATA	|
-	       I2C_FUNC_SMBUS_I2C_BLOCK		|
-	       I2C_FUNC_SMBUS_PEC;
-}
-
-static const struct i2c_algorithm smbus_algorithm = {
-	.smbus_xfer	= ismt_access,
-	.functionality	= ismt_func,
-};
-
-/**
- * ismt_handle_isr() - interrupt handler bottom half
- * @priv: iSMT private data
- */
-static irqreturn_t ismt_handle_isr(struct ismt_priv *priv)
-{
-	complete(&priv->cmp);
-
-	return IRQ_HANDLED;
-}
-
-
-/**
- * ismt_do_interrupt() - IRQ interrupt handler
- * @vec: interrupt vector
- * @data: iSMT private data
- */
-static irqreturn_t ismt_do_interrupt(int vec, void *data)
-{
-	u32 val;
-	struct ismt_priv *priv = data;
-
-	/*
-	 * check to see it's our interrupt, return IRQ_NONE if not ours
-	 * since we are sharing interrupt
-	 */
-	val = readl(priv->smba + ISMT_MSTR_MSTS);
-
-	if (!(val & (ISMT_MSTS_MIS | ISMT_MSTS_MEIS)))
-		return IRQ_NONE;
-	else
-		writel(val | ISMT_MSTS_MIS | ISMT_MSTS_MEIS,
-		       priv->smba + ISMT_MSTR_MSTS);
-
-	return ismt_handle_isr(priv);
-}
-
-/**
- * ismt_do_msi_interrupt() - MSI interrupt handler
- * @vec: interrupt vector
- * @data: iSMT private data
- */
-static irqreturn_t ismt_do_msi_interrupt(int vec, void *data)
-{
-	return ismt_handle_isr(data);
-}
-
-/**
- * ismt_hw_init() - initialize the iSMT hardware
- * @priv: iSMT private data
- */
-static void ismt_hw_init(struct ismt_priv *priv)
-{
-	u32 val;
-	struct device *dev = &priv->pci_dev->dev;
-
-	/* initialize the Master Descriptor Base Address (MDBA) */
-	writeq(priv->io_rng_dma, priv->smba + ISMT_MSTR_MDBA);
-
-	writeq(priv->log_dma, priv->smba + ISMT_GR_SMTICL);
-
-	/* initialize the Master Control Register (MCTRL) */
-	writel(ISMT_MCTRL_MEIE, priv->smba + ISMT_MSTR_MCTRL);
-
-	/* initialize the Master Status Register (MSTS) */
-	writel(0, priv->smba + ISMT_MSTR_MSTS);
-
-	/* initialize the Master Descriptor Size (MDS) */
-	val = readl(priv->smba + ISMT_MSTR_MDS);
-	writel((val & ~ISMT_MDS_MASK) | (ISMT_DESC_ENTRIES - 1),
-		priv->smba + ISMT_MSTR_MDS);
-
-	/*
-	 * Set the SMBus speed (could use this for slow HW debuggers)
-	 */
-
-	val = readl(priv->smba + ISMT_SPGT);
-
-	switch (bus_speed) {
-	case 0:
-		break;
-
-	case 80:
-		dev_dbg(dev, "Setting SMBus clock to 80 kHz\n");
-		writel(((val & ~ISMT_SPGT_SPD_MASK) | ISMT_SPGT_SPD_80K),
-			priv->smba + ISMT_SPGT);
-		break;
-
-	case 100:
-		dev_dbg(dev, "Setting SMBus clock to 100 kHz\n");
-		writel(((val & ~ISMT_SPGT_SPD_MASK) | ISMT_SPGT_SPD_100K),
-			priv->smba + ISMT_SPGT);
-		break;
-
-	case 400:
-		dev_dbg(dev, "Setting SMBus clock to 400 kHz\n");
-		writel(((val & ~ISMT_SPGT_SPD_MASK) | ISMT_SPGT_SPD_400K),
-			priv->smba + ISMT_SPGT);
-		break;
-
-	case 1000:
-		dev_dbg(dev, "Setting SMBus clock to 1000 kHz\n");
-		writel(((val & ~ISMT_SPGT_SPD_MASK) | ISMT_SPGT_SPD_1M),
-			priv->smba + ISMT_SPGT);
-		break;
-
-	default:
-		dev_warn(dev, "Invalid SMBus clock speed, only 0, 80, 100, 400, and 1000 are valid\n");
-		break;
-	}
-
-	val = readl(priv->smba + ISMT_SPGT);
-
-	switch (val & ISMT_SPGT_SPD_MASK) {
-	case ISMT_SPGT_SPD_80K:
-		bus_speed = 80;
-		break;
-	case ISMT_SPGT_SPD_100K:
-		bus_speed = 100;
-		break;
-	case ISMT_SPGT_SPD_400K:
-		bus_speed = 400;
-		break;
-	case ISMT_SPGT_SPD_1M:
-		bus_speed = 1000;
-		break;
-	}
-	dev_dbg(dev, "SMBus clock is running at %d kHz\n", bus_speed);
-}
-
-/**
- * ismt_dev_init() - initialize the iSMT data structures
- * @priv: iSMT private data
- */
-static int ismt_dev_init(struct ismt_priv *priv)
-{
-	/* allocate memory for the descriptor */
-	priv->hw = dmam_alloc_coherent(&priv->pci_dev->dev,
-				       (ISMT_DESC_ENTRIES
-					       * sizeof(struct ismt_desc)),
-				       &priv->io_rng_dma,
-				       GFP_KERNEL);
-	if (!priv->hw)
-		return -ENOMEM;
-
-	priv->head = 0;
-	init_completion(&priv->cmp);
-
-	priv->log = dmam_alloc_coherent(&priv->pci_dev->dev,
-					ISMT_LOG_ENTRIES * sizeof(u32),
-					&priv->log_dma, GFP_KERNEL);
-	if (!priv->log)
-		return -ENOMEM;
-
-	return 0;
-}
-
-/**
- * ismt_int_init() - initialize interrupts
- * @priv: iSMT private data
- */
-static int ismt_int_init(struct ismt_priv *priv)
-{
-	int err;
-
-	/* Try using MSI interrupts */
-	err = pci_enable_msi(priv->pci_dev);
-	if (err)
-		goto intx;
-
-	err = devm_request_irq(&priv->pci_dev->dev,
-			       priv->pci_dev->irq,
-			       ismt_do_msi_interrupt,
-			       0,
-			       "ismt-msi",
-			       priv);
-	if (err) {
-		pci_disable_msi(priv->pci_dev);
-		goto intx;
-	}
-
-	return 0;
-
-	/* Try using legacy interrupts */
-intx:
-	dev_warn(&priv->pci_dev->dev,
-		 "Unable to use MSI interrupts, falling back to legacy\n");
-
-	err = devm_request_irq(&priv->pci_dev->dev,
-			       priv->pci_dev->irq,
-			       ismt_do_interrupt,
-			       IRQF_SHARED,
-			       "ismt-intx",
-			       priv);
-	if (err) {
-		dev_err(&priv->pci_dev->dev, "no usable interrupts\n");
-		return err;
-	}
-
-	return 0;
-}
-
-static struct pci_driver ismt_driver;
-
-/**
- * ismt_probe() - probe for iSMT devices
- * @pdev: PCI-Express device
- * @id: PCI-Express device ID
- */
-static int
-ismt_probe(struct pci_dev *pdev, const struct pci_device_id *id)
-{
-	int err;
-	struct ismt_priv *priv;
-	unsigned long start, len;
-
-	priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
-	if (!priv)
-		return -ENOMEM;
-
-	pci_set_drvdata(pdev, priv);
-
-	i2c_set_adapdata(&priv->adapter, priv);
-	priv->adapter.owner = THIS_MODULE;
-	priv->adapter.class = I2C_CLASS_HWMON;
-	priv->adapter.algo = &smbus_algorithm;
-	priv->adapter.dev.parent = &pdev->dev;
-	ACPI_COMPANION_SET(&priv->adapter.dev, ACPI_COMPANION(&pdev->dev));
-	priv->adapter.retries = ISMT_MAX_RETRIES;
-
-	priv->pci_dev = pdev;
-
-	err = pcim_enable_device(pdev);
-	if (err) {
-		dev_err(&pdev->dev, "Failed to enable SMBus PCI device (%d)\n",
-			err);
-		return err;
-	}
-
-	/* enable bus mastering */
-	pci_set_master(pdev);
-
-	/* Determine the address of the SMBus area */
-	start = pci_resource_start(pdev, SMBBAR);
-	len = pci_resource_len(pdev, SMBBAR);
-	if (!start || !len) {
-		dev_err(&pdev->dev,
-			"SMBus base address uninitialized, upgrade BIOS\n");
-		return -ENODEV;
-	}
-
-	snprintf(priv->adapter.name, sizeof(priv->adapter.name),
-		 "SMBus iSMT adapter at %lx", start);
-
-	dev_dbg(&priv->pci_dev->dev, " start=0x%lX\n", start);
-	dev_dbg(&priv->pci_dev->dev, " len=0x%lX\n", len);
-
-	err = acpi_check_resource_conflict(&pdev->resource[SMBBAR]);
-	if (err) {
-		dev_err(&pdev->dev, "ACPI resource conflict!\n");
-		return err;
-	}
-
-	err = pci_request_region(pdev, SMBBAR, ismt_driver.name);
-	if (err) {
-		dev_err(&pdev->dev,
-			"Failed to request SMBus region 0x%lx-0x%lx\n",
-			start, start + len);
-		return err;
-	}
-
-	priv->smba = pcim_iomap(pdev, SMBBAR, len);
-	if (!priv->smba) {
-		dev_err(&pdev->dev, "Unable to ioremap SMBus BAR\n");
-		return -ENODEV;
-	}
-
-	err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
-	if (err) {
-		dev_err(&pdev->dev, "dma_set_mask fail\n");
-		return -ENODEV;
-	}
-
-	err = ismt_dev_init(priv);
-	if (err)
-		return err;
-
-	ismt_hw_init(priv);
-
-	err = ismt_int_init(priv);
-	if (err)
-		return err;
-
-	err = i2c_add_adapter(&priv->adapter);
-	if (err)
-		return -ENODEV;
-    dev_info(&pdev->dev, "wb-i2c-ismt probe ok.\n");
-	return 0;
-}
-
-/**
- * ismt_remove() - release driver resources
- * @pdev: PCI-Express device
- */
-static void ismt_remove(struct pci_dev *pdev)
-{
-	struct ismt_priv *priv = pci_get_drvdata(pdev);
-
-	i2c_del_adapter(&priv->adapter);
-}
-
-static struct pci_driver ismt_driver = {
-	.name = "wb_ismt_smbus",
-	.id_table = ismt_ids,
-	.probe = ismt_probe,
-	.remove = ismt_remove,
-};
-
-module_pci_driver(ismt_driver);
-
-MODULE_LICENSE("Dual BSD/GPL");
-MODULE_AUTHOR("Bill E. Brown <bill.e.brown@intel.com>");
-MODULE_DESCRIPTION("Intel SMBus Message Transport (iSMT) driver");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_ina3221.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_ina3221.c
deleted file mode 100644
index 05b6da028..000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_ina3221.c
+++ /dev/null
@@ -1,1031 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * INA3221 Triple Current/Voltage Monitor
- *
- * Copyright (C) 2016 Texas Instruments Incorporated - https://www.ti.com/
- *    Andrew F. Davis <afd@ti.com>
- */
-
-#include <linux/hwmon.h>
-#include <linux/hwmon-sysfs.h>
-#include <linux/i2c.h>
-#include <linux/module.h>
-#include <linux/mutex.h>
-#include <linux/of.h>
-#include <linux/pm_runtime.h>
-#include <linux/regmap.h>
-#include <linux/util_macros.h>
-
-#define INA3221_DRIVER_NAME        "wb_ina3221"
-
-#define INA3221_CONFIG             0x00
-#define INA3221_SHUNT1             0x01
-#define INA3221_BUS1               0x02
-#define INA3221_SHUNT2             0x03
-#define INA3221_BUS2               0x04
-#define INA3221_SHUNT3             0x05
-#define INA3221_BUS3               0x06
-#define INA3221_CRIT1              0x07
-#define INA3221_WARN1              0x08
-#define INA3221_CRIT2              0x09
-#define INA3221_WARN2              0x0a
-#define INA3221_CRIT3              0x0b
-#define INA3221_WARN3              0x0c
-#define INA3221_SHUNT_SUM          0x0d
-#define INA3221_CRIT_SUM           0x0e
-#define INA3221_MASK_ENABLE        0x0f
-
-#define INA3221_CONFIG_MODE_MASK    GENMASK(2, 0)
-#define INA3221_CONFIG_MODE_POWERDOWN    0
-#define INA3221_CONFIG_MODE_SHUNT    BIT(0)
-#define INA3221_CONFIG_MODE_BUS        BIT(1)
-#define INA3221_CONFIG_MODE_CONTINUOUS    BIT(2)
-#define INA3221_CONFIG_VSH_CT_SHIFT    3
-#define INA3221_CONFIG_VSH_CT_MASK    GENMASK(5, 3)
-#define INA3221_CONFIG_VSH_CT(x)    (((x) & GENMASK(5, 3)) >> 3)
-#define INA3221_CONFIG_VBUS_CT_SHIFT    6
-#define INA3221_CONFIG_VBUS_CT_MASK    GENMASK(8, 6)
-#define INA3221_CONFIG_VBUS_CT(x)    (((x) & GENMASK(8, 6)) >> 6)
-#define INA3221_CONFIG_AVG_SHIFT    9
-#define INA3221_CONFIG_AVG_MASK        GENMASK(11, 9)
-#define INA3221_CONFIG_AVG(x)        (((x) & GENMASK(11, 9)) >> 9)
-#define INA3221_CONFIG_CHs_EN_MASK    GENMASK(14, 12)
-#define INA3221_CONFIG_CHx_EN(x)    BIT(14 - (x))
-
-#define INA3221_MASK_ENABLE_SCC_MASK    GENMASK(14, 12)
-
-#define INA3221_CONFIG_DEFAULT        0x7127
-#define INA3221_RSHUNT_DEFAULT        10000
-
-enum ina3221_fields {
-    /* Configuration */
-    F_RST,
-
-    /* Status Flags */
-    F_CVRF,
-
-    /* Warning Flags */
-    F_WF3, F_WF2, F_WF1,
-
-    /* Alert Flags: SF is the summation-alert flag */
-    F_SF, F_CF3, F_CF2, F_CF1,
-
-    /* sentinel */
-    F_MAX_FIELDS
-};
-
-static const struct reg_field ina3221_reg_fields[] = {
-    [F_RST] = REG_FIELD(INA3221_CONFIG, 15, 15),
-
-    [F_CVRF] = REG_FIELD(INA3221_MASK_ENABLE, 0, 0),
-    [F_WF3] = REG_FIELD(INA3221_MASK_ENABLE, 3, 3),
-    [F_WF2] = REG_FIELD(INA3221_MASK_ENABLE, 4, 4),
-    [F_WF1] = REG_FIELD(INA3221_MASK_ENABLE, 5, 5),
-    [F_SF] = REG_FIELD(INA3221_MASK_ENABLE, 6, 6),
-    [F_CF3] = REG_FIELD(INA3221_MASK_ENABLE, 7, 7),
-    [F_CF2] = REG_FIELD(INA3221_MASK_ENABLE, 8, 8),
-    [F_CF1] = REG_FIELD(INA3221_MASK_ENABLE, 9, 9),
-};
-
-enum ina3221_channels {
-    INA3221_CHANNEL1,
-    INA3221_CHANNEL2,
-    INA3221_CHANNEL3,
-    INA3221_NUM_CHANNELS
-};
-
-/**
- * struct ina3221_input - channel input source specific information
- * @label: label of channel input source
- * @shunt_resistor: shunt resistor value of channel input source
- * @disconnected: connection status of channel input source
- */
-struct ina3221_input {
-    const char *label;
-    int shunt_resistor;
-    bool disconnected;
-};
-
-/**
- * struct ina3221_data - device specific information
- * @pm_dev: Device pointer for pm runtime
- * @regmap: Register map of the device
- * @fields: Register fields of the device
- * @inputs: Array of channel input source specific structures
- * @lock: mutex lock to serialize sysfs attribute accesses
- * @reg_config: Register value of INA3221_CONFIG
- * @summation_shunt_resistor: equivalent shunt resistor value for summation
- * @single_shot: running in single-shot operating mode
- */
-struct ina3221_data {
-    struct device *pm_dev;
-    struct regmap *regmap;
-    struct regmap_field *fields[F_MAX_FIELDS];
-    struct ina3221_input inputs[INA3221_NUM_CHANNELS];
-    struct mutex lock;
-    u32 reg_config;
-    int summation_shunt_resistor;
-
-    bool single_shot;
-};
-
-static inline bool ina3221_is_enabled(struct ina3221_data *ina, int channel)
-{
-    /* Summation channel checks shunt resistor values */
-    if (channel > INA3221_CHANNEL3)
-        return ina->summation_shunt_resistor != 0;
-
-    return pm_runtime_active(ina->pm_dev) &&
-           (ina->reg_config & INA3221_CONFIG_CHx_EN(channel));
-}
-
-/**
- * Helper function to return the resistor value for current summation.
- *
- * There is a condition to calculate current summation -- all the shunt
- * resistor values should be the same, so as to simply fit the formula:
- *     current summation = shunt voltage summation / shunt resistor
- *
- * Returns the equivalent shunt resistor value on success or 0 on failure
- */
-static inline int ina3221_summation_shunt_resistor(struct ina3221_data *ina)
-{
-    struct ina3221_input *input = ina->inputs;
-    int i, shunt_resistor = 0;
-
-    for (i = 0; i < INA3221_NUM_CHANNELS; i++) {
-        if (input[i].disconnected || !input[i].shunt_resistor)
-            continue;
-        if (!shunt_resistor) {
-            /* Found the reference shunt resistor value */
-            shunt_resistor = input[i].shunt_resistor;
-        } else {
-            /* No summation if resistor values are different */
-            if (shunt_resistor != input[i].shunt_resistor)
-                return 0;
-        }
-    }
-
-    return shunt_resistor;
-}
-
-/* Lookup table for Bus and Shunt conversion times in usec */
-static const u16 ina3221_conv_time[] = {
-    140, 204, 332, 588, 1100, 2116, 4156, 8244,
-};
-
-/* Lookup table for number of samples using in averaging mode */
-static const int ina3221_avg_samples[] = {
-    1, 4, 16, 64, 128, 256, 512, 1024,
-};
-
-/* Converting update_interval in msec to conversion time in usec */
-static inline u32 ina3221_interval_ms_to_conv_time(u16 config, int interval)
-{
-    u32 channels = hweight16(config & INA3221_CONFIG_CHs_EN_MASK);
-    u32 samples_idx = INA3221_CONFIG_AVG(config);
-    u32 samples = ina3221_avg_samples[samples_idx];
-
-    /* Bisect the result to Bus and Shunt conversion times */
-    return DIV_ROUND_CLOSEST(interval * 1000 / 2, channels * samples);
-}
-
-/* Converting CONFIG register value to update_interval in usec */
-static inline u32 ina3221_reg_to_interval_us(u16 config)
-{
-    u32 channels = hweight16(config & INA3221_CONFIG_CHs_EN_MASK);
-    u32 vbus_ct_idx = INA3221_CONFIG_VBUS_CT(config);
-    u32 vsh_ct_idx = INA3221_CONFIG_VSH_CT(config);
-    u32 samples_idx = INA3221_CONFIG_AVG(config);
-    u32 samples = ina3221_avg_samples[samples_idx];
-    u32 vbus_ct = ina3221_conv_time[vbus_ct_idx];
-    u32 vsh_ct = ina3221_conv_time[vsh_ct_idx];
-
-    /* Calculate total conversion time */
-    return channels * (vbus_ct + vsh_ct) * samples;
-}
-
-static inline int ina3221_wait_for_data(struct ina3221_data *ina)
-{
-    u32 wait, cvrf;
-
-    wait = ina3221_reg_to_interval_us(ina->reg_config);
-
-    /* Polling the CVRF bit to make sure read data is ready */
-    return regmap_field_read_poll_timeout(ina->fields[F_CVRF],
-                          cvrf, cvrf, wait, wait * 2);
-}
-
-static int ina3221_read_value(struct ina3221_data *ina, unsigned int reg,
-                  int *val)
-{
-    unsigned int regval;
-    int ret;
-
-    ret = regmap_read(ina->regmap, reg, &regval);
-    if (ret)
-        return ret;
-
-    /*
-     * Shunt Voltage Sum register has 14-bit value with 1-bit shift
-     * Other Shunt Voltage registers have 12 bits with 3-bit shift
-     */
-    if (reg == INA3221_SHUNT_SUM)
-        *val = sign_extend32(regval >> 1, 14);
-    else
-        *val = sign_extend32(regval >> 3, 12);
-
-    return 0;
-}
-
-static const u8 ina3221_in_reg[] = {
-    INA3221_BUS1,
-    INA3221_BUS2,
-    INA3221_BUS3,
-    INA3221_SHUNT1,
-    INA3221_SHUNT2,
-    INA3221_SHUNT3,
-    INA3221_SHUNT_SUM,
-};
-
-static int ina3221_read_chip(struct device *dev, u32 attr, long *val)
-{
-    struct ina3221_data *ina = dev_get_drvdata(dev);
-    int regval;
-
-    switch (attr) {
-    case hwmon_chip_samples:
-        regval = INA3221_CONFIG_AVG(ina->reg_config);
-        *val = ina3221_avg_samples[regval];
-        return 0;
-    case hwmon_chip_update_interval:
-        /* Return in msec */
-        *val = ina3221_reg_to_interval_us(ina->reg_config);
-        *val = DIV_ROUND_CLOSEST(*val, 1000);
-        return 0;
-    default:
-        return -EOPNOTSUPP;
-    }
-}
-
-static int ina3221_read_in(struct device *dev, u32 attr, int channel, long *val)
-{
-    const bool is_shunt = channel > INA3221_CHANNEL3;
-    struct ina3221_data *ina = dev_get_drvdata(dev);
-    u8 reg = ina3221_in_reg[channel];
-    int regval, ret;
-
-    /*
-     * Translate shunt channel index to sensor channel index except
-     * the 7th channel (6 since being 0-aligned) is for summation.
-     */
-    if (channel != 6)
-        channel %= INA3221_NUM_CHANNELS;
-
-    switch (attr) {
-    case hwmon_in_input:
-        if (!ina3221_is_enabled(ina, channel))
-            return -ENODATA;
-
-        /* Write CONFIG register to trigger a single-shot measurement */
-        if (ina->single_shot)
-            regmap_write(ina->regmap, INA3221_CONFIG,
-                     ina->reg_config);
-
-        ret = ina3221_wait_for_data(ina);
-        if (ret)
-            return ret;
-
-        ret = ina3221_read_value(ina, reg, &regval);
-        if (ret)
-            return ret;
-
-        /*
-         * Scale of shunt voltage (uV): LSB is 40uV
-         * Scale of bus voltage (mV): LSB is 8mV
-         */
-        *val = regval * (is_shunt ? 40 : 8);
-        return 0;
-    case hwmon_in_enable:
-        *val = ina3221_is_enabled(ina, channel);
-        return 0;
-    default:
-        return -EOPNOTSUPP;
-    }
-}
-
-static const u8 ina3221_curr_reg[][INA3221_NUM_CHANNELS + 1] = {
-    [hwmon_curr_input] = { INA3221_SHUNT1, INA3221_SHUNT2,
-                   INA3221_SHUNT3, INA3221_SHUNT_SUM },
-    [hwmon_curr_max] = { INA3221_WARN1, INA3221_WARN2, INA3221_WARN3, 0 },
-    [hwmon_curr_crit] = { INA3221_CRIT1, INA3221_CRIT2,
-                  INA3221_CRIT3, INA3221_CRIT_SUM },
-    [hwmon_curr_max_alarm] = { F_WF1, F_WF2, F_WF3, 0 },
-    [hwmon_curr_crit_alarm] = { F_CF1, F_CF2, F_CF3, F_SF },
-};
-
-static int ina3221_read_curr(struct device *dev, u32 attr,
-                 int channel, long *val)
-{
-    struct ina3221_data *ina = dev_get_drvdata(dev);
-    struct ina3221_input *input = ina->inputs;
-    u8 reg = ina3221_curr_reg[attr][channel];
-    int resistance_uo, voltage_nv;
-    int regval, ret;
-
-    if (channel > INA3221_CHANNEL3)
-        resistance_uo = ina->summation_shunt_resistor;
-    else
-        resistance_uo = input[channel].shunt_resistor;
-
-    switch (attr) {
-    case hwmon_curr_input:
-        if (!ina3221_is_enabled(ina, channel))
-            return -ENODATA;
-
-        /* Write CONFIG register to trigger a single-shot measurement */
-        if (ina->single_shot)
-            regmap_write(ina->regmap, INA3221_CONFIG,
-                     ina->reg_config);
-
-        ret = ina3221_wait_for_data(ina);
-        if (ret)
-            return ret;
-
-        fallthrough;
-    case hwmon_curr_crit:
-    case hwmon_curr_max:
-        if (!resistance_uo)
-            return -ENODATA;
-
-        ret = ina3221_read_value(ina, reg, &regval);
-        if (ret)
-            return ret;
-
-        /* Scale of shunt voltage: LSB is 40uV (40000nV) */
-        voltage_nv = regval * 40000;
-        /* Return current in mA */
-        *val = DIV_ROUND_CLOSEST(voltage_nv, resistance_uo);
-        return 0;
-    case hwmon_curr_crit_alarm:
-    case hwmon_curr_max_alarm:
-        /* No actual register read if channel is disabled */
-        if (!ina3221_is_enabled(ina, channel)) {
-            /* Return 0 for alert flags */
-            *val = 0;
-            return 0;
-        }
-        ret = regmap_field_read(ina->fields[reg], &regval);
-        if (ret)
-            return ret;
-        *val = regval;
-        return 0;
-    default:
-        return -EOPNOTSUPP;
-    }
-}
-
-static int ina3221_write_chip(struct device *dev, u32 attr, long val)
-{
-    struct ina3221_data *ina = dev_get_drvdata(dev);
-    int ret, idx;
-    u32 tmp;
-
-    switch (attr) {
-    case hwmon_chip_samples:
-        idx = find_closest(val, ina3221_avg_samples,
-                   ARRAY_SIZE(ina3221_avg_samples));
-
-        tmp = (ina->reg_config & ~INA3221_CONFIG_AVG_MASK) |
-              (idx << INA3221_CONFIG_AVG_SHIFT);
-        ret = regmap_write(ina->regmap, INA3221_CONFIG, tmp);
-        if (ret)
-            return ret;
-
-        /* Update reg_config accordingly */
-        ina->reg_config = tmp;
-        return 0;
-    case hwmon_chip_update_interval:
-        tmp = ina3221_interval_ms_to_conv_time(ina->reg_config, val);
-        idx = find_closest(tmp, ina3221_conv_time,
-                   ARRAY_SIZE(ina3221_conv_time));
-
-        /* Update Bus and Shunt voltage conversion times */
-        tmp = INA3221_CONFIG_VBUS_CT_MASK | INA3221_CONFIG_VSH_CT_MASK;
-        tmp = (ina->reg_config & ~tmp) |
-              (idx << INA3221_CONFIG_VBUS_CT_SHIFT) |
-              (idx << INA3221_CONFIG_VSH_CT_SHIFT);
-        ret = regmap_write(ina->regmap, INA3221_CONFIG, tmp);
-        if (ret)
-            return ret;
-
-        /* Update reg_config accordingly */
-        ina->reg_config = tmp;
-        return 0;
-    default:
-        return -EOPNOTSUPP;
-    }
-}
-
-static int ina3221_write_curr(struct device *dev, u32 attr,
-                  int channel, long val)
-{
-    struct ina3221_data *ina = dev_get_drvdata(dev);
-    struct ina3221_input *input = ina->inputs;
-    u8 reg = ina3221_curr_reg[attr][channel];
-    int resistance_uo, current_ma, voltage_uv;
-    int regval;
-
-    if (channel > INA3221_CHANNEL3)
-        resistance_uo = ina->summation_shunt_resistor;
-    else
-        resistance_uo = input[channel].shunt_resistor;
-
-    if (!resistance_uo)
-        return -EOPNOTSUPP;
-
-    /* clamp current */
-    current_ma = clamp_val(val,
-                   INT_MIN / resistance_uo,
-                   INT_MAX / resistance_uo);
-
-    voltage_uv = DIV_ROUND_CLOSEST(current_ma * resistance_uo, 1000);
-
-    /* clamp voltage */
-    voltage_uv = clamp_val(voltage_uv, -163800, 163800);
-
-    /*
-     * Formula to convert voltage_uv to register value:
-     *     regval = (voltage_uv / scale) << shift
-     * Note:
-     *     The scale is 40uV for all shunt voltage registers
-     *     Shunt Voltage Sum register left-shifts 1 bit
-     *     All other Shunt Voltage registers shift 3 bits
-     * Results:
-     *     SHUNT_SUM: (1 / 40uV) << 1 = 1 / 20uV
-     *     SHUNT[1-3]: (1 / 40uV) << 3 = 1 / 5uV
-     */
-    if (reg == INA3221_SHUNT_SUM)
-        regval = DIV_ROUND_CLOSEST(voltage_uv, 20) & 0xfffe;
-    else
-        regval = DIV_ROUND_CLOSEST(voltage_uv, 5) & 0xfff8;
-
-    return regmap_write(ina->regmap, reg, regval);
-}
-
-static int ina3221_write_enable(struct device *dev, int channel, bool enable)
-{
-    struct ina3221_data *ina = dev_get_drvdata(dev);
-    u16 config, mask = INA3221_CONFIG_CHx_EN(channel);
-    u16 config_old = ina->reg_config & mask;
-    u32 tmp;
-    int ret;
-
-    config = enable ? mask : 0;
-
-    /* Bypass if enable status is not being changed */
-    if (config_old == config)
-        return 0;
-
-    /* For enabling routine, increase refcount and resume() at first */
-    if (enable) {
-        ret = pm_runtime_resume_and_get(ina->pm_dev);
-        if (ret < 0) {
-            dev_err(dev, "Failed to get PM runtime\n");
-            return ret;
-        }
-    }
-
-    /* Enable or disable the channel */
-    tmp = (ina->reg_config & ~mask) | (config & mask);
-    ret = regmap_write(ina->regmap, INA3221_CONFIG, tmp);
-    if (ret)
-        goto fail;
-
-    /* Cache the latest config register value */
-    ina->reg_config = tmp;
-
-    /* For disabling routine, decrease refcount or suspend() at last */
-    if (!enable)
-        pm_runtime_put_sync(ina->pm_dev);
-
-    return 0;
-
-fail:
-    if (enable) {
-        dev_err(dev, "Failed to enable channel %d: error %d\n",
-            channel, ret);
-        pm_runtime_put_sync(ina->pm_dev);
-    }
-
-    return ret;
-}
-
-static int ina3221_read(struct device *dev, enum hwmon_sensor_types type,
-            u32 attr, int channel, long *val)
-{
-    struct ina3221_data *ina = dev_get_drvdata(dev);
-    int ret;
-
-    mutex_lock(&ina->lock);
-
-    switch (type) {
-    case hwmon_chip:
-        ret = ina3221_read_chip(dev, attr, val);
-        break;
-    case hwmon_in:
-        /* 0-align channel ID */
-        ret = ina3221_read_in(dev, attr, channel - 1, val);
-        break;
-    case hwmon_curr:
-        ret = ina3221_read_curr(dev, attr, channel, val);
-        break;
-    default:
-        ret = -EOPNOTSUPP;
-        break;
-    }
-
-    mutex_unlock(&ina->lock);
-
-    return ret;
-}
-
-static int ina3221_write(struct device *dev, enum hwmon_sensor_types type,
-             u32 attr, int channel, long val)
-{
-    struct ina3221_data *ina = dev_get_drvdata(dev);
-    int ret;
-
-    mutex_lock(&ina->lock);
-
-    switch (type) {
-    case hwmon_chip:
-        ret = ina3221_write_chip(dev, attr, val);
-        break;
-    case hwmon_in:
-        /* 0-align channel ID */
-        ret = ina3221_write_enable(dev, channel - 1, val);
-        break;
-    case hwmon_curr:
-        ret = ina3221_write_curr(dev, attr, channel, val);
-        break;
-    default:
-        ret = -EOPNOTSUPP;
-        break;
-    }
-
-    mutex_unlock(&ina->lock);
-
-    return ret;
-}
-
-static int ina3221_read_string(struct device *dev, enum hwmon_sensor_types type,
-                   u32 attr, int channel, const char **str)
-{
-    struct ina3221_data *ina = dev_get_drvdata(dev);
-    int index = channel - 1;
-
-    if (channel == 7)
-        *str = "sum of shunt voltages";
-    else
-        *str = ina->inputs[index].label;
-
-    return 0;
-}
-
-static umode_t ina3221_is_visible(const void *drvdata,
-                  enum hwmon_sensor_types type,
-                  u32 attr, int channel)
-{
-    const struct ina3221_data *ina = drvdata;
-    const struct ina3221_input *input = NULL;
-
-    switch (type) {
-    case hwmon_chip:
-        switch (attr) {
-        case hwmon_chip_samples:
-        case hwmon_chip_update_interval:
-            return 0644;
-        default:
-            return 0;
-        }
-    case hwmon_in:
-        /* Ignore in0_ */
-        if (channel == 0)
-            return 0;
-
-        switch (attr) {
-        case hwmon_in_label:
-            if (channel - 1 <= INA3221_CHANNEL3)
-                input = &ina->inputs[channel - 1];
-            else if (channel == 7)
-                return 0444;
-            /* Hide label node if label is not provided */
-            return (input && input->label) ? 0444 : 0;
-        case hwmon_in_input:
-            return 0444;
-        case hwmon_in_enable:
-            return 0644;
-        default:
-            return 0;
-        }
-    case hwmon_curr:
-        switch (attr) {
-        case hwmon_curr_input:
-        case hwmon_curr_crit_alarm:
-        case hwmon_curr_max_alarm:
-            return 0444;
-        case hwmon_curr_crit:
-        case hwmon_curr_max:
-            return 0644;
-        default:
-            return 0;
-        }
-    default:
-        return 0;
-    }
-}
-
-#define INA3221_HWMON_CURR_CONFIG (HWMON_C_INPUT | \
-                   HWMON_C_CRIT | HWMON_C_CRIT_ALARM | \
-                   HWMON_C_MAX | HWMON_C_MAX_ALARM)
-
-static const struct hwmon_channel_info *ina3221_info[] = {
-    HWMON_CHANNEL_INFO(chip,
-               HWMON_C_SAMPLES,
-               HWMON_C_UPDATE_INTERVAL),
-    HWMON_CHANNEL_INFO(in,
-               /* 0: dummy, skipped in is_visible */
-               HWMON_I_INPUT,
-               /* 1-3: input voltage Channels */
-               HWMON_I_INPUT | HWMON_I_ENABLE | HWMON_I_LABEL,
-               HWMON_I_INPUT | HWMON_I_ENABLE | HWMON_I_LABEL,
-               HWMON_I_INPUT | HWMON_I_ENABLE | HWMON_I_LABEL,
-               /* 4-6: shunt voltage Channels */
-               HWMON_I_INPUT,
-               HWMON_I_INPUT,
-               HWMON_I_INPUT,
-               /* 7: summation of shunt voltage channels */
-               HWMON_I_INPUT | HWMON_I_LABEL),
-    HWMON_CHANNEL_INFO(curr,
-               /* 1-3: current channels*/
-               INA3221_HWMON_CURR_CONFIG,
-               INA3221_HWMON_CURR_CONFIG,
-               INA3221_HWMON_CURR_CONFIG,
-               /* 4: summation of current channels */
-               HWMON_C_INPUT | HWMON_C_CRIT | HWMON_C_CRIT_ALARM),
-    NULL
-};
-
-static const struct hwmon_ops ina3221_hwmon_ops = {
-    .is_visible = ina3221_is_visible,
-    .read_string = ina3221_read_string,
-    .read = ina3221_read,
-    .write = ina3221_write,
-};
-
-static const struct hwmon_chip_info ina3221_chip_info = {
-    .ops = &ina3221_hwmon_ops,
-    .info = ina3221_info,
-};
-
-/* Extra attribute groups */
-static ssize_t ina3221_shunt_show(struct device *dev,
-                  struct device_attribute *attr, char *buf)
-{
-    struct sensor_device_attribute *sd_attr = to_sensor_dev_attr(attr);
-    struct ina3221_data *ina = dev_get_drvdata(dev);
-    unsigned int channel = sd_attr->index;
-    struct ina3221_input *input = &ina->inputs[channel];
-
-    return snprintf(buf, PAGE_SIZE, "%d\n", input->shunt_resistor);
-}
-
-static ssize_t ina3221_shunt_store(struct device *dev,
-                   struct device_attribute *attr,
-                   const char *buf, size_t count)
-{
-    struct sensor_device_attribute *sd_attr = to_sensor_dev_attr(attr);
-    struct ina3221_data *ina = dev_get_drvdata(dev);
-    unsigned int channel = sd_attr->index;
-    struct ina3221_input *input = &ina->inputs[channel];
-    int val;
-    int ret;
-
-    ret = kstrtoint(buf, 0, &val);
-    if (ret)
-        return ret;
-
-    val = clamp_val(val, 1, INT_MAX);
-
-    input->shunt_resistor = val;
-
-    /* Update summation_shunt_resistor for summation channel */
-    ina->summation_shunt_resistor = ina3221_summation_shunt_resistor(ina);
-
-    return count;
-}
-
-/* shunt resistance */
-static SENSOR_DEVICE_ATTR_RW(shunt1_resistor, ina3221_shunt, INA3221_CHANNEL1);
-static SENSOR_DEVICE_ATTR_RW(shunt2_resistor, ina3221_shunt, INA3221_CHANNEL2);
-static SENSOR_DEVICE_ATTR_RW(shunt3_resistor, ina3221_shunt, INA3221_CHANNEL3);
-
-static struct attribute *ina3221_attrs[] = {
-    &sensor_dev_attr_shunt1_resistor.dev_attr.attr,
-    &sensor_dev_attr_shunt2_resistor.dev_attr.attr,
-    &sensor_dev_attr_shunt3_resistor.dev_attr.attr,
-    NULL,
-};
-ATTRIBUTE_GROUPS(ina3221);
-
-static const struct regmap_range ina3221_yes_ranges[] = {
-    regmap_reg_range(INA3221_CONFIG, INA3221_BUS3),
-    regmap_reg_range(INA3221_SHUNT_SUM, INA3221_SHUNT_SUM),
-    regmap_reg_range(INA3221_MASK_ENABLE, INA3221_MASK_ENABLE),
-};
-
-static const struct regmap_access_table ina3221_volatile_table = {
-    .yes_ranges = ina3221_yes_ranges,
-    .n_yes_ranges = ARRAY_SIZE(ina3221_yes_ranges),
-};
-
-static const struct regmap_config ina3221_regmap_config = {
-    .reg_bits = 8,
-    .val_bits = 16,
-
-    .cache_type = REGCACHE_RBTREE,
-    .volatile_table = &ina3221_volatile_table,
-};
-
-static int ina3221_probe_child_from_dt(struct device *dev,
-                       struct device_node *child,
-                       struct ina3221_data *ina)
-{
-    struct ina3221_input *input;
-    u32 val;
-    int ret;
-
-    ret = of_property_read_u32(child, "reg", &val);
-    if (ret) {
-        dev_err(dev, "missing reg property of %pOFn\n", child);
-        return ret;
-    } else if (val > INA3221_CHANNEL3) {
-        dev_err(dev, "invalid reg %d of %pOFn\n", val, child);
-        return ret;
-    }
-
-    input = &ina->inputs[val];
-
-    /* Log the disconnected channel input */
-    if (!of_device_is_available(child)) {
-        input->disconnected = true;
-        return 0;
-    }
-
-    /* Save the connected input label if available */
-    of_property_read_string(child, "label", &input->label);
-
-    /* Overwrite default shunt resistor value optionally */
-    if (!of_property_read_u32(child, "shunt-resistor-micro-ohms", &val)) {
-        if (val < 1 || val > INT_MAX) {
-            dev_err(dev, "invalid shunt resistor value %u of %pOFn\n",
-                val, child);
-            return -EINVAL;
-        }
-        input->shunt_resistor = val;
-    }
-
-    return 0;
-}
-
-static int ina3221_probe_from_dt(struct device *dev, struct ina3221_data *ina)
-{
-    const struct device_node *np = dev->of_node;
-    struct device_node *child;
-    int ret;
-
-    /* Compatible with non-DT platforms */
-    if (!np)
-        return 0;
-
-    ina->single_shot = of_property_read_bool(np, "ti,single-shot");
-
-    for_each_child_of_node(np, child) {
-        ret = ina3221_probe_child_from_dt(dev, child, ina);
-        if (ret) {
-            of_node_put(child);
-            return ret;
-        }
-    }
-
-    return 0;
-}
-
-static int ina3221_probe(struct i2c_client *client)
-{
-    struct device *dev = &client->dev;
-    struct ina3221_data *ina;
-    struct device *hwmon_dev;
-    int i, ret;
-
-    ina = devm_kzalloc(dev, sizeof(*ina), GFP_KERNEL);
-    if (!ina)
-        return -ENOMEM;
-
-    ina->regmap = devm_regmap_init_i2c(client, &ina3221_regmap_config);
-    if (IS_ERR(ina->regmap)) {
-        dev_err(dev, "Unable to allocate register map\n");
-        return PTR_ERR(ina->regmap);
-    }
-
-    for (i = 0; i < F_MAX_FIELDS; i++) {
-        ina->fields[i] = devm_regmap_field_alloc(dev,
-                             ina->regmap,
-                             ina3221_reg_fields[i]);
-        if (IS_ERR(ina->fields[i])) {
-            dev_err(dev, "Unable to allocate regmap fields\n");
-            return PTR_ERR(ina->fields[i]);
-        }
-    }
-
-    for (i = 0; i < INA3221_NUM_CHANNELS; i++)
-        ina->inputs[i].shunt_resistor = INA3221_RSHUNT_DEFAULT;
-
-    ret = ina3221_probe_from_dt(dev, ina);
-    if (ret) {
-        dev_err(dev, "Unable to probe from device tree\n");
-        return ret;
-    }
-
-    /* The driver will be reset, so use reset value */
-    ina->reg_config = INA3221_CONFIG_DEFAULT;
-
-    /* Clear continuous bit to use single-shot mode */
-    if (ina->single_shot)
-        ina->reg_config &= ~INA3221_CONFIG_MODE_CONTINUOUS;
-
-    /* Disable channels if their inputs are disconnected */
-    for (i = 0; i < INA3221_NUM_CHANNELS; i++) {
-        if (ina->inputs[i].disconnected)
-            ina->reg_config &= ~INA3221_CONFIG_CHx_EN(i);
-    }
-
-    /* Initialize summation_shunt_resistor for summation channel control */
-    ina->summation_shunt_resistor = ina3221_summation_shunt_resistor(ina);
-
-    ina->pm_dev = dev;
-    mutex_init(&ina->lock);
-    dev_set_drvdata(dev, ina);
-
-    /* Enable PM runtime -- status is suspended by default */
-    pm_runtime_enable(ina->pm_dev);
-
-    /* Initialize (resume) the device */
-    for (i = 0; i < INA3221_NUM_CHANNELS; i++) {
-        if (ina->inputs[i].disconnected)
-            continue;
-        /* Match the refcount with number of enabled channels */
-        ret = pm_runtime_get_sync(ina->pm_dev);
-        if (ret < 0)
-            goto fail;
-    }
-
-    hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name, ina,
-                             &ina3221_chip_info,
-                             ina3221_groups);
-    if (IS_ERR(hwmon_dev)) {
-        dev_err(dev, "Unable to register hwmon device\n");
-        ret = PTR_ERR(hwmon_dev);
-        goto fail;
-    }
-
-    return 0;
-
-fail:
-    pm_runtime_disable(ina->pm_dev);
-    pm_runtime_set_suspended(ina->pm_dev);
-    /* pm_runtime_put_noidle() will decrease the PM refcount until 0 */
-    for (i = 0; i < INA3221_NUM_CHANNELS; i++)
-        pm_runtime_put_noidle(ina->pm_dev);
-    mutex_destroy(&ina->lock);
-
-    return ret;
-}
-
-static void ina3221_remove(struct i2c_client *client)
-{
-    struct ina3221_data *ina = dev_get_drvdata(&client->dev);
-    int i;
-
-    pm_runtime_disable(ina->pm_dev);
-    pm_runtime_set_suspended(ina->pm_dev);
-
-    /* pm_runtime_put_noidle() will decrease the PM refcount until 0 */
-    for (i = 0; i < INA3221_NUM_CHANNELS; i++)
-        pm_runtime_put_noidle(ina->pm_dev);
-
-    mutex_destroy(&ina->lock);
-
-    return;
-}
-
-static int __maybe_unused ina3221_suspend(struct device *dev)
-{
-    struct ina3221_data *ina = dev_get_drvdata(dev);
-    int ret;
-
-    /* Save config register value and enable cache-only */
-    ret = regmap_read(ina->regmap, INA3221_CONFIG, &ina->reg_config);
-    if (ret)
-        return ret;
-
-    /* Set to power-down mode for power saving */
-    ret = regmap_update_bits(ina->regmap, INA3221_CONFIG,
-                 INA3221_CONFIG_MODE_MASK,
-                 INA3221_CONFIG_MODE_POWERDOWN);
-    if (ret)
-        return ret;
-
-    regcache_cache_only(ina->regmap, true);
-    regcache_mark_dirty(ina->regmap);
-
-    return 0;
-}
-
-static int __maybe_unused ina3221_resume(struct device *dev)
-{
-    struct ina3221_data *ina = dev_get_drvdata(dev);
-    int ret;
-
-    regcache_cache_only(ina->regmap, false);
-
-    /* Software reset the chip */
-    ret = regmap_field_write(ina->fields[F_RST], true);
-    if (ret) {
-        dev_err(dev, "Unable to reset device\n");
-        return ret;
-    }
-
-    /* Restore cached register values to hardware */
-    ret = regcache_sync(ina->regmap);
-    if (ret)
-        return ret;
-
-    /* Restore config register value to hardware */
-    ret = regmap_write(ina->regmap, INA3221_CONFIG, ina->reg_config);
-    if (ret)
-        return ret;
-
-    /* Initialize summation channel control */
-    if (ina->summation_shunt_resistor) {
-        /*
-         * Take all three channels into summation by default
-         * Shunt measurements of disconnected channels should
-         * be 0, so it does not matter for summation.
-         */
-        ret = regmap_update_bits(ina->regmap, INA3221_MASK_ENABLE,
-                     INA3221_MASK_ENABLE_SCC_MASK,
-                     INA3221_MASK_ENABLE_SCC_MASK);
-        if (ret) {
-            dev_err(dev, "Unable to control summation channel\n");
-            return ret;
-        }
-    }
-
-    return 0;
-}
-
-static const struct dev_pm_ops ina3221_pm = {
-    SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
-                pm_runtime_force_resume)
-    SET_RUNTIME_PM_OPS(ina3221_suspend, ina3221_resume, NULL)
-};
-
-static const struct of_device_id ina3221_of_match_table[] = {
-    { .compatible = "ti,wb_ina3221", },
-    { /* sentinel */ }
-};
-MODULE_DEVICE_TABLE(of, ina3221_of_match_table);
-
-static const struct i2c_device_id ina3221_ids[] = {
-    { "wb_ina3221", 0 },
-    { /* sentinel */ }
-};
-MODULE_DEVICE_TABLE(i2c, ina3221_ids);
-
-static struct i2c_driver ina3221_i2c_driver = {
-    .probe_new = ina3221_probe,
-    .remove = ina3221_remove,
-    .driver = {
-        .name = INA3221_DRIVER_NAME,
-        .of_match_table = ina3221_of_match_table,
-        .pm = &ina3221_pm,
-    },
-    .id_table = ina3221_ids,
-};
-module_i2c_driver(ina3221_i2c_driver);
-
-MODULE_AUTHOR("support");
-MODULE_DESCRIPTION("Texas Instruments INA3221 HWMon Driver");
-MODULE_LICENSE("GPL v2");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_isl68137.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_isl68137.c
deleted file mode 100644
index 648020435..000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_isl68137.c
+++ /dev/null
@@ -1,577 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Hardware monitoring driver for Renesas Digital Multiphase Voltage Regulators
- *
- * Copyright (c) 2017 Google Inc
- * Copyright (c) 2020 Renesas Electronics America
- *
- */
-
-#include <linux/err.h>
-#include <linux/hwmon-sysfs.h>
-#include <linux/i2c.h>
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <linux/string.h>
-#include <linux/sysfs.h>
-
-#include "wb_pmbus.h"
-
-#define ISL68137_VOUT_AVS       (0x30)
-#define RAA_DMPVR2_READ_VMON    (0xc8)
-#define WRITE_PROTECT_CLOSE     (0x00)
-#define WRITE_PROTECT_OPEN      (0x40)
-
-static int g_wb_isl68137_debug = 0;
-static int g_wb_isl68137_error = 0;
-
-module_param(g_wb_isl68137_debug, int, S_IRUGO | S_IWUSR);
-module_param(g_wb_isl68137_error, int, S_IRUGO | S_IWUSR);
-
-#define WB_ISL68137_VERBOSE(fmt, args...) do {                                        \
-    if (g_wb_isl68137_debug) { \
-        printk(KERN_INFO "[WB_ISL68137][VER][func:%s line:%d]\n"fmt, __func__, __LINE__, ## args); \
-    } \
-} while (0)
-
-#define WB_ISL68137_ERROR(fmt, args...) do {                                        \
-    if (g_wb_isl68137_error) { \
-        printk(KERN_ERR "[WB_ISL68137][ERR][func:%s line:%d]\n"fmt, __func__, __LINE__, ## args); \
-    } \
-} while (0)
-
-enum chips {
-    isl68137,
-    isl68220,
-    isl68221,
-    isl68222,
-    isl68223,
-    isl68224,
-    isl68225,
-    isl68226,
-    isl68227,
-    isl68229,
-    isl68233,
-    isl68239,
-    isl69222,
-    isl69223,
-    isl69224,
-    isl69225,
-    isl69227,
-    isl69228,
-    isl69234,
-    isl69236,
-    isl69239,
-    isl69242,
-    isl69243,
-    isl69247,
-    isl69248,
-    isl69254,
-    isl69255,
-    isl69256,
-    isl69259,
-    isl69260,
-    isl69268,
-    isl69269,
-    isl69298,
-    raa228000,
-    raa228004,
-    raa228006,
-    raa228228,
-    raa229001,
-    raa229004,
-};
-
-enum variants {
-    raa_dmpvr1_2rail,
-    raa_dmpvr2_1rail,
-    raa_dmpvr2_2rail,
-    raa_dmpvr2_2rail_nontc,
-    raa_dmpvr2_3rail,
-    raa_dmpvr2_hv,
-};
-
-static const struct i2c_device_id raa_dmpvr_id[];
-
-static ssize_t isl68137_avs_enable_show_page(struct i2c_client *client,
-                         int page,
-                         char *buf)
-{
-    int val = wb_pmbus_read_byte_data(client, page, PMBUS_OPERATION);
-
-    return sprintf(buf, "%d\n",
-               (val & ISL68137_VOUT_AVS) == ISL68137_VOUT_AVS ? 1 : 0);
-}
-
-static ssize_t isl68137_avs_enable_store_page(struct i2c_client *client,
-                          int page,
-                          const char *buf, size_t count)
-{
-    int rc, op_val;
-    bool result;
-
-    rc = kstrtobool(buf, &result);
-    if (rc)
-        return rc;
-
-    op_val = result ? ISL68137_VOUT_AVS : 0;
-
-    /*
-     * Writes to VOUT setpoint over AVSBus will persist after the VRM is
-     * switched to PMBus control. Switching back to AVSBus control
-     * restores this persisted setpoint rather than re-initializing to
-     * PMBus VOUT_COMMAND. Writing VOUT_COMMAND first over PMBus before
-     * enabling AVS control is the workaround.
-     */
-    if (op_val == ISL68137_VOUT_AVS) {
-        rc = wb_pmbus_read_word_data(client, page, 0xff,
-                      PMBUS_VOUT_COMMAND);
-        if (rc < 0)
-            return rc;
-
-        rc = wb_pmbus_write_word_data(client, page, PMBUS_VOUT_COMMAND,
-                       rc);
-        if (rc < 0)
-            return rc;
-    }
-
-    rc = wb_pmbus_update_byte_data(client, page, PMBUS_OPERATION,
-                    ISL68137_VOUT_AVS, op_val);
-
-    return (rc < 0) ? rc : count;
-}
-
-static ssize_t isl68137_avs_enable_show(struct device *dev,
-                    struct device_attribute *devattr,
-                    char *buf)
-{
-    struct i2c_client *client = to_i2c_client(dev->parent);
-    struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
-
-    return isl68137_avs_enable_show_page(client, attr->index, buf);
-}
-
-static ssize_t isl68137_avs_enable_store(struct device *dev,
-                struct device_attribute *devattr,
-                const char *buf, size_t count)
-{
-    struct i2c_client *client = to_i2c_client(dev->parent);
-    struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
-
-    return isl68137_avs_enable_store_page(client, attr->index, buf, count);
-}
-
-static ssize_t isl68137_avs_vout_show(struct device *dev, struct device_attribute *devattr,
-                   char *buf)
-{
-    struct i2c_client *client = to_i2c_client(dev->parent);
-    struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
-    struct pmbus_data *data = i2c_get_clientdata(client);
-    int vout_cmd, vout;
-
-    mutex_lock(&data->update_lock);
-    vout_cmd = wb_pmbus_read_word_data(client, attr->index, 0xff, PMBUS_VOUT_COMMAND);
-    if (vout_cmd < 0) {
-        WB_ISL68137_ERROR("%d-%04x: read page%d vout command reg: 0x%x failed, ret: %d\n",
-            client->adapter->nr, client->addr, attr->index, PMBUS_VOUT_COMMAND, vout_cmd);
-        mutex_unlock(&data->update_lock);
-        return vout_cmd;
-    }
-    vout = vout_cmd * 1000;
-    WB_ISL68137_VERBOSE("%d-%04x: page%d, vout: %d, vout_cmd: 0x%x\n", client->adapter->nr,
-        client->addr, attr->index, vout, vout_cmd);
-    mutex_unlock(&data->update_lock);
-    return snprintf(buf, PAGE_SIZE, "%d\n", vout);
-}
-
-static ssize_t isl68137_avs_vout_store(struct device *dev, struct device_attribute *devattr,
-                   const char *buf, size_t count)
-{
-    struct i2c_client *client = to_i2c_client(dev->parent);
-    struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
-    struct pmbus_data *data = i2c_get_clientdata(client);
-    int vout, vout_max, vout_min;
-    int ret, vout_cmd, vout_cmd_set;
-
-    if ((attr->index < 0) || (attr->index >= PMBUS_PAGES)) {
-        WB_ISL68137_ERROR("%d-%04x: invalid index: %d \n", client->adapter->nr, client->addr,
-            attr->index);
-        return -EINVAL;
-    }
-
-    ret = kstrtoint(buf, 0, &vout);
-    if (ret) {
-        WB_ISL68137_ERROR("%d-%04x: invalid value: %s \n", client->adapter->nr, client->addr, buf);
-        return -EINVAL;
-    }
-
-    if (vout <= 0) {
-        WB_ISL68137_ERROR("%d-%04x: invalid value: %d \n", client->adapter->nr, client->addr, vout);
-        return -EINVAL;
-    }
-
-    vout_max = data->vout_max[attr->index];
-    vout_min = data->vout_min[attr->index];
-    if ((vout > vout_max) || (vout < vout_min)) {
-        WB_ISL68137_ERROR("%d-%04x: vout value: %d, out of range [%d, %d] \n", client->adapter->nr,
-            client->addr, vout, vout_min, vout_max);
-        return -EINVAL;
-    }
-
-    /* calc VOUT_COMMAND set value */
-    vout_cmd_set = vout / 1000;
-    if (vout_cmd_set > 0xffff) {
-        WB_ISL68137_ERROR("%d-%04x: invalid value, vout %d, vout_cmd_set: 0x%x\n",
-            client->adapter->nr, client->addr, vout, vout_cmd_set);
-        return -EINVAL;
-    }
-
-    mutex_lock(&data->update_lock);
-
-    /* close write protect */
-    ret = wb_pmbus_write_byte_data(client, attr->index, PMBUS_WRITE_PROTECT, WRITE_PROTECT_CLOSE);
-    if (ret < 0) {
-        WB_ISL68137_ERROR("%d-%04x: close page%d write protect failed, ret: %d\n", client->adapter->nr,
-            client->addr, attr->index, ret);
-        mutex_unlock(&data->update_lock);
-        return ret;
-    }
-
-    /* set VOUT_COMMAND */
-    ret = wb_pmbus_write_word_data(client, attr->index, PMBUS_VOUT_COMMAND, vout_cmd_set);
-    if (ret < 0) {
-        WB_ISL68137_ERROR("%d-%04x: set page%d vout cmd reg: 0x%x, value: 0x%x failed, ret: %d\n",
-            client->adapter->nr, client->addr, attr->index, PMBUS_VOUT_COMMAND, vout_cmd_set, ret);
-        goto error;
-    }
-
-    /* read back VOUT_COMMAND */
-    vout_cmd = wb_pmbus_read_word_data(client, attr->index, 0xff, PMBUS_VOUT_COMMAND);
-    if (vout_cmd < 0) {
-        ret = vout_cmd;
-        WB_ISL68137_ERROR("%d-%04x: read page%d vout command reg: 0x%x failed, ret: %d\n",
-            client->adapter->nr, client->addr, attr->index, PMBUS_VOUT_COMMAND, ret);
-        goto error;
-    }
-
-    /* compare vout_cmd and vout_cmd_set */
-    if (vout_cmd != vout_cmd_set) {
-        ret = -EIO;
-        WB_ISL68137_ERROR("%d-%04x: vout cmd value check error, vout cmd read: 0x%x, vout cmd set: 0x%x\n",
-            client->adapter->nr, client->addr, vout_cmd, vout_cmd_set);
-        goto error;
-    }
-
-    /* open write protect */
-    wb_pmbus_write_byte_data(client, attr->index, PMBUS_WRITE_PROTECT, WRITE_PROTECT_OPEN);
-    mutex_unlock(&data->update_lock);
-    WB_ISL68137_VERBOSE("%d-%04x: set page%d vout cmd success, vout %d, vout_cmd_set: 0x%x\n",
-        client->adapter->nr, client->addr, attr->index, vout, vout_cmd_set);
-    return count;
-error:
-    wb_pmbus_write_byte_data(client, attr->index, PMBUS_WRITE_PROTECT, WRITE_PROTECT_OPEN);
-    mutex_unlock(&data->update_lock);
-    return ret;
-}
-
-static ssize_t isl68137_avs_vout_max_store(struct device *dev,
-                   struct device_attribute *devattr, const char *buf, size_t count)
-{
-    struct i2c_client *client = to_i2c_client(dev->parent);
-    struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
-    struct pmbus_data *data = i2c_get_clientdata(client);
-    int ret, vout_threshold;
-
-    if ((attr->index < 0) || (attr->index >= PMBUS_PAGES)) {
-        WB_ISL68137_ERROR("%d-%04x: invalid index: %d \n", client->adapter->nr, client->addr,
-            attr->index);
-        return -EINVAL;
-    }
-
-    ret = kstrtoint(buf, 0, &vout_threshold);
-    if (ret) {
-        WB_ISL68137_ERROR("%d-%04x: invalid value: %s \n", client->adapter->nr, client->addr, buf);
-        return -EINVAL;
-    }
-
-    WB_ISL68137_VERBOSE("%d-%04x: vout%d max threshold: %d", client->adapter->nr, client->addr,
-        attr->index, vout_threshold);
-
-    data->vout_max[attr->index] = vout_threshold;
-    return count;
-}
-
-static ssize_t isl68137_avs_vout_max_show(struct device *dev,
-                   struct device_attribute *devattr, char *buf)
-{
-    struct i2c_client *client = to_i2c_client(dev->parent);
-    struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
-    struct pmbus_data *data = i2c_get_clientdata(client);
-
-    if ((attr->index < 0) || (attr->index >= PMBUS_PAGES)) {
-        WB_ISL68137_ERROR("%d-%04x: invalid index: %d \n", client->adapter->nr, client->addr,
-            attr->index);
-        return -EINVAL;
-    }
-
-    return snprintf(buf, PAGE_SIZE, "%d\n", data->vout_max[attr->index]);
-}
-
-static ssize_t isl68137_avs_vout_min_store(struct device *dev,
-                   struct device_attribute *devattr, const char *buf, size_t count)
-{
-    struct i2c_client *client = to_i2c_client(dev->parent);
-    struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
-    struct pmbus_data *data = i2c_get_clientdata(client);
-    int ret, vout_threshold;
-
-    if ((attr->index < 0) || (attr->index >= PMBUS_PAGES)) {
-        WB_ISL68137_ERROR("%d-%04x: invalid index: %d \n", client->adapter->nr, client->addr,
-            attr->index);
-        return -EINVAL;
-    }
-
-    ret = kstrtoint(buf, 0, &vout_threshold);
-    if (ret) {
-        WB_ISL68137_ERROR("%d-%04x: invalid value: %s \n", client->adapter->nr, client->addr, buf);
-        return -EINVAL;
-    }
-
-    WB_ISL68137_VERBOSE("%d-%04x: vout%d min threshold: %d", client->adapter->nr, client->addr,
-        attr->index, vout_threshold);
-
-    data->vout_min[attr->index] = vout_threshold;
-    return count;
-}
-
-static ssize_t isl68137_avs_vout_min_show(struct device *dev,
-                   struct device_attribute *devattr, char *buf)
-{
-    struct i2c_client *client = to_i2c_client(dev->parent);
-    struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
-    struct pmbus_data *data = i2c_get_clientdata(client);
-
-    if ((attr->index < 0) || (attr->index >= PMBUS_PAGES)) {
-        WB_ISL68137_ERROR("%d-%04x: invalid index: %d \n", client->adapter->nr, client->addr,
-            attr->index);
-        return -EINVAL;
-    }
-
-    return snprintf(buf, PAGE_SIZE, "%d\n", data->vout_min[attr->index]);
-}
-
-static SENSOR_DEVICE_ATTR_RW(avs0_enable, isl68137_avs_enable, 0);
-static SENSOR_DEVICE_ATTR_RW(avs1_enable, isl68137_avs_enable, 1);
-
-static SENSOR_DEVICE_ATTR_RW(avs0_vout, isl68137_avs_vout, 0);
-static SENSOR_DEVICE_ATTR_RW(avs1_vout, isl68137_avs_vout, 1);
-static SENSOR_DEVICE_ATTR_RW(avs0_vout_max, isl68137_avs_vout_max, 0);
-static SENSOR_DEVICE_ATTR_RW(avs0_vout_min, isl68137_avs_vout_min, 0);
-static SENSOR_DEVICE_ATTR_RW(avs1_vout_max, isl68137_avs_vout_max, 1);
-static SENSOR_DEVICE_ATTR_RW(avs1_vout_min, isl68137_avs_vout_min, 1);
-
-static struct attribute *enable_attrs[] = {
-    &sensor_dev_attr_avs0_enable.dev_attr.attr,
-    &sensor_dev_attr_avs1_enable.dev_attr.attr,
-    NULL,
-};
-
-static struct attribute *avs_ctrl_attrs[] = {
-    &sensor_dev_attr_avs0_vout.dev_attr.attr,
-    &sensor_dev_attr_avs1_vout.dev_attr.attr,
-    &sensor_dev_attr_avs0_vout_max.dev_attr.attr,
-    &sensor_dev_attr_avs0_vout_min.dev_attr.attr,
-    &sensor_dev_attr_avs1_vout_max.dev_attr.attr,
-    &sensor_dev_attr_avs1_vout_min.dev_attr.attr,
-    NULL,
-};
-
-static const struct attribute_group enable_group = {
-    .attrs = enable_attrs,
-};
-
-static const struct attribute_group avs_ctrl_group = {
-    .attrs = avs_ctrl_attrs,
-};
-
-static const struct attribute_group *isl68137_attribute_groups[] = {
-    &enable_group,
-    &avs_ctrl_group,
-    NULL,
-};
-
-static int raa_dmpvr2_read_word_data(struct i2c_client *client, int page,
-                     int phase, int reg)
-{
-    int ret;
-
-    switch (reg) {
-    case PMBUS_VIRT_READ_VMON:
-        ret = wb_pmbus_read_word_data(client, page, phase,
-                       RAA_DMPVR2_READ_VMON);
-        break;
-    default:
-        ret = -ENODATA;
-        break;
-    }
-
-    return ret;
-}
-
-static struct pmbus_driver_info raa_dmpvr_info = {
-    .pages = 3,
-    .format[PSC_VOLTAGE_IN] = direct,
-    .format[PSC_VOLTAGE_OUT] = direct,
-    .format[PSC_CURRENT_IN] = direct,
-    .format[PSC_CURRENT_OUT] = direct,
-    .format[PSC_POWER] = direct,
-    .format[PSC_TEMPERATURE] = direct,
-    .m[PSC_VOLTAGE_IN] = 1,
-    .b[PSC_VOLTAGE_IN] = 0,
-    .R[PSC_VOLTAGE_IN] = 2,
-    .m[PSC_VOLTAGE_OUT] = 1,
-    .b[PSC_VOLTAGE_OUT] = 0,
-    .R[PSC_VOLTAGE_OUT] = 3,
-    .m[PSC_CURRENT_IN] = 1,
-    .b[PSC_CURRENT_IN] = 0,
-    .R[PSC_CURRENT_IN] = 2,
-    .m[PSC_CURRENT_OUT] = 1,
-    .b[PSC_CURRENT_OUT] = 0,
-    .R[PSC_CURRENT_OUT] = 1,
-    .m[PSC_POWER] = 1,
-    .b[PSC_POWER] = 0,
-    .R[PSC_POWER] = 0,
-    .m[PSC_TEMPERATURE] = 1,
-    .b[PSC_TEMPERATURE] = 0,
-    .R[PSC_TEMPERATURE] = 0,
-    .func[0] = PMBUS_HAVE_VIN | PMBUS_HAVE_IIN | PMBUS_HAVE_PIN
-        | PMBUS_HAVE_STATUS_INPUT | PMBUS_HAVE_TEMP | PMBUS_HAVE_TEMP2
-        | PMBUS_HAVE_TEMP3 | PMBUS_HAVE_STATUS_TEMP
-        | PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT
-        | PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT | PMBUS_HAVE_POUT
-        | PMBUS_HAVE_VMON,
-    .func[1] = PMBUS_HAVE_IIN | PMBUS_HAVE_PIN | PMBUS_HAVE_STATUS_INPUT
-        | PMBUS_HAVE_TEMP | PMBUS_HAVE_TEMP3 | PMBUS_HAVE_STATUS_TEMP
-        | PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT | PMBUS_HAVE_IOUT
-        | PMBUS_HAVE_STATUS_IOUT | PMBUS_HAVE_POUT,
-    .func[2] = PMBUS_HAVE_IIN | PMBUS_HAVE_PIN | PMBUS_HAVE_STATUS_INPUT
-        | PMBUS_HAVE_TEMP | PMBUS_HAVE_TEMP3 | PMBUS_HAVE_STATUS_TEMP
-        | PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT | PMBUS_HAVE_IOUT
-        | PMBUS_HAVE_STATUS_IOUT | PMBUS_HAVE_POUT,
-};
-
-static int isl68137_probe(struct i2c_client *client)
-{
-    struct pmbus_driver_info *info;
-
-    info = devm_kzalloc(&client->dev, sizeof(*info), GFP_KERNEL);
-    if (!info)
-        return -ENOMEM;
-    memcpy(info, &raa_dmpvr_info, sizeof(*info));
-
-    switch (i2c_match_id(raa_dmpvr_id, client)->driver_data) {
-    case raa_dmpvr1_2rail:
-        info->pages = 2;
-        info->R[PSC_VOLTAGE_IN] = 3;
-        info->func[0] &= ~PMBUS_HAVE_VMON;
-        info->func[1] = PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT
-            | PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT
-            | PMBUS_HAVE_POUT;
-        info->groups = isl68137_attribute_groups;
-        break;
-    case raa_dmpvr2_1rail:
-        info->pages = 1;
-        info->read_word_data = raa_dmpvr2_read_word_data;
-        break;
-    case raa_dmpvr2_2rail_nontc:
-        info->func[0] &= ~PMBUS_HAVE_TEMP3;
-        info->func[1] &= ~PMBUS_HAVE_TEMP3;
-        fallthrough;
-    case raa_dmpvr2_2rail:
-        info->pages = 2;
-        info->read_word_data = raa_dmpvr2_read_word_data;
-        break;
-    case raa_dmpvr2_3rail:
-        info->read_word_data = raa_dmpvr2_read_word_data;
-        break;
-    case raa_dmpvr2_hv:
-        info->pages = 1;
-        info->R[PSC_VOLTAGE_IN] = 1;
-        info->m[PSC_VOLTAGE_OUT] = 2;
-        info->R[PSC_VOLTAGE_OUT] = 2;
-        info->m[PSC_CURRENT_IN] = 2;
-        info->m[PSC_POWER] = 2;
-        info->R[PSC_POWER] = -1;
-        info->read_word_data = raa_dmpvr2_read_word_data;
-        break;
-    default:
-        return -ENODEV;
-    }
-
-    return wb_pmbus_do_probe(client, info);
-}
-
-static const struct i2c_device_id raa_dmpvr_id[] = {
-    {"wb_isl68127", raa_dmpvr1_2rail},
-    {"wb_isl68137", raa_dmpvr1_2rail},
-    {"wb_isl68220", raa_dmpvr2_2rail},
-    {"wb_isl68221", raa_dmpvr2_3rail},
-    {"wb_isl68222", raa_dmpvr2_2rail},
-    {"wb_isl68223", raa_dmpvr2_2rail},
-    {"wb_isl68224", raa_dmpvr2_3rail},
-    {"wb_isl68225", raa_dmpvr2_2rail},
-    {"wb_isl68226", raa_dmpvr2_3rail},
-    {"wb_isl68227", raa_dmpvr2_1rail},
-    {"wb_isl68229", raa_dmpvr2_3rail},
-    {"wb_isl68233", raa_dmpvr2_2rail},
-    {"wb_isl68239", raa_dmpvr2_3rail},
-
-    {"wb_isl69222", raa_dmpvr2_2rail},
-    {"wb_isl69223", raa_dmpvr2_3rail},
-    {"wb_isl69224", raa_dmpvr2_2rail},
-    {"wb_isl69225", raa_dmpvr2_2rail},
-    {"wb_isl69227", raa_dmpvr2_3rail},
-    {"wb_isl69228", raa_dmpvr2_3rail},
-    {"wb_isl69234", raa_dmpvr2_2rail},
-    {"wb_isl69236", raa_dmpvr2_2rail},
-    {"wb_isl69239", raa_dmpvr2_3rail},
-    {"wb_isl69242", raa_dmpvr2_2rail},
-    {"wb_isl69243", raa_dmpvr2_1rail},
-    {"wb_isl69247", raa_dmpvr2_2rail},
-    {"wb_isl69248", raa_dmpvr2_2rail},
-    {"wb_isl69254", raa_dmpvr2_2rail},
-    {"wb_isl69255", raa_dmpvr2_2rail},
-    {"wb_isl69256", raa_dmpvr2_2rail},
-    {"wb_isl69259", raa_dmpvr2_2rail},
-    {"wb_isl69260", raa_dmpvr2_2rail},
-    {"wb_isl69268", raa_dmpvr2_2rail},
-    {"wb_isl69269", raa_dmpvr2_3rail},
-    {"wb_isl69298", raa_dmpvr2_2rail},
-
-    {"wb_raa228000", raa_dmpvr2_hv},
-    {"wb_raa228004", raa_dmpvr2_hv},
-    {"wb_raa228006", raa_dmpvr2_hv},
-    {"wb_raa228228", raa_dmpvr2_2rail_nontc},
-    {"wb_raa229001", raa_dmpvr2_2rail},
-    {"wb_raa229004", raa_dmpvr2_2rail},
-    {}
-};
-
-MODULE_DEVICE_TABLE(i2c, raa_dmpvr_id);
-
-/* This is the driver that will be inserted */
-static struct i2c_driver isl68137_driver = {
-    .driver = {
-           .name = "wb_isl68137",
-           },
-    .probe_new = isl68137_probe,
-    .remove = wb_pmbus_do_remove,
-    .id_table = raa_dmpvr_id,
-};
-
-module_i2c_driver(isl68137_driver);
-
-MODULE_AUTHOR("support");
-MODULE_DESCRIPTION("PMBus driver for Renesas digital multiphase voltage regulators");
-MODULE_LICENSE("GPL");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_lm75.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_lm75.c
deleted file mode 100644
index 0386cfb0b..000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_lm75.c
+++ /dev/null
@@ -1,992 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later
-/*
- * lm75.c - Part of lm_sensors, Linux kernel modules for hardware
- *	 monitoring
- * Copyright (c) 1998, 1999  Frodo Looijaard <frodol@dds.nl>
- */
-
-#include <linux/module.h>
-#include <linux/init.h>
-#include <linux/slab.h>
-#include <linux/jiffies.h>
-#include <linux/i2c.h>
-#include <linux/hwmon.h>
-#include <linux/hwmon-sysfs.h>
-#include <linux/err.h>
-#include <linux/of_device.h>
-#include <linux/of.h>
-#include <linux/regmap.h>
-#include <linux/util_macros.h>
-#include <linux/regulator/consumer.h>
-#include <linux/delay.h>
-#include "wb_lm75.h"
-
-/*
- * This driver handles the LM75 and compatible digital temperature sensors.
- */
-
-enum lm75_type {		/* keep sorted in alphabetical order */
-	adt75,
-	ds1775,
-	ds75,
-	ds7505,
-	g751,
-	lm75,
-	lm75a,
-	lm75b,
-	max6625,
-	max6626,
-	max31725,
-	mcp980x,
-	pct2075,
-	stds75,
-	stlm75,
-	tcn75,
-	tmp100,
-	tmp101,
-	tmp105,
-	tmp112,
-	tmp175,
-	tmp275,
-	tmp75,
-	tmp75b,
-	tmp75c,
-};
-
-/**
- * struct lm75_params - lm75 configuration parameters.
- * @set_mask:		Bits to set in configuration register when configuring
- *			the chip.
- * @clr_mask:		Bits to clear in configuration register when configuring
- *			the chip.
- * @default_resolution:	Default number of bits to represent the temperature
- *			value.
- * @resolution_limits:	Limit register resolution. Optional. Should be set if
- *			the resolution of limit registers does not match the
- *			resolution of the temperature register.
- * @resolutions:	List of resolutions associated with sample times.
- *			Optional. Should be set if num_sample_times is larger
- *			than 1, and if the resolution changes with sample times.
- *			If set, number of entries must match num_sample_times.
- * @default_sample_time:Sample time to be set by default.
- * @num_sample_times:	Number of possible sample times to be set. Optional.
- *			Should be set if the number of sample times is larger
- *			than one.
- * @sample_times:	All the possible sample times to be set. Mandatory if
- *			num_sample_times is larger than 1. If set, number of
- *			entries must match num_sample_times.
- */
-
-struct lm75_params {
-	u8			set_mask;
-	u8			clr_mask;
-	u8			default_resolution;
-	u8			resolution_limits;
-	const u8		*resolutions;
-	unsigned int		default_sample_time;
-	u8			num_sample_times;
-	const unsigned int	*sample_times;
-};
-#if 0
-/* Addresses scanned */
-static const unsigned short normal_i2c[] = { 0x48, 0x49, 0x4a, 0x4b, 0x4c,
-					0x4d, 0x4e, 0x4f, I2C_CLIENT_END };
-#endif
-/* The LM75 registers */
-#define LM75_REG_TEMP		0x00
-#define LM75_REG_CONF		0x01
-#define LM75_REG_HYST		0x02
-#define LM75_REG_MAX		0x03
-#define PCT2075_REG_IDLE	0x04
-#define LM75_TEMP_INVALID_RETRY_TIMES    (3)
-
-/* Each client has this additional data */
-struct lm75_data {
-	struct i2c_client		*client;
-	struct regmap			*regmap;
-	struct regulator		*vs;
-	u8				orig_conf;
-	u8				current_conf;
-	u8				resolution;	/* In bits, 9 to 16 */
-	unsigned int			sample_time;	/* In ms */
-	enum lm75_type			kind;
-	const struct lm75_params	*params;
-};
-
-/*-----------------------------------------------------------------------*/
-
-static const u8 lm75_sample_set_masks[] = { 0 << 5, 1 << 5, 2 << 5, 3 << 5 };
-
-#define LM75_SAMPLE_CLEAR_MASK	(3 << 5)
-
-/* The structure below stores the configuration values of the supported devices.
- * In case of being supported multiple configurations, the default one must
- * always be the first element of the array
- */
-static const struct lm75_params device_params[] = {
-	[adt75] = {
-		.clr_mask = 1 << 5,	/* not one-shot mode */
-		.default_resolution = 12,
-		.default_sample_time = MSEC_PER_SEC / 10,
-	},
-	[ds1775] = {
-		.clr_mask = 3 << 5,
-		.set_mask = 2 << 5,	/* 11-bit mode */
-		.default_resolution = 11,
-		.default_sample_time = 500,
-		.num_sample_times = 4,
-		.sample_times = (unsigned int []){ 125, 250, 500, 1000 },
-		.resolutions = (u8 []) {9, 10, 11, 12 },
-	},
-	[ds75] = {
-		.clr_mask = 3 << 5,
-		.set_mask = 2 << 5,	/* 11-bit mode */
-		.default_resolution = 11,
-		.default_sample_time = 600,
-		.num_sample_times = 4,
-		.sample_times = (unsigned int []){ 150, 300, 600, 1200 },
-		.resolutions = (u8 []) {9, 10, 11, 12 },
-	},
-	[stds75] = {
-		.clr_mask = 3 << 5,
-		.set_mask = 2 << 5,	/* 11-bit mode */
-		.default_resolution = 11,
-		.default_sample_time = 600,
-		.num_sample_times = 4,
-		.sample_times = (unsigned int []){ 150, 300, 600, 1200 },
-		.resolutions = (u8 []) {9, 10, 11, 12 },
-	},
-	[stlm75] = {
-		.default_resolution = 9,
-		.default_sample_time = MSEC_PER_SEC / 6,
-	},
-	[ds7505] = {
-		.set_mask = 3 << 5,	/* 12-bit mode*/
-		.default_resolution = 12,
-		.default_sample_time = 200,
-		.num_sample_times = 4,
-		.sample_times = (unsigned int []){ 25, 50, 100, 200 },
-		.resolutions = (u8 []) {9, 10, 11, 12 },
-	},
-	[g751] = {
-		.default_resolution = 9,
-		.default_sample_time = MSEC_PER_SEC / 10,
-	},
-	[lm75] = {
-		.default_resolution = 9,
-		.default_sample_time = MSEC_PER_SEC / 10,
-	},
-	[lm75a] = {
-		.default_resolution = 9,
-		.default_sample_time = MSEC_PER_SEC / 10,
-	},
-	[lm75b] = {
-		.default_resolution = 11,
-		.default_sample_time = MSEC_PER_SEC / 10,
-	},
-	[max6625] = {
-		.default_resolution = 9,
-		.default_sample_time = MSEC_PER_SEC / 7,
-	},
-	[max6626] = {
-		.default_resolution = 12,
-		.default_sample_time = MSEC_PER_SEC / 7,
-		.resolution_limits = 9,
-	},
-	[max31725] = {
-		.default_resolution = 16,
-		.default_sample_time = MSEC_PER_SEC / 20,
-	},
-	[tcn75] = {
-		.default_resolution = 9,
-		.default_sample_time = MSEC_PER_SEC / 18,
-	},
-	[pct2075] = {
-		.default_resolution = 11,
-		.default_sample_time = MSEC_PER_SEC / 10,
-		.num_sample_times = 31,
-		.sample_times = (unsigned int []){ 100, 200, 300, 400, 500, 600,
-		700, 800, 900, 1000, 1100, 1200, 1300, 1400, 1500, 1600, 1700,
-		1800, 1900, 2000, 2100, 2200, 2300, 2400, 2500, 2600, 2700,
-		2800, 2900, 3000, 3100 },
-	},
-	[mcp980x] = {
-		.set_mask = 3 << 5,	/* 12-bit mode */
-		.clr_mask = 1 << 7,	/* not one-shot mode */
-		.default_resolution = 12,
-		.resolution_limits = 9,
-		.default_sample_time = 240,
-		.num_sample_times = 4,
-		.sample_times = (unsigned int []){ 30, 60, 120, 240 },
-		.resolutions = (u8 []) {9, 10, 11, 12 },
-	},
-	[tmp100] = {
-		.set_mask = 3 << 5,	/* 12-bit mode */
-		.clr_mask = 1 << 7,	/* not one-shot mode */
-		.default_resolution = 12,
-		.default_sample_time = 320,
-		.num_sample_times = 4,
-		.sample_times = (unsigned int []){ 40, 80, 160, 320 },
-		.resolutions = (u8 []) {9, 10, 11, 12 },
-	},
-	[tmp101] = {
-		.set_mask = 3 << 5,	/* 12-bit mode */
-		.clr_mask = 1 << 7,	/* not one-shot mode */
-		.default_resolution = 12,
-		.default_sample_time = 320,
-		.num_sample_times = 4,
-		.sample_times = (unsigned int []){ 40, 80, 160, 320 },
-		.resolutions = (u8 []) {9, 10, 11, 12 },
-	},
-	[tmp105] = {
-		.set_mask = 3 << 5,	/* 12-bit mode */
-		.clr_mask = 1 << 7,	/* not one-shot mode*/
-		.default_resolution = 12,
-		.default_sample_time = 220,
-		.num_sample_times = 4,
-		.sample_times = (unsigned int []){ 28, 55, 110, 220 },
-		.resolutions = (u8 []) {9, 10, 11, 12 },
-	},
-	[tmp112] = {
-		.set_mask = 3 << 5,	/* 8 samples / second */
-		.clr_mask = 1 << 7,	/* no one-shot mode*/
-		.default_resolution = 12,
-		.default_sample_time = 125,
-		.num_sample_times = 4,
-		.sample_times = (unsigned int []){ 125, 250, 1000, 4000 },
-	},
-	[tmp175] = {
-		.set_mask = 3 << 5,	/* 12-bit mode */
-		.clr_mask = 1 << 7,	/* not one-shot mode*/
-		.default_resolution = 12,
-		.default_sample_time = 220,
-		.num_sample_times = 4,
-		.sample_times = (unsigned int []){ 28, 55, 110, 220 },
-		.resolutions = (u8 []) {9, 10, 11, 12 },
-	},
-	[tmp275] = {
-		.set_mask = 3 << 5,	/* 12-bit mode */
-		.clr_mask = 1 << 7,	/* not one-shot mode*/
-		.default_resolution = 12,
-		.default_sample_time = 220,
-		.num_sample_times = 4,
-		.sample_times = (unsigned int []){ 28, 55, 110, 220 },
-		.resolutions = (u8 []) {9, 10, 11, 12 },
-	},
-	[tmp75] = {
-		.set_mask = 3 << 5,	/* 12-bit mode */
-		.clr_mask = 1 << 7,	/* not one-shot mode*/
-		.default_resolution = 12,
-		.default_sample_time = 220,
-		.num_sample_times = 4,
-		.sample_times = (unsigned int []){ 28, 55, 110, 220 },
-		.resolutions = (u8 []) {9, 10, 11, 12 },
-	},
-	[tmp75b] = { /* not one-shot mode, Conversion rate 37Hz */
-		.clr_mask = 1 << 7 | 3 << 5,
-		.default_resolution = 12,
-		.default_sample_time = MSEC_PER_SEC / 37,
-		.sample_times = (unsigned int []){ MSEC_PER_SEC / 37,
-			MSEC_PER_SEC / 18,
-			MSEC_PER_SEC / 9, MSEC_PER_SEC / 4 },
-		.num_sample_times = 4,
-	},
-	[tmp75c] = {
-		.clr_mask = 1 << 5,	/*not one-shot mode*/
-		.default_resolution = 12,
-		.default_sample_time = MSEC_PER_SEC / 12,
-	}
-};
-
-/* input temp threshold check */
-typedef struct lm75_temp_threshold_s {
-    int chip_type;
-    int temp_max;
-    int temp_min;
-} lm75_temp_threshold_t;
-
-static lm75_temp_threshold_t g_lm75_temp_threshold_info[] = {
-    {
-        .chip_type = lm75,
-        .temp_max = 125000,
-        .temp_min = -55000,
-    },
-    {
-        .chip_type = tmp275,
-        .temp_max = 125000,
-        .temp_min = -40000,
-    },
-};
-
-/*-----------------------------------------------------------------------*/
-static int lm75_input_temp_check(struct lm75_data *data, int input_val)
-{
-    int i, size;
-
-    size = ARRAY_SIZE(g_lm75_temp_threshold_info);
-
-    for (i = 0; i < size; i++) {
-        if (g_lm75_temp_threshold_info[i].chip_type == data->kind) {
-            if ((input_val > g_lm75_temp_threshold_info[i].temp_max)
-                    || (input_val < g_lm75_temp_threshold_info[i].temp_min)) {
-                dev_dbg(&data->client->dev, "input temp: %d not in range[%d, %d]\n",
-                    input_val, g_lm75_temp_threshold_info[i].temp_min,
-                    g_lm75_temp_threshold_info[i].temp_max);
-                return -EINVAL;
-            }
-            dev_dbg(&data->client->dev, "input temp: %d in range[%d, %d]", input_val,
-                g_lm75_temp_threshold_info[i].temp_min, g_lm75_temp_threshold_info[i].temp_max);
-            return 0;
-        }
-    }
-    return 0;
-}
-
-static inline long lm75_reg_to_mc(s16 temp, u8 resolution)
-{
-	return ((temp >> (16 - resolution)) * 1000) >> (resolution - 8);
-}
-
-static int lm75_write_config(struct lm75_data *data, u8 set_mask,
-			     u8 clr_mask)
-{
-	u8 value;
-
-	clr_mask |= LM75_SHUTDOWN;
-	value = data->current_conf & ~clr_mask;
-	value |= set_mask;
-
-	if (data->current_conf != value) {
-		s32 err;
-
-		err = i2c_smbus_write_byte_data(data->client, LM75_REG_CONF,
-						value);
-		if (err)
-			return err;
-		data->current_conf = value;
-	}
-	return 0;
-}
-
-static int lm75_read(struct device *dev, enum hwmon_sensor_types type, u32 attr, int channel,
-               long *val)
-{
-    struct lm75_data *data = dev_get_drvdata(dev);
-    unsigned int regval;
-    int err, reg, i, ret;
-
-    switch (type) {
-    case hwmon_chip:
-        switch (attr) {
-        case hwmon_chip_update_interval:
-            *val = data->sample_time;
-            break;
-        default:
-            return -EINVAL;
-        }
-        break;
-    case hwmon_temp:
-        switch (attr) {
-        case hwmon_temp_input:
-            reg = LM75_REG_TEMP;
-            break;
-        case hwmon_temp_max:
-            reg = LM75_REG_MAX;
-            break;
-        case hwmon_temp_max_hyst:
-            reg = LM75_REG_HYST;
-            break;
-        default:
-            return -EINVAL;
-        }
-        for (i = 0; i < LM75_TEMP_INVALID_RETRY_TIMES; i++) {
-            err = regmap_read(data->regmap, reg, &regval);
-            if (err < 0) {
-                return err;
-            }
-            *val = lm75_reg_to_mc(regval, data->resolution);
-            if (reg != LM75_REG_TEMP) {
-                return 0;
-            }
-            /* do input_temp_check */
-            ret = lm75_input_temp_check(data, *val);
-            if (ret == 0) { /* input temp check ok */
-               return 0;
-            }
-            if ((i + 1) < LM75_TEMP_INVALID_RETRY_TIMES) {
-                msleep(data->sample_time);
-            }
-        }
-        dev_info(&data->client->dev, "temp_input value: %ld invalid\n", *val);
-        return -EINVAL;
-    default:
-        return -EINVAL;
-    }
-    return 0;
-}
-
-static int lm75_write_temp(struct device *dev, u32 attr, long temp)
-{
-	struct lm75_data *data = dev_get_drvdata(dev);
-	u8 resolution;
-	int reg;
-
-	switch (attr) {
-	case hwmon_temp_max:
-		reg = LM75_REG_MAX;
-		break;
-	case hwmon_temp_max_hyst:
-		reg = LM75_REG_HYST;
-		break;
-	default:
-		return -EINVAL;
-	}
-
-	/*
-	 * Resolution of limit registers is assumed to be the same as the
-	 * temperature input register resolution unless given explicitly.
-	 */
-	if (data->params->resolution_limits)
-		resolution = data->params->resolution_limits;
-	else
-		resolution = data->resolution;
-
-	temp = clamp_val(temp, LM75_TEMP_MIN, LM75_TEMP_MAX);
-	temp = DIV_ROUND_CLOSEST(temp  << (resolution - 8),
-				 1000) << (16 - resolution);
-
-	return regmap_write(data->regmap, reg, (u16)temp);
-}
-
-static int lm75_update_interval(struct device *dev, long val)
-{
-	struct lm75_data *data = dev_get_drvdata(dev);
-	unsigned int reg;
-	u8 index;
-	s32 err;
-
-	index = find_closest(val, data->params->sample_times,
-			     (int)data->params->num_sample_times);
-
-	switch (data->kind) {
-	default:
-		err = lm75_write_config(data, lm75_sample_set_masks[index],
-					LM75_SAMPLE_CLEAR_MASK);
-		if (err)
-			return err;
-
-		data->sample_time = data->params->sample_times[index];
-		if (data->params->resolutions)
-			data->resolution = data->params->resolutions[index];
-		break;
-	case tmp112:
-		err = regmap_read(data->regmap, LM75_REG_CONF, &reg);
-		if (err < 0)
-			return err;
-		reg &= ~0x00c0;
-		reg |= (3 - index) << 6;
-		err = regmap_write(data->regmap, LM75_REG_CONF, reg);
-		if (err < 0)
-			return err;
-		data->sample_time = data->params->sample_times[index];
-		break;
-	case pct2075:
-		err = i2c_smbus_write_byte_data(data->client, PCT2075_REG_IDLE,
-						index + 1);
-		if (err)
-			return err;
-		data->sample_time = data->params->sample_times[index];
-		break;
-	}
-	return 0;
-}
-
-static int lm75_write_chip(struct device *dev, u32 attr, long val)
-{
-	switch (attr) {
-	case hwmon_chip_update_interval:
-		return lm75_update_interval(dev, val);
-	default:
-		return -EINVAL;
-	}
-	return 0;
-}
-
-static int lm75_write(struct device *dev, enum hwmon_sensor_types type,
-		      u32 attr, int channel, long val)
-{
-	switch (type) {
-	case hwmon_chip:
-		return lm75_write_chip(dev, attr, val);
-	case hwmon_temp:
-		return lm75_write_temp(dev, attr, val);
-	default:
-		return -EINVAL;
-	}
-	return 0;
-}
-
-static umode_t lm75_is_visible(const void *data, enum hwmon_sensor_types type,
-			       u32 attr, int channel)
-{
-	const struct lm75_data *config_data = data;
-
-	switch (type) {
-	case hwmon_chip:
-		switch (attr) {
-		case hwmon_chip_update_interval:
-			if (config_data->params->num_sample_times > 1)
-				return 0644;
-			return 0444;
-		}
-		break;
-	case hwmon_temp:
-		switch (attr) {
-		case hwmon_temp_input:
-			return 0444;
-		case hwmon_temp_max:
-		case hwmon_temp_max_hyst:
-			return 0644;
-		}
-		break;
-	default:
-		break;
-	}
-	return 0;
-}
-
-static const struct hwmon_channel_info *lm75_info[] = {
-	HWMON_CHANNEL_INFO(chip,
-			   HWMON_C_REGISTER_TZ | HWMON_C_UPDATE_INTERVAL),
-	HWMON_CHANNEL_INFO(temp,
-			   HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_MAX_HYST),
-	NULL
-};
-
-static const struct hwmon_ops lm75_hwmon_ops = {
-	.is_visible = lm75_is_visible,
-	.read = lm75_read,
-	.write = lm75_write,
-};
-
-static const struct hwmon_chip_info lm75_chip_info = {
-	.ops = &lm75_hwmon_ops,
-	.info = lm75_info,
-};
-
-static bool lm75_is_writeable_reg(struct device *dev, unsigned int reg)
-{
-	return reg != LM75_REG_TEMP;
-}
-
-static bool lm75_is_volatile_reg(struct device *dev, unsigned int reg)
-{
-	return reg == LM75_REG_TEMP || reg == LM75_REG_CONF;
-}
-
-static const struct regmap_config lm75_regmap_config = {
-	.reg_bits = 8,
-	.val_bits = 16,
-	.max_register = PCT2075_REG_IDLE,
-	.writeable_reg = lm75_is_writeable_reg,
-	.volatile_reg = lm75_is_volatile_reg,
-	.val_format_endian = REGMAP_ENDIAN_BIG,
-	.cache_type = REGCACHE_RBTREE,
-	.use_single_read = true,
-	.use_single_write = true,
-};
-
-static void lm75_disable_regulator(void *data)
-{
-	struct lm75_data *lm75 = data;
-
-	regulator_disable(lm75->vs);
-}
-
-static void lm75_remove(void *data)
-{
-	struct lm75_data *lm75 = data;
-	struct i2c_client *client = lm75->client;
-
-	i2c_smbus_write_byte_data(client, LM75_REG_CONF, lm75->orig_conf);
-}
-
-static const struct i2c_device_id lm75_ids[];
-
-static int lm75_probe(struct i2c_client *client)
-{
-	struct device *dev = &client->dev;
-	struct device *hwmon_dev;
-	struct lm75_data *data;
-	int status, err;
-	enum lm75_type kind;
-
-	if (client->dev.of_node)
-		kind = (enum lm75_type)of_device_get_match_data(&client->dev);
-	else
-		kind = i2c_match_id(lm75_ids, client)->driver_data;
-
-	if (!i2c_check_functionality(client->adapter,
-			I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA))
-		return -EIO;
-
-	data = devm_kzalloc(dev, sizeof(struct lm75_data), GFP_KERNEL);
-	if (!data)
-		return -ENOMEM;
-
-	data->client = client;
-	data->kind = kind;
-
-	data->vs = devm_regulator_get(dev, "vs");
-	if (IS_ERR(data->vs))
-		return PTR_ERR(data->vs);
-
-	data->regmap = devm_regmap_init_i2c(client, &lm75_regmap_config);
-	if (IS_ERR(data->regmap))
-		return PTR_ERR(data->regmap);
-
-	/* Set to LM75 resolution (9 bits, 1/2 degree C) and range.
-	 * Then tweak to be more precise when appropriate.
-	 */
-
-	data->params = &device_params[data->kind];
-
-	/* Save default sample time and resolution*/
-	data->sample_time = data->params->default_sample_time;
-	data->resolution = data->params->default_resolution;
-
-	/* Enable the power */
-	err = regulator_enable(data->vs);
-	if (err) {
-		dev_err(dev, "failed to enable regulator: %d\n", err);
-		return err;
-	}
-
-	err = devm_add_action_or_reset(dev, lm75_disable_regulator, data);
-	if (err)
-		return err;
-
-	/* Cache original configuration */
-	status = i2c_smbus_read_byte_data(client, LM75_REG_CONF);
-	if (status < 0) {
-		dev_dbg(dev, "Can't read config? %d\n", status);
-		return status;
-	}
-	data->orig_conf = status;
-	data->current_conf = status;
-
-	err = lm75_write_config(data, data->params->set_mask,
-				data->params->clr_mask);
-	if (err)
-		return err;
-
-	err = devm_add_action_or_reset(dev, lm75_remove, data);
-	if (err)
-		return err;
-
-	hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name,
-							 data, &lm75_chip_info,
-							 NULL);
-	if (IS_ERR(hwmon_dev))
-		return PTR_ERR(hwmon_dev);
-
-	dev_info(dev, "%s: sensor '%s'\n", dev_name(hwmon_dev), client->name);
-
-	return 0;
-}
-
-static const struct i2c_device_id lm75_ids[] = {
-	{ "wb_adt75", adt75, },
-	{ "wb_ds1775", ds1775, },
-	{ "wb_ds75", ds75, },
-	{ "wb_ds7505", ds7505, },
-	{ "wb_g751", g751, },
-	{ "wb_lm75", lm75, },
-	{ "wb_lm75a", lm75a, },
-	{ "wb_lm75b", lm75b, },
-	{ "wb_max6625", max6625, },
-	{ "wb_max6626", max6626, },
-	{ "wb_max31725", max31725, },
-	{ "wb_max31726", max31725, },
-	{ "wb_mcp980x", mcp980x, },
-	{ "wb_pct2075", pct2075, },
-	{ "wb_stds75", stds75, },
-	{ "wb_stlm75", stlm75, },
-	{ "wb_tcn75", tcn75, },
-	{ "wb_tmp100", tmp100, },
-	{ "wb_tmp101", tmp101, },
-	{ "wb_tmp105", tmp105, },
-	{ "wb_tmp112", tmp112, },
-	{ "wb_tmp175", tmp175, },
-	{ "wb_tmp275", tmp275, },
-	{ "wb_tmp75", tmp75, },
-	{ "wb_tmp75b", tmp75b, },
-	{ "wb_tmp75c", tmp75c, },
-	{ /* LIST END */ }
-};
-MODULE_DEVICE_TABLE(i2c, lm75_ids);
-
-static const struct of_device_id __maybe_unused lm75_of_match[] = {
-	{
-		.compatible = "adi,adt75",
-		.data = (void *)adt75
-	},
-	{
-		.compatible = "dallas,ds1775",
-		.data = (void *)ds1775
-	},
-	{
-		.compatible = "dallas,ds75",
-		.data = (void *)ds75
-	},
-	{
-		.compatible = "dallas,ds7505",
-		.data = (void *)ds7505
-	},
-	{
-		.compatible = "gmt,g751",
-		.data = (void *)g751
-	},
-	{
-		.compatible = "national,lm75",
-		.data = (void *)lm75
-	},
-	{
-		.compatible = "national,lm75a",
-		.data = (void *)lm75a
-	},
-	{
-		.compatible = "national,lm75b",
-		.data = (void *)lm75b
-	},
-	{
-		.compatible = "maxim,max6625",
-		.data = (void *)max6625
-	},
-	{
-		.compatible = "maxim,max6626",
-		.data = (void *)max6626
-	},
-	{
-		.compatible = "maxim,max31725",
-		.data = (void *)max31725
-	},
-	{
-		.compatible = "maxim,max31726",
-		.data = (void *)max31725
-	},
-	{
-		.compatible = "maxim,mcp980x",
-		.data = (void *)mcp980x
-	},
-	{
-		.compatible = "nxp,pct2075",
-		.data = (void *)pct2075
-	},
-	{
-		.compatible = "st,stds75",
-		.data = (void *)stds75
-	},
-	{
-		.compatible = "st,stlm75",
-		.data = (void *)stlm75
-	},
-	{
-		.compatible = "microchip,tcn75",
-		.data = (void *)tcn75
-	},
-	{
-		.compatible = "ti,tmp100",
-		.data = (void *)tmp100
-	},
-	{
-		.compatible = "ti,tmp101",
-		.data = (void *)tmp101
-	},
-	{
-		.compatible = "ti,tmp105",
-		.data = (void *)tmp105
-	},
-	{
-		.compatible = "ti,tmp112",
-		.data = (void *)tmp112
-	},
-	{
-		.compatible = "ti,tmp175",
-		.data = (void *)tmp175
-	},
-	{
-		.compatible = "ti,tmp275",
-		.data = (void *)tmp275
-	},
-	{
-		.compatible = "ti,tmp75",
-		.data = (void *)tmp75
-	},
-	{
-		.compatible = "ti,tmp75b",
-		.data = (void *)tmp75b
-	},
-	{
-		.compatible = "ti,tmp75c",
-		.data = (void *)tmp75c
-	},
-	{ },
-};
-MODULE_DEVICE_TABLE(of, lm75_of_match);
-
-#define LM75A_ID 0xA1
-#if 0
-/* Return 0 if detection is successful, -ENODEV otherwise */
-static int lm75_detect(struct i2c_client *new_client,
-		       struct i2c_board_info *info)
-{
-	struct i2c_adapter *adapter = new_client->adapter;
-	int i;
-	int conf, hyst, os;
-	bool is_lm75a = 0;
-
-	if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA |
-				     I2C_FUNC_SMBUS_WORD_DATA))
-		return -ENODEV;
-
-	/*
-	 * Now, we do the remaining detection. There is no identification-
-	 * dedicated register so we have to rely on several tricks:
-	 * unused bits, registers cycling over 8-address boundaries,
-	 * addresses 0x04-0x07 returning the last read value.
-	 * The cycling+unused addresses combination is not tested,
-	 * since it would significantly slow the detection down and would
-	 * hardly add any value.
-	 *
-	 * The National Semiconductor LM75A is different than earlier
-	 * LM75s.  It has an ID byte of 0xaX (where X is the chip
-	 * revision, with 1 being the only revision in existence) in
-	 * register 7, and unused registers return 0xff rather than the
-	 * last read value.
-	 *
-	 * Note that this function only detects the original National
-	 * Semiconductor LM75 and the LM75A. Clones from other vendors
-	 * aren't detected, on purpose, because they are typically never
-	 * found on PC hardware. They are found on embedded designs where
-	 * they can be instantiated explicitly so detection is not needed.
-	 * The absence of identification registers on all these clones
-	 * would make their exhaustive detection very difficult and weak,
-	 * and odds are that the driver would bind to unsupported devices.
-	 */
-
-	/* Unused bits */
-	conf = i2c_smbus_read_byte_data(new_client, 1);
-	if (conf & 0xe0)
-		return -ENODEV;
-
-	/* First check for LM75A */
-	if (i2c_smbus_read_byte_data(new_client, 7) == LM75A_ID) {
-		/*
-		 * LM75A returns 0xff on unused registers so
-		 * just to be sure we check for that too.
-		 */
-		if (i2c_smbus_read_byte_data(new_client, 4) != 0xff
-		 || i2c_smbus_read_byte_data(new_client, 5) != 0xff
-		 || i2c_smbus_read_byte_data(new_client, 6) != 0xff)
-			return -ENODEV;
-		is_lm75a = 1;
-		hyst = i2c_smbus_read_byte_data(new_client, 2);
-		os = i2c_smbus_read_byte_data(new_client, 3);
-	} else { /* Traditional style LM75 detection */
-		/* Unused addresses */
-		hyst = i2c_smbus_read_byte_data(new_client, 2);
-		if (i2c_smbus_read_byte_data(new_client, 4) != hyst
-		 || i2c_smbus_read_byte_data(new_client, 5) != hyst
-		 || i2c_smbus_read_byte_data(new_client, 6) != hyst
-		 || i2c_smbus_read_byte_data(new_client, 7) != hyst)
-			return -ENODEV;
-		os = i2c_smbus_read_byte_data(new_client, 3);
-		if (i2c_smbus_read_byte_data(new_client, 4) != os
-		 || i2c_smbus_read_byte_data(new_client, 5) != os
-		 || i2c_smbus_read_byte_data(new_client, 6) != os
-		 || i2c_smbus_read_byte_data(new_client, 7) != os)
-			return -ENODEV;
-	}
-	/*
-	 * It is very unlikely that this is a LM75 if both
-	 * hysteresis and temperature limit registers are 0.
-	 */
-	if (hyst == 0 && os == 0)
-		return -ENODEV;
-
-	/* Addresses cycling */
-	for (i = 8; i <= 248; i += 40) {
-		if (i2c_smbus_read_byte_data(new_client, i + 1) != conf
-		 || i2c_smbus_read_byte_data(new_client, i + 2) != hyst
-		 || i2c_smbus_read_byte_data(new_client, i + 3) != os)
-			return -ENODEV;
-		if (is_lm75a && i2c_smbus_read_byte_data(new_client, i + 7)
-				!= LM75A_ID)
-			return -ENODEV;
-	}
-
-	strlcpy(info->type, is_lm75a ? "lm75a" : "lm75", I2C_NAME_SIZE);
-
-	return 0;
-}
-#endif
-
-#ifdef CONFIG_PM
-static int lm75_suspend(struct device *dev)
-{
-	int status;
-	struct i2c_client *client = to_i2c_client(dev);
-
-	status = i2c_smbus_read_byte_data(client, LM75_REG_CONF);
-	if (status < 0) {
-		dev_dbg(&client->dev, "Can't read config? %d\n", status);
-		return status;
-	}
-	status = status | LM75_SHUTDOWN;
-	i2c_smbus_write_byte_data(client, LM75_REG_CONF, status);
-	return 0;
-}
-
-static int lm75_resume(struct device *dev)
-{
-	int status;
-	struct i2c_client *client = to_i2c_client(dev);
-
-	status = i2c_smbus_read_byte_data(client, LM75_REG_CONF);
-	if (status < 0) {
-		dev_dbg(&client->dev, "Can't read config? %d\n", status);
-		return status;
-	}
-	status = status & ~LM75_SHUTDOWN;
-	i2c_smbus_write_byte_data(client, LM75_REG_CONF, status);
-	return 0;
-}
-
-static const struct dev_pm_ops lm75_dev_pm_ops = {
-	.suspend	= lm75_suspend,
-	.resume		= lm75_resume,
-};
-#define LM75_DEV_PM_OPS (&lm75_dev_pm_ops)
-#else
-#define LM75_DEV_PM_OPS NULL
-#endif /* CONFIG_PM */
-
-static struct i2c_driver lm75_driver = {
-	.class		= I2C_CLASS_HWMON,
-	.driver = {
-		.name	= "wb_lm75",
-		.of_match_table = of_match_ptr(lm75_of_match),
-		.pm	= LM75_DEV_PM_OPS,
-	},
-	.probe_new	= lm75_probe,
-	.id_table	= lm75_ids,
-	/* .detect		= lm75_detect, */
-	/* .address_list	= normal_i2c, */
-};
-
-module_i2c_driver(lm75_driver);
-
-MODULE_AUTHOR("support");
-MODULE_DESCRIPTION("LM75 driver");
-MODULE_LICENSE("GPL");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_lm75.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_lm75.h
deleted file mode 100644
index a39817116..000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_lm75.h
+++ /dev/null
@@ -1,40 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-or-later */
-/*
- * lm75.h - Part of lm_sensors, Linux kernel modules for hardware monitoring
- * Copyright (c) 2003 Mark M. Hoffman <mhoffman@lightlink.com>
- */
-
-/*
- * This file contains common code for encoding/decoding LM75 type
- * temperature readings, which are emulated by many of the chips
- * we support.  As the user is unlikely to load more than one driver
- * which contains this code, we don't worry about the wasted space.
- */
-
-#include <linux/kernel.h>
-
-/* straight from the datasheet */
-#define LM75_TEMP_MIN (-55000)
-#define LM75_TEMP_MAX 125000
-#define LM75_SHUTDOWN 0x01
-
-/*
- * TEMP: 0.001C/bit (-55C to +125C)
- * REG: (0.5C/bit, two's complement) << 7
- */
-static inline u16 LM75_TEMP_TO_REG(long temp)
-{
-	int ntemp = clamp_val(temp, LM75_TEMP_MIN, LM75_TEMP_MAX);
-
-	ntemp += (ntemp < 0 ? -250 : 250);
-	return (u16)((ntemp / 500) << 7);
-}
-
-static inline int LM75_TEMP_FROM_REG(u16 reg)
-{
-	/*
-	 * use integer division instead of equivalent right shift to
-	 * guarantee arithmetic shift and preserve the sign
-	 */
-	return ((s16)reg / 128) * 500;
-}
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_pmbus.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_pmbus.h
deleted file mode 100644
index 781f2ee07..000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_pmbus.h
+++ /dev/null
@@ -1,535 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-or-later */
-/*
- * wb_pmbus.h - Common defines and structures for PMBus devices
- *
- * Copyright (c) 2010, 2011 Ericsson AB.
- * Copyright (c) 2012 Guenter Roeck
- */
-
-#ifndef WB_PMBUS_H
-#define WB_PMBUS_H
-
-#include <linux/bitops.h>
-#include <linux/regulator/driver.h>
-#include <linux/string.h>
-
-#define mem_clear(data, size) memset((data), 0, (size))
-
-/*
- * Registers
- */
-enum pmbus_regs {
-    PMBUS_PAGE            = 0x00,
-    PMBUS_OPERATION            = 0x01,
-    PMBUS_ON_OFF_CONFIG        = 0x02,
-    PMBUS_CLEAR_FAULTS        = 0x03,
-    PMBUS_PHASE            = 0x04,
-
-    PMBUS_WRITE_PROTECT        = 0x10,
-
-    PMBUS_CAPABILITY        = 0x19,
-    PMBUS_QUERY            = 0x1A,
-
-    PMBUS_VOUT_MODE            = 0x20,
-    PMBUS_VOUT_COMMAND        = 0x21,
-    PMBUS_VOUT_TRIM            = 0x22,
-    PMBUS_VOUT_CAL_OFFSET        = 0x23,
-    PMBUS_VOUT_MAX            = 0x24,
-    PMBUS_VOUT_MARGIN_HIGH        = 0x25,
-    PMBUS_VOUT_MARGIN_LOW        = 0x26,
-    PMBUS_VOUT_TRANSITION_RATE    = 0x27,
-    PMBUS_VOUT_DROOP        = 0x28,
-    PMBUS_VOUT_SCALE_LOOP        = 0x29,
-    PMBUS_VOUT_SCALE_MONITOR    = 0x2A,
-
-    PMBUS_COEFFICIENTS        = 0x30,
-    PMBUS_POUT_MAX            = 0x31,
-
-    PMBUS_FAN_CONFIG_12        = 0x3A,
-    PMBUS_FAN_COMMAND_1        = 0x3B,
-    PMBUS_FAN_COMMAND_2        = 0x3C,
-    PMBUS_FAN_CONFIG_34        = 0x3D,
-    PMBUS_FAN_COMMAND_3        = 0x3E,
-    PMBUS_FAN_COMMAND_4        = 0x3F,
-
-    PMBUS_VOUT_OV_FAULT_LIMIT    = 0x40,
-    PMBUS_VOUT_OV_FAULT_RESPONSE    = 0x41,
-    PMBUS_VOUT_OV_WARN_LIMIT    = 0x42,
-    PMBUS_VOUT_UV_WARN_LIMIT    = 0x43,
-    PMBUS_VOUT_UV_FAULT_LIMIT    = 0x44,
-    PMBUS_VOUT_UV_FAULT_RESPONSE    = 0x45,
-    PMBUS_IOUT_OC_FAULT_LIMIT    = 0x46,
-    PMBUS_IOUT_OC_FAULT_RESPONSE    = 0x47,
-    PMBUS_IOUT_OC_LV_FAULT_LIMIT    = 0x48,
-    PMBUS_IOUT_OC_LV_FAULT_RESPONSE    = 0x49,
-    PMBUS_IOUT_OC_WARN_LIMIT    = 0x4A,
-    PMBUS_IOUT_UC_FAULT_LIMIT    = 0x4B,
-    PMBUS_IOUT_UC_FAULT_RESPONSE    = 0x4C,
-
-    PMBUS_OT_FAULT_LIMIT        = 0x4F,
-    PMBUS_OT_FAULT_RESPONSE        = 0x50,
-    PMBUS_OT_WARN_LIMIT        = 0x51,
-    PMBUS_UT_WARN_LIMIT        = 0x52,
-    PMBUS_UT_FAULT_LIMIT        = 0x53,
-    PMBUS_UT_FAULT_RESPONSE        = 0x54,
-    PMBUS_VIN_OV_FAULT_LIMIT    = 0x55,
-    PMBUS_VIN_OV_FAULT_RESPONSE    = 0x56,
-    PMBUS_VIN_OV_WARN_LIMIT        = 0x57,
-    PMBUS_VIN_UV_WARN_LIMIT        = 0x58,
-    PMBUS_VIN_UV_FAULT_LIMIT    = 0x59,
-
-    PMBUS_IIN_OC_FAULT_LIMIT    = 0x5B,
-    PMBUS_IIN_OC_WARN_LIMIT        = 0x5D,
-
-    PMBUS_POUT_OP_FAULT_LIMIT    = 0x68,
-    PMBUS_POUT_OP_WARN_LIMIT    = 0x6A,
-    PMBUS_PIN_OP_WARN_LIMIT        = 0x6B,
-
-    PMBUS_STATUS_BYTE        = 0x78,
-    PMBUS_STATUS_WORD        = 0x79,
-    PMBUS_STATUS_VOUT        = 0x7A,
-    PMBUS_STATUS_IOUT        = 0x7B,
-    PMBUS_STATUS_INPUT        = 0x7C,
-    PMBUS_STATUS_TEMPERATURE    = 0x7D,
-    PMBUS_STATUS_CML        = 0x7E,
-    PMBUS_STATUS_OTHER        = 0x7F,
-    PMBUS_STATUS_MFR_SPECIFIC    = 0x80,
-    PMBUS_STATUS_FAN_12        = 0x81,
-    PMBUS_STATUS_FAN_34        = 0x82,
-
-    PMBUS_READ_VIN            = 0x88,
-    PMBUS_READ_IIN            = 0x89,
-    PMBUS_READ_VCAP            = 0x8A,
-    PMBUS_READ_VOUT            = 0x8B,
-    PMBUS_READ_IOUT            = 0x8C,
-    PMBUS_READ_TEMPERATURE_1    = 0x8D,
-    PMBUS_READ_TEMPERATURE_2    = 0x8E,
-    PMBUS_READ_TEMPERATURE_3    = 0x8F,
-    PMBUS_READ_FAN_SPEED_1        = 0x90,
-    PMBUS_READ_FAN_SPEED_2        = 0x91,
-    PMBUS_READ_FAN_SPEED_3        = 0x92,
-    PMBUS_READ_FAN_SPEED_4        = 0x93,
-    PMBUS_READ_DUTY_CYCLE        = 0x94,
-    PMBUS_READ_FREQUENCY        = 0x95,
-    PMBUS_READ_POUT            = 0x96,
-    PMBUS_READ_PIN            = 0x97,
-
-    PMBUS_REVISION            = 0x98,
-    PMBUS_MFR_ID            = 0x99,
-    PMBUS_MFR_MODEL            = 0x9A,
-    PMBUS_MFR_REVISION        = 0x9B,
-    PMBUS_MFR_LOCATION        = 0x9C,
-    PMBUS_MFR_DATE            = 0x9D,
-    PMBUS_MFR_SERIAL        = 0x9E,
-
-    PMBUS_MFR_VIN_MIN        = 0xA0,
-    PMBUS_MFR_VIN_MAX        = 0xA1,
-    PMBUS_MFR_IIN_MAX        = 0xA2,
-    PMBUS_MFR_PIN_MAX        = 0xA3,
-    PMBUS_MFR_VOUT_MIN        = 0xA4,
-    PMBUS_MFR_VOUT_MAX        = 0xA5,
-    PMBUS_MFR_IOUT_MAX        = 0xA6,
-    PMBUS_MFR_POUT_MAX        = 0xA7,
-
-    PMBUS_IC_DEVICE_ID        = 0xAD,
-    PMBUS_IC_DEVICE_REV        = 0xAE,
-
-    PMBUS_MFR_MAX_TEMP_1        = 0xC0,
-    PMBUS_MFR_MAX_TEMP_2        = 0xC1,
-    PMBUS_MFR_MAX_TEMP_3        = 0xC2,
-
-/*
- * Virtual registers.
- * Useful to support attributes which are not supported by standard PMBus
- * registers but exist as manufacturer specific registers on individual chips.
- * Must be mapped to real registers in device specific code.
- *
- * Semantics:
- * Virtual registers are all word size.
- * READ registers are read-only; writes are either ignored or return an error.
- * RESET registers are read/write. Reading reset registers returns zero
- * (used for detection), writing any value causes the associated history to be
- * reset.
- * Virtual registers have to be handled in device specific driver code. Chip
- * driver code returns non-negative register values if a virtual register is
- * supported, or a negative error code if not. The chip driver may return
- * -ENODATA or any other error code in this case, though an error code other
- * than -ENODATA is handled more efficiently and thus preferred. Either case,
- * the calling PMBus core code will abort if the chip driver returns an error
- * code when reading or writing virtual registers.
- */
-    PMBUS_VIRT_BASE            = 0x100,
-    PMBUS_VIRT_READ_TEMP_AVG,
-    PMBUS_VIRT_READ_TEMP_MIN,
-    PMBUS_VIRT_READ_TEMP_MAX,
-    PMBUS_VIRT_RESET_TEMP_HISTORY,
-    PMBUS_VIRT_READ_VIN_AVG,
-    PMBUS_VIRT_READ_VIN_MIN,
-    PMBUS_VIRT_READ_VIN_MAX,
-    PMBUS_VIRT_RESET_VIN_HISTORY,
-    PMBUS_VIRT_READ_IIN_AVG,
-    PMBUS_VIRT_READ_IIN_MIN,
-    PMBUS_VIRT_READ_IIN_MAX,
-    PMBUS_VIRT_RESET_IIN_HISTORY,
-    PMBUS_VIRT_READ_PIN_AVG,
-    PMBUS_VIRT_READ_PIN_MIN,
-    PMBUS_VIRT_READ_PIN_MAX,
-    PMBUS_VIRT_RESET_PIN_HISTORY,
-    PMBUS_VIRT_READ_POUT_AVG,
-    PMBUS_VIRT_READ_POUT_MIN,
-    PMBUS_VIRT_READ_POUT_MAX,
-    PMBUS_VIRT_RESET_POUT_HISTORY,
-    PMBUS_VIRT_READ_VOUT_AVG,
-    PMBUS_VIRT_READ_VOUT_MIN,
-    PMBUS_VIRT_READ_VOUT_MAX,
-    PMBUS_VIRT_RESET_VOUT_HISTORY,
-    PMBUS_VIRT_READ_IOUT_AVG,
-    PMBUS_VIRT_READ_IOUT_MIN,
-    PMBUS_VIRT_READ_IOUT_MAX,
-    PMBUS_VIRT_RESET_IOUT_HISTORY,
-    PMBUS_VIRT_READ_TEMP2_AVG,
-    PMBUS_VIRT_READ_TEMP2_MIN,
-    PMBUS_VIRT_READ_TEMP2_MAX,
-    PMBUS_VIRT_RESET_TEMP2_HISTORY,
-
-    PMBUS_VIRT_READ_VMON,
-    PMBUS_VIRT_VMON_UV_WARN_LIMIT,
-    PMBUS_VIRT_VMON_OV_WARN_LIMIT,
-    PMBUS_VIRT_VMON_UV_FAULT_LIMIT,
-    PMBUS_VIRT_VMON_OV_FAULT_LIMIT,
-    PMBUS_VIRT_STATUS_VMON,
-
-    /*
-     * RPM and PWM Fan control
-     *
-     * Drivers wanting to expose PWM control must define the behaviour of
-     * PMBUS_VIRT_PWM_[1-4] and PMBUS_VIRT_PWM_ENABLE_[1-4] in the
-     * {read,write}_word_data callback.
-     *
-     * pmbus core provides a default implementation for
-     * PMBUS_VIRT_FAN_TARGET_[1-4].
-     *
-     * TARGET, PWM and PWM_ENABLE members must be defined sequentially;
-     * pmbus core uses the difference between the provided register and
-     * it's _1 counterpart to calculate the FAN/PWM ID.
-     */
-    PMBUS_VIRT_FAN_TARGET_1,
-    PMBUS_VIRT_FAN_TARGET_2,
-    PMBUS_VIRT_FAN_TARGET_3,
-    PMBUS_VIRT_FAN_TARGET_4,
-    PMBUS_VIRT_PWM_1,
-    PMBUS_VIRT_PWM_2,
-    PMBUS_VIRT_PWM_3,
-    PMBUS_VIRT_PWM_4,
-    PMBUS_VIRT_PWM_ENABLE_1,
-    PMBUS_VIRT_PWM_ENABLE_2,
-    PMBUS_VIRT_PWM_ENABLE_3,
-    PMBUS_VIRT_PWM_ENABLE_4,
-
-    /* Samples for average
-     *
-     * Drivers wanting to expose functionality for changing the number of
-     * samples used for average values should implement support in
-     * {read,write}_word_data callback for either PMBUS_VIRT_SAMPLES if it
-     * applies to all types of measurements, or any number of specific
-     * PMBUS_VIRT_*_SAMPLES registers to allow for individual control.
-     */
-    PMBUS_VIRT_SAMPLES,
-    PMBUS_VIRT_IN_SAMPLES,
-    PMBUS_VIRT_CURR_SAMPLES,
-    PMBUS_VIRT_POWER_SAMPLES,
-    PMBUS_VIRT_TEMP_SAMPLES,
-};
-
-/*
- * OPERATION
- */
-#define PB_OPERATION_CONTROL_ON        BIT(7)
-
-/*
- * WRITE_PROTECT
- */
-#define PB_WP_ALL    BIT(7)    /* all but WRITE_PROTECT */
-#define PB_WP_OP    BIT(6)    /* all but WP, OPERATION, PAGE */
-#define PB_WP_VOUT    BIT(5)    /* all but WP, OPERATION, PAGE, VOUT, ON_OFF */
-
-#define PB_WP_ANY    (PB_WP_ALL | PB_WP_OP | PB_WP_VOUT)
-
-/*
- * CAPABILITY
- */
-#define PB_CAPABILITY_SMBALERT        BIT(4)
-#define PB_CAPABILITY_ERROR_CHECK    BIT(7)
-
-/*
- * VOUT_MODE
- */
-#define PB_VOUT_MODE_MODE_MASK        0xe0
-#define PB_VOUT_MODE_PARAM_MASK        0x1f
-
-#define PB_VOUT_MODE_LINEAR        0x00
-#define PB_VOUT_MODE_VID        0x20
-#define PB_VOUT_MODE_DIRECT        0x40
-
-/*
- * Fan configuration
- */
-#define PB_FAN_2_PULSE_MASK        (BIT(0) | BIT(1))
-#define PB_FAN_2_RPM            BIT(2)
-#define PB_FAN_2_INSTALLED        BIT(3)
-#define PB_FAN_1_PULSE_MASK        (BIT(4) | BIT(5))
-#define PB_FAN_1_RPM            BIT(6)
-#define PB_FAN_1_INSTALLED        BIT(7)
-
-enum pmbus_fan_mode { percent = 0, rpm };
-
-/*
- * STATUS_BYTE, STATUS_WORD (lower)
- */
-#define PB_STATUS_NONE_ABOVE        BIT(0)
-#define PB_STATUS_CML            BIT(1)
-#define PB_STATUS_TEMPERATURE        BIT(2)
-#define PB_STATUS_VIN_UV        BIT(3)
-#define PB_STATUS_IOUT_OC        BIT(4)
-#define PB_STATUS_VOUT_OV        BIT(5)
-#define PB_STATUS_OFF            BIT(6)
-#define PB_STATUS_BUSY            BIT(7)
-
-/*
- * STATUS_WORD (upper)
- */
-#define PB_STATUS_UNKNOWN        BIT(8)
-#define PB_STATUS_OTHER            BIT(9)
-#define PB_STATUS_FANS            BIT(10)
-#define PB_STATUS_POWER_GOOD_N        BIT(11)
-#define PB_STATUS_WORD_MFR        BIT(12)
-#define PB_STATUS_INPUT            BIT(13)
-#define PB_STATUS_IOUT_POUT        BIT(14)
-#define PB_STATUS_VOUT            BIT(15)
-
-/*
- * STATUS_IOUT
- */
-#define PB_POUT_OP_WARNING        BIT(0)
-#define PB_POUT_OP_FAULT        BIT(1)
-#define PB_POWER_LIMITING        BIT(2)
-#define PB_CURRENT_SHARE_FAULT        BIT(3)
-#define PB_IOUT_UC_FAULT        BIT(4)
-#define PB_IOUT_OC_WARNING        BIT(5)
-#define PB_IOUT_OC_LV_FAULT        BIT(6)
-#define PB_IOUT_OC_FAULT        BIT(7)
-
-/*
- * STATUS_VOUT, STATUS_INPUT
- */
-#define PB_VOLTAGE_UV_FAULT        BIT(4)
-#define PB_VOLTAGE_UV_WARNING        BIT(5)
-#define PB_VOLTAGE_OV_WARNING        BIT(6)
-#define PB_VOLTAGE_OV_FAULT        BIT(7)
-
-/*
- * STATUS_INPUT
- */
-#define PB_PIN_OP_WARNING        BIT(0)
-#define PB_IIN_OC_WARNING        BIT(1)
-#define PB_IIN_OC_FAULT            BIT(2)
-
-/*
- * STATUS_TEMPERATURE
- */
-#define PB_TEMP_UT_FAULT        BIT(4)
-#define PB_TEMP_UT_WARNING        BIT(5)
-#define PB_TEMP_OT_WARNING        BIT(6)
-#define PB_TEMP_OT_FAULT        BIT(7)
-
-/*
- * STATUS_FAN
- */
-#define PB_FAN_AIRFLOW_WARNING        BIT(0)
-#define PB_FAN_AIRFLOW_FAULT        BIT(1)
-#define PB_FAN_FAN2_SPEED_OVERRIDE    BIT(2)
-#define PB_FAN_FAN1_SPEED_OVERRIDE    BIT(3)
-#define PB_FAN_FAN2_WARNING        BIT(4)
-#define PB_FAN_FAN1_WARNING        BIT(5)
-#define PB_FAN_FAN2_FAULT        BIT(6)
-#define PB_FAN_FAN1_FAULT        BIT(7)
-
-/*
- * CML_FAULT_STATUS
- */
-#define PB_CML_FAULT_OTHER_MEM_LOGIC    BIT(0)
-#define PB_CML_FAULT_OTHER_COMM        BIT(1)
-#define PB_CML_FAULT_PROCESSOR        BIT(3)
-#define PB_CML_FAULT_MEMORY        BIT(4)
-#define PB_CML_FAULT_PACKET_ERROR    BIT(5)
-#define PB_CML_FAULT_INVALID_DATA    BIT(6)
-#define PB_CML_FAULT_INVALID_COMMAND    BIT(7)
-
-enum pmbus_sensor_classes {
-    PSC_VOLTAGE_IN = 0,
-    PSC_VOLTAGE_OUT,
-    PSC_CURRENT_IN,
-    PSC_CURRENT_OUT,
-    PSC_POWER,
-    PSC_TEMPERATURE,
-    PSC_FAN,
-    PSC_PWM,
-    PSC_NUM_CLASSES        /* Number of power sensor classes */
-};
-
-#define PMBUS_PAGES    32    /* Per PMBus specification */
-#define PMBUS_PHASES    8    /* Maximum number of phases per page */
-
-/* Functionality bit mask */
-#define PMBUS_HAVE_VIN        BIT(0)
-#define PMBUS_HAVE_VCAP        BIT(1)
-#define PMBUS_HAVE_VOUT        BIT(2)
-#define PMBUS_HAVE_IIN        BIT(3)
-#define PMBUS_HAVE_IOUT        BIT(4)
-#define PMBUS_HAVE_PIN        BIT(5)
-#define PMBUS_HAVE_POUT        BIT(6)
-#define PMBUS_HAVE_FAN12    BIT(7)
-#define PMBUS_HAVE_FAN34    BIT(8)
-#define PMBUS_HAVE_TEMP        BIT(9)
-#define PMBUS_HAVE_TEMP2    BIT(10)
-#define PMBUS_HAVE_TEMP3    BIT(11)
-#define PMBUS_HAVE_STATUS_VOUT    BIT(12)
-#define PMBUS_HAVE_STATUS_IOUT    BIT(13)
-#define PMBUS_HAVE_STATUS_INPUT    BIT(14)
-#define PMBUS_HAVE_STATUS_TEMP    BIT(15)
-#define PMBUS_HAVE_STATUS_FAN12    BIT(16)
-#define PMBUS_HAVE_STATUS_FAN34    BIT(17)
-#define PMBUS_HAVE_VMON        BIT(18)
-#define PMBUS_HAVE_STATUS_VMON    BIT(19)
-#define PMBUS_HAVE_PWM12    BIT(20)
-#define PMBUS_HAVE_PWM34    BIT(21)
-#define PMBUS_HAVE_SAMPLES    BIT(22)
-
-#define PMBUS_PHASE_VIRTUAL    BIT(30)    /* Phases on this page are virtual */
-#define PMBUS_PAGE_VIRTUAL    BIT(31)    /* Page is virtual */
-
-enum pmbus_data_format { linear = 0, direct, vid };
-enum vrm_version { vr11 = 0, vr12, vr13, imvp9, amd625mv };
-
-struct pmbus_driver_info {
-    int pages;        /* Total number of pages */
-    u8 phases[PMBUS_PAGES];    /* Number of phases per page */
-    enum pmbus_data_format format[PSC_NUM_CLASSES];
-    enum vrm_version vrm_version[PMBUS_PAGES]; /* vrm version per page */
-    /*
-     * Support one set of coefficients for each sensor type
-     * Used for chips providing data in direct mode.
-     */
-    int m[PSC_NUM_CLASSES];    /* mantissa for direct data format */
-    int b[PSC_NUM_CLASSES];    /* offset */
-    int R[PSC_NUM_CLASSES];    /* exponent */
-
-    u32 func[PMBUS_PAGES];    /* Functionality, per page */
-    u32 pfunc[PMBUS_PHASES];/* Functionality, per phase */
-    /*
-     * The following functions map manufacturing specific register values
-     * to PMBus standard register values. Specify only if mapping is
-     * necessary.
-     * Functions return the register value (read) or zero (write) if
-     * successful. A return value of -ENODATA indicates that there is no
-     * manufacturer specific register, but that a standard PMBus register
-     * may exist. Any other negative return value indicates that the
-     * register does not exist, and that no attempt should be made to read
-     * the standard register.
-     */
-    int (*read_byte_data)(struct i2c_client *client, int page, int reg);
-    int (*read_word_data)(struct i2c_client *client, int page, int phase,
-                  int reg);
-    int (*write_word_data)(struct i2c_client *client, int page, int reg,
-                   u16 word);
-    int (*write_byte)(struct i2c_client *client, int page, u8 value);
-    /*
-     * The identify function determines supported PMBus functionality.
-     * This function is only necessary if a chip driver supports multiple
-     * chips, and the chip functionality is not pre-determined.
-     */
-    int (*identify)(struct i2c_client *client,
-            struct pmbus_driver_info *info);
-
-    /* Regulator functionality, if supported by this chip driver. */
-    int num_regulators;
-    const struct regulator_desc *reg_desc;
-
-    /* custom attributes */
-    const struct attribute_group **groups;
-};
-
-/* Regulator ops */
-
-extern const struct regulator_ops wb_pmbus_regulator_ops;
-
-/* Macro for filling in array of struct regulator_desc */
-#define PMBUS_REGULATOR(_name, _id)                \
-    [_id] = {                        \
-        .name = (_name # _id),                \
-        .id = (_id),                    \
-        .of_match = of_match_ptr(_name # _id),        \
-        .regulators_node = of_match_ptr("regulators"),    \
-        .ops = &wb_pmbus_regulator_ops,            \
-        .type = REGULATOR_VOLTAGE,            \
-        .owner = THIS_MODULE,                \
-    }
-
-struct pmbus_data {
-    struct device *dev;
-    struct device *hwmon_dev;
-
-    u32 flags;        /* from platform data */
-
-    int exponent[PMBUS_PAGES]; /* linear mode: exponent for output voltages */
-
-    const struct pmbus_driver_info *info;
-
-    int max_attributes;
-    int num_attributes;
-    struct attribute_group group;
-    const struct attribute_group **groups;
-    struct dentry *debugfs;        /* debugfs device directory */
-
-    struct pmbus_sensor *sensors;
-
-    struct mutex update_lock;
-
-    bool has_status_word;        /* device uses STATUS_WORD register */
-    int (*read_status)(struct i2c_client *client, int page);
-
-    s16 currpage;     /* current page, -1 for unknown/unset */
-    s16 currphase;    /* current phase, 0xff for all, -1 for unknown/unset */
-    int vout_max[PMBUS_PAGES];    /* pmbus maximum output voltage */
-    int vout_min[PMBUS_PAGES];    /* pmbus minimum output voltage */
-};
-
-/* Function declarations */
-void wb_pmbus_clear_cache(struct i2c_client *client);
-int wb_pmbus_set_page(struct i2c_client *client, int page, int phase);
-int wb_pmbus_read_word_data(struct i2c_client *client, int page, int phase,
-             u8 reg);
-int wb_pmbus_write_word_data(struct i2c_client *client, int page, u8 reg,
-              u16 word);
-int wb_pmbus_read_byte_data(struct i2c_client *client, int page, u8 reg);
-int wb_pmbus_write_byte(struct i2c_client *client, int page, u8 value);
-int wb_pmbus_write_byte_data(struct i2c_client *client, int page, u8 reg,
-              u8 value);
-int wb_pmbus_update_byte_data(struct i2c_client *client, int page, u8 reg,
-               u8 mask, u8 value);
-void wb_pmbus_clear_faults(struct i2c_client *client);
-bool wb_pmbus_check_byte_register(struct i2c_client *client, int page, int reg);
-bool wb_pmbus_check_word_register(struct i2c_client *client, int page, int reg);
-int wb_pmbus_do_probe(struct i2c_client *client, struct pmbus_driver_info *info);
-void wb_pmbus_do_remove(struct i2c_client *client);
-const struct pmbus_driver_info *wb_pmbus_get_driver_info(struct i2c_client
-                              *client);
-int wb_pmbus_get_fan_rate_device(struct i2c_client *client, int page, int id,
-                  enum pmbus_fan_mode mode);
-int wb_pmbus_get_fan_rate_cached(struct i2c_client *client, int page, int id,
-                  enum pmbus_fan_mode mode);
-int wb_pmbus_update_fan(struct i2c_client *client, int page, int id,
-             u8 config, u8 mask, u16 command);
-struct dentry *wb_pmbus_get_debugfs_dir(struct i2c_client *client);
-
-#endif /* WB_PMBUS_H */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_pmbus_core.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_pmbus_core.c
deleted file mode 100644
index 3a86ade43..000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_pmbus_core.c
+++ /dev/null
@@ -1,2780 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later
-/*
- * Hardware monitoring driver for PMBus devices
- *
- * Copyright (c) 2010, 2011 Ericsson AB.
- * Copyright (c) 2012 Guenter Roeck
- */
-
-#include <linux/debugfs.h>
-#include <linux/kernel.h>
-#include <linux/math64.h>
-#include <linux/module.h>
-#include <linux/init.h>
-#include <linux/err.h>
-#include <linux/slab.h>
-#include <linux/i2c.h>
-#include <linux/hwmon.h>
-#include <linux/hwmon-sysfs.h>
-#include <linux/pmbus.h>
-#include <linux/regulator/driver.h>
-#include <linux/regulator/machine.h>
-#include <linux/delay.h>
-#include "wb_pmbus.h"
-
-/*
- * Number of additional attribute pointers to allocate
- * with each call to krealloc
- */
-#define PMBUS_ATTR_ALLOC_SIZE    (32)
-#define PMBUS_NAME_SIZE          (24)
-#define PMBUS_RETRY_SLEEP_TIME   (10000)   /* 10ms */
-#define PMBUS_RETRY_TIME         (3)
-
-struct pmbus_sensor {
-    struct pmbus_sensor *next;
-    char name[PMBUS_NAME_SIZE];    /* sysfs sensor name */
-    struct device_attribute attribute;
-    u8 page;        /* page number */
-    u8 phase;        /* phase number, 0xff for all phases */
-    u16 reg;        /* register */
-    enum pmbus_sensor_classes class;    /* sensor class */
-    bool update;        /* runtime sensor update needed */
-    bool convert;        /* Whether or not to apply linear/vid/direct */
-    int data;        /* Sensor data.
-                   Negative if there was a read error */
-};
-#define to_pmbus_sensor(_attr) \
-    container_of(_attr, struct pmbus_sensor, attribute)
-
-struct pmbus_boolean {
-    char name[PMBUS_NAME_SIZE];    /* sysfs boolean name */
-    struct sensor_device_attribute attribute;
-    struct pmbus_sensor *s1;
-    struct pmbus_sensor *s2;
-};
-#define to_pmbus_boolean(_attr) \
-    container_of(_attr, struct pmbus_boolean, attribute)
-
-struct pmbus_label {
-    char name[PMBUS_NAME_SIZE];    /* sysfs label name */
-    struct device_attribute attribute;
-    char label[PMBUS_NAME_SIZE];    /* label */
-};
-#define to_pmbus_label(_attr) \
-    container_of(_attr, struct pmbus_label, attribute)
-
-/* Macros for converting between sensor index and register/page/status mask */
-
-#define PB_STATUS_MASK    0xffff
-#define PB_REG_SHIFT    16
-#define PB_REG_MASK    0x3ff
-#define PB_PAGE_SHIFT    26
-#define PB_PAGE_MASK    0x3f
-
-#define pb_reg_to_index(page, reg, mask)    (((page) << PB_PAGE_SHIFT) | \
-                         ((reg) << PB_REG_SHIFT) | (mask))
-
-#define pb_index_to_page(index)            (((index) >> PB_PAGE_SHIFT) & PB_PAGE_MASK)
-#define pb_index_to_reg(index)            (((index) >> PB_REG_SHIFT) & PB_REG_MASK)
-#define pb_index_to_mask(index)            ((index) & PB_STATUS_MASK)
-
-struct pmbus_debugfs_entry {
-    struct i2c_client *client;
-    u8 page;
-    u8 reg;
-};
-
-static const int pmbus_fan_rpm_mask[] = {
-    PB_FAN_1_RPM,
-    PB_FAN_2_RPM,
-    PB_FAN_1_RPM,
-    PB_FAN_2_RPM,
-};
-
-static const int pmbus_fan_config_registers[] = {
-    PMBUS_FAN_CONFIG_12,
-    PMBUS_FAN_CONFIG_12,
-    PMBUS_FAN_CONFIG_34,
-    PMBUS_FAN_CONFIG_34
-};
-
-static const int pmbus_fan_command_registers[] = {
-    PMBUS_FAN_COMMAND_1,
-    PMBUS_FAN_COMMAND_2,
-    PMBUS_FAN_COMMAND_3,
-    PMBUS_FAN_COMMAND_4,
-};
-
-void wb_pmbus_clear_cache(struct i2c_client *client)
-{
-    struct pmbus_data *data = i2c_get_clientdata(client);
-    struct pmbus_sensor *sensor;
-
-    for (sensor = data->sensors; sensor; sensor = sensor->next)
-        sensor->data = -ENODATA;
-}
-EXPORT_SYMBOL_GPL(wb_pmbus_clear_cache);
-
-static int wb_pmbus_set_page_tmp(struct i2c_client *client, int page, int phase)
-{
-    struct pmbus_data *data = i2c_get_clientdata(client);
-    int rv;
-
-    if (page < 0)
-        return 0;
-
-    if (!(data->info->func[page] & PMBUS_PAGE_VIRTUAL) &&
-        data->info->pages > 1 && page != data->currpage) {
-        rv = i2c_smbus_write_byte_data(client, PMBUS_PAGE, page);
-        if (rv < 0)
-            return rv;
-
-        rv = i2c_smbus_read_byte_data(client, PMBUS_PAGE);
-        if (rv < 0)
-            return rv;
-
-        if (rv != page)
-            return -EIO;
-    }
-    data->currpage = page;
-
-    if (data->info->phases[page] && data->currphase != phase &&
-        !(data->info->func[page] & PMBUS_PHASE_VIRTUAL)) {
-        rv = i2c_smbus_write_byte_data(client, PMBUS_PHASE,
-                           phase);
-        if (rv)
-            return rv;
-    }
-    data->currphase = phase;
-
-    return 0;
-}
-
-int wb_pmbus_set_page(struct i2c_client *client, int page, int phase)
-{
-    int rv, i;
-    struct device *dev = &client->dev;
-
-    for (i = 0; i < PMBUS_RETRY_TIME; i++) {
-        rv = wb_pmbus_set_page_tmp(client, page, phase);
-        if(rv >= 0){
-            return rv;
-        }
-        if ((i + 1) < PMBUS_RETRY_TIME) {
-            usleep_range(PMBUS_RETRY_SLEEP_TIME, PMBUS_RETRY_SLEEP_TIME + 1);
-        }
-    }
-    dev_dbg(dev, "wb_pmbus_set_page failed, page=%d, phase=%d, rv=%d\n",
-        page, phase, rv);
-    return rv;
-}
-EXPORT_SYMBOL_GPL(wb_pmbus_set_page);
-
-static int wb_pmbus_write_byte_tmp(struct i2c_client *client, int page, u8 value)
-{
-    int rv;
-
-    rv = wb_pmbus_set_page(client, page, 0xff);
-    if (rv < 0)
-        return rv;
-
-    return i2c_smbus_write_byte(client, value);
-}
-
-int wb_pmbus_write_byte(struct i2c_client *client, int page, u8 value)
-{
-    int rv, i;
-    struct device *dev = &client->dev;
-
-    for (i = 0; i < PMBUS_RETRY_TIME; i++) {
-        rv = wb_pmbus_write_byte_tmp(client, page, value);
-        if(rv >= 0){
-            return rv;
-        }
-        if ((i + 1) < PMBUS_RETRY_TIME) {
-            usleep_range(PMBUS_RETRY_SLEEP_TIME, PMBUS_RETRY_SLEEP_TIME + 1);
-        }
-    }
-    dev_dbg(dev, "wb_pmbus_write_byte failed, page=%d, value=0x%x, rv: %d\n",
-        page, value, rv);
-    return rv;
-}
-
-EXPORT_SYMBOL_GPL(wb_pmbus_write_byte);
-
-/*
- * _pmbus_write_byte() is similar to pmbus_write_byte(), but checks if
- * a device specific mapping function exists and calls it if necessary.
- */
-static int _pmbus_write_byte(struct i2c_client *client, int page, u8 value)
-{
-    struct pmbus_data *data = i2c_get_clientdata(client);
-    const struct pmbus_driver_info *info = data->info;
-    int status;
-
-    if (info->write_byte) {
-        status = info->write_byte(client, page, value);
-        if (status != -ENODATA)
-            return status;
-    }
-    return wb_pmbus_write_byte(client, page, value);
-}
-
-static int wb_pmbus_write_word_data_tmp(struct i2c_client *client, int page, u8 reg,
-              u16 word)
-{
-    int rv;
-
-    rv = wb_pmbus_set_page(client, page, 0xff);
-    if (rv < 0)
-        return rv;
-
-    return i2c_smbus_write_word_data(client, reg, word);
-}
-
-int wb_pmbus_write_word_data(struct i2c_client *client, int page, u8 reg,
-              u16 word)
-{
-    int rv, i;
-    struct device *dev = &client->dev;
-
-    for (i = 0; i < PMBUS_RETRY_TIME; i++) {
-        rv = wb_pmbus_write_word_data_tmp(client, page, reg, word);
-        if(rv >= 0){
-            return rv;
-        }
-        if ((i + 1) < PMBUS_RETRY_TIME) {
-            usleep_range(PMBUS_RETRY_SLEEP_TIME, PMBUS_RETRY_SLEEP_TIME + 1);
-        }
-    }
-    dev_dbg(dev, "wb_pmbus_write_word_data failed, page: %d, reg: 0x%x, value: 0x%x, rv: %d\n",
-        page, reg, word, rv);
-    return rv;
-
-}
-EXPORT_SYMBOL_GPL(wb_pmbus_write_word_data);
-
-static int pmbus_write_virt_reg(struct i2c_client *client, int page, int reg,
-                u16 word)
-{
-    int bit;
-    int id;
-    int rv;
-
-    switch (reg) {
-    case PMBUS_VIRT_FAN_TARGET_1 ... PMBUS_VIRT_FAN_TARGET_4:
-        id = reg - PMBUS_VIRT_FAN_TARGET_1;
-        bit = pmbus_fan_rpm_mask[id];
-        rv = wb_pmbus_update_fan(client, page, id, bit, bit, word);
-        break;
-    default:
-        rv = -ENXIO;
-        break;
-    }
-
-    return rv;
-}
-
-/*
- * _pmbus_write_word_data() is similar to pmbus_write_word_data(), but checks if
- * a device specific mapping function exists and calls it if necessary.
- */
-static int _pmbus_write_word_data(struct i2c_client *client, int page, int reg,
-                  u16 word)
-{
-    struct pmbus_data *data = i2c_get_clientdata(client);
-    const struct pmbus_driver_info *info = data->info;
-    int status;
-
-    if (info->write_word_data) {
-        status = info->write_word_data(client, page, reg, word);
-        if (status != -ENODATA)
-            return status;
-    }
-
-    if (reg >= PMBUS_VIRT_BASE)
-        return pmbus_write_virt_reg(client, page, reg, word);
-
-    return wb_pmbus_write_word_data(client, page, reg, word);
-}
-
-int wb_pmbus_update_fan(struct i2c_client *client, int page, int id,
-             u8 config, u8 mask, u16 command)
-{
-    int from;
-    int rv;
-    u8 to;
-
-    from = wb_pmbus_read_byte_data(client, page,
-                    pmbus_fan_config_registers[id]);
-    if (from < 0)
-        return from;
-
-    to = (from & ~mask) | (config & mask);
-    if (to != from) {
-        rv = wb_pmbus_write_byte_data(client, page,
-                       pmbus_fan_config_registers[id], to);
-        if (rv < 0)
-            return rv;
-    }
-
-    return _pmbus_write_word_data(client, page,
-                      pmbus_fan_command_registers[id], command);
-}
-EXPORT_SYMBOL_GPL(wb_pmbus_update_fan);
-
-static int wb_pmbus_read_word_data_tmp(struct i2c_client *client, int page, int phase, u8 reg)
-{
-    int rv;
-
-    rv = wb_pmbus_set_page(client, page, phase);
-    if (rv < 0)
-        return rv;
-
-    return i2c_smbus_read_word_data(client, reg);
-}
-
-int wb_pmbus_read_word_data(struct i2c_client *client, int page, int phase, u8 reg)
-{
-    int rv, i;
-    struct device *dev = &client->dev;
-
-    for (i = 0; i < PMBUS_RETRY_TIME; i++) {
-        rv = wb_pmbus_read_word_data_tmp(client, page, phase, reg);
-        if(rv >= 0){
-            return rv;
-        }
-        if ((i + 1) < PMBUS_RETRY_TIME) {
-            usleep_range(PMBUS_RETRY_SLEEP_TIME, PMBUS_RETRY_SLEEP_TIME + 1);
-        }
-    }
-    dev_dbg(dev, "wb_pmbus_read_word_data failed, page: %d, phase: %d, reg: 0x%x, rv: %d\n",
-        page, phase, reg, rv);
-    return rv;
-}
-EXPORT_SYMBOL_GPL(wb_pmbus_read_word_data);
-
-static int pmbus_read_virt_reg(struct i2c_client *client, int page, int reg)
-{
-    int rv;
-    int id;
-
-    switch (reg) {
-    case PMBUS_VIRT_FAN_TARGET_1 ... PMBUS_VIRT_FAN_TARGET_4:
-        id = reg - PMBUS_VIRT_FAN_TARGET_1;
-        rv = wb_pmbus_get_fan_rate_device(client, page, id, rpm);
-        break;
-    default:
-        rv = -ENXIO;
-        break;
-    }
-
-    return rv;
-}
-
-/*
- * _pmbus_read_word_data() is similar to wb_pmbus_read_word_data(), but checks if
- * a device specific mapping function exists and calls it if necessary.
- */
-static int _pmbus_read_word_data(struct i2c_client *client, int page,
-                 int phase, int reg)
-{
-    struct pmbus_data *data = i2c_get_clientdata(client);
-    const struct pmbus_driver_info *info = data->info;
-    int status;
-
-    if (info->read_word_data) {
-        status = info->read_word_data(client, page, phase, reg);
-        if (status != -ENODATA)
-            return status;
-    }
-
-    if (reg >= PMBUS_VIRT_BASE)
-        return pmbus_read_virt_reg(client, page, reg);
-
-    return wb_pmbus_read_word_data(client, page, phase, reg);
-}
-
-/* Same as above, but without phase parameter, for use in check functions */
-static int __pmbus_read_word_data(struct i2c_client *client, int page, int reg)
-{
-    return _pmbus_read_word_data(client, page, 0xff, reg);
-}
-
-static int wb_pmbus_read_byte_data_tmp(struct i2c_client *client, int page, u8 reg)
-{
-    int rv;
-
-    rv = wb_pmbus_set_page(client, page, 0xff);
-    if (rv < 0)
-        return rv;
-
-    return i2c_smbus_read_byte_data(client, reg);
-}
-
-int wb_pmbus_read_byte_data(struct i2c_client *client, int page, u8 reg)
-{
-    int rv, i;
-    struct device *dev = &client->dev;
-
-    for (i = 0; i < PMBUS_RETRY_TIME; i++) {
-        rv = wb_pmbus_read_byte_data_tmp(client, page, reg);
-        if(rv >= 0){
-            return rv;
-        }
-        if ((i + 1) < PMBUS_RETRY_TIME) {
-            usleep_range(PMBUS_RETRY_SLEEP_TIME, PMBUS_RETRY_SLEEP_TIME + 1);
-        }
-    }
-    dev_dbg(dev, "wb_pmbus_read_byte_data failed, page: %d, reg: 0x%x, rv: %d\n",
-        page, reg, rv);
-    return rv;
-}
-EXPORT_SYMBOL_GPL(wb_pmbus_read_byte_data);
-
-static int wb_pmbus_write_byte_data_tmp(struct i2c_client *client, int page, u8 reg, u8 value)
-{
-    int rv;
-
-    rv = wb_pmbus_set_page(client, page, 0xff);
-    if (rv < 0)
-        return rv;
-
-    return i2c_smbus_write_byte_data(client, reg, value);
-}
-
-int wb_pmbus_write_byte_data(struct i2c_client *client, int page, u8 reg, u8 value)
-{
-    int rv, i;
-    struct device *dev = &client->dev;
-
-    for (i = 0; i < PMBUS_RETRY_TIME; i++) {
-        rv = wb_pmbus_write_byte_data_tmp(client, page, reg, value);
-        if(rv >= 0){
-            return rv;
-        }
-        if ((i + 1) < PMBUS_RETRY_TIME) {
-            usleep_range(PMBUS_RETRY_SLEEP_TIME, PMBUS_RETRY_SLEEP_TIME + 1);
-        }
-    }
-    dev_dbg(dev, "wb_pmbus_write_byte_data failed, page: %d, reg: 0x%x, value: 0x%x, rv: %d\n",
-        page, reg, value, rv);
-    return rv;
-}
-EXPORT_SYMBOL_GPL(wb_pmbus_write_byte_data);
-
-int wb_pmbus_update_byte_data(struct i2c_client *client, int page, u8 reg,
-               u8 mask, u8 value)
-{
-    unsigned int tmp;
-    int rv;
-
-    rv = wb_pmbus_read_byte_data(client, page, reg);
-    if (rv < 0)
-        return rv;
-
-    tmp = (rv & ~mask) | (value & mask);
-
-    if (tmp != rv)
-        rv = wb_pmbus_write_byte_data(client, page, reg, tmp);
-
-    return rv;
-}
-EXPORT_SYMBOL_GPL(wb_pmbus_update_byte_data);
-
-/*
- * _pmbus_read_byte_data() is similar to wb_pmbus_read_byte_data(), but checks if
- * a device specific mapping function exists and calls it if necessary.
- */
-static int _pmbus_read_byte_data(struct i2c_client *client, int page, int reg)
-{
-    struct pmbus_data *data = i2c_get_clientdata(client);
-    const struct pmbus_driver_info *info = data->info;
-    int status;
-
-    if (info->read_byte_data) {
-        status = info->read_byte_data(client, page, reg);
-        if (status != -ENODATA)
-            return status;
-    }
-    return wb_pmbus_read_byte_data(client, page, reg);
-}
-
-static struct pmbus_sensor *pmbus_find_sensor(struct pmbus_data *data, int page,
-                          int reg)
-{
-    struct pmbus_sensor *sensor;
-
-    for (sensor = data->sensors; sensor; sensor = sensor->next) {
-        if (sensor->page == page && sensor->reg == reg)
-            return sensor;
-    }
-
-    return ERR_PTR(-EINVAL);
-}
-
-static int pmbus_get_fan_rate(struct i2c_client *client, int page, int id,
-                  enum pmbus_fan_mode mode,
-                  bool from_cache)
-{
-    struct pmbus_data *data = i2c_get_clientdata(client);
-    bool want_rpm, have_rpm;
-    struct pmbus_sensor *s;
-    int config;
-    int reg;
-
-    want_rpm = (mode == rpm);
-
-    if (from_cache) {
-        reg = want_rpm ? PMBUS_VIRT_FAN_TARGET_1 : PMBUS_VIRT_PWM_1;
-        s = pmbus_find_sensor(data, page, reg + id);
-        if (IS_ERR(s))
-            return PTR_ERR(s);
-
-        return s->data;
-    }
-
-    config = wb_pmbus_read_byte_data(client, page,
-                      pmbus_fan_config_registers[id]);
-    if (config < 0)
-        return config;
-
-    have_rpm = !!(config & pmbus_fan_rpm_mask[id]);
-    if (want_rpm == have_rpm)
-        return wb_pmbus_read_word_data(client, page, 0xff,
-                        pmbus_fan_command_registers[id]);
-
-    /* Can't sensibly map between RPM and PWM, just return zero */
-    return 0;
-}
-
-int wb_pmbus_get_fan_rate_device(struct i2c_client *client, int page, int id,
-                  enum pmbus_fan_mode mode)
-{
-    return pmbus_get_fan_rate(client, page, id, mode, false);
-}
-EXPORT_SYMBOL_GPL(wb_pmbus_get_fan_rate_device);
-
-int wb_pmbus_get_fan_rate_cached(struct i2c_client *client, int page, int id,
-                  enum pmbus_fan_mode mode)
-{
-    return pmbus_get_fan_rate(client, page, id, mode, true);
-}
-EXPORT_SYMBOL_GPL(wb_pmbus_get_fan_rate_cached);
-
-static void pmbus_clear_fault_page(struct i2c_client *client, int page)
-{
-    _pmbus_write_byte(client, page, PMBUS_CLEAR_FAULTS);
-}
-
-void wb_pmbus_clear_faults(struct i2c_client *client)
-{
-    struct pmbus_data *data = i2c_get_clientdata(client);
-    int i;
-
-    for (i = 0; i < data->info->pages; i++)
-        pmbus_clear_fault_page(client, i);
-}
-EXPORT_SYMBOL_GPL(wb_pmbus_clear_faults);
-
-static int pmbus_check_status_cml(struct i2c_client *client)
-{
-    struct pmbus_data *data = i2c_get_clientdata(client);
-    int status, status2;
-
-    status = data->read_status(client, -1);
-    if (status < 0 || (status & PB_STATUS_CML)) {
-        status2 = _pmbus_read_byte_data(client, -1, PMBUS_STATUS_CML);
-        if (status2 < 0 || (status2 & PB_CML_FAULT_INVALID_COMMAND))
-            return -EIO;
-    }
-    return 0;
-}
-
-static bool pmbus_check_register(struct i2c_client *client,
-                 int (*func)(struct i2c_client *client,
-                         int page, int reg),
-                 int page, int reg)
-{
-    int rv;
-    struct pmbus_data *data = i2c_get_clientdata(client);
-
-    rv = func(client, page, reg);
-    if (rv >= 0 && !(data->flags & PMBUS_SKIP_STATUS_CHECK))
-        rv = pmbus_check_status_cml(client);
-    pmbus_clear_fault_page(client, -1);
-    return rv >= 0;
-}
-
-static bool pmbus_check_status_register(struct i2c_client *client, int page)
-{
-    int status;
-    struct pmbus_data *data = i2c_get_clientdata(client);
-
-    status = data->read_status(client, page);
-    if (status >= 0 && !(data->flags & PMBUS_SKIP_STATUS_CHECK) &&
-        (status & PB_STATUS_CML)) {
-        status = _pmbus_read_byte_data(client, -1, PMBUS_STATUS_CML);
-        if (status < 0 || (status & PB_CML_FAULT_INVALID_COMMAND))
-            status = -EIO;
-    }
-
-    pmbus_clear_fault_page(client, -1);
-    return status >= 0;
-}
-
-bool wb_pmbus_check_byte_register(struct i2c_client *client, int page, int reg)
-{
-    return pmbus_check_register(client, _pmbus_read_byte_data, page, reg);
-}
-EXPORT_SYMBOL_GPL(wb_pmbus_check_byte_register);
-
-bool wb_pmbus_check_word_register(struct i2c_client *client, int page, int reg)
-{
-    return pmbus_check_register(client, __pmbus_read_word_data, page, reg);
-}
-EXPORT_SYMBOL_GPL(wb_pmbus_check_word_register);
-
-const struct pmbus_driver_info *wb_pmbus_get_driver_info(struct i2c_client *client)
-{
-    struct pmbus_data *data = i2c_get_clientdata(client);
-
-    return data->info;
-}
-EXPORT_SYMBOL_GPL(wb_pmbus_get_driver_info);
-
-static int pmbus_read_status_byte(struct i2c_client *client, int page)
-{
-    return _pmbus_read_byte_data(client, page, PMBUS_STATUS_BYTE);
-}
-
-static int pmbus_read_status_word(struct i2c_client *client, int page)
-{
-    return _pmbus_read_word_data(client, page, 0xff, PMBUS_STATUS_WORD);
-}
-
-static int pmbus_get_status(struct i2c_client *client, int page, int reg)
-{
-    struct pmbus_data *data = i2c_get_clientdata(client);
-    int status;
-
-    switch (reg) {
-    case PMBUS_STATUS_WORD:
-        status = data->read_status(client, page);
-        if ((status < 0) || (data->has_status_word && (status == 0xffff))
-            || (!data->has_status_word && (status == 0xff))) {
-            if (data->has_status_word) {
-                data->read_status = pmbus_read_status_byte;
-            } else {
-                data->read_status = pmbus_read_status_word;
-            }
-            data->has_status_word = !data->has_status_word;
-            status = data->read_status(client, page);
-        }
-        break;
-    default:
-        status = _pmbus_read_byte_data(client, page, reg);
-        break;
-    }
-    if (status < 0)
-        wb_pmbus_clear_faults(client);
-    return status;
-}
-
-static void pmbus_update_sensor_data(struct i2c_client *client, struct pmbus_sensor *sensor)
-{
-    if (sensor->data < 0 || sensor->update)
-        sensor->data = _pmbus_read_word_data(client, sensor->page,
-                             sensor->phase, sensor->reg);
-}
-
-/*
- * Convert linear sensor values to milli- or micro-units
- * depending on sensor type.
- */
-static s64 pmbus_reg2data_linear(struct pmbus_data *data,
-                 struct pmbus_sensor *sensor)
-{
-    s16 exponent;
-    s32 mantissa;
-    s64 val;
-
-    if (sensor->class == PSC_VOLTAGE_OUT) {    /* LINEAR16 */
-        exponent = data->exponent[sensor->page];
-        mantissa = (u16) sensor->data;
-    } else {                /* LINEAR11 */
-        exponent = ((s16)sensor->data) >> 11;
-        mantissa = ((s16)((sensor->data & 0x7ff) << 5)) >> 5;
-    }
-
-    val = mantissa;
-
-    /* scale result to milli-units for all sensors except fans */
-    if (sensor->class != PSC_FAN)
-        val = val * 1000LL;
-
-    /* scale result to micro-units for power sensors */
-    if (sensor->class == PSC_POWER)
-        val = val * 1000LL;
-
-    if (exponent >= 0)
-        val <<= exponent;
-    else
-        val >>= -exponent;
-
-    return val;
-}
-
-/*
- * Convert direct sensor values to milli- or micro-units
- * depending on sensor type.
- */
-static s64 pmbus_reg2data_direct(struct pmbus_data *data,
-                 struct pmbus_sensor *sensor)
-{
-    s64 b, val = (s16)sensor->data;
-    s32 m, R;
-
-    m = data->info->m[sensor->class];
-    b = data->info->b[sensor->class];
-    R = data->info->R[sensor->class];
-
-    if (m == 0)
-        return 0;
-
-    /* X = 1/m * (Y * 10^-R - b) */
-    R = -R;
-    /* scale result to milli-units for everything but fans */
-    if (!(sensor->class == PSC_FAN || sensor->class == PSC_PWM)) {
-        R += 3;
-        b *= 1000;
-    }
-
-    /* scale result to micro-units for power sensors */
-    if (sensor->class == PSC_POWER) {
-        R += 3;
-        b *= 1000;
-    }
-
-    while (R > 0) {
-        val *= 10;
-        R--;
-    }
-    while (R < 0) {
-        val = div_s64(val + 5LL, 10L);  /* round closest */
-        R++;
-    }
-
-    val = div_s64(val - b, m);
-    return val;
-}
-
-/*
- * Convert VID sensor values to milli- or micro-units
- * depending on sensor type.
- */
-static s64 pmbus_reg2data_vid(struct pmbus_data *data,
-                  struct pmbus_sensor *sensor)
-{
-    long val = sensor->data;
-    long rv = 0;
-
-    switch (data->info->vrm_version[sensor->page]) {
-    case vr11:
-        if (val >= 0x02 && val <= 0xb2)
-            rv = DIV_ROUND_CLOSEST(160000 - (val - 2) * 625, 100);
-        break;
-    case vr12:
-        if (val >= 0x01)
-            rv = 250 + (val - 1) * 5;
-        break;
-    case vr13:
-        if (val >= 0x01)
-            rv = 500 + (val - 1) * 10;
-        break;
-    case imvp9:
-        if (val >= 0x01)
-            rv = 200 + (val - 1) * 10;
-        break;
-    case amd625mv:
-        if (val >= 0x0 && val <= 0xd8)
-            rv = DIV_ROUND_CLOSEST(155000 - val * 625, 100);
-        break;
-    }
-    return rv;
-}
-
-static s64 pmbus_reg2data(struct pmbus_data *data, struct pmbus_sensor *sensor)
-{
-    s64 val;
-
-    if (!sensor->convert)
-        return sensor->data;
-
-    switch (data->info->format[sensor->class]) {
-    case direct:
-        val = pmbus_reg2data_direct(data, sensor);
-        break;
-    case vid:
-        val = pmbus_reg2data_vid(data, sensor);
-        break;
-    case linear:
-    default:
-        val = pmbus_reg2data_linear(data, sensor);
-        break;
-    }
-    return val;
-}
-
-#define MAX_MANTISSA    (1023 * 1000)
-#define MIN_MANTISSA    (511 * 1000)
-
-static u16 pmbus_data2reg_linear(struct pmbus_data *data,
-                 struct pmbus_sensor *sensor, s64 val)
-{
-    s16 exponent = 0, mantissa;
-    bool negative = false;
-
-    /* simple case */
-    if (val == 0)
-        return 0;
-
-    if (sensor->class == PSC_VOLTAGE_OUT) {
-        /* LINEAR16 does not support negative voltages */
-        if (val < 0)
-            return 0;
-
-        /*
-         * For a static exponents, we don't have a choice
-         * but to adjust the value to it.
-         */
-        if (data->exponent[sensor->page] < 0)
-            val <<= -data->exponent[sensor->page];
-        else
-            val >>= data->exponent[sensor->page];
-        val = DIV_ROUND_CLOSEST_ULL(val, 1000);
-        return clamp_val(val, 0, 0xffff);
-    }
-
-    if (val < 0) {
-        negative = true;
-        val = -val;
-    }
-
-    /* Power is in uW. Convert to mW before converting. */
-    if (sensor->class == PSC_POWER)
-        val = DIV_ROUND_CLOSEST_ULL(val, 1000);
-
-    /*
-     * For simplicity, convert fan data to milli-units
-     * before calculating the exponent.
-     */
-    if (sensor->class == PSC_FAN)
-        val = val * 1000LL;
-
-    /* Reduce large mantissa until it fits into 10 bit */
-    while (val >= MAX_MANTISSA && exponent < 15) {
-        exponent++;
-        val >>= 1;
-    }
-    /* Increase small mantissa to improve precision */
-    while (val < MIN_MANTISSA && exponent > -15) {
-        exponent--;
-        val <<= 1;
-    }
-
-    /* Convert mantissa from milli-units to units */
-    mantissa = clamp_val(DIV_ROUND_CLOSEST_ULL(val, 1000), 0, 0x3ff);
-
-    /* restore sign */
-    if (negative)
-        mantissa = -mantissa;
-
-    /* Convert to 5 bit exponent, 11 bit mantissa */
-    return (mantissa & 0x7ff) | ((exponent << 11) & 0xf800);
-}
-
-static u16 pmbus_data2reg_direct(struct pmbus_data *data,
-                 struct pmbus_sensor *sensor, s64 val)
-{
-    s64 b;
-    s32 m, R;
-
-    m = data->info->m[sensor->class];
-    b = data->info->b[sensor->class];
-    R = data->info->R[sensor->class];
-
-    /* Power is in uW. Adjust R and b. */
-    if (sensor->class == PSC_POWER) {
-        R -= 3;
-        b *= 1000;
-    }
-
-    /* Calculate Y = (m * X + b) * 10^R */
-    if (!(sensor->class == PSC_FAN || sensor->class == PSC_PWM)) {
-        R -= 3;        /* Adjust R and b for data in milli-units */
-        b *= 1000;
-    }
-    val = val * m + b;
-
-    while (R > 0) {
-        val *= 10;
-        R--;
-    }
-    while (R < 0) {
-        val = div_s64(val + 5LL, 10L);  /* round closest */
-        R++;
-    }
-
-    return (u16)clamp_val(val, S16_MIN, S16_MAX);
-}
-
-static u16 pmbus_data2reg_vid(struct pmbus_data *data,
-                  struct pmbus_sensor *sensor, s64 val)
-{
-    val = clamp_val(val, 500, 1600);
-
-    return 2 + DIV_ROUND_CLOSEST_ULL((1600LL - val) * 100LL, 625);
-}
-
-static u16 pmbus_data2reg(struct pmbus_data *data,
-              struct pmbus_sensor *sensor, s64 val)
-{
-    u16 regval;
-
-    if (!sensor->convert)
-        return val;
-
-    switch (data->info->format[sensor->class]) {
-    case direct:
-        regval = pmbus_data2reg_direct(data, sensor, val);
-        break;
-    case vid:
-        regval = pmbus_data2reg_vid(data, sensor, val);
-        break;
-    case linear:
-    default:
-        regval = pmbus_data2reg_linear(data, sensor, val);
-        break;
-    }
-    return regval;
-}
-
-/*
- * Return boolean calculated from converted data.
- * <index> defines a status register index and mask.
- * The mask is in the lower 8 bits, the register index is in bits 8..23.
- *
- * The associated pmbus_boolean structure contains optional pointers to two
- * sensor attributes. If specified, those attributes are compared against each
- * other to determine if a limit has been exceeded.
- *
- * If the sensor attribute pointers are NULL, the function returns true if
- * (status[reg] & mask) is true.
- *
- * If sensor attribute pointers are provided, a comparison against a specified
- * limit has to be performed to determine the boolean result.
- * In this case, the function returns true if v1 >= v2 (where v1 and v2 are
- * sensor values referenced by sensor attribute pointers s1 and s2).
- *
- * To determine if an object exceeds upper limits, specify <s1,s2> = <v,limit>.
- * To determine if an object exceeds lower limits, specify <s1,s2> = <limit,v>.
- *
- * If a negative value is stored in any of the referenced registers, this value
- * reflects an error code which will be returned.
- */
-static int pmbus_get_boolean(struct i2c_client *client, struct pmbus_boolean *b,
-                 int index)
-{
-    struct pmbus_data *data = i2c_get_clientdata(client);
-    struct pmbus_sensor *s1 = b->s1;
-    struct pmbus_sensor *s2 = b->s2;
-    u16 mask = pb_index_to_mask(index);
-    u8 page = pb_index_to_page(index);
-    u16 reg = pb_index_to_reg(index);
-    int ret, status;
-    u16 regval;
-
-    mutex_lock(&data->update_lock);
-    status = pmbus_get_status(client, page, reg);
-    if (status < 0) {
-        ret = status;
-        goto unlock;
-    }
-
-    if (s1)
-        pmbus_update_sensor_data(client, s1);
-    if (s2)
-        pmbus_update_sensor_data(client, s2);
-
-    regval = status & mask;
-    if (s1 && s2) {
-        s64 v1, v2;
-
-        if (s1->data < 0) {
-            ret = s1->data;
-            goto unlock;
-        }
-        if (s2->data < 0) {
-            ret = s2->data;
-            goto unlock;
-        }
-
-        v1 = pmbus_reg2data(data, s1);
-        v2 = pmbus_reg2data(data, s2);
-        ret = !!(regval && v1 >= v2);
-    } else {
-        ret = !!regval;
-    }
-unlock:
-    mutex_unlock(&data->update_lock);
-    return ret;
-}
-
-static ssize_t pmbus_show_boolean(struct device *dev,
-                  struct device_attribute *da, char *buf)
-{
-    struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
-    struct pmbus_boolean *boolean = to_pmbus_boolean(attr);
-    struct i2c_client *client = to_i2c_client(dev->parent);
-    int val;
-
-    val = pmbus_get_boolean(client, boolean, attr->index);
-    if (val < 0)
-        return val;
-    return snprintf(buf, PAGE_SIZE, "%d\n", val);
-}
-
-static ssize_t pmbus_show_sensor(struct device *dev,
-                 struct device_attribute *devattr, char *buf)
-{
-    struct i2c_client *client = to_i2c_client(dev->parent);
-    struct pmbus_sensor *sensor = to_pmbus_sensor(devattr);
-    struct pmbus_data *data = i2c_get_clientdata(client);
-    ssize_t ret;
-
-    mutex_lock(&data->update_lock);
-    pmbus_update_sensor_data(client, sensor);
-    if (sensor->data < 0)
-        ret = sensor->data;
-    else
-        ret = snprintf(buf, PAGE_SIZE, "%lld\n", pmbus_reg2data(data, sensor));
-    mutex_unlock(&data->update_lock);
-    return ret;
-}
-
-static ssize_t pmbus_set_sensor(struct device *dev,
-                struct device_attribute *devattr,
-                const char *buf, size_t count)
-{
-    struct i2c_client *client = to_i2c_client(dev->parent);
-    struct pmbus_data *data = i2c_get_clientdata(client);
-    struct pmbus_sensor *sensor = to_pmbus_sensor(devattr);
-    ssize_t rv = count;
-    s64 val;
-    int ret;
-    u16 regval;
-
-    if (kstrtos64(buf, 10, &val) < 0)
-        return -EINVAL;
-
-    mutex_lock(&data->update_lock);
-    regval = pmbus_data2reg(data, sensor, val);
-    ret = _pmbus_write_word_data(client, sensor->page, sensor->reg, regval);
-    if (ret < 0)
-        rv = ret;
-    else
-        sensor->data = regval;
-    mutex_unlock(&data->update_lock);
-    return rv;
-}
-
-static ssize_t pmbus_show_label(struct device *dev,
-                struct device_attribute *da, char *buf)
-{
-    struct pmbus_label *label = to_pmbus_label(da);
-
-    return snprintf(buf, PAGE_SIZE, "%s\n", label->label);
-}
-
-static int pmbus_add_attribute(struct pmbus_data *data, struct attribute *attr)
-{
-    if (data->num_attributes >= data->max_attributes - 1) {
-        int new_max_attrs = data->max_attributes + PMBUS_ATTR_ALLOC_SIZE;
-        void *new_attrs = devm_krealloc(data->dev, data->group.attrs,
-                        new_max_attrs * sizeof(void *),
-                        GFP_KERNEL);
-        if (!new_attrs)
-            return -ENOMEM;
-        data->group.attrs = new_attrs;
-        data->max_attributes = new_max_attrs;
-    }
-
-    data->group.attrs[data->num_attributes++] = attr;
-    data->group.attrs[data->num_attributes] = NULL;
-    return 0;
-}
-
-static void pmbus_dev_attr_init(struct device_attribute *dev_attr,
-                const char *name,
-                umode_t mode,
-                ssize_t (*show)(struct device *dev,
-                        struct device_attribute *attr,
-                        char *buf),
-                ssize_t (*store)(struct device *dev,
-                         struct device_attribute *attr,
-                         const char *buf, size_t count))
-{
-    sysfs_attr_init(&dev_attr->attr);
-    dev_attr->attr.name = name;
-    dev_attr->attr.mode = mode;
-    dev_attr->show = show;
-    dev_attr->store = store;
-}
-
-static void pmbus_attr_init(struct sensor_device_attribute *a,
-                const char *name,
-                umode_t mode,
-                ssize_t (*show)(struct device *dev,
-                        struct device_attribute *attr,
-                        char *buf),
-                ssize_t (*store)(struct device *dev,
-                         struct device_attribute *attr,
-                         const char *buf, size_t count),
-                int idx)
-{
-    pmbus_dev_attr_init(&a->dev_attr, name, mode, show, store);
-    a->index = idx;
-}
-
-static int pmbus_add_boolean(struct pmbus_data *data,
-                 const char *name, const char *type, int seq,
-                 struct pmbus_sensor *s1,
-                 struct pmbus_sensor *s2,
-                 u8 page, u16 reg, u16 mask)
-{
-    struct pmbus_boolean *boolean;
-    struct sensor_device_attribute *a;
-
-    if (WARN((s1 && !s2) || (!s1 && s2), "Bad s1/s2 parameters\n"))
-        return -EINVAL;
-
-    boolean = devm_kzalloc(data->dev, sizeof(*boolean), GFP_KERNEL);
-    if (!boolean)
-        return -ENOMEM;
-
-    a = &boolean->attribute;
-
-    snprintf(boolean->name, sizeof(boolean->name), "%s%d_%s",
-         name, seq, type);
-    boolean->s1 = s1;
-    boolean->s2 = s2;
-    pmbus_attr_init(a, boolean->name, 0444, pmbus_show_boolean, NULL,
-            pb_reg_to_index(page, reg, mask));
-
-    return pmbus_add_attribute(data, &a->dev_attr.attr);
-}
-
-static struct pmbus_sensor *pmbus_add_sensor(struct pmbus_data *data,
-                         const char *name, const char *type,
-                         int seq, int page, int phase,
-                         int reg,
-                         enum pmbus_sensor_classes class,
-                         bool update, bool readonly,
-                         bool convert)
-{
-    struct pmbus_sensor *sensor;
-    struct device_attribute *a;
-
-    sensor = devm_kzalloc(data->dev, sizeof(*sensor), GFP_KERNEL);
-    if (!sensor)
-        return NULL;
-    a = &sensor->attribute;
-
-    if (type)
-        snprintf(sensor->name, sizeof(sensor->name), "%s%d_%s",
-             name, seq, type);
-    else
-        snprintf(sensor->name, sizeof(sensor->name), "%s%d",
-             name, seq);
-
-    if (data->flags & PMBUS_WRITE_PROTECTED)
-        readonly = true;
-
-    sensor->page = page;
-    sensor->phase = phase;
-    sensor->reg = reg;
-    sensor->class = class;
-    sensor->update = update;
-    sensor->convert = convert;
-    sensor->data = -ENODATA;
-    pmbus_dev_attr_init(a, sensor->name,
-                readonly ? 0444 : 0644,
-                pmbus_show_sensor, pmbus_set_sensor);
-
-    if (pmbus_add_attribute(data, &a->attr))
-        return NULL;
-
-    sensor->next = data->sensors;
-    data->sensors = sensor;
-
-    return sensor;
-}
-
-static int pmbus_add_label(struct pmbus_data *data,
-               const char *name, int seq,
-               const char *lstring, int index, int phase)
-{
-    struct pmbus_label *label;
-    struct device_attribute *a;
-
-    label = devm_kzalloc(data->dev, sizeof(*label), GFP_KERNEL);
-    if (!label)
-        return -ENOMEM;
-
-    a = &label->attribute;
-
-    snprintf(label->name, sizeof(label->name), "%s%d_label", name, seq);
-    if (!index) {
-        if (phase == 0xff)
-            strlcpy(label->label, lstring,
-                sizeof(label->label));
-        else
-            snprintf(label->label, sizeof(label->label), "%s.%d",
-                 lstring, phase);
-    } else {
-        if (phase == 0xff)
-            snprintf(label->label, sizeof(label->label), "%s%d",
-                 lstring, index);
-        else
-            snprintf(label->label, sizeof(label->label), "%s%d.%d",
-                 lstring, index, phase);
-    }
-
-    pmbus_dev_attr_init(a, label->name, 0444, pmbus_show_label, NULL);
-    return pmbus_add_attribute(data, &a->attr);
-}
-
-/*
- * Search for attributes. Allocate sensors, booleans, and labels as needed.
- */
-
-/*
- * The pmbus_limit_attr structure describes a single limit attribute
- * and its associated alarm attribute.
- */
-struct pmbus_limit_attr {
-    u16 reg;        /* Limit register */
-    u16 sbit;        /* Alarm attribute status bit */
-    bool update;        /* True if register needs updates */
-    bool low;        /* True if low limit; for limits with compare
-                   functions only */
-    const char *attr;    /* Attribute name */
-    const char *alarm;    /* Alarm attribute name */
-};
-
-/*
- * The pmbus_sensor_attr structure describes one sensor attribute. This
- * description includes a reference to the associated limit attributes.
- */
-struct pmbus_sensor_attr {
-    u16 reg;            /* sensor register */
-    u16 gbit;            /* generic status bit */
-    u8 nlimit;            /* # of limit registers */
-    enum pmbus_sensor_classes class;/* sensor class */
-    const char *label;        /* sensor label */
-    bool paged;            /* true if paged sensor */
-    bool update;            /* true if update needed */
-    bool compare;            /* true if compare function needed */
-    u32 func;            /* sensor mask */
-    u32 sfunc;            /* sensor status mask */
-    int sreg;            /* status register */
-    const struct pmbus_limit_attr *limit;/* limit registers */
-};
-
-/*
- * Add a set of limit attributes and, if supported, the associated
- * alarm attributes.
- * returns 0 if no alarm register found, 1 if an alarm register was found,
- * < 0 on errors.
- */
-static int pmbus_add_limit_attrs(struct i2c_client *client,
-                 struct pmbus_data *data,
-                 const struct pmbus_driver_info *info,
-                 const char *name, int index, int page,
-                 struct pmbus_sensor *base,
-                 const struct pmbus_sensor_attr *attr)
-{
-    const struct pmbus_limit_attr *l = attr->limit;
-    int nlimit = attr->nlimit;
-    int have_alarm = 0;
-    int i, ret;
-    struct pmbus_sensor *curr;
-
-    for (i = 0; i < nlimit; i++) {
-        if (wb_pmbus_check_word_register(client, page, l->reg)) {
-            curr = pmbus_add_sensor(data, name, l->attr, index,
-                        page, 0xff, l->reg, attr->class,
-                        attr->update || l->update,
-                        false, true);
-            if (!curr)
-                return -ENOMEM;
-            if (l->sbit && (info->func[page] & attr->sfunc)) {
-                ret = pmbus_add_boolean(data, name,
-                    l->alarm, index,
-                    attr->compare ?  l->low ? curr : base
-                              : NULL,
-                    attr->compare ? l->low ? base : curr
-                              : NULL,
-                    page, attr->sreg, l->sbit);
-                if (ret)
-                    return ret;
-                have_alarm = 1;
-            }
-        }
-        l++;
-    }
-    return have_alarm;
-}
-
-static int pmbus_add_sensor_attrs_one(struct i2c_client *client,
-                      struct pmbus_data *data,
-                      const struct pmbus_driver_info *info,
-                      const char *name,
-                      int index, int page, int phase,
-                      const struct pmbus_sensor_attr *attr,
-                      bool paged)
-{
-    struct pmbus_sensor *base;
-    bool upper = !!(attr->gbit & 0xff00);    /* need to check STATUS_WORD */
-    int ret;
-
-    if (attr->label) {
-        ret = pmbus_add_label(data, name, index, attr->label,
-                      paged ? page + 1 : 0, phase);
-        if (ret)
-            return ret;
-    }
-    base = pmbus_add_sensor(data, name, "input", index, page, phase,
-                attr->reg, attr->class, true, true, true);
-    if (!base)
-        return -ENOMEM;
-    /* No limit and alarm attributes for phase specific sensors */
-    if (attr->sfunc && phase == 0xff) {
-        ret = pmbus_add_limit_attrs(client, data, info, name,
-                        index, page, base, attr);
-        if (ret < 0)
-            return ret;
-        /*
-         * Add generic alarm attribute only if there are no individual
-         * alarm attributes, if there is a global alarm bit, and if
-         * the generic status register (word or byte, depending on
-         * which global bit is set) for this page is accessible.
-         */
-        if (!ret && attr->gbit &&
-            (!upper || (upper && data->has_status_word)) &&
-            pmbus_check_status_register(client, page)) {
-            ret = pmbus_add_boolean(data, name, "alarm", index,
-                        NULL, NULL,
-                        page, PMBUS_STATUS_WORD,
-                        attr->gbit);
-            if (ret)
-                return ret;
-        }
-    }
-    return 0;
-}
-
-static bool pmbus_sensor_is_paged(const struct pmbus_driver_info *info,
-                  const struct pmbus_sensor_attr *attr)
-{
-    int p;
-
-    if (attr->paged)
-        return true;
-
-    /*
-     * Some attributes may be present on more than one page despite
-     * not being marked with the paged attribute. If that is the case,
-     * then treat the sensor as being paged and add the page suffix to the
-     * attribute name.
-     * We don't just add the paged attribute to all such attributes, in
-     * order to maintain the un-suffixed labels in the case where the
-     * attribute is only on page 0.
-     */
-    for (p = 1; p < info->pages; p++) {
-        if (info->func[p] & attr->func)
-            return true;
-    }
-    return false;
-}
-
-static int pmbus_add_sensor_attrs(struct i2c_client *client,
-                  struct pmbus_data *data,
-                  const char *name,
-                  const struct pmbus_sensor_attr *attrs,
-                  int nattrs)
-{
-    const struct pmbus_driver_info *info = data->info;
-    int index, i;
-    int ret;
-
-    index = 1;
-    for (i = 0; i < nattrs; i++) {
-        int page, pages;
-        bool paged = pmbus_sensor_is_paged(info, attrs);
-
-        pages = paged ? info->pages : 1;
-        for (page = 0; page < pages; page++) {
-            if (!(info->func[page] & attrs->func))
-                continue;
-            ret = pmbus_add_sensor_attrs_one(client, data, info,
-                             name, index, page,
-                             0xff, attrs, paged);
-            if (ret)
-                return ret;
-            index++;
-            if (info->phases[page]) {
-                int phase;
-
-                for (phase = 0; phase < info->phases[page];
-                     phase++) {
-                    if (!(info->pfunc[phase] & attrs->func))
-                        continue;
-                    ret = pmbus_add_sensor_attrs_one(client,
-                        data, info, name, index, page,
-                        phase, attrs, paged);
-                    if (ret)
-                        return ret;
-                    index++;
-                }
-            }
-        }
-        attrs++;
-    }
-    return 0;
-}
-
-static const struct pmbus_limit_attr vin_limit_attrs[] = {
-    {
-        .reg = PMBUS_VIN_UV_WARN_LIMIT,
-        .attr = "min",
-        .alarm = "min_alarm",
-        .sbit = PB_VOLTAGE_UV_WARNING,
-    }, {
-        .reg = PMBUS_VIN_UV_FAULT_LIMIT,
-        .attr = "lcrit",
-        .alarm = "lcrit_alarm",
-        .sbit = PB_VOLTAGE_UV_FAULT,
-    }, {
-        .reg = PMBUS_VIN_OV_WARN_LIMIT,
-        .attr = "max",
-        .alarm = "max_alarm",
-        .sbit = PB_VOLTAGE_OV_WARNING,
-    }, {
-        .reg = PMBUS_VIN_OV_FAULT_LIMIT,
-        .attr = "crit",
-        .alarm = "crit_alarm",
-        .sbit = PB_VOLTAGE_OV_FAULT,
-    }, {
-        .reg = PMBUS_VIRT_READ_VIN_AVG,
-        .update = true,
-        .attr = "average",
-    }, {
-        .reg = PMBUS_VIRT_READ_VIN_MIN,
-        .update = true,
-        .attr = "lowest",
-    }, {
-        .reg = PMBUS_VIRT_READ_VIN_MAX,
-        .update = true,
-        .attr = "highest",
-    }, {
-        .reg = PMBUS_VIRT_RESET_VIN_HISTORY,
-        .attr = "reset_history",
-    }, {
-        .reg = PMBUS_MFR_VIN_MIN,
-        .attr = "rated_min",
-    }, {
-        .reg = PMBUS_MFR_VIN_MAX,
-        .attr = "rated_max",
-    },
-};
-
-static const struct pmbus_limit_attr vmon_limit_attrs[] = {
-    {
-        .reg = PMBUS_VIRT_VMON_UV_WARN_LIMIT,
-        .attr = "min",
-        .alarm = "min_alarm",
-        .sbit = PB_VOLTAGE_UV_WARNING,
-    }, {
-        .reg = PMBUS_VIRT_VMON_UV_FAULT_LIMIT,
-        .attr = "lcrit",
-        .alarm = "lcrit_alarm",
-        .sbit = PB_VOLTAGE_UV_FAULT,
-    }, {
-        .reg = PMBUS_VIRT_VMON_OV_WARN_LIMIT,
-        .attr = "max",
-        .alarm = "max_alarm",
-        .sbit = PB_VOLTAGE_OV_WARNING,
-    }, {
-        .reg = PMBUS_VIRT_VMON_OV_FAULT_LIMIT,
-        .attr = "crit",
-        .alarm = "crit_alarm",
-        .sbit = PB_VOLTAGE_OV_FAULT,
-    }
-};
-
-static const struct pmbus_limit_attr vout_limit_attrs[] = {
-    {
-        .reg = PMBUS_VOUT_UV_WARN_LIMIT,
-        .attr = "min",
-        .alarm = "min_alarm",
-        .sbit = PB_VOLTAGE_UV_WARNING,
-    }, {
-        .reg = PMBUS_VOUT_UV_FAULT_LIMIT,
-        .attr = "lcrit",
-        .alarm = "lcrit_alarm",
-        .sbit = PB_VOLTAGE_UV_FAULT,
-    }, {
-        .reg = PMBUS_VOUT_OV_WARN_LIMIT,
-        .attr = "max",
-        .alarm = "max_alarm",
-        .sbit = PB_VOLTAGE_OV_WARNING,
-    }, {
-        .reg = PMBUS_VOUT_OV_FAULT_LIMIT,
-        .attr = "crit",
-        .alarm = "crit_alarm",
-        .sbit = PB_VOLTAGE_OV_FAULT,
-    }, {
-        .reg = PMBUS_VIRT_READ_VOUT_AVG,
-        .update = true,
-        .attr = "average",
-    }, {
-        .reg = PMBUS_VIRT_READ_VOUT_MIN,
-        .update = true,
-        .attr = "lowest",
-    }, {
-        .reg = PMBUS_VIRT_READ_VOUT_MAX,
-        .update = true,
-        .attr = "highest",
-    }, {
-        .reg = PMBUS_VIRT_RESET_VOUT_HISTORY,
-        .attr = "reset_history",
-    }, {
-        .reg = PMBUS_MFR_VOUT_MIN,
-        .attr = "rated_min",
-    }, {
-        .reg = PMBUS_MFR_VOUT_MAX,
-        .attr = "rated_max",
-    },
-};
-
-static const struct pmbus_sensor_attr voltage_attributes[] = {
-    {
-        .reg = PMBUS_READ_VIN,
-        .class = PSC_VOLTAGE_IN,
-        .label = "vin",
-        .func = PMBUS_HAVE_VIN,
-        .sfunc = PMBUS_HAVE_STATUS_INPUT,
-        .sreg = PMBUS_STATUS_INPUT,
-        .gbit = PB_STATUS_VIN_UV,
-        .limit = vin_limit_attrs,
-        .nlimit = 0,
-    }, {
-        .reg = PMBUS_VIRT_READ_VMON,
-        .class = PSC_VOLTAGE_IN,
-        .label = "vmon",
-        .func = PMBUS_HAVE_VMON,
-        .sfunc = PMBUS_HAVE_STATUS_VMON,
-        .sreg = PMBUS_VIRT_STATUS_VMON,
-        .limit = vmon_limit_attrs,
-        .nlimit = 0,
-    }, {
-        .reg = PMBUS_READ_VCAP,
-        .class = PSC_VOLTAGE_IN,
-        .label = "vcap",
-        .func = PMBUS_HAVE_VCAP,
-    }, {
-        .reg = PMBUS_READ_VOUT,
-        .class = PSC_VOLTAGE_OUT,
-        .label = "vout",
-        .paged = true,
-        .func = PMBUS_HAVE_VOUT,
-        .sfunc = PMBUS_HAVE_STATUS_VOUT,
-        .sreg = PMBUS_STATUS_VOUT,
-        .gbit = PB_STATUS_VOUT_OV,
-        .limit = vout_limit_attrs,
-        .nlimit = 0,
-    }
-};
-
-/* Current attributes */
-
-static const struct pmbus_limit_attr iin_limit_attrs[] = {
-    {
-        .reg = PMBUS_IIN_OC_WARN_LIMIT,
-        .attr = "max",
-        .alarm = "max_alarm",
-        .sbit = PB_IIN_OC_WARNING,
-    }, {
-        .reg = PMBUS_IIN_OC_FAULT_LIMIT,
-        .attr = "crit",
-        .alarm = "crit_alarm",
-        .sbit = PB_IIN_OC_FAULT,
-    }, {
-        .reg = PMBUS_VIRT_READ_IIN_AVG,
-        .update = true,
-        .attr = "average",
-    }, {
-        .reg = PMBUS_VIRT_READ_IIN_MIN,
-        .update = true,
-        .attr = "lowest",
-    }, {
-        .reg = PMBUS_VIRT_READ_IIN_MAX,
-        .update = true,
-        .attr = "highest",
-    }, {
-        .reg = PMBUS_VIRT_RESET_IIN_HISTORY,
-        .attr = "reset_history",
-    }, {
-        .reg = PMBUS_MFR_IIN_MAX,
-        .attr = "rated_max",
-    },
-};
-
-static const struct pmbus_limit_attr iout_limit_attrs[] = {
-    {
-        .reg = PMBUS_IOUT_OC_WARN_LIMIT,
-        .attr = "max",
-        .alarm = "max_alarm",
-        .sbit = PB_IOUT_OC_WARNING,
-    }, {
-        .reg = PMBUS_IOUT_UC_FAULT_LIMIT,
-        .attr = "lcrit",
-        .alarm = "lcrit_alarm",
-        .sbit = PB_IOUT_UC_FAULT,
-    }, {
-        .reg = PMBUS_IOUT_OC_FAULT_LIMIT,
-        .attr = "crit",
-        .alarm = "crit_alarm",
-        .sbit = PB_IOUT_OC_FAULT,
-    }, {
-        .reg = PMBUS_VIRT_READ_IOUT_AVG,
-        .update = true,
-        .attr = "average",
-    }, {
-        .reg = PMBUS_VIRT_READ_IOUT_MIN,
-        .update = true,
-        .attr = "lowest",
-    }, {
-        .reg = PMBUS_VIRT_READ_IOUT_MAX,
-        .update = true,
-        .attr = "highest",
-    }, {
-        .reg = PMBUS_VIRT_RESET_IOUT_HISTORY,
-        .attr = "reset_history",
-    }, {
-        .reg = PMBUS_MFR_IOUT_MAX,
-        .attr = "rated_max",
-    },
-};
-
-static const struct pmbus_sensor_attr current_attributes[] = {
-    {
-        .reg = PMBUS_READ_IIN,
-        .class = PSC_CURRENT_IN,
-        .label = "iin",
-        .func = PMBUS_HAVE_IIN,
-        .sfunc = PMBUS_HAVE_STATUS_INPUT,
-        .sreg = PMBUS_STATUS_INPUT,
-        .gbit = PB_STATUS_INPUT,
-        .limit = iin_limit_attrs,
-        .nlimit = 0,
-    }, {
-        .reg = PMBUS_READ_IOUT,
-        .class = PSC_CURRENT_OUT,
-        .label = "iout",
-        .paged = true,
-        .func = PMBUS_HAVE_IOUT,
-        .sfunc = PMBUS_HAVE_STATUS_IOUT,
-        .sreg = PMBUS_STATUS_IOUT,
-        .gbit = PB_STATUS_IOUT_OC,
-        .limit = iout_limit_attrs,
-        .nlimit = 0,
-    }
-};
-
-/* Power attributes */
-
-static const struct pmbus_limit_attr pin_limit_attrs[] = {
-    {
-        .reg = PMBUS_PIN_OP_WARN_LIMIT,
-        .attr = "max",
-        .alarm = "alarm",
-        .sbit = PB_PIN_OP_WARNING,
-    }, {
-        .reg = PMBUS_VIRT_READ_PIN_AVG,
-        .update = true,
-        .attr = "average",
-    }, {
-        .reg = PMBUS_VIRT_READ_PIN_MIN,
-        .update = true,
-        .attr = "input_lowest",
-    }, {
-        .reg = PMBUS_VIRT_READ_PIN_MAX,
-        .update = true,
-        .attr = "input_highest",
-    }, {
-        .reg = PMBUS_VIRT_RESET_PIN_HISTORY,
-        .attr = "reset_history",
-    }, {
-        .reg = PMBUS_MFR_PIN_MAX,
-        .attr = "rated_max",
-    },
-};
-
-static const struct pmbus_limit_attr pout_limit_attrs[] = {
-    {
-        .reg = PMBUS_POUT_MAX,
-        .attr = "cap",
-        .alarm = "cap_alarm",
-        .sbit = PB_POWER_LIMITING,
-    }, {
-        .reg = PMBUS_POUT_OP_WARN_LIMIT,
-        .attr = "max",
-        .alarm = "max_alarm",
-        .sbit = PB_POUT_OP_WARNING,
-    }, {
-        .reg = PMBUS_POUT_OP_FAULT_LIMIT,
-        .attr = "crit",
-        .alarm = "crit_alarm",
-        .sbit = PB_POUT_OP_FAULT,
-    }, {
-        .reg = PMBUS_VIRT_READ_POUT_AVG,
-        .update = true,
-        .attr = "average",
-    }, {
-        .reg = PMBUS_VIRT_READ_POUT_MIN,
-        .update = true,
-        .attr = "input_lowest",
-    }, {
-        .reg = PMBUS_VIRT_READ_POUT_MAX,
-        .update = true,
-        .attr = "input_highest",
-    }, {
-        .reg = PMBUS_VIRT_RESET_POUT_HISTORY,
-        .attr = "reset_history",
-    }, {
-        .reg = PMBUS_MFR_POUT_MAX,
-        .attr = "rated_max",
-    },
-};
-
-static const struct pmbus_sensor_attr power_attributes[] = {
-    {
-        .reg = PMBUS_READ_PIN,
-        .class = PSC_POWER,
-        .label = "pin",
-        .func = PMBUS_HAVE_PIN,
-        .sfunc = PMBUS_HAVE_STATUS_INPUT,
-        .sreg = PMBUS_STATUS_INPUT,
-        .gbit = PB_STATUS_INPUT,
-        .limit = pin_limit_attrs,
-        .nlimit = 0,
-    }, {
-        .reg = PMBUS_READ_POUT,
-        .class = PSC_POWER,
-        .label = "pout",
-        .paged = true,
-        .func = PMBUS_HAVE_POUT,
-        .sfunc = PMBUS_HAVE_STATUS_IOUT,
-        .sreg = PMBUS_STATUS_IOUT,
-        .limit = pout_limit_attrs,
-        .nlimit = 0,
-    }
-};
-
-/* Temperature atributes */
-
-static const struct pmbus_limit_attr temp_limit_attrs[] = {
-    {
-        .reg = PMBUS_UT_WARN_LIMIT,
-        .low = true,
-        .attr = "min",
-        .alarm = "min_alarm",
-        .sbit = PB_TEMP_UT_WARNING,
-    }, {
-        .reg = PMBUS_UT_FAULT_LIMIT,
-        .low = true,
-        .attr = "lcrit",
-        .alarm = "lcrit_alarm",
-        .sbit = PB_TEMP_UT_FAULT,
-    }, {
-        .reg = PMBUS_OT_WARN_LIMIT,
-        .attr = "max",
-        .alarm = "max_alarm",
-        .sbit = PB_TEMP_OT_WARNING,
-    }, {
-        .reg = PMBUS_OT_FAULT_LIMIT,
-        .attr = "crit",
-        .alarm = "crit_alarm",
-        .sbit = PB_TEMP_OT_FAULT,
-    }, {
-        .reg = PMBUS_VIRT_READ_TEMP_MIN,
-        .attr = "lowest",
-    }, {
-        .reg = PMBUS_VIRT_READ_TEMP_AVG,
-        .attr = "average",
-    }, {
-        .reg = PMBUS_VIRT_READ_TEMP_MAX,
-        .attr = "highest",
-    }, {
-        .reg = PMBUS_VIRT_RESET_TEMP_HISTORY,
-        .attr = "reset_history",
-    }, {
-        .reg = PMBUS_MFR_MAX_TEMP_1,
-        .attr = "rated_max",
-    },
-};
-
-static const struct pmbus_limit_attr temp_limit_attrs2[] = {
-    {
-        .reg = PMBUS_UT_WARN_LIMIT,
-        .low = true,
-        .attr = "min",
-        .alarm = "min_alarm",
-        .sbit = PB_TEMP_UT_WARNING,
-    }, {
-        .reg = PMBUS_UT_FAULT_LIMIT,
-        .low = true,
-        .attr = "lcrit",
-        .alarm = "lcrit_alarm",
-        .sbit = PB_TEMP_UT_FAULT,
-    }, {
-        .reg = PMBUS_OT_WARN_LIMIT,
-        .attr = "max",
-        .alarm = "max_alarm",
-        .sbit = PB_TEMP_OT_WARNING,
-    }, {
-        .reg = PMBUS_OT_FAULT_LIMIT,
-        .attr = "crit",
-        .alarm = "crit_alarm",
-        .sbit = PB_TEMP_OT_FAULT,
-    }, {
-        .reg = PMBUS_VIRT_READ_TEMP2_MIN,
-        .attr = "lowest",
-    }, {
-        .reg = PMBUS_VIRT_READ_TEMP2_AVG,
-        .attr = "average",
-    }, {
-        .reg = PMBUS_VIRT_READ_TEMP2_MAX,
-        .attr = "highest",
-    }, {
-        .reg = PMBUS_VIRT_RESET_TEMP2_HISTORY,
-        .attr = "reset_history",
-    }, {
-        .reg = PMBUS_MFR_MAX_TEMP_2,
-        .attr = "rated_max",
-    },
-};
-
-static const struct pmbus_limit_attr temp_limit_attrs3[] = {
-    {
-        .reg = PMBUS_UT_WARN_LIMIT,
-        .low = true,
-        .attr = "min",
-        .alarm = "min_alarm",
-        .sbit = PB_TEMP_UT_WARNING,
-    }, {
-        .reg = PMBUS_UT_FAULT_LIMIT,
-        .low = true,
-        .attr = "lcrit",
-        .alarm = "lcrit_alarm",
-        .sbit = PB_TEMP_UT_FAULT,
-    }, {
-        .reg = PMBUS_OT_WARN_LIMIT,
-        .attr = "max",
-        .alarm = "max_alarm",
-        .sbit = PB_TEMP_OT_WARNING,
-    }, {
-        .reg = PMBUS_OT_FAULT_LIMIT,
-        .attr = "crit",
-        .alarm = "crit_alarm",
-        .sbit = PB_TEMP_OT_FAULT,
-    }, {
-        .reg = PMBUS_MFR_MAX_TEMP_3,
-        .attr = "rated_max",
-    },
-};
-
-static const struct pmbus_sensor_attr temp_attributes[] = {
-    {
-        .reg = PMBUS_READ_TEMPERATURE_1,
-        .class = PSC_TEMPERATURE,
-        .paged = true,
-        .update = true,
-        .compare = true,
-        .func = PMBUS_HAVE_TEMP,
-        .sfunc = PMBUS_HAVE_STATUS_TEMP,
-        .sreg = PMBUS_STATUS_TEMPERATURE,
-        .gbit = PB_STATUS_TEMPERATURE,
-        .limit = temp_limit_attrs,
-        .nlimit = 0,
-    }, {
-        .reg = PMBUS_READ_TEMPERATURE_2,
-        .class = PSC_TEMPERATURE,
-        .paged = true,
-        .update = true,
-        .compare = true,
-        .func = PMBUS_HAVE_TEMP2,
-        .sfunc = PMBUS_HAVE_STATUS_TEMP,
-        .sreg = PMBUS_STATUS_TEMPERATURE,
-        .gbit = PB_STATUS_TEMPERATURE,
-        .limit = temp_limit_attrs2,
-        .nlimit = 0,
-    }, {
-        .reg = PMBUS_READ_TEMPERATURE_3,
-        .class = PSC_TEMPERATURE,
-        .paged = true,
-        .update = true,
-        .compare = true,
-        .func = PMBUS_HAVE_TEMP3,
-        .sfunc = PMBUS_HAVE_STATUS_TEMP,
-        .sreg = PMBUS_STATUS_TEMPERATURE,
-        .gbit = PB_STATUS_TEMPERATURE,
-        .limit = temp_limit_attrs3,
-        .nlimit = 0,
-    }
-};
-
-static const int pmbus_fan_registers[] = {
-    PMBUS_READ_FAN_SPEED_1,
-    PMBUS_READ_FAN_SPEED_2,
-    PMBUS_READ_FAN_SPEED_3,
-    PMBUS_READ_FAN_SPEED_4
-};
-
-static const int pmbus_fan_status_registers[] = {
-    PMBUS_STATUS_FAN_12,
-    PMBUS_STATUS_FAN_12,
-    PMBUS_STATUS_FAN_34,
-    PMBUS_STATUS_FAN_34
-};
-
-static const u32 pmbus_fan_flags[] = {
-    PMBUS_HAVE_FAN12,
-    PMBUS_HAVE_FAN12,
-    PMBUS_HAVE_FAN34,
-    PMBUS_HAVE_FAN34
-};
-
-static const u32 pmbus_fan_status_flags[] = {
-    PMBUS_HAVE_STATUS_FAN12,
-    PMBUS_HAVE_STATUS_FAN12,
-    PMBUS_HAVE_STATUS_FAN34,
-    PMBUS_HAVE_STATUS_FAN34
-};
-
-/* Fans */
-
-/* Precondition: FAN_CONFIG_x_y and FAN_COMMAND_x must exist for the fan ID */
-static int pmbus_add_fan_ctrl(struct i2c_client *client,
-        struct pmbus_data *data, int index, int page, int id,
-        u8 config)
-{
-    struct pmbus_sensor *sensor;
-
-    sensor = pmbus_add_sensor(data, "fan", "target", index, page,
-                  0xff, PMBUS_VIRT_FAN_TARGET_1 + id, PSC_FAN,
-                  false, false, true);
-
-    if (!sensor)
-        return -ENOMEM;
-
-    if (!((data->info->func[page] & PMBUS_HAVE_PWM12) ||
-            (data->info->func[page] & PMBUS_HAVE_PWM34)))
-        return 0;
-
-    sensor = pmbus_add_sensor(data, "pwm", NULL, index, page,
-                  0xff, PMBUS_VIRT_PWM_1 + id, PSC_PWM,
-                  false, false, true);
-
-    if (!sensor)
-        return -ENOMEM;
-
-    sensor = pmbus_add_sensor(data, "pwm", "enable", index, page,
-                  0xff, PMBUS_VIRT_PWM_ENABLE_1 + id, PSC_PWM,
-                  true, false, false);
-
-    if (!sensor)
-        return -ENOMEM;
-
-    return 0;
-}
-
-static int pmbus_add_fan_attributes(struct i2c_client *client,
-                    struct pmbus_data *data)
-{
-    const struct pmbus_driver_info *info = data->info;
-    int index = 1;
-    int page;
-    int ret;
-
-    for (page = 0; page < info->pages; page++) {
-        int f;
-
-        for (f = 0; f < ARRAY_SIZE(pmbus_fan_registers); f++) {
-            int regval;
-
-            if (!(info->func[page] & pmbus_fan_flags[f]))
-                break;
-
-            if (!wb_pmbus_check_word_register(client, page,
-                               pmbus_fan_registers[f]))
-                break;
-
-            /*
-             * Skip fan if not installed.
-             * Each fan configuration register covers multiple fans,
-             * so we have to do some magic.
-             */
-            regval = _pmbus_read_byte_data(client, page,
-                pmbus_fan_config_registers[f]);
-            if (regval < 0 ||
-                (!(regval & (PB_FAN_1_INSTALLED >> ((f & 1) * 4)))))
-                continue;
-
-            if (pmbus_add_sensor(data, "fan", "input", index,
-                         page, 0xff, pmbus_fan_registers[f],
-                         PSC_FAN, true, true, true) == NULL)
-                return -ENOMEM;
-
-            /* Fan control */
-            if (wb_pmbus_check_word_register(client, page,
-                    pmbus_fan_command_registers[f])) {
-                ret = pmbus_add_fan_ctrl(client, data, index,
-                             page, f, regval);
-                if (ret < 0)
-                    return ret;
-            }
-
-            /*
-             * Each fan status register covers multiple fans,
-             * so we have to do some magic.
-             */
-            if ((info->func[page] & pmbus_fan_status_flags[f]) &&
-                wb_pmbus_check_byte_register(client,
-                    page, pmbus_fan_status_registers[f])) {
-                int reg;
-
-                if (f > 1)    /* fan 3, 4 */
-                    reg = PMBUS_STATUS_FAN_34;
-                else
-                    reg = PMBUS_STATUS_FAN_12;
-                ret = pmbus_add_boolean(data, "fan",
-                    "alarm", index, NULL, NULL, page, reg,
-                    PB_FAN_FAN1_WARNING >> (f & 1));
-                if (ret)
-                    return ret;
-                ret = pmbus_add_boolean(data, "fan",
-                    "fault", index, NULL, NULL, page, reg,
-                    PB_FAN_FAN1_FAULT >> (f & 1));
-                if (ret)
-                    return ret;
-            }
-            index++;
-        }
-    }
-    return 0;
-}
-
-struct pmbus_samples_attr {
-    int reg;
-    char *name;
-};
-
-struct pmbus_samples_reg {
-    int page;
-    struct pmbus_samples_attr *attr;
-    struct device_attribute dev_attr;
-};
-
-static struct pmbus_samples_attr pmbus_samples_registers[] = {
-    {
-        .reg = PMBUS_VIRT_SAMPLES,
-        .name = "samples",
-    }, {
-        .reg = PMBUS_VIRT_IN_SAMPLES,
-        .name = "in_samples",
-    }, {
-        .reg = PMBUS_VIRT_CURR_SAMPLES,
-        .name = "curr_samples",
-    }, {
-        .reg = PMBUS_VIRT_POWER_SAMPLES,
-        .name = "power_samples",
-    }, {
-        .reg = PMBUS_VIRT_TEMP_SAMPLES,
-        .name = "temp_samples",
-    }
-};
-
-#define to_samples_reg(x) container_of(x, struct pmbus_samples_reg, dev_attr)
-
-static ssize_t pmbus_show_samples(struct device *dev,
-                  struct device_attribute *devattr, char *buf)
-{
-    int val;
-    struct i2c_client *client = to_i2c_client(dev->parent);
-    struct pmbus_samples_reg *reg = to_samples_reg(devattr);
-    struct pmbus_data *data = i2c_get_clientdata(client);
-
-    mutex_lock(&data->update_lock);
-    val = _pmbus_read_word_data(client, reg->page, 0xff, reg->attr->reg);
-    mutex_unlock(&data->update_lock);
-    if (val < 0)
-        return val;
-
-    return snprintf(buf, PAGE_SIZE, "%d\n", val);
-}
-
-static ssize_t pmbus_set_samples(struct device *dev,
-                 struct device_attribute *devattr,
-                 const char *buf, size_t count)
-{
-    int ret;
-    long val;
-    struct i2c_client *client = to_i2c_client(dev->parent);
-    struct pmbus_samples_reg *reg = to_samples_reg(devattr);
-    struct pmbus_data *data = i2c_get_clientdata(client);
-
-    if (kstrtol(buf, 0, &val) < 0)
-        return -EINVAL;
-
-    mutex_lock(&data->update_lock);
-    ret = _pmbus_write_word_data(client, reg->page, reg->attr->reg, val);
-    mutex_unlock(&data->update_lock);
-
-    return ret ? : count;
-}
-
-static int pmbus_add_samples_attr(struct pmbus_data *data, int page,
-                  struct pmbus_samples_attr *attr)
-{
-    struct pmbus_samples_reg *reg;
-
-    reg = devm_kzalloc(data->dev, sizeof(*reg), GFP_KERNEL);
-    if (!reg)
-        return -ENOMEM;
-
-    reg->attr = attr;
-    reg->page = page;
-
-    pmbus_dev_attr_init(&reg->dev_attr, attr->name, 0644,
-                pmbus_show_samples, pmbus_set_samples);
-
-    return pmbus_add_attribute(data, &reg->dev_attr.attr);
-}
-
-static int pmbus_add_samples_attributes(struct i2c_client *client,
-                    struct pmbus_data *data)
-{
-    const struct pmbus_driver_info *info = data->info;
-    int s;
-
-    if (!(info->func[0] & PMBUS_HAVE_SAMPLES))
-        return 0;
-
-    for (s = 0; s < ARRAY_SIZE(pmbus_samples_registers); s++) {
-        struct pmbus_samples_attr *attr;
-        int ret;
-
-        attr = &pmbus_samples_registers[s];
-        if (!wb_pmbus_check_word_register(client, 0, attr->reg))
-            continue;
-
-        ret = pmbus_add_samples_attr(data, 0, attr);
-        if (ret)
-            return ret;
-    }
-
-    return 0;
-}
-
-static int pmbus_find_attributes(struct i2c_client *client,
-                 struct pmbus_data *data)
-{
-    int ret;
-
-    /* Voltage sensors */
-    ret = pmbus_add_sensor_attrs(client, data, "in", voltage_attributes,
-                     ARRAY_SIZE(voltage_attributes));
-    if (ret)
-        return ret;
-
-    /* Current sensors */
-    ret = pmbus_add_sensor_attrs(client, data, "curr", current_attributes,
-                     ARRAY_SIZE(current_attributes));
-    if (ret)
-        return ret;
-
-    /* Power sensors */
-    ret = pmbus_add_sensor_attrs(client, data, "power", power_attributes,
-                     ARRAY_SIZE(power_attributes));
-    if (ret)
-        return ret;
-
-    /* Temperature sensors */
-    ret = pmbus_add_sensor_attrs(client, data, "temp", temp_attributes,
-                     ARRAY_SIZE(temp_attributes));
-    if (ret)
-        return ret;
-
-    /* Fans */
-    ret = pmbus_add_fan_attributes(client, data);
-    if (ret)
-        return ret;
-
-    ret = pmbus_add_samples_attributes(client, data);
-    return ret;
-}
-
-/*
- * Identify chip parameters.
- * This function is called for all chips.
- */
-static int pmbus_identify_common(struct i2c_client *client,
-                 struct pmbus_data *data, int page)
-{
-    int vout_mode = -1;
-
-    if (wb_pmbus_check_byte_register(client, page, PMBUS_VOUT_MODE))
-        vout_mode = _pmbus_read_byte_data(client, page,
-                          PMBUS_VOUT_MODE);
-    if (vout_mode >= 0 && vout_mode != 0xff) {
-        /*
-         * Not all chips support the VOUT_MODE command,
-         * so a failure to read it is not an error.
-         */
-        switch (vout_mode >> 5) {
-        case 0:    /* linear mode      */
-            if (data->info->format[PSC_VOLTAGE_OUT] != linear)
-                return -ENODEV;
-
-            data->exponent[page] = ((s8)(vout_mode << 3)) >> 3;
-            break;
-        case 1: /* VID mode         */
-            if (data->info->format[PSC_VOLTAGE_OUT] != vid)
-                return -ENODEV;
-            break;
-        case 2:    /* direct mode      */
-            if (data->info->format[PSC_VOLTAGE_OUT] != direct)
-                return -ENODEV;
-            break;
-        default:
-            return -ENODEV;
-        }
-    }
-
-    pmbus_clear_fault_page(client, page);
-    return 0;
-}
-
-static int pmbus_init_common(struct i2c_client *client, struct pmbus_data *data,
-                 struct pmbus_driver_info *info)
-{
-    struct device *dev = &client->dev;
-    int page, ret, i;
-
-    /*
-     * Some PMBus chips don't support PMBUS_STATUS_WORD, so try
-     * to use PMBUS_STATUS_BYTE instead if that is the case.
-     * Bail out if both registers are not supported.
-     */
-    for(i = 0; i < PMBUS_RETRY_TIME; i++) {
-        data->read_status = pmbus_read_status_word;
-        ret = i2c_smbus_read_word_data(client, PMBUS_STATUS_WORD);
-        if (ret < 0 || ret == 0xffff) {
-            data->read_status = pmbus_read_status_byte;
-            ret = i2c_smbus_read_byte_data(client, PMBUS_STATUS_BYTE);
-            if (ret < 0 || ret == 0xff) {
-                usleep_range(PMBUS_RETRY_SLEEP_TIME, PMBUS_RETRY_SLEEP_TIME + 1);
-                continue;
-            }
-        } else {
-            data->has_status_word = true;
-        }
-        break;
-    }
-
-    if(i == PMBUS_RETRY_TIME) {
-        dev_err(dev, "PMBus status register not found\n");
-        return -ENODEV;
-    }
-
-    /* Enable PEC if the controller supports it */
-    for(i = 0; i < PMBUS_RETRY_TIME; i++) {
-        ret = i2c_smbus_read_byte_data(client, PMBUS_CAPABILITY);
-        if (ret >= 0) {
-            break;
-        }
-        usleep_range(PMBUS_RETRY_SLEEP_TIME, PMBUS_RETRY_SLEEP_TIME + 1);
-    }
-
-    if (ret >= 0 && (ret & PB_CAPABILITY_ERROR_CHECK))
-        client->flags |= I2C_CLIENT_PEC;
-
-    /*
-     * Check if the chip is write protected. If it is, we can not clear
-     * faults, and we should not try it. Also, in that case, writes into
-     * limit registers need to be disabled.
-     */
-    for(i = 0; i < PMBUS_RETRY_TIME; i++) {
-        ret = i2c_smbus_read_byte_data(client, PMBUS_WRITE_PROTECT);
-        if (ret >= 0) {
-            break;
-        }
-        usleep_range(PMBUS_RETRY_SLEEP_TIME, PMBUS_RETRY_SLEEP_TIME + 1);
-    }
-
-    if (ret > 0 && (ret & PB_WP_ANY))
-        data->flags |= PMBUS_WRITE_PROTECTED | PMBUS_SKIP_STATUS_CHECK;
-
-    if (data->info->pages)
-        wb_pmbus_clear_faults(client);
-    else
-        pmbus_clear_fault_page(client, -1);
-
-    if (info->identify) {
-        ret = (*info->identify)(client, info);
-        if (ret < 0) {
-            dev_err(dev, "Chip identification failed\n");
-            return ret;
-        }
-    }
-
-    if (info->pages <= 0 || info->pages > PMBUS_PAGES) {
-        dev_err(dev, "Bad number of PMBus pages: %d\n", info->pages);
-        return -ENODEV;
-    }
-
-    for (page = 0; page < info->pages; page++) {
-        ret = pmbus_identify_common(client, data, page);
-        if (ret < 0) {
-            dev_err(dev, "Failed to identify chip capabilities\n");
-            return ret;
-        }
-    }
-    return 0;
-}
-
-#if IS_ENABLED(CONFIG_REGULATOR)
-static int pmbus_regulator_is_enabled(struct regulator_dev *rdev)
-{
-    struct device *dev = rdev_get_dev(rdev);
-    struct i2c_client *client = to_i2c_client(dev->parent);
-    u8 page = rdev_get_id(rdev);
-    int ret;
-
-    ret = wb_pmbus_read_byte_data(client, page, PMBUS_OPERATION);
-    if (ret < 0)
-        return ret;
-
-    return !!(ret & PB_OPERATION_CONTROL_ON);
-}
-
-static int _pmbus_regulator_on_off(struct regulator_dev *rdev, bool enable)
-{
-    struct device *dev = rdev_get_dev(rdev);
-    struct i2c_client *client = to_i2c_client(dev->parent);
-    u8 page = rdev_get_id(rdev);
-
-    return wb_pmbus_update_byte_data(client, page, PMBUS_OPERATION,
-                      PB_OPERATION_CONTROL_ON,
-                      enable ? PB_OPERATION_CONTROL_ON : 0);
-}
-
-static int pmbus_regulator_enable(struct regulator_dev *rdev)
-{
-    return _pmbus_regulator_on_off(rdev, 1);
-}
-
-static int pmbus_regulator_disable(struct regulator_dev *rdev)
-{
-    return _pmbus_regulator_on_off(rdev, 0);
-}
-
-const struct regulator_ops wb_pmbus_regulator_ops = {
-    .enable = pmbus_regulator_enable,
-    .disable = pmbus_regulator_disable,
-    .is_enabled = pmbus_regulator_is_enabled,
-};
-EXPORT_SYMBOL_GPL(wb_pmbus_regulator_ops);
-
-static int pmbus_regulator_register(struct pmbus_data *data)
-{
-    struct device *dev = data->dev;
-    const struct pmbus_driver_info *info = data->info;
-    const struct pmbus_platform_data *pdata = dev_get_platdata(dev);
-    struct regulator_dev *rdev;
-    int i;
-
-    for (i = 0; i < info->num_regulators; i++) {
-        struct regulator_config config = { };
-
-        config.dev = dev;
-        config.driver_data = data;
-
-        if (pdata && pdata->reg_init_data)
-            config.init_data = &pdata->reg_init_data[i];
-
-        rdev = devm_regulator_register(dev, &info->reg_desc[i],
-                           &config);
-        if (IS_ERR(rdev)) {
-            dev_err(dev, "Failed to register %s regulator\n",
-                info->reg_desc[i].name);
-            return PTR_ERR(rdev);
-        }
-    }
-
-    return 0;
-}
-#else
-static int pmbus_regulator_register(struct pmbus_data *data)
-{
-    return 0;
-}
-#endif
-
-static struct dentry *pmbus_debugfs_dir;    /* pmbus debugfs directory */
-
-#if IS_ENABLED(CONFIG_DEBUG_FS)
-static int pmbus_debugfs_get(void *data, u64 *val)
-{
-    int rc;
-    struct pmbus_debugfs_entry *entry = data;
-
-    rc = _pmbus_read_byte_data(entry->client, entry->page, entry->reg);
-    if (rc < 0)
-        return rc;
-
-    *val = rc;
-
-    return 0;
-}
-DEFINE_DEBUGFS_ATTRIBUTE(pmbus_debugfs_ops, pmbus_debugfs_get, NULL,
-             "0x%02llx\n");
-
-static int pmbus_debugfs_get_status(void *data, u64 *val)
-{
-    int rc;
-    struct pmbus_debugfs_entry *entry = data;
-    struct pmbus_data *pdata = i2c_get_clientdata(entry->client);
-
-    rc = pdata->read_status(entry->client, entry->page);
-    if (rc < 0)
-        return rc;
-
-    *val = rc;
-
-    return 0;
-}
-DEFINE_DEBUGFS_ATTRIBUTE(pmbus_debugfs_ops_status, pmbus_debugfs_get_status,
-             NULL, "0x%04llx\n");
-
-static int pmbus_debugfs_get_pec(void *data, u64 *val)
-{
-    struct i2c_client *client = data;
-
-    *val = !!(client->flags & I2C_CLIENT_PEC);
-
-    return 0;
-}
-
-static int pmbus_debugfs_set_pec(void *data, u64 val)
-{
-    int rc;
-    struct i2c_client *client = data;
-
-    if (!val) {
-        client->flags &= ~I2C_CLIENT_PEC;
-        return 0;
-    }
-
-    if (val != 1)
-        return -EINVAL;
-
-    rc = i2c_smbus_read_byte_data(client, PMBUS_CAPABILITY);
-    if (rc < 0)
-        return rc;
-
-    if (!(rc & PB_CAPABILITY_ERROR_CHECK))
-        return -EOPNOTSUPP;
-
-    client->flags |= I2C_CLIENT_PEC;
-
-    return 0;
-}
-DEFINE_DEBUGFS_ATTRIBUTE(pmbus_debugfs_ops_pec, pmbus_debugfs_get_pec,
-             pmbus_debugfs_set_pec, "%llu\n");
-
-static int pmbus_init_debugfs(struct i2c_client *client,
-                  struct pmbus_data *data)
-{
-    int i, idx = 0;
-    char name[PMBUS_NAME_SIZE];
-    struct pmbus_debugfs_entry *entries;
-
-    if (!pmbus_debugfs_dir)
-        return -ENODEV;
-
-    /*
-     * Create the debugfs directory for this device. Use the hwmon device
-     * name to avoid conflicts (hwmon numbers are globally unique).
-     */
-    data->debugfs = debugfs_create_dir(dev_name(data->hwmon_dev),
-                       pmbus_debugfs_dir);
-    if (IS_ERR_OR_NULL(data->debugfs)) {
-        data->debugfs = NULL;
-        return -ENODEV;
-    }
-
-    /* Allocate the max possible entries we need. */
-    entries = devm_kcalloc(data->dev,
-                   data->info->pages * 10, sizeof(*entries),
-                   GFP_KERNEL);
-    if (!entries)
-        return -ENOMEM;
-
-    debugfs_create_file("pec", 0664, data->debugfs, client,
-                &pmbus_debugfs_ops_pec);
-
-    for (i = 0; i < data->info->pages; ++i) {
-        /* Check accessibility of status register if it's not page 0 */
-        if (!i || pmbus_check_status_register(client, i)) {
-            /* No need to set reg as we have special read op. */
-            entries[idx].client = client;
-            entries[idx].page = i;
-            scnprintf(name, PMBUS_NAME_SIZE, "status%d", i);
-            debugfs_create_file(name, 0444, data->debugfs,
-                        &entries[idx++],
-                        &pmbus_debugfs_ops_status);
-        }
-
-        if (data->info->func[i] & PMBUS_HAVE_STATUS_VOUT) {
-            entries[idx].client = client;
-            entries[idx].page = i;
-            entries[idx].reg = PMBUS_STATUS_VOUT;
-            scnprintf(name, PMBUS_NAME_SIZE, "status%d_vout", i);
-            debugfs_create_file(name, 0444, data->debugfs,
-                        &entries[idx++],
-                        &pmbus_debugfs_ops);
-        }
-
-        if (data->info->func[i] & PMBUS_HAVE_STATUS_IOUT) {
-            entries[idx].client = client;
-            entries[idx].page = i;
-            entries[idx].reg = PMBUS_STATUS_IOUT;
-            scnprintf(name, PMBUS_NAME_SIZE, "status%d_iout", i);
-            debugfs_create_file(name, 0444, data->debugfs,
-                        &entries[idx++],
-                        &pmbus_debugfs_ops);
-        }
-
-        if (data->info->func[i] & PMBUS_HAVE_STATUS_INPUT) {
-            entries[idx].client = client;
-            entries[idx].page = i;
-            entries[idx].reg = PMBUS_STATUS_INPUT;
-            scnprintf(name, PMBUS_NAME_SIZE, "status%d_input", i);
-            debugfs_create_file(name, 0444, data->debugfs,
-                        &entries[idx++],
-                        &pmbus_debugfs_ops);
-        }
-
-        if (data->info->func[i] & PMBUS_HAVE_STATUS_TEMP) {
-            entries[idx].client = client;
-            entries[idx].page = i;
-            entries[idx].reg = PMBUS_STATUS_TEMPERATURE;
-            scnprintf(name, PMBUS_NAME_SIZE, "status%d_temp", i);
-            debugfs_create_file(name, 0444, data->debugfs,
-                        &entries[idx++],
-                        &pmbus_debugfs_ops);
-        }
-
-        if (wb_pmbus_check_byte_register(client, i, PMBUS_STATUS_CML)) {
-            entries[idx].client = client;
-            entries[idx].page = i;
-            entries[idx].reg = PMBUS_STATUS_CML;
-            scnprintf(name, PMBUS_NAME_SIZE, "status%d_cml", i);
-            debugfs_create_file(name, 0444, data->debugfs,
-                        &entries[idx++],
-                        &pmbus_debugfs_ops);
-        }
-
-        if (wb_pmbus_check_byte_register(client, i, PMBUS_STATUS_OTHER)) {
-            entries[idx].client = client;
-            entries[idx].page = i;
-            entries[idx].reg = PMBUS_STATUS_OTHER;
-            scnprintf(name, PMBUS_NAME_SIZE, "status%d_other", i);
-            debugfs_create_file(name, 0444, data->debugfs,
-                        &entries[idx++],
-                        &pmbus_debugfs_ops);
-        }
-
-        if (wb_pmbus_check_byte_register(client, i,
-                          PMBUS_STATUS_MFR_SPECIFIC)) {
-            entries[idx].client = client;
-            entries[idx].page = i;
-            entries[idx].reg = PMBUS_STATUS_MFR_SPECIFIC;
-            scnprintf(name, PMBUS_NAME_SIZE, "status%d_mfr", i);
-            debugfs_create_file(name, 0444, data->debugfs,
-                        &entries[idx++],
-                        &pmbus_debugfs_ops);
-        }
-
-        if (data->info->func[i] & PMBUS_HAVE_STATUS_FAN12) {
-            entries[idx].client = client;
-            entries[idx].page = i;
-            entries[idx].reg = PMBUS_STATUS_FAN_12;
-            scnprintf(name, PMBUS_NAME_SIZE, "status%d_fan12", i);
-            debugfs_create_file(name, 0444, data->debugfs,
-                        &entries[idx++],
-                        &pmbus_debugfs_ops);
-        }
-
-        if (data->info->func[i] & PMBUS_HAVE_STATUS_FAN34) {
-            entries[idx].client = client;
-            entries[idx].page = i;
-            entries[idx].reg = PMBUS_STATUS_FAN_34;
-            scnprintf(name, PMBUS_NAME_SIZE, "status%d_fan34", i);
-            debugfs_create_file(name, 0444, data->debugfs,
-                        &entries[idx++],
-                        &pmbus_debugfs_ops);
-        }
-    }
-
-    return 0;
-}
-#else
-static int pmbus_init_debugfs(struct i2c_client *client,
-                  struct pmbus_data *data)
-{
-    return 0;
-}
-#endif    /* IS_ENABLED(CONFIG_DEBUG_FS) */
-
-int wb_pmbus_do_probe(struct i2c_client *client, struct pmbus_driver_info *info)
-{
-    struct device *dev = &client->dev;
-    const struct pmbus_platform_data *pdata = dev_get_platdata(dev);
-    struct pmbus_data *data;
-    size_t groups_num = 0;
-    int ret;
-
-    if (!info)
-        return -ENODEV;
-
-    if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_WRITE_BYTE
-                     | I2C_FUNC_SMBUS_BYTE_DATA
-                     | I2C_FUNC_SMBUS_WORD_DATA))
-        return -ENODEV;
-
-    data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
-    if (!data)
-        return -ENOMEM;
-
-    if (info->groups)
-        while (info->groups[groups_num])
-            groups_num++;
-
-    data->groups = devm_kcalloc(dev, groups_num + 2, sizeof(void *),
-                    GFP_KERNEL);
-    if (!data->groups)
-        return -ENOMEM;
-
-    i2c_set_clientdata(client, data);
-    mutex_init(&data->update_lock);
-    data->dev = dev;
-
-    if (pdata)
-        data->flags = pdata->flags;
-    data->info = info;
-    data->currpage = -1;
-    data->currphase = -1;
-
-    ret = pmbus_init_common(client, data, info);
-    if (ret < 0)
-        return ret;
-
-    ret = pmbus_find_attributes(client, data);
-    if (ret)
-        return ret;
-
-    /*
-     * If there are no attributes, something is wrong.
-     * Bail out instead of trying to register nothing.
-     */
-    if (!data->num_attributes) {
-        dev_err(dev, "No attributes found\n");
-        return -ENODEV;
-    }
-
-    data->groups[0] = &data->group;
-    memcpy(data->groups + 1, info->groups, sizeof(void *) * groups_num);
-    data->hwmon_dev = devm_hwmon_device_register_with_groups(dev,
-                    client->name, data, data->groups);
-    if (IS_ERR(data->hwmon_dev)) {
-        dev_err(dev, "Failed to register hwmon device\n");
-        return PTR_ERR(data->hwmon_dev);
-    }
-
-    ret = pmbus_regulator_register(data);
-    if (ret)
-        return ret;
-
-    ret = pmbus_init_debugfs(client, data);
-    if (ret)
-        dev_warn(dev, "Failed to register debugfs\n");
-
-    return 0;
-}
-EXPORT_SYMBOL_GPL(wb_pmbus_do_probe);
-
-void wb_pmbus_do_remove(struct i2c_client *client)
-{
-    struct pmbus_data *data = i2c_get_clientdata(client);
-
-    debugfs_remove_recursive(data->debugfs);
-
-    return;
-}
-EXPORT_SYMBOL_GPL(wb_pmbus_do_remove);
-
-struct dentry *wb_pmbus_get_debugfs_dir(struct i2c_client *client)
-{
-    struct pmbus_data *data = i2c_get_clientdata(client);
-
-    return data->debugfs;
-}
-EXPORT_SYMBOL_GPL(wb_pmbus_get_debugfs_dir);
-
-static int __init pmbus_core_init(void)
-{
-    pmbus_debugfs_dir = debugfs_create_dir("pmbus", NULL);
-    if (IS_ERR(pmbus_debugfs_dir))
-        pmbus_debugfs_dir = NULL;
-
-    return 0;
-}
-
-static void __exit pmbus_core_exit(void)
-{
-    debugfs_remove_recursive(pmbus_debugfs_dir);
-}
-
-module_init(pmbus_core_init);
-module_exit(pmbus_core_exit);
-
-MODULE_AUTHOR("support");
-MODULE_DESCRIPTION("PMBus core driver");
-MODULE_LICENSE("GPL");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_tmp401.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_tmp401.c
deleted file mode 100644
index b8d3a024f..000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_tmp401.c
+++ /dev/null
@@ -1,1010 +0,0 @@
-/* tmp401.c
- *
- * Copyright (C) 2007,2008 Hans de Goede <hdegoede@redhat.com>
- * Preliminary tmp411 support by:
- * Gabriel Konat, Sander Leget, Wouter Willems
- * Copyright (C) 2009 Andre Prendel <andre.prendel@gmx.de>
- *
- * Cleanup and support for TMP431 and TMP432 by Guenter Roeck
- * Copyright (c) 2013 Guenter Roeck <linux@roeck-us.net>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-/*
- * Driver for the Texas Instruments TMP401 SMBUS temperature sensor IC.
- *
- * Note this IC is in some aspect similar to the LM90, but it has quite a
- * few differences too, for example the local temp has a higher resolution
- * and thus has 16 bits registers for its value and limit instead of 8 bits.
- */
-
-#include <linux/module.h>
-#include <linux/init.h>
-#include <linux/bitops.h>
-#include <linux/slab.h>
-#include <linux/jiffies.h>
-#include <linux/i2c.h>
-#include <linux/hwmon.h>
-#include <linux/hwmon-sysfs.h>
-#include <linux/err.h>
-#include <linux/mutex.h>
-#include <linux/sysfs.h>
-#include <linux/delay.h>
-
-/* Addresses to scan */
-/* static const unsigned short normal_i2c[] = { 0x48, 0x49, 0x4a, 0x4c, 0x4d,
-	0x4e, 0x4f, I2C_CLIENT_END }; */
-
-enum chips { tmp401, tmp411, tmp431, tmp432, tmp435, tmp461 };
-
-/*
- * The TMP401 registers, note some registers have different addresses for
- * reading and writing
- */
-#define TMP401_STATUS                   (0x02)
-#define TMP401_CONFIG_READ              (0x03)
-#define TMP401_CONFIG_WRITE             (0x09)
-#define TMP401_CONVERSION_RATE_READ     (0x04)
-#define TMP401_CONVERSION_RATE_WRITE    (0x0A)
-#define TMP401_TEMP_CRIT_HYST           (0x21)
-#define TMP401_MANUFACTURER_ID_REG      (0xFE)
-#define TMP401_DEVICE_ID_REG            (0xFF)
-#define TMP401_DEVICE_CAR_REG           (0x22) /* Consecutive Alert Register */
-
-static const u8 TMP401_TEMP_MSB_READ[7][2] = {
-	{ 0x00, 0x01 },	/* temp */
-	{ 0x06, 0x08 },	/* low limit */
-	{ 0x05, 0x07 },	/* high limit */
-	{ 0x20, 0x19 },	/* therm (crit) limit */
-	{ 0x30, 0x34 },	/* lowest */
-	{ 0x32, 0x36 },	/* highest */
-	{ 0, 0x11 },	/* offset */
-};
-
-static const u8 TMP401_TEMP_MSB_WRITE[7][2] = {
-	{ 0, 0 },	/* temp (unused) */
-	{ 0x0C, 0x0E },	/* low limit */
-	{ 0x0B, 0x0D },	/* high limit */
-	{ 0x20, 0x19 },	/* therm (crit) limit */
-	{ 0x30, 0x34 },	/* lowest */
-	{ 0x32, 0x36 },	/* highest */
-	{ 0, 0x11 },	/* offset */
-};
-
-static const u8 TMP401_TEMP_LSB[7][2] = {
-	{ 0x15, 0x10 },	/* temp */
-	{ 0x17, 0x14 },	/* low limit */
-	{ 0x16, 0x13 },	/* high limit */
-	{ 0, 0 },	/* therm (crit) limit (unused) */
-	{ 0x31, 0x35 },	/* lowest */
-	{ 0x33, 0x37 },	/* highest */
-	{ 0, 0x12 },	/* offset */
-};
-
-static const u8 TMP432_TEMP_MSB_READ[4][3] = {
-	{ 0x00, 0x01, 0x23 },	/* temp */
-	{ 0x06, 0x08, 0x16 },	/* low limit */
-	{ 0x05, 0x07, 0x15 },	/* high limit */
-	{ 0x20, 0x19, 0x1A },	/* therm (crit) limit */
-};
-
-static const u8 TMP432_TEMP_MSB_WRITE[4][3] = {
-	{ 0, 0, 0 },		/* temp  - unused */
-	{ 0x0C, 0x0E, 0x16 },	/* low limit */
-	{ 0x0B, 0x0D, 0x15 },	/* high limit */
-	{ 0x20, 0x19, 0x1A },	/* therm (crit) limit */
-};
-
-static const u8 TMP432_TEMP_LSB[3][3] = {
-	{ 0x29, 0x10, 0x24 },	/* temp */
-	{ 0x3E, 0x14, 0x18 },	/* low limit */
-	{ 0x3D, 0x13, 0x17 },	/* high limit */
-};
-
-/* [0] = fault, [1] = low, [2] = high, [3] = therm/crit */
-static const u8 TMP432_STATUS_REG[] = {
-	0x1b, 0x36, 0x35, 0x37 };
-
-/* Flags */
-#define TMP401_CONFIG_RANGE             BIT(2)
-#define TMP401_CONFIG_SHUTDOWN          BIT(6)
-#define TMP401_STATUS_LOCAL_CRIT        BIT(0)
-#define TMP401_STATUS_REMOTE_CRIT       BIT(1)
-#define TMP401_STATUS_REMOTE_OPEN       BIT(2)
-#define TMP401_STATUS_REMOTE_LOW        BIT(3)
-#define TMP401_STATUS_REMOTE_HIGH       BIT(4)
-#define TMP401_STATUS_LOCAL_LOW         BIT(5)
-#define TMP401_STATUS_LOCAL_HIGH        BIT(6)
-
-/* On TMP432, each status has its own register */
-#define TMP432_STATUS_LOCAL             BIT(0)
-#define TMP432_STATUS_REMOTE1           BIT(1)
-#define TMP432_STATUS_REMOTE2           BIT(2)
-
-/* Manufacturer / Device ID's */
-#define TMP401_MANUFACTURER_ID      (0x55)
-#define TMP401_DEVICE_ID            (0x11)
-#define TMP411A_DEVICE_ID           (0x12)
-#define TMP411B_DEVICE_ID           (0x13)
-#define TMP411C_DEVICE_ID           (0x10)
-#define TMP431_DEVICE_ID            (0x31)
-#define TMP432_DEVICE_ID            (0x32)
-#define TMP435_DEVICE_ID            (0x35)
-
-/* Timeout function bit */
-#define TIMEOUT_STATE_BIT                  (7)   /* 1:enable 0:disable */
-#define TIMEOUT_STATE_EN                   (1)   /* 1:enable  */
-#define TIMEOUT_STATE_IEN                  (0)   /* 0:disable */
-#define TIMEOUT_STATE_NA                   "NA"
-#define TMP401_TEMP_INVALID_RETRY_TIMES    (3)
-
-/* input temp threshold check */
-typedef struct tmp401_temp_threshold_s {
-    int chip_type;
-    int temp_max;
-    int temp_min;
-} tmp401_temp_threshold_t;
-
-static tmp401_temp_threshold_t g_tmp401_input_threshold_info[] = {
-    {
-        .chip_type = tmp411,
-        .temp_max = 127000,
-        .temp_min = -55000,
-    },
-};
-
-/*
- * Driver data (common to all clients)
- */
-
-static const struct i2c_device_id tmp401_id[] = {
-	{ "wb_tmp401", tmp401 },
-	{ "wb_tmp411", tmp411 },
-	{ "wb_tmp431", tmp431 },
-	{ "wb_tmp432", tmp432 },
-	{ "wb_tmp435", tmp435 },
-	{ "wb_tmp461", tmp461 },
-	{ }
-};
-MODULE_DEVICE_TABLE(i2c, tmp401_id);
-
-/*
- * Client data (each client gets its own)
- */
-
-struct tmp401_data {
-	struct i2c_client *client;
-	const struct attribute_group *groups[3];
-	struct mutex update_lock;
-	char valid; /* zero until following fields are valid */
-	unsigned long last_updated; /* in jiffies */
-	enum chips kind;
-
-	unsigned int update_interval;	/* in milliseconds */
-
-	/* register values */
-	u8 status[4];
-	u8 config;
-	u16 temp[7][3];
-	u8 temp_crit_hyst;
-};
-
-/*
- * Sysfs attr show / store functions
- */
-
-static int tmp401_register_to_temp(u16 reg, u8 config)
-{
-	int temp = reg;
-
-	if (config & TMP401_CONFIG_RANGE)
-		temp -= 64 * 256;
-
-	return DIV_ROUND_CLOSEST(temp * 125, 32);
-}
-
-static u16 tmp401_temp_to_register(long temp, u8 config, int zbits)
-{
-	if (config & TMP401_CONFIG_RANGE) {
-		temp = clamp_val(temp, -64000, 191000);
-		temp += 64000;
-	} else
-		temp = clamp_val(temp, 0, 127000);
-
-	return DIV_ROUND_CLOSEST(temp * (1 << (8 - zbits)), 1000) << zbits;
-}
-
-static int tmp401_update_device_reg16(struct i2c_client *client,
-				      struct tmp401_data *data)
-{
-	int i, j, val;
-	int num_regs = data->kind == tmp411 ? 6 : 4;
-	int num_sensors = data->kind == tmp432 ? 3 : 2;
-
-	for (i = 0; i < num_sensors; i++) {		/* local / r1 / r2 */
-		for (j = 0; j < num_regs; j++) {	/* temp / low / ... */
-			u8 regaddr;
-			/*
-			 * High byte must be read first immediately followed
-			 * by the low byte
-			 */
-			regaddr = data->kind == tmp432 ?
-						TMP432_TEMP_MSB_READ[j][i] :
-						TMP401_TEMP_MSB_READ[j][i];
-			val = i2c_smbus_read_byte_data(client, regaddr);
-			if (val < 0)
-				return val;
-			data->temp[j][i] = val << 8;
-			if (j == 3)		/* crit is msb only */
-				continue;
-			regaddr = data->kind == tmp432 ? TMP432_TEMP_LSB[j][i]
-						       : TMP401_TEMP_LSB[j][i];
-			val = i2c_smbus_read_byte_data(client, regaddr);
-			if (val < 0)
-				return val;
-			data->temp[j][i] |= val;
-		}
-	}
-	return 0;
-}
-
-static struct tmp401_data *tmp401_update_device(struct device *dev)
-{
-	struct tmp401_data *data = dev_get_drvdata(dev);
-	struct i2c_client *client = data->client;
-	struct tmp401_data *ret = data;
-	int i, val;
-	unsigned long next_update;
-
-	mutex_lock(&data->update_lock);
-
-	next_update = data->last_updated +
-		      msecs_to_jiffies(data->update_interval);
-	if (time_after(jiffies, next_update) || !data->valid) {
-		if (data->kind != tmp432) {
-			/*
-			 * The driver uses the TMP432 status format internally.
-			 * Convert status to TMP432 format for other chips.
-			 */
-			val = i2c_smbus_read_byte_data(client, TMP401_STATUS);
-			if (val < 0) {
-				ret = ERR_PTR(val);
-				goto abort;
-			}
-			data->status[0] =
-			  (val & TMP401_STATUS_REMOTE_OPEN) >> 1;
-			data->status[1] =
-			  ((val & TMP401_STATUS_REMOTE_LOW) >> 2) |
-			  ((val & TMP401_STATUS_LOCAL_LOW) >> 5);
-			data->status[2] =
-			  ((val & TMP401_STATUS_REMOTE_HIGH) >> 3) |
-			  ((val & TMP401_STATUS_LOCAL_HIGH) >> 6);
-			data->status[3] = val & (TMP401_STATUS_LOCAL_CRIT
-						| TMP401_STATUS_REMOTE_CRIT);
-		} else {
-			for (i = 0; i < ARRAY_SIZE(data->status); i++) {
-				val = i2c_smbus_read_byte_data(client,
-							TMP432_STATUS_REG[i]);
-				if (val < 0) {
-					ret = ERR_PTR(val);
-					goto abort;
-				}
-				data->status[i] = val;
-			}
-		}
-
-		val = i2c_smbus_read_byte_data(client, TMP401_CONFIG_READ);
-		if (val < 0) {
-			ret = ERR_PTR(val);
-			goto abort;
-		}
-		data->config = val;
-		val = tmp401_update_device_reg16(client, data);
-		if (val < 0) {
-			ret = ERR_PTR(val);
-			goto abort;
-		}
-		val = i2c_smbus_read_byte_data(client, TMP401_TEMP_CRIT_HYST);
-		if (val < 0) {
-			ret = ERR_PTR(val);
-			goto abort;
-		}
-		data->temp_crit_hyst = val;
-
-		data->last_updated = jiffies;
-		data->valid = 1;
-	}
-
-abort:
-	mutex_unlock(&data->update_lock);
-	return ret;
-}
-
-static int tmp401_input_temp_check(struct tmp401_data *data, int input_val)
-{
-    int i, size;
-
-    size = ARRAY_SIZE(g_tmp401_input_threshold_info);
-
-    for (i = 0; i < size; i++) {
-        if (g_tmp401_input_threshold_info[i].chip_type == data->kind) {
-            if ((input_val > g_tmp401_input_threshold_info[i].temp_max)
-                    || (input_val < g_tmp401_input_threshold_info[i].temp_min)) {
-                dev_dbg(&data->client->dev, "input temp: %d not in range[%d, %d]\n",
-                    input_val, g_tmp401_input_threshold_info[i].temp_min,
-                    g_tmp401_input_threshold_info[i].temp_max);
-                return -EINVAL;
-            }
-            dev_dbg(&data->client->dev, "input temp: %d in range[%d, %d]", input_val,
-                g_tmp401_input_threshold_info[i].temp_min, g_tmp401_input_threshold_info[i].temp_max);
-            return 0;
-        }
-    }
-    return 0;
-}
-
-static ssize_t show_temp(struct device *dev, struct device_attribute *devattr, char *buf)
-{
-    int nr, index, i, value, ret;
-    struct tmp401_data *data;
-    struct i2c_client *client;
-
-    data = dev_get_drvdata(dev);
-    client = data->client;
-
-    nr = to_sensor_dev_attr_2(devattr)->nr;
-    index = to_sensor_dev_attr_2(devattr)->index;
-
-    for (i = 0; i < TMP401_TEMP_INVALID_RETRY_TIMES; i++) {
-        data = tmp401_update_device(dev);
-        if (IS_ERR(data)) {
-            return PTR_ERR(data);
-        }
-        value = tmp401_register_to_temp(data->temp[nr][index], data->config);
-        if (nr != 0) {  /* not input temp, return value */
-            return sprintf(buf, "%d\n", value);
-        }
-        /* nr == 0 is temp input, do input_temp_check */
-        ret = tmp401_input_temp_check(data, value);
-        if (ret == 0) { /* input temp check ok */
-           return sprintf(buf, "%d\n", value);
-        }
-        if ((i + 1) < TMP401_TEMP_INVALID_RETRY_TIMES) {
-            msleep(data->update_interval);
-        }
-    }
-    dev_info(&client->dev, "temp%d_input value: %d invalid\n", index + 1, value);
-    return -EINVAL;
-}
-
-static ssize_t show_temp_crit_hyst(struct device *dev,
-	struct device_attribute *devattr, char *buf)
-{
-	int temp, index = to_sensor_dev_attr(devattr)->index;
-	struct tmp401_data *data = tmp401_update_device(dev);
-
-	if (IS_ERR(data))
-		return PTR_ERR(data);
-
-	mutex_lock(&data->update_lock);
-	temp = tmp401_register_to_temp(data->temp[3][index], data->config);
-	temp -= data->temp_crit_hyst * 1000;
-	mutex_unlock(&data->update_lock);
-
-	return sprintf(buf, "%d\n", temp);
-}
-
-static ssize_t show_status(struct device *dev,
-	struct device_attribute *devattr, char *buf)
-{
-	int nr = to_sensor_dev_attr_2(devattr)->nr;
-	int mask = to_sensor_dev_attr_2(devattr)->index;
-	struct tmp401_data *data = tmp401_update_device(dev);
-
-	if (IS_ERR(data))
-		return PTR_ERR(data);
-
-	return sprintf(buf, "%d\n", !!(data->status[nr] & mask));
-}
-
-static ssize_t store_temp(struct device *dev, struct device_attribute *devattr,
-			  const char *buf, size_t count)
-{
-	int nr = to_sensor_dev_attr_2(devattr)->nr;
-	int index = to_sensor_dev_attr_2(devattr)->index;
-	struct tmp401_data *data = dev_get_drvdata(dev);
-	struct i2c_client *client = data->client;
-	long val;
-	u16 reg;
-	u8 regaddr;
-
-	if (kstrtol(buf, 10, &val))
-		return -EINVAL;
-
-	reg = tmp401_temp_to_register(val, data->config, nr == 3 ? 8 : 4);
-
-	mutex_lock(&data->update_lock);
-
-	regaddr = data->kind == tmp432 ? TMP432_TEMP_MSB_WRITE[nr][index]
-				       : TMP401_TEMP_MSB_WRITE[nr][index];
-	i2c_smbus_write_byte_data(client, regaddr, reg >> 8);
-	if (nr != 3) {
-		regaddr = data->kind == tmp432 ? TMP432_TEMP_LSB[nr][index]
-					       : TMP401_TEMP_LSB[nr][index];
-		i2c_smbus_write_byte_data(client, regaddr, reg & 0xFF);
-	}
-	data->temp[nr][index] = reg;
-
-	mutex_unlock(&data->update_lock);
-
-	return count;
-}
-
-static ssize_t store_temp_crit_hyst(struct device *dev, struct device_attribute
-	*devattr, const char *buf, size_t count)
-{
-	int temp, index = to_sensor_dev_attr(devattr)->index;
-	struct tmp401_data *data = tmp401_update_device(dev);
-	long val;
-	u8 reg;
-
-	if (IS_ERR(data))
-		return PTR_ERR(data);
-
-	if (kstrtol(buf, 10, &val))
-		return -EINVAL;
-
-	if (data->config & TMP401_CONFIG_RANGE)
-		val = clamp_val(val, -64000, 191000);
-	else
-		val = clamp_val(val, 0, 127000);
-
-	mutex_lock(&data->update_lock);
-	temp = tmp401_register_to_temp(data->temp[3][index], data->config);
-	val = clamp_val(val, temp - 255000, temp);
-	reg = ((temp - val) + 500) / 1000;
-
-	i2c_smbus_write_byte_data(data->client, TMP401_TEMP_CRIT_HYST,
-				  reg);
-
-	data->temp_crit_hyst = reg;
-
-	mutex_unlock(&data->update_lock);
-
-	return count;
-}
-
-/*
- * Resets the historical measurements of minimum and maximum temperatures.
- * This is done by writing any value to any of the minimum/maximum registers
- * (0x30-0x37).
- */
-static ssize_t reset_temp_history(struct device *dev,
-	struct device_attribute	*devattr, const char *buf, size_t count)
-{
-	struct tmp401_data *data = dev_get_drvdata(dev);
-	struct i2c_client *client = data->client;
-	long val;
-
-	if (kstrtol(buf, 10, &val))
-		return -EINVAL;
-
-	if (val != 1) {
-		dev_err(dev,
-			"temp_reset_history value %ld not supported. Use 1 to reset the history!\n",
-			val);
-		return -EINVAL;
-	}
-	mutex_lock(&data->update_lock);
-	i2c_smbus_write_byte_data(client, TMP401_TEMP_MSB_WRITE[5][0], val);
-	data->valid = 0;
-	mutex_unlock(&data->update_lock);
-
-	return count;
-}
-
-static ssize_t show_update_interval(struct device *dev,
-				    struct device_attribute *attr, char *buf)
-{
-	struct tmp401_data *data = dev_get_drvdata(dev);
-
-	return sprintf(buf, "%u\n", data->update_interval);
-}
-
-static ssize_t set_update_interval(struct device *dev,
-				   struct device_attribute *attr,
-				   const char *buf, size_t count)
-{
-	struct tmp401_data *data = dev_get_drvdata(dev);
-	struct i2c_client *client = data->client;
-	unsigned long val;
-	int err, rate;
-
-	err = kstrtoul(buf, 10, &val);
-	if (err)
-		return err;
-
-	/*
-	 * For valid rates, interval can be calculated as
-	 *	interval = (1 << (7 - rate)) * 125;
-	 * Rounded rate is therefore
-	 *	rate = 7 - __fls(interval * 4 / (125 * 3));
-	 * Use clamp_val() to avoid overflows, and to ensure valid input
-	 * for __fls.
-	 */
-	val = clamp_val(val, 125, 16000);
-	rate = 7 - __fls(val * 4 / (125 * 3));
-	mutex_lock(&data->update_lock);
-	i2c_smbus_write_byte_data(client, TMP401_CONVERSION_RATE_WRITE, rate);
-	data->update_interval = (1 << (7 - rate)) * 125;
-	mutex_unlock(&data->update_lock);
-
-	return count;
-}
-
-/*
- * Enable/disable the state of the timeout function
- * @dev: device info
- * @state: 1:enable 0:disable
- */
-static int timeout_cfg(struct device *dev, int state)
-{
-    int rv, chip_type;
-    u8 reg_value;
-    struct tmp401_data *data;
-    struct i2c_client *client;
-
-    data = dev_get_drvdata(dev);
-    client = data->client;
-
-    /* get chip type */
-    chip_type = data->kind;
-    dev_dbg(&client->dev, "set timeout. chip:%d, state:%d\n", chip_type, state);
-
-    /* chip type check */
-    if(chip_type != tmp401 && chip_type != tmp411)  {
-        dev_info(&client->dev,
-            "Chip type: %d, not support timeout config.!\n", chip_type);
-        return -EPERM;
-    }
-
-    /* parameter check */
-    if(state != TIMEOUT_STATE_EN && state != TIMEOUT_STATE_IEN) {
-        dev_err(&client->dev,
-            "Parameter check error. state: %d not supported.!\n", state);
-        return -EINVAL;
-    }
-
-    mutex_lock(&data->update_lock);
-    /* read the Consecutive alert register */
-    reg_value = i2c_smbus_read_byte_data(client, TMP401_DEVICE_CAR_REG);
-    if (reg_value < 0) {
-        dev_err(&client->dev, "Failed to read. reg:0x%0x, value:%d\n", TMP401_DEVICE_CAR_REG, reg_value);
-        mutex_unlock(&data->update_lock);
-        return -EIO;
-    }
-    dev_dbg(&client->dev, "get register value. reg:0x%0x, value:0x%0x\n", TMP401_DEVICE_CAR_REG, reg_value);
-
-    /* same value case, do not write */
-    if((u8)state == (reg_value >> TIMEOUT_STATE_BIT)) {
-        mutex_unlock(&data->update_lock);
-        dev_info(&client->dev, "timeout config has been set and the current state is %d.\n", state);
-        return 0;
-    }
-
-    /* calculate the register value */
-    reg_value = (reg_value & ~(1 << TIMEOUT_STATE_BIT)) | (state << TIMEOUT_STATE_BIT);
-
-    /* set the Consecutive alert register */
-    dev_dbg(&client->dev, "set register value. reg:0x%0x, value:0x%0x\n", TMP401_DEVICE_CAR_REG, reg_value);
-    rv = i2c_smbus_write_byte_data(client, TMP401_DEVICE_CAR_REG, reg_value);
-    if (rv < 0) {
-        dev_err(&client->dev,
-            "set the register Error. reg:0x%0x, value:%d\n", TMP401_DEVICE_CAR_REG, reg_value);
-        mutex_unlock(&data->update_lock);
-        return -EIO;
-    }
-    mutex_unlock(&data->update_lock);
-
-    dev_info(&client->dev, "set bus timeout success. reg:0x%0x, value:0x%0x\n", TMP401_DEVICE_CAR_REG, reg_value);
-
-    return 0;
-}
-
-static ssize_t set_timeout_en(struct device *dev,
-                   struct device_attribute *attr,
-                   const char *buf, size_t count)
-{
-    int val, err;
-    struct i2c_client *client;
-    struct tmp401_data *data;
-
-    data = dev_get_drvdata(dev);
-    client = data->client;
-
-    err = kstrtoint(buf, 0, &val);
-    if (err) {
-        dev_err(&client->dev,
-            "kstrtoint error: %d.\n", err);
-        return err;
-    }
-
-    err = timeout_cfg(dev, val);
-    if(err < 0) {
-        dev_err(&client->dev,
-            "set bus timeout error: %d. value:%d!\n", err, val);
-        return err;
-    }
-
-    return count;
-}
-
-static ssize_t show_timeout_en(struct device *dev,
-    struct device_attribute *devattr, char *buf)
-{
-    int chip_type;
-    u8 reg_value;
-    struct tmp401_data *data;
-    struct i2c_client *client;
-
-    data = dev_get_drvdata(dev);
-    client = data->client;
-
-    /* get chip type */
-    chip_type = data->kind;
-    dev_dbg(&client->dev, "get timeout. chip:%d\n", chip_type);
-
-    /* chip type check */
-    if(chip_type != tmp401 && chip_type != tmp411)  {
-        dev_info(&client->dev,
-            "Chip type: %d, not support timeout config.!\n", chip_type);
-        /* not support, return NA */
-        return (ssize_t)snprintf(buf, PAGE_SIZE, "%s\n", TIMEOUT_STATE_NA);
-    }
-
-    /* read the Consecutive alert register */
-    reg_value = i2c_smbus_read_byte_data(client, TMP401_DEVICE_CAR_REG);
-    if (reg_value < 0) {
-        dev_err(&client->dev, "Failed to read. reg:0x%0x, value:%d\n", TMP401_DEVICE_CAR_REG, reg_value);
-        return -EIO;
-    }
-    dev_dbg(&client->dev, "get register value. reg:0x%0x, value:0x%0x\n", TMP401_DEVICE_CAR_REG, reg_value);
-
-    /* decode the register value */
-    reg_value = reg_value >> TIMEOUT_STATE_BIT;
-
-    return (ssize_t)snprintf(buf, PAGE_SIZE, "%d\n", reg_value);
-}
-
-static SENSOR_DEVICE_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0);
-static SENSOR_DEVICE_ATTR_2(temp1_min, S_IWUSR | S_IRUGO, show_temp,
-			    store_temp, 1, 0);
-static SENSOR_DEVICE_ATTR_2(temp1_max, S_IWUSR | S_IRUGO, show_temp,
-			    store_temp, 2, 0);
-static SENSOR_DEVICE_ATTR_2(temp1_crit, S_IWUSR | S_IRUGO, show_temp,
-			    store_temp, 3, 0);
-static SENSOR_DEVICE_ATTR(temp1_crit_hyst, S_IWUSR | S_IRUGO,
-			  show_temp_crit_hyst, store_temp_crit_hyst, 0);
-static SENSOR_DEVICE_ATTR_2(temp1_min_alarm, S_IRUGO, show_status, NULL,
-			    1, TMP432_STATUS_LOCAL);
-static SENSOR_DEVICE_ATTR_2(temp1_max_alarm, S_IRUGO, show_status, NULL,
-			    2, TMP432_STATUS_LOCAL);
-static SENSOR_DEVICE_ATTR_2(temp1_crit_alarm, S_IRUGO, show_status, NULL,
-			    3, TMP432_STATUS_LOCAL);
-static SENSOR_DEVICE_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 0, 1);
-static SENSOR_DEVICE_ATTR_2(temp2_min, S_IWUSR | S_IRUGO, show_temp,
-			    store_temp, 1, 1);
-static SENSOR_DEVICE_ATTR_2(temp2_max, S_IWUSR | S_IRUGO, show_temp,
-			    store_temp, 2, 1);
-static SENSOR_DEVICE_ATTR_2(temp2_crit, S_IWUSR | S_IRUGO, show_temp,
-			    store_temp, 3, 1);
-static SENSOR_DEVICE_ATTR(temp2_crit_hyst, S_IRUGO, show_temp_crit_hyst,
-			  NULL, 1);
-static SENSOR_DEVICE_ATTR_2(temp2_fault, S_IRUGO, show_status, NULL,
-			    0, TMP432_STATUS_REMOTE1);
-static SENSOR_DEVICE_ATTR_2(temp2_min_alarm, S_IRUGO, show_status, NULL,
-			    1, TMP432_STATUS_REMOTE1);
-static SENSOR_DEVICE_ATTR_2(temp2_max_alarm, S_IRUGO, show_status, NULL,
-			    2, TMP432_STATUS_REMOTE1);
-static SENSOR_DEVICE_ATTR_2(temp2_crit_alarm, S_IRUGO, show_status, NULL,
-			    3, TMP432_STATUS_REMOTE1);
-
-static DEVICE_ATTR(update_interval, S_IRUGO | S_IWUSR, show_update_interval,
-		   set_update_interval);
-static DEVICE_ATTR(timeout_en, S_IRUGO | S_IWUSR, show_timeout_en, set_timeout_en);
-
-static struct attribute *tmp401_attributes[] = {
-	&sensor_dev_attr_temp1_input.dev_attr.attr,
-	&sensor_dev_attr_temp1_min.dev_attr.attr,
-	&sensor_dev_attr_temp1_max.dev_attr.attr,
-	&sensor_dev_attr_temp1_crit.dev_attr.attr,
-	&sensor_dev_attr_temp1_crit_hyst.dev_attr.attr,
-	&sensor_dev_attr_temp1_max_alarm.dev_attr.attr,
-	&sensor_dev_attr_temp1_min_alarm.dev_attr.attr,
-	&sensor_dev_attr_temp1_crit_alarm.dev_attr.attr,
-
-	&sensor_dev_attr_temp2_input.dev_attr.attr,
-	&sensor_dev_attr_temp2_min.dev_attr.attr,
-	&sensor_dev_attr_temp2_max.dev_attr.attr,
-	&sensor_dev_attr_temp2_crit.dev_attr.attr,
-	&sensor_dev_attr_temp2_crit_hyst.dev_attr.attr,
-	&sensor_dev_attr_temp2_fault.dev_attr.attr,
-	&sensor_dev_attr_temp2_max_alarm.dev_attr.attr,
-	&sensor_dev_attr_temp2_min_alarm.dev_attr.attr,
-	&sensor_dev_attr_temp2_crit_alarm.dev_attr.attr,
-
-	&dev_attr_update_interval.attr,
-	&dev_attr_timeout_en.attr,
-
-	NULL
-};
-
-static const struct attribute_group tmp401_group = {
-	.attrs = tmp401_attributes,
-};
-
-/*
- * Additional features of the TMP411 chip.
- * The TMP411 stores the minimum and maximum
- * temperature measured since power-on, chip-reset, or
- * minimum and maximum register reset for both the local
- * and remote channels.
- */
-static SENSOR_DEVICE_ATTR_2(temp1_lowest, S_IRUGO, show_temp, NULL, 4, 0);
-static SENSOR_DEVICE_ATTR_2(temp1_highest, S_IRUGO, show_temp, NULL, 5, 0);
-static SENSOR_DEVICE_ATTR_2(temp2_lowest, S_IRUGO, show_temp, NULL, 4, 1);
-static SENSOR_DEVICE_ATTR_2(temp2_highest, S_IRUGO, show_temp, NULL, 5, 1);
-static SENSOR_DEVICE_ATTR(temp_reset_history, S_IWUSR, NULL, reset_temp_history,
-			  0);
-
-static struct attribute *tmp411_attributes[] = {
-	&sensor_dev_attr_temp1_highest.dev_attr.attr,
-	&sensor_dev_attr_temp1_lowest.dev_attr.attr,
-	&sensor_dev_attr_temp2_highest.dev_attr.attr,
-	&sensor_dev_attr_temp2_lowest.dev_attr.attr,
-	&sensor_dev_attr_temp_reset_history.dev_attr.attr,
-	NULL
-};
-
-static const struct attribute_group tmp411_group = {
-	.attrs = tmp411_attributes,
-};
-
-static SENSOR_DEVICE_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 0, 2);
-static SENSOR_DEVICE_ATTR_2(temp3_min, S_IWUSR | S_IRUGO, show_temp,
-			    store_temp, 1, 2);
-static SENSOR_DEVICE_ATTR_2(temp3_max, S_IWUSR | S_IRUGO, show_temp,
-			    store_temp, 2, 2);
-static SENSOR_DEVICE_ATTR_2(temp3_crit, S_IWUSR | S_IRUGO, show_temp,
-			    store_temp, 3, 2);
-static SENSOR_DEVICE_ATTR(temp3_crit_hyst, S_IRUGO, show_temp_crit_hyst,
-			  NULL, 2);
-static SENSOR_DEVICE_ATTR_2(temp3_fault, S_IRUGO, show_status, NULL,
-			    0, TMP432_STATUS_REMOTE2);
-static SENSOR_DEVICE_ATTR_2(temp3_min_alarm, S_IRUGO, show_status, NULL,
-			    1, TMP432_STATUS_REMOTE2);
-static SENSOR_DEVICE_ATTR_2(temp3_max_alarm, S_IRUGO, show_status, NULL,
-			    2, TMP432_STATUS_REMOTE2);
-static SENSOR_DEVICE_ATTR_2(temp3_crit_alarm, S_IRUGO, show_status, NULL,
-			    3, TMP432_STATUS_REMOTE2);
-
-static struct attribute *tmp432_attributes[] = {
-	&sensor_dev_attr_temp3_input.dev_attr.attr,
-	&sensor_dev_attr_temp3_min.dev_attr.attr,
-	&sensor_dev_attr_temp3_max.dev_attr.attr,
-	&sensor_dev_attr_temp3_crit.dev_attr.attr,
-	&sensor_dev_attr_temp3_crit_hyst.dev_attr.attr,
-	&sensor_dev_attr_temp3_fault.dev_attr.attr,
-	&sensor_dev_attr_temp3_max_alarm.dev_attr.attr,
-	&sensor_dev_attr_temp3_min_alarm.dev_attr.attr,
-	&sensor_dev_attr_temp3_crit_alarm.dev_attr.attr,
-
-	NULL
-};
-
-static const struct attribute_group tmp432_group = {
-	.attrs = tmp432_attributes,
-};
-
-/*
- * Additional features of the TMP461 chip.
- * The TMP461 temperature offset for the remote channel.
- */
-static SENSOR_DEVICE_ATTR_2(temp2_offset, S_IWUSR | S_IRUGO, show_temp,
-			    store_temp, 6, 1);
-
-static struct attribute *tmp461_attributes[] = {
-	&sensor_dev_attr_temp2_offset.dev_attr.attr,
-	NULL
-};
-
-static const struct attribute_group tmp461_group = {
-	.attrs = tmp461_attributes,
-};
-
-/*
- * Begin non sysfs callback code (aka Real code)
- */
-
-static int tmp401_init_client(struct tmp401_data *data,
-			      struct i2c_client *client)
-{
-	int config, config_orig, status = 0;
-
-	/* Set the conversion rate to 2 Hz */
-	i2c_smbus_write_byte_data(client, TMP401_CONVERSION_RATE_WRITE, 5);
-	data->update_interval = 500;
-
-	/* Start conversions (disable shutdown if necessary) */
-	config = i2c_smbus_read_byte_data(client, TMP401_CONFIG_READ);
-	if (config < 0)
-		return config;
-
-	config_orig = config;
-	config &= ~TMP401_CONFIG_SHUTDOWN;
-
-	if (config != config_orig)
-		status = i2c_smbus_write_byte_data(client,
-						   TMP401_CONFIG_WRITE,
-						   config);
-
-	return status;
-}
-
-#if 0
-static int tmp401_detect(struct i2c_client *client,
-			 struct i2c_board_info *info)
-{
-	enum chips kind;
-	struct i2c_adapter *adapter = client->adapter;
-	u8 reg;
-
-	if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
-		return -ENODEV;
-
-	/* Detect and identify the chip */
-	reg = i2c_smbus_read_byte_data(client, TMP401_MANUFACTURER_ID_REG);
-	if (reg != TMP401_MANUFACTURER_ID)
-		return -ENODEV;
-
-	reg = i2c_smbus_read_byte_data(client, TMP401_DEVICE_ID_REG);
-
-	switch (reg) {
-	case TMP401_DEVICE_ID:
-		if (client->addr != 0x4c)
-			return -ENODEV;
-		kind = tmp401;
-		break;
-	case TMP411A_DEVICE_ID:
-		if (client->addr != 0x4c)
-			return -ENODEV;
-		kind = tmp411;
-		break;
-	case TMP411B_DEVICE_ID:
-		if (client->addr != 0x4d)
-			return -ENODEV;
-		kind = tmp411;
-		break;
-	case TMP411C_DEVICE_ID:
-		if (client->addr != 0x4e)
-			return -ENODEV;
-		kind = tmp411;
-		break;
-	case TMP431_DEVICE_ID:
-		if (client->addr != 0x4c && client->addr != 0x4d)
-			return -ENODEV;
-		kind = tmp431;
-		break;
-	case TMP432_DEVICE_ID:
-		if (client->addr != 0x4c && client->addr != 0x4d)
-			return -ENODEV;
-		kind = tmp432;
-		break;
-	case TMP435_DEVICE_ID:
-		kind = tmp435;
-		break;
-	default:
-		return -ENODEV;
-	}
-
-	reg = i2c_smbus_read_byte_data(client, TMP401_CONFIG_READ);
-	if (reg & 0x1b)
-		return -ENODEV;
-
-	reg = i2c_smbus_read_byte_data(client, TMP401_CONVERSION_RATE_READ);
-	/* Datasheet says: 0x1-0x6 */
-	if (reg > 15)
-		return -ENODEV;
-
-	strlcpy(info->type, tmp401_id[kind].name, I2C_NAME_SIZE);
-
-	return 0;
-}
-#endif
-
-static int tmp401_probe(struct i2c_client *client,
-			const struct i2c_device_id *id)
-{
-	static const char * const names[] = {
-		"TMP401", "TMP411", "TMP431", "TMP432", "TMP435", "TMP461"
-	};
-	struct device *dev = &client->dev;
-	struct device *hwmon_dev;
-	struct tmp401_data *data;
-	int groups = 0, status;
-
-	data = devm_kzalloc(dev, sizeof(struct tmp401_data), GFP_KERNEL);
-	if (!data)
-		return -ENOMEM;
-
-	data->client = client;
-	mutex_init(&data->update_lock);
-	data->kind = id->driver_data;
-
-	/* Initialize the TMP401 chip */
-	status = tmp401_init_client(data, client);
-	if (status < 0)
-		return status;
-
-	/* Register sysfs hooks */
-	data->groups[groups++] = &tmp401_group;
-
-	/* Register additional tmp411 sysfs hooks */
-	if (data->kind == tmp411)
-		data->groups[groups++] = &tmp411_group;
-
-	/* Register additional tmp432 sysfs hooks */
-	if (data->kind == tmp432)
-		data->groups[groups++] = &tmp432_group;
-
-	if (data->kind == tmp461)
-		data->groups[groups++] = &tmp461_group;
-
-	hwmon_dev = devm_hwmon_device_register_with_groups(dev, client->name,
-							   data, data->groups);
-	if (IS_ERR(hwmon_dev))
-		return PTR_ERR(hwmon_dev);
-
-    /* disable the timeout function */
-    status = timeout_cfg(hwmon_dev, TIMEOUT_STATE_IEN);
-    if((status < 0) && (status != -EPERM)) {
-        dev_err(dev,
-            "set bus timeout error when probing: %d.!\n", status);
-        /* here, no need call devm_hwmon_device_unregister, device managed. */
-        return status;
-    }
-
-	dev_info(dev, "Detected TI %s chip\n", names[data->kind]);
-
-	return 0;
-}
-
-static struct i2c_driver tmp401_driver = {
-	.class		= I2C_CLASS_HWMON,
-	.driver = {
-		.name	= "wb_tmp401",
-	},
-	.probe		= tmp401_probe,
-	.id_table	= tmp401_id,
-	/* .detect		= tmp401_detect, */
-	/* .address_list	= normal_i2c, */
-};
-
-module_i2c_driver(tmp401_driver);
-
-MODULE_AUTHOR("support");
-MODULE_DESCRIPTION("Texas Instruments TMP401 temperature sensor driver");
-MODULE_LICENSE("GPL");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_tps53622.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_tps53622.c
deleted file mode 100644
index b68196d9f..000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_tps53622.c
+++ /dev/null
@@ -1,265 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later
-/*
- * Hardware monitoring driver for Texas Instruments TPS53679
- *
- * Copyright (c) 2017 Mellanox Technologies. All rights reserved.
- * Copyright (c) 2017 Vadim Pasternak <vadimp@mellanox.com>
- */
-
-#include <linux/bits.h>
-#include <linux/err.h>
-#include <linux/i2c.h>
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <linux/of_device.h>
-#include "wb_pmbus.h"
-
-enum chips {
-    tps53647, tps53667, tps53679, tps53681, tps53688, tps53622
-};
-
-#define TPS53647_PAGE_NUM             1
-
-#define TPS53679_PROT_VR12_5MV        0x01 /* VR12.0 mode, 5-mV DAC */
-#define TPS53679_PROT_VR12_5_10MV     0x02 /* VR12.5 mode, 10-mV DAC */
-#define TPS53679_PROT_VR13_10MV       0x04 /* VR13.0 mode, 10-mV DAC */
-#define TPS53679_PROT_IMVP8_5MV       0x05 /* IMVP8 mode, 5-mV DAC */
-#define TPS53679_PROT_VR13_5MV        0x07 /* VR13.0 mode, 5-mV DAC */
-#define TPS53679_PAGE_NUM             2
-
-#define TPS53681_DEVICE_ID            0x81
-
-#define TPS53681_PMBUS_REVISION       0x33
-
-#define TPS53681_MFR_SPECIFIC_20      0xe4    /* Number of phases, per page */
-
-static const struct i2c_device_id tps53679_id[];
-
-static int tps53679_identify_mode(struct i2c_client *client,
-                  struct pmbus_driver_info *info)
-{
-    u8 vout_params;
-    int i, ret;
-
-    for (i = 0; i < info->pages; i++) {
-        /* Read the register with VOUT scaling value.*/
-        ret = wb_pmbus_read_byte_data(client, i, PMBUS_VOUT_MODE);
-        if (ret < 0)
-            return ret;
-
-        vout_params = ret & GENMASK(4, 0);
-
-        switch (vout_params) {
-        case TPS53679_PROT_VR13_10MV:
-        case TPS53679_PROT_VR12_5_10MV:
-            info->vrm_version[i] = vr13;
-            break;
-        case TPS53679_PROT_VR13_5MV:
-        case TPS53679_PROT_VR12_5MV:
-        case TPS53679_PROT_IMVP8_5MV:
-            info->vrm_version[i] = vr12;
-            break;
-        default:
-            return -EINVAL;
-        }
-    }
-
-    return 0;
-}
-
-static int tps53679_identify_phases(struct i2c_client *client,
-                    struct pmbus_driver_info *info)
-{
-    int ret;
-
-    /* On TPS53681, only channel A provides per-phase output current */
-    ret = wb_pmbus_read_byte_data(client, 0, TPS53681_MFR_SPECIFIC_20);
-    if (ret < 0)
-        return ret;
-    info->phases[0] = (ret & 0x07) + 1;
-
-    return 0;
-}
-
-static int tps53679_identify_chip(struct i2c_client *client,
-                  u8 revision, u16 id)
-{
-    u8 buf[I2C_SMBUS_BLOCK_MAX];
-    int ret;
-
-    ret = wb_pmbus_read_byte_data(client, 0, PMBUS_REVISION);
-    if (ret < 0)
-        return ret;
-    if (ret != revision) {
-        dev_err(&client->dev, "Unexpected PMBus revision 0x%x\n", ret);
-        return -ENODEV;
-    }
-
-    ret = i2c_smbus_read_block_data(client, PMBUS_IC_DEVICE_ID, buf);
-    if (ret < 0)
-        return ret;
-    if (ret != 1 || buf[0] != id) {
-        dev_err(&client->dev, "Unexpected device ID 0x%x\n", buf[0]);
-        return -ENODEV;
-    }
-    return 0;
-}
-
-/*
- * Common identification function for chips with multi-phase support.
- * Since those chips have special configuration registers, we want to have
- * some level of reassurance that we are really talking with the chip
- * being probed. Check PMBus revision and chip ID.
- */
-static int tps53679_identify_multiphase(struct i2c_client *client,
-                    struct pmbus_driver_info *info,
-                    int pmbus_rev, int device_id)
-{
-    int ret;
-
-    ret = tps53679_identify_chip(client, pmbus_rev, device_id);
-    if (ret < 0)
-        return ret;
-
-    ret = tps53679_identify_mode(client, info);
-    if (ret < 0)
-        return ret;
-
-    return tps53679_identify_phases(client, info);
-}
-
-static int tps53679_identify(struct i2c_client *client,
-                 struct pmbus_driver_info *info)
-{
-    return tps53679_identify_mode(client, info);
-}
-
-static int tps53681_identify(struct i2c_client *client,
-                 struct pmbus_driver_info *info)
-{
-    return tps53679_identify_multiphase(client, info,
-                        TPS53681_PMBUS_REVISION,
-                        TPS53681_DEVICE_ID);
-}
-
-static int tps53681_read_word_data(struct i2c_client *client, int page,
-                   int phase, int reg)
-{
-    /*
-     * For reading the total output current (READ_IOUT) for all phases,
-     * the chip datasheet is a bit vague. It says "PHASE must be set to
-     * FFh to access all phases simultaneously. PHASE may also be set to
-     * 80h readack (!) the total phase current".
-     * Experiments show that the command does _not_ report the total
-     * current for all phases if the phase is set to 0xff. Instead, it
-     * appears to report the current of one of the phases. Override phase
-     * parameter with 0x80 when reading the total output current on page 0.
-     */
-    if (reg == PMBUS_READ_IOUT && page == 0 && phase == 0xff)
-        return wb_pmbus_read_word_data(client, page, 0x80, reg);
-    return -ENODATA;
-}
-
-static struct pmbus_driver_info tps53679_info = {
-    .format[PSC_VOLTAGE_IN] = linear,
-    .format[PSC_VOLTAGE_OUT] = vid,
-    .format[PSC_TEMPERATURE] = linear,
-    .format[PSC_CURRENT_OUT] = linear,
-    .format[PSC_POWER] = linear,
-    .func[0] = PMBUS_HAVE_VIN | PMBUS_HAVE_IIN | PMBUS_HAVE_PIN |
-        PMBUS_HAVE_STATUS_INPUT |
-        PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT |
-        PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT |
-        PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP |
-        PMBUS_HAVE_POUT,
-    .func[1] = PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT |
-        PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT |
-        PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP |
-        PMBUS_HAVE_POUT,
-    .pfunc[0] = PMBUS_HAVE_IOUT,
-    .pfunc[1] = PMBUS_HAVE_IOUT,
-    .pfunc[2] = PMBUS_HAVE_IOUT,
-    .pfunc[3] = PMBUS_HAVE_IOUT,
-    .pfunc[4] = PMBUS_HAVE_IOUT,
-    .pfunc[5] = PMBUS_HAVE_IOUT,
-};
-
-static int tps53679_probe(struct i2c_client *client)
-{
-    struct device *dev = &client->dev;
-    struct pmbus_driver_info *info;
-    enum chips chip_id;
-
-    if (dev->of_node)
-        chip_id = (enum chips)of_device_get_match_data(dev);
-    else
-        chip_id = i2c_match_id(tps53679_id, client)->driver_data;
-
-    info = devm_kmemdup(dev, &tps53679_info, sizeof(*info), GFP_KERNEL);
-    if (!info)
-        return -ENOMEM;
-
-    switch (chip_id) {
-    case tps53647:
-    case tps53667:
-        info->pages = TPS53647_PAGE_NUM;
-        info->identify = tps53679_identify;
-        break;
-    case tps53679:
-    case tps53688:
-	case tps53622:
-        info->pages = TPS53679_PAGE_NUM;
-        info->identify = tps53679_identify;
-        break;
-    case tps53681:
-        info->pages = TPS53679_PAGE_NUM;
-        info->phases[0] = 6;
-        info->identify = tps53681_identify;
-        info->read_word_data = tps53681_read_word_data;
-        break;
-    default:
-        return -ENODEV;
-    }
-
-    return wb_pmbus_do_probe(client, info);
-}
-
-static const struct i2c_device_id tps53679_id[] = {
-    {"wb_tps53647", tps53647},
-    {"wb_tps53667", tps53667},
-    {"wb_tps53679", tps53679},
-    {"wb_tps53681", tps53681},
-    {"wb_tps53688", tps53688},
-    {"wb_tps53622", tps53622},
-    {}
-};
-
-MODULE_DEVICE_TABLE(i2c, tps53679_id);
-
-static const struct of_device_id __maybe_unused tps53679_of_match[] = {
-    {.compatible = "ti,wb_tps53647", .data = (void *)tps53647},
-    {.compatible = "ti,wb_tps53667", .data = (void *)tps53667},
-    {.compatible = "ti,wb_tps53679", .data = (void *)tps53679},
-    {.compatible = "ti,wb_tps53681", .data = (void *)tps53681},
-    {.compatible = "ti,wb_tps53688", .data = (void *)tps53688},
-    {.compatible = "ti,wb_tps53622", .data = (void *)tps53622},
-    {}
-};
-MODULE_DEVICE_TABLE(of, tps53679_of_match);
-
-static struct i2c_driver tps53679_driver = {
-    .driver = {
-        .name = "wb_tps53622",
-        .of_match_table = of_match_ptr(tps53679_of_match),
-    },
-    .probe_new = tps53679_probe,
-    .remove = wb_pmbus_do_remove,
-    .id_table = tps53679_id,
-};
-
-module_i2c_driver(tps53679_driver);
-
-MODULE_AUTHOR("support");
-MODULE_DESCRIPTION("PMBus driver for Texas Instruments TPS53679");
-MODULE_LICENSE("GPL");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_ucd9000.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_ucd9000.c
deleted file mode 100644
index 6d60b9d87..000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_ucd9000.c
+++ /dev/null
@@ -1,720 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later
-/*
- * Hardware monitoring driver for UCD90xxx Sequencer and System Health
- * Controller series
- *
- * Copyright (C) 2011 Ericsson AB.
- */
-
-#include <linux/debugfs.h>
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <linux/of_device.h>
-#include <linux/init.h>
-#include <linux/err.h>
-#include <linux/slab.h>
-#include <linux/i2c.h>
-#include <linux/pmbus.h>
-#include <linux/gpio/driver.h>
-#include <linux/delay.h>
-#include "wb_pmbus.h"
-
-#define mem_clear(data, size) memset((data), 0, (size))
-
-enum chips { ucd9000, ucd90120, ucd90124, ucd90160, ucd90320, ucd9090,
-         ucd90910 };
-
-#define UCD9000_MONITOR_CONFIG      0xd5
-#define UCD9000_NUM_PAGES           0xd6
-#define UCD9000_FAN_CONFIG_INDEX    0xe7
-#define UCD9000_FAN_CONFIG          0xe8
-#define UCD9000_MFR_STATUS          0xf3
-#define UCD9000_GPIO_SELECT         0xfa
-#define UCD9000_GPIO_CONFIG         0xfb
-#define UCD9000_DEVICE_ID           0xfd
-
-/* GPIO CONFIG bits */
-#define UCD9000_GPIO_CONFIG_ENABLE        BIT(0)
-#define UCD9000_GPIO_CONFIG_OUT_ENABLE    BIT(1)
-#define UCD9000_GPIO_CONFIG_OUT_VALUE     BIT(2)
-#define UCD9000_GPIO_CONFIG_STATUS        BIT(3)
-#define UCD9000_GPIO_INPUT        0
-#define UCD9000_GPIO_OUTPUT       1
-
-#define UCD9000_MON_TYPE(x)       (((x) >> 5) & 0x07)
-#define UCD9000_MON_PAGE(x)       ((x) & 0x1f)
-
-#define UCD9000_MON_VOLTAGE       1
-#define UCD9000_MON_TEMPERATURE   2
-#define UCD9000_MON_CURRENT       3
-#define UCD9000_MON_VOLTAGE_HW    4
-
-#define UCD9000_NUM_FAN           4
-
-#define UCD9000_GPIO_NAME_LEN     16
-#define UCD9090_NUM_GPIOS         23
-#define UCD901XX_NUM_GPIOS        26
-#define UCD90320_NUM_GPIOS        84
-#define UCD90910_NUM_GPIOS        26
-
-#define UCD9000_DEBUGFS_NAME_LEN  24
-#define UCD9000_GPI_COUNT         8
-#define UCD90320_GPI_COUNT        32
-
-#define UCD9000_RETRY_SLEEP_TIME          (10000)   /* 10ms */
-#define UCD9000_RETRY_TIME                (3)
-#define WB_DEV_NAME_MAX_LEN               (64)
-
-static int g_wb_ucd9000_debug = 0;
-static int g_wb_ucd9000_error = 0;
-
-module_param(g_wb_ucd9000_debug, int, S_IRUGO | S_IWUSR);
-module_param(g_wb_ucd9000_error, int, S_IRUGO | S_IWUSR);
-
-#define WB_UDC9000_VERBOSE(fmt, args...) do {                                        \
-    if (g_wb_ucd9000_debug) { \
-        printk(KERN_INFO "[WB_UCD9000][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
-    } \
-} while (0)
-
-#define WB_UDC9000_ERROR(fmt, args...) do {                                        \
-    if (g_wb_ucd9000_error) { \
-        printk(KERN_ERR "[WB_UCD9000][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
-    } \
-} while (0)
-
-struct ucd9000_data {
-    u8 fan_data[UCD9000_NUM_FAN][I2C_SMBUS_BLOCK_MAX];
-    struct pmbus_driver_info info;
-#ifdef CONFIG_GPIOLIB
-    struct gpio_chip gpio;
-#endif
-    struct dentry *debugfs;
-};
-#define to_ucd9000_data(_info) container_of(_info, struct ucd9000_data, info)
-
-struct ucd9000_debugfs_entry {
-    struct i2c_client *client;
-    u8 index;
-};
-
-static int wb_i2c_smbus_read_block_data_tmp(const struct i2c_client *client, u8 command, u8 *values)
-{
-
-    struct i2c_msg msg[2];
-    int status;
-    u8 read_buf[I2C_SMBUS_BLOCK_MAX + 1];
-    int read_len, val_len;
-
-    val_len = i2c_smbus_read_byte_data(client, command);
-    if (val_len < 0) {
-        WB_UDC9000_ERROR("read byte failed. nr:%d, addr:0x%x, reg:0x%x, ret:%d.\n",
-            client->adapter->nr, client->addr, command, val_len);
-        return -ENXIO;
-    }
-    read_len = val_len + 1;
-    if (read_len > sizeof(read_buf)) {
-        WB_UDC9000_ERROR("Out of memory, val_len: %d, read length: %d, read buf len: %lu.\n",
-            val_len, read_len, sizeof(read_buf));
-        return -ENOMEM;
-    }
-
-    mem_clear(msg, sizeof(msg));
-    msg[0].addr = client->addr;
-    msg[0].buf = &command;
-    msg[0].len = 1;
-
-    msg[1].addr = client->addr;
-    msg[1].flags = I2C_M_RD;
-    msg[1].buf = read_buf;
-    msg[1].len = read_len;
-
-    status = i2c_transfer(client->adapter, msg, 2);
-    if (status != 2) {
-        WB_UDC9000_ERROR("i2c_transfer failed. nr:%d, addr:0x%x, reg:0x%x, read len:%d, status:%d.\n",
-            client->adapter->nr, client->addr, command, read_len, status);
-        return -EIO;
-    }
-    WB_UDC9000_VERBOSE("read_block_data success. nr:%d, addr:0x%x, reg:0x%x, read len:%d",
-        client->adapter->nr, client->addr, command, read_len);
-    memcpy(values, &read_buf[1], val_len);
-    return val_len;
-}
-
-static int wb_i2c_smbus_read_block_data(const struct i2c_client *client, u8 command, u8 *values)
-{
-    int rv, i;
-
-    for(i = 0; i < UCD9000_RETRY_TIME; i++) {
-        rv = wb_i2c_smbus_read_block_data_tmp(client, command, values);
-        if(rv >= 0){
-            return rv;
-        }
-        usleep_range(UCD9000_RETRY_SLEEP_TIME, UCD9000_RETRY_SLEEP_TIME + 1);
-    }
-    WB_UDC9000_ERROR("read_block_data failed. nr:  %d, addr: 0x%x, reg: 0x%x, rv: %d\n",
-        client->adapter->nr, client->addr, command, rv);
-    return rv;
-}
-
-static int ucd9000_get_fan_config(struct i2c_client *client, int fan)
-{
-    int fan_config = 0;
-    struct ucd9000_data *data
-      = to_ucd9000_data(wb_pmbus_get_driver_info(client));
-
-    if (data->fan_data[fan][3] & 1)
-        fan_config |= PB_FAN_2_INSTALLED;   /* Use lower bit position */
-
-    /* Pulses/revolution */
-    fan_config |= (data->fan_data[fan][3] & 0x06) >> 1;
-
-    return fan_config;
-}
-
-static int ucd9000_read_byte_data(struct i2c_client *client, int page, int reg)
-{
-    int ret = 0;
-    int fan_config;
-
-    switch (reg) {
-    case PMBUS_FAN_CONFIG_12:
-        if (page > 0)
-            return -ENXIO;
-
-        ret = ucd9000_get_fan_config(client, 0);
-        if (ret < 0)
-            return ret;
-        fan_config = ret << 4;
-        ret = ucd9000_get_fan_config(client, 1);
-        if (ret < 0)
-            return ret;
-        fan_config |= ret;
-        ret = fan_config;
-        break;
-    case PMBUS_FAN_CONFIG_34:
-        if (page > 0)
-            return -ENXIO;
-
-        ret = ucd9000_get_fan_config(client, 2);
-        if (ret < 0)
-            return ret;
-        fan_config = ret << 4;
-        ret = ucd9000_get_fan_config(client, 3);
-        if (ret < 0)
-            return ret;
-        fan_config |= ret;
-        ret = fan_config;
-        break;
-    default:
-        ret = -ENODATA;
-        break;
-    }
-    return ret;
-}
-
-static const struct i2c_device_id ucd9000_id[] = {
-    {"wb_ucd9000", ucd9000},
-    {"wb_ucd90120", ucd90120},
-    {"wb_ucd90124", ucd90124},
-    {"wb_ucd90160", ucd90160},
-    {"wb_ucd90320", ucd90320},
-    {"wb_ucd9090", ucd9090},
-    {"wb_ucd90910", ucd90910},
-    {}
-};
-MODULE_DEVICE_TABLE(i2c, ucd9000_id);
-
-static const struct of_device_id __maybe_unused ucd9000_of_match[] = {
-    {
-        .compatible = "ti,wb_ucd9000",
-        .data = (void *)ucd9000
-    },
-    {
-        .compatible = "ti,wb_ucd90120",
-        .data = (void *)ucd90120
-    },
-    {
-        .compatible = "ti,wb_ucd90124",
-        .data = (void *)ucd90124
-    },
-    {
-        .compatible = "ti,wb_ucd90160",
-        .data = (void *)ucd90160
-    },
-    {
-        .compatible = "ti,wb_ucd90320",
-        .data = (void *)ucd90320
-    },
-    {
-        .compatible = "ti,wb_ucd9090",
-        .data = (void *)ucd9090
-    },
-    {
-        .compatible = "ti,wb_ucd90910",
-        .data = (void *)ucd90910
-    },
-    { },
-};
-MODULE_DEVICE_TABLE(of, ucd9000_of_match);
-
-#ifdef CONFIG_GPIOLIB
-static int ucd9000_gpio_read_config(struct i2c_client *client,
-                    unsigned int offset)
-{
-    int ret;
-
-    /* No page set required */
-    ret = i2c_smbus_write_byte_data(client, UCD9000_GPIO_SELECT, offset);
-    if (ret < 0)
-        return ret;
-
-    return i2c_smbus_read_byte_data(client, UCD9000_GPIO_CONFIG);
-}
-
-static int ucd9000_gpio_get(struct gpio_chip *gc, unsigned int offset)
-{
-    struct i2c_client *client  = gpiochip_get_data(gc);
-    int ret;
-
-    ret = ucd9000_gpio_read_config(client, offset);
-    if (ret < 0)
-        return ret;
-
-    return !!(ret & UCD9000_GPIO_CONFIG_STATUS);
-}
-
-static void ucd9000_gpio_set(struct gpio_chip *gc, unsigned int offset,
-                 int value)
-{
-    struct i2c_client *client = gpiochip_get_data(gc);
-    int ret;
-
-    ret = ucd9000_gpio_read_config(client, offset);
-    if (ret < 0) {
-        dev_dbg(&client->dev, "failed to read GPIO %d config: %d\n",
-            offset, ret);
-        return;
-    }
-
-    if (value) {
-        if (ret & UCD9000_GPIO_CONFIG_STATUS)
-            return;
-
-        ret |= UCD9000_GPIO_CONFIG_STATUS;
-    } else {
-        if (!(ret & UCD9000_GPIO_CONFIG_STATUS))
-            return;
-
-        ret &= ~UCD9000_GPIO_CONFIG_STATUS;
-    }
-
-    ret |= UCD9000_GPIO_CONFIG_ENABLE;
-
-    /* Page set not required */
-    ret = i2c_smbus_write_byte_data(client, UCD9000_GPIO_CONFIG, ret);
-    if (ret < 0) {
-        dev_dbg(&client->dev, "Failed to write GPIO %d config: %d\n",
-            offset, ret);
-        return;
-    }
-
-    ret &= ~UCD9000_GPIO_CONFIG_ENABLE;
-
-    ret = i2c_smbus_write_byte_data(client, UCD9000_GPIO_CONFIG, ret);
-    if (ret < 0)
-        dev_dbg(&client->dev, "Failed to write GPIO %d config: %d\n",
-            offset, ret);
-}
-
-static int ucd9000_gpio_get_direction(struct gpio_chip *gc,
-                      unsigned int offset)
-{
-    struct i2c_client *client = gpiochip_get_data(gc);
-    int ret;
-
-    ret = ucd9000_gpio_read_config(client, offset);
-    if (ret < 0)
-        return ret;
-
-    return !(ret & UCD9000_GPIO_CONFIG_OUT_ENABLE);
-}
-
-static int ucd9000_gpio_set_direction(struct gpio_chip *gc,
-                      unsigned int offset, bool direction_out,
-                      int requested_out)
-{
-    struct i2c_client *client = gpiochip_get_data(gc);
-    int ret, config, out_val;
-
-    ret = ucd9000_gpio_read_config(client, offset);
-    if (ret < 0)
-        return ret;
-
-    if (direction_out) {
-        out_val = requested_out ? UCD9000_GPIO_CONFIG_OUT_VALUE : 0;
-
-        if (ret & UCD9000_GPIO_CONFIG_OUT_ENABLE) {
-            if ((ret & UCD9000_GPIO_CONFIG_OUT_VALUE) == out_val)
-                return 0;
-        } else {
-            ret |= UCD9000_GPIO_CONFIG_OUT_ENABLE;
-        }
-
-        if (out_val)
-            ret |= UCD9000_GPIO_CONFIG_OUT_VALUE;
-        else
-            ret &= ~UCD9000_GPIO_CONFIG_OUT_VALUE;
-
-    } else {
-        if (!(ret & UCD9000_GPIO_CONFIG_OUT_ENABLE))
-            return 0;
-
-        ret &= ~UCD9000_GPIO_CONFIG_OUT_ENABLE;
-    }
-
-    ret |= UCD9000_GPIO_CONFIG_ENABLE;
-    config = ret;
-
-    /* Page set not required */
-    ret = i2c_smbus_write_byte_data(client, UCD9000_GPIO_CONFIG, config);
-    if (ret < 0)
-        return ret;
-
-    config &= ~UCD9000_GPIO_CONFIG_ENABLE;
-
-    return i2c_smbus_write_byte_data(client, UCD9000_GPIO_CONFIG, config);
-}
-
-static int ucd9000_gpio_direction_input(struct gpio_chip *gc,
-                    unsigned int offset)
-{
-    return ucd9000_gpio_set_direction(gc, offset, UCD9000_GPIO_INPUT, 0);
-}
-
-static int ucd9000_gpio_direction_output(struct gpio_chip *gc,
-                     unsigned int offset, int val)
-{
-    return ucd9000_gpio_set_direction(gc, offset, UCD9000_GPIO_OUTPUT,
-                      val);
-}
-
-static void ucd9000_probe_gpio(struct i2c_client *client,
-                   const struct i2c_device_id *mid,
-                   struct ucd9000_data *data)
-{
-    int rc;
-
-    switch (mid->driver_data) {
-    case ucd9090:
-        data->gpio.ngpio = UCD9090_NUM_GPIOS;
-        break;
-    case ucd90120:
-    case ucd90124:
-    case ucd90160:
-        data->gpio.ngpio = UCD901XX_NUM_GPIOS;
-        break;
-    case ucd90320:
-        data->gpio.ngpio = UCD90320_NUM_GPIOS;
-        break;
-    case ucd90910:
-        data->gpio.ngpio = UCD90910_NUM_GPIOS;
-        break;
-    default:
-        return; /* GPIO support is optional. */
-    }
-
-    /*
-     * Pinmux support has not been added to the new gpio_chip.
-     * This support should be added when possible given the mux
-     * behavior of these IO devices.
-     */
-    data->gpio.label = client->name;
-    data->gpio.get_direction = ucd9000_gpio_get_direction;
-    data->gpio.direction_input = ucd9000_gpio_direction_input;
-    data->gpio.direction_output = ucd9000_gpio_direction_output;
-    data->gpio.get = ucd9000_gpio_get;
-    data->gpio.set = ucd9000_gpio_set;
-    data->gpio.can_sleep = true;
-    data->gpio.base = -1;
-    data->gpio.parent = &client->dev;
-
-    rc = devm_gpiochip_add_data(&client->dev, &data->gpio, client);
-    if (rc)
-        dev_warn(&client->dev, "Could not add gpiochip: %d\n", rc);
-}
-#else
-static void ucd9000_probe_gpio(struct i2c_client *client,
-                   const struct i2c_device_id *mid,
-                   struct ucd9000_data *data)
-{
-}
-#endif /* CONFIG_GPIOLIB */
-
-#ifdef CONFIG_DEBUG_FS
-static int ucd9000_get_mfr_status(struct i2c_client *client, u8 *buffer)
-{
-    int ret = wb_pmbus_set_page(client, 0, 0xff);
-
-    if (ret < 0)
-        return ret;
-
-    return wb_i2c_smbus_read_block_data(client, UCD9000_MFR_STATUS, buffer);
-}
-
-static int ucd9000_debugfs_show_mfr_status_bit(void *data, u64 *val)
-{
-    struct ucd9000_debugfs_entry *entry = data;
-    struct i2c_client *client = entry->client;
-    u8 buffer[I2C_SMBUS_BLOCK_MAX];
-    int ret, i;
-
-    ret = ucd9000_get_mfr_status(client, buffer);
-    if (ret < 0)
-        return ret;
-
-    /*
-     * GPI fault bits are in sets of 8, two bytes from end of response.
-     */
-    i = ret - 3 - entry->index / 8;
-    if (i >= 0)
-        *val = !!(buffer[i] & BIT(entry->index % 8));
-
-    return 0;
-}
-DEFINE_DEBUGFS_ATTRIBUTE(ucd9000_debugfs_mfr_status_bit,
-             ucd9000_debugfs_show_mfr_status_bit, NULL, "%1lld\n");
-
-static ssize_t ucd9000_debugfs_read_mfr_status(struct file *file,
-                           char __user *buf, size_t count,
-                           loff_t *ppos)
-{
-    struct i2c_client *client = file->private_data;
-    u8 buffer[I2C_SMBUS_BLOCK_MAX];
-    char str[(I2C_SMBUS_BLOCK_MAX * 2) + 2];
-    char *res;
-    int rc;
-
-    rc = ucd9000_get_mfr_status(client, buffer);
-    if (rc < 0)
-        return rc;
-
-    res = bin2hex(str, buffer, min(rc, I2C_SMBUS_BLOCK_MAX));
-    *res++ = '\n';
-    *res = 0;
-
-    return simple_read_from_buffer(buf, count, ppos, str, res - str);
-}
-
-static const struct file_operations ucd9000_debugfs_show_mfr_status_fops = {
-    .llseek = noop_llseek,
-    .read = ucd9000_debugfs_read_mfr_status,
-    .open = simple_open,
-};
-
-static int ucd9000_init_debugfs(struct i2c_client *client,
-                const struct i2c_device_id *mid,
-                struct ucd9000_data *data)
-{
-    struct dentry *debugfs;
-    struct ucd9000_debugfs_entry *entries;
-    int i, gpi_count;
-    char name[UCD9000_DEBUGFS_NAME_LEN];
-
-    debugfs = wb_pmbus_get_debugfs_dir(client);
-    if (!debugfs)
-        return -ENOENT;
-
-    data->debugfs = debugfs_create_dir(client->name, debugfs);
-    if (!data->debugfs)
-        return -ENOENT;
-
-    /*
-     * Of the chips this driver supports, only the UCD9090, UCD90160,
-     * UCD90320, and UCD90910 report GPI faults in their MFR_STATUS
-     * register, so only create the GPI fault debugfs attributes for those
-     * chips.
-     */
-    if (mid->driver_data == ucd9090 || mid->driver_data == ucd90160 ||
-        mid->driver_data == ucd90320 || mid->driver_data == ucd90910) {
-        gpi_count = mid->driver_data == ucd90320 ? UCD90320_GPI_COUNT
-                             : UCD9000_GPI_COUNT;
-        entries = devm_kcalloc(&client->dev,
-                       gpi_count, sizeof(*entries),
-                       GFP_KERNEL);
-        if (!entries)
-            return -ENOMEM;
-
-        for (i = 0; i < gpi_count; i++) {
-            entries[i].client = client;
-            entries[i].index = i;
-            scnprintf(name, UCD9000_DEBUGFS_NAME_LEN,
-                  "gpi%d_alarm", i + 1);
-            debugfs_create_file(name, 0444, data->debugfs,
-                        &entries[i],
-                        &ucd9000_debugfs_mfr_status_bit);
-        }
-    }
-
-    scnprintf(name, UCD9000_DEBUGFS_NAME_LEN, "mfr_status");
-    debugfs_create_file(name, 0444, data->debugfs, client,
-                &ucd9000_debugfs_show_mfr_status_fops);
-
-    return 0;
-}
-#else
-static int ucd9000_init_debugfs(struct i2c_client *client,
-                const struct i2c_device_id *mid,
-                struct ucd9000_data *data)
-{
-    return 0;
-}
-#endif /* CONFIG_DEBUG_FS */
-
-static int ucd9000_probe(struct i2c_client *client)
-{
-    u8 block_buffer[I2C_SMBUS_BLOCK_MAX + 1];
-    char wb_device_name[WB_DEV_NAME_MAX_LEN];
-    struct ucd9000_data *data;
-    struct pmbus_driver_info *info;
-    const struct i2c_device_id *mid;
-    enum chips chip;
-    int i, ret;
-
-    if (!i2c_check_functionality(client->adapter,
-                     I2C_FUNC_SMBUS_BYTE_DATA))
-        return -ENODEV;
-
-    ret = wb_i2c_smbus_read_block_data(client, UCD9000_DEVICE_ID,
-                    block_buffer);
-    if (ret < 0) {
-        dev_err(&client->dev, "Failed to read device ID\n");
-        return ret;
-    }
-    block_buffer[ret] = '\0';
-    dev_info(&client->dev, "Device ID %s\n", block_buffer);
-
-    mem_clear(wb_device_name, sizeof(wb_device_name));
-    snprintf(wb_device_name, sizeof(wb_device_name), "wb_%s", block_buffer);
-
-    for (mid = ucd9000_id; mid->name[0]; mid++) {
-        if (!strncasecmp(mid->name, wb_device_name, strlen(mid->name)))
-            break;
-    }
-    if (!mid->name[0]) {
-        dev_err(&client->dev, "Unsupported device\n");
-        return -ENODEV;
-    }
-
-    if (client->dev.of_node)
-        chip = (enum chips)of_device_get_match_data(&client->dev);
-    else
-        chip = mid->driver_data;
-
-    if (chip != ucd9000 && strcmp(client->name, mid->name) != 0)
-        dev_notice(&client->dev,
-               "Device mismatch: Configured %s, detected %s\n",
-               client->name, mid->name);
-
-    data = devm_kzalloc(&client->dev, sizeof(struct ucd9000_data),
-                GFP_KERNEL);
-    if (!data)
-        return -ENOMEM;
-    info = &data->info;
-
-    ret = i2c_smbus_read_byte_data(client, UCD9000_NUM_PAGES);
-    if (ret < 0) {
-        dev_err(&client->dev,
-            "Failed to read number of active pages\n");
-        return ret;
-    }
-    info->pages = ret;
-    if (!info->pages) {
-        dev_err(&client->dev, "No pages configured\n");
-        return -ENODEV;
-    }
-
-    /* The internal temperature sensor is always active */
-    /* ucd90160 have no temperature */
-    /* info->func[0] = PMBUS_HAVE_TEMP; */
-
-    /* Everything else is configurable */
-    ret = wb_i2c_smbus_read_block_data(client, UCD9000_MONITOR_CONFIG,
-                    block_buffer);
-    if (ret <= 0) {
-        dev_err(&client->dev, "Failed to read configuration data\n");
-        return -ENODEV;
-    }
-    for (i = 0; i < ret; i++) {
-        int page = UCD9000_MON_PAGE(block_buffer[i]);
-
-        if (page >= info->pages)
-            continue;
-
-        switch (UCD9000_MON_TYPE(block_buffer[i])) {
-        case UCD9000_MON_VOLTAGE:
-        case UCD9000_MON_VOLTAGE_HW:
-            info->func[page] |= PMBUS_HAVE_VOUT
-              | PMBUS_HAVE_STATUS_VOUT;
-            break;
-        case UCD9000_MON_TEMPERATURE:
-            info->func[page] |= PMBUS_HAVE_TEMP2
-              | PMBUS_HAVE_STATUS_TEMP;
-            break;
-        case UCD9000_MON_CURRENT:
-            info->func[page] |= PMBUS_HAVE_IOUT
-              | PMBUS_HAVE_STATUS_IOUT;
-            break;
-        default:
-            break;
-        }
-    }
-
-    /* Fan configuration */
-    if (mid->driver_data == ucd90124) {
-        for (i = 0; i < UCD9000_NUM_FAN; i++) {
-            i2c_smbus_write_byte_data(client,
-                          UCD9000_FAN_CONFIG_INDEX, i);
-            ret = wb_i2c_smbus_read_block_data(client,
-                            UCD9000_FAN_CONFIG,
-                            data->fan_data[i]);
-            if (ret < 0)
-                return ret;
-        }
-        i2c_smbus_write_byte_data(client, UCD9000_FAN_CONFIG_INDEX, 0);
-
-        info->read_byte_data = ucd9000_read_byte_data;
-        info->func[0] |= PMBUS_HAVE_FAN12 | PMBUS_HAVE_STATUS_FAN12
-          | PMBUS_HAVE_FAN34 | PMBUS_HAVE_STATUS_FAN34;
-    }
-
-    ucd9000_probe_gpio(client, mid, data);
-
-    ret = wb_pmbus_do_probe(client, info);
-    if (ret)
-        return ret;
-
-    ret = ucd9000_init_debugfs(client, mid, data);
-    if (ret)
-        dev_warn(&client->dev, "Failed to register debugfs: %d\n",
-             ret);
-
-    return 0;
-}
-
-/* This is the driver that will be inserted */
-static struct i2c_driver ucd9000_driver = {
-    .driver = {
-        .name = "wb_ucd9000",
-        .of_match_table = of_match_ptr(ucd9000_of_match),
-    },
-    .probe_new = ucd9000_probe,
-    .remove = wb_pmbus_do_remove,
-    .id_table = ucd9000_id,
-};
-
-module_i2c_driver(ucd9000_driver);
-
-MODULE_AUTHOR("support");
-MODULE_DESCRIPTION("PMBus driver for TI UCD90xxx");
-MODULE_LICENSE("GPL");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_xdpe12284.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_xdpe12284.c
deleted file mode 100644
index f45d683e3..000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_xdpe12284.c
+++ /dev/null
@@ -1,499 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later
-/*
- * Hardware monitoring driver for Infineon Multi-phase Digital VR Controllers
- *
- * Copyright (c) 2020 Mellanox Technologies. All rights reserved.
- */
-
-#include <linux/err.h>
-#include <linux/hwmon-sysfs.h>
-#include <linux/i2c.h>
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <linux/sysfs.h>
-#include "wb_pmbus.h"
-
-#define XDPE122_PROT_VR12_5MV        (0x01) /* VR12.0 mode, 5-mV DAC */
-#define XDPE122_PROT_VR12_5_10MV     (0x02) /* VR12.5 mode, 10-mV DAC */
-#define XDPE122_PROT_IMVP9_10MV      (0x03) /* IMVP9 mode, 10-mV DAC */
-#define XDPE122_AMD_625MV            (0x10) /* AMD mode 6.25mV */
-#define XDPE122_PAGE_NUM             (2)
-#define XDPE122_WRITE_PROTECT_CLOSE  (0x00)
-#define XDPE122_WRITE_PROTECT_OPEN   (0x40)
-
-static int g_wb_xdpe122_debug = 0;
-static int g_wb_xdpe122_error = 0;
-
-module_param(g_wb_xdpe122_debug, int, S_IRUGO | S_IWUSR);
-module_param(g_wb_xdpe122_error, int, S_IRUGO | S_IWUSR);
-
-#define WB_XDPE122_VERBOSE(fmt, args...) do {                                        \
-    if (g_wb_xdpe122_debug) { \
-        printk(KERN_INFO "[WB_XDPE122][VER][func:%s line:%d]\n"fmt, __func__, __LINE__, ## args); \
-    } \
-} while (0)
-
-#define WB_XDPE122_ERROR(fmt, args...) do {                                        \
-    if (g_wb_xdpe122_error) { \
-        printk(KERN_ERR "[WB_XDPE122][ERR][func:%s line:%d]\n"fmt, __func__, __LINE__, ## args); \
-    } \
-} while (0)
-
-static int xdpe122_data2reg_vid(struct pmbus_data *data, int page, long val)
-{
-    int vrm_version;
-
-    vrm_version = data->info->vrm_version[page];
-    WB_XDPE122_VERBOSE("page%d, vrm_version: %d, data_val: %ld\n",
-        page, vrm_version, val);
-    /* Convert data to VID register. */
-    switch (vrm_version) {
-    case vr13:
-        if (val >= 500) {
-            return 1 + DIV_ROUND_CLOSEST(val - 500, 10);
-        }
-        return 0;
-    case vr12:
-        if (val >= 250) {
-            return 1 + DIV_ROUND_CLOSEST(val - 250, 5);
-        }
-        return 0;
-    case imvp9:
-        if (val >= 200) {
-            return 1 + DIV_ROUND_CLOSEST(val - 200, 10);
-        }
-        return 0;
-    case amd625mv:
-        if (val >= 200 && val <= 1550) {
-            return DIV_ROUND_CLOSEST((1550 - val) * 100, 625);
-        }
-        return 0;
-    default:
-        WB_XDPE122_ERROR("Unsupport vrm_version, page%d, vrm_version: %d\n",
-            page, vrm_version);
-        return -EINVAL;
-    }
-    return 0;
-}
-
-/*
- * Convert VID sensor values to milli- or micro-units
- * depending on sensor type.
- */
-static s64 xdpe122_reg2data_vid(struct pmbus_data *data, int page, long val)
-{
-
-    long rv;
-    int vrm_version;
-
-    rv = 0;
-    vrm_version = data->info->vrm_version[page];
-    switch (vrm_version) {
-    case vr11:
-        if (val >= 0x02 && val <= 0xb2)
-            rv = DIV_ROUND_CLOSEST(160000 - (val - 2) * 625, 100);
-        break;
-    case vr12:
-        if (val >= 0x01)
-            rv = 250 + (val - 1) * 5;
-        break;
-    case vr13:
-        if (val >= 0x01)
-            rv = 500 + (val - 1) * 10;
-        break;
-    case imvp9:
-        if (val >= 0x01)
-            rv = 200 + (val - 1) * 10;
-        break;
-    case amd625mv:
-        if (val >= 0x0 && val <= 0xd8)
-            rv = DIV_ROUND_CLOSEST(155000 - val * 625, 100);
-        break;
-    }
-    WB_XDPE122_VERBOSE("page%d, vrm_version: %d, reg_val: 0x%lx, data_val: %ld\n",
-        page, vrm_version, val, rv);
-    return rv;
-}
-
-static ssize_t xdpe122_avs_vout_show(struct device *dev, struct device_attribute *devattr,
-                   char *buf)
-{
-    struct i2c_client *client = to_i2c_client(dev->parent);
-    struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
-    struct pmbus_data *data = i2c_get_clientdata(client);
-    int vout_cmd, vout;
-
-    mutex_lock(&data->update_lock);
-    vout_cmd = wb_pmbus_read_word_data(client, attr->index, 0xff, PMBUS_VOUT_COMMAND);
-    if (vout_cmd < 0) {
-        WB_XDPE122_ERROR("%d-%04x: read page%d, vout command reg: 0x%x failed, ret: %d\n",
-            client->adapter->nr, client->addr, attr->index, PMBUS_VOUT_COMMAND, vout_cmd);
-        mutex_unlock(&data->update_lock);
-        return vout_cmd;
-    }
-
-    vout = xdpe122_reg2data_vid(data, attr->index, vout_cmd);
-    vout = vout * 1000;
-    WB_XDPE122_VERBOSE("%d-%04x: page%d, vout command reg_val: 0x%x, vout: %d uV\n",
-        client->adapter->nr, client->addr, attr->index, vout_cmd, vout);
-
-    mutex_unlock(&data->update_lock);
-    return snprintf(buf, PAGE_SIZE, "%d\n", vout);
-}
-
-static ssize_t xdpe122_avs_vout_store(struct device *dev, struct device_attribute *devattr,
-                   const char *buf, size_t count)
-{
-    struct i2c_client *client = to_i2c_client(dev->parent);
-    struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
-    struct pmbus_data *data = i2c_get_clientdata(client);
-    int vout, vout_max, vout_min, vout_mv;
-    int ret, vout_cmd, vout_cmd_set;
-
-    if ((attr->index < 0) || (attr->index >= PMBUS_PAGES)) {
-        WB_XDPE122_ERROR("%d-%04x: invalid index: %d \n", client->adapter->nr, client->addr,
-            attr->index);
-        return -EINVAL;
-    }
-
-    ret = kstrtoint(buf, 0, &vout);
-    if (ret) {
-        WB_XDPE122_ERROR("%d-%04x: invalid value: %s \n", client->adapter->nr, client->addr, buf);
-        return -EINVAL;
-    }
-
-    if (vout <= 0) {
-        WB_XDPE122_ERROR("%d-%04x: invalid value: %d \n", client->adapter->nr, client->addr, vout);
-        return -EINVAL;
-    }
-
-    vout_max = data->vout_max[attr->index];
-    vout_min = data->vout_min[attr->index];
-    if ((vout > vout_max) || (vout < vout_min)) {
-        WB_XDPE122_ERROR("%d-%04x: vout value: %d, out of range [%d, %d] \n", client->adapter->nr,
-            client->addr, vout, vout_min, vout_max);
-        return -EINVAL;
-    }
-
-    /* calc VOUT_COMMAND set value Unit must be mV*/
-    vout_mv = vout / 1000;
-    vout_cmd_set = xdpe122_data2reg_vid(data, attr->index, vout_mv);
-    if ((vout_cmd_set < 0) || (vout_cmd_set > 0xffff)) {
-        WB_XDPE122_ERROR("%d-%04x: invalid value, vout %d uV, vout_cmd_set: %d\n",
-            client->adapter->nr, client->addr, vout, vout_cmd_set);
-        return -EINVAL;
-    }
-
-    mutex_lock(&data->update_lock);
-
-    /* close write protect */
-    ret = wb_pmbus_write_byte_data(client, attr->index, PMBUS_WRITE_PROTECT, XDPE122_WRITE_PROTECT_CLOSE);
-    if (ret < 0) {
-        WB_XDPE122_ERROR("%d-%04x: close page%d write protect failed, ret: %d\n", client->adapter->nr,
-            client->addr, attr->index, ret);
-        mutex_unlock(&data->update_lock);
-        return ret;
-    }
-
-    /* set VOUT_COMMAND */
-    ret = wb_pmbus_write_word_data(client, attr->index, PMBUS_VOUT_COMMAND, vout_cmd_set);
-    if (ret < 0) {
-        WB_XDPE122_ERROR("%d-%04x: set page%d vout cmd reg: 0x%x, value: 0x%x failed, ret: %d\n",
-            client->adapter->nr, client->addr, attr->index, PMBUS_VOUT_COMMAND, vout_cmd_set, ret);
-        goto error;
-    }
-
-    /* read back VOUT_COMMAND */
-    vout_cmd = wb_pmbus_read_word_data(client, attr->index, 0xff, PMBUS_VOUT_COMMAND);
-    if (vout_cmd < 0) {
-        ret = vout_cmd;
-        WB_XDPE122_ERROR("%d-%04x: read page%d vout command reg: 0x%x failed, ret: %d\n",
-            client->adapter->nr, client->addr, attr->index, PMBUS_VOUT_COMMAND, ret);
-        goto error;
-    }
-
-    /* compare vout_cmd and vout_cmd_set */
-    if (vout_cmd != vout_cmd_set) {
-        ret = -EIO;
-        WB_XDPE122_ERROR("%d-%04x: vout cmd value check error, vout cmd read: 0x%x, vout cmd set: 0x%x\n",
-            client->adapter->nr, client->addr, vout_cmd, vout_cmd_set);
-        goto error;
-    }
-
-    /* open write protect */
-    wb_pmbus_write_byte_data(client, attr->index, PMBUS_WRITE_PROTECT, XDPE122_WRITE_PROTECT_OPEN);
-    mutex_unlock(&data->update_lock);
-    WB_XDPE122_VERBOSE("%d-%04x: set page%d vout cmd success, vout %d uV, vout_cmd_set: 0x%x\n",
-        client->adapter->nr, client->addr, attr->index, vout, vout_cmd_set);
-    return count;
-error:
-    wb_pmbus_write_byte_data(client, attr->index, PMBUS_WRITE_PROTECT, XDPE122_WRITE_PROTECT_OPEN);
-    mutex_unlock(&data->update_lock);
-    return ret;
-}
-
-static ssize_t xdpe122_avs_vout_max_store(struct device *dev,
-                   struct device_attribute *devattr, const char *buf, size_t count)
-{
-    struct i2c_client *client = to_i2c_client(dev->parent);
-    struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
-    struct pmbus_data *data = i2c_get_clientdata(client);
-    int ret, vout_threshold;
-
-    if ((attr->index < 0) || (attr->index >= PMBUS_PAGES)) {
-        WB_XDPE122_ERROR("%d-%04x: invalid index: %d \n", client->adapter->nr, client->addr,
-            attr->index);
-        return -EINVAL;
-    }
-
-    ret = kstrtoint(buf, 0, &vout_threshold);
-    if (ret) {
-        WB_XDPE122_ERROR("%d-%04x: invalid value: %s \n", client->adapter->nr, client->addr, buf);
-        return -EINVAL;
-    }
-
-    WB_XDPE122_VERBOSE("%d-%04x: vout%d max threshold: %d", client->adapter->nr, client->addr,
-        attr->index, vout_threshold);
-
-    data->vout_max[attr->index] = vout_threshold;
-    return count;
-}
-
-static ssize_t xdpe122_avs_vout_max_show(struct device *dev,
-                   struct device_attribute *devattr, char *buf)
-{
-    struct i2c_client *client = to_i2c_client(dev->parent);
-    struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
-    struct pmbus_data *data = i2c_get_clientdata(client);
-
-    if ((attr->index < 0) || (attr->index >= PMBUS_PAGES)) {
-        WB_XDPE122_ERROR("%d-%04x: invalid index: %d \n", client->adapter->nr, client->addr,
-            attr->index);
-        return -EINVAL;
-    }
-
-    return snprintf(buf, PAGE_SIZE, "%d\n", data->vout_max[attr->index]);
-}
-
-static ssize_t xdpe122_avs_vout_min_store(struct device *dev,
-                   struct device_attribute *devattr, const char *buf, size_t count)
-{
-    struct i2c_client *client = to_i2c_client(dev->parent);
-    struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
-    struct pmbus_data *data = i2c_get_clientdata(client);
-    int ret, vout_threshold;
-
-    if ((attr->index < 0) || (attr->index >= PMBUS_PAGES)) {
-        WB_XDPE122_ERROR("%d-%04x: invalid index: %d \n", client->adapter->nr, client->addr,
-            attr->index);
-        return -EINVAL;
-    }
-
-    ret = kstrtoint(buf, 0, &vout_threshold);
-    if (ret) {
-        WB_XDPE122_ERROR("%d-%04x: invalid value: %s \n", client->adapter->nr, client->addr, buf);
-        return -EINVAL;
-    }
-
-    WB_XDPE122_VERBOSE("%d-%04x: vout%d min threshold: %d", client->adapter->nr, client->addr,
-        attr->index, vout_threshold);
-
-    data->vout_min[attr->index] = vout_threshold;
-    return count;
-}
-
-static ssize_t xdpe122_avs_vout_min_show(struct device *dev,
-                   struct device_attribute *devattr, char *buf)
-{
-    struct i2c_client *client = to_i2c_client(dev->parent);
-    struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
-    struct pmbus_data *data = i2c_get_clientdata(client);
-
-    if ((attr->index < 0) || (attr->index >= PMBUS_PAGES)) {
-        WB_XDPE122_ERROR("%d-%04x: invalid index: %d \n", client->adapter->nr, client->addr,
-            attr->index);
-        return -EINVAL;
-    }
-
-    return snprintf(buf, PAGE_SIZE, "%d\n", data->vout_min[attr->index]);
-}
-
-static SENSOR_DEVICE_ATTR_RW(avs0_vout, xdpe122_avs_vout, 0);
-static SENSOR_DEVICE_ATTR_RW(avs1_vout, xdpe122_avs_vout, 1);
-static SENSOR_DEVICE_ATTR_RW(avs0_vout_max, xdpe122_avs_vout_max, 0);
-static SENSOR_DEVICE_ATTR_RW(avs0_vout_min, xdpe122_avs_vout_min, 0);
-static SENSOR_DEVICE_ATTR_RW(avs1_vout_max, xdpe122_avs_vout_max, 1);
-static SENSOR_DEVICE_ATTR_RW(avs1_vout_min, xdpe122_avs_vout_min, 1);
-
-static struct attribute *avs_ctrl_attrs[] = {
-    &sensor_dev_attr_avs0_vout.dev_attr.attr,
-    &sensor_dev_attr_avs1_vout.dev_attr.attr,
-    &sensor_dev_attr_avs0_vout_max.dev_attr.attr,
-    &sensor_dev_attr_avs0_vout_min.dev_attr.attr,
-    &sensor_dev_attr_avs1_vout_max.dev_attr.attr,
-    &sensor_dev_attr_avs1_vout_min.dev_attr.attr,
-    NULL,
-};
-
-static const struct attribute_group avs_ctrl_group = {
-    .attrs = avs_ctrl_attrs,
-};
-
-static const struct attribute_group *xdpe122_attribute_groups[] = {
-    &avs_ctrl_group,
-    NULL,
-};
-
-static int xdpe122_read_word_data(struct i2c_client *client, int page,
-				  int phase, int reg)
-{
-	const struct pmbus_driver_info *info = wb_pmbus_get_driver_info(client);
-	long val;
-	s16 exponent;
-	s32 mantissa;
-	int ret;
-
-	switch (reg) {
-	case PMBUS_VOUT_OV_FAULT_LIMIT:
-	case PMBUS_VOUT_UV_FAULT_LIMIT:
-		ret = wb_pmbus_read_word_data(client, page, phase, reg);
-		if (ret < 0)
-			return ret;
-
-		/* Convert register value to LINEAR11 data. */
-		exponent = ((s16)ret) >> 11;
-		mantissa = ((s16)((ret & GENMASK(10, 0)) << 5)) >> 5;
-		val = mantissa * 1000L;
-		if (exponent >= 0)
-			val <<= exponent;
-		else
-			val >>= -exponent;
-
-		/* Convert data to VID register. */
-		switch (info->vrm_version[page]) {
-		case vr13:
-			if (val >= 500)
-				return 1 + DIV_ROUND_CLOSEST(val - 500, 10);
-			return 0;
-		case vr12:
-			if (val >= 250)
-				return 1 + DIV_ROUND_CLOSEST(val - 250, 5);
-			return 0;
-		case imvp9:
-			if (val >= 200)
-				return 1 + DIV_ROUND_CLOSEST(val - 200, 10);
-			return 0;
-		case amd625mv:
-			if (val >= 200 && val <= 1550)
-				return DIV_ROUND_CLOSEST((1550 - val) * 100,
-							 625);
-			return 0;
-		default:
-			return -EINVAL;
-		}
-	default:
-		return -ENODATA;
-	}
-
-	return 0;
-}
-
-static int xdpe122_identify(struct i2c_client *client,
-			    struct pmbus_driver_info *info)
-{
-	u8 vout_params;
-	int i, ret;
-
-	for (i = 0; i < XDPE122_PAGE_NUM; i++) {
-		/* Read the register with VOUT scaling value.*/
-		ret = wb_pmbus_read_byte_data(client, i, PMBUS_VOUT_MODE);
-		if (ret < 0)
-			return ret;
-
-		vout_params = ret & GENMASK(4, 0);
-
-		switch (vout_params) {
-		case XDPE122_PROT_VR12_5_10MV:
-			info->vrm_version[i] = vr13;
-			break;
-		case XDPE122_PROT_VR12_5MV:
-			info->vrm_version[i] = vr12;
-			break;
-		case XDPE122_PROT_IMVP9_10MV:
-			info->vrm_version[i] = imvp9;
-			break;
-		case XDPE122_AMD_625MV:
-			info->vrm_version[i] = amd625mv;
-			break;
-		default:
-			return -EINVAL;
-		}
-	}
-
-	return 0;
-}
-
-static struct pmbus_driver_info xdpe122_info = {
-	.pages = XDPE122_PAGE_NUM,
-	.format[PSC_VOLTAGE_IN] = linear,
-	.format[PSC_VOLTAGE_OUT] = vid,
-	.format[PSC_TEMPERATURE] = linear,
-	.format[PSC_CURRENT_IN] = linear,
-	.format[PSC_CURRENT_OUT] = linear,
-	.format[PSC_POWER] = linear,
-	.func[0] = PMBUS_HAVE_VIN | PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT |
-		PMBUS_HAVE_IIN | PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT |
-		PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP |
-		PMBUS_HAVE_POUT | PMBUS_HAVE_PIN | PMBUS_HAVE_STATUS_INPUT,
-	.func[1] = PMBUS_HAVE_VIN | PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT |
-		PMBUS_HAVE_IIN | PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT |
-		PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP |
-		PMBUS_HAVE_POUT | PMBUS_HAVE_PIN | PMBUS_HAVE_STATUS_INPUT,
-	.groups = xdpe122_attribute_groups,
-	.identify = xdpe122_identify,
-	.read_word_data = xdpe122_read_word_data,
-};
-
-static int xdpe122_probe(struct i2c_client *client)
-{
-	struct pmbus_driver_info *info;
-
-	info = devm_kmemdup(&client->dev, &xdpe122_info, sizeof(*info),
-			    GFP_KERNEL);
-	if (!info)
-		return -ENOMEM;
-
-	return wb_pmbus_do_probe(client, info);
-}
-
-static const struct i2c_device_id xdpe122_id[] = {
-	{"wb_xdpe12254", 0},
-	{"wb_xdpe12284", 0},
-	{}
-};
-
-MODULE_DEVICE_TABLE(i2c, xdpe122_id);
-
-static const struct of_device_id __maybe_unused xdpe122_of_match[] = {
-	{.compatible = "infineon,wb_xdpe12254"},
-	{.compatible = "infineon,wb_xdpe12284"},
-	{}
-};
-MODULE_DEVICE_TABLE(of, xdpe122_of_match);
-
-static struct i2c_driver xdpe122_driver = {
-	.driver = {
-		.name = "wb_xdpe12284",
-		.of_match_table = of_match_ptr(xdpe122_of_match),
-	},
-	.probe_new = xdpe122_probe,
-	.remove = wb_pmbus_do_remove,
-	.id_table = xdpe122_id,
-};
-
-module_i2c_driver(xdpe122_driver);
-
-MODULE_AUTHOR("Vadim Pasternak <vadimp@mellanox.com>");
-MODULE_DESCRIPTION("PMBus driver for Infineon XDPE122 family");
-MODULE_LICENSE("GPL");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/pmbus.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/pmbus.h
new file mode 100755
index 000000000..10fb17879
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/pmbus.h
@@ -0,0 +1,511 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/*
+ * pmbus.h - Common defines and structures for PMBus devices
+ *
+ * Copyright (c) 2010, 2011 Ericsson AB.
+ * Copyright (c) 2012 Guenter Roeck
+ */
+
+#ifndef PMBUS_H
+#define PMBUS_H
+
+#include <linux/bitops.h>
+#include <linux/regulator/driver.h>
+
+/*
+ * Registers
+ */
+enum pmbus_regs {
+	PMBUS_PAGE			= 0x00,
+	PMBUS_OPERATION			= 0x01,
+	PMBUS_ON_OFF_CONFIG		= 0x02,
+	PMBUS_CLEAR_FAULTS		= 0x03,
+	PMBUS_PHASE			= 0x04,
+
+	PMBUS_WRITE_PROTECT		= 0x10,
+
+	PMBUS_CAPABILITY		= 0x19,
+	PMBUS_QUERY			= 0x1A,
+
+	PMBUS_VOUT_MODE			= 0x20,
+	PMBUS_VOUT_COMMAND		= 0x21,
+	PMBUS_VOUT_TRIM			= 0x22,
+	PMBUS_VOUT_CAL_OFFSET		= 0x23,
+	PMBUS_VOUT_MAX			= 0x24,
+	PMBUS_VOUT_MARGIN_HIGH		= 0x25,
+	PMBUS_VOUT_MARGIN_LOW		= 0x26,
+	PMBUS_VOUT_TRANSITION_RATE	= 0x27,
+	PMBUS_VOUT_DROOP		= 0x28,
+	PMBUS_VOUT_SCALE_LOOP		= 0x29,
+	PMBUS_VOUT_SCALE_MONITOR	= 0x2A,
+
+	PMBUS_COEFFICIENTS		= 0x30,
+	PMBUS_POUT_MAX			= 0x31,
+
+	PMBUS_FAN_CONFIG_12		= 0x3A,
+	PMBUS_FAN_COMMAND_1		= 0x3B,
+	PMBUS_FAN_COMMAND_2		= 0x3C,
+	PMBUS_FAN_CONFIG_34		= 0x3D,
+	PMBUS_FAN_COMMAND_3		= 0x3E,
+	PMBUS_FAN_COMMAND_4		= 0x3F,
+
+	PMBUS_VOUT_OV_FAULT_LIMIT	= 0x40,
+	PMBUS_VOUT_OV_FAULT_RESPONSE	= 0x41,
+	PMBUS_VOUT_OV_WARN_LIMIT	= 0x42,
+	PMBUS_VOUT_UV_WARN_LIMIT	= 0x43,
+	PMBUS_VOUT_UV_FAULT_LIMIT	= 0x44,
+	PMBUS_VOUT_UV_FAULT_RESPONSE	= 0x45,
+	PMBUS_IOUT_OC_FAULT_LIMIT	= 0x46,
+	PMBUS_IOUT_OC_FAULT_RESPONSE	= 0x47,
+	PMBUS_IOUT_OC_LV_FAULT_LIMIT	= 0x48,
+	PMBUS_IOUT_OC_LV_FAULT_RESPONSE	= 0x49,
+	PMBUS_IOUT_OC_WARN_LIMIT	= 0x4A,
+	PMBUS_IOUT_UC_FAULT_LIMIT	= 0x4B,
+	PMBUS_IOUT_UC_FAULT_RESPONSE	= 0x4C,
+
+	PMBUS_OT_FAULT_LIMIT		= 0x4F,
+	PMBUS_OT_FAULT_RESPONSE		= 0x50,
+	PMBUS_OT_WARN_LIMIT		= 0x51,
+	PMBUS_UT_WARN_LIMIT		= 0x52,
+	PMBUS_UT_FAULT_LIMIT		= 0x53,
+	PMBUS_UT_FAULT_RESPONSE		= 0x54,
+	PMBUS_VIN_OV_FAULT_LIMIT	= 0x55,
+	PMBUS_VIN_OV_FAULT_RESPONSE	= 0x56,
+	PMBUS_VIN_OV_WARN_LIMIT		= 0x57,
+	PMBUS_VIN_UV_WARN_LIMIT		= 0x58,
+	PMBUS_VIN_UV_FAULT_LIMIT	= 0x59,
+
+	PMBUS_IIN_OC_FAULT_LIMIT	= 0x5B,
+	PMBUS_IIN_OC_WARN_LIMIT		= 0x5D,
+
+	PMBUS_POUT_OP_FAULT_LIMIT	= 0x68,
+	PMBUS_POUT_OP_WARN_LIMIT	= 0x6A,
+	PMBUS_PIN_OP_WARN_LIMIT		= 0x6B,
+
+	PMBUS_STATUS_BYTE		= 0x78,
+	PMBUS_STATUS_WORD		= 0x79,
+	PMBUS_STATUS_VOUT		= 0x7A,
+	PMBUS_STATUS_IOUT		= 0x7B,
+	PMBUS_STATUS_INPUT		= 0x7C,
+	PMBUS_STATUS_TEMPERATURE	= 0x7D,
+	PMBUS_STATUS_CML		= 0x7E,
+	PMBUS_STATUS_OTHER		= 0x7F,
+	PMBUS_STATUS_MFR_SPECIFIC	= 0x80,
+	PMBUS_STATUS_FAN_12		= 0x81,
+	PMBUS_STATUS_FAN_34		= 0x82,
+
+	PMBUS_READ_VIN			= 0x88,
+	PMBUS_READ_IIN			= 0x89,
+	PMBUS_READ_VCAP			= 0x8A,
+	PMBUS_READ_VOUT			= 0x8B,
+	PMBUS_READ_IOUT			= 0x8C,
+	PMBUS_READ_TEMPERATURE_1	= 0x8D,
+	PMBUS_READ_TEMPERATURE_2	= 0x8E,
+	PMBUS_READ_TEMPERATURE_3	= 0x8F,
+	PMBUS_READ_FAN_SPEED_1		= 0x90,
+	PMBUS_READ_FAN_SPEED_2		= 0x91,
+	PMBUS_READ_FAN_SPEED_3		= 0x92,
+	PMBUS_READ_FAN_SPEED_4		= 0x93,
+	PMBUS_READ_DUTY_CYCLE		= 0x94,
+	PMBUS_READ_FREQUENCY		= 0x95,
+	PMBUS_READ_POUT			= 0x96,
+	PMBUS_READ_PIN			= 0x97,
+
+	PMBUS_REVISION			= 0x98,
+	PMBUS_MFR_ID			= 0x99,
+	PMBUS_MFR_MODEL			= 0x9A,
+	PMBUS_MFR_REVISION		= 0x9B,
+	PMBUS_MFR_LOCATION		= 0x9C,
+	PMBUS_MFR_DATE			= 0x9D,
+	PMBUS_MFR_SERIAL		= 0x9E,
+
+	PMBUS_MFR_VIN_MIN		= 0xA0,
+	PMBUS_MFR_VIN_MAX		= 0xA1,
+	PMBUS_MFR_IIN_MAX		= 0xA2,
+	PMBUS_MFR_PIN_MAX		= 0xA3,
+	PMBUS_MFR_VOUT_MIN		= 0xA4,
+	PMBUS_MFR_VOUT_MAX		= 0xA5,
+	PMBUS_MFR_IOUT_MAX		= 0xA6,
+	PMBUS_MFR_POUT_MAX		= 0xA7,
+
+	PMBUS_IC_DEVICE_ID		= 0xAD,
+	PMBUS_IC_DEVICE_REV		= 0xAE,
+
+	PMBUS_MFR_MAX_TEMP_1		= 0xC0,
+	PMBUS_MFR_MAX_TEMP_2		= 0xC1,
+	PMBUS_MFR_MAX_TEMP_3		= 0xC2,
+
+/*
+ * Virtual registers.
+ * Useful to support attributes which are not supported by standard PMBus
+ * registers but exist as manufacturer specific registers on individual chips.
+ * Must be mapped to real registers in device specific code.
+ *
+ * Semantics:
+ * Virtual registers are all word size.
+ * READ registers are read-only; writes are either ignored or return an error.
+ * RESET registers are read/write. Reading reset registers returns zero
+ * (used for detection), writing any value causes the associated history to be
+ * reset.
+ * Virtual registers have to be handled in device specific driver code. Chip
+ * driver code returns non-negative register values if a virtual register is
+ * supported, or a negative error code if not. The chip driver may return
+ * -ENODATA or any other error code in this case, though an error code other
+ * than -ENODATA is handled more efficiently and thus preferred. Either case,
+ * the calling PMBus core code will abort if the chip driver returns an error
+ * code when reading or writing virtual registers.
+ */
+	PMBUS_VIRT_BASE			= 0x100,
+	PMBUS_VIRT_READ_TEMP_AVG,
+	PMBUS_VIRT_READ_TEMP_MIN,
+	PMBUS_VIRT_READ_TEMP_MAX,
+	PMBUS_VIRT_RESET_TEMP_HISTORY,
+	PMBUS_VIRT_READ_VIN_AVG,
+	PMBUS_VIRT_READ_VIN_MIN,
+	PMBUS_VIRT_READ_VIN_MAX,
+	PMBUS_VIRT_RESET_VIN_HISTORY,
+	PMBUS_VIRT_READ_IIN_AVG,
+	PMBUS_VIRT_READ_IIN_MIN,
+	PMBUS_VIRT_READ_IIN_MAX,
+	PMBUS_VIRT_RESET_IIN_HISTORY,
+	PMBUS_VIRT_READ_PIN_AVG,
+	PMBUS_VIRT_READ_PIN_MIN,
+	PMBUS_VIRT_READ_PIN_MAX,
+	PMBUS_VIRT_RESET_PIN_HISTORY,
+	PMBUS_VIRT_READ_POUT_AVG,
+	PMBUS_VIRT_READ_POUT_MIN,
+	PMBUS_VIRT_READ_POUT_MAX,
+	PMBUS_VIRT_RESET_POUT_HISTORY,
+	PMBUS_VIRT_READ_VOUT_AVG,
+	PMBUS_VIRT_READ_VOUT_MIN,
+	PMBUS_VIRT_READ_VOUT_MAX,
+	PMBUS_VIRT_RESET_VOUT_HISTORY,
+	PMBUS_VIRT_READ_IOUT_AVG,
+	PMBUS_VIRT_READ_IOUT_MIN,
+	PMBUS_VIRT_READ_IOUT_MAX,
+	PMBUS_VIRT_RESET_IOUT_HISTORY,
+	PMBUS_VIRT_READ_TEMP2_AVG,
+	PMBUS_VIRT_READ_TEMP2_MIN,
+	PMBUS_VIRT_READ_TEMP2_MAX,
+	PMBUS_VIRT_RESET_TEMP2_HISTORY,
+
+	PMBUS_VIRT_READ_VMON,
+	PMBUS_VIRT_VMON_UV_WARN_LIMIT,
+	PMBUS_VIRT_VMON_OV_WARN_LIMIT,
+	PMBUS_VIRT_VMON_UV_FAULT_LIMIT,
+	PMBUS_VIRT_VMON_OV_FAULT_LIMIT,
+	PMBUS_VIRT_STATUS_VMON,
+
+	/*
+	 * RPM and PWM Fan control
+	 *
+	 * Drivers wanting to expose PWM control must define the behaviour of
+	 * PMBUS_VIRT_PWM_[1-4] and PMBUS_VIRT_PWM_ENABLE_[1-4] in the
+	 * {read,write}_word_data callback.
+	 *
+	 * pmbus core provides a default implementation for
+	 * PMBUS_VIRT_FAN_TARGET_[1-4].
+	 *
+	 * TARGET, PWM and PWM_ENABLE members must be defined sequentially;
+	 * pmbus core uses the difference between the provided register and
+	 * it's _1 counterpart to calculate the FAN/PWM ID.
+	 */
+	PMBUS_VIRT_FAN_TARGET_1,
+	PMBUS_VIRT_FAN_TARGET_2,
+	PMBUS_VIRT_FAN_TARGET_3,
+	PMBUS_VIRT_FAN_TARGET_4,
+	PMBUS_VIRT_PWM_1,
+	PMBUS_VIRT_PWM_2,
+	PMBUS_VIRT_PWM_3,
+	PMBUS_VIRT_PWM_4,
+	PMBUS_VIRT_PWM_ENABLE_1,
+	PMBUS_VIRT_PWM_ENABLE_2,
+	PMBUS_VIRT_PWM_ENABLE_3,
+	PMBUS_VIRT_PWM_ENABLE_4,
+
+	/* Samples for average
+	 *
+	 * Drivers wanting to expose functionality for changing the number of
+	 * samples used for average values should implement support in
+	 * {read,write}_word_data callback for either PMBUS_VIRT_SAMPLES if it
+	 * applies to all types of measurements, or any number of specific
+	 * PMBUS_VIRT_*_SAMPLES registers to allow for individual control.
+	 */
+	PMBUS_VIRT_SAMPLES,
+	PMBUS_VIRT_IN_SAMPLES,
+	PMBUS_VIRT_CURR_SAMPLES,
+	PMBUS_VIRT_POWER_SAMPLES,
+	PMBUS_VIRT_TEMP_SAMPLES,
+};
+
+/*
+ * OPERATION
+ */
+#define PB_OPERATION_CONTROL_ON		BIT(7)
+
+/*
+ * WRITE_PROTECT
+ */
+#define PB_WP_ALL	BIT(7)	/* all but WRITE_PROTECT */
+#define PB_WP_OP	BIT(6)	/* all but WP, OPERATION, PAGE */
+#define PB_WP_VOUT	BIT(5)	/* all but WP, OPERATION, PAGE, VOUT, ON_OFF */
+
+#define PB_WP_ANY	(PB_WP_ALL | PB_WP_OP | PB_WP_VOUT)
+
+/*
+ * CAPABILITY
+ */
+#define PB_CAPABILITY_SMBALERT		BIT(4)
+#define PB_CAPABILITY_ERROR_CHECK	BIT(7)
+
+/*
+ * VOUT_MODE
+ */
+#define PB_VOUT_MODE_MODE_MASK		0xe0
+#define PB_VOUT_MODE_PARAM_MASK		0x1f
+
+#define PB_VOUT_MODE_LINEAR		0x00
+#define PB_VOUT_MODE_VID		0x20
+#define PB_VOUT_MODE_DIRECT		0x40
+
+/*
+ * Fan configuration
+ */
+#define PB_FAN_2_PULSE_MASK		(BIT(0) | BIT(1))
+#define PB_FAN_2_RPM			BIT(2)
+#define PB_FAN_2_INSTALLED		BIT(3)
+#define PB_FAN_1_PULSE_MASK		(BIT(4) | BIT(5))
+#define PB_FAN_1_RPM			BIT(6)
+#define PB_FAN_1_INSTALLED		BIT(7)
+
+enum pmbus_fan_mode { percent = 0, rpm };
+
+/*
+ * STATUS_BYTE, STATUS_WORD (lower)
+ */
+#define PB_STATUS_NONE_ABOVE		BIT(0)
+#define PB_STATUS_CML			BIT(1)
+#define PB_STATUS_TEMPERATURE		BIT(2)
+#define PB_STATUS_VIN_UV		BIT(3)
+#define PB_STATUS_IOUT_OC		BIT(4)
+#define PB_STATUS_VOUT_OV		BIT(5)
+#define PB_STATUS_OFF			BIT(6)
+#define PB_STATUS_BUSY			BIT(7)
+
+/*
+ * STATUS_WORD (upper)
+ */
+#define PB_STATUS_UNKNOWN		BIT(8)
+#define PB_STATUS_OTHER			BIT(9)
+#define PB_STATUS_FANS			BIT(10)
+#define PB_STATUS_POWER_GOOD_N		BIT(11)
+#define PB_STATUS_WORD_MFR		BIT(12)
+#define PB_STATUS_INPUT			BIT(13)
+#define PB_STATUS_IOUT_POUT		BIT(14)
+#define PB_STATUS_VOUT			BIT(15)
+
+/*
+ * STATUS_IOUT
+ */
+#define PB_POUT_OP_WARNING		BIT(0)
+#define PB_POUT_OP_FAULT		BIT(1)
+#define PB_POWER_LIMITING		BIT(2)
+#define PB_CURRENT_SHARE_FAULT		BIT(3)
+#define PB_IOUT_UC_FAULT		BIT(4)
+#define PB_IOUT_OC_WARNING		BIT(5)
+#define PB_IOUT_OC_LV_FAULT		BIT(6)
+#define PB_IOUT_OC_FAULT		BIT(7)
+
+/*
+ * STATUS_VOUT, STATUS_INPUT
+ */
+#define PB_VOLTAGE_VIN_OFF		BIT(3)
+#define PB_VOLTAGE_UV_FAULT		BIT(4)
+#define PB_VOLTAGE_UV_WARNING		BIT(5)
+#define PB_VOLTAGE_OV_WARNING		BIT(6)
+#define PB_VOLTAGE_OV_FAULT		BIT(7)
+
+/*
+ * STATUS_INPUT
+ */
+#define PB_PIN_OP_WARNING		BIT(0)
+#define PB_IIN_OC_WARNING		BIT(1)
+#define PB_IIN_OC_FAULT			BIT(2)
+
+/*
+ * STATUS_TEMPERATURE
+ */
+#define PB_TEMP_UT_FAULT		BIT(4)
+#define PB_TEMP_UT_WARNING		BIT(5)
+#define PB_TEMP_OT_WARNING		BIT(6)
+#define PB_TEMP_OT_FAULT		BIT(7)
+
+/*
+ * STATUS_FAN
+ */
+#define PB_FAN_AIRFLOW_WARNING		BIT(0)
+#define PB_FAN_AIRFLOW_FAULT		BIT(1)
+#define PB_FAN_FAN2_SPEED_OVERRIDE	BIT(2)
+#define PB_FAN_FAN1_SPEED_OVERRIDE	BIT(3)
+#define PB_FAN_FAN2_WARNING		BIT(4)
+#define PB_FAN_FAN1_WARNING		BIT(5)
+#define PB_FAN_FAN2_FAULT		BIT(6)
+#define PB_FAN_FAN1_FAULT		BIT(7)
+
+/*
+ * CML_FAULT_STATUS
+ */
+#define PB_CML_FAULT_OTHER_MEM_LOGIC	BIT(0)
+#define PB_CML_FAULT_OTHER_COMM		BIT(1)
+#define PB_CML_FAULT_PROCESSOR		BIT(3)
+#define PB_CML_FAULT_MEMORY		BIT(4)
+#define PB_CML_FAULT_PACKET_ERROR	BIT(5)
+#define PB_CML_FAULT_INVALID_DATA	BIT(6)
+#define PB_CML_FAULT_INVALID_COMMAND	BIT(7)
+
+enum pmbus_sensor_classes {
+	PSC_VOLTAGE_IN = 0,
+	PSC_VOLTAGE_OUT,
+	PSC_CURRENT_IN,
+	PSC_CURRENT_OUT,
+	PSC_POWER,
+	PSC_TEMPERATURE,
+	PSC_FAN,
+	PSC_PWM,
+	PSC_NUM_CLASSES		/* Number of power sensor classes */
+};
+
+#define PMBUS_PAGES	32	/* Per PMBus specification */
+#define PMBUS_PHASES	10	/* Maximum number of phases per page */
+
+/* Functionality bit mask */
+#define PMBUS_HAVE_VIN		BIT(0)
+#define PMBUS_HAVE_VCAP		BIT(1)
+#define PMBUS_HAVE_VOUT		BIT(2)
+#define PMBUS_HAVE_IIN		BIT(3)
+#define PMBUS_HAVE_IOUT		BIT(4)
+#define PMBUS_HAVE_PIN		BIT(5)
+#define PMBUS_HAVE_POUT		BIT(6)
+#define PMBUS_HAVE_FAN12	BIT(7)
+#define PMBUS_HAVE_FAN34	BIT(8)
+#define PMBUS_HAVE_TEMP		BIT(9)
+#define PMBUS_HAVE_TEMP2	BIT(10)
+#define PMBUS_HAVE_TEMP3	BIT(11)
+#define PMBUS_HAVE_STATUS_VOUT	BIT(12)
+#define PMBUS_HAVE_STATUS_IOUT	BIT(13)
+#define PMBUS_HAVE_STATUS_INPUT	BIT(14)
+#define PMBUS_HAVE_STATUS_TEMP	BIT(15)
+#define PMBUS_HAVE_STATUS_FAN12	BIT(16)
+#define PMBUS_HAVE_STATUS_FAN34	BIT(17)
+#define PMBUS_HAVE_VMON		BIT(18)
+#define PMBUS_HAVE_STATUS_VMON	BIT(19)
+#define PMBUS_HAVE_PWM12	BIT(20)
+#define PMBUS_HAVE_PWM34	BIT(21)
+#define PMBUS_HAVE_SAMPLES	BIT(22)
+
+#define PMBUS_PHASE_VIRTUAL	BIT(30)	/* Phases on this page are virtual */
+#define PMBUS_PAGE_VIRTUAL	BIT(31)	/* Page is virtual */
+
+enum pmbus_data_format { linear = 0, ieee754, direct, vid };
+enum vrm_version { vr11 = 0, vr12, vr13, imvp9, amd625mv };
+
+struct pmbus_driver_info {
+	int pages;		/* Total number of pages */
+	u8 phases[PMBUS_PAGES];	/* Number of phases per page */
+	enum pmbus_data_format format[PSC_NUM_CLASSES];
+	enum vrm_version vrm_version[PMBUS_PAGES]; /* vrm version per page */
+	/*
+	 * Support one set of coefficients for each sensor type
+	 * Used for chips providing data in direct mode.
+	 */
+	int m[PSC_NUM_CLASSES];	/* mantissa for direct data format */
+	int b[PSC_NUM_CLASSES];	/* offset */
+	int R[PSC_NUM_CLASSES];	/* exponent */
+
+	u32 func[PMBUS_PAGES];	/* Functionality, per page */
+	u32 pfunc[PMBUS_PHASES];/* Functionality, per phase */
+	/*
+	 * The following functions map manufacturing specific register values
+	 * to PMBus standard register values. Specify only if mapping is
+	 * necessary.
+	 * Functions return the register value (read) or zero (write) if
+	 * successful. A return value of -ENODATA indicates that there is no
+	 * manufacturer specific register, but that a standard PMBus register
+	 * may exist. Any other negative return value indicates that the
+	 * register does not exist, and that no attempt should be made to read
+	 * the standard register.
+	 */
+	int (*read_byte_data)(struct i2c_client *client, int page, int reg);
+	int (*read_word_data)(struct i2c_client *client, int page, int phase,
+			      int reg);
+	int (*write_byte_data)(struct i2c_client *client, int page, int reg,
+			      u8 byte);
+	int (*write_word_data)(struct i2c_client *client, int page, int reg,
+			       u16 word);
+	int (*write_byte)(struct i2c_client *client, int page, u8 value);
+	/*
+	 * The identify function determines supported PMBus functionality.
+	 * This function is only necessary if a chip driver supports multiple
+	 * chips, and the chip functionality is not pre-determined.
+	 */
+	int (*identify)(struct i2c_client *client,
+			struct pmbus_driver_info *info);
+
+	/* Regulator functionality, if supported by this chip driver. */
+	int num_regulators;
+	const struct regulator_desc *reg_desc;
+
+	/* custom attributes */
+	const struct attribute_group **groups;
+};
+
+/* Regulator ops */
+
+extern const struct regulator_ops pmbus_regulator_ops;
+
+/* Macros for filling in array of struct regulator_desc */
+#define PMBUS_REGULATOR_STEP(_name, _id, _voltages, _step)  \
+	[_id] = {						\
+		.name = (_name # _id),				\
+		.id = (_id),					\
+		.of_match = of_match_ptr(_name # _id),		\
+		.regulators_node = of_match_ptr("regulators"),	\
+		.ops = &pmbus_regulator_ops,			\
+		.type = REGULATOR_VOLTAGE,			\
+		.owner = THIS_MODULE,				\
+		.n_voltages = _voltages,			\
+		.uV_step = _step,				\
+	}
+
+#define PMBUS_REGULATOR(_name, _id)	PMBUS_REGULATOR_STEP(_name, _id, 0, 0)
+
+/* Function declarations */
+
+void pmbus_clear_cache(struct i2c_client *client);
+void pmbus_set_update(struct i2c_client *client, u8 reg, bool update);
+int pmbus_set_page(struct i2c_client *client, int page, int phase);
+int pmbus_read_word_data(struct i2c_client *client, int page, int phase,
+			 u8 reg);
+int pmbus_write_word_data(struct i2c_client *client, int page, u8 reg,
+			  u16 word);
+int pmbus_read_byte_data(struct i2c_client *client, int page, u8 reg);
+int pmbus_write_byte(struct i2c_client *client, int page, u8 value);
+int pmbus_write_byte_data(struct i2c_client *client, int page, u8 reg,
+			  u8 value);
+int pmbus_update_byte_data(struct i2c_client *client, int page, u8 reg,
+			   u8 mask, u8 value);
+void pmbus_clear_faults(struct i2c_client *client);
+bool pmbus_check_byte_register(struct i2c_client *client, int page, int reg);
+bool pmbus_check_word_register(struct i2c_client *client, int page, int reg);
+int pmbus_do_probe(struct i2c_client *client, struct pmbus_driver_info *info);
+const struct pmbus_driver_info *pmbus_get_driver_info(struct i2c_client
+						      *client);
+int pmbus_get_fan_rate_device(struct i2c_client *client, int page, int id,
+			      enum pmbus_fan_mode mode);
+int pmbus_get_fan_rate_cached(struct i2c_client *client, int page, int id,
+			      enum pmbus_fan_mode mode);
+int pmbus_update_fan(struct i2c_client *client, int page, int id,
+		     u8 config, u8 mask, u16 command);
+struct dentry *pmbus_get_debugfs_dir(struct i2c_client *client);
+
+#endif /* PMBUS_H */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_csu550.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_csu550.c
similarity index 76%
rename from platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_csu550.c
rename to platform/broadcom/sonic-platform-modules-micas/common/modules/wb_csu550.c
index 36d07f071..0b95663b9 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_csu550.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_csu550.c
@@ -13,7 +13,7 @@
 #include <linux/mutex.h>
 #include <linux/i2c.h>
 #include <linux/pmbus.h>
-#include "wb_pmbus.h"
+#include "pmbus.h"
 
 struct pmbus_device_info {
     int pages;
@@ -31,54 +31,56 @@ static void pmbus_find_sensor_groups(struct i2c_client *client,
     int page;
 
     /* Sensors detected on page 0 only */
-    if (wb_pmbus_check_word_register(client, 0, PMBUS_READ_VIN))
+    if (pmbus_check_word_register(client, 0, PMBUS_READ_VIN))
         info->func[0] |= PMBUS_HAVE_VIN;
-    if (wb_pmbus_check_word_register(client, 0, PMBUS_READ_IIN))
+    if (pmbus_check_word_register(client, 0, PMBUS_READ_VCAP))
+        info->func[0] |= PMBUS_HAVE_VCAP;
+    if (pmbus_check_word_register(client, 0, PMBUS_READ_IIN))
         info->func[0] |= PMBUS_HAVE_IIN;
-    if (wb_pmbus_check_word_register(client, 0, PMBUS_READ_PIN))
+    if (pmbus_check_word_register(client, 0, PMBUS_READ_PIN))
         info->func[0] |= PMBUS_HAVE_PIN;
     if (info->func[0]
-        && wb_pmbus_check_byte_register(client, 0, PMBUS_STATUS_INPUT))
+        && pmbus_check_byte_register(client, 0, PMBUS_STATUS_INPUT))
         info->func[0] |= PMBUS_HAVE_STATUS_INPUT;
-    if (wb_pmbus_check_byte_register(client, 0, PMBUS_FAN_CONFIG_12) &&
-        wb_pmbus_check_word_register(client, 0, PMBUS_READ_FAN_SPEED_1)) {
+    if (pmbus_check_byte_register(client, 0, PMBUS_FAN_CONFIG_12) &&
+        pmbus_check_word_register(client, 0, PMBUS_READ_FAN_SPEED_1)) {
         info->func[0] |= PMBUS_HAVE_FAN12;
-        if (wb_pmbus_check_byte_register(client, 0, PMBUS_STATUS_FAN_12))
+        if (pmbus_check_byte_register(client, 0, PMBUS_STATUS_FAN_12))
             info->func[0] |= PMBUS_HAVE_STATUS_FAN12;
     }
-    if (wb_pmbus_check_byte_register(client, 0, PMBUS_FAN_CONFIG_34) &&
-        wb_pmbus_check_word_register(client, 0, PMBUS_READ_FAN_SPEED_3)) {
+    if (pmbus_check_byte_register(client, 0, PMBUS_FAN_CONFIG_34) &&
+        pmbus_check_word_register(client, 0, PMBUS_READ_FAN_SPEED_3)) {
         info->func[0] |= PMBUS_HAVE_FAN34;
-        if (wb_pmbus_check_byte_register(client, 0, PMBUS_STATUS_FAN_34))
+        if (pmbus_check_byte_register(client, 0, PMBUS_STATUS_FAN_34))
             info->func[0] |= PMBUS_HAVE_STATUS_FAN34;
     }
-    if (wb_pmbus_check_word_register(client, 0, PMBUS_READ_TEMPERATURE_1))
+    if (pmbus_check_word_register(client, 0, PMBUS_READ_TEMPERATURE_1))
         info->func[0] |= PMBUS_HAVE_TEMP;
-    if (wb_pmbus_check_word_register(client, 0, PMBUS_READ_TEMPERATURE_2))
+    if (pmbus_check_word_register(client, 0, PMBUS_READ_TEMPERATURE_2))
         info->func[0] |= PMBUS_HAVE_TEMP2;
-    if (wb_pmbus_check_word_register(client, 0, PMBUS_READ_TEMPERATURE_3))
+    if (pmbus_check_word_register(client, 0, PMBUS_READ_TEMPERATURE_3))
         info->func[0] |= PMBUS_HAVE_TEMP3;
     if (info->func[0] & (PMBUS_HAVE_TEMP | PMBUS_HAVE_TEMP2
                  | PMBUS_HAVE_TEMP3)
-        && wb_pmbus_check_byte_register(client, 0,
+        && pmbus_check_byte_register(client, 0,
                      PMBUS_STATUS_TEMPERATURE))
             info->func[0] |= PMBUS_HAVE_STATUS_TEMP;
 
     /* Sensors detected on all pages */
     for (page = 0; page < info->pages; page++) {
-        if (wb_pmbus_check_word_register(client, page, PMBUS_READ_VOUT)) {
+        if (pmbus_check_word_register(client, page, PMBUS_READ_VOUT)) {
             info->func[page] |= PMBUS_HAVE_VOUT;
-            if (wb_pmbus_check_byte_register(client, page,
+            if (pmbus_check_byte_register(client, page,
                               PMBUS_STATUS_VOUT))
                 info->func[page] |= PMBUS_HAVE_STATUS_VOUT;
         }
-        if (wb_pmbus_check_word_register(client, page, PMBUS_READ_IOUT)) {
+        if (pmbus_check_word_register(client, page, PMBUS_READ_IOUT)) {
             info->func[page] |= PMBUS_HAVE_IOUT;
-            if (wb_pmbus_check_byte_register(client, 0,
+            if (pmbus_check_byte_register(client, 0,
                               PMBUS_STATUS_IOUT))
                 info->func[page] |= PMBUS_HAVE_STATUS_IOUT;
         }
-        if (wb_pmbus_check_word_register(client, page, PMBUS_READ_POUT))
+        if (pmbus_check_word_register(client, page, PMBUS_READ_POUT))
             info->func[page] |= PMBUS_HAVE_POUT;
     }
 }
@@ -98,26 +100,26 @@ static int pmbus_identify(struct i2c_client *client,
          * maximum number of pages has been reached. Assume that
          * this is the number of pages supported by the chip.
          */
-        if (wb_pmbus_check_byte_register(client, 0, PMBUS_PAGE)) {
+        if (pmbus_check_byte_register(client, 0, PMBUS_PAGE)) {
             int page;
 
             for (page = 1; page < PMBUS_PAGES; page++) {
-                if (wb_pmbus_set_page(client, page, 0xff) < 0)
+                if (pmbus_set_page(client, page, 0xff) < 0)
                     break;
             }
-            wb_pmbus_set_page(client, 0, 0xff);
+            pmbus_set_page(client, 0, 0xff);
             info->pages = page;
         } else {
             info->pages = 1;
         }
 
-        wb_pmbus_clear_faults(client);
+        pmbus_clear_faults(client);
     }
 
-    if (wb_pmbus_check_byte_register(client, 0, PMBUS_VOUT_MODE)) {
+    if (pmbus_check_byte_register(client, 0, PMBUS_VOUT_MODE)) {
         int vout_mode, i;
 
-        vout_mode = wb_pmbus_read_byte_data(client, 0, PMBUS_VOUT_MODE);
+        vout_mode = pmbus_read_byte_data(client, 0, PMBUS_VOUT_MODE);
         if (vout_mode >= 0 && vout_mode != 0xff) {
             switch (vout_mode >> 5) {
             case 0:
@@ -184,7 +186,7 @@ static int pmbus_probe(struct i2c_client *client)
     info->identify = pmbus_identify;
     dev->platform_data = pdata;
 
-    return wb_pmbus_do_probe(client, info);
+    return pmbus_do_probe(client, info);
 }
 
 static const struct pmbus_device_info pmbus_info_one = {
@@ -225,7 +227,6 @@ static struct i2c_driver pmbus_driver = {
            .name = "wb_pmbus",
            },
     .probe_new = pmbus_probe,
-    .remove = wb_pmbus_do_remove,
     .id_table = pmbus_id,
 };
 
@@ -234,3 +235,4 @@ module_i2c_driver(pmbus_driver);
 MODULE_AUTHOR("support");
 MODULE_DESCRIPTION("Generic PMBus driver");
 MODULE_LICENSE("GPL");
+MODULE_IMPORT_NS(PMBUS);
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_gpio_device.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_gpio_device.c
similarity index 96%
rename from platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_gpio_device.c
rename to platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_gpio_device.c
index 1e1d815ee..80f18b2ea 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_gpio_device.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_gpio_device.c
@@ -64,7 +64,7 @@ static void i2c_gpio_release(struct device *dev)
 }
 
 static struct platform_device wb_i2c_gpio_device = {
-    .name       = "wb-i2c-gpio",
+    .name       = "i2c-gpio",
     .id     = -1,
     .num_resources  = 0,
     .resource   = NULL,
@@ -78,7 +78,7 @@ static struct platform_device wb_i2c_gpio_device = {
  * i2c
  */
 static struct gpiod_lookup_table wb_i2c_gpio_table = {
-    .dev_id = "wb-i2c-gpio",
+    .dev_id = "i2c-gpio",
     .table = {
         GPIO_LOOKUP("wb_gpio_d1500", 17, "sda",
                 GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
@@ -104,7 +104,7 @@ static int __init wb_i2c_gpio_device_init(void)
 
     if (bus_num >= 0) {
         wb_i2c_gpio_device.id = bus_num;
-        snprintf(i2c_gpio_dev_name, I2C_GPIO_DEV_NAME_LEN, "wb-i2c-gpio.%d", bus_num);
+        snprintf(i2c_gpio_dev_name, I2C_GPIO_DEV_NAME_LEN, "i2c-gpio.%d", bus_num);
         wb_i2c_gpio_table.dev_id = i2c_gpio_dev_name;
     }
 
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_mux_pca954x.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_mux_pca954x.c
similarity index 100%
rename from platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_mux_pca954x.c
rename to platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_mux_pca954x.c
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_mux_pca954x.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_mux_pca954x.h
similarity index 100%
rename from platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_mux_pca954x.h
rename to platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_mux_pca954x.h
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_mux_pca9641.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_mux_pca9641.c
similarity index 100%
rename from platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_mux_pca9641.c
rename to platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_mux_pca9641.c
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_mux_pca9641.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_mux_pca9641.h
similarity index 100%
rename from platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_mux_pca9641.h
rename to platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_mux_pca9641.h
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_xdpe132g5c_pmbus.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_xdpe132g5c_pmbus.c
similarity index 69%
rename from platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_xdpe132g5c_pmbus.c
rename to platform/broadcom/sonic-platform-modules-micas/common/modules/wb_xdpe132g5c_pmbus.c
index dd7a97afb..d1e0fa220 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_xdpe132g5c_pmbus.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_xdpe132g5c_pmbus.c
@@ -8,7 +8,7 @@
 #include <linux/sysfs.h>
 #include <linux/delay.h>
 #include <linux/mutex.h>
-#include "wb_pmbus.h"
+#include "pmbus.h"
 
 static int g_wb_xdpe132g5_pmbus_debug = 0;
 static int g_wb_xdpe132g5_pmbus_error = 0;
@@ -57,23 +57,21 @@ static ssize_t set_xdpe132g5c_avs(struct device *dev, struct device_attribute *d
     unsigned long val;
     struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
     struct i2c_client *client = to_i2c_client(dev);
-    struct pmbus_data *data;
 
-    data = i2c_get_clientdata(client);
     ret = kstrtoul(buf, 0, &val);
     if (ret){
         return ret;
     }
-    mutex_lock(&data->update_lock);
+
     /* set value */
-    ret = wb_pmbus_write_word_data(client, attr->index, PMBUS_VOUT_COMMAND, (u16)val);
+    ret = pmbus_write_word_data(client, attr->index, PMBUS_VOUT_COMMAND, (u16)val);
     if (ret < 0) {
         WB_XDPE132G5_PMBUS_ERROR("set pmbus_vout_command fail\n");
         goto finish_set;
     }
 finish_set:
-    wb_pmbus_clear_faults(client);
-    mutex_unlock(&data->update_lock);
+    pmbus_clear_faults(client);
+
     return (ret < 0) ? ret : count;
 
 }
@@ -83,18 +81,15 @@ static ssize_t show_xdpe132g5c_avs(struct device *dev, struct device_attribute *
     int val;
     struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
     struct i2c_client *client = to_i2c_client(dev);
-    struct pmbus_data *data;
 
-    data = i2c_get_clientdata(client);
-    mutex_lock(&data->update_lock);
-    val = wb_pmbus_read_word_data(client, attr->index, 0xff, PMBUS_VOUT_COMMAND);
+    val = pmbus_read_word_data(client, attr->index, 0xff, PMBUS_VOUT_COMMAND);
     if (val < 0) {
         WB_XDPE132G5_PMBUS_ERROR("fail val = %d\n", val);
         goto finish_show;
     }
 finish_show:
-    wb_pmbus_clear_faults(client);
-    mutex_unlock(&data->update_lock);
+    pmbus_clear_faults(client);
+
     return snprintf(buf, BUF_SIZE, "0x%04x\n", val);
 }
 
@@ -102,7 +97,7 @@ static int xdpe_get_vout_precision(struct i2c_client *client, int page, int *vou
 {
     int i, vout_mode, a_size;
 
-    vout_mode = wb_pmbus_read_byte_data(client, page, PMBUS_VOUT_MODE);
+    vout_mode = pmbus_read_byte_data(client, page, PMBUS_VOUT_MODE);
     if (vout_mode < 0) {
         WB_XDPE132G5_PMBUS_ERROR("%d-%04x: read xdpe page%d vout mode reg: 0x%x failed, ret: %d\n",
             client->adapter->nr, client->addr, page, PMBUS_VOUT_MODE, vout_mode);
@@ -131,28 +126,23 @@ static ssize_t xdpe132g5_avs_vout_show(struct device *dev, struct device_attribu
 {
     struct i2c_client *client = to_i2c_client(dev->parent);
     struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
-    struct pmbus_data *data = i2c_get_clientdata(client);
     int vout_cmd, ret, vout_precision;
     long vout;
 
-    mutex_lock(&data->update_lock);
     ret = xdpe_get_vout_precision(client, attr->index, &vout_precision);
     if (ret < 0) {
         WB_XDPE132G5_PMBUS_ERROR("%d-%04x: get xdpe avs%d vout precision failed, ret: %d\n",
             client->adapter->nr, client->addr, attr->index, ret);
-        mutex_unlock(&data->update_lock);
         return ret;
     }
 
-    vout_cmd = wb_pmbus_read_word_data(client, attr->index, 0xff, PMBUS_VOUT_COMMAND);
+    vout_cmd = pmbus_read_word_data(client, attr->index, 0xff, PMBUS_VOUT_COMMAND);
     if (vout_cmd < 0) {
         WB_XDPE132G5_PMBUS_ERROR("%d-%04x: read page%d, vout command reg: 0x%x failed, ret: %d\n",
             client->adapter->nr, client->addr, attr->index, PMBUS_VOUT_COMMAND, vout_cmd);
-        mutex_unlock(&data->update_lock);
         return vout_cmd;
     }
 
-    mutex_unlock(&data->update_lock);
     vout = vout_cmd * 1000L * 1000L / vout_precision;
     WB_XDPE132G5_PMBUS_DEBUG("%d-%04x: page%d vout: %ld, vout_cmd: 0x%x, precision: %d\n", client->adapter->nr,
         client->addr, attr->index, vout, vout_cmd, vout_precision);
@@ -164,8 +154,6 @@ static ssize_t xdpe132g5_avs_vout_store(struct device *dev, struct device_attrib
 {
     struct i2c_client *client = to_i2c_client(dev->parent);
     struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
-    struct pmbus_data *data = i2c_get_clientdata(client);
-    int vout_max, vout_min;
     int ret, vout_cmd, vout_cmd_set;
     int vout_precision;
     long vout;
@@ -187,20 +175,10 @@ static ssize_t xdpe132g5_avs_vout_store(struct device *dev, struct device_attrib
         return -EINVAL;
     }
 
-    vout_max = data->vout_max[attr->index];
-    vout_min = data->vout_min[attr->index];
-    if ((vout > vout_max) || (vout < vout_min)) {
-        WB_XDPE132G5_PMBUS_ERROR("%d-%04x: vout value: %ld, out of range [%d, %d] \n", client->adapter->nr,
-            client->addr, vout, vout_min, vout_max);
-        return -EINVAL;
-    }
-
-    mutex_lock(&data->update_lock);
     ret = xdpe_get_vout_precision(client, attr->index, &vout_precision);
     if (ret < 0) {
         WB_XDPE132G5_PMBUS_ERROR("%d-%04x: get xdpe avs%d vout precision failed, ret: %d\n",
             client->adapter->nr, client->addr, attr->index, ret);
-        mutex_unlock(&data->update_lock);
         return ret;
     }
 
@@ -208,140 +186,42 @@ static ssize_t xdpe132g5_avs_vout_store(struct device *dev, struct device_attrib
     if (vout_cmd_set > 0xffff) {
         WB_XDPE132G5_PMBUS_ERROR("%d-%04x: invalid value, page%d, vout: %ld, vout_precision: %d, vout_cmd_set: 0x%x\n",
             client->adapter->nr, client->addr, attr->index, vout, vout_precision, vout_cmd_set);
-        mutex_unlock(&data->update_lock);
         return -EINVAL;
     }
 
     /* set VOUT_COMMAND */
-    ret = wb_pmbus_write_word_data(client, attr->index, PMBUS_VOUT_COMMAND, (u16)vout_cmd_set);
+    ret = pmbus_write_word_data(client, attr->index, PMBUS_VOUT_COMMAND, (u16)vout_cmd_set);
     if (ret < 0) {
         WB_XDPE132G5_PMBUS_ERROR("%d-%04x: set xdpe page%d vout cmd reg: 0x%x, value: 0x%x failed, ret: %d\n",
             client->adapter->nr, client->addr, attr->index, PMBUS_VOUT_COMMAND, vout_cmd_set, ret);
-        mutex_unlock(&data->update_lock);
         return ret;
     }
 
     /* read back VOUT_COMMAND */
-    vout_cmd = wb_pmbus_read_word_data(client, attr->index, 0xff, PMBUS_VOUT_COMMAND);
+    vout_cmd = pmbus_read_word_data(client, attr->index, 0xff, PMBUS_VOUT_COMMAND);
     if (vout_cmd < 0) {
         WB_XDPE132G5_PMBUS_ERROR("%d-%04x: read page%d, vout command reg: 0x%x failed, ret: %d\n",
             client->adapter->nr, client->addr, attr->index, PMBUS_VOUT_COMMAND, vout_cmd);
-        mutex_unlock(&data->update_lock);
         return vout_cmd;
     }
 
     if (vout_cmd != vout_cmd_set) {
         WB_XDPE132G5_PMBUS_ERROR("%d-%04x: page%d vout cmd value check error, vout cmd read: 0x%x, vout cmd set: 0x%x\n",
             client->adapter->nr, client->addr, attr->index, vout_cmd, vout_cmd_set);
-        mutex_unlock(&data->update_lock);
         return -EIO;
     }
-    mutex_unlock(&data->update_lock);
+
     WB_XDPE132G5_PMBUS_DEBUG("%d-%04x: set page%d vout cmd success, vout: %ld uV, vout_cmd_set: 0x%x\n",
         client->adapter->nr, client->addr, attr->index, vout, vout_cmd_set);
     return count;
 }
 
-static ssize_t xdpe132g5_avs_vout_max_store(struct device *dev,
-                   struct device_attribute *devattr, const char *buf, size_t count)
-{
-    struct i2c_client *client = to_i2c_client(dev->parent);
-    struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
-    struct pmbus_data *data = i2c_get_clientdata(client);
-    int ret, vout_threshold;
-
-    if ((attr->index < 0) || (attr->index >= PMBUS_PAGES)) {
-        WB_XDPE132G5_PMBUS_ERROR("%d-%04x: invalid index: %d \n", client->adapter->nr, client->addr,
-            attr->index);
-        return -EINVAL;
-    }
-
-    ret = kstrtoint(buf, 0, &vout_threshold);
-    if (ret) {
-        WB_XDPE132G5_PMBUS_ERROR("%d-%04x: invalid value: %s \n", client->adapter->nr, client->addr, buf);
-        return -EINVAL;
-    }
-
-    WB_XDPE132G5_PMBUS_DEBUG("%d-%04x: vout%d max threshold: %d", client->adapter->nr, client->addr,
-        attr->index, vout_threshold);
-
-    data->vout_max[attr->index] = vout_threshold;
-    return count;
-}
-
-static ssize_t xdpe132g5_avs_vout_max_show(struct device *dev,
-                   struct device_attribute *devattr, char *buf)
-{
-    struct i2c_client *client = to_i2c_client(dev->parent);
-    struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
-    struct pmbus_data *data = i2c_get_clientdata(client);
-
-    if ((attr->index < 0) || (attr->index >= PMBUS_PAGES)) {
-        WB_XDPE132G5_PMBUS_ERROR("%d-%04x: invalid index: %d \n", client->adapter->nr, client->addr,
-            attr->index);
-        return -EINVAL;
-    }
-
-    return snprintf(buf, PAGE_SIZE, "%d\n", data->vout_max[attr->index]);
-}
-
-static ssize_t xdpe132g5_avs_vout_min_store(struct device *dev,
-                   struct device_attribute *devattr, const char *buf, size_t count)
-{
-    struct i2c_client *client = to_i2c_client(dev->parent);
-    struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
-    struct pmbus_data *data = i2c_get_clientdata(client);
-    int ret, vout_threshold;
-
-    if ((attr->index < 0) || (attr->index >= PMBUS_PAGES)) {
-        WB_XDPE132G5_PMBUS_ERROR("%d-%04x: invalid index: %d \n", client->adapter->nr, client->addr,
-            attr->index);
-        return -EINVAL;
-    }
-
-    ret = kstrtoint(buf, 0, &vout_threshold);
-    if (ret) {
-        WB_XDPE132G5_PMBUS_ERROR("%d-%04x: invalid value: %s \n", client->adapter->nr, client->addr, buf);
-        return -EINVAL;
-    }
-
-    WB_XDPE132G5_PMBUS_DEBUG("%d-%04x: vout%d min threshold: %d", client->adapter->nr, client->addr,
-        attr->index, vout_threshold);
-
-    data->vout_min[attr->index] = vout_threshold;
-    return count;
-}
-
-static ssize_t xdpe132g5_avs_vout_min_show(struct device *dev,
-                   struct device_attribute *devattr, char *buf)
-{
-    struct i2c_client *client = to_i2c_client(dev->parent);
-    struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
-    struct pmbus_data *data = i2c_get_clientdata(client);
-
-    if ((attr->index < 0) || (attr->index >= PMBUS_PAGES)) {
-        WB_XDPE132G5_PMBUS_ERROR("%d-%04x: invalid index: %d \n", client->adapter->nr, client->addr,
-            attr->index);
-        return -EINVAL;
-    }
-
-    return snprintf(buf, PAGE_SIZE, "%d\n", data->vout_min[attr->index]);
-}
-
 static SENSOR_DEVICE_ATTR_RW(avs0_vout, xdpe132g5_avs_vout, 0);
 static SENSOR_DEVICE_ATTR_RW(avs1_vout, xdpe132g5_avs_vout, 1);
-static SENSOR_DEVICE_ATTR_RW(avs0_vout_max, xdpe132g5_avs_vout_max, 0);
-static SENSOR_DEVICE_ATTR_RW(avs0_vout_min, xdpe132g5_avs_vout_min, 0);
-static SENSOR_DEVICE_ATTR_RW(avs1_vout_max, xdpe132g5_avs_vout_max, 1);
-static SENSOR_DEVICE_ATTR_RW(avs1_vout_min, xdpe132g5_avs_vout_min, 1);
 
 static struct attribute *avs_ctrl_attrs[] = {
     &sensor_dev_attr_avs0_vout.dev_attr.attr,
     &sensor_dev_attr_avs1_vout.dev_attr.attr,
-    &sensor_dev_attr_avs0_vout_max.dev_attr.attr,
-    &sensor_dev_attr_avs0_vout_min.dev_attr.attr,
-    &sensor_dev_attr_avs1_vout_max.dev_attr.attr,
-    &sensor_dev_attr_avs1_vout_min.dev_attr.attr,
     NULL,
 };
 
@@ -375,7 +255,7 @@ static int xdpe132g5c_identify(struct i2c_client *client, struct pmbus_driver_in
     /* Read the register with VOUT scaling value.*/
     for (i = 0; i < XDPE132G5C_PAGE_NUM; i++) {
         for (retry = 0; retry < RETRY_TIME; retry++) {
-            ret = wb_pmbus_read_byte_data(client, i, PMBUS_VOUT_MODE);
+            ret = pmbus_read_byte_data(client, i, PMBUS_VOUT_MODE);
             if (ret < 0 || ret == 0xff) {
                 msleep(5);
                 continue;
@@ -460,7 +340,7 @@ static int xdpe132g5c_probe(struct i2c_client *client,
         return -ENOMEM;
     }
 
-    status = wb_pmbus_do_probe(client, &xdpe132g5c_info);
+    status = pmbus_do_probe(client, &xdpe132g5c_info);
     if (status != 0) {
         WB_XDPE132G5_PMBUS_ERROR("pmbus probe error %d\n", status);
         return status;
@@ -478,7 +358,6 @@ static int xdpe132g5c_probe(struct i2c_client *client,
 static void xdpe132g5c_remove(struct i2c_client *client)
 {
     sysfs_remove_group(&client->dev.kobj, &xdpe132g5c_sysfs_attrs_group);
-    wb_pmbus_do_remove(client);
     return;
 }
 
@@ -510,3 +389,4 @@ module_i2c_driver(xdpe132g5c_driver);
 MODULE_AUTHOR("support");
 MODULE_DESCRIPTION("PMBus driver for Infineon XDPE132g5 family");
 MODULE_LICENSE("GPL");
+MODULE_IMPORT_NS(PMBUS);
diff --git a/platform/broadcom/sonic-platform-modules-micas/debian/changelog b/platform/broadcom/sonic-platform-modules-micas/debian/changelog
index d908208c5..e4a1404b0 100644
--- a/platform/broadcom/sonic-platform-modules-micas/debian/changelog
+++ b/platform/broadcom/sonic-platform-modules-micas/debian/changelog
@@ -2,4 +2,4 @@ sonic-micas-platform-modules (1.0) unstable; urgency=low
 
   * Initial release
 
- -- support <support>  Fri, 21 APR 2017 11:11:11 -0800
+ -- support <support@micasnetworks.com> Mon, 12 Aug 2024 11:11:11 -0800
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/config/x86_64_micas_m2_w6510_48v8c_r0_config.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/config/x86_64_micas_m2_w6510_48v8c_r0_config.py
index 546e12531..3d212273a 100755
--- a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/config/x86_64_micas_m2_w6510_48v8c_r0_config.py
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/config/x86_64_micas_m2_w6510_48v8c_r0_config.py
@@ -5,7 +5,7 @@
 STARTMODULE = {
     "hal_fanctrl": 1,
     "hal_ledctrl": 1,
-    "avscontrol": 1,
+    "avscontrol": 0,
     "dev_monitor": 1,
     "pmon_syslog": 1,
     "tty_console": 1,
@@ -709,16 +709,12 @@
     }
 ]
 
-BLACKLIST_DRIVERS = [
-    {"name": "i2c_i801", "delay": 0},
-]
-
 DRIVERLISTS = [
-    {"name": "wb_i2c_i801", "delay": 0},
+    {"name": "i2c_i801", "delay": 0},
     {"name": "wb_gpio_d1500", "delay": 0},
     {"name": "i2c_dev", "delay": 0},
-    {"name": "wb_i2c_algo_bit", "delay": 0},
-    {"name": "wb_i2c_gpio", "delay": 0},
+    {"name": "i2c_algo_bit", "delay": 0},
+    {"name": "i2c_gpio", "delay": 0},
     {"name": "i2c_mux", "delay": 0},
     {"name": "wb_gpio_device", "delay": 0},
     {"name": "wb_i2c_gpio_device gpio_sda=17 gpio_scl=1 gpio_udelay=2", "delay": 0},
@@ -737,15 +733,15 @@
     {"name": "wb_i2c_mux_pca954x", "delay": 0},
     {"name": "wb_i2c_mux_pca954x_device", "delay": 0},
     {"name": "wb_i2c_dev_device", "delay": 0},
-    {"name": "wb_lm75", "delay": 0},
+    {"name": "lm75", "delay": 0},
     {"name": "optoe", "delay": 0},
     {"name": "at24", "delay": 0},
     {"name": "wb_mac_bsc", "delay": 0},
-    {"name": "wb_pmbus_core", "delay": 0},
-    {"name": "wb_isl68137", "delay": 0},
+    {"name": "pmbus_core", "delay": 0},
+    {"name": "isl68137", "delay": 0},
     {"name": "wb_csu550", "delay": 0},
-    {"name": "wb_ina3221", "delay": 0},
-    {"name": "wb_tps53622", "delay": 0},
+    {"name": "ina3221", "delay": 0},
+    {"name": "tps53679", "delay": 0},
     {"name": "plat_dfd", "delay": 0},
     {"name": "plat_switch", "delay": 0},
     {"name": "plat_fan", "delay": 0},
@@ -767,19 +763,19 @@
     {"name": "24c02", "bus": 25, "loc": 0x50},
     {"name": "wb_dps550", "bus": 25, "loc": 0x58},
     # temp
-    {"name": "wb_lm75", "bus": 3, "loc": 0x48},
-    {"name": "wb_lm75", "bus": 3, "loc": 0x49},
-    {"name": "wb_lm75", "bus": 3, "loc": 0x4a},
-    {"name": "wb_lm75", "bus": 3, "loc": 0x4b},
-    {"name": "wb_lm75", "bus": 3, "loc": 0x4c},
+    {"name": "lm75", "bus": 3, "loc": 0x48},
+    {"name": "lm75", "bus": 3, "loc": 0x49},
+    {"name": "lm75", "bus": 3, "loc": 0x4a},
+    {"name": "lm75", "bus": 3, "loc": 0x4b},
+    {"name": "lm75", "bus": 3, "loc": 0x4c},
     # dcdc
-    {"name": "wb_ina3221", "bus": 7, "loc": 0x40},
-    {"name": "wb_ina3221", "bus": 7, "loc": 0x41},
-    {"name": "wb_ina3221", "bus": 7, "loc": 0x42},
-    {"name": "wb_ina3221", "bus": 7, "loc": 0x43},
-    {"name": "wb_tps53622", "bus": 7, "loc": 0x60},
-    {"name": "wb_tps53622", "bus": 7, "loc": 0x6c},
-    {"name": "wb_isl68127", "bus": 7, "loc": 0x64},
+    {"name": "ina3221", "bus": 7, "loc": 0x40},
+    {"name": "ina3221", "bus": 7, "loc": 0x41},
+    {"name": "ina3221", "bus": 7, "loc": 0x42},
+    {"name": "ina3221", "bus": 7, "loc": 0x43},
+    {"name": "tps53688", "bus": 7, "loc": 0x60},
+    {"name": "tps53688", "bus": 7, "loc": 0x6c},
+    {"name": "isl68137", "bus": 7, "loc": 0x64},
 ]
 
 OPTOE = [
@@ -847,11 +843,11 @@
         {
             "name": "lm75",
             "device": [
-                {"id": "lm75_1", "name": "wb_lm75", "bus": 3, "loc": 0x48, "attr": "hwmon"},
-                {"id": "lm75_2", "name": "wb_lm75", "bus": 3, "loc": 0x49, "attr": "hwmon"},
-                {"id": "lm75_3", "name": "wb_lm75", "bus": 3, "loc": 0x4a, "attr": "hwmon"},
-                {"id": "lm75_4", "name": "wb_lm75", "bus": 3, "loc": 0x4b, "attr": "hwmon"},
-                {"id": "lm75_5", "name": "wb_lm75", "bus": 3, "loc": 0x4c, "attr": "hwmon"},
+                {"id": "lm75_1", "name": "lm75", "bus": 3, "loc": 0x48, "attr": "hwmon"},
+                {"id": "lm75_2", "name": "lm75", "bus": 3, "loc": 0x49, "attr": "hwmon"},
+                {"id": "lm75_3", "name": "lm75", "bus": 3, "loc": 0x4a, "attr": "hwmon"},
+                {"id": "lm75_4", "name": "lm75", "bus": 3, "loc": 0x4b, "attr": "hwmon"},
+                {"id": "lm75_5", "name": "lm75", "bus": 3, "loc": 0x4c, "attr": "hwmon"},
             ],
         },
         {
@@ -863,32 +859,33 @@
         {
             "name": "ina3221",
             "device": [
-                {"id": "ina3221_1", "name": "wb_ina3221", "bus": 7, "loc": 0x40, "attr": "hwmon"},
-                {"id": "ina3221_2", "name": "wb_ina3221", "bus": 7, "loc": 0x41, "attr": "hwmon"},
-                {"id": "ina3221_3", "name": "wb_ina3221", "bus": 7, "loc": 0x42, "attr": "hwmon"},
-                {"id": "ina3221_4", "name": "wb_ina3221", "bus": 7, "loc": 0x43, "attr": "hwmon"},
+                {"id": "ina3221_1", "name": "ina3221", "bus": 7, "loc": 0x40, "attr": "hwmon"},
+                {"id": "ina3221_2", "name": "ina3221", "bus": 7, "loc": 0x41, "attr": "hwmon"},
+                {"id": "ina3221_3", "name": "ina3221", "bus": 7, "loc": 0x42, "attr": "hwmon"},
+                {"id": "ina3221_4", "name": "ina3221", "bus": 7, "loc": 0x43, "attr": "hwmon"},
             ],
         },
         {
             "name": "tps53622",
             "device": [
-                {"id": "tps53622_1", "name": "wb_tps53622", "bus": 7, "loc": 0x60, "attr": "hwmon"},
-                {"id": "tps53622_2", "name": "wb_tps53622", "bus": 7, "loc": 0x6c, "attr": "hwmon"},
+                {"id": "tps53622_1", "name": "tps53688", "bus": 7, "loc": 0x60, "attr": "hwmon"},
+                {"id": "tps53622_2", "name": "tps53688", "bus": 7, "loc": 0x6c, "attr": "hwmon"},
             ],
         },
         {
-            "name": "isl68127",
+            "name": "isl68137",
             "device": [
-                {"id": "isl68127_1", "name": "wb_isl68127", "bus": 7, "loc": 0x64, "attr": "hwmon"},
+                {"id": "isl68137_1", "name": "isl68137", "bus": 7, "loc": 0x64, "attr": "hwmon"},
             ],
         }
     ],
 }
 
 INIT_PARAM_PRE = [
-    {"loc": "7-0064/hwmon/hwmon*/avs0_vout_max", "value": "900000"},
-    {"loc": "7-0064/hwmon/hwmon*/avs0_vout_min", "value": "750000"},
+    #{"loc": "7-0064/hwmon/hwmon*/avs0_vout_max", "value": "900000"},
+    #{"loc": "7-0064/hwmon/hwmon*/avs0_vout_min", "value": "750000"},
 ]
+
 INIT_COMMAND_PRE = [
     "i2cset -y -f 6 0x0d 0x91 0x48",
     "i2cset -y -f 6 0x0d 0x92 0x01",  # MAC_PWR_EN
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/modules/driver/Makefile b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/modules/driver/Makefile
old mode 100755
new mode 100644
index 5573a18f0..578b5fee1
--- a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/modules/driver/Makefile
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/modules/driver/Makefile
@@ -2,7 +2,6 @@ MAKEFILE_FILE_PATH = $(abspath $(lastword $(MAKEFILE_LIST)))
 MODULES_DIR = $(abspath $(MAKEFILE_FILE_PATH)/../../../../common/modules)
 
 EXTRA_CFLAGS+= -I$(MODULES_DIR)
-EXTRA_CFLAGS+= -I$(MODULES_DIR)/linux
 
 obj-m :=  wb_pcie_dev_device.o
 obj-m += wb_i2c_mux_pca954x_device.o

From 007ccad7ec032df5ee4041ce56fbdcbefde1f8c8 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sat, 21 Sep 2024 19:01:18 +0800
Subject: [PATCH 1026/1115] [submodule] Update submodule sonic-gnmi to the
 latest HEAD automatically (#20325)

#### Why I did it
src/sonic-gnmi
```
* 0f5c591 - (HEAD -> master, origin/master, origin/HEAD) Yang model change for bridge midplane (#281) (2 hours ago) [Gagan Punathil Ellath]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-gnmi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-gnmi b/src/sonic-gnmi
index 95f4400d9..0f5c591c2 160000
--- a/src/sonic-gnmi
+++ b/src/sonic-gnmi
@@ -1 +1 @@
-Subproject commit 95f4400d96982c9f6a6a02ed62e30a9cb2454a85
+Subproject commit 0f5c591c225b54b4721c76dcafddc507e3472871

From 93fff33993c48cc035f8ced122a237d88b241127 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sat, 21 Sep 2024 19:01:27 +0800
Subject: [PATCH 1027/1115] [submodule] Update submodule sonic-swss to the
 latest HEAD automatically (#20310)
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

#### Why I did it
src/sonic-swss
```
* 9a6a86fe - (HEAD -> master, origin/master, origin/HEAD) Add FEC correctable bit error count to ports_stat_ids (#3291) (28 hours ago) [Prince George]
* 5126f88b - Fix the SAI status check for unsupported API on SAI_SWITCH_ATTR_SUPPO… (#3282) (32 hours ago) [DavidZagury]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-swss | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-swss b/src/sonic-swss
index 20e8b362a..9a6a86fec 160000
--- a/src/sonic-swss
+++ b/src/sonic-swss
@@ -1 +1 @@
-Subproject commit 20e8b362a5e4fd5361a6f08effddd08d61d5d262
+Subproject commit 9a6a86fecb19efd8876ca7ab6bccdf6b68a13aa8

From 561479ec176910d1bee740e3f52732f3f29e3263 Mon Sep 17 00:00:00 2001
From: Zain Budhwani <99770260+zbud-msft@users.noreply.github.com>
Date: Mon, 23 Sep 2024 14:15:45 -0700
Subject: [PATCH 1028/1115] Move eventd enabled check from build time to
 runtime (#20248)

## How I did it

Remove eventd enabled/slim image check from Dockerfile (build time). As part of Dockerfile expose eventd_enabled and slim image flags to ENV which will be used docker_init/start.sh to check if rsyslog plugin should be moved to rsyslog.d

#### How to verify it

Manual test/pipeline
---
 dockers/docker-dhcp-relay/Dockerfile.j2         | 15 ++++++---------
 dockers/docker-dhcp-relay/docker_init.sh        |  3 +++
 dockers/docker-fpm-frr/Dockerfile.j2            | 13 ++++++-------
 dockers/docker-fpm-frr/docker_init.sh           |  3 +++
 dockers/docker-orchagent/Dockerfile.j2          | 15 ++++++---------
 dockers/docker-orchagent/docker-init.j2         |  3 +++
 files/build_templates/docker_image_ctl.j2       |  5 +++++
 files/build_templates/rsyslog_plugin.conf.j2    |  4 ++--
 files/build_templates/sonic_debian_extension.j2 | 11 +++++------
 9 files changed, 39 insertions(+), 33 deletions(-)

diff --git a/dockers/docker-dhcp-relay/Dockerfile.j2 b/dockers/docker-dhcp-relay/Dockerfile.j2
index 5b0dc82c3..e7b70a954 100644
--- a/dockers/docker-dhcp-relay/Dockerfile.j2
+++ b/dockers/docker-dhcp-relay/Dockerfile.j2
@@ -50,14 +50,11 @@ COPY ["files/supervisor-proc-exit-listener", "/usr/bin"]
 COPY ["critical_processes", "/etc/supervisor"]
 COPY ["cli", "/cli/"]
 
-{% if include_system_eventd == "y" and build_reduce_image_size != "y" %}
-# Copy regex json and rsyslog_plugin.conf file into rsyslog.d
-COPY ["*.json", "/etc/rsyslog.d/"]
-COPY ["files/rsyslog_plugin.conf.j2", "/etc/rsyslog.d/"]
-# Create dhcp_relay_regex.conf
-RUN j2 -f json /etc/rsyslog.d/rsyslog_plugin.conf.j2 /etc/rsyslog.d/events_info.json  > /etc/rsyslog.d/dhcp_relay_events.conf
-RUN rm -f /etc/rsyslog.d/rsyslog_plugin.conf.j2
-RUN rm -f /etc/rsyslog.d/events_info.json
-{% endif %}
+RUN mkdir -p /usr/share/sonic/templates/rsyslog_plugin
+
+# Copy rsyslog plugin configuration file and regexes to docker
+COPY ["dhcp_relay_regex.json", "/etc/rsyslog.d/"]
+COPY ["events_info.json", "/usr/share/sonic/templates/rsyslog_plugin/"]
+COPY ["files/rsyslog_plugin.conf.j2", "/usr/share/sonic/templates/rsyslog_plugin/"]
 
 ENTRYPOINT ["/usr/bin/docker_init.sh"]
diff --git a/dockers/docker-dhcp-relay/docker_init.sh b/dockers/docker-dhcp-relay/docker_init.sh
index 1ff0e936f..94e2ddff0 100755
--- a/dockers/docker-dhcp-relay/docker_init.sh
+++ b/dockers/docker-dhcp-relay/docker_init.sh
@@ -21,4 +21,7 @@ chmod +x /usr/bin/wait_for_intf.sh
 # The docker container should start this script as PID 1, so now that supervisord is
 # properly configured, we exec /usr/local/bin/supervisord so that it runs as PID 1 for the
 # duration of the container's lifetime
+export EVENTD_STATE=$(sonic-db-cli -s CONFIG_DB HGET 'FEATURE|eventd' 'state')
+j2 -f json --import-env=ENVIRONMENT /usr/share/sonic/templates/rsyslog_plugin/rsyslog_plugin.conf.j2 /usr/share/sonic/templates/rsyslog_plugin/events_info.json  > /etc/rsyslog.d/dhcp_relay_events.conf
+
 exec /usr/local/bin/supervisord
diff --git a/dockers/docker-fpm-frr/Dockerfile.j2 b/dockers/docker-fpm-frr/Dockerfile.j2
index 98c459381..e39ffdadf 100644
--- a/dockers/docker-fpm-frr/Dockerfile.j2
+++ b/dockers/docker-fpm-frr/Dockerfile.j2
@@ -59,12 +59,11 @@ RUN chmod a+x /usr/bin/TSA && \
     chmod a+x /usr/bin/TSC && \
     chmod a+x /usr/bin/zsocket.sh
 
-{% if include_system_eventd == "y" and build_reduce_image_size != "y" %}
-COPY ["*.json", "/etc/rsyslog.d/"]
-COPY ["files/rsyslog_plugin.conf.j2", "/etc/rsyslog.d/"]
-RUN j2 -f json /etc/rsyslog.d/rsyslog_plugin.conf.j2 /etc/rsyslog.d/events_info.json  > /etc/rsyslog.d/bgp_events.conf
-RUN rm -f /etc/rsyslog.d/rsyslog_plugin.conf.j2
-RUN rm -f /etc/rsyslog.d/events_info.json
-{% endif %}
+RUN mkdir -p /usr/share/sonic/templates/rsyslog_plugin
+
+# Copy rsyslog plugin configuration file and regexes to docker
+COPY ["bgp_regex.json", "/etc/rsyslog.d/"]
+COPY ["events_info.json", "/usr/share/sonic/templates/rsyslog_plugin/"]
+COPY ["files/rsyslog_plugin.conf.j2", "/usr/share/sonic/templates/rsyslog_plugin/"]
 
 ENTRYPOINT ["/usr/bin/docker_init.sh"]
diff --git a/dockers/docker-fpm-frr/docker_init.sh b/dockers/docker-fpm-frr/docker_init.sh
index 662a78b5a..fbbcee8bd 100755
--- a/dockers/docker-fpm-frr/docker_init.sh
+++ b/dockers/docker-fpm-frr/docker_init.sh
@@ -112,4 +112,7 @@ TZ=$(cat /etc/timezone)
 rm -rf /etc/localtime
 ln -sf /usr/share/zoneinfo/$TZ /etc/localtime
 
+export EVENTD_STATE=$(sonic-db-cli -s CONFIG_DB HGET 'FEATURE|eventd' 'state')
+j2 -f json --import-env=ENVIRONMENT /usr/share/sonic/templates/rsyslog_plugin/rsyslog_plugin.conf.j2 /usr/share/sonic/templates/rsyslog_plugin/events_info.json  > /etc/rsyslog.d/bgp_events.conf
+
 exec /usr/local/bin/supervisord
diff --git a/dockers/docker-orchagent/Dockerfile.j2 b/dockers/docker-orchagent/Dockerfile.j2
index fb90b4f09..b3a7e49c3 100755
--- a/dockers/docker-orchagent/Dockerfile.j2
+++ b/dockers/docker-orchagent/Dockerfile.j2
@@ -80,14 +80,11 @@ RUN sonic-cfggen -a "{\"ENABLE_ASAN\":\"{{ENABLE_ASAN}}\"}" -t /usr/share/sonic/
 RUN rm -f /usr/share/sonic/templates/docker-init.j2
 RUN chmod 755 /usr/bin/docker-init.sh
 
-{% if include_system_eventd == "y" and build_reduce_image_size != "y" %}
-# Copy all regex json files and rsyslog_plugin.conf to rsyslog.d
-COPY ["*.json", "/etc/rsyslog.d/"]
-COPY ["files/rsyslog_plugin.conf.j2", "/etc/rsyslog.d/"]
-# Create swss rsyslog_plugin conf file
-RUN j2 -f json /etc/rsyslog.d/rsyslog_plugin.conf.j2 /etc/rsyslog.d/events_info.json  > /etc/rsyslog.d/swss_events.conf
-RUN rm -f /etc/rsyslog.d/rsyslog_plugin.conf.j2
-RUN rm -f /etc/rsyslog.d/events_info.json
-{% endif %}
+RUN mkdir -p /usr/share/sonic/templates/rsyslog_plugin
+
+# Copy rsyslog plugin configuration file and regexes to docker
+COPY ["swss_regex.json", "/etc/rsyslog.d/"]
+COPY ["events_info.json", "/usr/share/sonic/templates/rsyslog_plugin/"]
+COPY ["files/rsyslog_plugin.conf.j2", "/usr/share/sonic/templates/rsyslog_plugin/"]
 
 ENTRYPOINT ["/usr/bin/docker-init.sh"]
diff --git a/dockers/docker-orchagent/docker-init.j2 b/dockers/docker-orchagent/docker-init.j2
index 41dbe2728..143c9bd52 100755
--- a/dockers/docker-orchagent/docker-init.j2
+++ b/dockers/docker-orchagent/docker-init.j2
@@ -74,4 +74,7 @@ TZ=$(cat /etc/timezone)
 rm -rf /etc/localtime
 ln -sf /usr/share/zoneinfo/$TZ /etc/localtime
 
+export EVENTD_STATE=$(sonic-db-cli -s CONFIG_DB HGET 'FEATURE|eventd' 'state')
+j2 -f json --import-env=ENVIRONMENT /usr/share/sonic/templates/rsyslog_plugin/rsyslog_plugin.conf.j2 /usr/share/sonic/templates/rsyslog_plugin/events_info.json  > /etc/rsyslog.d/swss_events.conf
+
 exec /usr/local/bin/supervisord
diff --git a/files/build_templates/docker_image_ctl.j2 b/files/build_templates/docker_image_ctl.j2
index 7e64845c8..87f801c15 100644
--- a/files/build_templates/docker_image_ctl.j2
+++ b/files/build_templates/docker_image_ctl.j2
@@ -327,6 +327,11 @@ function postStartAction()
             docker cp $PSENSOR pmon:/usr/bin/
         fi
     fi
+{%- elif docker_container_name == "eventd" %}
+    export EVENTD_STATE=$(sonic-db-cli -s CONFIG_DB HGET 'FEATURE|eventd' 'state')
+    j2 -f json --import-env=ENVIRONMENT /usr/share/sonic/templates/rsyslog_plugin/rsyslog_plugin.conf.j2 /usr/share/sonic/templates/rsyslog_plugin/events_info.json  > /etc/rsyslog.d/host_events.conf
+    j2 -f json --import-env=ENVIRONMENT /usr/share/sonic/templates/rsyslog_plugin/rsyslog_plugin.conf.j2 /usr/share/sonic/templates/rsyslog_plugin/syncd_events_info.json  > /etc/rsyslog.d/syncd_events.conf
+    systemctl restart rsyslog
 {%- else %}
     : # nothing
 {%- endif %}
diff --git a/files/build_templates/rsyslog_plugin.conf.j2 b/files/build_templates/rsyslog_plugin.conf.j2
index 56ec0f71d..f69e58cf4 100644
--- a/files/build_templates/rsyslog_plugin.conf.j2
+++ b/files/build_templates/rsyslog_plugin.conf.j2
@@ -1,7 +1,6 @@
 ## rsyslog-plugin for streaming telemetry via gnmi
 
-
-
+{% if ENVIRONMENT['EVENTD_STATE'] == "enabled" %}
 template(name="prog_msg" type="list") {
     property(name="msg")
     constant(value="\n")
@@ -16,3 +15,4 @@ if re_match($programname, "{{ proc.name }}") then {
         template="prog_msg")
 }
 {% endfor %}
+{% endif %}
diff --git a/files/build_templates/sonic_debian_extension.j2 b/files/build_templates/sonic_debian_extension.j2
index 5b5c6a080..68b57104b 100644
--- a/files/build_templates/sonic_debian_extension.j2
+++ b/files/build_templates/sonic_debian_extension.j2
@@ -362,13 +362,16 @@ sudo dpkg --root=$FILESYSTEM_ROOT -i $debs_path/sonic-db-cli_*.deb || \
     sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install -f
 
 
-{% if include_system_eventd == "y" and build_reduce_image_size != "y" %}
+{% if include_system_eventd == "y" %}
 # Install sonic-rsyslog-plugin
 sudo dpkg --root=$FILESYSTEM_ROOT -i $debs_path/sonic-rsyslog-plugin_*.deb || \
     sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install -f
 
 # Generate host conf for rsyslog_plugin
-j2 -f json $BUILD_TEMPLATES/rsyslog_plugin.conf.j2 $BUILD_TEMPLATES/events_info.json | sudo tee $FILESYSTEM_ROOT_ETC/rsyslog.d/host_events.conf
+sudo mkdir -p $FILESYSTEM_ROOT_USR_SHARE_SONIC_TEMPLATES/rsyslog_plugin
+sudo cp $BUILD_TEMPLATES/rsyslog_plugin.conf.j2 $FILESYSTEM_ROOT_USR_SHARE_SONIC_TEMPLATES/rsyslog_plugin/
+sudo cp $BUILD_TEMPLATES/events_info.json $FILESYSTEM_ROOT_USR_SHARE_SONIC_TEMPLATES/rsyslog_plugin/
+sudo cp $BUILD_TEMPLATES/syncd_events_info.json $FILESYSTEM_ROOT_USR_SHARE_SONIC_TEMPLATES/rsyslog_plugin/
 sudo cp $BUILD_TEMPLATES/monit_regex.json $FILESYSTEM_ROOT_ETC/rsyslog.d/
 sudo cp $BUILD_TEMPLATES/sshd_regex.json $FILESYSTEM_ROOT_ETC/rsyslog.d/
 sudo cp $BUILD_TEMPLATES/systemd_regex.json $FILESYSTEM_ROOT_ETC/rsyslog.d/
@@ -377,11 +380,7 @@ sudo cp $BUILD_TEMPLATES/dockerd_regex.json $FILESYSTEM_ROOT_ETC/rsyslog.d/
 sudo cp $BUILD_TEMPLATES/seu_regex.json $FILESYSTEM_ROOT_ETC/rsyslog.d/
 sudo cp $BUILD_TEMPLATES/zebra_regex.json $FILESYSTEM_ROOT_ETC/rsyslog.d/
 sudo cp $BUILD_TEMPLATES/bgpd_regex.json $FILESYSTEM_ROOT_ETC/rsyslog.d/
-
-
-j2 -f json $BUILD_TEMPLATES/rsyslog_plugin.conf.j2 $BUILD_TEMPLATES/syncd_events_info.json | sudo tee $FILESYSTEM_ROOT_ETC/rsyslog.d/syncd_events.conf
 sudo cp $BUILD_TEMPLATES/syncd_regex.json $FILESYSTEM_ROOT_ETC/rsyslog.d/
-
 {% endif %}
 
 # Install custom-built monit package and SONiC configuration files

From 265a79f30f91b4be3a26bd53bd5892456a631f0a Mon Sep 17 00:00:00 2001
From: Zain Budhwani <99770260+zbud-msft@users.noreply.github.com>
Date: Mon, 23 Sep 2024 14:28:18 -0700
Subject: [PATCH 1029/1115] Add back publish events (#20306)

### Why I did it

https://github.com/sonic-net/sonic-buildimage/pull/19179 removed call to publish_events when memory usage container exceeds threshold, causing test_events to fail.

### How I did it

Add back call to publish_events

#### How to verify it

Manual test
---
 files/image_config/monit/memory_checker | 1 +
 1 file changed, 1 insertion(+)

diff --git a/files/image_config/monit/memory_checker b/files/image_config/monit/memory_checker
index 74779ffb3..6ea00cbc5 100755
--- a/files/image_config/monit/memory_checker
+++ b/files/image_config/monit/memory_checker
@@ -219,6 +219,7 @@ def check_memory_usage(container_name, threshold_value):
     if total_memory_usage > threshold_value:
         print("[{}]: Memory usage ({} Bytes) is larger than the threshold ({} Bytes)!"
               .format(container_name, total_memory_usage, threshold_value))
+        publish_events(container_name, "{:.2f}".format(total_memory_usage), str(threshold_value))
         sys.exit(EXCEED_THRESHOLD)
 
 def is_service_active(service_name):

From 783a5698b40dfab1302883ffbaf1893485d88de0 Mon Sep 17 00:00:00 2001
From: Vivek <vivekreddykarri98@gmail.com>
Date: Tue, 24 Sep 2024 10:01:44 -0700
Subject: [PATCH 1030/1115] [Mellanox] Disable SGX for SN5600/SN5400 platforms
 (#19701)

- Why I did it
Booting master/202405 images on SN5400 and SN5600 platforms is resulting the log

2024-07-23T21:01:07.972045+00:00 sonic kernel: [    0.110657] x86/cpu: SGX disabled by BIOS.
2024-07-23T21:01:07.972045+00:00 sonic kernel: [    0.110657] x86/cpu: SGX disabled by BIOS.
Processor on these systems supports the SGX but the BIOS does not. SGX feature is also not important and thus disable using the nosgx kernel boot parameter

- How I did it

- How to verify it
Added the parameter, reboot and check for log
---
 device/mellanox/x86_64-nvidia_sn5400-r0/installer.conf | 2 +-
 device/mellanox/x86_64-nvidia_sn5600-r0/installer.conf | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/device/mellanox/x86_64-nvidia_sn5400-r0/installer.conf b/device/mellanox/x86_64-nvidia_sn5400-r0/installer.conf
index cdaaf72f6..01fe2397c 100644
--- a/device/mellanox/x86_64-nvidia_sn5400-r0/installer.conf
+++ b/device/mellanox/x86_64-nvidia_sn5400-r0/installer.conf
@@ -1 +1 @@
-ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="tpm_tis.interrupts=0"
+ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="tpm_tis.interrupts=0 nosgx"
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/installer.conf b/device/mellanox/x86_64-nvidia_sn5600-r0/installer.conf
index 71628d62e..7be170196 100644
--- a/device/mellanox/x86_64-nvidia_sn5600-r0/installer.conf
+++ b/device/mellanox/x86_64-nvidia_sn5600-r0/installer.conf
@@ -1 +1 @@
-ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="libata.force=noncq tpm_tis.interrupts=0"
+ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="libata.force=noncq tpm_tis.interrupts=0 nosgx"

From 73937cb202dfa0777235cbecda048d471a39e898 Mon Sep 17 00:00:00 2001
From: Stephen Sun <5379172+stephenxs@users.noreply.github.com>
Date: Wed, 25 Sep 2024 12:03:37 +0800
Subject: [PATCH 1031/1115] Update asic table template for shared headroom pool
 relevant information (#20085)

[Mellanox] Update asic table template for shared headroom pool relevant information

Signed-off-by: Stephen Sun <stephens@nvidia.com>
---
 platform/mellanox/asic_table.j2 | 16 ++++++++++++----
 1 file changed, 12 insertions(+), 4 deletions(-)

diff --git a/platform/mellanox/asic_table.j2 b/platform/mellanox/asic_table.j2
index 0069c6b77..ede46d576 100644
--- a/platform/mellanox/asic_table.j2
+++ b/platform/mellanox/asic_table.j2
@@ -60,7 +60,9 @@
             "cell_size": "96",
             "pipeline_latency": "19",
             "mac_phy_delay": "0.8",
-            "peer_response_time": "3.8"
+            "peer_response_time": "3.8",
+            "port_reserved_shp": "20",
+            "port_max_shp": "8192"
         },
         "OP": "SET"
     }
@@ -70,7 +72,9 @@
             "cell_size": "144",
             "pipeline_latency": "19",
             "mac_phy_delay": "0.8",
-            "peer_response_time": "3.8"
+            "peer_response_time": "3.8",
+            "port_reserved_shp": "20",
+            "port_max_shp": "8192"
         },
         "OP": "SET"
     }
@@ -80,7 +84,9 @@
             "cell_size": "144",
             "pipeline_latency": "19",
             "mac_phy_delay": "0.8",
-            "peer_response_time": "3.8"
+            "peer_response_time": "3.8",
+            "port_reserved_shp": "20",
+            "port_max_shp": "8192"
         },
         "OP": "SET"
     }
@@ -90,7 +96,9 @@
             "cell_size": "192",
             "pipeline_latency": "19",
             "mac_phy_delay": "0.8",
-            "peer_response_time": "3.8"
+            "peer_response_time": "3.8",
+            "port_reserved_shp": "20",
+            "port_max_shp": "8192"
         },
         "OP": "SET"
     }

From 439e26612ffcfb3e4ee2bed16701a0b0070f6132 Mon Sep 17 00:00:00 2001
From: Longxiang Lyu <35479537+lolyu@users.noreply.github.com>
Date: Wed, 25 Sep 2024 14:18:28 +0800
Subject: [PATCH 1032/1115] [subnet decap] Flush state db tunnel && decap term
 entries when swss restarts (#20291)

Why I did it
When swss is restarted, let's cleanup the state db tunnel and decap term entries.

Signed-off-by: Longxiang Lyu lolv@microsoft.com

Work item tracking
Microsoft ADO (number only): 29507113

How I did it
flush the state db tunnel and decap term entries.

Signed-off-by: Longxiang Lyu <lolv@microsoft.com>
---
 files/scripts/swss.sh | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/files/scripts/swss.sh b/files/scripts/swss.sh
index e00cc752e..35815fe4d 100755
--- a/files/scripts/swss.sh
+++ b/files/scripts/swss.sh
@@ -328,7 +328,7 @@ start() {
         $SONIC_DB_CLI GB_ASIC_DB FLUSHDB
         $SONIC_DB_CLI GB_COUNTERS_DB FLUSHDB
         $SONIC_DB_CLI RESTAPI_DB FLUSHDB
-        clean_up_tables STATE_DB "'PORT_TABLE*', 'MGMT_PORT_TABLE*', 'VLAN_TABLE*', 'VLAN_MEMBER_TABLE*', 'LAG_TABLE*', 'LAG_MEMBER_TABLE*', 'INTERFACE_TABLE*', 'MIRROR_SESSION*', 'VRF_TABLE*', 'FDB_TABLE*', 'FG_ROUTE_TABLE*', 'BUFFER_POOL*', 'BUFFER_PROFILE*', 'MUX_CABLE_TABLE*', 'ADVERTISE_NETWORK_TABLE*', 'VXLAN_TUNNEL_TABLE*', 'VNET_ROUTE*', 'MACSEC_PORT_TABLE*', 'MACSEC_INGRESS_SA_TABLE*', 'MACSEC_EGRESS_SA_TABLE*', 'MACSEC_INGRESS_SC_TABLE*', 'MACSEC_EGRESS_SC_TABLE*', 'VRF_OBJECT_TABLE*', 'VNET_MONITOR_TABLE*', 'BFD_SESSION_TABLE*', 'SYSTEM_NEIGH_TABLE*', 'FABRIC_PORT_TABLE*'"
+        clean_up_tables STATE_DB "'PORT_TABLE*', 'MGMT_PORT_TABLE*', 'VLAN_TABLE*', 'VLAN_MEMBER_TABLE*', 'LAG_TABLE*', 'LAG_MEMBER_TABLE*', 'INTERFACE_TABLE*', 'MIRROR_SESSION*', 'VRF_TABLE*', 'FDB_TABLE*', 'FG_ROUTE_TABLE*', 'BUFFER_POOL*', 'BUFFER_PROFILE*', 'MUX_CABLE_TABLE*', 'ADVERTISE_NETWORK_TABLE*', 'VXLAN_TUNNEL_TABLE*', 'VNET_ROUTE*', 'MACSEC_PORT_TABLE*', 'MACSEC_INGRESS_SA_TABLE*', 'MACSEC_EGRESS_SA_TABLE*', 'MACSEC_INGRESS_SC_TABLE*', 'MACSEC_EGRESS_SC_TABLE*', 'VRF_OBJECT_TABLE*', 'VNET_MONITOR_TABLE*', 'BFD_SESSION_TABLE*', 'SYSTEM_NEIGH_TABLE*', 'FABRIC_PORT_TABLE*', 'TUNNEL_DECAP_TABLE*', 'TUNNEL_DECAP_TERM_TABLE*'"
         $SONIC_DB_CLI APPL_STATE_DB FLUSHDB
         clean_up_chassis_db_tables
         rm -rf /tmp/cache

From 8ad497f8cb5b4c21141e3c18e0140570956f6ef4 Mon Sep 17 00:00:00 2001
From: noaOrMlnx <58519608+noaOrMlnx@users.noreply.github.com>
Date: Wed, 25 Sep 2024 12:28:08 +0300
Subject: [PATCH 1033/1115] [Mellanox] Add SN5640 SIMX platform with default
 SKU (#20225)

- Why I did it
Introduce new Mellanox SIMX platform SN5640.
Number of up/down links - 256/256.
Default cable length for t0 - 40m.
Default cable length for t1 - 300m.
Default speed - 100G.

- How I did it
Added all relevant files of new SKU used for ASIC simulation

- How to verify it
Check that the SKU is up and running on simulation environment
---
 .../ACS-SN5640/buffers.json.j2                |    1 +
 .../ACS-SN5640/buffers_defaults_objects.j2    |    1 +
 .../ACS-SN5640/buffers_defaults_t0.j2         |   47 +
 .../ACS-SN5640/buffers_defaults_t1.j2         |   47 +
 .../ACS-SN5640/buffers_dynamic.json.j2        |   16 +
 .../create_only_config_db_buffers.json        |    7 +
 .../ACS-SN5640/hwsku.json                     |  202 +
 .../ACS-SN5640/pg_profile_lookup.ini          |   42 +
 .../ACS-SN5640/port_config.ini                |  532 +++
 .../ACS-SN5640/qos.json.j2                    |    1 +
 .../ACS-SN5640/sai.profile                    |    1 +
 .../ACS-SN5640/sai_5640.xml                   | 3637 +++++++++++++++++
 .../x86_64-nvidia_sn5640_simx-r0/default_sku  |    1 +
 .../platform.json                             | 1297 ++++++
 .../platform_asic                             |    1 +
 .../plugins/eeprom.py                         |    1 +
 .../plugins/psuutil.py                        |    1 +
 .../plugins/sfplpmget.py                      |    1 +
 .../plugins/sfplpmset.py                      |    1 +
 .../plugins/sfpreset.py                       |    1 +
 .../plugins/sfputil.py                        |    1 +
 .../pmon_daemon_control.json                  |    7 +
 .../system_health_monitoring_config.json      |    1 +
 platform/mellanox/asic_table.j2               |   11 +
 24 files changed, 5858 insertions(+)
 create mode 120000 device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/buffers.json.j2
 create mode 120000 device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/buffers_defaults_objects.j2
 create mode 100644 device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/buffers_defaults_t0.j2
 create mode 100644 device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/buffers_defaults_t1.j2
 create mode 100644 device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/buffers_dynamic.json.j2
 create mode 100644 device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/create_only_config_db_buffers.json
 create mode 100644 device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/hwsku.json
 create mode 100644 device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/pg_profile_lookup.ini
 create mode 100644 device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/port_config.ini
 create mode 120000 device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/qos.json.j2
 create mode 100644 device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/sai.profile
 create mode 100644 device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/sai_5640.xml
 create mode 100644 device/mellanox/x86_64-nvidia_sn5640_simx-r0/default_sku
 create mode 100644 device/mellanox/x86_64-nvidia_sn5640_simx-r0/platform.json
 create mode 100644 device/mellanox/x86_64-nvidia_sn5640_simx-r0/platform_asic
 create mode 120000 device/mellanox/x86_64-nvidia_sn5640_simx-r0/plugins/eeprom.py
 create mode 120000 device/mellanox/x86_64-nvidia_sn5640_simx-r0/plugins/psuutil.py
 create mode 120000 device/mellanox/x86_64-nvidia_sn5640_simx-r0/plugins/sfplpmget.py
 create mode 120000 device/mellanox/x86_64-nvidia_sn5640_simx-r0/plugins/sfplpmset.py
 create mode 120000 device/mellanox/x86_64-nvidia_sn5640_simx-r0/plugins/sfpreset.py
 create mode 120000 device/mellanox/x86_64-nvidia_sn5640_simx-r0/plugins/sfputil.py
 create mode 100644 device/mellanox/x86_64-nvidia_sn5640_simx-r0/pmon_daemon_control.json
 create mode 120000 device/mellanox/x86_64-nvidia_sn5640_simx-r0/system_health_monitoring_config.json

diff --git a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/buffers.json.j2 b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/buffers.json.j2
new file mode 120000
index 000000000..784bd5c08
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/buffers.json.j2
@@ -0,0 +1 @@
+../../x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D48C8/buffers.json.j2
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/buffers_defaults_objects.j2 b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/buffers_defaults_objects.j2
new file mode 120000
index 000000000..c01aebb7a
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/buffers_defaults_objects.j2
@@ -0,0 +1 @@
+../../x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D48C8/buffers_defaults_objects.j2
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/buffers_defaults_t0.j2 b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/buffers_defaults_t0.j2
new file mode 100644
index 000000000..517e37b6e
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/buffers_defaults_t0.j2
@@ -0,0 +1,47 @@
+{#
+    Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+    Apache-2.0
+
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+
+    http://www.apache.org/licenses/LICENSE-2.0
+
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+#}
+{% set default_cable = '40m' %}
+{% set ingress_lossless_pool_size =  '57828352' %}
+{% set ingress_lossless_pool_xoff =  '22544384' %}
+{% set egress_lossless_pool_size =  '136209408' %}
+{% set egress_lossy_pool_size =  '57828352' %}
+
+{% import 'buffers_defaults_objects.j2' as defs with context %}
+
+{%- macro generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) %}
+{{ defs.generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_profile_lists_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_profile_lists(port_names_active, port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_queue_buffers_with_extra_lossless_queues_with_inactive_ports(port_names_active, port_names_extra_queues, port_names_inactive) %}
+{{ defs.generate_queue_buffers_with_extra_lossless_queues(port_names_active, port_names_extra_queues, port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_queue_buffers_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_queue_buffers(port_names_active, port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_pg_profiles_with_extra_lossless_pgs_with_inactive_ports(port_names_active, port_names_extra_pgs, port_names_inactive) %}
+{{ defs.generate_pg_profiles_with_extra_lossless_pgs(port_names_active, port_names_extra_pgs, port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_pg_profiles_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_pg_profiles(port_names_active, port_names_inactive) }}
+{%- endmacro %}
diff --git a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/buffers_defaults_t1.j2 b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/buffers_defaults_t1.j2
new file mode 100644
index 000000000..59dd8cf55
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/buffers_defaults_t1.j2
@@ -0,0 +1,47 @@
+{#
+    Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+    Apache-2.0
+
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+
+    http://www.apache.org/licenses/LICENSE-2.0
+
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+#}
+{% set default_cable = '300m' %}
+{% set ingress_lossless_pool_size =  '40002560' %}
+{% set ingress_lossless_pool_xoff =  '40370176' %}
+{% set egress_lossless_pool_size =  '136209408' %}
+{% set egress_lossy_pool_size =  '40002560' %}
+
+{% import 'buffers_defaults_objects.j2' as defs with context %}
+
+{%- macro generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) %}
+{{ defs.generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_profile_lists_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_profile_lists(port_names_active, port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_queue_buffers_with_extra_lossless_queues_with_inactive_ports(port_names_active, port_names_extra_queues, port_names_inactive) %}
+{{ defs.generate_queue_buffers_with_extra_lossless_queues(port_names_active, port_names_extra_queues, port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_queue_buffers_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_queue_buffers(port_names_active, port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_pg_profiles_with_extra_lossless_pgs_with_inactive_ports(port_names_active, port_names_extra_pgs, port_names_inactive) %}
+{{ defs.generate_pg_profiles_with_extra_lossless_pgs(port_names_active, port_names_extra_pgs, port_names_inactive) }}
+{%- endmacro %}
+
+{%- macro generate_pg_profiles_with_inactive_ports(port_names_active, port_names_inactive) %}
+{{ defs.generate_pg_profiles(port_names_active, port_names_inactive) }}
+{%- endmacro %}
diff --git a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/buffers_dynamic.json.j2 b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/buffers_dynamic.json.j2
new file mode 100644
index 000000000..b2cc958b7
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/buffers_dynamic.json.j2
@@ -0,0 +1,16 @@
+{#
+    Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+    Apache-2.0
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+    http://www.apache.org/licenses/LICENSE-2.0
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+#}
+{%- set default_topo = 't0' %}
+{%- set dynamic_mode = 'true' %}
+{%- include 'buffers_config.j2' %}
diff --git a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/create_only_config_db_buffers.json b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/create_only_config_db_buffers.json
new file mode 100644
index 000000000..6feb15671
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/create_only_config_db_buffers.json
@@ -0,0 +1,7 @@
+{
+    "DEVICE_METADATA": {
+        "localhost": {
+            "create_only_config_db_buffers": "true"
+        }
+    }
+}
diff --git a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/hwsku.json b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/hwsku.json
new file mode 100644
index 000000000..43d2fc1d2
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/hwsku.json
@@ -0,0 +1,202 @@
+{
+    "interfaces": {
+        "Ethernet0": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet8": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet16": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet24": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet32": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet40": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet48": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet56": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet64": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet72": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet80": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet88": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet96": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet104": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet112": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet120": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet128": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet136": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet144": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet152": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet160": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet168": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet176": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet184": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet192": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet200": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet208": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet216": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet224": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet232": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet240": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet248": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet256": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet264": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet272": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet280": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet288": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet296": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet304": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet312": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet320": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet328": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet336": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet344": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet352": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet360": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet368": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet376": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet384": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet392": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet400": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet408": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet416": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet424": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet432": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet440": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet448": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet456": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet464": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet472": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet480": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet488": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet496": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet504": {
+            "default_brkout_mode": "8x100G[50G]"
+        },
+        "Ethernet512": {
+            "default_brkout_mode": "1x25G[10G]"
+        },
+        "Ethernet520": {
+            "default_brkout_mode": "1x25G[10G]"
+        }
+    }
+}
diff --git a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/pg_profile_lookup.ini b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/pg_profile_lookup.ini
new file mode 100644
index 000000000..33878b38c
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/pg_profile_lookup.ini
@@ -0,0 +1,42 @@
+##
+## Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+## Apache-2.0
+##
+## Licensed under the Apache License, Version 2.0 (the "License");
+## you may not use this file except in compliance with the License.
+## You may obtain a copy of the License at
+##
+## http://www.apache.org/licenses/LICENSE-2.0
+##
+## Unless required by applicable law or agreed to in writing, software
+## distributed under the License is distributed on an "AS IS" BASIS,
+## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+## See the License for the specific language governing permissions and
+## limitations under the License.
+##
+#  PG lossless profiles.
+# speed cable  size   xon    xoff   threshold
+10000      5m  19456  19456  20480          0
+25000      5m  19456  19456  21504          0
+50000      5m  19456  19456  26624          0
+100000     5m  19456  19456  44032          0
+200000     5m  19456  19456  50176          0
+400000     5m  19456  19456  86016          0
+10000     30m  19456  19456  20480          0
+25000     30m  19456  19456  22528          0
+50000     30m  19456  19456  27648          0
+100000    30m  19456  19456  48128          0
+200000    30m  19456  19456  57344          0
+400000    30m  19456  19456  99328          0
+10000     40m  19456  19456  20480          0
+25000     40m  19456  19456  22528          0
+50000     40m  19456  19456  28672          0
+100000    40m  19456  19456  49152          0
+200000    40m  19456  19456  60416          0
+400000    40m  19456  19456  104448         0
+10000    300m  19456  19456  23552          0
+25000    300m  19456  19456  30720          0
+50000    300m  19456  19456  46080          0
+100000   300m  19456  19456  83968          0
+200000   300m  19456  19456  130048         0
+400000   300m  19456  19456  243712         0
diff --git a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/port_config.ini b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/port_config.ini
new file mode 100644
index 000000000..640299159
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/port_config.ini
@@ -0,0 +1,532 @@
+##
+## Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+## Apache-2.0
+##
+## Licensed under the Apache License, Version 2.0 (the "License");
+## you may not use this file except in compliance with the License.
+## You may obtain a copy of the License at
+##
+## http://www.apache.org/licenses/LICENSE-2.0
+##
+## Unless required by applicable law or agreed to in writing, software
+## distributed under the License is distributed on an "AS IS" BASIS,
+## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+## See the License for the specific language governing permissions and
+## limitations under the License.
+##
+
+# name          lanes                                alias      index
+Ethernet0       0                                    etp1a      1
+Ethernet1       1                                    etp1b      1
+Ethernet2       2                                    etp1c      1
+Ethernet3       3                                    etp1d      1
+Ethernet4       4                                    etp1e      1
+Ethernet5       5                                    etp1f      1
+Ethernet6       6                                    etp1g      1
+Ethernet7       7                                    etp1h      1
+Ethernet8       8                                    etp2a      2
+Ethernet9       9                                    etp2b      2
+Ethernet10      10                                   etp2c      2
+Ethernet11      11                                   etp2d      2
+Ethernet12      12                                   etp2e      2
+Ethernet13      13                                   etp2f      2
+Ethernet14      14                                   etp2g      2
+Ethernet15      15                                   etp2h      2
+Ethernet16      16                                   etp3a      3
+Ethernet17      17                                   etp3b      3
+Ethernet18      18                                   etp3c      3
+Ethernet19      19                                   etp3d      3
+Ethernet20      20                                   etp3e      3
+Ethernet21      21                                   etp3f      3
+Ethernet22      22                                   etp3g      3
+Ethernet23      23                                   etp3h      3
+Ethernet24      24                                   etp4a      4
+Ethernet25      25                                   etp4b      4
+Ethernet26      26                                   etp4c      4
+Ethernet27      27                                   etp4d      4
+Ethernet28      28                                   etp4e      4
+Ethernet29      29                                   etp4f      4
+Ethernet30      30                                   etp4g      4
+Ethernet31      31                                   etp4h      4
+Ethernet32      32                                   etp5a      5
+Ethernet33      33                                   etp5b      5
+Ethernet34      34                                   etp5c      5
+Ethernet35      35                                   etp5d      5
+Ethernet36      36                                   etp5e      5
+Ethernet37      37                                   etp5f      5
+Ethernet38      38                                   etp5g      5
+Ethernet39      39                                   etp5h      5
+Ethernet40      40                                   etp6a      6
+Ethernet41      41                                   etp6b      6
+Ethernet42      42                                   etp6c      6
+Ethernet43      43                                   etp6d      6
+Ethernet44      44                                   etp6e      6
+Ethernet45      45                                   etp6f      6
+Ethernet46      46                                   etp6g      6
+Ethernet47      47                                   etp6h      6
+Ethernet48      48                                   etp7a      7
+Ethernet49      49                                   etp7b      7
+Ethernet50      50                                   etp7c      7
+Ethernet51      51                                   etp7d      7
+Ethernet52      52                                   etp7e      7
+Ethernet53      53                                   etp7f      7
+Ethernet54      54                                   etp7g      7
+Ethernet55      55                                   etp7h      7
+Ethernet56      56                                   etp8a      8
+Ethernet57      57                                   etp8b      8
+Ethernet58      58                                   etp8c      8
+Ethernet59      59                                   etp8d      8
+Ethernet60      60                                   etp8e      8
+Ethernet61      61                                   etp8f      8
+Ethernet62      62                                   etp8g      8
+Ethernet63      63                                   etp8h      8
+Ethernet64      64                                   etp9a      9
+Ethernet65      65                                   etp9b      9
+Ethernet66      66                                   etp9c      9
+Ethernet67      67                                   etp9d      9 
+Ethernet68      68                                   etp9e      9
+Ethernet69      69                                   etp9f      9
+Ethernet70      70                                   etp9g      9
+Ethernet71      71                                   etp9h      9
+Ethernet72      72                                   etp10a     10
+Ethernet73      73                                   etp10b     10
+Ethernet74      74                                   etp10c     10
+Ethernet75      75                                   etp10d     10
+Ethernet76      76                                   etp10e     10
+Ethernet77      77                                   etp10f     10
+Ethernet78      78                                   etp10g     10
+Ethernet79      79                                   etp10h     10
+Ethernet80      80                                   etp11a     11
+Ethernet81      81                                   etp11b     11
+Ethernet82      82                                   etp11c     11
+Ethernet83      83                                   etp11d     11
+Ethernet84      84                                   etp11e     11
+Ethernet85      85                                   etp11f     11
+Ethernet86      86                                   etp11g     11
+Ethernet87      87                                   etp11h     11
+Ethernet88      88                                   etp12a     12
+Ethernet89      89                                   etp12b     12
+Ethernet90      90                                   etp12c     12
+Ethernet91      91                                   etp12d     12
+Ethernet92      92                                   etp12e     12
+Ethernet93      93                                   etp12f     12
+Ethernet94      94                                   etp12g     12
+Ethernet95      95                                   etp12h     12
+Ethernet96      96                                   etp13a     13
+Ethernet97      97                                   etp13b     13
+Ethernet98      98                                   etp13c     13
+Ethernet99      99                                   etp13d     13
+Ethernet100     100                                  etp13e     13
+Ethernet101     101                                  etp13f     13
+Ethernet102     102                                  etp13g     13
+Ethernet103     103                                  etp13h     13
+Ethernet104     104                                  etp14a     14
+Ethernet105     105                                  etp14b     14
+Ethernet106     106                                  etp14c     14
+Ethernet107     107                                  etp14d     14
+Ethernet108     108                                  etp14e     14
+Ethernet109     109                                  etp14f     14
+Ethernet110     110                                  etp14g     14
+Ethernet111     111                                  etp14h     14
+Ethernet112     112                                  etp15a     15
+Ethernet113     113                                  etp15b     15
+Ethernet114     114                                  etp15c     15
+Ethernet115     115                                  etp15d     15
+Ethernet116     116                                  etp15e     15
+Ethernet117     117                                  etp15f     15
+Ethernet118     118                                  etp15g     15
+Ethernet119     119                                  etp15h     15
+Ethernet120     120                                  etp16a     16
+Ethernet121     121                                  etp16b     16
+Ethernet122     122                                  etp16c     16
+Ethernet123     123                                  etp16d     16
+Ethernet124     124                                  etp16e     16
+Ethernet125     125                                  etp16f     16
+Ethernet126     126                                  etp16g     16
+Ethernet127     127                                  etp16h     16
+Ethernet128     128                                  etp17a     17
+Ethernet129     129                                  etp17b     17
+Ethernet130     130                                  etp17c     17
+Ethernet131     131                                  etp17d     17
+Ethernet132     132                                  etp17e     17
+Ethernet133     133                                  etp17f     17
+Ethernet134     134                                  etp17g     17
+Ethernet135     135                                  etp17h     17
+Ethernet136     136                                  etp18a     18
+Ethernet137     137                                  etp18b     18
+Ethernet138     138                                  etp18c     18
+Ethernet139     139                                  etp18d     18
+Ethernet140     140                                  etp18e     18
+Ethernet141     141                                  etp18f     18
+Ethernet142     142                                  etp18g     18
+Ethernet143     143                                  etp18h     18
+Ethernet144     144                                  etp19a     19
+Ethernet145     145                                  etp19b     19
+Ethernet146     146                                  etp19c     19
+Ethernet147     147                                  etp19d     19
+Ethernet148     148                                  etp19e     19
+Ethernet149     149                                  etp19f     19
+Ethernet150     150                                  etp19g     19
+Ethernet151     151                                  etp19h     19
+Ethernet152     152                                  etp20a     20
+Ethernet153     153                                  etp20b     20
+Ethernet154     154                                  etp20c     20
+Ethernet155     155                                  etp20d     20
+Ethernet156     156                                  etp20e     20
+Ethernet157     157                                  etp20f     20
+Ethernet158     158                                  etp20g     20
+Ethernet159     159                                  etp20h     20
+Ethernet160     160                                  etp21a     21
+Ethernet161     161                                  etp21b     21
+Ethernet162     162                                  etp21c     21
+Ethernet163     163                                  etp21d     21
+Ethernet164     164                                  etp21e     21
+Ethernet165     165                                  etp21f     21
+Ethernet166     166                                  etp21g     21
+Ethernet167     167                                  etp21h     21
+Ethernet168     168                                  etp22a     22
+Ethernet169     169                                  etp22b     22
+Ethernet170     170                                  etp22c     22
+Ethernet171     171                                  etp22d     22
+Ethernet172     172                                  etp22e     22
+Ethernet173     173                                  etp22f     22
+Ethernet174     174                                  etp22g     22
+Ethernet175     175                                  etp22h     22
+Ethernet176     176                                  etp23a     23
+Ethernet177     177                                  etp23b     23
+Ethernet178     178                                  etp23c     23
+Ethernet179     179                                  etp23d     23
+Ethernet180     180                                  etp23e     23
+Ethernet181     181                                  etp23f     23
+Ethernet182     182                                  etp23g     23
+Ethernet183     183                                  etp23h     23
+Ethernet184     184                                  etp24a     24
+Ethernet185     185                                  etp24b     24
+Ethernet186     186                                  etp24c     24
+Ethernet187     187                                  etp24d     24
+Ethernet188     188                                  etp24e     24
+Ethernet189     189                                  etp24f     24
+Ethernet190     190                                  etp24g     24
+Ethernet191     191                                  etp24h     24
+Ethernet192     192                                  etp25a     25
+Ethernet193     193                                  etp25b     25
+Ethernet194     194                                  etp25c     25
+Ethernet195     195                                  etp25d     25
+Ethernet196     196                                  etp25e     25
+Ethernet197     197                                  etp25f     25
+Ethernet198     198                                  etp25g     25
+Ethernet199     199                                  etp25h     25
+Ethernet200     200                                  etp26a     26
+Ethernet201     201                                  etp26b     26
+Ethernet202     202                                  etp26c     26
+Ethernet203     203                                  etp26d     26
+Ethernet204     204                                  etp26e     26
+Ethernet205     205                                  etp26f     26
+Ethernet206     206                                  etp26g     26
+Ethernet207     207                                  etp26h     26
+Ethernet208     208                                  etp27a     27
+Ethernet209     209                                  etp27b     27
+Ethernet210     210                                  etp27c     27
+Ethernet211     211                                  etp27d     27
+Ethernet212     212                                  etp27e     27
+Ethernet213     213                                  etp27f     27
+Ethernet214     214                                  etp27g     27
+Ethernet215     215                                  etp27h     27
+Ethernet216     216                                  etp28a     28
+Ethernet217     217                                  etp28b     28
+Ethernet218     218                                  etp28c     28
+Ethernet219     219                                  etp28d     28
+Ethernet220     220                                  etp28e     28
+Ethernet221     221                                  etp28f     28
+Ethernet222     222                                  etp28g     28
+Ethernet223     223                                  etp28h     28
+Ethernet224     224                                  etp29a     29
+Ethernet225     225                                  etp29b     29
+Ethernet226     226                                  etp29c     29
+Ethernet227     227                                  etp29d     29
+Ethernet228     228                                  etp29e     29
+Ethernet229     229                                  etp29f     29
+Ethernet230     230                                  etp29g     29
+Ethernet231     231                                  etp29h     29
+Ethernet232     232                                  etp30a     30
+Ethernet233     233                                  etp30b     30
+Ethernet234     234                                  etp30c     30
+Ethernet235     235                                  etp30d     30
+Ethernet236     236                                  etp30e     30
+Ethernet237     237                                  etp30f     30
+Ethernet238     238                                  etp30g     30
+Ethernet239     239                                  etp30h     30
+Ethernet240     240                                  etp31a     31
+Ethernet241     241                                  etp31b     31
+Ethernet242     242                                  etp31c     31
+Ethernet243     243                                  etp31d     31
+Ethernet244     244                                  etp31e     31
+Ethernet245     245                                  etp31f     31
+Ethernet246     246                                  etp31g     31
+Ethernet247     247                                  etp31h     31
+Ethernet248     248                                  etp32a     32
+Ethernet249     249                                  etp32b     32
+Ethernet250     250                                  etp32c     32
+Ethernet251     251                                  etp32d     32
+Ethernet252     252                                  etp32e     32
+Ethernet253     253                                  etp32f     32
+Ethernet254     254                                  etp32g     32
+Ethernet255     255                                  etp32h     32
+Ethernet256     256                                  etp33a     33
+Ethernet257     257                                  etp33b     33
+Ethernet258     258                                  etp33c     33
+Ethernet259     259                                  etp33d     33
+Ethernet260     260                                  etp33e     33
+Ethernet261     261                                  etp33f     33
+Ethernet262     262                                  etp33g     33
+Ethernet263     263                                  etp33h     33
+Ethernet264     264                                  etp34a     34
+Ethernet265     265                                  etp34b     34
+Ethernet266     266                                  etp34c     34
+Ethernet267     267                                  etp34d     34
+Ethernet268     268                                  etp34e     34
+Ethernet269     269                                  etp34f     34
+Ethernet270     270                                  etp34g     34
+Ethernet271     271                                  etp34h     34
+Ethernet272     272                                  etp35a     35
+Ethernet273     273                                  etp35b     35
+Ethernet274     274                                  etp35c     35
+Ethernet275     275                                  etp35d     35
+Ethernet276     276                                  etp35e     35
+Ethernet277     277                                  etp35f     35
+Ethernet278     278                                  etp35g     35
+Ethernet279     279                                  etp35h     35
+Ethernet280     280                                  etp36a     36
+Ethernet281     281                                  etp36b     36
+Ethernet282     282                                  etp36c     36
+Ethernet283     283                                  etp36d     36
+Ethernet284     284                                  etp36e     36
+Ethernet285     285                                  etp36f     36
+Ethernet286     286                                  etp36g     36
+Ethernet287     287                                  etp36h     36
+Ethernet288     288                                  etp37a     37
+Ethernet289     289                                  etp37b     37
+Ethernet290     290                                  etp37c     37
+Ethernet291     291                                  etp37d     37
+Ethernet292     292                                  etp37e     37
+Ethernet293     293                                  etp37f     37
+Ethernet294     294                                  etp37g     37
+Ethernet295     295                                  etp37h     37
+Ethernet296     296                                  etp38a     38
+Ethernet297     297                                  etp38b     38
+Ethernet298     298                                  etp38c     38
+Ethernet299     299                                  etp38d     38
+Ethernet300     300                                  etp38e     38
+Ethernet301     301                                  etp38f     38
+Ethernet302     302                                  etp38g     38
+Ethernet303     303                                  etp38h     38
+Ethernet304     304                                  etp39a     39
+Ethernet305     305                                  etp39b     39
+Ethernet306     306                                  etp39c     39
+Ethernet307     307                                  etp39d     39
+Ethernet308     308                                  etp39e     39
+Ethernet309     309                                  etp39f     39
+Ethernet310     310                                  etp39g     39
+Ethernet311     311                                  etp39h     39
+Ethernet312     312                                  etp40a     40
+Ethernet313     313                                  etp40b     40
+Ethernet314     314                                  etp40c     40
+Ethernet315     315                                  etp40d     40
+Ethernet316     316                                  etp40e     40
+Ethernet317     317                                  etp40f     40
+Ethernet318     318                                  etp40g     40
+Ethernet319     319                                  etp40h     40
+Ethernet320     320                                  etp41a     41
+Ethernet321     321                                  etp41b     41
+Ethernet322     322                                  etp41c     41
+Ethernet323     323                                  etp41d     41
+Ethernet324     324                                  etp41e     41
+Ethernet325     325                                  etp41f     41
+Ethernet326     326                                  etp41g     41
+Ethernet327     327                                  etp41h     41
+Ethernet328     328                                  etp42a     42
+Ethernet329     329                                  etp42b     42
+Ethernet330     330                                  etp42c     42
+Ethernet331     331                                  etp42d     42
+Ethernet332     332                                  etp42e     42
+Ethernet333     333                                  etp42f     42
+Ethernet334     334                                  etp42g     42
+Ethernet335     335                                  etp42h     42
+Ethernet336     336                                  etp43a     43
+Ethernet337     337                                  etp43b     43
+Ethernet338     338                                  etp43c     43
+Ethernet339     339                                  etp43d     43
+Ethernet340     340                                  etp43e     43
+Ethernet341     341                                  etp43f     43
+Ethernet342     342                                  etp43g     43
+Ethernet343     343                                  etp43h     43
+Ethernet344     344                                  etp44a     44
+Ethernet345     345                                  etp44b     44
+Ethernet346     346                                  etp44c     44
+Ethernet347     347                                  etp44d     44
+Ethernet348     348                                  etp44e     44
+Ethernet349     349                                  etp44f     44
+Ethernet350     350                                  etp44g     44
+Ethernet351     351                                  etp44h     44
+Ethernet352     352                                  etp45a     45
+Ethernet353     353                                  etp45b     45
+Ethernet354     354                                  etp45c     45
+Ethernet355     355                                  etp45d     45
+Ethernet356     356                                  etp45e     45
+Ethernet357     357                                  etp45f     45
+Ethernet358     358                                  etp45g     45
+Ethernet359     359                                  etp45h     45
+Ethernet360     360                                  etp46a     46
+Ethernet361     361                                  etp46b     46
+Ethernet362     362                                  etp46c     46
+Ethernet363     363                                  etp46d     46
+Ethernet364     364                                  etp46e     46
+Ethernet365     365                                  etp46f     46
+Ethernet366     366                                  etp46g     46
+Ethernet367     367                                  etp46h     46
+Ethernet368     368                                  etp47a     47
+Ethernet369     369                                  etp47b     47
+Ethernet370     370                                  etp47c     47
+Ethernet371     371                                  etp47d     47
+Ethernet372     372                                  etp47e     47
+Ethernet373     373                                  etp47f     47
+Ethernet374     374                                  etp47g     47
+Ethernet375     375                                  etp47h     47
+Ethernet376     376                                  etp48a     48
+Ethernet377     377                                  etp48b     48
+Ethernet378     378                                  etp48c     48
+Ethernet379     379                                  etp48d     48
+Ethernet380     380                                  etp48e     48
+Ethernet381     381                                  etp48f     48
+Ethernet382     382                                  etp48g     48
+Ethernet383     383                                  etp48h     48
+Ethernet384     384                                  etp49a     49
+Ethernet385     385                                  etp49b     49
+Ethernet386     386                                  etp49c     49
+Ethernet387     387                                  etp49d     49
+Ethernet388     388                                  etp49e     49
+Ethernet389     389                                  etp49f     49
+Ethernet390     390                                  etp49g     49
+Ethernet391     391                                  etp49h     49
+Ethernet392     392                                  etp50a     50
+Ethernet393     393                                  etp50b     50
+Ethernet394     394                                  etp50c     50
+Ethernet395     395                                  etp50d     50
+Ethernet396     396                                  etp50e     50
+Ethernet397     397                                  etp50f     50
+Ethernet398     398                                  etp50g     50
+Ethernet399     399                                  etp50h     50
+Ethernet400     400                                  etp51a     51
+Ethernet401     401                                  etp51b     51
+Ethernet402     402                                  etp51c     51
+Ethernet403     403                                  etp51d     51
+Ethernet404     404                                  etp51e     51
+Ethernet405     405                                  etp51f     51
+Ethernet406     406                                  etp51g     51
+Ethernet407     407                                  etp51h     51
+Ethernet408     408                                  etp52a     52
+Ethernet409     409                                  etp52b     52
+Ethernet410     410                                  etp52c     52
+Ethernet411     411                                  etp52d     52
+Ethernet412     412                                  etp52e     52
+Ethernet413     413                                  etp52f     52
+Ethernet414     414                                  etp52g     52
+Ethernet415     415                                  etp52h     52
+Ethernet416     416                                  etp53a     53
+Ethernet417     417                                  etp53b     53
+Ethernet418     418                                  etp53c     53
+Ethernet419     419                                  etp53d     53
+Ethernet420     420                                  etp53e     53
+Ethernet421     421                                  etp53f     53
+Ethernet422     422                                  etp53g     53
+Ethernet423     423                                  etp53h     53
+Ethernet424     424                                  etp54a     54
+Ethernet425     425                                  etp54b     54
+Ethernet426     426                                  etp54c     54
+Ethernet427     427                                  etp54d     54
+Ethernet428     428                                  etp54e     54
+Ethernet429     429                                  etp54f     54
+Ethernet430     430                                  etp54g     54
+Ethernet431     431                                  etp54h     54
+Ethernet432     432                                  etp55a     55
+Ethernet433     433                                  etp55b     55
+Ethernet434     434                                  etp55c     55
+Ethernet435     435                                  etp55d     55
+Ethernet436     436                                  etp55e     55
+Ethernet437     437                                  etp55f     55
+Ethernet438     438                                  etp55g     55
+Ethernet439     439                                  etp55h     55
+Ethernet440     440                                  etp56a     56
+Ethernet441     441                                  etp56b     56
+Ethernet442     442                                  etp56c     56
+Ethernet443     443                                  etp56d     56
+Ethernet444     444                                  etp56e     56
+Ethernet445     445                                  etp56f     56
+Ethernet446     446                                  etp56g     56
+Ethernet447     447                                  etp56h     56
+Ethernet448     448                                  etp57a     57
+Ethernet449     449                                  etp57b     57
+Ethernet450     450                                  etp57c     57
+Ethernet451     451                                  etp57d     57
+Ethernet452     452                                  etp57e     57
+Ethernet453     453                                  etp57f     57
+Ethernet454     454                                  etp57g     57
+Ethernet455     455                                  etp57h     57
+Ethernet456     456                                  etp58a     58
+Ethernet457     457                                  etp58b     58
+Ethernet458     458                                  etp58c     58
+Ethernet459     459                                  etp58d     58
+Ethernet460     460                                  etp58e     58
+Ethernet461     461                                  etp58f     58
+Ethernet462     462                                  etp58g     58
+Ethernet463     463                                  etp58h     58
+Ethernet464     464                                  etp59a     59
+Ethernet465     465                                  etp59b     59
+Ethernet466     466                                  etp59c     59
+Ethernet467     467                                  etp59d     59
+Ethernet468     468                                  etp59e     59
+Ethernet469     469                                  etp59f     59
+Ethernet470     470                                  etp59g     59
+Ethernet471     471                                  etp59h     59
+Ethernet472     472                                  etp60a     60
+Ethernet473     473                                  etp60b     60
+Ethernet474     474                                  etp60c     60
+Ethernet475     475                                  etp60d     60
+Ethernet476     476                                  etp60e     60
+Ethernet477     477                                  etp60f     60
+Ethernet478     478                                  etp60g     60
+Ethernet479     479                                  etp60h     60
+Ethernet480     480                                  etp61a     61
+Ethernet481     481                                  etp61b     61
+Ethernet482     482                                  etp61c     61
+Ethernet483     483                                  etp61d     61
+Ethernet484     484                                  etp61e     61
+Ethernet485     485                                  etp61f     61
+Ethernet486     486                                  etp61g     61
+Ethernet487     487                                  etp61h     61
+Ethernet488     488                                  etp62a     62
+Ethernet489     489                                  etp62b     62
+Ethernet490     490                                  etp62c     62
+Ethernet491     491                                  etp62d     62
+Ethernet492     492                                  etp62e     62
+Ethernet493     493                                  etp62f     62
+Ethernet494     494                                  etp62g     62
+Ethernet495     495                                  etp62h     62
+Ethernet496     496                                  etp63a     63
+Ethernet497     497                                  etp63b     63
+Ethernet498     498                                  etp63c     63
+Ethernet499     499                                  etp63d     63
+Ethernet500     500                                  etp63e     63
+Ethernet501     501                                  etp63f     63
+Ethernet502     502                                  etp63g     63
+Ethernet503     503                                  etp63h     63
+Ethernet504     504                                  etp64a     64
+Ethernet505     505                                  etp64b     64
+Ethernet506     506                                  etp64c     64
+Ethernet507     507                                  etp64d     64
+Ethernet508     508                                  etp64e     64
+Ethernet509     509                                  etp64f     64
+Ethernet510     510                                  etp64g     64
+Ethernet511     511                                  etp64h     64
+Ethernet512     512                                  etp65      65
+Ethernet520     520                                  etp66      66
diff --git a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/qos.json.j2 b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/qos.json.j2
new file mode 120000
index 000000000..a49c7427d
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/qos.json.j2
@@ -0,0 +1 @@
+../../x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D48C8/qos.json.j2
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/sai.profile b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/sai.profile
new file mode 100644
index 000000000..a1d251ac1
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/sai.profile
@@ -0,0 +1 @@
+SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_5640.xml
diff --git a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/sai_5640.xml b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/sai_5640.xml
new file mode 100644
index 000000000..d111ce984
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/sai_5640.xml
@@ -0,0 +1,3637 @@
+<?xml version="1.0"?>
+
+<!--
+  Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+  Apache-2.0
+
+  Licensed under the Apache License, Version 2.0 (the "License");
+  you may not use this file except in compliance with the License.
+  You may obtain a copy of the License at
+
+  http://www.apache.org/licenses/LICENSE-2.0
+
+  Unless required by applicable law or agreed to in writing, software
+  distributed under the License is distributed on an "AS IS" BASIS,
+  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+  See the License for the specific language governing permissions and
+  limitations under the License.
+-->
+
+<root>
+    <platform_info type="5640">
+
+        <!-- Device MAC address  -->
+        <device-mac-address>00:02:03:04:05:00</device-mac-address>
+
+        <!-- ISSU enabled -->
+        <issu-enabled>0</issu-enabled>
+
+        <!-- Number of ports in the following port list -->
+        <number-of-physical-ports>512</number-of-physical-ports>
+
+        <!-- List of ports in the device -->
+        <ports-list>
+            <port-info>
+                <local-port>481</local-port>
+                <width>1</width>
+                <module>0</module>
+                <!-- 0 none, 1=2, 2=4, 3=2,4, 4=8, 7=2,4,8 -->
+                <breakout-modes>3</breakout-modes>
+                <!-- (BITMASK) 2 - 1Gb , 16 - 10Gb , 32 - 40Gb , 384 - 50Gb , 1536 - 100Gb , 4096 - 200Gb, 32768 - 400G, 262144 - 800G -->
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>483</local-port>
+                <width>1</width>
+                <module>0</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>485</local-port>
+                <width>1</width>
+                <module>0</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>487</local-port>
+                <width>1</width>
+                <module>0</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>482</local-port>
+                <width>1</width>
+                <module>0</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>484</local-port>
+                <width>1</width>
+                <module>0</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>486</local-port>
+                <width>1</width>
+                <module>0</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>488</local-port>
+                <width>1</width>
+                <module>0</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>489</local-port>
+                <width>1</width>
+                <module>1</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>490</local-port>
+                <width>1</width>
+                <module>1</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>491</local-port>
+                <width>1</width>
+                <module>1</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>492</local-port>
+                <width>1</width>
+                <module>1</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>493</local-port>
+                <width>1</width>
+                <module>1</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>494</local-port>
+                <width>1</width>
+                <module>1</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>495</local-port>
+                <width>1</width>
+                <module>1</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>496</local-port>
+                <width>1</width>
+                <module>1</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>505</local-port>
+                <width>1</width>
+                <module>2</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>506</local-port>
+                <width>1</width>
+                <module>2</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>507</local-port>
+                <width>1</width>
+                <module>2</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>508</local-port>
+                <width>1</width>
+                <module>2</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>509</local-port>
+                <width>1</width>
+                <module>2</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>510</local-port>
+                <width>1</width>
+                <module>2</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>511</local-port>
+                <width>1</width>
+                <module>2</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>512</local-port>
+                <width>1</width>
+                <module>2</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>497</local-port>
+                <width>1</width>
+                <module>3</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>498</local-port>
+                <width>1</width>
+                <module>3</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>499</local-port>
+                <width>1</width>
+                <module>3</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>500</local-port>
+                <width>1</width>
+                <module>3</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>501</local-port>
+                <width>1</width>
+                <module>3</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>502</local-port>
+                <width>1</width>
+                <module>3</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>503</local-port>
+                <width>1</width>
+                <module>3</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>504</local-port>
+                <width>1</width>
+                <module>3</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>449</local-port>
+                <width>1</width>
+                <module>4</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>450</local-port>
+                <width>1</width>
+                <module>4</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>451</local-port>
+                <width>1</width>
+                <module>4</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>452</local-port>
+                <width>1</width>
+                <module>4</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>453</local-port>
+                <width>1</width>
+                <module>4</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>454</local-port>
+                <width>1</width>
+                <module>4</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>455</local-port>
+                <width>1</width>
+                <module>4</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>456</local-port>
+                <width>1</width>
+                <module>4</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>457</local-port>
+                <width>1</width>
+                <module>5</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>458</local-port>
+                <width>1</width>
+                <module>5</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>459</local-port>
+                <width>1</width>
+                <module>5</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>460</local-port>
+                <width>1</width>
+                <module>5</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>461</local-port>
+                <width>1</width>
+                <module>5</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>462</local-port>
+                <width>1</width>
+                <module>5</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>463</local-port>
+                <width>1</width>
+                <module>5</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>464</local-port>
+                <width>1</width>
+                <module>5</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>473</local-port>
+                <width>1</width>
+                <module>6</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>474</local-port>
+                <width>1</width>
+                <module>6</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>475</local-port>
+                <width>1</width>
+                <module>6</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>476</local-port>
+                <width>1</width>
+                <module>6</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>477</local-port>
+                <width>1</width>
+                <module>6</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>478</local-port>
+                <width>1</width>
+                <module>6</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>479</local-port>
+                <width>1</width>
+                <module>6</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>480</local-port>
+                <width>1</width>
+                <module>6</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>465</local-port>
+                <width>1</width>
+                <module>7</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>466</local-port>
+                <width>1</width>
+                <module>7</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>467</local-port>
+                <width>1</width>
+                <module>7</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>468</local-port>
+                <width>1</width>
+                <module>7</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>469</local-port>
+                <width>1</width>
+                <module>7</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>470</local-port>
+                <width>1</width>
+                <module>7</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>471</local-port>
+                <width>1</width>
+                <module>7</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>472</local-port>
+                <width>1</width>
+                <module>7</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>417</local-port>
+                <width>1</width>
+                <module>8</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>418</local-port>
+                <width>1</width>
+                <module>8</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>419</local-port>
+                <width>1</width>
+                <module>8</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>420</local-port>
+                <width>1</width>
+                <module>8</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>421</local-port>
+                <width>1</width>
+                <module>8</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>422</local-port>
+                <width>1</width>
+                <module>8</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>423</local-port>
+                <width>1</width>
+                <module>8</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>424</local-port>
+                <width>1</width>
+                <module>8</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>425</local-port>
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+                <local-port>164</local-port>
+                <width>1</width>
+                <module>55</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>165</local-port>
+                <width>1</width>
+                <module>55</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>166</local-port>
+                <width>1</width>
+                <module>55</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>167</local-port>
+                <width>1</width>
+                <module>55</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>168</local-port>
+                <width>1</width>
+                <module>55</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>209</local-port>
+                <width>1</width>
+                <module>56</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>210</local-port>
+                <width>1</width>
+                <module>56</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>211</local-port>
+                <width>1</width>
+                <module>56</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>212</local-port>
+                <width>1</width>
+                <module>56</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>213</local-port>
+                <width>1</width>
+                <module>56</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>214</local-port>
+                <width>1</width>
+                <module>56</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>215</local-port>
+                <width>1</width>
+                <module>56</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>216</local-port>
+                <width>1</width>
+                <module>56</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>217</local-port>
+                <width>1</width>
+                <module>57</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>218</local-port>
+                <width>1</width>
+                <module>57</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>219</local-port>
+                <width>1</width>
+                <module>57</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>220</local-port>
+                <width>1</width>
+                <module>57</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>221</local-port>
+                <width>1</width>
+                <module>57</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>222</local-port>
+                <width>1</width>
+                <module>57</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>223</local-port>
+                <width>1</width>
+                <module>57</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>224</local-port>
+                <width>1</width>
+                <module>57</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>201</local-port>
+                <width>1</width>
+                <module>58</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>202</local-port>
+                <width>1</width>
+                <module>58</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>203</local-port>
+                <width>1</width>
+                <module>58</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>204</local-port>
+                <width>1</width>
+                <module>58</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>205</local-port>
+                <width>1</width>
+                <module>58</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>206</local-port>
+                <width>1</width>
+                <module>58</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>207</local-port>
+                <width>1</width>
+                <module>58</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>208</local-port>
+                <width>1</width>
+                <module>58</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>193</local-port>
+                <width>1</width>
+                <module>59</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>194</local-port>
+                <width>1</width>
+                <module>59</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>195</local-port>
+                <width>1</width>
+                <module>59</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>196</local-port>
+                <width>1</width>
+                <module>59</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>197</local-port>
+                <width>1</width>
+                <module>59</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>198</local-port>
+                <width>1</width>
+                <module>59</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>199</local-port>
+                <width>1</width>
+                <module>59</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>200</local-port>
+                <width>1</width>
+                <module>59</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>241</local-port>
+                <width>1</width>
+                <module>60</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>242</local-port>
+                <width>1</width>
+                <module>60</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>243</local-port>
+                <width>1</width>
+                <module>60</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>244</local-port>
+                <width>1</width>
+                <module>60</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>245</local-port>
+                <width>1</width>
+                <module>60</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>246</local-port>
+                <width>1</width>
+                <module>60</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>247</local-port>
+                <width>1</width>
+                <module>60</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>248</local-port>
+                <width>1</width>
+                <module>60</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>249</local-port>
+                <width>1</width>
+                <module>61</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>250</local-port>
+                <width>1</width>
+                <module>61</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>251</local-port>
+                <width>1</width>
+                <module>61</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>252</local-port>
+                <width>1</width>
+                <module>61</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>253</local-port>
+                <width>1</width>
+                <module>61</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>254</local-port>
+                <width>1</width>
+                <module>61</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>255</local-port>
+                <width>1</width>
+                <module>61</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>255</local-port>
+                <width>1</width>
+                <module>61</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>233</local-port>
+                <width>1</width>
+                <module>62</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>234</local-port>
+                <width>1</width>
+                <module>62</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>235</local-port>
+                <width>1</width>
+                <module>62</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>236</local-port>
+                <width>1</width>
+                <module>62</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>237</local-port>
+                <width>1</width>
+                <module>62</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>238</local-port>
+                <width>1</width>
+                <module>62</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>239</local-port>
+                <width>1</width>
+                <module>62</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>240</local-port>
+                <width>1</width>
+                <module>62</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>225</local-port>
+                <width>1</width>
+                <module>63</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>226</local-port>
+                <width>1</width>
+                <module>63</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>227</local-port>
+                <width>1</width>
+                <module>63</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>228</local-port>
+                <width>1</width>
+                <module>63</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>229</local-port>
+                <width>1</width>
+                <module>63</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>230</local-port>
+                <width>1</width>
+                <module>63</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>231</local-port>
+                <width>1</width>
+                <module>63</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>232</local-port>
+                <width>1</width>
+                <module>63</module>
+                <breakout-modes>3</breakout-modes>
+                <port-speed>1536</port-speed>
+            </port-info>
+            <!--<port-info>
+                <local-port>512</local-port>
+                <width>1</width>
+                <module>64</module>
+                <breakout-modes>0</breakout-modes>
+                <port-speed>64</port-speed>
+            </port-info>
+            <port-info>
+                <local-port>514</local-port>
+                <width>1</width>
+                <module>65</module>
+                <breakout-modes>0</breakout-modes>
+                <port-speed>64</port-speed>
+            </port-info>-->
+        </ports-list>
+    </platform_info>
+</root>
+
diff --git a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/default_sku b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/default_sku
new file mode 100644
index 000000000..2d1695dc3
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/default_sku
@@ -0,0 +1 @@
+ACS-SN5640 t1
diff --git a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/platform.json b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/platform.json
new file mode 100644
index 000000000..d866c6a23
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/platform.json
@@ -0,0 +1,1297 @@
+{
+    "chassis": {
+        "name": "SN5600_SIMX",
+        "components": [
+            {
+                "name": "ONIE"
+            },
+            {
+                "name": "SSD"
+            },
+            {
+                "name": "BIOS"
+            },
+            {
+                "name": "CPLD1"
+            },
+            {
+                "name": "CPLD2"
+            },
+            {
+                "name": "CPLD3"
+            },
+            {
+                "name": "CPLD4"
+            },
+            {
+                "name": "CPLD5"
+            },
+            {
+                "name": "CPLD6"
+            }
+        ],
+        "fans": [],
+        "fan_drawers": [
+            {
+                "name": "drawer1",
+                "fans": [
+                    {
+                        "name": "fan1"
+                    }
+                ]
+            },
+            {
+                "name": "drawer2",
+                "fans": [
+                    {
+                        "name": "fan2"
+                    }
+                ]
+            },
+            {
+                "name": "drawer3",
+                "fans": [
+                    {
+                        "name": "fan3"
+                    }
+                ]
+            },
+            {
+                "name": "drawer4",
+                "fans": [
+                    {
+                        "name": "fan4"
+                    }
+                ]
+            }
+        ],
+        "psus": [
+            {
+                "name": "PSU 1",
+                "fans": [
+                    {
+                        "name": "psu1_fan1"
+                    }
+                ],
+                "thermals": [
+                    {
+                        "name": "PSU-1 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "PSU 2",
+                "fans": [
+                    {
+                        "name": "psu2_fan1"
+                    }
+                ],
+                "thermals": [
+                    {
+                        "name": "PSU-2 Temp"
+                    }
+                ]
+            }
+        ],
+        "thermals": [
+            {
+                "name": "ASIC"
+            },
+            {
+                "name": "Ambient COMEX Temp"
+            },
+            {
+                "name": "Ambient Fan Side Temp"
+            },
+            {
+                "name": "Ambient Port Side Temp"
+            },
+            {
+                "name": "CPU Core 0 Temp"
+            },
+            {
+                "name": "CPU Core 1 Temp"
+            },
+            {
+                "name": "CPU Core 2 Temp"
+            },
+            {
+                "name": "CPU Core 3 Temp"
+            },
+            {
+                "name": "CPU Pack Temp"
+            }
+        ],
+        "sfps": [
+            {
+                "name": "sfp1",
+                "thermals": [
+                    {
+                        "name": "xSFP module 1 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp2",
+                "thermals": [
+                    {
+                        "name": "xSFP module 2 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp3",
+                "thermals": [
+                    {
+                        "name": "xSFP module 3 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp4",
+                "thermals": [
+                    {
+                        "name": "xSFP module 4 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp5",
+                "thermals": [
+                    {
+                        "name": "xSFP module 5 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp6",
+                "thermals": [
+                    {
+                        "name": "xSFP module 6 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp7",
+                "thermals": [
+                    {
+                        "name": "xSFP module 7 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp8",
+                "thermals": [
+                    {
+                        "name": "xSFP module 8 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp9",
+                "thermals": [
+                    {
+                        "name": "xSFP module 9 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp10",
+                "thermals": [
+                    {
+                        "name": "xSFP module 10 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp11",
+                "thermals": [
+                    {
+                        "name": "xSFP module 11 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp12",
+                "thermals": [
+                    {
+                        "name": "xSFP module 12 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp13",
+                "thermals": [
+                    {
+                        "name": "xSFP module 13 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp14",
+                "thermals": [
+                    {
+                        "name": "xSFP module 14 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp15",
+                "thermals": [
+                    {
+                        "name": "xSFP module 15 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp16",
+                "thermals": [
+                    {
+                        "name": "xSFP module 16 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp17",
+                "thermals": [
+                    {
+                        "name": "xSFP module 17 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp18",
+                "thermals": [
+                    {
+                        "name": "xSFP module 18 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp19",
+                "thermals": [
+                    {
+                        "name": "xSFP module 19 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp20",
+                "thermals": [
+                    {
+                        "name": "xSFP module 20 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp21",
+                "thermals": [
+                    {
+                        "name": "xSFP module 21 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp22",
+                "thermals": [
+                    {
+                        "name": "xSFP module 22 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp23",
+                "thermals": [
+                    {
+                        "name": "xSFP module 23 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp24",
+                "thermals": [
+                    {
+                        "name": "xSFP module 24 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp25",
+                "thermals": [
+                    {
+                        "name": "xSFP module 25 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp26",
+                "thermals": [
+                    {
+                        "name": "xSFP module 26 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp27",
+                "thermals": [
+                    {
+                        "name": "xSFP module 27 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp28",
+                "thermals": [
+                    {
+                        "name": "xSFP module 28 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp29",
+                "thermals": [
+                    {
+                        "name": "xSFP module 29 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp30",
+                "thermals": [
+                    {
+                        "name": "xSFP module 30 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp31",
+                "thermals": [
+                    {
+                        "name": "xSFP module 31 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp32",
+                "thermals": [
+                    {
+                        "name": "xSFP module 32 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp33",
+                "thermals": [
+                    {
+                        "name": "xSFP module 33 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp34",
+                "thermals": [
+                    {
+                        "name": "xSFP module 34 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp35",
+                "thermals": [
+                    {
+                        "name": "xSFP module 35 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp36",
+                "thermals": [
+                    {
+                        "name": "xSFP module 36 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp37",
+                "thermals": [
+                    {
+                        "name": "xSFP module 37 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp38",
+                "thermals": [
+                    {
+                        "name": "xSFP module 38 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp39",
+                "thermals": [
+                    {
+                        "name": "xSFP module 39 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp40",
+                "thermals": [
+                    {
+                        "name": "xSFP module 40 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp41",
+                "thermals": [
+                    {
+                        "name": "xSFP module 41 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp42",
+                "thermals": [
+                    {
+                        "name": "xSFP module 42 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp43",
+                "thermals": [
+                    {
+                        "name": "xSFP module 43 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp44",
+                "thermals": [
+                    {
+                        "name": "xSFP module 44 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp45",
+                "thermals": [
+                    {
+                        "name": "xSFP module 45 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp46",
+                "thermals": [
+                    {
+                        "name": "xSFP module 46 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp47",
+                "thermals": [
+                    {
+                        "name": "xSFP module 47 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp48",
+                "thermals": [
+                    {
+                        "name": "xSFP module 48 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp49",
+                "thermals": [
+                    {
+                        "name": "xSFP module 49 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp50",
+                "thermals": [
+                    {
+                        "name": "xSFP module 50 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp51",
+                "thermals": [
+                    {
+                        "name": "xSFP module 51 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp52",
+                "thermals": [
+                    {
+                        "name": "xSFP module 52 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp53",
+                "thermals": [
+                    {
+                        "name": "xSFP module 53 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp54",
+                "thermals": [
+                    {
+                        "name": "xSFP module 54 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp55",
+                "thermals": [
+                    {
+                        "name": "xSFP module 55 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp56",
+                "thermals": [
+                    {
+                        "name": "xSFP module 56 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp57",
+                "thermals": [
+                    {
+                        "name": "xSFP module 57 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp58",
+                "thermals": [
+                    {
+                        "name": "xSFP module 58 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp59",
+                "thermals": [
+                    {
+                        "name": "xSFP module 59 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp60",
+                "thermals": [
+                    {
+                        "name": "xSFP module 60 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp61",
+                "thermals": [
+                    {
+                        "name": "xSFP module 61 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp62",
+                "thermals": [
+                    {
+                        "name": "xSFP module 62 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp63",
+                "thermals": [
+                    {
+                        "name": "xSFP module 63 Temp"
+                    }
+                ]
+            },
+            {
+                "name": "sfp64",
+                "thermals": [
+                    {
+                        "name": "xSFP module 64 Temp"
+                    }
+                ]
+            }
+        ]
+    },
+    "interfaces": {
+        "Ethernet0": {
+            "index": "1,1,1,1,1,1,1,1",
+            "lanes": "0,1,2,3,4,5,6,7,",
+            "breakout_modes": {
+                "1x400G": ["etp1"],
+                "2x400G[200G]": ["etp1a", "etp1b"],
+                "4x200G[100G]": ["etp1a", "etp1b", "etp1c", "etp1d"],
+                "8x100G[50G]": ["etp1a", "etp1b", "etp1c", "etp1d", "etp1e", "etp1f", "etp1g", "etp1h"]
+            }
+        },
+        "Ethernet8": {
+            "index": "2,2,2,2,2,2,2,2",
+            "lanes": "8,9,10,11,12,13,14,15,",
+            "breakout_modes": {
+                "1x400G": ["etp2"],
+                "2x400G[200G]": ["etp2a", "etp2b"],
+                "4x200G[100G]": ["etp2a", "etp2b", "etp2c", "etp2d"],
+                "8x100G[50G]": ["etp2a", "etp2b", "etp2c", "etp2d", "etp2e", "etp2f", "etp2g","etp2h"]
+            }
+        },
+        "Ethernet16": {
+            "index": "3,3,3,3,3,3,3,3",
+            "lanes": "16,17,18,19,20,21,22,23,",
+            "breakout_modes": {
+                "1x400G": ["etp3"],
+                "2x400G[200G]": ["etp3a", "etp3b"],
+                "4x200G[100G]": ["etp3a", "etp3b", "etp3c", "etp3d"],
+                "8x100G[50G]": ["etp3a", "etp3b", "etp3c", "etp3d", "etp3e", "etp3f", "etp3g", "etp3h"]
+            }
+        },
+        "Ethernet24": {
+            "index": "4,4,4,4,4,4,4,4",
+            "lanes": "24,25,26,27,28,29,30,31,",
+            "breakout_modes": {
+                "1x400G": ["etp4"],
+                "2x400G[200G]": ["etp4a", "etp4b"],
+                "4x200G[100G]": ["etp4a", "etp4b", "etp4c", "etp4d"],
+                "8x100G[50G]": ["etp4a", "etp4b", "etp4c", "etp4d", "etp4e", "etp4f", "etp4g", "etp4h"]
+            }
+        },
+        "Ethernet32": {
+            "index": "5,5,5,5,5,5,5,5",
+            "lanes": "32,33,34,35,36,37,38,39,",
+            "breakout_modes": {
+                "1x400G": ["etp5"],
+                "2x400G[200G]": ["etp5a", "etp5b"],
+                "4x200G[100G]": ["etp5a", "etp5b", "etp5c", "etp5d"],
+                "8x100G[50G]": ["etp5a", "etp5b", "etp5c", "etp5d", "etp5e", "etp5f", "etp5g", "etp5h"]
+            }
+        },
+        "Ethernet40": {
+            "index": "6,6,6,6,6,6,6,6",
+            "lanes": "40,41,42,43,44,45,46,47,",
+            "breakout_modes": {
+                "1x400G": ["etp6"],
+                "2x400G[200G]": ["etp6a", "etp6b"],
+                "4x200G[100G]": ["etp6a", "etp6b", "etp6c", "etp6d"],
+                "8x100G[50G]": ["etp6a", "etp6b", "etp6c", "etp6d", "etp6e", "etp6f", "etp6g", "etp6h"]
+            }
+        },
+        "Ethernet48": {
+            "index": "7,7,7,7,7,7,7,7",
+            "lanes": "48,49,50,51,52,53,54,55,",
+            "breakout_modes": {
+                "1x400G": ["etp7"],
+                "2x400G[200G]": ["etp7a", "etp7b"],
+                "4x200G[100G]": ["etp7a", "etp7b", "etp7c", "etp7d"],
+                "8x100G[50G]": ["etp7a", "etp7b", "etp7c", "etp7d", "etp7e", "etp7f", "etp7g", "etp7h"]
+            }
+        },
+        "Ethernet56": {
+            "index": "8,8,8,8,8,8,8,8",
+            "lanes": "56,57,58,59,60,61,62,63,",
+            "breakout_modes": {
+                "1x400G": ["etp8"],
+                "2x400G[200G]": ["etp8a", "etp8b"],
+                "4x200G[100G]": ["etp8a", "etp8b", "etp8c", "etp8d"],
+                "8x100G[50G]": ["etp8a", "etp8b", "etp8c", "etp8d", "etp8e", "etp8f",  "etp8g", "etp8h"]
+            }
+        },
+        "Ethernet64": {
+            "index": "9,9,9,9,9,9,9,9",
+            "lanes": "64,65,66,67,68,69,70,71,",
+            "breakout_modes": {
+                "1x400G": ["etp9"],
+                "2x400G[200G]": ["etp9a", "etp9b"],
+                "4x200G[100G]": ["etp9a", "etp9b", "etp9c", "etp9d"],
+                "8x100G[50G]": ["etp9a", "etp9b", "etp9c", "etp9d", "etp9e", "etp9f", "etp9g", "etp9h"]
+            }
+        },
+        "Ethernet72": {
+            "index": "10,10,10,10,10,10,10,10",
+            "lanes": "72,73,74,75,76,77,78,79,",
+            "breakout_modes": {
+                "1x400G": ["etp10"],
+                "2x400G[200G]": ["etp10a", "etp10b"],
+                "4x200G[100G]": ["etp10a", "etp10b", "etp10c", "etp10d"],
+                "8x100G[50G]": ["etp10a", "etp10b", "etp10c", "etp10d", "etp10e", "etp10f", "etp10g", "etp10h"]
+            }
+        },
+        "Ethernet80": {
+            "index": "11,11,11,11,11,11,11,11",
+            "lanes": "80,81,82,83,84,85,86,87,",
+            "breakout_modes": {
+                "1x400G": ["etp11"],
+                "2x400G[200G]": ["etp11a", "etp11b"],
+                "4x200G[100G]": ["etp11a", "etp11b", "etp11c", "etp11d"],
+                "8x100G[50G]": ["etp11a", "etp11b", "etp11c", "etp11d", "etp11e", "etp11f", "etp11g", "etp11h"]
+            }
+        },
+        "Ethernet88": {
+            "index": "12,12,12,12,12,12,12,12",
+            "lanes": "88,89,90,91,92,93,94,95,",
+            "breakout_modes": {
+                "1x400G": ["etp12"],
+                "2x400G[200G]": ["etp12a", "etp12b"],
+                "4x200G[100G]": ["etp12a", "etp12b", "etp12c", "etp12d"],
+                "8x100G[50G]": ["etp12a", "etp12b", "etp12c", "etp12d", "etp12e", "etp12f", "etp12g", "etp12h"]
+            }
+        },
+        "Ethernet96": {
+            "index": "13,13,13,13,13,13,13,13",
+            "lanes": "96,97,98,99,100,101,102,103,",
+            "breakout_modes": {
+                "1x400G": ["etp13"],
+                "2x400G[200G]": ["etp13a", "etp13b"],
+                "4x200G[100G]": ["etp13a", "etp13b", "etp13c", "etp13d"],
+                "8x100G[50G]": ["etp13a", "etp13b", "etp13c", "etp13d", "etp13e", "etp13f", "etp13g", "etp13h"]
+            }
+        },
+        "Ethernet104": {
+            "index": "14,14,14,14,14,14,14,14",
+            "lanes": "104,105,106,107,108,109,110,111,",
+            "breakout_modes": {
+                "1x400G": ["etp14"],
+                "2x400G[200G]": ["etp14a", "etp14b"],
+                "4x200G[100G]": ["etp14a", "etp14b", "etp14c", "etp14d"],
+                "8x100G[50G]": ["etp14a", "etp14b", "etp14c", "etp14d", "etp14e", "etp14f", "etp14g", "etp14h"]
+            }
+        },
+        "Ethernet112": {
+            "index": "15,15,15,15,15,15,15,15",
+            "lanes": "112,113,114,115,116,117,118,119,",
+            "breakout_modes": {
+                "1x400G": ["etp15"],
+                "2x400G[200G]": ["etp15a", "etp15b"],
+                "4x200G[100G]": ["etp15a", "etp15b", "etp15c", "etp15d"],
+                "8x100G[50G]": ["etp15a", "etp15b", "etp15c", "etp15d", "etp15e", "etp15f", "etp15g", "etp15h"]
+            }
+        },
+        "Ethernet120": {
+            "index": "16,16,16,16,16,16,16,16",
+            "lanes": "120,121,122,123,124,125,126,127,",
+            "breakout_modes": {
+                "1x400G": ["etp16"],
+                "2x400G[200G]": ["etp16a", "etp16b"],
+                "4x200G[100G]": ["etp16a", "etp16b", "etp16c", "etp16d"],
+                "8x100G[50G]": ["etp16a", "etp16b", "etp16c", "etp16d", "etp16e", "etp16f", "etp16g", "etp16h"]
+            }
+        },
+        "Ethernet128": {
+            "index": "17,17,17,17,17,17,17,17",
+            "lanes": "128,129,130,131,132,133,134,135,",
+            "breakout_modes": {
+                "1x400G": ["etp17"],
+                "2x400G[200G]": ["etp17a", "etp17b"],
+                "4x200G[100G]": ["etp17a", "etp17b", "etp17c", "etp17d"],
+                "8x100G[50G]": ["etp17a", "etp17b", "etp17c", "etp17d", "etp17e", "etp17f", "etp17g", "etp17h"]
+            }
+        },
+        "Ethernet136": {
+            "index": "18,18,18,18,18,18,18,18",
+            "lanes": "136,137,138,139,140,141,142,143,",
+            "breakout_modes": {
+                "1x400G": ["etp18"],
+                "2x400G[200G]": ["etp18a", "etp18b"],
+                "4x200G[100G]": ["etp18a", "etp18b", "etp18c", "etp18d"],
+                "8x100G[50G]": ["etp18a", "etp18b", "etp18c", "etp18d", "etp18e", "etp18f", "etp18g", "etp18h"]
+            }
+        },
+        "Ethernet144": {
+            "index": "19,19,19,19,19,19,19,19",
+            "lanes": "144,145,146,147,148,149,150,151,",
+            "breakout_modes": {
+                "1x400G": ["etp19"],
+                "2x400G[200G]": ["etp19a", "etp19b"],
+                "4x200G[100G]": ["etp19a", "etp19b", "etp19c", "etp19d"],
+                "8x100G[50G]": ["etp19a", "etp19b", "etp19c", "etp19d", "etp19e", "etp19f", "etp19g", "etp19h"]
+            }
+        },
+        "Ethernet152": {
+            "index": "20,20,20,20,20,20,20,20",
+            "lanes": "152,153,154,155,156,157,158,159,",
+            "breakout_modes": {
+                "1x400G": ["etp20"],
+                "2x400G[200G]": ["etp20a", "etp20b"],
+                "4x200G[100G]": ["etp20a", "etp20b", "etp20c", "etp20d"],
+                "8x100G[50G]": ["etp20a", "etp20b", "etp20c", "etp20d", "etp20e", "etp20f", "etp20g", "etp20h"]
+            }
+        },
+        "Ethernet160": {
+            "index": "21,21,21,21,21,21,21,21",
+            "lanes": "160,161,162,163,164,165,166,167,",
+            "breakout_modes": {
+                "1x400G": ["etp21"],
+                "2x400G[200G]": ["etp21a", "etp21b"],
+                "4x200G[100G]": ["etp21a", "etp21b", "etp21c", "etp21d"],
+                "8x100G[50G]": ["etp21a", "etp21b", "etp21c", "etp21d", "etp21e", "etp21f", "etp21g", "etp21h"]
+            }
+        },
+        "Ethernet168": {
+            "index": "22,22,22,22,22,22,22,22",
+            "lanes": "168,169,170,171,172,173,174,175,",
+            "breakout_modes": {
+                "1x400G": ["etp22"],
+                "2x400G[200G]": ["etp22a", "etp22b"],
+                "4x200G[100G]": ["etp22a", "etp22b", "etp22c", "etp22d"],
+                "8x100G[50G]": ["etp22a", "etp22b", "etp22c", "etp22d", "etp22e", "etp22f", "etp22g", "etp22h"]
+            }
+        },
+        "Ethernet176": {
+            "index": "23,23,23,23,23,23,23,23",
+            "lanes": "176,177,178,179,180,181,182,183,",
+            "breakout_modes": {
+                "1x400G": ["etp23"],
+                "2x400G[200G]": ["etp23a", "etp23b"],
+                "4x200G[100G]": ["etp23a", "etp23b", "etp23c", "etp23d"],
+                "8x100G[50G]": ["etp23a", "etp23b", "etp23c", "etp23d", "etp23e", "etp23f", "etp23g", "etp23h"]
+            }
+        },
+        "Ethernet184": {
+            "index": "24,24,24,24,24,24,24,24",
+            "lanes": "184,185,186,187,188,189,190,191,",
+            "breakout_modes": {
+                "1x400G": ["etp24"],
+                "2x400G[200G]": ["etp24a", "etp24b"],
+                "4x200G[100G]": ["etp24a", "etp24b", "etp24c", "etp24d"],
+                "8x100G[50G]": ["etp24a", "etp24b", "etp24c", "etp24d", "etp24e", "etp24f", "etp24g", "etp24h"]
+            }
+        },
+        "Ethernet192": {
+            "index": "25,25,25,25,25,25,25,25",
+            "lanes": "192,193,194,195,196,197,198,199,",
+            "breakout_modes": {
+                "1x400G": ["etp25"],
+                "2x400G[200G]": ["etp25a", "etp25b"],
+                "4x200G[100G]": ["etp25a", "etp25b", "etp25c", "etp25d"],
+                "8x100G[50G]": ["etp25a", "etp25b", "etp25c", "etp25d", "etp25e", "etp25f", "etp25g", "etp25h"]
+            }
+        },
+        "Ethernet200": {
+            "index": "26,26,26,26,26,26,26,26",
+            "lanes": "200,201,202,203,204,205,206,207,",
+            "breakout_modes": {
+                "1x400G": ["etp26"],
+                "2x400G[200G]": ["etp26a", "etp26b"],
+                "4x200G[100G]": ["etp26a", "etp26b", "etp26c", "etp26d"],
+                "8x100G[50G]": ["etp26a", "etp26b", "etp26c", "etp26d", "etp26e", "etp26f", "etp26g", "etp26h"]
+            }
+        },
+        "Ethernet208": {
+            "index": "27,27,27,27,27,27,27,27",
+            "lanes": "208,209,210,211,212,213,214,215,",
+            "breakout_modes": {
+                "1x400G": ["etp27"],
+                "2x400G[200G]": ["etp27a", "etp27b"],
+                "4x200G[100G]": ["etp27a", "etp27b", "etp27c", "etp27d"],
+                "8x100G[50G]": ["etp27a", "etp27b", "etp27c", "etp27d", "etp27e", "etp27f", "etp27g", "etp27h"]
+            }
+        },
+        "Ethernet216": {
+            "index": "28,28,28,28,28,28,28,28",
+            "lanes": "216,217,218,219,220,221,222,223,",
+            "breakout_modes": {
+                "1x400G": ["etp28"],
+                "2x400G[200G]": ["etp28a", "etp28b"],
+                "4x200G[100G]": ["etp28a", "etp28b", "etp28c", "etp28d"],
+                "8x100G[50G]": ["etp28a", "etp28b", "etp28c", "etp28d", "etp28e", "etp28f", "etp28g", "etp28h"]
+            }
+        },
+        "Ethernet224": {
+            "index": "29,29,29,29,29,29,29,29",
+            "lanes": "224,225,226,227,228,229,230,231,",
+            "breakout_modes": {
+                "1x400G": ["etp29"],
+                "2x400G[200G]": ["etp29a", "etp29b"],
+                "4x200G[100G]": ["etp29a", "etp29b", "etp29c", "etp29d"],
+                "8x100G[50G]": ["etp29a", "etp29b", "etp29c", "etp29d", "etp29e", "etp29f", "etp29g", "etp29h"]
+            }
+        },
+        "Ethernet232": {
+            "index": "30,30,30,30,30,30,30,30",
+            "lanes": "232,233,234,235,236,237,238,239,",
+            "breakout_modes": {
+                "1x400G": ["etp30"],
+                "2x400G[200G]": ["etp30a", "etp30b"],
+                "4x200G[100G]": ["etp30a", "etp30b", "etp30c", "etp30d"],
+                "8x100G[50G]": ["etp30a", "etp30b", "etp30c", "etp30d", "etp30e", "etp30f", "etp30g", "etp30h"]
+            }
+        },
+        "Ethernet240": {
+            "index": "31,31,31,31,31,31,31,31",
+            "lanes": "240,241,242,243,244,245,246,247,",
+            "breakout_modes": {
+                "1x400G": ["etp31"],
+                "2x400G[200G]": ["etp31a", "etp31b"],
+                "4x200G[100G]": ["etp31a", "etp31b", "etp31c", "etp31d"],
+                "8x100G[50G]": ["etp31a", "etp31b", "etp31c", "etp31d", "etp31e", "etp31f", "etp31g", "etp31h"]
+            }
+        },
+        "Ethernet248": {
+            "index": "32,32,32,32,32,32,32,32",
+            "lanes": "248,249,250,251,252,253,254,255,",
+            "breakout_modes": {
+                "1x400G": ["etp32"],
+                "2x400G[200G]": ["etp32a", "etp32b"],
+                "4x200G[100G]": ["etp32a", "etp32b", "etp32c", "etp32d"],
+                "8x100G[50G]": ["etp32a", "etp32b", "etp32c", "etp32d", "etp32e", "etp32f", "etp32g", "etp32h"]
+            }
+        },
+        "Ethernet256": {
+            "index": "33,33,33,33,33,33,33,33",
+            "lanes": "256,257,258,259,260,261,262,263,",
+            "breakout_modes": {
+                "1x400G": ["etp33"],
+                "2x400G[200G]": ["etp33a", "etp33b"],
+                "4x200G[100G]": ["etp33a", "etp33b", "etp33c", "etp33d"],
+                "8x100G[50G]": ["etp33a", "etp33b", "etp33c", "etp33d", "etp33e", "etp33f",  "etp33g", "etp33h"]
+            }
+        },
+        "Ethernet264": {
+            "index": "34,34,34,34,34,34,34,34",
+            "lanes": "264,265,266,267,268,269,270,271,",
+            "breakout_modes": {
+                "1x400G": ["etp34"],
+                "2x400G[200G]": ["etp34a", "etp34b"],
+                "4x200G[100G]": ["etp34a", "etp34b", "etp34c", "etp34d"],
+                "8x100G[50G]": ["etp34a", "etp34b", "etp34c", "etp34d", "etp34e", "etp34f", "etp34g", "etp34h"]
+            }
+        },
+        "Ethernet272": {
+            "index": "35,35,35,35,35,35,35,35",
+            "lanes": "272,273,274,275,276,277,278,279,",
+            "breakout_modes": {
+                "1x400G": ["etp35"],
+                "2x400G[200G]": ["etp35a", "etp35b"],
+                "4x200G[100G]": ["etp35a", "etp35b", "etp35c", "etp35d"],
+                "8x100G[50G]": ["etp35a", "etp35b", "etp35c", "etp35d", "etp35e", "etp35f", "etp35g", "etp35h"]
+            }
+        },
+        "Ethernet280": {
+            "index": "36,36,36,36,36,36,36,36",
+            "lanes": "280,281,282,283,284,285,286,287,",
+            "breakout_modes": {
+                "1x400G": ["etp36"],
+                "2x400G[200G]": ["etp36a", "etp36b"],
+                "4x200G[100G]": ["etp36a", "etp36b", "etp36c", "etp36d"],
+                "8x100G[50G]": ["etp36a", "etp36b", "etp36c", "etp36d", "etp36e", "etp36f", "etp36g", "etp36h"]
+            }
+        },
+        "Ethernet288": {
+            "index": "37,37,37,37,37,37,37,37",
+            "lanes": "288,289,290,291,292,293,294,295,",
+            "breakout_modes": {
+                "1x400G": ["etp37"],
+                "2x400G[200G]": ["etp37a", "etp37b"],
+                "4x200G[100G]": ["etp37a", "etp37b", "etp37c", "etp37d"],
+                "8x100G[50G]": ["etp37a", "etp37b", "etp37c", "etp37d", "etp37e", "etp37f", "etp37g", "etp37h"]
+            }
+        },
+        "Ethernet296": {
+            "index": "38,38,38,38,38,38,38,38",
+            "lanes": "296,297,298,299,300,301,302,303,",
+            "breakout_modes": {
+                "1x400G": ["etp38"],
+                "2x400G[200G]": ["etp38a", "etp38b"],
+                "4x200G[100G]": ["etp38a", "etp38b", "etp38c", "etp38d"],
+                "8x100G[50G]": ["etp38a", "etp38b", "etp38c", "etp38d", "etp38e", "etp38f", "etp38g", "etp38h"]
+            }
+        },
+        "Ethernet304": {
+            "index": "39,39,39,39,39,39,39,39",
+            "lanes": "304,305,306,307,308,309,310,311,",
+            "breakout_modes": {
+                "1x400G": ["etp39"],
+                "2x400G[200G]": ["etp39a", "etp39b"],
+                "4x200G[100G]": ["etp39a", "etp39b", "etp39c", "etp39d" ],
+                "8x100G[50G]": ["etp39a", "etp39b", "etp39c", "etp39d", "etp39e", "etp39f", "etp39g", "etp39h"]
+            }
+        },
+        "Ethernet312": {
+            "index": "40,40,40,40,40,40,40,40",
+            "lanes": "312,313,314,315,316,317,318,319,",
+            "breakout_modes": {
+                "1x400G": ["etp40"],
+                "2x400G[200G]": ["etp40a", "etp40b"],
+                "4x200G[100G]": ["etp40a", "etp40b", "etp40c", "etp40d"],
+                "8x100G[50G]": ["etp40a", "etp40b", "etp40c", "etp40d", "etp40e", "etp40f", "etp40g", "etp40h"]
+            }
+        },
+        "Ethernet320": {
+            "index": "41,41,41,41,41,41,41,41",
+            "lanes": "320,321,322,323,324,325,326,327,",
+            "breakout_modes": {
+                "1x400G": ["etp41"],
+                "2x400G[200G]": ["etp41a", "etp41b"],
+                "4x200G[100G]": ["etp41a", "etp41b", "etp41c", "etp41d"],
+                "8x100G[50G]": ["etp41a", "etp41b", "etp41c", "etp41d", "etp41e", "etp41f", "etp41g", "etp41h"]
+            }
+        },
+        "Ethernet328": {
+            "index": "42,42,42,42,42,42,42,42",
+            "lanes": "328,329,330,331,332,333,334,335,",
+            "breakout_modes": {
+                "1x400G": ["etp42"],
+                "2x400G[200G]": ["etp42a", "etp42b"],
+                "4x200G[100G]": ["etp42a", "etp42b", "etp42c", "etp42d"],
+                "8x100G[50G]": ["etp42a",  "etp42b", "etp42c", "etp42d", "etp42e", "etp42f", "etp42g", "etp42h"]
+            }
+        },
+        "Ethernet336": {
+            "index": "43,43,43,43,43,43,43,43",
+            "lanes": "336,337,338,339,340,341,342,343,",
+            "breakout_modes": {
+                "1x400G": ["etp43"],
+                "2x400G[200G]": ["etp43a", "etp43b"],
+                "4x200G[100G]": ["etp43a", "etp43b", "etp43c", "etp43d"],
+                "8x100G[50G]": ["etp43a", "etp43b", "etp43c", "etp43d", "etp43e", "etp43f", "etp43g", "etp43h"]
+            }
+        },
+        "Ethernet344": {
+            "index": "44,44,44,44,44,44,44,44",
+            "lanes": "344,345,346,347,348,349,350,351,",
+            "breakout_modes": {
+                "1x400G": ["etp44"],
+                "2x400G[200G]": ["etp44a", "etp44b"],
+                "4x200G[100G]": ["etp44a", "etp44b", "etp44c", "etp44d"],
+                "8x100G[50G]": ["etp44a", "etp44b", "etp44c", "etp44d", "etp44e", "etp44f", "etp44g", "etp44h"]
+            }
+        },
+        "Ethernet352": {
+            "index": "45,45,45,45,45,45,45,45",
+            "lanes": "352,353,354,355,356,357,358,359,",
+            "breakout_modes": {
+                "1x400G": ["etp45"],
+                "2x400G[200G]": ["etp45a", "etp45b"],
+                "4x200G[100G]": ["etp45a", "etp45b", "etp45c", "etp45d"],
+                "8x100G[50G]": ["etp45a", "etp45b", "etp45c", "etp45d", "etp45e", "etp45f", "etp45g", "etp45h"]
+            }
+        },
+        "Ethernet360": {
+            "index": "46,46,46,46,46,46,46,46",
+            "lanes": "360,361,362,363,364,365,366,367,",
+            "breakout_modes": {
+                "1x400G": ["etp46"],
+                "2x400G[200G]": ["etp46a", "etp46b"],
+                "4x200G[100G]": ["etp46a", "etp46b", "etp46c", "etp46d"],
+                "8x100G[50G]": ["etp46a", "etp46b", "etp46c", "etp46d", "etp46e", "etp46f", "etp46g", "etp46h"]
+            }
+        },
+        "Ethernet368": {
+            "index": "47,47,47,47,47,47,47,47",
+            "lanes": "368,369,370,371,372,373,374,375,",
+            "breakout_modes": {
+                "1x400G": ["etp47"],
+                "2x400G[200G]": ["etp47a", "etp47b"],
+                "4x200G[100G]": ["etp47a", "etp47b", "etp47c", "etp47d"],
+                "8x100G[50G]": ["etp47a", "etp47b","etp47c", "etp47d", "etp47e", "etp47f", "etp47g", "etp47h"]
+            }
+        },
+        "Ethernet376": {
+            "index": "48,48,48,48,48,48,48,48",
+            "lanes": "376,377,378,379,380,381,382,383,",
+            "breakout_modes": {
+                "1x400G": ["etp48"],
+                "2x400G[200G]": ["etp48a", "etp48b"],
+                "4x200G[100G]": ["etp48a", "etp48b", "etp48c", "etp48d"],
+                "8x100G[50G]": ["etp48a", "etp48b", "etp48c", "etp48d", "etp48e", "etp48f", "etp48g", "etp48h"]
+            }
+        },
+        "Ethernet384": {
+            "index": "49,49,49,49,49,49,49,49",
+            "lanes": "384,385,386,387,388,389,390,391,",
+            "breakout_modes": {
+                "1x400G": ["etp49"],
+                "2x400G[200G]": ["etp49a", "etp49b"],
+                "4x200G[100G]": ["etp49a", "etp49b", "etp49c", "etp49d"],
+                "8x100G[50G]": ["etp49a", "etp49b", "etp49c", "etp49d", "etp49e", "etp49f", "etp49g", "etp49h"]
+            }
+        },
+        "Ethernet392": {
+            "index": "50,50,50,50,50,50,50,50",
+            "lanes": "392,393,394,395,396,397,398,399,",
+            "breakout_modes": {
+                "1x400G": ["etp50"],
+                "2x400G[200G]": ["etp50a", "etp50b"],
+                "4x200G[100G]": ["etp50a", "etp50b", "etp50c", "etp50d"],
+                "8x100G[50G]": ["etp50a", "etp50b", "etp50c", "etp50d", "etp50e", "etp50f", "etp50g", "etp50h"]
+            }
+        },
+        "Ethernet400": {
+            "index": "51,51,51,51,51,51,51,51",
+            "lanes": "400,401,402,403,404,405,406,407,",
+            "breakout_modes": {
+                "1x400G": ["etp51"],
+                "2x400G[200G]": ["etp51a", "etp51b"],
+                "4x200G[100G]": ["etp51a", "etp51b", "etp51c", "etp51d"],
+                "8x100G[50G]": ["etp51a", "etp51b", "etp51c", "etp51d", "etp51e", "etp51f", "etp51g", "etp51h"]
+            }
+        },
+        "Ethernet408": {
+            "index": "52,52,52,52,52,52,52,52",
+            "lanes": "408,409,410,411,412,413,414,415,",
+            "breakout_modes": {
+                "1x400G": ["etp52"],
+                "2x400G[200G]": ["etp52a", "etp52b"],
+                "4x200G[100G]": ["etp52a", "etp52b", "etp52c", "etp52d"],
+                "8x100G[50G]": ["etp52a", "etp52b", "etp52c", "etp52d", "etp52e", "etp52f", "etp52g", "etp52h"]
+            }
+        },
+            "Ethernet416": {
+            "index": "53,53,53,53,53,53,53,53",
+            "lanes": "416,417,418,419,420,421,422,423,",
+            "breakout_modes": {
+                "1x400G": ["etp53"],
+                "2x400G[200G]": ["etp53a", "etp53b"],
+                "4x200G[100G]": ["etp53a", "etp53b", "etp53c", "etp53d"],
+                "8x100G[50G]": ["etp53a", "etp53b", "etp53c", "etp53d", "etp53e", "etp53f", "etp53g", "etp53h"]
+            }
+        },
+        "Ethernet424": {
+            "index": "54,54,54,54,54,54,54,54",
+            "lanes": "424,425,426,427,428,429,430,431,",
+            "breakout_modes": {
+                "1x400G": ["etp54"],
+                "2x400G[200G]": ["etp54a", "etp54b"],
+                "4x200G[100G]": ["etp54a", "etp54b", "etp54c", "etp54d"],
+                "8x100G[50G]": ["etp54a", "etp54b", "etp54c", "etp54d", "etp54e", "etp54f", "etp54g", "etp54h"]
+            }
+        },
+        "Ethernet432": {
+            "index": "55,55,55,55,55,55,55,55",
+            "lanes": "432,433,434,435,436,437,438,439,",
+            "breakout_modes": {
+                "1x400G": ["etp55"],
+                "2x400G[200G]": ["etp55a", "etp55b"],
+                "4x200G[100G]": ["etp55a", "etp55b", "etp55c", "etp55d"],
+                "8x100G[50G]": ["etp55a", "etp55b", "etp55c", "etp55d", "etp55e", "etp55f", "etp55g", "etp55h"]
+            }
+        },
+        "Ethernet440": {
+            "index": "56,56,56,56,56,56,56,56",
+            "lanes": "440,441,442,443,444,445,446,447,",
+            "breakout_modes": {
+                "1x400G": ["etp56"],
+                "2x400G[200G]": ["etp56a", "etp56b"],
+                "4x200G[100G]": ["etp56a", "etp56b", "etp56c", "etp56d"],
+                "8x100G[50G]": ["etp56a", "etp56b", "etp56c", "etp56d", "etp56e", "etp56f", "etp56g", "etp56h"]
+            }
+        },
+        "Ethernet448": {
+            "index": "57,57,57,57,57,57,57,57",
+            "lanes": "448,449,450,451,452,453,454,455,",
+            "breakout_modes": {
+                "1x400G": ["etp57"],
+                "2x400G[200G]": ["etp57a", "etp57b"],
+                "4x200G[100G]": ["etp57a", "etp57b", "etp57c", "etp57d"],
+                "8x100G[50G]": ["etp57a", "etp57b", "etp57c", "etp57d", "etp57e", "etp57f", "etp57g", "etp57h"]
+            }
+        },
+        "Ethernet456": {
+            "index": "58,58,58,58,58,58,58,58",
+            "lanes": "456,457,458,459,460,461,462,463,",
+            "breakout_modes": {
+                "1x400G": ["etp58"],
+                "2x400G[200G]": ["etp58a", "etp58b"],
+                "4x200G[100G]": ["etp58a", "etp58b", "etp58c", "etp58d"],
+                "8x100G[50G]": ["etp58a", "etp58b", "etp58c", "etp58d", "etp58e", "etp58f", "etp58g", "etp58h"]
+            }
+        },
+        "Ethernet464": {
+            "index": "59,59,59,59,59,59,59,59",
+            "lanes": "464,465,466,467,468,469,470,471,",
+            "breakout_modes": {
+                "1x400G": ["etp59"],
+                "2x400G[200G]": ["etp59a", "etp59b"],
+                "4x200G[100G]": ["etp59a", "etp59b", "etp59c", "etp59d"],
+                "8x100G[50G]": ["etp59a", "etp59b", "etp59c", "etp59d", "etp59e", "etp59f", "etp59g", "etp59h"]
+            }
+        },
+        "Ethernet472": {
+            "index": "60,60,60,60,60,60,60,60",
+            "lanes": "472,473,474,475,476,477,478,479,",
+            "breakout_modes": {
+                "1x400G": ["etp60"],
+                "2x400G[200G]": ["etp60a", "etp60b"],
+                "4x200G[100G]": ["etp60a", "etp60b", "etp60c", "etp60d"],
+                "8x100G[50G]": ["etp60a", "etp60b", "etp60c", "etp60d", "etp60e",  "etp60f", "etp60g", "etp60h"]
+            }
+        },
+        "Ethernet480": {
+            "index": "61,61,61,61,61,61,61,61",
+            "lanes": "480,481,482,483,484,485,486,487,",
+            "breakout_modes": {
+                "1x400G": ["etp61"],
+                "2x400G[200G]": ["etp61a", "etp61b"],
+                "4x200G[100G]": ["etp61a", "etp61b", "etp61c", "etp61d"],
+                "8x100G[50G]": ["etp61a", "etp61b", "etp61c",  "etp61d", "etp61e", "etp61f", "etp61g", "etp61h"]
+            }
+        },
+        "Ethernet488": {
+            "index": "62,62,62,62,62,62,62,62",
+            "lanes": "488,489,490,491,492,493,494,495,",
+            "breakout_modes": {
+                "1x400G": ["etp62"],
+                "2x400G[200G]": ["etp62a", "etp62b"],
+                "4x200G[100G]": ["etp62a", "etp62b", "etp62c", "etp62d"],
+                "8x100G[50G]": ["etp62a", "etp62b", "etp62c", "etp62d", "etp62e",  "etp62f", "etp62g", "etp62h"]
+            }
+        },
+        "Ethernet496": {
+            "index": "63,63,63,63,63,63,63,63",
+            "lanes": "496,497,498,499,500,501,502,503,",
+            "breakout_modes": {
+                "1x400G": ["etp63"],
+                "2x400G[200G]": ["etp63a", "etp63b"],
+                "4x200G[100G]": ["etp63a", "etp63b", "etp63c", "etp63d"],
+                "8x100G[50G]": ["etp63a", "etp63b", "etp63c", "etp63d", "etp63e", "etp63f", "etp63g", "etp63h"]
+            }
+        },
+        "Ethernet504": {
+            "index": "64,64,64,64,64,64,64,64",
+            "lanes": "504,505,506,507,508,509,510,511,",
+            "breakout_modes": {
+                "1x400G": ["etp64"],
+                "2x400G[200G]": ["etp64a", "etp64b"],
+                "4x200G[100G]": ["etp64a", "etp64b", "etp64c", "etp64d"],
+                "8x100G[50G]": ["etp64a", "etp64b", "etp64c", "etp64d", "etp64e", "etp64f", "etp64g", "etp64h"]
+            }
+        },
+        "Ethernet512": {
+            "index": "65",
+            "lanes": "512",
+            "breakout_modes": {
+                "1x25G[10G]": ["etp65"]
+            }
+        },
+        "Ethernet520": {
+            "index": "66",
+            "lanes": "520",
+            "breakout_modes": {
+                "1x25G[10G]": ["etp66"]
+            }
+        }
+    }
+}
+
diff --git a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/platform_asic b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/platform_asic
new file mode 100644
index 000000000..70c074885
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/platform_asic
@@ -0,0 +1 @@
+mellanox
diff --git a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/plugins/eeprom.py b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/plugins/eeprom.py
new file mode 120000
index 000000000..b4e2a6a61
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/plugins/eeprom.py
@@ -0,0 +1 @@
+../../x86_64-mlnx_msn2700-r0/plugins/eeprom.py
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/plugins/psuutil.py b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/plugins/psuutil.py
new file mode 120000
index 000000000..9f724238a
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/plugins/psuutil.py
@@ -0,0 +1 @@
+../../x86_64-mlnx_msn2700-r0/plugins/psuutil.py
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/plugins/sfplpmget.py b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/plugins/sfplpmget.py
new file mode 120000
index 000000000..2e84f435a
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/plugins/sfplpmget.py
@@ -0,0 +1 @@
+../../x86_64-mlnx_msn2700-r0/plugins/sfplpmget.py
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/plugins/sfplpmset.py b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/plugins/sfplpmset.py
new file mode 120000
index 000000000..6a88bac30
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/plugins/sfplpmset.py
@@ -0,0 +1 @@
+../../x86_64-mlnx_msn2700-r0/plugins/sfplpmset.py
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/plugins/sfpreset.py b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/plugins/sfpreset.py
new file mode 120000
index 000000000..fef2063e3
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/plugins/sfpreset.py
@@ -0,0 +1 @@
+../../x86_64-mlnx_msn2700-r0/plugins/sfpreset.py
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/plugins/sfputil.py b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/plugins/sfputil.py
new file mode 120000
index 000000000..45909b880
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/plugins/sfputil.py
@@ -0,0 +1 @@
+../../x86_64-mlnx_msn2700-r0/plugins/sfputil.py
\ No newline at end of file
diff --git a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/pmon_daemon_control.json b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/pmon_daemon_control.json
new file mode 100644
index 000000000..dd83c2db1
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/pmon_daemon_control.json
@@ -0,0 +1,7 @@
+{
+        "skip_ledd": true,
+        "skip_xcvrd": true,
+        "skip_psud": true,
+        "skip_pcied": true,
+        "skip_thermalctld": true
+}
diff --git a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/system_health_monitoring_config.json b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/system_health_monitoring_config.json
new file mode 120000
index 000000000..98df66c27
--- /dev/null
+++ b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/system_health_monitoring_config.json
@@ -0,0 +1 @@
+../x86_64-mlnx_msn2700-r0/system_health_monitoring_config.json
\ No newline at end of file
diff --git a/platform/mellanox/asic_table.j2 b/platform/mellanox/asic_table.j2
index ede46d576..b45d0588a 100644
--- a/platform/mellanox/asic_table.j2
+++ b/platform/mellanox/asic_table.j2
@@ -50,6 +50,7 @@
         'x86_64-nvidia_sn5400_simx-r0':'MELLANOX-SPECTRUM-4',
         'x86_64-nvidia_sn5600_simx-r0':'MELLANOX-SPECTRUM-4',
         'x86_64-nvidia_sn4280-r0':'MELLANOX-SPECTRUM-3',
+        'x86_64-nvidia_sn5640_simx-r0':'MELLANOX-SPECTRUM-5',
         'vs-platform':'vs'
     }
 %}
@@ -102,5 +103,15 @@
         },
         "OP": "SET"
     }
+{% elif asic_type == 'MELLANOX-SPECTRUM-5' %}
+    {
+        "ASIC_TABLE:MELLANOX-SPECTRUM-5": {
+            "cell_size": "192",
+            "pipeline_latency": "19",
+            "mac_phy_delay": "0.8",
+            "peer_response_time": "3.8"
+        },
+        "OP": "SET"
+    }
 {% endif %}
 ]

From e821264b32fe597f2bf689b96513999e3cc19075 Mon Sep 17 00:00:00 2001
From: wenyiz2021 <91497961+wenyiz2021@users.noreply.github.com>
Date: Wed, 25 Sep 2024 21:28:04 -0700
Subject: [PATCH 1034/1115] [DNX SAI] bump to 11.2.9.1 (#20285)

* Update DNX SAI to 11.2.9.1
* Update sai-modules.mk

[SAI_BRANCH rel_ocp_sai_11_2] [CSP CS00012352844] Backport SONIC-92490 to rel_ocp_sai_11_2

JIRA# SONIC-92490

Issue Summary: Added missing DoNOtLearn action to knet port trap
---
 platform/broadcom/sai-modules.mk | 2 +-
 platform/broadcom/sai.mk         | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/platform/broadcom/sai-modules.mk b/platform/broadcom/sai-modules.mk
index ffcdacbac..e8ffcbfcc 100644
--- a/platform/broadcom/sai-modules.mk
+++ b/platform/broadcom/sai-modules.mk
@@ -10,7 +10,7 @@ $(BRCM_OPENNSL_KERNEL)_MACHINE = broadcom
 SONIC_DPKG_DEBS += $(BRCM_OPENNSL_KERNEL)
 
 # SAI bcm modules for DNX family ASIC
-BRCM_DNX_OPENNSL_KERNEL_VERSION = 11.2.7.1
+BRCM_DNX_OPENNSL_KERNEL_VERSION = 11.2.9.1
 
 BRCM_DNX_OPENNSL_KERNEL = opennsl-modules-dnx_$(BRCM_DNX_OPENNSL_KERNEL_VERSION)_amd64.deb
 $(BRCM_DNX_OPENNSL_KERNEL)_SRC_PATH = $(PLATFORM_PATH)/saibcm-modules-dnx
diff --git a/platform/broadcom/sai.mk b/platform/broadcom/sai.mk
index ac5675bc5..45d8472f7 100644
--- a/platform/broadcom/sai.mk
+++ b/platform/broadcom/sai.mk
@@ -1,5 +1,5 @@
 LIBSAIBCM_XGS_VERSION = 10.1.42.0
-LIBSAIBCM_DNX_VERSION = 11.2.7.1
+LIBSAIBCM_DNX_VERSION = 11.2.9.1
 LIBSAIBCM_XGS_BRANCH_NAME = SAI_10.1.0_GA
 LIBSAIBCM_DNX_BRANCH_NAME = SAI_11.2.0_GA
 LIBSAIBCM_XGS_URL_PREFIX = "https://sonicstorage.blob.core.windows.net/public/sai/sai-broadcom/$(LIBSAIBCM_XGS_BRANCH_NAME)/$(LIBSAIBCM_XGS_VERSION)/xgs"

From dbd6f5eac9d1aeb7e5585a123531e0453ef1908f Mon Sep 17 00:00:00 2001
From: DavidZagury <32644413+DavidZagury@users.noreply.github.com>
Date: Thu, 26 Sep 2024 20:14:37 +0300
Subject: [PATCH 1035/1115] [Mellanox] align SKU name to Mellanox-SN5600-C256X1
 (#20341)

---
 .../buffers.json.j2                                               | 0
 .../buffers_defaults_objects.j2                                   | 0
 .../buffers_defaults_t0.j2                                        | 0
 .../buffers_defaults_t1.j2                                        | 0
 .../buffers_dynamic.json.j2                                       | 0
 .../create_only_config_db_buffers.json                            | 0
 .../media_settings.json                                           | 0
 .../optics_si_settings.json                                       | 0
 .../pg_profile_lookup.ini                                         | 0
 .../pmon_daemon_control.json                                      | 0
 .../port_config.ini                                               | 0
 .../qos.json.j2                                                   | 0
 .../sai.profile                                                   | 0
 .../sai_5600_256x100g.xml                                         | 0
 14 files changed, 0 insertions(+), 0 deletions(-)
 rename device/mellanox/x86_64-nvidia_sn5600-r0/{Mellanox-SN5600-C256A1 => Mellanox-SN5600-C256X1}/buffers.json.j2 (100%)
 rename device/mellanox/x86_64-nvidia_sn5600-r0/{Mellanox-SN5600-C256A1 => Mellanox-SN5600-C256X1}/buffers_defaults_objects.j2 (100%)
 rename device/mellanox/x86_64-nvidia_sn5600-r0/{Mellanox-SN5600-C256A1 => Mellanox-SN5600-C256X1}/buffers_defaults_t0.j2 (100%)
 rename device/mellanox/x86_64-nvidia_sn5600-r0/{Mellanox-SN5600-C256A1 => Mellanox-SN5600-C256X1}/buffers_defaults_t1.j2 (100%)
 rename device/mellanox/x86_64-nvidia_sn5600-r0/{Mellanox-SN5600-C256A1 => Mellanox-SN5600-C256X1}/buffers_dynamic.json.j2 (100%)
 rename device/mellanox/x86_64-nvidia_sn5600-r0/{Mellanox-SN5600-C256A1 => Mellanox-SN5600-C256X1}/create_only_config_db_buffers.json (100%)
 rename device/mellanox/x86_64-nvidia_sn5600-r0/{Mellanox-SN5600-C256A1 => Mellanox-SN5600-C256X1}/media_settings.json (100%)
 rename device/mellanox/x86_64-nvidia_sn5600-r0/{Mellanox-SN5600-C256A1 => Mellanox-SN5600-C256X1}/optics_si_settings.json (100%)
 rename device/mellanox/x86_64-nvidia_sn5600-r0/{Mellanox-SN5600-C256A1 => Mellanox-SN5600-C256X1}/pg_profile_lookup.ini (100%)
 rename device/mellanox/x86_64-nvidia_sn5600-r0/{Mellanox-SN5600-C256A1 => Mellanox-SN5600-C256X1}/pmon_daemon_control.json (100%)
 rename device/mellanox/x86_64-nvidia_sn5600-r0/{Mellanox-SN5600-C256A1 => Mellanox-SN5600-C256X1}/port_config.ini (100%)
 rename device/mellanox/x86_64-nvidia_sn5600-r0/{Mellanox-SN5600-C256A1 => Mellanox-SN5600-C256X1}/qos.json.j2 (100%)
 rename device/mellanox/x86_64-nvidia_sn5600-r0/{Mellanox-SN5600-C256A1 => Mellanox-SN5600-C256X1}/sai.profile (100%)
 rename device/mellanox/x86_64-nvidia_sn5600-r0/{Mellanox-SN5600-C256A1 => Mellanox-SN5600-C256X1}/sai_5600_256x100g.xml (100%)

diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/buffers.json.j2 b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/buffers.json.j2
similarity index 100%
rename from device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/buffers.json.j2
rename to device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/buffers.json.j2
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/buffers_defaults_objects.j2 b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/buffers_defaults_objects.j2
similarity index 100%
rename from device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/buffers_defaults_objects.j2
rename to device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/buffers_defaults_objects.j2
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/buffers_defaults_t0.j2 b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/buffers_defaults_t0.j2
similarity index 100%
rename from device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/buffers_defaults_t0.j2
rename to device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/buffers_defaults_t0.j2
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/buffers_defaults_t1.j2 b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/buffers_defaults_t1.j2
similarity index 100%
rename from device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/buffers_defaults_t1.j2
rename to device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/buffers_defaults_t1.j2
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/buffers_dynamic.json.j2 b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/buffers_dynamic.json.j2
similarity index 100%
rename from device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/buffers_dynamic.json.j2
rename to device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/buffers_dynamic.json.j2
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/create_only_config_db_buffers.json b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/create_only_config_db_buffers.json
similarity index 100%
rename from device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/create_only_config_db_buffers.json
rename to device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/create_only_config_db_buffers.json
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/media_settings.json b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/media_settings.json
similarity index 100%
rename from device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/media_settings.json
rename to device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/media_settings.json
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/optics_si_settings.json b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/optics_si_settings.json
similarity index 100%
rename from device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/optics_si_settings.json
rename to device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/optics_si_settings.json
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/pg_profile_lookup.ini b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/pg_profile_lookup.ini
similarity index 100%
rename from device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/pg_profile_lookup.ini
rename to device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/pg_profile_lookup.ini
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/pmon_daemon_control.json b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/pmon_daemon_control.json
similarity index 100%
rename from device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/pmon_daemon_control.json
rename to device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/pmon_daemon_control.json
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/port_config.ini b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/port_config.ini
similarity index 100%
rename from device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/port_config.ini
rename to device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/port_config.ini
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/qos.json.j2 b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/qos.json.j2
similarity index 100%
rename from device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/qos.json.j2
rename to device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/qos.json.j2
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/sai.profile b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/sai.profile
similarity index 100%
rename from device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/sai.profile
rename to device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/sai.profile
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/sai_5600_256x100g.xml b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/sai_5600_256x100g.xml
similarity index 100%
rename from device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256A1/sai_5600_256x100g.xml
rename to device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/sai_5600_256x100g.xml

From bd2d4c31c21edbf0f51ebba33f94689858052430 Mon Sep 17 00:00:00 2001
From: Yakiv Huryk <62013282+Yakiv-Huryk@users.noreply.github.com>
Date: Thu, 26 Sep 2024 20:15:16 +0300
Subject: [PATCH 1036/1115] [nvidia-bluefield] add sonic-byo python script
 (#19774)

- Why I did it
To add a possibility to disable SONiC containers and run a user-provided data-plane application.

- How I did it
Added Nvidia platform-specific script sonic-byo.py

- How to verify it
Manual test

---------

Signed-off-by: Yakiv Huryk <yhuryk@nvidia.com>
---
 .../build_templates/sonic_debian_extension.j2 |   2 +
 platform/nvidia-bluefield/byo/sonic-byo.py    | 192 ++++++++++++++++++
 2 files changed, 194 insertions(+)
 create mode 100644 platform/nvidia-bluefield/byo/sonic-byo.py

diff --git a/files/build_templates/sonic_debian_extension.j2 b/files/build_templates/sonic_debian_extension.j2
index 68b57104b..003743cc9 100644
--- a/files/build_templates/sonic_debian_extension.j2
+++ b/files/build_templates/sonic_debian_extension.j2
@@ -1122,6 +1122,8 @@ for fw_file_name in ${!FW_FILE_MAP[@]}; do
     sudo ln -s /host/image-$SONIC_IMAGE_VERSION/$PLATFORM_DIR/fw/dpu/${FW_FILE_MAP[$fw_file_name]} $FILESYSTEM_ROOT/etc/bluefield/${FW_FILE_MAP[$fw_file_name]}
 done
 
+sudo install -m 755 platform/nvidia-bluefield/byo/sonic-byo.py $FILESYSTEM_ROOT/usr/bin/sonic-byo.py
+
 SONIC_PLATFORM_PY3_WHEEL_NAME=$(basename {{platform_api_py3_wheel_path}})
 sudo cp {{platform_api_py3_wheel_path}} $FILESYSTEM_ROOT/$SONIC_PLATFORM_PY3_WHEEL_NAME
 sudo https_proxy=$https_proxy LANG=C chroot $FILESYSTEM_ROOT pip3 install $SONIC_PLATFORM_PY3_WHEEL_NAME
diff --git a/platform/nvidia-bluefield/byo/sonic-byo.py b/platform/nvidia-bluefield/byo/sonic-byo.py
new file mode 100644
index 000000000..a5c933f8e
--- /dev/null
+++ b/platform/nvidia-bluefield/byo/sonic-byo.py
@@ -0,0 +1,192 @@
+#!/usr/bin/python
+#
+# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+# Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+import argparse
+import docker
+import subprocess
+import os
+import sys
+
+DOCKER_TIMEOUT = 600
+CONTAINER_NAME = 'byo-app-container'
+
+client = docker.DockerClient(timeout=DOCKER_TIMEOUT)
+api_client = docker.APIClient(timeout=DOCKER_TIMEOUT)
+
+
+def get_args():
+    parser = argparse.ArgumentParser(description='Utility for SONiC BYO configuration')
+    mode = parser.add_subparsers(dest='mode')
+    mode.required = True
+
+    mode.add_parser('disable', help='Stop BYO application, restart SONiC services')
+
+    enable_parser = mode.add_parser('enable', help='Stop SONiC services and run BYO application')
+    group = enable_parser.add_mutually_exclusive_group(required=True)
+    group.add_argument('--pull', help='Docker image URL to pull')
+    group.add_argument('--file', help='Docker image gz file to load')
+    group.add_argument('--image', help='Docker image name to run')
+
+    return parser.parse_args()
+
+
+def run_cmd(cmd, verbose=False):
+    if verbose:
+        print(' '.join(cmd))
+    subprocess.run(cmd)
+
+
+def sonic_services_ctl(start, verbose):
+    services = [
+        'featured',
+        'swss',
+        'syncd',
+        'pmon',
+        'snmp',
+        'lldp',
+        'gnmi',
+        'bgp',
+        'eventd'
+    ]
+
+    systemctlops_start = ['unmask', 'enable', 'start']
+    systemctlops_stop = ['stop', 'disable', 'mask']
+
+    # Start featured last
+    if start:
+        services = services[1:] + services[:1]
+
+    print('#', 'Starting' if start else 'Stopping', ', '.join(services))
+
+    ops = systemctlops_start if start else systemctlops_stop
+    for op in ops:
+        run_cmd(["systemctl", op] + services, verbose=verbose)
+
+
+def prepare_sonic(verbose=False):
+    print('# Preparing sonic..')
+
+    sonic_services_ctl(start=False, verbose=verbose)
+
+    print('# Loading mlx5_core driver')
+    run_cmd(["modprobe", "mlx5_core"], verbose=verbose)
+
+
+def restore_sonic(verbose=False):
+    print('# Restoring sonic..')
+    sonic_services_ctl(start=True, verbose=verbose)
+
+
+def pull_image(name):
+    try:
+        print(f'# Pulling image {name}')
+        for line in api_client.pull(name, stream=True, decode=True):
+            status = line.get('status', '')
+            progress = line.get('progress', '')
+            if progress:
+                sys.stdout.write(f'\r{status}: {progress}')
+            else:
+                sys.stdout.write(f'\r{status}')
+            sys.stdout.flush()
+        print()
+        return api_client.inspect_image(name)['Id']
+    except docker.errors.APIError as e:
+        print(f'Error pulling image: {e}')
+        return None
+
+
+def load_gz(file):
+    def chunked_file(f):
+        loaded = 0
+        total = os.path.getsize(file)
+        chunk_size = max(8192, int(total / 1000))
+        with open(file, 'rb') as f:
+            while True:
+                chunk = f.read(chunk_size)
+                if not chunk:
+                    print()
+                    break
+                loaded += len(chunk)
+                progress = loaded / total * 100
+                sys.stdout.write(f'\rLoading.. {progress:.2f}%')
+                sys.stdout.flush()
+                yield chunk
+
+    try:
+        print(f'# Loading image {file}')
+        return client.images.load(chunked_file(file))[0].id
+
+    except Exception as e:
+        print(f'Failed to load: {e}')
+        return None
+
+
+def run_container(image):
+    print(f'# Running image {image}')
+    config = {
+        'image': image,
+        'name': CONTAINER_NAME,
+        'detach': True,
+        'tty': True,
+        'privileged': True,
+        'network_mode': 'host',
+        'auto_remove': True
+    }
+
+    container = client.containers.run(**config) # nosemgrep: python.docker.security.audit.docker-arbitrary-container-run.docker-arbitrary-container-run
+    print(f'Container name: {container.name}')
+
+
+def stop_container():
+    try:
+        container = client.containers.get(CONTAINER_NAME)
+        container.stop()
+        print(f'Container {CONTAINER_NAME} stopped and removed successfully')
+
+    except docker.errors.NotFound:
+        print(f'Container {CONTAINER_NAME} not found')
+    except Exception as e:
+        print(f'Docker error occurred: {str(e)}')
+
+
+def byo_enable(args):
+    prepare_sonic(verbose=True)
+    if args.pull:
+        image_name = pull_image(args.pull)
+    elif args.file:
+        image_name = load_gz(args.file)
+    else:
+        image_name = args.image
+    run_container(image_name)
+
+
+def byo_disable():
+    stop_container()
+    restore_sonic(verbose=True)
+
+
+def main():
+    args = get_args()
+    if args.mode == 'enable':
+        byo_enable(args)
+    if args.mode == 'disable':
+        byo_disable()
+
+
+if __name__ == "__main__":
+    main()

From bfdc62c79bc1ceefe4f3cfb0773f3e6134443df0 Mon Sep 17 00:00:00 2001
From: Liu Shilong <shilongliu@microsoft.com>
Date: Fri, 27 Sep 2024 15:50:49 +0800
Subject: [PATCH 1037/1115] [ci] Fix permission issue on docker-ptf
 /var/run/sshd (#20346)

Why I did it
Fix permission issue on docker-ptf /var/run/sshd.
sonic-net/sonic-mgmt#13545

Work item tracking
Microsoft ADO (number only): 29632874
How I did it
How to verify it
Check docker-ptf in this build. https://dev.azure.com/mssonic/build/_build/results?buildId=653508&view=results
---
 .azure-pipelines/azure-pipelines-image-template.yml | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/.azure-pipelines/azure-pipelines-image-template.yml b/.azure-pipelines/azure-pipelines-image-template.yml
index c2e8b8856..fde8b76c4 100644
--- a/.azure-pipelines/azure-pipelines-image-template.yml
+++ b/.azure-pipelines/azure-pipelines-image-template.yml
@@ -42,6 +42,10 @@ jobs:
         fetchDepth: 0
         condition: and(succeeded(), eq(variables.SKIP_CHECKOUT, ''))
         displayName: 'Checkout code'
+      - script: |
+          set -x
+          sudo setfacl -R -b $(Agent.BuildDirectory)
+        displayName: 'setfacl'
       - script: |
           BRANCH_NAME=$(Build.SourceBranchName)
           [ -n "$SYSTEM_PULLREQUEST_PULLREQUESTID" ] && BRANCH_NAME="$SYSTEM_PULLREQUEST_TARGETBRANCH-$SYSTEM_PULLREQUEST_PULLREQUESTNUMBER"

From 7fcd58fc32d31014879f74332bb14f6e1210519c Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sat, 28 Sep 2024 19:01:09 +0800
Subject: [PATCH 1038/1115] [submodule] Update submodule sonic-platform-common
 to the latest HEAD automatically (#20371)

#### Why I did it
src/sonic-platform-common
```
* daeed65 - (HEAD -> master, origin/master, origin/HEAD) Added new Platform APIs and modified APIs for supporting reboot on a SmartSwitch (#501) (9 hours ago) [Vasundhara Volam]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-platform-common | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-platform-common b/src/sonic-platform-common
index 174bbd47f..daeed6510 160000
--- a/src/sonic-platform-common
+++ b/src/sonic-platform-common
@@ -1 +1 @@
-Subproject commit 174bbd47f0c5a3b8bd181f79b9e700ffa38906f6
+Subproject commit daeed65100c9250a704de223a771fdc7416a90f0

From 4d94ed553fcb13cd0173f74e8b5ef94c6b8b6288 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sat, 28 Sep 2024 19:01:21 +0800
Subject: [PATCH 1039/1115] [submodule] Update submodule sonic-swss to the
 latest HEAD automatically (#20339)

#### Why I did it
src/sonic-swss
```
* 3c230d2b - (HEAD -> master, origin/master, origin/HEAD) [Orchagent] Add optional create_switch timeout parameter (#3258) (3 days ago) [Pavan Naregundi]
* be3a15f6 - Update CODEOWNERS VNET and ACL Orch (#3296) (3 days ago) [siqbal1986]
* 002cd256 - Close socket descriptor in checkPortIffUp. (#3263) (3 days ago) [mint570]
* 69cf0872 - [orchagent]: Skip installing ACL counter when ACL mirror rule is inactive (#3223) (3 days ago) [fountzou]
* 008f2865 - [crm][dash] Do not probe DASH resources on devices other than the DPU. (#3297) (3 days ago) [Oleksandr Ivantsiv]
* 971dfc1a - Add support for PACKET_ACTION_COPY (#3288) (4 days ago) [Devesh Pathak]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-swss | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-swss b/src/sonic-swss
index 9a6a86fec..3c230d2b5 160000
--- a/src/sonic-swss
+++ b/src/sonic-swss
@@ -1 +1 @@
-Subproject commit 9a6a86fecb19efd8876ca7ab6bccdf6b68a13aa8
+Subproject commit 3c230d2b51ebf2ffc7163b2641ffab7ef358bfd4

From d2074849fcf32c7e609424ab22eb7c9201bad446 Mon Sep 17 00:00:00 2001
From: DavidZagury <32644413+DavidZagury@users.noreply.github.com>
Date: Sat, 28 Sep 2024 21:38:03 +0300
Subject: [PATCH 1040/1115] Make sure logrotate send rsyslog HUP signal only if
 it is already running (#19947)

#### Why I did it
We encounter an error in the log, which came from the call to logrotate while rsyslog is not running.

### How I did it
Config logrotate to check that the HUP signal will only send when rsyslog is running.
---
 files/image_config/logrotate/rsyslog.j2 | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/files/image_config/logrotate/rsyslog.j2 b/files/image_config/logrotate/rsyslog.j2
index 4c40da24d..b0a7ff7e7 100644
--- a/files/image_config/logrotate/rsyslog.j2
+++ b/files/image_config/logrotate/rsyslog.j2
@@ -19,7 +19,9 @@
     delaycompress
     sharedscripts
     postrotate
-        /bin/kill -HUP $(cat /var/run/rsyslogd.pid)
+        if [ -f /var/run/rsyslogd.pid ]; then
+            /bin/kill -HUP $(cat /var/run/rsyslogd.pid)
+        fi
     endscript
 }
 
@@ -116,7 +118,9 @@
                 pgrep -x orchagent | xargs /bin/kill -HUP 2>/dev/null || true
             fi
         else
-            /bin/kill -HUP $(cat /var/run/rsyslogd.pid)
+            if [ -f /var/run/rsyslogd.pid ]; then
+                /bin/kill -HUP $(cat /var/run/rsyslogd.pid)
+            fi
         fi
     endscript
 }

From f442943749b9c3ea9f6e1cfc65ac5fb6a072ecab Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Sun, 29 Sep 2024 19:01:13 +0800
Subject: [PATCH 1041/1115] [submodule] Update submodule sonic-utilities to the
 latest HEAD automatically (#20344)

#### Why I did it
src/sonic-utilities
```
* 94ec7108 - (HEAD -> master, origin/master, origin/HEAD) Enhance multi-asic support for queuestat (#3554) (29 hours ago) [HP]
* 688c1d1a - [dpu_tty]: Add a DPU TTY console utility (#3535) (3 days ago) [Wenchung Wang]
* b8f306f3 - [Nokia] Add J2C+/H3/H4/H5 to GCU validator (#3495) (3 days ago) [Dylan Godwin]
* 695cc9a7 - Upgrade pyroute2 and improve cli response time (#3513) (4 days ago) [Vivek]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-utilities | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-utilities b/src/sonic-utilities
index 867fc5400..94ec7108a 160000
--- a/src/sonic-utilities
+++ b/src/sonic-utilities
@@ -1 +1 @@
-Subproject commit 867fc5400e7c53e068bf61e7c4c9e33b54a3fea3
+Subproject commit 94ec7108a85aff9b89f5622ef768530b36450064

From f2ed2c93464162902b4f7e551f2960df7d40e66d Mon Sep 17 00:00:00 2001
From: anamehra <54692434+anamehra@users.noreply.github.com>
Date: Sun, 29 Sep 2024 21:55:24 -0700
Subject: [PATCH 1042/1115] Update cisco-8000.ini to 202405.0.5 release
 (#20362)

Signed-off-by: anamehra@cisco.com

Cisco platform 202405.0.5 release

Why I did it
Cisco platform 202405.0.5 release

Work item tracking
Microsoft ADO (number only):
---
 platform/checkout/cisco-8000.ini | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/platform/checkout/cisco-8000.ini b/platform/checkout/cisco-8000.ini
index 0c22272d7..8723b9435 100644
--- a/platform/checkout/cisco-8000.ini
+++ b/platform/checkout/cisco-8000.ini
@@ -1,3 +1,3 @@
 [module]
 repo=git@github.com:Cisco-8000-sonic/platform-cisco-8000.git
-ref=202405.0.4
+ref=202405.0.5

From 8756d3ce249d4f75be97fdf515549705bbb147cb Mon Sep 17 00:00:00 2001
From: Dror Prital <76714716+dprital@users.noreply.github.com>
Date: Mon, 30 Sep 2024 08:05:37 +0300
Subject: [PATCH 1043/1115] [Mellanox] Integrate HW-MGMT 7.0040.1011 Changes
 (#20148)

- Why I did it
Integrate HW-MGMT 7.0040.1011 Changes

- How I did it
Run make integrate-mlnx-hw-mgmt

- How to verify it
Build an image and run tests from "sonic-mgmt".
---
 platform/mellanox/hw-management.mk      | 2 +-
 platform/mellanox/hw-management/hw-mgmt | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/platform/mellanox/hw-management.mk b/platform/mellanox/hw-management.mk
index cab5e2ecf..6255e17ce 100644
--- a/platform/mellanox/hw-management.mk
+++ b/platform/mellanox/hw-management.mk
@@ -16,7 +16,7 @@
 #
 # Mellanox HW Management
 
-MLNX_HW_MANAGEMENT_VERSION = 7.0040.1008
+MLNX_HW_MANAGEMENT_VERSION = 7.0040.1011
 
 export MLNX_HW_MANAGEMENT_VERSION
 
diff --git a/platform/mellanox/hw-management/hw-mgmt b/platform/mellanox/hw-management/hw-mgmt
index cc3c0e00e..164c9ef66 160000
--- a/platform/mellanox/hw-management/hw-mgmt
+++ b/platform/mellanox/hw-management/hw-mgmt
@@ -1 +1 @@
-Subproject commit cc3c0e00e8e03bf2edcffaaf356777292ad8d22b
+Subproject commit 164c9ef66b10eb88bad20225d200c048449033cb

From 23136e5c18f3a3083856d5d475997543c1536850 Mon Sep 17 00:00:00 2001
From: Carmine Scarpitta <carmine.scarpitta.94@gmail.com>
Date: Mon, 30 Sep 2024 18:06:46 +0200
Subject: [PATCH 1044/1115] Introduce new FRR-SONiC communication channel (FPM
 SONiC module). (#18715)

[FRR FPM] Introduce new FRR-SONiC communication channel (FPM SONiC module).

Signed-off-by: Carmine Scarpitta <cscarpit@cisco.com>
---
 .../frr/supervisord/supervisord.conf.j2       |    2 +-
 .../vs/docker-sonic-vs/supervisord.conf.j2    |    2 +-
 src/sonic-frr/Makefile                        |    2 +
 .../dplane_fpm_sonic/dplane_fpm_sonic.c       | 2253 +++++++++++++++++
 .../patch/build-dplane-fpm-sonic-module.patch |   52 +
 src/sonic-frr/patch/series                    |    1 +
 6 files changed, 2310 insertions(+), 2 deletions(-)
 create mode 100644 src/sonic-frr/dplane_fpm_sonic/dplane_fpm_sonic.c
 create mode 100644 src/sonic-frr/patch/build-dplane-fpm-sonic-module.patch

diff --git a/dockers/docker-fpm-frr/frr/supervisord/supervisord.conf.j2 b/dockers/docker-fpm-frr/frr/supervisord/supervisord.conf.j2
index 0b26be8d3..15aa2ed55 100644
--- a/dockers/docker-fpm-frr/frr/supervisord/supervisord.conf.j2
+++ b/dockers/docker-fpm-frr/frr/supervisord/supervisord.conf.j2
@@ -30,7 +30,7 @@ stderr_logfile=syslog
 dependent_startup=true
 
 [program:zebra]
-command=/usr/lib/frr/zebra -A 127.0.0.1 -s 90000000 -M dplane_fpm_nl -M snmp --asic-offload=notify_on_offload
+command=/usr/lib/frr/zebra -A 127.0.0.1 -s 90000000 -M dplane_fpm_sonic -M snmp --asic-offload=notify_on_offload
 priority=4
 autostart=false
 autorestart=false
diff --git a/platform/vs/docker-sonic-vs/supervisord.conf.j2 b/platform/vs/docker-sonic-vs/supervisord.conf.j2
index 5b988a5a5..d8d9ce390 100644
--- a/platform/vs/docker-sonic-vs/supervisord.conf.j2
+++ b/platform/vs/docker-sonic-vs/supervisord.conf.j2
@@ -164,7 +164,7 @@ environment=ASAN_OPTIONS="log_path=/var/log/asan/teammgrd-asan.log{{ asan_extra_
 {% endif %}
 
 [program:zebra]
-command=/usr/lib/frr/zebra -A 127.0.0.1 -s 90000000 -M dplane_fpm_nl --asic-offload=notify_on_offload
+command=/usr/lib/frr/zebra -A 127.0.0.1 -s 90000000 -M dplane_fpm_sonic --asic-offload=notify_on_offload
 priority=13
 autostart=false
 autorestart=false
diff --git a/src/sonic-frr/Makefile b/src/sonic-frr/Makefile
index c7c43ccec..307089d91 100644
--- a/src/sonic-frr/Makefile
+++ b/src/sonic-frr/Makefile
@@ -6,6 +6,7 @@ MAIN_TARGET = $(FRR)
 DERIVED_TARGET = $(FRR_PYTHONTOOLS) $(FRR_DBG) $(FRR_SNMP) $(FRR_SNMP_DBG)
 SUFFIX = $(shell date +%Y%m%d\.%H%M%S)
 STG_BRANCH = stg_temp.$(SUFFIX)
+DPLANE_FPM_SONIC_MODULE = dplane_fpm_sonic/dplane_fpm_sonic.c
 
 # DEBEMAIL required by gpb dch
 export DEBEMAIL := sonicproject@googlegroups.com
@@ -20,6 +21,7 @@ endif
 	stg branch --create $(STG_BRANCH) $(FRR_TAG)
 	stg import -s ../patch/series
 	gbp dch --ignore-branch --new-version=$(FRR_VERSION)-sonic-$(FRR_SUBVERSION) --dch-opt="--force-bad-version" --commit --git-author
+	cp ../$(DPLANE_FPM_SONIC_MODULE) zebra/
 
 ifeq ($(CROSS_BUILD_ENVIRON), y)
 	CFLAGS="-I $$CROSS_PERL_CORE_PATH" dpkg-buildpackage -rfakeroot -b -d -us -uc -Ppkg.frr.nortrlib -a$(CONFIGURED_ARCH) -Pcross,nocheck -j$(SONIC_CONFIG_MAKE_JOBS) --admindir $(SONIC_DPKG_ADMINDIR)
diff --git a/src/sonic-frr/dplane_fpm_sonic/dplane_fpm_sonic.c b/src/sonic-frr/dplane_fpm_sonic/dplane_fpm_sonic.c
new file mode 100644
index 000000000..c87a913ac
--- /dev/null
+++ b/src/sonic-frr/dplane_fpm_sonic/dplane_fpm_sonic.c
@@ -0,0 +1,2253 @@
+/*
+ * Zebra dataplane plugin for Forwarding Plane Manager (FPM) using netlink.
+ *
+ * Copyright (C) 2019 Network Device Education Foundation, Inc. ("NetDEF")
+ *                    Rafael Zalamena
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; see the file COPYING; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#ifdef HAVE_CONFIG_H
+#include "config.h" /* Include this explicitly */
+#endif
+
+#include <arpa/inet.h>
+
+#include <sys/types.h>
+#include <sys/socket.h>
+
+#include <errno.h>
+#include <string.h>
+
+#include "lib/zebra.h"
+#include "lib/json.h"
+#include "lib/libfrr.h"
+#include "lib/frratomic.h"
+#include "lib/command.h"
+#include "lib/memory.h"
+#include "lib/network.h"
+#include "lib/ns.h"
+#include "lib/frr_pthread.h"
+#include "zebra/debug.h"
+#include "zebra/interface.h"
+#include "zebra/zebra_dplane.h"
+#include "zebra/zebra_mpls.h"
+#include "zebra/zebra_router.h"
+#include "zebra/zebra_evpn.h"
+#include "zebra/zebra_evpn_mac.h"
+#include "zebra/zebra_vxlan_private.h"
+#include "zebra/kernel_netlink.h"
+#include "zebra/rt_netlink.h"
+#include "zebra/debug.h"
+#include "zebra/zebra_srv6.h"
+#include "fpm/fpm.h"
+
+#define SOUTHBOUND_DEFAULT_ADDR INADDR_LOOPBACK
+#define SOUTHBOUND_DEFAULT_PORT 2620
+
+/**
+ * FPM header:
+ * {
+ *   version: 1 byte (always 1),
+ *   type: 1 byte (1 for netlink, 2 protobuf),
+ *   len: 2 bytes (network order),
+ * }
+ *
+ * This header is used with any format to tell the users how many bytes to
+ * expect.
+ */
+#define FPM_HEADER_SIZE 4
+
+/**
+ * Custom Netlink TLVs
+*/
+
+/* Custom Netlink message types */
+enum custom_nlmsg_types {
+	RTM_NEWSRV6LOCALSID		= 1000,
+	RTM_DELSRV6LOCALSID		= 1001,
+};
+
+/* Custom Netlink attribute types */
+enum custom_rtattr_encap {
+	FPM_ROUTE_ENCAP_SRV6		= 101,
+};
+
+enum custom_rtattr_srv6_localsid {
+	FPM_SRV6_LOCALSID_UNSPEC			= 0,
+	FPM_SRV6_LOCALSID_SID_VALUE			= 1,
+	FPM_SRV6_LOCALSID_FORMAT			= 2,
+	FPM_SRV6_LOCALSID_ACTION			= 3,
+	FPM_SRV6_LOCALSID_VRFNAME			= 4,
+	FPM_SRV6_LOCALSID_NH6				= 5,
+	FPM_SRV6_LOCALSID_NH4				= 6,
+	FPM_SRV6_LOCALSID_IIF				= 7,
+	FPM_SRV6_LOCALSID_OIF				= 8,
+	FPM_SRV6_LOCALSID_BPF				= 9,
+	FPM_SRV6_LOCALSID_SIDLIST			= 10,
+	FPM_SRV6_LOCALSID_ENCAP_SRC_ADDR	= 11,
+};
+
+enum custom_rtattr_encap_srv6 {
+	FPM_ROUTE_ENCAP_SRV6_ENCAP_UNSPEC		= 0,
+	FPM_ROUTE_ENCAP_SRV6_VPN_SID			= 1,
+	FPM_ROUTE_ENCAP_SRV6_ENCAP_SRC_ADDR		= 2,
+};
+
+enum custom_rtattr_srv6_localsid_format {
+	FPM_SRV6_LOCALSID_FORMAT_UNSPEC			= 0,
+	FPM_SRV6_LOCALSID_FORMAT_BLOCK_LEN		= 1,
+	FPM_SRV6_LOCALSID_FORMAT_NODE_LEN		= 2,
+	FPM_SRV6_LOCALSID_FORMAT_FUNC_LEN		= 3,
+	FPM_SRV6_LOCALSID_FORMAT_ARG_LEN		= 4,
+};
+
+enum custom_rtattr_srv6_localsid_action {
+	FPM_SRV6_LOCALSID_ACTION_UNSPEC				= 0,
+	FPM_SRV6_LOCALSID_ACTION_END				= 1,
+	FPM_SRV6_LOCALSID_ACTION_END_X				= 2,
+	FPM_SRV6_LOCALSID_ACTION_END_T				= 3,
+	FPM_SRV6_LOCALSID_ACTION_END_DX2			= 4,
+	FPM_SRV6_LOCALSID_ACTION_END_DX6			= 5,
+	FPM_SRV6_LOCALSID_ACTION_END_DX4			= 6,
+	FPM_SRV6_LOCALSID_ACTION_END_DT6			= 7,
+	FPM_SRV6_LOCALSID_ACTION_END_DT4			= 8,
+	FPM_SRV6_LOCALSID_ACTION_END_DT46			= 9,
+	FPM_SRV6_LOCALSID_ACTION_B6_ENCAPS			= 10,
+	FPM_SRV6_LOCALSID_ACTION_B6_ENCAPS_RED		= 11,
+	FPM_SRV6_LOCALSID_ACTION_B6_INSERT			= 12,
+	FPM_SRV6_LOCALSID_ACTION_B6_INSERT_RED		= 13,
+	FPM_SRV6_LOCALSID_ACTION_UN					= 14,
+	FPM_SRV6_LOCALSID_ACTION_UA					= 15,
+	FPM_SRV6_LOCALSID_ACTION_UDX2				= 16,
+	FPM_SRV6_LOCALSID_ACTION_UDX6				= 17,
+	FPM_SRV6_LOCALSID_ACTION_UDX4				= 18,
+	FPM_SRV6_LOCALSID_ACTION_UDT6				= 19,
+	FPM_SRV6_LOCALSID_ACTION_UDT4				= 20,
+	FPM_SRV6_LOCALSID_ACTION_UDT46				= 21,
+};
+
+static const char *prov_name = "dplane_fpm_sonic";
+
+struct fpm_nl_ctx {
+	/* data plane connection. */
+	int socket;
+	bool disabled;
+	bool connecting;
+	bool use_nhg;
+	struct sockaddr_storage addr;
+
+	/* data plane buffers. */
+	struct stream *ibuf;
+	struct stream *obuf;
+	pthread_mutex_t obuf_mutex;
+
+	/*
+	 * data plane context queue:
+	 * When a FPM server connection becomes a bottleneck, we must keep the
+	 * data plane contexts until we get a chance to process them.
+	 */
+	struct dplane_ctx_list_head ctxqueue;
+	pthread_mutex_t ctxqueue_mutex;
+
+	/* data plane events. */
+	struct zebra_dplane_provider *prov;
+	struct frr_pthread *fthread;
+	struct thread *t_connect;
+	struct thread *t_read;
+	struct thread *t_write;
+	struct thread *t_event;
+	struct thread *t_nhg;
+	struct thread *t_dequeue;
+
+	/* zebra events. */
+	struct thread *t_lspreset;
+	struct thread *t_lspwalk;
+	struct thread *t_nhgreset;
+	struct thread *t_nhgwalk;
+	struct thread *t_ribreset;
+	struct thread *t_ribwalk;
+	struct thread *t_rmacreset;
+	struct thread *t_rmacwalk;
+
+	/* Statistic counters. */
+	struct {
+		/* Amount of bytes read into ibuf. */
+		_Atomic uint32_t bytes_read;
+		/* Amount of bytes written from obuf. */
+		_Atomic uint32_t bytes_sent;
+		/* Output buffer current usage. */
+		_Atomic uint32_t obuf_bytes;
+		/* Output buffer peak usage. */
+		_Atomic uint32_t obuf_peak;
+
+		/* Amount of connection closes. */
+		_Atomic uint32_t connection_closes;
+		/* Amount of connection errors. */
+		_Atomic uint32_t connection_errors;
+
+		/* Amount of user configurations: FNE_RECONNECT. */
+		_Atomic uint32_t user_configures;
+		/* Amount of user disable requests: FNE_DISABLE. */
+		_Atomic uint32_t user_disables;
+
+		/* Amount of data plane context processed. */
+		_Atomic uint32_t dplane_contexts;
+		/* Amount of data plane contexts enqueued. */
+		_Atomic uint32_t ctxqueue_len;
+		/* Peak amount of data plane contexts enqueued. */
+		_Atomic uint32_t ctxqueue_len_peak;
+
+		/* Amount of buffer full events. */
+		_Atomic uint32_t buffer_full;
+	} counters;
+} *gfnc;
+
+enum fpm_nl_events {
+	/* Ask for FPM to reconnect the external server. */
+	FNE_RECONNECT,
+	/* Disable FPM. */
+	FNE_DISABLE,
+	/* Reset counters. */
+	FNE_RESET_COUNTERS,
+	/* Toggle next hop group feature. */
+	FNE_TOGGLE_NHG,
+	/* Reconnect request by our own code to avoid races. */
+	FNE_INTERNAL_RECONNECT,
+
+	/* LSP walk finished. */
+	FNE_LSP_FINISHED,
+	/* Next hop groups walk finished. */
+	FNE_NHG_FINISHED,
+	/* RIB walk finished. */
+	FNE_RIB_FINISHED,
+	/* RMAC walk finished. */
+	FNE_RMAC_FINISHED,
+};
+
+#define FPM_RECONNECT(fnc)                                                     \
+	thread_add_event((fnc)->fthread->master, fpm_process_event, (fnc),     \
+			 FNE_INTERNAL_RECONNECT, &(fnc)->t_event)
+
+#define WALK_FINISH(fnc, ev)                                                   \
+	thread_add_event((fnc)->fthread->master, fpm_process_event, (fnc),     \
+			 (ev), NULL)
+
+/*
+ * Prototypes.
+ */
+static void fpm_process_event(struct thread *t);
+static int fpm_nl_enqueue(struct fpm_nl_ctx *fnc, struct zebra_dplane_ctx *ctx);
+static void fpm_lsp_send(struct thread *t);
+static void fpm_lsp_reset(struct thread *t);
+static void fpm_nhg_send(struct thread *t);
+static void fpm_nhg_reset(struct thread *t);
+static void fpm_rib_send(struct thread *t);
+static void fpm_rib_reset(struct thread *t);
+static void fpm_rmac_send(struct thread *t);
+static void fpm_rmac_reset(struct thread *t);
+
+/*
+ * CLI.
+ */
+#define FPM_STR "Forwarding Plane Manager configuration\n"
+
+DEFUN(fpm_set_address, fpm_set_address_cmd,
+      "fpm address <A.B.C.D|X:X::X:X> [port (1-65535)]",
+      FPM_STR
+      "FPM remote listening server address\n"
+      "Remote IPv4 FPM server\n"
+      "Remote IPv6 FPM server\n"
+      "FPM remote listening server port\n"
+      "Remote FPM server port\n")
+{
+	struct sockaddr_in *sin;
+	struct sockaddr_in6 *sin6;
+	uint16_t port = 0;
+	uint8_t naddr[INET6_BUFSIZ];
+
+	if (argc == 5)
+		port = strtol(argv[4]->arg, NULL, 10);
+
+	/* Handle IPv4 addresses. */
+	if (inet_pton(AF_INET, argv[2]->arg, naddr) == 1) {
+		sin = (struct sockaddr_in *)&gfnc->addr;
+
+		memset(sin, 0, sizeof(*sin));
+		sin->sin_family = AF_INET;
+		sin->sin_port =
+			port ? htons(port) : htons(SOUTHBOUND_DEFAULT_PORT);
+#ifdef HAVE_STRUCT_SOCKADDR_SA_LEN
+		sin->sin_len = sizeof(*sin);
+#endif /* HAVE_STRUCT_SOCKADDR_SA_LEN */
+		memcpy(&sin->sin_addr, naddr, sizeof(sin->sin_addr));
+
+		goto ask_reconnect;
+	}
+
+	/* Handle IPv6 addresses. */
+	if (inet_pton(AF_INET6, argv[2]->arg, naddr) != 1) {
+		vty_out(vty, "%% Invalid address: %s\n", argv[2]->arg);
+		return CMD_WARNING;
+	}
+
+	sin6 = (struct sockaddr_in6 *)&gfnc->addr;
+	memset(sin6, 0, sizeof(*sin6));
+	sin6->sin6_family = AF_INET6;
+	sin6->sin6_port = port ? htons(port) : htons(SOUTHBOUND_DEFAULT_PORT);
+#ifdef HAVE_STRUCT_SOCKADDR_SA_LEN
+	sin6->sin6_len = sizeof(*sin6);
+#endif /* HAVE_STRUCT_SOCKADDR_SA_LEN */
+	memcpy(&sin6->sin6_addr, naddr, sizeof(sin6->sin6_addr));
+
+ask_reconnect:
+	thread_add_event(gfnc->fthread->master, fpm_process_event, gfnc,
+			 FNE_RECONNECT, &gfnc->t_event);
+	return CMD_SUCCESS;
+}
+
+DEFUN(no_fpm_set_address, no_fpm_set_address_cmd,
+      "no fpm address [<A.B.C.D|X:X::X:X> [port <1-65535>]]",
+      NO_STR
+      FPM_STR
+      "FPM remote listening server address\n"
+      "Remote IPv4 FPM server\n"
+      "Remote IPv6 FPM server\n"
+      "FPM remote listening server port\n"
+      "Remote FPM server port\n")
+{
+	thread_add_event(gfnc->fthread->master, fpm_process_event, gfnc,
+			 FNE_DISABLE, &gfnc->t_event);
+	return CMD_SUCCESS;
+}
+
+DEFUN(fpm_use_nhg, fpm_use_nhg_cmd,
+      "fpm use-next-hop-groups",
+      FPM_STR
+      "Use netlink next hop groups feature.\n")
+{
+	/* Already enabled. */
+	if (gfnc->use_nhg)
+		return CMD_SUCCESS;
+
+	thread_add_event(gfnc->fthread->master, fpm_process_event, gfnc,
+			 FNE_TOGGLE_NHG, &gfnc->t_nhg);
+
+	return CMD_SUCCESS;
+}
+
+DEFUN(no_fpm_use_nhg, no_fpm_use_nhg_cmd,
+      "no fpm use-next-hop-groups",
+      NO_STR
+      FPM_STR
+      "Use netlink next hop groups feature.\n")
+{
+	/* Already disabled. */
+	if (!gfnc->use_nhg)
+		return CMD_SUCCESS;
+
+	thread_add_event(gfnc->fthread->master, fpm_process_event, gfnc,
+			 FNE_TOGGLE_NHG, &gfnc->t_nhg);
+
+	return CMD_SUCCESS;
+}
+
+DEFUN(fpm_reset_counters, fpm_reset_counters_cmd,
+      "clear fpm counters",
+      CLEAR_STR
+      FPM_STR
+      "FPM statistic counters\n")
+{
+	thread_add_event(gfnc->fthread->master, fpm_process_event, gfnc,
+			 FNE_RESET_COUNTERS, &gfnc->t_event);
+	return CMD_SUCCESS;
+}
+
+DEFUN(fpm_show_counters, fpm_show_counters_cmd,
+      "show fpm counters",
+      SHOW_STR
+      FPM_STR
+      "FPM statistic counters\n")
+{
+	vty_out(vty, "%30s\n%30s\n", "FPM counters", "============");
+
+#define SHOW_COUNTER(label, counter) \
+	vty_out(vty, "%28s: %u\n", (label), (counter))
+
+	SHOW_COUNTER("Input bytes", gfnc->counters.bytes_read);
+	SHOW_COUNTER("Output bytes", gfnc->counters.bytes_sent);
+	SHOW_COUNTER("Output buffer current size", gfnc->counters.obuf_bytes);
+	SHOW_COUNTER("Output buffer peak size", gfnc->counters.obuf_peak);
+	SHOW_COUNTER("Connection closes", gfnc->counters.connection_closes);
+	SHOW_COUNTER("Connection errors", gfnc->counters.connection_errors);
+	SHOW_COUNTER("Data plane items processed",
+		     gfnc->counters.dplane_contexts);
+	SHOW_COUNTER("Data plane items enqueued",
+		     gfnc->counters.ctxqueue_len);
+	SHOW_COUNTER("Data plane items queue peak",
+		     gfnc->counters.ctxqueue_len_peak);
+	SHOW_COUNTER("Buffer full hits", gfnc->counters.buffer_full);
+	SHOW_COUNTER("User FPM configurations", gfnc->counters.user_configures);
+	SHOW_COUNTER("User FPM disable requests", gfnc->counters.user_disables);
+
+#undef SHOW_COUNTER
+
+	return CMD_SUCCESS;
+}
+
+DEFUN(fpm_show_counters_json, fpm_show_counters_json_cmd,
+      "show fpm counters json",
+      SHOW_STR
+      FPM_STR
+      "FPM statistic counters\n"
+      JSON_STR)
+{
+	struct json_object *jo;
+
+	jo = json_object_new_object();
+	json_object_int_add(jo, "bytes-read", gfnc->counters.bytes_read);
+	json_object_int_add(jo, "bytes-sent", gfnc->counters.bytes_sent);
+	json_object_int_add(jo, "obuf-bytes", gfnc->counters.obuf_bytes);
+	json_object_int_add(jo, "obuf-bytes-peak", gfnc->counters.obuf_peak);
+	json_object_int_add(jo, "connection-closes",
+			    gfnc->counters.connection_closes);
+	json_object_int_add(jo, "connection-errors",
+			    gfnc->counters.connection_errors);
+	json_object_int_add(jo, "data-plane-contexts",
+			    gfnc->counters.dplane_contexts);
+	json_object_int_add(jo, "data-plane-contexts-queue",
+			    gfnc->counters.ctxqueue_len);
+	json_object_int_add(jo, "data-plane-contexts-queue-peak",
+			    gfnc->counters.ctxqueue_len_peak);
+	json_object_int_add(jo, "buffer-full-hits", gfnc->counters.buffer_full);
+	json_object_int_add(jo, "user-configures",
+			    gfnc->counters.user_configures);
+	json_object_int_add(jo, "user-disables", gfnc->counters.user_disables);
+	vty_json(vty, jo);
+
+	return CMD_SUCCESS;
+}
+
+static int fpm_write_config(struct vty *vty)
+{
+	struct sockaddr_in *sin;
+	struct sockaddr_in6 *sin6;
+	int written = 0;
+
+	if (gfnc->disabled)
+		return written;
+
+	switch (gfnc->addr.ss_family) {
+	case AF_INET:
+		written = 1;
+		sin = (struct sockaddr_in *)&gfnc->addr;
+		vty_out(vty, "fpm address %pI4", &sin->sin_addr);
+		if (sin->sin_port != htons(SOUTHBOUND_DEFAULT_PORT))
+			vty_out(vty, " port %d", ntohs(sin->sin_port));
+
+		vty_out(vty, "\n");
+		break;
+	case AF_INET6:
+		written = 1;
+		sin6 = (struct sockaddr_in6 *)&gfnc->addr;
+		vty_out(vty, "fpm address %pI6", &sin6->sin6_addr);
+		if (sin6->sin6_port != htons(SOUTHBOUND_DEFAULT_PORT))
+			vty_out(vty, " port %d", ntohs(sin6->sin6_port));
+
+		vty_out(vty, "\n");
+		break;
+
+	default:
+		break;
+	}
+
+	if (!gfnc->use_nhg) {
+		vty_out(vty, "no fpm use-next-hop-groups\n");
+		written = 1;
+	}
+
+	return written;
+}
+
+static struct cmd_node fpm_node = {
+	.name = "fpm",
+	.node = FPM_NODE,
+	.prompt = "",
+	.config_write = fpm_write_config,
+};
+
+/*
+ * FPM functions.
+ */
+static void fpm_connect(struct thread *t);
+
+static void fpm_reconnect(struct fpm_nl_ctx *fnc)
+{
+	/* Cancel all zebra threads first. */
+	thread_cancel_async(zrouter.master, &fnc->t_lspreset, NULL);
+	thread_cancel_async(zrouter.master, &fnc->t_lspwalk, NULL);
+	thread_cancel_async(zrouter.master, &fnc->t_nhgreset, NULL);
+	thread_cancel_async(zrouter.master, &fnc->t_nhgwalk, NULL);
+	thread_cancel_async(zrouter.master, &fnc->t_ribreset, NULL);
+	thread_cancel_async(zrouter.master, &fnc->t_ribwalk, NULL);
+	thread_cancel_async(zrouter.master, &fnc->t_rmacreset, NULL);
+	thread_cancel_async(zrouter.master, &fnc->t_rmacwalk, NULL);
+
+	/*
+	 * Grab the lock to empty the streams (data plane might try to
+	 * enqueue updates while we are closing).
+	 */
+	frr_mutex_lock_autounlock(&fnc->obuf_mutex);
+
+	/* Avoid calling close on `-1`. */
+	if (fnc->socket != -1) {
+		close(fnc->socket);
+		fnc->socket = -1;
+	}
+
+	stream_reset(fnc->ibuf);
+	stream_reset(fnc->obuf);
+	THREAD_OFF(fnc->t_read);
+	THREAD_OFF(fnc->t_write);
+
+	/* FPM is disabled, don't attempt to connect. */
+	if (fnc->disabled)
+		return;
+
+	thread_add_timer(fnc->fthread->master, fpm_connect, fnc, 3,
+			 &fnc->t_connect);
+}
+
+static void fpm_read(struct thread *t)
+{
+	struct fpm_nl_ctx *fnc = THREAD_ARG(t);
+	fpm_msg_hdr_t fpm;
+	ssize_t rv;
+	char buf[65535];
+	struct nlmsghdr *hdr;
+	struct zebra_dplane_ctx *ctx;
+	size_t available_bytes;
+	size_t hdr_available_bytes;
+
+	/* Let's ignore the input at the moment. */
+	rv = stream_read_try(fnc->ibuf, fnc->socket,
+			     STREAM_WRITEABLE(fnc->ibuf));
+	if (rv == 0) {
+		atomic_fetch_add_explicit(&fnc->counters.connection_closes, 1,
+					  memory_order_relaxed);
+
+		if (IS_ZEBRA_DEBUG_FPM)
+			zlog_debug("%s: connection closed", __func__);
+
+		FPM_RECONNECT(fnc);
+		return;
+	}
+	if (rv == -1) {
+		atomic_fetch_add_explicit(&fnc->counters.connection_errors, 1,
+					  memory_order_relaxed);
+		zlog_warn("%s: connection failure: %s", __func__,
+			  strerror(errno));
+		FPM_RECONNECT(fnc);
+		return;
+	}
+
+	/* Schedule the next read */
+	thread_add_read(fnc->fthread->master, fpm_read, fnc, fnc->socket,
+			&fnc->t_read);
+
+	/* We've got an interruption. */
+	if (rv == -2)
+		return;
+
+
+	/* Account all bytes read. */
+	atomic_fetch_add_explicit(&fnc->counters.bytes_read, rv,
+				  memory_order_relaxed);
+
+	available_bytes = STREAM_READABLE(fnc->ibuf);
+	while (available_bytes) {
+		if (available_bytes < (ssize_t)FPM_MSG_HDR_LEN) {
+			stream_pulldown(fnc->ibuf);
+			return;
+		}
+
+		fpm.version = stream_getc(fnc->ibuf);
+		fpm.msg_type = stream_getc(fnc->ibuf);
+		fpm.msg_len = stream_getw(fnc->ibuf);
+
+		if (fpm.version != FPM_PROTO_VERSION &&
+		    fpm.msg_type != FPM_MSG_TYPE_NETLINK) {
+			stream_reset(fnc->ibuf);
+			zlog_warn(
+				"%s: Received version/msg_type %u/%u, expected 1/1",
+				__func__, fpm.version, fpm.msg_type);
+
+			FPM_RECONNECT(fnc);
+			return;
+		}
+
+		/*
+		 * If the passed in length doesn't even fill in the header
+		 * something is wrong and reset.
+		 */
+		if (fpm.msg_len < FPM_MSG_HDR_LEN) {
+			zlog_warn(
+				"%s: Received message length: %u that does not even fill the FPM header",
+				__func__, fpm.msg_len);
+			FPM_RECONNECT(fnc);
+			return;
+		}
+
+		/*
+		 * If we have not received the whole payload, reset the stream
+		 * back to the beginning of the header and move it to the
+		 * top.
+		 */
+		if (fpm.msg_len > available_bytes) {
+			stream_rewind_getp(fnc->ibuf, FPM_MSG_HDR_LEN);
+			stream_pulldown(fnc->ibuf);
+			return;
+		}
+
+		available_bytes -= FPM_MSG_HDR_LEN;
+
+		/*
+		 * Place the data from the stream into a buffer
+		 */
+		hdr = (struct nlmsghdr *)buf;
+		stream_get(buf, fnc->ibuf, fpm.msg_len - FPM_MSG_HDR_LEN);
+		hdr_available_bytes = fpm.msg_len - FPM_MSG_HDR_LEN;
+		available_bytes -= hdr_available_bytes;
+
+		/* Sanity check: must be at least header size. */
+		if (hdr->nlmsg_len < sizeof(*hdr)) {
+			zlog_warn(
+				"%s: [seq=%u] invalid message length %u (< %zu)",
+				__func__, hdr->nlmsg_seq, hdr->nlmsg_len,
+				sizeof(*hdr));
+			continue;
+		}
+		if (hdr->nlmsg_len > fpm.msg_len) {
+			zlog_warn(
+				"%s: Received a inner header length of %u that is greater than the fpm total length of %u",
+				__func__, hdr->nlmsg_len, fpm.msg_len);
+			FPM_RECONNECT(fnc);
+		}
+		/* Not enough bytes available. */
+		if (hdr->nlmsg_len > hdr_available_bytes) {
+			zlog_warn(
+				"%s: [seq=%u] invalid message length %u (> %zu)",
+				__func__, hdr->nlmsg_seq, hdr->nlmsg_len,
+				available_bytes);
+			continue;
+		}
+
+		if (!(hdr->nlmsg_flags & NLM_F_REQUEST)) {
+			if (IS_ZEBRA_DEBUG_FPM)
+				zlog_debug(
+					"%s: [seq=%u] not a request, skipping",
+					__func__, hdr->nlmsg_seq);
+
+			/*
+			 * This request is a bust, go to the next one
+			 */
+			continue;
+		}
+
+		switch (hdr->nlmsg_type) {
+		case RTM_NEWROUTE:
+			ctx = dplane_ctx_alloc();
+			dplane_ctx_route_init(ctx, DPLANE_OP_ROUTE_NOTIFY, NULL,
+ 					      NULL);
+			if (netlink_route_change_read_unicast_internal(
+				    hdr, 0, false, ctx) != 1) {
+				dplane_ctx_fini(&ctx);
+				stream_pulldown(fnc->ibuf);
+				/*
+				 * Let's continue to read other messages
+				 * Even if we ignore this one.
+				 */
+			}
+			break;
+		default:
+			if (IS_ZEBRA_DEBUG_FPM)
+				zlog_debug(
+					"%s: Received message type %u which is not currently handled",
+					__func__, hdr->nlmsg_type);
+			break;
+		}
+	}
+
+	stream_reset(fnc->ibuf);
+}
+
+static void fpm_write(struct thread *t)
+{
+	struct fpm_nl_ctx *fnc = THREAD_ARG(t);
+	socklen_t statuslen;
+	ssize_t bwritten;
+	int rv, status;
+	size_t btotal;
+
+	if (fnc->connecting == true) {
+		status = 0;
+		statuslen = sizeof(status);
+
+		rv = getsockopt(fnc->socket, SOL_SOCKET, SO_ERROR, &status,
+				&statuslen);
+		if (rv == -1 || status != 0) {
+			if (rv != -1)
+				zlog_warn("%s: connection failed: %s", __func__,
+					  strerror(status));
+			else
+				zlog_warn("%s: SO_ERROR failed: %s", __func__,
+					  strerror(status));
+
+			atomic_fetch_add_explicit(
+				&fnc->counters.connection_errors, 1,
+				memory_order_relaxed);
+
+			FPM_RECONNECT(fnc);
+			return;
+		}
+
+		fnc->connecting = false;
+
+		/*
+		 * Starting with LSPs walk all FPM objects, marking them
+		 * as unsent and then replaying them.
+		 */
+		thread_add_timer(zrouter.master, fpm_lsp_reset, fnc, 0,
+				 &fnc->t_lspreset);
+
+		/* Permit receiving messages now. */
+		thread_add_read(fnc->fthread->master, fpm_read, fnc,
+				fnc->socket, &fnc->t_read);
+	}
+
+	frr_mutex_lock_autounlock(&fnc->obuf_mutex);
+
+	while (true) {
+		/* Stream is empty: reset pointers and return. */
+		if (STREAM_READABLE(fnc->obuf) == 0) {
+			stream_reset(fnc->obuf);
+			break;
+		}
+
+		/* Try to write all at once. */
+		btotal = stream_get_endp(fnc->obuf) -
+			stream_get_getp(fnc->obuf);
+		bwritten = write(fnc->socket, stream_pnt(fnc->obuf), btotal);
+		if (bwritten == 0) {
+			atomic_fetch_add_explicit(
+				&fnc->counters.connection_closes, 1,
+				memory_order_relaxed);
+
+			if (IS_ZEBRA_DEBUG_FPM)
+				zlog_debug("%s: connection closed", __func__);
+			break;
+		}
+		if (bwritten == -1) {
+			/* Attempt to continue if blocked by a signal. */
+			if (errno == EINTR)
+				continue;
+			/* Receiver is probably slow, lets give it some time. */
+			if (errno == EAGAIN || errno == EWOULDBLOCK)
+				break;
+
+			atomic_fetch_add_explicit(
+				&fnc->counters.connection_errors, 1,
+				memory_order_relaxed);
+			zlog_warn("%s: connection failure: %s", __func__,
+				  strerror(errno));
+
+			FPM_RECONNECT(fnc);
+			return;
+		}
+
+		/* Account all bytes sent. */
+		atomic_fetch_add_explicit(&fnc->counters.bytes_sent, bwritten,
+					  memory_order_relaxed);
+
+		/* Account number of bytes free. */
+		atomic_fetch_sub_explicit(&fnc->counters.obuf_bytes, bwritten,
+					  memory_order_relaxed);
+
+		stream_forward_getp(fnc->obuf, (size_t)bwritten);
+	}
+
+	/* Stream is not empty yet, we must schedule more writes. */
+	if (STREAM_READABLE(fnc->obuf)) {
+		stream_pulldown(fnc->obuf);
+		thread_add_write(fnc->fthread->master, fpm_write, fnc,
+				 fnc->socket, &fnc->t_write);
+		return;
+	}
+}
+
+static void fpm_connect(struct thread *t)
+{
+	struct fpm_nl_ctx *fnc = THREAD_ARG(t);
+	struct sockaddr_in *sin = (struct sockaddr_in *)&fnc->addr;
+	struct sockaddr_in6 *sin6 = (struct sockaddr_in6 *)&fnc->addr;
+	socklen_t slen;
+	int rv, sock;
+	char addrstr[INET6_ADDRSTRLEN];
+
+	sock = socket(fnc->addr.ss_family, SOCK_STREAM, 0);
+	if (sock == -1) {
+		zlog_err("%s: fpm socket failed: %s", __func__,
+			 strerror(errno));
+		thread_add_timer(fnc->fthread->master, fpm_connect, fnc, 3,
+				 &fnc->t_connect);
+		return;
+	}
+
+	set_nonblocking(sock);
+
+	if (fnc->addr.ss_family == AF_INET) {
+		inet_ntop(AF_INET, &sin->sin_addr, addrstr, sizeof(addrstr));
+		slen = sizeof(*sin);
+	} else {
+		inet_ntop(AF_INET6, &sin6->sin6_addr, addrstr, sizeof(addrstr));
+		slen = sizeof(*sin6);
+	}
+
+	if (IS_ZEBRA_DEBUG_FPM)
+		zlog_debug("%s: attempting to connect to %s:%d", __func__,
+			   addrstr, ntohs(sin->sin_port));
+
+	rv = connect(sock, (struct sockaddr *)&fnc->addr, slen);
+	if (rv == -1 && errno != EINPROGRESS) {
+		atomic_fetch_add_explicit(&fnc->counters.connection_errors, 1,
+					  memory_order_relaxed);
+		close(sock);
+		zlog_warn("%s: fpm connection failed: %s", __func__,
+			  strerror(errno));
+		thread_add_timer(fnc->fthread->master, fpm_connect, fnc, 3,
+				 &fnc->t_connect);
+		return;
+	}
+
+	fnc->connecting = (errno == EINPROGRESS);
+	fnc->socket = sock;
+	if (!fnc->connecting)
+		thread_add_read(fnc->fthread->master, fpm_read, fnc, sock,
+				&fnc->t_read);
+	thread_add_write(fnc->fthread->master, fpm_write, fnc, sock,
+			 &fnc->t_write);
+
+	/*
+	 * Starting with LSPs walk all FPM objects, marking them
+	 * as unsent and then replaying them.
+	 *
+	 * If we are not connected, then delay the objects reset/send.
+	 */
+	if (!fnc->connecting)
+		thread_add_timer(zrouter.master, fpm_lsp_reset, fnc, 0,
+				 &fnc->t_lspreset);
+}
+
+static struct zebra_vrf *vrf_lookup_by_table_id(uint32_t table_id)
+{
+ 	struct vrf *vrf;
+ 	struct zebra_vrf *zvrf;
+
+ 	RB_FOREACH (vrf, vrf_id_head, &vrfs_by_id) {
+ 		zvrf = vrf->info;
+ 		if (zvrf == NULL)
+ 			continue;
+ 		/* case vrf with netns : match the netnsid */
+ 		if (vrf_is_backend_netns()) {
+ 			return NULL;
+ 		} else {
+ 			/* VRF is VRF_BACKEND_VRF_LITE */
+ 			if (zvrf->table_id != table_id)
+ 				continue;
+ 			return zvrf;
+ 		}
+ 	}
+
+ 	return NULL;
+ }
+
+/**
+ * Resets the SRv6 routes FPM flags so we send all SRv6 routes again.
+ */
+static void fpm_srv6_route_reset(struct thread *t)
+{
+	struct fpm_nl_ctx *fnc = THREAD_ARG(t);
+	rib_dest_t *dest;
+	struct route_node *rn;
+	struct route_entry *re;
+	struct route_table *rt;
+	struct nexthop *nexthop;
+	rib_tables_iter_t rt_iter;
+
+	rt_iter.state = RIB_TABLES_ITER_S_INIT;
+	while ((rt = rib_tables_iter_next(&rt_iter))) {
+		for (rn = route_top(rt); rn; rn = srcdest_route_next(rn)) {
+			dest = rib_dest_from_rnode(rn);
+			/* Skip bad route entries. */
+			if (dest == NULL)
+				continue;
+
+			re = dest->selected_fib;
+			if (re == NULL)
+				continue;
+
+			nexthop = re->nhe->nhg.nexthop;
+			if (nexthop && nexthop->nh_srv6 &&
+					!sid_zero(&nexthop->nh_srv6->seg6_segs))
+				/* Unset FPM installation flag so it gets installed again. */
+				UNSET_FLAG(dest->flags, RIB_DEST_UPDATE_FPM);
+		}
+	}
+
+	/* Schedule next step: send RIB routes. */
+	thread_add_event(zrouter.master, fpm_rib_send, fnc, 0, &fnc->t_ribwalk);
+}
+
+/*
+ * SRv6 localsid change via netlink interface, using a dataplane context object
+ *
+ * Returns -1 on failure, 0 when the msg doesn't fit entirely in the buffer
+ * otherwise the number of bytes written to buf.
+ */
+static ssize_t netlink_srv6_localsid_msg_encode(int cmd,
+					   struct zebra_dplane_ctx *ctx,
+					   uint8_t *data, size_t datalen,
+					   bool fpm, bool force_nhg)
+{
+	struct zebra_srv6 *srv6 = zebra_srv6_get_default();
+	struct zebra_vrf *zvrf;
+	struct srv6_locator *l, *locator = NULL;
+	struct listnode *node;
+	struct rtattr *nest;
+	const struct seg6local_context *seg6local_ctx;
+	struct nexthop *nexthop;
+	const struct prefix *p;
+	struct nlsock *nl;
+	int bytelen;
+	vrf_id_t vrf_id;
+	uint32_t table_id;
+	uint32_t action;
+
+	struct {
+		struct nlmsghdr n;
+		struct rtmsg r;
+		char buf[];
+	} *req = (void *)data;
+
+	nexthop = dplane_ctx_get_ng(ctx)->nexthop;
+	if (!nexthop || !nexthop->nh_srv6 || nexthop->nh_srv6->seg6local_action == ZEBRA_SEG6_LOCAL_ACTION_UNSPEC)
+		return -1;
+
+	p = dplane_ctx_get_dest(ctx);
+
+	if (datalen < sizeof(*req))
+		return 0;
+
+	nl = kernel_netlink_nlsock_lookup(dplane_ctx_get_ns_sock(ctx));
+
+	memset(req, 0, sizeof(*req));
+
+	if (p->family != AF_INET6) {
+		zlog_err("%s: invalid family: expected %u, got %u", __func__, AF_INET6, p->family);
+		return -1;
+	}
+
+	bytelen = IPV6_MAX_BYTELEN;
+
+	req->n.nlmsg_len = NLMSG_LENGTH(sizeof(struct rtmsg));
+	req->n.nlmsg_flags = NLM_F_CREATE | NLM_F_REQUEST;
+
+	if ((cmd == RTM_NEWSRV6LOCALSID) &&
+		(v6_rr_semantics))
+		req->n.nlmsg_flags |= NLM_F_REPLACE;
+
+	req->n.nlmsg_type = cmd;
+
+	req->n.nlmsg_pid = nl->snl.nl_pid;
+
+	req->r.rtm_family = p->family;
+	req->r.rtm_dst_len = p->prefixlen;
+	req->r.rtm_scope = RT_SCOPE_UNIVERSE;
+
+	if (cmd == RTM_DELSRV6LOCALSID)
+		req->r.rtm_protocol = zebra2proto(dplane_ctx_get_old_type(ctx));
+	else
+		req->r.rtm_protocol = zebra2proto(dplane_ctx_get_type(ctx));
+
+	if (!nl_attr_put(&req->n, datalen, FPM_SRV6_LOCALSID_SID_VALUE, &p->u.prefix, bytelen))
+		return 0;
+
+	/* Table corresponding to this route. */
+	table_id = dplane_ctx_get_table(ctx);
+	if (!fpm) {
+		if (table_id < 256)
+			req->r.rtm_table = table_id;
+		else {
+			req->r.rtm_table = RT_TABLE_UNSPEC;
+			if (!nl_attr_put32(&req->n, datalen, RTA_TABLE, table_id))
+				return 0;
+		}
+	} else {
+		/* Put vrf if_index instead of table id */
+		vrf_id = dplane_ctx_get_vrf(ctx);
+		if (vrf_id < 256)
+			req->r.rtm_table = vrf_id;
+		else {
+			req->r.rtm_table = RT_TABLE_UNSPEC;
+			if (!nl_attr_put32(&req->n, datalen, RTA_TABLE, vrf_id))
+				return 0;
+		}
+	}
+
+	if (IS_ZEBRA_DEBUG_FPM)
+		zlog_debug(
+			"%s: %s %pFX vrf %u(%u)", __func__,
+			(cmd == RTM_NEWSRV6LOCALSID) ? "RTM_NEWSRV6LOCALSID" : "RTM_DELSRV6LOCALSID", p, dplane_ctx_get_vrf(ctx),
+			table_id);
+
+	for (ALL_LIST_ELEMENTS_RO(srv6->locators, node, l)) {
+		if (prefix_match(&l->prefix, p)) {
+			locator = l;
+			break;
+		}
+	}
+
+	if (locator) {
+		nest =
+			nl_attr_nest(&req->n, datalen, 
+						FPM_SRV6_LOCALSID_FORMAT);
+
+		if (locator->block_bits_length)
+			if (!nl_attr_put8(
+					&req->n, datalen, 
+					FPM_SRV6_LOCALSID_FORMAT_BLOCK_LEN,
+					locator->block_bits_length))
+				return -1;
+
+		if (locator->node_bits_length)
+			if (!nl_attr_put8(
+					&req->n, datalen, 
+					FPM_SRV6_LOCALSID_FORMAT_NODE_LEN,
+					locator->node_bits_length))
+				return -1;
+
+		if (locator->function_bits_length)
+			if (!nl_attr_put8(
+					&req->n, datalen, 
+					FPM_SRV6_LOCALSID_FORMAT_FUNC_LEN,
+					locator->function_bits_length))
+				return -1;
+
+		if (locator->argument_bits_length)
+			if (!nl_attr_put8(
+					&req->n, datalen, 
+					FPM_SRV6_LOCALSID_FORMAT_ARG_LEN,
+					locator->argument_bits_length))
+				return -1;
+
+		nl_attr_nest_end(&req->n, nest);
+	}
+
+	if (cmd == RTM_DELSRV6LOCALSID)
+		return NLMSG_ALIGN(req->n.nlmsg_len);
+
+	seg6local_ctx = &nexthop->nh_srv6->seg6local_ctx;
+
+	switch (nexthop->nh_srv6->seg6local_action) {
+	case ZEBRA_SEG6_LOCAL_ACTION_END:
+		action = (locator && CHECK_FLAG(locator->flags, SRV6_LOCATOR_USID)) ? FPM_SRV6_LOCALSID_ACTION_UN : FPM_SRV6_LOCALSID_ACTION_END;
+		if (!nl_attr_put32(&req->n, datalen, 
+					FPM_SRV6_LOCALSID_ACTION,
+					action))
+			return -1;
+		break;
+	case ZEBRA_SEG6_LOCAL_ACTION_END_X:
+		action = (locator && CHECK_FLAG(locator->flags, SRV6_LOCATOR_USID)) ? FPM_SRV6_LOCALSID_ACTION_UA : FPM_SRV6_LOCALSID_ACTION_END_X;
+		if (!nl_attr_put32(&req->n, datalen, 
+					FPM_SRV6_LOCALSID_ACTION,
+					action))
+			return -1;
+		if (!nl_attr_put(&req->n, datalen, 
+					FPM_SRV6_LOCALSID_NH6, &seg6local_ctx->nh6,
+					sizeof(struct in6_addr)))
+			return -1;
+		break;
+	case ZEBRA_SEG6_LOCAL_ACTION_END_T:
+		zvrf = vrf_lookup_by_table_id(seg6local_ctx->table);
+		if (!zvrf)
+			return false;
+
+		if (!nl_attr_put32(&req->n, datalen, 
+					FPM_SRV6_LOCALSID_ACTION,
+					FPM_SRV6_LOCALSID_ACTION_END_T))
+			return -1;
+		if (!nl_attr_put(&req->n, datalen, 
+					FPM_SRV6_LOCALSID_VRFNAME,
+					zvrf->vrf->name,
+					strlen(zvrf->vrf->name) + 1))
+			return -1;
+		break;
+	case ZEBRA_SEG6_LOCAL_ACTION_END_DX6:
+		action = (locator && CHECK_FLAG(locator->flags, SRV6_LOCATOR_USID)) ? FPM_SRV6_LOCALSID_ACTION_UDX6 : FPM_SRV6_LOCALSID_ACTION_END_DX6;
+		if (!nl_attr_put32(&req->n, datalen, 
+					FPM_SRV6_LOCALSID_ACTION,
+					action))
+			return -1;
+		if (!nl_attr_put(&req->n, datalen, 
+					FPM_SRV6_LOCALSID_NH6, &seg6local_ctx->nh6,
+					sizeof(struct in6_addr)))
+			return -1;
+		break;
+	case ZEBRA_SEG6_LOCAL_ACTION_END_DX4:
+		action = (locator && CHECK_FLAG(locator->flags, SRV6_LOCATOR_USID)) ? FPM_SRV6_LOCALSID_ACTION_UDX4 : FPM_SRV6_LOCALSID_ACTION_END_DX4;
+		if (!nl_attr_put32(&req->n, datalen, 
+					FPM_SRV6_LOCALSID_ACTION,
+					action))
+			return -1;
+		if (!nl_attr_put(&req->n, datalen, 
+					FPM_SRV6_LOCALSID_NH4, &seg6local_ctx->nh4,
+					sizeof(struct in_addr)))
+			return -1;
+		break;
+	case ZEBRA_SEG6_LOCAL_ACTION_END_DT6:
+		zvrf = vrf_lookup_by_table_id(seg6local_ctx->table);
+		if (!zvrf)
+			return false;
+
+		action = (locator && CHECK_FLAG(locator->flags, SRV6_LOCATOR_USID)) ? FPM_SRV6_LOCALSID_ACTION_UDT6 : FPM_SRV6_LOCALSID_ACTION_END_DT6;
+		if (!nl_attr_put32(&req->n, datalen, 
+					FPM_SRV6_LOCALSID_ACTION,
+					action))
+			return -1;
+		if (!nl_attr_put(&req->n, datalen, 
+					FPM_SRV6_LOCALSID_VRFNAME,
+					zvrf->vrf->name,
+					strlen(zvrf->vrf->name) + 1))
+			return -1;
+		break;
+	case ZEBRA_SEG6_LOCAL_ACTION_END_DT4:
+		zvrf = vrf_lookup_by_table_id(seg6local_ctx->table);
+		if (!zvrf)
+			return false;
+
+		action = (locator && CHECK_FLAG(locator->flags, SRV6_LOCATOR_USID)) ? FPM_SRV6_LOCALSID_ACTION_UDT4 : FPM_SRV6_LOCALSID_ACTION_END_DT4;
+		if (!nl_attr_put32(&req->n, datalen, 
+					FPM_SRV6_LOCALSID_ACTION,
+					action))
+			return -1;
+		if (!nl_attr_put(&req->n, datalen, 
+					FPM_SRV6_LOCALSID_VRFNAME,
+					zvrf->vrf->name,
+					strlen(zvrf->vrf->name) + 1))
+			return -1;
+		break;
+	case ZEBRA_SEG6_LOCAL_ACTION_END_DT46:
+		zvrf = vrf_lookup_by_table_id(seg6local_ctx->table);
+		if (!zvrf)
+			return false;
+
+		action = (locator && CHECK_FLAG(locator->flags, SRV6_LOCATOR_USID)) ? FPM_SRV6_LOCALSID_ACTION_UDT46 : FPM_SRV6_LOCALSID_ACTION_END_DT46;
+		if (!nl_attr_put32(&req->n, datalen, 
+					FPM_SRV6_LOCALSID_ACTION,
+					action))
+			return -1;
+		if (!nl_attr_put(&req->n, datalen, 
+					FPM_SRV6_LOCALSID_VRFNAME,
+					zvrf->vrf->name,
+					strlen(zvrf->vrf->name) + 1))
+			return -1;
+		break;
+	default:
+		zlog_err("%s: unsupport seg6local behaviour action=%u",
+				__func__,
+				nexthop->nh_srv6->seg6local_action);
+		return -1;
+	}
+
+	return NLMSG_ALIGN(req->n.nlmsg_len);
+}
+
+/*
+ * SRv6 VPN route change via netlink interface, using a dataplane context object
+ *
+ * Returns -1 on failure, 0 when the msg doesn't fit entirely in the buffer
+ * otherwise the number of bytes written to buf.
+ */
+static ssize_t netlink_srv6_vpn_route_msg_encode(int cmd,
+					   struct zebra_dplane_ctx *ctx,
+					   uint8_t *data, size_t datalen,
+					   bool fpm, bool force_nhg)
+{
+	struct rtattr *nest;
+	struct nexthop *nexthop;
+	const struct prefix *p;
+	struct nlsock *nl;
+	int bytelen;
+	vrf_id_t vrf_id;
+	uint32_t table_id;
+	struct interface *ifp;
+	struct in6_addr encap_src_addr = {};
+	struct listnode *node;
+	struct connected *connected;
+
+	struct {
+		struct nlmsghdr n;
+		struct rtmsg r;
+		char buf[];
+	} *req = (void *)data;
+
+	nexthop = dplane_ctx_get_ng(ctx)->nexthop;
+	if (!nexthop || !nexthop->nh_srv6 || sid_zero(&nexthop->nh_srv6->seg6_segs))
+		return -1;
+
+	p = dplane_ctx_get_dest(ctx);
+
+	if (datalen < sizeof(*req))
+		return 0;
+
+	nl = kernel_netlink_nlsock_lookup(dplane_ctx_get_ns_sock(ctx));
+
+	memset(req, 0, sizeof(*req));
+
+	bytelen = (p->family == AF_INET ? IPV4_MAX_BYTELEN : IPV6_MAX_BYTELEN);
+
+	req->n.nlmsg_len = NLMSG_LENGTH(sizeof(struct rtmsg));
+	req->n.nlmsg_flags = NLM_F_CREATE | NLM_F_REQUEST;
+
+	if ((cmd == RTM_NEWROUTE) &&
+	    ((p->family == AF_INET) || v6_rr_semantics))
+		req->n.nlmsg_flags |= NLM_F_REPLACE;
+
+	req->n.nlmsg_type = cmd;
+
+	req->n.nlmsg_pid = nl->snl.nl_pid;
+
+	req->r.rtm_family = p->family;
+	req->r.rtm_dst_len = p->prefixlen;
+	req->r.rtm_scope = RT_SCOPE_UNIVERSE;
+
+	if (cmd == RTM_DELROUTE)
+		req->r.rtm_protocol = zebra2proto(dplane_ctx_get_old_type(ctx));
+	else
+		req->r.rtm_protocol = zebra2proto(dplane_ctx_get_type(ctx));
+
+	req->r.rtm_type = RTN_UNICAST;
+
+	if (!nl_attr_put(&req->n, datalen, RTA_DST, &p->u.prefix, bytelen))
+		return 0;
+
+	/* Table corresponding to this route. */
+	table_id = dplane_ctx_get_table(ctx);
+	if (!fpm) {
+		if (table_id < 256)
+			req->r.rtm_table = table_id;
+		else {
+			req->r.rtm_table = RT_TABLE_UNSPEC;
+			if (!nl_attr_put32(&req->n, datalen, RTA_TABLE, table_id))
+				return 0;
+		}
+	} else {
+		/* Put vrf if_index instead of table id */
+		vrf_id = dplane_ctx_get_vrf(ctx);
+		if (vrf_id < 256)
+			req->r.rtm_table = vrf_id;
+		else {
+			req->r.rtm_table = RT_TABLE_UNSPEC;
+			if (!nl_attr_put32(&req->n, datalen, RTA_TABLE, vrf_id))
+				return 0;
+		}
+	}
+
+	if (IS_ZEBRA_DEBUG_FPM)
+		zlog_debug(
+			"%s: %s %pFX vrf %u(%u)", __func__,
+			nl_msg_type_to_str(cmd), p, dplane_ctx_get_vrf(ctx),
+			table_id);
+
+	if (!nl_attr_put16(&req->n, datalen, RTA_ENCAP_TYPE,
+				FPM_ROUTE_ENCAP_SRV6))
+		return false;
+	nest = nl_attr_nest(&req->n, datalen, RTA_ENCAP);
+	if (!nest)
+		return false;
+
+	/*
+	 * by default, we use the loopback address as encap source address,
+	 * if it is valid
+	 */
+	ifp = if_lookup_by_name("lo", VRF_DEFAULT);
+	if (ifp) {
+		FOR_ALL_INTERFACES_ADDRESSES(ifp, connected, node) {
+			if (connected->address->family == AF_INET6 &&
+					!IN6_IS_ADDR_LOOPBACK(&connected->address->u.prefix6) &&
+					!IN6_IS_ADDR_LINKLOCAL(&connected->address->u.prefix6)) {
+				encap_src_addr = connected->address->u.prefix6;
+				break;
+			}
+		}
+	}
+
+	if (!nl_attr_put(
+			&req->n, datalen, FPM_ROUTE_ENCAP_SRV6_ENCAP_SRC_ADDR,
+			&encap_src_addr, IPV6_MAX_BYTELEN))
+		return false;
+	if (!nl_attr_put(&req->n, datalen, FPM_ROUTE_ENCAP_SRV6_VPN_SID,
+				&nexthop->nh_srv6->seg6_segs,
+				IPV6_MAX_BYTELEN))
+		return false;
+	nl_attr_nest_end(&req->n, nest);
+
+	return NLMSG_ALIGN(req->n.nlmsg_len);
+}
+
+/*
+ * SRv6 change via netlink interface, using a dataplane context object
+ *
+ * Returns -1 on failure, 0 when the msg doesn't fit entirely in the buffer
+ * otherwise the number of bytes written to buf.
+ */
+static ssize_t netlink_srv6_msg_encode(int cmd,
+					   struct zebra_dplane_ctx *ctx,
+					   uint8_t *data, size_t datalen,
+					   bool fpm, bool force_nhg)
+{
+	struct nexthop *nexthop = NULL;
+
+	struct {
+		struct nlmsghdr n;
+		struct rtmsg r;
+		char buf[];
+	} *req = (void *)data;
+
+	nexthop = dplane_ctx_get_ng(ctx)->nexthop;
+	if (!nexthop || !nexthop->nh_srv6)
+		return -1;
+
+	if (nexthop->nh_srv6->seg6local_action !=
+ 		    ZEBRA_SEG6_LOCAL_ACTION_UNSPEC) {
+		if (cmd == RTM_NEWROUTE)
+			cmd = RTM_NEWSRV6LOCALSID;
+		else if (cmd == RTM_DELROUTE)
+			cmd = RTM_DELSRV6LOCALSID;
+
+		if (!netlink_srv6_localsid_msg_encode(
+				cmd, ctx, data, datalen, fpm, force_nhg))
+			return 0;
+	} else if (!sid_zero(&nexthop->nh_srv6->seg6_segs)) {
+		if (!netlink_srv6_vpn_route_msg_encode(
+				cmd, ctx, data, datalen, fpm, force_nhg))
+			return 0;
+	} else {
+		zlog_err(
+			"%s: invalid srv6 nexthop", __func__);
+		return -1;
+	}
+
+	return NLMSG_ALIGN(req->n.nlmsg_len);
+}
+
+/**
+ * Encode data plane operation context into netlink and enqueue it in the FPM
+ * output buffer.
+ *
+ * @param fnc the netlink FPM context.
+ * @param ctx the data plane operation context data.
+ * @return 0 on success or -1 on not enough space.
+ */
+static int fpm_nl_enqueue(struct fpm_nl_ctx *fnc, struct zebra_dplane_ctx *ctx)
+{
+	uint8_t nl_buf[NL_PKT_BUF_SIZE];
+	size_t nl_buf_len;
+	ssize_t rv;
+	uint64_t obytes, obytes_peak;
+	enum dplane_op_e op = dplane_ctx_get_op(ctx);
+	struct nexthop *nexthop;
+
+	/*
+	 * If we were configured to not use next hop groups, then quit as soon
+	 * as possible.
+	 */
+	if ((!fnc->use_nhg)
+	    && (op == DPLANE_OP_NH_DELETE || op == DPLANE_OP_NH_INSTALL
+		|| op == DPLANE_OP_NH_UPDATE))
+		return 0;
+ 
+	/*
+	 * Ignore route from default table, because when mgmt port goes down,
+	 * zebra will remove the default route and causing ASIC to blackhole IO.
+	 */
+	if (dplane_ctx_get_table(ctx) == RT_TABLE_DEFAULT) {
+		zlog_debug("%s: discard default table route", __func__);
+		return 0;
+	}
+
+	nl_buf_len = 0;
+
+	frr_mutex_lock_autounlock(&fnc->obuf_mutex);
+
+	switch (op) {
+	case DPLANE_OP_ROUTE_UPDATE:
+	case DPLANE_OP_ROUTE_DELETE:
+		nexthop = dplane_ctx_get_ng(ctx)->nexthop;
+		if (nexthop && nexthop->nh_srv6) {
+			rv = netlink_srv6_msg_encode(RTM_DELROUTE, ctx,
+								nl_buf, sizeof(nl_buf),
+								true, fnc->use_nhg);
+			if (rv <= 0) {
+				zlog_err(
+					"%s: netlink_srv6_msg_encode failed",
+					__func__);
+				return 0;
+			}
+		} else {
+			rv = netlink_route_multipath_msg_encode(RTM_DELROUTE, ctx,
+								nl_buf, sizeof(nl_buf),
+								true, fnc->use_nhg);
+			if (rv <= 0) {
+				zlog_err(
+					"%s: netlink_route_multipath_msg_encode failed",
+					__func__);
+				return 0;
+			}
+		}
+
+		nl_buf_len = (size_t)rv;
+
+		/* UPDATE operations need a INSTALL, otherwise just quit. */
+		if (op == DPLANE_OP_ROUTE_DELETE)
+			break;
+
+		/* FALL THROUGH */
+	case DPLANE_OP_ROUTE_INSTALL:
+		nexthop = dplane_ctx_get_ng(ctx)->nexthop;
+		if (nexthop && nexthop->nh_srv6) {
+			rv = netlink_srv6_msg_encode(
+				RTM_NEWROUTE, ctx, &nl_buf[nl_buf_len],
+				sizeof(nl_buf) - nl_buf_len, true, fnc->use_nhg);
+			if (rv <= 0) {
+				zlog_err(
+					"%s: netlink_srv6_msg_encode failed",
+					__func__);
+				return 0;
+			}
+		} else {
+			rv = netlink_route_multipath_msg_encode(
+				RTM_NEWROUTE, ctx, &nl_buf[nl_buf_len],
+				sizeof(nl_buf) - nl_buf_len, true, fnc->use_nhg);
+			if (rv <= 0) {
+				zlog_err(
+					"%s: netlink_route_multipath_msg_encode failed",
+					__func__);
+				return 0;
+			}
+		}
+
+		nl_buf_len += (size_t)rv;
+
+		break;
+
+	case DPLANE_OP_MAC_INSTALL:
+	case DPLANE_OP_MAC_DELETE:
+		rv = netlink_macfdb_update_ctx(ctx, nl_buf, sizeof(nl_buf));
+		if (rv <= 0) {
+			zlog_err("%s: netlink_macfdb_update_ctx failed",
+				 __func__);
+			return 0;
+		}
+
+		nl_buf_len = (size_t)rv;
+		break;
+
+	case DPLANE_OP_NH_DELETE:
+		rv = netlink_nexthop_msg_encode(RTM_DELNEXTHOP, ctx, nl_buf,
+						sizeof(nl_buf), true);
+		if (rv <= 0) {
+			zlog_err("%s: netlink_nexthop_msg_encode failed",
+				 __func__);
+			return 0;
+		}
+
+		nl_buf_len = (size_t)rv;
+		break;
+	case DPLANE_OP_NH_INSTALL:
+	case DPLANE_OP_NH_UPDATE:
+		rv = netlink_nexthop_msg_encode(RTM_NEWNEXTHOP, ctx, nl_buf,
+						sizeof(nl_buf), true);
+		if (rv <= 0) {
+			zlog_err("%s: netlink_nexthop_msg_encode failed",
+				 __func__);
+			return 0;
+		}
+
+		nl_buf_len = (size_t)rv;
+		break;
+
+	case DPLANE_OP_LSP_INSTALL:
+	case DPLANE_OP_LSP_UPDATE:
+	case DPLANE_OP_LSP_DELETE:
+		rv = netlink_lsp_msg_encoder(ctx, nl_buf, sizeof(nl_buf));
+		if (rv <= 0) {
+			zlog_err("%s: netlink_lsp_msg_encoder failed",
+				 __func__);
+			return 0;
+		}
+
+		nl_buf_len += (size_t)rv;
+		break;
+
+	case DPLANE_OP_ADDR_INSTALL:
+	case DPLANE_OP_ADDR_UNINSTALL:
+		if (strmatch(dplane_ctx_get_ifname(ctx), "lo"))
+			thread_add_timer(fnc->fthread->master, fpm_srv6_route_reset,
+				 fnc, 0, &fnc->t_ribreset);
+		break;
+
+	/* Un-handled by FPM at this time. */
+	case DPLANE_OP_PW_INSTALL:
+	case DPLANE_OP_PW_UNINSTALL:
+	case DPLANE_OP_NEIGH_INSTALL:
+	case DPLANE_OP_NEIGH_UPDATE:
+	case DPLANE_OP_NEIGH_DELETE:
+	case DPLANE_OP_VTEP_ADD:
+	case DPLANE_OP_VTEP_DELETE:
+	case DPLANE_OP_SYS_ROUTE_ADD:
+	case DPLANE_OP_SYS_ROUTE_DELETE:
+	case DPLANE_OP_ROUTE_NOTIFY:
+	case DPLANE_OP_LSP_NOTIFY:
+	case DPLANE_OP_RULE_ADD:
+	case DPLANE_OP_RULE_DELETE:
+	case DPLANE_OP_RULE_UPDATE:
+	case DPLANE_OP_NEIGH_DISCOVER:
+	case DPLANE_OP_BR_PORT_UPDATE:
+	case DPLANE_OP_IPTABLE_ADD:
+	case DPLANE_OP_IPTABLE_DELETE:
+	case DPLANE_OP_IPSET_ADD:
+	case DPLANE_OP_IPSET_DELETE:
+	case DPLANE_OP_IPSET_ENTRY_ADD:
+	case DPLANE_OP_IPSET_ENTRY_DELETE:
+	case DPLANE_OP_NEIGH_IP_INSTALL:
+	case DPLANE_OP_NEIGH_IP_DELETE:
+	case DPLANE_OP_NEIGH_TABLE_UPDATE:
+	case DPLANE_OP_GRE_SET:
+	case DPLANE_OP_INTF_ADDR_ADD:
+	case DPLANE_OP_INTF_ADDR_DEL:
+	case DPLANE_OP_INTF_NETCONFIG:
+	case DPLANE_OP_INTF_INSTALL:
+	case DPLANE_OP_INTF_UPDATE:
+	case DPLANE_OP_INTF_DELETE:
+	case DPLANE_OP_TC_QDISC_INSTALL:
+	case DPLANE_OP_TC_QDISC_UNINSTALL:
+	case DPLANE_OP_TC_CLASS_ADD:
+	case DPLANE_OP_TC_CLASS_DELETE:
+	case DPLANE_OP_TC_CLASS_UPDATE:
+	case DPLANE_OP_TC_FILTER_ADD:
+	case DPLANE_OP_TC_FILTER_DELETE:
+	case DPLANE_OP_TC_FILTER_UPDATE:
+	case DPLANE_OP_NONE:
+	case DPLANE_OP_STARTUP_STAGE:
+		break;
+
+	}
+
+	/* Skip empty enqueues. */
+	if (nl_buf_len == 0)
+		return 0;
+
+	/* We must know if someday a message goes beyond 65KiB. */
+	assert((nl_buf_len + FPM_HEADER_SIZE) <= UINT16_MAX);
+
+	/* Check if we have enough buffer space. */
+	if (STREAM_WRITEABLE(fnc->obuf) < (nl_buf_len + FPM_HEADER_SIZE)) {
+		atomic_fetch_add_explicit(&fnc->counters.buffer_full, 1,
+					  memory_order_relaxed);
+
+		if (IS_ZEBRA_DEBUG_FPM)
+			zlog_debug(
+				"%s: buffer full: wants to write %zu but has %zu",
+				__func__, nl_buf_len + FPM_HEADER_SIZE,
+				STREAM_WRITEABLE(fnc->obuf));
+
+		return -1;
+	}
+
+	/*
+	 * Fill in the FPM header information.
+	 *
+	 * See FPM_HEADER_SIZE definition for more information.
+	 */
+	stream_putc(fnc->obuf, 1);
+	stream_putc(fnc->obuf, 1);
+	stream_putw(fnc->obuf, nl_buf_len + FPM_HEADER_SIZE);
+
+	/* Write current data. */
+	stream_write(fnc->obuf, nl_buf, (size_t)nl_buf_len);
+
+	/* Account number of bytes waiting to be written. */
+	atomic_fetch_add_explicit(&fnc->counters.obuf_bytes,
+				  nl_buf_len + FPM_HEADER_SIZE,
+				  memory_order_relaxed);
+	obytes = atomic_load_explicit(&fnc->counters.obuf_bytes,
+				      memory_order_relaxed);
+	obytes_peak = atomic_load_explicit(&fnc->counters.obuf_peak,
+					   memory_order_relaxed);
+	if (obytes_peak < obytes)
+		atomic_store_explicit(&fnc->counters.obuf_peak, obytes,
+				      memory_order_relaxed);
+
+	/* Tell the thread to start writing. */
+	thread_add_write(fnc->fthread->master, fpm_write, fnc, fnc->socket,
+			 &fnc->t_write);
+
+	return 0;
+}
+
+/*
+ * LSP walk/send functions
+ */
+struct fpm_lsp_arg {
+	struct zebra_dplane_ctx *ctx;
+	struct fpm_nl_ctx *fnc;
+	bool complete;
+};
+
+static int fpm_lsp_send_cb(struct hash_bucket *bucket, void *arg)
+{
+	struct zebra_lsp *lsp = bucket->data;
+	struct fpm_lsp_arg *fla = arg;
+
+	/* Skip entries which have already been sent */
+	if (CHECK_FLAG(lsp->flags, LSP_FLAG_FPM))
+		return HASHWALK_CONTINUE;
+
+	dplane_ctx_reset(fla->ctx);
+	dplane_ctx_lsp_init(fla->ctx, DPLANE_OP_LSP_INSTALL, lsp);
+
+	if (fpm_nl_enqueue(fla->fnc, fla->ctx) == -1) {
+		fla->complete = false;
+		return HASHWALK_ABORT;
+	}
+
+	/* Mark entry as sent */
+	SET_FLAG(lsp->flags, LSP_FLAG_FPM);
+	return HASHWALK_CONTINUE;
+}
+
+static void fpm_lsp_send(struct thread *t)
+{
+	struct fpm_nl_ctx *fnc = THREAD_ARG(t);
+	struct zebra_vrf *zvrf = vrf_info_lookup(VRF_DEFAULT);
+	struct fpm_lsp_arg fla;
+
+	fla.fnc = fnc;
+	fla.ctx = dplane_ctx_alloc();
+	fla.complete = true;
+
+	hash_walk(zvrf->lsp_table, fpm_lsp_send_cb, &fla);
+
+	dplane_ctx_fini(&fla.ctx);
+
+	if (fla.complete) {
+		WALK_FINISH(fnc, FNE_LSP_FINISHED);
+
+		/* Now move onto routes */
+		thread_add_timer(zrouter.master, fpm_nhg_reset, fnc, 0,
+				 &fnc->t_nhgreset);
+	} else {
+		/* Didn't finish - reschedule LSP walk */
+		thread_add_timer(zrouter.master, fpm_lsp_send, fnc, 0,
+				 &fnc->t_lspwalk);
+	}
+}
+
+/*
+ * Next hop walk/send functions.
+ */
+struct fpm_nhg_arg {
+	struct zebra_dplane_ctx *ctx;
+	struct fpm_nl_ctx *fnc;
+	bool complete;
+};
+
+static int fpm_nhg_send_cb(struct hash_bucket *bucket, void *arg)
+{
+	struct nhg_hash_entry *nhe = bucket->data;
+	struct fpm_nhg_arg *fna = arg;
+
+	/* This entry was already sent, skip it. */
+	if (CHECK_FLAG(nhe->flags, NEXTHOP_GROUP_FPM))
+		return HASHWALK_CONTINUE;
+
+	/* Reset ctx to reuse allocated memory, take a snapshot and send it. */
+	dplane_ctx_reset(fna->ctx);
+	dplane_ctx_nexthop_init(fna->ctx, DPLANE_OP_NH_INSTALL, nhe);
+	if (fpm_nl_enqueue(fna->fnc, fna->ctx) == -1) {
+		/* Our buffers are full, lets give it some cycles. */
+		fna->complete = false;
+		return HASHWALK_ABORT;
+	}
+
+	/* Mark group as sent, so it doesn't get sent again. */
+	SET_FLAG(nhe->flags, NEXTHOP_GROUP_FPM);
+
+	return HASHWALK_CONTINUE;
+}
+
+static void fpm_nhg_send(struct thread *t)
+{
+	struct fpm_nl_ctx *fnc = THREAD_ARG(t);
+	struct fpm_nhg_arg fna;
+
+	fna.fnc = fnc;
+	fna.ctx = dplane_ctx_alloc();
+	fna.complete = true;
+
+	/* Send next hops. */
+	if (fnc->use_nhg)
+		hash_walk(zrouter.nhgs_id, fpm_nhg_send_cb, &fna);
+
+	/* `free()` allocated memory. */
+	dplane_ctx_fini(&fna.ctx);
+
+	/* We are done sending next hops, lets install the routes now. */
+	if (fna.complete) {
+		WALK_FINISH(fnc, FNE_NHG_FINISHED);
+		thread_add_timer(zrouter.master, fpm_rib_reset, fnc, 0,
+				 &fnc->t_ribreset);
+	} else /* Otherwise reschedule next hop group again. */
+		thread_add_timer(zrouter.master, fpm_nhg_send, fnc, 0,
+				 &fnc->t_nhgwalk);
+}
+
+/**
+ * Send all RIB installed routes to the connected data plane.
+ */
+static void fpm_rib_send(struct thread *t)
+{
+	struct fpm_nl_ctx *fnc = THREAD_ARG(t);
+	rib_dest_t *dest;
+	struct route_node *rn;
+	struct route_table *rt;
+	struct zebra_dplane_ctx *ctx;
+	rib_tables_iter_t rt_iter;
+
+	/* Allocate temporary context for all transactions. */
+	ctx = dplane_ctx_alloc();
+
+	rt_iter.state = RIB_TABLES_ITER_S_INIT;
+	while ((rt = rib_tables_iter_next(&rt_iter))) {
+		for (rn = route_top(rt); rn; rn = srcdest_route_next(rn)) {
+			dest = rib_dest_from_rnode(rn);
+			/* Skip bad route entries. */
+			if (dest == NULL || dest->selected_fib == NULL)
+				continue;
+
+			/* Check for already sent routes. */
+			if (CHECK_FLAG(dest->flags, RIB_DEST_UPDATE_FPM))
+				continue;
+
+			/* Enqueue route install. */
+			dplane_ctx_reset(ctx);
+			dplane_ctx_route_init(ctx, DPLANE_OP_ROUTE_INSTALL, rn,
+					      dest->selected_fib);
+			if (fpm_nl_enqueue(fnc, ctx) == -1) {
+				/* Free the temporary allocated context. */
+				dplane_ctx_fini(&ctx);
+
+				thread_add_timer(zrouter.master, fpm_rib_send,
+						 fnc, 1, &fnc->t_ribwalk);
+				return;
+			}
+
+			/* Mark as sent. */
+			SET_FLAG(dest->flags, RIB_DEST_UPDATE_FPM);
+		}
+	}
+
+	/* Free the temporary allocated context. */
+	dplane_ctx_fini(&ctx);
+
+	/* All RIB routes sent! */
+	WALK_FINISH(fnc, FNE_RIB_FINISHED);
+
+	/* Schedule next event: RMAC reset. */
+	thread_add_event(zrouter.master, fpm_rmac_reset, fnc, 0,
+			 &fnc->t_rmacreset);
+}
+
+/*
+ * The next three functions will handle RMAC enqueue.
+ */
+struct fpm_rmac_arg {
+	struct zebra_dplane_ctx *ctx;
+	struct fpm_nl_ctx *fnc;
+	struct zebra_l3vni *zl3vni;
+	bool complete;
+};
+
+static void fpm_enqueue_rmac_table(struct hash_bucket *bucket, void *arg)
+{
+	struct fpm_rmac_arg *fra = arg;
+	struct zebra_mac *zrmac = bucket->data;
+	struct zebra_if *zif = fra->zl3vni->vxlan_if->info;
+	const struct zebra_l2info_vxlan *vxl = &zif->l2info.vxl;
+	struct zebra_if *br_zif;
+	vlanid_t vid;
+	bool sticky;
+
+	/* Entry already sent. */
+	if (CHECK_FLAG(zrmac->flags, ZEBRA_MAC_FPM_SENT) || !fra->complete)
+		return;
+
+	sticky = !!CHECK_FLAG(zrmac->flags,
+			      (ZEBRA_MAC_STICKY | ZEBRA_MAC_REMOTE_DEF_GW));
+	br_zif = (struct zebra_if *)(zif->brslave_info.br_if->info);
+	vid = IS_ZEBRA_IF_BRIDGE_VLAN_AWARE(br_zif) ? vxl->access_vlan : 0;
+
+	dplane_ctx_reset(fra->ctx);
+	dplane_ctx_set_op(fra->ctx, DPLANE_OP_MAC_INSTALL);
+	dplane_mac_init(fra->ctx, fra->zl3vni->vxlan_if,
+			zif->brslave_info.br_if, vid,
+			&zrmac->macaddr, zrmac->fwd_info.r_vtep_ip, sticky,
+			0 /*nhg*/, 0 /*update_flags*/);
+	if (fpm_nl_enqueue(fra->fnc, fra->ctx) == -1) {
+		thread_add_timer(zrouter.master, fpm_rmac_send,
+				 fra->fnc, 1, &fra->fnc->t_rmacwalk);
+		fra->complete = false;
+	}
+}
+
+static void fpm_enqueue_l3vni_table(struct hash_bucket *bucket, void *arg)
+{
+	struct fpm_rmac_arg *fra = arg;
+	struct zebra_l3vni *zl3vni = bucket->data;
+
+	fra->zl3vni = zl3vni;
+	hash_iterate(zl3vni->rmac_table, fpm_enqueue_rmac_table, zl3vni);
+}
+
+static void fpm_rmac_send(struct thread *t)
+{
+	struct fpm_rmac_arg fra;
+
+	fra.fnc = THREAD_ARG(t);
+	fra.ctx = dplane_ctx_alloc();
+	fra.complete = true;
+	hash_iterate(zrouter.l3vni_table, fpm_enqueue_l3vni_table, &fra);
+	dplane_ctx_fini(&fra.ctx);
+
+	/* RMAC walk completed. */
+	if (fra.complete)
+		WALK_FINISH(fra.fnc, FNE_RMAC_FINISHED);
+}
+
+/*
+ * Resets the next hop FPM flags so we send all next hops again.
+ */
+static void fpm_nhg_reset_cb(struct hash_bucket *bucket, void *arg)
+{
+	struct nhg_hash_entry *nhe = bucket->data;
+
+	/* Unset FPM installation flag so it gets installed again. */
+	UNSET_FLAG(nhe->flags, NEXTHOP_GROUP_FPM);
+}
+
+static void fpm_nhg_reset(struct thread *t)
+{
+	struct fpm_nl_ctx *fnc = THREAD_ARG(t);
+
+	hash_iterate(zrouter.nhgs_id, fpm_nhg_reset_cb, NULL);
+
+	/* Schedule next step: send next hop groups. */
+	thread_add_event(zrouter.master, fpm_nhg_send, fnc, 0, &fnc->t_nhgwalk);
+}
+
+/*
+ * Resets the LSP FPM flag so we send all LSPs again.
+ */
+static void fpm_lsp_reset_cb(struct hash_bucket *bucket, void *arg)
+{
+	struct zebra_lsp *lsp = bucket->data;
+
+	UNSET_FLAG(lsp->flags, LSP_FLAG_FPM);
+}
+
+static void fpm_lsp_reset(struct thread *t)
+{
+	struct fpm_nl_ctx *fnc = THREAD_ARG(t);
+	struct zebra_vrf *zvrf = vrf_info_lookup(VRF_DEFAULT);
+
+	hash_iterate(zvrf->lsp_table, fpm_lsp_reset_cb, NULL);
+
+	/* Schedule next step: send LSPs */
+	thread_add_event(zrouter.master, fpm_lsp_send, fnc, 0, &fnc->t_lspwalk);
+}
+
+/**
+ * Resets the RIB FPM flags so we send all routes again.
+ */
+static void fpm_rib_reset(struct thread *t)
+{
+	struct fpm_nl_ctx *fnc = THREAD_ARG(t);
+	rib_dest_t *dest;
+	struct route_node *rn;
+	struct route_table *rt;
+	rib_tables_iter_t rt_iter;
+
+	rt_iter.state = RIB_TABLES_ITER_S_INIT;
+	while ((rt = rib_tables_iter_next(&rt_iter))) {
+		for (rn = route_top(rt); rn; rn = srcdest_route_next(rn)) {
+			dest = rib_dest_from_rnode(rn);
+			/* Skip bad route entries. */
+			if (dest == NULL)
+				continue;
+
+			UNSET_FLAG(dest->flags, RIB_DEST_UPDATE_FPM);
+		}
+	}
+
+	/* Schedule next step: send RIB routes. */
+	thread_add_event(zrouter.master, fpm_rib_send, fnc, 0, &fnc->t_ribwalk);
+}
+
+/*
+ * The next three function will handle RMAC table reset.
+ */
+static void fpm_unset_rmac_table(struct hash_bucket *bucket, void *arg)
+{
+	struct zebra_mac *zrmac = bucket->data;
+
+	UNSET_FLAG(zrmac->flags, ZEBRA_MAC_FPM_SENT);
+}
+
+static void fpm_unset_l3vni_table(struct hash_bucket *bucket, void *arg)
+{
+	struct zebra_l3vni *zl3vni = bucket->data;
+
+	hash_iterate(zl3vni->rmac_table, fpm_unset_rmac_table, zl3vni);
+}
+
+static void fpm_rmac_reset(struct thread *t)
+{
+	struct fpm_nl_ctx *fnc = THREAD_ARG(t);
+
+	hash_iterate(zrouter.l3vni_table, fpm_unset_l3vni_table, NULL);
+
+	/* Schedule next event: send RMAC entries. */
+	thread_add_event(zrouter.master, fpm_rmac_send, fnc, 0,
+			 &fnc->t_rmacwalk);
+}
+
+static void fpm_process_queue(struct thread *t)
+{
+	struct fpm_nl_ctx *fnc = THREAD_ARG(t);
+	struct zebra_dplane_ctx *ctx;
+	bool no_bufs = false;
+	uint64_t processed_contexts = 0;
+
+	while (true) {
+		/* No space available yet. */
+		if (STREAM_WRITEABLE(fnc->obuf) < NL_PKT_BUF_SIZE) {
+			no_bufs = true;
+			break;
+		}
+
+		/* Dequeue next item or quit processing. */
+		frr_with_mutex (&fnc->ctxqueue_mutex) {
+			ctx = dplane_ctx_dequeue(&fnc->ctxqueue);
+		}
+		if (ctx == NULL)
+			break;
+
+		/*
+		 * Intentionally ignoring the return value
+		 * as that we are ensuring that we can write to
+		 * the output data in the STREAM_WRITEABLE
+		 * check above, so we can ignore the return
+		 */
+		if (fnc->socket != -1)
+			(void)fpm_nl_enqueue(fnc, ctx);
+
+		/* Account the processed entries. */
+		processed_contexts++;
+		atomic_fetch_sub_explicit(&fnc->counters.ctxqueue_len, 1,
+					  memory_order_relaxed);
+
+		dplane_ctx_set_status(ctx, ZEBRA_DPLANE_REQUEST_SUCCESS);
+		dplane_provider_enqueue_out_ctx(fnc->prov, ctx);
+	}
+
+	/* Update count of processed contexts */
+	atomic_fetch_add_explicit(&fnc->counters.dplane_contexts,
+				  processed_contexts, memory_order_relaxed);
+
+	/* Re-schedule if we ran out of buffer space */
+	if (no_bufs)
+		thread_add_timer(fnc->fthread->master, fpm_process_queue,
+				 fnc, 0, &fnc->t_dequeue);
+
+	/*
+	 * Let the dataplane thread know if there are items in the
+	 * output queue to be processed. Otherwise they may sit
+	 * until the dataplane thread gets scheduled for new,
+	 * unrelated work.
+	 */
+	if (dplane_provider_out_ctx_queue_len(fnc->prov) > 0)
+		dplane_provider_work_ready();
+}
+
+/**
+ * Handles external (e.g. CLI, data plane or others) events.
+ */
+static void fpm_process_event(struct thread *t)
+{
+	struct fpm_nl_ctx *fnc = THREAD_ARG(t);
+	enum fpm_nl_events event = THREAD_VAL(t);
+
+	switch (event) {
+	case FNE_DISABLE:
+		zlog_info("%s: manual FPM disable event", __func__);
+		fnc->disabled = true;
+		atomic_fetch_add_explicit(&fnc->counters.user_disables, 1,
+					  memory_order_relaxed);
+
+		/* Call reconnect to disable timers and clean up context. */
+		fpm_reconnect(fnc);
+		break;
+
+	case FNE_RECONNECT:
+		zlog_info("%s: manual FPM reconnect event", __func__);
+		fnc->disabled = false;
+		atomic_fetch_add_explicit(&fnc->counters.user_configures, 1,
+					  memory_order_relaxed);
+		fpm_reconnect(fnc);
+		break;
+
+	case FNE_RESET_COUNTERS:
+		zlog_info("%s: manual FPM counters reset event", __func__);
+		memset(&fnc->counters, 0, sizeof(fnc->counters));
+		break;
+
+	case FNE_TOGGLE_NHG:
+		zlog_info("%s: toggle next hop groups support", __func__);
+		fnc->use_nhg = !fnc->use_nhg;
+		fpm_reconnect(fnc);
+		break;
+
+	case FNE_INTERNAL_RECONNECT:
+		fpm_reconnect(fnc);
+		break;
+
+	case FNE_NHG_FINISHED:
+		if (IS_ZEBRA_DEBUG_FPM)
+			zlog_debug("%s: next hop groups walk finished",
+				   __func__);
+		break;
+	case FNE_RIB_FINISHED:
+		if (IS_ZEBRA_DEBUG_FPM)
+			zlog_debug("%s: RIB walk finished", __func__);
+		break;
+	case FNE_RMAC_FINISHED:
+		if (IS_ZEBRA_DEBUG_FPM)
+			zlog_debug("%s: RMAC walk finished", __func__);
+		break;
+	case FNE_LSP_FINISHED:
+		if (IS_ZEBRA_DEBUG_FPM)
+			zlog_debug("%s: LSP walk finished", __func__);
+		break;
+	}
+}
+
+/*
+ * Data plane functions.
+ */
+static int fpm_nl_start(struct zebra_dplane_provider *prov)
+{
+	struct fpm_nl_ctx *fnc;
+
+	fnc = dplane_provider_get_data(prov);
+	fnc->fthread = frr_pthread_new(NULL, prov_name, prov_name);
+	assert(frr_pthread_run(fnc->fthread, NULL) == 0);
+	fnc->ibuf = stream_new(NL_PKT_BUF_SIZE);
+	fnc->obuf = stream_new(NL_PKT_BUF_SIZE * 128);
+	pthread_mutex_init(&fnc->obuf_mutex, NULL);
+	fnc->socket = -1;
+	fnc->disabled = true;
+	fnc->prov = prov;
+	dplane_ctx_q_init(&fnc->ctxqueue);
+	pthread_mutex_init(&fnc->ctxqueue_mutex, NULL);
+
+	/* Set default values. */
+	fnc->use_nhg = true;
+
+	return 0;
+}
+
+static int fpm_nl_finish_early(struct fpm_nl_ctx *fnc)
+{
+	/* Disable all events and close socket. */
+	THREAD_OFF(fnc->t_lspreset);
+	THREAD_OFF(fnc->t_lspwalk);
+	THREAD_OFF(fnc->t_nhgreset);
+	THREAD_OFF(fnc->t_nhgwalk);
+	THREAD_OFF(fnc->t_ribreset);
+	THREAD_OFF(fnc->t_ribwalk);
+	THREAD_OFF(fnc->t_rmacreset);
+	THREAD_OFF(fnc->t_rmacwalk);
+	THREAD_OFF(fnc->t_event);
+	THREAD_OFF(fnc->t_nhg);
+	thread_cancel_async(fnc->fthread->master, &fnc->t_read, NULL);
+	thread_cancel_async(fnc->fthread->master, &fnc->t_write, NULL);
+	thread_cancel_async(fnc->fthread->master, &fnc->t_connect, NULL);
+
+	if (fnc->socket != -1) {
+		close(fnc->socket);
+		fnc->socket = -1;
+	}
+
+	return 0;
+}
+
+static int fpm_nl_finish_late(struct fpm_nl_ctx *fnc)
+{
+	/* Stop the running thread. */
+	frr_pthread_stop(fnc->fthread, NULL);
+
+	/* Free all allocated resources. */
+	pthread_mutex_destroy(&fnc->obuf_mutex);
+	pthread_mutex_destroy(&fnc->ctxqueue_mutex);
+	stream_free(fnc->ibuf);
+	stream_free(fnc->obuf);
+	free(gfnc);
+	gfnc = NULL;
+
+	return 0;
+}
+
+static int fpm_nl_finish(struct zebra_dplane_provider *prov, bool early)
+{
+	struct fpm_nl_ctx *fnc;
+
+	fnc = dplane_provider_get_data(prov);
+	if (early)
+		return fpm_nl_finish_early(fnc);
+
+	return fpm_nl_finish_late(fnc);
+}
+
+static int fpm_nl_process(struct zebra_dplane_provider *prov)
+{
+	struct zebra_dplane_ctx *ctx;
+	struct fpm_nl_ctx *fnc;
+	int counter, limit;
+	uint64_t cur_queue, peak_queue = 0, stored_peak_queue;
+
+	fnc = dplane_provider_get_data(prov);
+	limit = dplane_provider_get_work_limit(prov);
+	for (counter = 0; counter < limit; counter++) {
+		ctx = dplane_provider_dequeue_in_ctx(prov);
+		if (ctx == NULL)
+			break;
+
+		/*
+		 * Skip all notifications if not connected, we'll walk the RIB
+		 * anyway.
+		 */
+		if (fnc->socket != -1 && fnc->connecting == false) {
+			/*
+			 * Update the number of queued contexts *before*
+			 * enqueueing, to ensure counter consistency.
+			 */
+			atomic_fetch_add_explicit(&fnc->counters.ctxqueue_len,
+						  1, memory_order_relaxed);
+
+			frr_with_mutex (&fnc->ctxqueue_mutex) {
+				dplane_ctx_enqueue_tail(&fnc->ctxqueue, ctx);
+			}
+
+			cur_queue = atomic_load_explicit(
+				&fnc->counters.ctxqueue_len,
+				memory_order_relaxed);
+			if (peak_queue < cur_queue)
+				peak_queue = cur_queue;
+			continue;
+		}
+
+		dplane_ctx_set_status(ctx, ZEBRA_DPLANE_REQUEST_SUCCESS);
+		dplane_provider_enqueue_out_ctx(prov, ctx);
+	}
+
+	/* Update peak queue length, if we just observed a new peak */
+	stored_peak_queue = atomic_load_explicit(
+		&fnc->counters.ctxqueue_len_peak, memory_order_relaxed);
+	if (stored_peak_queue < peak_queue)
+		atomic_store_explicit(&fnc->counters.ctxqueue_len_peak,
+				      peak_queue, memory_order_relaxed);
+
+	if (atomic_load_explicit(&fnc->counters.ctxqueue_len,
+				 memory_order_relaxed)
+	    > 0)
+		thread_add_timer(fnc->fthread->master, fpm_process_queue,
+				 fnc, 0, &fnc->t_dequeue);
+
+	/* Ensure dataplane thread is rescheduled if we hit the work limit */
+	if (counter >= limit)
+		dplane_provider_work_ready();
+
+	return 0;
+}
+
+static int fpm_nl_new(struct thread_master *tm)
+{
+	struct zebra_dplane_provider *prov = NULL;
+	int rv;
+
+	gfnc = calloc(1, sizeof(*gfnc));
+	rv = dplane_provider_register(prov_name, DPLANE_PRIO_POSTPROCESS,
+				      DPLANE_PROV_FLAG_THREADED, fpm_nl_start,
+				      fpm_nl_process, fpm_nl_finish, gfnc,
+				      &prov);
+
+	if (IS_ZEBRA_DEBUG_DPLANE)
+		zlog_debug("%s register status: %d", prov_name, rv);
+
+	install_node(&fpm_node);
+	install_element(ENABLE_NODE, &fpm_show_counters_cmd);
+	install_element(ENABLE_NODE, &fpm_show_counters_json_cmd);
+	install_element(ENABLE_NODE, &fpm_reset_counters_cmd);
+	install_element(CONFIG_NODE, &fpm_set_address_cmd);
+	install_element(CONFIG_NODE, &no_fpm_set_address_cmd);
+	install_element(CONFIG_NODE, &fpm_use_nhg_cmd);
+	install_element(CONFIG_NODE, &no_fpm_use_nhg_cmd);
+
+	return 0;
+}
+
+static int fpm_nl_init(void)
+{
+	hook_register(frr_late_init, fpm_nl_new);
+	return 0;
+}
+
+FRR_MODULE_SETUP(
+	.name = "dplane_fpm_sonic",
+	.version = "0.0.1",
+	.description = "Data plane plugin for FPM using netlink.",
+	.init = fpm_nl_init,
+);
diff --git a/src/sonic-frr/patch/build-dplane-fpm-sonic-module.patch b/src/sonic-frr/patch/build-dplane-fpm-sonic-module.patch
new file mode 100644
index 000000000..1ada5d960
--- /dev/null
+++ b/src/sonic-frr/patch/build-dplane-fpm-sonic-module.patch
@@ -0,0 +1,52 @@
+Build dplane_fpm_sonic module
+
+From: Carmine Scarpitta <cscarpit@cisco.com>
+
+Signed-off-by: Carmine Scarpitta <cscarpit@cisco.com>
+---
+ debian/frr.install |    1 +
+ redhat/frr.spec.in |    1 +
+ zebra/subdir.am    |    6 ++++++
+ 3 files changed, 8 insertions(+)
+
+diff --git a/debian/frr.install b/debian/frr.install
+index 044b48498..f53b874e3 100644
+--- a/debian/frr.install
++++ b/debian/frr.install
+@@ -10,6 +10,7 @@ usr/lib/*/frr/libfrrcares.*
+ usr/lib/*/frr/libfrrospfapiclient.*
+ usr/lib/*/frr/modules/bgpd_bmp.so
+ usr/lib/*/frr/modules/dplane_fpm_nl.so
++usr/lib/*/frr/modules/dplane_fpm_sonic.so
+ usr/lib/*/frr/modules/zebra_cumulus_mlag.so
+ usr/lib/*/frr/modules/zebra_fpm.so
+ usr/lib/*/frr/modules/zebra_irdp.so
+diff --git a/redhat/frr.spec.in b/redhat/frr.spec.in
+index 4afd562a8..2eab817c9 100644
+--- a/redhat/frr.spec.in
++++ b/redhat/frr.spec.in
+@@ -714,6 +714,7 @@ fi
+ %endif
+ %{_libdir}/frr/modules/zebra_cumulus_mlag.so
+ %{_libdir}/frr/modules/dplane_fpm_nl.so
++%{_libdir}/frr/modules/dplane_fpm_sonic.so
+ %{_libdir}/frr/modules/zebra_irdp.so
+ %{_libdir}/frr/modules/bgpd_bmp.so
+ %{_bindir}/*
+diff --git a/zebra/subdir.am b/zebra/subdir.am
+index 5c4a87b93..3f1807d26 100644
+--- a/zebra/subdir.am
++++ b/zebra/subdir.am
+@@ -236,6 +236,12 @@ zebra_dplane_fpm_nl_la_LDFLAGS = $(MODULE_LDFLAGS)
+ zebra_dplane_fpm_nl_la_LIBADD  =
+ endif
+ 
++module_LTLIBRARIES += zebra/dplane_fpm_sonic.la
++
++zebra_dplane_fpm_sonic_la_SOURCES = zebra/dplane_fpm_sonic.c
++zebra_dplane_fpm_sonic_la_LDFLAGS = $(MODULE_LDFLAGS)
++zebra_dplane_fpm_sonic_la_LIBADD  =
++
+ if NETLINK_DEBUG
+ zebra_zebra_SOURCES += \
+ 	zebra/debug_nl.c \
diff --git a/src/sonic-frr/patch/series b/src/sonic-frr/patch/series
index 1606b6706..c14a56f5b 100644
--- a/src/sonic-frr/patch/series
+++ b/src/sonic-frr/patch/series
@@ -51,3 +51,4 @@
 0051-bgpd-backpressure-fix-ret-value-evpn_route_select_in.patch
 0052-bgpd-backpressure-log-error-for-evpn-when-route-inst.patch
 0053-bgpd-Set-md5-TCP-socket-option-for-outgoing-connections-on-listener.patch
+build-dplane-fpm-sonic-module.patch

From 23792e64725f19bb95c6990b8e726d6842b319be Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Tue, 1 Oct 2024 19:01:11 +0800
Subject: [PATCH 1045/1115] [submodule] Update submodule sonic-utilities to the
 latest HEAD automatically (#20392)

#### Why I did it
src/sonic-utilities
```
* 66b41e5f - (HEAD -> master, origin/master, origin/HEAD) [fast/warm-reboot] Improve retry mechanism to check if SAI_OBJECT_TYPE_ACL_ENTRY entries are in redis (#3548) (10 hours ago) [Andriy Yurkiv]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-utilities | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-utilities b/src/sonic-utilities
index 94ec7108a..66b41e5f3 160000
--- a/src/sonic-utilities
+++ b/src/sonic-utilities
@@ -1 +1 @@
-Subproject commit 94ec7108a85aff9b89f5622ef768530b36450064
+Subproject commit 66b41e5f3a4f2ece1cf849a3810aeada602f6f7d

From aefaf9413894244ee0347e0961a5c2f1a834caec Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Tue, 1 Oct 2024 19:01:17 +0800
Subject: [PATCH 1046/1115] [submodule] Update submodule sonic-swss-common to
 the latest HEAD automatically (#20374)

#### Why I did it
src/sonic-swss-common
```
* 898aa5d - (HEAD -> master, origin/master, origin/HEAD) Add VRF support to ZMQ server/client (#920) (26 hours ago) [Hua Liu]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-swss-common | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-swss-common b/src/sonic-swss-common
index 24979b05f..898aa5dbe 160000
--- a/src/sonic-swss-common
+++ b/src/sonic-swss-common
@@ -1 +1 @@
-Subproject commit 24979b05ff9c2daa18432abcd0dd8518bd5c7e60
+Subproject commit 898aa5dbee22920847dafb0849907d55c8a84816

From 8cd3cffad9aa030a284c641a06ba4ca3d467faee Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Wed, 2 Oct 2024 19:01:19 +0800
Subject: [PATCH 1047/1115] [submodule] Update submodule sonic-platform-daemons
 to the latest HEAD automatically (#20403)

#### Why I did it
src/sonic-platform-daemons
```
* 604e454 - (HEAD -> master, origin/master, origin/HEAD) Improve parsing of media-settings.json for non-CMIS and breakout ports (#533) (22 hours ago) [longhuan-cisco]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-platform-daemons | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-platform-daemons b/src/sonic-platform-daemons
index 2c39785a8..604e454e6 160000
--- a/src/sonic-platform-daemons
+++ b/src/sonic-platform-daemons
@@ -1 +1 @@
-Subproject commit 2c39785a8d82a57429b1bc5b3b544751ca18aa88
+Subproject commit 604e454e6f54385961b0350cd0bb04a14daf4cc9

From a50fa4abf0775c8bc5b50b9a751569dfabbaf8cf Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Wed, 2 Oct 2024 19:01:30 +0800
Subject: [PATCH 1048/1115] [submodule] Update submodule sonic-linux-kernel to
 the latest HEAD automatically (#20045)

#### Why I did it
src/sonic-linux-kernel
```
* b2f73b6 - (HEAD -> master, origin/master, origin/HEAD) include adm1275 config within kconfig for usage on cisco platform (#432) (35 hours ago) [Gregory Boudreau]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-linux-kernel | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-linux-kernel b/src/sonic-linux-kernel
index 72d451673..b2f73b600 160000
--- a/src/sonic-linux-kernel
+++ b/src/sonic-linux-kernel
@@ -1 +1 @@
-Subproject commit 72d451673d0d84ec274ebc5ad6fafc0ec7d6bd57
+Subproject commit b2f73b600b0aa97f7260006fb6d2eb87ca898246

From ec20ff3f4382f9b149ddeceafedb4cf220e80a17 Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Thu, 3 Oct 2024 16:01:26 +0800
Subject: [PATCH 1049/1115] [submodule] Update submodule sonic-utilities to the
 latest HEAD automatically (#20411)

#### Why I did it
src/sonic-utilities
```
* 008a078a - (HEAD -> master, origin/master, origin/HEAD) Add Unit Test for portstat (#3564) (5 hours ago) [Changrong Wu]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-utilities | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-utilities b/src/sonic-utilities
index 66b41e5f3..008a078a5 160000
--- a/src/sonic-utilities
+++ b/src/sonic-utilities
@@ -1 +1 @@
-Subproject commit 66b41e5f3a4f2ece1cf849a3810aeada602f6f7d
+Subproject commit 008a078a531965f589e319dab1c0b91ca13a6f28

From c7dc8e97108134caf6da68d2ecbb921b7da7e84b Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Thu, 3 Oct 2024 19:01:05 +0800
Subject: [PATCH 1050/1115] [submodule] Update submodule sonic-sairedis to the
 latest HEAD automatically (#20410)

#### Why I did it
src/sonic-sairedis
```
* 24843d41 - (HEAD -> master, origin/master, origin/HEAD) [Mellanox] Resolve New Line Formatting Issues in syncd's sai.profile (#1412) (14 hours ago) [Tomer Shalvi]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-sairedis | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-sairedis b/src/sonic-sairedis
index 9b9d33060..24843d419 160000
--- a/src/sonic-sairedis
+++ b/src/sonic-sairedis
@@ -1 +1 @@
-Subproject commit 9b9d3306080e25568dd89261de87beac01738a0a
+Subproject commit 24843d41955c8724bb7f196e38e420e760bce07f

From 7ca784a7e20cd75b004a7dcce9832cf2af78f34b Mon Sep 17 00:00:00 2001
From: mssonicbld <79238446+mssonicbld@users.noreply.github.com>
Date: Thu, 3 Oct 2024 19:01:09 +0800
Subject: [PATCH 1051/1115] [submodule] Update submodule sonic-mgmt-common to
 the latest HEAD automatically (#20409)

#### Why I did it
src/sonic-mgmt-common
```
* b91a4df - (HEAD -> master, origin/master, origin/HEAD) PortChannel Interface Static Support - OpenConfig Yang (#142) (9 hours ago) [Satoru Shinohara]
```
#### How I did it
#### How to verify it
#### Description for the changelog
---
 src/sonic-mgmt-common | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-mgmt-common b/src/sonic-mgmt-common
index 966adc0d9..b91a4df3b 160000
--- a/src/sonic-mgmt-common
+++ b/src/sonic-mgmt-common
@@ -1 +1 @@
-Subproject commit 966adc0d92f7c5e2f77636288653489bb97d9deb
+Subproject commit b91a4df3bd0e4be97e67ab3f27b1826b1713afc5

From e18cecb4f6282abc674998c46166c7a8a9f41df7 Mon Sep 17 00:00:00 2001
From: judyjoseph <53951155+judyjoseph@users.noreply.github.com>
Date: Thu, 3 Oct 2024 14:45:26 -0700
Subject: [PATCH 1052/1115] sort the system port ID generation (#20075)

#### Why I did it
The system_port_id generation was based on the loop below

for interface in **interface_metadata.findall**(str(QName(ns1, "DeviceInterfaceMetadata"))):

"DeviceInterfaceMetadata" defined in the minigraph in DeviceInfo section, which is per interface and in this loop we increment the system_port_id++ so that each interface will have a unique ID.

The for loop was based on interface_metadata list extracted by findall() API matching tag **"DeviceInterfaceMetadata"** [lxml.etree._Element](https://lxml.de/api/lxml.etree._Element-class.html). findall() doesn't guarantee document order. Hence the interface list and the corresponding system_port ids generated - has a possibility of not matching across config_db's in different linecards of a chassis.

When SYSTEM_PORT table entries hve mismatch across linecards, a few line cards behaving erratically, resulting in continuous pkt error interrupts getting fired and the IBGP sessions not getting established with other peer ASIC's in other line cards.

### How I did it
Add logic to do a sort of the system_ports dictionary based on the key (eg: "str-sonic-lc03|ASIC0|Ethernet120") and assign the system_port_id in an incremental way.

This makes sure the system_port_ids in SYSTEM_PORT table in config_db matches in all linecards/asic

Thanks to @abdosi and @vmittal-msft in triaging and coming to this solution.

#### How to verify it

Verified by manually patching this logic in the minigraph parser in the sonic T2 chassis and make sure the dockers, interfaces, IBGP, EBGP comes up in all linecards across the chassis.
---
 src/sonic-config-engine/minigraph.py          |   11 +-
 .../voq_chassis_data/system_ports.json        | 2282 ++++++++---------
 2 files changed, 1149 insertions(+), 1144 deletions(-)

diff --git a/src/sonic-config-engine/minigraph.py b/src/sonic-config-engine/minigraph.py
index c9d060993..41fbd383b 100644
--- a/src/sonic-config-engine/minigraph.py
+++ b/src/sonic-config-engine/minigraph.py
@@ -342,14 +342,13 @@ def parse_chassis_deviceinfo_intf_metadata(device_info, chassis_linecards_info,
             if linecard_name is not None:
                 key = "%s|%s" % (linecard_name, key)
             system_ports[key] = {
-                "system_port_id": system_port_id,
+                "system_port_id": 0,
                 "switch_id": switch_id,
                 "core_index": core_id,
                 "core_port_index": core_port_id,
                 "speed": intf_speed,
                 "num_voq": num_voq
             }
-            system_port_id += 1
 
         chassis_port_alias.setdefault(slot_index, {}).update(
             {(intf_sonic_name, intf_speed): intf_name})
@@ -363,8 +362,14 @@ def parse_chassis_deviceinfo_intf_metadata(device_info, chassis_linecards_info,
             port_default_speed.setdefault(slot_index, {}).update(
                 {intf_sonic_name: intf_speed})
 
-    return system_ports, chassis_port_alias, port_default_speed
+    # The above loop with findall("DeviceInterfaceMetadata") was not giving interfaces from minigraph
+    # in document order. So doing an explict sort so that system_port_ids remain same across LCs
+    sorted_system_ports = { key:system_ports[key] for key in sorted(system_ports.keys()) }
+    for k,v in sorted_system_ports.items():
+        v["system_port_id"] = system_port_id
+        system_port_id += 1
 
+    return sorted_system_ports, chassis_port_alias, port_default_speed
 
 
 def parse_chassis_deviceinfo_voq_int_intfs(device_info):
diff --git a/src/sonic-config-engine/tests/chassis_data/voq_chassis_data/system_ports.json b/src/sonic-config-engine/tests/chassis_data/voq_chassis_data/system_ports.json
index 0cb7e777b..eb44ab1cc 100644
--- a/src/sonic-config-engine/tests/chassis_data/voq_chassis_data/system_ports.json
+++ b/src/sonic-config-engine/tests/chassis_data/voq_chassis_data/system_ports.json
@@ -1,22 +1,70 @@
 {
-    "str-sonic-lc03|ASIC0|Ethernet0": {
+    "str-sonic-lc03|ASIC0|Ethernet-IB0": {
         "system_port_id": 1,
         "switch_id": 8,
         "core_index": "1",
-        "core_port_index": "1",
+        "core_port_index": "50",
         "speed": "400000",
         "num_voq": "8"
     },
-    "str-sonic-lc03|ASIC0|Ethernet8": {
+    "str-sonic-lc03|ASIC0|Ethernet-Rec0": {
         "system_port_id": 2,
         "switch_id": 8,
+        "core_index": "0",
+        "core_port_index": "49",
+        "speed": "400000",
+        "num_voq": "8"
+    },
+    "str-sonic-lc03|ASIC0|Ethernet0": {
+        "system_port_id": 3,
+        "switch_id": 8,
         "core_index": "1",
-        "core_port_index": "2",
+        "core_port_index": "1",
+        "speed": "400000",
+        "num_voq": "8"
+    },
+    "str-sonic-lc03|ASIC0|Ethernet104": {
+        "system_port_id": 4,
+        "switch_id": 8,
+        "core_index": "0",
+        "core_port_index": "14",
+        "speed": "400000",
+        "num_voq": "8"
+    },
+    "str-sonic-lc03|ASIC0|Ethernet112": {
+        "system_port_id": 5,
+        "switch_id": 8,
+        "core_index": "0",
+        "core_port_index": "15",
+        "speed": "400000",
+        "num_voq": "8"
+    },
+    "str-sonic-lc03|ASIC0|Ethernet120": {
+        "system_port_id": 6,
+        "switch_id": 8,
+        "core_index": "0",
+        "core_port_index": "16",
+        "speed": "400000",
+        "num_voq": "8"
+    },
+    "str-sonic-lc03|ASIC0|Ethernet128": {
+        "system_port_id": 7,
+        "switch_id": 8,
+        "core_index": "0",
+        "core_port_index": "17",
+        "speed": "400000",
+        "num_voq": "8"
+    },
+    "str-sonic-lc03|ASIC0|Ethernet136": {
+        "system_port_id": 8,
+        "switch_id": 8,
+        "core_index": "0",
+        "core_port_index": "18",
         "speed": "400000",
         "num_voq": "8"
     },
     "str-sonic-lc03|ASIC0|Ethernet16": {
-        "system_port_id": 3,
+        "system_port_id": 9,
         "switch_id": 8,
         "core_index": "1",
         "core_port_index": "3",
@@ -24,7 +72,7 @@
         "num_voq": "8"
     },
     "str-sonic-lc03|ASIC0|Ethernet24": {
-        "system_port_id": 4,
+        "system_port_id": 10,
         "switch_id": 8,
         "core_index": "1",
         "core_port_index": "4",
@@ -32,7 +80,7 @@
         "num_voq": "8"
     },
     "str-sonic-lc03|ASIC0|Ethernet32": {
-        "system_port_id": 5,
+        "system_port_id": 11,
         "switch_id": 8,
         "core_index": "1",
         "core_port_index": "5",
@@ -40,7 +88,7 @@
         "num_voq": "8"
     },
     "str-sonic-lc03|ASIC0|Ethernet40": {
-        "system_port_id": 6,
+        "system_port_id": 12,
         "switch_id": 8,
         "core_index": "1",
         "core_port_index": "6",
@@ -48,7 +96,7 @@
         "num_voq": "8"
     },
     "str-sonic-lc03|ASIC0|Ethernet48": {
-        "system_port_id": 7,
+        "system_port_id": 13,
         "switch_id": 8,
         "core_index": "1",
         "core_port_index": "7",
@@ -56,7 +104,7 @@
         "num_voq": "8"
     },
     "str-sonic-lc03|ASIC0|Ethernet56": {
-        "system_port_id": 8,
+        "system_port_id": 14,
         "switch_id": 8,
         "core_index": "1",
         "core_port_index": "8",
@@ -64,7 +112,7 @@
         "num_voq": "8"
     },
     "str-sonic-lc03|ASIC0|Ethernet64": {
-        "system_port_id": 9,
+        "system_port_id": 15,
         "switch_id": 8,
         "core_index": "1",
         "core_port_index": "9",
@@ -72,15 +120,23 @@
         "num_voq": "8"
     },
     "str-sonic-lc03|ASIC0|Ethernet72": {
-        "system_port_id": 10,
+        "system_port_id": 16,
         "switch_id": 8,
         "core_index": "0",
         "core_port_index": "10",
         "speed": "400000",
         "num_voq": "8"
     },
+    "str-sonic-lc03|ASIC0|Ethernet8": {
+        "system_port_id": 17,
+        "switch_id": 8,
+        "core_index": "1",
+        "core_port_index": "2",
+        "speed": "400000",
+        "num_voq": "8"
+    },
     "str-sonic-lc03|ASIC0|Ethernet80": {
-        "system_port_id": 11,
+        "system_port_id": 18,
         "switch_id": 8,
         "core_index": "0",
         "core_port_index": "11",
@@ -88,7 +144,7 @@
         "num_voq": "8"
     },
     "str-sonic-lc03|ASIC0|Ethernet88": {
-        "system_port_id": 12,
+        "system_port_id": 19,
         "switch_id": 8,
         "core_index": "0",
         "core_port_index": "12",
@@ -96,55 +152,39 @@
         "num_voq": "8"
     },
     "str-sonic-lc03|ASIC0|Ethernet96": {
-        "system_port_id": 13,
+        "system_port_id": 20,
         "switch_id": 8,
         "core_index": "0",
         "core_port_index": "13",
         "speed": "400000",
         "num_voq": "8"
     },
-    "str-sonic-lc03|ASIC0|Ethernet104": {
-        "system_port_id": 14,
-        "switch_id": 8,
-        "core_index": "0",
-        "core_port_index": "14",
-        "speed": "400000",
-        "num_voq": "8"
-    },
-    "str-sonic-lc03|ASIC0|Ethernet112": {
-        "system_port_id": 15,
-        "switch_id": 8,
-        "core_index": "0",
-        "core_port_index": "15",
-        "speed": "400000",
-        "num_voq": "8"
-    },
-    "str-sonic-lc03|ASIC0|Ethernet120": {
-        "system_port_id": 16,
+    "str-sonic-lc03|ASIC0|cpu0": {
+        "system_port_id": 21,
         "switch_id": 8,
-        "core_index": "0",
-        "core_port_index": "16",
-        "speed": "400000",
+        "core_index": 0,
+        "core_port_index": 0,
+        "speed": "10000",
         "num_voq": "8"
     },
-    "str-sonic-lc03|ASIC0|Ethernet128": {
-        "system_port_id": 17,
-        "switch_id": 8,
-        "core_index": "0",
-        "core_port_index": "17",
+    "str-sonic-lc03|ASIC1|Ethernet-IB1": {
+        "system_port_id": 22,
+        "switch_id": 10,
+        "core_index": "1",
+        "core_port_index": "50",
         "speed": "400000",
         "num_voq": "8"
     },
-    "str-sonic-lc03|ASIC0|Ethernet136": {
-        "system_port_id": 18,
-        "switch_id": 8,
+    "str-sonic-lc03|ASIC1|Ethernet-Rec1": {
+        "system_port_id": 23,
+        "switch_id": 10,
         "core_index": "0",
-        "core_port_index": "18",
+        "core_port_index": "49",
         "speed": "400000",
         "num_voq": "8"
     },
     "str-sonic-lc03|ASIC1|Ethernet144": {
-        "system_port_id": 19,
+        "system_port_id": 24,
         "switch_id": 10,
         "core_index": "1",
         "core_port_index": "1",
@@ -152,7 +192,7 @@
         "num_voq": "8"
     },
     "str-sonic-lc03|ASIC1|Ethernet152": {
-        "system_port_id": 20,
+        "system_port_id": 25,
         "switch_id": 10,
         "core_index": "1",
         "core_port_index": "2",
@@ -160,7 +200,7 @@
         "num_voq": "8"
     },
     "str-sonic-lc03|ASIC1|Ethernet160": {
-        "system_port_id": 21,
+        "system_port_id": 26,
         "switch_id": 10,
         "core_index": "1",
         "core_port_index": "3",
@@ -168,7 +208,7 @@
         "num_voq": "8"
     },
     "str-sonic-lc03|ASIC1|Ethernet168": {
-        "system_port_id": 22,
+        "system_port_id": 27,
         "switch_id": 10,
         "core_index": "1",
         "core_port_index": "4",
@@ -176,7 +216,7 @@
         "num_voq": "8"
     },
     "str-sonic-lc03|ASIC1|Ethernet176": {
-        "system_port_id": 23,
+        "system_port_id": 28,
         "switch_id": 10,
         "core_index": "1",
         "core_port_index": "5",
@@ -184,7 +224,7 @@
         "num_voq": "8"
     },
     "str-sonic-lc03|ASIC1|Ethernet184": {
-        "system_port_id": 24,
+        "system_port_id": 29,
         "switch_id": 10,
         "core_index": "1",
         "core_port_index": "6",
@@ -192,7 +232,7 @@
         "num_voq": "8"
     },
     "str-sonic-lc03|ASIC1|Ethernet192": {
-        "system_port_id": 25,
+        "system_port_id": 30,
         "switch_id": 10,
         "core_index": "1",
         "core_port_index": "7",
@@ -200,7 +240,7 @@
         "num_voq": "8"
     },
     "str-sonic-lc03|ASIC1|Ethernet200": {
-        "system_port_id": 26,
+        "system_port_id": 31,
         "switch_id": 10,
         "core_index": "1",
         "core_port_index": "8",
@@ -208,7 +248,7 @@
         "num_voq": "8"
     },
     "str-sonic-lc03|ASIC1|Ethernet208": {
-        "system_port_id": 27,
+        "system_port_id": 32,
         "switch_id": 10,
         "core_index": "1",
         "core_port_index": "9",
@@ -216,7 +256,7 @@
         "num_voq": "8"
     },
     "str-sonic-lc03|ASIC1|Ethernet216": {
-        "system_port_id": 28,
+        "system_port_id": 33,
         "switch_id": 10,
         "core_index": "0",
         "core_port_index": "10",
@@ -224,7 +264,7 @@
         "num_voq": "8"
     },
     "str-sonic-lc03|ASIC1|Ethernet224": {
-        "system_port_id": 29,
+        "system_port_id": 34,
         "switch_id": 10,
         "core_index": "0",
         "core_port_index": "11",
@@ -232,7 +272,7 @@
         "num_voq": "8"
     },
     "str-sonic-lc03|ASIC1|Ethernet232": {
-        "system_port_id": 30,
+        "system_port_id": 35,
         "switch_id": 10,
         "core_index": "0",
         "core_port_index": "12",
@@ -240,7 +280,7 @@
         "num_voq": "8"
     },
     "str-sonic-lc03|ASIC1|Ethernet240": {
-        "system_port_id": 31,
+        "system_port_id": 36,
         "switch_id": 10,
         "core_index": "0",
         "core_port_index": "13",
@@ -248,7 +288,7 @@
         "num_voq": "8"
     },
     "str-sonic-lc03|ASIC1|Ethernet248": {
-        "system_port_id": 32,
+        "system_port_id": 37,
         "switch_id": 10,
         "core_index": "0",
         "core_port_index": "14",
@@ -256,7 +296,7 @@
         "num_voq": "8"
     },
     "str-sonic-lc03|ASIC1|Ethernet256": {
-        "system_port_id": 33,
+        "system_port_id": 38,
         "switch_id": 10,
         "core_index": "0",
         "core_port_index": "15",
@@ -264,7 +304,7 @@
         "num_voq": "8"
     },
     "str-sonic-lc03|ASIC1|Ethernet264": {
-        "system_port_id": 34,
+        "system_port_id": 39,
         "switch_id": 10,
         "core_index": "0",
         "core_port_index": "16",
@@ -272,7 +312,7 @@
         "num_voq": "8"
     },
     "str-sonic-lc03|ASIC1|Ethernet272": {
-        "system_port_id": 35,
+        "system_port_id": 40,
         "switch_id": 10,
         "core_index": "0",
         "core_port_index": "17",
@@ -280,2099 +320,2059 @@
         "num_voq": "8"
     },
     "str-sonic-lc03|ASIC1|Ethernet280": {
-        "system_port_id": 36,
+        "system_port_id": 41,
         "switch_id": 10,
         "core_index": "0",
         "core_port_index": "18",
         "speed": "400000",
         "num_voq": "8"
     },
-    "str-sonic-lc03|ASIC0|cpu0": {
-        "system_port_id": 37,
-        "switch_id": 8,
-        "core_index": 0,
-        "core_port_index": 0,
-        "speed": "10000",
-        "num_voq": "8"
-    },
     "str-sonic-lc03|ASIC1|cpu1": {
-        "system_port_id": 38,
+        "system_port_id": 42,
         "switch_id": 10,
         "core_index": 0,
         "core_port_index": 0,
         "speed": "10000",
         "num_voq": "8"
     },
-    "str-sonic-lc03|ASIC0|Ethernet-Rec0": {
-        "system_port_id": 39,
-        "switch_id": 8,
-        "core_index": "0",
-        "core_port_index": "49",
-        "speed": "400000",
-        "num_voq": "8"
-    },
-    "str-sonic-lc03|ASIC1|Ethernet-Rec1": {
-        "system_port_id": 40,
-        "switch_id": 10,
-        "core_index": "0",
-        "core_port_index": "49",
-        "speed": "400000",
-        "num_voq": "8"
-    },
-    "str-sonic-lc03|ASIC0|Ethernet-IB0": {
-        "system_port_id": 41,
-        "switch_id": 8,
-        "core_index": "1",
-        "core_port_index": "50",
-        "speed": "400000",
-        "num_voq": "8"
-    },
-    "str-sonic-lc03|ASIC1|Ethernet-IB1": {
-        "system_port_id": 42,
-        "switch_id": 10,
+    "str-sonic-lc04|ASIC0|Ethernet-IB0": {
+        "system_port_id": 43,
+        "switch_id": 12,
         "core_index": "1",
         "core_port_index": "50",
         "speed": "400000",
         "num_voq": "8"
     },
-    "str-sonic-lc04|ASIC0|Ethernet0": {
-        "system_port_id": 43,
-        "switch_id": 12,
-        "core_index": "0",
-        "core_port_index": "1",
-        "speed": "100000",
-        "num_voq": "8"
-    },
-    "str-sonic-lc04|ASIC0|Ethernet4": {
+    "str-sonic-lc04|ASIC0|Ethernet-Rec0": {
         "system_port_id": 44,
         "switch_id": 12,
         "core_index": "0",
-        "core_port_index": "2",
-        "speed": "100000",
+        "core_port_index": "49",
+        "speed": "400000",
         "num_voq": "8"
     },
-    "str-sonic-lc04|ASIC0|Ethernet8": {
+    "str-sonic-lc04|ASIC0|Ethernet0": {
         "system_port_id": 45,
         "switch_id": 12,
         "core_index": "0",
-        "core_port_index": "3",
+        "core_port_index": "1",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc04|ASIC0|Ethernet12": {
+    "str-sonic-lc04|ASIC0|Ethernet100": {
         "system_port_id": 46,
         "switch_id": 12,
-        "core_index": "0",
-        "core_port_index": "4",
+        "core_index": "1",
+        "core_port_index": "26",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc04|ASIC0|Ethernet16": {
+    "str-sonic-lc04|ASIC0|Ethernet104": {
         "system_port_id": 47,
         "switch_id": 12,
-        "core_index": "0",
-        "core_port_index": "5",
+        "core_index": "1",
+        "core_port_index": "27",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc04|ASIC0|Ethernet20": {
+    "str-sonic-lc04|ASIC0|Ethernet108": {
         "system_port_id": 48,
         "switch_id": 12,
-        "core_index": "0",
-        "core_port_index": "6",
+        "core_index": "1",
+        "core_port_index": "28",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc04|ASIC0|Ethernet24": {
+    "str-sonic-lc04|ASIC0|Ethernet112": {
         "system_port_id": 49,
         "switch_id": 12,
-        "core_index": "0",
-        "core_port_index": "7",
+        "core_index": "1",
+        "core_port_index": "29",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc04|ASIC0|Ethernet28": {
+    "str-sonic-lc04|ASIC0|Ethernet116": {
         "system_port_id": 50,
         "switch_id": 12,
-        "core_index": "0",
-        "core_port_index": "8",
+        "core_index": "1",
+        "core_port_index": "30",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc04|ASIC0|Ethernet32": {
+    "str-sonic-lc04|ASIC0|Ethernet12": {
         "system_port_id": 51,
         "switch_id": 12,
         "core_index": "0",
-        "core_port_index": "9",
+        "core_port_index": "4",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc04|ASIC0|Ethernet36": {
+    "str-sonic-lc04|ASIC0|Ethernet120": {
         "system_port_id": 52,
         "switch_id": 12,
-        "core_index": "0",
-        "core_port_index": "10",
+        "core_index": "1",
+        "core_port_index": "31",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc04|ASIC0|Ethernet40": {
+    "str-sonic-lc04|ASIC0|Ethernet124": {
         "system_port_id": 53,
         "switch_id": 12,
-        "core_index": "0",
-        "core_port_index": "11",
+        "core_index": "1",
+        "core_port_index": "32",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc04|ASIC0|Ethernet44": {
+    "str-sonic-lc04|ASIC0|Ethernet128": {
         "system_port_id": 54,
         "switch_id": 12,
-        "core_index": "0",
-        "core_port_index": "12",
+        "core_index": "1",
+        "core_port_index": "33",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc04|ASIC0|Ethernet48": {
+    "str-sonic-lc04|ASIC0|Ethernet132": {
         "system_port_id": 55,
         "switch_id": 12,
-        "core_index": "0",
-        "core_port_index": "13",
+        "core_index": "1",
+        "core_port_index": "34",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc04|ASIC0|Ethernet52": {
+    "str-sonic-lc04|ASIC0|Ethernet136": {
         "system_port_id": 56,
         "switch_id": 12,
-        "core_index": "0",
-        "core_port_index": "14",
+        "core_index": "1",
+        "core_port_index": "35",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc04|ASIC0|Ethernet56": {
+    "str-sonic-lc04|ASIC0|Ethernet140": {
         "system_port_id": 57,
         "switch_id": 12,
-        "core_index": "0",
-        "core_port_index": "15",
+        "core_index": "1",
+        "core_port_index": "36",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc04|ASIC0|Ethernet60": {
+    "str-sonic-lc04|ASIC0|Ethernet144": {
         "system_port_id": 58,
         "switch_id": 12,
-        "core_index": "0",
-        "core_port_index": "16",
+        "core_index": "1",
+        "core_port_index": "37",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc04|ASIC0|Ethernet64": {
+    "str-sonic-lc04|ASIC0|Ethernet148": {
         "system_port_id": 59,
         "switch_id": 12,
-        "core_index": "0",
-        "core_port_index": "17",
+        "core_index": "1",
+        "core_port_index": "38",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc04|ASIC0|Ethernet68": {
+    "str-sonic-lc04|ASIC0|Ethernet152": {
         "system_port_id": 60,
         "switch_id": 12,
-        "core_index": "0",
-        "core_port_index": "18",
+        "core_index": "1",
+        "core_port_index": "39",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc04|ASIC0|Ethernet72": {
+    "str-sonic-lc04|ASIC0|Ethernet156": {
         "system_port_id": 61,
         "switch_id": 12,
-        "core_index": "0",
-        "core_port_index": "19",
+        "core_index": "1",
+        "core_port_index": "40",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc04|ASIC0|Ethernet76": {
+    "str-sonic-lc04|ASIC0|Ethernet16": {
         "system_port_id": 62,
         "switch_id": 12,
         "core_index": "0",
-        "core_port_index": "20",
+        "core_port_index": "5",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc04|ASIC0|Ethernet80": {
+    "str-sonic-lc04|ASIC0|Ethernet160": {
         "system_port_id": 63,
         "switch_id": 12,
-        "core_index": "0",
-        "core_port_index": "21",
+        "core_index": "1",
+        "core_port_index": "41",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc04|ASIC0|Ethernet84": {
+    "str-sonic-lc04|ASIC0|Ethernet164": {
         "system_port_id": 64,
         "switch_id": 12,
-        "core_index": "0",
-        "core_port_index": "22",
+        "core_index": "1",
+        "core_port_index": "42",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc04|ASIC0|Ethernet88": {
+    "str-sonic-lc04|ASIC0|Ethernet168": {
         "system_port_id": 65,
         "switch_id": 12,
-        "core_index": "0",
-        "core_port_index": "23",
+        "core_index": "1",
+        "core_port_index": "43",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc04|ASIC0|Ethernet92": {
+    "str-sonic-lc04|ASIC0|Ethernet172": {
         "system_port_id": 66,
         "switch_id": 12,
-        "core_index": "0",
-        "core_port_index": "24",
+        "core_index": "1",
+        "core_port_index": "44",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc04|ASIC0|Ethernet96": {
+    "str-sonic-lc04|ASIC0|Ethernet176": {
         "system_port_id": 67,
         "switch_id": 12,
         "core_index": "1",
-        "core_port_index": "25",
+        "core_port_index": "45",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc04|ASIC0|Ethernet100": {
+    "str-sonic-lc04|ASIC0|Ethernet180": {
         "system_port_id": 68,
         "switch_id": 12,
         "core_index": "1",
-        "core_port_index": "26",
+        "core_port_index": "46",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc04|ASIC0|Ethernet104": {
+    "str-sonic-lc04|ASIC0|Ethernet184": {
         "system_port_id": 69,
         "switch_id": 12,
         "core_index": "1",
-        "core_port_index": "27",
+        "core_port_index": "47",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc04|ASIC0|Ethernet108": {
+    "str-sonic-lc04|ASIC0|Ethernet188": {
         "system_port_id": 70,
         "switch_id": 12,
         "core_index": "1",
-        "core_port_index": "28",
+        "core_port_index": "48",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc04|ASIC0|Ethernet112": {
+    "str-sonic-lc04|ASIC0|Ethernet20": {
         "system_port_id": 71,
         "switch_id": 12,
-        "core_index": "1",
-        "core_port_index": "29",
+        "core_index": "0",
+        "core_port_index": "6",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc04|ASIC0|Ethernet116": {
+    "str-sonic-lc04|ASIC0|Ethernet24": {
         "system_port_id": 72,
         "switch_id": 12,
-        "core_index": "1",
-        "core_port_index": "30",
+        "core_index": "0",
+        "core_port_index": "7",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc04|ASIC0|Ethernet120": {
+    "str-sonic-lc04|ASIC0|Ethernet28": {
         "system_port_id": 73,
         "switch_id": 12,
-        "core_index": "1",
-        "core_port_index": "31",
+        "core_index": "0",
+        "core_port_index": "8",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc04|ASIC0|Ethernet124": {
+    "str-sonic-lc04|ASIC0|Ethernet32": {
         "system_port_id": 74,
         "switch_id": 12,
-        "core_index": "1",
-        "core_port_index": "32",
+        "core_index": "0",
+        "core_port_index": "9",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc04|ASIC0|Ethernet128": {
+    "str-sonic-lc04|ASIC0|Ethernet36": {
         "system_port_id": 75,
         "switch_id": 12,
-        "core_index": "1",
-        "core_port_index": "33",
+        "core_index": "0",
+        "core_port_index": "10",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc04|ASIC0|Ethernet132": {
+    "str-sonic-lc04|ASIC0|Ethernet4": {
         "system_port_id": 76,
         "switch_id": 12,
-        "core_index": "1",
-        "core_port_index": "34",
+        "core_index": "0",
+        "core_port_index": "2",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc04|ASIC0|Ethernet136": {
+    "str-sonic-lc04|ASIC0|Ethernet40": {
         "system_port_id": 77,
         "switch_id": 12,
-        "core_index": "1",
-        "core_port_index": "35",
+        "core_index": "0",
+        "core_port_index": "11",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc04|ASIC0|Ethernet140": {
+    "str-sonic-lc04|ASIC0|Ethernet44": {
         "system_port_id": 78,
         "switch_id": 12,
-        "core_index": "1",
-        "core_port_index": "36",
+        "core_index": "0",
+        "core_port_index": "12",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc04|ASIC0|Ethernet144": {
+    "str-sonic-lc04|ASIC0|Ethernet48": {
         "system_port_id": 79,
         "switch_id": 12,
-        "core_index": "1",
-        "core_port_index": "37",
+        "core_index": "0",
+        "core_port_index": "13",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc04|ASIC0|Ethernet148": {
+    "str-sonic-lc04|ASIC0|Ethernet52": {
         "system_port_id": 80,
         "switch_id": 12,
-        "core_index": "1",
-        "core_port_index": "38",
+        "core_index": "0",
+        "core_port_index": "14",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc04|ASIC0|Ethernet152": {
+    "str-sonic-lc04|ASIC0|Ethernet56": {
         "system_port_id": 81,
         "switch_id": 12,
-        "core_index": "1",
-        "core_port_index": "39",
+        "core_index": "0",
+        "core_port_index": "15",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc04|ASIC0|Ethernet156": {
+    "str-sonic-lc04|ASIC0|Ethernet60": {
         "system_port_id": 82,
         "switch_id": 12,
-        "core_index": "1",
-        "core_port_index": "40",
+        "core_index": "0",
+        "core_port_index": "16",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc04|ASIC0|Ethernet160": {
+    "str-sonic-lc04|ASIC0|Ethernet64": {
         "system_port_id": 83,
         "switch_id": 12,
-        "core_index": "1",
-        "core_port_index": "41",
+        "core_index": "0",
+        "core_port_index": "17",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc04|ASIC0|Ethernet164": {
+    "str-sonic-lc04|ASIC0|Ethernet68": {
         "system_port_id": 84,
         "switch_id": 12,
-        "core_index": "1",
-        "core_port_index": "42",
+        "core_index": "0",
+        "core_port_index": "18",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc04|ASIC0|Ethernet168": {
+    "str-sonic-lc04|ASIC0|Ethernet72": {
         "system_port_id": 85,
         "switch_id": 12,
-        "core_index": "1",
-        "core_port_index": "43",
+        "core_index": "0",
+        "core_port_index": "19",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc04|ASIC0|Ethernet172": {
+    "str-sonic-lc04|ASIC0|Ethernet76": {
         "system_port_id": 86,
         "switch_id": 12,
-        "core_index": "1",
-        "core_port_index": "44",
+        "core_index": "0",
+        "core_port_index": "20",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc04|ASIC0|Ethernet176": {
+    "str-sonic-lc04|ASIC0|Ethernet8": {
         "system_port_id": 87,
         "switch_id": 12,
-        "core_index": "1",
-        "core_port_index": "45",
+        "core_index": "0",
+        "core_port_index": "3",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc04|ASIC0|Ethernet180": {
+    "str-sonic-lc04|ASIC0|Ethernet80": {
         "system_port_id": 88,
         "switch_id": 12,
-        "core_index": "1",
-        "core_port_index": "46",
+        "core_index": "0",
+        "core_port_index": "21",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc04|ASIC0|Ethernet184": {
+    "str-sonic-lc04|ASIC0|Ethernet84": {
         "system_port_id": 89,
         "switch_id": 12,
-        "core_index": "1",
-        "core_port_index": "47",
+        "core_index": "0",
+        "core_port_index": "22",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc04|ASIC0|Ethernet188": {
+    "str-sonic-lc04|ASIC0|Ethernet88": {
         "system_port_id": 90,
         "switch_id": 12,
-        "core_index": "1",
-        "core_port_index": "48",
+        "core_index": "0",
+        "core_port_index": "23",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc04|ASIC0|cpu0": {
+    "str-sonic-lc04|ASIC0|Ethernet92": {
         "system_port_id": 91,
         "switch_id": 12,
-        "core_index": 0,
-        "core_port_index": 0,
-        "speed": "10000",
+        "core_index": "0",
+        "core_port_index": "24",
+        "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc04|ASIC0|Ethernet-Rec0": {
+    "str-sonic-lc04|ASIC0|Ethernet96": {
         "system_port_id": 92,
         "switch_id": 12,
-        "core_index": "0",
-        "core_port_index": "49",
-        "speed": "400000",
+        "core_index": "1",
+        "core_port_index": "25",
+        "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc04|ASIC0|Ethernet-IB0": {
+    "str-sonic-lc04|ASIC0|cpu0": {
         "system_port_id": 93,
         "switch_id": 12,
+        "core_index": 0,
+        "core_port_index": 0,
+        "speed": "10000",
+        "num_voq": "8"
+    },
+    "str-sonic-lc05|ASIC0|Ethernet-IB0": {
+        "system_port_id": 94,
+        "switch_id": 16,
         "core_index": "1",
         "core_port_index": "50",
         "speed": "400000",
         "num_voq": "8"
     },
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         "speed": "100000",
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         "num_voq": "8"
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         "num_voq": "8"
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     },
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         "core_index": "0",
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         "num_voq": "8"
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         "speed": "100000",
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         "speed": "100000",
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     },
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         "speed": "100000",
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         "switch_id": 20,
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+    "str-sonic-lc08|ASIC0|Ethernet152": {
         "system_port_id": 264,
         "switch_id": 28,
-        "core_index": "0",
-        "core_port_index": "18",
+        "core_index": "1",
+        "core_port_index": "39",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc08|ASIC0|Ethernet72": {
+    "str-sonic-lc08|ASIC0|Ethernet156": {
         "system_port_id": 265,
         "switch_id": 28,
-        "core_index": "0",
-        "core_port_index": "19",
+        "core_index": "1",
+        "core_port_index": "40",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc08|ASIC0|Ethernet76": {
+    "str-sonic-lc08|ASIC0|Ethernet16": {
         "system_port_id": 266,
         "switch_id": 28,
         "core_index": "0",
-        "core_port_index": "20",
+        "core_port_index": "5",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc08|ASIC0|Ethernet80": {
+    "str-sonic-lc08|ASIC0|Ethernet160": {
         "system_port_id": 267,
         "switch_id": 28,
-        "core_index": "0",
-        "core_port_index": "21",
+        "core_index": "1",
+        "core_port_index": "41",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc08|ASIC0|Ethernet84": {
+    "str-sonic-lc08|ASIC0|Ethernet164": {
         "system_port_id": 268,
         "switch_id": 28,
-        "core_index": "0",
-        "core_port_index": "22",
+        "core_index": "1",
+        "core_port_index": "42",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc08|ASIC0|Ethernet88": {
+    "str-sonic-lc08|ASIC0|Ethernet168": {
         "system_port_id": 269,
         "switch_id": 28,
-        "core_index": "0",
-        "core_port_index": "23",
+        "core_index": "1",
+        "core_port_index": "43",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc08|ASIC0|Ethernet92": {
+    "str-sonic-lc08|ASIC0|Ethernet172": {
         "system_port_id": 270,
         "switch_id": 28,
-        "core_index": "0",
-        "core_port_index": "24",
+        "core_index": "1",
+        "core_port_index": "44",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc08|ASIC0|Ethernet96": {
+    "str-sonic-lc08|ASIC0|Ethernet176": {
         "system_port_id": 271,
         "switch_id": 28,
         "core_index": "1",
-        "core_port_index": "25",
+        "core_port_index": "45",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc08|ASIC0|Ethernet100": {
+    "str-sonic-lc08|ASIC0|Ethernet180": {
         "system_port_id": 272,
         "switch_id": 28,
         "core_index": "1",
-        "core_port_index": "26",
+        "core_port_index": "46",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc08|ASIC0|Ethernet104": {
+    "str-sonic-lc08|ASIC0|Ethernet184": {
         "system_port_id": 273,
         "switch_id": 28,
         "core_index": "1",
-        "core_port_index": "27",
+        "core_port_index": "47",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc08|ASIC0|Ethernet108": {
+    "str-sonic-lc08|ASIC0|Ethernet188": {
         "system_port_id": 274,
         "switch_id": 28,
         "core_index": "1",
-        "core_port_index": "28",
+        "core_port_index": "48",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc08|ASIC0|Ethernet112": {
+    "str-sonic-lc08|ASIC0|Ethernet20": {
         "system_port_id": 275,
         "switch_id": 28,
-        "core_index": "1",
-        "core_port_index": "29",
+        "core_index": "0",
+        "core_port_index": "6",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc08|ASIC0|Ethernet116": {
+    "str-sonic-lc08|ASIC0|Ethernet24": {
         "system_port_id": 276,
         "switch_id": 28,
-        "core_index": "1",
-        "core_port_index": "30",
+        "core_index": "0",
+        "core_port_index": "7",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc08|ASIC0|Ethernet120": {
+    "str-sonic-lc08|ASIC0|Ethernet28": {
         "system_port_id": 277,
         "switch_id": 28,
-        "core_index": "1",
-        "core_port_index": "31",
+        "core_index": "0",
+        "core_port_index": "8",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc08|ASIC0|Ethernet124": {
+    "str-sonic-lc08|ASIC0|Ethernet32": {
         "system_port_id": 278,
         "switch_id": 28,
-        "core_index": "1",
-        "core_port_index": "32",
+        "core_index": "0",
+        "core_port_index": "9",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc08|ASIC0|Ethernet128": {
+    "str-sonic-lc08|ASIC0|Ethernet36": {
         "system_port_id": 279,
         "switch_id": 28,
-        "core_index": "1",
-        "core_port_index": "33",
+        "core_index": "0",
+        "core_port_index": "10",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc08|ASIC0|Ethernet132": {
+    "str-sonic-lc08|ASIC0|Ethernet4": {
         "system_port_id": 280,
         "switch_id": 28,
-        "core_index": "1",
-        "core_port_index": "34",
+        "core_index": "0",
+        "core_port_index": "2",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc08|ASIC0|Ethernet136": {
+    "str-sonic-lc08|ASIC0|Ethernet40": {
         "system_port_id": 281,
         "switch_id": 28,
-        "core_index": "1",
-        "core_port_index": "35",
+        "core_index": "0",
+        "core_port_index": "11",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc08|ASIC0|Ethernet140": {
+    "str-sonic-lc08|ASIC0|Ethernet44": {
         "system_port_id": 282,
         "switch_id": 28,
-        "core_index": "1",
-        "core_port_index": "36",
+        "core_index": "0",
+        "core_port_index": "12",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc08|ASIC0|Ethernet144": {
+    "str-sonic-lc08|ASIC0|Ethernet48": {
         "system_port_id": 283,
         "switch_id": 28,
-        "core_index": "1",
-        "core_port_index": "37",
+        "core_index": "0",
+        "core_port_index": "13",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc08|ASIC0|Ethernet148": {
+    "str-sonic-lc08|ASIC0|Ethernet52": {
         "system_port_id": 284,
         "switch_id": 28,
-        "core_index": "1",
-        "core_port_index": "38",
+        "core_index": "0",
+        "core_port_index": "14",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc08|ASIC0|Ethernet152": {
+    "str-sonic-lc08|ASIC0|Ethernet56": {
         "system_port_id": 285,
         "switch_id": 28,
-        "core_index": "1",
-        "core_port_index": "39",
+        "core_index": "0",
+        "core_port_index": "15",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc08|ASIC0|Ethernet156": {
+    "str-sonic-lc08|ASIC0|Ethernet60": {
         "system_port_id": 286,
         "switch_id": 28,
-        "core_index": "1",
-        "core_port_index": "40",
+        "core_index": "0",
+        "core_port_index": "16",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc08|ASIC0|Ethernet160": {
+    "str-sonic-lc08|ASIC0|Ethernet64": {
         "system_port_id": 287,
         "switch_id": 28,
-        "core_index": "1",
-        "core_port_index": "41",
+        "core_index": "0",
+        "core_port_index": "17",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc08|ASIC0|Ethernet164": {
+    "str-sonic-lc08|ASIC0|Ethernet68": {
         "system_port_id": 288,
         "switch_id": 28,
-        "core_index": "1",
-        "core_port_index": "42",
+        "core_index": "0",
+        "core_port_index": "18",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc08|ASIC0|Ethernet168": {
+    "str-sonic-lc08|ASIC0|Ethernet72": {
         "system_port_id": 289,
         "switch_id": 28,
-        "core_index": "1",
-        "core_port_index": "43",
+        "core_index": "0",
+        "core_port_index": "19",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc08|ASIC0|Ethernet172": {
+    "str-sonic-lc08|ASIC0|Ethernet76": {
         "system_port_id": 290,
         "switch_id": 28,
-        "core_index": "1",
-        "core_port_index": "44",
+        "core_index": "0",
+        "core_port_index": "20",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc08|ASIC0|Ethernet176": {
+    "str-sonic-lc08|ASIC0|Ethernet8": {
         "system_port_id": 291,
         "switch_id": 28,
-        "core_index": "1",
-        "core_port_index": "45",
+        "core_index": "0",
+        "core_port_index": "3",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc08|ASIC0|Ethernet180": {
+    "str-sonic-lc08|ASIC0|Ethernet80": {
         "system_port_id": 292,
         "switch_id": 28,
-        "core_index": "1",
-        "core_port_index": "46",
+        "core_index": "0",
+        "core_port_index": "21",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc08|ASIC0|Ethernet184": {
+    "str-sonic-lc08|ASIC0|Ethernet84": {
         "system_port_id": 293,
         "switch_id": 28,
-        "core_index": "1",
-        "core_port_index": "47",
+        "core_index": "0",
+        "core_port_index": "22",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc08|ASIC0|Ethernet188": {
+    "str-sonic-lc08|ASIC0|Ethernet88": {
         "system_port_id": 294,
         "switch_id": 28,
-        "core_index": "1",
-        "core_port_index": "48",
+        "core_index": "0",
+        "core_port_index": "23",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc08|ASIC0|cpu0": {
+    "str-sonic-lc08|ASIC0|Ethernet92": {
         "system_port_id": 295,
         "switch_id": 28,
-        "core_index": 0,
-        "core_port_index": 0,
-        "speed": "10000",
+        "core_index": "0",
+        "core_port_index": "24",
+        "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc08|ASIC0|Ethernet-Rec0": {
+    "str-sonic-lc08|ASIC0|Ethernet96": {
         "system_port_id": 296,
         "switch_id": 28,
-        "core_index": "0",
-        "core_port_index": "49",
-        "speed": "400000",
+        "core_index": "1",
+        "core_port_index": "25",
+        "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc08|ASIC0|Ethernet-IB0": {
+    "str-sonic-lc08|ASIC0|cpu0": {
         "system_port_id": 297,
         "switch_id": 28,
-        "core_index": "1",
-        "core_port_index": "50",
-        "speed": "400000",
+        "core_index": 0,
+        "core_port_index": 0,
+        "speed": "10000",
         "num_voq": "8"
     },
     "str-sonic-lc09|ASIC0|Ethernet0": {
@@ -2383,788 +2383,788 @@
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc09|ASIC0|Ethernet4": {
+    "str-sonic-lc09|ASIC0|Ethernet100": {
         "system_port_id": 299,
         "switch_id": 32,
-        "core_index": "0",
-        "core_port_index": "2",
+        "core_index": "1",
+        "core_port_index": "26",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc09|ASIC0|Ethernet8": {
+    "str-sonic-lc09|ASIC0|Ethernet104": {
         "system_port_id": 300,
         "switch_id": 32,
-        "core_index": "0",
-        "core_port_index": "3",
+        "core_index": "1",
+        "core_port_index": "27",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc09|ASIC0|Ethernet12": {
+    "str-sonic-lc09|ASIC0|Ethernet108": {
         "system_port_id": 301,
         "switch_id": 32,
-        "core_index": "0",
-        "core_port_index": "4",
+        "core_index": "1",
+        "core_port_index": "28",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc09|ASIC0|Ethernet16": {
+    "str-sonic-lc09|ASIC0|Ethernet112": {
         "system_port_id": 302,
         "switch_id": 32,
-        "core_index": "0",
-        "core_port_index": "5",
+        "core_index": "1",
+        "core_port_index": "29",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc09|ASIC0|Ethernet20": {
+    "str-sonic-lc09|ASIC0|Ethernet116": {
         "system_port_id": 303,
         "switch_id": 32,
-        "core_index": "0",
-        "core_port_index": "6",
+        "core_index": "1",
+        "core_port_index": "30",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc09|ASIC0|Ethernet24": {
+    "str-sonic-lc09|ASIC0|Ethernet12": {
         "system_port_id": 304,
         "switch_id": 32,
         "core_index": "0",
-        "core_port_index": "7",
+        "core_port_index": "4",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc09|ASIC0|Ethernet28": {
+    "str-sonic-lc09|ASIC0|Ethernet120": {
         "system_port_id": 305,
         "switch_id": 32,
-        "core_index": "0",
-        "core_port_index": "8",
+        "core_index": "1",
+        "core_port_index": "31",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc09|ASIC0|Ethernet32": {
+    "str-sonic-lc09|ASIC0|Ethernet124": {
         "system_port_id": 306,
         "switch_id": 32,
-        "core_index": "0",
-        "core_port_index": "9",
+        "core_index": "1",
+        "core_port_index": "32",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc09|ASIC0|Ethernet36": {
+    "str-sonic-lc09|ASIC0|Ethernet128": {
         "system_port_id": 307,
         "switch_id": 32,
-        "core_index": "0",
-        "core_port_index": "10",
+        "core_index": "1",
+        "core_port_index": "33",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc09|ASIC0|Ethernet40": {
+    "str-sonic-lc09|ASIC0|Ethernet132": {
         "system_port_id": 308,
         "switch_id": 32,
-        "core_index": "0",
-        "core_port_index": "11",
+        "core_index": "1",
+        "core_port_index": "34",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc09|ASIC0|Ethernet44": {
+    "str-sonic-lc09|ASIC0|Ethernet136": {
         "system_port_id": 309,
         "switch_id": 32,
-        "core_index": "0",
-        "core_port_index": "12",
+        "core_index": "1",
+        "core_port_index": "35",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc09|ASIC0|Ethernet48": {
+    "str-sonic-lc09|ASIC0|Ethernet140": {
         "system_port_id": 310,
         "switch_id": 32,
-        "core_index": "0",
-        "core_port_index": "13",
+        "core_index": "1",
+        "core_port_index": "36",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc09|ASIC0|Ethernet52": {
+    "str-sonic-lc09|ASIC0|Ethernet144": {
         "system_port_id": 311,
         "switch_id": 32,
-        "core_index": "0",
-        "core_port_index": "14",
+        "core_index": "1",
+        "core_port_index": "37",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc09|ASIC0|Ethernet56": {
+    "str-sonic-lc09|ASIC0|Ethernet148": {
         "system_port_id": 312,
         "switch_id": 32,
-        "core_index": "0",
-        "core_port_index": "15",
+        "core_index": "1",
+        "core_port_index": "38",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc09|ASIC0|Ethernet60": {
+    "str-sonic-lc09|ASIC0|Ethernet152": {
         "system_port_id": 313,
         "switch_id": 32,
-        "core_index": "0",
-        "core_port_index": "16",
+        "core_index": "1",
+        "core_port_index": "39",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc09|ASIC0|Ethernet64": {
+    "str-sonic-lc09|ASIC0|Ethernet156": {
         "system_port_id": 314,
         "switch_id": 32,
-        "core_index": "0",
-        "core_port_index": "17",
+        "core_index": "1",
+        "core_port_index": "40",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc09|ASIC0|Ethernet68": {
+    "str-sonic-lc09|ASIC0|Ethernet16": {
         "system_port_id": 315,
         "switch_id": 32,
         "core_index": "0",
-        "core_port_index": "18",
+        "core_port_index": "5",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc09|ASIC0|Ethernet72": {
+    "str-sonic-lc09|ASIC0|Ethernet160": {
         "system_port_id": 316,
         "switch_id": 32,
-        "core_index": "0",
-        "core_port_index": "19",
+        "core_index": "1",
+        "core_port_index": "41",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc09|ASIC0|Ethernet76": {
+    "str-sonic-lc09|ASIC0|Ethernet164": {
         "system_port_id": 317,
         "switch_id": 32,
-        "core_index": "0",
-        "core_port_index": "20",
+        "core_index": "1",
+        "core_port_index": "42",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc09|ASIC0|Ethernet80": {
+    "str-sonic-lc09|ASIC0|Ethernet168": {
         "system_port_id": 318,
         "switch_id": 32,
-        "core_index": "0",
-        "core_port_index": "21",
+        "core_index": "1",
+        "core_port_index": "43",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc09|ASIC0|Ethernet84": {
+    "str-sonic-lc09|ASIC0|Ethernet172": {
         "system_port_id": 319,
         "switch_id": 32,
-        "core_index": "0",
-        "core_port_index": "22",
+        "core_index": "1",
+        "core_port_index": "44",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc09|ASIC0|Ethernet88": {
+    "str-sonic-lc09|ASIC0|Ethernet176": {
         "system_port_id": 320,
         "switch_id": 32,
-        "core_index": "0",
-        "core_port_index": "23",
+        "core_index": "1",
+        "core_port_index": "45",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc09|ASIC0|Ethernet92": {
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+    "str-sonic-lc10|ASIC0|Ethernet36": {
         "system_port_id": 378,
         "switch_id": 36,
-        "core_index": "1",
-        "core_port_index": "33",
+        "core_index": "0",
+        "core_port_index": "10",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc10|ASIC0|Ethernet132": {
+    "str-sonic-lc10|ASIC0|Ethernet4": {
         "system_port_id": 379,
         "switch_id": 36,
-        "core_index": "1",
-        "core_port_index": "34",
+        "core_index": "0",
+        "core_port_index": "2",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc10|ASIC0|Ethernet136": {
+    "str-sonic-lc10|ASIC0|Ethernet40": {
         "system_port_id": 380,
         "switch_id": 36,
-        "core_index": "1",
-        "core_port_index": "35",
+        "core_index": "0",
+        "core_port_index": "11",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc10|ASIC0|Ethernet140": {
+    "str-sonic-lc10|ASIC0|Ethernet44": {
         "system_port_id": 381,
         "switch_id": 36,
-        "core_index": "1",
-        "core_port_index": "36",
+        "core_index": "0",
+        "core_port_index": "12",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc10|ASIC0|Ethernet144": {
+    "str-sonic-lc10|ASIC0|Ethernet48": {
         "system_port_id": 382,
         "switch_id": 36,
-        "core_index": "1",
-        "core_port_index": "37",
+        "core_index": "0",
+        "core_port_index": "13",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc10|ASIC0|Ethernet148": {
+    "str-sonic-lc10|ASIC0|Ethernet52": {
         "system_port_id": 383,
         "switch_id": 36,
-        "core_index": "1",
-        "core_port_index": "38",
+        "core_index": "0",
+        "core_port_index": "14",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc10|ASIC0|Ethernet152": {
+    "str-sonic-lc10|ASIC0|Ethernet56": {
         "system_port_id": 384,
         "switch_id": 36,
-        "core_index": "1",
-        "core_port_index": "39",
+        "core_index": "0",
+        "core_port_index": "15",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc10|ASIC0|Ethernet156": {
+    "str-sonic-lc10|ASIC0|Ethernet60": {
         "system_port_id": 385,
         "switch_id": 36,
-        "core_index": "1",
-        "core_port_index": "40",
+        "core_index": "0",
+        "core_port_index": "16",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc10|ASIC0|Ethernet160": {
+    "str-sonic-lc10|ASIC0|Ethernet64": {
         "system_port_id": 386,
         "switch_id": 36,
-        "core_index": "1",
-        "core_port_index": "41",
+        "core_index": "0",
+        "core_port_index": "17",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc10|ASIC0|Ethernet164": {
+    "str-sonic-lc10|ASIC0|Ethernet68": {
         "system_port_id": 387,
         "switch_id": 36,
-        "core_index": "1",
-        "core_port_index": "42",
+        "core_index": "0",
+        "core_port_index": "18",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc10|ASIC0|Ethernet168": {
+    "str-sonic-lc10|ASIC0|Ethernet72": {
         "system_port_id": 388,
         "switch_id": 36,
-        "core_index": "1",
-        "core_port_index": "43",
+        "core_index": "0",
+        "core_port_index": "19",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc10|ASIC0|Ethernet172": {
+    "str-sonic-lc10|ASIC0|Ethernet76": {
         "system_port_id": 389,
         "switch_id": 36,
-        "core_index": "1",
-        "core_port_index": "44",
+        "core_index": "0",
+        "core_port_index": "20",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc10|ASIC0|Ethernet176": {
+    "str-sonic-lc10|ASIC0|Ethernet8": {
         "system_port_id": 390,
         "switch_id": 36,
-        "core_index": "1",
-        "core_port_index": "45",
+        "core_index": "0",
+        "core_port_index": "3",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc10|ASIC0|Ethernet180": {
+    "str-sonic-lc10|ASIC0|Ethernet80": {
         "system_port_id": 391,
         "switch_id": 36,
-        "core_index": "1",
-        "core_port_index": "46",
+        "core_index": "0",
+        "core_port_index": "21",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc10|ASIC0|Ethernet184": {
+    "str-sonic-lc10|ASIC0|Ethernet84": {
         "system_port_id": 392,
         "switch_id": 36,
-        "core_index": "1",
-        "core_port_index": "47",
+        "core_index": "0",
+        "core_port_index": "22",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc10|ASIC0|Ethernet188": {
+    "str-sonic-lc10|ASIC0|Ethernet88": {
         "system_port_id": 393,
         "switch_id": 36,
-        "core_index": "1",
-        "core_port_index": "48",
+        "core_index": "0",
+        "core_port_index": "23",
         "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc10|ASIC0|cpu0": {
+    "str-sonic-lc10|ASIC0|Ethernet92": {
         "system_port_id": 394,
         "switch_id": 36,
-        "core_index": 0,
-        "core_port_index": 0,
-        "speed": "10000",
+        "core_index": "0",
+        "core_port_index": "24",
+        "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc10|ASIC0|Ethernet-Rec0": {
+    "str-sonic-lc10|ASIC0|Ethernet96": {
         "system_port_id": 395,
         "switch_id": 36,
-        "core_index": "0",
-        "core_port_index": "49",
-        "speed": "400000",
+        "core_index": "1",
+        "core_port_index": "25",
+        "speed": "100000",
         "num_voq": "8"
     },
-    "str-sonic-lc10|ASIC0|Ethernet-IB0": {
+    "str-sonic-lc10|ASIC0|cpu0": {
         "system_port_id": 396,
         "switch_id": 36,
-        "core_index": "1",
-        "core_port_index": "50",
-        "speed": "400000",
+        "core_index": 0,
+        "core_port_index": 0,
+        "speed": "10000",
         "num_voq": "8"
     }
 }

From 81f1bf4a7fed131d872938cf04c7bed3522b4986 Mon Sep 17 00:00:00 2001
From: Vivek <vivekreddykarri98@gmail.com>
Date: Thu, 3 Oct 2024 17:25:39 -0700
Subject: [PATCH 1053/1115] Replace straightforward sonic-cfggen calls with
 sonic-db-cli (#20232)
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

### Why I did it

Fix https://github.com/sonic-net/sonic-buildimage/issues/20048

It is explained in ticket above, how sonic-cfggen calls in the hostname.sh, pcie-check.sh and banner-config and hogging the CPU and slightly delaying the start of swss

**pcie-check.sh**
redis-cli call is also replaced with sonic-db-cli since redis-cli is a wrapper around the actual redis-cli under database container
<img width="1113" alt="image" src="https://github.com/user-attachments/assets/bed9d055-3b9f-4f75-aabd-1e0335716396">

**swss start**
If the SKU has create_only_config_db_buffers.json set to true, the only config that's updated today is.
```
{
    "DEVICE_METADATA": {
        "localhost": {
            "create_only_config_db_buffers": "true"
        }
    }
}
```
We use sonic-cfggen which cause 1.5 sec delay in the start of swss container. Thus replace with sonic-db-cli. If a complex use case arises in future, this can be updated.
<img width="1483" alt="Screenshot 2024-09-16 at 12 45 05 PM" src="https://github.com/user-attachments/assets/ee3248b5-7623-42c4-9b50-81b114c71ae7">


### How I did it

#### How to verify it

**Note: Everything was tested on MSN2700 device, Intel Celeron CPU with 2 cores**

- 1.5 sec saved in the swss container start
<img width="1298" alt="image" src="https://github.com/user-attachments/assets/817739f1-26a2-41ad-89e4-1e76e31532ac">

- 1.6 sec saved in the start of swss service. Previously, it took almost 1.8 sec after config-setup is finished for the swss to start. After replacing the calls, it start almost 0.2 sec after config-setup is finished

In total, anywhere between 2.5 - 3.5 sec is saved
---
 files/build_templates/docker_image_ctl.j2        | 2 +-
 files/image_config/bannerconfig/banner-config.sh | 8 ++++----
 files/image_config/hostname/hostname-config.sh   | 4 ++--
 files/image_config/pcie-check/pcie-check.sh      | 6 +++---
 files/image_config/rsyslog/rsyslog-config.sh     | 2 +-
 5 files changed, 11 insertions(+), 11 deletions(-)

diff --git a/files/build_templates/docker_image_ctl.j2 b/files/build_templates/docker_image_ctl.j2
index 87f801c15..732681818 100644
--- a/files/build_templates/docker_image_ctl.j2
+++ b/files/build_templates/docker_image_ctl.j2
@@ -433,7 +433,7 @@ start() {
     if [ -d "$HWSKU_FOLDER" ]; then
         CREATE_ONLY_CONFIG_DB_BUFFERS_JSON="$HWSKU_FOLDER/create_only_config_db_buffers.json"
         if [ -f "$CREATE_ONLY_CONFIG_DB_BUFFERS_JSON" ]; then
-            $SONIC_CFGGEN -j $CREATE_ONLY_CONFIG_DB_BUFFERS_JSON --write-to-db
+            $SONIC_DB_CLI CONFIG_DB HSET 'DEVICE_METADATA|localhost' create_only_config_db_buffers true
         fi
     fi
     {%- endif %}
diff --git a/files/image_config/bannerconfig/banner-config.sh b/files/image_config/bannerconfig/banner-config.sh
index b81b342bf..5c605a034 100755
--- a/files/image_config/bannerconfig/banner-config.sh
+++ b/files/image_config/bannerconfig/banner-config.sh
@@ -1,14 +1,14 @@
 #!/bin/bash -e
 
-STATE=$(sonic-cfggen -d -v 'BANNER_MESSAGE["global"]["state"]')
+STATE=$(sonic-db-cli CONFIG_DB HGET 'BANNER_MESSAGE|global' state)
 LOGIN=
 MOTD=
 LOGOUT=
 
 if [[ $STATE == "enabled" ]]; then
-    LOGIN=$(sonic-cfggen -d -v 'BANNER_MESSAGE["global"]["login"]')
-    MOTD=$(sonic-cfggen -d -v 'BANNER_MESSAGE["global"]["motd"]')
-    LOGOUT=$(sonic-cfggen -d -v 'BANNER_MESSAGE["global"]["logout"]')
+    LOGIN=$(sonic-db-cli CONFIG_DB HGET 'BANNER_MESSAGE|global' login)
+    MOTD=$(sonic-db-cli CONFIG_DB HGET 'BANNER_MESSAGE|global' motd)
+    LOGOUT=$(sonic-db-cli CONFIG_DB HGET 'BANNER_MESSAGE|global' logout)
 
     echo -e "$LOGIN" > /etc/issue.net
     echo -e "$LOGIN" > /etc/issue
diff --git a/files/image_config/hostname/hostname-config.sh b/files/image_config/hostname/hostname-config.sh
index 5f4bfede2..91b0b7b32 100755
--- a/files/image_config/hostname/hostname-config.sh
+++ b/files/image_config/hostname/hostname-config.sh
@@ -1,7 +1,7 @@
 #!/bin/bash -e
 
-CURRENT_HOSTNAME=`hostname`
-HOSTNAME=`sonic-cfggen -d -v DEVICE_METADATA[\'localhost\'][\'hostname\']`
+CURRENT_HOSTNAME=$(hostname)
+HOSTNAME=$(sonic-db-cli CONFIG_DB HGET 'DEVICE_METADATA|localhost' hostname)
 
 if [ -z "$HOSTNAME" ] ; then
        echo "Missing hostname in the config file, setting to default 'sonic'"
diff --git a/files/image_config/pcie-check/pcie-check.sh b/files/image_config/pcie-check/pcie-check.sh
index 3d4184c86..d8558da82 100755
--- a/files/image_config/pcie-check/pcie-check.sh
+++ b/files/image_config/pcie-check/pcie-check.sh
@@ -18,7 +18,7 @@ function debug()
 function check_and_rescan_pcie_devices()
 {
     PCIE_CHK_CMD='sudo pcieutil check | grep "$RESULTS"'
-    PLATFORM=$(sonic-cfggen -H -v DEVICE_METADATA.localhost.platform)
+    PLATFORM=$(sonic-db-cli CONFIG_DB HGET 'DEVICE_METADATA|localhost' platform)
 
     if [ ! -f /usr/share/sonic/device/$PLATFORM/pcie*.yaml ]; then
         debug "pcie.yaml does not exist! Can't check PCIe status!"
@@ -38,7 +38,7 @@ function check_and_rescan_pcie_devices()
         fi
 
         if [ "$(eval $PCIE_CHK_CMD)" = "$EXPECTED" ]; then
-            redis-cli -n 6 HSET $PCIE_STATUS_TABLE "status" "PASSED"
+            sonic-db-cli STATE_DB HSET $PCIE_STATUS_TABLE "status" "PASSED"
             debug "PCIe check passed"
             exit
         else
@@ -54,7 +54,7 @@ function check_and_rescan_pcie_devices()
 
      done
      debug "PCIe check failed"
-     redis-cli -n 6 HSET $PCIE_STATUS_TABLE "status" "FAILED"
+     sonic-db-cli STATE_DB HSET $PCIE_STATUS_TABLE "status" "FAILED"
 }
 
 check_and_rescan_pcie_devices
diff --git a/files/image_config/rsyslog/rsyslog-config.sh b/files/image_config/rsyslog/rsyslog-config.sh
index 5f2870821..9c2da9780 100755
--- a/files/image_config/rsyslog/rsyslog-config.sh
+++ b/files/image_config/rsyslog/rsyslog-config.sh
@@ -1,6 +1,6 @@
 #!/bin/bash
 
-PLATFORM=`sonic-cfggen -H -v DEVICE_METADATA.localhost.platform`
+PLATFORM=$(sonic-db-cli CONFIG_DB HGET 'DEVICE_METADATA|localhost' platform)
 
 # Parse the device specific asic conf file, if it exists
 ASIC_CONF=/usr/share/sonic/device/$PLATFORM/asic.conf

From 7378b4af3982fb97ee2524ce55e202838d98d07a Mon Sep 17 00:00:00 2001
From: Lukas Stockner <lukas.stockner@freenet.de>
Date: Mon, 13 Mar 2023 14:59:48 +0100
Subject: [PATCH 1054/1115] [Feature] Support configuring source IP for routes
 through FRR

---
 .../frr/zebra/zebra.interfaces.conf.j2        | 20 +++++++++++++++++++
 .../frrcfgd/frrcfgd.py                        | 10 +++++++++-
 .../tests_config/route_filter.json            |  1 +
 .../yang-models/sonic-bgp-global.yang         |  5 +++++
 .../yang-models/sonic-route-map.yang          |  5 +++++
 5 files changed, 40 insertions(+), 1 deletion(-)

diff --git a/dockers/docker-fpm-frr/frr/zebra/zebra.interfaces.conf.j2 b/dockers/docker-fpm-frr/frr/zebra/zebra.interfaces.conf.j2
index 88ad9b46d..69e27f1cf 100644
--- a/dockers/docker-fpm-frr/frr/zebra/zebra.interfaces.conf.j2
+++ b/dockers/docker-fpm-frr/frr/zebra/zebra.interfaces.conf.j2
@@ -9,6 +9,26 @@ exit
 {%   endfor %}
 {%  endif %}
 {% endblock vrf %}
+{% block setsrc %}
+{%  if BGP_GLOBALS is defined and BGP_GLOBALS|length > 0 %}
+{%   for vrf, bgp_sess in BGP_GLOBALS.items() %}
+{%    if 'route_map' in bgp_sess %}
+!
+vrf {{ vrf }}
+ ip protocol bgp route-map {{ bgp_sess['route_map'] }}
+{%    endif %}
+{%   endfor %}
+{%  endif %}
+{%  if ROUTE_MAP is defined and ROUTE_MAP|length > 0 %}
+{%   for rm_key, rm_val in ROUTE_MAP.items() %}
+{%    if 'route_operation' in rm_val and 'set_src' in rm_val %}
+!
+route-map {{rm_key[0]}} {{rm_val['route_operation']}} {{rm_key[1]}}
+ set src {{rm_val['set_src']}}
+{%    endif %}
+{%   endfor %}
+{%  endif %}
+{% endblock setsrc %}
 !
 {% block interfaces %}
 ! Enable nht through default route
diff --git a/src/sonic-frr-mgmt-framework/frrcfgd/frrcfgd.py b/src/sonic-frr-mgmt-framework/frrcfgd/frrcfgd.py
index c2a9f0c14..3368488aa 100755
--- a/src/sonic-frr-mgmt-framework/frrcfgd/frrcfgd.py
+++ b/src/sonic-frr-mgmt-framework/frrcfgd/frrcfgd.py
@@ -1754,7 +1754,8 @@ class BGPConfigDaemon:
                       ('confed_id',                                     '{no:no-prefix}bgp confederation identifier {}'),
                       ('confed_peers',                                  '{no:no-prefix}bgp confederation peers {}', hdl_confed_peers),
                       (['keepalive', 'holdtime'],                       '{no:no-prefix}timers bgp {} {}'),
-                      (['max_med_admin', '+max_med_admin_val'],         '{no:no-prefix}bgp max-med administrative {}', ['true', 'false'])
+                      (['max_med_admin', '+max_med_admin_val'],         '{no:no-prefix}bgp max-med administrative {}', ['true', 'false']),
+                      ('route_map',                                     '{no:no-prefix}ip protocol bgp route-map {}'),
     ]
 
     global_af_key_map = [(['ebgp_route_distance',
@@ -1877,6 +1878,7 @@ class BGPConfigDaemon:
                          ('call_route_map',                 '{no:no-prefix}call {:enable-only}'),
                          ('set_origin',                     '[bgpd]{no:no-prefix}set origin {:tolower}'),
                          ('set_local_pref',                 '[bgpd]{no:no-prefix}set local-preference {}'),
+                         ('set_src',                        '{no:no-prefix}set src {}'),
                          ('set_next_hop',                   '{no:no-prefix}set ip next-hop {}'),
                          ('set_ipv6_next_hop_global',       '[bgpd]{no:no-prefix}set ipv6 next-hop global {}'),
                          ('set_ipv6_next_hop_prefer_global', '[bgpd]{no:no-prefix}set ipv6 next-hop prefer-global', ['true', 'false']),
@@ -2642,6 +2644,12 @@ def __update_bgp(self, data_list):
                     if local_asn is None:
                         syslog.syslog(syslog.LOG_ERR, 'local ASN for VRF %s was not configured' % vrf)
                         continue
+                    if 'route_map' in data:
+                        # Route maps are configured in a different context, so they need a different cmd_prefix
+                        cmd_prefix = ['configure terminal', 'vrf {}'.format(vrf)]
+                        if not key_map.run_command(self, table, {'route_map': data['route_map']}, cmd_prefix):
+                            syslog.syslog(syslog.LOG_ERR, 'failed running BGP global config command')
+                        del data['route_map']
                     cmd_prefix = ['configure terminal', 'router bgp {} vrf {}'.format(local_asn, vrf)]
                     if not key_map.run_command(self, table, data, cmd_prefix):
                         syslog.syslog(syslog.LOG_ERR, 'failed running BGP global config command')
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/route_filter.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/route_filter.json
index 55ba644ae..d99a59caf 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/route_filter.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/route_filter.json
@@ -180,6 +180,7 @@
                     "set_metric_action": "METRIC_SET_VALUE",
                     "set_metric": 50,
                     "set_next_hop": "10.10.10.10",
+                    "set_src": "10.10.10.10",
                     "set_ipv6_next_hop_global": "1000::1",
                     "set_ipv6_next_hop_prefer_global": true,
                     "set_repeat_asn": 5,
diff --git a/src/sonic-yang-models/yang-models/sonic-bgp-global.yang b/src/sonic-yang-models/yang-models/sonic-bgp-global.yang
index db6c02356..0db7bcb8c 100644
--- a/src/sonic-yang-models/yang-models/sonic-bgp-global.yang
+++ b/src/sonic-yang-models/yang-models/sonic-bgp-global.yang
@@ -317,6 +317,11 @@ module sonic-bgp-global {
                     type uint16;
                     description "Hold time";
                 }
+
+                leaf route_map {
+                    type string;
+                    description "Route map to apply to BGP-learned routes in Zebra";
+                }
             }
         }
 
diff --git a/src/sonic-yang-models/yang-models/sonic-route-map.yang b/src/sonic-yang-models/yang-models/sonic-route-map.yang
index 3a5d1f256..bcbe11790 100644
--- a/src/sonic-yang-models/yang-models/sonic-route-map.yang
+++ b/src/sonic-yang-models/yang-models/sonic-route-map.yang
@@ -294,6 +294,11 @@ module sonic-route-map {
                     description "Set metric value";
                 }
 
+                leaf set_src{
+                    type string;
+                    description "Set route source address";
+                }
+
                 leaf set_next_hop{
                     type string;
                     description "Set IP nexthop";

From d57c4905b4d0a08e8978fbd20a2cadceadd8c4fb Mon Sep 17 00:00:00 2001
From: Matej Feder <matej.feder@dnation.cloud>
Date: Mon, 23 Sep 2024 14:51:06 +0200
Subject: [PATCH 1055/1115] Support configuring source IPv6 for routes through
 FRR

Signed-off-by: Matej Feder <matej.feder@dnation.cloud>
---
 .../frr/zebra/zebra.interfaces.conf.j2        |  5 ++++
 .../frrcfgd/frrcfgd.py                        | 18 ++++++-----
 src/sonic-frr/frr                             |  2 +-
 .../tests/yang_model_tests/tests/bgp.json     |  3 ++
 .../yang_model_tests/tests_config/bgp.json    | 30 +++++++++++++++++++
 .../yang-models/sonic-bgp-global.yang         |  7 ++++-
 6 files changed, 55 insertions(+), 10 deletions(-)

diff --git a/dockers/docker-fpm-frr/frr/zebra/zebra.interfaces.conf.j2 b/dockers/docker-fpm-frr/frr/zebra/zebra.interfaces.conf.j2
index 69e27f1cf..1605761cb 100644
--- a/dockers/docker-fpm-frr/frr/zebra/zebra.interfaces.conf.j2
+++ b/dockers/docker-fpm-frr/frr/zebra/zebra.interfaces.conf.j2
@@ -17,6 +17,11 @@ exit
 vrf {{ vrf }}
  ip protocol bgp route-map {{ bgp_sess['route_map'] }}
 {%    endif %}
+{%    if 'route_map_ipv6' in bgp_sess %}
+!
+vrf {{ vrf }}
+ ipv6 protocol bgp route-map {{ bgp_sess['route_map_ipv6'] }}
+{%    endif %}
 {%   endfor %}
 {%  endif %}
 {%  if ROUTE_MAP is defined and ROUTE_MAP|length > 0 %}
diff --git a/src/sonic-frr-mgmt-framework/frrcfgd/frrcfgd.py b/src/sonic-frr-mgmt-framework/frrcfgd/frrcfgd.py
index 3368488aa..2adbc3413 100755
--- a/src/sonic-frr-mgmt-framework/frrcfgd/frrcfgd.py
+++ b/src/sonic-frr-mgmt-framework/frrcfgd/frrcfgd.py
@@ -1755,7 +1755,8 @@ class BGPConfigDaemon:
                       ('confed_peers',                                  '{no:no-prefix}bgp confederation peers {}', hdl_confed_peers),
                       (['keepalive', 'holdtime'],                       '{no:no-prefix}timers bgp {} {}'),
                       (['max_med_admin', '+max_med_admin_val'],         '{no:no-prefix}bgp max-med administrative {}', ['true', 'false']),
-                      ('route_map',                                     '{no:no-prefix}ip protocol bgp route-map {}'),
+                      ('route_map',                                     '[zebra]{no:no-prefix}ip protocol bgp route-map {}'),
+                      ('route_map_ipv6',                                '[zebra]{no:no-prefix}ipv6 protocol bgp route-map {}'),
     ]
 
     global_af_key_map = [(['ebgp_route_distance',
@@ -1878,7 +1879,7 @@ class BGPConfigDaemon:
                          ('call_route_map',                 '{no:no-prefix}call {:enable-only}'),
                          ('set_origin',                     '[bgpd]{no:no-prefix}set origin {:tolower}'),
                          ('set_local_pref',                 '[bgpd]{no:no-prefix}set local-preference {}'),
-                         ('set_src',                        '{no:no-prefix}set src {}'),
+                         ('set_src',                        '[zebra]{no:no-prefix}set src {}'),
                          ('set_next_hop',                   '{no:no-prefix}set ip next-hop {}'),
                          ('set_ipv6_next_hop_global',       '[bgpd]{no:no-prefix}set ipv6 next-hop global {}'),
                          ('set_ipv6_next_hop_prefer_global', '[bgpd]{no:no-prefix}set ipv6 next-hop prefer-global', ['true', 'false']),
@@ -2644,12 +2645,13 @@ def __update_bgp(self, data_list):
                     if local_asn is None:
                         syslog.syslog(syslog.LOG_ERR, 'local ASN for VRF %s was not configured' % vrf)
                         continue
-                    if 'route_map' in data:
-                        # Route maps are configured in a different context, so they need a different cmd_prefix
-                        cmd_prefix = ['configure terminal', 'vrf {}'.format(vrf)]
-                        if not key_map.run_command(self, table, {'route_map': data['route_map']}, cmd_prefix):
-                            syslog.syslog(syslog.LOG_ERR, 'failed running BGP global config command')
-                        del data['route_map']
+                    for route_map_key in ['route_map', 'route_map_ipv6']:
+                        if route_map_key in data:
+                            # Route maps are configured in a different context, so they need a different cmd_prefix
+                            cmd_prefix = ['configure terminal', 'vrf {}'.format(vrf)]
+                            if not key_map.run_command(self, table, {route_map_key: data[route_map_key]}, cmd_prefix):
+                                syslog.syslog(syslog.LOG_ERR, 'failed running BGP global config command')
+                            del data[route_map_key]
                     cmd_prefix = ['configure terminal', 'router bgp {} vrf {}'.format(local_asn, vrf)]
                     if not key_map.run_command(self, table, data, cmd_prefix):
                         syslog.syslog(syslog.LOG_ERR, 'failed running BGP global config command')
diff --git a/src/sonic-frr/frr b/src/sonic-frr/frr
index de0e358b8..3539968c3 160000
--- a/src/sonic-frr/frr
+++ b/src/sonic-frr/frr
@@ -1 +1 @@
-Subproject commit de0e358b877ac9b595e7fb387a302c960a4c02d1
+Subproject commit 3539968c38ed8d46b9705014b5492b1a610888d5
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/bgp.json b/src/sonic-yang-models/tests/yang_model_tests/tests/bgp.json
index 543a98567..64b60fb52 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests/bgp.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests/bgp.json
@@ -2,6 +2,9 @@
     "BGP_GLOBAL_VALID": {
         "desc": "Configure BGP global table."
     },
+    "BGP_GLOBAL_ROUTE_MAP_VALID": {
+        "desc": "Configure BGP global table with route map."
+    },
     "BGP_NEIGHBOR_ALL_VALID": {
         "desc": "Configure BGP neighbor table."
     },
diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/bgp.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/bgp.json
index 6ecc90c38..dea1ab387 100644
--- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/bgp.json
+++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/bgp.json
@@ -82,6 +82,36 @@
         }
     },
 
+    "BGP_GLOBAL_ROUTE_MAP_VALID": {
+        "sonic-vrf:sonic-vrf":{
+            "sonic-vrf:VRF": {
+                "VRF_LIST": [
+                {
+                    "name":"Vrf1"
+                }
+                ]
+            }
+        },
+        "sonic-bgp-global:sonic-bgp-global": {
+            "sonic-bgp-global:BGP_GLOBALS": {
+                "BGP_GLOBALS_LIST": [
+                {
+                    "vrf_name":"default",
+                    "local_asn": 65001,
+                    "route_map": "RM_SET_SRC",
+                    "route_map_ipv6": "RM_SET_SRC6"
+                },
+                {
+                    "vrf_name":"Vrf1",
+                    "local_asn": 65001,
+                    "route_map": "RM_SET_SRC",
+                    "route_map_ipv6": "RM_SET_SRC6"
+                }
+                ]
+            }
+        }
+    },
+
     "BGP_NEIGHBOR_ALL_VALID": {
         "sonic-port:sonic-port": {
             "sonic-port:PORT": {
diff --git a/src/sonic-yang-models/yang-models/sonic-bgp-global.yang b/src/sonic-yang-models/yang-models/sonic-bgp-global.yang
index 0db7bcb8c..12a0b2ef3 100644
--- a/src/sonic-yang-models/yang-models/sonic-bgp-global.yang
+++ b/src/sonic-yang-models/yang-models/sonic-bgp-global.yang
@@ -320,7 +320,12 @@ module sonic-bgp-global {
 
                 leaf route_map {
                     type string;
-                    description "Route map to apply to BGP-learned routes in Zebra";
+                    description "IPv4 route map to apply to BGP-learned routes in Zebra";
+                }
+
+                leaf route_map_ipv6 {
+                    type string;
+                    description "IPv6 route map to apply to BGP-learned routes in Zebra";
                 }
             }
         }

From 5f8d86c7b6de5c77f17975658bdf6026f43b38be Mon Sep 17 00:00:00 2001
From: jostar-yang <jostar_yang@edge-core.com>
Date: Thu, 8 Dec 2022 14:26:50 +0800
Subject: [PATCH 1056/1115] [Edgecore][AS7726/PDDF] Enhance sonic_platform
 feature

Signed-off-by: jostar-yang <jostar_yang@edge-core.com>
---
 .../x86_64-accton_as7726_32x-r0/pcie.yaml     | 471 ++++++++++++++++++
 .../pddf/pd-plugin.json                       |   2 +-
 .../pddf/pddf-device.json                     |  31 +-
 .../pmon_daemon_control.json                  |   3 +-
 .../system_health_monitoring_config.json      |  17 +
 .../as7726-32x/sonic_platform/chassis.py      |  93 ++--
 .../as7726-32x/sonic_platform/helper.py       | 117 +++++
 .../as7726-32x/sonic_platform/pcie.py         |  23 +
 .../as7726-32x/sonic_platform/thermal.py      |   6 +
 9 files changed, 720 insertions(+), 43 deletions(-)
 create mode 100644 device/accton/x86_64-accton_as7726_32x-r0/pcie.yaml
 create mode 100644 device/accton/x86_64-accton_as7726_32x-r0/system_health_monitoring_config.json
 create mode 100644 platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/helper.py
 create mode 100644 platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/pcie.py

diff --git a/device/accton/x86_64-accton_as7726_32x-r0/pcie.yaml b/device/accton/x86_64-accton_as7726_32x-r0/pcie.yaml
new file mode 100644
index 000000000..c019a23aa
--- /dev/null
+++ b/device/accton/x86_64-accton_as7726_32x-r0/pcie.yaml
@@ -0,0 +1,471 @@
+- bus: '00'
+  dev: '00'
+  fn: '0'
+  id: 6f00
+  name: 'Host bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D DMI2
+    (rev 03)'
+- bus: '00'
+  dev: '01'
+  fn: '0'
+  id: 6f02
+  name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI
+    Express Root Port 1 (rev 03)'
+- bus: '00'
+  dev: '01'
+  fn: '1'
+  id: 6f03
+  name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI
+    Express Root Port 1 (rev 03)'
+- bus: '00'
+  dev: '02'
+  fn: '0'
+  id: 6f04
+  name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI
+    Express Root Port 2 (rev 03)'
+- bus: '00'
+  dev: '02'
+  fn: '1'
+  id: 6f05
+  name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI
+    Express Root Port 2 (rev 03)'
+- bus: '00'
+  dev: '02'
+  fn: '2'
+  id: 6f06
+  name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI
+    Express Root Port 2 (rev 03)'
+- bus: '00'
+  dev: '02'
+  fn: '3'
+  id: 6f07
+  name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI
+    Express Root Port 2 (rev 03)'
+- bus: '00'
+  dev: '03'
+  fn: '0'
+  id: 6f08
+  name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI
+    Express Root Port 3 (rev 03)'
+- bus: '00'
+  dev: '03'
+  fn: '1'
+  id: 6f09
+  name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI
+    Express Root Port 3 (rev 03)'
+- bus: '00'
+  dev: '03'
+  fn: '2'
+  id: 6f0a
+  name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI
+    Express Root Port 3 (rev 03)'
+- bus: '00'
+  dev: '03'
+  fn: '3'
+  id: 6f0b
+  name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI
+    Express Root Port 3 (rev 03)'
+- bus: '00'
+  dev: '05'
+  fn: '0'
+  id: 6f28
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Map/VTd_Misc/System Management (rev 03)'
+- bus: '00'
+  dev: '05'
+  fn: '1'
+  id: 6f29
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D IIO Hot Plug (rev 03)'
+- bus: '00'
+  dev: '05'
+  fn: '2'
+  id: 6f2a
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D IIO RAS/Control Status/Global Errors (rev 03)'
+- bus: '00'
+  dev: '05'
+  fn: '4'
+  id: 6f2c
+  name: 'PIC: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D I/O APIC (rev
+    03)'
+- bus: '00'
+  dev: '14'
+  fn: '0'
+  id: 8c31
+  name: 'USB controller: Intel Corporation 8 Series/C220 Series Chipset Family USB
+    xHCI (rev 05)'
+- bus: '00'
+  dev: '16'
+  fn: '0'
+  id: 8c3a
+  name: 'Communication controller: Intel Corporation 8 Series/C220 Series Chipset
+    Family MEI Controller #1 (rev 04)'
+- bus: '00'
+  dev: '16'
+  fn: '1'
+  id: 8c3b
+  name: 'Communication controller: Intel Corporation 8 Series/C220 Series Chipset
+    Family MEI Controller #2 (rev 04)'
+- bus: '00'
+  dev: 1c
+  fn: '0'
+  id: 8c10
+  name: 'PCI bridge: Intel Corporation 8 Series/C220 Series Chipset Family PCI Express
+    Root Port #1 (rev d5)'
+- bus: '00'
+  dev: 1c
+  fn: '1'
+  id: 8c12
+  name: 'PCI bridge: Intel Corporation 8 Series/C220 Series Chipset Family PCI Express
+    Root Port #2 (rev d5)'
+- bus: '00'
+  dev: 1c
+  fn: '4'
+  id: 8c18
+  name: 'PCI bridge: Intel Corporation 8 Series/C220 Series Chipset Family PCI Express
+    Root Port #5 (rev d5)'
+- bus: '00'
+  dev: 1d
+  fn: '0'
+  id: 8c26
+  name: 'USB controller: Intel Corporation 8 Series/C220 Series Chipset Family USB
+    EHCI #1 (rev 05)'
+- bus: '00'
+  dev: 1f
+  fn: '0'
+  id: 8c54
+  name: 'ISA bridge: Intel Corporation C224 Series Chipset Family Server Standard
+    SKU LPC Controller (rev 05)'
+- bus: '00'
+  dev: 1f
+  fn: '2'
+  id: 8c02
+  name: 'SATA controller: Intel Corporation 8 Series/C220 Series Chipset Family 6-port
+    SATA Controller 1 [AHCI mode] (rev 05)'
+- bus: '00'
+  dev: 1f
+  fn: '3'
+  id: 8c22
+  name: 'SMBus: Intel Corporation 8 Series/C220 Series Chipset Family SMBus Controller
+    (rev 05)'
+- bus: '03'
+  dev: '00'
+  fn: '0'
+  id: 6f50
+  name: 'System peripheral: Intel Corporation Xeon Processor D Family QuickData Technology
+    Register DMA Channel 0'
+- bus: '03'
+  dev: '00'
+  fn: '1'
+  id: 6f51
+  name: 'System peripheral: Intel Corporation Xeon Processor D Family QuickData Technology
+    Register DMA Channel 1'
+- bus: '03'
+  dev: '00'
+  fn: '2'
+  id: 6f52
+  name: 'System peripheral: Intel Corporation Xeon Processor D Family QuickData Technology
+    Register DMA Channel 2'
+- bus: '03'
+  dev: '00'
+  fn: '3'
+  id: 6f53
+  name: 'System peripheral: Intel Corporation Xeon Processor D Family QuickData Technology
+    Register DMA Channel 3'
+- bus: '05'
+  dev: '00'
+  fn: '0'
+  id: 15ab
+  name: 'Ethernet controller: Intel Corporation Ethernet Connection X552 10 GbE Backplane'
+- bus: '05'
+  dev: '00'
+  fn: '1'
+  id: 15ab
+  name: 'Ethernet controller: Intel Corporation Ethernet Connection X552 10 GbE Backplane'
+- bus: '07'
+  dev: '00'
+  fn: '0'
+  id: b870
+  name: 'Ethernet controller: Broadcom Inc. and subsidiaries Device b870 (rev 01)'
+- bus: 0b
+  dev: '00'
+  fn: '0'
+  id: 165f
+  name: 'Ethernet controller: Broadcom Inc. and subsidiaries NetXtreme BCM5720 2-port
+    Gigabit Ethernet PCIe'
+- bus: ff
+  dev: 0b
+  fn: '0'
+  id: 6f81
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D R3 QPI Link 0/1 (rev 03)'
+- bus: ff
+  dev: 0b
+  fn: '1'
+  id: 6f36
+  name: 'Performance counters: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D R3 QPI Link 0/1 (rev 03)'
+- bus: ff
+  dev: 0b
+  fn: '2'
+  id: 6f37
+  name: 'Performance counters: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D R3 QPI Link 0/1 (rev 03)'
+- bus: ff
+  dev: 0b
+  fn: '3'
+  id: 6f76
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D R3 QPI Link Debug (rev 03)'
+- bus: ff
+  dev: 0c
+  fn: '0'
+  id: 6fe0
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Caching Agent (rev 03)'
+- bus: ff
+  dev: 0c
+  fn: '1'
+  id: 6fe1
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Caching Agent (rev 03)'
+- bus: ff
+  dev: 0c
+  fn: '2'
+  id: 6fe2
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Caching Agent (rev 03)'
+- bus: ff
+  dev: 0c
+  fn: '3'
+  id: 6fe3
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Caching Agent (rev 03)'
+- bus: ff
+  dev: 0f
+  fn: '0'
+  id: 6ff8
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Caching Agent (rev 03)'
+- bus: ff
+  dev: 0f
+  fn: '4'
+  id: 6ffc
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Caching Agent (rev 03)'
+- bus: ff
+  dev: 0f
+  fn: '5'
+  id: 6ffd
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Caching Agent (rev 03)'
+- bus: ff
+  dev: 0f
+  fn: '6'
+  id: 6ffe
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Caching Agent (rev 03)'
+- bus: ff
+  dev: '10'
+  fn: '0'
+  id: 6f1d
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D R2PCIe Agent (rev 03)'
+- bus: ff
+  dev: '10'
+  fn: '1'
+  id: 6f34
+  name: 'Performance counters: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D R2PCIe Agent (rev 03)'
+- bus: ff
+  dev: '10'
+  fn: '5'
+  id: 6f1e
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Ubox (rev 03)'
+- bus: ff
+  dev: '10'
+  fn: '6'
+  id: 6f7d
+  name: 'Performance counters: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Ubox (rev 03)'
+- bus: ff
+  dev: '10'
+  fn: '7'
+  id: 6f1f
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Ubox (rev 03)'
+- bus: ff
+  dev: '12'
+  fn: '0'
+  id: 6fa0
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Home Agent 0 (rev 03)'
+- bus: ff
+  dev: '12'
+  fn: '1'
+  id: 6f30
+  name: 'Performance counters: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Home Agent 0 (rev 03)'
+- bus: ff
+  dev: '13'
+  fn: '0'
+  id: 6fa8
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Target Address/Thermal/RAS (rev 03)'
+- bus: ff
+  dev: '13'
+  fn: '1'
+  id: 6f71
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Target Address/Thermal/RAS (rev 03)'
+- bus: ff
+  dev: '13'
+  fn: '2'
+  id: 6faa
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel Target Address Decoder (rev 03)'
+- bus: ff
+  dev: '13'
+  fn: '3'
+  id: 6fab
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel Target Address Decoder (rev 03)'
+- bus: ff
+  dev: '13'
+  fn: '4'
+  id: 6fac
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel Target Address Decoder (rev 03)'
+- bus: ff
+  dev: '13'
+  fn: '5'
+  id: 6fad
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel Target Address Decoder (rev 03)'
+- bus: ff
+  dev: '13'
+  fn: '6'
+  id: 6fae
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D DDRIO Channel 0/1 Broadcast (rev 03)'
+- bus: ff
+  dev: '13'
+  fn: '7'
+  id: 6faf
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D DDRIO Global Broadcast (rev 03)'
+- bus: ff
+  dev: '14'
+  fn: '0'
+  id: 6fb0
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel 0 Thermal Control (rev 03)'
+- bus: ff
+  dev: '14'
+  fn: '1'
+  id: 6fb1
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel 1 Thermal Control (rev 03)'
+- bus: ff
+  dev: '14'
+  fn: '2'
+  id: 6fb2
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel 0 Error (rev 03)'
+- bus: ff
+  dev: '14'
+  fn: '3'
+  id: 6fb3
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel 1 Error (rev 03)'
+- bus: ff
+  dev: '14'
+  fn: '4'
+  id: 6fbc
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D DDRIO Channel 0/1 Interface (rev 03)'
+- bus: ff
+  dev: '14'
+  fn: '5'
+  id: 6fbd
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D DDRIO Channel 0/1 Interface (rev 03)'
+- bus: ff
+  dev: '14'
+  fn: '6'
+  id: 6fbe
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D DDRIO Channel 0/1 Interface (rev 03)'
+- bus: ff
+  dev: '14'
+  fn: '7'
+  id: 6fbf
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D DDRIO Channel 0/1 Interface (rev 03)'
+- bus: ff
+  dev: '15'
+  fn: '0'
+  id: 6fb4
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel 2 Thermal Control (rev 03)'
+- bus: ff
+  dev: '15'
+  fn: '1'
+  id: 6fb5
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel 3 Thermal Control (rev 03)'
+- bus: ff
+  dev: '15'
+  fn: '2'
+  id: 6fb6
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel 2 Error (rev 03)'
+- bus: ff
+  dev: '15'
+  fn: '3'
+  id: 6fb7
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel 3 Error (rev 03)'
+- bus: ff
+  dev: 1e
+  fn: '0'
+  id: 6f98
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Power Control Unit (rev 03)'
+- bus: ff
+  dev: 1e
+  fn: '1'
+  id: 6f99
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Power Control Unit (rev 03)'
+- bus: ff
+  dev: 1e
+  fn: '2'
+  id: 6f9a
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Power Control Unit (rev 03)'
+- bus: ff
+  dev: 1e
+  fn: '3'
+  id: 6fc0
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Power Control Unit (rev 03)'
+- bus: ff
+  dev: 1e
+  fn: '4'
+  id: 6f9c
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Power Control Unit (rev 03)'
+- bus: ff
+  dev: 1f
+  fn: '0'
+  id: 6f88
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Power Control Unit (rev 03)'
+- bus: ff
+  dev: 1f
+  fn: '2'
+  id: 6f8a
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Power Control Unit (rev 03)'
diff --git a/device/accton/x86_64-accton_as7726_32x-r0/pddf/pd-plugin.json b/device/accton/x86_64-accton_as7726_32x-r0/pddf/pd-plugin.json
index b4e2cc4ac..2b8ad2c45 100644
--- a/device/accton/x86_64-accton_as7726_32x-r0/pddf/pd-plugin.json
+++ b/device/accton/x86_64-accton_as7726_32x-r0/pddf/pd-plugin.json
@@ -61,7 +61,7 @@
 		
         "duty_cycle_to_pwm": "lambda dc: ((dc*100)/625 -1)",
 
-        "pwm_to_duty_cycle": "lambda pwm: (((pwm+1)*625+75)/100)"
+        "pwm_to_duty_cycle": "lambda pwm: (((pwm+1)*625)/100)"
     }
 
 }
diff --git a/device/accton/x86_64-accton_as7726_32x-r0/pddf/pddf-device.json b/device/accton/x86_64-accton_as7726_32x-r0/pddf/pddf-device.json
index b73f22b54..95f964277 100644
--- a/device/accton/x86_64-accton_as7726_32x-r0/pddf/pddf-device.json
+++ b/device/accton/x86_64-accton_as7726_32x-r0/pddf/pddf-device.json
@@ -5,7 +5,7 @@
 		"num_fantrays":6,
 		"num_fans_pertray":2,
 		"num_ports":34,
-		"num_temps":5,
+		"num_temps":7,
 		"pddf_dev_types":
 		{
 			"description":"AS7726 - Below is the list of supported PDDF device types (chip names) for various components. If any component uses some other driver, we will create the client using 'echo <dev-address> <dev-type> > <path>/new_device' method",
@@ -1865,7 +1865,34 @@
 			]
 		}
 	},
-	
+    "TEMP6" :
+    {
+        "dev_info": { "device_type":"TEMP_SENSOR", "device_name":"TEMP6"},
+        "dev_attr": { "display_name":"pch_haswell-virtual-0"},
+        "i2c":
+        {
+            "path_info": {"sysfs_base_path": "/sys/class/hwmon/hwmon0"},
+            "attr_list":
+            [
+                { "attr_name": "temp1_input"}
+            ]
+        }
+    },
+    "TEMP7" :
+    {
+        "dev_info": { "device_type":"TEMP_SENSOR", "device_name":"TEMP7"},
+        "dev_attr": { "display_name":"coretemp-isa-0000"},
+        "i2c":
+        {
+            "path_info": {"sysfs_base_path": "/sys/class/hwmon/hwmon1"},
+            "attr_list":
+            [
+                { "attr_name": "temp1_high_crit_threshold", "drv_attr_name":"temp1_crit"},
+                { "attr_name": "temp1_high_threshold", "drv_attr_name":"temp1_max"},
+                { "attr_name": "temp1_input"}
+            ]
+        }
+    },
 	"SYSSTATUS":
 	{
 		"dev_info":{ "device_type":"SYSSTAT", "device_name":"SYSSTATUS"},
diff --git a/device/accton/x86_64-accton_as7726_32x-r0/pmon_daemon_control.json b/device/accton/x86_64-accton_as7726_32x-r0/pmon_daemon_control.json
index a3b204e20..44bad6494 100644
--- a/device/accton/x86_64-accton_as7726_32x-r0/pmon_daemon_control.json
+++ b/device/accton/x86_64-accton_as7726_32x-r0/pmon_daemon_control.json
@@ -1,5 +1,4 @@
 {
-    "skip_ledd": true,
-    "skip_pcied": true
+    "skip_ledd": true
 }
 
diff --git a/device/accton/x86_64-accton_as7726_32x-r0/system_health_monitoring_config.json b/device/accton/x86_64-accton_as7726_32x-r0/system_health_monitoring_config.json
new file mode 100644
index 000000000..53b14bec1
--- /dev/null
+++ b/device/accton/x86_64-accton_as7726_32x-r0/system_health_monitoring_config.json
@@ -0,0 +1,17 @@
+{
+    "services_to_ignore": [],
+    "devices_to_ignore": [
+        "asic",
+        "psu.voltage",
+        "psu.temperature",
+        "PSU1_FAN1.speed",
+        "PSU2_FAN1.speed"
+    ],
+    "user_defined_checkers": [],
+    "polling_interval": 60,
+    "led_color": {
+        "fault": "STATUS_LED_COLOR_AMBER",
+        "normal": "STATUS_LED_COLOR_GREEN",
+        "booting": "STATUS_LED_COLOR_OFF"
+    }
+}
diff --git a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/chassis.py b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/chassis.py
index 8ff20a760..1f23dcf81 100644
--- a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/chassis.py
+++ b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/chassis.py
@@ -8,58 +8,59 @@
 
 try:
     import sys
-    import time
     from sonic_platform_pddf_base.pddf_chassis import PddfChassis
+    from .event import SfpEvent
+    from .helper import APIHelper
 except ImportError as e:
     raise ImportError(str(e) + "- required module not found")
 
+NUM_COMPONENT = 6
+HOST_REBOOT_CAUSE_PATH = "/host/reboot-cause/"
+PMON_REBOOT_CAUSE_PATH = "/usr/share/sonic/platform/api_files/reboot-cause/"
+REBOOT_CAUSE_FILE = "reboot-cause.txt"
 
 class Chassis(PddfChassis):
     """
     PDDF Platform-specific Chassis class
     """
 
+    SYSLED_DEV_NAME = "DIAG_LED"
+
     def __init__(self, pddf_data=None, pddf_plugin_data=None):
         PddfChassis.__init__(self, pddf_data, pddf_plugin_data)
+        self.__initialize_components()
+        self._api_helper = APIHelper()
+        self._sfpevent = SfpEvent(self.get_all_sfps())
+        
+
+    def __initialize_components(self):
+        from sonic_platform.component import Component
+        for index in range(NUM_COMPONENT):
+            component = Component(index)
+            self._component_list.append(component)
 
     # Provide the functions/variables below for which implementation is to be overwritten
-    sfp_change_event_data = {'valid': 0, 'last': 0, 'present': 0}
-    def get_change_event(self, timeout=2000):
-        now = time.time()
-        port_dict = {}
-        change_dict = {}
-        change_dict['sfp'] = port_dict
-
-        if timeout < 1000:
-            timeout = 1000
-        timeout = timeout / float(1000)  # Convert to secs
-
-        if now < (self.sfp_change_event_data['last'] + timeout) and self.sfp_change_event_data['valid']:
-            return True, change_dict
-        
-        bitmap = 0
-        for i in range(34):
-            modpres = self.get_sfp(i+1).get_presence()
-            if modpres:
-                bitmap = bitmap | (1 << i)
-
-        changed_ports = self.sfp_change_event_data['present'] ^ bitmap
-        if changed_ports:
-            for i in range(34):
-                if (changed_ports & (1 << i)):
-                    if (bitmap & (1 << i)) == 0:
-                        port_dict[i+1] = '0'
-                    else:
-                        port_dict[i+1] = '1'
-
-
-            # Update teh cache dict
-            self.sfp_change_event_data['present'] = bitmap
-            self.sfp_change_event_data['last'] = now
-            self.sfp_change_event_data['valid'] = 1
-            return True, change_dict
-        else:
-            return True, change_dict
+    def get_change_event(self, timeout=0):
+        return self._sfpevent.get_sfp_event(timeout)
+
+    def get_reboot_cause(self):
+        """
+        Retrieves the cause of the previous reboot
+
+        Returns:
+            A tuple (string, string) where the first element is a string
+            containing the cause of the previous reboot. This string must be
+            one of the predefined strings in this class. If the first string
+            is "REBOOT_CAUSE_HARDWARE_OTHER", the second string can be used
+            to pass a description of the reboot cause.
+        """
+
+        reboot_cause_path = (HOST_REBOOT_CAUSE_PATH + REBOOT_CAUSE_FILE)
+        sw_reboot_cause = self._api_helper.read_txt_file(
+            reboot_cause_path) or "Unknown"
+
+
+        return ('REBOOT_CAUSE_NON_HARDWARE', sw_reboot_cause)
 
 
     def get_sfp(self, index):
@@ -84,3 +85,19 @@ def get_sfp(self, index):
             sys.stderr.write("SFP index {} out of range (1-{})\n".format(
                              index, len(self._sfp_list)))
         return sfp
+  
+    def initizalize_system_led(self):
+        return
+
+    def get_status_led(self):
+        return self.get_system_led(self.SYSLED_DEV_NAME)
+
+    def set_status_led(self, color):
+        return self.set_system_led(self.SYSLED_DEV_NAME, color)
+    
+    def get_port_or_cage_type(self, port):
+        from sonic_platform_base.sfp_base import SfpBase
+        if port in range(1, 32):
+            return SfpBase.SFP_PORT_TYPE_BIT_QSFP | SfpBase.SFP_PORT_TYPE_BIT_QSFP_PLUS | SfpBase.SFP_PORT_TYPE_BIT_QSFP28
+        else:
+            return SfpBase.SFP_PORT_TYPE_BIT_SFP | SfpBase.SFP_PORT_TYPE_BIT_SFP_PLUS
diff --git a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/helper.py b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/helper.py
new file mode 100644
index 000000000..b124ca29f
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/helper.py
@@ -0,0 +1,117 @@
+import os
+import struct
+import subprocess
+from mmap import *
+from sonic_py_common import device_info
+
+HOST_CHK_CMD = "docker > /dev/null 2>&1"
+EMPTY_STRING = ""
+
+
+class APIHelper():
+
+    def __init__(self):
+        (self.platform, self.hwsku) = device_info.get_platform_and_hwsku()
+
+    def is_host(self):
+        return os.system(HOST_CHK_CMD) == 0
+
+    def pci_get_value(self, resource, offset):
+        status = True
+        result = ""
+        try:
+            fd = os.open(resource, os.O_RDWR)
+            mm = mmap(fd, 0)
+            mm.seek(int(offset))
+            read_data_stream = mm.read(4)
+            result = struct.unpack('I', read_data_stream)
+        except Exception:
+            status = False
+        return status, result
+
+    def run_command(self, cmd):
+        status = True
+        result = ""
+        try:
+            p = subprocess.Popen(
+                cmd, shell=True, stdout=subprocess.PIPE, stderr=subprocess.PIPE)
+            raw_data, err = p.communicate()
+            if err == '':
+                result = raw_data.strip()
+        except Exception:
+            status = False
+        return status, result
+
+    def run_interactive_command(self, cmd):
+        try:
+            os.system(cmd)
+        except Exception:
+            return False
+        return True
+
+    def read_txt_file(self, file_path):
+        try:
+            with open(file_path, 'r', errors='replace') as fd:
+                data = fd.read()
+                return data.strip()
+        except IOError:
+            pass
+        return None
+
+    def write_txt_file(self, file_path, value):
+        try:
+            with open(file_path, 'w') as fd:
+                fd.write(str(value))
+        except IOError:
+            return False
+        return True
+
+    def ipmi_raw(self, netfn, cmd):
+        status = True
+        result = ""
+        try:
+            cmd = "ipmitool raw {} {}".format(str(netfn), str(cmd))
+            p = subprocess.Popen(
+                cmd, shell=True, stdout=subprocess.PIPE, stderr=subprocess.PIPE)
+            raw_data, err = p.communicate()
+            if err == '':
+                result = raw_data.strip()
+            else:
+                status = False
+        except Exception:
+            status = False
+        return status, result
+
+    def ipmi_fru_id(self, id, key=None):
+        status = True
+        result = ""
+        try:
+            cmd = "ipmitool fru print {}".format(str(
+                id)) if not key else "ipmitool fru print {0} | grep '{1}' ".format(str(id), str(key))
+
+            p = subprocess.Popen(
+                cmd, shell=True, stdout=subprocess.PIPE, stderr=subprocess.PIPE)
+            raw_data, err = p.communicate()
+            if err == '':
+                result = raw_data.strip()
+            else:
+                status = False
+        except Exception:
+            status = False
+        return status, result
+
+    def ipmi_set_ss_thres(self, id, threshold_key, value):
+        status = True
+        result = ""
+        try:
+            cmd = "ipmitool sensor thresh '{}' {} {}".format(str(id), str(threshold_key), str(value))
+            p = subprocess.Popen(
+                cmd, shell=True, stdout=subprocess.PIPE, stderr=subprocess.PIPE)
+            raw_data, err = p.communicate()
+            if err == '':
+                result = raw_data.strip()
+            else:
+                status = False
+        except Exception:
+            status = False
+        return status, result
diff --git a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/pcie.py b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/pcie.py
new file mode 100644
index 000000000..0d972249a
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/pcie.py
@@ -0,0 +1,23 @@
+#############################################################################
+# Edgecore
+#
+# Module contains an implementation of SONiC Platform Base API and
+# provides the fan status which are available in the platform
+# Base PCIe class
+#############################################################################
+
+import logging
+
+
+try:
+    from sonic_platform.component import Component
+    from sonic_platform_base.sonic_pcie.pcie_common import PcieUtil
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+
+class Pcie(PcieUtil):
+    """Edgecore Platform-specific PCIe class"""
+
+    def __init__(self, platform_path):
+        PcieUtil.__init__(self, platform_path)
diff --git a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/thermal.py b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/thermal.py
index 77d6ec7ae..d5cd4ebe5 100644
--- a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/thermal.py
+++ b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/thermal.py
@@ -15,3 +15,9 @@ def __init__(self, index, pddf_data=None, pddf_plugin_data=None, is_psu_thermal=
         PddfThermal.__init__(self, index, pddf_data, pddf_plugin_data, is_psu_thermal, psu_index)
 
     # Provide the functions/variables below for which implementation is to be overwritten
+    def get_status(self):
+        get_temp=self.get_temperature()
+
+        if get_temp is not None:
+            return True if get_temp else False
+

From adf615d7b075d0617fa6b8417e7aa8b1b92ac7b1 Mon Sep 17 00:00:00 2001
From: jostar-yang <jostar_yang@edge-core.com>
Date: Fri, 9 Dec 2022 15:07:44 +0800
Subject: [PATCH 1057/1115] Fix LGTM alerts

---
 .../as7726-32x/sonic_platform/pcie.py                         | 4 ----
 1 file changed, 4 deletions(-)

diff --git a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/pcie.py b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/pcie.py
index 0d972249a..e4da32adf 100644
--- a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/pcie.py
+++ b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/pcie.py
@@ -6,11 +6,7 @@
 # Base PCIe class
 #############################################################################
 
-import logging
-
-
 try:
-    from sonic_platform.component import Component
     from sonic_platform_base.sonic_pcie.pcie_common import PcieUtil
 except ImportError as e:
     raise ImportError(str(e) + "- required module not found")

From 7915b4b8c666b3e7993061cc59d7d0bd3533513a Mon Sep 17 00:00:00 2001
From: jostar-yang <jostar_yang@edge-core.com>
Date: Mon, 12 Dec 2022 14:24:34 +0800
Subject: [PATCH 1058/1115] Add get_name to pass pytest

---
 .../as7726-32x/sonic_platform/fan.py          | 16 ++++++++++++-
 .../as7726-32x/sonic_platform/fan_drawer.py   |  8 +++++++
 .../as7726-32x/sonic_platform/psu.py          | 21 +++++++++++++++++
 .../as7726-32x/sonic_platform/sfp.py          | 23 +++++++++++++++++++
 .../as7726-32x/sonic_platform/thermal.py      |  6 +++++
 5 files changed, 73 insertions(+), 1 deletion(-)

diff --git a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/fan.py b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/fan.py
index 23d8be5a8..38fe9dde9 100644
--- a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/fan.py
+++ b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/fan.py
@@ -6,6 +6,9 @@
 except ImportError as e:
     raise ImportError(str(e) + "- required module not found")
 
+FAN_NAME_LIST = ["FAN-1F", "FAN-1R", "FAN-2F", "FAN-2R",
+                 "FAN-3F", "FAN-3R", "FAN-4F", "FAN-4R",
+                 "FAN-5F", "FAN-5R", "FAN-6F", "FAN-6R"]
 
 class Fan(PddfFan):
     """PDDF Platform-Specific Fan class"""
@@ -15,5 +18,16 @@ def __init__(self, tray_idx, fan_idx=0, pddf_data=None, pddf_plugin_data=None, i
         PddfFan.__init__(self, tray_idx, fan_idx, pddf_data, pddf_plugin_data, is_psu_fan, psu_index)
 
     # Provide the functions/variables below for which implementation is to be overwritten
-    # Since AS4630 psu_fan airflow direction cant be read from sysfs, it is fixed as 'F2B' or 'intake'
+    
+    def get_name(self):
+        """
+        Retrieves the name of the device
+            Returns:
+            string: The name of the device
+        """
+        fan_name = FAN_NAME_LIST[(self.fantray_index-1)*2 + self.fan_index-1] \
+            if not self.is_psu_fan \
+            else "PSU-{} FAN-{}".format(self.fans_psu_index, self.fan_index)
+
+        return fan_name
 
diff --git a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/fan_drawer.py b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/fan_drawer.py
index 3b9bb607f..5d8bc41f6 100644
--- a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/fan_drawer.py
+++ b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/fan_drawer.py
@@ -15,3 +15,11 @@ def __init__(self, tray_idx, pddf_data=None, pddf_plugin_data=None):
         PddfFanDrawer.__init__(self, tray_idx, pddf_data, pddf_plugin_data)
 
     # Provide the functions/variables below for which implementation is to be overwritten
+    def get_name(self):
+        """
+        Retrieves the fan drawer name
+        Returns:
+            string: The name of the device
+        """
+        return "FanTray{}".format(self.fantray_index)
+
diff --git a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/psu.py b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/psu.py
index a2a330206..48cdbab12 100644
--- a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/psu.py
+++ b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/psu.py
@@ -17,6 +17,27 @@ def __init__(self, index, pddf_data=None, pddf_plugin_data=None):
         PddfPsu.__init__(self, index, pddf_data, pddf_plugin_data)
         
     # Provide the functions/variables below for which implementation is to be overwritten
+    def get_voltage_high_threshold(self):
+        """
+        Retrieves the high threshold PSU voltage output
+        Returns:
+            A float number, the high threshold output voltage in volts, 
+            e.g. 12.1 
+        """
+        return 14.72
+
+    def get_voltage_low_threshold(self):
+        """
+        Retrieves the low threshold PSU voltage output
+        Returns:
+            A float number, the low threshold output voltage in volts, 
+            e.g. 12.1 
+        """
+        return 7.68
+
+    def get_name(self):
+        return "PSU-{}".format(self.psu_index)
+
     def get_maximum_supplied_power(self):
         """
         Retrieves the maximum supplied power by PSU (or PSU capacity)
diff --git a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/sfp.py b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/sfp.py
index d9b6e491b..17d7e9b6c 100644
--- a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/sfp.py
+++ b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/sfp.py
@@ -1,7 +1,10 @@
 #!/usr/bin/env python
 
 try:
+    import natsort
     from sonic_platform_pddf_base.pddf_sfp import PddfSfp
+    from sonic_platform_base.sonic_sfp.sfputilhelper import SfpUtilHelper
+    from sonic_py_common import device_info
 except ImportError as e:
     raise ImportError (str(e) + "- required module not found")
 
@@ -15,3 +18,23 @@ def __init__(self, index, pddf_data=None, pddf_plugin_data=None):
         PddfSfp.__init__(self, index, pddf_data, pddf_plugin_data)
 
     # Provide the functions/variables below for which implementation is to be overwritten
+    def __get_path_to_port_config_file(self):
+        platform, hwsku = device_info.get_platform_and_hwsku()
+        hwsku_path = "/".join(["/usr/share/sonic/platform",hwsku])
+        return "/".join([hwsku_path, "port_config.ini"])
+
+    def get_name(self):
+        """
+        Retrieves the name of the device
+            Returns:
+            string: The name of the device
+        """                
+        sfputil_helper = SfpUtilHelper()
+        sfputil_helper.read_porttab_mappings(
+            self.__get_path_to_port_config_file())
+
+        logical_port_list = sfputil_helper.logical
+        logical_port_list = natsort.natsorted(logical_port_list)
+        name = logical_port_list[self.port_index-1] or "Unknown"
+
+        return name
diff --git a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/thermal.py b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/thermal.py
index d5cd4ebe5..98749cbe6 100644
--- a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/thermal.py
+++ b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/thermal.py
@@ -15,6 +15,12 @@ def __init__(self, index, pddf_data=None, pddf_plugin_data=None, is_psu_thermal=
         PddfThermal.__init__(self, index, pddf_data, pddf_plugin_data, is_psu_thermal, psu_index)
 
     # Provide the functions/variables below for which implementation is to be overwritten
+    def get_name(self):
+        if self.is_psu_thermal:
+            return "PSU-{0} temp sensor 1".format(self.thermals_psu_index)
+        else:
+            return "Temp sensor {0}".format(self.thermal_index)
+    
     def get_status(self):
         get_temp=self.get_temperature()
 

From 2ba55df79f1631d3188b7df6c0ead1d75be87709 Mon Sep 17 00:00:00 2001
From: jostar-yang <jostar_yang@edge-core.com>
Date: Mon, 12 Dec 2022 15:26:07 +0800
Subject: [PATCH 1059/1115] Modify fan direction name to lower case

---
 .../pddf/pd-plugin.json                         |  4 ++--
 .../pddf/pddf-device.json                       | 17 ++---------------
 2 files changed, 4 insertions(+), 17 deletions(-)

diff --git a/device/accton/x86_64-accton_as7726_32x-r0/pddf/pd-plugin.json b/device/accton/x86_64-accton_as7726_32x-r0/pddf/pd-plugin.json
index 2b8ad2c45..d79bdb4d5 100644
--- a/device/accton/x86_64-accton_as7726_32x-r0/pddf/pd-plugin.json
+++ b/device/accton/x86_64-accton_as7726_32x-r0/pddf/pd-plugin.json
@@ -34,7 +34,7 @@
         {
             "i2c":
             {
-                "valmap": { "F2B":"EXHAUST", "B2F":"INTAKE" } 
+                "valmap": { "F2B":"exhaust", "B2F":"intake" } 
             }
         },
 
@@ -47,7 +47,7 @@
         {
             "i2c":
             {
-                "valmap": {"1":"EXHAUST", "0":"INTAKE"} 
+                "valmap": {"1":"exhaust", "0":"intake"} 
             }
         },
 
diff --git a/device/accton/x86_64-accton_as7726_32x-r0/pddf/pddf-device.json b/device/accton/x86_64-accton_as7726_32x-r0/pddf/pddf-device.json
index 95f964277..f7953c74a 100644
--- a/device/accton/x86_64-accton_as7726_32x-r0/pddf/pddf-device.json
+++ b/device/accton/x86_64-accton_as7726_32x-r0/pddf/pddf-device.json
@@ -5,7 +5,7 @@
 		"num_fantrays":6,
 		"num_fans_pertray":2,
 		"num_ports":34,
-		"num_temps":7,
+		"num_temps":6,
 		"pddf_dev_types":
 		{
 			"description":"AS7726 - Below is the list of supported PDDF device types (chip names) for various components. If any component uses some other driver, we will create the client using 'echo <dev-address> <dev-type> > <path>/new_device' method",
@@ -1868,23 +1868,10 @@
     "TEMP6" :
     {
         "dev_info": { "device_type":"TEMP_SENSOR", "device_name":"TEMP6"},
-        "dev_attr": { "display_name":"pch_haswell-virtual-0"},
-        "i2c":
-        {
-            "path_info": {"sysfs_base_path": "/sys/class/hwmon/hwmon0"},
-            "attr_list":
-            [
-                { "attr_name": "temp1_input"}
-            ]
-        }
-    },
-    "TEMP7" :
-    {
-        "dev_info": { "device_type":"TEMP_SENSOR", "device_name":"TEMP7"},
         "dev_attr": { "display_name":"coretemp-isa-0000"},
         "i2c":
         {
-            "path_info": {"sysfs_base_path": "/sys/class/hwmon/hwmon1"},
+            "path_info": {"sysfs_base_path": "/sys/class/hwmon/hwmon0"},
             "attr_list":
             [
                 { "attr_name": "temp1_high_crit_threshold", "drv_attr_name":"temp1_crit"},

From eb20781957e5f508842e6c1f49f13f16886d5091 Mon Sep 17 00:00:00 2001
From: jostar-yang <jostar_yang@edge-core.com>
Date: Wed, 21 Dec 2022 16:38:49 +0800
Subject: [PATCH 1060/1115] Add platform.json to pass pytest

---
 .../x86_64-accton_as7726_32x-r0/platform.json | 637 ++++++++++++++++++
 .../as7726-32x/sonic_platform/event.py        |  60 ++
 2 files changed, 697 insertions(+)
 create mode 100644 device/accton/x86_64-accton_as7726_32x-r0/platform.json
 create mode 100644 platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/event.py

diff --git a/device/accton/x86_64-accton_as7726_32x-r0/platform.json b/device/accton/x86_64-accton_as7726_32x-r0/platform.json
new file mode 100644
index 000000000..bb5216c87
--- /dev/null
+++ b/device/accton/x86_64-accton_as7726_32x-r0/platform.json
@@ -0,0 +1,637 @@
+{
+    "chassis": {
+        "name": "7726-32X",
+        "components": [
+            {
+                "name": "CPLD1"
+            },
+	    {
+                "name": "CPLD2"
+            },
+            {
+                "name": "CPLD3"
+            },
+            {
+                "name": "CPLD4"
+            },
+            {
+                "name": "CPLD5"
+            },
+            {
+                "name": "BIOS"
+            }
+        ],
+        "fans": [
+            {
+                "name": "FAN-1F"
+            },
+            {
+                "name": "FAN-1R"
+            },
+            {
+                "name": "FAN-2F"
+            },
+            {
+                "name": "FAN-2R"
+            },
+            {
+                "name": "FAN-3F"
+            },
+            {
+                "name": "FAN-3R"
+            },
+            {
+                "name": "FAN-4F"
+            },
+            {
+                "name": "FAN-4R"
+            },
+            {
+                "name": "FAN-5F"
+            },
+            {
+                "name": "FAN-5R"
+            },
+            {
+                "name": "FAN-6F"
+            },
+            {
+                "name": "FAN-6R"
+            }
+        ],
+        "fan_drawers":[
+            {
+                "name": "FanTray1",
+                "num_fans" : 2,
+                "fans": [
+                    {
+                        "name": "FAN-1F"
+                    },
+                    {
+                        "name": "FAN-1R"
+                    }
+                ]
+            },
+            {
+                "name": "FanTray2",
+                "num_fans" : 2,
+                "fans": [
+                    {
+                        "name": "FAN-2F"
+                    },
+                    {
+                        "name": "FAN-2R"
+                    }
+                ]
+            },
+            {
+                "name": "FanTray3",
+                "num_fans" : 2,
+                "fans": [
+                    {
+                        "name": "FAN-3F"
+                    },
+                    {
+                        "name": "FAN-3R"
+                    }
+                ]
+            },
+            {
+                "name": "FanTray4",
+                "num_fans" : 2,
+                "fans": [
+                    {
+                        "name": "FAN-4F"
+                    },
+                    {
+                        "name": "FAN-4R"
+                    }
+                ]
+            },
+            {
+                "name": "FanTray5",
+                "num_fans" : 2,
+                "fans": [
+                    {
+                        "name": "FAN-5F"
+                    },
+                    {
+                        "name": "FAN-5R"
+                    }
+                ]
+            },
+            {
+                "name": "FanTray6",
+                "num_fans" : 2,
+                "fans": [
+                    {
+                        "name": "FAN-6F"
+                    },
+                    {
+                        "name": "FAN-6R"
+                    }
+                ]
+            }
+        ],
+        "psus": [
+            {
+                "name": "PSU-1",
+                "fans": [
+                    {
+                        "name": "PSU-1 FAN-1"
+                    }
+                ],
+                "thermals": [
+                    {
+                        "name": "PSU-1 temp sensor 1"
+                    }
+                ]
+            },
+            {
+                "name": "PSU-2",
+                "fans": [
+                    {
+                        "name": "PSU-2 FAN-1"
+                    }
+                ],
+                "thermals": [
+                    {
+                        "name": "PSU-2 temp sensor 2"
+                    }
+                ]
+            }
+        ],
+        "thermals": [
+            {
+                "name": "Temp sensor 1"
+            },
+            {
+                "name": "Temp sensor 2"
+            },
+            {
+                "name": "Temp sensor 3"
+            },
+            {
+                "name": "Temp sensor 4"
+            },
+            {
+                "name": "Temp sensor 5"
+            },
+            {
+                "name": "CPU Temp"
+            }
+        ],
+        "sfps": [
+            {
+                "name": "Ethernet0"
+            },
+            {
+                "name": "Ethernet4"
+            },
+            {
+                "name": "Ethernet8"
+            },
+            {
+                "name": "Ethernet12"
+            },
+            {
+                "name": "Ethernet16"
+            },
+            {
+                "name": "Ethernet20"
+            },
+            {
+                "name": "Ethernet24"
+            },
+            {
+                "name": "Ethernet28"
+            },
+            {
+                "name": "Ethernet32"
+            },
+            {
+                "name": "Ethernet36"
+            },
+            {
+                "name": "Ethernet40"
+            },
+            {
+                "name": "Ethernet44"
+            },
+            {
+                "name": "Ethernet48"
+            },
+            {
+                "name": "Ethernet52"
+            },
+            {
+                "name": "Ethernet56"
+            },
+            {
+                "name": "Ethernet60"
+            },
+            {
+                "name": "Ethernet64"
+            },
+            {
+                "name": "Ethernet68"
+            },
+            {
+                "name": "Ethernet72"
+            },
+            {
+                "name": "Ethernet76"
+            },
+            {
+                "name": "Ethernet80"
+            },
+            {
+                "name": "Ethernet84"
+            },
+            {
+                "name": "Ethernet88"
+            },
+            {
+                "name": "Ethernet92"
+            },
+            {
+                "name": "Ethernet96"
+            },
+            {
+                "name": "Ethernet100"
+            },
+            {
+                "name": "Ethernet104"
+            },
+            {
+                "name": "Ethernet108"
+            },
+            {
+                "name": "Ethernet112"
+            },
+            {
+                "name": "Ethernet116"
+            },
+            {
+                "name": "Ethernet120"
+            },
+            {
+                "name": "Ethernet124"
+            }
+        ]
+    },
+    "interfaces": {
+        "Ethernet0": {
+            "index": "1,1,1,1",
+            "lanes": "1,2,3,4",
+            "breakout_modes": {
+                "1x100G[40G]": ["Eth1(Port1)"],
+                "2x50G": ["Eth1/1(Port1)", "Eth1/2(Port1)"],
+                "4x25G": ["Eth1/1(Port1)", "Eth1/2(Port1)", "Eth1/3(Port1)", "Eth1/4(Port1)"],
+                "4x10G": ["Eth1/1(Port1)", "Eth1/2(Port1)", "Eth1/3(Port1)", "Eth1/4(Port1)"]
+            }
+        },
+
+        "Ethernet4": {
+            "index": "2,2,2,2",
+            "lanes": "5,6,7,8",
+            "breakout_modes": {
+                "1x100G[40G]": ["Eth2(Port2)"],
+                "2x50G": ["Eth2/1(Port2)", "Eth2/2(Port2)"],
+                "4x25G": ["Eth2/1(Port2)", "Eth2/2(Port2)", "Eth2/3(Port2)", "Eth2/4(Port2)"],
+                "4x10G": ["Eth2/1(Port2)", "Eth2/2(Port2)", "Eth2/3(Port2)", "Eth2/4(Port2)"]
+            }
+        },
+
+        "Ethernet8": {
+            "index": "3,3,3,3",
+            "lanes": "9,10,11,12",
+            "breakout_modes": {
+                "1x100G[40G]": ["Eth3(Port3)"],
+                "2x50G": ["Eth3/1(Port3)", "Eth3/2(Port3)"],
+                "4x25G": ["Eth3/1(Port3)", "Eth3/2(Port3)", "Eth3/3(Port3)", "Eth3/4(Port3)"],
+                "4x10G": ["Eth3/1(Port3)", "Eth3/2(Port3)", "Eth3/3(Port3)", "Eth3/4(Port3)"]
+            }
+        },
+
+        "Ethernet12": {
+            "index": "4,4,4,4",
+            "lanes": "13,14,15,16",
+            "breakout_modes": {
+                "1x100G[40G]": ["Eth4(Port4)"],
+                "2x50G": ["Eth4/1(Port4)", "Eth4/2(Port4)"],
+                "4x25G": ["Eth4/1(Port4)", "Eth4/2(Port4)", "Eth4/3(Port4)", "Eth4/4(Port4)"],
+                "4x10G": ["Eth4/1(Port4)", "Eth4/2(Port4)", "Eth4/3(Port4)", "Eth4/4(Port4)"]
+            }
+        },
+
+        "Ethernet16": {
+            "index": "5,5,5,5",
+            "lanes": "17,18,19,20",
+            "breakout_modes": {
+                "1x100G[40G]": ["Eth5(Port5)"],
+                "2x50G": ["Eth5/1(Port5)", "Eth5/2(Port5)"],
+                "4x25G": ["Eth5/1(Port5)", "Eth5/2(Port5)", "Eth5/3(Port5)", "Eth5/4(Port5)"],
+                "4x10G": ["Eth5/1(Port5)", "Eth5/2(Port5)", "Eth5/3(Port5)", "Eth5/4(Port5)"]
+            }
+        },
+
+        "Ethernet20": {
+            "index": "6,6,6,6",
+            "lanes": "21,22,23,24",
+            "breakout_modes": {
+                "1x100G[40G]": ["Eth6(Port6)"],
+                "2x50G": ["Eth6/1(Port6)", "Eth6/2(Port6)"],
+                "4x25G": ["Eth6/1(Port6)", "Eth6/2(Port6)", "Eth6/3(Port6)", "Eth6/4(Port6)"],
+                "4x10G": ["Eth6/1(Port6)", "Eth6/2(Port6)", "Eth6/3(Port6)", "Eth6/4(Port6)"]
+            }
+        },
+
+        "Ethernet24": {
+            "index": "7,7,7,7",
+            "lanes": "25,26,27,28",
+            "breakout_modes": {
+                "1x100G[40G]": ["Eth7(Port7)"],
+                "2x50G": ["Eth7/1(Port7)", "Eth7/2(Port7)"],
+                "4x25G": ["Eth7/1(Port7)", "Eth7/2(Port7)", "Eth7/3(Port7)", "Eth7/4(Port7)"],
+                "4x10G": ["Eth7/1(Port7)", "Eth7/2(Port7)", "Eth7/3(Port7)", "Eth7/4(Port7)"]
+            }
+        },
+
+        "Ethernet28": {
+            "index": "8,8,8,8",
+            "lanes": "29,30,31,32",
+            "breakout_modes": {
+                "1x100G[40G]": ["Eth8(Port8)"],
+                "2x50G": ["Eth8/1(Port8)", "Eth8/2(Port8)"],
+                "4x25G": ["Eth8/1(Port8)", "Eth8/2(Port8)", "Eth8/3(Port8)", "Eth8/4(Port8)"],
+                "4x10G": ["Eth8/1(Port8)", "Eth8/2(Port8)", "Eth8/3(Port8)", "Eth8/4(Port8)"]
+            }
+        },
+
+        "Ethernet32": {
+            "index": "9,9,9,9",
+            "lanes": "33,34,35,36",
+            "breakout_modes": {
+                "1x100G[40G]": ["Eth9(Port9)"],
+                "2x50G": ["Eth9/1(Port9)", "Eth9/2(Port9)"],
+                "4x25G": ["Eth9/1(Port9)", "Eth9/2(Port9)", "Eth9/3(Port9)", "Eth9/4(Port9)"],
+                "4x10G": ["Eth9/1(Port9)", "Eth9/2(Port9)", "Eth9/3(Port9)", "Eth9/4(Port9)"]
+            }
+        },
+
+        "Ethernet36": {
+            "index": "10,10,10,10",
+            "lanes": "37,38,39,40",
+            "breakout_modes": {
+                "1x100G[40G]": ["Eth10(Port10)"],
+                "2x50G": ["Eth10/1(Port10)", "Eth10/2(Port10)"],
+                "4x25G": ["Eth10/1(Port10)", "Eth10/2(Port10)", "Eth10/3(Port10)", "Eth10/4(Port10)"],
+                "4x10G": ["Eth10/1(Port10)", "Eth10/2(Port10)", "Eth10/3(Port10)", "Eth10/4(Port10)"]
+            }
+        },
+
+        "Ethernet40": {
+            "index": "11,11,11,11",
+            "lanes": "41,42,43,44",
+            "breakout_modes": {
+                "1x100G[40G]": ["Eth11(Port11)"],
+                "2x50G": ["Eth11/1(Port11)", "Eth11/2(Port11)"],
+                "4x25G": ["Eth11/1(Port11)", "Eth11/2(Port11)", "Eth11/3(Port11)", "Eth11/4(Port11)"],
+                "4x10G": ["Eth11/1(Port11)", "Eth11/2(Port11)", "Eth11/3(Port11)", "Eth11/4(Port11)"]
+            }
+        },
+
+        "Ethernet44": {
+            "index": "12,12,12,12",
+            "lanes": "45,46,47,48",
+            "breakout_modes": {
+                "1x100G[40G]": ["Eth12(Port12)"],
+                "2x50G": ["Eth12/1(Port12)", "Eth12/2(Port12)"],
+                "4x25G": ["Eth12/1(Port12)", "Eth12/2(Port12)", "Eth12/3(Port12)", "Eth12/4(Port12)"],
+                "4x10G": ["Eth12/1(Port12)", "Eth12/2(Port12)", "Eth12/3(Port12)", "Eth12/4(Port12)"]
+            }
+        },
+
+        "Ethernet48": {
+            "index": "13,13,13,13",
+            "lanes": "49,50,51,52",
+            "breakout_modes": {
+                "1x100G[40G]": ["Eth13(Port13)"],
+                "2x50G": ["Eth13/1(Port13)", "Eth13/2(Port13)"],
+                "4x25G": ["Eth13/1(Port13)", "Eth13/2(Port13)", "Eth13/3(Port13)", "Eth13/4(Port13)"],
+                "4x10G": ["Eth13/1(Port13)", "Eth13/2(Port13)", "Eth13/3(Port13)", "Eth13/4(Port13)"]
+            }
+        },
+
+        "Ethernet52": {
+            "index": "14,14,14,14",
+            "lanes": "53,54,55,56",
+            "breakout_modes": {
+                "1x100G[40G]": ["Eth14(Port14)"],
+                "2x50G": ["Eth14/1(Port14)", "Eth14/2(Port14)"],
+                "4x25G": ["Eth14/1(Port14)", "Eth14/2(Port14)", "Eth14/3(Port14)", "Eth14/4(Port14)"],
+                "4x10G": ["Eth14/1(Port14)", "Eth14/2(Port14)", "Eth14/3(Port14)", "Eth14/4(Port14)"]
+            }
+        },
+
+        "Ethernet56": {
+            "index": "15,15,15,15",
+            "lanes": "57,58,59,60",
+            "breakout_modes": {
+                "1x100G[40G]": ["Eth15(Port15)"],
+                "2x50G": ["Eth15/1(Port15)", "Eth15/2(Port15)"],
+                "4x25G": ["Eth15/1(Port15)", "Eth15/2(Port15)", "Eth15/3(Port15)", "Eth15/4(Port15)"],
+                "4x10G": ["Eth15/1(Port15)", "Eth15/2(Port15)", "Eth15/3(Port15)", "Eth15/4(Port15)"]
+            }
+        },
+
+        "Ethernet60": {
+            "index": "16,16,16,16",
+            "lanes": "61,62,63,64",
+            "breakout_modes": {
+                "1x100G[40G]": ["Eth16(Port16)"],
+                "2x50G": ["Eth16/1(Port16)", "Eth16/2(Port16)"],
+                "4x25G": ["Eth16/1(Port16)", "Eth16/2(Port16)", "Eth16/3(Port16)", "Eth16/4(Port16)"],
+                "4x10G": ["Eth16/1(Port16)", "Eth16/2(Port16)", "Eth16/3(Port16)", "Eth16/4(Port16)"]
+            }
+        },
+
+        "Ethernet64": {
+            "index": "17,17,17,17",
+            "lanes": "65,66,67,68",
+            "breakout_modes": {
+                "1x100G[40G]": ["Eth17(Port17)"],
+                "2x50G": ["Eth17/1(Port17)", "Eth17/2(Port17)"],
+                "4x25G": ["Eth17/1(Port17)", "Eth17/2(Port17)", "Eth17/3(Port17)", "Eth17/4(Port17)"],
+                "4x10G": ["Eth17/1(Port17)", "Eth17/2(Port17)", "Eth17/3(Port17)", "Eth17/4(Port17)"]
+            }
+        },
+
+        "Ethernet68": {
+            "index": "18,18,18,18",
+            "lanes": "69,70,71,72",
+            "breakout_modes": {
+                "1x100G[40G]": ["Eth18(Port18)"],
+                "2x50G": ["Eth18/1(Port18)", "Eth18/2(Port18)"],
+                "4x25G": ["Eth18/1(Port18)", "Eth18/2(Port18)", "Eth18/3(Port18)", "Eth18/4(Port18)"],
+                "4x10G": ["Eth18/1(Port18)", "Eth18/2(Port18)", "Eth18/3(Port18)", "Eth18/4(Port18)"]
+            }
+        },
+
+        "Ethernet72": {
+            "index": "19,19,19,19",
+            "lanes": "73,74,75,76",
+            "breakout_modes": {
+                "1x100G[40G]": ["Eth19(Port19)"],
+                "2x50G": ["Eth19/1(Port19)", "Eth19/2(Port19)"],
+                "4x25G": ["Eth19/1(Port19)", "Eth19/2(Port19)", "Eth19/3(Port19)", "Eth19/4(Port19)"],
+                "4x10G": ["Eth19/1(Port19)", "Eth19/2(Port19)", "Eth19/3(Port19)", "Eth19/4(Port19)"]
+            }
+        },
+
+        "Ethernet76": {
+            "index": "20,20,20,20",
+            "lanes": "77,78,79,80",
+            "breakout_modes": {
+                "1x100G[40G]": ["Eth20(Port20)"],
+                "2x50G": ["Eth20/1(Port20)", "Eth20/2(Port20)"],
+                "4x25G": ["Eth20/1(Port20)", "Eth20/2(Port20)", "Eth20/3(Port20)", "Eth20/4(Port20)"],
+                "4x10G": ["Eth20/1(Port20)", "Eth20/2(Port20)", "Eth20/3(Port20)", "Eth20/4(Port20)"]
+            }
+        },
+
+        "Ethernet80": {
+            "index": "21,21,21,21",
+            "lanes": "81,82,83,84",
+            "breakout_modes": {
+                "1x100G[40G]": ["Eth21(Port21)"],
+                "2x50G": ["Eth21/1(Port21)", "Eth21/2(Port21)"],
+                "4x25G": ["Eth21/1(Port21)", "Eth21/2(Port21)", "Eth21/3(Port21)", "Eth21/4(Port21)"],
+                "4x10G": ["Eth21/1(Port21)", "Eth21/2(Port21)", "Eth21/3(Port21)", "Eth21/4(Port21)"]
+            }
+        },
+
+        "Ethernet84": {
+            "index": "22,22,22,22",
+            "lanes": "85,86,87,88",
+            "breakout_modes": {
+                "1x100G[40G]": ["Eth22(Port22)"],
+                "2x50G": ["Eth22/1(Port22)", "Eth22/2(Port22)"],
+                "4x25G": ["Eth22/1(Port22)", "Eth22/2(Port22)", "Eth22/3(Port22)", "Eth22/4(Port22)"],
+                "4x10G": ["Eth22/1(Port22)", "Eth22/2(Port22)", "Eth22/3(Port22)", "Eth22/4(Port22)"]
+            }
+        },
+
+        "Ethernet88": {
+            "index": "23,23,23,23",
+            "lanes": "89,90,91,92",
+            "breakout_modes": {
+                "1x100G[40G]": ["Eth23(Port23)"],
+                "2x50G": ["Eth23/1(Port23)", "Eth23/2(Port23)"],
+                "4x25G": ["Eth23/1(Port23)", "Eth23/2(Port23)", "Eth23/3(Port23)", "Eth23/4(Port23)"],
+                "4x10G": ["Eth23/1(Port23)", "Eth23/2(Port23)", "Eth23/3(Port23)", "Eth23/4(Port23)"]
+            }
+        },
+
+        "Ethernet92": {
+            "index": "24,24,24,24",
+            "lanes": "93,94,95,96",
+            "breakout_modes": {
+                "1x100G[40G]": ["Eth24(Port24)"],
+                "2x50G": ["Eth24/1(Port24)", "Eth24/2(Port24)"],
+                "4x25G": ["Eth24/1(Port24)", "Eth24/2(Port24)", "Eth24/3(Port24)", "Eth24/4(Port24)"],
+                "4x10G": ["Eth24/1(Port24)", "Eth24/2(Port24)", "Eth24/3(Port24)", "Eth24/4(Port24)"]
+            }
+        },
+
+        "Ethernet96": {
+            "index": "25,25,25,25",
+            "lanes": "97,98,99,100",
+            "breakout_modes": {
+                "1x100G[40G]": ["Eth25(Port25)"],
+                "2x50G": ["Eth25/1(Port25)", "Eth25/2(Port25)"],
+                "4x25G": ["Eth25/1(Port25)", "Eth25/2(Port25)", "Eth25/3(Port25)", "Eth25/4(Port25)"],
+                "4x10G": ["Eth25/1(Port25)", "Eth25/2(Port25)", "Eth25/3(Port25)", "Eth25/4(Port25)"]
+            }
+        },
+
+        "Ethernet100": {
+            "index": "26,26,26,26",
+            "lanes": "101,102,103,104",
+            "breakout_modes": {
+                "1x100G[40G]": ["Eth26(Port26)"],
+                "2x50G": ["Eth26/1(Port26)", "Eth26/2(Port26)"],
+                "4x25G": ["Eth26/1(Port26)", "Eth26/2(Port26)", "Eth26/3(Port26)", "Eth26/4(Port26)"],
+                "4x10G": ["Eth26/1(Port26)", "Eth26/2(Port26)", "Eth26/3(Port26)", "Eth26/4(Port26)"]
+            }
+        },
+
+        "Ethernet104": {
+            "index": "27,27,27,27",
+            "lanes": "105,106,107,108",
+            "breakout_modes": {
+                "1x100G[40G]": ["Eth27(Port27)"],
+                "2x50G": ["Eth27/1(Port27)", "Eth27/2(Port27)"],
+                "4x25G": ["Eth27/1(Port27)", "Eth27/2(Port27)", "Eth27/3(Port27)", "Eth27/4(Port27)"],
+                "4x10G": ["Eth27/1(Port27)", "Eth27/2(Port27)", "Eth27/3(Port27)", "Eth27/4(Port27)"]
+            }
+        },
+
+        "Ethernet108": {
+            "index": "28,28,28,28",
+            "lanes": "109,110,111,112",
+            "breakout_modes": {
+                "1x100G[40G]": ["Eth28(Port28)"],
+                "2x50G": ["Eth28/1(Port28)", "Eth28/2(Port28)"],
+                "4x25G": ["Eth28/1(Port28)", "Eth28/2(Port28)", "Eth28/3(Port28)", "Eth28/4(Port28)"],
+                "4x10G": ["Eth28/1(Port28)", "Eth28/2(Port28)", "Eth28/3(Port28)", "Eth28/4(Port28)"]
+            }
+        },
+
+        "Ethernet112": {
+            "index": "29,29,29,29",
+            "lanes": "113,114,115,116",
+            "breakout_modes": {
+                "1x100G[40G]": ["Eth29(Port29)"],
+                "2x50G": ["Eth29/1(Port29)", "Eth29/2(Port29)"],
+                "4x25G": ["Eth29/1(Port29)", "Eth29/2(Port29)", "Eth29/3(Port29)", "Eth29/4(Port29)"],
+                "4x10G": ["Eth29/1(Port29)", "Eth29/2(Port29)", "Eth29/3(Port29)", "Eth29/4(Port29)"]
+            }
+        },
+
+        "Ethernet116": {
+            "index": "30,30,30,30",
+            "lanes": "117,118,119,120",
+            "breakout_modes": {
+                "1x100G[40G]": ["Eth30(Port30)"],
+                "2x50G": ["Eth30/1(Port30)", "Eth30/2(Port30)"],
+                "4x25G": ["Eth30/1(Port30)", "Eth30/2(Port30)", "Eth30/3(Port30)", "Eth30/4(Port30)"],
+                "4x10G": ["Eth30/1(Port30)", "Eth30/2(Port30)", "Eth30/3(Port30)", "Eth30/4(Port30)"]
+            }
+        },
+
+        "Ethernet120": {
+            "index": "31,31,31,31",
+            "lanes": "121,122,123,124",
+            "breakout_modes": {
+                "1x100G[40G]": ["Eth31(Port31)"],
+                "2x50G": ["Eth31/1(Port31)", "Eth31/2(Port31)"],
+                "4x25G": ["Eth31/1(Port31)", "Eth31/2(Port31)", "Eth31/3(Port31)", "Eth31/4(Port31)"],
+                "4x10G": ["Eth31/1(Port31)", "Eth31/2(Port31)", "Eth31/3(Port31)", "Eth31/4(Port31)"]
+            }
+        },
+
+        "Ethernet124": {
+            "index": "32,32,32,32",
+            "lanes": "125,126,127,128",
+            "breakout_modes": {
+                "1x100G[40G]": ["Eth32(Port32)"],
+                "2x50G": ["Eth32/1(Port32)", "Eth32/2(Port32)"],
+                "4x25G": ["Eth32/1(Port32)", "Eth32/2(Port32)", "Eth32/3(Port32)", "Eth32/4(Port32)"],
+                "4x10G": ["Eth32/1(Port32)", "Eth32/2(Port32)", "Eth32/3(Port32)", "Eth32/4(Port32)"]
+            }
+        }
+    }
+}
+
diff --git a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/event.py b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/event.py
new file mode 100644
index 000000000..d5dac6d7f
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/event.py
@@ -0,0 +1,60 @@
+try:
+    import time
+    from sonic_py_common.logger import Logger
+except ImportError as e:
+    raise ImportError(repr(e) + " - required module not found")
+
+POLL_INTERVAL_IN_SEC = 1
+
+class SfpEvent:
+    ''' Listen to insert/remove sfp events '''
+
+    def __init__(self, sfp_list):
+        self._sfp_list = sfp_list
+        self._logger = Logger()
+        self._sfp_change_event_data = {'present': 0}
+
+    def get_presence_bitmap(self):
+        bitmap = 0
+        for sfp in self._sfp_list:
+            modpres = sfp.get_presence()
+            i=sfp.get_position_in_parent() - 1
+            if modpres:
+                bitmap = bitmap | (1 << i)
+        return bitmap
+
+    def get_sfp_event(self, timeout=2000):
+        port_dict = {}
+        change_dict = {}
+        change_dict['sfp'] = port_dict
+
+        if timeout < 1000:
+            cd_ms = 1000
+        else:
+            cd_ms = timeout
+
+        while cd_ms > 0:
+            bitmap = self.get_presence_bitmap()
+            changed_ports = self._sfp_change_event_data['present'] ^ bitmap
+            if changed_ports != 0:
+                break
+            time.sleep(POLL_INTERVAL_IN_SEC)
+            # timeout=0 means wait for event forever
+            if timeout != 0:
+                cd_ms = cd_ms - POLL_INTERVAL_IN_SEC * 1000
+
+        if changed_ports != 0:
+            for sfp in self._sfp_list:
+                i=sfp.get_position_in_parent() - 1
+                if (changed_ports & (1 << i)):
+                    if (bitmap & (1 << i)) == 0:
+                        port_dict[i+1] = '0'
+                    else:
+                        port_dict[i+1] = '1'
+
+
+            # Update the cache dict
+            self._sfp_change_event_data['present'] = bitmap
+            return True, change_dict
+        else:
+            return True, change_dict

From 3ec37f8bde0da9c1dffc3ab9a7eb0fd3db9beea3 Mon Sep 17 00:00:00 2001
From: jostar-yang <jostar_yang@edge-core.com>
Date: Thu, 22 Dec 2022 14:03:58 +0800
Subject: [PATCH 1061/1115] Add compoment.py

---
 .../as7726-32x/sonic_platform/component.py    | 192 ++++++++++++++++++
 1 file changed, 192 insertions(+)
 create mode 100644 platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/component.py

diff --git a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/component.py b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/component.py
new file mode 100644
index 000000000..945e9c176
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/component.py
@@ -0,0 +1,192 @@
+#############################################################################
+# 
+# Component contains an implementation of SONiC Platform Base API and
+# provides the components firmware management function
+#
+#############################################################################
+
+try:
+    import subprocess
+    from sonic_platform_base.component_base import ComponentBase
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+CPLD_ADDR_MAPPING = {
+    "CPLD1": ['11', '0x60'],
+    "CPLD2": ['12', '0x62'],
+    "CPLD3": ['13', '0x64'],
+    "CPLD4": ['54', '0x66']
+}
+SYSFS_PATH = "/sys/bus/i2c/devices/"
+BIOS_VERSION_PATH = "/sys/class/dmi/id/bios_version"
+COMPONENT_LIST= [
+   ("CPLD1", "CPLD 1"),
+   ("CPLD2", "CPLD 2"),
+   ("CPLD3", "CPLD 3"),
+   ("CPLD4", "CPLD 4"),
+   ("CPLD5", "CPLD 5"),
+   ("BIOS", "Basic Input/Output System")
+   
+]
+
+class Component(ComponentBase):
+    """Platform-specific Component class"""
+
+    DEVICE_TYPE = "component"
+
+    def __init__(self, component_index=0):
+        self.index = component_index
+        self.name = self.get_name()
+
+    def __run_command(self, command):
+        # Run bash command and print output to stdout
+        try:
+            process = subprocess.Popen(
+                shlex.split(command), stdout=subprocess.PIPE)
+            while True:
+                output = process.stdout.readline()
+                if output == '' and process.poll() is not None:
+                    break
+            rc = process.poll()
+            if rc != 0:
+                return False
+        except Exception:
+            return False
+        return True
+
+    def __get_bios_version(self):
+        # Retrieves the BIOS firmware version
+        try:
+            with open(BIOS_VERSION_PATH, 'r') as fd:
+                bios_version = fd.read()
+                return bios_version.strip()
+        except Exception as e:
+            return None
+   
+    def __get_cpld_version(self):
+        # Retrieves the CPLD firmware version
+        cpld_version = dict()
+        for cpld_name in CPLD_ADDR_MAPPING:
+            cmd = "i2cget -f -y {0} {1} 0x1".format(CPLD_ADDR_MAPPING[cpld_name][0], CPLD_ADDR_MAPPING[cpld_name][1])
+            status, value = subprocess.getstatusoutput(cmd)
+            if not status:
+                cpld_version_raw = value.rstrip()
+                cpld_version[cpld_name] = "{}".format(int(cpld_version_raw,16))
+
+        return cpld_version
+
+
+    def __get_cpld_cpu_version(self):
+        try:
+            cpu_version = dict()
+            cmd = "i2cget -f -y 0 0x65 0x01"
+            status, output1 = subprocess.getstatusoutput(cmd)
+            if status == 0 :
+                cpu_version = "{}".format(output1[2:])
+            else :
+                cpu_version = 'None'
+        except Exception as e:
+            cpu_version = 'None'
+
+        return cpu_version
+
+    def get_name(self):
+        """
+        Retrieves the name of the component
+         Returns:
+            A string containing the name of the component
+        """
+        return COMPONENT_LIST[self.index][0]
+
+    def get_description(self):
+        """
+        Retrieves the description of the component
+            Returns:
+            A string containing the description of the component
+        """
+        return COMPONENT_LIST[self.index][1]
+
+    def get_firmware_version(self):
+        """
+        Retrieves the firmware version of module
+        Returns:
+            string: The firmware versions of the module
+        """
+        fw_version = None
+
+        if self.name == "BIOS":
+            fw_version = self.__get_bios_version()
+        elif "CPLD5" in self.name:
+            fw_version = self.__get_cpld_cpu_version()
+        elif "CPLD" in self.name:
+            cpld_version = self.__get_cpld_version()
+            fw_version = cpld_version.get(self.name)
+
+        return fw_version
+
+    def install_firmware(self, image_path):
+        """
+        Install firmware to module
+        Args:
+            image_path: A string, path to firmware image
+        Returns:
+            A boolean, True if install successfully, False if not
+        """
+        raise NotImplementedError
+
+    def get_presence(self):
+        """
+        Retrieves the presence of the device
+        Returns:
+            bool: True if device is present, False if not
+        """
+        return True
+
+    def get_model(self):
+        """
+        Retrieves the model number (or part number) of the device
+        Returns:
+            string: Model/part number of device
+        """
+        return 'N/A'
+
+    def get_serial(self):
+        """
+        Retrieves the serial number of the device
+        Returns:
+            string: Serial number of device
+        """
+        return 'N/A'
+
+    def get_status(self):
+        """
+        Retrieves the operational status of the device
+        Returns:
+            A boolean value, True if device is operating properly, False if not
+        """
+        return True
+    
+    def get_position_in_parent(self):
+        """
+        Retrieves 1-based relative physical position in parent device.
+        If the agent cannot determine the parent-relative position
+        for some reason, or if the associated value of
+        entPhysicalContainedIn is'0', then the value '-1' is returned
+        Returns:
+            integer: The 1-based relative physical position in parent device
+            or -1 if cannot determine the position
+        """
+        return -1
+
+    def is_replaceable(self):
+        """
+        Indicate whether this device is replaceable.
+        Returns:
+            bool: True if it is replaceable.
+        """
+        return False
+    
+
+
+
+

From 9de902576a2e0b371f59753c6fa108410a76bbb9 Mon Sep 17 00:00:00 2001
From: jostar-yang <jostar_yang@edge-core.com>
Date: Thu, 19 Jan 2023 10:46:47 +0800
Subject: [PATCH 1062/1115] Add enable fan-wdt and kick

---
 .../modules/accton_as7726_32x_fan.c           |  3 +-
 .../utils/accton_as7726_32x_pddf_monitor.py   | 38 ++++++++++++++++++-
 2 files changed, 37 insertions(+), 4 deletions(-)

diff --git a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/modules/accton_as7726_32x_fan.c b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/modules/accton_as7726_32x_fan.c
index 3f7489de2..4977dba88 100755
--- a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/modules/accton_as7726_32x_fan.c
+++ b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/modules/accton_as7726_32x_fan.c
@@ -45,7 +45,6 @@ static struct as7726_32x_fan_data *as7726_32x_fan_update_device(struct device *d
 static ssize_t fan_show_value(struct device *dev, struct device_attribute *da, char *buf);
 static ssize_t set_duty_cycle(struct device *dev, struct device_attribute *da,
                               const char *buf, size_t count);
-static ssize_t get_sys_temp(struct device *dev, struct device_attribute *da, char *buf);                              
 
 /* fan related data, the index should match sysfs_fan_attributes
  */
@@ -294,7 +293,7 @@ static ssize_t set_duty_cycle(struct device *dev, struct device_attribute *da,
     if (value < 0 || value > FAN_MAX_DUTY_CYCLE)
         return -EINVAL;
 
-    as7726_32x_fan_write_value(client, 0x33, 0); /* Disable fan speed watch dog */
+    //as7726_32x_fan_write_value(client, 0x33, 0); /* Disable fan speed watch dog */
     as7726_32x_fan_write_value(client, fan_reg[FAN_DUTY_CYCLE_PERCENTAGE], duty_cycle_to_reg_val(value));
     return count;
 }
diff --git a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/utils/accton_as7726_32x_pddf_monitor.py b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/utils/accton_as7726_32x_pddf_monitor.py
index 2b18ac646..4a3d4af98 100755
--- a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/utils/accton_as7726_32x_pddf_monitor.py
+++ b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/utils/accton_as7726_32x_pddf_monitor.py
@@ -21,6 +21,7 @@
 #    4/20/2018: Jostar modify for as7726_32x
 #    12/03/2018:Jostar modify for as7726_32x thermal plan
 #    11/16/2020:Jostar modify for as7726_32x thermal plan based on PDDF
+#    11/19/2023:Jostar modify to add kick fan-wdt
 # ------------------------------------------------------------------
 
 try:
@@ -32,6 +33,7 @@
     import logging.handlers
     import time
     from sonic_platform import platform
+    from sonic_py_common.general import getstatusoutput_noshell
 except ImportError as e:
     raise ImportError('%s - required module not found' % str(e))
 
@@ -162,7 +164,7 @@ def manage_fans(self):
         }
         
         fan_dir= platform_chassis.get_fan(0).get_direction()
-        if fan_dir == 'EXHAUST':
+        if fan_dir == 'exhaust':
             fan_policy = fan_policy_f2b
         else:
             fan_policy = fan_policy_b2f
@@ -305,15 +307,47 @@ def main(argv):
     
     global platform_chassis
     platform_chassis = platform.Platform().get_chassis()
-    
+    cmd_str = ["i2cset", "-y", "-f", "54", "0x66", "0x33", "0x0"]
+    status, output = getstatusoutput_noshell(cmd_str)
+    if status:
+        print("Warning: Fan speed watchdog could not be disabled")
+
+    cmd_str = ["i2cset", "-y", "-f", "54", "0x66", "0x33", "0x1"]
+    status, output = getstatusoutput_noshell(cmd_str)
+    if status:
+        print("Warning: Fan speed watchdog could not be enabled")   
+
+    #Timer need to be set after enable.
+    #if set timer is eralier than enable wdt. Speed will become to wdt speed after 6sec. 
+    cmd_str = ["i2cset", "-y", "-f", "54", "0x66", "0x31", "0xF0"]
+    status, output = getstatusoutput_noshell(cmd_str)
+    if status:
+        print("Warning: Fan speed watchdog timer could not be disabled")
+
     platform_chassis.get_fan(0).set_speed(38)
   
     print("set default fan speed to 37.5%")
     monitor = device_monitor(log_file, log_level)
+   
+    cmd_kick = ["i2cset", "-y", "-f", "54", "0x66", "0x31", "0xF0"] #kick WDT
+    cmd_check_wdt = ["i2cget",  "-y", "-f", "54", "0x66", "0x33"]
     # Loop forever, doing something useful hopefully:
     while True:
         monitor.manage_fans()
+        getstatusoutput_noshell(cmd_kick)
         time.sleep(10)
+        #polling to check fan-wdt status
+        status, output = getstatusoutput_noshell(cmd_check_wdt)
+        if status is not None:
+            val= int(output,16)
+            if (val & 0x1) == 0:
+                logging.warning('Detect Fan-WDT disable')
+                logging.warning('Try to enable Fan-WDT')
+                cmd_str = ["i2cset", "-y", "-f", "54", "0x66", "0x33", "0x1"]
+                getstatusoutput_noshell(cmd_str)
+                cmd_str = ["i2cset", "-y", "-f", "54", "0x66", "0x31", "0xF0"]
+                getstatusoutput_noshell(cmd_str)
+
 
 if __name__ == '__main__':
     main(sys.argv[1:])

From 11ddce02bfb6fb087212cc0fc1c4fbf50c88295e Mon Sep 17 00:00:00 2001
From: jostar-yang <jostar_yang@edge-core.com>
Date: Thu, 9 Feb 2023 17:50:19 +0800
Subject: [PATCH 1063/1115] Fix Semgrep check

---
 .../x86_64-accton_as7726_32x-r0/platform.json | 22 +++---
 .../as7726-32x/sonic_platform/component.py    | 52 +++----------
 .../as7726-32x/sonic_platform/helper.py       | 78 ++-----------------
 .../as7726-32x/sonic_platform/thermal.py      |  9 +++
 4 files changed, 36 insertions(+), 125 deletions(-)

diff --git a/device/accton/x86_64-accton_as7726_32x-r0/platform.json b/device/accton/x86_64-accton_as7726_32x-r0/platform.json
index bb5216c87..222ea329b 100644
--- a/device/accton/x86_64-accton_as7726_32x-r0/platform.json
+++ b/device/accton/x86_64-accton_as7726_32x-r0/platform.json
@@ -3,19 +3,19 @@
         "name": "7726-32X",
         "components": [
             {
-                "name": "CPLD1"
+                "name": "MB CPLD1"
             },
 	    {
-                "name": "CPLD2"
+                "name": "MB CPLD2"
             },
             {
-                "name": "CPLD3"
+                "name": "MB CPLD3"
             },
             {
-                "name": "CPLD4"
+                "name": "FAN CPLD"
             },
             {
-                "name": "CPLD5"
+                "name": "CPU CPLD"
             },
             {
                 "name": "BIOS"
@@ -156,26 +156,26 @@
                 ],
                 "thermals": [
                     {
-                        "name": "PSU-2 temp sensor 2"
+                        "name": "PSU-2 temp sensor 1"
                     }
                 ]
             }
         ],
         "thermals": [
             {
-                "name": "Temp sensor 1"
+                "name": "CB_temp(0x4B)"
             },
             {
-                "name": "Temp sensor 2"
+                "name": "FB_temp(0x4C)"
             },
             {
-                "name": "Temp sensor 3"
+                "name": "MB_FrontMAC_temp(0x49)"
             },
             {
-                "name": "Temp sensor 4"
+                "name": "MB_LeftCenter_temp(0x4A)"
             },
             {
-                "name": "Temp sensor 5"
+                "name": "MB_RearMAC_temp(0x48)"
             },
             {
                 "name": "CPU Temp"
diff --git a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/component.py b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/component.py
index 945e9c176..ce01079a7 100644
--- a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/component.py
+++ b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/component.py
@@ -12,19 +12,20 @@
     raise ImportError(str(e) + "- required module not found")
 
 CPLD_ADDR_MAPPING = {
-    "CPLD1": ['11', '0x60'],
-    "CPLD2": ['12', '0x62'],
-    "CPLD3": ['13', '0x64'],
-    "CPLD4": ['54', '0x66']
+    "MB CPLD1": ['11', '0x60'],
+    "MB CPLD2": ['12', '0x62'],
+    "MB CPLD3": ['13', '0x64'],
+    "FAN CPLD": ['54', '0x66'],
+    "CPU CPLD": ['0',  '0x65'],
 }
 SYSFS_PATH = "/sys/bus/i2c/devices/"
 BIOS_VERSION_PATH = "/sys/class/dmi/id/bios_version"
 COMPONENT_LIST= [
-   ("CPLD1", "CPLD 1"),
-   ("CPLD2", "CPLD 2"),
-   ("CPLD3", "CPLD 3"),
-   ("CPLD4", "CPLD 4"),
-   ("CPLD5", "CPLD 5"),
+   ("MB CPLD1", "Mainboard CPLD 1"),
+   ("MB CPLD2", "Mainboard CPLD 2"),
+   ("MB CPLD3", "Mainboard CPLD 3"),
+   ("FAN CPLD", "Fan board CPLD"),
+   ("CPU CPLD", "CPU CPLD"),
    ("BIOS", "Basic Input/Output System")
    
 ]
@@ -38,22 +39,6 @@ def __init__(self, component_index=0):
         self.index = component_index
         self.name = self.get_name()
 
-    def __run_command(self, command):
-        # Run bash command and print output to stdout
-        try:
-            process = subprocess.Popen(
-                shlex.split(command), stdout=subprocess.PIPE)
-            while True:
-                output = process.stdout.readline()
-                if output == '' and process.poll() is not None:
-                    break
-            rc = process.poll()
-            if rc != 0:
-                return False
-        except Exception:
-            return False
-        return True
-
     def __get_bios_version(self):
         # Retrieves the BIOS firmware version
         try:
@@ -75,21 +60,6 @@ def __get_cpld_version(self):
 
         return cpld_version
 
-
-    def __get_cpld_cpu_version(self):
-        try:
-            cpu_version = dict()
-            cmd = "i2cget -f -y 0 0x65 0x01"
-            status, output1 = subprocess.getstatusoutput(cmd)
-            if status == 0 :
-                cpu_version = "{}".format(output1[2:])
-            else :
-                cpu_version = 'None'
-        except Exception as e:
-            cpu_version = 'None'
-
-        return cpu_version
-
     def get_name(self):
         """
         Retrieves the name of the component
@@ -116,8 +86,6 @@ def get_firmware_version(self):
 
         if self.name == "BIOS":
             fw_version = self.__get_bios_version()
-        elif "CPLD5" in self.name:
-            fw_version = self.__get_cpld_cpu_version()
         elif "CPLD" in self.name:
             cpld_version = self.__get_cpld_version()
             fw_version = cpld_version.get(self.name)
diff --git a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/helper.py b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/helper.py
index b124ca29f..5162803fb 100644
--- a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/helper.py
+++ b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/helper.py
@@ -4,7 +4,7 @@
 from mmap import *
 from sonic_py_common import device_info
 
-HOST_CHK_CMD = "docker > /dev/null 2>&1"
+HOST_CHK_CMD = ["docker"]
 EMPTY_STRING = ""
 
 
@@ -14,7 +14,11 @@ def __init__(self):
         (self.platform, self.hwsku) = device_info.get_platform_and_hwsku()
 
     def is_host(self):
-        return os.system(HOST_CHK_CMD) == 0
+        try:
+            status, output = getstatusoutput_noshell(HOST_CHK_CMD)
+            return status == 0
+        except Exception:
+            return False
 
     def pci_get_value(self, resource, offset):
         status = True
@@ -29,26 +33,6 @@ def pci_get_value(self, resource, offset):
             status = False
         return status, result
 
-    def run_command(self, cmd):
-        status = True
-        result = ""
-        try:
-            p = subprocess.Popen(
-                cmd, shell=True, stdout=subprocess.PIPE, stderr=subprocess.PIPE)
-            raw_data, err = p.communicate()
-            if err == '':
-                result = raw_data.strip()
-        except Exception:
-            status = False
-        return status, result
-
-    def run_interactive_command(self, cmd):
-        try:
-            os.system(cmd)
-        except Exception:
-            return False
-        return True
-
     def read_txt_file(self, file_path):
         try:
             with open(file_path, 'r', errors='replace') as fd:
@@ -65,53 +49,3 @@ def write_txt_file(self, file_path, value):
         except IOError:
             return False
         return True
-
-    def ipmi_raw(self, netfn, cmd):
-        status = True
-        result = ""
-        try:
-            cmd = "ipmitool raw {} {}".format(str(netfn), str(cmd))
-            p = subprocess.Popen(
-                cmd, shell=True, stdout=subprocess.PIPE, stderr=subprocess.PIPE)
-            raw_data, err = p.communicate()
-            if err == '':
-                result = raw_data.strip()
-            else:
-                status = False
-        except Exception:
-            status = False
-        return status, result
-
-    def ipmi_fru_id(self, id, key=None):
-        status = True
-        result = ""
-        try:
-            cmd = "ipmitool fru print {}".format(str(
-                id)) if not key else "ipmitool fru print {0} | grep '{1}' ".format(str(id), str(key))
-
-            p = subprocess.Popen(
-                cmd, shell=True, stdout=subprocess.PIPE, stderr=subprocess.PIPE)
-            raw_data, err = p.communicate()
-            if err == '':
-                result = raw_data.strip()
-            else:
-                status = False
-        except Exception:
-            status = False
-        return status, result
-
-    def ipmi_set_ss_thres(self, id, threshold_key, value):
-        status = True
-        result = ""
-        try:
-            cmd = "ipmitool sensor thresh '{}' {} {}".format(str(id), str(threshold_key), str(value))
-            p = subprocess.Popen(
-                cmd, shell=True, stdout=subprocess.PIPE, stderr=subprocess.PIPE)
-            raw_data, err = p.communicate()
-            if err == '':
-                result = raw_data.strip()
-            else:
-                status = False
-        except Exception:
-            status = False
-        return status, result
diff --git a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/thermal.py b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/thermal.py
index 98749cbe6..343b7883d 100644
--- a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/thermal.py
+++ b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/thermal.py
@@ -13,12 +13,21 @@ class Thermal(PddfThermal):
 
     def __init__(self, index, pddf_data=None, pddf_plugin_data=None, is_psu_thermal=False, psu_index=0):
         PddfThermal.__init__(self, index, pddf_data, pddf_plugin_data, is_psu_thermal, psu_index)
+        
+        self.pddf_obj = pddf_data
+        self.thermal_obj_name = "TEMP{}".format(self.thermal_index)
+        self.thermal_obj = self.pddf_obj.data[self.thermal_obj_name]
 
     # Provide the functions/variables below for which implementation is to be overwritten
     def get_name(self):
         if self.is_psu_thermal:
             return "PSU-{0} temp sensor 1".format(self.thermals_psu_index)
         else:
+            if 'dev_attr' in self.thermal_obj.keys():
+                if 'display_name' in self.thermal_obj['dev_attr']:
+                    return str(self.thermal_obj['dev_attr']['display_name'])
+            
+            # In case of errors
             return "Temp sensor {0}".format(self.thermal_index)
     
     def get_status(self):

From 4272724bf23264cdb331643a02adb1497ba387df Mon Sep 17 00:00:00 2001
From: jostar-yang <jostar_yang@edge-core.com>
Date: Fri, 10 Feb 2023 15:02:21 +0800
Subject: [PATCH 1064/1115] Modify CPLD name to more detail

---
 .../x86_64-accton_as7726_32x-r0/platform.json | 12 +++++------
 .../as7726-32x/sonic_platform/component.py    | 20 +++++++++----------
 .../as7726-32x/sonic_platform/helper.py       |  4 +++-
 3 files changed, 19 insertions(+), 17 deletions(-)

diff --git a/device/accton/x86_64-accton_as7726_32x-r0/platform.json b/device/accton/x86_64-accton_as7726_32x-r0/platform.json
index 222ea329b..896d9d1b5 100644
--- a/device/accton/x86_64-accton_as7726_32x-r0/platform.json
+++ b/device/accton/x86_64-accton_as7726_32x-r0/platform.json
@@ -3,19 +3,19 @@
         "name": "7726-32X",
         "components": [
             {
-                "name": "MB CPLD1"
+                "name": "MB_CPLD1"
             },
-	    {
-                "name": "MB CPLD2"
+            {
+                "name": "MB_CPLD2"
             },
             {
-                "name": "MB CPLD3"
+                "name": "MB_CPLD3"
             },
             {
-                "name": "FAN CPLD"
+                "name": "FAN_CPLD"
             },
             {
-                "name": "CPU CPLD"
+                "name": "CPU_CPLD"
             },
             {
                 "name": "BIOS"
diff --git a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/component.py b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/component.py
index ce01079a7..7bda9206f 100644
--- a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/component.py
+++ b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/component.py
@@ -12,20 +12,20 @@
     raise ImportError(str(e) + "- required module not found")
 
 CPLD_ADDR_MAPPING = {
-    "MB CPLD1": ['11', '0x60'],
-    "MB CPLD2": ['12', '0x62'],
-    "MB CPLD3": ['13', '0x64'],
-    "FAN CPLD": ['54', '0x66'],
-    "CPU CPLD": ['0',  '0x65'],
+    "MB_CPLD1": ['11', '0x60'],
+    "MB_CPLD2": ['12', '0x62'],
+    "MB_CPLD3": ['13', '0x64'],
+    "FAN_CPLD": ['54', '0x66'],
+    "CPU_CPLD": ['0',  '0x65'],
 }
 SYSFS_PATH = "/sys/bus/i2c/devices/"
 BIOS_VERSION_PATH = "/sys/class/dmi/id/bios_version"
 COMPONENT_LIST= [
-   ("MB CPLD1", "Mainboard CPLD 1"),
-   ("MB CPLD2", "Mainboard CPLD 2"),
-   ("MB CPLD3", "Mainboard CPLD 3"),
-   ("FAN CPLD", "Fan board CPLD"),
-   ("CPU CPLD", "CPU CPLD"),
+   ("MB_CPLD1", "Mainboard CPLD(0x60)"),
+   ("MB_CPLD2", "Mainboard CPLD(0x62)"),
+   ("MB_CPLD3", "Mainboard CPLD(0x64)"),
+   ("FAN_CPLD", "Fan board CPLD(0x66)"),
+   ("CPU_CPLD", "CPU CPLD(0x65)"),
    ("BIOS", "Basic Input/Output System")
    
 ]
diff --git a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/helper.py b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/helper.py
index 5162803fb..09c2af7a8 100644
--- a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/helper.py
+++ b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/helper.py
@@ -37,7 +37,9 @@ def read_txt_file(self, file_path):
         try:
             with open(file_path, 'r', errors='replace') as fd:
                 data = fd.read()
-                return data.strip()
+                ret =  data.strip()
+                if len(ret) > 0:
+                    return ret
         except IOError:
             pass
         return None

From bdb777b17622f5cab48891cec3c32ab03b73a482 Mon Sep 17 00:00:00 2001
From: jostar-yang <jostar_yang@edge-core.com>
Date: Tue, 14 Feb 2023 16:12:06 +0800
Subject: [PATCH 1065/1115] Modify sys_led attr name

---
 .../pddf/pddf-device.json                     | 14 +++++++-------
 .../as7726-32x/sonic_platform/fan.py          | 19 +++++++++++++++++++
 .../as7726-32x/sonic_platform/fan_drawer.py   | 16 ++++++++++++++++
 .../utils/accton_as7726_32x_pddf_monitor.py   |  8 ++++----
 4 files changed, 46 insertions(+), 11 deletions(-)

diff --git a/device/accton/x86_64-accton_as7726_32x-r0/pddf/pddf-device.json b/device/accton/x86_64-accton_as7726_32x-r0/pddf/pddf-device.json
index f7953c74a..78494a51b 100644
--- a/device/accton/x86_64-accton_as7726_32x-r0/pddf/pddf-device.json
+++ b/device/accton/x86_64-accton_as7726_32x-r0/pddf/pddf-device.json
@@ -1904,12 +1904,12 @@
 	"LOC_LED":
 	{
 			"dev_info": { "device_type":"LED", "device_name":"LOC_LED"},
-			"dev_attr": { "index":"0"},
+			"dev_attr": { "index":"0", "flag": "rw"},
 			"i2c" : {
 				"attr_list":
 				[
-					{"attr_name":"STATUS_LED_COLOR_BLUE", "descr" : "", "bits" : "7",  "value" : "0x0", "swpld_addr" : "0x60", "swpld_addr_offset" : "0x41"},
-					{"attr_name":"STATUS_LED_COLOR_OFF",  "descr" : "", "bits" : "7",  "value" : "0x1", "swpld_addr" : "0x60", "swpld_addr_offset" : "0x41"}
+					{"attr_name":"blue", "descr" : "", "bits" : "7",  "value" : "0x0", "swpld_addr" : "0x60", "swpld_addr_offset" : "0x41"},
+					{"attr_name":"off",  "descr" : "", "bits" : "7",  "value" : "0x1", "swpld_addr" : "0x60", "swpld_addr_offset" : "0x41"}
 				]
 			}
 	},
@@ -1917,13 +1917,13 @@
 	"DIAG_LED":
 	{
 			"dev_info": { "device_type":"LED", "device_name":"DIAG_LED"},
-			"dev_attr": { "index":"0"},
+			"dev_attr": { "index":"0", "flag": "rw"},
 			"i2c" : {
 				"attr_list":
 				[
-					{"attr_name":"STATUS_LED_COLOR_GREEN", "descr" : "", "bits" : "1:0", "value" : "0x2", "swpld_addr" : "0x60", "swpld_addr_offset" : "0x41"},
-					{"attr_name":"STATUS_LED_COLOR_RED",   "descr" : "" ,"bits" : "1:0", "value" : "0x1", "swpld_addr" : "0x60", "swpld_addr_offset" : "0x41"},
-					{"attr_name":"STATUS_LED_COLOR_OFF",   "descr" : "" ,"bits" : "1:0", "value" : "0x3", "swpld_addr" : "0x60", "swpld_addr_offset" : "0x41"}
+					{"attr_name":"green", "descr" : "", "bits" : "1:0", "value" : "0x2", "swpld_addr" : "0x60", "swpld_addr_offset" : "0x41"},
+					{"attr_name":"red",   "descr" : "" ,"bits" : "1:0", "value" : "0x1", "swpld_addr" : "0x60", "swpld_addr_offset" : "0x41"},
+					{"attr_name":"off",   "descr" : "" ,"bits" : "1:0", "value" : "0x3", "swpld_addr" : "0x60", "swpld_addr_offset" : "0x41"}
 				]
 			}
 
diff --git a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/fan.py b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/fan.py
index 38fe9dde9..89406230e 100644
--- a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/fan.py
+++ b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/fan.py
@@ -31,3 +31,22 @@ def get_name(self):
 
         return fan_name
 
+
+
+
+    def get_model(self):
+        """
+        Retrieves the model number (or part number) of the device
+        Returns:
+            string: Model/part number of device
+        """
+
+        return "N/A"
+
+    def get_serial(self):
+        """
+        Retrieves the serial number of the device
+        Returns:
+            string: Serial number of device
+        """
+        return "N/A"
diff --git a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/fan_drawer.py b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/fan_drawer.py
index 5d8bc41f6..e4e37f962 100644
--- a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/fan_drawer.py
+++ b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/fan_drawer.py
@@ -23,3 +23,19 @@ def get_name(self):
         """
         return "FanTray{}".format(self.fantray_index)
 
+    def get_model(self):
+        """
+        Retrieves the model number (or part number) of the device
+        Returns:
+            string: Model/part number of device
+        """
+        return self._fan_list[0].get_model()
+
+    def get_serial(self):
+        """
+        Retrieves the serial number of the device
+        Returns:
+            string: Serial number of device
+        """
+        return self._fan_list[0].get_serial()
+
diff --git a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/utils/accton_as7726_32x_pddf_monitor.py b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/utils/accton_as7726_32x_pddf_monitor.py
index 4a3d4af98..5d27ba134 100755
--- a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/utils/accton_as7726_32x_pddf_monitor.py
+++ b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/utils/accton_as7726_32x_pddf_monitor.py
@@ -307,10 +307,10 @@ def main(argv):
     
     global platform_chassis
     platform_chassis = platform.Platform().get_chassis()
-    cmd_str = ["i2cset", "-y", "-f", "54", "0x66", "0x33", "0x0"]
-    status, output = getstatusoutput_noshell(cmd_str)
-    if status:
-        print("Warning: Fan speed watchdog could not be disabled")
+    #cmd_str = ["i2cset", "-y", "-f", "54", "0x66", "0x33", "0x0"]
+    #status, output = getstatusoutput_noshell(cmd_str)
+    #if status:
+    #    print("Warning: Fan speed watchdog could not be disabled")
 
     cmd_str = ["i2cset", "-y", "-f", "54", "0x66", "0x33", "0x1"]
     status, output = getstatusoutput_noshell(cmd_str)

From 48674cbeda237eae4e2e689a07fb733aab3f180a Mon Sep 17 00:00:00 2001
From: jostar-yang <jostar_yang@edge-core.com>
Date: Thu, 16 Feb 2023 11:25:57 +0800
Subject: [PATCH 1066/1115] Modify eeprom.py to support cache

---
 .../as7726-32x/sonic_platform/eeprom.py       | 76 ++++++++++++++++++-
 1 file changed, 75 insertions(+), 1 deletion(-)

diff --git a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/eeprom.py b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/eeprom.py
index a87ecc9f6..ca9b5ce06 100644
--- a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/eeprom.py
+++ b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/eeprom.py
@@ -2,13 +2,87 @@
 
 try:
     from sonic_platform_pddf_base.pddf_eeprom import PddfEeprom
+    import os
 except ImportError as e:
     raise ImportError(str(e) + "- required module not found")
 
+CACHE_ROOT = '/var/cache/sonic/decode-syseeprom'
+CACHE_FILE = 'syseeprom_cache'
 
 class Eeprom(PddfEeprom):
+    _TLV_INFO_MAX_LEN = 256
+    pddf_obj = {}
+    plugin_data = {}
 
     def __init__(self, pddf_data=None, pddf_plugin_data=None):
-        PddfEeprom.__init__(self, pddf_data, pddf_plugin_data)
+        #PddfEeprom.__init__(self, pddf_data, pddf_plugin_data)
+        if not pddf_data or not pddf_plugin_data:
+            raise ValueError('PDDF JSON data error')
+
+        self.pddf_obj = pddf_data
+        self.plugin_data = pddf_plugin_data
+
+        # system EEPROM always has device name EEPROM1
+        self.eeprom_path = self.pddf_obj.get_path("EEPROM1", "eeprom")
+        if self.eeprom_path is None:
+            return
+
+        super(PddfEeprom, self).__init__(self.eeprom_path, 0, '', True)
+        self.eeprom_tlv_dict = dict()
+
+        # Create the cache directory if not created
+        if not os.path.exists(CACHE_ROOT):
+            try:
+                os.makedirs(CACHE_ROOT)
+            except Exception as e:
+                print("Error in creating Eeprom cache directory - {}".format(str(e)))
+
+        # Assign cache_name in eeprom_base.py
+        try:
+            self.set_cache_name(os.path.join(CACHE_ROOT, CACHE_FILE))
+        except:
+            pass
+
+        try:
+            self.eeprom_data = self.read_eeprom()
+        except Exception as e:
+            self.eeprom_data = "N/A"
+            raise RuntimeError("Eeprom is not Programmed - Error: {}".format(str(e)))
+        else:
+            eeprom = self.eeprom_data
+
+            try:
+                self.update_cache(eeprom)
+            except:
+                pass
+
+            if not self.is_valid_tlvinfo_header(eeprom):
+                return
+
+            total_length = ((eeprom[9]) << 8) | (eeprom[10])
+            tlv_index = self._TLV_INFO_HDR_LEN
+            tlv_end = self._TLV_INFO_HDR_LEN + total_length
+
+            while (tlv_index + 2) < len(eeprom) and tlv_index < tlv_end:
+                if not self.is_valid_tlv(eeprom[tlv_index:]):
+                    break
+
+                tlv = eeprom[tlv_index:tlv_index + 2
+                             + (eeprom[tlv_index + 1])]
+                code = "0x%02X" % ((tlv[0]))
+
+                if (tlv[0]) == self._TLV_CODE_VENDOR_EXT:
+                    value = str(((tlv[2]) << 24) | ((tlv[3]) << 16) |
+                                ((tlv[4]) << 8) | (tlv[5]))
+                    value += str(tlv[6:6 + (tlv[1])])
+                else:
+                    name, value = self.decoder(None, tlv)
+
+                self.eeprom_tlv_dict[code] = value
+                if (eeprom[tlv_index]) == self._TLV_CODE_CRC_32:
+                    break
+
+                tlv_index += (eeprom[tlv_index+1]) + 2
+
 
     # Provide the functions/variables below for which implementation is to be overwritten

From 5e8df9ed2352a99e991fc61c49ca415d0a57a8d4 Mon Sep 17 00:00:00 2001
From: jostar-yang <jostar_yang@edge-core.com>
Date: Fri, 17 Feb 2023 14:28:31 +0800
Subject: [PATCH 1067/1115] Modify devices_to_ignore for pus_fan

---
 .../system_health_monitoring_config.json                      | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/device/accton/x86_64-accton_as7726_32x-r0/system_health_monitoring_config.json b/device/accton/x86_64-accton_as7726_32x-r0/system_health_monitoring_config.json
index 53b14bec1..958dca9a4 100644
--- a/device/accton/x86_64-accton_as7726_32x-r0/system_health_monitoring_config.json
+++ b/device/accton/x86_64-accton_as7726_32x-r0/system_health_monitoring_config.json
@@ -4,8 +4,8 @@
         "asic",
         "psu.voltage",
         "psu.temperature",
-        "PSU1_FAN1.speed",
-        "PSU2_FAN1.speed"
+        "PSU-1 FAN-1.speed",
+        "PSU-2 FAN-1.speed"
     ],
     "user_defined_checkers": [],
     "polling_interval": 60,

From 39ff406916044788a18af4ca9b7bf9df47abe88e Mon Sep 17 00:00:00 2001
From: jostar-yang <jostar_yang@edge-core.com>
Date: Tue, 21 Feb 2023 11:25:28 +0800
Subject: [PATCH 1068/1115] Add psu_fan target speed

---
 .../x86_64-accton_as7726_32x-r0/platform.json |  2 +-
 .../system_health_monitoring_config.json      |  4 +--
 .../as7726-32x/sonic_platform/chassis.py      | 31 ++++++++++++++++++-
 .../as7726-32x/sonic_platform/fan.py          | 13 ++++++++
 4 files changed, 45 insertions(+), 5 deletions(-)

diff --git a/device/accton/x86_64-accton_as7726_32x-r0/platform.json b/device/accton/x86_64-accton_as7726_32x-r0/platform.json
index 896d9d1b5..c75e1532c 100644
--- a/device/accton/x86_64-accton_as7726_32x-r0/platform.json
+++ b/device/accton/x86_64-accton_as7726_32x-r0/platform.json
@@ -178,7 +178,7 @@
                 "name": "MB_RearMAC_temp(0x48)"
             },
             {
-                "name": "CPU Temp"
+                "name": "coretemp-isa-0000"
             }
         ],
         "sfps": [
diff --git a/device/accton/x86_64-accton_as7726_32x-r0/system_health_monitoring_config.json b/device/accton/x86_64-accton_as7726_32x-r0/system_health_monitoring_config.json
index 958dca9a4..bb3bec0ef 100644
--- a/device/accton/x86_64-accton_as7726_32x-r0/system_health_monitoring_config.json
+++ b/device/accton/x86_64-accton_as7726_32x-r0/system_health_monitoring_config.json
@@ -3,9 +3,7 @@
     "devices_to_ignore": [
         "asic",
         "psu.voltage",
-        "psu.temperature",
-        "PSU-1 FAN-1.speed",
-        "PSU-2 FAN-1.speed"
+        "psu.temperature"
     ],
     "user_defined_checkers": [],
     "polling_interval": 60,
diff --git a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/chassis.py b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/chassis.py
index 1f23dcf81..e1c3b1f57 100644
--- a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/chassis.py
+++ b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/chassis.py
@@ -85,7 +85,7 @@ def get_sfp(self, index):
             sys.stderr.write("SFP index {} out of range (1-{})\n".format(
                              index, len(self._sfp_list)))
         return sfp
-  
+
     def initizalize_system_led(self):
         return
 
@@ -101,3 +101,32 @@ def get_port_or_cage_type(self, port):
             return SfpBase.SFP_PORT_TYPE_BIT_QSFP | SfpBase.SFP_PORT_TYPE_BIT_QSFP_PLUS | SfpBase.SFP_PORT_TYPE_BIT_QSFP28
         else:
             return SfpBase.SFP_PORT_TYPE_BIT_SFP | SfpBase.SFP_PORT_TYPE_BIT_SFP_PLUS
+
+    def get_position_in_parent(self):
+        """
+        Retrieves 1-based relative physical position in parent device.
+        If the agent cannot determine the parent-relative position
+        for some reason, or if the associated value of
+        entPhysicalContainedIn is'0', then the value '-1' is returned
+        Returns:
+            integer: The 1-based relative physical position in parent device
+            or -1 if cannot determine the position
+        """
+        return -1
+
+    def is_replaceable(self):
+        """
+        Indicate whether this device is replaceable.
+        Returns:
+            bool: True if it is replaceable.
+        """
+        return False    
+        
+    def get_revision(self):
+        """
+        Retrieves the hardware revision of the device
+
+        Returns:
+            string: Revision value of device
+        """
+        return 'N/A'
\ No newline at end of file
diff --git a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/fan.py b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/fan.py
index 89406230e..3611ac5d2 100644
--- a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/fan.py
+++ b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/fan.py
@@ -50,3 +50,16 @@ def get_serial(self):
             string: Serial number of device
         """
         return "N/A"
+
+    def get_target_speed(self):
+        """
+        Retrieves the target (expected) speed of the fan
+
+        Returns:
+            An integer, the percentage of full fan speed, in the range 0 (off)
+                 to 100 (full speed)
+        """
+        if self.is_psu_fan:
+            return super().get_speed()
+        else:
+            return super().get_target_speed()

From 9dd6b2ba81ece44fa5bde4e0d12189ab6f136672 Mon Sep 17 00:00:00 2001
From: jostar-yang <jostar_yang@edge-core.com>
Date: Tue, 21 Feb 2023 15:11:21 +0800
Subject: [PATCH 1069/1115] Modify system_health_monitoring_config.json
 led_color string

---
 .../system_health_monitoring_config.json                    | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/device/accton/x86_64-accton_as7726_32x-r0/system_health_monitoring_config.json b/device/accton/x86_64-accton_as7726_32x-r0/system_health_monitoring_config.json
index bb3bec0ef..930308045 100644
--- a/device/accton/x86_64-accton_as7726_32x-r0/system_health_monitoring_config.json
+++ b/device/accton/x86_64-accton_as7726_32x-r0/system_health_monitoring_config.json
@@ -8,8 +8,8 @@
     "user_defined_checkers": [],
     "polling_interval": 60,
     "led_color": {
-        "fault": "STATUS_LED_COLOR_AMBER",
-        "normal": "STATUS_LED_COLOR_GREEN",
-        "booting": "STATUS_LED_COLOR_OFF"
+        "fault": "amber",
+        "normal": "green",
+        "booting": "off"
     }
 }

From c1ee57cfcd6e0c713a9f83267377700b98fa0719 Mon Sep 17 00:00:00 2001
From: roger530-ho <roger530_ho@edge-core.com>
Date: Wed, 15 Mar 2023 01:42:57 +0000
Subject: [PATCH 1070/1115] Fix pytest issue

---
 .../pddf/pddf-device.json                     |  14 +-
 .../x86_64-accton_as7726_32x-r0/platform.json | 341 +++++++++++++++---
 .../platform_components.json                  |  14 +
 .../system_health_monitoring_config.json      |   4 +-
 .../as7726-32x/sonic_platform/chassis.py      |   2 +-
 .../as7726-32x/sonic_platform/component.py    |  39 +-
 .../as7726-32x/sonic_platform/eeprom.py       |  76 +---
 .../as7726-32x/sonic_platform/event.py        |  59 ++-
 .../as7726-32x/sonic_platform/fan.py          |  13 +
 .../as7726-32x/sonic_platform/helper.py       | 317 +++++++++++++++-
 .../as7726-32x/sonic_platform/psu.py          |  36 +-
 .../as7726-32x/sonic_platform/sfp.py          | 153 ++++++++
 .../as7726-32x/sonic_platform/thermal.py      | 236 +++++++++++-
 .../utils/accton_as7726_32x_util.py           | 239 ++++++++++--
 14 files changed, 1343 insertions(+), 200 deletions(-)
 create mode 100644 device/accton/x86_64-accton_as7726_32x-r0/platform_components.json

diff --git a/device/accton/x86_64-accton_as7726_32x-r0/pddf/pddf-device.json b/device/accton/x86_64-accton_as7726_32x-r0/pddf/pddf-device.json
index 78494a51b..5b2cabb74 100644
--- a/device/accton/x86_64-accton_as7726_32x-r0/pddf/pddf-device.json
+++ b/device/accton/x86_64-accton_as7726_32x-r0/pddf/pddf-device.json
@@ -4,7 +4,7 @@
 		"num_psus":2,
 		"num_fantrays":6,
 		"num_fans_pertray":2,
-		"num_ports":34,
+		"num_ports":32,
 		"num_temps":6,
 		"pddf_dev_types":
 		{
@@ -1657,7 +1657,11 @@
 				{ "attr_name":"psu_i_out", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x8c", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
 				{ "attr_name":"psu_p_out", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x96", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
 				{ "attr_name":"psu_fan1_speed_rpm", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x90", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
-				{ "attr_name":"psu_temp1_input", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x8d", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}
+				{ "attr_name":"psu_temp1_input", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x8d", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+				{ "attr_name":"psu_v_out_max", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0xa5", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+				{ "attr_name":"psu_v_out_min", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0xa4", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+				{ "attr_name":"psu_p_out_max", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0xa7", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+				{ "attr_name":"psu_temp1_high_threshold", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0xa8", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}
 			]
 		}
 	},
@@ -1705,7 +1709,11 @@
 				{ "attr_name":"psu_i_out", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x8c", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
 				{ "attr_name":"psu_p_out", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x96", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
 				{ "attr_name":"psu_fan1_speed_rpm", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x90", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
-				{ "attr_name":"psu_temp1_input", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x8d", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}
+				{ "attr_name":"psu_temp1_input", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x8d", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+				{ "attr_name":"psu_v_out_max", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0xa5", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+				{ "attr_name":"psu_v_out_min", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0xa4", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+				{ "attr_name":"psu_p_out_max", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0xa7", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+				{ "attr_name":"psu_temp1_high_threshold", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0xa8", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}
 			]
 		}
 	},
diff --git a/device/accton/x86_64-accton_as7726_32x-r0/platform.json b/device/accton/x86_64-accton_as7726_32x-r0/platform.json
index c75e1532c..3ca60cf1c 100644
--- a/device/accton/x86_64-accton_as7726_32x-r0/platform.json
+++ b/device/accton/x86_64-accton_as7726_32x-r0/platform.json
@@ -1,6 +1,11 @@
 {
     "chassis": {
         "name": "7726-32X",
+        "thermal_manager":false,
+        "status_led": {
+            "controllable": true,
+            "colors": ["green", "red", "off"]
+        },
         "components": [
             {
                 "name": "MB_CPLD1"
@@ -23,112 +28,298 @@
         ],
         "fans": [
             {
-                "name": "FAN-1F"
-            },
-            {
-                "name": "FAN-1R"
-            },
-            {
-                "name": "FAN-2F"
-            },
-            {
-                "name": "FAN-2R"
-            },
-            {
-                "name": "FAN-3F"
-            },
-            {
-                "name": "FAN-3R"
-            },
-            {
-                "name": "FAN-4F"
-            },
-            {
-                "name": "FAN-4R"
-            },
-            {
-                "name": "FAN-5F"
-            },
-            {
-                "name": "FAN-5R"
-            },
-            {
-                "name": "FAN-6F"
-            },
-            {
-                "name": "FAN-6R"
+                "name": "FAN-1F",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 32
+                },
+                "status_led": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "FAN-1R",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 32
+                },
+                "status_led": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "FAN-2F",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 32
+                },
+                "status_led": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "FAN-2R",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 32
+                },
+                "status_led": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "FAN-3F",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 32
+                },
+                "status_led": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "FAN-3R",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 32
+                },
+                "status_led": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "FAN-4F",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 32
+                },
+                "status_led": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "FAN-4R",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 32
+                },
+                "status_led": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "FAN-5F",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 32
+                },
+                "status_led": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "FAN-5R",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 32
+                },
+                "status_led": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "FAN-6F",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 32
+                },
+                "status_led": {
+                    "controllable": false
+                }
+            },
+            {
+                "name": "FAN-6R",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 32
+                },
+                "status_led": {
+                    "controllable": false
+                }
             }
         ],
         "fan_drawers":[
             {
                 "name": "FanTray1",
+                "status_led": {
+                    "controllable": false
+                },
                 "num_fans" : 2,
                 "fans": [
                     {
-                        "name": "FAN-1F"
+                        "name": "FAN-1F",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 32
+                        },
+                        "status_led": {
+                            "controllable": false
+                        }
                     },
                     {
-                        "name": "FAN-1R"
+                        "name": "FAN-1R",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 32
+                        },
+                        "status_led": {
+                            "controllable": false
+                        }
                     }
                 ]
             },
             {
                 "name": "FanTray2",
+                "status_led": {
+                    "controllable": false
+                },
                 "num_fans" : 2,
                 "fans": [
                     {
-                        "name": "FAN-2F"
+                        "name": "FAN-2F",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 32
+                        },
+                        "status_led": {
+                            "controllable": false
+                        }
                     },
                     {
-                        "name": "FAN-2R"
+                        "name": "FAN-2R",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 32
+                        },
+                        "status_led": {
+                            "controllable": false
+                        }
                     }
                 ]
             },
             {
                 "name": "FanTray3",
+                "status_led": {
+                    "controllable": false
+                },
                 "num_fans" : 2,
                 "fans": [
                     {
-                        "name": "FAN-3F"
+                        "name": "FAN-3F",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 32
+                        },
+                        "status_led": {
+                            "controllable": false
+                        }
                     },
                     {
-                        "name": "FAN-3R"
+                        "name": "FAN-3R",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 32
+                        },
+                        "status_led": {
+                            "controllable": false
+                        }
                     }
                 ]
             },
             {
                 "name": "FanTray4",
+                "status_led": {
+                    "controllable": false
+                },
                 "num_fans" : 2,
                 "fans": [
                     {
-                        "name": "FAN-4F"
+                        "name": "FAN-4F",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 32
+                        },
+                        "status_led": {
+                            "controllable": false
+                        }
                     },
                     {
-                        "name": "FAN-4R"
+                        "name": "FAN-4R",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 32
+                        },
+                        "status_led": {
+                            "controllable": false
+                        }
                     }
                 ]
             },
             {
                 "name": "FanTray5",
+                "status_led": {
+                    "controllable": false
+                },
                 "num_fans" : 2,
                 "fans": [
                     {
-                        "name": "FAN-5F"
+                        "name": "FAN-5F",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 32
+                        },
+                        "status_led": {
+                            "controllable": false
+                        }
                     },
                     {
-                        "name": "FAN-5R"
+                        "name": "FAN-5R",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 32
+                        },
+                        "status_led": {
+                            "controllable": false
+                        }
                     }
                 ]
             },
             {
                 "name": "FanTray6",
+                "status_led": {
+                    "controllable": false
+                },
                 "num_fans" : 2,
                 "fans": [
                     {
-                        "name": "FAN-6F"
+                        "name": "FAN-6F",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 32
+                        },
+                        "status_led": {
+                            "controllable": false
+                        }
                     },
                     {
-                        "name": "FAN-6R"
+                        "name": "FAN-6R",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 32
+                        },
+                        "status_led": {
+                            "controllable": false
+                        }
                     }
                 ]
             }
@@ -136,6 +327,9 @@
         "psus": [
             {
                 "name": "PSU-1",
+                "status_led": {
+                    "controllable": false
+                },
                 "fans": [
                     {
                         "name": "PSU-1 FAN-1"
@@ -143,12 +337,18 @@
                 ],
                 "thermals": [
                     {
-                        "name": "PSU-1 temp sensor 1"
+                        "name": "PSU-1 temp sensor 1",
+                        "controllable": false,
+                        "low-crit-threshold": false,
+                        "high-crit-threshold": false
                     }
                 ]
             },
             {
                 "name": "PSU-2",
+                "status_led": {
+                    "controllable": false
+                },
                 "fans": [
                     {
                         "name": "PSU-2 FAN-1"
@@ -156,29 +356,62 @@
                 ],
                 "thermals": [
                     {
-                        "name": "PSU-2 temp sensor 1"
+                        "name": "PSU-2 temp sensor 2",
+                        "controllable": false,
+                        "low-crit-threshold": false,
+                        "high-crit-threshold": false
                     }
                 ]
             }
         ],
         "thermals": [
             {
-                "name": "CB_temp(0x4B)"
+                "name": "CB_temp(0x4B)",
+                "controllable": true,
+                "low-threshold": false,
+                "high-threshold": true,
+                "low-crit-threshold": false,
+                "high-crit-threshold": false
             },
             {
-                "name": "FB_temp(0x4C)"
+                "name": "FB_temp(0x4C)",
+                "controllable": true,
+                "low-threshold": false,
+                "high-threshold": true,
+                "low-crit-threshold": false,
+                "high-crit-threshold": false
             },
             {
-                "name": "MB_FrontMAC_temp(0x49)"
+                "name": "MB_FrontMAC_temp(0x49)",
+                "controllable": true,
+                "low-threshold": false,
+                "high-threshold": true,
+                "low-crit-threshold": false,
+                "high-crit-threshold": false
             },
             {
-                "name": "MB_LeftCenter_temp(0x4A)"
+                "name": "MB_LeftCenter_temp(0x4A)",
+                "controllable": true,
+                "low-threshold": false,
+                "high-threshold": true,
+                "low-crit-threshold": false,
+                "high-crit-threshold": false
             },
             {
-                "name": "MB_RearMAC_temp(0x48)"
+                "name": "MB_RearMAC_temp(0x48)",
+                "controllable": true,
+                "low-threshold": false,
+                "high-threshold": true,
+                "low-crit-threshold": false,
+                "high-crit-threshold": false
             },
             {
-                "name": "coretemp-isa-0000"
+                "name": "coretemp-isa-0000",
+                "controllable": false,
+                "low-threshold": false,
+                "high-threshold": true,
+                "low-crit-threshold": false,
+                "high-crit-threshold": true
             }
         ],
         "sfps": [
diff --git a/device/accton/x86_64-accton_as7726_32x-r0/platform_components.json b/device/accton/x86_64-accton_as7726_32x-r0/platform_components.json
new file mode 100644
index 000000000..bf9378bae
--- /dev/null
+++ b/device/accton/x86_64-accton_as7726_32x-r0/platform_components.json
@@ -0,0 +1,14 @@
+{
+    "chassis": {
+        "7726-32X-O-AC-F": {
+            "component": {
+                "MB_CPLD1": { },
+                "MB_CPLD2": { },
+                "MB_CPLD3": { },
+                "FAN_CPLD": { },
+                "CPU_CPLD": { },
+                "BIOS": { }
+            }
+        }
+    }
+}
diff --git a/device/accton/x86_64-accton_as7726_32x-r0/system_health_monitoring_config.json b/device/accton/x86_64-accton_as7726_32x-r0/system_health_monitoring_config.json
index 930308045..2eb552f83 100644
--- a/device/accton/x86_64-accton_as7726_32x-r0/system_health_monitoring_config.json
+++ b/device/accton/x86_64-accton_as7726_32x-r0/system_health_monitoring_config.json
@@ -1,9 +1,7 @@
 {
     "services_to_ignore": [],
     "devices_to_ignore": [
-        "asic",
-        "psu.voltage",
-        "psu.temperature"
+        "asic"
     ],
     "user_defined_checkers": [],
     "polling_interval": 60,
diff --git a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/chassis.py b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/chassis.py
index e1c3b1f57..c0cfc5c79 100644
--- a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/chassis.py
+++ b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/chassis.py
@@ -129,4 +129,4 @@ def get_revision(self):
         Returns:
             string: Revision value of device
         """
-        return 'N/A'
\ No newline at end of file
+        return self._eeprom.revision_str()
diff --git a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/component.py b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/component.py
index 7bda9206f..704b4e220 100644
--- a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/component.py
+++ b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/component.py
@@ -6,8 +6,10 @@
 #############################################################################
 
 try:
-    import subprocess
+    import os
+    import json
     from sonic_platform_base.component_base import ComponentBase
+    from sonic_py_common.general import getstatusoutput_noshell
 except ImportError as e:
     raise ImportError(str(e) + "- required module not found")
 
@@ -52,8 +54,8 @@ def __get_cpld_version(self):
         # Retrieves the CPLD firmware version
         cpld_version = dict()
         for cpld_name in CPLD_ADDR_MAPPING:
-            cmd = "i2cget -f -y {0} {1} 0x1".format(CPLD_ADDR_MAPPING[cpld_name][0], CPLD_ADDR_MAPPING[cpld_name][1])
-            status, value = subprocess.getstatusoutput(cmd)
+            cmd = ["i2cget", "-f", "-y", CPLD_ADDR_MAPPING[cpld_name][0], CPLD_ADDR_MAPPING[cpld_name][1], "0x1"]
+            status, value = getstatusoutput_noshell(cmd)
             if not status:
                 cpld_version_raw = value.rstrip()
                 cpld_version[cpld_name] = "{}".format(int(cpld_version_raw,16))
@@ -100,7 +102,36 @@ def install_firmware(self, image_path):
         Returns:
             A boolean, True if install successfully, False if not
         """
-        raise NotImplementedError
+        ret, output = getstatusoutput_noshell(["tar", "-C", "/tmp", "-xzf", image_path ] )
+        if ret != 0 :
+            print("Installation failed because of wrong image package")
+            return False
+
+        if  False == os.path.exists("/tmp/install.json") :
+            print("Installation failed without jsonfile")
+            return False
+
+        input_file = open ('/tmp/install.json')
+        json_array = json.load(input_file)
+        ret = 1
+        for item in json_array:
+            if item.get('id')==None or item.get('path')==None:
+                continue
+            if self.name == item['id'] and item['path'] and item.get('cpu'):
+                print( "Find", item['id'], item['path'], item['cpu'] )
+                ret, output = getstatusoutput_noshell(["/tmp/run_install.sh", item['id'], item['path'], item['cpu'] ])
+                if ret==0:
+                    break
+            elif self.name == item['id'] and item['path']:
+                print( "Find", item['id'], item['path'] )
+                ret, output = getstatusoutput_noshell(["/tmp/run_install.sh", item['id'], item['path'] ])
+                if ret==0:
+                    break
+
+        if ret==0:
+            return True
+        else :
+            return False
 
     def get_presence(self):
         """
diff --git a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/eeprom.py b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/eeprom.py
index ca9b5ce06..a87ecc9f6 100644
--- a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/eeprom.py
+++ b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/eeprom.py
@@ -2,87 +2,13 @@
 
 try:
     from sonic_platform_pddf_base.pddf_eeprom import PddfEeprom
-    import os
 except ImportError as e:
     raise ImportError(str(e) + "- required module not found")
 
-CACHE_ROOT = '/var/cache/sonic/decode-syseeprom'
-CACHE_FILE = 'syseeprom_cache'
 
 class Eeprom(PddfEeprom):
-    _TLV_INFO_MAX_LEN = 256
-    pddf_obj = {}
-    plugin_data = {}
 
     def __init__(self, pddf_data=None, pddf_plugin_data=None):
-        #PddfEeprom.__init__(self, pddf_data, pddf_plugin_data)
-        if not pddf_data or not pddf_plugin_data:
-            raise ValueError('PDDF JSON data error')
-
-        self.pddf_obj = pddf_data
-        self.plugin_data = pddf_plugin_data
-
-        # system EEPROM always has device name EEPROM1
-        self.eeprom_path = self.pddf_obj.get_path("EEPROM1", "eeprom")
-        if self.eeprom_path is None:
-            return
-
-        super(PddfEeprom, self).__init__(self.eeprom_path, 0, '', True)
-        self.eeprom_tlv_dict = dict()
-
-        # Create the cache directory if not created
-        if not os.path.exists(CACHE_ROOT):
-            try:
-                os.makedirs(CACHE_ROOT)
-            except Exception as e:
-                print("Error in creating Eeprom cache directory - {}".format(str(e)))
-
-        # Assign cache_name in eeprom_base.py
-        try:
-            self.set_cache_name(os.path.join(CACHE_ROOT, CACHE_FILE))
-        except:
-            pass
-
-        try:
-            self.eeprom_data = self.read_eeprom()
-        except Exception as e:
-            self.eeprom_data = "N/A"
-            raise RuntimeError("Eeprom is not Programmed - Error: {}".format(str(e)))
-        else:
-            eeprom = self.eeprom_data
-
-            try:
-                self.update_cache(eeprom)
-            except:
-                pass
-
-            if not self.is_valid_tlvinfo_header(eeprom):
-                return
-
-            total_length = ((eeprom[9]) << 8) | (eeprom[10])
-            tlv_index = self._TLV_INFO_HDR_LEN
-            tlv_end = self._TLV_INFO_HDR_LEN + total_length
-
-            while (tlv_index + 2) < len(eeprom) and tlv_index < tlv_end:
-                if not self.is_valid_tlv(eeprom[tlv_index:]):
-                    break
-
-                tlv = eeprom[tlv_index:tlv_index + 2
-                             + (eeprom[tlv_index + 1])]
-                code = "0x%02X" % ((tlv[0]))
-
-                if (tlv[0]) == self._TLV_CODE_VENDOR_EXT:
-                    value = str(((tlv[2]) << 24) | ((tlv[3]) << 16) |
-                                ((tlv[4]) << 8) | (tlv[5]))
-                    value += str(tlv[6:6 + (tlv[1])])
-                else:
-                    name, value = self.decoder(None, tlv)
-
-                self.eeprom_tlv_dict[code] = value
-                if (eeprom[tlv_index]) == self._TLV_CODE_CRC_32:
-                    break
-
-                tlv_index += (eeprom[tlv_index+1]) + 2
-
+        PddfEeprom.__init__(self, pddf_data, pddf_plugin_data)
 
     # Provide the functions/variables below for which implementation is to be overwritten
diff --git a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/event.py b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/event.py
index d5dac6d7f..1a2f60dbb 100644
--- a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/event.py
+++ b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/event.py
@@ -1,11 +1,21 @@
 try:
     import time
     from sonic_py_common.logger import Logger
+    from .sfp import Sfp
 except ImportError as e:
     raise ImportError(repr(e) + " - required module not found")
 
 POLL_INTERVAL_IN_SEC = 1
 
+# SFP errors that will block eeprom accessing
+SFP_BLOCKING_ERRORS = [
+    Sfp.SFP_ERROR_BIT_I2C_STUCK,
+    Sfp.SFP_ERROR_BIT_BAD_EEPROM,
+    Sfp.SFP_ERROR_BIT_UNSUPPORTED_CABLE,
+    Sfp.SFP_ERROR_BIT_HIGH_TEMP,
+    Sfp.SFP_ERROR_BIT_BAD_CABLE
+]
+
 class SfpEvent:
     ''' Listen to insert/remove sfp events '''
 
@@ -46,15 +56,54 @@ def get_sfp_event(self, timeout=2000):
         if changed_ports != 0:
             for sfp in self._sfp_list:
                 i=sfp.get_position_in_parent() - 1
-                if (changed_ports & (1 << i)):
-                    if (bitmap & (1 << i)) == 0:
-                        port_dict[i+1] = '0'
-                    else:
-                        port_dict[i+1] = '1'
+                if (changed_ports & (1 << i)) == 0:
+                    continue
+
+                if (bitmap & (1 << i)) == 0:
+                    port_dict[i+1] = '0'
+                else:
+                    # sfp.refresh_optoe_dev_class()
+                    sfp_state_bits = self.get_sfp_state_bits(sfp, True)
+                    sfp_state_bits = self.check_sfp_blocking_errors(sfp_state_bits)
 
+                    port_dict[i+1] = str(sfp_state_bits)
 
             # Update the cache dict
             self._sfp_change_event_data['present'] = bitmap
             return True, change_dict
         else:
             return True, change_dict
+
+    def get_sfp_state_bits(self, sfp, present):
+        sfp_state_bits = 0
+
+        if present is True:
+            sfp_state_bits |= Sfp.SFP_STATUS_BIT_INSERTED
+        else:
+            return sfp_state_bits
+
+        status = sfp.validate_eeprom()
+        if status is None:
+            sfp_state_bits |= Sfp.SFP_ERROR_BIT_I2C_STUCK
+            return sfp_state_bits
+        elif status is not True:
+            sfp_state_bits |= Sfp.SFP_ERROR_BIT_BAD_EEPROM
+            return sfp_state_bits
+
+        status = sfp.validate_temperature()
+        if status is None:
+            sfp_state_bits |= Sfp.SFP_ERROR_BIT_I2C_STUCK
+            return sfp_state_bits
+        elif status is not True:
+            sfp_state_bits |= Sfp.SFP_ERROR_BIT_HIGH_TEMP
+            return sfp_state_bits
+
+        return sfp_state_bits
+
+    def check_sfp_blocking_errors(self, sfp_state_bits):
+        for i in SFP_BLOCKING_ERRORS:
+            if (i & sfp_state_bits) == 0:
+                continue
+            sfp_state_bits |= Sfp.SFP_ERROR_BIT_BLOCKING
+
+        return sfp_state_bits
diff --git a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/fan.py b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/fan.py
index 3611ac5d2..46df75e25 100644
--- a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/fan.py
+++ b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/fan.py
@@ -63,3 +63,16 @@ def get_target_speed(self):
             return super().get_speed()
         else:
             return super().get_target_speed()
+
+    def get_direction(self):
+        """
+        Retrieves the direction of fan
+        Returns:
+            A string, either FAN_DIRECTION_INTAKE or FAN_DIRECTION_EXHAUST
+            depending on fan direction
+        """
+        direction = super().get_direction()
+        if direction is not None and len(direction) > 0:
+            return direction
+
+        return 'N/A'
diff --git a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/helper.py b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/helper.py
index 09c2af7a8..b5e2e5a22 100644
--- a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/helper.py
+++ b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/helper.py
@@ -1,8 +1,14 @@
 import os
 import struct
-import subprocess
+import json
+import fcntl
 from mmap import *
 from sonic_py_common import device_info
+from sonic_py_common import logger
+from threading import Lock
+from typing import cast
+from sonic_py_common.general import getstatusoutput_noshell_pipe
+from sonic_py_common.general import getstatusoutput_noshell
 
 HOST_CHK_CMD = ["docker"]
 EMPTY_STRING = ""
@@ -33,6 +39,13 @@ def pci_get_value(self, resource, offset):
             status = False
         return status, result
 
+    def run_interactive_command(self, cmd):
+        try:
+            os.system(cmd)
+        except Exception:
+            return False
+        return True
+
     def read_txt_file(self, file_path):
         try:
             with open(file_path, 'r', errors='replace') as fd:
@@ -51,3 +64,305 @@ def write_txt_file(self, file_path, value):
         except IOError:
             return False
         return True
+
+    def ipmi_raw(self, netfn, cmd):
+        status = True
+        result = ""
+        try:
+            err, raw_data = getstatusoutput_noshell_pipe(['ipmitool', 'raw', str(netfn), str(cmd)])
+            if err == [0]:
+                result = raw_data.strip()
+            else:
+                status = False
+        except Exception:
+            status = False
+        return status, result
+
+    def ipmi_fru_id(self, id, key=None):
+        status = True
+        result = ""
+        try:
+            if (key is None):
+                err, raw_data = getstatusoutput_noshell_pipe(['ipmitool', 'fru', 'print', str(id)])
+            else:
+                err, raw_data = getstatusoutput_noshell_pipe(['ipmitool', 'fru', 'print', str(id)], ['grep', str(key)])
+            if err == [0] or err == [0, 0]:
+                result = raw_data.strip()
+            else:
+                status = False
+        except Exception:
+            status = False
+        return status, result
+
+    def ipmi_set_ss_thres(self, id, threshold_key, value):
+        status = True
+        result = ""
+        try:
+            err, raw_data = getstatusoutput_noshell_pipe(['ipmitool', 'sensor', 'thresh', str(id), str(threshold_key), str(value)])
+            if err == [0]:
+                result = raw_data.strip()
+            else:
+                status = False
+        except Exception:
+            status = False
+        return status, result
+
+
+class FileLock:
+    """
+    Due to pmon docker not installing the py-filelock, this class 
+    implements a simple file lock feature.
+    Ref: https://github.com/tox-dev/py-filelock/blob/main/src/filelock/
+    """
+
+    def __init__(self, lock_file):
+        self._lock_file = lock_file
+        self._thread_lock = Lock()
+        self.is_locked = False
+
+    def acquire(self):
+        with self._thread_lock:
+            if self.is_locked:
+                return
+
+            fd = os.open(self._lock_file, flags=(os.O_RDWR | os.O_CREAT | os.O_TRUNC))
+            fcntl.flock(fd, fcntl.LOCK_EX)
+            self._lock_file_fd = fd
+            self.is_locked = True
+
+    def release(self):
+        with self._thread_lock:
+            if self.is_locked:
+                fd = cast(int, self._lock_file_fd)
+                self._lock_file_fd = None
+                fcntl.flock(fd, fcntl.LOCK_UN)
+                os.close(fd)
+                self.is_locked = False
+
+    def __enter__(self):
+        self.acquire()
+        return self
+
+    def __exit__(self, exc_type, exc_val, traceback):
+        self.release()
+
+    def __del__(self):
+        self.release()
+
+
+DEVICE_THRESHOLD_JSON_PATH = "/tmp/device_threshold.json"
+
+class DeviceThreshold:
+    HIGH_THRESHOLD = 'high_threshold'
+    LOW_THRESHOLD = 'low_threshold'
+    HIGH_CRIT_THRESHOLD = 'high_critical_threshold'
+    LOW_CRIT_THRESHOLD = 'low_critical_threshold'
+    NOT_AVAILABLE = 'N/A'
+
+    def __init__(self, th_name = NOT_AVAILABLE):
+        self.flock = FileLock("{}.lock".format(DEVICE_THRESHOLD_JSON_PATH))
+        self.name = th_name
+        self.__log = logger.Logger(log_identifier="DeviceThreshold")
+
+        self.__db_data = {}
+        self.__db_mtime = 0
+
+    def __reload_db(self):
+        try:
+            db_data = {}
+            with self.flock:
+                with open(DEVICE_THRESHOLD_JSON_PATH, "r") as db_file:
+                    db_data = json.load(db_file)
+        except Exception as e:
+            self.__log.log_warning('{}'.format(str(e)))
+            return None
+
+        return db_data
+
+    def __get_data(self, field):
+        """
+        Retrieves data frome JSON file by field
+
+        Args :
+            field: String
+
+        Returns:
+            A string if getting is successfully, 'N/A' if not
+        """
+        if os.path.exists(DEVICE_THRESHOLD_JSON_PATH):
+            new_mtime = os.path.getmtime(DEVICE_THRESHOLD_JSON_PATH)
+            if new_mtime != self.__db_mtime:
+                new_data = self.__reload_db()
+                if new_data is not None:
+                    self.__db_data = new_data
+                    self.__db_mtime = new_mtime
+
+        if self.name not in self.__db_data.keys():
+            return self.NOT_AVAILABLE
+
+        if field not in self.__db_data[self.name].keys():
+            return self.NOT_AVAILABLE
+
+        return self.__db_data[self.name][field]
+
+    def __set_data(self, field, new_val):
+        """
+        Set data to JSON file by field
+
+        Args :
+            field: String
+            new_val: String
+
+        Returns:
+            A boolean, True if setting is set successfully, False if not
+        """
+        if self.name not in self.__db_data.keys():
+            self.__db_data[self.name] = {}
+
+        old_val = self.__db_data[self.name].get(field, None)
+        if old_val is not None and old_val == new_val:
+            return True
+
+        self.__db_data[self.name][field] = new_val
+
+        try:
+            with self.flock:
+                db_data = {}
+                mode = "r+" if os.path.exists(DEVICE_THRESHOLD_JSON_PATH) else "w+"
+                with open(DEVICE_THRESHOLD_JSON_PATH, mode) as db_file:
+                    if mode == "r+":
+                        db_data = json.load(db_file)
+
+                    if self.name not in db_data.keys():
+                        db_data[self.name] = {}
+
+                    db_data[self.name][field] = new_val
+
+                    if mode == "r+":
+                        db_file.seek(0)
+                        # erase old data
+                        db_file.truncate(0)
+                    # write all data
+                    json.dump(db_data, db_file, indent=4)
+                self.__db_mtime = os.path.getmtime(DEVICE_THRESHOLD_JSON_PATH)
+        except Exception as e:
+            self.__log.log_error('{}'.format(str(e)))
+            return False
+
+        return True
+
+    def get_high_threshold(self):
+        """
+        Retrieves the high threshold temperature from JSON file.
+
+        Returns:
+            string : the high threshold temperature of thermal,
+                     e.g. "30.125"
+        """
+        return self.__get_data(self.HIGH_THRESHOLD)
+
+    def set_high_threshold(self, temperature):
+        """
+        Sets the high threshold temperature of thermal
+        Args :
+            temperature: A string of temperature, e.g. "30.125"
+        Returns:
+            A boolean, True if threshold is set successfully, False if not
+        """
+        if isinstance(temperature, str) is not True:
+            raise TypeError('The parameter requires string type.')
+
+        try:
+            if temperature != self.NOT_AVAILABLE:
+                float(temperature)
+        except ValueError:
+            raise ValueError('The parameter requires a float string. ex:\"30.1\"')
+
+        return self.__set_data(self.HIGH_THRESHOLD, temperature)
+
+    def get_low_threshold(self):
+        """
+        Retrieves the low threshold temperature from JSON file.
+
+        Returns:
+            string : the low threshold temperature of thermal,
+                     e.g. "30.125"
+        """
+        return self.__get_data(self.LOW_THRESHOLD)
+
+    def set_low_threshold(self, temperature):
+        """
+        Sets the low threshold temperature of thermal
+        Args :
+            temperature: A string of temperature, e.g. "30.125"
+        Returns:
+            A boolean, True if threshold is set successfully, False if not
+        """
+        if isinstance(temperature, str) is not True:
+            raise TypeError('The parameter requires string type.')
+
+        try:
+            if temperature != self.NOT_AVAILABLE:
+                float(temperature)
+        except ValueError:
+            raise ValueError('The parameter requires a float string. ex:\"30.1\"')
+
+        return self.__set_data(self.LOW_THRESHOLD, temperature)
+
+    def get_high_critical_threshold(self):
+        """
+        Retrieves the high critical threshold temperature from JSON file.
+
+        Returns:
+            string : the high critical threshold temperature of thermal,
+                     e.g. "30.125"
+        """
+        return self.__get_data(self.HIGH_CRIT_THRESHOLD)
+
+    def set_high_critical_threshold(self, temperature):
+        """
+        Sets the high critical threshold temperature of thermal
+        Args :
+            temperature: A string of temperature, e.g. "30.125"
+        Returns:
+            A boolean, True if threshold is set successfully, False if not
+        """
+        if isinstance(temperature, str) is not True:
+            raise TypeError('The parameter requires string type.')
+
+        try:
+            if temperature != self.NOT_AVAILABLE:
+                float(temperature)
+        except ValueError:
+            raise ValueError('The parameter requires a float string. ex:\"30.1\"')
+
+        return self.__set_data(self.HIGH_CRIT_THRESHOLD, temperature)
+
+    def get_low_critical_threshold(self):
+        """
+        Retrieves the low critical threshold temperature from JSON file.
+
+        Returns:
+            string : the low critical threshold temperature of thermal,
+                     e.g. "30.125"
+        """
+        return self.__get_data(self.LOW_CRIT_THRESHOLD)
+
+    def set_low_critical_threshold(self, temperature):
+        """
+        Sets the low critical threshold temperature of thermal
+        Args :
+            temperature: A string of temperature, e.g. "30.125"
+        Returns:
+            A boolean, True if threshold is set successfully, False if not
+        """
+        if isinstance(temperature, str) is not True:
+            raise TypeError('The parameter requires string type.')
+
+        try:
+            if temperature != self.NOT_AVAILABLE:
+                float(temperature)
+        except ValueError:
+            raise ValueError('The parameter requires a float string. ex:\"30.1\"')
+
+        return self.__set_data(self.LOW_CRIT_THRESHOLD, temperature)
diff --git a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/psu.py b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/psu.py
index 48cdbab12..18b3ab0d8 100644
--- a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/psu.py
+++ b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/psu.py
@@ -11,8 +11,6 @@
 class Psu(PddfPsu):
     """PDDF Platform-Specific PSU class"""
     
-    PLATFORM_PSU_CAPACITY = 1200
-
     def __init__(self, index, pddf_data=None, pddf_plugin_data=None):
         PddfPsu.__init__(self, index, pddf_data, pddf_plugin_data)
         
@@ -38,28 +36,30 @@ def get_voltage_low_threshold(self):
     def get_name(self):
         return "PSU-{}".format(self.psu_index)
 
-    def get_maximum_supplied_power(self):
+    def get_temperature_high_threshold(self):
         """
-        Retrieves the maximum supplied power by PSU (or PSU capacity)
+        Retrieves the high threshold temperature of PSU
         Returns:
-            A float number, the maximum power output in Watts.
-            e.g. 1200.1
+            A float number, the high threshold temperature of PSU in Celsius
+            up to nearest thousandth of one degree Celsius, e.g. 30.125
         """
-        return float(self.PLATFORM_PSU_CAPACITY)
+        threshold = super().get_temperature_high_threshold()
 
-    def get_capacity(self):
-        """
-        Gets the capacity (maximum output power) of the PSU in watts
+        for psu_thermal_idx in range(self.num_psu_thermals):
+            try:
+                tmp = self._thermal_list[psu_thermal_idx].get_high_threshold()
+                if threshold > tmp or threshold == 0.0:
+                    threshold = tmp
+            except Exception:
+                pass
 
-        Returns:
-            An integer, the capacity of PSU
-        """
-        return (self.PLATFORM_PSU_CAPACITY)
+        return threshold
 
-    def get_type(self):
+    def get_revision(self):
         """
-        Gets the type of the PSU
+        Retrieves the hardware revision of the device
+
         Returns:
-        A string, the type of PSU (AC/DC)
+            string: Revision value of device
         """
-        return "AC"
+        return 'N/A'
diff --git a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/sfp.py b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/sfp.py
index 17d7e9b6c..a0189bfcb 100644
--- a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/sfp.py
+++ b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/sfp.py
@@ -14,8 +14,20 @@ class Sfp(PddfSfp):
     PDDF Platform-Specific Sfp class
     """
 
+    SFP_TYPE_CODE_LIST = [
+        0x03,  # SFP/SFP+/SFP28
+        0x0b   # DWDM-SFP/SFP+
+    ]
+    QSFP_TYPE_CODE_LIST = [
+        0x0c, # QSFP
+        0x0d, # QSFP+ or later
+        0x11, # QSFP28 or later
+        0xe1  # QSFP28 EDFA
+    ]
+
     def __init__(self, index, pddf_data=None, pddf_plugin_data=None):
         PddfSfp.__init__(self, index, pddf_data, pddf_plugin_data)
+        self.index = self.port_index
 
     # Provide the functions/variables below for which implementation is to be overwritten
     def __get_path_to_port_config_file(self):
@@ -38,3 +50,144 @@ def get_name(self):
         name = logical_port_list[self.port_index-1] or "Unknown"
 
         return name
+
+    def __validate_eeprom_sfp(self):
+        checksum_test = 0
+        eeprom_raw = self.read_eeprom(0, 96)
+        if eeprom_raw is None:
+            return None
+
+        for i in range(0, 63):
+            checksum_test = (checksum_test + eeprom_raw[i]) & 0xFF
+        else:
+            if checksum_test != eeprom_raw[63]:
+                return False
+
+        checksum_test = 0
+        for i in range(64, 95):
+            checksum_test = (checksum_test + eeprom_raw[i]) & 0xFF
+        else:
+            if checksum_test != eeprom_raw[95]:
+                return False
+
+        api = self.get_xcvr_api()
+        if api is None:
+            return False
+
+        if api.is_flat_memory():
+            return True
+
+        checksum_test = 0
+        eeprom_raw = self.read_eeprom(384, 96)
+        if eeprom_raw is None:
+            return None
+
+        for i in range(0, 95):
+            checksum_test = (checksum_test + eeprom_raw[i]) & 0xFF
+        else:
+            if checksum_test != eeprom_raw[95]:
+                return False
+
+        return True
+
+    def __validate_eeprom_qsfp(self):
+        checksum_test = 0
+        eeprom_raw = self.read_eeprom(128, 96)
+        if eeprom_raw is None:
+            return None
+
+        for i in range(0, 63):
+            checksum_test = (checksum_test + eeprom_raw[i]) & 0xFF
+        else:
+            if checksum_test != eeprom_raw[63]:
+                return False
+
+        checksum_test = 0
+        for i in range(64, 95):
+            checksum_test = (checksum_test + eeprom_raw[i]) & 0xFF
+        else:
+            if checksum_test != eeprom_raw[95]:
+                return False
+
+        api = self.get_xcvr_api()
+        if api is None:
+            return False
+
+        if api.is_flat_memory():
+            return True
+
+        return True
+
+    def validate_eeprom(self):
+        id_byte_raw = self.read_eeprom(0, 1)
+        if id_byte_raw is None:
+            return None
+
+        id = id_byte_raw[0]
+        if id in self.QSFP_TYPE_CODE_LIST:
+            return self.__validate_eeprom_qsfp()
+        elif id in self.SFP_TYPE_CODE_LIST:
+            return self.__validate_eeprom_sfp()
+        else:
+            return False
+
+    def validate_temperature(self):
+        temperature = self.get_temperature()
+        if temperature is None:
+            return None
+
+        threshold_dict = self.get_transceiver_threshold_info()
+        if threshold_dict is None:
+            return None
+
+        if isinstance(temperature, float) is not True:
+            return True
+
+        if isinstance(threshold_dict['temphighalarm'], float) is not True:
+            return True
+
+        return threshold_dict['temphighalarm'] > temperature
+
+    def __get_error_description(self):
+        if not self.get_presence():
+            return self.SFP_STATUS_UNPLUGGED
+
+        err_stat = self.SFP_STATUS_BIT_INSERTED
+
+        status = self.validate_eeprom()
+        if status is not True:
+            err_stat = (err_stat | self.SFP_ERROR_BIT_BAD_EEPROM)
+
+        status = self.validate_temperature()
+        if status is not True:
+            err_stat = (err_stat | self.SFP_ERROR_BIT_HIGH_TEMP)
+
+        if err_stat is self.SFP_STATUS_BIT_INSERTED:
+            return self.SFP_STATUS_OK
+        else:
+            err_desc = ''
+            cnt = 0
+            for key in self.SFP_ERROR_BIT_TO_DESCRIPTION_DICT:
+                if (err_stat & key) != 0:
+                    if cnt > 0:
+                        err_desc = err_desc + "|"
+                        cnt = cnt + 1
+                    err_desc = err_desc + self.SFP_ERROR_BIT_TO_DESCRIPTION_DICT[key].replace(" ", "_")
+
+            return err_desc
+
+    def get_error_description(self):
+        """
+        Retrives the error descriptions of the SFP module
+        Returns:
+            String that represents the current error descriptions of vendor specific errors
+            In case there are multiple errors, they should be joined by '|',
+            like: "Bad EEPROM|Unsupported cable"
+        """
+        try:
+            ret = super().get_error_description()
+            if ret is not None:
+                return ret
+        except NotImplementedError:
+            pass
+        return self.__get_error_description()
diff --git a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/thermal.py b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/thermal.py
index 343b7883d..1fbe0ae92 100644
--- a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/thermal.py
+++ b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/thermal.py
@@ -3,17 +3,79 @@
 
 try:
     from sonic_platform_pddf_base.pddf_thermal import PddfThermal
+    from .helper import DeviceThreshold
 except ImportError as e:
     raise ImportError(str(e) + "- required module not found")
 
+NOT_AVAILABLE = DeviceThreshold.NOT_AVAILABLE
+HIGH_THRESHOLD = DeviceThreshold.HIGH_THRESHOLD
+LOW_THRESHOLD = DeviceThreshold.LOW_THRESHOLD
+HIGH_CRIT_THRESHOLD = DeviceThreshold.HIGH_CRIT_THRESHOLD
+LOW_CRIT_THRESHOLD = DeviceThreshold.LOW_CRIT_THRESHOLD
 
+DEFAULT_THRESHOLD = {
+    'CB_temp(0x4B)' : {
+        HIGH_THRESHOLD : '80.0',
+        LOW_THRESHOLD : NOT_AVAILABLE,
+        HIGH_CRIT_THRESHOLD : NOT_AVAILABLE,
+        LOW_CRIT_THRESHOLD : NOT_AVAILABLE
+    },
+    'FB_temp(0x4C)' : {
+        HIGH_THRESHOLD : '80.0',
+        LOW_THRESHOLD : NOT_AVAILABLE,
+        HIGH_CRIT_THRESHOLD : NOT_AVAILABLE,
+        LOW_CRIT_THRESHOLD : NOT_AVAILABLE
+    },
+    'MB_FrontMAC_temp(0x49)' : {
+        HIGH_THRESHOLD : '80.0',
+        LOW_THRESHOLD : NOT_AVAILABLE,
+        HIGH_CRIT_THRESHOLD : NOT_AVAILABLE,
+        LOW_CRIT_THRESHOLD : NOT_AVAILABLE
+    },
+    'MB_LeftCenter_temp(0x4A)' : {
+        HIGH_THRESHOLD : '80.0',
+        LOW_THRESHOLD : NOT_AVAILABLE,
+        HIGH_CRIT_THRESHOLD : NOT_AVAILABLE,
+        LOW_CRIT_THRESHOLD : NOT_AVAILABLE
+    },
+    'MB_RearMAC_temp(0x48)' : {
+        HIGH_THRESHOLD : '80.0',
+        LOW_THRESHOLD : NOT_AVAILABLE,
+        HIGH_CRIT_THRESHOLD : NOT_AVAILABLE,
+        LOW_CRIT_THRESHOLD : NOT_AVAILABLE
+    },
+    'coretemp-isa-0000' : {
+        HIGH_THRESHOLD : '82.0',
+        LOW_THRESHOLD : NOT_AVAILABLE,
+        HIGH_CRIT_THRESHOLD : '104.0',
+        LOW_CRIT_THRESHOLD : NOT_AVAILABLE
+    },
+    'PSU-1 temp sensor 1' : {
+        HIGH_THRESHOLD : '80.0',
+        LOW_THRESHOLD : NOT_AVAILABLE,
+        HIGH_CRIT_THRESHOLD : NOT_AVAILABLE,
+        LOW_CRIT_THRESHOLD : NOT_AVAILABLE
+    },
+    'PSU-2 temp sensor 1' : {
+        HIGH_THRESHOLD : '80.0',
+        LOW_THRESHOLD : NOT_AVAILABLE,
+        HIGH_CRIT_THRESHOLD : NOT_AVAILABLE,
+        LOW_CRIT_THRESHOLD : NOT_AVAILABLE
+    }
+}
 
 class Thermal(PddfThermal):
     """PDDF Platform-Specific Thermal class"""
 
     def __init__(self, index, pddf_data=None, pddf_plugin_data=None, is_psu_thermal=False, psu_index=0):
         PddfThermal.__init__(self, index, pddf_data, pddf_plugin_data, is_psu_thermal, psu_index)
-        
+        # Threshold Configuration
+        self.__conf = DeviceThreshold(self.get_name())
+        # Default threshold.
+        self.__default_threshold = DEFAULT_THRESHOLD[self.get_name()]
+        self.min_temperature = None
+        self.max_temperature = None
+
         self.pddf_obj = pddf_data
         self.thermal_obj_name = "TEMP{}".format(self.thermal_index)
         self.thermal_obj = self.pddf_obj.data[self.thermal_obj_name]
@@ -36,3 +98,175 @@ def get_status(self):
         if get_temp is not None:
             return True if get_temp else False
 
+    def get_temperature(self):
+        current = super().get_temperature()
+
+        if self.min_temperature is None or \
+            current < self.min_temperature:
+            self.min_temperature = current
+
+        if self.max_temperature is None or \
+           current > self.max_temperature:
+            self.max_temperature = current
+
+        return current
+
+    def set_high_threshold(self, temperature):
+        try:
+            value = float(temperature)
+        except Exception:
+            return False
+
+        # The new value can not be more than the default value.
+        default_value = self.__default_threshold[HIGH_THRESHOLD]
+        if default_value != NOT_AVAILABLE:
+            if value > float(default_value):
+                return False
+
+        try:
+            self.__conf.set_high_threshold(str(value))
+        except Exception:
+            return False
+
+        return True
+
+    def get_high_threshold(self):
+        value = self.__conf.get_high_threshold()
+        if value != NOT_AVAILABLE:
+            return float(value)
+
+        default_value = self.__default_threshold[HIGH_THRESHOLD]
+        if default_value != NOT_AVAILABLE:
+            return float(default_value)
+
+        raise NotImplementedError
+
+    def set_low_threshold(self, temperature):
+        try:
+            value = float(temperature)
+        except Exception:
+            return False
+
+        # The new value can not be less than the default value.
+        default_value = self.__default_threshold[LOW_THRESHOLD]
+        if default_value != NOT_AVAILABLE:
+            if value < float(default_value):
+                return False
+
+        try:
+            self.__conf.set_low_threshold(str(value))
+        except Exception:
+            return False
+
+        return True
+
+    def get_low_threshold(self):
+        value = self.__conf.get_low_threshold()
+        if value != NOT_AVAILABLE:
+            return float(value)
+
+        default_value = self.__default_threshold[LOW_THRESHOLD]
+        if default_value != NOT_AVAILABLE:
+            return float(default_value)
+
+        raise NotImplementedError
+
+    def set_high_critical_threshold(self, temperature):
+        try:
+            value = float(temperature)
+        except Exception:
+            return False
+
+        # The new value can not be more than the default value.
+        default_value = self.__default_threshold[HIGH_CRIT_THRESHOLD]
+        if default_value != NOT_AVAILABLE:
+            if value > float(default_value):
+                return False
+
+        try:
+            self.__conf.set_high_critical_threshold(str(value))
+        except Exception:
+            return False
+
+        return True
+
+    def get_high_critical_threshold(self):
+        value = self.__conf.get_high_critical_threshold()
+        if value != NOT_AVAILABLE:
+            return float(value)
+
+        default_value = self.__default_threshold[HIGH_CRIT_THRESHOLD]
+        if default_value != NOT_AVAILABLE:
+            return float(default_value)
+
+        raise NotImplementedError
+
+    def set_low_critical_threshold(self, temperature):
+        try:
+            value = float(temperature)
+        except Exception:
+            return False
+
+        # The new value can not be less than the default value.
+        default_value = self.__default_threshold[LOW_CRIT_THRESHOLD]
+        if default_value != NOT_AVAILABLE:
+            if value < float(default_value):
+                return False
+
+        try:
+            self.__conf.set_low_critical_threshold(str(value))
+        except Exception:
+            return False
+
+        return True
+
+    def get_low_critical_threshold(self):
+        value = self.__conf.get_low_critical_threshold()
+        if value != NOT_AVAILABLE:
+            return float(value)
+
+        default_value = self.__default_threshold[LOW_CRIT_THRESHOLD]
+        if default_value != NOT_AVAILABLE:
+            return float(default_value)
+
+        raise NotImplementedError
+
+    def get_model(self):
+        """
+        Retrieves the model number (or part number) of the device
+        Returns:
+            string: Model/part number of device
+        """
+        return 'N/A'
+
+    def get_serial(self):
+        """
+        Retrieves the serial number of the device
+        Returns:
+            string: Serial number of device
+        """
+        return 'N/A'
+
+    def get_minimum_recorded(self):
+        """
+        Retrieves the minimum recorded temperature of thermal
+        Returns:
+            A float number, the minimum recorded temperature of thermal in Celsius
+            up to nearest thousandth of one degree Celsius, e.g. 30.125
+        """
+        if self.min_temperature is None:
+            self.get_temperature()
+
+        return self.min_temperature
+
+    def get_maximum_recorded(self):
+        """
+        Retrieves the maximum recorded temperature of thermal
+        Returns:
+            A float number, the maximum recorded temperature of thermal in Celsius
+            up to nearest thousandth of one degree Celsius, e.g. 30.125
+        """
+        if self.min_temperature is None:
+            self.get_temperature()
+
+        return self.max_temperature
diff --git a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/utils/accton_as7726_32x_util.py b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/utils/accton_as7726_32x_util.py
index 949f1230d..0386e7400 100755
--- a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/utils/accton_as7726_32x_util.py
+++ b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/utils/accton_as7726_32x_util.py
@@ -16,22 +16,27 @@
 # along with this program.  If not, see <http://www.gnu.org/licenses/>.
 
 """
-Usage: %(scriptName)s [options] command object
-
-options:
-    -h | --help     : this help message
-    -d | --debug    : run with debug mode
-    -f | --force    : ignore error during installation or clean
-command:
-    install     : install drivers and generate related sysfs nodes
-    clean       : uninstall drivers and remove related sysfs nodes
+usage: accton_as7726_32x_util.py [-h] [-d] [-f] {install,clean,threshold} ...
+
+AS7726-32X Platform Utility
+
+optional arguments:
+  -h, --help            show this help message and exit
+  -d, --debug           run with debug mode
+  -f, --force           ignore error during installation or clean
+
+Utility Command:
+  {install,clean,threshold}
+    install             : install drivers and generate related sysfs nodes
+    clean               : uninstall drivers and remove related sysfs nodes
+    threshold           : modify thermal threshold
 """
 import subprocess
-import getopt
 import sys
 import logging
 import re
 import time
+import argparse
 from sonic_py_common.general import getstatusoutput_noshell
 
 PROJECT_NAME = 'as7726_32x'
@@ -109,37 +114,44 @@ def main():
     global DEBUG
     global args
     global FORCE
+    global THRESHOLD_RANGE_LOW, THRESHOLD_RANGE_HIGH
+
+    util_parser = argparse.ArgumentParser(description="AS7726-32X Platform Utility")
+    util_parser.add_argument("-d", "--debug", dest='debug', action='store_true', default=False,
+                             help="run with debug mode")
+    util_parser.add_argument("-f", "--force", dest='force', action='store_true', default=False,
+                             help="ignore error during installation or clean")
+    subcommand = util_parser.add_subparsers(dest='cmd', title='Utility Command', required=True)
+    subcommand.add_parser('install', help=': install drivers and generate related sysfs nodes')
+    subcommand.add_parser('clean', help=': uninstall drivers and remove related sysfs nodes')
+    threshold_parser = subcommand.add_parser('threshold', help=': modify thermal threshold')
+    threshold_parser.add_argument("-l", dest='list', action='store_true', default=False,
+                                  help="list avaliable thermal")
+    threshold_parser.add_argument("-t", dest='thermal', type=str, metavar='THERMAL_NAME',
+                                  help="thermal name, ex: -t 'Temp sensor 1'")
+    threshold_parser.add_argument("-ht", dest='high_threshold', type=restricted_float,
+                                  metavar='THRESHOLD_VALUE',
+                                  help="high threshold: %.1f ~ %.1f" % (THRESHOLD_RANGE_LOW, THRESHOLD_RANGE_HIGH))
+    threshold_parser.add_argument("-hct", dest='high_crit_threshold', type=restricted_float,
+                                  metavar='THRESHOLD_VALUE',
+                                  help="high critical threshold : %.1f ~ %.1f" % (THRESHOLD_RANGE_LOW, THRESHOLD_RANGE_HIGH))
+    args = util_parser.parse_args()
 
-    if len(sys.argv)<2:
-        show_help()
-
-    options, args = getopt.getopt(sys.argv[1:], 'hdf', ['help',
-                                                       'debug',
-                                                       'force',
-                                                          ])
     if DEBUG == True:
-        print(options)
         print(args)
         print((len(sys.argv)))
 
-    for opt, arg in options:
-        if opt in ('-h', '--help'):
-            show_help()
-        elif opt in ('-d', '--debug'):
-            DEBUG = True
-            logging.basicConfig(level=logging.INFO)
-        elif opt in ('-f', '--force'):
-            FORCE = 1
-        else:
-            logging.info('no option')
-    for arg in args:
-        if arg == 'install':
-           do_install()
-        elif arg == 'clean':
-           do_uninstall()
-        else:
-            show_help()
+    DEBUG = args.debug
+    if DEBUG:
+        logging.basicConfig(level=logging.INFO)
+    FORCE = 1 if args.force else 0
 
+    if args.cmd == 'install':
+        do_install()
+    elif args.cmd == 'clean':
+        do_uninstall()
+    elif args.cmd == 'threshold':
+        do_threshold()
 
     return 0
 
@@ -365,5 +377,162 @@ def device_exist():
     ret2, log = log_os_system("ls "+i2c_prefix+"i2c-2", 0)
     return not(ret1 or ret2)
 
+THRESHOLD_RANGE_LOW = 30.0
+THRESHOLD_RANGE_HIGH = 110.0
+# Code to initialize chassis object
+init_chassis_code = \
+    "import sonic_platform.platform\n"\
+    "platform = sonic_platform.platform.Platform()\n"\
+    "chassis = platform.get_chassis()\n\n"
+
+# Looking for thermal
+looking_for_thermal_code = \
+    "thermal = None\n"\
+    "all_thermals = chassis.get_all_thermals()\n"\
+    "for psu in chassis.get_all_psus():\n"\
+    "    all_thermals += psu.get_all_thermals()\n"\
+    "for tmp in all_thermals:\n"\
+    "    if '{}' == tmp.get_name():\n"\
+    "        thermal = tmp\n"\
+    "        break\n"\
+    "if thermal == None:\n"\
+    "    print('{} not found!')\n"\
+    "    exit(1)\n\n"
+
+def avaliable_thermals():
+    global init_chassis_code
+
+    get_all_thermal_name_code = \
+        "thermal_list = []\n"\
+        "all_thermals = chassis.get_all_thermals()\n"\
+        "for psu in chassis.get_all_psus():\n"\
+        "    all_thermals += psu.get_all_thermals()\n"\
+        "for tmp in all_thermals:\n"\
+        "    thermal_list.append(tmp.get_name())\n"\
+        "print(str(thermal_list)[1:-1])\n"
+
+    all_code = "{}{}".format(init_chassis_code, get_all_thermal_name_code)
+
+    status, output = getstatusoutput_noshell(["docker", "exec", "pmon", "python3", "-c", all_code])
+    if status != 0:
+        return ""
+    return output
+
+def restricted_float(x):
+    global THRESHOLD_RANGE_LOW, THRESHOLD_RANGE_HIGH
+
+    try:
+        x = float(x)
+    except ValueError:
+        raise argparse.ArgumentTypeError("%r not a floating-point literal" % (x,))
+
+    if x < THRESHOLD_RANGE_LOW or x > THRESHOLD_RANGE_HIGH:
+        raise argparse.ArgumentTypeError("%r not in range [%.1f ~ %.1f]" % 
+                                         (x, THRESHOLD_RANGE_LOW, THRESHOLD_RANGE_HIGH))
+
+    return x
+
+def get_high_threshold(name):
+    global init_chassis_code, looking_for_thermal_code
+
+    get_high_threshold_code = \
+        "try:\n"\
+        "    print(thermal.get_high_threshold())\n"\
+        "    exit(0)\n"\
+        "except NotImplementedError:\n"\
+        "    print('Not implement the get_high_threshold method!')\n"\
+        "    exit(1)"
+
+    all_code = "{}{}{}".format(init_chassis_code, looking_for_thermal_code.format(name, name),
+                               get_high_threshold_code)
+
+    status, output = getstatusoutput_noshell(["docker", "exec", "pmon", "python3", "-c", all_code])
+    if status == 1:
+        return None
+
+    return float(output)
+
+def get_high_crit_threshold(name):
+    global init_chassis_code, looking_for_thermal_code
+
+    get_high_crit_threshold_code = \
+        "try:\n"\
+        "    print(thermal.get_high_critical_threshold())\n"\
+        "    exit(0)\n"\
+        "except NotImplementedError:\n"\
+        "    print('Not implement the get_high_critical_threshold method!')\n"\
+        "    exit(1)"
+
+    all_code = "{}{}{}".format(init_chassis_code, looking_for_thermal_code.format(name, name),
+                               get_high_crit_threshold_code)
+
+    status, output = getstatusoutput_noshell(["docker", "exec", "pmon", "python3", "-c", all_code])
+    if status == 1:
+        return None
+
+    return float(output)
+
+def do_threshold():
+    global args, init_chassis_code, looking_for_thermal_code
+
+    if args.list:
+        print("Thermals: " + avaliable_thermals())
+        return
+
+    if args.thermal is None:
+        print("The following arguments are required: -t")
+        return
+
+    set_threshold_code = ""
+    if args.high_threshold is not None:
+        if args.high_crit_threshold is not None and \
+            args.high_threshold >= args.high_crit_threshold:
+           print("Invalid Threshold!(High threshold can not be more than " \
+                 "or equal to high critical threshold.)")
+           exit(1)
+
+        high_crit = get_high_crit_threshold(args.thermal)
+        if high_crit is not None and \
+           args.high_threshold >= high_crit:
+           print("Invalid Threshold!(High threshold can not be more than " \
+                 "or equal to high critical threshold.)")
+           exit(1)
+
+        set_threshold_code += \
+            "try:\n"\
+            "    if thermal.set_high_threshold({}) is False:\n"\
+            "        print('{}: set_high_threshold failure!')\n"\
+            "        exit(1)\n"\
+            "except NotImplementedError:\n"\
+            "    print('Not implement the set_high_threshold method!')\n"\
+            "print('Apply the new high threshold successfully.')\n"\
+            "\n".format(args.high_threshold, args.thermal)
+
+    if args.high_crit_threshold is not None:
+        high = get_high_threshold(args.thermal)
+        if high is not None and \
+            args.high_crit_threshold <= high:
+            print("Invalid Threshold!(High critical threshold can not " \
+                  "be less than or equal to high threshold.)")
+            exit(1)
+
+        set_threshold_code += \
+            "try:\n"\
+            "    if thermal.set_high_critical_threshold({}) is False:\n"\
+            "        print('{}: set_high_critical_threshold failure!')\n"\
+            "        exit(1)\n"\
+            "except NotImplementedError:\n"\
+            "    print('Not implement the set_high_critical_threshold method!')\n"\
+            "print('Apply the new high critical threshold successfully.')\n"\
+            "\n".format(args.high_crit_threshold, args.thermal)
+
+    if set_threshold_code == "":
+        return
+
+    all_code = "{}{}{}".format(init_chassis_code, looking_for_thermal_code.format(args.thermal, args.thermal), set_threshold_code)
+
+    status, output = getstatusoutput_noshell(["docker", "exec", "pmon", "python3", "-c", all_code])
+    print(output)
+
 if __name__ == "__main__":
     main()

From f32c898e4689d831747c37a9a4a2aac63bf70313 Mon Sep 17 00:00:00 2001
From: roger530-ho <roger530_ho@edge-core.com>
Date: Thu, 13 Apr 2023 10:18:26 +0000
Subject: [PATCH 1071/1115] Fix incorrect variable

---
 .../as7726-32x/sonic_platform/thermal.py                        | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/thermal.py b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/thermal.py
index 1fbe0ae92..b5c0644a7 100644
--- a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/thermal.py
+++ b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/thermal.py
@@ -266,7 +266,7 @@ def get_maximum_recorded(self):
             A float number, the maximum recorded temperature of thermal in Celsius
             up to nearest thousandth of one degree Celsius, e.g. 30.125
         """
-        if self.min_temperature is None:
+        if self.max_temperature is None:
             self.get_temperature()
 
         return self.max_temperature

From 55006617c2b18073b30518dbd445c5714174ee9a Mon Sep 17 00:00:00 2001
From: jostar-yang <jostar_yang@edge-core.com>
Date: Tue, 2 May 2023 16:11:12 +0800
Subject: [PATCH 1072/1115] Support to show CPU all core temp

---
 .../pddf/pddf-device.json                     | 65 ++++++++++++++++++-
 1 file changed, 63 insertions(+), 2 deletions(-)

diff --git a/device/accton/x86_64-accton_as7726_32x-r0/pddf/pddf-device.json b/device/accton/x86_64-accton_as7726_32x-r0/pddf/pddf-device.json
index 5b2cabb74..54c372df1 100644
--- a/device/accton/x86_64-accton_as7726_32x-r0/pddf/pddf-device.json
+++ b/device/accton/x86_64-accton_as7726_32x-r0/pddf/pddf-device.json
@@ -5,7 +5,7 @@
 		"num_fantrays":6,
 		"num_fans_pertray":2,
 		"num_ports":32,
-		"num_temps":6,
+		"num_temps":10,
 		"pddf_dev_types":
 		{
 			"description":"AS7726 - Below is the list of supported PDDF device types (chip names) for various components. If any component uses some other driver, we will create the client using 'echo <dev-address> <dev-type> > <path>/new_device' method",
@@ -1876,7 +1876,7 @@
     "TEMP6" :
     {
         "dev_info": { "device_type":"TEMP_SENSOR", "device_name":"TEMP6"},
-        "dev_attr": { "display_name":"coretemp-isa-0000"},
+        "dev_attr": { "display_name":"CPU_Package_temp"},
         "i2c":
         {
             "path_info": {"sysfs_base_path": "/sys/class/hwmon/hwmon0"},
@@ -1888,6 +1888,67 @@
             ]
         }
     },
+
+    "TEMP7" :
+    {
+        "dev_info": { "device_type":"TEMP_SENSOR", "device_name":"TEMP7"},
+        "dev_attr": { "display_name":"CPU_Core_0_temp"},
+        "i2c":
+        {
+            "path_info": {"sysfs_base_path": "/sys/class/hwmon/hwmon0"},
+            "attr_list":
+            [
+                { "attr_name": "temp1_high_crit_threshold", "drv_attr_name":"temp2_crit"},
+                { "attr_name": "temp1_high_threshold", "drv_attr_name":"temp2_max"},
+                { "attr_name": "temp1_input", "drv_attr_name":"temp2_input"}
+            ]
+        }
+    },
+    "TEMP8" :
+    {
+        "dev_info": { "device_type":"TEMP_SENSOR", "device_name":"TEMP8"},
+        "dev_attr": { "display_name":"CPU_Core_1_temp"},
+        "i2c":
+        {
+            "path_info": {"sysfs_base_path": "/sys/class/hwmon/hwmon0"},
+            "attr_list":
+            [
+                { "attr_name": "temp1_high_crit_threshold", "drv_attr_name":"temp3_crit"},
+                { "attr_name": "temp1_high_threshold", "drv_attr_name":"temp3_max"},
+                { "attr_name": "temp1_input", "drv_attr_name":"temp3_input"}
+            ]
+        }
+    },
+    "TEMP9" :
+    {
+        "dev_info": { "device_type":"TEMP_SENSOR", "device_name":"TEMP9"},
+        "dev_attr": { "display_name":"CPU_Core_2_temp"},
+        "i2c":
+        {
+            "path_info": {"sysfs_base_path": "/sys/class/hwmon/hwmon0"},
+            "attr_list":
+            [
+                { "attr_name": "temp1_high_crit_threshold", "drv_attr_name":"temp4_crit"},
+                { "attr_name": "temp1_high_threshold", "drv_attr_name":"temp4_max"},
+                { "attr_name": "temp1_input", "drv_attr_name":"temp4_input"}
+            ]
+        }
+    },
+    "TEMP10" :
+    {
+        "dev_info": { "device_type":"TEMP_SENSOR", "device_name":"TEMP10"},
+        "dev_attr": { "display_name":"CPU_Core_3_temp"},
+        "i2c":
+        {
+            "path_info": {"sysfs_base_path": "/sys/class/hwmon/hwmon0"},
+            "attr_list":
+            [
+                { "attr_name": "temp1_high_crit_threshold", "drv_attr_name":"temp5_crit"},
+                { "attr_name": "temp1_high_threshold", "drv_attr_name":"temp5_max"},
+                { "attr_name": "temp1_input", "drv_attr_name":"temp5_input"}
+            ]
+        }
+    },
 	"SYSSTATUS":
 	{
 		"dev_info":{ "device_type":"SYSSTAT", "device_name":"SYSSTATUS"},

From 2f01a086d843ba83ce25db629a182445054f859d Mon Sep 17 00:00:00 2001
From: roger530-ho <roger530_ho@edge-core.com>
Date: Tue, 20 Jun 2023 01:13:33 +0000
Subject: [PATCH 1073/1115] Add CPU all core temp

---
 .../x86_64-accton_as7726_32x-r0/platform.json | 34 ++++++++++++++++++-
 .../as7726-32x/sonic_platform/thermal.py      | 26 +++++++++++++-
 2 files changed, 58 insertions(+), 2 deletions(-)

diff --git a/device/accton/x86_64-accton_as7726_32x-r0/platform.json b/device/accton/x86_64-accton_as7726_32x-r0/platform.json
index 3ca60cf1c..a0e25f83a 100644
--- a/device/accton/x86_64-accton_as7726_32x-r0/platform.json
+++ b/device/accton/x86_64-accton_as7726_32x-r0/platform.json
@@ -406,7 +406,39 @@
                 "high-crit-threshold": false
             },
             {
-                "name": "coretemp-isa-0000",
+                "name": "CPU_Package_temp",
+                "controllable": false,
+                "low-threshold": false,
+                "high-threshold": true,
+                "low-crit-threshold": false,
+                "high-crit-threshold": true
+            },
+            {
+                "name": "CPU_Core_0_temp",
+                "controllable": false,
+                "low-threshold": false,
+                "high-threshold": true,
+                "low-crit-threshold": false,
+                "high-crit-threshold": true
+            },
+            {
+                "name": "CPU_Core_1_temp",
+                "controllable": false,
+                "low-threshold": false,
+                "high-threshold": true,
+                "low-crit-threshold": false,
+                "high-crit-threshold": true
+            },
+            {
+                "name": "CPU_Core_2_temp",
+                "controllable": false,
+                "low-threshold": false,
+                "high-threshold": true,
+                "low-crit-threshold": false,
+                "high-crit-threshold": true
+            },
+            {
+                "name": "CPU_Core_3_temp",
                 "controllable": false,
                 "low-threshold": false,
                 "high-threshold": true,
diff --git a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/thermal.py b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/thermal.py
index b5c0644a7..6bf478bbd 100644
--- a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/thermal.py
+++ b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/thermal.py
@@ -44,7 +44,31 @@
         HIGH_CRIT_THRESHOLD : NOT_AVAILABLE,
         LOW_CRIT_THRESHOLD : NOT_AVAILABLE
     },
-    'coretemp-isa-0000' : {
+    'CPU_Package_temp' : {
+        HIGH_THRESHOLD : '82.0',
+        LOW_THRESHOLD : NOT_AVAILABLE,
+        HIGH_CRIT_THRESHOLD : '104.0',
+        LOW_CRIT_THRESHOLD : NOT_AVAILABLE
+    },
+    'CPU_Core_0_temp' : {
+        HIGH_THRESHOLD : '82.0',
+        LOW_THRESHOLD : NOT_AVAILABLE,
+        HIGH_CRIT_THRESHOLD : '104.0',
+        LOW_CRIT_THRESHOLD : NOT_AVAILABLE
+    },
+    'CPU_Core_1_temp' : {
+        HIGH_THRESHOLD : '82.0',
+        LOW_THRESHOLD : NOT_AVAILABLE,
+        HIGH_CRIT_THRESHOLD : '104.0',
+        LOW_CRIT_THRESHOLD : NOT_AVAILABLE
+    },
+    'CPU_Core_2_temp' : {
+        HIGH_THRESHOLD : '82.0',
+        LOW_THRESHOLD : NOT_AVAILABLE,
+        HIGH_CRIT_THRESHOLD : '104.0',
+        LOW_CRIT_THRESHOLD : NOT_AVAILABLE
+    },
+    'CPU_Core_3_temp' : {
         HIGH_THRESHOLD : '82.0',
         LOW_THRESHOLD : NOT_AVAILABLE,
         HIGH_CRIT_THRESHOLD : '104.0',

From c930eeca43cb0cf9fe82ce3422cb386dad39220e Mon Sep 17 00:00:00 2001
From: roger530-ho <roger530_ho@edge-core.com>
Date: Tue, 15 Aug 2023 02:05:02 +0000
Subject: [PATCH 1074/1115] [Edgecore][AS7726-32X] Read the data when the PSU
 is in the power-good state.

---
 .../as7726-32x/sonic_platform/psu.py          | 65 +++++++++++++++++++
 1 file changed, 65 insertions(+)

diff --git a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/psu.py b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/psu.py
index 18b3ab0d8..a349319d4 100644
--- a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/psu.py
+++ b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/psu.py
@@ -63,3 +63,68 @@ def get_revision(self):
             string: Revision value of device
         """
         return 'N/A'
+
+    def get_model(self):
+        """
+        Retrieves the model number (or part number) of the device
+
+        Returns:
+            string: Model/part number of device
+        """
+        model = super().get_model()
+        if model and model.strip() == "":
+            return None
+
+        return model
+
+    def get_serial(self):
+        """
+        Retrieves the serial number of the device
+
+        Returns:
+            string: Serial number of device
+        """
+        serial = super().get_serial()
+        if serial and serial.strip() == "":
+            return None
+
+        return serial
+
+    def get_voltage(self):
+        """
+        Retrieves current PSU voltage output
+
+        Returns:
+            A float number, the output voltage in volts,
+            e.g. 12.1
+        """
+        if self.get_status() is not True:
+            return 0.0
+
+        return super().get_voltage()
+
+    def get_current(self):
+        """
+        Retrieves present electric current supplied by PSU
+
+        Returns:
+            A float number, electric current in amperes,
+            e.g. 15.4
+        """
+        if self.get_status() is not True:
+            return 0.0
+
+        return super().get_current()
+
+    def get_power(self):
+        """
+        Retrieves current energy supplied by PSU
+
+        Returns:
+            A float number, the power in watts,
+            e.g. 302.6
+        """
+        if self.get_status() is not True:
+            return 0.0
+
+        return super().get_power()

From d9071729f4e66b2b0d59c11e47f5421a3c55f176 Mon Sep 17 00:00:00 2001
From: jostar-yang <jostar_yang@edge-core.com>
Date: Thu, 28 Sep 2023 15:00:59 +0800
Subject: [PATCH 1075/1115] Fix port33,34 to use optoe2 for sfp

---
 .../x86_64-accton_as7726_32x-r0/pddf/pddf-device.json       | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/device/accton/x86_64-accton_as7726_32x-r0/pddf/pddf-device.json b/device/accton/x86_64-accton_as7726_32x-r0/pddf/pddf-device.json
index 54c372df1..5d395d638 100644
--- a/device/accton/x86_64-accton_as7726_32x-r0/pddf/pddf-device.json
+++ b/device/accton/x86_64-accton_as7726_32x-r0/pddf/pddf-device.json
@@ -4,7 +4,7 @@
 		"num_psus":2,
 		"num_fantrays":6,
 		"num_fans_pertray":2,
-		"num_ports":32,
+		"num_ports":34,
 		"num_temps":10,
 		"pddf_dev_types":
 		{
@@ -1545,7 +1545,7 @@
         "dev_info": { "device_type":"", "device_name":"PORT33-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT33"},
         "i2c":
         {
-            "topo_info": { "parent_bus":"0xf", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "topo_info": { "parent_bus":"0xf", "dev_addr":"0x50", "dev_type":"optoe2"},
             "attr_list":
             [
                 { "attr_name":"eeprom"}
@@ -1584,7 +1584,7 @@
         "dev_info": { "device_type":"", "device_name":"PORT34-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT34"},
         "i2c":
         {
-            "topo_info": { "parent_bus":"0x10", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "topo_info": { "parent_bus":"0x10", "dev_addr":"0x50", "dev_type":"optoe2"},
             "attr_list":
             [
                 { "attr_name":"eeprom"}

From 6d30ed107a8eb6bb838662cb94ac4a0eb1330e74 Mon Sep 17 00:00:00 2001
From: jostar-yang <jostar_yang@accton.com>
Date: Wed, 4 Sep 2024 11:13:44 +0800
Subject: [PATCH 1076/1115] Add reset() in sfp.py for check sfp_port to avoid
 fail

---
 .../as7726-32x/sonic_platform/sfp.py                  | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/sfp.py b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/sfp.py
index a0189bfcb..eb12ed5ef 100644
--- a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/sfp.py
+++ b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/sonic_platform/sfp.py
@@ -51,6 +51,17 @@ def get_name(self):
 
         return name
 
+    def get_reset_status(self):
+        if self.sfp_type == "QSFP28":
+            return super().get_reset_status()
+        return False
+
+
+    def reset(self):
+        if self.sfp_type == "QSFP28":
+            return super().reset()
+        else:
+            return False    
     def __validate_eeprom_sfp(self):
         checksum_test = 0
         eeprom_raw = self.read_eeprom(0, 96)

From 42d39800f0a45e7124a6c1006a5c6f20983af521 Mon Sep 17 00:00:00 2001
From: Brandon Chuang <brandon_chuang@edge-core.com>
Date: Wed, 11 May 2022 14:32:04 +0800
Subject: [PATCH 1077/1115] [platform] Fix system-health.service start failed

Add system-health.service into service dependency to prevent from
system-health.service start failed due to sonic_platform not installed.

Signed-off-by: Brandon Chuang <brandon_chuang@edge-core.com>
---
 .../as4630-54pe/service/as4630-54pe-platform-monitor.service    | 2 +-
 .../as4630-54te/service/as4630-54te-platform-monitor.service    | 2 +-
 .../as5712-54x/service/as5712-platform-monitor.service          | 2 +-
 .../as5812-54t/service/as5812-platform-init.service             | 2 +-
 .../as5812-54x/service/as5812-platform-monitor.service          | 2 +-
 .../as5835-54t/service/as5835-54t-platform-monitor.service      | 2 +-
 .../as5835-54x/service/as5835-54x-platform-monitor.service      | 2 +-
 .../as6712-32x/service/as6712-platform-init.service             | 2 +-
 .../as7312-54x/service/as7312-platform-monitor.service          | 2 +-
 .../as7312-54xs/service/as7312-platform-monitor.service         | 2 +-
 .../as7315-27xb/service/as7315-platform-init.service            | 2 +-
 .../as7326-56x/service/as7326-56x-pddf-platform-monitor.service | 2 +-
 .../as7326-56x/service/as7326-platform-monitor.service          | 2 +-
 .../as7712-32x/service/as7712-pddf-platform-monitor.service     | 2 +-
 .../as7712-32x/service/as7712-platform-init.service             | 2 +-
 .../as7716-32x/service/as7716-platform-monitor.service          | 2 +-
 .../as7716-32xb/service/as7716_32xb-platform-monitor.service    | 2 +-
 .../as7726-32x/service/as7726-32x-pddf-platform-monitor.service | 2 +-
 .../as7726-32x/service/as7726-32x-platform-monitor.service      | 2 +-
 .../as7816-64x/service/as7816-64x-platform-monitor.service      | 2 +-
 .../as7816-64x/service/as7816-pddf-platform-monitor.service     | 2 +-
 .../as9716-32d/service/as9716-32d-pddf-platform-monitor.service | 2 +-
 .../as9716-32d/service/as9716-32d-platform-monitor.service      | 2 +-
 .../as9726-32d/service/as9726-32d-platform-monitor.service      | 2 +-
 .../minipack/service/minipack-platform-init.service             | 2 +-
 25 files changed, 25 insertions(+), 25 deletions(-)

diff --git a/platform/broadcom/sonic-platform-modules-accton/as4630-54pe/service/as4630-54pe-platform-monitor.service b/platform/broadcom/sonic-platform-modules-accton/as4630-54pe/service/as4630-54pe-platform-monitor.service
index 8ed60fca9..af3708518 100644
--- a/platform/broadcom/sonic-platform-modules-accton/as4630-54pe/service/as4630-54pe-platform-monitor.service
+++ b/platform/broadcom/sonic-platform-modules-accton/as4630-54pe/service/as4630-54pe-platform-monitor.service
@@ -1,6 +1,6 @@
 [Unit]
 Description=Accton AS4630-54PE Platform Monitoring service
-Before=pmon.service
+Before=pmon.service system-health.service
 After=sysinit.target
 DefaultDependencies=no
 
diff --git a/platform/broadcom/sonic-platform-modules-accton/as4630-54te/service/as4630-54te-platform-monitor.service b/platform/broadcom/sonic-platform-modules-accton/as4630-54te/service/as4630-54te-platform-monitor.service
index 587e6a1ca..b0c5fe6a7 100644
--- a/platform/broadcom/sonic-platform-modules-accton/as4630-54te/service/as4630-54te-platform-monitor.service
+++ b/platform/broadcom/sonic-platform-modules-accton/as4630-54te/service/as4630-54te-platform-monitor.service
@@ -1,6 +1,6 @@
 [Unit]
 Description=Accton AS4630-54TE Platform Monitoring service
-Before=pmon.service
+Before=pmon.service system-health.service
 After=sysinit.target
 DefaultDependencies=no
 
diff --git a/platform/broadcom/sonic-platform-modules-accton/as5712-54x/service/as5712-platform-monitor.service b/platform/broadcom/sonic-platform-modules-accton/as5712-54x/service/as5712-platform-monitor.service
index da5d283a6..d96842b9d 100755
--- a/platform/broadcom/sonic-platform-modules-accton/as5712-54x/service/as5712-platform-monitor.service
+++ b/platform/broadcom/sonic-platform-modules-accton/as5712-54x/service/as5712-platform-monitor.service
@@ -1,6 +1,6 @@
 [Unit]
 Description=Accton AS5712-54X Platform Monitoring service
-Before=pmon.service
+Before=pmon.service system-health.service
 After=sysinit.target
 DefaultDependencies=no
 
diff --git a/platform/broadcom/sonic-platform-modules-accton/as5812-54t/service/as5812-platform-init.service b/platform/broadcom/sonic-platform-modules-accton/as5812-54t/service/as5812-platform-init.service
index 91c9adb01..34bfe092d 100755
--- a/platform/broadcom/sonic-platform-modules-accton/as5812-54t/service/as5812-platform-init.service
+++ b/platform/broadcom/sonic-platform-modules-accton/as5812-54t/service/as5812-platform-init.service
@@ -1,6 +1,6 @@
 [Unit]
 Description=Accton AS5812-54X Platform Monitoring service
-Before=pmon.service
+Before=pmon.service system-health.service
 After=sysinit.target
 DefaultDependencies=no
 
diff --git a/platform/broadcom/sonic-platform-modules-accton/as5812-54x/service/as5812-platform-monitor.service b/platform/broadcom/sonic-platform-modules-accton/as5812-54x/service/as5812-platform-monitor.service
index 91c9adb01..34bfe092d 100755
--- a/platform/broadcom/sonic-platform-modules-accton/as5812-54x/service/as5812-platform-monitor.service
+++ b/platform/broadcom/sonic-platform-modules-accton/as5812-54x/service/as5812-platform-monitor.service
@@ -1,6 +1,6 @@
 [Unit]
 Description=Accton AS5812-54X Platform Monitoring service
-Before=pmon.service
+Before=pmon.service system-health.service
 After=sysinit.target
 DefaultDependencies=no
 
diff --git a/platform/broadcom/sonic-platform-modules-accton/as5835-54t/service/as5835-54t-platform-monitor.service b/platform/broadcom/sonic-platform-modules-accton/as5835-54t/service/as5835-54t-platform-monitor.service
index 978920103..cba9bcf05 100644
--- a/platform/broadcom/sonic-platform-modules-accton/as5835-54t/service/as5835-54t-platform-monitor.service
+++ b/platform/broadcom/sonic-platform-modules-accton/as5835-54t/service/as5835-54t-platform-monitor.service
@@ -1,6 +1,6 @@
 [Unit]
 Description=Accton AS5835-54T Platform Monitoring service
-Before=pmon.service
+Before=pmon.service system-health.service
 After=sysinit.target
 DefaultDependencies=no
 
diff --git a/platform/broadcom/sonic-platform-modules-accton/as5835-54x/service/as5835-54x-platform-monitor.service b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/service/as5835-54x-platform-monitor.service
index d522a0ca5..5e0805a59 100644
--- a/platform/broadcom/sonic-platform-modules-accton/as5835-54x/service/as5835-54x-platform-monitor.service
+++ b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/service/as5835-54x-platform-monitor.service
@@ -1,6 +1,6 @@
 [Unit]
 Description=Accton AS5835-54X Platform Monitoring service
-Before=pmon.service
+Before=pmon.service system-health.service
 After=sysinit.target
 DefaultDependencies=no
 
diff --git a/platform/broadcom/sonic-platform-modules-accton/as6712-32x/service/as6712-platform-init.service b/platform/broadcom/sonic-platform-modules-accton/as6712-32x/service/as6712-platform-init.service
index ffdd6e1ce..b256b06c1 100644
--- a/platform/broadcom/sonic-platform-modules-accton/as6712-32x/service/as6712-platform-init.service
+++ b/platform/broadcom/sonic-platform-modules-accton/as6712-32x/service/as6712-platform-init.service
@@ -1,6 +1,6 @@
 [Unit]
 Description=Accton AS6712-32X Platform Monitoring service
-Before=pmon.service
+Before=pmon.service system-health.service
 After=sysinit.target
 DefaultDependencies=no
 
diff --git a/platform/broadcom/sonic-platform-modules-accton/as7312-54x/service/as7312-platform-monitor.service b/platform/broadcom/sonic-platform-modules-accton/as7312-54x/service/as7312-platform-monitor.service
index b79357665..94ac9a98b 100755
--- a/platform/broadcom/sonic-platform-modules-accton/as7312-54x/service/as7312-platform-monitor.service
+++ b/platform/broadcom/sonic-platform-modules-accton/as7312-54x/service/as7312-platform-monitor.service
@@ -1,6 +1,6 @@
 [Unit]
 Description=Accton AS7312-54X Platform Monitoring service
-Before=pmon.service
+Before=pmon.service system-health.service
 After=sysinit.target
 DefaultDependencies=no
 
diff --git a/platform/broadcom/sonic-platform-modules-accton/as7312-54xs/service/as7312-platform-monitor.service b/platform/broadcom/sonic-platform-modules-accton/as7312-54xs/service/as7312-platform-monitor.service
index b79357665..94ac9a98b 100755
--- a/platform/broadcom/sonic-platform-modules-accton/as7312-54xs/service/as7312-platform-monitor.service
+++ b/platform/broadcom/sonic-platform-modules-accton/as7312-54xs/service/as7312-platform-monitor.service
@@ -1,6 +1,6 @@
 [Unit]
 Description=Accton AS7312-54X Platform Monitoring service
-Before=pmon.service
+Before=pmon.service system-health.service
 After=sysinit.target
 DefaultDependencies=no
 
diff --git a/platform/broadcom/sonic-platform-modules-accton/as7315-27xb/service/as7315-platform-init.service b/platform/broadcom/sonic-platform-modules-accton/as7315-27xb/service/as7315-platform-init.service
index cdaf43716..d06f636a1 100755
--- a/platform/broadcom/sonic-platform-modules-accton/as7315-27xb/service/as7315-platform-init.service
+++ b/platform/broadcom/sonic-platform-modules-accton/as7315-27xb/service/as7315-platform-init.service
@@ -1,6 +1,6 @@
 [Unit]
 Description=Accton AS7315-27XB Platform initialization service
-Before=pmon.service
+Before=pmon.service system-health.service
 After=sysinit.target
 DefaultDependencies=no
 
diff --git a/platform/broadcom/sonic-platform-modules-accton/as7326-56x/service/as7326-56x-pddf-platform-monitor.service b/platform/broadcom/sonic-platform-modules-accton/as7326-56x/service/as7326-56x-pddf-platform-monitor.service
index 03351824b..49236706d 100644
--- a/platform/broadcom/sonic-platform-modules-accton/as7326-56x/service/as7326-56x-pddf-platform-monitor.service
+++ b/platform/broadcom/sonic-platform-modules-accton/as7326-56x/service/as7326-56x-pddf-platform-monitor.service
@@ -1,6 +1,6 @@
 [Unit]
 Description=Accton AS7326-56X Platform Monitoring service
-Before=pmon.service
+Before=pmon.service system-health.service
 After=pddf-platform-init.service
 DefaultDependencies=no
 
diff --git a/platform/broadcom/sonic-platform-modules-accton/as7326-56x/service/as7326-platform-monitor.service b/platform/broadcom/sonic-platform-modules-accton/as7326-56x/service/as7326-platform-monitor.service
index 9da837047..51da61e5d 100644
--- a/platform/broadcom/sonic-platform-modules-accton/as7326-56x/service/as7326-platform-monitor.service
+++ b/platform/broadcom/sonic-platform-modules-accton/as7326-56x/service/as7326-platform-monitor.service
@@ -1,6 +1,6 @@
 [Unit]
 Description=Accton AS7326-56X Platform Monitoring service
-Before=pmon.service
+Before=pmon.service system-health.service
 After=as7326-platform-handle_mac.service
 DefaultDependencies=no
 
diff --git a/platform/broadcom/sonic-platform-modules-accton/as7712-32x/service/as7712-pddf-platform-monitor.service b/platform/broadcom/sonic-platform-modules-accton/as7712-32x/service/as7712-pddf-platform-monitor.service
index d0bd9940a..737c751ab 100644
--- a/platform/broadcom/sonic-platform-modules-accton/as7712-32x/service/as7712-pddf-platform-monitor.service
+++ b/platform/broadcom/sonic-platform-modules-accton/as7712-32x/service/as7712-pddf-platform-monitor.service
@@ -1,6 +1,6 @@
 [Unit]
 Description=Accton AS7712 Platform Monitoring service
-Before=pmon.service
+Before=pmon.service system-health.service
 After=pddf-platform-init.service
 DefaultDependencies=no
 
diff --git a/platform/broadcom/sonic-platform-modules-accton/as7712-32x/service/as7712-platform-init.service b/platform/broadcom/sonic-platform-modules-accton/as7712-32x/service/as7712-platform-init.service
index d5d25b6cd..4d008e868 100755
--- a/platform/broadcom/sonic-platform-modules-accton/as7712-32x/service/as7712-platform-init.service
+++ b/platform/broadcom/sonic-platform-modules-accton/as7712-32x/service/as7712-platform-init.service
@@ -1,6 +1,6 @@
 [Unit]
 Description=Accton AS7712-32X Platform initialization service
-Before=pmon.service
+Before=pmon.service system-health.service
 DefaultDependencies=no
 
 [Service]
diff --git a/platform/broadcom/sonic-platform-modules-accton/as7716-32x/service/as7716-platform-monitor.service b/platform/broadcom/sonic-platform-modules-accton/as7716-32x/service/as7716-platform-monitor.service
index b1428d784..c01d1f90f 100755
--- a/platform/broadcom/sonic-platform-modules-accton/as7716-32x/service/as7716-platform-monitor.service
+++ b/platform/broadcom/sonic-platform-modules-accton/as7716-32x/service/as7716-platform-monitor.service
@@ -1,6 +1,6 @@
 [Unit]
 Description=Accton AS7716-32X Platform Monitoring service
-Before=pmon.service
+Before=pmon.service system-health.service
 After=sysinit.target
 DefaultDependencies=no
 
diff --git a/platform/broadcom/sonic-platform-modules-accton/as7716-32xb/service/as7716_32xb-platform-monitor.service b/platform/broadcom/sonic-platform-modules-accton/as7716-32xb/service/as7716_32xb-platform-monitor.service
index 05a5d93c4..da5fac3a1 100755
--- a/platform/broadcom/sonic-platform-modules-accton/as7716-32xb/service/as7716_32xb-platform-monitor.service
+++ b/platform/broadcom/sonic-platform-modules-accton/as7716-32xb/service/as7716_32xb-platform-monitor.service
@@ -1,6 +1,6 @@
 [Unit]
 Description=Accton AS7716-32XB Platform Monitoring service
-Before=pmon.service
+Before=pmon.service system-health.service
 After=sysinit.target
 DefaultDependencies=no
 
diff --git a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/service/as7726-32x-pddf-platform-monitor.service b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/service/as7726-32x-pddf-platform-monitor.service
index a4aa84251..127e775be 100644
--- a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/service/as7726-32x-pddf-platform-monitor.service
+++ b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/service/as7726-32x-pddf-platform-monitor.service
@@ -1,6 +1,6 @@
 [Unit]
 Description=Accton AS7726-32X Platform Monitoring service
-Before=pmon.service
+Before=pmon.service system-health.service
 After=pddf-platform-init.service
 DefaultDependencies=no
 
diff --git a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/service/as7726-32x-platform-monitor.service b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/service/as7726-32x-platform-monitor.service
index 5b04ad410..2cdb614d6 100644
--- a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/service/as7726-32x-platform-monitor.service
+++ b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/service/as7726-32x-platform-monitor.service
@@ -1,6 +1,6 @@
 [Unit]
 Description=Accton AS7726-32X Platform Monitoring service
-Before=pmon.service
+Before=pmon.service system-health.service
 After=as7726-32x-platform-handle_mac.service
 DefaultDependencies=no
 
diff --git a/platform/broadcom/sonic-platform-modules-accton/as7816-64x/service/as7816-64x-platform-monitor.service b/platform/broadcom/sonic-platform-modules-accton/as7816-64x/service/as7816-64x-platform-monitor.service
index f361642e6..e9005d147 100644
--- a/platform/broadcom/sonic-platform-modules-accton/as7816-64x/service/as7816-64x-platform-monitor.service
+++ b/platform/broadcom/sonic-platform-modules-accton/as7816-64x/service/as7816-64x-platform-monitor.service
@@ -1,6 +1,6 @@
 [Unit]
 Description=Accton AS7816-64X Platform Monitoring service
-Before=pmon.service
+Before=pmon.service system-health.service
 After=as7816-64x-platform-init.service
 Requires=as7816-64x-platform-init.service
 DefaultDependencies=no
diff --git a/platform/broadcom/sonic-platform-modules-accton/as7816-64x/service/as7816-pddf-platform-monitor.service b/platform/broadcom/sonic-platform-modules-accton/as7816-64x/service/as7816-pddf-platform-monitor.service
index 7b6db7dda..825a76fde 100644
--- a/platform/broadcom/sonic-platform-modules-accton/as7816-64x/service/as7816-pddf-platform-monitor.service
+++ b/platform/broadcom/sonic-platform-modules-accton/as7816-64x/service/as7816-pddf-platform-monitor.service
@@ -1,6 +1,6 @@
 [Unit]
 Description=Accton AS7816-64X Platform Monitoring service
-Before=pmon.service
+Before=pmon.service system-health.service
 After=pddf-platform-init.service
 DefaultDependencies=no
 
diff --git a/platform/broadcom/sonic-platform-modules-accton/as9716-32d/service/as9716-32d-pddf-platform-monitor.service b/platform/broadcom/sonic-platform-modules-accton/as9716-32d/service/as9716-32d-pddf-platform-monitor.service
index 24e7fee81..5754e252c 100644
--- a/platform/broadcom/sonic-platform-modules-accton/as9716-32d/service/as9716-32d-pddf-platform-monitor.service
+++ b/platform/broadcom/sonic-platform-modules-accton/as9716-32d/service/as9716-32d-pddf-platform-monitor.service
@@ -1,6 +1,6 @@
 [Unit]
 Description=Accton AS9716-32D Platform Monitoring service
-Before=pmon.service
+Before=pmon.service system-health.service
 After=pddf-platform-init.service
 DefaultDependencies=no
 
diff --git a/platform/broadcom/sonic-platform-modules-accton/as9716-32d/service/as9716-32d-platform-monitor.service b/platform/broadcom/sonic-platform-modules-accton/as9716-32d/service/as9716-32d-platform-monitor.service
index 1d77c3912..fd12cc007 100644
--- a/platform/broadcom/sonic-platform-modules-accton/as9716-32d/service/as9716-32d-platform-monitor.service
+++ b/platform/broadcom/sonic-platform-modules-accton/as9716-32d/service/as9716-32d-platform-monitor.service
@@ -1,6 +1,6 @@
 [Unit]
 Description=Accton AS9716-32D Platform Monitoring service
-Before=pmon.service
+Before=pmon.service system-health.service
 After=sysinit.target
 DefaultDependencies=no
 
diff --git a/platform/broadcom/sonic-platform-modules-accton/as9726-32d/service/as9726-32d-platform-monitor.service b/platform/broadcom/sonic-platform-modules-accton/as9726-32d/service/as9726-32d-platform-monitor.service
index 072a8227e..669555840 100644
--- a/platform/broadcom/sonic-platform-modules-accton/as9726-32d/service/as9726-32d-platform-monitor.service
+++ b/platform/broadcom/sonic-platform-modules-accton/as9726-32d/service/as9726-32d-platform-monitor.service
@@ -1,6 +1,6 @@
 [Unit]
 Description=Accton AS9726_32D Platform Monitoring service
-Before=pmon.service
+Before=pmon.service system-health.service
 After=sysinit.target
 DefaultDependencies=no
 
diff --git a/platform/broadcom/sonic-platform-modules-accton/minipack/service/minipack-platform-init.service b/platform/broadcom/sonic-platform-modules-accton/minipack/service/minipack-platform-init.service
index 4a0f803b2..a56e0214c 100644
--- a/platform/broadcom/sonic-platform-modules-accton/minipack/service/minipack-platform-init.service
+++ b/platform/broadcom/sonic-platform-modules-accton/minipack/service/minipack-platform-init.service
@@ -1,6 +1,6 @@
 [Unit]
 Description=Accton MiniPack Platform Monitoring service
-Before=pmon.service
+Before=pmon.service system-health.service
 After=sysinit.target
 DefaultDependencies=no
 

From a7b9b5fe9c77d4b84b568dd8436fb97b7160e51b Mon Sep 17 00:00:00 2001
From: Brandon Chuang <brandon_chuang@edge-core.com>
Date: Wed, 27 Jul 2022 17:40:37 +0800
Subject: [PATCH 1078/1115] [Edgecore][as4630_54te/as5835_54x] Fix wrong "show
 platform fan" status

as4630_54te:
  1. Fix wrong fan direction
  2. Fix wrong get_status_led()
  3. Fix wrong get_status() when psu power good failed

as5835_54x:
  1. Fix wrong get_status_led()
  2. Fix wrong get_status() when psu power good failed
  3. Fix wrong sysfs path of rear fan

Signed-off-by: Brandon Chuang <brandon_chuang@edge-core.com>
---
 .../sonic_platform/fan.py                     | 45 +++++++---------
 .../sonic_platform/fan_drawer.py              | 24 ++++++++-
 .../sonic_platform/fan.py                     | 53 ++++++++++---------
 .../sonic_platform/fan_drawer.py              | 32 ++++++++++-
 4 files changed, 100 insertions(+), 54 deletions(-)

diff --git a/device/accton/x86_64-accton_as4630_54te-r0/sonic_platform/fan.py b/device/accton/x86_64-accton_as4630_54te-r0/sonic_platform/fan.py
index 8f4893124..e14550355 100644
--- a/device/accton/x86_64-accton_as4630_54te-r0/sonic_platform/fan.py
+++ b/device/accton/x86_64-accton_as4630_54te-r0/sonic_platform/fan.py
@@ -38,10 +38,6 @@
     },
 }
 
-
-FAN_NAME_LIST = ["FAN-1F", "FAN-1R", "FAN-2F", "FAN-2R",
-                 "FAN-3F", "FAN-3R"]
-
 class Fan(FanBase):
     """Platform-specific Fan class"""
 
@@ -63,7 +59,7 @@ def __init__(self, fan_tray_index, fan_index=0, is_psu_fan=False, psu_index=0):
             self.psu_cpld_path = I2C_PATH.format(
                 self.psu_i2c_num, self.psu_i2c_addr)
 
-        FanBase.__init__(self)  
+        FanBase.__init__(self)
 
 
     def get_direction(self):
@@ -73,16 +69,14 @@ def get_direction(self):
             A string, either FAN_DIRECTION_INTAKE or FAN_DIRECTION_EXHAUST
             depending on fan direction
         """
-
-
         if not self.is_psu_fan:
             dir_str = "{}{}{}".format(CPLD_FAN_I2C_PATH, 'direction_', self.fan_tray_index+1)
             val=self._api_helper.read_txt_file(dir_str)
             if val is not None:
                 if int(val, 10)==0:#F2B
-                    direction=self.FAN_DIRECTION_EXHAUST
-                else:
                     direction=self.FAN_DIRECTION_INTAKE
+                else:
+                    direction=self.FAN_DIRECTION_EXHAUST
             else:
                 direction=self.FAN_DIRECTION_EXHAUST
 
@@ -105,7 +99,7 @@ def get_speed(self):
         Returns:
             An integer, the percentage of full fan speed, in the range 0 (off)
                  to 100 (full speed)
-                         
+
         """
         speed = 0
         if self.is_psu_fan:
@@ -117,7 +111,7 @@ def get_speed(self):
                     speed=100
             else:
                 return 0
-        elif self.get_presence():            
+        elif self.get_presence():
             speed_path = "{}{}".format(CPLD_FAN_I2C_PATH, 'duty_cycle_percentage')
             speed=self._api_helper.read_txt_file(speed_path)
             if speed is None:
@@ -156,7 +150,7 @@ def set_speed(self, speed):
             A boolean, True if speed is set successfully, False if not
         """
 
-        if not self.is_psu_fan and self.get_presence():            
+        if not self.is_psu_fan and self.get_presence():
             speed_path = "{}{}".format(CPLD_FAN_I2C_PATH, 'duty_cycle_percentage')
             return self._api_helper.write_txt_file(speed_path, int(speed))
 
@@ -179,14 +173,13 @@ def get_status_led(self):
         Returns:
             A string, one of the predefined STATUS_LED_COLOR_* strings above
         """
-        status=self.get_presence()
-        if status is None:
-            return  self.STATUS_LED_COLOR_OFF
+        if self.is_psu_fan:
+            return None
 
         return {
-            1: self.STATUS_LED_COLOR_GREEN,
-            0: self.STATUS_LED_COLOR_RED
-        }.get(status, self.STATUS_LED_COLOR_OFF)
+            True: self.STATUS_LED_COLOR_GREEN,
+            False: self.STATUS_LED_COLOR_OFF
+        }.get(self.get_status(), self.STATUS_LED_COLOR_OFF)
 
     def get_name(self):
         """
@@ -194,11 +187,10 @@ def get_name(self):
             Returns:
             string: The name of the device
         """
-        fan_name = FAN_NAME_LIST[self.fan_tray_index*2 + self.fan_index] \
-            if not self.is_psu_fan \
-            else "PSU-{} FAN-{}".format(self.psu_index+1, self.fan_index+1)
+        if self.is_psu_fan:
+            return "PSU-{} FAN-{}".format(self.psu_index+1, self.fan_index+1)
 
-        return fan_name
+        return "FAN-{}".format(self.fan_tray_index+1)
 
     def get_presence(self):
         """
@@ -206,8 +198,6 @@ def get_presence(self):
         Returns:
             bool: True if FAN is present, False if not
         """
-
-
         if self.is_psu_fan:
             present_path="{}{}".format(self.psu_cpld_path, 'psu_present')
         else:
@@ -226,6 +216,11 @@ def get_status(self):
             A boolean value, True if device is operating properly, False if not
         """
         if self.is_psu_fan:
+            psu_fan_path = "{}{}".format(self.psu_cpld_path, 'psu_power_good')
+            val = self._api_helper.read_txt_file(psu_fan_path)
+            if val is None or int(val, 10)==0:
+                return False
+
             psu_fan_path= "{}{}".format(self.psu_hwmon_path, 'psu_fan1_fault')
             val=self._api_helper.read_txt_file(psu_fan_path)
             if val is not None:
@@ -268,7 +263,7 @@ def get_position_in_parent(self):
             integer: The 1-based relative physical position in parent device
             or -1 if cannot determine the position
         """
-        return (self.fan_tray_index+1) \
+        return (self.fan_index+1) \
             if not self.is_psu_fan else (self.psu_index+1)
 
     def is_replaceable(self):
diff --git a/device/accton/x86_64-accton_as4630_54te-r0/sonic_platform/fan_drawer.py b/device/accton/x86_64-accton_as4630_54te-r0/sonic_platform/fan_drawer.py
index e21163c10..b4c2146b9 100644
--- a/device/accton/x86_64-accton_as4630_54te-r0/sonic_platform/fan_drawer.py
+++ b/device/accton/x86_64-accton_as4630_54te-r0/sonic_platform/fan_drawer.py
@@ -10,7 +10,7 @@
 except ImportError as e:
     raise ImportError(str(e) + "- required module not found")
 
-FANS_PER_FANTRAY = 2
+FANS_PER_FANTRAY = 1
 
 
 class FanDrawer(FanDrawerBase):
@@ -88,3 +88,25 @@ def is_replaceable(self):
             bool: True if it is replaceable.
         """
         return True
+
+    def set_status_led(self, color):
+        """
+        Sets the state of the fan module status LED
+        Args:
+            color: A string representing the color with which to set the
+                   fan module status LED
+        Returns:
+            bool: True if status LED state is set successfully, False if not
+        """
+        return False # Not supported
+
+    def get_status_led(self):
+        """
+        Gets the state of the fan status LED
+        Returns:
+            A string, one of the predefined STATUS_LED_COLOR_* strings above
+        """
+        return {
+            True: self.STATUS_LED_COLOR_GREEN,
+            False: self.STATUS_LED_COLOR_OFF
+        }.get(self.get_status(), self.STATUS_LED_COLOR_OFF)
diff --git a/device/accton/x86_64-accton_as5835_54x-r0/sonic_platform/fan.py b/device/accton/x86_64-accton_as5835_54x-r0/sonic_platform/fan.py
index 8cb1c17fd..43ce61559 100644
--- a/device/accton/x86_64-accton_as5835_54x-r0/sonic_platform/fan.py
+++ b/device/accton/x86_64-accton_as5835_54x-r0/sonic_platform/fan.py
@@ -44,7 +44,7 @@
 
 
 FAN_NAME_LIST = ["FAN-1F", "FAN-1R", "FAN-2F", "FAN-2R",
-                 "FAN-3F", "FAN-3R", "FAN-4F", "FAN-4R", 
+                 "FAN-3F", "FAN-3R", "FAN-4F", "FAN-4R",
                  "FAN-5F", "FAN-5R"]
 
 class Fan(FanBase):
@@ -61,7 +61,7 @@ def __init__(self, fan_tray_index, fan_index=0, is_psu_fan=False, psu_index=0):
             self.psu_i2c_addr = PSU_HWMON_I2C_MAPPING[self.psu_index]['addr']
             self.psu_hwmon_path = I2C_PATH.format(
                 self.psu_i2c_num, self.psu_i2c_addr)
-        
+
             self.psu_i2c_num = PSU_CPLD_I2C_MAPPING[self.psu_index]['num']
             self.psu_i2c_addr = PSU_CPLD_I2C_MAPPING[self.psu_index]['addr']
             self.psu_cpld_path = I2C_PATH.format(
@@ -77,7 +77,7 @@ def get_direction(self):
             A string, either FAN_DIRECTION_INTAKE or FAN_DIRECTION_EXHAUST
             depending on fan direction
         """
-        
+
 
         if not self.is_psu_fan:
             dir_str = "{}{}{}".format(CPLD_FAN_I2C_PATH, self.fan_tray_index+1, '_direction')
@@ -91,17 +91,17 @@ def get_direction(self):
                 direction=self.FAN_DIRECTION_EXHAUST
         else: #For PSU
             dir_str = "{}{}".format(self.psu_hwmon_path,'psu_fan_dir')
-            
+
             val=self._api_helper.read_txt_file(dir_str)
 
-            if val is not None: 
+            if val is not None:
                 if val=='F2B':
                     direction=self.FAN_DIRECTION_EXHAUST
                 else:
                     direction=self.FAN_DIRECTION_INTAKE
             else:
                 direction=self.FAN_DIRECTION_EXHAUST
-                
+
         return direction
 
     def get_speed(self):
@@ -122,12 +122,12 @@ def get_speed(self):
                     speed=100
             else:
                 return 0
-        elif self.get_presence():            
+        elif self.get_presence():
             speed_path = "{}{}".format(CPLD_FAN_I2C_PATH, '_duty_cycle_percentage')
             speed=self._api_helper.read_txt_file(speed_path)
             if speed is None:
                 return 0
-            	
+
         return int(speed)
 
     def get_target_speed(self):
@@ -164,8 +164,8 @@ def set_speed(self, speed):
             A boolean, True if speed is set successfully, False if not
 
         """
-        
-        if not self.is_psu_fan and self.get_presence():            
+
+        if not self.is_psu_fan and self.get_presence():
             speed_path = "{}{}".format(CPLD_FAN_I2C_PATH, '_duty_cycle_percentage')
             return self._api_helper.write_txt_file(speed_path, int(speed))
 
@@ -181,21 +181,20 @@ def set_status_led(self, color):
             bool: True if status LED state is set successfully, False if not
         """
         return False #Not supported
-   
+
     def get_status_led(self):
         """
         Gets the state of the fan status LED
         Returns:
             A string, one of the predefined STATUS_LED_COLOR_* strings above
         """
-        status=self.get_presence()
-        if status is None:
-            return  self.STATUS_LED_COLOR_OFF
+        if self.is_psu_fan:
+            return None
 
         return {
-            1: self.STATUS_LED_COLOR_GREEN,
-            0: self.STATUS_LED_COLOR_RED            
-        }.get(status, self.STATUS_LED_COLOR_OFF)
+            True: self.STATUS_LED_COLOR_GREEN,
+            False: self.STATUS_LED_COLOR_RED
+        }.get(self.get_status(), self.STATUS_LED_COLOR_RED)
 
     def get_name(self):
         """
@@ -208,20 +207,18 @@ def get_name(self):
             else "PSU-{} FAN-{}".format(self.psu_index+1, self.fan_index+1)
 
         return fan_name
-            
+
     def get_presence(self):
         """
         Retrieves the presence of the FAN
         Returns:
             bool: True if FAN is present, False if not
         """
-        
-        
         if self.is_psu_fan:
             present_path="{}{}".format(self.psu_cpld_path, 'psu_present')
         else:
             present_path = "{}{}{}".format(CPLD_FAN_I2C_PATH, self.fan_tray_index+1, '_present')
-                    
+
         val=self._api_helper.read_txt_file(present_path)
         if val is not None:
             return int(val, 10)==1
@@ -235,30 +232,34 @@ def get_status(self):
             A boolean value, True if device is operating properly, False if not
         """
         if self.is_psu_fan:
+            psu_path = "{}{}".format(self.psu_cpld_path, 'psu_power_good')
+            val = self._api_helper.read_txt_file(psu_path)
+            if val is None or int(val, 10)==0:
+                return False
+
             psu_fan_path= "{}{}".format(self.psu_hwmon_path, 'psu_fan1_fault')
             val=self._api_helper.read_txt_file(psu_fan_path)
             if val is not None:
                 return int(val, 10)==0
             else:
                 return False
-        else:    
-            path = "{}{}{}".format(CPLD_FAN_I2C_PATH, self.fan_tray_index+1, '_fault')
+        else:
+            sys_index = self.fan_index * 10 + self.fan_tray_index+1
+            path = "{}{}{}".format(CPLD_FAN_I2C_PATH, sys_index, '_fault')
             val=self._api_helper.read_txt_file(path)
             if val is not None:
                 return int(val, 10)==0
             else:
                 return False
 
-    
     def get_model(self):
         """
         Retrieves the model number (or part number) of the device
         Returns:
             string: Model/part number of device
         """
-               
         return "N/A"
-    
+
     def get_serial(self):
         """
         Retrieves the serial number of the device
diff --git a/device/accton/x86_64-accton_as5835_54x-r0/sonic_platform/fan_drawer.py b/device/accton/x86_64-accton_as5835_54x-r0/sonic_platform/fan_drawer.py
index 17d339ee5..cc1e87337 100644
--- a/device/accton/x86_64-accton_as5835_54x-r0/sonic_platform/fan_drawer.py
+++ b/device/accton/x86_64-accton_as5835_54x-r0/sonic_platform/fan_drawer.py
@@ -22,7 +22,7 @@ def __init__(self, fantray_index):
         # FanTray is 0-based in platforms
         self.fantrayindex = fantray_index
         self.__initialize_fan_drawer()
-        
+
 
     def __initialize_fan_drawer(self):
         from sonic_platform.fan import Fan
@@ -67,7 +67,13 @@ def get_status(self):
         Returns:
             A boolean value, True if device is operating properly, False if not
         """
-        return self._fan_list[0].get_status()
+        from sonic_platform.fan import Fan
+
+        for fan in self._fan_list:
+            if not fan.get_status():
+                return False
+
+        return True
 
     def get_position_in_parent(self):
         """
@@ -88,3 +94,25 @@ def is_replaceable(self):
             bool: True if it is replaceable.
         """
         return True
+
+    def set_status_led(self, color):
+        """
+        Sets the state of the fan module status LED
+        Args:
+            color: A string representing the color with which to set the
+                   fan module status LED
+        Returns:
+            bool: True if status LED state is set successfully, False if not
+        """
+        return False # Not supported
+
+    def get_status_led(self):
+        """
+        Gets the state of the fan status LED
+        Returns:
+            A string, one of the predefined STATUS_LED_COLOR_* strings above
+        """
+        return {
+            True: self.STATUS_LED_COLOR_GREEN,
+            False: self.STATUS_LED_COLOR_RED
+        }.get(self.get_status(), self.STATUS_LED_COLOR_RED)

From e4abb0ea1f7a9360bad5d5661283963b330bcdff Mon Sep 17 00:00:00 2001
From: Brandon Chuang <brandon_chuang@edge-core.com>
Date: Mon, 1 Aug 2022 17:42:11 +0800
Subject: [PATCH 1079/1115] [Edgecore] Update installer.conf

Why I did it
    The customer report of the PCIe Bus Errors upon the SDK initialization.
The root cause is BRCM MAC chipset DNX/XGS series does not support the ASPM function.

How I did it
    Based on the internal info and discussion, update "pcie_aspm=off" into
ONIE_PLATFORM_EXTRA_CMDLINE_LINUX of installer.conf to resolve it.

Signed-off-by: Brandon Chuang <brandon_chuang@edge-core.com>
---
 device/accton/x86_64-accton_as4630_54pe-r0/installer.conf | 2 +-
 device/accton/x86_64-accton_as4630_54te-r0/installer.conf | 1 +
 device/accton/x86_64-accton_as5712_54x-r0/installer.conf  | 1 +
 device/accton/x86_64-accton_as5812_54t-r0/installer.conf  | 1 +
 device/accton/x86_64-accton_as5812_54x-r0/installer.conf  | 1 +
 device/accton/x86_64-accton_as5835_54t-r0/installer.conf  | 1 +
 device/accton/x86_64-accton_as5835_54x-r0/installer.conf  | 2 +-
 device/accton/x86_64-accton_as6712_32x-r0/installer.conf  | 1 +
 device/accton/x86_64-accton_as7312_54x-r0/installer.conf  | 1 +
 device/accton/x86_64-accton_as7312_54xs-r0/installer.conf | 1 +
 device/accton/x86_64-accton_as7315_27xb-r0/installer.conf | 2 +-
 device/accton/x86_64-accton_as7712_32x-r0/installer.conf  | 2 +-
 device/accton/x86_64-accton_as7716_32x-r0/installer.conf  | 2 +-
 device/accton/x86_64-accton_as7716_32xb-r0/installer.conf | 2 +-
 device/accton/x86_64-accton_as9726_32d-r0/installer.conf  | 1 +
 15 files changed, 15 insertions(+), 6 deletions(-)

diff --git a/device/accton/x86_64-accton_as4630_54pe-r0/installer.conf b/device/accton/x86_64-accton_as4630_54pe-r0/installer.conf
index 735fa7992..85bb317cc 100755
--- a/device/accton/x86_64-accton_as4630_54pe-r0/installer.conf
+++ b/device/accton/x86_64-accton_as4630_54pe-r0/installer.conf
@@ -1,4 +1,4 @@
 CONSOLE_PORT=0x3f8
 CONSOLE_DEV=0
 CONSOLE_SPEED=115200
-ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="intel_iommu=off modprobe.blacklist=i2c-ismt,i2c_ismt,i2c-i801,i2c_i801"
+ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="pcie_aspm=off intel_iommu=off modprobe.blacklist=i2c-ismt,i2c_ismt,i2c-i801,i2c_i801"
diff --git a/device/accton/x86_64-accton_as4630_54te-r0/installer.conf b/device/accton/x86_64-accton_as4630_54te-r0/installer.conf
index 925a32fc0..d5f9419d7 100755
--- a/device/accton/x86_64-accton_as4630_54te-r0/installer.conf
+++ b/device/accton/x86_64-accton_as4630_54te-r0/installer.conf
@@ -1,3 +1,4 @@
 CONSOLE_PORT=0x3f8
 CONSOLE_DEV=0
 CONSOLE_SPEED=115200
+ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="pcie_aspm=off"
diff --git a/device/accton/x86_64-accton_as5712_54x-r0/installer.conf b/device/accton/x86_64-accton_as5712_54x-r0/installer.conf
index 14404194e..c6fb53c90 100644
--- a/device/accton/x86_64-accton_as5712_54x-r0/installer.conf
+++ b/device/accton/x86_64-accton_as5712_54x-r0/installer.conf
@@ -1,3 +1,4 @@
 CONSOLE_PORT=0x2f8
 CONSOLE_DEV=1
 CONSOLE_SPEED=115200
+ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="pcie_aspm=off"
diff --git a/device/accton/x86_64-accton_as5812_54t-r0/installer.conf b/device/accton/x86_64-accton_as5812_54t-r0/installer.conf
index 14404194e..c6fb53c90 100644
--- a/device/accton/x86_64-accton_as5812_54t-r0/installer.conf
+++ b/device/accton/x86_64-accton_as5812_54t-r0/installer.conf
@@ -1,3 +1,4 @@
 CONSOLE_PORT=0x2f8
 CONSOLE_DEV=1
 CONSOLE_SPEED=115200
+ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="pcie_aspm=off"
diff --git a/device/accton/x86_64-accton_as5812_54x-r0/installer.conf b/device/accton/x86_64-accton_as5812_54x-r0/installer.conf
index 14404194e..c6fb53c90 100644
--- a/device/accton/x86_64-accton_as5812_54x-r0/installer.conf
+++ b/device/accton/x86_64-accton_as5812_54x-r0/installer.conf
@@ -1,3 +1,4 @@
 CONSOLE_PORT=0x2f8
 CONSOLE_DEV=1
 CONSOLE_SPEED=115200
+ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="pcie_aspm=off"
diff --git a/device/accton/x86_64-accton_as5835_54t-r0/installer.conf b/device/accton/x86_64-accton_as5835_54t-r0/installer.conf
index 925a32fc0..d5f9419d7 100644
--- a/device/accton/x86_64-accton_as5835_54t-r0/installer.conf
+++ b/device/accton/x86_64-accton_as5835_54t-r0/installer.conf
@@ -1,3 +1,4 @@
 CONSOLE_PORT=0x3f8
 CONSOLE_DEV=0
 CONSOLE_SPEED=115200
+ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="pcie_aspm=off"
diff --git a/device/accton/x86_64-accton_as5835_54x-r0/installer.conf b/device/accton/x86_64-accton_as5835_54x-r0/installer.conf
index 735fa7992..85bb317cc 100644
--- a/device/accton/x86_64-accton_as5835_54x-r0/installer.conf
+++ b/device/accton/x86_64-accton_as5835_54x-r0/installer.conf
@@ -1,4 +1,4 @@
 CONSOLE_PORT=0x3f8
 CONSOLE_DEV=0
 CONSOLE_SPEED=115200
-ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="intel_iommu=off modprobe.blacklist=i2c-ismt,i2c_ismt,i2c-i801,i2c_i801"
+ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="pcie_aspm=off intel_iommu=off modprobe.blacklist=i2c-ismt,i2c_ismt,i2c-i801,i2c_i801"
diff --git a/device/accton/x86_64-accton_as6712_32x-r0/installer.conf b/device/accton/x86_64-accton_as6712_32x-r0/installer.conf
index 14404194e..c6fb53c90 100644
--- a/device/accton/x86_64-accton_as6712_32x-r0/installer.conf
+++ b/device/accton/x86_64-accton_as6712_32x-r0/installer.conf
@@ -1,3 +1,4 @@
 CONSOLE_PORT=0x2f8
 CONSOLE_DEV=1
 CONSOLE_SPEED=115200
+ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="pcie_aspm=off"
diff --git a/device/accton/x86_64-accton_as7312_54x-r0/installer.conf b/device/accton/x86_64-accton_as7312_54x-r0/installer.conf
index 14404194e..c6fb53c90 100644
--- a/device/accton/x86_64-accton_as7312_54x-r0/installer.conf
+++ b/device/accton/x86_64-accton_as7312_54x-r0/installer.conf
@@ -1,3 +1,4 @@
 CONSOLE_PORT=0x2f8
 CONSOLE_DEV=1
 CONSOLE_SPEED=115200
+ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="pcie_aspm=off"
diff --git a/device/accton/x86_64-accton_as7312_54xs-r0/installer.conf b/device/accton/x86_64-accton_as7312_54xs-r0/installer.conf
index 14404194e..c6fb53c90 100644
--- a/device/accton/x86_64-accton_as7312_54xs-r0/installer.conf
+++ b/device/accton/x86_64-accton_as7312_54xs-r0/installer.conf
@@ -1,3 +1,4 @@
 CONSOLE_PORT=0x2f8
 CONSOLE_DEV=1
 CONSOLE_SPEED=115200
+ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="pcie_aspm=off"
diff --git a/device/accton/x86_64-accton_as7315_27xb-r0/installer.conf b/device/accton/x86_64-accton_as7315_27xb-r0/installer.conf
index f7358371b..7a713c2af 100644
--- a/device/accton/x86_64-accton_as7315_27xb-r0/installer.conf
+++ b/device/accton/x86_64-accton_as7315_27xb-r0/installer.conf
@@ -1,2 +1,2 @@
 CONSOLE_SPEED=115200
-ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="tg3.short_preamble=1 tg3.bcm5718s_reset=1 intel_iommu=off modprobe.blacklist=i2c-ismt,i2c_ismt,i2c-i801,i2c_i801"
+ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="tg3.short_preamble=1 tg3.bcm5718s_reset=1 pcie_aspm=off intel_iommu=off modprobe.blacklist=i2c-ismt,i2c_ismt,i2c-i801,i2c_i801"
diff --git a/device/accton/x86_64-accton_as7712_32x-r0/installer.conf b/device/accton/x86_64-accton_as7712_32x-r0/installer.conf
index d0ed16575..8d06f2acc 100644
--- a/device/accton/x86_64-accton_as7712_32x-r0/installer.conf
+++ b/device/accton/x86_64-accton_as7712_32x-r0/installer.conf
@@ -1,4 +1,4 @@
 CONSOLE_PORT=0x2f8
 CONSOLE_DEV=1
 CONSOLE_SPEED=115200
-ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="modprobe.blacklist=i2c-ismt,i2c_ismt,i2c-i801,i2c_i801"
+ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="pcie_aspm=off modprobe.blacklist=i2c-ismt,i2c_ismt,i2c-i801,i2c_i801"
diff --git a/device/accton/x86_64-accton_as7716_32x-r0/installer.conf b/device/accton/x86_64-accton_as7716_32x-r0/installer.conf
index d97e3195e..be5cd8686 100644
--- a/device/accton/x86_64-accton_as7716_32x-r0/installer.conf
+++ b/device/accton/x86_64-accton_as7716_32x-r0/installer.conf
@@ -1,4 +1,4 @@
 CONSOLE_PORT=0x3f8
 CONSOLE_DEV=0
 CONSOLE_SPEED=115200
-ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="tg3.short_preamble=1 tg3.bcm5718s_reset=1"
+ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="tg3.short_preamble=1 tg3.bcm5718s_reset=1 pcie_aspm=off"
diff --git a/device/accton/x86_64-accton_as7716_32xb-r0/installer.conf b/device/accton/x86_64-accton_as7716_32xb-r0/installer.conf
index d97e3195e..be5cd8686 100755
--- a/device/accton/x86_64-accton_as7716_32xb-r0/installer.conf
+++ b/device/accton/x86_64-accton_as7716_32xb-r0/installer.conf
@@ -1,4 +1,4 @@
 CONSOLE_PORT=0x3f8
 CONSOLE_DEV=0
 CONSOLE_SPEED=115200
-ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="tg3.short_preamble=1 tg3.bcm5718s_reset=1"
+ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="tg3.short_preamble=1 tg3.bcm5718s_reset=1 pcie_aspm=off"
diff --git a/device/accton/x86_64-accton_as9726_32d-r0/installer.conf b/device/accton/x86_64-accton_as9726_32d-r0/installer.conf
index 925a32fc0..d5f9419d7 100644
--- a/device/accton/x86_64-accton_as9726_32d-r0/installer.conf
+++ b/device/accton/x86_64-accton_as9726_32d-r0/installer.conf
@@ -1,3 +1,4 @@
 CONSOLE_PORT=0x3f8
 CONSOLE_DEV=0
 CONSOLE_SPEED=115200
+ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="pcie_aspm=off"

From 58300a7fd9dbd708353bfbfa3b3697f71dd63796 Mon Sep 17 00:00:00 2001
From: jostar-yang <jostar_yang@edge-core.com>
Date: Tue, 7 Feb 2023 15:08:49 +0800
Subject: [PATCH 1080/1115] [Edgecore][PDDF/as5835-54x] Support PDDF

Signed-off-by: jostar-yang <jostar_yang@edge-core.com>
---
 .../pddf/pd-plugin.json                       |   66 +
 .../pddf/pddf-device.json                     | 2819 +++++++++++++++++
 .../x86_64-accton_as5835_54x-r0/pddf_support  |    0
 .../pmon_daemon_control.json                  |    4 +-
 .../x86_64-accton_as5835_54x-r0/sensors.conf  |    8 +-
 .../system_health_monitoring_config.json      |   32 +-
 .../as5835-54x/modules/Makefile               |    5 +-
 .../as5835-54x/modules/pddf_custom_psu.c      |  117 +
 .../as5835-54x-pddf-platform-monitor.service  |   16 +
 .../service/pddf-platform-init.service        |    1 +
 .../as5835-54x/sonic_platform/__init__.py     |    3 +
 .../as5835-54x/sonic_platform/chassis.py      |  119 +
 .../as5835-54x/sonic_platform/component.py    |  172 +
 .../as5835-54x/sonic_platform/eeprom.py       |   88 +
 .../as5835-54x/sonic_platform/event.py        |   60 +
 .../as5835-54x/sonic_platform/fan.py          |   32 +
 .../as5835-54x/sonic_platform/fan_drawer.py   |   24 +
 .../as5835-54x/sonic_platform/helper.py       |  121 +
 .../as5835-54x/sonic_platform/pcie.py         |   19 +
 .../as5835-54x/sonic_platform/platform.py     |   25 +
 .../as5835-54x/sonic_platform/psu.py          |   65 +
 .../as5835-54x/sonic_platform/sfp.py          |   57 +
 .../as5835-54x/sonic_platform/thermal.py      |   42 +
 .../as5835-54x/sonic_platform/watchdog.py     |   23 +
 .../as5835-54x/sonic_platform_setup.py        |   11 +-
 .../utils/accton_as5835_54x_pddf_monitor.py   |  241 ++
 .../utils/pddf_post_device_create.sh          |   27 +
 .../as5835-54x/utils/pddf_switch_svc.py       |   86 +
 .../sonic-platform-accton-as5835-54x.install  |    3 +-
 .../sonic-platform-accton-as5835-54x.postinst |    9 +
 30 files changed, 4261 insertions(+), 34 deletions(-)
 create mode 100644 device/accton/x86_64-accton_as5835_54x-r0/pddf/pd-plugin.json
 create mode 100644 device/accton/x86_64-accton_as5835_54x-r0/pddf/pddf-device.json
 create mode 100644 device/accton/x86_64-accton_as5835_54x-r0/pddf_support
 create mode 100644 platform/broadcom/sonic-platform-modules-accton/as5835-54x/modules/pddf_custom_psu.c
 create mode 100644 platform/broadcom/sonic-platform-modules-accton/as5835-54x/service/as5835-54x-pddf-platform-monitor.service
 create mode 120000 platform/broadcom/sonic-platform-modules-accton/as5835-54x/service/pddf-platform-init.service
 create mode 100644 platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/__init__.py
 create mode 100644 platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/chassis.py
 create mode 100644 platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/component.py
 create mode 100644 platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/eeprom.py
 create mode 100644 platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/event.py
 create mode 100644 platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/fan.py
 create mode 100644 platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/fan_drawer.py
 create mode 100644 platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/helper.py
 create mode 100644 platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/pcie.py
 create mode 100644 platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/platform.py
 create mode 100644 platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/psu.py
 create mode 100644 platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/sfp.py
 create mode 100644 platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/thermal.py
 create mode 100644 platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/watchdog.py
 create mode 100755 platform/broadcom/sonic-platform-modules-accton/as5835-54x/utils/accton_as5835_54x_pddf_monitor.py
 create mode 100755 platform/broadcom/sonic-platform-modules-accton/as5835-54x/utils/pddf_post_device_create.sh
 create mode 100755 platform/broadcom/sonic-platform-modules-accton/as5835-54x/utils/pddf_switch_svc.py
 create mode 100644 platform/broadcom/sonic-platform-modules-accton/debian/sonic-platform-accton-as5835-54x.postinst

diff --git a/device/accton/x86_64-accton_as5835_54x-r0/pddf/pd-plugin.json b/device/accton/x86_64-accton_as5835_54x-r0/pddf/pd-plugin.json
new file mode 100644
index 000000000..93cfc7589
--- /dev/null
+++ b/device/accton/x86_64-accton_as5835_54x-r0/pddf/pd-plugin.json
@@ -0,0 +1,66 @@
+{
+    
+    "XCVR":
+    {
+        "xcvr_present":
+        {
+           "i2c":
+           {
+               "valmap-SFP28": {"1":true, "0":false },
+               "valmap-QSFP28": {"1":true, "0":false}
+           }
+        }
+    },
+    "PSU":
+    {
+        "psu_present": 
+        {
+            "i2c":
+            {
+                "valmap": { "1":true, "0":false }
+            }
+        },
+
+        "psu_power_good": 
+        {
+            "i2c":
+            {
+                "valmap": { "1": true, "0":false }
+            }
+        },
+
+        "psu_fan_dir":
+        {
+            "i2c":
+            {
+                "valmap": { "F2B":"exhaust", "B2F":"intake" }
+            }
+        },
+
+        "PSU_FAN_MAX_SPEED":"18000"
+    },
+
+    "FAN":
+    {
+        "direction":
+        {
+            "i2c":
+            {
+                "valmap": {"1":"intake", "0":"exhaust"}
+            }
+        },
+
+        "present":
+        {
+            "i2c":
+            {
+                "valmap": {"1":true, "0":false}
+            }
+        },
+        
+        "duty_cycle_to_pwm": "lambda dc: (dc/5)",
+
+        "pwm_to_duty_cycle": "lambda pwm: (pwm*5)"
+    }
+
+}
diff --git a/device/accton/x86_64-accton_as5835_54x-r0/pddf/pddf-device.json b/device/accton/x86_64-accton_as5835_54x-r0/pddf/pddf-device.json
new file mode 100644
index 000000000..edf570a8b
--- /dev/null
+++ b/device/accton/x86_64-accton_as5835_54x-r0/pddf/pddf-device.json
@@ -0,0 +1,2819 @@
+{
+    "PLATFORM":
+    {
+        "num_psus":2,
+        "num_fantrays":5,
+        "num_fans_pertray":2,
+        "num_ports":54,
+        "num_temps": 4,
+        "pddf_dev_types":
+        {
+            "description":"AS5835-54X - Below is the list of supported PDDF device types (chip names) for various components. If any component uses some other driver, we will create the client using 'echo <dev-address> <dev-type> > <path>/new_device' method",
+            "CPLD":
+            [
+                "i2c_cpld"
+            ],
+            "PSU":
+            [
+                "psu_eeprom",
+                "psu_pmbus"
+            ],
+            "FAN":
+            [
+                "fan_ctrl",
+                "fan_eeprom"
+            ],
+            "PORT_MODULE":
+            [
+                "pddf_xcvr"
+            ]            
+        },
+        "std_kos":
+        [
+            "i2c-i801",
+            "i2c-ismt",
+            "i2c_dev",
+            "i2c_mux_pca954x",
+            "optoe"
+        ],
+        "pddf_kos":
+        [
+            "pddf_client_module",
+            "pddf_cpld_module",
+            "pddf_cpld_driver",
+            "pddf_mux_module",
+            "pddf_xcvr_module",
+            "pddf_xcvr_driver_module",
+            "pddf_psu_driver_module",
+            "pddf_psu_module",
+            "pddf_fan_driver_module",
+            "pddf_fan_module",
+            "pddf_led_module",
+            "pddf_sysstatus_module"
+        ],
+        "custom_kos":
+        [
+            "pddf_custom_psu"
+        ]
+    
+    },
+
+    "SYSTEM":
+    {
+        "dev_info": {"device_type":"CPU", "device_name":"ROOT_COMPLEX", "device_parent":null},
+        "i2c":
+        {
+            "CONTROLLERS":
+            [ 
+                { "dev_name":"i2c-1", "dev":"SMBUS1" }
+            ]
+        }
+    },
+    
+    "SMBUS1": 
+    {
+        "dev_info": {"device_type": "SMBUS", "device_name": "SMBUS1", "device_parent": "SYSTEM"},
+        "i2c": 
+        {
+            "topo_info": {"dev_addr": "0x1"},
+            "DEVICES": 
+            [
+                {"dev": "EEPROM1"},
+                {"dev": "CPU_CPLD"},
+                {"dev": "MUX1"}
+            ]
+        }
+    },
+  
+    "EEPROM1": 
+    {
+        "dev_info": {"device_type": "EEPROM", "device_name": "EEPROM1", "device_parent": "SMBUS1"},
+        "i2c": 
+        {
+            "topo_info": {"parent_bus": "0x1", "dev_addr": "0x57", "dev_type": "24c02"},
+            "dev_attr": {"access_mode": "BLOCK"},
+            "attr_list": [
+                {"attr_name": "eeprom"}
+            ]
+        }
+    },
+    
+    "CPU_CPLD":
+    {
+        "dev_info": { "device_type":"CPLD", "device_name":"CPU_CPLD", "device_parent":"SMBUS1"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x1", "dev_addr":"0x65", "dev_type":"i2c_cpld"},
+            "dev_attr": { }
+        }
+    },
+    
+    "MUX1":
+    {
+        "dev_info": {  "device_type":"MUX", "device_name":"MUX1", "device_parent":"SMBUS1"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x1", "dev_addr":"0x77", "dev_type":"pca9548"},
+            "dev_attr": { "virt_bus":"0x2", "idle_state":"-2"},
+             "channel":
+            [
+                { "chn":"0", "dev":"MUX2" },
+                { "chn":"0", "dev":"MUX3" },
+                { "chn":"0", "dev":"MUX4" },
+                { "chn":"1", "dev":"CPLD1" },
+                { "chn":"1", "dev":"CPLD2" },
+                { "chn":"1", "dev":"CPLD3" },
+                { "chn":"1", "dev":"FAN-CTRL" },
+                { "chn":"1", "dev":"MUX5" }
+            ]            
+        }
+    },
+    "MUX2":
+    {
+        "dev_info": {  "device_type":"MUX", "device_name":"MUX2", "device_parent":"MUX1"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x2", "dev_addr":"0x70", "dev_type":"pca9548"},
+            "dev_attr": { "virt_bus":"0xa", "idle_state":"-2"},
+            "channel":
+            [
+                { "chn":"1", "dev":"PSU1" },
+                { "chn":"2", "dev":"PSU2" }
+            ]
+        }
+    },
+   
+     "PSU1":
+    {
+        "dev_info": { "device_type":"PSU", "device_name":"PSU1", "device_parent":"MUX2"}, 
+        "dev_attr": { "dev_idx":"1", "num_psu_fans": "1"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"pmbus", "dev":"PSU1-PMBUS" },
+                { "itf":"eeprom", "dev":"PSU1-EEPROM" }
+            ]
+        }
+    },
+
+    "PSU1-PMBUS":
+    {
+        "dev_info": { "device_type":"PSU-PMBUS", "device_name":"PSU1-PMBUS", "device_parent":"MUX2", "virt_parent":"PSU1"},
+        "i2c":
+        {
+            "topo_info":{ "parent_bus":"0xb", "dev_addr":"0x58", "dev_type":"psu_pmbus"}, 
+            "attr_list": 
+            [  
+                { "attr_name":"psu_present", "attr_devaddr":"0x60", "attr_devtype":"cpld", "attr_offset":"0x2", "attr_mask":"0x1", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"psu_model_name", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x9a", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"10" },
+                { "attr_name":"psu_power_good", "attr_devaddr":"0x60", "attr_devtype":"cpld", "attr_offset":"0x2", "attr_mask":"0x2", "attr_cmpval":"0x2", "attr_len":"1"},
+                { "attr_name":"psu_mfr_id", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0X99", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"10" },
+                { "attr_name":"psu_fan_dir", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0xc3", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"5"},
+                { "attr_name":"psu_v_out", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x8b", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+                { "attr_name":"psu_i_out", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x8c", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+                { "attr_name":"psu_p_out", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x96", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+                { "attr_name":"psu_fan1_speed_rpm", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x90", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+                { "attr_name":"psu_temp1_input", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x8d", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}
+            ]
+        }
+    },
+
+    "PSU1-EEPROM":
+    {
+        "dev_info": { "device_type":"PSU-EEPROM", "device_name":"PSU1-EEPROM", "device_parent":"MUX2", "virt_parent":"PSU1"},
+        "i2c":
+        {
+            "topo_info":{ "parent_bus":"0xb", "dev_addr":"0x50", "dev_type":"psu_eeprom"}, 
+            "attr_list": 
+            [  
+                { "attr_name":"psu_serial_num", "attr_devaddr":"0x50", "attr_devtype":"eeprom", "attr_offset":"0x35", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"19" }
+            ]
+        }
+    },
+
+    "PSU2":
+    {
+        "dev_info": { "device_type":"PSU", "device_name":"PSU2", "device_parent":"MUX2" },
+        "dev_attr": { "dev_idx":"2", "num_psu_fans":"1"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"pmbus", "dev":"PSU2-PMBUS"},
+                { "itf":"eeprom", "dev":"PSU2-EEPROM" }
+            ]
+        }
+    },
+
+    "PSU2-PMBUS":
+    {
+        "dev_info": {"device_type":"PSU-PMBUS", "device_name":"PSU2-PMBUS", "device_parent":"MUX2", "virt_parent":"PSU2"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0xc", "dev_addr":"0x5b", "dev_type":"psu_pmbus"},
+            "attr_list": 
+            [  
+                { "attr_name":"psu_present", "attr_devaddr":"0x60", "attr_devtype":"cpld", "attr_offset":"0x2", "attr_mask":"0x10", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"psu_model_name", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x9a", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"10" },
+                { "attr_name":"psu_power_good", "attr_devaddr":"0x60", "attr_devtype":"cpld", "attr_offset":"0x2", "attr_mask":"0x20", "attr_cmpval":"0x20", "attr_len":"1"},
+                { "attr_name":"psu_mfr_id", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0X99", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"10" },
+                { "attr_name":"psu_fan_dir", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0xc3", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"5"},
+                { "attr_name":"psu_v_out", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x8b", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+                { "attr_name":"psu_i_out", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x8c", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+                { "attr_name":"psu_p_out", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x96", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+                { "attr_name":"psu_fan1_speed_rpm", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x90", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+                { "attr_name":"psu_temp1_input", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x8d", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}
+            ]
+        }
+    },
+    
+    "PSU2-EEPROM":
+    {
+        "dev_info": { "device_type":"PSU-EEPROM", "device_name":"PSU2-EEPROM", "device_parent":"MUX2", "virt_parent":"PSU2"},
+        "i2c":
+        {
+            "topo_info":{ "parent_bus":"0xc", "dev_addr":"0x53", "dev_type":"psu_eeprom"}, 
+            "attr_list": 
+            [  
+                { "attr_name":"psu_serial_num", "attr_devaddr":"0x53", "attr_devtype":"eeprom", "attr_offset":"0x35", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"19" }
+            ]
+        }
+    },
+    "MUX3":
+    {
+        "dev_info": {  "device_type":"MUX", "device_name":"MUX3", "device_parent":"MUX1"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x2", "dev_addr":"0x72", "dev_type":"pca9548"},
+            "dev_attr": { "virt_bus":"0x12", "idle_state":"-2"},
+            "channel":
+            [
+                { "chn":"0", "dev":"PORT51" },
+                { "chn":"1", "dev":"PORT54" },
+                { "chn":"2", "dev":"PORT49" },
+                { "chn":"3", "dev":"PORT50" },
+                { "chn":"4", "dev":"PORT52" },
+                { "chn":"5", "dev":"PORT53" }
+            ]
+        }
+    },
+    
+    "PORT51":
+    {
+        "dev_info": { "device_type":"QSFP28", "device_name":"PORT51", "device_parent":"MUX3"},
+        "dev_attr": { "dev_idx":"51"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT51-EEPROM" },
+                { "itf":"control", "dev":"PORT51-CTRL" }
+            ]
+        }
+    },
+    "PORT51-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT51-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT51"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x12", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },    
+    "PORT51-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT51-CTRL", "device_parent":"MUX3", "virt_parent":"PORT51"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x12", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x62", "attr_devtype":"cpld", "attr_devname":"CPLD3", "attr_offset":"0x14", "attr_mask":"0x2", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_reset", "attr_devaddr":"0x62", "attr_devtype":"cpld", "attr_devname":"CPLD3","attr_offset":"0x15", "attr_mask":"0x2", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x62", "attr_devtype":"cpld", "attr_devname":"CPLD3","attr_offset":"0x13", "attr_mask":"0x2", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x62", "attr_devtype":"cpld", "attr_devname":"CPLD3", "attr_offset":"0x16", "attr_mask":"0x2", "attr_cmpval":"0x4", "attr_len":"1"}
+            ]
+        }
+    },
+    
+    "PORT54":
+    {
+        "dev_info": { "device_type":"QSFP28", "device_name":"PORT54", "device_parent":"MUX3"},
+        "dev_attr": { "dev_idx":"54"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT54-EEPROM" },
+                { "itf":"control", "dev":"PORT54-CTRL" }
+            ]
+        }
+    },
+    "PORT54-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT54-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT54"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x13", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },    
+    "PORT54-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT54-CTRL", "device_parent":"MUX3", "virt_parent":"PORT54"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x13", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x62", "attr_devtype":"cpld", "attr_devname":"CPLD3","attr_offset":"0x14", "attr_mask":"0x5", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_reset", "attr_devaddr":"0x62", "attr_devtype":"cpld", "attr_devname":"CPLD3","attr_offset":"0x15", "attr_mask":"0x5", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x62", "attr_devtype":"cpld", "attr_devname":"CPLD3","attr_offset":"0x13", "attr_mask":"0x5", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x62", "attr_devtype":"cpld", "attr_devname":"CPLD3", "attr_offset":"0x16", "attr_mask":"0x5", "attr_cmpval":"0x20", "attr_len":"1"}
+            ]
+        }
+    },
+    
+    "PORT49":
+    {
+        "dev_info": { "device_type":"QSFP28", "device_name":"PORT49", "device_parent":"MUX3"},
+        "dev_attr": { "dev_idx":"49"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT49-EEPROM" },
+                { "itf":"control", "dev":"PORT49-CTRL" }
+            ]
+        }
+    },
+    "PORT49-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT49-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT49"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x14", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT49-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT49-CTRL", "device_parent":"MUX3", "virt_parent":"PORT49"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x14", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x62", "attr_devtype":"cpld", "attr_devname":"CPLD3", "attr_offset":"0x14", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_reset", "attr_devaddr":"0x62", "attr_devtype":"cpld", "attr_devname":"CPLD3", "attr_offset":"0x15", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x62", "attr_devtype":"cpld", "attr_devname":"CPLD3", "attr_offset":"0x13", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x62", "attr_devtype":"cpld", "attr_devname":"CPLD3", "attr_offset":"0x16", "attr_mask":"0x0", "attr_cmpval":"0x1", "attr_len":"1"}
+            ]
+        }
+    },
+    
+    "PORT50":
+    {
+        "dev_info": { "device_type":"QSFP28", "device_name":"PORT50", "device_parent":"MUX3"},
+        "dev_attr": { "dev_idx":"50"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT50-EEPROM" },
+                { "itf":"control", "dev":"PORT50-CTRL" }
+            ]
+        }
+    },
+    "PORT50-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT50-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT50"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x15", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+       
+    "PORT50-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT50-CTRL", "device_parent":"MUX3", "virt_parent":"PORT50"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x15", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x62", "attr_devtype":"cpld", "attr_devname":"CPLD3", "attr_offset":"0x14", "attr_mask":"0x1", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_reset", "attr_devaddr":"0x62", "attr_devtype":"cpld", "attr_devname":"CPLD3", "attr_offset":"0x15", "attr_mask":"0x1", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x62", "attr_devtype":"cpld", "attr_devname":"CPLD3", "attr_offset":"0x13", "attr_mask":"0x1", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x62", "attr_devtype":"cpld", "attr_devname":"CPLD3","attr_offset":"0x16", "attr_mask":"0x1", "attr_cmpval":"0x2", "attr_len":"1"}
+            ]
+        }
+    },
+    
+    "PORT52":
+    {
+        "dev_info": { "device_type":"QSFP28", "device_name":"PORT52", "device_parent":"MUX3"},
+        "dev_attr": { "dev_idx":"52"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT52-EEPROM" },
+                { "itf":"control", "dev":"PORT52-CTRL" }
+            ]
+        }
+    },
+    "PORT52-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT52-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT52"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x16", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },    
+    "PORT52-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT52-CTRL", "device_parent":"MUX3", "virt_parent":"PORT52"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x16", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x62", "attr_devtype":"cpld", "attr_devname":"CPLD3", "attr_offset":"0x14", "attr_mask":"0x3", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_reset", "attr_devaddr":"0x62", "attr_devtype":"cpld", "attr_devname":"CPLD3", "attr_offset":"0x15", "attr_mask":"0x3", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x62", "attr_devtype":"cpld","attr_devname":"CPLD3",  "attr_offset":"0x13", "attr_mask":"0x3", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x62", "attr_devtype":"cpld", "attr_devname":"CPLD3", "attr_offset":"0x16", "attr_mask":"0x3", "attr_cmpval":"0x8", "attr_len":"1"}
+            ]
+        }
+    },
+  
+    "PORT53":
+    {
+        "dev_info": { "device_type":"QSFP28", "device_name":"PORT53", "device_parent":"MUX3"},
+        "dev_attr": { "dev_idx":"53"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT53-EEPROM" },
+                { "itf":"control", "dev":"PORT53-CTRL" }
+            ]
+        }
+    },
+    "PORT53-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT53-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT53"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x17", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },    
+    "PORT53-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT53-CTRL", "device_parent":"MUX3", "virt_parent":"PORT53"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x17", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x62", "attr_devtype":"cpld", "attr_devname":"CPLD3","attr_offset":"0x14", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_reset", "attr_devaddr":"0x62", "attr_devtype":"cpld", "attr_devname":"CPLD3", "attr_offset":"0x15", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x62", "attr_devtype":"cpld","attr_devname":"CPLD3", "attr_offset":"0x13", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x62", "attr_devtype":"cpld", "attr_devname":"CPLD3","attr_offset":"0x16", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}
+            ]
+        }
+    },
+   
+   
+    "CPLD1":
+    {
+        "dev_info": { "device_type":"CPLD", "device_name":"CPLD1", "device_parent":"MUX1"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x3", "dev_addr":"0x60", "dev_type":"i2c_cpld"},
+            "dev_attr":{}
+        }
+    },
+    "CPLD2":
+    {
+        "dev_info": { "device_type":"CPLD", "device_name":"CPLD2", "device_parent":"MUX1"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x3", "dev_addr":"0x61", "dev_type":"i2c_cpld"},
+            "dev_attr":{}
+        }
+    },
+    "CPLD3":
+    {
+        "dev_info": { "device_type":"CPLD", "device_name":"CPLD3", "device_parent":"MUX1"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x3", "dev_addr":"0x62", "dev_type":"i2c_cpld"},
+            "dev_attr":{}
+        }
+    },
+     
+     "FAN-CTRL":
+    {
+        "dev_info": { "device_type":"FAN", "device_name":"FAN-CTRL", "device_parent":"MUX1"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x3", "dev_addr":"0x63", "dev_type":"fan_ctrl"},
+            "dev_attr": { "num_fantrays":"5"},
+            "attr_list":
+            [
+                { "attr_name":"fan1_present", "attr_devtype":"FAN-CTRL", "attr_offset":"0x02", "attr_mask":"0x1", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"fan2_present", "attr_devtype":"FAN-CTRL", "attr_offset":"0x02", "attr_mask":"0x1", "attr_cmpval":"0x0", "attr_len":"1"},               
+                { "attr_name":"fan3_present", "attr_devtype":"FAN-CTRL", "attr_offset":"0x02", "attr_mask":"0x2", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"fan4_present", "attr_devtype":"FAN-CTRL", "attr_offset":"0x02", "attr_mask":"0x2", "attr_cmpval":"0x0", "attr_len":"1"},               
+                { "attr_name":"fan5_present", "attr_devtype":"FAN-CTRL", "attr_offset":"0x02", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"fan6_present", "attr_devtype":"FAN-CTRL", "attr_offset":"0x02", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},               
+                { "attr_name":"fan7_present", "attr_devtype":"FAN-CTRL", "attr_offset":"0x02", "attr_mask":"0x8", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"fan8_present", "attr_devtype":"FAN-CTRL", "attr_offset":"0x02", "attr_mask":"0x8", "attr_cmpval":"0x0", "attr_len":"1"},               
+                { "attr_name":"fan9_present", "attr_devtype":"FAN-CTRL", "attr_offset":"0x02", "attr_mask":"0x10", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"fan10_present", "attr_devtype":"FAN-CTRL", "attr_offset":"0x02","attr_mask":"0x10", "attr_cmpval":"0x0", "attr_len":"1"},              
+                { "attr_name":"fan1_direction", "attr_devtype":"FAN-CTRL", "attr_offset":"0x03", "attr_mask":"0x1", "attr_cmpval":"0x1", "attr_len":"1"},
+                { "attr_name":"fan2_direction", "attr_devtype":"FAN-CTRL", "attr_offset":"0x03", "attr_mask":"0x1", "attr_cmpval":"0x1", "attr_len":"1"},               
+                { "attr_name":"fan3_direction", "attr_devtype":"FAN-CTRL", "attr_offset":"0x03", "attr_mask":"0x2", "attr_cmpval":"0x2", "attr_len":"1"},
+                { "attr_name":"fan4_direction", "attr_devtype":"FAN-CTRL", "attr_offset":"0x03", "attr_mask":"0x2", "attr_cmpval":"0x2", "attr_len":"1"},               
+                { "attr_name":"fan5_direction", "attr_devtype":"FAN-CTRL", "attr_offset":"0x03", "attr_mask":"0x4", "attr_cmpval":"0x4", "attr_len":"1"},
+                { "attr_name":"fan6_direction", "attr_devtype":"FAN-CTRL", "attr_offset":"0x03", "attr_mask":"0x4", "attr_cmpval":"0x4", "attr_len":"1"},               
+                { "attr_name":"fan7_direction", "attr_devtype":"FAN-CTRL", "attr_offset":"0x03", "attr_mask":"0x8", "attr_cmpval":"0x8", "attr_len":"1"},
+                { "attr_name":"fan8_direction", "attr_devtype":"FAN-CTRL", "attr_offset":"0x03", "attr_mask":"0x8", "attr_cmpval":"0x8", "attr_len":"1"},               
+                { "attr_name":"fan9_direction", "attr_devtype":"FAN-CTRL", "attr_offset":"0x03", "attr_mask":"0x10", "attr_cmpval":"0x10", "attr_len":"1"},
+                { "attr_name":"fan10_direction", "attr_devtype":"FAN-CTRL", "attr_offset":"0x03", "attr_mask":"0x10", "attr_cmpval":"0x10", "attr_len":"1"},               
+                { "attr_name":"fan1_input", "attr_devtype":"FAN-CTRL", "attr_offset":"0x07", "attr_mask":"0xFF", "attr_len":"1", "attr_mult":"150", "attr_is_divisor":0},
+                { "attr_name":"fan2_input", "attr_devtype":"FAN-CTRL", "attr_offset":"0x0C", "attr_mask":"0xFF", "attr_len":"1", "attr_mult":"150", "attr_is_divisor":0},               
+                { "attr_name":"fan3_input", "attr_devtype":"FAN-CTRL", "attr_offset":"0x08", "attr_mask":"0xFF", "attr_len":"1", "attr_mult":"150", "attr_is_divisor":0},
+                { "attr_name":"fan4_input", "attr_devtype":"FAN-CTRL", "attr_offset":"0x0D", "attr_mask":"0xFF", "attr_len":"1", "attr_mult":"150", "attr_is_divisor":0},               
+                { "attr_name":"fan5_input", "attr_devtype":"FAN-CTRL", "attr_offset":"0x09", "attr_mask":"0xFF", "attr_len":"1", "attr_mult":"150", "attr_is_divisor":0},
+                { "attr_name":"fan6_input", "attr_devtype":"FAN-CTRL", "attr_offset":"0x0E", "attr_mask":"0xFF", "attr_len":"1", "attr_mult":"150", "attr_is_divisor":0},               
+                { "attr_name":"fan7_input", "attr_devtype":"FAN-CTRL", "attr_offset":"0x0A", "attr_mask":"0xFF", "attr_len":"1", "attr_mult":"150" , "attr_is_divisor":0},
+                { "attr_name":"fan8_input", "attr_devtype":"FAN-CTRL", "attr_offset":"0x0F", "attr_mask":"0xFF", "attr_len":"1", "attr_mult":"150" , "attr_is_divisor":0},               
+                { "attr_name":"fan9_input", "attr_devtype":"FAN-CTRL", "attr_offset":"0x0B", "attr_mask":"0xFF", "attr_len":"1", "attr_mult":"150" , "attr_is_divisor":0},
+                { "attr_name":"fan10_input", "attr_devtype":"FAN-CTRL", "attr_offset":"0x10", "attr_mask":"0xFF", "attr_len":"1", "attr_mult":"150" , "attr_is_divisor":0},               
+                { "attr_name":"fan1_pwm", "attr_devtype":"FAN-CTRL", "attr_offset":"0x06", "attr_mask":"0x1F", "attr_len":"1" },
+                { "attr_name":"fan2_pwm", "attr_devtype":"FAN-CTRL", "attr_offset":"0x06", "attr_mask":"0x1F", "attr_len":"1" },
+                { "attr_name":"fan3_pwm", "attr_devtype":"FAN-CTRL", "attr_offset":"0x06", "attr_mask":"0x1F", "attr_len":"1" },
+                { "attr_name":"fan4_pwm", "attr_devtype":"FAN-CTRL", "attr_offset":"0x06", "attr_mask":"0x1F", "attr_len":"1" },
+                { "attr_name":"fan5_pwm", "attr_devtype":"FAN-CTRL", "attr_offset":"0x06", "attr_mask":"0x1F", "attr_len":"1" },
+                { "attr_name":"fan6_pwm", "attr_devtype":"FAN-CTRL", "attr_offset":"0x06", "attr_mask":"0x1F", "attr_len":"1" },
+                { "attr_name":"fan7_pwm", "attr_devtype":"FAN-CTRL", "attr_offset":"0x06", "attr_mask":"0x1F", "attr_len":"1" },
+                { "attr_name":"fan8_pwm", "attr_devtype":"FAN-CTRL", "attr_offset":"0x06", "attr_mask":"0x1F", "attr_len":"1" },
+                { "attr_name":"fan9_pwm", "attr_devtype":"FAN-CTRL", "attr_offset":"0x06", "attr_mask":"0x1F", "attr_len":"1" },
+                { "attr_name":"fan10_pwm", "attr_devtype":"FAN-CTRL", "attr_offset":"0x06", "attr_mask":"0x1F", "attr_len":"1" }
+            ]
+        }
+    },
+    
+    "MUX4":
+    {
+        "dev_info": {  "device_type":"MUX", "device_name":"MUX4", "device_parent":"MUX1"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x2", "dev_addr":"0x71", "dev_type":"pca9548"},
+            "dev_attr": { "virt_bus":"0x1a", "idle_state":"-2"},
+            "channel":
+            [
+                { "chn":"0", "dev":"TEMP1" },
+                { "chn":"1", "dev":"TEMP2" },
+                { "chn":"2", "dev":"TEMP3" },
+                { "chn":"3", "dev":"TEMP4" }
+            ]
+        }
+    },
+    
+    "TEMP1" :
+    {
+        "dev_info": { "device_type":"TEMP_SENSOR", "device_name":"TEMP1", "device_parent":"MUX4"},
+        "dev_attr": { "display_name":"CpuBoard_temp(0x4B)"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x1a", "dev_addr":"0x4B", "dev_type":"lm75"},
+            "attr_list":
+            [
+                { "attr_name": "temp1_high_threshold", "drv_attr_name":"temp1_max"},
+                { "attr_name": "temp1_max_hyst"},
+                { "attr_name": "temp1_input"}
+            ]
+        }
+    },
+    "TEMP2" :
+    {
+        "dev_info": { "device_type":"TEMP_SENSOR", "device_name":"TEMP2", "device_parent":"MUX4"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x1b", "dev_addr":"0x4C", "dev_type":"lm75"},
+            "attr_list":
+            [
+                { "attr_name": "temp1_high_threshold", "drv_attr_name":"temp1_max"},
+                { "attr_name": "temp1_max_hyst"},
+                { "attr_name": "temp1_input"}
+            ]
+        }
+    },
+    "TEMP3" :
+    {
+        "dev_info": { "device_type":"TEMP_SENSOR", "device_name":"TEMP3", "device_parent":"MUX4"},
+        "dev_attr": { "display_name":"MB_RearLeft_temp(0x49)"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x1c", "dev_addr":"0x49", "dev_type":"lm75"},
+            "attr_list":
+            [
+                { "attr_name": "temp1_high_threshold", "drv_attr_name":"temp1_max"},
+                { "attr_name": "temp1_max_hyst"},
+                { "attr_name": "temp1_input"}
+            ]
+        }
+    },
+    "TEMP4" :
+    {
+        "dev_info": { "device_type":"TEMP_SENSOR", "device_name":"TEMP4", "device_parent":"MUX4"},
+        "dev_attr": { "display_name":"MB_RearLeft_temp(0x4A)"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x1d", "dev_addr":"0x4A", "dev_type":"lm75"},
+            "attr_list":
+            [
+                { "attr_name": "temp1_high_threshold", "drv_attr_name":"temp1_max"},
+                { "attr_name": "temp1_max_hyst"},
+                { "attr_name": "temp1_input"}
+            ]
+        }
+    },
+   
+    "SYSSTATUS":
+    {
+        "dev_info":{ "device_type":"SYSSTAT", "device_name":"SYSSTATUS"},
+        "dev_attr":{ },
+        "attr_list":
+        [
+                
+                  { "attr_name":"board_info","attr_devaddr":"0x60", "attr_offset":"0x0","attr_mask":"0xff","attr_len":"0x1"},
+                  { "attr_name":"cpld1_version","attr_devaddr":"0x60","attr_offset":"0x1","attr_mask":"0xff","attr_len":"0x1"},
+                  { "attr_name":"cpld2_version","attr_devaddr":"0x61","attr_offset":"0x1","attr_mask":"0xff","attr_len":"0x1"},
+                  { "attr_name":"cpld3version","attr_devaddr":"0x62","attr_offset":"0x1","attr_mask":"0xff","attr_len":"0x1"},
+                  { "attr_name":"fan_cpld_version","attr_devaddr":"0x63","attr_offset":"0x1","attr_mask":"0xff","attr_len":"0x1"}
+
+        ]
+    },
+   
+    "MUX5":
+    {
+        "dev_info": {  "device_type":"MUX", "device_name":"MUX5", "device_parent":"MUX1"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x3", "dev_addr":"0x70", "dev_type":"pca9548"},
+            "dev_attr": { "virt_bus":"0x22", "idle_state":"-2"},
+            "channel":
+            [
+                { "chn":"0", "dev":"MUX6" },
+                { "chn":"1", "dev":"MUX7" },
+                { "chn":"2", "dev":"MUX8" },
+                { "chn":"3", "dev":"MUX9" },
+                { "chn":"4", "dev":"MUX10" },
+                { "chn":"5", "dev":"MUX11" }
+            ]
+        }
+    },
+    "MUX6":
+    {
+        "dev_info": {  "device_type":"MUX", "device_name":"MUX6", "device_parent":"MUX5"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x22", "dev_addr":"0x71", "dev_type":"pca9548"},
+            "dev_attr": { "virt_bus":"0x2a", "idle_state":"-2"},
+            "channel":
+            [
+                { "chn":"0", "dev":"PORT1" },
+                { "chn":"1", "dev":"PORT2" },
+                { "chn":"2", "dev":"PORT3" },
+                { "chn":"3", "dev":"PORT4" },
+                { "chn":"4", "dev":"PORT5" },
+                { "chn":"5", "dev":"PORT6" },
+                { "chn":"6", "dev":"PORT7" },
+                { "chn":"7", "dev":"PORT8" }     
+            ]
+        }
+    },
+    "MUX7":
+    {
+        "dev_info": {  "device_type":"MUX", "device_name":"MUX7", "device_parent":"MUX5"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x23", "dev_addr":"0x72", "dev_type":"pca9548"},
+            "dev_attr": { "virt_bus":"0x32", "idle_state":"-2"},
+            "channel":
+            [
+                { "chn":"0", "dev":"PORT9" },
+                { "chn":"1", "dev":"PORT10" },
+                { "chn":"2", "dev":"PORT11" },
+                { "chn":"3", "dev":"PORT12" },
+                { "chn":"4", "dev":"PORT13" },
+                { "chn":"5", "dev":"PORT14" },
+                { "chn":"6", "dev":"PORT15" },
+                { "chn":"7", "dev":"PORT16" }     
+            ]
+        }
+    },
+    "MUX8":
+    {
+        "dev_info": {  "device_type":"MUX", "device_name":"MUX8", "device_parent":"MUX5"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x24", "dev_addr":"0x73", "dev_type":"pca9548"},
+            "dev_attr": { "virt_bus":"0x3a", "idle_state":"-2"},
+            "channel":
+            [
+                { "chn":"0", "dev":"PORT17" },
+                { "chn":"1", "dev":"PORT18" },
+                { "chn":"2", "dev":"PORT19" },
+                { "chn":"3", "dev":"PORT20" },
+                { "chn":"4", "dev":"PORT21" },
+                { "chn":"5", "dev":"PORT22" },
+                { "chn":"6", "dev":"PORT23" },
+                { "chn":"7", "dev":"PORT24" }     
+            ]
+        }
+    },
+    "MUX9":
+    {
+        "dev_info": {  "device_type":"MUX", "device_name":"MUX9", "device_parent":"MUX5"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x25", "dev_addr":"0x74", "dev_type":"pca9548"},
+            "dev_attr": { "virt_bus":"0x42", "idle_state":"-2"},
+            "channel":
+            [
+                { "chn":"0", "dev":"PORT25" },
+                { "chn":"1", "dev":"PORT26" },
+                { "chn":"2", "dev":"PORT27" },
+                { "chn":"3", "dev":"PORT28" },
+                { "chn":"4", "dev":"PORT29" },
+                { "chn":"5", "dev":"PORT30" },
+                { "chn":"6", "dev":"PORT31" },
+                { "chn":"7", "dev":"PORT32" }     
+            ]
+        }
+    },
+    "MUX10":
+    {
+        "dev_info": {  "device_type":"MUX", "device_name":"MUX10", "device_parent":"MUX5"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x26", "dev_addr":"0x75", "dev_type":"pca9548"},
+            "dev_attr": { "virt_bus":"0x4a", "idle_state":"-2"},
+            "channel":
+            [
+                { "chn":"0", "dev":"PORT33" },
+                { "chn":"1", "dev":"PORT34" },
+                { "chn":"2", "dev":"PORT35" },
+                { "chn":"3", "dev":"PORT36" },
+                { "chn":"4", "dev":"PORT37" },
+                { "chn":"5", "dev":"PORT38" },
+                { "chn":"6", "dev":"PORT39" },
+                { "chn":"7", "dev":"PORT40" }     
+            ]
+        }
+    },
+    "MUX11":
+    {
+        "dev_info": {  "device_type":"MUX", "device_name":"MUX11", "device_parent":"MUX5"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x27", "dev_addr":"0x76", "dev_type":"pca9548"},
+            "dev_attr": { "virt_bus":"0x52", "idle_state":"-2"},
+            "channel":
+            [
+                { "chn":"0", "dev":"PORT41" },
+                { "chn":"1", "dev":"PORT42" },
+                { "chn":"2", "dev":"PORT43" },
+                { "chn":"3", "dev":"PORT44" },
+                { "chn":"4", "dev":"PORT45" },
+                { "chn":"5", "dev":"PORT46" },
+                { "chn":"6", "dev":"PORT47" },
+                { "chn":"7", "dev":"PORT48" }     
+            ]
+        }
+    },
+    
+    "PORT1":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT1", "device_parent":"MUX6"},
+        "dev_attr": { "dev_idx":"1"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT1-EEPROM" },
+                { "itf":"control", "dev":"PORT1-CTRL" }
+            ]
+        }
+    },
+    "PORT1-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT1-EEPROM", "device_parent":"MUX6", "virt_parent":"PORT1"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x2a", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },    
+    "PORT1-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT1-CTRL", "device_parent":"MUX6", "virt_parent":"PORT1"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x2a", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x8", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_txfault", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x0D", "attr_mask":"0x0", "attr_cmpval":"0x1", "attr_len":"1"},
+                { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x12", "attr_mask":"0x0", "attr_cmpval":"0x1", "attr_len":"1"},
+                { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x17", "attr_mask":"0x0", "attr_cmpval":"0x1", "attr_len":"1"}
+            ]
+        }
+    },
+    
+    "PORT2":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT2", "device_parent":"MUX6"},
+        "dev_attr": { "dev_idx":"2"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT2-EEPROM" },
+                { "itf":"control", "dev":"PORT2-CTRL" }
+            ]
+        }
+    },
+    "PORT2-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT2-EEPROM", "device_parent":"MUX6", "virt_parent":"PORT2"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x2b", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },    
+    "PORT2-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT2-CTRL", "device_parent":"MUX6", "virt_parent":"PORT2"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x2b", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x8", "attr_mask":"0x1", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_txfault", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x0D", "attr_mask":"0x1", "attr_cmpval":"0x2", "attr_len":"1"},
+                { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x12", "attr_mask":"0x1", "attr_cmpval":"0x2", "attr_len":"1"},
+                { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x17", "attr_mask":"0x1", "attr_cmpval":"0x2", "attr_len":"1"}
+            ]
+        }
+    },
+    
+    "PORT3":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT3", "device_parent":"MUX6"},
+        "dev_attr": { "dev_idx":"3"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT3-EEPROM" },
+                { "itf":"control", "dev":"PORT3-CTRL" }
+            ]
+        }
+    },
+    "PORT3-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT3-EEPROM", "device_parent":"MUX6", "virt_parent":"PORT3"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x2c", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },    
+    "PORT3-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT3-CTRL", "device_parent":"MUX6", "virt_parent":"PORT3"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x2c", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x8", "attr_mask":"0x2", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_txfault", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x0D", "attr_mask":"0x2", "attr_cmpval":"0x4", "attr_len":"1"},
+                { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x12", "attr_mask":"0x2", "attr_cmpval":"0x4", "attr_len":"1"},
+                { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x17", "attr_mask":"0x2", "attr_cmpval":"0x4", "attr_len":"1"}
+            ]
+        }
+    },
+    
+    "PORT4":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT4", "device_parent":"MUX6"},
+        "dev_attr": { "dev_idx":"4"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT4-EEPROM" },
+                { "itf":"control", "dev":"PORT4-CTRL" }
+            ]
+        }
+    },
+    "PORT4-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT4-EEPROM", "device_parent":"MUX6", "virt_parent":"PORT4"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x2d", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT4-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT4-CTRL", "device_parent":"MUX6", "virt_parent":"PORT4"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x2d", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x8", "attr_mask":"0x3", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_txfault", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x0D", "attr_mask":"0x3", "attr_cmpval":"0x8", "attr_len":"1"},
+                { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x12", "attr_mask":"0x3", "attr_cmpval":"0x8", "attr_len":"1"},
+                { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x17", "attr_mask":"0x3", "attr_cmpval":"0x8", "attr_len":"1"}
+            ]
+        }
+    },
+    
+    "PORT5":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT5", "device_parent":"MUX6"},
+        "dev_attr": { "dev_idx":"5"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT5-EEPROM" },
+                { "itf":"control", "dev":"PORT5-CTRL" }
+            ]
+        }
+    },
+    "PORT5-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT5-EEPROM", "device_parent":"MUX6", "virt_parent":"PORT5"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x2e", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT5-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT5-CTRL", "device_parent":"MUX6", "virt_parent":"PORT5"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x2e", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x8", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_txfault", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x0D", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"},
+                { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x12", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"},
+                { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x17", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}
+            ]
+        }
+    },
+    
+    "PORT6":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT6", "device_parent":"MUX6"},
+        "dev_attr": { "dev_idx":"6"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT6-EEPROM" },
+                { "itf":"control", "dev":"PORT6-CTRL" }
+            ]
+        }
+    },
+    "PORT6-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT6-EEPROM", "device_parent":"MUX6", "virt_parent":"PORT6"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x2f", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT6-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT6-CTRL", "device_parent":"MUX6", "virt_parent":"PORT6"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x2f", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x8", "attr_mask":"0x5", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_txfault", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x0D", "attr_mask":"0x5", "attr_cmpval":"0x20", "attr_len":"1"},
+                { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x12", "attr_mask":"0x5", "attr_cmpval":"0x20", "attr_len":"1"},
+                { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x17", "attr_mask":"0x5", "attr_cmpval":"0x20", "attr_len":"1"}
+            ]
+        }
+    },
+    
+    "PORT7":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT7", "device_parent":"MUX6"},
+        "dev_attr": { "dev_idx":"7"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT7-EEPROM" },
+                { "itf":"control", "dev":"PORT7-CTRL" }
+            ]
+        }
+    },
+    "PORT7-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT7-EEPROM", "device_parent":"MUX6", "virt_parent":"PORT7"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x30", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT7-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT7-CTRL", "device_parent":"MUX6", "virt_parent":"PORT7"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x30", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x8", "attr_mask":"0x6", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_txfault", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x0D", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"},
+                { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x12", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"},
+                { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x17", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}
+            ]
+        }
+    },
+    
+    "PORT8":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT8", "device_parent":"MUX6"},
+        "dev_attr": { "dev_idx":"8"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT8-EEPROM" },
+                { "itf":"control", "dev":"PORT8-CTRL" }
+            ]
+        }
+    },
+    "PORT8-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT8-EEPROM", "device_parent":"MUX6", "virt_parent":"PORT8"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x31", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT8-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT8-CTRL", "device_parent":"MUX6", "virt_parent":"PORT8"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x31", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x8", "attr_mask":"0x7", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_txfault", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x0D", "attr_mask":"0x7", "attr_cmpval":"0x80", "attr_len":"1"},
+                { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x12", "attr_mask":"0x7", "attr_cmpval":"0x80", "attr_len":"1"},
+                { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x17", "attr_mask":"0x7", "attr_cmpval":"0x80", "attr_len":"1"}
+            ]
+        }
+    },
+    
+    "PORT9":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT9", "device_parent":"MUX7"},
+        "dev_attr": { "dev_idx":"9"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT9-EEPROM" },
+                { "itf":"control", "dev":"PORT9-CTRL" }
+            ]
+        }
+    },
+    "PORT9-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT9-EEPROM", "device_parent":"MUX7", "virt_parent":"PORT9"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x32", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT9-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT9-CTRL", "device_parent":"MUX7", "virt_parent":"PORT9"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x32", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x09", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_txfault", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x0E", "attr_mask":"0x0", "attr_cmpval":"0x1", "attr_len":"1"},
+                { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x13", "attr_mask":"0x0", "attr_cmpval":"0x1", "attr_len":"1"},
+                { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x18", "attr_mask":"0x0", "attr_cmpval":"0x1", "attr_len":"1"}
+            ]
+        }
+    },
+    
+    "PORT10":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT10", "device_parent":"MUX7"},
+        "dev_attr": { "dev_idx":"10"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT10-EEPROM" },
+                { "itf":"control", "dev":"PORT10-CTRL" }
+            ]
+        }
+    },
+    "PORT10-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT10-EEPROM", "device_parent":"MUX7", "virt_parent":"PORT10"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x33", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT10-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT10-CTRL", "device_parent":"MUX7", "virt_parent":"PORT10"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x33", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x09", "attr_mask":"0x1", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_txfault", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x0E", "attr_mask":"0x1", "attr_cmpval":"0x2", "attr_len":"1"},
+                { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x13", "attr_mask":"0x1", "attr_cmpval":"0x2", "attr_len":"1"},
+                { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x18", "attr_mask":"0x1", "attr_cmpval":"0x2", "attr_len":"1"}
+            ]
+        }
+    },
+    
+    "PORT11":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT11", "device_parent":"MUX7"},
+        "dev_attr": { "dev_idx":"11"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT11-EEPROM" },
+                { "itf":"control", "dev":"PORT11-CTRL" }
+            ]
+        }
+    },
+    "PORT11-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT11-EEPROM", "device_parent":"MUX7", "virt_parent":"PORT11"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x34", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT11-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT11-CTRL", "device_parent":"MUX7", "virt_parent":"PORT11"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x34", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x09", "attr_mask":"0x2", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_txfault", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x0E", "attr_mask":"0x2", "attr_cmpval":"0x4", "attr_len":"1"},
+                { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x13", "attr_mask":"0x2", "attr_cmpval":"0x4", "attr_len":"1"},
+                { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x18", "attr_mask":"0x2", "attr_cmpval":"0x4", "attr_len":"1"}
+            ]
+        }
+    },
+     
+    "PORT12":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT12", "device_parent":"MUX7"},
+        "dev_attr": { "dev_idx":"12"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT12-EEPROM" },
+                { "itf":"control", "dev":"PORT12-CTRL" }
+            ]
+        }
+    },
+    "PORT12-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT12-EEPROM", "device_parent":"MUX7", "virt_parent":"PORT12"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x35", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT12-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT12-CTRL", "device_parent":"MUX7", "virt_parent":"PORT12"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x35", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x09", "attr_mask":"0x3", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_txfault", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x0E", "attr_mask":"0x3", "attr_cmpval":"0x8", "attr_len":"1"},
+                { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x13", "attr_mask":"0x3", "attr_cmpval":"0x8", "attr_len":"1"},
+                { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x18", "attr_mask":"0x3", "attr_cmpval":"0x8", "attr_len":"1"}
+            ]
+        }
+    },
+    
+    "PORT13":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT13", "device_parent":"MUX7"},
+        "dev_attr": { "dev_idx":"13"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT13-EEPROM" },
+                { "itf":"control", "dev":"PORT13-CTRL" }
+            ]
+        }
+    },
+    "PORT13-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT13-EEPROM", "device_parent":"MUX7", "virt_parent":"PORT13"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x36", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT13-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT13-CTRL", "device_parent":"MUX7", "virt_parent":"PORT13"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x36", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x09", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_txfault", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x0E", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"},
+                { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x13", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"},
+                { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x18", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}
+            ]
+        }
+    },
+    
+    "PORT14":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT14", "device_parent":"MUX7"},
+        "dev_attr": { "dev_idx":"14"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT14-EEPROM" },
+                { "itf":"control", "dev":"PORT14-CTRL" }
+            ]
+        }
+    },
+    "PORT14-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT14-EEPROM", "device_parent":"MUX7", "virt_parent":"PORT14"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x37", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT14-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT14-CTRL", "device_parent":"MUX7", "virt_parent":"PORT14"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x37", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x09", "attr_mask":"0x5", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_txfault", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x0E", "attr_mask":"0x5", "attr_cmpval":"0x20", "attr_len":"1"},
+                { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x13", "attr_mask":"0x5", "attr_cmpval":"0x20", "attr_len":"1"},
+                { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x18", "attr_mask":"0x5", "attr_cmpval":"0x20", "attr_len":"1"}
+            ]
+        }
+    },
+    
+    "PORT15":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT15", "device_parent":"MUX7"},
+        "dev_attr": { "dev_idx":"15"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT15-EEPROM" },
+                { "itf":"control", "dev":"PORT15-CTRL" }
+            ]
+        }
+    },
+    "PORT15-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT15-EEPROM", "device_parent":"MUX7", "virt_parent":"PORT15"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x38", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT15-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT15-CTRL", "device_parent":"MUX7", "virt_parent":"PORT15"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x38", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x09", "attr_mask":"0x6", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_txfault", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x0E", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"},
+                { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x13", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"},
+                { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x18", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}
+            ]
+        }
+    },
+    
+    "PORT16":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT16", "device_parent":"MUX7"},
+        "dev_attr": { "dev_idx":"16"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT16-EEPROM" },
+                { "itf":"control", "dev":"PORT16-CTRL" }
+            ]
+        }
+    },
+    "PORT16-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT16-EEPROM", "device_parent":"MUX7", "virt_parent":"PORT16"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x39", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT16-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT16-CTRL", "device_parent":"MUX7", "virt_parent":"PORT16"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x39", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x09", "attr_mask":"0x7", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_txfault", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x0E", "attr_mask":"0x7", "attr_cmpval":"0x80", "attr_len":"1"},
+                { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x13", "attr_mask":"0x7", "attr_cmpval":"0x80", "attr_len":"1"},
+                { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x18", "attr_mask":"0x7", "attr_cmpval":"0x80", "attr_len":"1"}
+            ]
+        }
+    },
+    
+    "PORT17":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT17", "device_parent":"MUX8"},
+        "dev_attr": { "dev_idx":"17"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT17-EEPROM" },
+                { "itf":"control", "dev":"PORT17-CTRL" }
+            ]
+        }
+    },
+    "PORT17-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT17-EEPROM", "device_parent":"MUX8", "virt_parent":"PORT17"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x3a", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT17-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT17-CTRL", "device_parent":"MUX8", "virt_parent":"PORT17"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x3a", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x0A", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_txfault", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x0F", "attr_mask":"0x0", "attr_cmpval":"0x1", "attr_len":"1"},
+                { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x14", "attr_mask":"0x0", "attr_cmpval":"0x1", "attr_len":"1"},
+                { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x19", "attr_mask":"0x0", "attr_cmpval":"0x1", "attr_len":"1"}
+            ]
+        }
+    },
+    
+    "PORT18":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT18", "device_parent":"MUX8"},
+        "dev_attr": { "dev_idx":"18"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT18-EEPROM" },
+                { "itf":"control", "dev":"PORT18-CTRL" }
+            ]
+        }
+    },
+    "PORT18-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT18-EEPROM", "device_parent":"MUX8", "virt_parent":"PORT18"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x3b", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT18-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT18-CTRL", "device_parent":"MUX8", "virt_parent":"PORT18"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x3b", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x0A", "attr_mask":"0x1", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_txfault", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x0F", "attr_mask":"0x1", "attr_cmpval":"0x2", "attr_len":"1"},
+                { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x14", "attr_mask":"0x1", "attr_cmpval":"0x2", "attr_len":"1"},
+                { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x19", "attr_mask":"0x1", "attr_cmpval":"0x2", "attr_len":"1"}
+            ]
+        }
+    },
+    
+    "PORT19":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT19", "device_parent":"MUX8"},
+        "dev_attr": { "dev_idx":"19"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT19-EEPROM" },
+                { "itf":"control", "dev":"PORT19-CTRL" }
+            ]
+        }
+    },
+    "PORT19-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT19-EEPROM", "device_parent":"MUX8", "virt_parent":"PORT19"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x3c", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT19-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT19-CTRL", "device_parent":"MUX8", "virt_parent":"PORT19"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x3c", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x0A", "attr_mask":"0x2", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_txfault", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x0F", "attr_mask":"0x2", "attr_cmpval":"0x4", "attr_len":"1"},
+                { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x14", "attr_mask":"0x2", "attr_cmpval":"0x4", "attr_len":"1"},
+                { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x19", "attr_mask":"0x2", "attr_cmpval":"0x4", "attr_len":"1"}
+            ]
+        }
+    },
+    
+    "PORT20":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT20", "device_parent":"MUX8"},
+        "dev_attr": { "dev_idx":"20"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT20-EEPROM" },
+                { "itf":"control", "dev":"PORT20-CTRL" }
+            ]
+        }
+    },
+    "PORT20-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT20-EEPROM", "device_parent":"MUX8", "virt_parent":"PORT20"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x3d", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT20-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT20-CTRL", "device_parent":"MUX8", "virt_parent":"PORT20"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x3d", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x0A", "attr_mask":"0x3", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_txfault", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x0F", "attr_mask":"0x3", "attr_cmpval":"0x8", "attr_len":"1"},
+                { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x14", "attr_mask":"0x3", "attr_cmpval":"0x8", "attr_len":"1"},
+                { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x19", "attr_mask":"0x3", "attr_cmpval":"0x8", "attr_len":"1"}
+            ]
+        }
+    },
+    
+    "PORT21":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT21", "device_parent":"MUX8"},
+        "dev_attr": { "dev_idx":"21"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT21-EEPROM" },
+                { "itf":"control", "dev":"PORT21-CTRL" }
+            ]
+        }
+    },
+    "PORT21-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT21-EEPROM", "device_parent":"MUX8", "virt_parent":"PORT21"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x3e", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT21-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT21-CTRL", "device_parent":"MUX8", "virt_parent":"PORT21"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x3e", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x0A", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_txfault", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x0F", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"},
+                { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x14", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"},
+                { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x19", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}
+            ]
+        }
+    },
+    
+    "PORT22":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT22", "device_parent":"MUX8"},
+        "dev_attr": { "dev_idx":"22"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT22-EEPROM" },
+                { "itf":"control", "dev":"PORT22-CTRL" }
+            ]
+        }
+    },
+    "PORT22-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT22-EEPROM", "device_parent":"MUX8", "virt_parent":"PORT22"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x3f", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT22-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT22-CTRL", "device_parent":"MUX8", "virt_parent":"PORT22"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x3f", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x0A", "attr_mask":"0x5", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_txfault", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x0F", "attr_mask":"0x5", "attr_cmpval":"0x20", "attr_len":"1"},
+                { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x14", "attr_mask":"0x5", "attr_cmpval":"0x20", "attr_len":"1"},
+                { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x19", "attr_mask":"0x5", "attr_cmpval":"0x20", "attr_len":"1"}
+            ]
+        }
+    },
+    
+    "PORT23":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT23", "device_parent":"MUX8"},
+        "dev_attr": { "dev_idx":"23"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT23-EEPROM" },
+                { "itf":"control", "dev":"PORT23-CTRL" }
+            ]
+        }
+    },
+    "PORT23-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT23-EEPROM", "device_parent":"MUX8", "virt_parent":"PORT23"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x40", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT23-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT23-CTRL", "device_parent":"MUX8", "virt_parent":"PORT23"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x40", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x0A", "attr_mask":"0x6", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_txfault", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x0F", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"},
+                { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x14", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"},
+                { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x19", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}
+            ]
+        }
+    },
+    
+    "PORT24":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT24", "device_parent":"MUX8"},
+        "dev_attr": { "dev_idx":"24"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT24-EEPROM" },
+                { "itf":"control", "dev":"PORT24-CTRL" }
+            ]
+        }
+    },
+    "PORT24-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT24-EEPROM", "device_parent":"MUX8", "virt_parent":"PORT24"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x41", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT24-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT24-CTRL", "device_parent":"MUX8", "virt_parent":"PORT24"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x41", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x0A", "attr_mask":"0x7", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_txfault", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x0F", "attr_mask":"0x7", "attr_cmpval":"0x80", "attr_len":"1"},
+                { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x14", "attr_mask":"0x7", "attr_cmpval":"0x80", "attr_len":"1"},
+                { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x19", "attr_mask":"0x7", "attr_cmpval":"0x80", "attr_len":"1"}
+            ]
+        }
+    },
+    
+    "PORT25":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT25", "device_parent":"MUX9"},
+        "dev_attr": { "dev_idx":"25"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT25-EEPROM" },
+                { "itf":"control", "dev":"PORT25-CTRL" }
+            ]
+        }
+    },
+    "PORT25-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT25-EEPROM", "device_parent":"MUX9", "virt_parent":"PORT25"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x42", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT25-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT25-CTRL", "device_parent":"MUX9", "virt_parent":"PORT25"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x42", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2","attr_offset":"0x0B", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_txfault", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2","attr_offset":"0x10", "attr_mask":"0x0", "attr_cmpval":"0x1", "attr_len":"1"},
+                { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2","attr_offset":"0x15", "attr_mask":"0x0", "attr_cmpval":"0x1", "attr_len":"1"},
+                { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2","attr_offset":"0x1A", "attr_mask":"0x0", "attr_cmpval":"0x1", "attr_len":"1"}
+            ]
+        }
+    },
+    
+    "PORT26":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT26", "device_parent":"MUX9"},
+        "dev_attr": { "dev_idx":"26"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT26-EEPROM" },
+                { "itf":"control", "dev":"PORT26-CTRL" }
+            ]
+        }
+    },
+    "PORT26-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT26-EEPROM", "device_parent":"MUX9", "virt_parent":"PORT26"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x43", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT26-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT26-CTRL", "device_parent":"MUX9", "virt_parent":"PORT26"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x43", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2","attr_offset":"0x0B", "attr_mask":"0x1", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_txfault", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2","attr_offset":"0x10", "attr_mask":"0x1", "attr_cmpval":"0x2", "attr_len":"1"},
+                { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2","attr_offset":"0x15", "attr_mask":"0x1", "attr_cmpval":"0x2", "attr_len":"1"},
+                { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2","attr_offset":"0x1A", "attr_mask":"0x1", "attr_cmpval":"0x2", "attr_len":"1"}
+            ]
+        }
+    },
+    
+    "PORT27":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT27", "device_parent":"MUX9"},
+        "dev_attr": { "dev_idx":"27"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT27-EEPROM" },
+                { "itf":"control", "dev":"PORT27-CTRL" }
+            ]
+        }
+    },
+    "PORT27-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT27-EEPROM", "device_parent":"MUX9", "virt_parent":"PORT27"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x44", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT27-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT27-CTRL", "device_parent":"MUX9", "virt_parent":"PORT27"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x44", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2","attr_offset":"0x0B", "attr_mask":"0x2", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_txfault", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2","attr_offset":"0x10", "attr_mask":"0x2", "attr_cmpval":"0x4", "attr_len":"1"},
+                { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x61", "attr_devtype":"cpld","attr_devname":"CPLD2", "attr_offset":"0x15", "attr_mask":"0x2", "attr_cmpval":"0x4", "attr_len":"1"},
+                { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2","attr_offset":"0x1A", "attr_mask":"0x2", "attr_cmpval":"0x4", "attr_len":"1"}
+            ]
+        }
+    },
+    
+    "PORT28":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT28", "device_parent":"MUX9"},
+        "dev_attr": { "dev_idx":"28"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT28-EEPROM" },
+                { "itf":"control", "dev":"PORT28-CTRL" }
+            ]
+        }
+    },
+    "PORT28-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT28-EEPROM", "device_parent":"MUX9", "virt_parent":"PORT28"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x45", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT28-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT28-CTRL", "device_parent":"MUX9", "virt_parent":"PORT28"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x45", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2","attr_offset":"0x0B", "attr_mask":"0x3", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_txfault", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2","attr_offset":"0x10", "attr_mask":"0x3", "attr_cmpval":"0x8", "attr_len":"1"},
+                { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2","attr_offset":"0x15", "attr_mask":"0x3", "attr_cmpval":"0x8", "attr_len":"1"},
+                { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2","attr_offset":"0x1A", "attr_mask":"0x3", "attr_cmpval":"0x8", "attr_len":"1"}
+            ]
+        }
+    },
+    
+    "PORT29":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT29", "device_parent":"MUX9"},
+        "dev_attr": { "dev_idx":"29"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT29-EEPROM" },
+                { "itf":"control", "dev":"PORT29-CTRL" }
+            ]
+        }
+    },
+    "PORT29-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT29-EEPROM", "device_parent":"MUX9", "virt_parent":"PORT29"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x46", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT29-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT29-CTRL", "device_parent":"MUX9", "virt_parent":"PORT29"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x46", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2","attr_offset":"0x0B", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_txfault", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2","attr_offset":"0x10", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"},
+                { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2","attr_offset":"0x15", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"},
+                { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2","attr_offset":"0x1A", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}
+            ]
+        }
+    },
+    
+    "PORT30":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT30", "device_parent":"MUX9"},
+        "dev_attr": { "dev_idx":"30"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT30-EEPROM" },
+                { "itf":"control", "dev":"PORT30-CTRL" }
+            ]
+        }
+    },
+    "PORT30-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT30-EEPROM", "device_parent":"MUX9", "virt_parent":"PORT30"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x47", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT30-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT30-CTRL", "device_parent":"MUX9", "virt_parent":"PORT30"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x47", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x0B", "attr_mask":"0x5", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_txfault", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x10", "attr_mask":"0x5", "attr_cmpval":"0x20", "attr_len":"1"},
+                { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x61", "attr_devtype":"cpld","attr_devname":"CPLD2", "attr_offset":"0x15", "attr_mask":"0x5", "attr_cmpval":"0x20", "attr_len":"1"},
+                { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x1A", "attr_mask":"0x5", "attr_cmpval":"0x20", "attr_len":"1"}
+            ]
+        }
+    },
+    
+    "PORT31":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT31", "device_parent":"MUX9"},
+        "dev_attr": { "dev_idx":"31"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT31-EEPROM" },
+                { "itf":"control", "dev":"PORT31-CTRL" }
+            ]
+        }
+    },
+    "PORT31-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT31-EEPROM", "device_parent":"MUX9", "virt_parent":"PORT31"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x48", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT31-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT31-CTRL", "device_parent":"MUX9", "virt_parent":"PORT31"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x48", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2","attr_offset":"0x0B", "attr_mask":"0x6", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_txfault", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2","attr_offset":"0x10", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"},
+                { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2","attr_offset":"0x15", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"},
+                { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2","attr_offset":"0x1A", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}
+            ]
+        }
+    },
+    
+    "PORT32":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT32", "device_parent":"MUX9"},
+        "dev_attr": { "dev_idx":"32"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT32-EEPROM" },
+                { "itf":"control", "dev":"PORT32-CTRL" }
+            ]
+        }
+    },
+    "PORT32-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT32-EEPROM", "device_parent":"MUX9", "virt_parent":"PORT32"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x49", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT32-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT32-CTRL", "device_parent":"MUX9", "virt_parent":"PORT32"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x49", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x0B", "attr_mask":"0x7", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_txfault", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x10", "attr_mask":"0x7", "attr_cmpval":"0x80", "attr_len":"1"},
+                { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x61", "attr_devtype":"cpld","attr_devname":"CPLD2", "attr_offset":"0x15", "attr_mask":"0x7", "attr_cmpval":"0x80", "attr_len":"1"},
+                { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x1A", "attr_mask":"0x7", "attr_cmpval":"0x80", "attr_len":"1"}
+            ]
+        }
+    },
+    
+    "PORT33":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT33", "device_parent":"MUX10"},
+        "dev_attr": { "dev_idx":"33"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT33-EEPROM" },
+                { "itf":"control", "dev":"PORT33-CTRL" }
+            ]
+        }
+    },
+    "PORT33-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT33-EEPROM", "device_parent":"MUX10", "virt_parent":"PORT33"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x4a", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT33-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT33-CTRL", "device_parent":"MUX10", "virt_parent":"PORT33"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x4a", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x0C", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_txfault", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x11", "attr_mask":"0x0", "attr_cmpval":"0x1", "attr_len":"1"},
+                { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x16", "attr_mask":"0x0", "attr_cmpval":"0x1", "attr_len":"1"},
+                { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x1B", "attr_mask":"0x0", "attr_cmpval":"0x1", "attr_len":"1"}
+            ]
+        }
+    },
+    
+    "PORT34":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT34", "device_parent":"MUX10"},
+        "dev_attr": { "dev_idx":"34"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT34-EEPROM" },
+                { "itf":"control", "dev":"PORT34-CTRL" }
+            ]
+        }
+    },
+    "PORT34-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT34-EEPROM", "device_parent":"MUX10", "virt_parent":"PORT34"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x4b", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT34-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT34-CTRL", "device_parent":"MUX10", "virt_parent":"PORT34"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x4b", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x0C", "attr_mask":"0x1", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_txfault", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x11", "attr_mask":"0x1", "attr_cmpval":"0x2", "attr_len":"1"},
+                { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x16", "attr_mask":"0x1", "attr_cmpval":"0x2", "attr_len":"1"},
+                { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x1B", "attr_mask":"0x1", "attr_cmpval":"0x2", "attr_len":"1"}
+            ]
+        }
+    },
+    
+    "PORT35":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT35", "device_parent":"MUX10"},
+        "dev_attr": { "dev_idx":"35"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT35-EEPROM" },
+                { "itf":"control", "dev":"PORT35-CTRL" }
+            ]
+        }
+    },
+    "PORT35-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT35-EEPROM", "device_parent":"MUX10", "virt_parent":"PORT35"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x4c", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT35-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT35-CTRL", "device_parent":"MUX10", "virt_parent":"PORT35"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x4c", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x0C", "attr_mask":"0x2", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_txfault", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x11", "attr_mask":"0x2", "attr_cmpval":"0x4", "attr_len":"1"},
+                { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x16", "attr_mask":"0x2", "attr_cmpval":"0x4", "attr_len":"1"},
+                { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x1B", "attr_mask":"0x2", "attr_cmpval":"0x4", "attr_len":"1"}
+            ]
+        }
+    },
+    
+    "PORT36":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT36", "device_parent":"MUX10"},
+        "dev_attr": { "dev_idx":"36"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT36-EEPROM" },
+                { "itf":"control", "dev":"PORT36-CTRL" }
+            ]
+        }
+    },
+    "PORT36-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT36-EEPROM", "device_parent":"MUX10", "virt_parent":"PORT36"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x4d", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT36-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT36-CTRL", "device_parent":"MUX10", "virt_parent":"PORT36"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x4d", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x0C", "attr_mask":"0x3", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_txfault", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x11", "attr_mask":"0x3", "attr_cmpval":"0x8", "attr_len":"1"},
+                { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x16", "attr_mask":"0x3", "attr_cmpval":"0x8", "attr_len":"1"},
+                { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x1B", "attr_mask":"0x3", "attr_cmpval":"0x8", "attr_len":"1"}
+            ]
+        }
+    },
+    
+    "PORT37":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT37", "device_parent":"MUX10"},
+        "dev_attr": { "dev_idx":"37"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT37-EEPROM" },
+                { "itf":"control", "dev":"PORT37-CTRL" }
+            ]
+        }
+    },
+    "PORT37-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT37-EEPROM", "device_parent":"MUX10", "virt_parent":"PORT37"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x4e", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT37-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT37-CTRL", "device_parent":"MUX10", "virt_parent":"PORT37"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x4e", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x0C", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_txfault", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x11", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"},
+                { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x16", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"},
+                { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x1B", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}
+            ]
+        }
+    },
+    
+    "PORT38":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT38", "device_parent":"MUX10"},
+        "dev_attr": { "dev_idx":"38"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT38-EEPROM" },
+                { "itf":"control", "dev":"PORT38-CTRL" }
+            ]
+        }
+    },
+    "PORT38-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT38-EEPROM", "device_parent":"MUX10", "virt_parent":"PORT38"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x4f", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT38-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT38-CTRL", "device_parent":"MUX10", "virt_parent":"PORT38"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x4f", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x0C", "attr_mask":"0x5", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_txfault", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x11", "attr_mask":"0x5", "attr_cmpval":"0x20", "attr_len":"1"},
+                { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x16", "attr_mask":"0x5", "attr_cmpval":"0x20", "attr_len":"1"},
+                { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x61", "attr_devtype":"cpld", "attr_devname":"CPLD2", "attr_offset":"0x1B", "attr_mask":"0x5", "attr_cmpval":"0x20", "attr_len":"1"}
+            ]
+        }
+    },
+    
+    "PORT39":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT39", "device_parent":"MUX10"},
+        "dev_attr": { "dev_idx":"39"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT39-EEPROM" },
+                { "itf":"control", "dev":"PORT39-CTRL" }
+            ]
+        }
+    },
+    "PORT39-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT39-EEPROM", "device_parent":"MUX10", "virt_parent":"PORT39"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x50", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT39-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT39-CTRL", "device_parent":"MUX10", "virt_parent":"PORT39"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x50", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x62", "attr_devtype":"cpld", "attr_devname":"CPLD3", "attr_offset":"0x06", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_txfault", "attr_devaddr":"0x62", "attr_devtype":"cpld", "attr_devname":"CPLD3", "attr_offset":"0x09", "attr_mask":"0x0", "attr_cmpval":"0x1", "attr_len":"1"},
+                { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x62", "attr_devtype":"cpld", "attr_devname":"CPLD3", "attr_offset":"0x0C", "attr_mask":"0x0", "attr_cmpval":"0x1", "attr_len":"1"},
+                { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x62", "attr_devtype":"cpld", "attr_devname":"CPLD3", "attr_offset":"0x0F", "attr_mask":"0x0", "attr_cmpval":"0x1", "attr_len":"1"}
+            ]
+        }
+    },
+    
+    "PORT40":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT40", "device_parent":"MUX10"},
+        "dev_attr": { "dev_idx":"40"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT40-EEPROM" },
+                { "itf":"control", "dev":"PORT40-CTRL" }
+            ]
+        }
+    },
+    "PORT40-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT40-EEPROM", "device_parent":"MUX10", "virt_parent":"PORT40"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x51", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT40-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT40-CTRL", "device_parent":"MUX10", "virt_parent":"PORT40"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x51", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                 { "attr_name":"xcvr_present", "attr_devaddr":"0x62", "attr_devtype":"cpld", "attr_devname":"CPLD3", "attr_offset":"0x06", "attr_mask":"0x1", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_txfault", "attr_devaddr":"0x62", "attr_devtype":"cpld", "attr_devname":"CPLD3", "attr_offset":"0x09", "attr_mask":"0x1", "attr_cmpval":"0x2", "attr_len":"1"},
+                { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x62", "attr_devtype":"cpld", "attr_devname":"CPLD3", "attr_offset":"0x0C", "attr_mask":"0x1", "attr_cmpval":"0x2", "attr_len":"1"},
+                { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x62", "attr_devtype":"cpld", "attr_devname":"CPLD3", "attr_offset":"0x0F", "attr_mask":"0x1", "attr_cmpval":"0x2", "attr_len":"1"}
+            ]
+        }
+    },
+    
+    "PORT41":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT41", "device_parent":"MUX11"},
+        "dev_attr": { "dev_idx":"41"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT41-EEPROM" },
+                { "itf":"control", "dev":"PORT41-CTRL" }
+            ]
+        }
+    },
+    "PORT41-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT41-EEPROM", "device_parent":"MUX11", "virt_parent":"PORT41"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x52", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT41-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT41-CTRL", "device_parent":"MUX11", "virt_parent":"PORT41"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x52", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                 { "attr_name":"xcvr_present", "attr_devaddr":"0x62", "attr_devtype":"cpld", "attr_devname":"CPLD3", "attr_offset":"0x06", "attr_mask":"0x2", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_txfault", "attr_devaddr":"0x62", "attr_devtype":"cpld", "attr_devname":"CPLD3", "attr_offset":"0x09", "attr_mask":"0x2", "attr_cmpval":"0x4", "attr_len":"1"},
+                { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x62", "attr_devtype":"cpld", "attr_devname":"CPLD3", "attr_offset":"0x0C", "attr_mask":"0x2", "attr_cmpval":"0x4", "attr_len":"1"},
+                { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x62", "attr_devtype":"cpld", "attr_devname":"CPLD3", "attr_offset":"0x0F", "attr_mask":"0x2", "attr_cmpval":"0x4", "attr_len":"1"}
+            ]
+        }
+    },
+    
+    "PORT42":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT42", "device_parent":"MUX11"},
+        "dev_attr": { "dev_idx":"42"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT42-EEPROM" },
+                { "itf":"control", "dev":"PORT42-CTRL" }
+            ]
+        }
+    },
+    "PORT42-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT42-EEPROM", "device_parent":"MUX11", "virt_parent":"PORT42"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x53", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT42-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT42-CTRL", "device_parent":"MUX11", "virt_parent":"PORT42"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x53", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x62", "attr_devtype":"cpld", "attr_devname":"CPLD3", "attr_offset":"0x06", "attr_mask":"0x3", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_txfault", "attr_devaddr":"0x62", "attr_devtype":"cpld", "attr_devname":"CPLD3", "attr_offset":"0x09", "attr_mask":"0x3", "attr_cmpval":"0x8", "attr_len":"1"},
+                { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x62", "attr_devtype":"cpld", "attr_devname":"CPLD3", "attr_offset":"0x0C", "attr_mask":"0x3", "attr_cmpval":"0x8", "attr_len":"1"},
+                { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x62", "attr_devtype":"cpld", "attr_devname":"CPLD3", "attr_offset":"0x0F", "attr_mask":"0x3", "attr_cmpval":"0x8", "attr_len":"1"}
+            ]
+        }
+    },
+    
+    "PORT43":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT43", "device_parent":"MUX11"},
+        "dev_attr": { "dev_idx":"43"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT43-EEPROM" },
+                { "itf":"control", "dev":"PORT43-CTRL" }
+            ]
+        }
+    },
+    "PORT43-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT43-EEPROM", "device_parent":"MUX11", "virt_parent":"PORT43"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x54", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT43-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT43-CTRL", "device_parent":"MUX11", "virt_parent":"PORT43"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x54", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x62", "attr_devtype":"cpld", "attr_devname":"CPLD3","attr_offset":"0x06", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_txfault", "attr_devaddr":"0x62", "attr_devtype":"cpld", "attr_devname":"CPLD3","attr_offset":"0x09", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"},
+                { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x62", "attr_devtype":"cpld", "attr_devname":"CPLD3","attr_offset":"0x0C", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"},
+                { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x62", "attr_devtype":"cpld", "attr_devname":"CPLD3","attr_offset":"0x0F", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}
+            ]
+        }
+    },
+    
+    "PORT44":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT44", "device_parent":"MUX11"},
+        "dev_attr": { "dev_idx":"44"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT44-EEPROM" },
+                { "itf":"control", "dev":"PORT44-CTRL" }
+            ]
+        }
+    },
+    "PORT44-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT44-EEPROM", "device_parent":"MUX11", "virt_parent":"PORT44"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x55", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT44-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT44-CTRL", "device_parent":"MUX11", "virt_parent":"PORT44"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x55", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x62", "attr_devtype":"cpld", "attr_devname":"CPLD3", "attr_offset":"0x06", "attr_mask":"0x5", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_txfault", "attr_devaddr":"0x62", "attr_devtype":"cpld", "attr_devname":"CPLD3", "attr_offset":"0x09", "attr_mask":"0x5", "attr_cmpval":"0x20", "attr_len":"1"},
+                { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x62", "attr_devtype":"cpld", "attr_devname":"CPLD3", "attr_offset":"0x0C", "attr_mask":"0x5", "attr_cmpval":"0x20", "attr_len":"1"},
+                { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x62", "attr_devtype":"cpld", "attr_devname":"CPLD3", "attr_offset":"0x0F", "attr_mask":"0x5", "attr_cmpval":"0x20", "attr_len":"1"}
+            ]
+        }
+    },
+    
+    "PORT45":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT45", "device_parent":"MUX11"},
+        "dev_attr": { "dev_idx":"45"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT45-EEPROM" },
+                { "itf":"control", "dev":"PORT45-CTRL" }
+            ]
+        }
+    },
+    "PORT45-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT45-EEPROM", "device_parent":"MUX11", "virt_parent":"PORT45"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x56", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT45-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT45-CTRL", "device_parent":"MUX11", "virt_parent":"PORT45"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x56", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x62", "attr_devtype":"cpld", "attr_devname":"CPLD3", "attr_offset":"0x06", "attr_mask":"0x6", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_txfault", "attr_devaddr":"0x62", "attr_devtype":"cpld", "attr_devname":"CPLD3", "attr_offset":"0x09", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"},
+                { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x62", "attr_devtype":"cpld", "attr_devname":"CPLD3", "attr_offset":"0x0C", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"},
+                { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x62", "attr_devtype":"cpld", "attr_devname":"CPLD3", "attr_offset":"0x0F", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}
+            ]
+        }
+    },
+    
+    "PORT46":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT46", "device_parent":"MUX11"},
+        "dev_attr": { "dev_idx":"46"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT46-EEPROM" },
+                { "itf":"control", "dev":"PORT46-CTRL" }
+            ]
+        }
+    },
+    "PORT46-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT46-EEPROM", "device_parent":"MUX11", "virt_parent":"PORT46"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x57", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT46-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT46-CTRL", "device_parent":"MUX11", "virt_parent":"PORT46"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x57", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x62", "attr_devtype":"cpld", "attr_devname":"CPLD3", "attr_offset":"0x06", "attr_mask":"0x7", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_txfault", "attr_devaddr":"0x62", "attr_devtype":"cpld", "attr_devname":"CPLD3", "attr_offset":"0x09", "attr_mask":"0x7", "attr_cmpval":"0x80", "attr_len":"1"},
+                { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x62", "attr_devtype":"cpld", "attr_devname":"CPLD3", "attr_offset":"0x0C", "attr_mask":"0x7", "attr_cmpval":"0x80", "attr_len":"1"},
+                { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x62", "attr_devtype":"cpld", "attr_devname":"CPLD3", "attr_offset":"0x0F", "attr_mask":"0x7", "attr_cmpval":"0x80", "attr_len":"1"}
+            ]
+        }
+    },
+    
+    "PORT47":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT47", "device_parent":"MUX11"},
+        "dev_attr": { "dev_idx":"47"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT47-EEPROM" },
+                { "itf":"control", "dev":"PORT47-CTRL" }
+            ]
+        }
+    },
+    "PORT47-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT47-EEPROM", "device_parent":"MUX11", "virt_parent":"PORT47"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x58", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT47-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT47-CTRL", "device_parent":"MUX11", "virt_parent":"PORT47"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x58", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x62", "attr_devtype":"cpld", "attr_devname":"CPLD3", "attr_offset":"0x07", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_txfault", "attr_devaddr":"0x62", "attr_devtype":"cpld", "attr_devname":"CPLD3", "attr_offset":"0x0A", "attr_mask":"0x0", "attr_cmpval":"0x1", "attr_len":"1"},
+                { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x62", "attr_devtype":"cpld", "attr_devname":"CPLD3", "attr_offset":"0x0D", "attr_mask":"0x0", "attr_cmpval":"0x1", "attr_len":"1"},
+                { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x62", "attr_devtype":"cpld", "attr_devname":"CPLD3", "attr_offset":"0x10", "attr_mask":"0x0", "attr_cmpval":"0x1", "attr_len":"1"}
+            ]
+        }
+    },
+    
+    "PORT48":
+    {
+        "dev_info": { "device_type":"SFP28", "device_name":"PORT48", "device_parent":"MUX11"},
+        "dev_attr": { "dev_idx":"48"},
+        "i2c":
+        {
+            "interface":
+            [
+                { "itf":"eeprom", "dev":"PORT48-EEPROM" },
+                { "itf":"control", "dev":"PORT48-CTRL" }
+            ]
+        }
+    },
+    "PORT48-EEPROM":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT48-EEPROM", "device_parent":"MUX11", "virt_parent":"PORT48"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x59", "dev_addr":"0x50", "dev_type":"optoe1"},
+            "attr_list":
+            [
+                { "attr_name":"eeprom"}
+            ]
+        }
+    },
+    "PORT48-CTRL":
+    {
+        "dev_info": { "device_type":"", "device_name":"PORT48-CTRL", "device_parent":"MUX11", "virt_parent":"PORT48"},
+        "i2c":
+        {
+            "topo_info": { "parent_bus":"0x59", "dev_addr":"0x53", "dev_type":"pddf_xcvr"},
+            "attr_list":
+            [
+                { "attr_name":"xcvr_present", "attr_devaddr":"0x62", "attr_devtype":"cpld", "attr_devname":"CPLD3", "attr_offset":"0x07", "attr_mask":"0x1", "attr_cmpval":"0x0", "attr_len":"1"},
+                { "attr_name":"xcvr_txfault", "attr_devaddr":"0x62", "attr_devtype":"cpld", "attr_devname":"CPLD3", "attr_offset":"0x0A", "attr_mask":"0x1", "attr_cmpval":"0x2", "attr_len":"1"},
+                { "attr_name":"xcvr_txdisable", "attr_devaddr":"0x62", "attr_devtype":"cpld", "attr_devname":"CPLD3", "attr_offset":"0x0D", "attr_mask":"0x1", "attr_cmpval":"0x2", "attr_len":"1"},
+                { "attr_name":"xcvr_rxlos", "attr_devaddr":"0x62", "attr_devtype":"cpld", "attr_devname":"CPLD3", "attr_offset":"0x10", "attr_mask":"0x1", "attr_cmpval":"0x2", "attr_len":"1"}
+            ]
+        }
+    },
+        
+    "LOC_LED":
+    {
+        "dev_info": { "device_type":"LED", "device_name":"LOC_LED"},
+        "dev_attr": { "index":"0"},
+        "i2c" :
+        {
+            "attr_list":
+            [
+                {"attr_name":"amber", "descr": "" , "bits" : "5:4",  "value" : "0x0", "swpld_addr" : "0x60", "swpld_addr_offset" : "0x0A"},
+                {"attr_name":"off", "descr": "" , "bits" : "5:4",  "value" : "0x1", "swpld_addr" : "0x60", "swpld_addr_offset" : "0x0A"}
+                
+            ]
+        }
+    },
+    "DIAG_LED":
+    {
+        "dev_info": { "device_type":"LED", "device_name":"DIAG_LED"},
+         "dev_attr": { "index":"0"},
+         "i2c" :
+         {
+             "attr_list":
+             [
+                 {"attr_name":"green", "descr": "" , "bits" : "3:2", "value" : "0x2", "swpld_addr" : "0x60", "swpld_addr_offset" : "0x0A"},
+                 {"attr_name":"amber", "descr": "" , "bits" : "3:2", "value" : "0x1", "swpld_addr" : "0x60", "swpld_addr_offset" : "0x0A"},
+                 {"attr_name":"off",   "descr": "" , "bits" : "3:2", "value" : "0x3", "swpld_addr" : "0x60", "swpld_addr_offset" : "0x0A"}
+             ]
+        }
+    }
+}
diff --git a/device/accton/x86_64-accton_as5835_54x-r0/pddf_support b/device/accton/x86_64-accton_as5835_54x-r0/pddf_support
new file mode 100644
index 000000000..e69de29bb
diff --git a/device/accton/x86_64-accton_as5835_54x-r0/pmon_daemon_control.json b/device/accton/x86_64-accton_as5835_54x-r0/pmon_daemon_control.json
index a3b204e20..fb49c2978 100644
--- a/device/accton/x86_64-accton_as5835_54x-r0/pmon_daemon_control.json
+++ b/device/accton/x86_64-accton_as5835_54x-r0/pmon_daemon_control.json
@@ -1,5 +1,5 @@
 {
-    "skip_ledd": true,
-    "skip_pcied": true
+    "skip_ledd": true
+
 }
 
diff --git a/device/accton/x86_64-accton_as5835_54x-r0/sensors.conf b/device/accton/x86_64-accton_as5835_54x-r0/sensors.conf
index 38cf89fc6..c220d28f5 100644
--- a/device/accton/x86_64-accton_as5835_54x-r0/sensors.conf
+++ b/device/accton/x86_64-accton_as5835_54x-r0/sensors.conf
@@ -39,13 +39,13 @@ chip "as5835_54x_fan-*"
 
 
 chip "lm75-i2c-*-49"
-    label temp1 "Main Board Temperature"
+    label temp1 "MB_RearLeft_temp"
 
 chip "lm75-i2c-*-4a"
-    label temp1 "Main Board Temperature"
+    label temp1 "MB_RearRight_temp"
 
 chip "lm75-i2c-*-4c"
-    label temp1 "Main Board Temperature"
+    label temp1 "MB_FrontMiddle_temp"
 
 chip "lm75-i2c-*-4b"
-    label temp1 "CPU Board Temperature"
+    label temp1 "CpuBoard_temp"
diff --git a/device/accton/x86_64-accton_as5835_54x-r0/system_health_monitoring_config.json b/device/accton/x86_64-accton_as5835_54x-r0/system_health_monitoring_config.json
index 5f3b3b07e..596dff2d5 100644
--- a/device/accton/x86_64-accton_as5835_54x-r0/system_health_monitoring_config.json
+++ b/device/accton/x86_64-accton_as5835_54x-r0/system_health_monitoring_config.json
@@ -1,15 +1,17 @@
-{
-    "services_to_ignore": [],
-    "devices_to_ignore": [
-        "asic",
-	    "psu.temperature"
-	    
-    ],
-    "user_defined_checkers": [],
-    "polling_interval": 60,
-    "led_color": {
-        "fault": "STATUS_LED_COLOR_AMBER",
-        "normal": "STATUS_LED_COLOR_GREEN",
-        "booting": "STATUS_LED_COLOR_GREEN"
-    }
-}
+{
+    "services_to_ignore": [],
+    "devices_to_ignore": [
+        "asic",
+        "psu.voltage",
+        "psu.temperature",
+        "PSU1_FAN1.speed",
+        "PSU2_FAN1.speed"
+    ],
+    "user_defined_checkers": [],
+    "polling_interval": 60,
+    "led_color": {
+        "fault": "STATUS_LED_COLOR_AMBER",
+        "normal": "STATUS_LED_COLOR_GREEN",
+        "booting": "STATUS_LED_COLOR_GREEN"
+    }
+}
diff --git a/platform/broadcom/sonic-platform-modules-accton/as5835-54x/modules/Makefile b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/modules/Makefile
index ec29de5fe..eafc97032 100644
--- a/platform/broadcom/sonic-platform-modules-accton/as5835-54x/modules/Makefile
+++ b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/modules/Makefile
@@ -1,8 +1,11 @@
 ifneq ($(KERNELRELEASE),)
 obj-m:= accton_as5835_54x_cpld.o accton_as5835_54x_psu.o  \
         accton_as5835_54x_fan.o accton_as5835_54x_leds.o \
-        ym2651y.o
+        ym2651y.o pddf_custom_psu.o
          
+CFLAGS_pddf_custom_psu.o := -I$(M)/../../../../pddf/i2c/modules/include
+KBUILD_EXTRA_SYMBOLS := $(M)/../../../../pddf/i2c/Module.symvers.PDDF
+
 else
 ifeq (,$(KERNEL_SRC))
 $(error KERNEL_SRC is not defined)
diff --git a/platform/broadcom/sonic-platform-modules-accton/as5835-54x/modules/pddf_custom_psu.c b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/modules/pddf_custom_psu.c
new file mode 100644
index 000000000..1591267b0
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/modules/pddf_custom_psu.c
@@ -0,0 +1,117 @@
+#include <linux/module.h>
+#include <linux/jiffies.h>
+#include <linux/i2c.h>
+#include <linux/hwmon.h>
+#include <linux/hwmon-sysfs.h>
+#include <linux/err.h>
+#include <linux/delay.h>
+#include <linux/mutex.h>
+#include <linux/sysfs.h>
+#include <linux/slab.h>
+#include <linux/dmi.h>
+#include "pddf_psu_defs.h"
+
+ssize_t pddf_show_custom_psu_v_out(struct device *dev, struct device_attribute *da, char *buf);
+extern PSU_SYSFS_ATTR_DATA access_psu_v_out;
+
+static int two_complement_to_int(u16 data, u8 valid_bit, int mask)
+{
+	u16  valid_data  = data & mask;
+	bool is_negative = valid_data >> (valid_bit - 1);
+
+	return is_negative ? (-(((~valid_data) & mask) + 1)) : valid_data;
+}
+
+static u8 psu_get_vout_mode(struct i2c_client *client)
+{
+	u8 status = 0, retry = 10;
+	uint8_t offset = 0x20; // VOUT_MODE
+
+	while (retry) {
+		status = i2c_smbus_read_byte_data((struct i2c_client *)client, offset);
+		if (unlikely(status < 0)) {
+			msleep(60);
+			retry--;
+			continue;
+		}
+		break;
+	}
+
+	if (status < 0)
+	{
+		printk(KERN_ERR "%s: Get PSU Vout mode failed\n", __func__);
+		return 0;
+	}
+	else
+	{
+		/*printk(KERN_ERR "%s: vout_mode reg value 0x%x\n", __func__, status);*/
+		return status;
+	}
+}
+
+static u16 psu_get_v_out(struct i2c_client *client)
+{
+	u16 status = 0, retry = 10;
+	uint8_t offset = 0x8b; // READ_VOUT
+
+	while (retry) {
+		status = i2c_smbus_read_word_data((struct i2c_client *)client, offset);
+		if (unlikely(status < 0)) {
+			msleep(60);
+			retry--;
+			continue;
+		}
+		break;
+	}
+
+	if (status < 0)
+	{
+		printk(KERN_ERR "%s: Get PSU Vout failed\n", __func__);
+		return 0;
+	}
+	else
+	{
+		/*printk(KERN_ERR "%s: vout reg value 0x%x\n", __func__, status);*/
+		return status;
+	}
+}
+
+ssize_t pddf_show_custom_psu_v_out(struct device *dev, struct device_attribute *da, char *buf)
+{
+	struct i2c_client *client = to_i2c_client(dev);
+	struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
+	int exponent, mantissa;
+	int multiplier = 1000;
+
+	u16 value = psu_get_v_out(client);
+	u8 vout_mode = psu_get_vout_mode(client);
+
+	exponent = two_complement_to_int(vout_mode, 5, 0x1f);
+	mantissa = value;
+	if (exponent >= 0)
+		return sprintf(buf, "%d\n", (mantissa << exponent) * multiplier);
+	else
+		return sprintf(buf, "%d\n", (mantissa * multiplier) / (1 << -exponent));
+}
+
+
+
+static int __init pddf_custom_psu_init(void)
+{
+    access_psu_v_out.show = pddf_show_custom_psu_v_out;
+    access_psu_v_out.do_get = NULL;
+    return 0;
+}
+
+static void __exit pddf_custom_psu_exit(void)
+{
+    return;
+}
+
+MODULE_AUTHOR("Broadcom");
+MODULE_DESCRIPTION("pddf custom psu api");
+MODULE_LICENSE("GPL");
+
+module_init(pddf_custom_psu_init);
+module_exit(pddf_custom_psu_exit);
+
diff --git a/platform/broadcom/sonic-platform-modules-accton/as5835-54x/service/as5835-54x-pddf-platform-monitor.service b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/service/as5835-54x-pddf-platform-monitor.service
new file mode 100644
index 000000000..ddd8d6abb
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/service/as5835-54x-pddf-platform-monitor.service
@@ -0,0 +1,16 @@
+[Unit]
+Description=Accton AS5835-54X Platform Monitoring service
+Before=pmon.service
+After=pddf-platform-init.service
+DefaultDependencies=no
+
+[Service]
+ExecStart=/usr/local/bin/accton_as5835_54x_pddf_monitor.py
+KillSignal=SIGKILL
+SuccessExitStatus=SIGKILL
+
+# Resource Limitations
+LimitCORE=infinity
+
+[Install]
+WantedBy=multi-user.target
diff --git a/platform/broadcom/sonic-platform-modules-accton/as5835-54x/service/pddf-platform-init.service b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/service/pddf-platform-init.service
new file mode 120000
index 000000000..0fd9f25b6
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/service/pddf-platform-init.service
@@ -0,0 +1 @@
+../../../../pddf/i2c/service/pddf-platform-init.service
\ No newline at end of file
diff --git a/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/__init__.py b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/__init__.py
new file mode 100644
index 000000000..cdc3b813f
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/__init__.py
@@ -0,0 +1,3 @@
+# All the derived classes for PDDF
+__all__ = ["platform", "chassis", "sfp", "psu", "thermal", "fan"]
+from . import platform
diff --git a/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/chassis.py b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/chassis.py
new file mode 100644
index 000000000..dc564a980
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/chassis.py
@@ -0,0 +1,119 @@
+#!/usr/bin/env python
+
+#############################################################################
+# PDDF
+# Module contains an implementation of SONiC Chassis API
+#
+#############################################################################
+
+try:
+    import sys
+    from sonic_platform_pddf_base.pddf_chassis import PddfChassis
+    from .event import SfpEvent
+    from .helper import APIHelper
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+NUM_COMPONENT = 6
+HOST_REBOOT_CAUSE_PATH = "/host/reboot-cause/"
+PMON_REBOOT_CAUSE_PATH = "/usr/share/sonic/platform/api_files/reboot-cause/"
+REBOOT_CAUSE_FILE = "reboot-cause.txt"
+
+class Chassis(PddfChassis):
+    """
+    PDDF Platform-specific Chassis class
+    """
+
+    SYSLED_DEV_NAME = "DIAG_LED"
+
+    def __init__(self, pddf_data=None, pddf_plugin_data=None):
+        PddfChassis.__init__(self, pddf_data, pddf_plugin_data)
+        self.__initialize_components()
+        self._api_helper = APIHelper()
+        self._sfpevent = SfpEvent(self.get_all_sfps())
+
+    def __initialize_components(self):
+        from sonic_platform.component import Component
+        for index in range(NUM_COMPONENT):
+            component = Component(index)
+            self._component_list.append(component) 
+
+    # Provide the functions/variables below for which implementation is to be overwritten
+    def get_change_event(self, timeout=0):
+        return self._sfpevent.get_sfp_event(timeout)
+
+    def get_reboot_cause(self):
+        """
+        Retrieves the cause of the previous reboot
+        Returns:
+            A tuple (string, string) where the first element is a string
+            containing the cause of the previous reboot. This string must be
+            one of the predefined strings in this class. If the first string
+            is "REBOOT_CAUSE_HARDWARE_OTHER", the second string can be used
+            to pass a description of the reboot cause.
+        """
+
+        reboot_cause_path = (HOST_REBOOT_CAUSE_PATH + REBOOT_CAUSE_FILE)
+        sw_reboot_cause = self._api_helper.read_txt_file(
+            reboot_cause_path) or "Unknown"
+
+
+        return ('REBOOT_CAUSE_NON_HARDWARE', sw_reboot_cause)
+
+    def is_replaceable(self):
+        """
+        Indicate whether this device is replaceable.
+        Returns:
+            bool: True if it is replaceable.
+        """
+        return False
+
+    def get_position_in_parent(self):
+        """
+        Retrieves 1-based relative physical position in parent device. If the agent cannot determine the parent-relative position
+        for some reason, or if the associated value of entPhysicalContainedIn is '0', then the value '-1' is returned
+        Returns:
+            integer: The 1-based relative physical position in parent device or -1 if cannot determine the position
+        """
+        return -1
+
+
+    def get_sfp(self, index):
+        """
+        Retrieves sfp represented by (1-based) index <index>
+
+        Args:
+            index: An integer, the index (1-based) of the sfp to retrieve.
+            The index should be the sequence of a physical port in a chassis,
+            starting from 1.
+            For example, 1 for Ethernet0, 2 for Ethernet4 and so on.
+
+        Returns:
+            An object derived from SfpBase representing the specified sfp
+        """
+        sfp = None
+
+        try:
+            # The index will start from 1
+            sfp = self._sfp_list[index-1]
+        except IndexError:
+            sys.stderr.write("SFP index {} out of range (1-{})\n".format(
+                             index, len(self._sfp_list)))
+        return sfp
+
+    def initizalize_system_led(self):
+        return
+
+    def get_status_led(self):
+        return self.get_system_led(self.SYSLED_DEV_NAME)
+
+    def set_status_led(self, color):
+        return self.set_system_led(self.SYSLED_DEV_NAME, color)
+
+    def get_port_or_cage_type(self, port):
+        from sonic_platform_base.sfp_base import SfpBase
+        if port in range(1, 48):
+            return SfpBase.SFP_PORT_TYPE_BIT_SFP | SfpBase.SFP_PORT_TYPE_BIT_SFP_PLUS
+        else:
+            return SfpBase.SFP_PORT_TYPE_BIT_QSFP | SfpBase.SFP_PORT_TYPE_BIT_QSFP_PLUS | SfpBase.SFP_PORT_TYPE_BIT_QSFP28
+            
diff --git a/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/component.py b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/component.py
new file mode 100644
index 000000000..9656d717b
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/component.py
@@ -0,0 +1,172 @@
+#############################################################################
+# 
+# Component contains an implementation of SONiC Platform Base API and
+# provides the components firmware management function
+#
+#############################################################################
+
+try:
+    import subprocess
+    from sonic_platform_base.component_base import ComponentBase
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+CPLD_ADDR_MAPPING = {
+    "MB CPLD1": ['3', '0x60'],
+    "MB CPLD2": ['3', '0x61'],
+    "MB CPLD3": ['3', '0x62'],
+    "FAN CPLD": ['3', '0x63'],
+    "CPU CPLD": ['1', '0x65']
+}
+SYSFS_PATH = "/sys/bus/i2c/devices/"
+BIOS_VERSION_PATH = "/sys/class/dmi/id/bios_version"
+COMPONENT_LIST= [
+   ("MB CPLD1", "Mainboard CPLD 1"),
+   ("MB CPLD2", "Mainboard CPLD 2"),
+   ("MB CPLD3", "Mainboard CPLD 3"),
+   ("FAN CPLD", "Fan board CPLD"),
+   ("CPU CPLD", "CPU CPLD"),
+   ("BIOS", "Basic Input/Output System")
+   
+]
+
+class Component(ComponentBase):
+    """Platform-specific Component class"""
+
+    DEVICE_TYPE = "component"
+
+    def __init__(self, component_index=0):
+        self.index = component_index
+        self.name = self.get_name()
+
+    def __run_command(self, command):
+        # Run bash command and print output to stdout
+        try:
+            process = subprocess.Popen(
+                shlex.split(command), stdout=subprocess.PIPE)
+            while True:
+                output = process.stdout.readline()
+                if output == '' and process.poll() is not None:
+                    break
+            rc = process.poll()
+            if rc != 0:
+                return False
+        except Exception:
+            return False
+        return True
+
+    def __get_bios_version(self):
+        # Retrieves the BIOS firmware version
+        try:
+            with open(BIOS_VERSION_PATH, 'r') as fd:
+                bios_version = fd.read()
+                return bios_version.strip()
+        except Exception as e:
+            return None
+   
+    def __get_cpld_version(self):
+        # Retrieves the CPLD firmware version
+        cpld_version = dict()
+        for cpld_name in CPLD_ADDR_MAPPING:
+            cmd = "i2cget -f -y {0} {1} 0x1".format(CPLD_ADDR_MAPPING[cpld_name][0], CPLD_ADDR_MAPPING[cpld_name][1])
+            status, value = subprocess.getstatusoutput(cmd)
+            if not status:
+                cpld_version_raw = value.rstrip()
+                cpld_version[cpld_name] = "{}".format(int(cpld_version_raw,16))
+
+        return cpld_version
+
+    def get_name(self):
+        """
+        Retrieves the name of the component
+         Returns:
+            A string containing the name of the component
+        """
+        return COMPONENT_LIST[self.index][0]
+
+    def get_description(self):
+        """
+        Retrieves the description of the component
+            Returns:
+            A string containing the description of the component
+        """
+        return COMPONENT_LIST[self.index][1]
+
+    def get_firmware_version(self):
+        """
+        Retrieves the firmware version of module
+        Returns:
+            string: The firmware versions of the module
+        """
+        fw_version = None
+
+        if self.name == "BIOS":
+            fw_version = self.__get_bios_version()
+        elif "CPLD" in self.name:
+            cpld_version = self.__get_cpld_version()
+            fw_version = cpld_version.get(self.name)
+
+        return fw_version
+
+    def install_firmware(self, image_path):
+        """
+        Install firmware to module
+        Args:
+            image_path: A string, path to firmware image
+        Returns:
+            A boolean, True if install successfully, False if not
+        """
+        raise NotImplementedError
+
+    def get_presence(self):
+        """
+        Retrieves the presence of the device
+        Returns:
+            bool: True if device is present, False if not
+        """
+        return True
+
+    def get_model(self):
+        """
+        Retrieves the model number (or part number) of the device
+        Returns:
+            string: Model/part number of device
+        """
+        return 'N/A'
+
+    def get_serial(self):
+        """
+        Retrieves the serial number of the device
+        Returns:
+            string: Serial number of device
+        """
+        return 'N/A'
+
+    def get_status(self):
+        """
+        Retrieves the operational status of the device
+        Returns:
+            A boolean value, True if device is operating properly, False if not
+        """
+        return True
+
+    def get_position_in_parent(self):
+        """
+        Retrieves 1-based relative physical position in parent device.
+        If the agent cannot determine the parent-relative position
+        for some reason, or if the associated value of
+        entPhysicalContainedIn is'0', then the value '-1' is returned
+        Returns:
+            integer: The 1-based relative physical position in parent device
+            or -1 if cannot determine the position
+        """
+        return -1
+
+    def is_replaceable(self):
+        """
+        Indicate whether this device is replaceable.
+        Returns:
+            bool: True if it is replaceable.
+        """
+        return False
+
diff --git a/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/eeprom.py b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/eeprom.py
new file mode 100644
index 000000000..ca9b5ce06
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/eeprom.py
@@ -0,0 +1,88 @@
+#!/usr/bin/env python
+
+try:
+    from sonic_platform_pddf_base.pddf_eeprom import PddfEeprom
+    import os
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+CACHE_ROOT = '/var/cache/sonic/decode-syseeprom'
+CACHE_FILE = 'syseeprom_cache'
+
+class Eeprom(PddfEeprom):
+    _TLV_INFO_MAX_LEN = 256
+    pddf_obj = {}
+    plugin_data = {}
+
+    def __init__(self, pddf_data=None, pddf_plugin_data=None):
+        #PddfEeprom.__init__(self, pddf_data, pddf_plugin_data)
+        if not pddf_data or not pddf_plugin_data:
+            raise ValueError('PDDF JSON data error')
+
+        self.pddf_obj = pddf_data
+        self.plugin_data = pddf_plugin_data
+
+        # system EEPROM always has device name EEPROM1
+        self.eeprom_path = self.pddf_obj.get_path("EEPROM1", "eeprom")
+        if self.eeprom_path is None:
+            return
+
+        super(PddfEeprom, self).__init__(self.eeprom_path, 0, '', True)
+        self.eeprom_tlv_dict = dict()
+
+        # Create the cache directory if not created
+        if not os.path.exists(CACHE_ROOT):
+            try:
+                os.makedirs(CACHE_ROOT)
+            except Exception as e:
+                print("Error in creating Eeprom cache directory - {}".format(str(e)))
+
+        # Assign cache_name in eeprom_base.py
+        try:
+            self.set_cache_name(os.path.join(CACHE_ROOT, CACHE_FILE))
+        except:
+            pass
+
+        try:
+            self.eeprom_data = self.read_eeprom()
+        except Exception as e:
+            self.eeprom_data = "N/A"
+            raise RuntimeError("Eeprom is not Programmed - Error: {}".format(str(e)))
+        else:
+            eeprom = self.eeprom_data
+
+            try:
+                self.update_cache(eeprom)
+            except:
+                pass
+
+            if not self.is_valid_tlvinfo_header(eeprom):
+                return
+
+            total_length = ((eeprom[9]) << 8) | (eeprom[10])
+            tlv_index = self._TLV_INFO_HDR_LEN
+            tlv_end = self._TLV_INFO_HDR_LEN + total_length
+
+            while (tlv_index + 2) < len(eeprom) and tlv_index < tlv_end:
+                if not self.is_valid_tlv(eeprom[tlv_index:]):
+                    break
+
+                tlv = eeprom[tlv_index:tlv_index + 2
+                             + (eeprom[tlv_index + 1])]
+                code = "0x%02X" % ((tlv[0]))
+
+                if (tlv[0]) == self._TLV_CODE_VENDOR_EXT:
+                    value = str(((tlv[2]) << 24) | ((tlv[3]) << 16) |
+                                ((tlv[4]) << 8) | (tlv[5]))
+                    value += str(tlv[6:6 + (tlv[1])])
+                else:
+                    name, value = self.decoder(None, tlv)
+
+                self.eeprom_tlv_dict[code] = value
+                if (eeprom[tlv_index]) == self._TLV_CODE_CRC_32:
+                    break
+
+                tlv_index += (eeprom[tlv_index+1]) + 2
+
+
+    # Provide the functions/variables below for which implementation is to be overwritten
diff --git a/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/event.py b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/event.py
new file mode 100644
index 000000000..d5dac6d7f
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/event.py
@@ -0,0 +1,60 @@
+try:
+    import time
+    from sonic_py_common.logger import Logger
+except ImportError as e:
+    raise ImportError(repr(e) + " - required module not found")
+
+POLL_INTERVAL_IN_SEC = 1
+
+class SfpEvent:
+    ''' Listen to insert/remove sfp events '''
+
+    def __init__(self, sfp_list):
+        self._sfp_list = sfp_list
+        self._logger = Logger()
+        self._sfp_change_event_data = {'present': 0}
+
+    def get_presence_bitmap(self):
+        bitmap = 0
+        for sfp in self._sfp_list:
+            modpres = sfp.get_presence()
+            i=sfp.get_position_in_parent() - 1
+            if modpres:
+                bitmap = bitmap | (1 << i)
+        return bitmap
+
+    def get_sfp_event(self, timeout=2000):
+        port_dict = {}
+        change_dict = {}
+        change_dict['sfp'] = port_dict
+
+        if timeout < 1000:
+            cd_ms = 1000
+        else:
+            cd_ms = timeout
+
+        while cd_ms > 0:
+            bitmap = self.get_presence_bitmap()
+            changed_ports = self._sfp_change_event_data['present'] ^ bitmap
+            if changed_ports != 0:
+                break
+            time.sleep(POLL_INTERVAL_IN_SEC)
+            # timeout=0 means wait for event forever
+            if timeout != 0:
+                cd_ms = cd_ms - POLL_INTERVAL_IN_SEC * 1000
+
+        if changed_ports != 0:
+            for sfp in self._sfp_list:
+                i=sfp.get_position_in_parent() - 1
+                if (changed_ports & (1 << i)):
+                    if (bitmap & (1 << i)) == 0:
+                        port_dict[i+1] = '0'
+                    else:
+                        port_dict[i+1] = '1'
+
+
+            # Update the cache dict
+            self._sfp_change_event_data['present'] = bitmap
+            return True, change_dict
+        else:
+            return True, change_dict
diff --git a/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/fan.py b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/fan.py
new file mode 100644
index 000000000..448f483c9
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/fan.py
@@ -0,0 +1,32 @@
+#!/usr/bin/env python
+
+
+try:
+    from sonic_platform_pddf_base.pddf_fan import PddfFan
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+FAN_NAME_LIST = ["FAN-1F", "FAN-1R", "FAN-2F", "FAN-2R",
+                 "FAN-3F", "FAN-3R", "FAN-4F", "FAN-4R",
+                 "FAN-5F", "FAN-5R"]
+
+class Fan(PddfFan):
+    """PDDF Platform-Specific Fan class"""
+
+    def __init__(self, tray_idx, fan_idx=0, pddf_data=None, pddf_plugin_data=None, is_psu_fan=False, psu_index=0):
+        # idx is 0-based 
+        PddfFan.__init__(self, tray_idx, fan_idx, pddf_data, pddf_plugin_data, is_psu_fan, psu_index)
+
+    # Provide the functions/variables below for which implementation is to be overwritten
+
+    def get_name(self):
+        """
+        Retrieves the name of the device
+            Returns:
+            string: The name of the device
+        """
+        fan_name = FAN_NAME_LIST[(self.fantray_index-1)*2 + self.fan_index-1] \
+            if not self.is_psu_fan \
+            else "PSU-{} FAN-{}".format(self.fans_psu_index, self.fan_index)
+
+        return fan_name
diff --git a/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/fan_drawer.py b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/fan_drawer.py
new file mode 100644
index 000000000..624ece4f3
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/fan_drawer.py
@@ -0,0 +1,24 @@
+#!/usr/bin/env python
+
+
+try:
+    from sonic_platform_pddf_base.pddf_fan_drawer import PddfFanDrawer
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+
+class FanDrawer(PddfFanDrawer):
+    """PDDF Platform-Specific Fan-Drawer class"""
+
+    def __init__(self, tray_idx, pddf_data=None, pddf_plugin_data=None):
+        # idx is 0-based 
+        PddfFanDrawer.__init__(self, tray_idx, pddf_data, pddf_plugin_data)
+
+    # Provide the functions/variables below for which implementation is to be overwritten
+    def get_name(self):
+        """
+        Retrieves the fan drawer name
+        Returns:
+            string: The name of the device
+        """
+        return "FanTray{}".format(self.fantray_index)
diff --git a/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/helper.py b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/helper.py
new file mode 100644
index 000000000..3284bb1a8
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/helper.py
@@ -0,0 +1,121 @@
+import os
+import struct
+import subprocess
+from mmap import *
+from sonic_py_common import device_info
+
+HOST_CHK_CMD = ["docker"]
+EMPTY_STRING = ""
+
+
+class APIHelper():
+
+    def __init__(self):
+        (self.platform, self.hwsku) = device_info.get_platform_and_hwsku()
+
+    def is_host(self):
+        try:
+            status, output = getstatusoutput_noshell(HOST_CHK_CMD)
+            return status == 0
+        except Exception:
+            return False
+
+    def pci_get_value(self, resource, offset):
+        status = True
+        result = ""
+        try:
+            fd = os.open(resource, os.O_RDWR)
+            mm = mmap(fd, 0)
+            mm.seek(int(offset))
+            read_data_stream = mm.read(4)
+            result = struct.unpack('I', read_data_stream)
+        except Exception:
+            status = False
+        return status, result
+
+    def run_command(self, cmd):
+        status = True
+        result = ""
+        try:
+            p = subprocess.Popen(
+                cmd, shell=True, stdout=subprocess.PIPE, stderr=subprocess.PIPE)
+            raw_data, err = p.communicate()
+            if err == '':
+                result = raw_data.strip()
+        except Exception:
+            status = False
+        return status, result
+
+    def run_interactive_command(self, cmd):
+        try:
+            os.system(cmd)
+        except Exception:
+            return False
+        return True
+
+    def read_txt_file(self, file_path):
+        try:
+            with open(file_path, 'r', errors='replace') as fd:
+                data = fd.read()
+                return data.strip()
+        except IOError:
+            pass
+        return None
+
+    def write_txt_file(self, file_path, value):
+        try:
+            with open(file_path, 'w') as fd:
+                fd.write(str(value))
+        except IOError:
+            return False
+        return True
+
+    def ipmi_raw(self, netfn, cmd):
+        status = True
+        result = ""
+        try:
+            cmd = "ipmitool raw {} {}".format(str(netfn), str(cmd))
+            p = subprocess.Popen(
+                cmd, shell=True, stdout=subprocess.PIPE, stderr=subprocess.PIPE)
+            raw_data, err = p.communicate()
+            if err == '':
+                result = raw_data.strip()
+            else:
+                status = False
+        except Exception:
+            status = False
+        return status, result
+
+    def ipmi_fru_id(self, id, key=None):
+        status = True
+        result = ""
+        try:
+            cmd = "ipmitool fru print {}".format(str(
+                id)) if not key else "ipmitool fru print {0} | grep '{1}' ".format(str(id), str(key))
+
+            p = subprocess.Popen(
+                cmd, shell=True, stdout=subprocess.PIPE, stderr=subprocess.PIPE)
+            raw_data, err = p.communicate()
+            if err == '':
+                result = raw_data.strip()
+            else:
+                status = False
+        except Exception:
+            status = False
+        return status, result
+
+    def ipmi_set_ss_thres(self, id, threshold_key, value):
+        status = True
+        result = ""
+        try:
+            cmd = "ipmitool sensor thresh '{}' {} {}".format(str(id), str(threshold_key), str(value))
+            p = subprocess.Popen(
+                cmd, shell=True, stdout=subprocess.PIPE, stderr=subprocess.PIPE)
+            raw_data, err = p.communicate()
+            if err == '':
+                result = raw_data.strip()
+            else:
+                status = False
+        except Exception:
+            status = False
+        return status, result
diff --git a/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/pcie.py b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/pcie.py
new file mode 100644
index 000000000..e4da32adf
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/pcie.py
@@ -0,0 +1,19 @@
+#############################################################################
+# Edgecore
+#
+# Module contains an implementation of SONiC Platform Base API and
+# provides the fan status which are available in the platform
+# Base PCIe class
+#############################################################################
+
+try:
+    from sonic_platform_base.sonic_pcie.pcie_common import PcieUtil
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+
+class Pcie(PcieUtil):
+    """Edgecore Platform-specific PCIe class"""
+
+    def __init__(self, platform_path):
+        PcieUtil.__init__(self, platform_path)
diff --git a/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/platform.py b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/platform.py
new file mode 100644
index 000000000..406b1179a
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/platform.py
@@ -0,0 +1,25 @@
+#!/usr/bin/env python
+
+#############################################################################
+# PDDF
+# Module contains an implementation of SONiC Platform Base API and
+# provides the platform information
+#
+#############################################################################
+
+
+try:
+    from sonic_platform_pddf_base.pddf_platform import PddfPlatform
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+
+class Platform(PddfPlatform):
+    """
+    PDDF Platform-Specific Platform Class
+    """
+
+    def __init__(self):
+        PddfPlatform.__init__(self)
+
+    # Provide the functions/variables below for which implementation is to be overwritten
diff --git a/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/psu.py b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/psu.py
new file mode 100644
index 000000000..48cdbab12
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/psu.py
@@ -0,0 +1,65 @@
+#!/usr/bin/env python
+#
+
+
+try:
+    from sonic_platform_pddf_base.pddf_psu import PddfPsu
+except ImportError as e:
+    raise ImportError (str(e) + "- required module not found")
+
+
+class Psu(PddfPsu):
+    """PDDF Platform-Specific PSU class"""
+    
+    PLATFORM_PSU_CAPACITY = 1200
+
+    def __init__(self, index, pddf_data=None, pddf_plugin_data=None):
+        PddfPsu.__init__(self, index, pddf_data, pddf_plugin_data)
+        
+    # Provide the functions/variables below for which implementation is to be overwritten
+    def get_voltage_high_threshold(self):
+        """
+        Retrieves the high threshold PSU voltage output
+        Returns:
+            A float number, the high threshold output voltage in volts, 
+            e.g. 12.1 
+        """
+        return 14.72
+
+    def get_voltage_low_threshold(self):
+        """
+        Retrieves the low threshold PSU voltage output
+        Returns:
+            A float number, the low threshold output voltage in volts, 
+            e.g. 12.1 
+        """
+        return 7.68
+
+    def get_name(self):
+        return "PSU-{}".format(self.psu_index)
+
+    def get_maximum_supplied_power(self):
+        """
+        Retrieves the maximum supplied power by PSU (or PSU capacity)
+        Returns:
+            A float number, the maximum power output in Watts.
+            e.g. 1200.1
+        """
+        return float(self.PLATFORM_PSU_CAPACITY)
+
+    def get_capacity(self):
+        """
+        Gets the capacity (maximum output power) of the PSU in watts
+
+        Returns:
+            An integer, the capacity of PSU
+        """
+        return (self.PLATFORM_PSU_CAPACITY)
+
+    def get_type(self):
+        """
+        Gets the type of the PSU
+        Returns:
+        A string, the type of PSU (AC/DC)
+        """
+        return "AC"
diff --git a/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/sfp.py b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/sfp.py
new file mode 100644
index 000000000..d8d6cc5de
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/sfp.py
@@ -0,0 +1,57 @@
+#!/usr/bin/env python
+
+try:
+    import natsort
+    from sonic_platform_pddf_base.pddf_sfp import PddfSfp
+    from sonic_platform_base.sonic_sfp.sfputilhelper import SfpUtilHelper
+    from sonic_py_common import device_info
+except ImportError as e:
+    raise ImportError (str(e) + "- required module not found")
+
+
+class Sfp(PddfSfp):
+    """
+    PDDF Platform-Specific Sfp class
+    """
+
+    def __init__(self, index, pddf_data=None, pddf_plugin_data=None):
+        PddfSfp.__init__(self, index, pddf_data, pddf_plugin_data)
+        self.index = index + 1
+
+    # Provide the functions/variables below for which implementation is to be overwritten
+    def __get_path_to_port_config_file(self):
+        platform, hwsku = device_info.get_platform_and_hwsku()
+        hwsku_path = "/".join(["/usr/share/sonic/platform",hwsku])
+        return "/".join([hwsku_path, "port_config.ini"])
+
+    def get_name(self):
+        """
+        Retrieves the name of the device
+            Returns:
+            string: The name of the device
+        """                
+        sfputil_helper = SfpUtilHelper()
+        sfputil_helper.read_porttab_mappings(
+            self.__get_path_to_port_config_file())
+
+        logical_port_list = sfputil_helper.logical
+        logical_port_list = natsort.natsorted(logical_port_list)
+        name = logical_port_list[self.port_index-1] or "Unknown"
+
+        return name
+
+    def get_position_in_parent(self):
+        """Retrieves 1-based relative physical position in parent device."""
+        return self.port_index
+
+    def get_error_description(self):
+        """
+        Retrives the error descriptions of the SFP module
+
+        Returns:
+            String that represents the current error descriptions of vendor specific errors
+            In case there are multiple errors, they should be joined by '|',
+            like: "Bad EEPROM|Unsupported cable"
+        """
+        raise NotImplementedError
+
diff --git a/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/thermal.py b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/thermal.py
new file mode 100644
index 000000000..8b7769cec
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/thermal.py
@@ -0,0 +1,42 @@
+#!/usr/bin/env python
+
+
+try:
+    from sonic_platform_pddf_base.pddf_thermal import PddfThermal
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+
+class Thermal(PddfThermal):
+    """PDDF Platform-Specific Thermal class"""
+
+    def __init__(self, index, pddf_data=None, pddf_plugin_data=None, is_psu_thermal=False, psu_index=0):
+        PddfThermal.__init__(self, index, pddf_data, pddf_plugin_data, is_psu_thermal, psu_index)
+        
+        self.pddf_obj = pddf_data
+        self.thermal_obj_name = "TEMP{}".format(self.thermal_index)
+        self.thermal_obj = self.pddf_obj.data[self.thermal_obj_name]
+
+    # Provide the functions/variables below for which implementation is to be overwritten
+    def get_name(self):
+        if self.is_psu_thermal:
+            return "PSU-{0} temp sensor 1".format(self.thermals_psu_index)
+        else:
+            if 'dev_attr' in self.thermal_obj.keys():
+                if 'display_name' in self.thermal_obj['dev_attr']:
+                    return str(self.thermal_obj['dev_attr']['display_name'])
+            # In case of errors
+            #return (self.thermal_obj_name)
+            return "Temp sensor {0}".format(self.thermal_index)
+
+    #def get_name(self):
+    #    if self.is_psu_thermal:
+    #        return "PSU-{0} temp sensor 1".format(self.thermals_psu_index)
+    #    else:
+    #        return "Temp sensor {0}".format(self.thermal_index)
+
+    def get_status(self):
+        get_temp=self.get_temperature()
+
+        if get_temp is not None:
+            return True if get_temp else False
diff --git a/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/watchdog.py b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/watchdog.py
new file mode 100644
index 000000000..88660b1a1
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/watchdog.py
@@ -0,0 +1,23 @@
+#!/usr/bin/env python
+
+#############################################################################
+#
+# Module contains an implementation of platform specific watchdog API's
+#
+#############################################################################
+
+try:
+    from sonic_platform_pddf_base.pddf_watchdog import PddfWatchdog
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found")
+
+class Watchdog(PddfWatchdog):
+    """
+    PDDF Platform-specific Chassis class
+    """
+
+    def __init__(self):
+        PddfWatchdog.__init__(self)
+        self.timeout= 180
+
+    # Provide the functions/variables below for which implementation is to be overwritten
diff --git a/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform_setup.py b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform_setup.py
index a775511c6..22bd354ea 100644
--- a/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform_setup.py
+++ b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform_setup.py
@@ -1,8 +1,5 @@
 from setuptools import setup
 
-DEVICE_NAME = 'accton'
-HW_SKU = 'x86_64-accton_as5835_54x-r0'  
-
 setup(
     name='sonic-platform',
     version='1.0',
@@ -11,13 +8,7 @@
     author='SONiC Team',
     author_email='linuxnetdev@microsoft.com',
     url='https://github.com/Azure/sonic-buildimage',
-    maintainer='Jostar Yang',
-    maintainer_email='jostar_yang@accton.com',
-    packages=[
-        'sonic_platform',
-    ],
-    package_dir={
-        'sonic_platform': '../../../../device/{}/{}/sonic_platform'.format(DEVICE_NAME, HW_SKU)},
+    packages=['sonic_platform'],
     classifiers=[
         'Development Status :: 3 - Alpha',
         'Environment :: Plugins',
diff --git a/platform/broadcom/sonic-platform-modules-accton/as5835-54x/utils/accton_as5835_54x_pddf_monitor.py b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/utils/accton_as5835_54x_pddf_monitor.py
new file mode 100755
index 000000000..02be5a097
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/utils/accton_as5835_54x_pddf_monitor.py
@@ -0,0 +1,241 @@
+#!/usr/bin/env python3
+#
+# Copyright (C) 2019 Accton Technology Corporation
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
+# ------------------------------------------------------------------
+# HISTORY:
+#    mm/dd/yyyy (A.D.)
+#    05/29/2019: Brandon Chuang, changed for as5835-54x.
+#    08/03/2020: Jostar Yang, change to call PDDF API .
+# ------------------------------------------------------------------
+
+try:
+    import sys, getopt
+    import logging
+    import logging.config
+    import time
+    import signal
+    from sonic_platform import platform
+except ImportError as e:
+    raise ImportError('%s - required module not found' % str(e))
+
+# Deafults
+VERSION = '1.0'
+FUNCTION_NAME = 'accton_as5835_54x_monitor'
+DUTY_MAX = 100
+
+platform_chassis = None
+
+test_temp = 0
+test_temp_list = [0, 0, 0, 0]
+test_temp_revert=0
+temp_test_data=0
+
+# Make a class we can use to capture stdout and sterr in the log
+class accton_as5835_54x_monitor(object):
+    # static temp var
+    _ori_temp = 0
+    _new_perc = 0
+
+    def __init__(self, log_file, log_level):
+        """Needs a logger and a logger level."""
+        # set up logging to file
+        logging.basicConfig(
+            filename=log_file,
+            filemode='w',
+            level=log_level,
+            format= '[%(asctime)s] {%(pathname)s:%(lineno)d} %(levelname)s - %(message)s',
+            datefmt='%H:%M:%S'
+        )
+
+        # set up logging to console
+        if log_level == logging.DEBUG:
+            console = logging.StreamHandler()
+            console.setLevel(log_level)
+            formatter = logging.Formatter('%(name)-12s: %(levelname)-8s %(message)s')
+            console.setFormatter(formatter)
+            logging.getLogger('').addHandler(console)
+
+        logging.debug('SET. logfile:%s / loglevel:%d', log_file, log_level)
+
+    def manage_fans(self):
+        global platform_chassis
+        global test_temp_list
+        global temp_test_data
+        global test_temp
+        
+        THERMAL_NUM_MAX=4
+        FAN_LEV1_UP_TEMP = 57700  # temperature
+        FAN_LEV1_SPEED_PERC = DUTY_MAX # percentage*/
+
+        FAN_LEV2_UP_TEMP = 53000
+        FAN_LEV2_DOWN_TEMP = 52700
+        FAN_LEV2_SPEED_PERC = 80
+
+        FAN_LEV3_UP_TEMP = 49500
+        FAN_LEV3_DOWN_TEMP = 47700
+        FAN_LEV3_SPEED_PERC = 65
+
+        FAN_LEV4_DOWN_TEMP = 42700
+        FAN_LEV4_SPEED_PERC = 40
+        
+        FAN_NUM=2
+        FAN_TRAY_NUM=5
+
+        if test_temp_revert==0:
+            temp_test_data=temp_test_data+2000
+        else:            
+            temp_test_data=temp_test_data-2000
+
+        if test_temp==0:
+            temp2=platform_chassis.get_thermal(1).get_temperature()*1000
+            if temp2 is None:
+                return False
+
+            temp3=platform_chassis.get_thermal(2).get_temperature()*1000
+            if temp3 is None:
+                return False
+
+            new_temp = (temp2 + temp3) / 2
+        else:
+            thermal_val=[0,0,0,0]
+            for i in range (THERMAL_NUM_MAX):
+                thermal_val[i]=test_temp_list[i]
+                thermal_val[i]= thermal_val[i] + temp_test_data
+            
+                
+            new_temp = (thermal_val[1] + thermal_val[2])/2
+            logging.debug("Test case:thermal_val[1]=%d, thermal_val[2]=%d, get new_temp=%d", thermal_val[1], thermal_val[2],new_temp)
+
+        for x in range(FAN_TRAY_NUM * FAN_NUM):
+            #fan_stat = platform_chassis.get_fan(x).get_status() or not platform_chassis.get_fan(x).get_speed_rpm()
+            
+            #if fan_stat is None:
+            #    return False
+            #if fan_stat is False:
+            fan_stat=True
+            if not platform_chassis.get_fan(x).get_status() or not platform_chassis.get_fan(x).get_speed_rpm():    
+                self._new_perc = FAN_LEV1_SPEED_PERC
+                logging.debug('INFO. SET new_perc to %d (FAN fault. fan_num:%d)', self._new_perc, x+1)
+                fan_stat=False
+                break
+            logging.debug('INFO. fan_stat is True (fan_num:%d)', x+1)
+
+        if fan_stat==True:
+            diff = new_temp - self._ori_temp
+            if diff  == 0:
+                logging.debug('INFO. RETURN. THERMAL temp not changed. %d / %d (new_temp / ori_temp)', new_temp, self._ori_temp)
+                return True
+            else:
+                if diff >= 0:
+                    is_up = True
+                    logging.debug('INFO. THERMAL temp UP %d / %d (new_temp / ori_temp)', new_temp, self._ori_temp)
+                else:
+                    is_up = False
+                    logging.debug('INFO. THERMAL temp DOWN %d / %d (new_temp / ori_temp)', new_temp, self._ori_temp)
+
+            if is_up is True:
+                if new_temp  >= FAN_LEV1_UP_TEMP:
+                    self._new_perc = FAN_LEV1_SPEED_PERC
+                elif new_temp  >= FAN_LEV2_UP_TEMP:
+                    self._new_perc = FAN_LEV2_SPEED_PERC
+                elif new_temp  >= FAN_LEV3_UP_TEMP:
+                    self._new_perc = FAN_LEV3_SPEED_PERC
+                else:
+                    self._new_perc = FAN_LEV4_SPEED_PERC
+                logging.debug('INFO. SET. FAN_SPEED as %d (new THERMAL temp:%d)', self._new_perc, new_temp)
+            else:
+                if new_temp <= FAN_LEV4_DOWN_TEMP:
+                    self._new_perc = FAN_LEV4_SPEED_PERC
+                elif new_temp  <= FAN_LEV3_DOWN_TEMP:
+                    self._new_perc = FAN_LEV3_SPEED_PERC
+                elif new_temp  <= FAN_LEV2_DOWN_TEMP:
+                    self._new_perc = FAN_LEV2_SPEED_PERC
+                else:
+                    self._new_perc = FAN_LEV1_SPEED_PERC
+                logging.debug('INFO. SET. FAN_SPEED as %d (new THERMAL temp:%d)', self._new_perc, new_temp)
+
+        cur_perc= platform_chassis.get_fan(0).get_speed()
+        #cur_perc = fan.get_fan_duty_cycle()
+        if cur_perc == self._new_perc:
+            logging.debug('INFO. RETURN. FAN speed not changed. %d / %d (new_perc / ori_perc)', self._new_perc, cur_perc)
+            return True
+
+        #set_stat = fan.set_fan_duty_cycle(self._new_perc)
+        set_stat = platform_chassis.get_fan(0).set_speed(self._new_perc)
+        if set_stat is True:
+            logging.debug('INFO: PASS. set_fan_duty_cycle (%d)', self._new_perc)
+        else:
+            logging.debug('INFO: FAIL. set_fan_duty_cycle (%d)', self._new_perc)
+
+        logging.debug('INFO: GET. ori_perc is %d. ori_temp is %d', cur_perc, self._ori_temp)
+        self._ori_temp = new_temp
+        logging.debug('INFO: UPDATE. ori_perc to %d. ori_temp to %d', cur_perc, self._ori_temp)
+
+        return True
+
+def handler(signum, frame):
+    logging.debug('INFO:Cause signal %d, set fan speed max.', signum)
+    platform_chassis.get_fan(0).set_speed(DUTY_MAX)
+    sys.exit(0)
+
+def main(argv):
+    global test_temp
+    
+    log_file = '%s.log' % FUNCTION_NAME
+    log_level = logging.INFO
+    if len(sys.argv) != 1:
+        try:
+            opts, args = getopt.getopt(argv,'hdlt:',['lfile='])
+        except getopt.GetoptError:
+            print('Usage: %s [-d] [-l <log_file>]' % sys.argv[0])
+            return 0
+        for opt, arg in opts:
+            if opt == '-h':
+                print('Usage: %s [-d] [-l <log_file>]' % sys.argv[0])
+                return 0
+            elif opt in ('-d', '--debug'):
+                log_level = logging.DEBUG
+            elif opt in ('-l', '--lfile'):
+                log_file = arg
+                
+        if sys.argv[1]== '-t':
+            if len(sys.argv)!=6:
+                print("temp test, need input 4 temp")
+                return 0
+            i=0
+            for x in range(2, 6):
+               test_temp_list[i]= int(sys.argv[x])*1000
+               i=i+1
+            test_temp = 1
+            log_level = logging.DEBUG
+            print(test_temp_list)
+                
+    global platform_chassis
+    platform_chassis = platform.Platform().get_chassis()
+    
+    
+    signal.signal(signal.SIGINT, handler)
+    signal.signal(signal.SIGTERM, handler)
+    monitor = accton_as5835_54x_monitor(log_file, log_level)
+
+    # Loop forever, doing something useful hopefully:
+    while True:
+        monitor.manage_fans()
+        time.sleep(10)
+
+if __name__ == '__main__':
+    main(sys.argv[1:])
\ No newline at end of file
diff --git a/platform/broadcom/sonic-platform-modules-accton/as5835-54x/utils/pddf_post_device_create.sh b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/utils/pddf_post_device_create.sh
new file mode 100755
index 000000000..c1a6660f9
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/utils/pddf_post_device_create.sh
@@ -0,0 +1,27 @@
+#!/bin/bash
+
+set_qsfp_reset_to_normal_state()
+{
+    i2cset -y -f 3 0x62 0x15 0x3f &>/dev/null
+}
+
+
+set_sfp_tx_disable_to_disable()
+{
+    i2cset -y -f 3 0x61 0x12 0x0 &>/dev/null
+    i2cset -y -f 3 0x61 0x13 0x0 &>/dev/null
+    i2cset -y -f 3 0x61 0x14 0x0 &>/dev/null
+    i2cset -y -f 3 0x61 0x15 0x0 &>/dev/null
+    i2cset -y -f 3 0x61 0x16 0x0 &>/dev/null
+    i2cset -y -f 3 0x62 0xc 0x0  &>/dev/null
+    i2cset -y -f 3 0x62 0xd 0x0  &>/dev/null
+}
+
+set_system_led_diag_loc_to_off()
+{
+    i2cset -y -f 3 0x60 0xa 0x1c &>/dev/null
+}
+
+set_qsfp_reset_to_normal_state
+set_sfp_tx_disable_to_disable
+set_system_led_diag_loc_to_off
diff --git a/platform/broadcom/sonic-platform-modules-accton/as5835-54x/utils/pddf_switch_svc.py b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/utils/pddf_switch_svc.py
new file mode 100755
index 000000000..c7dad91ba
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/utils/pddf_switch_svc.py
@@ -0,0 +1,86 @@
+#!/usr/bin/env python
+# Script to stop and start the respective platforms default services. 
+# This will be used while switching the pddf->non-pddf mode and vice versa
+from sonic_py_common.general import getstatusoutput_noshell
+
+def check_pddf_support():
+    return True
+
+def stop_platform_svc():
+    
+    status, output = getstatusoutput_noshell(["systemctl", "stop", "as5835-54x-platform-monitor-fan.service"])
+    if status:
+        print("Stop as5835-54x-platform-fan.service failed %d"%status)
+        return False
+    
+    status, output = getstatusoutput_noshell(["systemctl", "stop", "as5835-54x-platform-monitor-psu.service"])
+    if status:
+        print("Stop as5835-54x-platform-psu.service failed %d"%status)
+        return False
+    
+    status, output = getstatusoutput_noshell(["systemctl",  "stop", "as5835-54x-platform-monitor.service"])
+    if status:
+        print("Stop as5835-54x-platform-init.service failed %d"%status)
+        return False
+    status, output = getstatusoutput_noshell(["systemctl", "disable", "as5835-54x-platform-monitor.service"])
+    if status:
+        print("Disable as5835-54x-platform-monitor.service failed %d"%status)
+        return False
+    
+    status, output = getstatusoutput_noshell(["/usr/local/bin/accton_as5835_54x_util.py", "clean"])
+    if status:
+        print("accton_as5835_54x_util.py clean command failed %d"%status)
+        return False
+
+    # HACK , stop the pddf-platform-init service if it is active
+    status, output = getstatusoutput_noshell(["systemctl", "stop", "pddf-platform-init.service"])
+    if status:
+        print("Stop pddf-platform-init.service along with other platform serives failed %d"%status)
+        return False
+
+    return True
+    
+def start_platform_svc():
+    status, output = getstatusoutput_noshell(["/usr/local/bin/accton_as5835_54x_util.py", "install"])
+    if status:
+        print("accton_as5835_54x_util.py install command failed %d"%status)
+        return False
+
+    status, output = getstatusoutput_noshell(["systemctl", "enable", "as5835-54x-platform-monitor.service"])
+    if status:
+        print("Enable as5835-54x-platform-monitor.service failed %d"%status)
+        return False
+    status, output = getstatusoutput_noshell(["systemctl", "start" ,"as5835-54x-platform-monitor-fan.service"])
+    if status:
+        print("Start as5835-54x-platform-monitor-fan.service failed %d"%status)
+        return False
+        
+    status, output = getstatusoutput_noshell(["systemctl", "start", "as5835-54x-platform-monitor-psu.service"])
+    if status:
+        print("Start as5835-54x-platform-monitor-psu.service failed %d"%status)
+        return False
+
+    return True
+
+def start_platform_pddf():
+    status, output = getstatusoutput_noshell(["systemctl", "start", "pddf-platform-init.service"])
+    if status:
+        print("Start pddf-platform-init.service failed %d"%status)
+        return False
+    
+    return True
+
+def stop_platform_pddf():
+    status, output = getstatusoutput_noshell(["systemctl", "stop", "pddf-platform-init.service"])
+    if status:
+        print("Stop pddf-platform-init.service failed %d"%status)
+        return False
+
+    return True
+
+def main():
+    pass
+
+if __name__ == "__main__":
+    main()
+
diff --git a/platform/broadcom/sonic-platform-modules-accton/debian/sonic-platform-accton-as5835-54x.install b/platform/broadcom/sonic-platform-modules-accton/debian/sonic-platform-accton-as5835-54x.install
index d108eb582..a234273ab 100644
--- a/platform/broadcom/sonic-platform-modules-accton/debian/sonic-platform-accton-as5835-54x.install
+++ b/platform/broadcom/sonic-platform-modules-accton/debian/sonic-platform-accton-as5835-54x.install
@@ -1,2 +1 @@
-as5835-54x/sonic_platform-1.0-py3-none-any.whl usr/share/sonic/device/x86_64-accton_as5835_54x-r0
-
+as5835-54x/sonic_platform-1.0-py3-none-any.whl usr/share/sonic/device/x86_64-accton_as5835_54x-r0/pddf
diff --git a/platform/broadcom/sonic-platform-modules-accton/debian/sonic-platform-accton-as5835-54x.postinst b/platform/broadcom/sonic-platform-modules-accton/debian/sonic-platform-accton-as5835-54x.postinst
new file mode 100644
index 000000000..c478bcac2
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-accton/debian/sonic-platform-accton-as5835-54x.postinst
@@ -0,0 +1,9 @@
+# Special arrangement to make PDDF mode default
+# Disable monitor, monitor-fan, monitor-psu (not enabling them would imply they will be disabled by default)
+# Enable pddf-platform-monitor
+depmod -a
+depmod -a
+systemctl enable pddf-platform-init.service
+systemctl start pddf-platform-init.service
+systemctl enable as5835-54x-pddf-platform-monitor.service
+systemctl start as5835-54x-pddf-platform-monitor.service

From 8260eba8367a12e2261d984ae24ad2ec2bbe6c18 Mon Sep 17 00:00:00 2001
From: jostar-yang <jostar_yang@edge-core.com>
Date: Tue, 7 Feb 2023 16:39:44 +0800
Subject: [PATCH 1081/1115] Fix Semgrep check

---
 .../pddf/pddf-device.json                     |  1 +
 .../as5835-54x/sonic_platform/helper.py       | 70 -------------------
 2 files changed, 1 insertion(+), 70 deletions(-)

diff --git a/device/accton/x86_64-accton_as5835_54x-r0/pddf/pddf-device.json b/device/accton/x86_64-accton_as5835_54x-r0/pddf/pddf-device.json
index edf570a8b..f73222593 100644
--- a/device/accton/x86_64-accton_as5835_54x-r0/pddf/pddf-device.json
+++ b/device/accton/x86_64-accton_as5835_54x-r0/pddf/pddf-device.json
@@ -623,6 +623,7 @@
     "TEMP2" :
     {
         "dev_info": { "device_type":"TEMP_SENSOR", "device_name":"TEMP2", "device_parent":"MUX4"},
+        "dev_attr":  { "display_name":"MB_FrontMiddle_temp(0x4C)"},
         "i2c":
         {
             "topo_info": { "parent_bus":"0x1b", "dev_addr":"0x4C", "dev_type":"lm75"},
diff --git a/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/helper.py b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/helper.py
index 3284bb1a8..5162803fb 100644
--- a/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/helper.py
+++ b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/helper.py
@@ -33,26 +33,6 @@ def pci_get_value(self, resource, offset):
             status = False
         return status, result
 
-    def run_command(self, cmd):
-        status = True
-        result = ""
-        try:
-            p = subprocess.Popen(
-                cmd, shell=True, stdout=subprocess.PIPE, stderr=subprocess.PIPE)
-            raw_data, err = p.communicate()
-            if err == '':
-                result = raw_data.strip()
-        except Exception:
-            status = False
-        return status, result
-
-    def run_interactive_command(self, cmd):
-        try:
-            os.system(cmd)
-        except Exception:
-            return False
-        return True
-
     def read_txt_file(self, file_path):
         try:
             with open(file_path, 'r', errors='replace') as fd:
@@ -69,53 +49,3 @@ def write_txt_file(self, file_path, value):
         except IOError:
             return False
         return True
-
-    def ipmi_raw(self, netfn, cmd):
-        status = True
-        result = ""
-        try:
-            cmd = "ipmitool raw {} {}".format(str(netfn), str(cmd))
-            p = subprocess.Popen(
-                cmd, shell=True, stdout=subprocess.PIPE, stderr=subprocess.PIPE)
-            raw_data, err = p.communicate()
-            if err == '':
-                result = raw_data.strip()
-            else:
-                status = False
-        except Exception:
-            status = False
-        return status, result
-
-    def ipmi_fru_id(self, id, key=None):
-        status = True
-        result = ""
-        try:
-            cmd = "ipmitool fru print {}".format(str(
-                id)) if not key else "ipmitool fru print {0} | grep '{1}' ".format(str(id), str(key))
-
-            p = subprocess.Popen(
-                cmd, shell=True, stdout=subprocess.PIPE, stderr=subprocess.PIPE)
-            raw_data, err = p.communicate()
-            if err == '':
-                result = raw_data.strip()
-            else:
-                status = False
-        except Exception:
-            status = False
-        return status, result
-
-    def ipmi_set_ss_thres(self, id, threshold_key, value):
-        status = True
-        result = ""
-        try:
-            cmd = "ipmitool sensor thresh '{}' {} {}".format(str(id), str(threshold_key), str(value))
-            p = subprocess.Popen(
-                cmd, shell=True, stdout=subprocess.PIPE, stderr=subprocess.PIPE)
-            raw_data, err = p.communicate()
-            if err == '':
-                result = raw_data.strip()
-            else:
-                status = False
-        except Exception:
-            status = False
-        return status, result

From 9fa6f5f395eb21d1561fb1c1bc091814f2c17337 Mon Sep 17 00:00:00 2001
From: jostar-yang <jostar_yang@edge-core.com>
Date: Wed, 8 Feb 2023 16:20:43 +0800
Subject: [PATCH 1082/1115] Add pcie.yaml file

---
 .../x86_64-accton_as5835_54x-r0/pcie.yaml     | 135 ++++++++++++++++++
 .../pddf/pddf-device.json                     |   4 +-
 2 files changed, 137 insertions(+), 2 deletions(-)
 create mode 100644 device/accton/x86_64-accton_as5835_54x-r0/pcie.yaml

diff --git a/device/accton/x86_64-accton_as5835_54x-r0/pcie.yaml b/device/accton/x86_64-accton_as5835_54x-r0/pcie.yaml
new file mode 100644
index 000000000..ecfe957bc
--- /dev/null
+++ b/device/accton/x86_64-accton_as5835_54x-r0/pcie.yaml
@@ -0,0 +1,135 @@
+- bus: '00'
+  dev: '00'
+  fn: '0'
+  id: 1980
+  name: 'Host bridge: Intel Corporation Atom Processor C3000 Series System Agent'
+- bus: '00'
+  dev: '04'
+  fn: '0'
+  id: 19a1
+  name: 'Host bridge: Intel Corporation Atom Processor C3000 Series Error Registers'
+- bus: '00'
+  dev: '05'
+  fn: '0'
+  id: 19a2
+  name: 'Generic system peripheral [0807]: Intel Corporation Atom Processor C3000 Series Root Complex Event Collector'
+- bus: '00'
+  dev: '06'
+  fn: '0'
+  id: 19a3
+  name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series Integrated QAT Root Port'
+- bus: '00'
+  dev: 09
+  fn: '0'
+  id: 0x19a4
+  name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root Port #0 '
+- bus: '00'
+  dev: 'b'
+  fn: '0'
+  id: 19a6
+  name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root Port #2'
+- bus: '00'
+  dev: 'e'
+  fn: '0'
+  id: 19a8
+  name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root Port #4 '
+- bus: '00'
+  dev: '10'
+  fn: '0'
+  id: 19aa
+  name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root Port #6'
+- bus: '00'
+  dev: '12'
+  fn: '0'
+  id: 19ac
+  name: 'System peripheral: Intel Corporation Atom Processor C3000 Series SMBus Contoller'
+- bus: '00'
+  dev: '013'
+  fn: '0'
+  id: 19b2
+  name: 'SATA controller: Intel Corporation Atom Processor C3000 Series SATA Controller 0'
+- bus: '00'
+  dev: '15'
+  fn: '0'
+  id: 19d0
+  name: 'USB controller: Intel Corporation Atom Processor C3000 Series USB 3.0 xHCI Controller'
+- bus: '00'
+  dev: '16'
+  fn: '0'
+  id: 19d1
+  name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series Integrated LAN Root Port #0'
+- bus: '00'
+  dev: '17'
+  fn: '0'
+  id: 19d2
+  name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series Integrated LAN Root Port #1'
+- bus: '00'
+  dev: '18'
+  fn: '0'
+  id: 19d3
+  name: 'Communication controller: Intel Corporation Atom Processor C3000 Series ME HECI 1'
+- bus: '00'
+  dev: '1a'
+  fn: '0'
+  id: 19d8
+  name: 'Serial controller: Intel Corporation Atom Processor C3000 Series HSUART Controller'
+- bus: '00'
+  dev: '1a'
+  fn: '1'
+  id: 19d8
+  name: 'Serial controller: Intel Corporation Atom Processor C3000 Series HSUART Controller'
+- bus: '00'
+  dev: '1a'
+  fn: '2'
+  id: 19d8
+  name: 'Serial controller: Intel Corporation Atom Processor C3000 Series HSUART Controller'
+- bus: '00'
+  dev: '1f'
+  fn: '0'
+  id: 19dc
+  name: 'ISA bridge: Intel Corporation Atom Processor C3000 Series LPC or eSPI'
+- bus: '00'
+  dev: '1f'
+  fn: '1'
+  id: 19dd
+  name: 'Memory controller: Intel Corporation Atom Processor C3000 Series Primary to Side Band (P2SB) Bridge'
+- bus: '00'
+  dev: '1f'
+  fn: '2'
+  id: 19de
+  name: 'Memory controller: Intel Corporation Atom Processor C3000 Series Power Management Controller'
+- bus: '00'
+  dev: '1f'
+  fn: '4'
+  id: 19df
+  name: 'SMBus: Intel Corporation Atom Processor C3000 Series SMBus controller'
+- bus: '00'
+  dev: '1f'
+  fn: '5'
+  id: 0x19e0
+  name: 'Serial bus controller [0c80]: Intel Corporation Atom Processor C3000 Series SPI Controller'
+- bus: '01'
+  dev: '00'
+  fn: '0'
+  id: 19e2
+  name: 'Co-processor: Intel Corporation Atom Processor C3000 Series QuickAssist Technology'
+- bus: '02'
+  dev: '00'
+  fn: '0'
+  id: b771
+  name: 'Ethernet controller: Broadcom Inc. and subsidiaries Device b771'
+- bus: '05'
+  dev: '00'
+  fn: '0'
+  id: 1533
+  name: 'Ethernet controller: Intel Corporation I210 Gigabit Network Connection'
+- bus: '06'
+  dev: '00'
+  fn: '0'
+  id: 15c2
+  name: 'Ethernet controller: Intel Corporation Ethernet Connection X553 Backplane'
+- bus: '08'
+  dev: '00'
+  fn: '0'
+  id: 15e5
+  name: 'Ethernet controller: Intel Corporation Ethernet Connection X553 1GbE'
diff --git a/device/accton/x86_64-accton_as5835_54x-r0/pddf/pddf-device.json b/device/accton/x86_64-accton_as5835_54x-r0/pddf/pddf-device.json
index f73222593..de5c1799a 100644
--- a/device/accton/x86_64-accton_as5835_54x-r0/pddf/pddf-device.json
+++ b/device/accton/x86_64-accton_as5835_54x-r0/pddf/pddf-device.json
@@ -223,7 +223,7 @@
                 { "attr_name":"psu_i_out", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x8c", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
                 { "attr_name":"psu_p_out", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x96", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
                 { "attr_name":"psu_fan1_speed_rpm", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x90", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
-                { "attr_name":"psu_temp1_input", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x8d", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}
+                { "attr_name":"psu_temp1_input", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x8d", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}
             ]
         }
     },
@@ -623,7 +623,7 @@
     "TEMP2" :
     {
         "dev_info": { "device_type":"TEMP_SENSOR", "device_name":"TEMP2", "device_parent":"MUX4"},
-        "dev_attr":  { "display_name":"MB_FrontMiddle_temp(0x4C)"},
+        "dev_attr": { "display_name":"MB_FrontMiddle_temp(0x4C)"},
         "i2c":
         {
             "topo_info": { "parent_bus":"0x1b", "dev_addr":"0x4C", "dev_type":"lm75"},

From cca7bdbd8e2628658746d44e62502e17c4a9654f Mon Sep 17 00:00:00 2001
From: jostar-yang <jostar_yang@edge-core.com>
Date: Thu, 9 Feb 2023 15:56:34 +0800
Subject: [PATCH 1083/1115] Add platform.json file

---
 .../x86_64-accton_as5835_54x-r0/platform.json | 806 ++++++++++++++++++
 1 file changed, 806 insertions(+)
 create mode 100644 device/accton/x86_64-accton_as5835_54x-r0/platform.json

diff --git a/device/accton/x86_64-accton_as5835_54x-r0/platform.json b/device/accton/x86_64-accton_as5835_54x-r0/platform.json
new file mode 100644
index 000000000..20fc68502
--- /dev/null
+++ b/device/accton/x86_64-accton_as5835_54x-r0/platform.json
@@ -0,0 +1,806 @@
+{
+    "chassis": {
+        "name": "5835-54X",
+        "components": [
+            {
+                "name": "MB CPLD1"
+            },
+            {
+                "name": "MB CPLD2"
+            },
+            {
+                "name": "MB CPLD3"
+            },
+            {
+                "name": "FAN CPLD"
+            },
+            {
+                "name": "CPU CPLD"
+            },
+            {
+                "name": "BIOS"
+            }
+        ],
+        "fans": [
+            {
+                "name": "FAN-1F"
+            },
+            {
+                "name": "FAN-1R"
+            },
+            {
+                "name": "FAN-2F"
+            },
+            {
+                "name": "FAN-2R"
+            },
+            {
+                "name": "FAN-3F"
+            },
+            {
+                "name": "FAN-3R"
+            },
+            {
+                "name": "FAN-4F"
+            },
+            {
+                "name": "FAN-4R"
+            },
+            {
+                "name": "FAN-5F"
+            },
+            {
+                "name": "FAN-5R"
+            }
+        ],
+        "fan_drawers":[
+            {
+                "name": "FanTray1",
+                "num_fans" : 2,
+                "fans": [
+                    {
+                        "name": "FAN-1F"
+                    },
+                    {
+                        "name": "FAN-1R"
+                    }
+                ]
+            },
+            {
+                "name": "FanTray2",
+                "num_fans" : 2,
+                "fans": [
+                    {
+                        "name": "FAN-2F"
+                    },
+                    {
+                        "name": "FAN-2R"
+                    }
+                ]
+            },
+            {
+                "name": "FanTray3",
+                "num_fans" : 2,
+                "fans": [
+                    {
+                        "name": "FAN-3F"
+                    },
+                    {
+                        "name": "FAN-3R"
+                    }
+                ]
+            },
+            {
+                "name": "FanTray4",
+                "num_fans" : 2,
+                "fans": [
+                    {
+                        "name": "FAN-4F"
+                    },
+                    {
+                        "name": "FAN-4R"
+                    }
+                ]
+            },
+            {
+                "name": "FanTray5",
+                "num_fans" : 2,
+                "fans": [
+                    {
+                        "name": "FAN-5F"
+                    },
+                    {
+                        "name": "FAN-5R"
+                    }
+                ]
+            }
+        ],
+        "psus": [
+            {
+                "name": "PSU-1",
+                "fans": [
+                    {
+                        "name": "PSU-1 FAN-1"
+                    }
+                ],
+                "thermals": [
+                    {
+                        "name": "PSU-1 temp sensor 1",
+                        "controllable": false,
+                        "low-threshold": false,
+                        "high-threshold": false,
+                        "low-crit-threshold": false,
+                        "high-crit-threshold": false
+                    }
+                ],
+                "temperature": true,
+                "temperature_high_threshold": true
+            },
+            {
+                "name": "PSU-2",
+                "fans": [
+                    {
+                        "name": "PSU-2 FAN-1"
+                    }
+                ],
+                "thermals": [
+                    {
+                        "name": "PSU-2 temp sensor 1",
+                        "controllable": false,
+                        "low-threshold": false,
+                        "high-threshold": false,
+                        "low-crit-threshold": false,
+                        "high-crit-threshold": false
+                    }
+                ],
+                "temperature": true,
+                "temperature_high_threshold": true
+            }
+        ],
+        "thermals": [
+            {
+                "name": "CpuBoard_temp(0x4B)",
+                "controllable": true,
+                "low-threshold": false,
+                "high-threshold": true,
+                "low-crit-threshold": false,
+                "high-crit-threshold": true
+            },
+            {
+                "name": "MB_FrontMiddle_temp(0x4C)",
+                "controllable": true,
+                "low-threshold": false,
+                "high-threshold": true,
+                "low-crit-threshold": false,
+                "high-crit-threshold": true
+            },
+            {
+                "name": "MB_RearLeft_temp(0x4A)",
+                "controllable": true,
+                "low-threshold": false,
+                "high-threshold": true,
+                "low-crit-threshold": false,
+                "high-crit-threshold": true
+            },
+            {
+                "name": "MB_RearLeft_temp(0x49)",
+                "controllable": true,
+                "low-threshold": false,
+                "high-threshold": true,
+                "low-crit-threshold": false,
+                "high-crit-threshold": true
+            },
+            {
+                "name": "CPU Temp",
+                "controllable": true,
+                "low-threshold": false,
+                "high-threshold": true,
+                "low-crit-threshold": false,
+                "high-crit-threshold": true
+            }
+        ],
+        "sfps": [
+            {
+                "name": "Ethernet0"
+            },
+            {
+                "name": "Ethernet1"
+            },
+            {
+                "name": "Ethernet2"
+            },
+            {
+                "name": "Ethernet3"
+            },
+            {
+                "name": "Ethernet4"
+            },
+            {
+                "name": "Ethernet5"
+            },
+            {
+                "name": "Ethernet6"
+            },
+            {
+                "name": "Ethernet7"
+            },
+            {
+                "name": "Ethernet8"
+            },
+            {
+                "name": "Ethernet9"
+            },
+            {
+                "name": "Ethernet10"
+            },
+            {
+                "name": "Ethernet11"
+            },
+            {
+                "name": "Ethernet12"
+            },
+            {
+                "name": "Ethernet13"
+            },
+            {
+                "name": "Ethernet14"
+            },
+            {
+                "name": "Ethernet15"
+            },
+            {
+                "name": "Ethernet16"
+            },
+            {
+                "name": "Ethernet17"
+            },
+            {
+                "name": "Ethernet18"
+            },
+            {
+                "name": "Ethernet19"
+            },
+            {
+                "name": "Ethernet20"
+            },
+            {
+                "name": "Ethernet21"
+            },
+            {
+                "name": "Ethernet22"
+            },
+            {
+                "name": "Ethernet23"
+            },
+            {
+                "name": "Ethernet24"
+            },
+            {
+                "name": "Ethernet25"
+            },
+            {
+                "name": "Ethernet26"
+            },
+            {
+                "name": "Ethernet27"
+            },
+            {
+                "name": "Ethernet28"
+            },
+            {
+                "name": "Ethernet29"
+            },
+            {
+                "name": "Ethernet30"
+            },
+            {
+                "name": "Ethernet31"
+            },
+            {
+                "name": "Ethernet32"
+            },
+            {
+                "name": "Ethernet33"
+            },
+            {
+                "name": "Ethernet34"
+            },
+            {
+                "name": "Ethernet35"
+            },
+            {
+                "name": "Ethernet36"
+            },
+            {
+                "name": "Ethernet37"
+            },
+            {
+                "name": "Ethernet38"
+            },
+            {
+                "name": "Ethernet39"
+            },
+            {
+                "name": "Ethernet40"
+            },
+            {
+                "name": "Ethernet41"
+            },
+            {
+                "name": "Ethernet42"
+            },
+            {
+                "name": "Ethernet43"
+            },
+            {
+                "name": "Ethernet44"
+            },
+            {
+                "name": "Ethernet45"
+            },
+            {
+                "name": "Ethernet46"
+            },
+            {
+                "name": "Ethernet47"
+            },
+            {
+                "name": "Ethernet48"
+            },
+            {
+                "name": "Ethernet52"
+            },
+            {
+                "name": "Ethernet56"
+            },
+            {
+                "name": "Ethernet60"
+            },
+            {
+                "name": "Ethernet64"
+            },
+            {
+                "name": "Ethernet68"
+            }
+        ]
+    },
+    "interfaces": {
+        "Ethernet0": {
+            "index": "1",
+            "lanes": "1",
+            "breakout_modes": {
+                "1x10G[1G]": ["Eth1(Port1)"]
+            }
+        },
+
+        "Ethernet1": {
+            "index": "2",
+            "lanes": "2",
+            "breakout_modes": {
+                "1x10G[1G]": ["Eth2(Port2)"]
+            }
+        },
+
+        "Ethernet2": {
+            "index": "3",
+            "lanes": "3",
+            "breakout_modes": {
+                "1x10G[1G]": ["Eth3(Port3)"]
+            }
+        },
+
+        "Ethernet3": {
+            "index": "4",
+            "lanes": "4",
+            "breakout_modes": {
+                "1x10G[1G]": ["Eth4(Port4)"]
+            }
+        },
+
+        "Ethernet4": {
+            "index": "5",
+            "lanes": "5",
+            "breakout_modes": {
+                "1x10G[1G]": ["Eth5(Port5)"]
+            }
+        },
+
+        "Ethernet5": {
+            "index": "6",
+            "lanes": "6",
+            "breakout_modes": {
+                "1x10G[1G]": ["Eth6(Port6)"]
+            }
+        },
+
+        "Ethernet6": {
+            "index": "7",
+            "lanes": "7",
+            "breakout_modes": {
+                "1x10G[1G]": ["Eth7(Port7)"]
+            }
+        },
+
+        "Ethernet7": {
+            "index": "8",
+            "lanes": "8",
+            "breakout_modes": {
+                "1x10G[1G]": ["Eth8(Port8)"]
+            }
+        },
+
+        "Ethernet8": {
+            "index": "9",
+            "lanes": "9",
+            "breakout_modes": {
+                "1x10G[1G]": ["Eth9(Port9)"]
+            }
+        },
+
+        "Ethernet9": {
+            "index": "10",
+            "lanes": "10",
+            "breakout_modes": {
+                "1x10G[1G]": ["Eth10(Port10)"]
+            }
+        },
+
+        "Ethernet10": {
+            "index": "11",
+            "lanes": "11",
+            "breakout_modes": {
+                "1x10G[1G]": ["Eth11(Port11)"]
+            }
+        },
+
+        "Ethernet11": {
+            "index": "12",
+            "lanes": "12",
+            "breakout_modes": {
+                "1x10G[1G]": ["Eth12(Port12)"]
+            }
+        },
+
+        "Ethernet12": {
+            "index": "13",
+            "lanes": "13",
+            "breakout_modes": {
+                "1x10G[1G]": ["Eth13(Port13)"]
+            }
+        },
+
+        "Ethernet13": {
+            "index": "14",
+            "lanes": "14",
+            "breakout_modes": {
+                "1x10G[1G]": ["Eth14(Port14)"]
+            }
+        },
+
+        "Ethernet14": {
+            "index": "15",
+            "lanes": "15",
+            "breakout_modes": {
+                "1x10G[1G]": ["Eth15(Port15)"]
+            }
+        },
+
+        "Ethernet15": {
+            "index": "16",
+            "lanes": "16",
+            "breakout_modes": {
+                "1x10G[1G]": ["Eth16(Port16)"]
+            }
+        },
+
+        "Ethernet16": {
+            "index": "17",
+            "lanes": "17",
+            "breakout_modes": {
+                "1x10G[1G]": ["Eth17(Port17)"]
+            }
+        },
+
+        "Ethernet17": {
+            "index": "18",
+            "lanes": "18",
+            "breakout_modes": {
+                "1x10G[1G]": ["Eth18(Port18)"]
+            }
+        },
+
+        "Ethernet18": {
+            "index": "19",
+            "lanes": "19",
+            "breakout_modes": {
+                "1x10G[1G]": ["Eth19(Port19)"]
+            }
+        },
+
+        "Ethernet19": {
+            "index": "20",
+            "lanes": "20",
+            "breakout_modes": {
+                "1x10G[1G]": ["Eth20(Port20)"]
+            }
+        },
+
+        "Ethernet20": {
+            "index": "21",
+            "lanes": "21",
+            "breakout_modes": {
+                "1x10G[1G]": ["Eth21(Port21)"]
+            }
+        },
+
+        "Ethernet21": {
+            "index": "22",
+            "lanes": "22",
+            "breakout_modes": {
+                "1x10G[1G]": ["Eth22(Port22)"]
+            }
+        },
+
+        "Ethernet22": {
+            "index": "23",
+            "lanes": "23",
+            "breakout_modes": {
+                "1x10G[1G]": ["Eth23(Port23)"]
+            }
+        },
+
+        "Ethernet23": {
+            "index": "24",
+            "lanes": "24",
+            "breakout_modes": {
+                "1x10G[1G]": ["Eth24(Port24)"]
+            }
+        },
+
+        "Ethernet24": {
+            "index": "25",
+            "lanes": "53",
+            "breakout_modes": {
+                "1x10G[1G]": ["Eth25(Port25)"]
+            }
+        },
+
+        "Ethernet25": {
+            "index": "26",
+            "lanes": "54",
+            "breakout_modes": {
+                "1x10G[1G]": ["Eth26(Port26)"]
+            }
+        },
+
+        "Ethernet26": {
+            "index": "27",
+            "lanes": "55",
+            "breakout_modes": {
+                "1x10G[1G]": ["Eth27(Port27)"]
+            }
+        },
+
+        "Ethernet27": {
+            "index": "28",
+            "lanes": "56",
+            "breakout_modes": {
+                "1x10G[1G]": ["Eth28(Port28)"]
+            }
+        },
+
+        "Ethernet28": {
+            "index": "29",
+            "lanes": "57",
+            "breakout_modes": {
+                "1x10G[1G]": ["Eth29(Port29)"]
+            }
+        },
+
+        "Ethernet29": {
+            "index": "30",
+            "lanes": "58",
+            "breakout_modes": {
+                "1x10G[1G]": ["Eth30(Port30)"]
+            }
+        },
+
+        "Ethernet30": {
+            "index": "31",
+            "lanes": "59",
+            "breakout_modes": {
+                "1x10G[1G]": ["Eth31(Port31)"]
+            }
+        },
+
+        "Ethernet31": {
+            "index": "32",
+            "lanes": "60",
+            "breakout_modes": {
+                "1x10G[1G]": ["Eth32(Port32)"]
+            }
+        },
+
+        "Ethernet32": {
+            "index": "33",
+            "lanes": "61",
+            "breakout_modes": {
+                "1x10G[1G]": ["Eth33(Port33)"]
+            }
+        },
+
+        "Ethernet33": {
+            "index": "34",
+            "lanes": "62",
+            "breakout_modes": {
+                "1x10G[1G]": ["Eth34(Port34)"]
+            }
+        },
+
+        "Ethernet34": {
+            "index": "35",
+            "lanes": "63",
+            "breakout_modes": {
+                "1x10G[1G]": ["Eth35(Port35)"]
+            }
+        },
+
+        "Ethernet35": {
+            "index": "36",
+            "lanes": "64",
+            "breakout_modes": {
+                "1x10G[1G]": ["Eth36(Port36)"]
+            }
+        },
+
+        "Ethernet36": {
+            "index": "37",
+            "lanes": "65",
+            "breakout_modes": {
+                "1x10G[1G]": ["Eth37(Port37)"]
+            }
+        },
+
+        "Ethernet37": {
+            "index": "38",
+            "lanes": "66",
+            "breakout_modes": {
+                "1x10G[1G]": ["Eth38(Port38)"]
+            }
+        },
+
+        "Ethernet38": {
+            "index": "39",
+            "lanes": "67",
+            "breakout_modes": {
+                "1x10G[1G]": ["Eth39(Port39)"]
+            }
+        },
+
+        "Ethernet39": {
+            "index": "40",
+            "lanes": "68",
+            "breakout_modes": {
+                "1x10G[1G]": ["Eth40(Port40)"]
+            }
+        },
+
+        "Ethernet40": {
+            "index": "41",
+            "lanes": "69",
+            "breakout_modes": {
+                "1x10G[1G]": ["Eth41(Port41)"]
+            }
+        },
+
+        "Ethernet41": {
+            "index": "42",
+            "lanes": "70",
+            "breakout_modes": {
+                "1x10G[1G]": ["Eth42(Port42)"]
+            }
+        },
+
+        "Ethernet42": {
+            "index": "43",
+            "lanes": "71",
+            "breakout_modes": {
+                "1x10G[1G]": ["Eth43(Port43)"]
+            }
+        },
+
+        "Ethernet43": {
+            "index": "44",
+            "lanes": "72",
+            "breakout_modes": {
+                "1x10G[1G]": ["Eth44(Port44)"]
+            }
+        },
+
+        "Ethernet44": {
+            "index": "45",
+            "lanes": "73",
+            "breakout_modes": {
+                "1x10G[1G]": ["Eth45(Port45)"]
+            }
+        },
+
+        "Ethernet45": {
+            "index": "46",
+            "lanes": "74",
+            "breakout_modes": {
+                "1x10G[1G]": ["Eth46(Port46)"]
+            }
+        },
+
+        "Ethernet46": {
+            "index": "47",
+            "lanes": "75",
+            "breakout_modes": {
+                "1x10G[1G]": ["Eth47(Port47)"]
+            }
+        },
+
+        "Ethernet47": {
+            "index": "48",
+            "lanes": "76",
+            "breakout_modes": {
+                "1x10G[1G]": ["Eth48(Port48)"]
+            }
+        },
+
+        "Ethernet48": {
+            "index": "49,49,49,49",
+            "lanes": "37,38,39,40",
+            "breakout_modes": {
+                "1x100G[40G]": ["Eth49(Port49)"],
+                "2x50G": ["Eth49/1(Port49)", "Eth49/2(Port49)"],
+                "4x25G": ["Eth49/1(Port49)", "Eth49/2(Port49)", "Eth49/3(Port49)", "Eth49/4(Port49)"],
+                "4x10G": ["Eth49/1(Port49)", "Eth49/2(Port49)", "Eth49/3(Port49)", "Eth49/4(Port49)"]
+            }
+        },
+
+        "Ethernet52": {
+            "index": "50,50,50,50",
+            "lanes": "29,30,31,32",
+            "breakout_modes": {
+                "1x100G[40G]": ["Eth50(Port50)"]
+            }
+        },
+
+        "Ethernet56": {
+            "index": "51,51,51,51",
+            "lanes": "33,34,35,36",
+            "breakout_modes": {
+                "1x100G[40G]": ["Eth51(Port51)"]
+            }
+        },
+
+        "Ethernet60": {
+            "index": "52,52,52,52",
+            "lanes": "49,50,51,52",
+            "breakout_modes": {
+                "1x100G[40G]": ["Eth52(Port52)"],
+                "2x50G": ["Eth52/1(Port52)", "Eth52/2(Port52)"],
+                "4x25G": ["Eth52/1(Port52)", "Eth52/2(Port52)", "Eth52/3(Port52)", "Eth52/4(Port52)"],
+                "4x10G": ["Eth52/1(Port52)", "Eth52/2(Port52)", "Eth52/3(Port52)", "Eth52/4(Port52)"]
+            }
+        },
+
+        "Ethernet64": {
+            "index": "53,53,53,53",
+            "lanes": "45,46,47,48",
+            "breakout_modes": {
+                "1x100G[40G]": ["Eth53(Port53)"]
+            }
+        },
+
+        "Ethernet68": {
+            "index": "54,54,54,54",
+            "lanes": "41,42,43,44",
+            "breakout_modes": {
+                "1x100G[40G]": ["Eth54(Port54)"]
+            }
+        }
+    }
+}

From 8a72d737912dc04da43b018ca3647da6720c80a4 Mon Sep 17 00:00:00 2001
From: jostar-yang <jostar_yang@edge-core.com>
Date: Fri, 10 Feb 2023 15:13:24 +0800
Subject: [PATCH 1084/1115] Modify CPLD name to more detail

---
 .../x86_64-accton_as5835_54x-r0/platform.json | 10 +++---
 .../as5835-54x/sonic_platform/component.py    | 36 ++++++-------------
 .../as5835-54x/sonic_platform/helper.py       |  4 ++-
 3 files changed, 18 insertions(+), 32 deletions(-)

diff --git a/device/accton/x86_64-accton_as5835_54x-r0/platform.json b/device/accton/x86_64-accton_as5835_54x-r0/platform.json
index 20fc68502..9159f73dc 100644
--- a/device/accton/x86_64-accton_as5835_54x-r0/platform.json
+++ b/device/accton/x86_64-accton_as5835_54x-r0/platform.json
@@ -3,19 +3,19 @@
         "name": "5835-54X",
         "components": [
             {
-                "name": "MB CPLD1"
+                "name": "MB_CPLD1"
             },
             {
-                "name": "MB CPLD2"
+                "name": "MB_CPLD2"
             },
             {
-                "name": "MB CPLD3"
+                "name": "MB_CPLD3"
             },
             {
-                "name": "FAN CPLD"
+                "name": "FAN_CPLD"
             },
             {
-                "name": "CPU CPLD"
+                "name": "CPU_CPLD"
             },
             {
                 "name": "BIOS"
diff --git a/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/component.py b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/component.py
index 9656d717b..8f0d8a6fe 100644
--- a/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/component.py
+++ b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/component.py
@@ -12,20 +12,20 @@
     raise ImportError(str(e) + "- required module not found")
 
 CPLD_ADDR_MAPPING = {
-    "MB CPLD1": ['3', '0x60'],
-    "MB CPLD2": ['3', '0x61'],
-    "MB CPLD3": ['3', '0x62'],
-    "FAN CPLD": ['3', '0x63'],
-    "CPU CPLD": ['1', '0x65']
+    "MB_CPLD1": ['3', '0x60'],
+    "MB_CPLD2": ['3', '0x61'],
+    "MB_CPLD3": ['3', '0x62'],
+    "FAN_CPLD": ['3', '0x63'],
+    "CPU_CPLD": ['1', '0x65']
 }
 SYSFS_PATH = "/sys/bus/i2c/devices/"
 BIOS_VERSION_PATH = "/sys/class/dmi/id/bios_version"
 COMPONENT_LIST= [
-   ("MB CPLD1", "Mainboard CPLD 1"),
-   ("MB CPLD2", "Mainboard CPLD 2"),
-   ("MB CPLD3", "Mainboard CPLD 3"),
-   ("FAN CPLD", "Fan board CPLD"),
-   ("CPU CPLD", "CPU CPLD"),
+   ("MB_CPLD1", "Mainboard CPLD(0x60)"),
+   ("MB_CPLD2", "Mainboard CPLD(0x61)"),
+   ("MB_CPLD3", "Mainboard CPLD(0x62"),
+   ("FAN_CPLD", "Fan board CPLD(0x63)"),
+   ("CPU_CPLD", "CPU CPLD(0x65)"),
    ("BIOS", "Basic Input/Output System")
    
 ]
@@ -39,22 +39,6 @@ def __init__(self, component_index=0):
         self.index = component_index
         self.name = self.get_name()
 
-    def __run_command(self, command):
-        # Run bash command and print output to stdout
-        try:
-            process = subprocess.Popen(
-                shlex.split(command), stdout=subprocess.PIPE)
-            while True:
-                output = process.stdout.readline()
-                if output == '' and process.poll() is not None:
-                    break
-            rc = process.poll()
-            if rc != 0:
-                return False
-        except Exception:
-            return False
-        return True
-
     def __get_bios_version(self):
         # Retrieves the BIOS firmware version
         try:
diff --git a/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/helper.py b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/helper.py
index 5162803fb..09c2af7a8 100644
--- a/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/helper.py
+++ b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/helper.py
@@ -37,7 +37,9 @@ def read_txt_file(self, file_path):
         try:
             with open(file_path, 'r', errors='replace') as fd:
                 data = fd.read()
-                return data.strip()
+                ret =  data.strip()
+                if len(ret) > 0:
+                    return ret
         except IOError:
             pass
         return None

From 0c8cb769adccddf6632f30dc5082db20157225b4 Mon Sep 17 00:00:00 2001
From: jostar-yang <jostar_yang@edge-core.com>
Date: Fri, 10 Feb 2023 15:22:42 +0800
Subject: [PATCH 1085/1115] Fix error cpld name

---
 .../as5835-54x/sonic_platform/component.py                      | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/component.py b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/component.py
index 8f0d8a6fe..d0932600c 100644
--- a/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/component.py
+++ b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/component.py
@@ -23,7 +23,7 @@
 COMPONENT_LIST= [
    ("MB_CPLD1", "Mainboard CPLD(0x60)"),
    ("MB_CPLD2", "Mainboard CPLD(0x61)"),
-   ("MB_CPLD3", "Mainboard CPLD(0x62"),
+   ("MB_CPLD3", "Mainboard CPLD(0x62)"),
    ("FAN_CPLD", "Fan board CPLD(0x63)"),
    ("CPU_CPLD", "CPU CPLD(0x65)"),
    ("BIOS", "Basic Input/Output System")

From 1fe39f5dbaeb012411cf27f70206479a93930e16 Mon Sep 17 00:00:00 2001
From: jostar-yang <jostar_yang@edge-core.com>
Date: Tue, 14 Feb 2023 17:50:25 +0800
Subject: [PATCH 1086/1115] Modify sys_led define in pddf-device.json

---
 .../pddf/pddf-device.json                     | 14 +++++++++----
 .../as5835-54x/sonic_platform/fan.py          | 20 +++++++++++++++++++
 .../as5835-54x/sonic_platform/fan_drawer.py   | 17 ++++++++++++++++
 3 files changed, 47 insertions(+), 4 deletions(-)

diff --git a/device/accton/x86_64-accton_as5835_54x-r0/pddf/pddf-device.json b/device/accton/x86_64-accton_as5835_54x-r0/pddf/pddf-device.json
index de5c1799a..9bbdeffd9 100644
--- a/device/accton/x86_64-accton_as5835_54x-r0/pddf/pddf-device.json
+++ b/device/accton/x86_64-accton_as5835_54x-r0/pddf/pddf-device.json
@@ -171,8 +171,11 @@
                 { "attr_name":"psu_mfr_id", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0X99", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"10" },
                 { "attr_name":"psu_fan_dir", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0xc3", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"5"},
                 { "attr_name":"psu_v_out", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x8b", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+                { "attr_name":"psu_v_out_min", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0xa4", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+                { "attr_name":"psu_v_out_max", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0xa5", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
                 { "attr_name":"psu_i_out", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x8c", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
                 { "attr_name":"psu_p_out", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x96", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+                { "attr_name":"psu_p_out_max", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0xa7", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
                 { "attr_name":"psu_fan1_speed_rpm", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x90", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
                 { "attr_name":"psu_temp1_input", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x8d", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}
             ]
@@ -184,7 +187,7 @@
         "dev_info": { "device_type":"PSU-EEPROM", "device_name":"PSU1-EEPROM", "device_parent":"MUX2", "virt_parent":"PSU1"},
         "i2c":
         {
-            "topo_info":{ "parent_bus":"0xb", "dev_addr":"0x50", "dev_type":"psu_eeprom"}, 
+            "topo_info":{ "parent_bus":"0xb", "dev_addr":"0x50", "dev_type":"psu_eeprom"},
             "attr_list": 
             [  
                 { "attr_name":"psu_serial_num", "attr_devaddr":"0x50", "attr_devtype":"eeprom", "attr_offset":"0x35", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"19" }
@@ -220,8 +223,11 @@
                 { "attr_name":"psu_mfr_id", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0X99", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"10" },
                 { "attr_name":"psu_fan_dir", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0xc3", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"5"},
                 { "attr_name":"psu_v_out", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x8b", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+                { "attr_name":"psu_v_out_min", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0xa4", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+                { "attr_name":"psu_v_out_max", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0xa5", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
                 { "attr_name":"psu_i_out", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x8c", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
                 { "attr_name":"psu_p_out", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x96", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+                { "attr_name":"psu_p_out_max", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0xa7", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
                 { "attr_name":"psu_fan1_speed_rpm", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x90", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
                 { "attr_name":"psu_temp1_input", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x8d", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}
             ]
@@ -233,7 +239,7 @@
         "dev_info": { "device_type":"PSU-EEPROM", "device_name":"PSU2-EEPROM", "device_parent":"MUX2", "virt_parent":"PSU2"},
         "i2c":
         {
-            "topo_info":{ "parent_bus":"0xc", "dev_addr":"0x53", "dev_type":"psu_eeprom"}, 
+            "topo_info":{ "parent_bus":"0xc", "dev_addr":"0x53", "dev_type":"psu_eeprom"},
             "attr_list": 
             [  
                 { "attr_name":"psu_serial_num", "attr_devaddr":"0x53", "attr_devtype":"eeprom", "attr_offset":"0x35", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"19" }
@@ -2792,7 +2798,7 @@
     "LOC_LED":
     {
         "dev_info": { "device_type":"LED", "device_name":"LOC_LED"},
-        "dev_attr": { "index":"0"},
+        "dev_attr": { "index":"0", "flag": "rw"},
         "i2c" :
         {
             "attr_list":
@@ -2806,7 +2812,7 @@
     "DIAG_LED":
     {
         "dev_info": { "device_type":"LED", "device_name":"DIAG_LED"},
-         "dev_attr": { "index":"0"},
+         "dev_attr": { "index":"0", "flag": "rw"},
          "i2c" :
          {
              "attr_list":
diff --git a/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/fan.py b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/fan.py
index 448f483c9..585652d87 100644
--- a/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/fan.py
+++ b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/fan.py
@@ -30,3 +30,23 @@ def get_name(self):
             else "PSU-{} FAN-{}".format(self.fans_psu_index, self.fan_index)
 
         return fan_name
+
+
+
+
+    def get_model(self):
+        """
+        Retrieves the model number (or part number) of the device
+        Returns:
+            string: Model/part number of device
+        """
+
+        return "N/A"
+
+    def get_serial(self):
+        """
+        Retrieves the serial number of the device
+        Returns:
+            string: Serial number of device
+        """
+        return "N/A"
diff --git a/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/fan_drawer.py b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/fan_drawer.py
index 624ece4f3..e4e37f962 100644
--- a/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/fan_drawer.py
+++ b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/fan_drawer.py
@@ -22,3 +22,20 @@ def get_name(self):
             string: The name of the device
         """
         return "FanTray{}".format(self.fantray_index)
+
+    def get_model(self):
+        """
+        Retrieves the model number (or part number) of the device
+        Returns:
+            string: Model/part number of device
+        """
+        return self._fan_list[0].get_model()
+
+    def get_serial(self):
+        """
+        Retrieves the serial number of the device
+        Returns:
+            string: Serial number of device
+        """
+        return self._fan_list[0].get_serial()
+

From 90fd0e69f0ae22b3243a3477c293396301c919e3 Mon Sep 17 00:00:00 2001
From: jostar-yang <jostar_yang@edge-core.com>
Date: Fri, 17 Feb 2023 14:40:43 +0800
Subject: [PATCH 1087/1115] Modify devices_to_ignore for psu_fan speed

---
 .../system_health_monitoring_config.json                      | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/device/accton/x86_64-accton_as5835_54x-r0/system_health_monitoring_config.json b/device/accton/x86_64-accton_as5835_54x-r0/system_health_monitoring_config.json
index 596dff2d5..68363f35e 100644
--- a/device/accton/x86_64-accton_as5835_54x-r0/system_health_monitoring_config.json
+++ b/device/accton/x86_64-accton_as5835_54x-r0/system_health_monitoring_config.json
@@ -4,8 +4,8 @@
         "asic",
         "psu.voltage",
         "psu.temperature",
-        "PSU1_FAN1.speed",
-        "PSU2_FAN1.speed"
+        "PSU-1 FAN-1.speed",
+        "PSU-2 FAN-1.speed"
     ],
     "user_defined_checkers": [],
     "polling_interval": 60,

From c346960410e4c657364d1076deff887c401f7720 Mon Sep 17 00:00:00 2001
From: jostar-yang <jostar_yang@edge-core.com>
Date: Tue, 21 Feb 2023 15:03:28 +0800
Subject: [PATCH 1088/1115] Fix system_health_monitoring_config led_color
 string

---
 .../pddf/pddf-device.json                       | 17 ++++++++++++++++-
 .../x86_64-accton_as5835_54x-r0/platform.json   |  2 +-
 .../system_health_monitoring_config.json        | 10 ++++------
 .../as5835-54x/sonic_platform/chassis.py        |  9 +++++++++
 .../as5835-54x/sonic_platform/fan.py            | 13 +++++++++++++
 5 files changed, 43 insertions(+), 8 deletions(-)

diff --git a/device/accton/x86_64-accton_as5835_54x-r0/pddf/pddf-device.json b/device/accton/x86_64-accton_as5835_54x-r0/pddf/pddf-device.json
index 9bbdeffd9..de6b082f9 100644
--- a/device/accton/x86_64-accton_as5835_54x-r0/pddf/pddf-device.json
+++ b/device/accton/x86_64-accton_as5835_54x-r0/pddf/pddf-device.json
@@ -5,7 +5,7 @@
         "num_fantrays":5,
         "num_fans_pertray":2,
         "num_ports":54,
-        "num_temps": 4,
+        "num_temps": 5,
         "pddf_dev_types":
         {
             "description":"AS5835-54X - Below is the list of supported PDDF device types (chip names) for various components. If any component uses some other driver, we will create the client using 'echo <dev-address> <dev-type> > <path>/new_device' method",
@@ -671,6 +671,21 @@
             ]
         }
     },
+    "TEMP5" :
+    {
+        "dev_info": { "device_type":"TEMP_SENSOR", "device_name":"TEMP5"},
+        "dev_attr": { "display_name":"coretemp-isa-0000"},
+        "i2c":
+        {
+            "path_info": {"sysfs_base_path": "/sys/class/hwmon/hwmon0"},
+            "attr_list":
+            [
+                { "attr_name": "temp1_high_crit_threshold", "drv_attr_name":"temp1_crit"},
+                { "attr_name": "temp1_high_threshold", "drv_attr_name":"temp1_max"},
+                { "attr_name": "temp1_input"}
+            ]
+        }
+    },
    
     "SYSSTATUS":
     {
diff --git a/device/accton/x86_64-accton_as5835_54x-r0/platform.json b/device/accton/x86_64-accton_as5835_54x-r0/platform.json
index 9159f73dc..9345ed8b8 100644
--- a/device/accton/x86_64-accton_as5835_54x-r0/platform.json
+++ b/device/accton/x86_64-accton_as5835_54x-r0/platform.json
@@ -191,7 +191,7 @@
                 "high-crit-threshold": true
             },
             {
-                "name": "CPU Temp",
+                "name": "coretemp-isa-0000",
                 "controllable": true,
                 "low-threshold": false,
                 "high-threshold": true,
diff --git a/device/accton/x86_64-accton_as5835_54x-r0/system_health_monitoring_config.json b/device/accton/x86_64-accton_as5835_54x-r0/system_health_monitoring_config.json
index 68363f35e..073403bdf 100644
--- a/device/accton/x86_64-accton_as5835_54x-r0/system_health_monitoring_config.json
+++ b/device/accton/x86_64-accton_as5835_54x-r0/system_health_monitoring_config.json
@@ -3,15 +3,13 @@
     "devices_to_ignore": [
         "asic",
         "psu.voltage",
-        "psu.temperature",
-        "PSU-1 FAN-1.speed",
-        "PSU-2 FAN-1.speed"
+        "psu.temperature"
     ],
     "user_defined_checkers": [],
     "polling_interval": 60,
     "led_color": {
-        "fault": "STATUS_LED_COLOR_AMBER",
-        "normal": "STATUS_LED_COLOR_GREEN",
-        "booting": "STATUS_LED_COLOR_GREEN"
+        "fault": "amber",
+        "normal": "green",
+        "booting": "green"
     }
 }
diff --git a/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/chassis.py b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/chassis.py
index dc564a980..4624cb9fb 100644
--- a/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/chassis.py
+++ b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/chassis.py
@@ -117,3 +117,12 @@ def get_port_or_cage_type(self, port):
         else:
             return SfpBase.SFP_PORT_TYPE_BIT_QSFP | SfpBase.SFP_PORT_TYPE_BIT_QSFP_PLUS | SfpBase.SFP_PORT_TYPE_BIT_QSFP28
             
+
+    def get_revision(self):
+        """
+        Retrieves the hardware revision of the device
+
+        Returns:
+            string: Revision value of device
+        """
+        return 'N/A'
\ No newline at end of file
diff --git a/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/fan.py b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/fan.py
index 585652d87..7aa6ebb38 100644
--- a/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/fan.py
+++ b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/fan.py
@@ -50,3 +50,16 @@ def get_serial(self):
             string: Serial number of device
         """
         return "N/A"
+
+    def get_target_speed(self):
+        """
+        Retrieves the target (expected) speed of the fan
+
+        Returns:
+            An integer, the percentage of full fan speed, in the range 0 (off)
+                 to 100 (full speed)
+        """
+        if self.is_psu_fan:
+            return super().get_speed()
+        else:
+            return super().get_target_speed()

From ab48a237d80874a25f39d4dd7a0672583139034f Mon Sep 17 00:00:00 2001
From: jostar-yang <jostar_yang@edge-core.com>
Date: Wed, 22 Feb 2023 18:11:35 +0800
Subject: [PATCH 1089/1115] Add set/get temp threshold api

---
 .../pddf/pddf-device.json                     |   2 +-
 .../x86_64-accton_as5835_54x-r0/platform.json |   2 +-
 .../x86_64-accton_as5835_54x-r0/sensors.conf  |   2 +-
 .../system_health_monitoring_config.json      |   2 +-
 .../as5835-54x/sonic_platform/chassis.py      |   2 +-
 .../as5835-54x/sonic_platform/eeprom.py       |  76 +----
 .../as5835-54x/sonic_platform/helper.py       | 267 +++++++++++++++++-
 .../as5835-54x/sonic_platform/thermal.py      | 200 ++++++++++++-
 8 files changed, 465 insertions(+), 88 deletions(-)

diff --git a/device/accton/x86_64-accton_as5835_54x-r0/pddf/pddf-device.json b/device/accton/x86_64-accton_as5835_54x-r0/pddf/pddf-device.json
index de6b082f9..af20b7aeb 100644
--- a/device/accton/x86_64-accton_as5835_54x-r0/pddf/pddf-device.json
+++ b/device/accton/x86_64-accton_as5835_54x-r0/pddf/pddf-device.json
@@ -614,7 +614,7 @@
     "TEMP1" :
     {
         "dev_info": { "device_type":"TEMP_SENSOR", "device_name":"TEMP1", "device_parent":"MUX4"},
-        "dev_attr": { "display_name":"CpuBoard_temp(0x4B)"},
+        "dev_attr": { "display_name":"CB_temp(0x4B)"},
         "i2c":
         {
             "topo_info": { "parent_bus":"0x1a", "dev_addr":"0x4B", "dev_type":"lm75"},
diff --git a/device/accton/x86_64-accton_as5835_54x-r0/platform.json b/device/accton/x86_64-accton_as5835_54x-r0/platform.json
index 9345ed8b8..4319aa8fe 100644
--- a/device/accton/x86_64-accton_as5835_54x-r0/platform.json
+++ b/device/accton/x86_64-accton_as5835_54x-r0/platform.json
@@ -159,7 +159,7 @@
         ],
         "thermals": [
             {
-                "name": "CpuBoard_temp(0x4B)",
+                "name": "CB_temp(0x4B)",
                 "controllable": true,
                 "low-threshold": false,
                 "high-threshold": true,
diff --git a/device/accton/x86_64-accton_as5835_54x-r0/sensors.conf b/device/accton/x86_64-accton_as5835_54x-r0/sensors.conf
index c220d28f5..4d132ef2a 100644
--- a/device/accton/x86_64-accton_as5835_54x-r0/sensors.conf
+++ b/device/accton/x86_64-accton_as5835_54x-r0/sensors.conf
@@ -48,4 +48,4 @@ chip "lm75-i2c-*-4c"
     label temp1 "MB_FrontMiddle_temp"
 
 chip "lm75-i2c-*-4b"
-    label temp1 "CpuBoard_temp"
+    label temp1 "CB_temp"
diff --git a/device/accton/x86_64-accton_as5835_54x-r0/system_health_monitoring_config.json b/device/accton/x86_64-accton_as5835_54x-r0/system_health_monitoring_config.json
index 073403bdf..930308045 100644
--- a/device/accton/x86_64-accton_as5835_54x-r0/system_health_monitoring_config.json
+++ b/device/accton/x86_64-accton_as5835_54x-r0/system_health_monitoring_config.json
@@ -10,6 +10,6 @@
     "led_color": {
         "fault": "amber",
         "normal": "green",
-        "booting": "green"
+        "booting": "off"
     }
 }
diff --git a/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/chassis.py b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/chassis.py
index 4624cb9fb..9bd98ed18 100644
--- a/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/chassis.py
+++ b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/chassis.py
@@ -112,7 +112,7 @@ def set_status_led(self, color):
 
     def get_port_or_cage_type(self, port):
         from sonic_platform_base.sfp_base import SfpBase
-        if port in range(1, 48):
+        if port in range(1, 49):
             return SfpBase.SFP_PORT_TYPE_BIT_SFP | SfpBase.SFP_PORT_TYPE_BIT_SFP_PLUS
         else:
             return SfpBase.SFP_PORT_TYPE_BIT_QSFP | SfpBase.SFP_PORT_TYPE_BIT_QSFP_PLUS | SfpBase.SFP_PORT_TYPE_BIT_QSFP28
diff --git a/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/eeprom.py b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/eeprom.py
index ca9b5ce06..a87ecc9f6 100644
--- a/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/eeprom.py
+++ b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/eeprom.py
@@ -2,87 +2,13 @@
 
 try:
     from sonic_platform_pddf_base.pddf_eeprom import PddfEeprom
-    import os
 except ImportError as e:
     raise ImportError(str(e) + "- required module not found")
 
-CACHE_ROOT = '/var/cache/sonic/decode-syseeprom'
-CACHE_FILE = 'syseeprom_cache'
 
 class Eeprom(PddfEeprom):
-    _TLV_INFO_MAX_LEN = 256
-    pddf_obj = {}
-    plugin_data = {}
 
     def __init__(self, pddf_data=None, pddf_plugin_data=None):
-        #PddfEeprom.__init__(self, pddf_data, pddf_plugin_data)
-        if not pddf_data or not pddf_plugin_data:
-            raise ValueError('PDDF JSON data error')
-
-        self.pddf_obj = pddf_data
-        self.plugin_data = pddf_plugin_data
-
-        # system EEPROM always has device name EEPROM1
-        self.eeprom_path = self.pddf_obj.get_path("EEPROM1", "eeprom")
-        if self.eeprom_path is None:
-            return
-
-        super(PddfEeprom, self).__init__(self.eeprom_path, 0, '', True)
-        self.eeprom_tlv_dict = dict()
-
-        # Create the cache directory if not created
-        if not os.path.exists(CACHE_ROOT):
-            try:
-                os.makedirs(CACHE_ROOT)
-            except Exception as e:
-                print("Error in creating Eeprom cache directory - {}".format(str(e)))
-
-        # Assign cache_name in eeprom_base.py
-        try:
-            self.set_cache_name(os.path.join(CACHE_ROOT, CACHE_FILE))
-        except:
-            pass
-
-        try:
-            self.eeprom_data = self.read_eeprom()
-        except Exception as e:
-            self.eeprom_data = "N/A"
-            raise RuntimeError("Eeprom is not Programmed - Error: {}".format(str(e)))
-        else:
-            eeprom = self.eeprom_data
-
-            try:
-                self.update_cache(eeprom)
-            except:
-                pass
-
-            if not self.is_valid_tlvinfo_header(eeprom):
-                return
-
-            total_length = ((eeprom[9]) << 8) | (eeprom[10])
-            tlv_index = self._TLV_INFO_HDR_LEN
-            tlv_end = self._TLV_INFO_HDR_LEN + total_length
-
-            while (tlv_index + 2) < len(eeprom) and tlv_index < tlv_end:
-                if not self.is_valid_tlv(eeprom[tlv_index:]):
-                    break
-
-                tlv = eeprom[tlv_index:tlv_index + 2
-                             + (eeprom[tlv_index + 1])]
-                code = "0x%02X" % ((tlv[0]))
-
-                if (tlv[0]) == self._TLV_CODE_VENDOR_EXT:
-                    value = str(((tlv[2]) << 24) | ((tlv[3]) << 16) |
-                                ((tlv[4]) << 8) | (tlv[5]))
-                    value += str(tlv[6:6 + (tlv[1])])
-                else:
-                    name, value = self.decoder(None, tlv)
-
-                self.eeprom_tlv_dict[code] = value
-                if (eeprom[tlv_index]) == self._TLV_CODE_CRC_32:
-                    break
-
-                tlv_index += (eeprom[tlv_index+1]) + 2
-
+        PddfEeprom.__init__(self, pddf_data, pddf_plugin_data)
 
     # Provide the functions/variables below for which implementation is to be overwritten
diff --git a/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/helper.py b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/helper.py
index 09c2af7a8..24c873934 100644
--- a/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/helper.py
+++ b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/helper.py
@@ -1,8 +1,14 @@
 import os
 import struct
-import subprocess
+import json
+import fcntl
 from mmap import *
 from sonic_py_common import device_info
+from sonic_py_common import logger
+from threading import Lock
+from typing import cast
+from sonic_py_common.general import getstatusoutput_noshell_pipe
+from sonic_py_common.general import getstatusoutput_noshell
 
 HOST_CHK_CMD = ["docker"]
 EMPTY_STRING = ""
@@ -51,3 +57,262 @@ def write_txt_file(self, file_path, value):
         except IOError:
             return False
         return True
+
+class FileLock:
+    """
+    Due to pmon docker not installing the py-filelock, this class 
+    implements a simple file lock feature.
+    Ref: https://github.com/tox-dev/py-filelock/blob/main/src/filelock/
+    """
+
+    def __init__(self, lock_file):
+        self._lock_file = lock_file
+        self._thread_lock = Lock()
+        self.is_locked = False
+
+    def acquire(self):
+        with self._thread_lock:
+            if self.is_locked:
+                return
+
+            fd = os.open(self._lock_file, flags=(os.O_RDWR | os.O_CREAT | os.O_TRUNC))
+            fcntl.flock(fd, fcntl.LOCK_EX)
+            self._lock_file_fd = fd
+            self.is_locked = True
+
+    def release(self):
+        with self._thread_lock:
+            if self.is_locked:
+                fd = cast(int, self._lock_file_fd)
+                self._lock_file_fd = None
+                fcntl.flock(fd, fcntl.LOCK_UN)
+                os.close(fd)
+                self.is_locked = False
+
+    def __enter__(self):
+        self.acquire()
+        return self
+
+    def __exit__(self, exc_type, exc_val, traceback):
+        self.release()
+
+    def __del__(self):
+        self.release()
+
+
+DEVICE_THRESHOLD_JSON_PATH = "/tmp/device_threshold.json"
+
+class DeviceThreshold:
+    HIGH_THRESHOLD = 'high_threshold'
+    LOW_THRESHOLD = 'low_threshold'
+    HIGH_CRIT_THRESHOLD = 'high_critical_threshold'
+    LOW_CRIT_THRESHOLD = 'low_critical_threshold'
+    NOT_AVAILABLE = 'N/A'
+
+    def __init__(self, th_name = NOT_AVAILABLE):
+        self.flock = FileLock("{}.lock".format(DEVICE_THRESHOLD_JSON_PATH))
+        self.name = th_name
+        self.__log = logger.Logger(log_identifier="DeviceThreshold")
+
+        self.__db_data = {}
+        self.__db_mtime = 0
+
+    def __reload_db(self):
+        try:
+            db_data = {}
+            with self.flock:
+                with open(DEVICE_THRESHOLD_JSON_PATH, "r") as db_file:
+                    db_data = json.load(db_file)
+        except Exception as e:
+            self.__log.log_warning('{}'.format(str(e)))
+            return None
+
+        return db_data
+
+    def __get_data(self, field):
+        """
+        Retrieves data frome JSON file by field
+
+        Args :
+            field: String
+
+        Returns:
+            A string if getting is successfully, 'N/A' if not
+        """
+        if os.path.exists(DEVICE_THRESHOLD_JSON_PATH):
+            new_mtime = os.path.getmtime(DEVICE_THRESHOLD_JSON_PATH)
+            if new_mtime != self.__db_mtime:
+                new_data = self.__reload_db()
+                if new_data is not None:
+                    self.__db_data = new_data
+                    self.__db_mtime = new_mtime
+
+        if self.name not in self.__db_data.keys():
+            return self.NOT_AVAILABLE
+
+        if field not in self.__db_data[self.name].keys():
+            return self.NOT_AVAILABLE
+
+        return self.__db_data[self.name][field]
+
+    def __set_data(self, field, new_val):
+        """
+        Set data to JSON file by field
+
+        Args :
+            field: String
+            new_val: String
+
+        Returns:
+            A boolean, True if setting is set successfully, False if not
+        """
+        if self.name not in self.__db_data.keys():
+            self.__db_data[self.name] = {}
+
+        old_val = self.__db_data[self.name].get(field, None)
+        if old_val is not None and old_val == new_val:
+            return True
+
+        self.__db_data[self.name][field] = new_val
+
+        try:
+            with self.flock:
+                db_data = {}
+                mode = "r+" if os.path.exists(DEVICE_THRESHOLD_JSON_PATH) else "w+"
+                with open(DEVICE_THRESHOLD_JSON_PATH, mode) as db_file:
+                    if mode == "r+":
+                        db_data = json.load(db_file)
+
+                    if self.name not in db_data.keys():
+                        db_data[self.name] = {}
+
+                    db_data[self.name][field] = new_val
+
+                    if mode == "r+":
+                        db_file.seek(0)
+                        # erase old data
+                        db_file.truncate(0)
+                    # write all data
+                    json.dump(db_data, db_file, indent=4)
+                self.__db_mtime = os.path.getmtime(DEVICE_THRESHOLD_JSON_PATH)
+        except Exception as e:
+            self.__log.log_error('{}'.format(str(e)))
+            return False
+
+        return True
+
+    def get_high_threshold(self):
+        """
+        Retrieves the high threshold temperature from JSON file.
+
+        Returns:
+            string : the high threshold temperature of thermal,
+                     e.g. "30.125"
+        """
+        return self.__get_data(self.HIGH_THRESHOLD)
+
+    def set_high_threshold(self, temperature):
+        """
+        Sets the high threshold temperature of thermal
+        Args :
+            temperature: A string of temperature, e.g. "30.125"
+        Returns:
+            A boolean, True if threshold is set successfully, False if not
+        """
+        if isinstance(temperature, str) is not True:
+            raise TypeError('The parameter requires string type.')
+
+        try:
+            if temperature != self.NOT_AVAILABLE:
+                float(temperature)
+        except ValueError:
+            raise ValueError('The parameter requires a float string. ex:\"30.1\"')
+
+        return self.__set_data(self.HIGH_THRESHOLD, temperature)
+
+    def get_low_threshold(self):
+        """
+        Retrieves the low threshold temperature from JSON file.
+
+        Returns:
+            string : the low threshold temperature of thermal,
+                     e.g. "30.125"
+        """
+        return self.__get_data(self.LOW_THRESHOLD)
+
+    def set_low_threshold(self, temperature):
+        """
+        Sets the low threshold temperature of thermal
+        Args :
+            temperature: A string of temperature, e.g. "30.125"
+        Returns:
+            A boolean, True if threshold is set successfully, False if not
+        """
+        if isinstance(temperature, str) is not True:
+            raise TypeError('The parameter requires string type.')
+
+        try:
+            if temperature != self.NOT_AVAILABLE:
+                float(temperature)
+        except ValueError:
+            raise ValueError('The parameter requires a float string. ex:\"30.1\"')
+
+        return self.__set_data(self.LOW_THRESHOLD, temperature)
+
+    def get_high_critical_threshold(self):
+        """
+        Retrieves the high critical threshold temperature from JSON file.
+
+        Returns:
+            string : the high critical threshold temperature of thermal,
+                     e.g. "30.125"
+        """
+        return self.__get_data(self.HIGH_CRIT_THRESHOLD)
+
+    def set_high_critical_threshold(self, temperature):
+        """
+        Sets the high critical threshold temperature of thermal
+        Args :
+            temperature: A string of temperature, e.g. "30.125"
+        Returns:
+            A boolean, True if threshold is set successfully, False if not
+        """
+        if isinstance(temperature, str) is not True:
+            raise TypeError('The parameter requires string type.')
+
+        try:
+            if temperature != self.NOT_AVAILABLE:
+                float(temperature)
+        except ValueError:
+            raise ValueError('The parameter requires a float string. ex:\"30.1\"')
+
+        return self.__set_data(self.HIGH_CRIT_THRESHOLD, temperature)
+
+    def get_low_critical_threshold(self):
+        """
+        Retrieves the low critical threshold temperature from JSON file.
+
+        Returns:
+            string : the low critical threshold temperature of thermal,
+                     e.g. "30.125"
+        """
+        return self.__get_data(self.LOW_CRIT_THRESHOLD)
+
+    def set_low_critical_threshold(self, temperature):
+        """
+        Sets the low critical threshold temperature of thermal
+        Args :
+            temperature: A string of temperature, e.g. "30.125"
+        Returns:
+            A boolean, True if threshold is set successfully, False if not
+        """
+        if isinstance(temperature, str) is not True:
+            raise TypeError('The parameter requires string type.')
+
+        try:
+            if temperature != self.NOT_AVAILABLE:
+                float(temperature)
+        except ValueError:
+            raise ValueError('The parameter requires a float string. ex:\"30.1\"')
+
+        return self.__set_data(self.LOW_CRIT_THRESHOLD, temperature)
diff --git a/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/thermal.py b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/thermal.py
index 8b7769cec..3240b3933 100644
--- a/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/thermal.py
+++ b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/thermal.py
@@ -3,9 +3,60 @@
 
 try:
     from sonic_platform_pddf_base.pddf_thermal import PddfThermal
+    from .helper import DeviceThreshold
 except ImportError as e:
     raise ImportError(str(e) + "- required module not found")
 
+NOT_AVAILABLE = DeviceThreshold.NOT_AVAILABLE
+HIGH_THRESHOLD = DeviceThreshold.HIGH_THRESHOLD
+LOW_THRESHOLD = DeviceThreshold.LOW_THRESHOLD
+HIGH_CRIT_THRESHOLD = DeviceThreshold.HIGH_CRIT_THRESHOLD
+LOW_CRIT_THRESHOLD = DeviceThreshold.LOW_CRIT_THRESHOLD
+
+DEFAULT_THRESHOLD = {
+    'CB_temp(0x4B)' : {
+        HIGH_THRESHOLD : '80.0',
+        LOW_THRESHOLD : NOT_AVAILABLE,
+        HIGH_CRIT_THRESHOLD : NOT_AVAILABLE,
+        LOW_CRIT_THRESHOLD : NOT_AVAILABLE
+    },
+    'MB_FrontMiddle_temp(0x4C)' : {
+        HIGH_THRESHOLD : '80.0',
+        LOW_THRESHOLD : NOT_AVAILABLE,
+        HIGH_CRIT_THRESHOLD : NOT_AVAILABLE,
+        LOW_CRIT_THRESHOLD : NOT_AVAILABLE
+    },
+    'MB_RearLeft_temp(0x49)' : {
+        HIGH_THRESHOLD : '80.0',
+        LOW_THRESHOLD : NOT_AVAILABLE,
+        HIGH_CRIT_THRESHOLD : NOT_AVAILABLE,
+        LOW_CRIT_THRESHOLD : NOT_AVAILABLE
+    },
+    'MB_RearLeft_temp(0x4A)' : {
+        HIGH_THRESHOLD : '80.0',
+        LOW_THRESHOLD : NOT_AVAILABLE,
+        HIGH_CRIT_THRESHOLD : NOT_AVAILABLE,
+        LOW_CRIT_THRESHOLD : NOT_AVAILABLE
+    },    
+    'coretemp-isa-0000' : {
+        HIGH_THRESHOLD : '82.0',
+        LOW_THRESHOLD : NOT_AVAILABLE,
+        HIGH_CRIT_THRESHOLD : '104.0',
+        LOW_CRIT_THRESHOLD : NOT_AVAILABLE
+    },
+    'PSU-1 temp sensor 1' : {
+        HIGH_THRESHOLD : '80.0',
+        LOW_THRESHOLD : NOT_AVAILABLE,
+        HIGH_CRIT_THRESHOLD : NOT_AVAILABLE,
+        LOW_CRIT_THRESHOLD : NOT_AVAILABLE
+    },
+    'PSU-2 temp sensor 1' : {
+        HIGH_THRESHOLD : '80.0',
+        LOW_THRESHOLD : NOT_AVAILABLE,
+        HIGH_CRIT_THRESHOLD : NOT_AVAILABLE,
+        LOW_CRIT_THRESHOLD : NOT_AVAILABLE
+    }
+}
 
 class Thermal(PddfThermal):
     """PDDF Platform-Specific Thermal class"""
@@ -16,6 +67,11 @@ def __init__(self, index, pddf_data=None, pddf_plugin_data=None, is_psu_thermal=
         self.pddf_obj = pddf_data
         self.thermal_obj_name = "TEMP{}".format(self.thermal_index)
         self.thermal_obj = self.pddf_obj.data[self.thermal_obj_name]
+        
+        # Threshold Configuration
+        self.__conf = DeviceThreshold(self.get_name())
+        # Default threshold.
+        self.__default_threshold = DEFAULT_THRESHOLD[self.get_name()]
 
     # Provide the functions/variables below for which implementation is to be overwritten
     def get_name(self):
@@ -25,18 +81,148 @@ def get_name(self):
             if 'dev_attr' in self.thermal_obj.keys():
                 if 'display_name' in self.thermal_obj['dev_attr']:
                     return str(self.thermal_obj['dev_attr']['display_name'])
+
             # In case of errors
-            #return (self.thermal_obj_name)
             return "Temp sensor {0}".format(self.thermal_index)
 
-    #def get_name(self):
-    #    if self.is_psu_thermal:
-    #        return "PSU-{0} temp sensor 1".format(self.thermals_psu_index)
-    #    else:
-    #        return "Temp sensor {0}".format(self.thermal_index)
-
     def get_status(self):
         get_temp=self.get_temperature()
 
         if get_temp is not None:
             return True if get_temp else False
+
+    def set_high_threshold(self, temperature):
+        try:
+            value = float(temperature)
+        except Exception:
+            return False
+
+        # The new value can not be more than the default value.
+        default_value = self.__default_threshold[HIGH_THRESHOLD]
+        if default_value != NOT_AVAILABLE:
+            if value > float(default_value):
+                return False
+
+        try:
+            self.__conf.set_high_threshold(str(value))
+        except Exception:
+            return False
+
+        return True
+
+    def get_high_threshold(self):
+        value = self.__conf.get_high_threshold()
+        if value != NOT_AVAILABLE:
+            return float(value)
+
+        default_value = self.__default_threshold[HIGH_THRESHOLD]
+        if default_value != NOT_AVAILABLE:
+            return float(default_value)
+
+        raise NotImplementedError
+
+    def set_low_threshold(self, temperature):
+        try:
+            value = float(temperature)
+        except Exception:
+            return False
+
+        # The new value can not be less than the default value.
+        default_value = self.__default_threshold[LOW_THRESHOLD]
+        if default_value != NOT_AVAILABLE:
+            if value < float(default_value):
+                return False
+
+        try:
+            self.__conf.set_low_threshold(str(value))
+        except Exception:
+            return False
+
+        return True
+
+    def get_low_threshold(self):
+        value = self.__conf.get_low_threshold()
+        if value != NOT_AVAILABLE:
+            return float(value)
+
+        default_value = self.__default_threshold[LOW_THRESHOLD]
+        if default_value != NOT_AVAILABLE:
+            return float(default_value)
+
+        raise NotImplementedError
+
+    def set_high_critical_threshold(self, temperature):
+        try:
+            value = float(temperature)
+        except Exception:
+            return False
+
+        # The new value can not be more than the default value.
+        default_value = self.__default_threshold[HIGH_CRIT_THRESHOLD]
+        if default_value != NOT_AVAILABLE:
+            if value > float(default_value):
+                return False
+
+        try:
+            self.__conf.set_high_critical_threshold(str(value))
+        except Exception:
+            return False
+
+        return True
+
+    def get_high_critical_threshold(self):
+        value = self.__conf.get_high_critical_threshold()
+        if value != NOT_AVAILABLE:
+            return float(value)
+
+        default_value = self.__default_threshold[HIGH_CRIT_THRESHOLD]
+        if default_value != NOT_AVAILABLE:
+            return float(default_value)
+
+        raise NotImplementedError
+
+    def set_low_critical_threshold(self, temperature):
+        try:
+            value = float(temperature)
+        except Exception:
+            return False
+
+        # The new value can not be less than the default value.
+        default_value = self.__default_threshold[LOW_CRIT_THRESHOLD]
+        if default_value != NOT_AVAILABLE:
+            if value < float(default_value):
+                return False
+
+        try:
+            self.__conf.set_low_critical_threshold(str(value))
+        except Exception:
+            return False
+
+        return True
+
+    def get_low_critical_threshold(self):
+        value = self.__conf.get_low_critical_threshold()
+        if value != NOT_AVAILABLE:
+            return float(value)
+
+        default_value = self.__default_threshold[LOW_CRIT_THRESHOLD]
+        if default_value != NOT_AVAILABLE:
+            return float(default_value)
+
+        raise NotImplementedError
+
+    def get_model(self):
+        """
+        Retrieves the model number (or part number) of the device
+        Returns:
+            string: Model/part number of device
+        """
+        return 'N/A'
+
+    def get_serial(self):
+        """
+        Retrieves the serial number of the device
+        Returns:
+            string: Serial number of device
+        """
+        return 'N/A'
\ No newline at end of file

From d135d8a91a1950f14a2767b813eec993992ebec8 Mon Sep 17 00:00:00 2001
From: michael_shih <michael_shih@edge-core.com>
Date: Thu, 16 Mar 2023 07:42:52 +0100
Subject: [PATCH 1090/1115] [Edgecore][device][platform] Fixed sonic-mgmt
 pytest failed items

Signed-off-by: michael_shih <michael_shih@edge-core.com>
---
 .../x86_64-accton_as5835_54x-r0/platform.json      |  5 +++++
 .../platform_components.json                       | 14 ++++++++++++++
 .../pmon_daemon_control.json                       |  2 --
 .../system_health_monitoring_config.json           |  4 +++-
 .../as5835-54x/classes/fanutil.py                  |  8 +-------
 .../as5835-54x/utils/accton_as5835_54x_util.py     |  2 ++
 src/sonic-frr/frr                                  |  2 +-
 7 files changed, 26 insertions(+), 11 deletions(-)
 create mode 100644 device/accton/x86_64-accton_as5835_54x-r0/platform_components.json

diff --git a/device/accton/x86_64-accton_as5835_54x-r0/platform.json b/device/accton/x86_64-accton_as5835_54x-r0/platform.json
index 4319aa8fe..4bcf15cee 100644
--- a/device/accton/x86_64-accton_as5835_54x-r0/platform.json
+++ b/device/accton/x86_64-accton_as5835_54x-r0/platform.json
@@ -1,6 +1,11 @@
 {
     "chassis": {
         "name": "5835-54X",
+        "thermal_manager":false,
+        "status_led": {
+            "controllable": true,
+            "colors": ["green", "red", "off"]
+        },
         "components": [
             {
                 "name": "MB_CPLD1"
diff --git a/device/accton/x86_64-accton_as5835_54x-r0/platform_components.json b/device/accton/x86_64-accton_as5835_54x-r0/platform_components.json
new file mode 100644
index 000000000..16f6f73dd
--- /dev/null
+++ b/device/accton/x86_64-accton_as5835_54x-r0/platform_components.json
@@ -0,0 +1,14 @@
+{
+    "chassis": {
+        "5835-54X-O-AC-F": {
+            "component": {
+                "MB_CPLD1": { },
+                "MB_CPLD2": { },
+                "MB_CPLD3": { },
+                "FAN_CPLD": { },
+                "CPU_CPLD": { },
+                "BIOS": { }
+            }
+        }
+    }
+}
diff --git a/device/accton/x86_64-accton_as5835_54x-r0/pmon_daemon_control.json b/device/accton/x86_64-accton_as5835_54x-r0/pmon_daemon_control.json
index fb49c2978..94592fa8c 100644
--- a/device/accton/x86_64-accton_as5835_54x-r0/pmon_daemon_control.json
+++ b/device/accton/x86_64-accton_as5835_54x-r0/pmon_daemon_control.json
@@ -1,5 +1,3 @@
 {
     "skip_ledd": true
-
 }
-
diff --git a/device/accton/x86_64-accton_as5835_54x-r0/system_health_monitoring_config.json b/device/accton/x86_64-accton_as5835_54x-r0/system_health_monitoring_config.json
index 930308045..4ea184946 100644
--- a/device/accton/x86_64-accton_as5835_54x-r0/system_health_monitoring_config.json
+++ b/device/accton/x86_64-accton_as5835_54x-r0/system_health_monitoring_config.json
@@ -3,7 +3,9 @@
     "devices_to_ignore": [
         "asic",
         "psu.voltage",
-        "psu.temperature"
+        "psu.temperature",
+        "PSU1_FAN1.speed",
+        "PSU2_FAN1.speed"
     ],
     "user_defined_checkers": [],
     "polling_interval": 60,
diff --git a/platform/broadcom/sonic-platform-modules-accton/as5835-54x/classes/fanutil.py b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/classes/fanutil.py
index 1869e5da4..c67b5bb67 100644
--- a/platform/broadcom/sonic-platform-modules-accton/as5835-54x/classes/fanutil.py
+++ b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/classes/fanutil.py
@@ -42,7 +42,7 @@ class FanUtil(object):
     FAN_NODE_NUM_OF_MAP = 2
     FAN_NODE_FAULT_IDX_OF_MAP = 1    
     FAN_NODE_DIR_IDX_OF_MAP = 2
-    
+
     BASE_VAL_PATH = '/sys/bus/i2c/devices/3-0063/{0}'
     FAN_DUTY_PATH = '/sys/bus/i2c/devices/3-0063/fan_duty_cycle_percentage'
 
@@ -54,12 +54,7 @@ class FanUtil(object):
         key2 = fan node index (interger) starting from 1
         value = path to fan device file (string) """
     _fan_to_device_path_mapping = {}
-    
-#fan1_direction
-#fan1_fault
-#fan1_present
 
- #(FAN_NUM_2_IDX, FAN_NODE_DUTY_IDX_OF_MAP): 'fan2_duty_cycle_percentage',
     _fan_to_device_node_mapping = {
            (FAN_NUM_1_IDX, FAN_NODE_FAULT_IDX_OF_MAP): 'fan1_fault',           
            (FAN_NUM_1_IDX, FAN_NODE_DIR_IDX_OF_MAP): 'fan1_direction',           
@@ -199,7 +194,6 @@ def set_fan_duty_cycle(self, val):
         fan_file.close()
         return True
 
-
     def get_fanr_speed(self, fan_num):
         return self._get_fan_node_val(fan_num, self.FANR_NODE_SPEED_IDX_OF_MAP)
 
diff --git a/platform/broadcom/sonic-platform-modules-accton/as5835-54x/utils/accton_as5835_54x_util.py b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/utils/accton_as5835_54x_util.py
index 5292d1ec3..af4b7c0c3 100755
--- a/platform/broadcom/sonic-platform-modules-accton/as5835-54x/utils/accton_as5835_54x_util.py
+++ b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/utils/accton_as5835_54x_util.py
@@ -386,6 +386,8 @@ def do_sonic_platform_clean():
         else:
             print('{} is uninstalled'.format(PLATFORM_API2_WHL_FILE_PY3))
 
+    return
+
 def do_install():
     print("Checking system....")
     if driver_check() == False:
diff --git a/src/sonic-frr/frr b/src/sonic-frr/frr
index 3539968c3..de0e358b8 160000
--- a/src/sonic-frr/frr
+++ b/src/sonic-frr/frr
@@ -1 +1 @@
-Subproject commit 3539968c38ed8d46b9705014b5492b1a610888d5
+Subproject commit de0e358b877ac9b595e7fb387a302c960a4c02d1

From d766805d3f8f24e2e45705566357d743f6fdaea5 Mon Sep 17 00:00:00 2001
From: michael_shih <michael_shih@edge-core.com>
Date: Thu, 16 Mar 2023 15:33:28 +0800
Subject: [PATCH 1091/1115] [Edgecore][device][platform] Update pcie.yaml

Signed-off-by: michael_shih <michael_shih@edge-core.com>
---
 .../x86_64-accton_as5835_54x-r0/pcie.yaml     | 112 +++++++++++-------
 1 file changed, 69 insertions(+), 43 deletions(-)

diff --git a/device/accton/x86_64-accton_as5835_54x-r0/pcie.yaml b/device/accton/x86_64-accton_as5835_54x-r0/pcie.yaml
index ecfe957bc..f9e26c35f 100644
--- a/device/accton/x86_64-accton_as5835_54x-r0/pcie.yaml
+++ b/device/accton/x86_64-accton_as5835_54x-r0/pcie.yaml
@@ -1,135 +1,161 @@
 - bus: '00'
   dev: '00'
   fn: '0'
-  id: 1980
-  name: 'Host bridge: Intel Corporation Atom Processor C3000 Series System Agent'
+  id: '1980'
+  name: 'Host bridge: Intel Corporation Atom Processor C3000 Series System Agent (rev
+    11)'
 - bus: '00'
   dev: '04'
   fn: '0'
   id: 19a1
-  name: 'Host bridge: Intel Corporation Atom Processor C3000 Series Error Registers'
+  name: 'Host bridge: Intel Corporation Atom Processor C3000 Series Error Registers
+    (rev 11)'
 - bus: '00'
   dev: '05'
   fn: '0'
   id: 19a2
-  name: 'Generic system peripheral [0807]: Intel Corporation Atom Processor C3000 Series Root Complex Event Collector'
+  name: 'Generic system peripheral [0807]: Intel Corporation Atom Processor C3000
+    Series Root Complex Event Collector (rev 11)'
 - bus: '00'
   dev: '06'
   fn: '0'
   id: 19a3
-  name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series Integrated QAT Root Port'
+  name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series Integrated QAT
+    Root Port (rev 11)'
 - bus: '00'
   dev: 09
   fn: '0'
-  id: 0x19a4
-  name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root Port #0 '
+  id: 19a4
+  name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root
+    Port #0 (rev 11)'
 - bus: '00'
-  dev: 'b'
+  dev: 0b
   fn: '0'
   id: 19a6
-  name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root Port #2'
+  name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root
+    Port #2 (rev 11)'
 - bus: '00'
-  dev: 'e'
+  dev: 0e
   fn: '0'
   id: 19a8
-  name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root Port #4 '
+  name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root
+    Port #4 (rev 11)'
 - bus: '00'
   dev: '10'
   fn: '0'
   id: 19aa
-  name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root Port #6'
+  name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series PCI Express Root
+    Port #6 (rev 11)'
 - bus: '00'
   dev: '12'
   fn: '0'
   id: 19ac
-  name: 'System peripheral: Intel Corporation Atom Processor C3000 Series SMBus Contoller'
+  name: 'System peripheral: Intel Corporation Atom Processor C3000 Series SMBus Contoller
+    - Host (rev 11)'
 - bus: '00'
-  dev: '013'
+  dev: '13'
   fn: '0'
   id: 19b2
-  name: 'SATA controller: Intel Corporation Atom Processor C3000 Series SATA Controller 0'
+  name: 'SATA controller: Intel Corporation Atom Processor C3000 Series SATA Controller
+    0 (rev 11)'
 - bus: '00'
   dev: '15'
   fn: '0'
   id: 19d0
-  name: 'USB controller: Intel Corporation Atom Processor C3000 Series USB 3.0 xHCI Controller'
+  name: 'USB controller: Intel Corporation Atom Processor C3000 Series USB 3.0 xHCI
+    Controller (rev 11)'
 - bus: '00'
   dev: '16'
   fn: '0'
   id: 19d1
-  name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series Integrated LAN Root Port #0'
+  name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series Integrated LAN
+    Root Port #0 (rev 11)'
 - bus: '00'
   dev: '17'
   fn: '0'
   id: 19d2
-  name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series Integrated LAN Root Port #1'
+  name: 'PCI bridge: Intel Corporation Atom Processor C3000 Series Integrated LAN
+    Root Port #1 (rev 11)'
 - bus: '00'
   dev: '18'
   fn: '0'
   id: 19d3
-  name: 'Communication controller: Intel Corporation Atom Processor C3000 Series ME HECI 1'
+  name: 'Communication controller: Intel Corporation Atom Processor C3000 Series ME
+    HECI 1 (rev 11)'
 - bus: '00'
-  dev: '1a'
+  dev: 1a
   fn: '0'
   id: 19d8
-  name: 'Serial controller: Intel Corporation Atom Processor C3000 Series HSUART Controller'
+  name: 'Serial controller: Intel Corporation Atom Processor C3000 Series HSUART Controller
+    (rev 11)'
 - bus: '00'
-  dev: '1a'
+  dev: 1a
   fn: '1'
   id: 19d8
-  name: 'Serial controller: Intel Corporation Atom Processor C3000 Series HSUART Controller'
+  name: 'Serial controller: Intel Corporation Atom Processor C3000 Series HSUART Controller
+    (rev 11)'
 - bus: '00'
-  dev: '1a'
+  dev: 1a
   fn: '2'
   id: 19d8
-  name: 'Serial controller: Intel Corporation Atom Processor C3000 Series HSUART Controller'
+  name: 'Serial controller: Intel Corporation Atom Processor C3000 Series HSUART Controller
+    (rev 11)'
 - bus: '00'
-  dev: '1f'
+  dev: 1f
   fn: '0'
   id: 19dc
-  name: 'ISA bridge: Intel Corporation Atom Processor C3000 Series LPC or eSPI'
+  name: 'ISA bridge: Intel Corporation Atom Processor C3000 Series LPC or eSPI (rev
+    11)'
 - bus: '00'
-  dev: '1f'
+  dev: 1f
   fn: '1'
   id: 19dd
-  name: 'Memory controller: Intel Corporation Atom Processor C3000 Series Primary to Side Band (P2SB) Bridge'
+  name: 'Memory controller: Intel Corporation Atom Processor C3000 Series Primary
+    to Side Band (P2SB) Bridge (rev 11)'
 - bus: '00'
-  dev: '1f'
+  dev: 1f
   fn: '2'
   id: 19de
-  name: 'Memory controller: Intel Corporation Atom Processor C3000 Series Power Management Controller'
+  name: 'Memory controller: Intel Corporation Atom Processor C3000 Series Power Management
+    Controller (rev 11)'
 - bus: '00'
-  dev: '1f'
+  dev: 1f
   fn: '4'
   id: 19df
-  name: 'SMBus: Intel Corporation Atom Processor C3000 Series SMBus controller'
+  name: 'SMBus: Intel Corporation Atom Processor C3000 Series SMBus controller (rev
+    11)'
 - bus: '00'
-  dev: '1f'
+  dev: 1f
   fn: '5'
-  id: 0x19e0
-  name: 'Serial bus controller [0c80]: Intel Corporation Atom Processor C3000 Series SPI Controller'
+  id: 19e0
+  name: 'Serial bus controller [0c80]: Intel Corporation Atom Processor C3000 Series
+    SPI Controller (rev 11)'
 - bus: '01'
   dev: '00'
   fn: '0'
   id: 19e2
-  name: 'Co-processor: Intel Corporation Atom Processor C3000 Series QuickAssist Technology'
+  name: 'Co-processor: Intel Corporation Atom Processor C3000 Series QuickAssist Technology
+    (rev 11)'
 - bus: '02'
   dev: '00'
   fn: '0'
   id: b771
-  name: 'Ethernet controller: Broadcom Inc. and subsidiaries Device b771'
+  name: 'Ethernet controller: Broadcom Inc. and subsidiaries Device b771 (rev 01)'
 - bus: '05'
   dev: '00'
   fn: '0'
-  id: 1533
-  name: 'Ethernet controller: Intel Corporation I210 Gigabit Network Connection'
+  id: '1533'
+  name: 'Ethernet controller: Intel Corporation I210 Gigabit Network Connection (rev
+    03)'
 - bus: '06'
   dev: '00'
   fn: '0'
   id: 15c2
-  name: 'Ethernet controller: Intel Corporation Ethernet Connection X553 Backplane'
-- bus: '08'
+  name: 'Ethernet controller: Intel Corporation Ethernet Connection X553 Backplane
+    (rev 11)'
+- bus: 08
   dev: '00'
   fn: '0'
   id: 15e5
-  name: 'Ethernet controller: Intel Corporation Ethernet Connection X553 1GbE'
+  name: 'Ethernet controller: Intel Corporation Ethernet Connection X553 1GbE (rev
+    11)'

From 8ea30db35b05256cf218a5fdb8a5ebe04a961d52 Mon Sep 17 00:00:00 2001
From: jostar-yang <jostar_yang@edge-core.com>
Date: Thu, 13 Apr 2023 15:55:42 +0800
Subject: [PATCH 1092/1115] Add get_error_description() support to sfp.py

---
 .../as5835-54x/sonic_platform/sfp.py          | 148 +++++++++++++++++-
 1 file changed, 144 insertions(+), 4 deletions(-)

diff --git a/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/sfp.py b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/sfp.py
index d8d6cc5de..b94e5d257 100644
--- a/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/sfp.py
+++ b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/sfp.py
@@ -14,6 +14,17 @@ class Sfp(PddfSfp):
     PDDF Platform-Specific Sfp class
     """
 
+    SFP_TYPE_CODE_LIST = [
+        0x03,  # SFP/SFP+/SFP28
+        0x0b   # DWDM-SFP/SFP+
+    ]
+    QSFP_TYPE_CODE_LIST = [
+        0x0c, # QSFP
+        0x0d, # QSFP+ or later
+        0x11, # QSFP28 or later
+        0xe1  # QSFP28 EDFA
+    ]
+
     def __init__(self, index, pddf_data=None, pddf_plugin_data=None):
         PddfSfp.__init__(self, index, pddf_data, pddf_plugin_data)
         self.index = index + 1
@@ -29,7 +40,7 @@ def get_name(self):
         Retrieves the name of the device
             Returns:
             string: The name of the device
-        """                
+        """
         sfputil_helper = SfpUtilHelper()
         sfputil_helper.read_porttab_mappings(
             self.__get_path_to_port_config_file())
@@ -44,14 +55,143 @@ def get_position_in_parent(self):
         """Retrieves 1-based relative physical position in parent device."""
         return self.port_index
 
+    def __validate_eeprom_sfp(self):
+        checksum_test = 0
+        eeprom_raw = self.read_eeprom(0, 96)
+        if eeprom_raw is None:
+            return None
+
+        for i in range(0, 63):
+            checksum_test = (checksum_test + eeprom_raw[i]) & 0xFF
+        else:
+            if checksum_test != eeprom_raw[63]:
+                return False
+
+        checksum_test = 0
+        for i in range(64, 95):
+            checksum_test = (checksum_test + eeprom_raw[i]) & 0xFF
+        else:
+            if checksum_test != eeprom_raw[95]:
+                return False
+
+        api = self.get_xcvr_api()
+        if api is None:
+            return False
+
+        if api.is_flat_memory():
+            return True
+
+        checksum_test = 0
+        eeprom_raw = self.read_eeprom(384, 96)
+        if eeprom_raw is None:
+            return None
+
+        for i in range(0, 95):
+            checksum_test = (checksum_test + eeprom_raw[i]) & 0xFF
+        else:
+            if checksum_test != eeprom_raw[95]:
+                return False
+
+        return True
+
+    def __validate_eeprom_qsfp(self):
+        checksum_test = 0
+        eeprom_raw = self.read_eeprom(128, 96)
+        if eeprom_raw is None:
+            return None
+
+        for i in range(0, 63):
+            checksum_test = (checksum_test + eeprom_raw[i]) & 0xFF
+        else:
+            if checksum_test != eeprom_raw[63]:
+                return False
+
+        checksum_test = 0
+        for i in range(64, 95):
+            checksum_test = (checksum_test + eeprom_raw[i]) & 0xFF
+        else:
+            if checksum_test != eeprom_raw[95]:
+                return False
+
+        api = self.get_xcvr_api()
+        if api is None:
+            return False
+
+        if api.is_flat_memory():
+            return True
+
+        return True
+
+    def validate_eeprom(self):
+        id_byte_raw = self.read_eeprom(0, 1)
+        if id_byte_raw is None:
+            return None
+
+        id = id_byte_raw[0]
+        if id in self.QSFP_TYPE_CODE_LIST:
+            return self.__validate_eeprom_qsfp()
+        elif id in self.SFP_TYPE_CODE_LIST:
+            return self.__validate_eeprom_sfp()
+        else:
+            return False
+
+    def validate_temperature(self):
+        temperature = self.get_temperature()
+        if temperature is None:
+            return None
+
+        threshold_dict = self.get_transceiver_threshold_info()
+        if threshold_dict is None:
+            return None
+
+        if isinstance(temperature, float) is not True:
+            return True
+
+        if isinstance(threshold_dict['temphighalarm'], float) is not True:
+            return True
+
+        return threshold_dict['temphighalarm'] > temperature
+
+    def __get_error_description(self):
+        if not self.get_presence():
+            return self.SFP_STATUS_UNPLUGGED
+
+        err_stat = self.SFP_STATUS_BIT_INSERTED
+
+        status = self.validate_eeprom()
+        if status is not True:
+            err_stat = (err_stat | self.SFP_ERROR_BIT_BAD_EEPROM)
+
+        status = self.validate_temperature()
+        if status is not True:
+            err_stat = (err_stat | self.SFP_ERROR_BIT_HIGH_TEMP)
+
+        if err_stat is self.SFP_STATUS_BIT_INSERTED:
+            return self.SFP_STATUS_OK
+        else:
+            err_desc = ''
+            cnt = 0
+            for key in self.SFP_ERROR_BIT_TO_DESCRIPTION_DICT:
+                if (err_stat & key) != 0:
+                    if cnt > 0:
+                        err_desc = err_desc + "|"
+                        cnt = cnt + 1
+                    err_desc = err_desc + self.SFP_ERROR_BIT_TO_DESCRIPTION_DICT[key]
+
+            return err_desc
+
     def get_error_description(self):
         """
         Retrives the error descriptions of the SFP module
-
         Returns:
             String that represents the current error descriptions of vendor specific errors
             In case there are multiple errors, they should be joined by '|',
             like: "Bad EEPROM|Unsupported cable"
         """
-        raise NotImplementedError
-
+        try:
+            ret = super().get_error_description()
+            if ret is not None:
+                return ret
+        except NotImplementedError:
+            pass
+        return self.__get_error_description()

From 62ce008a906d569ed9957b5681512464bf733b10 Mon Sep 17 00:00:00 2001
From: jostar-yang <jostar_yang@edge-core.com>
Date: Wed, 10 May 2023 17:53:07 +0800
Subject: [PATCH 1093/1115] Support show cpu all core temp

---
 .../pddf/pddf-device.json                     | 70 +++++++++++++++--
 .../as5835-54x/sonic_platform/thermal.py      | 76 +++++++++++++++++--
 2 files changed, 133 insertions(+), 13 deletions(-)

diff --git a/device/accton/x86_64-accton_as5835_54x-r0/pddf/pddf-device.json b/device/accton/x86_64-accton_as5835_54x-r0/pddf/pddf-device.json
index af20b7aeb..973ac4c11 100644
--- a/device/accton/x86_64-accton_as5835_54x-r0/pddf/pddf-device.json
+++ b/device/accton/x86_64-accton_as5835_54x-r0/pddf/pddf-device.json
@@ -5,7 +5,7 @@
         "num_fantrays":5,
         "num_fans_pertray":2,
         "num_ports":54,
-        "num_temps": 5,
+        "num_temps": 9,
         "pddf_dev_types":
         {
             "description":"AS5835-54X - Below is the list of supported PDDF device types (chip names) for various components. If any component uses some other driver, we will create the client using 'echo <dev-address> <dev-type> > <path>/new_device' method",
@@ -55,7 +55,6 @@
         [
             "pddf_custom_psu"
         ]
-    
     },
 
     "SYSTEM":
@@ -162,7 +161,7 @@
         "dev_info": { "device_type":"PSU-PMBUS", "device_name":"PSU1-PMBUS", "device_parent":"MUX2", "virt_parent":"PSU1"},
         "i2c":
         {
-            "topo_info":{ "parent_bus":"0xb", "dev_addr":"0x58", "dev_type":"psu_pmbus"}, 
+            "topo_info":{ "parent_bus":"0xb", "dev_addr":"0x58", "dev_type":"psu_pmbus"},
             "attr_list": 
             [  
                 { "attr_name":"psu_present", "attr_devaddr":"0x60", "attr_devtype":"cpld", "attr_offset":"0x2", "attr_mask":"0x1", "attr_cmpval":"0x0", "attr_len":"1"},
@@ -674,10 +673,10 @@
     "TEMP5" :
     {
         "dev_info": { "device_type":"TEMP_SENSOR", "device_name":"TEMP5"},
-        "dev_attr": { "display_name":"coretemp-isa-0000"},
+        "dev_attr": { "display_name":"CPU_Package_temp"},
         "i2c":
         {
-            "path_info": {"sysfs_base_path": "/sys/class/hwmon/hwmon0"},
+            "path_info": {"sysfs_base_path": "/sys/class/hwmon/hwmon1"},
             "attr_list":
             [
                 { "attr_name": "temp1_high_crit_threshold", "drv_attr_name":"temp1_crit"},
@@ -686,7 +685,66 @@
             ]
         }
     },
-   
+    "TEMP6" :
+    {
+        "dev_info": { "device_type":"TEMP_SENSOR", "device_name":"TEMP6"},
+        "dev_attr": { "display_name":"CPU_Core_0_temp"},
+        "i2c":
+        {
+            "path_info": {"sysfs_base_path": "/sys/class/hwmon/hwmon1"},
+            "attr_list":
+            [
+                { "attr_name": "temp1_high_crit_threshold", "drv_attr_name":"temp4_crit"},
+                { "attr_name": "temp1_high_threshold", "drv_attr_name":"temp4_max"},
+                { "attr_name": "temp1_input", "drv_attr_name":"temp4_input"}
+            ]
+        }
+    },
+    "TEMP7" :
+    {
+        "dev_info": { "device_type":"TEMP_SENSOR", "device_name":"TEMP7"},
+        "dev_attr": { "display_name":"CPU_Core_1_temp"},
+        "i2c":
+        {
+            "path_info": {"sysfs_base_path": "/sys/class/hwmon/hwmon1"},
+            "attr_list":
+            [
+                { "attr_name": "temp1_high_crit_threshold", "drv_attr_name":"temp8_crit"},
+                { "attr_name": "temp1_high_threshold", "drv_attr_name":"temp8_max"},
+                { "attr_name": "temp1_input", "drv_attr_name":"temp8_input"}
+            ]
+        }
+    },
+    "TEMP8" :
+    {
+        "dev_info": { "device_type":"TEMP_SENSOR", "device_name":"TEMP8"},
+        "dev_attr": { "display_name":"CPU_Core_2_temp"},
+        "i2c":
+        {
+            "path_info": {"sysfs_base_path": "/sys/class/hwmon/hwmon1"},
+            "attr_list":
+            [
+                { "attr_name": "temp1_high_crit_threshold", "drv_attr_name":"temp10_crit"},
+                { "attr_name": "temp1_high_threshold", "drv_attr_name":"temp10_max"},
+                { "attr_name": "temp1_input", "drv_attr_name":"temp10_input"}
+            ]
+        }
+    },
+    "TEMP9" :
+    {
+        "dev_info": { "device_type":"TEMP_SENSOR", "device_name":"TEMP9"},
+        "dev_attr": { "display_name":"CPU_Core_3_temp"},
+        "i2c":
+        {
+            "path_info": {"sysfs_base_path": "/sys/class/hwmon/hwmon1"},
+            "attr_list":
+            [
+                { "attr_name": "temp1_high_crit_threshold", "drv_attr_name":"temp14_crit"},
+                { "attr_name": "temp1_high_threshold", "drv_attr_name":"temp14_max"},
+                { "attr_name": "temp1_input", "drv_attr_name":"temp14_input"}
+            ]
+        }
+    },
     "SYSSTATUS":
     {
         "dev_info":{ "device_type":"SYSSTAT", "device_name":"SYSSTATUS"},
diff --git a/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/thermal.py b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/thermal.py
index 3240b3933..cdd6c0993 100644
--- a/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/thermal.py
+++ b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/thermal.py
@@ -37,8 +37,32 @@
         LOW_THRESHOLD : NOT_AVAILABLE,
         HIGH_CRIT_THRESHOLD : NOT_AVAILABLE,
         LOW_CRIT_THRESHOLD : NOT_AVAILABLE
-    },    
-    'coretemp-isa-0000' : {
+    },
+    'CPU_Package_temp' : {
+        HIGH_THRESHOLD : '82.0',
+        LOW_THRESHOLD : NOT_AVAILABLE,
+        HIGH_CRIT_THRESHOLD : '104.0',
+        LOW_CRIT_THRESHOLD : NOT_AVAILABLE
+    },
+    'CPU_Core_0_temp' : {
+        HIGH_THRESHOLD : '82.0',
+        LOW_THRESHOLD : NOT_AVAILABLE,
+        HIGH_CRIT_THRESHOLD : '104.0',
+        LOW_CRIT_THRESHOLD : NOT_AVAILABLE
+    },
+    'CPU_Core_1_temp' : {
+        HIGH_THRESHOLD : '82.0',
+        LOW_THRESHOLD : NOT_AVAILABLE,
+        HIGH_CRIT_THRESHOLD : '104.0',
+        LOW_CRIT_THRESHOLD : NOT_AVAILABLE
+    },
+    'CPU_Core_2_temp' : {
+        HIGH_THRESHOLD : '82.0',
+        LOW_THRESHOLD : NOT_AVAILABLE,
+        HIGH_CRIT_THRESHOLD : '104.0',
+        LOW_CRIT_THRESHOLD : NOT_AVAILABLE
+    },
+    'CPU_Core_3_temp' : {
         HIGH_THRESHOLD : '82.0',
         LOW_THRESHOLD : NOT_AVAILABLE,
         HIGH_CRIT_THRESHOLD : '104.0',
@@ -72,6 +96,8 @@ def __init__(self, index, pddf_data=None, pddf_plugin_data=None, is_psu_thermal=
         self.__conf = DeviceThreshold(self.get_name())
         # Default threshold.
         self.__default_threshold = DEFAULT_THRESHOLD[self.get_name()]
+        self.min_temperature = None
+        self.max_temperature = None
 
     # Provide the functions/variables below for which implementation is to be overwritten
     def get_name(self):
@@ -91,6 +117,19 @@ def get_status(self):
         if get_temp is not None:
             return True if get_temp else False
 
+    def get_temperature(self):
+        current = super().get_temperature()
+
+        if self.min_temperature is None or \
+            current < self.min_temperature:
+            self.min_temperature = current
+
+        if self.max_temperature is None or \
+           current > self.max_temperature:
+            self.max_temperature = current
+
+        return current
+
     def set_high_threshold(self, temperature):
         try:
             value = float(temperature)
@@ -118,8 +157,8 @@ def get_high_threshold(self):
         default_value = self.__default_threshold[HIGH_THRESHOLD]
         if default_value != NOT_AVAILABLE:
             return float(default_value)
-
-        raise NotImplementedError
+        
+        return super().get_high_threshold()
 
     def set_low_threshold(self, temperature):
         try:
@@ -178,8 +217,7 @@ def get_high_critical_threshold(self):
         default_value = self.__default_threshold[HIGH_CRIT_THRESHOLD]
         if default_value != NOT_AVAILABLE:
             return float(default_value)
-
-        raise NotImplementedError
+        return super().get_high_critical_threshold()
 
     def set_low_critical_threshold(self, temperature):
         try:
@@ -225,4 +263,28 @@ def get_serial(self):
         Returns:
             string: Serial number of device
         """
-        return 'N/A'
\ No newline at end of file
+        return 'N/A'
+
+    def get_minimum_recorded(self):
+        """
+        Retrieves the minimum recorded temperature of thermal
+        Returns:
+            A float number, the minimum recorded temperature of thermal in Celsius
+            up to nearest thousandth of one degree Celsius, e.g. 30.125
+        """
+        if self.min_temperature is None:
+            self.get_temperature()
+
+        return self.min_temperature
+
+    def get_maximum_recorded(self):
+        """
+        Retrieves the maximum recorded temperature of thermal
+        Returns:
+            A float number, the maximum recorded temperature of thermal in Celsius
+            up to nearest thousandth of one degree Celsius, e.g. 30.125
+        """
+        if self.max_temperature is None:
+            self.get_temperature()
+
+        return self.max_temperature

From 9428d5b56c846ac78ea429980f7f5763193b8e0d Mon Sep 17 00:00:00 2001
From: roger530-ho <roger530_ho@edge-core.com>
Date: Wed, 19 Jul 2023 07:56:57 +0000
Subject: [PATCH 1094/1115] [Edgecore][device][platform] Fix pytest issue

---
 .../x86_64-accton_as5835_54x-r0/platform.json | 42 ++++++++++++++++---
 1 file changed, 37 insertions(+), 5 deletions(-)

diff --git a/device/accton/x86_64-accton_as5835_54x-r0/platform.json b/device/accton/x86_64-accton_as5835_54x-r0/platform.json
index 4bcf15cee..c69ab5538 100644
--- a/device/accton/x86_64-accton_as5835_54x-r0/platform.json
+++ b/device/accton/x86_64-accton_as5835_54x-r0/platform.json
@@ -4,7 +4,7 @@
         "thermal_manager":false,
         "status_led": {
             "controllable": true,
-            "colors": ["green", "red", "off"]
+            "colors": ["green", "amber", "off"]
         },
         "components": [
             {
@@ -169,7 +169,7 @@
                 "low-threshold": false,
                 "high-threshold": true,
                 "low-crit-threshold": false,
-                "high-crit-threshold": true
+                "high-crit-threshold": false
             },
             {
                 "name": "MB_FrontMiddle_temp(0x4C)",
@@ -177,7 +177,7 @@
                 "low-threshold": false,
                 "high-threshold": true,
                 "low-crit-threshold": false,
-                "high-crit-threshold": true
+                "high-crit-threshold": false
             },
             {
                 "name": "MB_RearLeft_temp(0x4A)",
@@ -185,7 +185,7 @@
                 "low-threshold": false,
                 "high-threshold": true,
                 "low-crit-threshold": false,
-                "high-crit-threshold": true
+                "high-crit-threshold": false
             },
             {
                 "name": "MB_RearLeft_temp(0x49)",
@@ -193,10 +193,42 @@
                 "low-threshold": false,
                 "high-threshold": true,
                 "low-crit-threshold": false,
+                "high-crit-threshold": false
+            },
+            {
+                "name": "CPU_Package_temp",
+                "controllable": true,
+                "low-threshold": false,
+                "high-threshold": true,
+                "low-crit-threshold": false,
+                "high-crit-threshold": true
+            },
+            {
+                "name": "CPU_Core_0_temp",
+                "controllable": true,
+                "low-threshold": false,
+                "high-threshold": true,
+                "low-crit-threshold": false,
+                "high-crit-threshold": true
+            },
+            {
+                "name": "CPU_Core_1_temp",
+                "controllable": true,
+                "low-threshold": false,
+                "high-threshold": true,
+                "low-crit-threshold": false,
+                "high-crit-threshold": true
+            },
+            {
+                "name": "CPU_Core_2_temp",
+                "controllable": true,
+                "low-threshold": false,
+                "high-threshold": true,
+                "low-crit-threshold": false,
                 "high-crit-threshold": true
             },
             {
-                "name": "coretemp-isa-0000",
+                "name": "CPU_Core_3_temp",
                 "controllable": true,
                 "low-threshold": false,
                 "high-threshold": true,

From 4afd78e071849946fd88fc4be6fd0ee7ccafe9dc Mon Sep 17 00:00:00 2001
From: roger530-ho <roger530_ho@edge-core.com>
Date: Mon, 14 Aug 2023 08:47:10 +0000
Subject: [PATCH 1095/1115] [Edgecore][AS5835-54X] Read the data when the PSU
 is in the power-good state.

---
 .../as5835-54x/sonic_platform/psu.py          | 65 +++++++++++++++++++
 1 file changed, 65 insertions(+)

diff --git a/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/psu.py b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/psu.py
index 48cdbab12..a05923cc8 100644
--- a/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/psu.py
+++ b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/psu.py
@@ -63,3 +63,68 @@ def get_type(self):
         A string, the type of PSU (AC/DC)
         """
         return "AC"
+
+    def get_model(self):
+        """
+        Retrieves the model number (or part number) of the device
+
+        Returns:
+            string: Model/part number of device
+        """
+        model = super().get_model()
+        if model and model.strip() == "":
+            return None
+
+        return model
+
+    def get_serial(self):
+        """
+        Retrieves the serial number of the device
+
+        Returns:
+            string: Serial number of device
+        """
+        serial = super().get_serial()
+        if serial and serial.strip() == "":
+            return None
+
+        return serial
+
+    def get_voltage(self):
+        """
+        Retrieves current PSU voltage output
+
+        Returns:
+            A float number, the output voltage in volts,
+            e.g. 12.1
+        """
+        if self.get_status() is not True:
+            return 0.0
+
+        return super().get_voltage()
+
+    def get_current(self):
+        """
+        Retrieves present electric current supplied by PSU
+
+        Returns:
+            A float number, electric current in amperes,
+            e.g. 15.4
+        """
+        if self.get_status() is not True:
+            return 0.0
+
+        return super().get_current()
+
+    def get_power(self):
+        """
+        Retrieves current energy supplied by PSU
+
+        Returns:
+            A float number, the power in watts,
+            e.g. 302.6
+        """
+        if self.get_status() is not True:
+            return 0.0
+
+        return super().get_power()

From 84efba48e2a9733df04cf4605ca428072feea667 Mon Sep 17 00:00:00 2001
From: roger530_ho <roger530_ho@accton.com>
Date: Tue, 16 Jul 2024 15:20:21 +0800
Subject: [PATCH 1096/1115] Support fan direction of DC PSU

---
 .../pddf/pddf-device.json                     |   8 +-
 .../as5835-54x/modules/pddf_custom_psu.c      | 157 ++++++++++++++++++
 2 files changed, 161 insertions(+), 4 deletions(-)

diff --git a/device/accton/x86_64-accton_as5835_54x-r0/pddf/pddf-device.json b/device/accton/x86_64-accton_as5835_54x-r0/pddf/pddf-device.json
index 973ac4c11..c1a60aca4 100644
--- a/device/accton/x86_64-accton_as5835_54x-r0/pddf/pddf-device.json
+++ b/device/accton/x86_64-accton_as5835_54x-r0/pddf/pddf-device.json
@@ -165,7 +165,6 @@
             "attr_list": 
             [  
                 { "attr_name":"psu_present", "attr_devaddr":"0x60", "attr_devtype":"cpld", "attr_offset":"0x2", "attr_mask":"0x1", "attr_cmpval":"0x0", "attr_len":"1"},
-                { "attr_name":"psu_model_name", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x9a", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"10" },
                 { "attr_name":"psu_power_good", "attr_devaddr":"0x60", "attr_devtype":"cpld", "attr_offset":"0x2", "attr_mask":"0x2", "attr_cmpval":"0x2", "attr_len":"1"},
                 { "attr_name":"psu_mfr_id", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0X99", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"10" },
                 { "attr_name":"psu_fan_dir", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0xc3", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"5"},
@@ -189,7 +188,8 @@
             "topo_info":{ "parent_bus":"0xb", "dev_addr":"0x50", "dev_type":"psu_eeprom"},
             "attr_list": 
             [  
-                { "attr_name":"psu_serial_num", "attr_devaddr":"0x50", "attr_devtype":"eeprom", "attr_offset":"0x35", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"19" }
+                { "attr_name":"psu_serial_num", "attr_devaddr":"0x50", "attr_devtype":"eeprom", "attr_offset":"0x35", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"19" },
+                { "attr_name":"psu_model_name", "attr_devaddr":"0x50", "attr_devtype":"eeprom", "attr_offset":"0x20", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"12" }
             ]
         }
     },
@@ -217,7 +217,6 @@
             "attr_list": 
             [  
                 { "attr_name":"psu_present", "attr_devaddr":"0x60", "attr_devtype":"cpld", "attr_offset":"0x2", "attr_mask":"0x10", "attr_cmpval":"0x0", "attr_len":"1"},
-                { "attr_name":"psu_model_name", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x9a", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"10" },
                 { "attr_name":"psu_power_good", "attr_devaddr":"0x60", "attr_devtype":"cpld", "attr_offset":"0x2", "attr_mask":"0x20", "attr_cmpval":"0x20", "attr_len":"1"},
                 { "attr_name":"psu_mfr_id", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0X99", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"10" },
                 { "attr_name":"psu_fan_dir", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0xc3", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"5"},
@@ -241,7 +240,8 @@
             "topo_info":{ "parent_bus":"0xc", "dev_addr":"0x53", "dev_type":"psu_eeprom"},
             "attr_list": 
             [  
-                { "attr_name":"psu_serial_num", "attr_devaddr":"0x53", "attr_devtype":"eeprom", "attr_offset":"0x35", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"19" }
+                { "attr_name":"psu_serial_num", "attr_devaddr":"0x53", "attr_devtype":"eeprom", "attr_offset":"0x35", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"19" },
+                { "attr_name":"psu_model_name", "attr_devaddr":"0x53", "attr_devtype":"eeprom", "attr_offset":"0x20", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"12" }
             ]
         }
     },
diff --git a/platform/broadcom/sonic-platform-modules-accton/as5835-54x/modules/pddf_custom_psu.c b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/modules/pddf_custom_psu.c
index 1591267b0..9cc71e59f 100644
--- a/platform/broadcom/sonic-platform-modules-accton/as5835-54x/modules/pddf_custom_psu.c
+++ b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/modules/pddf_custom_psu.c
@@ -9,10 +9,31 @@
 #include <linux/sysfs.h>
 #include <linux/slab.h>
 #include <linux/dmi.h>
+#include "pddf_client_defs.h"
 #include "pddf_psu_defs.h"
+#include "pddf_psu_driver.h"
+#include "pddf_psu_api.h"
 
 ssize_t pddf_show_custom_psu_v_out(struct device *dev, struct device_attribute *da, char *buf);
 extern PSU_SYSFS_ATTR_DATA access_psu_v_out;
+int pddf_post_get_custom_psu_model_name(void *i2c_client, PSU_DATA_ATTR *adata, void *data);
+extern PSU_SYSFS_ATTR_DATA access_psu_model_name;
+int pddf_post_get_custom_psu_fan_dir(void *i2c_client, PSU_DATA_ATTR *adata, void *data);
+extern PSU_SYSFS_ATTR_DATA access_psu_fan_dir;
+int pddf_custom_psu_post_probe(struct i2c_client *client, const struct i2c_device_id *dev_id);
+int pddf_custom_psu_post_remove(struct i2c_client *client);
+extern struct pddf_ops_t pddf_psu_ops;
+
+const char FAN_DIR_F2B[] = "F2B\0";
+const char FAN_DIR_B2F[] = "B2F\0";
+
+static LIST_HEAD(psu_eeprom_client_list);
+static struct mutex     list_lock;
+
+struct psu_eeprom_client_node {
+	struct i2c_client *client;
+	struct list_head   list;
+};
 
 static int two_complement_to_int(u16 data, u8 valid_bit, int mask)
 {
@@ -95,11 +116,147 @@ ssize_t pddf_show_custom_psu_v_out(struct device *dev, struct device_attribute *
 }
 
 
+int pddf_post_get_custom_psu_model_name(void *i2c_client, PSU_DATA_ATTR *adata, void *data)
+{
+    struct psu_attr_info *sysfs_attr_info = (struct psu_attr_info *)data;
+
+    if (strlen(sysfs_attr_info->val.strval) > 8) {
+        sysfs_attr_info->val.strval[8] = '-';
+    }
+
+    return 0;
+}
+
+/*
+ * Get the PSU EEPROM I2C client with the same bus number.
+ */
+static struct i2c_client *find_psu_eeprom_client(struct i2c_client *pmbus_client)
+{
+    struct list_head *list_node = NULL;
+    struct psu_eeprom_client_node *psu_eeprom_node = NULL;
+    struct i2c_client *eeprom_client = NULL;
+
+    mutex_lock(&list_lock);
+    list_for_each(list_node, &psu_eeprom_client_list) {
+        psu_eeprom_node = list_entry(list_node, struct psu_eeprom_client_node, list);
+        /* Check if the bus adapter is the same or not. */
+        if (psu_eeprom_node->client->adapter == pmbus_client->adapter) {
+            eeprom_client = psu_eeprom_node->client;
+            break;
+        }
+    }
+    mutex_unlock(&list_lock);
+
+    return eeprom_client;
+}
+
+int pddf_post_get_custom_psu_fan_dir(void *i2c_client, PSU_DATA_ATTR *adata, void *data)
+{
+    int i;
+    struct i2c_client *client = (struct i2c_client *)i2c_client;
+    struct psu_attr_info *psu_fan_dir_attr_info = (struct psu_attr_info *)data;
+    struct psu_data *psu_eeprom_client_data = NULL;
+    struct psu_attr_info *psu_eeprom_model_name = NULL;
+    struct i2c_client *psu_eeprom_client = NULL;
+
+    psu_eeprom_client = find_psu_eeprom_client(client);
+    if (!psu_eeprom_client) {
+        return 0;
+    }
+
+    /*
+     * Get the model name from the PSU EEPROM I2C client.
+     */
+    psu_eeprom_client_data = i2c_get_clientdata(psu_eeprom_client);
+    if (!psu_eeprom_client_data) {
+        return 0;
+    }
+    for (i = 0; i < psu_eeprom_client_data->num_attr; i++) {
+        if (strcmp(psu_eeprom_client_data->attr_info[i].name, "psu_model_name") == 0) {
+            psu_eeprom_model_name = &psu_eeprom_client_data->attr_info[i];
+            break;
+        }
+    }
+    if (!psu_eeprom_model_name) {
+        return 0;
+    }
+
+    /*
+     * Compare the model name, then replace the content of psu_fan_dir.
+     */
+    if (strcmp(psu_eeprom_model_name->val.strval, "YM-2401H-CR") == 0) {
+        strscpy(psu_fan_dir_attr_info->val.strval, 
+                FAN_DIR_F2B, 
+                sizeof(psu_fan_dir_attr_info->val.strval));
+    } else if (strcmp(psu_eeprom_model_name->val.strval, "YM-2401H-DR") == 0) {
+        strscpy(psu_fan_dir_attr_info->val.strval, 
+                FAN_DIR_B2F, 
+                sizeof(psu_fan_dir_attr_info->val.strval));
+    }
+
+    return 0;
+}
+
+int pddf_custom_psu_post_probe(struct i2c_client *client, const struct i2c_device_id *dev_id)
+{
+    struct psu_eeprom_client_node *psu_eeprom_node;
+
+    if (strcmp(dev_id->name, "psu_eeprom") != 0) {
+        return 0;
+    }
+
+    psu_eeprom_node = kzalloc(sizeof(struct psu_eeprom_client_node), GFP_KERNEL);
+    if (!psu_eeprom_node) {
+        dev_dbg(&client->dev, "Can't allocate psu_eeprom_client_node (0x%x)\n", client->addr);
+        return -ENOMEM;
+    }
+
+    psu_eeprom_node->client = client;
+
+    mutex_lock(&list_lock);
+    list_add(&psu_eeprom_node->list, &psu_eeprom_client_list);
+    mutex_unlock(&list_lock);
+
+    return 0;
+}
+
+int pddf_custom_psu_post_remove(struct i2c_client *client)
+{
+    struct list_head    *list_node = NULL;
+    struct psu_eeprom_client_node *psu_eeprom_node = NULL;
+    int found = 0;
+
+    mutex_lock(&list_lock);
+
+    list_for_each(list_node, &psu_eeprom_client_list) {
+        psu_eeprom_node = list_entry(list_node, struct psu_eeprom_client_node, list);
+
+        if (psu_eeprom_node->client == client) {
+            list_del_init(&psu_eeprom_node->list);
+            found = 1;
+            break;
+        }
+    }
+
+    if (found) {
+        kfree(psu_eeprom_node);
+    }
+
+    mutex_unlock(&list_lock);
+
+    return 0;
+}
+
 
 static int __init pddf_custom_psu_init(void)
 {
+    mutex_init(&list_lock);
     access_psu_v_out.show = pddf_show_custom_psu_v_out;
     access_psu_v_out.do_get = NULL;
+    access_psu_model_name.post_get = pddf_post_get_custom_psu_model_name;
+    access_psu_fan_dir.post_get = pddf_post_get_custom_psu_fan_dir;
+    pddf_psu_ops.post_probe = pddf_custom_psu_post_probe;
+    pddf_psu_ops.post_remove = pddf_custom_psu_post_remove;
     return 0;
 }
 

From b53017bd62d452597a3379a8e2180c358af6d644 Mon Sep 17 00:00:00 2001
From: jostar-yang <jostar_yang@accton.com>
Date: Wed, 17 Jul 2024 17:37:02 +0800
Subject: [PATCH 1097/1115] Addpsu_temp1_threshold and support ddr temp to
 sensors

---
 .../x86_64-accton_as5835_54x-r0/pddf/pddf-device.json       | 6 ++++--
 .../as5835-54x/utils/pddf_post_device_create.sh             | 5 +++++
 2 files changed, 9 insertions(+), 2 deletions(-)

diff --git a/device/accton/x86_64-accton_as5835_54x-r0/pddf/pddf-device.json b/device/accton/x86_64-accton_as5835_54x-r0/pddf/pddf-device.json
index c1a60aca4..a7ab60bca 100644
--- a/device/accton/x86_64-accton_as5835_54x-r0/pddf/pddf-device.json
+++ b/device/accton/x86_64-accton_as5835_54x-r0/pddf/pddf-device.json
@@ -175,7 +175,8 @@
                 { "attr_name":"psu_p_out", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x96", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
                 { "attr_name":"psu_p_out_max", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0xa7", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
                 { "attr_name":"psu_fan1_speed_rpm", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x90", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
-                { "attr_name":"psu_temp1_input", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x8d", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}
+                { "attr_name":"psu_temp1_input", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0x8d", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+                { "attr_name":"psu_temp1_high_threshold", "attr_devaddr":"0x58", "attr_devtype":"pmbus", "attr_offset":"0xa8", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}
             ]
         }
     },
@@ -227,7 +228,8 @@
                 { "attr_name":"psu_p_out", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x96", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
                 { "attr_name":"psu_p_out_max", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0xa7", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
                 { "attr_name":"psu_fan1_speed_rpm", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x90", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
-                { "attr_name":"psu_temp1_input", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x8d", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}
+                { "attr_name":"psu_temp1_input", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x8d", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+                { "attr_name":"psu_temp1_high_threshold", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0xa8", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}
             ]
         }
     },
diff --git a/platform/broadcom/sonic-platform-modules-accton/as5835-54x/utils/pddf_post_device_create.sh b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/utils/pddf_post_device_create.sh
index c1a6660f9..f362c67c4 100755
--- a/platform/broadcom/sonic-platform-modules-accton/as5835-54x/utils/pddf_post_device_create.sh
+++ b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/utils/pddf_post_device_create.sh
@@ -22,6 +22,11 @@ set_system_led_diag_loc_to_off()
     i2cset -y -f 3 0x60 0xa 0x1c &>/dev/null
 }
 
+insmod_jc42_drv()
+{
+    modprobe jc42 &>/dev/null
+}
 set_qsfp_reset_to_normal_state
 set_sfp_tx_disable_to_disable
 set_system_led_diag_loc_to_off
+insmod_jc42_drv

From 7f271d142d9b34570985e479686d7a88ed16b10c Mon Sep 17 00:00:00 2001
From: jostar-yang <jostar_yang@accton.com>
Date: Thu, 29 Aug 2024 17:02:45 +0800
Subject: [PATCH 1098/1115] Add reset() in sfp.py for check sfp_port to avoid
 fail

---
 .../as5835-54x/sonic_platform/sfp.py                        | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/sfp.py b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/sfp.py
index b94e5d257..c53717d77 100644
--- a/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/sfp.py
+++ b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/sfp.py
@@ -51,6 +51,12 @@ def get_name(self):
 
         return name
 
+    def reset(self):
+        if self.sfp_type == 'SFP28':
+            return False
+        else:
+            return super().reset()
+
     def get_position_in_parent(self):
         """Retrieves 1-based relative physical position in parent device."""
         return self.port_index

From a961f97ff165340824acf45078fddb86cdbaee8f Mon Sep 17 00:00:00 2001
From: jostar-yang <jostar_yang@accton.com>
Date: Thu, 5 Sep 2024 16:25:16 +0800
Subject: [PATCH 1099/1115] Add get_reset_status() to avoid get fail in
 sfp_port

---
 .../as5835-54x/sonic_platform/sfp.py                 | 12 +++++++++---
 1 file changed, 9 insertions(+), 3 deletions(-)

diff --git a/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/sfp.py b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/sfp.py
index c53717d77..33908b04a 100644
--- a/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/sfp.py
+++ b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/sfp.py
@@ -51,11 +51,17 @@ def get_name(self):
 
         return name
 
+    def get_reset_status(self):
+        if self.sfp_type == "QSFP28":
+            return super().get_reset_status()
+        return False
+
+
     def reset(self):
-        if self.sfp_type == 'SFP28':
-            return False
-        else:
+        if self.sfp_type == "QSFP28":
             return super().reset()
+        else:
+            return False
 
     def get_position_in_parent(self):
         """Retrieves 1-based relative physical position in parent device."""

From cdd40566eceb606947999142ada36cf10b0a60ba Mon Sep 17 00:00:00 2001
From: jostar-yang <jostar_yang@accton.com>
Date: Fri, 6 Sep 2024 18:15:33 +0800
Subject: [PATCH 1100/1115] Modify reset() to return unsupport sfp_type

---
 .../as5835-54x/sonic_platform/sfp.py          | 30 ++++++++++++++-----
 1 file changed, 22 insertions(+), 8 deletions(-)

diff --git a/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/sfp.py b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/sfp.py
index 33908b04a..b5b927680 100644
--- a/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/sfp.py
+++ b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/sonic_platform/sfp.py
@@ -24,7 +24,13 @@ class Sfp(PddfSfp):
         0x11, # QSFP28 or later
         0xe1  # QSFP28 EDFA
     ]
-
+    
+    UNRESETTABLE_TYPE_LIST = [
+        'SFP',
+        'SFP+',
+        'SFP28'
+    ]
+    
     def __init__(self, index, pddf_data=None, pddf_plugin_data=None):
         PddfSfp.__init__(self, index, pddf_data, pddf_plugin_data)
         self.index = index + 1
@@ -52,16 +58,24 @@ def get_name(self):
         return name
 
     def get_reset_status(self):
-        if self.sfp_type == "QSFP28":
-            return super().get_reset_status()
-        return False
-
+        """
+        Retrieves the reset status of SFP
+        Returns:
+            A Boolean, True if reset enabled, False if disabled
+        """
+        if self.sfp_type in self.UNRESETTABLE_TYPE_LIST:
+            return False
+        return super().get_reset_status()
 
     def reset(self):
-        if self.sfp_type == "QSFP28":
-            return super().reset()
-        else:
+        """
+        Reset SFP and return all user module settings to their default srate.
+        Returns:
+            A boolean, True if successful, False if not
+        """
+        if self.sfp_type in self.UNRESETTABLE_TYPE_LIST:
             return False
+        return super().reset()
 
     def get_position_in_parent(self):
         """Retrieves 1-based relative physical position in parent device."""

From 212e3c1c10adfe491ce0891b67d5406484cf8989 Mon Sep 17 00:00:00 2001
From: jostar-yang <jostar_yang@edge-core.com>
Date: Wed, 15 Feb 2023 11:43:33 +0800
Subject: [PATCH 1101/1115] [Edgecore][AS7326/PDDF] Enhance pddf feature

Signed-off-by: jostar-yang <jostar_yang@edge-core.com>
---
 .../x86_64-accton_as7326_56x-r0/pcie.yaml     | 459 +++++++++++++
 .../pddf/pd-plugin.json                       |   6 +-
 .../pddf/pddf-device.json                     |  42 +-
 .../x86_64-accton_as7326_56x-r0/platform.json | 600 +++++++++++++++++
 .../pmon_daemon_control.json                  |   3 +-
 .../sonic_platform/__init__.py                |   2 -
 .../sonic_platform/chassis.py                 | 264 --------
 .../sonic_platform/eeprom.py                  | 139 ----
 .../sonic_platform/fan.py                     | 270 --------
 .../sonic_platform/fan_drawer.py              |  90 ---
 .../sonic_platform/psu.py                     | 264 --------
 .../sonic_platform/sfp.py                     | 625 ------------------
 .../sonic_platform/thermal.py                 | 232 -------
 .../as7326-56x/sonic_platform/chassis.py      |  94 +--
 .../as7326-56x}/sonic_platform/component.py   |  51 +-
 .../as7326-56x/sonic_platform/eeprom.py       |  76 ++-
 .../as7326-56x}/sonic_platform/event.py       |   4 +-
 .../as7326-56x/sonic_platform/fan.py          |  35 +-
 .../as7326-56x/sonic_platform/fan_drawer.py   |  25 +
 .../as7326-56x/sonic_platform/helper.py       |  53 ++
 .../as7326-56x/sonic_platform/pcie.py         |  16 +-
 .../as7326-56x/sonic_platform/psu.py          |  12 +
 .../as7326-56x/sonic_platform/sfp.py          |  38 ++
 .../as7326-56x/sonic_platform/thermal.py      |  20 +
 .../utils/accton_as7326_pddf_monitor.py       |  32 +
 .../utils/pddf_post_device_create.sh          |  12 -
 26 files changed, 1464 insertions(+), 2000 deletions(-)
 create mode 100644 device/accton/x86_64-accton_as7326_56x-r0/pcie.yaml
 create mode 100644 device/accton/x86_64-accton_as7326_56x-r0/platform.json
 delete mode 100644 device/accton/x86_64-accton_as7326_56x-r0/sonic_platform/__init__.py
 delete mode 100644 device/accton/x86_64-accton_as7326_56x-r0/sonic_platform/chassis.py
 delete mode 100644 device/accton/x86_64-accton_as7326_56x-r0/sonic_platform/eeprom.py
 delete mode 100644 device/accton/x86_64-accton_as7326_56x-r0/sonic_platform/fan.py
 delete mode 100644 device/accton/x86_64-accton_as7326_56x-r0/sonic_platform/fan_drawer.py
 delete mode 100644 device/accton/x86_64-accton_as7326_56x-r0/sonic_platform/psu.py
 delete mode 100644 device/accton/x86_64-accton_as7326_56x-r0/sonic_platform/sfp.py
 delete mode 100644 device/accton/x86_64-accton_as7326_56x-r0/sonic_platform/thermal.py
 rename {device/accton/x86_64-accton_as7326_56x-r0 => platform/broadcom/sonic-platform-modules-accton/as7326-56x}/sonic_platform/component.py (79%)
 rename {device/accton/x86_64-accton_as7326_56x-r0 => platform/broadcom/sonic-platform-modules-accton/as7326-56x}/sonic_platform/event.py (94%)
 create mode 100644 platform/broadcom/sonic-platform-modules-accton/as7326-56x/sonic_platform/helper.py
 rename device/accton/x86_64-accton_as7326_56x-r0/sonic_platform/platform.py => platform/broadcom/sonic-platform-modules-accton/as7326-56x/sonic_platform/pcie.py (51%)
 delete mode 100755 platform/broadcom/sonic-platform-modules-accton/as7326-56x/utils/pddf_post_device_create.sh

diff --git a/device/accton/x86_64-accton_as7326_56x-r0/pcie.yaml b/device/accton/x86_64-accton_as7326_56x-r0/pcie.yaml
new file mode 100644
index 000000000..af10930e3
--- /dev/null
+++ b/device/accton/x86_64-accton_as7326_56x-r0/pcie.yaml
@@ -0,0 +1,459 @@
+- bus: '00'
+  dev: '00'
+  fn: '0'
+  id: 6f00
+  name: 'Host bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D DMI2
+    (rev 03)'
+- bus: '00'
+  dev: '01'
+  fn: '0'
+  id: 6f02
+  name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI
+    Express Root Port 1 (rev 03)'
+- bus: '00'
+  dev: '01'
+  fn: '1'
+  id: 6f03
+  name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI
+    Express Root Port 1 (rev 03)'
+- bus: '00'
+  dev: '02'
+  fn: '0'
+  id: 6f04
+  name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI
+    Express Root Port 2 (rev 03)'
+- bus: '00'
+  dev: '02'
+  fn: '1'
+  id: 6f05
+  name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI
+    Express Root Port 2 (rev 03)'
+- bus: '00'
+  dev: '02'
+  fn: '2'
+  id: 6f06
+  name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI
+    Express Root Port 2 (rev 03)'
+- bus: '00'
+  dev: '02'
+  fn: '3'
+  id: 6f07
+  name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI
+    Express Root Port 2 (rev 03)'
+- bus: '00'
+  dev: '03'
+  fn: '0'
+  id: 6f08
+  name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI
+    Express Root Port 3 (rev 03)'
+- bus: '00'
+  dev: '03'
+  fn: '1'
+  id: 6f09
+  name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI
+    Express Root Port 3 (rev 03)'
+- bus: '00'
+  dev: '03'
+  fn: '2'
+  id: 6f0a
+  name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI
+    Express Root Port 3 (rev 03)'
+- bus: '00'
+  dev: '03'
+  fn: '3'
+  id: 6f0b
+  name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI
+    Express Root Port 3 (rev 03)'
+- bus: '00'
+  dev: '05'
+  fn: '0'
+  id: 6f28
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Map/VTd_Misc/System Management (rev 03)'
+- bus: '00'
+  dev: '05'
+  fn: '1'
+  id: 6f29
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D IIO Hot Plug (rev 03)'
+- bus: '00'
+  dev: '05'
+  fn: '2'
+  id: 6f2a
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D IIO RAS/Control Status/Global Errors (rev 03)'
+- bus: '00'
+  dev: '05'
+  fn: '4'
+  id: 6f2c
+  name: 'PIC: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D I/O APIC (rev
+    03)'
+- bus: '00'
+  dev: '14'
+  fn: '0'
+  id: 8c31
+  name: 'USB controller: Intel Corporation 8 Series/C220 Series Chipset Family USB
+    xHCI (rev 05)'
+- bus: '00'
+  dev: 1c
+  fn: '0'
+  id: 8c10
+  name: 'PCI bridge: Intel Corporation 8 Series/C220 Series Chipset Family PCI Express
+    Root Port #1 (rev d5)'
+- bus: '00'
+  dev: 1c
+  fn: '1'
+  id: 8c12
+  name: 'PCI bridge: Intel Corporation 8 Series/C220 Series Chipset Family PCI Express
+    Root Port #2 (rev d5)'
+- bus: '00'
+  dev: 1d
+  fn: '0'
+  id: 8c26
+  name: 'USB controller: Intel Corporation 8 Series/C220 Series Chipset Family USB
+    EHCI #1 (rev 05)'
+- bus: '00'
+  dev: 1f
+  fn: '0'
+  id: 8c54
+  name: 'ISA bridge: Intel Corporation C224 Series Chipset Family Server Standard
+    SKU LPC Controller (rev 05)'
+- bus: '00'
+  dev: 1f
+  fn: '2'
+  id: 8c02
+  name: 'SATA controller: Intel Corporation 8 Series/C220 Series Chipset Family 6-port
+    SATA Controller 1 [AHCI mode] (rev 05)'
+- bus: '00'
+  dev: 1f
+  fn: '3'
+  id: 8c22
+  name: 'SMBus: Intel Corporation 8 Series/C220 Series Chipset Family SMBus Controller
+    (rev 05)'
+- bus: '00'
+  dev: 1f
+  fn: '6'
+  id: 8c24
+  name: 'Signal processing controller: Intel Corporation 8 Series Chipset Family Thermal
+    Management Controller (rev 05)'
+- bus: '03'
+  dev: '00'
+  fn: '0'
+  id: 6f50
+  name: 'System peripheral: Intel Corporation Xeon Processor D Family QuickData Technology
+    Register DMA Channel 0'
+- bus: '03'
+  dev: '00'
+  fn: '1'
+  id: 6f51
+  name: 'System peripheral: Intel Corporation Xeon Processor D Family QuickData Technology
+    Register DMA Channel 1'
+- bus: '03'
+  dev: '00'
+  fn: '2'
+  id: 6f52
+  name: 'System peripheral: Intel Corporation Xeon Processor D Family QuickData Technology
+    Register DMA Channel 2'
+- bus: '03'
+  dev: '00'
+  fn: '3'
+  id: 6f53
+  name: 'System peripheral: Intel Corporation Xeon Processor D Family QuickData Technology
+    Register DMA Channel 3'
+- bus: '05'
+  dev: '00'
+  fn: '0'
+  id: 15ab
+  name: 'Ethernet controller: Intel Corporation Ethernet Connection X552 10 GbE Backplane'
+- bus: '05'
+  dev: '00'
+  fn: '1'
+  id: 15ab
+  name: 'Ethernet controller: Intel Corporation Ethernet Connection X552 10 GbE Backplane'
+- bus: '07'
+  dev: '00'
+  fn: '0'
+  id: b873
+  name: 'Ethernet controller: Broadcom Inc. and subsidiaries Device b873 (rev 01)'
+- bus: 0b
+  dev: '00'
+  fn: '0'
+  id: 165f
+  name: 'Ethernet controller: Broadcom Inc. and subsidiaries NetXtreme BCM5720 2-port
+    Gigabit Ethernet PCIe'
+- bus: ff
+  dev: 0b
+  fn: '0'
+  id: 6f81
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D R3 QPI Link 0/1 (rev 03)'
+- bus: ff
+  dev: 0b
+  fn: '1'
+  id: 6f36
+  name: 'Performance counters: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D R3 QPI Link 0/1 (rev 03)'
+- bus: ff
+  dev: 0b
+  fn: '2'
+  id: 6f37
+  name: 'Performance counters: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D R3 QPI Link 0/1 (rev 03)'
+- bus: ff
+  dev: 0b
+  fn: '3'
+  id: 6f76
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D R3 QPI Link Debug (rev 03)'
+- bus: ff
+  dev: 0c
+  fn: '0'
+  id: 6fe0
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Caching Agent (rev 03)'
+- bus: ff
+  dev: 0c
+  fn: '1'
+  id: 6fe1
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Caching Agent (rev 03)'
+- bus: ff
+  dev: 0c
+  fn: '2'
+  id: 6fe2
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Caching Agent (rev 03)'
+- bus: ff
+  dev: 0c
+  fn: '3'
+  id: 6fe3
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Caching Agent (rev 03)'
+- bus: ff
+  dev: 0f
+  fn: '0'
+  id: 6ff8
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Caching Agent (rev 03)'
+- bus: ff
+  dev: 0f
+  fn: '4'
+  id: 6ffc
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Caching Agent (rev 03)'
+- bus: ff
+  dev: 0f
+  fn: '5'
+  id: 6ffd
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Caching Agent (rev 03)'
+- bus: ff
+  dev: 0f
+  fn: '6'
+  id: 6ffe
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Caching Agent (rev 03)'
+- bus: ff
+  dev: '10'
+  fn: '0'
+  id: 6f1d
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D R2PCIe Agent (rev 03)'
+- bus: ff
+  dev: '10'
+  fn: '1'
+  id: 6f34
+  name: 'Performance counters: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D R2PCIe Agent (rev 03)'
+- bus: ff
+  dev: '10'
+  fn: '5'
+  id: 6f1e
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Ubox (rev 03)'
+- bus: ff
+  dev: '10'
+  fn: '6'
+  id: 6f7d
+  name: 'Performance counters: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Ubox (rev 03)'
+- bus: ff
+  dev: '10'
+  fn: '7'
+  id: 6f1f
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Ubox (rev 03)'
+- bus: ff
+  dev: '12'
+  fn: '0'
+  id: 6fa0
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Home Agent 0 (rev 03)'
+- bus: ff
+  dev: '12'
+  fn: '1'
+  id: 6f30
+  name: 'Performance counters: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Home Agent 0 (rev 03)'
+- bus: ff
+  dev: '13'
+  fn: '0'
+  id: 6fa8
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Target Address/Thermal/RAS (rev 03)'
+- bus: ff
+  dev: '13'
+  fn: '1'
+  id: 6f71
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Target Address/Thermal/RAS (rev 03)'
+- bus: ff
+  dev: '13'
+  fn: '2'
+  id: 6faa
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel Target Address Decoder (rev 03)'
+- bus: ff
+  dev: '13'
+  fn: '3'
+  id: 6fab
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel Target Address Decoder (rev 03)'
+- bus: ff
+  dev: '13'
+  fn: '4'
+  id: 6fac
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel Target Address Decoder (rev 03)'
+- bus: ff
+  dev: '13'
+  fn: '5'
+  id: 6fad
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel Target Address Decoder (rev 03)'
+- bus: ff
+  dev: '13'
+  fn: '6'
+  id: 6fae
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D DDRIO Channel 0/1 Broadcast (rev 03)'
+- bus: ff
+  dev: '13'
+  fn: '7'
+  id: 6faf
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D DDRIO Global Broadcast (rev 03)'
+- bus: ff
+  dev: '14'
+  fn: '0'
+  id: 6fb0
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel 0 Thermal Control (rev 03)'
+- bus: ff
+  dev: '14'
+  fn: '1'
+  id: 6fb1
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel 1 Thermal Control (rev 03)'
+- bus: ff
+  dev: '14'
+  fn: '2'
+  id: 6fb2
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel 0 Error (rev 03)'
+- bus: ff
+  dev: '14'
+  fn: '3'
+  id: 6fb3
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel 1 Error (rev 03)'
+- bus: ff
+  dev: '14'
+  fn: '4'
+  id: 6fbc
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D DDRIO Channel 0/1 Interface (rev 03)'
+- bus: ff
+  dev: '14'
+  fn: '5'
+  id: 6fbd
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D DDRIO Channel 0/1 Interface (rev 03)'
+- bus: ff
+  dev: '14'
+  fn: '6'
+  id: 6fbe
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D DDRIO Channel 0/1 Interface (rev 03)'
+- bus: ff
+  dev: '14'
+  fn: '7'
+  id: 6fbf
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D DDRIO Channel 0/1 Interface (rev 03)'
+- bus: ff
+  dev: '15'
+  fn: '0'
+  id: 6fb4
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel 2 Thermal Control (rev 03)'
+- bus: ff
+  dev: '15'
+  fn: '1'
+  id: 6fb5
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel 3 Thermal Control (rev 03)'
+- bus: ff
+  dev: '15'
+  fn: '2'
+  id: 6fb6
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel 2 Error (rev 03)'
+- bus: ff
+  dev: '15'
+  fn: '3'
+  id: 6fb7
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel 3 Error (rev 03)'
+- bus: ff
+  dev: 1e
+  fn: '0'
+  id: 6f98
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Power Control Unit (rev 03)'
+- bus: ff
+  dev: 1e
+  fn: '1'
+  id: 6f99
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Power Control Unit (rev 03)'
+- bus: ff
+  dev: 1e
+  fn: '2'
+  id: 6f9a
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Power Control Unit (rev 03)'
+- bus: ff
+  dev: 1e
+  fn: '3'
+  id: 6fc0
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Power Control Unit (rev 03)'
+- bus: ff
+  dev: 1e
+  fn: '4'
+  id: 6f9c
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Power Control Unit (rev 03)'
+- bus: ff
+  dev: 1f
+  fn: '0'
+  id: 6f88
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Power Control Unit (rev 03)'
+- bus: ff
+  dev: 1f
+  fn: '2'
+  id: 6f8a
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Power Control Unit (rev 03)'
diff --git a/device/accton/x86_64-accton_as7326_56x-r0/pddf/pd-plugin.json b/device/accton/x86_64-accton_as7326_56x-r0/pddf/pd-plugin.json
index 317cf23b7..aacab4674 100644
--- a/device/accton/x86_64-accton_as7326_56x-r0/pddf/pd-plugin.json
+++ b/device/accton/x86_64-accton_as7326_56x-r0/pddf/pd-plugin.json
@@ -34,7 +34,7 @@
         {
             "i2c":
             {
-                "valmap": { "F2B":"EXHAUST", "B2F":"INTAKE" }
+                "valmap": { "F2B":"exhaust", "B2F":"intake" }
             }
         },
 
@@ -47,7 +47,7 @@
         {
             "i2c":
             {
-                "valmap": {"1":"INTAKE", "0":"EXHAUST"}
+                "valmap": {"1":"intake", "0":"exhaust"}
             }
         },
 
@@ -61,7 +61,7 @@
 
         "duty_cycle_to_pwm": "lambda dc: ((dc*100)/625 -1)",
 
-        "pwm_to_duty_cycle": "lambda pwm: (((pwm+1)*625+75)/100)"
+        "pwm_to_duty_cycle": "lambda pwm: (((pwm+1)*625)/100)"
     }
 
 }
diff --git a/device/accton/x86_64-accton_as7326_56x-r0/pddf/pddf-device.json b/device/accton/x86_64-accton_as7326_56x-r0/pddf/pddf-device.json
index 857b4e1c4..3cb36d423 100644
--- a/device/accton/x86_64-accton_as7326_56x-r0/pddf/pddf-device.json
+++ b/device/accton/x86_64-accton_as7326_56x-r0/pddf/pddf-device.json
@@ -207,7 +207,10 @@
                 { "attr_name":"psu_i_out", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x8c", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
                 { "attr_name":"psu_p_out", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x96", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
                 { "attr_name":"psu_fan1_speed_rpm", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x90", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
-                { "attr_name":"psu_temp1_input", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x8d", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}
+                { "attr_name":"psu_temp1_input", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x8d", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+                { "attr_name":"psu_v_out_min", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0xa4", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+                { "attr_name":"psu_v_out_max", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0xa5", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+                { "attr_name":"psu_temp1_high_threshold", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0xa8", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}
             ]
         }
     },
@@ -256,7 +259,10 @@
                 { "attr_name":"psu_i_out", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x8c", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
                 { "attr_name":"psu_p_out", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x96", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
                 { "attr_name":"psu_fan1_speed_rpm", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x90", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
-                { "attr_name":"psu_temp1_input", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x8d", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}
+                { "attr_name":"psu_temp1_input", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x8d", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+                { "attr_name":"psu_v_out_min", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0xa4", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+                { "attr_name":"psu_v_out_max", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0xa5", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+                { "attr_name":"psu_temp1_high_threshold", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0xa8", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"}
             ]
         }
     },
@@ -2911,36 +2917,36 @@
     "LOC_LED":
     {
         "dev_info": { "device_type":"LED", "device_name":"LOC_LED"},
-        "dev_attr": { "index":"0"},
+        "dev_attr": { "index":"0", "flag": "rw"},
         "i2c" :
         {
             "attr_list":
             [
-                {"attr_name":"STATUS_LED_COLOR_BLUE_BLINK", "descr": "" , "bits" : "5:0",  "value" : "0x27", "swpld_addr" : "0x60", "swpld_addr_offset" : "0x25"},
-                {"attr_name":"STATUS_LED_COLOR_GREEN_BLINK", "descr": "" , "bits" : "5:0",  "value" : "0x17", "swpld_addr" : "0x60", "swpld_addr_offset" : "0x25"},
-                {"attr_name":"STATUS_LED_COLOR_AMBER_BLINK", "descr": "" , "bits" : "5:0",  "value" : "0xf", "swpld_addr" : "0x60", "swpld_addr_offset" : "0x25"},
-                {"attr_name":"STATUS_LED_COLOR_BLUE", "descr": "" , "bits" : "5:0",  "value" : "0x3", "swpld_addr" : "0x60", "swpld_addr_offset" : "0x25"},
-                {"attr_name":"STATUS_LED_COLOR_GREEN", "descr": "" , "bits" : "5:0",  "value" : "0x5", "swpld_addr" : "0x60", "swpld_addr_offset" : "0x25"},
-                {"attr_name":"STATUS_LED_COLOR_AMBER", "descr": "" , "bits" : "5:0",  "value" : "0x6", "swpld_addr" : "0x60", "swpld_addr_offset" : "0x25"},
-                {"attr_name":"STATUS_LED_COLOR_OFF", "descr": "" , "bits" : "5:0",  "value" : "0xf", "swpld_addr" : "0x60", "swpld_addr_offset" : "0x25"}
+                {"attr_name":"blue_blink", "descr": "" , "bits" : "5:0",  "value" : "0x27", "swpld_addr" : "0x60", "swpld_addr_offset" : "0x25"},
+                {"attr_name":"green_blink", "descr": "" , "bits" : "5:0",  "value" : "0x17", "swpld_addr" : "0x60", "swpld_addr_offset" : "0x25"},
+                {"attr_name":"amber_blink", "descr": "" , "bits" : "5:0",  "value" : "0xf", "swpld_addr" : "0x60", "swpld_addr_offset" : "0x25"},
+                {"attr_name":"blue", "descr": "" , "bits" : "5:0",  "value" : "0x3", "swpld_addr" : "0x60", "swpld_addr_offset" : "0x25"},
+                {"attr_name":"green", "descr": "" , "bits" : "5:0",  "value" : "0x5", "swpld_addr" : "0x60", "swpld_addr_offset" : "0x25"},
+                {"attr_name":"amber", "descr": "" , "bits" : "5:0",  "value" : "0x6", "swpld_addr" : "0x60", "swpld_addr_offset" : "0x25"},
+                {"attr_name":"off", "descr": "" , "bits" : "5:0",  "value" : "0xf", "swpld_addr" : "0x60", "swpld_addr_offset" : "0x25"}
             ]
         }
     },
     "DIAG_LED":
     {
         "dev_info": { "device_type":"LED", "device_name":"DIAG_LED"},
-         "dev_attr": { "index":"0"},
+         "dev_attr": { "index":"0", "flag": "rw"},
          "i2c" :
          {
              "attr_list":
              [
-                {"attr_name":"STATUS_LED_COLOR_BLUE_BLINK", "descr": "" , "bits" : "5:0",  "value" : "0x27", "swpld_addr" : "0x60", "swpld_addr_offset" : "0x24"},
-                {"attr_name":"STATUS_LED_COLOR_GREEN_BLINK", "descr": "" , "bits" : "5:0",  "value" : "0x17", "swpld_addr" : "0x60", "swpld_addr_offset" : "0x24"},
-                {"attr_name":"STATUS_LED_COLOR_AMBER_BLINK", "descr": "" , "bits" : "5:0",  "value" : "0xf", "swpld_addr" : "0x60", "swpld_addr_offset" : "0x24"},
-                {"attr_name":"STATUS_LED_COLOR_BLUE", "descr": "" , "bits" : "5:0",  "value" : "0x3", "swpld_addr" : "0x60", "swpld_addr_offset" : "0x24"},
-                {"attr_name":"STATUS_LED_COLOR_GREEN", "descr": "" , "bits" : "5:0",  "value" : "0x5", "swpld_addr" : "0x60", "swpld_addr_offset" : "0x24"},
-                {"attr_name":"STATUS_LED_COLOR_AMBER", "descr": "" , "bits" : "5:0",  "value" : "0x6", "swpld_addr" : "0x60", "swpld_addr_offset" : "0x24"},
-                {"attr_name":"STATUS_LED_COLOR_OFF", "descr": "" , "bits" : "5:0",  "value" : "0x7", "swpld_addr" : "0x60", "swpld_addr_offset" : "0x24"}
+                {"attr_name":"blue_blink", "descr": "" , "bits" : "5:0",  "value" : "0x27", "swpld_addr" : "0x60", "swpld_addr_offset" : "0x24"},
+                {"attr_name":"green_blink", "descr": "" , "bits" : "5:0",  "value" : "0x17", "swpld_addr" : "0x60", "swpld_addr_offset" : "0x24"},
+                {"attr_name":"amber_blink", "descr": "" , "bits" : "5:0",  "value" : "0xf", "swpld_addr" : "0x60", "swpld_addr_offset" : "0x24"},
+                {"attr_name":"blue", "descr": "" , "bits" : "5:0",  "value" : "0x3", "swpld_addr" : "0x60", "swpld_addr_offset" : "0x24"},
+                {"attr_name":"green", "descr": "" , "bits" : "5:0",  "value" : "0x5", "swpld_addr" : "0x60", "swpld_addr_offset" : "0x24"},
+                {"attr_name":"amber", "descr": "" , "bits" : "5:0",  "value" : "0x6", "swpld_addr" : "0x60", "swpld_addr_offset" : "0x24"},
+                {"attr_name":"off", "descr": "" , "bits" : "5:0",  "value" : "0x7", "swpld_addr" : "0x60", "swpld_addr_offset" : "0x24"}
                 
              ]
         }
diff --git a/device/accton/x86_64-accton_as7326_56x-r0/platform.json b/device/accton/x86_64-accton_as7326_56x-r0/platform.json
new file mode 100644
index 000000000..29a825ad2
--- /dev/null
+++ b/device/accton/x86_64-accton_as7326_56x-r0/platform.json
@@ -0,0 +1,600 @@
+{
+    "chassis": {
+        "name": "7326-56X",
+        "components": [
+            {
+                "name": "MB_CPLD1"
+            },
+            {
+                "name": "MB_CPLD2"
+            },
+            {
+                "name": "MB_CPLD3"
+            },
+            {
+                "name": "FAN_CPLD"
+            },
+            {
+                "name": "CPU_CPLD"
+            },
+            {
+                "name": "BIOS"
+            }
+        ],
+        "fans": [
+            {
+                "name": "FAN-1F"
+            },
+            {
+                "name": "FAN-1R"
+            },
+            {
+                "name": "FAN-2F"
+            },
+            {
+                "name": "FAN-2R"
+            },
+            {
+                "name": "FAN-3F"
+            },
+            {
+                "name": "FAN-3R"
+            },
+            {
+                "name": "FAN-4F"
+            },
+            {
+                "name": "FAN-4R"
+            },
+            {
+                "name": "FAN-5F"
+            },
+            {
+                "name": "FAN-5R"
+            },
+            {
+                "name": "FAN-6F"
+            },
+            {
+                "name": "FAN-6R"
+            }
+        ],
+        "fan_drawers":[
+            {
+                "name": "FanTray1",
+                "num_fans" : 2,
+                "fans": [
+                    {
+                        "name": "FAN-1F"
+                    },
+                    {
+                        "name": "FAN-1R"
+                    }
+                ]
+            },
+            {
+                "name": "FanTray2",
+                "num_fans" : 2,
+                "fans": [
+                    {
+                        "name": "FAN-2F"
+                    },
+                    {
+                        "name": "FAN-2R"
+                    }
+                ]
+            },
+            {
+                "name": "FanTray3",
+                "num_fans" : 2,
+                "fans": [
+                    {
+                        "name": "FAN-3F"
+                    },
+                    {
+                        "name": "FAN-3R"
+                    }
+                ]
+            },
+            {
+                "name": "FanTray4",
+                "num_fans" : 2,
+                "fans": [
+                    {
+                        "name": "FAN-4F"
+                    },
+                    {
+                        "name": "FAN-4R"
+                    }
+                ]
+            },
+            {
+                "name": "FanTray5",
+                "num_fans" : 2,
+                "fans": [
+                    {
+                        "name": "FAN-5F"
+                    },
+                    {
+                        "name": "FAN-5R"
+                    }
+                ]
+            },
+            {
+                "name": "FanTray6",
+                "num_fans" : 2,
+                "fans": [
+                    {
+                        "name": "FAN-6F"
+                    },
+                    {
+                        "name": "FAN-6R"
+                    }
+                ]
+            }
+        ],
+        "psus": [
+            {
+                "name": "PSU-1",
+                "fans": [
+                    {
+                        "name": "PSU-1 FAN-1"
+                    }
+                ],
+                "thermals": [
+                    {
+                        "name": "PSU-1 temp sensor 1",
+                        "controllable": false,
+                        "low-threshold": false,
+                        "high-threshold": false,
+                        "low-crit-threshold": false,
+                        "high-crit-threshold": false
+                    }
+                ],
+                "temperature": true,
+                "temperature_high_threshold": true
+            },
+            {
+                "name": "PSU-2",
+                "fans": [
+                    {
+                        "name": "PSU-2 FAN-1"
+                    }
+                ],
+                "thermals": [
+                    {
+                        "name": "PSU-2 temp sensor 1",
+                        "controllable": false,
+                        "low-threshold": false,
+                        "high-threshold": false,
+                        "low-crit-threshold": false,
+                        "high-crit-threshold": false
+                    }
+                ],
+                "temperature": true,
+                "temperature_high_threshold": true
+            }
+        ],
+        "thermals": [
+            {
+                "name": "CB_temp(0x4B)",
+                "controllable": true,
+                "low-threshold": false,
+                "high-threshold": true,
+                "low-crit-threshold": false,
+                "high-crit-threshold": true
+            },
+            {
+                "name": "MB_FrontMAC_temp(0x49)",
+                "controllable": true,
+                "low-threshold": false,
+                "high-threshold": true,
+                "low-crit-threshold": false,
+                "high-crit-threshold": true
+            },
+            {
+                "name": "MB_LeftCenter_temp(0x4A)",
+                "controllable": true,
+                "low-threshold": false,
+                "high-threshold": true,
+                "low-crit-threshold": false,
+                "high-crit-threshold": true
+            },
+            {
+                "name": "MB_RearMAC_temp(0x48)",
+                "controllable": true,
+                "low-threshold": false,
+                "high-threshold": true,
+                "low-crit-threshold": false,
+                "high-crit-threshold": true
+            },
+            {
+                "name": "CPU Temp",
+                "controllable": true,
+                "low-threshold": false,
+                "high-threshold": true,
+                "low-crit-threshold": false,
+                "high-crit-threshold": true
+            }
+        ],
+        "sfps": [
+            {
+                "name": "Ethernet0"
+            },
+            {
+                "name": "Ethernet1"
+            },
+            {
+                "name": "Ethernet2"
+            },
+            {
+                "name": "Ethernet3"
+            },
+            {
+                "name": "Ethernet4"
+            },
+            {
+                "name": "Ethernet5"
+            },
+            {
+                "name": "Ethernet6"
+            },
+            {
+                "name": "Ethernet7"
+            },
+            {
+                "name": "Ethernet8"
+            },
+            {
+                "name": "Ethernet9"
+            },
+            {
+                "name": "Ethernet10"
+            },
+            {
+                "name": "Ethernet11"
+            },
+            {
+                "name": "Ethernet12"
+            },
+            {
+                "name": "Ethernet13"
+            },
+            {
+                "name": "Ethernet14"
+            },
+            {
+                "name": "Ethernet15"
+            },
+            {
+                "name": "Ethernet16"
+            },
+            {
+                "name": "Ethernet17"
+            },
+            {
+                "name": "Ethernet18"
+            },
+            {
+                "name": "Ethernet19"
+            },
+            {
+                "name": "Ethernet20"
+            },
+            {
+                "name": "Ethernet21"
+            },
+            {
+                "name": "Ethernet22"
+            },
+            {
+                "name": "Ethernet23"
+            },
+            {
+                "name": "Ethernet24"
+            },
+            {
+                "name": "Ethernet25"
+            },
+            {
+                "name": "Ethernet26"
+            },
+            {
+                "name": "Ethernet27"
+            },
+            {
+                "name": "Ethernet28"
+            },
+            {
+                "name": "Ethernet29"
+            },
+            {
+                "name": "Ethernet30"
+            },
+            {
+                "name": "Ethernet31"
+            },
+            {
+                "name": "Ethernet32"
+            },
+            {
+                "name": "Ethernet33"
+            },
+            {
+                "name": "Ethernet34"
+            },
+            {
+                "name": "Ethernet35"
+            },
+            {
+                "name": "Ethernet36"
+            },
+            {
+                "name": "Ethernet37"
+            },
+            {
+                "name": "Ethernet38"
+            },
+            {
+                "name": "Ethernet39"
+            },
+            {
+                "name": "Ethernet40"
+            },
+            {
+                "name": "Ethernet41"
+            },
+            {
+                "name": "Ethernet42"
+            },
+            {
+                "name": "Ethernet43"
+            },
+            {
+                "name": "Ethernet44"
+            },
+            {
+                "name": "Ethernet45"
+            },
+            {
+                "name": "Ethernet46"
+            },
+            {
+                "name": "Ethernet47"
+            },
+            {
+                "name": "Ethernet48"
+            },
+            {
+                "name": "Ethernet52"
+            },
+            {
+                "name": "Ethernet56"
+            },
+            {
+                "name": "Ethernet60"
+            },
+            {
+                "name": "Ethernet64"
+            },
+            {
+                "name": "Ethernet68"
+            },
+            {
+                "name": "Ethernet72"
+            },
+            {
+                "name": "Ethernet76"
+            }
+        ]
+    },
+    "interfaces": {
+        "Ethernet5": {
+            "index": "6,2,1,3",
+            "lanes": "1,2,3,4",
+            "breakout_modes": {
+                "4x25G": ["Eth6/1(Port6)", "Eth6/2(Port2)", "Eth6/3(Port1)", "Eth6/4(Port3)"],
+                "4x10G[1G]": ["Eth6/1(Port6)", "Eth6/2(Port2)", "Eth6/3(Port1)", "Eth6/4(Port3)"]
+            },
+            "interface_ids": "5,1,0,2"
+        },
+
+        "Ethernet6": {
+            "index": "7,9,5,4",
+            "lanes": "5,6,7,8",
+            "breakout_modes": {
+                "4x25G": ["Eth7/1(Port7)", "Eth7/2(Port9)", "Eth7/3(Port5)", "Eth7/4(Port4)"],
+                "4x10G[1G]": ["Eth7/1(Port7)", "Eth7/2(Port9)", "Eth7/3(Port5)", "Eth7/4(Port4)"]
+            },
+            "interface_ids": "6,8,4,3"
+        },
+
+        "Ethernet10": {
+            "index": "11,10,12,8",
+            "lanes": "13,14,15,16",
+            "breakout_modes": {
+                "4x25G": ["Eth11/1(Port11)", "Eth11/2(Port10)", "Eth11/3(Port12)", "Eth11/4(Port8)"],
+                "4x10G[1G]": ["Eth11/1(Port11)", "Eth11/2(Port10)", "Eth11/3(Port12)", "Eth11/4(Port8)"]
+            },
+            "interface_ids": "10,9,11,7"
+        },
+
+        "Ethernet17": {
+            "index": "18,14,13,15",
+            "lanes": "21,22,23,24",
+            "breakout_modes": {
+                "4x25G": ["Eth18/1(Port18)", "Eth18/2(Port14)", "Eth18/3(Port13)", "Eth18/4(Port15)"],
+                "4x10G[1G]": ["Eth18/1(Port18)", "Eth18/2(Port14)", "Eth18/3(Port13)", "Eth18/4(Port15)"]
+            },
+            "interface_ids": "17,13,12,14"
+        },
+
+        "Ethernet18": {
+            "index": "19,21,17,16",
+            "lanes": "29,30,31,32",
+            "breakout_modes": {
+                "4x25G": ["Eth19/1(Port19)", "Eth19/2(Port21)", "Eth19/3(Port17)", "Eth19/4(Port16)"],
+                "4x10G[1G]": ["Eth19/1(Port19)", "Eth19/2(Port21)", "Eth19/3(Port17)", "Eth19/4(Port16)"]
+            },
+            "interface_ids": "18,20,16,15"
+        },
+
+        "Ethernet22": {
+            "index": "23,22,24,20",
+            "lanes": "33,34,35,36",
+            "breakout_modes": {
+                "4x25G": ["Eth23/1(Port23)", "Eth23/2(Port22)", "Eth23/3(Port24)", "Eth23/4(Port20)"],
+                "4x10G[1G]": ["Eth23/1(Port23)", "Eth23/2(Port22)", "Eth23/3(Port24)", "Eth23/4(Port20)"]
+            },
+            "interface_ids": "22,21,23,19"
+        },
+
+        "Ethernet29": {
+            "index": "30,26,25,27",
+            "lanes": "41,42,43,44",
+            "breakout_modes": {
+                "4x25G": ["Eth30/1(Port30)", "Eth30/2(Port26)", "Eth30/3(Port25)", "Eth30/4(Port27)"],
+                "4x10G[1G]": ["Eth30/1(Port30)", "Eth30/2(Port26)", "Eth30/3(Port25)", "Eth30/4(Port27)"]
+            },
+            "interface_ids": "29,25,24,26"
+        },
+
+        "Ethernet30": {
+            "index": "31,33,29,28",
+            "lanes": "49,50,51,52",
+            "breakout_modes": {
+                "4x25G": ["Eth31/1(Port31)", "Eth31/2(Port33)", "Eth31/3(Port29)", "Eth31/4(Port28)"],
+                "4x10G[1G]": ["Eth31/1(Port31)", "Eth31/2(Port33)", "Eth31/3(Port29)", "Eth31/4(Port28)"]
+            },
+            "interface_ids": "30,32,28,27"
+        },
+
+        "Ethernet34": {
+            "index": "35,34,36,32",
+            "lanes": "57,58,59,60",
+            "breakout_modes": {
+                "4x25G": ["Eth35/1(Port35)", "Eth35/2(Port34)", "Eth35/3(Port36)", "Eth35/4(Port32)"],
+                "4x10G[1G]": ["Eth35/1(Port35)", "Eth35/2(Port34)", "Eth35/3(Port36)", "Eth35/4(Port32)"]
+            },
+            "interface_ids": "34,33,35,31"
+        },
+
+        "Ethernet39": {
+            "index": "40,41,45,43",
+            "lanes": "65,66,67,68",
+            "breakout_modes": {
+                "4x25G": ["Eth40/1(Port40)", "Eth40/2(Port41)", "Eth40/3(Port45)", "Eth40/4(Port43)"],
+                "4x10G[1G]": ["Eth40/1(Port40)", "Eth40/2(Port41)", "Eth40/3(Port45)", "Eth40/4(Port43)"]
+            },
+            "interface_ids": "39,40,44,42"
+        },
+
+        "Ethernet41": {
+            "index": "42,37,38,39",
+            "lanes": "61,62,63,64",
+            "breakout_modes": {
+                "4x25G": ["Eth42/1(Port42)", "Eth42/2(Port37)", "Eth42/3(Port38)", "Eth42/4(Port39)"],
+                "4x10G[1G]": ["Eth42/1(Port42)", "Eth42/2(Port37)", "Eth42/3(Port38)", "Eth42/4(Port39)"]
+            },
+            "interface_ids": "41,36,37,38"
+        },
+
+        "Ethernet43": {
+            "index": "44,48,46,47",
+            "lanes": "69,70,71,72",
+            "breakout_modes": {
+                "4x25G": ["Eth44/1(Port44)", "Eth44/2(Port48)", "Eth44/3(Port46)", "Eth44/4(Port47)"],
+                "4x10G[1G]": ["Eth44/1(Port44)", "Eth44/2(Port48)", "Eth44/3(Port46)", "Eth44/4(Port47)"]
+            },
+            "interface_ids": "43,47,45,46"
+        },
+
+        "Ethernet48": {
+            "index": "49,49,49,49",
+            "lanes": "77,78,79,80",
+            "breakout_modes": {
+                "1x100G[40G]": ["Eth49(Port49)"],
+                "2x50G": ["Eth49/1(Port49)", "Eth49/2(Port49)"],
+                "4x25G": ["Eth49/1(Port49)", "Eth49/2(Port49)", "Eth49/3(Port49)", "Eth49/4(Port49)"],
+                "4x10G": ["Eth49/1(Port49)", "Eth49/2(Port49)", "Eth49/3(Port49)", "Eth49/4(Port49)"]
+            }
+        },
+
+        "Ethernet52": {
+            "index": "50,50,50,50",
+            "lanes": "85,86,87,88",
+            "breakout_modes": {
+                "1x100G[40G]": ["Eth50(Port50)"],
+                "2x50G": ["Eth50/1(Port50)", "Eth50/2(Port50)"],
+                "4x25G": ["Eth50/1(Port50)", "Eth50/2(Port50)", "Eth50/3(Port50)", "Eth50/4(Port50)"],
+                "4x10G": ["Eth50/1(Port50)", "Eth50/2(Port50)", "Eth50/3(Port50)", "Eth50/4(Port50)"]
+            }
+        },
+
+        "Ethernet56": {
+            "index": "51,51,51,51",
+            "lanes": "93,94,95,96",
+            "breakout_modes": {
+                "1x100G[40G]": ["Eth51(Port51)"],
+                "2x50G": ["Eth51/1(Port51)", "Eth51/2(Port51)"],
+                "4x25G": ["Eth51/1(Port51)", "Eth51/2(Port51)", "Eth51/3(Port51)", "Eth51/4(Port51)"],
+                "4x10G": ["Eth51/1(Port51)", "Eth51/2(Port51)", "Eth51/3(Port51)", "Eth51/4(Port51)"]
+            }
+        },
+
+        "Ethernet60": {
+            "index": "52,52,52,52",
+            "lanes": "97,98,99,100",
+            "breakout_modes": {
+                "1x100G[40G]": ["Eth52(Port52)"],
+                "2x50G": ["Eth52/1(Port52)", "Eth52/2(Port52)"],
+                "4x25G": ["Eth52/1(Port52)", "Eth52/2(Port52)", "Eth52/3(Port52)", "Eth52/4(Port52)"],
+                "4x10G": ["Eth52/1(Port52)", "Eth52/2(Port52)", "Eth52/3(Port52)", "Eth52/4(Port52)"]
+            }
+        },
+
+        "Ethernet64": {
+            "index": "53,53,53,53",
+            "lanes": "105,106,107,108",
+            "breakout_modes": {
+                "1x100G[40G]": ["Eth53(Port53)"],
+                "2x50G": ["Eth53/1(Port53)", "Eth53/2(Port53)"],
+                "4x25G": ["Eth53/1(Port53)", "Eth53/2(Port53)", "Eth53/3(Port53)", "Eth53/4(Port53)"],
+                "4x10G": ["Eth53/1(Port53)", "Eth53/2(Port53)", "Eth53/3(Port53)", "Eth53/4(Port53)"]
+            }
+        },
+
+        "Ethernet68": {
+            "index": "54,54,54,54",
+            "lanes": "113,114,115,116",
+            "breakout_modes": {
+                "1x100G[40G]": ["Eth54(Port54)"],
+                "2x50G": ["Eth54/1(Port54)", "Eth54/2(Port54)"],
+                "4x25G": ["Eth54/1(Port54)", "Eth54/2(Port54)", "Eth54/3(Port54)", "Eth54/4(Port54)"],
+                "4x10G": ["Eth54/1(Port54)", "Eth54/2(Port54)", "Eth54/3(Port54)", "Eth54/4(Port54)"]
+            }
+        },
+
+        "Ethernet72": {
+            "index": "55,55,55,55",
+            "lanes": "121,122,123,124",
+            "breakout_modes": {
+                "1x100G[40G]": ["Eth55(Port55)"],
+                "2x50G": ["Eth55/1(Port55)", "Eth55/2(Port55)"],
+                "4x25G": ["Eth55/1(Port55)", "Eth55/2(Port55)", "Eth55/3(Port55)", "Eth55/4(Port55)"],
+                "4x10G": ["Eth55/1(Port55)", "Eth55/2(Port55)", "Eth55/3(Port55)", "Eth55/4(Port55)"]
+            }
+        },
+
+        "Ethernet76": {
+            "index": "56,56,56,56",
+            "lanes": "125,126,127,128",
+            "breakout_modes": {
+                "1x100G[40G]": ["Eth56(Port56)"],
+                "2x50G": ["Eth56/1(Port56)", "Eth56/2(Port56)"],
+                "4x25G": ["Eth56/1(Port56)", "Eth56/2(Port56)", "Eth56/3(Port56)", "Eth56/4(Port56)"],
+                "4x10G": ["Eth56/1(Port56)", "Eth56/2(Port56)", "Eth56/3(Port56)", "Eth56/4(Port56)"]
+            }
+        }
+    }
+}
diff --git a/device/accton/x86_64-accton_as7326_56x-r0/pmon_daemon_control.json b/device/accton/x86_64-accton_as7326_56x-r0/pmon_daemon_control.json
index a3b204e20..44bad6494 100644
--- a/device/accton/x86_64-accton_as7326_56x-r0/pmon_daemon_control.json
+++ b/device/accton/x86_64-accton_as7326_56x-r0/pmon_daemon_control.json
@@ -1,5 +1,4 @@
 {
-    "skip_ledd": true,
-    "skip_pcied": true
+    "skip_ledd": true
 }
 
diff --git a/device/accton/x86_64-accton_as7326_56x-r0/sonic_platform/__init__.py b/device/accton/x86_64-accton_as7326_56x-r0/sonic_platform/__init__.py
deleted file mode 100644
index 73a7720e8..000000000
--- a/device/accton/x86_64-accton_as7326_56x-r0/sonic_platform/__init__.py
+++ /dev/null
@@ -1,2 +0,0 @@
-__all__ = [ "platform", "chassis", "sfp", "eeprom", "component", "psu", "thermal", "fan", "fan_drawer" ]
-from . import platform
diff --git a/device/accton/x86_64-accton_as7326_56x-r0/sonic_platform/chassis.py b/device/accton/x86_64-accton_as7326_56x-r0/sonic_platform/chassis.py
deleted file mode 100644
index 1c97d0e87..000000000
--- a/device/accton/x86_64-accton_as7326_56x-r0/sonic_platform/chassis.py
+++ /dev/null
@@ -1,264 +0,0 @@
-#############################################################################
-# Edgecore
-#
-# Module contains an implementation of SONiC Platform Base API and
-# provides the Chassis information which are available in the platform
-#
-#############################################################################
-
-import sys
-import subprocess
-
-try:
-    from sonic_platform_base.chassis_base import ChassisBase
-    from .event import SfpEvent
-    from sonic_py_common import device_info
-
-except ImportError as e:
-    raise ImportError(str(e) + "- required module not found")
-
-NUM_FAN_TRAY = 6
-NUM_PSU = 2
-NUM_THERMAL = 4
-NUM_PORT = 58
-NUM_COMPONENT = 4
-
-HOST_REBOOT_CAUSE_PATH = "/host/reboot-cause/"
-PMON_REBOOT_CAUSE_PATH = "/usr/share/sonic/platform/api_files/reboot-cause/"
-REBOOT_CAUSE_FILE = "reboot-cause.txt"
-PREV_REBOOT_CAUSE_FILE = "previous-reboot-cause.txt"
-HOST_CHK_CMD = ["which", "systemctl"]
-SYSLED_FNODE= "/sys/class/leds/accton_as7326_56x_led::diag/brightness"
-SYSLED_MODES = {
-    "0" : "STATUS_LED_COLOR_OFF",
-    "1" : "STATUS_LED_COLOR_GREEN",
-    "3" : "STATUS_LED_COLOR_RED",
-    "5" : "STATUS_LED_COLOR_GREEN_BLINK"
-}
-
-
-class Chassis(ChassisBase):
-    """Platform-specific Chassis class"""
-
-    def __init__(self):
-        ChassisBase.__init__(self)
-        self.config_data = {}
-        (self.platform, self.hwsku) = device_info.get_platform_and_hwsku()
-
-        self.__initialize_fan()
-        self.__initialize_psu()
-        self.__initialize_thermals()
-        self.__initialize_components()
-        self.__initialize_sfp()
-        self.__initialize_eeprom()
-
-    def __initialize_sfp(self):
-        from sonic_platform.sfp import Sfp
-        for index in range(NUM_PORT):
-            sfp = Sfp(index)
-            self._sfp_list.append(sfp)
-        self._sfpevent = SfpEvent(self._sfp_list)
-        self.sfp_module_initialized = True
-
-    def __initialize_fan(self):
-        from sonic_platform.fan_drawer import FanDrawer
-        for fant_index in range(NUM_FAN_TRAY):
-            fandrawer = FanDrawer(fant_index)
-            self._fan_drawer_list.append(fandrawer)
-            self._fan_list.extend(fandrawer._fan_list)
-
-    def __initialize_psu(self):
-        from sonic_platform.psu import Psu
-        for index in range(NUM_PSU):
-            psu = Psu(index)
-            self._psu_list.append(psu)
-
-    def __initialize_thermals(self):
-        from sonic_platform.thermal import Thermal
-        for index in range(NUM_THERMAL):
-            thermal = Thermal(index)
-            self._thermal_list.append(thermal)
-
-    def __initialize_eeprom(self):
-        from sonic_platform.eeprom import Tlv
-        self._eeprom = Tlv()
-
-    def __initialize_components(self):
-        from sonic_platform.component import Component
-        for index in range(NUM_COMPONENT):
-            component = Component(index)
-            self._component_list.append(component)
-
-    def __initialize_watchdog(self):
-        self._watchdog = Watchdog()
-
-    def __is_host(self):
-        return subprocess.call(HOST_CHK_CMD) == 0
-
-    def __read_txt_file(self, file_path):
-        try:
-            with open(file_path, 'r') as fd:
-                return fd.read().strip()
-        except IOError:
-            pass
-        return None
-
-    def __write_txt_file(self, file_path, value):
-        try:
-            with open(file_path, 'w') as fd:
-                fd.write(str(value))
-        except Exception:
-            return False
-        return True
-
-    def get_name(self):
-        """
-        Retrieves the name of the device
-            Returns:
-            string: The name of the device
-        """
-        return self._eeprom.get_product_name()
-
-    def get_presence(self):
-        """
-        Retrieves the presence of the Chassis
-        Returns:
-            bool: True if Chassis is present, False if not
-        """
-        return True
-
-    def get_status(self):
-        """
-        Retrieves the operational status of the device
-        Returns:
-            A boolean value, True if device is operating properly, False if not
-        """
-        return True
-    def get_base_mac(self):
-        """
-        Retrieves the base MAC address for the chassis
-        Returns:
-            A string containing the MAC address in the format
-            'XX:XX:XX:XX:XX:XX'
-        """
-        return self._eeprom.get_mac()
-
-    def get_model(self):
-        """
-        Retrieves the model number (or part number) of the device
-        Returns:
-            string: Model/part number of device
-        """
-        return self._eeprom.get_pn()
-
-    def get_serial(self):
-        """
-        Retrieves the hardware serial number for the chassis
-        Returns:
-            A string containing the hardware serial number for this chassis.
-        """
-        return self._eeprom.get_serial()
-
-    def get_system_eeprom_info(self):
-        """
-        Retrieves the full content of system EEPROM information for the chassis
-        Returns:
-            A dictionary where keys are the type code defined in
-            OCP ONIE TlvInfo EEPROM format and values are their corresponding
-            values.
-        """
-        return self._eeprom.get_eeprom()
-
-    def get_reboot_cause(self):
-        """
-        Retrieves the cause of the previous reboot
-        Returns:
-            A tuple (string, string) where the first element is a string
-            containing the cause of the previous reboot. This string must be
-            one of the predefined strings in this class. If the first string
-            is "REBOOT_CAUSE_HARDWARE_OTHER", the second string can be used
-            to pass a description of the reboot cause.
-        """
-        description = 'None'
-
-        reboot_cause_path = (HOST_REBOOT_CAUSE_PATH + REBOOT_CAUSE_FILE) if self.__is_host(
-        ) else (PMON_REBOOT_CAUSE_PATH + REBOOT_CAUSE_FILE)
-        prev_reboot_cause_path = (HOST_REBOOT_CAUSE_PATH + PREV_REBOOT_CAUSE_FILE) if self.__is_host(
-        ) else (PMON_REBOOT_CAUSE_PATH + PREV_REBOOT_CAUSE_FILE)
-
-        sw_reboot_cause      = self.__read_txt_file(reboot_cause_path) or "Unknown"
-        prev_sw_reboot_cause = self.__read_txt_file(prev_reboot_cause_path) or "Unknown"
-
-        if sw_reboot_cause != "Unknown":
-            reboot_cause = self.REBOOT_CAUSE_NON_HARDWARE
-            description = sw_reboot_cause
-        elif prev_reboot_cause_path != "Unknown":
-            reboot_cause = self.REBOOT_CAUSE_NON_HARDWARE
-            description = prev_sw_reboot_cause
-
-        return (reboot_cause, description)
-
-    def get_change_event(self, timeout=0):
-        # SFP event
-        if not self.sfp_module_initialized:
-            self.__initialize_sfp()
-        return self._sfpevent.get_sfp_event(timeout)
-
-    def get_sfp(self, index):
-        """
-        Retrieves sfp represented by (1-based) index <index>
-        Args:
-            index: An integer, the index (1-based) of the sfp to retrieve.
-            The index should be the sequence of a physical port in a chassis,
-            starting from 1.
-            For example, 1 for Ethernet0, 2 for Ethernet4 and so on.
-        Returns:
-            An object dervied from SfpBase representing the specified sfp
-        """
-        sfp = None
-        if not self.sfp_module_initialized:
-            self.__initialize_sfp()
-
-        try:
-            # The index will start from 1
-            sfp = self._sfp_list[index-1]
-        except IndexError:
-            sys.stderr.write("SFP index {} out of range (1-{})\n".format(
-                             index, len(self._sfp_list)))
-        return sfp
-
-    def get_position_in_parent(self):
-        """
-        Retrieves 1-based relative physical position in parent device. If the agent cannot determine the parent-relative position
-        for some reason, or if the associated value of entPhysicalContainedIn is '0', then the value '-1' is returned
-        Returns:
-            integer: The 1-based relative physical position in parent device or -1 if cannot determine the position
-        """
-        return -1
-
-    def is_replaceable(self):
-        """
-        Indicate whether this device is replaceable.
-        Returns:
-            bool: True if it is replaceable.
-        """
-        return False
-
-
-    def initizalize_system_led(self):
-        return True
-
-    def get_status_led(self):
-        val = self.__read_txt_file(SYSLED_FNODE)
-        return SYSLED_MODES[val] if val in SYSLED_MODES else "UNKNOWN"
-
-    def set_status_led(self, color):
-        mode = None
-        for key, val in SYSLED_MODES.items():
-            if val == color:
-                mode = key
-                break
-        if mode is None:
-            return False
-        else:
-            return self.__write_txt_file(SYSLED_FNODE, mode)
diff --git a/device/accton/x86_64-accton_as7326_56x-r0/sonic_platform/eeprom.py b/device/accton/x86_64-accton_as7326_56x-r0/sonic_platform/eeprom.py
deleted file mode 100644
index d0bffe53a..000000000
--- a/device/accton/x86_64-accton_as7326_56x-r0/sonic_platform/eeprom.py
+++ /dev/null
@@ -1,139 +0,0 @@
-try:
-    import os
-    import sys
-    import re
-    from sonic_platform_base.sonic_eeprom import eeprom_tlvinfo
-    if sys.version_info[0] >= 3:
-        from io import StringIO
-    else:
-        from cStringIO import StringIO
-except ImportError as e:
-    raise ImportError(str(e) + "- required module not found")
-
-CACHE_ROOT = '/var/cache/sonic/decode-syseeprom'
-CACHE_FILE = 'syseeprom_cache'
-NULL = 'N/A'
-
-class Tlv(eeprom_tlvinfo.TlvInfoDecoder):
-
-    EEPROM_DECODE_HEADLINES = 6
-
-    def __init__(self):
-        #self._eeprom_path = "/sys/bus/i2c/devices/0-0056/eeprom"
-        exists = os.path.isfile('/sys/bus/i2c/devices/0-0056/eeprom')
-        if (exists is True):
-            self._eeprom_path = "/sys/bus/i2c/devices/0-0056/eeprom"
-        else:
-            self._eeprom_path = "/sys/bus/i2c/devices/0-0057/eeprom"
-
-        super(Tlv, self).__init__(self._eeprom_path, 0, '', True)
-        self._eeprom = self._load_eeprom()
-
-    def __parse_output(self, decode_output):
-        decode_output.replace('\0', '')
-        lines = decode_output.split('\n')
-        lines = lines[self.EEPROM_DECODE_HEADLINES:]
-        _eeprom_info_dict = dict()
-
-        for line in lines:
-            try:
-                match = re.search('(0x[0-9a-fA-F]{2})([\s]+[\S]+[\s]+)([\S]+)',
-                                  line)
-                if match is not None:
-                    idx = match.group(1)
-                    value = match.group(3).rstrip('\0')
-
-                _eeprom_info_dict[idx] = value
-            except Exception:
-                pass
-
-        return _eeprom_info_dict
-
-    def _load_eeprom(self):
-        original_stdout = sys.stdout
-        sys.stdout = StringIO()
-        try:
-            self.read_eeprom_db()
-        except Exception:
-            decode_output = sys.stdout.getvalue()
-            sys.stdout = original_stdout
-            return self.__parse_output(decode_output)
-
-        status = self.check_status()
-        if 'ok' not in status:
-            return False
-
-        if not os.path.exists(CACHE_ROOT):
-            try:
-                os.makedirs(CACHE_ROOT)
-            except Exception:
-                pass
-
-        #
-        # only the eeprom classes that inherit from eeprom_base
-        # support caching. Others will work normally
-        #
-        try:
-            self.set_cache_name(os.path.join(CACHE_ROOT, CACHE_FILE))
-        except Exception:
-            pass
-
-        e = self.read_eeprom()
-        if e is None:
-            return 0
-
-        try:
-            self.update_cache(e)
-        except Exception:
-            pass
-
-        self.decode_eeprom(e)
-        decode_output = sys.stdout.getvalue()
-        sys.stdout = original_stdout
-
-        (is_valid, valid_crc) = self.is_checksum_valid(e)
-        if not is_valid:
-            return False
-
-        return self.__parse_output(decode_output)
-
-    def _valid_tlv(self, eeprom_data):
-        tlvinfo_type_codes_list = [
-            self._TLV_CODE_PRODUCT_NAME,
-            self._TLV_CODE_PART_NUMBER,
-            self._TLV_CODE_SERIAL_NUMBER,
-            self._TLV_CODE_MAC_BASE,
-            self._TLV_CODE_MANUF_DATE,
-            self._TLV_CODE_DEVICE_VERSION,
-            self._TLV_CODE_LABEL_REVISION,
-            self._TLV_CODE_PLATFORM_NAME,
-            self._TLV_CODE_ONIE_VERSION,
-            self._TLV_CODE_MAC_SIZE,
-            self._TLV_CODE_MANUF_NAME,
-            self._TLV_CODE_MANUF_COUNTRY,
-            self._TLV_CODE_VENDOR_NAME,
-            self._TLV_CODE_DIAG_VERSION,
-            self._TLV_CODE_SERVICE_TAG,
-            self._TLV_CODE_VENDOR_EXT,
-            self._TLV_CODE_CRC_32
-        ]
-
-        for code in tlvinfo_type_codes_list:
-            code_str = "0x{:X}".format(code)
-            eeprom_data[code_str] = eeprom_data.get(code_str, NULL)
-        return eeprom_data
-
-    def get_eeprom(self):
-        return self._valid_tlv(self._eeprom)
-
-    def get_pn(self):
-        return self._eeprom.get('0x22', NULL)
-
-    def get_serial(self):
-        return self._eeprom.get('0x23', NULL)
-
-    def get_mac(self):
-        return self._eeprom.get('0x24', NULL)
-
-    def get_product_name(self):
-        return self._eeprom.get('0x21', NULL)
diff --git a/device/accton/x86_64-accton_as7326_56x-r0/sonic_platform/fan.py b/device/accton/x86_64-accton_as7326_56x-r0/sonic_platform/fan.py
deleted file mode 100644
index c64d953b7..000000000
--- a/device/accton/x86_64-accton_as7326_56x-r0/sonic_platform/fan.py
+++ /dev/null
@@ -1,270 +0,0 @@
-#############################################################################
-# Edgecore
-#
-# Module contains an implementation of SONiC Platform Base API and
-# provides the fan status which are available in the platform
-#
-#############################################################################
-
-try:
-    from sonic_platform_base.fan_base import FanBase
-except ImportError as e:
-    raise ImportError(str(e) + "- required module not found")
-
-FAN_MAX_RPM = 25500
-PSU_FAN_MAX_RPM = 25500
-SPEED_TOLERANCE = 15
-CPLD_I2C_PATH = "/sys/bus/i2c/devices/11-0066/fan"
-PSU_I2C_PATH = "/sys/bus/i2c/devices/{}-00{}/"
-PSU_HWMON_I2C_MAPPING = {
-    0: {
-        "bus": 17,
-        "addr": "59"
-    },
-    1: {
-        "bus": 13,
-        "addr": "5b"
-    },
-}
-
-PSU_CPLD_I2C_MAPPING = {
-    0: {
-        "bus": 17,
-        "addr": "51"
-    },
-    1: {
-        "bus": 13,
-        "addr": "53"
-    },
-}
-
-FAN_NAME_LIST = ["FAN-1F", "FAN-1R", "FAN-2F", "FAN-2R",
-                 "FAN-3F", "FAN-3R", "FAN-4F", "FAN-4R", 
-                 "FAN-5F", "FAN-5R", "FAN-6F", "FAN-6R"]
-
-class Fan(FanBase):
-    """Platform-specific Fan class"""
-
-    def __init__(self,
-                 fan_tray_index,
-                 fan_index=0,
-                 is_psu_fan=False,
-                 psu_index=0):
-        self.fan_index = fan_index
-        self.fan_tray_index = fan_tray_index
-        self.is_psu_fan = is_psu_fan
-        self.psu_index = psu_index
-
-        if self.is_psu_fan:
-            psu_i2c_bus = PSU_HWMON_I2C_MAPPING[psu_index]["bus"]
-            psu_i2c_addr = PSU_HWMON_I2C_MAPPING[psu_index]["addr"]
-            self.psu_hwmon_path = PSU_I2C_PATH.format(psu_i2c_bus,
-                                                      psu_i2c_addr)
-            psu_i2c_bus = PSU_CPLD_I2C_MAPPING[psu_index]["bus"]
-            psu_i2c_addr = PSU_CPLD_I2C_MAPPING[psu_index]["addr"]
-            self.cpld_path = PSU_I2C_PATH.format(psu_i2c_bus, psu_i2c_addr)
-
-        FanBase.__init__(self)
-
-    def __read_txt_file(self, file_path):
-        try:
-            with open(file_path, 'r') as fd:
-                return fd.read().strip()
-        except IOError:
-            pass
-        return ""
-
-    def __write_txt_file(self, file_path, value):
-        try:
-            with open(file_path, 'w') as fd:
-                fd.write(str(value))
-        except Exception:
-            return False
-        return True
-
-    def get_direction(self):
-        """
-        Retrieves the direction of fan
-        Returns:
-            A string, either FAN_DIRECTION_INTAKE or FAN_DIRECTION_EXHAUST
-            depending on fan direction
-        """
-        if not self.is_psu_fan:
-            val = self.__read_txt_file(
-                CPLD_I2C_PATH + str(self.fan_tray_index+1) + "_direction")
-            direction = self.FAN_DIRECTION_EXHAUST if (
-                val == "0") else self.FAN_DIRECTION_INTAKE
-        else:
-            val = self.__read_txt_file(self.psu_hwmon_path + "psu_fan_dir")
-            direction = self.FAN_DIRECTION_EXHAUST if (
-                val == "F2B") else self.FAN_DIRECTION_INTAKE
-        return direction
-
-    def get_speed(self):
-        """
-        Retrieves the speed of fan as a percentage of full speed
-        Returns:
-            An integer, the percentage of full fan speed, in the range 0 (off)
-                 to 100 (full speed)
-        """
-        speed = 0
-        if self.is_psu_fan:
-            speed = self.__read_txt_file(
-                self.psu_hwmon_path + "psu_fan1_speed_rpm")
-            speed = (int(speed, 10)) * 100 / PSU_FAN_MAX_RPM
-            speed = 100 if (speed > 100) else speed
-        elif self.get_presence():
-            speed = self.__read_txt_file(CPLD_I2C_PATH + str(
-                self.fan_index * 10 + self.fan_tray_index + 1) + "_input")
-            speed = (int(speed, 10)) * 100 / FAN_MAX_RPM
-            speed = 100 if (speed > 100) else speed
-        return int(speed)
-
-    def get_target_speed(self):
-        """
-        Retrieves the target (expected) speed of the fan
-        Returns:
-            An integer, the percentage of full fan speed, in the range 0 (off)
-                 to 100 (full speed)
-        Note:
-            speed_pc = pwm_target/255*100
-            0   : when PWM mode is use
-            pwm : when pwm mode is not use
-        """
-        return self.get_speed()
-
-    def get_speed_tolerance(self):
-        """
-        Retrieves the speed tolerance of the fan
-        Returns:
-            An integer, the percentage of variance from target speed which is
-                 considered tolerable
-        """
-        return SPEED_TOLERANCE
-
-    def set_speed(self, speed):
-        """
-        Sets the fan speed
-        Args:
-            speed: An integer, the percentage of full fan speed to set fan to,
-                   in the range 0 (off) to 100 (full speed)
-        Returns:
-            A boolean, True if speed is set successfully, False if not
-        """
-
-        if not self.is_psu_fan and self.get_presence():
-            return self.__write_txt_file(
-                CPLD_I2C_PATH + "_duty_cycle_percentage", int(speed))
-
-        return False
-
-    def set_status_led(self, color):
-        """
-        Sets the state of the fan module status LED
-        Args:
-            color: A string representing the color with which to set the
-                   fan module status LED
-        Returns:
-            bool: True if status LED state is set successfully, False if not
-        """
-        return False  #Not supported
-
-    def get_status_led(self):
-        """
-        Gets the state of the fan status LED
-        Returns:
-            A string, one of the predefined STATUS_LED_COLOR_* strings above
-        """
-        status=self.get_presence()
-        if status is None:
-            return  self.STATUS_LED_COLOR_OFF
-
-        return {
-            1: self.STATUS_LED_COLOR_GREEN,
-            0: self.STATUS_LED_COLOR_RED            
-        }.get(status, self.STATUS_LED_COLOR_OFF)
-
-    def get_name(self):
-        """
-        Retrieves the name of the device
-            Returns:
-            string: The name of the device
-        """
-        fan_name = FAN_NAME_LIST[self.fan_tray_index*2 + self.fan_index] \
-            if not self.is_psu_fan \
-            else "PSU-{} FAN-{}".format(self.psu_index+1, self.fan_index+1)
-
-        return fan_name
-
-    def get_presence(self):
-        """
-        Retrieves the presence of the PSU
-        Returns:
-            bool: True if PSU is present, False if not
-        """
-        if self.is_psu_fan:
-            val = self.__read_txt_file(self.cpld_path + "psu_present")
-            return int(val, 10) == 1
-
-        val = self.__read_txt_file(
-            CPLD_I2C_PATH + str(self.fan_tray_index + 1) + "_present")
-        return int(val, 10)==1
-
-    def get_status(self):
-        """
-        Retrieves the operational status of the device
-        Returns:
-            A boolean value, True if device is operating properly, False if not
-        """
-        if self.is_psu_fan:
-            psu_fan_path= "{}{}".format(self.psu_hwmon_path, 'psu_fan1_fault')
-            val=self.__read_txt_file(psu_fan_path)
-            if val is not None:
-                return int(val, 10)==0
-            else:
-                return False
-        else:    
-            path = "{}{}{}".format(CPLD_I2C_PATH, self.fan_tray_index+1, '_fault')
-            val=self.__read_txt_file(path)
-            if val is not None:
-                return int(val, 10)==0
-            else:
-                return False
-
-    def get_model(self):
-        """
-        Retrieves the model number (or part number) of the device
-        Returns:
-            string: Model/part number of device
-        """
-               
-        return "N/A"
-    
-    def get_serial(self):
-        """
-        Retrieves the serial number of the device
-        Returns:
-            string: Serial number of device
-        """
-        return "N/A"
-
-    def get_position_in_parent(self):
-        """
-        Retrieves 1-based relative physical position in parent device.
-        If the agent cannot determine the parent-relative position
-        for some reason, or if the associated value of
-        entPhysicalContainedIn is'0', then the value '-1' is returned
-        Returns:
-            integer: The 1-based relative physical position in parent device
-            or -1 if cannot determine the position
-        """
-        return (self.fan_index+1) \
-            if not self.is_psu_fan else (self.psu_index+1)
-
-    def is_replaceable(self):
-        """
-        Indicate whether this device is replaceable.
-        Returns:
-            bool: True if it is replaceable.
-        """
-        return True if not self.is_psu_fan else False
diff --git a/device/accton/x86_64-accton_as7326_56x-r0/sonic_platform/fan_drawer.py b/device/accton/x86_64-accton_as7326_56x-r0/sonic_platform/fan_drawer.py
deleted file mode 100644
index e21163c10..000000000
--- a/device/accton/x86_64-accton_as7326_56x-r0/sonic_platform/fan_drawer.py
+++ /dev/null
@@ -1,90 +0,0 @@
-########################################################################
-#
-# Module contains an implementation of SONiC Platform Base API and
-# provides the Fan-Drawers' information available in the platform.
-#
-########################################################################
-
-try:
-    from sonic_platform_base.fan_drawer_base import FanDrawerBase
-except ImportError as e:
-    raise ImportError(str(e) + "- required module not found")
-
-FANS_PER_FANTRAY = 2
-
-
-class FanDrawer(FanDrawerBase):
-    """Platform-specific Fan class"""
-
-    def __init__(self, fantray_index):
-
-        FanDrawerBase.__init__(self)
-        # FanTray is 0-based in platforms
-        self.fantrayindex = fantray_index
-        self.__initialize_fan_drawer()
-
-
-    def __initialize_fan_drawer(self):
-        from sonic_platform.fan import Fan
-        for i in range(FANS_PER_FANTRAY):
-            self._fan_list.append(Fan(self.fantrayindex, i))
-
-    def get_name(self):
-        """
-        Retrieves the fan drawer name
-        Returns:
-            string: The name of the device
-        """
-        return "FanTray{}".format(self.fantrayindex+1)
-
-    def get_presence(self):
-        """
-        Retrieves the presence of the device
-        Returns:
-            bool: True if device is present, False if not
-        """
-        return self._fan_list[0].get_presence()
-
-    def get_model(self):
-        """
-        Retrieves the model number (or part number) of the device
-        Returns:
-            string: Model/part number of device
-        """
-        return self._fan_list[0].get_model()
-
-    def get_serial(self):
-        """
-        Retrieves the serial number of the device
-        Returns:
-            string: Serial number of device
-        """
-        return self._fan_list[0].get_serial()
-
-    def get_status(self):
-        """
-        Retrieves the operational status of the device
-        Returns:
-            A boolean value, True if device is operating properly, False if not
-        """
-        return self._fan_list[0].get_status()
-
-    def get_position_in_parent(self):
-        """
-        Retrieves 1-based relative physical position in parent device.
-        If the agent cannot determine the parent-relative position
-        for some reason, or if the associated value of
-        entPhysicalContainedIn is'0', then the value '-1' is returned
-        Returns:
-            integer: The 1-based relative physical position in parent device
-            or -1 if cannot determine the position
-        """
-        return (self.fantrayindex+1)
-
-    def is_replaceable(self):
-        """
-        Indicate whether this device is replaceable.
-        Returns:
-            bool: True if it is replaceable.
-        """
-        return True
diff --git a/device/accton/x86_64-accton_as7326_56x-r0/sonic_platform/psu.py b/device/accton/x86_64-accton_as7326_56x-r0/sonic_platform/psu.py
deleted file mode 100644
index 44566aba1..000000000
--- a/device/accton/x86_64-accton_as7326_56x-r0/sonic_platform/psu.py
+++ /dev/null
@@ -1,264 +0,0 @@
-#############################################################################
-# Edgecore
-#
-# Module contains an implementation of SONiC Platform Base API and
-# provides the PSUs status which are available in the platform
-#
-#############################################################################
-
-#import sonic_platform
-
-try:
-    from sonic_platform_base.psu_base import PsuBase
-    from sonic_platform.thermal import Thermal
-except ImportError as e:
-    raise ImportError(str(e) + "- required module not found")
-
-I2C_PATH = "/sys/bus/i2c/devices/{}-00{}/"
-
-PSU_NAME_LIST = ["PSU-1", "PSU-2"]
-PSU_NUM_FAN = [1, 1]
-PSU_HWMON_I2C_MAPPING = {
-    0: {
-        "bus": 17,
-        "addr": "59"
-    },
-    1: {
-        "bus": 13,
-        "addr": "5b"
-    },
-}
-
-PSU_CPLD_I2C_MAPPING = {
-    0: {
-        "bus": 17,
-        "addr": "51"
-    },
-    1: {
-        "bus": 13,
-        "addr": "53"
-    },
-}
-
-NUM_FAN_TRAY = 6
-
-
-class Psu(PsuBase):
-    """Platform-specific Psu class"""
-
-    def __init__(self, psu_index=0):
-        PsuBase.__init__(self)
-        self.index = psu_index
-
-        bus = PSU_HWMON_I2C_MAPPING[self.index]["bus"]
-        addr = PSU_HWMON_I2C_MAPPING[self.index]["addr"]
-        self.hwmon_path = I2C_PATH.format(bus, addr)
-
-        bus = PSU_CPLD_I2C_MAPPING[self.index]["bus"]
-        addr = PSU_CPLD_I2C_MAPPING[self.index]["addr"]
-        self.cpld_path = I2C_PATH.format(bus, addr)
-        self.__initialize_fan()
-
-    def __initialize_fan(self):
-        from sonic_platform.fan import Fan
-        self._fan_list.append(
-            Fan(NUM_FAN_TRAY + self.index,
-                is_psu_fan=True,
-                psu_index=self.index))
-        self._thermal_list.append(Thermal(is_psu=True, psu_index=self.index))
-
-    def __read_txt_file(self, file_path):
-        try:
-            with open(file_path, 'r') as fd:
-                return fd.read().strip()
-        except IOError:
-            pass
-        return None
-
-    def get_voltage(self):
-        """
-        Retrieves current PSU voltage output
-        Returns:
-            A float number, the output voltage in volts,
-            e.g. 12.1
-        """
-        val = self.__read_txt_file(self.hwmon_path + "psu_v_out")
-        if val is not None:
-            return float(val)/ 1000
-        else:
-            return 0
-
-    def get_current(self):
-        """
-        Retrieves present electric current supplied by PSU
-        Returns:
-            A float number, the electric current in amperes, e.g 15.4
-        """
-        val = self.__read_txt_file(self.hwmon_path + "psu_i_out")
-        if val is not None:
-            return float(val)/1000
-        else:
-            return 0
-
-    def get_power(self):
-        """
-        Retrieves current energy supplied by PSU
-        Returns:
-            A float number, the power in watts, e.g. 302.6
-        """
-        val = self.__read_txt_file(self.hwmon_path + "psu_p_out")
-        if val is not None:
-            return float(val)/1000
-        else:
-            return 0
-
-    def get_powergood_status(self):
-        """
-        Retrieves the powergood status of PSU
-        Returns:
-            A boolean, True if PSU has stablized its output voltages and passed all
-            its internal self-tests, False if not.
-        """
-        return self.get_status()
-
-    def set_status_led(self, color):
-        """
-        Sets the state of the PSU status LED
-        Args:
-            color: A string representing the color with which to set the PSU status LED
-                   Note: Only support green and off
-        Returns:
-            bool: True if status LED state is set successfully, False if not
-        """
-
-        return False  #Controlled by HW
-
-    def get_status_led(self):
-        """
-        Gets the state of the PSU status LED
-        Returns:
-            A string, one of the predefined STATUS_LED_COLOR_* strings above
-        """
-        status=self.get_status()
-        if status is None:
-            return  self.STATUS_LED_COLOR_OFF
-
-        return {
-            1: self.STATUS_LED_COLOR_GREEN,
-            0: self.STATUS_LED_COLOR_RED            
-        }.get(status, self.STATUS_LED_COLOR_OFF)
-
-    def get_temperature(self):
-        """
-        Retrieves current temperature reading from PSU
-        Returns:
-            A float number of current temperature in Celsius up to nearest thousandth
-            of one degree Celsius, e.g. 30.125
-        """
-        return self._thermal_list[0].get_temperature()
-
-    def get_temperature_high_threshold(self):
-        """
-        Retrieves the high threshold temperature of PSU
-        Returns:
-            A float number, the high threshold temperature of PSU in Celsius
-            up to nearest thousandth of one degree Celsius, e.g. 30.125
-        """
-        return False  #Not supported
-
-    def get_voltage_high_threshold(self):
-        """
-        Retrieves the high threshold PSU voltage output
-        Returns:
-            A float number, the high threshold output voltage in volts,
-            e.g. 12.1
-        """
-        val = self.__read_txt_file(self.hwmon_path + "psu_mfr_vout_max")
-        if val is not None:
-            return float(val)/ 1000
-        else:
-            return 0
-
-    def get_voltage_low_threshold(self):
-        """
-        Retrieves the low threshold PSU voltage output
-        Returns:
-            A float number, the low threshold output voltage in volts,
-            e.g. 12.1
-        """
-        val = self.__read_txt_file(self.hwmon_path + "psu_mfr_vout_min")
-        if val is not None:
-            return float(val)/ 1000
-        else:
-            return 0
-
-    def get_name(self):
-        """
-        Retrieves the name of the device
-            Returns:
-            string: The name of the device
-        """
-        return PSU_NAME_LIST[self.index]
-
-    def get_presence(self):
-        """
-        Retrieves the presence of the PSU
-        Returns:
-            bool: True if PSU is present, False if not
-        """
-        val = self.__read_txt_file(self.cpld_path + "psu_present")
-        if val is not None:
-            return int(val, 10) == 1
-        else:
-            return 0
-
-    def get_status(self):
-        """
-        Retrieves the operational status of the device
-        Returns:
-            A boolean value, True if device is operating properly, False if not
-        """
-        val = self.__read_txt_file(self.cpld_path + "psu_power_good")
-        if val is not None:
-            return int(val, 10) == 1
-        else:
-            return 0
-
-    def get_model(self):
-        """
-        Retrieves the model number (or part number) of the device
-        Returns:
-            string: Model/part number of device
-        """
-        model = self.__read_txt_file(self.cpld_path + "psu_model_name")
-        if model is None:
-            return "N/A"
-        return model
-
-    def get_serial(self):
-        """
-        Retrieves the serial number of the device
-        Returns:
-            string: Serial number of device
-        """
-        serial = self.__read_txt_file(self.cpld_path + "psu_serial_number")
-        if serial is None:
-            return "N/A"
-        return serial
-
-    def get_position_in_parent(self):
-        """
-        Retrieves 1-based relative physical position in parent device. If the agent cannot determine the parent-relative position
-        for some reason, or if the associated value of entPhysicalContainedIn is '0', then the value '-1' is returned
-        Returns:
-            integer: The 1-based relative physical position in parent device or -1 if cannot determine the position
-        """
-        return self.index+1
-
-    def is_replaceable(self):
-        """
-        Indicate whether this device is replaceable.
-        Returns:
-            bool: True if it is replaceable.
-        """
-        return True
diff --git a/device/accton/x86_64-accton_as7326_56x-r0/sonic_platform/sfp.py b/device/accton/x86_64-accton_as7326_56x-r0/sonic_platform/sfp.py
deleted file mode 100644
index 16fe60bfb..000000000
--- a/device/accton/x86_64-accton_as7326_56x-r0/sonic_platform/sfp.py
+++ /dev/null
@@ -1,625 +0,0 @@
-#############################################################################
-# Edgecore
-#
-# Sfp contains an implementation of SONiC Platform Base API and
-# provides the sfp device status which are available in the platform
-#
-#############################################################################
-
-import time
-import sys
-import subprocess
-from ctypes import create_string_buffer
-
-try:
-    from sonic_platform_base.sonic_xcvr.sfp_optoe_base import SfpOptoeBase
-    from sonic_platform_base.sonic_sfp.sfputilhelper import SfpUtilHelper
-except ImportError as e:
-    raise ImportError(str(e) + "- required module not found")
-
-CPLD_ADDR_MAPPING = {
-    0: {
-        "bus": 18,
-        "addr": "60"
-    },  # port 31-56
-    1: {
-        "bus": 12,
-        "addr": "62"
-    },  # port  1-30
-}
-CPLD_I2C_PATH = "/sys/bus/i2c/devices/{}-00{}/"
-
-class Sfp(SfpOptoeBase):
-    """Platform-specific Sfp class"""
-
-    # Port number
-    PORT_START = 1
-    PORT_END = 58
-
-    # Path to sysfs
-    PLATFORM_ROOT_PATH = "/usr/share/sonic/device"
-    PMON_HWSKU_PATH = "/usr/share/sonic/hwsku"
-    HOST_CHK_CMD = ["which", "systemctl"]
-
-    PLATFORM = "x86_64-accton_as7326_56x-r0"
-    HWSKU = "Accton-AS7326-56X"
-
-    _port_to_i2c_mapping = {
-        1: [42],
-        2: [41],
-        3: [44],
-        4: [43],
-        5: [47],
-        6: [45],
-        7: [46],
-        8: [50],
-        9: [48],
-        10: [49],
-        11: [52],
-        12: [51],
-        13: [53],
-        14: [56],
-        15: [55],
-        16: [54],
-        17: [58],
-        18: [57],
-        19: [60],
-        20: [59],
-        21: [61],
-        22: [63],
-        23: [62],
-        24: [64],
-        25: [66],
-        26: [68],
-        27: [65],
-        28: [67],
-        29: [69],
-        30: [71],
-        31: [72],
-        32: [70],
-        33: [74],
-        34: [73],
-        35: [76],
-        36: [75],
-        37: [77],
-        38: [79],
-        39: [78],
-        40: [80],
-        41: [81],
-        42: [82],
-        43: [84],
-        44: [85],
-        45: [83],
-        46: [87],
-        47: [88],
-        48: [86],
-        49: [25],
-        50: [26],
-        51: [27],
-        52: [28],
-        53: [29],
-        54: [30],
-        55: [31],
-        56: [32],
-        57: [22],
-        58: [23]
-    }
-
-    def __init__(self, sfp_index=0):
-        SfpOptoeBase.__init__(self)
-        # Init index
-        self.index = sfp_index
-        self.port_num = self.index + 1
-
-        cpld_idx = 0 if self.port_num > 30 else 1
-        bus = CPLD_ADDR_MAPPING[cpld_idx]["bus"]
-        addr = CPLD_ADDR_MAPPING[cpld_idx]["addr"]
-        self.cpld_path = CPLD_I2C_PATH.format(bus, addr)
-
-        # Init eeprom path
-        eeprom_path = '/sys/bus/i2c/devices/{0}-0050/eeprom'
-        self.port_to_eeprom_mapping = {}
-        for x in range(self.PORT_START, self.PORT_END + 1):
-            self.port_to_eeprom_mapping[x] = eeprom_path.format(
-                self._port_to_i2c_mapping[x][0])
-
-    def get_eeprom_path(self):
-        return self.port_to_eeprom_mapping[self.port_num]
-
-    def __read_txt_file(self, file_path):
-        try:
-            with open(file_path, 'r') as fd:
-                return fd.read().strip()
-        except IOError:
-            pass
-        return ""
-
-    def __write_txt_file(self, file_path, value):
-        try:
-            with open(file_path, 'w') as fd:
-                fd.write(str(value))
-        except Exception:
-            return False
-        return True
-
-    def __is_host(self):
-        return subprocess.call(self.HOST_CHK_CMD) == 0
-
-    def __get_path_to_port_config_file(self):
-        platform_path = "/".join([self.PLATFORM_ROOT_PATH, self.PLATFORM])
-        hwsku_path = "/".join(
-            [platform_path,
-             self.HWSKU]) if self.__is_host() else self.PMON_HWSKU_PATH
-        return "/".join([hwsku_path, "port_config.ini"])
-
-    def __read_eeprom_specific_bytes(self, offset, num_bytes):
-        sysfsfile_eeprom = None
-        eeprom_raw = []
-        for i in range(0, num_bytes):
-            eeprom_raw.append("0x00")
-
-        sysfs_sfp_i2c_client_eeprom_path = self.port_to_eeprom_mapping[
-            self.port_num]
-        try:
-            sysfsfile_eeprom = open(
-                sysfs_sfp_i2c_client_eeprom_path, mode="rb", buffering=0)
-            sysfsfile_eeprom.seek(offset)
-            raw = sysfsfile_eeprom.read(num_bytes)
-            for n in range(0, num_bytes):
-                if sys.version_info[0] >= 3:
-                    eeprom_raw[n] = hex(raw[n])[2:].zfill(2)
-                else:
-                    eeprom_raw[n] = hex(ord(raw[n]))[2:].zfill(2)
-        except Exception:
-            pass
-        finally:
-            if sysfsfile_eeprom:
-                sysfsfile_eeprom.close()
-
-        return eeprom_raw
-
-    def get_reset_status(self):
-        """
-        Retrieves the reset status of SFP
-        Returns:
-            A Boolean, True if reset enabled, False if disabled
-        """
-        if self.port_num <= 48  or self.port_num >=57:
-            return False  # SPF port doesn't support this feature
-
-        val = self.__read_txt_file(
-            self.cpld_path + "module_reset_" + str(self.port_num))
-        return int(val, 10) == 1
-
-    def get_rx_los(self):
-        """
-        Retrieves the RX LOS (lost-of-signal) status of SFP
-        Returns:
-            A Boolean, True if SFP has RX LOS, False if not.
-            Note : RX LOS status is latched until a call to get_rx_los or a reset.
-        """
-        if self.port_num <= 48  or self.port_num >=57:
-            rx_los = self.__read_txt_file(
-                self.cpld_path + "module_rx_los_" + str(self.port_num))
-            if int(rx_los, 10) == 1:
-                return [True]
-            else:
-                return [False]
-            #status_control_raw = self.__read_eeprom_specific_bytes(
-            #    SFP_STATUS_CONTROL_OFFSET, SFP_STATUS_CONTROL_WIDTH)
-            #if status_control_raw:
-            #    data = int(status_control_raw[0], 16)
-            #    rx_los = (sffbase().test_bit(data, 1) != 0)
-        else:
-            rx_los_list = []
-            dom_channel_monitor_raw = self.__read_eeprom_specific_bytes(
-                QSFP_CHANNL_RX_LOS_STATUS_OFFSET,
-                QSFP_CHANNL_RX_LOS_STATUS_WIDTH) if self.get_presence(
-                ) else None
-            if dom_channel_monitor_raw is not None:
-                rx_los_data = int(dom_channel_monitor_raw[0], 16)
-                rx_los_list.append(rx_los_data & 0x01 != 0)
-                rx_los_list.append(rx_los_data & 0x02 != 0)
-                rx_los_list.append(rx_los_data & 0x04 != 0)
-                rx_los_list.append(rx_los_data & 0x08 != 0)
-                return rx_los_list
-            else:
-                return [False]*4
-
-    def get_tx_fault(self):
-        """
-        Retrieves the TX fault status of SFP
-        
-        Returns:
-            A list of boolean values, representing the TX fault status
-            of each available channel, value is True if SFP channel
-            has TX fault, False if not.
-            E.g., for a tranceiver with four channels: [False, False, True, False]
-            Note : TX fault status is lached until a call to get_tx_fault or a reset.
-        """
-        tx_fault = False
-        if self.port_num <= 48  or self.port_num >=57:
-            tx_fault = self.__read_txt_file(
-                self.cpld_path + "module_tx_fault_" + str(self.port_num))
-            if int(tx_fault, 10) == 1:
-                return [True]
-            else:
-                return [False]
-            #status_control_raw = self.__read_eeprom_specific_bytes(
-            #    SFP_STATUS_CONTROL_OFFSET, SFP_STATUS_CONTROL_WIDTH)
-            #if status_control_raw:
-            #    data = int(status_control_raw[0], 16)
-            #    tx_fault = (sffbase().test_bit(data, 2) != 0)
-        else:
-            tx_fault_list = []
-            dom_channel_monitor_raw = self.__read_eeprom_specific_bytes(
-                QSFP_CHANNL_TX_FAULT_STATUS_OFFSET,
-                QSFP_CHANNL_TX_FAULT_STATUS_WIDTH) if self.get_presence(
-                ) else None
-            if dom_channel_monitor_raw is not None:
-                tx_fault_data = int(dom_channel_monitor_raw[0], 16)
-                tx_fault_list.append(tx_fault_data & 0x01 != 0)
-                tx_fault_list.append(tx_fault_data & 0x02 != 0)
-                tx_fault_list.append(tx_fault_data & 0x04 != 0)
-                tx_fault_list.append(tx_fault_data & 0x08 != 0)
-                return tx_fault_list
-            else:
-                return [False]*4
-
-
-    def get_tx_disable(self):
-        """
-        Retrieves the tx_disable status of this SFP
-        Returns:
-            A list of boolean values, representing the TX disable status
-            of each available channel, value is True if SFP channel
-            is TX disabled, False if not.
-            E.g., for a tranceiver with four channels: [False, False, True, False]
-        """
-        if self.port_num <= 48 or self.port_num >=57:
-            tx_disable = False
-
-            status_control_raw = self.__read_eeprom_specific_bytes(
-                SFP_STATUS_CONTROL_OFFSET, SFP_STATUS_CONTROL_WIDTH)
-            if status_control_raw:
-                cpld_val = self.__read_txt_file(
-                    self.cpld_path + "module_tx_disable_" + str(self.port_num))
-                tx_disable_hard = (int(cpld_val, 10) == 1)
-                data = int(status_control_raw[0], 16)
-                #tx_disable_hard = (sffbase().test_bit(
-                #    data, SFP_TX_DISABLE_HARD_BIT) != 0)
-                tx_disable_soft = (sffbase().test_bit(
-                    data, SFP_TX_DISABLE_SOFT_BIT) != 0)
-                tx_disable = tx_disable_hard | tx_disable_soft
-                if tx_disable==0:
-                    return [False]
-                else:
-                    return [True]
-                
-            else:
-                return [False]
-
-        else:
-            tx_disable_list = []
-
-            sfpd_obj = sff8436Dom()
-            if sfpd_obj is None:
-                return [False]
-
-            dom_control_raw = self.__read_eeprom_specific_bytes(
-                QSFP_CONTROL_OFFSET,
-                QSFP_CONTROL_WIDTH) if self.get_presence() else None
-            if dom_control_raw is not None:
-                dom_control_data = sfpd_obj.parse_control_bytes(
-                    dom_control_raw, 0)
-                tx_disable_list.append(
-                    'On' == dom_control_data['data']['TX1Disable']['value'])
-                tx_disable_list.append(
-                    'On' == dom_control_data['data']['TX2Disable']['value'])
-                tx_disable_list.append(
-                    'On' == dom_control_data['data']['TX3Disable']['value'])
-                tx_disable_list.append(
-                    'On' == dom_control_data['data']['TX4Disable']['value'])
-                return tx_disable_list
-            else:
-                return [False]*4
-
-    def get_tx_disable_channel(self):
-        """
-        Retrieves the TX disabled channels in this SFP
-        Returns:
-            A hex of 4 bits (bit 0 to bit 3 as channel 0 to channel 3) to represent
-            TX channels which have been disabled in this SFP.
-            As an example, a returned value of 0x5 indicates that channel 0
-            and channel 2 have been disabled.
-        """
-        tx_disable_list = self.get_tx_disable()
-        if tx_disable_list is None:
-            return 0
-        tx_disabled = 0
-        for i in range(len(tx_disable_list)):
-            if tx_disable_list[i]:
-                tx_disabled |= 1 << i
-        return tx_disabled
-
-    def get_lpmode(self):
-        """
-        Retrieves the lpmode (low power mode) status of this SFP
-        Returns:
-            A Boolean, True if lpmode is enabled, False if disabled
-        """
-        if self.port_num <= 48 or self.port_num >= 57:
-            # SFP doesn't support this feature
-            return False
-
-        power_set = self.get_power_set()
-        power_override = self.get_power_override()
-        return power_set and power_override
-
-    def get_power_set(self):
-
-        if self.port_num <= 48 or self.port_num >= 57:
-            # SFP doesn't support this feature
-            return False
-        else:
-            power_set = False
-
-            sfpd_obj = sff8436Dom()
-            if sfpd_obj is None:
-                return False
-
-            dom_control_raw = self.__read_eeprom_specific_bytes(
-                QSFP_CONTROL_OFFSET,
-                QSFP_CONTROL_WIDTH) if self.get_presence() else None
-            if dom_control_raw is not None:
-                dom_control_data = sfpd_obj.parse_control_bytes(
-                    dom_control_raw, 0)
-                power_set = (
-                    'On' == dom_control_data['data']['PowerSet']['value'])
-
-            return power_set
-
-    def get_power_override(self):
-        """
-        Retrieves the power-override status of this SFP
-        Returns:
-            A Boolean, True if power-override is enabled, False if disabled
-        """
-        if self.port_num <= 48 or self.port_num >= 57:
-            return False  # SFP doesn't support this feature
-        else:
-            power_override = False
-
-            sfpd_obj = sff8436Dom()
-            if sfpd_obj is None:
-                return False
-
-            dom_control_raw = self.__read_eeprom_specific_bytes(
-                QSFP_CONTROL_OFFSET,
-                QSFP_CONTROL_WIDTH) if self.get_presence() else None
-            if dom_control_raw is not None:
-                dom_control_data = sfpd_obj.parse_control_bytes(
-                    dom_control_raw, 0)
-                power_override = (
-                    'On' == dom_control_data['data']['PowerOverride']['value'])
-
-            return power_override
-
-    def reset(self):
-        """
-        Reset SFP and return all user module settings to their default srate.
-        Returns:
-            A boolean, True if successful, False if not
-        """
-        # Check for invalid port_num
-        if self.port_num <= 48  or self.port_num >=57:
-            return False  # SFP doesn't support this feature
-
-        ret = self.__write_txt_file(
-            self.cpld_path + "module_reset_" + str(self.port_num), 1)
-        if ret is not True:
-            return ret
-
-        time.sleep(0.01)
-        ret = self.__write_txt_file(
-            self.cpld_path + "module_reset_" + str(self.port_num), 0)
-        time.sleep(0.2)
-        return ret
-
-    def tx_disable(self, tx_disable):
-        """
-        Disable SFP TX for all channels
-        Args:
-            tx_disable : A Boolean, True to enable tx_disable mode, False to disable
-                         tx_disable mode.
-        Returns:
-            A boolean, True if tx_disable is set successfully, False if not
-        """
-        if self.port_num <= 48  or self.port_num >=57:
-            ret = self.__write_txt_file(
-                self.cpld_path + "module_tx_disable_" + str(self.port_num), 1
-                if tx_disable else 0)
-            time.sleep(0.01)
-            return ret
-        else:
-            if not self.get_presence():
-                return False
-
-            sysfsfile_eeprom = None
-            try:
-                tx_disable_ctl = 0xf if tx_disable else 0x0
-                buffer = create_string_buffer(1)
-                if sys.version_info[0] >= 3:
-                    buffer[0] = tx_disable_ctl
-                else:
-                    buffer[0] = chr(tx_disable_ctl)
-                # Write to eeprom
-                sysfsfile_eeprom = open(
-                    self.port_to_eeprom_mapping[self.port_num], "r+b")
-                sysfsfile_eeprom.seek(QSFP_CONTROL_OFFSET)
-                sysfsfile_eeprom.write(buffer[0])
-            except IOError as e:
-                print("Error: unable to open file: %s" % str(e))
-                return False
-            finally:
-                if sysfsfile_eeprom is not None:
-                    sysfsfile_eeprom.close()
-                    time.sleep(0.01)
-        return True
-
-    def tx_disable_channel(self, channel, disable):
-        """
-        Sets the tx_disable for specified SFP channels
-        Args:
-            channel : A hex of 4 bits (bit 0 to bit 3) which represent channel 0 to 3,
-                      e.g. 0x5 for channel 0 and channel 2.
-            disable : A boolean, True to disable TX channels specified in channel,
-                      False to enable
-        Returns:
-            A boolean, True if successful, False if not
-        """
-
-        if self.port_num <= 48  or self.port_num >=57:
-            return False  # SFP doesn't support this feature
-        else:
-            if not self.get_presence():
-                return False
-
-            sysfsfile_eeprom = None
-            try:
-                channel_state = self.get_tx_disable_channel()
-
-                for i in range(4):
-                    channel_mask = (1 << i)
-                    if not (channel & channel_mask):
-                        continue
-
-                    if disable:
-                        channel_state |= channel_mask
-                    else:
-                        channel_state &= ~channel_mask
-
-                buffer = create_string_buffer(1)
-                if sys.version_info[0] >= 3:
-                    buffer[0] = channel_state
-                else:
-                    buffer[0] = chr(channel_state)
-                # Write to eeprom
-                sysfsfile_eeprom = open(
-                    self.port_to_eeprom_mapping[self.port_num], "r+b")
-                sysfsfile_eeprom.seek(QSFP_CONTROL_OFFSET)
-                sysfsfile_eeprom.write(buffer[0])
-            except IOError as e:
-                print("Error: unable to open file: %s" % str(e))
-                return False
-            finally:
-                if sysfsfile_eeprom is not None:
-                    sysfsfile_eeprom.close()
-                    time.sleep(0.01)
-            return True
-
-    def set_lpmode(self, lpmode):
-        """
-        Sets the lpmode (low power mode) of SFP
-        Args:
-            lpmode: A Boolean, True to enable lpmode, False to disable it
-            Note  : lpmode can be overridden by set_power_override
-        Returns:
-            A boolean, True if lpmode is set successfully, False if not
-        """
-        if self.port_num <= 48  or self.port_num >=57:
-            return False  # SFP doesn't support this feature
-
-        if lpmode:
-            return self.set_power_override(True, True)
-        else:
-            return self.set_power_override(True, False)
-
-    def set_power_override(self, power_override, power_set):
-        """
-        Sets SFP power level using power_override and power_set
-        Args:
-            power_override :
-                    A Boolean, True to override set_lpmode and use power_set
-                    to control SFP power, False to disable SFP power control
-                    through power_override/power_set and use set_lpmode
-                    to control SFP power.
-            power_set :
-                    Only valid when power_override is True.
-                    A Boolean, True to set SFP to low power mode, False to set
-                    SFP to high power mode.
-        Returns:
-            A boolean, True if power-override and power_set are set successfully,
-            False if not
-        """
-        if self.port_num <= 48  or self.port_num >=57:
-            return False  # SFP doesn't support this feature
-        else:
-            if not self.get_presence():
-                return False
-            try:
-                power_override_bit = (1 << 0) if power_override else 0
-                power_set_bit = (1 << 1) if power_set else (1 << 3)
-
-                buffer = create_string_buffer(1)
-                if sys.version_info[0] >= 3:
-                    buffer[0] = (power_override_bit | power_set_bit)
-                else:
-                    buffer[0] = chr(power_override_bit | power_set_bit)
-                # Write to eeprom
-                with open(self.port_to_eeprom_mapping[self.port_num],
-                          "r+b") as fd:
-                    fd.seek(QSFP_POWEROVERRIDE_OFFSET)
-                    fd.write(buffer[0])
-                    time.sleep(0.01)
-            except Exception:
-                print("Error: unable to open file: %s" % str(e))
-                return False
-            return True
-
-    def get_name(self):
-        """
-        Retrieves the name of the device
-            Returns:
-            string: The name of the device
-        """
-        sfputil_helper = SfpUtilHelper()
-        sfputil_helper.read_porttab_mappings(
-            self.__get_path_to_port_config_file())
-        name = sfputil_helper.logical[self.index] or "Unknown"
-        return name
-
-    def get_presence(self):
-        """
-        Retrieves the presence of the device
-        Returns:
-            bool: True if device is present, False if not
-        """
-        val = self.__read_txt_file(
-            self.cpld_path + "module_present_" + str(self.port_num))
-        return val == '1'
-
-    def get_status(self):
-        """
-        Retrieves the operational status of the device
-        Returns:
-            A boolean value, True if device is operating properly, False if not
-        """
-        return self.get_presence()
-
-    def get_position_in_parent(self):
-        """
-        Retrieves 1-based relative physical position in parent device. If the agent cannot determine the parent-relative position
-        for some reason, or if the associated value of entPhysicalContainedIn is '0', then the value '-1' is returned
-        Returns:
-            integer: The 1-based relative physical position in parent device or -1 if cannot determine the position
-        """
-        return self.port_num
-
-    def is_replaceable(self):
-        """
-        Indicate whether this device is replaceable.
-        Returns:
-            bool: True if it is replaceable.
-        """
-        return True
diff --git a/device/accton/x86_64-accton_as7326_56x-r0/sonic_platform/thermal.py b/device/accton/x86_64-accton_as7326_56x-r0/sonic_platform/thermal.py
deleted file mode 100644
index b2233e7b5..000000000
--- a/device/accton/x86_64-accton_as7326_56x-r0/sonic_platform/thermal.py
+++ /dev/null
@@ -1,232 +0,0 @@
-#############################################################################
-# Edgecore
-#
-# Thermal contains an implementation of SONiC Platform Base API and
-# provides the thermal device status which are available in the platform
-#
-#############################################################################
-
-import os
-import os.path
-import glob
-
-try:
-    from sonic_platform_base.thermal_base import ThermalBase
-except ImportError as e:
-    raise ImportError(str(e) + "- required module not found")
-
-PSU_I2C_PATH = "/sys/bus/i2c/devices/{}-00{}/"
-PSU_HWMON_I2C_MAPPING = {
-    0: {
-        "bus": 17,
-        "addr": "59"
-    },
-    1: {
-        "bus": 13,
-        "addr": "5b"
-    },
-}
-
-PSU_CPLD_I2C_MAPPING = {
-    0: {
-        "bus": 17,
-        "addr": "51"
-    },
-    1: {
-        "bus": 13,
-        "addr": "53"
-    },
-}
-
-
-class Thermal(ThermalBase):
-    """Platform-specific Thermal class"""
-
-    THERMAL_NAME_LIST = []
-    PSU_THERMAL_NAME_LIST = []
-    SYSFS_PATH = "/sys/bus/i2c/devices"
-
-    def __init__(self, thermal_index=0, is_psu=False, psu_index=0):
-        self.index = thermal_index
-        self.is_psu = is_psu
-        self.psu_index = psu_index
-
-        if self.is_psu:
-            psu_i2c_bus = PSU_HWMON_I2C_MAPPING[psu_index]["bus"]
-            psu_i2c_addr = PSU_HWMON_I2C_MAPPING[psu_index]["addr"]
-            self.psu_hwmon_path = PSU_I2C_PATH.format(psu_i2c_bus,
-                                                      psu_i2c_addr)
-            psu_i2c_bus = PSU_CPLD_I2C_MAPPING[psu_index]["bus"]
-            psu_i2c_addr = PSU_CPLD_I2C_MAPPING[psu_index]["addr"]
-            self.cpld_path = PSU_I2C_PATH.format(psu_i2c_bus, psu_i2c_addr)
-
-        # Add thermal name
-        self.THERMAL_NAME_LIST.append("Temp sensor 1")
-        self.THERMAL_NAME_LIST.append("Temp sensor 2")
-        self.THERMAL_NAME_LIST.append("Temp sensor 3")
-        self.THERMAL_NAME_LIST.append("Temp sensor 4")
-        self.PSU_THERMAL_NAME_LIST.append("PSU-1 temp sensor 1")
-        self.PSU_THERMAL_NAME_LIST.append("PSU-2 temp sensor 1")
-
-        # Set hwmon path
-        i2c_path = {
-            0: "15-0048/hwmon/hwmon*/",
-            1: "15-0049/hwmon/hwmon*/",
-            2: "15-004a/hwmon/hwmon*/",
-            3: "15-004b/hwmon/hwmon*/"
-        }.get(self.index, None)
-
-        self.hwmon_path = "{}/{}".format(self.SYSFS_PATH, i2c_path)
-        self.ss_key = self.THERMAL_NAME_LIST[self.index]
-        self.ss_index = 1
-
-    def __read_txt_file(self, file_path):
-        for filename in glob.glob(file_path):
-            try:
-                with open(filename, 'r') as fd:
-                    return fd.readline().rstrip()
-            except IOError as e:
-                pass
-
-    def __get_temp(self, temp_file):
-        if not self.is_psu:
-            temp_file_path = os.path.join(self.hwmon_path, temp_file)
-        else:
-            temp_file_path = temp_file
-
-        raw_temp = self.__read_txt_file(temp_file_path)
-        return float(raw_temp) / 1000
-
-    def __set_threshold(self, file_name, temperature):
-        if self.is_psu:
-            return True
-
-        temp_file_path = os.path.join(self.hwmon_path, file_name)
-        try:
-            with open(temp_file_path, 'w') as fd:
-                fd.write(str(temperature))
-            return True
-        except IOError:
-            return False
-
-    def get_temperature(self):
-        """
-        Retrieves current temperature reading from thermal
-        Returns:
-            A float number of current temperature in Celsius up to nearest thousandth
-            of one degree Celsius, e.g. 30.125
-        """
-        if not self.is_psu:
-            temp_file = "temp{}_input".format(self.ss_index)
-        else:
-            temp_file = self.psu_hwmon_path + "psu_temp1_input"
-
-        return self.__get_temp(temp_file)
-
-    def get_high_threshold(self):
-        """
-        Retrieves the high threshold temperature of thermal
-        Returns:
-            A float number, the high threshold temperature of thermal in Celsius
-            up to nearest thousandth of one degree Celsius, e.g. 30.125
-        """
-        if self.is_psu:
-            return 0
-
-        temp_file = "temp{}_max".format(self.ss_index)
-        return self.__get_temp(temp_file)
-
-    def set_high_threshold(self, temperature):
-        """
-        Sets the high threshold temperature of thermal
-        Args :
-            temperature: A float number up to nearest thousandth of one degree Celsius,
-            e.g. 30.125
-        Returns:
-            A boolean, True if threshold is set successfully, False if not
-        """
-        temp_file = "temp{}_max".format(self.ss_index)
-        temperature = temperature *1000
-        self.__set_threshold(temp_file, temperature)
-
-        return True
-
-    def get_name(self):
-        """
-        Retrieves the name of the thermal device
-            Returns:
-            string: The name of the thermal device
-        """
-        if self.is_psu:
-            return self.PSU_THERMAL_NAME_LIST[self.psu_index]
-        else:
-            return self.THERMAL_NAME_LIST[self.index]
-
-    def get_presence(self):
-        """
-        Retrieves the presence of the PSU
-        Returns:
-            bool: True if PSU is present, False if not
-        """
-        if self.is_psu:
-            val = self.__read_txt_file(self.cpld_path + "psu_present")
-            return int(val, 10) == 1
-
-        temp_file = "temp{}_input".format(self.ss_index)
-        temp_file_path = os.path.join(self.hwmon_path, temp_file)
-        raw_txt = self.__read_txt_file(temp_file_path)
-        return raw_txt != None
-
-    def get_status(self):
-        """
-        Retrieves the operational status of the device
-        Returns:
-            A boolean value, True if device is operating properly, False if not
-        """
-        if self.is_psu:
-            temp_file = self.psu_hwmon_path + "psu_temp_fault"
-            return self.get_presence() and (not int(
-                self.__read_txt_file(temp_file)))
-
-        file_str = "temp{}_input".format(self.ss_index)
-        file_path = os.path.join(self.hwmon_path, file_str)
-
-        raw_txt = self.__read_txt_file(file_path)
-        if raw_txt is None:
-            return False
-        else:
-            return int(raw_txt) != 0
-
-    def get_model(self):
-        """
-        Retrieves the model number (or part number) of the device
-        Returns:
-            string: Model/part number of device
-        """
-
-        return "N/A"
-
-    def get_serial(self):
-        """
-        Retrieves the serial number of the device
-        Returns:
-            string: Serial number of device
-        """
-        return "N/A"
-
-    def get_position_in_parent(self):
-        """
-        Retrieves 1-based relative physical position in parent device. If the agent cannot determine the parent-relative position
-        for some reason, or if the associated value of entPhysicalContainedIn is '0', then the value '-1' is returned
-        Returns:
-            integer: The 1-based relative physical position in parent device or -1 if cannot determine the position
-        """
-        return self.index+1
-
-    def is_replaceable(self):
-        """
-        Retrieves whether thermal module is replaceable
-        Returns:
-            A boolean value, True if replaceable, False if not
-        """
-        return False
diff --git a/platform/broadcom/sonic-platform-modules-accton/as7326-56x/sonic_platform/chassis.py b/platform/broadcom/sonic-platform-modules-accton/as7326-56x/sonic_platform/chassis.py
index feb1fbdb5..c579b219c 100644
--- a/platform/broadcom/sonic-platform-modules-accton/as7326-56x/sonic_platform/chassis.py
+++ b/platform/broadcom/sonic-platform-modules-accton/as7326-56x/sonic_platform/chassis.py
@@ -8,58 +8,58 @@
 
 try:
     import sys
-    import time
     from sonic_platform_pddf_base.pddf_chassis import PddfChassis
+    from .event import SfpEvent
+    from .helper import APIHelper
 except ImportError as e:
     raise ImportError(str(e) + "- required module not found")
 
+NUM_COMPONENT = 6
+HOST_REBOOT_CAUSE_PATH = "/host/reboot-cause/"
+PMON_REBOOT_CAUSE_PATH = "/usr/share/sonic/platform/api_files/reboot-cause/"
+REBOOT_CAUSE_FILE = "reboot-cause.txt"
 
 class Chassis(PddfChassis):
     """
     PDDF Platform-specific Chassis class
     """
 
+    SYSLED_DEV_NAME = "DIAG_LED"
     def __init__(self, pddf_data=None, pddf_plugin_data=None):
         PddfChassis.__init__(self, pddf_data, pddf_plugin_data)
+        self.__initialize_components()
+        self._api_helper = APIHelper()
+        self._sfpevent = SfpEvent(self.get_all_sfps())
+
+    def __initialize_components(self):
+        from sonic_platform.component import Component
+        for index in range(NUM_COMPONENT):
+            component = Component(index)
+            self._component_list.append(component)
 
     # Provide the functions/variables below for which implementation is to be overwritten
-    sfp_change_event_data = {'valid': 0, 'last': 0, 'present': 0}
-    def get_change_event(self, timeout=2000):
-        now = time.time()
-        port_dict = {}
-        change_dict = {}
-        change_dict['sfp'] = port_dict
-
-        if timeout < 1000:
-            timeout = 1000
-        timeout = timeout / float(1000)  # Convert to secs
-
-        if now < (self.sfp_change_event_data['last'] + timeout) and self.sfp_change_event_data['valid']:
-            return True, change_dict
-
-        bitmap = 0
-        for i in range(58):
-            modpres = self.get_sfp(i+1).get_presence()
-            if modpres:
-                bitmap = bitmap | (1 << i)
-
-        changed_ports = self.sfp_change_event_data['present'] ^ bitmap
-        if changed_ports:
-            for i in range(58):
-                if (changed_ports & (1 << i)):
-                    if (bitmap & (1 << i)) == 0:
-                        port_dict[i+1] = '0'
-                    else:
-                        port_dict[i+1] = '1'
-
-
-            # Update teh cache dict
-            self.sfp_change_event_data['present'] = bitmap
-            self.sfp_change_event_data['last'] = now
-            self.sfp_change_event_data['valid'] = 1
-            return True, change_dict
-        else:
-            return True, change_dict
+    def get_change_event(self, timeout=0):
+        return self._sfpevent.get_sfp_event(timeout)
+
+    def get_reboot_cause(self):
+        """
+        Retrieves the cause of the previous reboot
+
+        Returns:
+            A tuple (string, string) where the first element is a string
+            containing the cause of the previous reboot. This string must be
+            one of the predefined strings in this class. If the first string
+            is "REBOOT_CAUSE_HARDWARE_OTHER", the second string can be used
+            to pass a description of the reboot cause.
+        """
+
+        reboot_cause_path = (HOST_REBOOT_CAUSE_PATH + REBOOT_CAUSE_FILE)
+        sw_reboot_cause = self._api_helper.read_txt_file(
+            reboot_cause_path) or "Unknown"
+
+
+        return ('REBOOT_CAUSE_NON_HARDWARE', sw_reboot_cause)
+
 
     def get_sfp(self, index):
         """
@@ -83,3 +83,21 @@ def get_sfp(self, index):
             sys.stderr.write("SFP index {} out of range (1-{})\n".format(
                              index, len(self._sfp_list)))
         return sfp
+    
+    def initizalize_system_led(self):
+        return
+
+    def get_status_led(self):
+        return self.get_system_led(self.SYSLED_DEV_NAME)
+
+    def set_status_led(self, color):
+        return self.set_system_led(self.SYSLED_DEV_NAME, color)
+
+    def get_port_or_cage_type(self, port):
+        from sonic_platform_base.sfp_base import SfpBase
+        if port in range(1, 49):
+            return SfpBase.SFP_PORT_TYPE_BIT_SFP | SfpBase.SFP_PORT_TYPE_BIT_SFP_PLUS | SfpBase.SFP_PORT_TYPE_BIT_SFP28
+        elif port in range(49, 57):
+            return SfpBase.SFP_PORT_TYPE_BIT_QSFP | SfpBase.SFP_PORT_TYPE_BIT_QSFP_PLUS | SfpBase.SFP_PORT_TYPE_BIT_QSFP28
+        else:
+            return SfpBase.SFP_PORT_TYPE_BIT_SFP
diff --git a/device/accton/x86_64-accton_as7326_56x-r0/sonic_platform/component.py b/platform/broadcom/sonic-platform-modules-accton/as7326-56x/sonic_platform/component.py
similarity index 79%
rename from device/accton/x86_64-accton_as7326_56x-r0/sonic_platform/component.py
rename to platform/broadcom/sonic-platform-modules-accton/as7326-56x/sonic_platform/component.py
index 75c2d3b91..8feb4f1c0 100644
--- a/device/accton/x86_64-accton_as7326_56x-r0/sonic_platform/component.py
+++ b/platform/broadcom/sonic-platform-modules-accton/as7326-56x/sonic_platform/component.py
@@ -1,36 +1,41 @@
 #############################################################################
-# Edgecore
-#
+# 
 # Component contains an implementation of SONiC Platform Base API and
 # provides the components firmware management function
 #
 #############################################################################
 
 try:
+    import subprocess
     from sonic_platform_base.component_base import ComponentBase
 except ImportError as e:
     raise ImportError(str(e) + "- required module not found")
 
 CPLD_ADDR_MAPPING = {
-    "CPLD-1": "18-0060",
-    "CPLD-2": "12-0062",
-    "CPLD-3": "19-0064",
+    "MB_CPLD1": ['18', '0x60'],
+    "MB_CPLD2": ['12', '0x62'],
+    "MB_CPLD3": ['19', '0x64'],
+    "FAN_CPLD": ['11', '0x66'],
+    "CPU_CPLD": ['0',  '0x65']
 }
 SYSFS_PATH = "/sys/bus/i2c/devices/"
 BIOS_VERSION_PATH = "/sys/class/dmi/id/bios_version"
-COMPONENT_NAME_LIST = ["CPLD-1", "CPLD-2", "CPLD-3", "BIOS"]
-COMPONENT_DES_LIST = [
-    "CPLD-1", "CPLD-2", "CPLD-3", "Basic Input/Output System"
+COMPONENT_LIST= [
+   ("MB_CPLD1", "Mainboard CPLD(0x60)"),
+   ("MB_CPLD2", "Mainboard CPLD(0x62)"),
+   ("MB_CPLD3", "Mainboard CPLD(0x64)"),
+   ("FAN_CPLD", "Fan board CPLD(0x66)"),
+   ("CPU_CPLD", "CPU CPLD(0x65)"),
+   ("BIOS", "Basic Input/Output System")
+   
 ]
 
-
 class Component(ComponentBase):
     """Platform-specific Component class"""
 
     DEVICE_TYPE = "component"
 
     def __init__(self, component_index=0):
-        ComponentBase.__init__(self)
         self.index = component_index
         self.name = self.get_name()
 
@@ -42,26 +47,16 @@ def __get_bios_version(self):
                 return bios_version.strip()
         except Exception as e:
             return None
-
-    def __get_sysfs_value(self, addr, name):
-        # Retrieves the cpld register value
-        try:
-            with open(SYSFS_PATH + addr + '/' + name, 'r') as fd:
-                return fd.read().strip()
-        except Exception as e:
-            return None
-
+   
     def __get_cpld_version(self):
         # Retrieves the CPLD firmware version
         cpld_version = dict()
         for cpld_name in CPLD_ADDR_MAPPING:
-            try:
-                cpld_addr = CPLD_ADDR_MAPPING[cpld_name]
-                cpld_version_raw = self.__get_sysfs_value(cpld_addr, "version")
-                cpld_version[cpld_name] = "{}".format(
-                    int(cpld_version_raw, 16))
-            except Exception as e:
-                cpld_version[cpld_name] = 'None'
+            cmd = "i2cget -f -y {0} {1} 0x1".format(CPLD_ADDR_MAPPING[cpld_name][0], CPLD_ADDR_MAPPING[cpld_name][1])
+            status, value = subprocess.getstatusoutput(cmd)
+            if not status:
+                cpld_version_raw = value.rstrip()
+                cpld_version[cpld_name] = "{}".format(int(cpld_version_raw,16))
 
         return cpld_version
 
@@ -71,7 +66,7 @@ def get_name(self):
          Returns:
             A string containing the name of the component
         """
-        return COMPONENT_NAME_LIST[self.index]
+        return COMPONENT_LIST[self.index][0]
 
     def get_description(self):
         """
@@ -79,7 +74,7 @@ def get_description(self):
             Returns:
             A string containing the description of the component
         """
-        return COMPONENT_DES_LIST[self.index]
+        return COMPONENT_LIST[self.index][1]
 
     def get_firmware_version(self):
         """
diff --git a/platform/broadcom/sonic-platform-modules-accton/as7326-56x/sonic_platform/eeprom.py b/platform/broadcom/sonic-platform-modules-accton/as7326-56x/sonic_platform/eeprom.py
index a87ecc9f6..ca9b5ce06 100644
--- a/platform/broadcom/sonic-platform-modules-accton/as7326-56x/sonic_platform/eeprom.py
+++ b/platform/broadcom/sonic-platform-modules-accton/as7326-56x/sonic_platform/eeprom.py
@@ -2,13 +2,87 @@
 
 try:
     from sonic_platform_pddf_base.pddf_eeprom import PddfEeprom
+    import os
 except ImportError as e:
     raise ImportError(str(e) + "- required module not found")
 
+CACHE_ROOT = '/var/cache/sonic/decode-syseeprom'
+CACHE_FILE = 'syseeprom_cache'
 
 class Eeprom(PddfEeprom):
+    _TLV_INFO_MAX_LEN = 256
+    pddf_obj = {}
+    plugin_data = {}
 
     def __init__(self, pddf_data=None, pddf_plugin_data=None):
-        PddfEeprom.__init__(self, pddf_data, pddf_plugin_data)
+        #PddfEeprom.__init__(self, pddf_data, pddf_plugin_data)
+        if not pddf_data or not pddf_plugin_data:
+            raise ValueError('PDDF JSON data error')
+
+        self.pddf_obj = pddf_data
+        self.plugin_data = pddf_plugin_data
+
+        # system EEPROM always has device name EEPROM1
+        self.eeprom_path = self.pddf_obj.get_path("EEPROM1", "eeprom")
+        if self.eeprom_path is None:
+            return
+
+        super(PddfEeprom, self).__init__(self.eeprom_path, 0, '', True)
+        self.eeprom_tlv_dict = dict()
+
+        # Create the cache directory if not created
+        if not os.path.exists(CACHE_ROOT):
+            try:
+                os.makedirs(CACHE_ROOT)
+            except Exception as e:
+                print("Error in creating Eeprom cache directory - {}".format(str(e)))
+
+        # Assign cache_name in eeprom_base.py
+        try:
+            self.set_cache_name(os.path.join(CACHE_ROOT, CACHE_FILE))
+        except:
+            pass
+
+        try:
+            self.eeprom_data = self.read_eeprom()
+        except Exception as e:
+            self.eeprom_data = "N/A"
+            raise RuntimeError("Eeprom is not Programmed - Error: {}".format(str(e)))
+        else:
+            eeprom = self.eeprom_data
+
+            try:
+                self.update_cache(eeprom)
+            except:
+                pass
+
+            if not self.is_valid_tlvinfo_header(eeprom):
+                return
+
+            total_length = ((eeprom[9]) << 8) | (eeprom[10])
+            tlv_index = self._TLV_INFO_HDR_LEN
+            tlv_end = self._TLV_INFO_HDR_LEN + total_length
+
+            while (tlv_index + 2) < len(eeprom) and tlv_index < tlv_end:
+                if not self.is_valid_tlv(eeprom[tlv_index:]):
+                    break
+
+                tlv = eeprom[tlv_index:tlv_index + 2
+                             + (eeprom[tlv_index + 1])]
+                code = "0x%02X" % ((tlv[0]))
+
+                if (tlv[0]) == self._TLV_CODE_VENDOR_EXT:
+                    value = str(((tlv[2]) << 24) | ((tlv[3]) << 16) |
+                                ((tlv[4]) << 8) | (tlv[5]))
+                    value += str(tlv[6:6 + (tlv[1])])
+                else:
+                    name, value = self.decoder(None, tlv)
+
+                self.eeprom_tlv_dict[code] = value
+                if (eeprom[tlv_index]) == self._TLV_CODE_CRC_32:
+                    break
+
+                tlv_index += (eeprom[tlv_index+1]) + 2
+
 
     # Provide the functions/variables below for which implementation is to be overwritten
diff --git a/device/accton/x86_64-accton_as7326_56x-r0/sonic_platform/event.py b/platform/broadcom/sonic-platform-modules-accton/as7326-56x/sonic_platform/event.py
similarity index 94%
rename from device/accton/x86_64-accton_as7326_56x-r0/sonic_platform/event.py
rename to platform/broadcom/sonic-platform-modules-accton/as7326-56x/sonic_platform/event.py
index 3d6f81518..d5dac6d7f 100644
--- a/device/accton/x86_64-accton_as7326_56x-r0/sonic_platform/event.py
+++ b/platform/broadcom/sonic-platform-modules-accton/as7326-56x/sonic_platform/event.py
@@ -18,7 +18,7 @@ def get_presence_bitmap(self):
         bitmap = 0
         for sfp in self._sfp_list:
             modpres = sfp.get_presence()
-            i=sfp.port_num-1
+            i=sfp.get_position_in_parent() - 1
             if modpres:
                 bitmap = bitmap | (1 << i)
         return bitmap
@@ -45,7 +45,7 @@ def get_sfp_event(self, timeout=2000):
 
         if changed_ports != 0:
             for sfp in self._sfp_list:
-                i=sfp.port_num-1
+                i=sfp.get_position_in_parent() - 1
                 if (changed_ports & (1 << i)):
                     if (bitmap & (1 << i)) == 0:
                         port_dict[i+1] = '0'
diff --git a/platform/broadcom/sonic-platform-modules-accton/as7326-56x/sonic_platform/fan.py b/platform/broadcom/sonic-platform-modules-accton/as7326-56x/sonic_platform/fan.py
index 23d8be5a8..4e70b961b 100644
--- a/platform/broadcom/sonic-platform-modules-accton/as7326-56x/sonic_platform/fan.py
+++ b/platform/broadcom/sonic-platform-modules-accton/as7326-56x/sonic_platform/fan.py
@@ -6,6 +6,9 @@
 except ImportError as e:
     raise ImportError(str(e) + "- required module not found")
 
+FAN_NAME_LIST = ["FAN-1F", "FAN-1R", "FAN-2F", "FAN-2R",
+                 "FAN-3F", "FAN-3R", "FAN-4F", "FAN-4R",
+                 "FAN-5F", "FAN-5R", "FAN-6F", "FAN-6R"]
 
 class Fan(PddfFan):
     """PDDF Platform-Specific Fan class"""
@@ -15,5 +18,35 @@ def __init__(self, tray_idx, fan_idx=0, pddf_data=None, pddf_plugin_data=None, i
         PddfFan.__init__(self, tray_idx, fan_idx, pddf_data, pddf_plugin_data, is_psu_fan, psu_index)
 
     # Provide the functions/variables below for which implementation is to be overwritten
-    # Since AS4630 psu_fan airflow direction cant be read from sysfs, it is fixed as 'F2B' or 'intake'
 
+    def get_name(self):
+        """
+        Retrieves the name of the device
+            Returns:
+            string: The name of the device
+        """
+        fan_name = FAN_NAME_LIST[(self.fantray_index-1)*2 + self.fan_index-1] \
+            if not self.is_psu_fan \
+            else "PSU-{} FAN-{}".format(self.fans_psu_index, self.fan_index)
+
+        return fan_name
+
+
+
+
+    def get_model(self):
+        """
+        Retrieves the model number (or part number) of the device
+        Returns:
+            string: Model/part number of device
+        """
+
+        return "N/A"
+
+    def get_serial(self):
+        """
+        Retrieves the serial number of the device
+        Returns:
+            string: Serial number of device
+        """
+        return "N/A"
diff --git a/platform/broadcom/sonic-platform-modules-accton/as7326-56x/sonic_platform/fan_drawer.py b/platform/broadcom/sonic-platform-modules-accton/as7326-56x/sonic_platform/fan_drawer.py
index 3b9bb607f..f1e5c6edb 100644
--- a/platform/broadcom/sonic-platform-modules-accton/as7326-56x/sonic_platform/fan_drawer.py
+++ b/platform/broadcom/sonic-platform-modules-accton/as7326-56x/sonic_platform/fan_drawer.py
@@ -15,3 +15,28 @@ def __init__(self, tray_idx, pddf_data=None, pddf_plugin_data=None):
         PddfFanDrawer.__init__(self, tray_idx, pddf_data, pddf_plugin_data)
 
     # Provide the functions/variables below for which implementation is to be overwritten
+
+    def get_name(self):
+        """
+        Retrieves the fan drawer name
+        Returns:
+            string: The name of the device
+        """
+        return "FanTray{}".format(self.fantray_index)
+
+    def get_model(self):
+        """
+        Retrieves the model number (or part number) of the device
+        Returns:
+            string: Model/part number of device
+        """
+        return self._fan_list[0].get_model()
+
+    def get_serial(self):
+        """
+        Retrieves the serial number of the device
+        Returns:
+            string: Serial number of device
+        """
+        return self._fan_list[0].get_serial()
+
diff --git a/platform/broadcom/sonic-platform-modules-accton/as7326-56x/sonic_platform/helper.py b/platform/broadcom/sonic-platform-modules-accton/as7326-56x/sonic_platform/helper.py
new file mode 100644
index 000000000..09c2af7a8
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-accton/as7326-56x/sonic_platform/helper.py
@@ -0,0 +1,53 @@
+import os
+import struct
+import subprocess
+from mmap import *
+from sonic_py_common import device_info
+
+HOST_CHK_CMD = ["docker"]
+EMPTY_STRING = ""
+
+
+class APIHelper():
+
+    def __init__(self):
+        (self.platform, self.hwsku) = device_info.get_platform_and_hwsku()
+
+    def is_host(self):
+        try:
+            status, output = getstatusoutput_noshell(HOST_CHK_CMD)
+            return status == 0
+        except Exception:
+            return False
+
+    def pci_get_value(self, resource, offset):
+        status = True
+        result = ""
+        try:
+            fd = os.open(resource, os.O_RDWR)
+            mm = mmap(fd, 0)
+            mm.seek(int(offset))
+            read_data_stream = mm.read(4)
+            result = struct.unpack('I', read_data_stream)
+        except Exception:
+            status = False
+        return status, result
+
+    def read_txt_file(self, file_path):
+        try:
+            with open(file_path, 'r', errors='replace') as fd:
+                data = fd.read()
+                ret =  data.strip()
+                if len(ret) > 0:
+                    return ret
+        except IOError:
+            pass
+        return None
+
+    def write_txt_file(self, file_path, value):
+        try:
+            with open(file_path, 'w') as fd:
+                fd.write(str(value))
+        except IOError:
+            return False
+        return True
diff --git a/device/accton/x86_64-accton_as7326_56x-r0/sonic_platform/platform.py b/platform/broadcom/sonic-platform-modules-accton/as7326-56x/sonic_platform/pcie.py
similarity index 51%
rename from device/accton/x86_64-accton_as7326_56x-r0/sonic_platform/platform.py
rename to platform/broadcom/sonic-platform-modules-accton/as7326-56x/sonic_platform/pcie.py
index 2f2c2a447..e4da32adf 100644
--- a/device/accton/x86_64-accton_as7326_56x-r0/sonic_platform/platform.py
+++ b/platform/broadcom/sonic-platform-modules-accton/as7326-56x/sonic_platform/pcie.py
@@ -2,20 +2,18 @@
 # Edgecore
 #
 # Module contains an implementation of SONiC Platform Base API and
-# provides the platform information
-#
+# provides the fan status which are available in the platform
+# Base PCIe class
 #############################################################################
 
 try:
-    from sonic_platform_base.platform_base import PlatformBase
-    from sonic_platform.chassis import Chassis
+    from sonic_platform_base.sonic_pcie.pcie_common import PcieUtil
 except ImportError as e:
     raise ImportError(str(e) + "- required module not found")
 
 
-class Platform(PlatformBase):
-    """Platform-specific Platform class"""
+class Pcie(PcieUtil):
+    """Edgecore Platform-specific PCIe class"""
 
-    def __init__(self):
-        PlatformBase.__init__(self)
-        self._chassis = Chassis()
+    def __init__(self, platform_path):
+        PcieUtil.__init__(self, platform_path)
diff --git a/platform/broadcom/sonic-platform-modules-accton/as7326-56x/sonic_platform/psu.py b/platform/broadcom/sonic-platform-modules-accton/as7326-56x/sonic_platform/psu.py
index 1b260fcca..f39fde167 100644
--- a/platform/broadcom/sonic-platform-modules-accton/as7326-56x/sonic_platform/psu.py
+++ b/platform/broadcom/sonic-platform-modules-accton/as7326-56x/sonic_platform/psu.py
@@ -26,6 +26,15 @@ def get_maximum_supplied_power(self):
         """
         return float(self.PLATFORM_PSU_CAPACITY)
 
+    def get_capacity(self):
+        """
+        Gets the capacity (maximum output power) of the PSU in watts
+
+        Returns:
+            An integer, the capacity of PSU
+        """
+        return (self.PLATFORM_PSU_CAPACITY)
+
     def get_type(self):
         """
         Gets the type of the PSU
@@ -33,3 +42,6 @@ def get_type(self):
         A string, the type of PSU (AC/DC)
         """
         return "DC"
+
+    def get_name(self):
+        return "PSU-{}".format(self.psu_index)
diff --git a/platform/broadcom/sonic-platform-modules-accton/as7326-56x/sonic_platform/sfp.py b/platform/broadcom/sonic-platform-modules-accton/as7326-56x/sonic_platform/sfp.py
index d9b6e491b..56de2221f 100644
--- a/platform/broadcom/sonic-platform-modules-accton/as7326-56x/sonic_platform/sfp.py
+++ b/platform/broadcom/sonic-platform-modules-accton/as7326-56x/sonic_platform/sfp.py
@@ -1,7 +1,10 @@
 #!/usr/bin/env python
 
 try:
+    import natsort
     from sonic_platform_pddf_base.pddf_sfp import PddfSfp
+    from sonic_platform_base.sonic_sfp.sfputilhelper import SfpUtilHelper
+    from sonic_py_common import device_info
 except ImportError as e:
     raise ImportError (str(e) + "- required module not found")
 
@@ -15,3 +18,38 @@ def __init__(self, index, pddf_data=None, pddf_plugin_data=None):
         PddfSfp.__init__(self, index, pddf_data, pddf_plugin_data)
 
     # Provide the functions/variables below for which implementation is to be overwritten
+    def __get_path_to_port_config_file(self):
+        platform, hwsku = device_info.get_platform_and_hwsku()
+        hwsku_path = "/".join(["/usr/share/sonic/platform",hwsku])
+        return "/".join([hwsku_path, "port_config.ini"])
+
+    def get_name(self):
+        """
+        Retrieves the name of the device
+            Returns:
+            string: The name of the device
+        """                
+        sfputil_helper = SfpUtilHelper()
+        sfputil_helper.read_porttab_mappings(
+            self.__get_path_to_port_config_file())
+
+        logical_port_list = sfputil_helper.logical
+        logical_port_list = natsort.natsorted(logical_port_list)
+        name = logical_port_list[self.port_index-1] or "Unknown"
+
+        return name
+
+    def get_position_in_parent(self):
+        """Retrieves 1-based relative physical position in parent device."""
+        return self.port_index
+
+    def get_error_description(self):
+        """
+        Retrives the error descriptions of the SFP module
+
+        Returns:
+            String that represents the current error descriptions of vendor specific errors
+            In case there are multiple errors, they should be joined by '|',
+            like: "Bad EEPROM|Unsupported cable"
+        """
+        raise NotImplementedError
diff --git a/platform/broadcom/sonic-platform-modules-accton/as7326-56x/sonic_platform/thermal.py b/platform/broadcom/sonic-platform-modules-accton/as7326-56x/sonic_platform/thermal.py
index 77d6ec7ae..90517ba98 100644
--- a/platform/broadcom/sonic-platform-modules-accton/as7326-56x/sonic_platform/thermal.py
+++ b/platform/broadcom/sonic-platform-modules-accton/as7326-56x/sonic_platform/thermal.py
@@ -13,5 +13,25 @@ class Thermal(PddfThermal):
 
     def __init__(self, index, pddf_data=None, pddf_plugin_data=None, is_psu_thermal=False, psu_index=0):
         PddfThermal.__init__(self, index, pddf_data, pddf_plugin_data, is_psu_thermal, psu_index)
+        
+        self.pddf_obj = pddf_data
+        self.thermal_obj_name = "TEMP{}".format(self.thermal_index)
+        self.thermal_obj = self.pddf_obj.data[self.thermal_obj_name]
 
     # Provide the functions/variables below for which implementation is to be overwritten
+    def get_name(self):
+        if self.is_psu_thermal:
+            return "PSU-{0} temp sensor 1".format(self.thermals_psu_index)
+        else:
+            if 'dev_attr' in self.thermal_obj.keys():
+                if 'display_name' in self.thermal_obj['dev_attr']:
+                    return str(self.thermal_obj['dev_attr']['display_name'])
+
+            # In case of errors
+            return "Temp sensor {0}".format(self.thermal_index)
+
+    def get_status(self):
+        get_temp=self.get_temperature()
+
+        if get_temp is not None:
+            return True if get_temp else False
diff --git a/platform/broadcom/sonic-platform-modules-accton/as7326-56x/utils/accton_as7326_pddf_monitor.py b/platform/broadcom/sonic-platform-modules-accton/as7326-56x/utils/accton_as7326_pddf_monitor.py
index 7f3add4e4..0db5471b0 100755
--- a/platform/broadcom/sonic-platform-modules-accton/as7326-56x/utils/accton_as7326_pddf_monitor.py
+++ b/platform/broadcom/sonic-platform-modules-accton/as7326-56x/utils/accton_as7326_pddf_monitor.py
@@ -30,6 +30,7 @@
     import logging.handlers
     import time
     from sonic_platform import platform
+    from sonic_py_common.general import getstatusoutput_noshell
 except ImportError as e:
     raise ImportError('%s - required module not found' % str(e))
 
@@ -294,15 +295,46 @@ def main(argv):
 
     global platform_chassis
     platform_chassis = platform.Platform().get_chassis()
+    #cmd_str = ["i2cset", "-y", "-f", "11", "0x66", "0x33", "0x0"]
+    #status, output = getstatusoutput_noshell(cmd_str)
+    #if status:
+    #    print("Warning: Fan speed watchdog could not be disabled")
+
+    cmd_str = ["i2cset", "-y", "-f", "11", "0x66", "0x33", "0x1"]
+    status, output = getstatusoutput_noshell(cmd_str)
+    if status:
+        print("Warning: Fan speed watchdog could not be enabled")   
+
+    #Timer need to be set after enable.
+    #if set timer is eralier than enable wdt. Speed will become to wdt speed after 6sec. 
+    cmd_str = ["i2cset", "-y", "-f", "11", "0x66", "0x31", "0xF0"]
+    status, output = getstatusoutput_noshell(cmd_str)
+    if status:
+        print("Warning: Fan speed watchdog timer could not be disabled")
 
     platform_chassis.get_fan(0).set_speed(38)
 
     print("set default fan speed to 37.5%")
     monitor = device_monitor(log_file, log_level)
+   
+    cmd_kick = ["i2cset", "-y", "-f", "11", "0x66", "0x31", "0xF0"] #kick WDT
+    cmd_check_wdt = ["i2cget",  "-y", "-f", "11", "0x66", "0x33"]
 
     while True:
         monitor.manage_fans()
+        getstatusoutput_noshell(cmd_kick)
         time.sleep(5)
+        #polling to check fan-wdt status
+        status, output = getstatusoutput_noshell(cmd_check_wdt)
+        if status is not None:
+            val= int(output,16)
+            if (val & 0x1) == 0:
+                logging.warning('Detect Fan-WDT disable')
+                logging.warning('Try to enable Fan-WDT')
+                cmd_str = ["i2cset", "-y", "-f", "11", "0x66", "0x33", "0x1"]
+                getstatusoutput_noshell(cmd_str)
+                cmd_str = ["i2cset", "-y", "-f", "11", "0x66", "0x31", "0xF0"]
+                getstatusoutput_noshell(cmd_str)
 
 
 if __name__ == '__main__':
diff --git a/platform/broadcom/sonic-platform-modules-accton/as7326-56x/utils/pddf_post_device_create.sh b/platform/broadcom/sonic-platform-modules-accton/as7326-56x/utils/pddf_post_device_create.sh
deleted file mode 100755
index bfa545595..000000000
--- a/platform/broadcom/sonic-platform-modules-accton/as7326-56x/utils/pddf_post_device_create.sh
+++ /dev/null
@@ -1,12 +0,0 @@
-#!/bin/bash
-
-set_pca_mux_idle_disconnect()
-{
-    echo -2 | tee /sys/bus/i2c/drivers/pca954x/*-00*/idle_state >& /dev/null
-    if [ $? -ne 0 ]; then
-        echo Fail to set pca954x mux idle disconnect
-        exit 2
-    fi
-}
-
-set_pca_mux_idle_disconnect

From 8f039ce3b7a7fd8b7bfe7616306204a74cec96c6 Mon Sep 17 00:00:00 2001
From: jostar-yang <jostar_yang@edge-core.com>
Date: Fri, 17 Feb 2023 14:59:29 +0800
Subject: [PATCH 1102/1115] Modify devices_to_ignore to psu_fan speed

---
 .../system_health_monitoring_config.json                    | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/device/accton/x86_64-accton_as7326_56x-r0/system_health_monitoring_config.json b/device/accton/x86_64-accton_as7326_56x-r0/system_health_monitoring_config.json
index 18d47b22a..d68bae87a 100644
--- a/device/accton/x86_64-accton_as7326_56x-r0/system_health_monitoring_config.json
+++ b/device/accton/x86_64-accton_as7326_56x-r0/system_health_monitoring_config.json
@@ -2,8 +2,10 @@
     "services_to_ignore": [],
     "devices_to_ignore": [
         "asic",
-        "psu.temperature"
-
+        "psu.voltage",
+        "psu.temperature",
+        "PSU-1 FAN-1.speed",
+        "PSU-2 FAN-1.speed"
     ],
     "user_defined_checkers": [],
     "polling_interval": 60,

From 2406983c8220d1ce77f91177d789802827233a99 Mon Sep 17 00:00:00 2001
From: jostar-yang <jostar_yang@edge-core.com>
Date: Tue, 21 Feb 2023 14:01:27 +0800
Subject: [PATCH 1103/1115] Add psu_fan target speed api

---
 .../pddf/pddf-device.json                     | 18 +++++++++++-
 .../x86_64-accton_as7326_56x-r0/platform.json |  2 +-
 .../system_health_monitoring_config.json      |  4 +--
 .../as7326-56x/sonic_platform/chassis.py      | 29 +++++++++++++++++++
 .../as7326-56x/sonic_platform/fan.py          | 13 +++++++++
 5 files changed, 61 insertions(+), 5 deletions(-)

diff --git a/device/accton/x86_64-accton_as7326_56x-r0/pddf/pddf-device.json b/device/accton/x86_64-accton_as7326_56x-r0/pddf/pddf-device.json
index 3cb36d423..94065e4d0 100644
--- a/device/accton/x86_64-accton_as7326_56x-r0/pddf/pddf-device.json
+++ b/device/accton/x86_64-accton_as7326_56x-r0/pddf/pddf-device.json
@@ -5,7 +5,7 @@
         "num_fantrays":6,
         "num_fans_pertray":2,
         "num_ports":58,
-        "num_temps": 4,
+        "num_temps": 5,
         "pddf_dev_types":
         {
             "description":"AS7326-56X - Below is the list of supported PDDF device types (chip names) for various components. If any component uses some other driver, we will create the client using 'echo <dev-address> <dev-type> > <path>/new_device' method",
@@ -366,6 +366,22 @@
             ]
         }
     },
+    "TEMP5" :
+    {
+        "dev_info": { "device_type":"TEMP_SENSOR", "device_name":"TEMP5"},
+        "dev_attr": { "display_name":"coretemp-isa-0000"},
+        "i2c":
+        {
+            "path_info": {"sysfs_base_path": "/sys/class/hwmon/hwmon0"},
+            "attr_list":
+            [
+                { "attr_name": "temp1_high_crit_threshold", "drv_attr_name":"temp1_crit"},
+                { "attr_name": "temp1_high_threshold", "drv_attr_name":"temp1_max"},
+                { "attr_name": "temp1_input"}
+            ]
+        }
+    },
+
     "FAN-CTRL":
     {
         "dev_info": { "device_type":"FAN", "device_name":"FAN-CTRL", "device_parent":"MUX2"},
diff --git a/device/accton/x86_64-accton_as7326_56x-r0/platform.json b/device/accton/x86_64-accton_as7326_56x-r0/platform.json
index 29a825ad2..911068561 100644
--- a/device/accton/x86_64-accton_as7326_56x-r0/platform.json
+++ b/device/accton/x86_64-accton_as7326_56x-r0/platform.json
@@ -209,7 +209,7 @@
                 "high-crit-threshold": true
             },
             {
-                "name": "CPU Temp",
+                "name": "coretemp-isa-0000",
                 "controllable": true,
                 "low-threshold": false,
                 "high-threshold": true,
diff --git a/device/accton/x86_64-accton_as7326_56x-r0/system_health_monitoring_config.json b/device/accton/x86_64-accton_as7326_56x-r0/system_health_monitoring_config.json
index d68bae87a..99cd016ec 100644
--- a/device/accton/x86_64-accton_as7326_56x-r0/system_health_monitoring_config.json
+++ b/device/accton/x86_64-accton_as7326_56x-r0/system_health_monitoring_config.json
@@ -3,9 +3,7 @@
     "devices_to_ignore": [
         "asic",
         "psu.voltage",
-        "psu.temperature",
-        "PSU-1 FAN-1.speed",
-        "PSU-2 FAN-1.speed"
+        "psu.temperature"
     ],
     "user_defined_checkers": [],
     "polling_interval": 60,
diff --git a/platform/broadcom/sonic-platform-modules-accton/as7326-56x/sonic_platform/chassis.py b/platform/broadcom/sonic-platform-modules-accton/as7326-56x/sonic_platform/chassis.py
index c579b219c..a471e3308 100644
--- a/platform/broadcom/sonic-platform-modules-accton/as7326-56x/sonic_platform/chassis.py
+++ b/platform/broadcom/sonic-platform-modules-accton/as7326-56x/sonic_platform/chassis.py
@@ -101,3 +101,32 @@ def get_port_or_cage_type(self, port):
             return SfpBase.SFP_PORT_TYPE_BIT_QSFP | SfpBase.SFP_PORT_TYPE_BIT_QSFP_PLUS | SfpBase.SFP_PORT_TYPE_BIT_QSFP28
         else:
             return SfpBase.SFP_PORT_TYPE_BIT_SFP
+
+    def get_position_in_parent(self):
+        """
+        Retrieves 1-based relative physical position in parent device.
+        If the agent cannot determine the parent-relative position
+        for some reason, or if the associated value of
+        entPhysicalContainedIn is'0', then the value '-1' is returned
+        Returns:
+            integer: The 1-based relative physical position in parent device
+            or -1 if cannot determine the position
+        """
+        return -1
+
+    def is_replaceable(self):
+        """
+        Indicate whether this device is replaceable.
+        Returns:
+            bool: True if it is replaceable.
+        """
+        return False    
+        
+    def get_revision(self):
+        """
+        Retrieves the hardware revision of the device
+
+        Returns:
+            string: Revision value of device
+        """
+        return 'N/A'
\ No newline at end of file
diff --git a/platform/broadcom/sonic-platform-modules-accton/as7326-56x/sonic_platform/fan.py b/platform/broadcom/sonic-platform-modules-accton/as7326-56x/sonic_platform/fan.py
index 4e70b961b..694593d03 100644
--- a/platform/broadcom/sonic-platform-modules-accton/as7326-56x/sonic_platform/fan.py
+++ b/platform/broadcom/sonic-platform-modules-accton/as7326-56x/sonic_platform/fan.py
@@ -50,3 +50,16 @@ def get_serial(self):
             string: Serial number of device
         """
         return "N/A"
+
+    def get_target_speed(self):
+        """
+        Retrieves the target (expected) speed of the fan
+
+        Returns:
+            An integer, the percentage of full fan speed, in the range 0 (off)
+                 to 100 (full speed)
+        """
+        if self.is_psu_fan:
+            return super().get_speed()
+        else:
+            return super().get_target_speed()

From 6e5ac45ff5f64044f8afd8904a07de066190253f Mon Sep 17 00:00:00 2001
From: jostar-yang <jostar_yang@edge-core.com>
Date: Tue, 21 Feb 2023 15:17:42 +0800
Subject: [PATCH 1104/1115] Modify system_health_monitoring_config.json
 led_color string

---
 .../system_health_monitoring_config.json                    | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/device/accton/x86_64-accton_as7326_56x-r0/system_health_monitoring_config.json b/device/accton/x86_64-accton_as7326_56x-r0/system_health_monitoring_config.json
index 99cd016ec..5aacf0c3b 100644
--- a/device/accton/x86_64-accton_as7326_56x-r0/system_health_monitoring_config.json
+++ b/device/accton/x86_64-accton_as7326_56x-r0/system_health_monitoring_config.json
@@ -8,8 +8,8 @@
     "user_defined_checkers": [],
     "polling_interval": 60,
     "led_color": {
-        "fault": "STATUS_LED_COLOR_RED",
-        "normal": "STATUS_LED_COLOR_GREEN",
-        "booting": "STATUS_LED_COLOR_GREEN_BLINK"
+        "fault": "red",
+        "normal": "green",
+        "booting": "green_blink"
     }
 }

From 41e9f62e908a7e4ff9e5ec24c81ac22c1233f456 Mon Sep 17 00:00:00 2001
From: michael_shih <michael_shih@edge-core.com>
Date: Tue, 14 Mar 2023 17:49:24 +0800
Subject: [PATCH 1105/1115] [Edgecore][device][platform] Fixed sonic-mgmt
 pytest failed items

Signed-off-by: michael_shih <michael_shih@edge-core.com>
---
 .../x86_64-accton_as7326_56x-r0/pcie.yaml     |  18 +-
 .../x86_64-accton_as7326_56x-r0/platform.json | 411 +++++++++++++++---
 .../platform_components.json                  |  14 +
 .../as7326-56x/sonic_platform/eeprom.py       |  77 +---
 .../as7326-56x/sonic_platform/helper.py       |   1 +
 .../as7326-56x/utils/accton_as7326_util.py    |   4 +-
 6 files changed, 370 insertions(+), 155 deletions(-)
 create mode 100644 device/accton/x86_64-accton_as7326_56x-r0/platform_components.json

diff --git a/device/accton/x86_64-accton_as7326_56x-r0/pcie.yaml b/device/accton/x86_64-accton_as7326_56x-r0/pcie.yaml
index af10930e3..6f1be3817 100644
--- a/device/accton/x86_64-accton_as7326_56x-r0/pcie.yaml
+++ b/device/accton/x86_64-accton_as7326_56x-r0/pcie.yaml
@@ -94,6 +94,18 @@
   id: 8c31
   name: 'USB controller: Intel Corporation 8 Series/C220 Series Chipset Family USB
     xHCI (rev 05)'
+- bus: '00'
+  dev: '16'
+  fn: '0'
+  id: 8c3a
+  name: 'Communication controller: Intel Corporation 8 Series/C220 Series Chipset
+    Family MEI Controller #1 (rev 04)'
+- bus: '00'
+  dev: '16'
+  fn: '1'
+  id: 8c3b
+  name: 'Communication controller: Intel Corporation 8 Series/C220 Series Chipset
+    Family MEI Controller #2 (rev 04)'
 - bus: '00'
   dev: 1c
   fn: '0'
@@ -130,12 +142,6 @@
   id: 8c22
   name: 'SMBus: Intel Corporation 8 Series/C220 Series Chipset Family SMBus Controller
     (rev 05)'
-- bus: '00'
-  dev: 1f
-  fn: '6'
-  id: 8c24
-  name: 'Signal processing controller: Intel Corporation 8 Series Chipset Family Thermal
-    Management Controller (rev 05)'
 - bus: '03'
   dev: '00'
   fn: '0'
diff --git a/device/accton/x86_64-accton_as7326_56x-r0/platform.json b/device/accton/x86_64-accton_as7326_56x-r0/platform.json
index 911068561..a10ec3de5 100644
--- a/device/accton/x86_64-accton_as7326_56x-r0/platform.json
+++ b/device/accton/x86_64-accton_as7326_56x-r0/platform.json
@@ -387,126 +387,393 @@
                 "name": "Ethernet76"
             }
         ]
+    },
+                }
+        ]
     },
     "interfaces": {
+        "Ethernet0": {
+            "index": "1",
+            "lanes": "3",
+            "breakout_modes": {
+                "1x25G": ["Eth1(Port1)"]
+            }
+        },
+
+        "Ethernet1": {
+            "index": "2",
+            "lanes": "2",
+            "breakout_modes": {
+                "1x25G": ["Eth2(Port2)"]
+            }
+        },
+
+        "Ethernet2": {
+            "index": "3",
+            "lanes": "4",
+            "breakout_modes": {
+                "1x25G": ["Eth3(Port3)"]
+            }
+        },
+
+        "Ethernet3": {
+            "index": "4",
+            "lanes": "8",
+            "breakout_modes": {
+                "1x25G": ["Eth4(Port4)"]
+            }
+        },
+
+        "Ethernet4": {
+            "index": "5",
+            "lanes": "7",
+            "breakout_modes": {
+                "1x25G": ["Eth5(Port5)"]
+            }
+        },
+
         "Ethernet5": {
-            "index": "6,2,1,3",
-            "lanes": "1,2,3,4",
+            "index": "6",
+            "lanes": "1",
             "breakout_modes": {
-                "4x25G": ["Eth6/1(Port6)", "Eth6/2(Port2)", "Eth6/3(Port1)", "Eth6/4(Port3)"],
-                "4x10G[1G]": ["Eth6/1(Port6)", "Eth6/2(Port2)", "Eth6/3(Port1)", "Eth6/4(Port3)"]
-            },
-            "interface_ids": "5,1,0,2"
+                "1x25G": ["Eth6(Port6)"]
+            }
         },
 
         "Ethernet6": {
-            "index": "7,9,5,4",
-            "lanes": "5,6,7,8",
+            "index": "7",
+            "lanes": "5",
             "breakout_modes": {
-                "4x25G": ["Eth7/1(Port7)", "Eth7/2(Port9)", "Eth7/3(Port5)", "Eth7/4(Port4)"],
-                "4x10G[1G]": ["Eth7/1(Port7)", "Eth7/2(Port9)", "Eth7/3(Port5)", "Eth7/4(Port4)"]
-            },
-            "interface_ids": "6,8,4,3"
+                "1x25G": ["Eth7(Port7)"]
+            }
+        },
+
+        "Ethernet7": {
+            "index": "8",
+            "lanes": "16",
+            "breakout_modes": {
+                "1x25G": ["Eth8(Port8)"]
+            }
+        },
+
+        "Ethernet8": {
+            "index": "9",
+            "lanes": "6",
+            "breakout_modes": {
+                "1x25G": ["Eth9(Port9)"]
+            }
+        },
+
+        "Ethernet9": {
+            "index": "10",
+            "lanes": "14",
+            "breakout_modes": {
+                "1x25G": ["Eth10(Port10)"]
+            }
         },
 
         "Ethernet10": {
-            "index": "11,10,12,8",
-            "lanes": "13,14,15,16",
+            "index": "11",
+            "lanes": "13",
             "breakout_modes": {
-                "4x25G": ["Eth11/1(Port11)", "Eth11/2(Port10)", "Eth11/3(Port12)", "Eth11/4(Port8)"],
-                "4x10G[1G]": ["Eth11/1(Port11)", "Eth11/2(Port10)", "Eth11/3(Port12)", "Eth11/4(Port8)"]
-            },
-            "interface_ids": "10,9,11,7"
+                "1x25G": ["Eth11(Port11)"]
+            }
+        },
+
+        "Ethernet11": {
+            "index": "12",
+            "lanes": "15",
+            "breakout_modes": {
+                "1x25G": ["Eth12(Port12)"]
+            }
+        },
+
+        "Ethernet12": {
+            "index": "13",
+            "lanes": "23",
+            "breakout_modes": {
+                "1x25G": ["Eth13(Port13)"]
+            }
+        },
+
+        "Ethernet13": {
+            "index": "14",
+            "lanes": "22",
+            "breakout_modes": {
+                "1x25G": ["Eth14(Port14)"]
+            }
+        },
+
+        "Ethernet14": {
+            "index": "15",
+            "lanes": "24",
+            "breakout_modes": {
+                "1x25G": ["Eth15(Port15)"]
+            }
+        },
+
+        "Ethernet15": {
+            "index": "16",
+            "lanes": "32",
+            "breakout_modes": {
+                "1x25G": ["Eth16(Port16)"]
+            }
+        },
+
+        "Ethernet16": {
+            "index": "17",
+            "lanes": "31",
+            "breakout_modes": {
+                "1x25G": ["Eth17(Port17)"]
+            }
         },
 
         "Ethernet17": {
-            "index": "18,14,13,15",
-            "lanes": "21,22,23,24",
+            "index": "18",
+            "lanes": "21",
             "breakout_modes": {
-                "4x25G": ["Eth18/1(Port18)", "Eth18/2(Port14)", "Eth18/3(Port13)", "Eth18/4(Port15)"],
-                "4x10G[1G]": ["Eth18/1(Port18)", "Eth18/2(Port14)", "Eth18/3(Port13)", "Eth18/4(Port15)"]
-            },
-            "interface_ids": "17,13,12,14"
+                "1x25G": ["Eth18(Port18)"]
+            }
         },
 
         "Ethernet18": {
-            "index": "19,21,17,16",
-            "lanes": "29,30,31,32",
+            "index": "19",
+            "lanes": "29",
             "breakout_modes": {
-                "4x25G": ["Eth19/1(Port19)", "Eth19/2(Port21)", "Eth19/3(Port17)", "Eth19/4(Port16)"],
-                "4x10G[1G]": ["Eth19/1(Port19)", "Eth19/2(Port21)", "Eth19/3(Port17)", "Eth19/4(Port16)"]
-            },
-            "interface_ids": "18,20,16,15"
+                "1x25G": ["Eth19(Port19)"]
+            }
+        },
+
+        "Ethernet19": {
+            "index": "20",
+            "lanes": "36",
+            "breakout_modes": {
+                "1x25G": ["Eth20(Port20)"]
+            }
+        },
+
+        "Ethernet20": {
+            "index": "21",
+            "lanes": "30",
+            "breakout_modes": {
+                "1x25G": ["Eth21(Port21)"]
+            }
+        },
+
+        "Ethernet21": {
+            "index": "22",
+            "lanes": "34",
+            "breakout_modes": {
+                "1x25G": ["Eth22(Port22)"]
+            }
         },
 
         "Ethernet22": {
-            "index": "23,22,24,20",
-            "lanes": "33,34,35,36",
+            "index": "23",
+            "lanes": "33",
             "breakout_modes": {
-                "4x25G": ["Eth23/1(Port23)", "Eth23/2(Port22)", "Eth23/3(Port24)", "Eth23/4(Port20)"],
-                "4x10G[1G]": ["Eth23/1(Port23)", "Eth23/2(Port22)", "Eth23/3(Port24)", "Eth23/4(Port20)"]
-            },
-            "interface_ids": "22,21,23,19"
+                "1x25G": ["Eth23(Port23)"]
+            }
+        },
+
+        "Ethernet23": {
+            "index": "24",
+            "lanes": "35",
+            "breakout_modes": {
+                "1x25G": ["Eth24(Port24)"]
+            }
+        },
+
+        "Ethernet24": {
+            "index": "25",
+            "lanes": "43",
+            "breakout_modes": {
+                "1x25G": ["Eth25(Port25)"]
+            }
+        },
+
+        "Ethernet25": {
+            "index": "26",
+            "lanes": "42",
+            "breakout_modes": {
+                "1x25G": ["Eth26(Port26)"]
+            }
+        },
+
+        "Ethernet26": {
+            "index": "27",
+            "lanes": "44",
+            "breakout_modes": {
+                "1x25G": ["Eth27(Port27)"]
+            }
+        },
+
+        "Ethernet27": {
+            "index": "28",
+            "lanes": "52",
+            "breakout_modes": {
+                "1x25G": ["Eth28(Port28)"]
+            }
+        },
+
+        "Ethernet28": {
+            "index": "29",
+            "lanes": "51",
+            "breakout_modes": {
+                "1x25G": ["Eth29(Port29)"]
+            }
         },
 
         "Ethernet29": {
-            "index": "30,26,25,27",
-            "lanes": "41,42,43,44",
+            "index": "30",
+            "lanes": "41",
             "breakout_modes": {
-                "4x25G": ["Eth30/1(Port30)", "Eth30/2(Port26)", "Eth30/3(Port25)", "Eth30/4(Port27)"],
-                "4x10G[1G]": ["Eth30/1(Port30)", "Eth30/2(Port26)", "Eth30/3(Port25)", "Eth30/4(Port27)"]
-            },
-            "interface_ids": "29,25,24,26"
+                "1x25G": ["Eth30(Port30)"]
+            }
         },
 
         "Ethernet30": {
-            "index": "31,33,29,28",
-            "lanes": "49,50,51,52",
+            "index": "31",
+            "lanes": "49",
             "breakout_modes": {
-                "4x25G": ["Eth31/1(Port31)", "Eth31/2(Port33)", "Eth31/3(Port29)", "Eth31/4(Port28)"],
-                "4x10G[1G]": ["Eth31/1(Port31)", "Eth31/2(Port33)", "Eth31/3(Port29)", "Eth31/4(Port28)"]
-            },
-            "interface_ids": "30,32,28,27"
+                "1x25G": ["Eth31(Port31)"]
+            }
+        },
+
+        "Ethernet31": {
+            "index": "32",
+            "lanes": "60",
+            "breakout_modes": {
+                "1x25G": ["Eth32(Port32)"]
+            }
+        },
+
+        "Ethernet32": {
+            "index": "33",
+            "lanes": "50",
+            "breakout_modes": {
+                "1x25G": ["Eth33(Port33)"]
+            }
+        },
+
+        "Ethernet33": {
+            "index": "34",
+            "lanes": "58",
+            "breakout_modes": {
+                "1x25G": ["Eth34(Port34)"]
+            }
         },
 
         "Ethernet34": {
-            "index": "35,34,36,32",
-            "lanes": "57,58,59,60",
+            "index": "35",
+            "lanes": "57",
             "breakout_modes": {
-                "4x25G": ["Eth35/1(Port35)", "Eth35/2(Port34)", "Eth35/3(Port36)", "Eth35/4(Port32)"],
-                "4x10G[1G]": ["Eth35/1(Port35)", "Eth35/2(Port34)", "Eth35/3(Port36)", "Eth35/4(Port32)"]
-            },
-            "interface_ids": "34,33,35,31"
+                "1x25G": ["Eth35(Port35)"]
+            }
+        },
+
+        "Ethernet35": {
+            "index": "36",
+            "lanes": "59",
+            "breakout_modes": {
+                "1x25G": ["Eth36(Port36)"]
+            }
+        },
+
+        "Ethernet36": {
+            "index": "37",
+            "lanes": "62",
+            "breakout_modes": {
+                "1x25G": ["Eth37(Port37)"]
+            }
+        },
+
+        "Ethernet37": {
+            "index": "38",
+            "lanes": "63",
+            "breakout_modes": {
+                "1x25G": ["Eth38(Port38)"]
+            }
+        },
+
+        "Ethernet38": {
+            "index": "39",
+            "lanes": "64",
+            "breakout_modes": {
+                "1x25G": ["Eth39(Port39)"]
+            }
         },
 
         "Ethernet39": {
-            "index": "40,41,45,43",
-            "lanes": "65,66,67,68",
+            "index": "40",
+            "lanes": "65",
             "breakout_modes": {
-                "4x25G": ["Eth40/1(Port40)", "Eth40/2(Port41)", "Eth40/3(Port45)", "Eth40/4(Port43)"],
-                "4x10G[1G]": ["Eth40/1(Port40)", "Eth40/2(Port41)", "Eth40/3(Port45)", "Eth40/4(Port43)"]
-            },
-            "interface_ids": "39,40,44,42"
+                "1x25G": ["Eth40(Port40)"]
+            }
+        },
+
+        "Ethernet40": {
+            "index": "41",
+            "lanes": "66",
+            "breakout_modes": {
+                "1x25G": ["Eth41(Port41)"]
+            }
         },
 
         "Ethernet41": {
-            "index": "42,37,38,39",
-            "lanes": "61,62,63,64",
+            "index": "42",
+            "lanes": "61",
             "breakout_modes": {
-                "4x25G": ["Eth42/1(Port42)", "Eth42/2(Port37)", "Eth42/3(Port38)", "Eth42/4(Port39)"],
-                "4x10G[1G]": ["Eth42/1(Port42)", "Eth42/2(Port37)", "Eth42/3(Port38)", "Eth42/4(Port39)"]
-            },
-            "interface_ids": "41,36,37,38"
+                "1x25G": ["Eth42(Port42)"]
+            }
+        },
+
+        "Ethernet42": {
+            "index": "43",
+            "lanes": "68",
+            "breakout_modes": {
+                "1x25G": ["Eth43(Port43)"]
+            }
         },
 
         "Ethernet43": {
-            "index": "44,48,46,47",
-            "lanes": "69,70,71,72",
+            "index": "44",
+            "lanes": "69",
             "breakout_modes": {
-                "4x25G": ["Eth44/1(Port44)", "Eth44/2(Port48)", "Eth44/3(Port46)", "Eth44/4(Port47)"],
-                "4x10G[1G]": ["Eth44/1(Port44)", "Eth44/2(Port48)", "Eth44/3(Port46)", "Eth44/4(Port47)"]
-            },
-            "interface_ids": "43,47,45,46"
+                "1x25G": ["Eth44(Port44)"]
+            }
+        },
+
+        "Ethernet44": {
+            "index": "45",
+            "lanes": "67",
+            "breakout_modes": {
+                "1x25G": ["Eth45(Port45)"]
+            }
+        },
+
+        "Ethernet45": {
+            "index": "46",
+            "lanes": "71",
+            "breakout_modes": {
+                "1x25G": ["Eth46(Port46)"]
+            }
+        },
+
+        "Ethernet46": {
+            "index": "47",
+            "lanes": "72",
+            "breakout_modes": {
+                "1x25G": ["Eth47(Port47)"]
+            }
+        },
+
+        "Ethernet47": {
+            "index": "48",
+            "lanes": "70",
+            "breakout_modes": {
+                "1x25G": ["Eth48(Port48)"]
+            }
         },
 
         "Ethernet48": {
diff --git a/device/accton/x86_64-accton_as7326_56x-r0/platform_components.json b/device/accton/x86_64-accton_as7326_56x-r0/platform_components.json
new file mode 100644
index 000000000..c32d4ac00
--- /dev/null
+++ b/device/accton/x86_64-accton_as7326_56x-r0/platform_components.json
@@ -0,0 +1,14 @@
+{
+    "chassis": {
+        "7326-56X-O-AC-F": {
+            "component": {
+                "MB_CPLD1": { },
+                "MB_CPLD2": { },
+                "MB_CPLD3": { },
+                "FAN_CPLD": { },
+                "CPU_CPLD": { },
+                "BIOS": { }
+            }
+        }
+    }
+}
diff --git a/platform/broadcom/sonic-platform-modules-accton/as7326-56x/sonic_platform/eeprom.py b/platform/broadcom/sonic-platform-modules-accton/as7326-56x/sonic_platform/eeprom.py
index ca9b5ce06..b0fbd57ac 100644
--- a/platform/broadcom/sonic-platform-modules-accton/as7326-56x/sonic_platform/eeprom.py
+++ b/platform/broadcom/sonic-platform-modules-accton/as7326-56x/sonic_platform/eeprom.py
@@ -2,87 +2,14 @@
 
 try:
     from sonic_platform_pddf_base.pddf_eeprom import PddfEeprom
-    import os
 except ImportError as e:
     raise ImportError(str(e) + "- required module not found")
 
-CACHE_ROOT = '/var/cache/sonic/decode-syseeprom'
-CACHE_FILE = 'syseeprom_cache'
 
 class Eeprom(PddfEeprom):
-    _TLV_INFO_MAX_LEN = 256
-    pddf_obj = {}
-    plugin_data = {}
 
     def __init__(self, pddf_data=None, pddf_plugin_data=None):
-        #PddfEeprom.__init__(self, pddf_data, pddf_plugin_data)
-        if not pddf_data or not pddf_plugin_data:
-            raise ValueError('PDDF JSON data error')
-
-        self.pddf_obj = pddf_data
-        self.plugin_data = pddf_plugin_data
-
-        # system EEPROM always has device name EEPROM1
-        self.eeprom_path = self.pddf_obj.get_path("EEPROM1", "eeprom")
-        if self.eeprom_path is None:
-            return
-
-        super(PddfEeprom, self).__init__(self.eeprom_path, 0, '', True)
-        self.eeprom_tlv_dict = dict()
-
-        # Create the cache directory if not created
-        if not os.path.exists(CACHE_ROOT):
-            try:
-                os.makedirs(CACHE_ROOT)
-            except Exception as e:
-                print("Error in creating Eeprom cache directory - {}".format(str(e)))
-
-        # Assign cache_name in eeprom_base.py
-        try:
-            self.set_cache_name(os.path.join(CACHE_ROOT, CACHE_FILE))
-        except:
-            pass
-
-        try:
-            self.eeprom_data = self.read_eeprom()
-        except Exception as e:
-            self.eeprom_data = "N/A"
-            raise RuntimeError("Eeprom is not Programmed - Error: {}".format(str(e)))
-        else:
-            eeprom = self.eeprom_data
-
-            try:
-                self.update_cache(eeprom)
-            except:
-                pass
-
-            if not self.is_valid_tlvinfo_header(eeprom):
-                return
-
-            total_length = ((eeprom[9]) << 8) | (eeprom[10])
-            tlv_index = self._TLV_INFO_HDR_LEN
-            tlv_end = self._TLV_INFO_HDR_LEN + total_length
-
-            while (tlv_index + 2) < len(eeprom) and tlv_index < tlv_end:
-                if not self.is_valid_tlv(eeprom[tlv_index:]):
-                    break
-
-                tlv = eeprom[tlv_index:tlv_index + 2
-                             + (eeprom[tlv_index + 1])]
-                code = "0x%02X" % ((tlv[0]))
-
-                if (tlv[0]) == self._TLV_CODE_VENDOR_EXT:
-                    value = str(((tlv[2]) << 24) | ((tlv[3]) << 16) |
-                                ((tlv[4]) << 8) | (tlv[5]))
-                    value += str(tlv[6:6 + (tlv[1])])
-                else:
-                    name, value = self.decoder(None, tlv)
-
-                self.eeprom_tlv_dict[code] = value
-                if (eeprom[tlv_index]) == self._TLV_CODE_CRC_32:
-                    break
-
-                tlv_index += (eeprom[tlv_index+1]) + 2
-
+        PddfEeprom.__init__(self, pddf_data, pddf_plugin_data)
 
     # Provide the functions/variables below for which implementation is to be overwritten
+
diff --git a/platform/broadcom/sonic-platform-modules-accton/as7326-56x/sonic_platform/helper.py b/platform/broadcom/sonic-platform-modules-accton/as7326-56x/sonic_platform/helper.py
index 09c2af7a8..c3b0f1d2f 100644
--- a/platform/broadcom/sonic-platform-modules-accton/as7326-56x/sonic_platform/helper.py
+++ b/platform/broadcom/sonic-platform-modules-accton/as7326-56x/sonic_platform/helper.py
@@ -3,6 +3,7 @@
 import subprocess
 from mmap import *
 from sonic_py_common import device_info
+from sonic_py_common.general import getstatusoutput_noshell
 
 HOST_CHK_CMD = ["docker"]
 EMPTY_STRING = ""
diff --git a/platform/broadcom/sonic-platform-modules-accton/as7326-56x/utils/accton_as7326_util.py b/platform/broadcom/sonic-platform-modules-accton/as7326-56x/utils/accton_as7326_util.py
index f4335bd44..f93474325 100755
--- a/platform/broadcom/sonic-platform-modules-accton/as7326-56x/utils/accton_as7326_util.py
+++ b/platform/broadcom/sonic-platform-modules-accton/as7326-56x/utils/accton_as7326_util.py
@@ -100,9 +100,9 @@ def show_help():
 
 
 def dis_i2c_ir3570a(addr):
-    cmd = ["i2cset", "-y", "0", "0x"+"%x"%addr, "0xE5", "0x01"]
+    cmd = ["i2cset", "-y", "-a", "0", "0x"+"%x"%addr, "0xE5", "0x01"]
     status, output = getstatusoutput_noshell(cmd)
-    cmd = ["i2cset", "-y", "0", "0x"+"%x"%addr, "0x12", "0x02"]
+    cmd = ["i2cset", "-y", "-a", "0", "0x"+"%x"%addr, "0x12", "0x02"]
     status, output = getstatusoutput_noshell(cmd)
     return status
 

From feb90523a26ce2639b6da71fac2b64e553e9e470 Mon Sep 17 00:00:00 2001
From: michael_shih <michael_shih@edge-core.com>
Date: Wed, 15 Mar 2023 09:31:57 +0800
Subject: [PATCH 1106/1115] [Edgecore][device][platform] Fixed platform.json
 format error

Signed-off-by: michael_shih <michael_shih@edge-core.com>
---
 device/accton/x86_64-accton_as7326_56x-r0/platform.json | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/device/accton/x86_64-accton_as7326_56x-r0/platform.json b/device/accton/x86_64-accton_as7326_56x-r0/platform.json
index a10ec3de5..c2fa56e3e 100644
--- a/device/accton/x86_64-accton_as7326_56x-r0/platform.json
+++ b/device/accton/x86_64-accton_as7326_56x-r0/platform.json
@@ -387,9 +387,6 @@
                 "name": "Ethernet76"
             }
         ]
-    },
-                }
-        ]
     },
     "interfaces": {
         "Ethernet0": {

From df6b3f61876600e0f9d1ac3c78d1fdb418ed5aec Mon Sep 17 00:00:00 2001
From: jostar-yang <jostar_yang@edge-core.com>
Date: Thu, 13 Apr 2023 14:52:10 +0800
Subject: [PATCH 1107/1115] Add get_error_description() support to sfp.py

---
 .../as7326-56x/sonic_platform/sfp.py          | 147 +++++++++++++++++-
 1 file changed, 145 insertions(+), 2 deletions(-)

diff --git a/platform/broadcom/sonic-platform-modules-accton/as7326-56x/sonic_platform/sfp.py b/platform/broadcom/sonic-platform-modules-accton/as7326-56x/sonic_platform/sfp.py
index 56de2221f..837d060e9 100644
--- a/platform/broadcom/sonic-platform-modules-accton/as7326-56x/sonic_platform/sfp.py
+++ b/platform/broadcom/sonic-platform-modules-accton/as7326-56x/sonic_platform/sfp.py
@@ -14,8 +14,20 @@ class Sfp(PddfSfp):
     PDDF Platform-Specific Sfp class
     """
 
+    SFP_TYPE_CODE_LIST = [
+        0x03,  # SFP/SFP+/SFP28
+        0x0b   # DWDM-SFP/SFP+
+    ]
+    QSFP_TYPE_CODE_LIST = [
+        0x0c, # QSFP
+        0x0d, # QSFP+ or later
+        0x11, # QSFP28 or later
+        0xe1  # QSFP28 EDFA
+    ]
+
     def __init__(self, index, pddf_data=None, pddf_plugin_data=None):
         PddfSfp.__init__(self, index, pddf_data, pddf_plugin_data)
+        self.index = self.port_index
 
     # Provide the functions/variables below for which implementation is to be overwritten
     def __get_path_to_port_config_file(self):
@@ -28,7 +40,7 @@ def get_name(self):
         Retrieves the name of the device
             Returns:
             string: The name of the device
-        """                
+        """
         sfputil_helper = SfpUtilHelper()
         sfputil_helper.read_porttab_mappings(
             self.__get_path_to_port_config_file())
@@ -42,6 +54,131 @@ def get_name(self):
     def get_position_in_parent(self):
         """Retrieves 1-based relative physical position in parent device."""
         return self.port_index
+    
+    def __validate_eeprom_sfp(self):
+        checksum_test = 0
+        eeprom_raw = self.read_eeprom(0, 96)
+        if eeprom_raw is None:
+            return None
+
+        for i in range(0, 63):
+            checksum_test = (checksum_test + eeprom_raw[i]) & 0xFF
+        else:
+            if checksum_test != eeprom_raw[63]:
+                return False
+
+        checksum_test = 0
+        for i in range(64, 95):
+            checksum_test = (checksum_test + eeprom_raw[i]) & 0xFF
+        else:
+            if checksum_test != eeprom_raw[95]:
+                return False
+
+        api = self.get_xcvr_api()
+        if api is None:
+            return False
+
+        if api.is_flat_memory():
+            return True
+
+        checksum_test = 0
+        eeprom_raw = self.read_eeprom(384, 96)
+        if eeprom_raw is None:
+            return None
+
+        for i in range(0, 95):
+            checksum_test = (checksum_test + eeprom_raw[i]) & 0xFF
+        else:
+            if checksum_test != eeprom_raw[95]:
+                return False
+
+        return True
+
+    def __validate_eeprom_qsfp(self):
+        checksum_test = 0
+        eeprom_raw = self.read_eeprom(128, 96)
+        if eeprom_raw is None:
+            return None
+
+        for i in range(0, 63):
+            checksum_test = (checksum_test + eeprom_raw[i]) & 0xFF
+        else:
+            if checksum_test != eeprom_raw[63]:
+                return False
+
+        checksum_test = 0
+        for i in range(64, 95):
+            checksum_test = (checksum_test + eeprom_raw[i]) & 0xFF
+        else:
+            if checksum_test != eeprom_raw[95]:
+                return False
+
+        api = self.get_xcvr_api()
+        if api is None:
+            return False
+
+        if api.is_flat_memory():
+            return True
+
+        return True
+
+    def validate_eeprom(self):
+        id_byte_raw = self.read_eeprom(0, 1)
+        if id_byte_raw is None:
+            return None
+
+        id = id_byte_raw[0]
+        if id in self.QSFP_TYPE_CODE_LIST:
+            return self.__validate_eeprom_qsfp()
+        elif id in self.SFP_TYPE_CODE_LIST:
+            return self.__validate_eeprom_sfp()
+        else:
+            return False
+
+    def validate_temperature(self):
+        temperature = self.get_temperature()
+        if temperature is None:
+            return None
+
+        threshold_dict = self.get_transceiver_threshold_info()
+        if threshold_dict is None:
+            return None
+
+        if isinstance(temperature, float) is not True:
+            return True
+
+        if isinstance(threshold_dict['temphighalarm'], float) is not True:
+            return True
+
+        return threshold_dict['temphighalarm'] > temperature
+
+    def __get_error_description(self):
+        if not self.get_presence():
+            return self.SFP_STATUS_UNPLUGGED
+
+        err_stat = self.SFP_STATUS_BIT_INSERTED
+
+        status = self.validate_eeprom()
+        if status is not True:
+            err_stat = (err_stat | self.SFP_ERROR_BIT_BAD_EEPROM)
+
+        status = self.validate_temperature()
+        if status is not True:
+            err_stat = (err_stat | self.SFP_ERROR_BIT_HIGH_TEMP)
+
+        if err_stat is self.SFP_STATUS_BIT_INSERTED:
+            return self.SFP_STATUS_OK
+        else:
+            err_desc = ''
+            cnt = 0
+            for key in self.SFP_ERROR_BIT_TO_DESCRIPTION_DICT:
+                if (err_stat & key) != 0:
+                    if cnt > 0:
+                        err_desc = err_desc + "|"
+                        cnt = cnt + 1
+                    err_desc = err_desc + self.SFP_ERROR_BIT_TO_DESCRIPTION_DICT[key]
+
+            return err_desc    
 
     def get_error_description(self):
         """
@@ -52,4 +189,10 @@ def get_error_description(self):
             In case there are multiple errors, they should be joined by '|',
             like: "Bad EEPROM|Unsupported cable"
         """
-        raise NotImplementedError
+        try:
+            ret = super().get_error_description()
+            if ret is not None:
+                return ret
+        except NotImplementedError:
+            pass
+        return self.__get_error_description()

From a81cbc0af44c166c2345c21a6ca6c508aeee0421 Mon Sep 17 00:00:00 2001
From: jostar-yang <jostar_yang@edge-core.com>
Date: Tue, 18 Apr 2023 18:16:45 +0800
Subject: [PATCH 1108/1115] Support multi psu and psu_fan_dir

---
 .../pddf/pddf-device.json                     |   8 +-
 .../as7326-56x/modules/pddf_custom_psu.c      | 247 ++++++++++++------
 2 files changed, 175 insertions(+), 80 deletions(-)

diff --git a/device/accton/x86_64-accton_as7326_56x-r0/pddf/pddf-device.json b/device/accton/x86_64-accton_as7326_56x-r0/pddf/pddf-device.json
index 94065e4d0..85d219c3b 100644
--- a/device/accton/x86_64-accton_as7326_56x-r0/pddf/pddf-device.json
+++ b/device/accton/x86_64-accton_as7326_56x-r0/pddf/pddf-device.json
@@ -202,7 +202,6 @@
                 { "attr_name":"psu_present", "attr_devaddr":"0x60", "attr_devtype":"cpld", "attr_offset":"0x2", "attr_mask":"0x1", "attr_cmpval":"0x0", "attr_len":"1"},
                 { "attr_name":"psu_power_good", "attr_devaddr":"0x60", "attr_devtype":"cpld", "attr_offset":"0x2", "attr_mask":"0x4", "attr_cmpval":"0x4", "attr_len":"1"},
                 { "attr_name":"psu_mfr_id", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0X99", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"10" },
-                { "attr_name":"psu_fan_dir", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0xc3", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"5"},
                 { "attr_name":"psu_v_out", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x8b", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
                 { "attr_name":"psu_i_out", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x8c", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
                 { "attr_name":"psu_p_out", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x96", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
@@ -224,7 +223,8 @@
             "attr_list": 
             [  
                 { "attr_name":"psu_model_name", "attr_devaddr":"0x53", "attr_devtype":"eeprom", "attr_offset":"0x15", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"11" },
-                { "attr_name":"psu_serial_num", "attr_devaddr":"0x53", "attr_devtype":"eeprom", "attr_offset":"0x2e", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"17" }
+                { "attr_name":"psu_serial_num", "attr_devaddr":"0x53", "attr_devtype":"eeprom", "attr_offset":"0x2e", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"17" },
+                { "attr_name":"psu_fan_dir", "attr_devaddr":"0x53", "attr_devtype":"eeprom", "attr_offset":"0xc3", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"5"}
                 
             ]
         }
@@ -254,7 +254,6 @@
                 { "attr_name":"psu_present", "attr_devaddr":"0x60", "attr_devtype":"cpld", "attr_offset":"0x2", "attr_mask":"0x2", "attr_cmpval":"0x0", "attr_len":"1"},                
                 { "attr_name":"psu_power_good", "attr_devaddr":"0x60", "attr_devtype":"cpld", "attr_offset":"0x2", "attr_mask":"0x8", "attr_cmpval":"0x8", "attr_len":"1"},
                 { "attr_name":"psu_mfr_id", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0X99", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"10" },
-                { "attr_name":"psu_fan_dir", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0xc3", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"5"},
                 { "attr_name":"psu_v_out", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x8b", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
                 { "attr_name":"psu_i_out", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x8c", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
                 { "attr_name":"psu_p_out", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x96", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
@@ -275,7 +274,8 @@
             "attr_list": 
             [  
                 { "attr_name":"psu_model_name", "attr_devaddr":"0x51", "attr_devtype":"eeprom", "attr_offset":"0x15", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"11" },
-                { "attr_name":"psu_serial_num", "attr_devaddr":"0x51", "attr_devtype":"eeprom", "attr_offset":"0x2e", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"17" }
+                { "attr_name":"psu_serial_num", "attr_devaddr":"0x51", "attr_devtype":"eeprom", "attr_offset":"0x2e", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"17" },
+                { "attr_name":"psu_fan_dir", "attr_devaddr":"0x51", "attr_devtype":"eeprom", "attr_offset":"0xc3", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"5"}
             ]
         }
     },
diff --git a/platform/broadcom/sonic-platform-modules-accton/as7326-56x/modules/pddf_custom_psu.c b/platform/broadcom/sonic-platform-modules-accton/as7326-56x/modules/pddf_custom_psu.c
index 18c3edf72..19d16e085 100644
--- a/platform/broadcom/sonic-platform-modules-accton/as7326-56x/modules/pddf_custom_psu.c
+++ b/platform/broadcom/sonic-platform-modules-accton/as7326-56x/modules/pddf_custom_psu.c
@@ -13,57 +13,81 @@
 
 ssize_t pddf_get_custom_psu_model_name(struct device *dev, struct device_attribute *da, char *buf);
 ssize_t pddf_get_custom_psu_serial_num(struct device *dev, struct device_attribute *da, char *buf);
+ssize_t pddf_get_custom_psu_fan_dir(struct device *dev, struct device_attribute *da, char *buf);
 extern PSU_SYSFS_ATTR_DATA access_psu_model_name;
 extern PSU_SYSFS_ATTR_DATA access_psu_serial_num;
+extern PSU_SYSFS_ATTR_DATA access_psu_fan_dir;
 
-#define MAX_MODEL_NAME          16
-#define MAX_SERIAL_NUMBER       19
+#define MAX_MODEL_NAME          13
+#define MAX_SERIAL_NUMBER       18
+#define FAN_DIR_LEN 3
+
+const char FAN_DIR_F2B[] = "F2B";
+const char FAN_DIR_B2F[] = "B2F";
+const char FAN_DIR_UNKNOWN[] = "";
 
 enum psu_type {
-    PSU_TYPE_AC_110V,
-    PSU_TYPE_DC_48V,
-    PSU_TYPE_DC_12V,
-    PSU_TYPE_AC_ACBEL_FSF019,
-    PSU_TYPE_AC_ACBEL_FSF045
+    PSU_TYPE_ACBEL_FSF019_AC_F2B, // FSF019-611G
+    PSU_TYPE_ACBEL_FSF045_AC_B2F, // FSH045-611G
+    PSU_TYPE_3Y_YM2651YBR_AC_F2B, // YM-2651Y-BR
+    PSU_TYPE_3Y_YM2651YB01R_AC_F2B, // YM-2651Y-B01R
+    PSU_TYPE_3Y_YM2651YCR_AC_B2F, // YM-2651Y-CR
+    PSU_TYPE_3Y_YM2651YC01R_AC_B2F, // YM-2651Y-C01R
+    PSU_TYPE_3Y_YM2651VBR_DC_F2B, // YM-2651V-BR
+    PSU_TYPE_3Y_YM2651VCR_DC_B2F, // YM-2651V-CR
+    PSU_TYPE_3Y_YM2651_SERIES
 };
 
 struct model_name_info {
+    char* model_name;
     enum psu_type type;
     u8 offset;
     u8 length;
     u8 chk_length;
-    char* model_name;
 };
-
 struct serial_number_info {
-    enum psu_type type;
     u8 offset;
     u8 length;
-    u8 chk_length;
-    char* serial_number;
 };
 
-struct model_name_info models[] = {
-{PSU_TYPE_AC_110V, 0x20, 8, 8,  "YM-2651Y"},
-{PSU_TYPE_DC_48V,  0x20, 8, 8,  "YM-2651V"},
-{PSU_TYPE_DC_12V,  0x00, 11, 11, "PSU-12V-750"},
-{PSU_TYPE_AC_ACBEL_FSF019, 0x15, 10, 7, "FSF019-"},
-{PSU_TYPE_AC_ACBEL_FSF045, 0x15, 10, 7, "FSF045-"}
-
+struct fan_dir_info {
+    char* model_name;
+    u8 model_length;
+    enum psu_type type;
+    const char* fan_dir;
+};
+const struct model_name_info models[] = {
+    { "FSF019", PSU_TYPE_ACBEL_FSF019_AC_F2B, 0x20, 13, 6 },
+    { "FSF045", PSU_TYPE_ACBEL_FSF045_AC_B2F, 0x20, 13, 6 },
+    { "YM-2651", PSU_TYPE_3Y_YM2651_SERIES, 0x20, 13, 7 }
 };
 
-struct serial_number_info serials[] = {
-{PSU_TYPE_AC_110V, 0x2e, 18, 18,  "YM-2651Y"},
-{PSU_TYPE_DC_48V,  0x2e, 18, 18,  "YM-2651V"},
-{PSU_TYPE_DC_12V,  0x2e, 18, 18,  "PSU-12V-750"},
-{PSU_TYPE_AC_ACBEL_FSF019, 0x2e, 16, 16, "FSF019-"},
-{PSU_TYPE_AC_ACBEL_FSF019, 0x2e, 16, 16, "FSF045-"}
+const struct fan_dir_info fan_dirs[] = {
+    { "FSF019", 6, PSU_TYPE_ACBEL_FSF019_AC_F2B, FAN_DIR_F2B },
+    { "FSF045", 6, PSU_TYPE_ACBEL_FSF045_AC_B2F, FAN_DIR_B2F },
+    { "YM-2651Y-BR", 11, PSU_TYPE_3Y_YM2651YBR_AC_F2B, FAN_DIR_F2B },
+    { "YM-2651Y-B01R", 13, PSU_TYPE_3Y_YM2651YB01R_AC_F2B, FAN_DIR_F2B },
+    { "YM-2651Y-CR", 11, PSU_TYPE_3Y_YM2651YCR_AC_B2F, FAN_DIR_B2F },
+    { "YM-2651Y-C01R", 13, PSU_TYPE_3Y_YM2651YC01R_AC_B2F, FAN_DIR_B2F },
+    { "YM-2651V-BR", 11, PSU_TYPE_3Y_YM2651VBR_DC_F2B, FAN_DIR_F2B },
+    { "YM-2651V-CR", 11, PSU_TYPE_3Y_YM2651VCR_DC_B2F, FAN_DIR_B2F }
+};
 
+const struct serial_number_info serials[] = {
+    [PSU_TYPE_ACBEL_FSF019_AC_F2B] = { 0x2e, 16 },
+    [PSU_TYPE_ACBEL_FSF045_AC_B2F] = { 0x2e, 16 },
+    [PSU_TYPE_3Y_YM2651YBR_AC_F2B] = { 0x2e, 18 },
+    [PSU_TYPE_3Y_YM2651YB01R_AC_F2B] = { 0x2e, 18 },
+    [PSU_TYPE_3Y_YM2651YCR_AC_B2F] = { 0x2e, 18 },
+    [PSU_TYPE_3Y_YM2651YC01R_AC_B2F] = { 0x35, 18 },
+    [PSU_TYPE_3Y_YM2651VBR_DC_F2B] = { 0x2e, 18 },
+    [PSU_TYPE_3Y_YM2651VCR_DC_B2F] = { 0x2e, 18 }
 };
 
 struct pddf_psu_data {    
     char model_name[MAX_MODEL_NAME+1];
     char serial_number[MAX_SERIAL_NUMBER+1];
+    char fan_dir[FAN_DIR_LEN+1];
 };
 
 
@@ -96,53 +120,116 @@ static int pddf_psu_read_block(struct i2c_client *client, u8 command, u8 *data,
     return result;
 }
 
-ssize_t pddf_get_custom_psu_serial_num(struct device *dev, struct device_attribute *da, char *buf)
+/* Get type and model_name
+ */
+static int  pddf_get_model_name_and_type(struct i2c_client *client, enum psu_type *get_type, struct pddf_psu_data *get_data)
 {
-    struct i2c_client *client = to_i2c_client(dev);
-    struct pddf_psu_data data;
+    char model_name[MAX_MODEL_NAME+1];
     int i, status;
-
+    enum psu_type type;
+    
+    get_data->model_name[0]='\0';
+    *get_type = PSU_TYPE_ACBEL_FSF019_AC_F2B;
     for (i = 0; i < ARRAY_SIZE(models); i++) {
-        memset(data.serial_number, 0, sizeof(data.serial_number));
-
+        model_name[0]='\0';
+        if ((models[i].length+1) > ARRAY_SIZE(model_name)) {
+            dev_dbg(&client->dev,
+                        "invalid models[%d].length(%d), should not exceed the size of data->model_name(%ld)\n",
+                        i, models[i].length, ARRAY_SIZE(model_name));
+            continue;
+        }
+        
         status = pddf_psu_read_block(client, models[i].offset,
-                                           data.model_name, models[i].length);
+                                           model_name, models[i].length);
         if (status < 0) {
-            data.model_name[0] = '\0';
+            model_name[0] = '\0';
             dev_dbg(&client->dev, "unable to read model name from (0x%x) offset(0x%x)\n",
                                   client->addr, models[i].offset);
             return status;
         }
         else {
-            data.model_name[models[i].length] = '\0';
+            model_name[models[i].length>=(sizeof(model_name)-1)?(sizeof(model_name)-1):models[i].length] = '\0';
         }
 
         /* Determine if the model name is known, if not, read next index
          */
-        if (strncmp(data.model_name, models[i].model_name, models[i].chk_length) == 0) {
-            status = pddf_psu_read_block(client, serials[i].offset,
-                                           data.serial_number, serials[i].length);
-            
-            if (status < 0) {
-                data.serial_number[0] = '\0';
-                dev_dbg(&client->dev, "unable to read serial num from (0x%x) offset(0x%x)\n",
-                                  client->addr, serials[i].offset);
-                return status;
-            }
-            else {
-                data.serial_number[serials[i].length] = '\0';
-	            return sprintf(buf, "%s\n", data.serial_number);
-            }
-                        
-            return 0;
+        if (strncmp(model_name, models[i].model_name, models[i].chk_length) == 0) {
+            type = models[i].type;
+            break;
         }
         else {
-            data.serial_number[0] = '\0';
+            model_name[0] = '\0';
         }
     }
 
-    return -ENODATA;
+    /* Remove useless characters for PSU_TYPE_3Y_YM2651_SERIES */
+    if (type == PSU_TYPE_3Y_YM2651_SERIES) {
+        model_name[8] = '-';
+        if (!isgraph(model_name[11]))
+            model_name[11] = '\0';
+    }
+    /* Remove useless characters for PSU_TYPE_ACBEL_FSF* */
+    else if ((type == PSU_TYPE_ACBEL_FSF019_AC_F2B) || (type == PSU_TYPE_ACBEL_FSF045_AC_B2F)) {
+        memmove(&model_name[7], &model_name[9], ARRAY_SIZE(model_name)-9);
+        model_name[6] = '-';
+        model_name[11] = '\0';
+    }
+    else
+        return -ENODEV;
+        
+    /* Determine fan direction and correct the PSU type */
+    for (i = 0; i < ARRAY_SIZE(fan_dirs); i++) {
+        if ((fan_dirs[i].model_length+1) > ARRAY_SIZE(model_name)) {
+            dev_dbg(&client->dev,
+                      "invalid fan_dirs[%d].model_length(%d), should not exceed the size of data->model_name(%ld)\n",
+                       i, fan_dirs[i].model_length, ARRAY_SIZE(model_name));
+            continue;
+        }
+
+        if (strncmp(model_name, fan_dirs[i].model_name, fan_dirs[i].model_length) == 0) {
+            type = fan_dirs[i].type;            
+            break;
+        }
+    }    
+    if (type >= PSU_TYPE_3Y_YM2651_SERIES)
+    {
+        return -ENODEV;
+    }
+        
+    *get_type = type;
+    memcpy(get_data->model_name, model_name, strlen(model_name)>=sizeof(get_data->model_name)?sizeof(get_data->model_name):strlen(model_name));
+    
+    return 0;
+}
+
+ssize_t pddf_get_custom_psu_serial_num(struct device *dev, struct device_attribute *da, char *buf)
+{
+    struct i2c_client *client = to_i2c_client(dev);
+    struct pddf_psu_data data;
+    int status;
+    enum psu_type type;
+
+    data.serial_number[0]='\0';
+
+    status = pddf_get_model_name_and_type(client, &type, &data);
+    if (status < 0)
+    {
+        return -ENODEV;
+    }
+
+    status = pddf_psu_read_block(client, serials[type].offset,
+                                            data.serial_number, serials[type].length);
+    if (status < 0) {
+        data.serial_number[0] = '\0';
+        dev_dbg(&client->dev, "unable to read serial num from (0x%x) offset(0x%x)\n",
+                                client->addr, serials[type].offset);
+        return status;
+    }
+    else {
+        data.serial_number[serials[type].length >= (sizeof(data.serial_number)-1)?(sizeof(data.serial_number)-1):serials[type].length] = '\0';
+    }
 
+    return sprintf(buf, "%s\n", data.serial_number);
 	
 }
 
@@ -150,34 +237,39 @@ ssize_t pddf_get_custom_psu_model_name(struct device *dev, struct device_attribu
 {
     struct i2c_client *client = to_i2c_client(dev);
     struct pddf_psu_data data;
-    int i, status;
+    int status;
+    enum psu_type type;
+
+    status = pddf_get_model_name_and_type(client, &type, &data);
+    if (status < 0)
+    {
+        return -ENODEV;
+    }
     
-    for (i = 0; i < ARRAY_SIZE(models); i++) {
-        memset(data.model_name, 0, sizeof(data.model_name));
+    return sprintf(buf, "%s\n", data.model_name);
 
-        status = pddf_psu_read_block(client, models[i].offset,
-                                           data.model_name, models[i].length);
-        if (status < 0) {
-            data.model_name[0] = '\0';
-            dev_dbg(&client->dev, "unable to read model name from (0x%x) offset(0x%x)\n",
-                                  client->addr, models[i].offset);
-            return status;
-        }
-        else {
-            data.model_name[models[i].length] = '\0';
-        }
+}
 
-        /* Determine if the model name is known, if not, read next index
-         */
-        if (strncmp(data.model_name, models[i].model_name, models[i].chk_length) == 0) {
-            return sprintf(buf, "%s\n", data.model_name);
-        }
-        else {
-            data.model_name[0] = '\0';
-        }
-    }
+ssize_t pddf_get_custom_psu_fan_dir(struct device *dev, struct device_attribute *da, char *buf)
+{
+	struct i2c_client *client = to_i2c_client(dev);
+	struct pddf_psu_data data;
+    int status;
+    enum psu_type type;
 
-    return -ENODATA;
+    status = pddf_get_model_name_and_type(client, &type, &data);
+    if (status < 0)
+    {
+        return -ENODEV;
+    }
+    
+    if (type < PSU_TYPE_3Y_YM2651_SERIES)
+    {
+        memcpy(data.fan_dir, fan_dirs[type].fan_dir, sizeof(data.fan_dir));
+        return sprintf(buf, "%s\n", data.fan_dir);
+    }
+    else
+        return -ENODEV;
 
 }
 
@@ -188,6 +280,9 @@ static int __init pddf_custom_psu_init(void)
 	
     access_psu_model_name.show = pddf_get_custom_psu_model_name;
     access_psu_model_name.do_get = NULL;
+    
+    access_psu_fan_dir.show = pddf_get_custom_psu_fan_dir;
+    access_psu_fan_dir.do_get = NULL;
 	
 	return 0;
 }

From 8216c06e9db163fd5b44f14eea8c973dbdc367f4 Mon Sep 17 00:00:00 2001
From: jostar-yang <jostar_yang@edge-core.com>
Date: Fri, 28 Apr 2023 18:13:55 +0800
Subject: [PATCH 1109/1115] Add string '\0' to mode_name array

---
 .../as7326-56x/modules/pddf_custom_psu.c                      | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/platform/broadcom/sonic-platform-modules-accton/as7326-56x/modules/pddf_custom_psu.c b/platform/broadcom/sonic-platform-modules-accton/as7326-56x/modules/pddf_custom_psu.c
index 19d16e085..54e19007a 100644
--- a/platform/broadcom/sonic-platform-modules-accton/as7326-56x/modules/pddf_custom_psu.c
+++ b/platform/broadcom/sonic-platform-modules-accton/as7326-56x/modules/pddf_custom_psu.c
@@ -167,6 +167,8 @@ static int  pddf_get_model_name_and_type(struct i2c_client *client, enum psu_typ
         model_name[8] = '-';
         if (!isgraph(model_name[11]))
             model_name[11] = '\0';
+        else
+            model_name[MAX_MODEL_NAME] = '\0';
     }
     /* Remove useless characters for PSU_TYPE_ACBEL_FSF* */
     else if ((type == PSU_TYPE_ACBEL_FSF019_AC_F2B) || (type == PSU_TYPE_ACBEL_FSF045_AC_B2F)) {
@@ -198,7 +200,7 @@ static int  pddf_get_model_name_and_type(struct i2c_client *client, enum psu_typ
         
     *get_type = type;
     memcpy(get_data->model_name, model_name, strlen(model_name)>=sizeof(get_data->model_name)?sizeof(get_data->model_name):strlen(model_name));
-    
+    get_data->model_name[strlen(model_name)>=(sizeof(get_data->model_name)-1)?(sizeof(get_data->model_name)-1):strlen(model_name)]='\0';
     return 0;
 }
 

From 7c9784e6667f6f1a33c7dfdd95afd7afb611218e Mon Sep 17 00:00:00 2001
From: roger530-ho <roger530_ho@edge-core.com>
Date: Mon, 26 Jun 2023 01:29:38 +0000
Subject: [PATCH 1110/1115] fix pytest issue

---
 .../x86_64-accton_as7326_56x-r0/platform.json | 155 ++++++++++++++----
 .../as7326-56x/sonic_platform/psu.py          |  20 +--
 .../as7326-56x/sonic_platform/thermal.py      |  57 +++++++
 3 files changed, 189 insertions(+), 43 deletions(-)

diff --git a/device/accton/x86_64-accton_as7326_56x-r0/platform.json b/device/accton/x86_64-accton_as7326_56x-r0/platform.json
index c2fa56e3e..99dd8305c 100644
--- a/device/accton/x86_64-accton_as7326_56x-r0/platform.json
+++ b/device/accton/x86_64-accton_as7326_56x-r0/platform.json
@@ -1,6 +1,7 @@
 {
     "chassis": {
         "name": "7326-56X",
+        "thermal_manager":false,
         "components": [
             {
                 "name": "MB_CPLD1"
@@ -23,40 +24,88 @@
         ],
         "fans": [
             {
-                "name": "FAN-1F"
+                "name": "FAN-1F",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 32
+                }
             },
             {
-                "name": "FAN-1R"
+                "name": "FAN-1R",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 32
+                }
             },
             {
-                "name": "FAN-2F"
+                "name": "FAN-2F",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 32
+                }
             },
             {
-                "name": "FAN-2R"
+                "name": "FAN-2R",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 32
+                }
             },
             {
-                "name": "FAN-3F"
+                "name": "FAN-3F",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 32
+                }
             },
             {
-                "name": "FAN-3R"
+                "name": "FAN-3R",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 32
+                }
             },
             {
-                "name": "FAN-4F"
+                "name": "FAN-4F",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 32
+                }
             },
             {
-                "name": "FAN-4R"
+                "name": "FAN-4R",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 32
+                }
             },
             {
-                "name": "FAN-5F"
+                "name": "FAN-5F",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 32
+                }
             },
             {
-                "name": "FAN-5R"
+                "name": "FAN-5R",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 32
+                }
             },
             {
-                "name": "FAN-6F"
+                "name": "FAN-6F",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 32
+                }
             },
             {
-                "name": "FAN-6R"
+                "name": "FAN-6R",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 32
+                }
             }
         ],
         "fan_drawers":[
@@ -65,10 +114,18 @@
                 "num_fans" : 2,
                 "fans": [
                     {
-                        "name": "FAN-1F"
+                        "name": "FAN-1F",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 32
+                        }
                     },
                     {
-                        "name": "FAN-1R"
+                        "name": "FAN-1R",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 32
+                        }
                     }
                 ]
             },
@@ -77,10 +134,18 @@
                 "num_fans" : 2,
                 "fans": [
                     {
-                        "name": "FAN-2F"
+                        "name": "FAN-2F",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 32
+                        }
                     },
                     {
-                        "name": "FAN-2R"
+                        "name": "FAN-2R",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 32
+                        }
                     }
                 ]
             },
@@ -89,10 +154,18 @@
                 "num_fans" : 2,
                 "fans": [
                     {
-                        "name": "FAN-3F"
+                        "name": "FAN-3F",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 32
+                        }
                     },
                     {
-                        "name": "FAN-3R"
+                        "name": "FAN-3R",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 32
+                        }
                     }
                 ]
             },
@@ -101,10 +174,18 @@
                 "num_fans" : 2,
                 "fans": [
                     {
-                        "name": "FAN-4F"
+                        "name": "FAN-4F",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 32
+                        }
                     },
                     {
-                        "name": "FAN-4R"
+                        "name": "FAN-4R",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 32
+                        }
                     }
                 ]
             },
@@ -113,10 +194,18 @@
                 "num_fans" : 2,
                 "fans": [
                     {
-                        "name": "FAN-5F"
+                        "name": "FAN-5F",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 32
+                        }
                     },
                     {
-                        "name": "FAN-5R"
+                        "name": "FAN-5R",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 32
+                        }
                     }
                 ]
             },
@@ -125,10 +214,18 @@
                 "num_fans" : 2,
                 "fans": [
                     {
-                        "name": "FAN-6F"
+                        "name": "FAN-6F",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 32
+                        }
                     },
                     {
-                        "name": "FAN-6R"
+                        "name": "FAN-6R",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 32
+                        }
                     }
                 ]
             }
@@ -182,7 +279,7 @@
                 "low-threshold": false,
                 "high-threshold": true,
                 "low-crit-threshold": false,
-                "high-crit-threshold": true
+                "high-crit-threshold": false
             },
             {
                 "name": "MB_FrontMAC_temp(0x49)",
@@ -190,7 +287,7 @@
                 "low-threshold": false,
                 "high-threshold": true,
                 "low-crit-threshold": false,
-                "high-crit-threshold": true
+                "high-crit-threshold": false
             },
             {
                 "name": "MB_LeftCenter_temp(0x4A)",
@@ -198,7 +295,7 @@
                 "low-threshold": false,
                 "high-threshold": true,
                 "low-crit-threshold": false,
-                "high-crit-threshold": true
+                "high-crit-threshold": false
             },
             {
                 "name": "MB_RearMAC_temp(0x48)",
@@ -206,11 +303,11 @@
                 "low-threshold": false,
                 "high-threshold": true,
                 "low-crit-threshold": false,
-                "high-crit-threshold": true
+                "high-crit-threshold": false
             },
             {
                 "name": "coretemp-isa-0000",
-                "controllable": true,
+                "controllable": false,
                 "low-threshold": false,
                 "high-threshold": true,
                 "low-crit-threshold": false,
diff --git a/platform/broadcom/sonic-platform-modules-accton/as7326-56x/sonic_platform/psu.py b/platform/broadcom/sonic-platform-modules-accton/as7326-56x/sonic_platform/psu.py
index f39fde167..c766b3d49 100644
--- a/platform/broadcom/sonic-platform-modules-accton/as7326-56x/sonic_platform/psu.py
+++ b/platform/broadcom/sonic-platform-modules-accton/as7326-56x/sonic_platform/psu.py
@@ -26,22 +26,14 @@ def get_maximum_supplied_power(self):
         """
         return float(self.PLATFORM_PSU_CAPACITY)
 
-    def get_capacity(self):
-        """
-        Gets the capacity (maximum output power) of the PSU in watts
+    def get_name(self):
+        return "PSU-{}".format(self.psu_index)
 
-        Returns:
-            An integer, the capacity of PSU
+    def get_revision(self):
         """
-        return (self.PLATFORM_PSU_CAPACITY)
+        Retrieves the hardware revision of the device
 
-    def get_type(self):
-        """
-        Gets the type of the PSU
         Returns:
-        A string, the type of PSU (AC/DC)
+            string: Revision value of device
         """
-        return "DC"
-
-    def get_name(self):
-        return "PSU-{}".format(self.psu_index)
+        return 'N/A'
diff --git a/platform/broadcom/sonic-platform-modules-accton/as7326-56x/sonic_platform/thermal.py b/platform/broadcom/sonic-platform-modules-accton/as7326-56x/sonic_platform/thermal.py
index 90517ba98..328ce462e 100644
--- a/platform/broadcom/sonic-platform-modules-accton/as7326-56x/sonic_platform/thermal.py
+++ b/platform/broadcom/sonic-platform-modules-accton/as7326-56x/sonic_platform/thermal.py
@@ -17,6 +17,8 @@ def __init__(self, index, pddf_data=None, pddf_plugin_data=None, is_psu_thermal=
         self.pddf_obj = pddf_data
         self.thermal_obj_name = "TEMP{}".format(self.thermal_index)
         self.thermal_obj = self.pddf_obj.data[self.thermal_obj_name]
+        self.min_temperature = None
+        self.max_temperature = None
 
     # Provide the functions/variables below for which implementation is to be overwritten
     def get_name(self):
@@ -35,3 +37,58 @@ def get_status(self):
 
         if get_temp is not None:
             return True if get_temp else False
+
+    def get_temperature(self):
+        current = super().get_temperature()
+
+        if self.min_temperature is None or \
+            current < self.min_temperature:
+            self.min_temperature = current
+
+        if self.max_temperature is None or \
+           current > self.max_temperature:
+            self.max_temperature = current
+
+        return current
+
+    def get_model(self):
+        """
+        Retrieves the model number (or part number) of the device
+        Returns:
+            string: Model/part number of device
+        """
+
+        return "N/A"
+
+    def get_serial(self):
+        """
+        Retrieves the serial number of the device
+        Returns:
+            string: Serial number of device
+        """
+        return "N/A"
+
+    def get_minimum_recorded(self):
+        """
+        Retrieves the minimum recorded temperature of thermal
+        Returns:
+            A float number, the minimum recorded temperature of thermal in Celsius
+            up to nearest thousandth of one degree Celsius, e.g. 30.125
+        """
+        if self.min_temperature is None:
+            self.get_temperature()
+
+        return self.min_temperature
+
+    def get_maximum_recorded(self):
+        """
+        Retrieves the maximum recorded temperature of thermal
+        Returns:
+            A float number, the maximum recorded temperature of thermal in Celsius
+            up to nearest thousandth of one degree Celsius, e.g. 30.125
+        """
+        if self.max_temperature is None:
+            self.get_temperature()
+
+        return self.max_temperature
+

From a5422c9f724657ff0129c668435228013e2dacf5 Mon Sep 17 00:00:00 2001
From: roger530-ho <roger530_ho@edge-core.com>
Date: Mon, 14 Aug 2023 09:18:53 +0000
Subject: [PATCH 1111/1115] [Edgecore][AS7326-56X] Read the data when the PSU
 is in the power-good state.

---
 .../as7326-56x/sonic_platform/psu.py          | 65 +++++++++++++++++++
 1 file changed, 65 insertions(+)

diff --git a/platform/broadcom/sonic-platform-modules-accton/as7326-56x/sonic_platform/psu.py b/platform/broadcom/sonic-platform-modules-accton/as7326-56x/sonic_platform/psu.py
index c766b3d49..899d37be9 100644
--- a/platform/broadcom/sonic-platform-modules-accton/as7326-56x/sonic_platform/psu.py
+++ b/platform/broadcom/sonic-platform-modules-accton/as7326-56x/sonic_platform/psu.py
@@ -37,3 +37,68 @@ def get_revision(self):
             string: Revision value of device
         """
         return 'N/A'
+
+    def get_model(self):
+        """
+        Retrieves the model number (or part number) of the device
+
+        Returns:
+            string: Model/part number of device
+        """
+        model = super().get_model()
+        if model and model.strip() == "":
+            return None
+
+        return model
+
+    def get_serial(self):
+        """
+        Retrieves the serial number of the device
+
+        Returns:
+            string: Serial number of device
+        """
+        serial = super().get_serial()
+        if serial and serial.strip() == "":
+            return None
+
+        return serial
+
+    def get_voltage(self):
+        """
+        Retrieves current PSU voltage output
+
+        Returns:
+            A float number, the output voltage in volts,
+            e.g. 12.1
+        """
+        if self.get_status() is not True:
+            return 0.0
+
+        return super().get_voltage()
+
+    def get_current(self):
+        """
+        Retrieves present electric current supplied by PSU
+
+        Returns:
+            A float number, electric current in amperes,
+            e.g. 15.4
+        """
+        if self.get_status() is not True:
+            return 0.0
+
+        return super().get_current()
+
+    def get_power(self):
+        """
+        Retrieves current energy supplied by PSU
+
+        Returns:
+            A float number, the power in watts,
+            e.g. 302.6
+        """
+        if self.get_status() is not True:
+            return 0.0
+
+        return super().get_power()

From 49f199e38f3e8a0adbe813288d58a15f0e5bb1cd Mon Sep 17 00:00:00 2001
From: roger530-ho <roger530_ho@edge-core.com>
Date: Mon, 6 Nov 2023 07:58:41 +0000
Subject: [PATCH 1112/1115] Fix : Incorrect CPLD value for red blinking

---
 .../as7326-56x/modules/accton_as7326_56x_leds.c               | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/platform/broadcom/sonic-platform-modules-accton/as7326-56x/modules/accton_as7326_56x_leds.c b/platform/broadcom/sonic-platform-modules-accton/as7326-56x/modules/accton_as7326_56x_leds.c
index 035f9ad82..b31702ca1 100644
--- a/platform/broadcom/sonic-platform-modules-accton/as7326-56x/modules/accton_as7326_56x_leds.c
+++ b/platform/broadcom/sonic-platform-modules-accton/as7326-56x/modules/accton_as7326_56x_leds.c
@@ -59,7 +59,7 @@ static struct accton_as7326_56x_led_data  *ledctl = NULL;
 #define LED_MODE_DIAG_RED_VALUE	  (0x06)
 #define LED_MODE_DIAG_BLUE_VALUE  (0x03)
 #define LED_MODE_DIAG_GREEN_BLINK_VALUE  (0x17)
-#define LED_MODE_DIAG_RED_BLINK_VALUE	 (0x0d)
+#define LED_MODE_DIAG_RED_BLINK_VALUE	 (0x0f)
 #define LED_MODE_DIAG_BLUE_BLINK_VALUE   (0x27)
 
 #define LED_MODE_DIAG_OFF_VALUE	  (0x07)
@@ -69,7 +69,7 @@ static struct accton_as7326_56x_led_data  *ledctl = NULL;
 #define LED_MODE_LOC_RED_VALUE	 (0x06)
 #define LED_MODE_LOC_BLUE_VALUE  (0x03)
 #define LED_MODE_LOC_GREEN_BLINK_VALUE  (0x17)
-#define LED_MODE_LOC_RED_BLINK_VALUE	(0x0d)
+#define LED_MODE_LOC_RED_BLINK_VALUE	(0x0f)
 #define LED_MODE_LOC_BLUE_BLINK_VALUE   (0x27)
 #define LED_MODE_LOC_OFF_VALUE	(0x07)
 

From 70f02adb76fa52f85839c4e89ff6ea479299db74 Mon Sep 17 00:00:00 2001
From: jostar-yang <jostar_yang@accton.com>
Date: Fri, 19 Jul 2024 17:49:21 +0800
Subject: [PATCH 1113/1115] Add psu_p_out_max sysfs and support multi cpu core
 temp

---
 .../pddf/pddf-device.json                     | 69 +++++++++++++++++--
 1 file changed, 65 insertions(+), 4 deletions(-)

diff --git a/device/accton/x86_64-accton_as7326_56x-r0/pddf/pddf-device.json b/device/accton/x86_64-accton_as7326_56x-r0/pddf/pddf-device.json
index 85d219c3b..9505a3719 100644
--- a/device/accton/x86_64-accton_as7326_56x-r0/pddf/pddf-device.json
+++ b/device/accton/x86_64-accton_as7326_56x-r0/pddf/pddf-device.json
@@ -5,7 +5,7 @@
         "num_fantrays":6,
         "num_fans_pertray":2,
         "num_ports":58,
-        "num_temps": 5,
+        "num_temps": 9,
         "pddf_dev_types":
         {
             "description":"AS7326-56X - Below is the list of supported PDDF device types (chip names) for various components. If any component uses some other driver, we will create the client using 'echo <dev-address> <dev-type> > <path>/new_device' method",
@@ -26,7 +26,7 @@
             "PORT_MODULE":
             [
                 "pddf_xcvr"
-            ]            
+            ]
         },
         "std_kos":
         [
@@ -205,6 +205,7 @@
                 { "attr_name":"psu_v_out", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x8b", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
                 { "attr_name":"psu_i_out", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x8c", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
                 { "attr_name":"psu_p_out", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x96", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+                { "attr_name":"psu_p_out_max", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0xa7", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
                 { "attr_name":"psu_fan1_speed_rpm", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x90", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
                 { "attr_name":"psu_temp1_input", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0x8d", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
                 { "attr_name":"psu_v_out_min", "attr_devaddr":"0x5b", "attr_devtype":"pmbus", "attr_offset":"0xa4", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
@@ -257,6 +258,7 @@
                 { "attr_name":"psu_v_out", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x8b", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
                 { "attr_name":"psu_i_out", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x8c", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
                 { "attr_name":"psu_p_out", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x96", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
+                { "attr_name":"psu_p_out_max", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0xa7", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
                 { "attr_name":"psu_fan1_speed_rpm", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x90", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
                 { "attr_name":"psu_temp1_input", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0x8d", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
                 { "attr_name":"psu_v_out_min", "attr_devaddr":"0x59", "attr_devtype":"pmbus", "attr_offset":"0xa4", "attr_mask":"0x0", "attr_cmpval":"0xff", "attr_len":"2"},
@@ -369,7 +371,7 @@
     "TEMP5" :
     {
         "dev_info": { "device_type":"TEMP_SENSOR", "device_name":"TEMP5"},
-        "dev_attr": { "display_name":"coretemp-isa-0000"},
+        "dev_attr": { "display_name":"CPU_Package_temp"},
         "i2c":
         {
             "path_info": {"sysfs_base_path": "/sys/class/hwmon/hwmon0"},
@@ -381,7 +383,66 @@
             ]
         }
     },
-
+    "TEMP6" :
+    {
+        "dev_info": { "device_type":"TEMP_SENSOR", "device_name":"TEMP6"},
+        "dev_attr": { "display_name":"CPU_Core_0_temp"},
+        "i2c":
+        {
+            "path_info": {"sysfs_base_path": "/sys/class/hwmon/hwmon0"},
+            "attr_list":
+            [
+                { "attr_name": "temp1_high_crit_threshold", "drv_attr_name":"temp2_crit"},
+                { "attr_name": "temp1_high_threshold", "drv_attr_name":"temp2_max"},
+                { "attr_name": "temp1_input", "drv_attr_name":"temp2_input"}
+            ]
+        }
+    },
+    "TEMP7" :
+    {
+        "dev_info": { "device_type":"TEMP_SENSOR", "device_name":"TEMP7"},
+        "dev_attr": { "display_name":"CPU_Core_1_temp"},
+        "i2c":
+        {
+            "path_info": {"sysfs_base_path": "/sys/class/hwmon/hwmon0"},
+            "attr_list":
+            [
+                { "attr_name": "temp1_high_crit_threshold", "drv_attr_name":"temp3_crit"},
+                { "attr_name": "temp1_high_threshold", "drv_attr_name":"temp3_max"},
+                { "attr_name": "temp1_input", "drv_attr_name":"temp3_input"}
+            ]
+        }
+    },
+    "TEMP8" :
+    {
+        "dev_info": { "device_type":"TEMP_SENSOR", "device_name":"TEMP8"},
+        "dev_attr": { "display_name":"CPU_Core_2_temp"},
+        "i2c":
+        {
+            "path_info": {"sysfs_base_path": "/sys/class/hwmon/hwmon0"},
+            "attr_list":
+            [
+                { "attr_name": "temp1_high_crit_threshold", "drv_attr_name":"temp4_crit"},
+                { "attr_name": "temp1_high_threshold", "drv_attr_name":"temp4_max"},
+                { "attr_name": "temp1_input", "drv_attr_name":"temp4_input"}
+            ]
+        }
+    },
+    "TEMP9" :
+    {
+        "dev_info": { "device_type":"TEMP_SENSOR", "device_name":"TEMP9"},
+        "dev_attr": { "display_name":"CPU_Core_3_temp"},
+        "i2c":
+        {
+            "path_info": {"sysfs_base_path": "/sys/class/hwmon/hwmon0"},
+            "attr_list":
+            [
+                { "attr_name": "temp1_high_crit_threshold", "drv_attr_name":"temp5_crit"},
+                { "attr_name": "temp1_high_threshold", "drv_attr_name":"temp5_max"},
+                { "attr_name": "temp1_input", "drv_attr_name":"temp5_input"}
+            ]
+        }
+    },
     "FAN-CTRL":
     {
         "dev_info": { "device_type":"FAN", "device_name":"FAN-CTRL", "device_parent":"MUX2"},

From 5e1237f1d9c90bb3c5622ba3f7442ebfb2acc549 Mon Sep 17 00:00:00 2001
From: jostar-yang <jostar_yang@accton.com>
Date: Fri, 30 Aug 2024 15:50:49 +0800
Subject: [PATCH 1114/1115] Add reset() in sfp.py for check sfp_port to avoid
 error message

---
 .../as7326-56x/sonic_platform/sfp.py                 | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/platform/broadcom/sonic-platform-modules-accton/as7326-56x/sonic_platform/sfp.py b/platform/broadcom/sonic-platform-modules-accton/as7326-56x/sonic_platform/sfp.py
index 837d060e9..1aacdfa0f 100644
--- a/platform/broadcom/sonic-platform-modules-accton/as7326-56x/sonic_platform/sfp.py
+++ b/platform/broadcom/sonic-platform-modules-accton/as7326-56x/sonic_platform/sfp.py
@@ -196,3 +196,15 @@ def get_error_description(self):
         except NotImplementedError:
             pass
         return self.__get_error_description()
+
+    def get_reset_status(self):
+        if self.sfp_type == "QSFP28":
+            return super().get_reset_status()
+        return False
+
+
+    def reset(self):
+        if self.sfp_type == "QSFP28":
+            return super().reset()
+        else:
+            return False
\ No newline at end of file

From a33d8db666012dcfdc3530aeb98be7fd8888c0c5 Mon Sep 17 00:00:00 2001
From: Matej Feder <matej.feder@dnation.cloud>
Date: Fri, 4 Oct 2024 12:33:04 +0200
Subject: [PATCH 1115/1115] [submodule] Update submodule sonic-utilities to the
 matofeder/fix_bgp_peer branch

The matofeder/fix_bgp_peer branch contains PR#20333 [frrcfgd] Support
configuring source IPv6 for routes.
refer to: https://github.com/sonic-net/sonic-buildimage/pull/20333

Signed-off-by: Matej Feder <matej.feder@dnation.cloud>
---
 .gitmodules         | 3 ++-
 src/sonic-utilities | 2 +-
 2 files changed, 3 insertions(+), 2 deletions(-)

diff --git a/.gitmodules b/.gitmodules
index 9013bdb67..88b8aebd4 100644
--- a/.gitmodules
+++ b/.gitmodules
@@ -30,7 +30,8 @@
 	url = https://github.com/p4lang/ptf.git
 [submodule "src/sonic-utilities"]
 	path = src/sonic-utilities
-	url = https://github.com/sonic-net/sonic-utilities
+	url = https://github.com/matofeder/sonic-utilities
+	branch = fix_bgp_peer
 [submodule "platform/broadcom/sonic-platform-modules-arista"]
 	path = platform/broadcom/sonic-platform-modules-arista
 	url = https://github.com/aristanetworks/sonic
diff --git a/src/sonic-utilities b/src/sonic-utilities
index 008a078a5..244580794 160000
--- a/src/sonic-utilities
+++ b/src/sonic-utilities
@@ -1 +1 @@
-Subproject commit 008a078a531965f589e319dab1c0b91ca13a6f28
+Subproject commit 2445807942eea6bd0be12ad495252aa729ac5ab5